| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
|---|---|
| 2 | |* *| |
| 3 | |* Target Instruction Enum Values and Descriptors *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #ifdef GET_INSTRINFO_ENUM |
| 10 | #undef GET_INSTRINFO_ENUM |
| 11 | namespace llvm::X86 { |
| 12 | enum { |
| 13 | PHI = 0, |
| 14 | INLINEASM = 1, |
| 15 | INLINEASM_BR = 2, |
| 16 | CFI_INSTRUCTION = 3, |
| 17 | EH_LABEL = 4, |
| 18 | GC_LABEL = 5, |
| 19 | ANNOTATION_LABEL = 6, |
| 20 | KILL = 7, |
| 21 | EXTRACT_SUBREG = 8, |
| 22 | INSERT_SUBREG = 9, |
| 23 | IMPLICIT_DEF = 10, |
| 24 | INIT_UNDEF = 11, |
| 25 | SUBREG_TO_REG = 12, |
| 26 | COPY_TO_REGCLASS = 13, |
| 27 | DBG_VALUE = 14, |
| 28 | DBG_VALUE_LIST = 15, |
| 29 | DBG_INSTR_REF = 16, |
| 30 | DBG_PHI = 17, |
| 31 | DBG_LABEL = 18, |
| 32 | REG_SEQUENCE = 19, |
| 33 | COPY = 20, |
| 34 | BUNDLE = 21, |
| 35 | LIFETIME_START = 22, |
| 36 | LIFETIME_END = 23, |
| 37 | PSEUDO_PROBE = 24, |
| 38 | ARITH_FENCE = 25, |
| 39 | STACKMAP = 26, |
| 40 | FENTRY_CALL = 27, |
| 41 | PATCHPOINT = 28, |
| 42 | LOAD_STACK_GUARD = 29, |
| 43 | PREALLOCATED_SETUP = 30, |
| 44 | PREALLOCATED_ARG = 31, |
| 45 | STATEPOINT = 32, |
| 46 | LOCAL_ESCAPE = 33, |
| 47 | FAULTING_OP = 34, |
| 48 | PATCHABLE_OP = 35, |
| 49 | PATCHABLE_FUNCTION_ENTER = 36, |
| 50 | PATCHABLE_RET = 37, |
| 51 | PATCHABLE_FUNCTION_EXIT = 38, |
| 52 | PATCHABLE_TAIL_CALL = 39, |
| 53 | PATCHABLE_EVENT_CALL = 40, |
| 54 | PATCHABLE_TYPED_EVENT_CALL = 41, |
| 55 | ICALL_BRANCH_FUNNEL = 42, |
| 56 | FAKE_USE = 43, |
| 57 | MEMBARRIER = 44, |
| 58 | JUMP_TABLE_DEBUG_INFO = 45, |
| 59 | CONVERGENCECTRL_ENTRY = 46, |
| 60 | CONVERGENCECTRL_ANCHOR = 47, |
| 61 | CONVERGENCECTRL_LOOP = 48, |
| 62 | CONVERGENCECTRL_GLUE = 49, |
| 63 | G_ASSERT_SEXT = 50, |
| 64 | G_ASSERT_ZEXT = 51, |
| 65 | G_ASSERT_ALIGN = 52, |
| 66 | G_ADD = 53, |
| 67 | G_SUB = 54, |
| 68 | G_MUL = 55, |
| 69 | G_SDIV = 56, |
| 70 | G_UDIV = 57, |
| 71 | G_SREM = 58, |
| 72 | G_UREM = 59, |
| 73 | G_SDIVREM = 60, |
| 74 | G_UDIVREM = 61, |
| 75 | G_AND = 62, |
| 76 | G_OR = 63, |
| 77 | G_XOR = 64, |
| 78 | G_ABDS = 65, |
| 79 | G_ABDU = 66, |
| 80 | G_IMPLICIT_DEF = 67, |
| 81 | G_PHI = 68, |
| 82 | G_FRAME_INDEX = 69, |
| 83 | G_GLOBAL_VALUE = 70, |
| 84 | G_PTRAUTH_GLOBAL_VALUE = 71, |
| 85 | G_CONSTANT_POOL = 72, |
| 86 | G_EXTRACT = 73, |
| 87 | G_UNMERGE_VALUES = 74, |
| 88 | G_INSERT = 75, |
| 89 | G_MERGE_VALUES = 76, |
| 90 | G_BUILD_VECTOR = 77, |
| 91 | G_BUILD_VECTOR_TRUNC = 78, |
| 92 | G_CONCAT_VECTORS = 79, |
| 93 | G_PTRTOINT = 80, |
| 94 | G_INTTOPTR = 81, |
| 95 | G_BITCAST = 82, |
| 96 | G_FREEZE = 83, |
| 97 | G_CONSTANT_FOLD_BARRIER = 84, |
| 98 | G_INTRINSIC_FPTRUNC_ROUND = 85, |
| 99 | G_INTRINSIC_TRUNC = 86, |
| 100 | G_INTRINSIC_ROUND = 87, |
| 101 | G_INTRINSIC_LRINT = 88, |
| 102 | G_INTRINSIC_LLRINT = 89, |
| 103 | G_INTRINSIC_ROUNDEVEN = 90, |
| 104 | G_READCYCLECOUNTER = 91, |
| 105 | G_READSTEADYCOUNTER = 92, |
| 106 | G_LOAD = 93, |
| 107 | G_SEXTLOAD = 94, |
| 108 | G_ZEXTLOAD = 95, |
| 109 | G_INDEXED_LOAD = 96, |
| 110 | G_INDEXED_SEXTLOAD = 97, |
| 111 | G_INDEXED_ZEXTLOAD = 98, |
| 112 | G_STORE = 99, |
| 113 | G_INDEXED_STORE = 100, |
| 114 | G_ATOMIC_CMPXCHG_WITH_SUCCESS = 101, |
| 115 | G_ATOMIC_CMPXCHG = 102, |
| 116 | G_ATOMICRMW_XCHG = 103, |
| 117 | G_ATOMICRMW_ADD = 104, |
| 118 | G_ATOMICRMW_SUB = 105, |
| 119 | G_ATOMICRMW_AND = 106, |
| 120 | G_ATOMICRMW_NAND = 107, |
| 121 | G_ATOMICRMW_OR = 108, |
| 122 | G_ATOMICRMW_XOR = 109, |
| 123 | G_ATOMICRMW_MAX = 110, |
| 124 | G_ATOMICRMW_MIN = 111, |
| 125 | G_ATOMICRMW_UMAX = 112, |
| 126 | G_ATOMICRMW_UMIN = 113, |
| 127 | G_ATOMICRMW_FADD = 114, |
| 128 | G_ATOMICRMW_FSUB = 115, |
| 129 | G_ATOMICRMW_FMAX = 116, |
| 130 | G_ATOMICRMW_FMIN = 117, |
| 131 | G_ATOMICRMW_FMAXIMUM = 118, |
| 132 | G_ATOMICRMW_FMINIMUM = 119, |
| 133 | G_ATOMICRMW_UINC_WRAP = 120, |
| 134 | G_ATOMICRMW_UDEC_WRAP = 121, |
| 135 | G_ATOMICRMW_USUB_COND = 122, |
| 136 | G_ATOMICRMW_USUB_SAT = 123, |
| 137 | G_FENCE = 124, |
| 138 | G_PREFETCH = 125, |
| 139 | G_BRCOND = 126, |
| 140 | G_BRINDIRECT = 127, |
| 141 | G_INVOKE_REGION_START = 128, |
| 142 | G_INTRINSIC = 129, |
| 143 | G_INTRINSIC_W_SIDE_EFFECTS = 130, |
| 144 | G_INTRINSIC_CONVERGENT = 131, |
| 145 | G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 132, |
| 146 | G_ANYEXT = 133, |
| 147 | G_TRUNC = 134, |
| 148 | G_CONSTANT = 135, |
| 149 | G_FCONSTANT = 136, |
| 150 | G_VASTART = 137, |
| 151 | G_VAARG = 138, |
| 152 | G_SEXT = 139, |
| 153 | G_SEXT_INREG = 140, |
| 154 | G_ZEXT = 141, |
| 155 | G_SHL = 142, |
| 156 | G_LSHR = 143, |
| 157 | G_ASHR = 144, |
| 158 | G_FSHL = 145, |
| 159 | G_FSHR = 146, |
| 160 | G_ROTR = 147, |
| 161 | G_ROTL = 148, |
| 162 | G_ICMP = 149, |
| 163 | G_FCMP = 150, |
| 164 | G_SCMP = 151, |
| 165 | G_UCMP = 152, |
| 166 | G_SELECT = 153, |
| 167 | G_UADDO = 154, |
| 168 | G_UADDE = 155, |
| 169 | G_USUBO = 156, |
| 170 | G_USUBE = 157, |
| 171 | G_SADDO = 158, |
| 172 | G_SADDE = 159, |
| 173 | G_SSUBO = 160, |
| 174 | G_SSUBE = 161, |
| 175 | G_UMULO = 162, |
| 176 | G_SMULO = 163, |
| 177 | G_UMULH = 164, |
| 178 | G_SMULH = 165, |
| 179 | G_UADDSAT = 166, |
| 180 | G_SADDSAT = 167, |
| 181 | G_USUBSAT = 168, |
| 182 | G_SSUBSAT = 169, |
| 183 | G_USHLSAT = 170, |
| 184 | G_SSHLSAT = 171, |
| 185 | G_SMULFIX = 172, |
| 186 | G_UMULFIX = 173, |
| 187 | G_SMULFIXSAT = 174, |
| 188 | G_UMULFIXSAT = 175, |
| 189 | G_SDIVFIX = 176, |
| 190 | G_UDIVFIX = 177, |
| 191 | G_SDIVFIXSAT = 178, |
| 192 | G_UDIVFIXSAT = 179, |
| 193 | G_FADD = 180, |
| 194 | G_FSUB = 181, |
| 195 | G_FMUL = 182, |
| 196 | G_FMA = 183, |
| 197 | G_FMAD = 184, |
| 198 | G_FDIV = 185, |
| 199 | G_FREM = 186, |
| 200 | G_FPOW = 187, |
| 201 | G_FPOWI = 188, |
| 202 | G_FEXP = 189, |
| 203 | G_FEXP2 = 190, |
| 204 | G_FEXP10 = 191, |
| 205 | G_FLOG = 192, |
| 206 | G_FLOG2 = 193, |
| 207 | G_FLOG10 = 194, |
| 208 | G_FLDEXP = 195, |
| 209 | G_FFREXP = 196, |
| 210 | G_FNEG = 197, |
| 211 | G_FPEXT = 198, |
| 212 | G_FPTRUNC = 199, |
| 213 | G_FPTOSI = 200, |
| 214 | G_FPTOUI = 201, |
| 215 | G_SITOFP = 202, |
| 216 | G_UITOFP = 203, |
| 217 | G_FPTOSI_SAT = 204, |
| 218 | G_FPTOUI_SAT = 205, |
| 219 | G_FABS = 206, |
| 220 | G_FCOPYSIGN = 207, |
| 221 | G_IS_FPCLASS = 208, |
| 222 | G_FCANONICALIZE = 209, |
| 223 | G_FMINNUM = 210, |
| 224 | G_FMAXNUM = 211, |
| 225 | G_FMINNUM_IEEE = 212, |
| 226 | G_FMAXNUM_IEEE = 213, |
| 227 | G_FMINIMUM = 214, |
| 228 | G_FMAXIMUM = 215, |
| 229 | G_FMINIMUMNUM = 216, |
| 230 | G_FMAXIMUMNUM = 217, |
| 231 | G_GET_FPENV = 218, |
| 232 | G_SET_FPENV = 219, |
| 233 | G_RESET_FPENV = 220, |
| 234 | G_GET_FPMODE = 221, |
| 235 | G_SET_FPMODE = 222, |
| 236 | G_RESET_FPMODE = 223, |
| 237 | G_PTR_ADD = 224, |
| 238 | G_PTRMASK = 225, |
| 239 | G_SMIN = 226, |
| 240 | G_SMAX = 227, |
| 241 | G_UMIN = 228, |
| 242 | G_UMAX = 229, |
| 243 | G_ABS = 230, |
| 244 | G_LROUND = 231, |
| 245 | G_LLROUND = 232, |
| 246 | G_BR = 233, |
| 247 | G_BRJT = 234, |
| 248 | G_VSCALE = 235, |
| 249 | G_INSERT_SUBVECTOR = 236, |
| 250 | G_EXTRACT_SUBVECTOR = 237, |
| 251 | G_INSERT_VECTOR_ELT = 238, |
| 252 | G_EXTRACT_VECTOR_ELT = 239, |
| 253 | G_SHUFFLE_VECTOR = 240, |
| 254 | G_SPLAT_VECTOR = 241, |
| 255 | G_STEP_VECTOR = 242, |
| 256 | G_VECTOR_COMPRESS = 243, |
| 257 | G_CTTZ = 244, |
| 258 | G_CTTZ_ZERO_UNDEF = 245, |
| 259 | G_CTLZ = 246, |
| 260 | G_CTLZ_ZERO_UNDEF = 247, |
| 261 | G_CTPOP = 248, |
| 262 | G_BSWAP = 249, |
| 263 | G_BITREVERSE = 250, |
| 264 | G_FCEIL = 251, |
| 265 | G_FCOS = 252, |
| 266 | G_FSIN = 253, |
| 267 | G_FSINCOS = 254, |
| 268 | G_FTAN = 255, |
| 269 | G_FACOS = 256, |
| 270 | G_FASIN = 257, |
| 271 | G_FATAN = 258, |
| 272 | G_FATAN2 = 259, |
| 273 | G_FCOSH = 260, |
| 274 | G_FSINH = 261, |
| 275 | G_FTANH = 262, |
| 276 | G_FSQRT = 263, |
| 277 | G_FFLOOR = 264, |
| 278 | G_FRINT = 265, |
| 279 | G_FNEARBYINT = 266, |
| 280 | G_ADDRSPACE_CAST = 267, |
| 281 | G_BLOCK_ADDR = 268, |
| 282 | G_JUMP_TABLE = 269, |
| 283 | G_DYN_STACKALLOC = 270, |
| 284 | G_STACKSAVE = 271, |
| 285 | G_STACKRESTORE = 272, |
| 286 | G_STRICT_FADD = 273, |
| 287 | G_STRICT_FSUB = 274, |
| 288 | G_STRICT_FMUL = 275, |
| 289 | G_STRICT_FDIV = 276, |
| 290 | G_STRICT_FREM = 277, |
| 291 | G_STRICT_FMA = 278, |
| 292 | G_STRICT_FSQRT = 279, |
| 293 | G_STRICT_FLDEXP = 280, |
| 294 | G_READ_REGISTER = 281, |
| 295 | G_WRITE_REGISTER = 282, |
| 296 | G_MEMCPY = 283, |
| 297 | G_MEMCPY_INLINE = 284, |
| 298 | G_MEMMOVE = 285, |
| 299 | G_MEMSET = 286, |
| 300 | G_BZERO = 287, |
| 301 | G_TRAP = 288, |
| 302 | G_DEBUGTRAP = 289, |
| 303 | G_UBSANTRAP = 290, |
| 304 | G_VECREDUCE_SEQ_FADD = 291, |
| 305 | G_VECREDUCE_SEQ_FMUL = 292, |
| 306 | G_VECREDUCE_FADD = 293, |
| 307 | G_VECREDUCE_FMUL = 294, |
| 308 | G_VECREDUCE_FMAX = 295, |
| 309 | G_VECREDUCE_FMIN = 296, |
| 310 | G_VECREDUCE_FMAXIMUM = 297, |
| 311 | G_VECREDUCE_FMINIMUM = 298, |
| 312 | G_VECREDUCE_ADD = 299, |
| 313 | G_VECREDUCE_MUL = 300, |
| 314 | G_VECREDUCE_AND = 301, |
| 315 | G_VECREDUCE_OR = 302, |
| 316 | G_VECREDUCE_XOR = 303, |
| 317 | G_VECREDUCE_SMAX = 304, |
| 318 | G_VECREDUCE_SMIN = 305, |
| 319 | G_VECREDUCE_UMAX = 306, |
| 320 | G_VECREDUCE_UMIN = 307, |
| 321 | G_SBFX = 308, |
| 322 | G_UBFX = 309, |
| 323 | ADD16ri_DB = 310, |
| 324 | ADD16rr_DB = 311, |
| 325 | ADD32ri_DB = 312, |
| 326 | ADD32rr_DB = 313, |
| 327 | ADD64ri32_DB = 314, |
| 328 | ADD64rr_DB = 315, |
| 329 | ADD8ri_DB = 316, |
| 330 | ADD8rr_DB = 317, |
| 331 | AVX1_SETALLONES = 318, |
| 332 | AVX2_SETALLONES = 319, |
| 333 | AVX512_128_SET0 = 320, |
| 334 | AVX512_256_SET0 = 321, |
| 335 | AVX512_512_SET0 = 322, |
| 336 | AVX512_512_SETALLONES = 323, |
| 337 | AVX512_512_SEXT_MASK_32 = 324, |
| 338 | AVX512_512_SEXT_MASK_64 = 325, |
| 339 | AVX512_FsFLD0F128 = 326, |
| 340 | AVX512_FsFLD0SD = 327, |
| 341 | AVX512_FsFLD0SH = 328, |
| 342 | AVX512_FsFLD0SS = 329, |
| 343 | AVX_SET0 = 330, |
| 344 | CALL64m_RVMARKER = 331, |
| 345 | CALL64pcrel32_RVMARKER = 332, |
| 346 | CALL64r_ImpCall = 333, |
| 347 | CALL64r_RVMARKER = 334, |
| 348 | FsFLD0F128 = 335, |
| 349 | FsFLD0SD = 336, |
| 350 | FsFLD0SH = 337, |
| 351 | FsFLD0SS = 338, |
| 352 | G_FILD = 339, |
| 353 | G_FIST = 340, |
| 354 | INDIRECT_THUNK_CALL32 = 341, |
| 355 | INDIRECT_THUNK_CALL64 = 342, |
| 356 | INDIRECT_THUNK_TCRETURN32 = 343, |
| 357 | INDIRECT_THUNK_TCRETURN64 = 344, |
| 358 | KSET0D = 345, |
| 359 | KSET0Q = 346, |
| 360 | KSET0W = 347, |
| 361 | KSET1D = 348, |
| 362 | KSET1Q = 349, |
| 363 | KSET1W = 350, |
| 364 | LCMPXCHG16B_NO_RBX = 351, |
| 365 | LCMPXCHG16B_SAVE_RBX = 352, |
| 366 | MMX_SET0 = 353, |
| 367 | MORESTACK_RET = 354, |
| 368 | MORESTACK_RET_RESTORE_R10 = 355, |
| 369 | MOV32ImmSExti8 = 356, |
| 370 | MOV32r0 = 357, |
| 371 | MOV32r1 = 358, |
| 372 | MOV32r_1 = 359, |
| 373 | MOV32ri64 = 360, |
| 374 | MOV64ImmSExti8 = 361, |
| 375 | MWAITX = 362, |
| 376 | MWAITX_SAVE_RBX = 363, |
| 377 | PLDTILECFGV = 364, |
| 378 | PLEA32r = 365, |
| 379 | PLEA64r = 366, |
| 380 | PT2RPNTLVWZ0RST1V = 367, |
| 381 | PT2RPNTLVWZ0RSV = 368, |
| 382 | PT2RPNTLVWZ0T1V = 369, |
| 383 | PT2RPNTLVWZ0V = 370, |
| 384 | PT2RPNTLVWZ1RST1V = 371, |
| 385 | PT2RPNTLVWZ1RSV = 372, |
| 386 | PT2RPNTLVWZ1T1V = 373, |
| 387 | PT2RPNTLVWZ1V = 374, |
| 388 | PTDPBF16PSV = 375, |
| 389 | PTDPBSSDV = 376, |
| 390 | PTDPBSUDV = 377, |
| 391 | PTDPBUSDV = 378, |
| 392 | PTDPBUUDV = 379, |
| 393 | PTDPFP16PSV = 380, |
| 394 | PTILELOADDRST1V = 381, |
| 395 | PTILELOADDRSV = 382, |
| 396 | PTILELOADDT1V = 383, |
| 397 | PTILELOADDV = 384, |
| 398 | PTILEPAIRLOAD = 385, |
| 399 | PTILEPAIRSTORE = 386, |
| 400 | PTILESTOREDV = 387, |
| 401 | PTILEZEROV = 388, |
| 402 | RDFLAGS32 = 389, |
| 403 | RDFLAGS64 = 390, |
| 404 | SEH_BeginEpilogue = 391, |
| 405 | SEH_EndEpilogue = 392, |
| 406 | SEH_EndPrologue = 393, |
| 407 | SEH_PushFrame = 394, |
| 408 | SEH_PushReg = 395, |
| 409 | SEH_SaveReg = 396, |
| 410 | SEH_SaveXMM = 397, |
| 411 | SEH_SetFrame = 398, |
| 412 | SEH_StackAlign = 399, |
| 413 | SEH_StackAlloc = 400, |
| 414 | SEH_UnwindV2Start = 401, |
| 415 | SEH_UnwindVersion = 402, |
| 416 | SETB_C32r = 403, |
| 417 | SETB_C64r = 404, |
| 418 | SHLDROT32ri = 405, |
| 419 | SHLDROT64ri = 406, |
| 420 | SHRDROT32ri = 407, |
| 421 | SHRDROT64ri = 408, |
| 422 | VMOVAPSZ128mr_NOVLX = 409, |
| 423 | VMOVAPSZ128rm_NOVLX = 410, |
| 424 | VMOVAPSZ256mr_NOVLX = 411, |
| 425 | VMOVAPSZ256rm_NOVLX = 412, |
| 426 | VMOVUPSZ128mr_NOVLX = 413, |
| 427 | VMOVUPSZ128rm_NOVLX = 414, |
| 428 | VMOVUPSZ256mr_NOVLX = 415, |
| 429 | VMOVUPSZ256rm_NOVLX = 416, |
| 430 | V_SET0 = 417, |
| 431 | V_SETALLONES = 418, |
| 432 | WRFLAGS32 = 419, |
| 433 | WRFLAGS64 = 420, |
| 434 | XABORT_DEF = 421, |
| 435 | XOR32_FP = 422, |
| 436 | XOR64_FP = 423, |
| 437 | AAA = 424, |
| 438 | AAD8i8 = 425, |
| 439 | AADD32mr = 426, |
| 440 | AADD32mr_EVEX = 427, |
| 441 | AADD64mr = 428, |
| 442 | AADD64mr_EVEX = 429, |
| 443 | AAM8i8 = 430, |
| 444 | AAND32mr = 431, |
| 445 | AAND32mr_EVEX = 432, |
| 446 | AAND64mr = 433, |
| 447 | AAND64mr_EVEX = 434, |
| 448 | AAS = 435, |
| 449 | ABS_F = 436, |
| 450 | ABS_Fp32 = 437, |
| 451 | ABS_Fp64 = 438, |
| 452 | ABS_Fp80 = 439, |
| 453 | ADC16i16 = 440, |
| 454 | ADC16mi = 441, |
| 455 | ADC16mi8 = 442, |
| 456 | ADC16mi8_EVEX = 443, |
| 457 | ADC16mi8_ND = 444, |
| 458 | ADC16mi_EVEX = 445, |
| 459 | ADC16mi_ND = 446, |
| 460 | ADC16mr = 447, |
| 461 | ADC16mr_EVEX = 448, |
| 462 | ADC16mr_ND = 449, |
| 463 | ADC16ri = 450, |
| 464 | ADC16ri8 = 451, |
| 465 | ADC16ri8_EVEX = 452, |
| 466 | ADC16ri8_ND = 453, |
| 467 | ADC16ri_EVEX = 454, |
| 468 | ADC16ri_ND = 455, |
| 469 | ADC16rm = 456, |
| 470 | ADC16rm_EVEX = 457, |
| 471 | ADC16rm_ND = 458, |
| 472 | ADC16rr = 459, |
| 473 | ADC16rr_EVEX = 460, |
| 474 | ADC16rr_EVEX_REV = 461, |
| 475 | ADC16rr_ND = 462, |
| 476 | ADC16rr_ND_REV = 463, |
| 477 | ADC16rr_REV = 464, |
| 478 | ADC32i32 = 465, |
| 479 | ADC32mi = 466, |
| 480 | ADC32mi8 = 467, |
| 481 | ADC32mi8_EVEX = 468, |
| 482 | ADC32mi8_ND = 469, |
| 483 | ADC32mi_EVEX = 470, |
| 484 | ADC32mi_ND = 471, |
| 485 | ADC32mr = 472, |
| 486 | ADC32mr_EVEX = 473, |
| 487 | ADC32mr_ND = 474, |
| 488 | ADC32ri = 475, |
| 489 | ADC32ri8 = 476, |
| 490 | ADC32ri8_EVEX = 477, |
| 491 | ADC32ri8_ND = 478, |
| 492 | ADC32ri_EVEX = 479, |
| 493 | ADC32ri_ND = 480, |
| 494 | ADC32rm = 481, |
| 495 | ADC32rm_EVEX = 482, |
| 496 | ADC32rm_ND = 483, |
| 497 | ADC32rr = 484, |
| 498 | ADC32rr_EVEX = 485, |
| 499 | ADC32rr_EVEX_REV = 486, |
| 500 | ADC32rr_ND = 487, |
| 501 | ADC32rr_ND_REV = 488, |
| 502 | ADC32rr_REV = 489, |
| 503 | ADC64i32 = 490, |
| 504 | ADC64mi32 = 491, |
| 505 | ADC64mi32_EVEX = 492, |
| 506 | ADC64mi32_ND = 493, |
| 507 | ADC64mi8 = 494, |
| 508 | ADC64mi8_EVEX = 495, |
| 509 | ADC64mi8_ND = 496, |
| 510 | ADC64mr = 497, |
| 511 | ADC64mr_EVEX = 498, |
| 512 | ADC64mr_ND = 499, |
| 513 | ADC64ri32 = 500, |
| 514 | ADC64ri32_EVEX = 501, |
| 515 | ADC64ri32_ND = 502, |
| 516 | ADC64ri8 = 503, |
| 517 | ADC64ri8_EVEX = 504, |
| 518 | ADC64ri8_ND = 505, |
| 519 | ADC64rm = 506, |
| 520 | ADC64rm_EVEX = 507, |
| 521 | ADC64rm_ND = 508, |
| 522 | ADC64rr = 509, |
| 523 | ADC64rr_EVEX = 510, |
| 524 | ADC64rr_EVEX_REV = 511, |
| 525 | ADC64rr_ND = 512, |
| 526 | ADC64rr_ND_REV = 513, |
| 527 | ADC64rr_REV = 514, |
| 528 | ADC8i8 = 515, |
| 529 | ADC8mi = 516, |
| 530 | ADC8mi8 = 517, |
| 531 | ADC8mi_EVEX = 518, |
| 532 | ADC8mi_ND = 519, |
| 533 | ADC8mr = 520, |
| 534 | ADC8mr_EVEX = 521, |
| 535 | ADC8mr_ND = 522, |
| 536 | ADC8ri = 523, |
| 537 | ADC8ri8 = 524, |
| 538 | ADC8ri_EVEX = 525, |
| 539 | ADC8ri_ND = 526, |
| 540 | ADC8rm = 527, |
| 541 | ADC8rm_EVEX = 528, |
| 542 | ADC8rm_ND = 529, |
| 543 | ADC8rr = 530, |
| 544 | ADC8rr_EVEX = 531, |
| 545 | ADC8rr_EVEX_REV = 532, |
| 546 | ADC8rr_ND = 533, |
| 547 | ADC8rr_ND_REV = 534, |
| 548 | ADC8rr_REV = 535, |
| 549 | ADCX32rm = 536, |
| 550 | ADCX32rm_EVEX = 537, |
| 551 | ADCX32rm_ND = 538, |
| 552 | ADCX32rr = 539, |
| 553 | ADCX32rr_EVEX = 540, |
| 554 | ADCX32rr_ND = 541, |
| 555 | ADCX64rm = 542, |
| 556 | ADCX64rm_EVEX = 543, |
| 557 | ADCX64rm_ND = 544, |
| 558 | ADCX64rr = 545, |
| 559 | ADCX64rr_EVEX = 546, |
| 560 | ADCX64rr_ND = 547, |
| 561 | ADD16i16 = 548, |
| 562 | ADD16mi = 549, |
| 563 | ADD16mi8 = 550, |
| 564 | ADD16mi8_EVEX = 551, |
| 565 | ADD16mi8_ND = 552, |
| 566 | ADD16mi8_NF = 553, |
| 567 | ADD16mi8_NF_ND = 554, |
| 568 | ADD16mi_EVEX = 555, |
| 569 | ADD16mi_ND = 556, |
| 570 | ADD16mi_NF = 557, |
| 571 | ADD16mi_NF_ND = 558, |
| 572 | ADD16mr = 559, |
| 573 | ADD16mr_EVEX = 560, |
| 574 | ADD16mr_ND = 561, |
| 575 | ADD16mr_NF = 562, |
| 576 | ADD16mr_NF_ND = 563, |
| 577 | ADD16ri = 564, |
| 578 | ADD16ri8 = 565, |
| 579 | ADD16ri8_EVEX = 566, |
| 580 | ADD16ri8_ND = 567, |
| 581 | ADD16ri8_NF = 568, |
| 582 | ADD16ri8_NF_ND = 569, |
| 583 | ADD16ri_EVEX = 570, |
| 584 | ADD16ri_ND = 571, |
| 585 | ADD16ri_NF = 572, |
| 586 | ADD16ri_NF_ND = 573, |
| 587 | ADD16rm = 574, |
| 588 | ADD16rm_EVEX = 575, |
| 589 | ADD16rm_ND = 576, |
| 590 | ADD16rm_NF = 577, |
| 591 | ADD16rm_NF_ND = 578, |
| 592 | ADD16rr = 579, |
| 593 | ADD16rr_EVEX = 580, |
| 594 | ADD16rr_EVEX_REV = 581, |
| 595 | ADD16rr_ND = 582, |
| 596 | ADD16rr_ND_REV = 583, |
| 597 | ADD16rr_NF = 584, |
| 598 | ADD16rr_NF_ND = 585, |
| 599 | ADD16rr_NF_ND_REV = 586, |
| 600 | ADD16rr_NF_REV = 587, |
| 601 | ADD16rr_REV = 588, |
| 602 | ADD32i32 = 589, |
| 603 | ADD32mi = 590, |
| 604 | ADD32mi8 = 591, |
| 605 | ADD32mi8_EVEX = 592, |
| 606 | ADD32mi8_ND = 593, |
| 607 | ADD32mi8_NF = 594, |
| 608 | ADD32mi8_NF_ND = 595, |
| 609 | ADD32mi_EVEX = 596, |
| 610 | ADD32mi_ND = 597, |
| 611 | ADD32mi_NF = 598, |
| 612 | ADD32mi_NF_ND = 599, |
| 613 | ADD32mr = 600, |
| 614 | ADD32mr_EVEX = 601, |
| 615 | ADD32mr_ND = 602, |
| 616 | ADD32mr_NF = 603, |
| 617 | ADD32mr_NF_ND = 604, |
| 618 | ADD32ri = 605, |
| 619 | ADD32ri8 = 606, |
| 620 | ADD32ri8_EVEX = 607, |
| 621 | ADD32ri8_ND = 608, |
| 622 | ADD32ri8_NF = 609, |
| 623 | ADD32ri8_NF_ND = 610, |
| 624 | ADD32ri_EVEX = 611, |
| 625 | ADD32ri_ND = 612, |
| 626 | ADD32ri_NF = 613, |
| 627 | ADD32ri_NF_ND = 614, |
| 628 | ADD32rm = 615, |
| 629 | ADD32rm_EVEX = 616, |
| 630 | ADD32rm_ND = 617, |
| 631 | ADD32rm_NF = 618, |
| 632 | ADD32rm_NF_ND = 619, |
| 633 | ADD32rr = 620, |
| 634 | ADD32rr_EVEX = 621, |
| 635 | ADD32rr_EVEX_REV = 622, |
| 636 | ADD32rr_ND = 623, |
| 637 | ADD32rr_ND_REV = 624, |
| 638 | ADD32rr_NF = 625, |
| 639 | ADD32rr_NF_ND = 626, |
| 640 | ADD32rr_NF_ND_REV = 627, |
| 641 | ADD32rr_NF_REV = 628, |
| 642 | ADD32rr_REV = 629, |
| 643 | ADD64i32 = 630, |
| 644 | ADD64mi32 = 631, |
| 645 | ADD64mi32_EVEX = 632, |
| 646 | ADD64mi32_ND = 633, |
| 647 | ADD64mi32_NF = 634, |
| 648 | ADD64mi32_NF_ND = 635, |
| 649 | ADD64mi8 = 636, |
| 650 | ADD64mi8_EVEX = 637, |
| 651 | ADD64mi8_ND = 638, |
| 652 | ADD64mi8_NF = 639, |
| 653 | ADD64mi8_NF_ND = 640, |
| 654 | ADD64mr = 641, |
| 655 | ADD64mr_EVEX = 642, |
| 656 | ADD64mr_ND = 643, |
| 657 | ADD64mr_NF = 644, |
| 658 | ADD64mr_NF_ND = 645, |
| 659 | ADD64ri32 = 646, |
| 660 | ADD64ri32_EVEX = 647, |
| 661 | ADD64ri32_ND = 648, |
| 662 | ADD64ri32_NF = 649, |
| 663 | ADD64ri32_NF_ND = 650, |
| 664 | ADD64ri8 = 651, |
| 665 | ADD64ri8_EVEX = 652, |
| 666 | ADD64ri8_ND = 653, |
| 667 | ADD64ri8_NF = 654, |
| 668 | ADD64ri8_NF_ND = 655, |
| 669 | ADD64rm = 656, |
| 670 | ADD64rm_EVEX = 657, |
| 671 | ADD64rm_ND = 658, |
| 672 | ADD64rm_NF = 659, |
| 673 | ADD64rm_NF_ND = 660, |
| 674 | ADD64rr = 661, |
| 675 | ADD64rr_EVEX = 662, |
| 676 | ADD64rr_EVEX_REV = 663, |
| 677 | ADD64rr_ND = 664, |
| 678 | ADD64rr_ND_REV = 665, |
| 679 | ADD64rr_NF = 666, |
| 680 | ADD64rr_NF_ND = 667, |
| 681 | ADD64rr_NF_ND_REV = 668, |
| 682 | ADD64rr_NF_REV = 669, |
| 683 | ADD64rr_REV = 670, |
| 684 | ADD8i8 = 671, |
| 685 | ADD8mi = 672, |
| 686 | ADD8mi8 = 673, |
| 687 | ADD8mi_EVEX = 674, |
| 688 | ADD8mi_ND = 675, |
| 689 | ADD8mi_NF = 676, |
| 690 | ADD8mi_NF_ND = 677, |
| 691 | ADD8mr = 678, |
| 692 | ADD8mr_EVEX = 679, |
| 693 | ADD8mr_ND = 680, |
| 694 | ADD8mr_NF = 681, |
| 695 | ADD8mr_NF_ND = 682, |
| 696 | ADD8ri = 683, |
| 697 | ADD8ri8 = 684, |
| 698 | ADD8ri_EVEX = 685, |
| 699 | ADD8ri_ND = 686, |
| 700 | ADD8ri_NF = 687, |
| 701 | ADD8ri_NF_ND = 688, |
| 702 | ADD8rm = 689, |
| 703 | ADD8rm_EVEX = 690, |
| 704 | ADD8rm_ND = 691, |
| 705 | ADD8rm_NF = 692, |
| 706 | ADD8rm_NF_ND = 693, |
| 707 | ADD8rr = 694, |
| 708 | ADD8rr_EVEX = 695, |
| 709 | ADD8rr_EVEX_REV = 696, |
| 710 | ADD8rr_ND = 697, |
| 711 | ADD8rr_ND_REV = 698, |
| 712 | ADD8rr_NF = 699, |
| 713 | ADD8rr_NF_ND = 700, |
| 714 | ADD8rr_NF_ND_REV = 701, |
| 715 | ADD8rr_NF_REV = 702, |
| 716 | ADD8rr_REV = 703, |
| 717 | ADDPDrm = 704, |
| 718 | ADDPDrr = 705, |
| 719 | ADDPSrm = 706, |
| 720 | ADDPSrr = 707, |
| 721 | ADDR16_PREFIX = 708, |
| 722 | ADDR32_PREFIX = 709, |
| 723 | ADDSDrm = 710, |
| 724 | ADDSDrm_Int = 711, |
| 725 | ADDSDrr = 712, |
| 726 | ADDSDrr_Int = 713, |
| 727 | ADDSSrm = 714, |
| 728 | ADDSSrm_Int = 715, |
| 729 | ADDSSrr = 716, |
| 730 | ADDSSrr_Int = 717, |
| 731 | ADDSUBPDrm = 718, |
| 732 | ADDSUBPDrr = 719, |
| 733 | ADDSUBPSrm = 720, |
| 734 | ADDSUBPSrr = 721, |
| 735 | ADD_F32m = 722, |
| 736 | ADD_F64m = 723, |
| 737 | ADD_FI16m = 724, |
| 738 | ADD_FI32m = 725, |
| 739 | ADD_FPrST0 = 726, |
| 740 | ADD_FST0r = 727, |
| 741 | ADD_Fp32 = 728, |
| 742 | ADD_Fp32m = 729, |
| 743 | ADD_Fp64 = 730, |
| 744 | ADD_Fp64m = 731, |
| 745 | ADD_Fp64m32 = 732, |
| 746 | ADD_Fp80 = 733, |
| 747 | ADD_Fp80m32 = 734, |
| 748 | ADD_Fp80m64 = 735, |
| 749 | ADD_FpI16m32 = 736, |
| 750 | ADD_FpI16m64 = 737, |
| 751 | ADD_FpI16m80 = 738, |
| 752 | ADD_FpI32m32 = 739, |
| 753 | ADD_FpI32m64 = 740, |
| 754 | ADD_FpI32m80 = 741, |
| 755 | ADD_FrST0 = 742, |
| 756 | ADJCALLSTACKDOWN32 = 743, |
| 757 | ADJCALLSTACKDOWN64 = 744, |
| 758 | ADJCALLSTACKUP32 = 745, |
| 759 | ADJCALLSTACKUP64 = 746, |
| 760 | ADOX32rm = 747, |
| 761 | ADOX32rm_EVEX = 748, |
| 762 | ADOX32rm_ND = 749, |
| 763 | ADOX32rr = 750, |
| 764 | ADOX32rr_EVEX = 751, |
| 765 | ADOX32rr_ND = 752, |
| 766 | ADOX64rm = 753, |
| 767 | ADOX64rm_EVEX = 754, |
| 768 | ADOX64rm_ND = 755, |
| 769 | ADOX64rr = 756, |
| 770 | ADOX64rr_EVEX = 757, |
| 771 | ADOX64rr_ND = 758, |
| 772 | AESDEC128KL = 759, |
| 773 | AESDEC256KL = 760, |
| 774 | AESDECLASTrm = 761, |
| 775 | AESDECLASTrr = 762, |
| 776 | AESDECWIDE128KL = 763, |
| 777 | AESDECWIDE256KL = 764, |
| 778 | AESDECrm = 765, |
| 779 | AESDECrr = 766, |
| 780 | AESENC128KL = 767, |
| 781 | AESENC256KL = 768, |
| 782 | AESENCLASTrm = 769, |
| 783 | AESENCLASTrr = 770, |
| 784 | AESENCWIDE128KL = 771, |
| 785 | AESENCWIDE256KL = 772, |
| 786 | AESENCrm = 773, |
| 787 | AESENCrr = 774, |
| 788 | AESIMCrm = 775, |
| 789 | AESIMCrr = 776, |
| 790 | AESKEYGENASSIST128rm = 777, |
| 791 | AESKEYGENASSIST128rr = 778, |
| 792 | AND16i16 = 779, |
| 793 | AND16mi = 780, |
| 794 | AND16mi8 = 781, |
| 795 | AND16mi8_EVEX = 782, |
| 796 | AND16mi8_ND = 783, |
| 797 | AND16mi8_NF = 784, |
| 798 | AND16mi8_NF_ND = 785, |
| 799 | AND16mi_EVEX = 786, |
| 800 | AND16mi_ND = 787, |
| 801 | AND16mi_NF = 788, |
| 802 | AND16mi_NF_ND = 789, |
| 803 | AND16mr = 790, |
| 804 | AND16mr_EVEX = 791, |
| 805 | AND16mr_ND = 792, |
| 806 | AND16mr_NF = 793, |
| 807 | AND16mr_NF_ND = 794, |
| 808 | AND16ri = 795, |
| 809 | AND16ri8 = 796, |
| 810 | AND16ri8_EVEX = 797, |
| 811 | AND16ri8_ND = 798, |
| 812 | AND16ri8_NF = 799, |
| 813 | AND16ri8_NF_ND = 800, |
| 814 | AND16ri_EVEX = 801, |
| 815 | AND16ri_ND = 802, |
| 816 | AND16ri_NF = 803, |
| 817 | AND16ri_NF_ND = 804, |
| 818 | AND16rm = 805, |
| 819 | AND16rm_EVEX = 806, |
| 820 | AND16rm_ND = 807, |
| 821 | AND16rm_NF = 808, |
| 822 | AND16rm_NF_ND = 809, |
| 823 | AND16rr = 810, |
| 824 | AND16rr_EVEX = 811, |
| 825 | AND16rr_EVEX_REV = 812, |
| 826 | AND16rr_ND = 813, |
| 827 | AND16rr_ND_REV = 814, |
| 828 | AND16rr_NF = 815, |
| 829 | AND16rr_NF_ND = 816, |
| 830 | AND16rr_NF_ND_REV = 817, |
| 831 | AND16rr_NF_REV = 818, |
| 832 | AND16rr_REV = 819, |
| 833 | AND32i32 = 820, |
| 834 | AND32mi = 821, |
| 835 | AND32mi8 = 822, |
| 836 | AND32mi8_EVEX = 823, |
| 837 | AND32mi8_ND = 824, |
| 838 | AND32mi8_NF = 825, |
| 839 | AND32mi8_NF_ND = 826, |
| 840 | AND32mi_EVEX = 827, |
| 841 | AND32mi_ND = 828, |
| 842 | AND32mi_NF = 829, |
| 843 | AND32mi_NF_ND = 830, |
| 844 | AND32mr = 831, |
| 845 | AND32mr_EVEX = 832, |
| 846 | AND32mr_ND = 833, |
| 847 | AND32mr_NF = 834, |
| 848 | AND32mr_NF_ND = 835, |
| 849 | AND32ri = 836, |
| 850 | AND32ri8 = 837, |
| 851 | AND32ri8_EVEX = 838, |
| 852 | AND32ri8_ND = 839, |
| 853 | AND32ri8_NF = 840, |
| 854 | AND32ri8_NF_ND = 841, |
| 855 | AND32ri_EVEX = 842, |
| 856 | AND32ri_ND = 843, |
| 857 | AND32ri_NF = 844, |
| 858 | AND32ri_NF_ND = 845, |
| 859 | AND32rm = 846, |
| 860 | AND32rm_EVEX = 847, |
| 861 | AND32rm_ND = 848, |
| 862 | AND32rm_NF = 849, |
| 863 | AND32rm_NF_ND = 850, |
| 864 | AND32rr = 851, |
| 865 | AND32rr_EVEX = 852, |
| 866 | AND32rr_EVEX_REV = 853, |
| 867 | AND32rr_ND = 854, |
| 868 | AND32rr_ND_REV = 855, |
| 869 | AND32rr_NF = 856, |
| 870 | AND32rr_NF_ND = 857, |
| 871 | AND32rr_NF_ND_REV = 858, |
| 872 | AND32rr_NF_REV = 859, |
| 873 | AND32rr_REV = 860, |
| 874 | AND64i32 = 861, |
| 875 | AND64mi32 = 862, |
| 876 | AND64mi32_EVEX = 863, |
| 877 | AND64mi32_ND = 864, |
| 878 | AND64mi32_NF = 865, |
| 879 | AND64mi32_NF_ND = 866, |
| 880 | AND64mi8 = 867, |
| 881 | AND64mi8_EVEX = 868, |
| 882 | AND64mi8_ND = 869, |
| 883 | AND64mi8_NF = 870, |
| 884 | AND64mi8_NF_ND = 871, |
| 885 | AND64mr = 872, |
| 886 | AND64mr_EVEX = 873, |
| 887 | AND64mr_ND = 874, |
| 888 | AND64mr_NF = 875, |
| 889 | AND64mr_NF_ND = 876, |
| 890 | AND64ri32 = 877, |
| 891 | AND64ri32_EVEX = 878, |
| 892 | AND64ri32_ND = 879, |
| 893 | AND64ri32_NF = 880, |
| 894 | AND64ri32_NF_ND = 881, |
| 895 | AND64ri8 = 882, |
| 896 | AND64ri8_EVEX = 883, |
| 897 | AND64ri8_ND = 884, |
| 898 | AND64ri8_NF = 885, |
| 899 | AND64ri8_NF_ND = 886, |
| 900 | AND64rm = 887, |
| 901 | AND64rm_EVEX = 888, |
| 902 | AND64rm_ND = 889, |
| 903 | AND64rm_NF = 890, |
| 904 | AND64rm_NF_ND = 891, |
| 905 | AND64rr = 892, |
| 906 | AND64rr_EVEX = 893, |
| 907 | AND64rr_EVEX_REV = 894, |
| 908 | AND64rr_ND = 895, |
| 909 | AND64rr_ND_REV = 896, |
| 910 | AND64rr_NF = 897, |
| 911 | AND64rr_NF_ND = 898, |
| 912 | AND64rr_NF_ND_REV = 899, |
| 913 | AND64rr_NF_REV = 900, |
| 914 | AND64rr_REV = 901, |
| 915 | AND8i8 = 902, |
| 916 | AND8mi = 903, |
| 917 | AND8mi8 = 904, |
| 918 | AND8mi_EVEX = 905, |
| 919 | AND8mi_ND = 906, |
| 920 | AND8mi_NF = 907, |
| 921 | AND8mi_NF_ND = 908, |
| 922 | AND8mr = 909, |
| 923 | AND8mr_EVEX = 910, |
| 924 | AND8mr_ND = 911, |
| 925 | AND8mr_NF = 912, |
| 926 | AND8mr_NF_ND = 913, |
| 927 | AND8ri = 914, |
| 928 | AND8ri8 = 915, |
| 929 | AND8ri_EVEX = 916, |
| 930 | AND8ri_ND = 917, |
| 931 | AND8ri_NF = 918, |
| 932 | AND8ri_NF_ND = 919, |
| 933 | AND8rm = 920, |
| 934 | AND8rm_EVEX = 921, |
| 935 | AND8rm_ND = 922, |
| 936 | AND8rm_NF = 923, |
| 937 | AND8rm_NF_ND = 924, |
| 938 | AND8rr = 925, |
| 939 | AND8rr_EVEX = 926, |
| 940 | AND8rr_EVEX_REV = 927, |
| 941 | AND8rr_ND = 928, |
| 942 | AND8rr_ND_REV = 929, |
| 943 | AND8rr_NF = 930, |
| 944 | AND8rr_NF_ND = 931, |
| 945 | AND8rr_NF_ND_REV = 932, |
| 946 | AND8rr_NF_REV = 933, |
| 947 | AND8rr_REV = 934, |
| 948 | ANDN32rm = 935, |
| 949 | ANDN32rm_EVEX = 936, |
| 950 | ANDN32rm_NF = 937, |
| 951 | ANDN32rr = 938, |
| 952 | ANDN32rr_EVEX = 939, |
| 953 | ANDN32rr_NF = 940, |
| 954 | ANDN64rm = 941, |
| 955 | ANDN64rm_EVEX = 942, |
| 956 | ANDN64rm_NF = 943, |
| 957 | ANDN64rr = 944, |
| 958 | ANDN64rr_EVEX = 945, |
| 959 | ANDN64rr_NF = 946, |
| 960 | ANDNPDrm = 947, |
| 961 | ANDNPDrr = 948, |
| 962 | ANDNPSrm = 949, |
| 963 | ANDNPSrr = 950, |
| 964 | ANDPDrm = 951, |
| 965 | ANDPDrr = 952, |
| 966 | ANDPSrm = 953, |
| 967 | ANDPSrr = 954, |
| 968 | AOR32mr = 955, |
| 969 | AOR32mr_EVEX = 956, |
| 970 | AOR64mr = 957, |
| 971 | AOR64mr_EVEX = 958, |
| 972 | ARPL16mr = 959, |
| 973 | ARPL16rr = 960, |
| 974 | ASAN_CHECK_MEMACCESS = 961, |
| 975 | AXOR32mr = 962, |
| 976 | AXOR32mr_EVEX = 963, |
| 977 | AXOR64mr = 964, |
| 978 | AXOR64mr_EVEX = 965, |
| 979 | BEXTR32rm = 966, |
| 980 | BEXTR32rm_EVEX = 967, |
| 981 | BEXTR32rm_NF = 968, |
| 982 | BEXTR32rr = 969, |
| 983 | BEXTR32rr_EVEX = 970, |
| 984 | BEXTR32rr_NF = 971, |
| 985 | BEXTR64rm = 972, |
| 986 | BEXTR64rm_EVEX = 973, |
| 987 | BEXTR64rm_NF = 974, |
| 988 | BEXTR64rr = 975, |
| 989 | BEXTR64rr_EVEX = 976, |
| 990 | BEXTR64rr_NF = 977, |
| 991 | BEXTRI32mi = 978, |
| 992 | BEXTRI32ri = 979, |
| 993 | BEXTRI64mi = 980, |
| 994 | BEXTRI64ri = 981, |
| 995 | BLCFILL32rm = 982, |
| 996 | BLCFILL32rr = 983, |
| 997 | BLCFILL64rm = 984, |
| 998 | BLCFILL64rr = 985, |
| 999 | BLCI32rm = 986, |
| 1000 | BLCI32rr = 987, |
| 1001 | BLCI64rm = 988, |
| 1002 | BLCI64rr = 989, |
| 1003 | BLCIC32rm = 990, |
| 1004 | BLCIC32rr = 991, |
| 1005 | BLCIC64rm = 992, |
| 1006 | BLCIC64rr = 993, |
| 1007 | BLCMSK32rm = 994, |
| 1008 | BLCMSK32rr = 995, |
| 1009 | BLCMSK64rm = 996, |
| 1010 | BLCMSK64rr = 997, |
| 1011 | BLCS32rm = 998, |
| 1012 | BLCS32rr = 999, |
| 1013 | BLCS64rm = 1000, |
| 1014 | BLCS64rr = 1001, |
| 1015 | BLENDPDrmi = 1002, |
| 1016 | BLENDPDrri = 1003, |
| 1017 | BLENDPSrmi = 1004, |
| 1018 | BLENDPSrri = 1005, |
| 1019 | BLENDVPDrm0 = 1006, |
| 1020 | BLENDVPDrr0 = 1007, |
| 1021 | BLENDVPSrm0 = 1008, |
| 1022 | BLENDVPSrr0 = 1009, |
| 1023 | BLSFILL32rm = 1010, |
| 1024 | BLSFILL32rr = 1011, |
| 1025 | BLSFILL64rm = 1012, |
| 1026 | BLSFILL64rr = 1013, |
| 1027 | BLSI32rm = 1014, |
| 1028 | BLSI32rm_EVEX = 1015, |
| 1029 | BLSI32rm_NF = 1016, |
| 1030 | BLSI32rr = 1017, |
| 1031 | BLSI32rr_EVEX = 1018, |
| 1032 | BLSI32rr_NF = 1019, |
| 1033 | BLSI64rm = 1020, |
| 1034 | BLSI64rm_EVEX = 1021, |
| 1035 | BLSI64rm_NF = 1022, |
| 1036 | BLSI64rr = 1023, |
| 1037 | BLSI64rr_EVEX = 1024, |
| 1038 | BLSI64rr_NF = 1025, |
| 1039 | BLSIC32rm = 1026, |
| 1040 | BLSIC32rr = 1027, |
| 1041 | BLSIC64rm = 1028, |
| 1042 | BLSIC64rr = 1029, |
| 1043 | BLSMSK32rm = 1030, |
| 1044 | BLSMSK32rm_EVEX = 1031, |
| 1045 | BLSMSK32rm_NF = 1032, |
| 1046 | BLSMSK32rr = 1033, |
| 1047 | BLSMSK32rr_EVEX = 1034, |
| 1048 | BLSMSK32rr_NF = 1035, |
| 1049 | BLSMSK64rm = 1036, |
| 1050 | BLSMSK64rm_EVEX = 1037, |
| 1051 | BLSMSK64rm_NF = 1038, |
| 1052 | BLSMSK64rr = 1039, |
| 1053 | BLSMSK64rr_EVEX = 1040, |
| 1054 | BLSMSK64rr_NF = 1041, |
| 1055 | BLSR32rm = 1042, |
| 1056 | BLSR32rm_EVEX = 1043, |
| 1057 | BLSR32rm_NF = 1044, |
| 1058 | BLSR32rr = 1045, |
| 1059 | BLSR32rr_EVEX = 1046, |
| 1060 | BLSR32rr_NF = 1047, |
| 1061 | BLSR64rm = 1048, |
| 1062 | BLSR64rm_EVEX = 1049, |
| 1063 | BLSR64rm_NF = 1050, |
| 1064 | BLSR64rr = 1051, |
| 1065 | BLSR64rr_EVEX = 1052, |
| 1066 | BLSR64rr_NF = 1053, |
| 1067 | BOUNDS16rm = 1054, |
| 1068 | BOUNDS32rm = 1055, |
| 1069 | BSF16rm = 1056, |
| 1070 | BSF16rr = 1057, |
| 1071 | BSF32rm = 1058, |
| 1072 | BSF32rr = 1059, |
| 1073 | BSF64rm = 1060, |
| 1074 | BSF64rr = 1061, |
| 1075 | BSR16rm = 1062, |
| 1076 | BSR16rr = 1063, |
| 1077 | BSR32rm = 1064, |
| 1078 | BSR32rr = 1065, |
| 1079 | BSR64rm = 1066, |
| 1080 | BSR64rr = 1067, |
| 1081 | BSWAP16r_BAD = 1068, |
| 1082 | BSWAP32r = 1069, |
| 1083 | BSWAP64r = 1070, |
| 1084 | BT16mi8 = 1071, |
| 1085 | BT16mr = 1072, |
| 1086 | BT16ri8 = 1073, |
| 1087 | BT16rr = 1074, |
| 1088 | BT32mi8 = 1075, |
| 1089 | BT32mr = 1076, |
| 1090 | BT32ri8 = 1077, |
| 1091 | BT32rr = 1078, |
| 1092 | BT64mi8 = 1079, |
| 1093 | BT64mr = 1080, |
| 1094 | BT64ri8 = 1081, |
| 1095 | BT64rr = 1082, |
| 1096 | BTC16mi8 = 1083, |
| 1097 | BTC16mr = 1084, |
| 1098 | BTC16ri8 = 1085, |
| 1099 | BTC16rr = 1086, |
| 1100 | BTC32mi8 = 1087, |
| 1101 | BTC32mr = 1088, |
| 1102 | BTC32ri8 = 1089, |
| 1103 | BTC32rr = 1090, |
| 1104 | BTC64mi8 = 1091, |
| 1105 | BTC64mr = 1092, |
| 1106 | BTC64ri8 = 1093, |
| 1107 | BTC64rr = 1094, |
| 1108 | BTR16mi8 = 1095, |
| 1109 | BTR16mr = 1096, |
| 1110 | BTR16ri8 = 1097, |
| 1111 | BTR16rr = 1098, |
| 1112 | BTR32mi8 = 1099, |
| 1113 | BTR32mr = 1100, |
| 1114 | BTR32ri8 = 1101, |
| 1115 | BTR32rr = 1102, |
| 1116 | BTR64mi8 = 1103, |
| 1117 | BTR64mr = 1104, |
| 1118 | BTR64ri8 = 1105, |
| 1119 | BTR64rr = 1106, |
| 1120 | BTS16mi8 = 1107, |
| 1121 | BTS16mr = 1108, |
| 1122 | BTS16ri8 = 1109, |
| 1123 | BTS16rr = 1110, |
| 1124 | BTS32mi8 = 1111, |
| 1125 | BTS32mr = 1112, |
| 1126 | BTS32ri8 = 1113, |
| 1127 | BTS32rr = 1114, |
| 1128 | BTS64mi8 = 1115, |
| 1129 | BTS64mr = 1116, |
| 1130 | BTS64ri8 = 1117, |
| 1131 | BTS64rr = 1118, |
| 1132 | BZHI32rm = 1119, |
| 1133 | BZHI32rm_EVEX = 1120, |
| 1134 | BZHI32rm_NF = 1121, |
| 1135 | BZHI32rr = 1122, |
| 1136 | BZHI32rr_EVEX = 1123, |
| 1137 | BZHI32rr_NF = 1124, |
| 1138 | BZHI64rm = 1125, |
| 1139 | BZHI64rm_EVEX = 1126, |
| 1140 | BZHI64rm_NF = 1127, |
| 1141 | BZHI64rr = 1128, |
| 1142 | BZHI64rr_EVEX = 1129, |
| 1143 | BZHI64rr_NF = 1130, |
| 1144 | CALL16m = 1131, |
| 1145 | CALL16m_NT = 1132, |
| 1146 | CALL16r = 1133, |
| 1147 | CALL16r_NT = 1134, |
| 1148 | CALL32m = 1135, |
| 1149 | CALL32m_NT = 1136, |
| 1150 | CALL32r = 1137, |
| 1151 | CALL32r_NT = 1138, |
| 1152 | CALL64m = 1139, |
| 1153 | CALL64m_NT = 1140, |
| 1154 | CALL64pcrel32 = 1141, |
| 1155 | CALL64r = 1142, |
| 1156 | CALL64r_NT = 1143, |
| 1157 | CALLpcrel16 = 1144, |
| 1158 | CALLpcrel32 = 1145, |
| 1159 | CATCHRET = 1146, |
| 1160 | CBW = 1147, |
| 1161 | CCMP16mi = 1148, |
| 1162 | CCMP16mi8 = 1149, |
| 1163 | CCMP16mr = 1150, |
| 1164 | CCMP16ri = 1151, |
| 1165 | CCMP16ri8 = 1152, |
| 1166 | CCMP16rm = 1153, |
| 1167 | CCMP16rr = 1154, |
| 1168 | CCMP16rr_REV = 1155, |
| 1169 | CCMP32mi = 1156, |
| 1170 | CCMP32mi8 = 1157, |
| 1171 | CCMP32mr = 1158, |
| 1172 | CCMP32ri = 1159, |
| 1173 | CCMP32ri8 = 1160, |
| 1174 | CCMP32rm = 1161, |
| 1175 | CCMP32rr = 1162, |
| 1176 | CCMP32rr_REV = 1163, |
| 1177 | CCMP64mi32 = 1164, |
| 1178 | CCMP64mi8 = 1165, |
| 1179 | CCMP64mr = 1166, |
| 1180 | CCMP64ri32 = 1167, |
| 1181 | CCMP64ri8 = 1168, |
| 1182 | CCMP64rm = 1169, |
| 1183 | CCMP64rr = 1170, |
| 1184 | CCMP64rr_REV = 1171, |
| 1185 | CCMP8mi = 1172, |
| 1186 | CCMP8mr = 1173, |
| 1187 | CCMP8ri = 1174, |
| 1188 | CCMP8rm = 1175, |
| 1189 | CCMP8rr = 1176, |
| 1190 | CCMP8rr_REV = 1177, |
| 1191 | CDQ = 1178, |
| 1192 | CDQE = 1179, |
| 1193 | CFCMOV16mr = 1180, |
| 1194 | CFCMOV16rm = 1181, |
| 1195 | CFCMOV16rm_ND = 1182, |
| 1196 | CFCMOV16rr = 1183, |
| 1197 | CFCMOV16rr_ND = 1184, |
| 1198 | CFCMOV16rr_REV = 1185, |
| 1199 | CFCMOV32mr = 1186, |
| 1200 | CFCMOV32rm = 1187, |
| 1201 | CFCMOV32rm_ND = 1188, |
| 1202 | CFCMOV32rr = 1189, |
| 1203 | CFCMOV32rr_ND = 1190, |
| 1204 | CFCMOV32rr_REV = 1191, |
| 1205 | CFCMOV64mr = 1192, |
| 1206 | CFCMOV64rm = 1193, |
| 1207 | CFCMOV64rm_ND = 1194, |
| 1208 | CFCMOV64rr = 1195, |
| 1209 | CFCMOV64rr_ND = 1196, |
| 1210 | CFCMOV64rr_REV = 1197, |
| 1211 | CHS_F = 1198, |
| 1212 | CHS_Fp32 = 1199, |
| 1213 | CHS_Fp64 = 1200, |
| 1214 | CHS_Fp80 = 1201, |
| 1215 | CLAC = 1202, |
| 1216 | CLC = 1203, |
| 1217 | CLD = 1204, |
| 1218 | CLDEMOTE = 1205, |
| 1219 | CLEANUPRET = 1206, |
| 1220 | CLFLUSH = 1207, |
| 1221 | CLFLUSHOPT = 1208, |
| 1222 | CLGI = 1209, |
| 1223 | CLI = 1210, |
| 1224 | CLRSSBSY = 1211, |
| 1225 | CLTS = 1212, |
| 1226 | CLUI = 1213, |
| 1227 | CLWB = 1214, |
| 1228 | CLZERO32r = 1215, |
| 1229 | CLZERO64r = 1216, |
| 1230 | CMC = 1217, |
| 1231 | CMOV16rm = 1218, |
| 1232 | CMOV16rm_ND = 1219, |
| 1233 | CMOV16rr = 1220, |
| 1234 | CMOV16rr_ND = 1221, |
| 1235 | CMOV32rm = 1222, |
| 1236 | CMOV32rm_ND = 1223, |
| 1237 | CMOV32rr = 1224, |
| 1238 | CMOV32rr_ND = 1225, |
| 1239 | CMOV64rm = 1226, |
| 1240 | CMOV64rm_ND = 1227, |
| 1241 | CMOV64rr = 1228, |
| 1242 | CMOV64rr_ND = 1229, |
| 1243 | CMOVBE_F = 1230, |
| 1244 | CMOVBE_Fp32 = 1231, |
| 1245 | CMOVBE_Fp64 = 1232, |
| 1246 | CMOVBE_Fp80 = 1233, |
| 1247 | CMOVB_F = 1234, |
| 1248 | CMOVB_Fp32 = 1235, |
| 1249 | CMOVB_Fp64 = 1236, |
| 1250 | CMOVB_Fp80 = 1237, |
| 1251 | CMOVE_F = 1238, |
| 1252 | CMOVE_Fp32 = 1239, |
| 1253 | CMOVE_Fp64 = 1240, |
| 1254 | CMOVE_Fp80 = 1241, |
| 1255 | CMOVNBE_F = 1242, |
| 1256 | CMOVNBE_Fp32 = 1243, |
| 1257 | CMOVNBE_Fp64 = 1244, |
| 1258 | CMOVNBE_Fp80 = 1245, |
| 1259 | CMOVNB_F = 1246, |
| 1260 | CMOVNB_Fp32 = 1247, |
| 1261 | CMOVNB_Fp64 = 1248, |
| 1262 | CMOVNB_Fp80 = 1249, |
| 1263 | CMOVNE_F = 1250, |
| 1264 | CMOVNE_Fp32 = 1251, |
| 1265 | CMOVNE_Fp64 = 1252, |
| 1266 | CMOVNE_Fp80 = 1253, |
| 1267 | CMOVNP_F = 1254, |
| 1268 | CMOVNP_Fp32 = 1255, |
| 1269 | CMOVNP_Fp64 = 1256, |
| 1270 | CMOVNP_Fp80 = 1257, |
| 1271 | CMOVP_F = 1258, |
| 1272 | CMOVP_Fp32 = 1259, |
| 1273 | CMOVP_Fp64 = 1260, |
| 1274 | CMOVP_Fp80 = 1261, |
| 1275 | CMOV_FR16 = 1262, |
| 1276 | CMOV_FR16X = 1263, |
| 1277 | CMOV_FR32 = 1264, |
| 1278 | CMOV_FR32X = 1265, |
| 1279 | CMOV_FR64 = 1266, |
| 1280 | CMOV_FR64X = 1267, |
| 1281 | CMOV_GR16 = 1268, |
| 1282 | CMOV_GR32 = 1269, |
| 1283 | CMOV_GR8 = 1270, |
| 1284 | CMOV_RFP32 = 1271, |
| 1285 | CMOV_RFP64 = 1272, |
| 1286 | CMOV_RFP80 = 1273, |
| 1287 | CMOV_VK1 = 1274, |
| 1288 | CMOV_VK16 = 1275, |
| 1289 | CMOV_VK2 = 1276, |
| 1290 | CMOV_VK32 = 1277, |
| 1291 | CMOV_VK4 = 1278, |
| 1292 | CMOV_VK64 = 1279, |
| 1293 | CMOV_VK8 = 1280, |
| 1294 | CMOV_VR128 = 1281, |
| 1295 | CMOV_VR128X = 1282, |
| 1296 | CMOV_VR256 = 1283, |
| 1297 | CMOV_VR256X = 1284, |
| 1298 | CMOV_VR512 = 1285, |
| 1299 | CMOV_VR64 = 1286, |
| 1300 | CMP16i16 = 1287, |
| 1301 | CMP16mi = 1288, |
| 1302 | CMP16mi8 = 1289, |
| 1303 | CMP16mr = 1290, |
| 1304 | CMP16ri = 1291, |
| 1305 | CMP16ri8 = 1292, |
| 1306 | CMP16rm = 1293, |
| 1307 | CMP16rr = 1294, |
| 1308 | CMP16rr_REV = 1295, |
| 1309 | CMP32i32 = 1296, |
| 1310 | CMP32mi = 1297, |
| 1311 | CMP32mi8 = 1298, |
| 1312 | CMP32mr = 1299, |
| 1313 | CMP32ri = 1300, |
| 1314 | CMP32ri8 = 1301, |
| 1315 | CMP32rm = 1302, |
| 1316 | CMP32rr = 1303, |
| 1317 | CMP32rr_REV = 1304, |
| 1318 | CMP64i32 = 1305, |
| 1319 | CMP64mi32 = 1306, |
| 1320 | CMP64mi8 = 1307, |
| 1321 | CMP64mr = 1308, |
| 1322 | CMP64ri32 = 1309, |
| 1323 | CMP64ri8 = 1310, |
| 1324 | CMP64rm = 1311, |
| 1325 | CMP64rr = 1312, |
| 1326 | CMP64rr_REV = 1313, |
| 1327 | CMP8i8 = 1314, |
| 1328 | CMP8mi = 1315, |
| 1329 | CMP8mi8 = 1316, |
| 1330 | CMP8mr = 1317, |
| 1331 | CMP8ri = 1318, |
| 1332 | CMP8ri8 = 1319, |
| 1333 | CMP8rm = 1320, |
| 1334 | CMP8rr = 1321, |
| 1335 | CMP8rr_REV = 1322, |
| 1336 | CMPCCXADDmr32 = 1323, |
| 1337 | CMPCCXADDmr32_EVEX = 1324, |
| 1338 | CMPCCXADDmr64 = 1325, |
| 1339 | CMPCCXADDmr64_EVEX = 1326, |
| 1340 | CMPPDrmi = 1327, |
| 1341 | CMPPDrri = 1328, |
| 1342 | CMPPSrmi = 1329, |
| 1343 | CMPPSrri = 1330, |
| 1344 | CMPSB = 1331, |
| 1345 | CMPSDrmi = 1332, |
| 1346 | CMPSDrmi_Int = 1333, |
| 1347 | CMPSDrri = 1334, |
| 1348 | CMPSDrri_Int = 1335, |
| 1349 | CMPSL = 1336, |
| 1350 | CMPSQ = 1337, |
| 1351 | CMPSSrmi = 1338, |
| 1352 | CMPSSrmi_Int = 1339, |
| 1353 | CMPSSrri = 1340, |
| 1354 | CMPSSrri_Int = 1341, |
| 1355 | CMPSW = 1342, |
| 1356 | CMPXCHG16B = 1343, |
| 1357 | CMPXCHG16rm = 1344, |
| 1358 | CMPXCHG16rr = 1345, |
| 1359 | CMPXCHG32rm = 1346, |
| 1360 | CMPXCHG32rr = 1347, |
| 1361 | CMPXCHG64rm = 1348, |
| 1362 | CMPXCHG64rr = 1349, |
| 1363 | CMPXCHG8B = 1350, |
| 1364 | CMPXCHG8rm = 1351, |
| 1365 | CMPXCHG8rr = 1352, |
| 1366 | COMISDrm = 1353, |
| 1367 | COMISDrm_Int = 1354, |
| 1368 | COMISDrr = 1355, |
| 1369 | COMISDrr_Int = 1356, |
| 1370 | COMISSrm = 1357, |
| 1371 | COMISSrm_Int = 1358, |
| 1372 | COMISSrr = 1359, |
| 1373 | COMISSrr_Int = 1360, |
| 1374 | COMP_FST0r = 1361, |
| 1375 | COM_FIPr = 1362, |
| 1376 | COM_FIr = 1363, |
| 1377 | COM_FST0r = 1364, |
| 1378 | COM_FpIr32 = 1365, |
| 1379 | COM_FpIr64 = 1366, |
| 1380 | COM_FpIr80 = 1367, |
| 1381 | COM_Fpr32 = 1368, |
| 1382 | COM_Fpr64 = 1369, |
| 1383 | COM_Fpr80 = 1370, |
| 1384 | CPUID = 1371, |
| 1385 | CQO = 1372, |
| 1386 | CRC32r32m16 = 1373, |
| 1387 | CRC32r32m16_EVEX = 1374, |
| 1388 | CRC32r32m32 = 1375, |
| 1389 | CRC32r32m32_EVEX = 1376, |
| 1390 | CRC32r32m8 = 1377, |
| 1391 | CRC32r32m8_EVEX = 1378, |
| 1392 | CRC32r32r16 = 1379, |
| 1393 | CRC32r32r16_EVEX = 1380, |
| 1394 | CRC32r32r32 = 1381, |
| 1395 | CRC32r32r32_EVEX = 1382, |
| 1396 | CRC32r32r8 = 1383, |
| 1397 | CRC32r32r8_EVEX = 1384, |
| 1398 | CRC32r64m64 = 1385, |
| 1399 | CRC32r64m64_EVEX = 1386, |
| 1400 | CRC32r64m8 = 1387, |
| 1401 | CRC32r64m8_EVEX = 1388, |
| 1402 | CRC32r64r64 = 1389, |
| 1403 | CRC32r64r64_EVEX = 1390, |
| 1404 | CRC32r64r8 = 1391, |
| 1405 | CRC32r64r8_EVEX = 1392, |
| 1406 | CS_PREFIX = 1393, |
| 1407 | CTEST16mi = 1394, |
| 1408 | CTEST16mr = 1395, |
| 1409 | CTEST16ri = 1396, |
| 1410 | CTEST16rr = 1397, |
| 1411 | CTEST32mi = 1398, |
| 1412 | CTEST32mr = 1399, |
| 1413 | CTEST32ri = 1400, |
| 1414 | CTEST32rr = 1401, |
| 1415 | CTEST64mi32 = 1402, |
| 1416 | CTEST64mr = 1403, |
| 1417 | CTEST64ri32 = 1404, |
| 1418 | CTEST64rr = 1405, |
| 1419 | CTEST8mi = 1406, |
| 1420 | CTEST8mr = 1407, |
| 1421 | CTEST8ri = 1408, |
| 1422 | CTEST8rr = 1409, |
| 1423 | CVTDQ2PDrm = 1410, |
| 1424 | CVTDQ2PDrr = 1411, |
| 1425 | CVTDQ2PSrm = 1412, |
| 1426 | CVTDQ2PSrr = 1413, |
| 1427 | CVTPD2DQrm = 1414, |
| 1428 | CVTPD2DQrr = 1415, |
| 1429 | CVTPD2PSrm = 1416, |
| 1430 | CVTPD2PSrr = 1417, |
| 1431 | CVTPS2DQrm = 1418, |
| 1432 | CVTPS2DQrr = 1419, |
| 1433 | CVTPS2PDrm = 1420, |
| 1434 | CVTPS2PDrr = 1421, |
| 1435 | CVTSD2SI64rm = 1422, |
| 1436 | CVTSD2SI64rm_Int = 1423, |
| 1437 | CVTSD2SI64rr = 1424, |
| 1438 | CVTSD2SI64rr_Int = 1425, |
| 1439 | CVTSD2SIrm = 1426, |
| 1440 | CVTSD2SIrm_Int = 1427, |
| 1441 | CVTSD2SIrr = 1428, |
| 1442 | CVTSD2SIrr_Int = 1429, |
| 1443 | CVTSD2SSrm = 1430, |
| 1444 | CVTSD2SSrm_Int = 1431, |
| 1445 | CVTSD2SSrr = 1432, |
| 1446 | CVTSD2SSrr_Int = 1433, |
| 1447 | CVTSI2SDrm = 1434, |
| 1448 | CVTSI2SDrm_Int = 1435, |
| 1449 | CVTSI2SDrr = 1436, |
| 1450 | CVTSI2SDrr_Int = 1437, |
| 1451 | CVTSI2SSrm = 1438, |
| 1452 | CVTSI2SSrm_Int = 1439, |
| 1453 | CVTSI2SSrr = 1440, |
| 1454 | CVTSI2SSrr_Int = 1441, |
| 1455 | CVTSI642SDrm = 1442, |
| 1456 | CVTSI642SDrm_Int = 1443, |
| 1457 | CVTSI642SDrr = 1444, |
| 1458 | CVTSI642SDrr_Int = 1445, |
| 1459 | CVTSI642SSrm = 1446, |
| 1460 | CVTSI642SSrm_Int = 1447, |
| 1461 | CVTSI642SSrr = 1448, |
| 1462 | CVTSI642SSrr_Int = 1449, |
| 1463 | CVTSS2SDrm = 1450, |
| 1464 | CVTSS2SDrm_Int = 1451, |
| 1465 | CVTSS2SDrr = 1452, |
| 1466 | CVTSS2SDrr_Int = 1453, |
| 1467 | CVTSS2SI64rm = 1454, |
| 1468 | CVTSS2SI64rm_Int = 1455, |
| 1469 | CVTSS2SI64rr = 1456, |
| 1470 | CVTSS2SI64rr_Int = 1457, |
| 1471 | CVTSS2SIrm = 1458, |
| 1472 | CVTSS2SIrm_Int = 1459, |
| 1473 | CVTSS2SIrr = 1460, |
| 1474 | CVTSS2SIrr_Int = 1461, |
| 1475 | CVTTPD2DQrm = 1462, |
| 1476 | CVTTPD2DQrr = 1463, |
| 1477 | CVTTPS2DQrm = 1464, |
| 1478 | CVTTPS2DQrr = 1465, |
| 1479 | CVTTSD2SI64rm = 1466, |
| 1480 | CVTTSD2SI64rm_Int = 1467, |
| 1481 | CVTTSD2SI64rr = 1468, |
| 1482 | CVTTSD2SI64rr_Int = 1469, |
| 1483 | CVTTSD2SIrm = 1470, |
| 1484 | CVTTSD2SIrm_Int = 1471, |
| 1485 | CVTTSD2SIrr = 1472, |
| 1486 | CVTTSD2SIrr_Int = 1473, |
| 1487 | CVTTSS2SI64rm = 1474, |
| 1488 | CVTTSS2SI64rm_Int = 1475, |
| 1489 | CVTTSS2SI64rr = 1476, |
| 1490 | CVTTSS2SI64rr_Int = 1477, |
| 1491 | CVTTSS2SIrm = 1478, |
| 1492 | CVTTSS2SIrm_Int = 1479, |
| 1493 | CVTTSS2SIrr = 1480, |
| 1494 | CVTTSS2SIrr_Int = 1481, |
| 1495 | CWD = 1482, |
| 1496 | CWDE = 1483, |
| 1497 | DAA = 1484, |
| 1498 | DAS = 1485, |
| 1499 | DATA16_PREFIX = 1486, |
| 1500 | DEC16m = 1487, |
| 1501 | DEC16m_EVEX = 1488, |
| 1502 | DEC16m_ND = 1489, |
| 1503 | DEC16m_NF = 1490, |
| 1504 | DEC16m_NF_ND = 1491, |
| 1505 | DEC16r = 1492, |
| 1506 | DEC16r_EVEX = 1493, |
| 1507 | DEC16r_ND = 1494, |
| 1508 | DEC16r_NF = 1495, |
| 1509 | DEC16r_NF_ND = 1496, |
| 1510 | DEC16r_alt = 1497, |
| 1511 | DEC32m = 1498, |
| 1512 | DEC32m_EVEX = 1499, |
| 1513 | DEC32m_ND = 1500, |
| 1514 | DEC32m_NF = 1501, |
| 1515 | DEC32m_NF_ND = 1502, |
| 1516 | DEC32r = 1503, |
| 1517 | DEC32r_EVEX = 1504, |
| 1518 | DEC32r_ND = 1505, |
| 1519 | DEC32r_NF = 1506, |
| 1520 | DEC32r_NF_ND = 1507, |
| 1521 | DEC32r_alt = 1508, |
| 1522 | DEC64m = 1509, |
| 1523 | DEC64m_EVEX = 1510, |
| 1524 | DEC64m_ND = 1511, |
| 1525 | DEC64m_NF = 1512, |
| 1526 | DEC64m_NF_ND = 1513, |
| 1527 | DEC64r = 1514, |
| 1528 | DEC64r_EVEX = 1515, |
| 1529 | DEC64r_ND = 1516, |
| 1530 | DEC64r_NF = 1517, |
| 1531 | DEC64r_NF_ND = 1518, |
| 1532 | DEC8m = 1519, |
| 1533 | DEC8m_EVEX = 1520, |
| 1534 | DEC8m_ND = 1521, |
| 1535 | DEC8m_NF = 1522, |
| 1536 | DEC8m_NF_ND = 1523, |
| 1537 | DEC8r = 1524, |
| 1538 | DEC8r_EVEX = 1525, |
| 1539 | DEC8r_ND = 1526, |
| 1540 | DEC8r_NF = 1527, |
| 1541 | DEC8r_NF_ND = 1528, |
| 1542 | DIV16m = 1529, |
| 1543 | DIV16m_EVEX = 1530, |
| 1544 | DIV16m_NF = 1531, |
| 1545 | DIV16r = 1532, |
| 1546 | DIV16r_EVEX = 1533, |
| 1547 | DIV16r_NF = 1534, |
| 1548 | DIV32m = 1535, |
| 1549 | DIV32m_EVEX = 1536, |
| 1550 | DIV32m_NF = 1537, |
| 1551 | DIV32r = 1538, |
| 1552 | DIV32r_EVEX = 1539, |
| 1553 | DIV32r_NF = 1540, |
| 1554 | DIV64m = 1541, |
| 1555 | DIV64m_EVEX = 1542, |
| 1556 | DIV64m_NF = 1543, |
| 1557 | DIV64r = 1544, |
| 1558 | DIV64r_EVEX = 1545, |
| 1559 | DIV64r_NF = 1546, |
| 1560 | DIV8m = 1547, |
| 1561 | DIV8m_EVEX = 1548, |
| 1562 | DIV8m_NF = 1549, |
| 1563 | DIV8r = 1550, |
| 1564 | DIV8r_EVEX = 1551, |
| 1565 | DIV8r_NF = 1552, |
| 1566 | DIVPDrm = 1553, |
| 1567 | DIVPDrr = 1554, |
| 1568 | DIVPSrm = 1555, |
| 1569 | DIVPSrr = 1556, |
| 1570 | DIVR_F32m = 1557, |
| 1571 | DIVR_F64m = 1558, |
| 1572 | DIVR_FI16m = 1559, |
| 1573 | DIVR_FI32m = 1560, |
| 1574 | DIVR_FPrST0 = 1561, |
| 1575 | DIVR_FST0r = 1562, |
| 1576 | DIVR_Fp32m = 1563, |
| 1577 | DIVR_Fp64m = 1564, |
| 1578 | DIVR_Fp64m32 = 1565, |
| 1579 | DIVR_Fp80m32 = 1566, |
| 1580 | DIVR_Fp80m64 = 1567, |
| 1581 | DIVR_FpI16m32 = 1568, |
| 1582 | DIVR_FpI16m64 = 1569, |
| 1583 | DIVR_FpI16m80 = 1570, |
| 1584 | DIVR_FpI32m32 = 1571, |
| 1585 | DIVR_FpI32m64 = 1572, |
| 1586 | DIVR_FpI32m80 = 1573, |
| 1587 | DIVR_FrST0 = 1574, |
| 1588 | DIVSDrm = 1575, |
| 1589 | DIVSDrm_Int = 1576, |
| 1590 | DIVSDrr = 1577, |
| 1591 | DIVSDrr_Int = 1578, |
| 1592 | DIVSSrm = 1579, |
| 1593 | DIVSSrm_Int = 1580, |
| 1594 | DIVSSrr = 1581, |
| 1595 | DIVSSrr_Int = 1582, |
| 1596 | DIV_F32m = 1583, |
| 1597 | DIV_F64m = 1584, |
| 1598 | DIV_FI16m = 1585, |
| 1599 | DIV_FI32m = 1586, |
| 1600 | DIV_FPrST0 = 1587, |
| 1601 | DIV_FST0r = 1588, |
| 1602 | DIV_Fp32 = 1589, |
| 1603 | DIV_Fp32m = 1590, |
| 1604 | DIV_Fp64 = 1591, |
| 1605 | DIV_Fp64m = 1592, |
| 1606 | DIV_Fp64m32 = 1593, |
| 1607 | DIV_Fp80 = 1594, |
| 1608 | DIV_Fp80m32 = 1595, |
| 1609 | DIV_Fp80m64 = 1596, |
| 1610 | DIV_FpI16m32 = 1597, |
| 1611 | DIV_FpI16m64 = 1598, |
| 1612 | DIV_FpI16m80 = 1599, |
| 1613 | DIV_FpI32m32 = 1600, |
| 1614 | DIV_FpI32m64 = 1601, |
| 1615 | DIV_FpI32m80 = 1602, |
| 1616 | DIV_FrST0 = 1603, |
| 1617 | DPPDrmi = 1604, |
| 1618 | DPPDrri = 1605, |
| 1619 | DPPSrmi = 1606, |
| 1620 | DPPSrri = 1607, |
| 1621 | DS_PREFIX = 1608, |
| 1622 | DYN_ALLOCA_32 = 1609, |
| 1623 | DYN_ALLOCA_64 = 1610, |
| 1624 | EH_RETURN = 1611, |
| 1625 | EH_RETURN64 = 1612, |
| 1626 | EH_SjLj_LongJmp32 = 1613, |
| 1627 | EH_SjLj_LongJmp64 = 1614, |
| 1628 | EH_SjLj_SetJmp32 = 1615, |
| 1629 | EH_SjLj_SetJmp64 = 1616, |
| 1630 | EH_SjLj_Setup = 1617, |
| 1631 | ENCLS = 1618, |
| 1632 | ENCLU = 1619, |
| 1633 | ENCLV = 1620, |
| 1634 | ENCODEKEY128 = 1621, |
| 1635 | ENCODEKEY256 = 1622, |
| 1636 | ENDBR32 = 1623, |
| 1637 | ENDBR64 = 1624, |
| 1638 | ENQCMD16 = 1625, |
| 1639 | ENQCMD32 = 1626, |
| 1640 | ENQCMD32_EVEX = 1627, |
| 1641 | ENQCMD64 = 1628, |
| 1642 | ENQCMD64_EVEX = 1629, |
| 1643 | ENQCMDS16 = 1630, |
| 1644 | ENQCMDS32 = 1631, |
| 1645 | ENQCMDS32_EVEX = 1632, |
| 1646 | ENQCMDS64 = 1633, |
| 1647 | ENQCMDS64_EVEX = 1634, |
| 1648 | ENTER = 1635, |
| 1649 | ERETS = 1636, |
| 1650 | ERETU = 1637, |
| 1651 | ES_PREFIX = 1638, |
| 1652 | EXTRACTPSmri = 1639, |
| 1653 | EXTRACTPSrri = 1640, |
| 1654 | EXTRQ = 1641, |
| 1655 | EXTRQI = 1642, |
| 1656 | F2XM1 = 1643, |
| 1657 | FARCALL16i = 1644, |
| 1658 | FARCALL16m = 1645, |
| 1659 | FARCALL32i = 1646, |
| 1660 | FARCALL32m = 1647, |
| 1661 | FARCALL64m = 1648, |
| 1662 | FARJMP16i = 1649, |
| 1663 | FARJMP16m = 1650, |
| 1664 | FARJMP32i = 1651, |
| 1665 | FARJMP32m = 1652, |
| 1666 | FARJMP64m = 1653, |
| 1667 | FBLDm = 1654, |
| 1668 | FBSTPm = 1655, |
| 1669 | FCOM32m = 1656, |
| 1670 | FCOM64m = 1657, |
| 1671 | FCOMP32m = 1658, |
| 1672 | FCOMP64m = 1659, |
| 1673 | FCOMPP = 1660, |
| 1674 | FCOS = 1661, |
| 1675 | FDECSTP = 1662, |
| 1676 | FEMMS = 1663, |
| 1677 | FFREE = 1664, |
| 1678 | FFREEP = 1665, |
| 1679 | FICOM16m = 1666, |
| 1680 | FICOM32m = 1667, |
| 1681 | FICOMP16m = 1668, |
| 1682 | FICOMP32m = 1669, |
| 1683 | FINCSTP = 1670, |
| 1684 | FLDCW16m = 1671, |
| 1685 | FLDENVm = 1672, |
| 1686 | FLDL2E = 1673, |
| 1687 | FLDL2T = 1674, |
| 1688 | FLDLG2 = 1675, |
| 1689 | FLDLN2 = 1676, |
| 1690 | FLDPI = 1677, |
| 1691 | FNCLEX = 1678, |
| 1692 | FNINIT = 1679, |
| 1693 | FNOP = 1680, |
| 1694 | FNSTCW16m = 1681, |
| 1695 | FNSTSW16r = 1682, |
| 1696 | FNSTSWm = 1683, |
| 1697 | FP32_TO_INT16_IN_MEM = 1684, |
| 1698 | FP32_TO_INT32_IN_MEM = 1685, |
| 1699 | FP32_TO_INT64_IN_MEM = 1686, |
| 1700 | FP64_TO_INT16_IN_MEM = 1687, |
| 1701 | FP64_TO_INT32_IN_MEM = 1688, |
| 1702 | FP64_TO_INT64_IN_MEM = 1689, |
| 1703 | FP80_ADDm32 = 1690, |
| 1704 | FP80_ADDr = 1691, |
| 1705 | FP80_TO_INT16_IN_MEM = 1692, |
| 1706 | FP80_TO_INT32_IN_MEM = 1693, |
| 1707 | FP80_TO_INT64_IN_MEM = 1694, |
| 1708 | FPATAN = 1695, |
| 1709 | FPREM = 1696, |
| 1710 | FPREM1 = 1697, |
| 1711 | FPTAN = 1698, |
| 1712 | FRNDINT = 1699, |
| 1713 | FRSTORm = 1700, |
| 1714 | FSAVEm = 1701, |
| 1715 | FSCALE = 1702, |
| 1716 | FSIN = 1703, |
| 1717 | FSINCOS = 1704, |
| 1718 | FSTENVm = 1705, |
| 1719 | FS_PREFIX = 1706, |
| 1720 | FXRSTOR = 1707, |
| 1721 | FXRSTOR64 = 1708, |
| 1722 | FXSAVE = 1709, |
| 1723 | FXSAVE64 = 1710, |
| 1724 | FXTRACT = 1711, |
| 1725 | FYL2X = 1712, |
| 1726 | FYL2XP1 = 1713, |
| 1727 | GETSEC = 1714, |
| 1728 | GF2P8AFFINEINVQBrmi = 1715, |
| 1729 | GF2P8AFFINEINVQBrri = 1716, |
| 1730 | GF2P8AFFINEQBrmi = 1717, |
| 1731 | GF2P8AFFINEQBrri = 1718, |
| 1732 | GF2P8MULBrm = 1719, |
| 1733 | GF2P8MULBrr = 1720, |
| 1734 | GS_PREFIX = 1721, |
| 1735 | HADDPDrm = 1722, |
| 1736 | HADDPDrr = 1723, |
| 1737 | HADDPSrm = 1724, |
| 1738 | HADDPSrr = 1725, |
| 1739 | HLT = 1726, |
| 1740 | HRESET = 1727, |
| 1741 | HSUBPDrm = 1728, |
| 1742 | HSUBPDrr = 1729, |
| 1743 | HSUBPSrm = 1730, |
| 1744 | HSUBPSrr = 1731, |
| 1745 | IDIV16m = 1732, |
| 1746 | IDIV16m_EVEX = 1733, |
| 1747 | IDIV16m_NF = 1734, |
| 1748 | IDIV16r = 1735, |
| 1749 | IDIV16r_EVEX = 1736, |
| 1750 | IDIV16r_NF = 1737, |
| 1751 | IDIV32m = 1738, |
| 1752 | IDIV32m_EVEX = 1739, |
| 1753 | IDIV32m_NF = 1740, |
| 1754 | IDIV32r = 1741, |
| 1755 | IDIV32r_EVEX = 1742, |
| 1756 | IDIV32r_NF = 1743, |
| 1757 | IDIV64m = 1744, |
| 1758 | IDIV64m_EVEX = 1745, |
| 1759 | IDIV64m_NF = 1746, |
| 1760 | IDIV64r = 1747, |
| 1761 | IDIV64r_EVEX = 1748, |
| 1762 | IDIV64r_NF = 1749, |
| 1763 | IDIV8m = 1750, |
| 1764 | IDIV8m_EVEX = 1751, |
| 1765 | IDIV8m_NF = 1752, |
| 1766 | IDIV8r = 1753, |
| 1767 | IDIV8r_EVEX = 1754, |
| 1768 | IDIV8r_NF = 1755, |
| 1769 | ILD_F16m = 1756, |
| 1770 | ILD_F32m = 1757, |
| 1771 | ILD_F64m = 1758, |
| 1772 | ILD_Fp16m32 = 1759, |
| 1773 | ILD_Fp16m64 = 1760, |
| 1774 | ILD_Fp16m80 = 1761, |
| 1775 | ILD_Fp32m32 = 1762, |
| 1776 | ILD_Fp32m64 = 1763, |
| 1777 | ILD_Fp32m80 = 1764, |
| 1778 | ILD_Fp64m32 = 1765, |
| 1779 | ILD_Fp64m64 = 1766, |
| 1780 | ILD_Fp64m80 = 1767, |
| 1781 | IMUL16m = 1768, |
| 1782 | IMUL16m_EVEX = 1769, |
| 1783 | IMUL16m_NF = 1770, |
| 1784 | IMUL16r = 1771, |
| 1785 | IMUL16r_EVEX = 1772, |
| 1786 | IMUL16r_NF = 1773, |
| 1787 | IMUL16rm = 1774, |
| 1788 | IMUL16rm_EVEX = 1775, |
| 1789 | IMUL16rm_ND = 1776, |
| 1790 | IMUL16rm_NF = 1777, |
| 1791 | IMUL16rm_NF_ND = 1778, |
| 1792 | IMUL16rmi = 1779, |
| 1793 | IMUL16rmi8 = 1780, |
| 1794 | IMUL16rmi8_EVEX = 1781, |
| 1795 | IMUL16rmi8_NF = 1782, |
| 1796 | IMUL16rmi_EVEX = 1783, |
| 1797 | IMUL16rmi_NF = 1784, |
| 1798 | IMUL16rr = 1785, |
| 1799 | IMUL16rr_EVEX = 1786, |
| 1800 | IMUL16rr_ND = 1787, |
| 1801 | IMUL16rr_NF = 1788, |
| 1802 | IMUL16rr_NF_ND = 1789, |
| 1803 | IMUL16rri = 1790, |
| 1804 | IMUL16rri8 = 1791, |
| 1805 | IMUL16rri8_EVEX = 1792, |
| 1806 | IMUL16rri8_NF = 1793, |
| 1807 | IMUL16rri_EVEX = 1794, |
| 1808 | IMUL16rri_NF = 1795, |
| 1809 | IMUL32m = 1796, |
| 1810 | IMUL32m_EVEX = 1797, |
| 1811 | IMUL32m_NF = 1798, |
| 1812 | IMUL32r = 1799, |
| 1813 | IMUL32r_EVEX = 1800, |
| 1814 | IMUL32r_NF = 1801, |
| 1815 | IMUL32rm = 1802, |
| 1816 | IMUL32rm_EVEX = 1803, |
| 1817 | IMUL32rm_ND = 1804, |
| 1818 | IMUL32rm_NF = 1805, |
| 1819 | IMUL32rm_NF_ND = 1806, |
| 1820 | IMUL32rmi = 1807, |
| 1821 | IMUL32rmi8 = 1808, |
| 1822 | IMUL32rmi8_EVEX = 1809, |
| 1823 | IMUL32rmi8_NF = 1810, |
| 1824 | IMUL32rmi_EVEX = 1811, |
| 1825 | IMUL32rmi_NF = 1812, |
| 1826 | IMUL32rr = 1813, |
| 1827 | IMUL32rr_EVEX = 1814, |
| 1828 | IMUL32rr_ND = 1815, |
| 1829 | IMUL32rr_NF = 1816, |
| 1830 | IMUL32rr_NF_ND = 1817, |
| 1831 | IMUL32rri = 1818, |
| 1832 | IMUL32rri8 = 1819, |
| 1833 | IMUL32rri8_EVEX = 1820, |
| 1834 | IMUL32rri8_NF = 1821, |
| 1835 | IMUL32rri_EVEX = 1822, |
| 1836 | IMUL32rri_NF = 1823, |
| 1837 | IMUL64m = 1824, |
| 1838 | IMUL64m_EVEX = 1825, |
| 1839 | IMUL64m_NF = 1826, |
| 1840 | IMUL64r = 1827, |
| 1841 | IMUL64r_EVEX = 1828, |
| 1842 | IMUL64r_NF = 1829, |
| 1843 | IMUL64rm = 1830, |
| 1844 | IMUL64rm_EVEX = 1831, |
| 1845 | IMUL64rm_ND = 1832, |
| 1846 | IMUL64rm_NF = 1833, |
| 1847 | IMUL64rm_NF_ND = 1834, |
| 1848 | IMUL64rmi32 = 1835, |
| 1849 | IMUL64rmi32_EVEX = 1836, |
| 1850 | IMUL64rmi32_NF = 1837, |
| 1851 | IMUL64rmi8 = 1838, |
| 1852 | IMUL64rmi8_EVEX = 1839, |
| 1853 | IMUL64rmi8_NF = 1840, |
| 1854 | IMUL64rr = 1841, |
| 1855 | IMUL64rr_EVEX = 1842, |
| 1856 | IMUL64rr_ND = 1843, |
| 1857 | IMUL64rr_NF = 1844, |
| 1858 | IMUL64rr_NF_ND = 1845, |
| 1859 | IMUL64rri32 = 1846, |
| 1860 | IMUL64rri32_EVEX = 1847, |
| 1861 | IMUL64rri32_NF = 1848, |
| 1862 | IMUL64rri8 = 1849, |
| 1863 | IMUL64rri8_EVEX = 1850, |
| 1864 | IMUL64rri8_NF = 1851, |
| 1865 | IMUL8m = 1852, |
| 1866 | IMUL8m_EVEX = 1853, |
| 1867 | IMUL8m_NF = 1854, |
| 1868 | IMUL8r = 1855, |
| 1869 | IMUL8r_EVEX = 1856, |
| 1870 | IMUL8r_NF = 1857, |
| 1871 | IMULZU16rmi = 1858, |
| 1872 | IMULZU16rmi8 = 1859, |
| 1873 | IMULZU16rri = 1860, |
| 1874 | IMULZU16rri8 = 1861, |
| 1875 | IMULZU32rmi = 1862, |
| 1876 | IMULZU32rmi8 = 1863, |
| 1877 | IMULZU32rri = 1864, |
| 1878 | IMULZU32rri8 = 1865, |
| 1879 | IMULZU64rmi32 = 1866, |
| 1880 | IMULZU64rmi8 = 1867, |
| 1881 | IMULZU64rri32 = 1868, |
| 1882 | IMULZU64rri8 = 1869, |
| 1883 | IN16ri = 1870, |
| 1884 | IN16rr = 1871, |
| 1885 | IN32ri = 1872, |
| 1886 | IN32rr = 1873, |
| 1887 | IN8ri = 1874, |
| 1888 | IN8rr = 1875, |
| 1889 | INC16m = 1876, |
| 1890 | INC16m_EVEX = 1877, |
| 1891 | INC16m_ND = 1878, |
| 1892 | INC16m_NF = 1879, |
| 1893 | INC16m_NF_ND = 1880, |
| 1894 | INC16r = 1881, |
| 1895 | INC16r_EVEX = 1882, |
| 1896 | INC16r_ND = 1883, |
| 1897 | INC16r_NF = 1884, |
| 1898 | INC16r_NF_ND = 1885, |
| 1899 | INC16r_alt = 1886, |
| 1900 | INC32m = 1887, |
| 1901 | INC32m_EVEX = 1888, |
| 1902 | INC32m_ND = 1889, |
| 1903 | INC32m_NF = 1890, |
| 1904 | INC32m_NF_ND = 1891, |
| 1905 | INC32r = 1892, |
| 1906 | INC32r_EVEX = 1893, |
| 1907 | INC32r_ND = 1894, |
| 1908 | INC32r_NF = 1895, |
| 1909 | INC32r_NF_ND = 1896, |
| 1910 | INC32r_alt = 1897, |
| 1911 | INC64m = 1898, |
| 1912 | INC64m_EVEX = 1899, |
| 1913 | INC64m_ND = 1900, |
| 1914 | INC64m_NF = 1901, |
| 1915 | INC64m_NF_ND = 1902, |
| 1916 | INC64r = 1903, |
| 1917 | INC64r_EVEX = 1904, |
| 1918 | INC64r_ND = 1905, |
| 1919 | INC64r_NF = 1906, |
| 1920 | INC64r_NF_ND = 1907, |
| 1921 | INC8m = 1908, |
| 1922 | INC8m_EVEX = 1909, |
| 1923 | INC8m_ND = 1910, |
| 1924 | INC8m_NF = 1911, |
| 1925 | INC8m_NF_ND = 1912, |
| 1926 | INC8r = 1913, |
| 1927 | INC8r_EVEX = 1914, |
| 1928 | INC8r_ND = 1915, |
| 1929 | INC8r_NF = 1916, |
| 1930 | INC8r_NF_ND = 1917, |
| 1931 | INCSSPD = 1918, |
| 1932 | INCSSPQ = 1919, |
| 1933 | INSB = 1920, |
| 1934 | INSERTPSrmi = 1921, |
| 1935 | INSERTPSrri = 1922, |
| 1936 | INSERTQ = 1923, |
| 1937 | INSERTQI = 1924, |
| 1938 | INSL = 1925, |
| 1939 | INSW = 1926, |
| 1940 | INT = 1927, |
| 1941 | INT3 = 1928, |
| 1942 | INTO = 1929, |
| 1943 | INVD = 1930, |
| 1944 | INVEPT32 = 1931, |
| 1945 | INVEPT64 = 1932, |
| 1946 | INVEPT64_EVEX = 1933, |
| 1947 | INVLPG = 1934, |
| 1948 | INVLPGA32 = 1935, |
| 1949 | INVLPGA64 = 1936, |
| 1950 | INVLPGB32 = 1937, |
| 1951 | INVLPGB64 = 1938, |
| 1952 | INVPCID32 = 1939, |
| 1953 | INVPCID64 = 1940, |
| 1954 | INVPCID64_EVEX = 1941, |
| 1955 | INVVPID32 = 1942, |
| 1956 | INVVPID64 = 1943, |
| 1957 | INVVPID64_EVEX = 1944, |
| 1958 | IRET = 1945, |
| 1959 | IRET16 = 1946, |
| 1960 | IRET32 = 1947, |
| 1961 | IRET64 = 1948, |
| 1962 | ISTT_FP16m = 1949, |
| 1963 | ISTT_FP32m = 1950, |
| 1964 | ISTT_FP64m = 1951, |
| 1965 | ISTT_Fp16m32 = 1952, |
| 1966 | ISTT_Fp16m64 = 1953, |
| 1967 | ISTT_Fp16m80 = 1954, |
| 1968 | ISTT_Fp32m32 = 1955, |
| 1969 | ISTT_Fp32m64 = 1956, |
| 1970 | ISTT_Fp32m80 = 1957, |
| 1971 | ISTT_Fp64m32 = 1958, |
| 1972 | ISTT_Fp64m64 = 1959, |
| 1973 | ISTT_Fp64m80 = 1960, |
| 1974 | IST_F16m = 1961, |
| 1975 | IST_F32m = 1962, |
| 1976 | IST_FP16m = 1963, |
| 1977 | IST_FP32m = 1964, |
| 1978 | IST_FP64m = 1965, |
| 1979 | IST_Fp16m32 = 1966, |
| 1980 | IST_Fp16m64 = 1967, |
| 1981 | IST_Fp16m80 = 1968, |
| 1982 | IST_Fp32m32 = 1969, |
| 1983 | IST_Fp32m64 = 1970, |
| 1984 | IST_Fp32m80 = 1971, |
| 1985 | IST_Fp64m32 = 1972, |
| 1986 | IST_Fp64m64 = 1973, |
| 1987 | IST_Fp64m80 = 1974, |
| 1988 | Int_eh_sjlj_setup_dispatch = 1975, |
| 1989 | JCC_1 = 1976, |
| 1990 | JCC_2 = 1977, |
| 1991 | JCC_4 = 1978, |
| 1992 | JCXZ = 1979, |
| 1993 | JECXZ = 1980, |
| 1994 | JMP16m = 1981, |
| 1995 | JMP16m_NT = 1982, |
| 1996 | JMP16r = 1983, |
| 1997 | JMP16r_NT = 1984, |
| 1998 | JMP32m = 1985, |
| 1999 | JMP32m_NT = 1986, |
| 2000 | JMP32r = 1987, |
| 2001 | JMP32r_NT = 1988, |
| 2002 | JMP64m = 1989, |
| 2003 | JMP64m_NT = 1990, |
| 2004 | JMP64m_REX = 1991, |
| 2005 | JMP64r = 1992, |
| 2006 | JMP64r_NT = 1993, |
| 2007 | JMP64r_REX = 1994, |
| 2008 | JMPABS64i = 1995, |
| 2009 | JMP_1 = 1996, |
| 2010 | JMP_2 = 1997, |
| 2011 | JMP_4 = 1998, |
| 2012 | JRCXZ = 1999, |
| 2013 | KADDBkk = 2000, |
| 2014 | KADDDkk = 2001, |
| 2015 | KADDQkk = 2002, |
| 2016 | KADDWkk = 2003, |
| 2017 | KANDBkk = 2004, |
| 2018 | KANDDkk = 2005, |
| 2019 | KANDNBkk = 2006, |
| 2020 | KANDNDkk = 2007, |
| 2021 | KANDNQkk = 2008, |
| 2022 | KANDNWkk = 2009, |
| 2023 | KANDQkk = 2010, |
| 2024 | KANDWkk = 2011, |
| 2025 | KCFI_CHECK = 2012, |
| 2026 | KMOVBkk = 2013, |
| 2027 | KMOVBkk_EVEX = 2014, |
| 2028 | KMOVBkm = 2015, |
| 2029 | KMOVBkm_EVEX = 2016, |
| 2030 | KMOVBkr = 2017, |
| 2031 | KMOVBkr_EVEX = 2018, |
| 2032 | KMOVBmk = 2019, |
| 2033 | KMOVBmk_EVEX = 2020, |
| 2034 | KMOVBrk = 2021, |
| 2035 | KMOVBrk_EVEX = 2022, |
| 2036 | KMOVDkk = 2023, |
| 2037 | KMOVDkk_EVEX = 2024, |
| 2038 | KMOVDkm = 2025, |
| 2039 | KMOVDkm_EVEX = 2026, |
| 2040 | KMOVDkr = 2027, |
| 2041 | KMOVDkr_EVEX = 2028, |
| 2042 | KMOVDmk = 2029, |
| 2043 | KMOVDmk_EVEX = 2030, |
| 2044 | KMOVDrk = 2031, |
| 2045 | KMOVDrk_EVEX = 2032, |
| 2046 | KMOVQkk = 2033, |
| 2047 | KMOVQkk_EVEX = 2034, |
| 2048 | KMOVQkm = 2035, |
| 2049 | KMOVQkm_EVEX = 2036, |
| 2050 | KMOVQkr = 2037, |
| 2051 | KMOVQkr_EVEX = 2038, |
| 2052 | KMOVQmk = 2039, |
| 2053 | KMOVQmk_EVEX = 2040, |
| 2054 | KMOVQrk = 2041, |
| 2055 | KMOVQrk_EVEX = 2042, |
| 2056 | KMOVWkk = 2043, |
| 2057 | KMOVWkk_EVEX = 2044, |
| 2058 | KMOVWkm = 2045, |
| 2059 | KMOVWkm_EVEX = 2046, |
| 2060 | KMOVWkr = 2047, |
| 2061 | KMOVWkr_EVEX = 2048, |
| 2062 | KMOVWmk = 2049, |
| 2063 | KMOVWmk_EVEX = 2050, |
| 2064 | KMOVWrk = 2051, |
| 2065 | KMOVWrk_EVEX = 2052, |
| 2066 | KNOTBkk = 2053, |
| 2067 | KNOTDkk = 2054, |
| 2068 | KNOTQkk = 2055, |
| 2069 | KNOTWkk = 2056, |
| 2070 | KORBkk = 2057, |
| 2071 | KORDkk = 2058, |
| 2072 | KORQkk = 2059, |
| 2073 | KORTESTBkk = 2060, |
| 2074 | KORTESTDkk = 2061, |
| 2075 | KORTESTQkk = 2062, |
| 2076 | KORTESTWkk = 2063, |
| 2077 | KORWkk = 2064, |
| 2078 | KSHIFTLBki = 2065, |
| 2079 | KSHIFTLDki = 2066, |
| 2080 | KSHIFTLQki = 2067, |
| 2081 | KSHIFTLWki = 2068, |
| 2082 | KSHIFTRBki = 2069, |
| 2083 | KSHIFTRDki = 2070, |
| 2084 | KSHIFTRQki = 2071, |
| 2085 | KSHIFTRWki = 2072, |
| 2086 | KTESTBkk = 2073, |
| 2087 | KTESTDkk = 2074, |
| 2088 | KTESTQkk = 2075, |
| 2089 | KTESTWkk = 2076, |
| 2090 | KUNPCKBWkk = 2077, |
| 2091 | KUNPCKDQkk = 2078, |
| 2092 | KUNPCKWDkk = 2079, |
| 2093 | KXNORBkk = 2080, |
| 2094 | KXNORDkk = 2081, |
| 2095 | KXNORQkk = 2082, |
| 2096 | KXNORWkk = 2083, |
| 2097 | KXORBkk = 2084, |
| 2098 | KXORDkk = 2085, |
| 2099 | KXORQkk = 2086, |
| 2100 | KXORWkk = 2087, |
| 2101 | LAHF = 2088, |
| 2102 | LAR16rm = 2089, |
| 2103 | LAR16rr = 2090, |
| 2104 | LAR32rm = 2091, |
| 2105 | LAR32rr = 2092, |
| 2106 | LAR64rm = 2093, |
| 2107 | LAR64rr = 2094, |
| 2108 | LCMPXCHG16 = 2095, |
| 2109 | LCMPXCHG16B = 2096, |
| 2110 | LCMPXCHG32 = 2097, |
| 2111 | LCMPXCHG64 = 2098, |
| 2112 | LCMPXCHG8 = 2099, |
| 2113 | LCMPXCHG8B = 2100, |
| 2114 | LDDQUrm = 2101, |
| 2115 | LDMXCSR = 2102, |
| 2116 | LDS16rm = 2103, |
| 2117 | LDS32rm = 2104, |
| 2118 | LDTILECFG = 2105, |
| 2119 | LDTILECFG_EVEX = 2106, |
| 2120 | LD_F0 = 2107, |
| 2121 | LD_F1 = 2108, |
| 2122 | LD_F32m = 2109, |
| 2123 | LD_F64m = 2110, |
| 2124 | LD_F80m = 2111, |
| 2125 | LD_Fp032 = 2112, |
| 2126 | LD_Fp064 = 2113, |
| 2127 | LD_Fp080 = 2114, |
| 2128 | LD_Fp132 = 2115, |
| 2129 | LD_Fp164 = 2116, |
| 2130 | LD_Fp180 = 2117, |
| 2131 | LD_Fp32m = 2118, |
| 2132 | LD_Fp32m64 = 2119, |
| 2133 | LD_Fp32m80 = 2120, |
| 2134 | LD_Fp64m = 2121, |
| 2135 | LD_Fp64m80 = 2122, |
| 2136 | LD_Fp80m = 2123, |
| 2137 | LD_Frr = 2124, |
| 2138 | LEA16r = 2125, |
| 2139 | LEA32r = 2126, |
| 2140 | LEA64_16r = 2127, |
| 2141 | LEA64_32r = 2128, |
| 2142 | LEA64_8r = 2129, |
| 2143 | LEA64r = 2130, |
| 2144 | LEAVE = 2131, |
| 2145 | LEAVE64 = 2132, |
| 2146 | LES16rm = 2133, |
| 2147 | LES32rm = 2134, |
| 2148 | LFENCE = 2135, |
| 2149 | LFS16rm = 2136, |
| 2150 | LFS32rm = 2137, |
| 2151 | LFS64rm = 2138, |
| 2152 | LGDT16m = 2139, |
| 2153 | LGDT32m = 2140, |
| 2154 | LGDT64m = 2141, |
| 2155 | LGS16rm = 2142, |
| 2156 | LGS32rm = 2143, |
| 2157 | LGS64rm = 2144, |
| 2158 | LIDT16m = 2145, |
| 2159 | LIDT32m = 2146, |
| 2160 | LIDT64m = 2147, |
| 2161 | LKGS16m = 2148, |
| 2162 | LKGS16r = 2149, |
| 2163 | LLDT16m = 2150, |
| 2164 | LLDT16r = 2151, |
| 2165 | LLWPCB = 2152, |
| 2166 | LLWPCB64 = 2153, |
| 2167 | LMSW16m = 2154, |
| 2168 | LMSW16r = 2155, |
| 2169 | LOADIWKEY = 2156, |
| 2170 | LOCK_ADD16mi = 2157, |
| 2171 | LOCK_ADD16mi8 = 2158, |
| 2172 | LOCK_ADD16mr = 2159, |
| 2173 | LOCK_ADD32mi = 2160, |
| 2174 | LOCK_ADD32mi8 = 2161, |
| 2175 | LOCK_ADD32mr = 2162, |
| 2176 | LOCK_ADD64mi32 = 2163, |
| 2177 | LOCK_ADD64mi8 = 2164, |
| 2178 | LOCK_ADD64mr = 2165, |
| 2179 | LOCK_ADD8mi = 2166, |
| 2180 | LOCK_ADD8mr = 2167, |
| 2181 | LOCK_AND16mi = 2168, |
| 2182 | LOCK_AND16mi8 = 2169, |
| 2183 | LOCK_AND16mr = 2170, |
| 2184 | LOCK_AND32mi = 2171, |
| 2185 | LOCK_AND32mi8 = 2172, |
| 2186 | LOCK_AND32mr = 2173, |
| 2187 | LOCK_AND64mi32 = 2174, |
| 2188 | LOCK_AND64mi8 = 2175, |
| 2189 | LOCK_AND64mr = 2176, |
| 2190 | LOCK_AND8mi = 2177, |
| 2191 | LOCK_AND8mr = 2178, |
| 2192 | LOCK_BTC16m = 2179, |
| 2193 | LOCK_BTC32m = 2180, |
| 2194 | LOCK_BTC64m = 2181, |
| 2195 | LOCK_BTC_RM16rm = 2182, |
| 2196 | LOCK_BTC_RM32rm = 2183, |
| 2197 | LOCK_BTC_RM64rm = 2184, |
| 2198 | LOCK_BTR16m = 2185, |
| 2199 | LOCK_BTR32m = 2186, |
| 2200 | LOCK_BTR64m = 2187, |
| 2201 | LOCK_BTR_RM16rm = 2188, |
| 2202 | LOCK_BTR_RM32rm = 2189, |
| 2203 | LOCK_BTR_RM64rm = 2190, |
| 2204 | LOCK_BTS16m = 2191, |
| 2205 | LOCK_BTS32m = 2192, |
| 2206 | LOCK_BTS64m = 2193, |
| 2207 | LOCK_BTS_RM16rm = 2194, |
| 2208 | LOCK_BTS_RM32rm = 2195, |
| 2209 | LOCK_BTS_RM64rm = 2196, |
| 2210 | LOCK_DEC16m = 2197, |
| 2211 | LOCK_DEC32m = 2198, |
| 2212 | LOCK_DEC64m = 2199, |
| 2213 | LOCK_DEC8m = 2200, |
| 2214 | LOCK_INC16m = 2201, |
| 2215 | LOCK_INC32m = 2202, |
| 2216 | LOCK_INC64m = 2203, |
| 2217 | LOCK_INC8m = 2204, |
| 2218 | LOCK_OR16mi = 2205, |
| 2219 | LOCK_OR16mi8 = 2206, |
| 2220 | LOCK_OR16mr = 2207, |
| 2221 | LOCK_OR32mi = 2208, |
| 2222 | LOCK_OR32mi8 = 2209, |
| 2223 | LOCK_OR32mr = 2210, |
| 2224 | LOCK_OR64mi32 = 2211, |
| 2225 | LOCK_OR64mi8 = 2212, |
| 2226 | LOCK_OR64mr = 2213, |
| 2227 | LOCK_OR8mi = 2214, |
| 2228 | LOCK_OR8mr = 2215, |
| 2229 | LOCK_PREFIX = 2216, |
| 2230 | LOCK_SUB16mi = 2217, |
| 2231 | LOCK_SUB16mi8 = 2218, |
| 2232 | LOCK_SUB16mr = 2219, |
| 2233 | LOCK_SUB32mi = 2220, |
| 2234 | LOCK_SUB32mi8 = 2221, |
| 2235 | LOCK_SUB32mr = 2222, |
| 2236 | LOCK_SUB64mi32 = 2223, |
| 2237 | LOCK_SUB64mi8 = 2224, |
| 2238 | LOCK_SUB64mr = 2225, |
| 2239 | LOCK_SUB8mi = 2226, |
| 2240 | LOCK_SUB8mr = 2227, |
| 2241 | LOCK_XOR16mi = 2228, |
| 2242 | LOCK_XOR16mi8 = 2229, |
| 2243 | LOCK_XOR16mr = 2230, |
| 2244 | LOCK_XOR32mi = 2231, |
| 2245 | LOCK_XOR32mi8 = 2232, |
| 2246 | LOCK_XOR32mr = 2233, |
| 2247 | LOCK_XOR64mi32 = 2234, |
| 2248 | LOCK_XOR64mi8 = 2235, |
| 2249 | LOCK_XOR64mr = 2236, |
| 2250 | LOCK_XOR8mi = 2237, |
| 2251 | LOCK_XOR8mr = 2238, |
| 2252 | LODSB = 2239, |
| 2253 | LODSL = 2240, |
| 2254 | LODSQ = 2241, |
| 2255 | LODSW = 2242, |
| 2256 | LOOP = 2243, |
| 2257 | LOOPE = 2244, |
| 2258 | LOOPNE = 2245, |
| 2259 | LRET16 = 2246, |
| 2260 | LRET32 = 2247, |
| 2261 | LRET64 = 2248, |
| 2262 | LRETI16 = 2249, |
| 2263 | LRETI32 = 2250, |
| 2264 | LRETI64 = 2251, |
| 2265 | LSL16rm = 2252, |
| 2266 | LSL16rr = 2253, |
| 2267 | LSL32rm = 2254, |
| 2268 | LSL32rr = 2255, |
| 2269 | LSL64rm = 2256, |
| 2270 | LSL64rr = 2257, |
| 2271 | LSS16rm = 2258, |
| 2272 | LSS32rm = 2259, |
| 2273 | LSS64rm = 2260, |
| 2274 | LTRm = 2261, |
| 2275 | LTRr = 2262, |
| 2276 | LWPINS32rmi = 2263, |
| 2277 | LWPINS32rri = 2264, |
| 2278 | LWPINS64rmi = 2265, |
| 2279 | LWPINS64rri = 2266, |
| 2280 | LWPVAL32rmi = 2267, |
| 2281 | LWPVAL32rri = 2268, |
| 2282 | LWPVAL64rmi = 2269, |
| 2283 | LWPVAL64rri = 2270, |
| 2284 | LXADD16 = 2271, |
| 2285 | LXADD32 = 2272, |
| 2286 | LXADD64 = 2273, |
| 2287 | LXADD8 = 2274, |
| 2288 | LZCNT16rm = 2275, |
| 2289 | LZCNT16rm_EVEX = 2276, |
| 2290 | LZCNT16rm_NF = 2277, |
| 2291 | LZCNT16rr = 2278, |
| 2292 | LZCNT16rr_EVEX = 2279, |
| 2293 | LZCNT16rr_NF = 2280, |
| 2294 | LZCNT32rm = 2281, |
| 2295 | LZCNT32rm_EVEX = 2282, |
| 2296 | LZCNT32rm_NF = 2283, |
| 2297 | LZCNT32rr = 2284, |
| 2298 | LZCNT32rr_EVEX = 2285, |
| 2299 | LZCNT32rr_NF = 2286, |
| 2300 | LZCNT64rm = 2287, |
| 2301 | LZCNT64rm_EVEX = 2288, |
| 2302 | LZCNT64rm_NF = 2289, |
| 2303 | LZCNT64rr = 2290, |
| 2304 | LZCNT64rr_EVEX = 2291, |
| 2305 | LZCNT64rr_NF = 2292, |
| 2306 | MASKMOVDQU = 2293, |
| 2307 | MASKMOVDQU64 = 2294, |
| 2308 | MASKPAIR16LOAD = 2295, |
| 2309 | MASKPAIR16STORE = 2296, |
| 2310 | MAXCPDrm = 2297, |
| 2311 | MAXCPDrr = 2298, |
| 2312 | MAXCPSrm = 2299, |
| 2313 | MAXCPSrr = 2300, |
| 2314 | MAXCSDrm = 2301, |
| 2315 | MAXCSDrr = 2302, |
| 2316 | MAXCSSrm = 2303, |
| 2317 | MAXCSSrr = 2304, |
| 2318 | MAXPDrm = 2305, |
| 2319 | MAXPDrr = 2306, |
| 2320 | MAXPSrm = 2307, |
| 2321 | MAXPSrr = 2308, |
| 2322 | MAXSDrm = 2309, |
| 2323 | MAXSDrm_Int = 2310, |
| 2324 | MAXSDrr = 2311, |
| 2325 | MAXSDrr_Int = 2312, |
| 2326 | MAXSSrm = 2313, |
| 2327 | MAXSSrm_Int = 2314, |
| 2328 | MAXSSrr = 2315, |
| 2329 | MAXSSrr_Int = 2316, |
| 2330 | MFENCE = 2317, |
| 2331 | MINCPDrm = 2318, |
| 2332 | MINCPDrr = 2319, |
| 2333 | MINCPSrm = 2320, |
| 2334 | MINCPSrr = 2321, |
| 2335 | MINCSDrm = 2322, |
| 2336 | MINCSDrr = 2323, |
| 2337 | MINCSSrm = 2324, |
| 2338 | MINCSSrr = 2325, |
| 2339 | MINPDrm = 2326, |
| 2340 | MINPDrr = 2327, |
| 2341 | MINPSrm = 2328, |
| 2342 | MINPSrr = 2329, |
| 2343 | MINSDrm = 2330, |
| 2344 | MINSDrm_Int = 2331, |
| 2345 | MINSDrr = 2332, |
| 2346 | MINSDrr_Int = 2333, |
| 2347 | MINSSrm = 2334, |
| 2348 | MINSSrm_Int = 2335, |
| 2349 | MINSSrr = 2336, |
| 2350 | MINSSrr_Int = 2337, |
| 2351 | MMX_CVTPD2PIrm = 2338, |
| 2352 | MMX_CVTPD2PIrr = 2339, |
| 2353 | MMX_CVTPI2PDrm = 2340, |
| 2354 | MMX_CVTPI2PDrr = 2341, |
| 2355 | MMX_CVTPI2PSrm = 2342, |
| 2356 | MMX_CVTPI2PSrr = 2343, |
| 2357 | MMX_CVTPS2PIrm = 2344, |
| 2358 | MMX_CVTPS2PIrr = 2345, |
| 2359 | MMX_CVTTPD2PIrm = 2346, |
| 2360 | MMX_CVTTPD2PIrr = 2347, |
| 2361 | MMX_CVTTPS2PIrm = 2348, |
| 2362 | MMX_CVTTPS2PIrr = 2349, |
| 2363 | MMX_EMMS = 2350, |
| 2364 | MMX_MASKMOVQ = 2351, |
| 2365 | MMX_MASKMOVQ64 = 2352, |
| 2366 | MMX_MOVD64from64mr = 2353, |
| 2367 | MMX_MOVD64from64rr = 2354, |
| 2368 | MMX_MOVD64grr = 2355, |
| 2369 | MMX_MOVD64mr = 2356, |
| 2370 | MMX_MOVD64rm = 2357, |
| 2371 | MMX_MOVD64rr = 2358, |
| 2372 | MMX_MOVD64to64rm = 2359, |
| 2373 | MMX_MOVD64to64rr = 2360, |
| 2374 | MMX_MOVDQ2Qrr = 2361, |
| 2375 | MMX_MOVFR642Qrr = 2362, |
| 2376 | MMX_MOVNTQmr = 2363, |
| 2377 | MMX_MOVQ2DQrr = 2364, |
| 2378 | MMX_MOVQ2FR64rr = 2365, |
| 2379 | MMX_MOVQ64mr = 2366, |
| 2380 | MMX_MOVQ64rm = 2367, |
| 2381 | MMX_MOVQ64rr = 2368, |
| 2382 | MMX_MOVQ64rr_REV = 2369, |
| 2383 | MMX_PABSBrm = 2370, |
| 2384 | MMX_PABSBrr = 2371, |
| 2385 | MMX_PABSDrm = 2372, |
| 2386 | MMX_PABSDrr = 2373, |
| 2387 | MMX_PABSWrm = 2374, |
| 2388 | MMX_PABSWrr = 2375, |
| 2389 | MMX_PACKSSDWrm = 2376, |
| 2390 | MMX_PACKSSDWrr = 2377, |
| 2391 | MMX_PACKSSWBrm = 2378, |
| 2392 | MMX_PACKSSWBrr = 2379, |
| 2393 | MMX_PACKUSWBrm = 2380, |
| 2394 | MMX_PACKUSWBrr = 2381, |
| 2395 | MMX_PADDBrm = 2382, |
| 2396 | MMX_PADDBrr = 2383, |
| 2397 | MMX_PADDDrm = 2384, |
| 2398 | MMX_PADDDrr = 2385, |
| 2399 | MMX_PADDQrm = 2386, |
| 2400 | MMX_PADDQrr = 2387, |
| 2401 | MMX_PADDSBrm = 2388, |
| 2402 | MMX_PADDSBrr = 2389, |
| 2403 | MMX_PADDSWrm = 2390, |
| 2404 | MMX_PADDSWrr = 2391, |
| 2405 | MMX_PADDUSBrm = 2392, |
| 2406 | MMX_PADDUSBrr = 2393, |
| 2407 | MMX_PADDUSWrm = 2394, |
| 2408 | MMX_PADDUSWrr = 2395, |
| 2409 | MMX_PADDWrm = 2396, |
| 2410 | MMX_PADDWrr = 2397, |
| 2411 | MMX_PALIGNRrmi = 2398, |
| 2412 | MMX_PALIGNRrri = 2399, |
| 2413 | MMX_PANDNrm = 2400, |
| 2414 | MMX_PANDNrr = 2401, |
| 2415 | MMX_PANDrm = 2402, |
| 2416 | MMX_PANDrr = 2403, |
| 2417 | MMX_PAVGBrm = 2404, |
| 2418 | MMX_PAVGBrr = 2405, |
| 2419 | MMX_PAVGWrm = 2406, |
| 2420 | MMX_PAVGWrr = 2407, |
| 2421 | MMX_PCMPEQBrm = 2408, |
| 2422 | MMX_PCMPEQBrr = 2409, |
| 2423 | MMX_PCMPEQDrm = 2410, |
| 2424 | MMX_PCMPEQDrr = 2411, |
| 2425 | MMX_PCMPEQWrm = 2412, |
| 2426 | MMX_PCMPEQWrr = 2413, |
| 2427 | MMX_PCMPGTBrm = 2414, |
| 2428 | MMX_PCMPGTBrr = 2415, |
| 2429 | MMX_PCMPGTDrm = 2416, |
| 2430 | MMX_PCMPGTDrr = 2417, |
| 2431 | MMX_PCMPGTWrm = 2418, |
| 2432 | MMX_PCMPGTWrr = 2419, |
| 2433 | MMX_PEXTRWrri = 2420, |
| 2434 | MMX_PHADDDrm = 2421, |
| 2435 | MMX_PHADDDrr = 2422, |
| 2436 | MMX_PHADDSWrm = 2423, |
| 2437 | MMX_PHADDSWrr = 2424, |
| 2438 | MMX_PHADDWrm = 2425, |
| 2439 | MMX_PHADDWrr = 2426, |
| 2440 | MMX_PHSUBDrm = 2427, |
| 2441 | MMX_PHSUBDrr = 2428, |
| 2442 | MMX_PHSUBSWrm = 2429, |
| 2443 | MMX_PHSUBSWrr = 2430, |
| 2444 | MMX_PHSUBWrm = 2431, |
| 2445 | MMX_PHSUBWrr = 2432, |
| 2446 | MMX_PINSRWrmi = 2433, |
| 2447 | MMX_PINSRWrri = 2434, |
| 2448 | MMX_PMADDUBSWrm = 2435, |
| 2449 | MMX_PMADDUBSWrr = 2436, |
| 2450 | MMX_PMADDWDrm = 2437, |
| 2451 | MMX_PMADDWDrr = 2438, |
| 2452 | MMX_PMAXSWrm = 2439, |
| 2453 | MMX_PMAXSWrr = 2440, |
| 2454 | MMX_PMAXUBrm = 2441, |
| 2455 | MMX_PMAXUBrr = 2442, |
| 2456 | MMX_PMINSWrm = 2443, |
| 2457 | MMX_PMINSWrr = 2444, |
| 2458 | MMX_PMINUBrm = 2445, |
| 2459 | MMX_PMINUBrr = 2446, |
| 2460 | MMX_PMOVMSKBrr = 2447, |
| 2461 | MMX_PMULHRSWrm = 2448, |
| 2462 | MMX_PMULHRSWrr = 2449, |
| 2463 | MMX_PMULHUWrm = 2450, |
| 2464 | MMX_PMULHUWrr = 2451, |
| 2465 | MMX_PMULHWrm = 2452, |
| 2466 | MMX_PMULHWrr = 2453, |
| 2467 | MMX_PMULLWrm = 2454, |
| 2468 | MMX_PMULLWrr = 2455, |
| 2469 | MMX_PMULUDQrm = 2456, |
| 2470 | MMX_PMULUDQrr = 2457, |
| 2471 | MMX_PORrm = 2458, |
| 2472 | MMX_PORrr = 2459, |
| 2473 | MMX_PSADBWrm = 2460, |
| 2474 | MMX_PSADBWrr = 2461, |
| 2475 | MMX_PSHUFBrm = 2462, |
| 2476 | MMX_PSHUFBrr = 2463, |
| 2477 | MMX_PSHUFWmi = 2464, |
| 2478 | MMX_PSHUFWri = 2465, |
| 2479 | MMX_PSIGNBrm = 2466, |
| 2480 | MMX_PSIGNBrr = 2467, |
| 2481 | MMX_PSIGNDrm = 2468, |
| 2482 | MMX_PSIGNDrr = 2469, |
| 2483 | MMX_PSIGNWrm = 2470, |
| 2484 | MMX_PSIGNWrr = 2471, |
| 2485 | MMX_PSLLDri = 2472, |
| 2486 | MMX_PSLLDrm = 2473, |
| 2487 | MMX_PSLLDrr = 2474, |
| 2488 | MMX_PSLLQri = 2475, |
| 2489 | MMX_PSLLQrm = 2476, |
| 2490 | MMX_PSLLQrr = 2477, |
| 2491 | MMX_PSLLWri = 2478, |
| 2492 | MMX_PSLLWrm = 2479, |
| 2493 | MMX_PSLLWrr = 2480, |
| 2494 | MMX_PSRADri = 2481, |
| 2495 | MMX_PSRADrm = 2482, |
| 2496 | MMX_PSRADrr = 2483, |
| 2497 | MMX_PSRAWri = 2484, |
| 2498 | MMX_PSRAWrm = 2485, |
| 2499 | MMX_PSRAWrr = 2486, |
| 2500 | MMX_PSRLDri = 2487, |
| 2501 | MMX_PSRLDrm = 2488, |
| 2502 | MMX_PSRLDrr = 2489, |
| 2503 | MMX_PSRLQri = 2490, |
| 2504 | MMX_PSRLQrm = 2491, |
| 2505 | MMX_PSRLQrr = 2492, |
| 2506 | MMX_PSRLWri = 2493, |
| 2507 | MMX_PSRLWrm = 2494, |
| 2508 | MMX_PSRLWrr = 2495, |
| 2509 | MMX_PSUBBrm = 2496, |
| 2510 | MMX_PSUBBrr = 2497, |
| 2511 | MMX_PSUBDrm = 2498, |
| 2512 | MMX_PSUBDrr = 2499, |
| 2513 | MMX_PSUBQrm = 2500, |
| 2514 | MMX_PSUBQrr = 2501, |
| 2515 | MMX_PSUBSBrm = 2502, |
| 2516 | MMX_PSUBSBrr = 2503, |
| 2517 | MMX_PSUBSWrm = 2504, |
| 2518 | MMX_PSUBSWrr = 2505, |
| 2519 | MMX_PSUBUSBrm = 2506, |
| 2520 | MMX_PSUBUSBrr = 2507, |
| 2521 | MMX_PSUBUSWrm = 2508, |
| 2522 | MMX_PSUBUSWrr = 2509, |
| 2523 | MMX_PSUBWrm = 2510, |
| 2524 | MMX_PSUBWrr = 2511, |
| 2525 | MMX_PUNPCKHBWrm = 2512, |
| 2526 | MMX_PUNPCKHBWrr = 2513, |
| 2527 | MMX_PUNPCKHDQrm = 2514, |
| 2528 | MMX_PUNPCKHDQrr = 2515, |
| 2529 | MMX_PUNPCKHWDrm = 2516, |
| 2530 | MMX_PUNPCKHWDrr = 2517, |
| 2531 | MMX_PUNPCKLBWrm = 2518, |
| 2532 | MMX_PUNPCKLBWrr = 2519, |
| 2533 | MMX_PUNPCKLDQrm = 2520, |
| 2534 | MMX_PUNPCKLDQrr = 2521, |
| 2535 | MMX_PUNPCKLWDrm = 2522, |
| 2536 | MMX_PUNPCKLWDrr = 2523, |
| 2537 | MMX_PXORrm = 2524, |
| 2538 | MMX_PXORrr = 2525, |
| 2539 | MONITOR32rrr = 2526, |
| 2540 | MONITOR64rrr = 2527, |
| 2541 | MONITORX32rrr = 2528, |
| 2542 | MONITORX64rrr = 2529, |
| 2543 | MONTMUL = 2530, |
| 2544 | MOV16ao16 = 2531, |
| 2545 | MOV16ao32 = 2532, |
| 2546 | MOV16ao64 = 2533, |
| 2547 | MOV16mi = 2534, |
| 2548 | MOV16mr = 2535, |
| 2549 | MOV16ms = 2536, |
| 2550 | MOV16o16a = 2537, |
| 2551 | MOV16o32a = 2538, |
| 2552 | MOV16o64a = 2539, |
| 2553 | MOV16ri = 2540, |
| 2554 | MOV16ri_alt = 2541, |
| 2555 | MOV16rm = 2542, |
| 2556 | MOV16rr = 2543, |
| 2557 | MOV16rr_REV = 2544, |
| 2558 | MOV16rs = 2545, |
| 2559 | MOV16sm = 2546, |
| 2560 | MOV16sr = 2547, |
| 2561 | MOV32ao16 = 2548, |
| 2562 | MOV32ao32 = 2549, |
| 2563 | MOV32ao64 = 2550, |
| 2564 | MOV32cr = 2551, |
| 2565 | MOV32dr = 2552, |
| 2566 | MOV32mi = 2553, |
| 2567 | MOV32mr = 2554, |
| 2568 | MOV32o16a = 2555, |
| 2569 | MOV32o32a = 2556, |
| 2570 | MOV32o64a = 2557, |
| 2571 | MOV32rc = 2558, |
| 2572 | MOV32rd = 2559, |
| 2573 | MOV32ri = 2560, |
| 2574 | MOV32ri_alt = 2561, |
| 2575 | MOV32rm = 2562, |
| 2576 | MOV32rr = 2563, |
| 2577 | MOV32rr_REV = 2564, |
| 2578 | MOV32rs = 2565, |
| 2579 | MOV32sr = 2566, |
| 2580 | MOV64ao32 = 2567, |
| 2581 | MOV64ao64 = 2568, |
| 2582 | MOV64cr = 2569, |
| 2583 | MOV64dr = 2570, |
| 2584 | MOV64mi32 = 2571, |
| 2585 | MOV64mr = 2572, |
| 2586 | MOV64o32a = 2573, |
| 2587 | MOV64o64a = 2574, |
| 2588 | MOV64rc = 2575, |
| 2589 | MOV64rd = 2576, |
| 2590 | MOV64ri = 2577, |
| 2591 | MOV64ri32 = 2578, |
| 2592 | MOV64rm = 2579, |
| 2593 | MOV64rr = 2580, |
| 2594 | MOV64rr_REV = 2581, |
| 2595 | MOV64rs = 2582, |
| 2596 | MOV64sr = 2583, |
| 2597 | MOV64toPQIrm = 2584, |
| 2598 | MOV64toPQIrr = 2585, |
| 2599 | MOV64toSDrr = 2586, |
| 2600 | MOV8ao16 = 2587, |
| 2601 | MOV8ao32 = 2588, |
| 2602 | MOV8ao64 = 2589, |
| 2603 | MOV8mi = 2590, |
| 2604 | MOV8mr = 2591, |
| 2605 | MOV8mr_NOREX = 2592, |
| 2606 | MOV8o16a = 2593, |
| 2607 | MOV8o32a = 2594, |
| 2608 | MOV8o64a = 2595, |
| 2609 | MOV8ri = 2596, |
| 2610 | MOV8ri_alt = 2597, |
| 2611 | MOV8rm = 2598, |
| 2612 | MOV8rm_NOREX = 2599, |
| 2613 | MOV8rr = 2600, |
| 2614 | MOV8rr_NOREX = 2601, |
| 2615 | MOV8rr_REV = 2602, |
| 2616 | MOVAPDmr = 2603, |
| 2617 | MOVAPDrm = 2604, |
| 2618 | MOVAPDrr = 2605, |
| 2619 | MOVAPDrr_REV = 2606, |
| 2620 | MOVAPSmr = 2607, |
| 2621 | MOVAPSrm = 2608, |
| 2622 | MOVAPSrr = 2609, |
| 2623 | MOVAPSrr_REV = 2610, |
| 2624 | MOVBE16mr = 2611, |
| 2625 | MOVBE16mr_EVEX = 2612, |
| 2626 | MOVBE16rm = 2613, |
| 2627 | MOVBE16rm_EVEX = 2614, |
| 2628 | MOVBE16rr = 2615, |
| 2629 | MOVBE16rr_REV = 2616, |
| 2630 | MOVBE32mr = 2617, |
| 2631 | MOVBE32mr_EVEX = 2618, |
| 2632 | MOVBE32rm = 2619, |
| 2633 | MOVBE32rm_EVEX = 2620, |
| 2634 | MOVBE32rr = 2621, |
| 2635 | MOVBE32rr_REV = 2622, |
| 2636 | MOVBE64mr = 2623, |
| 2637 | MOVBE64mr_EVEX = 2624, |
| 2638 | MOVBE64rm = 2625, |
| 2639 | MOVBE64rm_EVEX = 2626, |
| 2640 | MOVBE64rr = 2627, |
| 2641 | MOVBE64rr_REV = 2628, |
| 2642 | MOVDDUPrm = 2629, |
| 2643 | MOVDDUPrr = 2630, |
| 2644 | MOVDI2PDIrm = 2631, |
| 2645 | MOVDI2PDIrr = 2632, |
| 2646 | MOVDI2SSrr = 2633, |
| 2647 | MOVDIR64B16 = 2634, |
| 2648 | MOVDIR64B32 = 2635, |
| 2649 | MOVDIR64B32_EVEX = 2636, |
| 2650 | MOVDIR64B64 = 2637, |
| 2651 | MOVDIR64B64_EVEX = 2638, |
| 2652 | MOVDIRI32 = 2639, |
| 2653 | MOVDIRI32_EVEX = 2640, |
| 2654 | MOVDIRI64 = 2641, |
| 2655 | MOVDIRI64_EVEX = 2642, |
| 2656 | MOVDQAmr = 2643, |
| 2657 | MOVDQArm = 2644, |
| 2658 | MOVDQArr = 2645, |
| 2659 | MOVDQArr_REV = 2646, |
| 2660 | MOVDQUmr = 2647, |
| 2661 | MOVDQUrm = 2648, |
| 2662 | MOVDQUrr = 2649, |
| 2663 | MOVDQUrr_REV = 2650, |
| 2664 | MOVHLPSrr = 2651, |
| 2665 | MOVHPDmr = 2652, |
| 2666 | MOVHPDrm = 2653, |
| 2667 | MOVHPSmr = 2654, |
| 2668 | MOVHPSrm = 2655, |
| 2669 | MOVLHPSrr = 2656, |
| 2670 | MOVLPDmr = 2657, |
| 2671 | MOVLPDrm = 2658, |
| 2672 | MOVLPSmr = 2659, |
| 2673 | MOVLPSrm = 2660, |
| 2674 | MOVMSKPDrr = 2661, |
| 2675 | MOVMSKPSrr = 2662, |
| 2676 | MOVNTDQArm = 2663, |
| 2677 | MOVNTDQmr = 2664, |
| 2678 | MOVNTI_64mr = 2665, |
| 2679 | MOVNTImr = 2666, |
| 2680 | MOVNTPDmr = 2667, |
| 2681 | MOVNTPSmr = 2668, |
| 2682 | MOVNTSD = 2669, |
| 2683 | MOVNTSS = 2670, |
| 2684 | MOVPC32r = 2671, |
| 2685 | MOVPDI2DImr = 2672, |
| 2686 | MOVPDI2DIrr = 2673, |
| 2687 | MOVPQI2QImr = 2674, |
| 2688 | MOVPQI2QIrr = 2675, |
| 2689 | MOVPQIto64mr = 2676, |
| 2690 | MOVPQIto64rr = 2677, |
| 2691 | MOVQI2PQIrm = 2678, |
| 2692 | MOVRS16rm = 2679, |
| 2693 | MOVRS16rm_EVEX = 2680, |
| 2694 | MOVRS32rm = 2681, |
| 2695 | MOVRS32rm_EVEX = 2682, |
| 2696 | MOVRS64rm = 2683, |
| 2697 | MOVRS64rm_EVEX = 2684, |
| 2698 | MOVRS8rm = 2685, |
| 2699 | MOVRS8rm_EVEX = 2686, |
| 2700 | MOVSB = 2687, |
| 2701 | MOVSDmr = 2688, |
| 2702 | MOVSDrm = 2689, |
| 2703 | MOVSDrm_alt = 2690, |
| 2704 | MOVSDrr = 2691, |
| 2705 | MOVSDrr_REV = 2692, |
| 2706 | MOVSDto64rr = 2693, |
| 2707 | MOVSHDUPrm = 2694, |
| 2708 | MOVSHDUPrr = 2695, |
| 2709 | MOVSL = 2696, |
| 2710 | MOVSLDUPrm = 2697, |
| 2711 | MOVSLDUPrr = 2698, |
| 2712 | MOVSQ = 2699, |
| 2713 | MOVSS2DIrr = 2700, |
| 2714 | MOVSSmr = 2701, |
| 2715 | MOVSSrm = 2702, |
| 2716 | MOVSSrm_alt = 2703, |
| 2717 | MOVSSrr = 2704, |
| 2718 | MOVSSrr_REV = 2705, |
| 2719 | MOVSW = 2706, |
| 2720 | MOVSX16rm16 = 2707, |
| 2721 | MOVSX16rm32 = 2708, |
| 2722 | MOVSX16rm8 = 2709, |
| 2723 | MOVSX16rr16 = 2710, |
| 2724 | MOVSX16rr32 = 2711, |
| 2725 | MOVSX16rr8 = 2712, |
| 2726 | MOVSX32rm16 = 2713, |
| 2727 | MOVSX32rm32 = 2714, |
| 2728 | MOVSX32rm8 = 2715, |
| 2729 | MOVSX32rm8_NOREX = 2716, |
| 2730 | MOVSX32rr16 = 2717, |
| 2731 | MOVSX32rr32 = 2718, |
| 2732 | MOVSX32rr8 = 2719, |
| 2733 | MOVSX32rr8_NOREX = 2720, |
| 2734 | MOVSX64rm16 = 2721, |
| 2735 | MOVSX64rm32 = 2722, |
| 2736 | MOVSX64rm8 = 2723, |
| 2737 | MOVSX64rr16 = 2724, |
| 2738 | MOVSX64rr32 = 2725, |
| 2739 | MOVSX64rr8 = 2726, |
| 2740 | MOVUPDmr = 2727, |
| 2741 | MOVUPDrm = 2728, |
| 2742 | MOVUPDrr = 2729, |
| 2743 | MOVUPDrr_REV = 2730, |
| 2744 | MOVUPSmr = 2731, |
| 2745 | MOVUPSrm = 2732, |
| 2746 | MOVUPSrr = 2733, |
| 2747 | MOVUPSrr_REV = 2734, |
| 2748 | MOVZPQILo2PQIrr = 2735, |
| 2749 | MOVZX16rm16 = 2736, |
| 2750 | MOVZX16rm8 = 2737, |
| 2751 | MOVZX16rr16 = 2738, |
| 2752 | MOVZX16rr8 = 2739, |
| 2753 | MOVZX32rm16 = 2740, |
| 2754 | MOVZX32rm8 = 2741, |
| 2755 | MOVZX32rm8_NOREX = 2742, |
| 2756 | MOVZX32rr16 = 2743, |
| 2757 | MOVZX32rr8 = 2744, |
| 2758 | MOVZX32rr8_NOREX = 2745, |
| 2759 | MOVZX64rm16 = 2746, |
| 2760 | MOVZX64rm8 = 2747, |
| 2761 | MOVZX64rr16 = 2748, |
| 2762 | MOVZX64rr8 = 2749, |
| 2763 | MPSADBWrmi = 2750, |
| 2764 | MPSADBWrri = 2751, |
| 2765 | MUL16m = 2752, |
| 2766 | MUL16m_EVEX = 2753, |
| 2767 | MUL16m_NF = 2754, |
| 2768 | MUL16r = 2755, |
| 2769 | MUL16r_EVEX = 2756, |
| 2770 | MUL16r_NF = 2757, |
| 2771 | MUL32m = 2758, |
| 2772 | MUL32m_EVEX = 2759, |
| 2773 | MUL32m_NF = 2760, |
| 2774 | MUL32r = 2761, |
| 2775 | MUL32r_EVEX = 2762, |
| 2776 | MUL32r_NF = 2763, |
| 2777 | MUL64m = 2764, |
| 2778 | MUL64m_EVEX = 2765, |
| 2779 | MUL64m_NF = 2766, |
| 2780 | MUL64r = 2767, |
| 2781 | MUL64r_EVEX = 2768, |
| 2782 | MUL64r_NF = 2769, |
| 2783 | MUL8m = 2770, |
| 2784 | MUL8m_EVEX = 2771, |
| 2785 | MUL8m_NF = 2772, |
| 2786 | MUL8r = 2773, |
| 2787 | MUL8r_EVEX = 2774, |
| 2788 | MUL8r_NF = 2775, |
| 2789 | MULPDrm = 2776, |
| 2790 | MULPDrr = 2777, |
| 2791 | MULPSrm = 2778, |
| 2792 | MULPSrr = 2779, |
| 2793 | MULSDrm = 2780, |
| 2794 | MULSDrm_Int = 2781, |
| 2795 | MULSDrr = 2782, |
| 2796 | MULSDrr_Int = 2783, |
| 2797 | MULSSrm = 2784, |
| 2798 | MULSSrm_Int = 2785, |
| 2799 | MULSSrr = 2786, |
| 2800 | MULSSrr_Int = 2787, |
| 2801 | MULX32Hrm = 2788, |
| 2802 | MULX32Hrr = 2789, |
| 2803 | MULX32rm = 2790, |
| 2804 | MULX32rm_EVEX = 2791, |
| 2805 | MULX32rr = 2792, |
| 2806 | MULX32rr_EVEX = 2793, |
| 2807 | MULX64Hrm = 2794, |
| 2808 | MULX64Hrr = 2795, |
| 2809 | MULX64rm = 2796, |
| 2810 | MULX64rm_EVEX = 2797, |
| 2811 | MULX64rr = 2798, |
| 2812 | MULX64rr_EVEX = 2799, |
| 2813 | MUL_F32m = 2800, |
| 2814 | MUL_F64m = 2801, |
| 2815 | MUL_FI16m = 2802, |
| 2816 | MUL_FI32m = 2803, |
| 2817 | MUL_FPrST0 = 2804, |
| 2818 | MUL_FST0r = 2805, |
| 2819 | MUL_Fp32 = 2806, |
| 2820 | MUL_Fp32m = 2807, |
| 2821 | MUL_Fp64 = 2808, |
| 2822 | MUL_Fp64m = 2809, |
| 2823 | MUL_Fp64m32 = 2810, |
| 2824 | MUL_Fp80 = 2811, |
| 2825 | MUL_Fp80m32 = 2812, |
| 2826 | MUL_Fp80m64 = 2813, |
| 2827 | MUL_FpI16m32 = 2814, |
| 2828 | MUL_FpI16m64 = 2815, |
| 2829 | MUL_FpI16m80 = 2816, |
| 2830 | MUL_FpI32m32 = 2817, |
| 2831 | MUL_FpI32m64 = 2818, |
| 2832 | MUL_FpI32m80 = 2819, |
| 2833 | MUL_FrST0 = 2820, |
| 2834 | MWAITXrrr = 2821, |
| 2835 | MWAITrr = 2822, |
| 2836 | NEG16m = 2823, |
| 2837 | NEG16m_EVEX = 2824, |
| 2838 | NEG16m_ND = 2825, |
| 2839 | NEG16m_NF = 2826, |
| 2840 | NEG16m_NF_ND = 2827, |
| 2841 | NEG16r = 2828, |
| 2842 | NEG16r_EVEX = 2829, |
| 2843 | NEG16r_ND = 2830, |
| 2844 | NEG16r_NF = 2831, |
| 2845 | NEG16r_NF_ND = 2832, |
| 2846 | NEG32m = 2833, |
| 2847 | NEG32m_EVEX = 2834, |
| 2848 | NEG32m_ND = 2835, |
| 2849 | NEG32m_NF = 2836, |
| 2850 | NEG32m_NF_ND = 2837, |
| 2851 | NEG32r = 2838, |
| 2852 | NEG32r_EVEX = 2839, |
| 2853 | NEG32r_ND = 2840, |
| 2854 | NEG32r_NF = 2841, |
| 2855 | NEG32r_NF_ND = 2842, |
| 2856 | NEG64m = 2843, |
| 2857 | NEG64m_EVEX = 2844, |
| 2858 | NEG64m_ND = 2845, |
| 2859 | NEG64m_NF = 2846, |
| 2860 | NEG64m_NF_ND = 2847, |
| 2861 | NEG64r = 2848, |
| 2862 | NEG64r_EVEX = 2849, |
| 2863 | NEG64r_ND = 2850, |
| 2864 | NEG64r_NF = 2851, |
| 2865 | NEG64r_NF_ND = 2852, |
| 2866 | NEG8m = 2853, |
| 2867 | NEG8m_EVEX = 2854, |
| 2868 | NEG8m_ND = 2855, |
| 2869 | NEG8m_NF = 2856, |
| 2870 | NEG8m_NF_ND = 2857, |
| 2871 | NEG8r = 2858, |
| 2872 | NEG8r_EVEX = 2859, |
| 2873 | NEG8r_ND = 2860, |
| 2874 | NEG8r_NF = 2861, |
| 2875 | NEG8r_NF_ND = 2862, |
| 2876 | NOOP = 2863, |
| 2877 | NOOPL = 2864, |
| 2878 | NOOPLr = 2865, |
| 2879 | NOOPQ = 2866, |
| 2880 | NOOPQr = 2867, |
| 2881 | NOOPW = 2868, |
| 2882 | NOOPWr = 2869, |
| 2883 | NOT16m = 2870, |
| 2884 | NOT16m_EVEX = 2871, |
| 2885 | NOT16m_ND = 2872, |
| 2886 | NOT16r = 2873, |
| 2887 | NOT16r_EVEX = 2874, |
| 2888 | NOT16r_ND = 2875, |
| 2889 | NOT32m = 2876, |
| 2890 | NOT32m_EVEX = 2877, |
| 2891 | NOT32m_ND = 2878, |
| 2892 | NOT32r = 2879, |
| 2893 | NOT32r_EVEX = 2880, |
| 2894 | NOT32r_ND = 2881, |
| 2895 | NOT64m = 2882, |
| 2896 | NOT64m_EVEX = 2883, |
| 2897 | NOT64m_ND = 2884, |
| 2898 | NOT64r = 2885, |
| 2899 | NOT64r_EVEX = 2886, |
| 2900 | NOT64r_ND = 2887, |
| 2901 | NOT8m = 2888, |
| 2902 | NOT8m_EVEX = 2889, |
| 2903 | NOT8m_ND = 2890, |
| 2904 | NOT8r = 2891, |
| 2905 | NOT8r_EVEX = 2892, |
| 2906 | NOT8r_ND = 2893, |
| 2907 | OR16i16 = 2894, |
| 2908 | OR16mi = 2895, |
| 2909 | OR16mi8 = 2896, |
| 2910 | OR16mi8_EVEX = 2897, |
| 2911 | OR16mi8_ND = 2898, |
| 2912 | OR16mi8_NF = 2899, |
| 2913 | OR16mi8_NF_ND = 2900, |
| 2914 | OR16mi_EVEX = 2901, |
| 2915 | OR16mi_ND = 2902, |
| 2916 | OR16mi_NF = 2903, |
| 2917 | OR16mi_NF_ND = 2904, |
| 2918 | OR16mr = 2905, |
| 2919 | OR16mr_EVEX = 2906, |
| 2920 | OR16mr_ND = 2907, |
| 2921 | OR16mr_NF = 2908, |
| 2922 | OR16mr_NF_ND = 2909, |
| 2923 | OR16ri = 2910, |
| 2924 | OR16ri8 = 2911, |
| 2925 | OR16ri8_EVEX = 2912, |
| 2926 | OR16ri8_ND = 2913, |
| 2927 | OR16ri8_NF = 2914, |
| 2928 | OR16ri8_NF_ND = 2915, |
| 2929 | OR16ri_EVEX = 2916, |
| 2930 | OR16ri_ND = 2917, |
| 2931 | OR16ri_NF = 2918, |
| 2932 | OR16ri_NF_ND = 2919, |
| 2933 | OR16rm = 2920, |
| 2934 | OR16rm_EVEX = 2921, |
| 2935 | OR16rm_ND = 2922, |
| 2936 | OR16rm_NF = 2923, |
| 2937 | OR16rm_NF_ND = 2924, |
| 2938 | OR16rr = 2925, |
| 2939 | OR16rr_EVEX = 2926, |
| 2940 | OR16rr_EVEX_REV = 2927, |
| 2941 | OR16rr_ND = 2928, |
| 2942 | OR16rr_ND_REV = 2929, |
| 2943 | OR16rr_NF = 2930, |
| 2944 | OR16rr_NF_ND = 2931, |
| 2945 | OR16rr_NF_ND_REV = 2932, |
| 2946 | OR16rr_NF_REV = 2933, |
| 2947 | OR16rr_REV = 2934, |
| 2948 | OR32i32 = 2935, |
| 2949 | OR32mi = 2936, |
| 2950 | OR32mi8 = 2937, |
| 2951 | OR32mi8Locked = 2938, |
| 2952 | OR32mi8_EVEX = 2939, |
| 2953 | OR32mi8_ND = 2940, |
| 2954 | OR32mi8_NF = 2941, |
| 2955 | OR32mi8_NF_ND = 2942, |
| 2956 | OR32mi_EVEX = 2943, |
| 2957 | OR32mi_ND = 2944, |
| 2958 | OR32mi_NF = 2945, |
| 2959 | OR32mi_NF_ND = 2946, |
| 2960 | OR32mr = 2947, |
| 2961 | OR32mr_EVEX = 2948, |
| 2962 | OR32mr_ND = 2949, |
| 2963 | OR32mr_NF = 2950, |
| 2964 | OR32mr_NF_ND = 2951, |
| 2965 | OR32ri = 2952, |
| 2966 | OR32ri8 = 2953, |
| 2967 | OR32ri8_EVEX = 2954, |
| 2968 | OR32ri8_ND = 2955, |
| 2969 | OR32ri8_NF = 2956, |
| 2970 | OR32ri8_NF_ND = 2957, |
| 2971 | OR32ri_EVEX = 2958, |
| 2972 | OR32ri_ND = 2959, |
| 2973 | OR32ri_NF = 2960, |
| 2974 | OR32ri_NF_ND = 2961, |
| 2975 | OR32rm = 2962, |
| 2976 | OR32rm_EVEX = 2963, |
| 2977 | OR32rm_ND = 2964, |
| 2978 | OR32rm_NF = 2965, |
| 2979 | OR32rm_NF_ND = 2966, |
| 2980 | OR32rr = 2967, |
| 2981 | OR32rr_EVEX = 2968, |
| 2982 | OR32rr_EVEX_REV = 2969, |
| 2983 | OR32rr_ND = 2970, |
| 2984 | OR32rr_ND_REV = 2971, |
| 2985 | OR32rr_NF = 2972, |
| 2986 | OR32rr_NF_ND = 2973, |
| 2987 | OR32rr_NF_ND_REV = 2974, |
| 2988 | OR32rr_NF_REV = 2975, |
| 2989 | OR32rr_REV = 2976, |
| 2990 | OR64i32 = 2977, |
| 2991 | OR64mi32 = 2978, |
| 2992 | OR64mi32_EVEX = 2979, |
| 2993 | OR64mi32_ND = 2980, |
| 2994 | OR64mi32_NF = 2981, |
| 2995 | OR64mi32_NF_ND = 2982, |
| 2996 | OR64mi8 = 2983, |
| 2997 | OR64mi8_EVEX = 2984, |
| 2998 | OR64mi8_ND = 2985, |
| 2999 | OR64mi8_NF = 2986, |
| 3000 | OR64mi8_NF_ND = 2987, |
| 3001 | OR64mr = 2988, |
| 3002 | OR64mr_EVEX = 2989, |
| 3003 | OR64mr_ND = 2990, |
| 3004 | OR64mr_NF = 2991, |
| 3005 | OR64mr_NF_ND = 2992, |
| 3006 | OR64ri32 = 2993, |
| 3007 | OR64ri32_EVEX = 2994, |
| 3008 | OR64ri32_ND = 2995, |
| 3009 | OR64ri32_NF = 2996, |
| 3010 | OR64ri32_NF_ND = 2997, |
| 3011 | OR64ri8 = 2998, |
| 3012 | OR64ri8_EVEX = 2999, |
| 3013 | OR64ri8_ND = 3000, |
| 3014 | OR64ri8_NF = 3001, |
| 3015 | OR64ri8_NF_ND = 3002, |
| 3016 | OR64rm = 3003, |
| 3017 | OR64rm_EVEX = 3004, |
| 3018 | OR64rm_ND = 3005, |
| 3019 | OR64rm_NF = 3006, |
| 3020 | OR64rm_NF_ND = 3007, |
| 3021 | OR64rr = 3008, |
| 3022 | OR64rr_EVEX = 3009, |
| 3023 | OR64rr_EVEX_REV = 3010, |
| 3024 | OR64rr_ND = 3011, |
| 3025 | OR64rr_ND_REV = 3012, |
| 3026 | OR64rr_NF = 3013, |
| 3027 | OR64rr_NF_ND = 3014, |
| 3028 | OR64rr_NF_ND_REV = 3015, |
| 3029 | OR64rr_NF_REV = 3016, |
| 3030 | OR64rr_REV = 3017, |
| 3031 | OR8i8 = 3018, |
| 3032 | OR8mi = 3019, |
| 3033 | OR8mi8 = 3020, |
| 3034 | OR8mi_EVEX = 3021, |
| 3035 | OR8mi_ND = 3022, |
| 3036 | OR8mi_NF = 3023, |
| 3037 | OR8mi_NF_ND = 3024, |
| 3038 | OR8mr = 3025, |
| 3039 | OR8mr_EVEX = 3026, |
| 3040 | OR8mr_ND = 3027, |
| 3041 | OR8mr_NF = 3028, |
| 3042 | OR8mr_NF_ND = 3029, |
| 3043 | OR8ri = 3030, |
| 3044 | OR8ri8 = 3031, |
| 3045 | OR8ri_EVEX = 3032, |
| 3046 | OR8ri_ND = 3033, |
| 3047 | OR8ri_NF = 3034, |
| 3048 | OR8ri_NF_ND = 3035, |
| 3049 | OR8rm = 3036, |
| 3050 | OR8rm_EVEX = 3037, |
| 3051 | OR8rm_ND = 3038, |
| 3052 | OR8rm_NF = 3039, |
| 3053 | OR8rm_NF_ND = 3040, |
| 3054 | OR8rr = 3041, |
| 3055 | OR8rr_EVEX = 3042, |
| 3056 | OR8rr_EVEX_REV = 3043, |
| 3057 | OR8rr_ND = 3044, |
| 3058 | OR8rr_ND_REV = 3045, |
| 3059 | OR8rr_NF = 3046, |
| 3060 | OR8rr_NF_ND = 3047, |
| 3061 | OR8rr_NF_ND_REV = 3048, |
| 3062 | OR8rr_NF_REV = 3049, |
| 3063 | OR8rr_REV = 3050, |
| 3064 | ORPDrm = 3051, |
| 3065 | ORPDrr = 3052, |
| 3066 | ORPSrm = 3053, |
| 3067 | ORPSrr = 3054, |
| 3068 | OUT16ir = 3055, |
| 3069 | OUT16rr = 3056, |
| 3070 | OUT32ir = 3057, |
| 3071 | OUT32rr = 3058, |
| 3072 | OUT8ir = 3059, |
| 3073 | OUT8rr = 3060, |
| 3074 | OUTSB = 3061, |
| 3075 | OUTSL = 3062, |
| 3076 | OUTSW = 3063, |
| 3077 | PABSBrm = 3064, |
| 3078 | PABSBrr = 3065, |
| 3079 | PABSDrm = 3066, |
| 3080 | PABSDrr = 3067, |
| 3081 | PABSWrm = 3068, |
| 3082 | PABSWrr = 3069, |
| 3083 | PACKSSDWrm = 3070, |
| 3084 | PACKSSDWrr = 3071, |
| 3085 | PACKSSWBrm = 3072, |
| 3086 | PACKSSWBrr = 3073, |
| 3087 | PACKUSDWrm = 3074, |
| 3088 | PACKUSDWrr = 3075, |
| 3089 | PACKUSWBrm = 3076, |
| 3090 | PACKUSWBrr = 3077, |
| 3091 | PADDBrm = 3078, |
| 3092 | PADDBrr = 3079, |
| 3093 | PADDDrm = 3080, |
| 3094 | PADDDrr = 3081, |
| 3095 | PADDQrm = 3082, |
| 3096 | PADDQrr = 3083, |
| 3097 | PADDSBrm = 3084, |
| 3098 | PADDSBrr = 3085, |
| 3099 | PADDSWrm = 3086, |
| 3100 | PADDSWrr = 3087, |
| 3101 | PADDUSBrm = 3088, |
| 3102 | PADDUSBrr = 3089, |
| 3103 | PADDUSWrm = 3090, |
| 3104 | PADDUSWrr = 3091, |
| 3105 | PADDWrm = 3092, |
| 3106 | PADDWrr = 3093, |
| 3107 | PALIGNRrmi = 3094, |
| 3108 | PALIGNRrri = 3095, |
| 3109 | PANDNrm = 3096, |
| 3110 | PANDNrr = 3097, |
| 3111 | PANDrm = 3098, |
| 3112 | PANDrr = 3099, |
| 3113 | PAUSE = 3100, |
| 3114 | PAVGBrm = 3101, |
| 3115 | PAVGBrr = 3102, |
| 3116 | PAVGUSBrm = 3103, |
| 3117 | PAVGUSBrr = 3104, |
| 3118 | PAVGWrm = 3105, |
| 3119 | PAVGWrr = 3106, |
| 3120 | PBLENDVBrm0 = 3107, |
| 3121 | PBLENDVBrr0 = 3108, |
| 3122 | PBLENDWrmi = 3109, |
| 3123 | PBLENDWrri = 3110, |
| 3124 | PBNDKB = 3111, |
| 3125 | PCLMULQDQrmi = 3112, |
| 3126 | PCLMULQDQrri = 3113, |
| 3127 | PCMPEQBrm = 3114, |
| 3128 | PCMPEQBrr = 3115, |
| 3129 | PCMPEQDrm = 3116, |
| 3130 | PCMPEQDrr = 3117, |
| 3131 | PCMPEQQrm = 3118, |
| 3132 | PCMPEQQrr = 3119, |
| 3133 | PCMPEQWrm = 3120, |
| 3134 | PCMPEQWrr = 3121, |
| 3135 | PCMPESTRIrmi = 3122, |
| 3136 | PCMPESTRIrri = 3123, |
| 3137 | PCMPESTRMrmi = 3124, |
| 3138 | PCMPESTRMrri = 3125, |
| 3139 | PCMPGTBrm = 3126, |
| 3140 | PCMPGTBrr = 3127, |
| 3141 | PCMPGTDrm = 3128, |
| 3142 | PCMPGTDrr = 3129, |
| 3143 | PCMPGTQrm = 3130, |
| 3144 | PCMPGTQrr = 3131, |
| 3145 | PCMPGTWrm = 3132, |
| 3146 | PCMPGTWrr = 3133, |
| 3147 | PCMPISTRIrmi = 3134, |
| 3148 | PCMPISTRIrri = 3135, |
| 3149 | PCMPISTRMrmi = 3136, |
| 3150 | PCMPISTRMrri = 3137, |
| 3151 | PCONFIG = 3138, |
| 3152 | PDEP32rm = 3139, |
| 3153 | PDEP32rm_EVEX = 3140, |
| 3154 | PDEP32rr = 3141, |
| 3155 | PDEP32rr_EVEX = 3142, |
| 3156 | PDEP64rm = 3143, |
| 3157 | PDEP64rm_EVEX = 3144, |
| 3158 | PDEP64rr = 3145, |
| 3159 | PDEP64rr_EVEX = 3146, |
| 3160 | PEXT32rm = 3147, |
| 3161 | PEXT32rm_EVEX = 3148, |
| 3162 | PEXT32rr = 3149, |
| 3163 | PEXT32rr_EVEX = 3150, |
| 3164 | PEXT64rm = 3151, |
| 3165 | PEXT64rm_EVEX = 3152, |
| 3166 | PEXT64rr = 3153, |
| 3167 | PEXT64rr_EVEX = 3154, |
| 3168 | PEXTRBmri = 3155, |
| 3169 | PEXTRBrri = 3156, |
| 3170 | PEXTRDmri = 3157, |
| 3171 | PEXTRDrri = 3158, |
| 3172 | PEXTRQmri = 3159, |
| 3173 | PEXTRQrri = 3160, |
| 3174 | PEXTRWmri = 3161, |
| 3175 | PEXTRWrri = 3162, |
| 3176 | PEXTRWrri_REV = 3163, |
| 3177 | PF2IDrm = 3164, |
| 3178 | PF2IDrr = 3165, |
| 3179 | PF2IWrm = 3166, |
| 3180 | PF2IWrr = 3167, |
| 3181 | PFACCrm = 3168, |
| 3182 | PFACCrr = 3169, |
| 3183 | PFADDrm = 3170, |
| 3184 | PFADDrr = 3171, |
| 3185 | PFCMPEQrm = 3172, |
| 3186 | PFCMPEQrr = 3173, |
| 3187 | PFCMPGErm = 3174, |
| 3188 | PFCMPGErr = 3175, |
| 3189 | PFCMPGTrm = 3176, |
| 3190 | PFCMPGTrr = 3177, |
| 3191 | PFMAXrm = 3178, |
| 3192 | PFMAXrr = 3179, |
| 3193 | PFMINrm = 3180, |
| 3194 | PFMINrr = 3181, |
| 3195 | PFMULrm = 3182, |
| 3196 | PFMULrr = 3183, |
| 3197 | PFNACCrm = 3184, |
| 3198 | PFNACCrr = 3185, |
| 3199 | PFPNACCrm = 3186, |
| 3200 | PFPNACCrr = 3187, |
| 3201 | PFRCPIT1rm = 3188, |
| 3202 | PFRCPIT1rr = 3189, |
| 3203 | PFRCPIT2rm = 3190, |
| 3204 | PFRCPIT2rr = 3191, |
| 3205 | PFRCPrm = 3192, |
| 3206 | PFRCPrr = 3193, |
| 3207 | PFRSQIT1rm = 3194, |
| 3208 | PFRSQIT1rr = 3195, |
| 3209 | PFRSQRTrm = 3196, |
| 3210 | PFRSQRTrr = 3197, |
| 3211 | PFSUBRrm = 3198, |
| 3212 | PFSUBRrr = 3199, |
| 3213 | PFSUBrm = 3200, |
| 3214 | PFSUBrr = 3201, |
| 3215 | PHADDDrm = 3202, |
| 3216 | PHADDDrr = 3203, |
| 3217 | PHADDSWrm = 3204, |
| 3218 | PHADDSWrr = 3205, |
| 3219 | PHADDWrm = 3206, |
| 3220 | PHADDWrr = 3207, |
| 3221 | PHMINPOSUWrm = 3208, |
| 3222 | PHMINPOSUWrr = 3209, |
| 3223 | PHSUBDrm = 3210, |
| 3224 | PHSUBDrr = 3211, |
| 3225 | PHSUBSWrm = 3212, |
| 3226 | PHSUBSWrr = 3213, |
| 3227 | PHSUBWrm = 3214, |
| 3228 | PHSUBWrr = 3215, |
| 3229 | PI2FDrm = 3216, |
| 3230 | PI2FDrr = 3217, |
| 3231 | PI2FWrm = 3218, |
| 3232 | PI2FWrr = 3219, |
| 3233 | PINSRBrmi = 3220, |
| 3234 | PINSRBrri = 3221, |
| 3235 | PINSRDrmi = 3222, |
| 3236 | PINSRDrri = 3223, |
| 3237 | PINSRQrmi = 3224, |
| 3238 | PINSRQrri = 3225, |
| 3239 | PINSRWrmi = 3226, |
| 3240 | PINSRWrri = 3227, |
| 3241 | PMADDUBSWrm = 3228, |
| 3242 | PMADDUBSWrr = 3229, |
| 3243 | PMADDWDrm = 3230, |
| 3244 | PMADDWDrr = 3231, |
| 3245 | PMAXSBrm = 3232, |
| 3246 | PMAXSBrr = 3233, |
| 3247 | PMAXSDrm = 3234, |
| 3248 | PMAXSDrr = 3235, |
| 3249 | PMAXSWrm = 3236, |
| 3250 | PMAXSWrr = 3237, |
| 3251 | PMAXUBrm = 3238, |
| 3252 | PMAXUBrr = 3239, |
| 3253 | PMAXUDrm = 3240, |
| 3254 | PMAXUDrr = 3241, |
| 3255 | PMAXUWrm = 3242, |
| 3256 | PMAXUWrr = 3243, |
| 3257 | PMINSBrm = 3244, |
| 3258 | PMINSBrr = 3245, |
| 3259 | PMINSDrm = 3246, |
| 3260 | PMINSDrr = 3247, |
| 3261 | PMINSWrm = 3248, |
| 3262 | PMINSWrr = 3249, |
| 3263 | PMINUBrm = 3250, |
| 3264 | PMINUBrr = 3251, |
| 3265 | PMINUDrm = 3252, |
| 3266 | PMINUDrr = 3253, |
| 3267 | PMINUWrm = 3254, |
| 3268 | PMINUWrr = 3255, |
| 3269 | PMOVMSKBrr = 3256, |
| 3270 | PMOVSXBDrm = 3257, |
| 3271 | PMOVSXBDrr = 3258, |
| 3272 | PMOVSXBQrm = 3259, |
| 3273 | PMOVSXBQrr = 3260, |
| 3274 | PMOVSXBWrm = 3261, |
| 3275 | PMOVSXBWrr = 3262, |
| 3276 | PMOVSXDQrm = 3263, |
| 3277 | PMOVSXDQrr = 3264, |
| 3278 | PMOVSXWDrm = 3265, |
| 3279 | PMOVSXWDrr = 3266, |
| 3280 | PMOVSXWQrm = 3267, |
| 3281 | PMOVSXWQrr = 3268, |
| 3282 | PMOVZXBDrm = 3269, |
| 3283 | PMOVZXBDrr = 3270, |
| 3284 | PMOVZXBQrm = 3271, |
| 3285 | PMOVZXBQrr = 3272, |
| 3286 | PMOVZXBWrm = 3273, |
| 3287 | PMOVZXBWrr = 3274, |
| 3288 | PMOVZXDQrm = 3275, |
| 3289 | PMOVZXDQrr = 3276, |
| 3290 | PMOVZXWDrm = 3277, |
| 3291 | PMOVZXWDrr = 3278, |
| 3292 | PMOVZXWQrm = 3279, |
| 3293 | PMOVZXWQrr = 3280, |
| 3294 | PMULDQrm = 3281, |
| 3295 | PMULDQrr = 3282, |
| 3296 | PMULHRSWrm = 3283, |
| 3297 | PMULHRSWrr = 3284, |
| 3298 | PMULHRWrm = 3285, |
| 3299 | PMULHRWrr = 3286, |
| 3300 | PMULHUWrm = 3287, |
| 3301 | PMULHUWrr = 3288, |
| 3302 | PMULHWrm = 3289, |
| 3303 | PMULHWrr = 3290, |
| 3304 | PMULLDrm = 3291, |
| 3305 | PMULLDrr = 3292, |
| 3306 | PMULLWrm = 3293, |
| 3307 | PMULLWrr = 3294, |
| 3308 | PMULUDQrm = 3295, |
| 3309 | PMULUDQrr = 3296, |
| 3310 | POP16r = 3297, |
| 3311 | POP16rmm = 3298, |
| 3312 | POP16rmr = 3299, |
| 3313 | POP2 = 3300, |
| 3314 | POP2P = 3301, |
| 3315 | POP32r = 3302, |
| 3316 | POP32rmm = 3303, |
| 3317 | POP32rmr = 3304, |
| 3318 | POP64r = 3305, |
| 3319 | POP64rmm = 3306, |
| 3320 | POP64rmr = 3307, |
| 3321 | POPA16 = 3308, |
| 3322 | POPA32 = 3309, |
| 3323 | POPCNT16rm = 3310, |
| 3324 | POPCNT16rm_EVEX = 3311, |
| 3325 | POPCNT16rm_NF = 3312, |
| 3326 | POPCNT16rr = 3313, |
| 3327 | POPCNT16rr_EVEX = 3314, |
| 3328 | POPCNT16rr_NF = 3315, |
| 3329 | POPCNT32rm = 3316, |
| 3330 | POPCNT32rm_EVEX = 3317, |
| 3331 | POPCNT32rm_NF = 3318, |
| 3332 | POPCNT32rr = 3319, |
| 3333 | POPCNT32rr_EVEX = 3320, |
| 3334 | POPCNT32rr_NF = 3321, |
| 3335 | POPCNT64rm = 3322, |
| 3336 | POPCNT64rm_EVEX = 3323, |
| 3337 | POPCNT64rm_NF = 3324, |
| 3338 | POPCNT64rr = 3325, |
| 3339 | POPCNT64rr_EVEX = 3326, |
| 3340 | POPCNT64rr_NF = 3327, |
| 3341 | POPDS16 = 3328, |
| 3342 | POPDS32 = 3329, |
| 3343 | POPES16 = 3330, |
| 3344 | POPES32 = 3331, |
| 3345 | POPF16 = 3332, |
| 3346 | POPF32 = 3333, |
| 3347 | POPF64 = 3334, |
| 3348 | POPFS16 = 3335, |
| 3349 | POPFS32 = 3336, |
| 3350 | POPFS64 = 3337, |
| 3351 | POPGS16 = 3338, |
| 3352 | POPGS32 = 3339, |
| 3353 | POPGS64 = 3340, |
| 3354 | POPP64r = 3341, |
| 3355 | POPSS16 = 3342, |
| 3356 | POPSS32 = 3343, |
| 3357 | PORrm = 3344, |
| 3358 | PORrr = 3345, |
| 3359 | PREFETCH = 3346, |
| 3360 | PREFETCHIT0 = 3347, |
| 3361 | PREFETCHIT1 = 3348, |
| 3362 | PREFETCHNTA = 3349, |
| 3363 | PREFETCHRST2 = 3350, |
| 3364 | PREFETCHT0 = 3351, |
| 3365 | PREFETCHT1 = 3352, |
| 3366 | PREFETCHT2 = 3353, |
| 3367 | PREFETCHW = 3354, |
| 3368 | PREFETCHWT1 = 3355, |
| 3369 | PROBED_ALLOCA_32 = 3356, |
| 3370 | PROBED_ALLOCA_64 = 3357, |
| 3371 | PSADBWrm = 3358, |
| 3372 | PSADBWrr = 3359, |
| 3373 | PSHUFBrm = 3360, |
| 3374 | PSHUFBrr = 3361, |
| 3375 | PSHUFDmi = 3362, |
| 3376 | PSHUFDri = 3363, |
| 3377 | PSHUFHWmi = 3364, |
| 3378 | PSHUFHWri = 3365, |
| 3379 | PSHUFLWmi = 3366, |
| 3380 | PSHUFLWri = 3367, |
| 3381 | PSIGNBrm = 3368, |
| 3382 | PSIGNBrr = 3369, |
| 3383 | PSIGNDrm = 3370, |
| 3384 | PSIGNDrr = 3371, |
| 3385 | PSIGNWrm = 3372, |
| 3386 | PSIGNWrr = 3373, |
| 3387 | PSLLDQri = 3374, |
| 3388 | PSLLDri = 3375, |
| 3389 | PSLLDrm = 3376, |
| 3390 | PSLLDrr = 3377, |
| 3391 | PSLLQri = 3378, |
| 3392 | PSLLQrm = 3379, |
| 3393 | PSLLQrr = 3380, |
| 3394 | PSLLWri = 3381, |
| 3395 | PSLLWrm = 3382, |
| 3396 | PSLLWrr = 3383, |
| 3397 | PSMASH = 3384, |
| 3398 | PSRADri = 3385, |
| 3399 | PSRADrm = 3386, |
| 3400 | PSRADrr = 3387, |
| 3401 | PSRAWri = 3388, |
| 3402 | PSRAWrm = 3389, |
| 3403 | PSRAWrr = 3390, |
| 3404 | PSRLDQri = 3391, |
| 3405 | PSRLDri = 3392, |
| 3406 | PSRLDrm = 3393, |
| 3407 | PSRLDrr = 3394, |
| 3408 | PSRLQri = 3395, |
| 3409 | PSRLQrm = 3396, |
| 3410 | PSRLQrr = 3397, |
| 3411 | PSRLWri = 3398, |
| 3412 | PSRLWrm = 3399, |
| 3413 | PSRLWrr = 3400, |
| 3414 | PSUBBrm = 3401, |
| 3415 | PSUBBrr = 3402, |
| 3416 | PSUBDrm = 3403, |
| 3417 | PSUBDrr = 3404, |
| 3418 | PSUBQrm = 3405, |
| 3419 | PSUBQrr = 3406, |
| 3420 | PSUBSBrm = 3407, |
| 3421 | PSUBSBrr = 3408, |
| 3422 | PSUBSWrm = 3409, |
| 3423 | PSUBSWrr = 3410, |
| 3424 | PSUBUSBrm = 3411, |
| 3425 | PSUBUSBrr = 3412, |
| 3426 | PSUBUSWrm = 3413, |
| 3427 | PSUBUSWrr = 3414, |
| 3428 | PSUBWrm = 3415, |
| 3429 | PSUBWrr = 3416, |
| 3430 | PSWAPDrm = 3417, |
| 3431 | PSWAPDrr = 3418, |
| 3432 | PT2RPNTLVWZ0 = 3419, |
| 3433 | PT2RPNTLVWZ0RS = 3420, |
| 3434 | PT2RPNTLVWZ0RST1 = 3421, |
| 3435 | PT2RPNTLVWZ0T1 = 3422, |
| 3436 | PT2RPNTLVWZ1 = 3423, |
| 3437 | PT2RPNTLVWZ1RS = 3424, |
| 3438 | PT2RPNTLVWZ1RST1 = 3425, |
| 3439 | PT2RPNTLVWZ1T1 = 3426, |
| 3440 | PTCMMIMFP16PS = 3427, |
| 3441 | PTCMMIMFP16PSV = 3428, |
| 3442 | PTCMMRLFP16PS = 3429, |
| 3443 | PTCMMRLFP16PSV = 3430, |
| 3444 | PTCONJTCMMIMFP16PS = 3431, |
| 3445 | PTCONJTCMMIMFP16PSV = 3432, |
| 3446 | PTCONJTFP16 = 3433, |
| 3447 | PTCONJTFP16V = 3434, |
| 3448 | PTCVTROWD2PSrre = 3435, |
| 3449 | PTCVTROWD2PSrreV = 3436, |
| 3450 | PTCVTROWD2PSrri = 3437, |
| 3451 | PTCVTROWD2PSrriV = 3438, |
| 3452 | PTCVTROWPS2BF16Hrre = 3439, |
| 3453 | PTCVTROWPS2BF16HrreV = 3440, |
| 3454 | PTCVTROWPS2BF16Hrri = 3441, |
| 3455 | PTCVTROWPS2BF16HrriV = 3442, |
| 3456 | PTCVTROWPS2BF16Lrre = 3443, |
| 3457 | PTCVTROWPS2BF16LrreV = 3444, |
| 3458 | PTCVTROWPS2BF16Lrri = 3445, |
| 3459 | PTCVTROWPS2BF16LrriV = 3446, |
| 3460 | PTCVTROWPS2PHHrre = 3447, |
| 3461 | PTCVTROWPS2PHHrreV = 3448, |
| 3462 | PTCVTROWPS2PHHrri = 3449, |
| 3463 | PTCVTROWPS2PHHrriV = 3450, |
| 3464 | PTCVTROWPS2PHLrre = 3451, |
| 3465 | PTCVTROWPS2PHLrreV = 3452, |
| 3466 | PTCVTROWPS2PHLrri = 3453, |
| 3467 | PTCVTROWPS2PHLrriV = 3454, |
| 3468 | PTDPBF16PS = 3455, |
| 3469 | PTDPBF8PS = 3456, |
| 3470 | PTDPBF8PSV = 3457, |
| 3471 | PTDPBHF8PS = 3458, |
| 3472 | PTDPBHF8PSV = 3459, |
| 3473 | PTDPBSSD = 3460, |
| 3474 | PTDPBSUD = 3461, |
| 3475 | PTDPBUSD = 3462, |
| 3476 | PTDPBUUD = 3463, |
| 3477 | PTDPFP16PS = 3464, |
| 3478 | PTDPHBF8PS = 3465, |
| 3479 | PTDPHBF8PSV = 3466, |
| 3480 | PTDPHF8PS = 3467, |
| 3481 | PTDPHF8PSV = 3468, |
| 3482 | PTESTrm = 3469, |
| 3483 | PTESTrr = 3470, |
| 3484 | PTILELOADD = 3471, |
| 3485 | PTILELOADDRS = 3472, |
| 3486 | PTILELOADDRST1 = 3473, |
| 3487 | PTILELOADDT1 = 3474, |
| 3488 | PTILEMOVROWrre = 3475, |
| 3489 | PTILEMOVROWrreV = 3476, |
| 3490 | PTILEMOVROWrri = 3477, |
| 3491 | PTILEMOVROWrriV = 3478, |
| 3492 | PTILESTORED = 3479, |
| 3493 | PTILEZERO = 3480, |
| 3494 | PTMMULTF32PS = 3481, |
| 3495 | PTMMULTF32PSV = 3482, |
| 3496 | PTTCMMIMFP16PS = 3483, |
| 3497 | PTTCMMIMFP16PSV = 3484, |
| 3498 | PTTCMMRLFP16PS = 3485, |
| 3499 | PTTCMMRLFP16PSV = 3486, |
| 3500 | PTTDPBF16PS = 3487, |
| 3501 | PTTDPBF16PSV = 3488, |
| 3502 | PTTDPFP16PS = 3489, |
| 3503 | PTTDPFP16PSV = 3490, |
| 3504 | PTTMMULTF32PS = 3491, |
| 3505 | PTTMMULTF32PSV = 3492, |
| 3506 | PTTRANSPOSED = 3493, |
| 3507 | PTTRANSPOSEDV = 3494, |
| 3508 | PTWRITE64m = 3495, |
| 3509 | PTWRITE64r = 3496, |
| 3510 | PTWRITEm = 3497, |
| 3511 | PTWRITEr = 3498, |
| 3512 | PUNPCKHBWrm = 3499, |
| 3513 | PUNPCKHBWrr = 3500, |
| 3514 | PUNPCKHDQrm = 3501, |
| 3515 | PUNPCKHDQrr = 3502, |
| 3516 | PUNPCKHQDQrm = 3503, |
| 3517 | PUNPCKHQDQrr = 3504, |
| 3518 | PUNPCKHWDrm = 3505, |
| 3519 | PUNPCKHWDrr = 3506, |
| 3520 | PUNPCKLBWrm = 3507, |
| 3521 | PUNPCKLBWrr = 3508, |
| 3522 | PUNPCKLDQrm = 3509, |
| 3523 | PUNPCKLDQrr = 3510, |
| 3524 | PUNPCKLQDQrm = 3511, |
| 3525 | PUNPCKLQDQrr = 3512, |
| 3526 | PUNPCKLWDrm = 3513, |
| 3527 | PUNPCKLWDrr = 3514, |
| 3528 | PUSH16i = 3515, |
| 3529 | PUSH16i8 = 3516, |
| 3530 | PUSH16r = 3517, |
| 3531 | PUSH16rmm = 3518, |
| 3532 | PUSH16rmr = 3519, |
| 3533 | PUSH2 = 3520, |
| 3534 | PUSH2P = 3521, |
| 3535 | PUSH32i = 3522, |
| 3536 | PUSH32i8 = 3523, |
| 3537 | PUSH32r = 3524, |
| 3538 | PUSH32rmm = 3525, |
| 3539 | PUSH32rmr = 3526, |
| 3540 | PUSH64i32 = 3527, |
| 3541 | PUSH64i8 = 3528, |
| 3542 | PUSH64r = 3529, |
| 3543 | PUSH64rmm = 3530, |
| 3544 | PUSH64rmr = 3531, |
| 3545 | PUSHA16 = 3532, |
| 3546 | PUSHA32 = 3533, |
| 3547 | PUSHCS16 = 3534, |
| 3548 | PUSHCS32 = 3535, |
| 3549 | PUSHDS16 = 3536, |
| 3550 | PUSHDS32 = 3537, |
| 3551 | PUSHES16 = 3538, |
| 3552 | PUSHES32 = 3539, |
| 3553 | PUSHF16 = 3540, |
| 3554 | PUSHF32 = 3541, |
| 3555 | PUSHF64 = 3542, |
| 3556 | PUSHFS16 = 3543, |
| 3557 | PUSHFS32 = 3544, |
| 3558 | PUSHFS64 = 3545, |
| 3559 | PUSHGS16 = 3546, |
| 3560 | PUSHGS32 = 3547, |
| 3561 | PUSHGS64 = 3548, |
| 3562 | PUSHP64r = 3549, |
| 3563 | PUSHSS16 = 3550, |
| 3564 | PUSHSS32 = 3551, |
| 3565 | PVALIDATE32 = 3552, |
| 3566 | PVALIDATE64 = 3553, |
| 3567 | PXORrm = 3554, |
| 3568 | PXORrr = 3555, |
| 3569 | RCL16m1 = 3556, |
| 3570 | RCL16m1_EVEX = 3557, |
| 3571 | RCL16m1_ND = 3558, |
| 3572 | RCL16mCL = 3559, |
| 3573 | RCL16mCL_EVEX = 3560, |
| 3574 | RCL16mCL_ND = 3561, |
| 3575 | RCL16mi = 3562, |
| 3576 | RCL16mi_EVEX = 3563, |
| 3577 | RCL16mi_ND = 3564, |
| 3578 | RCL16r1 = 3565, |
| 3579 | RCL16r1_EVEX = 3566, |
| 3580 | RCL16r1_ND = 3567, |
| 3581 | RCL16rCL = 3568, |
| 3582 | RCL16rCL_EVEX = 3569, |
| 3583 | RCL16rCL_ND = 3570, |
| 3584 | RCL16ri = 3571, |
| 3585 | RCL16ri_EVEX = 3572, |
| 3586 | RCL16ri_ND = 3573, |
| 3587 | RCL32m1 = 3574, |
| 3588 | RCL32m1_EVEX = 3575, |
| 3589 | RCL32m1_ND = 3576, |
| 3590 | RCL32mCL = 3577, |
| 3591 | RCL32mCL_EVEX = 3578, |
| 3592 | RCL32mCL_ND = 3579, |
| 3593 | RCL32mi = 3580, |
| 3594 | RCL32mi_EVEX = 3581, |
| 3595 | RCL32mi_ND = 3582, |
| 3596 | RCL32r1 = 3583, |
| 3597 | RCL32r1_EVEX = 3584, |
| 3598 | RCL32r1_ND = 3585, |
| 3599 | RCL32rCL = 3586, |
| 3600 | RCL32rCL_EVEX = 3587, |
| 3601 | RCL32rCL_ND = 3588, |
| 3602 | RCL32ri = 3589, |
| 3603 | RCL32ri_EVEX = 3590, |
| 3604 | RCL32ri_ND = 3591, |
| 3605 | RCL64m1 = 3592, |
| 3606 | RCL64m1_EVEX = 3593, |
| 3607 | RCL64m1_ND = 3594, |
| 3608 | RCL64mCL = 3595, |
| 3609 | RCL64mCL_EVEX = 3596, |
| 3610 | RCL64mCL_ND = 3597, |
| 3611 | RCL64mi = 3598, |
| 3612 | RCL64mi_EVEX = 3599, |
| 3613 | RCL64mi_ND = 3600, |
| 3614 | RCL64r1 = 3601, |
| 3615 | RCL64r1_EVEX = 3602, |
| 3616 | RCL64r1_ND = 3603, |
| 3617 | RCL64rCL = 3604, |
| 3618 | RCL64rCL_EVEX = 3605, |
| 3619 | RCL64rCL_ND = 3606, |
| 3620 | RCL64ri = 3607, |
| 3621 | RCL64ri_EVEX = 3608, |
| 3622 | RCL64ri_ND = 3609, |
| 3623 | RCL8m1 = 3610, |
| 3624 | RCL8m1_EVEX = 3611, |
| 3625 | RCL8m1_ND = 3612, |
| 3626 | RCL8mCL = 3613, |
| 3627 | RCL8mCL_EVEX = 3614, |
| 3628 | RCL8mCL_ND = 3615, |
| 3629 | RCL8mi = 3616, |
| 3630 | RCL8mi_EVEX = 3617, |
| 3631 | RCL8mi_ND = 3618, |
| 3632 | RCL8r1 = 3619, |
| 3633 | RCL8r1_EVEX = 3620, |
| 3634 | RCL8r1_ND = 3621, |
| 3635 | RCL8rCL = 3622, |
| 3636 | RCL8rCL_EVEX = 3623, |
| 3637 | RCL8rCL_ND = 3624, |
| 3638 | RCL8ri = 3625, |
| 3639 | RCL8ri_EVEX = 3626, |
| 3640 | RCL8ri_ND = 3627, |
| 3641 | RCPPSm = 3628, |
| 3642 | RCPPSr = 3629, |
| 3643 | RCPSSm = 3630, |
| 3644 | RCPSSm_Int = 3631, |
| 3645 | RCPSSr = 3632, |
| 3646 | RCPSSr_Int = 3633, |
| 3647 | RCR16m1 = 3634, |
| 3648 | RCR16m1_EVEX = 3635, |
| 3649 | RCR16m1_ND = 3636, |
| 3650 | RCR16mCL = 3637, |
| 3651 | RCR16mCL_EVEX = 3638, |
| 3652 | RCR16mCL_ND = 3639, |
| 3653 | RCR16mi = 3640, |
| 3654 | RCR16mi_EVEX = 3641, |
| 3655 | RCR16mi_ND = 3642, |
| 3656 | RCR16r1 = 3643, |
| 3657 | RCR16r1_EVEX = 3644, |
| 3658 | RCR16r1_ND = 3645, |
| 3659 | RCR16rCL = 3646, |
| 3660 | RCR16rCL_EVEX = 3647, |
| 3661 | RCR16rCL_ND = 3648, |
| 3662 | RCR16ri = 3649, |
| 3663 | RCR16ri_EVEX = 3650, |
| 3664 | RCR16ri_ND = 3651, |
| 3665 | RCR32m1 = 3652, |
| 3666 | RCR32m1_EVEX = 3653, |
| 3667 | RCR32m1_ND = 3654, |
| 3668 | RCR32mCL = 3655, |
| 3669 | RCR32mCL_EVEX = 3656, |
| 3670 | RCR32mCL_ND = 3657, |
| 3671 | RCR32mi = 3658, |
| 3672 | RCR32mi_EVEX = 3659, |
| 3673 | RCR32mi_ND = 3660, |
| 3674 | RCR32r1 = 3661, |
| 3675 | RCR32r1_EVEX = 3662, |
| 3676 | RCR32r1_ND = 3663, |
| 3677 | RCR32rCL = 3664, |
| 3678 | RCR32rCL_EVEX = 3665, |
| 3679 | RCR32rCL_ND = 3666, |
| 3680 | RCR32ri = 3667, |
| 3681 | RCR32ri_EVEX = 3668, |
| 3682 | RCR32ri_ND = 3669, |
| 3683 | RCR64m1 = 3670, |
| 3684 | RCR64m1_EVEX = 3671, |
| 3685 | RCR64m1_ND = 3672, |
| 3686 | RCR64mCL = 3673, |
| 3687 | RCR64mCL_EVEX = 3674, |
| 3688 | RCR64mCL_ND = 3675, |
| 3689 | RCR64mi = 3676, |
| 3690 | RCR64mi_EVEX = 3677, |
| 3691 | RCR64mi_ND = 3678, |
| 3692 | RCR64r1 = 3679, |
| 3693 | RCR64r1_EVEX = 3680, |
| 3694 | RCR64r1_ND = 3681, |
| 3695 | RCR64rCL = 3682, |
| 3696 | RCR64rCL_EVEX = 3683, |
| 3697 | RCR64rCL_ND = 3684, |
| 3698 | RCR64ri = 3685, |
| 3699 | RCR64ri_EVEX = 3686, |
| 3700 | RCR64ri_ND = 3687, |
| 3701 | RCR8m1 = 3688, |
| 3702 | RCR8m1_EVEX = 3689, |
| 3703 | RCR8m1_ND = 3690, |
| 3704 | RCR8mCL = 3691, |
| 3705 | RCR8mCL_EVEX = 3692, |
| 3706 | RCR8mCL_ND = 3693, |
| 3707 | RCR8mi = 3694, |
| 3708 | RCR8mi_EVEX = 3695, |
| 3709 | RCR8mi_ND = 3696, |
| 3710 | RCR8r1 = 3697, |
| 3711 | RCR8r1_EVEX = 3698, |
| 3712 | RCR8r1_ND = 3699, |
| 3713 | RCR8rCL = 3700, |
| 3714 | RCR8rCL_EVEX = 3701, |
| 3715 | RCR8rCL_ND = 3702, |
| 3716 | RCR8ri = 3703, |
| 3717 | RCR8ri_EVEX = 3704, |
| 3718 | RCR8ri_ND = 3705, |
| 3719 | RDFSBASE = 3706, |
| 3720 | RDFSBASE64 = 3707, |
| 3721 | RDGSBASE = 3708, |
| 3722 | RDGSBASE64 = 3709, |
| 3723 | RDMSR = 3710, |
| 3724 | RDMSRLIST = 3711, |
| 3725 | RDMSRri = 3712, |
| 3726 | RDMSRri_EVEX = 3713, |
| 3727 | RDPID32 = 3714, |
| 3728 | RDPID64 = 3715, |
| 3729 | RDPKRUr = 3716, |
| 3730 | RDPMC = 3717, |
| 3731 | RDPRU = 3718, |
| 3732 | RDRAND16r = 3719, |
| 3733 | RDRAND32r = 3720, |
| 3734 | RDRAND64r = 3721, |
| 3735 | RDSEED16r = 3722, |
| 3736 | RDSEED32r = 3723, |
| 3737 | RDSEED64r = 3724, |
| 3738 | RDSSPD = 3725, |
| 3739 | RDSSPQ = 3726, |
| 3740 | RDTSC = 3727, |
| 3741 | RDTSCP = 3728, |
| 3742 | REPNE_PREFIX = 3729, |
| 3743 | REP_MOVSB_32 = 3730, |
| 3744 | REP_MOVSB_64 = 3731, |
| 3745 | REP_MOVSD_32 = 3732, |
| 3746 | REP_MOVSD_64 = 3733, |
| 3747 | REP_MOVSQ_32 = 3734, |
| 3748 | REP_MOVSQ_64 = 3735, |
| 3749 | REP_MOVSW_32 = 3736, |
| 3750 | REP_MOVSW_64 = 3737, |
| 3751 | REP_PREFIX = 3738, |
| 3752 | REP_STOSB_32 = 3739, |
| 3753 | REP_STOSB_64 = 3740, |
| 3754 | REP_STOSD_32 = 3741, |
| 3755 | REP_STOSD_64 = 3742, |
| 3756 | REP_STOSQ_32 = 3743, |
| 3757 | REP_STOSQ_64 = 3744, |
| 3758 | REP_STOSW_32 = 3745, |
| 3759 | REP_STOSW_64 = 3746, |
| 3760 | RET = 3747, |
| 3761 | RET16 = 3748, |
| 3762 | RET32 = 3749, |
| 3763 | RET64 = 3750, |
| 3764 | RETI16 = 3751, |
| 3765 | RETI32 = 3752, |
| 3766 | RETI64 = 3753, |
| 3767 | REX64_PREFIX = 3754, |
| 3768 | RMPADJUST = 3755, |
| 3769 | RMPQUERY = 3756, |
| 3770 | RMPUPDATE = 3757, |
| 3771 | ROL16m1 = 3758, |
| 3772 | ROL16m1_EVEX = 3759, |
| 3773 | ROL16m1_ND = 3760, |
| 3774 | ROL16m1_NF = 3761, |
| 3775 | ROL16m1_NF_ND = 3762, |
| 3776 | ROL16mCL = 3763, |
| 3777 | ROL16mCL_EVEX = 3764, |
| 3778 | ROL16mCL_ND = 3765, |
| 3779 | ROL16mCL_NF = 3766, |
| 3780 | ROL16mCL_NF_ND = 3767, |
| 3781 | ROL16mi = 3768, |
| 3782 | ROL16mi_EVEX = 3769, |
| 3783 | ROL16mi_ND = 3770, |
| 3784 | ROL16mi_NF = 3771, |
| 3785 | ROL16mi_NF_ND = 3772, |
| 3786 | ROL16r1 = 3773, |
| 3787 | ROL16r1_EVEX = 3774, |
| 3788 | ROL16r1_ND = 3775, |
| 3789 | ROL16r1_NF = 3776, |
| 3790 | ROL16r1_NF_ND = 3777, |
| 3791 | ROL16rCL = 3778, |
| 3792 | ROL16rCL_EVEX = 3779, |
| 3793 | ROL16rCL_ND = 3780, |
| 3794 | ROL16rCL_NF = 3781, |
| 3795 | ROL16rCL_NF_ND = 3782, |
| 3796 | ROL16ri = 3783, |
| 3797 | ROL16ri_EVEX = 3784, |
| 3798 | ROL16ri_ND = 3785, |
| 3799 | ROL16ri_NF = 3786, |
| 3800 | ROL16ri_NF_ND = 3787, |
| 3801 | ROL32m1 = 3788, |
| 3802 | ROL32m1_EVEX = 3789, |
| 3803 | ROL32m1_ND = 3790, |
| 3804 | ROL32m1_NF = 3791, |
| 3805 | ROL32m1_NF_ND = 3792, |
| 3806 | ROL32mCL = 3793, |
| 3807 | ROL32mCL_EVEX = 3794, |
| 3808 | ROL32mCL_ND = 3795, |
| 3809 | ROL32mCL_NF = 3796, |
| 3810 | ROL32mCL_NF_ND = 3797, |
| 3811 | ROL32mi = 3798, |
| 3812 | ROL32mi_EVEX = 3799, |
| 3813 | ROL32mi_ND = 3800, |
| 3814 | ROL32mi_NF = 3801, |
| 3815 | ROL32mi_NF_ND = 3802, |
| 3816 | ROL32r1 = 3803, |
| 3817 | ROL32r1_EVEX = 3804, |
| 3818 | ROL32r1_ND = 3805, |
| 3819 | ROL32r1_NF = 3806, |
| 3820 | ROL32r1_NF_ND = 3807, |
| 3821 | ROL32rCL = 3808, |
| 3822 | ROL32rCL_EVEX = 3809, |
| 3823 | ROL32rCL_ND = 3810, |
| 3824 | ROL32rCL_NF = 3811, |
| 3825 | ROL32rCL_NF_ND = 3812, |
| 3826 | ROL32ri = 3813, |
| 3827 | ROL32ri_EVEX = 3814, |
| 3828 | ROL32ri_ND = 3815, |
| 3829 | ROL32ri_NF = 3816, |
| 3830 | ROL32ri_NF_ND = 3817, |
| 3831 | ROL64m1 = 3818, |
| 3832 | ROL64m1_EVEX = 3819, |
| 3833 | ROL64m1_ND = 3820, |
| 3834 | ROL64m1_NF = 3821, |
| 3835 | ROL64m1_NF_ND = 3822, |
| 3836 | ROL64mCL = 3823, |
| 3837 | ROL64mCL_EVEX = 3824, |
| 3838 | ROL64mCL_ND = 3825, |
| 3839 | ROL64mCL_NF = 3826, |
| 3840 | ROL64mCL_NF_ND = 3827, |
| 3841 | ROL64mi = 3828, |
| 3842 | ROL64mi_EVEX = 3829, |
| 3843 | ROL64mi_ND = 3830, |
| 3844 | ROL64mi_NF = 3831, |
| 3845 | ROL64mi_NF_ND = 3832, |
| 3846 | ROL64r1 = 3833, |
| 3847 | ROL64r1_EVEX = 3834, |
| 3848 | ROL64r1_ND = 3835, |
| 3849 | ROL64r1_NF = 3836, |
| 3850 | ROL64r1_NF_ND = 3837, |
| 3851 | ROL64rCL = 3838, |
| 3852 | ROL64rCL_EVEX = 3839, |
| 3853 | ROL64rCL_ND = 3840, |
| 3854 | ROL64rCL_NF = 3841, |
| 3855 | ROL64rCL_NF_ND = 3842, |
| 3856 | ROL64ri = 3843, |
| 3857 | ROL64ri_EVEX = 3844, |
| 3858 | ROL64ri_ND = 3845, |
| 3859 | ROL64ri_NF = 3846, |
| 3860 | ROL64ri_NF_ND = 3847, |
| 3861 | ROL8m1 = 3848, |
| 3862 | ROL8m1_EVEX = 3849, |
| 3863 | ROL8m1_ND = 3850, |
| 3864 | ROL8m1_NF = 3851, |
| 3865 | ROL8m1_NF_ND = 3852, |
| 3866 | ROL8mCL = 3853, |
| 3867 | ROL8mCL_EVEX = 3854, |
| 3868 | ROL8mCL_ND = 3855, |
| 3869 | ROL8mCL_NF = 3856, |
| 3870 | ROL8mCL_NF_ND = 3857, |
| 3871 | ROL8mi = 3858, |
| 3872 | ROL8mi_EVEX = 3859, |
| 3873 | ROL8mi_ND = 3860, |
| 3874 | ROL8mi_NF = 3861, |
| 3875 | ROL8mi_NF_ND = 3862, |
| 3876 | ROL8r1 = 3863, |
| 3877 | ROL8r1_EVEX = 3864, |
| 3878 | ROL8r1_ND = 3865, |
| 3879 | ROL8r1_NF = 3866, |
| 3880 | ROL8r1_NF_ND = 3867, |
| 3881 | ROL8rCL = 3868, |
| 3882 | ROL8rCL_EVEX = 3869, |
| 3883 | ROL8rCL_ND = 3870, |
| 3884 | ROL8rCL_NF = 3871, |
| 3885 | ROL8rCL_NF_ND = 3872, |
| 3886 | ROL8ri = 3873, |
| 3887 | ROL8ri_EVEX = 3874, |
| 3888 | ROL8ri_ND = 3875, |
| 3889 | ROL8ri_NF = 3876, |
| 3890 | ROL8ri_NF_ND = 3877, |
| 3891 | ROR16m1 = 3878, |
| 3892 | ROR16m1_EVEX = 3879, |
| 3893 | ROR16m1_ND = 3880, |
| 3894 | ROR16m1_NF = 3881, |
| 3895 | ROR16m1_NF_ND = 3882, |
| 3896 | ROR16mCL = 3883, |
| 3897 | ROR16mCL_EVEX = 3884, |
| 3898 | ROR16mCL_ND = 3885, |
| 3899 | ROR16mCL_NF = 3886, |
| 3900 | ROR16mCL_NF_ND = 3887, |
| 3901 | ROR16mi = 3888, |
| 3902 | ROR16mi_EVEX = 3889, |
| 3903 | ROR16mi_ND = 3890, |
| 3904 | ROR16mi_NF = 3891, |
| 3905 | ROR16mi_NF_ND = 3892, |
| 3906 | ROR16r1 = 3893, |
| 3907 | ROR16r1_EVEX = 3894, |
| 3908 | ROR16r1_ND = 3895, |
| 3909 | ROR16r1_NF = 3896, |
| 3910 | ROR16r1_NF_ND = 3897, |
| 3911 | ROR16rCL = 3898, |
| 3912 | ROR16rCL_EVEX = 3899, |
| 3913 | ROR16rCL_ND = 3900, |
| 3914 | ROR16rCL_NF = 3901, |
| 3915 | ROR16rCL_NF_ND = 3902, |
| 3916 | ROR16ri = 3903, |
| 3917 | ROR16ri_EVEX = 3904, |
| 3918 | ROR16ri_ND = 3905, |
| 3919 | ROR16ri_NF = 3906, |
| 3920 | ROR16ri_NF_ND = 3907, |
| 3921 | ROR32m1 = 3908, |
| 3922 | ROR32m1_EVEX = 3909, |
| 3923 | ROR32m1_ND = 3910, |
| 3924 | ROR32m1_NF = 3911, |
| 3925 | ROR32m1_NF_ND = 3912, |
| 3926 | ROR32mCL = 3913, |
| 3927 | ROR32mCL_EVEX = 3914, |
| 3928 | ROR32mCL_ND = 3915, |
| 3929 | ROR32mCL_NF = 3916, |
| 3930 | ROR32mCL_NF_ND = 3917, |
| 3931 | ROR32mi = 3918, |
| 3932 | ROR32mi_EVEX = 3919, |
| 3933 | ROR32mi_ND = 3920, |
| 3934 | ROR32mi_NF = 3921, |
| 3935 | ROR32mi_NF_ND = 3922, |
| 3936 | ROR32r1 = 3923, |
| 3937 | ROR32r1_EVEX = 3924, |
| 3938 | ROR32r1_ND = 3925, |
| 3939 | ROR32r1_NF = 3926, |
| 3940 | ROR32r1_NF_ND = 3927, |
| 3941 | ROR32rCL = 3928, |
| 3942 | ROR32rCL_EVEX = 3929, |
| 3943 | ROR32rCL_ND = 3930, |
| 3944 | ROR32rCL_NF = 3931, |
| 3945 | ROR32rCL_NF_ND = 3932, |
| 3946 | ROR32ri = 3933, |
| 3947 | ROR32ri_EVEX = 3934, |
| 3948 | ROR32ri_ND = 3935, |
| 3949 | ROR32ri_NF = 3936, |
| 3950 | ROR32ri_NF_ND = 3937, |
| 3951 | ROR64m1 = 3938, |
| 3952 | ROR64m1_EVEX = 3939, |
| 3953 | ROR64m1_ND = 3940, |
| 3954 | ROR64m1_NF = 3941, |
| 3955 | ROR64m1_NF_ND = 3942, |
| 3956 | ROR64mCL = 3943, |
| 3957 | ROR64mCL_EVEX = 3944, |
| 3958 | ROR64mCL_ND = 3945, |
| 3959 | ROR64mCL_NF = 3946, |
| 3960 | ROR64mCL_NF_ND = 3947, |
| 3961 | ROR64mi = 3948, |
| 3962 | ROR64mi_EVEX = 3949, |
| 3963 | ROR64mi_ND = 3950, |
| 3964 | ROR64mi_NF = 3951, |
| 3965 | ROR64mi_NF_ND = 3952, |
| 3966 | ROR64r1 = 3953, |
| 3967 | ROR64r1_EVEX = 3954, |
| 3968 | ROR64r1_ND = 3955, |
| 3969 | ROR64r1_NF = 3956, |
| 3970 | ROR64r1_NF_ND = 3957, |
| 3971 | ROR64rCL = 3958, |
| 3972 | ROR64rCL_EVEX = 3959, |
| 3973 | ROR64rCL_ND = 3960, |
| 3974 | ROR64rCL_NF = 3961, |
| 3975 | ROR64rCL_NF_ND = 3962, |
| 3976 | ROR64ri = 3963, |
| 3977 | ROR64ri_EVEX = 3964, |
| 3978 | ROR64ri_ND = 3965, |
| 3979 | ROR64ri_NF = 3966, |
| 3980 | ROR64ri_NF_ND = 3967, |
| 3981 | ROR8m1 = 3968, |
| 3982 | ROR8m1_EVEX = 3969, |
| 3983 | ROR8m1_ND = 3970, |
| 3984 | ROR8m1_NF = 3971, |
| 3985 | ROR8m1_NF_ND = 3972, |
| 3986 | ROR8mCL = 3973, |
| 3987 | ROR8mCL_EVEX = 3974, |
| 3988 | ROR8mCL_ND = 3975, |
| 3989 | ROR8mCL_NF = 3976, |
| 3990 | ROR8mCL_NF_ND = 3977, |
| 3991 | ROR8mi = 3978, |
| 3992 | ROR8mi_EVEX = 3979, |
| 3993 | ROR8mi_ND = 3980, |
| 3994 | ROR8mi_NF = 3981, |
| 3995 | ROR8mi_NF_ND = 3982, |
| 3996 | ROR8r1 = 3983, |
| 3997 | ROR8r1_EVEX = 3984, |
| 3998 | ROR8r1_ND = 3985, |
| 3999 | ROR8r1_NF = 3986, |
| 4000 | ROR8r1_NF_ND = 3987, |
| 4001 | ROR8rCL = 3988, |
| 4002 | ROR8rCL_EVEX = 3989, |
| 4003 | ROR8rCL_ND = 3990, |
| 4004 | ROR8rCL_NF = 3991, |
| 4005 | ROR8rCL_NF_ND = 3992, |
| 4006 | ROR8ri = 3993, |
| 4007 | ROR8ri_EVEX = 3994, |
| 4008 | ROR8ri_ND = 3995, |
| 4009 | ROR8ri_NF = 3996, |
| 4010 | ROR8ri_NF_ND = 3997, |
| 4011 | RORX32mi = 3998, |
| 4012 | RORX32mi_EVEX = 3999, |
| 4013 | RORX32ri = 4000, |
| 4014 | RORX32ri_EVEX = 4001, |
| 4015 | RORX64mi = 4002, |
| 4016 | RORX64mi_EVEX = 4003, |
| 4017 | RORX64ri = 4004, |
| 4018 | RORX64ri_EVEX = 4005, |
| 4019 | ROUNDPDmi = 4006, |
| 4020 | ROUNDPDri = 4007, |
| 4021 | ROUNDPSmi = 4008, |
| 4022 | ROUNDPSri = 4009, |
| 4023 | ROUNDSDmi = 4010, |
| 4024 | ROUNDSDmi_Int = 4011, |
| 4025 | ROUNDSDri = 4012, |
| 4026 | ROUNDSDri_Int = 4013, |
| 4027 | ROUNDSSmi = 4014, |
| 4028 | ROUNDSSmi_Int = 4015, |
| 4029 | ROUNDSSri = 4016, |
| 4030 | ROUNDSSri_Int = 4017, |
| 4031 | RSM = 4018, |
| 4032 | RSQRTPSm = 4019, |
| 4033 | RSQRTPSr = 4020, |
| 4034 | RSQRTSSm = 4021, |
| 4035 | RSQRTSSm_Int = 4022, |
| 4036 | RSQRTSSr = 4023, |
| 4037 | RSQRTSSr_Int = 4024, |
| 4038 | RSTORSSP = 4025, |
| 4039 | SAHF = 4026, |
| 4040 | SALC = 4027, |
| 4041 | SAR16m1 = 4028, |
| 4042 | SAR16m1_EVEX = 4029, |
| 4043 | SAR16m1_ND = 4030, |
| 4044 | SAR16m1_NF = 4031, |
| 4045 | SAR16m1_NF_ND = 4032, |
| 4046 | SAR16mCL = 4033, |
| 4047 | SAR16mCL_EVEX = 4034, |
| 4048 | SAR16mCL_ND = 4035, |
| 4049 | SAR16mCL_NF = 4036, |
| 4050 | SAR16mCL_NF_ND = 4037, |
| 4051 | SAR16mi = 4038, |
| 4052 | SAR16mi_EVEX = 4039, |
| 4053 | SAR16mi_ND = 4040, |
| 4054 | SAR16mi_NF = 4041, |
| 4055 | SAR16mi_NF_ND = 4042, |
| 4056 | SAR16r1 = 4043, |
| 4057 | SAR16r1_EVEX = 4044, |
| 4058 | SAR16r1_ND = 4045, |
| 4059 | SAR16r1_NF = 4046, |
| 4060 | SAR16r1_NF_ND = 4047, |
| 4061 | SAR16rCL = 4048, |
| 4062 | SAR16rCL_EVEX = 4049, |
| 4063 | SAR16rCL_ND = 4050, |
| 4064 | SAR16rCL_NF = 4051, |
| 4065 | SAR16rCL_NF_ND = 4052, |
| 4066 | SAR16ri = 4053, |
| 4067 | SAR16ri_EVEX = 4054, |
| 4068 | SAR16ri_ND = 4055, |
| 4069 | SAR16ri_NF = 4056, |
| 4070 | SAR16ri_NF_ND = 4057, |
| 4071 | SAR32m1 = 4058, |
| 4072 | SAR32m1_EVEX = 4059, |
| 4073 | SAR32m1_ND = 4060, |
| 4074 | SAR32m1_NF = 4061, |
| 4075 | SAR32m1_NF_ND = 4062, |
| 4076 | SAR32mCL = 4063, |
| 4077 | SAR32mCL_EVEX = 4064, |
| 4078 | SAR32mCL_ND = 4065, |
| 4079 | SAR32mCL_NF = 4066, |
| 4080 | SAR32mCL_NF_ND = 4067, |
| 4081 | SAR32mi = 4068, |
| 4082 | SAR32mi_EVEX = 4069, |
| 4083 | SAR32mi_ND = 4070, |
| 4084 | SAR32mi_NF = 4071, |
| 4085 | SAR32mi_NF_ND = 4072, |
| 4086 | SAR32r1 = 4073, |
| 4087 | SAR32r1_EVEX = 4074, |
| 4088 | SAR32r1_ND = 4075, |
| 4089 | SAR32r1_NF = 4076, |
| 4090 | SAR32r1_NF_ND = 4077, |
| 4091 | SAR32rCL = 4078, |
| 4092 | SAR32rCL_EVEX = 4079, |
| 4093 | SAR32rCL_ND = 4080, |
| 4094 | SAR32rCL_NF = 4081, |
| 4095 | SAR32rCL_NF_ND = 4082, |
| 4096 | SAR32ri = 4083, |
| 4097 | SAR32ri_EVEX = 4084, |
| 4098 | SAR32ri_ND = 4085, |
| 4099 | SAR32ri_NF = 4086, |
| 4100 | SAR32ri_NF_ND = 4087, |
| 4101 | SAR64m1 = 4088, |
| 4102 | SAR64m1_EVEX = 4089, |
| 4103 | SAR64m1_ND = 4090, |
| 4104 | SAR64m1_NF = 4091, |
| 4105 | SAR64m1_NF_ND = 4092, |
| 4106 | SAR64mCL = 4093, |
| 4107 | SAR64mCL_EVEX = 4094, |
| 4108 | SAR64mCL_ND = 4095, |
| 4109 | SAR64mCL_NF = 4096, |
| 4110 | SAR64mCL_NF_ND = 4097, |
| 4111 | SAR64mi = 4098, |
| 4112 | SAR64mi_EVEX = 4099, |
| 4113 | SAR64mi_ND = 4100, |
| 4114 | SAR64mi_NF = 4101, |
| 4115 | SAR64mi_NF_ND = 4102, |
| 4116 | SAR64r1 = 4103, |
| 4117 | SAR64r1_EVEX = 4104, |
| 4118 | SAR64r1_ND = 4105, |
| 4119 | SAR64r1_NF = 4106, |
| 4120 | SAR64r1_NF_ND = 4107, |
| 4121 | SAR64rCL = 4108, |
| 4122 | SAR64rCL_EVEX = 4109, |
| 4123 | SAR64rCL_ND = 4110, |
| 4124 | SAR64rCL_NF = 4111, |
| 4125 | SAR64rCL_NF_ND = 4112, |
| 4126 | SAR64ri = 4113, |
| 4127 | SAR64ri_EVEX = 4114, |
| 4128 | SAR64ri_ND = 4115, |
| 4129 | SAR64ri_NF = 4116, |
| 4130 | SAR64ri_NF_ND = 4117, |
| 4131 | SAR8m1 = 4118, |
| 4132 | SAR8m1_EVEX = 4119, |
| 4133 | SAR8m1_ND = 4120, |
| 4134 | SAR8m1_NF = 4121, |
| 4135 | SAR8m1_NF_ND = 4122, |
| 4136 | SAR8mCL = 4123, |
| 4137 | SAR8mCL_EVEX = 4124, |
| 4138 | SAR8mCL_ND = 4125, |
| 4139 | SAR8mCL_NF = 4126, |
| 4140 | SAR8mCL_NF_ND = 4127, |
| 4141 | SAR8mi = 4128, |
| 4142 | SAR8mi_EVEX = 4129, |
| 4143 | SAR8mi_ND = 4130, |
| 4144 | SAR8mi_NF = 4131, |
| 4145 | SAR8mi_NF_ND = 4132, |
| 4146 | SAR8r1 = 4133, |
| 4147 | SAR8r1_EVEX = 4134, |
| 4148 | SAR8r1_ND = 4135, |
| 4149 | SAR8r1_NF = 4136, |
| 4150 | SAR8r1_NF_ND = 4137, |
| 4151 | SAR8rCL = 4138, |
| 4152 | SAR8rCL_EVEX = 4139, |
| 4153 | SAR8rCL_ND = 4140, |
| 4154 | SAR8rCL_NF = 4141, |
| 4155 | SAR8rCL_NF_ND = 4142, |
| 4156 | SAR8ri = 4143, |
| 4157 | SAR8ri_EVEX = 4144, |
| 4158 | SAR8ri_ND = 4145, |
| 4159 | SAR8ri_NF = 4146, |
| 4160 | SAR8ri_NF_ND = 4147, |
| 4161 | SARX32rm = 4148, |
| 4162 | SARX32rm_EVEX = 4149, |
| 4163 | SARX32rr = 4150, |
| 4164 | SARX32rr_EVEX = 4151, |
| 4165 | SARX64rm = 4152, |
| 4166 | SARX64rm_EVEX = 4153, |
| 4167 | SARX64rr = 4154, |
| 4168 | SARX64rr_EVEX = 4155, |
| 4169 | SAVEPREVSSP = 4156, |
| 4170 | SBB16i16 = 4157, |
| 4171 | SBB16mi = 4158, |
| 4172 | SBB16mi8 = 4159, |
| 4173 | SBB16mi8_EVEX = 4160, |
| 4174 | SBB16mi8_ND = 4161, |
| 4175 | SBB16mi_EVEX = 4162, |
| 4176 | SBB16mi_ND = 4163, |
| 4177 | SBB16mr = 4164, |
| 4178 | SBB16mr_EVEX = 4165, |
| 4179 | SBB16mr_ND = 4166, |
| 4180 | SBB16ri = 4167, |
| 4181 | SBB16ri8 = 4168, |
| 4182 | SBB16ri8_EVEX = 4169, |
| 4183 | SBB16ri8_ND = 4170, |
| 4184 | SBB16ri_EVEX = 4171, |
| 4185 | SBB16ri_ND = 4172, |
| 4186 | SBB16rm = 4173, |
| 4187 | SBB16rm_EVEX = 4174, |
| 4188 | SBB16rm_ND = 4175, |
| 4189 | SBB16rr = 4176, |
| 4190 | SBB16rr_EVEX = 4177, |
| 4191 | SBB16rr_EVEX_REV = 4178, |
| 4192 | SBB16rr_ND = 4179, |
| 4193 | SBB16rr_ND_REV = 4180, |
| 4194 | SBB16rr_REV = 4181, |
| 4195 | SBB32i32 = 4182, |
| 4196 | SBB32mi = 4183, |
| 4197 | SBB32mi8 = 4184, |
| 4198 | SBB32mi8_EVEX = 4185, |
| 4199 | SBB32mi8_ND = 4186, |
| 4200 | SBB32mi_EVEX = 4187, |
| 4201 | SBB32mi_ND = 4188, |
| 4202 | SBB32mr = 4189, |
| 4203 | SBB32mr_EVEX = 4190, |
| 4204 | SBB32mr_ND = 4191, |
| 4205 | SBB32ri = 4192, |
| 4206 | SBB32ri8 = 4193, |
| 4207 | SBB32ri8_EVEX = 4194, |
| 4208 | SBB32ri8_ND = 4195, |
| 4209 | SBB32ri_EVEX = 4196, |
| 4210 | SBB32ri_ND = 4197, |
| 4211 | SBB32rm = 4198, |
| 4212 | SBB32rm_EVEX = 4199, |
| 4213 | SBB32rm_ND = 4200, |
| 4214 | SBB32rr = 4201, |
| 4215 | SBB32rr_EVEX = 4202, |
| 4216 | SBB32rr_EVEX_REV = 4203, |
| 4217 | SBB32rr_ND = 4204, |
| 4218 | SBB32rr_ND_REV = 4205, |
| 4219 | SBB32rr_REV = 4206, |
| 4220 | SBB64i32 = 4207, |
| 4221 | SBB64mi32 = 4208, |
| 4222 | SBB64mi32_EVEX = 4209, |
| 4223 | SBB64mi32_ND = 4210, |
| 4224 | SBB64mi8 = 4211, |
| 4225 | SBB64mi8_EVEX = 4212, |
| 4226 | SBB64mi8_ND = 4213, |
| 4227 | SBB64mr = 4214, |
| 4228 | SBB64mr_EVEX = 4215, |
| 4229 | SBB64mr_ND = 4216, |
| 4230 | SBB64ri32 = 4217, |
| 4231 | SBB64ri32_EVEX = 4218, |
| 4232 | SBB64ri32_ND = 4219, |
| 4233 | SBB64ri8 = 4220, |
| 4234 | SBB64ri8_EVEX = 4221, |
| 4235 | SBB64ri8_ND = 4222, |
| 4236 | SBB64rm = 4223, |
| 4237 | SBB64rm_EVEX = 4224, |
| 4238 | SBB64rm_ND = 4225, |
| 4239 | SBB64rr = 4226, |
| 4240 | SBB64rr_EVEX = 4227, |
| 4241 | SBB64rr_EVEX_REV = 4228, |
| 4242 | SBB64rr_ND = 4229, |
| 4243 | SBB64rr_ND_REV = 4230, |
| 4244 | SBB64rr_REV = 4231, |
| 4245 | SBB8i8 = 4232, |
| 4246 | SBB8mi = 4233, |
| 4247 | SBB8mi8 = 4234, |
| 4248 | SBB8mi_EVEX = 4235, |
| 4249 | SBB8mi_ND = 4236, |
| 4250 | SBB8mr = 4237, |
| 4251 | SBB8mr_EVEX = 4238, |
| 4252 | SBB8mr_ND = 4239, |
| 4253 | SBB8ri = 4240, |
| 4254 | SBB8ri8 = 4241, |
| 4255 | SBB8ri_EVEX = 4242, |
| 4256 | SBB8ri_ND = 4243, |
| 4257 | SBB8rm = 4244, |
| 4258 | SBB8rm_EVEX = 4245, |
| 4259 | SBB8rm_ND = 4246, |
| 4260 | SBB8rr = 4247, |
| 4261 | SBB8rr_EVEX = 4248, |
| 4262 | SBB8rr_EVEX_REV = 4249, |
| 4263 | SBB8rr_ND = 4250, |
| 4264 | SBB8rr_ND_REV = 4251, |
| 4265 | SBB8rr_REV = 4252, |
| 4266 | SCASB = 4253, |
| 4267 | SCASL = 4254, |
| 4268 | SCASQ = 4255, |
| 4269 | SCASW = 4256, |
| 4270 | SEAMCALL = 4257, |
| 4271 | SEAMOPS = 4258, |
| 4272 | SEAMRET = 4259, |
| 4273 | SEG_ALLOCA_32 = 4260, |
| 4274 | SEG_ALLOCA_64 = 4261, |
| 4275 | SENDUIPI = 4262, |
| 4276 | SERIALIZE = 4263, |
| 4277 | SETCCm = 4264, |
| 4278 | SETCCm_EVEX = 4265, |
| 4279 | SETCCr = 4266, |
| 4280 | SETCCr_EVEX = 4267, |
| 4281 | SETSSBSY = 4268, |
| 4282 | SETZUCCm = 4269, |
| 4283 | SETZUCCr = 4270, |
| 4284 | SFENCE = 4271, |
| 4285 | SGDT16m = 4272, |
| 4286 | SGDT32m = 4273, |
| 4287 | SGDT64m = 4274, |
| 4288 | SHA1MSG1rm = 4275, |
| 4289 | SHA1MSG1rr = 4276, |
| 4290 | SHA1MSG2rm = 4277, |
| 4291 | SHA1MSG2rr = 4278, |
| 4292 | SHA1NEXTErm = 4279, |
| 4293 | SHA1NEXTErr = 4280, |
| 4294 | SHA1RNDS4rmi = 4281, |
| 4295 | SHA1RNDS4rri = 4282, |
| 4296 | SHA256MSG1rm = 4283, |
| 4297 | SHA256MSG1rr = 4284, |
| 4298 | SHA256MSG2rm = 4285, |
| 4299 | SHA256MSG2rr = 4286, |
| 4300 | SHA256RNDS2rm = 4287, |
| 4301 | SHA256RNDS2rr = 4288, |
| 4302 | SHL16m1 = 4289, |
| 4303 | SHL16m1_EVEX = 4290, |
| 4304 | SHL16m1_ND = 4291, |
| 4305 | SHL16m1_NF = 4292, |
| 4306 | SHL16m1_NF_ND = 4293, |
| 4307 | SHL16mCL = 4294, |
| 4308 | SHL16mCL_EVEX = 4295, |
| 4309 | SHL16mCL_ND = 4296, |
| 4310 | SHL16mCL_NF = 4297, |
| 4311 | SHL16mCL_NF_ND = 4298, |
| 4312 | SHL16mi = 4299, |
| 4313 | SHL16mi_EVEX = 4300, |
| 4314 | SHL16mi_ND = 4301, |
| 4315 | SHL16mi_NF = 4302, |
| 4316 | SHL16mi_NF_ND = 4303, |
| 4317 | SHL16r1 = 4304, |
| 4318 | SHL16r1_EVEX = 4305, |
| 4319 | SHL16r1_ND = 4306, |
| 4320 | SHL16r1_NF = 4307, |
| 4321 | SHL16r1_NF_ND = 4308, |
| 4322 | SHL16rCL = 4309, |
| 4323 | SHL16rCL_EVEX = 4310, |
| 4324 | SHL16rCL_ND = 4311, |
| 4325 | SHL16rCL_NF = 4312, |
| 4326 | SHL16rCL_NF_ND = 4313, |
| 4327 | SHL16ri = 4314, |
| 4328 | SHL16ri_EVEX = 4315, |
| 4329 | SHL16ri_ND = 4316, |
| 4330 | SHL16ri_NF = 4317, |
| 4331 | SHL16ri_NF_ND = 4318, |
| 4332 | SHL32m1 = 4319, |
| 4333 | SHL32m1_EVEX = 4320, |
| 4334 | SHL32m1_ND = 4321, |
| 4335 | SHL32m1_NF = 4322, |
| 4336 | SHL32m1_NF_ND = 4323, |
| 4337 | SHL32mCL = 4324, |
| 4338 | SHL32mCL_EVEX = 4325, |
| 4339 | SHL32mCL_ND = 4326, |
| 4340 | SHL32mCL_NF = 4327, |
| 4341 | SHL32mCL_NF_ND = 4328, |
| 4342 | SHL32mi = 4329, |
| 4343 | SHL32mi_EVEX = 4330, |
| 4344 | SHL32mi_ND = 4331, |
| 4345 | SHL32mi_NF = 4332, |
| 4346 | SHL32mi_NF_ND = 4333, |
| 4347 | SHL32r1 = 4334, |
| 4348 | SHL32r1_EVEX = 4335, |
| 4349 | SHL32r1_ND = 4336, |
| 4350 | SHL32r1_NF = 4337, |
| 4351 | SHL32r1_NF_ND = 4338, |
| 4352 | SHL32rCL = 4339, |
| 4353 | SHL32rCL_EVEX = 4340, |
| 4354 | SHL32rCL_ND = 4341, |
| 4355 | SHL32rCL_NF = 4342, |
| 4356 | SHL32rCL_NF_ND = 4343, |
| 4357 | SHL32ri = 4344, |
| 4358 | SHL32ri_EVEX = 4345, |
| 4359 | SHL32ri_ND = 4346, |
| 4360 | SHL32ri_NF = 4347, |
| 4361 | SHL32ri_NF_ND = 4348, |
| 4362 | SHL64m1 = 4349, |
| 4363 | SHL64m1_EVEX = 4350, |
| 4364 | SHL64m1_ND = 4351, |
| 4365 | SHL64m1_NF = 4352, |
| 4366 | SHL64m1_NF_ND = 4353, |
| 4367 | SHL64mCL = 4354, |
| 4368 | SHL64mCL_EVEX = 4355, |
| 4369 | SHL64mCL_ND = 4356, |
| 4370 | SHL64mCL_NF = 4357, |
| 4371 | SHL64mCL_NF_ND = 4358, |
| 4372 | SHL64mi = 4359, |
| 4373 | SHL64mi_EVEX = 4360, |
| 4374 | SHL64mi_ND = 4361, |
| 4375 | SHL64mi_NF = 4362, |
| 4376 | SHL64mi_NF_ND = 4363, |
| 4377 | SHL64r1 = 4364, |
| 4378 | SHL64r1_EVEX = 4365, |
| 4379 | SHL64r1_ND = 4366, |
| 4380 | SHL64r1_NF = 4367, |
| 4381 | SHL64r1_NF_ND = 4368, |
| 4382 | SHL64rCL = 4369, |
| 4383 | SHL64rCL_EVEX = 4370, |
| 4384 | SHL64rCL_ND = 4371, |
| 4385 | SHL64rCL_NF = 4372, |
| 4386 | SHL64rCL_NF_ND = 4373, |
| 4387 | SHL64ri = 4374, |
| 4388 | SHL64ri_EVEX = 4375, |
| 4389 | SHL64ri_ND = 4376, |
| 4390 | SHL64ri_NF = 4377, |
| 4391 | SHL64ri_NF_ND = 4378, |
| 4392 | SHL8m1 = 4379, |
| 4393 | SHL8m1_EVEX = 4380, |
| 4394 | SHL8m1_ND = 4381, |
| 4395 | SHL8m1_NF = 4382, |
| 4396 | SHL8m1_NF_ND = 4383, |
| 4397 | SHL8mCL = 4384, |
| 4398 | SHL8mCL_EVEX = 4385, |
| 4399 | SHL8mCL_ND = 4386, |
| 4400 | SHL8mCL_NF = 4387, |
| 4401 | SHL8mCL_NF_ND = 4388, |
| 4402 | SHL8mi = 4389, |
| 4403 | SHL8mi_EVEX = 4390, |
| 4404 | SHL8mi_ND = 4391, |
| 4405 | SHL8mi_NF = 4392, |
| 4406 | SHL8mi_NF_ND = 4393, |
| 4407 | SHL8r1 = 4394, |
| 4408 | SHL8r1_EVEX = 4395, |
| 4409 | SHL8r1_ND = 4396, |
| 4410 | SHL8r1_NF = 4397, |
| 4411 | SHL8r1_NF_ND = 4398, |
| 4412 | SHL8rCL = 4399, |
| 4413 | SHL8rCL_EVEX = 4400, |
| 4414 | SHL8rCL_ND = 4401, |
| 4415 | SHL8rCL_NF = 4402, |
| 4416 | SHL8rCL_NF_ND = 4403, |
| 4417 | SHL8ri = 4404, |
| 4418 | SHL8ri_EVEX = 4405, |
| 4419 | SHL8ri_ND = 4406, |
| 4420 | SHL8ri_NF = 4407, |
| 4421 | SHL8ri_NF_ND = 4408, |
| 4422 | SHLD16mrCL = 4409, |
| 4423 | SHLD16mrCL_EVEX = 4410, |
| 4424 | SHLD16mrCL_ND = 4411, |
| 4425 | SHLD16mrCL_NF = 4412, |
| 4426 | SHLD16mrCL_NF_ND = 4413, |
| 4427 | SHLD16mri8 = 4414, |
| 4428 | SHLD16mri8_EVEX = 4415, |
| 4429 | SHLD16mri8_ND = 4416, |
| 4430 | SHLD16mri8_NF = 4417, |
| 4431 | SHLD16mri8_NF_ND = 4418, |
| 4432 | SHLD16rrCL = 4419, |
| 4433 | SHLD16rrCL_EVEX = 4420, |
| 4434 | SHLD16rrCL_ND = 4421, |
| 4435 | SHLD16rrCL_NF = 4422, |
| 4436 | SHLD16rrCL_NF_ND = 4423, |
| 4437 | SHLD16rri8 = 4424, |
| 4438 | SHLD16rri8_EVEX = 4425, |
| 4439 | SHLD16rri8_ND = 4426, |
| 4440 | SHLD16rri8_NF = 4427, |
| 4441 | SHLD16rri8_NF_ND = 4428, |
| 4442 | SHLD32mrCL = 4429, |
| 4443 | SHLD32mrCL_EVEX = 4430, |
| 4444 | SHLD32mrCL_ND = 4431, |
| 4445 | SHLD32mrCL_NF = 4432, |
| 4446 | SHLD32mrCL_NF_ND = 4433, |
| 4447 | SHLD32mri8 = 4434, |
| 4448 | SHLD32mri8_EVEX = 4435, |
| 4449 | SHLD32mri8_ND = 4436, |
| 4450 | SHLD32mri8_NF = 4437, |
| 4451 | SHLD32mri8_NF_ND = 4438, |
| 4452 | SHLD32rrCL = 4439, |
| 4453 | SHLD32rrCL_EVEX = 4440, |
| 4454 | SHLD32rrCL_ND = 4441, |
| 4455 | SHLD32rrCL_NF = 4442, |
| 4456 | SHLD32rrCL_NF_ND = 4443, |
| 4457 | SHLD32rri8 = 4444, |
| 4458 | SHLD32rri8_EVEX = 4445, |
| 4459 | SHLD32rri8_ND = 4446, |
| 4460 | SHLD32rri8_NF = 4447, |
| 4461 | SHLD32rri8_NF_ND = 4448, |
| 4462 | SHLD64mrCL = 4449, |
| 4463 | SHLD64mrCL_EVEX = 4450, |
| 4464 | SHLD64mrCL_ND = 4451, |
| 4465 | SHLD64mrCL_NF = 4452, |
| 4466 | SHLD64mrCL_NF_ND = 4453, |
| 4467 | SHLD64mri8 = 4454, |
| 4468 | SHLD64mri8_EVEX = 4455, |
| 4469 | SHLD64mri8_ND = 4456, |
| 4470 | SHLD64mri8_NF = 4457, |
| 4471 | SHLD64mri8_NF_ND = 4458, |
| 4472 | SHLD64rrCL = 4459, |
| 4473 | SHLD64rrCL_EVEX = 4460, |
| 4474 | SHLD64rrCL_ND = 4461, |
| 4475 | SHLD64rrCL_NF = 4462, |
| 4476 | SHLD64rrCL_NF_ND = 4463, |
| 4477 | SHLD64rri8 = 4464, |
| 4478 | SHLD64rri8_EVEX = 4465, |
| 4479 | SHLD64rri8_ND = 4466, |
| 4480 | SHLD64rri8_NF = 4467, |
| 4481 | SHLD64rri8_NF_ND = 4468, |
| 4482 | SHLX32rm = 4469, |
| 4483 | SHLX32rm_EVEX = 4470, |
| 4484 | SHLX32rr = 4471, |
| 4485 | SHLX32rr_EVEX = 4472, |
| 4486 | SHLX64rm = 4473, |
| 4487 | SHLX64rm_EVEX = 4474, |
| 4488 | SHLX64rr = 4475, |
| 4489 | SHLX64rr_EVEX = 4476, |
| 4490 | SHR16m1 = 4477, |
| 4491 | SHR16m1_EVEX = 4478, |
| 4492 | SHR16m1_ND = 4479, |
| 4493 | SHR16m1_NF = 4480, |
| 4494 | SHR16m1_NF_ND = 4481, |
| 4495 | SHR16mCL = 4482, |
| 4496 | SHR16mCL_EVEX = 4483, |
| 4497 | SHR16mCL_ND = 4484, |
| 4498 | SHR16mCL_NF = 4485, |
| 4499 | SHR16mCL_NF_ND = 4486, |
| 4500 | SHR16mi = 4487, |
| 4501 | SHR16mi_EVEX = 4488, |
| 4502 | SHR16mi_ND = 4489, |
| 4503 | SHR16mi_NF = 4490, |
| 4504 | SHR16mi_NF_ND = 4491, |
| 4505 | SHR16r1 = 4492, |
| 4506 | SHR16r1_EVEX = 4493, |
| 4507 | SHR16r1_ND = 4494, |
| 4508 | SHR16r1_NF = 4495, |
| 4509 | SHR16r1_NF_ND = 4496, |
| 4510 | SHR16rCL = 4497, |
| 4511 | SHR16rCL_EVEX = 4498, |
| 4512 | SHR16rCL_ND = 4499, |
| 4513 | SHR16rCL_NF = 4500, |
| 4514 | SHR16rCL_NF_ND = 4501, |
| 4515 | SHR16ri = 4502, |
| 4516 | SHR16ri_EVEX = 4503, |
| 4517 | SHR16ri_ND = 4504, |
| 4518 | SHR16ri_NF = 4505, |
| 4519 | SHR16ri_NF_ND = 4506, |
| 4520 | SHR32m1 = 4507, |
| 4521 | SHR32m1_EVEX = 4508, |
| 4522 | SHR32m1_ND = 4509, |
| 4523 | SHR32m1_NF = 4510, |
| 4524 | SHR32m1_NF_ND = 4511, |
| 4525 | SHR32mCL = 4512, |
| 4526 | SHR32mCL_EVEX = 4513, |
| 4527 | SHR32mCL_ND = 4514, |
| 4528 | SHR32mCL_NF = 4515, |
| 4529 | SHR32mCL_NF_ND = 4516, |
| 4530 | SHR32mi = 4517, |
| 4531 | SHR32mi_EVEX = 4518, |
| 4532 | SHR32mi_ND = 4519, |
| 4533 | SHR32mi_NF = 4520, |
| 4534 | SHR32mi_NF_ND = 4521, |
| 4535 | SHR32r1 = 4522, |
| 4536 | SHR32r1_EVEX = 4523, |
| 4537 | SHR32r1_ND = 4524, |
| 4538 | SHR32r1_NF = 4525, |
| 4539 | SHR32r1_NF_ND = 4526, |
| 4540 | SHR32rCL = 4527, |
| 4541 | SHR32rCL_EVEX = 4528, |
| 4542 | SHR32rCL_ND = 4529, |
| 4543 | SHR32rCL_NF = 4530, |
| 4544 | SHR32rCL_NF_ND = 4531, |
| 4545 | SHR32ri = 4532, |
| 4546 | SHR32ri_EVEX = 4533, |
| 4547 | SHR32ri_ND = 4534, |
| 4548 | SHR32ri_NF = 4535, |
| 4549 | SHR32ri_NF_ND = 4536, |
| 4550 | SHR64m1 = 4537, |
| 4551 | SHR64m1_EVEX = 4538, |
| 4552 | SHR64m1_ND = 4539, |
| 4553 | SHR64m1_NF = 4540, |
| 4554 | SHR64m1_NF_ND = 4541, |
| 4555 | SHR64mCL = 4542, |
| 4556 | SHR64mCL_EVEX = 4543, |
| 4557 | SHR64mCL_ND = 4544, |
| 4558 | SHR64mCL_NF = 4545, |
| 4559 | SHR64mCL_NF_ND = 4546, |
| 4560 | SHR64mi = 4547, |
| 4561 | SHR64mi_EVEX = 4548, |
| 4562 | SHR64mi_ND = 4549, |
| 4563 | SHR64mi_NF = 4550, |
| 4564 | SHR64mi_NF_ND = 4551, |
| 4565 | SHR64r1 = 4552, |
| 4566 | SHR64r1_EVEX = 4553, |
| 4567 | SHR64r1_ND = 4554, |
| 4568 | SHR64r1_NF = 4555, |
| 4569 | SHR64r1_NF_ND = 4556, |
| 4570 | SHR64rCL = 4557, |
| 4571 | SHR64rCL_EVEX = 4558, |
| 4572 | SHR64rCL_ND = 4559, |
| 4573 | SHR64rCL_NF = 4560, |
| 4574 | SHR64rCL_NF_ND = 4561, |
| 4575 | SHR64ri = 4562, |
| 4576 | SHR64ri_EVEX = 4563, |
| 4577 | SHR64ri_ND = 4564, |
| 4578 | SHR64ri_NF = 4565, |
| 4579 | SHR64ri_NF_ND = 4566, |
| 4580 | SHR8m1 = 4567, |
| 4581 | SHR8m1_EVEX = 4568, |
| 4582 | SHR8m1_ND = 4569, |
| 4583 | SHR8m1_NF = 4570, |
| 4584 | SHR8m1_NF_ND = 4571, |
| 4585 | SHR8mCL = 4572, |
| 4586 | SHR8mCL_EVEX = 4573, |
| 4587 | SHR8mCL_ND = 4574, |
| 4588 | SHR8mCL_NF = 4575, |
| 4589 | SHR8mCL_NF_ND = 4576, |
| 4590 | SHR8mi = 4577, |
| 4591 | SHR8mi_EVEX = 4578, |
| 4592 | SHR8mi_ND = 4579, |
| 4593 | SHR8mi_NF = 4580, |
| 4594 | SHR8mi_NF_ND = 4581, |
| 4595 | SHR8r1 = 4582, |
| 4596 | SHR8r1_EVEX = 4583, |
| 4597 | SHR8r1_ND = 4584, |
| 4598 | SHR8r1_NF = 4585, |
| 4599 | SHR8r1_NF_ND = 4586, |
| 4600 | SHR8rCL = 4587, |
| 4601 | SHR8rCL_EVEX = 4588, |
| 4602 | SHR8rCL_ND = 4589, |
| 4603 | SHR8rCL_NF = 4590, |
| 4604 | SHR8rCL_NF_ND = 4591, |
| 4605 | SHR8ri = 4592, |
| 4606 | SHR8ri_EVEX = 4593, |
| 4607 | SHR8ri_ND = 4594, |
| 4608 | SHR8ri_NF = 4595, |
| 4609 | SHR8ri_NF_ND = 4596, |
| 4610 | SHRD16mrCL = 4597, |
| 4611 | SHRD16mrCL_EVEX = 4598, |
| 4612 | SHRD16mrCL_ND = 4599, |
| 4613 | SHRD16mrCL_NF = 4600, |
| 4614 | SHRD16mrCL_NF_ND = 4601, |
| 4615 | SHRD16mri8 = 4602, |
| 4616 | SHRD16mri8_EVEX = 4603, |
| 4617 | SHRD16mri8_ND = 4604, |
| 4618 | SHRD16mri8_NF = 4605, |
| 4619 | SHRD16mri8_NF_ND = 4606, |
| 4620 | SHRD16rrCL = 4607, |
| 4621 | SHRD16rrCL_EVEX = 4608, |
| 4622 | SHRD16rrCL_ND = 4609, |
| 4623 | SHRD16rrCL_NF = 4610, |
| 4624 | SHRD16rrCL_NF_ND = 4611, |
| 4625 | SHRD16rri8 = 4612, |
| 4626 | SHRD16rri8_EVEX = 4613, |
| 4627 | SHRD16rri8_ND = 4614, |
| 4628 | SHRD16rri8_NF = 4615, |
| 4629 | SHRD16rri8_NF_ND = 4616, |
| 4630 | SHRD32mrCL = 4617, |
| 4631 | SHRD32mrCL_EVEX = 4618, |
| 4632 | SHRD32mrCL_ND = 4619, |
| 4633 | SHRD32mrCL_NF = 4620, |
| 4634 | SHRD32mrCL_NF_ND = 4621, |
| 4635 | SHRD32mri8 = 4622, |
| 4636 | SHRD32mri8_EVEX = 4623, |
| 4637 | SHRD32mri8_ND = 4624, |
| 4638 | SHRD32mri8_NF = 4625, |
| 4639 | SHRD32mri8_NF_ND = 4626, |
| 4640 | SHRD32rrCL = 4627, |
| 4641 | SHRD32rrCL_EVEX = 4628, |
| 4642 | SHRD32rrCL_ND = 4629, |
| 4643 | SHRD32rrCL_NF = 4630, |
| 4644 | SHRD32rrCL_NF_ND = 4631, |
| 4645 | SHRD32rri8 = 4632, |
| 4646 | SHRD32rri8_EVEX = 4633, |
| 4647 | SHRD32rri8_ND = 4634, |
| 4648 | SHRD32rri8_NF = 4635, |
| 4649 | SHRD32rri8_NF_ND = 4636, |
| 4650 | SHRD64mrCL = 4637, |
| 4651 | SHRD64mrCL_EVEX = 4638, |
| 4652 | SHRD64mrCL_ND = 4639, |
| 4653 | SHRD64mrCL_NF = 4640, |
| 4654 | SHRD64mrCL_NF_ND = 4641, |
| 4655 | SHRD64mri8 = 4642, |
| 4656 | SHRD64mri8_EVEX = 4643, |
| 4657 | SHRD64mri8_ND = 4644, |
| 4658 | SHRD64mri8_NF = 4645, |
| 4659 | SHRD64mri8_NF_ND = 4646, |
| 4660 | SHRD64rrCL = 4647, |
| 4661 | SHRD64rrCL_EVEX = 4648, |
| 4662 | SHRD64rrCL_ND = 4649, |
| 4663 | SHRD64rrCL_NF = 4650, |
| 4664 | SHRD64rrCL_NF_ND = 4651, |
| 4665 | SHRD64rri8 = 4652, |
| 4666 | SHRD64rri8_EVEX = 4653, |
| 4667 | SHRD64rri8_ND = 4654, |
| 4668 | SHRD64rri8_NF = 4655, |
| 4669 | SHRD64rri8_NF_ND = 4656, |
| 4670 | SHRX32rm = 4657, |
| 4671 | SHRX32rm_EVEX = 4658, |
| 4672 | SHRX32rr = 4659, |
| 4673 | SHRX32rr_EVEX = 4660, |
| 4674 | SHRX64rm = 4661, |
| 4675 | SHRX64rm_EVEX = 4662, |
| 4676 | SHRX64rr = 4663, |
| 4677 | SHRX64rr_EVEX = 4664, |
| 4678 | SHUFPDrmi = 4665, |
| 4679 | SHUFPDrri = 4666, |
| 4680 | SHUFPSrmi = 4667, |
| 4681 | SHUFPSrri = 4668, |
| 4682 | SIDT16m = 4669, |
| 4683 | SIDT32m = 4670, |
| 4684 | SIDT64m = 4671, |
| 4685 | SKINIT = 4672, |
| 4686 | SLDT16m = 4673, |
| 4687 | SLDT16r = 4674, |
| 4688 | SLDT32r = 4675, |
| 4689 | SLDT64r = 4676, |
| 4690 | SLWPCB = 4677, |
| 4691 | SLWPCB64 = 4678, |
| 4692 | SMSW16m = 4679, |
| 4693 | SMSW16r = 4680, |
| 4694 | SMSW32r = 4681, |
| 4695 | SMSW64r = 4682, |
| 4696 | SQRTPDm = 4683, |
| 4697 | SQRTPDr = 4684, |
| 4698 | SQRTPSm = 4685, |
| 4699 | SQRTPSr = 4686, |
| 4700 | SQRTSDm = 4687, |
| 4701 | SQRTSDm_Int = 4688, |
| 4702 | SQRTSDr = 4689, |
| 4703 | SQRTSDr_Int = 4690, |
| 4704 | SQRTSSm = 4691, |
| 4705 | SQRTSSm_Int = 4692, |
| 4706 | SQRTSSr = 4693, |
| 4707 | SQRTSSr_Int = 4694, |
| 4708 | SQRT_F = 4695, |
| 4709 | SQRT_Fp32 = 4696, |
| 4710 | SQRT_Fp64 = 4697, |
| 4711 | SQRT_Fp80 = 4698, |
| 4712 | SS_PREFIX = 4699, |
| 4713 | STAC = 4700, |
| 4714 | STACKALLOC_W_PROBING = 4701, |
| 4715 | STC = 4702, |
| 4716 | STD = 4703, |
| 4717 | STGI = 4704, |
| 4718 | STI = 4705, |
| 4719 | STMXCSR = 4706, |
| 4720 | STOSB = 4707, |
| 4721 | STOSL = 4708, |
| 4722 | STOSQ = 4709, |
| 4723 | STOSW = 4710, |
| 4724 | STR16r = 4711, |
| 4725 | STR32r = 4712, |
| 4726 | STR64r = 4713, |
| 4727 | STRm = 4714, |
| 4728 | STTILECFG = 4715, |
| 4729 | STTILECFG_EVEX = 4716, |
| 4730 | STUI = 4717, |
| 4731 | ST_F32m = 4718, |
| 4732 | ST_F64m = 4719, |
| 4733 | ST_FP32m = 4720, |
| 4734 | ST_FP64m = 4721, |
| 4735 | ST_FP80m = 4722, |
| 4736 | ST_FPrr = 4723, |
| 4737 | ST_Fp32m = 4724, |
| 4738 | ST_Fp64m = 4725, |
| 4739 | ST_Fp64m32 = 4726, |
| 4740 | ST_Fp80m32 = 4727, |
| 4741 | ST_Fp80m64 = 4728, |
| 4742 | ST_FpP32m = 4729, |
| 4743 | ST_FpP64m = 4730, |
| 4744 | ST_FpP64m32 = 4731, |
| 4745 | ST_FpP80m = 4732, |
| 4746 | ST_FpP80m32 = 4733, |
| 4747 | ST_FpP80m64 = 4734, |
| 4748 | ST_Frr = 4735, |
| 4749 | SUB16i16 = 4736, |
| 4750 | SUB16mi = 4737, |
| 4751 | SUB16mi8 = 4738, |
| 4752 | SUB16mi8_EVEX = 4739, |
| 4753 | SUB16mi8_ND = 4740, |
| 4754 | SUB16mi8_NF = 4741, |
| 4755 | SUB16mi8_NF_ND = 4742, |
| 4756 | SUB16mi_EVEX = 4743, |
| 4757 | SUB16mi_ND = 4744, |
| 4758 | SUB16mi_NF = 4745, |
| 4759 | SUB16mi_NF_ND = 4746, |
| 4760 | SUB16mr = 4747, |
| 4761 | SUB16mr_EVEX = 4748, |
| 4762 | SUB16mr_ND = 4749, |
| 4763 | SUB16mr_NF = 4750, |
| 4764 | SUB16mr_NF_ND = 4751, |
| 4765 | SUB16ri = 4752, |
| 4766 | SUB16ri8 = 4753, |
| 4767 | SUB16ri8_EVEX = 4754, |
| 4768 | SUB16ri8_ND = 4755, |
| 4769 | SUB16ri8_NF = 4756, |
| 4770 | SUB16ri8_NF_ND = 4757, |
| 4771 | SUB16ri_EVEX = 4758, |
| 4772 | SUB16ri_ND = 4759, |
| 4773 | SUB16ri_NF = 4760, |
| 4774 | SUB16ri_NF_ND = 4761, |
| 4775 | SUB16rm = 4762, |
| 4776 | SUB16rm_EVEX = 4763, |
| 4777 | SUB16rm_ND = 4764, |
| 4778 | SUB16rm_NF = 4765, |
| 4779 | SUB16rm_NF_ND = 4766, |
| 4780 | SUB16rr = 4767, |
| 4781 | SUB16rr_EVEX = 4768, |
| 4782 | SUB16rr_EVEX_REV = 4769, |
| 4783 | SUB16rr_ND = 4770, |
| 4784 | SUB16rr_ND_REV = 4771, |
| 4785 | SUB16rr_NF = 4772, |
| 4786 | SUB16rr_NF_ND = 4773, |
| 4787 | SUB16rr_NF_ND_REV = 4774, |
| 4788 | SUB16rr_NF_REV = 4775, |
| 4789 | SUB16rr_REV = 4776, |
| 4790 | SUB32i32 = 4777, |
| 4791 | SUB32mi = 4778, |
| 4792 | SUB32mi8 = 4779, |
| 4793 | SUB32mi8_EVEX = 4780, |
| 4794 | SUB32mi8_ND = 4781, |
| 4795 | SUB32mi8_NF = 4782, |
| 4796 | SUB32mi8_NF_ND = 4783, |
| 4797 | SUB32mi_EVEX = 4784, |
| 4798 | SUB32mi_ND = 4785, |
| 4799 | SUB32mi_NF = 4786, |
| 4800 | SUB32mi_NF_ND = 4787, |
| 4801 | SUB32mr = 4788, |
| 4802 | SUB32mr_EVEX = 4789, |
| 4803 | SUB32mr_ND = 4790, |
| 4804 | SUB32mr_NF = 4791, |
| 4805 | SUB32mr_NF_ND = 4792, |
| 4806 | SUB32ri = 4793, |
| 4807 | SUB32ri8 = 4794, |
| 4808 | SUB32ri8_EVEX = 4795, |
| 4809 | SUB32ri8_ND = 4796, |
| 4810 | SUB32ri8_NF = 4797, |
| 4811 | SUB32ri8_NF_ND = 4798, |
| 4812 | SUB32ri_EVEX = 4799, |
| 4813 | SUB32ri_ND = 4800, |
| 4814 | SUB32ri_NF = 4801, |
| 4815 | SUB32ri_NF_ND = 4802, |
| 4816 | SUB32rm = 4803, |
| 4817 | SUB32rm_EVEX = 4804, |
| 4818 | SUB32rm_ND = 4805, |
| 4819 | SUB32rm_NF = 4806, |
| 4820 | SUB32rm_NF_ND = 4807, |
| 4821 | SUB32rr = 4808, |
| 4822 | SUB32rr_EVEX = 4809, |
| 4823 | SUB32rr_EVEX_REV = 4810, |
| 4824 | SUB32rr_ND = 4811, |
| 4825 | SUB32rr_ND_REV = 4812, |
| 4826 | SUB32rr_NF = 4813, |
| 4827 | SUB32rr_NF_ND = 4814, |
| 4828 | SUB32rr_NF_ND_REV = 4815, |
| 4829 | SUB32rr_NF_REV = 4816, |
| 4830 | SUB32rr_REV = 4817, |
| 4831 | SUB64i32 = 4818, |
| 4832 | SUB64mi32 = 4819, |
| 4833 | SUB64mi32_EVEX = 4820, |
| 4834 | SUB64mi32_ND = 4821, |
| 4835 | SUB64mi32_NF = 4822, |
| 4836 | SUB64mi32_NF_ND = 4823, |
| 4837 | SUB64mi8 = 4824, |
| 4838 | SUB64mi8_EVEX = 4825, |
| 4839 | SUB64mi8_ND = 4826, |
| 4840 | SUB64mi8_NF = 4827, |
| 4841 | SUB64mi8_NF_ND = 4828, |
| 4842 | SUB64mr = 4829, |
| 4843 | SUB64mr_EVEX = 4830, |
| 4844 | SUB64mr_ND = 4831, |
| 4845 | SUB64mr_NF = 4832, |
| 4846 | SUB64mr_NF_ND = 4833, |
| 4847 | SUB64ri32 = 4834, |
| 4848 | SUB64ri32_EVEX = 4835, |
| 4849 | SUB64ri32_ND = 4836, |
| 4850 | SUB64ri32_NF = 4837, |
| 4851 | SUB64ri32_NF_ND = 4838, |
| 4852 | SUB64ri8 = 4839, |
| 4853 | SUB64ri8_EVEX = 4840, |
| 4854 | SUB64ri8_ND = 4841, |
| 4855 | SUB64ri8_NF = 4842, |
| 4856 | SUB64ri8_NF_ND = 4843, |
| 4857 | SUB64rm = 4844, |
| 4858 | SUB64rm_EVEX = 4845, |
| 4859 | SUB64rm_ND = 4846, |
| 4860 | SUB64rm_NF = 4847, |
| 4861 | SUB64rm_NF_ND = 4848, |
| 4862 | SUB64rr = 4849, |
| 4863 | SUB64rr_EVEX = 4850, |
| 4864 | SUB64rr_EVEX_REV = 4851, |
| 4865 | SUB64rr_ND = 4852, |
| 4866 | SUB64rr_ND_REV = 4853, |
| 4867 | SUB64rr_NF = 4854, |
| 4868 | SUB64rr_NF_ND = 4855, |
| 4869 | SUB64rr_NF_ND_REV = 4856, |
| 4870 | SUB64rr_NF_REV = 4857, |
| 4871 | SUB64rr_REV = 4858, |
| 4872 | SUB8i8 = 4859, |
| 4873 | SUB8mi = 4860, |
| 4874 | SUB8mi8 = 4861, |
| 4875 | SUB8mi_EVEX = 4862, |
| 4876 | SUB8mi_ND = 4863, |
| 4877 | SUB8mi_NF = 4864, |
| 4878 | SUB8mi_NF_ND = 4865, |
| 4879 | SUB8mr = 4866, |
| 4880 | SUB8mr_EVEX = 4867, |
| 4881 | SUB8mr_ND = 4868, |
| 4882 | SUB8mr_NF = 4869, |
| 4883 | SUB8mr_NF_ND = 4870, |
| 4884 | SUB8ri = 4871, |
| 4885 | SUB8ri8 = 4872, |
| 4886 | SUB8ri_EVEX = 4873, |
| 4887 | SUB8ri_ND = 4874, |
| 4888 | SUB8ri_NF = 4875, |
| 4889 | SUB8ri_NF_ND = 4876, |
| 4890 | SUB8rm = 4877, |
| 4891 | SUB8rm_EVEX = 4878, |
| 4892 | SUB8rm_ND = 4879, |
| 4893 | SUB8rm_NF = 4880, |
| 4894 | SUB8rm_NF_ND = 4881, |
| 4895 | SUB8rr = 4882, |
| 4896 | SUB8rr_EVEX = 4883, |
| 4897 | SUB8rr_EVEX_REV = 4884, |
| 4898 | SUB8rr_ND = 4885, |
| 4899 | SUB8rr_ND_REV = 4886, |
| 4900 | SUB8rr_NF = 4887, |
| 4901 | SUB8rr_NF_ND = 4888, |
| 4902 | SUB8rr_NF_ND_REV = 4889, |
| 4903 | SUB8rr_NF_REV = 4890, |
| 4904 | SUB8rr_REV = 4891, |
| 4905 | SUBPDrm = 4892, |
| 4906 | SUBPDrr = 4893, |
| 4907 | SUBPSrm = 4894, |
| 4908 | SUBPSrr = 4895, |
| 4909 | SUBR_F32m = 4896, |
| 4910 | SUBR_F64m = 4897, |
| 4911 | SUBR_FI16m = 4898, |
| 4912 | SUBR_FI32m = 4899, |
| 4913 | SUBR_FPrST0 = 4900, |
| 4914 | SUBR_FST0r = 4901, |
| 4915 | SUBR_Fp32m = 4902, |
| 4916 | SUBR_Fp64m = 4903, |
| 4917 | SUBR_Fp64m32 = 4904, |
| 4918 | SUBR_Fp80m32 = 4905, |
| 4919 | SUBR_Fp80m64 = 4906, |
| 4920 | SUBR_FpI16m32 = 4907, |
| 4921 | SUBR_FpI16m64 = 4908, |
| 4922 | SUBR_FpI16m80 = 4909, |
| 4923 | SUBR_FpI32m32 = 4910, |
| 4924 | SUBR_FpI32m64 = 4911, |
| 4925 | SUBR_FpI32m80 = 4912, |
| 4926 | SUBR_FrST0 = 4913, |
| 4927 | SUBSDrm = 4914, |
| 4928 | SUBSDrm_Int = 4915, |
| 4929 | SUBSDrr = 4916, |
| 4930 | SUBSDrr_Int = 4917, |
| 4931 | SUBSSrm = 4918, |
| 4932 | SUBSSrm_Int = 4919, |
| 4933 | SUBSSrr = 4920, |
| 4934 | SUBSSrr_Int = 4921, |
| 4935 | SUB_F32m = 4922, |
| 4936 | SUB_F64m = 4923, |
| 4937 | SUB_FI16m = 4924, |
| 4938 | SUB_FI32m = 4925, |
| 4939 | SUB_FPrST0 = 4926, |
| 4940 | SUB_FST0r = 4927, |
| 4941 | SUB_Fp32 = 4928, |
| 4942 | SUB_Fp32m = 4929, |
| 4943 | SUB_Fp64 = 4930, |
| 4944 | SUB_Fp64m = 4931, |
| 4945 | SUB_Fp64m32 = 4932, |
| 4946 | SUB_Fp80 = 4933, |
| 4947 | SUB_Fp80m32 = 4934, |
| 4948 | SUB_Fp80m64 = 4935, |
| 4949 | SUB_FpI16m32 = 4936, |
| 4950 | SUB_FpI16m64 = 4937, |
| 4951 | SUB_FpI16m80 = 4938, |
| 4952 | SUB_FpI32m32 = 4939, |
| 4953 | SUB_FpI32m64 = 4940, |
| 4954 | SUB_FpI32m80 = 4941, |
| 4955 | SUB_FrST0 = 4942, |
| 4956 | SWAPGS = 4943, |
| 4957 | SYSCALL = 4944, |
| 4958 | SYSENTER = 4945, |
| 4959 | SYSEXIT = 4946, |
| 4960 | SYSEXIT64 = 4947, |
| 4961 | SYSRET = 4948, |
| 4962 | SYSRET64 = 4949, |
| 4963 | T1MSKC32rm = 4950, |
| 4964 | T1MSKC32rr = 4951, |
| 4965 | T1MSKC64rm = 4952, |
| 4966 | T1MSKC64rr = 4953, |
| 4967 | T2RPNTLVWZ0 = 4954, |
| 4968 | T2RPNTLVWZ0RS = 4955, |
| 4969 | T2RPNTLVWZ0RST1 = 4956, |
| 4970 | T2RPNTLVWZ0RST1_EVEX = 4957, |
| 4971 | T2RPNTLVWZ0RS_EVEX = 4958, |
| 4972 | T2RPNTLVWZ0T1 = 4959, |
| 4973 | T2RPNTLVWZ0T1_EVEX = 4960, |
| 4974 | T2RPNTLVWZ0_EVEX = 4961, |
| 4975 | T2RPNTLVWZ1 = 4962, |
| 4976 | T2RPNTLVWZ1RS = 4963, |
| 4977 | T2RPNTLVWZ1RST1 = 4964, |
| 4978 | T2RPNTLVWZ1RST1_EVEX = 4965, |
| 4979 | T2RPNTLVWZ1RS_EVEX = 4966, |
| 4980 | T2RPNTLVWZ1T1 = 4967, |
| 4981 | T2RPNTLVWZ1T1_EVEX = 4968, |
| 4982 | T2RPNTLVWZ1_EVEX = 4969, |
| 4983 | TAILJMPd = 4970, |
| 4984 | TAILJMPd64 = 4971, |
| 4985 | TAILJMPd64_CC = 4972, |
| 4986 | TAILJMPd_CC = 4973, |
| 4987 | TAILJMPm = 4974, |
| 4988 | TAILJMPm64 = 4975, |
| 4989 | TAILJMPm64_REX = 4976, |
| 4990 | TAILJMPr = 4977, |
| 4991 | TAILJMPr64 = 4978, |
| 4992 | TAILJMPr64_REX = 4979, |
| 4993 | TCMMIMFP16PS = 4980, |
| 4994 | TCMMRLFP16PS = 4981, |
| 4995 | TCONJTCMMIMFP16PS = 4982, |
| 4996 | TCONJTFP16 = 4983, |
| 4997 | TCRETURNdi = 4984, |
| 4998 | TCRETURNdi64 = 4985, |
| 4999 | TCRETURNdi64cc = 4986, |
| 5000 | TCRETURNdicc = 4987, |
| 5001 | TCRETURNmi = 4988, |
| 5002 | TCRETURNmi64 = 4989, |
| 5003 | TCRETURNri = 4990, |
| 5004 | TCRETURNri64 = 4991, |
| 5005 | TCRETURNri64_ImpCall = 4992, |
| 5006 | TCVTROWD2PSrre = 4993, |
| 5007 | TCVTROWD2PSrri = 4994, |
| 5008 | TCVTROWPS2BF16Hrre = 4995, |
| 5009 | TCVTROWPS2BF16Hrri = 4996, |
| 5010 | TCVTROWPS2BF16Lrre = 4997, |
| 5011 | TCVTROWPS2BF16Lrri = 4998, |
| 5012 | TCVTROWPS2PHHrre = 4999, |
| 5013 | TCVTROWPS2PHHrri = 5000, |
| 5014 | TCVTROWPS2PHLrre = 5001, |
| 5015 | TCVTROWPS2PHLrri = 5002, |
| 5016 | TDCALL = 5003, |
| 5017 | TDPBF16PS = 5004, |
| 5018 | TDPBF8PS = 5005, |
| 5019 | TDPBHF8PS = 5006, |
| 5020 | TDPBSSD = 5007, |
| 5021 | TDPBSUD = 5008, |
| 5022 | TDPBUSD = 5009, |
| 5023 | TDPBUUD = 5010, |
| 5024 | TDPFP16PS = 5011, |
| 5025 | TDPHBF8PS = 5012, |
| 5026 | TDPHF8PS = 5013, |
| 5027 | TEST16i16 = 5014, |
| 5028 | TEST16mi = 5015, |
| 5029 | TEST16mr = 5016, |
| 5030 | TEST16ri = 5017, |
| 5031 | TEST16rr = 5018, |
| 5032 | TEST32i32 = 5019, |
| 5033 | TEST32mi = 5020, |
| 5034 | TEST32mr = 5021, |
| 5035 | TEST32ri = 5022, |
| 5036 | TEST32rr = 5023, |
| 5037 | TEST64i32 = 5024, |
| 5038 | TEST64mi32 = 5025, |
| 5039 | TEST64mr = 5026, |
| 5040 | TEST64ri32 = 5027, |
| 5041 | TEST64rr = 5028, |
| 5042 | TEST8i8 = 5029, |
| 5043 | TEST8mi = 5030, |
| 5044 | TEST8mr = 5031, |
| 5045 | TEST8ri = 5032, |
| 5046 | TEST8rr = 5033, |
| 5047 | TESTUI = 5034, |
| 5048 | TILELOADD = 5035, |
| 5049 | TILELOADDRS = 5036, |
| 5050 | TILELOADDRST1 = 5037, |
| 5051 | TILELOADDRST1_EVEX = 5038, |
| 5052 | TILELOADDRS_EVEX = 5039, |
| 5053 | TILELOADDT1 = 5040, |
| 5054 | TILELOADDT1_EVEX = 5041, |
| 5055 | TILELOADD_EVEX = 5042, |
| 5056 | TILEMOVROWrre = 5043, |
| 5057 | TILEMOVROWrri = 5044, |
| 5058 | TILERELEASE = 5045, |
| 5059 | TILESTORED = 5046, |
| 5060 | TILESTORED_EVEX = 5047, |
| 5061 | TILEZERO = 5048, |
| 5062 | TLBSYNC = 5049, |
| 5063 | TLSCall_32 = 5050, |
| 5064 | TLSCall_64 = 5051, |
| 5065 | TLS_addr32 = 5052, |
| 5066 | TLS_addr64 = 5053, |
| 5067 | TLS_addrX32 = 5054, |
| 5068 | TLS_base_addr32 = 5055, |
| 5069 | TLS_base_addr64 = 5056, |
| 5070 | TLS_base_addrX32 = 5057, |
| 5071 | TLS_desc32 = 5058, |
| 5072 | TLS_desc64 = 5059, |
| 5073 | TMMULTF32PS = 5060, |
| 5074 | TPAUSE = 5061, |
| 5075 | TRAP = 5062, |
| 5076 | TST_F = 5063, |
| 5077 | TST_Fp32 = 5064, |
| 5078 | TST_Fp64 = 5065, |
| 5079 | TST_Fp80 = 5066, |
| 5080 | TTCMMIMFP16PS = 5067, |
| 5081 | TTCMMRLFP16PS = 5068, |
| 5082 | TTDPBF16PS = 5069, |
| 5083 | TTDPFP16PS = 5070, |
| 5084 | TTMMULTF32PS = 5071, |
| 5085 | TTRANSPOSED = 5072, |
| 5086 | TZCNT16rm = 5073, |
| 5087 | TZCNT16rm_EVEX = 5074, |
| 5088 | TZCNT16rm_NF = 5075, |
| 5089 | TZCNT16rr = 5076, |
| 5090 | TZCNT16rr_EVEX = 5077, |
| 5091 | TZCNT16rr_NF = 5078, |
| 5092 | TZCNT32rm = 5079, |
| 5093 | TZCNT32rm_EVEX = 5080, |
| 5094 | TZCNT32rm_NF = 5081, |
| 5095 | TZCNT32rr = 5082, |
| 5096 | TZCNT32rr_EVEX = 5083, |
| 5097 | TZCNT32rr_NF = 5084, |
| 5098 | TZCNT64rm = 5085, |
| 5099 | TZCNT64rm_EVEX = 5086, |
| 5100 | TZCNT64rm_NF = 5087, |
| 5101 | TZCNT64rr = 5088, |
| 5102 | TZCNT64rr_EVEX = 5089, |
| 5103 | TZCNT64rr_NF = 5090, |
| 5104 | TZMSK32rm = 5091, |
| 5105 | TZMSK32rr = 5092, |
| 5106 | TZMSK64rm = 5093, |
| 5107 | TZMSK64rr = 5094, |
| 5108 | UBSAN_UD1 = 5095, |
| 5109 | UCOMISDrm = 5096, |
| 5110 | UCOMISDrm_Int = 5097, |
| 5111 | UCOMISDrr = 5098, |
| 5112 | UCOMISDrr_Int = 5099, |
| 5113 | UCOMISSrm = 5100, |
| 5114 | UCOMISSrm_Int = 5101, |
| 5115 | UCOMISSrr = 5102, |
| 5116 | UCOMISSrr_Int = 5103, |
| 5117 | UCOM_FIPr = 5104, |
| 5118 | UCOM_FIr = 5105, |
| 5119 | UCOM_FPPr = 5106, |
| 5120 | UCOM_FPr = 5107, |
| 5121 | UCOM_FpIr32 = 5108, |
| 5122 | UCOM_FpIr64 = 5109, |
| 5123 | UCOM_FpIr80 = 5110, |
| 5124 | UCOM_Fpr32 = 5111, |
| 5125 | UCOM_Fpr64 = 5112, |
| 5126 | UCOM_Fpr80 = 5113, |
| 5127 | UCOM_Fr = 5114, |
| 5128 | UD1Lm = 5115, |
| 5129 | UD1Lr = 5116, |
| 5130 | UD1Qm = 5117, |
| 5131 | UD1Qr = 5118, |
| 5132 | UD1Wm = 5119, |
| 5133 | UD1Wr = 5120, |
| 5134 | UIRET = 5121, |
| 5135 | UMONITOR16 = 5122, |
| 5136 | UMONITOR32 = 5123, |
| 5137 | UMONITOR64 = 5124, |
| 5138 | UMWAIT = 5125, |
| 5139 | UNPCKHPDrm = 5126, |
| 5140 | UNPCKHPDrr = 5127, |
| 5141 | UNPCKHPSrm = 5128, |
| 5142 | UNPCKHPSrr = 5129, |
| 5143 | UNPCKLPDrm = 5130, |
| 5144 | UNPCKLPDrr = 5131, |
| 5145 | UNPCKLPSrm = 5132, |
| 5146 | UNPCKLPSrr = 5133, |
| 5147 | URDMSRri = 5134, |
| 5148 | URDMSRri_EVEX = 5135, |
| 5149 | URDMSRrr = 5136, |
| 5150 | URDMSRrr_EVEX = 5137, |
| 5151 | UWRMSRir = 5138, |
| 5152 | UWRMSRir_EVEX = 5139, |
| 5153 | UWRMSRrr = 5140, |
| 5154 | UWRMSRrr_EVEX = 5141, |
| 5155 | V4FMADDPSrm = 5142, |
| 5156 | V4FMADDPSrmk = 5143, |
| 5157 | V4FMADDPSrmkz = 5144, |
| 5158 | V4FMADDSSrm = 5145, |
| 5159 | V4FMADDSSrmk = 5146, |
| 5160 | V4FMADDSSrmkz = 5147, |
| 5161 | V4FNMADDPSrm = 5148, |
| 5162 | V4FNMADDPSrmk = 5149, |
| 5163 | V4FNMADDPSrmkz = 5150, |
| 5164 | V4FNMADDSSrm = 5151, |
| 5165 | V4FNMADDSSrmk = 5152, |
| 5166 | V4FNMADDSSrmkz = 5153, |
| 5167 | VAARG_64 = 5154, |
| 5168 | VAARG_X32 = 5155, |
| 5169 | VADDBF16Z128rm = 5156, |
| 5170 | VADDBF16Z128rmb = 5157, |
| 5171 | VADDBF16Z128rmbk = 5158, |
| 5172 | VADDBF16Z128rmbkz = 5159, |
| 5173 | VADDBF16Z128rmk = 5160, |
| 5174 | VADDBF16Z128rmkz = 5161, |
| 5175 | VADDBF16Z128rr = 5162, |
| 5176 | VADDBF16Z128rrk = 5163, |
| 5177 | VADDBF16Z128rrkz = 5164, |
| 5178 | VADDBF16Z256rm = 5165, |
| 5179 | VADDBF16Z256rmb = 5166, |
| 5180 | VADDBF16Z256rmbk = 5167, |
| 5181 | VADDBF16Z256rmbkz = 5168, |
| 5182 | VADDBF16Z256rmk = 5169, |
| 5183 | VADDBF16Z256rmkz = 5170, |
| 5184 | VADDBF16Z256rr = 5171, |
| 5185 | VADDBF16Z256rrk = 5172, |
| 5186 | VADDBF16Z256rrkz = 5173, |
| 5187 | VADDBF16Zrm = 5174, |
| 5188 | VADDBF16Zrmb = 5175, |
| 5189 | VADDBF16Zrmbk = 5176, |
| 5190 | VADDBF16Zrmbkz = 5177, |
| 5191 | VADDBF16Zrmk = 5178, |
| 5192 | VADDBF16Zrmkz = 5179, |
| 5193 | VADDBF16Zrr = 5180, |
| 5194 | VADDBF16Zrrk = 5181, |
| 5195 | VADDBF16Zrrkz = 5182, |
| 5196 | VADDPDYrm = 5183, |
| 5197 | VADDPDYrr = 5184, |
| 5198 | VADDPDZ128rm = 5185, |
| 5199 | VADDPDZ128rmb = 5186, |
| 5200 | VADDPDZ128rmbk = 5187, |
| 5201 | VADDPDZ128rmbkz = 5188, |
| 5202 | VADDPDZ128rmk = 5189, |
| 5203 | VADDPDZ128rmkz = 5190, |
| 5204 | VADDPDZ128rr = 5191, |
| 5205 | VADDPDZ128rrk = 5192, |
| 5206 | VADDPDZ128rrkz = 5193, |
| 5207 | VADDPDZ256rm = 5194, |
| 5208 | VADDPDZ256rmb = 5195, |
| 5209 | VADDPDZ256rmbk = 5196, |
| 5210 | VADDPDZ256rmbkz = 5197, |
| 5211 | VADDPDZ256rmk = 5198, |
| 5212 | VADDPDZ256rmkz = 5199, |
| 5213 | VADDPDZ256rr = 5200, |
| 5214 | VADDPDZ256rrk = 5201, |
| 5215 | VADDPDZ256rrkz = 5202, |
| 5216 | VADDPDZrm = 5203, |
| 5217 | VADDPDZrmb = 5204, |
| 5218 | VADDPDZrmbk = 5205, |
| 5219 | VADDPDZrmbkz = 5206, |
| 5220 | VADDPDZrmk = 5207, |
| 5221 | VADDPDZrmkz = 5208, |
| 5222 | VADDPDZrr = 5209, |
| 5223 | VADDPDZrrb = 5210, |
| 5224 | VADDPDZrrbk = 5211, |
| 5225 | VADDPDZrrbkz = 5212, |
| 5226 | VADDPDZrrk = 5213, |
| 5227 | VADDPDZrrkz = 5214, |
| 5228 | VADDPDrm = 5215, |
| 5229 | VADDPDrr = 5216, |
| 5230 | VADDPHZ128rm = 5217, |
| 5231 | VADDPHZ128rmb = 5218, |
| 5232 | VADDPHZ128rmbk = 5219, |
| 5233 | VADDPHZ128rmbkz = 5220, |
| 5234 | VADDPHZ128rmk = 5221, |
| 5235 | VADDPHZ128rmkz = 5222, |
| 5236 | VADDPHZ128rr = 5223, |
| 5237 | VADDPHZ128rrk = 5224, |
| 5238 | VADDPHZ128rrkz = 5225, |
| 5239 | VADDPHZ256rm = 5226, |
| 5240 | VADDPHZ256rmb = 5227, |
| 5241 | VADDPHZ256rmbk = 5228, |
| 5242 | VADDPHZ256rmbkz = 5229, |
| 5243 | VADDPHZ256rmk = 5230, |
| 5244 | VADDPHZ256rmkz = 5231, |
| 5245 | VADDPHZ256rr = 5232, |
| 5246 | VADDPHZ256rrk = 5233, |
| 5247 | VADDPHZ256rrkz = 5234, |
| 5248 | VADDPHZrm = 5235, |
| 5249 | VADDPHZrmb = 5236, |
| 5250 | VADDPHZrmbk = 5237, |
| 5251 | VADDPHZrmbkz = 5238, |
| 5252 | VADDPHZrmk = 5239, |
| 5253 | VADDPHZrmkz = 5240, |
| 5254 | VADDPHZrr = 5241, |
| 5255 | VADDPHZrrb = 5242, |
| 5256 | VADDPHZrrbk = 5243, |
| 5257 | VADDPHZrrbkz = 5244, |
| 5258 | VADDPHZrrk = 5245, |
| 5259 | VADDPHZrrkz = 5246, |
| 5260 | VADDPSYrm = 5247, |
| 5261 | VADDPSYrr = 5248, |
| 5262 | VADDPSZ128rm = 5249, |
| 5263 | VADDPSZ128rmb = 5250, |
| 5264 | VADDPSZ128rmbk = 5251, |
| 5265 | VADDPSZ128rmbkz = 5252, |
| 5266 | VADDPSZ128rmk = 5253, |
| 5267 | VADDPSZ128rmkz = 5254, |
| 5268 | VADDPSZ128rr = 5255, |
| 5269 | VADDPSZ128rrk = 5256, |
| 5270 | VADDPSZ128rrkz = 5257, |
| 5271 | VADDPSZ256rm = 5258, |
| 5272 | VADDPSZ256rmb = 5259, |
| 5273 | VADDPSZ256rmbk = 5260, |
| 5274 | VADDPSZ256rmbkz = 5261, |
| 5275 | VADDPSZ256rmk = 5262, |
| 5276 | VADDPSZ256rmkz = 5263, |
| 5277 | VADDPSZ256rr = 5264, |
| 5278 | VADDPSZ256rrk = 5265, |
| 5279 | VADDPSZ256rrkz = 5266, |
| 5280 | VADDPSZrm = 5267, |
| 5281 | VADDPSZrmb = 5268, |
| 5282 | VADDPSZrmbk = 5269, |
| 5283 | VADDPSZrmbkz = 5270, |
| 5284 | VADDPSZrmk = 5271, |
| 5285 | VADDPSZrmkz = 5272, |
| 5286 | VADDPSZrr = 5273, |
| 5287 | VADDPSZrrb = 5274, |
| 5288 | VADDPSZrrbk = 5275, |
| 5289 | VADDPSZrrbkz = 5276, |
| 5290 | VADDPSZrrk = 5277, |
| 5291 | VADDPSZrrkz = 5278, |
| 5292 | VADDPSrm = 5279, |
| 5293 | VADDPSrr = 5280, |
| 5294 | VADDSDZrm = 5281, |
| 5295 | VADDSDZrm_Int = 5282, |
| 5296 | VADDSDZrmk_Int = 5283, |
| 5297 | VADDSDZrmkz_Int = 5284, |
| 5298 | VADDSDZrr = 5285, |
| 5299 | VADDSDZrr_Int = 5286, |
| 5300 | VADDSDZrrb_Int = 5287, |
| 5301 | VADDSDZrrbk_Int = 5288, |
| 5302 | VADDSDZrrbkz_Int = 5289, |
| 5303 | VADDSDZrrk_Int = 5290, |
| 5304 | VADDSDZrrkz_Int = 5291, |
| 5305 | VADDSDrm = 5292, |
| 5306 | VADDSDrm_Int = 5293, |
| 5307 | VADDSDrr = 5294, |
| 5308 | VADDSDrr_Int = 5295, |
| 5309 | VADDSHZrm = 5296, |
| 5310 | VADDSHZrm_Int = 5297, |
| 5311 | VADDSHZrmk_Int = 5298, |
| 5312 | VADDSHZrmkz_Int = 5299, |
| 5313 | VADDSHZrr = 5300, |
| 5314 | VADDSHZrr_Int = 5301, |
| 5315 | VADDSHZrrb_Int = 5302, |
| 5316 | VADDSHZrrbk_Int = 5303, |
| 5317 | VADDSHZrrbkz_Int = 5304, |
| 5318 | VADDSHZrrk_Int = 5305, |
| 5319 | VADDSHZrrkz_Int = 5306, |
| 5320 | VADDSSZrm = 5307, |
| 5321 | VADDSSZrm_Int = 5308, |
| 5322 | VADDSSZrmk_Int = 5309, |
| 5323 | VADDSSZrmkz_Int = 5310, |
| 5324 | VADDSSZrr = 5311, |
| 5325 | VADDSSZrr_Int = 5312, |
| 5326 | VADDSSZrrb_Int = 5313, |
| 5327 | VADDSSZrrbk_Int = 5314, |
| 5328 | VADDSSZrrbkz_Int = 5315, |
| 5329 | VADDSSZrrk_Int = 5316, |
| 5330 | VADDSSZrrkz_Int = 5317, |
| 5331 | VADDSSrm = 5318, |
| 5332 | VADDSSrm_Int = 5319, |
| 5333 | VADDSSrr = 5320, |
| 5334 | VADDSSrr_Int = 5321, |
| 5335 | VADDSUBPDYrm = 5322, |
| 5336 | VADDSUBPDYrr = 5323, |
| 5337 | VADDSUBPDrm = 5324, |
| 5338 | VADDSUBPDrr = 5325, |
| 5339 | VADDSUBPSYrm = 5326, |
| 5340 | VADDSUBPSYrr = 5327, |
| 5341 | VADDSUBPSrm = 5328, |
| 5342 | VADDSUBPSrr = 5329, |
| 5343 | VAESDECLASTYrm = 5330, |
| 5344 | VAESDECLASTYrr = 5331, |
| 5345 | VAESDECLASTZ128rm = 5332, |
| 5346 | VAESDECLASTZ128rr = 5333, |
| 5347 | VAESDECLASTZ256rm = 5334, |
| 5348 | VAESDECLASTZ256rr = 5335, |
| 5349 | VAESDECLASTZrm = 5336, |
| 5350 | VAESDECLASTZrr = 5337, |
| 5351 | VAESDECLASTrm = 5338, |
| 5352 | VAESDECLASTrr = 5339, |
| 5353 | VAESDECYrm = 5340, |
| 5354 | VAESDECYrr = 5341, |
| 5355 | VAESDECZ128rm = 5342, |
| 5356 | VAESDECZ128rr = 5343, |
| 5357 | VAESDECZ256rm = 5344, |
| 5358 | VAESDECZ256rr = 5345, |
| 5359 | VAESDECZrm = 5346, |
| 5360 | VAESDECZrr = 5347, |
| 5361 | VAESDECrm = 5348, |
| 5362 | VAESDECrr = 5349, |
| 5363 | VAESENCLASTYrm = 5350, |
| 5364 | VAESENCLASTYrr = 5351, |
| 5365 | VAESENCLASTZ128rm = 5352, |
| 5366 | VAESENCLASTZ128rr = 5353, |
| 5367 | VAESENCLASTZ256rm = 5354, |
| 5368 | VAESENCLASTZ256rr = 5355, |
| 5369 | VAESENCLASTZrm = 5356, |
| 5370 | VAESENCLASTZrr = 5357, |
| 5371 | VAESENCLASTrm = 5358, |
| 5372 | VAESENCLASTrr = 5359, |
| 5373 | VAESENCYrm = 5360, |
| 5374 | VAESENCYrr = 5361, |
| 5375 | VAESENCZ128rm = 5362, |
| 5376 | VAESENCZ128rr = 5363, |
| 5377 | VAESENCZ256rm = 5364, |
| 5378 | VAESENCZ256rr = 5365, |
| 5379 | VAESENCZrm = 5366, |
| 5380 | VAESENCZrr = 5367, |
| 5381 | VAESENCrm = 5368, |
| 5382 | VAESENCrr = 5369, |
| 5383 | VAESIMCrm = 5370, |
| 5384 | VAESIMCrr = 5371, |
| 5385 | VAESKEYGENASSIST128rm = 5372, |
| 5386 | VAESKEYGENASSIST128rr = 5373, |
| 5387 | VALIGNDZ128rmbi = 5374, |
| 5388 | VALIGNDZ128rmbik = 5375, |
| 5389 | VALIGNDZ128rmbikz = 5376, |
| 5390 | VALIGNDZ128rmi = 5377, |
| 5391 | VALIGNDZ128rmik = 5378, |
| 5392 | VALIGNDZ128rmikz = 5379, |
| 5393 | VALIGNDZ128rri = 5380, |
| 5394 | VALIGNDZ128rrik = 5381, |
| 5395 | VALIGNDZ128rrikz = 5382, |
| 5396 | VALIGNDZ256rmbi = 5383, |
| 5397 | VALIGNDZ256rmbik = 5384, |
| 5398 | VALIGNDZ256rmbikz = 5385, |
| 5399 | VALIGNDZ256rmi = 5386, |
| 5400 | VALIGNDZ256rmik = 5387, |
| 5401 | VALIGNDZ256rmikz = 5388, |
| 5402 | VALIGNDZ256rri = 5389, |
| 5403 | VALIGNDZ256rrik = 5390, |
| 5404 | VALIGNDZ256rrikz = 5391, |
| 5405 | VALIGNDZrmbi = 5392, |
| 5406 | VALIGNDZrmbik = 5393, |
| 5407 | VALIGNDZrmbikz = 5394, |
| 5408 | VALIGNDZrmi = 5395, |
| 5409 | VALIGNDZrmik = 5396, |
| 5410 | VALIGNDZrmikz = 5397, |
| 5411 | VALIGNDZrri = 5398, |
| 5412 | VALIGNDZrrik = 5399, |
| 5413 | VALIGNDZrrikz = 5400, |
| 5414 | VALIGNQZ128rmbi = 5401, |
| 5415 | VALIGNQZ128rmbik = 5402, |
| 5416 | VALIGNQZ128rmbikz = 5403, |
| 5417 | VALIGNQZ128rmi = 5404, |
| 5418 | VALIGNQZ128rmik = 5405, |
| 5419 | VALIGNQZ128rmikz = 5406, |
| 5420 | VALIGNQZ128rri = 5407, |
| 5421 | VALIGNQZ128rrik = 5408, |
| 5422 | VALIGNQZ128rrikz = 5409, |
| 5423 | VALIGNQZ256rmbi = 5410, |
| 5424 | VALIGNQZ256rmbik = 5411, |
| 5425 | VALIGNQZ256rmbikz = 5412, |
| 5426 | VALIGNQZ256rmi = 5413, |
| 5427 | VALIGNQZ256rmik = 5414, |
| 5428 | VALIGNQZ256rmikz = 5415, |
| 5429 | VALIGNQZ256rri = 5416, |
| 5430 | VALIGNQZ256rrik = 5417, |
| 5431 | VALIGNQZ256rrikz = 5418, |
| 5432 | VALIGNQZrmbi = 5419, |
| 5433 | VALIGNQZrmbik = 5420, |
| 5434 | VALIGNQZrmbikz = 5421, |
| 5435 | VALIGNQZrmi = 5422, |
| 5436 | VALIGNQZrmik = 5423, |
| 5437 | VALIGNQZrmikz = 5424, |
| 5438 | VALIGNQZrri = 5425, |
| 5439 | VALIGNQZrrik = 5426, |
| 5440 | VALIGNQZrrikz = 5427, |
| 5441 | VANDNPDYrm = 5428, |
| 5442 | VANDNPDYrr = 5429, |
| 5443 | VANDNPDZ128rm = 5430, |
| 5444 | VANDNPDZ128rmb = 5431, |
| 5445 | VANDNPDZ128rmbk = 5432, |
| 5446 | VANDNPDZ128rmbkz = 5433, |
| 5447 | VANDNPDZ128rmk = 5434, |
| 5448 | VANDNPDZ128rmkz = 5435, |
| 5449 | VANDNPDZ128rr = 5436, |
| 5450 | VANDNPDZ128rrk = 5437, |
| 5451 | VANDNPDZ128rrkz = 5438, |
| 5452 | VANDNPDZ256rm = 5439, |
| 5453 | VANDNPDZ256rmb = 5440, |
| 5454 | VANDNPDZ256rmbk = 5441, |
| 5455 | VANDNPDZ256rmbkz = 5442, |
| 5456 | VANDNPDZ256rmk = 5443, |
| 5457 | VANDNPDZ256rmkz = 5444, |
| 5458 | VANDNPDZ256rr = 5445, |
| 5459 | VANDNPDZ256rrk = 5446, |
| 5460 | VANDNPDZ256rrkz = 5447, |
| 5461 | VANDNPDZrm = 5448, |
| 5462 | VANDNPDZrmb = 5449, |
| 5463 | VANDNPDZrmbk = 5450, |
| 5464 | VANDNPDZrmbkz = 5451, |
| 5465 | VANDNPDZrmk = 5452, |
| 5466 | VANDNPDZrmkz = 5453, |
| 5467 | VANDNPDZrr = 5454, |
| 5468 | VANDNPDZrrk = 5455, |
| 5469 | VANDNPDZrrkz = 5456, |
| 5470 | VANDNPDrm = 5457, |
| 5471 | VANDNPDrr = 5458, |
| 5472 | VANDNPSYrm = 5459, |
| 5473 | VANDNPSYrr = 5460, |
| 5474 | VANDNPSZ128rm = 5461, |
| 5475 | VANDNPSZ128rmb = 5462, |
| 5476 | VANDNPSZ128rmbk = 5463, |
| 5477 | VANDNPSZ128rmbkz = 5464, |
| 5478 | VANDNPSZ128rmk = 5465, |
| 5479 | VANDNPSZ128rmkz = 5466, |
| 5480 | VANDNPSZ128rr = 5467, |
| 5481 | VANDNPSZ128rrk = 5468, |
| 5482 | VANDNPSZ128rrkz = 5469, |
| 5483 | VANDNPSZ256rm = 5470, |
| 5484 | VANDNPSZ256rmb = 5471, |
| 5485 | VANDNPSZ256rmbk = 5472, |
| 5486 | VANDNPSZ256rmbkz = 5473, |
| 5487 | VANDNPSZ256rmk = 5474, |
| 5488 | VANDNPSZ256rmkz = 5475, |
| 5489 | VANDNPSZ256rr = 5476, |
| 5490 | VANDNPSZ256rrk = 5477, |
| 5491 | VANDNPSZ256rrkz = 5478, |
| 5492 | VANDNPSZrm = 5479, |
| 5493 | VANDNPSZrmb = 5480, |
| 5494 | VANDNPSZrmbk = 5481, |
| 5495 | VANDNPSZrmbkz = 5482, |
| 5496 | VANDNPSZrmk = 5483, |
| 5497 | VANDNPSZrmkz = 5484, |
| 5498 | VANDNPSZrr = 5485, |
| 5499 | VANDNPSZrrk = 5486, |
| 5500 | VANDNPSZrrkz = 5487, |
| 5501 | VANDNPSrm = 5488, |
| 5502 | VANDNPSrr = 5489, |
| 5503 | VANDPDYrm = 5490, |
| 5504 | VANDPDYrr = 5491, |
| 5505 | VANDPDZ128rm = 5492, |
| 5506 | VANDPDZ128rmb = 5493, |
| 5507 | VANDPDZ128rmbk = 5494, |
| 5508 | VANDPDZ128rmbkz = 5495, |
| 5509 | VANDPDZ128rmk = 5496, |
| 5510 | VANDPDZ128rmkz = 5497, |
| 5511 | VANDPDZ128rr = 5498, |
| 5512 | VANDPDZ128rrk = 5499, |
| 5513 | VANDPDZ128rrkz = 5500, |
| 5514 | VANDPDZ256rm = 5501, |
| 5515 | VANDPDZ256rmb = 5502, |
| 5516 | VANDPDZ256rmbk = 5503, |
| 5517 | VANDPDZ256rmbkz = 5504, |
| 5518 | VANDPDZ256rmk = 5505, |
| 5519 | VANDPDZ256rmkz = 5506, |
| 5520 | VANDPDZ256rr = 5507, |
| 5521 | VANDPDZ256rrk = 5508, |
| 5522 | VANDPDZ256rrkz = 5509, |
| 5523 | VANDPDZrm = 5510, |
| 5524 | VANDPDZrmb = 5511, |
| 5525 | VANDPDZrmbk = 5512, |
| 5526 | VANDPDZrmbkz = 5513, |
| 5527 | VANDPDZrmk = 5514, |
| 5528 | VANDPDZrmkz = 5515, |
| 5529 | VANDPDZrr = 5516, |
| 5530 | VANDPDZrrk = 5517, |
| 5531 | VANDPDZrrkz = 5518, |
| 5532 | VANDPDrm = 5519, |
| 5533 | VANDPDrr = 5520, |
| 5534 | VANDPSYrm = 5521, |
| 5535 | VANDPSYrr = 5522, |
| 5536 | VANDPSZ128rm = 5523, |
| 5537 | VANDPSZ128rmb = 5524, |
| 5538 | VANDPSZ128rmbk = 5525, |
| 5539 | VANDPSZ128rmbkz = 5526, |
| 5540 | VANDPSZ128rmk = 5527, |
| 5541 | VANDPSZ128rmkz = 5528, |
| 5542 | VANDPSZ128rr = 5529, |
| 5543 | VANDPSZ128rrk = 5530, |
| 5544 | VANDPSZ128rrkz = 5531, |
| 5545 | VANDPSZ256rm = 5532, |
| 5546 | VANDPSZ256rmb = 5533, |
| 5547 | VANDPSZ256rmbk = 5534, |
| 5548 | VANDPSZ256rmbkz = 5535, |
| 5549 | VANDPSZ256rmk = 5536, |
| 5550 | VANDPSZ256rmkz = 5537, |
| 5551 | VANDPSZ256rr = 5538, |
| 5552 | VANDPSZ256rrk = 5539, |
| 5553 | VANDPSZ256rrkz = 5540, |
| 5554 | VANDPSZrm = 5541, |
| 5555 | VANDPSZrmb = 5542, |
| 5556 | VANDPSZrmbk = 5543, |
| 5557 | VANDPSZrmbkz = 5544, |
| 5558 | VANDPSZrmk = 5545, |
| 5559 | VANDPSZrmkz = 5546, |
| 5560 | VANDPSZrr = 5547, |
| 5561 | VANDPSZrrk = 5548, |
| 5562 | VANDPSZrrkz = 5549, |
| 5563 | VANDPSrm = 5550, |
| 5564 | VANDPSrr = 5551, |
| 5565 | VASTART_SAVE_XMM_REGS = 5552, |
| 5566 | VBCSTNEBF162PSYrm = 5553, |
| 5567 | VBCSTNEBF162PSrm = 5554, |
| 5568 | VBCSTNESH2PSYrm = 5555, |
| 5569 | VBCSTNESH2PSrm = 5556, |
| 5570 | VBLENDMPDZ128rm = 5557, |
| 5571 | VBLENDMPDZ128rmb = 5558, |
| 5572 | VBLENDMPDZ128rmbk = 5559, |
| 5573 | VBLENDMPDZ128rmbkz = 5560, |
| 5574 | VBLENDMPDZ128rmk = 5561, |
| 5575 | VBLENDMPDZ128rmkz = 5562, |
| 5576 | VBLENDMPDZ128rr = 5563, |
| 5577 | VBLENDMPDZ128rrk = 5564, |
| 5578 | VBLENDMPDZ128rrkz = 5565, |
| 5579 | VBLENDMPDZ256rm = 5566, |
| 5580 | VBLENDMPDZ256rmb = 5567, |
| 5581 | VBLENDMPDZ256rmbk = 5568, |
| 5582 | VBLENDMPDZ256rmbkz = 5569, |
| 5583 | VBLENDMPDZ256rmk = 5570, |
| 5584 | VBLENDMPDZ256rmkz = 5571, |
| 5585 | VBLENDMPDZ256rr = 5572, |
| 5586 | VBLENDMPDZ256rrk = 5573, |
| 5587 | VBLENDMPDZ256rrkz = 5574, |
| 5588 | VBLENDMPDZrm = 5575, |
| 5589 | VBLENDMPDZrmb = 5576, |
| 5590 | VBLENDMPDZrmbk = 5577, |
| 5591 | VBLENDMPDZrmbkz = 5578, |
| 5592 | VBLENDMPDZrmk = 5579, |
| 5593 | VBLENDMPDZrmkz = 5580, |
| 5594 | VBLENDMPDZrr = 5581, |
| 5595 | VBLENDMPDZrrk = 5582, |
| 5596 | VBLENDMPDZrrkz = 5583, |
| 5597 | VBLENDMPSZ128rm = 5584, |
| 5598 | VBLENDMPSZ128rmb = 5585, |
| 5599 | VBLENDMPSZ128rmbk = 5586, |
| 5600 | VBLENDMPSZ128rmbkz = 5587, |
| 5601 | VBLENDMPSZ128rmk = 5588, |
| 5602 | VBLENDMPSZ128rmkz = 5589, |
| 5603 | VBLENDMPSZ128rr = 5590, |
| 5604 | VBLENDMPSZ128rrk = 5591, |
| 5605 | VBLENDMPSZ128rrkz = 5592, |
| 5606 | VBLENDMPSZ256rm = 5593, |
| 5607 | VBLENDMPSZ256rmb = 5594, |
| 5608 | VBLENDMPSZ256rmbk = 5595, |
| 5609 | VBLENDMPSZ256rmbkz = 5596, |
| 5610 | VBLENDMPSZ256rmk = 5597, |
| 5611 | VBLENDMPSZ256rmkz = 5598, |
| 5612 | VBLENDMPSZ256rr = 5599, |
| 5613 | VBLENDMPSZ256rrk = 5600, |
| 5614 | VBLENDMPSZ256rrkz = 5601, |
| 5615 | VBLENDMPSZrm = 5602, |
| 5616 | VBLENDMPSZrmb = 5603, |
| 5617 | VBLENDMPSZrmbk = 5604, |
| 5618 | VBLENDMPSZrmbkz = 5605, |
| 5619 | VBLENDMPSZrmk = 5606, |
| 5620 | VBLENDMPSZrmkz = 5607, |
| 5621 | VBLENDMPSZrr = 5608, |
| 5622 | VBLENDMPSZrrk = 5609, |
| 5623 | VBLENDMPSZrrkz = 5610, |
| 5624 | VBLENDPDYrmi = 5611, |
| 5625 | VBLENDPDYrri = 5612, |
| 5626 | VBLENDPDrmi = 5613, |
| 5627 | VBLENDPDrri = 5614, |
| 5628 | VBLENDPSYrmi = 5615, |
| 5629 | VBLENDPSYrri = 5616, |
| 5630 | VBLENDPSrmi = 5617, |
| 5631 | VBLENDPSrri = 5618, |
| 5632 | VBLENDVPDYrmr = 5619, |
| 5633 | VBLENDVPDYrrr = 5620, |
| 5634 | VBLENDVPDrmr = 5621, |
| 5635 | VBLENDVPDrrr = 5622, |
| 5636 | VBLENDVPSYrmr = 5623, |
| 5637 | VBLENDVPSYrrr = 5624, |
| 5638 | VBLENDVPSrmr = 5625, |
| 5639 | VBLENDVPSrrr = 5626, |
| 5640 | VBROADCASTF128rm = 5627, |
| 5641 | VBROADCASTF32X2Z256rm = 5628, |
| 5642 | VBROADCASTF32X2Z256rmk = 5629, |
| 5643 | VBROADCASTF32X2Z256rmkz = 5630, |
| 5644 | VBROADCASTF32X2Z256rr = 5631, |
| 5645 | VBROADCASTF32X2Z256rrk = 5632, |
| 5646 | VBROADCASTF32X2Z256rrkz = 5633, |
| 5647 | VBROADCASTF32X2Zrm = 5634, |
| 5648 | VBROADCASTF32X2Zrmk = 5635, |
| 5649 | VBROADCASTF32X2Zrmkz = 5636, |
| 5650 | VBROADCASTF32X2Zrr = 5637, |
| 5651 | VBROADCASTF32X2Zrrk = 5638, |
| 5652 | VBROADCASTF32X2Zrrkz = 5639, |
| 5653 | VBROADCASTF32X4Z256rm = 5640, |
| 5654 | VBROADCASTF32X4Z256rmk = 5641, |
| 5655 | VBROADCASTF32X4Z256rmkz = 5642, |
| 5656 | VBROADCASTF32X4Zrm = 5643, |
| 5657 | VBROADCASTF32X4Zrmk = 5644, |
| 5658 | VBROADCASTF32X4Zrmkz = 5645, |
| 5659 | VBROADCASTF32X8Zrm = 5646, |
| 5660 | VBROADCASTF32X8Zrmk = 5647, |
| 5661 | VBROADCASTF32X8Zrmkz = 5648, |
| 5662 | VBROADCASTF64X2Z256rm = 5649, |
| 5663 | VBROADCASTF64X2Z256rmk = 5650, |
| 5664 | VBROADCASTF64X2Z256rmkz = 5651, |
| 5665 | VBROADCASTF64X2Zrm = 5652, |
| 5666 | VBROADCASTF64X2Zrmk = 5653, |
| 5667 | VBROADCASTF64X2Zrmkz = 5654, |
| 5668 | VBROADCASTF64X4Zrm = 5655, |
| 5669 | VBROADCASTF64X4Zrmk = 5656, |
| 5670 | VBROADCASTF64X4Zrmkz = 5657, |
| 5671 | VBROADCASTI128rm = 5658, |
| 5672 | VBROADCASTI32X2Z128rm = 5659, |
| 5673 | VBROADCASTI32X2Z128rmk = 5660, |
| 5674 | VBROADCASTI32X2Z128rmkz = 5661, |
| 5675 | VBROADCASTI32X2Z128rr = 5662, |
| 5676 | VBROADCASTI32X2Z128rrk = 5663, |
| 5677 | VBROADCASTI32X2Z128rrkz = 5664, |
| 5678 | VBROADCASTI32X2Z256rm = 5665, |
| 5679 | VBROADCASTI32X2Z256rmk = 5666, |
| 5680 | VBROADCASTI32X2Z256rmkz = 5667, |
| 5681 | VBROADCASTI32X2Z256rr = 5668, |
| 5682 | VBROADCASTI32X2Z256rrk = 5669, |
| 5683 | VBROADCASTI32X2Z256rrkz = 5670, |
| 5684 | VBROADCASTI32X2Zrm = 5671, |
| 5685 | VBROADCASTI32X2Zrmk = 5672, |
| 5686 | VBROADCASTI32X2Zrmkz = 5673, |
| 5687 | VBROADCASTI32X2Zrr = 5674, |
| 5688 | VBROADCASTI32X2Zrrk = 5675, |
| 5689 | VBROADCASTI32X2Zrrkz = 5676, |
| 5690 | VBROADCASTI32X4Z256rm = 5677, |
| 5691 | VBROADCASTI32X4Z256rmk = 5678, |
| 5692 | VBROADCASTI32X4Z256rmkz = 5679, |
| 5693 | VBROADCASTI32X4Zrm = 5680, |
| 5694 | VBROADCASTI32X4Zrmk = 5681, |
| 5695 | VBROADCASTI32X4Zrmkz = 5682, |
| 5696 | VBROADCASTI32X8Zrm = 5683, |
| 5697 | VBROADCASTI32X8Zrmk = 5684, |
| 5698 | VBROADCASTI32X8Zrmkz = 5685, |
| 5699 | VBROADCASTI64X2Z256rm = 5686, |
| 5700 | VBROADCASTI64X2Z256rmk = 5687, |
| 5701 | VBROADCASTI64X2Z256rmkz = 5688, |
| 5702 | VBROADCASTI64X2Zrm = 5689, |
| 5703 | VBROADCASTI64X2Zrmk = 5690, |
| 5704 | VBROADCASTI64X2Zrmkz = 5691, |
| 5705 | VBROADCASTI64X4Zrm = 5692, |
| 5706 | VBROADCASTI64X4Zrmk = 5693, |
| 5707 | VBROADCASTI64X4Zrmkz = 5694, |
| 5708 | VBROADCASTSDYrm = 5695, |
| 5709 | VBROADCASTSDYrr = 5696, |
| 5710 | VBROADCASTSDZ256rm = 5697, |
| 5711 | VBROADCASTSDZ256rmk = 5698, |
| 5712 | VBROADCASTSDZ256rmkz = 5699, |
| 5713 | VBROADCASTSDZ256rr = 5700, |
| 5714 | VBROADCASTSDZ256rrk = 5701, |
| 5715 | VBROADCASTSDZ256rrkz = 5702, |
| 5716 | VBROADCASTSDZrm = 5703, |
| 5717 | VBROADCASTSDZrmk = 5704, |
| 5718 | VBROADCASTSDZrmkz = 5705, |
| 5719 | VBROADCASTSDZrr = 5706, |
| 5720 | VBROADCASTSDZrrk = 5707, |
| 5721 | VBROADCASTSDZrrkz = 5708, |
| 5722 | VBROADCASTSSYrm = 5709, |
| 5723 | VBROADCASTSSYrr = 5710, |
| 5724 | VBROADCASTSSZ128rm = 5711, |
| 5725 | VBROADCASTSSZ128rmk = 5712, |
| 5726 | VBROADCASTSSZ128rmkz = 5713, |
| 5727 | VBROADCASTSSZ128rr = 5714, |
| 5728 | VBROADCASTSSZ128rrk = 5715, |
| 5729 | VBROADCASTSSZ128rrkz = 5716, |
| 5730 | VBROADCASTSSZ256rm = 5717, |
| 5731 | VBROADCASTSSZ256rmk = 5718, |
| 5732 | VBROADCASTSSZ256rmkz = 5719, |
| 5733 | VBROADCASTSSZ256rr = 5720, |
| 5734 | VBROADCASTSSZ256rrk = 5721, |
| 5735 | VBROADCASTSSZ256rrkz = 5722, |
| 5736 | VBROADCASTSSZrm = 5723, |
| 5737 | VBROADCASTSSZrmk = 5724, |
| 5738 | VBROADCASTSSZrmkz = 5725, |
| 5739 | VBROADCASTSSZrr = 5726, |
| 5740 | VBROADCASTSSZrrk = 5727, |
| 5741 | VBROADCASTSSZrrkz = 5728, |
| 5742 | VBROADCASTSSrm = 5729, |
| 5743 | VBROADCASTSSrr = 5730, |
| 5744 | VCMPBF16Z128rmbi = 5731, |
| 5745 | VCMPBF16Z128rmbik = 5732, |
| 5746 | VCMPBF16Z128rmi = 5733, |
| 5747 | VCMPBF16Z128rmik = 5734, |
| 5748 | VCMPBF16Z128rri = 5735, |
| 5749 | VCMPBF16Z128rrik = 5736, |
| 5750 | VCMPBF16Z256rmbi = 5737, |
| 5751 | VCMPBF16Z256rmbik = 5738, |
| 5752 | VCMPBF16Z256rmi = 5739, |
| 5753 | VCMPBF16Z256rmik = 5740, |
| 5754 | VCMPBF16Z256rri = 5741, |
| 5755 | VCMPBF16Z256rrik = 5742, |
| 5756 | VCMPBF16Zrmbi = 5743, |
| 5757 | VCMPBF16Zrmbik = 5744, |
| 5758 | VCMPBF16Zrmi = 5745, |
| 5759 | VCMPBF16Zrmik = 5746, |
| 5760 | VCMPBF16Zrri = 5747, |
| 5761 | VCMPBF16Zrrik = 5748, |
| 5762 | VCMPPDYrmi = 5749, |
| 5763 | VCMPPDYrri = 5750, |
| 5764 | VCMPPDZ128rmbi = 5751, |
| 5765 | VCMPPDZ128rmbik = 5752, |
| 5766 | VCMPPDZ128rmi = 5753, |
| 5767 | VCMPPDZ128rmik = 5754, |
| 5768 | VCMPPDZ128rri = 5755, |
| 5769 | VCMPPDZ128rrik = 5756, |
| 5770 | VCMPPDZ256rmbi = 5757, |
| 5771 | VCMPPDZ256rmbik = 5758, |
| 5772 | VCMPPDZ256rmi = 5759, |
| 5773 | VCMPPDZ256rmik = 5760, |
| 5774 | VCMPPDZ256rri = 5761, |
| 5775 | VCMPPDZ256rrik = 5762, |
| 5776 | VCMPPDZrmbi = 5763, |
| 5777 | VCMPPDZrmbik = 5764, |
| 5778 | VCMPPDZrmi = 5765, |
| 5779 | VCMPPDZrmik = 5766, |
| 5780 | VCMPPDZrri = 5767, |
| 5781 | VCMPPDZrrib = 5768, |
| 5782 | VCMPPDZrribk = 5769, |
| 5783 | VCMPPDZrrik = 5770, |
| 5784 | VCMPPDrmi = 5771, |
| 5785 | VCMPPDrri = 5772, |
| 5786 | VCMPPHZ128rmbi = 5773, |
| 5787 | VCMPPHZ128rmbik = 5774, |
| 5788 | VCMPPHZ128rmi = 5775, |
| 5789 | VCMPPHZ128rmik = 5776, |
| 5790 | VCMPPHZ128rri = 5777, |
| 5791 | VCMPPHZ128rrik = 5778, |
| 5792 | VCMPPHZ256rmbi = 5779, |
| 5793 | VCMPPHZ256rmbik = 5780, |
| 5794 | VCMPPHZ256rmi = 5781, |
| 5795 | VCMPPHZ256rmik = 5782, |
| 5796 | VCMPPHZ256rri = 5783, |
| 5797 | VCMPPHZ256rrik = 5784, |
| 5798 | VCMPPHZrmbi = 5785, |
| 5799 | VCMPPHZrmbik = 5786, |
| 5800 | VCMPPHZrmi = 5787, |
| 5801 | VCMPPHZrmik = 5788, |
| 5802 | VCMPPHZrri = 5789, |
| 5803 | VCMPPHZrrib = 5790, |
| 5804 | VCMPPHZrribk = 5791, |
| 5805 | VCMPPHZrrik = 5792, |
| 5806 | VCMPPSYrmi = 5793, |
| 5807 | VCMPPSYrri = 5794, |
| 5808 | VCMPPSZ128rmbi = 5795, |
| 5809 | VCMPPSZ128rmbik = 5796, |
| 5810 | VCMPPSZ128rmi = 5797, |
| 5811 | VCMPPSZ128rmik = 5798, |
| 5812 | VCMPPSZ128rri = 5799, |
| 5813 | VCMPPSZ128rrik = 5800, |
| 5814 | VCMPPSZ256rmbi = 5801, |
| 5815 | VCMPPSZ256rmbik = 5802, |
| 5816 | VCMPPSZ256rmi = 5803, |
| 5817 | VCMPPSZ256rmik = 5804, |
| 5818 | VCMPPSZ256rri = 5805, |
| 5819 | VCMPPSZ256rrik = 5806, |
| 5820 | VCMPPSZrmbi = 5807, |
| 5821 | VCMPPSZrmbik = 5808, |
| 5822 | VCMPPSZrmi = 5809, |
| 5823 | VCMPPSZrmik = 5810, |
| 5824 | VCMPPSZrri = 5811, |
| 5825 | VCMPPSZrrib = 5812, |
| 5826 | VCMPPSZrribk = 5813, |
| 5827 | VCMPPSZrrik = 5814, |
| 5828 | VCMPPSrmi = 5815, |
| 5829 | VCMPPSrri = 5816, |
| 5830 | VCMPSDZrmi = 5817, |
| 5831 | VCMPSDZrmi_Int = 5818, |
| 5832 | VCMPSDZrmik_Int = 5819, |
| 5833 | VCMPSDZrri = 5820, |
| 5834 | VCMPSDZrri_Int = 5821, |
| 5835 | VCMPSDZrrib_Int = 5822, |
| 5836 | VCMPSDZrribk_Int = 5823, |
| 5837 | VCMPSDZrrik_Int = 5824, |
| 5838 | VCMPSDrmi = 5825, |
| 5839 | VCMPSDrmi_Int = 5826, |
| 5840 | VCMPSDrri = 5827, |
| 5841 | VCMPSDrri_Int = 5828, |
| 5842 | VCMPSHZrmi = 5829, |
| 5843 | VCMPSHZrmi_Int = 5830, |
| 5844 | VCMPSHZrmik_Int = 5831, |
| 5845 | VCMPSHZrri = 5832, |
| 5846 | VCMPSHZrri_Int = 5833, |
| 5847 | VCMPSHZrrib_Int = 5834, |
| 5848 | VCMPSHZrribk_Int = 5835, |
| 5849 | VCMPSHZrrik_Int = 5836, |
| 5850 | VCMPSSZrmi = 5837, |
| 5851 | VCMPSSZrmi_Int = 5838, |
| 5852 | VCMPSSZrmik_Int = 5839, |
| 5853 | VCMPSSZrri = 5840, |
| 5854 | VCMPSSZrri_Int = 5841, |
| 5855 | VCMPSSZrrib_Int = 5842, |
| 5856 | VCMPSSZrribk_Int = 5843, |
| 5857 | VCMPSSZrrik_Int = 5844, |
| 5858 | VCMPSSrmi = 5845, |
| 5859 | VCMPSSrmi_Int = 5846, |
| 5860 | VCMPSSrri = 5847, |
| 5861 | VCMPSSrri_Int = 5848, |
| 5862 | VCOMISBF16Zrm = 5849, |
| 5863 | VCOMISBF16Zrm_Int = 5850, |
| 5864 | VCOMISBF16Zrr = 5851, |
| 5865 | VCOMISBF16Zrr_Int = 5852, |
| 5866 | VCOMISDZrm = 5853, |
| 5867 | VCOMISDZrm_Int = 5854, |
| 5868 | VCOMISDZrr = 5855, |
| 5869 | VCOMISDZrr_Int = 5856, |
| 5870 | VCOMISDZrrb = 5857, |
| 5871 | VCOMISDrm = 5858, |
| 5872 | VCOMISDrm_Int = 5859, |
| 5873 | VCOMISDrr = 5860, |
| 5874 | VCOMISDrr_Int = 5861, |
| 5875 | VCOMISHZrm = 5862, |
| 5876 | VCOMISHZrm_Int = 5863, |
| 5877 | VCOMISHZrr = 5864, |
| 5878 | VCOMISHZrr_Int = 5865, |
| 5879 | VCOMISHZrrb = 5866, |
| 5880 | VCOMISSZrm = 5867, |
| 5881 | VCOMISSZrm_Int = 5868, |
| 5882 | VCOMISSZrr = 5869, |
| 5883 | VCOMISSZrr_Int = 5870, |
| 5884 | VCOMISSZrrb = 5871, |
| 5885 | VCOMISSrm = 5872, |
| 5886 | VCOMISSrm_Int = 5873, |
| 5887 | VCOMISSrr = 5874, |
| 5888 | VCOMISSrr_Int = 5875, |
| 5889 | VCOMPRESSPDZ128mr = 5876, |
| 5890 | VCOMPRESSPDZ128mrk = 5877, |
| 5891 | VCOMPRESSPDZ128rr = 5878, |
| 5892 | VCOMPRESSPDZ128rrk = 5879, |
| 5893 | VCOMPRESSPDZ128rrkz = 5880, |
| 5894 | VCOMPRESSPDZ256mr = 5881, |
| 5895 | VCOMPRESSPDZ256mrk = 5882, |
| 5896 | VCOMPRESSPDZ256rr = 5883, |
| 5897 | VCOMPRESSPDZ256rrk = 5884, |
| 5898 | VCOMPRESSPDZ256rrkz = 5885, |
| 5899 | VCOMPRESSPDZmr = 5886, |
| 5900 | VCOMPRESSPDZmrk = 5887, |
| 5901 | VCOMPRESSPDZrr = 5888, |
| 5902 | VCOMPRESSPDZrrk = 5889, |
| 5903 | VCOMPRESSPDZrrkz = 5890, |
| 5904 | VCOMPRESSPSZ128mr = 5891, |
| 5905 | VCOMPRESSPSZ128mrk = 5892, |
| 5906 | VCOMPRESSPSZ128rr = 5893, |
| 5907 | VCOMPRESSPSZ128rrk = 5894, |
| 5908 | VCOMPRESSPSZ128rrkz = 5895, |
| 5909 | VCOMPRESSPSZ256mr = 5896, |
| 5910 | VCOMPRESSPSZ256mrk = 5897, |
| 5911 | VCOMPRESSPSZ256rr = 5898, |
| 5912 | VCOMPRESSPSZ256rrk = 5899, |
| 5913 | VCOMPRESSPSZ256rrkz = 5900, |
| 5914 | VCOMPRESSPSZmr = 5901, |
| 5915 | VCOMPRESSPSZmrk = 5902, |
| 5916 | VCOMPRESSPSZrr = 5903, |
| 5917 | VCOMPRESSPSZrrk = 5904, |
| 5918 | VCOMPRESSPSZrrkz = 5905, |
| 5919 | VCOMXSDZrm_Int = 5906, |
| 5920 | VCOMXSDZrr_Int = 5907, |
| 5921 | VCOMXSDZrrb_Int = 5908, |
| 5922 | VCOMXSHZrm_Int = 5909, |
| 5923 | VCOMXSHZrr_Int = 5910, |
| 5924 | VCOMXSHZrrb_Int = 5911, |
| 5925 | VCOMXSSZrm_Int = 5912, |
| 5926 | VCOMXSSZrr_Int = 5913, |
| 5927 | VCOMXSSZrrb_Int = 5914, |
| 5928 | VCVT2PH2BF8SZ128rm = 5915, |
| 5929 | VCVT2PH2BF8SZ128rmb = 5916, |
| 5930 | VCVT2PH2BF8SZ128rmbk = 5917, |
| 5931 | VCVT2PH2BF8SZ128rmbkz = 5918, |
| 5932 | VCVT2PH2BF8SZ128rmk = 5919, |
| 5933 | VCVT2PH2BF8SZ128rmkz = 5920, |
| 5934 | VCVT2PH2BF8SZ128rr = 5921, |
| 5935 | VCVT2PH2BF8SZ128rrk = 5922, |
| 5936 | VCVT2PH2BF8SZ128rrkz = 5923, |
| 5937 | VCVT2PH2BF8SZ256rm = 5924, |
| 5938 | VCVT2PH2BF8SZ256rmb = 5925, |
| 5939 | VCVT2PH2BF8SZ256rmbk = 5926, |
| 5940 | VCVT2PH2BF8SZ256rmbkz = 5927, |
| 5941 | VCVT2PH2BF8SZ256rmk = 5928, |
| 5942 | VCVT2PH2BF8SZ256rmkz = 5929, |
| 5943 | VCVT2PH2BF8SZ256rr = 5930, |
| 5944 | VCVT2PH2BF8SZ256rrk = 5931, |
| 5945 | VCVT2PH2BF8SZ256rrkz = 5932, |
| 5946 | VCVT2PH2BF8SZrm = 5933, |
| 5947 | VCVT2PH2BF8SZrmb = 5934, |
| 5948 | VCVT2PH2BF8SZrmbk = 5935, |
| 5949 | VCVT2PH2BF8SZrmbkz = 5936, |
| 5950 | VCVT2PH2BF8SZrmk = 5937, |
| 5951 | VCVT2PH2BF8SZrmkz = 5938, |
| 5952 | VCVT2PH2BF8SZrr = 5939, |
| 5953 | VCVT2PH2BF8SZrrk = 5940, |
| 5954 | VCVT2PH2BF8SZrrkz = 5941, |
| 5955 | VCVT2PH2BF8Z128rm = 5942, |
| 5956 | VCVT2PH2BF8Z128rmb = 5943, |
| 5957 | VCVT2PH2BF8Z128rmbk = 5944, |
| 5958 | VCVT2PH2BF8Z128rmbkz = 5945, |
| 5959 | VCVT2PH2BF8Z128rmk = 5946, |
| 5960 | VCVT2PH2BF8Z128rmkz = 5947, |
| 5961 | VCVT2PH2BF8Z128rr = 5948, |
| 5962 | VCVT2PH2BF8Z128rrk = 5949, |
| 5963 | VCVT2PH2BF8Z128rrkz = 5950, |
| 5964 | VCVT2PH2BF8Z256rm = 5951, |
| 5965 | VCVT2PH2BF8Z256rmb = 5952, |
| 5966 | VCVT2PH2BF8Z256rmbk = 5953, |
| 5967 | VCVT2PH2BF8Z256rmbkz = 5954, |
| 5968 | VCVT2PH2BF8Z256rmk = 5955, |
| 5969 | VCVT2PH2BF8Z256rmkz = 5956, |
| 5970 | VCVT2PH2BF8Z256rr = 5957, |
| 5971 | VCVT2PH2BF8Z256rrk = 5958, |
| 5972 | VCVT2PH2BF8Z256rrkz = 5959, |
| 5973 | VCVT2PH2BF8Zrm = 5960, |
| 5974 | VCVT2PH2BF8Zrmb = 5961, |
| 5975 | VCVT2PH2BF8Zrmbk = 5962, |
| 5976 | VCVT2PH2BF8Zrmbkz = 5963, |
| 5977 | VCVT2PH2BF8Zrmk = 5964, |
| 5978 | VCVT2PH2BF8Zrmkz = 5965, |
| 5979 | VCVT2PH2BF8Zrr = 5966, |
| 5980 | VCVT2PH2BF8Zrrk = 5967, |
| 5981 | VCVT2PH2BF8Zrrkz = 5968, |
| 5982 | VCVT2PH2HF8SZ128rm = 5969, |
| 5983 | VCVT2PH2HF8SZ128rmb = 5970, |
| 5984 | VCVT2PH2HF8SZ128rmbk = 5971, |
| 5985 | VCVT2PH2HF8SZ128rmbkz = 5972, |
| 5986 | VCVT2PH2HF8SZ128rmk = 5973, |
| 5987 | VCVT2PH2HF8SZ128rmkz = 5974, |
| 5988 | VCVT2PH2HF8SZ128rr = 5975, |
| 5989 | VCVT2PH2HF8SZ128rrk = 5976, |
| 5990 | VCVT2PH2HF8SZ128rrkz = 5977, |
| 5991 | VCVT2PH2HF8SZ256rm = 5978, |
| 5992 | VCVT2PH2HF8SZ256rmb = 5979, |
| 5993 | VCVT2PH2HF8SZ256rmbk = 5980, |
| 5994 | VCVT2PH2HF8SZ256rmbkz = 5981, |
| 5995 | VCVT2PH2HF8SZ256rmk = 5982, |
| 5996 | VCVT2PH2HF8SZ256rmkz = 5983, |
| 5997 | VCVT2PH2HF8SZ256rr = 5984, |
| 5998 | VCVT2PH2HF8SZ256rrk = 5985, |
| 5999 | VCVT2PH2HF8SZ256rrkz = 5986, |
| 6000 | VCVT2PH2HF8SZrm = 5987, |
| 6001 | VCVT2PH2HF8SZrmb = 5988, |
| 6002 | VCVT2PH2HF8SZrmbk = 5989, |
| 6003 | VCVT2PH2HF8SZrmbkz = 5990, |
| 6004 | VCVT2PH2HF8SZrmk = 5991, |
| 6005 | VCVT2PH2HF8SZrmkz = 5992, |
| 6006 | VCVT2PH2HF8SZrr = 5993, |
| 6007 | VCVT2PH2HF8SZrrk = 5994, |
| 6008 | VCVT2PH2HF8SZrrkz = 5995, |
| 6009 | VCVT2PH2HF8Z128rm = 5996, |
| 6010 | VCVT2PH2HF8Z128rmb = 5997, |
| 6011 | VCVT2PH2HF8Z128rmbk = 5998, |
| 6012 | VCVT2PH2HF8Z128rmbkz = 5999, |
| 6013 | VCVT2PH2HF8Z128rmk = 6000, |
| 6014 | VCVT2PH2HF8Z128rmkz = 6001, |
| 6015 | VCVT2PH2HF8Z128rr = 6002, |
| 6016 | VCVT2PH2HF8Z128rrk = 6003, |
| 6017 | VCVT2PH2HF8Z128rrkz = 6004, |
| 6018 | VCVT2PH2HF8Z256rm = 6005, |
| 6019 | VCVT2PH2HF8Z256rmb = 6006, |
| 6020 | VCVT2PH2HF8Z256rmbk = 6007, |
| 6021 | VCVT2PH2HF8Z256rmbkz = 6008, |
| 6022 | VCVT2PH2HF8Z256rmk = 6009, |
| 6023 | VCVT2PH2HF8Z256rmkz = 6010, |
| 6024 | VCVT2PH2HF8Z256rr = 6011, |
| 6025 | VCVT2PH2HF8Z256rrk = 6012, |
| 6026 | VCVT2PH2HF8Z256rrkz = 6013, |
| 6027 | VCVT2PH2HF8Zrm = 6014, |
| 6028 | VCVT2PH2HF8Zrmb = 6015, |
| 6029 | VCVT2PH2HF8Zrmbk = 6016, |
| 6030 | VCVT2PH2HF8Zrmbkz = 6017, |
| 6031 | VCVT2PH2HF8Zrmk = 6018, |
| 6032 | VCVT2PH2HF8Zrmkz = 6019, |
| 6033 | VCVT2PH2HF8Zrr = 6020, |
| 6034 | VCVT2PH2HF8Zrrk = 6021, |
| 6035 | VCVT2PH2HF8Zrrkz = 6022, |
| 6036 | VCVT2PS2PHXZ128rm = 6023, |
| 6037 | VCVT2PS2PHXZ128rmb = 6024, |
| 6038 | VCVT2PS2PHXZ128rmbk = 6025, |
| 6039 | VCVT2PS2PHXZ128rmbkz = 6026, |
| 6040 | VCVT2PS2PHXZ128rmk = 6027, |
| 6041 | VCVT2PS2PHXZ128rmkz = 6028, |
| 6042 | VCVT2PS2PHXZ128rr = 6029, |
| 6043 | VCVT2PS2PHXZ128rrk = 6030, |
| 6044 | VCVT2PS2PHXZ128rrkz = 6031, |
| 6045 | VCVT2PS2PHXZ256rm = 6032, |
| 6046 | VCVT2PS2PHXZ256rmb = 6033, |
| 6047 | VCVT2PS2PHXZ256rmbk = 6034, |
| 6048 | VCVT2PS2PHXZ256rmbkz = 6035, |
| 6049 | VCVT2PS2PHXZ256rmk = 6036, |
| 6050 | VCVT2PS2PHXZ256rmkz = 6037, |
| 6051 | VCVT2PS2PHXZ256rr = 6038, |
| 6052 | VCVT2PS2PHXZ256rrk = 6039, |
| 6053 | VCVT2PS2PHXZ256rrkz = 6040, |
| 6054 | VCVT2PS2PHXZrm = 6041, |
| 6055 | VCVT2PS2PHXZrmb = 6042, |
| 6056 | VCVT2PS2PHXZrmbk = 6043, |
| 6057 | VCVT2PS2PHXZrmbkz = 6044, |
| 6058 | VCVT2PS2PHXZrmk = 6045, |
| 6059 | VCVT2PS2PHXZrmkz = 6046, |
| 6060 | VCVT2PS2PHXZrr = 6047, |
| 6061 | VCVT2PS2PHXZrrb = 6048, |
| 6062 | VCVT2PS2PHXZrrbk = 6049, |
| 6063 | VCVT2PS2PHXZrrbkz = 6050, |
| 6064 | VCVT2PS2PHXZrrk = 6051, |
| 6065 | VCVT2PS2PHXZrrkz = 6052, |
| 6066 | VCVTBF162IBSZ128rm = 6053, |
| 6067 | VCVTBF162IBSZ128rmb = 6054, |
| 6068 | VCVTBF162IBSZ128rmbk = 6055, |
| 6069 | VCVTBF162IBSZ128rmbkz = 6056, |
| 6070 | VCVTBF162IBSZ128rmk = 6057, |
| 6071 | VCVTBF162IBSZ128rmkz = 6058, |
| 6072 | VCVTBF162IBSZ128rr = 6059, |
| 6073 | VCVTBF162IBSZ128rrk = 6060, |
| 6074 | VCVTBF162IBSZ128rrkz = 6061, |
| 6075 | VCVTBF162IBSZ256rm = 6062, |
| 6076 | VCVTBF162IBSZ256rmb = 6063, |
| 6077 | VCVTBF162IBSZ256rmbk = 6064, |
| 6078 | VCVTBF162IBSZ256rmbkz = 6065, |
| 6079 | VCVTBF162IBSZ256rmk = 6066, |
| 6080 | VCVTBF162IBSZ256rmkz = 6067, |
| 6081 | VCVTBF162IBSZ256rr = 6068, |
| 6082 | VCVTBF162IBSZ256rrk = 6069, |
| 6083 | VCVTBF162IBSZ256rrkz = 6070, |
| 6084 | VCVTBF162IBSZrm = 6071, |
| 6085 | VCVTBF162IBSZrmb = 6072, |
| 6086 | VCVTBF162IBSZrmbk = 6073, |
| 6087 | VCVTBF162IBSZrmbkz = 6074, |
| 6088 | VCVTBF162IBSZrmk = 6075, |
| 6089 | VCVTBF162IBSZrmkz = 6076, |
| 6090 | VCVTBF162IBSZrr = 6077, |
| 6091 | VCVTBF162IBSZrrk = 6078, |
| 6092 | VCVTBF162IBSZrrkz = 6079, |
| 6093 | VCVTBF162IUBSZ128rm = 6080, |
| 6094 | VCVTBF162IUBSZ128rmb = 6081, |
| 6095 | VCVTBF162IUBSZ128rmbk = 6082, |
| 6096 | VCVTBF162IUBSZ128rmbkz = 6083, |
| 6097 | VCVTBF162IUBSZ128rmk = 6084, |
| 6098 | VCVTBF162IUBSZ128rmkz = 6085, |
| 6099 | VCVTBF162IUBSZ128rr = 6086, |
| 6100 | VCVTBF162IUBSZ128rrk = 6087, |
| 6101 | VCVTBF162IUBSZ128rrkz = 6088, |
| 6102 | VCVTBF162IUBSZ256rm = 6089, |
| 6103 | VCVTBF162IUBSZ256rmb = 6090, |
| 6104 | VCVTBF162IUBSZ256rmbk = 6091, |
| 6105 | VCVTBF162IUBSZ256rmbkz = 6092, |
| 6106 | VCVTBF162IUBSZ256rmk = 6093, |
| 6107 | VCVTBF162IUBSZ256rmkz = 6094, |
| 6108 | VCVTBF162IUBSZ256rr = 6095, |
| 6109 | VCVTBF162IUBSZ256rrk = 6096, |
| 6110 | VCVTBF162IUBSZ256rrkz = 6097, |
| 6111 | VCVTBF162IUBSZrm = 6098, |
| 6112 | VCVTBF162IUBSZrmb = 6099, |
| 6113 | VCVTBF162IUBSZrmbk = 6100, |
| 6114 | VCVTBF162IUBSZrmbkz = 6101, |
| 6115 | VCVTBF162IUBSZrmk = 6102, |
| 6116 | VCVTBF162IUBSZrmkz = 6103, |
| 6117 | VCVTBF162IUBSZrr = 6104, |
| 6118 | VCVTBF162IUBSZrrk = 6105, |
| 6119 | VCVTBF162IUBSZrrkz = 6106, |
| 6120 | VCVTBIASPH2BF8SZ128rm = 6107, |
| 6121 | VCVTBIASPH2BF8SZ128rmb = 6108, |
| 6122 | VCVTBIASPH2BF8SZ128rmbk = 6109, |
| 6123 | VCVTBIASPH2BF8SZ128rmbkz = 6110, |
| 6124 | VCVTBIASPH2BF8SZ128rmk = 6111, |
| 6125 | VCVTBIASPH2BF8SZ128rmkz = 6112, |
| 6126 | VCVTBIASPH2BF8SZ128rr = 6113, |
| 6127 | VCVTBIASPH2BF8SZ128rrk = 6114, |
| 6128 | VCVTBIASPH2BF8SZ128rrkz = 6115, |
| 6129 | VCVTBIASPH2BF8SZ256rm = 6116, |
| 6130 | VCVTBIASPH2BF8SZ256rmb = 6117, |
| 6131 | VCVTBIASPH2BF8SZ256rmbk = 6118, |
| 6132 | VCVTBIASPH2BF8SZ256rmbkz = 6119, |
| 6133 | VCVTBIASPH2BF8SZ256rmk = 6120, |
| 6134 | VCVTBIASPH2BF8SZ256rmkz = 6121, |
| 6135 | VCVTBIASPH2BF8SZ256rr = 6122, |
| 6136 | VCVTBIASPH2BF8SZ256rrk = 6123, |
| 6137 | VCVTBIASPH2BF8SZ256rrkz = 6124, |
| 6138 | VCVTBIASPH2BF8SZrm = 6125, |
| 6139 | VCVTBIASPH2BF8SZrmb = 6126, |
| 6140 | VCVTBIASPH2BF8SZrmbk = 6127, |
| 6141 | VCVTBIASPH2BF8SZrmbkz = 6128, |
| 6142 | VCVTBIASPH2BF8SZrmk = 6129, |
| 6143 | VCVTBIASPH2BF8SZrmkz = 6130, |
| 6144 | VCVTBIASPH2BF8SZrr = 6131, |
| 6145 | VCVTBIASPH2BF8SZrrk = 6132, |
| 6146 | VCVTBIASPH2BF8SZrrkz = 6133, |
| 6147 | VCVTBIASPH2BF8Z128rm = 6134, |
| 6148 | VCVTBIASPH2BF8Z128rmb = 6135, |
| 6149 | VCVTBIASPH2BF8Z128rmbk = 6136, |
| 6150 | VCVTBIASPH2BF8Z128rmbkz = 6137, |
| 6151 | VCVTBIASPH2BF8Z128rmk = 6138, |
| 6152 | VCVTBIASPH2BF8Z128rmkz = 6139, |
| 6153 | VCVTBIASPH2BF8Z128rr = 6140, |
| 6154 | VCVTBIASPH2BF8Z128rrk = 6141, |
| 6155 | VCVTBIASPH2BF8Z128rrkz = 6142, |
| 6156 | VCVTBIASPH2BF8Z256rm = 6143, |
| 6157 | VCVTBIASPH2BF8Z256rmb = 6144, |
| 6158 | VCVTBIASPH2BF8Z256rmbk = 6145, |
| 6159 | VCVTBIASPH2BF8Z256rmbkz = 6146, |
| 6160 | VCVTBIASPH2BF8Z256rmk = 6147, |
| 6161 | VCVTBIASPH2BF8Z256rmkz = 6148, |
| 6162 | VCVTBIASPH2BF8Z256rr = 6149, |
| 6163 | VCVTBIASPH2BF8Z256rrk = 6150, |
| 6164 | VCVTBIASPH2BF8Z256rrkz = 6151, |
| 6165 | VCVTBIASPH2BF8Zrm = 6152, |
| 6166 | VCVTBIASPH2BF8Zrmb = 6153, |
| 6167 | VCVTBIASPH2BF8Zrmbk = 6154, |
| 6168 | VCVTBIASPH2BF8Zrmbkz = 6155, |
| 6169 | VCVTBIASPH2BF8Zrmk = 6156, |
| 6170 | VCVTBIASPH2BF8Zrmkz = 6157, |
| 6171 | VCVTBIASPH2BF8Zrr = 6158, |
| 6172 | VCVTBIASPH2BF8Zrrk = 6159, |
| 6173 | VCVTBIASPH2BF8Zrrkz = 6160, |
| 6174 | VCVTBIASPH2HF8SZ128rm = 6161, |
| 6175 | VCVTBIASPH2HF8SZ128rmb = 6162, |
| 6176 | VCVTBIASPH2HF8SZ128rmbk = 6163, |
| 6177 | VCVTBIASPH2HF8SZ128rmbkz = 6164, |
| 6178 | VCVTBIASPH2HF8SZ128rmk = 6165, |
| 6179 | VCVTBIASPH2HF8SZ128rmkz = 6166, |
| 6180 | VCVTBIASPH2HF8SZ128rr = 6167, |
| 6181 | VCVTBIASPH2HF8SZ128rrk = 6168, |
| 6182 | VCVTBIASPH2HF8SZ128rrkz = 6169, |
| 6183 | VCVTBIASPH2HF8SZ256rm = 6170, |
| 6184 | VCVTBIASPH2HF8SZ256rmb = 6171, |
| 6185 | VCVTBIASPH2HF8SZ256rmbk = 6172, |
| 6186 | VCVTBIASPH2HF8SZ256rmbkz = 6173, |
| 6187 | VCVTBIASPH2HF8SZ256rmk = 6174, |
| 6188 | VCVTBIASPH2HF8SZ256rmkz = 6175, |
| 6189 | VCVTBIASPH2HF8SZ256rr = 6176, |
| 6190 | VCVTBIASPH2HF8SZ256rrk = 6177, |
| 6191 | VCVTBIASPH2HF8SZ256rrkz = 6178, |
| 6192 | VCVTBIASPH2HF8SZrm = 6179, |
| 6193 | VCVTBIASPH2HF8SZrmb = 6180, |
| 6194 | VCVTBIASPH2HF8SZrmbk = 6181, |
| 6195 | VCVTBIASPH2HF8SZrmbkz = 6182, |
| 6196 | VCVTBIASPH2HF8SZrmk = 6183, |
| 6197 | VCVTBIASPH2HF8SZrmkz = 6184, |
| 6198 | VCVTBIASPH2HF8SZrr = 6185, |
| 6199 | VCVTBIASPH2HF8SZrrk = 6186, |
| 6200 | VCVTBIASPH2HF8SZrrkz = 6187, |
| 6201 | VCVTBIASPH2HF8Z128rm = 6188, |
| 6202 | VCVTBIASPH2HF8Z128rmb = 6189, |
| 6203 | VCVTBIASPH2HF8Z128rmbk = 6190, |
| 6204 | VCVTBIASPH2HF8Z128rmbkz = 6191, |
| 6205 | VCVTBIASPH2HF8Z128rmk = 6192, |
| 6206 | VCVTBIASPH2HF8Z128rmkz = 6193, |
| 6207 | VCVTBIASPH2HF8Z128rr = 6194, |
| 6208 | VCVTBIASPH2HF8Z128rrk = 6195, |
| 6209 | VCVTBIASPH2HF8Z128rrkz = 6196, |
| 6210 | VCVTBIASPH2HF8Z256rm = 6197, |
| 6211 | VCVTBIASPH2HF8Z256rmb = 6198, |
| 6212 | VCVTBIASPH2HF8Z256rmbk = 6199, |
| 6213 | VCVTBIASPH2HF8Z256rmbkz = 6200, |
| 6214 | VCVTBIASPH2HF8Z256rmk = 6201, |
| 6215 | VCVTBIASPH2HF8Z256rmkz = 6202, |
| 6216 | VCVTBIASPH2HF8Z256rr = 6203, |
| 6217 | VCVTBIASPH2HF8Z256rrk = 6204, |
| 6218 | VCVTBIASPH2HF8Z256rrkz = 6205, |
| 6219 | VCVTBIASPH2HF8Zrm = 6206, |
| 6220 | VCVTBIASPH2HF8Zrmb = 6207, |
| 6221 | VCVTBIASPH2HF8Zrmbk = 6208, |
| 6222 | VCVTBIASPH2HF8Zrmbkz = 6209, |
| 6223 | VCVTBIASPH2HF8Zrmk = 6210, |
| 6224 | VCVTBIASPH2HF8Zrmkz = 6211, |
| 6225 | VCVTBIASPH2HF8Zrr = 6212, |
| 6226 | VCVTBIASPH2HF8Zrrk = 6213, |
| 6227 | VCVTBIASPH2HF8Zrrkz = 6214, |
| 6228 | VCVTDQ2PDYrm = 6215, |
| 6229 | VCVTDQ2PDYrr = 6216, |
| 6230 | VCVTDQ2PDZ128rm = 6217, |
| 6231 | VCVTDQ2PDZ128rmb = 6218, |
| 6232 | VCVTDQ2PDZ128rmbk = 6219, |
| 6233 | VCVTDQ2PDZ128rmbkz = 6220, |
| 6234 | VCVTDQ2PDZ128rmk = 6221, |
| 6235 | VCVTDQ2PDZ128rmkz = 6222, |
| 6236 | VCVTDQ2PDZ128rr = 6223, |
| 6237 | VCVTDQ2PDZ128rrk = 6224, |
| 6238 | VCVTDQ2PDZ128rrkz = 6225, |
| 6239 | VCVTDQ2PDZ256rm = 6226, |
| 6240 | VCVTDQ2PDZ256rmb = 6227, |
| 6241 | VCVTDQ2PDZ256rmbk = 6228, |
| 6242 | VCVTDQ2PDZ256rmbkz = 6229, |
| 6243 | VCVTDQ2PDZ256rmk = 6230, |
| 6244 | VCVTDQ2PDZ256rmkz = 6231, |
| 6245 | VCVTDQ2PDZ256rr = 6232, |
| 6246 | VCVTDQ2PDZ256rrk = 6233, |
| 6247 | VCVTDQ2PDZ256rrkz = 6234, |
| 6248 | VCVTDQ2PDZrm = 6235, |
| 6249 | VCVTDQ2PDZrmb = 6236, |
| 6250 | VCVTDQ2PDZrmbk = 6237, |
| 6251 | VCVTDQ2PDZrmbkz = 6238, |
| 6252 | VCVTDQ2PDZrmk = 6239, |
| 6253 | VCVTDQ2PDZrmkz = 6240, |
| 6254 | VCVTDQ2PDZrr = 6241, |
| 6255 | VCVTDQ2PDZrrk = 6242, |
| 6256 | VCVTDQ2PDZrrkz = 6243, |
| 6257 | VCVTDQ2PDrm = 6244, |
| 6258 | VCVTDQ2PDrr = 6245, |
| 6259 | VCVTDQ2PHZ128rm = 6246, |
| 6260 | VCVTDQ2PHZ128rmb = 6247, |
| 6261 | VCVTDQ2PHZ128rmbk = 6248, |
| 6262 | VCVTDQ2PHZ128rmbkz = 6249, |
| 6263 | VCVTDQ2PHZ128rmk = 6250, |
| 6264 | VCVTDQ2PHZ128rmkz = 6251, |
| 6265 | VCVTDQ2PHZ128rr = 6252, |
| 6266 | VCVTDQ2PHZ128rrk = 6253, |
| 6267 | VCVTDQ2PHZ128rrkz = 6254, |
| 6268 | VCVTDQ2PHZ256rm = 6255, |
| 6269 | VCVTDQ2PHZ256rmb = 6256, |
| 6270 | VCVTDQ2PHZ256rmbk = 6257, |
| 6271 | VCVTDQ2PHZ256rmbkz = 6258, |
| 6272 | VCVTDQ2PHZ256rmk = 6259, |
| 6273 | VCVTDQ2PHZ256rmkz = 6260, |
| 6274 | VCVTDQ2PHZ256rr = 6261, |
| 6275 | VCVTDQ2PHZ256rrk = 6262, |
| 6276 | VCVTDQ2PHZ256rrkz = 6263, |
| 6277 | VCVTDQ2PHZrm = 6264, |
| 6278 | VCVTDQ2PHZrmb = 6265, |
| 6279 | VCVTDQ2PHZrmbk = 6266, |
| 6280 | VCVTDQ2PHZrmbkz = 6267, |
| 6281 | VCVTDQ2PHZrmk = 6268, |
| 6282 | VCVTDQ2PHZrmkz = 6269, |
| 6283 | VCVTDQ2PHZrr = 6270, |
| 6284 | VCVTDQ2PHZrrb = 6271, |
| 6285 | VCVTDQ2PHZrrbk = 6272, |
| 6286 | VCVTDQ2PHZrrbkz = 6273, |
| 6287 | VCVTDQ2PHZrrk = 6274, |
| 6288 | VCVTDQ2PHZrrkz = 6275, |
| 6289 | VCVTDQ2PSYrm = 6276, |
| 6290 | VCVTDQ2PSYrr = 6277, |
| 6291 | VCVTDQ2PSZ128rm = 6278, |
| 6292 | VCVTDQ2PSZ128rmb = 6279, |
| 6293 | VCVTDQ2PSZ128rmbk = 6280, |
| 6294 | VCVTDQ2PSZ128rmbkz = 6281, |
| 6295 | VCVTDQ2PSZ128rmk = 6282, |
| 6296 | VCVTDQ2PSZ128rmkz = 6283, |
| 6297 | VCVTDQ2PSZ128rr = 6284, |
| 6298 | VCVTDQ2PSZ128rrk = 6285, |
| 6299 | VCVTDQ2PSZ128rrkz = 6286, |
| 6300 | VCVTDQ2PSZ256rm = 6287, |
| 6301 | VCVTDQ2PSZ256rmb = 6288, |
| 6302 | VCVTDQ2PSZ256rmbk = 6289, |
| 6303 | VCVTDQ2PSZ256rmbkz = 6290, |
| 6304 | VCVTDQ2PSZ256rmk = 6291, |
| 6305 | VCVTDQ2PSZ256rmkz = 6292, |
| 6306 | VCVTDQ2PSZ256rr = 6293, |
| 6307 | VCVTDQ2PSZ256rrk = 6294, |
| 6308 | VCVTDQ2PSZ256rrkz = 6295, |
| 6309 | VCVTDQ2PSZrm = 6296, |
| 6310 | VCVTDQ2PSZrmb = 6297, |
| 6311 | VCVTDQ2PSZrmbk = 6298, |
| 6312 | VCVTDQ2PSZrmbkz = 6299, |
| 6313 | VCVTDQ2PSZrmk = 6300, |
| 6314 | VCVTDQ2PSZrmkz = 6301, |
| 6315 | VCVTDQ2PSZrr = 6302, |
| 6316 | VCVTDQ2PSZrrb = 6303, |
| 6317 | VCVTDQ2PSZrrbk = 6304, |
| 6318 | VCVTDQ2PSZrrbkz = 6305, |
| 6319 | VCVTDQ2PSZrrk = 6306, |
| 6320 | VCVTDQ2PSZrrkz = 6307, |
| 6321 | VCVTDQ2PSrm = 6308, |
| 6322 | VCVTDQ2PSrr = 6309, |
| 6323 | VCVTHF82PHZ128rm = 6310, |
| 6324 | VCVTHF82PHZ128rmk = 6311, |
| 6325 | VCVTHF82PHZ128rmkz = 6312, |
| 6326 | VCVTHF82PHZ128rr = 6313, |
| 6327 | VCVTHF82PHZ128rrk = 6314, |
| 6328 | VCVTHF82PHZ128rrkz = 6315, |
| 6329 | VCVTHF82PHZ256rm = 6316, |
| 6330 | VCVTHF82PHZ256rmk = 6317, |
| 6331 | VCVTHF82PHZ256rmkz = 6318, |
| 6332 | VCVTHF82PHZ256rr = 6319, |
| 6333 | VCVTHF82PHZ256rrk = 6320, |
| 6334 | VCVTHF82PHZ256rrkz = 6321, |
| 6335 | VCVTHF82PHZrm = 6322, |
| 6336 | VCVTHF82PHZrmk = 6323, |
| 6337 | VCVTHF82PHZrmkz = 6324, |
| 6338 | VCVTHF82PHZrr = 6325, |
| 6339 | VCVTHF82PHZrrk = 6326, |
| 6340 | VCVTHF82PHZrrkz = 6327, |
| 6341 | VCVTNE2PS2BF16Z128rm = 6328, |
| 6342 | VCVTNE2PS2BF16Z128rmb = 6329, |
| 6343 | VCVTNE2PS2BF16Z128rmbk = 6330, |
| 6344 | VCVTNE2PS2BF16Z128rmbkz = 6331, |
| 6345 | VCVTNE2PS2BF16Z128rmk = 6332, |
| 6346 | VCVTNE2PS2BF16Z128rmkz = 6333, |
| 6347 | VCVTNE2PS2BF16Z128rr = 6334, |
| 6348 | VCVTNE2PS2BF16Z128rrk = 6335, |
| 6349 | VCVTNE2PS2BF16Z128rrkz = 6336, |
| 6350 | VCVTNE2PS2BF16Z256rm = 6337, |
| 6351 | VCVTNE2PS2BF16Z256rmb = 6338, |
| 6352 | VCVTNE2PS2BF16Z256rmbk = 6339, |
| 6353 | VCVTNE2PS2BF16Z256rmbkz = 6340, |
| 6354 | VCVTNE2PS2BF16Z256rmk = 6341, |
| 6355 | VCVTNE2PS2BF16Z256rmkz = 6342, |
| 6356 | VCVTNE2PS2BF16Z256rr = 6343, |
| 6357 | VCVTNE2PS2BF16Z256rrk = 6344, |
| 6358 | VCVTNE2PS2BF16Z256rrkz = 6345, |
| 6359 | VCVTNE2PS2BF16Zrm = 6346, |
| 6360 | VCVTNE2PS2BF16Zrmb = 6347, |
| 6361 | VCVTNE2PS2BF16Zrmbk = 6348, |
| 6362 | VCVTNE2PS2BF16Zrmbkz = 6349, |
| 6363 | VCVTNE2PS2BF16Zrmk = 6350, |
| 6364 | VCVTNE2PS2BF16Zrmkz = 6351, |
| 6365 | VCVTNE2PS2BF16Zrr = 6352, |
| 6366 | VCVTNE2PS2BF16Zrrk = 6353, |
| 6367 | VCVTNE2PS2BF16Zrrkz = 6354, |
| 6368 | VCVTNEEBF162PSYrm = 6355, |
| 6369 | VCVTNEEBF162PSrm = 6356, |
| 6370 | VCVTNEEPH2PSYrm = 6357, |
| 6371 | VCVTNEEPH2PSrm = 6358, |
| 6372 | VCVTNEOBF162PSYrm = 6359, |
| 6373 | VCVTNEOBF162PSrm = 6360, |
| 6374 | VCVTNEOPH2PSYrm = 6361, |
| 6375 | VCVTNEOPH2PSrm = 6362, |
| 6376 | VCVTNEPS2BF16Yrm = 6363, |
| 6377 | VCVTNEPS2BF16Yrr = 6364, |
| 6378 | VCVTNEPS2BF16Z128rm = 6365, |
| 6379 | VCVTNEPS2BF16Z128rmb = 6366, |
| 6380 | VCVTNEPS2BF16Z128rmbk = 6367, |
| 6381 | VCVTNEPS2BF16Z128rmbkz = 6368, |
| 6382 | VCVTNEPS2BF16Z128rmk = 6369, |
| 6383 | VCVTNEPS2BF16Z128rmkz = 6370, |
| 6384 | VCVTNEPS2BF16Z128rr = 6371, |
| 6385 | VCVTNEPS2BF16Z128rrk = 6372, |
| 6386 | VCVTNEPS2BF16Z128rrkz = 6373, |
| 6387 | VCVTNEPS2BF16Z256rm = 6374, |
| 6388 | VCVTNEPS2BF16Z256rmb = 6375, |
| 6389 | VCVTNEPS2BF16Z256rmbk = 6376, |
| 6390 | VCVTNEPS2BF16Z256rmbkz = 6377, |
| 6391 | VCVTNEPS2BF16Z256rmk = 6378, |
| 6392 | VCVTNEPS2BF16Z256rmkz = 6379, |
| 6393 | VCVTNEPS2BF16Z256rr = 6380, |
| 6394 | VCVTNEPS2BF16Z256rrk = 6381, |
| 6395 | VCVTNEPS2BF16Z256rrkz = 6382, |
| 6396 | VCVTNEPS2BF16Zrm = 6383, |
| 6397 | VCVTNEPS2BF16Zrmb = 6384, |
| 6398 | VCVTNEPS2BF16Zrmbk = 6385, |
| 6399 | VCVTNEPS2BF16Zrmbkz = 6386, |
| 6400 | VCVTNEPS2BF16Zrmk = 6387, |
| 6401 | VCVTNEPS2BF16Zrmkz = 6388, |
| 6402 | VCVTNEPS2BF16Zrr = 6389, |
| 6403 | VCVTNEPS2BF16Zrrk = 6390, |
| 6404 | VCVTNEPS2BF16Zrrkz = 6391, |
| 6405 | VCVTNEPS2BF16rm = 6392, |
| 6406 | VCVTNEPS2BF16rr = 6393, |
| 6407 | VCVTPD2DQYrm = 6394, |
| 6408 | VCVTPD2DQYrr = 6395, |
| 6409 | VCVTPD2DQZ128rm = 6396, |
| 6410 | VCVTPD2DQZ128rmb = 6397, |
| 6411 | VCVTPD2DQZ128rmbk = 6398, |
| 6412 | VCVTPD2DQZ128rmbkz = 6399, |
| 6413 | VCVTPD2DQZ128rmk = 6400, |
| 6414 | VCVTPD2DQZ128rmkz = 6401, |
| 6415 | VCVTPD2DQZ128rr = 6402, |
| 6416 | VCVTPD2DQZ128rrk = 6403, |
| 6417 | VCVTPD2DQZ128rrkz = 6404, |
| 6418 | VCVTPD2DQZ256rm = 6405, |
| 6419 | VCVTPD2DQZ256rmb = 6406, |
| 6420 | VCVTPD2DQZ256rmbk = 6407, |
| 6421 | VCVTPD2DQZ256rmbkz = 6408, |
| 6422 | VCVTPD2DQZ256rmk = 6409, |
| 6423 | VCVTPD2DQZ256rmkz = 6410, |
| 6424 | VCVTPD2DQZ256rr = 6411, |
| 6425 | VCVTPD2DQZ256rrk = 6412, |
| 6426 | VCVTPD2DQZ256rrkz = 6413, |
| 6427 | VCVTPD2DQZrm = 6414, |
| 6428 | VCVTPD2DQZrmb = 6415, |
| 6429 | VCVTPD2DQZrmbk = 6416, |
| 6430 | VCVTPD2DQZrmbkz = 6417, |
| 6431 | VCVTPD2DQZrmk = 6418, |
| 6432 | VCVTPD2DQZrmkz = 6419, |
| 6433 | VCVTPD2DQZrr = 6420, |
| 6434 | VCVTPD2DQZrrb = 6421, |
| 6435 | VCVTPD2DQZrrbk = 6422, |
| 6436 | VCVTPD2DQZrrbkz = 6423, |
| 6437 | VCVTPD2DQZrrk = 6424, |
| 6438 | VCVTPD2DQZrrkz = 6425, |
| 6439 | VCVTPD2DQrm = 6426, |
| 6440 | VCVTPD2DQrr = 6427, |
| 6441 | VCVTPD2PHZ128rm = 6428, |
| 6442 | VCVTPD2PHZ128rmb = 6429, |
| 6443 | VCVTPD2PHZ128rmbk = 6430, |
| 6444 | VCVTPD2PHZ128rmbkz = 6431, |
| 6445 | VCVTPD2PHZ128rmk = 6432, |
| 6446 | VCVTPD2PHZ128rmkz = 6433, |
| 6447 | VCVTPD2PHZ128rr = 6434, |
| 6448 | VCVTPD2PHZ128rrk = 6435, |
| 6449 | VCVTPD2PHZ128rrkz = 6436, |
| 6450 | VCVTPD2PHZ256rm = 6437, |
| 6451 | VCVTPD2PHZ256rmb = 6438, |
| 6452 | VCVTPD2PHZ256rmbk = 6439, |
| 6453 | VCVTPD2PHZ256rmbkz = 6440, |
| 6454 | VCVTPD2PHZ256rmk = 6441, |
| 6455 | VCVTPD2PHZ256rmkz = 6442, |
| 6456 | VCVTPD2PHZ256rr = 6443, |
| 6457 | VCVTPD2PHZ256rrk = 6444, |
| 6458 | VCVTPD2PHZ256rrkz = 6445, |
| 6459 | VCVTPD2PHZrm = 6446, |
| 6460 | VCVTPD2PHZrmb = 6447, |
| 6461 | VCVTPD2PHZrmbk = 6448, |
| 6462 | VCVTPD2PHZrmbkz = 6449, |
| 6463 | VCVTPD2PHZrmk = 6450, |
| 6464 | VCVTPD2PHZrmkz = 6451, |
| 6465 | VCVTPD2PHZrr = 6452, |
| 6466 | VCVTPD2PHZrrb = 6453, |
| 6467 | VCVTPD2PHZrrbk = 6454, |
| 6468 | VCVTPD2PHZrrbkz = 6455, |
| 6469 | VCVTPD2PHZrrk = 6456, |
| 6470 | VCVTPD2PHZrrkz = 6457, |
| 6471 | VCVTPD2PSYrm = 6458, |
| 6472 | VCVTPD2PSYrr = 6459, |
| 6473 | VCVTPD2PSZ128rm = 6460, |
| 6474 | VCVTPD2PSZ128rmb = 6461, |
| 6475 | VCVTPD2PSZ128rmbk = 6462, |
| 6476 | VCVTPD2PSZ128rmbkz = 6463, |
| 6477 | VCVTPD2PSZ128rmk = 6464, |
| 6478 | VCVTPD2PSZ128rmkz = 6465, |
| 6479 | VCVTPD2PSZ128rr = 6466, |
| 6480 | VCVTPD2PSZ128rrk = 6467, |
| 6481 | VCVTPD2PSZ128rrkz = 6468, |
| 6482 | VCVTPD2PSZ256rm = 6469, |
| 6483 | VCVTPD2PSZ256rmb = 6470, |
| 6484 | VCVTPD2PSZ256rmbk = 6471, |
| 6485 | VCVTPD2PSZ256rmbkz = 6472, |
| 6486 | VCVTPD2PSZ256rmk = 6473, |
| 6487 | VCVTPD2PSZ256rmkz = 6474, |
| 6488 | VCVTPD2PSZ256rr = 6475, |
| 6489 | VCVTPD2PSZ256rrk = 6476, |
| 6490 | VCVTPD2PSZ256rrkz = 6477, |
| 6491 | VCVTPD2PSZrm = 6478, |
| 6492 | VCVTPD2PSZrmb = 6479, |
| 6493 | VCVTPD2PSZrmbk = 6480, |
| 6494 | VCVTPD2PSZrmbkz = 6481, |
| 6495 | VCVTPD2PSZrmk = 6482, |
| 6496 | VCVTPD2PSZrmkz = 6483, |
| 6497 | VCVTPD2PSZrr = 6484, |
| 6498 | VCVTPD2PSZrrb = 6485, |
| 6499 | VCVTPD2PSZrrbk = 6486, |
| 6500 | VCVTPD2PSZrrbkz = 6487, |
| 6501 | VCVTPD2PSZrrk = 6488, |
| 6502 | VCVTPD2PSZrrkz = 6489, |
| 6503 | VCVTPD2PSrm = 6490, |
| 6504 | VCVTPD2PSrr = 6491, |
| 6505 | VCVTPD2QQZ128rm = 6492, |
| 6506 | VCVTPD2QQZ128rmb = 6493, |
| 6507 | VCVTPD2QQZ128rmbk = 6494, |
| 6508 | VCVTPD2QQZ128rmbkz = 6495, |
| 6509 | VCVTPD2QQZ128rmk = 6496, |
| 6510 | VCVTPD2QQZ128rmkz = 6497, |
| 6511 | VCVTPD2QQZ128rr = 6498, |
| 6512 | VCVTPD2QQZ128rrk = 6499, |
| 6513 | VCVTPD2QQZ128rrkz = 6500, |
| 6514 | VCVTPD2QQZ256rm = 6501, |
| 6515 | VCVTPD2QQZ256rmb = 6502, |
| 6516 | VCVTPD2QQZ256rmbk = 6503, |
| 6517 | VCVTPD2QQZ256rmbkz = 6504, |
| 6518 | VCVTPD2QQZ256rmk = 6505, |
| 6519 | VCVTPD2QQZ256rmkz = 6506, |
| 6520 | VCVTPD2QQZ256rr = 6507, |
| 6521 | VCVTPD2QQZ256rrk = 6508, |
| 6522 | VCVTPD2QQZ256rrkz = 6509, |
| 6523 | VCVTPD2QQZrm = 6510, |
| 6524 | VCVTPD2QQZrmb = 6511, |
| 6525 | VCVTPD2QQZrmbk = 6512, |
| 6526 | VCVTPD2QQZrmbkz = 6513, |
| 6527 | VCVTPD2QQZrmk = 6514, |
| 6528 | VCVTPD2QQZrmkz = 6515, |
| 6529 | VCVTPD2QQZrr = 6516, |
| 6530 | VCVTPD2QQZrrb = 6517, |
| 6531 | VCVTPD2QQZrrbk = 6518, |
| 6532 | VCVTPD2QQZrrbkz = 6519, |
| 6533 | VCVTPD2QQZrrk = 6520, |
| 6534 | VCVTPD2QQZrrkz = 6521, |
| 6535 | VCVTPD2UDQZ128rm = 6522, |
| 6536 | VCVTPD2UDQZ128rmb = 6523, |
| 6537 | VCVTPD2UDQZ128rmbk = 6524, |
| 6538 | VCVTPD2UDQZ128rmbkz = 6525, |
| 6539 | VCVTPD2UDQZ128rmk = 6526, |
| 6540 | VCVTPD2UDQZ128rmkz = 6527, |
| 6541 | VCVTPD2UDQZ128rr = 6528, |
| 6542 | VCVTPD2UDQZ128rrk = 6529, |
| 6543 | VCVTPD2UDQZ128rrkz = 6530, |
| 6544 | VCVTPD2UDQZ256rm = 6531, |
| 6545 | VCVTPD2UDQZ256rmb = 6532, |
| 6546 | VCVTPD2UDQZ256rmbk = 6533, |
| 6547 | VCVTPD2UDQZ256rmbkz = 6534, |
| 6548 | VCVTPD2UDQZ256rmk = 6535, |
| 6549 | VCVTPD2UDQZ256rmkz = 6536, |
| 6550 | VCVTPD2UDQZ256rr = 6537, |
| 6551 | VCVTPD2UDQZ256rrk = 6538, |
| 6552 | VCVTPD2UDQZ256rrkz = 6539, |
| 6553 | VCVTPD2UDQZrm = 6540, |
| 6554 | VCVTPD2UDQZrmb = 6541, |
| 6555 | VCVTPD2UDQZrmbk = 6542, |
| 6556 | VCVTPD2UDQZrmbkz = 6543, |
| 6557 | VCVTPD2UDQZrmk = 6544, |
| 6558 | VCVTPD2UDQZrmkz = 6545, |
| 6559 | VCVTPD2UDQZrr = 6546, |
| 6560 | VCVTPD2UDQZrrb = 6547, |
| 6561 | VCVTPD2UDQZrrbk = 6548, |
| 6562 | VCVTPD2UDQZrrbkz = 6549, |
| 6563 | VCVTPD2UDQZrrk = 6550, |
| 6564 | VCVTPD2UDQZrrkz = 6551, |
| 6565 | VCVTPD2UQQZ128rm = 6552, |
| 6566 | VCVTPD2UQQZ128rmb = 6553, |
| 6567 | VCVTPD2UQQZ128rmbk = 6554, |
| 6568 | VCVTPD2UQQZ128rmbkz = 6555, |
| 6569 | VCVTPD2UQQZ128rmk = 6556, |
| 6570 | VCVTPD2UQQZ128rmkz = 6557, |
| 6571 | VCVTPD2UQQZ128rr = 6558, |
| 6572 | VCVTPD2UQQZ128rrk = 6559, |
| 6573 | VCVTPD2UQQZ128rrkz = 6560, |
| 6574 | VCVTPD2UQQZ256rm = 6561, |
| 6575 | VCVTPD2UQQZ256rmb = 6562, |
| 6576 | VCVTPD2UQQZ256rmbk = 6563, |
| 6577 | VCVTPD2UQQZ256rmbkz = 6564, |
| 6578 | VCVTPD2UQQZ256rmk = 6565, |
| 6579 | VCVTPD2UQQZ256rmkz = 6566, |
| 6580 | VCVTPD2UQQZ256rr = 6567, |
| 6581 | VCVTPD2UQQZ256rrk = 6568, |
| 6582 | VCVTPD2UQQZ256rrkz = 6569, |
| 6583 | VCVTPD2UQQZrm = 6570, |
| 6584 | VCVTPD2UQQZrmb = 6571, |
| 6585 | VCVTPD2UQQZrmbk = 6572, |
| 6586 | VCVTPD2UQQZrmbkz = 6573, |
| 6587 | VCVTPD2UQQZrmk = 6574, |
| 6588 | VCVTPD2UQQZrmkz = 6575, |
| 6589 | VCVTPD2UQQZrr = 6576, |
| 6590 | VCVTPD2UQQZrrb = 6577, |
| 6591 | VCVTPD2UQQZrrbk = 6578, |
| 6592 | VCVTPD2UQQZrrbkz = 6579, |
| 6593 | VCVTPD2UQQZrrk = 6580, |
| 6594 | VCVTPD2UQQZrrkz = 6581, |
| 6595 | VCVTPH2BF8SZ128rm = 6582, |
| 6596 | VCVTPH2BF8SZ128rmb = 6583, |
| 6597 | VCVTPH2BF8SZ128rmbk = 6584, |
| 6598 | VCVTPH2BF8SZ128rmbkz = 6585, |
| 6599 | VCVTPH2BF8SZ128rmk = 6586, |
| 6600 | VCVTPH2BF8SZ128rmkz = 6587, |
| 6601 | VCVTPH2BF8SZ128rr = 6588, |
| 6602 | VCVTPH2BF8SZ128rrk = 6589, |
| 6603 | VCVTPH2BF8SZ128rrkz = 6590, |
| 6604 | VCVTPH2BF8SZ256rm = 6591, |
| 6605 | VCVTPH2BF8SZ256rmb = 6592, |
| 6606 | VCVTPH2BF8SZ256rmbk = 6593, |
| 6607 | VCVTPH2BF8SZ256rmbkz = 6594, |
| 6608 | VCVTPH2BF8SZ256rmk = 6595, |
| 6609 | VCVTPH2BF8SZ256rmkz = 6596, |
| 6610 | VCVTPH2BF8SZ256rr = 6597, |
| 6611 | VCVTPH2BF8SZ256rrk = 6598, |
| 6612 | VCVTPH2BF8SZ256rrkz = 6599, |
| 6613 | VCVTPH2BF8SZrm = 6600, |
| 6614 | VCVTPH2BF8SZrmb = 6601, |
| 6615 | VCVTPH2BF8SZrmbk = 6602, |
| 6616 | VCVTPH2BF8SZrmbkz = 6603, |
| 6617 | VCVTPH2BF8SZrmk = 6604, |
| 6618 | VCVTPH2BF8SZrmkz = 6605, |
| 6619 | VCVTPH2BF8SZrr = 6606, |
| 6620 | VCVTPH2BF8SZrrk = 6607, |
| 6621 | VCVTPH2BF8SZrrkz = 6608, |
| 6622 | VCVTPH2BF8Z128rm = 6609, |
| 6623 | VCVTPH2BF8Z128rmb = 6610, |
| 6624 | VCVTPH2BF8Z128rmbk = 6611, |
| 6625 | VCVTPH2BF8Z128rmbkz = 6612, |
| 6626 | VCVTPH2BF8Z128rmk = 6613, |
| 6627 | VCVTPH2BF8Z128rmkz = 6614, |
| 6628 | VCVTPH2BF8Z128rr = 6615, |
| 6629 | VCVTPH2BF8Z128rrk = 6616, |
| 6630 | VCVTPH2BF8Z128rrkz = 6617, |
| 6631 | VCVTPH2BF8Z256rm = 6618, |
| 6632 | VCVTPH2BF8Z256rmb = 6619, |
| 6633 | VCVTPH2BF8Z256rmbk = 6620, |
| 6634 | VCVTPH2BF8Z256rmbkz = 6621, |
| 6635 | VCVTPH2BF8Z256rmk = 6622, |
| 6636 | VCVTPH2BF8Z256rmkz = 6623, |
| 6637 | VCVTPH2BF8Z256rr = 6624, |
| 6638 | VCVTPH2BF8Z256rrk = 6625, |
| 6639 | VCVTPH2BF8Z256rrkz = 6626, |
| 6640 | VCVTPH2BF8Zrm = 6627, |
| 6641 | VCVTPH2BF8Zrmb = 6628, |
| 6642 | VCVTPH2BF8Zrmbk = 6629, |
| 6643 | VCVTPH2BF8Zrmbkz = 6630, |
| 6644 | VCVTPH2BF8Zrmk = 6631, |
| 6645 | VCVTPH2BF8Zrmkz = 6632, |
| 6646 | VCVTPH2BF8Zrr = 6633, |
| 6647 | VCVTPH2BF8Zrrk = 6634, |
| 6648 | VCVTPH2BF8Zrrkz = 6635, |
| 6649 | VCVTPH2DQZ128rm = 6636, |
| 6650 | VCVTPH2DQZ128rmb = 6637, |
| 6651 | VCVTPH2DQZ128rmbk = 6638, |
| 6652 | VCVTPH2DQZ128rmbkz = 6639, |
| 6653 | VCVTPH2DQZ128rmk = 6640, |
| 6654 | VCVTPH2DQZ128rmkz = 6641, |
| 6655 | VCVTPH2DQZ128rr = 6642, |
| 6656 | VCVTPH2DQZ128rrk = 6643, |
| 6657 | VCVTPH2DQZ128rrkz = 6644, |
| 6658 | VCVTPH2DQZ256rm = 6645, |
| 6659 | VCVTPH2DQZ256rmb = 6646, |
| 6660 | VCVTPH2DQZ256rmbk = 6647, |
| 6661 | VCVTPH2DQZ256rmbkz = 6648, |
| 6662 | VCVTPH2DQZ256rmk = 6649, |
| 6663 | VCVTPH2DQZ256rmkz = 6650, |
| 6664 | VCVTPH2DQZ256rr = 6651, |
| 6665 | VCVTPH2DQZ256rrk = 6652, |
| 6666 | VCVTPH2DQZ256rrkz = 6653, |
| 6667 | VCVTPH2DQZrm = 6654, |
| 6668 | VCVTPH2DQZrmb = 6655, |
| 6669 | VCVTPH2DQZrmbk = 6656, |
| 6670 | VCVTPH2DQZrmbkz = 6657, |
| 6671 | VCVTPH2DQZrmk = 6658, |
| 6672 | VCVTPH2DQZrmkz = 6659, |
| 6673 | VCVTPH2DQZrr = 6660, |
| 6674 | VCVTPH2DQZrrb = 6661, |
| 6675 | VCVTPH2DQZrrbk = 6662, |
| 6676 | VCVTPH2DQZrrbkz = 6663, |
| 6677 | VCVTPH2DQZrrk = 6664, |
| 6678 | VCVTPH2DQZrrkz = 6665, |
| 6679 | VCVTPH2HF8SZ128rm = 6666, |
| 6680 | VCVTPH2HF8SZ128rmb = 6667, |
| 6681 | VCVTPH2HF8SZ128rmbk = 6668, |
| 6682 | VCVTPH2HF8SZ128rmbkz = 6669, |
| 6683 | VCVTPH2HF8SZ128rmk = 6670, |
| 6684 | VCVTPH2HF8SZ128rmkz = 6671, |
| 6685 | VCVTPH2HF8SZ128rr = 6672, |
| 6686 | VCVTPH2HF8SZ128rrk = 6673, |
| 6687 | VCVTPH2HF8SZ128rrkz = 6674, |
| 6688 | VCVTPH2HF8SZ256rm = 6675, |
| 6689 | VCVTPH2HF8SZ256rmb = 6676, |
| 6690 | VCVTPH2HF8SZ256rmbk = 6677, |
| 6691 | VCVTPH2HF8SZ256rmbkz = 6678, |
| 6692 | VCVTPH2HF8SZ256rmk = 6679, |
| 6693 | VCVTPH2HF8SZ256rmkz = 6680, |
| 6694 | VCVTPH2HF8SZ256rr = 6681, |
| 6695 | VCVTPH2HF8SZ256rrk = 6682, |
| 6696 | VCVTPH2HF8SZ256rrkz = 6683, |
| 6697 | VCVTPH2HF8SZrm = 6684, |
| 6698 | VCVTPH2HF8SZrmb = 6685, |
| 6699 | VCVTPH2HF8SZrmbk = 6686, |
| 6700 | VCVTPH2HF8SZrmbkz = 6687, |
| 6701 | VCVTPH2HF8SZrmk = 6688, |
| 6702 | VCVTPH2HF8SZrmkz = 6689, |
| 6703 | VCVTPH2HF8SZrr = 6690, |
| 6704 | VCVTPH2HF8SZrrk = 6691, |
| 6705 | VCVTPH2HF8SZrrkz = 6692, |
| 6706 | VCVTPH2HF8Z128rm = 6693, |
| 6707 | VCVTPH2HF8Z128rmb = 6694, |
| 6708 | VCVTPH2HF8Z128rmbk = 6695, |
| 6709 | VCVTPH2HF8Z128rmbkz = 6696, |
| 6710 | VCVTPH2HF8Z128rmk = 6697, |
| 6711 | VCVTPH2HF8Z128rmkz = 6698, |
| 6712 | VCVTPH2HF8Z128rr = 6699, |
| 6713 | VCVTPH2HF8Z128rrk = 6700, |
| 6714 | VCVTPH2HF8Z128rrkz = 6701, |
| 6715 | VCVTPH2HF8Z256rm = 6702, |
| 6716 | VCVTPH2HF8Z256rmb = 6703, |
| 6717 | VCVTPH2HF8Z256rmbk = 6704, |
| 6718 | VCVTPH2HF8Z256rmbkz = 6705, |
| 6719 | VCVTPH2HF8Z256rmk = 6706, |
| 6720 | VCVTPH2HF8Z256rmkz = 6707, |
| 6721 | VCVTPH2HF8Z256rr = 6708, |
| 6722 | VCVTPH2HF8Z256rrk = 6709, |
| 6723 | VCVTPH2HF8Z256rrkz = 6710, |
| 6724 | VCVTPH2HF8Zrm = 6711, |
| 6725 | VCVTPH2HF8Zrmb = 6712, |
| 6726 | VCVTPH2HF8Zrmbk = 6713, |
| 6727 | VCVTPH2HF8Zrmbkz = 6714, |
| 6728 | VCVTPH2HF8Zrmk = 6715, |
| 6729 | VCVTPH2HF8Zrmkz = 6716, |
| 6730 | VCVTPH2HF8Zrr = 6717, |
| 6731 | VCVTPH2HF8Zrrk = 6718, |
| 6732 | VCVTPH2HF8Zrrkz = 6719, |
| 6733 | VCVTPH2IBSZ128rm = 6720, |
| 6734 | VCVTPH2IBSZ128rmb = 6721, |
| 6735 | VCVTPH2IBSZ128rmbk = 6722, |
| 6736 | VCVTPH2IBSZ128rmbkz = 6723, |
| 6737 | VCVTPH2IBSZ128rmk = 6724, |
| 6738 | VCVTPH2IBSZ128rmkz = 6725, |
| 6739 | VCVTPH2IBSZ128rr = 6726, |
| 6740 | VCVTPH2IBSZ128rrk = 6727, |
| 6741 | VCVTPH2IBSZ128rrkz = 6728, |
| 6742 | VCVTPH2IBSZ256rm = 6729, |
| 6743 | VCVTPH2IBSZ256rmb = 6730, |
| 6744 | VCVTPH2IBSZ256rmbk = 6731, |
| 6745 | VCVTPH2IBSZ256rmbkz = 6732, |
| 6746 | VCVTPH2IBSZ256rmk = 6733, |
| 6747 | VCVTPH2IBSZ256rmkz = 6734, |
| 6748 | VCVTPH2IBSZ256rr = 6735, |
| 6749 | VCVTPH2IBSZ256rrk = 6736, |
| 6750 | VCVTPH2IBSZ256rrkz = 6737, |
| 6751 | VCVTPH2IBSZrm = 6738, |
| 6752 | VCVTPH2IBSZrmb = 6739, |
| 6753 | VCVTPH2IBSZrmbk = 6740, |
| 6754 | VCVTPH2IBSZrmbkz = 6741, |
| 6755 | VCVTPH2IBSZrmk = 6742, |
| 6756 | VCVTPH2IBSZrmkz = 6743, |
| 6757 | VCVTPH2IBSZrr = 6744, |
| 6758 | VCVTPH2IBSZrrb = 6745, |
| 6759 | VCVTPH2IBSZrrbk = 6746, |
| 6760 | VCVTPH2IBSZrrbkz = 6747, |
| 6761 | VCVTPH2IBSZrrk = 6748, |
| 6762 | VCVTPH2IBSZrrkz = 6749, |
| 6763 | VCVTPH2IUBSZ128rm = 6750, |
| 6764 | VCVTPH2IUBSZ128rmb = 6751, |
| 6765 | VCVTPH2IUBSZ128rmbk = 6752, |
| 6766 | VCVTPH2IUBSZ128rmbkz = 6753, |
| 6767 | VCVTPH2IUBSZ128rmk = 6754, |
| 6768 | VCVTPH2IUBSZ128rmkz = 6755, |
| 6769 | VCVTPH2IUBSZ128rr = 6756, |
| 6770 | VCVTPH2IUBSZ128rrk = 6757, |
| 6771 | VCVTPH2IUBSZ128rrkz = 6758, |
| 6772 | VCVTPH2IUBSZ256rm = 6759, |
| 6773 | VCVTPH2IUBSZ256rmb = 6760, |
| 6774 | VCVTPH2IUBSZ256rmbk = 6761, |
| 6775 | VCVTPH2IUBSZ256rmbkz = 6762, |
| 6776 | VCVTPH2IUBSZ256rmk = 6763, |
| 6777 | VCVTPH2IUBSZ256rmkz = 6764, |
| 6778 | VCVTPH2IUBSZ256rr = 6765, |
| 6779 | VCVTPH2IUBSZ256rrk = 6766, |
| 6780 | VCVTPH2IUBSZ256rrkz = 6767, |
| 6781 | VCVTPH2IUBSZrm = 6768, |
| 6782 | VCVTPH2IUBSZrmb = 6769, |
| 6783 | VCVTPH2IUBSZrmbk = 6770, |
| 6784 | VCVTPH2IUBSZrmbkz = 6771, |
| 6785 | VCVTPH2IUBSZrmk = 6772, |
| 6786 | VCVTPH2IUBSZrmkz = 6773, |
| 6787 | VCVTPH2IUBSZrr = 6774, |
| 6788 | VCVTPH2IUBSZrrb = 6775, |
| 6789 | VCVTPH2IUBSZrrbk = 6776, |
| 6790 | VCVTPH2IUBSZrrbkz = 6777, |
| 6791 | VCVTPH2IUBSZrrk = 6778, |
| 6792 | VCVTPH2IUBSZrrkz = 6779, |
| 6793 | VCVTPH2PDZ128rm = 6780, |
| 6794 | VCVTPH2PDZ128rmb = 6781, |
| 6795 | VCVTPH2PDZ128rmbk = 6782, |
| 6796 | VCVTPH2PDZ128rmbkz = 6783, |
| 6797 | VCVTPH2PDZ128rmk = 6784, |
| 6798 | VCVTPH2PDZ128rmkz = 6785, |
| 6799 | VCVTPH2PDZ128rr = 6786, |
| 6800 | VCVTPH2PDZ128rrk = 6787, |
| 6801 | VCVTPH2PDZ128rrkz = 6788, |
| 6802 | VCVTPH2PDZ256rm = 6789, |
| 6803 | VCVTPH2PDZ256rmb = 6790, |
| 6804 | VCVTPH2PDZ256rmbk = 6791, |
| 6805 | VCVTPH2PDZ256rmbkz = 6792, |
| 6806 | VCVTPH2PDZ256rmk = 6793, |
| 6807 | VCVTPH2PDZ256rmkz = 6794, |
| 6808 | VCVTPH2PDZ256rr = 6795, |
| 6809 | VCVTPH2PDZ256rrk = 6796, |
| 6810 | VCVTPH2PDZ256rrkz = 6797, |
| 6811 | VCVTPH2PDZrm = 6798, |
| 6812 | VCVTPH2PDZrmb = 6799, |
| 6813 | VCVTPH2PDZrmbk = 6800, |
| 6814 | VCVTPH2PDZrmbkz = 6801, |
| 6815 | VCVTPH2PDZrmk = 6802, |
| 6816 | VCVTPH2PDZrmkz = 6803, |
| 6817 | VCVTPH2PDZrr = 6804, |
| 6818 | VCVTPH2PDZrrb = 6805, |
| 6819 | VCVTPH2PDZrrbk = 6806, |
| 6820 | VCVTPH2PDZrrbkz = 6807, |
| 6821 | VCVTPH2PDZrrk = 6808, |
| 6822 | VCVTPH2PDZrrkz = 6809, |
| 6823 | VCVTPH2PSXZ128rm = 6810, |
| 6824 | VCVTPH2PSXZ128rmb = 6811, |
| 6825 | VCVTPH2PSXZ128rmbk = 6812, |
| 6826 | VCVTPH2PSXZ128rmbkz = 6813, |
| 6827 | VCVTPH2PSXZ128rmk = 6814, |
| 6828 | VCVTPH2PSXZ128rmkz = 6815, |
| 6829 | VCVTPH2PSXZ128rr = 6816, |
| 6830 | VCVTPH2PSXZ128rrk = 6817, |
| 6831 | VCVTPH2PSXZ128rrkz = 6818, |
| 6832 | VCVTPH2PSXZ256rm = 6819, |
| 6833 | VCVTPH2PSXZ256rmb = 6820, |
| 6834 | VCVTPH2PSXZ256rmbk = 6821, |
| 6835 | VCVTPH2PSXZ256rmbkz = 6822, |
| 6836 | VCVTPH2PSXZ256rmk = 6823, |
| 6837 | VCVTPH2PSXZ256rmkz = 6824, |
| 6838 | VCVTPH2PSXZ256rr = 6825, |
| 6839 | VCVTPH2PSXZ256rrk = 6826, |
| 6840 | VCVTPH2PSXZ256rrkz = 6827, |
| 6841 | VCVTPH2PSXZrm = 6828, |
| 6842 | VCVTPH2PSXZrmb = 6829, |
| 6843 | VCVTPH2PSXZrmbk = 6830, |
| 6844 | VCVTPH2PSXZrmbkz = 6831, |
| 6845 | VCVTPH2PSXZrmk = 6832, |
| 6846 | VCVTPH2PSXZrmkz = 6833, |
| 6847 | VCVTPH2PSXZrr = 6834, |
| 6848 | VCVTPH2PSXZrrb = 6835, |
| 6849 | VCVTPH2PSXZrrbk = 6836, |
| 6850 | VCVTPH2PSXZrrbkz = 6837, |
| 6851 | VCVTPH2PSXZrrk = 6838, |
| 6852 | VCVTPH2PSXZrrkz = 6839, |
| 6853 | VCVTPH2PSYrm = 6840, |
| 6854 | VCVTPH2PSYrr = 6841, |
| 6855 | VCVTPH2PSZ128rm = 6842, |
| 6856 | VCVTPH2PSZ128rmk = 6843, |
| 6857 | VCVTPH2PSZ128rmkz = 6844, |
| 6858 | VCVTPH2PSZ128rr = 6845, |
| 6859 | VCVTPH2PSZ128rrk = 6846, |
| 6860 | VCVTPH2PSZ128rrkz = 6847, |
| 6861 | VCVTPH2PSZ256rm = 6848, |
| 6862 | VCVTPH2PSZ256rmk = 6849, |
| 6863 | VCVTPH2PSZ256rmkz = 6850, |
| 6864 | VCVTPH2PSZ256rr = 6851, |
| 6865 | VCVTPH2PSZ256rrk = 6852, |
| 6866 | VCVTPH2PSZ256rrkz = 6853, |
| 6867 | VCVTPH2PSZrm = 6854, |
| 6868 | VCVTPH2PSZrmk = 6855, |
| 6869 | VCVTPH2PSZrmkz = 6856, |
| 6870 | VCVTPH2PSZrr = 6857, |
| 6871 | VCVTPH2PSZrrb = 6858, |
| 6872 | VCVTPH2PSZrrbk = 6859, |
| 6873 | VCVTPH2PSZrrbkz = 6860, |
| 6874 | VCVTPH2PSZrrk = 6861, |
| 6875 | VCVTPH2PSZrrkz = 6862, |
| 6876 | VCVTPH2PSrm = 6863, |
| 6877 | VCVTPH2PSrr = 6864, |
| 6878 | VCVTPH2QQZ128rm = 6865, |
| 6879 | VCVTPH2QQZ128rmb = 6866, |
| 6880 | VCVTPH2QQZ128rmbk = 6867, |
| 6881 | VCVTPH2QQZ128rmbkz = 6868, |
| 6882 | VCVTPH2QQZ128rmk = 6869, |
| 6883 | VCVTPH2QQZ128rmkz = 6870, |
| 6884 | VCVTPH2QQZ128rr = 6871, |
| 6885 | VCVTPH2QQZ128rrk = 6872, |
| 6886 | VCVTPH2QQZ128rrkz = 6873, |
| 6887 | VCVTPH2QQZ256rm = 6874, |
| 6888 | VCVTPH2QQZ256rmb = 6875, |
| 6889 | VCVTPH2QQZ256rmbk = 6876, |
| 6890 | VCVTPH2QQZ256rmbkz = 6877, |
| 6891 | VCVTPH2QQZ256rmk = 6878, |
| 6892 | VCVTPH2QQZ256rmkz = 6879, |
| 6893 | VCVTPH2QQZ256rr = 6880, |
| 6894 | VCVTPH2QQZ256rrk = 6881, |
| 6895 | VCVTPH2QQZ256rrkz = 6882, |
| 6896 | VCVTPH2QQZrm = 6883, |
| 6897 | VCVTPH2QQZrmb = 6884, |
| 6898 | VCVTPH2QQZrmbk = 6885, |
| 6899 | VCVTPH2QQZrmbkz = 6886, |
| 6900 | VCVTPH2QQZrmk = 6887, |
| 6901 | VCVTPH2QQZrmkz = 6888, |
| 6902 | VCVTPH2QQZrr = 6889, |
| 6903 | VCVTPH2QQZrrb = 6890, |
| 6904 | VCVTPH2QQZrrbk = 6891, |
| 6905 | VCVTPH2QQZrrbkz = 6892, |
| 6906 | VCVTPH2QQZrrk = 6893, |
| 6907 | VCVTPH2QQZrrkz = 6894, |
| 6908 | VCVTPH2UDQZ128rm = 6895, |
| 6909 | VCVTPH2UDQZ128rmb = 6896, |
| 6910 | VCVTPH2UDQZ128rmbk = 6897, |
| 6911 | VCVTPH2UDQZ128rmbkz = 6898, |
| 6912 | VCVTPH2UDQZ128rmk = 6899, |
| 6913 | VCVTPH2UDQZ128rmkz = 6900, |
| 6914 | VCVTPH2UDQZ128rr = 6901, |
| 6915 | VCVTPH2UDQZ128rrk = 6902, |
| 6916 | VCVTPH2UDQZ128rrkz = 6903, |
| 6917 | VCVTPH2UDQZ256rm = 6904, |
| 6918 | VCVTPH2UDQZ256rmb = 6905, |
| 6919 | VCVTPH2UDQZ256rmbk = 6906, |
| 6920 | VCVTPH2UDQZ256rmbkz = 6907, |
| 6921 | VCVTPH2UDQZ256rmk = 6908, |
| 6922 | VCVTPH2UDQZ256rmkz = 6909, |
| 6923 | VCVTPH2UDQZ256rr = 6910, |
| 6924 | VCVTPH2UDQZ256rrk = 6911, |
| 6925 | VCVTPH2UDQZ256rrkz = 6912, |
| 6926 | VCVTPH2UDQZrm = 6913, |
| 6927 | VCVTPH2UDQZrmb = 6914, |
| 6928 | VCVTPH2UDQZrmbk = 6915, |
| 6929 | VCVTPH2UDQZrmbkz = 6916, |
| 6930 | VCVTPH2UDQZrmk = 6917, |
| 6931 | VCVTPH2UDQZrmkz = 6918, |
| 6932 | VCVTPH2UDQZrr = 6919, |
| 6933 | VCVTPH2UDQZrrb = 6920, |
| 6934 | VCVTPH2UDQZrrbk = 6921, |
| 6935 | VCVTPH2UDQZrrbkz = 6922, |
| 6936 | VCVTPH2UDQZrrk = 6923, |
| 6937 | VCVTPH2UDQZrrkz = 6924, |
| 6938 | VCVTPH2UQQZ128rm = 6925, |
| 6939 | VCVTPH2UQQZ128rmb = 6926, |
| 6940 | VCVTPH2UQQZ128rmbk = 6927, |
| 6941 | VCVTPH2UQQZ128rmbkz = 6928, |
| 6942 | VCVTPH2UQQZ128rmk = 6929, |
| 6943 | VCVTPH2UQQZ128rmkz = 6930, |
| 6944 | VCVTPH2UQQZ128rr = 6931, |
| 6945 | VCVTPH2UQQZ128rrk = 6932, |
| 6946 | VCVTPH2UQQZ128rrkz = 6933, |
| 6947 | VCVTPH2UQQZ256rm = 6934, |
| 6948 | VCVTPH2UQQZ256rmb = 6935, |
| 6949 | VCVTPH2UQQZ256rmbk = 6936, |
| 6950 | VCVTPH2UQQZ256rmbkz = 6937, |
| 6951 | VCVTPH2UQQZ256rmk = 6938, |
| 6952 | VCVTPH2UQQZ256rmkz = 6939, |
| 6953 | VCVTPH2UQQZ256rr = 6940, |
| 6954 | VCVTPH2UQQZ256rrk = 6941, |
| 6955 | VCVTPH2UQQZ256rrkz = 6942, |
| 6956 | VCVTPH2UQQZrm = 6943, |
| 6957 | VCVTPH2UQQZrmb = 6944, |
| 6958 | VCVTPH2UQQZrmbk = 6945, |
| 6959 | VCVTPH2UQQZrmbkz = 6946, |
| 6960 | VCVTPH2UQQZrmk = 6947, |
| 6961 | VCVTPH2UQQZrmkz = 6948, |
| 6962 | VCVTPH2UQQZrr = 6949, |
| 6963 | VCVTPH2UQQZrrb = 6950, |
| 6964 | VCVTPH2UQQZrrbk = 6951, |
| 6965 | VCVTPH2UQQZrrbkz = 6952, |
| 6966 | VCVTPH2UQQZrrk = 6953, |
| 6967 | VCVTPH2UQQZrrkz = 6954, |
| 6968 | VCVTPH2UWZ128rm = 6955, |
| 6969 | VCVTPH2UWZ128rmb = 6956, |
| 6970 | VCVTPH2UWZ128rmbk = 6957, |
| 6971 | VCVTPH2UWZ128rmbkz = 6958, |
| 6972 | VCVTPH2UWZ128rmk = 6959, |
| 6973 | VCVTPH2UWZ128rmkz = 6960, |
| 6974 | VCVTPH2UWZ128rr = 6961, |
| 6975 | VCVTPH2UWZ128rrk = 6962, |
| 6976 | VCVTPH2UWZ128rrkz = 6963, |
| 6977 | VCVTPH2UWZ256rm = 6964, |
| 6978 | VCVTPH2UWZ256rmb = 6965, |
| 6979 | VCVTPH2UWZ256rmbk = 6966, |
| 6980 | VCVTPH2UWZ256rmbkz = 6967, |
| 6981 | VCVTPH2UWZ256rmk = 6968, |
| 6982 | VCVTPH2UWZ256rmkz = 6969, |
| 6983 | VCVTPH2UWZ256rr = 6970, |
| 6984 | VCVTPH2UWZ256rrk = 6971, |
| 6985 | VCVTPH2UWZ256rrkz = 6972, |
| 6986 | VCVTPH2UWZrm = 6973, |
| 6987 | VCVTPH2UWZrmb = 6974, |
| 6988 | VCVTPH2UWZrmbk = 6975, |
| 6989 | VCVTPH2UWZrmbkz = 6976, |
| 6990 | VCVTPH2UWZrmk = 6977, |
| 6991 | VCVTPH2UWZrmkz = 6978, |
| 6992 | VCVTPH2UWZrr = 6979, |
| 6993 | VCVTPH2UWZrrb = 6980, |
| 6994 | VCVTPH2UWZrrbk = 6981, |
| 6995 | VCVTPH2UWZrrbkz = 6982, |
| 6996 | VCVTPH2UWZrrk = 6983, |
| 6997 | VCVTPH2UWZrrkz = 6984, |
| 6998 | VCVTPH2WZ128rm = 6985, |
| 6999 | VCVTPH2WZ128rmb = 6986, |
| 7000 | VCVTPH2WZ128rmbk = 6987, |
| 7001 | VCVTPH2WZ128rmbkz = 6988, |
| 7002 | VCVTPH2WZ128rmk = 6989, |
| 7003 | VCVTPH2WZ128rmkz = 6990, |
| 7004 | VCVTPH2WZ128rr = 6991, |
| 7005 | VCVTPH2WZ128rrk = 6992, |
| 7006 | VCVTPH2WZ128rrkz = 6993, |
| 7007 | VCVTPH2WZ256rm = 6994, |
| 7008 | VCVTPH2WZ256rmb = 6995, |
| 7009 | VCVTPH2WZ256rmbk = 6996, |
| 7010 | VCVTPH2WZ256rmbkz = 6997, |
| 7011 | VCVTPH2WZ256rmk = 6998, |
| 7012 | VCVTPH2WZ256rmkz = 6999, |
| 7013 | VCVTPH2WZ256rr = 7000, |
| 7014 | VCVTPH2WZ256rrk = 7001, |
| 7015 | VCVTPH2WZ256rrkz = 7002, |
| 7016 | VCVTPH2WZrm = 7003, |
| 7017 | VCVTPH2WZrmb = 7004, |
| 7018 | VCVTPH2WZrmbk = 7005, |
| 7019 | VCVTPH2WZrmbkz = 7006, |
| 7020 | VCVTPH2WZrmk = 7007, |
| 7021 | VCVTPH2WZrmkz = 7008, |
| 7022 | VCVTPH2WZrr = 7009, |
| 7023 | VCVTPH2WZrrb = 7010, |
| 7024 | VCVTPH2WZrrbk = 7011, |
| 7025 | VCVTPH2WZrrbkz = 7012, |
| 7026 | VCVTPH2WZrrk = 7013, |
| 7027 | VCVTPH2WZrrkz = 7014, |
| 7028 | VCVTPS2DQYrm = 7015, |
| 7029 | VCVTPS2DQYrr = 7016, |
| 7030 | VCVTPS2DQZ128rm = 7017, |
| 7031 | VCVTPS2DQZ128rmb = 7018, |
| 7032 | VCVTPS2DQZ128rmbk = 7019, |
| 7033 | VCVTPS2DQZ128rmbkz = 7020, |
| 7034 | VCVTPS2DQZ128rmk = 7021, |
| 7035 | VCVTPS2DQZ128rmkz = 7022, |
| 7036 | VCVTPS2DQZ128rr = 7023, |
| 7037 | VCVTPS2DQZ128rrk = 7024, |
| 7038 | VCVTPS2DQZ128rrkz = 7025, |
| 7039 | VCVTPS2DQZ256rm = 7026, |
| 7040 | VCVTPS2DQZ256rmb = 7027, |
| 7041 | VCVTPS2DQZ256rmbk = 7028, |
| 7042 | VCVTPS2DQZ256rmbkz = 7029, |
| 7043 | VCVTPS2DQZ256rmk = 7030, |
| 7044 | VCVTPS2DQZ256rmkz = 7031, |
| 7045 | VCVTPS2DQZ256rr = 7032, |
| 7046 | VCVTPS2DQZ256rrk = 7033, |
| 7047 | VCVTPS2DQZ256rrkz = 7034, |
| 7048 | VCVTPS2DQZrm = 7035, |
| 7049 | VCVTPS2DQZrmb = 7036, |
| 7050 | VCVTPS2DQZrmbk = 7037, |
| 7051 | VCVTPS2DQZrmbkz = 7038, |
| 7052 | VCVTPS2DQZrmk = 7039, |
| 7053 | VCVTPS2DQZrmkz = 7040, |
| 7054 | VCVTPS2DQZrr = 7041, |
| 7055 | VCVTPS2DQZrrb = 7042, |
| 7056 | VCVTPS2DQZrrbk = 7043, |
| 7057 | VCVTPS2DQZrrbkz = 7044, |
| 7058 | VCVTPS2DQZrrk = 7045, |
| 7059 | VCVTPS2DQZrrkz = 7046, |
| 7060 | VCVTPS2DQrm = 7047, |
| 7061 | VCVTPS2DQrr = 7048, |
| 7062 | VCVTPS2IBSZ128rm = 7049, |
| 7063 | VCVTPS2IBSZ128rmb = 7050, |
| 7064 | VCVTPS2IBSZ128rmbk = 7051, |
| 7065 | VCVTPS2IBSZ128rmbkz = 7052, |
| 7066 | VCVTPS2IBSZ128rmk = 7053, |
| 7067 | VCVTPS2IBSZ128rmkz = 7054, |
| 7068 | VCVTPS2IBSZ128rr = 7055, |
| 7069 | VCVTPS2IBSZ128rrk = 7056, |
| 7070 | VCVTPS2IBSZ128rrkz = 7057, |
| 7071 | VCVTPS2IBSZ256rm = 7058, |
| 7072 | VCVTPS2IBSZ256rmb = 7059, |
| 7073 | VCVTPS2IBSZ256rmbk = 7060, |
| 7074 | VCVTPS2IBSZ256rmbkz = 7061, |
| 7075 | VCVTPS2IBSZ256rmk = 7062, |
| 7076 | VCVTPS2IBSZ256rmkz = 7063, |
| 7077 | VCVTPS2IBSZ256rr = 7064, |
| 7078 | VCVTPS2IBSZ256rrk = 7065, |
| 7079 | VCVTPS2IBSZ256rrkz = 7066, |
| 7080 | VCVTPS2IBSZrm = 7067, |
| 7081 | VCVTPS2IBSZrmb = 7068, |
| 7082 | VCVTPS2IBSZrmbk = 7069, |
| 7083 | VCVTPS2IBSZrmbkz = 7070, |
| 7084 | VCVTPS2IBSZrmk = 7071, |
| 7085 | VCVTPS2IBSZrmkz = 7072, |
| 7086 | VCVTPS2IBSZrr = 7073, |
| 7087 | VCVTPS2IBSZrrb = 7074, |
| 7088 | VCVTPS2IBSZrrbk = 7075, |
| 7089 | VCVTPS2IBSZrrbkz = 7076, |
| 7090 | VCVTPS2IBSZrrk = 7077, |
| 7091 | VCVTPS2IBSZrrkz = 7078, |
| 7092 | VCVTPS2IUBSZ128rm = 7079, |
| 7093 | VCVTPS2IUBSZ128rmb = 7080, |
| 7094 | VCVTPS2IUBSZ128rmbk = 7081, |
| 7095 | VCVTPS2IUBSZ128rmbkz = 7082, |
| 7096 | VCVTPS2IUBSZ128rmk = 7083, |
| 7097 | VCVTPS2IUBSZ128rmkz = 7084, |
| 7098 | VCVTPS2IUBSZ128rr = 7085, |
| 7099 | VCVTPS2IUBSZ128rrk = 7086, |
| 7100 | VCVTPS2IUBSZ128rrkz = 7087, |
| 7101 | VCVTPS2IUBSZ256rm = 7088, |
| 7102 | VCVTPS2IUBSZ256rmb = 7089, |
| 7103 | VCVTPS2IUBSZ256rmbk = 7090, |
| 7104 | VCVTPS2IUBSZ256rmbkz = 7091, |
| 7105 | VCVTPS2IUBSZ256rmk = 7092, |
| 7106 | VCVTPS2IUBSZ256rmkz = 7093, |
| 7107 | VCVTPS2IUBSZ256rr = 7094, |
| 7108 | VCVTPS2IUBSZ256rrk = 7095, |
| 7109 | VCVTPS2IUBSZ256rrkz = 7096, |
| 7110 | VCVTPS2IUBSZrm = 7097, |
| 7111 | VCVTPS2IUBSZrmb = 7098, |
| 7112 | VCVTPS2IUBSZrmbk = 7099, |
| 7113 | VCVTPS2IUBSZrmbkz = 7100, |
| 7114 | VCVTPS2IUBSZrmk = 7101, |
| 7115 | VCVTPS2IUBSZrmkz = 7102, |
| 7116 | VCVTPS2IUBSZrr = 7103, |
| 7117 | VCVTPS2IUBSZrrb = 7104, |
| 7118 | VCVTPS2IUBSZrrbk = 7105, |
| 7119 | VCVTPS2IUBSZrrbkz = 7106, |
| 7120 | VCVTPS2IUBSZrrk = 7107, |
| 7121 | VCVTPS2IUBSZrrkz = 7108, |
| 7122 | VCVTPS2PDYrm = 7109, |
| 7123 | VCVTPS2PDYrr = 7110, |
| 7124 | VCVTPS2PDZ128rm = 7111, |
| 7125 | VCVTPS2PDZ128rmb = 7112, |
| 7126 | VCVTPS2PDZ128rmbk = 7113, |
| 7127 | VCVTPS2PDZ128rmbkz = 7114, |
| 7128 | VCVTPS2PDZ128rmk = 7115, |
| 7129 | VCVTPS2PDZ128rmkz = 7116, |
| 7130 | VCVTPS2PDZ128rr = 7117, |
| 7131 | VCVTPS2PDZ128rrk = 7118, |
| 7132 | VCVTPS2PDZ128rrkz = 7119, |
| 7133 | VCVTPS2PDZ256rm = 7120, |
| 7134 | VCVTPS2PDZ256rmb = 7121, |
| 7135 | VCVTPS2PDZ256rmbk = 7122, |
| 7136 | VCVTPS2PDZ256rmbkz = 7123, |
| 7137 | VCVTPS2PDZ256rmk = 7124, |
| 7138 | VCVTPS2PDZ256rmkz = 7125, |
| 7139 | VCVTPS2PDZ256rr = 7126, |
| 7140 | VCVTPS2PDZ256rrk = 7127, |
| 7141 | VCVTPS2PDZ256rrkz = 7128, |
| 7142 | VCVTPS2PDZrm = 7129, |
| 7143 | VCVTPS2PDZrmb = 7130, |
| 7144 | VCVTPS2PDZrmbk = 7131, |
| 7145 | VCVTPS2PDZrmbkz = 7132, |
| 7146 | VCVTPS2PDZrmk = 7133, |
| 7147 | VCVTPS2PDZrmkz = 7134, |
| 7148 | VCVTPS2PDZrr = 7135, |
| 7149 | VCVTPS2PDZrrb = 7136, |
| 7150 | VCVTPS2PDZrrbk = 7137, |
| 7151 | VCVTPS2PDZrrbkz = 7138, |
| 7152 | VCVTPS2PDZrrk = 7139, |
| 7153 | VCVTPS2PDZrrkz = 7140, |
| 7154 | VCVTPS2PDrm = 7141, |
| 7155 | VCVTPS2PDrr = 7142, |
| 7156 | VCVTPS2PHXZ128rm = 7143, |
| 7157 | VCVTPS2PHXZ128rmb = 7144, |
| 7158 | VCVTPS2PHXZ128rmbk = 7145, |
| 7159 | VCVTPS2PHXZ128rmbkz = 7146, |
| 7160 | VCVTPS2PHXZ128rmk = 7147, |
| 7161 | VCVTPS2PHXZ128rmkz = 7148, |
| 7162 | VCVTPS2PHXZ128rr = 7149, |
| 7163 | VCVTPS2PHXZ128rrk = 7150, |
| 7164 | VCVTPS2PHXZ128rrkz = 7151, |
| 7165 | VCVTPS2PHXZ256rm = 7152, |
| 7166 | VCVTPS2PHXZ256rmb = 7153, |
| 7167 | VCVTPS2PHXZ256rmbk = 7154, |
| 7168 | VCVTPS2PHXZ256rmbkz = 7155, |
| 7169 | VCVTPS2PHXZ256rmk = 7156, |
| 7170 | VCVTPS2PHXZ256rmkz = 7157, |
| 7171 | VCVTPS2PHXZ256rr = 7158, |
| 7172 | VCVTPS2PHXZ256rrk = 7159, |
| 7173 | VCVTPS2PHXZ256rrkz = 7160, |
| 7174 | VCVTPS2PHXZrm = 7161, |
| 7175 | VCVTPS2PHXZrmb = 7162, |
| 7176 | VCVTPS2PHXZrmbk = 7163, |
| 7177 | VCVTPS2PHXZrmbkz = 7164, |
| 7178 | VCVTPS2PHXZrmk = 7165, |
| 7179 | VCVTPS2PHXZrmkz = 7166, |
| 7180 | VCVTPS2PHXZrr = 7167, |
| 7181 | VCVTPS2PHXZrrb = 7168, |
| 7182 | VCVTPS2PHXZrrbk = 7169, |
| 7183 | VCVTPS2PHXZrrbkz = 7170, |
| 7184 | VCVTPS2PHXZrrk = 7171, |
| 7185 | VCVTPS2PHXZrrkz = 7172, |
| 7186 | VCVTPS2PHYmr = 7173, |
| 7187 | VCVTPS2PHYrr = 7174, |
| 7188 | VCVTPS2PHZ128mr = 7175, |
| 7189 | VCVTPS2PHZ128mrk = 7176, |
| 7190 | VCVTPS2PHZ128rr = 7177, |
| 7191 | VCVTPS2PHZ128rrk = 7178, |
| 7192 | VCVTPS2PHZ128rrkz = 7179, |
| 7193 | VCVTPS2PHZ256mr = 7180, |
| 7194 | VCVTPS2PHZ256mrk = 7181, |
| 7195 | VCVTPS2PHZ256rr = 7182, |
| 7196 | VCVTPS2PHZ256rrk = 7183, |
| 7197 | VCVTPS2PHZ256rrkz = 7184, |
| 7198 | VCVTPS2PHZmr = 7185, |
| 7199 | VCVTPS2PHZmrk = 7186, |
| 7200 | VCVTPS2PHZrr = 7187, |
| 7201 | VCVTPS2PHZrrb = 7188, |
| 7202 | VCVTPS2PHZrrbk = 7189, |
| 7203 | VCVTPS2PHZrrbkz = 7190, |
| 7204 | VCVTPS2PHZrrk = 7191, |
| 7205 | VCVTPS2PHZrrkz = 7192, |
| 7206 | VCVTPS2PHmr = 7193, |
| 7207 | VCVTPS2PHrr = 7194, |
| 7208 | VCVTPS2QQZ128rm = 7195, |
| 7209 | VCVTPS2QQZ128rmb = 7196, |
| 7210 | VCVTPS2QQZ128rmbk = 7197, |
| 7211 | VCVTPS2QQZ128rmbkz = 7198, |
| 7212 | VCVTPS2QQZ128rmk = 7199, |
| 7213 | VCVTPS2QQZ128rmkz = 7200, |
| 7214 | VCVTPS2QQZ128rr = 7201, |
| 7215 | VCVTPS2QQZ128rrk = 7202, |
| 7216 | VCVTPS2QQZ128rrkz = 7203, |
| 7217 | VCVTPS2QQZ256rm = 7204, |
| 7218 | VCVTPS2QQZ256rmb = 7205, |
| 7219 | VCVTPS2QQZ256rmbk = 7206, |
| 7220 | VCVTPS2QQZ256rmbkz = 7207, |
| 7221 | VCVTPS2QQZ256rmk = 7208, |
| 7222 | VCVTPS2QQZ256rmkz = 7209, |
| 7223 | VCVTPS2QQZ256rr = 7210, |
| 7224 | VCVTPS2QQZ256rrk = 7211, |
| 7225 | VCVTPS2QQZ256rrkz = 7212, |
| 7226 | VCVTPS2QQZrm = 7213, |
| 7227 | VCVTPS2QQZrmb = 7214, |
| 7228 | VCVTPS2QQZrmbk = 7215, |
| 7229 | VCVTPS2QQZrmbkz = 7216, |
| 7230 | VCVTPS2QQZrmk = 7217, |
| 7231 | VCVTPS2QQZrmkz = 7218, |
| 7232 | VCVTPS2QQZrr = 7219, |
| 7233 | VCVTPS2QQZrrb = 7220, |
| 7234 | VCVTPS2QQZrrbk = 7221, |
| 7235 | VCVTPS2QQZrrbkz = 7222, |
| 7236 | VCVTPS2QQZrrk = 7223, |
| 7237 | VCVTPS2QQZrrkz = 7224, |
| 7238 | VCVTPS2UDQZ128rm = 7225, |
| 7239 | VCVTPS2UDQZ128rmb = 7226, |
| 7240 | VCVTPS2UDQZ128rmbk = 7227, |
| 7241 | VCVTPS2UDQZ128rmbkz = 7228, |
| 7242 | VCVTPS2UDQZ128rmk = 7229, |
| 7243 | VCVTPS2UDQZ128rmkz = 7230, |
| 7244 | VCVTPS2UDQZ128rr = 7231, |
| 7245 | VCVTPS2UDQZ128rrk = 7232, |
| 7246 | VCVTPS2UDQZ128rrkz = 7233, |
| 7247 | VCVTPS2UDQZ256rm = 7234, |
| 7248 | VCVTPS2UDQZ256rmb = 7235, |
| 7249 | VCVTPS2UDQZ256rmbk = 7236, |
| 7250 | VCVTPS2UDQZ256rmbkz = 7237, |
| 7251 | VCVTPS2UDQZ256rmk = 7238, |
| 7252 | VCVTPS2UDQZ256rmkz = 7239, |
| 7253 | VCVTPS2UDQZ256rr = 7240, |
| 7254 | VCVTPS2UDQZ256rrk = 7241, |
| 7255 | VCVTPS2UDQZ256rrkz = 7242, |
| 7256 | VCVTPS2UDQZrm = 7243, |
| 7257 | VCVTPS2UDQZrmb = 7244, |
| 7258 | VCVTPS2UDQZrmbk = 7245, |
| 7259 | VCVTPS2UDQZrmbkz = 7246, |
| 7260 | VCVTPS2UDQZrmk = 7247, |
| 7261 | VCVTPS2UDQZrmkz = 7248, |
| 7262 | VCVTPS2UDQZrr = 7249, |
| 7263 | VCVTPS2UDQZrrb = 7250, |
| 7264 | VCVTPS2UDQZrrbk = 7251, |
| 7265 | VCVTPS2UDQZrrbkz = 7252, |
| 7266 | VCVTPS2UDQZrrk = 7253, |
| 7267 | VCVTPS2UDQZrrkz = 7254, |
| 7268 | VCVTPS2UQQZ128rm = 7255, |
| 7269 | VCVTPS2UQQZ128rmb = 7256, |
| 7270 | VCVTPS2UQQZ128rmbk = 7257, |
| 7271 | VCVTPS2UQQZ128rmbkz = 7258, |
| 7272 | VCVTPS2UQQZ128rmk = 7259, |
| 7273 | VCVTPS2UQQZ128rmkz = 7260, |
| 7274 | VCVTPS2UQQZ128rr = 7261, |
| 7275 | VCVTPS2UQQZ128rrk = 7262, |
| 7276 | VCVTPS2UQQZ128rrkz = 7263, |
| 7277 | VCVTPS2UQQZ256rm = 7264, |
| 7278 | VCVTPS2UQQZ256rmb = 7265, |
| 7279 | VCVTPS2UQQZ256rmbk = 7266, |
| 7280 | VCVTPS2UQQZ256rmbkz = 7267, |
| 7281 | VCVTPS2UQQZ256rmk = 7268, |
| 7282 | VCVTPS2UQQZ256rmkz = 7269, |
| 7283 | VCVTPS2UQQZ256rr = 7270, |
| 7284 | VCVTPS2UQQZ256rrk = 7271, |
| 7285 | VCVTPS2UQQZ256rrkz = 7272, |
| 7286 | VCVTPS2UQQZrm = 7273, |
| 7287 | VCVTPS2UQQZrmb = 7274, |
| 7288 | VCVTPS2UQQZrmbk = 7275, |
| 7289 | VCVTPS2UQQZrmbkz = 7276, |
| 7290 | VCVTPS2UQQZrmk = 7277, |
| 7291 | VCVTPS2UQQZrmkz = 7278, |
| 7292 | VCVTPS2UQQZrr = 7279, |
| 7293 | VCVTPS2UQQZrrb = 7280, |
| 7294 | VCVTPS2UQQZrrbk = 7281, |
| 7295 | VCVTPS2UQQZrrbkz = 7282, |
| 7296 | VCVTPS2UQQZrrk = 7283, |
| 7297 | VCVTPS2UQQZrrkz = 7284, |
| 7298 | VCVTQQ2PDZ128rm = 7285, |
| 7299 | VCVTQQ2PDZ128rmb = 7286, |
| 7300 | VCVTQQ2PDZ128rmbk = 7287, |
| 7301 | VCVTQQ2PDZ128rmbkz = 7288, |
| 7302 | VCVTQQ2PDZ128rmk = 7289, |
| 7303 | VCVTQQ2PDZ128rmkz = 7290, |
| 7304 | VCVTQQ2PDZ128rr = 7291, |
| 7305 | VCVTQQ2PDZ128rrk = 7292, |
| 7306 | VCVTQQ2PDZ128rrkz = 7293, |
| 7307 | VCVTQQ2PDZ256rm = 7294, |
| 7308 | VCVTQQ2PDZ256rmb = 7295, |
| 7309 | VCVTQQ2PDZ256rmbk = 7296, |
| 7310 | VCVTQQ2PDZ256rmbkz = 7297, |
| 7311 | VCVTQQ2PDZ256rmk = 7298, |
| 7312 | VCVTQQ2PDZ256rmkz = 7299, |
| 7313 | VCVTQQ2PDZ256rr = 7300, |
| 7314 | VCVTQQ2PDZ256rrk = 7301, |
| 7315 | VCVTQQ2PDZ256rrkz = 7302, |
| 7316 | VCVTQQ2PDZrm = 7303, |
| 7317 | VCVTQQ2PDZrmb = 7304, |
| 7318 | VCVTQQ2PDZrmbk = 7305, |
| 7319 | VCVTQQ2PDZrmbkz = 7306, |
| 7320 | VCVTQQ2PDZrmk = 7307, |
| 7321 | VCVTQQ2PDZrmkz = 7308, |
| 7322 | VCVTQQ2PDZrr = 7309, |
| 7323 | VCVTQQ2PDZrrb = 7310, |
| 7324 | VCVTQQ2PDZrrbk = 7311, |
| 7325 | VCVTQQ2PDZrrbkz = 7312, |
| 7326 | VCVTQQ2PDZrrk = 7313, |
| 7327 | VCVTQQ2PDZrrkz = 7314, |
| 7328 | VCVTQQ2PHZ128rm = 7315, |
| 7329 | VCVTQQ2PHZ128rmb = 7316, |
| 7330 | VCVTQQ2PHZ128rmbk = 7317, |
| 7331 | VCVTQQ2PHZ128rmbkz = 7318, |
| 7332 | VCVTQQ2PHZ128rmk = 7319, |
| 7333 | VCVTQQ2PHZ128rmkz = 7320, |
| 7334 | VCVTQQ2PHZ128rr = 7321, |
| 7335 | VCVTQQ2PHZ128rrk = 7322, |
| 7336 | VCVTQQ2PHZ128rrkz = 7323, |
| 7337 | VCVTQQ2PHZ256rm = 7324, |
| 7338 | VCVTQQ2PHZ256rmb = 7325, |
| 7339 | VCVTQQ2PHZ256rmbk = 7326, |
| 7340 | VCVTQQ2PHZ256rmbkz = 7327, |
| 7341 | VCVTQQ2PHZ256rmk = 7328, |
| 7342 | VCVTQQ2PHZ256rmkz = 7329, |
| 7343 | VCVTQQ2PHZ256rr = 7330, |
| 7344 | VCVTQQ2PHZ256rrk = 7331, |
| 7345 | VCVTQQ2PHZ256rrkz = 7332, |
| 7346 | VCVTQQ2PHZrm = 7333, |
| 7347 | VCVTQQ2PHZrmb = 7334, |
| 7348 | VCVTQQ2PHZrmbk = 7335, |
| 7349 | VCVTQQ2PHZrmbkz = 7336, |
| 7350 | VCVTQQ2PHZrmk = 7337, |
| 7351 | VCVTQQ2PHZrmkz = 7338, |
| 7352 | VCVTQQ2PHZrr = 7339, |
| 7353 | VCVTQQ2PHZrrb = 7340, |
| 7354 | VCVTQQ2PHZrrbk = 7341, |
| 7355 | VCVTQQ2PHZrrbkz = 7342, |
| 7356 | VCVTQQ2PHZrrk = 7343, |
| 7357 | VCVTQQ2PHZrrkz = 7344, |
| 7358 | VCVTQQ2PSZ128rm = 7345, |
| 7359 | VCVTQQ2PSZ128rmb = 7346, |
| 7360 | VCVTQQ2PSZ128rmbk = 7347, |
| 7361 | VCVTQQ2PSZ128rmbkz = 7348, |
| 7362 | VCVTQQ2PSZ128rmk = 7349, |
| 7363 | VCVTQQ2PSZ128rmkz = 7350, |
| 7364 | VCVTQQ2PSZ128rr = 7351, |
| 7365 | VCVTQQ2PSZ128rrk = 7352, |
| 7366 | VCVTQQ2PSZ128rrkz = 7353, |
| 7367 | VCVTQQ2PSZ256rm = 7354, |
| 7368 | VCVTQQ2PSZ256rmb = 7355, |
| 7369 | VCVTQQ2PSZ256rmbk = 7356, |
| 7370 | VCVTQQ2PSZ256rmbkz = 7357, |
| 7371 | VCVTQQ2PSZ256rmk = 7358, |
| 7372 | VCVTQQ2PSZ256rmkz = 7359, |
| 7373 | VCVTQQ2PSZ256rr = 7360, |
| 7374 | VCVTQQ2PSZ256rrk = 7361, |
| 7375 | VCVTQQ2PSZ256rrkz = 7362, |
| 7376 | VCVTQQ2PSZrm = 7363, |
| 7377 | VCVTQQ2PSZrmb = 7364, |
| 7378 | VCVTQQ2PSZrmbk = 7365, |
| 7379 | VCVTQQ2PSZrmbkz = 7366, |
| 7380 | VCVTQQ2PSZrmk = 7367, |
| 7381 | VCVTQQ2PSZrmkz = 7368, |
| 7382 | VCVTQQ2PSZrr = 7369, |
| 7383 | VCVTQQ2PSZrrb = 7370, |
| 7384 | VCVTQQ2PSZrrbk = 7371, |
| 7385 | VCVTQQ2PSZrrbkz = 7372, |
| 7386 | VCVTQQ2PSZrrk = 7373, |
| 7387 | VCVTQQ2PSZrrkz = 7374, |
| 7388 | VCVTSD2SHZrm = 7375, |
| 7389 | VCVTSD2SHZrm_Int = 7376, |
| 7390 | VCVTSD2SHZrmk_Int = 7377, |
| 7391 | VCVTSD2SHZrmkz_Int = 7378, |
| 7392 | VCVTSD2SHZrr = 7379, |
| 7393 | VCVTSD2SHZrr_Int = 7380, |
| 7394 | VCVTSD2SHZrrb_Int = 7381, |
| 7395 | VCVTSD2SHZrrbk_Int = 7382, |
| 7396 | VCVTSD2SHZrrbkz_Int = 7383, |
| 7397 | VCVTSD2SHZrrk_Int = 7384, |
| 7398 | VCVTSD2SHZrrkz_Int = 7385, |
| 7399 | VCVTSD2SI64Zrm = 7386, |
| 7400 | VCVTSD2SI64Zrm_Int = 7387, |
| 7401 | VCVTSD2SI64Zrr = 7388, |
| 7402 | VCVTSD2SI64Zrr_Int = 7389, |
| 7403 | VCVTSD2SI64Zrrb_Int = 7390, |
| 7404 | VCVTSD2SI64rm = 7391, |
| 7405 | VCVTSD2SI64rm_Int = 7392, |
| 7406 | VCVTSD2SI64rr = 7393, |
| 7407 | VCVTSD2SI64rr_Int = 7394, |
| 7408 | VCVTSD2SIZrm = 7395, |
| 7409 | VCVTSD2SIZrm_Int = 7396, |
| 7410 | VCVTSD2SIZrr = 7397, |
| 7411 | VCVTSD2SIZrr_Int = 7398, |
| 7412 | VCVTSD2SIZrrb_Int = 7399, |
| 7413 | VCVTSD2SIrm = 7400, |
| 7414 | VCVTSD2SIrm_Int = 7401, |
| 7415 | VCVTSD2SIrr = 7402, |
| 7416 | VCVTSD2SIrr_Int = 7403, |
| 7417 | VCVTSD2SSZrm = 7404, |
| 7418 | VCVTSD2SSZrm_Int = 7405, |
| 7419 | VCVTSD2SSZrmk_Int = 7406, |
| 7420 | VCVTSD2SSZrmkz_Int = 7407, |
| 7421 | VCVTSD2SSZrr = 7408, |
| 7422 | VCVTSD2SSZrr_Int = 7409, |
| 7423 | VCVTSD2SSZrrb_Int = 7410, |
| 7424 | VCVTSD2SSZrrbk_Int = 7411, |
| 7425 | VCVTSD2SSZrrbkz_Int = 7412, |
| 7426 | VCVTSD2SSZrrk_Int = 7413, |
| 7427 | VCVTSD2SSZrrkz_Int = 7414, |
| 7428 | VCVTSD2SSrm = 7415, |
| 7429 | VCVTSD2SSrm_Int = 7416, |
| 7430 | VCVTSD2SSrr = 7417, |
| 7431 | VCVTSD2SSrr_Int = 7418, |
| 7432 | VCVTSD2USI64Zrm_Int = 7419, |
| 7433 | VCVTSD2USI64Zrr_Int = 7420, |
| 7434 | VCVTSD2USI64Zrrb_Int = 7421, |
| 7435 | VCVTSD2USIZrm_Int = 7422, |
| 7436 | VCVTSD2USIZrr_Int = 7423, |
| 7437 | VCVTSD2USIZrrb_Int = 7424, |
| 7438 | VCVTSH2SDZrm = 7425, |
| 7439 | VCVTSH2SDZrm_Int = 7426, |
| 7440 | VCVTSH2SDZrmk_Int = 7427, |
| 7441 | VCVTSH2SDZrmkz_Int = 7428, |
| 7442 | VCVTSH2SDZrr = 7429, |
| 7443 | VCVTSH2SDZrr_Int = 7430, |
| 7444 | VCVTSH2SDZrrb_Int = 7431, |
| 7445 | VCVTSH2SDZrrbk_Int = 7432, |
| 7446 | VCVTSH2SDZrrbkz_Int = 7433, |
| 7447 | VCVTSH2SDZrrk_Int = 7434, |
| 7448 | VCVTSH2SDZrrkz_Int = 7435, |
| 7449 | VCVTSH2SI64Zrm_Int = 7436, |
| 7450 | VCVTSH2SI64Zrr_Int = 7437, |
| 7451 | VCVTSH2SI64Zrrb_Int = 7438, |
| 7452 | VCVTSH2SIZrm_Int = 7439, |
| 7453 | VCVTSH2SIZrr_Int = 7440, |
| 7454 | VCVTSH2SIZrrb_Int = 7441, |
| 7455 | VCVTSH2SSZrm = 7442, |
| 7456 | VCVTSH2SSZrm_Int = 7443, |
| 7457 | VCVTSH2SSZrmk_Int = 7444, |
| 7458 | VCVTSH2SSZrmkz_Int = 7445, |
| 7459 | VCVTSH2SSZrr = 7446, |
| 7460 | VCVTSH2SSZrr_Int = 7447, |
| 7461 | VCVTSH2SSZrrb_Int = 7448, |
| 7462 | VCVTSH2SSZrrbk_Int = 7449, |
| 7463 | VCVTSH2SSZrrbkz_Int = 7450, |
| 7464 | VCVTSH2SSZrrk_Int = 7451, |
| 7465 | VCVTSH2SSZrrkz_Int = 7452, |
| 7466 | VCVTSH2USI64Zrm_Int = 7453, |
| 7467 | VCVTSH2USI64Zrr_Int = 7454, |
| 7468 | VCVTSH2USI64Zrrb_Int = 7455, |
| 7469 | VCVTSH2USIZrm_Int = 7456, |
| 7470 | VCVTSH2USIZrr_Int = 7457, |
| 7471 | VCVTSH2USIZrrb_Int = 7458, |
| 7472 | VCVTSI2SDZrm = 7459, |
| 7473 | VCVTSI2SDZrm_Int = 7460, |
| 7474 | VCVTSI2SDZrr = 7461, |
| 7475 | VCVTSI2SDZrr_Int = 7462, |
| 7476 | VCVTSI2SDrm = 7463, |
| 7477 | VCVTSI2SDrm_Int = 7464, |
| 7478 | VCVTSI2SDrr = 7465, |
| 7479 | VCVTSI2SDrr_Int = 7466, |
| 7480 | VCVTSI2SHZrm = 7467, |
| 7481 | VCVTSI2SHZrm_Int = 7468, |
| 7482 | VCVTSI2SHZrr = 7469, |
| 7483 | VCVTSI2SHZrr_Int = 7470, |
| 7484 | VCVTSI2SHZrrb_Int = 7471, |
| 7485 | VCVTSI2SSZrm = 7472, |
| 7486 | VCVTSI2SSZrm_Int = 7473, |
| 7487 | VCVTSI2SSZrr = 7474, |
| 7488 | VCVTSI2SSZrr_Int = 7475, |
| 7489 | VCVTSI2SSZrrb_Int = 7476, |
| 7490 | VCVTSI2SSrm = 7477, |
| 7491 | VCVTSI2SSrm_Int = 7478, |
| 7492 | VCVTSI2SSrr = 7479, |
| 7493 | VCVTSI2SSrr_Int = 7480, |
| 7494 | VCVTSI642SDZrm = 7481, |
| 7495 | VCVTSI642SDZrm_Int = 7482, |
| 7496 | VCVTSI642SDZrr = 7483, |
| 7497 | VCVTSI642SDZrr_Int = 7484, |
| 7498 | VCVTSI642SDZrrb_Int = 7485, |
| 7499 | VCVTSI642SDrm = 7486, |
| 7500 | VCVTSI642SDrm_Int = 7487, |
| 7501 | VCVTSI642SDrr = 7488, |
| 7502 | VCVTSI642SDrr_Int = 7489, |
| 7503 | VCVTSI642SHZrm = 7490, |
| 7504 | VCVTSI642SHZrm_Int = 7491, |
| 7505 | VCVTSI642SHZrr = 7492, |
| 7506 | VCVTSI642SHZrr_Int = 7493, |
| 7507 | VCVTSI642SHZrrb_Int = 7494, |
| 7508 | VCVTSI642SSZrm = 7495, |
| 7509 | VCVTSI642SSZrm_Int = 7496, |
| 7510 | VCVTSI642SSZrr = 7497, |
| 7511 | VCVTSI642SSZrr_Int = 7498, |
| 7512 | VCVTSI642SSZrrb_Int = 7499, |
| 7513 | VCVTSI642SSrm = 7500, |
| 7514 | VCVTSI642SSrm_Int = 7501, |
| 7515 | VCVTSI642SSrr = 7502, |
| 7516 | VCVTSI642SSrr_Int = 7503, |
| 7517 | VCVTSS2SDZrm = 7504, |
| 7518 | VCVTSS2SDZrm_Int = 7505, |
| 7519 | VCVTSS2SDZrmk_Int = 7506, |
| 7520 | VCVTSS2SDZrmkz_Int = 7507, |
| 7521 | VCVTSS2SDZrr = 7508, |
| 7522 | VCVTSS2SDZrr_Int = 7509, |
| 7523 | VCVTSS2SDZrrb_Int = 7510, |
| 7524 | VCVTSS2SDZrrbk_Int = 7511, |
| 7525 | VCVTSS2SDZrrbkz_Int = 7512, |
| 7526 | VCVTSS2SDZrrk_Int = 7513, |
| 7527 | VCVTSS2SDZrrkz_Int = 7514, |
| 7528 | VCVTSS2SDrm = 7515, |
| 7529 | VCVTSS2SDrm_Int = 7516, |
| 7530 | VCVTSS2SDrr = 7517, |
| 7531 | VCVTSS2SDrr_Int = 7518, |
| 7532 | VCVTSS2SHZrm = 7519, |
| 7533 | VCVTSS2SHZrm_Int = 7520, |
| 7534 | VCVTSS2SHZrmk_Int = 7521, |
| 7535 | VCVTSS2SHZrmkz_Int = 7522, |
| 7536 | VCVTSS2SHZrr = 7523, |
| 7537 | VCVTSS2SHZrr_Int = 7524, |
| 7538 | VCVTSS2SHZrrb_Int = 7525, |
| 7539 | VCVTSS2SHZrrbk_Int = 7526, |
| 7540 | VCVTSS2SHZrrbkz_Int = 7527, |
| 7541 | VCVTSS2SHZrrk_Int = 7528, |
| 7542 | VCVTSS2SHZrrkz_Int = 7529, |
| 7543 | VCVTSS2SI64Zrm = 7530, |
| 7544 | VCVTSS2SI64Zrm_Int = 7531, |
| 7545 | VCVTSS2SI64Zrr = 7532, |
| 7546 | VCVTSS2SI64Zrr_Int = 7533, |
| 7547 | VCVTSS2SI64Zrrb_Int = 7534, |
| 7548 | VCVTSS2SI64rm = 7535, |
| 7549 | VCVTSS2SI64rm_Int = 7536, |
| 7550 | VCVTSS2SI64rr = 7537, |
| 7551 | VCVTSS2SI64rr_Int = 7538, |
| 7552 | VCVTSS2SIZrm = 7539, |
| 7553 | VCVTSS2SIZrm_Int = 7540, |
| 7554 | VCVTSS2SIZrr = 7541, |
| 7555 | VCVTSS2SIZrr_Int = 7542, |
| 7556 | VCVTSS2SIZrrb_Int = 7543, |
| 7557 | VCVTSS2SIrm = 7544, |
| 7558 | VCVTSS2SIrm_Int = 7545, |
| 7559 | VCVTSS2SIrr = 7546, |
| 7560 | VCVTSS2SIrr_Int = 7547, |
| 7561 | VCVTSS2USI64Zrm_Int = 7548, |
| 7562 | VCVTSS2USI64Zrr_Int = 7549, |
| 7563 | VCVTSS2USI64Zrrb_Int = 7550, |
| 7564 | VCVTSS2USIZrm_Int = 7551, |
| 7565 | VCVTSS2USIZrr_Int = 7552, |
| 7566 | VCVTSS2USIZrrb_Int = 7553, |
| 7567 | VCVTTBF162IBSZ128rm = 7554, |
| 7568 | VCVTTBF162IBSZ128rmb = 7555, |
| 7569 | VCVTTBF162IBSZ128rmbk = 7556, |
| 7570 | VCVTTBF162IBSZ128rmbkz = 7557, |
| 7571 | VCVTTBF162IBSZ128rmk = 7558, |
| 7572 | VCVTTBF162IBSZ128rmkz = 7559, |
| 7573 | VCVTTBF162IBSZ128rr = 7560, |
| 7574 | VCVTTBF162IBSZ128rrk = 7561, |
| 7575 | VCVTTBF162IBSZ128rrkz = 7562, |
| 7576 | VCVTTBF162IBSZ256rm = 7563, |
| 7577 | VCVTTBF162IBSZ256rmb = 7564, |
| 7578 | VCVTTBF162IBSZ256rmbk = 7565, |
| 7579 | VCVTTBF162IBSZ256rmbkz = 7566, |
| 7580 | VCVTTBF162IBSZ256rmk = 7567, |
| 7581 | VCVTTBF162IBSZ256rmkz = 7568, |
| 7582 | VCVTTBF162IBSZ256rr = 7569, |
| 7583 | VCVTTBF162IBSZ256rrk = 7570, |
| 7584 | VCVTTBF162IBSZ256rrkz = 7571, |
| 7585 | VCVTTBF162IBSZrm = 7572, |
| 7586 | VCVTTBF162IBSZrmb = 7573, |
| 7587 | VCVTTBF162IBSZrmbk = 7574, |
| 7588 | VCVTTBF162IBSZrmbkz = 7575, |
| 7589 | VCVTTBF162IBSZrmk = 7576, |
| 7590 | VCVTTBF162IBSZrmkz = 7577, |
| 7591 | VCVTTBF162IBSZrr = 7578, |
| 7592 | VCVTTBF162IBSZrrk = 7579, |
| 7593 | VCVTTBF162IBSZrrkz = 7580, |
| 7594 | VCVTTBF162IUBSZ128rm = 7581, |
| 7595 | VCVTTBF162IUBSZ128rmb = 7582, |
| 7596 | VCVTTBF162IUBSZ128rmbk = 7583, |
| 7597 | VCVTTBF162IUBSZ128rmbkz = 7584, |
| 7598 | VCVTTBF162IUBSZ128rmk = 7585, |
| 7599 | VCVTTBF162IUBSZ128rmkz = 7586, |
| 7600 | VCVTTBF162IUBSZ128rr = 7587, |
| 7601 | VCVTTBF162IUBSZ128rrk = 7588, |
| 7602 | VCVTTBF162IUBSZ128rrkz = 7589, |
| 7603 | VCVTTBF162IUBSZ256rm = 7590, |
| 7604 | VCVTTBF162IUBSZ256rmb = 7591, |
| 7605 | VCVTTBF162IUBSZ256rmbk = 7592, |
| 7606 | VCVTTBF162IUBSZ256rmbkz = 7593, |
| 7607 | VCVTTBF162IUBSZ256rmk = 7594, |
| 7608 | VCVTTBF162IUBSZ256rmkz = 7595, |
| 7609 | VCVTTBF162IUBSZ256rr = 7596, |
| 7610 | VCVTTBF162IUBSZ256rrk = 7597, |
| 7611 | VCVTTBF162IUBSZ256rrkz = 7598, |
| 7612 | VCVTTBF162IUBSZrm = 7599, |
| 7613 | VCVTTBF162IUBSZrmb = 7600, |
| 7614 | VCVTTBF162IUBSZrmbk = 7601, |
| 7615 | VCVTTBF162IUBSZrmbkz = 7602, |
| 7616 | VCVTTBF162IUBSZrmk = 7603, |
| 7617 | VCVTTBF162IUBSZrmkz = 7604, |
| 7618 | VCVTTBF162IUBSZrr = 7605, |
| 7619 | VCVTTBF162IUBSZrrk = 7606, |
| 7620 | VCVTTBF162IUBSZrrkz = 7607, |
| 7621 | VCVTTPD2DQSZ128rm = 7608, |
| 7622 | VCVTTPD2DQSZ128rmb = 7609, |
| 7623 | VCVTTPD2DQSZ128rmbk = 7610, |
| 7624 | VCVTTPD2DQSZ128rmbkz = 7611, |
| 7625 | VCVTTPD2DQSZ128rmk = 7612, |
| 7626 | VCVTTPD2DQSZ128rmkz = 7613, |
| 7627 | VCVTTPD2DQSZ128rr = 7614, |
| 7628 | VCVTTPD2DQSZ128rrk = 7615, |
| 7629 | VCVTTPD2DQSZ128rrkz = 7616, |
| 7630 | VCVTTPD2DQSZ256rm = 7617, |
| 7631 | VCVTTPD2DQSZ256rmb = 7618, |
| 7632 | VCVTTPD2DQSZ256rmbk = 7619, |
| 7633 | VCVTTPD2DQSZ256rmbkz = 7620, |
| 7634 | VCVTTPD2DQSZ256rmk = 7621, |
| 7635 | VCVTTPD2DQSZ256rmkz = 7622, |
| 7636 | VCVTTPD2DQSZ256rr = 7623, |
| 7637 | VCVTTPD2DQSZ256rrb = 7624, |
| 7638 | VCVTTPD2DQSZ256rrbk = 7625, |
| 7639 | VCVTTPD2DQSZ256rrbkz = 7626, |
| 7640 | VCVTTPD2DQSZ256rrk = 7627, |
| 7641 | VCVTTPD2DQSZ256rrkz = 7628, |
| 7642 | VCVTTPD2DQSZrm = 7629, |
| 7643 | VCVTTPD2DQSZrmb = 7630, |
| 7644 | VCVTTPD2DQSZrmbk = 7631, |
| 7645 | VCVTTPD2DQSZrmbkz = 7632, |
| 7646 | VCVTTPD2DQSZrmk = 7633, |
| 7647 | VCVTTPD2DQSZrmkz = 7634, |
| 7648 | VCVTTPD2DQSZrr = 7635, |
| 7649 | VCVTTPD2DQSZrrb = 7636, |
| 7650 | VCVTTPD2DQSZrrbk = 7637, |
| 7651 | VCVTTPD2DQSZrrbkz = 7638, |
| 7652 | VCVTTPD2DQSZrrk = 7639, |
| 7653 | VCVTTPD2DQSZrrkz = 7640, |
| 7654 | VCVTTPD2DQYrm = 7641, |
| 7655 | VCVTTPD2DQYrr = 7642, |
| 7656 | VCVTTPD2DQZ128rm = 7643, |
| 7657 | VCVTTPD2DQZ128rmb = 7644, |
| 7658 | VCVTTPD2DQZ128rmbk = 7645, |
| 7659 | VCVTTPD2DQZ128rmbkz = 7646, |
| 7660 | VCVTTPD2DQZ128rmk = 7647, |
| 7661 | VCVTTPD2DQZ128rmkz = 7648, |
| 7662 | VCVTTPD2DQZ128rr = 7649, |
| 7663 | VCVTTPD2DQZ128rrk = 7650, |
| 7664 | VCVTTPD2DQZ128rrkz = 7651, |
| 7665 | VCVTTPD2DQZ256rm = 7652, |
| 7666 | VCVTTPD2DQZ256rmb = 7653, |
| 7667 | VCVTTPD2DQZ256rmbk = 7654, |
| 7668 | VCVTTPD2DQZ256rmbkz = 7655, |
| 7669 | VCVTTPD2DQZ256rmk = 7656, |
| 7670 | VCVTTPD2DQZ256rmkz = 7657, |
| 7671 | VCVTTPD2DQZ256rr = 7658, |
| 7672 | VCVTTPD2DQZ256rrk = 7659, |
| 7673 | VCVTTPD2DQZ256rrkz = 7660, |
| 7674 | VCVTTPD2DQZrm = 7661, |
| 7675 | VCVTTPD2DQZrmb = 7662, |
| 7676 | VCVTTPD2DQZrmbk = 7663, |
| 7677 | VCVTTPD2DQZrmbkz = 7664, |
| 7678 | VCVTTPD2DQZrmk = 7665, |
| 7679 | VCVTTPD2DQZrmkz = 7666, |
| 7680 | VCVTTPD2DQZrr = 7667, |
| 7681 | VCVTTPD2DQZrrb = 7668, |
| 7682 | VCVTTPD2DQZrrbk = 7669, |
| 7683 | VCVTTPD2DQZrrbkz = 7670, |
| 7684 | VCVTTPD2DQZrrk = 7671, |
| 7685 | VCVTTPD2DQZrrkz = 7672, |
| 7686 | VCVTTPD2DQrm = 7673, |
| 7687 | VCVTTPD2DQrr = 7674, |
| 7688 | VCVTTPD2QQSZ128rm = 7675, |
| 7689 | VCVTTPD2QQSZ128rmb = 7676, |
| 7690 | VCVTTPD2QQSZ128rmbk = 7677, |
| 7691 | VCVTTPD2QQSZ128rmbkz = 7678, |
| 7692 | VCVTTPD2QQSZ128rmk = 7679, |
| 7693 | VCVTTPD2QQSZ128rmkz = 7680, |
| 7694 | VCVTTPD2QQSZ128rr = 7681, |
| 7695 | VCVTTPD2QQSZ128rrk = 7682, |
| 7696 | VCVTTPD2QQSZ128rrkz = 7683, |
| 7697 | VCVTTPD2QQSZ256rm = 7684, |
| 7698 | VCVTTPD2QQSZ256rmb = 7685, |
| 7699 | VCVTTPD2QQSZ256rmbk = 7686, |
| 7700 | VCVTTPD2QQSZ256rmbkz = 7687, |
| 7701 | VCVTTPD2QQSZ256rmk = 7688, |
| 7702 | VCVTTPD2QQSZ256rmkz = 7689, |
| 7703 | VCVTTPD2QQSZ256rr = 7690, |
| 7704 | VCVTTPD2QQSZ256rrb = 7691, |
| 7705 | VCVTTPD2QQSZ256rrbk = 7692, |
| 7706 | VCVTTPD2QQSZ256rrbkz = 7693, |
| 7707 | VCVTTPD2QQSZ256rrk = 7694, |
| 7708 | VCVTTPD2QQSZ256rrkz = 7695, |
| 7709 | VCVTTPD2QQSZrm = 7696, |
| 7710 | VCVTTPD2QQSZrmb = 7697, |
| 7711 | VCVTTPD2QQSZrmbk = 7698, |
| 7712 | VCVTTPD2QQSZrmbkz = 7699, |
| 7713 | VCVTTPD2QQSZrmk = 7700, |
| 7714 | VCVTTPD2QQSZrmkz = 7701, |
| 7715 | VCVTTPD2QQSZrr = 7702, |
| 7716 | VCVTTPD2QQSZrrb = 7703, |
| 7717 | VCVTTPD2QQSZrrbk = 7704, |
| 7718 | VCVTTPD2QQSZrrbkz = 7705, |
| 7719 | VCVTTPD2QQSZrrk = 7706, |
| 7720 | VCVTTPD2QQSZrrkz = 7707, |
| 7721 | VCVTTPD2QQZ128rm = 7708, |
| 7722 | VCVTTPD2QQZ128rmb = 7709, |
| 7723 | VCVTTPD2QQZ128rmbk = 7710, |
| 7724 | VCVTTPD2QQZ128rmbkz = 7711, |
| 7725 | VCVTTPD2QQZ128rmk = 7712, |
| 7726 | VCVTTPD2QQZ128rmkz = 7713, |
| 7727 | VCVTTPD2QQZ128rr = 7714, |
| 7728 | VCVTTPD2QQZ128rrk = 7715, |
| 7729 | VCVTTPD2QQZ128rrkz = 7716, |
| 7730 | VCVTTPD2QQZ256rm = 7717, |
| 7731 | VCVTTPD2QQZ256rmb = 7718, |
| 7732 | VCVTTPD2QQZ256rmbk = 7719, |
| 7733 | VCVTTPD2QQZ256rmbkz = 7720, |
| 7734 | VCVTTPD2QQZ256rmk = 7721, |
| 7735 | VCVTTPD2QQZ256rmkz = 7722, |
| 7736 | VCVTTPD2QQZ256rr = 7723, |
| 7737 | VCVTTPD2QQZ256rrk = 7724, |
| 7738 | VCVTTPD2QQZ256rrkz = 7725, |
| 7739 | VCVTTPD2QQZrm = 7726, |
| 7740 | VCVTTPD2QQZrmb = 7727, |
| 7741 | VCVTTPD2QQZrmbk = 7728, |
| 7742 | VCVTTPD2QQZrmbkz = 7729, |
| 7743 | VCVTTPD2QQZrmk = 7730, |
| 7744 | VCVTTPD2QQZrmkz = 7731, |
| 7745 | VCVTTPD2QQZrr = 7732, |
| 7746 | VCVTTPD2QQZrrb = 7733, |
| 7747 | VCVTTPD2QQZrrbk = 7734, |
| 7748 | VCVTTPD2QQZrrbkz = 7735, |
| 7749 | VCVTTPD2QQZrrk = 7736, |
| 7750 | VCVTTPD2QQZrrkz = 7737, |
| 7751 | VCVTTPD2UDQSZ128rm = 7738, |
| 7752 | VCVTTPD2UDQSZ128rmb = 7739, |
| 7753 | VCVTTPD2UDQSZ128rmbk = 7740, |
| 7754 | VCVTTPD2UDQSZ128rmbkz = 7741, |
| 7755 | VCVTTPD2UDQSZ128rmk = 7742, |
| 7756 | VCVTTPD2UDQSZ128rmkz = 7743, |
| 7757 | VCVTTPD2UDQSZ128rr = 7744, |
| 7758 | VCVTTPD2UDQSZ128rrk = 7745, |
| 7759 | VCVTTPD2UDQSZ128rrkz = 7746, |
| 7760 | VCVTTPD2UDQSZ256rm = 7747, |
| 7761 | VCVTTPD2UDQSZ256rmb = 7748, |
| 7762 | VCVTTPD2UDQSZ256rmbk = 7749, |
| 7763 | VCVTTPD2UDQSZ256rmbkz = 7750, |
| 7764 | VCVTTPD2UDQSZ256rmk = 7751, |
| 7765 | VCVTTPD2UDQSZ256rmkz = 7752, |
| 7766 | VCVTTPD2UDQSZ256rr = 7753, |
| 7767 | VCVTTPD2UDQSZ256rrb = 7754, |
| 7768 | VCVTTPD2UDQSZ256rrbk = 7755, |
| 7769 | VCVTTPD2UDQSZ256rrbkz = 7756, |
| 7770 | VCVTTPD2UDQSZ256rrk = 7757, |
| 7771 | VCVTTPD2UDQSZ256rrkz = 7758, |
| 7772 | VCVTTPD2UDQSZrm = 7759, |
| 7773 | VCVTTPD2UDQSZrmb = 7760, |
| 7774 | VCVTTPD2UDQSZrmbk = 7761, |
| 7775 | VCVTTPD2UDQSZrmbkz = 7762, |
| 7776 | VCVTTPD2UDQSZrmk = 7763, |
| 7777 | VCVTTPD2UDQSZrmkz = 7764, |
| 7778 | VCVTTPD2UDQSZrr = 7765, |
| 7779 | VCVTTPD2UDQSZrrb = 7766, |
| 7780 | VCVTTPD2UDQSZrrbk = 7767, |
| 7781 | VCVTTPD2UDQSZrrbkz = 7768, |
| 7782 | VCVTTPD2UDQSZrrk = 7769, |
| 7783 | VCVTTPD2UDQSZrrkz = 7770, |
| 7784 | VCVTTPD2UDQZ128rm = 7771, |
| 7785 | VCVTTPD2UDQZ128rmb = 7772, |
| 7786 | VCVTTPD2UDQZ128rmbk = 7773, |
| 7787 | VCVTTPD2UDQZ128rmbkz = 7774, |
| 7788 | VCVTTPD2UDQZ128rmk = 7775, |
| 7789 | VCVTTPD2UDQZ128rmkz = 7776, |
| 7790 | VCVTTPD2UDQZ128rr = 7777, |
| 7791 | VCVTTPD2UDQZ128rrk = 7778, |
| 7792 | VCVTTPD2UDQZ128rrkz = 7779, |
| 7793 | VCVTTPD2UDQZ256rm = 7780, |
| 7794 | VCVTTPD2UDQZ256rmb = 7781, |
| 7795 | VCVTTPD2UDQZ256rmbk = 7782, |
| 7796 | VCVTTPD2UDQZ256rmbkz = 7783, |
| 7797 | VCVTTPD2UDQZ256rmk = 7784, |
| 7798 | VCVTTPD2UDQZ256rmkz = 7785, |
| 7799 | VCVTTPD2UDQZ256rr = 7786, |
| 7800 | VCVTTPD2UDQZ256rrk = 7787, |
| 7801 | VCVTTPD2UDQZ256rrkz = 7788, |
| 7802 | VCVTTPD2UDQZrm = 7789, |
| 7803 | VCVTTPD2UDQZrmb = 7790, |
| 7804 | VCVTTPD2UDQZrmbk = 7791, |
| 7805 | VCVTTPD2UDQZrmbkz = 7792, |
| 7806 | VCVTTPD2UDQZrmk = 7793, |
| 7807 | VCVTTPD2UDQZrmkz = 7794, |
| 7808 | VCVTTPD2UDQZrr = 7795, |
| 7809 | VCVTTPD2UDQZrrb = 7796, |
| 7810 | VCVTTPD2UDQZrrbk = 7797, |
| 7811 | VCVTTPD2UDQZrrbkz = 7798, |
| 7812 | VCVTTPD2UDQZrrk = 7799, |
| 7813 | VCVTTPD2UDQZrrkz = 7800, |
| 7814 | VCVTTPD2UQQSZ128rm = 7801, |
| 7815 | VCVTTPD2UQQSZ128rmb = 7802, |
| 7816 | VCVTTPD2UQQSZ128rmbk = 7803, |
| 7817 | VCVTTPD2UQQSZ128rmbkz = 7804, |
| 7818 | VCVTTPD2UQQSZ128rmk = 7805, |
| 7819 | VCVTTPD2UQQSZ128rmkz = 7806, |
| 7820 | VCVTTPD2UQQSZ128rr = 7807, |
| 7821 | VCVTTPD2UQQSZ128rrk = 7808, |
| 7822 | VCVTTPD2UQQSZ128rrkz = 7809, |
| 7823 | VCVTTPD2UQQSZ256rm = 7810, |
| 7824 | VCVTTPD2UQQSZ256rmb = 7811, |
| 7825 | VCVTTPD2UQQSZ256rmbk = 7812, |
| 7826 | VCVTTPD2UQQSZ256rmbkz = 7813, |
| 7827 | VCVTTPD2UQQSZ256rmk = 7814, |
| 7828 | VCVTTPD2UQQSZ256rmkz = 7815, |
| 7829 | VCVTTPD2UQQSZ256rr = 7816, |
| 7830 | VCVTTPD2UQQSZ256rrb = 7817, |
| 7831 | VCVTTPD2UQQSZ256rrbk = 7818, |
| 7832 | VCVTTPD2UQQSZ256rrbkz = 7819, |
| 7833 | VCVTTPD2UQQSZ256rrk = 7820, |
| 7834 | VCVTTPD2UQQSZ256rrkz = 7821, |
| 7835 | VCVTTPD2UQQSZrm = 7822, |
| 7836 | VCVTTPD2UQQSZrmb = 7823, |
| 7837 | VCVTTPD2UQQSZrmbk = 7824, |
| 7838 | VCVTTPD2UQQSZrmbkz = 7825, |
| 7839 | VCVTTPD2UQQSZrmk = 7826, |
| 7840 | VCVTTPD2UQQSZrmkz = 7827, |
| 7841 | VCVTTPD2UQQSZrr = 7828, |
| 7842 | VCVTTPD2UQQSZrrb = 7829, |
| 7843 | VCVTTPD2UQQSZrrbk = 7830, |
| 7844 | VCVTTPD2UQQSZrrbkz = 7831, |
| 7845 | VCVTTPD2UQQSZrrk = 7832, |
| 7846 | VCVTTPD2UQQSZrrkz = 7833, |
| 7847 | VCVTTPD2UQQZ128rm = 7834, |
| 7848 | VCVTTPD2UQQZ128rmb = 7835, |
| 7849 | VCVTTPD2UQQZ128rmbk = 7836, |
| 7850 | VCVTTPD2UQQZ128rmbkz = 7837, |
| 7851 | VCVTTPD2UQQZ128rmk = 7838, |
| 7852 | VCVTTPD2UQQZ128rmkz = 7839, |
| 7853 | VCVTTPD2UQQZ128rr = 7840, |
| 7854 | VCVTTPD2UQQZ128rrk = 7841, |
| 7855 | VCVTTPD2UQQZ128rrkz = 7842, |
| 7856 | VCVTTPD2UQQZ256rm = 7843, |
| 7857 | VCVTTPD2UQQZ256rmb = 7844, |
| 7858 | VCVTTPD2UQQZ256rmbk = 7845, |
| 7859 | VCVTTPD2UQQZ256rmbkz = 7846, |
| 7860 | VCVTTPD2UQQZ256rmk = 7847, |
| 7861 | VCVTTPD2UQQZ256rmkz = 7848, |
| 7862 | VCVTTPD2UQQZ256rr = 7849, |
| 7863 | VCVTTPD2UQQZ256rrk = 7850, |
| 7864 | VCVTTPD2UQQZ256rrkz = 7851, |
| 7865 | VCVTTPD2UQQZrm = 7852, |
| 7866 | VCVTTPD2UQQZrmb = 7853, |
| 7867 | VCVTTPD2UQQZrmbk = 7854, |
| 7868 | VCVTTPD2UQQZrmbkz = 7855, |
| 7869 | VCVTTPD2UQQZrmk = 7856, |
| 7870 | VCVTTPD2UQQZrmkz = 7857, |
| 7871 | VCVTTPD2UQQZrr = 7858, |
| 7872 | VCVTTPD2UQQZrrb = 7859, |
| 7873 | VCVTTPD2UQQZrrbk = 7860, |
| 7874 | VCVTTPD2UQQZrrbkz = 7861, |
| 7875 | VCVTTPD2UQQZrrk = 7862, |
| 7876 | VCVTTPD2UQQZrrkz = 7863, |
| 7877 | VCVTTPH2DQZ128rm = 7864, |
| 7878 | VCVTTPH2DQZ128rmb = 7865, |
| 7879 | VCVTTPH2DQZ128rmbk = 7866, |
| 7880 | VCVTTPH2DQZ128rmbkz = 7867, |
| 7881 | VCVTTPH2DQZ128rmk = 7868, |
| 7882 | VCVTTPH2DQZ128rmkz = 7869, |
| 7883 | VCVTTPH2DQZ128rr = 7870, |
| 7884 | VCVTTPH2DQZ128rrk = 7871, |
| 7885 | VCVTTPH2DQZ128rrkz = 7872, |
| 7886 | VCVTTPH2DQZ256rm = 7873, |
| 7887 | VCVTTPH2DQZ256rmb = 7874, |
| 7888 | VCVTTPH2DQZ256rmbk = 7875, |
| 7889 | VCVTTPH2DQZ256rmbkz = 7876, |
| 7890 | VCVTTPH2DQZ256rmk = 7877, |
| 7891 | VCVTTPH2DQZ256rmkz = 7878, |
| 7892 | VCVTTPH2DQZ256rr = 7879, |
| 7893 | VCVTTPH2DQZ256rrk = 7880, |
| 7894 | VCVTTPH2DQZ256rrkz = 7881, |
| 7895 | VCVTTPH2DQZrm = 7882, |
| 7896 | VCVTTPH2DQZrmb = 7883, |
| 7897 | VCVTTPH2DQZrmbk = 7884, |
| 7898 | VCVTTPH2DQZrmbkz = 7885, |
| 7899 | VCVTTPH2DQZrmk = 7886, |
| 7900 | VCVTTPH2DQZrmkz = 7887, |
| 7901 | VCVTTPH2DQZrr = 7888, |
| 7902 | VCVTTPH2DQZrrb = 7889, |
| 7903 | VCVTTPH2DQZrrbk = 7890, |
| 7904 | VCVTTPH2DQZrrbkz = 7891, |
| 7905 | VCVTTPH2DQZrrk = 7892, |
| 7906 | VCVTTPH2DQZrrkz = 7893, |
| 7907 | VCVTTPH2IBSZ128rm = 7894, |
| 7908 | VCVTTPH2IBSZ128rmb = 7895, |
| 7909 | VCVTTPH2IBSZ128rmbk = 7896, |
| 7910 | VCVTTPH2IBSZ128rmbkz = 7897, |
| 7911 | VCVTTPH2IBSZ128rmk = 7898, |
| 7912 | VCVTTPH2IBSZ128rmkz = 7899, |
| 7913 | VCVTTPH2IBSZ128rr = 7900, |
| 7914 | VCVTTPH2IBSZ128rrk = 7901, |
| 7915 | VCVTTPH2IBSZ128rrkz = 7902, |
| 7916 | VCVTTPH2IBSZ256rm = 7903, |
| 7917 | VCVTTPH2IBSZ256rmb = 7904, |
| 7918 | VCVTTPH2IBSZ256rmbk = 7905, |
| 7919 | VCVTTPH2IBSZ256rmbkz = 7906, |
| 7920 | VCVTTPH2IBSZ256rmk = 7907, |
| 7921 | VCVTTPH2IBSZ256rmkz = 7908, |
| 7922 | VCVTTPH2IBSZ256rr = 7909, |
| 7923 | VCVTTPH2IBSZ256rrk = 7910, |
| 7924 | VCVTTPH2IBSZ256rrkz = 7911, |
| 7925 | VCVTTPH2IBSZrm = 7912, |
| 7926 | VCVTTPH2IBSZrmb = 7913, |
| 7927 | VCVTTPH2IBSZrmbk = 7914, |
| 7928 | VCVTTPH2IBSZrmbkz = 7915, |
| 7929 | VCVTTPH2IBSZrmk = 7916, |
| 7930 | VCVTTPH2IBSZrmkz = 7917, |
| 7931 | VCVTTPH2IBSZrr = 7918, |
| 7932 | VCVTTPH2IBSZrrb = 7919, |
| 7933 | VCVTTPH2IBSZrrbk = 7920, |
| 7934 | VCVTTPH2IBSZrrbkz = 7921, |
| 7935 | VCVTTPH2IBSZrrk = 7922, |
| 7936 | VCVTTPH2IBSZrrkz = 7923, |
| 7937 | VCVTTPH2IUBSZ128rm = 7924, |
| 7938 | VCVTTPH2IUBSZ128rmb = 7925, |
| 7939 | VCVTTPH2IUBSZ128rmbk = 7926, |
| 7940 | VCVTTPH2IUBSZ128rmbkz = 7927, |
| 7941 | VCVTTPH2IUBSZ128rmk = 7928, |
| 7942 | VCVTTPH2IUBSZ128rmkz = 7929, |
| 7943 | VCVTTPH2IUBSZ128rr = 7930, |
| 7944 | VCVTTPH2IUBSZ128rrk = 7931, |
| 7945 | VCVTTPH2IUBSZ128rrkz = 7932, |
| 7946 | VCVTTPH2IUBSZ256rm = 7933, |
| 7947 | VCVTTPH2IUBSZ256rmb = 7934, |
| 7948 | VCVTTPH2IUBSZ256rmbk = 7935, |
| 7949 | VCVTTPH2IUBSZ256rmbkz = 7936, |
| 7950 | VCVTTPH2IUBSZ256rmk = 7937, |
| 7951 | VCVTTPH2IUBSZ256rmkz = 7938, |
| 7952 | VCVTTPH2IUBSZ256rr = 7939, |
| 7953 | VCVTTPH2IUBSZ256rrk = 7940, |
| 7954 | VCVTTPH2IUBSZ256rrkz = 7941, |
| 7955 | VCVTTPH2IUBSZrm = 7942, |
| 7956 | VCVTTPH2IUBSZrmb = 7943, |
| 7957 | VCVTTPH2IUBSZrmbk = 7944, |
| 7958 | VCVTTPH2IUBSZrmbkz = 7945, |
| 7959 | VCVTTPH2IUBSZrmk = 7946, |
| 7960 | VCVTTPH2IUBSZrmkz = 7947, |
| 7961 | VCVTTPH2IUBSZrr = 7948, |
| 7962 | VCVTTPH2IUBSZrrb = 7949, |
| 7963 | VCVTTPH2IUBSZrrbk = 7950, |
| 7964 | VCVTTPH2IUBSZrrbkz = 7951, |
| 7965 | VCVTTPH2IUBSZrrk = 7952, |
| 7966 | VCVTTPH2IUBSZrrkz = 7953, |
| 7967 | VCVTTPH2QQZ128rm = 7954, |
| 7968 | VCVTTPH2QQZ128rmb = 7955, |
| 7969 | VCVTTPH2QQZ128rmbk = 7956, |
| 7970 | VCVTTPH2QQZ128rmbkz = 7957, |
| 7971 | VCVTTPH2QQZ128rmk = 7958, |
| 7972 | VCVTTPH2QQZ128rmkz = 7959, |
| 7973 | VCVTTPH2QQZ128rr = 7960, |
| 7974 | VCVTTPH2QQZ128rrk = 7961, |
| 7975 | VCVTTPH2QQZ128rrkz = 7962, |
| 7976 | VCVTTPH2QQZ256rm = 7963, |
| 7977 | VCVTTPH2QQZ256rmb = 7964, |
| 7978 | VCVTTPH2QQZ256rmbk = 7965, |
| 7979 | VCVTTPH2QQZ256rmbkz = 7966, |
| 7980 | VCVTTPH2QQZ256rmk = 7967, |
| 7981 | VCVTTPH2QQZ256rmkz = 7968, |
| 7982 | VCVTTPH2QQZ256rr = 7969, |
| 7983 | VCVTTPH2QQZ256rrk = 7970, |
| 7984 | VCVTTPH2QQZ256rrkz = 7971, |
| 7985 | VCVTTPH2QQZrm = 7972, |
| 7986 | VCVTTPH2QQZrmb = 7973, |
| 7987 | VCVTTPH2QQZrmbk = 7974, |
| 7988 | VCVTTPH2QQZrmbkz = 7975, |
| 7989 | VCVTTPH2QQZrmk = 7976, |
| 7990 | VCVTTPH2QQZrmkz = 7977, |
| 7991 | VCVTTPH2QQZrr = 7978, |
| 7992 | VCVTTPH2QQZrrb = 7979, |
| 7993 | VCVTTPH2QQZrrbk = 7980, |
| 7994 | VCVTTPH2QQZrrbkz = 7981, |
| 7995 | VCVTTPH2QQZrrk = 7982, |
| 7996 | VCVTTPH2QQZrrkz = 7983, |
| 7997 | VCVTTPH2UDQZ128rm = 7984, |
| 7998 | VCVTTPH2UDQZ128rmb = 7985, |
| 7999 | VCVTTPH2UDQZ128rmbk = 7986, |
| 8000 | VCVTTPH2UDQZ128rmbkz = 7987, |
| 8001 | VCVTTPH2UDQZ128rmk = 7988, |
| 8002 | VCVTTPH2UDQZ128rmkz = 7989, |
| 8003 | VCVTTPH2UDQZ128rr = 7990, |
| 8004 | VCVTTPH2UDQZ128rrk = 7991, |
| 8005 | VCVTTPH2UDQZ128rrkz = 7992, |
| 8006 | VCVTTPH2UDQZ256rm = 7993, |
| 8007 | VCVTTPH2UDQZ256rmb = 7994, |
| 8008 | VCVTTPH2UDQZ256rmbk = 7995, |
| 8009 | VCVTTPH2UDQZ256rmbkz = 7996, |
| 8010 | VCVTTPH2UDQZ256rmk = 7997, |
| 8011 | VCVTTPH2UDQZ256rmkz = 7998, |
| 8012 | VCVTTPH2UDQZ256rr = 7999, |
| 8013 | VCVTTPH2UDQZ256rrk = 8000, |
| 8014 | VCVTTPH2UDQZ256rrkz = 8001, |
| 8015 | VCVTTPH2UDQZrm = 8002, |
| 8016 | VCVTTPH2UDQZrmb = 8003, |
| 8017 | VCVTTPH2UDQZrmbk = 8004, |
| 8018 | VCVTTPH2UDQZrmbkz = 8005, |
| 8019 | VCVTTPH2UDQZrmk = 8006, |
| 8020 | VCVTTPH2UDQZrmkz = 8007, |
| 8021 | VCVTTPH2UDQZrr = 8008, |
| 8022 | VCVTTPH2UDQZrrb = 8009, |
| 8023 | VCVTTPH2UDQZrrbk = 8010, |
| 8024 | VCVTTPH2UDQZrrbkz = 8011, |
| 8025 | VCVTTPH2UDQZrrk = 8012, |
| 8026 | VCVTTPH2UDQZrrkz = 8013, |
| 8027 | VCVTTPH2UQQZ128rm = 8014, |
| 8028 | VCVTTPH2UQQZ128rmb = 8015, |
| 8029 | VCVTTPH2UQQZ128rmbk = 8016, |
| 8030 | VCVTTPH2UQQZ128rmbkz = 8017, |
| 8031 | VCVTTPH2UQQZ128rmk = 8018, |
| 8032 | VCVTTPH2UQQZ128rmkz = 8019, |
| 8033 | VCVTTPH2UQQZ128rr = 8020, |
| 8034 | VCVTTPH2UQQZ128rrk = 8021, |
| 8035 | VCVTTPH2UQQZ128rrkz = 8022, |
| 8036 | VCVTTPH2UQQZ256rm = 8023, |
| 8037 | VCVTTPH2UQQZ256rmb = 8024, |
| 8038 | VCVTTPH2UQQZ256rmbk = 8025, |
| 8039 | VCVTTPH2UQQZ256rmbkz = 8026, |
| 8040 | VCVTTPH2UQQZ256rmk = 8027, |
| 8041 | VCVTTPH2UQQZ256rmkz = 8028, |
| 8042 | VCVTTPH2UQQZ256rr = 8029, |
| 8043 | VCVTTPH2UQQZ256rrk = 8030, |
| 8044 | VCVTTPH2UQQZ256rrkz = 8031, |
| 8045 | VCVTTPH2UQQZrm = 8032, |
| 8046 | VCVTTPH2UQQZrmb = 8033, |
| 8047 | VCVTTPH2UQQZrmbk = 8034, |
| 8048 | VCVTTPH2UQQZrmbkz = 8035, |
| 8049 | VCVTTPH2UQQZrmk = 8036, |
| 8050 | VCVTTPH2UQQZrmkz = 8037, |
| 8051 | VCVTTPH2UQQZrr = 8038, |
| 8052 | VCVTTPH2UQQZrrb = 8039, |
| 8053 | VCVTTPH2UQQZrrbk = 8040, |
| 8054 | VCVTTPH2UQQZrrbkz = 8041, |
| 8055 | VCVTTPH2UQQZrrk = 8042, |
| 8056 | VCVTTPH2UQQZrrkz = 8043, |
| 8057 | VCVTTPH2UWZ128rm = 8044, |
| 8058 | VCVTTPH2UWZ128rmb = 8045, |
| 8059 | VCVTTPH2UWZ128rmbk = 8046, |
| 8060 | VCVTTPH2UWZ128rmbkz = 8047, |
| 8061 | VCVTTPH2UWZ128rmk = 8048, |
| 8062 | VCVTTPH2UWZ128rmkz = 8049, |
| 8063 | VCVTTPH2UWZ128rr = 8050, |
| 8064 | VCVTTPH2UWZ128rrk = 8051, |
| 8065 | VCVTTPH2UWZ128rrkz = 8052, |
| 8066 | VCVTTPH2UWZ256rm = 8053, |
| 8067 | VCVTTPH2UWZ256rmb = 8054, |
| 8068 | VCVTTPH2UWZ256rmbk = 8055, |
| 8069 | VCVTTPH2UWZ256rmbkz = 8056, |
| 8070 | VCVTTPH2UWZ256rmk = 8057, |
| 8071 | VCVTTPH2UWZ256rmkz = 8058, |
| 8072 | VCVTTPH2UWZ256rr = 8059, |
| 8073 | VCVTTPH2UWZ256rrk = 8060, |
| 8074 | VCVTTPH2UWZ256rrkz = 8061, |
| 8075 | VCVTTPH2UWZrm = 8062, |
| 8076 | VCVTTPH2UWZrmb = 8063, |
| 8077 | VCVTTPH2UWZrmbk = 8064, |
| 8078 | VCVTTPH2UWZrmbkz = 8065, |
| 8079 | VCVTTPH2UWZrmk = 8066, |
| 8080 | VCVTTPH2UWZrmkz = 8067, |
| 8081 | VCVTTPH2UWZrr = 8068, |
| 8082 | VCVTTPH2UWZrrb = 8069, |
| 8083 | VCVTTPH2UWZrrbk = 8070, |
| 8084 | VCVTTPH2UWZrrbkz = 8071, |
| 8085 | VCVTTPH2UWZrrk = 8072, |
| 8086 | VCVTTPH2UWZrrkz = 8073, |
| 8087 | VCVTTPH2WZ128rm = 8074, |
| 8088 | VCVTTPH2WZ128rmb = 8075, |
| 8089 | VCVTTPH2WZ128rmbk = 8076, |
| 8090 | VCVTTPH2WZ128rmbkz = 8077, |
| 8091 | VCVTTPH2WZ128rmk = 8078, |
| 8092 | VCVTTPH2WZ128rmkz = 8079, |
| 8093 | VCVTTPH2WZ128rr = 8080, |
| 8094 | VCVTTPH2WZ128rrk = 8081, |
| 8095 | VCVTTPH2WZ128rrkz = 8082, |
| 8096 | VCVTTPH2WZ256rm = 8083, |
| 8097 | VCVTTPH2WZ256rmb = 8084, |
| 8098 | VCVTTPH2WZ256rmbk = 8085, |
| 8099 | VCVTTPH2WZ256rmbkz = 8086, |
| 8100 | VCVTTPH2WZ256rmk = 8087, |
| 8101 | VCVTTPH2WZ256rmkz = 8088, |
| 8102 | VCVTTPH2WZ256rr = 8089, |
| 8103 | VCVTTPH2WZ256rrk = 8090, |
| 8104 | VCVTTPH2WZ256rrkz = 8091, |
| 8105 | VCVTTPH2WZrm = 8092, |
| 8106 | VCVTTPH2WZrmb = 8093, |
| 8107 | VCVTTPH2WZrmbk = 8094, |
| 8108 | VCVTTPH2WZrmbkz = 8095, |
| 8109 | VCVTTPH2WZrmk = 8096, |
| 8110 | VCVTTPH2WZrmkz = 8097, |
| 8111 | VCVTTPH2WZrr = 8098, |
| 8112 | VCVTTPH2WZrrb = 8099, |
| 8113 | VCVTTPH2WZrrbk = 8100, |
| 8114 | VCVTTPH2WZrrbkz = 8101, |
| 8115 | VCVTTPH2WZrrk = 8102, |
| 8116 | VCVTTPH2WZrrkz = 8103, |
| 8117 | VCVTTPS2DQSZ128rm = 8104, |
| 8118 | VCVTTPS2DQSZ128rmb = 8105, |
| 8119 | VCVTTPS2DQSZ128rmbk = 8106, |
| 8120 | VCVTTPS2DQSZ128rmbkz = 8107, |
| 8121 | VCVTTPS2DQSZ128rmk = 8108, |
| 8122 | VCVTTPS2DQSZ128rmkz = 8109, |
| 8123 | VCVTTPS2DQSZ128rr = 8110, |
| 8124 | VCVTTPS2DQSZ128rrk = 8111, |
| 8125 | VCVTTPS2DQSZ128rrkz = 8112, |
| 8126 | VCVTTPS2DQSZ256rm = 8113, |
| 8127 | VCVTTPS2DQSZ256rmb = 8114, |
| 8128 | VCVTTPS2DQSZ256rmbk = 8115, |
| 8129 | VCVTTPS2DQSZ256rmbkz = 8116, |
| 8130 | VCVTTPS2DQSZ256rmk = 8117, |
| 8131 | VCVTTPS2DQSZ256rmkz = 8118, |
| 8132 | VCVTTPS2DQSZ256rr = 8119, |
| 8133 | VCVTTPS2DQSZ256rrk = 8120, |
| 8134 | VCVTTPS2DQSZ256rrkz = 8121, |
| 8135 | VCVTTPS2DQSZrm = 8122, |
| 8136 | VCVTTPS2DQSZrmb = 8123, |
| 8137 | VCVTTPS2DQSZrmbk = 8124, |
| 8138 | VCVTTPS2DQSZrmbkz = 8125, |
| 8139 | VCVTTPS2DQSZrmk = 8126, |
| 8140 | VCVTTPS2DQSZrmkz = 8127, |
| 8141 | VCVTTPS2DQSZrr = 8128, |
| 8142 | VCVTTPS2DQSZrrb = 8129, |
| 8143 | VCVTTPS2DQSZrrbk = 8130, |
| 8144 | VCVTTPS2DQSZrrbkz = 8131, |
| 8145 | VCVTTPS2DQSZrrk = 8132, |
| 8146 | VCVTTPS2DQSZrrkz = 8133, |
| 8147 | VCVTTPS2DQYrm = 8134, |
| 8148 | VCVTTPS2DQYrr = 8135, |
| 8149 | VCVTTPS2DQZ128rm = 8136, |
| 8150 | VCVTTPS2DQZ128rmb = 8137, |
| 8151 | VCVTTPS2DQZ128rmbk = 8138, |
| 8152 | VCVTTPS2DQZ128rmbkz = 8139, |
| 8153 | VCVTTPS2DQZ128rmk = 8140, |
| 8154 | VCVTTPS2DQZ128rmkz = 8141, |
| 8155 | VCVTTPS2DQZ128rr = 8142, |
| 8156 | VCVTTPS2DQZ128rrk = 8143, |
| 8157 | VCVTTPS2DQZ128rrkz = 8144, |
| 8158 | VCVTTPS2DQZ256rm = 8145, |
| 8159 | VCVTTPS2DQZ256rmb = 8146, |
| 8160 | VCVTTPS2DQZ256rmbk = 8147, |
| 8161 | VCVTTPS2DQZ256rmbkz = 8148, |
| 8162 | VCVTTPS2DQZ256rmk = 8149, |
| 8163 | VCVTTPS2DQZ256rmkz = 8150, |
| 8164 | VCVTTPS2DQZ256rr = 8151, |
| 8165 | VCVTTPS2DQZ256rrk = 8152, |
| 8166 | VCVTTPS2DQZ256rrkz = 8153, |
| 8167 | VCVTTPS2DQZrm = 8154, |
| 8168 | VCVTTPS2DQZrmb = 8155, |
| 8169 | VCVTTPS2DQZrmbk = 8156, |
| 8170 | VCVTTPS2DQZrmbkz = 8157, |
| 8171 | VCVTTPS2DQZrmk = 8158, |
| 8172 | VCVTTPS2DQZrmkz = 8159, |
| 8173 | VCVTTPS2DQZrr = 8160, |
| 8174 | VCVTTPS2DQZrrb = 8161, |
| 8175 | VCVTTPS2DQZrrbk = 8162, |
| 8176 | VCVTTPS2DQZrrbkz = 8163, |
| 8177 | VCVTTPS2DQZrrk = 8164, |
| 8178 | VCVTTPS2DQZrrkz = 8165, |
| 8179 | VCVTTPS2DQrm = 8166, |
| 8180 | VCVTTPS2DQrr = 8167, |
| 8181 | VCVTTPS2IBSZ128rm = 8168, |
| 8182 | VCVTTPS2IBSZ128rmb = 8169, |
| 8183 | VCVTTPS2IBSZ128rmbk = 8170, |
| 8184 | VCVTTPS2IBSZ128rmbkz = 8171, |
| 8185 | VCVTTPS2IBSZ128rmk = 8172, |
| 8186 | VCVTTPS2IBSZ128rmkz = 8173, |
| 8187 | VCVTTPS2IBSZ128rr = 8174, |
| 8188 | VCVTTPS2IBSZ128rrk = 8175, |
| 8189 | VCVTTPS2IBSZ128rrkz = 8176, |
| 8190 | VCVTTPS2IBSZ256rm = 8177, |
| 8191 | VCVTTPS2IBSZ256rmb = 8178, |
| 8192 | VCVTTPS2IBSZ256rmbk = 8179, |
| 8193 | VCVTTPS2IBSZ256rmbkz = 8180, |
| 8194 | VCVTTPS2IBSZ256rmk = 8181, |
| 8195 | VCVTTPS2IBSZ256rmkz = 8182, |
| 8196 | VCVTTPS2IBSZ256rr = 8183, |
| 8197 | VCVTTPS2IBSZ256rrk = 8184, |
| 8198 | VCVTTPS2IBSZ256rrkz = 8185, |
| 8199 | VCVTTPS2IBSZrm = 8186, |
| 8200 | VCVTTPS2IBSZrmb = 8187, |
| 8201 | VCVTTPS2IBSZrmbk = 8188, |
| 8202 | VCVTTPS2IBSZrmbkz = 8189, |
| 8203 | VCVTTPS2IBSZrmk = 8190, |
| 8204 | VCVTTPS2IBSZrmkz = 8191, |
| 8205 | VCVTTPS2IBSZrr = 8192, |
| 8206 | VCVTTPS2IBSZrrb = 8193, |
| 8207 | VCVTTPS2IBSZrrbk = 8194, |
| 8208 | VCVTTPS2IBSZrrbkz = 8195, |
| 8209 | VCVTTPS2IBSZrrk = 8196, |
| 8210 | VCVTTPS2IBSZrrkz = 8197, |
| 8211 | VCVTTPS2IUBSZ128rm = 8198, |
| 8212 | VCVTTPS2IUBSZ128rmb = 8199, |
| 8213 | VCVTTPS2IUBSZ128rmbk = 8200, |
| 8214 | VCVTTPS2IUBSZ128rmbkz = 8201, |
| 8215 | VCVTTPS2IUBSZ128rmk = 8202, |
| 8216 | VCVTTPS2IUBSZ128rmkz = 8203, |
| 8217 | VCVTTPS2IUBSZ128rr = 8204, |
| 8218 | VCVTTPS2IUBSZ128rrk = 8205, |
| 8219 | VCVTTPS2IUBSZ128rrkz = 8206, |
| 8220 | VCVTTPS2IUBSZ256rm = 8207, |
| 8221 | VCVTTPS2IUBSZ256rmb = 8208, |
| 8222 | VCVTTPS2IUBSZ256rmbk = 8209, |
| 8223 | VCVTTPS2IUBSZ256rmbkz = 8210, |
| 8224 | VCVTTPS2IUBSZ256rmk = 8211, |
| 8225 | VCVTTPS2IUBSZ256rmkz = 8212, |
| 8226 | VCVTTPS2IUBSZ256rr = 8213, |
| 8227 | VCVTTPS2IUBSZ256rrk = 8214, |
| 8228 | VCVTTPS2IUBSZ256rrkz = 8215, |
| 8229 | VCVTTPS2IUBSZrm = 8216, |
| 8230 | VCVTTPS2IUBSZrmb = 8217, |
| 8231 | VCVTTPS2IUBSZrmbk = 8218, |
| 8232 | VCVTTPS2IUBSZrmbkz = 8219, |
| 8233 | VCVTTPS2IUBSZrmk = 8220, |
| 8234 | VCVTTPS2IUBSZrmkz = 8221, |
| 8235 | VCVTTPS2IUBSZrr = 8222, |
| 8236 | VCVTTPS2IUBSZrrb = 8223, |
| 8237 | VCVTTPS2IUBSZrrbk = 8224, |
| 8238 | VCVTTPS2IUBSZrrbkz = 8225, |
| 8239 | VCVTTPS2IUBSZrrk = 8226, |
| 8240 | VCVTTPS2IUBSZrrkz = 8227, |
| 8241 | VCVTTPS2QQSZ128rm = 8228, |
| 8242 | VCVTTPS2QQSZ128rmb = 8229, |
| 8243 | VCVTTPS2QQSZ128rmbk = 8230, |
| 8244 | VCVTTPS2QQSZ128rmbkz = 8231, |
| 8245 | VCVTTPS2QQSZ128rmk = 8232, |
| 8246 | VCVTTPS2QQSZ128rmkz = 8233, |
| 8247 | VCVTTPS2QQSZ128rr = 8234, |
| 8248 | VCVTTPS2QQSZ128rrk = 8235, |
| 8249 | VCVTTPS2QQSZ128rrkz = 8236, |
| 8250 | VCVTTPS2QQSZ256rm = 8237, |
| 8251 | VCVTTPS2QQSZ256rmb = 8238, |
| 8252 | VCVTTPS2QQSZ256rmbk = 8239, |
| 8253 | VCVTTPS2QQSZ256rmbkz = 8240, |
| 8254 | VCVTTPS2QQSZ256rmk = 8241, |
| 8255 | VCVTTPS2QQSZ256rmkz = 8242, |
| 8256 | VCVTTPS2QQSZ256rr = 8243, |
| 8257 | VCVTTPS2QQSZ256rrb = 8244, |
| 8258 | VCVTTPS2QQSZ256rrbk = 8245, |
| 8259 | VCVTTPS2QQSZ256rrbkz = 8246, |
| 8260 | VCVTTPS2QQSZ256rrk = 8247, |
| 8261 | VCVTTPS2QQSZ256rrkz = 8248, |
| 8262 | VCVTTPS2QQSZrm = 8249, |
| 8263 | VCVTTPS2QQSZrmb = 8250, |
| 8264 | VCVTTPS2QQSZrmbk = 8251, |
| 8265 | VCVTTPS2QQSZrmbkz = 8252, |
| 8266 | VCVTTPS2QQSZrmk = 8253, |
| 8267 | VCVTTPS2QQSZrmkz = 8254, |
| 8268 | VCVTTPS2QQSZrr = 8255, |
| 8269 | VCVTTPS2QQSZrrb = 8256, |
| 8270 | VCVTTPS2QQSZrrbk = 8257, |
| 8271 | VCVTTPS2QQSZrrbkz = 8258, |
| 8272 | VCVTTPS2QQSZrrk = 8259, |
| 8273 | VCVTTPS2QQSZrrkz = 8260, |
| 8274 | VCVTTPS2QQZ128rm = 8261, |
| 8275 | VCVTTPS2QQZ128rmb = 8262, |
| 8276 | VCVTTPS2QQZ128rmbk = 8263, |
| 8277 | VCVTTPS2QQZ128rmbkz = 8264, |
| 8278 | VCVTTPS2QQZ128rmk = 8265, |
| 8279 | VCVTTPS2QQZ128rmkz = 8266, |
| 8280 | VCVTTPS2QQZ128rr = 8267, |
| 8281 | VCVTTPS2QQZ128rrk = 8268, |
| 8282 | VCVTTPS2QQZ128rrkz = 8269, |
| 8283 | VCVTTPS2QQZ256rm = 8270, |
| 8284 | VCVTTPS2QQZ256rmb = 8271, |
| 8285 | VCVTTPS2QQZ256rmbk = 8272, |
| 8286 | VCVTTPS2QQZ256rmbkz = 8273, |
| 8287 | VCVTTPS2QQZ256rmk = 8274, |
| 8288 | VCVTTPS2QQZ256rmkz = 8275, |
| 8289 | VCVTTPS2QQZ256rr = 8276, |
| 8290 | VCVTTPS2QQZ256rrk = 8277, |
| 8291 | VCVTTPS2QQZ256rrkz = 8278, |
| 8292 | VCVTTPS2QQZrm = 8279, |
| 8293 | VCVTTPS2QQZrmb = 8280, |
| 8294 | VCVTTPS2QQZrmbk = 8281, |
| 8295 | VCVTTPS2QQZrmbkz = 8282, |
| 8296 | VCVTTPS2QQZrmk = 8283, |
| 8297 | VCVTTPS2QQZrmkz = 8284, |
| 8298 | VCVTTPS2QQZrr = 8285, |
| 8299 | VCVTTPS2QQZrrb = 8286, |
| 8300 | VCVTTPS2QQZrrbk = 8287, |
| 8301 | VCVTTPS2QQZrrbkz = 8288, |
| 8302 | VCVTTPS2QQZrrk = 8289, |
| 8303 | VCVTTPS2QQZrrkz = 8290, |
| 8304 | VCVTTPS2UDQSZ128rm = 8291, |
| 8305 | VCVTTPS2UDQSZ128rmb = 8292, |
| 8306 | VCVTTPS2UDQSZ128rmbk = 8293, |
| 8307 | VCVTTPS2UDQSZ128rmbkz = 8294, |
| 8308 | VCVTTPS2UDQSZ128rmk = 8295, |
| 8309 | VCVTTPS2UDQSZ128rmkz = 8296, |
| 8310 | VCVTTPS2UDQSZ128rr = 8297, |
| 8311 | VCVTTPS2UDQSZ128rrk = 8298, |
| 8312 | VCVTTPS2UDQSZ128rrkz = 8299, |
| 8313 | VCVTTPS2UDQSZ256rm = 8300, |
| 8314 | VCVTTPS2UDQSZ256rmb = 8301, |
| 8315 | VCVTTPS2UDQSZ256rmbk = 8302, |
| 8316 | VCVTTPS2UDQSZ256rmbkz = 8303, |
| 8317 | VCVTTPS2UDQSZ256rmk = 8304, |
| 8318 | VCVTTPS2UDQSZ256rmkz = 8305, |
| 8319 | VCVTTPS2UDQSZ256rr = 8306, |
| 8320 | VCVTTPS2UDQSZ256rrk = 8307, |
| 8321 | VCVTTPS2UDQSZ256rrkz = 8308, |
| 8322 | VCVTTPS2UDQSZrm = 8309, |
| 8323 | VCVTTPS2UDQSZrmb = 8310, |
| 8324 | VCVTTPS2UDQSZrmbk = 8311, |
| 8325 | VCVTTPS2UDQSZrmbkz = 8312, |
| 8326 | VCVTTPS2UDQSZrmk = 8313, |
| 8327 | VCVTTPS2UDQSZrmkz = 8314, |
| 8328 | VCVTTPS2UDQSZrr = 8315, |
| 8329 | VCVTTPS2UDQSZrrb = 8316, |
| 8330 | VCVTTPS2UDQSZrrbk = 8317, |
| 8331 | VCVTTPS2UDQSZrrbkz = 8318, |
| 8332 | VCVTTPS2UDQSZrrk = 8319, |
| 8333 | VCVTTPS2UDQSZrrkz = 8320, |
| 8334 | VCVTTPS2UDQZ128rm = 8321, |
| 8335 | VCVTTPS2UDQZ128rmb = 8322, |
| 8336 | VCVTTPS2UDQZ128rmbk = 8323, |
| 8337 | VCVTTPS2UDQZ128rmbkz = 8324, |
| 8338 | VCVTTPS2UDQZ128rmk = 8325, |
| 8339 | VCVTTPS2UDQZ128rmkz = 8326, |
| 8340 | VCVTTPS2UDQZ128rr = 8327, |
| 8341 | VCVTTPS2UDQZ128rrk = 8328, |
| 8342 | VCVTTPS2UDQZ128rrkz = 8329, |
| 8343 | VCVTTPS2UDQZ256rm = 8330, |
| 8344 | VCVTTPS2UDQZ256rmb = 8331, |
| 8345 | VCVTTPS2UDQZ256rmbk = 8332, |
| 8346 | VCVTTPS2UDQZ256rmbkz = 8333, |
| 8347 | VCVTTPS2UDQZ256rmk = 8334, |
| 8348 | VCVTTPS2UDQZ256rmkz = 8335, |
| 8349 | VCVTTPS2UDQZ256rr = 8336, |
| 8350 | VCVTTPS2UDQZ256rrk = 8337, |
| 8351 | VCVTTPS2UDQZ256rrkz = 8338, |
| 8352 | VCVTTPS2UDQZrm = 8339, |
| 8353 | VCVTTPS2UDQZrmb = 8340, |
| 8354 | VCVTTPS2UDQZrmbk = 8341, |
| 8355 | VCVTTPS2UDQZrmbkz = 8342, |
| 8356 | VCVTTPS2UDQZrmk = 8343, |
| 8357 | VCVTTPS2UDQZrmkz = 8344, |
| 8358 | VCVTTPS2UDQZrr = 8345, |
| 8359 | VCVTTPS2UDQZrrb = 8346, |
| 8360 | VCVTTPS2UDQZrrbk = 8347, |
| 8361 | VCVTTPS2UDQZrrbkz = 8348, |
| 8362 | VCVTTPS2UDQZrrk = 8349, |
| 8363 | VCVTTPS2UDQZrrkz = 8350, |
| 8364 | VCVTTPS2UQQSZ128rm = 8351, |
| 8365 | VCVTTPS2UQQSZ128rmb = 8352, |
| 8366 | VCVTTPS2UQQSZ128rmbk = 8353, |
| 8367 | VCVTTPS2UQQSZ128rmbkz = 8354, |
| 8368 | VCVTTPS2UQQSZ128rmk = 8355, |
| 8369 | VCVTTPS2UQQSZ128rmkz = 8356, |
| 8370 | VCVTTPS2UQQSZ128rr = 8357, |
| 8371 | VCVTTPS2UQQSZ128rrk = 8358, |
| 8372 | VCVTTPS2UQQSZ128rrkz = 8359, |
| 8373 | VCVTTPS2UQQSZ256rm = 8360, |
| 8374 | VCVTTPS2UQQSZ256rmb = 8361, |
| 8375 | VCVTTPS2UQQSZ256rmbk = 8362, |
| 8376 | VCVTTPS2UQQSZ256rmbkz = 8363, |
| 8377 | VCVTTPS2UQQSZ256rmk = 8364, |
| 8378 | VCVTTPS2UQQSZ256rmkz = 8365, |
| 8379 | VCVTTPS2UQQSZ256rr = 8366, |
| 8380 | VCVTTPS2UQQSZ256rrb = 8367, |
| 8381 | VCVTTPS2UQQSZ256rrbk = 8368, |
| 8382 | VCVTTPS2UQQSZ256rrbkz = 8369, |
| 8383 | VCVTTPS2UQQSZ256rrk = 8370, |
| 8384 | VCVTTPS2UQQSZ256rrkz = 8371, |
| 8385 | VCVTTPS2UQQSZrm = 8372, |
| 8386 | VCVTTPS2UQQSZrmb = 8373, |
| 8387 | VCVTTPS2UQQSZrmbk = 8374, |
| 8388 | VCVTTPS2UQQSZrmbkz = 8375, |
| 8389 | VCVTTPS2UQQSZrmk = 8376, |
| 8390 | VCVTTPS2UQQSZrmkz = 8377, |
| 8391 | VCVTTPS2UQQSZrr = 8378, |
| 8392 | VCVTTPS2UQQSZrrb = 8379, |
| 8393 | VCVTTPS2UQQSZrrbk = 8380, |
| 8394 | VCVTTPS2UQQSZrrbkz = 8381, |
| 8395 | VCVTTPS2UQQSZrrk = 8382, |
| 8396 | VCVTTPS2UQQSZrrkz = 8383, |
| 8397 | VCVTTPS2UQQZ128rm = 8384, |
| 8398 | VCVTTPS2UQQZ128rmb = 8385, |
| 8399 | VCVTTPS2UQQZ128rmbk = 8386, |
| 8400 | VCVTTPS2UQQZ128rmbkz = 8387, |
| 8401 | VCVTTPS2UQQZ128rmk = 8388, |
| 8402 | VCVTTPS2UQQZ128rmkz = 8389, |
| 8403 | VCVTTPS2UQQZ128rr = 8390, |
| 8404 | VCVTTPS2UQQZ128rrk = 8391, |
| 8405 | VCVTTPS2UQQZ128rrkz = 8392, |
| 8406 | VCVTTPS2UQQZ256rm = 8393, |
| 8407 | VCVTTPS2UQQZ256rmb = 8394, |
| 8408 | VCVTTPS2UQQZ256rmbk = 8395, |
| 8409 | VCVTTPS2UQQZ256rmbkz = 8396, |
| 8410 | VCVTTPS2UQQZ256rmk = 8397, |
| 8411 | VCVTTPS2UQQZ256rmkz = 8398, |
| 8412 | VCVTTPS2UQQZ256rr = 8399, |
| 8413 | VCVTTPS2UQQZ256rrk = 8400, |
| 8414 | VCVTTPS2UQQZ256rrkz = 8401, |
| 8415 | VCVTTPS2UQQZrm = 8402, |
| 8416 | VCVTTPS2UQQZrmb = 8403, |
| 8417 | VCVTTPS2UQQZrmbk = 8404, |
| 8418 | VCVTTPS2UQQZrmbkz = 8405, |
| 8419 | VCVTTPS2UQQZrmk = 8406, |
| 8420 | VCVTTPS2UQQZrmkz = 8407, |
| 8421 | VCVTTPS2UQQZrr = 8408, |
| 8422 | VCVTTPS2UQQZrrb = 8409, |
| 8423 | VCVTTPS2UQQZrrbk = 8410, |
| 8424 | VCVTTPS2UQQZrrbkz = 8411, |
| 8425 | VCVTTPS2UQQZrrk = 8412, |
| 8426 | VCVTTPS2UQQZrrkz = 8413, |
| 8427 | VCVTTSD2SI64Srm = 8414, |
| 8428 | VCVTTSD2SI64Srm_Int = 8415, |
| 8429 | VCVTTSD2SI64Srr = 8416, |
| 8430 | VCVTTSD2SI64Srr_Int = 8417, |
| 8431 | VCVTTSD2SI64Srrb_Int = 8418, |
| 8432 | VCVTTSD2SI64Zrm = 8419, |
| 8433 | VCVTTSD2SI64Zrm_Int = 8420, |
| 8434 | VCVTTSD2SI64Zrr = 8421, |
| 8435 | VCVTTSD2SI64Zrr_Int = 8422, |
| 8436 | VCVTTSD2SI64Zrrb_Int = 8423, |
| 8437 | VCVTTSD2SI64rm = 8424, |
| 8438 | VCVTTSD2SI64rm_Int = 8425, |
| 8439 | VCVTTSD2SI64rr = 8426, |
| 8440 | VCVTTSD2SI64rr_Int = 8427, |
| 8441 | VCVTTSD2SISrm = 8428, |
| 8442 | VCVTTSD2SISrm_Int = 8429, |
| 8443 | VCVTTSD2SISrr = 8430, |
| 8444 | VCVTTSD2SISrr_Int = 8431, |
| 8445 | VCVTTSD2SISrrb_Int = 8432, |
| 8446 | VCVTTSD2SIZrm = 8433, |
| 8447 | VCVTTSD2SIZrm_Int = 8434, |
| 8448 | VCVTTSD2SIZrr = 8435, |
| 8449 | VCVTTSD2SIZrr_Int = 8436, |
| 8450 | VCVTTSD2SIZrrb_Int = 8437, |
| 8451 | VCVTTSD2SIrm = 8438, |
| 8452 | VCVTTSD2SIrm_Int = 8439, |
| 8453 | VCVTTSD2SIrr = 8440, |
| 8454 | VCVTTSD2SIrr_Int = 8441, |
| 8455 | VCVTTSD2USI64Srm = 8442, |
| 8456 | VCVTTSD2USI64Srm_Int = 8443, |
| 8457 | VCVTTSD2USI64Srr = 8444, |
| 8458 | VCVTTSD2USI64Srr_Int = 8445, |
| 8459 | VCVTTSD2USI64Srrb_Int = 8446, |
| 8460 | VCVTTSD2USI64Zrm = 8447, |
| 8461 | VCVTTSD2USI64Zrm_Int = 8448, |
| 8462 | VCVTTSD2USI64Zrr = 8449, |
| 8463 | VCVTTSD2USI64Zrr_Int = 8450, |
| 8464 | VCVTTSD2USI64Zrrb_Int = 8451, |
| 8465 | VCVTTSD2USISrm = 8452, |
| 8466 | VCVTTSD2USISrm_Int = 8453, |
| 8467 | VCVTTSD2USISrr = 8454, |
| 8468 | VCVTTSD2USISrr_Int = 8455, |
| 8469 | VCVTTSD2USISrrb_Int = 8456, |
| 8470 | VCVTTSD2USIZrm = 8457, |
| 8471 | VCVTTSD2USIZrm_Int = 8458, |
| 8472 | VCVTTSD2USIZrr = 8459, |
| 8473 | VCVTTSD2USIZrr_Int = 8460, |
| 8474 | VCVTTSD2USIZrrb_Int = 8461, |
| 8475 | VCVTTSH2SI64Zrm = 8462, |
| 8476 | VCVTTSH2SI64Zrm_Int = 8463, |
| 8477 | VCVTTSH2SI64Zrr = 8464, |
| 8478 | VCVTTSH2SI64Zrr_Int = 8465, |
| 8479 | VCVTTSH2SI64Zrrb_Int = 8466, |
| 8480 | VCVTTSH2SIZrm = 8467, |
| 8481 | VCVTTSH2SIZrm_Int = 8468, |
| 8482 | VCVTTSH2SIZrr = 8469, |
| 8483 | VCVTTSH2SIZrr_Int = 8470, |
| 8484 | VCVTTSH2SIZrrb_Int = 8471, |
| 8485 | VCVTTSH2USI64Zrm = 8472, |
| 8486 | VCVTTSH2USI64Zrm_Int = 8473, |
| 8487 | VCVTTSH2USI64Zrr = 8474, |
| 8488 | VCVTTSH2USI64Zrr_Int = 8475, |
| 8489 | VCVTTSH2USI64Zrrb_Int = 8476, |
| 8490 | VCVTTSH2USIZrm = 8477, |
| 8491 | VCVTTSH2USIZrm_Int = 8478, |
| 8492 | VCVTTSH2USIZrr = 8479, |
| 8493 | VCVTTSH2USIZrr_Int = 8480, |
| 8494 | VCVTTSH2USIZrrb_Int = 8481, |
| 8495 | VCVTTSS2SI64Srm = 8482, |
| 8496 | VCVTTSS2SI64Srm_Int = 8483, |
| 8497 | VCVTTSS2SI64Srr = 8484, |
| 8498 | VCVTTSS2SI64Srr_Int = 8485, |
| 8499 | VCVTTSS2SI64Srrb_Int = 8486, |
| 8500 | VCVTTSS2SI64Zrm = 8487, |
| 8501 | VCVTTSS2SI64Zrm_Int = 8488, |
| 8502 | VCVTTSS2SI64Zrr = 8489, |
| 8503 | VCVTTSS2SI64Zrr_Int = 8490, |
| 8504 | VCVTTSS2SI64Zrrb_Int = 8491, |
| 8505 | VCVTTSS2SI64rm = 8492, |
| 8506 | VCVTTSS2SI64rm_Int = 8493, |
| 8507 | VCVTTSS2SI64rr = 8494, |
| 8508 | VCVTTSS2SI64rr_Int = 8495, |
| 8509 | VCVTTSS2SISrm = 8496, |
| 8510 | VCVTTSS2SISrm_Int = 8497, |
| 8511 | VCVTTSS2SISrr = 8498, |
| 8512 | VCVTTSS2SISrr_Int = 8499, |
| 8513 | VCVTTSS2SISrrb_Int = 8500, |
| 8514 | VCVTTSS2SIZrm = 8501, |
| 8515 | VCVTTSS2SIZrm_Int = 8502, |
| 8516 | VCVTTSS2SIZrr = 8503, |
| 8517 | VCVTTSS2SIZrr_Int = 8504, |
| 8518 | VCVTTSS2SIZrrb_Int = 8505, |
| 8519 | VCVTTSS2SIrm = 8506, |
| 8520 | VCVTTSS2SIrm_Int = 8507, |
| 8521 | VCVTTSS2SIrr = 8508, |
| 8522 | VCVTTSS2SIrr_Int = 8509, |
| 8523 | VCVTTSS2USI64Srm = 8510, |
| 8524 | VCVTTSS2USI64Srm_Int = 8511, |
| 8525 | VCVTTSS2USI64Srr = 8512, |
| 8526 | VCVTTSS2USI64Srr_Int = 8513, |
| 8527 | VCVTTSS2USI64Srrb_Int = 8514, |
| 8528 | VCVTTSS2USI64Zrm = 8515, |
| 8529 | VCVTTSS2USI64Zrm_Int = 8516, |
| 8530 | VCVTTSS2USI64Zrr = 8517, |
| 8531 | VCVTTSS2USI64Zrr_Int = 8518, |
| 8532 | VCVTTSS2USI64Zrrb_Int = 8519, |
| 8533 | VCVTTSS2USISrm = 8520, |
| 8534 | VCVTTSS2USISrm_Int = 8521, |
| 8535 | VCVTTSS2USISrr = 8522, |
| 8536 | VCVTTSS2USISrr_Int = 8523, |
| 8537 | VCVTTSS2USISrrb_Int = 8524, |
| 8538 | VCVTTSS2USIZrm = 8525, |
| 8539 | VCVTTSS2USIZrm_Int = 8526, |
| 8540 | VCVTTSS2USIZrr = 8527, |
| 8541 | VCVTTSS2USIZrr_Int = 8528, |
| 8542 | VCVTTSS2USIZrrb_Int = 8529, |
| 8543 | VCVTUDQ2PDZ128rm = 8530, |
| 8544 | VCVTUDQ2PDZ128rmb = 8531, |
| 8545 | VCVTUDQ2PDZ128rmbk = 8532, |
| 8546 | VCVTUDQ2PDZ128rmbkz = 8533, |
| 8547 | VCVTUDQ2PDZ128rmk = 8534, |
| 8548 | VCVTUDQ2PDZ128rmkz = 8535, |
| 8549 | VCVTUDQ2PDZ128rr = 8536, |
| 8550 | VCVTUDQ2PDZ128rrk = 8537, |
| 8551 | VCVTUDQ2PDZ128rrkz = 8538, |
| 8552 | VCVTUDQ2PDZ256rm = 8539, |
| 8553 | VCVTUDQ2PDZ256rmb = 8540, |
| 8554 | VCVTUDQ2PDZ256rmbk = 8541, |
| 8555 | VCVTUDQ2PDZ256rmbkz = 8542, |
| 8556 | VCVTUDQ2PDZ256rmk = 8543, |
| 8557 | VCVTUDQ2PDZ256rmkz = 8544, |
| 8558 | VCVTUDQ2PDZ256rr = 8545, |
| 8559 | VCVTUDQ2PDZ256rrk = 8546, |
| 8560 | VCVTUDQ2PDZ256rrkz = 8547, |
| 8561 | VCVTUDQ2PDZrm = 8548, |
| 8562 | VCVTUDQ2PDZrmb = 8549, |
| 8563 | VCVTUDQ2PDZrmbk = 8550, |
| 8564 | VCVTUDQ2PDZrmbkz = 8551, |
| 8565 | VCVTUDQ2PDZrmk = 8552, |
| 8566 | VCVTUDQ2PDZrmkz = 8553, |
| 8567 | VCVTUDQ2PDZrr = 8554, |
| 8568 | VCVTUDQ2PDZrrk = 8555, |
| 8569 | VCVTUDQ2PDZrrkz = 8556, |
| 8570 | VCVTUDQ2PHZ128rm = 8557, |
| 8571 | VCVTUDQ2PHZ128rmb = 8558, |
| 8572 | VCVTUDQ2PHZ128rmbk = 8559, |
| 8573 | VCVTUDQ2PHZ128rmbkz = 8560, |
| 8574 | VCVTUDQ2PHZ128rmk = 8561, |
| 8575 | VCVTUDQ2PHZ128rmkz = 8562, |
| 8576 | VCVTUDQ2PHZ128rr = 8563, |
| 8577 | VCVTUDQ2PHZ128rrk = 8564, |
| 8578 | VCVTUDQ2PHZ128rrkz = 8565, |
| 8579 | VCVTUDQ2PHZ256rm = 8566, |
| 8580 | VCVTUDQ2PHZ256rmb = 8567, |
| 8581 | VCVTUDQ2PHZ256rmbk = 8568, |
| 8582 | VCVTUDQ2PHZ256rmbkz = 8569, |
| 8583 | VCVTUDQ2PHZ256rmk = 8570, |
| 8584 | VCVTUDQ2PHZ256rmkz = 8571, |
| 8585 | VCVTUDQ2PHZ256rr = 8572, |
| 8586 | VCVTUDQ2PHZ256rrk = 8573, |
| 8587 | VCVTUDQ2PHZ256rrkz = 8574, |
| 8588 | VCVTUDQ2PHZrm = 8575, |
| 8589 | VCVTUDQ2PHZrmb = 8576, |
| 8590 | VCVTUDQ2PHZrmbk = 8577, |
| 8591 | VCVTUDQ2PHZrmbkz = 8578, |
| 8592 | VCVTUDQ2PHZrmk = 8579, |
| 8593 | VCVTUDQ2PHZrmkz = 8580, |
| 8594 | VCVTUDQ2PHZrr = 8581, |
| 8595 | VCVTUDQ2PHZrrb = 8582, |
| 8596 | VCVTUDQ2PHZrrbk = 8583, |
| 8597 | VCVTUDQ2PHZrrbkz = 8584, |
| 8598 | VCVTUDQ2PHZrrk = 8585, |
| 8599 | VCVTUDQ2PHZrrkz = 8586, |
| 8600 | VCVTUDQ2PSZ128rm = 8587, |
| 8601 | VCVTUDQ2PSZ128rmb = 8588, |
| 8602 | VCVTUDQ2PSZ128rmbk = 8589, |
| 8603 | VCVTUDQ2PSZ128rmbkz = 8590, |
| 8604 | VCVTUDQ2PSZ128rmk = 8591, |
| 8605 | VCVTUDQ2PSZ128rmkz = 8592, |
| 8606 | VCVTUDQ2PSZ128rr = 8593, |
| 8607 | VCVTUDQ2PSZ128rrk = 8594, |
| 8608 | VCVTUDQ2PSZ128rrkz = 8595, |
| 8609 | VCVTUDQ2PSZ256rm = 8596, |
| 8610 | VCVTUDQ2PSZ256rmb = 8597, |
| 8611 | VCVTUDQ2PSZ256rmbk = 8598, |
| 8612 | VCVTUDQ2PSZ256rmbkz = 8599, |
| 8613 | VCVTUDQ2PSZ256rmk = 8600, |
| 8614 | VCVTUDQ2PSZ256rmkz = 8601, |
| 8615 | VCVTUDQ2PSZ256rr = 8602, |
| 8616 | VCVTUDQ2PSZ256rrk = 8603, |
| 8617 | VCVTUDQ2PSZ256rrkz = 8604, |
| 8618 | VCVTUDQ2PSZrm = 8605, |
| 8619 | VCVTUDQ2PSZrmb = 8606, |
| 8620 | VCVTUDQ2PSZrmbk = 8607, |
| 8621 | VCVTUDQ2PSZrmbkz = 8608, |
| 8622 | VCVTUDQ2PSZrmk = 8609, |
| 8623 | VCVTUDQ2PSZrmkz = 8610, |
| 8624 | VCVTUDQ2PSZrr = 8611, |
| 8625 | VCVTUDQ2PSZrrb = 8612, |
| 8626 | VCVTUDQ2PSZrrbk = 8613, |
| 8627 | VCVTUDQ2PSZrrbkz = 8614, |
| 8628 | VCVTUDQ2PSZrrk = 8615, |
| 8629 | VCVTUDQ2PSZrrkz = 8616, |
| 8630 | VCVTUQQ2PDZ128rm = 8617, |
| 8631 | VCVTUQQ2PDZ128rmb = 8618, |
| 8632 | VCVTUQQ2PDZ128rmbk = 8619, |
| 8633 | VCVTUQQ2PDZ128rmbkz = 8620, |
| 8634 | VCVTUQQ2PDZ128rmk = 8621, |
| 8635 | VCVTUQQ2PDZ128rmkz = 8622, |
| 8636 | VCVTUQQ2PDZ128rr = 8623, |
| 8637 | VCVTUQQ2PDZ128rrk = 8624, |
| 8638 | VCVTUQQ2PDZ128rrkz = 8625, |
| 8639 | VCVTUQQ2PDZ256rm = 8626, |
| 8640 | VCVTUQQ2PDZ256rmb = 8627, |
| 8641 | VCVTUQQ2PDZ256rmbk = 8628, |
| 8642 | VCVTUQQ2PDZ256rmbkz = 8629, |
| 8643 | VCVTUQQ2PDZ256rmk = 8630, |
| 8644 | VCVTUQQ2PDZ256rmkz = 8631, |
| 8645 | VCVTUQQ2PDZ256rr = 8632, |
| 8646 | VCVTUQQ2PDZ256rrk = 8633, |
| 8647 | VCVTUQQ2PDZ256rrkz = 8634, |
| 8648 | VCVTUQQ2PDZrm = 8635, |
| 8649 | VCVTUQQ2PDZrmb = 8636, |
| 8650 | VCVTUQQ2PDZrmbk = 8637, |
| 8651 | VCVTUQQ2PDZrmbkz = 8638, |
| 8652 | VCVTUQQ2PDZrmk = 8639, |
| 8653 | VCVTUQQ2PDZrmkz = 8640, |
| 8654 | VCVTUQQ2PDZrr = 8641, |
| 8655 | VCVTUQQ2PDZrrb = 8642, |
| 8656 | VCVTUQQ2PDZrrbk = 8643, |
| 8657 | VCVTUQQ2PDZrrbkz = 8644, |
| 8658 | VCVTUQQ2PDZrrk = 8645, |
| 8659 | VCVTUQQ2PDZrrkz = 8646, |
| 8660 | VCVTUQQ2PHZ128rm = 8647, |
| 8661 | VCVTUQQ2PHZ128rmb = 8648, |
| 8662 | VCVTUQQ2PHZ128rmbk = 8649, |
| 8663 | VCVTUQQ2PHZ128rmbkz = 8650, |
| 8664 | VCVTUQQ2PHZ128rmk = 8651, |
| 8665 | VCVTUQQ2PHZ128rmkz = 8652, |
| 8666 | VCVTUQQ2PHZ128rr = 8653, |
| 8667 | VCVTUQQ2PHZ128rrk = 8654, |
| 8668 | VCVTUQQ2PHZ128rrkz = 8655, |
| 8669 | VCVTUQQ2PHZ256rm = 8656, |
| 8670 | VCVTUQQ2PHZ256rmb = 8657, |
| 8671 | VCVTUQQ2PHZ256rmbk = 8658, |
| 8672 | VCVTUQQ2PHZ256rmbkz = 8659, |
| 8673 | VCVTUQQ2PHZ256rmk = 8660, |
| 8674 | VCVTUQQ2PHZ256rmkz = 8661, |
| 8675 | VCVTUQQ2PHZ256rr = 8662, |
| 8676 | VCVTUQQ2PHZ256rrk = 8663, |
| 8677 | VCVTUQQ2PHZ256rrkz = 8664, |
| 8678 | VCVTUQQ2PHZrm = 8665, |
| 8679 | VCVTUQQ2PHZrmb = 8666, |
| 8680 | VCVTUQQ2PHZrmbk = 8667, |
| 8681 | VCVTUQQ2PHZrmbkz = 8668, |
| 8682 | VCVTUQQ2PHZrmk = 8669, |
| 8683 | VCVTUQQ2PHZrmkz = 8670, |
| 8684 | VCVTUQQ2PHZrr = 8671, |
| 8685 | VCVTUQQ2PHZrrb = 8672, |
| 8686 | VCVTUQQ2PHZrrbk = 8673, |
| 8687 | VCVTUQQ2PHZrrbkz = 8674, |
| 8688 | VCVTUQQ2PHZrrk = 8675, |
| 8689 | VCVTUQQ2PHZrrkz = 8676, |
| 8690 | VCVTUQQ2PSZ128rm = 8677, |
| 8691 | VCVTUQQ2PSZ128rmb = 8678, |
| 8692 | VCVTUQQ2PSZ128rmbk = 8679, |
| 8693 | VCVTUQQ2PSZ128rmbkz = 8680, |
| 8694 | VCVTUQQ2PSZ128rmk = 8681, |
| 8695 | VCVTUQQ2PSZ128rmkz = 8682, |
| 8696 | VCVTUQQ2PSZ128rr = 8683, |
| 8697 | VCVTUQQ2PSZ128rrk = 8684, |
| 8698 | VCVTUQQ2PSZ128rrkz = 8685, |
| 8699 | VCVTUQQ2PSZ256rm = 8686, |
| 8700 | VCVTUQQ2PSZ256rmb = 8687, |
| 8701 | VCVTUQQ2PSZ256rmbk = 8688, |
| 8702 | VCVTUQQ2PSZ256rmbkz = 8689, |
| 8703 | VCVTUQQ2PSZ256rmk = 8690, |
| 8704 | VCVTUQQ2PSZ256rmkz = 8691, |
| 8705 | VCVTUQQ2PSZ256rr = 8692, |
| 8706 | VCVTUQQ2PSZ256rrk = 8693, |
| 8707 | VCVTUQQ2PSZ256rrkz = 8694, |
| 8708 | VCVTUQQ2PSZrm = 8695, |
| 8709 | VCVTUQQ2PSZrmb = 8696, |
| 8710 | VCVTUQQ2PSZrmbk = 8697, |
| 8711 | VCVTUQQ2PSZrmbkz = 8698, |
| 8712 | VCVTUQQ2PSZrmk = 8699, |
| 8713 | VCVTUQQ2PSZrmkz = 8700, |
| 8714 | VCVTUQQ2PSZrr = 8701, |
| 8715 | VCVTUQQ2PSZrrb = 8702, |
| 8716 | VCVTUQQ2PSZrrbk = 8703, |
| 8717 | VCVTUQQ2PSZrrbkz = 8704, |
| 8718 | VCVTUQQ2PSZrrk = 8705, |
| 8719 | VCVTUQQ2PSZrrkz = 8706, |
| 8720 | VCVTUSI2SDZrm = 8707, |
| 8721 | VCVTUSI2SDZrm_Int = 8708, |
| 8722 | VCVTUSI2SDZrr = 8709, |
| 8723 | VCVTUSI2SDZrr_Int = 8710, |
| 8724 | VCVTUSI2SHZrm = 8711, |
| 8725 | VCVTUSI2SHZrm_Int = 8712, |
| 8726 | VCVTUSI2SHZrr = 8713, |
| 8727 | VCVTUSI2SHZrr_Int = 8714, |
| 8728 | VCVTUSI2SHZrrb_Int = 8715, |
| 8729 | VCVTUSI2SSZrm = 8716, |
| 8730 | VCVTUSI2SSZrm_Int = 8717, |
| 8731 | VCVTUSI2SSZrr = 8718, |
| 8732 | VCVTUSI2SSZrr_Int = 8719, |
| 8733 | VCVTUSI2SSZrrb_Int = 8720, |
| 8734 | VCVTUSI642SDZrm = 8721, |
| 8735 | VCVTUSI642SDZrm_Int = 8722, |
| 8736 | VCVTUSI642SDZrr = 8723, |
| 8737 | VCVTUSI642SDZrr_Int = 8724, |
| 8738 | VCVTUSI642SDZrrb_Int = 8725, |
| 8739 | VCVTUSI642SHZrm = 8726, |
| 8740 | VCVTUSI642SHZrm_Int = 8727, |
| 8741 | VCVTUSI642SHZrr = 8728, |
| 8742 | VCVTUSI642SHZrr_Int = 8729, |
| 8743 | VCVTUSI642SHZrrb_Int = 8730, |
| 8744 | VCVTUSI642SSZrm = 8731, |
| 8745 | VCVTUSI642SSZrm_Int = 8732, |
| 8746 | VCVTUSI642SSZrr = 8733, |
| 8747 | VCVTUSI642SSZrr_Int = 8734, |
| 8748 | VCVTUSI642SSZrrb_Int = 8735, |
| 8749 | VCVTUW2PHZ128rm = 8736, |
| 8750 | VCVTUW2PHZ128rmb = 8737, |
| 8751 | VCVTUW2PHZ128rmbk = 8738, |
| 8752 | VCVTUW2PHZ128rmbkz = 8739, |
| 8753 | VCVTUW2PHZ128rmk = 8740, |
| 8754 | VCVTUW2PHZ128rmkz = 8741, |
| 8755 | VCVTUW2PHZ128rr = 8742, |
| 8756 | VCVTUW2PHZ128rrk = 8743, |
| 8757 | VCVTUW2PHZ128rrkz = 8744, |
| 8758 | VCVTUW2PHZ256rm = 8745, |
| 8759 | VCVTUW2PHZ256rmb = 8746, |
| 8760 | VCVTUW2PHZ256rmbk = 8747, |
| 8761 | VCVTUW2PHZ256rmbkz = 8748, |
| 8762 | VCVTUW2PHZ256rmk = 8749, |
| 8763 | VCVTUW2PHZ256rmkz = 8750, |
| 8764 | VCVTUW2PHZ256rr = 8751, |
| 8765 | VCVTUW2PHZ256rrk = 8752, |
| 8766 | VCVTUW2PHZ256rrkz = 8753, |
| 8767 | VCVTUW2PHZrm = 8754, |
| 8768 | VCVTUW2PHZrmb = 8755, |
| 8769 | VCVTUW2PHZrmbk = 8756, |
| 8770 | VCVTUW2PHZrmbkz = 8757, |
| 8771 | VCVTUW2PHZrmk = 8758, |
| 8772 | VCVTUW2PHZrmkz = 8759, |
| 8773 | VCVTUW2PHZrr = 8760, |
| 8774 | VCVTUW2PHZrrb = 8761, |
| 8775 | VCVTUW2PHZrrbk = 8762, |
| 8776 | VCVTUW2PHZrrbkz = 8763, |
| 8777 | VCVTUW2PHZrrk = 8764, |
| 8778 | VCVTUW2PHZrrkz = 8765, |
| 8779 | VCVTW2PHZ128rm = 8766, |
| 8780 | VCVTW2PHZ128rmb = 8767, |
| 8781 | VCVTW2PHZ128rmbk = 8768, |
| 8782 | VCVTW2PHZ128rmbkz = 8769, |
| 8783 | VCVTW2PHZ128rmk = 8770, |
| 8784 | VCVTW2PHZ128rmkz = 8771, |
| 8785 | VCVTW2PHZ128rr = 8772, |
| 8786 | VCVTW2PHZ128rrk = 8773, |
| 8787 | VCVTW2PHZ128rrkz = 8774, |
| 8788 | VCVTW2PHZ256rm = 8775, |
| 8789 | VCVTW2PHZ256rmb = 8776, |
| 8790 | VCVTW2PHZ256rmbk = 8777, |
| 8791 | VCVTW2PHZ256rmbkz = 8778, |
| 8792 | VCVTW2PHZ256rmk = 8779, |
| 8793 | VCVTW2PHZ256rmkz = 8780, |
| 8794 | VCVTW2PHZ256rr = 8781, |
| 8795 | VCVTW2PHZ256rrk = 8782, |
| 8796 | VCVTW2PHZ256rrkz = 8783, |
| 8797 | VCVTW2PHZrm = 8784, |
| 8798 | VCVTW2PHZrmb = 8785, |
| 8799 | VCVTW2PHZrmbk = 8786, |
| 8800 | VCVTW2PHZrmbkz = 8787, |
| 8801 | VCVTW2PHZrmk = 8788, |
| 8802 | VCVTW2PHZrmkz = 8789, |
| 8803 | VCVTW2PHZrr = 8790, |
| 8804 | VCVTW2PHZrrb = 8791, |
| 8805 | VCVTW2PHZrrbk = 8792, |
| 8806 | VCVTW2PHZrrbkz = 8793, |
| 8807 | VCVTW2PHZrrk = 8794, |
| 8808 | VCVTW2PHZrrkz = 8795, |
| 8809 | VDBPSADBWZ128rmi = 8796, |
| 8810 | VDBPSADBWZ128rmik = 8797, |
| 8811 | VDBPSADBWZ128rmikz = 8798, |
| 8812 | VDBPSADBWZ128rri = 8799, |
| 8813 | VDBPSADBWZ128rrik = 8800, |
| 8814 | VDBPSADBWZ128rrikz = 8801, |
| 8815 | VDBPSADBWZ256rmi = 8802, |
| 8816 | VDBPSADBWZ256rmik = 8803, |
| 8817 | VDBPSADBWZ256rmikz = 8804, |
| 8818 | VDBPSADBWZ256rri = 8805, |
| 8819 | VDBPSADBWZ256rrik = 8806, |
| 8820 | VDBPSADBWZ256rrikz = 8807, |
| 8821 | VDBPSADBWZrmi = 8808, |
| 8822 | VDBPSADBWZrmik = 8809, |
| 8823 | VDBPSADBWZrmikz = 8810, |
| 8824 | VDBPSADBWZrri = 8811, |
| 8825 | VDBPSADBWZrrik = 8812, |
| 8826 | VDBPSADBWZrrikz = 8813, |
| 8827 | VDIVBF16Z128rm = 8814, |
| 8828 | VDIVBF16Z128rmb = 8815, |
| 8829 | VDIVBF16Z128rmbk = 8816, |
| 8830 | VDIVBF16Z128rmbkz = 8817, |
| 8831 | VDIVBF16Z128rmk = 8818, |
| 8832 | VDIVBF16Z128rmkz = 8819, |
| 8833 | VDIVBF16Z128rr = 8820, |
| 8834 | VDIVBF16Z128rrk = 8821, |
| 8835 | VDIVBF16Z128rrkz = 8822, |
| 8836 | VDIVBF16Z256rm = 8823, |
| 8837 | VDIVBF16Z256rmb = 8824, |
| 8838 | VDIVBF16Z256rmbk = 8825, |
| 8839 | VDIVBF16Z256rmbkz = 8826, |
| 8840 | VDIVBF16Z256rmk = 8827, |
| 8841 | VDIVBF16Z256rmkz = 8828, |
| 8842 | VDIVBF16Z256rr = 8829, |
| 8843 | VDIVBF16Z256rrk = 8830, |
| 8844 | VDIVBF16Z256rrkz = 8831, |
| 8845 | VDIVBF16Zrm = 8832, |
| 8846 | VDIVBF16Zrmb = 8833, |
| 8847 | VDIVBF16Zrmbk = 8834, |
| 8848 | VDIVBF16Zrmbkz = 8835, |
| 8849 | VDIVBF16Zrmk = 8836, |
| 8850 | VDIVBF16Zrmkz = 8837, |
| 8851 | VDIVBF16Zrr = 8838, |
| 8852 | VDIVBF16Zrrk = 8839, |
| 8853 | VDIVBF16Zrrkz = 8840, |
| 8854 | VDIVPDYrm = 8841, |
| 8855 | VDIVPDYrr = 8842, |
| 8856 | VDIVPDZ128rm = 8843, |
| 8857 | VDIVPDZ128rmb = 8844, |
| 8858 | VDIVPDZ128rmbk = 8845, |
| 8859 | VDIVPDZ128rmbkz = 8846, |
| 8860 | VDIVPDZ128rmk = 8847, |
| 8861 | VDIVPDZ128rmkz = 8848, |
| 8862 | VDIVPDZ128rr = 8849, |
| 8863 | VDIVPDZ128rrk = 8850, |
| 8864 | VDIVPDZ128rrkz = 8851, |
| 8865 | VDIVPDZ256rm = 8852, |
| 8866 | VDIVPDZ256rmb = 8853, |
| 8867 | VDIVPDZ256rmbk = 8854, |
| 8868 | VDIVPDZ256rmbkz = 8855, |
| 8869 | VDIVPDZ256rmk = 8856, |
| 8870 | VDIVPDZ256rmkz = 8857, |
| 8871 | VDIVPDZ256rr = 8858, |
| 8872 | VDIVPDZ256rrk = 8859, |
| 8873 | VDIVPDZ256rrkz = 8860, |
| 8874 | VDIVPDZrm = 8861, |
| 8875 | VDIVPDZrmb = 8862, |
| 8876 | VDIVPDZrmbk = 8863, |
| 8877 | VDIVPDZrmbkz = 8864, |
| 8878 | VDIVPDZrmk = 8865, |
| 8879 | VDIVPDZrmkz = 8866, |
| 8880 | VDIVPDZrr = 8867, |
| 8881 | VDIVPDZrrb = 8868, |
| 8882 | VDIVPDZrrbk = 8869, |
| 8883 | VDIVPDZrrbkz = 8870, |
| 8884 | VDIVPDZrrk = 8871, |
| 8885 | VDIVPDZrrkz = 8872, |
| 8886 | VDIVPDrm = 8873, |
| 8887 | VDIVPDrr = 8874, |
| 8888 | VDIVPHZ128rm = 8875, |
| 8889 | VDIVPHZ128rmb = 8876, |
| 8890 | VDIVPHZ128rmbk = 8877, |
| 8891 | VDIVPHZ128rmbkz = 8878, |
| 8892 | VDIVPHZ128rmk = 8879, |
| 8893 | VDIVPHZ128rmkz = 8880, |
| 8894 | VDIVPHZ128rr = 8881, |
| 8895 | VDIVPHZ128rrk = 8882, |
| 8896 | VDIVPHZ128rrkz = 8883, |
| 8897 | VDIVPHZ256rm = 8884, |
| 8898 | VDIVPHZ256rmb = 8885, |
| 8899 | VDIVPHZ256rmbk = 8886, |
| 8900 | VDIVPHZ256rmbkz = 8887, |
| 8901 | VDIVPHZ256rmk = 8888, |
| 8902 | VDIVPHZ256rmkz = 8889, |
| 8903 | VDIVPHZ256rr = 8890, |
| 8904 | VDIVPHZ256rrk = 8891, |
| 8905 | VDIVPHZ256rrkz = 8892, |
| 8906 | VDIVPHZrm = 8893, |
| 8907 | VDIVPHZrmb = 8894, |
| 8908 | VDIVPHZrmbk = 8895, |
| 8909 | VDIVPHZrmbkz = 8896, |
| 8910 | VDIVPHZrmk = 8897, |
| 8911 | VDIVPHZrmkz = 8898, |
| 8912 | VDIVPHZrr = 8899, |
| 8913 | VDIVPHZrrb = 8900, |
| 8914 | VDIVPHZrrbk = 8901, |
| 8915 | VDIVPHZrrbkz = 8902, |
| 8916 | VDIVPHZrrk = 8903, |
| 8917 | VDIVPHZrrkz = 8904, |
| 8918 | VDIVPSYrm = 8905, |
| 8919 | VDIVPSYrr = 8906, |
| 8920 | VDIVPSZ128rm = 8907, |
| 8921 | VDIVPSZ128rmb = 8908, |
| 8922 | VDIVPSZ128rmbk = 8909, |
| 8923 | VDIVPSZ128rmbkz = 8910, |
| 8924 | VDIVPSZ128rmk = 8911, |
| 8925 | VDIVPSZ128rmkz = 8912, |
| 8926 | VDIVPSZ128rr = 8913, |
| 8927 | VDIVPSZ128rrk = 8914, |
| 8928 | VDIVPSZ128rrkz = 8915, |
| 8929 | VDIVPSZ256rm = 8916, |
| 8930 | VDIVPSZ256rmb = 8917, |
| 8931 | VDIVPSZ256rmbk = 8918, |
| 8932 | VDIVPSZ256rmbkz = 8919, |
| 8933 | VDIVPSZ256rmk = 8920, |
| 8934 | VDIVPSZ256rmkz = 8921, |
| 8935 | VDIVPSZ256rr = 8922, |
| 8936 | VDIVPSZ256rrk = 8923, |
| 8937 | VDIVPSZ256rrkz = 8924, |
| 8938 | VDIVPSZrm = 8925, |
| 8939 | VDIVPSZrmb = 8926, |
| 8940 | VDIVPSZrmbk = 8927, |
| 8941 | VDIVPSZrmbkz = 8928, |
| 8942 | VDIVPSZrmk = 8929, |
| 8943 | VDIVPSZrmkz = 8930, |
| 8944 | VDIVPSZrr = 8931, |
| 8945 | VDIVPSZrrb = 8932, |
| 8946 | VDIVPSZrrbk = 8933, |
| 8947 | VDIVPSZrrbkz = 8934, |
| 8948 | VDIVPSZrrk = 8935, |
| 8949 | VDIVPSZrrkz = 8936, |
| 8950 | VDIVPSrm = 8937, |
| 8951 | VDIVPSrr = 8938, |
| 8952 | VDIVSDZrm = 8939, |
| 8953 | VDIVSDZrm_Int = 8940, |
| 8954 | VDIVSDZrmk_Int = 8941, |
| 8955 | VDIVSDZrmkz_Int = 8942, |
| 8956 | VDIVSDZrr = 8943, |
| 8957 | VDIVSDZrr_Int = 8944, |
| 8958 | VDIVSDZrrb_Int = 8945, |
| 8959 | VDIVSDZrrbk_Int = 8946, |
| 8960 | VDIVSDZrrbkz_Int = 8947, |
| 8961 | VDIVSDZrrk_Int = 8948, |
| 8962 | VDIVSDZrrkz_Int = 8949, |
| 8963 | VDIVSDrm = 8950, |
| 8964 | VDIVSDrm_Int = 8951, |
| 8965 | VDIVSDrr = 8952, |
| 8966 | VDIVSDrr_Int = 8953, |
| 8967 | VDIVSHZrm = 8954, |
| 8968 | VDIVSHZrm_Int = 8955, |
| 8969 | VDIVSHZrmk_Int = 8956, |
| 8970 | VDIVSHZrmkz_Int = 8957, |
| 8971 | VDIVSHZrr = 8958, |
| 8972 | VDIVSHZrr_Int = 8959, |
| 8973 | VDIVSHZrrb_Int = 8960, |
| 8974 | VDIVSHZrrbk_Int = 8961, |
| 8975 | VDIVSHZrrbkz_Int = 8962, |
| 8976 | VDIVSHZrrk_Int = 8963, |
| 8977 | VDIVSHZrrkz_Int = 8964, |
| 8978 | VDIVSSZrm = 8965, |
| 8979 | VDIVSSZrm_Int = 8966, |
| 8980 | VDIVSSZrmk_Int = 8967, |
| 8981 | VDIVSSZrmkz_Int = 8968, |
| 8982 | VDIVSSZrr = 8969, |
| 8983 | VDIVSSZrr_Int = 8970, |
| 8984 | VDIVSSZrrb_Int = 8971, |
| 8985 | VDIVSSZrrbk_Int = 8972, |
| 8986 | VDIVSSZrrbkz_Int = 8973, |
| 8987 | VDIVSSZrrk_Int = 8974, |
| 8988 | VDIVSSZrrkz_Int = 8975, |
| 8989 | VDIVSSrm = 8976, |
| 8990 | VDIVSSrm_Int = 8977, |
| 8991 | VDIVSSrr = 8978, |
| 8992 | VDIVSSrr_Int = 8979, |
| 8993 | VDPBF16PSZ128m = 8980, |
| 8994 | VDPBF16PSZ128mb = 8981, |
| 8995 | VDPBF16PSZ128mbk = 8982, |
| 8996 | VDPBF16PSZ128mbkz = 8983, |
| 8997 | VDPBF16PSZ128mk = 8984, |
| 8998 | VDPBF16PSZ128mkz = 8985, |
| 8999 | VDPBF16PSZ128r = 8986, |
| 9000 | VDPBF16PSZ128rk = 8987, |
| 9001 | VDPBF16PSZ128rkz = 8988, |
| 9002 | VDPBF16PSZ256m = 8989, |
| 9003 | VDPBF16PSZ256mb = 8990, |
| 9004 | VDPBF16PSZ256mbk = 8991, |
| 9005 | VDPBF16PSZ256mbkz = 8992, |
| 9006 | VDPBF16PSZ256mk = 8993, |
| 9007 | VDPBF16PSZ256mkz = 8994, |
| 9008 | VDPBF16PSZ256r = 8995, |
| 9009 | VDPBF16PSZ256rk = 8996, |
| 9010 | VDPBF16PSZ256rkz = 8997, |
| 9011 | VDPBF16PSZm = 8998, |
| 9012 | VDPBF16PSZmb = 8999, |
| 9013 | VDPBF16PSZmbk = 9000, |
| 9014 | VDPBF16PSZmbkz = 9001, |
| 9015 | VDPBF16PSZmk = 9002, |
| 9016 | VDPBF16PSZmkz = 9003, |
| 9017 | VDPBF16PSZr = 9004, |
| 9018 | VDPBF16PSZrk = 9005, |
| 9019 | VDPBF16PSZrkz = 9006, |
| 9020 | VDPPDrmi = 9007, |
| 9021 | VDPPDrri = 9008, |
| 9022 | VDPPHPSZ128m = 9009, |
| 9023 | VDPPHPSZ128mb = 9010, |
| 9024 | VDPPHPSZ128mbk = 9011, |
| 9025 | VDPPHPSZ128mbkz = 9012, |
| 9026 | VDPPHPSZ128mk = 9013, |
| 9027 | VDPPHPSZ128mkz = 9014, |
| 9028 | VDPPHPSZ128r = 9015, |
| 9029 | VDPPHPSZ128rk = 9016, |
| 9030 | VDPPHPSZ128rkz = 9017, |
| 9031 | VDPPHPSZ256m = 9018, |
| 9032 | VDPPHPSZ256mb = 9019, |
| 9033 | VDPPHPSZ256mbk = 9020, |
| 9034 | VDPPHPSZ256mbkz = 9021, |
| 9035 | VDPPHPSZ256mk = 9022, |
| 9036 | VDPPHPSZ256mkz = 9023, |
| 9037 | VDPPHPSZ256r = 9024, |
| 9038 | VDPPHPSZ256rk = 9025, |
| 9039 | VDPPHPSZ256rkz = 9026, |
| 9040 | VDPPHPSZm = 9027, |
| 9041 | VDPPHPSZmb = 9028, |
| 9042 | VDPPHPSZmbk = 9029, |
| 9043 | VDPPHPSZmbkz = 9030, |
| 9044 | VDPPHPSZmk = 9031, |
| 9045 | VDPPHPSZmkz = 9032, |
| 9046 | VDPPHPSZr = 9033, |
| 9047 | VDPPHPSZrk = 9034, |
| 9048 | VDPPHPSZrkz = 9035, |
| 9049 | VDPPSYrmi = 9036, |
| 9050 | VDPPSYrri = 9037, |
| 9051 | VDPPSrmi = 9038, |
| 9052 | VDPPSrri = 9039, |
| 9053 | VERRm = 9040, |
| 9054 | VERRr = 9041, |
| 9055 | VERWm = 9042, |
| 9056 | VERWr = 9043, |
| 9057 | VEXP2PDZm = 9044, |
| 9058 | VEXP2PDZmb = 9045, |
| 9059 | VEXP2PDZmbk = 9046, |
| 9060 | VEXP2PDZmbkz = 9047, |
| 9061 | VEXP2PDZmk = 9048, |
| 9062 | VEXP2PDZmkz = 9049, |
| 9063 | VEXP2PDZr = 9050, |
| 9064 | VEXP2PDZrb = 9051, |
| 9065 | VEXP2PDZrbk = 9052, |
| 9066 | VEXP2PDZrbkz = 9053, |
| 9067 | VEXP2PDZrk = 9054, |
| 9068 | VEXP2PDZrkz = 9055, |
| 9069 | VEXP2PSZm = 9056, |
| 9070 | VEXP2PSZmb = 9057, |
| 9071 | VEXP2PSZmbk = 9058, |
| 9072 | VEXP2PSZmbkz = 9059, |
| 9073 | VEXP2PSZmk = 9060, |
| 9074 | VEXP2PSZmkz = 9061, |
| 9075 | VEXP2PSZr = 9062, |
| 9076 | VEXP2PSZrb = 9063, |
| 9077 | VEXP2PSZrbk = 9064, |
| 9078 | VEXP2PSZrbkz = 9065, |
| 9079 | VEXP2PSZrk = 9066, |
| 9080 | VEXP2PSZrkz = 9067, |
| 9081 | VEXPANDPDZ128rm = 9068, |
| 9082 | VEXPANDPDZ128rmk = 9069, |
| 9083 | VEXPANDPDZ128rmkz = 9070, |
| 9084 | VEXPANDPDZ128rr = 9071, |
| 9085 | VEXPANDPDZ128rrk = 9072, |
| 9086 | VEXPANDPDZ128rrkz = 9073, |
| 9087 | VEXPANDPDZ256rm = 9074, |
| 9088 | VEXPANDPDZ256rmk = 9075, |
| 9089 | VEXPANDPDZ256rmkz = 9076, |
| 9090 | VEXPANDPDZ256rr = 9077, |
| 9091 | VEXPANDPDZ256rrk = 9078, |
| 9092 | VEXPANDPDZ256rrkz = 9079, |
| 9093 | VEXPANDPDZrm = 9080, |
| 9094 | VEXPANDPDZrmk = 9081, |
| 9095 | VEXPANDPDZrmkz = 9082, |
| 9096 | VEXPANDPDZrr = 9083, |
| 9097 | VEXPANDPDZrrk = 9084, |
| 9098 | VEXPANDPDZrrkz = 9085, |
| 9099 | VEXPANDPSZ128rm = 9086, |
| 9100 | VEXPANDPSZ128rmk = 9087, |
| 9101 | VEXPANDPSZ128rmkz = 9088, |
| 9102 | VEXPANDPSZ128rr = 9089, |
| 9103 | VEXPANDPSZ128rrk = 9090, |
| 9104 | VEXPANDPSZ128rrkz = 9091, |
| 9105 | VEXPANDPSZ256rm = 9092, |
| 9106 | VEXPANDPSZ256rmk = 9093, |
| 9107 | VEXPANDPSZ256rmkz = 9094, |
| 9108 | VEXPANDPSZ256rr = 9095, |
| 9109 | VEXPANDPSZ256rrk = 9096, |
| 9110 | VEXPANDPSZ256rrkz = 9097, |
| 9111 | VEXPANDPSZrm = 9098, |
| 9112 | VEXPANDPSZrmk = 9099, |
| 9113 | VEXPANDPSZrmkz = 9100, |
| 9114 | VEXPANDPSZrr = 9101, |
| 9115 | VEXPANDPSZrrk = 9102, |
| 9116 | VEXPANDPSZrrkz = 9103, |
| 9117 | VEXTRACTF128mri = 9104, |
| 9118 | VEXTRACTF128rri = 9105, |
| 9119 | VEXTRACTF32X4Z256mri = 9106, |
| 9120 | VEXTRACTF32X4Z256mrik = 9107, |
| 9121 | VEXTRACTF32X4Z256rri = 9108, |
| 9122 | VEXTRACTF32X4Z256rrik = 9109, |
| 9123 | VEXTRACTF32X4Z256rrikz = 9110, |
| 9124 | VEXTRACTF32X4Zmri = 9111, |
| 9125 | VEXTRACTF32X4Zmrik = 9112, |
| 9126 | VEXTRACTF32X4Zrri = 9113, |
| 9127 | VEXTRACTF32X4Zrrik = 9114, |
| 9128 | VEXTRACTF32X4Zrrikz = 9115, |
| 9129 | VEXTRACTF32X8Zmri = 9116, |
| 9130 | VEXTRACTF32X8Zmrik = 9117, |
| 9131 | VEXTRACTF32X8Zrri = 9118, |
| 9132 | VEXTRACTF32X8Zrrik = 9119, |
| 9133 | VEXTRACTF32X8Zrrikz = 9120, |
| 9134 | VEXTRACTF64X2Z256mri = 9121, |
| 9135 | VEXTRACTF64X2Z256mrik = 9122, |
| 9136 | VEXTRACTF64X2Z256rri = 9123, |
| 9137 | VEXTRACTF64X2Z256rrik = 9124, |
| 9138 | VEXTRACTF64X2Z256rrikz = 9125, |
| 9139 | VEXTRACTF64X2Zmri = 9126, |
| 9140 | VEXTRACTF64X2Zmrik = 9127, |
| 9141 | VEXTRACTF64X2Zrri = 9128, |
| 9142 | VEXTRACTF64X2Zrrik = 9129, |
| 9143 | VEXTRACTF64X2Zrrikz = 9130, |
| 9144 | VEXTRACTF64X4Zmri = 9131, |
| 9145 | VEXTRACTF64X4Zmrik = 9132, |
| 9146 | VEXTRACTF64X4Zrri = 9133, |
| 9147 | VEXTRACTF64X4Zrrik = 9134, |
| 9148 | VEXTRACTF64X4Zrrikz = 9135, |
| 9149 | VEXTRACTI128mri = 9136, |
| 9150 | VEXTRACTI128rri = 9137, |
| 9151 | VEXTRACTI32X4Z256mri = 9138, |
| 9152 | VEXTRACTI32X4Z256mrik = 9139, |
| 9153 | VEXTRACTI32X4Z256rri = 9140, |
| 9154 | VEXTRACTI32X4Z256rrik = 9141, |
| 9155 | VEXTRACTI32X4Z256rrikz = 9142, |
| 9156 | VEXTRACTI32X4Zmri = 9143, |
| 9157 | VEXTRACTI32X4Zmrik = 9144, |
| 9158 | VEXTRACTI32X4Zrri = 9145, |
| 9159 | VEXTRACTI32X4Zrrik = 9146, |
| 9160 | VEXTRACTI32X4Zrrikz = 9147, |
| 9161 | VEXTRACTI32X8Zmri = 9148, |
| 9162 | VEXTRACTI32X8Zmrik = 9149, |
| 9163 | VEXTRACTI32X8Zrri = 9150, |
| 9164 | VEXTRACTI32X8Zrrik = 9151, |
| 9165 | VEXTRACTI32X8Zrrikz = 9152, |
| 9166 | VEXTRACTI64X2Z256mri = 9153, |
| 9167 | VEXTRACTI64X2Z256mrik = 9154, |
| 9168 | VEXTRACTI64X2Z256rri = 9155, |
| 9169 | VEXTRACTI64X2Z256rrik = 9156, |
| 9170 | VEXTRACTI64X2Z256rrikz = 9157, |
| 9171 | VEXTRACTI64X2Zmri = 9158, |
| 9172 | VEXTRACTI64X2Zmrik = 9159, |
| 9173 | VEXTRACTI64X2Zrri = 9160, |
| 9174 | VEXTRACTI64X2Zrrik = 9161, |
| 9175 | VEXTRACTI64X2Zrrikz = 9162, |
| 9176 | VEXTRACTI64X4Zmri = 9163, |
| 9177 | VEXTRACTI64X4Zmrik = 9164, |
| 9178 | VEXTRACTI64X4Zrri = 9165, |
| 9179 | VEXTRACTI64X4Zrrik = 9166, |
| 9180 | VEXTRACTI64X4Zrrikz = 9167, |
| 9181 | VEXTRACTPSZmri = 9168, |
| 9182 | VEXTRACTPSZrri = 9169, |
| 9183 | VEXTRACTPSmri = 9170, |
| 9184 | VEXTRACTPSrri = 9171, |
| 9185 | VFCMADDCPHZ128m = 9172, |
| 9186 | VFCMADDCPHZ128mb = 9173, |
| 9187 | VFCMADDCPHZ128mbk = 9174, |
| 9188 | VFCMADDCPHZ128mbkz = 9175, |
| 9189 | VFCMADDCPHZ128mk = 9176, |
| 9190 | VFCMADDCPHZ128mkz = 9177, |
| 9191 | VFCMADDCPHZ128r = 9178, |
| 9192 | VFCMADDCPHZ128rk = 9179, |
| 9193 | VFCMADDCPHZ128rkz = 9180, |
| 9194 | VFCMADDCPHZ256m = 9181, |
| 9195 | VFCMADDCPHZ256mb = 9182, |
| 9196 | VFCMADDCPHZ256mbk = 9183, |
| 9197 | VFCMADDCPHZ256mbkz = 9184, |
| 9198 | VFCMADDCPHZ256mk = 9185, |
| 9199 | VFCMADDCPHZ256mkz = 9186, |
| 9200 | VFCMADDCPHZ256r = 9187, |
| 9201 | VFCMADDCPHZ256rk = 9188, |
| 9202 | VFCMADDCPHZ256rkz = 9189, |
| 9203 | VFCMADDCPHZm = 9190, |
| 9204 | VFCMADDCPHZmb = 9191, |
| 9205 | VFCMADDCPHZmbk = 9192, |
| 9206 | VFCMADDCPHZmbkz = 9193, |
| 9207 | VFCMADDCPHZmk = 9194, |
| 9208 | VFCMADDCPHZmkz = 9195, |
| 9209 | VFCMADDCPHZr = 9196, |
| 9210 | VFCMADDCPHZrb = 9197, |
| 9211 | VFCMADDCPHZrbk = 9198, |
| 9212 | VFCMADDCPHZrbkz = 9199, |
| 9213 | VFCMADDCPHZrk = 9200, |
| 9214 | VFCMADDCPHZrkz = 9201, |
| 9215 | VFCMADDCSHZm = 9202, |
| 9216 | VFCMADDCSHZmk = 9203, |
| 9217 | VFCMADDCSHZmkz = 9204, |
| 9218 | VFCMADDCSHZr = 9205, |
| 9219 | VFCMADDCSHZrb = 9206, |
| 9220 | VFCMADDCSHZrbk = 9207, |
| 9221 | VFCMADDCSHZrbkz = 9208, |
| 9222 | VFCMADDCSHZrk = 9209, |
| 9223 | VFCMADDCSHZrkz = 9210, |
| 9224 | VFCMULCPHZ128rm = 9211, |
| 9225 | VFCMULCPHZ128rmb = 9212, |
| 9226 | VFCMULCPHZ128rmbk = 9213, |
| 9227 | VFCMULCPHZ128rmbkz = 9214, |
| 9228 | VFCMULCPHZ128rmk = 9215, |
| 9229 | VFCMULCPHZ128rmkz = 9216, |
| 9230 | VFCMULCPHZ128rr = 9217, |
| 9231 | VFCMULCPHZ128rrk = 9218, |
| 9232 | VFCMULCPHZ128rrkz = 9219, |
| 9233 | VFCMULCPHZ256rm = 9220, |
| 9234 | VFCMULCPHZ256rmb = 9221, |
| 9235 | VFCMULCPHZ256rmbk = 9222, |
| 9236 | VFCMULCPHZ256rmbkz = 9223, |
| 9237 | VFCMULCPHZ256rmk = 9224, |
| 9238 | VFCMULCPHZ256rmkz = 9225, |
| 9239 | VFCMULCPHZ256rr = 9226, |
| 9240 | VFCMULCPHZ256rrk = 9227, |
| 9241 | VFCMULCPHZ256rrkz = 9228, |
| 9242 | VFCMULCPHZrm = 9229, |
| 9243 | VFCMULCPHZrmb = 9230, |
| 9244 | VFCMULCPHZrmbk = 9231, |
| 9245 | VFCMULCPHZrmbkz = 9232, |
| 9246 | VFCMULCPHZrmk = 9233, |
| 9247 | VFCMULCPHZrmkz = 9234, |
| 9248 | VFCMULCPHZrr = 9235, |
| 9249 | VFCMULCPHZrrb = 9236, |
| 9250 | VFCMULCPHZrrbk = 9237, |
| 9251 | VFCMULCPHZrrbkz = 9238, |
| 9252 | VFCMULCPHZrrk = 9239, |
| 9253 | VFCMULCPHZrrkz = 9240, |
| 9254 | VFCMULCSHZrm = 9241, |
| 9255 | VFCMULCSHZrmk = 9242, |
| 9256 | VFCMULCSHZrmkz = 9243, |
| 9257 | VFCMULCSHZrr = 9244, |
| 9258 | VFCMULCSHZrrb = 9245, |
| 9259 | VFCMULCSHZrrbk = 9246, |
| 9260 | VFCMULCSHZrrbkz = 9247, |
| 9261 | VFCMULCSHZrrk = 9248, |
| 9262 | VFCMULCSHZrrkz = 9249, |
| 9263 | VFIXUPIMMPDZ128rmbi = 9250, |
| 9264 | VFIXUPIMMPDZ128rmbik = 9251, |
| 9265 | VFIXUPIMMPDZ128rmbikz = 9252, |
| 9266 | VFIXUPIMMPDZ128rmi = 9253, |
| 9267 | VFIXUPIMMPDZ128rmik = 9254, |
| 9268 | VFIXUPIMMPDZ128rmikz = 9255, |
| 9269 | VFIXUPIMMPDZ128rri = 9256, |
| 9270 | VFIXUPIMMPDZ128rrik = 9257, |
| 9271 | VFIXUPIMMPDZ128rrikz = 9258, |
| 9272 | VFIXUPIMMPDZ256rmbi = 9259, |
| 9273 | VFIXUPIMMPDZ256rmbik = 9260, |
| 9274 | VFIXUPIMMPDZ256rmbikz = 9261, |
| 9275 | VFIXUPIMMPDZ256rmi = 9262, |
| 9276 | VFIXUPIMMPDZ256rmik = 9263, |
| 9277 | VFIXUPIMMPDZ256rmikz = 9264, |
| 9278 | VFIXUPIMMPDZ256rri = 9265, |
| 9279 | VFIXUPIMMPDZ256rrik = 9266, |
| 9280 | VFIXUPIMMPDZ256rrikz = 9267, |
| 9281 | VFIXUPIMMPDZrmbi = 9268, |
| 9282 | VFIXUPIMMPDZrmbik = 9269, |
| 9283 | VFIXUPIMMPDZrmbikz = 9270, |
| 9284 | VFIXUPIMMPDZrmi = 9271, |
| 9285 | VFIXUPIMMPDZrmik = 9272, |
| 9286 | VFIXUPIMMPDZrmikz = 9273, |
| 9287 | VFIXUPIMMPDZrri = 9274, |
| 9288 | VFIXUPIMMPDZrrib = 9275, |
| 9289 | VFIXUPIMMPDZrribk = 9276, |
| 9290 | VFIXUPIMMPDZrribkz = 9277, |
| 9291 | VFIXUPIMMPDZrrik = 9278, |
| 9292 | VFIXUPIMMPDZrrikz = 9279, |
| 9293 | VFIXUPIMMPSZ128rmbi = 9280, |
| 9294 | VFIXUPIMMPSZ128rmbik = 9281, |
| 9295 | VFIXUPIMMPSZ128rmbikz = 9282, |
| 9296 | VFIXUPIMMPSZ128rmi = 9283, |
| 9297 | VFIXUPIMMPSZ128rmik = 9284, |
| 9298 | VFIXUPIMMPSZ128rmikz = 9285, |
| 9299 | VFIXUPIMMPSZ128rri = 9286, |
| 9300 | VFIXUPIMMPSZ128rrik = 9287, |
| 9301 | VFIXUPIMMPSZ128rrikz = 9288, |
| 9302 | VFIXUPIMMPSZ256rmbi = 9289, |
| 9303 | VFIXUPIMMPSZ256rmbik = 9290, |
| 9304 | VFIXUPIMMPSZ256rmbikz = 9291, |
| 9305 | VFIXUPIMMPSZ256rmi = 9292, |
| 9306 | VFIXUPIMMPSZ256rmik = 9293, |
| 9307 | VFIXUPIMMPSZ256rmikz = 9294, |
| 9308 | VFIXUPIMMPSZ256rri = 9295, |
| 9309 | VFIXUPIMMPSZ256rrik = 9296, |
| 9310 | VFIXUPIMMPSZ256rrikz = 9297, |
| 9311 | VFIXUPIMMPSZrmbi = 9298, |
| 9312 | VFIXUPIMMPSZrmbik = 9299, |
| 9313 | VFIXUPIMMPSZrmbikz = 9300, |
| 9314 | VFIXUPIMMPSZrmi = 9301, |
| 9315 | VFIXUPIMMPSZrmik = 9302, |
| 9316 | VFIXUPIMMPSZrmikz = 9303, |
| 9317 | VFIXUPIMMPSZrri = 9304, |
| 9318 | VFIXUPIMMPSZrrib = 9305, |
| 9319 | VFIXUPIMMPSZrribk = 9306, |
| 9320 | VFIXUPIMMPSZrribkz = 9307, |
| 9321 | VFIXUPIMMPSZrrik = 9308, |
| 9322 | VFIXUPIMMPSZrrikz = 9309, |
| 9323 | VFIXUPIMMSDZrmi = 9310, |
| 9324 | VFIXUPIMMSDZrmik = 9311, |
| 9325 | VFIXUPIMMSDZrmikz = 9312, |
| 9326 | VFIXUPIMMSDZrri = 9313, |
| 9327 | VFIXUPIMMSDZrrib = 9314, |
| 9328 | VFIXUPIMMSDZrribk = 9315, |
| 9329 | VFIXUPIMMSDZrribkz = 9316, |
| 9330 | VFIXUPIMMSDZrrik = 9317, |
| 9331 | VFIXUPIMMSDZrrikz = 9318, |
| 9332 | VFIXUPIMMSSZrmi = 9319, |
| 9333 | VFIXUPIMMSSZrmik = 9320, |
| 9334 | VFIXUPIMMSSZrmikz = 9321, |
| 9335 | VFIXUPIMMSSZrri = 9322, |
| 9336 | VFIXUPIMMSSZrrib = 9323, |
| 9337 | VFIXUPIMMSSZrribk = 9324, |
| 9338 | VFIXUPIMMSSZrribkz = 9325, |
| 9339 | VFIXUPIMMSSZrrik = 9326, |
| 9340 | VFIXUPIMMSSZrrikz = 9327, |
| 9341 | VFMADD132BF16Z128m = 9328, |
| 9342 | VFMADD132BF16Z128mb = 9329, |
| 9343 | VFMADD132BF16Z128mbk = 9330, |
| 9344 | VFMADD132BF16Z128mbkz = 9331, |
| 9345 | VFMADD132BF16Z128mk = 9332, |
| 9346 | VFMADD132BF16Z128mkz = 9333, |
| 9347 | VFMADD132BF16Z128r = 9334, |
| 9348 | VFMADD132BF16Z128rk = 9335, |
| 9349 | VFMADD132BF16Z128rkz = 9336, |
| 9350 | VFMADD132BF16Z256m = 9337, |
| 9351 | VFMADD132BF16Z256mb = 9338, |
| 9352 | VFMADD132BF16Z256mbk = 9339, |
| 9353 | VFMADD132BF16Z256mbkz = 9340, |
| 9354 | VFMADD132BF16Z256mk = 9341, |
| 9355 | VFMADD132BF16Z256mkz = 9342, |
| 9356 | VFMADD132BF16Z256r = 9343, |
| 9357 | VFMADD132BF16Z256rk = 9344, |
| 9358 | VFMADD132BF16Z256rkz = 9345, |
| 9359 | VFMADD132BF16Zm = 9346, |
| 9360 | VFMADD132BF16Zmb = 9347, |
| 9361 | VFMADD132BF16Zmbk = 9348, |
| 9362 | VFMADD132BF16Zmbkz = 9349, |
| 9363 | VFMADD132BF16Zmk = 9350, |
| 9364 | VFMADD132BF16Zmkz = 9351, |
| 9365 | VFMADD132BF16Zr = 9352, |
| 9366 | VFMADD132BF16Zrk = 9353, |
| 9367 | VFMADD132BF16Zrkz = 9354, |
| 9368 | VFMADD132PDYm = 9355, |
| 9369 | VFMADD132PDYr = 9356, |
| 9370 | VFMADD132PDZ128m = 9357, |
| 9371 | VFMADD132PDZ128mb = 9358, |
| 9372 | VFMADD132PDZ128mbk = 9359, |
| 9373 | VFMADD132PDZ128mbkz = 9360, |
| 9374 | VFMADD132PDZ128mk = 9361, |
| 9375 | VFMADD132PDZ128mkz = 9362, |
| 9376 | VFMADD132PDZ128r = 9363, |
| 9377 | VFMADD132PDZ128rk = 9364, |
| 9378 | VFMADD132PDZ128rkz = 9365, |
| 9379 | VFMADD132PDZ256m = 9366, |
| 9380 | VFMADD132PDZ256mb = 9367, |
| 9381 | VFMADD132PDZ256mbk = 9368, |
| 9382 | VFMADD132PDZ256mbkz = 9369, |
| 9383 | VFMADD132PDZ256mk = 9370, |
| 9384 | VFMADD132PDZ256mkz = 9371, |
| 9385 | VFMADD132PDZ256r = 9372, |
| 9386 | VFMADD132PDZ256rk = 9373, |
| 9387 | VFMADD132PDZ256rkz = 9374, |
| 9388 | VFMADD132PDZm = 9375, |
| 9389 | VFMADD132PDZmb = 9376, |
| 9390 | VFMADD132PDZmbk = 9377, |
| 9391 | VFMADD132PDZmbkz = 9378, |
| 9392 | VFMADD132PDZmk = 9379, |
| 9393 | VFMADD132PDZmkz = 9380, |
| 9394 | VFMADD132PDZr = 9381, |
| 9395 | VFMADD132PDZrb = 9382, |
| 9396 | VFMADD132PDZrbk = 9383, |
| 9397 | VFMADD132PDZrbkz = 9384, |
| 9398 | VFMADD132PDZrk = 9385, |
| 9399 | VFMADD132PDZrkz = 9386, |
| 9400 | VFMADD132PDm = 9387, |
| 9401 | VFMADD132PDr = 9388, |
| 9402 | VFMADD132PHZ128m = 9389, |
| 9403 | VFMADD132PHZ128mb = 9390, |
| 9404 | VFMADD132PHZ128mbk = 9391, |
| 9405 | VFMADD132PHZ128mbkz = 9392, |
| 9406 | VFMADD132PHZ128mk = 9393, |
| 9407 | VFMADD132PHZ128mkz = 9394, |
| 9408 | VFMADD132PHZ128r = 9395, |
| 9409 | VFMADD132PHZ128rk = 9396, |
| 9410 | VFMADD132PHZ128rkz = 9397, |
| 9411 | VFMADD132PHZ256m = 9398, |
| 9412 | VFMADD132PHZ256mb = 9399, |
| 9413 | VFMADD132PHZ256mbk = 9400, |
| 9414 | VFMADD132PHZ256mbkz = 9401, |
| 9415 | VFMADD132PHZ256mk = 9402, |
| 9416 | VFMADD132PHZ256mkz = 9403, |
| 9417 | VFMADD132PHZ256r = 9404, |
| 9418 | VFMADD132PHZ256rk = 9405, |
| 9419 | VFMADD132PHZ256rkz = 9406, |
| 9420 | VFMADD132PHZm = 9407, |
| 9421 | VFMADD132PHZmb = 9408, |
| 9422 | VFMADD132PHZmbk = 9409, |
| 9423 | VFMADD132PHZmbkz = 9410, |
| 9424 | VFMADD132PHZmk = 9411, |
| 9425 | VFMADD132PHZmkz = 9412, |
| 9426 | VFMADD132PHZr = 9413, |
| 9427 | VFMADD132PHZrb = 9414, |
| 9428 | VFMADD132PHZrbk = 9415, |
| 9429 | VFMADD132PHZrbkz = 9416, |
| 9430 | VFMADD132PHZrk = 9417, |
| 9431 | VFMADD132PHZrkz = 9418, |
| 9432 | VFMADD132PSYm = 9419, |
| 9433 | VFMADD132PSYr = 9420, |
| 9434 | VFMADD132PSZ128m = 9421, |
| 9435 | VFMADD132PSZ128mb = 9422, |
| 9436 | VFMADD132PSZ128mbk = 9423, |
| 9437 | VFMADD132PSZ128mbkz = 9424, |
| 9438 | VFMADD132PSZ128mk = 9425, |
| 9439 | VFMADD132PSZ128mkz = 9426, |
| 9440 | VFMADD132PSZ128r = 9427, |
| 9441 | VFMADD132PSZ128rk = 9428, |
| 9442 | VFMADD132PSZ128rkz = 9429, |
| 9443 | VFMADD132PSZ256m = 9430, |
| 9444 | VFMADD132PSZ256mb = 9431, |
| 9445 | VFMADD132PSZ256mbk = 9432, |
| 9446 | VFMADD132PSZ256mbkz = 9433, |
| 9447 | VFMADD132PSZ256mk = 9434, |
| 9448 | VFMADD132PSZ256mkz = 9435, |
| 9449 | VFMADD132PSZ256r = 9436, |
| 9450 | VFMADD132PSZ256rk = 9437, |
| 9451 | VFMADD132PSZ256rkz = 9438, |
| 9452 | VFMADD132PSZm = 9439, |
| 9453 | VFMADD132PSZmb = 9440, |
| 9454 | VFMADD132PSZmbk = 9441, |
| 9455 | VFMADD132PSZmbkz = 9442, |
| 9456 | VFMADD132PSZmk = 9443, |
| 9457 | VFMADD132PSZmkz = 9444, |
| 9458 | VFMADD132PSZr = 9445, |
| 9459 | VFMADD132PSZrb = 9446, |
| 9460 | VFMADD132PSZrbk = 9447, |
| 9461 | VFMADD132PSZrbkz = 9448, |
| 9462 | VFMADD132PSZrk = 9449, |
| 9463 | VFMADD132PSZrkz = 9450, |
| 9464 | VFMADD132PSm = 9451, |
| 9465 | VFMADD132PSr = 9452, |
| 9466 | VFMADD132SDZm = 9453, |
| 9467 | VFMADD132SDZm_Int = 9454, |
| 9468 | VFMADD132SDZmk_Int = 9455, |
| 9469 | VFMADD132SDZmkz_Int = 9456, |
| 9470 | VFMADD132SDZr = 9457, |
| 9471 | VFMADD132SDZr_Int = 9458, |
| 9472 | VFMADD132SDZrb = 9459, |
| 9473 | VFMADD132SDZrb_Int = 9460, |
| 9474 | VFMADD132SDZrbk_Int = 9461, |
| 9475 | VFMADD132SDZrbkz_Int = 9462, |
| 9476 | VFMADD132SDZrk_Int = 9463, |
| 9477 | VFMADD132SDZrkz_Int = 9464, |
| 9478 | VFMADD132SDm = 9465, |
| 9479 | VFMADD132SDm_Int = 9466, |
| 9480 | VFMADD132SDr = 9467, |
| 9481 | VFMADD132SDr_Int = 9468, |
| 9482 | VFMADD132SHZm = 9469, |
| 9483 | VFMADD132SHZm_Int = 9470, |
| 9484 | VFMADD132SHZmk_Int = 9471, |
| 9485 | VFMADD132SHZmkz_Int = 9472, |
| 9486 | VFMADD132SHZr = 9473, |
| 9487 | VFMADD132SHZr_Int = 9474, |
| 9488 | VFMADD132SHZrb = 9475, |
| 9489 | VFMADD132SHZrb_Int = 9476, |
| 9490 | VFMADD132SHZrbk_Int = 9477, |
| 9491 | VFMADD132SHZrbkz_Int = 9478, |
| 9492 | VFMADD132SHZrk_Int = 9479, |
| 9493 | VFMADD132SHZrkz_Int = 9480, |
| 9494 | VFMADD132SSZm = 9481, |
| 9495 | VFMADD132SSZm_Int = 9482, |
| 9496 | VFMADD132SSZmk_Int = 9483, |
| 9497 | VFMADD132SSZmkz_Int = 9484, |
| 9498 | VFMADD132SSZr = 9485, |
| 9499 | VFMADD132SSZr_Int = 9486, |
| 9500 | VFMADD132SSZrb = 9487, |
| 9501 | VFMADD132SSZrb_Int = 9488, |
| 9502 | VFMADD132SSZrbk_Int = 9489, |
| 9503 | VFMADD132SSZrbkz_Int = 9490, |
| 9504 | VFMADD132SSZrk_Int = 9491, |
| 9505 | VFMADD132SSZrkz_Int = 9492, |
| 9506 | VFMADD132SSm = 9493, |
| 9507 | VFMADD132SSm_Int = 9494, |
| 9508 | VFMADD132SSr = 9495, |
| 9509 | VFMADD132SSr_Int = 9496, |
| 9510 | VFMADD213BF16Z128m = 9497, |
| 9511 | VFMADD213BF16Z128mb = 9498, |
| 9512 | VFMADD213BF16Z128mbk = 9499, |
| 9513 | VFMADD213BF16Z128mbkz = 9500, |
| 9514 | VFMADD213BF16Z128mk = 9501, |
| 9515 | VFMADD213BF16Z128mkz = 9502, |
| 9516 | VFMADD213BF16Z128r = 9503, |
| 9517 | VFMADD213BF16Z128rk = 9504, |
| 9518 | VFMADD213BF16Z128rkz = 9505, |
| 9519 | VFMADD213BF16Z256m = 9506, |
| 9520 | VFMADD213BF16Z256mb = 9507, |
| 9521 | VFMADD213BF16Z256mbk = 9508, |
| 9522 | VFMADD213BF16Z256mbkz = 9509, |
| 9523 | VFMADD213BF16Z256mk = 9510, |
| 9524 | VFMADD213BF16Z256mkz = 9511, |
| 9525 | VFMADD213BF16Z256r = 9512, |
| 9526 | VFMADD213BF16Z256rk = 9513, |
| 9527 | VFMADD213BF16Z256rkz = 9514, |
| 9528 | VFMADD213BF16Zm = 9515, |
| 9529 | VFMADD213BF16Zmb = 9516, |
| 9530 | VFMADD213BF16Zmbk = 9517, |
| 9531 | VFMADD213BF16Zmbkz = 9518, |
| 9532 | VFMADD213BF16Zmk = 9519, |
| 9533 | VFMADD213BF16Zmkz = 9520, |
| 9534 | VFMADD213BF16Zr = 9521, |
| 9535 | VFMADD213BF16Zrk = 9522, |
| 9536 | VFMADD213BF16Zrkz = 9523, |
| 9537 | VFMADD213PDYm = 9524, |
| 9538 | VFMADD213PDYr = 9525, |
| 9539 | VFMADD213PDZ128m = 9526, |
| 9540 | VFMADD213PDZ128mb = 9527, |
| 9541 | VFMADD213PDZ128mbk = 9528, |
| 9542 | VFMADD213PDZ128mbkz = 9529, |
| 9543 | VFMADD213PDZ128mk = 9530, |
| 9544 | VFMADD213PDZ128mkz = 9531, |
| 9545 | VFMADD213PDZ128r = 9532, |
| 9546 | VFMADD213PDZ128rk = 9533, |
| 9547 | VFMADD213PDZ128rkz = 9534, |
| 9548 | VFMADD213PDZ256m = 9535, |
| 9549 | VFMADD213PDZ256mb = 9536, |
| 9550 | VFMADD213PDZ256mbk = 9537, |
| 9551 | VFMADD213PDZ256mbkz = 9538, |
| 9552 | VFMADD213PDZ256mk = 9539, |
| 9553 | VFMADD213PDZ256mkz = 9540, |
| 9554 | VFMADD213PDZ256r = 9541, |
| 9555 | VFMADD213PDZ256rk = 9542, |
| 9556 | VFMADD213PDZ256rkz = 9543, |
| 9557 | VFMADD213PDZm = 9544, |
| 9558 | VFMADD213PDZmb = 9545, |
| 9559 | VFMADD213PDZmbk = 9546, |
| 9560 | VFMADD213PDZmbkz = 9547, |
| 9561 | VFMADD213PDZmk = 9548, |
| 9562 | VFMADD213PDZmkz = 9549, |
| 9563 | VFMADD213PDZr = 9550, |
| 9564 | VFMADD213PDZrb = 9551, |
| 9565 | VFMADD213PDZrbk = 9552, |
| 9566 | VFMADD213PDZrbkz = 9553, |
| 9567 | VFMADD213PDZrk = 9554, |
| 9568 | VFMADD213PDZrkz = 9555, |
| 9569 | VFMADD213PDm = 9556, |
| 9570 | VFMADD213PDr = 9557, |
| 9571 | VFMADD213PHZ128m = 9558, |
| 9572 | VFMADD213PHZ128mb = 9559, |
| 9573 | VFMADD213PHZ128mbk = 9560, |
| 9574 | VFMADD213PHZ128mbkz = 9561, |
| 9575 | VFMADD213PHZ128mk = 9562, |
| 9576 | VFMADD213PHZ128mkz = 9563, |
| 9577 | VFMADD213PHZ128r = 9564, |
| 9578 | VFMADD213PHZ128rk = 9565, |
| 9579 | VFMADD213PHZ128rkz = 9566, |
| 9580 | VFMADD213PHZ256m = 9567, |
| 9581 | VFMADD213PHZ256mb = 9568, |
| 9582 | VFMADD213PHZ256mbk = 9569, |
| 9583 | VFMADD213PHZ256mbkz = 9570, |
| 9584 | VFMADD213PHZ256mk = 9571, |
| 9585 | VFMADD213PHZ256mkz = 9572, |
| 9586 | VFMADD213PHZ256r = 9573, |
| 9587 | VFMADD213PHZ256rk = 9574, |
| 9588 | VFMADD213PHZ256rkz = 9575, |
| 9589 | VFMADD213PHZm = 9576, |
| 9590 | VFMADD213PHZmb = 9577, |
| 9591 | VFMADD213PHZmbk = 9578, |
| 9592 | VFMADD213PHZmbkz = 9579, |
| 9593 | VFMADD213PHZmk = 9580, |
| 9594 | VFMADD213PHZmkz = 9581, |
| 9595 | VFMADD213PHZr = 9582, |
| 9596 | VFMADD213PHZrb = 9583, |
| 9597 | VFMADD213PHZrbk = 9584, |
| 9598 | VFMADD213PHZrbkz = 9585, |
| 9599 | VFMADD213PHZrk = 9586, |
| 9600 | VFMADD213PHZrkz = 9587, |
| 9601 | VFMADD213PSYm = 9588, |
| 9602 | VFMADD213PSYr = 9589, |
| 9603 | VFMADD213PSZ128m = 9590, |
| 9604 | VFMADD213PSZ128mb = 9591, |
| 9605 | VFMADD213PSZ128mbk = 9592, |
| 9606 | VFMADD213PSZ128mbkz = 9593, |
| 9607 | VFMADD213PSZ128mk = 9594, |
| 9608 | VFMADD213PSZ128mkz = 9595, |
| 9609 | VFMADD213PSZ128r = 9596, |
| 9610 | VFMADD213PSZ128rk = 9597, |
| 9611 | VFMADD213PSZ128rkz = 9598, |
| 9612 | VFMADD213PSZ256m = 9599, |
| 9613 | VFMADD213PSZ256mb = 9600, |
| 9614 | VFMADD213PSZ256mbk = 9601, |
| 9615 | VFMADD213PSZ256mbkz = 9602, |
| 9616 | VFMADD213PSZ256mk = 9603, |
| 9617 | VFMADD213PSZ256mkz = 9604, |
| 9618 | VFMADD213PSZ256r = 9605, |
| 9619 | VFMADD213PSZ256rk = 9606, |
| 9620 | VFMADD213PSZ256rkz = 9607, |
| 9621 | VFMADD213PSZm = 9608, |
| 9622 | VFMADD213PSZmb = 9609, |
| 9623 | VFMADD213PSZmbk = 9610, |
| 9624 | VFMADD213PSZmbkz = 9611, |
| 9625 | VFMADD213PSZmk = 9612, |
| 9626 | VFMADD213PSZmkz = 9613, |
| 9627 | VFMADD213PSZr = 9614, |
| 9628 | VFMADD213PSZrb = 9615, |
| 9629 | VFMADD213PSZrbk = 9616, |
| 9630 | VFMADD213PSZrbkz = 9617, |
| 9631 | VFMADD213PSZrk = 9618, |
| 9632 | VFMADD213PSZrkz = 9619, |
| 9633 | VFMADD213PSm = 9620, |
| 9634 | VFMADD213PSr = 9621, |
| 9635 | VFMADD213SDZm = 9622, |
| 9636 | VFMADD213SDZm_Int = 9623, |
| 9637 | VFMADD213SDZmk_Int = 9624, |
| 9638 | VFMADD213SDZmkz_Int = 9625, |
| 9639 | VFMADD213SDZr = 9626, |
| 9640 | VFMADD213SDZr_Int = 9627, |
| 9641 | VFMADD213SDZrb = 9628, |
| 9642 | VFMADD213SDZrb_Int = 9629, |
| 9643 | VFMADD213SDZrbk_Int = 9630, |
| 9644 | VFMADD213SDZrbkz_Int = 9631, |
| 9645 | VFMADD213SDZrk_Int = 9632, |
| 9646 | VFMADD213SDZrkz_Int = 9633, |
| 9647 | VFMADD213SDm = 9634, |
| 9648 | VFMADD213SDm_Int = 9635, |
| 9649 | VFMADD213SDr = 9636, |
| 9650 | VFMADD213SDr_Int = 9637, |
| 9651 | VFMADD213SHZm = 9638, |
| 9652 | VFMADD213SHZm_Int = 9639, |
| 9653 | VFMADD213SHZmk_Int = 9640, |
| 9654 | VFMADD213SHZmkz_Int = 9641, |
| 9655 | VFMADD213SHZr = 9642, |
| 9656 | VFMADD213SHZr_Int = 9643, |
| 9657 | VFMADD213SHZrb = 9644, |
| 9658 | VFMADD213SHZrb_Int = 9645, |
| 9659 | VFMADD213SHZrbk_Int = 9646, |
| 9660 | VFMADD213SHZrbkz_Int = 9647, |
| 9661 | VFMADD213SHZrk_Int = 9648, |
| 9662 | VFMADD213SHZrkz_Int = 9649, |
| 9663 | VFMADD213SSZm = 9650, |
| 9664 | VFMADD213SSZm_Int = 9651, |
| 9665 | VFMADD213SSZmk_Int = 9652, |
| 9666 | VFMADD213SSZmkz_Int = 9653, |
| 9667 | VFMADD213SSZr = 9654, |
| 9668 | VFMADD213SSZr_Int = 9655, |
| 9669 | VFMADD213SSZrb = 9656, |
| 9670 | VFMADD213SSZrb_Int = 9657, |
| 9671 | VFMADD213SSZrbk_Int = 9658, |
| 9672 | VFMADD213SSZrbkz_Int = 9659, |
| 9673 | VFMADD213SSZrk_Int = 9660, |
| 9674 | VFMADD213SSZrkz_Int = 9661, |
| 9675 | VFMADD213SSm = 9662, |
| 9676 | VFMADD213SSm_Int = 9663, |
| 9677 | VFMADD213SSr = 9664, |
| 9678 | VFMADD213SSr_Int = 9665, |
| 9679 | VFMADD231BF16Z128m = 9666, |
| 9680 | VFMADD231BF16Z128mb = 9667, |
| 9681 | VFMADD231BF16Z128mbk = 9668, |
| 9682 | VFMADD231BF16Z128mbkz = 9669, |
| 9683 | VFMADD231BF16Z128mk = 9670, |
| 9684 | VFMADD231BF16Z128mkz = 9671, |
| 9685 | VFMADD231BF16Z128r = 9672, |
| 9686 | VFMADD231BF16Z128rk = 9673, |
| 9687 | VFMADD231BF16Z128rkz = 9674, |
| 9688 | VFMADD231BF16Z256m = 9675, |
| 9689 | VFMADD231BF16Z256mb = 9676, |
| 9690 | VFMADD231BF16Z256mbk = 9677, |
| 9691 | VFMADD231BF16Z256mbkz = 9678, |
| 9692 | VFMADD231BF16Z256mk = 9679, |
| 9693 | VFMADD231BF16Z256mkz = 9680, |
| 9694 | VFMADD231BF16Z256r = 9681, |
| 9695 | VFMADD231BF16Z256rk = 9682, |
| 9696 | VFMADD231BF16Z256rkz = 9683, |
| 9697 | VFMADD231BF16Zm = 9684, |
| 9698 | VFMADD231BF16Zmb = 9685, |
| 9699 | VFMADD231BF16Zmbk = 9686, |
| 9700 | VFMADD231BF16Zmbkz = 9687, |
| 9701 | VFMADD231BF16Zmk = 9688, |
| 9702 | VFMADD231BF16Zmkz = 9689, |
| 9703 | VFMADD231BF16Zr = 9690, |
| 9704 | VFMADD231BF16Zrk = 9691, |
| 9705 | VFMADD231BF16Zrkz = 9692, |
| 9706 | VFMADD231PDYm = 9693, |
| 9707 | VFMADD231PDYr = 9694, |
| 9708 | VFMADD231PDZ128m = 9695, |
| 9709 | VFMADD231PDZ128mb = 9696, |
| 9710 | VFMADD231PDZ128mbk = 9697, |
| 9711 | VFMADD231PDZ128mbkz = 9698, |
| 9712 | VFMADD231PDZ128mk = 9699, |
| 9713 | VFMADD231PDZ128mkz = 9700, |
| 9714 | VFMADD231PDZ128r = 9701, |
| 9715 | VFMADD231PDZ128rk = 9702, |
| 9716 | VFMADD231PDZ128rkz = 9703, |
| 9717 | VFMADD231PDZ256m = 9704, |
| 9718 | VFMADD231PDZ256mb = 9705, |
| 9719 | VFMADD231PDZ256mbk = 9706, |
| 9720 | VFMADD231PDZ256mbkz = 9707, |
| 9721 | VFMADD231PDZ256mk = 9708, |
| 9722 | VFMADD231PDZ256mkz = 9709, |
| 9723 | VFMADD231PDZ256r = 9710, |
| 9724 | VFMADD231PDZ256rk = 9711, |
| 9725 | VFMADD231PDZ256rkz = 9712, |
| 9726 | VFMADD231PDZm = 9713, |
| 9727 | VFMADD231PDZmb = 9714, |
| 9728 | VFMADD231PDZmbk = 9715, |
| 9729 | VFMADD231PDZmbkz = 9716, |
| 9730 | VFMADD231PDZmk = 9717, |
| 9731 | VFMADD231PDZmkz = 9718, |
| 9732 | VFMADD231PDZr = 9719, |
| 9733 | VFMADD231PDZrb = 9720, |
| 9734 | VFMADD231PDZrbk = 9721, |
| 9735 | VFMADD231PDZrbkz = 9722, |
| 9736 | VFMADD231PDZrk = 9723, |
| 9737 | VFMADD231PDZrkz = 9724, |
| 9738 | VFMADD231PDm = 9725, |
| 9739 | VFMADD231PDr = 9726, |
| 9740 | VFMADD231PHZ128m = 9727, |
| 9741 | VFMADD231PHZ128mb = 9728, |
| 9742 | VFMADD231PHZ128mbk = 9729, |
| 9743 | VFMADD231PHZ128mbkz = 9730, |
| 9744 | VFMADD231PHZ128mk = 9731, |
| 9745 | VFMADD231PHZ128mkz = 9732, |
| 9746 | VFMADD231PHZ128r = 9733, |
| 9747 | VFMADD231PHZ128rk = 9734, |
| 9748 | VFMADD231PHZ128rkz = 9735, |
| 9749 | VFMADD231PHZ256m = 9736, |
| 9750 | VFMADD231PHZ256mb = 9737, |
| 9751 | VFMADD231PHZ256mbk = 9738, |
| 9752 | VFMADD231PHZ256mbkz = 9739, |
| 9753 | VFMADD231PHZ256mk = 9740, |
| 9754 | VFMADD231PHZ256mkz = 9741, |
| 9755 | VFMADD231PHZ256r = 9742, |
| 9756 | VFMADD231PHZ256rk = 9743, |
| 9757 | VFMADD231PHZ256rkz = 9744, |
| 9758 | VFMADD231PHZm = 9745, |
| 9759 | VFMADD231PHZmb = 9746, |
| 9760 | VFMADD231PHZmbk = 9747, |
| 9761 | VFMADD231PHZmbkz = 9748, |
| 9762 | VFMADD231PHZmk = 9749, |
| 9763 | VFMADD231PHZmkz = 9750, |
| 9764 | VFMADD231PHZr = 9751, |
| 9765 | VFMADD231PHZrb = 9752, |
| 9766 | VFMADD231PHZrbk = 9753, |
| 9767 | VFMADD231PHZrbkz = 9754, |
| 9768 | VFMADD231PHZrk = 9755, |
| 9769 | VFMADD231PHZrkz = 9756, |
| 9770 | VFMADD231PSYm = 9757, |
| 9771 | VFMADD231PSYr = 9758, |
| 9772 | VFMADD231PSZ128m = 9759, |
| 9773 | VFMADD231PSZ128mb = 9760, |
| 9774 | VFMADD231PSZ128mbk = 9761, |
| 9775 | VFMADD231PSZ128mbkz = 9762, |
| 9776 | VFMADD231PSZ128mk = 9763, |
| 9777 | VFMADD231PSZ128mkz = 9764, |
| 9778 | VFMADD231PSZ128r = 9765, |
| 9779 | VFMADD231PSZ128rk = 9766, |
| 9780 | VFMADD231PSZ128rkz = 9767, |
| 9781 | VFMADD231PSZ256m = 9768, |
| 9782 | VFMADD231PSZ256mb = 9769, |
| 9783 | VFMADD231PSZ256mbk = 9770, |
| 9784 | VFMADD231PSZ256mbkz = 9771, |
| 9785 | VFMADD231PSZ256mk = 9772, |
| 9786 | VFMADD231PSZ256mkz = 9773, |
| 9787 | VFMADD231PSZ256r = 9774, |
| 9788 | VFMADD231PSZ256rk = 9775, |
| 9789 | VFMADD231PSZ256rkz = 9776, |
| 9790 | VFMADD231PSZm = 9777, |
| 9791 | VFMADD231PSZmb = 9778, |
| 9792 | VFMADD231PSZmbk = 9779, |
| 9793 | VFMADD231PSZmbkz = 9780, |
| 9794 | VFMADD231PSZmk = 9781, |
| 9795 | VFMADD231PSZmkz = 9782, |
| 9796 | VFMADD231PSZr = 9783, |
| 9797 | VFMADD231PSZrb = 9784, |
| 9798 | VFMADD231PSZrbk = 9785, |
| 9799 | VFMADD231PSZrbkz = 9786, |
| 9800 | VFMADD231PSZrk = 9787, |
| 9801 | VFMADD231PSZrkz = 9788, |
| 9802 | VFMADD231PSm = 9789, |
| 9803 | VFMADD231PSr = 9790, |
| 9804 | VFMADD231SDZm = 9791, |
| 9805 | VFMADD231SDZm_Int = 9792, |
| 9806 | VFMADD231SDZmk_Int = 9793, |
| 9807 | VFMADD231SDZmkz_Int = 9794, |
| 9808 | VFMADD231SDZr = 9795, |
| 9809 | VFMADD231SDZr_Int = 9796, |
| 9810 | VFMADD231SDZrb = 9797, |
| 9811 | VFMADD231SDZrb_Int = 9798, |
| 9812 | VFMADD231SDZrbk_Int = 9799, |
| 9813 | VFMADD231SDZrbkz_Int = 9800, |
| 9814 | VFMADD231SDZrk_Int = 9801, |
| 9815 | VFMADD231SDZrkz_Int = 9802, |
| 9816 | VFMADD231SDm = 9803, |
| 9817 | VFMADD231SDm_Int = 9804, |
| 9818 | VFMADD231SDr = 9805, |
| 9819 | VFMADD231SDr_Int = 9806, |
| 9820 | VFMADD231SHZm = 9807, |
| 9821 | VFMADD231SHZm_Int = 9808, |
| 9822 | VFMADD231SHZmk_Int = 9809, |
| 9823 | VFMADD231SHZmkz_Int = 9810, |
| 9824 | VFMADD231SHZr = 9811, |
| 9825 | VFMADD231SHZr_Int = 9812, |
| 9826 | VFMADD231SHZrb = 9813, |
| 9827 | VFMADD231SHZrb_Int = 9814, |
| 9828 | VFMADD231SHZrbk_Int = 9815, |
| 9829 | VFMADD231SHZrbkz_Int = 9816, |
| 9830 | VFMADD231SHZrk_Int = 9817, |
| 9831 | VFMADD231SHZrkz_Int = 9818, |
| 9832 | VFMADD231SSZm = 9819, |
| 9833 | VFMADD231SSZm_Int = 9820, |
| 9834 | VFMADD231SSZmk_Int = 9821, |
| 9835 | VFMADD231SSZmkz_Int = 9822, |
| 9836 | VFMADD231SSZr = 9823, |
| 9837 | VFMADD231SSZr_Int = 9824, |
| 9838 | VFMADD231SSZrb = 9825, |
| 9839 | VFMADD231SSZrb_Int = 9826, |
| 9840 | VFMADD231SSZrbk_Int = 9827, |
| 9841 | VFMADD231SSZrbkz_Int = 9828, |
| 9842 | VFMADD231SSZrk_Int = 9829, |
| 9843 | VFMADD231SSZrkz_Int = 9830, |
| 9844 | VFMADD231SSm = 9831, |
| 9845 | VFMADD231SSm_Int = 9832, |
| 9846 | VFMADD231SSr = 9833, |
| 9847 | VFMADD231SSr_Int = 9834, |
| 9848 | VFMADDCPHZ128m = 9835, |
| 9849 | VFMADDCPHZ128mb = 9836, |
| 9850 | VFMADDCPHZ128mbk = 9837, |
| 9851 | VFMADDCPHZ128mbkz = 9838, |
| 9852 | VFMADDCPHZ128mk = 9839, |
| 9853 | VFMADDCPHZ128mkz = 9840, |
| 9854 | VFMADDCPHZ128r = 9841, |
| 9855 | VFMADDCPHZ128rk = 9842, |
| 9856 | VFMADDCPHZ128rkz = 9843, |
| 9857 | VFMADDCPHZ256m = 9844, |
| 9858 | VFMADDCPHZ256mb = 9845, |
| 9859 | VFMADDCPHZ256mbk = 9846, |
| 9860 | VFMADDCPHZ256mbkz = 9847, |
| 9861 | VFMADDCPHZ256mk = 9848, |
| 9862 | VFMADDCPHZ256mkz = 9849, |
| 9863 | VFMADDCPHZ256r = 9850, |
| 9864 | VFMADDCPHZ256rk = 9851, |
| 9865 | VFMADDCPHZ256rkz = 9852, |
| 9866 | VFMADDCPHZm = 9853, |
| 9867 | VFMADDCPHZmb = 9854, |
| 9868 | VFMADDCPHZmbk = 9855, |
| 9869 | VFMADDCPHZmbkz = 9856, |
| 9870 | VFMADDCPHZmk = 9857, |
| 9871 | VFMADDCPHZmkz = 9858, |
| 9872 | VFMADDCPHZr = 9859, |
| 9873 | VFMADDCPHZrb = 9860, |
| 9874 | VFMADDCPHZrbk = 9861, |
| 9875 | VFMADDCPHZrbkz = 9862, |
| 9876 | VFMADDCPHZrk = 9863, |
| 9877 | VFMADDCPHZrkz = 9864, |
| 9878 | VFMADDCSHZm = 9865, |
| 9879 | VFMADDCSHZmk = 9866, |
| 9880 | VFMADDCSHZmkz = 9867, |
| 9881 | VFMADDCSHZr = 9868, |
| 9882 | VFMADDCSHZrb = 9869, |
| 9883 | VFMADDCSHZrbk = 9870, |
| 9884 | VFMADDCSHZrbkz = 9871, |
| 9885 | VFMADDCSHZrk = 9872, |
| 9886 | VFMADDCSHZrkz = 9873, |
| 9887 | VFMADDPD4Ymr = 9874, |
| 9888 | VFMADDPD4Yrm = 9875, |
| 9889 | VFMADDPD4Yrr = 9876, |
| 9890 | VFMADDPD4Yrr_REV = 9877, |
| 9891 | VFMADDPD4mr = 9878, |
| 9892 | VFMADDPD4rm = 9879, |
| 9893 | VFMADDPD4rr = 9880, |
| 9894 | VFMADDPD4rr_REV = 9881, |
| 9895 | VFMADDPS4Ymr = 9882, |
| 9896 | VFMADDPS4Yrm = 9883, |
| 9897 | VFMADDPS4Yrr = 9884, |
| 9898 | VFMADDPS4Yrr_REV = 9885, |
| 9899 | VFMADDPS4mr = 9886, |
| 9900 | VFMADDPS4rm = 9887, |
| 9901 | VFMADDPS4rr = 9888, |
| 9902 | VFMADDPS4rr_REV = 9889, |
| 9903 | VFMADDSD4mr = 9890, |
| 9904 | VFMADDSD4mr_Int = 9891, |
| 9905 | VFMADDSD4rm = 9892, |
| 9906 | VFMADDSD4rm_Int = 9893, |
| 9907 | VFMADDSD4rr = 9894, |
| 9908 | VFMADDSD4rr_Int = 9895, |
| 9909 | VFMADDSD4rr_Int_REV = 9896, |
| 9910 | VFMADDSD4rr_REV = 9897, |
| 9911 | VFMADDSS4mr = 9898, |
| 9912 | VFMADDSS4mr_Int = 9899, |
| 9913 | VFMADDSS4rm = 9900, |
| 9914 | VFMADDSS4rm_Int = 9901, |
| 9915 | VFMADDSS4rr = 9902, |
| 9916 | VFMADDSS4rr_Int = 9903, |
| 9917 | VFMADDSS4rr_Int_REV = 9904, |
| 9918 | VFMADDSS4rr_REV = 9905, |
| 9919 | VFMADDSUB132PDYm = 9906, |
| 9920 | VFMADDSUB132PDYr = 9907, |
| 9921 | VFMADDSUB132PDZ128m = 9908, |
| 9922 | VFMADDSUB132PDZ128mb = 9909, |
| 9923 | VFMADDSUB132PDZ128mbk = 9910, |
| 9924 | VFMADDSUB132PDZ128mbkz = 9911, |
| 9925 | VFMADDSUB132PDZ128mk = 9912, |
| 9926 | VFMADDSUB132PDZ128mkz = 9913, |
| 9927 | VFMADDSUB132PDZ128r = 9914, |
| 9928 | VFMADDSUB132PDZ128rk = 9915, |
| 9929 | VFMADDSUB132PDZ128rkz = 9916, |
| 9930 | VFMADDSUB132PDZ256m = 9917, |
| 9931 | VFMADDSUB132PDZ256mb = 9918, |
| 9932 | VFMADDSUB132PDZ256mbk = 9919, |
| 9933 | VFMADDSUB132PDZ256mbkz = 9920, |
| 9934 | VFMADDSUB132PDZ256mk = 9921, |
| 9935 | VFMADDSUB132PDZ256mkz = 9922, |
| 9936 | VFMADDSUB132PDZ256r = 9923, |
| 9937 | VFMADDSUB132PDZ256rk = 9924, |
| 9938 | VFMADDSUB132PDZ256rkz = 9925, |
| 9939 | VFMADDSUB132PDZm = 9926, |
| 9940 | VFMADDSUB132PDZmb = 9927, |
| 9941 | VFMADDSUB132PDZmbk = 9928, |
| 9942 | VFMADDSUB132PDZmbkz = 9929, |
| 9943 | VFMADDSUB132PDZmk = 9930, |
| 9944 | VFMADDSUB132PDZmkz = 9931, |
| 9945 | VFMADDSUB132PDZr = 9932, |
| 9946 | VFMADDSUB132PDZrb = 9933, |
| 9947 | VFMADDSUB132PDZrbk = 9934, |
| 9948 | VFMADDSUB132PDZrbkz = 9935, |
| 9949 | VFMADDSUB132PDZrk = 9936, |
| 9950 | VFMADDSUB132PDZrkz = 9937, |
| 9951 | VFMADDSUB132PDm = 9938, |
| 9952 | VFMADDSUB132PDr = 9939, |
| 9953 | VFMADDSUB132PHZ128m = 9940, |
| 9954 | VFMADDSUB132PHZ128mb = 9941, |
| 9955 | VFMADDSUB132PHZ128mbk = 9942, |
| 9956 | VFMADDSUB132PHZ128mbkz = 9943, |
| 9957 | VFMADDSUB132PHZ128mk = 9944, |
| 9958 | VFMADDSUB132PHZ128mkz = 9945, |
| 9959 | VFMADDSUB132PHZ128r = 9946, |
| 9960 | VFMADDSUB132PHZ128rk = 9947, |
| 9961 | VFMADDSUB132PHZ128rkz = 9948, |
| 9962 | VFMADDSUB132PHZ256m = 9949, |
| 9963 | VFMADDSUB132PHZ256mb = 9950, |
| 9964 | VFMADDSUB132PHZ256mbk = 9951, |
| 9965 | VFMADDSUB132PHZ256mbkz = 9952, |
| 9966 | VFMADDSUB132PHZ256mk = 9953, |
| 9967 | VFMADDSUB132PHZ256mkz = 9954, |
| 9968 | VFMADDSUB132PHZ256r = 9955, |
| 9969 | VFMADDSUB132PHZ256rk = 9956, |
| 9970 | VFMADDSUB132PHZ256rkz = 9957, |
| 9971 | VFMADDSUB132PHZm = 9958, |
| 9972 | VFMADDSUB132PHZmb = 9959, |
| 9973 | VFMADDSUB132PHZmbk = 9960, |
| 9974 | VFMADDSUB132PHZmbkz = 9961, |
| 9975 | VFMADDSUB132PHZmk = 9962, |
| 9976 | VFMADDSUB132PHZmkz = 9963, |
| 9977 | VFMADDSUB132PHZr = 9964, |
| 9978 | VFMADDSUB132PHZrb = 9965, |
| 9979 | VFMADDSUB132PHZrbk = 9966, |
| 9980 | VFMADDSUB132PHZrbkz = 9967, |
| 9981 | VFMADDSUB132PHZrk = 9968, |
| 9982 | VFMADDSUB132PHZrkz = 9969, |
| 9983 | VFMADDSUB132PSYm = 9970, |
| 9984 | VFMADDSUB132PSYr = 9971, |
| 9985 | VFMADDSUB132PSZ128m = 9972, |
| 9986 | VFMADDSUB132PSZ128mb = 9973, |
| 9987 | VFMADDSUB132PSZ128mbk = 9974, |
| 9988 | VFMADDSUB132PSZ128mbkz = 9975, |
| 9989 | VFMADDSUB132PSZ128mk = 9976, |
| 9990 | VFMADDSUB132PSZ128mkz = 9977, |
| 9991 | VFMADDSUB132PSZ128r = 9978, |
| 9992 | VFMADDSUB132PSZ128rk = 9979, |
| 9993 | VFMADDSUB132PSZ128rkz = 9980, |
| 9994 | VFMADDSUB132PSZ256m = 9981, |
| 9995 | VFMADDSUB132PSZ256mb = 9982, |
| 9996 | VFMADDSUB132PSZ256mbk = 9983, |
| 9997 | VFMADDSUB132PSZ256mbkz = 9984, |
| 9998 | VFMADDSUB132PSZ256mk = 9985, |
| 9999 | VFMADDSUB132PSZ256mkz = 9986, |
| 10000 | VFMADDSUB132PSZ256r = 9987, |
| 10001 | VFMADDSUB132PSZ256rk = 9988, |
| 10002 | VFMADDSUB132PSZ256rkz = 9989, |
| 10003 | VFMADDSUB132PSZm = 9990, |
| 10004 | VFMADDSUB132PSZmb = 9991, |
| 10005 | VFMADDSUB132PSZmbk = 9992, |
| 10006 | VFMADDSUB132PSZmbkz = 9993, |
| 10007 | VFMADDSUB132PSZmk = 9994, |
| 10008 | VFMADDSUB132PSZmkz = 9995, |
| 10009 | VFMADDSUB132PSZr = 9996, |
| 10010 | VFMADDSUB132PSZrb = 9997, |
| 10011 | VFMADDSUB132PSZrbk = 9998, |
| 10012 | VFMADDSUB132PSZrbkz = 9999, |
| 10013 | VFMADDSUB132PSZrk = 10000, |
| 10014 | VFMADDSUB132PSZrkz = 10001, |
| 10015 | VFMADDSUB132PSm = 10002, |
| 10016 | VFMADDSUB132PSr = 10003, |
| 10017 | VFMADDSUB213PDYm = 10004, |
| 10018 | VFMADDSUB213PDYr = 10005, |
| 10019 | VFMADDSUB213PDZ128m = 10006, |
| 10020 | VFMADDSUB213PDZ128mb = 10007, |
| 10021 | VFMADDSUB213PDZ128mbk = 10008, |
| 10022 | VFMADDSUB213PDZ128mbkz = 10009, |
| 10023 | VFMADDSUB213PDZ128mk = 10010, |
| 10024 | VFMADDSUB213PDZ128mkz = 10011, |
| 10025 | VFMADDSUB213PDZ128r = 10012, |
| 10026 | VFMADDSUB213PDZ128rk = 10013, |
| 10027 | VFMADDSUB213PDZ128rkz = 10014, |
| 10028 | VFMADDSUB213PDZ256m = 10015, |
| 10029 | VFMADDSUB213PDZ256mb = 10016, |
| 10030 | VFMADDSUB213PDZ256mbk = 10017, |
| 10031 | VFMADDSUB213PDZ256mbkz = 10018, |
| 10032 | VFMADDSUB213PDZ256mk = 10019, |
| 10033 | VFMADDSUB213PDZ256mkz = 10020, |
| 10034 | VFMADDSUB213PDZ256r = 10021, |
| 10035 | VFMADDSUB213PDZ256rk = 10022, |
| 10036 | VFMADDSUB213PDZ256rkz = 10023, |
| 10037 | VFMADDSUB213PDZm = 10024, |
| 10038 | VFMADDSUB213PDZmb = 10025, |
| 10039 | VFMADDSUB213PDZmbk = 10026, |
| 10040 | VFMADDSUB213PDZmbkz = 10027, |
| 10041 | VFMADDSUB213PDZmk = 10028, |
| 10042 | VFMADDSUB213PDZmkz = 10029, |
| 10043 | VFMADDSUB213PDZr = 10030, |
| 10044 | VFMADDSUB213PDZrb = 10031, |
| 10045 | VFMADDSUB213PDZrbk = 10032, |
| 10046 | VFMADDSUB213PDZrbkz = 10033, |
| 10047 | VFMADDSUB213PDZrk = 10034, |
| 10048 | VFMADDSUB213PDZrkz = 10035, |
| 10049 | VFMADDSUB213PDm = 10036, |
| 10050 | VFMADDSUB213PDr = 10037, |
| 10051 | VFMADDSUB213PHZ128m = 10038, |
| 10052 | VFMADDSUB213PHZ128mb = 10039, |
| 10053 | VFMADDSUB213PHZ128mbk = 10040, |
| 10054 | VFMADDSUB213PHZ128mbkz = 10041, |
| 10055 | VFMADDSUB213PHZ128mk = 10042, |
| 10056 | VFMADDSUB213PHZ128mkz = 10043, |
| 10057 | VFMADDSUB213PHZ128r = 10044, |
| 10058 | VFMADDSUB213PHZ128rk = 10045, |
| 10059 | VFMADDSUB213PHZ128rkz = 10046, |
| 10060 | VFMADDSUB213PHZ256m = 10047, |
| 10061 | VFMADDSUB213PHZ256mb = 10048, |
| 10062 | VFMADDSUB213PHZ256mbk = 10049, |
| 10063 | VFMADDSUB213PHZ256mbkz = 10050, |
| 10064 | VFMADDSUB213PHZ256mk = 10051, |
| 10065 | VFMADDSUB213PHZ256mkz = 10052, |
| 10066 | VFMADDSUB213PHZ256r = 10053, |
| 10067 | VFMADDSUB213PHZ256rk = 10054, |
| 10068 | VFMADDSUB213PHZ256rkz = 10055, |
| 10069 | VFMADDSUB213PHZm = 10056, |
| 10070 | VFMADDSUB213PHZmb = 10057, |
| 10071 | VFMADDSUB213PHZmbk = 10058, |
| 10072 | VFMADDSUB213PHZmbkz = 10059, |
| 10073 | VFMADDSUB213PHZmk = 10060, |
| 10074 | VFMADDSUB213PHZmkz = 10061, |
| 10075 | VFMADDSUB213PHZr = 10062, |
| 10076 | VFMADDSUB213PHZrb = 10063, |
| 10077 | VFMADDSUB213PHZrbk = 10064, |
| 10078 | VFMADDSUB213PHZrbkz = 10065, |
| 10079 | VFMADDSUB213PHZrk = 10066, |
| 10080 | VFMADDSUB213PHZrkz = 10067, |
| 10081 | VFMADDSUB213PSYm = 10068, |
| 10082 | VFMADDSUB213PSYr = 10069, |
| 10083 | VFMADDSUB213PSZ128m = 10070, |
| 10084 | VFMADDSUB213PSZ128mb = 10071, |
| 10085 | VFMADDSUB213PSZ128mbk = 10072, |
| 10086 | VFMADDSUB213PSZ128mbkz = 10073, |
| 10087 | VFMADDSUB213PSZ128mk = 10074, |
| 10088 | VFMADDSUB213PSZ128mkz = 10075, |
| 10089 | VFMADDSUB213PSZ128r = 10076, |
| 10090 | VFMADDSUB213PSZ128rk = 10077, |
| 10091 | VFMADDSUB213PSZ128rkz = 10078, |
| 10092 | VFMADDSUB213PSZ256m = 10079, |
| 10093 | VFMADDSUB213PSZ256mb = 10080, |
| 10094 | VFMADDSUB213PSZ256mbk = 10081, |
| 10095 | VFMADDSUB213PSZ256mbkz = 10082, |
| 10096 | VFMADDSUB213PSZ256mk = 10083, |
| 10097 | VFMADDSUB213PSZ256mkz = 10084, |
| 10098 | VFMADDSUB213PSZ256r = 10085, |
| 10099 | VFMADDSUB213PSZ256rk = 10086, |
| 10100 | VFMADDSUB213PSZ256rkz = 10087, |
| 10101 | VFMADDSUB213PSZm = 10088, |
| 10102 | VFMADDSUB213PSZmb = 10089, |
| 10103 | VFMADDSUB213PSZmbk = 10090, |
| 10104 | VFMADDSUB213PSZmbkz = 10091, |
| 10105 | VFMADDSUB213PSZmk = 10092, |
| 10106 | VFMADDSUB213PSZmkz = 10093, |
| 10107 | VFMADDSUB213PSZr = 10094, |
| 10108 | VFMADDSUB213PSZrb = 10095, |
| 10109 | VFMADDSUB213PSZrbk = 10096, |
| 10110 | VFMADDSUB213PSZrbkz = 10097, |
| 10111 | VFMADDSUB213PSZrk = 10098, |
| 10112 | VFMADDSUB213PSZrkz = 10099, |
| 10113 | VFMADDSUB213PSm = 10100, |
| 10114 | VFMADDSUB213PSr = 10101, |
| 10115 | VFMADDSUB231PDYm = 10102, |
| 10116 | VFMADDSUB231PDYr = 10103, |
| 10117 | VFMADDSUB231PDZ128m = 10104, |
| 10118 | VFMADDSUB231PDZ128mb = 10105, |
| 10119 | VFMADDSUB231PDZ128mbk = 10106, |
| 10120 | VFMADDSUB231PDZ128mbkz = 10107, |
| 10121 | VFMADDSUB231PDZ128mk = 10108, |
| 10122 | VFMADDSUB231PDZ128mkz = 10109, |
| 10123 | VFMADDSUB231PDZ128r = 10110, |
| 10124 | VFMADDSUB231PDZ128rk = 10111, |
| 10125 | VFMADDSUB231PDZ128rkz = 10112, |
| 10126 | VFMADDSUB231PDZ256m = 10113, |
| 10127 | VFMADDSUB231PDZ256mb = 10114, |
| 10128 | VFMADDSUB231PDZ256mbk = 10115, |
| 10129 | VFMADDSUB231PDZ256mbkz = 10116, |
| 10130 | VFMADDSUB231PDZ256mk = 10117, |
| 10131 | VFMADDSUB231PDZ256mkz = 10118, |
| 10132 | VFMADDSUB231PDZ256r = 10119, |
| 10133 | VFMADDSUB231PDZ256rk = 10120, |
| 10134 | VFMADDSUB231PDZ256rkz = 10121, |
| 10135 | VFMADDSUB231PDZm = 10122, |
| 10136 | VFMADDSUB231PDZmb = 10123, |
| 10137 | VFMADDSUB231PDZmbk = 10124, |
| 10138 | VFMADDSUB231PDZmbkz = 10125, |
| 10139 | VFMADDSUB231PDZmk = 10126, |
| 10140 | VFMADDSUB231PDZmkz = 10127, |
| 10141 | VFMADDSUB231PDZr = 10128, |
| 10142 | VFMADDSUB231PDZrb = 10129, |
| 10143 | VFMADDSUB231PDZrbk = 10130, |
| 10144 | VFMADDSUB231PDZrbkz = 10131, |
| 10145 | VFMADDSUB231PDZrk = 10132, |
| 10146 | VFMADDSUB231PDZrkz = 10133, |
| 10147 | VFMADDSUB231PDm = 10134, |
| 10148 | VFMADDSUB231PDr = 10135, |
| 10149 | VFMADDSUB231PHZ128m = 10136, |
| 10150 | VFMADDSUB231PHZ128mb = 10137, |
| 10151 | VFMADDSUB231PHZ128mbk = 10138, |
| 10152 | VFMADDSUB231PHZ128mbkz = 10139, |
| 10153 | VFMADDSUB231PHZ128mk = 10140, |
| 10154 | VFMADDSUB231PHZ128mkz = 10141, |
| 10155 | VFMADDSUB231PHZ128r = 10142, |
| 10156 | VFMADDSUB231PHZ128rk = 10143, |
| 10157 | VFMADDSUB231PHZ128rkz = 10144, |
| 10158 | VFMADDSUB231PHZ256m = 10145, |
| 10159 | VFMADDSUB231PHZ256mb = 10146, |
| 10160 | VFMADDSUB231PHZ256mbk = 10147, |
| 10161 | VFMADDSUB231PHZ256mbkz = 10148, |
| 10162 | VFMADDSUB231PHZ256mk = 10149, |
| 10163 | VFMADDSUB231PHZ256mkz = 10150, |
| 10164 | VFMADDSUB231PHZ256r = 10151, |
| 10165 | VFMADDSUB231PHZ256rk = 10152, |
| 10166 | VFMADDSUB231PHZ256rkz = 10153, |
| 10167 | VFMADDSUB231PHZm = 10154, |
| 10168 | VFMADDSUB231PHZmb = 10155, |
| 10169 | VFMADDSUB231PHZmbk = 10156, |
| 10170 | VFMADDSUB231PHZmbkz = 10157, |
| 10171 | VFMADDSUB231PHZmk = 10158, |
| 10172 | VFMADDSUB231PHZmkz = 10159, |
| 10173 | VFMADDSUB231PHZr = 10160, |
| 10174 | VFMADDSUB231PHZrb = 10161, |
| 10175 | VFMADDSUB231PHZrbk = 10162, |
| 10176 | VFMADDSUB231PHZrbkz = 10163, |
| 10177 | VFMADDSUB231PHZrk = 10164, |
| 10178 | VFMADDSUB231PHZrkz = 10165, |
| 10179 | VFMADDSUB231PSYm = 10166, |
| 10180 | VFMADDSUB231PSYr = 10167, |
| 10181 | VFMADDSUB231PSZ128m = 10168, |
| 10182 | VFMADDSUB231PSZ128mb = 10169, |
| 10183 | VFMADDSUB231PSZ128mbk = 10170, |
| 10184 | VFMADDSUB231PSZ128mbkz = 10171, |
| 10185 | VFMADDSUB231PSZ128mk = 10172, |
| 10186 | VFMADDSUB231PSZ128mkz = 10173, |
| 10187 | VFMADDSUB231PSZ128r = 10174, |
| 10188 | VFMADDSUB231PSZ128rk = 10175, |
| 10189 | VFMADDSUB231PSZ128rkz = 10176, |
| 10190 | VFMADDSUB231PSZ256m = 10177, |
| 10191 | VFMADDSUB231PSZ256mb = 10178, |
| 10192 | VFMADDSUB231PSZ256mbk = 10179, |
| 10193 | VFMADDSUB231PSZ256mbkz = 10180, |
| 10194 | VFMADDSUB231PSZ256mk = 10181, |
| 10195 | VFMADDSUB231PSZ256mkz = 10182, |
| 10196 | VFMADDSUB231PSZ256r = 10183, |
| 10197 | VFMADDSUB231PSZ256rk = 10184, |
| 10198 | VFMADDSUB231PSZ256rkz = 10185, |
| 10199 | VFMADDSUB231PSZm = 10186, |
| 10200 | VFMADDSUB231PSZmb = 10187, |
| 10201 | VFMADDSUB231PSZmbk = 10188, |
| 10202 | VFMADDSUB231PSZmbkz = 10189, |
| 10203 | VFMADDSUB231PSZmk = 10190, |
| 10204 | VFMADDSUB231PSZmkz = 10191, |
| 10205 | VFMADDSUB231PSZr = 10192, |
| 10206 | VFMADDSUB231PSZrb = 10193, |
| 10207 | VFMADDSUB231PSZrbk = 10194, |
| 10208 | VFMADDSUB231PSZrbkz = 10195, |
| 10209 | VFMADDSUB231PSZrk = 10196, |
| 10210 | VFMADDSUB231PSZrkz = 10197, |
| 10211 | VFMADDSUB231PSm = 10198, |
| 10212 | VFMADDSUB231PSr = 10199, |
| 10213 | VFMADDSUBPD4Ymr = 10200, |
| 10214 | VFMADDSUBPD4Yrm = 10201, |
| 10215 | VFMADDSUBPD4Yrr = 10202, |
| 10216 | VFMADDSUBPD4Yrr_REV = 10203, |
| 10217 | VFMADDSUBPD4mr = 10204, |
| 10218 | VFMADDSUBPD4rm = 10205, |
| 10219 | VFMADDSUBPD4rr = 10206, |
| 10220 | VFMADDSUBPD4rr_REV = 10207, |
| 10221 | VFMADDSUBPS4Ymr = 10208, |
| 10222 | VFMADDSUBPS4Yrm = 10209, |
| 10223 | VFMADDSUBPS4Yrr = 10210, |
| 10224 | VFMADDSUBPS4Yrr_REV = 10211, |
| 10225 | VFMADDSUBPS4mr = 10212, |
| 10226 | VFMADDSUBPS4rm = 10213, |
| 10227 | VFMADDSUBPS4rr = 10214, |
| 10228 | VFMADDSUBPS4rr_REV = 10215, |
| 10229 | VFMSUB132BF16Z128m = 10216, |
| 10230 | VFMSUB132BF16Z128mb = 10217, |
| 10231 | VFMSUB132BF16Z128mbk = 10218, |
| 10232 | VFMSUB132BF16Z128mbkz = 10219, |
| 10233 | VFMSUB132BF16Z128mk = 10220, |
| 10234 | VFMSUB132BF16Z128mkz = 10221, |
| 10235 | VFMSUB132BF16Z128r = 10222, |
| 10236 | VFMSUB132BF16Z128rk = 10223, |
| 10237 | VFMSUB132BF16Z128rkz = 10224, |
| 10238 | VFMSUB132BF16Z256m = 10225, |
| 10239 | VFMSUB132BF16Z256mb = 10226, |
| 10240 | VFMSUB132BF16Z256mbk = 10227, |
| 10241 | VFMSUB132BF16Z256mbkz = 10228, |
| 10242 | VFMSUB132BF16Z256mk = 10229, |
| 10243 | VFMSUB132BF16Z256mkz = 10230, |
| 10244 | VFMSUB132BF16Z256r = 10231, |
| 10245 | VFMSUB132BF16Z256rk = 10232, |
| 10246 | VFMSUB132BF16Z256rkz = 10233, |
| 10247 | VFMSUB132BF16Zm = 10234, |
| 10248 | VFMSUB132BF16Zmb = 10235, |
| 10249 | VFMSUB132BF16Zmbk = 10236, |
| 10250 | VFMSUB132BF16Zmbkz = 10237, |
| 10251 | VFMSUB132BF16Zmk = 10238, |
| 10252 | VFMSUB132BF16Zmkz = 10239, |
| 10253 | VFMSUB132BF16Zr = 10240, |
| 10254 | VFMSUB132BF16Zrk = 10241, |
| 10255 | VFMSUB132BF16Zrkz = 10242, |
| 10256 | VFMSUB132PDYm = 10243, |
| 10257 | VFMSUB132PDYr = 10244, |
| 10258 | VFMSUB132PDZ128m = 10245, |
| 10259 | VFMSUB132PDZ128mb = 10246, |
| 10260 | VFMSUB132PDZ128mbk = 10247, |
| 10261 | VFMSUB132PDZ128mbkz = 10248, |
| 10262 | VFMSUB132PDZ128mk = 10249, |
| 10263 | VFMSUB132PDZ128mkz = 10250, |
| 10264 | VFMSUB132PDZ128r = 10251, |
| 10265 | VFMSUB132PDZ128rk = 10252, |
| 10266 | VFMSUB132PDZ128rkz = 10253, |
| 10267 | VFMSUB132PDZ256m = 10254, |
| 10268 | VFMSUB132PDZ256mb = 10255, |
| 10269 | VFMSUB132PDZ256mbk = 10256, |
| 10270 | VFMSUB132PDZ256mbkz = 10257, |
| 10271 | VFMSUB132PDZ256mk = 10258, |
| 10272 | VFMSUB132PDZ256mkz = 10259, |
| 10273 | VFMSUB132PDZ256r = 10260, |
| 10274 | VFMSUB132PDZ256rk = 10261, |
| 10275 | VFMSUB132PDZ256rkz = 10262, |
| 10276 | VFMSUB132PDZm = 10263, |
| 10277 | VFMSUB132PDZmb = 10264, |
| 10278 | VFMSUB132PDZmbk = 10265, |
| 10279 | VFMSUB132PDZmbkz = 10266, |
| 10280 | VFMSUB132PDZmk = 10267, |
| 10281 | VFMSUB132PDZmkz = 10268, |
| 10282 | VFMSUB132PDZr = 10269, |
| 10283 | VFMSUB132PDZrb = 10270, |
| 10284 | VFMSUB132PDZrbk = 10271, |
| 10285 | VFMSUB132PDZrbkz = 10272, |
| 10286 | VFMSUB132PDZrk = 10273, |
| 10287 | VFMSUB132PDZrkz = 10274, |
| 10288 | VFMSUB132PDm = 10275, |
| 10289 | VFMSUB132PDr = 10276, |
| 10290 | VFMSUB132PHZ128m = 10277, |
| 10291 | VFMSUB132PHZ128mb = 10278, |
| 10292 | VFMSUB132PHZ128mbk = 10279, |
| 10293 | VFMSUB132PHZ128mbkz = 10280, |
| 10294 | VFMSUB132PHZ128mk = 10281, |
| 10295 | VFMSUB132PHZ128mkz = 10282, |
| 10296 | VFMSUB132PHZ128r = 10283, |
| 10297 | VFMSUB132PHZ128rk = 10284, |
| 10298 | VFMSUB132PHZ128rkz = 10285, |
| 10299 | VFMSUB132PHZ256m = 10286, |
| 10300 | VFMSUB132PHZ256mb = 10287, |
| 10301 | VFMSUB132PHZ256mbk = 10288, |
| 10302 | VFMSUB132PHZ256mbkz = 10289, |
| 10303 | VFMSUB132PHZ256mk = 10290, |
| 10304 | VFMSUB132PHZ256mkz = 10291, |
| 10305 | VFMSUB132PHZ256r = 10292, |
| 10306 | VFMSUB132PHZ256rk = 10293, |
| 10307 | VFMSUB132PHZ256rkz = 10294, |
| 10308 | VFMSUB132PHZm = 10295, |
| 10309 | VFMSUB132PHZmb = 10296, |
| 10310 | VFMSUB132PHZmbk = 10297, |
| 10311 | VFMSUB132PHZmbkz = 10298, |
| 10312 | VFMSUB132PHZmk = 10299, |
| 10313 | VFMSUB132PHZmkz = 10300, |
| 10314 | VFMSUB132PHZr = 10301, |
| 10315 | VFMSUB132PHZrb = 10302, |
| 10316 | VFMSUB132PHZrbk = 10303, |
| 10317 | VFMSUB132PHZrbkz = 10304, |
| 10318 | VFMSUB132PHZrk = 10305, |
| 10319 | VFMSUB132PHZrkz = 10306, |
| 10320 | VFMSUB132PSYm = 10307, |
| 10321 | VFMSUB132PSYr = 10308, |
| 10322 | VFMSUB132PSZ128m = 10309, |
| 10323 | VFMSUB132PSZ128mb = 10310, |
| 10324 | VFMSUB132PSZ128mbk = 10311, |
| 10325 | VFMSUB132PSZ128mbkz = 10312, |
| 10326 | VFMSUB132PSZ128mk = 10313, |
| 10327 | VFMSUB132PSZ128mkz = 10314, |
| 10328 | VFMSUB132PSZ128r = 10315, |
| 10329 | VFMSUB132PSZ128rk = 10316, |
| 10330 | VFMSUB132PSZ128rkz = 10317, |
| 10331 | VFMSUB132PSZ256m = 10318, |
| 10332 | VFMSUB132PSZ256mb = 10319, |
| 10333 | VFMSUB132PSZ256mbk = 10320, |
| 10334 | VFMSUB132PSZ256mbkz = 10321, |
| 10335 | VFMSUB132PSZ256mk = 10322, |
| 10336 | VFMSUB132PSZ256mkz = 10323, |
| 10337 | VFMSUB132PSZ256r = 10324, |
| 10338 | VFMSUB132PSZ256rk = 10325, |
| 10339 | VFMSUB132PSZ256rkz = 10326, |
| 10340 | VFMSUB132PSZm = 10327, |
| 10341 | VFMSUB132PSZmb = 10328, |
| 10342 | VFMSUB132PSZmbk = 10329, |
| 10343 | VFMSUB132PSZmbkz = 10330, |
| 10344 | VFMSUB132PSZmk = 10331, |
| 10345 | VFMSUB132PSZmkz = 10332, |
| 10346 | VFMSUB132PSZr = 10333, |
| 10347 | VFMSUB132PSZrb = 10334, |
| 10348 | VFMSUB132PSZrbk = 10335, |
| 10349 | VFMSUB132PSZrbkz = 10336, |
| 10350 | VFMSUB132PSZrk = 10337, |
| 10351 | VFMSUB132PSZrkz = 10338, |
| 10352 | VFMSUB132PSm = 10339, |
| 10353 | VFMSUB132PSr = 10340, |
| 10354 | VFMSUB132SDZm = 10341, |
| 10355 | VFMSUB132SDZm_Int = 10342, |
| 10356 | VFMSUB132SDZmk_Int = 10343, |
| 10357 | VFMSUB132SDZmkz_Int = 10344, |
| 10358 | VFMSUB132SDZr = 10345, |
| 10359 | VFMSUB132SDZr_Int = 10346, |
| 10360 | VFMSUB132SDZrb = 10347, |
| 10361 | VFMSUB132SDZrb_Int = 10348, |
| 10362 | VFMSUB132SDZrbk_Int = 10349, |
| 10363 | VFMSUB132SDZrbkz_Int = 10350, |
| 10364 | VFMSUB132SDZrk_Int = 10351, |
| 10365 | VFMSUB132SDZrkz_Int = 10352, |
| 10366 | VFMSUB132SDm = 10353, |
| 10367 | VFMSUB132SDm_Int = 10354, |
| 10368 | VFMSUB132SDr = 10355, |
| 10369 | VFMSUB132SDr_Int = 10356, |
| 10370 | VFMSUB132SHZm = 10357, |
| 10371 | VFMSUB132SHZm_Int = 10358, |
| 10372 | VFMSUB132SHZmk_Int = 10359, |
| 10373 | VFMSUB132SHZmkz_Int = 10360, |
| 10374 | VFMSUB132SHZr = 10361, |
| 10375 | VFMSUB132SHZr_Int = 10362, |
| 10376 | VFMSUB132SHZrb = 10363, |
| 10377 | VFMSUB132SHZrb_Int = 10364, |
| 10378 | VFMSUB132SHZrbk_Int = 10365, |
| 10379 | VFMSUB132SHZrbkz_Int = 10366, |
| 10380 | VFMSUB132SHZrk_Int = 10367, |
| 10381 | VFMSUB132SHZrkz_Int = 10368, |
| 10382 | VFMSUB132SSZm = 10369, |
| 10383 | VFMSUB132SSZm_Int = 10370, |
| 10384 | VFMSUB132SSZmk_Int = 10371, |
| 10385 | VFMSUB132SSZmkz_Int = 10372, |
| 10386 | VFMSUB132SSZr = 10373, |
| 10387 | VFMSUB132SSZr_Int = 10374, |
| 10388 | VFMSUB132SSZrb = 10375, |
| 10389 | VFMSUB132SSZrb_Int = 10376, |
| 10390 | VFMSUB132SSZrbk_Int = 10377, |
| 10391 | VFMSUB132SSZrbkz_Int = 10378, |
| 10392 | VFMSUB132SSZrk_Int = 10379, |
| 10393 | VFMSUB132SSZrkz_Int = 10380, |
| 10394 | VFMSUB132SSm = 10381, |
| 10395 | VFMSUB132SSm_Int = 10382, |
| 10396 | VFMSUB132SSr = 10383, |
| 10397 | VFMSUB132SSr_Int = 10384, |
| 10398 | VFMSUB213BF16Z128m = 10385, |
| 10399 | VFMSUB213BF16Z128mb = 10386, |
| 10400 | VFMSUB213BF16Z128mbk = 10387, |
| 10401 | VFMSUB213BF16Z128mbkz = 10388, |
| 10402 | VFMSUB213BF16Z128mk = 10389, |
| 10403 | VFMSUB213BF16Z128mkz = 10390, |
| 10404 | VFMSUB213BF16Z128r = 10391, |
| 10405 | VFMSUB213BF16Z128rk = 10392, |
| 10406 | VFMSUB213BF16Z128rkz = 10393, |
| 10407 | VFMSUB213BF16Z256m = 10394, |
| 10408 | VFMSUB213BF16Z256mb = 10395, |
| 10409 | VFMSUB213BF16Z256mbk = 10396, |
| 10410 | VFMSUB213BF16Z256mbkz = 10397, |
| 10411 | VFMSUB213BF16Z256mk = 10398, |
| 10412 | VFMSUB213BF16Z256mkz = 10399, |
| 10413 | VFMSUB213BF16Z256r = 10400, |
| 10414 | VFMSUB213BF16Z256rk = 10401, |
| 10415 | VFMSUB213BF16Z256rkz = 10402, |
| 10416 | VFMSUB213BF16Zm = 10403, |
| 10417 | VFMSUB213BF16Zmb = 10404, |
| 10418 | VFMSUB213BF16Zmbk = 10405, |
| 10419 | VFMSUB213BF16Zmbkz = 10406, |
| 10420 | VFMSUB213BF16Zmk = 10407, |
| 10421 | VFMSUB213BF16Zmkz = 10408, |
| 10422 | VFMSUB213BF16Zr = 10409, |
| 10423 | VFMSUB213BF16Zrk = 10410, |
| 10424 | VFMSUB213BF16Zrkz = 10411, |
| 10425 | VFMSUB213PDYm = 10412, |
| 10426 | VFMSUB213PDYr = 10413, |
| 10427 | VFMSUB213PDZ128m = 10414, |
| 10428 | VFMSUB213PDZ128mb = 10415, |
| 10429 | VFMSUB213PDZ128mbk = 10416, |
| 10430 | VFMSUB213PDZ128mbkz = 10417, |
| 10431 | VFMSUB213PDZ128mk = 10418, |
| 10432 | VFMSUB213PDZ128mkz = 10419, |
| 10433 | VFMSUB213PDZ128r = 10420, |
| 10434 | VFMSUB213PDZ128rk = 10421, |
| 10435 | VFMSUB213PDZ128rkz = 10422, |
| 10436 | VFMSUB213PDZ256m = 10423, |
| 10437 | VFMSUB213PDZ256mb = 10424, |
| 10438 | VFMSUB213PDZ256mbk = 10425, |
| 10439 | VFMSUB213PDZ256mbkz = 10426, |
| 10440 | VFMSUB213PDZ256mk = 10427, |
| 10441 | VFMSUB213PDZ256mkz = 10428, |
| 10442 | VFMSUB213PDZ256r = 10429, |
| 10443 | VFMSUB213PDZ256rk = 10430, |
| 10444 | VFMSUB213PDZ256rkz = 10431, |
| 10445 | VFMSUB213PDZm = 10432, |
| 10446 | VFMSUB213PDZmb = 10433, |
| 10447 | VFMSUB213PDZmbk = 10434, |
| 10448 | VFMSUB213PDZmbkz = 10435, |
| 10449 | VFMSUB213PDZmk = 10436, |
| 10450 | VFMSUB213PDZmkz = 10437, |
| 10451 | VFMSUB213PDZr = 10438, |
| 10452 | VFMSUB213PDZrb = 10439, |
| 10453 | VFMSUB213PDZrbk = 10440, |
| 10454 | VFMSUB213PDZrbkz = 10441, |
| 10455 | VFMSUB213PDZrk = 10442, |
| 10456 | VFMSUB213PDZrkz = 10443, |
| 10457 | VFMSUB213PDm = 10444, |
| 10458 | VFMSUB213PDr = 10445, |
| 10459 | VFMSUB213PHZ128m = 10446, |
| 10460 | VFMSUB213PHZ128mb = 10447, |
| 10461 | VFMSUB213PHZ128mbk = 10448, |
| 10462 | VFMSUB213PHZ128mbkz = 10449, |
| 10463 | VFMSUB213PHZ128mk = 10450, |
| 10464 | VFMSUB213PHZ128mkz = 10451, |
| 10465 | VFMSUB213PHZ128r = 10452, |
| 10466 | VFMSUB213PHZ128rk = 10453, |
| 10467 | VFMSUB213PHZ128rkz = 10454, |
| 10468 | VFMSUB213PHZ256m = 10455, |
| 10469 | VFMSUB213PHZ256mb = 10456, |
| 10470 | VFMSUB213PHZ256mbk = 10457, |
| 10471 | VFMSUB213PHZ256mbkz = 10458, |
| 10472 | VFMSUB213PHZ256mk = 10459, |
| 10473 | VFMSUB213PHZ256mkz = 10460, |
| 10474 | VFMSUB213PHZ256r = 10461, |
| 10475 | VFMSUB213PHZ256rk = 10462, |
| 10476 | VFMSUB213PHZ256rkz = 10463, |
| 10477 | VFMSUB213PHZm = 10464, |
| 10478 | VFMSUB213PHZmb = 10465, |
| 10479 | VFMSUB213PHZmbk = 10466, |
| 10480 | VFMSUB213PHZmbkz = 10467, |
| 10481 | VFMSUB213PHZmk = 10468, |
| 10482 | VFMSUB213PHZmkz = 10469, |
| 10483 | VFMSUB213PHZr = 10470, |
| 10484 | VFMSUB213PHZrb = 10471, |
| 10485 | VFMSUB213PHZrbk = 10472, |
| 10486 | VFMSUB213PHZrbkz = 10473, |
| 10487 | VFMSUB213PHZrk = 10474, |
| 10488 | VFMSUB213PHZrkz = 10475, |
| 10489 | VFMSUB213PSYm = 10476, |
| 10490 | VFMSUB213PSYr = 10477, |
| 10491 | VFMSUB213PSZ128m = 10478, |
| 10492 | VFMSUB213PSZ128mb = 10479, |
| 10493 | VFMSUB213PSZ128mbk = 10480, |
| 10494 | VFMSUB213PSZ128mbkz = 10481, |
| 10495 | VFMSUB213PSZ128mk = 10482, |
| 10496 | VFMSUB213PSZ128mkz = 10483, |
| 10497 | VFMSUB213PSZ128r = 10484, |
| 10498 | VFMSUB213PSZ128rk = 10485, |
| 10499 | VFMSUB213PSZ128rkz = 10486, |
| 10500 | VFMSUB213PSZ256m = 10487, |
| 10501 | VFMSUB213PSZ256mb = 10488, |
| 10502 | VFMSUB213PSZ256mbk = 10489, |
| 10503 | VFMSUB213PSZ256mbkz = 10490, |
| 10504 | VFMSUB213PSZ256mk = 10491, |
| 10505 | VFMSUB213PSZ256mkz = 10492, |
| 10506 | VFMSUB213PSZ256r = 10493, |
| 10507 | VFMSUB213PSZ256rk = 10494, |
| 10508 | VFMSUB213PSZ256rkz = 10495, |
| 10509 | VFMSUB213PSZm = 10496, |
| 10510 | VFMSUB213PSZmb = 10497, |
| 10511 | VFMSUB213PSZmbk = 10498, |
| 10512 | VFMSUB213PSZmbkz = 10499, |
| 10513 | VFMSUB213PSZmk = 10500, |
| 10514 | VFMSUB213PSZmkz = 10501, |
| 10515 | VFMSUB213PSZr = 10502, |
| 10516 | VFMSUB213PSZrb = 10503, |
| 10517 | VFMSUB213PSZrbk = 10504, |
| 10518 | VFMSUB213PSZrbkz = 10505, |
| 10519 | VFMSUB213PSZrk = 10506, |
| 10520 | VFMSUB213PSZrkz = 10507, |
| 10521 | VFMSUB213PSm = 10508, |
| 10522 | VFMSUB213PSr = 10509, |
| 10523 | VFMSUB213SDZm = 10510, |
| 10524 | VFMSUB213SDZm_Int = 10511, |
| 10525 | VFMSUB213SDZmk_Int = 10512, |
| 10526 | VFMSUB213SDZmkz_Int = 10513, |
| 10527 | VFMSUB213SDZr = 10514, |
| 10528 | VFMSUB213SDZr_Int = 10515, |
| 10529 | VFMSUB213SDZrb = 10516, |
| 10530 | VFMSUB213SDZrb_Int = 10517, |
| 10531 | VFMSUB213SDZrbk_Int = 10518, |
| 10532 | VFMSUB213SDZrbkz_Int = 10519, |
| 10533 | VFMSUB213SDZrk_Int = 10520, |
| 10534 | VFMSUB213SDZrkz_Int = 10521, |
| 10535 | VFMSUB213SDm = 10522, |
| 10536 | VFMSUB213SDm_Int = 10523, |
| 10537 | VFMSUB213SDr = 10524, |
| 10538 | VFMSUB213SDr_Int = 10525, |
| 10539 | VFMSUB213SHZm = 10526, |
| 10540 | VFMSUB213SHZm_Int = 10527, |
| 10541 | VFMSUB213SHZmk_Int = 10528, |
| 10542 | VFMSUB213SHZmkz_Int = 10529, |
| 10543 | VFMSUB213SHZr = 10530, |
| 10544 | VFMSUB213SHZr_Int = 10531, |
| 10545 | VFMSUB213SHZrb = 10532, |
| 10546 | VFMSUB213SHZrb_Int = 10533, |
| 10547 | VFMSUB213SHZrbk_Int = 10534, |
| 10548 | VFMSUB213SHZrbkz_Int = 10535, |
| 10549 | VFMSUB213SHZrk_Int = 10536, |
| 10550 | VFMSUB213SHZrkz_Int = 10537, |
| 10551 | VFMSUB213SSZm = 10538, |
| 10552 | VFMSUB213SSZm_Int = 10539, |
| 10553 | VFMSUB213SSZmk_Int = 10540, |
| 10554 | VFMSUB213SSZmkz_Int = 10541, |
| 10555 | VFMSUB213SSZr = 10542, |
| 10556 | VFMSUB213SSZr_Int = 10543, |
| 10557 | VFMSUB213SSZrb = 10544, |
| 10558 | VFMSUB213SSZrb_Int = 10545, |
| 10559 | VFMSUB213SSZrbk_Int = 10546, |
| 10560 | VFMSUB213SSZrbkz_Int = 10547, |
| 10561 | VFMSUB213SSZrk_Int = 10548, |
| 10562 | VFMSUB213SSZrkz_Int = 10549, |
| 10563 | VFMSUB213SSm = 10550, |
| 10564 | VFMSUB213SSm_Int = 10551, |
| 10565 | VFMSUB213SSr = 10552, |
| 10566 | VFMSUB213SSr_Int = 10553, |
| 10567 | VFMSUB231BF16Z128m = 10554, |
| 10568 | VFMSUB231BF16Z128mb = 10555, |
| 10569 | VFMSUB231BF16Z128mbk = 10556, |
| 10570 | VFMSUB231BF16Z128mbkz = 10557, |
| 10571 | VFMSUB231BF16Z128mk = 10558, |
| 10572 | VFMSUB231BF16Z128mkz = 10559, |
| 10573 | VFMSUB231BF16Z128r = 10560, |
| 10574 | VFMSUB231BF16Z128rk = 10561, |
| 10575 | VFMSUB231BF16Z128rkz = 10562, |
| 10576 | VFMSUB231BF16Z256m = 10563, |
| 10577 | VFMSUB231BF16Z256mb = 10564, |
| 10578 | VFMSUB231BF16Z256mbk = 10565, |
| 10579 | VFMSUB231BF16Z256mbkz = 10566, |
| 10580 | VFMSUB231BF16Z256mk = 10567, |
| 10581 | VFMSUB231BF16Z256mkz = 10568, |
| 10582 | VFMSUB231BF16Z256r = 10569, |
| 10583 | VFMSUB231BF16Z256rk = 10570, |
| 10584 | VFMSUB231BF16Z256rkz = 10571, |
| 10585 | VFMSUB231BF16Zm = 10572, |
| 10586 | VFMSUB231BF16Zmb = 10573, |
| 10587 | VFMSUB231BF16Zmbk = 10574, |
| 10588 | VFMSUB231BF16Zmbkz = 10575, |
| 10589 | VFMSUB231BF16Zmk = 10576, |
| 10590 | VFMSUB231BF16Zmkz = 10577, |
| 10591 | VFMSUB231BF16Zr = 10578, |
| 10592 | VFMSUB231BF16Zrk = 10579, |
| 10593 | VFMSUB231BF16Zrkz = 10580, |
| 10594 | VFMSUB231PDYm = 10581, |
| 10595 | VFMSUB231PDYr = 10582, |
| 10596 | VFMSUB231PDZ128m = 10583, |
| 10597 | VFMSUB231PDZ128mb = 10584, |
| 10598 | VFMSUB231PDZ128mbk = 10585, |
| 10599 | VFMSUB231PDZ128mbkz = 10586, |
| 10600 | VFMSUB231PDZ128mk = 10587, |
| 10601 | VFMSUB231PDZ128mkz = 10588, |
| 10602 | VFMSUB231PDZ128r = 10589, |
| 10603 | VFMSUB231PDZ128rk = 10590, |
| 10604 | VFMSUB231PDZ128rkz = 10591, |
| 10605 | VFMSUB231PDZ256m = 10592, |
| 10606 | VFMSUB231PDZ256mb = 10593, |
| 10607 | VFMSUB231PDZ256mbk = 10594, |
| 10608 | VFMSUB231PDZ256mbkz = 10595, |
| 10609 | VFMSUB231PDZ256mk = 10596, |
| 10610 | VFMSUB231PDZ256mkz = 10597, |
| 10611 | VFMSUB231PDZ256r = 10598, |
| 10612 | VFMSUB231PDZ256rk = 10599, |
| 10613 | VFMSUB231PDZ256rkz = 10600, |
| 10614 | VFMSUB231PDZm = 10601, |
| 10615 | VFMSUB231PDZmb = 10602, |
| 10616 | VFMSUB231PDZmbk = 10603, |
| 10617 | VFMSUB231PDZmbkz = 10604, |
| 10618 | VFMSUB231PDZmk = 10605, |
| 10619 | VFMSUB231PDZmkz = 10606, |
| 10620 | VFMSUB231PDZr = 10607, |
| 10621 | VFMSUB231PDZrb = 10608, |
| 10622 | VFMSUB231PDZrbk = 10609, |
| 10623 | VFMSUB231PDZrbkz = 10610, |
| 10624 | VFMSUB231PDZrk = 10611, |
| 10625 | VFMSUB231PDZrkz = 10612, |
| 10626 | VFMSUB231PDm = 10613, |
| 10627 | VFMSUB231PDr = 10614, |
| 10628 | VFMSUB231PHZ128m = 10615, |
| 10629 | VFMSUB231PHZ128mb = 10616, |
| 10630 | VFMSUB231PHZ128mbk = 10617, |
| 10631 | VFMSUB231PHZ128mbkz = 10618, |
| 10632 | VFMSUB231PHZ128mk = 10619, |
| 10633 | VFMSUB231PHZ128mkz = 10620, |
| 10634 | VFMSUB231PHZ128r = 10621, |
| 10635 | VFMSUB231PHZ128rk = 10622, |
| 10636 | VFMSUB231PHZ128rkz = 10623, |
| 10637 | VFMSUB231PHZ256m = 10624, |
| 10638 | VFMSUB231PHZ256mb = 10625, |
| 10639 | VFMSUB231PHZ256mbk = 10626, |
| 10640 | VFMSUB231PHZ256mbkz = 10627, |
| 10641 | VFMSUB231PHZ256mk = 10628, |
| 10642 | VFMSUB231PHZ256mkz = 10629, |
| 10643 | VFMSUB231PHZ256r = 10630, |
| 10644 | VFMSUB231PHZ256rk = 10631, |
| 10645 | VFMSUB231PHZ256rkz = 10632, |
| 10646 | VFMSUB231PHZm = 10633, |
| 10647 | VFMSUB231PHZmb = 10634, |
| 10648 | VFMSUB231PHZmbk = 10635, |
| 10649 | VFMSUB231PHZmbkz = 10636, |
| 10650 | VFMSUB231PHZmk = 10637, |
| 10651 | VFMSUB231PHZmkz = 10638, |
| 10652 | VFMSUB231PHZr = 10639, |
| 10653 | VFMSUB231PHZrb = 10640, |
| 10654 | VFMSUB231PHZrbk = 10641, |
| 10655 | VFMSUB231PHZrbkz = 10642, |
| 10656 | VFMSUB231PHZrk = 10643, |
| 10657 | VFMSUB231PHZrkz = 10644, |
| 10658 | VFMSUB231PSYm = 10645, |
| 10659 | VFMSUB231PSYr = 10646, |
| 10660 | VFMSUB231PSZ128m = 10647, |
| 10661 | VFMSUB231PSZ128mb = 10648, |
| 10662 | VFMSUB231PSZ128mbk = 10649, |
| 10663 | VFMSUB231PSZ128mbkz = 10650, |
| 10664 | VFMSUB231PSZ128mk = 10651, |
| 10665 | VFMSUB231PSZ128mkz = 10652, |
| 10666 | VFMSUB231PSZ128r = 10653, |
| 10667 | VFMSUB231PSZ128rk = 10654, |
| 10668 | VFMSUB231PSZ128rkz = 10655, |
| 10669 | VFMSUB231PSZ256m = 10656, |
| 10670 | VFMSUB231PSZ256mb = 10657, |
| 10671 | VFMSUB231PSZ256mbk = 10658, |
| 10672 | VFMSUB231PSZ256mbkz = 10659, |
| 10673 | VFMSUB231PSZ256mk = 10660, |
| 10674 | VFMSUB231PSZ256mkz = 10661, |
| 10675 | VFMSUB231PSZ256r = 10662, |
| 10676 | VFMSUB231PSZ256rk = 10663, |
| 10677 | VFMSUB231PSZ256rkz = 10664, |
| 10678 | VFMSUB231PSZm = 10665, |
| 10679 | VFMSUB231PSZmb = 10666, |
| 10680 | VFMSUB231PSZmbk = 10667, |
| 10681 | VFMSUB231PSZmbkz = 10668, |
| 10682 | VFMSUB231PSZmk = 10669, |
| 10683 | VFMSUB231PSZmkz = 10670, |
| 10684 | VFMSUB231PSZr = 10671, |
| 10685 | VFMSUB231PSZrb = 10672, |
| 10686 | VFMSUB231PSZrbk = 10673, |
| 10687 | VFMSUB231PSZrbkz = 10674, |
| 10688 | VFMSUB231PSZrk = 10675, |
| 10689 | VFMSUB231PSZrkz = 10676, |
| 10690 | VFMSUB231PSm = 10677, |
| 10691 | VFMSUB231PSr = 10678, |
| 10692 | VFMSUB231SDZm = 10679, |
| 10693 | VFMSUB231SDZm_Int = 10680, |
| 10694 | VFMSUB231SDZmk_Int = 10681, |
| 10695 | VFMSUB231SDZmkz_Int = 10682, |
| 10696 | VFMSUB231SDZr = 10683, |
| 10697 | VFMSUB231SDZr_Int = 10684, |
| 10698 | VFMSUB231SDZrb = 10685, |
| 10699 | VFMSUB231SDZrb_Int = 10686, |
| 10700 | VFMSUB231SDZrbk_Int = 10687, |
| 10701 | VFMSUB231SDZrbkz_Int = 10688, |
| 10702 | VFMSUB231SDZrk_Int = 10689, |
| 10703 | VFMSUB231SDZrkz_Int = 10690, |
| 10704 | VFMSUB231SDm = 10691, |
| 10705 | VFMSUB231SDm_Int = 10692, |
| 10706 | VFMSUB231SDr = 10693, |
| 10707 | VFMSUB231SDr_Int = 10694, |
| 10708 | VFMSUB231SHZm = 10695, |
| 10709 | VFMSUB231SHZm_Int = 10696, |
| 10710 | VFMSUB231SHZmk_Int = 10697, |
| 10711 | VFMSUB231SHZmkz_Int = 10698, |
| 10712 | VFMSUB231SHZr = 10699, |
| 10713 | VFMSUB231SHZr_Int = 10700, |
| 10714 | VFMSUB231SHZrb = 10701, |
| 10715 | VFMSUB231SHZrb_Int = 10702, |
| 10716 | VFMSUB231SHZrbk_Int = 10703, |
| 10717 | VFMSUB231SHZrbkz_Int = 10704, |
| 10718 | VFMSUB231SHZrk_Int = 10705, |
| 10719 | VFMSUB231SHZrkz_Int = 10706, |
| 10720 | VFMSUB231SSZm = 10707, |
| 10721 | VFMSUB231SSZm_Int = 10708, |
| 10722 | VFMSUB231SSZmk_Int = 10709, |
| 10723 | VFMSUB231SSZmkz_Int = 10710, |
| 10724 | VFMSUB231SSZr = 10711, |
| 10725 | VFMSUB231SSZr_Int = 10712, |
| 10726 | VFMSUB231SSZrb = 10713, |
| 10727 | VFMSUB231SSZrb_Int = 10714, |
| 10728 | VFMSUB231SSZrbk_Int = 10715, |
| 10729 | VFMSUB231SSZrbkz_Int = 10716, |
| 10730 | VFMSUB231SSZrk_Int = 10717, |
| 10731 | VFMSUB231SSZrkz_Int = 10718, |
| 10732 | VFMSUB231SSm = 10719, |
| 10733 | VFMSUB231SSm_Int = 10720, |
| 10734 | VFMSUB231SSr = 10721, |
| 10735 | VFMSUB231SSr_Int = 10722, |
| 10736 | VFMSUBADD132PDYm = 10723, |
| 10737 | VFMSUBADD132PDYr = 10724, |
| 10738 | VFMSUBADD132PDZ128m = 10725, |
| 10739 | VFMSUBADD132PDZ128mb = 10726, |
| 10740 | VFMSUBADD132PDZ128mbk = 10727, |
| 10741 | VFMSUBADD132PDZ128mbkz = 10728, |
| 10742 | VFMSUBADD132PDZ128mk = 10729, |
| 10743 | VFMSUBADD132PDZ128mkz = 10730, |
| 10744 | VFMSUBADD132PDZ128r = 10731, |
| 10745 | VFMSUBADD132PDZ128rk = 10732, |
| 10746 | VFMSUBADD132PDZ128rkz = 10733, |
| 10747 | VFMSUBADD132PDZ256m = 10734, |
| 10748 | VFMSUBADD132PDZ256mb = 10735, |
| 10749 | VFMSUBADD132PDZ256mbk = 10736, |
| 10750 | VFMSUBADD132PDZ256mbkz = 10737, |
| 10751 | VFMSUBADD132PDZ256mk = 10738, |
| 10752 | VFMSUBADD132PDZ256mkz = 10739, |
| 10753 | VFMSUBADD132PDZ256r = 10740, |
| 10754 | VFMSUBADD132PDZ256rk = 10741, |
| 10755 | VFMSUBADD132PDZ256rkz = 10742, |
| 10756 | VFMSUBADD132PDZm = 10743, |
| 10757 | VFMSUBADD132PDZmb = 10744, |
| 10758 | VFMSUBADD132PDZmbk = 10745, |
| 10759 | VFMSUBADD132PDZmbkz = 10746, |
| 10760 | VFMSUBADD132PDZmk = 10747, |
| 10761 | VFMSUBADD132PDZmkz = 10748, |
| 10762 | VFMSUBADD132PDZr = 10749, |
| 10763 | VFMSUBADD132PDZrb = 10750, |
| 10764 | VFMSUBADD132PDZrbk = 10751, |
| 10765 | VFMSUBADD132PDZrbkz = 10752, |
| 10766 | VFMSUBADD132PDZrk = 10753, |
| 10767 | VFMSUBADD132PDZrkz = 10754, |
| 10768 | VFMSUBADD132PDm = 10755, |
| 10769 | VFMSUBADD132PDr = 10756, |
| 10770 | VFMSUBADD132PHZ128m = 10757, |
| 10771 | VFMSUBADD132PHZ128mb = 10758, |
| 10772 | VFMSUBADD132PHZ128mbk = 10759, |
| 10773 | VFMSUBADD132PHZ128mbkz = 10760, |
| 10774 | VFMSUBADD132PHZ128mk = 10761, |
| 10775 | VFMSUBADD132PHZ128mkz = 10762, |
| 10776 | VFMSUBADD132PHZ128r = 10763, |
| 10777 | VFMSUBADD132PHZ128rk = 10764, |
| 10778 | VFMSUBADD132PHZ128rkz = 10765, |
| 10779 | VFMSUBADD132PHZ256m = 10766, |
| 10780 | VFMSUBADD132PHZ256mb = 10767, |
| 10781 | VFMSUBADD132PHZ256mbk = 10768, |
| 10782 | VFMSUBADD132PHZ256mbkz = 10769, |
| 10783 | VFMSUBADD132PHZ256mk = 10770, |
| 10784 | VFMSUBADD132PHZ256mkz = 10771, |
| 10785 | VFMSUBADD132PHZ256r = 10772, |
| 10786 | VFMSUBADD132PHZ256rk = 10773, |
| 10787 | VFMSUBADD132PHZ256rkz = 10774, |
| 10788 | VFMSUBADD132PHZm = 10775, |
| 10789 | VFMSUBADD132PHZmb = 10776, |
| 10790 | VFMSUBADD132PHZmbk = 10777, |
| 10791 | VFMSUBADD132PHZmbkz = 10778, |
| 10792 | VFMSUBADD132PHZmk = 10779, |
| 10793 | VFMSUBADD132PHZmkz = 10780, |
| 10794 | VFMSUBADD132PHZr = 10781, |
| 10795 | VFMSUBADD132PHZrb = 10782, |
| 10796 | VFMSUBADD132PHZrbk = 10783, |
| 10797 | VFMSUBADD132PHZrbkz = 10784, |
| 10798 | VFMSUBADD132PHZrk = 10785, |
| 10799 | VFMSUBADD132PHZrkz = 10786, |
| 10800 | VFMSUBADD132PSYm = 10787, |
| 10801 | VFMSUBADD132PSYr = 10788, |
| 10802 | VFMSUBADD132PSZ128m = 10789, |
| 10803 | VFMSUBADD132PSZ128mb = 10790, |
| 10804 | VFMSUBADD132PSZ128mbk = 10791, |
| 10805 | VFMSUBADD132PSZ128mbkz = 10792, |
| 10806 | VFMSUBADD132PSZ128mk = 10793, |
| 10807 | VFMSUBADD132PSZ128mkz = 10794, |
| 10808 | VFMSUBADD132PSZ128r = 10795, |
| 10809 | VFMSUBADD132PSZ128rk = 10796, |
| 10810 | VFMSUBADD132PSZ128rkz = 10797, |
| 10811 | VFMSUBADD132PSZ256m = 10798, |
| 10812 | VFMSUBADD132PSZ256mb = 10799, |
| 10813 | VFMSUBADD132PSZ256mbk = 10800, |
| 10814 | VFMSUBADD132PSZ256mbkz = 10801, |
| 10815 | VFMSUBADD132PSZ256mk = 10802, |
| 10816 | VFMSUBADD132PSZ256mkz = 10803, |
| 10817 | VFMSUBADD132PSZ256r = 10804, |
| 10818 | VFMSUBADD132PSZ256rk = 10805, |
| 10819 | VFMSUBADD132PSZ256rkz = 10806, |
| 10820 | VFMSUBADD132PSZm = 10807, |
| 10821 | VFMSUBADD132PSZmb = 10808, |
| 10822 | VFMSUBADD132PSZmbk = 10809, |
| 10823 | VFMSUBADD132PSZmbkz = 10810, |
| 10824 | VFMSUBADD132PSZmk = 10811, |
| 10825 | VFMSUBADD132PSZmkz = 10812, |
| 10826 | VFMSUBADD132PSZr = 10813, |
| 10827 | VFMSUBADD132PSZrb = 10814, |
| 10828 | VFMSUBADD132PSZrbk = 10815, |
| 10829 | VFMSUBADD132PSZrbkz = 10816, |
| 10830 | VFMSUBADD132PSZrk = 10817, |
| 10831 | VFMSUBADD132PSZrkz = 10818, |
| 10832 | VFMSUBADD132PSm = 10819, |
| 10833 | VFMSUBADD132PSr = 10820, |
| 10834 | VFMSUBADD213PDYm = 10821, |
| 10835 | VFMSUBADD213PDYr = 10822, |
| 10836 | VFMSUBADD213PDZ128m = 10823, |
| 10837 | VFMSUBADD213PDZ128mb = 10824, |
| 10838 | VFMSUBADD213PDZ128mbk = 10825, |
| 10839 | VFMSUBADD213PDZ128mbkz = 10826, |
| 10840 | VFMSUBADD213PDZ128mk = 10827, |
| 10841 | VFMSUBADD213PDZ128mkz = 10828, |
| 10842 | VFMSUBADD213PDZ128r = 10829, |
| 10843 | VFMSUBADD213PDZ128rk = 10830, |
| 10844 | VFMSUBADD213PDZ128rkz = 10831, |
| 10845 | VFMSUBADD213PDZ256m = 10832, |
| 10846 | VFMSUBADD213PDZ256mb = 10833, |
| 10847 | VFMSUBADD213PDZ256mbk = 10834, |
| 10848 | VFMSUBADD213PDZ256mbkz = 10835, |
| 10849 | VFMSUBADD213PDZ256mk = 10836, |
| 10850 | VFMSUBADD213PDZ256mkz = 10837, |
| 10851 | VFMSUBADD213PDZ256r = 10838, |
| 10852 | VFMSUBADD213PDZ256rk = 10839, |
| 10853 | VFMSUBADD213PDZ256rkz = 10840, |
| 10854 | VFMSUBADD213PDZm = 10841, |
| 10855 | VFMSUBADD213PDZmb = 10842, |
| 10856 | VFMSUBADD213PDZmbk = 10843, |
| 10857 | VFMSUBADD213PDZmbkz = 10844, |
| 10858 | VFMSUBADD213PDZmk = 10845, |
| 10859 | VFMSUBADD213PDZmkz = 10846, |
| 10860 | VFMSUBADD213PDZr = 10847, |
| 10861 | VFMSUBADD213PDZrb = 10848, |
| 10862 | VFMSUBADD213PDZrbk = 10849, |
| 10863 | VFMSUBADD213PDZrbkz = 10850, |
| 10864 | VFMSUBADD213PDZrk = 10851, |
| 10865 | VFMSUBADD213PDZrkz = 10852, |
| 10866 | VFMSUBADD213PDm = 10853, |
| 10867 | VFMSUBADD213PDr = 10854, |
| 10868 | VFMSUBADD213PHZ128m = 10855, |
| 10869 | VFMSUBADD213PHZ128mb = 10856, |
| 10870 | VFMSUBADD213PHZ128mbk = 10857, |
| 10871 | VFMSUBADD213PHZ128mbkz = 10858, |
| 10872 | VFMSUBADD213PHZ128mk = 10859, |
| 10873 | VFMSUBADD213PHZ128mkz = 10860, |
| 10874 | VFMSUBADD213PHZ128r = 10861, |
| 10875 | VFMSUBADD213PHZ128rk = 10862, |
| 10876 | VFMSUBADD213PHZ128rkz = 10863, |
| 10877 | VFMSUBADD213PHZ256m = 10864, |
| 10878 | VFMSUBADD213PHZ256mb = 10865, |
| 10879 | VFMSUBADD213PHZ256mbk = 10866, |
| 10880 | VFMSUBADD213PHZ256mbkz = 10867, |
| 10881 | VFMSUBADD213PHZ256mk = 10868, |
| 10882 | VFMSUBADD213PHZ256mkz = 10869, |
| 10883 | VFMSUBADD213PHZ256r = 10870, |
| 10884 | VFMSUBADD213PHZ256rk = 10871, |
| 10885 | VFMSUBADD213PHZ256rkz = 10872, |
| 10886 | VFMSUBADD213PHZm = 10873, |
| 10887 | VFMSUBADD213PHZmb = 10874, |
| 10888 | VFMSUBADD213PHZmbk = 10875, |
| 10889 | VFMSUBADD213PHZmbkz = 10876, |
| 10890 | VFMSUBADD213PHZmk = 10877, |
| 10891 | VFMSUBADD213PHZmkz = 10878, |
| 10892 | VFMSUBADD213PHZr = 10879, |
| 10893 | VFMSUBADD213PHZrb = 10880, |
| 10894 | VFMSUBADD213PHZrbk = 10881, |
| 10895 | VFMSUBADD213PHZrbkz = 10882, |
| 10896 | VFMSUBADD213PHZrk = 10883, |
| 10897 | VFMSUBADD213PHZrkz = 10884, |
| 10898 | VFMSUBADD213PSYm = 10885, |
| 10899 | VFMSUBADD213PSYr = 10886, |
| 10900 | VFMSUBADD213PSZ128m = 10887, |
| 10901 | VFMSUBADD213PSZ128mb = 10888, |
| 10902 | VFMSUBADD213PSZ128mbk = 10889, |
| 10903 | VFMSUBADD213PSZ128mbkz = 10890, |
| 10904 | VFMSUBADD213PSZ128mk = 10891, |
| 10905 | VFMSUBADD213PSZ128mkz = 10892, |
| 10906 | VFMSUBADD213PSZ128r = 10893, |
| 10907 | VFMSUBADD213PSZ128rk = 10894, |
| 10908 | VFMSUBADD213PSZ128rkz = 10895, |
| 10909 | VFMSUBADD213PSZ256m = 10896, |
| 10910 | VFMSUBADD213PSZ256mb = 10897, |
| 10911 | VFMSUBADD213PSZ256mbk = 10898, |
| 10912 | VFMSUBADD213PSZ256mbkz = 10899, |
| 10913 | VFMSUBADD213PSZ256mk = 10900, |
| 10914 | VFMSUBADD213PSZ256mkz = 10901, |
| 10915 | VFMSUBADD213PSZ256r = 10902, |
| 10916 | VFMSUBADD213PSZ256rk = 10903, |
| 10917 | VFMSUBADD213PSZ256rkz = 10904, |
| 10918 | VFMSUBADD213PSZm = 10905, |
| 10919 | VFMSUBADD213PSZmb = 10906, |
| 10920 | VFMSUBADD213PSZmbk = 10907, |
| 10921 | VFMSUBADD213PSZmbkz = 10908, |
| 10922 | VFMSUBADD213PSZmk = 10909, |
| 10923 | VFMSUBADD213PSZmkz = 10910, |
| 10924 | VFMSUBADD213PSZr = 10911, |
| 10925 | VFMSUBADD213PSZrb = 10912, |
| 10926 | VFMSUBADD213PSZrbk = 10913, |
| 10927 | VFMSUBADD213PSZrbkz = 10914, |
| 10928 | VFMSUBADD213PSZrk = 10915, |
| 10929 | VFMSUBADD213PSZrkz = 10916, |
| 10930 | VFMSUBADD213PSm = 10917, |
| 10931 | VFMSUBADD213PSr = 10918, |
| 10932 | VFMSUBADD231PDYm = 10919, |
| 10933 | VFMSUBADD231PDYr = 10920, |
| 10934 | VFMSUBADD231PDZ128m = 10921, |
| 10935 | VFMSUBADD231PDZ128mb = 10922, |
| 10936 | VFMSUBADD231PDZ128mbk = 10923, |
| 10937 | VFMSUBADD231PDZ128mbkz = 10924, |
| 10938 | VFMSUBADD231PDZ128mk = 10925, |
| 10939 | VFMSUBADD231PDZ128mkz = 10926, |
| 10940 | VFMSUBADD231PDZ128r = 10927, |
| 10941 | VFMSUBADD231PDZ128rk = 10928, |
| 10942 | VFMSUBADD231PDZ128rkz = 10929, |
| 10943 | VFMSUBADD231PDZ256m = 10930, |
| 10944 | VFMSUBADD231PDZ256mb = 10931, |
| 10945 | VFMSUBADD231PDZ256mbk = 10932, |
| 10946 | VFMSUBADD231PDZ256mbkz = 10933, |
| 10947 | VFMSUBADD231PDZ256mk = 10934, |
| 10948 | VFMSUBADD231PDZ256mkz = 10935, |
| 10949 | VFMSUBADD231PDZ256r = 10936, |
| 10950 | VFMSUBADD231PDZ256rk = 10937, |
| 10951 | VFMSUBADD231PDZ256rkz = 10938, |
| 10952 | VFMSUBADD231PDZm = 10939, |
| 10953 | VFMSUBADD231PDZmb = 10940, |
| 10954 | VFMSUBADD231PDZmbk = 10941, |
| 10955 | VFMSUBADD231PDZmbkz = 10942, |
| 10956 | VFMSUBADD231PDZmk = 10943, |
| 10957 | VFMSUBADD231PDZmkz = 10944, |
| 10958 | VFMSUBADD231PDZr = 10945, |
| 10959 | VFMSUBADD231PDZrb = 10946, |
| 10960 | VFMSUBADD231PDZrbk = 10947, |
| 10961 | VFMSUBADD231PDZrbkz = 10948, |
| 10962 | VFMSUBADD231PDZrk = 10949, |
| 10963 | VFMSUBADD231PDZrkz = 10950, |
| 10964 | VFMSUBADD231PDm = 10951, |
| 10965 | VFMSUBADD231PDr = 10952, |
| 10966 | VFMSUBADD231PHZ128m = 10953, |
| 10967 | VFMSUBADD231PHZ128mb = 10954, |
| 10968 | VFMSUBADD231PHZ128mbk = 10955, |
| 10969 | VFMSUBADD231PHZ128mbkz = 10956, |
| 10970 | VFMSUBADD231PHZ128mk = 10957, |
| 10971 | VFMSUBADD231PHZ128mkz = 10958, |
| 10972 | VFMSUBADD231PHZ128r = 10959, |
| 10973 | VFMSUBADD231PHZ128rk = 10960, |
| 10974 | VFMSUBADD231PHZ128rkz = 10961, |
| 10975 | VFMSUBADD231PHZ256m = 10962, |
| 10976 | VFMSUBADD231PHZ256mb = 10963, |
| 10977 | VFMSUBADD231PHZ256mbk = 10964, |
| 10978 | VFMSUBADD231PHZ256mbkz = 10965, |
| 10979 | VFMSUBADD231PHZ256mk = 10966, |
| 10980 | VFMSUBADD231PHZ256mkz = 10967, |
| 10981 | VFMSUBADD231PHZ256r = 10968, |
| 10982 | VFMSUBADD231PHZ256rk = 10969, |
| 10983 | VFMSUBADD231PHZ256rkz = 10970, |
| 10984 | VFMSUBADD231PHZm = 10971, |
| 10985 | VFMSUBADD231PHZmb = 10972, |
| 10986 | VFMSUBADD231PHZmbk = 10973, |
| 10987 | VFMSUBADD231PHZmbkz = 10974, |
| 10988 | VFMSUBADD231PHZmk = 10975, |
| 10989 | VFMSUBADD231PHZmkz = 10976, |
| 10990 | VFMSUBADD231PHZr = 10977, |
| 10991 | VFMSUBADD231PHZrb = 10978, |
| 10992 | VFMSUBADD231PHZrbk = 10979, |
| 10993 | VFMSUBADD231PHZrbkz = 10980, |
| 10994 | VFMSUBADD231PHZrk = 10981, |
| 10995 | VFMSUBADD231PHZrkz = 10982, |
| 10996 | VFMSUBADD231PSYm = 10983, |
| 10997 | VFMSUBADD231PSYr = 10984, |
| 10998 | VFMSUBADD231PSZ128m = 10985, |
| 10999 | VFMSUBADD231PSZ128mb = 10986, |
| 11000 | VFMSUBADD231PSZ128mbk = 10987, |
| 11001 | VFMSUBADD231PSZ128mbkz = 10988, |
| 11002 | VFMSUBADD231PSZ128mk = 10989, |
| 11003 | VFMSUBADD231PSZ128mkz = 10990, |
| 11004 | VFMSUBADD231PSZ128r = 10991, |
| 11005 | VFMSUBADD231PSZ128rk = 10992, |
| 11006 | VFMSUBADD231PSZ128rkz = 10993, |
| 11007 | VFMSUBADD231PSZ256m = 10994, |
| 11008 | VFMSUBADD231PSZ256mb = 10995, |
| 11009 | VFMSUBADD231PSZ256mbk = 10996, |
| 11010 | VFMSUBADD231PSZ256mbkz = 10997, |
| 11011 | VFMSUBADD231PSZ256mk = 10998, |
| 11012 | VFMSUBADD231PSZ256mkz = 10999, |
| 11013 | VFMSUBADD231PSZ256r = 11000, |
| 11014 | VFMSUBADD231PSZ256rk = 11001, |
| 11015 | VFMSUBADD231PSZ256rkz = 11002, |
| 11016 | VFMSUBADD231PSZm = 11003, |
| 11017 | VFMSUBADD231PSZmb = 11004, |
| 11018 | VFMSUBADD231PSZmbk = 11005, |
| 11019 | VFMSUBADD231PSZmbkz = 11006, |
| 11020 | VFMSUBADD231PSZmk = 11007, |
| 11021 | VFMSUBADD231PSZmkz = 11008, |
| 11022 | VFMSUBADD231PSZr = 11009, |
| 11023 | VFMSUBADD231PSZrb = 11010, |
| 11024 | VFMSUBADD231PSZrbk = 11011, |
| 11025 | VFMSUBADD231PSZrbkz = 11012, |
| 11026 | VFMSUBADD231PSZrk = 11013, |
| 11027 | VFMSUBADD231PSZrkz = 11014, |
| 11028 | VFMSUBADD231PSm = 11015, |
| 11029 | VFMSUBADD231PSr = 11016, |
| 11030 | VFMSUBADDPD4Ymr = 11017, |
| 11031 | VFMSUBADDPD4Yrm = 11018, |
| 11032 | VFMSUBADDPD4Yrr = 11019, |
| 11033 | VFMSUBADDPD4Yrr_REV = 11020, |
| 11034 | VFMSUBADDPD4mr = 11021, |
| 11035 | VFMSUBADDPD4rm = 11022, |
| 11036 | VFMSUBADDPD4rr = 11023, |
| 11037 | VFMSUBADDPD4rr_REV = 11024, |
| 11038 | VFMSUBADDPS4Ymr = 11025, |
| 11039 | VFMSUBADDPS4Yrm = 11026, |
| 11040 | VFMSUBADDPS4Yrr = 11027, |
| 11041 | VFMSUBADDPS4Yrr_REV = 11028, |
| 11042 | VFMSUBADDPS4mr = 11029, |
| 11043 | VFMSUBADDPS4rm = 11030, |
| 11044 | VFMSUBADDPS4rr = 11031, |
| 11045 | VFMSUBADDPS4rr_REV = 11032, |
| 11046 | VFMSUBPD4Ymr = 11033, |
| 11047 | VFMSUBPD4Yrm = 11034, |
| 11048 | VFMSUBPD4Yrr = 11035, |
| 11049 | VFMSUBPD4Yrr_REV = 11036, |
| 11050 | VFMSUBPD4mr = 11037, |
| 11051 | VFMSUBPD4rm = 11038, |
| 11052 | VFMSUBPD4rr = 11039, |
| 11053 | VFMSUBPD4rr_REV = 11040, |
| 11054 | VFMSUBPS4Ymr = 11041, |
| 11055 | VFMSUBPS4Yrm = 11042, |
| 11056 | VFMSUBPS4Yrr = 11043, |
| 11057 | VFMSUBPS4Yrr_REV = 11044, |
| 11058 | VFMSUBPS4mr = 11045, |
| 11059 | VFMSUBPS4rm = 11046, |
| 11060 | VFMSUBPS4rr = 11047, |
| 11061 | VFMSUBPS4rr_REV = 11048, |
| 11062 | VFMSUBSD4mr = 11049, |
| 11063 | VFMSUBSD4mr_Int = 11050, |
| 11064 | VFMSUBSD4rm = 11051, |
| 11065 | VFMSUBSD4rm_Int = 11052, |
| 11066 | VFMSUBSD4rr = 11053, |
| 11067 | VFMSUBSD4rr_Int = 11054, |
| 11068 | VFMSUBSD4rr_Int_REV = 11055, |
| 11069 | VFMSUBSD4rr_REV = 11056, |
| 11070 | VFMSUBSS4mr = 11057, |
| 11071 | VFMSUBSS4mr_Int = 11058, |
| 11072 | VFMSUBSS4rm = 11059, |
| 11073 | VFMSUBSS4rm_Int = 11060, |
| 11074 | VFMSUBSS4rr = 11061, |
| 11075 | VFMSUBSS4rr_Int = 11062, |
| 11076 | VFMSUBSS4rr_Int_REV = 11063, |
| 11077 | VFMSUBSS4rr_REV = 11064, |
| 11078 | VFMULCPHZ128rm = 11065, |
| 11079 | VFMULCPHZ128rmb = 11066, |
| 11080 | VFMULCPHZ128rmbk = 11067, |
| 11081 | VFMULCPHZ128rmbkz = 11068, |
| 11082 | VFMULCPHZ128rmk = 11069, |
| 11083 | VFMULCPHZ128rmkz = 11070, |
| 11084 | VFMULCPHZ128rr = 11071, |
| 11085 | VFMULCPHZ128rrk = 11072, |
| 11086 | VFMULCPHZ128rrkz = 11073, |
| 11087 | VFMULCPHZ256rm = 11074, |
| 11088 | VFMULCPHZ256rmb = 11075, |
| 11089 | VFMULCPHZ256rmbk = 11076, |
| 11090 | VFMULCPHZ256rmbkz = 11077, |
| 11091 | VFMULCPHZ256rmk = 11078, |
| 11092 | VFMULCPHZ256rmkz = 11079, |
| 11093 | VFMULCPHZ256rr = 11080, |
| 11094 | VFMULCPHZ256rrk = 11081, |
| 11095 | VFMULCPHZ256rrkz = 11082, |
| 11096 | VFMULCPHZrm = 11083, |
| 11097 | VFMULCPHZrmb = 11084, |
| 11098 | VFMULCPHZrmbk = 11085, |
| 11099 | VFMULCPHZrmbkz = 11086, |
| 11100 | VFMULCPHZrmk = 11087, |
| 11101 | VFMULCPHZrmkz = 11088, |
| 11102 | VFMULCPHZrr = 11089, |
| 11103 | VFMULCPHZrrb = 11090, |
| 11104 | VFMULCPHZrrbk = 11091, |
| 11105 | VFMULCPHZrrbkz = 11092, |
| 11106 | VFMULCPHZrrk = 11093, |
| 11107 | VFMULCPHZrrkz = 11094, |
| 11108 | VFMULCSHZrm = 11095, |
| 11109 | VFMULCSHZrmk = 11096, |
| 11110 | VFMULCSHZrmkz = 11097, |
| 11111 | VFMULCSHZrr = 11098, |
| 11112 | VFMULCSHZrrb = 11099, |
| 11113 | VFMULCSHZrrbk = 11100, |
| 11114 | VFMULCSHZrrbkz = 11101, |
| 11115 | VFMULCSHZrrk = 11102, |
| 11116 | VFMULCSHZrrkz = 11103, |
| 11117 | VFNMADD132BF16Z128m = 11104, |
| 11118 | VFNMADD132BF16Z128mb = 11105, |
| 11119 | VFNMADD132BF16Z128mbk = 11106, |
| 11120 | VFNMADD132BF16Z128mbkz = 11107, |
| 11121 | VFNMADD132BF16Z128mk = 11108, |
| 11122 | VFNMADD132BF16Z128mkz = 11109, |
| 11123 | VFNMADD132BF16Z128r = 11110, |
| 11124 | VFNMADD132BF16Z128rk = 11111, |
| 11125 | VFNMADD132BF16Z128rkz = 11112, |
| 11126 | VFNMADD132BF16Z256m = 11113, |
| 11127 | VFNMADD132BF16Z256mb = 11114, |
| 11128 | VFNMADD132BF16Z256mbk = 11115, |
| 11129 | VFNMADD132BF16Z256mbkz = 11116, |
| 11130 | VFNMADD132BF16Z256mk = 11117, |
| 11131 | VFNMADD132BF16Z256mkz = 11118, |
| 11132 | VFNMADD132BF16Z256r = 11119, |
| 11133 | VFNMADD132BF16Z256rk = 11120, |
| 11134 | VFNMADD132BF16Z256rkz = 11121, |
| 11135 | VFNMADD132BF16Zm = 11122, |
| 11136 | VFNMADD132BF16Zmb = 11123, |
| 11137 | VFNMADD132BF16Zmbk = 11124, |
| 11138 | VFNMADD132BF16Zmbkz = 11125, |
| 11139 | VFNMADD132BF16Zmk = 11126, |
| 11140 | VFNMADD132BF16Zmkz = 11127, |
| 11141 | VFNMADD132BF16Zr = 11128, |
| 11142 | VFNMADD132BF16Zrk = 11129, |
| 11143 | VFNMADD132BF16Zrkz = 11130, |
| 11144 | VFNMADD132PDYm = 11131, |
| 11145 | VFNMADD132PDYr = 11132, |
| 11146 | VFNMADD132PDZ128m = 11133, |
| 11147 | VFNMADD132PDZ128mb = 11134, |
| 11148 | VFNMADD132PDZ128mbk = 11135, |
| 11149 | VFNMADD132PDZ128mbkz = 11136, |
| 11150 | VFNMADD132PDZ128mk = 11137, |
| 11151 | VFNMADD132PDZ128mkz = 11138, |
| 11152 | VFNMADD132PDZ128r = 11139, |
| 11153 | VFNMADD132PDZ128rk = 11140, |
| 11154 | VFNMADD132PDZ128rkz = 11141, |
| 11155 | VFNMADD132PDZ256m = 11142, |
| 11156 | VFNMADD132PDZ256mb = 11143, |
| 11157 | VFNMADD132PDZ256mbk = 11144, |
| 11158 | VFNMADD132PDZ256mbkz = 11145, |
| 11159 | VFNMADD132PDZ256mk = 11146, |
| 11160 | VFNMADD132PDZ256mkz = 11147, |
| 11161 | VFNMADD132PDZ256r = 11148, |
| 11162 | VFNMADD132PDZ256rk = 11149, |
| 11163 | VFNMADD132PDZ256rkz = 11150, |
| 11164 | VFNMADD132PDZm = 11151, |
| 11165 | VFNMADD132PDZmb = 11152, |
| 11166 | VFNMADD132PDZmbk = 11153, |
| 11167 | VFNMADD132PDZmbkz = 11154, |
| 11168 | VFNMADD132PDZmk = 11155, |
| 11169 | VFNMADD132PDZmkz = 11156, |
| 11170 | VFNMADD132PDZr = 11157, |
| 11171 | VFNMADD132PDZrb = 11158, |
| 11172 | VFNMADD132PDZrbk = 11159, |
| 11173 | VFNMADD132PDZrbkz = 11160, |
| 11174 | VFNMADD132PDZrk = 11161, |
| 11175 | VFNMADD132PDZrkz = 11162, |
| 11176 | VFNMADD132PDm = 11163, |
| 11177 | VFNMADD132PDr = 11164, |
| 11178 | VFNMADD132PHZ128m = 11165, |
| 11179 | VFNMADD132PHZ128mb = 11166, |
| 11180 | VFNMADD132PHZ128mbk = 11167, |
| 11181 | VFNMADD132PHZ128mbkz = 11168, |
| 11182 | VFNMADD132PHZ128mk = 11169, |
| 11183 | VFNMADD132PHZ128mkz = 11170, |
| 11184 | VFNMADD132PHZ128r = 11171, |
| 11185 | VFNMADD132PHZ128rk = 11172, |
| 11186 | VFNMADD132PHZ128rkz = 11173, |
| 11187 | VFNMADD132PHZ256m = 11174, |
| 11188 | VFNMADD132PHZ256mb = 11175, |
| 11189 | VFNMADD132PHZ256mbk = 11176, |
| 11190 | VFNMADD132PHZ256mbkz = 11177, |
| 11191 | VFNMADD132PHZ256mk = 11178, |
| 11192 | VFNMADD132PHZ256mkz = 11179, |
| 11193 | VFNMADD132PHZ256r = 11180, |
| 11194 | VFNMADD132PHZ256rk = 11181, |
| 11195 | VFNMADD132PHZ256rkz = 11182, |
| 11196 | VFNMADD132PHZm = 11183, |
| 11197 | VFNMADD132PHZmb = 11184, |
| 11198 | VFNMADD132PHZmbk = 11185, |
| 11199 | VFNMADD132PHZmbkz = 11186, |
| 11200 | VFNMADD132PHZmk = 11187, |
| 11201 | VFNMADD132PHZmkz = 11188, |
| 11202 | VFNMADD132PHZr = 11189, |
| 11203 | VFNMADD132PHZrb = 11190, |
| 11204 | VFNMADD132PHZrbk = 11191, |
| 11205 | VFNMADD132PHZrbkz = 11192, |
| 11206 | VFNMADD132PHZrk = 11193, |
| 11207 | VFNMADD132PHZrkz = 11194, |
| 11208 | VFNMADD132PSYm = 11195, |
| 11209 | VFNMADD132PSYr = 11196, |
| 11210 | VFNMADD132PSZ128m = 11197, |
| 11211 | VFNMADD132PSZ128mb = 11198, |
| 11212 | VFNMADD132PSZ128mbk = 11199, |
| 11213 | VFNMADD132PSZ128mbkz = 11200, |
| 11214 | VFNMADD132PSZ128mk = 11201, |
| 11215 | VFNMADD132PSZ128mkz = 11202, |
| 11216 | VFNMADD132PSZ128r = 11203, |
| 11217 | VFNMADD132PSZ128rk = 11204, |
| 11218 | VFNMADD132PSZ128rkz = 11205, |
| 11219 | VFNMADD132PSZ256m = 11206, |
| 11220 | VFNMADD132PSZ256mb = 11207, |
| 11221 | VFNMADD132PSZ256mbk = 11208, |
| 11222 | VFNMADD132PSZ256mbkz = 11209, |
| 11223 | VFNMADD132PSZ256mk = 11210, |
| 11224 | VFNMADD132PSZ256mkz = 11211, |
| 11225 | VFNMADD132PSZ256r = 11212, |
| 11226 | VFNMADD132PSZ256rk = 11213, |
| 11227 | VFNMADD132PSZ256rkz = 11214, |
| 11228 | VFNMADD132PSZm = 11215, |
| 11229 | VFNMADD132PSZmb = 11216, |
| 11230 | VFNMADD132PSZmbk = 11217, |
| 11231 | VFNMADD132PSZmbkz = 11218, |
| 11232 | VFNMADD132PSZmk = 11219, |
| 11233 | VFNMADD132PSZmkz = 11220, |
| 11234 | VFNMADD132PSZr = 11221, |
| 11235 | VFNMADD132PSZrb = 11222, |
| 11236 | VFNMADD132PSZrbk = 11223, |
| 11237 | VFNMADD132PSZrbkz = 11224, |
| 11238 | VFNMADD132PSZrk = 11225, |
| 11239 | VFNMADD132PSZrkz = 11226, |
| 11240 | VFNMADD132PSm = 11227, |
| 11241 | VFNMADD132PSr = 11228, |
| 11242 | VFNMADD132SDZm = 11229, |
| 11243 | VFNMADD132SDZm_Int = 11230, |
| 11244 | VFNMADD132SDZmk_Int = 11231, |
| 11245 | VFNMADD132SDZmkz_Int = 11232, |
| 11246 | VFNMADD132SDZr = 11233, |
| 11247 | VFNMADD132SDZr_Int = 11234, |
| 11248 | VFNMADD132SDZrb = 11235, |
| 11249 | VFNMADD132SDZrb_Int = 11236, |
| 11250 | VFNMADD132SDZrbk_Int = 11237, |
| 11251 | VFNMADD132SDZrbkz_Int = 11238, |
| 11252 | VFNMADD132SDZrk_Int = 11239, |
| 11253 | VFNMADD132SDZrkz_Int = 11240, |
| 11254 | VFNMADD132SDm = 11241, |
| 11255 | VFNMADD132SDm_Int = 11242, |
| 11256 | VFNMADD132SDr = 11243, |
| 11257 | VFNMADD132SDr_Int = 11244, |
| 11258 | VFNMADD132SHZm = 11245, |
| 11259 | VFNMADD132SHZm_Int = 11246, |
| 11260 | VFNMADD132SHZmk_Int = 11247, |
| 11261 | VFNMADD132SHZmkz_Int = 11248, |
| 11262 | VFNMADD132SHZr = 11249, |
| 11263 | VFNMADD132SHZr_Int = 11250, |
| 11264 | VFNMADD132SHZrb = 11251, |
| 11265 | VFNMADD132SHZrb_Int = 11252, |
| 11266 | VFNMADD132SHZrbk_Int = 11253, |
| 11267 | VFNMADD132SHZrbkz_Int = 11254, |
| 11268 | VFNMADD132SHZrk_Int = 11255, |
| 11269 | VFNMADD132SHZrkz_Int = 11256, |
| 11270 | VFNMADD132SSZm = 11257, |
| 11271 | VFNMADD132SSZm_Int = 11258, |
| 11272 | VFNMADD132SSZmk_Int = 11259, |
| 11273 | VFNMADD132SSZmkz_Int = 11260, |
| 11274 | VFNMADD132SSZr = 11261, |
| 11275 | VFNMADD132SSZr_Int = 11262, |
| 11276 | VFNMADD132SSZrb = 11263, |
| 11277 | VFNMADD132SSZrb_Int = 11264, |
| 11278 | VFNMADD132SSZrbk_Int = 11265, |
| 11279 | VFNMADD132SSZrbkz_Int = 11266, |
| 11280 | VFNMADD132SSZrk_Int = 11267, |
| 11281 | VFNMADD132SSZrkz_Int = 11268, |
| 11282 | VFNMADD132SSm = 11269, |
| 11283 | VFNMADD132SSm_Int = 11270, |
| 11284 | VFNMADD132SSr = 11271, |
| 11285 | VFNMADD132SSr_Int = 11272, |
| 11286 | VFNMADD213BF16Z128m = 11273, |
| 11287 | VFNMADD213BF16Z128mb = 11274, |
| 11288 | VFNMADD213BF16Z128mbk = 11275, |
| 11289 | VFNMADD213BF16Z128mbkz = 11276, |
| 11290 | VFNMADD213BF16Z128mk = 11277, |
| 11291 | VFNMADD213BF16Z128mkz = 11278, |
| 11292 | VFNMADD213BF16Z128r = 11279, |
| 11293 | VFNMADD213BF16Z128rk = 11280, |
| 11294 | VFNMADD213BF16Z128rkz = 11281, |
| 11295 | VFNMADD213BF16Z256m = 11282, |
| 11296 | VFNMADD213BF16Z256mb = 11283, |
| 11297 | VFNMADD213BF16Z256mbk = 11284, |
| 11298 | VFNMADD213BF16Z256mbkz = 11285, |
| 11299 | VFNMADD213BF16Z256mk = 11286, |
| 11300 | VFNMADD213BF16Z256mkz = 11287, |
| 11301 | VFNMADD213BF16Z256r = 11288, |
| 11302 | VFNMADD213BF16Z256rk = 11289, |
| 11303 | VFNMADD213BF16Z256rkz = 11290, |
| 11304 | VFNMADD213BF16Zm = 11291, |
| 11305 | VFNMADD213BF16Zmb = 11292, |
| 11306 | VFNMADD213BF16Zmbk = 11293, |
| 11307 | VFNMADD213BF16Zmbkz = 11294, |
| 11308 | VFNMADD213BF16Zmk = 11295, |
| 11309 | VFNMADD213BF16Zmkz = 11296, |
| 11310 | VFNMADD213BF16Zr = 11297, |
| 11311 | VFNMADD213BF16Zrk = 11298, |
| 11312 | VFNMADD213BF16Zrkz = 11299, |
| 11313 | VFNMADD213PDYm = 11300, |
| 11314 | VFNMADD213PDYr = 11301, |
| 11315 | VFNMADD213PDZ128m = 11302, |
| 11316 | VFNMADD213PDZ128mb = 11303, |
| 11317 | VFNMADD213PDZ128mbk = 11304, |
| 11318 | VFNMADD213PDZ128mbkz = 11305, |
| 11319 | VFNMADD213PDZ128mk = 11306, |
| 11320 | VFNMADD213PDZ128mkz = 11307, |
| 11321 | VFNMADD213PDZ128r = 11308, |
| 11322 | VFNMADD213PDZ128rk = 11309, |
| 11323 | VFNMADD213PDZ128rkz = 11310, |
| 11324 | VFNMADD213PDZ256m = 11311, |
| 11325 | VFNMADD213PDZ256mb = 11312, |
| 11326 | VFNMADD213PDZ256mbk = 11313, |
| 11327 | VFNMADD213PDZ256mbkz = 11314, |
| 11328 | VFNMADD213PDZ256mk = 11315, |
| 11329 | VFNMADD213PDZ256mkz = 11316, |
| 11330 | VFNMADD213PDZ256r = 11317, |
| 11331 | VFNMADD213PDZ256rk = 11318, |
| 11332 | VFNMADD213PDZ256rkz = 11319, |
| 11333 | VFNMADD213PDZm = 11320, |
| 11334 | VFNMADD213PDZmb = 11321, |
| 11335 | VFNMADD213PDZmbk = 11322, |
| 11336 | VFNMADD213PDZmbkz = 11323, |
| 11337 | VFNMADD213PDZmk = 11324, |
| 11338 | VFNMADD213PDZmkz = 11325, |
| 11339 | VFNMADD213PDZr = 11326, |
| 11340 | VFNMADD213PDZrb = 11327, |
| 11341 | VFNMADD213PDZrbk = 11328, |
| 11342 | VFNMADD213PDZrbkz = 11329, |
| 11343 | VFNMADD213PDZrk = 11330, |
| 11344 | VFNMADD213PDZrkz = 11331, |
| 11345 | VFNMADD213PDm = 11332, |
| 11346 | VFNMADD213PDr = 11333, |
| 11347 | VFNMADD213PHZ128m = 11334, |
| 11348 | VFNMADD213PHZ128mb = 11335, |
| 11349 | VFNMADD213PHZ128mbk = 11336, |
| 11350 | VFNMADD213PHZ128mbkz = 11337, |
| 11351 | VFNMADD213PHZ128mk = 11338, |
| 11352 | VFNMADD213PHZ128mkz = 11339, |
| 11353 | VFNMADD213PHZ128r = 11340, |
| 11354 | VFNMADD213PHZ128rk = 11341, |
| 11355 | VFNMADD213PHZ128rkz = 11342, |
| 11356 | VFNMADD213PHZ256m = 11343, |
| 11357 | VFNMADD213PHZ256mb = 11344, |
| 11358 | VFNMADD213PHZ256mbk = 11345, |
| 11359 | VFNMADD213PHZ256mbkz = 11346, |
| 11360 | VFNMADD213PHZ256mk = 11347, |
| 11361 | VFNMADD213PHZ256mkz = 11348, |
| 11362 | VFNMADD213PHZ256r = 11349, |
| 11363 | VFNMADD213PHZ256rk = 11350, |
| 11364 | VFNMADD213PHZ256rkz = 11351, |
| 11365 | VFNMADD213PHZm = 11352, |
| 11366 | VFNMADD213PHZmb = 11353, |
| 11367 | VFNMADD213PHZmbk = 11354, |
| 11368 | VFNMADD213PHZmbkz = 11355, |
| 11369 | VFNMADD213PHZmk = 11356, |
| 11370 | VFNMADD213PHZmkz = 11357, |
| 11371 | VFNMADD213PHZr = 11358, |
| 11372 | VFNMADD213PHZrb = 11359, |
| 11373 | VFNMADD213PHZrbk = 11360, |
| 11374 | VFNMADD213PHZrbkz = 11361, |
| 11375 | VFNMADD213PHZrk = 11362, |
| 11376 | VFNMADD213PHZrkz = 11363, |
| 11377 | VFNMADD213PSYm = 11364, |
| 11378 | VFNMADD213PSYr = 11365, |
| 11379 | VFNMADD213PSZ128m = 11366, |
| 11380 | VFNMADD213PSZ128mb = 11367, |
| 11381 | VFNMADD213PSZ128mbk = 11368, |
| 11382 | VFNMADD213PSZ128mbkz = 11369, |
| 11383 | VFNMADD213PSZ128mk = 11370, |
| 11384 | VFNMADD213PSZ128mkz = 11371, |
| 11385 | VFNMADD213PSZ128r = 11372, |
| 11386 | VFNMADD213PSZ128rk = 11373, |
| 11387 | VFNMADD213PSZ128rkz = 11374, |
| 11388 | VFNMADD213PSZ256m = 11375, |
| 11389 | VFNMADD213PSZ256mb = 11376, |
| 11390 | VFNMADD213PSZ256mbk = 11377, |
| 11391 | VFNMADD213PSZ256mbkz = 11378, |
| 11392 | VFNMADD213PSZ256mk = 11379, |
| 11393 | VFNMADD213PSZ256mkz = 11380, |
| 11394 | VFNMADD213PSZ256r = 11381, |
| 11395 | VFNMADD213PSZ256rk = 11382, |
| 11396 | VFNMADD213PSZ256rkz = 11383, |
| 11397 | VFNMADD213PSZm = 11384, |
| 11398 | VFNMADD213PSZmb = 11385, |
| 11399 | VFNMADD213PSZmbk = 11386, |
| 11400 | VFNMADD213PSZmbkz = 11387, |
| 11401 | VFNMADD213PSZmk = 11388, |
| 11402 | VFNMADD213PSZmkz = 11389, |
| 11403 | VFNMADD213PSZr = 11390, |
| 11404 | VFNMADD213PSZrb = 11391, |
| 11405 | VFNMADD213PSZrbk = 11392, |
| 11406 | VFNMADD213PSZrbkz = 11393, |
| 11407 | VFNMADD213PSZrk = 11394, |
| 11408 | VFNMADD213PSZrkz = 11395, |
| 11409 | VFNMADD213PSm = 11396, |
| 11410 | VFNMADD213PSr = 11397, |
| 11411 | VFNMADD213SDZm = 11398, |
| 11412 | VFNMADD213SDZm_Int = 11399, |
| 11413 | VFNMADD213SDZmk_Int = 11400, |
| 11414 | VFNMADD213SDZmkz_Int = 11401, |
| 11415 | VFNMADD213SDZr = 11402, |
| 11416 | VFNMADD213SDZr_Int = 11403, |
| 11417 | VFNMADD213SDZrb = 11404, |
| 11418 | VFNMADD213SDZrb_Int = 11405, |
| 11419 | VFNMADD213SDZrbk_Int = 11406, |
| 11420 | VFNMADD213SDZrbkz_Int = 11407, |
| 11421 | VFNMADD213SDZrk_Int = 11408, |
| 11422 | VFNMADD213SDZrkz_Int = 11409, |
| 11423 | VFNMADD213SDm = 11410, |
| 11424 | VFNMADD213SDm_Int = 11411, |
| 11425 | VFNMADD213SDr = 11412, |
| 11426 | VFNMADD213SDr_Int = 11413, |
| 11427 | VFNMADD213SHZm = 11414, |
| 11428 | VFNMADD213SHZm_Int = 11415, |
| 11429 | VFNMADD213SHZmk_Int = 11416, |
| 11430 | VFNMADD213SHZmkz_Int = 11417, |
| 11431 | VFNMADD213SHZr = 11418, |
| 11432 | VFNMADD213SHZr_Int = 11419, |
| 11433 | VFNMADD213SHZrb = 11420, |
| 11434 | VFNMADD213SHZrb_Int = 11421, |
| 11435 | VFNMADD213SHZrbk_Int = 11422, |
| 11436 | VFNMADD213SHZrbkz_Int = 11423, |
| 11437 | VFNMADD213SHZrk_Int = 11424, |
| 11438 | VFNMADD213SHZrkz_Int = 11425, |
| 11439 | VFNMADD213SSZm = 11426, |
| 11440 | VFNMADD213SSZm_Int = 11427, |
| 11441 | VFNMADD213SSZmk_Int = 11428, |
| 11442 | VFNMADD213SSZmkz_Int = 11429, |
| 11443 | VFNMADD213SSZr = 11430, |
| 11444 | VFNMADD213SSZr_Int = 11431, |
| 11445 | VFNMADD213SSZrb = 11432, |
| 11446 | VFNMADD213SSZrb_Int = 11433, |
| 11447 | VFNMADD213SSZrbk_Int = 11434, |
| 11448 | VFNMADD213SSZrbkz_Int = 11435, |
| 11449 | VFNMADD213SSZrk_Int = 11436, |
| 11450 | VFNMADD213SSZrkz_Int = 11437, |
| 11451 | VFNMADD213SSm = 11438, |
| 11452 | VFNMADD213SSm_Int = 11439, |
| 11453 | VFNMADD213SSr = 11440, |
| 11454 | VFNMADD213SSr_Int = 11441, |
| 11455 | VFNMADD231BF16Z128m = 11442, |
| 11456 | VFNMADD231BF16Z128mb = 11443, |
| 11457 | VFNMADD231BF16Z128mbk = 11444, |
| 11458 | VFNMADD231BF16Z128mbkz = 11445, |
| 11459 | VFNMADD231BF16Z128mk = 11446, |
| 11460 | VFNMADD231BF16Z128mkz = 11447, |
| 11461 | VFNMADD231BF16Z128r = 11448, |
| 11462 | VFNMADD231BF16Z128rk = 11449, |
| 11463 | VFNMADD231BF16Z128rkz = 11450, |
| 11464 | VFNMADD231BF16Z256m = 11451, |
| 11465 | VFNMADD231BF16Z256mb = 11452, |
| 11466 | VFNMADD231BF16Z256mbk = 11453, |
| 11467 | VFNMADD231BF16Z256mbkz = 11454, |
| 11468 | VFNMADD231BF16Z256mk = 11455, |
| 11469 | VFNMADD231BF16Z256mkz = 11456, |
| 11470 | VFNMADD231BF16Z256r = 11457, |
| 11471 | VFNMADD231BF16Z256rk = 11458, |
| 11472 | VFNMADD231BF16Z256rkz = 11459, |
| 11473 | VFNMADD231BF16Zm = 11460, |
| 11474 | VFNMADD231BF16Zmb = 11461, |
| 11475 | VFNMADD231BF16Zmbk = 11462, |
| 11476 | VFNMADD231BF16Zmbkz = 11463, |
| 11477 | VFNMADD231BF16Zmk = 11464, |
| 11478 | VFNMADD231BF16Zmkz = 11465, |
| 11479 | VFNMADD231BF16Zr = 11466, |
| 11480 | VFNMADD231BF16Zrk = 11467, |
| 11481 | VFNMADD231BF16Zrkz = 11468, |
| 11482 | VFNMADD231PDYm = 11469, |
| 11483 | VFNMADD231PDYr = 11470, |
| 11484 | VFNMADD231PDZ128m = 11471, |
| 11485 | VFNMADD231PDZ128mb = 11472, |
| 11486 | VFNMADD231PDZ128mbk = 11473, |
| 11487 | VFNMADD231PDZ128mbkz = 11474, |
| 11488 | VFNMADD231PDZ128mk = 11475, |
| 11489 | VFNMADD231PDZ128mkz = 11476, |
| 11490 | VFNMADD231PDZ128r = 11477, |
| 11491 | VFNMADD231PDZ128rk = 11478, |
| 11492 | VFNMADD231PDZ128rkz = 11479, |
| 11493 | VFNMADD231PDZ256m = 11480, |
| 11494 | VFNMADD231PDZ256mb = 11481, |
| 11495 | VFNMADD231PDZ256mbk = 11482, |
| 11496 | VFNMADD231PDZ256mbkz = 11483, |
| 11497 | VFNMADD231PDZ256mk = 11484, |
| 11498 | VFNMADD231PDZ256mkz = 11485, |
| 11499 | VFNMADD231PDZ256r = 11486, |
| 11500 | VFNMADD231PDZ256rk = 11487, |
| 11501 | VFNMADD231PDZ256rkz = 11488, |
| 11502 | VFNMADD231PDZm = 11489, |
| 11503 | VFNMADD231PDZmb = 11490, |
| 11504 | VFNMADD231PDZmbk = 11491, |
| 11505 | VFNMADD231PDZmbkz = 11492, |
| 11506 | VFNMADD231PDZmk = 11493, |
| 11507 | VFNMADD231PDZmkz = 11494, |
| 11508 | VFNMADD231PDZr = 11495, |
| 11509 | VFNMADD231PDZrb = 11496, |
| 11510 | VFNMADD231PDZrbk = 11497, |
| 11511 | VFNMADD231PDZrbkz = 11498, |
| 11512 | VFNMADD231PDZrk = 11499, |
| 11513 | VFNMADD231PDZrkz = 11500, |
| 11514 | VFNMADD231PDm = 11501, |
| 11515 | VFNMADD231PDr = 11502, |
| 11516 | VFNMADD231PHZ128m = 11503, |
| 11517 | VFNMADD231PHZ128mb = 11504, |
| 11518 | VFNMADD231PHZ128mbk = 11505, |
| 11519 | VFNMADD231PHZ128mbkz = 11506, |
| 11520 | VFNMADD231PHZ128mk = 11507, |
| 11521 | VFNMADD231PHZ128mkz = 11508, |
| 11522 | VFNMADD231PHZ128r = 11509, |
| 11523 | VFNMADD231PHZ128rk = 11510, |
| 11524 | VFNMADD231PHZ128rkz = 11511, |
| 11525 | VFNMADD231PHZ256m = 11512, |
| 11526 | VFNMADD231PHZ256mb = 11513, |
| 11527 | VFNMADD231PHZ256mbk = 11514, |
| 11528 | VFNMADD231PHZ256mbkz = 11515, |
| 11529 | VFNMADD231PHZ256mk = 11516, |
| 11530 | VFNMADD231PHZ256mkz = 11517, |
| 11531 | VFNMADD231PHZ256r = 11518, |
| 11532 | VFNMADD231PHZ256rk = 11519, |
| 11533 | VFNMADD231PHZ256rkz = 11520, |
| 11534 | VFNMADD231PHZm = 11521, |
| 11535 | VFNMADD231PHZmb = 11522, |
| 11536 | VFNMADD231PHZmbk = 11523, |
| 11537 | VFNMADD231PHZmbkz = 11524, |
| 11538 | VFNMADD231PHZmk = 11525, |
| 11539 | VFNMADD231PHZmkz = 11526, |
| 11540 | VFNMADD231PHZr = 11527, |
| 11541 | VFNMADD231PHZrb = 11528, |
| 11542 | VFNMADD231PHZrbk = 11529, |
| 11543 | VFNMADD231PHZrbkz = 11530, |
| 11544 | VFNMADD231PHZrk = 11531, |
| 11545 | VFNMADD231PHZrkz = 11532, |
| 11546 | VFNMADD231PSYm = 11533, |
| 11547 | VFNMADD231PSYr = 11534, |
| 11548 | VFNMADD231PSZ128m = 11535, |
| 11549 | VFNMADD231PSZ128mb = 11536, |
| 11550 | VFNMADD231PSZ128mbk = 11537, |
| 11551 | VFNMADD231PSZ128mbkz = 11538, |
| 11552 | VFNMADD231PSZ128mk = 11539, |
| 11553 | VFNMADD231PSZ128mkz = 11540, |
| 11554 | VFNMADD231PSZ128r = 11541, |
| 11555 | VFNMADD231PSZ128rk = 11542, |
| 11556 | VFNMADD231PSZ128rkz = 11543, |
| 11557 | VFNMADD231PSZ256m = 11544, |
| 11558 | VFNMADD231PSZ256mb = 11545, |
| 11559 | VFNMADD231PSZ256mbk = 11546, |
| 11560 | VFNMADD231PSZ256mbkz = 11547, |
| 11561 | VFNMADD231PSZ256mk = 11548, |
| 11562 | VFNMADD231PSZ256mkz = 11549, |
| 11563 | VFNMADD231PSZ256r = 11550, |
| 11564 | VFNMADD231PSZ256rk = 11551, |
| 11565 | VFNMADD231PSZ256rkz = 11552, |
| 11566 | VFNMADD231PSZm = 11553, |
| 11567 | VFNMADD231PSZmb = 11554, |
| 11568 | VFNMADD231PSZmbk = 11555, |
| 11569 | VFNMADD231PSZmbkz = 11556, |
| 11570 | VFNMADD231PSZmk = 11557, |
| 11571 | VFNMADD231PSZmkz = 11558, |
| 11572 | VFNMADD231PSZr = 11559, |
| 11573 | VFNMADD231PSZrb = 11560, |
| 11574 | VFNMADD231PSZrbk = 11561, |
| 11575 | VFNMADD231PSZrbkz = 11562, |
| 11576 | VFNMADD231PSZrk = 11563, |
| 11577 | VFNMADD231PSZrkz = 11564, |
| 11578 | VFNMADD231PSm = 11565, |
| 11579 | VFNMADD231PSr = 11566, |
| 11580 | VFNMADD231SDZm = 11567, |
| 11581 | VFNMADD231SDZm_Int = 11568, |
| 11582 | VFNMADD231SDZmk_Int = 11569, |
| 11583 | VFNMADD231SDZmkz_Int = 11570, |
| 11584 | VFNMADD231SDZr = 11571, |
| 11585 | VFNMADD231SDZr_Int = 11572, |
| 11586 | VFNMADD231SDZrb = 11573, |
| 11587 | VFNMADD231SDZrb_Int = 11574, |
| 11588 | VFNMADD231SDZrbk_Int = 11575, |
| 11589 | VFNMADD231SDZrbkz_Int = 11576, |
| 11590 | VFNMADD231SDZrk_Int = 11577, |
| 11591 | VFNMADD231SDZrkz_Int = 11578, |
| 11592 | VFNMADD231SDm = 11579, |
| 11593 | VFNMADD231SDm_Int = 11580, |
| 11594 | VFNMADD231SDr = 11581, |
| 11595 | VFNMADD231SDr_Int = 11582, |
| 11596 | VFNMADD231SHZm = 11583, |
| 11597 | VFNMADD231SHZm_Int = 11584, |
| 11598 | VFNMADD231SHZmk_Int = 11585, |
| 11599 | VFNMADD231SHZmkz_Int = 11586, |
| 11600 | VFNMADD231SHZr = 11587, |
| 11601 | VFNMADD231SHZr_Int = 11588, |
| 11602 | VFNMADD231SHZrb = 11589, |
| 11603 | VFNMADD231SHZrb_Int = 11590, |
| 11604 | VFNMADD231SHZrbk_Int = 11591, |
| 11605 | VFNMADD231SHZrbkz_Int = 11592, |
| 11606 | VFNMADD231SHZrk_Int = 11593, |
| 11607 | VFNMADD231SHZrkz_Int = 11594, |
| 11608 | VFNMADD231SSZm = 11595, |
| 11609 | VFNMADD231SSZm_Int = 11596, |
| 11610 | VFNMADD231SSZmk_Int = 11597, |
| 11611 | VFNMADD231SSZmkz_Int = 11598, |
| 11612 | VFNMADD231SSZr = 11599, |
| 11613 | VFNMADD231SSZr_Int = 11600, |
| 11614 | VFNMADD231SSZrb = 11601, |
| 11615 | VFNMADD231SSZrb_Int = 11602, |
| 11616 | VFNMADD231SSZrbk_Int = 11603, |
| 11617 | VFNMADD231SSZrbkz_Int = 11604, |
| 11618 | VFNMADD231SSZrk_Int = 11605, |
| 11619 | VFNMADD231SSZrkz_Int = 11606, |
| 11620 | VFNMADD231SSm = 11607, |
| 11621 | VFNMADD231SSm_Int = 11608, |
| 11622 | VFNMADD231SSr = 11609, |
| 11623 | VFNMADD231SSr_Int = 11610, |
| 11624 | VFNMADDPD4Ymr = 11611, |
| 11625 | VFNMADDPD4Yrm = 11612, |
| 11626 | VFNMADDPD4Yrr = 11613, |
| 11627 | VFNMADDPD4Yrr_REV = 11614, |
| 11628 | VFNMADDPD4mr = 11615, |
| 11629 | VFNMADDPD4rm = 11616, |
| 11630 | VFNMADDPD4rr = 11617, |
| 11631 | VFNMADDPD4rr_REV = 11618, |
| 11632 | VFNMADDPS4Ymr = 11619, |
| 11633 | VFNMADDPS4Yrm = 11620, |
| 11634 | VFNMADDPS4Yrr = 11621, |
| 11635 | VFNMADDPS4Yrr_REV = 11622, |
| 11636 | VFNMADDPS4mr = 11623, |
| 11637 | VFNMADDPS4rm = 11624, |
| 11638 | VFNMADDPS4rr = 11625, |
| 11639 | VFNMADDPS4rr_REV = 11626, |
| 11640 | VFNMADDSD4mr = 11627, |
| 11641 | VFNMADDSD4mr_Int = 11628, |
| 11642 | VFNMADDSD4rm = 11629, |
| 11643 | VFNMADDSD4rm_Int = 11630, |
| 11644 | VFNMADDSD4rr = 11631, |
| 11645 | VFNMADDSD4rr_Int = 11632, |
| 11646 | VFNMADDSD4rr_Int_REV = 11633, |
| 11647 | VFNMADDSD4rr_REV = 11634, |
| 11648 | VFNMADDSS4mr = 11635, |
| 11649 | VFNMADDSS4mr_Int = 11636, |
| 11650 | VFNMADDSS4rm = 11637, |
| 11651 | VFNMADDSS4rm_Int = 11638, |
| 11652 | VFNMADDSS4rr = 11639, |
| 11653 | VFNMADDSS4rr_Int = 11640, |
| 11654 | VFNMADDSS4rr_Int_REV = 11641, |
| 11655 | VFNMADDSS4rr_REV = 11642, |
| 11656 | VFNMSUB132BF16Z128m = 11643, |
| 11657 | VFNMSUB132BF16Z128mb = 11644, |
| 11658 | VFNMSUB132BF16Z128mbk = 11645, |
| 11659 | VFNMSUB132BF16Z128mbkz = 11646, |
| 11660 | VFNMSUB132BF16Z128mk = 11647, |
| 11661 | VFNMSUB132BF16Z128mkz = 11648, |
| 11662 | VFNMSUB132BF16Z128r = 11649, |
| 11663 | VFNMSUB132BF16Z128rk = 11650, |
| 11664 | VFNMSUB132BF16Z128rkz = 11651, |
| 11665 | VFNMSUB132BF16Z256m = 11652, |
| 11666 | VFNMSUB132BF16Z256mb = 11653, |
| 11667 | VFNMSUB132BF16Z256mbk = 11654, |
| 11668 | VFNMSUB132BF16Z256mbkz = 11655, |
| 11669 | VFNMSUB132BF16Z256mk = 11656, |
| 11670 | VFNMSUB132BF16Z256mkz = 11657, |
| 11671 | VFNMSUB132BF16Z256r = 11658, |
| 11672 | VFNMSUB132BF16Z256rk = 11659, |
| 11673 | VFNMSUB132BF16Z256rkz = 11660, |
| 11674 | VFNMSUB132BF16Zm = 11661, |
| 11675 | VFNMSUB132BF16Zmb = 11662, |
| 11676 | VFNMSUB132BF16Zmbk = 11663, |
| 11677 | VFNMSUB132BF16Zmbkz = 11664, |
| 11678 | VFNMSUB132BF16Zmk = 11665, |
| 11679 | VFNMSUB132BF16Zmkz = 11666, |
| 11680 | VFNMSUB132BF16Zr = 11667, |
| 11681 | VFNMSUB132BF16Zrk = 11668, |
| 11682 | VFNMSUB132BF16Zrkz = 11669, |
| 11683 | VFNMSUB132PDYm = 11670, |
| 11684 | VFNMSUB132PDYr = 11671, |
| 11685 | VFNMSUB132PDZ128m = 11672, |
| 11686 | VFNMSUB132PDZ128mb = 11673, |
| 11687 | VFNMSUB132PDZ128mbk = 11674, |
| 11688 | VFNMSUB132PDZ128mbkz = 11675, |
| 11689 | VFNMSUB132PDZ128mk = 11676, |
| 11690 | VFNMSUB132PDZ128mkz = 11677, |
| 11691 | VFNMSUB132PDZ128r = 11678, |
| 11692 | VFNMSUB132PDZ128rk = 11679, |
| 11693 | VFNMSUB132PDZ128rkz = 11680, |
| 11694 | VFNMSUB132PDZ256m = 11681, |
| 11695 | VFNMSUB132PDZ256mb = 11682, |
| 11696 | VFNMSUB132PDZ256mbk = 11683, |
| 11697 | VFNMSUB132PDZ256mbkz = 11684, |
| 11698 | VFNMSUB132PDZ256mk = 11685, |
| 11699 | VFNMSUB132PDZ256mkz = 11686, |
| 11700 | VFNMSUB132PDZ256r = 11687, |
| 11701 | VFNMSUB132PDZ256rk = 11688, |
| 11702 | VFNMSUB132PDZ256rkz = 11689, |
| 11703 | VFNMSUB132PDZm = 11690, |
| 11704 | VFNMSUB132PDZmb = 11691, |
| 11705 | VFNMSUB132PDZmbk = 11692, |
| 11706 | VFNMSUB132PDZmbkz = 11693, |
| 11707 | VFNMSUB132PDZmk = 11694, |
| 11708 | VFNMSUB132PDZmkz = 11695, |
| 11709 | VFNMSUB132PDZr = 11696, |
| 11710 | VFNMSUB132PDZrb = 11697, |
| 11711 | VFNMSUB132PDZrbk = 11698, |
| 11712 | VFNMSUB132PDZrbkz = 11699, |
| 11713 | VFNMSUB132PDZrk = 11700, |
| 11714 | VFNMSUB132PDZrkz = 11701, |
| 11715 | VFNMSUB132PDm = 11702, |
| 11716 | VFNMSUB132PDr = 11703, |
| 11717 | VFNMSUB132PHZ128m = 11704, |
| 11718 | VFNMSUB132PHZ128mb = 11705, |
| 11719 | VFNMSUB132PHZ128mbk = 11706, |
| 11720 | VFNMSUB132PHZ128mbkz = 11707, |
| 11721 | VFNMSUB132PHZ128mk = 11708, |
| 11722 | VFNMSUB132PHZ128mkz = 11709, |
| 11723 | VFNMSUB132PHZ128r = 11710, |
| 11724 | VFNMSUB132PHZ128rk = 11711, |
| 11725 | VFNMSUB132PHZ128rkz = 11712, |
| 11726 | VFNMSUB132PHZ256m = 11713, |
| 11727 | VFNMSUB132PHZ256mb = 11714, |
| 11728 | VFNMSUB132PHZ256mbk = 11715, |
| 11729 | VFNMSUB132PHZ256mbkz = 11716, |
| 11730 | VFNMSUB132PHZ256mk = 11717, |
| 11731 | VFNMSUB132PHZ256mkz = 11718, |
| 11732 | VFNMSUB132PHZ256r = 11719, |
| 11733 | VFNMSUB132PHZ256rk = 11720, |
| 11734 | VFNMSUB132PHZ256rkz = 11721, |
| 11735 | VFNMSUB132PHZm = 11722, |
| 11736 | VFNMSUB132PHZmb = 11723, |
| 11737 | VFNMSUB132PHZmbk = 11724, |
| 11738 | VFNMSUB132PHZmbkz = 11725, |
| 11739 | VFNMSUB132PHZmk = 11726, |
| 11740 | VFNMSUB132PHZmkz = 11727, |
| 11741 | VFNMSUB132PHZr = 11728, |
| 11742 | VFNMSUB132PHZrb = 11729, |
| 11743 | VFNMSUB132PHZrbk = 11730, |
| 11744 | VFNMSUB132PHZrbkz = 11731, |
| 11745 | VFNMSUB132PHZrk = 11732, |
| 11746 | VFNMSUB132PHZrkz = 11733, |
| 11747 | VFNMSUB132PSYm = 11734, |
| 11748 | VFNMSUB132PSYr = 11735, |
| 11749 | VFNMSUB132PSZ128m = 11736, |
| 11750 | VFNMSUB132PSZ128mb = 11737, |
| 11751 | VFNMSUB132PSZ128mbk = 11738, |
| 11752 | VFNMSUB132PSZ128mbkz = 11739, |
| 11753 | VFNMSUB132PSZ128mk = 11740, |
| 11754 | VFNMSUB132PSZ128mkz = 11741, |
| 11755 | VFNMSUB132PSZ128r = 11742, |
| 11756 | VFNMSUB132PSZ128rk = 11743, |
| 11757 | VFNMSUB132PSZ128rkz = 11744, |
| 11758 | VFNMSUB132PSZ256m = 11745, |
| 11759 | VFNMSUB132PSZ256mb = 11746, |
| 11760 | VFNMSUB132PSZ256mbk = 11747, |
| 11761 | VFNMSUB132PSZ256mbkz = 11748, |
| 11762 | VFNMSUB132PSZ256mk = 11749, |
| 11763 | VFNMSUB132PSZ256mkz = 11750, |
| 11764 | VFNMSUB132PSZ256r = 11751, |
| 11765 | VFNMSUB132PSZ256rk = 11752, |
| 11766 | VFNMSUB132PSZ256rkz = 11753, |
| 11767 | VFNMSUB132PSZm = 11754, |
| 11768 | VFNMSUB132PSZmb = 11755, |
| 11769 | VFNMSUB132PSZmbk = 11756, |
| 11770 | VFNMSUB132PSZmbkz = 11757, |
| 11771 | VFNMSUB132PSZmk = 11758, |
| 11772 | VFNMSUB132PSZmkz = 11759, |
| 11773 | VFNMSUB132PSZr = 11760, |
| 11774 | VFNMSUB132PSZrb = 11761, |
| 11775 | VFNMSUB132PSZrbk = 11762, |
| 11776 | VFNMSUB132PSZrbkz = 11763, |
| 11777 | VFNMSUB132PSZrk = 11764, |
| 11778 | VFNMSUB132PSZrkz = 11765, |
| 11779 | VFNMSUB132PSm = 11766, |
| 11780 | VFNMSUB132PSr = 11767, |
| 11781 | VFNMSUB132SDZm = 11768, |
| 11782 | VFNMSUB132SDZm_Int = 11769, |
| 11783 | VFNMSUB132SDZmk_Int = 11770, |
| 11784 | VFNMSUB132SDZmkz_Int = 11771, |
| 11785 | VFNMSUB132SDZr = 11772, |
| 11786 | VFNMSUB132SDZr_Int = 11773, |
| 11787 | VFNMSUB132SDZrb = 11774, |
| 11788 | VFNMSUB132SDZrb_Int = 11775, |
| 11789 | VFNMSUB132SDZrbk_Int = 11776, |
| 11790 | VFNMSUB132SDZrbkz_Int = 11777, |
| 11791 | VFNMSUB132SDZrk_Int = 11778, |
| 11792 | VFNMSUB132SDZrkz_Int = 11779, |
| 11793 | VFNMSUB132SDm = 11780, |
| 11794 | VFNMSUB132SDm_Int = 11781, |
| 11795 | VFNMSUB132SDr = 11782, |
| 11796 | VFNMSUB132SDr_Int = 11783, |
| 11797 | VFNMSUB132SHZm = 11784, |
| 11798 | VFNMSUB132SHZm_Int = 11785, |
| 11799 | VFNMSUB132SHZmk_Int = 11786, |
| 11800 | VFNMSUB132SHZmkz_Int = 11787, |
| 11801 | VFNMSUB132SHZr = 11788, |
| 11802 | VFNMSUB132SHZr_Int = 11789, |
| 11803 | VFNMSUB132SHZrb = 11790, |
| 11804 | VFNMSUB132SHZrb_Int = 11791, |
| 11805 | VFNMSUB132SHZrbk_Int = 11792, |
| 11806 | VFNMSUB132SHZrbkz_Int = 11793, |
| 11807 | VFNMSUB132SHZrk_Int = 11794, |
| 11808 | VFNMSUB132SHZrkz_Int = 11795, |
| 11809 | VFNMSUB132SSZm = 11796, |
| 11810 | VFNMSUB132SSZm_Int = 11797, |
| 11811 | VFNMSUB132SSZmk_Int = 11798, |
| 11812 | VFNMSUB132SSZmkz_Int = 11799, |
| 11813 | VFNMSUB132SSZr = 11800, |
| 11814 | VFNMSUB132SSZr_Int = 11801, |
| 11815 | VFNMSUB132SSZrb = 11802, |
| 11816 | VFNMSUB132SSZrb_Int = 11803, |
| 11817 | VFNMSUB132SSZrbk_Int = 11804, |
| 11818 | VFNMSUB132SSZrbkz_Int = 11805, |
| 11819 | VFNMSUB132SSZrk_Int = 11806, |
| 11820 | VFNMSUB132SSZrkz_Int = 11807, |
| 11821 | VFNMSUB132SSm = 11808, |
| 11822 | VFNMSUB132SSm_Int = 11809, |
| 11823 | VFNMSUB132SSr = 11810, |
| 11824 | VFNMSUB132SSr_Int = 11811, |
| 11825 | VFNMSUB213BF16Z128m = 11812, |
| 11826 | VFNMSUB213BF16Z128mb = 11813, |
| 11827 | VFNMSUB213BF16Z128mbk = 11814, |
| 11828 | VFNMSUB213BF16Z128mbkz = 11815, |
| 11829 | VFNMSUB213BF16Z128mk = 11816, |
| 11830 | VFNMSUB213BF16Z128mkz = 11817, |
| 11831 | VFNMSUB213BF16Z128r = 11818, |
| 11832 | VFNMSUB213BF16Z128rk = 11819, |
| 11833 | VFNMSUB213BF16Z128rkz = 11820, |
| 11834 | VFNMSUB213BF16Z256m = 11821, |
| 11835 | VFNMSUB213BF16Z256mb = 11822, |
| 11836 | VFNMSUB213BF16Z256mbk = 11823, |
| 11837 | VFNMSUB213BF16Z256mbkz = 11824, |
| 11838 | VFNMSUB213BF16Z256mk = 11825, |
| 11839 | VFNMSUB213BF16Z256mkz = 11826, |
| 11840 | VFNMSUB213BF16Z256r = 11827, |
| 11841 | VFNMSUB213BF16Z256rk = 11828, |
| 11842 | VFNMSUB213BF16Z256rkz = 11829, |
| 11843 | VFNMSUB213BF16Zm = 11830, |
| 11844 | VFNMSUB213BF16Zmb = 11831, |
| 11845 | VFNMSUB213BF16Zmbk = 11832, |
| 11846 | VFNMSUB213BF16Zmbkz = 11833, |
| 11847 | VFNMSUB213BF16Zmk = 11834, |
| 11848 | VFNMSUB213BF16Zmkz = 11835, |
| 11849 | VFNMSUB213BF16Zr = 11836, |
| 11850 | VFNMSUB213BF16Zrk = 11837, |
| 11851 | VFNMSUB213BF16Zrkz = 11838, |
| 11852 | VFNMSUB213PDYm = 11839, |
| 11853 | VFNMSUB213PDYr = 11840, |
| 11854 | VFNMSUB213PDZ128m = 11841, |
| 11855 | VFNMSUB213PDZ128mb = 11842, |
| 11856 | VFNMSUB213PDZ128mbk = 11843, |
| 11857 | VFNMSUB213PDZ128mbkz = 11844, |
| 11858 | VFNMSUB213PDZ128mk = 11845, |
| 11859 | VFNMSUB213PDZ128mkz = 11846, |
| 11860 | VFNMSUB213PDZ128r = 11847, |
| 11861 | VFNMSUB213PDZ128rk = 11848, |
| 11862 | VFNMSUB213PDZ128rkz = 11849, |
| 11863 | VFNMSUB213PDZ256m = 11850, |
| 11864 | VFNMSUB213PDZ256mb = 11851, |
| 11865 | VFNMSUB213PDZ256mbk = 11852, |
| 11866 | VFNMSUB213PDZ256mbkz = 11853, |
| 11867 | VFNMSUB213PDZ256mk = 11854, |
| 11868 | VFNMSUB213PDZ256mkz = 11855, |
| 11869 | VFNMSUB213PDZ256r = 11856, |
| 11870 | VFNMSUB213PDZ256rk = 11857, |
| 11871 | VFNMSUB213PDZ256rkz = 11858, |
| 11872 | VFNMSUB213PDZm = 11859, |
| 11873 | VFNMSUB213PDZmb = 11860, |
| 11874 | VFNMSUB213PDZmbk = 11861, |
| 11875 | VFNMSUB213PDZmbkz = 11862, |
| 11876 | VFNMSUB213PDZmk = 11863, |
| 11877 | VFNMSUB213PDZmkz = 11864, |
| 11878 | VFNMSUB213PDZr = 11865, |
| 11879 | VFNMSUB213PDZrb = 11866, |
| 11880 | VFNMSUB213PDZrbk = 11867, |
| 11881 | VFNMSUB213PDZrbkz = 11868, |
| 11882 | VFNMSUB213PDZrk = 11869, |
| 11883 | VFNMSUB213PDZrkz = 11870, |
| 11884 | VFNMSUB213PDm = 11871, |
| 11885 | VFNMSUB213PDr = 11872, |
| 11886 | VFNMSUB213PHZ128m = 11873, |
| 11887 | VFNMSUB213PHZ128mb = 11874, |
| 11888 | VFNMSUB213PHZ128mbk = 11875, |
| 11889 | VFNMSUB213PHZ128mbkz = 11876, |
| 11890 | VFNMSUB213PHZ128mk = 11877, |
| 11891 | VFNMSUB213PHZ128mkz = 11878, |
| 11892 | VFNMSUB213PHZ128r = 11879, |
| 11893 | VFNMSUB213PHZ128rk = 11880, |
| 11894 | VFNMSUB213PHZ128rkz = 11881, |
| 11895 | VFNMSUB213PHZ256m = 11882, |
| 11896 | VFNMSUB213PHZ256mb = 11883, |
| 11897 | VFNMSUB213PHZ256mbk = 11884, |
| 11898 | VFNMSUB213PHZ256mbkz = 11885, |
| 11899 | VFNMSUB213PHZ256mk = 11886, |
| 11900 | VFNMSUB213PHZ256mkz = 11887, |
| 11901 | VFNMSUB213PHZ256r = 11888, |
| 11902 | VFNMSUB213PHZ256rk = 11889, |
| 11903 | VFNMSUB213PHZ256rkz = 11890, |
| 11904 | VFNMSUB213PHZm = 11891, |
| 11905 | VFNMSUB213PHZmb = 11892, |
| 11906 | VFNMSUB213PHZmbk = 11893, |
| 11907 | VFNMSUB213PHZmbkz = 11894, |
| 11908 | VFNMSUB213PHZmk = 11895, |
| 11909 | VFNMSUB213PHZmkz = 11896, |
| 11910 | VFNMSUB213PHZr = 11897, |
| 11911 | VFNMSUB213PHZrb = 11898, |
| 11912 | VFNMSUB213PHZrbk = 11899, |
| 11913 | VFNMSUB213PHZrbkz = 11900, |
| 11914 | VFNMSUB213PHZrk = 11901, |
| 11915 | VFNMSUB213PHZrkz = 11902, |
| 11916 | VFNMSUB213PSYm = 11903, |
| 11917 | VFNMSUB213PSYr = 11904, |
| 11918 | VFNMSUB213PSZ128m = 11905, |
| 11919 | VFNMSUB213PSZ128mb = 11906, |
| 11920 | VFNMSUB213PSZ128mbk = 11907, |
| 11921 | VFNMSUB213PSZ128mbkz = 11908, |
| 11922 | VFNMSUB213PSZ128mk = 11909, |
| 11923 | VFNMSUB213PSZ128mkz = 11910, |
| 11924 | VFNMSUB213PSZ128r = 11911, |
| 11925 | VFNMSUB213PSZ128rk = 11912, |
| 11926 | VFNMSUB213PSZ128rkz = 11913, |
| 11927 | VFNMSUB213PSZ256m = 11914, |
| 11928 | VFNMSUB213PSZ256mb = 11915, |
| 11929 | VFNMSUB213PSZ256mbk = 11916, |
| 11930 | VFNMSUB213PSZ256mbkz = 11917, |
| 11931 | VFNMSUB213PSZ256mk = 11918, |
| 11932 | VFNMSUB213PSZ256mkz = 11919, |
| 11933 | VFNMSUB213PSZ256r = 11920, |
| 11934 | VFNMSUB213PSZ256rk = 11921, |
| 11935 | VFNMSUB213PSZ256rkz = 11922, |
| 11936 | VFNMSUB213PSZm = 11923, |
| 11937 | VFNMSUB213PSZmb = 11924, |
| 11938 | VFNMSUB213PSZmbk = 11925, |
| 11939 | VFNMSUB213PSZmbkz = 11926, |
| 11940 | VFNMSUB213PSZmk = 11927, |
| 11941 | VFNMSUB213PSZmkz = 11928, |
| 11942 | VFNMSUB213PSZr = 11929, |
| 11943 | VFNMSUB213PSZrb = 11930, |
| 11944 | VFNMSUB213PSZrbk = 11931, |
| 11945 | VFNMSUB213PSZrbkz = 11932, |
| 11946 | VFNMSUB213PSZrk = 11933, |
| 11947 | VFNMSUB213PSZrkz = 11934, |
| 11948 | VFNMSUB213PSm = 11935, |
| 11949 | VFNMSUB213PSr = 11936, |
| 11950 | VFNMSUB213SDZm = 11937, |
| 11951 | VFNMSUB213SDZm_Int = 11938, |
| 11952 | VFNMSUB213SDZmk_Int = 11939, |
| 11953 | VFNMSUB213SDZmkz_Int = 11940, |
| 11954 | VFNMSUB213SDZr = 11941, |
| 11955 | VFNMSUB213SDZr_Int = 11942, |
| 11956 | VFNMSUB213SDZrb = 11943, |
| 11957 | VFNMSUB213SDZrb_Int = 11944, |
| 11958 | VFNMSUB213SDZrbk_Int = 11945, |
| 11959 | VFNMSUB213SDZrbkz_Int = 11946, |
| 11960 | VFNMSUB213SDZrk_Int = 11947, |
| 11961 | VFNMSUB213SDZrkz_Int = 11948, |
| 11962 | VFNMSUB213SDm = 11949, |
| 11963 | VFNMSUB213SDm_Int = 11950, |
| 11964 | VFNMSUB213SDr = 11951, |
| 11965 | VFNMSUB213SDr_Int = 11952, |
| 11966 | VFNMSUB213SHZm = 11953, |
| 11967 | VFNMSUB213SHZm_Int = 11954, |
| 11968 | VFNMSUB213SHZmk_Int = 11955, |
| 11969 | VFNMSUB213SHZmkz_Int = 11956, |
| 11970 | VFNMSUB213SHZr = 11957, |
| 11971 | VFNMSUB213SHZr_Int = 11958, |
| 11972 | VFNMSUB213SHZrb = 11959, |
| 11973 | VFNMSUB213SHZrb_Int = 11960, |
| 11974 | VFNMSUB213SHZrbk_Int = 11961, |
| 11975 | VFNMSUB213SHZrbkz_Int = 11962, |
| 11976 | VFNMSUB213SHZrk_Int = 11963, |
| 11977 | VFNMSUB213SHZrkz_Int = 11964, |
| 11978 | VFNMSUB213SSZm = 11965, |
| 11979 | VFNMSUB213SSZm_Int = 11966, |
| 11980 | VFNMSUB213SSZmk_Int = 11967, |
| 11981 | VFNMSUB213SSZmkz_Int = 11968, |
| 11982 | VFNMSUB213SSZr = 11969, |
| 11983 | VFNMSUB213SSZr_Int = 11970, |
| 11984 | VFNMSUB213SSZrb = 11971, |
| 11985 | VFNMSUB213SSZrb_Int = 11972, |
| 11986 | VFNMSUB213SSZrbk_Int = 11973, |
| 11987 | VFNMSUB213SSZrbkz_Int = 11974, |
| 11988 | VFNMSUB213SSZrk_Int = 11975, |
| 11989 | VFNMSUB213SSZrkz_Int = 11976, |
| 11990 | VFNMSUB213SSm = 11977, |
| 11991 | VFNMSUB213SSm_Int = 11978, |
| 11992 | VFNMSUB213SSr = 11979, |
| 11993 | VFNMSUB213SSr_Int = 11980, |
| 11994 | VFNMSUB231BF16Z128m = 11981, |
| 11995 | VFNMSUB231BF16Z128mb = 11982, |
| 11996 | VFNMSUB231BF16Z128mbk = 11983, |
| 11997 | VFNMSUB231BF16Z128mbkz = 11984, |
| 11998 | VFNMSUB231BF16Z128mk = 11985, |
| 11999 | VFNMSUB231BF16Z128mkz = 11986, |
| 12000 | VFNMSUB231BF16Z128r = 11987, |
| 12001 | VFNMSUB231BF16Z128rk = 11988, |
| 12002 | VFNMSUB231BF16Z128rkz = 11989, |
| 12003 | VFNMSUB231BF16Z256m = 11990, |
| 12004 | VFNMSUB231BF16Z256mb = 11991, |
| 12005 | VFNMSUB231BF16Z256mbk = 11992, |
| 12006 | VFNMSUB231BF16Z256mbkz = 11993, |
| 12007 | VFNMSUB231BF16Z256mk = 11994, |
| 12008 | VFNMSUB231BF16Z256mkz = 11995, |
| 12009 | VFNMSUB231BF16Z256r = 11996, |
| 12010 | VFNMSUB231BF16Z256rk = 11997, |
| 12011 | VFNMSUB231BF16Z256rkz = 11998, |
| 12012 | VFNMSUB231BF16Zm = 11999, |
| 12013 | VFNMSUB231BF16Zmb = 12000, |
| 12014 | VFNMSUB231BF16Zmbk = 12001, |
| 12015 | VFNMSUB231BF16Zmbkz = 12002, |
| 12016 | VFNMSUB231BF16Zmk = 12003, |
| 12017 | VFNMSUB231BF16Zmkz = 12004, |
| 12018 | VFNMSUB231BF16Zr = 12005, |
| 12019 | VFNMSUB231BF16Zrk = 12006, |
| 12020 | VFNMSUB231BF16Zrkz = 12007, |
| 12021 | VFNMSUB231PDYm = 12008, |
| 12022 | VFNMSUB231PDYr = 12009, |
| 12023 | VFNMSUB231PDZ128m = 12010, |
| 12024 | VFNMSUB231PDZ128mb = 12011, |
| 12025 | VFNMSUB231PDZ128mbk = 12012, |
| 12026 | VFNMSUB231PDZ128mbkz = 12013, |
| 12027 | VFNMSUB231PDZ128mk = 12014, |
| 12028 | VFNMSUB231PDZ128mkz = 12015, |
| 12029 | VFNMSUB231PDZ128r = 12016, |
| 12030 | VFNMSUB231PDZ128rk = 12017, |
| 12031 | VFNMSUB231PDZ128rkz = 12018, |
| 12032 | VFNMSUB231PDZ256m = 12019, |
| 12033 | VFNMSUB231PDZ256mb = 12020, |
| 12034 | VFNMSUB231PDZ256mbk = 12021, |
| 12035 | VFNMSUB231PDZ256mbkz = 12022, |
| 12036 | VFNMSUB231PDZ256mk = 12023, |
| 12037 | VFNMSUB231PDZ256mkz = 12024, |
| 12038 | VFNMSUB231PDZ256r = 12025, |
| 12039 | VFNMSUB231PDZ256rk = 12026, |
| 12040 | VFNMSUB231PDZ256rkz = 12027, |
| 12041 | VFNMSUB231PDZm = 12028, |
| 12042 | VFNMSUB231PDZmb = 12029, |
| 12043 | VFNMSUB231PDZmbk = 12030, |
| 12044 | VFNMSUB231PDZmbkz = 12031, |
| 12045 | VFNMSUB231PDZmk = 12032, |
| 12046 | VFNMSUB231PDZmkz = 12033, |
| 12047 | VFNMSUB231PDZr = 12034, |
| 12048 | VFNMSUB231PDZrb = 12035, |
| 12049 | VFNMSUB231PDZrbk = 12036, |
| 12050 | VFNMSUB231PDZrbkz = 12037, |
| 12051 | VFNMSUB231PDZrk = 12038, |
| 12052 | VFNMSUB231PDZrkz = 12039, |
| 12053 | VFNMSUB231PDm = 12040, |
| 12054 | VFNMSUB231PDr = 12041, |
| 12055 | VFNMSUB231PHZ128m = 12042, |
| 12056 | VFNMSUB231PHZ128mb = 12043, |
| 12057 | VFNMSUB231PHZ128mbk = 12044, |
| 12058 | VFNMSUB231PHZ128mbkz = 12045, |
| 12059 | VFNMSUB231PHZ128mk = 12046, |
| 12060 | VFNMSUB231PHZ128mkz = 12047, |
| 12061 | VFNMSUB231PHZ128r = 12048, |
| 12062 | VFNMSUB231PHZ128rk = 12049, |
| 12063 | VFNMSUB231PHZ128rkz = 12050, |
| 12064 | VFNMSUB231PHZ256m = 12051, |
| 12065 | VFNMSUB231PHZ256mb = 12052, |
| 12066 | VFNMSUB231PHZ256mbk = 12053, |
| 12067 | VFNMSUB231PHZ256mbkz = 12054, |
| 12068 | VFNMSUB231PHZ256mk = 12055, |
| 12069 | VFNMSUB231PHZ256mkz = 12056, |
| 12070 | VFNMSUB231PHZ256r = 12057, |
| 12071 | VFNMSUB231PHZ256rk = 12058, |
| 12072 | VFNMSUB231PHZ256rkz = 12059, |
| 12073 | VFNMSUB231PHZm = 12060, |
| 12074 | VFNMSUB231PHZmb = 12061, |
| 12075 | VFNMSUB231PHZmbk = 12062, |
| 12076 | VFNMSUB231PHZmbkz = 12063, |
| 12077 | VFNMSUB231PHZmk = 12064, |
| 12078 | VFNMSUB231PHZmkz = 12065, |
| 12079 | VFNMSUB231PHZr = 12066, |
| 12080 | VFNMSUB231PHZrb = 12067, |
| 12081 | VFNMSUB231PHZrbk = 12068, |
| 12082 | VFNMSUB231PHZrbkz = 12069, |
| 12083 | VFNMSUB231PHZrk = 12070, |
| 12084 | VFNMSUB231PHZrkz = 12071, |
| 12085 | VFNMSUB231PSYm = 12072, |
| 12086 | VFNMSUB231PSYr = 12073, |
| 12087 | VFNMSUB231PSZ128m = 12074, |
| 12088 | VFNMSUB231PSZ128mb = 12075, |
| 12089 | VFNMSUB231PSZ128mbk = 12076, |
| 12090 | VFNMSUB231PSZ128mbkz = 12077, |
| 12091 | VFNMSUB231PSZ128mk = 12078, |
| 12092 | VFNMSUB231PSZ128mkz = 12079, |
| 12093 | VFNMSUB231PSZ128r = 12080, |
| 12094 | VFNMSUB231PSZ128rk = 12081, |
| 12095 | VFNMSUB231PSZ128rkz = 12082, |
| 12096 | VFNMSUB231PSZ256m = 12083, |
| 12097 | VFNMSUB231PSZ256mb = 12084, |
| 12098 | VFNMSUB231PSZ256mbk = 12085, |
| 12099 | VFNMSUB231PSZ256mbkz = 12086, |
| 12100 | VFNMSUB231PSZ256mk = 12087, |
| 12101 | VFNMSUB231PSZ256mkz = 12088, |
| 12102 | VFNMSUB231PSZ256r = 12089, |
| 12103 | VFNMSUB231PSZ256rk = 12090, |
| 12104 | VFNMSUB231PSZ256rkz = 12091, |
| 12105 | VFNMSUB231PSZm = 12092, |
| 12106 | VFNMSUB231PSZmb = 12093, |
| 12107 | VFNMSUB231PSZmbk = 12094, |
| 12108 | VFNMSUB231PSZmbkz = 12095, |
| 12109 | VFNMSUB231PSZmk = 12096, |
| 12110 | VFNMSUB231PSZmkz = 12097, |
| 12111 | VFNMSUB231PSZr = 12098, |
| 12112 | VFNMSUB231PSZrb = 12099, |
| 12113 | VFNMSUB231PSZrbk = 12100, |
| 12114 | VFNMSUB231PSZrbkz = 12101, |
| 12115 | VFNMSUB231PSZrk = 12102, |
| 12116 | VFNMSUB231PSZrkz = 12103, |
| 12117 | VFNMSUB231PSm = 12104, |
| 12118 | VFNMSUB231PSr = 12105, |
| 12119 | VFNMSUB231SDZm = 12106, |
| 12120 | VFNMSUB231SDZm_Int = 12107, |
| 12121 | VFNMSUB231SDZmk_Int = 12108, |
| 12122 | VFNMSUB231SDZmkz_Int = 12109, |
| 12123 | VFNMSUB231SDZr = 12110, |
| 12124 | VFNMSUB231SDZr_Int = 12111, |
| 12125 | VFNMSUB231SDZrb = 12112, |
| 12126 | VFNMSUB231SDZrb_Int = 12113, |
| 12127 | VFNMSUB231SDZrbk_Int = 12114, |
| 12128 | VFNMSUB231SDZrbkz_Int = 12115, |
| 12129 | VFNMSUB231SDZrk_Int = 12116, |
| 12130 | VFNMSUB231SDZrkz_Int = 12117, |
| 12131 | VFNMSUB231SDm = 12118, |
| 12132 | VFNMSUB231SDm_Int = 12119, |
| 12133 | VFNMSUB231SDr = 12120, |
| 12134 | VFNMSUB231SDr_Int = 12121, |
| 12135 | VFNMSUB231SHZm = 12122, |
| 12136 | VFNMSUB231SHZm_Int = 12123, |
| 12137 | VFNMSUB231SHZmk_Int = 12124, |
| 12138 | VFNMSUB231SHZmkz_Int = 12125, |
| 12139 | VFNMSUB231SHZr = 12126, |
| 12140 | VFNMSUB231SHZr_Int = 12127, |
| 12141 | VFNMSUB231SHZrb = 12128, |
| 12142 | VFNMSUB231SHZrb_Int = 12129, |
| 12143 | VFNMSUB231SHZrbk_Int = 12130, |
| 12144 | VFNMSUB231SHZrbkz_Int = 12131, |
| 12145 | VFNMSUB231SHZrk_Int = 12132, |
| 12146 | VFNMSUB231SHZrkz_Int = 12133, |
| 12147 | VFNMSUB231SSZm = 12134, |
| 12148 | VFNMSUB231SSZm_Int = 12135, |
| 12149 | VFNMSUB231SSZmk_Int = 12136, |
| 12150 | VFNMSUB231SSZmkz_Int = 12137, |
| 12151 | VFNMSUB231SSZr = 12138, |
| 12152 | VFNMSUB231SSZr_Int = 12139, |
| 12153 | VFNMSUB231SSZrb = 12140, |
| 12154 | VFNMSUB231SSZrb_Int = 12141, |
| 12155 | VFNMSUB231SSZrbk_Int = 12142, |
| 12156 | VFNMSUB231SSZrbkz_Int = 12143, |
| 12157 | VFNMSUB231SSZrk_Int = 12144, |
| 12158 | VFNMSUB231SSZrkz_Int = 12145, |
| 12159 | VFNMSUB231SSm = 12146, |
| 12160 | VFNMSUB231SSm_Int = 12147, |
| 12161 | VFNMSUB231SSr = 12148, |
| 12162 | VFNMSUB231SSr_Int = 12149, |
| 12163 | VFNMSUBPD4Ymr = 12150, |
| 12164 | VFNMSUBPD4Yrm = 12151, |
| 12165 | VFNMSUBPD4Yrr = 12152, |
| 12166 | VFNMSUBPD4Yrr_REV = 12153, |
| 12167 | VFNMSUBPD4mr = 12154, |
| 12168 | VFNMSUBPD4rm = 12155, |
| 12169 | VFNMSUBPD4rr = 12156, |
| 12170 | VFNMSUBPD4rr_REV = 12157, |
| 12171 | VFNMSUBPS4Ymr = 12158, |
| 12172 | VFNMSUBPS4Yrm = 12159, |
| 12173 | VFNMSUBPS4Yrr = 12160, |
| 12174 | VFNMSUBPS4Yrr_REV = 12161, |
| 12175 | VFNMSUBPS4mr = 12162, |
| 12176 | VFNMSUBPS4rm = 12163, |
| 12177 | VFNMSUBPS4rr = 12164, |
| 12178 | VFNMSUBPS4rr_REV = 12165, |
| 12179 | VFNMSUBSD4mr = 12166, |
| 12180 | VFNMSUBSD4mr_Int = 12167, |
| 12181 | VFNMSUBSD4rm = 12168, |
| 12182 | VFNMSUBSD4rm_Int = 12169, |
| 12183 | VFNMSUBSD4rr = 12170, |
| 12184 | VFNMSUBSD4rr_Int = 12171, |
| 12185 | VFNMSUBSD4rr_Int_REV = 12172, |
| 12186 | VFNMSUBSD4rr_REV = 12173, |
| 12187 | VFNMSUBSS4mr = 12174, |
| 12188 | VFNMSUBSS4mr_Int = 12175, |
| 12189 | VFNMSUBSS4rm = 12176, |
| 12190 | VFNMSUBSS4rm_Int = 12177, |
| 12191 | VFNMSUBSS4rr = 12178, |
| 12192 | VFNMSUBSS4rr_Int = 12179, |
| 12193 | VFNMSUBSS4rr_Int_REV = 12180, |
| 12194 | VFNMSUBSS4rr_REV = 12181, |
| 12195 | VFPCLASSBF16Z128mbi = 12182, |
| 12196 | VFPCLASSBF16Z128mbik = 12183, |
| 12197 | VFPCLASSBF16Z128mi = 12184, |
| 12198 | VFPCLASSBF16Z128mik = 12185, |
| 12199 | VFPCLASSBF16Z128ri = 12186, |
| 12200 | VFPCLASSBF16Z128rik = 12187, |
| 12201 | VFPCLASSBF16Z256mbi = 12188, |
| 12202 | VFPCLASSBF16Z256mbik = 12189, |
| 12203 | VFPCLASSBF16Z256mi = 12190, |
| 12204 | VFPCLASSBF16Z256mik = 12191, |
| 12205 | VFPCLASSBF16Z256ri = 12192, |
| 12206 | VFPCLASSBF16Z256rik = 12193, |
| 12207 | VFPCLASSBF16Zmbi = 12194, |
| 12208 | VFPCLASSBF16Zmbik = 12195, |
| 12209 | VFPCLASSBF16Zmi = 12196, |
| 12210 | VFPCLASSBF16Zmik = 12197, |
| 12211 | VFPCLASSBF16Zri = 12198, |
| 12212 | VFPCLASSBF16Zrik = 12199, |
| 12213 | VFPCLASSPDZ128mbi = 12200, |
| 12214 | VFPCLASSPDZ128mbik = 12201, |
| 12215 | VFPCLASSPDZ128mi = 12202, |
| 12216 | VFPCLASSPDZ128mik = 12203, |
| 12217 | VFPCLASSPDZ128ri = 12204, |
| 12218 | VFPCLASSPDZ128rik = 12205, |
| 12219 | VFPCLASSPDZ256mbi = 12206, |
| 12220 | VFPCLASSPDZ256mbik = 12207, |
| 12221 | VFPCLASSPDZ256mi = 12208, |
| 12222 | VFPCLASSPDZ256mik = 12209, |
| 12223 | VFPCLASSPDZ256ri = 12210, |
| 12224 | VFPCLASSPDZ256rik = 12211, |
| 12225 | VFPCLASSPDZmbi = 12212, |
| 12226 | VFPCLASSPDZmbik = 12213, |
| 12227 | VFPCLASSPDZmi = 12214, |
| 12228 | VFPCLASSPDZmik = 12215, |
| 12229 | VFPCLASSPDZri = 12216, |
| 12230 | VFPCLASSPDZrik = 12217, |
| 12231 | VFPCLASSPHZ128mbi = 12218, |
| 12232 | VFPCLASSPHZ128mbik = 12219, |
| 12233 | VFPCLASSPHZ128mi = 12220, |
| 12234 | VFPCLASSPHZ128mik = 12221, |
| 12235 | VFPCLASSPHZ128ri = 12222, |
| 12236 | VFPCLASSPHZ128rik = 12223, |
| 12237 | VFPCLASSPHZ256mbi = 12224, |
| 12238 | VFPCLASSPHZ256mbik = 12225, |
| 12239 | VFPCLASSPHZ256mi = 12226, |
| 12240 | VFPCLASSPHZ256mik = 12227, |
| 12241 | VFPCLASSPHZ256ri = 12228, |
| 12242 | VFPCLASSPHZ256rik = 12229, |
| 12243 | VFPCLASSPHZmbi = 12230, |
| 12244 | VFPCLASSPHZmbik = 12231, |
| 12245 | VFPCLASSPHZmi = 12232, |
| 12246 | VFPCLASSPHZmik = 12233, |
| 12247 | VFPCLASSPHZri = 12234, |
| 12248 | VFPCLASSPHZrik = 12235, |
| 12249 | VFPCLASSPSZ128mbi = 12236, |
| 12250 | VFPCLASSPSZ128mbik = 12237, |
| 12251 | VFPCLASSPSZ128mi = 12238, |
| 12252 | VFPCLASSPSZ128mik = 12239, |
| 12253 | VFPCLASSPSZ128ri = 12240, |
| 12254 | VFPCLASSPSZ128rik = 12241, |
| 12255 | VFPCLASSPSZ256mbi = 12242, |
| 12256 | VFPCLASSPSZ256mbik = 12243, |
| 12257 | VFPCLASSPSZ256mi = 12244, |
| 12258 | VFPCLASSPSZ256mik = 12245, |
| 12259 | VFPCLASSPSZ256ri = 12246, |
| 12260 | VFPCLASSPSZ256rik = 12247, |
| 12261 | VFPCLASSPSZmbi = 12248, |
| 12262 | VFPCLASSPSZmbik = 12249, |
| 12263 | VFPCLASSPSZmi = 12250, |
| 12264 | VFPCLASSPSZmik = 12251, |
| 12265 | VFPCLASSPSZri = 12252, |
| 12266 | VFPCLASSPSZrik = 12253, |
| 12267 | VFPCLASSSDZmi = 12254, |
| 12268 | VFPCLASSSDZmik = 12255, |
| 12269 | VFPCLASSSDZri = 12256, |
| 12270 | VFPCLASSSDZrik = 12257, |
| 12271 | VFPCLASSSHZmi = 12258, |
| 12272 | VFPCLASSSHZmik = 12259, |
| 12273 | VFPCLASSSHZri = 12260, |
| 12274 | VFPCLASSSHZrik = 12261, |
| 12275 | VFPCLASSSSZmi = 12262, |
| 12276 | VFPCLASSSSZmik = 12263, |
| 12277 | VFPCLASSSSZri = 12264, |
| 12278 | VFPCLASSSSZrik = 12265, |
| 12279 | VFRCZPDYrm = 12266, |
| 12280 | VFRCZPDYrr = 12267, |
| 12281 | VFRCZPDrm = 12268, |
| 12282 | VFRCZPDrr = 12269, |
| 12283 | VFRCZPSYrm = 12270, |
| 12284 | VFRCZPSYrr = 12271, |
| 12285 | VFRCZPSrm = 12272, |
| 12286 | VFRCZPSrr = 12273, |
| 12287 | VFRCZSDrm = 12274, |
| 12288 | VFRCZSDrr = 12275, |
| 12289 | VFRCZSSrm = 12276, |
| 12290 | VFRCZSSrr = 12277, |
| 12291 | VGATHERDPDYrm = 12278, |
| 12292 | VGATHERDPDZ128rm = 12279, |
| 12293 | VGATHERDPDZ256rm = 12280, |
| 12294 | VGATHERDPDZrm = 12281, |
| 12295 | VGATHERDPDrm = 12282, |
| 12296 | VGATHERDPSYrm = 12283, |
| 12297 | VGATHERDPSZ128rm = 12284, |
| 12298 | VGATHERDPSZ256rm = 12285, |
| 12299 | VGATHERDPSZrm = 12286, |
| 12300 | VGATHERDPSrm = 12287, |
| 12301 | VGATHERPF0DPDm = 12288, |
| 12302 | VGATHERPF0DPSm = 12289, |
| 12303 | VGATHERPF0QPDm = 12290, |
| 12304 | VGATHERPF0QPSm = 12291, |
| 12305 | VGATHERPF1DPDm = 12292, |
| 12306 | VGATHERPF1DPSm = 12293, |
| 12307 | VGATHERPF1QPDm = 12294, |
| 12308 | VGATHERPF1QPSm = 12295, |
| 12309 | VGATHERQPDYrm = 12296, |
| 12310 | VGATHERQPDZ128rm = 12297, |
| 12311 | VGATHERQPDZ256rm = 12298, |
| 12312 | VGATHERQPDZrm = 12299, |
| 12313 | VGATHERQPDrm = 12300, |
| 12314 | VGATHERQPSYrm = 12301, |
| 12315 | VGATHERQPSZ128rm = 12302, |
| 12316 | VGATHERQPSZ256rm = 12303, |
| 12317 | VGATHERQPSZrm = 12304, |
| 12318 | VGATHERQPSrm = 12305, |
| 12319 | VGETEXPBF16Z128m = 12306, |
| 12320 | VGETEXPBF16Z128mb = 12307, |
| 12321 | VGETEXPBF16Z128mbk = 12308, |
| 12322 | VGETEXPBF16Z128mbkz = 12309, |
| 12323 | VGETEXPBF16Z128mk = 12310, |
| 12324 | VGETEXPBF16Z128mkz = 12311, |
| 12325 | VGETEXPBF16Z128r = 12312, |
| 12326 | VGETEXPBF16Z128rk = 12313, |
| 12327 | VGETEXPBF16Z128rkz = 12314, |
| 12328 | VGETEXPBF16Z256m = 12315, |
| 12329 | VGETEXPBF16Z256mb = 12316, |
| 12330 | VGETEXPBF16Z256mbk = 12317, |
| 12331 | VGETEXPBF16Z256mbkz = 12318, |
| 12332 | VGETEXPBF16Z256mk = 12319, |
| 12333 | VGETEXPBF16Z256mkz = 12320, |
| 12334 | VGETEXPBF16Z256r = 12321, |
| 12335 | VGETEXPBF16Z256rk = 12322, |
| 12336 | VGETEXPBF16Z256rkz = 12323, |
| 12337 | VGETEXPBF16Zm = 12324, |
| 12338 | VGETEXPBF16Zmb = 12325, |
| 12339 | VGETEXPBF16Zmbk = 12326, |
| 12340 | VGETEXPBF16Zmbkz = 12327, |
| 12341 | VGETEXPBF16Zmk = 12328, |
| 12342 | VGETEXPBF16Zmkz = 12329, |
| 12343 | VGETEXPBF16Zr = 12330, |
| 12344 | VGETEXPBF16Zrk = 12331, |
| 12345 | VGETEXPBF16Zrkz = 12332, |
| 12346 | VGETEXPPDZ128m = 12333, |
| 12347 | VGETEXPPDZ128mb = 12334, |
| 12348 | VGETEXPPDZ128mbk = 12335, |
| 12349 | VGETEXPPDZ128mbkz = 12336, |
| 12350 | VGETEXPPDZ128mk = 12337, |
| 12351 | VGETEXPPDZ128mkz = 12338, |
| 12352 | VGETEXPPDZ128r = 12339, |
| 12353 | VGETEXPPDZ128rk = 12340, |
| 12354 | VGETEXPPDZ128rkz = 12341, |
| 12355 | VGETEXPPDZ256m = 12342, |
| 12356 | VGETEXPPDZ256mb = 12343, |
| 12357 | VGETEXPPDZ256mbk = 12344, |
| 12358 | VGETEXPPDZ256mbkz = 12345, |
| 12359 | VGETEXPPDZ256mk = 12346, |
| 12360 | VGETEXPPDZ256mkz = 12347, |
| 12361 | VGETEXPPDZ256r = 12348, |
| 12362 | VGETEXPPDZ256rk = 12349, |
| 12363 | VGETEXPPDZ256rkz = 12350, |
| 12364 | VGETEXPPDZm = 12351, |
| 12365 | VGETEXPPDZmb = 12352, |
| 12366 | VGETEXPPDZmbk = 12353, |
| 12367 | VGETEXPPDZmbkz = 12354, |
| 12368 | VGETEXPPDZmk = 12355, |
| 12369 | VGETEXPPDZmkz = 12356, |
| 12370 | VGETEXPPDZr = 12357, |
| 12371 | VGETEXPPDZrb = 12358, |
| 12372 | VGETEXPPDZrbk = 12359, |
| 12373 | VGETEXPPDZrbkz = 12360, |
| 12374 | VGETEXPPDZrk = 12361, |
| 12375 | VGETEXPPDZrkz = 12362, |
| 12376 | VGETEXPPHZ128m = 12363, |
| 12377 | VGETEXPPHZ128mb = 12364, |
| 12378 | VGETEXPPHZ128mbk = 12365, |
| 12379 | VGETEXPPHZ128mbkz = 12366, |
| 12380 | VGETEXPPHZ128mk = 12367, |
| 12381 | VGETEXPPHZ128mkz = 12368, |
| 12382 | VGETEXPPHZ128r = 12369, |
| 12383 | VGETEXPPHZ128rk = 12370, |
| 12384 | VGETEXPPHZ128rkz = 12371, |
| 12385 | VGETEXPPHZ256m = 12372, |
| 12386 | VGETEXPPHZ256mb = 12373, |
| 12387 | VGETEXPPHZ256mbk = 12374, |
| 12388 | VGETEXPPHZ256mbkz = 12375, |
| 12389 | VGETEXPPHZ256mk = 12376, |
| 12390 | VGETEXPPHZ256mkz = 12377, |
| 12391 | VGETEXPPHZ256r = 12378, |
| 12392 | VGETEXPPHZ256rk = 12379, |
| 12393 | VGETEXPPHZ256rkz = 12380, |
| 12394 | VGETEXPPHZm = 12381, |
| 12395 | VGETEXPPHZmb = 12382, |
| 12396 | VGETEXPPHZmbk = 12383, |
| 12397 | VGETEXPPHZmbkz = 12384, |
| 12398 | VGETEXPPHZmk = 12385, |
| 12399 | VGETEXPPHZmkz = 12386, |
| 12400 | VGETEXPPHZr = 12387, |
| 12401 | VGETEXPPHZrb = 12388, |
| 12402 | VGETEXPPHZrbk = 12389, |
| 12403 | VGETEXPPHZrbkz = 12390, |
| 12404 | VGETEXPPHZrk = 12391, |
| 12405 | VGETEXPPHZrkz = 12392, |
| 12406 | VGETEXPPSZ128m = 12393, |
| 12407 | VGETEXPPSZ128mb = 12394, |
| 12408 | VGETEXPPSZ128mbk = 12395, |
| 12409 | VGETEXPPSZ128mbkz = 12396, |
| 12410 | VGETEXPPSZ128mk = 12397, |
| 12411 | VGETEXPPSZ128mkz = 12398, |
| 12412 | VGETEXPPSZ128r = 12399, |
| 12413 | VGETEXPPSZ128rk = 12400, |
| 12414 | VGETEXPPSZ128rkz = 12401, |
| 12415 | VGETEXPPSZ256m = 12402, |
| 12416 | VGETEXPPSZ256mb = 12403, |
| 12417 | VGETEXPPSZ256mbk = 12404, |
| 12418 | VGETEXPPSZ256mbkz = 12405, |
| 12419 | VGETEXPPSZ256mk = 12406, |
| 12420 | VGETEXPPSZ256mkz = 12407, |
| 12421 | VGETEXPPSZ256r = 12408, |
| 12422 | VGETEXPPSZ256rk = 12409, |
| 12423 | VGETEXPPSZ256rkz = 12410, |
| 12424 | VGETEXPPSZm = 12411, |
| 12425 | VGETEXPPSZmb = 12412, |
| 12426 | VGETEXPPSZmbk = 12413, |
| 12427 | VGETEXPPSZmbkz = 12414, |
| 12428 | VGETEXPPSZmk = 12415, |
| 12429 | VGETEXPPSZmkz = 12416, |
| 12430 | VGETEXPPSZr = 12417, |
| 12431 | VGETEXPPSZrb = 12418, |
| 12432 | VGETEXPPSZrbk = 12419, |
| 12433 | VGETEXPPSZrbkz = 12420, |
| 12434 | VGETEXPPSZrk = 12421, |
| 12435 | VGETEXPPSZrkz = 12422, |
| 12436 | VGETEXPSDZm = 12423, |
| 12437 | VGETEXPSDZmk = 12424, |
| 12438 | VGETEXPSDZmkz = 12425, |
| 12439 | VGETEXPSDZr = 12426, |
| 12440 | VGETEXPSDZrb = 12427, |
| 12441 | VGETEXPSDZrbk = 12428, |
| 12442 | VGETEXPSDZrbkz = 12429, |
| 12443 | VGETEXPSDZrk = 12430, |
| 12444 | VGETEXPSDZrkz = 12431, |
| 12445 | VGETEXPSHZm = 12432, |
| 12446 | VGETEXPSHZmk = 12433, |
| 12447 | VGETEXPSHZmkz = 12434, |
| 12448 | VGETEXPSHZr = 12435, |
| 12449 | VGETEXPSHZrb = 12436, |
| 12450 | VGETEXPSHZrbk = 12437, |
| 12451 | VGETEXPSHZrbkz = 12438, |
| 12452 | VGETEXPSHZrk = 12439, |
| 12453 | VGETEXPSHZrkz = 12440, |
| 12454 | VGETEXPSSZm = 12441, |
| 12455 | VGETEXPSSZmk = 12442, |
| 12456 | VGETEXPSSZmkz = 12443, |
| 12457 | VGETEXPSSZr = 12444, |
| 12458 | VGETEXPSSZrb = 12445, |
| 12459 | VGETEXPSSZrbk = 12446, |
| 12460 | VGETEXPSSZrbkz = 12447, |
| 12461 | VGETEXPSSZrk = 12448, |
| 12462 | VGETEXPSSZrkz = 12449, |
| 12463 | VGETMANTBF16Z128rmbi = 12450, |
| 12464 | VGETMANTBF16Z128rmbik = 12451, |
| 12465 | VGETMANTBF16Z128rmbikz = 12452, |
| 12466 | VGETMANTBF16Z128rmi = 12453, |
| 12467 | VGETMANTBF16Z128rmik = 12454, |
| 12468 | VGETMANTBF16Z128rmikz = 12455, |
| 12469 | VGETMANTBF16Z128rri = 12456, |
| 12470 | VGETMANTBF16Z128rrik = 12457, |
| 12471 | VGETMANTBF16Z128rrikz = 12458, |
| 12472 | VGETMANTBF16Z256rmbi = 12459, |
| 12473 | VGETMANTBF16Z256rmbik = 12460, |
| 12474 | VGETMANTBF16Z256rmbikz = 12461, |
| 12475 | VGETMANTBF16Z256rmi = 12462, |
| 12476 | VGETMANTBF16Z256rmik = 12463, |
| 12477 | VGETMANTBF16Z256rmikz = 12464, |
| 12478 | VGETMANTBF16Z256rri = 12465, |
| 12479 | VGETMANTBF16Z256rrik = 12466, |
| 12480 | VGETMANTBF16Z256rrikz = 12467, |
| 12481 | VGETMANTBF16Zrmbi = 12468, |
| 12482 | VGETMANTBF16Zrmbik = 12469, |
| 12483 | VGETMANTBF16Zrmbikz = 12470, |
| 12484 | VGETMANTBF16Zrmi = 12471, |
| 12485 | VGETMANTBF16Zrmik = 12472, |
| 12486 | VGETMANTBF16Zrmikz = 12473, |
| 12487 | VGETMANTBF16Zrri = 12474, |
| 12488 | VGETMANTBF16Zrrik = 12475, |
| 12489 | VGETMANTBF16Zrrikz = 12476, |
| 12490 | VGETMANTPDZ128rmbi = 12477, |
| 12491 | VGETMANTPDZ128rmbik = 12478, |
| 12492 | VGETMANTPDZ128rmbikz = 12479, |
| 12493 | VGETMANTPDZ128rmi = 12480, |
| 12494 | VGETMANTPDZ128rmik = 12481, |
| 12495 | VGETMANTPDZ128rmikz = 12482, |
| 12496 | VGETMANTPDZ128rri = 12483, |
| 12497 | VGETMANTPDZ128rrik = 12484, |
| 12498 | VGETMANTPDZ128rrikz = 12485, |
| 12499 | VGETMANTPDZ256rmbi = 12486, |
| 12500 | VGETMANTPDZ256rmbik = 12487, |
| 12501 | VGETMANTPDZ256rmbikz = 12488, |
| 12502 | VGETMANTPDZ256rmi = 12489, |
| 12503 | VGETMANTPDZ256rmik = 12490, |
| 12504 | VGETMANTPDZ256rmikz = 12491, |
| 12505 | VGETMANTPDZ256rri = 12492, |
| 12506 | VGETMANTPDZ256rrik = 12493, |
| 12507 | VGETMANTPDZ256rrikz = 12494, |
| 12508 | VGETMANTPDZrmbi = 12495, |
| 12509 | VGETMANTPDZrmbik = 12496, |
| 12510 | VGETMANTPDZrmbikz = 12497, |
| 12511 | VGETMANTPDZrmi = 12498, |
| 12512 | VGETMANTPDZrmik = 12499, |
| 12513 | VGETMANTPDZrmikz = 12500, |
| 12514 | VGETMANTPDZrri = 12501, |
| 12515 | VGETMANTPDZrrib = 12502, |
| 12516 | VGETMANTPDZrribk = 12503, |
| 12517 | VGETMANTPDZrribkz = 12504, |
| 12518 | VGETMANTPDZrrik = 12505, |
| 12519 | VGETMANTPDZrrikz = 12506, |
| 12520 | VGETMANTPHZ128rmbi = 12507, |
| 12521 | VGETMANTPHZ128rmbik = 12508, |
| 12522 | VGETMANTPHZ128rmbikz = 12509, |
| 12523 | VGETMANTPHZ128rmi = 12510, |
| 12524 | VGETMANTPHZ128rmik = 12511, |
| 12525 | VGETMANTPHZ128rmikz = 12512, |
| 12526 | VGETMANTPHZ128rri = 12513, |
| 12527 | VGETMANTPHZ128rrik = 12514, |
| 12528 | VGETMANTPHZ128rrikz = 12515, |
| 12529 | VGETMANTPHZ256rmbi = 12516, |
| 12530 | VGETMANTPHZ256rmbik = 12517, |
| 12531 | VGETMANTPHZ256rmbikz = 12518, |
| 12532 | VGETMANTPHZ256rmi = 12519, |
| 12533 | VGETMANTPHZ256rmik = 12520, |
| 12534 | VGETMANTPHZ256rmikz = 12521, |
| 12535 | VGETMANTPHZ256rri = 12522, |
| 12536 | VGETMANTPHZ256rrik = 12523, |
| 12537 | VGETMANTPHZ256rrikz = 12524, |
| 12538 | VGETMANTPHZrmbi = 12525, |
| 12539 | VGETMANTPHZrmbik = 12526, |
| 12540 | VGETMANTPHZrmbikz = 12527, |
| 12541 | VGETMANTPHZrmi = 12528, |
| 12542 | VGETMANTPHZrmik = 12529, |
| 12543 | VGETMANTPHZrmikz = 12530, |
| 12544 | VGETMANTPHZrri = 12531, |
| 12545 | VGETMANTPHZrrib = 12532, |
| 12546 | VGETMANTPHZrribk = 12533, |
| 12547 | VGETMANTPHZrribkz = 12534, |
| 12548 | VGETMANTPHZrrik = 12535, |
| 12549 | VGETMANTPHZrrikz = 12536, |
| 12550 | VGETMANTPSZ128rmbi = 12537, |
| 12551 | VGETMANTPSZ128rmbik = 12538, |
| 12552 | VGETMANTPSZ128rmbikz = 12539, |
| 12553 | VGETMANTPSZ128rmi = 12540, |
| 12554 | VGETMANTPSZ128rmik = 12541, |
| 12555 | VGETMANTPSZ128rmikz = 12542, |
| 12556 | VGETMANTPSZ128rri = 12543, |
| 12557 | VGETMANTPSZ128rrik = 12544, |
| 12558 | VGETMANTPSZ128rrikz = 12545, |
| 12559 | VGETMANTPSZ256rmbi = 12546, |
| 12560 | VGETMANTPSZ256rmbik = 12547, |
| 12561 | VGETMANTPSZ256rmbikz = 12548, |
| 12562 | VGETMANTPSZ256rmi = 12549, |
| 12563 | VGETMANTPSZ256rmik = 12550, |
| 12564 | VGETMANTPSZ256rmikz = 12551, |
| 12565 | VGETMANTPSZ256rri = 12552, |
| 12566 | VGETMANTPSZ256rrik = 12553, |
| 12567 | VGETMANTPSZ256rrikz = 12554, |
| 12568 | VGETMANTPSZrmbi = 12555, |
| 12569 | VGETMANTPSZrmbik = 12556, |
| 12570 | VGETMANTPSZrmbikz = 12557, |
| 12571 | VGETMANTPSZrmi = 12558, |
| 12572 | VGETMANTPSZrmik = 12559, |
| 12573 | VGETMANTPSZrmikz = 12560, |
| 12574 | VGETMANTPSZrri = 12561, |
| 12575 | VGETMANTPSZrrib = 12562, |
| 12576 | VGETMANTPSZrribk = 12563, |
| 12577 | VGETMANTPSZrribkz = 12564, |
| 12578 | VGETMANTPSZrrik = 12565, |
| 12579 | VGETMANTPSZrrikz = 12566, |
| 12580 | VGETMANTSDZrmi = 12567, |
| 12581 | VGETMANTSDZrmik = 12568, |
| 12582 | VGETMANTSDZrmikz = 12569, |
| 12583 | VGETMANTSDZrri = 12570, |
| 12584 | VGETMANTSDZrrib = 12571, |
| 12585 | VGETMANTSDZrribk = 12572, |
| 12586 | VGETMANTSDZrribkz = 12573, |
| 12587 | VGETMANTSDZrrik = 12574, |
| 12588 | VGETMANTSDZrrikz = 12575, |
| 12589 | VGETMANTSHZrmi = 12576, |
| 12590 | VGETMANTSHZrmik = 12577, |
| 12591 | VGETMANTSHZrmikz = 12578, |
| 12592 | VGETMANTSHZrri = 12579, |
| 12593 | VGETMANTSHZrrib = 12580, |
| 12594 | VGETMANTSHZrribk = 12581, |
| 12595 | VGETMANTSHZrribkz = 12582, |
| 12596 | VGETMANTSHZrrik = 12583, |
| 12597 | VGETMANTSHZrrikz = 12584, |
| 12598 | VGETMANTSSZrmi = 12585, |
| 12599 | VGETMANTSSZrmik = 12586, |
| 12600 | VGETMANTSSZrmikz = 12587, |
| 12601 | VGETMANTSSZrri = 12588, |
| 12602 | VGETMANTSSZrrib = 12589, |
| 12603 | VGETMANTSSZrribk = 12590, |
| 12604 | VGETMANTSSZrribkz = 12591, |
| 12605 | VGETMANTSSZrrik = 12592, |
| 12606 | VGETMANTSSZrrikz = 12593, |
| 12607 | VGF2P8AFFINEINVQBYrmi = 12594, |
| 12608 | VGF2P8AFFINEINVQBYrri = 12595, |
| 12609 | VGF2P8AFFINEINVQBZ128rmbi = 12596, |
| 12610 | VGF2P8AFFINEINVQBZ128rmbik = 12597, |
| 12611 | VGF2P8AFFINEINVQBZ128rmbikz = 12598, |
| 12612 | VGF2P8AFFINEINVQBZ128rmi = 12599, |
| 12613 | VGF2P8AFFINEINVQBZ128rmik = 12600, |
| 12614 | VGF2P8AFFINEINVQBZ128rmikz = 12601, |
| 12615 | VGF2P8AFFINEINVQBZ128rri = 12602, |
| 12616 | VGF2P8AFFINEINVQBZ128rrik = 12603, |
| 12617 | VGF2P8AFFINEINVQBZ128rrikz = 12604, |
| 12618 | VGF2P8AFFINEINVQBZ256rmbi = 12605, |
| 12619 | VGF2P8AFFINEINVQBZ256rmbik = 12606, |
| 12620 | VGF2P8AFFINEINVQBZ256rmbikz = 12607, |
| 12621 | VGF2P8AFFINEINVQBZ256rmi = 12608, |
| 12622 | VGF2P8AFFINEINVQBZ256rmik = 12609, |
| 12623 | VGF2P8AFFINEINVQBZ256rmikz = 12610, |
| 12624 | VGF2P8AFFINEINVQBZ256rri = 12611, |
| 12625 | VGF2P8AFFINEINVQBZ256rrik = 12612, |
| 12626 | VGF2P8AFFINEINVQBZ256rrikz = 12613, |
| 12627 | VGF2P8AFFINEINVQBZrmbi = 12614, |
| 12628 | VGF2P8AFFINEINVQBZrmbik = 12615, |
| 12629 | VGF2P8AFFINEINVQBZrmbikz = 12616, |
| 12630 | VGF2P8AFFINEINVQBZrmi = 12617, |
| 12631 | VGF2P8AFFINEINVQBZrmik = 12618, |
| 12632 | VGF2P8AFFINEINVQBZrmikz = 12619, |
| 12633 | VGF2P8AFFINEINVQBZrri = 12620, |
| 12634 | VGF2P8AFFINEINVQBZrrik = 12621, |
| 12635 | VGF2P8AFFINEINVQBZrrikz = 12622, |
| 12636 | VGF2P8AFFINEINVQBrmi = 12623, |
| 12637 | VGF2P8AFFINEINVQBrri = 12624, |
| 12638 | VGF2P8AFFINEQBYrmi = 12625, |
| 12639 | VGF2P8AFFINEQBYrri = 12626, |
| 12640 | VGF2P8AFFINEQBZ128rmbi = 12627, |
| 12641 | VGF2P8AFFINEQBZ128rmbik = 12628, |
| 12642 | VGF2P8AFFINEQBZ128rmbikz = 12629, |
| 12643 | VGF2P8AFFINEQBZ128rmi = 12630, |
| 12644 | VGF2P8AFFINEQBZ128rmik = 12631, |
| 12645 | VGF2P8AFFINEQBZ128rmikz = 12632, |
| 12646 | VGF2P8AFFINEQBZ128rri = 12633, |
| 12647 | VGF2P8AFFINEQBZ128rrik = 12634, |
| 12648 | VGF2P8AFFINEQBZ128rrikz = 12635, |
| 12649 | VGF2P8AFFINEQBZ256rmbi = 12636, |
| 12650 | VGF2P8AFFINEQBZ256rmbik = 12637, |
| 12651 | VGF2P8AFFINEQBZ256rmbikz = 12638, |
| 12652 | VGF2P8AFFINEQBZ256rmi = 12639, |
| 12653 | VGF2P8AFFINEQBZ256rmik = 12640, |
| 12654 | VGF2P8AFFINEQBZ256rmikz = 12641, |
| 12655 | VGF2P8AFFINEQBZ256rri = 12642, |
| 12656 | VGF2P8AFFINEQBZ256rrik = 12643, |
| 12657 | VGF2P8AFFINEQBZ256rrikz = 12644, |
| 12658 | VGF2P8AFFINEQBZrmbi = 12645, |
| 12659 | VGF2P8AFFINEQBZrmbik = 12646, |
| 12660 | VGF2P8AFFINEQBZrmbikz = 12647, |
| 12661 | VGF2P8AFFINEQBZrmi = 12648, |
| 12662 | VGF2P8AFFINEQBZrmik = 12649, |
| 12663 | VGF2P8AFFINEQBZrmikz = 12650, |
| 12664 | VGF2P8AFFINEQBZrri = 12651, |
| 12665 | VGF2P8AFFINEQBZrrik = 12652, |
| 12666 | VGF2P8AFFINEQBZrrikz = 12653, |
| 12667 | VGF2P8AFFINEQBrmi = 12654, |
| 12668 | VGF2P8AFFINEQBrri = 12655, |
| 12669 | VGF2P8MULBYrm = 12656, |
| 12670 | VGF2P8MULBYrr = 12657, |
| 12671 | VGF2P8MULBZ128rm = 12658, |
| 12672 | VGF2P8MULBZ128rmk = 12659, |
| 12673 | VGF2P8MULBZ128rmkz = 12660, |
| 12674 | VGF2P8MULBZ128rr = 12661, |
| 12675 | VGF2P8MULBZ128rrk = 12662, |
| 12676 | VGF2P8MULBZ128rrkz = 12663, |
| 12677 | VGF2P8MULBZ256rm = 12664, |
| 12678 | VGF2P8MULBZ256rmk = 12665, |
| 12679 | VGF2P8MULBZ256rmkz = 12666, |
| 12680 | VGF2P8MULBZ256rr = 12667, |
| 12681 | VGF2P8MULBZ256rrk = 12668, |
| 12682 | VGF2P8MULBZ256rrkz = 12669, |
| 12683 | VGF2P8MULBZrm = 12670, |
| 12684 | VGF2P8MULBZrmk = 12671, |
| 12685 | VGF2P8MULBZrmkz = 12672, |
| 12686 | VGF2P8MULBZrr = 12673, |
| 12687 | VGF2P8MULBZrrk = 12674, |
| 12688 | VGF2P8MULBZrrkz = 12675, |
| 12689 | VGF2P8MULBrm = 12676, |
| 12690 | VGF2P8MULBrr = 12677, |
| 12691 | VHADDPDYrm = 12678, |
| 12692 | VHADDPDYrr = 12679, |
| 12693 | VHADDPDrm = 12680, |
| 12694 | VHADDPDrr = 12681, |
| 12695 | VHADDPSYrm = 12682, |
| 12696 | VHADDPSYrr = 12683, |
| 12697 | VHADDPSrm = 12684, |
| 12698 | VHADDPSrr = 12685, |
| 12699 | VHSUBPDYrm = 12686, |
| 12700 | VHSUBPDYrr = 12687, |
| 12701 | VHSUBPDrm = 12688, |
| 12702 | VHSUBPDrr = 12689, |
| 12703 | VHSUBPSYrm = 12690, |
| 12704 | VHSUBPSYrr = 12691, |
| 12705 | VHSUBPSrm = 12692, |
| 12706 | VHSUBPSrr = 12693, |
| 12707 | VINSERTF128rmi = 12694, |
| 12708 | VINSERTF128rri = 12695, |
| 12709 | VINSERTF32X4Z256rmi = 12696, |
| 12710 | VINSERTF32X4Z256rmik = 12697, |
| 12711 | VINSERTF32X4Z256rmikz = 12698, |
| 12712 | VINSERTF32X4Z256rri = 12699, |
| 12713 | VINSERTF32X4Z256rrik = 12700, |
| 12714 | VINSERTF32X4Z256rrikz = 12701, |
| 12715 | VINSERTF32X4Zrmi = 12702, |
| 12716 | VINSERTF32X4Zrmik = 12703, |
| 12717 | VINSERTF32X4Zrmikz = 12704, |
| 12718 | VINSERTF32X4Zrri = 12705, |
| 12719 | VINSERTF32X4Zrrik = 12706, |
| 12720 | VINSERTF32X4Zrrikz = 12707, |
| 12721 | VINSERTF32X8Zrmi = 12708, |
| 12722 | VINSERTF32X8Zrmik = 12709, |
| 12723 | VINSERTF32X8Zrmikz = 12710, |
| 12724 | VINSERTF32X8Zrri = 12711, |
| 12725 | VINSERTF32X8Zrrik = 12712, |
| 12726 | VINSERTF32X8Zrrikz = 12713, |
| 12727 | VINSERTF64X2Z256rmi = 12714, |
| 12728 | VINSERTF64X2Z256rmik = 12715, |
| 12729 | VINSERTF64X2Z256rmikz = 12716, |
| 12730 | VINSERTF64X2Z256rri = 12717, |
| 12731 | VINSERTF64X2Z256rrik = 12718, |
| 12732 | VINSERTF64X2Z256rrikz = 12719, |
| 12733 | VINSERTF64X2Zrmi = 12720, |
| 12734 | VINSERTF64X2Zrmik = 12721, |
| 12735 | VINSERTF64X2Zrmikz = 12722, |
| 12736 | VINSERTF64X2Zrri = 12723, |
| 12737 | VINSERTF64X2Zrrik = 12724, |
| 12738 | VINSERTF64X2Zrrikz = 12725, |
| 12739 | VINSERTF64X4Zrmi = 12726, |
| 12740 | VINSERTF64X4Zrmik = 12727, |
| 12741 | VINSERTF64X4Zrmikz = 12728, |
| 12742 | VINSERTF64X4Zrri = 12729, |
| 12743 | VINSERTF64X4Zrrik = 12730, |
| 12744 | VINSERTF64X4Zrrikz = 12731, |
| 12745 | VINSERTI128rmi = 12732, |
| 12746 | VINSERTI128rri = 12733, |
| 12747 | VINSERTI32X4Z256rmi = 12734, |
| 12748 | VINSERTI32X4Z256rmik = 12735, |
| 12749 | VINSERTI32X4Z256rmikz = 12736, |
| 12750 | VINSERTI32X4Z256rri = 12737, |
| 12751 | VINSERTI32X4Z256rrik = 12738, |
| 12752 | VINSERTI32X4Z256rrikz = 12739, |
| 12753 | VINSERTI32X4Zrmi = 12740, |
| 12754 | VINSERTI32X4Zrmik = 12741, |
| 12755 | VINSERTI32X4Zrmikz = 12742, |
| 12756 | VINSERTI32X4Zrri = 12743, |
| 12757 | VINSERTI32X4Zrrik = 12744, |
| 12758 | VINSERTI32X4Zrrikz = 12745, |
| 12759 | VINSERTI32X8Zrmi = 12746, |
| 12760 | VINSERTI32X8Zrmik = 12747, |
| 12761 | VINSERTI32X8Zrmikz = 12748, |
| 12762 | VINSERTI32X8Zrri = 12749, |
| 12763 | VINSERTI32X8Zrrik = 12750, |
| 12764 | VINSERTI32X8Zrrikz = 12751, |
| 12765 | VINSERTI64X2Z256rmi = 12752, |
| 12766 | VINSERTI64X2Z256rmik = 12753, |
| 12767 | VINSERTI64X2Z256rmikz = 12754, |
| 12768 | VINSERTI64X2Z256rri = 12755, |
| 12769 | VINSERTI64X2Z256rrik = 12756, |
| 12770 | VINSERTI64X2Z256rrikz = 12757, |
| 12771 | VINSERTI64X2Zrmi = 12758, |
| 12772 | VINSERTI64X2Zrmik = 12759, |
| 12773 | VINSERTI64X2Zrmikz = 12760, |
| 12774 | VINSERTI64X2Zrri = 12761, |
| 12775 | VINSERTI64X2Zrrik = 12762, |
| 12776 | VINSERTI64X2Zrrikz = 12763, |
| 12777 | VINSERTI64X4Zrmi = 12764, |
| 12778 | VINSERTI64X4Zrmik = 12765, |
| 12779 | VINSERTI64X4Zrmikz = 12766, |
| 12780 | VINSERTI64X4Zrri = 12767, |
| 12781 | VINSERTI64X4Zrrik = 12768, |
| 12782 | VINSERTI64X4Zrrikz = 12769, |
| 12783 | VINSERTPSZrmi = 12770, |
| 12784 | VINSERTPSZrri = 12771, |
| 12785 | VINSERTPSrmi = 12772, |
| 12786 | VINSERTPSrri = 12773, |
| 12787 | VLDDQUYrm = 12774, |
| 12788 | VLDDQUrm = 12775, |
| 12789 | VLDMXCSR = 12776, |
| 12790 | VMASKMOVDQU = 12777, |
| 12791 | VMASKMOVDQU64 = 12778, |
| 12792 | VMASKMOVPDYmr = 12779, |
| 12793 | VMASKMOVPDYrm = 12780, |
| 12794 | VMASKMOVPDmr = 12781, |
| 12795 | VMASKMOVPDrm = 12782, |
| 12796 | VMASKMOVPSYmr = 12783, |
| 12797 | VMASKMOVPSYrm = 12784, |
| 12798 | VMASKMOVPSmr = 12785, |
| 12799 | VMASKMOVPSrm = 12786, |
| 12800 | VMAXBF16Z128rm = 12787, |
| 12801 | VMAXBF16Z128rmb = 12788, |
| 12802 | VMAXBF16Z128rmbk = 12789, |
| 12803 | VMAXBF16Z128rmbkz = 12790, |
| 12804 | VMAXBF16Z128rmk = 12791, |
| 12805 | VMAXBF16Z128rmkz = 12792, |
| 12806 | VMAXBF16Z128rr = 12793, |
| 12807 | VMAXBF16Z128rrk = 12794, |
| 12808 | VMAXBF16Z128rrkz = 12795, |
| 12809 | VMAXBF16Z256rm = 12796, |
| 12810 | VMAXBF16Z256rmb = 12797, |
| 12811 | VMAXBF16Z256rmbk = 12798, |
| 12812 | VMAXBF16Z256rmbkz = 12799, |
| 12813 | VMAXBF16Z256rmk = 12800, |
| 12814 | VMAXBF16Z256rmkz = 12801, |
| 12815 | VMAXBF16Z256rr = 12802, |
| 12816 | VMAXBF16Z256rrk = 12803, |
| 12817 | VMAXBF16Z256rrkz = 12804, |
| 12818 | VMAXBF16Zrm = 12805, |
| 12819 | VMAXBF16Zrmb = 12806, |
| 12820 | VMAXBF16Zrmbk = 12807, |
| 12821 | VMAXBF16Zrmbkz = 12808, |
| 12822 | VMAXBF16Zrmk = 12809, |
| 12823 | VMAXBF16Zrmkz = 12810, |
| 12824 | VMAXBF16Zrr = 12811, |
| 12825 | VMAXBF16Zrrk = 12812, |
| 12826 | VMAXBF16Zrrkz = 12813, |
| 12827 | VMAXCPDYrm = 12814, |
| 12828 | VMAXCPDYrr = 12815, |
| 12829 | VMAXCPDZ128rm = 12816, |
| 12830 | VMAXCPDZ128rmb = 12817, |
| 12831 | VMAXCPDZ128rmbk = 12818, |
| 12832 | VMAXCPDZ128rmbkz = 12819, |
| 12833 | VMAXCPDZ128rmk = 12820, |
| 12834 | VMAXCPDZ128rmkz = 12821, |
| 12835 | VMAXCPDZ128rr = 12822, |
| 12836 | VMAXCPDZ128rrk = 12823, |
| 12837 | VMAXCPDZ128rrkz = 12824, |
| 12838 | VMAXCPDZ256rm = 12825, |
| 12839 | VMAXCPDZ256rmb = 12826, |
| 12840 | VMAXCPDZ256rmbk = 12827, |
| 12841 | VMAXCPDZ256rmbkz = 12828, |
| 12842 | VMAXCPDZ256rmk = 12829, |
| 12843 | VMAXCPDZ256rmkz = 12830, |
| 12844 | VMAXCPDZ256rr = 12831, |
| 12845 | VMAXCPDZ256rrk = 12832, |
| 12846 | VMAXCPDZ256rrkz = 12833, |
| 12847 | VMAXCPDZrm = 12834, |
| 12848 | VMAXCPDZrmb = 12835, |
| 12849 | VMAXCPDZrmbk = 12836, |
| 12850 | VMAXCPDZrmbkz = 12837, |
| 12851 | VMAXCPDZrmk = 12838, |
| 12852 | VMAXCPDZrmkz = 12839, |
| 12853 | VMAXCPDZrr = 12840, |
| 12854 | VMAXCPDZrrk = 12841, |
| 12855 | VMAXCPDZrrkz = 12842, |
| 12856 | VMAXCPDrm = 12843, |
| 12857 | VMAXCPDrr = 12844, |
| 12858 | VMAXCPHZ128rm = 12845, |
| 12859 | VMAXCPHZ128rmb = 12846, |
| 12860 | VMAXCPHZ128rmbk = 12847, |
| 12861 | VMAXCPHZ128rmbkz = 12848, |
| 12862 | VMAXCPHZ128rmk = 12849, |
| 12863 | VMAXCPHZ128rmkz = 12850, |
| 12864 | VMAXCPHZ128rr = 12851, |
| 12865 | VMAXCPHZ128rrk = 12852, |
| 12866 | VMAXCPHZ128rrkz = 12853, |
| 12867 | VMAXCPHZ256rm = 12854, |
| 12868 | VMAXCPHZ256rmb = 12855, |
| 12869 | VMAXCPHZ256rmbk = 12856, |
| 12870 | VMAXCPHZ256rmbkz = 12857, |
| 12871 | VMAXCPHZ256rmk = 12858, |
| 12872 | VMAXCPHZ256rmkz = 12859, |
| 12873 | VMAXCPHZ256rr = 12860, |
| 12874 | VMAXCPHZ256rrk = 12861, |
| 12875 | VMAXCPHZ256rrkz = 12862, |
| 12876 | VMAXCPHZrm = 12863, |
| 12877 | VMAXCPHZrmb = 12864, |
| 12878 | VMAXCPHZrmbk = 12865, |
| 12879 | VMAXCPHZrmbkz = 12866, |
| 12880 | VMAXCPHZrmk = 12867, |
| 12881 | VMAXCPHZrmkz = 12868, |
| 12882 | VMAXCPHZrr = 12869, |
| 12883 | VMAXCPHZrrk = 12870, |
| 12884 | VMAXCPHZrrkz = 12871, |
| 12885 | VMAXCPSYrm = 12872, |
| 12886 | VMAXCPSYrr = 12873, |
| 12887 | VMAXCPSZ128rm = 12874, |
| 12888 | VMAXCPSZ128rmb = 12875, |
| 12889 | VMAXCPSZ128rmbk = 12876, |
| 12890 | VMAXCPSZ128rmbkz = 12877, |
| 12891 | VMAXCPSZ128rmk = 12878, |
| 12892 | VMAXCPSZ128rmkz = 12879, |
| 12893 | VMAXCPSZ128rr = 12880, |
| 12894 | VMAXCPSZ128rrk = 12881, |
| 12895 | VMAXCPSZ128rrkz = 12882, |
| 12896 | VMAXCPSZ256rm = 12883, |
| 12897 | VMAXCPSZ256rmb = 12884, |
| 12898 | VMAXCPSZ256rmbk = 12885, |
| 12899 | VMAXCPSZ256rmbkz = 12886, |
| 12900 | VMAXCPSZ256rmk = 12887, |
| 12901 | VMAXCPSZ256rmkz = 12888, |
| 12902 | VMAXCPSZ256rr = 12889, |
| 12903 | VMAXCPSZ256rrk = 12890, |
| 12904 | VMAXCPSZ256rrkz = 12891, |
| 12905 | VMAXCPSZrm = 12892, |
| 12906 | VMAXCPSZrmb = 12893, |
| 12907 | VMAXCPSZrmbk = 12894, |
| 12908 | VMAXCPSZrmbkz = 12895, |
| 12909 | VMAXCPSZrmk = 12896, |
| 12910 | VMAXCPSZrmkz = 12897, |
| 12911 | VMAXCPSZrr = 12898, |
| 12912 | VMAXCPSZrrk = 12899, |
| 12913 | VMAXCPSZrrkz = 12900, |
| 12914 | VMAXCPSrm = 12901, |
| 12915 | VMAXCPSrr = 12902, |
| 12916 | VMAXCSDZrm = 12903, |
| 12917 | VMAXCSDZrr = 12904, |
| 12918 | VMAXCSDrm = 12905, |
| 12919 | VMAXCSDrr = 12906, |
| 12920 | VMAXCSHZrm = 12907, |
| 12921 | VMAXCSHZrr = 12908, |
| 12922 | VMAXCSSZrm = 12909, |
| 12923 | VMAXCSSZrr = 12910, |
| 12924 | VMAXCSSrm = 12911, |
| 12925 | VMAXCSSrr = 12912, |
| 12926 | VMAXPDYrm = 12913, |
| 12927 | VMAXPDYrr = 12914, |
| 12928 | VMAXPDZ128rm = 12915, |
| 12929 | VMAXPDZ128rmb = 12916, |
| 12930 | VMAXPDZ128rmbk = 12917, |
| 12931 | VMAXPDZ128rmbkz = 12918, |
| 12932 | VMAXPDZ128rmk = 12919, |
| 12933 | VMAXPDZ128rmkz = 12920, |
| 12934 | VMAXPDZ128rr = 12921, |
| 12935 | VMAXPDZ128rrk = 12922, |
| 12936 | VMAXPDZ128rrkz = 12923, |
| 12937 | VMAXPDZ256rm = 12924, |
| 12938 | VMAXPDZ256rmb = 12925, |
| 12939 | VMAXPDZ256rmbk = 12926, |
| 12940 | VMAXPDZ256rmbkz = 12927, |
| 12941 | VMAXPDZ256rmk = 12928, |
| 12942 | VMAXPDZ256rmkz = 12929, |
| 12943 | VMAXPDZ256rr = 12930, |
| 12944 | VMAXPDZ256rrk = 12931, |
| 12945 | VMAXPDZ256rrkz = 12932, |
| 12946 | VMAXPDZrm = 12933, |
| 12947 | VMAXPDZrmb = 12934, |
| 12948 | VMAXPDZrmbk = 12935, |
| 12949 | VMAXPDZrmbkz = 12936, |
| 12950 | VMAXPDZrmk = 12937, |
| 12951 | VMAXPDZrmkz = 12938, |
| 12952 | VMAXPDZrr = 12939, |
| 12953 | VMAXPDZrrb = 12940, |
| 12954 | VMAXPDZrrbk = 12941, |
| 12955 | VMAXPDZrrbkz = 12942, |
| 12956 | VMAXPDZrrk = 12943, |
| 12957 | VMAXPDZrrkz = 12944, |
| 12958 | VMAXPDrm = 12945, |
| 12959 | VMAXPDrr = 12946, |
| 12960 | VMAXPHZ128rm = 12947, |
| 12961 | VMAXPHZ128rmb = 12948, |
| 12962 | VMAXPHZ128rmbk = 12949, |
| 12963 | VMAXPHZ128rmbkz = 12950, |
| 12964 | VMAXPHZ128rmk = 12951, |
| 12965 | VMAXPHZ128rmkz = 12952, |
| 12966 | VMAXPHZ128rr = 12953, |
| 12967 | VMAXPHZ128rrk = 12954, |
| 12968 | VMAXPHZ128rrkz = 12955, |
| 12969 | VMAXPHZ256rm = 12956, |
| 12970 | VMAXPHZ256rmb = 12957, |
| 12971 | VMAXPHZ256rmbk = 12958, |
| 12972 | VMAXPHZ256rmbkz = 12959, |
| 12973 | VMAXPHZ256rmk = 12960, |
| 12974 | VMAXPHZ256rmkz = 12961, |
| 12975 | VMAXPHZ256rr = 12962, |
| 12976 | VMAXPHZ256rrk = 12963, |
| 12977 | VMAXPHZ256rrkz = 12964, |
| 12978 | VMAXPHZrm = 12965, |
| 12979 | VMAXPHZrmb = 12966, |
| 12980 | VMAXPHZrmbk = 12967, |
| 12981 | VMAXPHZrmbkz = 12968, |
| 12982 | VMAXPHZrmk = 12969, |
| 12983 | VMAXPHZrmkz = 12970, |
| 12984 | VMAXPHZrr = 12971, |
| 12985 | VMAXPHZrrb = 12972, |
| 12986 | VMAXPHZrrbk = 12973, |
| 12987 | VMAXPHZrrbkz = 12974, |
| 12988 | VMAXPHZrrk = 12975, |
| 12989 | VMAXPHZrrkz = 12976, |
| 12990 | VMAXPSYrm = 12977, |
| 12991 | VMAXPSYrr = 12978, |
| 12992 | VMAXPSZ128rm = 12979, |
| 12993 | VMAXPSZ128rmb = 12980, |
| 12994 | VMAXPSZ128rmbk = 12981, |
| 12995 | VMAXPSZ128rmbkz = 12982, |
| 12996 | VMAXPSZ128rmk = 12983, |
| 12997 | VMAXPSZ128rmkz = 12984, |
| 12998 | VMAXPSZ128rr = 12985, |
| 12999 | VMAXPSZ128rrk = 12986, |
| 13000 | VMAXPSZ128rrkz = 12987, |
| 13001 | VMAXPSZ256rm = 12988, |
| 13002 | VMAXPSZ256rmb = 12989, |
| 13003 | VMAXPSZ256rmbk = 12990, |
| 13004 | VMAXPSZ256rmbkz = 12991, |
| 13005 | VMAXPSZ256rmk = 12992, |
| 13006 | VMAXPSZ256rmkz = 12993, |
| 13007 | VMAXPSZ256rr = 12994, |
| 13008 | VMAXPSZ256rrk = 12995, |
| 13009 | VMAXPSZ256rrkz = 12996, |
| 13010 | VMAXPSZrm = 12997, |
| 13011 | VMAXPSZrmb = 12998, |
| 13012 | VMAXPSZrmbk = 12999, |
| 13013 | VMAXPSZrmbkz = 13000, |
| 13014 | VMAXPSZrmk = 13001, |
| 13015 | VMAXPSZrmkz = 13002, |
| 13016 | VMAXPSZrr = 13003, |
| 13017 | VMAXPSZrrb = 13004, |
| 13018 | VMAXPSZrrbk = 13005, |
| 13019 | VMAXPSZrrbkz = 13006, |
| 13020 | VMAXPSZrrk = 13007, |
| 13021 | VMAXPSZrrkz = 13008, |
| 13022 | VMAXPSrm = 13009, |
| 13023 | VMAXPSrr = 13010, |
| 13024 | VMAXSDZrm = 13011, |
| 13025 | VMAXSDZrm_Int = 13012, |
| 13026 | VMAXSDZrmk_Int = 13013, |
| 13027 | VMAXSDZrmkz_Int = 13014, |
| 13028 | VMAXSDZrr = 13015, |
| 13029 | VMAXSDZrr_Int = 13016, |
| 13030 | VMAXSDZrrb_Int = 13017, |
| 13031 | VMAXSDZrrbk_Int = 13018, |
| 13032 | VMAXSDZrrbkz_Int = 13019, |
| 13033 | VMAXSDZrrk_Int = 13020, |
| 13034 | VMAXSDZrrkz_Int = 13021, |
| 13035 | VMAXSDrm = 13022, |
| 13036 | VMAXSDrm_Int = 13023, |
| 13037 | VMAXSDrr = 13024, |
| 13038 | VMAXSDrr_Int = 13025, |
| 13039 | VMAXSHZrm = 13026, |
| 13040 | VMAXSHZrm_Int = 13027, |
| 13041 | VMAXSHZrmk_Int = 13028, |
| 13042 | VMAXSHZrmkz_Int = 13029, |
| 13043 | VMAXSHZrr = 13030, |
| 13044 | VMAXSHZrr_Int = 13031, |
| 13045 | VMAXSHZrrb_Int = 13032, |
| 13046 | VMAXSHZrrbk_Int = 13033, |
| 13047 | VMAXSHZrrbkz_Int = 13034, |
| 13048 | VMAXSHZrrk_Int = 13035, |
| 13049 | VMAXSHZrrkz_Int = 13036, |
| 13050 | VMAXSSZrm = 13037, |
| 13051 | VMAXSSZrm_Int = 13038, |
| 13052 | VMAXSSZrmk_Int = 13039, |
| 13053 | VMAXSSZrmkz_Int = 13040, |
| 13054 | VMAXSSZrr = 13041, |
| 13055 | VMAXSSZrr_Int = 13042, |
| 13056 | VMAXSSZrrb_Int = 13043, |
| 13057 | VMAXSSZrrbk_Int = 13044, |
| 13058 | VMAXSSZrrbkz_Int = 13045, |
| 13059 | VMAXSSZrrk_Int = 13046, |
| 13060 | VMAXSSZrrkz_Int = 13047, |
| 13061 | VMAXSSrm = 13048, |
| 13062 | VMAXSSrm_Int = 13049, |
| 13063 | VMAXSSrr = 13050, |
| 13064 | VMAXSSrr_Int = 13051, |
| 13065 | VMCALL = 13052, |
| 13066 | VMCLEARm = 13053, |
| 13067 | VMFUNC = 13054, |
| 13068 | VMINBF16Z128rm = 13055, |
| 13069 | VMINBF16Z128rmb = 13056, |
| 13070 | VMINBF16Z128rmbk = 13057, |
| 13071 | VMINBF16Z128rmbkz = 13058, |
| 13072 | VMINBF16Z128rmk = 13059, |
| 13073 | VMINBF16Z128rmkz = 13060, |
| 13074 | VMINBF16Z128rr = 13061, |
| 13075 | VMINBF16Z128rrk = 13062, |
| 13076 | VMINBF16Z128rrkz = 13063, |
| 13077 | VMINBF16Z256rm = 13064, |
| 13078 | VMINBF16Z256rmb = 13065, |
| 13079 | VMINBF16Z256rmbk = 13066, |
| 13080 | VMINBF16Z256rmbkz = 13067, |
| 13081 | VMINBF16Z256rmk = 13068, |
| 13082 | VMINBF16Z256rmkz = 13069, |
| 13083 | VMINBF16Z256rr = 13070, |
| 13084 | VMINBF16Z256rrk = 13071, |
| 13085 | VMINBF16Z256rrkz = 13072, |
| 13086 | VMINBF16Zrm = 13073, |
| 13087 | VMINBF16Zrmb = 13074, |
| 13088 | VMINBF16Zrmbk = 13075, |
| 13089 | VMINBF16Zrmbkz = 13076, |
| 13090 | VMINBF16Zrmk = 13077, |
| 13091 | VMINBF16Zrmkz = 13078, |
| 13092 | VMINBF16Zrr = 13079, |
| 13093 | VMINBF16Zrrk = 13080, |
| 13094 | VMINBF16Zrrkz = 13081, |
| 13095 | VMINCPDYrm = 13082, |
| 13096 | VMINCPDYrr = 13083, |
| 13097 | VMINCPDZ128rm = 13084, |
| 13098 | VMINCPDZ128rmb = 13085, |
| 13099 | VMINCPDZ128rmbk = 13086, |
| 13100 | VMINCPDZ128rmbkz = 13087, |
| 13101 | VMINCPDZ128rmk = 13088, |
| 13102 | VMINCPDZ128rmkz = 13089, |
| 13103 | VMINCPDZ128rr = 13090, |
| 13104 | VMINCPDZ128rrk = 13091, |
| 13105 | VMINCPDZ128rrkz = 13092, |
| 13106 | VMINCPDZ256rm = 13093, |
| 13107 | VMINCPDZ256rmb = 13094, |
| 13108 | VMINCPDZ256rmbk = 13095, |
| 13109 | VMINCPDZ256rmbkz = 13096, |
| 13110 | VMINCPDZ256rmk = 13097, |
| 13111 | VMINCPDZ256rmkz = 13098, |
| 13112 | VMINCPDZ256rr = 13099, |
| 13113 | VMINCPDZ256rrk = 13100, |
| 13114 | VMINCPDZ256rrkz = 13101, |
| 13115 | VMINCPDZrm = 13102, |
| 13116 | VMINCPDZrmb = 13103, |
| 13117 | VMINCPDZrmbk = 13104, |
| 13118 | VMINCPDZrmbkz = 13105, |
| 13119 | VMINCPDZrmk = 13106, |
| 13120 | VMINCPDZrmkz = 13107, |
| 13121 | VMINCPDZrr = 13108, |
| 13122 | VMINCPDZrrk = 13109, |
| 13123 | VMINCPDZrrkz = 13110, |
| 13124 | VMINCPDrm = 13111, |
| 13125 | VMINCPDrr = 13112, |
| 13126 | VMINCPHZ128rm = 13113, |
| 13127 | VMINCPHZ128rmb = 13114, |
| 13128 | VMINCPHZ128rmbk = 13115, |
| 13129 | VMINCPHZ128rmbkz = 13116, |
| 13130 | VMINCPHZ128rmk = 13117, |
| 13131 | VMINCPHZ128rmkz = 13118, |
| 13132 | VMINCPHZ128rr = 13119, |
| 13133 | VMINCPHZ128rrk = 13120, |
| 13134 | VMINCPHZ128rrkz = 13121, |
| 13135 | VMINCPHZ256rm = 13122, |
| 13136 | VMINCPHZ256rmb = 13123, |
| 13137 | VMINCPHZ256rmbk = 13124, |
| 13138 | VMINCPHZ256rmbkz = 13125, |
| 13139 | VMINCPHZ256rmk = 13126, |
| 13140 | VMINCPHZ256rmkz = 13127, |
| 13141 | VMINCPHZ256rr = 13128, |
| 13142 | VMINCPHZ256rrk = 13129, |
| 13143 | VMINCPHZ256rrkz = 13130, |
| 13144 | VMINCPHZrm = 13131, |
| 13145 | VMINCPHZrmb = 13132, |
| 13146 | VMINCPHZrmbk = 13133, |
| 13147 | VMINCPHZrmbkz = 13134, |
| 13148 | VMINCPHZrmk = 13135, |
| 13149 | VMINCPHZrmkz = 13136, |
| 13150 | VMINCPHZrr = 13137, |
| 13151 | VMINCPHZrrk = 13138, |
| 13152 | VMINCPHZrrkz = 13139, |
| 13153 | VMINCPSYrm = 13140, |
| 13154 | VMINCPSYrr = 13141, |
| 13155 | VMINCPSZ128rm = 13142, |
| 13156 | VMINCPSZ128rmb = 13143, |
| 13157 | VMINCPSZ128rmbk = 13144, |
| 13158 | VMINCPSZ128rmbkz = 13145, |
| 13159 | VMINCPSZ128rmk = 13146, |
| 13160 | VMINCPSZ128rmkz = 13147, |
| 13161 | VMINCPSZ128rr = 13148, |
| 13162 | VMINCPSZ128rrk = 13149, |
| 13163 | VMINCPSZ128rrkz = 13150, |
| 13164 | VMINCPSZ256rm = 13151, |
| 13165 | VMINCPSZ256rmb = 13152, |
| 13166 | VMINCPSZ256rmbk = 13153, |
| 13167 | VMINCPSZ256rmbkz = 13154, |
| 13168 | VMINCPSZ256rmk = 13155, |
| 13169 | VMINCPSZ256rmkz = 13156, |
| 13170 | VMINCPSZ256rr = 13157, |
| 13171 | VMINCPSZ256rrk = 13158, |
| 13172 | VMINCPSZ256rrkz = 13159, |
| 13173 | VMINCPSZrm = 13160, |
| 13174 | VMINCPSZrmb = 13161, |
| 13175 | VMINCPSZrmbk = 13162, |
| 13176 | VMINCPSZrmbkz = 13163, |
| 13177 | VMINCPSZrmk = 13164, |
| 13178 | VMINCPSZrmkz = 13165, |
| 13179 | VMINCPSZrr = 13166, |
| 13180 | VMINCPSZrrk = 13167, |
| 13181 | VMINCPSZrrkz = 13168, |
| 13182 | VMINCPSrm = 13169, |
| 13183 | VMINCPSrr = 13170, |
| 13184 | VMINCSDZrm = 13171, |
| 13185 | VMINCSDZrr = 13172, |
| 13186 | VMINCSDrm = 13173, |
| 13187 | VMINCSDrr = 13174, |
| 13188 | VMINCSHZrm = 13175, |
| 13189 | VMINCSHZrr = 13176, |
| 13190 | VMINCSSZrm = 13177, |
| 13191 | VMINCSSZrr = 13178, |
| 13192 | VMINCSSrm = 13179, |
| 13193 | VMINCSSrr = 13180, |
| 13194 | VMINMAXBF16Z128rmbi = 13181, |
| 13195 | VMINMAXBF16Z128rmbik = 13182, |
| 13196 | VMINMAXBF16Z128rmbikz = 13183, |
| 13197 | VMINMAXBF16Z128rmi = 13184, |
| 13198 | VMINMAXBF16Z128rmik = 13185, |
| 13199 | VMINMAXBF16Z128rmikz = 13186, |
| 13200 | VMINMAXBF16Z128rri = 13187, |
| 13201 | VMINMAXBF16Z128rrik = 13188, |
| 13202 | VMINMAXBF16Z128rrikz = 13189, |
| 13203 | VMINMAXBF16Z256rmbi = 13190, |
| 13204 | VMINMAXBF16Z256rmbik = 13191, |
| 13205 | VMINMAXBF16Z256rmbikz = 13192, |
| 13206 | VMINMAXBF16Z256rmi = 13193, |
| 13207 | VMINMAXBF16Z256rmik = 13194, |
| 13208 | VMINMAXBF16Z256rmikz = 13195, |
| 13209 | VMINMAXBF16Z256rri = 13196, |
| 13210 | VMINMAXBF16Z256rrik = 13197, |
| 13211 | VMINMAXBF16Z256rrikz = 13198, |
| 13212 | VMINMAXBF16Zrmbi = 13199, |
| 13213 | VMINMAXBF16Zrmbik = 13200, |
| 13214 | VMINMAXBF16Zrmbikz = 13201, |
| 13215 | VMINMAXBF16Zrmi = 13202, |
| 13216 | VMINMAXBF16Zrmik = 13203, |
| 13217 | VMINMAXBF16Zrmikz = 13204, |
| 13218 | VMINMAXBF16Zrri = 13205, |
| 13219 | VMINMAXBF16Zrrik = 13206, |
| 13220 | VMINMAXBF16Zrrikz = 13207, |
| 13221 | VMINMAXPDZ128rmbi = 13208, |
| 13222 | VMINMAXPDZ128rmbik = 13209, |
| 13223 | VMINMAXPDZ128rmbikz = 13210, |
| 13224 | VMINMAXPDZ128rmi = 13211, |
| 13225 | VMINMAXPDZ128rmik = 13212, |
| 13226 | VMINMAXPDZ128rmikz = 13213, |
| 13227 | VMINMAXPDZ128rri = 13214, |
| 13228 | VMINMAXPDZ128rrik = 13215, |
| 13229 | VMINMAXPDZ128rrikz = 13216, |
| 13230 | VMINMAXPDZ256rmbi = 13217, |
| 13231 | VMINMAXPDZ256rmbik = 13218, |
| 13232 | VMINMAXPDZ256rmbikz = 13219, |
| 13233 | VMINMAXPDZ256rmi = 13220, |
| 13234 | VMINMAXPDZ256rmik = 13221, |
| 13235 | VMINMAXPDZ256rmikz = 13222, |
| 13236 | VMINMAXPDZ256rri = 13223, |
| 13237 | VMINMAXPDZ256rrik = 13224, |
| 13238 | VMINMAXPDZ256rrikz = 13225, |
| 13239 | VMINMAXPDZrmbi = 13226, |
| 13240 | VMINMAXPDZrmbik = 13227, |
| 13241 | VMINMAXPDZrmbikz = 13228, |
| 13242 | VMINMAXPDZrmi = 13229, |
| 13243 | VMINMAXPDZrmik = 13230, |
| 13244 | VMINMAXPDZrmikz = 13231, |
| 13245 | VMINMAXPDZrri = 13232, |
| 13246 | VMINMAXPDZrrib = 13233, |
| 13247 | VMINMAXPDZrribk = 13234, |
| 13248 | VMINMAXPDZrribkz = 13235, |
| 13249 | VMINMAXPDZrrik = 13236, |
| 13250 | VMINMAXPDZrrikz = 13237, |
| 13251 | VMINMAXPHZ128rmbi = 13238, |
| 13252 | VMINMAXPHZ128rmbik = 13239, |
| 13253 | VMINMAXPHZ128rmbikz = 13240, |
| 13254 | VMINMAXPHZ128rmi = 13241, |
| 13255 | VMINMAXPHZ128rmik = 13242, |
| 13256 | VMINMAXPHZ128rmikz = 13243, |
| 13257 | VMINMAXPHZ128rri = 13244, |
| 13258 | VMINMAXPHZ128rrik = 13245, |
| 13259 | VMINMAXPHZ128rrikz = 13246, |
| 13260 | VMINMAXPHZ256rmbi = 13247, |
| 13261 | VMINMAXPHZ256rmbik = 13248, |
| 13262 | VMINMAXPHZ256rmbikz = 13249, |
| 13263 | VMINMAXPHZ256rmi = 13250, |
| 13264 | VMINMAXPHZ256rmik = 13251, |
| 13265 | VMINMAXPHZ256rmikz = 13252, |
| 13266 | VMINMAXPHZ256rri = 13253, |
| 13267 | VMINMAXPHZ256rrik = 13254, |
| 13268 | VMINMAXPHZ256rrikz = 13255, |
| 13269 | VMINMAXPHZrmbi = 13256, |
| 13270 | VMINMAXPHZrmbik = 13257, |
| 13271 | VMINMAXPHZrmbikz = 13258, |
| 13272 | VMINMAXPHZrmi = 13259, |
| 13273 | VMINMAXPHZrmik = 13260, |
| 13274 | VMINMAXPHZrmikz = 13261, |
| 13275 | VMINMAXPHZrri = 13262, |
| 13276 | VMINMAXPHZrrib = 13263, |
| 13277 | VMINMAXPHZrribk = 13264, |
| 13278 | VMINMAXPHZrribkz = 13265, |
| 13279 | VMINMAXPHZrrik = 13266, |
| 13280 | VMINMAXPHZrrikz = 13267, |
| 13281 | VMINMAXPSZ128rmbi = 13268, |
| 13282 | VMINMAXPSZ128rmbik = 13269, |
| 13283 | VMINMAXPSZ128rmbikz = 13270, |
| 13284 | VMINMAXPSZ128rmi = 13271, |
| 13285 | VMINMAXPSZ128rmik = 13272, |
| 13286 | VMINMAXPSZ128rmikz = 13273, |
| 13287 | VMINMAXPSZ128rri = 13274, |
| 13288 | VMINMAXPSZ128rrik = 13275, |
| 13289 | VMINMAXPSZ128rrikz = 13276, |
| 13290 | VMINMAXPSZ256rmbi = 13277, |
| 13291 | VMINMAXPSZ256rmbik = 13278, |
| 13292 | VMINMAXPSZ256rmbikz = 13279, |
| 13293 | VMINMAXPSZ256rmi = 13280, |
| 13294 | VMINMAXPSZ256rmik = 13281, |
| 13295 | VMINMAXPSZ256rmikz = 13282, |
| 13296 | VMINMAXPSZ256rri = 13283, |
| 13297 | VMINMAXPSZ256rrik = 13284, |
| 13298 | VMINMAXPSZ256rrikz = 13285, |
| 13299 | VMINMAXPSZrmbi = 13286, |
| 13300 | VMINMAXPSZrmbik = 13287, |
| 13301 | VMINMAXPSZrmbikz = 13288, |
| 13302 | VMINMAXPSZrmi = 13289, |
| 13303 | VMINMAXPSZrmik = 13290, |
| 13304 | VMINMAXPSZrmikz = 13291, |
| 13305 | VMINMAXPSZrri = 13292, |
| 13306 | VMINMAXPSZrrib = 13293, |
| 13307 | VMINMAXPSZrribk = 13294, |
| 13308 | VMINMAXPSZrribkz = 13295, |
| 13309 | VMINMAXPSZrrik = 13296, |
| 13310 | VMINMAXPSZrrikz = 13297, |
| 13311 | VMINMAXSDrmi = 13298, |
| 13312 | VMINMAXSDrmi_Int = 13299, |
| 13313 | VMINMAXSDrmik_Int = 13300, |
| 13314 | VMINMAXSDrmikz_Int = 13301, |
| 13315 | VMINMAXSDrri = 13302, |
| 13316 | VMINMAXSDrri_Int = 13303, |
| 13317 | VMINMAXSDrrib_Int = 13304, |
| 13318 | VMINMAXSDrribk_Int = 13305, |
| 13319 | VMINMAXSDrribkz_Int = 13306, |
| 13320 | VMINMAXSDrrik_Int = 13307, |
| 13321 | VMINMAXSDrrikz_Int = 13308, |
| 13322 | VMINMAXSHrmi = 13309, |
| 13323 | VMINMAXSHrmi_Int = 13310, |
| 13324 | VMINMAXSHrmik_Int = 13311, |
| 13325 | VMINMAXSHrmikz_Int = 13312, |
| 13326 | VMINMAXSHrri = 13313, |
| 13327 | VMINMAXSHrri_Int = 13314, |
| 13328 | VMINMAXSHrrib_Int = 13315, |
| 13329 | VMINMAXSHrribk_Int = 13316, |
| 13330 | VMINMAXSHrribkz_Int = 13317, |
| 13331 | VMINMAXSHrrik_Int = 13318, |
| 13332 | VMINMAXSHrrikz_Int = 13319, |
| 13333 | VMINMAXSSrmi = 13320, |
| 13334 | VMINMAXSSrmi_Int = 13321, |
| 13335 | VMINMAXSSrmik_Int = 13322, |
| 13336 | VMINMAXSSrmikz_Int = 13323, |
| 13337 | VMINMAXSSrri = 13324, |
| 13338 | VMINMAXSSrri_Int = 13325, |
| 13339 | VMINMAXSSrrib_Int = 13326, |
| 13340 | VMINMAXSSrribk_Int = 13327, |
| 13341 | VMINMAXSSrribkz_Int = 13328, |
| 13342 | VMINMAXSSrrik_Int = 13329, |
| 13343 | VMINMAXSSrrikz_Int = 13330, |
| 13344 | VMINPDYrm = 13331, |
| 13345 | VMINPDYrr = 13332, |
| 13346 | VMINPDZ128rm = 13333, |
| 13347 | VMINPDZ128rmb = 13334, |
| 13348 | VMINPDZ128rmbk = 13335, |
| 13349 | VMINPDZ128rmbkz = 13336, |
| 13350 | VMINPDZ128rmk = 13337, |
| 13351 | VMINPDZ128rmkz = 13338, |
| 13352 | VMINPDZ128rr = 13339, |
| 13353 | VMINPDZ128rrk = 13340, |
| 13354 | VMINPDZ128rrkz = 13341, |
| 13355 | VMINPDZ256rm = 13342, |
| 13356 | VMINPDZ256rmb = 13343, |
| 13357 | VMINPDZ256rmbk = 13344, |
| 13358 | VMINPDZ256rmbkz = 13345, |
| 13359 | VMINPDZ256rmk = 13346, |
| 13360 | VMINPDZ256rmkz = 13347, |
| 13361 | VMINPDZ256rr = 13348, |
| 13362 | VMINPDZ256rrk = 13349, |
| 13363 | VMINPDZ256rrkz = 13350, |
| 13364 | VMINPDZrm = 13351, |
| 13365 | VMINPDZrmb = 13352, |
| 13366 | VMINPDZrmbk = 13353, |
| 13367 | VMINPDZrmbkz = 13354, |
| 13368 | VMINPDZrmk = 13355, |
| 13369 | VMINPDZrmkz = 13356, |
| 13370 | VMINPDZrr = 13357, |
| 13371 | VMINPDZrrb = 13358, |
| 13372 | VMINPDZrrbk = 13359, |
| 13373 | VMINPDZrrbkz = 13360, |
| 13374 | VMINPDZrrk = 13361, |
| 13375 | VMINPDZrrkz = 13362, |
| 13376 | VMINPDrm = 13363, |
| 13377 | VMINPDrr = 13364, |
| 13378 | VMINPHZ128rm = 13365, |
| 13379 | VMINPHZ128rmb = 13366, |
| 13380 | VMINPHZ128rmbk = 13367, |
| 13381 | VMINPHZ128rmbkz = 13368, |
| 13382 | VMINPHZ128rmk = 13369, |
| 13383 | VMINPHZ128rmkz = 13370, |
| 13384 | VMINPHZ128rr = 13371, |
| 13385 | VMINPHZ128rrk = 13372, |
| 13386 | VMINPHZ128rrkz = 13373, |
| 13387 | VMINPHZ256rm = 13374, |
| 13388 | VMINPHZ256rmb = 13375, |
| 13389 | VMINPHZ256rmbk = 13376, |
| 13390 | VMINPHZ256rmbkz = 13377, |
| 13391 | VMINPHZ256rmk = 13378, |
| 13392 | VMINPHZ256rmkz = 13379, |
| 13393 | VMINPHZ256rr = 13380, |
| 13394 | VMINPHZ256rrk = 13381, |
| 13395 | VMINPHZ256rrkz = 13382, |
| 13396 | VMINPHZrm = 13383, |
| 13397 | VMINPHZrmb = 13384, |
| 13398 | VMINPHZrmbk = 13385, |
| 13399 | VMINPHZrmbkz = 13386, |
| 13400 | VMINPHZrmk = 13387, |
| 13401 | VMINPHZrmkz = 13388, |
| 13402 | VMINPHZrr = 13389, |
| 13403 | VMINPHZrrb = 13390, |
| 13404 | VMINPHZrrbk = 13391, |
| 13405 | VMINPHZrrbkz = 13392, |
| 13406 | VMINPHZrrk = 13393, |
| 13407 | VMINPHZrrkz = 13394, |
| 13408 | VMINPSYrm = 13395, |
| 13409 | VMINPSYrr = 13396, |
| 13410 | VMINPSZ128rm = 13397, |
| 13411 | VMINPSZ128rmb = 13398, |
| 13412 | VMINPSZ128rmbk = 13399, |
| 13413 | VMINPSZ128rmbkz = 13400, |
| 13414 | VMINPSZ128rmk = 13401, |
| 13415 | VMINPSZ128rmkz = 13402, |
| 13416 | VMINPSZ128rr = 13403, |
| 13417 | VMINPSZ128rrk = 13404, |
| 13418 | VMINPSZ128rrkz = 13405, |
| 13419 | VMINPSZ256rm = 13406, |
| 13420 | VMINPSZ256rmb = 13407, |
| 13421 | VMINPSZ256rmbk = 13408, |
| 13422 | VMINPSZ256rmbkz = 13409, |
| 13423 | VMINPSZ256rmk = 13410, |
| 13424 | VMINPSZ256rmkz = 13411, |
| 13425 | VMINPSZ256rr = 13412, |
| 13426 | VMINPSZ256rrk = 13413, |
| 13427 | VMINPSZ256rrkz = 13414, |
| 13428 | VMINPSZrm = 13415, |
| 13429 | VMINPSZrmb = 13416, |
| 13430 | VMINPSZrmbk = 13417, |
| 13431 | VMINPSZrmbkz = 13418, |
| 13432 | VMINPSZrmk = 13419, |
| 13433 | VMINPSZrmkz = 13420, |
| 13434 | VMINPSZrr = 13421, |
| 13435 | VMINPSZrrb = 13422, |
| 13436 | VMINPSZrrbk = 13423, |
| 13437 | VMINPSZrrbkz = 13424, |
| 13438 | VMINPSZrrk = 13425, |
| 13439 | VMINPSZrrkz = 13426, |
| 13440 | VMINPSrm = 13427, |
| 13441 | VMINPSrr = 13428, |
| 13442 | VMINSDZrm = 13429, |
| 13443 | VMINSDZrm_Int = 13430, |
| 13444 | VMINSDZrmk_Int = 13431, |
| 13445 | VMINSDZrmkz_Int = 13432, |
| 13446 | VMINSDZrr = 13433, |
| 13447 | VMINSDZrr_Int = 13434, |
| 13448 | VMINSDZrrb_Int = 13435, |
| 13449 | VMINSDZrrbk_Int = 13436, |
| 13450 | VMINSDZrrbkz_Int = 13437, |
| 13451 | VMINSDZrrk_Int = 13438, |
| 13452 | VMINSDZrrkz_Int = 13439, |
| 13453 | VMINSDrm = 13440, |
| 13454 | VMINSDrm_Int = 13441, |
| 13455 | VMINSDrr = 13442, |
| 13456 | VMINSDrr_Int = 13443, |
| 13457 | VMINSHZrm = 13444, |
| 13458 | VMINSHZrm_Int = 13445, |
| 13459 | VMINSHZrmk_Int = 13446, |
| 13460 | VMINSHZrmkz_Int = 13447, |
| 13461 | VMINSHZrr = 13448, |
| 13462 | VMINSHZrr_Int = 13449, |
| 13463 | VMINSHZrrb_Int = 13450, |
| 13464 | VMINSHZrrbk_Int = 13451, |
| 13465 | VMINSHZrrbkz_Int = 13452, |
| 13466 | VMINSHZrrk_Int = 13453, |
| 13467 | VMINSHZrrkz_Int = 13454, |
| 13468 | VMINSSZrm = 13455, |
| 13469 | VMINSSZrm_Int = 13456, |
| 13470 | VMINSSZrmk_Int = 13457, |
| 13471 | VMINSSZrmkz_Int = 13458, |
| 13472 | VMINSSZrr = 13459, |
| 13473 | VMINSSZrr_Int = 13460, |
| 13474 | VMINSSZrrb_Int = 13461, |
| 13475 | VMINSSZrrbk_Int = 13462, |
| 13476 | VMINSSZrrbkz_Int = 13463, |
| 13477 | VMINSSZrrk_Int = 13464, |
| 13478 | VMINSSZrrkz_Int = 13465, |
| 13479 | VMINSSrm = 13466, |
| 13480 | VMINSSrm_Int = 13467, |
| 13481 | VMINSSrr = 13468, |
| 13482 | VMINSSrr_Int = 13469, |
| 13483 | VMLAUNCH = 13470, |
| 13484 | VMLOAD32 = 13471, |
| 13485 | VMLOAD64 = 13472, |
| 13486 | VMMCALL = 13473, |
| 13487 | VMOV64toPQIZrm = 13474, |
| 13488 | VMOV64toPQIZrr = 13475, |
| 13489 | VMOV64toPQIrm = 13476, |
| 13490 | VMOV64toPQIrr = 13477, |
| 13491 | VMOV64toSDZrr = 13478, |
| 13492 | VMOV64toSDrr = 13479, |
| 13493 | VMOVAPDYmr = 13480, |
| 13494 | VMOVAPDYrm = 13481, |
| 13495 | VMOVAPDYrr = 13482, |
| 13496 | VMOVAPDYrr_REV = 13483, |
| 13497 | VMOVAPDZ128mr = 13484, |
| 13498 | VMOVAPDZ128mrk = 13485, |
| 13499 | VMOVAPDZ128rm = 13486, |
| 13500 | VMOVAPDZ128rmk = 13487, |
| 13501 | VMOVAPDZ128rmkz = 13488, |
| 13502 | VMOVAPDZ128rr = 13489, |
| 13503 | VMOVAPDZ128rr_REV = 13490, |
| 13504 | VMOVAPDZ128rrk = 13491, |
| 13505 | VMOVAPDZ128rrk_REV = 13492, |
| 13506 | VMOVAPDZ128rrkz = 13493, |
| 13507 | VMOVAPDZ128rrkz_REV = 13494, |
| 13508 | VMOVAPDZ256mr = 13495, |
| 13509 | VMOVAPDZ256mrk = 13496, |
| 13510 | VMOVAPDZ256rm = 13497, |
| 13511 | VMOVAPDZ256rmk = 13498, |
| 13512 | VMOVAPDZ256rmkz = 13499, |
| 13513 | VMOVAPDZ256rr = 13500, |
| 13514 | VMOVAPDZ256rr_REV = 13501, |
| 13515 | VMOVAPDZ256rrk = 13502, |
| 13516 | VMOVAPDZ256rrk_REV = 13503, |
| 13517 | VMOVAPDZ256rrkz = 13504, |
| 13518 | VMOVAPDZ256rrkz_REV = 13505, |
| 13519 | VMOVAPDZmr = 13506, |
| 13520 | VMOVAPDZmrk = 13507, |
| 13521 | VMOVAPDZrm = 13508, |
| 13522 | VMOVAPDZrmk = 13509, |
| 13523 | VMOVAPDZrmkz = 13510, |
| 13524 | VMOVAPDZrr = 13511, |
| 13525 | VMOVAPDZrr_REV = 13512, |
| 13526 | VMOVAPDZrrk = 13513, |
| 13527 | VMOVAPDZrrk_REV = 13514, |
| 13528 | VMOVAPDZrrkz = 13515, |
| 13529 | VMOVAPDZrrkz_REV = 13516, |
| 13530 | VMOVAPDmr = 13517, |
| 13531 | VMOVAPDrm = 13518, |
| 13532 | VMOVAPDrr = 13519, |
| 13533 | VMOVAPDrr_REV = 13520, |
| 13534 | VMOVAPSYmr = 13521, |
| 13535 | VMOVAPSYrm = 13522, |
| 13536 | VMOVAPSYrr = 13523, |
| 13537 | VMOVAPSYrr_REV = 13524, |
| 13538 | VMOVAPSZ128mr = 13525, |
| 13539 | VMOVAPSZ128mrk = 13526, |
| 13540 | VMOVAPSZ128rm = 13527, |
| 13541 | VMOVAPSZ128rmk = 13528, |
| 13542 | VMOVAPSZ128rmkz = 13529, |
| 13543 | VMOVAPSZ128rr = 13530, |
| 13544 | VMOVAPSZ128rr_REV = 13531, |
| 13545 | VMOVAPSZ128rrk = 13532, |
| 13546 | VMOVAPSZ128rrk_REV = 13533, |
| 13547 | VMOVAPSZ128rrkz = 13534, |
| 13548 | VMOVAPSZ128rrkz_REV = 13535, |
| 13549 | VMOVAPSZ256mr = 13536, |
| 13550 | VMOVAPSZ256mrk = 13537, |
| 13551 | VMOVAPSZ256rm = 13538, |
| 13552 | VMOVAPSZ256rmk = 13539, |
| 13553 | VMOVAPSZ256rmkz = 13540, |
| 13554 | VMOVAPSZ256rr = 13541, |
| 13555 | VMOVAPSZ256rr_REV = 13542, |
| 13556 | VMOVAPSZ256rrk = 13543, |
| 13557 | VMOVAPSZ256rrk_REV = 13544, |
| 13558 | VMOVAPSZ256rrkz = 13545, |
| 13559 | VMOVAPSZ256rrkz_REV = 13546, |
| 13560 | VMOVAPSZmr = 13547, |
| 13561 | VMOVAPSZmrk = 13548, |
| 13562 | VMOVAPSZrm = 13549, |
| 13563 | VMOVAPSZrmk = 13550, |
| 13564 | VMOVAPSZrmkz = 13551, |
| 13565 | VMOVAPSZrr = 13552, |
| 13566 | VMOVAPSZrr_REV = 13553, |
| 13567 | VMOVAPSZrrk = 13554, |
| 13568 | VMOVAPSZrrk_REV = 13555, |
| 13569 | VMOVAPSZrrkz = 13556, |
| 13570 | VMOVAPSZrrkz_REV = 13557, |
| 13571 | VMOVAPSmr = 13558, |
| 13572 | VMOVAPSrm = 13559, |
| 13573 | VMOVAPSrr = 13560, |
| 13574 | VMOVAPSrr_REV = 13561, |
| 13575 | VMOVDDUPYrm = 13562, |
| 13576 | VMOVDDUPYrr = 13563, |
| 13577 | VMOVDDUPZ128rm = 13564, |
| 13578 | VMOVDDUPZ128rmk = 13565, |
| 13579 | VMOVDDUPZ128rmkz = 13566, |
| 13580 | VMOVDDUPZ128rr = 13567, |
| 13581 | VMOVDDUPZ128rrk = 13568, |
| 13582 | VMOVDDUPZ128rrkz = 13569, |
| 13583 | VMOVDDUPZ256rm = 13570, |
| 13584 | VMOVDDUPZ256rmk = 13571, |
| 13585 | VMOVDDUPZ256rmkz = 13572, |
| 13586 | VMOVDDUPZ256rr = 13573, |
| 13587 | VMOVDDUPZ256rrk = 13574, |
| 13588 | VMOVDDUPZ256rrkz = 13575, |
| 13589 | VMOVDDUPZrm = 13576, |
| 13590 | VMOVDDUPZrmk = 13577, |
| 13591 | VMOVDDUPZrmkz = 13578, |
| 13592 | VMOVDDUPZrr = 13579, |
| 13593 | VMOVDDUPZrrk = 13580, |
| 13594 | VMOVDDUPZrrkz = 13581, |
| 13595 | VMOVDDUPrm = 13582, |
| 13596 | VMOVDDUPrr = 13583, |
| 13597 | VMOVDI2PDIZrm = 13584, |
| 13598 | VMOVDI2PDIZrr = 13585, |
| 13599 | VMOVDI2PDIrm = 13586, |
| 13600 | VMOVDI2PDIrr = 13587, |
| 13601 | VMOVDI2SSZrr = 13588, |
| 13602 | VMOVDI2SSrr = 13589, |
| 13603 | VMOVDQA32Z128mr = 13590, |
| 13604 | VMOVDQA32Z128mrk = 13591, |
| 13605 | VMOVDQA32Z128rm = 13592, |
| 13606 | VMOVDQA32Z128rmk = 13593, |
| 13607 | VMOVDQA32Z128rmkz = 13594, |
| 13608 | VMOVDQA32Z128rr = 13595, |
| 13609 | VMOVDQA32Z128rr_REV = 13596, |
| 13610 | VMOVDQA32Z128rrk = 13597, |
| 13611 | VMOVDQA32Z128rrk_REV = 13598, |
| 13612 | VMOVDQA32Z128rrkz = 13599, |
| 13613 | VMOVDQA32Z128rrkz_REV = 13600, |
| 13614 | VMOVDQA32Z256mr = 13601, |
| 13615 | VMOVDQA32Z256mrk = 13602, |
| 13616 | VMOVDQA32Z256rm = 13603, |
| 13617 | VMOVDQA32Z256rmk = 13604, |
| 13618 | VMOVDQA32Z256rmkz = 13605, |
| 13619 | VMOVDQA32Z256rr = 13606, |
| 13620 | VMOVDQA32Z256rr_REV = 13607, |
| 13621 | VMOVDQA32Z256rrk = 13608, |
| 13622 | VMOVDQA32Z256rrk_REV = 13609, |
| 13623 | VMOVDQA32Z256rrkz = 13610, |
| 13624 | VMOVDQA32Z256rrkz_REV = 13611, |
| 13625 | VMOVDQA32Zmr = 13612, |
| 13626 | VMOVDQA32Zmrk = 13613, |
| 13627 | VMOVDQA32Zrm = 13614, |
| 13628 | VMOVDQA32Zrmk = 13615, |
| 13629 | VMOVDQA32Zrmkz = 13616, |
| 13630 | VMOVDQA32Zrr = 13617, |
| 13631 | VMOVDQA32Zrr_REV = 13618, |
| 13632 | VMOVDQA32Zrrk = 13619, |
| 13633 | VMOVDQA32Zrrk_REV = 13620, |
| 13634 | VMOVDQA32Zrrkz = 13621, |
| 13635 | VMOVDQA32Zrrkz_REV = 13622, |
| 13636 | VMOVDQA64Z128mr = 13623, |
| 13637 | VMOVDQA64Z128mrk = 13624, |
| 13638 | VMOVDQA64Z128rm = 13625, |
| 13639 | VMOVDQA64Z128rmk = 13626, |
| 13640 | VMOVDQA64Z128rmkz = 13627, |
| 13641 | VMOVDQA64Z128rr = 13628, |
| 13642 | VMOVDQA64Z128rr_REV = 13629, |
| 13643 | VMOVDQA64Z128rrk = 13630, |
| 13644 | VMOVDQA64Z128rrk_REV = 13631, |
| 13645 | VMOVDQA64Z128rrkz = 13632, |
| 13646 | VMOVDQA64Z128rrkz_REV = 13633, |
| 13647 | VMOVDQA64Z256mr = 13634, |
| 13648 | VMOVDQA64Z256mrk = 13635, |
| 13649 | VMOVDQA64Z256rm = 13636, |
| 13650 | VMOVDQA64Z256rmk = 13637, |
| 13651 | VMOVDQA64Z256rmkz = 13638, |
| 13652 | VMOVDQA64Z256rr = 13639, |
| 13653 | VMOVDQA64Z256rr_REV = 13640, |
| 13654 | VMOVDQA64Z256rrk = 13641, |
| 13655 | VMOVDQA64Z256rrk_REV = 13642, |
| 13656 | VMOVDQA64Z256rrkz = 13643, |
| 13657 | VMOVDQA64Z256rrkz_REV = 13644, |
| 13658 | VMOVDQA64Zmr = 13645, |
| 13659 | VMOVDQA64Zmrk = 13646, |
| 13660 | VMOVDQA64Zrm = 13647, |
| 13661 | VMOVDQA64Zrmk = 13648, |
| 13662 | VMOVDQA64Zrmkz = 13649, |
| 13663 | VMOVDQA64Zrr = 13650, |
| 13664 | VMOVDQA64Zrr_REV = 13651, |
| 13665 | VMOVDQA64Zrrk = 13652, |
| 13666 | VMOVDQA64Zrrk_REV = 13653, |
| 13667 | VMOVDQA64Zrrkz = 13654, |
| 13668 | VMOVDQA64Zrrkz_REV = 13655, |
| 13669 | VMOVDQAYmr = 13656, |
| 13670 | VMOVDQAYrm = 13657, |
| 13671 | VMOVDQAYrr = 13658, |
| 13672 | VMOVDQAYrr_REV = 13659, |
| 13673 | VMOVDQAmr = 13660, |
| 13674 | VMOVDQArm = 13661, |
| 13675 | VMOVDQArr = 13662, |
| 13676 | VMOVDQArr_REV = 13663, |
| 13677 | VMOVDQU16Z128mr = 13664, |
| 13678 | VMOVDQU16Z128mrk = 13665, |
| 13679 | VMOVDQU16Z128rm = 13666, |
| 13680 | VMOVDQU16Z128rmk = 13667, |
| 13681 | VMOVDQU16Z128rmkz = 13668, |
| 13682 | VMOVDQU16Z128rr = 13669, |
| 13683 | VMOVDQU16Z128rr_REV = 13670, |
| 13684 | VMOVDQU16Z128rrk = 13671, |
| 13685 | VMOVDQU16Z128rrk_REV = 13672, |
| 13686 | VMOVDQU16Z128rrkz = 13673, |
| 13687 | VMOVDQU16Z128rrkz_REV = 13674, |
| 13688 | VMOVDQU16Z256mr = 13675, |
| 13689 | VMOVDQU16Z256mrk = 13676, |
| 13690 | VMOVDQU16Z256rm = 13677, |
| 13691 | VMOVDQU16Z256rmk = 13678, |
| 13692 | VMOVDQU16Z256rmkz = 13679, |
| 13693 | VMOVDQU16Z256rr = 13680, |
| 13694 | VMOVDQU16Z256rr_REV = 13681, |
| 13695 | VMOVDQU16Z256rrk = 13682, |
| 13696 | VMOVDQU16Z256rrk_REV = 13683, |
| 13697 | VMOVDQU16Z256rrkz = 13684, |
| 13698 | VMOVDQU16Z256rrkz_REV = 13685, |
| 13699 | VMOVDQU16Zmr = 13686, |
| 13700 | VMOVDQU16Zmrk = 13687, |
| 13701 | VMOVDQU16Zrm = 13688, |
| 13702 | VMOVDQU16Zrmk = 13689, |
| 13703 | VMOVDQU16Zrmkz = 13690, |
| 13704 | VMOVDQU16Zrr = 13691, |
| 13705 | VMOVDQU16Zrr_REV = 13692, |
| 13706 | VMOVDQU16Zrrk = 13693, |
| 13707 | VMOVDQU16Zrrk_REV = 13694, |
| 13708 | VMOVDQU16Zrrkz = 13695, |
| 13709 | VMOVDQU16Zrrkz_REV = 13696, |
| 13710 | VMOVDQU32Z128mr = 13697, |
| 13711 | VMOVDQU32Z128mrk = 13698, |
| 13712 | VMOVDQU32Z128rm = 13699, |
| 13713 | VMOVDQU32Z128rmk = 13700, |
| 13714 | VMOVDQU32Z128rmkz = 13701, |
| 13715 | VMOVDQU32Z128rr = 13702, |
| 13716 | VMOVDQU32Z128rr_REV = 13703, |
| 13717 | VMOVDQU32Z128rrk = 13704, |
| 13718 | VMOVDQU32Z128rrk_REV = 13705, |
| 13719 | VMOVDQU32Z128rrkz = 13706, |
| 13720 | VMOVDQU32Z128rrkz_REV = 13707, |
| 13721 | VMOVDQU32Z256mr = 13708, |
| 13722 | VMOVDQU32Z256mrk = 13709, |
| 13723 | VMOVDQU32Z256rm = 13710, |
| 13724 | VMOVDQU32Z256rmk = 13711, |
| 13725 | VMOVDQU32Z256rmkz = 13712, |
| 13726 | VMOVDQU32Z256rr = 13713, |
| 13727 | VMOVDQU32Z256rr_REV = 13714, |
| 13728 | VMOVDQU32Z256rrk = 13715, |
| 13729 | VMOVDQU32Z256rrk_REV = 13716, |
| 13730 | VMOVDQU32Z256rrkz = 13717, |
| 13731 | VMOVDQU32Z256rrkz_REV = 13718, |
| 13732 | VMOVDQU32Zmr = 13719, |
| 13733 | VMOVDQU32Zmrk = 13720, |
| 13734 | VMOVDQU32Zrm = 13721, |
| 13735 | VMOVDQU32Zrmk = 13722, |
| 13736 | VMOVDQU32Zrmkz = 13723, |
| 13737 | VMOVDQU32Zrr = 13724, |
| 13738 | VMOVDQU32Zrr_REV = 13725, |
| 13739 | VMOVDQU32Zrrk = 13726, |
| 13740 | VMOVDQU32Zrrk_REV = 13727, |
| 13741 | VMOVDQU32Zrrkz = 13728, |
| 13742 | VMOVDQU32Zrrkz_REV = 13729, |
| 13743 | VMOVDQU64Z128mr = 13730, |
| 13744 | VMOVDQU64Z128mrk = 13731, |
| 13745 | VMOVDQU64Z128rm = 13732, |
| 13746 | VMOVDQU64Z128rmk = 13733, |
| 13747 | VMOVDQU64Z128rmkz = 13734, |
| 13748 | VMOVDQU64Z128rr = 13735, |
| 13749 | VMOVDQU64Z128rr_REV = 13736, |
| 13750 | VMOVDQU64Z128rrk = 13737, |
| 13751 | VMOVDQU64Z128rrk_REV = 13738, |
| 13752 | VMOVDQU64Z128rrkz = 13739, |
| 13753 | VMOVDQU64Z128rrkz_REV = 13740, |
| 13754 | VMOVDQU64Z256mr = 13741, |
| 13755 | VMOVDQU64Z256mrk = 13742, |
| 13756 | VMOVDQU64Z256rm = 13743, |
| 13757 | VMOVDQU64Z256rmk = 13744, |
| 13758 | VMOVDQU64Z256rmkz = 13745, |
| 13759 | VMOVDQU64Z256rr = 13746, |
| 13760 | VMOVDQU64Z256rr_REV = 13747, |
| 13761 | VMOVDQU64Z256rrk = 13748, |
| 13762 | VMOVDQU64Z256rrk_REV = 13749, |
| 13763 | VMOVDQU64Z256rrkz = 13750, |
| 13764 | VMOVDQU64Z256rrkz_REV = 13751, |
| 13765 | VMOVDQU64Zmr = 13752, |
| 13766 | VMOVDQU64Zmrk = 13753, |
| 13767 | VMOVDQU64Zrm = 13754, |
| 13768 | VMOVDQU64Zrmk = 13755, |
| 13769 | VMOVDQU64Zrmkz = 13756, |
| 13770 | VMOVDQU64Zrr = 13757, |
| 13771 | VMOVDQU64Zrr_REV = 13758, |
| 13772 | VMOVDQU64Zrrk = 13759, |
| 13773 | VMOVDQU64Zrrk_REV = 13760, |
| 13774 | VMOVDQU64Zrrkz = 13761, |
| 13775 | VMOVDQU64Zrrkz_REV = 13762, |
| 13776 | VMOVDQU8Z128mr = 13763, |
| 13777 | VMOVDQU8Z128mrk = 13764, |
| 13778 | VMOVDQU8Z128rm = 13765, |
| 13779 | VMOVDQU8Z128rmk = 13766, |
| 13780 | VMOVDQU8Z128rmkz = 13767, |
| 13781 | VMOVDQU8Z128rr = 13768, |
| 13782 | VMOVDQU8Z128rr_REV = 13769, |
| 13783 | VMOVDQU8Z128rrk = 13770, |
| 13784 | VMOVDQU8Z128rrk_REV = 13771, |
| 13785 | VMOVDQU8Z128rrkz = 13772, |
| 13786 | VMOVDQU8Z128rrkz_REV = 13773, |
| 13787 | VMOVDQU8Z256mr = 13774, |
| 13788 | VMOVDQU8Z256mrk = 13775, |
| 13789 | VMOVDQU8Z256rm = 13776, |
| 13790 | VMOVDQU8Z256rmk = 13777, |
| 13791 | VMOVDQU8Z256rmkz = 13778, |
| 13792 | VMOVDQU8Z256rr = 13779, |
| 13793 | VMOVDQU8Z256rr_REV = 13780, |
| 13794 | VMOVDQU8Z256rrk = 13781, |
| 13795 | VMOVDQU8Z256rrk_REV = 13782, |
| 13796 | VMOVDQU8Z256rrkz = 13783, |
| 13797 | VMOVDQU8Z256rrkz_REV = 13784, |
| 13798 | VMOVDQU8Zmr = 13785, |
| 13799 | VMOVDQU8Zmrk = 13786, |
| 13800 | VMOVDQU8Zrm = 13787, |
| 13801 | VMOVDQU8Zrmk = 13788, |
| 13802 | VMOVDQU8Zrmkz = 13789, |
| 13803 | VMOVDQU8Zrr = 13790, |
| 13804 | VMOVDQU8Zrr_REV = 13791, |
| 13805 | VMOVDQU8Zrrk = 13792, |
| 13806 | VMOVDQU8Zrrk_REV = 13793, |
| 13807 | VMOVDQU8Zrrkz = 13794, |
| 13808 | VMOVDQU8Zrrkz_REV = 13795, |
| 13809 | VMOVDQUYmr = 13796, |
| 13810 | VMOVDQUYrm = 13797, |
| 13811 | VMOVDQUYrr = 13798, |
| 13812 | VMOVDQUYrr_REV = 13799, |
| 13813 | VMOVDQUmr = 13800, |
| 13814 | VMOVDQUrm = 13801, |
| 13815 | VMOVDQUrr = 13802, |
| 13816 | VMOVDQUrr_REV = 13803, |
| 13817 | VMOVHLPSZrr = 13804, |
| 13818 | VMOVHLPSrr = 13805, |
| 13819 | VMOVHPDZ128mr = 13806, |
| 13820 | VMOVHPDZ128rm = 13807, |
| 13821 | VMOVHPDmr = 13808, |
| 13822 | VMOVHPDrm = 13809, |
| 13823 | VMOVHPSZ128mr = 13810, |
| 13824 | VMOVHPSZ128rm = 13811, |
| 13825 | VMOVHPSmr = 13812, |
| 13826 | VMOVHPSrm = 13813, |
| 13827 | VMOVLHPSZrr = 13814, |
| 13828 | VMOVLHPSrr = 13815, |
| 13829 | VMOVLPDZ128mr = 13816, |
| 13830 | VMOVLPDZ128rm = 13817, |
| 13831 | VMOVLPDmr = 13818, |
| 13832 | VMOVLPDrm = 13819, |
| 13833 | VMOVLPSZ128mr = 13820, |
| 13834 | VMOVLPSZ128rm = 13821, |
| 13835 | VMOVLPSmr = 13822, |
| 13836 | VMOVLPSrm = 13823, |
| 13837 | VMOVMSKPDYrr = 13824, |
| 13838 | VMOVMSKPDrr = 13825, |
| 13839 | VMOVMSKPSYrr = 13826, |
| 13840 | VMOVMSKPSrr = 13827, |
| 13841 | VMOVNTDQAYrm = 13828, |
| 13842 | VMOVNTDQAZ128rm = 13829, |
| 13843 | VMOVNTDQAZ256rm = 13830, |
| 13844 | VMOVNTDQAZrm = 13831, |
| 13845 | VMOVNTDQArm = 13832, |
| 13846 | VMOVNTDQYmr = 13833, |
| 13847 | VMOVNTDQZ128mr = 13834, |
| 13848 | VMOVNTDQZ256mr = 13835, |
| 13849 | VMOVNTDQZmr = 13836, |
| 13850 | VMOVNTDQmr = 13837, |
| 13851 | VMOVNTPDYmr = 13838, |
| 13852 | VMOVNTPDZ128mr = 13839, |
| 13853 | VMOVNTPDZ256mr = 13840, |
| 13854 | VMOVNTPDZmr = 13841, |
| 13855 | VMOVNTPDmr = 13842, |
| 13856 | VMOVNTPSYmr = 13843, |
| 13857 | VMOVNTPSZ128mr = 13844, |
| 13858 | VMOVNTPSZ256mr = 13845, |
| 13859 | VMOVNTPSZmr = 13846, |
| 13860 | VMOVNTPSmr = 13847, |
| 13861 | VMOVPDI2DIZmr = 13848, |
| 13862 | VMOVPDI2DIZrr = 13849, |
| 13863 | VMOVPDI2DImr = 13850, |
| 13864 | VMOVPDI2DIrr = 13851, |
| 13865 | VMOVPQI2QIZmr = 13852, |
| 13866 | VMOVPQI2QIZrr = 13853, |
| 13867 | VMOVPQI2QImr = 13854, |
| 13868 | VMOVPQI2QIrr = 13855, |
| 13869 | VMOVPQIto64Zmr = 13856, |
| 13870 | VMOVPQIto64Zrr = 13857, |
| 13871 | VMOVPQIto64mr = 13858, |
| 13872 | VMOVPQIto64rr = 13859, |
| 13873 | VMOVQI2PQIZrm = 13860, |
| 13874 | VMOVQI2PQIrm = 13861, |
| 13875 | VMOVRSBZ128m = 13862, |
| 13876 | VMOVRSBZ128mk = 13863, |
| 13877 | VMOVRSBZ128mkz = 13864, |
| 13878 | VMOVRSBZ256m = 13865, |
| 13879 | VMOVRSBZ256mk = 13866, |
| 13880 | VMOVRSBZ256mkz = 13867, |
| 13881 | VMOVRSBZm = 13868, |
| 13882 | VMOVRSBZmk = 13869, |
| 13883 | VMOVRSBZmkz = 13870, |
| 13884 | VMOVRSDZ128m = 13871, |
| 13885 | VMOVRSDZ128mk = 13872, |
| 13886 | VMOVRSDZ128mkz = 13873, |
| 13887 | VMOVRSDZ256m = 13874, |
| 13888 | VMOVRSDZ256mk = 13875, |
| 13889 | VMOVRSDZ256mkz = 13876, |
| 13890 | VMOVRSDZm = 13877, |
| 13891 | VMOVRSDZmk = 13878, |
| 13892 | VMOVRSDZmkz = 13879, |
| 13893 | VMOVRSQZ128m = 13880, |
| 13894 | VMOVRSQZ128mk = 13881, |
| 13895 | VMOVRSQZ128mkz = 13882, |
| 13896 | VMOVRSQZ256m = 13883, |
| 13897 | VMOVRSQZ256mk = 13884, |
| 13898 | VMOVRSQZ256mkz = 13885, |
| 13899 | VMOVRSQZm = 13886, |
| 13900 | VMOVRSQZmk = 13887, |
| 13901 | VMOVRSQZmkz = 13888, |
| 13902 | VMOVRSWZ128m = 13889, |
| 13903 | VMOVRSWZ128mk = 13890, |
| 13904 | VMOVRSWZ128mkz = 13891, |
| 13905 | VMOVRSWZ256m = 13892, |
| 13906 | VMOVRSWZ256mk = 13893, |
| 13907 | VMOVRSWZ256mkz = 13894, |
| 13908 | VMOVRSWZm = 13895, |
| 13909 | VMOVRSWZmk = 13896, |
| 13910 | VMOVRSWZmkz = 13897, |
| 13911 | VMOVSDZmr = 13898, |
| 13912 | VMOVSDZmrk = 13899, |
| 13913 | VMOVSDZrm = 13900, |
| 13914 | VMOVSDZrm_alt = 13901, |
| 13915 | VMOVSDZrmk = 13902, |
| 13916 | VMOVSDZrmkz = 13903, |
| 13917 | VMOVSDZrr = 13904, |
| 13918 | VMOVSDZrr_REV = 13905, |
| 13919 | VMOVSDZrrk = 13906, |
| 13920 | VMOVSDZrrk_REV = 13907, |
| 13921 | VMOVSDZrrkz = 13908, |
| 13922 | VMOVSDZrrkz_REV = 13909, |
| 13923 | VMOVSDmr = 13910, |
| 13924 | VMOVSDrm = 13911, |
| 13925 | VMOVSDrm_alt = 13912, |
| 13926 | VMOVSDrr = 13913, |
| 13927 | VMOVSDrr_REV = 13914, |
| 13928 | VMOVSDto64Zrr = 13915, |
| 13929 | VMOVSDto64rr = 13916, |
| 13930 | VMOVSH2Wrr = 13917, |
| 13931 | VMOVSHDUPYrm = 13918, |
| 13932 | VMOVSHDUPYrr = 13919, |
| 13933 | VMOVSHDUPZ128rm = 13920, |
| 13934 | VMOVSHDUPZ128rmk = 13921, |
| 13935 | VMOVSHDUPZ128rmkz = 13922, |
| 13936 | VMOVSHDUPZ128rr = 13923, |
| 13937 | VMOVSHDUPZ128rrk = 13924, |
| 13938 | VMOVSHDUPZ128rrkz = 13925, |
| 13939 | VMOVSHDUPZ256rm = 13926, |
| 13940 | VMOVSHDUPZ256rmk = 13927, |
| 13941 | VMOVSHDUPZ256rmkz = 13928, |
| 13942 | VMOVSHDUPZ256rr = 13929, |
| 13943 | VMOVSHDUPZ256rrk = 13930, |
| 13944 | VMOVSHDUPZ256rrkz = 13931, |
| 13945 | VMOVSHDUPZrm = 13932, |
| 13946 | VMOVSHDUPZrmk = 13933, |
| 13947 | VMOVSHDUPZrmkz = 13934, |
| 13948 | VMOVSHDUPZrr = 13935, |
| 13949 | VMOVSHDUPZrrk = 13936, |
| 13950 | VMOVSHDUPZrrkz = 13937, |
| 13951 | VMOVSHDUPrm = 13938, |
| 13952 | VMOVSHDUPrr = 13939, |
| 13953 | VMOVSHZmr = 13940, |
| 13954 | VMOVSHZmrk = 13941, |
| 13955 | VMOVSHZrm = 13942, |
| 13956 | VMOVSHZrm_alt = 13943, |
| 13957 | VMOVSHZrmk = 13944, |
| 13958 | VMOVSHZrmkz = 13945, |
| 13959 | VMOVSHZrr = 13946, |
| 13960 | VMOVSHZrr_REV = 13947, |
| 13961 | VMOVSHZrrk = 13948, |
| 13962 | VMOVSHZrrk_REV = 13949, |
| 13963 | VMOVSHZrrkz = 13950, |
| 13964 | VMOVSHZrrkz_REV = 13951, |
| 13965 | VMOVSHtoW64rr = 13952, |
| 13966 | VMOVSLDUPYrm = 13953, |
| 13967 | VMOVSLDUPYrr = 13954, |
| 13968 | VMOVSLDUPZ128rm = 13955, |
| 13969 | VMOVSLDUPZ128rmk = 13956, |
| 13970 | VMOVSLDUPZ128rmkz = 13957, |
| 13971 | VMOVSLDUPZ128rr = 13958, |
| 13972 | VMOVSLDUPZ128rrk = 13959, |
| 13973 | VMOVSLDUPZ128rrkz = 13960, |
| 13974 | VMOVSLDUPZ256rm = 13961, |
| 13975 | VMOVSLDUPZ256rmk = 13962, |
| 13976 | VMOVSLDUPZ256rmkz = 13963, |
| 13977 | VMOVSLDUPZ256rr = 13964, |
| 13978 | VMOVSLDUPZ256rrk = 13965, |
| 13979 | VMOVSLDUPZ256rrkz = 13966, |
| 13980 | VMOVSLDUPZrm = 13967, |
| 13981 | VMOVSLDUPZrmk = 13968, |
| 13982 | VMOVSLDUPZrmkz = 13969, |
| 13983 | VMOVSLDUPZrr = 13970, |
| 13984 | VMOVSLDUPZrrk = 13971, |
| 13985 | VMOVSLDUPZrrkz = 13972, |
| 13986 | VMOVSLDUPrm = 13973, |
| 13987 | VMOVSLDUPrr = 13974, |
| 13988 | VMOVSS2DIZrr = 13975, |
| 13989 | VMOVSS2DIrr = 13976, |
| 13990 | VMOVSSZmr = 13977, |
| 13991 | VMOVSSZmrk = 13978, |
| 13992 | VMOVSSZrm = 13979, |
| 13993 | VMOVSSZrm_alt = 13980, |
| 13994 | VMOVSSZrmk = 13981, |
| 13995 | VMOVSSZrmkz = 13982, |
| 13996 | VMOVSSZrr = 13983, |
| 13997 | VMOVSSZrr_REV = 13984, |
| 13998 | VMOVSSZrrk = 13985, |
| 13999 | VMOVSSZrrk_REV = 13986, |
| 14000 | VMOVSSZrrkz = 13987, |
| 14001 | VMOVSSZrrkz_REV = 13988, |
| 14002 | VMOVSSmr = 13989, |
| 14003 | VMOVSSrm = 13990, |
| 14004 | VMOVSSrm_alt = 13991, |
| 14005 | VMOVSSrr = 13992, |
| 14006 | VMOVSSrr_REV = 13993, |
| 14007 | VMOVUPDYmr = 13994, |
| 14008 | VMOVUPDYrm = 13995, |
| 14009 | VMOVUPDYrr = 13996, |
| 14010 | VMOVUPDYrr_REV = 13997, |
| 14011 | VMOVUPDZ128mr = 13998, |
| 14012 | VMOVUPDZ128mrk = 13999, |
| 14013 | VMOVUPDZ128rm = 14000, |
| 14014 | VMOVUPDZ128rmk = 14001, |
| 14015 | VMOVUPDZ128rmkz = 14002, |
| 14016 | VMOVUPDZ128rr = 14003, |
| 14017 | VMOVUPDZ128rr_REV = 14004, |
| 14018 | VMOVUPDZ128rrk = 14005, |
| 14019 | VMOVUPDZ128rrk_REV = 14006, |
| 14020 | VMOVUPDZ128rrkz = 14007, |
| 14021 | VMOVUPDZ128rrkz_REV = 14008, |
| 14022 | VMOVUPDZ256mr = 14009, |
| 14023 | VMOVUPDZ256mrk = 14010, |
| 14024 | VMOVUPDZ256rm = 14011, |
| 14025 | VMOVUPDZ256rmk = 14012, |
| 14026 | VMOVUPDZ256rmkz = 14013, |
| 14027 | VMOVUPDZ256rr = 14014, |
| 14028 | VMOVUPDZ256rr_REV = 14015, |
| 14029 | VMOVUPDZ256rrk = 14016, |
| 14030 | VMOVUPDZ256rrk_REV = 14017, |
| 14031 | VMOVUPDZ256rrkz = 14018, |
| 14032 | VMOVUPDZ256rrkz_REV = 14019, |
| 14033 | VMOVUPDZmr = 14020, |
| 14034 | VMOVUPDZmrk = 14021, |
| 14035 | VMOVUPDZrm = 14022, |
| 14036 | VMOVUPDZrmk = 14023, |
| 14037 | VMOVUPDZrmkz = 14024, |
| 14038 | VMOVUPDZrr = 14025, |
| 14039 | VMOVUPDZrr_REV = 14026, |
| 14040 | VMOVUPDZrrk = 14027, |
| 14041 | VMOVUPDZrrk_REV = 14028, |
| 14042 | VMOVUPDZrrkz = 14029, |
| 14043 | VMOVUPDZrrkz_REV = 14030, |
| 14044 | VMOVUPDmr = 14031, |
| 14045 | VMOVUPDrm = 14032, |
| 14046 | VMOVUPDrr = 14033, |
| 14047 | VMOVUPDrr_REV = 14034, |
| 14048 | VMOVUPSYmr = 14035, |
| 14049 | VMOVUPSYrm = 14036, |
| 14050 | VMOVUPSYrr = 14037, |
| 14051 | VMOVUPSYrr_REV = 14038, |
| 14052 | VMOVUPSZ128mr = 14039, |
| 14053 | VMOVUPSZ128mrk = 14040, |
| 14054 | VMOVUPSZ128rm = 14041, |
| 14055 | VMOVUPSZ128rmk = 14042, |
| 14056 | VMOVUPSZ128rmkz = 14043, |
| 14057 | VMOVUPSZ128rr = 14044, |
| 14058 | VMOVUPSZ128rr_REV = 14045, |
| 14059 | VMOVUPSZ128rrk = 14046, |
| 14060 | VMOVUPSZ128rrk_REV = 14047, |
| 14061 | VMOVUPSZ128rrkz = 14048, |
| 14062 | VMOVUPSZ128rrkz_REV = 14049, |
| 14063 | VMOVUPSZ256mr = 14050, |
| 14064 | VMOVUPSZ256mrk = 14051, |
| 14065 | VMOVUPSZ256rm = 14052, |
| 14066 | VMOVUPSZ256rmk = 14053, |
| 14067 | VMOVUPSZ256rmkz = 14054, |
| 14068 | VMOVUPSZ256rr = 14055, |
| 14069 | VMOVUPSZ256rr_REV = 14056, |
| 14070 | VMOVUPSZ256rrk = 14057, |
| 14071 | VMOVUPSZ256rrk_REV = 14058, |
| 14072 | VMOVUPSZ256rrkz = 14059, |
| 14073 | VMOVUPSZ256rrkz_REV = 14060, |
| 14074 | VMOVUPSZmr = 14061, |
| 14075 | VMOVUPSZmrk = 14062, |
| 14076 | VMOVUPSZrm = 14063, |
| 14077 | VMOVUPSZrmk = 14064, |
| 14078 | VMOVUPSZrmkz = 14065, |
| 14079 | VMOVUPSZrr = 14066, |
| 14080 | VMOVUPSZrr_REV = 14067, |
| 14081 | VMOVUPSZrrk = 14068, |
| 14082 | VMOVUPSZrrk_REV = 14069, |
| 14083 | VMOVUPSZrrkz = 14070, |
| 14084 | VMOVUPSZrrkz_REV = 14071, |
| 14085 | VMOVUPSmr = 14072, |
| 14086 | VMOVUPSrm = 14073, |
| 14087 | VMOVUPSrr = 14074, |
| 14088 | VMOVUPSrr_REV = 14075, |
| 14089 | VMOVW2SHrr = 14076, |
| 14090 | VMOVW64toSHrr = 14077, |
| 14091 | VMOVWmr = 14078, |
| 14092 | VMOVWrm = 14079, |
| 14093 | VMOVZPDILo2PDIZmr = 14080, |
| 14094 | VMOVZPDILo2PDIZrm = 14081, |
| 14095 | VMOVZPDILo2PDIZrr = 14082, |
| 14096 | VMOVZPDILo2PDIZrr2 = 14083, |
| 14097 | VMOVZPQILo2PQIZrr = 14084, |
| 14098 | VMOVZPQILo2PQIrr = 14085, |
| 14099 | VMOVZPWILo2PWIZmr = 14086, |
| 14100 | VMOVZPWILo2PWIZrm = 14087, |
| 14101 | VMOVZPWILo2PWIZrr = 14088, |
| 14102 | VMOVZPWILo2PWIZrr2 = 14089, |
| 14103 | VMPSADBWYrmi = 14090, |
| 14104 | VMPSADBWYrri = 14091, |
| 14105 | VMPSADBWZ128rmi = 14092, |
| 14106 | VMPSADBWZ128rmik = 14093, |
| 14107 | VMPSADBWZ128rmikz = 14094, |
| 14108 | VMPSADBWZ128rri = 14095, |
| 14109 | VMPSADBWZ128rrik = 14096, |
| 14110 | VMPSADBWZ128rrikz = 14097, |
| 14111 | VMPSADBWZ256rmi = 14098, |
| 14112 | VMPSADBWZ256rmik = 14099, |
| 14113 | VMPSADBWZ256rmikz = 14100, |
| 14114 | VMPSADBWZ256rri = 14101, |
| 14115 | VMPSADBWZ256rrik = 14102, |
| 14116 | VMPSADBWZ256rrikz = 14103, |
| 14117 | VMPSADBWZrmi = 14104, |
| 14118 | VMPSADBWZrmik = 14105, |
| 14119 | VMPSADBWZrmikz = 14106, |
| 14120 | VMPSADBWZrri = 14107, |
| 14121 | VMPSADBWZrrik = 14108, |
| 14122 | VMPSADBWZrrikz = 14109, |
| 14123 | VMPSADBWrmi = 14110, |
| 14124 | VMPSADBWrri = 14111, |
| 14125 | VMPTRLDm = 14112, |
| 14126 | VMPTRSTm = 14113, |
| 14127 | VMREAD32mr = 14114, |
| 14128 | VMREAD32rr = 14115, |
| 14129 | VMREAD64mr = 14116, |
| 14130 | VMREAD64rr = 14117, |
| 14131 | VMRESUME = 14118, |
| 14132 | VMRUN32 = 14119, |
| 14133 | VMRUN64 = 14120, |
| 14134 | VMSAVE32 = 14121, |
| 14135 | VMSAVE64 = 14122, |
| 14136 | VMULBF16Z128rm = 14123, |
| 14137 | VMULBF16Z128rmb = 14124, |
| 14138 | VMULBF16Z128rmbk = 14125, |
| 14139 | VMULBF16Z128rmbkz = 14126, |
| 14140 | VMULBF16Z128rmk = 14127, |
| 14141 | VMULBF16Z128rmkz = 14128, |
| 14142 | VMULBF16Z128rr = 14129, |
| 14143 | VMULBF16Z128rrk = 14130, |
| 14144 | VMULBF16Z128rrkz = 14131, |
| 14145 | VMULBF16Z256rm = 14132, |
| 14146 | VMULBF16Z256rmb = 14133, |
| 14147 | VMULBF16Z256rmbk = 14134, |
| 14148 | VMULBF16Z256rmbkz = 14135, |
| 14149 | VMULBF16Z256rmk = 14136, |
| 14150 | VMULBF16Z256rmkz = 14137, |
| 14151 | VMULBF16Z256rr = 14138, |
| 14152 | VMULBF16Z256rrk = 14139, |
| 14153 | VMULBF16Z256rrkz = 14140, |
| 14154 | VMULBF16Zrm = 14141, |
| 14155 | VMULBF16Zrmb = 14142, |
| 14156 | VMULBF16Zrmbk = 14143, |
| 14157 | VMULBF16Zrmbkz = 14144, |
| 14158 | VMULBF16Zrmk = 14145, |
| 14159 | VMULBF16Zrmkz = 14146, |
| 14160 | VMULBF16Zrr = 14147, |
| 14161 | VMULBF16Zrrk = 14148, |
| 14162 | VMULBF16Zrrkz = 14149, |
| 14163 | VMULPDYrm = 14150, |
| 14164 | VMULPDYrr = 14151, |
| 14165 | VMULPDZ128rm = 14152, |
| 14166 | VMULPDZ128rmb = 14153, |
| 14167 | VMULPDZ128rmbk = 14154, |
| 14168 | VMULPDZ128rmbkz = 14155, |
| 14169 | VMULPDZ128rmk = 14156, |
| 14170 | VMULPDZ128rmkz = 14157, |
| 14171 | VMULPDZ128rr = 14158, |
| 14172 | VMULPDZ128rrk = 14159, |
| 14173 | VMULPDZ128rrkz = 14160, |
| 14174 | VMULPDZ256rm = 14161, |
| 14175 | VMULPDZ256rmb = 14162, |
| 14176 | VMULPDZ256rmbk = 14163, |
| 14177 | VMULPDZ256rmbkz = 14164, |
| 14178 | VMULPDZ256rmk = 14165, |
| 14179 | VMULPDZ256rmkz = 14166, |
| 14180 | VMULPDZ256rr = 14167, |
| 14181 | VMULPDZ256rrk = 14168, |
| 14182 | VMULPDZ256rrkz = 14169, |
| 14183 | VMULPDZrm = 14170, |
| 14184 | VMULPDZrmb = 14171, |
| 14185 | VMULPDZrmbk = 14172, |
| 14186 | VMULPDZrmbkz = 14173, |
| 14187 | VMULPDZrmk = 14174, |
| 14188 | VMULPDZrmkz = 14175, |
| 14189 | VMULPDZrr = 14176, |
| 14190 | VMULPDZrrb = 14177, |
| 14191 | VMULPDZrrbk = 14178, |
| 14192 | VMULPDZrrbkz = 14179, |
| 14193 | VMULPDZrrk = 14180, |
| 14194 | VMULPDZrrkz = 14181, |
| 14195 | VMULPDrm = 14182, |
| 14196 | VMULPDrr = 14183, |
| 14197 | VMULPHZ128rm = 14184, |
| 14198 | VMULPHZ128rmb = 14185, |
| 14199 | VMULPHZ128rmbk = 14186, |
| 14200 | VMULPHZ128rmbkz = 14187, |
| 14201 | VMULPHZ128rmk = 14188, |
| 14202 | VMULPHZ128rmkz = 14189, |
| 14203 | VMULPHZ128rr = 14190, |
| 14204 | VMULPHZ128rrk = 14191, |
| 14205 | VMULPHZ128rrkz = 14192, |
| 14206 | VMULPHZ256rm = 14193, |
| 14207 | VMULPHZ256rmb = 14194, |
| 14208 | VMULPHZ256rmbk = 14195, |
| 14209 | VMULPHZ256rmbkz = 14196, |
| 14210 | VMULPHZ256rmk = 14197, |
| 14211 | VMULPHZ256rmkz = 14198, |
| 14212 | VMULPHZ256rr = 14199, |
| 14213 | VMULPHZ256rrk = 14200, |
| 14214 | VMULPHZ256rrkz = 14201, |
| 14215 | VMULPHZrm = 14202, |
| 14216 | VMULPHZrmb = 14203, |
| 14217 | VMULPHZrmbk = 14204, |
| 14218 | VMULPHZrmbkz = 14205, |
| 14219 | VMULPHZrmk = 14206, |
| 14220 | VMULPHZrmkz = 14207, |
| 14221 | VMULPHZrr = 14208, |
| 14222 | VMULPHZrrb = 14209, |
| 14223 | VMULPHZrrbk = 14210, |
| 14224 | VMULPHZrrbkz = 14211, |
| 14225 | VMULPHZrrk = 14212, |
| 14226 | VMULPHZrrkz = 14213, |
| 14227 | VMULPSYrm = 14214, |
| 14228 | VMULPSYrr = 14215, |
| 14229 | VMULPSZ128rm = 14216, |
| 14230 | VMULPSZ128rmb = 14217, |
| 14231 | VMULPSZ128rmbk = 14218, |
| 14232 | VMULPSZ128rmbkz = 14219, |
| 14233 | VMULPSZ128rmk = 14220, |
| 14234 | VMULPSZ128rmkz = 14221, |
| 14235 | VMULPSZ128rr = 14222, |
| 14236 | VMULPSZ128rrk = 14223, |
| 14237 | VMULPSZ128rrkz = 14224, |
| 14238 | VMULPSZ256rm = 14225, |
| 14239 | VMULPSZ256rmb = 14226, |
| 14240 | VMULPSZ256rmbk = 14227, |
| 14241 | VMULPSZ256rmbkz = 14228, |
| 14242 | VMULPSZ256rmk = 14229, |
| 14243 | VMULPSZ256rmkz = 14230, |
| 14244 | VMULPSZ256rr = 14231, |
| 14245 | VMULPSZ256rrk = 14232, |
| 14246 | VMULPSZ256rrkz = 14233, |
| 14247 | VMULPSZrm = 14234, |
| 14248 | VMULPSZrmb = 14235, |
| 14249 | VMULPSZrmbk = 14236, |
| 14250 | VMULPSZrmbkz = 14237, |
| 14251 | VMULPSZrmk = 14238, |
| 14252 | VMULPSZrmkz = 14239, |
| 14253 | VMULPSZrr = 14240, |
| 14254 | VMULPSZrrb = 14241, |
| 14255 | VMULPSZrrbk = 14242, |
| 14256 | VMULPSZrrbkz = 14243, |
| 14257 | VMULPSZrrk = 14244, |
| 14258 | VMULPSZrrkz = 14245, |
| 14259 | VMULPSrm = 14246, |
| 14260 | VMULPSrr = 14247, |
| 14261 | VMULSDZrm = 14248, |
| 14262 | VMULSDZrm_Int = 14249, |
| 14263 | VMULSDZrmk_Int = 14250, |
| 14264 | VMULSDZrmkz_Int = 14251, |
| 14265 | VMULSDZrr = 14252, |
| 14266 | VMULSDZrr_Int = 14253, |
| 14267 | VMULSDZrrb_Int = 14254, |
| 14268 | VMULSDZrrbk_Int = 14255, |
| 14269 | VMULSDZrrbkz_Int = 14256, |
| 14270 | VMULSDZrrk_Int = 14257, |
| 14271 | VMULSDZrrkz_Int = 14258, |
| 14272 | VMULSDrm = 14259, |
| 14273 | VMULSDrm_Int = 14260, |
| 14274 | VMULSDrr = 14261, |
| 14275 | VMULSDrr_Int = 14262, |
| 14276 | VMULSHZrm = 14263, |
| 14277 | VMULSHZrm_Int = 14264, |
| 14278 | VMULSHZrmk_Int = 14265, |
| 14279 | VMULSHZrmkz_Int = 14266, |
| 14280 | VMULSHZrr = 14267, |
| 14281 | VMULSHZrr_Int = 14268, |
| 14282 | VMULSHZrrb_Int = 14269, |
| 14283 | VMULSHZrrbk_Int = 14270, |
| 14284 | VMULSHZrrbkz_Int = 14271, |
| 14285 | VMULSHZrrk_Int = 14272, |
| 14286 | VMULSHZrrkz_Int = 14273, |
| 14287 | VMULSSZrm = 14274, |
| 14288 | VMULSSZrm_Int = 14275, |
| 14289 | VMULSSZrmk_Int = 14276, |
| 14290 | VMULSSZrmkz_Int = 14277, |
| 14291 | VMULSSZrr = 14278, |
| 14292 | VMULSSZrr_Int = 14279, |
| 14293 | VMULSSZrrb_Int = 14280, |
| 14294 | VMULSSZrrbk_Int = 14281, |
| 14295 | VMULSSZrrbkz_Int = 14282, |
| 14296 | VMULSSZrrk_Int = 14283, |
| 14297 | VMULSSZrrkz_Int = 14284, |
| 14298 | VMULSSrm = 14285, |
| 14299 | VMULSSrm_Int = 14286, |
| 14300 | VMULSSrr = 14287, |
| 14301 | VMULSSrr_Int = 14288, |
| 14302 | VMWRITE32rm = 14289, |
| 14303 | VMWRITE32rr = 14290, |
| 14304 | VMWRITE64rm = 14291, |
| 14305 | VMWRITE64rr = 14292, |
| 14306 | VMXOFF = 14293, |
| 14307 | VMXON = 14294, |
| 14308 | VORPDYrm = 14295, |
| 14309 | VORPDYrr = 14296, |
| 14310 | VORPDZ128rm = 14297, |
| 14311 | VORPDZ128rmb = 14298, |
| 14312 | VORPDZ128rmbk = 14299, |
| 14313 | VORPDZ128rmbkz = 14300, |
| 14314 | VORPDZ128rmk = 14301, |
| 14315 | VORPDZ128rmkz = 14302, |
| 14316 | VORPDZ128rr = 14303, |
| 14317 | VORPDZ128rrk = 14304, |
| 14318 | VORPDZ128rrkz = 14305, |
| 14319 | VORPDZ256rm = 14306, |
| 14320 | VORPDZ256rmb = 14307, |
| 14321 | VORPDZ256rmbk = 14308, |
| 14322 | VORPDZ256rmbkz = 14309, |
| 14323 | VORPDZ256rmk = 14310, |
| 14324 | VORPDZ256rmkz = 14311, |
| 14325 | VORPDZ256rr = 14312, |
| 14326 | VORPDZ256rrk = 14313, |
| 14327 | VORPDZ256rrkz = 14314, |
| 14328 | VORPDZrm = 14315, |
| 14329 | VORPDZrmb = 14316, |
| 14330 | VORPDZrmbk = 14317, |
| 14331 | VORPDZrmbkz = 14318, |
| 14332 | VORPDZrmk = 14319, |
| 14333 | VORPDZrmkz = 14320, |
| 14334 | VORPDZrr = 14321, |
| 14335 | VORPDZrrk = 14322, |
| 14336 | VORPDZrrkz = 14323, |
| 14337 | VORPDrm = 14324, |
| 14338 | VORPDrr = 14325, |
| 14339 | VORPSYrm = 14326, |
| 14340 | VORPSYrr = 14327, |
| 14341 | VORPSZ128rm = 14328, |
| 14342 | VORPSZ128rmb = 14329, |
| 14343 | VORPSZ128rmbk = 14330, |
| 14344 | VORPSZ128rmbkz = 14331, |
| 14345 | VORPSZ128rmk = 14332, |
| 14346 | VORPSZ128rmkz = 14333, |
| 14347 | VORPSZ128rr = 14334, |
| 14348 | VORPSZ128rrk = 14335, |
| 14349 | VORPSZ128rrkz = 14336, |
| 14350 | VORPSZ256rm = 14337, |
| 14351 | VORPSZ256rmb = 14338, |
| 14352 | VORPSZ256rmbk = 14339, |
| 14353 | VORPSZ256rmbkz = 14340, |
| 14354 | VORPSZ256rmk = 14341, |
| 14355 | VORPSZ256rmkz = 14342, |
| 14356 | VORPSZ256rr = 14343, |
| 14357 | VORPSZ256rrk = 14344, |
| 14358 | VORPSZ256rrkz = 14345, |
| 14359 | VORPSZrm = 14346, |
| 14360 | VORPSZrmb = 14347, |
| 14361 | VORPSZrmbk = 14348, |
| 14362 | VORPSZrmbkz = 14349, |
| 14363 | VORPSZrmk = 14350, |
| 14364 | VORPSZrmkz = 14351, |
| 14365 | VORPSZrr = 14352, |
| 14366 | VORPSZrrk = 14353, |
| 14367 | VORPSZrrkz = 14354, |
| 14368 | VORPSrm = 14355, |
| 14369 | VORPSrr = 14356, |
| 14370 | VP2INTERSECTDZ128rm = 14357, |
| 14371 | VP2INTERSECTDZ128rmb = 14358, |
| 14372 | VP2INTERSECTDZ128rr = 14359, |
| 14373 | VP2INTERSECTDZ256rm = 14360, |
| 14374 | VP2INTERSECTDZ256rmb = 14361, |
| 14375 | VP2INTERSECTDZ256rr = 14362, |
| 14376 | VP2INTERSECTDZrm = 14363, |
| 14377 | VP2INTERSECTDZrmb = 14364, |
| 14378 | VP2INTERSECTDZrr = 14365, |
| 14379 | VP2INTERSECTQZ128rm = 14366, |
| 14380 | VP2INTERSECTQZ128rmb = 14367, |
| 14381 | VP2INTERSECTQZ128rr = 14368, |
| 14382 | VP2INTERSECTQZ256rm = 14369, |
| 14383 | VP2INTERSECTQZ256rmb = 14370, |
| 14384 | VP2INTERSECTQZ256rr = 14371, |
| 14385 | VP2INTERSECTQZrm = 14372, |
| 14386 | VP2INTERSECTQZrmb = 14373, |
| 14387 | VP2INTERSECTQZrr = 14374, |
| 14388 | VP4DPWSSDSrm = 14375, |
| 14389 | VP4DPWSSDSrmk = 14376, |
| 14390 | VP4DPWSSDSrmkz = 14377, |
| 14391 | VP4DPWSSDrm = 14378, |
| 14392 | VP4DPWSSDrmk = 14379, |
| 14393 | VP4DPWSSDrmkz = 14380, |
| 14394 | VPABSBYrm = 14381, |
| 14395 | VPABSBYrr = 14382, |
| 14396 | VPABSBZ128rm = 14383, |
| 14397 | VPABSBZ128rmk = 14384, |
| 14398 | VPABSBZ128rmkz = 14385, |
| 14399 | VPABSBZ128rr = 14386, |
| 14400 | VPABSBZ128rrk = 14387, |
| 14401 | VPABSBZ128rrkz = 14388, |
| 14402 | VPABSBZ256rm = 14389, |
| 14403 | VPABSBZ256rmk = 14390, |
| 14404 | VPABSBZ256rmkz = 14391, |
| 14405 | VPABSBZ256rr = 14392, |
| 14406 | VPABSBZ256rrk = 14393, |
| 14407 | VPABSBZ256rrkz = 14394, |
| 14408 | VPABSBZrm = 14395, |
| 14409 | VPABSBZrmk = 14396, |
| 14410 | VPABSBZrmkz = 14397, |
| 14411 | VPABSBZrr = 14398, |
| 14412 | VPABSBZrrk = 14399, |
| 14413 | VPABSBZrrkz = 14400, |
| 14414 | VPABSBrm = 14401, |
| 14415 | VPABSBrr = 14402, |
| 14416 | VPABSDYrm = 14403, |
| 14417 | VPABSDYrr = 14404, |
| 14418 | VPABSDZ128rm = 14405, |
| 14419 | VPABSDZ128rmb = 14406, |
| 14420 | VPABSDZ128rmbk = 14407, |
| 14421 | VPABSDZ128rmbkz = 14408, |
| 14422 | VPABSDZ128rmk = 14409, |
| 14423 | VPABSDZ128rmkz = 14410, |
| 14424 | VPABSDZ128rr = 14411, |
| 14425 | VPABSDZ128rrk = 14412, |
| 14426 | VPABSDZ128rrkz = 14413, |
| 14427 | VPABSDZ256rm = 14414, |
| 14428 | VPABSDZ256rmb = 14415, |
| 14429 | VPABSDZ256rmbk = 14416, |
| 14430 | VPABSDZ256rmbkz = 14417, |
| 14431 | VPABSDZ256rmk = 14418, |
| 14432 | VPABSDZ256rmkz = 14419, |
| 14433 | VPABSDZ256rr = 14420, |
| 14434 | VPABSDZ256rrk = 14421, |
| 14435 | VPABSDZ256rrkz = 14422, |
| 14436 | VPABSDZrm = 14423, |
| 14437 | VPABSDZrmb = 14424, |
| 14438 | VPABSDZrmbk = 14425, |
| 14439 | VPABSDZrmbkz = 14426, |
| 14440 | VPABSDZrmk = 14427, |
| 14441 | VPABSDZrmkz = 14428, |
| 14442 | VPABSDZrr = 14429, |
| 14443 | VPABSDZrrk = 14430, |
| 14444 | VPABSDZrrkz = 14431, |
| 14445 | VPABSDrm = 14432, |
| 14446 | VPABSDrr = 14433, |
| 14447 | VPABSQZ128rm = 14434, |
| 14448 | VPABSQZ128rmb = 14435, |
| 14449 | VPABSQZ128rmbk = 14436, |
| 14450 | VPABSQZ128rmbkz = 14437, |
| 14451 | VPABSQZ128rmk = 14438, |
| 14452 | VPABSQZ128rmkz = 14439, |
| 14453 | VPABSQZ128rr = 14440, |
| 14454 | VPABSQZ128rrk = 14441, |
| 14455 | VPABSQZ128rrkz = 14442, |
| 14456 | VPABSQZ256rm = 14443, |
| 14457 | VPABSQZ256rmb = 14444, |
| 14458 | VPABSQZ256rmbk = 14445, |
| 14459 | VPABSQZ256rmbkz = 14446, |
| 14460 | VPABSQZ256rmk = 14447, |
| 14461 | VPABSQZ256rmkz = 14448, |
| 14462 | VPABSQZ256rr = 14449, |
| 14463 | VPABSQZ256rrk = 14450, |
| 14464 | VPABSQZ256rrkz = 14451, |
| 14465 | VPABSQZrm = 14452, |
| 14466 | VPABSQZrmb = 14453, |
| 14467 | VPABSQZrmbk = 14454, |
| 14468 | VPABSQZrmbkz = 14455, |
| 14469 | VPABSQZrmk = 14456, |
| 14470 | VPABSQZrmkz = 14457, |
| 14471 | VPABSQZrr = 14458, |
| 14472 | VPABSQZrrk = 14459, |
| 14473 | VPABSQZrrkz = 14460, |
| 14474 | VPABSWYrm = 14461, |
| 14475 | VPABSWYrr = 14462, |
| 14476 | VPABSWZ128rm = 14463, |
| 14477 | VPABSWZ128rmk = 14464, |
| 14478 | VPABSWZ128rmkz = 14465, |
| 14479 | VPABSWZ128rr = 14466, |
| 14480 | VPABSWZ128rrk = 14467, |
| 14481 | VPABSWZ128rrkz = 14468, |
| 14482 | VPABSWZ256rm = 14469, |
| 14483 | VPABSWZ256rmk = 14470, |
| 14484 | VPABSWZ256rmkz = 14471, |
| 14485 | VPABSWZ256rr = 14472, |
| 14486 | VPABSWZ256rrk = 14473, |
| 14487 | VPABSWZ256rrkz = 14474, |
| 14488 | VPABSWZrm = 14475, |
| 14489 | VPABSWZrmk = 14476, |
| 14490 | VPABSWZrmkz = 14477, |
| 14491 | VPABSWZrr = 14478, |
| 14492 | VPABSWZrrk = 14479, |
| 14493 | VPABSWZrrkz = 14480, |
| 14494 | VPABSWrm = 14481, |
| 14495 | VPABSWrr = 14482, |
| 14496 | VPACKSSDWYrm = 14483, |
| 14497 | VPACKSSDWYrr = 14484, |
| 14498 | VPACKSSDWZ128rm = 14485, |
| 14499 | VPACKSSDWZ128rmb = 14486, |
| 14500 | VPACKSSDWZ128rmbk = 14487, |
| 14501 | VPACKSSDWZ128rmbkz = 14488, |
| 14502 | VPACKSSDWZ128rmk = 14489, |
| 14503 | VPACKSSDWZ128rmkz = 14490, |
| 14504 | VPACKSSDWZ128rr = 14491, |
| 14505 | VPACKSSDWZ128rrk = 14492, |
| 14506 | VPACKSSDWZ128rrkz = 14493, |
| 14507 | VPACKSSDWZ256rm = 14494, |
| 14508 | VPACKSSDWZ256rmb = 14495, |
| 14509 | VPACKSSDWZ256rmbk = 14496, |
| 14510 | VPACKSSDWZ256rmbkz = 14497, |
| 14511 | VPACKSSDWZ256rmk = 14498, |
| 14512 | VPACKSSDWZ256rmkz = 14499, |
| 14513 | VPACKSSDWZ256rr = 14500, |
| 14514 | VPACKSSDWZ256rrk = 14501, |
| 14515 | VPACKSSDWZ256rrkz = 14502, |
| 14516 | VPACKSSDWZrm = 14503, |
| 14517 | VPACKSSDWZrmb = 14504, |
| 14518 | VPACKSSDWZrmbk = 14505, |
| 14519 | VPACKSSDWZrmbkz = 14506, |
| 14520 | VPACKSSDWZrmk = 14507, |
| 14521 | VPACKSSDWZrmkz = 14508, |
| 14522 | VPACKSSDWZrr = 14509, |
| 14523 | VPACKSSDWZrrk = 14510, |
| 14524 | VPACKSSDWZrrkz = 14511, |
| 14525 | VPACKSSDWrm = 14512, |
| 14526 | VPACKSSDWrr = 14513, |
| 14527 | VPACKSSWBYrm = 14514, |
| 14528 | VPACKSSWBYrr = 14515, |
| 14529 | VPACKSSWBZ128rm = 14516, |
| 14530 | VPACKSSWBZ128rmk = 14517, |
| 14531 | VPACKSSWBZ128rmkz = 14518, |
| 14532 | VPACKSSWBZ128rr = 14519, |
| 14533 | VPACKSSWBZ128rrk = 14520, |
| 14534 | VPACKSSWBZ128rrkz = 14521, |
| 14535 | VPACKSSWBZ256rm = 14522, |
| 14536 | VPACKSSWBZ256rmk = 14523, |
| 14537 | VPACKSSWBZ256rmkz = 14524, |
| 14538 | VPACKSSWBZ256rr = 14525, |
| 14539 | VPACKSSWBZ256rrk = 14526, |
| 14540 | VPACKSSWBZ256rrkz = 14527, |
| 14541 | VPACKSSWBZrm = 14528, |
| 14542 | VPACKSSWBZrmk = 14529, |
| 14543 | VPACKSSWBZrmkz = 14530, |
| 14544 | VPACKSSWBZrr = 14531, |
| 14545 | VPACKSSWBZrrk = 14532, |
| 14546 | VPACKSSWBZrrkz = 14533, |
| 14547 | VPACKSSWBrm = 14534, |
| 14548 | VPACKSSWBrr = 14535, |
| 14549 | VPACKUSDWYrm = 14536, |
| 14550 | VPACKUSDWYrr = 14537, |
| 14551 | VPACKUSDWZ128rm = 14538, |
| 14552 | VPACKUSDWZ128rmb = 14539, |
| 14553 | VPACKUSDWZ128rmbk = 14540, |
| 14554 | VPACKUSDWZ128rmbkz = 14541, |
| 14555 | VPACKUSDWZ128rmk = 14542, |
| 14556 | VPACKUSDWZ128rmkz = 14543, |
| 14557 | VPACKUSDWZ128rr = 14544, |
| 14558 | VPACKUSDWZ128rrk = 14545, |
| 14559 | VPACKUSDWZ128rrkz = 14546, |
| 14560 | VPACKUSDWZ256rm = 14547, |
| 14561 | VPACKUSDWZ256rmb = 14548, |
| 14562 | VPACKUSDWZ256rmbk = 14549, |
| 14563 | VPACKUSDWZ256rmbkz = 14550, |
| 14564 | VPACKUSDWZ256rmk = 14551, |
| 14565 | VPACKUSDWZ256rmkz = 14552, |
| 14566 | VPACKUSDWZ256rr = 14553, |
| 14567 | VPACKUSDWZ256rrk = 14554, |
| 14568 | VPACKUSDWZ256rrkz = 14555, |
| 14569 | VPACKUSDWZrm = 14556, |
| 14570 | VPACKUSDWZrmb = 14557, |
| 14571 | VPACKUSDWZrmbk = 14558, |
| 14572 | VPACKUSDWZrmbkz = 14559, |
| 14573 | VPACKUSDWZrmk = 14560, |
| 14574 | VPACKUSDWZrmkz = 14561, |
| 14575 | VPACKUSDWZrr = 14562, |
| 14576 | VPACKUSDWZrrk = 14563, |
| 14577 | VPACKUSDWZrrkz = 14564, |
| 14578 | VPACKUSDWrm = 14565, |
| 14579 | VPACKUSDWrr = 14566, |
| 14580 | VPACKUSWBYrm = 14567, |
| 14581 | VPACKUSWBYrr = 14568, |
| 14582 | VPACKUSWBZ128rm = 14569, |
| 14583 | VPACKUSWBZ128rmk = 14570, |
| 14584 | VPACKUSWBZ128rmkz = 14571, |
| 14585 | VPACKUSWBZ128rr = 14572, |
| 14586 | VPACKUSWBZ128rrk = 14573, |
| 14587 | VPACKUSWBZ128rrkz = 14574, |
| 14588 | VPACKUSWBZ256rm = 14575, |
| 14589 | VPACKUSWBZ256rmk = 14576, |
| 14590 | VPACKUSWBZ256rmkz = 14577, |
| 14591 | VPACKUSWBZ256rr = 14578, |
| 14592 | VPACKUSWBZ256rrk = 14579, |
| 14593 | VPACKUSWBZ256rrkz = 14580, |
| 14594 | VPACKUSWBZrm = 14581, |
| 14595 | VPACKUSWBZrmk = 14582, |
| 14596 | VPACKUSWBZrmkz = 14583, |
| 14597 | VPACKUSWBZrr = 14584, |
| 14598 | VPACKUSWBZrrk = 14585, |
| 14599 | VPACKUSWBZrrkz = 14586, |
| 14600 | VPACKUSWBrm = 14587, |
| 14601 | VPACKUSWBrr = 14588, |
| 14602 | VPADDBYrm = 14589, |
| 14603 | VPADDBYrr = 14590, |
| 14604 | VPADDBZ128rm = 14591, |
| 14605 | VPADDBZ128rmk = 14592, |
| 14606 | VPADDBZ128rmkz = 14593, |
| 14607 | VPADDBZ128rr = 14594, |
| 14608 | VPADDBZ128rrk = 14595, |
| 14609 | VPADDBZ128rrkz = 14596, |
| 14610 | VPADDBZ256rm = 14597, |
| 14611 | VPADDBZ256rmk = 14598, |
| 14612 | VPADDBZ256rmkz = 14599, |
| 14613 | VPADDBZ256rr = 14600, |
| 14614 | VPADDBZ256rrk = 14601, |
| 14615 | VPADDBZ256rrkz = 14602, |
| 14616 | VPADDBZrm = 14603, |
| 14617 | VPADDBZrmk = 14604, |
| 14618 | VPADDBZrmkz = 14605, |
| 14619 | VPADDBZrr = 14606, |
| 14620 | VPADDBZrrk = 14607, |
| 14621 | VPADDBZrrkz = 14608, |
| 14622 | VPADDBrm = 14609, |
| 14623 | VPADDBrr = 14610, |
| 14624 | VPADDDYrm = 14611, |
| 14625 | VPADDDYrr = 14612, |
| 14626 | VPADDDZ128rm = 14613, |
| 14627 | VPADDDZ128rmb = 14614, |
| 14628 | VPADDDZ128rmbk = 14615, |
| 14629 | VPADDDZ128rmbkz = 14616, |
| 14630 | VPADDDZ128rmk = 14617, |
| 14631 | VPADDDZ128rmkz = 14618, |
| 14632 | VPADDDZ128rr = 14619, |
| 14633 | VPADDDZ128rrk = 14620, |
| 14634 | VPADDDZ128rrkz = 14621, |
| 14635 | VPADDDZ256rm = 14622, |
| 14636 | VPADDDZ256rmb = 14623, |
| 14637 | VPADDDZ256rmbk = 14624, |
| 14638 | VPADDDZ256rmbkz = 14625, |
| 14639 | VPADDDZ256rmk = 14626, |
| 14640 | VPADDDZ256rmkz = 14627, |
| 14641 | VPADDDZ256rr = 14628, |
| 14642 | VPADDDZ256rrk = 14629, |
| 14643 | VPADDDZ256rrkz = 14630, |
| 14644 | VPADDDZrm = 14631, |
| 14645 | VPADDDZrmb = 14632, |
| 14646 | VPADDDZrmbk = 14633, |
| 14647 | VPADDDZrmbkz = 14634, |
| 14648 | VPADDDZrmk = 14635, |
| 14649 | VPADDDZrmkz = 14636, |
| 14650 | VPADDDZrr = 14637, |
| 14651 | VPADDDZrrk = 14638, |
| 14652 | VPADDDZrrkz = 14639, |
| 14653 | VPADDDrm = 14640, |
| 14654 | VPADDDrr = 14641, |
| 14655 | VPADDQYrm = 14642, |
| 14656 | VPADDQYrr = 14643, |
| 14657 | VPADDQZ128rm = 14644, |
| 14658 | VPADDQZ128rmb = 14645, |
| 14659 | VPADDQZ128rmbk = 14646, |
| 14660 | VPADDQZ128rmbkz = 14647, |
| 14661 | VPADDQZ128rmk = 14648, |
| 14662 | VPADDQZ128rmkz = 14649, |
| 14663 | VPADDQZ128rr = 14650, |
| 14664 | VPADDQZ128rrk = 14651, |
| 14665 | VPADDQZ128rrkz = 14652, |
| 14666 | VPADDQZ256rm = 14653, |
| 14667 | VPADDQZ256rmb = 14654, |
| 14668 | VPADDQZ256rmbk = 14655, |
| 14669 | VPADDQZ256rmbkz = 14656, |
| 14670 | VPADDQZ256rmk = 14657, |
| 14671 | VPADDQZ256rmkz = 14658, |
| 14672 | VPADDQZ256rr = 14659, |
| 14673 | VPADDQZ256rrk = 14660, |
| 14674 | VPADDQZ256rrkz = 14661, |
| 14675 | VPADDQZrm = 14662, |
| 14676 | VPADDQZrmb = 14663, |
| 14677 | VPADDQZrmbk = 14664, |
| 14678 | VPADDQZrmbkz = 14665, |
| 14679 | VPADDQZrmk = 14666, |
| 14680 | VPADDQZrmkz = 14667, |
| 14681 | VPADDQZrr = 14668, |
| 14682 | VPADDQZrrk = 14669, |
| 14683 | VPADDQZrrkz = 14670, |
| 14684 | VPADDQrm = 14671, |
| 14685 | VPADDQrr = 14672, |
| 14686 | VPADDSBYrm = 14673, |
| 14687 | VPADDSBYrr = 14674, |
| 14688 | VPADDSBZ128rm = 14675, |
| 14689 | VPADDSBZ128rmk = 14676, |
| 14690 | VPADDSBZ128rmkz = 14677, |
| 14691 | VPADDSBZ128rr = 14678, |
| 14692 | VPADDSBZ128rrk = 14679, |
| 14693 | VPADDSBZ128rrkz = 14680, |
| 14694 | VPADDSBZ256rm = 14681, |
| 14695 | VPADDSBZ256rmk = 14682, |
| 14696 | VPADDSBZ256rmkz = 14683, |
| 14697 | VPADDSBZ256rr = 14684, |
| 14698 | VPADDSBZ256rrk = 14685, |
| 14699 | VPADDSBZ256rrkz = 14686, |
| 14700 | VPADDSBZrm = 14687, |
| 14701 | VPADDSBZrmk = 14688, |
| 14702 | VPADDSBZrmkz = 14689, |
| 14703 | VPADDSBZrr = 14690, |
| 14704 | VPADDSBZrrk = 14691, |
| 14705 | VPADDSBZrrkz = 14692, |
| 14706 | VPADDSBrm = 14693, |
| 14707 | VPADDSBrr = 14694, |
| 14708 | VPADDSWYrm = 14695, |
| 14709 | VPADDSWYrr = 14696, |
| 14710 | VPADDSWZ128rm = 14697, |
| 14711 | VPADDSWZ128rmk = 14698, |
| 14712 | VPADDSWZ128rmkz = 14699, |
| 14713 | VPADDSWZ128rr = 14700, |
| 14714 | VPADDSWZ128rrk = 14701, |
| 14715 | VPADDSWZ128rrkz = 14702, |
| 14716 | VPADDSWZ256rm = 14703, |
| 14717 | VPADDSWZ256rmk = 14704, |
| 14718 | VPADDSWZ256rmkz = 14705, |
| 14719 | VPADDSWZ256rr = 14706, |
| 14720 | VPADDSWZ256rrk = 14707, |
| 14721 | VPADDSWZ256rrkz = 14708, |
| 14722 | VPADDSWZrm = 14709, |
| 14723 | VPADDSWZrmk = 14710, |
| 14724 | VPADDSWZrmkz = 14711, |
| 14725 | VPADDSWZrr = 14712, |
| 14726 | VPADDSWZrrk = 14713, |
| 14727 | VPADDSWZrrkz = 14714, |
| 14728 | VPADDSWrm = 14715, |
| 14729 | VPADDSWrr = 14716, |
| 14730 | VPADDUSBYrm = 14717, |
| 14731 | VPADDUSBYrr = 14718, |
| 14732 | VPADDUSBZ128rm = 14719, |
| 14733 | VPADDUSBZ128rmk = 14720, |
| 14734 | VPADDUSBZ128rmkz = 14721, |
| 14735 | VPADDUSBZ128rr = 14722, |
| 14736 | VPADDUSBZ128rrk = 14723, |
| 14737 | VPADDUSBZ128rrkz = 14724, |
| 14738 | VPADDUSBZ256rm = 14725, |
| 14739 | VPADDUSBZ256rmk = 14726, |
| 14740 | VPADDUSBZ256rmkz = 14727, |
| 14741 | VPADDUSBZ256rr = 14728, |
| 14742 | VPADDUSBZ256rrk = 14729, |
| 14743 | VPADDUSBZ256rrkz = 14730, |
| 14744 | VPADDUSBZrm = 14731, |
| 14745 | VPADDUSBZrmk = 14732, |
| 14746 | VPADDUSBZrmkz = 14733, |
| 14747 | VPADDUSBZrr = 14734, |
| 14748 | VPADDUSBZrrk = 14735, |
| 14749 | VPADDUSBZrrkz = 14736, |
| 14750 | VPADDUSBrm = 14737, |
| 14751 | VPADDUSBrr = 14738, |
| 14752 | VPADDUSWYrm = 14739, |
| 14753 | VPADDUSWYrr = 14740, |
| 14754 | VPADDUSWZ128rm = 14741, |
| 14755 | VPADDUSWZ128rmk = 14742, |
| 14756 | VPADDUSWZ128rmkz = 14743, |
| 14757 | VPADDUSWZ128rr = 14744, |
| 14758 | VPADDUSWZ128rrk = 14745, |
| 14759 | VPADDUSWZ128rrkz = 14746, |
| 14760 | VPADDUSWZ256rm = 14747, |
| 14761 | VPADDUSWZ256rmk = 14748, |
| 14762 | VPADDUSWZ256rmkz = 14749, |
| 14763 | VPADDUSWZ256rr = 14750, |
| 14764 | VPADDUSWZ256rrk = 14751, |
| 14765 | VPADDUSWZ256rrkz = 14752, |
| 14766 | VPADDUSWZrm = 14753, |
| 14767 | VPADDUSWZrmk = 14754, |
| 14768 | VPADDUSWZrmkz = 14755, |
| 14769 | VPADDUSWZrr = 14756, |
| 14770 | VPADDUSWZrrk = 14757, |
| 14771 | VPADDUSWZrrkz = 14758, |
| 14772 | VPADDUSWrm = 14759, |
| 14773 | VPADDUSWrr = 14760, |
| 14774 | VPADDWYrm = 14761, |
| 14775 | VPADDWYrr = 14762, |
| 14776 | VPADDWZ128rm = 14763, |
| 14777 | VPADDWZ128rmk = 14764, |
| 14778 | VPADDWZ128rmkz = 14765, |
| 14779 | VPADDWZ128rr = 14766, |
| 14780 | VPADDWZ128rrk = 14767, |
| 14781 | VPADDWZ128rrkz = 14768, |
| 14782 | VPADDWZ256rm = 14769, |
| 14783 | VPADDWZ256rmk = 14770, |
| 14784 | VPADDWZ256rmkz = 14771, |
| 14785 | VPADDWZ256rr = 14772, |
| 14786 | VPADDWZ256rrk = 14773, |
| 14787 | VPADDWZ256rrkz = 14774, |
| 14788 | VPADDWZrm = 14775, |
| 14789 | VPADDWZrmk = 14776, |
| 14790 | VPADDWZrmkz = 14777, |
| 14791 | VPADDWZrr = 14778, |
| 14792 | VPADDWZrrk = 14779, |
| 14793 | VPADDWZrrkz = 14780, |
| 14794 | VPADDWrm = 14781, |
| 14795 | VPADDWrr = 14782, |
| 14796 | VPALIGNRYrmi = 14783, |
| 14797 | VPALIGNRYrri = 14784, |
| 14798 | VPALIGNRZ128rmi = 14785, |
| 14799 | VPALIGNRZ128rmik = 14786, |
| 14800 | VPALIGNRZ128rmikz = 14787, |
| 14801 | VPALIGNRZ128rri = 14788, |
| 14802 | VPALIGNRZ128rrik = 14789, |
| 14803 | VPALIGNRZ128rrikz = 14790, |
| 14804 | VPALIGNRZ256rmi = 14791, |
| 14805 | VPALIGNRZ256rmik = 14792, |
| 14806 | VPALIGNRZ256rmikz = 14793, |
| 14807 | VPALIGNRZ256rri = 14794, |
| 14808 | VPALIGNRZ256rrik = 14795, |
| 14809 | VPALIGNRZ256rrikz = 14796, |
| 14810 | VPALIGNRZrmi = 14797, |
| 14811 | VPALIGNRZrmik = 14798, |
| 14812 | VPALIGNRZrmikz = 14799, |
| 14813 | VPALIGNRZrri = 14800, |
| 14814 | VPALIGNRZrrik = 14801, |
| 14815 | VPALIGNRZrrikz = 14802, |
| 14816 | VPALIGNRrmi = 14803, |
| 14817 | VPALIGNRrri = 14804, |
| 14818 | VPANDDZ128rm = 14805, |
| 14819 | VPANDDZ128rmb = 14806, |
| 14820 | VPANDDZ128rmbk = 14807, |
| 14821 | VPANDDZ128rmbkz = 14808, |
| 14822 | VPANDDZ128rmk = 14809, |
| 14823 | VPANDDZ128rmkz = 14810, |
| 14824 | VPANDDZ128rr = 14811, |
| 14825 | VPANDDZ128rrk = 14812, |
| 14826 | VPANDDZ128rrkz = 14813, |
| 14827 | VPANDDZ256rm = 14814, |
| 14828 | VPANDDZ256rmb = 14815, |
| 14829 | VPANDDZ256rmbk = 14816, |
| 14830 | VPANDDZ256rmbkz = 14817, |
| 14831 | VPANDDZ256rmk = 14818, |
| 14832 | VPANDDZ256rmkz = 14819, |
| 14833 | VPANDDZ256rr = 14820, |
| 14834 | VPANDDZ256rrk = 14821, |
| 14835 | VPANDDZ256rrkz = 14822, |
| 14836 | VPANDDZrm = 14823, |
| 14837 | VPANDDZrmb = 14824, |
| 14838 | VPANDDZrmbk = 14825, |
| 14839 | VPANDDZrmbkz = 14826, |
| 14840 | VPANDDZrmk = 14827, |
| 14841 | VPANDDZrmkz = 14828, |
| 14842 | VPANDDZrr = 14829, |
| 14843 | VPANDDZrrk = 14830, |
| 14844 | VPANDDZrrkz = 14831, |
| 14845 | VPANDNDZ128rm = 14832, |
| 14846 | VPANDNDZ128rmb = 14833, |
| 14847 | VPANDNDZ128rmbk = 14834, |
| 14848 | VPANDNDZ128rmbkz = 14835, |
| 14849 | VPANDNDZ128rmk = 14836, |
| 14850 | VPANDNDZ128rmkz = 14837, |
| 14851 | VPANDNDZ128rr = 14838, |
| 14852 | VPANDNDZ128rrk = 14839, |
| 14853 | VPANDNDZ128rrkz = 14840, |
| 14854 | VPANDNDZ256rm = 14841, |
| 14855 | VPANDNDZ256rmb = 14842, |
| 14856 | VPANDNDZ256rmbk = 14843, |
| 14857 | VPANDNDZ256rmbkz = 14844, |
| 14858 | VPANDNDZ256rmk = 14845, |
| 14859 | VPANDNDZ256rmkz = 14846, |
| 14860 | VPANDNDZ256rr = 14847, |
| 14861 | VPANDNDZ256rrk = 14848, |
| 14862 | VPANDNDZ256rrkz = 14849, |
| 14863 | VPANDNDZrm = 14850, |
| 14864 | VPANDNDZrmb = 14851, |
| 14865 | VPANDNDZrmbk = 14852, |
| 14866 | VPANDNDZrmbkz = 14853, |
| 14867 | VPANDNDZrmk = 14854, |
| 14868 | VPANDNDZrmkz = 14855, |
| 14869 | VPANDNDZrr = 14856, |
| 14870 | VPANDNDZrrk = 14857, |
| 14871 | VPANDNDZrrkz = 14858, |
| 14872 | VPANDNQZ128rm = 14859, |
| 14873 | VPANDNQZ128rmb = 14860, |
| 14874 | VPANDNQZ128rmbk = 14861, |
| 14875 | VPANDNQZ128rmbkz = 14862, |
| 14876 | VPANDNQZ128rmk = 14863, |
| 14877 | VPANDNQZ128rmkz = 14864, |
| 14878 | VPANDNQZ128rr = 14865, |
| 14879 | VPANDNQZ128rrk = 14866, |
| 14880 | VPANDNQZ128rrkz = 14867, |
| 14881 | VPANDNQZ256rm = 14868, |
| 14882 | VPANDNQZ256rmb = 14869, |
| 14883 | VPANDNQZ256rmbk = 14870, |
| 14884 | VPANDNQZ256rmbkz = 14871, |
| 14885 | VPANDNQZ256rmk = 14872, |
| 14886 | VPANDNQZ256rmkz = 14873, |
| 14887 | VPANDNQZ256rr = 14874, |
| 14888 | VPANDNQZ256rrk = 14875, |
| 14889 | VPANDNQZ256rrkz = 14876, |
| 14890 | VPANDNQZrm = 14877, |
| 14891 | VPANDNQZrmb = 14878, |
| 14892 | VPANDNQZrmbk = 14879, |
| 14893 | VPANDNQZrmbkz = 14880, |
| 14894 | VPANDNQZrmk = 14881, |
| 14895 | VPANDNQZrmkz = 14882, |
| 14896 | VPANDNQZrr = 14883, |
| 14897 | VPANDNQZrrk = 14884, |
| 14898 | VPANDNQZrrkz = 14885, |
| 14899 | VPANDNYrm = 14886, |
| 14900 | VPANDNYrr = 14887, |
| 14901 | VPANDNrm = 14888, |
| 14902 | VPANDNrr = 14889, |
| 14903 | VPANDQZ128rm = 14890, |
| 14904 | VPANDQZ128rmb = 14891, |
| 14905 | VPANDQZ128rmbk = 14892, |
| 14906 | VPANDQZ128rmbkz = 14893, |
| 14907 | VPANDQZ128rmk = 14894, |
| 14908 | VPANDQZ128rmkz = 14895, |
| 14909 | VPANDQZ128rr = 14896, |
| 14910 | VPANDQZ128rrk = 14897, |
| 14911 | VPANDQZ128rrkz = 14898, |
| 14912 | VPANDQZ256rm = 14899, |
| 14913 | VPANDQZ256rmb = 14900, |
| 14914 | VPANDQZ256rmbk = 14901, |
| 14915 | VPANDQZ256rmbkz = 14902, |
| 14916 | VPANDQZ256rmk = 14903, |
| 14917 | VPANDQZ256rmkz = 14904, |
| 14918 | VPANDQZ256rr = 14905, |
| 14919 | VPANDQZ256rrk = 14906, |
| 14920 | VPANDQZ256rrkz = 14907, |
| 14921 | VPANDQZrm = 14908, |
| 14922 | VPANDQZrmb = 14909, |
| 14923 | VPANDQZrmbk = 14910, |
| 14924 | VPANDQZrmbkz = 14911, |
| 14925 | VPANDQZrmk = 14912, |
| 14926 | VPANDQZrmkz = 14913, |
| 14927 | VPANDQZrr = 14914, |
| 14928 | VPANDQZrrk = 14915, |
| 14929 | VPANDQZrrkz = 14916, |
| 14930 | VPANDYrm = 14917, |
| 14931 | VPANDYrr = 14918, |
| 14932 | VPANDrm = 14919, |
| 14933 | VPANDrr = 14920, |
| 14934 | VPAVGBYrm = 14921, |
| 14935 | VPAVGBYrr = 14922, |
| 14936 | VPAVGBZ128rm = 14923, |
| 14937 | VPAVGBZ128rmk = 14924, |
| 14938 | VPAVGBZ128rmkz = 14925, |
| 14939 | VPAVGBZ128rr = 14926, |
| 14940 | VPAVGBZ128rrk = 14927, |
| 14941 | VPAVGBZ128rrkz = 14928, |
| 14942 | VPAVGBZ256rm = 14929, |
| 14943 | VPAVGBZ256rmk = 14930, |
| 14944 | VPAVGBZ256rmkz = 14931, |
| 14945 | VPAVGBZ256rr = 14932, |
| 14946 | VPAVGBZ256rrk = 14933, |
| 14947 | VPAVGBZ256rrkz = 14934, |
| 14948 | VPAVGBZrm = 14935, |
| 14949 | VPAVGBZrmk = 14936, |
| 14950 | VPAVGBZrmkz = 14937, |
| 14951 | VPAVGBZrr = 14938, |
| 14952 | VPAVGBZrrk = 14939, |
| 14953 | VPAVGBZrrkz = 14940, |
| 14954 | VPAVGBrm = 14941, |
| 14955 | VPAVGBrr = 14942, |
| 14956 | VPAVGWYrm = 14943, |
| 14957 | VPAVGWYrr = 14944, |
| 14958 | VPAVGWZ128rm = 14945, |
| 14959 | VPAVGWZ128rmk = 14946, |
| 14960 | VPAVGWZ128rmkz = 14947, |
| 14961 | VPAVGWZ128rr = 14948, |
| 14962 | VPAVGWZ128rrk = 14949, |
| 14963 | VPAVGWZ128rrkz = 14950, |
| 14964 | VPAVGWZ256rm = 14951, |
| 14965 | VPAVGWZ256rmk = 14952, |
| 14966 | VPAVGWZ256rmkz = 14953, |
| 14967 | VPAVGWZ256rr = 14954, |
| 14968 | VPAVGWZ256rrk = 14955, |
| 14969 | VPAVGWZ256rrkz = 14956, |
| 14970 | VPAVGWZrm = 14957, |
| 14971 | VPAVGWZrmk = 14958, |
| 14972 | VPAVGWZrmkz = 14959, |
| 14973 | VPAVGWZrr = 14960, |
| 14974 | VPAVGWZrrk = 14961, |
| 14975 | VPAVGWZrrkz = 14962, |
| 14976 | VPAVGWrm = 14963, |
| 14977 | VPAVGWrr = 14964, |
| 14978 | VPBLENDDYrmi = 14965, |
| 14979 | VPBLENDDYrri = 14966, |
| 14980 | VPBLENDDrmi = 14967, |
| 14981 | VPBLENDDrri = 14968, |
| 14982 | VPBLENDMBZ128rm = 14969, |
| 14983 | VPBLENDMBZ128rmk = 14970, |
| 14984 | VPBLENDMBZ128rmkz = 14971, |
| 14985 | VPBLENDMBZ128rr = 14972, |
| 14986 | VPBLENDMBZ128rrk = 14973, |
| 14987 | VPBLENDMBZ128rrkz = 14974, |
| 14988 | VPBLENDMBZ256rm = 14975, |
| 14989 | VPBLENDMBZ256rmk = 14976, |
| 14990 | VPBLENDMBZ256rmkz = 14977, |
| 14991 | VPBLENDMBZ256rr = 14978, |
| 14992 | VPBLENDMBZ256rrk = 14979, |
| 14993 | VPBLENDMBZ256rrkz = 14980, |
| 14994 | VPBLENDMBZrm = 14981, |
| 14995 | VPBLENDMBZrmk = 14982, |
| 14996 | VPBLENDMBZrmkz = 14983, |
| 14997 | VPBLENDMBZrr = 14984, |
| 14998 | VPBLENDMBZrrk = 14985, |
| 14999 | VPBLENDMBZrrkz = 14986, |
| 15000 | VPBLENDMDZ128rm = 14987, |
| 15001 | VPBLENDMDZ128rmb = 14988, |
| 15002 | VPBLENDMDZ128rmbk = 14989, |
| 15003 | VPBLENDMDZ128rmbkz = 14990, |
| 15004 | VPBLENDMDZ128rmk = 14991, |
| 15005 | VPBLENDMDZ128rmkz = 14992, |
| 15006 | VPBLENDMDZ128rr = 14993, |
| 15007 | VPBLENDMDZ128rrk = 14994, |
| 15008 | VPBLENDMDZ128rrkz = 14995, |
| 15009 | VPBLENDMDZ256rm = 14996, |
| 15010 | VPBLENDMDZ256rmb = 14997, |
| 15011 | VPBLENDMDZ256rmbk = 14998, |
| 15012 | VPBLENDMDZ256rmbkz = 14999, |
| 15013 | VPBLENDMDZ256rmk = 15000, |
| 15014 | VPBLENDMDZ256rmkz = 15001, |
| 15015 | VPBLENDMDZ256rr = 15002, |
| 15016 | VPBLENDMDZ256rrk = 15003, |
| 15017 | VPBLENDMDZ256rrkz = 15004, |
| 15018 | VPBLENDMDZrm = 15005, |
| 15019 | VPBLENDMDZrmb = 15006, |
| 15020 | VPBLENDMDZrmbk = 15007, |
| 15021 | VPBLENDMDZrmbkz = 15008, |
| 15022 | VPBLENDMDZrmk = 15009, |
| 15023 | VPBLENDMDZrmkz = 15010, |
| 15024 | VPBLENDMDZrr = 15011, |
| 15025 | VPBLENDMDZrrk = 15012, |
| 15026 | VPBLENDMDZrrkz = 15013, |
| 15027 | VPBLENDMQZ128rm = 15014, |
| 15028 | VPBLENDMQZ128rmb = 15015, |
| 15029 | VPBLENDMQZ128rmbk = 15016, |
| 15030 | VPBLENDMQZ128rmbkz = 15017, |
| 15031 | VPBLENDMQZ128rmk = 15018, |
| 15032 | VPBLENDMQZ128rmkz = 15019, |
| 15033 | VPBLENDMQZ128rr = 15020, |
| 15034 | VPBLENDMQZ128rrk = 15021, |
| 15035 | VPBLENDMQZ128rrkz = 15022, |
| 15036 | VPBLENDMQZ256rm = 15023, |
| 15037 | VPBLENDMQZ256rmb = 15024, |
| 15038 | VPBLENDMQZ256rmbk = 15025, |
| 15039 | VPBLENDMQZ256rmbkz = 15026, |
| 15040 | VPBLENDMQZ256rmk = 15027, |
| 15041 | VPBLENDMQZ256rmkz = 15028, |
| 15042 | VPBLENDMQZ256rr = 15029, |
| 15043 | VPBLENDMQZ256rrk = 15030, |
| 15044 | VPBLENDMQZ256rrkz = 15031, |
| 15045 | VPBLENDMQZrm = 15032, |
| 15046 | VPBLENDMQZrmb = 15033, |
| 15047 | VPBLENDMQZrmbk = 15034, |
| 15048 | VPBLENDMQZrmbkz = 15035, |
| 15049 | VPBLENDMQZrmk = 15036, |
| 15050 | VPBLENDMQZrmkz = 15037, |
| 15051 | VPBLENDMQZrr = 15038, |
| 15052 | VPBLENDMQZrrk = 15039, |
| 15053 | VPBLENDMQZrrkz = 15040, |
| 15054 | VPBLENDMWZ128rm = 15041, |
| 15055 | VPBLENDMWZ128rmk = 15042, |
| 15056 | VPBLENDMWZ128rmkz = 15043, |
| 15057 | VPBLENDMWZ128rr = 15044, |
| 15058 | VPBLENDMWZ128rrk = 15045, |
| 15059 | VPBLENDMWZ128rrkz = 15046, |
| 15060 | VPBLENDMWZ256rm = 15047, |
| 15061 | VPBLENDMWZ256rmk = 15048, |
| 15062 | VPBLENDMWZ256rmkz = 15049, |
| 15063 | VPBLENDMWZ256rr = 15050, |
| 15064 | VPBLENDMWZ256rrk = 15051, |
| 15065 | VPBLENDMWZ256rrkz = 15052, |
| 15066 | VPBLENDMWZrm = 15053, |
| 15067 | VPBLENDMWZrmk = 15054, |
| 15068 | VPBLENDMWZrmkz = 15055, |
| 15069 | VPBLENDMWZrr = 15056, |
| 15070 | VPBLENDMWZrrk = 15057, |
| 15071 | VPBLENDMWZrrkz = 15058, |
| 15072 | VPBLENDVBYrmr = 15059, |
| 15073 | VPBLENDVBYrrr = 15060, |
| 15074 | VPBLENDVBrmr = 15061, |
| 15075 | VPBLENDVBrrr = 15062, |
| 15076 | VPBLENDWYrmi = 15063, |
| 15077 | VPBLENDWYrri = 15064, |
| 15078 | VPBLENDWrmi = 15065, |
| 15079 | VPBLENDWrri = 15066, |
| 15080 | VPBROADCASTBYrm = 15067, |
| 15081 | VPBROADCASTBYrr = 15068, |
| 15082 | VPBROADCASTBZ128rm = 15069, |
| 15083 | VPBROADCASTBZ128rmk = 15070, |
| 15084 | VPBROADCASTBZ128rmkz = 15071, |
| 15085 | VPBROADCASTBZ128rr = 15072, |
| 15086 | VPBROADCASTBZ128rrk = 15073, |
| 15087 | VPBROADCASTBZ128rrkz = 15074, |
| 15088 | VPBROADCASTBZ256rm = 15075, |
| 15089 | VPBROADCASTBZ256rmk = 15076, |
| 15090 | VPBROADCASTBZ256rmkz = 15077, |
| 15091 | VPBROADCASTBZ256rr = 15078, |
| 15092 | VPBROADCASTBZ256rrk = 15079, |
| 15093 | VPBROADCASTBZ256rrkz = 15080, |
| 15094 | VPBROADCASTBZrm = 15081, |
| 15095 | VPBROADCASTBZrmk = 15082, |
| 15096 | VPBROADCASTBZrmkz = 15083, |
| 15097 | VPBROADCASTBZrr = 15084, |
| 15098 | VPBROADCASTBZrrk = 15085, |
| 15099 | VPBROADCASTBZrrkz = 15086, |
| 15100 | VPBROADCASTBrZ128rr = 15087, |
| 15101 | VPBROADCASTBrZ128rrk = 15088, |
| 15102 | VPBROADCASTBrZ128rrkz = 15089, |
| 15103 | VPBROADCASTBrZ256rr = 15090, |
| 15104 | VPBROADCASTBrZ256rrk = 15091, |
| 15105 | VPBROADCASTBrZ256rrkz = 15092, |
| 15106 | VPBROADCASTBrZrr = 15093, |
| 15107 | VPBROADCASTBrZrrk = 15094, |
| 15108 | VPBROADCASTBrZrrkz = 15095, |
| 15109 | VPBROADCASTBrm = 15096, |
| 15110 | VPBROADCASTBrr = 15097, |
| 15111 | VPBROADCASTDYrm = 15098, |
| 15112 | VPBROADCASTDYrr = 15099, |
| 15113 | VPBROADCASTDZ128rm = 15100, |
| 15114 | VPBROADCASTDZ128rmk = 15101, |
| 15115 | VPBROADCASTDZ128rmkz = 15102, |
| 15116 | VPBROADCASTDZ128rr = 15103, |
| 15117 | VPBROADCASTDZ128rrk = 15104, |
| 15118 | VPBROADCASTDZ128rrkz = 15105, |
| 15119 | VPBROADCASTDZ256rm = 15106, |
| 15120 | VPBROADCASTDZ256rmk = 15107, |
| 15121 | VPBROADCASTDZ256rmkz = 15108, |
| 15122 | VPBROADCASTDZ256rr = 15109, |
| 15123 | VPBROADCASTDZ256rrk = 15110, |
| 15124 | VPBROADCASTDZ256rrkz = 15111, |
| 15125 | VPBROADCASTDZrm = 15112, |
| 15126 | VPBROADCASTDZrmk = 15113, |
| 15127 | VPBROADCASTDZrmkz = 15114, |
| 15128 | VPBROADCASTDZrr = 15115, |
| 15129 | VPBROADCASTDZrrk = 15116, |
| 15130 | VPBROADCASTDZrrkz = 15117, |
| 15131 | VPBROADCASTDrZ128rr = 15118, |
| 15132 | VPBROADCASTDrZ128rrk = 15119, |
| 15133 | VPBROADCASTDrZ128rrkz = 15120, |
| 15134 | VPBROADCASTDrZ256rr = 15121, |
| 15135 | VPBROADCASTDrZ256rrk = 15122, |
| 15136 | VPBROADCASTDrZ256rrkz = 15123, |
| 15137 | VPBROADCASTDrZrr = 15124, |
| 15138 | VPBROADCASTDrZrrk = 15125, |
| 15139 | VPBROADCASTDrZrrkz = 15126, |
| 15140 | VPBROADCASTDrm = 15127, |
| 15141 | VPBROADCASTDrr = 15128, |
| 15142 | VPBROADCASTMB2QZ128rr = 15129, |
| 15143 | VPBROADCASTMB2QZ256rr = 15130, |
| 15144 | VPBROADCASTMB2QZrr = 15131, |
| 15145 | VPBROADCASTMW2DZ128rr = 15132, |
| 15146 | VPBROADCASTMW2DZ256rr = 15133, |
| 15147 | VPBROADCASTMW2DZrr = 15134, |
| 15148 | VPBROADCASTQYrm = 15135, |
| 15149 | VPBROADCASTQYrr = 15136, |
| 15150 | VPBROADCASTQZ128rm = 15137, |
| 15151 | VPBROADCASTQZ128rmk = 15138, |
| 15152 | VPBROADCASTQZ128rmkz = 15139, |
| 15153 | VPBROADCASTQZ128rr = 15140, |
| 15154 | VPBROADCASTQZ128rrk = 15141, |
| 15155 | VPBROADCASTQZ128rrkz = 15142, |
| 15156 | VPBROADCASTQZ256rm = 15143, |
| 15157 | VPBROADCASTQZ256rmk = 15144, |
| 15158 | VPBROADCASTQZ256rmkz = 15145, |
| 15159 | VPBROADCASTQZ256rr = 15146, |
| 15160 | VPBROADCASTQZ256rrk = 15147, |
| 15161 | VPBROADCASTQZ256rrkz = 15148, |
| 15162 | VPBROADCASTQZrm = 15149, |
| 15163 | VPBROADCASTQZrmk = 15150, |
| 15164 | VPBROADCASTQZrmkz = 15151, |
| 15165 | VPBROADCASTQZrr = 15152, |
| 15166 | VPBROADCASTQZrrk = 15153, |
| 15167 | VPBROADCASTQZrrkz = 15154, |
| 15168 | VPBROADCASTQrZ128rr = 15155, |
| 15169 | VPBROADCASTQrZ128rrk = 15156, |
| 15170 | VPBROADCASTQrZ128rrkz = 15157, |
| 15171 | VPBROADCASTQrZ256rr = 15158, |
| 15172 | VPBROADCASTQrZ256rrk = 15159, |
| 15173 | VPBROADCASTQrZ256rrkz = 15160, |
| 15174 | VPBROADCASTQrZrr = 15161, |
| 15175 | VPBROADCASTQrZrrk = 15162, |
| 15176 | VPBROADCASTQrZrrkz = 15163, |
| 15177 | VPBROADCASTQrm = 15164, |
| 15178 | VPBROADCASTQrr = 15165, |
| 15179 | VPBROADCASTWYrm = 15166, |
| 15180 | VPBROADCASTWYrr = 15167, |
| 15181 | VPBROADCASTWZ128rm = 15168, |
| 15182 | VPBROADCASTWZ128rmk = 15169, |
| 15183 | VPBROADCASTWZ128rmkz = 15170, |
| 15184 | VPBROADCASTWZ128rr = 15171, |
| 15185 | VPBROADCASTWZ128rrk = 15172, |
| 15186 | VPBROADCASTWZ128rrkz = 15173, |
| 15187 | VPBROADCASTWZ256rm = 15174, |
| 15188 | VPBROADCASTWZ256rmk = 15175, |
| 15189 | VPBROADCASTWZ256rmkz = 15176, |
| 15190 | VPBROADCASTWZ256rr = 15177, |
| 15191 | VPBROADCASTWZ256rrk = 15178, |
| 15192 | VPBROADCASTWZ256rrkz = 15179, |
| 15193 | VPBROADCASTWZrm = 15180, |
| 15194 | VPBROADCASTWZrmk = 15181, |
| 15195 | VPBROADCASTWZrmkz = 15182, |
| 15196 | VPBROADCASTWZrr = 15183, |
| 15197 | VPBROADCASTWZrrk = 15184, |
| 15198 | VPBROADCASTWZrrkz = 15185, |
| 15199 | VPBROADCASTWrZ128rr = 15186, |
| 15200 | VPBROADCASTWrZ128rrk = 15187, |
| 15201 | VPBROADCASTWrZ128rrkz = 15188, |
| 15202 | VPBROADCASTWrZ256rr = 15189, |
| 15203 | VPBROADCASTWrZ256rrk = 15190, |
| 15204 | VPBROADCASTWrZ256rrkz = 15191, |
| 15205 | VPBROADCASTWrZrr = 15192, |
| 15206 | VPBROADCASTWrZrrk = 15193, |
| 15207 | VPBROADCASTWrZrrkz = 15194, |
| 15208 | VPBROADCASTWrm = 15195, |
| 15209 | VPBROADCASTWrr = 15196, |
| 15210 | VPCLMULQDQYrmi = 15197, |
| 15211 | VPCLMULQDQYrri = 15198, |
| 15212 | VPCLMULQDQZ128rmi = 15199, |
| 15213 | VPCLMULQDQZ128rri = 15200, |
| 15214 | VPCLMULQDQZ256rmi = 15201, |
| 15215 | VPCLMULQDQZ256rri = 15202, |
| 15216 | VPCLMULQDQZrmi = 15203, |
| 15217 | VPCLMULQDQZrri = 15204, |
| 15218 | VPCLMULQDQrmi = 15205, |
| 15219 | VPCLMULQDQrri = 15206, |
| 15220 | VPCMOVYrmr = 15207, |
| 15221 | VPCMOVYrrm = 15208, |
| 15222 | VPCMOVYrrr = 15209, |
| 15223 | VPCMOVYrrr_REV = 15210, |
| 15224 | VPCMOVrmr = 15211, |
| 15225 | VPCMOVrrm = 15212, |
| 15226 | VPCMOVrrr = 15213, |
| 15227 | VPCMOVrrr_REV = 15214, |
| 15228 | VPCMPBZ128rmi = 15215, |
| 15229 | VPCMPBZ128rmik = 15216, |
| 15230 | VPCMPBZ128rri = 15217, |
| 15231 | VPCMPBZ128rrik = 15218, |
| 15232 | VPCMPBZ256rmi = 15219, |
| 15233 | VPCMPBZ256rmik = 15220, |
| 15234 | VPCMPBZ256rri = 15221, |
| 15235 | VPCMPBZ256rrik = 15222, |
| 15236 | VPCMPBZrmi = 15223, |
| 15237 | VPCMPBZrmik = 15224, |
| 15238 | VPCMPBZrri = 15225, |
| 15239 | VPCMPBZrrik = 15226, |
| 15240 | VPCMPDZ128rmbi = 15227, |
| 15241 | VPCMPDZ128rmbik = 15228, |
| 15242 | VPCMPDZ128rmi = 15229, |
| 15243 | VPCMPDZ128rmik = 15230, |
| 15244 | VPCMPDZ128rri = 15231, |
| 15245 | VPCMPDZ128rrik = 15232, |
| 15246 | VPCMPDZ256rmbi = 15233, |
| 15247 | VPCMPDZ256rmbik = 15234, |
| 15248 | VPCMPDZ256rmi = 15235, |
| 15249 | VPCMPDZ256rmik = 15236, |
| 15250 | VPCMPDZ256rri = 15237, |
| 15251 | VPCMPDZ256rrik = 15238, |
| 15252 | VPCMPDZrmbi = 15239, |
| 15253 | VPCMPDZrmbik = 15240, |
| 15254 | VPCMPDZrmi = 15241, |
| 15255 | VPCMPDZrmik = 15242, |
| 15256 | VPCMPDZrri = 15243, |
| 15257 | VPCMPDZrrik = 15244, |
| 15258 | VPCMPEQBYrm = 15245, |
| 15259 | VPCMPEQBYrr = 15246, |
| 15260 | VPCMPEQBZ128rm = 15247, |
| 15261 | VPCMPEQBZ128rmk = 15248, |
| 15262 | VPCMPEQBZ128rr = 15249, |
| 15263 | VPCMPEQBZ128rrk = 15250, |
| 15264 | VPCMPEQBZ256rm = 15251, |
| 15265 | VPCMPEQBZ256rmk = 15252, |
| 15266 | VPCMPEQBZ256rr = 15253, |
| 15267 | VPCMPEQBZ256rrk = 15254, |
| 15268 | VPCMPEQBZrm = 15255, |
| 15269 | VPCMPEQBZrmk = 15256, |
| 15270 | VPCMPEQBZrr = 15257, |
| 15271 | VPCMPEQBZrrk = 15258, |
| 15272 | VPCMPEQBrm = 15259, |
| 15273 | VPCMPEQBrr = 15260, |
| 15274 | VPCMPEQDYrm = 15261, |
| 15275 | VPCMPEQDYrr = 15262, |
| 15276 | VPCMPEQDZ128rm = 15263, |
| 15277 | VPCMPEQDZ128rmb = 15264, |
| 15278 | VPCMPEQDZ128rmbk = 15265, |
| 15279 | VPCMPEQDZ128rmk = 15266, |
| 15280 | VPCMPEQDZ128rr = 15267, |
| 15281 | VPCMPEQDZ128rrk = 15268, |
| 15282 | VPCMPEQDZ256rm = 15269, |
| 15283 | VPCMPEQDZ256rmb = 15270, |
| 15284 | VPCMPEQDZ256rmbk = 15271, |
| 15285 | VPCMPEQDZ256rmk = 15272, |
| 15286 | VPCMPEQDZ256rr = 15273, |
| 15287 | VPCMPEQDZ256rrk = 15274, |
| 15288 | VPCMPEQDZrm = 15275, |
| 15289 | VPCMPEQDZrmb = 15276, |
| 15290 | VPCMPEQDZrmbk = 15277, |
| 15291 | VPCMPEQDZrmk = 15278, |
| 15292 | VPCMPEQDZrr = 15279, |
| 15293 | VPCMPEQDZrrk = 15280, |
| 15294 | VPCMPEQDrm = 15281, |
| 15295 | VPCMPEQDrr = 15282, |
| 15296 | VPCMPEQQYrm = 15283, |
| 15297 | VPCMPEQQYrr = 15284, |
| 15298 | VPCMPEQQZ128rm = 15285, |
| 15299 | VPCMPEQQZ128rmb = 15286, |
| 15300 | VPCMPEQQZ128rmbk = 15287, |
| 15301 | VPCMPEQQZ128rmk = 15288, |
| 15302 | VPCMPEQQZ128rr = 15289, |
| 15303 | VPCMPEQQZ128rrk = 15290, |
| 15304 | VPCMPEQQZ256rm = 15291, |
| 15305 | VPCMPEQQZ256rmb = 15292, |
| 15306 | VPCMPEQQZ256rmbk = 15293, |
| 15307 | VPCMPEQQZ256rmk = 15294, |
| 15308 | VPCMPEQQZ256rr = 15295, |
| 15309 | VPCMPEQQZ256rrk = 15296, |
| 15310 | VPCMPEQQZrm = 15297, |
| 15311 | VPCMPEQQZrmb = 15298, |
| 15312 | VPCMPEQQZrmbk = 15299, |
| 15313 | VPCMPEQQZrmk = 15300, |
| 15314 | VPCMPEQQZrr = 15301, |
| 15315 | VPCMPEQQZrrk = 15302, |
| 15316 | VPCMPEQQrm = 15303, |
| 15317 | VPCMPEQQrr = 15304, |
| 15318 | VPCMPEQWYrm = 15305, |
| 15319 | VPCMPEQWYrr = 15306, |
| 15320 | VPCMPEQWZ128rm = 15307, |
| 15321 | VPCMPEQWZ128rmk = 15308, |
| 15322 | VPCMPEQWZ128rr = 15309, |
| 15323 | VPCMPEQWZ128rrk = 15310, |
| 15324 | VPCMPEQWZ256rm = 15311, |
| 15325 | VPCMPEQWZ256rmk = 15312, |
| 15326 | VPCMPEQWZ256rr = 15313, |
| 15327 | VPCMPEQWZ256rrk = 15314, |
| 15328 | VPCMPEQWZrm = 15315, |
| 15329 | VPCMPEQWZrmk = 15316, |
| 15330 | VPCMPEQWZrr = 15317, |
| 15331 | VPCMPEQWZrrk = 15318, |
| 15332 | VPCMPEQWrm = 15319, |
| 15333 | VPCMPEQWrr = 15320, |
| 15334 | VPCMPESTRIrmi = 15321, |
| 15335 | VPCMPESTRIrri = 15322, |
| 15336 | VPCMPESTRMrmi = 15323, |
| 15337 | VPCMPESTRMrri = 15324, |
| 15338 | VPCMPGTBYrm = 15325, |
| 15339 | VPCMPGTBYrr = 15326, |
| 15340 | VPCMPGTBZ128rm = 15327, |
| 15341 | VPCMPGTBZ128rmk = 15328, |
| 15342 | VPCMPGTBZ128rr = 15329, |
| 15343 | VPCMPGTBZ128rrk = 15330, |
| 15344 | VPCMPGTBZ256rm = 15331, |
| 15345 | VPCMPGTBZ256rmk = 15332, |
| 15346 | VPCMPGTBZ256rr = 15333, |
| 15347 | VPCMPGTBZ256rrk = 15334, |
| 15348 | VPCMPGTBZrm = 15335, |
| 15349 | VPCMPGTBZrmk = 15336, |
| 15350 | VPCMPGTBZrr = 15337, |
| 15351 | VPCMPGTBZrrk = 15338, |
| 15352 | VPCMPGTBrm = 15339, |
| 15353 | VPCMPGTBrr = 15340, |
| 15354 | VPCMPGTDYrm = 15341, |
| 15355 | VPCMPGTDYrr = 15342, |
| 15356 | VPCMPGTDZ128rm = 15343, |
| 15357 | VPCMPGTDZ128rmb = 15344, |
| 15358 | VPCMPGTDZ128rmbk = 15345, |
| 15359 | VPCMPGTDZ128rmk = 15346, |
| 15360 | VPCMPGTDZ128rr = 15347, |
| 15361 | VPCMPGTDZ128rrk = 15348, |
| 15362 | VPCMPGTDZ256rm = 15349, |
| 15363 | VPCMPGTDZ256rmb = 15350, |
| 15364 | VPCMPGTDZ256rmbk = 15351, |
| 15365 | VPCMPGTDZ256rmk = 15352, |
| 15366 | VPCMPGTDZ256rr = 15353, |
| 15367 | VPCMPGTDZ256rrk = 15354, |
| 15368 | VPCMPGTDZrm = 15355, |
| 15369 | VPCMPGTDZrmb = 15356, |
| 15370 | VPCMPGTDZrmbk = 15357, |
| 15371 | VPCMPGTDZrmk = 15358, |
| 15372 | VPCMPGTDZrr = 15359, |
| 15373 | VPCMPGTDZrrk = 15360, |
| 15374 | VPCMPGTDrm = 15361, |
| 15375 | VPCMPGTDrr = 15362, |
| 15376 | VPCMPGTQYrm = 15363, |
| 15377 | VPCMPGTQYrr = 15364, |
| 15378 | VPCMPGTQZ128rm = 15365, |
| 15379 | VPCMPGTQZ128rmb = 15366, |
| 15380 | VPCMPGTQZ128rmbk = 15367, |
| 15381 | VPCMPGTQZ128rmk = 15368, |
| 15382 | VPCMPGTQZ128rr = 15369, |
| 15383 | VPCMPGTQZ128rrk = 15370, |
| 15384 | VPCMPGTQZ256rm = 15371, |
| 15385 | VPCMPGTQZ256rmb = 15372, |
| 15386 | VPCMPGTQZ256rmbk = 15373, |
| 15387 | VPCMPGTQZ256rmk = 15374, |
| 15388 | VPCMPGTQZ256rr = 15375, |
| 15389 | VPCMPGTQZ256rrk = 15376, |
| 15390 | VPCMPGTQZrm = 15377, |
| 15391 | VPCMPGTQZrmb = 15378, |
| 15392 | VPCMPGTQZrmbk = 15379, |
| 15393 | VPCMPGTQZrmk = 15380, |
| 15394 | VPCMPGTQZrr = 15381, |
| 15395 | VPCMPGTQZrrk = 15382, |
| 15396 | VPCMPGTQrm = 15383, |
| 15397 | VPCMPGTQrr = 15384, |
| 15398 | VPCMPGTWYrm = 15385, |
| 15399 | VPCMPGTWYrr = 15386, |
| 15400 | VPCMPGTWZ128rm = 15387, |
| 15401 | VPCMPGTWZ128rmk = 15388, |
| 15402 | VPCMPGTWZ128rr = 15389, |
| 15403 | VPCMPGTWZ128rrk = 15390, |
| 15404 | VPCMPGTWZ256rm = 15391, |
| 15405 | VPCMPGTWZ256rmk = 15392, |
| 15406 | VPCMPGTWZ256rr = 15393, |
| 15407 | VPCMPGTWZ256rrk = 15394, |
| 15408 | VPCMPGTWZrm = 15395, |
| 15409 | VPCMPGTWZrmk = 15396, |
| 15410 | VPCMPGTWZrr = 15397, |
| 15411 | VPCMPGTWZrrk = 15398, |
| 15412 | VPCMPGTWrm = 15399, |
| 15413 | VPCMPGTWrr = 15400, |
| 15414 | VPCMPISTRIrmi = 15401, |
| 15415 | VPCMPISTRIrri = 15402, |
| 15416 | VPCMPISTRMrmi = 15403, |
| 15417 | VPCMPISTRMrri = 15404, |
| 15418 | VPCMPQZ128rmbi = 15405, |
| 15419 | VPCMPQZ128rmbik = 15406, |
| 15420 | VPCMPQZ128rmi = 15407, |
| 15421 | VPCMPQZ128rmik = 15408, |
| 15422 | VPCMPQZ128rri = 15409, |
| 15423 | VPCMPQZ128rrik = 15410, |
| 15424 | VPCMPQZ256rmbi = 15411, |
| 15425 | VPCMPQZ256rmbik = 15412, |
| 15426 | VPCMPQZ256rmi = 15413, |
| 15427 | VPCMPQZ256rmik = 15414, |
| 15428 | VPCMPQZ256rri = 15415, |
| 15429 | VPCMPQZ256rrik = 15416, |
| 15430 | VPCMPQZrmbi = 15417, |
| 15431 | VPCMPQZrmbik = 15418, |
| 15432 | VPCMPQZrmi = 15419, |
| 15433 | VPCMPQZrmik = 15420, |
| 15434 | VPCMPQZrri = 15421, |
| 15435 | VPCMPQZrrik = 15422, |
| 15436 | VPCMPUBZ128rmi = 15423, |
| 15437 | VPCMPUBZ128rmik = 15424, |
| 15438 | VPCMPUBZ128rri = 15425, |
| 15439 | VPCMPUBZ128rrik = 15426, |
| 15440 | VPCMPUBZ256rmi = 15427, |
| 15441 | VPCMPUBZ256rmik = 15428, |
| 15442 | VPCMPUBZ256rri = 15429, |
| 15443 | VPCMPUBZ256rrik = 15430, |
| 15444 | VPCMPUBZrmi = 15431, |
| 15445 | VPCMPUBZrmik = 15432, |
| 15446 | VPCMPUBZrri = 15433, |
| 15447 | VPCMPUBZrrik = 15434, |
| 15448 | VPCMPUDZ128rmbi = 15435, |
| 15449 | VPCMPUDZ128rmbik = 15436, |
| 15450 | VPCMPUDZ128rmi = 15437, |
| 15451 | VPCMPUDZ128rmik = 15438, |
| 15452 | VPCMPUDZ128rri = 15439, |
| 15453 | VPCMPUDZ128rrik = 15440, |
| 15454 | VPCMPUDZ256rmbi = 15441, |
| 15455 | VPCMPUDZ256rmbik = 15442, |
| 15456 | VPCMPUDZ256rmi = 15443, |
| 15457 | VPCMPUDZ256rmik = 15444, |
| 15458 | VPCMPUDZ256rri = 15445, |
| 15459 | VPCMPUDZ256rrik = 15446, |
| 15460 | VPCMPUDZrmbi = 15447, |
| 15461 | VPCMPUDZrmbik = 15448, |
| 15462 | VPCMPUDZrmi = 15449, |
| 15463 | VPCMPUDZrmik = 15450, |
| 15464 | VPCMPUDZrri = 15451, |
| 15465 | VPCMPUDZrrik = 15452, |
| 15466 | VPCMPUQZ128rmbi = 15453, |
| 15467 | VPCMPUQZ128rmbik = 15454, |
| 15468 | VPCMPUQZ128rmi = 15455, |
| 15469 | VPCMPUQZ128rmik = 15456, |
| 15470 | VPCMPUQZ128rri = 15457, |
| 15471 | VPCMPUQZ128rrik = 15458, |
| 15472 | VPCMPUQZ256rmbi = 15459, |
| 15473 | VPCMPUQZ256rmbik = 15460, |
| 15474 | VPCMPUQZ256rmi = 15461, |
| 15475 | VPCMPUQZ256rmik = 15462, |
| 15476 | VPCMPUQZ256rri = 15463, |
| 15477 | VPCMPUQZ256rrik = 15464, |
| 15478 | VPCMPUQZrmbi = 15465, |
| 15479 | VPCMPUQZrmbik = 15466, |
| 15480 | VPCMPUQZrmi = 15467, |
| 15481 | VPCMPUQZrmik = 15468, |
| 15482 | VPCMPUQZrri = 15469, |
| 15483 | VPCMPUQZrrik = 15470, |
| 15484 | VPCMPUWZ128rmi = 15471, |
| 15485 | VPCMPUWZ128rmik = 15472, |
| 15486 | VPCMPUWZ128rri = 15473, |
| 15487 | VPCMPUWZ128rrik = 15474, |
| 15488 | VPCMPUWZ256rmi = 15475, |
| 15489 | VPCMPUWZ256rmik = 15476, |
| 15490 | VPCMPUWZ256rri = 15477, |
| 15491 | VPCMPUWZ256rrik = 15478, |
| 15492 | VPCMPUWZrmi = 15479, |
| 15493 | VPCMPUWZrmik = 15480, |
| 15494 | VPCMPUWZrri = 15481, |
| 15495 | VPCMPUWZrrik = 15482, |
| 15496 | VPCMPWZ128rmi = 15483, |
| 15497 | VPCMPWZ128rmik = 15484, |
| 15498 | VPCMPWZ128rri = 15485, |
| 15499 | VPCMPWZ128rrik = 15486, |
| 15500 | VPCMPWZ256rmi = 15487, |
| 15501 | VPCMPWZ256rmik = 15488, |
| 15502 | VPCMPWZ256rri = 15489, |
| 15503 | VPCMPWZ256rrik = 15490, |
| 15504 | VPCMPWZrmi = 15491, |
| 15505 | VPCMPWZrmik = 15492, |
| 15506 | VPCMPWZrri = 15493, |
| 15507 | VPCMPWZrrik = 15494, |
| 15508 | VPCOMBmi = 15495, |
| 15509 | VPCOMBri = 15496, |
| 15510 | VPCOMDmi = 15497, |
| 15511 | VPCOMDri = 15498, |
| 15512 | VPCOMPRESSBZ128mr = 15499, |
| 15513 | VPCOMPRESSBZ128mrk = 15500, |
| 15514 | VPCOMPRESSBZ128rr = 15501, |
| 15515 | VPCOMPRESSBZ128rrk = 15502, |
| 15516 | VPCOMPRESSBZ128rrkz = 15503, |
| 15517 | VPCOMPRESSBZ256mr = 15504, |
| 15518 | VPCOMPRESSBZ256mrk = 15505, |
| 15519 | VPCOMPRESSBZ256rr = 15506, |
| 15520 | VPCOMPRESSBZ256rrk = 15507, |
| 15521 | VPCOMPRESSBZ256rrkz = 15508, |
| 15522 | VPCOMPRESSBZmr = 15509, |
| 15523 | VPCOMPRESSBZmrk = 15510, |
| 15524 | VPCOMPRESSBZrr = 15511, |
| 15525 | VPCOMPRESSBZrrk = 15512, |
| 15526 | VPCOMPRESSBZrrkz = 15513, |
| 15527 | VPCOMPRESSDZ128mr = 15514, |
| 15528 | VPCOMPRESSDZ128mrk = 15515, |
| 15529 | VPCOMPRESSDZ128rr = 15516, |
| 15530 | VPCOMPRESSDZ128rrk = 15517, |
| 15531 | VPCOMPRESSDZ128rrkz = 15518, |
| 15532 | VPCOMPRESSDZ256mr = 15519, |
| 15533 | VPCOMPRESSDZ256mrk = 15520, |
| 15534 | VPCOMPRESSDZ256rr = 15521, |
| 15535 | VPCOMPRESSDZ256rrk = 15522, |
| 15536 | VPCOMPRESSDZ256rrkz = 15523, |
| 15537 | VPCOMPRESSDZmr = 15524, |
| 15538 | VPCOMPRESSDZmrk = 15525, |
| 15539 | VPCOMPRESSDZrr = 15526, |
| 15540 | VPCOMPRESSDZrrk = 15527, |
| 15541 | VPCOMPRESSDZrrkz = 15528, |
| 15542 | VPCOMPRESSQZ128mr = 15529, |
| 15543 | VPCOMPRESSQZ128mrk = 15530, |
| 15544 | VPCOMPRESSQZ128rr = 15531, |
| 15545 | VPCOMPRESSQZ128rrk = 15532, |
| 15546 | VPCOMPRESSQZ128rrkz = 15533, |
| 15547 | VPCOMPRESSQZ256mr = 15534, |
| 15548 | VPCOMPRESSQZ256mrk = 15535, |
| 15549 | VPCOMPRESSQZ256rr = 15536, |
| 15550 | VPCOMPRESSQZ256rrk = 15537, |
| 15551 | VPCOMPRESSQZ256rrkz = 15538, |
| 15552 | VPCOMPRESSQZmr = 15539, |
| 15553 | VPCOMPRESSQZmrk = 15540, |
| 15554 | VPCOMPRESSQZrr = 15541, |
| 15555 | VPCOMPRESSQZrrk = 15542, |
| 15556 | VPCOMPRESSQZrrkz = 15543, |
| 15557 | VPCOMPRESSWZ128mr = 15544, |
| 15558 | VPCOMPRESSWZ128mrk = 15545, |
| 15559 | VPCOMPRESSWZ128rr = 15546, |
| 15560 | VPCOMPRESSWZ128rrk = 15547, |
| 15561 | VPCOMPRESSWZ128rrkz = 15548, |
| 15562 | VPCOMPRESSWZ256mr = 15549, |
| 15563 | VPCOMPRESSWZ256mrk = 15550, |
| 15564 | VPCOMPRESSWZ256rr = 15551, |
| 15565 | VPCOMPRESSWZ256rrk = 15552, |
| 15566 | VPCOMPRESSWZ256rrkz = 15553, |
| 15567 | VPCOMPRESSWZmr = 15554, |
| 15568 | VPCOMPRESSWZmrk = 15555, |
| 15569 | VPCOMPRESSWZrr = 15556, |
| 15570 | VPCOMPRESSWZrrk = 15557, |
| 15571 | VPCOMPRESSWZrrkz = 15558, |
| 15572 | VPCOMQmi = 15559, |
| 15573 | VPCOMQri = 15560, |
| 15574 | VPCOMUBmi = 15561, |
| 15575 | VPCOMUBri = 15562, |
| 15576 | VPCOMUDmi = 15563, |
| 15577 | VPCOMUDri = 15564, |
| 15578 | VPCOMUQmi = 15565, |
| 15579 | VPCOMUQri = 15566, |
| 15580 | VPCOMUWmi = 15567, |
| 15581 | VPCOMUWri = 15568, |
| 15582 | VPCOMWmi = 15569, |
| 15583 | VPCOMWri = 15570, |
| 15584 | VPCONFLICTDZ128rm = 15571, |
| 15585 | VPCONFLICTDZ128rmb = 15572, |
| 15586 | VPCONFLICTDZ128rmbk = 15573, |
| 15587 | VPCONFLICTDZ128rmbkz = 15574, |
| 15588 | VPCONFLICTDZ128rmk = 15575, |
| 15589 | VPCONFLICTDZ128rmkz = 15576, |
| 15590 | VPCONFLICTDZ128rr = 15577, |
| 15591 | VPCONFLICTDZ128rrk = 15578, |
| 15592 | VPCONFLICTDZ128rrkz = 15579, |
| 15593 | VPCONFLICTDZ256rm = 15580, |
| 15594 | VPCONFLICTDZ256rmb = 15581, |
| 15595 | VPCONFLICTDZ256rmbk = 15582, |
| 15596 | VPCONFLICTDZ256rmbkz = 15583, |
| 15597 | VPCONFLICTDZ256rmk = 15584, |
| 15598 | VPCONFLICTDZ256rmkz = 15585, |
| 15599 | VPCONFLICTDZ256rr = 15586, |
| 15600 | VPCONFLICTDZ256rrk = 15587, |
| 15601 | VPCONFLICTDZ256rrkz = 15588, |
| 15602 | VPCONFLICTDZrm = 15589, |
| 15603 | VPCONFLICTDZrmb = 15590, |
| 15604 | VPCONFLICTDZrmbk = 15591, |
| 15605 | VPCONFLICTDZrmbkz = 15592, |
| 15606 | VPCONFLICTDZrmk = 15593, |
| 15607 | VPCONFLICTDZrmkz = 15594, |
| 15608 | VPCONFLICTDZrr = 15595, |
| 15609 | VPCONFLICTDZrrk = 15596, |
| 15610 | VPCONFLICTDZrrkz = 15597, |
| 15611 | VPCONFLICTQZ128rm = 15598, |
| 15612 | VPCONFLICTQZ128rmb = 15599, |
| 15613 | VPCONFLICTQZ128rmbk = 15600, |
| 15614 | VPCONFLICTQZ128rmbkz = 15601, |
| 15615 | VPCONFLICTQZ128rmk = 15602, |
| 15616 | VPCONFLICTQZ128rmkz = 15603, |
| 15617 | VPCONFLICTQZ128rr = 15604, |
| 15618 | VPCONFLICTQZ128rrk = 15605, |
| 15619 | VPCONFLICTQZ128rrkz = 15606, |
| 15620 | VPCONFLICTQZ256rm = 15607, |
| 15621 | VPCONFLICTQZ256rmb = 15608, |
| 15622 | VPCONFLICTQZ256rmbk = 15609, |
| 15623 | VPCONFLICTQZ256rmbkz = 15610, |
| 15624 | VPCONFLICTQZ256rmk = 15611, |
| 15625 | VPCONFLICTQZ256rmkz = 15612, |
| 15626 | VPCONFLICTQZ256rr = 15613, |
| 15627 | VPCONFLICTQZ256rrk = 15614, |
| 15628 | VPCONFLICTQZ256rrkz = 15615, |
| 15629 | VPCONFLICTQZrm = 15616, |
| 15630 | VPCONFLICTQZrmb = 15617, |
| 15631 | VPCONFLICTQZrmbk = 15618, |
| 15632 | VPCONFLICTQZrmbkz = 15619, |
| 15633 | VPCONFLICTQZrmk = 15620, |
| 15634 | VPCONFLICTQZrmkz = 15621, |
| 15635 | VPCONFLICTQZrr = 15622, |
| 15636 | VPCONFLICTQZrrk = 15623, |
| 15637 | VPCONFLICTQZrrkz = 15624, |
| 15638 | VPDPBSSDSYrm = 15625, |
| 15639 | VPDPBSSDSYrr = 15626, |
| 15640 | VPDPBSSDSZ128m = 15627, |
| 15641 | VPDPBSSDSZ128mb = 15628, |
| 15642 | VPDPBSSDSZ128mbk = 15629, |
| 15643 | VPDPBSSDSZ128mbkz = 15630, |
| 15644 | VPDPBSSDSZ128mk = 15631, |
| 15645 | VPDPBSSDSZ128mkz = 15632, |
| 15646 | VPDPBSSDSZ128r = 15633, |
| 15647 | VPDPBSSDSZ128rk = 15634, |
| 15648 | VPDPBSSDSZ128rkz = 15635, |
| 15649 | VPDPBSSDSZ256m = 15636, |
| 15650 | VPDPBSSDSZ256mb = 15637, |
| 15651 | VPDPBSSDSZ256mbk = 15638, |
| 15652 | VPDPBSSDSZ256mbkz = 15639, |
| 15653 | VPDPBSSDSZ256mk = 15640, |
| 15654 | VPDPBSSDSZ256mkz = 15641, |
| 15655 | VPDPBSSDSZ256r = 15642, |
| 15656 | VPDPBSSDSZ256rk = 15643, |
| 15657 | VPDPBSSDSZ256rkz = 15644, |
| 15658 | VPDPBSSDSZm = 15645, |
| 15659 | VPDPBSSDSZmb = 15646, |
| 15660 | VPDPBSSDSZmbk = 15647, |
| 15661 | VPDPBSSDSZmbkz = 15648, |
| 15662 | VPDPBSSDSZmk = 15649, |
| 15663 | VPDPBSSDSZmkz = 15650, |
| 15664 | VPDPBSSDSZr = 15651, |
| 15665 | VPDPBSSDSZrk = 15652, |
| 15666 | VPDPBSSDSZrkz = 15653, |
| 15667 | VPDPBSSDSrm = 15654, |
| 15668 | VPDPBSSDSrr = 15655, |
| 15669 | VPDPBSSDYrm = 15656, |
| 15670 | VPDPBSSDYrr = 15657, |
| 15671 | VPDPBSSDZ128m = 15658, |
| 15672 | VPDPBSSDZ128mb = 15659, |
| 15673 | VPDPBSSDZ128mbk = 15660, |
| 15674 | VPDPBSSDZ128mbkz = 15661, |
| 15675 | VPDPBSSDZ128mk = 15662, |
| 15676 | VPDPBSSDZ128mkz = 15663, |
| 15677 | VPDPBSSDZ128r = 15664, |
| 15678 | VPDPBSSDZ128rk = 15665, |
| 15679 | VPDPBSSDZ128rkz = 15666, |
| 15680 | VPDPBSSDZ256m = 15667, |
| 15681 | VPDPBSSDZ256mb = 15668, |
| 15682 | VPDPBSSDZ256mbk = 15669, |
| 15683 | VPDPBSSDZ256mbkz = 15670, |
| 15684 | VPDPBSSDZ256mk = 15671, |
| 15685 | VPDPBSSDZ256mkz = 15672, |
| 15686 | VPDPBSSDZ256r = 15673, |
| 15687 | VPDPBSSDZ256rk = 15674, |
| 15688 | VPDPBSSDZ256rkz = 15675, |
| 15689 | VPDPBSSDZm = 15676, |
| 15690 | VPDPBSSDZmb = 15677, |
| 15691 | VPDPBSSDZmbk = 15678, |
| 15692 | VPDPBSSDZmbkz = 15679, |
| 15693 | VPDPBSSDZmk = 15680, |
| 15694 | VPDPBSSDZmkz = 15681, |
| 15695 | VPDPBSSDZr = 15682, |
| 15696 | VPDPBSSDZrk = 15683, |
| 15697 | VPDPBSSDZrkz = 15684, |
| 15698 | VPDPBSSDrm = 15685, |
| 15699 | VPDPBSSDrr = 15686, |
| 15700 | VPDPBSUDSYrm = 15687, |
| 15701 | VPDPBSUDSYrr = 15688, |
| 15702 | VPDPBSUDSZ128m = 15689, |
| 15703 | VPDPBSUDSZ128mb = 15690, |
| 15704 | VPDPBSUDSZ128mbk = 15691, |
| 15705 | VPDPBSUDSZ128mbkz = 15692, |
| 15706 | VPDPBSUDSZ128mk = 15693, |
| 15707 | VPDPBSUDSZ128mkz = 15694, |
| 15708 | VPDPBSUDSZ128r = 15695, |
| 15709 | VPDPBSUDSZ128rk = 15696, |
| 15710 | VPDPBSUDSZ128rkz = 15697, |
| 15711 | VPDPBSUDSZ256m = 15698, |
| 15712 | VPDPBSUDSZ256mb = 15699, |
| 15713 | VPDPBSUDSZ256mbk = 15700, |
| 15714 | VPDPBSUDSZ256mbkz = 15701, |
| 15715 | VPDPBSUDSZ256mk = 15702, |
| 15716 | VPDPBSUDSZ256mkz = 15703, |
| 15717 | VPDPBSUDSZ256r = 15704, |
| 15718 | VPDPBSUDSZ256rk = 15705, |
| 15719 | VPDPBSUDSZ256rkz = 15706, |
| 15720 | VPDPBSUDSZm = 15707, |
| 15721 | VPDPBSUDSZmb = 15708, |
| 15722 | VPDPBSUDSZmbk = 15709, |
| 15723 | VPDPBSUDSZmbkz = 15710, |
| 15724 | VPDPBSUDSZmk = 15711, |
| 15725 | VPDPBSUDSZmkz = 15712, |
| 15726 | VPDPBSUDSZr = 15713, |
| 15727 | VPDPBSUDSZrk = 15714, |
| 15728 | VPDPBSUDSZrkz = 15715, |
| 15729 | VPDPBSUDSrm = 15716, |
| 15730 | VPDPBSUDSrr = 15717, |
| 15731 | VPDPBSUDYrm = 15718, |
| 15732 | VPDPBSUDYrr = 15719, |
| 15733 | VPDPBSUDZ128m = 15720, |
| 15734 | VPDPBSUDZ128mb = 15721, |
| 15735 | VPDPBSUDZ128mbk = 15722, |
| 15736 | VPDPBSUDZ128mbkz = 15723, |
| 15737 | VPDPBSUDZ128mk = 15724, |
| 15738 | VPDPBSUDZ128mkz = 15725, |
| 15739 | VPDPBSUDZ128r = 15726, |
| 15740 | VPDPBSUDZ128rk = 15727, |
| 15741 | VPDPBSUDZ128rkz = 15728, |
| 15742 | VPDPBSUDZ256m = 15729, |
| 15743 | VPDPBSUDZ256mb = 15730, |
| 15744 | VPDPBSUDZ256mbk = 15731, |
| 15745 | VPDPBSUDZ256mbkz = 15732, |
| 15746 | VPDPBSUDZ256mk = 15733, |
| 15747 | VPDPBSUDZ256mkz = 15734, |
| 15748 | VPDPBSUDZ256r = 15735, |
| 15749 | VPDPBSUDZ256rk = 15736, |
| 15750 | VPDPBSUDZ256rkz = 15737, |
| 15751 | VPDPBSUDZm = 15738, |
| 15752 | VPDPBSUDZmb = 15739, |
| 15753 | VPDPBSUDZmbk = 15740, |
| 15754 | VPDPBSUDZmbkz = 15741, |
| 15755 | VPDPBSUDZmk = 15742, |
| 15756 | VPDPBSUDZmkz = 15743, |
| 15757 | VPDPBSUDZr = 15744, |
| 15758 | VPDPBSUDZrk = 15745, |
| 15759 | VPDPBSUDZrkz = 15746, |
| 15760 | VPDPBSUDrm = 15747, |
| 15761 | VPDPBSUDrr = 15748, |
| 15762 | VPDPBUSDSYrm = 15749, |
| 15763 | VPDPBUSDSYrr = 15750, |
| 15764 | VPDPBUSDSZ128m = 15751, |
| 15765 | VPDPBUSDSZ128mb = 15752, |
| 15766 | VPDPBUSDSZ128mbk = 15753, |
| 15767 | VPDPBUSDSZ128mbkz = 15754, |
| 15768 | VPDPBUSDSZ128mk = 15755, |
| 15769 | VPDPBUSDSZ128mkz = 15756, |
| 15770 | VPDPBUSDSZ128r = 15757, |
| 15771 | VPDPBUSDSZ128rk = 15758, |
| 15772 | VPDPBUSDSZ128rkz = 15759, |
| 15773 | VPDPBUSDSZ256m = 15760, |
| 15774 | VPDPBUSDSZ256mb = 15761, |
| 15775 | VPDPBUSDSZ256mbk = 15762, |
| 15776 | VPDPBUSDSZ256mbkz = 15763, |
| 15777 | VPDPBUSDSZ256mk = 15764, |
| 15778 | VPDPBUSDSZ256mkz = 15765, |
| 15779 | VPDPBUSDSZ256r = 15766, |
| 15780 | VPDPBUSDSZ256rk = 15767, |
| 15781 | VPDPBUSDSZ256rkz = 15768, |
| 15782 | VPDPBUSDSZm = 15769, |
| 15783 | VPDPBUSDSZmb = 15770, |
| 15784 | VPDPBUSDSZmbk = 15771, |
| 15785 | VPDPBUSDSZmbkz = 15772, |
| 15786 | VPDPBUSDSZmk = 15773, |
| 15787 | VPDPBUSDSZmkz = 15774, |
| 15788 | VPDPBUSDSZr = 15775, |
| 15789 | VPDPBUSDSZrk = 15776, |
| 15790 | VPDPBUSDSZrkz = 15777, |
| 15791 | VPDPBUSDSrm = 15778, |
| 15792 | VPDPBUSDSrr = 15779, |
| 15793 | VPDPBUSDYrm = 15780, |
| 15794 | VPDPBUSDYrr = 15781, |
| 15795 | VPDPBUSDZ128m = 15782, |
| 15796 | VPDPBUSDZ128mb = 15783, |
| 15797 | VPDPBUSDZ128mbk = 15784, |
| 15798 | VPDPBUSDZ128mbkz = 15785, |
| 15799 | VPDPBUSDZ128mk = 15786, |
| 15800 | VPDPBUSDZ128mkz = 15787, |
| 15801 | VPDPBUSDZ128r = 15788, |
| 15802 | VPDPBUSDZ128rk = 15789, |
| 15803 | VPDPBUSDZ128rkz = 15790, |
| 15804 | VPDPBUSDZ256m = 15791, |
| 15805 | VPDPBUSDZ256mb = 15792, |
| 15806 | VPDPBUSDZ256mbk = 15793, |
| 15807 | VPDPBUSDZ256mbkz = 15794, |
| 15808 | VPDPBUSDZ256mk = 15795, |
| 15809 | VPDPBUSDZ256mkz = 15796, |
| 15810 | VPDPBUSDZ256r = 15797, |
| 15811 | VPDPBUSDZ256rk = 15798, |
| 15812 | VPDPBUSDZ256rkz = 15799, |
| 15813 | VPDPBUSDZm = 15800, |
| 15814 | VPDPBUSDZmb = 15801, |
| 15815 | VPDPBUSDZmbk = 15802, |
| 15816 | VPDPBUSDZmbkz = 15803, |
| 15817 | VPDPBUSDZmk = 15804, |
| 15818 | VPDPBUSDZmkz = 15805, |
| 15819 | VPDPBUSDZr = 15806, |
| 15820 | VPDPBUSDZrk = 15807, |
| 15821 | VPDPBUSDZrkz = 15808, |
| 15822 | VPDPBUSDrm = 15809, |
| 15823 | VPDPBUSDrr = 15810, |
| 15824 | VPDPBUUDSYrm = 15811, |
| 15825 | VPDPBUUDSYrr = 15812, |
| 15826 | VPDPBUUDSZ128m = 15813, |
| 15827 | VPDPBUUDSZ128mb = 15814, |
| 15828 | VPDPBUUDSZ128mbk = 15815, |
| 15829 | VPDPBUUDSZ128mbkz = 15816, |
| 15830 | VPDPBUUDSZ128mk = 15817, |
| 15831 | VPDPBUUDSZ128mkz = 15818, |
| 15832 | VPDPBUUDSZ128r = 15819, |
| 15833 | VPDPBUUDSZ128rk = 15820, |
| 15834 | VPDPBUUDSZ128rkz = 15821, |
| 15835 | VPDPBUUDSZ256m = 15822, |
| 15836 | VPDPBUUDSZ256mb = 15823, |
| 15837 | VPDPBUUDSZ256mbk = 15824, |
| 15838 | VPDPBUUDSZ256mbkz = 15825, |
| 15839 | VPDPBUUDSZ256mk = 15826, |
| 15840 | VPDPBUUDSZ256mkz = 15827, |
| 15841 | VPDPBUUDSZ256r = 15828, |
| 15842 | VPDPBUUDSZ256rk = 15829, |
| 15843 | VPDPBUUDSZ256rkz = 15830, |
| 15844 | VPDPBUUDSZm = 15831, |
| 15845 | VPDPBUUDSZmb = 15832, |
| 15846 | VPDPBUUDSZmbk = 15833, |
| 15847 | VPDPBUUDSZmbkz = 15834, |
| 15848 | VPDPBUUDSZmk = 15835, |
| 15849 | VPDPBUUDSZmkz = 15836, |
| 15850 | VPDPBUUDSZr = 15837, |
| 15851 | VPDPBUUDSZrk = 15838, |
| 15852 | VPDPBUUDSZrkz = 15839, |
| 15853 | VPDPBUUDSrm = 15840, |
| 15854 | VPDPBUUDSrr = 15841, |
| 15855 | VPDPBUUDYrm = 15842, |
| 15856 | VPDPBUUDYrr = 15843, |
| 15857 | VPDPBUUDZ128m = 15844, |
| 15858 | VPDPBUUDZ128mb = 15845, |
| 15859 | VPDPBUUDZ128mbk = 15846, |
| 15860 | VPDPBUUDZ128mbkz = 15847, |
| 15861 | VPDPBUUDZ128mk = 15848, |
| 15862 | VPDPBUUDZ128mkz = 15849, |
| 15863 | VPDPBUUDZ128r = 15850, |
| 15864 | VPDPBUUDZ128rk = 15851, |
| 15865 | VPDPBUUDZ128rkz = 15852, |
| 15866 | VPDPBUUDZ256m = 15853, |
| 15867 | VPDPBUUDZ256mb = 15854, |
| 15868 | VPDPBUUDZ256mbk = 15855, |
| 15869 | VPDPBUUDZ256mbkz = 15856, |
| 15870 | VPDPBUUDZ256mk = 15857, |
| 15871 | VPDPBUUDZ256mkz = 15858, |
| 15872 | VPDPBUUDZ256r = 15859, |
| 15873 | VPDPBUUDZ256rk = 15860, |
| 15874 | VPDPBUUDZ256rkz = 15861, |
| 15875 | VPDPBUUDZm = 15862, |
| 15876 | VPDPBUUDZmb = 15863, |
| 15877 | VPDPBUUDZmbk = 15864, |
| 15878 | VPDPBUUDZmbkz = 15865, |
| 15879 | VPDPBUUDZmk = 15866, |
| 15880 | VPDPBUUDZmkz = 15867, |
| 15881 | VPDPBUUDZr = 15868, |
| 15882 | VPDPBUUDZrk = 15869, |
| 15883 | VPDPBUUDZrkz = 15870, |
| 15884 | VPDPBUUDrm = 15871, |
| 15885 | VPDPBUUDrr = 15872, |
| 15886 | VPDPWSSDSYrm = 15873, |
| 15887 | VPDPWSSDSYrr = 15874, |
| 15888 | VPDPWSSDSZ128m = 15875, |
| 15889 | VPDPWSSDSZ128mb = 15876, |
| 15890 | VPDPWSSDSZ128mbk = 15877, |
| 15891 | VPDPWSSDSZ128mbkz = 15878, |
| 15892 | VPDPWSSDSZ128mk = 15879, |
| 15893 | VPDPWSSDSZ128mkz = 15880, |
| 15894 | VPDPWSSDSZ128r = 15881, |
| 15895 | VPDPWSSDSZ128rk = 15882, |
| 15896 | VPDPWSSDSZ128rkz = 15883, |
| 15897 | VPDPWSSDSZ256m = 15884, |
| 15898 | VPDPWSSDSZ256mb = 15885, |
| 15899 | VPDPWSSDSZ256mbk = 15886, |
| 15900 | VPDPWSSDSZ256mbkz = 15887, |
| 15901 | VPDPWSSDSZ256mk = 15888, |
| 15902 | VPDPWSSDSZ256mkz = 15889, |
| 15903 | VPDPWSSDSZ256r = 15890, |
| 15904 | VPDPWSSDSZ256rk = 15891, |
| 15905 | VPDPWSSDSZ256rkz = 15892, |
| 15906 | VPDPWSSDSZm = 15893, |
| 15907 | VPDPWSSDSZmb = 15894, |
| 15908 | VPDPWSSDSZmbk = 15895, |
| 15909 | VPDPWSSDSZmbkz = 15896, |
| 15910 | VPDPWSSDSZmk = 15897, |
| 15911 | VPDPWSSDSZmkz = 15898, |
| 15912 | VPDPWSSDSZr = 15899, |
| 15913 | VPDPWSSDSZrk = 15900, |
| 15914 | VPDPWSSDSZrkz = 15901, |
| 15915 | VPDPWSSDSrm = 15902, |
| 15916 | VPDPWSSDSrr = 15903, |
| 15917 | VPDPWSSDYrm = 15904, |
| 15918 | VPDPWSSDYrr = 15905, |
| 15919 | VPDPWSSDZ128m = 15906, |
| 15920 | VPDPWSSDZ128mb = 15907, |
| 15921 | VPDPWSSDZ128mbk = 15908, |
| 15922 | VPDPWSSDZ128mbkz = 15909, |
| 15923 | VPDPWSSDZ128mk = 15910, |
| 15924 | VPDPWSSDZ128mkz = 15911, |
| 15925 | VPDPWSSDZ128r = 15912, |
| 15926 | VPDPWSSDZ128rk = 15913, |
| 15927 | VPDPWSSDZ128rkz = 15914, |
| 15928 | VPDPWSSDZ256m = 15915, |
| 15929 | VPDPWSSDZ256mb = 15916, |
| 15930 | VPDPWSSDZ256mbk = 15917, |
| 15931 | VPDPWSSDZ256mbkz = 15918, |
| 15932 | VPDPWSSDZ256mk = 15919, |
| 15933 | VPDPWSSDZ256mkz = 15920, |
| 15934 | VPDPWSSDZ256r = 15921, |
| 15935 | VPDPWSSDZ256rk = 15922, |
| 15936 | VPDPWSSDZ256rkz = 15923, |
| 15937 | VPDPWSSDZm = 15924, |
| 15938 | VPDPWSSDZmb = 15925, |
| 15939 | VPDPWSSDZmbk = 15926, |
| 15940 | VPDPWSSDZmbkz = 15927, |
| 15941 | VPDPWSSDZmk = 15928, |
| 15942 | VPDPWSSDZmkz = 15929, |
| 15943 | VPDPWSSDZr = 15930, |
| 15944 | VPDPWSSDZrk = 15931, |
| 15945 | VPDPWSSDZrkz = 15932, |
| 15946 | VPDPWSSDrm = 15933, |
| 15947 | VPDPWSSDrr = 15934, |
| 15948 | VPDPWSUDSYrm = 15935, |
| 15949 | VPDPWSUDSYrr = 15936, |
| 15950 | VPDPWSUDSZ128m = 15937, |
| 15951 | VPDPWSUDSZ128mb = 15938, |
| 15952 | VPDPWSUDSZ128mbk = 15939, |
| 15953 | VPDPWSUDSZ128mbkz = 15940, |
| 15954 | VPDPWSUDSZ128mk = 15941, |
| 15955 | VPDPWSUDSZ128mkz = 15942, |
| 15956 | VPDPWSUDSZ128r = 15943, |
| 15957 | VPDPWSUDSZ128rk = 15944, |
| 15958 | VPDPWSUDSZ128rkz = 15945, |
| 15959 | VPDPWSUDSZ256m = 15946, |
| 15960 | VPDPWSUDSZ256mb = 15947, |
| 15961 | VPDPWSUDSZ256mbk = 15948, |
| 15962 | VPDPWSUDSZ256mbkz = 15949, |
| 15963 | VPDPWSUDSZ256mk = 15950, |
| 15964 | VPDPWSUDSZ256mkz = 15951, |
| 15965 | VPDPWSUDSZ256r = 15952, |
| 15966 | VPDPWSUDSZ256rk = 15953, |
| 15967 | VPDPWSUDSZ256rkz = 15954, |
| 15968 | VPDPWSUDSZm = 15955, |
| 15969 | VPDPWSUDSZmb = 15956, |
| 15970 | VPDPWSUDSZmbk = 15957, |
| 15971 | VPDPWSUDSZmbkz = 15958, |
| 15972 | VPDPWSUDSZmk = 15959, |
| 15973 | VPDPWSUDSZmkz = 15960, |
| 15974 | VPDPWSUDSZr = 15961, |
| 15975 | VPDPWSUDSZrk = 15962, |
| 15976 | VPDPWSUDSZrkz = 15963, |
| 15977 | VPDPWSUDSrm = 15964, |
| 15978 | VPDPWSUDSrr = 15965, |
| 15979 | VPDPWSUDYrm = 15966, |
| 15980 | VPDPWSUDYrr = 15967, |
| 15981 | VPDPWSUDZ128m = 15968, |
| 15982 | VPDPWSUDZ128mb = 15969, |
| 15983 | VPDPWSUDZ128mbk = 15970, |
| 15984 | VPDPWSUDZ128mbkz = 15971, |
| 15985 | VPDPWSUDZ128mk = 15972, |
| 15986 | VPDPWSUDZ128mkz = 15973, |
| 15987 | VPDPWSUDZ128r = 15974, |
| 15988 | VPDPWSUDZ128rk = 15975, |
| 15989 | VPDPWSUDZ128rkz = 15976, |
| 15990 | VPDPWSUDZ256m = 15977, |
| 15991 | VPDPWSUDZ256mb = 15978, |
| 15992 | VPDPWSUDZ256mbk = 15979, |
| 15993 | VPDPWSUDZ256mbkz = 15980, |
| 15994 | VPDPWSUDZ256mk = 15981, |
| 15995 | VPDPWSUDZ256mkz = 15982, |
| 15996 | VPDPWSUDZ256r = 15983, |
| 15997 | VPDPWSUDZ256rk = 15984, |
| 15998 | VPDPWSUDZ256rkz = 15985, |
| 15999 | VPDPWSUDZm = 15986, |
| 16000 | VPDPWSUDZmb = 15987, |
| 16001 | VPDPWSUDZmbk = 15988, |
| 16002 | VPDPWSUDZmbkz = 15989, |
| 16003 | VPDPWSUDZmk = 15990, |
| 16004 | VPDPWSUDZmkz = 15991, |
| 16005 | VPDPWSUDZr = 15992, |
| 16006 | VPDPWSUDZrk = 15993, |
| 16007 | VPDPWSUDZrkz = 15994, |
| 16008 | VPDPWSUDrm = 15995, |
| 16009 | VPDPWSUDrr = 15996, |
| 16010 | VPDPWUSDSYrm = 15997, |
| 16011 | VPDPWUSDSYrr = 15998, |
| 16012 | VPDPWUSDSZ128m = 15999, |
| 16013 | VPDPWUSDSZ128mb = 16000, |
| 16014 | VPDPWUSDSZ128mbk = 16001, |
| 16015 | VPDPWUSDSZ128mbkz = 16002, |
| 16016 | VPDPWUSDSZ128mk = 16003, |
| 16017 | VPDPWUSDSZ128mkz = 16004, |
| 16018 | VPDPWUSDSZ128r = 16005, |
| 16019 | VPDPWUSDSZ128rk = 16006, |
| 16020 | VPDPWUSDSZ128rkz = 16007, |
| 16021 | VPDPWUSDSZ256m = 16008, |
| 16022 | VPDPWUSDSZ256mb = 16009, |
| 16023 | VPDPWUSDSZ256mbk = 16010, |
| 16024 | VPDPWUSDSZ256mbkz = 16011, |
| 16025 | VPDPWUSDSZ256mk = 16012, |
| 16026 | VPDPWUSDSZ256mkz = 16013, |
| 16027 | VPDPWUSDSZ256r = 16014, |
| 16028 | VPDPWUSDSZ256rk = 16015, |
| 16029 | VPDPWUSDSZ256rkz = 16016, |
| 16030 | VPDPWUSDSZm = 16017, |
| 16031 | VPDPWUSDSZmb = 16018, |
| 16032 | VPDPWUSDSZmbk = 16019, |
| 16033 | VPDPWUSDSZmbkz = 16020, |
| 16034 | VPDPWUSDSZmk = 16021, |
| 16035 | VPDPWUSDSZmkz = 16022, |
| 16036 | VPDPWUSDSZr = 16023, |
| 16037 | VPDPWUSDSZrk = 16024, |
| 16038 | VPDPWUSDSZrkz = 16025, |
| 16039 | VPDPWUSDSrm = 16026, |
| 16040 | VPDPWUSDSrr = 16027, |
| 16041 | VPDPWUSDYrm = 16028, |
| 16042 | VPDPWUSDYrr = 16029, |
| 16043 | VPDPWUSDZ128m = 16030, |
| 16044 | VPDPWUSDZ128mb = 16031, |
| 16045 | VPDPWUSDZ128mbk = 16032, |
| 16046 | VPDPWUSDZ128mbkz = 16033, |
| 16047 | VPDPWUSDZ128mk = 16034, |
| 16048 | VPDPWUSDZ128mkz = 16035, |
| 16049 | VPDPWUSDZ128r = 16036, |
| 16050 | VPDPWUSDZ128rk = 16037, |
| 16051 | VPDPWUSDZ128rkz = 16038, |
| 16052 | VPDPWUSDZ256m = 16039, |
| 16053 | VPDPWUSDZ256mb = 16040, |
| 16054 | VPDPWUSDZ256mbk = 16041, |
| 16055 | VPDPWUSDZ256mbkz = 16042, |
| 16056 | VPDPWUSDZ256mk = 16043, |
| 16057 | VPDPWUSDZ256mkz = 16044, |
| 16058 | VPDPWUSDZ256r = 16045, |
| 16059 | VPDPWUSDZ256rk = 16046, |
| 16060 | VPDPWUSDZ256rkz = 16047, |
| 16061 | VPDPWUSDZm = 16048, |
| 16062 | VPDPWUSDZmb = 16049, |
| 16063 | VPDPWUSDZmbk = 16050, |
| 16064 | VPDPWUSDZmbkz = 16051, |
| 16065 | VPDPWUSDZmk = 16052, |
| 16066 | VPDPWUSDZmkz = 16053, |
| 16067 | VPDPWUSDZr = 16054, |
| 16068 | VPDPWUSDZrk = 16055, |
| 16069 | VPDPWUSDZrkz = 16056, |
| 16070 | VPDPWUSDrm = 16057, |
| 16071 | VPDPWUSDrr = 16058, |
| 16072 | VPDPWUUDSYrm = 16059, |
| 16073 | VPDPWUUDSYrr = 16060, |
| 16074 | VPDPWUUDSZ128m = 16061, |
| 16075 | VPDPWUUDSZ128mb = 16062, |
| 16076 | VPDPWUUDSZ128mbk = 16063, |
| 16077 | VPDPWUUDSZ128mbkz = 16064, |
| 16078 | VPDPWUUDSZ128mk = 16065, |
| 16079 | VPDPWUUDSZ128mkz = 16066, |
| 16080 | VPDPWUUDSZ128r = 16067, |
| 16081 | VPDPWUUDSZ128rk = 16068, |
| 16082 | VPDPWUUDSZ128rkz = 16069, |
| 16083 | VPDPWUUDSZ256m = 16070, |
| 16084 | VPDPWUUDSZ256mb = 16071, |
| 16085 | VPDPWUUDSZ256mbk = 16072, |
| 16086 | VPDPWUUDSZ256mbkz = 16073, |
| 16087 | VPDPWUUDSZ256mk = 16074, |
| 16088 | VPDPWUUDSZ256mkz = 16075, |
| 16089 | VPDPWUUDSZ256r = 16076, |
| 16090 | VPDPWUUDSZ256rk = 16077, |
| 16091 | VPDPWUUDSZ256rkz = 16078, |
| 16092 | VPDPWUUDSZm = 16079, |
| 16093 | VPDPWUUDSZmb = 16080, |
| 16094 | VPDPWUUDSZmbk = 16081, |
| 16095 | VPDPWUUDSZmbkz = 16082, |
| 16096 | VPDPWUUDSZmk = 16083, |
| 16097 | VPDPWUUDSZmkz = 16084, |
| 16098 | VPDPWUUDSZr = 16085, |
| 16099 | VPDPWUUDSZrk = 16086, |
| 16100 | VPDPWUUDSZrkz = 16087, |
| 16101 | VPDPWUUDSrm = 16088, |
| 16102 | VPDPWUUDSrr = 16089, |
| 16103 | VPDPWUUDYrm = 16090, |
| 16104 | VPDPWUUDYrr = 16091, |
| 16105 | VPDPWUUDZ128m = 16092, |
| 16106 | VPDPWUUDZ128mb = 16093, |
| 16107 | VPDPWUUDZ128mbk = 16094, |
| 16108 | VPDPWUUDZ128mbkz = 16095, |
| 16109 | VPDPWUUDZ128mk = 16096, |
| 16110 | VPDPWUUDZ128mkz = 16097, |
| 16111 | VPDPWUUDZ128r = 16098, |
| 16112 | VPDPWUUDZ128rk = 16099, |
| 16113 | VPDPWUUDZ128rkz = 16100, |
| 16114 | VPDPWUUDZ256m = 16101, |
| 16115 | VPDPWUUDZ256mb = 16102, |
| 16116 | VPDPWUUDZ256mbk = 16103, |
| 16117 | VPDPWUUDZ256mbkz = 16104, |
| 16118 | VPDPWUUDZ256mk = 16105, |
| 16119 | VPDPWUUDZ256mkz = 16106, |
| 16120 | VPDPWUUDZ256r = 16107, |
| 16121 | VPDPWUUDZ256rk = 16108, |
| 16122 | VPDPWUUDZ256rkz = 16109, |
| 16123 | VPDPWUUDZm = 16110, |
| 16124 | VPDPWUUDZmb = 16111, |
| 16125 | VPDPWUUDZmbk = 16112, |
| 16126 | VPDPWUUDZmbkz = 16113, |
| 16127 | VPDPWUUDZmk = 16114, |
| 16128 | VPDPWUUDZmkz = 16115, |
| 16129 | VPDPWUUDZr = 16116, |
| 16130 | VPDPWUUDZrk = 16117, |
| 16131 | VPDPWUUDZrkz = 16118, |
| 16132 | VPDPWUUDrm = 16119, |
| 16133 | VPDPWUUDrr = 16120, |
| 16134 | VPERM2F128rmi = 16121, |
| 16135 | VPERM2F128rri = 16122, |
| 16136 | VPERM2I128rmi = 16123, |
| 16137 | VPERM2I128rri = 16124, |
| 16138 | VPERMBZ128rm = 16125, |
| 16139 | VPERMBZ128rmk = 16126, |
| 16140 | VPERMBZ128rmkz = 16127, |
| 16141 | VPERMBZ128rr = 16128, |
| 16142 | VPERMBZ128rrk = 16129, |
| 16143 | VPERMBZ128rrkz = 16130, |
| 16144 | VPERMBZ256rm = 16131, |
| 16145 | VPERMBZ256rmk = 16132, |
| 16146 | VPERMBZ256rmkz = 16133, |
| 16147 | VPERMBZ256rr = 16134, |
| 16148 | VPERMBZ256rrk = 16135, |
| 16149 | VPERMBZ256rrkz = 16136, |
| 16150 | VPERMBZrm = 16137, |
| 16151 | VPERMBZrmk = 16138, |
| 16152 | VPERMBZrmkz = 16139, |
| 16153 | VPERMBZrr = 16140, |
| 16154 | VPERMBZrrk = 16141, |
| 16155 | VPERMBZrrkz = 16142, |
| 16156 | VPERMDYrm = 16143, |
| 16157 | VPERMDYrr = 16144, |
| 16158 | VPERMDZ256rm = 16145, |
| 16159 | VPERMDZ256rmb = 16146, |
| 16160 | VPERMDZ256rmbk = 16147, |
| 16161 | VPERMDZ256rmbkz = 16148, |
| 16162 | VPERMDZ256rmk = 16149, |
| 16163 | VPERMDZ256rmkz = 16150, |
| 16164 | VPERMDZ256rr = 16151, |
| 16165 | VPERMDZ256rrk = 16152, |
| 16166 | VPERMDZ256rrkz = 16153, |
| 16167 | VPERMDZrm = 16154, |
| 16168 | VPERMDZrmb = 16155, |
| 16169 | VPERMDZrmbk = 16156, |
| 16170 | VPERMDZrmbkz = 16157, |
| 16171 | VPERMDZrmk = 16158, |
| 16172 | VPERMDZrmkz = 16159, |
| 16173 | VPERMDZrr = 16160, |
| 16174 | VPERMDZrrk = 16161, |
| 16175 | VPERMDZrrkz = 16162, |
| 16176 | VPERMI2BZ128rm = 16163, |
| 16177 | VPERMI2BZ128rmk = 16164, |
| 16178 | VPERMI2BZ128rmkz = 16165, |
| 16179 | VPERMI2BZ128rr = 16166, |
| 16180 | VPERMI2BZ128rrk = 16167, |
| 16181 | VPERMI2BZ128rrkz = 16168, |
| 16182 | VPERMI2BZ256rm = 16169, |
| 16183 | VPERMI2BZ256rmk = 16170, |
| 16184 | VPERMI2BZ256rmkz = 16171, |
| 16185 | VPERMI2BZ256rr = 16172, |
| 16186 | VPERMI2BZ256rrk = 16173, |
| 16187 | VPERMI2BZ256rrkz = 16174, |
| 16188 | VPERMI2BZrm = 16175, |
| 16189 | VPERMI2BZrmk = 16176, |
| 16190 | VPERMI2BZrmkz = 16177, |
| 16191 | VPERMI2BZrr = 16178, |
| 16192 | VPERMI2BZrrk = 16179, |
| 16193 | VPERMI2BZrrkz = 16180, |
| 16194 | VPERMI2DZ128rm = 16181, |
| 16195 | VPERMI2DZ128rmb = 16182, |
| 16196 | VPERMI2DZ128rmbk = 16183, |
| 16197 | VPERMI2DZ128rmbkz = 16184, |
| 16198 | VPERMI2DZ128rmk = 16185, |
| 16199 | VPERMI2DZ128rmkz = 16186, |
| 16200 | VPERMI2DZ128rr = 16187, |
| 16201 | VPERMI2DZ128rrk = 16188, |
| 16202 | VPERMI2DZ128rrkz = 16189, |
| 16203 | VPERMI2DZ256rm = 16190, |
| 16204 | VPERMI2DZ256rmb = 16191, |
| 16205 | VPERMI2DZ256rmbk = 16192, |
| 16206 | VPERMI2DZ256rmbkz = 16193, |
| 16207 | VPERMI2DZ256rmk = 16194, |
| 16208 | VPERMI2DZ256rmkz = 16195, |
| 16209 | VPERMI2DZ256rr = 16196, |
| 16210 | VPERMI2DZ256rrk = 16197, |
| 16211 | VPERMI2DZ256rrkz = 16198, |
| 16212 | VPERMI2DZrm = 16199, |
| 16213 | VPERMI2DZrmb = 16200, |
| 16214 | VPERMI2DZrmbk = 16201, |
| 16215 | VPERMI2DZrmbkz = 16202, |
| 16216 | VPERMI2DZrmk = 16203, |
| 16217 | VPERMI2DZrmkz = 16204, |
| 16218 | VPERMI2DZrr = 16205, |
| 16219 | VPERMI2DZrrk = 16206, |
| 16220 | VPERMI2DZrrkz = 16207, |
| 16221 | VPERMI2PDZ128rm = 16208, |
| 16222 | VPERMI2PDZ128rmb = 16209, |
| 16223 | VPERMI2PDZ128rmbk = 16210, |
| 16224 | VPERMI2PDZ128rmbkz = 16211, |
| 16225 | VPERMI2PDZ128rmk = 16212, |
| 16226 | VPERMI2PDZ128rmkz = 16213, |
| 16227 | VPERMI2PDZ128rr = 16214, |
| 16228 | VPERMI2PDZ128rrk = 16215, |
| 16229 | VPERMI2PDZ128rrkz = 16216, |
| 16230 | VPERMI2PDZ256rm = 16217, |
| 16231 | VPERMI2PDZ256rmb = 16218, |
| 16232 | VPERMI2PDZ256rmbk = 16219, |
| 16233 | VPERMI2PDZ256rmbkz = 16220, |
| 16234 | VPERMI2PDZ256rmk = 16221, |
| 16235 | VPERMI2PDZ256rmkz = 16222, |
| 16236 | VPERMI2PDZ256rr = 16223, |
| 16237 | VPERMI2PDZ256rrk = 16224, |
| 16238 | VPERMI2PDZ256rrkz = 16225, |
| 16239 | VPERMI2PDZrm = 16226, |
| 16240 | VPERMI2PDZrmb = 16227, |
| 16241 | VPERMI2PDZrmbk = 16228, |
| 16242 | VPERMI2PDZrmbkz = 16229, |
| 16243 | VPERMI2PDZrmk = 16230, |
| 16244 | VPERMI2PDZrmkz = 16231, |
| 16245 | VPERMI2PDZrr = 16232, |
| 16246 | VPERMI2PDZrrk = 16233, |
| 16247 | VPERMI2PDZrrkz = 16234, |
| 16248 | VPERMI2PSZ128rm = 16235, |
| 16249 | VPERMI2PSZ128rmb = 16236, |
| 16250 | VPERMI2PSZ128rmbk = 16237, |
| 16251 | VPERMI2PSZ128rmbkz = 16238, |
| 16252 | VPERMI2PSZ128rmk = 16239, |
| 16253 | VPERMI2PSZ128rmkz = 16240, |
| 16254 | VPERMI2PSZ128rr = 16241, |
| 16255 | VPERMI2PSZ128rrk = 16242, |
| 16256 | VPERMI2PSZ128rrkz = 16243, |
| 16257 | VPERMI2PSZ256rm = 16244, |
| 16258 | VPERMI2PSZ256rmb = 16245, |
| 16259 | VPERMI2PSZ256rmbk = 16246, |
| 16260 | VPERMI2PSZ256rmbkz = 16247, |
| 16261 | VPERMI2PSZ256rmk = 16248, |
| 16262 | VPERMI2PSZ256rmkz = 16249, |
| 16263 | VPERMI2PSZ256rr = 16250, |
| 16264 | VPERMI2PSZ256rrk = 16251, |
| 16265 | VPERMI2PSZ256rrkz = 16252, |
| 16266 | VPERMI2PSZrm = 16253, |
| 16267 | VPERMI2PSZrmb = 16254, |
| 16268 | VPERMI2PSZrmbk = 16255, |
| 16269 | VPERMI2PSZrmbkz = 16256, |
| 16270 | VPERMI2PSZrmk = 16257, |
| 16271 | VPERMI2PSZrmkz = 16258, |
| 16272 | VPERMI2PSZrr = 16259, |
| 16273 | VPERMI2PSZrrk = 16260, |
| 16274 | VPERMI2PSZrrkz = 16261, |
| 16275 | VPERMI2QZ128rm = 16262, |
| 16276 | VPERMI2QZ128rmb = 16263, |
| 16277 | VPERMI2QZ128rmbk = 16264, |
| 16278 | VPERMI2QZ128rmbkz = 16265, |
| 16279 | VPERMI2QZ128rmk = 16266, |
| 16280 | VPERMI2QZ128rmkz = 16267, |
| 16281 | VPERMI2QZ128rr = 16268, |
| 16282 | VPERMI2QZ128rrk = 16269, |
| 16283 | VPERMI2QZ128rrkz = 16270, |
| 16284 | VPERMI2QZ256rm = 16271, |
| 16285 | VPERMI2QZ256rmb = 16272, |
| 16286 | VPERMI2QZ256rmbk = 16273, |
| 16287 | VPERMI2QZ256rmbkz = 16274, |
| 16288 | VPERMI2QZ256rmk = 16275, |
| 16289 | VPERMI2QZ256rmkz = 16276, |
| 16290 | VPERMI2QZ256rr = 16277, |
| 16291 | VPERMI2QZ256rrk = 16278, |
| 16292 | VPERMI2QZ256rrkz = 16279, |
| 16293 | VPERMI2QZrm = 16280, |
| 16294 | VPERMI2QZrmb = 16281, |
| 16295 | VPERMI2QZrmbk = 16282, |
| 16296 | VPERMI2QZrmbkz = 16283, |
| 16297 | VPERMI2QZrmk = 16284, |
| 16298 | VPERMI2QZrmkz = 16285, |
| 16299 | VPERMI2QZrr = 16286, |
| 16300 | VPERMI2QZrrk = 16287, |
| 16301 | VPERMI2QZrrkz = 16288, |
| 16302 | VPERMI2WZ128rm = 16289, |
| 16303 | VPERMI2WZ128rmk = 16290, |
| 16304 | VPERMI2WZ128rmkz = 16291, |
| 16305 | VPERMI2WZ128rr = 16292, |
| 16306 | VPERMI2WZ128rrk = 16293, |
| 16307 | VPERMI2WZ128rrkz = 16294, |
| 16308 | VPERMI2WZ256rm = 16295, |
| 16309 | VPERMI2WZ256rmk = 16296, |
| 16310 | VPERMI2WZ256rmkz = 16297, |
| 16311 | VPERMI2WZ256rr = 16298, |
| 16312 | VPERMI2WZ256rrk = 16299, |
| 16313 | VPERMI2WZ256rrkz = 16300, |
| 16314 | VPERMI2WZrm = 16301, |
| 16315 | VPERMI2WZrmk = 16302, |
| 16316 | VPERMI2WZrmkz = 16303, |
| 16317 | VPERMI2WZrr = 16304, |
| 16318 | VPERMI2WZrrk = 16305, |
| 16319 | VPERMI2WZrrkz = 16306, |
| 16320 | VPERMIL2PDYmr = 16307, |
| 16321 | VPERMIL2PDYrm = 16308, |
| 16322 | VPERMIL2PDYrr = 16309, |
| 16323 | VPERMIL2PDYrr_REV = 16310, |
| 16324 | VPERMIL2PDmr = 16311, |
| 16325 | VPERMIL2PDrm = 16312, |
| 16326 | VPERMIL2PDrr = 16313, |
| 16327 | VPERMIL2PDrr_REV = 16314, |
| 16328 | VPERMIL2PSYmr = 16315, |
| 16329 | VPERMIL2PSYrm = 16316, |
| 16330 | VPERMIL2PSYrr = 16317, |
| 16331 | VPERMIL2PSYrr_REV = 16318, |
| 16332 | VPERMIL2PSmr = 16319, |
| 16333 | VPERMIL2PSrm = 16320, |
| 16334 | VPERMIL2PSrr = 16321, |
| 16335 | VPERMIL2PSrr_REV = 16322, |
| 16336 | VPERMILPDYmi = 16323, |
| 16337 | VPERMILPDYri = 16324, |
| 16338 | VPERMILPDYrm = 16325, |
| 16339 | VPERMILPDYrr = 16326, |
| 16340 | VPERMILPDZ128mbi = 16327, |
| 16341 | VPERMILPDZ128mbik = 16328, |
| 16342 | VPERMILPDZ128mbikz = 16329, |
| 16343 | VPERMILPDZ128mi = 16330, |
| 16344 | VPERMILPDZ128mik = 16331, |
| 16345 | VPERMILPDZ128mikz = 16332, |
| 16346 | VPERMILPDZ128ri = 16333, |
| 16347 | VPERMILPDZ128rik = 16334, |
| 16348 | VPERMILPDZ128rikz = 16335, |
| 16349 | VPERMILPDZ128rm = 16336, |
| 16350 | VPERMILPDZ128rmb = 16337, |
| 16351 | VPERMILPDZ128rmbk = 16338, |
| 16352 | VPERMILPDZ128rmbkz = 16339, |
| 16353 | VPERMILPDZ128rmk = 16340, |
| 16354 | VPERMILPDZ128rmkz = 16341, |
| 16355 | VPERMILPDZ128rr = 16342, |
| 16356 | VPERMILPDZ128rrk = 16343, |
| 16357 | VPERMILPDZ128rrkz = 16344, |
| 16358 | VPERMILPDZ256mbi = 16345, |
| 16359 | VPERMILPDZ256mbik = 16346, |
| 16360 | VPERMILPDZ256mbikz = 16347, |
| 16361 | VPERMILPDZ256mi = 16348, |
| 16362 | VPERMILPDZ256mik = 16349, |
| 16363 | VPERMILPDZ256mikz = 16350, |
| 16364 | VPERMILPDZ256ri = 16351, |
| 16365 | VPERMILPDZ256rik = 16352, |
| 16366 | VPERMILPDZ256rikz = 16353, |
| 16367 | VPERMILPDZ256rm = 16354, |
| 16368 | VPERMILPDZ256rmb = 16355, |
| 16369 | VPERMILPDZ256rmbk = 16356, |
| 16370 | VPERMILPDZ256rmbkz = 16357, |
| 16371 | VPERMILPDZ256rmk = 16358, |
| 16372 | VPERMILPDZ256rmkz = 16359, |
| 16373 | VPERMILPDZ256rr = 16360, |
| 16374 | VPERMILPDZ256rrk = 16361, |
| 16375 | VPERMILPDZ256rrkz = 16362, |
| 16376 | VPERMILPDZmbi = 16363, |
| 16377 | VPERMILPDZmbik = 16364, |
| 16378 | VPERMILPDZmbikz = 16365, |
| 16379 | VPERMILPDZmi = 16366, |
| 16380 | VPERMILPDZmik = 16367, |
| 16381 | VPERMILPDZmikz = 16368, |
| 16382 | VPERMILPDZri = 16369, |
| 16383 | VPERMILPDZrik = 16370, |
| 16384 | VPERMILPDZrikz = 16371, |
| 16385 | VPERMILPDZrm = 16372, |
| 16386 | VPERMILPDZrmb = 16373, |
| 16387 | VPERMILPDZrmbk = 16374, |
| 16388 | VPERMILPDZrmbkz = 16375, |
| 16389 | VPERMILPDZrmk = 16376, |
| 16390 | VPERMILPDZrmkz = 16377, |
| 16391 | VPERMILPDZrr = 16378, |
| 16392 | VPERMILPDZrrk = 16379, |
| 16393 | VPERMILPDZrrkz = 16380, |
| 16394 | VPERMILPDmi = 16381, |
| 16395 | VPERMILPDri = 16382, |
| 16396 | VPERMILPDrm = 16383, |
| 16397 | VPERMILPDrr = 16384, |
| 16398 | VPERMILPSYmi = 16385, |
| 16399 | VPERMILPSYri = 16386, |
| 16400 | VPERMILPSYrm = 16387, |
| 16401 | VPERMILPSYrr = 16388, |
| 16402 | VPERMILPSZ128mbi = 16389, |
| 16403 | VPERMILPSZ128mbik = 16390, |
| 16404 | VPERMILPSZ128mbikz = 16391, |
| 16405 | VPERMILPSZ128mi = 16392, |
| 16406 | VPERMILPSZ128mik = 16393, |
| 16407 | VPERMILPSZ128mikz = 16394, |
| 16408 | VPERMILPSZ128ri = 16395, |
| 16409 | VPERMILPSZ128rik = 16396, |
| 16410 | VPERMILPSZ128rikz = 16397, |
| 16411 | VPERMILPSZ128rm = 16398, |
| 16412 | VPERMILPSZ128rmb = 16399, |
| 16413 | VPERMILPSZ128rmbk = 16400, |
| 16414 | VPERMILPSZ128rmbkz = 16401, |
| 16415 | VPERMILPSZ128rmk = 16402, |
| 16416 | VPERMILPSZ128rmkz = 16403, |
| 16417 | VPERMILPSZ128rr = 16404, |
| 16418 | VPERMILPSZ128rrk = 16405, |
| 16419 | VPERMILPSZ128rrkz = 16406, |
| 16420 | VPERMILPSZ256mbi = 16407, |
| 16421 | VPERMILPSZ256mbik = 16408, |
| 16422 | VPERMILPSZ256mbikz = 16409, |
| 16423 | VPERMILPSZ256mi = 16410, |
| 16424 | VPERMILPSZ256mik = 16411, |
| 16425 | VPERMILPSZ256mikz = 16412, |
| 16426 | VPERMILPSZ256ri = 16413, |
| 16427 | VPERMILPSZ256rik = 16414, |
| 16428 | VPERMILPSZ256rikz = 16415, |
| 16429 | VPERMILPSZ256rm = 16416, |
| 16430 | VPERMILPSZ256rmb = 16417, |
| 16431 | VPERMILPSZ256rmbk = 16418, |
| 16432 | VPERMILPSZ256rmbkz = 16419, |
| 16433 | VPERMILPSZ256rmk = 16420, |
| 16434 | VPERMILPSZ256rmkz = 16421, |
| 16435 | VPERMILPSZ256rr = 16422, |
| 16436 | VPERMILPSZ256rrk = 16423, |
| 16437 | VPERMILPSZ256rrkz = 16424, |
| 16438 | VPERMILPSZmbi = 16425, |
| 16439 | VPERMILPSZmbik = 16426, |
| 16440 | VPERMILPSZmbikz = 16427, |
| 16441 | VPERMILPSZmi = 16428, |
| 16442 | VPERMILPSZmik = 16429, |
| 16443 | VPERMILPSZmikz = 16430, |
| 16444 | VPERMILPSZri = 16431, |
| 16445 | VPERMILPSZrik = 16432, |
| 16446 | VPERMILPSZrikz = 16433, |
| 16447 | VPERMILPSZrm = 16434, |
| 16448 | VPERMILPSZrmb = 16435, |
| 16449 | VPERMILPSZrmbk = 16436, |
| 16450 | VPERMILPSZrmbkz = 16437, |
| 16451 | VPERMILPSZrmk = 16438, |
| 16452 | VPERMILPSZrmkz = 16439, |
| 16453 | VPERMILPSZrr = 16440, |
| 16454 | VPERMILPSZrrk = 16441, |
| 16455 | VPERMILPSZrrkz = 16442, |
| 16456 | VPERMILPSmi = 16443, |
| 16457 | VPERMILPSri = 16444, |
| 16458 | VPERMILPSrm = 16445, |
| 16459 | VPERMILPSrr = 16446, |
| 16460 | VPERMPDYmi = 16447, |
| 16461 | VPERMPDYri = 16448, |
| 16462 | VPERMPDZ256mbi = 16449, |
| 16463 | VPERMPDZ256mbik = 16450, |
| 16464 | VPERMPDZ256mbikz = 16451, |
| 16465 | VPERMPDZ256mi = 16452, |
| 16466 | VPERMPDZ256mik = 16453, |
| 16467 | VPERMPDZ256mikz = 16454, |
| 16468 | VPERMPDZ256ri = 16455, |
| 16469 | VPERMPDZ256rik = 16456, |
| 16470 | VPERMPDZ256rikz = 16457, |
| 16471 | VPERMPDZ256rm = 16458, |
| 16472 | VPERMPDZ256rmb = 16459, |
| 16473 | VPERMPDZ256rmbk = 16460, |
| 16474 | VPERMPDZ256rmbkz = 16461, |
| 16475 | VPERMPDZ256rmk = 16462, |
| 16476 | VPERMPDZ256rmkz = 16463, |
| 16477 | VPERMPDZ256rr = 16464, |
| 16478 | VPERMPDZ256rrk = 16465, |
| 16479 | VPERMPDZ256rrkz = 16466, |
| 16480 | VPERMPDZmbi = 16467, |
| 16481 | VPERMPDZmbik = 16468, |
| 16482 | VPERMPDZmbikz = 16469, |
| 16483 | VPERMPDZmi = 16470, |
| 16484 | VPERMPDZmik = 16471, |
| 16485 | VPERMPDZmikz = 16472, |
| 16486 | VPERMPDZri = 16473, |
| 16487 | VPERMPDZrik = 16474, |
| 16488 | VPERMPDZrikz = 16475, |
| 16489 | VPERMPDZrm = 16476, |
| 16490 | VPERMPDZrmb = 16477, |
| 16491 | VPERMPDZrmbk = 16478, |
| 16492 | VPERMPDZrmbkz = 16479, |
| 16493 | VPERMPDZrmk = 16480, |
| 16494 | VPERMPDZrmkz = 16481, |
| 16495 | VPERMPDZrr = 16482, |
| 16496 | VPERMPDZrrk = 16483, |
| 16497 | VPERMPDZrrkz = 16484, |
| 16498 | VPERMPSYrm = 16485, |
| 16499 | VPERMPSYrr = 16486, |
| 16500 | VPERMPSZ256rm = 16487, |
| 16501 | VPERMPSZ256rmb = 16488, |
| 16502 | VPERMPSZ256rmbk = 16489, |
| 16503 | VPERMPSZ256rmbkz = 16490, |
| 16504 | VPERMPSZ256rmk = 16491, |
| 16505 | VPERMPSZ256rmkz = 16492, |
| 16506 | VPERMPSZ256rr = 16493, |
| 16507 | VPERMPSZ256rrk = 16494, |
| 16508 | VPERMPSZ256rrkz = 16495, |
| 16509 | VPERMPSZrm = 16496, |
| 16510 | VPERMPSZrmb = 16497, |
| 16511 | VPERMPSZrmbk = 16498, |
| 16512 | VPERMPSZrmbkz = 16499, |
| 16513 | VPERMPSZrmk = 16500, |
| 16514 | VPERMPSZrmkz = 16501, |
| 16515 | VPERMPSZrr = 16502, |
| 16516 | VPERMPSZrrk = 16503, |
| 16517 | VPERMPSZrrkz = 16504, |
| 16518 | VPERMQYmi = 16505, |
| 16519 | VPERMQYri = 16506, |
| 16520 | VPERMQZ256mbi = 16507, |
| 16521 | VPERMQZ256mbik = 16508, |
| 16522 | VPERMQZ256mbikz = 16509, |
| 16523 | VPERMQZ256mi = 16510, |
| 16524 | VPERMQZ256mik = 16511, |
| 16525 | VPERMQZ256mikz = 16512, |
| 16526 | VPERMQZ256ri = 16513, |
| 16527 | VPERMQZ256rik = 16514, |
| 16528 | VPERMQZ256rikz = 16515, |
| 16529 | VPERMQZ256rm = 16516, |
| 16530 | VPERMQZ256rmb = 16517, |
| 16531 | VPERMQZ256rmbk = 16518, |
| 16532 | VPERMQZ256rmbkz = 16519, |
| 16533 | VPERMQZ256rmk = 16520, |
| 16534 | VPERMQZ256rmkz = 16521, |
| 16535 | VPERMQZ256rr = 16522, |
| 16536 | VPERMQZ256rrk = 16523, |
| 16537 | VPERMQZ256rrkz = 16524, |
| 16538 | VPERMQZmbi = 16525, |
| 16539 | VPERMQZmbik = 16526, |
| 16540 | VPERMQZmbikz = 16527, |
| 16541 | VPERMQZmi = 16528, |
| 16542 | VPERMQZmik = 16529, |
| 16543 | VPERMQZmikz = 16530, |
| 16544 | VPERMQZri = 16531, |
| 16545 | VPERMQZrik = 16532, |
| 16546 | VPERMQZrikz = 16533, |
| 16547 | VPERMQZrm = 16534, |
| 16548 | VPERMQZrmb = 16535, |
| 16549 | VPERMQZrmbk = 16536, |
| 16550 | VPERMQZrmbkz = 16537, |
| 16551 | VPERMQZrmk = 16538, |
| 16552 | VPERMQZrmkz = 16539, |
| 16553 | VPERMQZrr = 16540, |
| 16554 | VPERMQZrrk = 16541, |
| 16555 | VPERMQZrrkz = 16542, |
| 16556 | VPERMT2BZ128rm = 16543, |
| 16557 | VPERMT2BZ128rmk = 16544, |
| 16558 | VPERMT2BZ128rmkz = 16545, |
| 16559 | VPERMT2BZ128rr = 16546, |
| 16560 | VPERMT2BZ128rrk = 16547, |
| 16561 | VPERMT2BZ128rrkz = 16548, |
| 16562 | VPERMT2BZ256rm = 16549, |
| 16563 | VPERMT2BZ256rmk = 16550, |
| 16564 | VPERMT2BZ256rmkz = 16551, |
| 16565 | VPERMT2BZ256rr = 16552, |
| 16566 | VPERMT2BZ256rrk = 16553, |
| 16567 | VPERMT2BZ256rrkz = 16554, |
| 16568 | VPERMT2BZrm = 16555, |
| 16569 | VPERMT2BZrmk = 16556, |
| 16570 | VPERMT2BZrmkz = 16557, |
| 16571 | VPERMT2BZrr = 16558, |
| 16572 | VPERMT2BZrrk = 16559, |
| 16573 | VPERMT2BZrrkz = 16560, |
| 16574 | VPERMT2DZ128rm = 16561, |
| 16575 | VPERMT2DZ128rmb = 16562, |
| 16576 | VPERMT2DZ128rmbk = 16563, |
| 16577 | VPERMT2DZ128rmbkz = 16564, |
| 16578 | VPERMT2DZ128rmk = 16565, |
| 16579 | VPERMT2DZ128rmkz = 16566, |
| 16580 | VPERMT2DZ128rr = 16567, |
| 16581 | VPERMT2DZ128rrk = 16568, |
| 16582 | VPERMT2DZ128rrkz = 16569, |
| 16583 | VPERMT2DZ256rm = 16570, |
| 16584 | VPERMT2DZ256rmb = 16571, |
| 16585 | VPERMT2DZ256rmbk = 16572, |
| 16586 | VPERMT2DZ256rmbkz = 16573, |
| 16587 | VPERMT2DZ256rmk = 16574, |
| 16588 | VPERMT2DZ256rmkz = 16575, |
| 16589 | VPERMT2DZ256rr = 16576, |
| 16590 | VPERMT2DZ256rrk = 16577, |
| 16591 | VPERMT2DZ256rrkz = 16578, |
| 16592 | VPERMT2DZrm = 16579, |
| 16593 | VPERMT2DZrmb = 16580, |
| 16594 | VPERMT2DZrmbk = 16581, |
| 16595 | VPERMT2DZrmbkz = 16582, |
| 16596 | VPERMT2DZrmk = 16583, |
| 16597 | VPERMT2DZrmkz = 16584, |
| 16598 | VPERMT2DZrr = 16585, |
| 16599 | VPERMT2DZrrk = 16586, |
| 16600 | VPERMT2DZrrkz = 16587, |
| 16601 | VPERMT2PDZ128rm = 16588, |
| 16602 | VPERMT2PDZ128rmb = 16589, |
| 16603 | VPERMT2PDZ128rmbk = 16590, |
| 16604 | VPERMT2PDZ128rmbkz = 16591, |
| 16605 | VPERMT2PDZ128rmk = 16592, |
| 16606 | VPERMT2PDZ128rmkz = 16593, |
| 16607 | VPERMT2PDZ128rr = 16594, |
| 16608 | VPERMT2PDZ128rrk = 16595, |
| 16609 | VPERMT2PDZ128rrkz = 16596, |
| 16610 | VPERMT2PDZ256rm = 16597, |
| 16611 | VPERMT2PDZ256rmb = 16598, |
| 16612 | VPERMT2PDZ256rmbk = 16599, |
| 16613 | VPERMT2PDZ256rmbkz = 16600, |
| 16614 | VPERMT2PDZ256rmk = 16601, |
| 16615 | VPERMT2PDZ256rmkz = 16602, |
| 16616 | VPERMT2PDZ256rr = 16603, |
| 16617 | VPERMT2PDZ256rrk = 16604, |
| 16618 | VPERMT2PDZ256rrkz = 16605, |
| 16619 | VPERMT2PDZrm = 16606, |
| 16620 | VPERMT2PDZrmb = 16607, |
| 16621 | VPERMT2PDZrmbk = 16608, |
| 16622 | VPERMT2PDZrmbkz = 16609, |
| 16623 | VPERMT2PDZrmk = 16610, |
| 16624 | VPERMT2PDZrmkz = 16611, |
| 16625 | VPERMT2PDZrr = 16612, |
| 16626 | VPERMT2PDZrrk = 16613, |
| 16627 | VPERMT2PDZrrkz = 16614, |
| 16628 | VPERMT2PSZ128rm = 16615, |
| 16629 | VPERMT2PSZ128rmb = 16616, |
| 16630 | VPERMT2PSZ128rmbk = 16617, |
| 16631 | VPERMT2PSZ128rmbkz = 16618, |
| 16632 | VPERMT2PSZ128rmk = 16619, |
| 16633 | VPERMT2PSZ128rmkz = 16620, |
| 16634 | VPERMT2PSZ128rr = 16621, |
| 16635 | VPERMT2PSZ128rrk = 16622, |
| 16636 | VPERMT2PSZ128rrkz = 16623, |
| 16637 | VPERMT2PSZ256rm = 16624, |
| 16638 | VPERMT2PSZ256rmb = 16625, |
| 16639 | VPERMT2PSZ256rmbk = 16626, |
| 16640 | VPERMT2PSZ256rmbkz = 16627, |
| 16641 | VPERMT2PSZ256rmk = 16628, |
| 16642 | VPERMT2PSZ256rmkz = 16629, |
| 16643 | VPERMT2PSZ256rr = 16630, |
| 16644 | VPERMT2PSZ256rrk = 16631, |
| 16645 | VPERMT2PSZ256rrkz = 16632, |
| 16646 | VPERMT2PSZrm = 16633, |
| 16647 | VPERMT2PSZrmb = 16634, |
| 16648 | VPERMT2PSZrmbk = 16635, |
| 16649 | VPERMT2PSZrmbkz = 16636, |
| 16650 | VPERMT2PSZrmk = 16637, |
| 16651 | VPERMT2PSZrmkz = 16638, |
| 16652 | VPERMT2PSZrr = 16639, |
| 16653 | VPERMT2PSZrrk = 16640, |
| 16654 | VPERMT2PSZrrkz = 16641, |
| 16655 | VPERMT2QZ128rm = 16642, |
| 16656 | VPERMT2QZ128rmb = 16643, |
| 16657 | VPERMT2QZ128rmbk = 16644, |
| 16658 | VPERMT2QZ128rmbkz = 16645, |
| 16659 | VPERMT2QZ128rmk = 16646, |
| 16660 | VPERMT2QZ128rmkz = 16647, |
| 16661 | VPERMT2QZ128rr = 16648, |
| 16662 | VPERMT2QZ128rrk = 16649, |
| 16663 | VPERMT2QZ128rrkz = 16650, |
| 16664 | VPERMT2QZ256rm = 16651, |
| 16665 | VPERMT2QZ256rmb = 16652, |
| 16666 | VPERMT2QZ256rmbk = 16653, |
| 16667 | VPERMT2QZ256rmbkz = 16654, |
| 16668 | VPERMT2QZ256rmk = 16655, |
| 16669 | VPERMT2QZ256rmkz = 16656, |
| 16670 | VPERMT2QZ256rr = 16657, |
| 16671 | VPERMT2QZ256rrk = 16658, |
| 16672 | VPERMT2QZ256rrkz = 16659, |
| 16673 | VPERMT2QZrm = 16660, |
| 16674 | VPERMT2QZrmb = 16661, |
| 16675 | VPERMT2QZrmbk = 16662, |
| 16676 | VPERMT2QZrmbkz = 16663, |
| 16677 | VPERMT2QZrmk = 16664, |
| 16678 | VPERMT2QZrmkz = 16665, |
| 16679 | VPERMT2QZrr = 16666, |
| 16680 | VPERMT2QZrrk = 16667, |
| 16681 | VPERMT2QZrrkz = 16668, |
| 16682 | VPERMT2WZ128rm = 16669, |
| 16683 | VPERMT2WZ128rmk = 16670, |
| 16684 | VPERMT2WZ128rmkz = 16671, |
| 16685 | VPERMT2WZ128rr = 16672, |
| 16686 | VPERMT2WZ128rrk = 16673, |
| 16687 | VPERMT2WZ128rrkz = 16674, |
| 16688 | VPERMT2WZ256rm = 16675, |
| 16689 | VPERMT2WZ256rmk = 16676, |
| 16690 | VPERMT2WZ256rmkz = 16677, |
| 16691 | VPERMT2WZ256rr = 16678, |
| 16692 | VPERMT2WZ256rrk = 16679, |
| 16693 | VPERMT2WZ256rrkz = 16680, |
| 16694 | VPERMT2WZrm = 16681, |
| 16695 | VPERMT2WZrmk = 16682, |
| 16696 | VPERMT2WZrmkz = 16683, |
| 16697 | VPERMT2WZrr = 16684, |
| 16698 | VPERMT2WZrrk = 16685, |
| 16699 | VPERMT2WZrrkz = 16686, |
| 16700 | VPERMWZ128rm = 16687, |
| 16701 | VPERMWZ128rmk = 16688, |
| 16702 | VPERMWZ128rmkz = 16689, |
| 16703 | VPERMWZ128rr = 16690, |
| 16704 | VPERMWZ128rrk = 16691, |
| 16705 | VPERMWZ128rrkz = 16692, |
| 16706 | VPERMWZ256rm = 16693, |
| 16707 | VPERMWZ256rmk = 16694, |
| 16708 | VPERMWZ256rmkz = 16695, |
| 16709 | VPERMWZ256rr = 16696, |
| 16710 | VPERMWZ256rrk = 16697, |
| 16711 | VPERMWZ256rrkz = 16698, |
| 16712 | VPERMWZrm = 16699, |
| 16713 | VPERMWZrmk = 16700, |
| 16714 | VPERMWZrmkz = 16701, |
| 16715 | VPERMWZrr = 16702, |
| 16716 | VPERMWZrrk = 16703, |
| 16717 | VPERMWZrrkz = 16704, |
| 16718 | VPEXPANDBZ128rm = 16705, |
| 16719 | VPEXPANDBZ128rmk = 16706, |
| 16720 | VPEXPANDBZ128rmkz = 16707, |
| 16721 | VPEXPANDBZ128rr = 16708, |
| 16722 | VPEXPANDBZ128rrk = 16709, |
| 16723 | VPEXPANDBZ128rrkz = 16710, |
| 16724 | VPEXPANDBZ256rm = 16711, |
| 16725 | VPEXPANDBZ256rmk = 16712, |
| 16726 | VPEXPANDBZ256rmkz = 16713, |
| 16727 | VPEXPANDBZ256rr = 16714, |
| 16728 | VPEXPANDBZ256rrk = 16715, |
| 16729 | VPEXPANDBZ256rrkz = 16716, |
| 16730 | VPEXPANDBZrm = 16717, |
| 16731 | VPEXPANDBZrmk = 16718, |
| 16732 | VPEXPANDBZrmkz = 16719, |
| 16733 | VPEXPANDBZrr = 16720, |
| 16734 | VPEXPANDBZrrk = 16721, |
| 16735 | VPEXPANDBZrrkz = 16722, |
| 16736 | VPEXPANDDZ128rm = 16723, |
| 16737 | VPEXPANDDZ128rmk = 16724, |
| 16738 | VPEXPANDDZ128rmkz = 16725, |
| 16739 | VPEXPANDDZ128rr = 16726, |
| 16740 | VPEXPANDDZ128rrk = 16727, |
| 16741 | VPEXPANDDZ128rrkz = 16728, |
| 16742 | VPEXPANDDZ256rm = 16729, |
| 16743 | VPEXPANDDZ256rmk = 16730, |
| 16744 | VPEXPANDDZ256rmkz = 16731, |
| 16745 | VPEXPANDDZ256rr = 16732, |
| 16746 | VPEXPANDDZ256rrk = 16733, |
| 16747 | VPEXPANDDZ256rrkz = 16734, |
| 16748 | VPEXPANDDZrm = 16735, |
| 16749 | VPEXPANDDZrmk = 16736, |
| 16750 | VPEXPANDDZrmkz = 16737, |
| 16751 | VPEXPANDDZrr = 16738, |
| 16752 | VPEXPANDDZrrk = 16739, |
| 16753 | VPEXPANDDZrrkz = 16740, |
| 16754 | VPEXPANDQZ128rm = 16741, |
| 16755 | VPEXPANDQZ128rmk = 16742, |
| 16756 | VPEXPANDQZ128rmkz = 16743, |
| 16757 | VPEXPANDQZ128rr = 16744, |
| 16758 | VPEXPANDQZ128rrk = 16745, |
| 16759 | VPEXPANDQZ128rrkz = 16746, |
| 16760 | VPEXPANDQZ256rm = 16747, |
| 16761 | VPEXPANDQZ256rmk = 16748, |
| 16762 | VPEXPANDQZ256rmkz = 16749, |
| 16763 | VPEXPANDQZ256rr = 16750, |
| 16764 | VPEXPANDQZ256rrk = 16751, |
| 16765 | VPEXPANDQZ256rrkz = 16752, |
| 16766 | VPEXPANDQZrm = 16753, |
| 16767 | VPEXPANDQZrmk = 16754, |
| 16768 | VPEXPANDQZrmkz = 16755, |
| 16769 | VPEXPANDQZrr = 16756, |
| 16770 | VPEXPANDQZrrk = 16757, |
| 16771 | VPEXPANDQZrrkz = 16758, |
| 16772 | VPEXPANDWZ128rm = 16759, |
| 16773 | VPEXPANDWZ128rmk = 16760, |
| 16774 | VPEXPANDWZ128rmkz = 16761, |
| 16775 | VPEXPANDWZ128rr = 16762, |
| 16776 | VPEXPANDWZ128rrk = 16763, |
| 16777 | VPEXPANDWZ128rrkz = 16764, |
| 16778 | VPEXPANDWZ256rm = 16765, |
| 16779 | VPEXPANDWZ256rmk = 16766, |
| 16780 | VPEXPANDWZ256rmkz = 16767, |
| 16781 | VPEXPANDWZ256rr = 16768, |
| 16782 | VPEXPANDWZ256rrk = 16769, |
| 16783 | VPEXPANDWZ256rrkz = 16770, |
| 16784 | VPEXPANDWZrm = 16771, |
| 16785 | VPEXPANDWZrmk = 16772, |
| 16786 | VPEXPANDWZrmkz = 16773, |
| 16787 | VPEXPANDWZrr = 16774, |
| 16788 | VPEXPANDWZrrk = 16775, |
| 16789 | VPEXPANDWZrrkz = 16776, |
| 16790 | VPEXTRBZmri = 16777, |
| 16791 | VPEXTRBZrri = 16778, |
| 16792 | VPEXTRBmri = 16779, |
| 16793 | VPEXTRBrri = 16780, |
| 16794 | VPEXTRDZmri = 16781, |
| 16795 | VPEXTRDZrri = 16782, |
| 16796 | VPEXTRDmri = 16783, |
| 16797 | VPEXTRDrri = 16784, |
| 16798 | VPEXTRQZmri = 16785, |
| 16799 | VPEXTRQZrri = 16786, |
| 16800 | VPEXTRQmri = 16787, |
| 16801 | VPEXTRQrri = 16788, |
| 16802 | VPEXTRWZmri = 16789, |
| 16803 | VPEXTRWZrri = 16790, |
| 16804 | VPEXTRWZrri_REV = 16791, |
| 16805 | VPEXTRWmri = 16792, |
| 16806 | VPEXTRWrri = 16793, |
| 16807 | VPEXTRWrri_REV = 16794, |
| 16808 | VPGATHERDDYrm = 16795, |
| 16809 | VPGATHERDDZ128rm = 16796, |
| 16810 | VPGATHERDDZ256rm = 16797, |
| 16811 | VPGATHERDDZrm = 16798, |
| 16812 | VPGATHERDDrm = 16799, |
| 16813 | VPGATHERDQYrm = 16800, |
| 16814 | VPGATHERDQZ128rm = 16801, |
| 16815 | VPGATHERDQZ256rm = 16802, |
| 16816 | VPGATHERDQZrm = 16803, |
| 16817 | VPGATHERDQrm = 16804, |
| 16818 | VPGATHERQDYrm = 16805, |
| 16819 | VPGATHERQDZ128rm = 16806, |
| 16820 | VPGATHERQDZ256rm = 16807, |
| 16821 | VPGATHERQDZrm = 16808, |
| 16822 | VPGATHERQDrm = 16809, |
| 16823 | VPGATHERQQYrm = 16810, |
| 16824 | VPGATHERQQZ128rm = 16811, |
| 16825 | VPGATHERQQZ256rm = 16812, |
| 16826 | VPGATHERQQZrm = 16813, |
| 16827 | VPGATHERQQrm = 16814, |
| 16828 | VPHADDBDrm = 16815, |
| 16829 | VPHADDBDrr = 16816, |
| 16830 | VPHADDBQrm = 16817, |
| 16831 | VPHADDBQrr = 16818, |
| 16832 | VPHADDBWrm = 16819, |
| 16833 | VPHADDBWrr = 16820, |
| 16834 | VPHADDDQrm = 16821, |
| 16835 | VPHADDDQrr = 16822, |
| 16836 | VPHADDDYrm = 16823, |
| 16837 | VPHADDDYrr = 16824, |
| 16838 | VPHADDDrm = 16825, |
| 16839 | VPHADDDrr = 16826, |
| 16840 | VPHADDSWYrm = 16827, |
| 16841 | VPHADDSWYrr = 16828, |
| 16842 | VPHADDSWrm = 16829, |
| 16843 | VPHADDSWrr = 16830, |
| 16844 | VPHADDUBDrm = 16831, |
| 16845 | VPHADDUBDrr = 16832, |
| 16846 | VPHADDUBQrm = 16833, |
| 16847 | VPHADDUBQrr = 16834, |
| 16848 | VPHADDUBWrm = 16835, |
| 16849 | VPHADDUBWrr = 16836, |
| 16850 | VPHADDUDQrm = 16837, |
| 16851 | VPHADDUDQrr = 16838, |
| 16852 | VPHADDUWDrm = 16839, |
| 16853 | VPHADDUWDrr = 16840, |
| 16854 | VPHADDUWQrm = 16841, |
| 16855 | VPHADDUWQrr = 16842, |
| 16856 | VPHADDWDrm = 16843, |
| 16857 | VPHADDWDrr = 16844, |
| 16858 | VPHADDWQrm = 16845, |
| 16859 | VPHADDWQrr = 16846, |
| 16860 | VPHADDWYrm = 16847, |
| 16861 | VPHADDWYrr = 16848, |
| 16862 | VPHADDWrm = 16849, |
| 16863 | VPHADDWrr = 16850, |
| 16864 | VPHMINPOSUWrm = 16851, |
| 16865 | VPHMINPOSUWrr = 16852, |
| 16866 | VPHSUBBWrm = 16853, |
| 16867 | VPHSUBBWrr = 16854, |
| 16868 | VPHSUBDQrm = 16855, |
| 16869 | VPHSUBDQrr = 16856, |
| 16870 | VPHSUBDYrm = 16857, |
| 16871 | VPHSUBDYrr = 16858, |
| 16872 | VPHSUBDrm = 16859, |
| 16873 | VPHSUBDrr = 16860, |
| 16874 | VPHSUBSWYrm = 16861, |
| 16875 | VPHSUBSWYrr = 16862, |
| 16876 | VPHSUBSWrm = 16863, |
| 16877 | VPHSUBSWrr = 16864, |
| 16878 | VPHSUBWDrm = 16865, |
| 16879 | VPHSUBWDrr = 16866, |
| 16880 | VPHSUBWYrm = 16867, |
| 16881 | VPHSUBWYrr = 16868, |
| 16882 | VPHSUBWrm = 16869, |
| 16883 | VPHSUBWrr = 16870, |
| 16884 | VPINSRBZrmi = 16871, |
| 16885 | VPINSRBZrri = 16872, |
| 16886 | VPINSRBrmi = 16873, |
| 16887 | VPINSRBrri = 16874, |
| 16888 | VPINSRDZrmi = 16875, |
| 16889 | VPINSRDZrri = 16876, |
| 16890 | VPINSRDrmi = 16877, |
| 16891 | VPINSRDrri = 16878, |
| 16892 | VPINSRQZrmi = 16879, |
| 16893 | VPINSRQZrri = 16880, |
| 16894 | VPINSRQrmi = 16881, |
| 16895 | VPINSRQrri = 16882, |
| 16896 | VPINSRWZrmi = 16883, |
| 16897 | VPINSRWZrri = 16884, |
| 16898 | VPINSRWrmi = 16885, |
| 16899 | VPINSRWrri = 16886, |
| 16900 | VPLZCNTDZ128rm = 16887, |
| 16901 | VPLZCNTDZ128rmb = 16888, |
| 16902 | VPLZCNTDZ128rmbk = 16889, |
| 16903 | VPLZCNTDZ128rmbkz = 16890, |
| 16904 | VPLZCNTDZ128rmk = 16891, |
| 16905 | VPLZCNTDZ128rmkz = 16892, |
| 16906 | VPLZCNTDZ128rr = 16893, |
| 16907 | VPLZCNTDZ128rrk = 16894, |
| 16908 | VPLZCNTDZ128rrkz = 16895, |
| 16909 | VPLZCNTDZ256rm = 16896, |
| 16910 | VPLZCNTDZ256rmb = 16897, |
| 16911 | VPLZCNTDZ256rmbk = 16898, |
| 16912 | VPLZCNTDZ256rmbkz = 16899, |
| 16913 | VPLZCNTDZ256rmk = 16900, |
| 16914 | VPLZCNTDZ256rmkz = 16901, |
| 16915 | VPLZCNTDZ256rr = 16902, |
| 16916 | VPLZCNTDZ256rrk = 16903, |
| 16917 | VPLZCNTDZ256rrkz = 16904, |
| 16918 | VPLZCNTDZrm = 16905, |
| 16919 | VPLZCNTDZrmb = 16906, |
| 16920 | VPLZCNTDZrmbk = 16907, |
| 16921 | VPLZCNTDZrmbkz = 16908, |
| 16922 | VPLZCNTDZrmk = 16909, |
| 16923 | VPLZCNTDZrmkz = 16910, |
| 16924 | VPLZCNTDZrr = 16911, |
| 16925 | VPLZCNTDZrrk = 16912, |
| 16926 | VPLZCNTDZrrkz = 16913, |
| 16927 | VPLZCNTQZ128rm = 16914, |
| 16928 | VPLZCNTQZ128rmb = 16915, |
| 16929 | VPLZCNTQZ128rmbk = 16916, |
| 16930 | VPLZCNTQZ128rmbkz = 16917, |
| 16931 | VPLZCNTQZ128rmk = 16918, |
| 16932 | VPLZCNTQZ128rmkz = 16919, |
| 16933 | VPLZCNTQZ128rr = 16920, |
| 16934 | VPLZCNTQZ128rrk = 16921, |
| 16935 | VPLZCNTQZ128rrkz = 16922, |
| 16936 | VPLZCNTQZ256rm = 16923, |
| 16937 | VPLZCNTQZ256rmb = 16924, |
| 16938 | VPLZCNTQZ256rmbk = 16925, |
| 16939 | VPLZCNTQZ256rmbkz = 16926, |
| 16940 | VPLZCNTQZ256rmk = 16927, |
| 16941 | VPLZCNTQZ256rmkz = 16928, |
| 16942 | VPLZCNTQZ256rr = 16929, |
| 16943 | VPLZCNTQZ256rrk = 16930, |
| 16944 | VPLZCNTQZ256rrkz = 16931, |
| 16945 | VPLZCNTQZrm = 16932, |
| 16946 | VPLZCNTQZrmb = 16933, |
| 16947 | VPLZCNTQZrmbk = 16934, |
| 16948 | VPLZCNTQZrmbkz = 16935, |
| 16949 | VPLZCNTQZrmk = 16936, |
| 16950 | VPLZCNTQZrmkz = 16937, |
| 16951 | VPLZCNTQZrr = 16938, |
| 16952 | VPLZCNTQZrrk = 16939, |
| 16953 | VPLZCNTQZrrkz = 16940, |
| 16954 | VPMACSDDrm = 16941, |
| 16955 | VPMACSDDrr = 16942, |
| 16956 | VPMACSDQHrm = 16943, |
| 16957 | VPMACSDQHrr = 16944, |
| 16958 | VPMACSDQLrm = 16945, |
| 16959 | VPMACSDQLrr = 16946, |
| 16960 | VPMACSSDDrm = 16947, |
| 16961 | VPMACSSDDrr = 16948, |
| 16962 | VPMACSSDQHrm = 16949, |
| 16963 | VPMACSSDQHrr = 16950, |
| 16964 | VPMACSSDQLrm = 16951, |
| 16965 | VPMACSSDQLrr = 16952, |
| 16966 | VPMACSSWDrm = 16953, |
| 16967 | VPMACSSWDrr = 16954, |
| 16968 | VPMACSSWWrm = 16955, |
| 16969 | VPMACSSWWrr = 16956, |
| 16970 | VPMACSWDrm = 16957, |
| 16971 | VPMACSWDrr = 16958, |
| 16972 | VPMACSWWrm = 16959, |
| 16973 | VPMACSWWrr = 16960, |
| 16974 | VPMADCSSWDrm = 16961, |
| 16975 | VPMADCSSWDrr = 16962, |
| 16976 | VPMADCSWDrm = 16963, |
| 16977 | VPMADCSWDrr = 16964, |
| 16978 | VPMADD52HUQYrm = 16965, |
| 16979 | VPMADD52HUQYrr = 16966, |
| 16980 | VPMADD52HUQZ128m = 16967, |
| 16981 | VPMADD52HUQZ128mb = 16968, |
| 16982 | VPMADD52HUQZ128mbk = 16969, |
| 16983 | VPMADD52HUQZ128mbkz = 16970, |
| 16984 | VPMADD52HUQZ128mk = 16971, |
| 16985 | VPMADD52HUQZ128mkz = 16972, |
| 16986 | VPMADD52HUQZ128r = 16973, |
| 16987 | VPMADD52HUQZ128rk = 16974, |
| 16988 | VPMADD52HUQZ128rkz = 16975, |
| 16989 | VPMADD52HUQZ256m = 16976, |
| 16990 | VPMADD52HUQZ256mb = 16977, |
| 16991 | VPMADD52HUQZ256mbk = 16978, |
| 16992 | VPMADD52HUQZ256mbkz = 16979, |
| 16993 | VPMADD52HUQZ256mk = 16980, |
| 16994 | VPMADD52HUQZ256mkz = 16981, |
| 16995 | VPMADD52HUQZ256r = 16982, |
| 16996 | VPMADD52HUQZ256rk = 16983, |
| 16997 | VPMADD52HUQZ256rkz = 16984, |
| 16998 | VPMADD52HUQZm = 16985, |
| 16999 | VPMADD52HUQZmb = 16986, |
| 17000 | VPMADD52HUQZmbk = 16987, |
| 17001 | VPMADD52HUQZmbkz = 16988, |
| 17002 | VPMADD52HUQZmk = 16989, |
| 17003 | VPMADD52HUQZmkz = 16990, |
| 17004 | VPMADD52HUQZr = 16991, |
| 17005 | VPMADD52HUQZrk = 16992, |
| 17006 | VPMADD52HUQZrkz = 16993, |
| 17007 | VPMADD52HUQrm = 16994, |
| 17008 | VPMADD52HUQrr = 16995, |
| 17009 | VPMADD52LUQYrm = 16996, |
| 17010 | VPMADD52LUQYrr = 16997, |
| 17011 | VPMADD52LUQZ128m = 16998, |
| 17012 | VPMADD52LUQZ128mb = 16999, |
| 17013 | VPMADD52LUQZ128mbk = 17000, |
| 17014 | VPMADD52LUQZ128mbkz = 17001, |
| 17015 | VPMADD52LUQZ128mk = 17002, |
| 17016 | VPMADD52LUQZ128mkz = 17003, |
| 17017 | VPMADD52LUQZ128r = 17004, |
| 17018 | VPMADD52LUQZ128rk = 17005, |
| 17019 | VPMADD52LUQZ128rkz = 17006, |
| 17020 | VPMADD52LUQZ256m = 17007, |
| 17021 | VPMADD52LUQZ256mb = 17008, |
| 17022 | VPMADD52LUQZ256mbk = 17009, |
| 17023 | VPMADD52LUQZ256mbkz = 17010, |
| 17024 | VPMADD52LUQZ256mk = 17011, |
| 17025 | VPMADD52LUQZ256mkz = 17012, |
| 17026 | VPMADD52LUQZ256r = 17013, |
| 17027 | VPMADD52LUQZ256rk = 17014, |
| 17028 | VPMADD52LUQZ256rkz = 17015, |
| 17029 | VPMADD52LUQZm = 17016, |
| 17030 | VPMADD52LUQZmb = 17017, |
| 17031 | VPMADD52LUQZmbk = 17018, |
| 17032 | VPMADD52LUQZmbkz = 17019, |
| 17033 | VPMADD52LUQZmk = 17020, |
| 17034 | VPMADD52LUQZmkz = 17021, |
| 17035 | VPMADD52LUQZr = 17022, |
| 17036 | VPMADD52LUQZrk = 17023, |
| 17037 | VPMADD52LUQZrkz = 17024, |
| 17038 | VPMADD52LUQrm = 17025, |
| 17039 | VPMADD52LUQrr = 17026, |
| 17040 | VPMADDUBSWYrm = 17027, |
| 17041 | VPMADDUBSWYrr = 17028, |
| 17042 | VPMADDUBSWZ128rm = 17029, |
| 17043 | VPMADDUBSWZ128rmk = 17030, |
| 17044 | VPMADDUBSWZ128rmkz = 17031, |
| 17045 | VPMADDUBSWZ128rr = 17032, |
| 17046 | VPMADDUBSWZ128rrk = 17033, |
| 17047 | VPMADDUBSWZ128rrkz = 17034, |
| 17048 | VPMADDUBSWZ256rm = 17035, |
| 17049 | VPMADDUBSWZ256rmk = 17036, |
| 17050 | VPMADDUBSWZ256rmkz = 17037, |
| 17051 | VPMADDUBSWZ256rr = 17038, |
| 17052 | VPMADDUBSWZ256rrk = 17039, |
| 17053 | VPMADDUBSWZ256rrkz = 17040, |
| 17054 | VPMADDUBSWZrm = 17041, |
| 17055 | VPMADDUBSWZrmk = 17042, |
| 17056 | VPMADDUBSWZrmkz = 17043, |
| 17057 | VPMADDUBSWZrr = 17044, |
| 17058 | VPMADDUBSWZrrk = 17045, |
| 17059 | VPMADDUBSWZrrkz = 17046, |
| 17060 | VPMADDUBSWrm = 17047, |
| 17061 | VPMADDUBSWrr = 17048, |
| 17062 | VPMADDWDYrm = 17049, |
| 17063 | VPMADDWDYrr = 17050, |
| 17064 | VPMADDWDZ128rm = 17051, |
| 17065 | VPMADDWDZ128rmk = 17052, |
| 17066 | VPMADDWDZ128rmkz = 17053, |
| 17067 | VPMADDWDZ128rr = 17054, |
| 17068 | VPMADDWDZ128rrk = 17055, |
| 17069 | VPMADDWDZ128rrkz = 17056, |
| 17070 | VPMADDWDZ256rm = 17057, |
| 17071 | VPMADDWDZ256rmk = 17058, |
| 17072 | VPMADDWDZ256rmkz = 17059, |
| 17073 | VPMADDWDZ256rr = 17060, |
| 17074 | VPMADDWDZ256rrk = 17061, |
| 17075 | VPMADDWDZ256rrkz = 17062, |
| 17076 | VPMADDWDZrm = 17063, |
| 17077 | VPMADDWDZrmk = 17064, |
| 17078 | VPMADDWDZrmkz = 17065, |
| 17079 | VPMADDWDZrr = 17066, |
| 17080 | VPMADDWDZrrk = 17067, |
| 17081 | VPMADDWDZrrkz = 17068, |
| 17082 | VPMADDWDrm = 17069, |
| 17083 | VPMADDWDrr = 17070, |
| 17084 | VPMASKMOVDYmr = 17071, |
| 17085 | VPMASKMOVDYrm = 17072, |
| 17086 | VPMASKMOVDmr = 17073, |
| 17087 | VPMASKMOVDrm = 17074, |
| 17088 | VPMASKMOVQYmr = 17075, |
| 17089 | VPMASKMOVQYrm = 17076, |
| 17090 | VPMASKMOVQmr = 17077, |
| 17091 | VPMASKMOVQrm = 17078, |
| 17092 | VPMAXSBYrm = 17079, |
| 17093 | VPMAXSBYrr = 17080, |
| 17094 | VPMAXSBZ128rm = 17081, |
| 17095 | VPMAXSBZ128rmk = 17082, |
| 17096 | VPMAXSBZ128rmkz = 17083, |
| 17097 | VPMAXSBZ128rr = 17084, |
| 17098 | VPMAXSBZ128rrk = 17085, |
| 17099 | VPMAXSBZ128rrkz = 17086, |
| 17100 | VPMAXSBZ256rm = 17087, |
| 17101 | VPMAXSBZ256rmk = 17088, |
| 17102 | VPMAXSBZ256rmkz = 17089, |
| 17103 | VPMAXSBZ256rr = 17090, |
| 17104 | VPMAXSBZ256rrk = 17091, |
| 17105 | VPMAXSBZ256rrkz = 17092, |
| 17106 | VPMAXSBZrm = 17093, |
| 17107 | VPMAXSBZrmk = 17094, |
| 17108 | VPMAXSBZrmkz = 17095, |
| 17109 | VPMAXSBZrr = 17096, |
| 17110 | VPMAXSBZrrk = 17097, |
| 17111 | VPMAXSBZrrkz = 17098, |
| 17112 | VPMAXSBrm = 17099, |
| 17113 | VPMAXSBrr = 17100, |
| 17114 | VPMAXSDYrm = 17101, |
| 17115 | VPMAXSDYrr = 17102, |
| 17116 | VPMAXSDZ128rm = 17103, |
| 17117 | VPMAXSDZ128rmb = 17104, |
| 17118 | VPMAXSDZ128rmbk = 17105, |
| 17119 | VPMAXSDZ128rmbkz = 17106, |
| 17120 | VPMAXSDZ128rmk = 17107, |
| 17121 | VPMAXSDZ128rmkz = 17108, |
| 17122 | VPMAXSDZ128rr = 17109, |
| 17123 | VPMAXSDZ128rrk = 17110, |
| 17124 | VPMAXSDZ128rrkz = 17111, |
| 17125 | VPMAXSDZ256rm = 17112, |
| 17126 | VPMAXSDZ256rmb = 17113, |
| 17127 | VPMAXSDZ256rmbk = 17114, |
| 17128 | VPMAXSDZ256rmbkz = 17115, |
| 17129 | VPMAXSDZ256rmk = 17116, |
| 17130 | VPMAXSDZ256rmkz = 17117, |
| 17131 | VPMAXSDZ256rr = 17118, |
| 17132 | VPMAXSDZ256rrk = 17119, |
| 17133 | VPMAXSDZ256rrkz = 17120, |
| 17134 | VPMAXSDZrm = 17121, |
| 17135 | VPMAXSDZrmb = 17122, |
| 17136 | VPMAXSDZrmbk = 17123, |
| 17137 | VPMAXSDZrmbkz = 17124, |
| 17138 | VPMAXSDZrmk = 17125, |
| 17139 | VPMAXSDZrmkz = 17126, |
| 17140 | VPMAXSDZrr = 17127, |
| 17141 | VPMAXSDZrrk = 17128, |
| 17142 | VPMAXSDZrrkz = 17129, |
| 17143 | VPMAXSDrm = 17130, |
| 17144 | VPMAXSDrr = 17131, |
| 17145 | VPMAXSQZ128rm = 17132, |
| 17146 | VPMAXSQZ128rmb = 17133, |
| 17147 | VPMAXSQZ128rmbk = 17134, |
| 17148 | VPMAXSQZ128rmbkz = 17135, |
| 17149 | VPMAXSQZ128rmk = 17136, |
| 17150 | VPMAXSQZ128rmkz = 17137, |
| 17151 | VPMAXSQZ128rr = 17138, |
| 17152 | VPMAXSQZ128rrk = 17139, |
| 17153 | VPMAXSQZ128rrkz = 17140, |
| 17154 | VPMAXSQZ256rm = 17141, |
| 17155 | VPMAXSQZ256rmb = 17142, |
| 17156 | VPMAXSQZ256rmbk = 17143, |
| 17157 | VPMAXSQZ256rmbkz = 17144, |
| 17158 | VPMAXSQZ256rmk = 17145, |
| 17159 | VPMAXSQZ256rmkz = 17146, |
| 17160 | VPMAXSQZ256rr = 17147, |
| 17161 | VPMAXSQZ256rrk = 17148, |
| 17162 | VPMAXSQZ256rrkz = 17149, |
| 17163 | VPMAXSQZrm = 17150, |
| 17164 | VPMAXSQZrmb = 17151, |
| 17165 | VPMAXSQZrmbk = 17152, |
| 17166 | VPMAXSQZrmbkz = 17153, |
| 17167 | VPMAXSQZrmk = 17154, |
| 17168 | VPMAXSQZrmkz = 17155, |
| 17169 | VPMAXSQZrr = 17156, |
| 17170 | VPMAXSQZrrk = 17157, |
| 17171 | VPMAXSQZrrkz = 17158, |
| 17172 | VPMAXSWYrm = 17159, |
| 17173 | VPMAXSWYrr = 17160, |
| 17174 | VPMAXSWZ128rm = 17161, |
| 17175 | VPMAXSWZ128rmk = 17162, |
| 17176 | VPMAXSWZ128rmkz = 17163, |
| 17177 | VPMAXSWZ128rr = 17164, |
| 17178 | VPMAXSWZ128rrk = 17165, |
| 17179 | VPMAXSWZ128rrkz = 17166, |
| 17180 | VPMAXSWZ256rm = 17167, |
| 17181 | VPMAXSWZ256rmk = 17168, |
| 17182 | VPMAXSWZ256rmkz = 17169, |
| 17183 | VPMAXSWZ256rr = 17170, |
| 17184 | VPMAXSWZ256rrk = 17171, |
| 17185 | VPMAXSWZ256rrkz = 17172, |
| 17186 | VPMAXSWZrm = 17173, |
| 17187 | VPMAXSWZrmk = 17174, |
| 17188 | VPMAXSWZrmkz = 17175, |
| 17189 | VPMAXSWZrr = 17176, |
| 17190 | VPMAXSWZrrk = 17177, |
| 17191 | VPMAXSWZrrkz = 17178, |
| 17192 | VPMAXSWrm = 17179, |
| 17193 | VPMAXSWrr = 17180, |
| 17194 | VPMAXUBYrm = 17181, |
| 17195 | VPMAXUBYrr = 17182, |
| 17196 | VPMAXUBZ128rm = 17183, |
| 17197 | VPMAXUBZ128rmk = 17184, |
| 17198 | VPMAXUBZ128rmkz = 17185, |
| 17199 | VPMAXUBZ128rr = 17186, |
| 17200 | VPMAXUBZ128rrk = 17187, |
| 17201 | VPMAXUBZ128rrkz = 17188, |
| 17202 | VPMAXUBZ256rm = 17189, |
| 17203 | VPMAXUBZ256rmk = 17190, |
| 17204 | VPMAXUBZ256rmkz = 17191, |
| 17205 | VPMAXUBZ256rr = 17192, |
| 17206 | VPMAXUBZ256rrk = 17193, |
| 17207 | VPMAXUBZ256rrkz = 17194, |
| 17208 | VPMAXUBZrm = 17195, |
| 17209 | VPMAXUBZrmk = 17196, |
| 17210 | VPMAXUBZrmkz = 17197, |
| 17211 | VPMAXUBZrr = 17198, |
| 17212 | VPMAXUBZrrk = 17199, |
| 17213 | VPMAXUBZrrkz = 17200, |
| 17214 | VPMAXUBrm = 17201, |
| 17215 | VPMAXUBrr = 17202, |
| 17216 | VPMAXUDYrm = 17203, |
| 17217 | VPMAXUDYrr = 17204, |
| 17218 | VPMAXUDZ128rm = 17205, |
| 17219 | VPMAXUDZ128rmb = 17206, |
| 17220 | VPMAXUDZ128rmbk = 17207, |
| 17221 | VPMAXUDZ128rmbkz = 17208, |
| 17222 | VPMAXUDZ128rmk = 17209, |
| 17223 | VPMAXUDZ128rmkz = 17210, |
| 17224 | VPMAXUDZ128rr = 17211, |
| 17225 | VPMAXUDZ128rrk = 17212, |
| 17226 | VPMAXUDZ128rrkz = 17213, |
| 17227 | VPMAXUDZ256rm = 17214, |
| 17228 | VPMAXUDZ256rmb = 17215, |
| 17229 | VPMAXUDZ256rmbk = 17216, |
| 17230 | VPMAXUDZ256rmbkz = 17217, |
| 17231 | VPMAXUDZ256rmk = 17218, |
| 17232 | VPMAXUDZ256rmkz = 17219, |
| 17233 | VPMAXUDZ256rr = 17220, |
| 17234 | VPMAXUDZ256rrk = 17221, |
| 17235 | VPMAXUDZ256rrkz = 17222, |
| 17236 | VPMAXUDZrm = 17223, |
| 17237 | VPMAXUDZrmb = 17224, |
| 17238 | VPMAXUDZrmbk = 17225, |
| 17239 | VPMAXUDZrmbkz = 17226, |
| 17240 | VPMAXUDZrmk = 17227, |
| 17241 | VPMAXUDZrmkz = 17228, |
| 17242 | VPMAXUDZrr = 17229, |
| 17243 | VPMAXUDZrrk = 17230, |
| 17244 | VPMAXUDZrrkz = 17231, |
| 17245 | VPMAXUDrm = 17232, |
| 17246 | VPMAXUDrr = 17233, |
| 17247 | VPMAXUQZ128rm = 17234, |
| 17248 | VPMAXUQZ128rmb = 17235, |
| 17249 | VPMAXUQZ128rmbk = 17236, |
| 17250 | VPMAXUQZ128rmbkz = 17237, |
| 17251 | VPMAXUQZ128rmk = 17238, |
| 17252 | VPMAXUQZ128rmkz = 17239, |
| 17253 | VPMAXUQZ128rr = 17240, |
| 17254 | VPMAXUQZ128rrk = 17241, |
| 17255 | VPMAXUQZ128rrkz = 17242, |
| 17256 | VPMAXUQZ256rm = 17243, |
| 17257 | VPMAXUQZ256rmb = 17244, |
| 17258 | VPMAXUQZ256rmbk = 17245, |
| 17259 | VPMAXUQZ256rmbkz = 17246, |
| 17260 | VPMAXUQZ256rmk = 17247, |
| 17261 | VPMAXUQZ256rmkz = 17248, |
| 17262 | VPMAXUQZ256rr = 17249, |
| 17263 | VPMAXUQZ256rrk = 17250, |
| 17264 | VPMAXUQZ256rrkz = 17251, |
| 17265 | VPMAXUQZrm = 17252, |
| 17266 | VPMAXUQZrmb = 17253, |
| 17267 | VPMAXUQZrmbk = 17254, |
| 17268 | VPMAXUQZrmbkz = 17255, |
| 17269 | VPMAXUQZrmk = 17256, |
| 17270 | VPMAXUQZrmkz = 17257, |
| 17271 | VPMAXUQZrr = 17258, |
| 17272 | VPMAXUQZrrk = 17259, |
| 17273 | VPMAXUQZrrkz = 17260, |
| 17274 | VPMAXUWYrm = 17261, |
| 17275 | VPMAXUWYrr = 17262, |
| 17276 | VPMAXUWZ128rm = 17263, |
| 17277 | VPMAXUWZ128rmk = 17264, |
| 17278 | VPMAXUWZ128rmkz = 17265, |
| 17279 | VPMAXUWZ128rr = 17266, |
| 17280 | VPMAXUWZ128rrk = 17267, |
| 17281 | VPMAXUWZ128rrkz = 17268, |
| 17282 | VPMAXUWZ256rm = 17269, |
| 17283 | VPMAXUWZ256rmk = 17270, |
| 17284 | VPMAXUWZ256rmkz = 17271, |
| 17285 | VPMAXUWZ256rr = 17272, |
| 17286 | VPMAXUWZ256rrk = 17273, |
| 17287 | VPMAXUWZ256rrkz = 17274, |
| 17288 | VPMAXUWZrm = 17275, |
| 17289 | VPMAXUWZrmk = 17276, |
| 17290 | VPMAXUWZrmkz = 17277, |
| 17291 | VPMAXUWZrr = 17278, |
| 17292 | VPMAXUWZrrk = 17279, |
| 17293 | VPMAXUWZrrkz = 17280, |
| 17294 | VPMAXUWrm = 17281, |
| 17295 | VPMAXUWrr = 17282, |
| 17296 | VPMINSBYrm = 17283, |
| 17297 | VPMINSBYrr = 17284, |
| 17298 | VPMINSBZ128rm = 17285, |
| 17299 | VPMINSBZ128rmk = 17286, |
| 17300 | VPMINSBZ128rmkz = 17287, |
| 17301 | VPMINSBZ128rr = 17288, |
| 17302 | VPMINSBZ128rrk = 17289, |
| 17303 | VPMINSBZ128rrkz = 17290, |
| 17304 | VPMINSBZ256rm = 17291, |
| 17305 | VPMINSBZ256rmk = 17292, |
| 17306 | VPMINSBZ256rmkz = 17293, |
| 17307 | VPMINSBZ256rr = 17294, |
| 17308 | VPMINSBZ256rrk = 17295, |
| 17309 | VPMINSBZ256rrkz = 17296, |
| 17310 | VPMINSBZrm = 17297, |
| 17311 | VPMINSBZrmk = 17298, |
| 17312 | VPMINSBZrmkz = 17299, |
| 17313 | VPMINSBZrr = 17300, |
| 17314 | VPMINSBZrrk = 17301, |
| 17315 | VPMINSBZrrkz = 17302, |
| 17316 | VPMINSBrm = 17303, |
| 17317 | VPMINSBrr = 17304, |
| 17318 | VPMINSDYrm = 17305, |
| 17319 | VPMINSDYrr = 17306, |
| 17320 | VPMINSDZ128rm = 17307, |
| 17321 | VPMINSDZ128rmb = 17308, |
| 17322 | VPMINSDZ128rmbk = 17309, |
| 17323 | VPMINSDZ128rmbkz = 17310, |
| 17324 | VPMINSDZ128rmk = 17311, |
| 17325 | VPMINSDZ128rmkz = 17312, |
| 17326 | VPMINSDZ128rr = 17313, |
| 17327 | VPMINSDZ128rrk = 17314, |
| 17328 | VPMINSDZ128rrkz = 17315, |
| 17329 | VPMINSDZ256rm = 17316, |
| 17330 | VPMINSDZ256rmb = 17317, |
| 17331 | VPMINSDZ256rmbk = 17318, |
| 17332 | VPMINSDZ256rmbkz = 17319, |
| 17333 | VPMINSDZ256rmk = 17320, |
| 17334 | VPMINSDZ256rmkz = 17321, |
| 17335 | VPMINSDZ256rr = 17322, |
| 17336 | VPMINSDZ256rrk = 17323, |
| 17337 | VPMINSDZ256rrkz = 17324, |
| 17338 | VPMINSDZrm = 17325, |
| 17339 | VPMINSDZrmb = 17326, |
| 17340 | VPMINSDZrmbk = 17327, |
| 17341 | VPMINSDZrmbkz = 17328, |
| 17342 | VPMINSDZrmk = 17329, |
| 17343 | VPMINSDZrmkz = 17330, |
| 17344 | VPMINSDZrr = 17331, |
| 17345 | VPMINSDZrrk = 17332, |
| 17346 | VPMINSDZrrkz = 17333, |
| 17347 | VPMINSDrm = 17334, |
| 17348 | VPMINSDrr = 17335, |
| 17349 | VPMINSQZ128rm = 17336, |
| 17350 | VPMINSQZ128rmb = 17337, |
| 17351 | VPMINSQZ128rmbk = 17338, |
| 17352 | VPMINSQZ128rmbkz = 17339, |
| 17353 | VPMINSQZ128rmk = 17340, |
| 17354 | VPMINSQZ128rmkz = 17341, |
| 17355 | VPMINSQZ128rr = 17342, |
| 17356 | VPMINSQZ128rrk = 17343, |
| 17357 | VPMINSQZ128rrkz = 17344, |
| 17358 | VPMINSQZ256rm = 17345, |
| 17359 | VPMINSQZ256rmb = 17346, |
| 17360 | VPMINSQZ256rmbk = 17347, |
| 17361 | VPMINSQZ256rmbkz = 17348, |
| 17362 | VPMINSQZ256rmk = 17349, |
| 17363 | VPMINSQZ256rmkz = 17350, |
| 17364 | VPMINSQZ256rr = 17351, |
| 17365 | VPMINSQZ256rrk = 17352, |
| 17366 | VPMINSQZ256rrkz = 17353, |
| 17367 | VPMINSQZrm = 17354, |
| 17368 | VPMINSQZrmb = 17355, |
| 17369 | VPMINSQZrmbk = 17356, |
| 17370 | VPMINSQZrmbkz = 17357, |
| 17371 | VPMINSQZrmk = 17358, |
| 17372 | VPMINSQZrmkz = 17359, |
| 17373 | VPMINSQZrr = 17360, |
| 17374 | VPMINSQZrrk = 17361, |
| 17375 | VPMINSQZrrkz = 17362, |
| 17376 | VPMINSWYrm = 17363, |
| 17377 | VPMINSWYrr = 17364, |
| 17378 | VPMINSWZ128rm = 17365, |
| 17379 | VPMINSWZ128rmk = 17366, |
| 17380 | VPMINSWZ128rmkz = 17367, |
| 17381 | VPMINSWZ128rr = 17368, |
| 17382 | VPMINSWZ128rrk = 17369, |
| 17383 | VPMINSWZ128rrkz = 17370, |
| 17384 | VPMINSWZ256rm = 17371, |
| 17385 | VPMINSWZ256rmk = 17372, |
| 17386 | VPMINSWZ256rmkz = 17373, |
| 17387 | VPMINSWZ256rr = 17374, |
| 17388 | VPMINSWZ256rrk = 17375, |
| 17389 | VPMINSWZ256rrkz = 17376, |
| 17390 | VPMINSWZrm = 17377, |
| 17391 | VPMINSWZrmk = 17378, |
| 17392 | VPMINSWZrmkz = 17379, |
| 17393 | VPMINSWZrr = 17380, |
| 17394 | VPMINSWZrrk = 17381, |
| 17395 | VPMINSWZrrkz = 17382, |
| 17396 | VPMINSWrm = 17383, |
| 17397 | VPMINSWrr = 17384, |
| 17398 | VPMINUBYrm = 17385, |
| 17399 | VPMINUBYrr = 17386, |
| 17400 | VPMINUBZ128rm = 17387, |
| 17401 | VPMINUBZ128rmk = 17388, |
| 17402 | VPMINUBZ128rmkz = 17389, |
| 17403 | VPMINUBZ128rr = 17390, |
| 17404 | VPMINUBZ128rrk = 17391, |
| 17405 | VPMINUBZ128rrkz = 17392, |
| 17406 | VPMINUBZ256rm = 17393, |
| 17407 | VPMINUBZ256rmk = 17394, |
| 17408 | VPMINUBZ256rmkz = 17395, |
| 17409 | VPMINUBZ256rr = 17396, |
| 17410 | VPMINUBZ256rrk = 17397, |
| 17411 | VPMINUBZ256rrkz = 17398, |
| 17412 | VPMINUBZrm = 17399, |
| 17413 | VPMINUBZrmk = 17400, |
| 17414 | VPMINUBZrmkz = 17401, |
| 17415 | VPMINUBZrr = 17402, |
| 17416 | VPMINUBZrrk = 17403, |
| 17417 | VPMINUBZrrkz = 17404, |
| 17418 | VPMINUBrm = 17405, |
| 17419 | VPMINUBrr = 17406, |
| 17420 | VPMINUDYrm = 17407, |
| 17421 | VPMINUDYrr = 17408, |
| 17422 | VPMINUDZ128rm = 17409, |
| 17423 | VPMINUDZ128rmb = 17410, |
| 17424 | VPMINUDZ128rmbk = 17411, |
| 17425 | VPMINUDZ128rmbkz = 17412, |
| 17426 | VPMINUDZ128rmk = 17413, |
| 17427 | VPMINUDZ128rmkz = 17414, |
| 17428 | VPMINUDZ128rr = 17415, |
| 17429 | VPMINUDZ128rrk = 17416, |
| 17430 | VPMINUDZ128rrkz = 17417, |
| 17431 | VPMINUDZ256rm = 17418, |
| 17432 | VPMINUDZ256rmb = 17419, |
| 17433 | VPMINUDZ256rmbk = 17420, |
| 17434 | VPMINUDZ256rmbkz = 17421, |
| 17435 | VPMINUDZ256rmk = 17422, |
| 17436 | VPMINUDZ256rmkz = 17423, |
| 17437 | VPMINUDZ256rr = 17424, |
| 17438 | VPMINUDZ256rrk = 17425, |
| 17439 | VPMINUDZ256rrkz = 17426, |
| 17440 | VPMINUDZrm = 17427, |
| 17441 | VPMINUDZrmb = 17428, |
| 17442 | VPMINUDZrmbk = 17429, |
| 17443 | VPMINUDZrmbkz = 17430, |
| 17444 | VPMINUDZrmk = 17431, |
| 17445 | VPMINUDZrmkz = 17432, |
| 17446 | VPMINUDZrr = 17433, |
| 17447 | VPMINUDZrrk = 17434, |
| 17448 | VPMINUDZrrkz = 17435, |
| 17449 | VPMINUDrm = 17436, |
| 17450 | VPMINUDrr = 17437, |
| 17451 | VPMINUQZ128rm = 17438, |
| 17452 | VPMINUQZ128rmb = 17439, |
| 17453 | VPMINUQZ128rmbk = 17440, |
| 17454 | VPMINUQZ128rmbkz = 17441, |
| 17455 | VPMINUQZ128rmk = 17442, |
| 17456 | VPMINUQZ128rmkz = 17443, |
| 17457 | VPMINUQZ128rr = 17444, |
| 17458 | VPMINUQZ128rrk = 17445, |
| 17459 | VPMINUQZ128rrkz = 17446, |
| 17460 | VPMINUQZ256rm = 17447, |
| 17461 | VPMINUQZ256rmb = 17448, |
| 17462 | VPMINUQZ256rmbk = 17449, |
| 17463 | VPMINUQZ256rmbkz = 17450, |
| 17464 | VPMINUQZ256rmk = 17451, |
| 17465 | VPMINUQZ256rmkz = 17452, |
| 17466 | VPMINUQZ256rr = 17453, |
| 17467 | VPMINUQZ256rrk = 17454, |
| 17468 | VPMINUQZ256rrkz = 17455, |
| 17469 | VPMINUQZrm = 17456, |
| 17470 | VPMINUQZrmb = 17457, |
| 17471 | VPMINUQZrmbk = 17458, |
| 17472 | VPMINUQZrmbkz = 17459, |
| 17473 | VPMINUQZrmk = 17460, |
| 17474 | VPMINUQZrmkz = 17461, |
| 17475 | VPMINUQZrr = 17462, |
| 17476 | VPMINUQZrrk = 17463, |
| 17477 | VPMINUQZrrkz = 17464, |
| 17478 | VPMINUWYrm = 17465, |
| 17479 | VPMINUWYrr = 17466, |
| 17480 | VPMINUWZ128rm = 17467, |
| 17481 | VPMINUWZ128rmk = 17468, |
| 17482 | VPMINUWZ128rmkz = 17469, |
| 17483 | VPMINUWZ128rr = 17470, |
| 17484 | VPMINUWZ128rrk = 17471, |
| 17485 | VPMINUWZ128rrkz = 17472, |
| 17486 | VPMINUWZ256rm = 17473, |
| 17487 | VPMINUWZ256rmk = 17474, |
| 17488 | VPMINUWZ256rmkz = 17475, |
| 17489 | VPMINUWZ256rr = 17476, |
| 17490 | VPMINUWZ256rrk = 17477, |
| 17491 | VPMINUWZ256rrkz = 17478, |
| 17492 | VPMINUWZrm = 17479, |
| 17493 | VPMINUWZrmk = 17480, |
| 17494 | VPMINUWZrmkz = 17481, |
| 17495 | VPMINUWZrr = 17482, |
| 17496 | VPMINUWZrrk = 17483, |
| 17497 | VPMINUWZrrkz = 17484, |
| 17498 | VPMINUWrm = 17485, |
| 17499 | VPMINUWrr = 17486, |
| 17500 | VPMOVB2MZ128kr = 17487, |
| 17501 | VPMOVB2MZ256kr = 17488, |
| 17502 | VPMOVB2MZkr = 17489, |
| 17503 | VPMOVD2MZ128kr = 17490, |
| 17504 | VPMOVD2MZ256kr = 17491, |
| 17505 | VPMOVD2MZkr = 17492, |
| 17506 | VPMOVDBZ128mr = 17493, |
| 17507 | VPMOVDBZ128mrk = 17494, |
| 17508 | VPMOVDBZ128rr = 17495, |
| 17509 | VPMOVDBZ128rrk = 17496, |
| 17510 | VPMOVDBZ128rrkz = 17497, |
| 17511 | VPMOVDBZ256mr = 17498, |
| 17512 | VPMOVDBZ256mrk = 17499, |
| 17513 | VPMOVDBZ256rr = 17500, |
| 17514 | VPMOVDBZ256rrk = 17501, |
| 17515 | VPMOVDBZ256rrkz = 17502, |
| 17516 | VPMOVDBZmr = 17503, |
| 17517 | VPMOVDBZmrk = 17504, |
| 17518 | VPMOVDBZrr = 17505, |
| 17519 | VPMOVDBZrrk = 17506, |
| 17520 | VPMOVDBZrrkz = 17507, |
| 17521 | VPMOVDWZ128mr = 17508, |
| 17522 | VPMOVDWZ128mrk = 17509, |
| 17523 | VPMOVDWZ128rr = 17510, |
| 17524 | VPMOVDWZ128rrk = 17511, |
| 17525 | VPMOVDWZ128rrkz = 17512, |
| 17526 | VPMOVDWZ256mr = 17513, |
| 17527 | VPMOVDWZ256mrk = 17514, |
| 17528 | VPMOVDWZ256rr = 17515, |
| 17529 | VPMOVDWZ256rrk = 17516, |
| 17530 | VPMOVDWZ256rrkz = 17517, |
| 17531 | VPMOVDWZmr = 17518, |
| 17532 | VPMOVDWZmrk = 17519, |
| 17533 | VPMOVDWZrr = 17520, |
| 17534 | VPMOVDWZrrk = 17521, |
| 17535 | VPMOVDWZrrkz = 17522, |
| 17536 | VPMOVM2BZ128rk = 17523, |
| 17537 | VPMOVM2BZ256rk = 17524, |
| 17538 | VPMOVM2BZrk = 17525, |
| 17539 | VPMOVM2DZ128rk = 17526, |
| 17540 | VPMOVM2DZ256rk = 17527, |
| 17541 | VPMOVM2DZrk = 17528, |
| 17542 | VPMOVM2QZ128rk = 17529, |
| 17543 | VPMOVM2QZ256rk = 17530, |
| 17544 | VPMOVM2QZrk = 17531, |
| 17545 | VPMOVM2WZ128rk = 17532, |
| 17546 | VPMOVM2WZ256rk = 17533, |
| 17547 | VPMOVM2WZrk = 17534, |
| 17548 | VPMOVMSKBYrr = 17535, |
| 17549 | VPMOVMSKBrr = 17536, |
| 17550 | VPMOVQ2MZ128kr = 17537, |
| 17551 | VPMOVQ2MZ256kr = 17538, |
| 17552 | VPMOVQ2MZkr = 17539, |
| 17553 | VPMOVQBZ128mr = 17540, |
| 17554 | VPMOVQBZ128mrk = 17541, |
| 17555 | VPMOVQBZ128rr = 17542, |
| 17556 | VPMOVQBZ128rrk = 17543, |
| 17557 | VPMOVQBZ128rrkz = 17544, |
| 17558 | VPMOVQBZ256mr = 17545, |
| 17559 | VPMOVQBZ256mrk = 17546, |
| 17560 | VPMOVQBZ256rr = 17547, |
| 17561 | VPMOVQBZ256rrk = 17548, |
| 17562 | VPMOVQBZ256rrkz = 17549, |
| 17563 | VPMOVQBZmr = 17550, |
| 17564 | VPMOVQBZmrk = 17551, |
| 17565 | VPMOVQBZrr = 17552, |
| 17566 | VPMOVQBZrrk = 17553, |
| 17567 | VPMOVQBZrrkz = 17554, |
| 17568 | VPMOVQDZ128mr = 17555, |
| 17569 | VPMOVQDZ128mrk = 17556, |
| 17570 | VPMOVQDZ128rr = 17557, |
| 17571 | VPMOVQDZ128rrk = 17558, |
| 17572 | VPMOVQDZ128rrkz = 17559, |
| 17573 | VPMOVQDZ256mr = 17560, |
| 17574 | VPMOVQDZ256mrk = 17561, |
| 17575 | VPMOVQDZ256rr = 17562, |
| 17576 | VPMOVQDZ256rrk = 17563, |
| 17577 | VPMOVQDZ256rrkz = 17564, |
| 17578 | VPMOVQDZmr = 17565, |
| 17579 | VPMOVQDZmrk = 17566, |
| 17580 | VPMOVQDZrr = 17567, |
| 17581 | VPMOVQDZrrk = 17568, |
| 17582 | VPMOVQDZrrkz = 17569, |
| 17583 | VPMOVQWZ128mr = 17570, |
| 17584 | VPMOVQWZ128mrk = 17571, |
| 17585 | VPMOVQWZ128rr = 17572, |
| 17586 | VPMOVQWZ128rrk = 17573, |
| 17587 | VPMOVQWZ128rrkz = 17574, |
| 17588 | VPMOVQWZ256mr = 17575, |
| 17589 | VPMOVQWZ256mrk = 17576, |
| 17590 | VPMOVQWZ256rr = 17577, |
| 17591 | VPMOVQWZ256rrk = 17578, |
| 17592 | VPMOVQWZ256rrkz = 17579, |
| 17593 | VPMOVQWZmr = 17580, |
| 17594 | VPMOVQWZmrk = 17581, |
| 17595 | VPMOVQWZrr = 17582, |
| 17596 | VPMOVQWZrrk = 17583, |
| 17597 | VPMOVQWZrrkz = 17584, |
| 17598 | VPMOVSDBZ128mr = 17585, |
| 17599 | VPMOVSDBZ128mrk = 17586, |
| 17600 | VPMOVSDBZ128rr = 17587, |
| 17601 | VPMOVSDBZ128rrk = 17588, |
| 17602 | VPMOVSDBZ128rrkz = 17589, |
| 17603 | VPMOVSDBZ256mr = 17590, |
| 17604 | VPMOVSDBZ256mrk = 17591, |
| 17605 | VPMOVSDBZ256rr = 17592, |
| 17606 | VPMOVSDBZ256rrk = 17593, |
| 17607 | VPMOVSDBZ256rrkz = 17594, |
| 17608 | VPMOVSDBZmr = 17595, |
| 17609 | VPMOVSDBZmrk = 17596, |
| 17610 | VPMOVSDBZrr = 17597, |
| 17611 | VPMOVSDBZrrk = 17598, |
| 17612 | VPMOVSDBZrrkz = 17599, |
| 17613 | VPMOVSDWZ128mr = 17600, |
| 17614 | VPMOVSDWZ128mrk = 17601, |
| 17615 | VPMOVSDWZ128rr = 17602, |
| 17616 | VPMOVSDWZ128rrk = 17603, |
| 17617 | VPMOVSDWZ128rrkz = 17604, |
| 17618 | VPMOVSDWZ256mr = 17605, |
| 17619 | VPMOVSDWZ256mrk = 17606, |
| 17620 | VPMOVSDWZ256rr = 17607, |
| 17621 | VPMOVSDWZ256rrk = 17608, |
| 17622 | VPMOVSDWZ256rrkz = 17609, |
| 17623 | VPMOVSDWZmr = 17610, |
| 17624 | VPMOVSDWZmrk = 17611, |
| 17625 | VPMOVSDWZrr = 17612, |
| 17626 | VPMOVSDWZrrk = 17613, |
| 17627 | VPMOVSDWZrrkz = 17614, |
| 17628 | VPMOVSQBZ128mr = 17615, |
| 17629 | VPMOVSQBZ128mrk = 17616, |
| 17630 | VPMOVSQBZ128rr = 17617, |
| 17631 | VPMOVSQBZ128rrk = 17618, |
| 17632 | VPMOVSQBZ128rrkz = 17619, |
| 17633 | VPMOVSQBZ256mr = 17620, |
| 17634 | VPMOVSQBZ256mrk = 17621, |
| 17635 | VPMOVSQBZ256rr = 17622, |
| 17636 | VPMOVSQBZ256rrk = 17623, |
| 17637 | VPMOVSQBZ256rrkz = 17624, |
| 17638 | VPMOVSQBZmr = 17625, |
| 17639 | VPMOVSQBZmrk = 17626, |
| 17640 | VPMOVSQBZrr = 17627, |
| 17641 | VPMOVSQBZrrk = 17628, |
| 17642 | VPMOVSQBZrrkz = 17629, |
| 17643 | VPMOVSQDZ128mr = 17630, |
| 17644 | VPMOVSQDZ128mrk = 17631, |
| 17645 | VPMOVSQDZ128rr = 17632, |
| 17646 | VPMOVSQDZ128rrk = 17633, |
| 17647 | VPMOVSQDZ128rrkz = 17634, |
| 17648 | VPMOVSQDZ256mr = 17635, |
| 17649 | VPMOVSQDZ256mrk = 17636, |
| 17650 | VPMOVSQDZ256rr = 17637, |
| 17651 | VPMOVSQDZ256rrk = 17638, |
| 17652 | VPMOVSQDZ256rrkz = 17639, |
| 17653 | VPMOVSQDZmr = 17640, |
| 17654 | VPMOVSQDZmrk = 17641, |
| 17655 | VPMOVSQDZrr = 17642, |
| 17656 | VPMOVSQDZrrk = 17643, |
| 17657 | VPMOVSQDZrrkz = 17644, |
| 17658 | VPMOVSQWZ128mr = 17645, |
| 17659 | VPMOVSQWZ128mrk = 17646, |
| 17660 | VPMOVSQWZ128rr = 17647, |
| 17661 | VPMOVSQWZ128rrk = 17648, |
| 17662 | VPMOVSQWZ128rrkz = 17649, |
| 17663 | VPMOVSQWZ256mr = 17650, |
| 17664 | VPMOVSQWZ256mrk = 17651, |
| 17665 | VPMOVSQWZ256rr = 17652, |
| 17666 | VPMOVSQWZ256rrk = 17653, |
| 17667 | VPMOVSQWZ256rrkz = 17654, |
| 17668 | VPMOVSQWZmr = 17655, |
| 17669 | VPMOVSQWZmrk = 17656, |
| 17670 | VPMOVSQWZrr = 17657, |
| 17671 | VPMOVSQWZrrk = 17658, |
| 17672 | VPMOVSQWZrrkz = 17659, |
| 17673 | VPMOVSWBZ128mr = 17660, |
| 17674 | VPMOVSWBZ128mrk = 17661, |
| 17675 | VPMOVSWBZ128rr = 17662, |
| 17676 | VPMOVSWBZ128rrk = 17663, |
| 17677 | VPMOVSWBZ128rrkz = 17664, |
| 17678 | VPMOVSWBZ256mr = 17665, |
| 17679 | VPMOVSWBZ256mrk = 17666, |
| 17680 | VPMOVSWBZ256rr = 17667, |
| 17681 | VPMOVSWBZ256rrk = 17668, |
| 17682 | VPMOVSWBZ256rrkz = 17669, |
| 17683 | VPMOVSWBZmr = 17670, |
| 17684 | VPMOVSWBZmrk = 17671, |
| 17685 | VPMOVSWBZrr = 17672, |
| 17686 | VPMOVSWBZrrk = 17673, |
| 17687 | VPMOVSWBZrrkz = 17674, |
| 17688 | VPMOVSXBDYrm = 17675, |
| 17689 | VPMOVSXBDYrr = 17676, |
| 17690 | VPMOVSXBDZ128rm = 17677, |
| 17691 | VPMOVSXBDZ128rmk = 17678, |
| 17692 | VPMOVSXBDZ128rmkz = 17679, |
| 17693 | VPMOVSXBDZ128rr = 17680, |
| 17694 | VPMOVSXBDZ128rrk = 17681, |
| 17695 | VPMOVSXBDZ128rrkz = 17682, |
| 17696 | VPMOVSXBDZ256rm = 17683, |
| 17697 | VPMOVSXBDZ256rmk = 17684, |
| 17698 | VPMOVSXBDZ256rmkz = 17685, |
| 17699 | VPMOVSXBDZ256rr = 17686, |
| 17700 | VPMOVSXBDZ256rrk = 17687, |
| 17701 | VPMOVSXBDZ256rrkz = 17688, |
| 17702 | VPMOVSXBDZrm = 17689, |
| 17703 | VPMOVSXBDZrmk = 17690, |
| 17704 | VPMOVSXBDZrmkz = 17691, |
| 17705 | VPMOVSXBDZrr = 17692, |
| 17706 | VPMOVSXBDZrrk = 17693, |
| 17707 | VPMOVSXBDZrrkz = 17694, |
| 17708 | VPMOVSXBDrm = 17695, |
| 17709 | VPMOVSXBDrr = 17696, |
| 17710 | VPMOVSXBQYrm = 17697, |
| 17711 | VPMOVSXBQYrr = 17698, |
| 17712 | VPMOVSXBQZ128rm = 17699, |
| 17713 | VPMOVSXBQZ128rmk = 17700, |
| 17714 | VPMOVSXBQZ128rmkz = 17701, |
| 17715 | VPMOVSXBQZ128rr = 17702, |
| 17716 | VPMOVSXBQZ128rrk = 17703, |
| 17717 | VPMOVSXBQZ128rrkz = 17704, |
| 17718 | VPMOVSXBQZ256rm = 17705, |
| 17719 | VPMOVSXBQZ256rmk = 17706, |
| 17720 | VPMOVSXBQZ256rmkz = 17707, |
| 17721 | VPMOVSXBQZ256rr = 17708, |
| 17722 | VPMOVSXBQZ256rrk = 17709, |
| 17723 | VPMOVSXBQZ256rrkz = 17710, |
| 17724 | VPMOVSXBQZrm = 17711, |
| 17725 | VPMOVSXBQZrmk = 17712, |
| 17726 | VPMOVSXBQZrmkz = 17713, |
| 17727 | VPMOVSXBQZrr = 17714, |
| 17728 | VPMOVSXBQZrrk = 17715, |
| 17729 | VPMOVSXBQZrrkz = 17716, |
| 17730 | VPMOVSXBQrm = 17717, |
| 17731 | VPMOVSXBQrr = 17718, |
| 17732 | VPMOVSXBWYrm = 17719, |
| 17733 | VPMOVSXBWYrr = 17720, |
| 17734 | VPMOVSXBWZ128rm = 17721, |
| 17735 | VPMOVSXBWZ128rmk = 17722, |
| 17736 | VPMOVSXBWZ128rmkz = 17723, |
| 17737 | VPMOVSXBWZ128rr = 17724, |
| 17738 | VPMOVSXBWZ128rrk = 17725, |
| 17739 | VPMOVSXBWZ128rrkz = 17726, |
| 17740 | VPMOVSXBWZ256rm = 17727, |
| 17741 | VPMOVSXBWZ256rmk = 17728, |
| 17742 | VPMOVSXBWZ256rmkz = 17729, |
| 17743 | VPMOVSXBWZ256rr = 17730, |
| 17744 | VPMOVSXBWZ256rrk = 17731, |
| 17745 | VPMOVSXBWZ256rrkz = 17732, |
| 17746 | VPMOVSXBWZrm = 17733, |
| 17747 | VPMOVSXBWZrmk = 17734, |
| 17748 | VPMOVSXBWZrmkz = 17735, |
| 17749 | VPMOVSXBWZrr = 17736, |
| 17750 | VPMOVSXBWZrrk = 17737, |
| 17751 | VPMOVSXBWZrrkz = 17738, |
| 17752 | VPMOVSXBWrm = 17739, |
| 17753 | VPMOVSXBWrr = 17740, |
| 17754 | VPMOVSXDQYrm = 17741, |
| 17755 | VPMOVSXDQYrr = 17742, |
| 17756 | VPMOVSXDQZ128rm = 17743, |
| 17757 | VPMOVSXDQZ128rmk = 17744, |
| 17758 | VPMOVSXDQZ128rmkz = 17745, |
| 17759 | VPMOVSXDQZ128rr = 17746, |
| 17760 | VPMOVSXDQZ128rrk = 17747, |
| 17761 | VPMOVSXDQZ128rrkz = 17748, |
| 17762 | VPMOVSXDQZ256rm = 17749, |
| 17763 | VPMOVSXDQZ256rmk = 17750, |
| 17764 | VPMOVSXDQZ256rmkz = 17751, |
| 17765 | VPMOVSXDQZ256rr = 17752, |
| 17766 | VPMOVSXDQZ256rrk = 17753, |
| 17767 | VPMOVSXDQZ256rrkz = 17754, |
| 17768 | VPMOVSXDQZrm = 17755, |
| 17769 | VPMOVSXDQZrmk = 17756, |
| 17770 | VPMOVSXDQZrmkz = 17757, |
| 17771 | VPMOVSXDQZrr = 17758, |
| 17772 | VPMOVSXDQZrrk = 17759, |
| 17773 | VPMOVSXDQZrrkz = 17760, |
| 17774 | VPMOVSXDQrm = 17761, |
| 17775 | VPMOVSXDQrr = 17762, |
| 17776 | VPMOVSXWDYrm = 17763, |
| 17777 | VPMOVSXWDYrr = 17764, |
| 17778 | VPMOVSXWDZ128rm = 17765, |
| 17779 | VPMOVSXWDZ128rmk = 17766, |
| 17780 | VPMOVSXWDZ128rmkz = 17767, |
| 17781 | VPMOVSXWDZ128rr = 17768, |
| 17782 | VPMOVSXWDZ128rrk = 17769, |
| 17783 | VPMOVSXWDZ128rrkz = 17770, |
| 17784 | VPMOVSXWDZ256rm = 17771, |
| 17785 | VPMOVSXWDZ256rmk = 17772, |
| 17786 | VPMOVSXWDZ256rmkz = 17773, |
| 17787 | VPMOVSXWDZ256rr = 17774, |
| 17788 | VPMOVSXWDZ256rrk = 17775, |
| 17789 | VPMOVSXWDZ256rrkz = 17776, |
| 17790 | VPMOVSXWDZrm = 17777, |
| 17791 | VPMOVSXWDZrmk = 17778, |
| 17792 | VPMOVSXWDZrmkz = 17779, |
| 17793 | VPMOVSXWDZrr = 17780, |
| 17794 | VPMOVSXWDZrrk = 17781, |
| 17795 | VPMOVSXWDZrrkz = 17782, |
| 17796 | VPMOVSXWDrm = 17783, |
| 17797 | VPMOVSXWDrr = 17784, |
| 17798 | VPMOVSXWQYrm = 17785, |
| 17799 | VPMOVSXWQYrr = 17786, |
| 17800 | VPMOVSXWQZ128rm = 17787, |
| 17801 | VPMOVSXWQZ128rmk = 17788, |
| 17802 | VPMOVSXWQZ128rmkz = 17789, |
| 17803 | VPMOVSXWQZ128rr = 17790, |
| 17804 | VPMOVSXWQZ128rrk = 17791, |
| 17805 | VPMOVSXWQZ128rrkz = 17792, |
| 17806 | VPMOVSXWQZ256rm = 17793, |
| 17807 | VPMOVSXWQZ256rmk = 17794, |
| 17808 | VPMOVSXWQZ256rmkz = 17795, |
| 17809 | VPMOVSXWQZ256rr = 17796, |
| 17810 | VPMOVSXWQZ256rrk = 17797, |
| 17811 | VPMOVSXWQZ256rrkz = 17798, |
| 17812 | VPMOVSXWQZrm = 17799, |
| 17813 | VPMOVSXWQZrmk = 17800, |
| 17814 | VPMOVSXWQZrmkz = 17801, |
| 17815 | VPMOVSXWQZrr = 17802, |
| 17816 | VPMOVSXWQZrrk = 17803, |
| 17817 | VPMOVSXWQZrrkz = 17804, |
| 17818 | VPMOVSXWQrm = 17805, |
| 17819 | VPMOVSXWQrr = 17806, |
| 17820 | VPMOVUSDBZ128mr = 17807, |
| 17821 | VPMOVUSDBZ128mrk = 17808, |
| 17822 | VPMOVUSDBZ128rr = 17809, |
| 17823 | VPMOVUSDBZ128rrk = 17810, |
| 17824 | VPMOVUSDBZ128rrkz = 17811, |
| 17825 | VPMOVUSDBZ256mr = 17812, |
| 17826 | VPMOVUSDBZ256mrk = 17813, |
| 17827 | VPMOVUSDBZ256rr = 17814, |
| 17828 | VPMOVUSDBZ256rrk = 17815, |
| 17829 | VPMOVUSDBZ256rrkz = 17816, |
| 17830 | VPMOVUSDBZmr = 17817, |
| 17831 | VPMOVUSDBZmrk = 17818, |
| 17832 | VPMOVUSDBZrr = 17819, |
| 17833 | VPMOVUSDBZrrk = 17820, |
| 17834 | VPMOVUSDBZrrkz = 17821, |
| 17835 | VPMOVUSDWZ128mr = 17822, |
| 17836 | VPMOVUSDWZ128mrk = 17823, |
| 17837 | VPMOVUSDWZ128rr = 17824, |
| 17838 | VPMOVUSDWZ128rrk = 17825, |
| 17839 | VPMOVUSDWZ128rrkz = 17826, |
| 17840 | VPMOVUSDWZ256mr = 17827, |
| 17841 | VPMOVUSDWZ256mrk = 17828, |
| 17842 | VPMOVUSDWZ256rr = 17829, |
| 17843 | VPMOVUSDWZ256rrk = 17830, |
| 17844 | VPMOVUSDWZ256rrkz = 17831, |
| 17845 | VPMOVUSDWZmr = 17832, |
| 17846 | VPMOVUSDWZmrk = 17833, |
| 17847 | VPMOVUSDWZrr = 17834, |
| 17848 | VPMOVUSDWZrrk = 17835, |
| 17849 | VPMOVUSDWZrrkz = 17836, |
| 17850 | VPMOVUSQBZ128mr = 17837, |
| 17851 | VPMOVUSQBZ128mrk = 17838, |
| 17852 | VPMOVUSQBZ128rr = 17839, |
| 17853 | VPMOVUSQBZ128rrk = 17840, |
| 17854 | VPMOVUSQBZ128rrkz = 17841, |
| 17855 | VPMOVUSQBZ256mr = 17842, |
| 17856 | VPMOVUSQBZ256mrk = 17843, |
| 17857 | VPMOVUSQBZ256rr = 17844, |
| 17858 | VPMOVUSQBZ256rrk = 17845, |
| 17859 | VPMOVUSQBZ256rrkz = 17846, |
| 17860 | VPMOVUSQBZmr = 17847, |
| 17861 | VPMOVUSQBZmrk = 17848, |
| 17862 | VPMOVUSQBZrr = 17849, |
| 17863 | VPMOVUSQBZrrk = 17850, |
| 17864 | VPMOVUSQBZrrkz = 17851, |
| 17865 | VPMOVUSQDZ128mr = 17852, |
| 17866 | VPMOVUSQDZ128mrk = 17853, |
| 17867 | VPMOVUSQDZ128rr = 17854, |
| 17868 | VPMOVUSQDZ128rrk = 17855, |
| 17869 | VPMOVUSQDZ128rrkz = 17856, |
| 17870 | VPMOVUSQDZ256mr = 17857, |
| 17871 | VPMOVUSQDZ256mrk = 17858, |
| 17872 | VPMOVUSQDZ256rr = 17859, |
| 17873 | VPMOVUSQDZ256rrk = 17860, |
| 17874 | VPMOVUSQDZ256rrkz = 17861, |
| 17875 | VPMOVUSQDZmr = 17862, |
| 17876 | VPMOVUSQDZmrk = 17863, |
| 17877 | VPMOVUSQDZrr = 17864, |
| 17878 | VPMOVUSQDZrrk = 17865, |
| 17879 | VPMOVUSQDZrrkz = 17866, |
| 17880 | VPMOVUSQWZ128mr = 17867, |
| 17881 | VPMOVUSQWZ128mrk = 17868, |
| 17882 | VPMOVUSQWZ128rr = 17869, |
| 17883 | VPMOVUSQWZ128rrk = 17870, |
| 17884 | VPMOVUSQWZ128rrkz = 17871, |
| 17885 | VPMOVUSQWZ256mr = 17872, |
| 17886 | VPMOVUSQWZ256mrk = 17873, |
| 17887 | VPMOVUSQWZ256rr = 17874, |
| 17888 | VPMOVUSQWZ256rrk = 17875, |
| 17889 | VPMOVUSQWZ256rrkz = 17876, |
| 17890 | VPMOVUSQWZmr = 17877, |
| 17891 | VPMOVUSQWZmrk = 17878, |
| 17892 | VPMOVUSQWZrr = 17879, |
| 17893 | VPMOVUSQWZrrk = 17880, |
| 17894 | VPMOVUSQWZrrkz = 17881, |
| 17895 | VPMOVUSWBZ128mr = 17882, |
| 17896 | VPMOVUSWBZ128mrk = 17883, |
| 17897 | VPMOVUSWBZ128rr = 17884, |
| 17898 | VPMOVUSWBZ128rrk = 17885, |
| 17899 | VPMOVUSWBZ128rrkz = 17886, |
| 17900 | VPMOVUSWBZ256mr = 17887, |
| 17901 | VPMOVUSWBZ256mrk = 17888, |
| 17902 | VPMOVUSWBZ256rr = 17889, |
| 17903 | VPMOVUSWBZ256rrk = 17890, |
| 17904 | VPMOVUSWBZ256rrkz = 17891, |
| 17905 | VPMOVUSWBZmr = 17892, |
| 17906 | VPMOVUSWBZmrk = 17893, |
| 17907 | VPMOVUSWBZrr = 17894, |
| 17908 | VPMOVUSWBZrrk = 17895, |
| 17909 | VPMOVUSWBZrrkz = 17896, |
| 17910 | VPMOVW2MZ128kr = 17897, |
| 17911 | VPMOVW2MZ256kr = 17898, |
| 17912 | VPMOVW2MZkr = 17899, |
| 17913 | VPMOVWBZ128mr = 17900, |
| 17914 | VPMOVWBZ128mrk = 17901, |
| 17915 | VPMOVWBZ128rr = 17902, |
| 17916 | VPMOVWBZ128rrk = 17903, |
| 17917 | VPMOVWBZ128rrkz = 17904, |
| 17918 | VPMOVWBZ256mr = 17905, |
| 17919 | VPMOVWBZ256mrk = 17906, |
| 17920 | VPMOVWBZ256rr = 17907, |
| 17921 | VPMOVWBZ256rrk = 17908, |
| 17922 | VPMOVWBZ256rrkz = 17909, |
| 17923 | VPMOVWBZmr = 17910, |
| 17924 | VPMOVWBZmrk = 17911, |
| 17925 | VPMOVWBZrr = 17912, |
| 17926 | VPMOVWBZrrk = 17913, |
| 17927 | VPMOVWBZrrkz = 17914, |
| 17928 | VPMOVZXBDYrm = 17915, |
| 17929 | VPMOVZXBDYrr = 17916, |
| 17930 | VPMOVZXBDZ128rm = 17917, |
| 17931 | VPMOVZXBDZ128rmk = 17918, |
| 17932 | VPMOVZXBDZ128rmkz = 17919, |
| 17933 | VPMOVZXBDZ128rr = 17920, |
| 17934 | VPMOVZXBDZ128rrk = 17921, |
| 17935 | VPMOVZXBDZ128rrkz = 17922, |
| 17936 | VPMOVZXBDZ256rm = 17923, |
| 17937 | VPMOVZXBDZ256rmk = 17924, |
| 17938 | VPMOVZXBDZ256rmkz = 17925, |
| 17939 | VPMOVZXBDZ256rr = 17926, |
| 17940 | VPMOVZXBDZ256rrk = 17927, |
| 17941 | VPMOVZXBDZ256rrkz = 17928, |
| 17942 | VPMOVZXBDZrm = 17929, |
| 17943 | VPMOVZXBDZrmk = 17930, |
| 17944 | VPMOVZXBDZrmkz = 17931, |
| 17945 | VPMOVZXBDZrr = 17932, |
| 17946 | VPMOVZXBDZrrk = 17933, |
| 17947 | VPMOVZXBDZrrkz = 17934, |
| 17948 | VPMOVZXBDrm = 17935, |
| 17949 | VPMOVZXBDrr = 17936, |
| 17950 | VPMOVZXBQYrm = 17937, |
| 17951 | VPMOVZXBQYrr = 17938, |
| 17952 | VPMOVZXBQZ128rm = 17939, |
| 17953 | VPMOVZXBQZ128rmk = 17940, |
| 17954 | VPMOVZXBQZ128rmkz = 17941, |
| 17955 | VPMOVZXBQZ128rr = 17942, |
| 17956 | VPMOVZXBQZ128rrk = 17943, |
| 17957 | VPMOVZXBQZ128rrkz = 17944, |
| 17958 | VPMOVZXBQZ256rm = 17945, |
| 17959 | VPMOVZXBQZ256rmk = 17946, |
| 17960 | VPMOVZXBQZ256rmkz = 17947, |
| 17961 | VPMOVZXBQZ256rr = 17948, |
| 17962 | VPMOVZXBQZ256rrk = 17949, |
| 17963 | VPMOVZXBQZ256rrkz = 17950, |
| 17964 | VPMOVZXBQZrm = 17951, |
| 17965 | VPMOVZXBQZrmk = 17952, |
| 17966 | VPMOVZXBQZrmkz = 17953, |
| 17967 | VPMOVZXBQZrr = 17954, |
| 17968 | VPMOVZXBQZrrk = 17955, |
| 17969 | VPMOVZXBQZrrkz = 17956, |
| 17970 | VPMOVZXBQrm = 17957, |
| 17971 | VPMOVZXBQrr = 17958, |
| 17972 | VPMOVZXBWYrm = 17959, |
| 17973 | VPMOVZXBWYrr = 17960, |
| 17974 | VPMOVZXBWZ128rm = 17961, |
| 17975 | VPMOVZXBWZ128rmk = 17962, |
| 17976 | VPMOVZXBWZ128rmkz = 17963, |
| 17977 | VPMOVZXBWZ128rr = 17964, |
| 17978 | VPMOVZXBWZ128rrk = 17965, |
| 17979 | VPMOVZXBWZ128rrkz = 17966, |
| 17980 | VPMOVZXBWZ256rm = 17967, |
| 17981 | VPMOVZXBWZ256rmk = 17968, |
| 17982 | VPMOVZXBWZ256rmkz = 17969, |
| 17983 | VPMOVZXBWZ256rr = 17970, |
| 17984 | VPMOVZXBWZ256rrk = 17971, |
| 17985 | VPMOVZXBWZ256rrkz = 17972, |
| 17986 | VPMOVZXBWZrm = 17973, |
| 17987 | VPMOVZXBWZrmk = 17974, |
| 17988 | VPMOVZXBWZrmkz = 17975, |
| 17989 | VPMOVZXBWZrr = 17976, |
| 17990 | VPMOVZXBWZrrk = 17977, |
| 17991 | VPMOVZXBWZrrkz = 17978, |
| 17992 | VPMOVZXBWrm = 17979, |
| 17993 | VPMOVZXBWrr = 17980, |
| 17994 | VPMOVZXDQYrm = 17981, |
| 17995 | VPMOVZXDQYrr = 17982, |
| 17996 | VPMOVZXDQZ128rm = 17983, |
| 17997 | VPMOVZXDQZ128rmk = 17984, |
| 17998 | VPMOVZXDQZ128rmkz = 17985, |
| 17999 | VPMOVZXDQZ128rr = 17986, |
| 18000 | VPMOVZXDQZ128rrk = 17987, |
| 18001 | VPMOVZXDQZ128rrkz = 17988, |
| 18002 | VPMOVZXDQZ256rm = 17989, |
| 18003 | VPMOVZXDQZ256rmk = 17990, |
| 18004 | VPMOVZXDQZ256rmkz = 17991, |
| 18005 | VPMOVZXDQZ256rr = 17992, |
| 18006 | VPMOVZXDQZ256rrk = 17993, |
| 18007 | VPMOVZXDQZ256rrkz = 17994, |
| 18008 | VPMOVZXDQZrm = 17995, |
| 18009 | VPMOVZXDQZrmk = 17996, |
| 18010 | VPMOVZXDQZrmkz = 17997, |
| 18011 | VPMOVZXDQZrr = 17998, |
| 18012 | VPMOVZXDQZrrk = 17999, |
| 18013 | VPMOVZXDQZrrkz = 18000, |
| 18014 | VPMOVZXDQrm = 18001, |
| 18015 | VPMOVZXDQrr = 18002, |
| 18016 | VPMOVZXWDYrm = 18003, |
| 18017 | VPMOVZXWDYrr = 18004, |
| 18018 | VPMOVZXWDZ128rm = 18005, |
| 18019 | VPMOVZXWDZ128rmk = 18006, |
| 18020 | VPMOVZXWDZ128rmkz = 18007, |
| 18021 | VPMOVZXWDZ128rr = 18008, |
| 18022 | VPMOVZXWDZ128rrk = 18009, |
| 18023 | VPMOVZXWDZ128rrkz = 18010, |
| 18024 | VPMOVZXWDZ256rm = 18011, |
| 18025 | VPMOVZXWDZ256rmk = 18012, |
| 18026 | VPMOVZXWDZ256rmkz = 18013, |
| 18027 | VPMOVZXWDZ256rr = 18014, |
| 18028 | VPMOVZXWDZ256rrk = 18015, |
| 18029 | VPMOVZXWDZ256rrkz = 18016, |
| 18030 | VPMOVZXWDZrm = 18017, |
| 18031 | VPMOVZXWDZrmk = 18018, |
| 18032 | VPMOVZXWDZrmkz = 18019, |
| 18033 | VPMOVZXWDZrr = 18020, |
| 18034 | VPMOVZXWDZrrk = 18021, |
| 18035 | VPMOVZXWDZrrkz = 18022, |
| 18036 | VPMOVZXWDrm = 18023, |
| 18037 | VPMOVZXWDrr = 18024, |
| 18038 | VPMOVZXWQYrm = 18025, |
| 18039 | VPMOVZXWQYrr = 18026, |
| 18040 | VPMOVZXWQZ128rm = 18027, |
| 18041 | VPMOVZXWQZ128rmk = 18028, |
| 18042 | VPMOVZXWQZ128rmkz = 18029, |
| 18043 | VPMOVZXWQZ128rr = 18030, |
| 18044 | VPMOVZXWQZ128rrk = 18031, |
| 18045 | VPMOVZXWQZ128rrkz = 18032, |
| 18046 | VPMOVZXWQZ256rm = 18033, |
| 18047 | VPMOVZXWQZ256rmk = 18034, |
| 18048 | VPMOVZXWQZ256rmkz = 18035, |
| 18049 | VPMOVZXWQZ256rr = 18036, |
| 18050 | VPMOVZXWQZ256rrk = 18037, |
| 18051 | VPMOVZXWQZ256rrkz = 18038, |
| 18052 | VPMOVZXWQZrm = 18039, |
| 18053 | VPMOVZXWQZrmk = 18040, |
| 18054 | VPMOVZXWQZrmkz = 18041, |
| 18055 | VPMOVZXWQZrr = 18042, |
| 18056 | VPMOVZXWQZrrk = 18043, |
| 18057 | VPMOVZXWQZrrkz = 18044, |
| 18058 | VPMOVZXWQrm = 18045, |
| 18059 | VPMOVZXWQrr = 18046, |
| 18060 | VPMULDQYrm = 18047, |
| 18061 | VPMULDQYrr = 18048, |
| 18062 | VPMULDQZ128rm = 18049, |
| 18063 | VPMULDQZ128rmb = 18050, |
| 18064 | VPMULDQZ128rmbk = 18051, |
| 18065 | VPMULDQZ128rmbkz = 18052, |
| 18066 | VPMULDQZ128rmk = 18053, |
| 18067 | VPMULDQZ128rmkz = 18054, |
| 18068 | VPMULDQZ128rr = 18055, |
| 18069 | VPMULDQZ128rrk = 18056, |
| 18070 | VPMULDQZ128rrkz = 18057, |
| 18071 | VPMULDQZ256rm = 18058, |
| 18072 | VPMULDQZ256rmb = 18059, |
| 18073 | VPMULDQZ256rmbk = 18060, |
| 18074 | VPMULDQZ256rmbkz = 18061, |
| 18075 | VPMULDQZ256rmk = 18062, |
| 18076 | VPMULDQZ256rmkz = 18063, |
| 18077 | VPMULDQZ256rr = 18064, |
| 18078 | VPMULDQZ256rrk = 18065, |
| 18079 | VPMULDQZ256rrkz = 18066, |
| 18080 | VPMULDQZrm = 18067, |
| 18081 | VPMULDQZrmb = 18068, |
| 18082 | VPMULDQZrmbk = 18069, |
| 18083 | VPMULDQZrmbkz = 18070, |
| 18084 | VPMULDQZrmk = 18071, |
| 18085 | VPMULDQZrmkz = 18072, |
| 18086 | VPMULDQZrr = 18073, |
| 18087 | VPMULDQZrrk = 18074, |
| 18088 | VPMULDQZrrkz = 18075, |
| 18089 | VPMULDQrm = 18076, |
| 18090 | VPMULDQrr = 18077, |
| 18091 | VPMULHRSWYrm = 18078, |
| 18092 | VPMULHRSWYrr = 18079, |
| 18093 | VPMULHRSWZ128rm = 18080, |
| 18094 | VPMULHRSWZ128rmk = 18081, |
| 18095 | VPMULHRSWZ128rmkz = 18082, |
| 18096 | VPMULHRSWZ128rr = 18083, |
| 18097 | VPMULHRSWZ128rrk = 18084, |
| 18098 | VPMULHRSWZ128rrkz = 18085, |
| 18099 | VPMULHRSWZ256rm = 18086, |
| 18100 | VPMULHRSWZ256rmk = 18087, |
| 18101 | VPMULHRSWZ256rmkz = 18088, |
| 18102 | VPMULHRSWZ256rr = 18089, |
| 18103 | VPMULHRSWZ256rrk = 18090, |
| 18104 | VPMULHRSWZ256rrkz = 18091, |
| 18105 | VPMULHRSWZrm = 18092, |
| 18106 | VPMULHRSWZrmk = 18093, |
| 18107 | VPMULHRSWZrmkz = 18094, |
| 18108 | VPMULHRSWZrr = 18095, |
| 18109 | VPMULHRSWZrrk = 18096, |
| 18110 | VPMULHRSWZrrkz = 18097, |
| 18111 | VPMULHRSWrm = 18098, |
| 18112 | VPMULHRSWrr = 18099, |
| 18113 | VPMULHUWYrm = 18100, |
| 18114 | VPMULHUWYrr = 18101, |
| 18115 | VPMULHUWZ128rm = 18102, |
| 18116 | VPMULHUWZ128rmk = 18103, |
| 18117 | VPMULHUWZ128rmkz = 18104, |
| 18118 | VPMULHUWZ128rr = 18105, |
| 18119 | VPMULHUWZ128rrk = 18106, |
| 18120 | VPMULHUWZ128rrkz = 18107, |
| 18121 | VPMULHUWZ256rm = 18108, |
| 18122 | VPMULHUWZ256rmk = 18109, |
| 18123 | VPMULHUWZ256rmkz = 18110, |
| 18124 | VPMULHUWZ256rr = 18111, |
| 18125 | VPMULHUWZ256rrk = 18112, |
| 18126 | VPMULHUWZ256rrkz = 18113, |
| 18127 | VPMULHUWZrm = 18114, |
| 18128 | VPMULHUWZrmk = 18115, |
| 18129 | VPMULHUWZrmkz = 18116, |
| 18130 | VPMULHUWZrr = 18117, |
| 18131 | VPMULHUWZrrk = 18118, |
| 18132 | VPMULHUWZrrkz = 18119, |
| 18133 | VPMULHUWrm = 18120, |
| 18134 | VPMULHUWrr = 18121, |
| 18135 | VPMULHWYrm = 18122, |
| 18136 | VPMULHWYrr = 18123, |
| 18137 | VPMULHWZ128rm = 18124, |
| 18138 | VPMULHWZ128rmk = 18125, |
| 18139 | VPMULHWZ128rmkz = 18126, |
| 18140 | VPMULHWZ128rr = 18127, |
| 18141 | VPMULHWZ128rrk = 18128, |
| 18142 | VPMULHWZ128rrkz = 18129, |
| 18143 | VPMULHWZ256rm = 18130, |
| 18144 | VPMULHWZ256rmk = 18131, |
| 18145 | VPMULHWZ256rmkz = 18132, |
| 18146 | VPMULHWZ256rr = 18133, |
| 18147 | VPMULHWZ256rrk = 18134, |
| 18148 | VPMULHWZ256rrkz = 18135, |
| 18149 | VPMULHWZrm = 18136, |
| 18150 | VPMULHWZrmk = 18137, |
| 18151 | VPMULHWZrmkz = 18138, |
| 18152 | VPMULHWZrr = 18139, |
| 18153 | VPMULHWZrrk = 18140, |
| 18154 | VPMULHWZrrkz = 18141, |
| 18155 | VPMULHWrm = 18142, |
| 18156 | VPMULHWrr = 18143, |
| 18157 | VPMULLDYrm = 18144, |
| 18158 | VPMULLDYrr = 18145, |
| 18159 | VPMULLDZ128rm = 18146, |
| 18160 | VPMULLDZ128rmb = 18147, |
| 18161 | VPMULLDZ128rmbk = 18148, |
| 18162 | VPMULLDZ128rmbkz = 18149, |
| 18163 | VPMULLDZ128rmk = 18150, |
| 18164 | VPMULLDZ128rmkz = 18151, |
| 18165 | VPMULLDZ128rr = 18152, |
| 18166 | VPMULLDZ128rrk = 18153, |
| 18167 | VPMULLDZ128rrkz = 18154, |
| 18168 | VPMULLDZ256rm = 18155, |
| 18169 | VPMULLDZ256rmb = 18156, |
| 18170 | VPMULLDZ256rmbk = 18157, |
| 18171 | VPMULLDZ256rmbkz = 18158, |
| 18172 | VPMULLDZ256rmk = 18159, |
| 18173 | VPMULLDZ256rmkz = 18160, |
| 18174 | VPMULLDZ256rr = 18161, |
| 18175 | VPMULLDZ256rrk = 18162, |
| 18176 | VPMULLDZ256rrkz = 18163, |
| 18177 | VPMULLDZrm = 18164, |
| 18178 | VPMULLDZrmb = 18165, |
| 18179 | VPMULLDZrmbk = 18166, |
| 18180 | VPMULLDZrmbkz = 18167, |
| 18181 | VPMULLDZrmk = 18168, |
| 18182 | VPMULLDZrmkz = 18169, |
| 18183 | VPMULLDZrr = 18170, |
| 18184 | VPMULLDZrrk = 18171, |
| 18185 | VPMULLDZrrkz = 18172, |
| 18186 | VPMULLDrm = 18173, |
| 18187 | VPMULLDrr = 18174, |
| 18188 | VPMULLQZ128rm = 18175, |
| 18189 | VPMULLQZ128rmb = 18176, |
| 18190 | VPMULLQZ128rmbk = 18177, |
| 18191 | VPMULLQZ128rmbkz = 18178, |
| 18192 | VPMULLQZ128rmk = 18179, |
| 18193 | VPMULLQZ128rmkz = 18180, |
| 18194 | VPMULLQZ128rr = 18181, |
| 18195 | VPMULLQZ128rrk = 18182, |
| 18196 | VPMULLQZ128rrkz = 18183, |
| 18197 | VPMULLQZ256rm = 18184, |
| 18198 | VPMULLQZ256rmb = 18185, |
| 18199 | VPMULLQZ256rmbk = 18186, |
| 18200 | VPMULLQZ256rmbkz = 18187, |
| 18201 | VPMULLQZ256rmk = 18188, |
| 18202 | VPMULLQZ256rmkz = 18189, |
| 18203 | VPMULLQZ256rr = 18190, |
| 18204 | VPMULLQZ256rrk = 18191, |
| 18205 | VPMULLQZ256rrkz = 18192, |
| 18206 | VPMULLQZrm = 18193, |
| 18207 | VPMULLQZrmb = 18194, |
| 18208 | VPMULLQZrmbk = 18195, |
| 18209 | VPMULLQZrmbkz = 18196, |
| 18210 | VPMULLQZrmk = 18197, |
| 18211 | VPMULLQZrmkz = 18198, |
| 18212 | VPMULLQZrr = 18199, |
| 18213 | VPMULLQZrrk = 18200, |
| 18214 | VPMULLQZrrkz = 18201, |
| 18215 | VPMULLWYrm = 18202, |
| 18216 | VPMULLWYrr = 18203, |
| 18217 | VPMULLWZ128rm = 18204, |
| 18218 | VPMULLWZ128rmk = 18205, |
| 18219 | VPMULLWZ128rmkz = 18206, |
| 18220 | VPMULLWZ128rr = 18207, |
| 18221 | VPMULLWZ128rrk = 18208, |
| 18222 | VPMULLWZ128rrkz = 18209, |
| 18223 | VPMULLWZ256rm = 18210, |
| 18224 | VPMULLWZ256rmk = 18211, |
| 18225 | VPMULLWZ256rmkz = 18212, |
| 18226 | VPMULLWZ256rr = 18213, |
| 18227 | VPMULLWZ256rrk = 18214, |
| 18228 | VPMULLWZ256rrkz = 18215, |
| 18229 | VPMULLWZrm = 18216, |
| 18230 | VPMULLWZrmk = 18217, |
| 18231 | VPMULLWZrmkz = 18218, |
| 18232 | VPMULLWZrr = 18219, |
| 18233 | VPMULLWZrrk = 18220, |
| 18234 | VPMULLWZrrkz = 18221, |
| 18235 | VPMULLWrm = 18222, |
| 18236 | VPMULLWrr = 18223, |
| 18237 | VPMULTISHIFTQBZ128rm = 18224, |
| 18238 | VPMULTISHIFTQBZ128rmb = 18225, |
| 18239 | VPMULTISHIFTQBZ128rmbk = 18226, |
| 18240 | VPMULTISHIFTQBZ128rmbkz = 18227, |
| 18241 | VPMULTISHIFTQBZ128rmk = 18228, |
| 18242 | VPMULTISHIFTQBZ128rmkz = 18229, |
| 18243 | VPMULTISHIFTQBZ128rr = 18230, |
| 18244 | VPMULTISHIFTQBZ128rrk = 18231, |
| 18245 | VPMULTISHIFTQBZ128rrkz = 18232, |
| 18246 | VPMULTISHIFTQBZ256rm = 18233, |
| 18247 | VPMULTISHIFTQBZ256rmb = 18234, |
| 18248 | VPMULTISHIFTQBZ256rmbk = 18235, |
| 18249 | VPMULTISHIFTQBZ256rmbkz = 18236, |
| 18250 | VPMULTISHIFTQBZ256rmk = 18237, |
| 18251 | VPMULTISHIFTQBZ256rmkz = 18238, |
| 18252 | VPMULTISHIFTQBZ256rr = 18239, |
| 18253 | VPMULTISHIFTQBZ256rrk = 18240, |
| 18254 | VPMULTISHIFTQBZ256rrkz = 18241, |
| 18255 | VPMULTISHIFTQBZrm = 18242, |
| 18256 | VPMULTISHIFTQBZrmb = 18243, |
| 18257 | VPMULTISHIFTQBZrmbk = 18244, |
| 18258 | VPMULTISHIFTQBZrmbkz = 18245, |
| 18259 | VPMULTISHIFTQBZrmk = 18246, |
| 18260 | VPMULTISHIFTQBZrmkz = 18247, |
| 18261 | VPMULTISHIFTQBZrr = 18248, |
| 18262 | VPMULTISHIFTQBZrrk = 18249, |
| 18263 | VPMULTISHIFTQBZrrkz = 18250, |
| 18264 | VPMULUDQYrm = 18251, |
| 18265 | VPMULUDQYrr = 18252, |
| 18266 | VPMULUDQZ128rm = 18253, |
| 18267 | VPMULUDQZ128rmb = 18254, |
| 18268 | VPMULUDQZ128rmbk = 18255, |
| 18269 | VPMULUDQZ128rmbkz = 18256, |
| 18270 | VPMULUDQZ128rmk = 18257, |
| 18271 | VPMULUDQZ128rmkz = 18258, |
| 18272 | VPMULUDQZ128rr = 18259, |
| 18273 | VPMULUDQZ128rrk = 18260, |
| 18274 | VPMULUDQZ128rrkz = 18261, |
| 18275 | VPMULUDQZ256rm = 18262, |
| 18276 | VPMULUDQZ256rmb = 18263, |
| 18277 | VPMULUDQZ256rmbk = 18264, |
| 18278 | VPMULUDQZ256rmbkz = 18265, |
| 18279 | VPMULUDQZ256rmk = 18266, |
| 18280 | VPMULUDQZ256rmkz = 18267, |
| 18281 | VPMULUDQZ256rr = 18268, |
| 18282 | VPMULUDQZ256rrk = 18269, |
| 18283 | VPMULUDQZ256rrkz = 18270, |
| 18284 | VPMULUDQZrm = 18271, |
| 18285 | VPMULUDQZrmb = 18272, |
| 18286 | VPMULUDQZrmbk = 18273, |
| 18287 | VPMULUDQZrmbkz = 18274, |
| 18288 | VPMULUDQZrmk = 18275, |
| 18289 | VPMULUDQZrmkz = 18276, |
| 18290 | VPMULUDQZrr = 18277, |
| 18291 | VPMULUDQZrrk = 18278, |
| 18292 | VPMULUDQZrrkz = 18279, |
| 18293 | VPMULUDQrm = 18280, |
| 18294 | VPMULUDQrr = 18281, |
| 18295 | VPOPCNTBZ128rm = 18282, |
| 18296 | VPOPCNTBZ128rmk = 18283, |
| 18297 | VPOPCNTBZ128rmkz = 18284, |
| 18298 | VPOPCNTBZ128rr = 18285, |
| 18299 | VPOPCNTBZ128rrk = 18286, |
| 18300 | VPOPCNTBZ128rrkz = 18287, |
| 18301 | VPOPCNTBZ256rm = 18288, |
| 18302 | VPOPCNTBZ256rmk = 18289, |
| 18303 | VPOPCNTBZ256rmkz = 18290, |
| 18304 | VPOPCNTBZ256rr = 18291, |
| 18305 | VPOPCNTBZ256rrk = 18292, |
| 18306 | VPOPCNTBZ256rrkz = 18293, |
| 18307 | VPOPCNTBZrm = 18294, |
| 18308 | VPOPCNTBZrmk = 18295, |
| 18309 | VPOPCNTBZrmkz = 18296, |
| 18310 | VPOPCNTBZrr = 18297, |
| 18311 | VPOPCNTBZrrk = 18298, |
| 18312 | VPOPCNTBZrrkz = 18299, |
| 18313 | VPOPCNTDZ128rm = 18300, |
| 18314 | VPOPCNTDZ128rmb = 18301, |
| 18315 | VPOPCNTDZ128rmbk = 18302, |
| 18316 | VPOPCNTDZ128rmbkz = 18303, |
| 18317 | VPOPCNTDZ128rmk = 18304, |
| 18318 | VPOPCNTDZ128rmkz = 18305, |
| 18319 | VPOPCNTDZ128rr = 18306, |
| 18320 | VPOPCNTDZ128rrk = 18307, |
| 18321 | VPOPCNTDZ128rrkz = 18308, |
| 18322 | VPOPCNTDZ256rm = 18309, |
| 18323 | VPOPCNTDZ256rmb = 18310, |
| 18324 | VPOPCNTDZ256rmbk = 18311, |
| 18325 | VPOPCNTDZ256rmbkz = 18312, |
| 18326 | VPOPCNTDZ256rmk = 18313, |
| 18327 | VPOPCNTDZ256rmkz = 18314, |
| 18328 | VPOPCNTDZ256rr = 18315, |
| 18329 | VPOPCNTDZ256rrk = 18316, |
| 18330 | VPOPCNTDZ256rrkz = 18317, |
| 18331 | VPOPCNTDZrm = 18318, |
| 18332 | VPOPCNTDZrmb = 18319, |
| 18333 | VPOPCNTDZrmbk = 18320, |
| 18334 | VPOPCNTDZrmbkz = 18321, |
| 18335 | VPOPCNTDZrmk = 18322, |
| 18336 | VPOPCNTDZrmkz = 18323, |
| 18337 | VPOPCNTDZrr = 18324, |
| 18338 | VPOPCNTDZrrk = 18325, |
| 18339 | VPOPCNTDZrrkz = 18326, |
| 18340 | VPOPCNTQZ128rm = 18327, |
| 18341 | VPOPCNTQZ128rmb = 18328, |
| 18342 | VPOPCNTQZ128rmbk = 18329, |
| 18343 | VPOPCNTQZ128rmbkz = 18330, |
| 18344 | VPOPCNTQZ128rmk = 18331, |
| 18345 | VPOPCNTQZ128rmkz = 18332, |
| 18346 | VPOPCNTQZ128rr = 18333, |
| 18347 | VPOPCNTQZ128rrk = 18334, |
| 18348 | VPOPCNTQZ128rrkz = 18335, |
| 18349 | VPOPCNTQZ256rm = 18336, |
| 18350 | VPOPCNTQZ256rmb = 18337, |
| 18351 | VPOPCNTQZ256rmbk = 18338, |
| 18352 | VPOPCNTQZ256rmbkz = 18339, |
| 18353 | VPOPCNTQZ256rmk = 18340, |
| 18354 | VPOPCNTQZ256rmkz = 18341, |
| 18355 | VPOPCNTQZ256rr = 18342, |
| 18356 | VPOPCNTQZ256rrk = 18343, |
| 18357 | VPOPCNTQZ256rrkz = 18344, |
| 18358 | VPOPCNTQZrm = 18345, |
| 18359 | VPOPCNTQZrmb = 18346, |
| 18360 | VPOPCNTQZrmbk = 18347, |
| 18361 | VPOPCNTQZrmbkz = 18348, |
| 18362 | VPOPCNTQZrmk = 18349, |
| 18363 | VPOPCNTQZrmkz = 18350, |
| 18364 | VPOPCNTQZrr = 18351, |
| 18365 | VPOPCNTQZrrk = 18352, |
| 18366 | VPOPCNTQZrrkz = 18353, |
| 18367 | VPOPCNTWZ128rm = 18354, |
| 18368 | VPOPCNTWZ128rmk = 18355, |
| 18369 | VPOPCNTWZ128rmkz = 18356, |
| 18370 | VPOPCNTWZ128rr = 18357, |
| 18371 | VPOPCNTWZ128rrk = 18358, |
| 18372 | VPOPCNTWZ128rrkz = 18359, |
| 18373 | VPOPCNTWZ256rm = 18360, |
| 18374 | VPOPCNTWZ256rmk = 18361, |
| 18375 | VPOPCNTWZ256rmkz = 18362, |
| 18376 | VPOPCNTWZ256rr = 18363, |
| 18377 | VPOPCNTWZ256rrk = 18364, |
| 18378 | VPOPCNTWZ256rrkz = 18365, |
| 18379 | VPOPCNTWZrm = 18366, |
| 18380 | VPOPCNTWZrmk = 18367, |
| 18381 | VPOPCNTWZrmkz = 18368, |
| 18382 | VPOPCNTWZrr = 18369, |
| 18383 | VPOPCNTWZrrk = 18370, |
| 18384 | VPOPCNTWZrrkz = 18371, |
| 18385 | VPORDZ128rm = 18372, |
| 18386 | VPORDZ128rmb = 18373, |
| 18387 | VPORDZ128rmbk = 18374, |
| 18388 | VPORDZ128rmbkz = 18375, |
| 18389 | VPORDZ128rmk = 18376, |
| 18390 | VPORDZ128rmkz = 18377, |
| 18391 | VPORDZ128rr = 18378, |
| 18392 | VPORDZ128rrk = 18379, |
| 18393 | VPORDZ128rrkz = 18380, |
| 18394 | VPORDZ256rm = 18381, |
| 18395 | VPORDZ256rmb = 18382, |
| 18396 | VPORDZ256rmbk = 18383, |
| 18397 | VPORDZ256rmbkz = 18384, |
| 18398 | VPORDZ256rmk = 18385, |
| 18399 | VPORDZ256rmkz = 18386, |
| 18400 | VPORDZ256rr = 18387, |
| 18401 | VPORDZ256rrk = 18388, |
| 18402 | VPORDZ256rrkz = 18389, |
| 18403 | VPORDZrm = 18390, |
| 18404 | VPORDZrmb = 18391, |
| 18405 | VPORDZrmbk = 18392, |
| 18406 | VPORDZrmbkz = 18393, |
| 18407 | VPORDZrmk = 18394, |
| 18408 | VPORDZrmkz = 18395, |
| 18409 | VPORDZrr = 18396, |
| 18410 | VPORDZrrk = 18397, |
| 18411 | VPORDZrrkz = 18398, |
| 18412 | VPORQZ128rm = 18399, |
| 18413 | VPORQZ128rmb = 18400, |
| 18414 | VPORQZ128rmbk = 18401, |
| 18415 | VPORQZ128rmbkz = 18402, |
| 18416 | VPORQZ128rmk = 18403, |
| 18417 | VPORQZ128rmkz = 18404, |
| 18418 | VPORQZ128rr = 18405, |
| 18419 | VPORQZ128rrk = 18406, |
| 18420 | VPORQZ128rrkz = 18407, |
| 18421 | VPORQZ256rm = 18408, |
| 18422 | VPORQZ256rmb = 18409, |
| 18423 | VPORQZ256rmbk = 18410, |
| 18424 | VPORQZ256rmbkz = 18411, |
| 18425 | VPORQZ256rmk = 18412, |
| 18426 | VPORQZ256rmkz = 18413, |
| 18427 | VPORQZ256rr = 18414, |
| 18428 | VPORQZ256rrk = 18415, |
| 18429 | VPORQZ256rrkz = 18416, |
| 18430 | VPORQZrm = 18417, |
| 18431 | VPORQZrmb = 18418, |
| 18432 | VPORQZrmbk = 18419, |
| 18433 | VPORQZrmbkz = 18420, |
| 18434 | VPORQZrmk = 18421, |
| 18435 | VPORQZrmkz = 18422, |
| 18436 | VPORQZrr = 18423, |
| 18437 | VPORQZrrk = 18424, |
| 18438 | VPORQZrrkz = 18425, |
| 18439 | VPORYrm = 18426, |
| 18440 | VPORYrr = 18427, |
| 18441 | VPORrm = 18428, |
| 18442 | VPORrr = 18429, |
| 18443 | VPPERMrmr = 18430, |
| 18444 | VPPERMrrm = 18431, |
| 18445 | VPPERMrrr = 18432, |
| 18446 | VPPERMrrr_REV = 18433, |
| 18447 | VPROLDZ128mbi = 18434, |
| 18448 | VPROLDZ128mbik = 18435, |
| 18449 | VPROLDZ128mbikz = 18436, |
| 18450 | VPROLDZ128mi = 18437, |
| 18451 | VPROLDZ128mik = 18438, |
| 18452 | VPROLDZ128mikz = 18439, |
| 18453 | VPROLDZ128ri = 18440, |
| 18454 | VPROLDZ128rik = 18441, |
| 18455 | VPROLDZ128rikz = 18442, |
| 18456 | VPROLDZ256mbi = 18443, |
| 18457 | VPROLDZ256mbik = 18444, |
| 18458 | VPROLDZ256mbikz = 18445, |
| 18459 | VPROLDZ256mi = 18446, |
| 18460 | VPROLDZ256mik = 18447, |
| 18461 | VPROLDZ256mikz = 18448, |
| 18462 | VPROLDZ256ri = 18449, |
| 18463 | VPROLDZ256rik = 18450, |
| 18464 | VPROLDZ256rikz = 18451, |
| 18465 | VPROLDZmbi = 18452, |
| 18466 | VPROLDZmbik = 18453, |
| 18467 | VPROLDZmbikz = 18454, |
| 18468 | VPROLDZmi = 18455, |
| 18469 | VPROLDZmik = 18456, |
| 18470 | VPROLDZmikz = 18457, |
| 18471 | VPROLDZri = 18458, |
| 18472 | VPROLDZrik = 18459, |
| 18473 | VPROLDZrikz = 18460, |
| 18474 | VPROLQZ128mbi = 18461, |
| 18475 | VPROLQZ128mbik = 18462, |
| 18476 | VPROLQZ128mbikz = 18463, |
| 18477 | VPROLQZ128mi = 18464, |
| 18478 | VPROLQZ128mik = 18465, |
| 18479 | VPROLQZ128mikz = 18466, |
| 18480 | VPROLQZ128ri = 18467, |
| 18481 | VPROLQZ128rik = 18468, |
| 18482 | VPROLQZ128rikz = 18469, |
| 18483 | VPROLQZ256mbi = 18470, |
| 18484 | VPROLQZ256mbik = 18471, |
| 18485 | VPROLQZ256mbikz = 18472, |
| 18486 | VPROLQZ256mi = 18473, |
| 18487 | VPROLQZ256mik = 18474, |
| 18488 | VPROLQZ256mikz = 18475, |
| 18489 | VPROLQZ256ri = 18476, |
| 18490 | VPROLQZ256rik = 18477, |
| 18491 | VPROLQZ256rikz = 18478, |
| 18492 | VPROLQZmbi = 18479, |
| 18493 | VPROLQZmbik = 18480, |
| 18494 | VPROLQZmbikz = 18481, |
| 18495 | VPROLQZmi = 18482, |
| 18496 | VPROLQZmik = 18483, |
| 18497 | VPROLQZmikz = 18484, |
| 18498 | VPROLQZri = 18485, |
| 18499 | VPROLQZrik = 18486, |
| 18500 | VPROLQZrikz = 18487, |
| 18501 | VPROLVDZ128rm = 18488, |
| 18502 | VPROLVDZ128rmb = 18489, |
| 18503 | VPROLVDZ128rmbk = 18490, |
| 18504 | VPROLVDZ128rmbkz = 18491, |
| 18505 | VPROLVDZ128rmk = 18492, |
| 18506 | VPROLVDZ128rmkz = 18493, |
| 18507 | VPROLVDZ128rr = 18494, |
| 18508 | VPROLVDZ128rrk = 18495, |
| 18509 | VPROLVDZ128rrkz = 18496, |
| 18510 | VPROLVDZ256rm = 18497, |
| 18511 | VPROLVDZ256rmb = 18498, |
| 18512 | VPROLVDZ256rmbk = 18499, |
| 18513 | VPROLVDZ256rmbkz = 18500, |
| 18514 | VPROLVDZ256rmk = 18501, |
| 18515 | VPROLVDZ256rmkz = 18502, |
| 18516 | VPROLVDZ256rr = 18503, |
| 18517 | VPROLVDZ256rrk = 18504, |
| 18518 | VPROLVDZ256rrkz = 18505, |
| 18519 | VPROLVDZrm = 18506, |
| 18520 | VPROLVDZrmb = 18507, |
| 18521 | VPROLVDZrmbk = 18508, |
| 18522 | VPROLVDZrmbkz = 18509, |
| 18523 | VPROLVDZrmk = 18510, |
| 18524 | VPROLVDZrmkz = 18511, |
| 18525 | VPROLVDZrr = 18512, |
| 18526 | VPROLVDZrrk = 18513, |
| 18527 | VPROLVDZrrkz = 18514, |
| 18528 | VPROLVQZ128rm = 18515, |
| 18529 | VPROLVQZ128rmb = 18516, |
| 18530 | VPROLVQZ128rmbk = 18517, |
| 18531 | VPROLVQZ128rmbkz = 18518, |
| 18532 | VPROLVQZ128rmk = 18519, |
| 18533 | VPROLVQZ128rmkz = 18520, |
| 18534 | VPROLVQZ128rr = 18521, |
| 18535 | VPROLVQZ128rrk = 18522, |
| 18536 | VPROLVQZ128rrkz = 18523, |
| 18537 | VPROLVQZ256rm = 18524, |
| 18538 | VPROLVQZ256rmb = 18525, |
| 18539 | VPROLVQZ256rmbk = 18526, |
| 18540 | VPROLVQZ256rmbkz = 18527, |
| 18541 | VPROLVQZ256rmk = 18528, |
| 18542 | VPROLVQZ256rmkz = 18529, |
| 18543 | VPROLVQZ256rr = 18530, |
| 18544 | VPROLVQZ256rrk = 18531, |
| 18545 | VPROLVQZ256rrkz = 18532, |
| 18546 | VPROLVQZrm = 18533, |
| 18547 | VPROLVQZrmb = 18534, |
| 18548 | VPROLVQZrmbk = 18535, |
| 18549 | VPROLVQZrmbkz = 18536, |
| 18550 | VPROLVQZrmk = 18537, |
| 18551 | VPROLVQZrmkz = 18538, |
| 18552 | VPROLVQZrr = 18539, |
| 18553 | VPROLVQZrrk = 18540, |
| 18554 | VPROLVQZrrkz = 18541, |
| 18555 | VPRORDZ128mbi = 18542, |
| 18556 | VPRORDZ128mbik = 18543, |
| 18557 | VPRORDZ128mbikz = 18544, |
| 18558 | VPRORDZ128mi = 18545, |
| 18559 | VPRORDZ128mik = 18546, |
| 18560 | VPRORDZ128mikz = 18547, |
| 18561 | VPRORDZ128ri = 18548, |
| 18562 | VPRORDZ128rik = 18549, |
| 18563 | VPRORDZ128rikz = 18550, |
| 18564 | VPRORDZ256mbi = 18551, |
| 18565 | VPRORDZ256mbik = 18552, |
| 18566 | VPRORDZ256mbikz = 18553, |
| 18567 | VPRORDZ256mi = 18554, |
| 18568 | VPRORDZ256mik = 18555, |
| 18569 | VPRORDZ256mikz = 18556, |
| 18570 | VPRORDZ256ri = 18557, |
| 18571 | VPRORDZ256rik = 18558, |
| 18572 | VPRORDZ256rikz = 18559, |
| 18573 | VPRORDZmbi = 18560, |
| 18574 | VPRORDZmbik = 18561, |
| 18575 | VPRORDZmbikz = 18562, |
| 18576 | VPRORDZmi = 18563, |
| 18577 | VPRORDZmik = 18564, |
| 18578 | VPRORDZmikz = 18565, |
| 18579 | VPRORDZri = 18566, |
| 18580 | VPRORDZrik = 18567, |
| 18581 | VPRORDZrikz = 18568, |
| 18582 | VPRORQZ128mbi = 18569, |
| 18583 | VPRORQZ128mbik = 18570, |
| 18584 | VPRORQZ128mbikz = 18571, |
| 18585 | VPRORQZ128mi = 18572, |
| 18586 | VPRORQZ128mik = 18573, |
| 18587 | VPRORQZ128mikz = 18574, |
| 18588 | VPRORQZ128ri = 18575, |
| 18589 | VPRORQZ128rik = 18576, |
| 18590 | VPRORQZ128rikz = 18577, |
| 18591 | VPRORQZ256mbi = 18578, |
| 18592 | VPRORQZ256mbik = 18579, |
| 18593 | VPRORQZ256mbikz = 18580, |
| 18594 | VPRORQZ256mi = 18581, |
| 18595 | VPRORQZ256mik = 18582, |
| 18596 | VPRORQZ256mikz = 18583, |
| 18597 | VPRORQZ256ri = 18584, |
| 18598 | VPRORQZ256rik = 18585, |
| 18599 | VPRORQZ256rikz = 18586, |
| 18600 | VPRORQZmbi = 18587, |
| 18601 | VPRORQZmbik = 18588, |
| 18602 | VPRORQZmbikz = 18589, |
| 18603 | VPRORQZmi = 18590, |
| 18604 | VPRORQZmik = 18591, |
| 18605 | VPRORQZmikz = 18592, |
| 18606 | VPRORQZri = 18593, |
| 18607 | VPRORQZrik = 18594, |
| 18608 | VPRORQZrikz = 18595, |
| 18609 | VPRORVDZ128rm = 18596, |
| 18610 | VPRORVDZ128rmb = 18597, |
| 18611 | VPRORVDZ128rmbk = 18598, |
| 18612 | VPRORVDZ128rmbkz = 18599, |
| 18613 | VPRORVDZ128rmk = 18600, |
| 18614 | VPRORVDZ128rmkz = 18601, |
| 18615 | VPRORVDZ128rr = 18602, |
| 18616 | VPRORVDZ128rrk = 18603, |
| 18617 | VPRORVDZ128rrkz = 18604, |
| 18618 | VPRORVDZ256rm = 18605, |
| 18619 | VPRORVDZ256rmb = 18606, |
| 18620 | VPRORVDZ256rmbk = 18607, |
| 18621 | VPRORVDZ256rmbkz = 18608, |
| 18622 | VPRORVDZ256rmk = 18609, |
| 18623 | VPRORVDZ256rmkz = 18610, |
| 18624 | VPRORVDZ256rr = 18611, |
| 18625 | VPRORVDZ256rrk = 18612, |
| 18626 | VPRORVDZ256rrkz = 18613, |
| 18627 | VPRORVDZrm = 18614, |
| 18628 | VPRORVDZrmb = 18615, |
| 18629 | VPRORVDZrmbk = 18616, |
| 18630 | VPRORVDZrmbkz = 18617, |
| 18631 | VPRORVDZrmk = 18618, |
| 18632 | VPRORVDZrmkz = 18619, |
| 18633 | VPRORVDZrr = 18620, |
| 18634 | VPRORVDZrrk = 18621, |
| 18635 | VPRORVDZrrkz = 18622, |
| 18636 | VPRORVQZ128rm = 18623, |
| 18637 | VPRORVQZ128rmb = 18624, |
| 18638 | VPRORVQZ128rmbk = 18625, |
| 18639 | VPRORVQZ128rmbkz = 18626, |
| 18640 | VPRORVQZ128rmk = 18627, |
| 18641 | VPRORVQZ128rmkz = 18628, |
| 18642 | VPRORVQZ128rr = 18629, |
| 18643 | VPRORVQZ128rrk = 18630, |
| 18644 | VPRORVQZ128rrkz = 18631, |
| 18645 | VPRORVQZ256rm = 18632, |
| 18646 | VPRORVQZ256rmb = 18633, |
| 18647 | VPRORVQZ256rmbk = 18634, |
| 18648 | VPRORVQZ256rmbkz = 18635, |
| 18649 | VPRORVQZ256rmk = 18636, |
| 18650 | VPRORVQZ256rmkz = 18637, |
| 18651 | VPRORVQZ256rr = 18638, |
| 18652 | VPRORVQZ256rrk = 18639, |
| 18653 | VPRORVQZ256rrkz = 18640, |
| 18654 | VPRORVQZrm = 18641, |
| 18655 | VPRORVQZrmb = 18642, |
| 18656 | VPRORVQZrmbk = 18643, |
| 18657 | VPRORVQZrmbkz = 18644, |
| 18658 | VPRORVQZrmk = 18645, |
| 18659 | VPRORVQZrmkz = 18646, |
| 18660 | VPRORVQZrr = 18647, |
| 18661 | VPRORVQZrrk = 18648, |
| 18662 | VPRORVQZrrkz = 18649, |
| 18663 | VPROTBmi = 18650, |
| 18664 | VPROTBmr = 18651, |
| 18665 | VPROTBri = 18652, |
| 18666 | VPROTBrm = 18653, |
| 18667 | VPROTBrr = 18654, |
| 18668 | VPROTBrr_REV = 18655, |
| 18669 | VPROTDmi = 18656, |
| 18670 | VPROTDmr = 18657, |
| 18671 | VPROTDri = 18658, |
| 18672 | VPROTDrm = 18659, |
| 18673 | VPROTDrr = 18660, |
| 18674 | VPROTDrr_REV = 18661, |
| 18675 | VPROTQmi = 18662, |
| 18676 | VPROTQmr = 18663, |
| 18677 | VPROTQri = 18664, |
| 18678 | VPROTQrm = 18665, |
| 18679 | VPROTQrr = 18666, |
| 18680 | VPROTQrr_REV = 18667, |
| 18681 | VPROTWmi = 18668, |
| 18682 | VPROTWmr = 18669, |
| 18683 | VPROTWri = 18670, |
| 18684 | VPROTWrm = 18671, |
| 18685 | VPROTWrr = 18672, |
| 18686 | VPROTWrr_REV = 18673, |
| 18687 | VPSADBWYrm = 18674, |
| 18688 | VPSADBWYrr = 18675, |
| 18689 | VPSADBWZ128rm = 18676, |
| 18690 | VPSADBWZ128rr = 18677, |
| 18691 | VPSADBWZ256rm = 18678, |
| 18692 | VPSADBWZ256rr = 18679, |
| 18693 | VPSADBWZrm = 18680, |
| 18694 | VPSADBWZrr = 18681, |
| 18695 | VPSADBWrm = 18682, |
| 18696 | VPSADBWrr = 18683, |
| 18697 | VPSCATTERDDZ128mr = 18684, |
| 18698 | VPSCATTERDDZ256mr = 18685, |
| 18699 | VPSCATTERDDZmr = 18686, |
| 18700 | VPSCATTERDQZ128mr = 18687, |
| 18701 | VPSCATTERDQZ256mr = 18688, |
| 18702 | VPSCATTERDQZmr = 18689, |
| 18703 | VPSCATTERQDZ128mr = 18690, |
| 18704 | VPSCATTERQDZ256mr = 18691, |
| 18705 | VPSCATTERQDZmr = 18692, |
| 18706 | VPSCATTERQQZ128mr = 18693, |
| 18707 | VPSCATTERQQZ256mr = 18694, |
| 18708 | VPSCATTERQQZmr = 18695, |
| 18709 | VPSHABmr = 18696, |
| 18710 | VPSHABrm = 18697, |
| 18711 | VPSHABrr = 18698, |
| 18712 | VPSHABrr_REV = 18699, |
| 18713 | VPSHADmr = 18700, |
| 18714 | VPSHADrm = 18701, |
| 18715 | VPSHADrr = 18702, |
| 18716 | VPSHADrr_REV = 18703, |
| 18717 | VPSHAQmr = 18704, |
| 18718 | VPSHAQrm = 18705, |
| 18719 | VPSHAQrr = 18706, |
| 18720 | VPSHAQrr_REV = 18707, |
| 18721 | VPSHAWmr = 18708, |
| 18722 | VPSHAWrm = 18709, |
| 18723 | VPSHAWrr = 18710, |
| 18724 | VPSHAWrr_REV = 18711, |
| 18725 | VPSHLBmr = 18712, |
| 18726 | VPSHLBrm = 18713, |
| 18727 | VPSHLBrr = 18714, |
| 18728 | VPSHLBrr_REV = 18715, |
| 18729 | VPSHLDDZ128rmbi = 18716, |
| 18730 | VPSHLDDZ128rmbik = 18717, |
| 18731 | VPSHLDDZ128rmbikz = 18718, |
| 18732 | VPSHLDDZ128rmi = 18719, |
| 18733 | VPSHLDDZ128rmik = 18720, |
| 18734 | VPSHLDDZ128rmikz = 18721, |
| 18735 | VPSHLDDZ128rri = 18722, |
| 18736 | VPSHLDDZ128rrik = 18723, |
| 18737 | VPSHLDDZ128rrikz = 18724, |
| 18738 | VPSHLDDZ256rmbi = 18725, |
| 18739 | VPSHLDDZ256rmbik = 18726, |
| 18740 | VPSHLDDZ256rmbikz = 18727, |
| 18741 | VPSHLDDZ256rmi = 18728, |
| 18742 | VPSHLDDZ256rmik = 18729, |
| 18743 | VPSHLDDZ256rmikz = 18730, |
| 18744 | VPSHLDDZ256rri = 18731, |
| 18745 | VPSHLDDZ256rrik = 18732, |
| 18746 | VPSHLDDZ256rrikz = 18733, |
| 18747 | VPSHLDDZrmbi = 18734, |
| 18748 | VPSHLDDZrmbik = 18735, |
| 18749 | VPSHLDDZrmbikz = 18736, |
| 18750 | VPSHLDDZrmi = 18737, |
| 18751 | VPSHLDDZrmik = 18738, |
| 18752 | VPSHLDDZrmikz = 18739, |
| 18753 | VPSHLDDZrri = 18740, |
| 18754 | VPSHLDDZrrik = 18741, |
| 18755 | VPSHLDDZrrikz = 18742, |
| 18756 | VPSHLDQZ128rmbi = 18743, |
| 18757 | VPSHLDQZ128rmbik = 18744, |
| 18758 | VPSHLDQZ128rmbikz = 18745, |
| 18759 | VPSHLDQZ128rmi = 18746, |
| 18760 | VPSHLDQZ128rmik = 18747, |
| 18761 | VPSHLDQZ128rmikz = 18748, |
| 18762 | VPSHLDQZ128rri = 18749, |
| 18763 | VPSHLDQZ128rrik = 18750, |
| 18764 | VPSHLDQZ128rrikz = 18751, |
| 18765 | VPSHLDQZ256rmbi = 18752, |
| 18766 | VPSHLDQZ256rmbik = 18753, |
| 18767 | VPSHLDQZ256rmbikz = 18754, |
| 18768 | VPSHLDQZ256rmi = 18755, |
| 18769 | VPSHLDQZ256rmik = 18756, |
| 18770 | VPSHLDQZ256rmikz = 18757, |
| 18771 | VPSHLDQZ256rri = 18758, |
| 18772 | VPSHLDQZ256rrik = 18759, |
| 18773 | VPSHLDQZ256rrikz = 18760, |
| 18774 | VPSHLDQZrmbi = 18761, |
| 18775 | VPSHLDQZrmbik = 18762, |
| 18776 | VPSHLDQZrmbikz = 18763, |
| 18777 | VPSHLDQZrmi = 18764, |
| 18778 | VPSHLDQZrmik = 18765, |
| 18779 | VPSHLDQZrmikz = 18766, |
| 18780 | VPSHLDQZrri = 18767, |
| 18781 | VPSHLDQZrrik = 18768, |
| 18782 | VPSHLDQZrrikz = 18769, |
| 18783 | VPSHLDVDZ128m = 18770, |
| 18784 | VPSHLDVDZ128mb = 18771, |
| 18785 | VPSHLDVDZ128mbk = 18772, |
| 18786 | VPSHLDVDZ128mbkz = 18773, |
| 18787 | VPSHLDVDZ128mk = 18774, |
| 18788 | VPSHLDVDZ128mkz = 18775, |
| 18789 | VPSHLDVDZ128r = 18776, |
| 18790 | VPSHLDVDZ128rk = 18777, |
| 18791 | VPSHLDVDZ128rkz = 18778, |
| 18792 | VPSHLDVDZ256m = 18779, |
| 18793 | VPSHLDVDZ256mb = 18780, |
| 18794 | VPSHLDVDZ256mbk = 18781, |
| 18795 | VPSHLDVDZ256mbkz = 18782, |
| 18796 | VPSHLDVDZ256mk = 18783, |
| 18797 | VPSHLDVDZ256mkz = 18784, |
| 18798 | VPSHLDVDZ256r = 18785, |
| 18799 | VPSHLDVDZ256rk = 18786, |
| 18800 | VPSHLDVDZ256rkz = 18787, |
| 18801 | VPSHLDVDZm = 18788, |
| 18802 | VPSHLDVDZmb = 18789, |
| 18803 | VPSHLDVDZmbk = 18790, |
| 18804 | VPSHLDVDZmbkz = 18791, |
| 18805 | VPSHLDVDZmk = 18792, |
| 18806 | VPSHLDVDZmkz = 18793, |
| 18807 | VPSHLDVDZr = 18794, |
| 18808 | VPSHLDVDZrk = 18795, |
| 18809 | VPSHLDVDZrkz = 18796, |
| 18810 | VPSHLDVQZ128m = 18797, |
| 18811 | VPSHLDVQZ128mb = 18798, |
| 18812 | VPSHLDVQZ128mbk = 18799, |
| 18813 | VPSHLDVQZ128mbkz = 18800, |
| 18814 | VPSHLDVQZ128mk = 18801, |
| 18815 | VPSHLDVQZ128mkz = 18802, |
| 18816 | VPSHLDVQZ128r = 18803, |
| 18817 | VPSHLDVQZ128rk = 18804, |
| 18818 | VPSHLDVQZ128rkz = 18805, |
| 18819 | VPSHLDVQZ256m = 18806, |
| 18820 | VPSHLDVQZ256mb = 18807, |
| 18821 | VPSHLDVQZ256mbk = 18808, |
| 18822 | VPSHLDVQZ256mbkz = 18809, |
| 18823 | VPSHLDVQZ256mk = 18810, |
| 18824 | VPSHLDVQZ256mkz = 18811, |
| 18825 | VPSHLDVQZ256r = 18812, |
| 18826 | VPSHLDVQZ256rk = 18813, |
| 18827 | VPSHLDVQZ256rkz = 18814, |
| 18828 | VPSHLDVQZm = 18815, |
| 18829 | VPSHLDVQZmb = 18816, |
| 18830 | VPSHLDVQZmbk = 18817, |
| 18831 | VPSHLDVQZmbkz = 18818, |
| 18832 | VPSHLDVQZmk = 18819, |
| 18833 | VPSHLDVQZmkz = 18820, |
| 18834 | VPSHLDVQZr = 18821, |
| 18835 | VPSHLDVQZrk = 18822, |
| 18836 | VPSHLDVQZrkz = 18823, |
| 18837 | VPSHLDVWZ128m = 18824, |
| 18838 | VPSHLDVWZ128mk = 18825, |
| 18839 | VPSHLDVWZ128mkz = 18826, |
| 18840 | VPSHLDVWZ128r = 18827, |
| 18841 | VPSHLDVWZ128rk = 18828, |
| 18842 | VPSHLDVWZ128rkz = 18829, |
| 18843 | VPSHLDVWZ256m = 18830, |
| 18844 | VPSHLDVWZ256mk = 18831, |
| 18845 | VPSHLDVWZ256mkz = 18832, |
| 18846 | VPSHLDVWZ256r = 18833, |
| 18847 | VPSHLDVWZ256rk = 18834, |
| 18848 | VPSHLDVWZ256rkz = 18835, |
| 18849 | VPSHLDVWZm = 18836, |
| 18850 | VPSHLDVWZmk = 18837, |
| 18851 | VPSHLDVWZmkz = 18838, |
| 18852 | VPSHLDVWZr = 18839, |
| 18853 | VPSHLDVWZrk = 18840, |
| 18854 | VPSHLDVWZrkz = 18841, |
| 18855 | VPSHLDWZ128rmi = 18842, |
| 18856 | VPSHLDWZ128rmik = 18843, |
| 18857 | VPSHLDWZ128rmikz = 18844, |
| 18858 | VPSHLDWZ128rri = 18845, |
| 18859 | VPSHLDWZ128rrik = 18846, |
| 18860 | VPSHLDWZ128rrikz = 18847, |
| 18861 | VPSHLDWZ256rmi = 18848, |
| 18862 | VPSHLDWZ256rmik = 18849, |
| 18863 | VPSHLDWZ256rmikz = 18850, |
| 18864 | VPSHLDWZ256rri = 18851, |
| 18865 | VPSHLDWZ256rrik = 18852, |
| 18866 | VPSHLDWZ256rrikz = 18853, |
| 18867 | VPSHLDWZrmi = 18854, |
| 18868 | VPSHLDWZrmik = 18855, |
| 18869 | VPSHLDWZrmikz = 18856, |
| 18870 | VPSHLDWZrri = 18857, |
| 18871 | VPSHLDWZrrik = 18858, |
| 18872 | VPSHLDWZrrikz = 18859, |
| 18873 | VPSHLDmr = 18860, |
| 18874 | VPSHLDrm = 18861, |
| 18875 | VPSHLDrr = 18862, |
| 18876 | VPSHLDrr_REV = 18863, |
| 18877 | VPSHLQmr = 18864, |
| 18878 | VPSHLQrm = 18865, |
| 18879 | VPSHLQrr = 18866, |
| 18880 | VPSHLQrr_REV = 18867, |
| 18881 | VPSHLWmr = 18868, |
| 18882 | VPSHLWrm = 18869, |
| 18883 | VPSHLWrr = 18870, |
| 18884 | VPSHLWrr_REV = 18871, |
| 18885 | VPSHRDDZ128rmbi = 18872, |
| 18886 | VPSHRDDZ128rmbik = 18873, |
| 18887 | VPSHRDDZ128rmbikz = 18874, |
| 18888 | VPSHRDDZ128rmi = 18875, |
| 18889 | VPSHRDDZ128rmik = 18876, |
| 18890 | VPSHRDDZ128rmikz = 18877, |
| 18891 | VPSHRDDZ128rri = 18878, |
| 18892 | VPSHRDDZ128rrik = 18879, |
| 18893 | VPSHRDDZ128rrikz = 18880, |
| 18894 | VPSHRDDZ256rmbi = 18881, |
| 18895 | VPSHRDDZ256rmbik = 18882, |
| 18896 | VPSHRDDZ256rmbikz = 18883, |
| 18897 | VPSHRDDZ256rmi = 18884, |
| 18898 | VPSHRDDZ256rmik = 18885, |
| 18899 | VPSHRDDZ256rmikz = 18886, |
| 18900 | VPSHRDDZ256rri = 18887, |
| 18901 | VPSHRDDZ256rrik = 18888, |
| 18902 | VPSHRDDZ256rrikz = 18889, |
| 18903 | VPSHRDDZrmbi = 18890, |
| 18904 | VPSHRDDZrmbik = 18891, |
| 18905 | VPSHRDDZrmbikz = 18892, |
| 18906 | VPSHRDDZrmi = 18893, |
| 18907 | VPSHRDDZrmik = 18894, |
| 18908 | VPSHRDDZrmikz = 18895, |
| 18909 | VPSHRDDZrri = 18896, |
| 18910 | VPSHRDDZrrik = 18897, |
| 18911 | VPSHRDDZrrikz = 18898, |
| 18912 | VPSHRDQZ128rmbi = 18899, |
| 18913 | VPSHRDQZ128rmbik = 18900, |
| 18914 | VPSHRDQZ128rmbikz = 18901, |
| 18915 | VPSHRDQZ128rmi = 18902, |
| 18916 | VPSHRDQZ128rmik = 18903, |
| 18917 | VPSHRDQZ128rmikz = 18904, |
| 18918 | VPSHRDQZ128rri = 18905, |
| 18919 | VPSHRDQZ128rrik = 18906, |
| 18920 | VPSHRDQZ128rrikz = 18907, |
| 18921 | VPSHRDQZ256rmbi = 18908, |
| 18922 | VPSHRDQZ256rmbik = 18909, |
| 18923 | VPSHRDQZ256rmbikz = 18910, |
| 18924 | VPSHRDQZ256rmi = 18911, |
| 18925 | VPSHRDQZ256rmik = 18912, |
| 18926 | VPSHRDQZ256rmikz = 18913, |
| 18927 | VPSHRDQZ256rri = 18914, |
| 18928 | VPSHRDQZ256rrik = 18915, |
| 18929 | VPSHRDQZ256rrikz = 18916, |
| 18930 | VPSHRDQZrmbi = 18917, |
| 18931 | VPSHRDQZrmbik = 18918, |
| 18932 | VPSHRDQZrmbikz = 18919, |
| 18933 | VPSHRDQZrmi = 18920, |
| 18934 | VPSHRDQZrmik = 18921, |
| 18935 | VPSHRDQZrmikz = 18922, |
| 18936 | VPSHRDQZrri = 18923, |
| 18937 | VPSHRDQZrrik = 18924, |
| 18938 | VPSHRDQZrrikz = 18925, |
| 18939 | VPSHRDVDZ128m = 18926, |
| 18940 | VPSHRDVDZ128mb = 18927, |
| 18941 | VPSHRDVDZ128mbk = 18928, |
| 18942 | VPSHRDVDZ128mbkz = 18929, |
| 18943 | VPSHRDVDZ128mk = 18930, |
| 18944 | VPSHRDVDZ128mkz = 18931, |
| 18945 | VPSHRDVDZ128r = 18932, |
| 18946 | VPSHRDVDZ128rk = 18933, |
| 18947 | VPSHRDVDZ128rkz = 18934, |
| 18948 | VPSHRDVDZ256m = 18935, |
| 18949 | VPSHRDVDZ256mb = 18936, |
| 18950 | VPSHRDVDZ256mbk = 18937, |
| 18951 | VPSHRDVDZ256mbkz = 18938, |
| 18952 | VPSHRDVDZ256mk = 18939, |
| 18953 | VPSHRDVDZ256mkz = 18940, |
| 18954 | VPSHRDVDZ256r = 18941, |
| 18955 | VPSHRDVDZ256rk = 18942, |
| 18956 | VPSHRDVDZ256rkz = 18943, |
| 18957 | VPSHRDVDZm = 18944, |
| 18958 | VPSHRDVDZmb = 18945, |
| 18959 | VPSHRDVDZmbk = 18946, |
| 18960 | VPSHRDVDZmbkz = 18947, |
| 18961 | VPSHRDVDZmk = 18948, |
| 18962 | VPSHRDVDZmkz = 18949, |
| 18963 | VPSHRDVDZr = 18950, |
| 18964 | VPSHRDVDZrk = 18951, |
| 18965 | VPSHRDVDZrkz = 18952, |
| 18966 | VPSHRDVQZ128m = 18953, |
| 18967 | VPSHRDVQZ128mb = 18954, |
| 18968 | VPSHRDVQZ128mbk = 18955, |
| 18969 | VPSHRDVQZ128mbkz = 18956, |
| 18970 | VPSHRDVQZ128mk = 18957, |
| 18971 | VPSHRDVQZ128mkz = 18958, |
| 18972 | VPSHRDVQZ128r = 18959, |
| 18973 | VPSHRDVQZ128rk = 18960, |
| 18974 | VPSHRDVQZ128rkz = 18961, |
| 18975 | VPSHRDVQZ256m = 18962, |
| 18976 | VPSHRDVQZ256mb = 18963, |
| 18977 | VPSHRDVQZ256mbk = 18964, |
| 18978 | VPSHRDVQZ256mbkz = 18965, |
| 18979 | VPSHRDVQZ256mk = 18966, |
| 18980 | VPSHRDVQZ256mkz = 18967, |
| 18981 | VPSHRDVQZ256r = 18968, |
| 18982 | VPSHRDVQZ256rk = 18969, |
| 18983 | VPSHRDVQZ256rkz = 18970, |
| 18984 | VPSHRDVQZm = 18971, |
| 18985 | VPSHRDVQZmb = 18972, |
| 18986 | VPSHRDVQZmbk = 18973, |
| 18987 | VPSHRDVQZmbkz = 18974, |
| 18988 | VPSHRDVQZmk = 18975, |
| 18989 | VPSHRDVQZmkz = 18976, |
| 18990 | VPSHRDVQZr = 18977, |
| 18991 | VPSHRDVQZrk = 18978, |
| 18992 | VPSHRDVQZrkz = 18979, |
| 18993 | VPSHRDVWZ128m = 18980, |
| 18994 | VPSHRDVWZ128mk = 18981, |
| 18995 | VPSHRDVWZ128mkz = 18982, |
| 18996 | VPSHRDVWZ128r = 18983, |
| 18997 | VPSHRDVWZ128rk = 18984, |
| 18998 | VPSHRDVWZ128rkz = 18985, |
| 18999 | VPSHRDVWZ256m = 18986, |
| 19000 | VPSHRDVWZ256mk = 18987, |
| 19001 | VPSHRDVWZ256mkz = 18988, |
| 19002 | VPSHRDVWZ256r = 18989, |
| 19003 | VPSHRDVWZ256rk = 18990, |
| 19004 | VPSHRDVWZ256rkz = 18991, |
| 19005 | VPSHRDVWZm = 18992, |
| 19006 | VPSHRDVWZmk = 18993, |
| 19007 | VPSHRDVWZmkz = 18994, |
| 19008 | VPSHRDVWZr = 18995, |
| 19009 | VPSHRDVWZrk = 18996, |
| 19010 | VPSHRDVWZrkz = 18997, |
| 19011 | VPSHRDWZ128rmi = 18998, |
| 19012 | VPSHRDWZ128rmik = 18999, |
| 19013 | VPSHRDWZ128rmikz = 19000, |
| 19014 | VPSHRDWZ128rri = 19001, |
| 19015 | VPSHRDWZ128rrik = 19002, |
| 19016 | VPSHRDWZ128rrikz = 19003, |
| 19017 | VPSHRDWZ256rmi = 19004, |
| 19018 | VPSHRDWZ256rmik = 19005, |
| 19019 | VPSHRDWZ256rmikz = 19006, |
| 19020 | VPSHRDWZ256rri = 19007, |
| 19021 | VPSHRDWZ256rrik = 19008, |
| 19022 | VPSHRDWZ256rrikz = 19009, |
| 19023 | VPSHRDWZrmi = 19010, |
| 19024 | VPSHRDWZrmik = 19011, |
| 19025 | VPSHRDWZrmikz = 19012, |
| 19026 | VPSHRDWZrri = 19013, |
| 19027 | VPSHRDWZrrik = 19014, |
| 19028 | VPSHRDWZrrikz = 19015, |
| 19029 | VPSHUFBITQMBZ128rm = 19016, |
| 19030 | VPSHUFBITQMBZ128rmk = 19017, |
| 19031 | VPSHUFBITQMBZ128rr = 19018, |
| 19032 | VPSHUFBITQMBZ128rrk = 19019, |
| 19033 | VPSHUFBITQMBZ256rm = 19020, |
| 19034 | VPSHUFBITQMBZ256rmk = 19021, |
| 19035 | VPSHUFBITQMBZ256rr = 19022, |
| 19036 | VPSHUFBITQMBZ256rrk = 19023, |
| 19037 | VPSHUFBITQMBZrm = 19024, |
| 19038 | VPSHUFBITQMBZrmk = 19025, |
| 19039 | VPSHUFBITQMBZrr = 19026, |
| 19040 | VPSHUFBITQMBZrrk = 19027, |
| 19041 | VPSHUFBYrm = 19028, |
| 19042 | VPSHUFBYrr = 19029, |
| 19043 | VPSHUFBZ128rm = 19030, |
| 19044 | VPSHUFBZ128rmk = 19031, |
| 19045 | VPSHUFBZ128rmkz = 19032, |
| 19046 | VPSHUFBZ128rr = 19033, |
| 19047 | VPSHUFBZ128rrk = 19034, |
| 19048 | VPSHUFBZ128rrkz = 19035, |
| 19049 | VPSHUFBZ256rm = 19036, |
| 19050 | VPSHUFBZ256rmk = 19037, |
| 19051 | VPSHUFBZ256rmkz = 19038, |
| 19052 | VPSHUFBZ256rr = 19039, |
| 19053 | VPSHUFBZ256rrk = 19040, |
| 19054 | VPSHUFBZ256rrkz = 19041, |
| 19055 | VPSHUFBZrm = 19042, |
| 19056 | VPSHUFBZrmk = 19043, |
| 19057 | VPSHUFBZrmkz = 19044, |
| 19058 | VPSHUFBZrr = 19045, |
| 19059 | VPSHUFBZrrk = 19046, |
| 19060 | VPSHUFBZrrkz = 19047, |
| 19061 | VPSHUFBrm = 19048, |
| 19062 | VPSHUFBrr = 19049, |
| 19063 | VPSHUFDYmi = 19050, |
| 19064 | VPSHUFDYri = 19051, |
| 19065 | VPSHUFDZ128mbi = 19052, |
| 19066 | VPSHUFDZ128mbik = 19053, |
| 19067 | VPSHUFDZ128mbikz = 19054, |
| 19068 | VPSHUFDZ128mi = 19055, |
| 19069 | VPSHUFDZ128mik = 19056, |
| 19070 | VPSHUFDZ128mikz = 19057, |
| 19071 | VPSHUFDZ128ri = 19058, |
| 19072 | VPSHUFDZ128rik = 19059, |
| 19073 | VPSHUFDZ128rikz = 19060, |
| 19074 | VPSHUFDZ256mbi = 19061, |
| 19075 | VPSHUFDZ256mbik = 19062, |
| 19076 | VPSHUFDZ256mbikz = 19063, |
| 19077 | VPSHUFDZ256mi = 19064, |
| 19078 | VPSHUFDZ256mik = 19065, |
| 19079 | VPSHUFDZ256mikz = 19066, |
| 19080 | VPSHUFDZ256ri = 19067, |
| 19081 | VPSHUFDZ256rik = 19068, |
| 19082 | VPSHUFDZ256rikz = 19069, |
| 19083 | VPSHUFDZmbi = 19070, |
| 19084 | VPSHUFDZmbik = 19071, |
| 19085 | VPSHUFDZmbikz = 19072, |
| 19086 | VPSHUFDZmi = 19073, |
| 19087 | VPSHUFDZmik = 19074, |
| 19088 | VPSHUFDZmikz = 19075, |
| 19089 | VPSHUFDZri = 19076, |
| 19090 | VPSHUFDZrik = 19077, |
| 19091 | VPSHUFDZrikz = 19078, |
| 19092 | VPSHUFDmi = 19079, |
| 19093 | VPSHUFDri = 19080, |
| 19094 | VPSHUFHWYmi = 19081, |
| 19095 | VPSHUFHWYri = 19082, |
| 19096 | VPSHUFHWZ128mi = 19083, |
| 19097 | VPSHUFHWZ128mik = 19084, |
| 19098 | VPSHUFHWZ128mikz = 19085, |
| 19099 | VPSHUFHWZ128ri = 19086, |
| 19100 | VPSHUFHWZ128rik = 19087, |
| 19101 | VPSHUFHWZ128rikz = 19088, |
| 19102 | VPSHUFHWZ256mi = 19089, |
| 19103 | VPSHUFHWZ256mik = 19090, |
| 19104 | VPSHUFHWZ256mikz = 19091, |
| 19105 | VPSHUFHWZ256ri = 19092, |
| 19106 | VPSHUFHWZ256rik = 19093, |
| 19107 | VPSHUFHWZ256rikz = 19094, |
| 19108 | VPSHUFHWZmi = 19095, |
| 19109 | VPSHUFHWZmik = 19096, |
| 19110 | VPSHUFHWZmikz = 19097, |
| 19111 | VPSHUFHWZri = 19098, |
| 19112 | VPSHUFHWZrik = 19099, |
| 19113 | VPSHUFHWZrikz = 19100, |
| 19114 | VPSHUFHWmi = 19101, |
| 19115 | VPSHUFHWri = 19102, |
| 19116 | VPSHUFLWYmi = 19103, |
| 19117 | VPSHUFLWYri = 19104, |
| 19118 | VPSHUFLWZ128mi = 19105, |
| 19119 | VPSHUFLWZ128mik = 19106, |
| 19120 | VPSHUFLWZ128mikz = 19107, |
| 19121 | VPSHUFLWZ128ri = 19108, |
| 19122 | VPSHUFLWZ128rik = 19109, |
| 19123 | VPSHUFLWZ128rikz = 19110, |
| 19124 | VPSHUFLWZ256mi = 19111, |
| 19125 | VPSHUFLWZ256mik = 19112, |
| 19126 | VPSHUFLWZ256mikz = 19113, |
| 19127 | VPSHUFLWZ256ri = 19114, |
| 19128 | VPSHUFLWZ256rik = 19115, |
| 19129 | VPSHUFLWZ256rikz = 19116, |
| 19130 | VPSHUFLWZmi = 19117, |
| 19131 | VPSHUFLWZmik = 19118, |
| 19132 | VPSHUFLWZmikz = 19119, |
| 19133 | VPSHUFLWZri = 19120, |
| 19134 | VPSHUFLWZrik = 19121, |
| 19135 | VPSHUFLWZrikz = 19122, |
| 19136 | VPSHUFLWmi = 19123, |
| 19137 | VPSHUFLWri = 19124, |
| 19138 | VPSIGNBYrm = 19125, |
| 19139 | VPSIGNBYrr = 19126, |
| 19140 | VPSIGNBrm = 19127, |
| 19141 | VPSIGNBrr = 19128, |
| 19142 | VPSIGNDYrm = 19129, |
| 19143 | VPSIGNDYrr = 19130, |
| 19144 | VPSIGNDrm = 19131, |
| 19145 | VPSIGNDrr = 19132, |
| 19146 | VPSIGNWYrm = 19133, |
| 19147 | VPSIGNWYrr = 19134, |
| 19148 | VPSIGNWrm = 19135, |
| 19149 | VPSIGNWrr = 19136, |
| 19150 | VPSLLDQYri = 19137, |
| 19151 | VPSLLDQZ128mi = 19138, |
| 19152 | VPSLLDQZ128ri = 19139, |
| 19153 | VPSLLDQZ256mi = 19140, |
| 19154 | VPSLLDQZ256ri = 19141, |
| 19155 | VPSLLDQZmi = 19142, |
| 19156 | VPSLLDQZri = 19143, |
| 19157 | VPSLLDQri = 19144, |
| 19158 | VPSLLDYri = 19145, |
| 19159 | VPSLLDYrm = 19146, |
| 19160 | VPSLLDYrr = 19147, |
| 19161 | VPSLLDZ128mbi = 19148, |
| 19162 | VPSLLDZ128mbik = 19149, |
| 19163 | VPSLLDZ128mbikz = 19150, |
| 19164 | VPSLLDZ128mi = 19151, |
| 19165 | VPSLLDZ128mik = 19152, |
| 19166 | VPSLLDZ128mikz = 19153, |
| 19167 | VPSLLDZ128ri = 19154, |
| 19168 | VPSLLDZ128rik = 19155, |
| 19169 | VPSLLDZ128rikz = 19156, |
| 19170 | VPSLLDZ128rm = 19157, |
| 19171 | VPSLLDZ128rmk = 19158, |
| 19172 | VPSLLDZ128rmkz = 19159, |
| 19173 | VPSLLDZ128rr = 19160, |
| 19174 | VPSLLDZ128rrk = 19161, |
| 19175 | VPSLLDZ128rrkz = 19162, |
| 19176 | VPSLLDZ256mbi = 19163, |
| 19177 | VPSLLDZ256mbik = 19164, |
| 19178 | VPSLLDZ256mbikz = 19165, |
| 19179 | VPSLLDZ256mi = 19166, |
| 19180 | VPSLLDZ256mik = 19167, |
| 19181 | VPSLLDZ256mikz = 19168, |
| 19182 | VPSLLDZ256ri = 19169, |
| 19183 | VPSLLDZ256rik = 19170, |
| 19184 | VPSLLDZ256rikz = 19171, |
| 19185 | VPSLLDZ256rm = 19172, |
| 19186 | VPSLLDZ256rmk = 19173, |
| 19187 | VPSLLDZ256rmkz = 19174, |
| 19188 | VPSLLDZ256rr = 19175, |
| 19189 | VPSLLDZ256rrk = 19176, |
| 19190 | VPSLLDZ256rrkz = 19177, |
| 19191 | VPSLLDZmbi = 19178, |
| 19192 | VPSLLDZmbik = 19179, |
| 19193 | VPSLLDZmbikz = 19180, |
| 19194 | VPSLLDZmi = 19181, |
| 19195 | VPSLLDZmik = 19182, |
| 19196 | VPSLLDZmikz = 19183, |
| 19197 | VPSLLDZri = 19184, |
| 19198 | VPSLLDZrik = 19185, |
| 19199 | VPSLLDZrikz = 19186, |
| 19200 | VPSLLDZrm = 19187, |
| 19201 | VPSLLDZrmk = 19188, |
| 19202 | VPSLLDZrmkz = 19189, |
| 19203 | VPSLLDZrr = 19190, |
| 19204 | VPSLLDZrrk = 19191, |
| 19205 | VPSLLDZrrkz = 19192, |
| 19206 | VPSLLDri = 19193, |
| 19207 | VPSLLDrm = 19194, |
| 19208 | VPSLLDrr = 19195, |
| 19209 | VPSLLQYri = 19196, |
| 19210 | VPSLLQYrm = 19197, |
| 19211 | VPSLLQYrr = 19198, |
| 19212 | VPSLLQZ128mbi = 19199, |
| 19213 | VPSLLQZ128mbik = 19200, |
| 19214 | VPSLLQZ128mbikz = 19201, |
| 19215 | VPSLLQZ128mi = 19202, |
| 19216 | VPSLLQZ128mik = 19203, |
| 19217 | VPSLLQZ128mikz = 19204, |
| 19218 | VPSLLQZ128ri = 19205, |
| 19219 | VPSLLQZ128rik = 19206, |
| 19220 | VPSLLQZ128rikz = 19207, |
| 19221 | VPSLLQZ128rm = 19208, |
| 19222 | VPSLLQZ128rmk = 19209, |
| 19223 | VPSLLQZ128rmkz = 19210, |
| 19224 | VPSLLQZ128rr = 19211, |
| 19225 | VPSLLQZ128rrk = 19212, |
| 19226 | VPSLLQZ128rrkz = 19213, |
| 19227 | VPSLLQZ256mbi = 19214, |
| 19228 | VPSLLQZ256mbik = 19215, |
| 19229 | VPSLLQZ256mbikz = 19216, |
| 19230 | VPSLLQZ256mi = 19217, |
| 19231 | VPSLLQZ256mik = 19218, |
| 19232 | VPSLLQZ256mikz = 19219, |
| 19233 | VPSLLQZ256ri = 19220, |
| 19234 | VPSLLQZ256rik = 19221, |
| 19235 | VPSLLQZ256rikz = 19222, |
| 19236 | VPSLLQZ256rm = 19223, |
| 19237 | VPSLLQZ256rmk = 19224, |
| 19238 | VPSLLQZ256rmkz = 19225, |
| 19239 | VPSLLQZ256rr = 19226, |
| 19240 | VPSLLQZ256rrk = 19227, |
| 19241 | VPSLLQZ256rrkz = 19228, |
| 19242 | VPSLLQZmbi = 19229, |
| 19243 | VPSLLQZmbik = 19230, |
| 19244 | VPSLLQZmbikz = 19231, |
| 19245 | VPSLLQZmi = 19232, |
| 19246 | VPSLLQZmik = 19233, |
| 19247 | VPSLLQZmikz = 19234, |
| 19248 | VPSLLQZri = 19235, |
| 19249 | VPSLLQZrik = 19236, |
| 19250 | VPSLLQZrikz = 19237, |
| 19251 | VPSLLQZrm = 19238, |
| 19252 | VPSLLQZrmk = 19239, |
| 19253 | VPSLLQZrmkz = 19240, |
| 19254 | VPSLLQZrr = 19241, |
| 19255 | VPSLLQZrrk = 19242, |
| 19256 | VPSLLQZrrkz = 19243, |
| 19257 | VPSLLQri = 19244, |
| 19258 | VPSLLQrm = 19245, |
| 19259 | VPSLLQrr = 19246, |
| 19260 | VPSLLVDYrm = 19247, |
| 19261 | VPSLLVDYrr = 19248, |
| 19262 | VPSLLVDZ128rm = 19249, |
| 19263 | VPSLLVDZ128rmb = 19250, |
| 19264 | VPSLLVDZ128rmbk = 19251, |
| 19265 | VPSLLVDZ128rmbkz = 19252, |
| 19266 | VPSLLVDZ128rmk = 19253, |
| 19267 | VPSLLVDZ128rmkz = 19254, |
| 19268 | VPSLLVDZ128rr = 19255, |
| 19269 | VPSLLVDZ128rrk = 19256, |
| 19270 | VPSLLVDZ128rrkz = 19257, |
| 19271 | VPSLLVDZ256rm = 19258, |
| 19272 | VPSLLVDZ256rmb = 19259, |
| 19273 | VPSLLVDZ256rmbk = 19260, |
| 19274 | VPSLLVDZ256rmbkz = 19261, |
| 19275 | VPSLLVDZ256rmk = 19262, |
| 19276 | VPSLLVDZ256rmkz = 19263, |
| 19277 | VPSLLVDZ256rr = 19264, |
| 19278 | VPSLLVDZ256rrk = 19265, |
| 19279 | VPSLLVDZ256rrkz = 19266, |
| 19280 | VPSLLVDZrm = 19267, |
| 19281 | VPSLLVDZrmb = 19268, |
| 19282 | VPSLLVDZrmbk = 19269, |
| 19283 | VPSLLVDZrmbkz = 19270, |
| 19284 | VPSLLVDZrmk = 19271, |
| 19285 | VPSLLVDZrmkz = 19272, |
| 19286 | VPSLLVDZrr = 19273, |
| 19287 | VPSLLVDZrrk = 19274, |
| 19288 | VPSLLVDZrrkz = 19275, |
| 19289 | VPSLLVDrm = 19276, |
| 19290 | VPSLLVDrr = 19277, |
| 19291 | VPSLLVQYrm = 19278, |
| 19292 | VPSLLVQYrr = 19279, |
| 19293 | VPSLLVQZ128rm = 19280, |
| 19294 | VPSLLVQZ128rmb = 19281, |
| 19295 | VPSLLVQZ128rmbk = 19282, |
| 19296 | VPSLLVQZ128rmbkz = 19283, |
| 19297 | VPSLLVQZ128rmk = 19284, |
| 19298 | VPSLLVQZ128rmkz = 19285, |
| 19299 | VPSLLVQZ128rr = 19286, |
| 19300 | VPSLLVQZ128rrk = 19287, |
| 19301 | VPSLLVQZ128rrkz = 19288, |
| 19302 | VPSLLVQZ256rm = 19289, |
| 19303 | VPSLLVQZ256rmb = 19290, |
| 19304 | VPSLLVQZ256rmbk = 19291, |
| 19305 | VPSLLVQZ256rmbkz = 19292, |
| 19306 | VPSLLVQZ256rmk = 19293, |
| 19307 | VPSLLVQZ256rmkz = 19294, |
| 19308 | VPSLLVQZ256rr = 19295, |
| 19309 | VPSLLVQZ256rrk = 19296, |
| 19310 | VPSLLVQZ256rrkz = 19297, |
| 19311 | VPSLLVQZrm = 19298, |
| 19312 | VPSLLVQZrmb = 19299, |
| 19313 | VPSLLVQZrmbk = 19300, |
| 19314 | VPSLLVQZrmbkz = 19301, |
| 19315 | VPSLLVQZrmk = 19302, |
| 19316 | VPSLLVQZrmkz = 19303, |
| 19317 | VPSLLVQZrr = 19304, |
| 19318 | VPSLLVQZrrk = 19305, |
| 19319 | VPSLLVQZrrkz = 19306, |
| 19320 | VPSLLVQrm = 19307, |
| 19321 | VPSLLVQrr = 19308, |
| 19322 | VPSLLVWZ128rm = 19309, |
| 19323 | VPSLLVWZ128rmk = 19310, |
| 19324 | VPSLLVWZ128rmkz = 19311, |
| 19325 | VPSLLVWZ128rr = 19312, |
| 19326 | VPSLLVWZ128rrk = 19313, |
| 19327 | VPSLLVWZ128rrkz = 19314, |
| 19328 | VPSLLVWZ256rm = 19315, |
| 19329 | VPSLLVWZ256rmk = 19316, |
| 19330 | VPSLLVWZ256rmkz = 19317, |
| 19331 | VPSLLVWZ256rr = 19318, |
| 19332 | VPSLLVWZ256rrk = 19319, |
| 19333 | VPSLLVWZ256rrkz = 19320, |
| 19334 | VPSLLVWZrm = 19321, |
| 19335 | VPSLLVWZrmk = 19322, |
| 19336 | VPSLLVWZrmkz = 19323, |
| 19337 | VPSLLVWZrr = 19324, |
| 19338 | VPSLLVWZrrk = 19325, |
| 19339 | VPSLLVWZrrkz = 19326, |
| 19340 | VPSLLWYri = 19327, |
| 19341 | VPSLLWYrm = 19328, |
| 19342 | VPSLLWYrr = 19329, |
| 19343 | VPSLLWZ128mi = 19330, |
| 19344 | VPSLLWZ128mik = 19331, |
| 19345 | VPSLLWZ128mikz = 19332, |
| 19346 | VPSLLWZ128ri = 19333, |
| 19347 | VPSLLWZ128rik = 19334, |
| 19348 | VPSLLWZ128rikz = 19335, |
| 19349 | VPSLLWZ128rm = 19336, |
| 19350 | VPSLLWZ128rmk = 19337, |
| 19351 | VPSLLWZ128rmkz = 19338, |
| 19352 | VPSLLWZ128rr = 19339, |
| 19353 | VPSLLWZ128rrk = 19340, |
| 19354 | VPSLLWZ128rrkz = 19341, |
| 19355 | VPSLLWZ256mi = 19342, |
| 19356 | VPSLLWZ256mik = 19343, |
| 19357 | VPSLLWZ256mikz = 19344, |
| 19358 | VPSLLWZ256ri = 19345, |
| 19359 | VPSLLWZ256rik = 19346, |
| 19360 | VPSLLWZ256rikz = 19347, |
| 19361 | VPSLLWZ256rm = 19348, |
| 19362 | VPSLLWZ256rmk = 19349, |
| 19363 | VPSLLWZ256rmkz = 19350, |
| 19364 | VPSLLWZ256rr = 19351, |
| 19365 | VPSLLWZ256rrk = 19352, |
| 19366 | VPSLLWZ256rrkz = 19353, |
| 19367 | VPSLLWZmi = 19354, |
| 19368 | VPSLLWZmik = 19355, |
| 19369 | VPSLLWZmikz = 19356, |
| 19370 | VPSLLWZri = 19357, |
| 19371 | VPSLLWZrik = 19358, |
| 19372 | VPSLLWZrikz = 19359, |
| 19373 | VPSLLWZrm = 19360, |
| 19374 | VPSLLWZrmk = 19361, |
| 19375 | VPSLLWZrmkz = 19362, |
| 19376 | VPSLLWZrr = 19363, |
| 19377 | VPSLLWZrrk = 19364, |
| 19378 | VPSLLWZrrkz = 19365, |
| 19379 | VPSLLWri = 19366, |
| 19380 | VPSLLWrm = 19367, |
| 19381 | VPSLLWrr = 19368, |
| 19382 | VPSRADYri = 19369, |
| 19383 | VPSRADYrm = 19370, |
| 19384 | VPSRADYrr = 19371, |
| 19385 | VPSRADZ128mbi = 19372, |
| 19386 | VPSRADZ128mbik = 19373, |
| 19387 | VPSRADZ128mbikz = 19374, |
| 19388 | VPSRADZ128mi = 19375, |
| 19389 | VPSRADZ128mik = 19376, |
| 19390 | VPSRADZ128mikz = 19377, |
| 19391 | VPSRADZ128ri = 19378, |
| 19392 | VPSRADZ128rik = 19379, |
| 19393 | VPSRADZ128rikz = 19380, |
| 19394 | VPSRADZ128rm = 19381, |
| 19395 | VPSRADZ128rmk = 19382, |
| 19396 | VPSRADZ128rmkz = 19383, |
| 19397 | VPSRADZ128rr = 19384, |
| 19398 | VPSRADZ128rrk = 19385, |
| 19399 | VPSRADZ128rrkz = 19386, |
| 19400 | VPSRADZ256mbi = 19387, |
| 19401 | VPSRADZ256mbik = 19388, |
| 19402 | VPSRADZ256mbikz = 19389, |
| 19403 | VPSRADZ256mi = 19390, |
| 19404 | VPSRADZ256mik = 19391, |
| 19405 | VPSRADZ256mikz = 19392, |
| 19406 | VPSRADZ256ri = 19393, |
| 19407 | VPSRADZ256rik = 19394, |
| 19408 | VPSRADZ256rikz = 19395, |
| 19409 | VPSRADZ256rm = 19396, |
| 19410 | VPSRADZ256rmk = 19397, |
| 19411 | VPSRADZ256rmkz = 19398, |
| 19412 | VPSRADZ256rr = 19399, |
| 19413 | VPSRADZ256rrk = 19400, |
| 19414 | VPSRADZ256rrkz = 19401, |
| 19415 | VPSRADZmbi = 19402, |
| 19416 | VPSRADZmbik = 19403, |
| 19417 | VPSRADZmbikz = 19404, |
| 19418 | VPSRADZmi = 19405, |
| 19419 | VPSRADZmik = 19406, |
| 19420 | VPSRADZmikz = 19407, |
| 19421 | VPSRADZri = 19408, |
| 19422 | VPSRADZrik = 19409, |
| 19423 | VPSRADZrikz = 19410, |
| 19424 | VPSRADZrm = 19411, |
| 19425 | VPSRADZrmk = 19412, |
| 19426 | VPSRADZrmkz = 19413, |
| 19427 | VPSRADZrr = 19414, |
| 19428 | VPSRADZrrk = 19415, |
| 19429 | VPSRADZrrkz = 19416, |
| 19430 | VPSRADri = 19417, |
| 19431 | VPSRADrm = 19418, |
| 19432 | VPSRADrr = 19419, |
| 19433 | VPSRAQZ128mbi = 19420, |
| 19434 | VPSRAQZ128mbik = 19421, |
| 19435 | VPSRAQZ128mbikz = 19422, |
| 19436 | VPSRAQZ128mi = 19423, |
| 19437 | VPSRAQZ128mik = 19424, |
| 19438 | VPSRAQZ128mikz = 19425, |
| 19439 | VPSRAQZ128ri = 19426, |
| 19440 | VPSRAQZ128rik = 19427, |
| 19441 | VPSRAQZ128rikz = 19428, |
| 19442 | VPSRAQZ128rm = 19429, |
| 19443 | VPSRAQZ128rmk = 19430, |
| 19444 | VPSRAQZ128rmkz = 19431, |
| 19445 | VPSRAQZ128rr = 19432, |
| 19446 | VPSRAQZ128rrk = 19433, |
| 19447 | VPSRAQZ128rrkz = 19434, |
| 19448 | VPSRAQZ256mbi = 19435, |
| 19449 | VPSRAQZ256mbik = 19436, |
| 19450 | VPSRAQZ256mbikz = 19437, |
| 19451 | VPSRAQZ256mi = 19438, |
| 19452 | VPSRAQZ256mik = 19439, |
| 19453 | VPSRAQZ256mikz = 19440, |
| 19454 | VPSRAQZ256ri = 19441, |
| 19455 | VPSRAQZ256rik = 19442, |
| 19456 | VPSRAQZ256rikz = 19443, |
| 19457 | VPSRAQZ256rm = 19444, |
| 19458 | VPSRAQZ256rmk = 19445, |
| 19459 | VPSRAQZ256rmkz = 19446, |
| 19460 | VPSRAQZ256rr = 19447, |
| 19461 | VPSRAQZ256rrk = 19448, |
| 19462 | VPSRAQZ256rrkz = 19449, |
| 19463 | VPSRAQZmbi = 19450, |
| 19464 | VPSRAQZmbik = 19451, |
| 19465 | VPSRAQZmbikz = 19452, |
| 19466 | VPSRAQZmi = 19453, |
| 19467 | VPSRAQZmik = 19454, |
| 19468 | VPSRAQZmikz = 19455, |
| 19469 | VPSRAQZri = 19456, |
| 19470 | VPSRAQZrik = 19457, |
| 19471 | VPSRAQZrikz = 19458, |
| 19472 | VPSRAQZrm = 19459, |
| 19473 | VPSRAQZrmk = 19460, |
| 19474 | VPSRAQZrmkz = 19461, |
| 19475 | VPSRAQZrr = 19462, |
| 19476 | VPSRAQZrrk = 19463, |
| 19477 | VPSRAQZrrkz = 19464, |
| 19478 | VPSRAVDYrm = 19465, |
| 19479 | VPSRAVDYrr = 19466, |
| 19480 | VPSRAVDZ128rm = 19467, |
| 19481 | VPSRAVDZ128rmb = 19468, |
| 19482 | VPSRAVDZ128rmbk = 19469, |
| 19483 | VPSRAVDZ128rmbkz = 19470, |
| 19484 | VPSRAVDZ128rmk = 19471, |
| 19485 | VPSRAVDZ128rmkz = 19472, |
| 19486 | VPSRAVDZ128rr = 19473, |
| 19487 | VPSRAVDZ128rrk = 19474, |
| 19488 | VPSRAVDZ128rrkz = 19475, |
| 19489 | VPSRAVDZ256rm = 19476, |
| 19490 | VPSRAVDZ256rmb = 19477, |
| 19491 | VPSRAVDZ256rmbk = 19478, |
| 19492 | VPSRAVDZ256rmbkz = 19479, |
| 19493 | VPSRAVDZ256rmk = 19480, |
| 19494 | VPSRAVDZ256rmkz = 19481, |
| 19495 | VPSRAVDZ256rr = 19482, |
| 19496 | VPSRAVDZ256rrk = 19483, |
| 19497 | VPSRAVDZ256rrkz = 19484, |
| 19498 | VPSRAVDZrm = 19485, |
| 19499 | VPSRAVDZrmb = 19486, |
| 19500 | VPSRAVDZrmbk = 19487, |
| 19501 | VPSRAVDZrmbkz = 19488, |
| 19502 | VPSRAVDZrmk = 19489, |
| 19503 | VPSRAVDZrmkz = 19490, |
| 19504 | VPSRAVDZrr = 19491, |
| 19505 | VPSRAVDZrrk = 19492, |
| 19506 | VPSRAVDZrrkz = 19493, |
| 19507 | VPSRAVDrm = 19494, |
| 19508 | VPSRAVDrr = 19495, |
| 19509 | VPSRAVQZ128rm = 19496, |
| 19510 | VPSRAVQZ128rmb = 19497, |
| 19511 | VPSRAVQZ128rmbk = 19498, |
| 19512 | VPSRAVQZ128rmbkz = 19499, |
| 19513 | VPSRAVQZ128rmk = 19500, |
| 19514 | VPSRAVQZ128rmkz = 19501, |
| 19515 | VPSRAVQZ128rr = 19502, |
| 19516 | VPSRAVQZ128rrk = 19503, |
| 19517 | VPSRAVQZ128rrkz = 19504, |
| 19518 | VPSRAVQZ256rm = 19505, |
| 19519 | VPSRAVQZ256rmb = 19506, |
| 19520 | VPSRAVQZ256rmbk = 19507, |
| 19521 | VPSRAVQZ256rmbkz = 19508, |
| 19522 | VPSRAVQZ256rmk = 19509, |
| 19523 | VPSRAVQZ256rmkz = 19510, |
| 19524 | VPSRAVQZ256rr = 19511, |
| 19525 | VPSRAVQZ256rrk = 19512, |
| 19526 | VPSRAVQZ256rrkz = 19513, |
| 19527 | VPSRAVQZrm = 19514, |
| 19528 | VPSRAVQZrmb = 19515, |
| 19529 | VPSRAVQZrmbk = 19516, |
| 19530 | VPSRAVQZrmbkz = 19517, |
| 19531 | VPSRAVQZrmk = 19518, |
| 19532 | VPSRAVQZrmkz = 19519, |
| 19533 | VPSRAVQZrr = 19520, |
| 19534 | VPSRAVQZrrk = 19521, |
| 19535 | VPSRAVQZrrkz = 19522, |
| 19536 | VPSRAVWZ128rm = 19523, |
| 19537 | VPSRAVWZ128rmk = 19524, |
| 19538 | VPSRAVWZ128rmkz = 19525, |
| 19539 | VPSRAVWZ128rr = 19526, |
| 19540 | VPSRAVWZ128rrk = 19527, |
| 19541 | VPSRAVWZ128rrkz = 19528, |
| 19542 | VPSRAVWZ256rm = 19529, |
| 19543 | VPSRAVWZ256rmk = 19530, |
| 19544 | VPSRAVWZ256rmkz = 19531, |
| 19545 | VPSRAVWZ256rr = 19532, |
| 19546 | VPSRAVWZ256rrk = 19533, |
| 19547 | VPSRAVWZ256rrkz = 19534, |
| 19548 | VPSRAVWZrm = 19535, |
| 19549 | VPSRAVWZrmk = 19536, |
| 19550 | VPSRAVWZrmkz = 19537, |
| 19551 | VPSRAVWZrr = 19538, |
| 19552 | VPSRAVWZrrk = 19539, |
| 19553 | VPSRAVWZrrkz = 19540, |
| 19554 | VPSRAWYri = 19541, |
| 19555 | VPSRAWYrm = 19542, |
| 19556 | VPSRAWYrr = 19543, |
| 19557 | VPSRAWZ128mi = 19544, |
| 19558 | VPSRAWZ128mik = 19545, |
| 19559 | VPSRAWZ128mikz = 19546, |
| 19560 | VPSRAWZ128ri = 19547, |
| 19561 | VPSRAWZ128rik = 19548, |
| 19562 | VPSRAWZ128rikz = 19549, |
| 19563 | VPSRAWZ128rm = 19550, |
| 19564 | VPSRAWZ128rmk = 19551, |
| 19565 | VPSRAWZ128rmkz = 19552, |
| 19566 | VPSRAWZ128rr = 19553, |
| 19567 | VPSRAWZ128rrk = 19554, |
| 19568 | VPSRAWZ128rrkz = 19555, |
| 19569 | VPSRAWZ256mi = 19556, |
| 19570 | VPSRAWZ256mik = 19557, |
| 19571 | VPSRAWZ256mikz = 19558, |
| 19572 | VPSRAWZ256ri = 19559, |
| 19573 | VPSRAWZ256rik = 19560, |
| 19574 | VPSRAWZ256rikz = 19561, |
| 19575 | VPSRAWZ256rm = 19562, |
| 19576 | VPSRAWZ256rmk = 19563, |
| 19577 | VPSRAWZ256rmkz = 19564, |
| 19578 | VPSRAWZ256rr = 19565, |
| 19579 | VPSRAWZ256rrk = 19566, |
| 19580 | VPSRAWZ256rrkz = 19567, |
| 19581 | VPSRAWZmi = 19568, |
| 19582 | VPSRAWZmik = 19569, |
| 19583 | VPSRAWZmikz = 19570, |
| 19584 | VPSRAWZri = 19571, |
| 19585 | VPSRAWZrik = 19572, |
| 19586 | VPSRAWZrikz = 19573, |
| 19587 | VPSRAWZrm = 19574, |
| 19588 | VPSRAWZrmk = 19575, |
| 19589 | VPSRAWZrmkz = 19576, |
| 19590 | VPSRAWZrr = 19577, |
| 19591 | VPSRAWZrrk = 19578, |
| 19592 | VPSRAWZrrkz = 19579, |
| 19593 | VPSRAWri = 19580, |
| 19594 | VPSRAWrm = 19581, |
| 19595 | VPSRAWrr = 19582, |
| 19596 | VPSRLDQYri = 19583, |
| 19597 | VPSRLDQZ128mi = 19584, |
| 19598 | VPSRLDQZ128ri = 19585, |
| 19599 | VPSRLDQZ256mi = 19586, |
| 19600 | VPSRLDQZ256ri = 19587, |
| 19601 | VPSRLDQZmi = 19588, |
| 19602 | VPSRLDQZri = 19589, |
| 19603 | VPSRLDQri = 19590, |
| 19604 | VPSRLDYri = 19591, |
| 19605 | VPSRLDYrm = 19592, |
| 19606 | VPSRLDYrr = 19593, |
| 19607 | VPSRLDZ128mbi = 19594, |
| 19608 | VPSRLDZ128mbik = 19595, |
| 19609 | VPSRLDZ128mbikz = 19596, |
| 19610 | VPSRLDZ128mi = 19597, |
| 19611 | VPSRLDZ128mik = 19598, |
| 19612 | VPSRLDZ128mikz = 19599, |
| 19613 | VPSRLDZ128ri = 19600, |
| 19614 | VPSRLDZ128rik = 19601, |
| 19615 | VPSRLDZ128rikz = 19602, |
| 19616 | VPSRLDZ128rm = 19603, |
| 19617 | VPSRLDZ128rmk = 19604, |
| 19618 | VPSRLDZ128rmkz = 19605, |
| 19619 | VPSRLDZ128rr = 19606, |
| 19620 | VPSRLDZ128rrk = 19607, |
| 19621 | VPSRLDZ128rrkz = 19608, |
| 19622 | VPSRLDZ256mbi = 19609, |
| 19623 | VPSRLDZ256mbik = 19610, |
| 19624 | VPSRLDZ256mbikz = 19611, |
| 19625 | VPSRLDZ256mi = 19612, |
| 19626 | VPSRLDZ256mik = 19613, |
| 19627 | VPSRLDZ256mikz = 19614, |
| 19628 | VPSRLDZ256ri = 19615, |
| 19629 | VPSRLDZ256rik = 19616, |
| 19630 | VPSRLDZ256rikz = 19617, |
| 19631 | VPSRLDZ256rm = 19618, |
| 19632 | VPSRLDZ256rmk = 19619, |
| 19633 | VPSRLDZ256rmkz = 19620, |
| 19634 | VPSRLDZ256rr = 19621, |
| 19635 | VPSRLDZ256rrk = 19622, |
| 19636 | VPSRLDZ256rrkz = 19623, |
| 19637 | VPSRLDZmbi = 19624, |
| 19638 | VPSRLDZmbik = 19625, |
| 19639 | VPSRLDZmbikz = 19626, |
| 19640 | VPSRLDZmi = 19627, |
| 19641 | VPSRLDZmik = 19628, |
| 19642 | VPSRLDZmikz = 19629, |
| 19643 | VPSRLDZri = 19630, |
| 19644 | VPSRLDZrik = 19631, |
| 19645 | VPSRLDZrikz = 19632, |
| 19646 | VPSRLDZrm = 19633, |
| 19647 | VPSRLDZrmk = 19634, |
| 19648 | VPSRLDZrmkz = 19635, |
| 19649 | VPSRLDZrr = 19636, |
| 19650 | VPSRLDZrrk = 19637, |
| 19651 | VPSRLDZrrkz = 19638, |
| 19652 | VPSRLDri = 19639, |
| 19653 | VPSRLDrm = 19640, |
| 19654 | VPSRLDrr = 19641, |
| 19655 | VPSRLQYri = 19642, |
| 19656 | VPSRLQYrm = 19643, |
| 19657 | VPSRLQYrr = 19644, |
| 19658 | VPSRLQZ128mbi = 19645, |
| 19659 | VPSRLQZ128mbik = 19646, |
| 19660 | VPSRLQZ128mbikz = 19647, |
| 19661 | VPSRLQZ128mi = 19648, |
| 19662 | VPSRLQZ128mik = 19649, |
| 19663 | VPSRLQZ128mikz = 19650, |
| 19664 | VPSRLQZ128ri = 19651, |
| 19665 | VPSRLQZ128rik = 19652, |
| 19666 | VPSRLQZ128rikz = 19653, |
| 19667 | VPSRLQZ128rm = 19654, |
| 19668 | VPSRLQZ128rmk = 19655, |
| 19669 | VPSRLQZ128rmkz = 19656, |
| 19670 | VPSRLQZ128rr = 19657, |
| 19671 | VPSRLQZ128rrk = 19658, |
| 19672 | VPSRLQZ128rrkz = 19659, |
| 19673 | VPSRLQZ256mbi = 19660, |
| 19674 | VPSRLQZ256mbik = 19661, |
| 19675 | VPSRLQZ256mbikz = 19662, |
| 19676 | VPSRLQZ256mi = 19663, |
| 19677 | VPSRLQZ256mik = 19664, |
| 19678 | VPSRLQZ256mikz = 19665, |
| 19679 | VPSRLQZ256ri = 19666, |
| 19680 | VPSRLQZ256rik = 19667, |
| 19681 | VPSRLQZ256rikz = 19668, |
| 19682 | VPSRLQZ256rm = 19669, |
| 19683 | VPSRLQZ256rmk = 19670, |
| 19684 | VPSRLQZ256rmkz = 19671, |
| 19685 | VPSRLQZ256rr = 19672, |
| 19686 | VPSRLQZ256rrk = 19673, |
| 19687 | VPSRLQZ256rrkz = 19674, |
| 19688 | VPSRLQZmbi = 19675, |
| 19689 | VPSRLQZmbik = 19676, |
| 19690 | VPSRLQZmbikz = 19677, |
| 19691 | VPSRLQZmi = 19678, |
| 19692 | VPSRLQZmik = 19679, |
| 19693 | VPSRLQZmikz = 19680, |
| 19694 | VPSRLQZri = 19681, |
| 19695 | VPSRLQZrik = 19682, |
| 19696 | VPSRLQZrikz = 19683, |
| 19697 | VPSRLQZrm = 19684, |
| 19698 | VPSRLQZrmk = 19685, |
| 19699 | VPSRLQZrmkz = 19686, |
| 19700 | VPSRLQZrr = 19687, |
| 19701 | VPSRLQZrrk = 19688, |
| 19702 | VPSRLQZrrkz = 19689, |
| 19703 | VPSRLQri = 19690, |
| 19704 | VPSRLQrm = 19691, |
| 19705 | VPSRLQrr = 19692, |
| 19706 | VPSRLVDYrm = 19693, |
| 19707 | VPSRLVDYrr = 19694, |
| 19708 | VPSRLVDZ128rm = 19695, |
| 19709 | VPSRLVDZ128rmb = 19696, |
| 19710 | VPSRLVDZ128rmbk = 19697, |
| 19711 | VPSRLVDZ128rmbkz = 19698, |
| 19712 | VPSRLVDZ128rmk = 19699, |
| 19713 | VPSRLVDZ128rmkz = 19700, |
| 19714 | VPSRLVDZ128rr = 19701, |
| 19715 | VPSRLVDZ128rrk = 19702, |
| 19716 | VPSRLVDZ128rrkz = 19703, |
| 19717 | VPSRLVDZ256rm = 19704, |
| 19718 | VPSRLVDZ256rmb = 19705, |
| 19719 | VPSRLVDZ256rmbk = 19706, |
| 19720 | VPSRLVDZ256rmbkz = 19707, |
| 19721 | VPSRLVDZ256rmk = 19708, |
| 19722 | VPSRLVDZ256rmkz = 19709, |
| 19723 | VPSRLVDZ256rr = 19710, |
| 19724 | VPSRLVDZ256rrk = 19711, |
| 19725 | VPSRLVDZ256rrkz = 19712, |
| 19726 | VPSRLVDZrm = 19713, |
| 19727 | VPSRLVDZrmb = 19714, |
| 19728 | VPSRLVDZrmbk = 19715, |
| 19729 | VPSRLVDZrmbkz = 19716, |
| 19730 | VPSRLVDZrmk = 19717, |
| 19731 | VPSRLVDZrmkz = 19718, |
| 19732 | VPSRLVDZrr = 19719, |
| 19733 | VPSRLVDZrrk = 19720, |
| 19734 | VPSRLVDZrrkz = 19721, |
| 19735 | VPSRLVDrm = 19722, |
| 19736 | VPSRLVDrr = 19723, |
| 19737 | VPSRLVQYrm = 19724, |
| 19738 | VPSRLVQYrr = 19725, |
| 19739 | VPSRLVQZ128rm = 19726, |
| 19740 | VPSRLVQZ128rmb = 19727, |
| 19741 | VPSRLVQZ128rmbk = 19728, |
| 19742 | VPSRLVQZ128rmbkz = 19729, |
| 19743 | VPSRLVQZ128rmk = 19730, |
| 19744 | VPSRLVQZ128rmkz = 19731, |
| 19745 | VPSRLVQZ128rr = 19732, |
| 19746 | VPSRLVQZ128rrk = 19733, |
| 19747 | VPSRLVQZ128rrkz = 19734, |
| 19748 | VPSRLVQZ256rm = 19735, |
| 19749 | VPSRLVQZ256rmb = 19736, |
| 19750 | VPSRLVQZ256rmbk = 19737, |
| 19751 | VPSRLVQZ256rmbkz = 19738, |
| 19752 | VPSRLVQZ256rmk = 19739, |
| 19753 | VPSRLVQZ256rmkz = 19740, |
| 19754 | VPSRLVQZ256rr = 19741, |
| 19755 | VPSRLVQZ256rrk = 19742, |
| 19756 | VPSRLVQZ256rrkz = 19743, |
| 19757 | VPSRLVQZrm = 19744, |
| 19758 | VPSRLVQZrmb = 19745, |
| 19759 | VPSRLVQZrmbk = 19746, |
| 19760 | VPSRLVQZrmbkz = 19747, |
| 19761 | VPSRLVQZrmk = 19748, |
| 19762 | VPSRLVQZrmkz = 19749, |
| 19763 | VPSRLVQZrr = 19750, |
| 19764 | VPSRLVQZrrk = 19751, |
| 19765 | VPSRLVQZrrkz = 19752, |
| 19766 | VPSRLVQrm = 19753, |
| 19767 | VPSRLVQrr = 19754, |
| 19768 | VPSRLVWZ128rm = 19755, |
| 19769 | VPSRLVWZ128rmk = 19756, |
| 19770 | VPSRLVWZ128rmkz = 19757, |
| 19771 | VPSRLVWZ128rr = 19758, |
| 19772 | VPSRLVWZ128rrk = 19759, |
| 19773 | VPSRLVWZ128rrkz = 19760, |
| 19774 | VPSRLVWZ256rm = 19761, |
| 19775 | VPSRLVWZ256rmk = 19762, |
| 19776 | VPSRLVWZ256rmkz = 19763, |
| 19777 | VPSRLVWZ256rr = 19764, |
| 19778 | VPSRLVWZ256rrk = 19765, |
| 19779 | VPSRLVWZ256rrkz = 19766, |
| 19780 | VPSRLVWZrm = 19767, |
| 19781 | VPSRLVWZrmk = 19768, |
| 19782 | VPSRLVWZrmkz = 19769, |
| 19783 | VPSRLVWZrr = 19770, |
| 19784 | VPSRLVWZrrk = 19771, |
| 19785 | VPSRLVWZrrkz = 19772, |
| 19786 | VPSRLWYri = 19773, |
| 19787 | VPSRLWYrm = 19774, |
| 19788 | VPSRLWYrr = 19775, |
| 19789 | VPSRLWZ128mi = 19776, |
| 19790 | VPSRLWZ128mik = 19777, |
| 19791 | VPSRLWZ128mikz = 19778, |
| 19792 | VPSRLWZ128ri = 19779, |
| 19793 | VPSRLWZ128rik = 19780, |
| 19794 | VPSRLWZ128rikz = 19781, |
| 19795 | VPSRLWZ128rm = 19782, |
| 19796 | VPSRLWZ128rmk = 19783, |
| 19797 | VPSRLWZ128rmkz = 19784, |
| 19798 | VPSRLWZ128rr = 19785, |
| 19799 | VPSRLWZ128rrk = 19786, |
| 19800 | VPSRLWZ128rrkz = 19787, |
| 19801 | VPSRLWZ256mi = 19788, |
| 19802 | VPSRLWZ256mik = 19789, |
| 19803 | VPSRLWZ256mikz = 19790, |
| 19804 | VPSRLWZ256ri = 19791, |
| 19805 | VPSRLWZ256rik = 19792, |
| 19806 | VPSRLWZ256rikz = 19793, |
| 19807 | VPSRLWZ256rm = 19794, |
| 19808 | VPSRLWZ256rmk = 19795, |
| 19809 | VPSRLWZ256rmkz = 19796, |
| 19810 | VPSRLWZ256rr = 19797, |
| 19811 | VPSRLWZ256rrk = 19798, |
| 19812 | VPSRLWZ256rrkz = 19799, |
| 19813 | VPSRLWZmi = 19800, |
| 19814 | VPSRLWZmik = 19801, |
| 19815 | VPSRLWZmikz = 19802, |
| 19816 | VPSRLWZri = 19803, |
| 19817 | VPSRLWZrik = 19804, |
| 19818 | VPSRLWZrikz = 19805, |
| 19819 | VPSRLWZrm = 19806, |
| 19820 | VPSRLWZrmk = 19807, |
| 19821 | VPSRLWZrmkz = 19808, |
| 19822 | VPSRLWZrr = 19809, |
| 19823 | VPSRLWZrrk = 19810, |
| 19824 | VPSRLWZrrkz = 19811, |
| 19825 | VPSRLWri = 19812, |
| 19826 | VPSRLWrm = 19813, |
| 19827 | VPSRLWrr = 19814, |
| 19828 | VPSUBBYrm = 19815, |
| 19829 | VPSUBBYrr = 19816, |
| 19830 | VPSUBBZ128rm = 19817, |
| 19831 | VPSUBBZ128rmk = 19818, |
| 19832 | VPSUBBZ128rmkz = 19819, |
| 19833 | VPSUBBZ128rr = 19820, |
| 19834 | VPSUBBZ128rrk = 19821, |
| 19835 | VPSUBBZ128rrkz = 19822, |
| 19836 | VPSUBBZ256rm = 19823, |
| 19837 | VPSUBBZ256rmk = 19824, |
| 19838 | VPSUBBZ256rmkz = 19825, |
| 19839 | VPSUBBZ256rr = 19826, |
| 19840 | VPSUBBZ256rrk = 19827, |
| 19841 | VPSUBBZ256rrkz = 19828, |
| 19842 | VPSUBBZrm = 19829, |
| 19843 | VPSUBBZrmk = 19830, |
| 19844 | VPSUBBZrmkz = 19831, |
| 19845 | VPSUBBZrr = 19832, |
| 19846 | VPSUBBZrrk = 19833, |
| 19847 | VPSUBBZrrkz = 19834, |
| 19848 | VPSUBBrm = 19835, |
| 19849 | VPSUBBrr = 19836, |
| 19850 | VPSUBDYrm = 19837, |
| 19851 | VPSUBDYrr = 19838, |
| 19852 | VPSUBDZ128rm = 19839, |
| 19853 | VPSUBDZ128rmb = 19840, |
| 19854 | VPSUBDZ128rmbk = 19841, |
| 19855 | VPSUBDZ128rmbkz = 19842, |
| 19856 | VPSUBDZ128rmk = 19843, |
| 19857 | VPSUBDZ128rmkz = 19844, |
| 19858 | VPSUBDZ128rr = 19845, |
| 19859 | VPSUBDZ128rrk = 19846, |
| 19860 | VPSUBDZ128rrkz = 19847, |
| 19861 | VPSUBDZ256rm = 19848, |
| 19862 | VPSUBDZ256rmb = 19849, |
| 19863 | VPSUBDZ256rmbk = 19850, |
| 19864 | VPSUBDZ256rmbkz = 19851, |
| 19865 | VPSUBDZ256rmk = 19852, |
| 19866 | VPSUBDZ256rmkz = 19853, |
| 19867 | VPSUBDZ256rr = 19854, |
| 19868 | VPSUBDZ256rrk = 19855, |
| 19869 | VPSUBDZ256rrkz = 19856, |
| 19870 | VPSUBDZrm = 19857, |
| 19871 | VPSUBDZrmb = 19858, |
| 19872 | VPSUBDZrmbk = 19859, |
| 19873 | VPSUBDZrmbkz = 19860, |
| 19874 | VPSUBDZrmk = 19861, |
| 19875 | VPSUBDZrmkz = 19862, |
| 19876 | VPSUBDZrr = 19863, |
| 19877 | VPSUBDZrrk = 19864, |
| 19878 | VPSUBDZrrkz = 19865, |
| 19879 | VPSUBDrm = 19866, |
| 19880 | VPSUBDrr = 19867, |
| 19881 | VPSUBQYrm = 19868, |
| 19882 | VPSUBQYrr = 19869, |
| 19883 | VPSUBQZ128rm = 19870, |
| 19884 | VPSUBQZ128rmb = 19871, |
| 19885 | VPSUBQZ128rmbk = 19872, |
| 19886 | VPSUBQZ128rmbkz = 19873, |
| 19887 | VPSUBQZ128rmk = 19874, |
| 19888 | VPSUBQZ128rmkz = 19875, |
| 19889 | VPSUBQZ128rr = 19876, |
| 19890 | VPSUBQZ128rrk = 19877, |
| 19891 | VPSUBQZ128rrkz = 19878, |
| 19892 | VPSUBQZ256rm = 19879, |
| 19893 | VPSUBQZ256rmb = 19880, |
| 19894 | VPSUBQZ256rmbk = 19881, |
| 19895 | VPSUBQZ256rmbkz = 19882, |
| 19896 | VPSUBQZ256rmk = 19883, |
| 19897 | VPSUBQZ256rmkz = 19884, |
| 19898 | VPSUBQZ256rr = 19885, |
| 19899 | VPSUBQZ256rrk = 19886, |
| 19900 | VPSUBQZ256rrkz = 19887, |
| 19901 | VPSUBQZrm = 19888, |
| 19902 | VPSUBQZrmb = 19889, |
| 19903 | VPSUBQZrmbk = 19890, |
| 19904 | VPSUBQZrmbkz = 19891, |
| 19905 | VPSUBQZrmk = 19892, |
| 19906 | VPSUBQZrmkz = 19893, |
| 19907 | VPSUBQZrr = 19894, |
| 19908 | VPSUBQZrrk = 19895, |
| 19909 | VPSUBQZrrkz = 19896, |
| 19910 | VPSUBQrm = 19897, |
| 19911 | VPSUBQrr = 19898, |
| 19912 | VPSUBSBYrm = 19899, |
| 19913 | VPSUBSBYrr = 19900, |
| 19914 | VPSUBSBZ128rm = 19901, |
| 19915 | VPSUBSBZ128rmk = 19902, |
| 19916 | VPSUBSBZ128rmkz = 19903, |
| 19917 | VPSUBSBZ128rr = 19904, |
| 19918 | VPSUBSBZ128rrk = 19905, |
| 19919 | VPSUBSBZ128rrkz = 19906, |
| 19920 | VPSUBSBZ256rm = 19907, |
| 19921 | VPSUBSBZ256rmk = 19908, |
| 19922 | VPSUBSBZ256rmkz = 19909, |
| 19923 | VPSUBSBZ256rr = 19910, |
| 19924 | VPSUBSBZ256rrk = 19911, |
| 19925 | VPSUBSBZ256rrkz = 19912, |
| 19926 | VPSUBSBZrm = 19913, |
| 19927 | VPSUBSBZrmk = 19914, |
| 19928 | VPSUBSBZrmkz = 19915, |
| 19929 | VPSUBSBZrr = 19916, |
| 19930 | VPSUBSBZrrk = 19917, |
| 19931 | VPSUBSBZrrkz = 19918, |
| 19932 | VPSUBSBrm = 19919, |
| 19933 | VPSUBSBrr = 19920, |
| 19934 | VPSUBSWYrm = 19921, |
| 19935 | VPSUBSWYrr = 19922, |
| 19936 | VPSUBSWZ128rm = 19923, |
| 19937 | VPSUBSWZ128rmk = 19924, |
| 19938 | VPSUBSWZ128rmkz = 19925, |
| 19939 | VPSUBSWZ128rr = 19926, |
| 19940 | VPSUBSWZ128rrk = 19927, |
| 19941 | VPSUBSWZ128rrkz = 19928, |
| 19942 | VPSUBSWZ256rm = 19929, |
| 19943 | VPSUBSWZ256rmk = 19930, |
| 19944 | VPSUBSWZ256rmkz = 19931, |
| 19945 | VPSUBSWZ256rr = 19932, |
| 19946 | VPSUBSWZ256rrk = 19933, |
| 19947 | VPSUBSWZ256rrkz = 19934, |
| 19948 | VPSUBSWZrm = 19935, |
| 19949 | VPSUBSWZrmk = 19936, |
| 19950 | VPSUBSWZrmkz = 19937, |
| 19951 | VPSUBSWZrr = 19938, |
| 19952 | VPSUBSWZrrk = 19939, |
| 19953 | VPSUBSWZrrkz = 19940, |
| 19954 | VPSUBSWrm = 19941, |
| 19955 | VPSUBSWrr = 19942, |
| 19956 | VPSUBUSBYrm = 19943, |
| 19957 | VPSUBUSBYrr = 19944, |
| 19958 | VPSUBUSBZ128rm = 19945, |
| 19959 | VPSUBUSBZ128rmk = 19946, |
| 19960 | VPSUBUSBZ128rmkz = 19947, |
| 19961 | VPSUBUSBZ128rr = 19948, |
| 19962 | VPSUBUSBZ128rrk = 19949, |
| 19963 | VPSUBUSBZ128rrkz = 19950, |
| 19964 | VPSUBUSBZ256rm = 19951, |
| 19965 | VPSUBUSBZ256rmk = 19952, |
| 19966 | VPSUBUSBZ256rmkz = 19953, |
| 19967 | VPSUBUSBZ256rr = 19954, |
| 19968 | VPSUBUSBZ256rrk = 19955, |
| 19969 | VPSUBUSBZ256rrkz = 19956, |
| 19970 | VPSUBUSBZrm = 19957, |
| 19971 | VPSUBUSBZrmk = 19958, |
| 19972 | VPSUBUSBZrmkz = 19959, |
| 19973 | VPSUBUSBZrr = 19960, |
| 19974 | VPSUBUSBZrrk = 19961, |
| 19975 | VPSUBUSBZrrkz = 19962, |
| 19976 | VPSUBUSBrm = 19963, |
| 19977 | VPSUBUSBrr = 19964, |
| 19978 | VPSUBUSWYrm = 19965, |
| 19979 | VPSUBUSWYrr = 19966, |
| 19980 | VPSUBUSWZ128rm = 19967, |
| 19981 | VPSUBUSWZ128rmk = 19968, |
| 19982 | VPSUBUSWZ128rmkz = 19969, |
| 19983 | VPSUBUSWZ128rr = 19970, |
| 19984 | VPSUBUSWZ128rrk = 19971, |
| 19985 | VPSUBUSWZ128rrkz = 19972, |
| 19986 | VPSUBUSWZ256rm = 19973, |
| 19987 | VPSUBUSWZ256rmk = 19974, |
| 19988 | VPSUBUSWZ256rmkz = 19975, |
| 19989 | VPSUBUSWZ256rr = 19976, |
| 19990 | VPSUBUSWZ256rrk = 19977, |
| 19991 | VPSUBUSWZ256rrkz = 19978, |
| 19992 | VPSUBUSWZrm = 19979, |
| 19993 | VPSUBUSWZrmk = 19980, |
| 19994 | VPSUBUSWZrmkz = 19981, |
| 19995 | VPSUBUSWZrr = 19982, |
| 19996 | VPSUBUSWZrrk = 19983, |
| 19997 | VPSUBUSWZrrkz = 19984, |
| 19998 | VPSUBUSWrm = 19985, |
| 19999 | VPSUBUSWrr = 19986, |
| 20000 | VPSUBWYrm = 19987, |
| 20001 | VPSUBWYrr = 19988, |
| 20002 | VPSUBWZ128rm = 19989, |
| 20003 | VPSUBWZ128rmk = 19990, |
| 20004 | VPSUBWZ128rmkz = 19991, |
| 20005 | VPSUBWZ128rr = 19992, |
| 20006 | VPSUBWZ128rrk = 19993, |
| 20007 | VPSUBWZ128rrkz = 19994, |
| 20008 | VPSUBWZ256rm = 19995, |
| 20009 | VPSUBWZ256rmk = 19996, |
| 20010 | VPSUBWZ256rmkz = 19997, |
| 20011 | VPSUBWZ256rr = 19998, |
| 20012 | VPSUBWZ256rrk = 19999, |
| 20013 | VPSUBWZ256rrkz = 20000, |
| 20014 | VPSUBWZrm = 20001, |
| 20015 | VPSUBWZrmk = 20002, |
| 20016 | VPSUBWZrmkz = 20003, |
| 20017 | VPSUBWZrr = 20004, |
| 20018 | VPSUBWZrrk = 20005, |
| 20019 | VPSUBWZrrkz = 20006, |
| 20020 | VPSUBWrm = 20007, |
| 20021 | VPSUBWrr = 20008, |
| 20022 | VPTERNLOGDZ128rmbi = 20009, |
| 20023 | VPTERNLOGDZ128rmbik = 20010, |
| 20024 | VPTERNLOGDZ128rmbikz = 20011, |
| 20025 | VPTERNLOGDZ128rmi = 20012, |
| 20026 | VPTERNLOGDZ128rmik = 20013, |
| 20027 | VPTERNLOGDZ128rmikz = 20014, |
| 20028 | VPTERNLOGDZ128rri = 20015, |
| 20029 | VPTERNLOGDZ128rrik = 20016, |
| 20030 | VPTERNLOGDZ128rrikz = 20017, |
| 20031 | VPTERNLOGDZ256rmbi = 20018, |
| 20032 | VPTERNLOGDZ256rmbik = 20019, |
| 20033 | VPTERNLOGDZ256rmbikz = 20020, |
| 20034 | VPTERNLOGDZ256rmi = 20021, |
| 20035 | VPTERNLOGDZ256rmik = 20022, |
| 20036 | VPTERNLOGDZ256rmikz = 20023, |
| 20037 | VPTERNLOGDZ256rri = 20024, |
| 20038 | VPTERNLOGDZ256rrik = 20025, |
| 20039 | VPTERNLOGDZ256rrikz = 20026, |
| 20040 | VPTERNLOGDZrmbi = 20027, |
| 20041 | VPTERNLOGDZrmbik = 20028, |
| 20042 | VPTERNLOGDZrmbikz = 20029, |
| 20043 | VPTERNLOGDZrmi = 20030, |
| 20044 | VPTERNLOGDZrmik = 20031, |
| 20045 | VPTERNLOGDZrmikz = 20032, |
| 20046 | VPTERNLOGDZrri = 20033, |
| 20047 | VPTERNLOGDZrrik = 20034, |
| 20048 | VPTERNLOGDZrrikz = 20035, |
| 20049 | VPTERNLOGQZ128rmbi = 20036, |
| 20050 | VPTERNLOGQZ128rmbik = 20037, |
| 20051 | VPTERNLOGQZ128rmbikz = 20038, |
| 20052 | VPTERNLOGQZ128rmi = 20039, |
| 20053 | VPTERNLOGQZ128rmik = 20040, |
| 20054 | VPTERNLOGQZ128rmikz = 20041, |
| 20055 | VPTERNLOGQZ128rri = 20042, |
| 20056 | VPTERNLOGQZ128rrik = 20043, |
| 20057 | VPTERNLOGQZ128rrikz = 20044, |
| 20058 | VPTERNLOGQZ256rmbi = 20045, |
| 20059 | VPTERNLOGQZ256rmbik = 20046, |
| 20060 | VPTERNLOGQZ256rmbikz = 20047, |
| 20061 | VPTERNLOGQZ256rmi = 20048, |
| 20062 | VPTERNLOGQZ256rmik = 20049, |
| 20063 | VPTERNLOGQZ256rmikz = 20050, |
| 20064 | VPTERNLOGQZ256rri = 20051, |
| 20065 | VPTERNLOGQZ256rrik = 20052, |
| 20066 | VPTERNLOGQZ256rrikz = 20053, |
| 20067 | VPTERNLOGQZrmbi = 20054, |
| 20068 | VPTERNLOGQZrmbik = 20055, |
| 20069 | VPTERNLOGQZrmbikz = 20056, |
| 20070 | VPTERNLOGQZrmi = 20057, |
| 20071 | VPTERNLOGQZrmik = 20058, |
| 20072 | VPTERNLOGQZrmikz = 20059, |
| 20073 | VPTERNLOGQZrri = 20060, |
| 20074 | VPTERNLOGQZrrik = 20061, |
| 20075 | VPTERNLOGQZrrikz = 20062, |
| 20076 | VPTESTMBZ128rm = 20063, |
| 20077 | VPTESTMBZ128rmk = 20064, |
| 20078 | VPTESTMBZ128rr = 20065, |
| 20079 | VPTESTMBZ128rrk = 20066, |
| 20080 | VPTESTMBZ256rm = 20067, |
| 20081 | VPTESTMBZ256rmk = 20068, |
| 20082 | VPTESTMBZ256rr = 20069, |
| 20083 | VPTESTMBZ256rrk = 20070, |
| 20084 | VPTESTMBZrm = 20071, |
| 20085 | VPTESTMBZrmk = 20072, |
| 20086 | VPTESTMBZrr = 20073, |
| 20087 | VPTESTMBZrrk = 20074, |
| 20088 | VPTESTMDZ128rm = 20075, |
| 20089 | VPTESTMDZ128rmb = 20076, |
| 20090 | VPTESTMDZ128rmbk = 20077, |
| 20091 | VPTESTMDZ128rmk = 20078, |
| 20092 | VPTESTMDZ128rr = 20079, |
| 20093 | VPTESTMDZ128rrk = 20080, |
| 20094 | VPTESTMDZ256rm = 20081, |
| 20095 | VPTESTMDZ256rmb = 20082, |
| 20096 | VPTESTMDZ256rmbk = 20083, |
| 20097 | VPTESTMDZ256rmk = 20084, |
| 20098 | VPTESTMDZ256rr = 20085, |
| 20099 | VPTESTMDZ256rrk = 20086, |
| 20100 | VPTESTMDZrm = 20087, |
| 20101 | VPTESTMDZrmb = 20088, |
| 20102 | VPTESTMDZrmbk = 20089, |
| 20103 | VPTESTMDZrmk = 20090, |
| 20104 | VPTESTMDZrr = 20091, |
| 20105 | VPTESTMDZrrk = 20092, |
| 20106 | VPTESTMQZ128rm = 20093, |
| 20107 | VPTESTMQZ128rmb = 20094, |
| 20108 | VPTESTMQZ128rmbk = 20095, |
| 20109 | VPTESTMQZ128rmk = 20096, |
| 20110 | VPTESTMQZ128rr = 20097, |
| 20111 | VPTESTMQZ128rrk = 20098, |
| 20112 | VPTESTMQZ256rm = 20099, |
| 20113 | VPTESTMQZ256rmb = 20100, |
| 20114 | VPTESTMQZ256rmbk = 20101, |
| 20115 | VPTESTMQZ256rmk = 20102, |
| 20116 | VPTESTMQZ256rr = 20103, |
| 20117 | VPTESTMQZ256rrk = 20104, |
| 20118 | VPTESTMQZrm = 20105, |
| 20119 | VPTESTMQZrmb = 20106, |
| 20120 | VPTESTMQZrmbk = 20107, |
| 20121 | VPTESTMQZrmk = 20108, |
| 20122 | VPTESTMQZrr = 20109, |
| 20123 | VPTESTMQZrrk = 20110, |
| 20124 | VPTESTMWZ128rm = 20111, |
| 20125 | VPTESTMWZ128rmk = 20112, |
| 20126 | VPTESTMWZ128rr = 20113, |
| 20127 | VPTESTMWZ128rrk = 20114, |
| 20128 | VPTESTMWZ256rm = 20115, |
| 20129 | VPTESTMWZ256rmk = 20116, |
| 20130 | VPTESTMWZ256rr = 20117, |
| 20131 | VPTESTMWZ256rrk = 20118, |
| 20132 | VPTESTMWZrm = 20119, |
| 20133 | VPTESTMWZrmk = 20120, |
| 20134 | VPTESTMWZrr = 20121, |
| 20135 | VPTESTMWZrrk = 20122, |
| 20136 | VPTESTNMBZ128rm = 20123, |
| 20137 | VPTESTNMBZ128rmk = 20124, |
| 20138 | VPTESTNMBZ128rr = 20125, |
| 20139 | VPTESTNMBZ128rrk = 20126, |
| 20140 | VPTESTNMBZ256rm = 20127, |
| 20141 | VPTESTNMBZ256rmk = 20128, |
| 20142 | VPTESTNMBZ256rr = 20129, |
| 20143 | VPTESTNMBZ256rrk = 20130, |
| 20144 | VPTESTNMBZrm = 20131, |
| 20145 | VPTESTNMBZrmk = 20132, |
| 20146 | VPTESTNMBZrr = 20133, |
| 20147 | VPTESTNMBZrrk = 20134, |
| 20148 | VPTESTNMDZ128rm = 20135, |
| 20149 | VPTESTNMDZ128rmb = 20136, |
| 20150 | VPTESTNMDZ128rmbk = 20137, |
| 20151 | VPTESTNMDZ128rmk = 20138, |
| 20152 | VPTESTNMDZ128rr = 20139, |
| 20153 | VPTESTNMDZ128rrk = 20140, |
| 20154 | VPTESTNMDZ256rm = 20141, |
| 20155 | VPTESTNMDZ256rmb = 20142, |
| 20156 | VPTESTNMDZ256rmbk = 20143, |
| 20157 | VPTESTNMDZ256rmk = 20144, |
| 20158 | VPTESTNMDZ256rr = 20145, |
| 20159 | VPTESTNMDZ256rrk = 20146, |
| 20160 | VPTESTNMDZrm = 20147, |
| 20161 | VPTESTNMDZrmb = 20148, |
| 20162 | VPTESTNMDZrmbk = 20149, |
| 20163 | VPTESTNMDZrmk = 20150, |
| 20164 | VPTESTNMDZrr = 20151, |
| 20165 | VPTESTNMDZrrk = 20152, |
| 20166 | VPTESTNMQZ128rm = 20153, |
| 20167 | VPTESTNMQZ128rmb = 20154, |
| 20168 | VPTESTNMQZ128rmbk = 20155, |
| 20169 | VPTESTNMQZ128rmk = 20156, |
| 20170 | VPTESTNMQZ128rr = 20157, |
| 20171 | VPTESTNMQZ128rrk = 20158, |
| 20172 | VPTESTNMQZ256rm = 20159, |
| 20173 | VPTESTNMQZ256rmb = 20160, |
| 20174 | VPTESTNMQZ256rmbk = 20161, |
| 20175 | VPTESTNMQZ256rmk = 20162, |
| 20176 | VPTESTNMQZ256rr = 20163, |
| 20177 | VPTESTNMQZ256rrk = 20164, |
| 20178 | VPTESTNMQZrm = 20165, |
| 20179 | VPTESTNMQZrmb = 20166, |
| 20180 | VPTESTNMQZrmbk = 20167, |
| 20181 | VPTESTNMQZrmk = 20168, |
| 20182 | VPTESTNMQZrr = 20169, |
| 20183 | VPTESTNMQZrrk = 20170, |
| 20184 | VPTESTNMWZ128rm = 20171, |
| 20185 | VPTESTNMWZ128rmk = 20172, |
| 20186 | VPTESTNMWZ128rr = 20173, |
| 20187 | VPTESTNMWZ128rrk = 20174, |
| 20188 | VPTESTNMWZ256rm = 20175, |
| 20189 | VPTESTNMWZ256rmk = 20176, |
| 20190 | VPTESTNMWZ256rr = 20177, |
| 20191 | VPTESTNMWZ256rrk = 20178, |
| 20192 | VPTESTNMWZrm = 20179, |
| 20193 | VPTESTNMWZrmk = 20180, |
| 20194 | VPTESTNMWZrr = 20181, |
| 20195 | VPTESTNMWZrrk = 20182, |
| 20196 | VPTESTYrm = 20183, |
| 20197 | VPTESTYrr = 20184, |
| 20198 | VPTESTrm = 20185, |
| 20199 | VPTESTrr = 20186, |
| 20200 | VPUNPCKHBWYrm = 20187, |
| 20201 | VPUNPCKHBWYrr = 20188, |
| 20202 | VPUNPCKHBWZ128rm = 20189, |
| 20203 | VPUNPCKHBWZ128rmk = 20190, |
| 20204 | VPUNPCKHBWZ128rmkz = 20191, |
| 20205 | VPUNPCKHBWZ128rr = 20192, |
| 20206 | VPUNPCKHBWZ128rrk = 20193, |
| 20207 | VPUNPCKHBWZ128rrkz = 20194, |
| 20208 | VPUNPCKHBWZ256rm = 20195, |
| 20209 | VPUNPCKHBWZ256rmk = 20196, |
| 20210 | VPUNPCKHBWZ256rmkz = 20197, |
| 20211 | VPUNPCKHBWZ256rr = 20198, |
| 20212 | VPUNPCKHBWZ256rrk = 20199, |
| 20213 | VPUNPCKHBWZ256rrkz = 20200, |
| 20214 | VPUNPCKHBWZrm = 20201, |
| 20215 | VPUNPCKHBWZrmk = 20202, |
| 20216 | VPUNPCKHBWZrmkz = 20203, |
| 20217 | VPUNPCKHBWZrr = 20204, |
| 20218 | VPUNPCKHBWZrrk = 20205, |
| 20219 | VPUNPCKHBWZrrkz = 20206, |
| 20220 | VPUNPCKHBWrm = 20207, |
| 20221 | VPUNPCKHBWrr = 20208, |
| 20222 | VPUNPCKHDQYrm = 20209, |
| 20223 | VPUNPCKHDQYrr = 20210, |
| 20224 | VPUNPCKHDQZ128rm = 20211, |
| 20225 | VPUNPCKHDQZ128rmb = 20212, |
| 20226 | VPUNPCKHDQZ128rmbk = 20213, |
| 20227 | VPUNPCKHDQZ128rmbkz = 20214, |
| 20228 | VPUNPCKHDQZ128rmk = 20215, |
| 20229 | VPUNPCKHDQZ128rmkz = 20216, |
| 20230 | VPUNPCKHDQZ128rr = 20217, |
| 20231 | VPUNPCKHDQZ128rrk = 20218, |
| 20232 | VPUNPCKHDQZ128rrkz = 20219, |
| 20233 | VPUNPCKHDQZ256rm = 20220, |
| 20234 | VPUNPCKHDQZ256rmb = 20221, |
| 20235 | VPUNPCKHDQZ256rmbk = 20222, |
| 20236 | VPUNPCKHDQZ256rmbkz = 20223, |
| 20237 | VPUNPCKHDQZ256rmk = 20224, |
| 20238 | VPUNPCKHDQZ256rmkz = 20225, |
| 20239 | VPUNPCKHDQZ256rr = 20226, |
| 20240 | VPUNPCKHDQZ256rrk = 20227, |
| 20241 | VPUNPCKHDQZ256rrkz = 20228, |
| 20242 | VPUNPCKHDQZrm = 20229, |
| 20243 | VPUNPCKHDQZrmb = 20230, |
| 20244 | VPUNPCKHDQZrmbk = 20231, |
| 20245 | VPUNPCKHDQZrmbkz = 20232, |
| 20246 | VPUNPCKHDQZrmk = 20233, |
| 20247 | VPUNPCKHDQZrmkz = 20234, |
| 20248 | VPUNPCKHDQZrr = 20235, |
| 20249 | VPUNPCKHDQZrrk = 20236, |
| 20250 | VPUNPCKHDQZrrkz = 20237, |
| 20251 | VPUNPCKHDQrm = 20238, |
| 20252 | VPUNPCKHDQrr = 20239, |
| 20253 | VPUNPCKHQDQYrm = 20240, |
| 20254 | VPUNPCKHQDQYrr = 20241, |
| 20255 | VPUNPCKHQDQZ128rm = 20242, |
| 20256 | VPUNPCKHQDQZ128rmb = 20243, |
| 20257 | VPUNPCKHQDQZ128rmbk = 20244, |
| 20258 | VPUNPCKHQDQZ128rmbkz = 20245, |
| 20259 | VPUNPCKHQDQZ128rmk = 20246, |
| 20260 | VPUNPCKHQDQZ128rmkz = 20247, |
| 20261 | VPUNPCKHQDQZ128rr = 20248, |
| 20262 | VPUNPCKHQDQZ128rrk = 20249, |
| 20263 | VPUNPCKHQDQZ128rrkz = 20250, |
| 20264 | VPUNPCKHQDQZ256rm = 20251, |
| 20265 | VPUNPCKHQDQZ256rmb = 20252, |
| 20266 | VPUNPCKHQDQZ256rmbk = 20253, |
| 20267 | VPUNPCKHQDQZ256rmbkz = 20254, |
| 20268 | VPUNPCKHQDQZ256rmk = 20255, |
| 20269 | VPUNPCKHQDQZ256rmkz = 20256, |
| 20270 | VPUNPCKHQDQZ256rr = 20257, |
| 20271 | VPUNPCKHQDQZ256rrk = 20258, |
| 20272 | VPUNPCKHQDQZ256rrkz = 20259, |
| 20273 | VPUNPCKHQDQZrm = 20260, |
| 20274 | VPUNPCKHQDQZrmb = 20261, |
| 20275 | VPUNPCKHQDQZrmbk = 20262, |
| 20276 | VPUNPCKHQDQZrmbkz = 20263, |
| 20277 | VPUNPCKHQDQZrmk = 20264, |
| 20278 | VPUNPCKHQDQZrmkz = 20265, |
| 20279 | VPUNPCKHQDQZrr = 20266, |
| 20280 | VPUNPCKHQDQZrrk = 20267, |
| 20281 | VPUNPCKHQDQZrrkz = 20268, |
| 20282 | VPUNPCKHQDQrm = 20269, |
| 20283 | VPUNPCKHQDQrr = 20270, |
| 20284 | VPUNPCKHWDYrm = 20271, |
| 20285 | VPUNPCKHWDYrr = 20272, |
| 20286 | VPUNPCKHWDZ128rm = 20273, |
| 20287 | VPUNPCKHWDZ128rmk = 20274, |
| 20288 | VPUNPCKHWDZ128rmkz = 20275, |
| 20289 | VPUNPCKHWDZ128rr = 20276, |
| 20290 | VPUNPCKHWDZ128rrk = 20277, |
| 20291 | VPUNPCKHWDZ128rrkz = 20278, |
| 20292 | VPUNPCKHWDZ256rm = 20279, |
| 20293 | VPUNPCKHWDZ256rmk = 20280, |
| 20294 | VPUNPCKHWDZ256rmkz = 20281, |
| 20295 | VPUNPCKHWDZ256rr = 20282, |
| 20296 | VPUNPCKHWDZ256rrk = 20283, |
| 20297 | VPUNPCKHWDZ256rrkz = 20284, |
| 20298 | VPUNPCKHWDZrm = 20285, |
| 20299 | VPUNPCKHWDZrmk = 20286, |
| 20300 | VPUNPCKHWDZrmkz = 20287, |
| 20301 | VPUNPCKHWDZrr = 20288, |
| 20302 | VPUNPCKHWDZrrk = 20289, |
| 20303 | VPUNPCKHWDZrrkz = 20290, |
| 20304 | VPUNPCKHWDrm = 20291, |
| 20305 | VPUNPCKHWDrr = 20292, |
| 20306 | VPUNPCKLBWYrm = 20293, |
| 20307 | VPUNPCKLBWYrr = 20294, |
| 20308 | VPUNPCKLBWZ128rm = 20295, |
| 20309 | VPUNPCKLBWZ128rmk = 20296, |
| 20310 | VPUNPCKLBWZ128rmkz = 20297, |
| 20311 | VPUNPCKLBWZ128rr = 20298, |
| 20312 | VPUNPCKLBWZ128rrk = 20299, |
| 20313 | VPUNPCKLBWZ128rrkz = 20300, |
| 20314 | VPUNPCKLBWZ256rm = 20301, |
| 20315 | VPUNPCKLBWZ256rmk = 20302, |
| 20316 | VPUNPCKLBWZ256rmkz = 20303, |
| 20317 | VPUNPCKLBWZ256rr = 20304, |
| 20318 | VPUNPCKLBWZ256rrk = 20305, |
| 20319 | VPUNPCKLBWZ256rrkz = 20306, |
| 20320 | VPUNPCKLBWZrm = 20307, |
| 20321 | VPUNPCKLBWZrmk = 20308, |
| 20322 | VPUNPCKLBWZrmkz = 20309, |
| 20323 | VPUNPCKLBWZrr = 20310, |
| 20324 | VPUNPCKLBWZrrk = 20311, |
| 20325 | VPUNPCKLBWZrrkz = 20312, |
| 20326 | VPUNPCKLBWrm = 20313, |
| 20327 | VPUNPCKLBWrr = 20314, |
| 20328 | VPUNPCKLDQYrm = 20315, |
| 20329 | VPUNPCKLDQYrr = 20316, |
| 20330 | VPUNPCKLDQZ128rm = 20317, |
| 20331 | VPUNPCKLDQZ128rmb = 20318, |
| 20332 | VPUNPCKLDQZ128rmbk = 20319, |
| 20333 | VPUNPCKLDQZ128rmbkz = 20320, |
| 20334 | VPUNPCKLDQZ128rmk = 20321, |
| 20335 | VPUNPCKLDQZ128rmkz = 20322, |
| 20336 | VPUNPCKLDQZ128rr = 20323, |
| 20337 | VPUNPCKLDQZ128rrk = 20324, |
| 20338 | VPUNPCKLDQZ128rrkz = 20325, |
| 20339 | VPUNPCKLDQZ256rm = 20326, |
| 20340 | VPUNPCKLDQZ256rmb = 20327, |
| 20341 | VPUNPCKLDQZ256rmbk = 20328, |
| 20342 | VPUNPCKLDQZ256rmbkz = 20329, |
| 20343 | VPUNPCKLDQZ256rmk = 20330, |
| 20344 | VPUNPCKLDQZ256rmkz = 20331, |
| 20345 | VPUNPCKLDQZ256rr = 20332, |
| 20346 | VPUNPCKLDQZ256rrk = 20333, |
| 20347 | VPUNPCKLDQZ256rrkz = 20334, |
| 20348 | VPUNPCKLDQZrm = 20335, |
| 20349 | VPUNPCKLDQZrmb = 20336, |
| 20350 | VPUNPCKLDQZrmbk = 20337, |
| 20351 | VPUNPCKLDQZrmbkz = 20338, |
| 20352 | VPUNPCKLDQZrmk = 20339, |
| 20353 | VPUNPCKLDQZrmkz = 20340, |
| 20354 | VPUNPCKLDQZrr = 20341, |
| 20355 | VPUNPCKLDQZrrk = 20342, |
| 20356 | VPUNPCKLDQZrrkz = 20343, |
| 20357 | VPUNPCKLDQrm = 20344, |
| 20358 | VPUNPCKLDQrr = 20345, |
| 20359 | VPUNPCKLQDQYrm = 20346, |
| 20360 | VPUNPCKLQDQYrr = 20347, |
| 20361 | VPUNPCKLQDQZ128rm = 20348, |
| 20362 | VPUNPCKLQDQZ128rmb = 20349, |
| 20363 | VPUNPCKLQDQZ128rmbk = 20350, |
| 20364 | VPUNPCKLQDQZ128rmbkz = 20351, |
| 20365 | VPUNPCKLQDQZ128rmk = 20352, |
| 20366 | VPUNPCKLQDQZ128rmkz = 20353, |
| 20367 | VPUNPCKLQDQZ128rr = 20354, |
| 20368 | VPUNPCKLQDQZ128rrk = 20355, |
| 20369 | VPUNPCKLQDQZ128rrkz = 20356, |
| 20370 | VPUNPCKLQDQZ256rm = 20357, |
| 20371 | VPUNPCKLQDQZ256rmb = 20358, |
| 20372 | VPUNPCKLQDQZ256rmbk = 20359, |
| 20373 | VPUNPCKLQDQZ256rmbkz = 20360, |
| 20374 | VPUNPCKLQDQZ256rmk = 20361, |
| 20375 | VPUNPCKLQDQZ256rmkz = 20362, |
| 20376 | VPUNPCKLQDQZ256rr = 20363, |
| 20377 | VPUNPCKLQDQZ256rrk = 20364, |
| 20378 | VPUNPCKLQDQZ256rrkz = 20365, |
| 20379 | VPUNPCKLQDQZrm = 20366, |
| 20380 | VPUNPCKLQDQZrmb = 20367, |
| 20381 | VPUNPCKLQDQZrmbk = 20368, |
| 20382 | VPUNPCKLQDQZrmbkz = 20369, |
| 20383 | VPUNPCKLQDQZrmk = 20370, |
| 20384 | VPUNPCKLQDQZrmkz = 20371, |
| 20385 | VPUNPCKLQDQZrr = 20372, |
| 20386 | VPUNPCKLQDQZrrk = 20373, |
| 20387 | VPUNPCKLQDQZrrkz = 20374, |
| 20388 | VPUNPCKLQDQrm = 20375, |
| 20389 | VPUNPCKLQDQrr = 20376, |
| 20390 | VPUNPCKLWDYrm = 20377, |
| 20391 | VPUNPCKLWDYrr = 20378, |
| 20392 | VPUNPCKLWDZ128rm = 20379, |
| 20393 | VPUNPCKLWDZ128rmk = 20380, |
| 20394 | VPUNPCKLWDZ128rmkz = 20381, |
| 20395 | VPUNPCKLWDZ128rr = 20382, |
| 20396 | VPUNPCKLWDZ128rrk = 20383, |
| 20397 | VPUNPCKLWDZ128rrkz = 20384, |
| 20398 | VPUNPCKLWDZ256rm = 20385, |
| 20399 | VPUNPCKLWDZ256rmk = 20386, |
| 20400 | VPUNPCKLWDZ256rmkz = 20387, |
| 20401 | VPUNPCKLWDZ256rr = 20388, |
| 20402 | VPUNPCKLWDZ256rrk = 20389, |
| 20403 | VPUNPCKLWDZ256rrkz = 20390, |
| 20404 | VPUNPCKLWDZrm = 20391, |
| 20405 | VPUNPCKLWDZrmk = 20392, |
| 20406 | VPUNPCKLWDZrmkz = 20393, |
| 20407 | VPUNPCKLWDZrr = 20394, |
| 20408 | VPUNPCKLWDZrrk = 20395, |
| 20409 | VPUNPCKLWDZrrkz = 20396, |
| 20410 | VPUNPCKLWDrm = 20397, |
| 20411 | VPUNPCKLWDrr = 20398, |
| 20412 | VPXORDZ128rm = 20399, |
| 20413 | VPXORDZ128rmb = 20400, |
| 20414 | VPXORDZ128rmbk = 20401, |
| 20415 | VPXORDZ128rmbkz = 20402, |
| 20416 | VPXORDZ128rmk = 20403, |
| 20417 | VPXORDZ128rmkz = 20404, |
| 20418 | VPXORDZ128rr = 20405, |
| 20419 | VPXORDZ128rrk = 20406, |
| 20420 | VPXORDZ128rrkz = 20407, |
| 20421 | VPXORDZ256rm = 20408, |
| 20422 | VPXORDZ256rmb = 20409, |
| 20423 | VPXORDZ256rmbk = 20410, |
| 20424 | VPXORDZ256rmbkz = 20411, |
| 20425 | VPXORDZ256rmk = 20412, |
| 20426 | VPXORDZ256rmkz = 20413, |
| 20427 | VPXORDZ256rr = 20414, |
| 20428 | VPXORDZ256rrk = 20415, |
| 20429 | VPXORDZ256rrkz = 20416, |
| 20430 | VPXORDZrm = 20417, |
| 20431 | VPXORDZrmb = 20418, |
| 20432 | VPXORDZrmbk = 20419, |
| 20433 | VPXORDZrmbkz = 20420, |
| 20434 | VPXORDZrmk = 20421, |
| 20435 | VPXORDZrmkz = 20422, |
| 20436 | VPXORDZrr = 20423, |
| 20437 | VPXORDZrrk = 20424, |
| 20438 | VPXORDZrrkz = 20425, |
| 20439 | VPXORQZ128rm = 20426, |
| 20440 | VPXORQZ128rmb = 20427, |
| 20441 | VPXORQZ128rmbk = 20428, |
| 20442 | VPXORQZ128rmbkz = 20429, |
| 20443 | VPXORQZ128rmk = 20430, |
| 20444 | VPXORQZ128rmkz = 20431, |
| 20445 | VPXORQZ128rr = 20432, |
| 20446 | VPXORQZ128rrk = 20433, |
| 20447 | VPXORQZ128rrkz = 20434, |
| 20448 | VPXORQZ256rm = 20435, |
| 20449 | VPXORQZ256rmb = 20436, |
| 20450 | VPXORQZ256rmbk = 20437, |
| 20451 | VPXORQZ256rmbkz = 20438, |
| 20452 | VPXORQZ256rmk = 20439, |
| 20453 | VPXORQZ256rmkz = 20440, |
| 20454 | VPXORQZ256rr = 20441, |
| 20455 | VPXORQZ256rrk = 20442, |
| 20456 | VPXORQZ256rrkz = 20443, |
| 20457 | VPXORQZrm = 20444, |
| 20458 | VPXORQZrmb = 20445, |
| 20459 | VPXORQZrmbk = 20446, |
| 20460 | VPXORQZrmbkz = 20447, |
| 20461 | VPXORQZrmk = 20448, |
| 20462 | VPXORQZrmkz = 20449, |
| 20463 | VPXORQZrr = 20450, |
| 20464 | VPXORQZrrk = 20451, |
| 20465 | VPXORQZrrkz = 20452, |
| 20466 | VPXORYrm = 20453, |
| 20467 | VPXORYrr = 20454, |
| 20468 | VPXORrm = 20455, |
| 20469 | VPXORrr = 20456, |
| 20470 | VRANGEPDZ128rmbi = 20457, |
| 20471 | VRANGEPDZ128rmbik = 20458, |
| 20472 | VRANGEPDZ128rmbikz = 20459, |
| 20473 | VRANGEPDZ128rmi = 20460, |
| 20474 | VRANGEPDZ128rmik = 20461, |
| 20475 | VRANGEPDZ128rmikz = 20462, |
| 20476 | VRANGEPDZ128rri = 20463, |
| 20477 | VRANGEPDZ128rrik = 20464, |
| 20478 | VRANGEPDZ128rrikz = 20465, |
| 20479 | VRANGEPDZ256rmbi = 20466, |
| 20480 | VRANGEPDZ256rmbik = 20467, |
| 20481 | VRANGEPDZ256rmbikz = 20468, |
| 20482 | VRANGEPDZ256rmi = 20469, |
| 20483 | VRANGEPDZ256rmik = 20470, |
| 20484 | VRANGEPDZ256rmikz = 20471, |
| 20485 | VRANGEPDZ256rri = 20472, |
| 20486 | VRANGEPDZ256rrik = 20473, |
| 20487 | VRANGEPDZ256rrikz = 20474, |
| 20488 | VRANGEPDZrmbi = 20475, |
| 20489 | VRANGEPDZrmbik = 20476, |
| 20490 | VRANGEPDZrmbikz = 20477, |
| 20491 | VRANGEPDZrmi = 20478, |
| 20492 | VRANGEPDZrmik = 20479, |
| 20493 | VRANGEPDZrmikz = 20480, |
| 20494 | VRANGEPDZrri = 20481, |
| 20495 | VRANGEPDZrrib = 20482, |
| 20496 | VRANGEPDZrribk = 20483, |
| 20497 | VRANGEPDZrribkz = 20484, |
| 20498 | VRANGEPDZrrik = 20485, |
| 20499 | VRANGEPDZrrikz = 20486, |
| 20500 | VRANGEPSZ128rmbi = 20487, |
| 20501 | VRANGEPSZ128rmbik = 20488, |
| 20502 | VRANGEPSZ128rmbikz = 20489, |
| 20503 | VRANGEPSZ128rmi = 20490, |
| 20504 | VRANGEPSZ128rmik = 20491, |
| 20505 | VRANGEPSZ128rmikz = 20492, |
| 20506 | VRANGEPSZ128rri = 20493, |
| 20507 | VRANGEPSZ128rrik = 20494, |
| 20508 | VRANGEPSZ128rrikz = 20495, |
| 20509 | VRANGEPSZ256rmbi = 20496, |
| 20510 | VRANGEPSZ256rmbik = 20497, |
| 20511 | VRANGEPSZ256rmbikz = 20498, |
| 20512 | VRANGEPSZ256rmi = 20499, |
| 20513 | VRANGEPSZ256rmik = 20500, |
| 20514 | VRANGEPSZ256rmikz = 20501, |
| 20515 | VRANGEPSZ256rri = 20502, |
| 20516 | VRANGEPSZ256rrik = 20503, |
| 20517 | VRANGEPSZ256rrikz = 20504, |
| 20518 | VRANGEPSZrmbi = 20505, |
| 20519 | VRANGEPSZrmbik = 20506, |
| 20520 | VRANGEPSZrmbikz = 20507, |
| 20521 | VRANGEPSZrmi = 20508, |
| 20522 | VRANGEPSZrmik = 20509, |
| 20523 | VRANGEPSZrmikz = 20510, |
| 20524 | VRANGEPSZrri = 20511, |
| 20525 | VRANGEPSZrrib = 20512, |
| 20526 | VRANGEPSZrribk = 20513, |
| 20527 | VRANGEPSZrribkz = 20514, |
| 20528 | VRANGEPSZrrik = 20515, |
| 20529 | VRANGEPSZrrikz = 20516, |
| 20530 | VRANGESDZrmi = 20517, |
| 20531 | VRANGESDZrmik = 20518, |
| 20532 | VRANGESDZrmikz = 20519, |
| 20533 | VRANGESDZrri = 20520, |
| 20534 | VRANGESDZrrib = 20521, |
| 20535 | VRANGESDZrribk = 20522, |
| 20536 | VRANGESDZrribkz = 20523, |
| 20537 | VRANGESDZrrik = 20524, |
| 20538 | VRANGESDZrrikz = 20525, |
| 20539 | VRANGESSZrmi = 20526, |
| 20540 | VRANGESSZrmik = 20527, |
| 20541 | VRANGESSZrmikz = 20528, |
| 20542 | VRANGESSZrri = 20529, |
| 20543 | VRANGESSZrrib = 20530, |
| 20544 | VRANGESSZrribk = 20531, |
| 20545 | VRANGESSZrribkz = 20532, |
| 20546 | VRANGESSZrrik = 20533, |
| 20547 | VRANGESSZrrikz = 20534, |
| 20548 | VRCP14PDZ128m = 20535, |
| 20549 | VRCP14PDZ128mb = 20536, |
| 20550 | VRCP14PDZ128mbk = 20537, |
| 20551 | VRCP14PDZ128mbkz = 20538, |
| 20552 | VRCP14PDZ128mk = 20539, |
| 20553 | VRCP14PDZ128mkz = 20540, |
| 20554 | VRCP14PDZ128r = 20541, |
| 20555 | VRCP14PDZ128rk = 20542, |
| 20556 | VRCP14PDZ128rkz = 20543, |
| 20557 | VRCP14PDZ256m = 20544, |
| 20558 | VRCP14PDZ256mb = 20545, |
| 20559 | VRCP14PDZ256mbk = 20546, |
| 20560 | VRCP14PDZ256mbkz = 20547, |
| 20561 | VRCP14PDZ256mk = 20548, |
| 20562 | VRCP14PDZ256mkz = 20549, |
| 20563 | VRCP14PDZ256r = 20550, |
| 20564 | VRCP14PDZ256rk = 20551, |
| 20565 | VRCP14PDZ256rkz = 20552, |
| 20566 | VRCP14PDZm = 20553, |
| 20567 | VRCP14PDZmb = 20554, |
| 20568 | VRCP14PDZmbk = 20555, |
| 20569 | VRCP14PDZmbkz = 20556, |
| 20570 | VRCP14PDZmk = 20557, |
| 20571 | VRCP14PDZmkz = 20558, |
| 20572 | VRCP14PDZr = 20559, |
| 20573 | VRCP14PDZrk = 20560, |
| 20574 | VRCP14PDZrkz = 20561, |
| 20575 | VRCP14PSZ128m = 20562, |
| 20576 | VRCP14PSZ128mb = 20563, |
| 20577 | VRCP14PSZ128mbk = 20564, |
| 20578 | VRCP14PSZ128mbkz = 20565, |
| 20579 | VRCP14PSZ128mk = 20566, |
| 20580 | VRCP14PSZ128mkz = 20567, |
| 20581 | VRCP14PSZ128r = 20568, |
| 20582 | VRCP14PSZ128rk = 20569, |
| 20583 | VRCP14PSZ128rkz = 20570, |
| 20584 | VRCP14PSZ256m = 20571, |
| 20585 | VRCP14PSZ256mb = 20572, |
| 20586 | VRCP14PSZ256mbk = 20573, |
| 20587 | VRCP14PSZ256mbkz = 20574, |
| 20588 | VRCP14PSZ256mk = 20575, |
| 20589 | VRCP14PSZ256mkz = 20576, |
| 20590 | VRCP14PSZ256r = 20577, |
| 20591 | VRCP14PSZ256rk = 20578, |
| 20592 | VRCP14PSZ256rkz = 20579, |
| 20593 | VRCP14PSZm = 20580, |
| 20594 | VRCP14PSZmb = 20581, |
| 20595 | VRCP14PSZmbk = 20582, |
| 20596 | VRCP14PSZmbkz = 20583, |
| 20597 | VRCP14PSZmk = 20584, |
| 20598 | VRCP14PSZmkz = 20585, |
| 20599 | VRCP14PSZr = 20586, |
| 20600 | VRCP14PSZrk = 20587, |
| 20601 | VRCP14PSZrkz = 20588, |
| 20602 | VRCP14SDZrm = 20589, |
| 20603 | VRCP14SDZrmk = 20590, |
| 20604 | VRCP14SDZrmkz = 20591, |
| 20605 | VRCP14SDZrr = 20592, |
| 20606 | VRCP14SDZrrk = 20593, |
| 20607 | VRCP14SDZrrkz = 20594, |
| 20608 | VRCP14SSZrm = 20595, |
| 20609 | VRCP14SSZrmk = 20596, |
| 20610 | VRCP14SSZrmkz = 20597, |
| 20611 | VRCP14SSZrr = 20598, |
| 20612 | VRCP14SSZrrk = 20599, |
| 20613 | VRCP14SSZrrkz = 20600, |
| 20614 | VRCP28PDZm = 20601, |
| 20615 | VRCP28PDZmb = 20602, |
| 20616 | VRCP28PDZmbk = 20603, |
| 20617 | VRCP28PDZmbkz = 20604, |
| 20618 | VRCP28PDZmk = 20605, |
| 20619 | VRCP28PDZmkz = 20606, |
| 20620 | VRCP28PDZr = 20607, |
| 20621 | VRCP28PDZrb = 20608, |
| 20622 | VRCP28PDZrbk = 20609, |
| 20623 | VRCP28PDZrbkz = 20610, |
| 20624 | VRCP28PDZrk = 20611, |
| 20625 | VRCP28PDZrkz = 20612, |
| 20626 | VRCP28PSZm = 20613, |
| 20627 | VRCP28PSZmb = 20614, |
| 20628 | VRCP28PSZmbk = 20615, |
| 20629 | VRCP28PSZmbkz = 20616, |
| 20630 | VRCP28PSZmk = 20617, |
| 20631 | VRCP28PSZmkz = 20618, |
| 20632 | VRCP28PSZr = 20619, |
| 20633 | VRCP28PSZrb = 20620, |
| 20634 | VRCP28PSZrbk = 20621, |
| 20635 | VRCP28PSZrbkz = 20622, |
| 20636 | VRCP28PSZrk = 20623, |
| 20637 | VRCP28PSZrkz = 20624, |
| 20638 | VRCP28SDZm = 20625, |
| 20639 | VRCP28SDZmk = 20626, |
| 20640 | VRCP28SDZmkz = 20627, |
| 20641 | VRCP28SDZr = 20628, |
| 20642 | VRCP28SDZrb = 20629, |
| 20643 | VRCP28SDZrbk = 20630, |
| 20644 | VRCP28SDZrbkz = 20631, |
| 20645 | VRCP28SDZrk = 20632, |
| 20646 | VRCP28SDZrkz = 20633, |
| 20647 | VRCP28SSZm = 20634, |
| 20648 | VRCP28SSZmk = 20635, |
| 20649 | VRCP28SSZmkz = 20636, |
| 20650 | VRCP28SSZr = 20637, |
| 20651 | VRCP28SSZrb = 20638, |
| 20652 | VRCP28SSZrbk = 20639, |
| 20653 | VRCP28SSZrbkz = 20640, |
| 20654 | VRCP28SSZrk = 20641, |
| 20655 | VRCP28SSZrkz = 20642, |
| 20656 | VRCPBF16Z128m = 20643, |
| 20657 | VRCPBF16Z128mb = 20644, |
| 20658 | VRCPBF16Z128mbk = 20645, |
| 20659 | VRCPBF16Z128mbkz = 20646, |
| 20660 | VRCPBF16Z128mk = 20647, |
| 20661 | VRCPBF16Z128mkz = 20648, |
| 20662 | VRCPBF16Z128r = 20649, |
| 20663 | VRCPBF16Z128rk = 20650, |
| 20664 | VRCPBF16Z128rkz = 20651, |
| 20665 | VRCPBF16Z256m = 20652, |
| 20666 | VRCPBF16Z256mb = 20653, |
| 20667 | VRCPBF16Z256mbk = 20654, |
| 20668 | VRCPBF16Z256mbkz = 20655, |
| 20669 | VRCPBF16Z256mk = 20656, |
| 20670 | VRCPBF16Z256mkz = 20657, |
| 20671 | VRCPBF16Z256r = 20658, |
| 20672 | VRCPBF16Z256rk = 20659, |
| 20673 | VRCPBF16Z256rkz = 20660, |
| 20674 | VRCPBF16Zm = 20661, |
| 20675 | VRCPBF16Zmb = 20662, |
| 20676 | VRCPBF16Zmbk = 20663, |
| 20677 | VRCPBF16Zmbkz = 20664, |
| 20678 | VRCPBF16Zmk = 20665, |
| 20679 | VRCPBF16Zmkz = 20666, |
| 20680 | VRCPBF16Zr = 20667, |
| 20681 | VRCPBF16Zrk = 20668, |
| 20682 | VRCPBF16Zrkz = 20669, |
| 20683 | VRCPPHZ128m = 20670, |
| 20684 | VRCPPHZ128mb = 20671, |
| 20685 | VRCPPHZ128mbk = 20672, |
| 20686 | VRCPPHZ128mbkz = 20673, |
| 20687 | VRCPPHZ128mk = 20674, |
| 20688 | VRCPPHZ128mkz = 20675, |
| 20689 | VRCPPHZ128r = 20676, |
| 20690 | VRCPPHZ128rk = 20677, |
| 20691 | VRCPPHZ128rkz = 20678, |
| 20692 | VRCPPHZ256m = 20679, |
| 20693 | VRCPPHZ256mb = 20680, |
| 20694 | VRCPPHZ256mbk = 20681, |
| 20695 | VRCPPHZ256mbkz = 20682, |
| 20696 | VRCPPHZ256mk = 20683, |
| 20697 | VRCPPHZ256mkz = 20684, |
| 20698 | VRCPPHZ256r = 20685, |
| 20699 | VRCPPHZ256rk = 20686, |
| 20700 | VRCPPHZ256rkz = 20687, |
| 20701 | VRCPPHZm = 20688, |
| 20702 | VRCPPHZmb = 20689, |
| 20703 | VRCPPHZmbk = 20690, |
| 20704 | VRCPPHZmbkz = 20691, |
| 20705 | VRCPPHZmk = 20692, |
| 20706 | VRCPPHZmkz = 20693, |
| 20707 | VRCPPHZr = 20694, |
| 20708 | VRCPPHZrk = 20695, |
| 20709 | VRCPPHZrkz = 20696, |
| 20710 | VRCPPSYm = 20697, |
| 20711 | VRCPPSYr = 20698, |
| 20712 | VRCPPSm = 20699, |
| 20713 | VRCPPSr = 20700, |
| 20714 | VRCPSHZrm = 20701, |
| 20715 | VRCPSHZrmk = 20702, |
| 20716 | VRCPSHZrmkz = 20703, |
| 20717 | VRCPSHZrr = 20704, |
| 20718 | VRCPSHZrrk = 20705, |
| 20719 | VRCPSHZrrkz = 20706, |
| 20720 | VRCPSSm = 20707, |
| 20721 | VRCPSSm_Int = 20708, |
| 20722 | VRCPSSr = 20709, |
| 20723 | VRCPSSr_Int = 20710, |
| 20724 | VREDUCEBF16Z128rmbi = 20711, |
| 20725 | VREDUCEBF16Z128rmbik = 20712, |
| 20726 | VREDUCEBF16Z128rmbikz = 20713, |
| 20727 | VREDUCEBF16Z128rmi = 20714, |
| 20728 | VREDUCEBF16Z128rmik = 20715, |
| 20729 | VREDUCEBF16Z128rmikz = 20716, |
| 20730 | VREDUCEBF16Z128rri = 20717, |
| 20731 | VREDUCEBF16Z128rrik = 20718, |
| 20732 | VREDUCEBF16Z128rrikz = 20719, |
| 20733 | VREDUCEBF16Z256rmbi = 20720, |
| 20734 | VREDUCEBF16Z256rmbik = 20721, |
| 20735 | VREDUCEBF16Z256rmbikz = 20722, |
| 20736 | VREDUCEBF16Z256rmi = 20723, |
| 20737 | VREDUCEBF16Z256rmik = 20724, |
| 20738 | VREDUCEBF16Z256rmikz = 20725, |
| 20739 | VREDUCEBF16Z256rri = 20726, |
| 20740 | VREDUCEBF16Z256rrik = 20727, |
| 20741 | VREDUCEBF16Z256rrikz = 20728, |
| 20742 | VREDUCEBF16Zrmbi = 20729, |
| 20743 | VREDUCEBF16Zrmbik = 20730, |
| 20744 | VREDUCEBF16Zrmbikz = 20731, |
| 20745 | VREDUCEBF16Zrmi = 20732, |
| 20746 | VREDUCEBF16Zrmik = 20733, |
| 20747 | VREDUCEBF16Zrmikz = 20734, |
| 20748 | VREDUCEBF16Zrri = 20735, |
| 20749 | VREDUCEBF16Zrrik = 20736, |
| 20750 | VREDUCEBF16Zrrikz = 20737, |
| 20751 | VREDUCEPDZ128rmbi = 20738, |
| 20752 | VREDUCEPDZ128rmbik = 20739, |
| 20753 | VREDUCEPDZ128rmbikz = 20740, |
| 20754 | VREDUCEPDZ128rmi = 20741, |
| 20755 | VREDUCEPDZ128rmik = 20742, |
| 20756 | VREDUCEPDZ128rmikz = 20743, |
| 20757 | VREDUCEPDZ128rri = 20744, |
| 20758 | VREDUCEPDZ128rrik = 20745, |
| 20759 | VREDUCEPDZ128rrikz = 20746, |
| 20760 | VREDUCEPDZ256rmbi = 20747, |
| 20761 | VREDUCEPDZ256rmbik = 20748, |
| 20762 | VREDUCEPDZ256rmbikz = 20749, |
| 20763 | VREDUCEPDZ256rmi = 20750, |
| 20764 | VREDUCEPDZ256rmik = 20751, |
| 20765 | VREDUCEPDZ256rmikz = 20752, |
| 20766 | VREDUCEPDZ256rri = 20753, |
| 20767 | VREDUCEPDZ256rrik = 20754, |
| 20768 | VREDUCEPDZ256rrikz = 20755, |
| 20769 | VREDUCEPDZrmbi = 20756, |
| 20770 | VREDUCEPDZrmbik = 20757, |
| 20771 | VREDUCEPDZrmbikz = 20758, |
| 20772 | VREDUCEPDZrmi = 20759, |
| 20773 | VREDUCEPDZrmik = 20760, |
| 20774 | VREDUCEPDZrmikz = 20761, |
| 20775 | VREDUCEPDZrri = 20762, |
| 20776 | VREDUCEPDZrrib = 20763, |
| 20777 | VREDUCEPDZrribk = 20764, |
| 20778 | VREDUCEPDZrribkz = 20765, |
| 20779 | VREDUCEPDZrrik = 20766, |
| 20780 | VREDUCEPDZrrikz = 20767, |
| 20781 | VREDUCEPHZ128rmbi = 20768, |
| 20782 | VREDUCEPHZ128rmbik = 20769, |
| 20783 | VREDUCEPHZ128rmbikz = 20770, |
| 20784 | VREDUCEPHZ128rmi = 20771, |
| 20785 | VREDUCEPHZ128rmik = 20772, |
| 20786 | VREDUCEPHZ128rmikz = 20773, |
| 20787 | VREDUCEPHZ128rri = 20774, |
| 20788 | VREDUCEPHZ128rrik = 20775, |
| 20789 | VREDUCEPHZ128rrikz = 20776, |
| 20790 | VREDUCEPHZ256rmbi = 20777, |
| 20791 | VREDUCEPHZ256rmbik = 20778, |
| 20792 | VREDUCEPHZ256rmbikz = 20779, |
| 20793 | VREDUCEPHZ256rmi = 20780, |
| 20794 | VREDUCEPHZ256rmik = 20781, |
| 20795 | VREDUCEPHZ256rmikz = 20782, |
| 20796 | VREDUCEPHZ256rri = 20783, |
| 20797 | VREDUCEPHZ256rrik = 20784, |
| 20798 | VREDUCEPHZ256rrikz = 20785, |
| 20799 | VREDUCEPHZrmbi = 20786, |
| 20800 | VREDUCEPHZrmbik = 20787, |
| 20801 | VREDUCEPHZrmbikz = 20788, |
| 20802 | VREDUCEPHZrmi = 20789, |
| 20803 | VREDUCEPHZrmik = 20790, |
| 20804 | VREDUCEPHZrmikz = 20791, |
| 20805 | VREDUCEPHZrri = 20792, |
| 20806 | VREDUCEPHZrrib = 20793, |
| 20807 | VREDUCEPHZrribk = 20794, |
| 20808 | VREDUCEPHZrribkz = 20795, |
| 20809 | VREDUCEPHZrrik = 20796, |
| 20810 | VREDUCEPHZrrikz = 20797, |
| 20811 | VREDUCEPSZ128rmbi = 20798, |
| 20812 | VREDUCEPSZ128rmbik = 20799, |
| 20813 | VREDUCEPSZ128rmbikz = 20800, |
| 20814 | VREDUCEPSZ128rmi = 20801, |
| 20815 | VREDUCEPSZ128rmik = 20802, |
| 20816 | VREDUCEPSZ128rmikz = 20803, |
| 20817 | VREDUCEPSZ128rri = 20804, |
| 20818 | VREDUCEPSZ128rrik = 20805, |
| 20819 | VREDUCEPSZ128rrikz = 20806, |
| 20820 | VREDUCEPSZ256rmbi = 20807, |
| 20821 | VREDUCEPSZ256rmbik = 20808, |
| 20822 | VREDUCEPSZ256rmbikz = 20809, |
| 20823 | VREDUCEPSZ256rmi = 20810, |
| 20824 | VREDUCEPSZ256rmik = 20811, |
| 20825 | VREDUCEPSZ256rmikz = 20812, |
| 20826 | VREDUCEPSZ256rri = 20813, |
| 20827 | VREDUCEPSZ256rrik = 20814, |
| 20828 | VREDUCEPSZ256rrikz = 20815, |
| 20829 | VREDUCEPSZrmbi = 20816, |
| 20830 | VREDUCEPSZrmbik = 20817, |
| 20831 | VREDUCEPSZrmbikz = 20818, |
| 20832 | VREDUCEPSZrmi = 20819, |
| 20833 | VREDUCEPSZrmik = 20820, |
| 20834 | VREDUCEPSZrmikz = 20821, |
| 20835 | VREDUCEPSZrri = 20822, |
| 20836 | VREDUCEPSZrrib = 20823, |
| 20837 | VREDUCEPSZrribk = 20824, |
| 20838 | VREDUCEPSZrribkz = 20825, |
| 20839 | VREDUCEPSZrrik = 20826, |
| 20840 | VREDUCEPSZrrikz = 20827, |
| 20841 | VREDUCESDZrmi = 20828, |
| 20842 | VREDUCESDZrmik = 20829, |
| 20843 | VREDUCESDZrmikz = 20830, |
| 20844 | VREDUCESDZrri = 20831, |
| 20845 | VREDUCESDZrrib = 20832, |
| 20846 | VREDUCESDZrribk = 20833, |
| 20847 | VREDUCESDZrribkz = 20834, |
| 20848 | VREDUCESDZrrik = 20835, |
| 20849 | VREDUCESDZrrikz = 20836, |
| 20850 | VREDUCESHZrmi = 20837, |
| 20851 | VREDUCESHZrmik = 20838, |
| 20852 | VREDUCESHZrmikz = 20839, |
| 20853 | VREDUCESHZrri = 20840, |
| 20854 | VREDUCESHZrrib = 20841, |
| 20855 | VREDUCESHZrribk = 20842, |
| 20856 | VREDUCESHZrribkz = 20843, |
| 20857 | VREDUCESHZrrik = 20844, |
| 20858 | VREDUCESHZrrikz = 20845, |
| 20859 | VREDUCESSZrmi = 20846, |
| 20860 | VREDUCESSZrmik = 20847, |
| 20861 | VREDUCESSZrmikz = 20848, |
| 20862 | VREDUCESSZrri = 20849, |
| 20863 | VREDUCESSZrrib = 20850, |
| 20864 | VREDUCESSZrribk = 20851, |
| 20865 | VREDUCESSZrribkz = 20852, |
| 20866 | VREDUCESSZrrik = 20853, |
| 20867 | VREDUCESSZrrikz = 20854, |
| 20868 | VRNDSCALEBF16Z128rmbi = 20855, |
| 20869 | VRNDSCALEBF16Z128rmbik = 20856, |
| 20870 | VRNDSCALEBF16Z128rmbikz = 20857, |
| 20871 | VRNDSCALEBF16Z128rmi = 20858, |
| 20872 | VRNDSCALEBF16Z128rmik = 20859, |
| 20873 | VRNDSCALEBF16Z128rmikz = 20860, |
| 20874 | VRNDSCALEBF16Z128rri = 20861, |
| 20875 | VRNDSCALEBF16Z128rrik = 20862, |
| 20876 | VRNDSCALEBF16Z128rrikz = 20863, |
| 20877 | VRNDSCALEBF16Z256rmbi = 20864, |
| 20878 | VRNDSCALEBF16Z256rmbik = 20865, |
| 20879 | VRNDSCALEBF16Z256rmbikz = 20866, |
| 20880 | VRNDSCALEBF16Z256rmi = 20867, |
| 20881 | VRNDSCALEBF16Z256rmik = 20868, |
| 20882 | VRNDSCALEBF16Z256rmikz = 20869, |
| 20883 | VRNDSCALEBF16Z256rri = 20870, |
| 20884 | VRNDSCALEBF16Z256rrik = 20871, |
| 20885 | VRNDSCALEBF16Z256rrikz = 20872, |
| 20886 | VRNDSCALEBF16Zrmbi = 20873, |
| 20887 | VRNDSCALEBF16Zrmbik = 20874, |
| 20888 | VRNDSCALEBF16Zrmbikz = 20875, |
| 20889 | VRNDSCALEBF16Zrmi = 20876, |
| 20890 | VRNDSCALEBF16Zrmik = 20877, |
| 20891 | VRNDSCALEBF16Zrmikz = 20878, |
| 20892 | VRNDSCALEBF16Zrri = 20879, |
| 20893 | VRNDSCALEBF16Zrrik = 20880, |
| 20894 | VRNDSCALEBF16Zrrikz = 20881, |
| 20895 | VRNDSCALEPDZ128rmbi = 20882, |
| 20896 | VRNDSCALEPDZ128rmbik = 20883, |
| 20897 | VRNDSCALEPDZ128rmbikz = 20884, |
| 20898 | VRNDSCALEPDZ128rmi = 20885, |
| 20899 | VRNDSCALEPDZ128rmik = 20886, |
| 20900 | VRNDSCALEPDZ128rmikz = 20887, |
| 20901 | VRNDSCALEPDZ128rri = 20888, |
| 20902 | VRNDSCALEPDZ128rrik = 20889, |
| 20903 | VRNDSCALEPDZ128rrikz = 20890, |
| 20904 | VRNDSCALEPDZ256rmbi = 20891, |
| 20905 | VRNDSCALEPDZ256rmbik = 20892, |
| 20906 | VRNDSCALEPDZ256rmbikz = 20893, |
| 20907 | VRNDSCALEPDZ256rmi = 20894, |
| 20908 | VRNDSCALEPDZ256rmik = 20895, |
| 20909 | VRNDSCALEPDZ256rmikz = 20896, |
| 20910 | VRNDSCALEPDZ256rri = 20897, |
| 20911 | VRNDSCALEPDZ256rrik = 20898, |
| 20912 | VRNDSCALEPDZ256rrikz = 20899, |
| 20913 | VRNDSCALEPDZrmbi = 20900, |
| 20914 | VRNDSCALEPDZrmbik = 20901, |
| 20915 | VRNDSCALEPDZrmbikz = 20902, |
| 20916 | VRNDSCALEPDZrmi = 20903, |
| 20917 | VRNDSCALEPDZrmik = 20904, |
| 20918 | VRNDSCALEPDZrmikz = 20905, |
| 20919 | VRNDSCALEPDZrri = 20906, |
| 20920 | VRNDSCALEPDZrrib = 20907, |
| 20921 | VRNDSCALEPDZrribk = 20908, |
| 20922 | VRNDSCALEPDZrribkz = 20909, |
| 20923 | VRNDSCALEPDZrrik = 20910, |
| 20924 | VRNDSCALEPDZrrikz = 20911, |
| 20925 | VRNDSCALEPHZ128rmbi = 20912, |
| 20926 | VRNDSCALEPHZ128rmbik = 20913, |
| 20927 | VRNDSCALEPHZ128rmbikz = 20914, |
| 20928 | VRNDSCALEPHZ128rmi = 20915, |
| 20929 | VRNDSCALEPHZ128rmik = 20916, |
| 20930 | VRNDSCALEPHZ128rmikz = 20917, |
| 20931 | VRNDSCALEPHZ128rri = 20918, |
| 20932 | VRNDSCALEPHZ128rrik = 20919, |
| 20933 | VRNDSCALEPHZ128rrikz = 20920, |
| 20934 | VRNDSCALEPHZ256rmbi = 20921, |
| 20935 | VRNDSCALEPHZ256rmbik = 20922, |
| 20936 | VRNDSCALEPHZ256rmbikz = 20923, |
| 20937 | VRNDSCALEPHZ256rmi = 20924, |
| 20938 | VRNDSCALEPHZ256rmik = 20925, |
| 20939 | VRNDSCALEPHZ256rmikz = 20926, |
| 20940 | VRNDSCALEPHZ256rri = 20927, |
| 20941 | VRNDSCALEPHZ256rrik = 20928, |
| 20942 | VRNDSCALEPHZ256rrikz = 20929, |
| 20943 | VRNDSCALEPHZrmbi = 20930, |
| 20944 | VRNDSCALEPHZrmbik = 20931, |
| 20945 | VRNDSCALEPHZrmbikz = 20932, |
| 20946 | VRNDSCALEPHZrmi = 20933, |
| 20947 | VRNDSCALEPHZrmik = 20934, |
| 20948 | VRNDSCALEPHZrmikz = 20935, |
| 20949 | VRNDSCALEPHZrri = 20936, |
| 20950 | VRNDSCALEPHZrrib = 20937, |
| 20951 | VRNDSCALEPHZrribk = 20938, |
| 20952 | VRNDSCALEPHZrribkz = 20939, |
| 20953 | VRNDSCALEPHZrrik = 20940, |
| 20954 | VRNDSCALEPHZrrikz = 20941, |
| 20955 | VRNDSCALEPSZ128rmbi = 20942, |
| 20956 | VRNDSCALEPSZ128rmbik = 20943, |
| 20957 | VRNDSCALEPSZ128rmbikz = 20944, |
| 20958 | VRNDSCALEPSZ128rmi = 20945, |
| 20959 | VRNDSCALEPSZ128rmik = 20946, |
| 20960 | VRNDSCALEPSZ128rmikz = 20947, |
| 20961 | VRNDSCALEPSZ128rri = 20948, |
| 20962 | VRNDSCALEPSZ128rrik = 20949, |
| 20963 | VRNDSCALEPSZ128rrikz = 20950, |
| 20964 | VRNDSCALEPSZ256rmbi = 20951, |
| 20965 | VRNDSCALEPSZ256rmbik = 20952, |
| 20966 | VRNDSCALEPSZ256rmbikz = 20953, |
| 20967 | VRNDSCALEPSZ256rmi = 20954, |
| 20968 | VRNDSCALEPSZ256rmik = 20955, |
| 20969 | VRNDSCALEPSZ256rmikz = 20956, |
| 20970 | VRNDSCALEPSZ256rri = 20957, |
| 20971 | VRNDSCALEPSZ256rrik = 20958, |
| 20972 | VRNDSCALEPSZ256rrikz = 20959, |
| 20973 | VRNDSCALEPSZrmbi = 20960, |
| 20974 | VRNDSCALEPSZrmbik = 20961, |
| 20975 | VRNDSCALEPSZrmbikz = 20962, |
| 20976 | VRNDSCALEPSZrmi = 20963, |
| 20977 | VRNDSCALEPSZrmik = 20964, |
| 20978 | VRNDSCALEPSZrmikz = 20965, |
| 20979 | VRNDSCALEPSZrri = 20966, |
| 20980 | VRNDSCALEPSZrrib = 20967, |
| 20981 | VRNDSCALEPSZrribk = 20968, |
| 20982 | VRNDSCALEPSZrribkz = 20969, |
| 20983 | VRNDSCALEPSZrrik = 20970, |
| 20984 | VRNDSCALEPSZrrikz = 20971, |
| 20985 | VRNDSCALESDZrmi = 20972, |
| 20986 | VRNDSCALESDZrmi_Int = 20973, |
| 20987 | VRNDSCALESDZrmik_Int = 20974, |
| 20988 | VRNDSCALESDZrmikz_Int = 20975, |
| 20989 | VRNDSCALESDZrri = 20976, |
| 20990 | VRNDSCALESDZrri_Int = 20977, |
| 20991 | VRNDSCALESDZrrib_Int = 20978, |
| 20992 | VRNDSCALESDZrribk_Int = 20979, |
| 20993 | VRNDSCALESDZrribkz_Int = 20980, |
| 20994 | VRNDSCALESDZrrik_Int = 20981, |
| 20995 | VRNDSCALESDZrrikz_Int = 20982, |
| 20996 | VRNDSCALESHZrmi = 20983, |
| 20997 | VRNDSCALESHZrmi_Int = 20984, |
| 20998 | VRNDSCALESHZrmik_Int = 20985, |
| 20999 | VRNDSCALESHZrmikz_Int = 20986, |
| 21000 | VRNDSCALESHZrri = 20987, |
| 21001 | VRNDSCALESHZrri_Int = 20988, |
| 21002 | VRNDSCALESHZrrib_Int = 20989, |
| 21003 | VRNDSCALESHZrribk_Int = 20990, |
| 21004 | VRNDSCALESHZrribkz_Int = 20991, |
| 21005 | VRNDSCALESHZrrik_Int = 20992, |
| 21006 | VRNDSCALESHZrrikz_Int = 20993, |
| 21007 | VRNDSCALESSZrmi = 20994, |
| 21008 | VRNDSCALESSZrmi_Int = 20995, |
| 21009 | VRNDSCALESSZrmik_Int = 20996, |
| 21010 | VRNDSCALESSZrmikz_Int = 20997, |
| 21011 | VRNDSCALESSZrri = 20998, |
| 21012 | VRNDSCALESSZrri_Int = 20999, |
| 21013 | VRNDSCALESSZrrib_Int = 21000, |
| 21014 | VRNDSCALESSZrribk_Int = 21001, |
| 21015 | VRNDSCALESSZrribkz_Int = 21002, |
| 21016 | VRNDSCALESSZrrik_Int = 21003, |
| 21017 | VRNDSCALESSZrrikz_Int = 21004, |
| 21018 | VROUNDPDYmi = 21005, |
| 21019 | VROUNDPDYri = 21006, |
| 21020 | VROUNDPDmi = 21007, |
| 21021 | VROUNDPDri = 21008, |
| 21022 | VROUNDPSYmi = 21009, |
| 21023 | VROUNDPSYri = 21010, |
| 21024 | VROUNDPSmi = 21011, |
| 21025 | VROUNDPSri = 21012, |
| 21026 | VROUNDSDmi = 21013, |
| 21027 | VROUNDSDmi_Int = 21014, |
| 21028 | VROUNDSDri = 21015, |
| 21029 | VROUNDSDri_Int = 21016, |
| 21030 | VROUNDSSmi = 21017, |
| 21031 | VROUNDSSmi_Int = 21018, |
| 21032 | VROUNDSSri = 21019, |
| 21033 | VROUNDSSri_Int = 21020, |
| 21034 | VRSQRT14PDZ128m = 21021, |
| 21035 | VRSQRT14PDZ128mb = 21022, |
| 21036 | VRSQRT14PDZ128mbk = 21023, |
| 21037 | VRSQRT14PDZ128mbkz = 21024, |
| 21038 | VRSQRT14PDZ128mk = 21025, |
| 21039 | VRSQRT14PDZ128mkz = 21026, |
| 21040 | VRSQRT14PDZ128r = 21027, |
| 21041 | VRSQRT14PDZ128rk = 21028, |
| 21042 | VRSQRT14PDZ128rkz = 21029, |
| 21043 | VRSQRT14PDZ256m = 21030, |
| 21044 | VRSQRT14PDZ256mb = 21031, |
| 21045 | VRSQRT14PDZ256mbk = 21032, |
| 21046 | VRSQRT14PDZ256mbkz = 21033, |
| 21047 | VRSQRT14PDZ256mk = 21034, |
| 21048 | VRSQRT14PDZ256mkz = 21035, |
| 21049 | VRSQRT14PDZ256r = 21036, |
| 21050 | VRSQRT14PDZ256rk = 21037, |
| 21051 | VRSQRT14PDZ256rkz = 21038, |
| 21052 | VRSQRT14PDZm = 21039, |
| 21053 | VRSQRT14PDZmb = 21040, |
| 21054 | VRSQRT14PDZmbk = 21041, |
| 21055 | VRSQRT14PDZmbkz = 21042, |
| 21056 | VRSQRT14PDZmk = 21043, |
| 21057 | VRSQRT14PDZmkz = 21044, |
| 21058 | VRSQRT14PDZr = 21045, |
| 21059 | VRSQRT14PDZrk = 21046, |
| 21060 | VRSQRT14PDZrkz = 21047, |
| 21061 | VRSQRT14PSZ128m = 21048, |
| 21062 | VRSQRT14PSZ128mb = 21049, |
| 21063 | VRSQRT14PSZ128mbk = 21050, |
| 21064 | VRSQRT14PSZ128mbkz = 21051, |
| 21065 | VRSQRT14PSZ128mk = 21052, |
| 21066 | VRSQRT14PSZ128mkz = 21053, |
| 21067 | VRSQRT14PSZ128r = 21054, |
| 21068 | VRSQRT14PSZ128rk = 21055, |
| 21069 | VRSQRT14PSZ128rkz = 21056, |
| 21070 | VRSQRT14PSZ256m = 21057, |
| 21071 | VRSQRT14PSZ256mb = 21058, |
| 21072 | VRSQRT14PSZ256mbk = 21059, |
| 21073 | VRSQRT14PSZ256mbkz = 21060, |
| 21074 | VRSQRT14PSZ256mk = 21061, |
| 21075 | VRSQRT14PSZ256mkz = 21062, |
| 21076 | VRSQRT14PSZ256r = 21063, |
| 21077 | VRSQRT14PSZ256rk = 21064, |
| 21078 | VRSQRT14PSZ256rkz = 21065, |
| 21079 | VRSQRT14PSZm = 21066, |
| 21080 | VRSQRT14PSZmb = 21067, |
| 21081 | VRSQRT14PSZmbk = 21068, |
| 21082 | VRSQRT14PSZmbkz = 21069, |
| 21083 | VRSQRT14PSZmk = 21070, |
| 21084 | VRSQRT14PSZmkz = 21071, |
| 21085 | VRSQRT14PSZr = 21072, |
| 21086 | VRSQRT14PSZrk = 21073, |
| 21087 | VRSQRT14PSZrkz = 21074, |
| 21088 | VRSQRT14SDZrm = 21075, |
| 21089 | VRSQRT14SDZrmk = 21076, |
| 21090 | VRSQRT14SDZrmkz = 21077, |
| 21091 | VRSQRT14SDZrr = 21078, |
| 21092 | VRSQRT14SDZrrk = 21079, |
| 21093 | VRSQRT14SDZrrkz = 21080, |
| 21094 | VRSQRT14SSZrm = 21081, |
| 21095 | VRSQRT14SSZrmk = 21082, |
| 21096 | VRSQRT14SSZrmkz = 21083, |
| 21097 | VRSQRT14SSZrr = 21084, |
| 21098 | VRSQRT14SSZrrk = 21085, |
| 21099 | VRSQRT14SSZrrkz = 21086, |
| 21100 | VRSQRT28PDZm = 21087, |
| 21101 | VRSQRT28PDZmb = 21088, |
| 21102 | VRSQRT28PDZmbk = 21089, |
| 21103 | VRSQRT28PDZmbkz = 21090, |
| 21104 | VRSQRT28PDZmk = 21091, |
| 21105 | VRSQRT28PDZmkz = 21092, |
| 21106 | VRSQRT28PDZr = 21093, |
| 21107 | VRSQRT28PDZrb = 21094, |
| 21108 | VRSQRT28PDZrbk = 21095, |
| 21109 | VRSQRT28PDZrbkz = 21096, |
| 21110 | VRSQRT28PDZrk = 21097, |
| 21111 | VRSQRT28PDZrkz = 21098, |
| 21112 | VRSQRT28PSZm = 21099, |
| 21113 | VRSQRT28PSZmb = 21100, |
| 21114 | VRSQRT28PSZmbk = 21101, |
| 21115 | VRSQRT28PSZmbkz = 21102, |
| 21116 | VRSQRT28PSZmk = 21103, |
| 21117 | VRSQRT28PSZmkz = 21104, |
| 21118 | VRSQRT28PSZr = 21105, |
| 21119 | VRSQRT28PSZrb = 21106, |
| 21120 | VRSQRT28PSZrbk = 21107, |
| 21121 | VRSQRT28PSZrbkz = 21108, |
| 21122 | VRSQRT28PSZrk = 21109, |
| 21123 | VRSQRT28PSZrkz = 21110, |
| 21124 | VRSQRT28SDZm = 21111, |
| 21125 | VRSQRT28SDZmk = 21112, |
| 21126 | VRSQRT28SDZmkz = 21113, |
| 21127 | VRSQRT28SDZr = 21114, |
| 21128 | VRSQRT28SDZrb = 21115, |
| 21129 | VRSQRT28SDZrbk = 21116, |
| 21130 | VRSQRT28SDZrbkz = 21117, |
| 21131 | VRSQRT28SDZrk = 21118, |
| 21132 | VRSQRT28SDZrkz = 21119, |
| 21133 | VRSQRT28SSZm = 21120, |
| 21134 | VRSQRT28SSZmk = 21121, |
| 21135 | VRSQRT28SSZmkz = 21122, |
| 21136 | VRSQRT28SSZr = 21123, |
| 21137 | VRSQRT28SSZrb = 21124, |
| 21138 | VRSQRT28SSZrbk = 21125, |
| 21139 | VRSQRT28SSZrbkz = 21126, |
| 21140 | VRSQRT28SSZrk = 21127, |
| 21141 | VRSQRT28SSZrkz = 21128, |
| 21142 | VRSQRTBF16Z128m = 21129, |
| 21143 | VRSQRTBF16Z128mb = 21130, |
| 21144 | VRSQRTBF16Z128mbk = 21131, |
| 21145 | VRSQRTBF16Z128mbkz = 21132, |
| 21146 | VRSQRTBF16Z128mk = 21133, |
| 21147 | VRSQRTBF16Z128mkz = 21134, |
| 21148 | VRSQRTBF16Z128r = 21135, |
| 21149 | VRSQRTBF16Z128rk = 21136, |
| 21150 | VRSQRTBF16Z128rkz = 21137, |
| 21151 | VRSQRTBF16Z256m = 21138, |
| 21152 | VRSQRTBF16Z256mb = 21139, |
| 21153 | VRSQRTBF16Z256mbk = 21140, |
| 21154 | VRSQRTBF16Z256mbkz = 21141, |
| 21155 | VRSQRTBF16Z256mk = 21142, |
| 21156 | VRSQRTBF16Z256mkz = 21143, |
| 21157 | VRSQRTBF16Z256r = 21144, |
| 21158 | VRSQRTBF16Z256rk = 21145, |
| 21159 | VRSQRTBF16Z256rkz = 21146, |
| 21160 | VRSQRTBF16Zm = 21147, |
| 21161 | VRSQRTBF16Zmb = 21148, |
| 21162 | VRSQRTBF16Zmbk = 21149, |
| 21163 | VRSQRTBF16Zmbkz = 21150, |
| 21164 | VRSQRTBF16Zmk = 21151, |
| 21165 | VRSQRTBF16Zmkz = 21152, |
| 21166 | VRSQRTBF16Zr = 21153, |
| 21167 | VRSQRTBF16Zrk = 21154, |
| 21168 | VRSQRTBF16Zrkz = 21155, |
| 21169 | VRSQRTPHZ128m = 21156, |
| 21170 | VRSQRTPHZ128mb = 21157, |
| 21171 | VRSQRTPHZ128mbk = 21158, |
| 21172 | VRSQRTPHZ128mbkz = 21159, |
| 21173 | VRSQRTPHZ128mk = 21160, |
| 21174 | VRSQRTPHZ128mkz = 21161, |
| 21175 | VRSQRTPHZ128r = 21162, |
| 21176 | VRSQRTPHZ128rk = 21163, |
| 21177 | VRSQRTPHZ128rkz = 21164, |
| 21178 | VRSQRTPHZ256m = 21165, |
| 21179 | VRSQRTPHZ256mb = 21166, |
| 21180 | VRSQRTPHZ256mbk = 21167, |
| 21181 | VRSQRTPHZ256mbkz = 21168, |
| 21182 | VRSQRTPHZ256mk = 21169, |
| 21183 | VRSQRTPHZ256mkz = 21170, |
| 21184 | VRSQRTPHZ256r = 21171, |
| 21185 | VRSQRTPHZ256rk = 21172, |
| 21186 | VRSQRTPHZ256rkz = 21173, |
| 21187 | VRSQRTPHZm = 21174, |
| 21188 | VRSQRTPHZmb = 21175, |
| 21189 | VRSQRTPHZmbk = 21176, |
| 21190 | VRSQRTPHZmbkz = 21177, |
| 21191 | VRSQRTPHZmk = 21178, |
| 21192 | VRSQRTPHZmkz = 21179, |
| 21193 | VRSQRTPHZr = 21180, |
| 21194 | VRSQRTPHZrk = 21181, |
| 21195 | VRSQRTPHZrkz = 21182, |
| 21196 | VRSQRTPSYm = 21183, |
| 21197 | VRSQRTPSYr = 21184, |
| 21198 | VRSQRTPSm = 21185, |
| 21199 | VRSQRTPSr = 21186, |
| 21200 | VRSQRTSHZrm = 21187, |
| 21201 | VRSQRTSHZrmk = 21188, |
| 21202 | VRSQRTSHZrmkz = 21189, |
| 21203 | VRSQRTSHZrr = 21190, |
| 21204 | VRSQRTSHZrrk = 21191, |
| 21205 | VRSQRTSHZrrkz = 21192, |
| 21206 | VRSQRTSSm = 21193, |
| 21207 | VRSQRTSSm_Int = 21194, |
| 21208 | VRSQRTSSr = 21195, |
| 21209 | VRSQRTSSr_Int = 21196, |
| 21210 | VSCALEFBF16Z128rm = 21197, |
| 21211 | VSCALEFBF16Z128rmb = 21198, |
| 21212 | VSCALEFBF16Z128rmbk = 21199, |
| 21213 | VSCALEFBF16Z128rmbkz = 21200, |
| 21214 | VSCALEFBF16Z128rmk = 21201, |
| 21215 | VSCALEFBF16Z128rmkz = 21202, |
| 21216 | VSCALEFBF16Z128rr = 21203, |
| 21217 | VSCALEFBF16Z128rrk = 21204, |
| 21218 | VSCALEFBF16Z128rrkz = 21205, |
| 21219 | VSCALEFBF16Z256rm = 21206, |
| 21220 | VSCALEFBF16Z256rmb = 21207, |
| 21221 | VSCALEFBF16Z256rmbk = 21208, |
| 21222 | VSCALEFBF16Z256rmbkz = 21209, |
| 21223 | VSCALEFBF16Z256rmk = 21210, |
| 21224 | VSCALEFBF16Z256rmkz = 21211, |
| 21225 | VSCALEFBF16Z256rr = 21212, |
| 21226 | VSCALEFBF16Z256rrk = 21213, |
| 21227 | VSCALEFBF16Z256rrkz = 21214, |
| 21228 | VSCALEFBF16Zrm = 21215, |
| 21229 | VSCALEFBF16Zrmb = 21216, |
| 21230 | VSCALEFBF16Zrmbk = 21217, |
| 21231 | VSCALEFBF16Zrmbkz = 21218, |
| 21232 | VSCALEFBF16Zrmk = 21219, |
| 21233 | VSCALEFBF16Zrmkz = 21220, |
| 21234 | VSCALEFBF16Zrr = 21221, |
| 21235 | VSCALEFBF16Zrrk = 21222, |
| 21236 | VSCALEFBF16Zrrkz = 21223, |
| 21237 | VSCALEFPDZ128rm = 21224, |
| 21238 | VSCALEFPDZ128rmb = 21225, |
| 21239 | VSCALEFPDZ128rmbk = 21226, |
| 21240 | VSCALEFPDZ128rmbkz = 21227, |
| 21241 | VSCALEFPDZ128rmk = 21228, |
| 21242 | VSCALEFPDZ128rmkz = 21229, |
| 21243 | VSCALEFPDZ128rr = 21230, |
| 21244 | VSCALEFPDZ128rrk = 21231, |
| 21245 | VSCALEFPDZ128rrkz = 21232, |
| 21246 | VSCALEFPDZ256rm = 21233, |
| 21247 | VSCALEFPDZ256rmb = 21234, |
| 21248 | VSCALEFPDZ256rmbk = 21235, |
| 21249 | VSCALEFPDZ256rmbkz = 21236, |
| 21250 | VSCALEFPDZ256rmk = 21237, |
| 21251 | VSCALEFPDZ256rmkz = 21238, |
| 21252 | VSCALEFPDZ256rr = 21239, |
| 21253 | VSCALEFPDZ256rrk = 21240, |
| 21254 | VSCALEFPDZ256rrkz = 21241, |
| 21255 | VSCALEFPDZrm = 21242, |
| 21256 | VSCALEFPDZrmb = 21243, |
| 21257 | VSCALEFPDZrmbk = 21244, |
| 21258 | VSCALEFPDZrmbkz = 21245, |
| 21259 | VSCALEFPDZrmk = 21246, |
| 21260 | VSCALEFPDZrmkz = 21247, |
| 21261 | VSCALEFPDZrr = 21248, |
| 21262 | VSCALEFPDZrrb = 21249, |
| 21263 | VSCALEFPDZrrbk = 21250, |
| 21264 | VSCALEFPDZrrbkz = 21251, |
| 21265 | VSCALEFPDZrrk = 21252, |
| 21266 | VSCALEFPDZrrkz = 21253, |
| 21267 | VSCALEFPHZ128rm = 21254, |
| 21268 | VSCALEFPHZ128rmb = 21255, |
| 21269 | VSCALEFPHZ128rmbk = 21256, |
| 21270 | VSCALEFPHZ128rmbkz = 21257, |
| 21271 | VSCALEFPHZ128rmk = 21258, |
| 21272 | VSCALEFPHZ128rmkz = 21259, |
| 21273 | VSCALEFPHZ128rr = 21260, |
| 21274 | VSCALEFPHZ128rrk = 21261, |
| 21275 | VSCALEFPHZ128rrkz = 21262, |
| 21276 | VSCALEFPHZ256rm = 21263, |
| 21277 | VSCALEFPHZ256rmb = 21264, |
| 21278 | VSCALEFPHZ256rmbk = 21265, |
| 21279 | VSCALEFPHZ256rmbkz = 21266, |
| 21280 | VSCALEFPHZ256rmk = 21267, |
| 21281 | VSCALEFPHZ256rmkz = 21268, |
| 21282 | VSCALEFPHZ256rr = 21269, |
| 21283 | VSCALEFPHZ256rrk = 21270, |
| 21284 | VSCALEFPHZ256rrkz = 21271, |
| 21285 | VSCALEFPHZrm = 21272, |
| 21286 | VSCALEFPHZrmb = 21273, |
| 21287 | VSCALEFPHZrmbk = 21274, |
| 21288 | VSCALEFPHZrmbkz = 21275, |
| 21289 | VSCALEFPHZrmk = 21276, |
| 21290 | VSCALEFPHZrmkz = 21277, |
| 21291 | VSCALEFPHZrr = 21278, |
| 21292 | VSCALEFPHZrrb = 21279, |
| 21293 | VSCALEFPHZrrbk = 21280, |
| 21294 | VSCALEFPHZrrbkz = 21281, |
| 21295 | VSCALEFPHZrrk = 21282, |
| 21296 | VSCALEFPHZrrkz = 21283, |
| 21297 | VSCALEFPSZ128rm = 21284, |
| 21298 | VSCALEFPSZ128rmb = 21285, |
| 21299 | VSCALEFPSZ128rmbk = 21286, |
| 21300 | VSCALEFPSZ128rmbkz = 21287, |
| 21301 | VSCALEFPSZ128rmk = 21288, |
| 21302 | VSCALEFPSZ128rmkz = 21289, |
| 21303 | VSCALEFPSZ128rr = 21290, |
| 21304 | VSCALEFPSZ128rrk = 21291, |
| 21305 | VSCALEFPSZ128rrkz = 21292, |
| 21306 | VSCALEFPSZ256rm = 21293, |
| 21307 | VSCALEFPSZ256rmb = 21294, |
| 21308 | VSCALEFPSZ256rmbk = 21295, |
| 21309 | VSCALEFPSZ256rmbkz = 21296, |
| 21310 | VSCALEFPSZ256rmk = 21297, |
| 21311 | VSCALEFPSZ256rmkz = 21298, |
| 21312 | VSCALEFPSZ256rr = 21299, |
| 21313 | VSCALEFPSZ256rrk = 21300, |
| 21314 | VSCALEFPSZ256rrkz = 21301, |
| 21315 | VSCALEFPSZrm = 21302, |
| 21316 | VSCALEFPSZrmb = 21303, |
| 21317 | VSCALEFPSZrmbk = 21304, |
| 21318 | VSCALEFPSZrmbkz = 21305, |
| 21319 | VSCALEFPSZrmk = 21306, |
| 21320 | VSCALEFPSZrmkz = 21307, |
| 21321 | VSCALEFPSZrr = 21308, |
| 21322 | VSCALEFPSZrrb = 21309, |
| 21323 | VSCALEFPSZrrbk = 21310, |
| 21324 | VSCALEFPSZrrbkz = 21311, |
| 21325 | VSCALEFPSZrrk = 21312, |
| 21326 | VSCALEFPSZrrkz = 21313, |
| 21327 | VSCALEFSDZrm = 21314, |
| 21328 | VSCALEFSDZrmk = 21315, |
| 21329 | VSCALEFSDZrmkz = 21316, |
| 21330 | VSCALEFSDZrr = 21317, |
| 21331 | VSCALEFSDZrrb_Int = 21318, |
| 21332 | VSCALEFSDZrrbk_Int = 21319, |
| 21333 | VSCALEFSDZrrbkz_Int = 21320, |
| 21334 | VSCALEFSDZrrk = 21321, |
| 21335 | VSCALEFSDZrrkz = 21322, |
| 21336 | VSCALEFSHZrm = 21323, |
| 21337 | VSCALEFSHZrmk = 21324, |
| 21338 | VSCALEFSHZrmkz = 21325, |
| 21339 | VSCALEFSHZrr = 21326, |
| 21340 | VSCALEFSHZrrb_Int = 21327, |
| 21341 | VSCALEFSHZrrbk_Int = 21328, |
| 21342 | VSCALEFSHZrrbkz_Int = 21329, |
| 21343 | VSCALEFSHZrrk = 21330, |
| 21344 | VSCALEFSHZrrkz = 21331, |
| 21345 | VSCALEFSSZrm = 21332, |
| 21346 | VSCALEFSSZrmk = 21333, |
| 21347 | VSCALEFSSZrmkz = 21334, |
| 21348 | VSCALEFSSZrr = 21335, |
| 21349 | VSCALEFSSZrrb_Int = 21336, |
| 21350 | VSCALEFSSZrrbk_Int = 21337, |
| 21351 | VSCALEFSSZrrbkz_Int = 21338, |
| 21352 | VSCALEFSSZrrk = 21339, |
| 21353 | VSCALEFSSZrrkz = 21340, |
| 21354 | VSCATTERDPDZ128mr = 21341, |
| 21355 | VSCATTERDPDZ256mr = 21342, |
| 21356 | VSCATTERDPDZmr = 21343, |
| 21357 | VSCATTERDPSZ128mr = 21344, |
| 21358 | VSCATTERDPSZ256mr = 21345, |
| 21359 | VSCATTERDPSZmr = 21346, |
| 21360 | VSCATTERPF0DPDm = 21347, |
| 21361 | VSCATTERPF0DPSm = 21348, |
| 21362 | VSCATTERPF0QPDm = 21349, |
| 21363 | VSCATTERPF0QPSm = 21350, |
| 21364 | VSCATTERPF1DPDm = 21351, |
| 21365 | VSCATTERPF1DPSm = 21352, |
| 21366 | VSCATTERPF1QPDm = 21353, |
| 21367 | VSCATTERPF1QPSm = 21354, |
| 21368 | VSCATTERQPDZ128mr = 21355, |
| 21369 | VSCATTERQPDZ256mr = 21356, |
| 21370 | VSCATTERQPDZmr = 21357, |
| 21371 | VSCATTERQPSZ128mr = 21358, |
| 21372 | VSCATTERQPSZ256mr = 21359, |
| 21373 | VSCATTERQPSZmr = 21360, |
| 21374 | VSHA512MSG1rr = 21361, |
| 21375 | VSHA512MSG2rr = 21362, |
| 21376 | VSHA512RNDS2rr = 21363, |
| 21377 | VSHUFF32X4Z256rmbi = 21364, |
| 21378 | VSHUFF32X4Z256rmbik = 21365, |
| 21379 | VSHUFF32X4Z256rmbikz = 21366, |
| 21380 | VSHUFF32X4Z256rmi = 21367, |
| 21381 | VSHUFF32X4Z256rmik = 21368, |
| 21382 | VSHUFF32X4Z256rmikz = 21369, |
| 21383 | VSHUFF32X4Z256rri = 21370, |
| 21384 | VSHUFF32X4Z256rrik = 21371, |
| 21385 | VSHUFF32X4Z256rrikz = 21372, |
| 21386 | VSHUFF32X4Zrmbi = 21373, |
| 21387 | VSHUFF32X4Zrmbik = 21374, |
| 21388 | VSHUFF32X4Zrmbikz = 21375, |
| 21389 | VSHUFF32X4Zrmi = 21376, |
| 21390 | VSHUFF32X4Zrmik = 21377, |
| 21391 | VSHUFF32X4Zrmikz = 21378, |
| 21392 | VSHUFF32X4Zrri = 21379, |
| 21393 | VSHUFF32X4Zrrik = 21380, |
| 21394 | VSHUFF32X4Zrrikz = 21381, |
| 21395 | VSHUFF64X2Z256rmbi = 21382, |
| 21396 | VSHUFF64X2Z256rmbik = 21383, |
| 21397 | VSHUFF64X2Z256rmbikz = 21384, |
| 21398 | VSHUFF64X2Z256rmi = 21385, |
| 21399 | VSHUFF64X2Z256rmik = 21386, |
| 21400 | VSHUFF64X2Z256rmikz = 21387, |
| 21401 | VSHUFF64X2Z256rri = 21388, |
| 21402 | VSHUFF64X2Z256rrik = 21389, |
| 21403 | VSHUFF64X2Z256rrikz = 21390, |
| 21404 | VSHUFF64X2Zrmbi = 21391, |
| 21405 | VSHUFF64X2Zrmbik = 21392, |
| 21406 | VSHUFF64X2Zrmbikz = 21393, |
| 21407 | VSHUFF64X2Zrmi = 21394, |
| 21408 | VSHUFF64X2Zrmik = 21395, |
| 21409 | VSHUFF64X2Zrmikz = 21396, |
| 21410 | VSHUFF64X2Zrri = 21397, |
| 21411 | VSHUFF64X2Zrrik = 21398, |
| 21412 | VSHUFF64X2Zrrikz = 21399, |
| 21413 | VSHUFI32X4Z256rmbi = 21400, |
| 21414 | VSHUFI32X4Z256rmbik = 21401, |
| 21415 | VSHUFI32X4Z256rmbikz = 21402, |
| 21416 | VSHUFI32X4Z256rmi = 21403, |
| 21417 | VSHUFI32X4Z256rmik = 21404, |
| 21418 | VSHUFI32X4Z256rmikz = 21405, |
| 21419 | VSHUFI32X4Z256rri = 21406, |
| 21420 | VSHUFI32X4Z256rrik = 21407, |
| 21421 | VSHUFI32X4Z256rrikz = 21408, |
| 21422 | VSHUFI32X4Zrmbi = 21409, |
| 21423 | VSHUFI32X4Zrmbik = 21410, |
| 21424 | VSHUFI32X4Zrmbikz = 21411, |
| 21425 | VSHUFI32X4Zrmi = 21412, |
| 21426 | VSHUFI32X4Zrmik = 21413, |
| 21427 | VSHUFI32X4Zrmikz = 21414, |
| 21428 | VSHUFI32X4Zrri = 21415, |
| 21429 | VSHUFI32X4Zrrik = 21416, |
| 21430 | VSHUFI32X4Zrrikz = 21417, |
| 21431 | VSHUFI64X2Z256rmbi = 21418, |
| 21432 | VSHUFI64X2Z256rmbik = 21419, |
| 21433 | VSHUFI64X2Z256rmbikz = 21420, |
| 21434 | VSHUFI64X2Z256rmi = 21421, |
| 21435 | VSHUFI64X2Z256rmik = 21422, |
| 21436 | VSHUFI64X2Z256rmikz = 21423, |
| 21437 | VSHUFI64X2Z256rri = 21424, |
| 21438 | VSHUFI64X2Z256rrik = 21425, |
| 21439 | VSHUFI64X2Z256rrikz = 21426, |
| 21440 | VSHUFI64X2Zrmbi = 21427, |
| 21441 | VSHUFI64X2Zrmbik = 21428, |
| 21442 | VSHUFI64X2Zrmbikz = 21429, |
| 21443 | VSHUFI64X2Zrmi = 21430, |
| 21444 | VSHUFI64X2Zrmik = 21431, |
| 21445 | VSHUFI64X2Zrmikz = 21432, |
| 21446 | VSHUFI64X2Zrri = 21433, |
| 21447 | VSHUFI64X2Zrrik = 21434, |
| 21448 | VSHUFI64X2Zrrikz = 21435, |
| 21449 | VSHUFPDYrmi = 21436, |
| 21450 | VSHUFPDYrri = 21437, |
| 21451 | VSHUFPDZ128rmbi = 21438, |
| 21452 | VSHUFPDZ128rmbik = 21439, |
| 21453 | VSHUFPDZ128rmbikz = 21440, |
| 21454 | VSHUFPDZ128rmi = 21441, |
| 21455 | VSHUFPDZ128rmik = 21442, |
| 21456 | VSHUFPDZ128rmikz = 21443, |
| 21457 | VSHUFPDZ128rri = 21444, |
| 21458 | VSHUFPDZ128rrik = 21445, |
| 21459 | VSHUFPDZ128rrikz = 21446, |
| 21460 | VSHUFPDZ256rmbi = 21447, |
| 21461 | VSHUFPDZ256rmbik = 21448, |
| 21462 | VSHUFPDZ256rmbikz = 21449, |
| 21463 | VSHUFPDZ256rmi = 21450, |
| 21464 | VSHUFPDZ256rmik = 21451, |
| 21465 | VSHUFPDZ256rmikz = 21452, |
| 21466 | VSHUFPDZ256rri = 21453, |
| 21467 | VSHUFPDZ256rrik = 21454, |
| 21468 | VSHUFPDZ256rrikz = 21455, |
| 21469 | VSHUFPDZrmbi = 21456, |
| 21470 | VSHUFPDZrmbik = 21457, |
| 21471 | VSHUFPDZrmbikz = 21458, |
| 21472 | VSHUFPDZrmi = 21459, |
| 21473 | VSHUFPDZrmik = 21460, |
| 21474 | VSHUFPDZrmikz = 21461, |
| 21475 | VSHUFPDZrri = 21462, |
| 21476 | VSHUFPDZrrik = 21463, |
| 21477 | VSHUFPDZrrikz = 21464, |
| 21478 | VSHUFPDrmi = 21465, |
| 21479 | VSHUFPDrri = 21466, |
| 21480 | VSHUFPSYrmi = 21467, |
| 21481 | VSHUFPSYrri = 21468, |
| 21482 | VSHUFPSZ128rmbi = 21469, |
| 21483 | VSHUFPSZ128rmbik = 21470, |
| 21484 | VSHUFPSZ128rmbikz = 21471, |
| 21485 | VSHUFPSZ128rmi = 21472, |
| 21486 | VSHUFPSZ128rmik = 21473, |
| 21487 | VSHUFPSZ128rmikz = 21474, |
| 21488 | VSHUFPSZ128rri = 21475, |
| 21489 | VSHUFPSZ128rrik = 21476, |
| 21490 | VSHUFPSZ128rrikz = 21477, |
| 21491 | VSHUFPSZ256rmbi = 21478, |
| 21492 | VSHUFPSZ256rmbik = 21479, |
| 21493 | VSHUFPSZ256rmbikz = 21480, |
| 21494 | VSHUFPSZ256rmi = 21481, |
| 21495 | VSHUFPSZ256rmik = 21482, |
| 21496 | VSHUFPSZ256rmikz = 21483, |
| 21497 | VSHUFPSZ256rri = 21484, |
| 21498 | VSHUFPSZ256rrik = 21485, |
| 21499 | VSHUFPSZ256rrikz = 21486, |
| 21500 | VSHUFPSZrmbi = 21487, |
| 21501 | VSHUFPSZrmbik = 21488, |
| 21502 | VSHUFPSZrmbikz = 21489, |
| 21503 | VSHUFPSZrmi = 21490, |
| 21504 | VSHUFPSZrmik = 21491, |
| 21505 | VSHUFPSZrmikz = 21492, |
| 21506 | VSHUFPSZrri = 21493, |
| 21507 | VSHUFPSZrrik = 21494, |
| 21508 | VSHUFPSZrrikz = 21495, |
| 21509 | VSHUFPSrmi = 21496, |
| 21510 | VSHUFPSrri = 21497, |
| 21511 | VSM3MSG1rm = 21498, |
| 21512 | VSM3MSG1rr = 21499, |
| 21513 | VSM3MSG2rm = 21500, |
| 21514 | VSM3MSG2rr = 21501, |
| 21515 | VSM3RNDS2rmi = 21502, |
| 21516 | VSM3RNDS2rri = 21503, |
| 21517 | VSM4KEY4Yrm = 21504, |
| 21518 | VSM4KEY4Yrr = 21505, |
| 21519 | VSM4KEY4Z128rm = 21506, |
| 21520 | VSM4KEY4Z128rr = 21507, |
| 21521 | VSM4KEY4Z256rm = 21508, |
| 21522 | VSM4KEY4Z256rr = 21509, |
| 21523 | VSM4KEY4Zrm = 21510, |
| 21524 | VSM4KEY4Zrr = 21511, |
| 21525 | VSM4KEY4rm = 21512, |
| 21526 | VSM4KEY4rr = 21513, |
| 21527 | VSM4RNDS4Yrm = 21514, |
| 21528 | VSM4RNDS4Yrr = 21515, |
| 21529 | VSM4RNDS4Z128rm = 21516, |
| 21530 | VSM4RNDS4Z128rr = 21517, |
| 21531 | VSM4RNDS4Z256rm = 21518, |
| 21532 | VSM4RNDS4Z256rr = 21519, |
| 21533 | VSM4RNDS4Zrm = 21520, |
| 21534 | VSM4RNDS4Zrr = 21521, |
| 21535 | VSM4RNDS4rm = 21522, |
| 21536 | VSM4RNDS4rr = 21523, |
| 21537 | VSQRTBF16Z128m = 21524, |
| 21538 | VSQRTBF16Z128mb = 21525, |
| 21539 | VSQRTBF16Z128mbk = 21526, |
| 21540 | VSQRTBF16Z128mbkz = 21527, |
| 21541 | VSQRTBF16Z128mk = 21528, |
| 21542 | VSQRTBF16Z128mkz = 21529, |
| 21543 | VSQRTBF16Z128r = 21530, |
| 21544 | VSQRTBF16Z128rk = 21531, |
| 21545 | VSQRTBF16Z128rkz = 21532, |
| 21546 | VSQRTBF16Z256m = 21533, |
| 21547 | VSQRTBF16Z256mb = 21534, |
| 21548 | VSQRTBF16Z256mbk = 21535, |
| 21549 | VSQRTBF16Z256mbkz = 21536, |
| 21550 | VSQRTBF16Z256mk = 21537, |
| 21551 | VSQRTBF16Z256mkz = 21538, |
| 21552 | VSQRTBF16Z256r = 21539, |
| 21553 | VSQRTBF16Z256rk = 21540, |
| 21554 | VSQRTBF16Z256rkz = 21541, |
| 21555 | VSQRTBF16Zm = 21542, |
| 21556 | VSQRTBF16Zmb = 21543, |
| 21557 | VSQRTBF16Zmbk = 21544, |
| 21558 | VSQRTBF16Zmbkz = 21545, |
| 21559 | VSQRTBF16Zmk = 21546, |
| 21560 | VSQRTBF16Zmkz = 21547, |
| 21561 | VSQRTBF16Zr = 21548, |
| 21562 | VSQRTBF16Zrk = 21549, |
| 21563 | VSQRTBF16Zrkz = 21550, |
| 21564 | VSQRTPDYm = 21551, |
| 21565 | VSQRTPDYr = 21552, |
| 21566 | VSQRTPDZ128m = 21553, |
| 21567 | VSQRTPDZ128mb = 21554, |
| 21568 | VSQRTPDZ128mbk = 21555, |
| 21569 | VSQRTPDZ128mbkz = 21556, |
| 21570 | VSQRTPDZ128mk = 21557, |
| 21571 | VSQRTPDZ128mkz = 21558, |
| 21572 | VSQRTPDZ128r = 21559, |
| 21573 | VSQRTPDZ128rk = 21560, |
| 21574 | VSQRTPDZ128rkz = 21561, |
| 21575 | VSQRTPDZ256m = 21562, |
| 21576 | VSQRTPDZ256mb = 21563, |
| 21577 | VSQRTPDZ256mbk = 21564, |
| 21578 | VSQRTPDZ256mbkz = 21565, |
| 21579 | VSQRTPDZ256mk = 21566, |
| 21580 | VSQRTPDZ256mkz = 21567, |
| 21581 | VSQRTPDZ256r = 21568, |
| 21582 | VSQRTPDZ256rk = 21569, |
| 21583 | VSQRTPDZ256rkz = 21570, |
| 21584 | VSQRTPDZm = 21571, |
| 21585 | VSQRTPDZmb = 21572, |
| 21586 | VSQRTPDZmbk = 21573, |
| 21587 | VSQRTPDZmbkz = 21574, |
| 21588 | VSQRTPDZmk = 21575, |
| 21589 | VSQRTPDZmkz = 21576, |
| 21590 | VSQRTPDZr = 21577, |
| 21591 | VSQRTPDZrb = 21578, |
| 21592 | VSQRTPDZrbk = 21579, |
| 21593 | VSQRTPDZrbkz = 21580, |
| 21594 | VSQRTPDZrk = 21581, |
| 21595 | VSQRTPDZrkz = 21582, |
| 21596 | VSQRTPDm = 21583, |
| 21597 | VSQRTPDr = 21584, |
| 21598 | VSQRTPHZ128m = 21585, |
| 21599 | VSQRTPHZ128mb = 21586, |
| 21600 | VSQRTPHZ128mbk = 21587, |
| 21601 | VSQRTPHZ128mbkz = 21588, |
| 21602 | VSQRTPHZ128mk = 21589, |
| 21603 | VSQRTPHZ128mkz = 21590, |
| 21604 | VSQRTPHZ128r = 21591, |
| 21605 | VSQRTPHZ128rk = 21592, |
| 21606 | VSQRTPHZ128rkz = 21593, |
| 21607 | VSQRTPHZ256m = 21594, |
| 21608 | VSQRTPHZ256mb = 21595, |
| 21609 | VSQRTPHZ256mbk = 21596, |
| 21610 | VSQRTPHZ256mbkz = 21597, |
| 21611 | VSQRTPHZ256mk = 21598, |
| 21612 | VSQRTPHZ256mkz = 21599, |
| 21613 | VSQRTPHZ256r = 21600, |
| 21614 | VSQRTPHZ256rk = 21601, |
| 21615 | VSQRTPHZ256rkz = 21602, |
| 21616 | VSQRTPHZm = 21603, |
| 21617 | VSQRTPHZmb = 21604, |
| 21618 | VSQRTPHZmbk = 21605, |
| 21619 | VSQRTPHZmbkz = 21606, |
| 21620 | VSQRTPHZmk = 21607, |
| 21621 | VSQRTPHZmkz = 21608, |
| 21622 | VSQRTPHZr = 21609, |
| 21623 | VSQRTPHZrb = 21610, |
| 21624 | VSQRTPHZrbk = 21611, |
| 21625 | VSQRTPHZrbkz = 21612, |
| 21626 | VSQRTPHZrk = 21613, |
| 21627 | VSQRTPHZrkz = 21614, |
| 21628 | VSQRTPSYm = 21615, |
| 21629 | VSQRTPSYr = 21616, |
| 21630 | VSQRTPSZ128m = 21617, |
| 21631 | VSQRTPSZ128mb = 21618, |
| 21632 | VSQRTPSZ128mbk = 21619, |
| 21633 | VSQRTPSZ128mbkz = 21620, |
| 21634 | VSQRTPSZ128mk = 21621, |
| 21635 | VSQRTPSZ128mkz = 21622, |
| 21636 | VSQRTPSZ128r = 21623, |
| 21637 | VSQRTPSZ128rk = 21624, |
| 21638 | VSQRTPSZ128rkz = 21625, |
| 21639 | VSQRTPSZ256m = 21626, |
| 21640 | VSQRTPSZ256mb = 21627, |
| 21641 | VSQRTPSZ256mbk = 21628, |
| 21642 | VSQRTPSZ256mbkz = 21629, |
| 21643 | VSQRTPSZ256mk = 21630, |
| 21644 | VSQRTPSZ256mkz = 21631, |
| 21645 | VSQRTPSZ256r = 21632, |
| 21646 | VSQRTPSZ256rk = 21633, |
| 21647 | VSQRTPSZ256rkz = 21634, |
| 21648 | VSQRTPSZm = 21635, |
| 21649 | VSQRTPSZmb = 21636, |
| 21650 | VSQRTPSZmbk = 21637, |
| 21651 | VSQRTPSZmbkz = 21638, |
| 21652 | VSQRTPSZmk = 21639, |
| 21653 | VSQRTPSZmkz = 21640, |
| 21654 | VSQRTPSZr = 21641, |
| 21655 | VSQRTPSZrb = 21642, |
| 21656 | VSQRTPSZrbk = 21643, |
| 21657 | VSQRTPSZrbkz = 21644, |
| 21658 | VSQRTPSZrk = 21645, |
| 21659 | VSQRTPSZrkz = 21646, |
| 21660 | VSQRTPSm = 21647, |
| 21661 | VSQRTPSr = 21648, |
| 21662 | VSQRTSDZm = 21649, |
| 21663 | VSQRTSDZm_Int = 21650, |
| 21664 | VSQRTSDZmk_Int = 21651, |
| 21665 | VSQRTSDZmkz_Int = 21652, |
| 21666 | VSQRTSDZr = 21653, |
| 21667 | VSQRTSDZr_Int = 21654, |
| 21668 | VSQRTSDZrb_Int = 21655, |
| 21669 | VSQRTSDZrbk_Int = 21656, |
| 21670 | VSQRTSDZrbkz_Int = 21657, |
| 21671 | VSQRTSDZrk_Int = 21658, |
| 21672 | VSQRTSDZrkz_Int = 21659, |
| 21673 | VSQRTSDm = 21660, |
| 21674 | VSQRTSDm_Int = 21661, |
| 21675 | VSQRTSDr = 21662, |
| 21676 | VSQRTSDr_Int = 21663, |
| 21677 | VSQRTSHZm = 21664, |
| 21678 | VSQRTSHZm_Int = 21665, |
| 21679 | VSQRTSHZmk_Int = 21666, |
| 21680 | VSQRTSHZmkz_Int = 21667, |
| 21681 | VSQRTSHZr = 21668, |
| 21682 | VSQRTSHZr_Int = 21669, |
| 21683 | VSQRTSHZrb_Int = 21670, |
| 21684 | VSQRTSHZrbk_Int = 21671, |
| 21685 | VSQRTSHZrbkz_Int = 21672, |
| 21686 | VSQRTSHZrk_Int = 21673, |
| 21687 | VSQRTSHZrkz_Int = 21674, |
| 21688 | VSQRTSSZm = 21675, |
| 21689 | VSQRTSSZm_Int = 21676, |
| 21690 | VSQRTSSZmk_Int = 21677, |
| 21691 | VSQRTSSZmkz_Int = 21678, |
| 21692 | VSQRTSSZr = 21679, |
| 21693 | VSQRTSSZr_Int = 21680, |
| 21694 | VSQRTSSZrb_Int = 21681, |
| 21695 | VSQRTSSZrbk_Int = 21682, |
| 21696 | VSQRTSSZrbkz_Int = 21683, |
| 21697 | VSQRTSSZrk_Int = 21684, |
| 21698 | VSQRTSSZrkz_Int = 21685, |
| 21699 | VSQRTSSm = 21686, |
| 21700 | VSQRTSSm_Int = 21687, |
| 21701 | VSQRTSSr = 21688, |
| 21702 | VSQRTSSr_Int = 21689, |
| 21703 | VSTMXCSR = 21690, |
| 21704 | VSUBBF16Z128rm = 21691, |
| 21705 | VSUBBF16Z128rmb = 21692, |
| 21706 | VSUBBF16Z128rmbk = 21693, |
| 21707 | VSUBBF16Z128rmbkz = 21694, |
| 21708 | VSUBBF16Z128rmk = 21695, |
| 21709 | VSUBBF16Z128rmkz = 21696, |
| 21710 | VSUBBF16Z128rr = 21697, |
| 21711 | VSUBBF16Z128rrk = 21698, |
| 21712 | VSUBBF16Z128rrkz = 21699, |
| 21713 | VSUBBF16Z256rm = 21700, |
| 21714 | VSUBBF16Z256rmb = 21701, |
| 21715 | VSUBBF16Z256rmbk = 21702, |
| 21716 | VSUBBF16Z256rmbkz = 21703, |
| 21717 | VSUBBF16Z256rmk = 21704, |
| 21718 | VSUBBF16Z256rmkz = 21705, |
| 21719 | VSUBBF16Z256rr = 21706, |
| 21720 | VSUBBF16Z256rrk = 21707, |
| 21721 | VSUBBF16Z256rrkz = 21708, |
| 21722 | VSUBBF16Zrm = 21709, |
| 21723 | VSUBBF16Zrmb = 21710, |
| 21724 | VSUBBF16Zrmbk = 21711, |
| 21725 | VSUBBF16Zrmbkz = 21712, |
| 21726 | VSUBBF16Zrmk = 21713, |
| 21727 | VSUBBF16Zrmkz = 21714, |
| 21728 | VSUBBF16Zrr = 21715, |
| 21729 | VSUBBF16Zrrk = 21716, |
| 21730 | VSUBBF16Zrrkz = 21717, |
| 21731 | VSUBPDYrm = 21718, |
| 21732 | VSUBPDYrr = 21719, |
| 21733 | VSUBPDZ128rm = 21720, |
| 21734 | VSUBPDZ128rmb = 21721, |
| 21735 | VSUBPDZ128rmbk = 21722, |
| 21736 | VSUBPDZ128rmbkz = 21723, |
| 21737 | VSUBPDZ128rmk = 21724, |
| 21738 | VSUBPDZ128rmkz = 21725, |
| 21739 | VSUBPDZ128rr = 21726, |
| 21740 | VSUBPDZ128rrk = 21727, |
| 21741 | VSUBPDZ128rrkz = 21728, |
| 21742 | VSUBPDZ256rm = 21729, |
| 21743 | VSUBPDZ256rmb = 21730, |
| 21744 | VSUBPDZ256rmbk = 21731, |
| 21745 | VSUBPDZ256rmbkz = 21732, |
| 21746 | VSUBPDZ256rmk = 21733, |
| 21747 | VSUBPDZ256rmkz = 21734, |
| 21748 | VSUBPDZ256rr = 21735, |
| 21749 | VSUBPDZ256rrk = 21736, |
| 21750 | VSUBPDZ256rrkz = 21737, |
| 21751 | VSUBPDZrm = 21738, |
| 21752 | VSUBPDZrmb = 21739, |
| 21753 | VSUBPDZrmbk = 21740, |
| 21754 | VSUBPDZrmbkz = 21741, |
| 21755 | VSUBPDZrmk = 21742, |
| 21756 | VSUBPDZrmkz = 21743, |
| 21757 | VSUBPDZrr = 21744, |
| 21758 | VSUBPDZrrb = 21745, |
| 21759 | VSUBPDZrrbk = 21746, |
| 21760 | VSUBPDZrrbkz = 21747, |
| 21761 | VSUBPDZrrk = 21748, |
| 21762 | VSUBPDZrrkz = 21749, |
| 21763 | VSUBPDrm = 21750, |
| 21764 | VSUBPDrr = 21751, |
| 21765 | VSUBPHZ128rm = 21752, |
| 21766 | VSUBPHZ128rmb = 21753, |
| 21767 | VSUBPHZ128rmbk = 21754, |
| 21768 | VSUBPHZ128rmbkz = 21755, |
| 21769 | VSUBPHZ128rmk = 21756, |
| 21770 | VSUBPHZ128rmkz = 21757, |
| 21771 | VSUBPHZ128rr = 21758, |
| 21772 | VSUBPHZ128rrk = 21759, |
| 21773 | VSUBPHZ128rrkz = 21760, |
| 21774 | VSUBPHZ256rm = 21761, |
| 21775 | VSUBPHZ256rmb = 21762, |
| 21776 | VSUBPHZ256rmbk = 21763, |
| 21777 | VSUBPHZ256rmbkz = 21764, |
| 21778 | VSUBPHZ256rmk = 21765, |
| 21779 | VSUBPHZ256rmkz = 21766, |
| 21780 | VSUBPHZ256rr = 21767, |
| 21781 | VSUBPHZ256rrk = 21768, |
| 21782 | VSUBPHZ256rrkz = 21769, |
| 21783 | VSUBPHZrm = 21770, |
| 21784 | VSUBPHZrmb = 21771, |
| 21785 | VSUBPHZrmbk = 21772, |
| 21786 | VSUBPHZrmbkz = 21773, |
| 21787 | VSUBPHZrmk = 21774, |
| 21788 | VSUBPHZrmkz = 21775, |
| 21789 | VSUBPHZrr = 21776, |
| 21790 | VSUBPHZrrb = 21777, |
| 21791 | VSUBPHZrrbk = 21778, |
| 21792 | VSUBPHZrrbkz = 21779, |
| 21793 | VSUBPHZrrk = 21780, |
| 21794 | VSUBPHZrrkz = 21781, |
| 21795 | VSUBPSYrm = 21782, |
| 21796 | VSUBPSYrr = 21783, |
| 21797 | VSUBPSZ128rm = 21784, |
| 21798 | VSUBPSZ128rmb = 21785, |
| 21799 | VSUBPSZ128rmbk = 21786, |
| 21800 | VSUBPSZ128rmbkz = 21787, |
| 21801 | VSUBPSZ128rmk = 21788, |
| 21802 | VSUBPSZ128rmkz = 21789, |
| 21803 | VSUBPSZ128rr = 21790, |
| 21804 | VSUBPSZ128rrk = 21791, |
| 21805 | VSUBPSZ128rrkz = 21792, |
| 21806 | VSUBPSZ256rm = 21793, |
| 21807 | VSUBPSZ256rmb = 21794, |
| 21808 | VSUBPSZ256rmbk = 21795, |
| 21809 | VSUBPSZ256rmbkz = 21796, |
| 21810 | VSUBPSZ256rmk = 21797, |
| 21811 | VSUBPSZ256rmkz = 21798, |
| 21812 | VSUBPSZ256rr = 21799, |
| 21813 | VSUBPSZ256rrk = 21800, |
| 21814 | VSUBPSZ256rrkz = 21801, |
| 21815 | VSUBPSZrm = 21802, |
| 21816 | VSUBPSZrmb = 21803, |
| 21817 | VSUBPSZrmbk = 21804, |
| 21818 | VSUBPSZrmbkz = 21805, |
| 21819 | VSUBPSZrmk = 21806, |
| 21820 | VSUBPSZrmkz = 21807, |
| 21821 | VSUBPSZrr = 21808, |
| 21822 | VSUBPSZrrb = 21809, |
| 21823 | VSUBPSZrrbk = 21810, |
| 21824 | VSUBPSZrrbkz = 21811, |
| 21825 | VSUBPSZrrk = 21812, |
| 21826 | VSUBPSZrrkz = 21813, |
| 21827 | VSUBPSrm = 21814, |
| 21828 | VSUBPSrr = 21815, |
| 21829 | VSUBSDZrm = 21816, |
| 21830 | VSUBSDZrm_Int = 21817, |
| 21831 | VSUBSDZrmk_Int = 21818, |
| 21832 | VSUBSDZrmkz_Int = 21819, |
| 21833 | VSUBSDZrr = 21820, |
| 21834 | VSUBSDZrr_Int = 21821, |
| 21835 | VSUBSDZrrb_Int = 21822, |
| 21836 | VSUBSDZrrbk_Int = 21823, |
| 21837 | VSUBSDZrrbkz_Int = 21824, |
| 21838 | VSUBSDZrrk_Int = 21825, |
| 21839 | VSUBSDZrrkz_Int = 21826, |
| 21840 | VSUBSDrm = 21827, |
| 21841 | VSUBSDrm_Int = 21828, |
| 21842 | VSUBSDrr = 21829, |
| 21843 | VSUBSDrr_Int = 21830, |
| 21844 | VSUBSHZrm = 21831, |
| 21845 | VSUBSHZrm_Int = 21832, |
| 21846 | VSUBSHZrmk_Int = 21833, |
| 21847 | VSUBSHZrmkz_Int = 21834, |
| 21848 | VSUBSHZrr = 21835, |
| 21849 | VSUBSHZrr_Int = 21836, |
| 21850 | VSUBSHZrrb_Int = 21837, |
| 21851 | VSUBSHZrrbk_Int = 21838, |
| 21852 | VSUBSHZrrbkz_Int = 21839, |
| 21853 | VSUBSHZrrk_Int = 21840, |
| 21854 | VSUBSHZrrkz_Int = 21841, |
| 21855 | VSUBSSZrm = 21842, |
| 21856 | VSUBSSZrm_Int = 21843, |
| 21857 | VSUBSSZrmk_Int = 21844, |
| 21858 | VSUBSSZrmkz_Int = 21845, |
| 21859 | VSUBSSZrr = 21846, |
| 21860 | VSUBSSZrr_Int = 21847, |
| 21861 | VSUBSSZrrb_Int = 21848, |
| 21862 | VSUBSSZrrbk_Int = 21849, |
| 21863 | VSUBSSZrrbkz_Int = 21850, |
| 21864 | VSUBSSZrrk_Int = 21851, |
| 21865 | VSUBSSZrrkz_Int = 21852, |
| 21866 | VSUBSSrm = 21853, |
| 21867 | VSUBSSrm_Int = 21854, |
| 21868 | VSUBSSrr = 21855, |
| 21869 | VSUBSSrr_Int = 21856, |
| 21870 | VTESTPDYrm = 21857, |
| 21871 | VTESTPDYrr = 21858, |
| 21872 | VTESTPDrm = 21859, |
| 21873 | VTESTPDrr = 21860, |
| 21874 | VTESTPSYrm = 21861, |
| 21875 | VTESTPSYrr = 21862, |
| 21876 | VTESTPSrm = 21863, |
| 21877 | VTESTPSrr = 21864, |
| 21878 | VUCOMISDZrm = 21865, |
| 21879 | VUCOMISDZrm_Int = 21866, |
| 21880 | VUCOMISDZrr = 21867, |
| 21881 | VUCOMISDZrr_Int = 21868, |
| 21882 | VUCOMISDZrrb = 21869, |
| 21883 | VUCOMISDrm = 21870, |
| 21884 | VUCOMISDrm_Int = 21871, |
| 21885 | VUCOMISDrr = 21872, |
| 21886 | VUCOMISDrr_Int = 21873, |
| 21887 | VUCOMISHZrm = 21874, |
| 21888 | VUCOMISHZrm_Int = 21875, |
| 21889 | VUCOMISHZrr = 21876, |
| 21890 | VUCOMISHZrr_Int = 21877, |
| 21891 | VUCOMISHZrrb = 21878, |
| 21892 | VUCOMISSZrm = 21879, |
| 21893 | VUCOMISSZrm_Int = 21880, |
| 21894 | VUCOMISSZrr = 21881, |
| 21895 | VUCOMISSZrr_Int = 21882, |
| 21896 | VUCOMISSZrrb = 21883, |
| 21897 | VUCOMISSrm = 21884, |
| 21898 | VUCOMISSrm_Int = 21885, |
| 21899 | VUCOMISSrr = 21886, |
| 21900 | VUCOMISSrr_Int = 21887, |
| 21901 | VUCOMXSDZrm = 21888, |
| 21902 | VUCOMXSDZrm_Int = 21889, |
| 21903 | VUCOMXSDZrr = 21890, |
| 21904 | VUCOMXSDZrr_Int = 21891, |
| 21905 | VUCOMXSDZrrb_Int = 21892, |
| 21906 | VUCOMXSHZrm = 21893, |
| 21907 | VUCOMXSHZrm_Int = 21894, |
| 21908 | VUCOMXSHZrr = 21895, |
| 21909 | VUCOMXSHZrr_Int = 21896, |
| 21910 | VUCOMXSHZrrb_Int = 21897, |
| 21911 | VUCOMXSSZrm = 21898, |
| 21912 | VUCOMXSSZrm_Int = 21899, |
| 21913 | VUCOMXSSZrr = 21900, |
| 21914 | VUCOMXSSZrr_Int = 21901, |
| 21915 | VUCOMXSSZrrb_Int = 21902, |
| 21916 | VUNPCKHPDYrm = 21903, |
| 21917 | VUNPCKHPDYrr = 21904, |
| 21918 | VUNPCKHPDZ128rm = 21905, |
| 21919 | VUNPCKHPDZ128rmb = 21906, |
| 21920 | VUNPCKHPDZ128rmbk = 21907, |
| 21921 | VUNPCKHPDZ128rmbkz = 21908, |
| 21922 | VUNPCKHPDZ128rmk = 21909, |
| 21923 | VUNPCKHPDZ128rmkz = 21910, |
| 21924 | VUNPCKHPDZ128rr = 21911, |
| 21925 | VUNPCKHPDZ128rrk = 21912, |
| 21926 | VUNPCKHPDZ128rrkz = 21913, |
| 21927 | VUNPCKHPDZ256rm = 21914, |
| 21928 | VUNPCKHPDZ256rmb = 21915, |
| 21929 | VUNPCKHPDZ256rmbk = 21916, |
| 21930 | VUNPCKHPDZ256rmbkz = 21917, |
| 21931 | VUNPCKHPDZ256rmk = 21918, |
| 21932 | VUNPCKHPDZ256rmkz = 21919, |
| 21933 | VUNPCKHPDZ256rr = 21920, |
| 21934 | VUNPCKHPDZ256rrk = 21921, |
| 21935 | VUNPCKHPDZ256rrkz = 21922, |
| 21936 | VUNPCKHPDZrm = 21923, |
| 21937 | VUNPCKHPDZrmb = 21924, |
| 21938 | VUNPCKHPDZrmbk = 21925, |
| 21939 | VUNPCKHPDZrmbkz = 21926, |
| 21940 | VUNPCKHPDZrmk = 21927, |
| 21941 | VUNPCKHPDZrmkz = 21928, |
| 21942 | VUNPCKHPDZrr = 21929, |
| 21943 | VUNPCKHPDZrrk = 21930, |
| 21944 | VUNPCKHPDZrrkz = 21931, |
| 21945 | VUNPCKHPDrm = 21932, |
| 21946 | VUNPCKHPDrr = 21933, |
| 21947 | VUNPCKHPSYrm = 21934, |
| 21948 | VUNPCKHPSYrr = 21935, |
| 21949 | VUNPCKHPSZ128rm = 21936, |
| 21950 | VUNPCKHPSZ128rmb = 21937, |
| 21951 | VUNPCKHPSZ128rmbk = 21938, |
| 21952 | VUNPCKHPSZ128rmbkz = 21939, |
| 21953 | VUNPCKHPSZ128rmk = 21940, |
| 21954 | VUNPCKHPSZ128rmkz = 21941, |
| 21955 | VUNPCKHPSZ128rr = 21942, |
| 21956 | VUNPCKHPSZ128rrk = 21943, |
| 21957 | VUNPCKHPSZ128rrkz = 21944, |
| 21958 | VUNPCKHPSZ256rm = 21945, |
| 21959 | VUNPCKHPSZ256rmb = 21946, |
| 21960 | VUNPCKHPSZ256rmbk = 21947, |
| 21961 | VUNPCKHPSZ256rmbkz = 21948, |
| 21962 | VUNPCKHPSZ256rmk = 21949, |
| 21963 | VUNPCKHPSZ256rmkz = 21950, |
| 21964 | VUNPCKHPSZ256rr = 21951, |
| 21965 | VUNPCKHPSZ256rrk = 21952, |
| 21966 | VUNPCKHPSZ256rrkz = 21953, |
| 21967 | VUNPCKHPSZrm = 21954, |
| 21968 | VUNPCKHPSZrmb = 21955, |
| 21969 | VUNPCKHPSZrmbk = 21956, |
| 21970 | VUNPCKHPSZrmbkz = 21957, |
| 21971 | VUNPCKHPSZrmk = 21958, |
| 21972 | VUNPCKHPSZrmkz = 21959, |
| 21973 | VUNPCKHPSZrr = 21960, |
| 21974 | VUNPCKHPSZrrk = 21961, |
| 21975 | VUNPCKHPSZrrkz = 21962, |
| 21976 | VUNPCKHPSrm = 21963, |
| 21977 | VUNPCKHPSrr = 21964, |
| 21978 | VUNPCKLPDYrm = 21965, |
| 21979 | VUNPCKLPDYrr = 21966, |
| 21980 | VUNPCKLPDZ128rm = 21967, |
| 21981 | VUNPCKLPDZ128rmb = 21968, |
| 21982 | VUNPCKLPDZ128rmbk = 21969, |
| 21983 | VUNPCKLPDZ128rmbkz = 21970, |
| 21984 | VUNPCKLPDZ128rmk = 21971, |
| 21985 | VUNPCKLPDZ128rmkz = 21972, |
| 21986 | VUNPCKLPDZ128rr = 21973, |
| 21987 | VUNPCKLPDZ128rrk = 21974, |
| 21988 | VUNPCKLPDZ128rrkz = 21975, |
| 21989 | VUNPCKLPDZ256rm = 21976, |
| 21990 | VUNPCKLPDZ256rmb = 21977, |
| 21991 | VUNPCKLPDZ256rmbk = 21978, |
| 21992 | VUNPCKLPDZ256rmbkz = 21979, |
| 21993 | VUNPCKLPDZ256rmk = 21980, |
| 21994 | VUNPCKLPDZ256rmkz = 21981, |
| 21995 | VUNPCKLPDZ256rr = 21982, |
| 21996 | VUNPCKLPDZ256rrk = 21983, |
| 21997 | VUNPCKLPDZ256rrkz = 21984, |
| 21998 | VUNPCKLPDZrm = 21985, |
| 21999 | VUNPCKLPDZrmb = 21986, |
| 22000 | VUNPCKLPDZrmbk = 21987, |
| 22001 | VUNPCKLPDZrmbkz = 21988, |
| 22002 | VUNPCKLPDZrmk = 21989, |
| 22003 | VUNPCKLPDZrmkz = 21990, |
| 22004 | VUNPCKLPDZrr = 21991, |
| 22005 | VUNPCKLPDZrrk = 21992, |
| 22006 | VUNPCKLPDZrrkz = 21993, |
| 22007 | VUNPCKLPDrm = 21994, |
| 22008 | VUNPCKLPDrr = 21995, |
| 22009 | VUNPCKLPSYrm = 21996, |
| 22010 | VUNPCKLPSYrr = 21997, |
| 22011 | VUNPCKLPSZ128rm = 21998, |
| 22012 | VUNPCKLPSZ128rmb = 21999, |
| 22013 | VUNPCKLPSZ128rmbk = 22000, |
| 22014 | VUNPCKLPSZ128rmbkz = 22001, |
| 22015 | VUNPCKLPSZ128rmk = 22002, |
| 22016 | VUNPCKLPSZ128rmkz = 22003, |
| 22017 | VUNPCKLPSZ128rr = 22004, |
| 22018 | VUNPCKLPSZ128rrk = 22005, |
| 22019 | VUNPCKLPSZ128rrkz = 22006, |
| 22020 | VUNPCKLPSZ256rm = 22007, |
| 22021 | VUNPCKLPSZ256rmb = 22008, |
| 22022 | VUNPCKLPSZ256rmbk = 22009, |
| 22023 | VUNPCKLPSZ256rmbkz = 22010, |
| 22024 | VUNPCKLPSZ256rmk = 22011, |
| 22025 | VUNPCKLPSZ256rmkz = 22012, |
| 22026 | VUNPCKLPSZ256rr = 22013, |
| 22027 | VUNPCKLPSZ256rrk = 22014, |
| 22028 | VUNPCKLPSZ256rrkz = 22015, |
| 22029 | VUNPCKLPSZrm = 22016, |
| 22030 | VUNPCKLPSZrmb = 22017, |
| 22031 | VUNPCKLPSZrmbk = 22018, |
| 22032 | VUNPCKLPSZrmbkz = 22019, |
| 22033 | VUNPCKLPSZrmk = 22020, |
| 22034 | VUNPCKLPSZrmkz = 22021, |
| 22035 | VUNPCKLPSZrr = 22022, |
| 22036 | VUNPCKLPSZrrk = 22023, |
| 22037 | VUNPCKLPSZrrkz = 22024, |
| 22038 | VUNPCKLPSrm = 22025, |
| 22039 | VUNPCKLPSrr = 22026, |
| 22040 | VXORPDYrm = 22027, |
| 22041 | VXORPDYrr = 22028, |
| 22042 | VXORPDZ128rm = 22029, |
| 22043 | VXORPDZ128rmb = 22030, |
| 22044 | VXORPDZ128rmbk = 22031, |
| 22045 | VXORPDZ128rmbkz = 22032, |
| 22046 | VXORPDZ128rmk = 22033, |
| 22047 | VXORPDZ128rmkz = 22034, |
| 22048 | VXORPDZ128rr = 22035, |
| 22049 | VXORPDZ128rrk = 22036, |
| 22050 | VXORPDZ128rrkz = 22037, |
| 22051 | VXORPDZ256rm = 22038, |
| 22052 | VXORPDZ256rmb = 22039, |
| 22053 | VXORPDZ256rmbk = 22040, |
| 22054 | VXORPDZ256rmbkz = 22041, |
| 22055 | VXORPDZ256rmk = 22042, |
| 22056 | VXORPDZ256rmkz = 22043, |
| 22057 | VXORPDZ256rr = 22044, |
| 22058 | VXORPDZ256rrk = 22045, |
| 22059 | VXORPDZ256rrkz = 22046, |
| 22060 | VXORPDZrm = 22047, |
| 22061 | VXORPDZrmb = 22048, |
| 22062 | VXORPDZrmbk = 22049, |
| 22063 | VXORPDZrmbkz = 22050, |
| 22064 | VXORPDZrmk = 22051, |
| 22065 | VXORPDZrmkz = 22052, |
| 22066 | VXORPDZrr = 22053, |
| 22067 | VXORPDZrrk = 22054, |
| 22068 | VXORPDZrrkz = 22055, |
| 22069 | VXORPDrm = 22056, |
| 22070 | VXORPDrr = 22057, |
| 22071 | VXORPSYrm = 22058, |
| 22072 | VXORPSYrr = 22059, |
| 22073 | VXORPSZ128rm = 22060, |
| 22074 | VXORPSZ128rmb = 22061, |
| 22075 | VXORPSZ128rmbk = 22062, |
| 22076 | VXORPSZ128rmbkz = 22063, |
| 22077 | VXORPSZ128rmk = 22064, |
| 22078 | VXORPSZ128rmkz = 22065, |
| 22079 | VXORPSZ128rr = 22066, |
| 22080 | VXORPSZ128rrk = 22067, |
| 22081 | VXORPSZ128rrkz = 22068, |
| 22082 | VXORPSZ256rm = 22069, |
| 22083 | VXORPSZ256rmb = 22070, |
| 22084 | VXORPSZ256rmbk = 22071, |
| 22085 | VXORPSZ256rmbkz = 22072, |
| 22086 | VXORPSZ256rmk = 22073, |
| 22087 | VXORPSZ256rmkz = 22074, |
| 22088 | VXORPSZ256rr = 22075, |
| 22089 | VXORPSZ256rrk = 22076, |
| 22090 | VXORPSZ256rrkz = 22077, |
| 22091 | VXORPSZrm = 22078, |
| 22092 | VXORPSZrmb = 22079, |
| 22093 | VXORPSZrmbk = 22080, |
| 22094 | VXORPSZrmbkz = 22081, |
| 22095 | VXORPSZrmk = 22082, |
| 22096 | VXORPSZrmkz = 22083, |
| 22097 | VXORPSZrr = 22084, |
| 22098 | VXORPSZrrk = 22085, |
| 22099 | VXORPSZrrkz = 22086, |
| 22100 | VXORPSrm = 22087, |
| 22101 | VXORPSrr = 22088, |
| 22102 | VZEROALL = 22089, |
| 22103 | VZEROUPPER = 22090, |
| 22104 | WAIT = 22091, |
| 22105 | WBINVD = 22092, |
| 22106 | WBNOINVD = 22093, |
| 22107 | WRFSBASE = 22094, |
| 22108 | WRFSBASE64 = 22095, |
| 22109 | WRGSBASE = 22096, |
| 22110 | WRGSBASE64 = 22097, |
| 22111 | WRMSR = 22098, |
| 22112 | WRMSRLIST = 22099, |
| 22113 | WRMSRNS = 22100, |
| 22114 | WRMSRNSir = 22101, |
| 22115 | WRMSRNSir_EVEX = 22102, |
| 22116 | WRPKRUr = 22103, |
| 22117 | WRSSD = 22104, |
| 22118 | WRSSD_EVEX = 22105, |
| 22119 | WRSSQ = 22106, |
| 22120 | WRSSQ_EVEX = 22107, |
| 22121 | WRUSSD = 22108, |
| 22122 | WRUSSD_EVEX = 22109, |
| 22123 | WRUSSQ = 22110, |
| 22124 | WRUSSQ_EVEX = 22111, |
| 22125 | XABORT = 22112, |
| 22126 | XACQUIRE_PREFIX = 22113, |
| 22127 | XADD16rm = 22114, |
| 22128 | XADD16rr = 22115, |
| 22129 | XADD32rm = 22116, |
| 22130 | XADD32rr = 22117, |
| 22131 | XADD64rm = 22118, |
| 22132 | XADD64rr = 22119, |
| 22133 | XADD8rm = 22120, |
| 22134 | XADD8rr = 22121, |
| 22135 | XAM_F = 22122, |
| 22136 | XAM_Fp32 = 22123, |
| 22137 | XAM_Fp64 = 22124, |
| 22138 | XAM_Fp80 = 22125, |
| 22139 | XBEGIN = 22126, |
| 22140 | XBEGIN_2 = 22127, |
| 22141 | XBEGIN_4 = 22128, |
| 22142 | XCHG16ar = 22129, |
| 22143 | XCHG16rm = 22130, |
| 22144 | XCHG16rr = 22131, |
| 22145 | XCHG32ar = 22132, |
| 22146 | XCHG32rm = 22133, |
| 22147 | XCHG32rr = 22134, |
| 22148 | XCHG64ar = 22135, |
| 22149 | XCHG64rm = 22136, |
| 22150 | XCHG64rr = 22137, |
| 22151 | XCHG8rm = 22138, |
| 22152 | XCHG8rr = 22139, |
| 22153 | XCH_F = 22140, |
| 22154 | XCRYPTCBC = 22141, |
| 22155 | XCRYPTCFB = 22142, |
| 22156 | XCRYPTCTR = 22143, |
| 22157 | XCRYPTECB = 22144, |
| 22158 | XCRYPTOFB = 22145, |
| 22159 | XEND = 22146, |
| 22160 | XGETBV = 22147, |
| 22161 | XLAT = 22148, |
| 22162 | XOR16i16 = 22149, |
| 22163 | XOR16mi = 22150, |
| 22164 | XOR16mi8 = 22151, |
| 22165 | XOR16mi8_EVEX = 22152, |
| 22166 | XOR16mi8_ND = 22153, |
| 22167 | XOR16mi8_NF = 22154, |
| 22168 | XOR16mi8_NF_ND = 22155, |
| 22169 | XOR16mi_EVEX = 22156, |
| 22170 | XOR16mi_ND = 22157, |
| 22171 | XOR16mi_NF = 22158, |
| 22172 | XOR16mi_NF_ND = 22159, |
| 22173 | XOR16mr = 22160, |
| 22174 | XOR16mr_EVEX = 22161, |
| 22175 | XOR16mr_ND = 22162, |
| 22176 | XOR16mr_NF = 22163, |
| 22177 | XOR16mr_NF_ND = 22164, |
| 22178 | XOR16ri = 22165, |
| 22179 | XOR16ri8 = 22166, |
| 22180 | XOR16ri8_EVEX = 22167, |
| 22181 | XOR16ri8_ND = 22168, |
| 22182 | XOR16ri8_NF = 22169, |
| 22183 | XOR16ri8_NF_ND = 22170, |
| 22184 | XOR16ri_EVEX = 22171, |
| 22185 | XOR16ri_ND = 22172, |
| 22186 | XOR16ri_NF = 22173, |
| 22187 | XOR16ri_NF_ND = 22174, |
| 22188 | XOR16rm = 22175, |
| 22189 | XOR16rm_EVEX = 22176, |
| 22190 | XOR16rm_ND = 22177, |
| 22191 | XOR16rm_NF = 22178, |
| 22192 | XOR16rm_NF_ND = 22179, |
| 22193 | XOR16rr = 22180, |
| 22194 | XOR16rr_EVEX = 22181, |
| 22195 | XOR16rr_EVEX_REV = 22182, |
| 22196 | XOR16rr_ND = 22183, |
| 22197 | XOR16rr_ND_REV = 22184, |
| 22198 | XOR16rr_NF = 22185, |
| 22199 | XOR16rr_NF_ND = 22186, |
| 22200 | XOR16rr_NF_ND_REV = 22187, |
| 22201 | XOR16rr_NF_REV = 22188, |
| 22202 | XOR16rr_REV = 22189, |
| 22203 | XOR32i32 = 22190, |
| 22204 | XOR32mi = 22191, |
| 22205 | XOR32mi8 = 22192, |
| 22206 | XOR32mi8_EVEX = 22193, |
| 22207 | XOR32mi8_ND = 22194, |
| 22208 | XOR32mi8_NF = 22195, |
| 22209 | XOR32mi8_NF_ND = 22196, |
| 22210 | XOR32mi_EVEX = 22197, |
| 22211 | XOR32mi_ND = 22198, |
| 22212 | XOR32mi_NF = 22199, |
| 22213 | XOR32mi_NF_ND = 22200, |
| 22214 | XOR32mr = 22201, |
| 22215 | XOR32mr_EVEX = 22202, |
| 22216 | XOR32mr_ND = 22203, |
| 22217 | XOR32mr_NF = 22204, |
| 22218 | XOR32mr_NF_ND = 22205, |
| 22219 | XOR32ri = 22206, |
| 22220 | XOR32ri8 = 22207, |
| 22221 | XOR32ri8_EVEX = 22208, |
| 22222 | XOR32ri8_ND = 22209, |
| 22223 | XOR32ri8_NF = 22210, |
| 22224 | XOR32ri8_NF_ND = 22211, |
| 22225 | XOR32ri_EVEX = 22212, |
| 22226 | XOR32ri_ND = 22213, |
| 22227 | XOR32ri_NF = 22214, |
| 22228 | XOR32ri_NF_ND = 22215, |
| 22229 | XOR32rm = 22216, |
| 22230 | XOR32rm_EVEX = 22217, |
| 22231 | XOR32rm_ND = 22218, |
| 22232 | XOR32rm_NF = 22219, |
| 22233 | XOR32rm_NF_ND = 22220, |
| 22234 | XOR32rr = 22221, |
| 22235 | XOR32rr_EVEX = 22222, |
| 22236 | XOR32rr_EVEX_REV = 22223, |
| 22237 | XOR32rr_ND = 22224, |
| 22238 | XOR32rr_ND_REV = 22225, |
| 22239 | XOR32rr_NF = 22226, |
| 22240 | XOR32rr_NF_ND = 22227, |
| 22241 | XOR32rr_NF_ND_REV = 22228, |
| 22242 | XOR32rr_NF_REV = 22229, |
| 22243 | XOR32rr_REV = 22230, |
| 22244 | XOR64i32 = 22231, |
| 22245 | XOR64mi32 = 22232, |
| 22246 | XOR64mi32_EVEX = 22233, |
| 22247 | XOR64mi32_ND = 22234, |
| 22248 | XOR64mi32_NF = 22235, |
| 22249 | XOR64mi32_NF_ND = 22236, |
| 22250 | XOR64mi8 = 22237, |
| 22251 | XOR64mi8_EVEX = 22238, |
| 22252 | XOR64mi8_ND = 22239, |
| 22253 | XOR64mi8_NF = 22240, |
| 22254 | XOR64mi8_NF_ND = 22241, |
| 22255 | XOR64mr = 22242, |
| 22256 | XOR64mr_EVEX = 22243, |
| 22257 | XOR64mr_ND = 22244, |
| 22258 | XOR64mr_NF = 22245, |
| 22259 | XOR64mr_NF_ND = 22246, |
| 22260 | XOR64ri32 = 22247, |
| 22261 | XOR64ri32_EVEX = 22248, |
| 22262 | XOR64ri32_ND = 22249, |
| 22263 | XOR64ri32_NF = 22250, |
| 22264 | XOR64ri32_NF_ND = 22251, |
| 22265 | XOR64ri8 = 22252, |
| 22266 | XOR64ri8_EVEX = 22253, |
| 22267 | XOR64ri8_ND = 22254, |
| 22268 | XOR64ri8_NF = 22255, |
| 22269 | XOR64ri8_NF_ND = 22256, |
| 22270 | XOR64rm = 22257, |
| 22271 | XOR64rm_EVEX = 22258, |
| 22272 | XOR64rm_ND = 22259, |
| 22273 | XOR64rm_NF = 22260, |
| 22274 | XOR64rm_NF_ND = 22261, |
| 22275 | XOR64rr = 22262, |
| 22276 | XOR64rr_EVEX = 22263, |
| 22277 | XOR64rr_EVEX_REV = 22264, |
| 22278 | XOR64rr_ND = 22265, |
| 22279 | XOR64rr_ND_REV = 22266, |
| 22280 | XOR64rr_NF = 22267, |
| 22281 | XOR64rr_NF_ND = 22268, |
| 22282 | XOR64rr_NF_ND_REV = 22269, |
| 22283 | XOR64rr_NF_REV = 22270, |
| 22284 | XOR64rr_REV = 22271, |
| 22285 | XOR8i8 = 22272, |
| 22286 | XOR8mi = 22273, |
| 22287 | XOR8mi8 = 22274, |
| 22288 | XOR8mi_EVEX = 22275, |
| 22289 | XOR8mi_ND = 22276, |
| 22290 | XOR8mi_NF = 22277, |
| 22291 | XOR8mi_NF_ND = 22278, |
| 22292 | XOR8mr = 22279, |
| 22293 | XOR8mr_EVEX = 22280, |
| 22294 | XOR8mr_ND = 22281, |
| 22295 | XOR8mr_NF = 22282, |
| 22296 | XOR8mr_NF_ND = 22283, |
| 22297 | XOR8ri = 22284, |
| 22298 | XOR8ri8 = 22285, |
| 22299 | XOR8ri_EVEX = 22286, |
| 22300 | XOR8ri_ND = 22287, |
| 22301 | XOR8ri_NF = 22288, |
| 22302 | XOR8ri_NF_ND = 22289, |
| 22303 | XOR8rm = 22290, |
| 22304 | XOR8rm_EVEX = 22291, |
| 22305 | XOR8rm_ND = 22292, |
| 22306 | XOR8rm_NF = 22293, |
| 22307 | XOR8rm_NF_ND = 22294, |
| 22308 | XOR8rr = 22295, |
| 22309 | XOR8rr_EVEX = 22296, |
| 22310 | XOR8rr_EVEX_REV = 22297, |
| 22311 | XOR8rr_ND = 22298, |
| 22312 | XOR8rr_ND_REV = 22299, |
| 22313 | XOR8rr_NF = 22300, |
| 22314 | XOR8rr_NF_ND = 22301, |
| 22315 | XOR8rr_NF_ND_REV = 22302, |
| 22316 | XOR8rr_NF_REV = 22303, |
| 22317 | XOR8rr_NOREX = 22304, |
| 22318 | XOR8rr_REV = 22305, |
| 22319 | XORPDrm = 22306, |
| 22320 | XORPDrr = 22307, |
| 22321 | XORPSrm = 22308, |
| 22322 | XORPSrr = 22309, |
| 22323 | XRELEASE_PREFIX = 22310, |
| 22324 | XRESLDTRK = 22311, |
| 22325 | XRSTOR = 22312, |
| 22326 | XRSTOR64 = 22313, |
| 22327 | XRSTORS = 22314, |
| 22328 | XRSTORS64 = 22315, |
| 22329 | XSAVE = 22316, |
| 22330 | XSAVE64 = 22317, |
| 22331 | XSAVEC = 22318, |
| 22332 | XSAVEC64 = 22319, |
| 22333 | XSAVEOPT = 22320, |
| 22334 | XSAVEOPT64 = 22321, |
| 22335 | XSAVES = 22322, |
| 22336 | XSAVES64 = 22323, |
| 22337 | XSETBV = 22324, |
| 22338 | XSHA1 = 22325, |
| 22339 | XSHA256 = 22326, |
| 22340 | XSTORE = 22327, |
| 22341 | XSUSLDTRK = 22328, |
| 22342 | XTEST = 22329, |
| 22343 | INSTRUCTION_LIST_END = 22330 |
| 22344 | }; |
| 22345 | |
| 22346 | } // end namespace llvm::X86 |
| 22347 | #endif // GET_INSTRINFO_ENUM |
| 22348 | |
| 22349 | #ifdef GET_INSTRINFO_SCHED_ENUM |
| 22350 | #undef GET_INSTRINFO_SCHED_ENUM |
| 22351 | namespace llvm::X86::Sched { |
| 22352 | |
| 22353 | enum { |
| 22354 | NoInstrModel = 0, |
| 22355 | WriteALU = 1, |
| 22356 | WriteZero = 2, |
| 22357 | WriteVecALU = 3, |
| 22358 | WriteJump = 4, |
| 22359 | WriteCMPXCHGRMW = 5, |
| 22360 | WriteJumpLd = 6, |
| 22361 | WriteMove = 7, |
| 22362 | WriteSystem = 8, |
| 22363 | WriteLEA = 9, |
| 22364 | WriteRMW = 10, |
| 22365 | WriteADC = 11, |
| 22366 | WriteSHDrri = 12, |
| 22367 | WriteFStoreX = 13, |
| 22368 | WriteFLoadX = 14, |
| 22369 | WriteFStoreY = 15, |
| 22370 | WriteFLoadY = 16, |
| 22371 | WriteMicrocoded = 17, |
| 22372 | WriteALURMW_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault = 18, |
| 22373 | WriteFSign = 19, |
| 22374 | WriteADCRMW = 20, |
| 22375 | WriteADCLd_ReadAfterLd = 21, |
| 22376 | WriteADCRMW_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 22, |
| 22377 | WriteADCLd_ReadAfterLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 23, |
| 22378 | WriteALURMW = 24, |
| 22379 | WriteALULd_ReadAfterLd = 25, |
| 22380 | WriteALURMW_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 26, |
| 22381 | WriteFAdd64XLd_ReadAfterVecXLd = 27, |
| 22382 | WriteFAdd64X = 28, |
| 22383 | WriteFAddXLd_ReadAfterVecXLd = 29, |
| 22384 | WriteFAddX = 30, |
| 22385 | WriteNop = 31, |
| 22386 | WriteFAdd64Ld_ReadAfterVecLd = 32, |
| 22387 | WriteFAdd64 = 33, |
| 22388 | WriteFAddLd_ReadAfterVecLd = 34, |
| 22389 | WriteFAdd = 35, |
| 22390 | WriteFAddLd = 36, |
| 22391 | WriteAESDecEncLd_ReadAfterVecXLd = 37, |
| 22392 | WriteAESDecEnc = 38, |
| 22393 | WriteAESIMCLd = 39, |
| 22394 | WriteAESIMC = 40, |
| 22395 | WriteAESKeyGenLd = 41, |
| 22396 | WriteAESKeyGen = 42, |
| 22397 | WriteFLogicLd_ReadAfterVecXLd = 43, |
| 22398 | WriteFLogic = 44, |
| 22399 | WriteBEXTRLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 45, |
| 22400 | WriteBEXTR = 46, |
| 22401 | WriteBEXTRLd = 47, |
| 22402 | WriteALULd = 48, |
| 22403 | WriteFBlendLd_ReadAfterVecXLd = 49, |
| 22404 | WriteFBlend = 50, |
| 22405 | WriteFVarBlendLd_ReadAfterVecXLd = 51, |
| 22406 | WriteFVarBlend = 52, |
| 22407 | WriteBLSLd = 53, |
| 22408 | WriteBLS = 54, |
| 22409 | WriteBSFLd = 55, |
| 22410 | WriteBSF = 56, |
| 22411 | WriteBSRLd = 57, |
| 22412 | WriteBSR = 58, |
| 22413 | WriteBSWAP32 = 59, |
| 22414 | WriteBSWAP64 = 60, |
| 22415 | WriteBitTestImmLd = 61, |
| 22416 | WriteBitTestRegLd = 62, |
| 22417 | WriteBitTest = 63, |
| 22418 | WriteBitTestSetImmRMW = 64, |
| 22419 | WriteBitTestSetRegRMW = 65, |
| 22420 | WriteBitTestSet = 66, |
| 22421 | WriteBZHILd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 67, |
| 22422 | WriteBZHI = 68, |
| 22423 | WriteCMOV_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault = 69, |
| 22424 | WriteCMOVLd_ReadAfterLd = 70, |
| 22425 | WriteCMOV = 71, |
| 22426 | WriteLoad = 72, |
| 22427 | WriteFCMOV = 73, |
| 22428 | WriteALULd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 74, |
| 22429 | WriteXCHG = 75, |
| 22430 | WriteFCmp64XLd_ReadAfterVecXLd = 76, |
| 22431 | WriteFCmp64X = 77, |
| 22432 | WriteFCmpXLd_ReadAfterVecXLd = 78, |
| 22433 | WriteFCmpX = 79, |
| 22434 | WriteFCmp64Ld_ReadAfterVecLd = 80, |
| 22435 | WriteFCmp64 = 81, |
| 22436 | WriteFCmpLd_ReadAfterVecLd = 82, |
| 22437 | WriteFCmp = 83, |
| 22438 | WriteCMPXCHG = 84, |
| 22439 | WriteFComXLd_ReadAfterVecLd = 85, |
| 22440 | WriteFComX = 86, |
| 22441 | WriteFCom = 87, |
| 22442 | WriteCRC32Ld_ReadAfterLd = 88, |
| 22443 | WriteCRC32 = 89, |
| 22444 | WriteCvtI2PDLd = 90, |
| 22445 | WriteCvtI2PD = 91, |
| 22446 | WriteCvtI2PSLd = 92, |
| 22447 | WriteCvtI2PS = 93, |
| 22448 | WriteCvtPD2ILd = 94, |
| 22449 | WriteCvtPD2I = 95, |
| 22450 | WriteCvtPD2PSLd = 96, |
| 22451 | WriteCvtPD2PS = 97, |
| 22452 | WriteCvtPS2ILd = 98, |
| 22453 | WriteCvtPS2I = 99, |
| 22454 | WriteCvtPS2PDLd = 100, |
| 22455 | WriteCvtPS2PD = 101, |
| 22456 | WriteCvtSD2ILd = 102, |
| 22457 | WriteCvtSD2I_ReadDefault = 103, |
| 22458 | WriteCvtSD2I = 104, |
| 22459 | WriteCvtSD2SSLd_ReadAfterVecLd = 105, |
| 22460 | WriteCvtSD2SS = 106, |
| 22461 | WriteCvtI2SDLd = 107, |
| 22462 | WriteCvtI2SDLd_ReadAfterVecLd = 108, |
| 22463 | WriteCvtI2SD_ReadInt2Fpu = 109, |
| 22464 | WriteCvtI2SD_ReadDefault_ReadInt2Fpu = 110, |
| 22465 | WriteCvtI2SSLd = 111, |
| 22466 | WriteCvtI2SSLd_ReadAfterVecLd = 112, |
| 22467 | WriteCvtI2SS_ReadInt2Fpu = 113, |
| 22468 | WriteCvtI2SS_ReadDefault_ReadInt2Fpu = 114, |
| 22469 | WriteCvtSS2SDLd_ReadAfterVecLd = 115, |
| 22470 | WriteCvtSS2SD = 116, |
| 22471 | WriteCvtSS2ILd = 117, |
| 22472 | WriteCvtSS2I_ReadDefault = 118, |
| 22473 | WriteCvtSS2I = 119, |
| 22474 | WriteDiv16Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 120, |
| 22475 | WriteDiv16 = 121, |
| 22476 | WriteDiv32Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 122, |
| 22477 | WriteDiv32 = 123, |
| 22478 | WriteDiv64Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 124, |
| 22479 | WriteDiv64 = 125, |
| 22480 | WriteDiv8Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 126, |
| 22481 | WriteDiv8 = 127, |
| 22482 | WriteFDiv64XLd_ReadAfterVecXLd = 128, |
| 22483 | WriteFDiv64X = 129, |
| 22484 | WriteFDivXLd_ReadAfterVecXLd = 130, |
| 22485 | WriteFDivX = 131, |
| 22486 | WriteFDivLd = 132, |
| 22487 | WriteFDiv = 133, |
| 22488 | WriteFDiv64Ld_ReadAfterVecLd = 134, |
| 22489 | WriteFDiv64 = 135, |
| 22490 | WriteFDivLd_ReadAfterVecLd = 136, |
| 22491 | WriteDPPDLd_ReadAfterVecXLd = 137, |
| 22492 | WriteDPPD = 138, |
| 22493 | WriteDPPSLd_ReadAfterVecXLd = 139, |
| 22494 | WriteDPPS = 140, |
| 22495 | WriteStore = 141, |
| 22496 | WriteVecExtractSt = 142, |
| 22497 | WriteVecExtract = 143, |
| 22498 | WriteVecALUX = 144, |
| 22499 | WriteFComLd = 145, |
| 22500 | WriteEMMS = 146, |
| 22501 | WriteFLDC = 147, |
| 22502 | WriteVecIMulXLd_ReadAfterVecXLd = 148, |
| 22503 | WriteVecIMulX = 149, |
| 22504 | WriteVecALUXLd_ReadAfterVecXLd = 150, |
| 22505 | WriteFHAddLd_ReadAfterVecXLd = 151, |
| 22506 | WriteFHAdd = 152, |
| 22507 | WriteIDiv16Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 153, |
| 22508 | WriteIDiv16 = 154, |
| 22509 | WriteIDiv32Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 155, |
| 22510 | WriteIDiv32 = 156, |
| 22511 | WriteIDiv64Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 157, |
| 22512 | WriteIDiv64 = 158, |
| 22513 | WriteIDiv8Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 159, |
| 22514 | WriteIDiv8 = 160, |
| 22515 | WriteIMul16Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 161, |
| 22516 | WriteIMul16 = 162, |
| 22517 | WriteIMul16RegLd_ReadAfterLd = 163, |
| 22518 | WriteIMul16ImmLd = 164, |
| 22519 | WriteIMul16Reg = 165, |
| 22520 | WriteIMul16Imm = 166, |
| 22521 | WriteIMul32Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 167, |
| 22522 | WriteIMul32 = 168, |
| 22523 | WriteIMul32RegLd_ReadAfterLd = 169, |
| 22524 | WriteIMul32ImmLd = 170, |
| 22525 | WriteIMul32Reg = 171, |
| 22526 | WriteIMul32Imm = 172, |
| 22527 | WriteIMul64Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 173, |
| 22528 | WriteIMul64 = 174, |
| 22529 | WriteIMul64RegLd_ReadAfterLd = 175, |
| 22530 | WriteIMul64ImmLd = 176, |
| 22531 | WriteIMul64Reg = 177, |
| 22532 | WriteIMul64Imm = 178, |
| 22533 | WriteIMul8Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 179, |
| 22534 | WriteIMul8 = 180, |
| 22535 | WriteFShuffleLd_ReadAfterVecXLd = 181, |
| 22536 | WriteFShuffle = 182, |
| 22537 | WriteVecLogicX = 183, |
| 22538 | WriteShuffle = 184, |
| 22539 | WriteLAHFSAHF = 185, |
| 22540 | WriteVecLoadX = 186, |
| 22541 | WriteLDMXCSR = 187, |
| 22542 | WriteFLD0 = 188, |
| 22543 | WriteFLD1 = 189, |
| 22544 | WriteFence = 190, |
| 22545 | WriteLZCNTLd = 191, |
| 22546 | WriteLZCNT = 192, |
| 22547 | WriteVecStoreX = 193, |
| 22548 | WriteVecStore = 194, |
| 22549 | WriteVecMoveToGpr = 195, |
| 22550 | WriteVecLoad = 196, |
| 22551 | WriteVecMoveFromGpr = 197, |
| 22552 | WriteVecMoveX = 198, |
| 22553 | WriteVecStoreNT = 199, |
| 22554 | WriteVecMove = 200, |
| 22555 | WriteVecALULd = 201, |
| 22556 | WriteShuffleLd_ReadAfterVecLd = 202, |
| 22557 | WriteVecALULd_ReadAfterVecLd = 203, |
| 22558 | WriteVecLogicLd_ReadAfterVecLd = 204, |
| 22559 | WriteVecLogic = 205, |
| 22560 | WritePHAddLd_ReadAfterVecLd = 206, |
| 22561 | WritePHAdd = 207, |
| 22562 | WriteVecInsertLd_ReadAfterLd = 208, |
| 22563 | WriteVecInsert_ReadDefault_ReadInt2Fpu = 209, |
| 22564 | WriteVecIMulLd_ReadAfterVecLd = 210, |
| 22565 | WriteVecIMul = 211, |
| 22566 | WriteMMXMOVMSK = 212, |
| 22567 | WritePSADBWLd_ReadAfterVecLd = 213, |
| 22568 | WritePSADBW = 214, |
| 22569 | WriteVarShuffleLd_ReadAfterVecLd = 215, |
| 22570 | WriteVarShuffle = 216, |
| 22571 | WriteShuffleLd = 217, |
| 22572 | WriteVecShiftImm = 218, |
| 22573 | WriteVecShiftLd_ReadAfterVecLd = 219, |
| 22574 | WriteVecShift = 220, |
| 22575 | WriteFMoveX = 221, |
| 22576 | WriteFShuffleLd = 222, |
| 22577 | WriteFStore = 223, |
| 22578 | WriteFMOVMSK = 224, |
| 22579 | WriteVecLoadNT = 225, |
| 22580 | WriteStoreNT = 226, |
| 22581 | WriteFStoreNTX = 227, |
| 22582 | WriteFStoreNT = 228, |
| 22583 | WriteFLoad = 229, |
| 22584 | WriteMPSADLd_ReadAfterVecXLd = 230, |
| 22585 | WriteMPSAD = 231, |
| 22586 | WriteFMul64XLd_ReadAfterVecXLd = 232, |
| 22587 | WriteFMul64X = 233, |
| 22588 | WriteFMulXLd_ReadAfterVecXLd = 234, |
| 22589 | WriteFMulX = 235, |
| 22590 | WriteFMul64Ld_ReadAfterVecLd = 236, |
| 22591 | WriteFMul64 = 237, |
| 22592 | WriteFMulLd_ReadAfterVecLd = 238, |
| 22593 | WriteFMul = 239, |
| 22594 | WriteMULX32Ld = 240, |
| 22595 | WriteMULX32 = 241, |
| 22596 | WriteIMulHLd_WriteMULX32Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 242, |
| 22597 | WriteIMulH_WriteMULX32 = 243, |
| 22598 | WriteMULX64Ld = 244, |
| 22599 | WriteMULX64 = 245, |
| 22600 | WriteIMulHLd_WriteMULX64Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 246, |
| 22601 | WriteIMulH_WriteMULX64 = 247, |
| 22602 | WriteFMulLd = 248, |
| 22603 | WriteVecALUXLd = 249, |
| 22604 | WriteShuffleXLd_ReadAfterVecXLd = 250, |
| 22605 | WriteShuffleX = 251, |
| 22606 | WriteVecLogicXLd_ReadAfterVecXLd = 252, |
| 22607 | WriteVarBlendLd_ReadAfterVecXLd = 253, |
| 22608 | WriteVarBlend = 254, |
| 22609 | WriteBlendLd_ReadAfterVecXLd = 255, |
| 22610 | WriteBlend = 256, |
| 22611 | WriteCLMulLd_ReadAfterVecXLd = 257, |
| 22612 | WriteCLMul = 258, |
| 22613 | WritePCmpEStrILd_ReadAfterVecXLd = 259, |
| 22614 | WritePCmpEStrI = 260, |
| 22615 | WritePCmpEStrMLd_ReadAfterVecXLd = 261, |
| 22616 | WritePCmpEStrM = 262, |
| 22617 | WritePCmpIStrILd_ReadAfterVecXLd = 263, |
| 22618 | WritePCmpIStrI = 264, |
| 22619 | WritePCmpIStrMLd_ReadAfterVecXLd = 265, |
| 22620 | WritePCmpIStrM = 266, |
| 22621 | WriteCvtPS2ILd_ReadAfterVecXLd = 267, |
| 22622 | WritePHAddXLd_ReadAfterVecXLd = 268, |
| 22623 | WritePHAddX = 269, |
| 22624 | WritePHMINPOSLd = 270, |
| 22625 | WritePHMINPOS = 271, |
| 22626 | WriteCvtI2PSLd_ReadAfterVecXLd = 272, |
| 22627 | WriteVecMOVMSK = 273, |
| 22628 | WriteShuffleXLd = 274, |
| 22629 | WritePMULLDLd_ReadAfterVecXLd = 275, |
| 22630 | WritePMULLD = 276, |
| 22631 | WriteCopy = 277, |
| 22632 | WritePOPCNTLd = 278, |
| 22633 | WritePOPCNT = 279, |
| 22634 | WritePSADBWXLd_ReadAfterVecXLd = 280, |
| 22635 | WritePSADBWX = 281, |
| 22636 | WriteVarShuffleXLd_ReadAfterVecXLd = 282, |
| 22637 | WriteVarShuffleX = 283, |
| 22638 | WriteVecShiftImmX = 284, |
| 22639 | WriteVecShiftXLd_ReadAfterVecXLd = 285, |
| 22640 | WriteVecShiftX = 286, |
| 22641 | WriteVecTestLd_ReadAfterVecXLd = 287, |
| 22642 | WriteVecTest = 288, |
| 22643 | WriteRotateLd_WriteRMW = 289, |
| 22644 | WriteRotateLd_WriteRotate = 290, |
| 22645 | WriteRotateCLLd_WriteRMW = 291, |
| 22646 | WriteRotateCLLd_WriteRotateCL = 292, |
| 22647 | WriteRotate = 293, |
| 22648 | WriteRotateCL = 294, |
| 22649 | WriteFRcpXLd = 295, |
| 22650 | WriteFRcpX = 296, |
| 22651 | WriteFRcpLd = 297, |
| 22652 | WriteFRcpLd_ReadAfterVecLd = 298, |
| 22653 | WriteFRcp = 299, |
| 22654 | WriteShiftLd = 300, |
| 22655 | WriteShift = 301, |
| 22656 | WriteFRndLd = 302, |
| 22657 | WriteFRnd = 303, |
| 22658 | WriteFRndLd_ReadAfterVecXLd = 304, |
| 22659 | WriteFRsqrtXLd = 305, |
| 22660 | WriteFRsqrtX = 306, |
| 22661 | WriteFRsqrtLd = 307, |
| 22662 | WriteFRsqrtLd_ReadAfterVecLd = 308, |
| 22663 | WriteFRsqrt = 309, |
| 22664 | WriteShiftLd_WriteRMW = 310, |
| 22665 | WriteShiftLd_WriteShift = 311, |
| 22666 | WriteShiftCLLd_WriteRMW = 312, |
| 22667 | WriteShiftCLLd_WriteShiftCL = 313, |
| 22668 | WriteShiftCL = 314, |
| 22669 | WriteShiftLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 315, |
| 22670 | WriteSETCCStore = 316, |
| 22671 | WriteSETCC = 317, |
| 22672 | WriteSHDmrcl = 318, |
| 22673 | WriteSHDmri = 319, |
| 22674 | WriteSHDrrcl = 320, |
| 22675 | WriteFSqrt64XLd = 321, |
| 22676 | WriteFSqrt64X = 322, |
| 22677 | WriteFSqrtXLd = 323, |
| 22678 | WriteFSqrtX = 324, |
| 22679 | WriteFSqrt64Ld = 325, |
| 22680 | WriteFSqrt64Ld_ReadAfterVecLd = 326, |
| 22681 | WriteFSqrt64 = 327, |
| 22682 | WriteFSqrtLd = 328, |
| 22683 | WriteFSqrtLd_ReadAfterVecLd = 329, |
| 22684 | WriteFSqrt = 330, |
| 22685 | WriteFSqrt80 = 331, |
| 22686 | WriteSTMXCSR = 332, |
| 22687 | WriteTZCNTLd = 333, |
| 22688 | WriteTZCNT = 334, |
| 22689 | WriteFMAZLd = 335, |
| 22690 | WriteFMALd = 336, |
| 22691 | WriteFAddYLd_ReadAfterVecYLd = 337, |
| 22692 | WriteFAddY = 338, |
| 22693 | WriteFAddZLd_ReadAfterVecYLd = 339, |
| 22694 | WriteFAddZ = 340, |
| 22695 | WriteFAdd64YLd_ReadAfterVecYLd = 341, |
| 22696 | WriteFAdd64Y = 342, |
| 22697 | WriteFAdd64ZLd_ReadAfterVecYLd = 343, |
| 22698 | WriteFAdd64Z = 344, |
| 22699 | WriteShuffleYLd_ReadAfterVecYLd = 345, |
| 22700 | WriteShuffleY = 346, |
| 22701 | WriteShuffleZLd_ReadAfterVecYLd = 347, |
| 22702 | WriteShuffleZ = 348, |
| 22703 | WriteFLogicYLd_ReadAfterVecYLd = 349, |
| 22704 | WriteFLogicY = 350, |
| 22705 | WriteFLogicZLd_ReadAfterVecYLd = 351, |
| 22706 | WriteFLogicZ = 352, |
| 22707 | WriteCvtPH2PSY = 353, |
| 22708 | WriteCvtPH2PS = 354, |
| 22709 | WriteFVarBlendYLd_ReadAfterVecYLd = 355, |
| 22710 | WriteFVarBlendY = 356, |
| 22711 | WriteFVarBlendZLd_ReadAfterVecYLd = 357, |
| 22712 | WriteFVarBlendZ = 358, |
| 22713 | WriteFBlendYLd_ReadAfterVecYLd = 359, |
| 22714 | WriteFBlendY = 360, |
| 22715 | WriteFVarBlendYLd_ReadAfterVecYLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecYLd = 361, |
| 22716 | WriteFVarBlendLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 362, |
| 22717 | WriteShuffle256Ld = 363, |
| 22718 | WriteShuffle256 = 364, |
| 22719 | WriteShuffleYLd = 365, |
| 22720 | WriteFShuffle256 = 366, |
| 22721 | WriteFShuffle256Ld = 367, |
| 22722 | WriteFCmpYLd_ReadAfterVecYLd = 368, |
| 22723 | WriteFCmpY = 369, |
| 22724 | WriteFCmpZLd_ReadAfterVecYLd = 370, |
| 22725 | WriteFCmpZ = 371, |
| 22726 | WriteFCmp64YLd_ReadAfterVecYLd = 372, |
| 22727 | WriteFCmp64Y = 373, |
| 22728 | WriteVarShuffle256Ld = 374, |
| 22729 | WriteVarShuffle256 = 375, |
| 22730 | WriteCvtPD2PSLd_ReadAfterVecXLd = 376, |
| 22731 | WriteCvtPD2PSYLd_ReadAfterVecYLd = 377, |
| 22732 | WriteCvtPD2PSY = 378, |
| 22733 | WriteCvtPD2PSZLd_ReadAfterVecYLd = 379, |
| 22734 | WriteCvtPD2PSZ = 380, |
| 22735 | WriteVecIMulYLd_ReadAfterVecYLd = 381, |
| 22736 | WriteVecIMulY = 382, |
| 22737 | WriteVecIMulZLd_ReadAfterVecYLd = 383, |
| 22738 | WriteVecIMulZ = 384, |
| 22739 | WriteCvtI2PDYLd = 385, |
| 22740 | WriteCvtI2PDY = 386, |
| 22741 | WriteCvtI2PDZLd = 387, |
| 22742 | WriteCvtI2PDZ = 388, |
| 22743 | WriteCvtI2PSYLd = 389, |
| 22744 | WriteCvtI2PSY = 390, |
| 22745 | WriteCvtI2PSZLd = 391, |
| 22746 | WriteCvtI2PSZ = 392, |
| 22747 | WriteCvtPH2PSZLd = 393, |
| 22748 | WriteCvtPH2PSZ = 394, |
| 22749 | WriteCvtPD2PSYLd = 395, |
| 22750 | WriteCvtPD2PSZLd = 396, |
| 22751 | WriteCvtPD2IYLd = 397, |
| 22752 | WriteCvtPD2IY = 398, |
| 22753 | WriteCvtPD2IZLd = 399, |
| 22754 | WriteCvtPD2IZ = 400, |
| 22755 | WriteCvtPS2IYLd = 401, |
| 22756 | WriteCvtPS2IY = 402, |
| 22757 | WriteCvtPS2IZLd = 403, |
| 22758 | WriteCvtPS2IZ = 404, |
| 22759 | WriteCvtPS2PDYLd = 405, |
| 22760 | WriteCvtPS2PDY = 406, |
| 22761 | WriteCvtPS2PDZLd = 407, |
| 22762 | WriteCvtPS2PDZ = 408, |
| 22763 | WriteCvtPH2PSYLd = 409, |
| 22764 | WriteCvtPH2PSLd = 410, |
| 22765 | WriteCvtPS2PHYSt = 411, |
| 22766 | WriteCvtPS2PHY = 412, |
| 22767 | WriteCvtPS2PHSt = 413, |
| 22768 | WriteCvtPS2PH = 414, |
| 22769 | WriteCvtPS2PHZSt = 415, |
| 22770 | WriteCvtPS2PHZ = 416, |
| 22771 | WriteCvtSD2ILd_ReadAfterVecLd = 417, |
| 22772 | WriteCvtSS2ILd_ReadAfterVecLd = 418, |
| 22773 | WritePSADBWYLd_ReadAfterVecYLd = 419, |
| 22774 | WritePSADBWY = 420, |
| 22775 | WritePSADBWZLd_ReadAfterVecYLd = 421, |
| 22776 | WritePSADBWZ = 422, |
| 22777 | WriteFDivYLd_ReadAfterVecYLd = 423, |
| 22778 | WriteFDivY = 424, |
| 22779 | WriteFDivZLd_ReadAfterVecYLd = 425, |
| 22780 | WriteFDivZ = 426, |
| 22781 | WriteFDiv64YLd_ReadAfterVecYLd = 427, |
| 22782 | WriteFDiv64Y = 428, |
| 22783 | WriteFDiv64ZLd_ReadAfterVecYLd = 429, |
| 22784 | WriteFDiv64Z = 430, |
| 22785 | WriteFMAXLd_ReadAfterVecXLd = 431, |
| 22786 | WriteFMAX = 432, |
| 22787 | WriteFMAYLd_ReadAfterVecYLd = 433, |
| 22788 | WriteFMAY = 434, |
| 22789 | WriteFMAZLd_ReadAfterVecYLd = 435, |
| 22790 | WriteFMAZ = 436, |
| 22791 | WriteDPPSYLd_ReadAfterVecYLd = 437, |
| 22792 | WriteDPPSY = 438, |
| 22793 | WriteVarShuffle256Ld_ReadAfterVecYLd = 439, |
| 22794 | WriteFMAXLd_ReadAfterVecXLd_ReadAfterVecXLd = 440, |
| 22795 | WriteFMAYLd_ReadAfterVecYLd_ReadAfterVecYLd = 441, |
| 22796 | WriteFMAZLd_ReadAfterVecYLd_ReadAfterVecYLd = 442, |
| 22797 | WriteFMALd_ReadAfterVecLd_ReadAfterVecLd = 443, |
| 22798 | WriteFMA = 444, |
| 22799 | WriteFMAYLd_ReadAfterVecYLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecYLd = 445, |
| 22800 | WriteFMAXLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 446, |
| 22801 | WriteFMALd_ReadAfterVecLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecLd = 447, |
| 22802 | WriteFRndYLd_ReadAfterVecYLd = 448, |
| 22803 | WriteFRndY = 449, |
| 22804 | WriteLoad_WriteVecMaskedGatherWriteback = 450, |
| 22805 | WriteFRndZLd_ReadAfterVecYLd = 451, |
| 22806 | WriteFRndZ = 452, |
| 22807 | WriteVecALUYLd_ReadAfterVecYLd = 453, |
| 22808 | WriteVecALUY = 454, |
| 22809 | WriteVecALUZLd_ReadAfterVecYLd = 455, |
| 22810 | WriteVecALUZ = 456, |
| 22811 | WriteFHAddYLd_ReadAfterVecYLd = 457, |
| 22812 | WriteFHAddY = 458, |
| 22813 | WriteFShuffle256Ld_ReadAfterVecYLd = 459, |
| 22814 | WriteShuffle256Ld_ReadAfterVecYLd = 460, |
| 22815 | WriteVecLoadY = 461, |
| 22816 | WriteFMaskedStore64Y = 462, |
| 22817 | WriteFMaskedLoadY = 463, |
| 22818 | WriteFMaskedStore64 = 464, |
| 22819 | WriteFMaskedLoad = 465, |
| 22820 | WriteFMaskedStore32Y = 466, |
| 22821 | WriteFMaskedStore32 = 467, |
| 22822 | WriteFCmp64ZLd_ReadAfterVecYLd = 468, |
| 22823 | WriteFCmp64Z = 469, |
| 22824 | WriteFMoveY = 470, |
| 22825 | WriteFMoveZ = 471, |
| 22826 | WriteFShuffleYLd = 472, |
| 22827 | WriteFShuffleY = 473, |
| 22828 | WriteFShuffleZLd = 474, |
| 22829 | WriteFShuffleZ = 475, |
| 22830 | WriteVecStoreY = 476, |
| 22831 | WriteVecMoveY = 477, |
| 22832 | WriteVecMoveZ = 478, |
| 22833 | WriteVecLoadNTY = 479, |
| 22834 | WriteVecStoreNTY = 480, |
| 22835 | WriteFStoreNTY = 481, |
| 22836 | WriteMPSADYLd_ReadAfterVecYLd = 482, |
| 22837 | WriteMPSADY = 483, |
| 22838 | WriteFMulYLd_ReadAfterVecYLd = 484, |
| 22839 | WriteFMulY = 485, |
| 22840 | WriteFMulZLd_ReadAfterVecYLd = 486, |
| 22841 | WriteFMulZ = 487, |
| 22842 | WriteFMul64YLd_ReadAfterVecYLd = 488, |
| 22843 | WriteFMul64Y = 489, |
| 22844 | WriteFMul64ZLd_ReadAfterVecYLd = 490, |
| 22845 | WriteFMul64Z = 491, |
| 22846 | WriteVecALUYLd = 492, |
| 22847 | WriteVecALUZLd = 493, |
| 22848 | WriteVecLogicYLd_ReadAfterVecYLd = 494, |
| 22849 | WriteVecLogicY = 495, |
| 22850 | WriteVecLogicZLd_ReadAfterVecYLd = 496, |
| 22851 | WriteVecLogicZ = 497, |
| 22852 | WriteBlendYLd_ReadAfterVecYLd = 498, |
| 22853 | WriteBlendY = 499, |
| 22854 | WriteVarBlendYLd_ReadAfterVecYLd = 500, |
| 22855 | WriteVarBlendY = 501, |
| 22856 | WriteVarBlendZLd_ReadAfterVecYLd = 502, |
| 22857 | WriteVarBlendZ = 503, |
| 22858 | WriteVarBlendYLd_ReadAfterVecYLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecYLd = 504, |
| 22859 | WriteVarBlendLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 505, |
| 22860 | WriteShuffleYLd_ReadAfterVecYLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecYLd = 506, |
| 22861 | WriteShuffleYLd_ReadAfterVecYLd_ReadAfterVecYLd = 507, |
| 22862 | WriteShuffleXLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 508, |
| 22863 | WriteShuffleXLd_ReadAfterVecXLd_ReadAfterVecXLd = 509, |
| 22864 | WriteVecIMulXLd_ReadAfterVecXLd_ReadAfterVecXLd = 510, |
| 22865 | WriteVecIMulYLd_ReadAfterVecYLd_ReadAfterVecYLd = 511, |
| 22866 | WriteVecIMulZLd_ReadAfterVecYLd_ReadAfterVecYLd = 512, |
| 22867 | WriteFVarShuffle256Ld_ReadAfterVecYLd = 513, |
| 22868 | WriteFVarShuffle256 = 514, |
| 22869 | WriteFVarShuffleYLd_ReadAfterVecYLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecYLd = 515, |
| 22870 | WriteFVarShuffleYLd_ReadAfterVecYLd_ReadAfterVecYLd = 516, |
| 22871 | WriteFVarShuffleY = 517, |
| 22872 | WriteFVarShuffleLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 518, |
| 22873 | WriteFVarShuffleLd_ReadAfterVecXLd_ReadAfterVecXLd = 519, |
| 22874 | WriteFVarShuffle = 520, |
| 22875 | WriteFVarShuffleYLd_ReadAfterVecYLd = 521, |
| 22876 | WriteFVarShuffleLd_ReadAfterVecXLd = 522, |
| 22877 | WriteFVarShuffleZLd_ReadAfterVecYLd = 523, |
| 22878 | WriteFVarShuffleZ = 524, |
| 22879 | WritePHAddYLd_ReadAfterVecYLd = 525, |
| 22880 | WritePHAddY = 526, |
| 22881 | WriteVecInsert = 527, |
| 22882 | WriteVecIMulXLd = 528, |
| 22883 | WriteVecIMulYLd = 529, |
| 22884 | WriteVecIMulZLd = 530, |
| 22885 | WriteVecMaskedStore32Y = 531, |
| 22886 | WriteVecMaskedLoadY = 532, |
| 22887 | WriteVecMaskedStore32 = 533, |
| 22888 | WriteVecMaskedLoad = 534, |
| 22889 | WriteVecMaskedStore64Y = 535, |
| 22890 | WriteVecMaskedStore64 = 536, |
| 22891 | WriteVPMOV256Ld = 537, |
| 22892 | WriteVPMOV256 = 538, |
| 22893 | WriteVecMOVMSKY = 539, |
| 22894 | WritePMULLDYLd_ReadAfterVecYLd = 540, |
| 22895 | WritePMULLDY = 541, |
| 22896 | WritePMULLDZLd_ReadAfterVecYLd = 542, |
| 22897 | WritePMULLDZ = 543, |
| 22898 | WriteVarShuffleXLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 544, |
| 22899 | WriteVarShuffleXLd_ReadAfterVecXLd_ReadAfterVecXLd = 545, |
| 22900 | WriteVecShiftImmXLd = 546, |
| 22901 | WriteVecShiftImmYLd = 547, |
| 22902 | WriteVecShiftImmY = 548, |
| 22903 | WriteVecShiftImmZLd = 549, |
| 22904 | WriteVecShiftImmZ = 550, |
| 22905 | WriteVarVecShiftLd_ReadAfterVecXLd = 551, |
| 22906 | WriteVarVecShift = 552, |
| 22907 | WriteVarVecShiftYLd_ReadAfterVecYLd = 553, |
| 22908 | WriteVarVecShiftY = 554, |
| 22909 | WriteVarVecShiftZLd_ReadAfterVecYLd = 555, |
| 22910 | WriteVarVecShiftZ = 556, |
| 22911 | WriteVecShiftImmXLd_ReadAfterVecXLd = 557, |
| 22912 | WriteVarShuffleYLd_ReadAfterVecYLd = 558, |
| 22913 | WriteVarShuffleY = 559, |
| 22914 | WriteVarShuffleZLd_ReadAfterVecYLd = 560, |
| 22915 | WriteVarShuffleZ = 561, |
| 22916 | WriteShuffleZLd = 562, |
| 22917 | WriteVecShiftYLd_ReadAfterVecYLd = 563, |
| 22918 | WriteVecShiftY = 564, |
| 22919 | WriteVecShiftZLd_ReadAfterVecYLd = 565, |
| 22920 | WriteVecShiftZ = 566, |
| 22921 | WriteVecTestYLd_ReadAfterVecYLd = 567, |
| 22922 | WriteVecTestY = 568, |
| 22923 | WriteFRcpXLd_ReadAfterVecXLd = 569, |
| 22924 | WriteFRcpYLd_ReadAfterVecYLd = 570, |
| 22925 | WriteFRcpY = 571, |
| 22926 | WriteFRcpZLd_ReadAfterVecYLd = 572, |
| 22927 | WriteFRcpZ = 573, |
| 22928 | WriteFRcpYLd = 574, |
| 22929 | WriteFRndYLd = 575, |
| 22930 | WriteFRsqrtXLd_ReadAfterVecXLd = 576, |
| 22931 | WriteFRsqrtYLd_ReadAfterVecYLd = 577, |
| 22932 | WriteFRsqrtY = 578, |
| 22933 | WriteFRsqrtZLd_ReadAfterVecYLd = 579, |
| 22934 | WriteFRsqrtZ = 580, |
| 22935 | WriteFRsqrtYLd = 581, |
| 22936 | WriteFShuffleYLd_ReadAfterVecYLd = 582, |
| 22937 | WriteFShuffleZLd_ReadAfterVecYLd = 583, |
| 22938 | WriteFSqrtXLd_ReadAfterVecXLd = 584, |
| 22939 | WriteFSqrtYLd_ReadAfterVecYLd = 585, |
| 22940 | WriteFSqrtY = 586, |
| 22941 | WriteFSqrtZLd_ReadAfterVecYLd = 587, |
| 22942 | WriteFSqrtZ = 588, |
| 22943 | WriteFSqrt64YLd = 589, |
| 22944 | WriteFSqrt64Y = 590, |
| 22945 | WriteFSqrt64XLd_ReadAfterVecXLd = 591, |
| 22946 | WriteFSqrt64YLd_ReadAfterVecYLd = 592, |
| 22947 | WriteFSqrt64ZLd_ReadAfterVecYLd = 593, |
| 22948 | WriteFSqrt64Z = 594, |
| 22949 | WriteFSqrtYLd = 595, |
| 22950 | WriteFTestYLd_ReadAfterVecYLd = 596, |
| 22951 | WriteFTestY = 597, |
| 22952 | WriteFTestLd_ReadAfterVecXLd = 598, |
| 22953 | WriteFTest = 599, |
| 22954 | WriteALULd_WriteRMW = 600, |
| 22955 | COPY = 601, |
| 22956 | XAM_F = 602, |
| 22957 | LD_Frr = 603, |
| 22958 | MOVSX64rr32 = 604, |
| 22959 | RCL16m1_RCL16m1_EVEX_RCL16mi_RCL16mi_EVEX_RCL32m1_RCL32m1_EVEX_RCL32mi_RCL32mi_EVEX_RCL64m1_RCL64m1_EVEX_RCL64mi_RCL64mi_EVEX_RCL8m1_RCL8m1_EVEX_RCL8mi_RCL8mi_EVEX_RCR16m1_RCR16m1_EVEX_RCR16mi_RCR16mi_EVEX_RCR32m1_RCR32m1_EVEX_RCR32mi_RCR32mi_EVEX_RCR64m1_RCR64m1_EVEX_RCR64mi_RCR64mi_EVEX_RCR8m1_RCR8m1_EVEX_RCR8mi_RCR8mi_EVEX_ROL16m1_ROL16m1_EVEX_ROL16m1_NF_ROL16mi_ROL16mi_EVEX_ROL16mi_NF_ROL32m1_ROL32m1_EVEX_ROL32m1_NF_ROL32mi_ROL32mi_EVEX_ROL32mi_NF_ROL64m1_ROL64m1_EVEX_ROL64m1_NF_ROL64mi_ROL64mi_EVEX_ROL64mi_NF_ROL8m1_ROL8m1_EVEX_ROL8m1_NF_ROL8mi_ROL8mi_EVEX_ROL8mi_NF_ROR16m1_ROR16m1_EVEX_ROR16m1_NF_ROR16mi_ROR16mi_EVEX_ROR16mi_NF_ROR32m1_ROR32m1_EVEX_ROR32m1_NF_ROR32mi_ROR32mi_EVEX_ROR32mi_NF_ROR64m1_ROR64m1_EVEX_ROR64m1_NF_ROR64mi_ROR64mi_EVEX_ROR64mi_NF_ROR8m1_ROR8m1_EVEX_ROR8m1_NF_ROR8mi_ROR8mi_EVEX_ROR8mi_NF = 605, |
| 22960 | RCL16m1_ND_RCL16mi_ND_RCL32m1_ND_RCL32mi_ND_RCL64m1_ND_RCL64mi_ND_RCL8m1_ND_RCL8mi_ND_RCR16m1_ND_RCR16mi_ND_RCR32m1_ND_RCR32mi_ND_RCR64m1_ND_RCR64mi_ND_RCR8m1_ND_RCR8mi_ND_ROL16m1_ND_ROL16m1_NF_ND_ROL16mi_ND_ROL16mi_NF_ND_ROL32m1_ND_ROL32m1_NF_ND_ROL32mi_ND_ROL32mi_NF_ND_ROL64m1_ND_ROL64m1_NF_ND_ROL64mi_ND_ROL64mi_NF_ND_ROL8m1_ND_ROL8m1_NF_ND_ROL8mi_ND_ROL8mi_NF_ND_ROR16m1_ND_ROR16m1_NF_ND_ROR16mi_ND_ROR16mi_NF_ND_ROR32m1_ND_ROR32m1_NF_ND_ROR32mi_ND_ROR32mi_NF_ND_ROR64m1_ND_ROR64m1_NF_ND_ROR64mi_ND_ROR64mi_NF_ND_ROR8m1_ND_ROR8m1_NF_ND_ROR8mi_ND_ROR8mi_NF_ND = 606, |
| 22961 | RCL16mCL_RCL16mCL_EVEX_RCL32mCL_RCL32mCL_EVEX_RCL64mCL_RCL64mCL_EVEX_RCL8mCL_RCL8mCL_EVEX_RCR16mCL_RCR16mCL_EVEX_RCR32mCL_RCR32mCL_EVEX_RCR64mCL_RCR64mCL_EVEX_RCR8mCL_RCR8mCL_EVEX_ROL16mCL_ROL16mCL_EVEX_ROL16mCL_NF_ROL32mCL_ROL32mCL_EVEX_ROL32mCL_NF_ROL64mCL_ROL64mCL_EVEX_ROL64mCL_NF_ROL8mCL_ROL8mCL_EVEX_ROL8mCL_NF_ROR16mCL_ROR16mCL_EVEX_ROR16mCL_NF_ROR32mCL_ROR32mCL_EVEX_ROR32mCL_NF_ROR64mCL_ROR64mCL_EVEX_ROR64mCL_NF_ROR8mCL_ROR8mCL_EVEX_ROR8mCL_NF = 607, |
| 22962 | RCL16mCL_ND_RCL32mCL_ND_RCL64mCL_ND_RCL8mCL_ND_RCR16mCL_ND_RCR32mCL_ND_RCR64mCL_ND_RCR8mCL_ND_ROL16mCL_ND_ROL16mCL_NF_ND_ROL32mCL_ND_ROL32mCL_NF_ND_ROL64mCL_ND_ROL64mCL_NF_ND_ROL8mCL_ND_ROL8mCL_NF_ND_ROR16mCL_ND_ROR16mCL_NF_ND_ROR32mCL_ND_ROR32mCL_NF_ND_ROR64mCL_ND_ROR64mCL_NF_ND_ROR8mCL_ND_ROR8mCL_NF_ND = 608, |
| 22963 | SAR16m1_SAR16m1_EVEX_SAR16m1_NF_SAR16mi_SAR16mi_EVEX_SAR16mi_NF_SAR32m1_SAR32m1_EVEX_SAR32m1_NF_SAR32mi_SAR32mi_EVEX_SAR32mi_NF_SAR64m1_SAR64m1_EVEX_SAR64m1_NF_SAR64mi_SAR64mi_EVEX_SAR64mi_NF_SAR8m1_SAR8m1_EVEX_SAR8m1_NF_SAR8mi_SAR8mi_EVEX_SAR8mi_NF_SHL16m1_SHL16m1_EVEX_SHL16m1_NF_SHL16mi_SHL16mi_EVEX_SHL16mi_NF_SHL32m1_SHL32m1_EVEX_SHL32m1_NF_SHL32mi_SHL32mi_EVEX_SHL32mi_NF_SHL64m1_SHL64m1_EVEX_SHL64m1_NF_SHL64mi_SHL64mi_EVEX_SHL64mi_NF_SHL8m1_SHL8m1_EVEX_SHL8m1_NF_SHL8mi_SHL8mi_EVEX_SHL8mi_NF_SHR16m1_SHR16m1_EVEX_SHR16m1_NF_SHR16mi_SHR16mi_EVEX_SHR16mi_NF_SHR32m1_SHR32m1_EVEX_SHR32m1_NF_SHR32mi_SHR32mi_EVEX_SHR32mi_NF_SHR64m1_SHR64m1_EVEX_SHR64m1_NF_SHR64mi_SHR64mi_EVEX_SHR64mi_NF_SHR8m1_SHR8m1_EVEX_SHR8m1_NF_SHR8mi_SHR8mi_EVEX_SHR8mi_NF = 609, |
| 22964 | SAR16m1_ND_SAR16m1_NF_ND_SAR16mi_ND_SAR16mi_NF_ND_SAR32m1_ND_SAR32m1_NF_ND_SAR32mi_ND_SAR32mi_NF_ND_SAR64m1_ND_SAR64m1_NF_ND_SAR64mi_ND_SAR64mi_NF_ND_SAR8m1_ND_SAR8m1_NF_ND_SAR8mi_ND_SAR8mi_NF_ND_SHL16m1_ND_SHL16m1_NF_ND_SHL16mi_ND_SHL16mi_NF_ND_SHL32m1_ND_SHL32m1_NF_ND_SHL32mi_ND_SHL32mi_NF_ND_SHL64m1_ND_SHL64m1_NF_ND_SHL64mi_ND_SHL64mi_NF_ND_SHL8m1_ND_SHL8m1_NF_ND_SHL8mi_ND_SHL8mi_NF_ND_SHR16m1_ND_SHR16m1_NF_ND_SHR16mi_ND_SHR16mi_NF_ND_SHR32m1_ND_SHR32m1_NF_ND_SHR32mi_ND_SHR32mi_NF_ND_SHR64m1_ND_SHR64m1_NF_ND_SHR64mi_ND_SHR64mi_NF_ND_SHR8m1_ND_SHR8m1_NF_ND_SHR8mi_ND_SHR8mi_NF_ND = 610, |
| 22965 | SAR16mCL_SAR16mCL_EVEX_SAR16mCL_NF_SAR32mCL_SAR32mCL_EVEX_SAR32mCL_NF_SAR64mCL_SAR64mCL_EVEX_SAR64mCL_NF_SAR8mCL_SAR8mCL_EVEX_SAR8mCL_NF_SHL16mCL_SHL16mCL_EVEX_SHL16mCL_NF_SHL32mCL_SHL32mCL_EVEX_SHL32mCL_NF_SHL64mCL_SHL64mCL_EVEX_SHL64mCL_NF_SHL8mCL_SHL8mCL_EVEX_SHL8mCL_NF_SHR16mCL_SHR16mCL_EVEX_SHR16mCL_NF_SHR32mCL_SHR32mCL_EVEX_SHR32mCL_NF_SHR64mCL_SHR64mCL_EVEX_SHR64mCL_NF_SHR8mCL_SHR8mCL_EVEX_SHR8mCL_NF = 611, |
| 22966 | SAR16mCL_ND_SAR16mCL_NF_ND_SAR32mCL_ND_SAR32mCL_NF_ND_SAR64mCL_ND_SAR64mCL_NF_ND_SAR8mCL_ND_SAR8mCL_NF_ND_SHL16mCL_ND_SHL16mCL_NF_ND_SHL32mCL_ND_SHL32mCL_NF_ND_SHL64mCL_ND_SHL64mCL_NF_ND_SHL8mCL_ND_SHL8mCL_NF_ND_SHR16mCL_ND_SHR16mCL_NF_ND_SHR32mCL_ND_SHR32mCL_NF_ND_SHR64mCL_ND_SHR64mCL_NF_ND_SHR8mCL_ND_SHR8mCL_NF_ND = 612, |
| 22967 | MOVSX32rr16_MOVSX32rr8_MOVSX32rr8_NOREX_MOVSX64rr16_MOVSX64rr8_MOVZX32rr16_MOVZX32rr8_MOVZX32rr8_NOREX_MOVZX64rr16_MOVZX64rr8 = 613, |
| 22968 | FCOMPP = 614, |
| 22969 | UCOM_FPPr_UCOM_FPr_UCOM_Fr = 615, |
| 22970 | MMX_CVTPI2PSrr = 616, |
| 22971 | MMX_CVTPI2PSrm = 617, |
| 22972 | MMX_CVTPS2PIrr_MMX_CVTTPS2PIrr = 618, |
| 22973 | POP32r_POP64r_POP16rmr_POP32rmr_POP64rmr = 619, |
| 22974 | PUSH16r_PUSH32r_PUSH64r_PUSH16i_PUSH32i_PUSH16rmr_PUSH32rmr_PUSH64rmr_PUSH16i8_PUSH32i8_PUSH64i8_PUSH64i32 = 620, |
| 22975 | XCH_F = 621, |
| 22976 | RETI16_RETI32_RETI64_IRET_IRET16_IRET32_IRET64 = 622, |
| 22977 | MMX_CVTPS2PIrm_MMX_CVTTPS2PIrm = 623, |
| 22978 | ILD_F16m_ILD_F32m_ILD_F64m = 624, |
| 22979 | CVTSI642SDrm = 625, |
| 22980 | CVTSI642SDrm_Int = 626, |
| 22981 | CVTSI642SSrr = 627, |
| 22982 | CVTSI642SSrr_Int = 628, |
| 22983 | CVTSI642SSrm = 629, |
| 22984 | CVTSI642SSrm_Int = 630, |
| 22985 | CVTSS2SI64rr_CVTTSS2SI64rr = 631, |
| 22986 | CVTSS2SI64rr_Int_CVTTSS2SI64rr_Int = 632, |
| 22987 | CVTSS2SI64rm_CVTSS2SI64rm_Int_CVTTSS2SI64rm_CVTTSS2SI64rm_Int = 633, |
| 22988 | FDECSTP_FFREE_FFREEP_FINCSTP_WAIT_STOSB_STOSL_STOSQ_STOSW = 634, |
| 22989 | LFENCE = 635, |
| 22990 | MOVSSrr_MOVSSrr_REV = 636, |
| 22991 | LEAVE_LEAVE64 = 637, |
| 22992 | POP16r = 638, |
| 22993 | PUSH16rmm_PUSH32rmm_PUSH64rmm = 639, |
| 22994 | LODSB_LODSL_LODSQ_LODSW_SCASB_SCASL_SCASQ_SCASW = 640, |
| 22995 | PUSHCS16_PUSHCS32_PUSHDS16_PUSHDS32_PUSHES16_PUSHES32_PUSHFS16_PUSHFS32_PUSHFS64_PUSHGS16_PUSHGS32_PUSHGS64_PUSHSS16_PUSHSS32 = 641, |
| 22996 | ISTT_FP16m_ISTT_FP32m_ISTT_FP64m_ST_F32m_ST_F64m_ST_FP32m_ST_FP64m = 642, |
| 22997 | ST_FPrr_ST_Frr = 643, |
| 22998 | MMX_PADDQrr_MMX_PSUBQrr = 644, |
| 22999 | MOVSX16rr8_MOVZX16rr8 = 645, |
| 23000 | MOVDQUmr_MASKMOVDQU_MASKMOVDQU64 = 646, |
| 23001 | MOVUPDmr_MOVUPSmr = 647, |
| 23002 | PADDQrr_PSUBQrr = 648, |
| 23003 | CLD = 649, |
| 23004 | LDDQUrm = 650, |
| 23005 | CMPSB_CMPSL_CMPSQ_CMPSW_MOVSB_MOVSL_MOVSQ_MOVSW = 651, |
| 23006 | POP16rmm_POP32rmm_POP64rmm = 652, |
| 23007 | XADD16rm_XADD32rm_XADD64rm_XADD8rm_XCHG16rm_XCHG32rm_XCHG64rm_XCHG8rm = 653, |
| 23008 | PHADDDrr_PHSUBDrr = 654, |
| 23009 | MOVSX16rm8_MOVZX16rm8 = 655, |
| 23010 | MMX_PADDQrm_MMX_PSUBQrm = 656, |
| 23011 | MOVDQUrm = 657, |
| 23012 | MOVUPDrm_MOVUPSrm = 658, |
| 23013 | PADDQrm_PSUBQrm = 659, |
| 23014 | CBW_CWD_CWDE_CDQ_CDQE_CQO = 660, |
| 23015 | JCXZ_JECXZ_JRCXZ = 661, |
| 23016 | LD_F80m = 662, |
| 23017 | PHADDDrm_PHSUBDrm = 663, |
| 23018 | MMX_PEXTRWrri_PEXTRWrri_PEXTRWrri_REV = 664, |
| 23019 | FLDCW16m = 665, |
| 23020 | ST_FP80m = 666, |
| 23021 | MMX_PHADDSWrr_MMX_PHADDWrr_MMX_PHSUBSWrr_MMX_PHSUBWrr = 667, |
| 23022 | CMPXCHG8rm = 668, |
| 23023 | INTO = 669, |
| 23024 | XLAT = 670, |
| 23025 | SHLD16rrCL_SHRD16rrCL = 671, |
| 23026 | SHLD16rri8_SHRD16rri8 = 672, |
| 23027 | SHLD16mrCL_SHRD16mrCL = 673, |
| 23028 | SHLD16mri8_SHRD16mri8 = 674, |
| 23029 | IST_F16m_IST_F32m_IST_FP16m_IST_FP32m_IST_FP64m = 675, |
| 23030 | MMX_PHADDSWrm_MMX_PHADDWrm_MMX_PHSUBSWrm_MMX_PHSUBWrm = 676, |
| 23031 | AAD8i8 = 677, |
| 23032 | LOOPE = 678, |
| 23033 | PUSHA16_PUSHA32 = 679, |
| 23034 | SHLD64rrCL_SHRD64rrCL = 680, |
| 23035 | FNSTCW16m = 681, |
| 23036 | POPA16_POPA32 = 682, |
| 23037 | PUSHF16_PUSHF32_PUSHF64 = 683, |
| 23038 | SHLD64mrCL_SHRD64mrCL = 684, |
| 23039 | SHLD64mri8_SHRD64mri8 = 685, |
| 23040 | SHLD64rri8_SHRD64rri8 = 686, |
| 23041 | CMPXCHG8rr = 687, |
| 23042 | COM_FIPr_COM_FIr_UCOM_FIPr_UCOM_FIr_TST_F_TST_Fp32_TST_Fp64_TST_Fp80 = 688, |
| 23043 | BOUNDS16rm_BOUNDS32rm = 689, |
| 23044 | AAA_AAS = 690, |
| 23045 | CMPXCHG16rm_CMPXCHG32rm_CMPXCHG64rm = 691, |
| 23046 | LOOPNE = 692, |
| 23047 | PAUSE = 693, |
| 23048 | CMPXCHG8B = 694, |
| 23049 | DAA = 695, |
| 23050 | LOOP = 696, |
| 23051 | DAS = 697, |
| 23052 | AAM8i8 = 698, |
| 23053 | STD = 699, |
| 23054 | CMPXCHG16B = 700, |
| 23055 | ARPL16mr_ARPL16rr = 701, |
| 23056 | FNCLEX_FXTRACT = 702, |
| 23057 | POPF32_POPF64 = 703, |
| 23058 | POPDS16_POPDS32_POPES16_POPES32_POPFS16_POPFS32_POPFS64_POPGS16_POPGS32_POPGS64 = 704, |
| 23059 | RDTSC_RDTSCP = 705, |
| 23060 | ENTER = 706, |
| 23061 | POPF16 = 707, |
| 23062 | MONITOR32rrr_MONITOR64rrr = 708, |
| 23063 | FRNDINT = 709, |
| 23064 | MWAITrr_RDPMC = 710, |
| 23065 | POPSS16_POPSS32 = 711, |
| 23066 | FPREM = 712, |
| 23067 | INSB_INSL_INSW = 713, |
| 23068 | FNINIT = 714, |
| 23069 | OUT8rr_OUT16rr_OUT32rr = 715, |
| 23070 | FPREM1 = 716, |
| 23071 | INVLPG_INVLPGA32_INVLPGA64 = 717, |
| 23072 | OUT8ir_OUT16ir_OUT32ir = 718, |
| 23073 | OUTSB_OUTSL_OUTSW = 719, |
| 23074 | FSCALE = 720, |
| 23075 | RDMSR = 721, |
| 23076 | RET_RET16_RET32_RET64_LRET16_LRET32_LRET64_LRETI16_LRETI32_LRETI64 = 722, |
| 23077 | IN8ri_IN16ri_IN32ri = 723, |
| 23078 | IN8rr_IN16rr_IN32rr = 724, |
| 23079 | F2XM1 = 725, |
| 23080 | CPUID = 726, |
| 23081 | INT = 727, |
| 23082 | INT3 = 728, |
| 23083 | FXSAVE_FXSAVE64 = 729, |
| 23084 | FXRSTOR_FXRSTOR64 = 730, |
| 23085 | FYL2X = 731, |
| 23086 | FYL2XP1 = 732, |
| 23087 | FPTAN = 733, |
| 23088 | FSINCOS_FSIN_FCOS = 734, |
| 23089 | FPATAN = 735, |
| 23090 | WRMSR = 736, |
| 23091 | COMP_FST0r_COM_FST0r = 737, |
| 23092 | UCOM_FPr_UCOM_Fr = 738, |
| 23093 | FDECSTP_FINCSTP_FFREE_FFREEP = 739, |
| 23094 | FNOP = 740, |
| 23095 | RET64 = 741, |
| 23096 | CDQ_CQO = 742, |
| 23097 | MMX_PABSBrr_MMX_PABSDrr_MMX_PABSWrr_MMX_PSIGNBrr_MMX_PSIGNDrr_MMX_PSIGNWrr = 743, |
| 23098 | MMX_PALIGNRrri = 744, |
| 23099 | SCASB_SCASL_SCASQ_SCASW = 745, |
| 23100 | COMISDrr_COMISDrr_Int_COMISSrr_COMISSrr_Int_UCOMISDrr_UCOMISDrr_Int_UCOMISSrr_UCOMISSrr_Int_VCOMISDrr_VCOMISDrr_Int_VCOMISSrr_VCOMISSrr_Int_VUCOMISDrr_VUCOMISDrr_Int_VUCOMISSrr_VUCOMISSrr_Int = 746, |
| 23101 | CWD = 747, |
| 23102 | FNSTSW16r = 748, |
| 23103 | MMX_MOVDQ2Qrr = 749, |
| 23104 | PUSHFS64 = 750, |
| 23105 | EXTRACTPSrri_VEXTRACTPSrri = 751, |
| 23106 | RCL8r1_RCL16r1_RCL32r1_RCL64r1_RCR8r1_RCR16r1_RCR32r1_RCR64r1 = 752, |
| 23107 | RCR8ri_RCR16ri_RCR32ri_RCR64ri = 753, |
| 23108 | RCL8ri_RCL16ri_RCL32ri_RCL64ri = 754, |
| 23109 | COM_FIPr_COM_FIr_UCOM_FIPr_UCOM_FIr = 755, |
| 23110 | MOV64sr = 756, |
| 23111 | RCL16rCL_RCL16rCL_EVEX_RCL16rCL_ND_RCL32rCL_RCL32rCL_EVEX_RCL32rCL_ND_RCL64rCL_RCL64rCL_EVEX_RCL64rCL_ND_RCL8rCL_RCL8rCL_EVEX_RCL8rCL_ND_RCR16rCL_RCR16rCL_EVEX_RCR16rCL_ND_RCR32rCL_RCR32rCL_EVEX_RCR32rCL_ND_RCR64rCL_RCR64rCL_EVEX_RCR64rCL_ND_RCR8rCL_RCR8rCL_EVEX_RCR8rCL_ND = 757, |
| 23112 | PUSH16r_PUSH16rmr_PUSH32r_PUSH32rmr_PUSH64i8_PUSH64r_PUSH64rmr = 758, |
| 23113 | CLI = 759, |
| 23114 | PUSHGS64 = 760, |
| 23115 | ISTT_FP16m_ISTT_FP32m_ISTT_FP64m = 761, |
| 23116 | CALL64pcrel32 = 762, |
| 23117 | CALL64r_ImpCall_CALL64r_RVMARKER_CALL16r_CALL16r_NT_CALL32r_CALL32r_NT_CALL64r_CALL64r_NT = 763, |
| 23118 | EXTRACTPSmri_VEXTRACTPSmri = 764, |
| 23119 | STOSB_STOSL_STOSQ_STOSW = 765, |
| 23120 | PEXTRDmri_PEXTRQmri_VPEXTRDmri_VPEXTRQmri = 766, |
| 23121 | PUSHF16_PUSHF64 = 767, |
| 23122 | CLFLUSH_CLFLUSHOPT = 768, |
| 23123 | VBROADCASTSSrm = 769, |
| 23124 | MOV64toPQIrm_VMOV64toPQIrm_MOVDI2PDIrm_VMOVDI2PDIrm_MOVQI2PQIrm_VMOVQI2PQIrm = 770, |
| 23125 | MOVDDUPrm_VMOVDDUPrm_MOVSHDUPrm_VMOVSHDUPrm_MOVSLDUPrm_VMOVSLDUPrm = 771, |
| 23126 | MOVSDrm_MOVSDrm_alt_VMOVSDrm_VMOVSDrm_alt_MOVSSrm_MOVSSrm_alt_VMOVSSrm_VMOVSSrm_alt = 772, |
| 23127 | MOV16sm = 773, |
| 23128 | MMX_PABSBrm_MMX_PABSDrm_MMX_PABSWrm = 774, |
| 23129 | MMX_PALIGNRrmi = 775, |
| 23130 | MMX_PSIGNBrm_MMX_PSIGNDrm_MMX_PSIGNWrm = 776, |
| 23131 | LODSL_LODSQ = 777, |
| 23132 | VMOVDDUPYrm_VMOVSHDUPYrm_VMOVSLDUPYrm = 778, |
| 23133 | VINSERTF128rmi = 779, |
| 23134 | VERRm_VERWm = 780, |
| 23135 | FARJMP64m = 781, |
| 23136 | FNSTSWm = 782, |
| 23137 | SLDT16r_SLDT32r_SLDT64r_STR16r_STR32r_STR64r = 783, |
| 23138 | CALL64m_RVMARKER_CALL64m_CALL64m_NT = 784, |
| 23139 | CALL16m_CALL16m_NT_CALL32m_CALL32m_NT = 785, |
| 23140 | COMISDrm_COMISDrm_Int_COMISSrm_COMISSrm_Int_UCOMISDrm_UCOMISDrm_Int_UCOMISSrm_UCOMISSrm_Int_VCOMISDrm_VCOMISDrm_Int_VCOMISSrm_VCOMISSrm_Int_VUCOMISDrm_VUCOMISDrm_Int_VUCOMISSrm_VUCOMISSrm_Int = 786, |
| 23141 | CMPSB_CMPSL_CMPSQ_CMPSW = 787, |
| 23142 | ROL16m1_ROL16m1_EVEX_ROL16m1_NF_ROL16mi_ROL16mi_EVEX_ROL16mi_NF_ROL32m1_ROL32m1_EVEX_ROL32m1_NF_ROL32mi_ROL32mi_EVEX_ROL32mi_NF_ROL64m1_ROL64m1_EVEX_ROL64m1_NF_ROL64mi_ROL64mi_EVEX_ROL64mi_NF_ROL8m1_ROL8m1_EVEX_ROL8m1_NF_ROL8mi_ROL8mi_EVEX_ROL8mi_NF_ROR16m1_ROR16m1_EVEX_ROR16m1_NF_ROR16mi_ROR16mi_EVEX_ROR16mi_NF_ROR32m1_ROR32m1_EVEX_ROR32m1_NF_ROR32mi_ROR32mi_EVEX_ROR32mi_NF_ROR64m1_ROR64m1_EVEX_ROR64m1_NF_ROR64mi_ROR64mi_EVEX_ROR64mi_NF_ROR8m1_ROR8m1_EVEX_ROR8m1_NF_ROR8mi_ROR8mi_EVEX_ROR8mi_NF = 788, |
| 23143 | ROL16m1_ND_ROL16m1_NF_ND_ROL16mi_ND_ROL16mi_NF_ND_ROL32m1_ND_ROL32m1_NF_ND_ROL32mi_ND_ROL32mi_NF_ND_ROL64m1_ND_ROL64m1_NF_ND_ROL64mi_ND_ROL64mi_NF_ND_ROL8m1_ND_ROL8m1_NF_ND_ROL8mi_ND_ROL8mi_NF_ND_ROR16m1_ND_ROR16m1_NF_ND_ROR16mi_ND_ROR16mi_NF_ND_ROR32m1_ND_ROR32m1_NF_ND_ROR32mi_ND_ROR32mi_NF_ND_ROR64m1_ND_ROR64m1_NF_ND_ROR64mi_ND_ROR64mi_NF_ND_ROR8m1_ND_ROR8m1_NF_ND_ROR8mi_ND_ROR8mi_NF_ND = 789, |
| 23144 | XADD16rm_XADD32rm_XADD64rm_XADD8rm = 790, |
| 23145 | FARCALL64m = 791, |
| 23146 | LD_F32m_LD_F64m = 792, |
| 23147 | ROL16mCL_ROL16mCL_EVEX_ROL16mCL_NF_ROL32mCL_ROL32mCL_EVEX_ROL32mCL_NF_ROL64mCL_ROL64mCL_EVEX_ROL64mCL_NF_ROL8mCL_ROL8mCL_EVEX_ROL8mCL_NF_ROR16mCL_ROR16mCL_EVEX_ROR16mCL_NF_ROR32mCL_ROR32mCL_EVEX_ROR32mCL_NF_ROR64mCL_ROR64mCL_EVEX_ROR64mCL_NF_ROR8mCL_ROR8mCL_EVEX_ROR8mCL_NF = 793, |
| 23148 | ROL16mCL_ND_ROL16mCL_NF_ND_ROL32mCL_ND_ROL32mCL_NF_ND_ROL64mCL_ND_ROL64mCL_NF_ND_ROL8mCL_ND_ROL8mCL_NF_ND_ROR16mCL_ND_ROR16mCL_NF_ND_ROR32mCL_ND_ROR32mCL_NF_ND_ROR64mCL_ND_ROR64mCL_NF_ND_ROR8mCL_ND_ROR8mCL_NF_ND = 794, |
| 23149 | ADC8mr_ADC16mr_ADC32mr_ADC64mr_SBB8mr_SBB16mr_SBB32mr_SBB64mr = 795, |
| 23150 | ADD_F32m_ADD_F64m_SUBR_F32m_SUBR_F64m_SUB_F32m_SUB_F64m = 796, |
| 23151 | PCMPGTQrm_VPCMPGTQrm = 797, |
| 23152 | FICOM16m_FICOM32m_FICOMP16m_FICOMP32m = 798, |
| 23153 | MUL_F32m_MUL_F64m = 799, |
| 23154 | ADD_FI16m_ADD_FI32m_SUBR_FI16m_SUBR_FI32m_SUB_FI16m_SUB_FI32m = 800, |
| 23155 | MUL_FI16m_MUL_FI32m = 801, |
| 23156 | DIVR_F32m_DIVR_F64m_DIV_F32m_DIV_F64m = 802, |
| 23157 | DIVR_FI16m_DIVR_FI32m_DIV_FI16m_DIV_FI32m = 803, |
| 23158 | VZEROALL = 804, |
| 23159 | VZEROUPPER = 805, |
| 23160 | CLC = 806, |
| 23161 | SUB32rr_SUB64rr_XOR32rr_XOR64rr = 807, |
| 23162 | XORPSrr_VXORPSrr_XORPDrr_VXORPDrr = 808, |
| 23163 | VXORPSYrr_VXORPDYrr = 809, |
| 23164 | PXORrr_VPXORrr = 810, |
| 23165 | PSUBBrr_VPSUBBrr_PSUBDrr_VPSUBDrr_VPSUBQrr_PSUBWrr_VPSUBWrr_PCMPGTBrr_VPCMPGTBrr_PCMPGTDrr_VPCMPGTDrr_PCMPGTWrr_VPCMPGTWrr = 811, |
| 23166 | PSUBQrr = 812, |
| 23167 | PCMPGTQrr_VPCMPGTQrr = 813, |
| 23168 | CMOV16rr_CMOV32rr_CMOV64rr = 814, |
| 23169 | CMOV16rm_CMOV32rm_CMOV64rm = 815, |
| 23170 | SETCCr = 816, |
| 23171 | SETCCm = 817, |
| 23172 | MOVHPDrm_MOVHPSrm_MOVLPDrm_MOVLPSrm_VMOVHPDrm_VMOVHPSrm_VMOVLPDrm_VMOVLPSrm = 818, |
| 23173 | RETI16_RETI32_RETI64 = 819, |
| 23174 | LRETI16_LRETI32_LRETI64 = 820, |
| 23175 | RDPMC = 821, |
| 23176 | RDRAND16r_RDRAND32r_RDRAND64r = 822, |
| 23177 | FBLDm = 823, |
| 23178 | FFREE_FFREEP = 824, |
| 23179 | FSAVEm = 825, |
| 23180 | FRSTORm = 826, |
| 23181 | FXTRACT = 827, |
| 23182 | VPBROADCASTDrm_VPBROADCASTQrm = 828, |
| 23183 | VBROADCASTF128rm_VBROADCASTSDYrm_VBROADCASTSSYrm = 829, |
| 23184 | VBROADCASTI128rm = 830, |
| 23185 | VPBROADCASTDYrm_VPBROADCASTQYrm = 831, |
| 23186 | FBSTPm = 832, |
| 23187 | VMPTRSTm = 833, |
| 23188 | ST_FP32m_ST_FP64m = 834, |
| 23189 | VPSLLVQYrr_VPSRLVQYrr = 835, |
| 23190 | VPSLLVQrr_VPSRLVQrr = 836, |
| 23191 | JMP16r_JMP16r_NT_JMP32r_JMP32r_NT_JMP64r_JMP64r_NT_JMP64r_REX = 837, |
| 23192 | FINCSTP = 838, |
| 23193 | ANDN32rr_ANDN32rr_EVEX_ANDN32rr_NF_ANDN64rr_ANDN64rr_EVEX_ANDN64rr_NF = 839, |
| 23194 | VPBLENDDYrri = 840, |
| 23195 | VPBLENDDrri = 841, |
| 23196 | SGDT64m_SIDT64m_SMSW16m_STRm_SYSCALL = 842, |
| 23197 | VPSLLVQrm_VPSRLVQrm = 843, |
| 23198 | VPSLLVQYrm_VPSRLVQYrm = 844, |
| 23199 | PDEP32rm_PDEP32rm_EVEX_PDEP64rm_PDEP64rm_EVEX_PEXT32rm_PEXT32rm_EVEX_PEXT64rm_PEXT64rm_EVEX = 845, |
| 23200 | PMOVSXBDrm_PMOVZXBDrm_VPMOVSXBDrm_VPMOVZXBDrm_PMOVSXBQrm_PMOVZXBQrm_VPMOVSXBQrm_VPMOVZXBQrm_PMOVSXBWrm_PMOVZXBWrm_VPMOVSXBWrm_VPMOVZXBWrm_PMOVSXDQrm_PMOVZXDQrm_VPMOVSXDQrm_VPMOVZXDQrm_PMOVSXWDrm_PMOVZXWDrm_VPMOVSXWDrm_VPMOVZXWDrm_PMOVSXWQrm_PMOVZXWQrm_VPMOVSXWQrm_VPMOVZXWQrm = 846, |
| 23201 | VPMOVSXBDYrm_VPMOVSXBQYrm_VPMOVSXWQYrm = 847, |
| 23202 | JMP16m_JMP16m_NT_JMP32m_JMP32m_NT_JMP64m_JMP64m_NT_JMP64m_REX = 848, |
| 23203 | ANDN32rm_ANDN32rm_EVEX_ANDN32rm_NF_ANDN64rm_ANDN64rm_EVEX_ANDN64rm_NF = 849, |
| 23204 | MOVBE16rm_MOVBE16rm_EVEX_MOVBE32rm_MOVBE32rm_EVEX_MOVBE64rm_MOVBE64rm_EVEX = 850, |
| 23205 | VINSERTI128rmi = 851, |
| 23206 | VPBLENDDrmi = 852, |
| 23207 | VPBLENDDYrmi = 853, |
| 23208 | POP32r_POP64r = 854, |
| 23209 | MOVBE32mr_MOVBE32mr_EVEX_MOVBE64mr_MOVBE64mr_EVEX = 855, |
| 23210 | MOVBE16mr = 856, |
| 23211 | PUSH16r_PUSH32r_PUSH64r_PUSH64i8 = 857, |
| 23212 | XGETBV = 858, |
| 23213 | MMX_PACKSSDWrm_MMX_PACKSSWBrm_MMX_PACKUSWBrm = 859, |
| 23214 | LRET64_RET32 = 860, |
| 23215 | ROL8r1_ROL16r1_ROL32r1_ROL64r1_ROR8r1_ROR16r1_ROR32r1_ROR64r1 = 861, |
| 23216 | PDEP32rr_PDEP32rr_EVEX_PDEP64rr_PDEP64rr_EVEX_PEXT32rr_PEXT32rr_EVEX_PEXT64rr_PEXT64rr_EVEX = 862, |
| 23217 | VPBROADCASTBrr_VPBROADCASTWrr = 863, |
| 23218 | VPMOVSXBWYrm_VPMOVSXDQYrm_VPMOVSXWDYrm_VPMOVZXWDYrm = 864, |
| 23219 | MMX_PACKSSDWrr_MMX_PACKSSWBrr_MMX_PACKUSWBrr = 865, |
| 23220 | CLDEMOTE = 866, |
| 23221 | VPBROADCASTBYrm_VPBROADCASTBrm_VPBROADCASTWYrm_VPBROADCASTWrm = 867, |
| 23222 | LAR16rr_LAR32rr_LAR64rr = 868, |
| 23223 | LAR16rm_LAR32rm_LAR64rm_LSL16rm_LSL32rm_LSL64rm = 869, |
| 23224 | MUL_FPrST0_MUL_FST0r_MUL_FrST0 = 870, |
| 23225 | VPCMPGTQYrm = 871, |
| 23226 | VCVTSI642SSrr_VCVTSI642SSrr_Int = 872, |
| 23227 | STR16r_STR32r_STR64r = 873, |
| 23228 | XSETBV = 874, |
| 23229 | RCL16mCL_RCL16mCL_EVEX_RCL32mCL_RCL32mCL_EVEX_RCL64mCL_RCL64mCL_EVEX_RCL8mCL_RCL8mCL_EVEX = 875, |
| 23230 | RCL16mCL_ND_RCL32mCL_ND_RCL64mCL_ND_RCL8mCL_ND = 876, |
| 23231 | RCL16rCL_RCL16rCL_EVEX_RCL16rCL_ND_RCL32rCL_RCL32rCL_EVEX_RCL32rCL_ND_RCL64rCL_RCL64rCL_EVEX_RCL64rCL_ND_RCR16rCL_RCR16rCL_EVEX_RCR16rCL_ND_RCR32rCL_RCR32rCL_EVEX_RCR32rCL_ND_RCR64rCL_RCR64rCL_EVEX_RCR64rCL_ND = 877, |
| 23232 | RCL8rCL = 878, |
| 23233 | RCR8rCL = 879, |
| 23234 | RDTSC = 880, |
| 23235 | XRSTOR_XRSTOR64_XRSTORS_XRSTORS64 = 881, |
| 23236 | DIV_FPrST0_DIV_FST0r_DIV_FrST0 = 882, |
| 23237 | DIVR_F32m_DIVR_F64m = 883, |
| 23238 | DIVR_FI16m_DIVR_FI32m = 884, |
| 23239 | DIVR_FPrST0_DIVR_FST0r_DIVR_FrST0 = 885, |
| 23240 | XSAVE64 = 886, |
| 23241 | XSAVE = 887, |
| 23242 | XSAVEC_XSAVEC64_XSAVES_XSAVES64_XSAVEOPT_XSAVEOPT64 = 888, |
| 23243 | VMCLEARm = 889, |
| 23244 | FLDENVm = 890, |
| 23245 | FXRSTOR64 = 891, |
| 23246 | FSTENVm = 892, |
| 23247 | VGATHERDPDrm_VPGATHERDQrm = 893, |
| 23248 | VGATHERDPDYrm_VPGATHERDQYrm = 894, |
| 23249 | VGATHERDPSrm_VPGATHERDDrm = 895, |
| 23250 | VGATHERDPSYrm_VPGATHERDDYrm = 896, |
| 23251 | VGATHERQPDrm_VPGATHERQQrm = 897, |
| 23252 | VGATHERQPDYrm_VPGATHERQQYrm_VGATHERQPSYrm_VPGATHERQDYrm = 898, |
| 23253 | VGATHERQPSrm_VPGATHERQDrm = 899, |
| 23254 | VPXORYrr = 900, |
| 23255 | VPSUBBYrr_VPSUBDYrr_VPSUBQYrr_VPSUBWYrr_VPCMPGTBYrr_VPCMPGTDYrr_VPCMPGTWYrr = 901, |
| 23256 | VPCMPGTQYrr = 902, |
| 23257 | ADC16ri8_ADC32ri8_ADC64ri8_SBB16ri8_SBB32ri8_SBB64ri8 = 903, |
| 23258 | ADC8i8_SBB8i8_ADC16i16_SBB16i16_ADC32i32_SBB32i32_ADC64i32_SBB64i32 = 904, |
| 23259 | MOVBE16mr_EVEX = 905, |
| 23260 | FCOM32m_FCOM64m_FCOMP32m_FCOMP64m = 906, |
| 23261 | LRET64 = 907, |
| 23262 | POPF64 = 908, |
| 23263 | VGATHERQPDYrm_VPGATHERQQYrm = 909, |
| 23264 | PCMPEQQrr = 910, |
| 23265 | PCMPGTQrr = 911, |
| 23266 | PCMPEQQrm = 912, |
| 23267 | PCMPGTQrm = 913, |
| 23268 | MOV16rm = 914, |
| 23269 | POP16rmm = 915, |
| 23270 | PUSH16rmm_PUSH32rmm = 916, |
| 23271 | PUSHF16 = 917, |
| 23272 | LAHF = 918, |
| 23273 | ADD16mi_ADD16mi8_ADD16mi8_EVEX_ADD16mi8_NF_ADD16mi_EVEX_ADD16mi_NF_ADD32mi_ADD32mi8_ADD32mi8_EVEX_ADD32mi8_NF_ADD32mi_EVEX_ADD32mi_NF_ADD64mi32_ADD64mi32_EVEX_ADD64mi32_NF_ADD64mi8_ADD64mi8_EVEX_ADD64mi8_NF_ADD8mi_ADD8mi8_ADD8mi_EVEX_ADD8mi_NF_SUB16mi_SUB16mi8_SUB16mi8_EVEX_SUB16mi8_NF_SUB16mi_EVEX_SUB16mi_NF_SUB32mi_SUB32mi8_SUB32mi8_EVEX_SUB32mi8_NF_SUB32mi_EVEX_SUB32mi_NF_SUB64mi32_SUB64mi32_EVEX_SUB64mi32_NF_SUB64mi8_SUB64mi8_EVEX_SUB64mi8_NF_SUB8mi_SUB8mi8_SUB8mi_EVEX_SUB8mi_NF = 919, |
| 23274 | ADD16mi8_ND_ADD16mi8_NF_ND_ADD16mi_ND_ADD16mi_NF_ND_ADD16mr_ND_ADD16mr_NF_ND_ADD32mi8_ND_ADD32mi8_NF_ND_ADD32mi_ND_ADD32mi_NF_ND_ADD32mr_ND_ADD32mr_NF_ND_ADD64mi32_ND_ADD64mi32_NF_ND_ADD64mi8_ND_ADD64mi8_NF_ND_ADD64mr_ND_ADD64mr_NF_ND_ADD8mi_ND_ADD8mi_NF_ND_ADD8mr_ND_ADD8mr_NF_ND_SUB16mi8_ND_SUB16mi8_NF_ND_SUB16mi_ND_SUB16mi_NF_ND_SUB16mr_ND_SUB16mr_NF_ND_SUB32mi8_ND_SUB32mi8_NF_ND_SUB32mi_ND_SUB32mi_NF_ND_SUB32mr_ND_SUB32mr_NF_ND_SUB64mi32_ND_SUB64mi32_NF_ND_SUB64mi8_ND_SUB64mi8_NF_ND_SUB64mr_ND_SUB64mr_NF_ND_SUB8mi_ND_SUB8mi_NF_ND_SUB8mr_ND_SUB8mr_NF_ND = 920, |
| 23275 | ADD16mr_ADD16mr_EVEX_ADD32mr_ADD32mr_EVEX_ADD64mr_ADD64mr_EVEX_ADD8mr_ADD8mr_EVEX_SUB16mr_SUB16mr_EVEX_SUB32mr_SUB32mr_EVEX_SUB64mr_SUB64mr_EVEX_SUB8mr_SUB8mr_EVEX = 921, |
| 23276 | ADD16mr_NF_ADD32mr_NF_ADD64mr_NF_ADD8mr_NF_SUB16mr_NF_SUB32mr_NF_SUB64mr_NF_SUB8mr_NF = 922, |
| 23277 | ADC16mi_ADC16mi8_ADC16mi8_EVEX_ADC16mi_EVEX_ADC32mi_ADC32mi8_ADC32mi8_EVEX_ADC32mi_EVEX_ADC64mi32_ADC64mi32_EVEX_ADC64mi8_ADC64mi8_EVEX_ADC8mi_ADC8mi8_ADC8mi_EVEX_SBB16mi_SBB16mi8_SBB16mi8_EVEX_SBB16mi_EVEX_SBB32mi_SBB32mi8_SBB32mi8_EVEX_SBB32mi_EVEX_SBB64mi32_SBB64mi32_EVEX_SBB64mi8_SBB64mi8_EVEX_SBB8mi_SBB8mi8_SBB8mi_EVEX = 923, |
| 23278 | ADC16mi8_ND_ADC16mi_ND_ADC16mr_ND_ADC32mi8_ND_ADC32mi_ND_ADC32mr_ND_ADC64mi32_ND_ADC64mi8_ND_ADC64mr_ND_ADC8mi_ND_ADC8mr_ND_SBB16mi8_ND_SBB16mi_ND_SBB16mr_ND_SBB32mi8_ND_SBB32mi_ND_SBB32mr_ND_SBB64mi32_ND_SBB64mi8_ND_SBB64mr_ND_SBB8mi_ND_SBB8mr_ND = 924, |
| 23279 | ADC16mr_EVEX_ADC32mr_EVEX_ADC64mr_EVEX_ADC8mr_EVEX_SBB16mr_EVEX_SBB32mr_EVEX_SBB64mr_EVEX_SBB8mr_EVEX = 925, |
| 23280 | DEC16m_DEC16m_EVEX_DEC16m_NF_DEC32m_DEC32m_EVEX_DEC32m_NF_DEC64m_DEC64m_EVEX_DEC64m_NF_DEC8m_DEC8m_EVEX_DEC8m_NF_INC16m_INC16m_EVEX_INC16m_NF_INC32m_INC32m_EVEX_INC32m_NF_INC64m_INC64m_EVEX_INC64m_NF_INC8m_INC8m_EVEX_INC8m_NF_NEG16m_NEG16m_EVEX_NEG16m_NF_NEG32m_NEG32m_EVEX_NEG32m_NF_NEG64m_NEG64m_EVEX_NEG64m_NF_NEG8m_NEG8m_EVEX_NEG8m_NF_NOT16m_NOT16m_EVEX_NOT32m_NOT32m_EVEX_NOT64m_NOT64m_EVEX_NOT8m_NOT8m_EVEX = 926, |
| 23281 | DEC16m_ND_DEC16m_NF_ND_DEC32m_ND_DEC32m_NF_ND_DEC64m_ND_DEC64m_NF_ND_DEC8m_ND_DEC8m_NF_ND_INC16m_ND_INC16m_NF_ND_INC32m_ND_INC32m_NF_ND_INC64m_ND_INC64m_NF_ND_INC8m_ND_INC8m_NF_ND_NEG16m_ND_NEG16m_NF_ND_NEG32m_ND_NEG32m_NF_ND_NEG64m_ND_NEG64m_NF_ND_NEG8m_ND_NEG8m_NF_ND_NOT16m_ND_NOT32m_ND_NOT64m_ND_NOT8m_ND = 927, |
| 23282 | CALL16r_CALL16r_NT_CALL32r_CALL32r_NT = 928, |
| 23283 | RET16_LRET16_LRET32 = 929, |
| 23284 | IRET16_IRET32_IRET64 = 930, |
| 23285 | AND16mi_AND16mi8_AND16mi8_EVEX_AND16mi8_NF_AND16mi_EVEX_AND16mi_NF_AND32mi_AND32mi8_AND32mi8_EVEX_AND32mi8_NF_AND32mi_EVEX_AND32mi_NF_AND64mi32_AND64mi32_EVEX_AND64mi32_NF_AND64mi8_AND64mi8_EVEX_AND64mi8_NF_AND8mi_AND8mi8_AND8mi_EVEX_AND8mi_NF_OR16mi_OR16mi8_OR16mi8_EVEX_OR16mi8_NF_OR16mi_EVEX_OR16mi_NF_OR32mi_OR32mi8_OR32mi8Locked_OR32mi8_EVEX_OR32mi8_NF_OR32mi_EVEX_OR32mi_NF_OR64mi32_OR64mi32_EVEX_OR64mi32_NF_OR64mi8_OR64mi8_EVEX_OR64mi8_NF_OR8mi_OR8mi8_OR8mi_EVEX_OR8mi_NF_XOR16mi_XOR16mi8_XOR16mi8_EVEX_XOR16mi8_NF_XOR16mi_EVEX_XOR16mi_NF_XOR32mi_XOR32mi8_XOR32mi8_EVEX_XOR32mi8_NF_XOR32mi_EVEX_XOR32mi_NF_XOR64mi32_XOR64mi32_EVEX_XOR64mi32_NF_XOR64mi8_XOR64mi8_EVEX_XOR64mi8_NF_XOR8mi_XOR8mi8_XOR8mi_EVEX_XOR8mi_NF = 931, |
| 23286 | AND16mi8_ND_AND16mi8_NF_ND_AND16mi_ND_AND16mi_NF_ND_AND16mr_ND_AND16mr_NF_ND_AND32mi8_ND_AND32mi8_NF_ND_AND32mi_ND_AND32mi_NF_ND_AND32mr_ND_AND32mr_NF_ND_AND64mi32_ND_AND64mi32_NF_ND_AND64mi8_ND_AND64mi8_NF_ND_AND64mr_ND_AND64mr_NF_ND_AND8mi_ND_AND8mi_NF_ND_AND8mr_ND_AND8mr_NF_ND_OR16mi8_ND_OR16mi8_NF_ND_OR16mi_ND_OR16mi_NF_ND_OR16mr_ND_OR16mr_NF_ND_OR32mi8_ND_OR32mi8_NF_ND_OR32mi_ND_OR32mi_NF_ND_OR32mr_ND_OR32mr_NF_ND_OR64mi32_ND_OR64mi32_NF_ND_OR64mi8_ND_OR64mi8_NF_ND_OR64mr_ND_OR64mr_NF_ND_OR8mi_ND_OR8mi_NF_ND_OR8mr_ND_OR8mr_NF_ND_XOR16mi8_ND_XOR16mi8_NF_ND_XOR16mi_ND_XOR16mi_NF_ND_XOR16mr_ND_XOR16mr_NF_ND_XOR32mi8_ND_XOR32mi8_NF_ND_XOR32mi_ND_XOR32mi_NF_ND_XOR32mr_ND_XOR32mr_NF_ND_XOR64mi32_ND_XOR64mi32_NF_ND_XOR64mi8_ND_XOR64mi8_NF_ND_XOR64mr_ND_XOR64mr_NF_ND_XOR8mi_ND_XOR8mi_NF_ND_XOR8mr_ND_XOR8mr_NF_ND = 932, |
| 23287 | AND16mr_AND16mr_EVEX_AND32mr_AND32mr_EVEX_AND64mr_AND64mr_EVEX_AND8mr_AND8mr_EVEX_OR16mr_OR16mr_EVEX_OR32mr_OR32mr_EVEX_OR64mr_OR64mr_EVEX_OR8mr_OR8mr_EVEX_XOR16mr_XOR16mr_EVEX_XOR32mr_XOR32mr_EVEX_XOR64mr_XOR64mr_EVEX_XOR8mr_XOR8mr_EVEX = 933, |
| 23288 | AND16mr_NF_AND32mr_NF_AND64mr_NF_AND8mr_NF_OR16mr_NF_OR32mr_NF_OR64mr_NF_OR8mr_NF_XOR16mr_NF_XOR32mr_NF_XOR64mr_NF_XOR8mr_NF = 934, |
| 23289 | SHLD16mri8_EVEX_SHLD16mri8_ND_SHLD16mri8_NF_SHLD16mri8_NF_ND_SHLD32mri8_SHLD32mri8_EVEX_SHLD32mri8_ND_SHLD32mri8_NF_SHLD32mri8_NF_ND_SHLD64mri8_EVEX_SHLD64mri8_ND_SHLD64mri8_NF_SHLD64mri8_NF_ND_SHRD16mri8_EVEX_SHRD16mri8_ND_SHRD16mri8_NF_SHRD16mri8_NF_ND_SHRD32mri8_SHRD32mri8_EVEX_SHRD32mri8_ND_SHRD32mri8_NF_SHRD32mri8_NF_ND_SHRD64mri8_EVEX_SHRD64mri8_ND_SHRD64mri8_NF_SHRD64mri8_NF_ND = 935, |
| 23290 | SHLD16rrCL_EVEX_SHLD16rrCL_ND_SHLD16rrCL_NF_SHLD16rrCL_NF_ND_SHLD32rrCL_SHLD32rrCL_EVEX_SHLD32rrCL_ND_SHLD32rrCL_NF_SHLD32rrCL_NF_ND_SHLD64rrCL_EVEX_SHLD64rrCL_ND_SHLD64rrCL_NF_SHLD64rrCL_NF_ND_SHRD16rrCL_EVEX_SHRD16rrCL_ND_SHRD16rrCL_NF_SHRD16rrCL_NF_ND_SHRD32rrCL_SHRD32rrCL_EVEX_SHRD32rrCL_ND_SHRD32rrCL_NF_SHRD32rrCL_NF_ND_SHRD64rrCL_EVEX_SHRD64rrCL_ND_SHRD64rrCL_NF_SHRD64rrCL_NF_ND = 936, |
| 23291 | SHLD16mrCL_EVEX_SHLD16mrCL_ND_SHLD16mrCL_NF_SHLD16mrCL_NF_ND_SHLD32mrCL_SHLD32mrCL_EVEX_SHLD32mrCL_ND_SHLD32mrCL_NF_SHLD32mrCL_NF_ND_SHLD64mrCL_EVEX_SHLD64mrCL_ND_SHLD64mrCL_NF_SHLD64mrCL_NF_ND_SHRD16mrCL_EVEX_SHRD16mrCL_ND_SHRD16mrCL_NF_SHRD16mrCL_NF_ND_SHRD32mrCL_SHRD32mrCL_EVEX_SHRD32mrCL_ND_SHRD32mrCL_NF_SHRD32mrCL_NF_ND_SHRD64mrCL_EVEX_SHRD64mrCL_ND_SHRD64mrCL_NF_SHRD64mrCL_NF_ND = 937, |
| 23292 | XADD16rr_XADD32rr_XADD64rr_XADD8rr = 938, |
| 23293 | CHS_F_CHS_Fp32_CHS_Fp64_CHS_Fp80 = 939, |
| 23294 | MMX_MASKMOVQ_MMX_MASKMOVQ64 = 940, |
| 23295 | MASKMOVDQU_MASKMOVDQU64 = 941, |
| 23296 | VMASKMOVDQU_VMASKMOVDQU64 = 942, |
| 23297 | VPMASKMOVDYrm = 943, |
| 23298 | VPMASKMOVDrm = 944, |
| 23299 | VPMASKMOVDYmr = 945, |
| 23300 | VPMASKMOVDmr = 946, |
| 23301 | VPMASKMOVQYmr = 947, |
| 23302 | VPMASKMOVQmr = 948, |
| 23303 | VPBROADCASTBrm_VPBROADCASTWrm = 949, |
| 23304 | VPGATHERDDYrm = 950, |
| 23305 | VPGATHERDDrm = 951, |
| 23306 | VPGATHERDQYrm = 952, |
| 23307 | VPGATHERDQrm = 953, |
| 23308 | VPGATHERQDYrm = 954, |
| 23309 | VPGATHERQDrm = 955, |
| 23310 | VPGATHERQQYrm = 956, |
| 23311 | VPGATHERQQrm = 957, |
| 23312 | VPERM2F128rri = 958, |
| 23313 | VPERM2I128rri = 959, |
| 23314 | VPERM2F128rmi = 960, |
| 23315 | VPERM2I128rmi = 961, |
| 23316 | VBROADCASTF128rm = 962, |
| 23317 | VEXTRACTF128rri = 963, |
| 23318 | VEXTRACTI128rri = 964, |
| 23319 | VEXTRACTF128mri = 965, |
| 23320 | VEXTRACTI128mri = 966, |
| 23321 | VINSERTF128rri = 967, |
| 23322 | VINSERTI128rri = 968, |
| 23323 | CVTDQ2PDrr_VCVTDQ2PDrr = 969, |
| 23324 | VCVTDQ2PDYrr = 970, |
| 23325 | CVTPD2DQrr_CVTTPD2DQrr_VCVTPD2DQrr_VCVTTPD2DQrr = 971, |
| 23326 | CVTPD2DQrm_CVTTPD2DQrm_VCVTPD2DQrm_VCVTTPD2DQrm = 972, |
| 23327 | VCVTPD2DQYrr_VCVTTPD2DQYrr = 973, |
| 23328 | VCVTPD2DQYrm_VCVTTPD2DQYrm = 974, |
| 23329 | MMX_CVTPI2PDrr = 975, |
| 23330 | MMX_CVTPD2PIrr_MMX_CVTTPD2PIrr = 976, |
| 23331 | CVTSS2SIrr_CVTTSS2SIrr_VCVTSS2SI64rr_VCVTSS2SIrr_VCVTTSS2SI64rr_VCVTTSS2SIrr = 977, |
| 23332 | CVTSS2SIrr_Int_CVTTSS2SIrr_Int_VCVTSS2SI64rr_Int_VCVTSS2SIrr_Int_VCVTTSS2SI64rr_Int_VCVTTSS2SIrr_Int = 978, |
| 23333 | CVTSS2SIrm_CVTSS2SIrm_Int_CVTTSS2SIrm_CVTTSS2SIrm_Int_VCVTSS2SI64rm_VCVTSS2SI64rm_Int_VCVTSS2SIrm_VCVTSS2SIrm_Int_VCVTTSS2SI64rm_VCVTTSS2SI64rm_Int_VCVTTSS2SIrm_VCVTTSS2SIrm_Int = 979, |
| 23334 | CVTSI2SDrr_CVTSI642SDrr = 980, |
| 23335 | CVTSI2SDrr_Int_CVTSI642SDrr_Int_VCVTSI2SDrr_VCVTSI2SDrr_Int_VCVTSI642SDrr_VCVTSI642SDrr_Int = 981, |
| 23336 | CVTSD2SI64rr_CVTSD2SIrr_CVTTSD2SI64rr_CVTTSD2SIrr_VCVTSD2SI64rr_VCVTSD2SIrr_VCVTTSD2SI64rr_VCVTTSD2SIrr = 982, |
| 23337 | CVTSD2SI64rr_Int_CVTSD2SIrr_Int_CVTTSD2SI64rr_Int_CVTTSD2SIrr_Int_VCVTSD2SI64rr_Int_VCVTSD2SIrr_Int = 983, |
| 23338 | VCVTTSD2SI64rr_Int_VCVTTSD2SIrr_Int = 984, |
| 23339 | CVTSD2SI64rm_CVTSD2SI64rm_Int_CVTSD2SIrm_CVTSD2SIrm_Int_CVTTSD2SI64rm_CVTTSD2SI64rm_Int_CVTTSD2SIrm_CVTTSD2SIrm_Int_VCVTSD2SI64rm_VCVTSD2SI64rm_Int_VCVTSD2SIrm_VCVTSD2SIrm_Int_VCVTTSD2SI64rm_VCVTTSD2SIrm = 985, |
| 23340 | VCVTTSD2SI64rm_Int_VCVTTSD2SIrm_Int = 986, |
| 23341 | EXTRQ_EXTRQI = 987, |
| 23342 | INSERTQ_INSERTQI = 988, |
| 23343 | SHA256MSG2rm = 989, |
| 23344 | SHA256MSG2rr = 990, |
| 23345 | SHA1MSG1rr_SHA256MSG1rr = 991, |
| 23346 | SHA1MSG1rm_SHA256MSG1rm = 992, |
| 23347 | SHA1MSG2rr = 993, |
| 23348 | SHA1MSG2rm = 994, |
| 23349 | SHA1NEXTErr = 995, |
| 23350 | SHA1NEXTErm = 996, |
| 23351 | SHA1RNDS4rri = 997, |
| 23352 | SHA1RNDS4rmi = 998, |
| 23353 | SHA256RNDS2rr = 999, |
| 23354 | SHA256RNDS2rm = 1000, |
| 23355 | XCHG16rr_XCHG32rr_XCHG64rr_XCHG8rr_XCHG16ar_XCHG32ar_XCHG64ar = 1001, |
| 23356 | CVTDQ2PSrr_VCVTDQ2PSrr = 1002, |
| 23357 | VCVTDQ2PSYrr = 1003, |
| 23358 | CVTPS2DQrr_CVTTPS2DQrr_VCVTPS2DQrr_VCVTTPS2DQrr = 1004, |
| 23359 | MOV8rm_MOV8rm_NOREX_MOVSX16rm16_MOVSX16rm32_MOVZX16rm16 = 1005, |
| 23360 | MOVBE16rm = 1006, |
| 23361 | MOVBE32mr_MOVBE64mr = 1007, |
| 23362 | ADD8i8_ADD16i16_ADD32i32_ADD64i32_AND8i8_AND16i16_AND32i32_AND64i32_OR8i8_OR16i16_OR32i32_OR64i32_SUB8i8_SUB16i16_SUB32i32_SUB64i32_XOR8i8_XOR16i16_XOR32i32_XOR64i32 = 1008, |
| 23363 | MOVSX16rr16_MOVSX16rr32_MOVZX16rr16 = 1009, |
| 23364 | MOV32ri_MOV32ri_alt_MOV64ri32 = 1010, |
| 23365 | PDEP32rr_PDEP64rr_PEXT32rr_PEXT64rr = 1011, |
| 23366 | ADC8mr_SBB8mr = 1012, |
| 23367 | LEA32r_LEA64r_LEA64_32r = 1013, |
| 23368 | LEA16r = 1014, |
| 23369 | LCMPXCHG8 = 1015, |
| 23370 | LCMPXCHG16B = 1016, |
| 23371 | XCHG8rr_XCHG16rr_XCHG16ar = 1017, |
| 23372 | XCHG8rm_XCHG16rm = 1018, |
| 23373 | POPCNT16rr = 1019, |
| 23374 | LZCNT16rr = 1020, |
| 23375 | TZCNT16rr = 1021, |
| 23376 | RCL8m1_RCL16m1_RCL32m1_RCL64m1_RCR8m1_RCR16m1_RCR32m1_RCR64m1 = 1022, |
| 23377 | RCR8mi_RCR16mi_RCR32mi_RCR64mi = 1023, |
| 23378 | RCL8mi_RCL16mi_RCL32mi_RCL64mi = 1024, |
| 23379 | RCR16rCL_RCR32rCL_RCR64rCL = 1025, |
| 23380 | RCR8mCL_RCR16mCL_RCR32mCL_RCR64mCL = 1026, |
| 23381 | RCL16rCL_RCL32rCL_RCL64rCL = 1027, |
| 23382 | RCL8mCL_RCL16mCL_RCL32mCL_RCL64mCL = 1028, |
| 23383 | MOVHPDmr_MOVHPSmr_VMOVHPDmr_VMOVHPSmr = 1029, |
| 23384 | MMX_MOVQ2FR64rr_MMX_MOVQ2DQrr = 1030, |
| 23385 | MMX_MOVD64rr_MMX_MOVD64to64rr = 1031, |
| 23386 | EXTRQ = 1032, |
| 23387 | INSERTQ = 1033, |
| 23388 | PABSBrr_PABSDrr_PABSWrr_PADDSBrr_PADDSWrr_PADDUSBrr_PADDUSWrr_PAVGBrr_PAVGWrr_PSIGNBrr_PSIGNDrr_PSIGNWrr_VPABSBrr_VPABSDrr_VPABSWrr_VPADDSBrr_VPADDSWrr_VPADDUSBrr_VPADDUSWrr_VPAVGBrr_VPAVGWrr_VPCMPEQQrr_VPSIGNBrr_VPSIGNDrr_VPSIGNWrr_PSUBSBrr_PSUBSWrr_PSUBUSBrr_PSUBUSWrr_VPSUBSBrr_VPSUBSWrr_VPSUBUSBrr_VPSUBUSWrr = 1034, |
| 23389 | MMX_PADDSBrr_MMX_PADDSWrr_MMX_PADDUSBrr_MMX_PADDUSWrr_MMX_PAVGBrr_MMX_PAVGWrr_MMX_PSUBSBrr_MMX_PSUBSWrr_MMX_PSUBUSBrr_MMX_PSUBUSWrr = 1035, |
| 23390 | VPABSBYrr_VPABSDYrr_VPABSWYrr_VPADDSBYrr_VPADDSWYrr_VPADDUSBYrr_VPADDUSWYrr_VPSUBSBYrr_VPSUBSWYrr_VPSUBUSBYrr_VPSUBUSWYrr_VPAVGBYrr_VPAVGWYrr_VPCMPEQQYrr_VPSIGNBYrr_VPSIGNDYrr_VPSIGNWYrr = 1036, |
| 23391 | MMX_CVTPD2PIrm_MMX_CVTTPD2PIrm = 1037, |
| 23392 | MMX_CVTPI2PDrm = 1038, |
| 23393 | SHA1MSG1rr = 1039, |
| 23394 | SHA1MSG1rm = 1040, |
| 23395 | VPERMPSYrm = 1041, |
| 23396 | VPERMPDYri = 1042, |
| 23397 | VPERMQYri = 1043, |
| 23398 | VPERMPDYmi = 1044, |
| 23399 | VPERMQYmi = 1045, |
| 23400 | VPERMDYrm = 1046, |
| 23401 | SFENCE = 1047, |
| 23402 | MOV32rr_MOV32rr_REV_MOV64rr_MOV64rr_REV = 1048, |
| 23403 | MOVSX32rr32 = 1049, |
| 23404 | XOR32rr_REV_XOR64rr_REV_SUB32rr_REV_SUB64rr_REV = 1050, |
| 23405 | CMP8rr_CMP8rr_REV_CMP16rr_CMP16rr_REV_CMP32rr_CMP32rr_REV_CMP64rr_CMP64rr_REV = 1051, |
| 23406 | VXORPSrr_VXORPDrr = 1052, |
| 23407 | VANDNPSrr_VANDNPDrr = 1053, |
| 23408 | VANDNPSYrr_VANDNPDYrr = 1054, |
| 23409 | VPXORrr = 1055, |
| 23410 | VPANDNrr = 1056, |
| 23411 | VPANDNYrr = 1057, |
| 23412 | VPSUBBrr_VPSUBWrr_VPSUBDrr_VPSUBQrr_VPCMPGTBrr_VPCMPGTWrr_VPCMPGTDrr = 1058, |
| 23413 | KADDBkk_KADDDkk_KADDQkk_KADDWkk_KANDBkk_KANDDkk_KANDQkk_KANDWkk_KANDNBkk_KANDNDkk_KANDNQkk_KANDNWkk_KNOTBkk_KNOTDkk_KNOTQkk_KNOTWkk_KORBkk_KORDkk_KORQkk_KORWkk_KORTESTBkk_KORTESTDkk_KORTESTQkk_KORTESTWkk_KTESTBkk_KTESTDkk_KTESTQkk_KTESTWkk_KXNORBkk_KXNORDkk_KXNORQkk_KXNORWkk_KXORBkk_KXORDkk_KXORQkk_KXORWkk = 1059, |
| 23414 | KMOVBkk_KMOVDkk_KMOVQkk_KMOVWkk_KMOVBrk_KMOVDrk_KMOVQrk_KMOVWrk = 1060, |
| 23415 | KUNPCKBWkk_KUNPCKDQkk_KUNPCKWDkk = 1061, |
| 23416 | KMOVBmk_KMOVDmk_KMOVQmk_KMOVWmk = 1062, |
| 23417 | KMOVBkr_KMOVDkr_KMOVQkr_KMOVWkr = 1063, |
| 23418 | VALIGNDZrri_VALIGNQZrri = 1064, |
| 23419 | VALIGNDZ128rri_VALIGNQZ128rri = 1065, |
| 23420 | VALIGNDZ256rri_VALIGNQZ256rri = 1066, |
| 23421 | VPERMPSYrr = 1067, |
| 23422 | VPERMDYrr = 1068, |
| 23423 | VFIXUPIMMPDZ128rrik_VFIXUPIMMPDZ128rrikz_VFIXUPIMMPSZ128rrik_VFIXUPIMMPSZ128rrikz_VFIXUPIMMPDZ128rri_VFIXUPIMMPSZ128rri_VRANGEPDZ128rri_VRANGEPDZ128rrik_VRANGEPDZ128rrikz_VRANGEPSZ128rri_VRANGEPSZ128rrik_VRANGEPSZ128rrikz_VRANGESDZrri_VRANGESDZrrib_VRANGESDZrribk_VRANGESDZrribkz_VRANGESDZrrik_VRANGESDZrrikz_VRANGESSZrri_VRANGESSZrrib_VRANGESSZrribk_VRANGESSZrribkz_VRANGESSZrrik_VRANGESSZrrikz = 1069, |
| 23424 | VFIXUPIMMPDZ256rrik_VFIXUPIMMPDZ256rrikz_VFIXUPIMMPSZ256rrik_VFIXUPIMMPSZ256rrikz_VFIXUPIMMPDZ256rri_VFIXUPIMMPSZ256rri_VRANGEPDZ256rri_VRANGEPDZ256rrik_VRANGEPDZ256rrikz_VRANGEPSZ256rri_VRANGEPSZ256rrik_VRANGEPSZ256rrikz = 1070, |
| 23425 | VFIXUPIMMPDZrrik_VFIXUPIMMPDZrrikz_VFIXUPIMMPSZrrik_VFIXUPIMMPSZrrikz_VRANGEPDZrri_VRANGEPDZrrib_VRANGEPDZrribk_VRANGEPDZrribkz_VRANGEPDZrrik_VRANGEPDZrrikz_VRANGEPSZrri_VRANGEPSZrrib_VRANGEPSZrribk_VRANGEPSZrribkz_VRANGEPSZrrik_VRANGEPSZrrikz = 1071, |
| 23426 | VFIXUPIMMSDZrrik_VFIXUPIMMSDZrrikz_VFIXUPIMMSSZrrik_VFIXUPIMMSSZrrikz = 1072, |
| 23427 | VSCALEFSDZrrb_Int_VSCALEFSSZrrb_Int = 1073, |
| 23428 | VREDUCEPDZ128rri_VREDUCEPDZ128rrik_VREDUCEPDZ128rrikz_VREDUCEPSZ128rri_VREDUCEPSZ128rrik_VREDUCEPSZ128rrikz_VREDUCESDZrri_VREDUCESDZrrib_VREDUCESDZrribk_VREDUCESDZrribkz_VREDUCESDZrrik_VREDUCESDZrrikz_VREDUCESSZrri_VREDUCESSZrrib_VREDUCESSZrribk_VREDUCESSZrribkz_VREDUCESSZrrik_VREDUCESSZrrikz = 1074, |
| 23429 | VREDUCEPDZrri_VREDUCEPDZrrib_VREDUCEPDZrribk_VREDUCEPDZrribkz_VREDUCEPDZrrik_VREDUCEPDZrrikz_VREDUCEPSZrri_VREDUCEPSZrrib_VREDUCEPSZrribk_VREDUCEPSZrribkz_VREDUCEPSZrrik_VREDUCEPSZrrikz = 1075, |
| 23430 | VDPBF16PSZ128r_VDPBF16PSZ128rk_VDPBF16PSZ128rkz = 1076, |
| 23431 | VDPBF16PSZ256r_VDPBF16PSZ256rk_VDPBF16PSZ256rkz = 1077, |
| 23432 | VDPBF16PSZr_VDPBF16PSZrk_VDPBF16PSZrkz = 1078, |
| 23433 | VPDPBUSDSZ128r_VPDPBUSDSZ128rk_VPDPBUSDSZ128rkz_VPDPBUSDZ128r_VPDPBUSDZ128rk_VPDPBUSDZ128rkz_VPDPWSSDSZ128r_VPDPWSSDSZ128rk_VPDPWSSDSZ128rkz_VPDPWSSDZ128r_VPDPWSSDZ128rk_VPDPWSSDZ128rkz_VPMADD52HUQZ128r_VPMADD52HUQZ128rk_VPMADD52HUQZ128rkz_VPMADD52LUQZ128r_VPMADD52LUQZ128rk_VPMADD52LUQZ128rkz = 1079, |
| 23434 | VPDPBUSDSZ256r_VPDPBUSDSZ256rk_VPDPBUSDSZ256rkz_VPDPBUSDZ256r_VPDPBUSDZ256rk_VPDPBUSDZ256rkz_VPDPWSSDSZ256r_VPDPWSSDSZ256rk_VPDPWSSDSZ256rkz_VPDPWSSDZ256r_VPDPWSSDZ256rk_VPDPWSSDZ256rkz_VPMADD52HUQZ256r_VPMADD52HUQZ256rk_VPMADD52HUQZ256rkz_VPMADD52LUQZ256r_VPMADD52LUQZ256rk_VPMADD52LUQZ256rkz = 1080, |
| 23435 | VPDPBUSDSZr_VPDPBUSDSZrk_VPDPBUSDSZrkz_VPDPBUSDZr_VPDPBUSDZrk_VPDPBUSDZrkz_VPDPWSSDSZr_VPDPWSSDSZrk_VPDPWSSDSZrkz_VPDPWSSDZr_VPDPWSSDZrk_VPDPWSSDZrkz_VPMADD52HUQZr_VPMADD52HUQZrk_VPMADD52HUQZrkz_VPMADD52LUQZr_VPMADD52LUQZrk_VPMADD52LUQZrkz = 1081, |
| 23436 | VPLZCNTDZ128rr_VPLZCNTDZ128rrk_VPLZCNTDZ128rrkz_VPLZCNTQZ128rr_VPLZCNTQZ128rrk_VPLZCNTQZ128rrkz_VPSHLDDZ128rri_VPSHLDDZ128rrik_VPSHLDDZ128rrikz_VPSHLDQZ128rri_VPSHLDQZ128rrik_VPSHLDQZ128rrikz_VPSHLDVDZ128rk_VPSHLDVDZ128rkz_VPSHLDVQZ128rk_VPSHLDVQZ128rkz_VPSHLDVWZ128rk_VPSHLDVWZ128rkz_VPSHLDWZ128rri_VPSHLDWZ128rrik_VPSHLDWZ128rrikz_VPSHRDDZ128rri_VPSHRDDZ128rrik_VPSHRDDZ128rrikz_VPSHRDQZ128rri_VPSHRDQZ128rrik_VPSHRDQZ128rrikz_VPSHRDVDZ128rk_VPSHRDVDZ128rkz_VPSHRDVQZ128rk_VPSHRDVQZ128rkz_VPSHRDVWZ128rk_VPSHRDVWZ128rkz_VPSHRDWZ128rri_VPSHRDWZ128rrik_VPSHRDWZ128rrikz_VPSHUFBITQMBZ128rr_VPSHUFBITQMBZ128rrk = 1082, |
| 23437 | VPLZCNTDZ256rr_VPLZCNTDZ256rrk_VPLZCNTDZ256rrkz_VPLZCNTQZ256rr_VPLZCNTQZ256rrk_VPLZCNTQZ256rrkz_VPSHLDDZ256rri_VPSHLDDZ256rrik_VPSHLDDZ256rrikz_VPSHLDQZ256rri_VPSHLDQZ256rrik_VPSHLDQZ256rrikz_VPSHLDVDZ256rk_VPSHLDVDZ256rkz_VPSHLDVQZ256rk_VPSHLDVQZ256rkz_VPSHLDVWZ256rk_VPSHLDVWZ256rkz_VPSHLDWZ256rri_VPSHLDWZ256rrik_VPSHLDWZ256rrikz_VPSHRDDZ256rri_VPSHRDDZ256rrik_VPSHRDDZ256rrikz_VPSHRDQZ256rri_VPSHRDQZ256rrik_VPSHRDQZ256rrikz_VPSHRDVDZ256rk_VPSHRDVDZ256rkz_VPSHRDVQZ256rk_VPSHRDVQZ256rkz_VPSHRDVWZ256rk_VPSHRDVWZ256rkz_VPSHRDWZ256rri_VPSHRDWZ256rrik_VPSHRDWZ256rrikz = 1083, |
| 23438 | VPLZCNTDZrr_VPLZCNTDZrrk_VPLZCNTDZrrkz_VPLZCNTQZrr_VPLZCNTQZrrk_VPLZCNTQZrrkz_VPSHLDDZrri_VPSHLDDZrrik_VPSHLDDZrrikz_VPSHLDQZrri_VPSHLDQZrrik_VPSHLDQZrrikz_VPSHLDVDZrk_VPSHLDVDZrkz_VPSHLDVQZrk_VPSHLDVQZrkz_VPSHLDVWZrk_VPSHLDVWZrkz_VPSHLDWZrri_VPSHLDWZrrik_VPSHLDWZrrikz_VPSHRDDZrri_VPSHRDDZrrik_VPSHRDDZrrikz_VPSHRDQZrri_VPSHRDQZrrik_VPSHRDQZrrikz_VPSHRDVDZrk_VPSHRDVDZrkz_VPSHRDVQZrk_VPSHRDVQZrkz_VPSHRDVWZrk_VPSHRDVWZrkz_VPSHRDWZrri_VPSHRDWZrrik_VPSHRDWZrrikz = 1084, |
| 23439 | PSLLDrr_PSLLQrr_PSLLWrr_PSRADrr_PSRAWrr_PSRLDrr_PSRLQrr_PSRLWrr_VPSLLDZ128rr_VPSLLDZ128rrk_VPSLLDZ128rrkz_VPSLLDrr_VPSLLQZ128rr_VPSLLQZ128rrk_VPSLLQZ128rrkz_VPSLLQrr_VPSLLWZ128rr_VPSLLWZ128rrk_VPSLLWZ128rrkz_VPSLLWrr_VPSRADZ128rr_VPSRADZ128rrk_VPSRADZ128rrkz_VPSRADrr_VPSRAQZ128rr_VPSRAQZ128rrk_VPSRAQZ128rrkz_VPSRAWZ128rr_VPSRAWZ128rrk_VPSRAWZ128rrkz_VPSRAWrr_VPSRLDZ128rr_VPSRLDZ128rrk_VPSRLDZ128rrkz_VPSRLDrr_VPSRLQZ128rr_VPSRLQZ128rrk_VPSRLQZ128rrkz_VPSRLQrr_VPSRLWZ128rr_VPSRLWZ128rrk_VPSRLWZ128rrkz_VPSRLWrr = 1085, |
| 23440 | VPSLLDYrr_VPSLLDZ256rr_VPSLLDZ256rrk_VPSLLDZ256rrkz_VPSLLQYrr_VPSLLQZ256rr_VPSLLQZ256rrk_VPSLLQZ256rrkz_VPSLLWYrr_VPSLLWZ256rr_VPSLLWZ256rrk_VPSLLWZ256rrkz_VPSRADYrr_VPSRADZ256rr_VPSRADZ256rrk_VPSRADZ256rrkz_VPSRAQZ256rr_VPSRAQZ256rrk_VPSRAQZ256rrkz_VPSRAWYrr_VPSRAWZ256rr_VPSRAWZ256rrk_VPSRAWZ256rrkz_VPSRLDYrr_VPSRLDZ256rr_VPSRLDZ256rrk_VPSRLDZ256rrkz_VPSRLQYrr_VPSRLQZ256rr_VPSRLQZ256rrk_VPSRLQZ256rrkz_VPSRLWYrr_VPSRLWZ256rr_VPSRLWZ256rrk_VPSRLWZ256rrkz = 1086, |
| 23441 | VPSLLDZrr_VPSLLDZrrk_VPSLLDZrrkz_VPSLLQZrr_VPSLLQZrrk_VPSLLQZrrkz_VPSLLWZrr_VPSLLWZrrk_VPSLLWZrrkz_VPSRADZrr_VPSRADZrrk_VPSRADZrrkz_VPSRAQZrr_VPSRAQZrrk_VPSRAQZrrkz_VPSRAWZrr_VPSRAWZrrk_VPSRAWZrrkz_VPSRLDZrr_VPSRLDZrrk_VPSRLDZrrkz_VPSRLQZrr_VPSRLQZrrk_VPSRLQZrrkz_VPSRLWZrr_VPSRLWZrrk_VPSRLWZrrkz = 1087, |
| 23442 | VPSLLDQYri_VPSRLDQYri_VPSLLDQZ256ri_VPSRLDQZ256ri = 1088, |
| 23443 | PSLLDQri_PSRLDQri_VPSLLDQri_VPSRLDQri = 1089, |
| 23444 | VPSLLDQZri_VPSRLDQZri = 1090, |
| 23445 | VPSHUFBYrr_VPSHUFBZ256rr_VPSHUFBZ256rrk_VPSHUFBZ256rrkz = 1091, |
| 23446 | VPSHUFBZ128rr_VPSHUFBZ128rrk_VPSHUFBZ128rrkz = 1092, |
| 23447 | VPSHUFBZrr_VPSHUFBZrrk_VPSHUFBZrrkz = 1093, |
| 23448 | VPROLVDZ128rr_VPROLVDZ128rrk_VPROLVDZ128rrkz_VPROLVQZ128rr_VPROLVQZ128rrk_VPROLVQZ128rrkz_VPRORVDZ128rr_VPRORVDZ128rrk_VPRORVDZ128rrkz_VPRORVQZ128rr_VPRORVQZ128rrk_VPRORVQZ128rrkz = 1094, |
| 23449 | VPROLVDZ256rr_VPROLVDZ256rrk_VPROLVDZ256rrkz_VPROLVQZ256rr_VPROLVQZ256rrk_VPROLVQZ256rrkz_VPRORVDZ256rr_VPRORVDZ256rrk_VPRORVDZ256rrkz_VPRORVQZ256rr_VPRORVQZ256rrk_VPRORVQZ256rrkz = 1095, |
| 23450 | VPROLVDZrr_VPROLVDZrrk_VPROLVDZrrkz_VPROLVQZrr_VPROLVQZrrk_VPROLVQZrrkz_VPRORVDZrr_VPRORVDZrrk_VPRORVDZrrkz_VPRORVQZrr_VPRORVQZrrk_VPRORVQZrrkz = 1096, |
| 23451 | VPROLDZ256ri_VPROLDZ256rik_VPROLDZ256rikz_VPROLQZ256ri_VPROLQZ256rik_VPROLQZ256rikz_VPRORDZ256ri_VPRORDZ256rik_VPRORDZ256rikz_VPRORQZ256ri_VPRORQZ256rik_VPRORQZ256rikz = 1097, |
| 23452 | VPROLDZ128ri_VPROLDZ128rik_VPROLDZ128rikz_VPROLQZ128ri_VPROLQZ128rik_VPROLQZ128rikz_VPRORDZ128ri_VPRORDZ128rik_VPRORDZ128rikz_VPRORQZ128ri_VPRORQZ128rik_VPRORQZ128rikz = 1098, |
| 23453 | VPROLDZri_VPROLDZrik_VPROLDZrikz_VPROLQZri_VPROLQZrik_VPROLQZrikz_VPRORDZri_VPRORDZrik_VPRORDZrikz_VPRORQZri_VPRORQZrik_VPRORQZrikz = 1099, |
| 23454 | VFMSUB231SSZrkz_Int = 1100, |
| 23455 | VPSLLDZ128ri_VPSLLDZ128rik_VPSLLDZ128rikz_VPSLLQZ128ri_VPSLLQZ128rik_VPSLLQZ128rikz_VPSLLWZ128ri_VPSLLWZ128rik_VPSLLWZ128rikz_VPSRADZ128ri_VPSRADZ128rik_VPSRADZ128rikz_VPSRAQZ128ri_VPSRAQZ128rik_VPSRAQZ128rikz_VPSRAWZ128ri_VPSRAWZ128rik_VPSRAWZ128rikz_VPSRLDZ128ri_VPSRLDZ128rik_VPSRLDZ128rikz_VPSRLQZ128ri_VPSRLQZ128rik_VPSRLQZ128rikz_VPSRLWZ128ri_VPSRLWZ128rik_VPSRLWZ128rikz = 1101, |
| 23456 | VPSLLDZ256ri_VPSLLDZ256rik_VPSLLDZ256rikz_VPSLLQZ256ri_VPSLLQZ256rik_VPSLLQZ256rikz_VPSLLWZ256ri_VPSLLWZ256rik_VPSLLWZ256rikz_VPSRADZ256ri_VPSRADZ256rik_VPSRADZ256rikz_VPSRAQZ256ri_VPSRAQZ256rik_VPSRAQZ256rikz_VPSRAWZ256ri_VPSRAWZ256rik_VPSRAWZ256rikz_VPSRLDZ256ri_VPSRLDZ256rik_VPSRLDZ256rikz_VPSRLQZ256ri_VPSRLQZ256rik_VPSRLQZ256rikz_VPSRLWZ256ri_VPSRLWZ256rik_VPSRLWZ256rikz = 1102, |
| 23457 | VPSLLDZri_VPSLLDZrik_VPSLLDZrikz_VPSLLQZri_VPSLLQZrik_VPSLLQZrikz_VPSLLWZri_VPSLLWZrik_VPSLLWZrikz_VPSRADZri_VPSRADZrik_VPSRADZrikz_VPSRAQZri_VPSRAQZrik_VPSRAQZrikz_VPSRAWZri_VPSRAWZrik_VPSRAWZrikz_VPSRLDZri_VPSRLDZrik_VPSRLDZrikz_VPSRLQZri_VPSRLQZrik_VPSRLQZrikz_VPSRLWZri_VPSRLWZrik_VPSRLWZrikz = 1103, |
| 23458 | PALIGNRrri_VPALIGNRZ128rri_VPALIGNRZ128rrik_VPALIGNRZ128rrikz_VPALIGNRrri = 1104, |
| 23459 | VPALIGNRZ256rri_VPALIGNRZ256rrik_VPALIGNRZ256rrikz = 1105, |
| 23460 | VPALIGNRZrri_VPALIGNRZrrik_VPALIGNRZrrikz = 1106, |
| 23461 | PACKSSDWrr_PACKSSWBrr_PACKUSDWrr_PACKUSWBrr_VPACKSSDWZ128rr_VPACKSSDWZ128rrk_VPACKSSDWZ128rrkz_VPACKSSDWrr_VPACKSSWBZ128rr_VPACKSSWBZ128rrk_VPACKSSWBZ128rrkz_VPACKSSWBrr_VPACKUSDWZ128rr_VPACKUSDWZ128rrk_VPACKUSDWZ128rrkz_VPACKUSDWrr_VPACKUSWBZ128rr_VPACKUSWBZ128rrk_VPACKUSWBZ128rrkz_VPACKUSWBrr = 1107, |
| 23462 | VPACKSSDWZ256rr_VPACKSSDWZ256rrk_VPACKSSDWZ256rrkz_VPACKSSWBZ256rr_VPACKSSWBZ256rrk_VPACKSSWBZ256rrkz_VPACKUSDWZ256rr_VPACKUSDWZ256rrk_VPACKUSDWZ256rrkz_VPACKUSWBZ256rr_VPACKUSWBZ256rrk_VPACKUSWBZ256rrkz = 1108, |
| 23463 | VPACKSSDWZrr_VPACKSSDWZrrk_VPACKSSDWZrrkz_VPACKSSWBZrr_VPACKSSWBZrrk_VPACKSSWBZrrkz_VPACKUSDWZrr_VPACKUSDWZrrk_VPACKUSDWZrrkz_VPACKUSWBZrr_VPACKUSWBZrrk_VPACKUSWBZrrkz = 1109, |
| 23464 | CMPPDrri_VCMPPDrri_VMAXCPDZ128rr_VMAXCPDZ128rrk_VMAXCPDZ128rrkz_VMAXPDZ128rr_VMAXPDZ128rrk_VMAXPDZ128rrkz_VMINCPDZ128rr_VMINCPDZ128rrk_VMINCPDZ128rrkz_VMINPDZ128rr_VMINPDZ128rrk_VMINPDZ128rrkz = 1110, |
| 23465 | CMPPSrri_VCMPPSrri = 1111, |
| 23466 | CMPSDrri_CMPSDrri_Int_VCMPSDrri_VCMPSDrri_Int_MAXSDrr_Int_MINSDrr_Int_VMAXSDZrr_Int_VMAXSDZrrk_Int_VMAXSDZrrkz_Int_VMAXSDrr_Int_VMINSDZrr_Int_VMINSDZrrk_Int_VMINSDZrrkz_Int_VMINSDrr_Int = 1112, |
| 23467 | CMPSSrri_CMPSSrri_Int_VCMPSSrri_VCMPSSrri_Int_MAXSSrr_Int_MINSSrr_Int_VMAXSSZrr_Int_VMAXSSZrrk_Int_VMAXSSZrrkz_Int_VMAXSSrr_Int_VMINSSZrr_Int_VMINSSZrrk_Int_VMINSSZrrkz_Int_VMINSSrr_Int = 1113, |
| 23468 | VPMAXSQZ128rr_VPMAXSQZ128rrk_VPMAXSQZ128rrkz_VPMAXUQZ128rr_VPMAXUQZ128rrk_VPMAXUQZ128rrkz_VPMINSQZ128rr_VPMINSQZ128rrk_VPMINSQZ128rrkz_VPMINUQZ128rr_VPMINUQZ128rrk_VPMINUQZ128rrkz = 1114, |
| 23469 | VPMAXSQZ256rr_VPMAXSQZ256rrk_VPMAXSQZ256rrkz_VPMAXUQZ256rr_VPMAXUQZ256rrk_VPMAXUQZ256rrkz_VPMINSQZ256rr_VPMINSQZ256rrk_VPMINSQZ256rrkz_VPMINUQZ256rr_VPMINUQZ256rrk_VPMINUQZ256rrkz = 1115, |
| 23470 | VPMAXSQZrr_VPMAXSQZrrk_VPMAXSQZrrkz_VPMAXUQZrr_VPMAXUQZrrk_VPMAXUQZrrkz_VPMINSQZrr_VPMINSQZrrk_VPMINSQZrrkz_VPMINUQZrr_VPMINUQZrrk_VPMINUQZrrkz = 1116, |
| 23471 | VMAXCPDZ256rr_VMAXCPDZ256rrk_VMAXCPDZ256rrkz_VMAXPDZ256rr_VMAXPDZ256rrk_VMAXPDZ256rrkz_VMINCPDZ256rr_VMINCPDZ256rrk_VMINCPDZ256rrkz_VMINPDZ256rr_VMINPDZ256rrk_VMINPDZ256rrkz = 1117, |
| 23472 | VMAXCPDZrr_VMAXCPDZrrk_VMAXCPDZrrkz_VMAXPDZrr_VMAXPDZrrb_VMAXPDZrrbk_VMAXPDZrrbkz_VMAXPDZrrk_VMAXPDZrrkz_VMINCPDZrr_VMINCPDZrrk_VMINCPDZrrkz_VMINPDZrr_VMINPDZrrb_VMINPDZrrbk_VMINPDZrrbkz_VMINPDZrrk_VMINPDZrrkz = 1118, |
| 23473 | VMOVDDUPZ128rr_VMOVDDUPZ128rrk_VMOVDDUPZ128rrkz = 1119, |
| 23474 | VMOVDDUPZ256rr_VMOVDDUPZ256rrk_VMOVDDUPZ256rrkz = 1120, |
| 23475 | VMOVDDUPZrr_VMOVDDUPZrrk_VMOVDDUPZrrkz = 1121, |
| 23476 | PMOVSXBDrr_PMOVSXBQrr_PMOVSXBWrr_PMOVSXDQrr_PMOVSXWDrr_PMOVSXWQrr_PMOVZXBDrr_PMOVZXBQrr_PMOVZXBWrr_PMOVZXDQrr_PMOVZXWDrr_PMOVZXWQrr_VPMOVSXBDZ128rr_VPMOVSXBDZ128rrk_VPMOVSXBDZ128rrkz_VPMOVSXBDrr_VPMOVSXBQZ128rr_VPMOVSXBQZ128rrk_VPMOVSXBQZ128rrkz_VPMOVSXBQrr_VPMOVSXBWZ128rr_VPMOVSXBWZ128rrk_VPMOVSXBWZ128rrkz_VPMOVSXBWrr_VPMOVSXDQZ128rr_VPMOVSXDQZ128rrk_VPMOVSXDQZ128rrkz_VPMOVSXDQrr_VPMOVSXWDZ128rr_VPMOVSXWDZ128rrk_VPMOVSXWDZ128rrkz_VPMOVSXWDrr_VPMOVSXWQZ128rr_VPMOVSXWQZ128rrk_VPMOVSXWQZ128rrkz_VPMOVSXWQrr_VPMOVZXBDZ128rr_VPMOVZXBDZ128rrk_VPMOVZXBDZ128rrkz_VPMOVZXBDrr_VPMOVZXBQZ128rr_VPMOVZXBQZ128rrk_VPMOVZXBQZ128rrkz_VPMOVZXBQrr_VPMOVZXBWZ128rr_VPMOVZXBWZ128rrk_VPMOVZXBWZ128rrkz_VPMOVZXBWrr_VPMOVZXDQZ128rr_VPMOVZXDQZ128rrk_VPMOVZXDQZ128rrkz_VPMOVZXDQrr_VPMOVZXWDZ128rr_VPMOVZXWDZ128rrk_VPMOVZXWDZ128rrkz_VPMOVZXWDrr_VPMOVZXWQZ128rr_VPMOVZXWQZ128rrk_VPMOVZXWQZ128rrkz_VPMOVZXWQrr = 1122, |
| 23477 | VPMOVSXBDYrr_VPMOVSXBDZ256rr_VPMOVSXBDZ256rrk_VPMOVSXBDZ256rrkz_VPMOVSXBQYrr_VPMOVSXBQZ256rr_VPMOVSXBQZ256rrk_VPMOVSXBQZ256rrkz_VPMOVSXBWYrr_VPMOVSXBWZ256rr_VPMOVSXBWZ256rrk_VPMOVSXBWZ256rrkz_VPMOVSXDQYrr_VPMOVSXDQZ256rr_VPMOVSXDQZ256rrk_VPMOVSXDQZ256rrkz_VPMOVSXWDYrr_VPMOVSXWDZ256rr_VPMOVSXWDZ256rrk_VPMOVSXWDZ256rrkz_VPMOVSXWQYrr_VPMOVSXWQZ256rr_VPMOVSXWQZ256rrk_VPMOVSXWQZ256rrkz_VPMOVZXBDYrr_VPMOVZXBDZ256rr_VPMOVZXBDZ256rrk_VPMOVZXBDZ256rrkz_VPMOVZXBQYrr_VPMOVZXBQZ256rr_VPMOVZXBQZ256rrk_VPMOVZXBQZ256rrkz_VPMOVZXBWYrr_VPMOVZXBWZ256rr_VPMOVZXBWZ256rrk_VPMOVZXBWZ256rrkz_VPMOVZXDQYrr_VPMOVZXDQZ256rr_VPMOVZXDQZ256rrk_VPMOVZXDQZ256rrkz_VPMOVZXWDYrr_VPMOVZXWDZ256rr_VPMOVZXWDZ256rrk_VPMOVZXWDZ256rrkz_VPMOVZXWQYrr_VPMOVZXWQZ256rr_VPMOVZXWQZ256rrk_VPMOVZXWQZ256rrkz_VPMOVDBZ128rr_VPMOVDBZ128rrk_VPMOVDBZ128rrkz_VPMOVDBZ256rr_VPMOVDBZ256rrk_VPMOVDBZ256rrkz_VPMOVDWZ128rr_VPMOVDWZ128rrk_VPMOVDWZ128rrkz_VPMOVDWZ256rr_VPMOVDWZ256rrk_VPMOVDWZ256rrkz_VPMOVQBZ128rr_VPMOVQBZ128rrk_VPMOVQBZ128rrkz_VPMOVQBZ256rr_VPMOVQBZ256rrk_VPMOVQBZ256rrkz_VPMOVQDZ128rr_VPMOVQDZ128rrk_VPMOVQDZ128rrkz_VPMOVQDZ256rr_VPMOVQDZ256rrk_VPMOVQDZ256rrkz_VPMOVQWZ128rr_VPMOVQWZ128rrk_VPMOVQWZ128rrkz_VPMOVQWZ256rr_VPMOVQWZ256rrk_VPMOVQWZ256rrkz_VPMOVSDBZ128rr_VPMOVSDBZ128rrk_VPMOVSDBZ128rrkz_VPMOVSDBZ256rr_VPMOVSDBZ256rrk_VPMOVSDBZ256rrkz_VPMOVSDWZ128rr_VPMOVSDWZ128rrk_VPMOVSDWZ128rrkz_VPMOVSDWZ256rr_VPMOVSDWZ256rrk_VPMOVSDWZ256rrkz_VPMOVSQBZ128rr_VPMOVSQBZ128rrk_VPMOVSQBZ128rrkz_VPMOVSQBZ256rr_VPMOVSQBZ256rrk_VPMOVSQBZ256rrkz_VPMOVSQDZ128rr_VPMOVSQDZ128rrk_VPMOVSQDZ128rrkz_VPMOVSQDZ256rr_VPMOVSQDZ256rrk_VPMOVSQDZ256rrkz_VPMOVSQWZ128rr_VPMOVSQWZ128rrk_VPMOVSQWZ128rrkz_VPMOVSQWZ256rr_VPMOVSQWZ256rrk_VPMOVSQWZ256rrkz_VPMOVSWBZ128rr_VPMOVSWBZ128rrk_VPMOVSWBZ128rrkz_VPMOVSWBZ256rr_VPMOVSWBZ256rrk_VPMOVSWBZ256rrkz_VPMOVUSDBZ128rr_VPMOVUSDBZ128rrk_VPMOVUSDBZ128rrkz_VPMOVUSDBZ256rr_VPMOVUSDBZ256rrk_VPMOVUSDBZ256rrkz_VPMOVUSDWZ128rr_VPMOVUSDWZ128rrk_VPMOVUSDWZ128rrkz_VPMOVUSDWZ256rr_VPMOVUSDWZ256rrk_VPMOVUSDWZ256rrkz_VPMOVUSQBZ128rr_VPMOVUSQBZ128rrk_VPMOVUSQBZ128rrkz_VPMOVUSQBZ256rr_VPMOVUSQBZ256rrk_VPMOVUSQBZ256rrkz_VPMOVUSQDZ128rr_VPMOVUSQDZ128rrk_VPMOVUSQDZ128rrkz_VPMOVUSQDZ256rr_VPMOVUSQDZ256rrk_VPMOVUSQDZ256rrkz_VPMOVUSQWZ128rr_VPMOVUSQWZ128rrk_VPMOVUSQWZ128rrkz_VPMOVUSQWZ256rr_VPMOVUSQWZ256rrk_VPMOVUSQWZ256rrkz_VPMOVUSWBZ128rr_VPMOVUSWBZ128rrk_VPMOVUSWBZ128rrkz_VPMOVUSWBZ256rr_VPMOVUSWBZ256rrk_VPMOVUSWBZ256rrkz_VPMOVWBZ128rr_VPMOVWBZ128rrk_VPMOVWBZ128rrkz_VPMOVWBZ256rr_VPMOVWBZ256rrk_VPMOVWBZ256rrkz = 1123, |
| 23478 | VPMOVSXBDZrr_VPMOVSXBDZrrk_VPMOVSXBDZrrkz_VPMOVSXBQZrr_VPMOVSXBQZrrk_VPMOVSXBQZrrkz_VPMOVSXBWZrr_VPMOVSXBWZrrk_VPMOVSXBWZrrkz_VPMOVSXDQZrr_VPMOVSXDQZrrk_VPMOVSXDQZrrkz_VPMOVSXWDZrr_VPMOVSXWDZrrk_VPMOVSXWDZrrkz_VPMOVSXWQZrr_VPMOVSXWQZrrk_VPMOVSXWQZrrkz_VPMOVZXBDZrr_VPMOVZXBDZrrk_VPMOVZXBDZrrkz_VPMOVZXBQZrr_VPMOVZXBQZrrk_VPMOVZXBQZrrkz_VPMOVZXBWZrr_VPMOVZXBWZrrk_VPMOVZXBWZrrkz_VPMOVZXDQZrr_VPMOVZXDQZrrk_VPMOVZXDQZrrkz_VPMOVZXWDZrr_VPMOVZXWDZrrk_VPMOVZXWDZrrkz_VPMOVZXWQZrr_VPMOVZXWQZrrk_VPMOVZXWQZrrkz = 1124, |
| 23479 | VPMOVDBZrr_VPMOVDBZrrk_VPMOVDBZrrkz_VPMOVDWZrr_VPMOVDWZrrk_VPMOVDWZrrkz_VPMOVQBZrr_VPMOVQBZrrk_VPMOVQBZrrkz_VPMOVQDZrr_VPMOVQDZrrk_VPMOVQDZrrkz_VPMOVQWZrr_VPMOVQWZrrk_VPMOVQWZrrkz_VPMOVSDBZrr_VPMOVSDBZrrk_VPMOVSDBZrrkz_VPMOVSDWZrr_VPMOVSDWZrrk_VPMOVSDWZrrkz_VPMOVSQBZrr_VPMOVSQBZrrk_VPMOVSQBZrrkz_VPMOVSQDZrr_VPMOVSQDZrrk_VPMOVSQDZrrkz_VPMOVSQWZrr_VPMOVSQWZrrk_VPMOVSQWZrrkz_VPMOVSWBZrr_VPMOVSWBZrrk_VPMOVSWBZrrkz_VPMOVUSDBZrr_VPMOVUSDBZrrk_VPMOVUSDBZrrkz_VPMOVUSDWZrr_VPMOVUSDWZrrk_VPMOVUSDWZrrkz_VPMOVUSQBZrr_VPMOVUSQBZrrk_VPMOVUSQBZrrkz_VPMOVUSQDZrr_VPMOVUSQDZrrk_VPMOVUSQDZrrkz_VPMOVUSQWZrr_VPMOVUSQWZrrk_VPMOVUSQWZrrkz_VPMOVUSWBZrr_VPMOVUSWBZrrk_VPMOVUSWBZrrkz_VPMOVWBZrr_VPMOVWBZrrk_VPMOVWBZrrkz = 1125, |
| 23480 | VPTESTMBZ128rrk_VPTESTMDZ128rrk_VPTESTMQZ128rrk_VPTESTMWZ128rrk_VPTESTNMBZ128rrk_VPTESTNMDZ128rrk_VPTESTNMQZ128rrk_VPTESTNMWZ128rrk = 1126, |
| 23481 | VPTESTMBZ256rr_VPTESTMBZ256rrk_VPTESTMDZ256rr_VPTESTMDZ256rrk_VPTESTMQZ256rr_VPTESTMQZ256rrk_VPTESTMWZ256rr_VPTESTMWZ256rrk_VPTESTNMBZ256rr_VPTESTNMBZ256rrk_VPTESTNMDZ256rr_VPTESTNMDZ256rrk_VPTESTNMQZ256rr_VPTESTNMQZ256rrk_VPTESTNMWZ256rr_VPTESTNMWZ256rrk = 1127, |
| 23482 | VPTESTMBZrrk_VPTESTMDZrrk_VPTESTMQZrrk_VPTESTMWZrrk_VPTESTNMBZrrk_VPTESTNMDZrrk_VPTESTNMQZrrk_VPTESTNMWZrrk = 1128, |
| 23483 | VPCONFLICTDZ128rr_VPCONFLICTDZ128rrk_VPCONFLICTDZ128rrkz_VPCONFLICTQZ128rr_VPCONFLICTQZ128rrk_VPCONFLICTQZ128rrkz = 1129, |
| 23484 | VPCONFLICTDZ256rr_VPCONFLICTDZ256rrk_VPCONFLICTDZ256rrkz_VPCONFLICTQZ256rr_VPCONFLICTQZ256rrk_VPCONFLICTQZ256rrkz = 1130, |
| 23485 | VPCONFLICTDZrr_VPCONFLICTDZrrk_VPCONFLICTDZrrkz_VPCONFLICTQZrr_VPCONFLICTQZrrk_VPCONFLICTQZrrkz = 1131, |
| 23486 | VRSQRT14PDZ128r_VRSQRT14PDZ128rk_VRSQRT14PDZ128rkz_VRSQRT14PSZ128r_VRSQRT14PSZ128rk_VRSQRT14PSZ128rkz = 1132, |
| 23487 | VRSQRT14PDZ256r_VRSQRT14PDZ256rk_VRSQRT14PDZ256rkz_VRSQRT14PSZ256r_VRSQRT14PSZ256rk_VRSQRT14PSZ256rkz = 1133, |
| 23488 | VRSQRT14PDZr_VRSQRT14PDZrk_VRSQRT14PDZrkz_VRSQRT14PSZr_VRSQRT14PSZrk_VRSQRT14PSZrkz = 1134, |
| 23489 | VPERMILPDYrr_VPERMILPDZ256rr_VPERMILPDZ256rrk_VPERMILPDZ256rrkz_VPERMILPSYrr_VPERMILPSZ256rr_VPERMILPSZ256rrk_VPERMILPSZ256rrkz = 1135, |
| 23490 | VPERMILPDZ128rr_VPERMILPDZ128rrk_VPERMILPDZ128rrkz_VPERMILPSZ128rr_VPERMILPSZ128rrk_VPERMILPSZ128rrkz = 1136, |
| 23491 | VPERMILPDZrr_VPERMILPDZrrk_VPERMILPDZrrkz_VPERMILPSZrr_VPERMILPSZrrk_VPERMILPSZrrkz = 1137, |
| 23492 | VPERMI2PDZ128rr_VPERMI2PDZ128rrk_VPERMI2PDZ128rrkz_VPERMI2PSZ128rr_VPERMI2PSZ128rrk_VPERMI2PSZ128rrkz_VPERMT2PDZ128rr_VPERMT2PDZ128rrk_VPERMT2PDZ128rrkz_VPERMT2PSZ128rr_VPERMT2PSZ128rrk_VPERMT2PSZ128rrkz = 1138, |
| 23493 | VPERMI2WZ128rr_VPERMI2WZ128rrk_VPERMI2WZ128rrkz_VPERMT2WZ128rr_VPERMT2WZ128rrk_VPERMT2WZ128rrkz_VPERMI2BZ128rr_VPERMI2BZ128rrk_VPERMI2BZ128rrkz_VPERMI2DZ128rr_VPERMI2DZ128rrk_VPERMI2DZ128rrkz_VPERMI2QZ128rr_VPERMI2QZ128rrk_VPERMI2QZ128rrkz_VPERMT2BZ128rr_VPERMT2BZ128rrk_VPERMT2BZ128rrkz_VPERMT2DZ128rr_VPERMT2DZ128rrk_VPERMT2DZ128rrkz_VPERMT2QZ128rr_VPERMT2QZ128rrk_VPERMT2QZ128rrkz = 1139, |
| 23494 | VCOMPRESSPDZ128rr_VCOMPRESSPDZ128rrk_VCOMPRESSPDZ128rrkz_VCOMPRESSPSZ128rr_VCOMPRESSPSZ128rrk_VCOMPRESSPSZ128rrkz_VPCOMPRESSBZ128rr_VPCOMPRESSBZ128rrk_VPCOMPRESSBZ128rrkz_VPCOMPRESSDZ128rr_VPCOMPRESSDZ128rrk_VPCOMPRESSDZ128rrkz_VPCOMPRESSQZ128rr_VPCOMPRESSQZ128rrk_VPCOMPRESSQZ128rrkz_VPCOMPRESSWZ128rr_VPCOMPRESSWZ128rrk_VPCOMPRESSWZ128rrkz_VPERMBZ128rr_VPERMBZ128rrk_VPERMBZ128rrkz_VPERMWZ128rr_VPERMWZ128rrk_VPERMWZ128rrkz = 1140, |
| 23495 | VPERMI2PDZ256rr_VPERMI2PDZ256rrk_VPERMI2PDZ256rrkz_VPERMI2PSZ256rr_VPERMI2PSZ256rrk_VPERMI2PSZ256rrkz_VPERMT2PDZ256rr_VPERMT2PDZ256rrk_VPERMT2PDZ256rrkz_VPERMT2PSZ256rr_VPERMT2PSZ256rrk_VPERMT2PSZ256rrkz_VPERMPDZ256rr_VPERMPDZ256rrk_VPERMPDZ256rrkz_VPERMPSZ256rr_VPERMPSZ256rrk_VPERMPSZ256rrkz = 1141, |
| 23496 | VPERMI2WZ256rr_VPERMI2WZ256rrk_VPERMI2WZ256rrkz_VPERMT2WZ256rr_VPERMT2WZ256rrk_VPERMT2WZ256rrkz_VCOMPRESSPDZ256rr_VCOMPRESSPDZ256rrk_VCOMPRESSPDZ256rrkz_VCOMPRESSPSZ256rr_VCOMPRESSPSZ256rrk_VCOMPRESSPSZ256rrkz_VPCOMPRESSBZ256rr_VPCOMPRESSBZ256rrk_VPCOMPRESSBZ256rrkz_VPCOMPRESSDZ256rr_VPCOMPRESSDZ256rrk_VPCOMPRESSDZ256rrkz_VPCOMPRESSQZ256rr_VPCOMPRESSQZ256rrk_VPCOMPRESSQZ256rrkz_VPCOMPRESSWZ256rr_VPCOMPRESSWZ256rrk_VPCOMPRESSWZ256rrkz_VPERMBZ256rr_VPERMBZ256rrk_VPERMBZ256rrkz_VPERMDZ256rr_VPERMDZ256rrk_VPERMDZ256rrkz_VPERMQZ256rr_VPERMQZ256rrk_VPERMQZ256rrkz_VPERMWZ256rr_VPERMWZ256rrk_VPERMWZ256rrkz_VPERMI2BZ256rr_VPERMI2BZ256rrk_VPERMI2BZ256rrkz_VPERMI2DZ256rr_VPERMI2DZ256rrk_VPERMI2DZ256rrkz_VPERMI2QZ256rr_VPERMI2QZ256rrk_VPERMI2QZ256rrkz_VPERMT2BZ256rr_VPERMT2BZ256rrk_VPERMT2BZ256rrkz_VPERMT2DZ256rr_VPERMT2DZ256rrk_VPERMT2DZ256rrkz_VPERMT2QZ256rr_VPERMT2QZ256rrk_VPERMT2QZ256rrkz_VPEXPANDBZ256rr_VPEXPANDBZ256rrk_VPEXPANDBZ256rrkz_VPEXPANDWZ256rr_VPEXPANDWZ256rrk_VPEXPANDWZ256rrkz = 1142, |
| 23497 | VPERMI2PDZrr_VPERMI2PDZrrk_VPERMI2PDZrrkz_VPERMI2PSZrr_VPERMI2PSZrrk_VPERMI2PSZrrkz_VPERMT2PDZrr_VPERMT2PDZrrk_VPERMT2PDZrrkz_VPERMT2PSZrr_VPERMT2PSZrrk_VPERMT2PSZrrkz_VPERMPDZrr_VPERMPDZrrk_VPERMPDZrrkz_VPERMPSZrr_VPERMPSZrrk_VPERMPSZrrkz = 1143, |
| 23498 | VPERMI2WZrr_VPERMI2WZrrk_VPERMI2WZrrkz_VPERMT2WZrr_VPERMT2WZrrk_VPERMT2WZrrkz_VPERMBZrr_VPERMBZrrk_VPERMBZrrkz_VPERMDZrr_VPERMDZrrk_VPERMDZrrkz_VPERMWZrr_VPERMWZrrk_VPERMWZrrkz_VPERMI2BZrr_VPERMI2BZrrk_VPERMI2BZrrkz_VPERMI2DZrr_VPERMI2DZrrk_VPERMI2DZrrkz_VPERMI2QZrr_VPERMI2QZrrk_VPERMI2QZrrkz_VPERMT2BZrr_VPERMT2BZrrk_VPERMT2BZrrkz_VPERMT2DZrr_VPERMT2DZrrk_VPERMT2DZrrkz_VPERMT2QZrr_VPERMT2QZrrk_VPERMT2QZrrkz_VCOMPRESSPDZrr_VCOMPRESSPDZrrk_VCOMPRESSPDZrrkz_VCOMPRESSPSZrr_VCOMPRESSPSZrrk_VCOMPRESSPSZrrkz_VPCOMPRESSBZrr_VPCOMPRESSBZrrk_VPCOMPRESSBZrrkz_VPCOMPRESSDZrr_VPCOMPRESSDZrrk_VPCOMPRESSDZrrkz_VPCOMPRESSQZrr_VPCOMPRESSQZrrk_VPCOMPRESSQZrrkz_VPCOMPRESSWZrr_VPCOMPRESSWZrrk_VPCOMPRESSWZrrkz_VPEXPANDBZrr_VPEXPANDBZrrk_VPEXPANDBZrrkz_VPEXPANDWZrr_VPEXPANDWZrrk_VPEXPANDWZrrkz = 1144, |
| 23499 | VPABSBZ128rr_VPABSBZ128rrk_VPABSBZ128rrkz_VPABSDZ128rr_VPABSDZ128rrk_VPABSDZ128rrkz_VPABSQZ128rr_VPABSQZ128rrk_VPABSQZ128rrkz_VPABSWZ128rr_VPABSWZ128rrk_VPABSWZ128rrkz_VPADDSBZ128rr_VPADDSBZ128rrk_VPADDSBZ128rrkz_VPADDSWZ128rr_VPADDSWZ128rrk_VPADDSWZ128rrkz_VPADDUSBZ128rr_VPADDUSBZ128rrk_VPADDUSBZ128rrkz_VPADDUSWZ128rr_VPADDUSWZ128rrk_VPADDUSWZ128rrkz_VPAVGBZ128rr_VPAVGBZ128rrk_VPAVGBZ128rrkz_VPAVGWZ128rr_VPAVGWZ128rrk_VPAVGWZ128rrkz_VPOPCNTBZ128rr_VPOPCNTBZ128rrk_VPOPCNTBZ128rrkz_VPOPCNTDZ128rr_VPOPCNTDZ128rrk_VPOPCNTDZ128rrkz_VPOPCNTQZ128rr_VPOPCNTQZ128rrk_VPOPCNTQZ128rrkz_VPOPCNTWZ128rr_VPOPCNTWZ128rrk_VPOPCNTWZ128rrkz_VPSUBSBZ128rr_VPSUBSBZ128rrk_VPSUBSBZ128rrkz_VPSUBSWZ128rr_VPSUBSWZ128rrk_VPSUBSWZ128rrkz_VPSUBUSBZ128rr_VPSUBUSBZ128rrk_VPSUBUSBZ128rrkz_VPSUBUSWZ128rr_VPSUBUSWZ128rrk_VPSUBUSWZ128rrkz = 1145, |
| 23500 | VXORPSZ128rr_VXORPDZ128rr_VANDNPSZ128rr_VANDNPDZ128rr = 1146, |
| 23501 | VXORPSZ256rr_VXORPDZ256rr_VANDNPSZ256rr_VANDNPDZ256rr = 1147, |
| 23502 | VXORPSZrr_VXORPDZrr_VANDNPSZrr_VANDNPDZrr = 1148, |
| 23503 | VPXORDZ128rr_VPXORQZ128rr_VPANDNDZ128rr_VPANDNQZ128rr = 1149, |
| 23504 | VPXORDZ256rr_VPXORQZ256rr_VPANDNDZ256rr_VPANDNQZ256rr = 1150, |
| 23505 | VPXORDZrr_VPXORQZrr_VPANDNDZrr_VPANDNQZrr = 1151, |
| 23506 | VPSUBBZ128rr_VPSUBWZ128rr_VPSUBDZ128rr_VPSUBQZ128rr_VPCMPGTBZ128rr_VPCMPGTWZ128rr_VPCMPGTDZ128rr_VPCMPGTQZ128rr = 1152, |
| 23507 | VPSUBBZ256rr_VPSUBWZ256rr_VPSUBDZ256rr_VPSUBQZ256rr_VPCMPGTBZ256rr_VPCMPGTWZ256rr_VPCMPGTDZ256rr_VPCMPGTQZ256rr = 1153, |
| 23508 | VPSUBBZrr_VPSUBWZrr_VPSUBDZrr_VPSUBQZrr_VPCMPGTBZrr_VPCMPGTWZrr_VPCMPGTDZrr_VPCMPGTQZrr = 1154, |
| 23509 | LSL16rr_LSL32rr_LSL64rr = 1155, |
| 23510 | LXADD8_LXADD16_LXADD32_LXADD64 = 1156, |
| 23511 | BLCFILL32rr_BLCFILL64rr_BLCI32rr_BLCI64rr_BLCIC32rr_BLCIC64rr_BLCMSK32rr_BLCMSK64rr_BLCS32rr_BLCS64rr_BLSFILL32rr_BLSFILL64rr_BLSIC32rr_BLSIC64rr_T1MSKC32rr_T1MSKC64rr_TZMSK32rr_TZMSK64rr = 1157, |
| 23512 | BLCFILL32rm_BLCFILL64rm_BLCI32rm_BLCI64rm_BLCIC32rm_BLCIC64rm_BLCMSK32rm_BLCMSK64rm_BLCS32rm_BLCS64rm_BLSFILL32rm_BLSFILL64rm_BLSIC32rm_BLSIC64rm_T1MSKC32rm_T1MSKC64rm_TZMSK32rm_TZMSK64rm = 1158, |
| 23513 | ADC64ri32_SBB64ri32 = 1159, |
| 23514 | CRC32r32r16 = 1160, |
| 23515 | CRC32r32r32 = 1161, |
| 23516 | CRC32r64r64 = 1162, |
| 23517 | SAHF = 1163, |
| 23518 | BEXTRI32ri_BEXTRI64ri = 1164, |
| 23519 | BEXTRI32mi_BEXTRI64mi = 1165, |
| 23520 | RCR8ri = 1166, |
| 23521 | RCL16rCL = 1167, |
| 23522 | RCR16ri = 1168, |
| 23523 | RCR32rCL_RCR64rCL = 1169, |
| 23524 | RCL16ri = 1170, |
| 23525 | RCL32ri_RCL64ri = 1171, |
| 23526 | SHLD16rrCL = 1172, |
| 23527 | SHLD32rrCL_SHRD32rrCL = 1173, |
| 23528 | VMOVUPDYmr_VMOVUPSYmr = 1174, |
| 23529 | TST_F = 1175, |
| 23530 | VDPPSrri = 1176, |
| 23531 | VFRCZPDrr_VFRCZPSrr = 1177, |
| 23532 | VFRCZSDrr_VFRCZSSrr = 1178, |
| 23533 | VFRCZPDrm_VFRCZPSrm_VFRCZSDrm_VFRCZSSrm = 1179, |
| 23534 | VFRCZPSYrr_VFRCZPDYrr = 1180, |
| 23535 | VFRCZPSYrm_VFRCZPDYrm = 1181, |
| 23536 | MMX_CVTTPD2PIrr = 1182, |
| 23537 | CVTSI2SSrr = 1183, |
| 23538 | VMOVDQUYmr = 1184, |
| 23539 | MOVDQArr = 1185, |
| 23540 | MMX_MOVQ2DQrr = 1186, |
| 23541 | VPMACSDQHrr_VPMACSDQLrr_VPMACSSDQHrr_VPMACSSDQLrr = 1187, |
| 23542 | VPPERMrrr_VPPERMrrr_REV = 1188, |
| 23543 | VPPERMrrm = 1189, |
| 23544 | VPPERMrmr = 1190, |
| 23545 | PHADDWrr_PHSUBWrr_PHADDSWrr_PHSUBSWrr_VPHADDDrr_VPHSUBDrr_VPHADDWrr_VPHSUBWrr_VPHADDSWrr_VPHSUBSWrr = 1191, |
| 23546 | PHADDWrm_PHSUBWrm_PHADDSWrm_PHSUBSWrm_VPHADDDrm_VPHSUBDrm_VPHADDWrm_VPHSUBWrm_VPHADDSWrm_VPHSUBSWrm = 1192, |
| 23547 | VPCLMULQDQrri = 1193, |
| 23548 | ANDNPSrr_ANDNPDrr = 1194, |
| 23549 | MMX_PXORrr_MMX_PANDNrr = 1195, |
| 23550 | PANDNrr = 1196, |
| 23551 | MMX_PSUBBrr_MMX_PSUBDrr_MMX_PSUBWrr_MMX_PCMPGTBrr_MMX_PCMPGTDrr_MMX_PCMPGTWrr = 1197, |
| 23552 | MMX_PSUBQrr = 1198, |
| 23553 | LCMPXCHG16_LCMPXCHG32_LCMPXCHG64 = 1199, |
| 23554 | CMPXCHG16rr_CMPXCHG32rr_CMPXCHG64rr = 1200, |
| 23555 | LCMPXCHG8B = 1201, |
| 23556 | INC8m_INC16m_INC32m_INC64m_DEC8m_DEC16m_DEC32m_DEC64m_NOT8m_NOT16m_NOT32m_NOT64m_NEG8m_NEG16m_NEG32m_NEG64m = 1202, |
| 23557 | XCHG8rr = 1203, |
| 23558 | MMX_PSUBSBrr_MMX_PSUBSWrr_MMX_PSUBUSBrr_MMX_PSUBUSWrr = 1204, |
| 23559 | PSUBSBrr_VPSUBSBrr_PSUBSWrr_VPSUBSWrr_PSUBUSBrr_VPSUBUSBrr_PSUBUSWrr_VPSUBUSWrr = 1205, |
| 23560 | MMX_PCMPEQBrr_MMX_PCMPEQDrr_MMX_PCMPEQWrr_MMX_PMAXSWrr_MMX_PMINSWrr_MMX_PMAXUBrr_MMX_PMINUBrr = 1206, |
| 23561 | MMX_PCMPGTBrr_MMX_PCMPGTDrr_MMX_PCMPGTWrr = 1207, |
| 23562 | CLAC_STAC = 1208, |
| 23563 | PADDBrr_PADDDrr_PADDWrr_VPADDBrr_VPADDDrr_VPADDQrr_VPADDWrr = 1209, |
| 23564 | VPADDBYrr_VPADDDYrr_VPADDQYrr_VPADDWYrr = 1210, |
| 23565 | ADD_FPrST0_ADD_FST0r_ADD_FrST0_SUBR_FPrST0_SUBR_FST0r_SUBR_FrST0_SUB_FPrST0_SUB_FST0r_SUB_FrST0 = 1211, |
| 23566 | MMX_PHADDSWrr_MMX_PHSUBSWrr = 1212, |
| 23567 | PHADDSWrr_VPHADDSWrr_PHSUBSWrr_VPHSUBSWrr = 1213, |
| 23568 | VPHADDSWYrr_VPHSUBSWYrr = 1214, |
| 23569 | MMX_PADDSBrm_MMX_PADDSWrm_MMX_PADDUSBrm_MMX_PADDUSWrm_MMX_PAVGBrm_MMX_PAVGWrm_MMX_PCMPEQBrm_MMX_PCMPEQDrm_MMX_PCMPEQWrm_MMX_PCMPGTBrm_MMX_PCMPGTDrm_MMX_PCMPGTWrm_MMX_PMAXSWrm_MMX_PMAXUBrm_MMX_PMINSWrm_MMX_PMINUBrm_MMX_PSUBSBrm_MMX_PSUBSWrm_MMX_PSUBUSBrm_MMX_PSUBUSWrm = 1215, |
| 23570 | PADDBrm_PADDDrm_PADDWrm_VPADDBrm_VPADDDrm_VPADDQrm_VPADDWrm_PSUBBrm_PSUBDrm_PSUBWrm_VPSUBBrm_VPSUBDrm_VPSUBQrm_VPSUBWrm = 1216, |
| 23571 | VCVTSS2SI64rr_VCVTTSS2SI64rr = 1217, |
| 23572 | VCVTSS2SI64rr_Int_VCVTTSS2SI64rr_Int = 1218, |
| 23573 | VPADDBYrm_VPADDDYrm_VPADDQYrm_VPADDWYrm_VPSUBBYrm_VPSUBDYrm_VPSUBQYrm_VPSUBWYrm = 1219, |
| 23574 | MMX_PHADDSWrm_MMX_PHSUBSWrm = 1220, |
| 23575 | PHADDSWrm_VPHADDSWrm_PHSUBSWrm_VPHSUBSWrm = 1221, |
| 23576 | VPHADDSWYrm_VPHSUBSWYrm = 1222, |
| 23577 | XSAVEC_XSAVEC64_XSAVES_XSAVES64 = 1223, |
| 23578 | PCMPGTBrr_PCMPGTDrr_PCMPGTWrr = 1224, |
| 23579 | VPCMPGTBrr_VPCMPGTDrr_VPCMPGTWrr = 1225, |
| 23580 | VPCMPGTBYrr_VPCMPGTDYrr_VPCMPGTWYrr = 1226, |
| 23581 | KANDBkk_KANDDkk_KANDQkk_KANDWkk_KANDNBkk_KANDNDkk_KANDNQkk_KANDNWkk_KNOTBkk_KNOTDkk_KNOTQkk_KNOTWkk_KORBkk_KORDkk_KORQkk_KORWkk_KXNORBkk_KXNORDkk_KXNORQkk_KXNORWkk_KXORBkk_KXORDkk_KXORQkk_KXORWkk = 1227, |
| 23582 | KMOVBkk_KMOVDkk_KMOVQkk_KMOVWkk = 1228, |
| 23583 | KMOVBkk_EVEX_KMOVDkk_EVEX_KMOVQkk_EVEX_KMOVWkk_EVEX_VPMOVB2MZ128kr_VPMOVB2MZ256kr_VPMOVB2MZkr_VPMOVD2MZ128kr_VPMOVD2MZ256kr_VPMOVD2MZkr_VPMOVQ2MZ128kr_VPMOVQ2MZ256kr_VPMOVQ2MZkr_VPMOVW2MZ128kr_VPMOVW2MZ256kr_VPMOVW2MZkr = 1229, |
| 23584 | KSET0D_KSET0Q_KSET0W_KSET1D_KSET1Q_KSET1W = 1230, |
| 23585 | KMOVBkr_EVEX_KMOVDkr_EVEX_KMOVQkr_EVEX_KMOVWkr_EVEX = 1231, |
| 23586 | VBLENDMPDZ128rr_VBLENDMPDZ128rrk_VBLENDMPDZ128rrkz_VBLENDMPSZ128rr_VBLENDMPSZ128rrk_VBLENDMPSZ128rrkz = 1232, |
| 23587 | VBLENDMPDZ256rr_VBLENDMPDZ256rrk_VBLENDMPDZ256rrkz_VBLENDMPSZ256rr_VBLENDMPSZ256rrk_VBLENDMPSZ256rrkz = 1233, |
| 23588 | VPADDBZ128rr_VPADDBZ128rrk_VPADDBZ128rrkz_VPADDDZ128rr_VPADDDZ128rrk_VPADDDZ128rrkz_VPADDQZ128rr_VPADDQZ128rrk_VPADDQZ128rrkz_VPADDWZ128rr_VPADDWZ128rrk_VPADDWZ128rrkz_VPSUBBZ128rrk_VPSUBBZ128rrkz_VPSUBDZ128rrk_VPSUBDZ128rrkz_VPSUBQZ128rrk_VPSUBQZ128rrkz_VPSUBWZ128rrk_VPSUBWZ128rrkz_VPTERNLOGDZ128rri_VPTERNLOGDZ128rrik_VPTERNLOGDZ128rrikz_VPTERNLOGQZ128rri_VPTERNLOGQZ128rrik_VPTERNLOGQZ128rrikz = 1234, |
| 23589 | VPADDBZ256rr_VPADDBZ256rrk_VPADDBZ256rrkz_VPADDDZ256rr_VPADDDZ256rrk_VPADDDZ256rrkz_VPADDQZ256rr_VPADDQZ256rrk_VPADDQZ256rrkz_VPADDWZ256rr_VPADDWZ256rrk_VPADDWZ256rrkz_VPSUBBZ256rrk_VPSUBBZ256rrkz_VPSUBDZ256rrk_VPSUBDZ256rrkz_VPSUBQZ256rrk_VPSUBQZ256rrkz_VPSUBWZ256rrk_VPSUBWZ256rrkz_VPTERNLOGDZ256rri_VPTERNLOGDZ256rrik_VPTERNLOGDZ256rrikz_VPTERNLOGQZ256rri_VPTERNLOGQZ256rrik_VPTERNLOGQZ256rrikz = 1235, |
| 23590 | VPADDBZrr_VPADDBZrrk_VPADDBZrrkz_VPADDDZrr_VPADDDZrrk_VPADDDZrrkz_VPADDQZrr_VPADDQZrrk_VPADDQZrrkz_VPADDWZrr_VPADDWZrrk_VPADDWZrrkz_VPSUBBZrrk_VPSUBBZrrkz_VPSUBDZrrk_VPSUBDZrrkz_VPSUBQZrrk_VPSUBQZrrkz_VPSUBWZrrk_VPSUBWZrrkz_VPTERNLOGDZrri_VPTERNLOGDZrrik_VPTERNLOGDZrrikz_VPTERNLOGQZrri_VPTERNLOGQZrrik_VPTERNLOGQZrrikz = 1236, |
| 23591 | VPBLENDMBZ128rr_VPBLENDMBZ128rrk_VPBLENDMBZ128rrkz_VPBLENDMDZ128rr_VPBLENDMDZ128rrk_VPBLENDMDZ128rrkz_VPBLENDMQZ128rr_VPBLENDMQZ128rrk_VPBLENDMQZ128rrkz_VPBLENDMWZ128rr_VPBLENDMWZ128rrk_VPBLENDMWZ128rrkz = 1237, |
| 23592 | VPBLENDMBZ256rr_VPBLENDMBZ256rrk_VPBLENDMBZ256rrkz_VPBLENDMDZ256rr_VPBLENDMDZ256rrk_VPBLENDMDZ256rrkz_VPBLENDMQZ256rr_VPBLENDMQZ256rrk_VPBLENDMQZ256rrkz_VPBLENDMWZ256rr_VPBLENDMWZ256rrk_VPBLENDMWZ256rrkz = 1238, |
| 23593 | KMOVBmk_EVEX_KMOVDmk_EVEX_KMOVQmk_EVEX_KMOVWmk_EVEX = 1239, |
| 23594 | VMOVDQU8Zmr_VMOVDQU8Zmrk = 1240, |
| 23595 | KMOVBrk_EVEX_KMOVDrk_EVEX_KMOVQrk_EVEX_KMOVWrk_EVEX = 1241, |
| 23596 | KORTESTBkk_KORTESTDkk_KORTESTQkk_KORTESTWkk_KTESTBkk_KTESTDkk_KTESTQkk_KTESTWkk = 1242, |
| 23597 | VALIGNDZ128rrik_VALIGNDZ128rrikz_VALIGNQZ128rrik_VALIGNQZ128rrikz = 1243, |
| 23598 | VALIGNDZ256rrik_VALIGNDZ256rrikz_VALIGNQZ256rrik_VALIGNQZ256rrikz = 1244, |
| 23599 | VALIGNDZrrik_VALIGNDZrrikz_VALIGNQZrrik_VALIGNQZrrikz = 1245, |
| 23600 | KSHIFTLBki_KSHIFTLDki_KSHIFTLQki_KSHIFTLWki_KSHIFTRBki_KSHIFTRDki_KSHIFTRQki_KSHIFTRWki = 1246, |
| 23601 | VCMPPDZ128rri_VCMPPDZ128rrik_VCMPPSZ128rri_VCMPPSZ128rrik_VFPCLASSPDZ128ri_VFPCLASSPDZ128rik_VFPCLASSPSZ128ri_VFPCLASSPSZ128rik = 1247, |
| 23602 | VCMPPDZ256rri_VCMPPDZ256rrik_VCMPPSZ256rri_VCMPPSZ256rrik_VFPCLASSPDZ256ri_VFPCLASSPDZ256rik_VFPCLASSPSZ256ri_VFPCLASSPSZ256rik = 1248, |
| 23603 | VCMPPDZrri_VCMPPDZrrib_VCMPPDZrribk_VCMPPDZrrik_VCMPPSZrri_VCMPPSZrrib_VCMPPSZrribk_VCMPPSZrrik_VFPCLASSPDZri_VFPCLASSPDZrik_VFPCLASSPSZri_VFPCLASSPSZrik = 1249, |
| 23604 | VCMPSDZrri_VCMPSDZrri_Int_VCMPSDZrrib_Int_VCMPSDZrribk_Int_VCMPSDZrrik_Int_VCMPSSZrri_VCMPSSZrri_Int_VCMPSSZrrib_Int_VCMPSSZrribk_Int_VCMPSSZrrik_Int_VFPCLASSSDZri_VFPCLASSSDZrik_VFPCLASSSSZri_VFPCLASSSSZrik = 1250, |
| 23605 | VPCMPBZ128rri_VPCMPBZ128rrik_VPCMPDZ128rri_VPCMPDZ128rrik_VPCMPEQBZ128rr_VPCMPEQBZ128rrk_VPCMPEQDZ128rr_VPCMPEQDZ128rrk_VPCMPEQQZ128rr_VPCMPEQQZ128rrk_VPCMPEQWZ128rr_VPCMPEQWZ128rrk_VPCMPGTBZ128rrk_VPCMPGTDZ128rrk_VPCMPGTQZ128rrk_VPCMPGTWZ128rrk_VPCMPQZ128rri_VPCMPQZ128rrik_VPCMPUBZ128rri_VPCMPUBZ128rrik_VPCMPUDZ128rri_VPCMPUDZ128rrik_VPCMPUQZ128rri_VPCMPUQZ128rrik_VPCMPUWZ128rri_VPCMPUWZ128rrik_VPCMPWZ128rri_VPCMPWZ128rrik = 1251, |
| 23606 | VPCMPBZ256rri_VPCMPBZ256rrik_VPCMPDZ256rri_VPCMPDZ256rrik_VPCMPEQBZ256rr_VPCMPEQBZ256rrk_VPCMPEQDZ256rr_VPCMPEQDZ256rrk_VPCMPEQQZ256rr_VPCMPEQQZ256rrk_VPCMPEQWZ256rr_VPCMPEQWZ256rrk_VPCMPGTBZ256rrk_VPCMPGTDZ256rrk_VPCMPGTQZ256rrk_VPCMPGTWZ256rrk_VPCMPQZ256rri_VPCMPQZ256rrik_VPCMPUBZ256rri_VPCMPUBZ256rrik_VPCMPUDZ256rri_VPCMPUDZ256rrik_VPCMPUQZ256rri_VPCMPUQZ256rrik_VPCMPUWZ256rri_VPCMPUWZ256rrik_VPCMPWZ256rri_VPCMPWZ256rrik = 1252, |
| 23607 | VPCMPBZrri_VPCMPBZrrik_VPCMPDZrri_VPCMPDZrrik_VPCMPEQBZrr_VPCMPEQBZrrk_VPCMPEQDZrr_VPCMPEQDZrrk_VPCMPEQQZrr_VPCMPEQQZrrk_VPCMPEQWZrr_VPCMPEQWZrrk_VPCMPGTBZrrk_VPCMPGTDZrrk_VPCMPGTQZrrk_VPCMPGTWZrrk_VPCMPQZrri_VPCMPQZrrik_VPCMPUBZrri_VPCMPUBZrrik_VPCMPUDZrri_VPCMPUDZrrik_VPCMPUQZrri_VPCMPUQZrrik_VPCMPUWZrri_VPCMPUWZrrik_VPCMPWZrri_VPCMPWZrrik = 1253, |
| 23608 | VPCMPGTBZ128rr_VPCMPGTDZ128rr_VPCMPGTQZ128rr_VPCMPGTWZ128rr = 1254, |
| 23609 | VPCMPGTBZ256rr_VPCMPGTDZ256rr_VPCMPGTQZ256rr_VPCMPGTWZ256rr = 1255, |
| 23610 | VPCMPGTBZrr_VPCMPGTDZrr_VPCMPGTQZrr_VPCMPGTWZrr = 1256, |
| 23611 | VPTESTMBZ128rr_VPTESTMDZ128rr_VPTESTMQZ128rr_VPTESTMWZ128rr_VPTESTNMBZ128rr_VPTESTNMDZ128rr_VPTESTNMQZ128rr_VPTESTNMWZ128rr = 1257, |
| 23612 | VPTESTMBZrr_VPTESTMDZrr_VPTESTMQZrr_VPTESTMWZrr_VPTESTNMBZrr_VPTESTNMDZrr_VPTESTNMQZrr_VPTESTNMWZrr = 1258, |
| 23613 | VCVTPD2QQZ128rr_VCVTPD2QQZ128rrk_VCVTPD2QQZ128rrkz_VCVTPD2UQQZ128rr_VCVTPD2UQQZ128rrk_VCVTPD2UQQZ128rrkz_VCVTTPD2QQZ128rr_VCVTTPD2QQZ128rrk_VCVTTPD2QQZ128rrkz_VCVTTPD2UQQZ128rr_VCVTTPD2UQQZ128rrk_VCVTTPD2UQQZ128rrkz = 1259, |
| 23614 | VCVTPD2QQZ256rr_VCVTPD2QQZ256rrk_VCVTPD2QQZ256rrkz_VCVTPD2UQQZ256rr_VCVTPD2UQQZ256rrk_VCVTPD2UQQZ256rrkz_VCVTTPD2QQZ256rr_VCVTTPD2QQZ256rrk_VCVTTPD2QQZ256rrkz_VCVTTPD2UQQZ256rr_VCVTTPD2UQQZ256rrk_VCVTTPD2UQQZ256rrkz = 1260, |
| 23615 | VCVTPS2DQYrr_VCVTPS2DQZ256rr_VCVTPS2DQZ256rrk_VCVTPS2DQZ256rrkz_VCVTPS2UDQZ256rr_VCVTPS2UDQZ256rrk_VCVTPS2UDQZ256rrkz_VCVTTPS2DQZ256rr_VCVTTPS2DQZ256rrk_VCVTTPS2DQZ256rrkz_VCVTTPS2UDQZ256rr_VCVTTPS2UDQZ256rrk_VCVTTPS2UDQZ256rrkz = 1261, |
| 23616 | VCVTPS2DQZ128rr_VCVTPS2DQZ128rrk_VCVTPS2DQZ128rrkz_VCVTPS2UDQZ128rr_VCVTPS2UDQZ128rrk_VCVTPS2UDQZ128rrkz_VCVTTPS2DQZ128rr_VCVTTPS2DQZ128rrk_VCVTTPS2DQZ128rrkz_VCVTTPS2UDQZ128rr_VCVTTPS2UDQZ128rrk_VCVTTPS2UDQZ128rrkz = 1262, |
| 23617 | VCVTPD2QQZrr_VCVTPD2UQQZrr_VCVTTPD2QQZrr_VCVTTPD2UQQZrr = 1263, |
| 23618 | VCVTPS2DQZrr_VCVTPS2UDQZrr_VCVTTPS2DQZrr_VCVTTPS2UDQZrr = 1264, |
| 23619 | VEXPANDPDZ128rr_VEXPANDPDZ128rrk_VEXPANDPDZ128rrkz_VEXPANDPDZ256rr_VEXPANDPDZ256rrk_VEXPANDPDZ256rrkz_VEXPANDPDZrr_VEXPANDPDZrrk_VEXPANDPDZrrkz_VEXPANDPSZ128rr_VEXPANDPSZ128rrk_VEXPANDPSZ128rrkz_VEXPANDPSZ256rr_VEXPANDPSZ256rrk_VEXPANDPSZ256rrkz_VEXPANDPSZrr_VEXPANDPSZrrk_VEXPANDPSZrrkz_VPEXPANDDZ128rr_VPEXPANDDZ128rrk_VPEXPANDDZ128rrkz_VPEXPANDDZ256rr_VPEXPANDDZ256rrk_VPEXPANDDZ256rrkz_VPEXPANDDZrr_VPEXPANDDZrrk_VPEXPANDDZrrkz_VPEXPANDQZ128rr_VPEXPANDQZ128rrk_VPEXPANDQZ128rrkz_VPEXPANDQZ256rr_VPEXPANDQZ256rrk_VPEXPANDQZ256rrkz_VPEXPANDQZrr_VPEXPANDQZrrk_VPEXPANDQZrrkz = 1265, |
| 23620 | VPMOVDBZ128rr_VPMOVDBZ128rrk_VPMOVDBZ128rrkz_VPMOVDBZ256rr_VPMOVDBZ256rrk_VPMOVDBZ256rrkz_VPMOVDWZ128rr_VPMOVDWZ128rrk_VPMOVDWZ128rrkz_VPMOVDWZ256rr_VPMOVDWZ256rrk_VPMOVDWZ256rrkz_VPMOVQBZ128rr_VPMOVQBZ128rrk_VPMOVQBZ128rrkz_VPMOVQBZ256rr_VPMOVQBZ256rrk_VPMOVQBZ256rrkz_VPMOVQWZ128rr_VPMOVQWZ128rrk_VPMOVQWZ128rrkz_VPMOVQWZ256rr_VPMOVQWZ256rrk_VPMOVQWZ256rrkz_VPMOVSDBZ128rr_VPMOVSDBZ128rrk_VPMOVSDBZ128rrkz_VPMOVSDBZ256rr_VPMOVSDBZ256rrk_VPMOVSDBZ256rrkz_VPMOVSDWZ128rr_VPMOVSDWZ128rrk_VPMOVSDWZ128rrkz_VPMOVSDWZ256rr_VPMOVSDWZ256rrk_VPMOVSDWZ256rrkz_VPMOVSQBZ128rr_VPMOVSQBZ128rrk_VPMOVSQBZ128rrkz_VPMOVSQBZ256rr_VPMOVSQBZ256rrk_VPMOVSQBZ256rrkz_VPMOVSQDZ128rr_VPMOVSQDZ128rrk_VPMOVSQDZ128rrkz_VPMOVSQDZ256rr_VPMOVSQDZ256rrk_VPMOVSQDZ256rrkz_VPMOVSQWZ128rr_VPMOVSQWZ128rrk_VPMOVSQWZ128rrkz_VPMOVSQWZ256rr_VPMOVSQWZ256rrk_VPMOVSQWZ256rrkz_VPMOVSWBZ128rr_VPMOVSWBZ128rrk_VPMOVSWBZ128rrkz_VPMOVSWBZ256rr_VPMOVSWBZ256rrk_VPMOVSWBZ256rrkz_VPMOVUSDBZ128rr_VPMOVUSDBZ128rrk_VPMOVUSDBZ128rrkz_VPMOVUSDBZ256rr_VPMOVUSDBZ256rrk_VPMOVUSDBZ256rrkz_VPMOVUSDWZ128rr_VPMOVUSDWZ128rrk_VPMOVUSDWZ128rrkz_VPMOVUSDWZ256rr_VPMOVUSDWZ256rrk_VPMOVUSDWZ256rrkz_VPMOVUSQBZ128rr_VPMOVUSQBZ128rrk_VPMOVUSQBZ128rrkz_VPMOVUSQBZ256rr_VPMOVUSQBZ256rrk_VPMOVUSQBZ256rrkz_VPMOVUSQDZ128rr_VPMOVUSQDZ128rrk_VPMOVUSQDZ128rrkz_VPMOVUSQDZ256rr_VPMOVUSQDZ256rrk_VPMOVUSQDZ256rrkz_VPMOVUSWBZ128rr_VPMOVUSWBZ128rrk_VPMOVUSWBZ128rrkz_VPMOVUSWBZ256rr_VPMOVUSWBZ256rrk_VPMOVUSWBZ256rrkz_VPMOVWBZ128rr_VPMOVWBZ128rrk_VPMOVWBZ128rrkz_VPMOVWBZ256rr_VPMOVWBZ256rrk_VPMOVWBZ256rrkz = 1266, |
| 23621 | VPMOVDBZrr_VPMOVDBZrrk_VPMOVDBZrrkz_VPMOVDWZrr_VPMOVDWZrrk_VPMOVDWZrrkz_VPMOVQBZrr_VPMOVQBZrrk_VPMOVQBZrrkz_VPMOVQWZrr_VPMOVQWZrrk_VPMOVQWZrrkz_VPMOVSDBZrr_VPMOVSDBZrrk_VPMOVSDBZrrkz_VPMOVSDWZrr_VPMOVSDWZrrk_VPMOVSDWZrrkz_VPMOVSQBZrr_VPMOVSQBZrrk_VPMOVSQBZrrkz_VPMOVSQDZrr_VPMOVSQDZrrk_VPMOVSQDZrrkz_VPMOVSQWZrr_VPMOVSQWZrrk_VPMOVSQWZrrkz_VPMOVSWBZrr_VPMOVSWBZrrk_VPMOVSWBZrrkz_VPMOVUSDBZrr_VPMOVUSDBZrrk_VPMOVUSDBZrrkz_VPMOVUSDWZrr_VPMOVUSDWZrrk_VPMOVUSDWZrrkz_VPMOVUSQBZrr_VPMOVUSQBZrrk_VPMOVUSQBZrrkz_VPMOVUSQDZrr_VPMOVUSQDZrrk_VPMOVUSQDZrrkz_VPMOVUSWBZrr_VPMOVUSWBZrrk_VPMOVUSWBZrrkz_VPMOVWBZrr_VPMOVWBZrrk_VPMOVWBZrrkz = 1267, |
| 23622 | VPMOVQDZ128mr_VPMOVQDZ128mrk_VPMOVQDZ256mr_VPMOVQDZ256mrk_VPMOVQDZmr_VPMOVQDZmrk = 1268, |
| 23623 | VCVTDQ2PDZ128rr_VCVTDQ2PDZ128rrk_VCVTDQ2PDZ128rrkz_VCVTUDQ2PDZ128rr_VCVTUDQ2PDZ128rrk_VCVTUDQ2PDZ128rrkz = 1269, |
| 23624 | VCVTPD2DQZ128rr_VCVTPD2DQZ128rrk_VCVTPD2DQZ128rrkz_VCVTPD2UDQZ128rr_VCVTPD2UDQZ128rrk_VCVTPD2UDQZ128rrkz_VCVTTPD2DQZ128rr_VCVTTPD2DQZ128rrk_VCVTTPD2DQZ128rrkz_VCVTTPD2UDQZ128rr_VCVTTPD2UDQZ128rrk_VCVTTPD2UDQZ128rrkz = 1270, |
| 23625 | VCVTPS2PDZ128rr_VCVTPS2PDZ128rrk_VCVTPS2PDZ128rrkz_CVTPS2PDrr_VCVTPS2PDrr = 1271, |
| 23626 | VCVTPS2QQZ128rr_VCVTPS2QQZ128rrk_VCVTPS2QQZ128rrkz_VCVTPS2UQQZ128rr_VCVTPS2UQQZ128rrk_VCVTPS2UQQZ128rrkz_VCVTTPS2QQZ128rr_VCVTTPS2QQZ128rrk_VCVTTPS2QQZ128rrkz_VCVTTPS2UQQZ128rr_VCVTTPS2UQQZ128rrk_VCVTTPS2UQQZ128rrkz = 1272, |
| 23627 | VCVTQQ2PSZ128rr_VCVTQQ2PSZ128rrk_VCVTQQ2PSZ128rrkz_VCVTUQQ2PSZ128rr_VCVTUQQ2PSZ128rrk_VCVTUQQ2PSZ128rrkz = 1273, |
| 23628 | VCVTSI2SSZrr_VCVTSI2SSZrr_Int_VCVTSI2SSZrrb_Int_CVTSI2SSrr_Int_VCVTSI2SSrr_VCVTSI2SSrr_Int_VCVTUSI2SSZrr_VCVTUSI2SSZrr_Int_VCVTUSI2SSZrrb_Int = 1274, |
| 23629 | VCVTSI2SDZrr_VCVTSI2SDZrr_Int_VCVTSI642SDZrr_VCVTSI642SDZrr_Int_VCVTSI642SDZrrb_Int_VCVTUSI2SDZrr_VCVTUSI2SDZrr_Int_VCVTUSI642SDZrr_VCVTUSI642SDZrr_Int_VCVTUSI642SDZrrb_Int = 1275, |
| 23630 | VCVTSS2SDZrr_VCVTSS2SDZrr_Int_VCVTSS2SDZrrb_Int_VCVTSS2SDZrrbk_Int_VCVTSS2SDZrrbkz_Int_VCVTSS2SDZrrk_Int_VCVTSS2SDZrrkz_Int_CVTSS2SDrr_CVTSS2SDrr_Int_VCVTSS2SDrr_VCVTSS2SDrr_Int = 1276, |
| 23631 | VPCONFLICTQZ128rr_VPCONFLICTQZ128rrk_VPCONFLICTQZ128rrkz = 1277, |
| 23632 | VCVTPS2PHZ128mr_VCVTPS2PHZ128mrk = 1278, |
| 23633 | VCVTPS2PHZ256mr_VCVTPS2PHZ256mrk = 1279, |
| 23634 | VCVTPS2PHZmr_VCVTPS2PHZmrk = 1280, |
| 23635 | VPMOVDBZ128mr_VPMOVDBZ128mrk_VPMOVDBZ256mr_VPMOVDBZ256mrk_VPMOVDBZmr_VPMOVDBZmrk_VPMOVDWZ128mr_VPMOVDWZ128mrk_VPMOVDWZ256mr_VPMOVDWZ256mrk_VPMOVDWZmr_VPMOVDWZmrk_VPMOVQBZ128mr_VPMOVQBZ128mrk_VPMOVQBZ256mr_VPMOVQBZ256mrk_VPMOVQBZmr_VPMOVQBZmrk_VPMOVQWZ128mr_VPMOVQWZ128mrk_VPMOVQWZ256mr_VPMOVQWZ256mrk_VPMOVQWZmr_VPMOVQWZmrk_VPMOVSDBZ128mr_VPMOVSDBZ128mrk_VPMOVSDBZ256mr_VPMOVSDBZ256mrk_VPMOVSDBZmr_VPMOVSDBZmrk_VPMOVSDWZ128mr_VPMOVSDWZ128mrk_VPMOVSDWZ256mr_VPMOVSDWZ256mrk_VPMOVSDWZmr_VPMOVSDWZmrk_VPMOVSQBZ128mr_VPMOVSQBZ128mrk_VPMOVSQBZ256mr_VPMOVSQBZ256mrk_VPMOVSQBZmr_VPMOVSQBZmrk_VPMOVSQDZ128mr_VPMOVSQDZ128mrk_VPMOVSQDZ256mr_VPMOVSQDZ256mrk_VPMOVSQDZmr_VPMOVSQDZmrk_VPMOVSQWZ128mr_VPMOVSQWZ128mrk_VPMOVSQWZ256mr_VPMOVSQWZ256mrk_VPMOVSQWZmr_VPMOVSQWZmrk_VPMOVSWBZ128mr_VPMOVSWBZ128mrk_VPMOVSWBZ256mr_VPMOVSWBZ256mrk_VPMOVSWBZmr_VPMOVSWBZmrk_VPMOVUSDBZ128mr_VPMOVUSDBZ128mrk_VPMOVUSDBZ256mr_VPMOVUSDBZ256mrk_VPMOVUSDBZmr_VPMOVUSDBZmrk_VPMOVUSDWZ128mr_VPMOVUSDWZ128mrk_VPMOVUSDWZ256mr_VPMOVUSDWZ256mrk_VPMOVUSDWZmr_VPMOVUSDWZmrk_VPMOVUSQBZ128mr_VPMOVUSQBZ128mrk_VPMOVUSQBZ256mr_VPMOVUSQBZ256mrk_VPMOVUSQBZmr_VPMOVUSQBZmrk_VPMOVUSQDZ128mr_VPMOVUSQDZ128mrk_VPMOVUSQDZ256mr_VPMOVUSQDZ256mrk_VPMOVUSQDZmr_VPMOVUSQDZmrk_VPMOVUSQWZ128mr_VPMOVUSQWZ128mrk_VPMOVUSQWZ256mr_VPMOVUSQWZ256mrk_VPMOVUSQWZmr_VPMOVUSQWZmrk_VPMOVUSWBZ128mr_VPMOVUSWBZ128mrk_VPMOVUSWBZ256mr_VPMOVUSWBZ256mrk_VPMOVUSWBZmr_VPMOVUSWBZmrk_VPMOVWBZ128mr_VPMOVWBZ128mrk_VPMOVWBZ256mr_VPMOVWBZ256mrk_VPMOVWBZmr_VPMOVWBZmrk = 1281, |
| 23636 | VCOMPRESSPDZ128rr_VCOMPRESSPDZ128rrk_VCOMPRESSPDZ128rrkz_VCOMPRESSPSZ128rr_VCOMPRESSPSZ128rrk_VCOMPRESSPSZ128rrkz_VPCOMPRESSDZ128rr_VPCOMPRESSDZ128rrk_VPCOMPRESSDZ128rrkz_VPCOMPRESSQZ128rr_VPCOMPRESSQZ128rrk_VPCOMPRESSQZ128rrkz_VPERMWZ128rr_VPERMWZ128rrk_VPERMWZ128rrkz = 1282, |
| 23637 | VCOMPRESSPDZ256rr_VCOMPRESSPDZ256rrk_VCOMPRESSPDZ256rrkz_VCOMPRESSPSZ256rr_VCOMPRESSPSZ256rrk_VCOMPRESSPSZ256rrkz_VPCOMPRESSDZ256rr_VPCOMPRESSDZ256rrk_VPCOMPRESSDZ256rrkz_VPCOMPRESSQZ256rr_VPCOMPRESSQZ256rrk_VPCOMPRESSQZ256rrkz_VPERMWZ256rr_VPERMWZ256rrk_VPERMWZ256rrkz = 1283, |
| 23638 | VCOMPRESSPDZrr_VCOMPRESSPDZrrk_VCOMPRESSPDZrrkz_VCOMPRESSPSZrr_VCOMPRESSPSZrrk_VCOMPRESSPSZrrkz_VPCOMPRESSDZrr_VPCOMPRESSDZrrk_VPCOMPRESSDZrrkz_VPCOMPRESSQZrr_VPCOMPRESSQZrrk_VPCOMPRESSQZrrkz_VPERMWZrr_VPERMWZrrk_VPERMWZrrkz = 1284, |
| 23639 | VMOV64toPQIZrm_VMOVQI2PQIZrm = 1285, |
| 23640 | VMOVDI2PDIZrm = 1286, |
| 23641 | VCVTSI642SSZrr_VCVTSI642SSZrr_Int_VCVTSI642SSZrrb_Int_VCVTUSI642SSZrr_VCVTUSI642SSZrr_Int_VCVTUSI642SSZrrb_Int = 1287, |
| 23642 | VMOVSDZrm_VMOVSDZrm_alt_VMOVSDZrmk_VMOVSDZrmkz_VMOVSSZrm_VMOVSSZrm_alt_VMOVSSZrmk_VMOVSSZrmkz = 1288, |
| 23643 | VCVTDQ2PDZ256rr_VCVTDQ2PDZ256rrk_VCVTDQ2PDZ256rrkz_VCVTUDQ2PDZ256rr_VCVTUDQ2PDZ256rrk_VCVTUDQ2PDZ256rrkz = 1289, |
| 23644 | VCVTPD2DQZ256rr_VCVTPD2DQZ256rrk_VCVTPD2DQZ256rrkz_VCVTPD2UDQZ256rr_VCVTPD2UDQZ256rrk_VCVTPD2UDQZ256rrkz_VCVTTPD2DQZ256rr_VCVTTPD2DQZ256rrk_VCVTTPD2DQZ256rrkz_VCVTTPD2UDQZ256rr_VCVTTPD2UDQZ256rrk_VCVTTPD2UDQZ256rrkz = 1290, |
| 23645 | VCVTPS2PDYrr_VCVTPS2PDZ256rr_VCVTPS2PDZ256rrk_VCVTPS2PDZ256rrkz = 1291, |
| 23646 | VCVTPS2QQZ256rr_VCVTPS2QQZ256rrk_VCVTPS2QQZ256rrkz_VCVTPS2UQQZ256rr_VCVTPS2UQQZ256rrk_VCVTPS2UQQZ256rrkz_VCVTTPS2QQZ256rr_VCVTTPS2QQZ256rrk_VCVTTPS2QQZ256rrkz_VCVTTPS2UQQZ256rr_VCVTTPS2UQQZ256rrk_VCVTTPS2UQQZ256rrkz = 1292, |
| 23647 | VCVTQQ2PSZ256rr_VCVTQQ2PSZ256rrk_VCVTQQ2PSZ256rrkz_VCVTUQQ2PSZ256rr_VCVTUQQ2PSZ256rrk_VCVTUQQ2PSZ256rrkz = 1293, |
| 23648 | VCVTDQ2PDZrr_VCVTUDQ2PDZrr = 1294, |
| 23649 | VCVTPD2DQZrr_VCVTPD2UDQZrr_VCVTTPD2DQZrr_VCVTTPD2UDQZrr = 1295, |
| 23650 | VCVTPS2PDZrr = 1296, |
| 23651 | VCVTPS2QQZrr_VCVTPS2UQQZrr_VCVTTPS2QQZrr_VCVTTPS2UQQZrr = 1297, |
| 23652 | VCVTQQ2PSZrr_VCVTUQQ2PSZrr = 1298, |
| 23653 | VBLENDMPDZ128rm_VBLENDMPDZ128rmb_VBLENDMPDZ128rmbk_VBLENDMPDZ128rmbkz_VBLENDMPDZ128rmk_VBLENDMPDZ128rmkz_VBLENDMPSZ128rm_VBLENDMPSZ128rmb_VBLENDMPSZ128rmbk_VBLENDMPSZ128rmbkz_VBLENDMPSZ128rmk_VBLENDMPSZ128rmkz = 1299, |
| 23654 | VBROADCASTI32X2Z128rm_VBROADCASTI32X2Z128rmk_VBROADCASTI32X2Z128rmkz_VPBROADCASTDZ128rm_VPBROADCASTDZ128rmk_VPBROADCASTDZ128rmkz_VPBROADCASTQZ128rm_VPBROADCASTQZ128rmk_VPBROADCASTQZ128rmkz = 1300, |
| 23655 | VBROADCASTSSZ128rm_VBROADCASTSSZ128rmk_VBROADCASTSSZ128rmkz = 1301, |
| 23656 | VMOVAPDZ128rm_VMOVAPDZ128rmk_VMOVAPDZ128rmkz_VMOVAPSZ128rm_NOVLX_VMOVAPSZ128rm_VMOVAPSZ128rmk_VMOVAPSZ128rmkz_VMOVUPDZ128rm_VMOVUPDZ128rmk_VMOVUPDZ128rmkz_VMOVUPSZ128rm_NOVLX_VMOVUPSZ128rm_VMOVUPSZ128rmk_VMOVUPSZ128rmkz = 1302, |
| 23657 | VMOVDDUPZ128rm_VMOVDDUPZ128rmk_VMOVDDUPZ128rmkz_VMOVSHDUPZ128rm_VMOVSHDUPZ128rmk_VMOVSHDUPZ128rmkz_VMOVSLDUPZ128rm_VMOVSLDUPZ128rmk_VMOVSLDUPZ128rmkz = 1303, |
| 23658 | VMOVDQA32Z128rm_VMOVDQA32Z128rmk_VMOVDQA32Z128rmkz_VMOVDQA64Z128rm_VMOVDQA64Z128rmk_VMOVDQA64Z128rmkz_VMOVDQU16Z128rm_VMOVDQU16Z128rmk_VMOVDQU16Z128rmkz_VMOVDQU32Z128rm_VMOVDQU32Z128rmk_VMOVDQU32Z128rmkz_VMOVDQU64Z128rm_VMOVDQU64Z128rmk_VMOVDQU64Z128rmkz_VMOVDQU8Z128rm_VMOVDQU8Z128rmk_VMOVDQU8Z128rmkz = 1304, |
| 23659 | VPADDBZ128rm_VPADDBZ128rmk_VPADDBZ128rmkz_VPADDDZ128rm_VPADDDZ128rmb_VPADDDZ128rmbk_VPADDDZ128rmbkz_VPADDDZ128rmk_VPADDDZ128rmkz_VPADDQZ128rm_VPADDQZ128rmb_VPADDQZ128rmbk_VPADDQZ128rmbkz_VPADDQZ128rmk_VPADDQZ128rmkz_VPADDWZ128rm_VPADDWZ128rmk_VPADDWZ128rmkz_VPSUBBZ128rm_VPSUBBZ128rmk_VPSUBBZ128rmkz_VPSUBDZ128rm_VPSUBDZ128rmb_VPSUBDZ128rmbk_VPSUBDZ128rmbkz_VPSUBDZ128rmk_VPSUBDZ128rmkz_VPSUBQZ128rm_VPSUBQZ128rmb_VPSUBQZ128rmbk_VPSUBQZ128rmbkz_VPSUBQZ128rmk_VPSUBQZ128rmkz_VPSUBWZ128rm_VPSUBWZ128rmk_VPSUBWZ128rmkz_VPTERNLOGDZ128rmbi_VPTERNLOGDZ128rmbik_VPTERNLOGDZ128rmbikz_VPTERNLOGDZ128rmi_VPTERNLOGDZ128rmik_VPTERNLOGDZ128rmikz_VPTERNLOGQZ128rmbi_VPTERNLOGQZ128rmbik_VPTERNLOGQZ128rmbikz_VPTERNLOGQZ128rmi_VPTERNLOGQZ128rmik_VPTERNLOGQZ128rmikz = 1305, |
| 23660 | VPBLENDMBZ128rm_VPBLENDMBZ128rmk_VPBLENDMBZ128rmkz_VPBLENDMDZ128rm_VPBLENDMDZ128rmb_VPBLENDMDZ128rmbk_VPBLENDMDZ128rmbkz_VPBLENDMDZ128rmk_VPBLENDMDZ128rmkz_VPBLENDMQZ128rm_VPBLENDMQZ128rmb_VPBLENDMQZ128rmbk_VPBLENDMQZ128rmbkz_VPBLENDMQZ128rmk_VPBLENDMQZ128rmkz_VPBLENDMWZ128rm_VPBLENDMWZ128rmk_VPBLENDMWZ128rmkz = 1306, |
| 23661 | VPERMI2WZ128rr_VPERMI2WZ128rrk_VPERMI2WZ128rrkz_VPERMT2WZ128rr_VPERMT2WZ128rrk_VPERMT2WZ128rrkz = 1307, |
| 23662 | VPERMI2WZ256rr_VPERMI2WZ256rrk_VPERMI2WZ256rrkz_VPERMT2WZ256rr_VPERMT2WZ256rrk_VPERMT2WZ256rrkz = 1308, |
| 23663 | VPERMI2WZrr_VPERMI2WZrrk_VPERMI2WZrrkz_VPERMT2WZrr_VPERMT2WZrrk_VPERMT2WZrrkz = 1309, |
| 23664 | VCVTSS2SI64Zrr_VCVTSS2SI64Zrr_Int_VCVTSS2SI64Zrrb_Int_VCVTTSS2SI64Zrr_VCVTTSS2SI64Zrr_Int_VCVTTSS2SI64Zrrb_Int_VCVTSS2USI64Zrr_Int_VCVTSS2USI64Zrrb_Int_VCVTTSS2USI64Zrr_VCVTTSS2USI64Zrr_Int_VCVTTSS2USI64Zrrb_Int = 1310, |
| 23665 | KMOVBkm_KMOVBkm_EVEX_KMOVDkm_KMOVDkm_EVEX_KMOVQkm_KMOVQkm_EVEX_KMOVWkm_KMOVWkm_EVEX = 1311, |
| 23666 | VCOMPRESSPDZ128mr_VCOMPRESSPDZ128mrk_VCOMPRESSPDZ256mr_VCOMPRESSPDZ256mrk_VCOMPRESSPDZmr_VCOMPRESSPDZmrk_VCOMPRESSPSZ128mr_VCOMPRESSPSZ128mrk_VCOMPRESSPSZ256mr_VCOMPRESSPSZ256mrk_VCOMPRESSPSZmr_VCOMPRESSPSZmrk_VPCOMPRESSDZ128mr_VPCOMPRESSDZ128mrk_VPCOMPRESSDZ256mr_VPCOMPRESSDZ256mrk_VPCOMPRESSDZmr_VPCOMPRESSDZmrk_VPCOMPRESSQZ128mr_VPCOMPRESSQZ128mrk_VPCOMPRESSQZ256mr_VPCOMPRESSQZ256mrk_VPCOMPRESSQZmr_VPCOMPRESSQZmrk = 1312, |
| 23667 | VPSCATTERDQZ128mr_VPSCATTERQQZ128mr_VSCATTERDPDZ128mr_VSCATTERQPDZ128mr = 1313, |
| 23668 | VPSCATTERDQZ256mr_VPSCATTERQQZ256mr_VSCATTERDPDZ256mr_VSCATTERQPDZ256mr = 1314, |
| 23669 | VPSCATTERDQZmr_VPSCATTERQDZmr_VPSCATTERQQZmr_VSCATTERDPDZmr_VSCATTERQPSZmr_VSCATTERQPDZmr = 1315, |
| 23670 | VSCATTERDPSZmr = 1316, |
| 23671 | VPBROADCASTBZ256rm_VPBROADCASTBZ256rmk_VPBROADCASTBZ256rmkz_VPBROADCASTBZrm_VPBROADCASTBZrmk_VPBROADCASTBZrmkz_VPBROADCASTWZ256rm_VPBROADCASTWZ256rmk_VPBROADCASTWZ256rmkz_VPBROADCASTWZrm_VPBROADCASTWZrmk_VPBROADCASTWZrmkz = 1317, |
| 23672 | VBLENDMPDZ256rm_VBLENDMPDZ256rmb_VBLENDMPDZ256rmbk_VBLENDMPDZ256rmbkz_VBLENDMPDZ256rmk_VBLENDMPDZ256rmkz_VBLENDMPSZ256rm_VBLENDMPSZ256rmb_VBLENDMPSZ256rmbk_VBLENDMPSZ256rmbkz_VBLENDMPSZ256rmk_VBLENDMPSZ256rmkz = 1318, |
| 23673 | VBLENDMPDZrm_VBLENDMPDZrmb_VBLENDMPDZrmbk_VBLENDMPDZrmbkz_VBLENDMPDZrmk_VBLENDMPDZrmkz_VBLENDMPSZrm_VBLENDMPSZrmb_VBLENDMPSZrmbk_VBLENDMPSZrmbkz_VBLENDMPSZrmk_VBLENDMPSZrmkz = 1319, |
| 23674 | VBROADCASTF32X2Z256rm_VBROADCASTF32X2Z256rmk_VBROADCASTF32X2Z256rmkz_VBROADCASTF32X2Zrm_VBROADCASTF32X2Zrmk_VBROADCASTF32X2Zrmkz_VBROADCASTI32X2Z256rm_VBROADCASTI32X2Z256rmk_VBROADCASTI32X2Z256rmkz_VBROADCASTI32X2Zrm_VBROADCASTI32X2Zrmk_VBROADCASTI32X2Zrmkz_VPBROADCASTDZ256rm_VPBROADCASTDZ256rmk_VPBROADCASTDZ256rmkz_VPBROADCASTDZrm_VPBROADCASTDZrmk_VPBROADCASTDZrmkz_VPBROADCASTQZ256rm_VPBROADCASTQZ256rmk_VPBROADCASTQZ256rmkz_VPBROADCASTQZrm_VPBROADCASTQZrmk_VPBROADCASTQZrmkz = 1320, |
| 23675 | VBROADCASTF32X4Z256rm_VBROADCASTF32X4Z256rmk_VBROADCASTF32X4Z256rmkz_VBROADCASTF32X4Zrm_VBROADCASTF32X4Zrmk_VBROADCASTF32X4Zrmkz_VBROADCASTF32X8Zrm_VBROADCASTF32X8Zrmk_VBROADCASTF32X8Zrmkz_VBROADCASTF64X2Z256rm_VBROADCASTF64X2Z256rmk_VBROADCASTF64X2Z256rmkz_VBROADCASTF64X2Zrm_VBROADCASTF64X2Zrmk_VBROADCASTF64X2Zrmkz_VBROADCASTF64X4Zrm_VBROADCASTF64X4Zrmk_VBROADCASTF64X4Zrmkz_VBROADCASTI32X4Z256rm_VBROADCASTI32X4Z256rmk_VBROADCASTI32X4Z256rmkz_VBROADCASTI32X4Zrm_VBROADCASTI32X4Zrmk_VBROADCASTI32X4Zrmkz_VBROADCASTI32X8Zrm_VBROADCASTI32X8Zrmk_VBROADCASTI32X8Zrmkz_VBROADCASTI64X2Z256rm_VBROADCASTI64X2Z256rmk_VBROADCASTI64X2Z256rmkz_VBROADCASTI64X2Zrm_VBROADCASTI64X2Zrmk_VBROADCASTI64X2Zrmkz_VBROADCASTI64X4Zrm_VBROADCASTI64X4Zrmk_VBROADCASTI64X4Zrmkz = 1321, |
| 23676 | VBROADCASTSDZ256rm_VBROADCASTSDZ256rmk_VBROADCASTSDZ256rmkz_VBROADCASTSDZrm_VBROADCASTSDZrmk_VBROADCASTSDZrmkz_VBROADCASTSSZ256rm_VBROADCASTSSZ256rmk_VBROADCASTSSZ256rmkz_VBROADCASTSSZrm_VBROADCASTSSZrmk_VBROADCASTSSZrmkz = 1322, |
| 23677 | VINSERTF32X4Z256rmi_VINSERTF32X4Z256rmik_VINSERTF32X4Z256rmikz_VINSERTF32X4Zrmi_VINSERTF32X4Zrmik_VINSERTF32X4Zrmikz_VINSERTF32X8Zrmi_VINSERTF32X8Zrmik_VINSERTF32X8Zrmikz_VINSERTF64X2Z256rmi_VINSERTF64X2Z256rmik_VINSERTF64X2Z256rmikz_VINSERTF64X2Zrmi_VINSERTF64X2Zrmik_VINSERTF64X2Zrmikz_VINSERTF64X4Zrmi_VINSERTF64X4Zrmik_VINSERTF64X4Zrmikz = 1323, |
| 23678 | VINSERTI32X4Z256rmi_VINSERTI32X4Z256rmik_VINSERTI32X4Z256rmikz_VINSERTI32X4Zrmi_VINSERTI32X4Zrmik_VINSERTI32X4Zrmikz_VINSERTI32X8Zrmi_VINSERTI32X8Zrmik_VINSERTI32X8Zrmikz_VINSERTI64X2Z256rmi_VINSERTI64X2Z256rmik_VINSERTI64X2Z256rmikz_VINSERTI64X2Zrmi_VINSERTI64X2Zrmik_VINSERTI64X2Zrmikz_VINSERTI64X4Zrmi_VINSERTI64X4Zrmik_VINSERTI64X4Zrmikz = 1324, |
| 23679 | VMOVAPDZ256rm_VMOVAPDZ256rmk_VMOVAPDZ256rmkz_VMOVAPDZrm_VMOVAPDZrmk_VMOVAPDZrmkz_VMOVAPSZ256rm_NOVLX_VMOVAPSZ256rm_VMOVAPSZ256rmk_VMOVAPSZ256rmkz_VMOVAPSZrm_VMOVAPSZrmk_VMOVAPSZrmkz_VMOVUPDZ256rm_VMOVUPDZ256rmk_VMOVUPDZ256rmkz_VMOVUPDZrm_VMOVUPDZrmk_VMOVUPDZrmkz_VMOVUPSZ256rm_NOVLX_VMOVUPSZ256rm_VMOVUPSZ256rmk_VMOVUPSZ256rmkz_VMOVUPSZrm_VMOVUPSZrmk_VMOVUPSZrmkz = 1325, |
| 23680 | VMOVDDUPZ256rm_VMOVDDUPZ256rmk_VMOVDDUPZ256rmkz_VMOVSHDUPZ256rm_VMOVSHDUPZ256rmk_VMOVSHDUPZ256rmkz_VMOVSLDUPZ256rm_VMOVSLDUPZ256rmk_VMOVSLDUPZ256rmkz = 1326, |
| 23681 | VMOVDDUPZrm_VMOVDDUPZrmk_VMOVDDUPZrmkz_VMOVSHDUPZrm_VMOVSHDUPZrmk_VMOVSHDUPZrmkz_VMOVSLDUPZrm_VMOVSLDUPZrmk_VMOVSLDUPZrmkz = 1327, |
| 23682 | VMOVDQA32Z256rm_VMOVDQA32Z256rmk_VMOVDQA32Z256rmkz_VMOVDQA32Zrm_VMOVDQA32Zrmk_VMOVDQA32Zrmkz_VMOVDQA64Z256rm_VMOVDQA64Z256rmk_VMOVDQA64Z256rmkz_VMOVDQA64Zrm_VMOVDQA64Zrmk_VMOVDQA64Zrmkz_VMOVDQU16Z256rm_VMOVDQU16Z256rmk_VMOVDQU16Z256rmkz_VMOVDQU16Zrm_VMOVDQU16Zrmk_VMOVDQU16Zrmkz_VMOVDQU32Z256rm_VMOVDQU32Z256rmk_VMOVDQU32Z256rmkz_VMOVDQU32Zrm_VMOVDQU32Zrmk_VMOVDQU32Zrmkz_VMOVDQU64Z256rm_VMOVDQU64Z256rmk_VMOVDQU64Z256rmkz_VMOVDQU64Zrm_VMOVDQU64Zrmk_VMOVDQU64Zrmkz_VMOVDQU8Z256rm_VMOVDQU8Z256rmk_VMOVDQU8Z256rmkz_VMOVDQU8Zrm_VMOVDQU8Zrmk_VMOVDQU8Zrmkz = 1328, |
| 23683 | VPADDBZ256rm_VPADDBZ256rmk_VPADDBZ256rmkz_VPADDDZ256rm_VPADDDZ256rmb_VPADDDZ256rmbk_VPADDDZ256rmbkz_VPADDDZ256rmk_VPADDDZ256rmkz_VPADDQZ256rm_VPADDQZ256rmb_VPADDQZ256rmbk_VPADDQZ256rmbkz_VPADDQZ256rmk_VPADDQZ256rmkz_VPADDWZ256rm_VPADDWZ256rmk_VPADDWZ256rmkz_VPSUBBZ256rm_VPSUBBZ256rmk_VPSUBBZ256rmkz_VPSUBDZ256rm_VPSUBDZ256rmb_VPSUBDZ256rmbk_VPSUBDZ256rmbkz_VPSUBDZ256rmk_VPSUBDZ256rmkz_VPSUBQZ256rm_VPSUBQZ256rmb_VPSUBQZ256rmbk_VPSUBQZ256rmbkz_VPSUBQZ256rmk_VPSUBQZ256rmkz_VPSUBWZ256rm_VPSUBWZ256rmk_VPSUBWZ256rmkz_VPTERNLOGDZ256rmbi_VPTERNLOGDZ256rmbik_VPTERNLOGDZ256rmbikz_VPTERNLOGDZ256rmi_VPTERNLOGDZ256rmik_VPTERNLOGDZ256rmikz_VPTERNLOGQZ256rmbi_VPTERNLOGQZ256rmbik_VPTERNLOGQZ256rmbikz_VPTERNLOGQZ256rmi_VPTERNLOGQZ256rmik_VPTERNLOGQZ256rmikz = 1329, |
| 23684 | VPADDBZrm_VPADDBZrmk_VPADDBZrmkz_VPADDDZrm_VPADDDZrmb_VPADDDZrmbk_VPADDDZrmbkz_VPADDDZrmk_VPADDDZrmkz_VPADDQZrm_VPADDQZrmb_VPADDQZrmbk_VPADDQZrmbkz_VPADDQZrmk_VPADDQZrmkz_VPADDWZrm_VPADDWZrmk_VPADDWZrmkz_VPSUBBZrm_VPSUBBZrmk_VPSUBBZrmkz_VPSUBDZrm_VPSUBDZrmb_VPSUBDZrmbk_VPSUBDZrmbkz_VPSUBDZrmk_VPSUBDZrmkz_VPSUBQZrm_VPSUBQZrmb_VPSUBQZrmbk_VPSUBQZrmbkz_VPSUBQZrmk_VPSUBQZrmkz_VPSUBWZrm_VPSUBWZrmk_VPSUBWZrmkz_VPTERNLOGDZrmbi_VPTERNLOGDZrmbik_VPTERNLOGDZrmbikz_VPTERNLOGDZrmi_VPTERNLOGDZrmik_VPTERNLOGDZrmikz_VPTERNLOGQZrmbi_VPTERNLOGQZrmbik_VPTERNLOGQZrmbikz_VPTERNLOGQZrmi_VPTERNLOGQZrmik_VPTERNLOGQZrmikz = 1330, |
| 23685 | VPBLENDMBZ256rm_VPBLENDMBZ256rmk_VPBLENDMBZ256rmkz_VPBLENDMDZ256rm_VPBLENDMDZ256rmb_VPBLENDMDZ256rmbk_VPBLENDMDZ256rmbkz_VPBLENDMDZ256rmk_VPBLENDMDZ256rmkz_VPBLENDMQZ256rm_VPBLENDMQZ256rmb_VPBLENDMQZ256rmbk_VPBLENDMQZ256rmbkz_VPBLENDMQZ256rmk_VPBLENDMQZ256rmkz_VPBLENDMWZ256rm_VPBLENDMWZ256rmk_VPBLENDMWZ256rmkz = 1331, |
| 23686 | VPBLENDMBZrm_VPBLENDMBZrmk_VPBLENDMBZrmkz_VPBLENDMDZrm_VPBLENDMDZrmb_VPBLENDMDZrmbk_VPBLENDMDZrmbkz_VPBLENDMDZrmk_VPBLENDMDZrmkz_VPBLENDMQZrm_VPBLENDMQZrmb_VPBLENDMQZrmbk_VPBLENDMQZrmbkz_VPBLENDMQZrmk_VPBLENDMQZrmkz_VPBLENDMWZrm_VPBLENDMWZrmk_VPBLENDMWZrmkz = 1332, |
| 23687 | VPSCATTERQDZ128mr_VPSCATTERQDZ256mr_VSCATTERQPSZ128mr_VSCATTERQPSZ256mr = 1333, |
| 23688 | VPSCATTERDDZ128mr_VSCATTERDPSZ128mr = 1334, |
| 23689 | VPSCATTERDDZ256mr_VSCATTERDPSZ256mr = 1335, |
| 23690 | VPSCATTERDDZmr = 1336, |
| 23691 | VALIGNDZ128rmbi_VALIGNDZ128rmbik_VALIGNDZ128rmbikz_VALIGNDZ128rmi_VALIGNDZ128rmik_VALIGNDZ128rmikz_VALIGNQZ128rmbi_VALIGNQZ128rmbik_VALIGNQZ128rmbikz_VALIGNQZ128rmi_VALIGNQZ128rmik_VALIGNQZ128rmikz = 1337, |
| 23692 | VFPCLASSSDZmi_VFPCLASSSDZmik_VFPCLASSSSZmi_VFPCLASSSSZmik = 1338, |
| 23693 | VPERMI2DZ128rm_VPERMI2DZ128rmb_VPERMI2DZ128rmbk_VPERMI2DZ128rmbkz_VPERMI2DZ128rmk_VPERMI2DZ128rmkz_VPERMI2QZ128rm_VPERMI2QZ128rmb_VPERMI2QZ128rmbk_VPERMI2QZ128rmbkz_VPERMI2QZ128rmk_VPERMI2QZ128rmkz_VPERMT2DZ128rm_VPERMT2DZ128rmb_VPERMT2DZ128rmbk_VPERMT2DZ128rmbkz_VPERMT2DZ128rmk_VPERMT2DZ128rmkz_VPERMT2QZ128rm_VPERMT2QZ128rmb_VPERMT2QZ128rmbk_VPERMT2QZ128rmbkz_VPERMT2QZ128rmk_VPERMT2QZ128rmkz = 1339, |
| 23694 | VPERMI2PDZ128rm_VPERMI2PDZ128rmb_VPERMI2PDZ128rmbk_VPERMI2PDZ128rmbkz_VPERMI2PDZ128rmk_VPERMI2PDZ128rmkz_VPERMI2PSZ128rm_VPERMI2PSZ128rmb_VPERMI2PSZ128rmbk_VPERMI2PSZ128rmbkz_VPERMI2PSZ128rmk_VPERMI2PSZ128rmkz_VPERMT2PDZ128rm_VPERMT2PDZ128rmb_VPERMT2PDZ128rmbk_VPERMT2PDZ128rmbkz_VPERMT2PDZ128rmk_VPERMT2PDZ128rmkz_VPERMT2PSZ128rm_VPERMT2PSZ128rmb_VPERMT2PSZ128rmbk_VPERMT2PSZ128rmbkz_VPERMT2PSZ128rmk_VPERMT2PSZ128rmkz = 1340, |
| 23695 | VPMAXSQZ128rm_VPMAXSQZ128rmb_VPMAXSQZ128rmbk_VPMAXSQZ128rmbkz_VPMAXSQZ128rmk_VPMAXSQZ128rmkz_VPMAXUQZ128rm_VPMAXUQZ128rmb_VPMAXUQZ128rmbk_VPMAXUQZ128rmbkz_VPMAXUQZ128rmk_VPMAXUQZ128rmkz_VPMINSQZ128rm_VPMINSQZ128rmb_VPMINSQZ128rmbk_VPMINSQZ128rmbkz_VPMINSQZ128rmk_VPMINSQZ128rmkz_VPMINUQZ128rm_VPMINUQZ128rmb_VPMINUQZ128rmbk_VPMINUQZ128rmbkz_VPMINUQZ128rmk_VPMINUQZ128rmkz = 1341, |
| 23696 | VCMPPDZ128rmbi_VCMPPDZ128rmbik_VCMPPDZ128rmi_VCMPPDZ128rmik_VCMPPSZ128rmbi_VCMPPSZ128rmbik_VCMPPSZ128rmi_VCMPPSZ128rmik_VFPCLASSPDZ128mbi_VFPCLASSPDZ128mbik_VFPCLASSPDZ128mi_VFPCLASSPDZ128mik_VFPCLASSPSZ128mbi_VFPCLASSPSZ128mbik_VFPCLASSPSZ128mi_VFPCLASSPSZ128mik = 1342, |
| 23697 | VCMPSDZrmi_VCMPSDZrmi_Int_VCMPSDZrmik_Int_VCMPSSZrmi_VCMPSSZrmi_Int_VCMPSSZrmik_Int = 1343, |
| 23698 | VPCMPBZ128rmi_VPCMPBZ128rmik_VPCMPDZ128rmbi_VPCMPDZ128rmbik_VPCMPDZ128rmi_VPCMPDZ128rmik_VPCMPEQBZ128rm_VPCMPEQBZ128rmk_VPCMPEQDZ128rm_VPCMPEQDZ128rmb_VPCMPEQDZ128rmbk_VPCMPEQDZ128rmk_VPCMPEQQZ128rm_VPCMPEQQZ128rmb_VPCMPEQQZ128rmbk_VPCMPEQQZ128rmk_VPCMPEQWZ128rm_VPCMPEQWZ128rmk_VPCMPGTBZ128rm_VPCMPGTBZ128rmk_VPCMPGTDZ128rm_VPCMPGTDZ128rmb_VPCMPGTDZ128rmbk_VPCMPGTDZ128rmk_VPCMPGTQZ128rm_VPCMPGTQZ128rmb_VPCMPGTQZ128rmbk_VPCMPGTQZ128rmk_VPCMPGTWZ128rm_VPCMPGTWZ128rmk_VPCMPQZ128rmbi_VPCMPQZ128rmbik_VPCMPQZ128rmi_VPCMPQZ128rmik_VPCMPUBZ128rmi_VPCMPUBZ128rmik_VPCMPUDZ128rmbi_VPCMPUDZ128rmbik_VPCMPUDZ128rmi_VPCMPUDZ128rmik_VPCMPUQZ128rmbi_VPCMPUQZ128rmbik_VPCMPUQZ128rmi_VPCMPUQZ128rmik_VPCMPUWZ128rmi_VPCMPUWZ128rmik_VPCMPWZ128rmi_VPCMPWZ128rmik = 1344, |
| 23699 | VPTESTMBZ128rm_VPTESTMBZ128rmk_VPTESTMDZ128rm_VPTESTMDZ128rmb_VPTESTMDZ128rmbk_VPTESTMDZ128rmk_VPTESTMQZ128rm_VPTESTMQZ128rmb_VPTESTMQZ128rmbk_VPTESTMQZ128rmk_VPTESTMWZ128rm_VPTESTMWZ128rmk_VPTESTNMBZ128rm_VPTESTNMBZ128rmk_VPTESTNMDZ128rm_VPTESTNMDZ128rmb_VPTESTNMDZ128rmbk_VPTESTNMDZ128rmk_VPTESTNMQZ128rm_VPTESTNMQZ128rmb_VPTESTNMQZ128rmbk_VPTESTNMQZ128rmk_VPTESTNMWZ128rm_VPTESTNMWZ128rmk = 1345, |
| 23700 | CVTPS2PDrm_VCVTPS2PDrm = 1346, |
| 23701 | VALIGNDZ256rmbi_VALIGNDZ256rmbik_VALIGNDZ256rmbikz_VALIGNDZ256rmi_VALIGNDZ256rmik_VALIGNDZ256rmikz_VALIGNQZ256rmbi_VALIGNQZ256rmbik_VALIGNQZ256rmbikz_VALIGNQZ256rmi_VALIGNQZ256rmik_VALIGNQZ256rmikz = 1347, |
| 23702 | VALIGNDZrmbi_VALIGNDZrmbik_VALIGNDZrmbikz_VALIGNDZrmi_VALIGNDZrmik_VALIGNDZrmikz_VALIGNQZrmbi_VALIGNQZrmbik_VALIGNQZrmbikz_VALIGNQZrmi_VALIGNQZrmik_VALIGNQZrmikz = 1348, |
| 23703 | VPMAXSQZ256rm_VPMAXSQZ256rmb_VPMAXSQZ256rmbk_VPMAXSQZ256rmbkz_VPMAXSQZ256rmk_VPMAXSQZ256rmkz_VPMAXUQZ256rm_VPMAXUQZ256rmb_VPMAXUQZ256rmbk_VPMAXUQZ256rmbkz_VPMAXUQZ256rmk_VPMAXUQZ256rmkz_VPMINSQZ256rm_VPMINSQZ256rmb_VPMINSQZ256rmbk_VPMINSQZ256rmbkz_VPMINSQZ256rmk_VPMINSQZ256rmkz_VPMINUQZ256rm_VPMINUQZ256rmb_VPMINUQZ256rmbk_VPMINUQZ256rmbkz_VPMINUQZ256rmk_VPMINUQZ256rmkz = 1349, |
| 23704 | VPMAXSQZrm_VPMAXSQZrmb_VPMAXSQZrmbk_VPMAXSQZrmbkz_VPMAXSQZrmk_VPMAXSQZrmkz_VPMAXUQZrm_VPMAXUQZrmb_VPMAXUQZrmbk_VPMAXUQZrmbkz_VPMAXUQZrmk_VPMAXUQZrmkz_VPMINSQZrm_VPMINSQZrmb_VPMINSQZrmbk_VPMINSQZrmbkz_VPMINSQZrmk_VPMINSQZrmkz_VPMINUQZrm_VPMINUQZrmb_VPMINUQZrmbk_VPMINUQZrmbkz_VPMINUQZrmk_VPMINUQZrmkz = 1350, |
| 23705 | VCMPPDZ256rmbi_VCMPPDZ256rmbik_VCMPPDZ256rmi_VCMPPDZ256rmik_VCMPPSZ256rmbi_VCMPPSZ256rmbik_VCMPPSZ256rmi_VCMPPSZ256rmik_VFPCLASSPDZ256mbi_VFPCLASSPDZ256mbik_VFPCLASSPDZ256mi_VFPCLASSPDZ256mik_VFPCLASSPSZ256mbi_VFPCLASSPSZ256mbik_VFPCLASSPSZ256mi_VFPCLASSPSZ256mik = 1351, |
| 23706 | VCMPPDZrmbi_VCMPPDZrmbik_VCMPPDZrmi_VCMPPDZrmik_VCMPPSZrmbi_VCMPPSZrmbik_VCMPPSZrmi_VCMPPSZrmik_VFPCLASSPDZmbi_VFPCLASSPDZmbik_VFPCLASSPDZmi_VFPCLASSPDZmik_VFPCLASSPSZmbi_VFPCLASSPSZmbik_VFPCLASSPSZmi_VFPCLASSPSZmik = 1352, |
| 23707 | VPCMPBZ256rmi_VPCMPBZ256rmik_VPCMPDZ256rmbi_VPCMPDZ256rmbik_VPCMPDZ256rmi_VPCMPDZ256rmik_VPCMPEQBZ256rm_VPCMPEQBZ256rmk_VPCMPEQDZ256rm_VPCMPEQDZ256rmb_VPCMPEQDZ256rmbk_VPCMPEQDZ256rmk_VPCMPEQQZ256rm_VPCMPEQQZ256rmb_VPCMPEQQZ256rmbk_VPCMPEQQZ256rmk_VPCMPEQWZ256rm_VPCMPEQWZ256rmk_VPCMPGTBZ256rm_VPCMPGTBZ256rmk_VPCMPGTDZ256rm_VPCMPGTDZ256rmb_VPCMPGTDZ256rmbk_VPCMPGTDZ256rmk_VPCMPGTQZ256rm_VPCMPGTQZ256rmb_VPCMPGTQZ256rmbk_VPCMPGTQZ256rmk_VPCMPGTWZ256rm_VPCMPGTWZ256rmk_VPCMPQZ256rmbi_VPCMPQZ256rmbik_VPCMPQZ256rmi_VPCMPQZ256rmik_VPCMPUBZ256rmi_VPCMPUBZ256rmik_VPCMPUDZ256rmbi_VPCMPUDZ256rmbik_VPCMPUDZ256rmi_VPCMPUDZ256rmik_VPCMPUQZ256rmbi_VPCMPUQZ256rmbik_VPCMPUQZ256rmi_VPCMPUQZ256rmik_VPCMPUWZ256rmi_VPCMPUWZ256rmik_VPCMPWZ256rmi_VPCMPWZ256rmik = 1353, |
| 23708 | VPCMPBZrmi_VPCMPBZrmik_VPCMPDZrmbi_VPCMPDZrmbik_VPCMPDZrmi_VPCMPDZrmik_VPCMPEQBZrm_VPCMPEQBZrmk_VPCMPEQDZrm_VPCMPEQDZrmb_VPCMPEQDZrmbk_VPCMPEQDZrmk_VPCMPEQQZrm_VPCMPEQQZrmb_VPCMPEQQZrmbk_VPCMPEQQZrmk_VPCMPEQWZrm_VPCMPEQWZrmk_VPCMPGTBZrm_VPCMPGTBZrmk_VPCMPGTDZrm_VPCMPGTDZrmb_VPCMPGTDZrmbk_VPCMPGTDZrmk_VPCMPGTQZrm_VPCMPGTQZrmb_VPCMPGTQZrmbk_VPCMPGTQZrmk_VPCMPGTWZrm_VPCMPGTWZrmk_VPCMPQZrmbi_VPCMPQZrmbik_VPCMPQZrmi_VPCMPQZrmik_VPCMPUBZrmi_VPCMPUBZrmik_VPCMPUDZrmbi_VPCMPUDZrmbik_VPCMPUDZrmi_VPCMPUDZrmik_VPCMPUQZrmbi_VPCMPUQZrmbik_VPCMPUQZrmi_VPCMPUQZrmik_VPCMPUWZrmi_VPCMPUWZrmik_VPCMPWZrmi_VPCMPWZrmik = 1354, |
| 23709 | VPTESTMBZ256rm_VPTESTMBZ256rmk_VPTESTMDZ256rm_VPTESTMDZ256rmb_VPTESTMDZ256rmbk_VPTESTMDZ256rmk_VPTESTMQZ256rm_VPTESTMQZ256rmb_VPTESTMQZ256rmbk_VPTESTMQZ256rmk_VPTESTMWZ256rm_VPTESTMWZ256rmk_VPTESTNMBZ256rm_VPTESTNMBZ256rmk_VPTESTNMDZ256rm_VPTESTNMDZ256rmb_VPTESTNMDZ256rmbk_VPTESTNMDZ256rmk_VPTESTNMQZ256rm_VPTESTNMQZ256rmb_VPTESTNMQZ256rmbk_VPTESTNMQZ256rmk_VPTESTNMWZ256rm_VPTESTNMWZ256rmk = 1355, |
| 23710 | VPTESTMBZrm_VPTESTMBZrmk_VPTESTMDZrm_VPTESTMDZrmb_VPTESTMDZrmbk_VPTESTMDZrmk_VPTESTMQZrm_VPTESTMQZrmb_VPTESTMQZrmbk_VPTESTMQZrmk_VPTESTMWZrm_VPTESTMWZrmk_VPTESTNMBZrm_VPTESTNMBZrmk_VPTESTNMDZrm_VPTESTNMDZrmb_VPTESTNMDZrmbk_VPTESTNMDZrmk_VPTESTNMQZrm_VPTESTNMQZrmb_VPTESTNMQZrmbk_VPTESTNMQZrmk_VPTESTNMWZrm_VPTESTNMWZrmk = 1356, |
| 23711 | VCVTDQ2PDZ128rm_VCVTDQ2PDZ128rmb_VCVTDQ2PDZ128rmbk_VCVTDQ2PDZ128rmbkz_VCVTDQ2PDZ128rmk_VCVTDQ2PDZ128rmkz_VCVTQQ2PDZ128rm_VCVTQQ2PDZ128rmb_VCVTQQ2PDZ128rmbk_VCVTQQ2PDZ128rmbkz_VCVTQQ2PDZ128rmk_VCVTQQ2PDZ128rmkz_VCVTUDQ2PDZ128rm_VCVTUDQ2PDZ128rmb_VCVTUDQ2PDZ128rmbk_VCVTUDQ2PDZ128rmbkz_VCVTUDQ2PDZ128rmk_VCVTUDQ2PDZ128rmkz_VCVTUQQ2PDZ128rm_VCVTUQQ2PDZ128rmb_VCVTUQQ2PDZ128rmbk_VCVTUQQ2PDZ128rmbkz_VCVTUQQ2PDZ128rmk_VCVTUQQ2PDZ128rmkz = 1357, |
| 23712 | VCVTDQ2PSZ128rm_VCVTDQ2PSZ128rmb_VCVTDQ2PSZ128rmbk_VCVTDQ2PSZ128rmbkz_VCVTDQ2PSZ128rmk_VCVTDQ2PSZ128rmkz_CVTDQ2PSrm_VCVTDQ2PSrm_VCVTQQ2PSZ128rm_VCVTQQ2PSZ128rmb_VCVTQQ2PSZ128rmbk_VCVTQQ2PSZ128rmbkz_VCVTQQ2PSZ128rmk_VCVTQQ2PSZ128rmkz_VCVTUDQ2PSZ128rm_VCVTUDQ2PSZ128rmb_VCVTUDQ2PSZ128rmbk_VCVTUDQ2PSZ128rmbkz_VCVTUDQ2PSZ128rmk_VCVTUDQ2PSZ128rmkz_VCVTUQQ2PSZ128rm_VCVTUQQ2PSZ128rmb_VCVTUQQ2PSZ128rmbk_VCVTUQQ2PSZ128rmbkz_VCVTUQQ2PSZ128rmk_VCVTUQQ2PSZ128rmkz = 1358, |
| 23713 | VCVTPD2QQZ128rm_VCVTPD2QQZ128rmb_VCVTPD2QQZ128rmbk_VCVTPD2QQZ128rmbkz_VCVTPD2QQZ128rmk_VCVTPD2QQZ128rmkz_VCVTPD2UQQZ128rm_VCVTPD2UQQZ128rmb_VCVTPD2UQQZ128rmbk_VCVTPD2UQQZ128rmbkz_VCVTPD2UQQZ128rmk_VCVTPD2UQQZ128rmkz_VCVTTPD2QQZ128rm_VCVTTPD2QQZ128rmb_VCVTTPD2QQZ128rmbk_VCVTTPD2QQZ128rmbkz_VCVTTPD2QQZ128rmk_VCVTTPD2QQZ128rmkz_VCVTTPD2UQQZ128rm_VCVTTPD2UQQZ128rmb_VCVTTPD2UQQZ128rmbk_VCVTTPD2UQQZ128rmbkz_VCVTTPD2UQQZ128rmk_VCVTTPD2UQQZ128rmkz = 1359, |
| 23714 | VCVTPH2PSZ128rm_VCVTPH2PSZ128rmk_VCVTPH2PSZ128rmkz = 1360, |
| 23715 | VCVTPS2DQZ128rm_VCVTPS2DQZ128rmb_VCVTPS2DQZ128rmbk_VCVTPS2DQZ128rmbkz_VCVTPS2DQZ128rmk_VCVTPS2DQZ128rmkz_CVTPS2DQrm_VCVTPS2DQrm_VCVTPS2QQZ128rm_VCVTPS2QQZ128rmb_VCVTPS2QQZ128rmbk_VCVTPS2QQZ128rmbkz_VCVTPS2QQZ128rmk_VCVTPS2QQZ128rmkz_VCVTPS2UDQZ128rm_VCVTPS2UDQZ128rmb_VCVTPS2UDQZ128rmbk_VCVTPS2UDQZ128rmbkz_VCVTPS2UDQZ128rmk_VCVTPS2UDQZ128rmkz_VCVTPS2UQQZ128rm_VCVTPS2UQQZ128rmb_VCVTPS2UQQZ128rmbk_VCVTPS2UQQZ128rmbkz_VCVTPS2UQQZ128rmk_VCVTPS2UQQZ128rmkz_VCVTTPS2DQZ128rm_VCVTTPS2DQZ128rmb_VCVTTPS2DQZ128rmbk_VCVTTPS2DQZ128rmbkz_VCVTTPS2DQZ128rmk_VCVTTPS2DQZ128rmkz_CVTTPS2DQrm_VCVTTPS2DQrm_VCVTTPS2QQZ128rm_VCVTTPS2QQZ128rmb_VCVTTPS2QQZ128rmbk_VCVTTPS2QQZ128rmbkz_VCVTTPS2QQZ128rmk_VCVTTPS2QQZ128rmkz_VCVTTPS2UDQZ128rm_VCVTTPS2UDQZ128rmb_VCVTTPS2UDQZ128rmbk_VCVTTPS2UDQZ128rmbkz_VCVTTPS2UDQZ128rmk_VCVTTPS2UDQZ128rmkz_VCVTTPS2UQQZ128rm_VCVTTPS2UQQZ128rmb_VCVTTPS2UQQZ128rmbk_VCVTTPS2UQQZ128rmbkz_VCVTTPS2UQQZ128rmk_VCVTTPS2UQQZ128rmkz = 1361, |
| 23716 | VCVTPS2PDZ128rm_VCVTPS2PDZ128rmb_VCVTPS2PDZ128rmbk_VCVTPS2PDZ128rmbkz_VCVTPS2PDZ128rmk_VCVTPS2PDZ128rmkz = 1362, |
| 23717 | VCVTSS2SDZrm_VCVTSS2SDZrm_Int_VCVTSS2SDZrmk_Int_VCVTSS2SDZrmkz_Int_CVTSS2SDrm_CVTSS2SDrm_Int_VCVTSS2SDrm_VCVTSS2SDrm_Int = 1363, |
| 23718 | VEXPANDPDZ128rm_VEXPANDPDZ128rmk_VEXPANDPDZ128rmkz_VEXPANDPSZ128rm_VEXPANDPSZ128rmk_VEXPANDPSZ128rmkz_VPEXPANDDZ128rm_VPEXPANDDZ128rmk_VPEXPANDDZ128rmkz_VPEXPANDQZ128rm_VPEXPANDQZ128rmk_VPEXPANDQZ128rmkz = 1364, |
| 23719 | VCVTDQ2PSYrm = 1365, |
| 23720 | VCVTPS2PDYrm = 1366, |
| 23721 | VCVTDQ2PDZ256rm_VCVTDQ2PDZ256rmb_VCVTDQ2PDZ256rmbk_VCVTDQ2PDZ256rmbkz_VCVTDQ2PDZ256rmk_VCVTDQ2PDZ256rmkz_VCVTQQ2PDZ256rm_VCVTQQ2PDZ256rmb_VCVTQQ2PDZ256rmbk_VCVTQQ2PDZ256rmbkz_VCVTQQ2PDZ256rmk_VCVTQQ2PDZ256rmkz_VCVTUDQ2PDZ256rm_VCVTUDQ2PDZ256rmb_VCVTUDQ2PDZ256rmbk_VCVTUDQ2PDZ256rmbkz_VCVTUDQ2PDZ256rmk_VCVTUDQ2PDZ256rmkz_VCVTUQQ2PDZ256rm_VCVTUQQ2PDZ256rmb_VCVTUQQ2PDZ256rmbk_VCVTUQQ2PDZ256rmbkz_VCVTUQQ2PDZ256rmk_VCVTUQQ2PDZ256rmkz = 1367, |
| 23722 | VCVTDQ2PDZrm_VCVTDQ2PDZrmb_VCVTDQ2PDZrmbk_VCVTDQ2PDZrmbkz_VCVTDQ2PDZrmk_VCVTDQ2PDZrmkz_VCVTQQ2PDZrm_VCVTQQ2PDZrmb_VCVTQQ2PDZrmbk_VCVTQQ2PDZrmbkz_VCVTQQ2PDZrmk_VCVTQQ2PDZrmkz_VCVTUDQ2PDZrm_VCVTUDQ2PDZrmb_VCVTUDQ2PDZrmbk_VCVTUDQ2PDZrmbkz_VCVTUDQ2PDZrmk_VCVTUDQ2PDZrmkz_VCVTUQQ2PDZrm_VCVTUQQ2PDZrmb_VCVTUQQ2PDZrmbk_VCVTUQQ2PDZrmbkz_VCVTUQQ2PDZrmk_VCVTUQQ2PDZrmkz = 1368, |
| 23723 | VCVTDQ2PSZ256rm_VCVTDQ2PSZ256rmb_VCVTDQ2PSZ256rmbk_VCVTDQ2PSZ256rmbkz_VCVTDQ2PSZ256rmk_VCVTDQ2PSZ256rmkz_VCVTQQ2PSZ256rm_VCVTQQ2PSZ256rmb_VCVTQQ2PSZ256rmbk_VCVTQQ2PSZ256rmbkz_VCVTQQ2PSZ256rmk_VCVTQQ2PSZ256rmkz_VCVTUDQ2PSZ256rm_VCVTUDQ2PSZ256rmb_VCVTUDQ2PSZ256rmbk_VCVTUDQ2PSZ256rmbkz_VCVTUDQ2PSZ256rmk_VCVTUDQ2PSZ256rmkz_VCVTUQQ2PSZ256rm_VCVTUQQ2PSZ256rmb_VCVTUQQ2PSZ256rmbk_VCVTUQQ2PSZ256rmbkz_VCVTUQQ2PSZ256rmk_VCVTUQQ2PSZ256rmkz = 1369, |
| 23724 | VCVTDQ2PSZrm_VCVTDQ2PSZrmb_VCVTDQ2PSZrmbk_VCVTDQ2PSZrmbkz_VCVTDQ2PSZrmk_VCVTDQ2PSZrmkz_VCVTUDQ2PSZrm_VCVTUDQ2PSZrmb_VCVTUDQ2PSZrmbk_VCVTUDQ2PSZrmbkz_VCVTUDQ2PSZrmk_VCVTUDQ2PSZrmkz = 1370, |
| 23725 | VCVTPH2PSZ256rm_VCVTPH2PSZ256rmk_VCVTPH2PSZ256rmkz = 1371, |
| 23726 | VCVTPH2PSZrm_VCVTPH2PSZrmk_VCVTPH2PSZrmkz = 1372, |
| 23727 | VCVTPS2PDZ256rm_VCVTPS2PDZ256rmb_VCVTPS2PDZ256rmbk_VCVTPS2PDZ256rmbkz_VCVTPS2PDZ256rmk_VCVTPS2PDZ256rmkz = 1373, |
| 23728 | VCVTPS2PDZrm_VCVTPS2PDZrmb_VCVTPS2PDZrmbk_VCVTPS2PDZrmbkz_VCVTPS2PDZrmk_VCVTPS2PDZrmkz = 1374, |
| 23729 | VCVTPD2QQZ256rm_VCVTPD2QQZ256rmb_VCVTPD2QQZ256rmbk_VCVTPD2QQZ256rmbkz_VCVTPD2QQZ256rmk_VCVTPD2QQZ256rmkz_VCVTTPD2QQZ256rm_VCVTTPD2QQZ256rmb_VCVTTPD2QQZ256rmbk_VCVTTPD2QQZ256rmbkz_VCVTTPD2QQZ256rmk_VCVTTPD2QQZ256rmkz_VCVTPD2UQQZ256rm_VCVTPD2UQQZ256rmb_VCVTPD2UQQZ256rmbk_VCVTPD2UQQZ256rmbkz_VCVTPD2UQQZ256rmk_VCVTPD2UQQZ256rmkz_VCVTTPD2UQQZ256rm_VCVTTPD2UQQZ256rmb_VCVTTPD2UQQZ256rmbk_VCVTTPD2UQQZ256rmbkz_VCVTTPD2UQQZ256rmk_VCVTTPD2UQQZ256rmkz = 1375, |
| 23730 | VCVTPD2QQZrm_VCVTPD2QQZrmb_VCVTPD2QQZrmbk_VCVTPD2QQZrmbkz_VCVTPD2QQZrmk_VCVTPD2QQZrmkz_VCVTTPD2QQZrm_VCVTTPD2QQZrmb_VCVTTPD2QQZrmbk_VCVTTPD2QQZrmbkz_VCVTTPD2QQZrmk_VCVTTPD2QQZrmkz_VCVTPD2UQQZrm_VCVTPD2UQQZrmb_VCVTPD2UQQZrmbk_VCVTPD2UQQZrmbkz_VCVTPD2UQQZrmk_VCVTPD2UQQZrmkz_VCVTTPD2UQQZrm_VCVTTPD2UQQZrmb_VCVTTPD2UQQZrmbk_VCVTTPD2UQQZrmbkz_VCVTTPD2UQQZrmk_VCVTTPD2UQQZrmkz = 1376, |
| 23731 | VCVTPS2DQYrm_VCVTTPS2DQYrm_VCVTPS2DQZ256rm_VCVTPS2DQZ256rmb_VCVTPS2DQZ256rmbk_VCVTPS2DQZ256rmbkz_VCVTPS2DQZ256rmk_VCVTPS2DQZ256rmkz_VCVTTPS2DQZ256rm_VCVTTPS2DQZ256rmb_VCVTTPS2DQZ256rmbk_VCVTTPS2DQZ256rmbkz_VCVTTPS2DQZ256rmk_VCVTTPS2DQZ256rmkz_VCVTPS2QQZ256rm_VCVTPS2QQZ256rmb_VCVTPS2QQZ256rmbk_VCVTPS2QQZ256rmbkz_VCVTPS2QQZ256rmk_VCVTPS2QQZ256rmkz_VCVTTPS2QQZ256rm_VCVTTPS2QQZ256rmb_VCVTTPS2QQZ256rmbk_VCVTTPS2QQZ256rmbkz_VCVTTPS2QQZ256rmk_VCVTTPS2QQZ256rmkz_VCVTPS2UDQZ256rm_VCVTPS2UDQZ256rmb_VCVTPS2UDQZ256rmbk_VCVTPS2UDQZ256rmbkz_VCVTPS2UDQZ256rmk_VCVTPS2UDQZ256rmkz_VCVTTPS2UDQZ256rm_VCVTTPS2UDQZ256rmb_VCVTTPS2UDQZ256rmbk_VCVTTPS2UDQZ256rmbkz_VCVTTPS2UDQZ256rmk_VCVTTPS2UDQZ256rmkz_VCVTPS2UQQZ256rm_VCVTPS2UQQZ256rmb_VCVTPS2UQQZ256rmbk_VCVTPS2UQQZ256rmbkz_VCVTPS2UQQZ256rmk_VCVTPS2UQQZ256rmkz_VCVTTPS2UQQZ256rm_VCVTTPS2UQQZ256rmb_VCVTTPS2UQQZ256rmbk_VCVTTPS2UQQZ256rmbkz_VCVTTPS2UQQZ256rmk_VCVTTPS2UQQZ256rmkz = 1377, |
| 23732 | VCVTPS2DQZrm_VCVTPS2DQZrmb_VCVTPS2DQZrmbk_VCVTPS2DQZrmbkz_VCVTPS2DQZrmk_VCVTPS2DQZrmkz_VCVTTPS2DQZrm_VCVTTPS2DQZrmb_VCVTTPS2DQZrmbk_VCVTTPS2DQZrmbkz_VCVTTPS2DQZrmk_VCVTTPS2DQZrmkz_VCVTPS2UDQZrm_VCVTPS2UDQZrmb_VCVTPS2UDQZrmbk_VCVTPS2UDQZrmbkz_VCVTPS2UDQZrmk_VCVTPS2UDQZrmkz_VCVTTPS2UDQZrm_VCVTTPS2UDQZrmb_VCVTTPS2UDQZrmbk_VCVTTPS2UDQZrmbkz_VCVTTPS2UDQZrmk_VCVTTPS2UDQZrmkz = 1378, |
| 23733 | VEXPANDPDZ256rm_VEXPANDPDZ256rmk_VEXPANDPDZ256rmkz_VEXPANDPDZrm_VEXPANDPDZrmk_VEXPANDPDZrmkz_VEXPANDPSZ256rm_VEXPANDPSZ256rmk_VEXPANDPSZ256rmkz_VEXPANDPSZrm_VEXPANDPSZrmk_VEXPANDPSZrmkz_VPEXPANDDZ256rm_VPEXPANDDZ256rmk_VPEXPANDDZ256rmkz_VPEXPANDDZrm_VPEXPANDDZrmk_VPEXPANDDZrmkz_VPEXPANDQZ256rm_VPEXPANDQZ256rmk_VPEXPANDQZ256rmkz_VPEXPANDQZrm_VPEXPANDQZrmk_VPEXPANDQZrmkz = 1379, |
| 23734 | CVTDQ2PDrm_VCVTDQ2PDrm = 1380, |
| 23735 | CVTPD2DQrm_CVTTPD2DQrm = 1381, |
| 23736 | VPCONFLICTQZ128rm_VPCONFLICTQZ128rmb_VPCONFLICTQZ128rmbk_VPCONFLICTQZ128rmbkz_VPCONFLICTQZ128rmk_VPCONFLICTQZ128rmkz = 1382, |
| 23737 | VPMULLQZ128rr_VPMULLQZ128rrk_VPMULLQZ128rrkz = 1383, |
| 23738 | VPMULLQZ256rr_VPMULLQZ256rrk_VPMULLQZ256rrkz = 1384, |
| 23739 | VPMULLQZrr_VPMULLQZrrk_VPMULLQZrrkz = 1385, |
| 23740 | VPERMWZ128rm_VPERMWZ128rmk_VPERMWZ128rmkz = 1386, |
| 23741 | VCVTSD2USIZrm_Int_VCVTTSD2USIZrm_VCVTTSD2USIZrm_Int = 1387, |
| 23742 | VCVTSS2USI64Zrm_Int_VCVTTSS2USI64Zrm_VCVTTSS2USI64Zrm_Int = 1388, |
| 23743 | VCVTPS2QQZrm_VCVTPS2QQZrmb_VCVTPS2QQZrmbk_VCVTPS2QQZrmbkz_VCVTPS2QQZrmk_VCVTPS2QQZrmkz_VCVTTPS2QQZrm_VCVTTPS2QQZrmb_VCVTTPS2QQZrmbk_VCVTTPS2QQZrmbkz_VCVTTPS2QQZrmk_VCVTTPS2QQZrmkz_VCVTPS2UQQZrm_VCVTPS2UQQZrmb_VCVTPS2UQQZrmbk_VCVTPS2UQQZrmbkz_VCVTPS2UQQZrmk_VCVTPS2UQQZrmkz_VCVTTPS2UQQZrm_VCVTTPS2UQQZrmb_VCVTTPS2UQQZrmbk_VCVTTPS2UQQZrmbkz_VCVTTPS2UQQZrmk_VCVTTPS2UQQZrmkz = 1389, |
| 23744 | VPERMWZ256rm_VPERMWZ256rmk_VPERMWZ256rmkz_VPERMWZrm_VPERMWZrmk_VPERMWZrmkz = 1390, |
| 23745 | VCVTDQ2PDYrm = 1391, |
| 23746 | VPERMI2WZ128rm_VPERMI2WZ128rmk_VPERMI2WZ128rmkz_VPERMT2WZ128rm_VPERMT2WZ128rmk_VPERMT2WZ128rmkz = 1392, |
| 23747 | VCVTPD2DQZrm_VCVTPD2DQZrmb_VCVTPD2DQZrmbk_VCVTPD2DQZrmbkz_VCVTPD2DQZrmk_VCVTPD2DQZrmkz_VCVTPD2UDQZrm_VCVTPD2UDQZrmb_VCVTPD2UDQZrmbk_VCVTPD2UDQZrmbkz_VCVTPD2UDQZrmk_VCVTPD2UDQZrmkz_VCVTTPD2DQZrm_VCVTTPD2DQZrmb_VCVTTPD2DQZrmbk_VCVTTPD2DQZrmbkz_VCVTTPD2DQZrmk_VCVTTPD2DQZrmkz_VCVTTPD2UDQZrm_VCVTTPD2UDQZrmb_VCVTTPD2UDQZrmbk_VCVTTPD2UDQZrmbkz_VCVTTPD2UDQZrmk_VCVTTPD2UDQZrmkz = 1393, |
| 23748 | VCVTQQ2PSZrm_VCVTQQ2PSZrmb_VCVTQQ2PSZrmbk_VCVTQQ2PSZrmbkz_VCVTQQ2PSZrmk_VCVTQQ2PSZrmkz_VCVTUQQ2PSZrm_VCVTUQQ2PSZrmb_VCVTUQQ2PSZrmbk_VCVTUQQ2PSZrmbkz_VCVTUQQ2PSZrmk_VCVTUQQ2PSZrmkz = 1394, |
| 23749 | VPERMI2WZ256rm_VPERMI2WZ256rmk_VPERMI2WZ256rmkz_VPERMI2WZrm_VPERMI2WZrmk_VPERMI2WZrmkz_VPERMT2WZ256rm_VPERMT2WZ256rmk_VPERMT2WZ256rmkz_VPERMT2WZrm_VPERMT2WZrmk_VPERMT2WZrmkz = 1395, |
| 23750 | VPCONFLICTDZ128rm_VPCONFLICTDZ128rmb_VPCONFLICTDZ128rmbk_VPCONFLICTDZ128rmbkz_VPCONFLICTDZ128rmk_VPCONFLICTDZ128rmkz = 1396, |
| 23751 | VPMULLQZ128rm_VPMULLQZ128rmb_VPMULLQZ128rmbk_VPMULLQZ128rmbkz_VPMULLQZ128rmk_VPMULLQZ128rmkz = 1397, |
| 23752 | VPMULLQZ256rm_VPMULLQZ256rmb_VPMULLQZ256rmbk_VPMULLQZ256rmbkz_VPMULLQZ256rmk_VPMULLQZ256rmkz = 1398, |
| 23753 | VPMULLQZrm_VPMULLQZrmb_VPMULLQZrmbk_VPMULLQZrmbkz_VPMULLQZrmk_VPMULLQZrmkz = 1399, |
| 23754 | VGATHERQPSZ128rm_VPGATHERQDZ128rm_VGATHERDPDZ128rm_VPGATHERDQZ128rm_VGATHERQPDZ128rm_VPGATHERQQZ128rm = 1400, |
| 23755 | VGATHERQPSZ256rm_VPGATHERQDZ256rm_VGATHERQPDZ256rm_VPGATHERQQZ256rm_VGATHERDPSZ128rm_VPGATHERDDZ128rm_VGATHERDPDZ256rm_VPGATHERDQZ256rm = 1401, |
| 23756 | VGATHERDPSZ256rm_VPGATHERDDZ256rm_VGATHERDPDZrm_VPGATHERDQZrm_VGATHERQPDZrm_VPGATHERQQZrm_VGATHERQPSZrm_VPGATHERQDZrm = 1402, |
| 23757 | VGATHERDPSZrm_VPGATHERDDZrm = 1403, |
| 23758 | VPCONFLICTQZ256rr_VPCONFLICTQZ256rrk_VPCONFLICTQZ256rrkz = 1404, |
| 23759 | VPCONFLICTQZ256rm_VPCONFLICTQZ256rmb_VPCONFLICTQZ256rmbk_VPCONFLICTQZ256rmbkz_VPCONFLICTQZ256rmk_VPCONFLICTQZ256rmkz = 1405, |
| 23760 | VPCONFLICTQZrr_VPCONFLICTQZrrk_VPCONFLICTQZrrkz = 1406, |
| 23761 | VPCONFLICTDZ256rm_VPCONFLICTDZ256rmb_VPCONFLICTDZ256rmbk_VPCONFLICTDZ256rmbkz_VPCONFLICTDZ256rmk_VPCONFLICTDZ256rmkz = 1407, |
| 23762 | VPCONFLICTQZrm_VPCONFLICTQZrmb_VPCONFLICTQZrmbk_VPCONFLICTQZrmbkz_VPCONFLICTQZrmk_VPCONFLICTQZrmkz = 1408, |
| 23763 | VPCONFLICTDZrm_VPCONFLICTDZrmb_VPCONFLICTDZrmbk_VPCONFLICTDZrmbkz_VPCONFLICTDZrmk_VPCONFLICTDZrmkz = 1409, |
| 23764 | VXORPSZ128rr_VXORPDZ128rr = 1410, |
| 23765 | VXORPSZ256rr_VXORPDZ256rr = 1411, |
| 23766 | VXORPSZrr_VXORPDZrr = 1412, |
| 23767 | VPXORDZ128rr_VPXORQZ128rr = 1413, |
| 23768 | VPXORDZ256rr_VPXORQZ256rr = 1414, |
| 23769 | VPXORDZrr_VPXORQZrr = 1415, |
| 23770 | VPBROADCASTDrr_VPBROADCASTQrr = 1416, |
| 23771 | INSERTPSrri_VINSERTPSZrri_VINSERTPSrri_MOVHLPSrr_MOVLHPSrr_VMOVHLPSZrr_VMOVHLPSrr_VMOVLHPSZrr_VMOVLHPSrr_MOVDDUPrr_VMOVDDUPrr_VPERMILPDZ128ri_VPERMILPDZ128rik_VPERMILPDZ128rikz_VPERMILPDri_VPERMILPSZ128ri_VPERMILPSZ128rik_VPERMILPSZ128rikz_VPERMILPSri_UNPCKHPDrr_UNPCKHPSrr_UNPCKLPDrr_UNPCKLPSrr_VUNPCKHPDZ128rr_VUNPCKHPDZ128rrk_VUNPCKHPDZ128rrkz_VUNPCKHPDrr_VUNPCKHPSZ128rr_VUNPCKHPSZ128rrk_VUNPCKHPSZ128rrkz_VUNPCKHPSrr_VUNPCKLPDZ128rr_VUNPCKLPDZ128rrk_VUNPCKLPDZ128rrkz_VUNPCKLPDrr_VUNPCKLPSZ128rr_VUNPCKLPSZ128rrk_VUNPCKLPSZ128rrkz_VUNPCKLPSrr = 1417, |
| 23772 | VMOVDDUPYrr_VPERMILPDYri_VPERMILPDZ256ri_VPERMILPDZ256rik_VPERMILPDZ256rikz_VPERMILPSYri_VPERMILPSZ256ri_VPERMILPSZ256rik_VPERMILPSZ256rikz_VUNPCKHPDYrr_VUNPCKHPDZ256rr_VUNPCKHPDZ256rrk_VUNPCKHPDZ256rrkz_VUNPCKHPSYrr_VUNPCKHPSZ256rr_VUNPCKHPSZ256rrk_VUNPCKHPSZ256rrkz_VUNPCKLPDYrr_VUNPCKLPDZ256rr_VUNPCKLPDZ256rrk_VUNPCKLPDZ256rrkz_VUNPCKLPSYrr_VUNPCKLPSZ256rr_VUNPCKLPSZ256rrk_VUNPCKLPSZ256rrkz = 1418, |
| 23773 | VPALIGNRYrri = 1419, |
| 23774 | VPERMILPDrr_VPERMILPSrr = 1420, |
| 23775 | MOVSDrr_MOVSDrr_REV_VMOVSDZrr_VMOVSDZrr_REV_VMOVSDZrrk_VMOVSDZrrk_REV_VMOVSDZrrkz_VMOVSDZrrkz_REV_VMOVSDrr_VMOVSDrr_REV_VMOVSSZrr_VMOVSSZrr_REV_VMOVSSZrrk_VMOVSSZrrk_REV_VMOVSSZrrkz_VMOVSSZrrkz_REV_VMOVSSrr_VMOVSSrr_REV = 1421, |
| 23776 | VPACKSSDWYrr_VPACKSSWBYrr_VPACKUSDWYrr_VPACKUSWBYrr = 1422, |
| 23777 | VEXTRACTPSZrri = 1423, |
| 23778 | VEXTRACTPSZmri = 1424, |
| 23779 | VPBROADCASTBZ128rm_VPBROADCASTBZ128rmk_VPBROADCASTBZ128rmkz_VPBROADCASTWZ128rm_VPBROADCASTWZ128rmk_VPBROADCASTWZ128rmkz = 1425, |
| 23780 | INSERTPSrmi_VINSERTPSZrmi_VINSERTPSrmi_UNPCKHPDrm_UNPCKHPSrm_UNPCKLPDrm_UNPCKLPSrm_VUNPCKHPDZ128rm_VUNPCKHPDZ128rmb_VUNPCKHPDZ128rmbk_VUNPCKHPDZ128rmbkz_VUNPCKHPDZ128rmk_VUNPCKHPDZ128rmkz_VUNPCKHPDrm_VUNPCKHPSZ128rm_VUNPCKHPSZ128rmb_VUNPCKHPSZ128rmbk_VUNPCKHPSZ128rmbkz_VUNPCKHPSZ128rmk_VUNPCKHPSZ128rmkz_VUNPCKHPSrm_VUNPCKLPDZ128rm_VUNPCKLPDZ128rmb_VUNPCKLPDZ128rmbk_VUNPCKLPDZ128rmbkz_VUNPCKLPDZ128rmk_VUNPCKLPDZ128rmkz_VUNPCKLPDrm_VUNPCKLPSZ128rm_VUNPCKLPSZ128rmb_VUNPCKLPSZ128rmbk_VUNPCKLPSZ128rmbkz_VUNPCKLPSZ128rmk_VUNPCKLPSZ128rmkz_VUNPCKLPSrm = 1426, |
| 23781 | PALIGNRrmi_VPALIGNRZ128rmi_VPALIGNRZ128rmik_VPALIGNRZ128rmikz_VPALIGNRrmi = 1427, |
| 23782 | VPERMILPDZ128mbi_VPERMILPDZ128mbik_VPERMILPDZ128mbikz_VPERMILPDZ128mi_VPERMILPDZ128mik_VPERMILPDZ128mikz_VPERMILPDmi_VPERMILPSZ128mbi_VPERMILPSZ128mbik_VPERMILPSZ128mbikz_VPERMILPSZ128mi_VPERMILPSZ128mik_VPERMILPSZ128mikz_VPERMILPSmi = 1428, |
| 23783 | VPERMILPDZ128rm_VPERMILPDZ128rmb_VPERMILPDZ128rmbk_VPERMILPDZ128rmbkz_VPERMILPDZ128rmk_VPERMILPDZ128rmkz_VPERMILPDrm_VPERMILPSZ128rm_VPERMILPSZ128rmb_VPERMILPSZ128rmbk_VPERMILPSZ128rmbkz_VPERMILPSZ128rmk_VPERMILPSZ128rmkz_VPERMILPSrm = 1429, |
| 23784 | VPALIGNRYrmi_VPALIGNRZ256rmi_VPALIGNRZ256rmik_VPALIGNRZ256rmikz = 1430, |
| 23785 | VPERMILPDYmi_VPERMILPDZ256mbi_VPERMILPDZ256mbik_VPERMILPDZ256mbikz_VPERMILPDZ256mi_VPERMILPDZ256mik_VPERMILPDZ256mikz_VPERMILPSYmi_VPERMILPSZ256mbi_VPERMILPSZ256mbik_VPERMILPSZ256mbikz_VPERMILPSZ256mi_VPERMILPSZ256mik_VPERMILPSZ256mikz = 1431, |
| 23786 | VPERMILPDYrm_VPERMILPDZ256rm_VPERMILPDZ256rmb_VPERMILPDZ256rmbk_VPERMILPDZ256rmbkz_VPERMILPDZ256rmk_VPERMILPDZ256rmkz_VPERMILPSYrm_VPERMILPSZ256rm_VPERMILPSZ256rmb_VPERMILPSZ256rmbk_VPERMILPSZ256rmbkz_VPERMILPSZ256rmk_VPERMILPSZ256rmkz = 1432, |
| 23787 | VUNPCKHPDYrm_VUNPCKHPDZ256rm_VUNPCKHPDZ256rmb_VUNPCKHPDZ256rmbk_VUNPCKHPDZ256rmbkz_VUNPCKHPDZ256rmk_VUNPCKHPDZ256rmkz_VUNPCKHPSYrm_VUNPCKHPSZ256rm_VUNPCKHPSZ256rmb_VUNPCKHPSZ256rmbk_VUNPCKHPSZ256rmbkz_VUNPCKHPSZ256rmk_VUNPCKHPSZ256rmkz_VUNPCKLPDYrm_VUNPCKLPDZ256rm_VUNPCKLPDZ256rmb_VUNPCKLPDZ256rmbk_VUNPCKLPDZ256rmbkz_VUNPCKLPDZ256rmk_VUNPCKLPDZ256rmkz_VUNPCKLPSYrm_VUNPCKLPSZ256rm_VUNPCKLPSZ256rmb_VUNPCKLPSZ256rmbk_VUNPCKLPSZ256rmbkz_VUNPCKLPSZ256rmk_VUNPCKLPSZ256rmkz = 1433, |
| 23788 | PACKSSDWrm_PACKSSWBrm_PACKUSDWrm_PACKUSWBrm_VPACKSSDWZ128rm_VPACKSSDWZ128rmb_VPACKSSDWZ128rmbk_VPACKSSDWZ128rmbkz_VPACKSSDWZ128rmk_VPACKSSDWZ128rmkz_VPACKSSDWrm_VPACKSSWBZ128rm_VPACKSSWBZ128rmk_VPACKSSWBZ128rmkz_VPACKSSWBrm_VPACKUSDWZ128rm_VPACKUSDWZ128rmb_VPACKUSDWZ128rmbk_VPACKUSDWZ128rmbkz_VPACKUSDWZ128rmk_VPACKUSDWZ128rmkz_VPACKUSDWrm_VPACKUSWBZ128rm_VPACKUSWBZ128rmk_VPACKUSWBZ128rmkz_VPACKUSWBrm = 1434, |
| 23789 | VPACKSSDWYrm_VPACKSSDWZ256rm_VPACKSSDWZ256rmb_VPACKSSDWZ256rmbk_VPACKSSDWZ256rmbkz_VPACKSSDWZ256rmk_VPACKSSDWZ256rmkz_VPACKSSWBYrm_VPACKSSWBZ256rm_VPACKSSWBZ256rmk_VPACKSSWBZ256rmkz_VPACKUSDWYrm_VPACKUSDWZ256rm_VPACKUSDWZ256rmb_VPACKUSDWZ256rmbk_VPACKUSDWZ256rmbkz_VPACKUSDWZ256rmk_VPACKUSDWZ256rmkz_VPACKUSWBYrm_VPACKUSWBZ256rm_VPACKUSWBZ256rmk_VPACKUSWBZ256rmkz = 1435, |
| 23790 | VPACKSSDWZrm_VPACKSSDWZrmb_VPACKSSDWZrmbk_VPACKSSDWZrmbkz_VPACKSSDWZrmk_VPACKSSDWZrmkz_VPACKSSWBZrm_VPACKSSWBZrmk_VPACKSSWBZrmkz_VPACKUSDWZrm_VPACKUSDWZrmb_VPACKUSDWZrmbk_VPACKUSDWZrmbkz_VPACKUSDWZrmk_VPACKUSDWZrmkz_VPACKUSWBZrm_VPACKUSWBZrmk_VPACKUSWBZrmkz = 1436, |
| 23791 | AADD64mr_AAND64mr_AOR64mr_AXOR64mr = 1437, |
| 23792 | JMP16m_JMP16m_NT_JMP32m_JMP32m_NT_JMP64m_JMP64m_NT = 1438, |
| 23793 | RET16 = 1439, |
| 23794 | RORX32mi_RORX64mi = 1440, |
| 23795 | ADC16rm_ADC32rm_ADC64rm_ADC8rm_SBB16rm_SBB32rm_SBB64rm_SBB8rm_ADCX32rm_ADCX64rm_ADOX32rm_ADOX64rm = 1441, |
| 23796 | ADC8mi_ADC8mi8_SBB8mi_SBB8mi8 = 1442, |
| 23797 | CMP16mi_CMP32mi_CMP8mi_CMP16mi8_CMP32mi8_CMP64mi8_CMP8mi8 = 1443, |
| 23798 | MOV8rm = 1444, |
| 23799 | POP16rmr_POP32rmr = 1445, |
| 23800 | POP32r = 1446, |
| 23801 | CMP64mi32 = 1447, |
| 23802 | MOV8rm_NOREX = 1448, |
| 23803 | MOVZX16rm8 = 1449, |
| 23804 | ADD16rm_ADD32rm_ADD64rm_ADD8rm_CMP16rm_CMP32rm_CMP64rm_CMP8rm_SUB16rm_SUB32rm_SUB64rm_SUB8rm_AND16rm_AND32rm_AND8rm_OR16rm_OR32rm_OR8rm_XOR16rm_XOR32rm_XOR8rm = 1450, |
| 23805 | CMP16mr_CMP32mr_CMP64mr_CMP8mr = 1451, |
| 23806 | ADD64ri8_SUB64ri8_DEC64r_INC64r = 1452, |
| 23807 | MOV64rr_MOV64rr_REV = 1453, |
| 23808 | JMP_2 = 1454, |
| 23809 | ADD8mi_ADD8mi8_SUB8mi_SUB8mi8 = 1455, |
| 23810 | AND8mi_AND8mi8_OR8mi_OR8mi8_XOR8mi_XOR8mi8 = 1456, |
| 23811 | DEC8m_INC8m_NEG8m_NOT8m = 1457, |
| 23812 | ADD8mr = 1458, |
| 23813 | AND8mr_OR8mr_XOR8mr = 1459, |
| 23814 | SUB8mr = 1460, |
| 23815 | ADDSSrr_ADDSSrr_Int_SUBSSrr_SUBSSrr_Int_VADDSSrr_VADDSSrr_Int_VSUBSSrr_VSUBSSrr_Int = 1461, |
| 23816 | AND16ri8_AND16rr_AND32ri8_AND32rr_AND64ri8_AND64rr_AND8ri8_AND8rr_AND16rr_REV_AND32rr_REV_AND64rr_REV_AND8rr_REV_TEST32i32_TEST64i32_AND32ri_AND8ri_TEST32ri_TEST8ri_AND64ri32_TEST64ri32_TEST8i8_OR16ri8_OR16rr_OR32ri8_OR32rr_OR64ri8_OR64rr_OR8ri8_OR8rr_XOR16ri8_XOR16rr_XOR32ri8_XOR64ri8_XOR8ri8_XOR8rr_OR16rr_REV_OR32rr_REV_OR64rr_REV_OR8rr_REV_XOR16rr_REV_XOR8rr_REV_OR32ri_OR8ri_XOR32ri_XOR8ri_OR64ri32_XOR64ri32_TEST16rr_TEST32rr_TEST64rr_TEST8rr = 1462, |
| 23817 | AND32i32_AND64i32_AND8i8_OR32i32_OR64i32_XOR32i32_XOR64i32_OR8i8_XOR8i8 = 1463, |
| 23818 | XOR32rr_XOR64rr = 1464, |
| 23819 | XOR32rr_REV_XOR64rr_REV = 1465, |
| 23820 | XOR8rr_NOREX = 1466, |
| 23821 | TEST16mi_TEST32mi_TEST8mi = 1467, |
| 23822 | TEST64mi32 = 1468, |
| 23823 | OR64rm_XOR64rm = 1469, |
| 23824 | AND64rm = 1470, |
| 23825 | TEST16mr_TEST32mr_TEST64mr_TEST8mr = 1471, |
| 23826 | ANDN32rm_ANDN64rm = 1472, |
| 23827 | ANDN32rr_ANDN64rr = 1473, |
| 23828 | BT64mr = 1474, |
| 23829 | BT64rr = 1475, |
| 23830 | BTC64rr_BTR64rr_BTS64rr = 1476, |
| 23831 | BTC64mr_BTR64mr_BTS64mr = 1477, |
| 23832 | CALL64m_CALL64m_NT = 1478, |
| 23833 | CALL64r_CALL64r_NT = 1479, |
| 23834 | MFENCE = 1480, |
| 23835 | CDQE_CWDE = 1481, |
| 23836 | MOVSHDUPrr_MOVSLDUPrr_VMOVSHDUPrr_VMOVSLDUPrr_SHUFPDrri_SHUFPSrri_VSHUFPDrri_VSHUFPSrri = 1482, |
| 23837 | VMOVSHDUPYrr_VMOVSLDUPYrr_VSHUFPDYrri_VSHUFPSYrri = 1483, |
| 23838 | VPBLENDWYrri = 1484, |
| 23839 | CLFLUSH = 1485, |
| 23840 | CLTS = 1486, |
| 23841 | MOV16o16a_MOV16o32a_MOV16o64a = 1487, |
| 23842 | CLWB = 1488, |
| 23843 | CVTSD2SIrm_CVTSD2SIrm_Int_CVTTSD2SIrm_CVTTSD2SIrm_Int_VCVTSD2SIrm_VCVTSD2SIrm_Int_VCVTTSD2SIrm = 1489, |
| 23844 | VCVTTSD2SIrm_Int = 1490, |
| 23845 | VCVTSI642SSrm_Int = 1491, |
| 23846 | VCVTSI642SSrm = 1492, |
| 23847 | VCVTSI642SSrr_Int = 1493, |
| 23848 | JECXZ_JRCXZ = 1494, |
| 23849 | ST_Frr = 1495, |
| 23850 | MOV16sr_MOV32sr = 1496, |
| 23851 | DEC16r_alt_SALC = 1497, |
| 23852 | SYSCALL = 1498, |
| 23853 | DEC32r_alt = 1499, |
| 23854 | DIVR_FPrST0_DIVR_FrST0 = 1500, |
| 23855 | DIVSDrm_Int_VDIVSDrm_Int = 1501, |
| 23856 | DIV_FPrST0_DIV_FrST0 = 1502, |
| 23857 | SMSW16m = 1503, |
| 23858 | MMX_PEXTRWrri = 1504, |
| 23859 | MMX_PADDBrr_MMX_PADDDrr_MMX_PADDWrr = 1505, |
| 23860 | GF2P8AFFINEINVQBrmi_GF2P8AFFINEQBrmi_VGF2P8AFFINEINVQBrmi_VGF2P8AFFINEQBrmi = 1506, |
| 23861 | GF2P8MULBrm_VGF2P8MULBrm = 1507, |
| 23862 | VGF2P8AFFINEINVQBYrmi_VGF2P8AFFINEQBYrmi = 1508, |
| 23863 | VGF2P8MULBYrm = 1509, |
| 23864 | GF2P8MULBrr_VGF2P8MULBrr = 1510, |
| 23865 | VGF2P8MULBYrr = 1511, |
| 23866 | IN16ri = 1512, |
| 23867 | IN16rr = 1513, |
| 23868 | IN32ri = 1514, |
| 23869 | IN32rr = 1515, |
| 23870 | INC16r_alt = 1516, |
| 23871 | INC32r_alt = 1517, |
| 23872 | INSB = 1518, |
| 23873 | INSL = 1519, |
| 23874 | INVLPG = 1520, |
| 23875 | JMP64r_REX = 1521, |
| 23876 | JMP_1_JMP_4 = 1522, |
| 23877 | LAR16rm = 1523, |
| 23878 | LAR16rr = 1524, |
| 23879 | LAR32rm = 1525, |
| 23880 | LAR64rm = 1526, |
| 23881 | LEAVE = 1527, |
| 23882 | LGDT64m = 1528, |
| 23883 | LIDT64m = 1529, |
| 23884 | LLDT16m = 1530, |
| 23885 | LLDT16r = 1531, |
| 23886 | LMSW16m = 1532, |
| 23887 | LMSW16r = 1533, |
| 23888 | MMX_MOVD64mr = 1534, |
| 23889 | MMX_MOVD64rm_MMX_MOVQ64rm = 1535, |
| 23890 | MMX_MOVD64to64rm = 1536, |
| 23891 | MMX_MOVFR642Qrr = 1537, |
| 23892 | MMX_PACKSSDWrm_MMX_PACKSSWBrm = 1538, |
| 23893 | MMX_PACKSSDWrr_MMX_PACKSSWBrr = 1539, |
| 23894 | MMX_PINSRWrri = 1540, |
| 23895 | MMX_PADDBrm_MMX_PADDDrm_MMX_PADDWrm_MMX_PSUBBrm_MMX_PSUBDrm_MMX_PSUBWrm = 1541, |
| 23896 | MMX_PINSRWrmi = 1542, |
| 23897 | VPALIGNRYrmi = 1543, |
| 23898 | MOV16ao16_MOV16ao32_MOV16ao64 = 1544, |
| 23899 | PUSHFS16_PUSHFS32_PUSHGS16_PUSHGS32 = 1545, |
| 23900 | MOV16ms = 1546, |
| 23901 | MOVBE32mr = 1547, |
| 23902 | MOV16rs_MOV32rs_MOV64rs = 1548, |
| 23903 | SLDT16r = 1549, |
| 23904 | STR16r = 1550, |
| 23905 | MOV32ao16_MOV32ao32_MOV32ao64 = 1551, |
| 23906 | MOV64ao64 = 1552, |
| 23907 | MOV32o16a_MOV32o32a_MOV8o16a_MOV8o32a_MOV32o64a_MOV64o64a_MOV8o64a = 1553, |
| 23908 | MOVZX32rr8_MOVZX64rr8 = 1554, |
| 23909 | MOVZX32rr8_NOREX = 1555, |
| 23910 | MOV64ao32 = 1556, |
| 23911 | MOV64dr = 1557, |
| 23912 | MOV64o32a = 1558, |
| 23913 | MOV64rc = 1559, |
| 23914 | MOV64rd = 1560, |
| 23915 | MOV8ao16_MOV8ao32_MOV8ao64 = 1561, |
| 23916 | MOV8mi_MOV8mr = 1562, |
| 23917 | MOV8mr_NOREX = 1563, |
| 23918 | MOVBE32rm = 1564, |
| 23919 | SLDT16m = 1565, |
| 23920 | STRm = 1566, |
| 23921 | MOVBE64rm = 1567, |
| 23922 | MOVDIR64B16_MOVDIR64B32_MOVDIR64B64 = 1568, |
| 23923 | MOVDIRI32 = 1569, |
| 23924 | MOVDIRI64 = 1570, |
| 23925 | MOVLPDrm_MOVLPSrm_VMOVLPDrm_VMOVLPSrm = 1571, |
| 23926 | SHUFPDrmi_SHUFPSrmi_VSHUFPDrmi_VSHUFPSrmi = 1572, |
| 23927 | MOVNTDQmr = 1573, |
| 23928 | MOVNTImr = 1574, |
| 23929 | MOVSB = 1575, |
| 23930 | MOVSDrr_MOVSDrr_REV_VMOVSDrr_VMOVSDrr_REV_VMOVSSrr_VMOVSSrr_REV = 1576, |
| 23931 | MOVSX16rm16_MOVSX16rm32 = 1577, |
| 23932 | MOVSX32rm16_MOVSX32rm32_MOVSX64rm16_MOVSX64rm32_MOVSX32rm8_MOVSX64rm8 = 1578, |
| 23933 | MOVSX32rm8_NOREX = 1579, |
| 23934 | MOVSX16rr16_MOVSX16rr32 = 1580, |
| 23935 | MOVSX16rr8 = 1581, |
| 23936 | MOVSX32rr16_MOVSX32rr8_MOVSX64rr16_MOVSX64rr8 = 1582, |
| 23937 | MOVSX32rr8_NOREX = 1583, |
| 23938 | MUL_FPrST0_MUL_FrST0 = 1584, |
| 23939 | OUT16ir = 1585, |
| 23940 | OUT16rr = 1586, |
| 23941 | OUT32ir = 1587, |
| 23942 | OUT32rr = 1588, |
| 23943 | OUTSB = 1589, |
| 23944 | OUTSL = 1590, |
| 23945 | PACKSSDWrm_PACKSSWBrm_PACKUSDWrm_PACKUSWBrm_VPACKSSDWrm_VPACKSSWBrm_VPACKUSDWrm_VPACKUSWBrm = 1591, |
| 23946 | PACKSSDWrr_PACKSSWBrr_PACKUSDWrr_PACKUSWBrr_VPACKSSDWrr_VPACKSSWBrr_VPACKUSDWrr_VPACKUSWBrr = 1592, |
| 23947 | PALIGNRrmi_VPALIGNRrmi = 1593, |
| 23948 | PALIGNRrri_VPALIGNRrri = 1594, |
| 23949 | PDEP32rm_PDEP64rm_PEXT32rm_PEXT64rm = 1595, |
| 23950 | PREFETCHIT0_PREFETCHIT1 = 1596, |
| 23951 | PREFETCHT0_PREFETCHT1_PREFETCHT2 = 1597, |
| 23952 | PREFETCHNTA = 1598, |
| 23953 | PTWRITE64m_PTWRITEm = 1599, |
| 23954 | PTWRITE64r = 1600, |
| 23955 | PTWRITEr = 1601, |
| 23956 | PUSH64r = 1602, |
| 23957 | PUSH64rmr = 1603, |
| 23958 | RCL8m1_RCR8m1 = 1604, |
| 23959 | RCL8mi = 1605, |
| 23960 | RCR8mi = 1606, |
| 23961 | RCL8mCL = 1607, |
| 23962 | RCR8mCL = 1608, |
| 23963 | RDPID64 = 1609, |
| 23964 | RDPKRUr = 1610, |
| 23965 | RDRAND16r = 1611, |
| 23966 | RDSEED16r = 1612, |
| 23967 | RDSEED32r_RDSEED64r = 1613, |
| 23968 | REX64_PREFIX = 1614, |
| 23969 | ROL16m1_ROL16mi_ROL32m1_ROL32mi_ROL64m1_ROL64mi_ROR16m1_ROR16mi_ROR32m1_ROR32mi_ROR64m1_ROR64mi = 1615, |
| 23970 | ROL16mCL_ROL32mCL_ROL64mCL_ROR16mCL_ROR32mCL_ROR64mCL = 1616, |
| 23971 | ROL16ri_ROL32ri_ROL64ri_ROL8ri_ROR16ri_ROR32ri_ROR64ri_ROR8ri = 1617, |
| 23972 | ROL8m1_ROL8mi_ROR8m1_ROR8mi = 1618, |
| 23973 | ROL8mCL_ROR8mCL = 1619, |
| 23974 | SHL8mCL_SAR8mCL_SHR8mCL = 1620, |
| 23975 | SAR8m1_SAR8mi_SHR8m1_SHR8mi_SHL8m1_SHL8mi = 1621, |
| 23976 | SARX32rm_SARX64rm_SHRX32rm_SHRX64rm_SHLX32rm_SHLX64rm = 1622, |
| 23977 | SARX32rr_SARX64rr_SHRX32rr_SHRX64rr_SHLX32rr_SHLX64rr = 1623, |
| 23978 | SERIALIZE = 1624, |
| 23979 | SHRD16mri8 = 1625, |
| 23980 | SMSW16r = 1626, |
| 23981 | SMSW32r_SMSW64r = 1627, |
| 23982 | SQRTSDm_Int_VSQRTSDm_Int = 1628, |
| 23983 | STI = 1629, |
| 23984 | STOSB = 1630, |
| 23985 | VBLENDVPDrmr_VBLENDVPSrmr = 1631, |
| 23986 | VPBLENDVBrmr = 1632, |
| 23987 | VBLENDVPDrrr_VBLENDVPSrrr = 1633, |
| 23988 | VPBLENDVBrrr = 1634, |
| 23989 | VERRm = 1635, |
| 23990 | VERRr = 1636, |
| 23991 | VERWr = 1637, |
| 23992 | VHADDPDrr_VHADDPSrr_VHSUBPDrr_VHSUBPSrr = 1638, |
| 23993 | VLDMXCSR = 1639, |
| 23994 | VMOVMSKPDYrr_VMOVMSKPSYrr = 1640, |
| 23995 | VMOVNTDQmr = 1641, |
| 23996 | VMOVNTPDmr = 1642, |
| 23997 | VMOVNTPSYmr = 1643, |
| 23998 | VMOVNTPSmr = 1644, |
| 23999 | VPACKSSDWYrm_VPACKSSWBYrm_VPACKUSDWYrm_VPACKUSWBYrm = 1645, |
| 24000 | VPCLMULQDQYrmi = 1646, |
| 24001 | VSHUFPDYrmi_VSHUFPSYrmi = 1647, |
| 24002 | VPBLENDWYrmi = 1648, |
| 24003 | WRPKRUr = 1649, |
| 24004 | XADD16rm_XADD32rm_XADD64rm = 1650, |
| 24005 | XCHG16rm = 1651, |
| 24006 | XCHG32rm = 1652, |
| 24007 | XRSTOR_XRSTOR64_XRSTORS = 1653, |
| 24008 | XSAVEC = 1654, |
| 24009 | XSAVEC64 = 1655, |
| 24010 | XSAVEOPT = 1656, |
| 24011 | XSAVES = 1657, |
| 24012 | CMPPDrmi_VCMPPDrmi = 1658, |
| 24013 | CMPPSrmi_VCMPPSrmi = 1659, |
| 24014 | GF2P8AFFINEINVQBrmi_GF2P8AFFINEQBrmi = 1660, |
| 24015 | GF2P8MULBrm = 1661, |
| 24016 | CMPSDrmi_CMPSDrmi_Int_VCMPSDrmi_VCMPSDrmi_Int = 1662, |
| 24017 | CMPSSrmi_CMPSSrmi_Int_VCMPSSrmi_VCMPSSrmi_Int = 1663, |
| 24018 | CVTSS2SI64rm_Int_CVTTSS2SI64rm_Int = 1664, |
| 24019 | CVTSS2SIrm_Int_CVTTSS2SIrm_Int_CVTSS2SIrm_CVTTSS2SIrm = 1665, |
| 24020 | GF2P8AFFINEINVQBrri_GF2P8AFFINEQBrri = 1666, |
| 24021 | GF2P8MULBrr = 1667, |
| 24022 | MMX_CVTPS2PIrr = 1668, |
| 24023 | VPBROADCASTWrm = 1669, |
| 24024 | VSHA512MSG1rr_VSHA512MSG2rr = 1670, |
| 24025 | PSHUFDmi_PSHUFHWmi_PSHUFLWmi_VPSHUFDmi_VPSHUFHWmi_VPSHUFLWmi = 1671, |
| 24026 | VPERMILPDmi_VPERMILPSmi = 1672, |
| 24027 | VINSERTPSrmi = 1673, |
| 24028 | VPBLENDWrmi = 1674, |
| 24029 | PMULUDQrm_VPMULUDQrm = 1675, |
| 24030 | VPMULDQrm = 1676, |
| 24031 | PMULUDQrr_VPMULUDQrr = 1677, |
| 24032 | VPMULDQYrr_VPMULUDQYrr = 1678, |
| 24033 | VMOVSDto64Zrr = 1679, |
| 24034 | VPMULDQrr = 1680, |
| 24035 | VPBROADCASTWYrm = 1681, |
| 24036 | VCMPPDYrmi = 1682, |
| 24037 | VCMPPSYrmi = 1683, |
| 24038 | VCVTPS2DQrm_VCVTTPS2DQrm = 1684, |
| 24039 | VPSHUFDYmi_VPSHUFHWYmi_VPSHUFLWYmi = 1685, |
| 24040 | VPBLENDWrri = 1686, |
| 24041 | VUNPCKHPDYrm_VUNPCKHPSYrm_VUNPCKLPDYrm_VUNPCKLPSYrm = 1687, |
| 24042 | VPMULDQYrm_VPMULUDQYrm = 1688, |
| 24043 | VSHA512RNDS2rr = 1689, |
| 24044 | VSM3MSG1rm_VSM3MSG2rm = 1690, |
| 24045 | VSM3MSG1rr_VSM3MSG2rr = 1691, |
| 24046 | VTESTPSYrr = 1692, |
| 24047 | VMOVAPDZrr_VMOVAPDZrr_REV_VMOVAPSZrr_VMOVAPSZrr_REV_VMOVUPDZrr_VMOVUPDZrr_REV_VMOVUPSZrr_VMOVUPSZrr_REV = 1693, |
| 24048 | VMOVDQA32Z256rr_VMOVDQA32Z256rr_REV_VMOVDQA64Z256rr_VMOVDQA64Z256rr_REV_VMOVDQAYrr_VMOVDQAYrr_REV_VMOVDQUYrr_VMOVDQUYrr_REV_VMOVDQU16Z256rr_VMOVDQU16Z256rr_REV_VMOVDQU32Z256rr_VMOVDQU32Z256rr_REV_VMOVDQU64Z256rr_VMOVDQU64Z256rr_REV_VMOVDQU8Z256rr_VMOVDQU8Z256rr_REV = 1694, |
| 24049 | VMOVDQA32Zrr_VMOVDQA32Zrr_REV_VMOVDQA64Zrr_VMOVDQA64Zrr_REV_VMOVDQU16Zrr_VMOVDQU16Zrr_REV_VMOVDQU32Zrr_VMOVDQU32Zrr_REV_VMOVDQU64Zrr_VMOVDQU64Zrr_REV_VMOVDQU8Zrr_VMOVDQU8Zrr_REV = 1695, |
| 24050 | ADDPSrm_SUBPSrm_VADDPSrm_VSUBPSrm_ADDSUBPSrm_VADDSUBPSrm_VADDPSZ128rm_VADDPSZ128rmb_VADDPSZ128rmbk_VADDPSZ128rmk_VADDPSZ128rmkz_VSUBPSZ128rm_VSUBPSZ128rmb_VSUBPSZ128rmbk_VSUBPSZ128rmk_VSUBPSZ128rmkz_VADDPSZ128rmbkz_VSUBPSZ128rmbkz = 1696, |
| 24051 | ADDPSrr_SUBPSrr_VADDPSrr_VSUBPSrr_ADDSUBPSrr_VADDSUBPSrr_VADDPSZ128rr_VADDPSZ128rrk_VSUBPSZ128rr_VSUBPSZ128rrk = 1697, |
| 24052 | VADDPSYrr_VSUBPSYrr_VADDPSZ256rr_VADDPSZ256rrk_VSUBPSZ256rr_VSUBPSZ256rrk = 1698, |
| 24053 | VPMOVSXBWZ128rrk_VPMOVSXBWZ128rrkz_VPMOVZXBWZ128rrk_VPMOVZXBWZ128rrkz = 1699, |
| 24054 | VPSHUFBZ128rrk_VPSHUFBZ128rrkz = 1700, |
| 24055 | VPSHUFBZ256rrk_VPSHUFBZ256rrkz = 1701, |
| 24056 | VPSHUFHWZ128rik_VPSHUFHWZ128rikz_VPSHUFLWZ128rik_VPSHUFLWZ128rikz_VPUNPCKHBWZ128rrk_VPUNPCKHBWZ128rrkz_VPUNPCKHWDZ128rrk_VPUNPCKHWDZ128rrkz_VPUNPCKLBWZ128rrk_VPUNPCKLBWZ128rrkz_VPUNPCKLWDZ128rrk_VPUNPCKLWDZ128rrkz = 1702, |
| 24057 | VPSHUFHWZ256rik_VPSHUFHWZ256rikz_VPSHUFLWZ256rik_VPSHUFLWZ256rikz_VPUNPCKHBWZ256rrk_VPUNPCKHBWZ256rrkz_VPUNPCKHWDZ256rrk_VPUNPCKHWDZ256rrkz_VPUNPCKLBWZ256rrk_VPUNPCKLBWZ256rrkz_VPUNPCKLWDZ256rrk_VPUNPCKLWDZ256rrkz = 1703, |
| 24058 | VADDSUBPSYrr = 1704, |
| 24059 | VPOPCNTBZ128rm_VPOPCNTDZ128rm_VPOPCNTQZ128rm_VPOPCNTWZ128rm_VPOPCNTDZ128rmb_VPOPCNTDZ128rmk_VPOPCNTDZ128rmkz_VPOPCNTQZ128rmb_VPOPCNTQZ128rmk_VPOPCNTQZ128rmkz_VPOPCNTDZ128rmbk_VPOPCNTDZ128rmbkz_VPOPCNTQZ128rmbk_VPOPCNTQZ128rmbkz = 1705, |
| 24060 | VFPCLASSPDZ128mbi_VFPCLASSPSZ128mbi = 1706, |
| 24061 | VFPCLASSPHZ128mbi = 1707, |
| 24062 | VPACKSSDWZ128rm_VPACKSSWBZ128rm_VPACKUSDWZ128rm_VPACKUSWBZ128rm_VPACKSSDWZ128rmb_VPACKUSDWZ128rmb = 1708, |
| 24063 | VPMULTISHIFTQBZ128rm_VPMULTISHIFTQBZ128rmb = 1709, |
| 24064 | VFPCLASSPHZ128mi = 1710, |
| 24065 | VFPCLASSPDZ256mi_VFPCLASSPSZ256mi = 1711, |
| 24066 | VFPCLASSPDZmi_VFPCLASSPSZmi = 1712, |
| 24067 | VFPCLASSPHZ256mi = 1713, |
| 24068 | VFPCLASSPHZmi = 1714, |
| 24069 | VPERMBZ128rm = 1715, |
| 24070 | VPEXPANDBZ128rmk_VPEXPANDBZ128rmkz_VPEXPANDBZ256rmk_VPEXPANDBZ256rmkz_VPEXPANDWZ128rmk_VPEXPANDWZ128rmkz_VPEXPANDWZ256rmk_VPEXPANDWZ256rmkz_VPEXPANDBZrmk_VPEXPANDBZrmkz_VPEXPANDWZrmk_VPEXPANDWZrmkz = 1716, |
| 24071 | ADD_FPrST0_ADD_FrST0_SUBR_FPrST0_SUBR_FrST0_SUB_FPrST0_SUB_FrST0_SUBR_FST0r_SUB_FST0r = 1717, |
| 24072 | KMOVBkr_KMOVDkr_KMOVWkr = 1718, |
| 24073 | VCMPPHZ128rri_VCMPPHZ128rrik_VFPCLASSPHZ128ri_VFPCLASSPHZ128rik = 1719, |
| 24074 | VCMPPHZ256rri_VCMPPHZ256rrik_VFPCLASSPHZ256ri_VFPCLASSPHZ256rik = 1720, |
| 24075 | VCMPSDZrri_VCMPSSZrri_VCMPSDZrri_Int_VCMPSDZrrik_Int_VCMPSSZrri_Int_VCMPSSZrrik_Int_VFPCLASSSDZri_VFPCLASSSDZrik_VFPCLASSSSZri_VFPCLASSSSZrik = 1721, |
| 24076 | VCMPSHZrri_VCMPSHZrri_Int_VCMPSHZrrik_Int_VFPCLASSSHZri_VFPCLASSSHZrik = 1722, |
| 24077 | VPACKSSDWZ128rr_VPACKSSWBZ128rr_VPACKUSDWZ128rr_VPACKUSWBZ128rr = 1723, |
| 24078 | VPACKSSDWZ256rr_VPACKSSWBZ256rr_VPACKUSDWZ256rr_VPACKUSWBZ256rr = 1724, |
| 24079 | VPALIGNRZ128rrik_VPALIGNRZ128rrikz = 1725, |
| 24080 | VPALIGNRZ256rrik_VPALIGNRZ256rrikz = 1726, |
| 24081 | VPBROADCASTBZ128rrk_VPBROADCASTBZ128rrkz_VPBROADCASTWZ128rrk_VPBROADCASTWZ128rrkz = 1727, |
| 24082 | VPERMBZ128rr = 1728, |
| 24083 | VPERMBZ256rr_VPERMDZ256rr_VPERMDZ256rrk_VPERMDZ256rrkz_VPERMQZ256rr_VPERMQZ256rrk_VPERMQZ256rrkz_VPERMI2DZ256rr_VPERMI2DZ256rrk_VPERMI2DZ256rrkz_VPERMI2QZ256rr_VPERMI2QZ256rrk_VPERMI2QZ256rrkz_VPERMT2DZ256rr_VPERMT2DZ256rrk_VPERMT2DZ256rrkz_VPERMT2QZ256rr_VPERMT2QZ256rrk_VPERMT2QZ256rrkz = 1729, |
| 24084 | VPERMBZrr_VPERMDZrr_VPERMDZrrk_VPERMDZrrkz_VPERMI2DZrr_VPERMI2DZrrk_VPERMI2DZrrkz_VPERMI2QZrr_VPERMI2QZrrk_VPERMI2QZrrkz_VPERMT2DZrr_VPERMT2DZrrk_VPERMT2DZrrkz_VPERMT2QZrr_VPERMT2QZrrk_VPERMT2QZrrkz = 1730, |
| 24085 | VPERMQZrr_VPERMQZrrk_VPERMQZrrkz = 1731, |
| 24086 | VPERMI2DZ128rr_VPERMI2DZ128rrk_VPERMI2DZ128rrkz_VPERMI2QZ128rr_VPERMI2QZ128rrk_VPERMI2QZ128rrkz_VPERMT2DZ128rr_VPERMT2DZ128rrk_VPERMT2DZ128rrkz_VPERMT2QZ128rr_VPERMT2QZ128rrk_VPERMT2QZ128rrkz = 1732, |
| 24087 | VPMULTISHIFTQBZ128rr = 1733, |
| 24088 | VPMULTISHIFTQBZ256rr_VPOPCNTBZ256rr_VPOPCNTDZ256rr_VPOPCNTQZ256rr_VPOPCNTWZ256rr_VPOPCNTDZ256rrk_VPOPCNTDZ256rrkz_VPOPCNTQZ256rrk_VPOPCNTQZ256rrkz = 1734, |
| 24089 | VPOPCNTBZ128rr_VPOPCNTDZ128rr_VPOPCNTQZ128rr_VPOPCNTWZ128rr_VPOPCNTDZ128rrk_VPOPCNTDZ128rrkz_VPOPCNTQZ128rrk_VPOPCNTQZ128rrkz = 1735, |
| 24090 | VMOVSHDUPZ128rr_VMOVSHDUPZ128rrk_VMOVSHDUPZ128rrkz_VMOVSLDUPZ128rr_VMOVSLDUPZ128rrk_VMOVSLDUPZ128rrkz_VSHUFPDZ128rri_VSHUFPDZ128rrik_VSHUFPDZ128rrikz_VSHUFPSZ128rri_VSHUFPSZ128rrik_VSHUFPSZ128rrikz = 1736, |
| 24091 | VMOVSHDUPZ256rr_VMOVSHDUPZ256rrk_VMOVSHDUPZ256rrkz_VMOVSLDUPZ256rr_VMOVSLDUPZ256rrk_VMOVSLDUPZ256rrkz_VSHUFPDZ256rri_VSHUFPDZ256rrik_VSHUFPDZ256rrikz_VSHUFPSZ256rri_VSHUFPSZ256rrik_VSHUFPSZ256rrikz = 1737, |
| 24092 | VPMOVQDZ128rr_VPMOVQDZ128rrk_VPMOVQDZ128rrkz = 1738, |
| 24093 | VCVTPD2DQZ128rm_VCVTPD2DQZ128rmb_VCVTPD2DQZ128rmbk_VCVTPD2DQZ128rmk_VCVTPD2DQZ128rmkz_VCVTPD2UDQZ128rm_VCVTPD2UDQZ128rmb_VCVTPD2UDQZ128rmbk_VCVTPD2UDQZ128rmk_VCVTPD2UDQZ128rmkz_VCVTTPD2DQZ128rm_VCVTTPD2DQZ128rmb_VCVTTPD2DQZ128rmbk_VCVTTPD2DQZ128rmk_VCVTTPD2DQZ128rmkz_VCVTTPD2UDQZ128rm_VCVTTPD2UDQZ128rmb_VCVTTPD2UDQZ128rmbk_VCVTTPD2UDQZ128rmk_VCVTTPD2UDQZ128rmkz_VCVTPD2DQZ128rmbkz_VCVTPD2UDQZ128rmbkz_VCVTTPD2DQZ128rmbkz_VCVTTPD2UDQZ128rmbkz = 1739, |
| 24094 | VCVTPH2PSXZ128rm_VCVTPH2PSXZ128rmb = 1740, |
| 24095 | VCVTQQ2PSZ128rm_VCVTQQ2PSZ128rmb_VCVTQQ2PSZ128rmbk_VCVTQQ2PSZ128rmk_VCVTQQ2PSZ128rmkz_VCVTUQQ2PSZ128rm_VCVTUQQ2PSZ128rmb_VCVTUQQ2PSZ128rmbk_VCVTUQQ2PSZ128rmk_VCVTUQQ2PSZ128rmkz_VCVTQQ2PSZ128rmbkz_VCVTUQQ2PSZ128rmbkz = 1741, |
| 24096 | VCVTSI642SSZrm_VCVTSI642SSZrm_Int_VCVTUSI642SSZrm_VCVTUSI642SSZrm_Int = 1742, |
| 24097 | VCVTSD2SIZrm_VCVTTSD2SIZrm_VCVTSD2SIZrm_Int_VCVTTSD2SIZrm_Int = 1743, |
| 24098 | VCVTSD2USIZrm_Int_VCVTTSD2USIZrm_Int = 1744, |
| 24099 | CVTSI2SSrr_Int_VCVTSI2SSrr_Int_VCVTSI2SSZrr_VCVTUSI2SSZrr_VCVTSI2SSZrr_Int_VCVTSI2SSZrrb_Int_VCVTUSI2SSZrr_Int_VCVTUSI2SSZrrb_Int = 1745, |
| 24100 | VCVTSS2SI64Zrr_VCVTTSS2SI64Zrr_VCVTSS2SI64Zrr_Int_VCVTSS2SI64Zrrb_Int_VCVTSS2USI64Zrr_Int_VCVTSS2USI64Zrrb_Int_VCVTTSS2SI64Zrr_Int_VCVTTSS2SI64Zrrb_Int_VCVTTSS2USI64Zrr_Int_VCVTTSS2USI64Zrrb_Int = 1746, |
| 24101 | DIVSDrm_VDIVSDrm = 1747, |
| 24102 | VDIVSDZrm = 1748, |
| 24103 | VSQRTSHZm_Int_VSQRTSHZmk_Int_VSQRTSHZmkz_Int = 1749, |
| 24104 | VSQRTSHZm = 1750, |
| 24105 | ENQCMD16_ENQCMD32_ENQCMD64_ENQCMDS16_ENQCMDS32_ENQCMDS64 = 1751, |
| 24106 | VPMOVQDZ256mr_VPMOVQDZmr = 1752, |
| 24107 | VPERMWZrr = 1753, |
| 24108 | VPEXPANDBZ256rm_VPEXPANDBZrm_VPEXPANDWZ256rm_VPEXPANDWZrm = 1754, |
| 24109 | VPADDBZrr_VPADDDZrr_VPADDQZrr_VPADDWZrr_VPADDDZrrk_VPADDDZrrkz_VPADDQZrrk_VPADDQZrrkz_VPSUBDZrrk_VPSUBDZrrkz_VPSUBQZrrk_VPSUBQZrrkz_VPTERNLOGDZrri_VPTERNLOGDZrrik_VPTERNLOGDZrrikz_VPTERNLOGQZrri_VPTERNLOGQZrrik_VPTERNLOGQZrrikz = 1755, |
| 24110 | VPLZCNTDZ256rm_VPLZCNTDZ256rmb_VPLZCNTDZ256rmbk_VPLZCNTDZ256rmk_VPLZCNTDZ256rmkz_VPLZCNTQZ256rm_VPLZCNTQZ256rmb_VPLZCNTQZ256rmbk_VPLZCNTQZ256rmk_VPLZCNTQZ256rmkz_VPLZCNTDZ256rmbkz_VPLZCNTQZ256rmbkz = 1756, |
| 24111 | VADDPHZ128rm_VADDPHZ128rmb_VADDPHZ128rmbk_VADDPHZ128rmk_VADDPHZ128rmkz_VSUBPHZ128rm_VSUBPHZ128rmb_VSUBPHZ128rmbk_VSUBPHZ128rmk_VSUBPHZ128rmkz_VADDPHZ128rmbkz_VSUBPHZ128rmbkz = 1757, |
| 24112 | VGETEXPPHZ128m_VGETEXPPHZ128mb_VGETEXPPHZ128mbk_VGETEXPPHZ128mk_VGETEXPPHZ128mkz_VGETEXPSHZm_VGETEXPSHZmk_VGETEXPSHZmkz_VGETMANTPHZ128rmbi_VGETMANTPHZ128rmik_VGETMANTPHZ128rmbik_VGETMANTPHZ128rmbikz_VGETMANTPHZ128rmi_VGETMANTPHZ128rmikz_VGETMANTSHZrmi_VGETMANTSHZrmik_VGETMANTSHZrmikz = 1758, |
| 24113 | VGF2P8AFFINEINVQBZ128rmbi_VGF2P8AFFINEINVQBZ128rmi_VGF2P8AFFINEQBZ128rmbi_VGF2P8AFFINEQBZ128rmi = 1759, |
| 24114 | VMAXCPHZ128rm_VMAXCPHZ128rmb_VMAXCPHZ128rmbk_VMAXCPHZ128rmk_VMAXCPHZ128rmkz_VMINCPHZ128rm_VMINCPHZ128rmb_VMINCPHZ128rmbk_VMINCPHZ128rmk_VMINCPHZ128rmkz_VMAXCPHZ128rmbkz_VMINCPHZ128rmbkz_VMAXPHZ128rm_VMAXPHZ128rmb_VMAXPHZ128rmbk_VMAXPHZ128rmk_VMAXPHZ128rmkz_VMINPHZ128rm_VMINPHZ128rmb_VMINPHZ128rmbk_VMINPHZ128rmk_VMINPHZ128rmkz_VMAXPHZ128rmbkz_VMINPHZ128rmbkz = 1760, |
| 24115 | VMULPHZ128rm_VMULPHZ128rmb_VMULPHZ128rmbk_VMULPHZ128rmk_VMULPHZ128rmkz_VMULPHZ128rmbkz = 1761, |
| 24116 | VGETEXPPHZ128mbkz = 1762, |
| 24117 | VGF2P8MULBZ128rm = 1763, |
| 24118 | VADDSHZrm_VSUBSHZrm_VADDSHZrm_Int_VADDSHZrmk_Int_VADDSHZrmkz_Int_VSUBSHZrm_Int_VSUBSHZrmk_Int_VSUBSHZrmkz_Int = 1764, |
| 24119 | VCVTSH2SSZrm_VCVTSH2SSZrm_Int = 1765, |
| 24120 | VMAXCSHZrm_VMINCSHZrm_VMAXSHZrm_VMINSHZrm_VMAXSHZrm_Int_VMAXSHZrmk_Int_VMAXSHZrmkz_Int_VMINSHZrm_Int_VMINSHZrmk_Int_VMINSHZrmkz_Int = 1766, |
| 24121 | VMULSHZrm_VMULSHZrm_Int_VMULSHZrmk_Int_VMULSHZrmkz_Int = 1767, |
| 24122 | VGF2P8AFFINEINVQBZ256rmbi_VGF2P8AFFINEINVQBZ256rmi_VGF2P8AFFINEQBZ256rmbi_VGF2P8AFFINEQBZ256rmi = 1768, |
| 24123 | VGF2P8MULBZ256rm = 1769, |
| 24124 | VFMADD132PHZ128m_VFMADD132PHZ128mb_VFMADD132PHZ128mbk_VFMADD132PHZ128mk_VFMADD132PHZ128mkz_VFMADD213PHZ128m_VFMADD213PHZ128mb_VFMADD213PHZ128mbk_VFMADD213PHZ128mk_VFMADD213PHZ128mkz_VFMADD231PHZ128m_VFMADD231PHZ128mb_VFMADD231PHZ128mbk_VFMADD231PHZ128mk_VFMADD231PHZ128mkz_VFMSUB132PHZ128m_VFMSUB132PHZ128mb_VFMSUB132PHZ128mbk_VFMSUB132PHZ128mk_VFMSUB132PHZ128mkz_VFMSUB213PHZ128m_VFMSUB213PHZ128mb_VFMSUB213PHZ128mbk_VFMSUB213PHZ128mk_VFMSUB213PHZ128mkz_VFMSUB231PHZ128m_VFMSUB231PHZ128mb_VFMSUB231PHZ128mbk_VFMSUB231PHZ128mk_VFMSUB231PHZ128mkz_VFNMADD132PHZ128m_VFNMADD132PHZ128mb_VFNMADD132PHZ128mbk_VFNMADD132PHZ128mk_VFNMADD132PHZ128mkz_VFNMADD213PHZ128m_VFNMADD213PHZ128mb_VFNMADD213PHZ128mbk_VFNMADD213PHZ128mk_VFNMADD213PHZ128mkz_VFNMADD231PHZ128m_VFNMADD231PHZ128mb_VFNMADD231PHZ128mbk_VFNMADD231PHZ128mk_VFNMADD231PHZ128mkz_VFNMSUB132PHZ128m_VFNMSUB132PHZ128mb_VFNMSUB132PHZ128mbk_VFNMSUB132PHZ128mk_VFNMSUB132PHZ128mkz_VFNMSUB213PHZ128m_VFNMSUB213PHZ128mb_VFNMSUB213PHZ128mbk_VFNMSUB213PHZ128mk_VFNMSUB213PHZ128mkz_VFNMSUB231PHZ128m_VFNMSUB231PHZ128mb_VFNMSUB231PHZ128mbk_VFNMSUB231PHZ128mk_VFNMSUB231PHZ128mkz_VFMADD132PHZ128mbkz_VFMADD213PHZ128mbkz_VFMADD231PHZ128mbkz_VFMSUB132PHZ128mbkz_VFMSUB213PHZ128mbkz_VFMSUB231PHZ128mbkz_VFNMADD132PHZ128mbkz_VFNMADD213PHZ128mbkz_VFNMADD231PHZ128mbkz_VFNMSUB132PHZ128mbkz_VFNMSUB213PHZ128mbkz_VFNMSUB231PHZ128mbkz_VFMADDSUB132PHZ128m_VFMADDSUB132PHZ128mb_VFMADDSUB132PHZ128mbk_VFMADDSUB132PHZ128mk_VFMADDSUB132PHZ128mkz_VFMADDSUB213PHZ128m_VFMADDSUB213PHZ128mb_VFMADDSUB213PHZ128mbk_VFMADDSUB213PHZ128mk_VFMADDSUB213PHZ128mkz_VFMADDSUB231PHZ128m_VFMADDSUB231PHZ128mb_VFMADDSUB231PHZ128mbk_VFMADDSUB231PHZ128mk_VFMADDSUB231PHZ128mkz_VFMADDSUB132PHZ128mbkz_VFMADDSUB213PHZ128mbkz_VFMADDSUB231PHZ128mbkz_VFMSUBADD132PHZ128m_VFMSUBADD132PHZ128mb_VFMSUBADD132PHZ128mbk_VFMSUBADD132PHZ128mk_VFMSUBADD132PHZ128mkz_VFMSUBADD213PHZ128m_VFMSUBADD213PHZ128mb_VFMSUBADD213PHZ128mbk_VFMSUBADD213PHZ128mk_VFMSUBADD213PHZ128mkz_VFMSUBADD231PHZ128m_VFMSUBADD231PHZ128mb_VFMSUBADD231PHZ128mbk_VFMSUBADD231PHZ128mk_VFMSUBADD231PHZ128mkz_VFMSUBADD132PHZ128mbkz_VFMSUBADD213PHZ128mbkz_VFMSUBADD231PHZ128mbkz = 1770, |
| 24125 | VFMADD132SHZm_VFMADD213SHZm_VFMADD231SHZm_VFMSUB132SHZm_VFMSUB213SHZm_VFMSUB231SHZm_VFNMADD132SHZm_VFNMADD213SHZm_VFNMADD231SHZm_VFNMSUB132SHZm_VFNMSUB213SHZm_VFNMSUB231SHZm_VFMADD132SHZm_Int_VFMADD132SHZmk_Int_VFMADD132SHZmkz_Int_VFMADD213SHZm_Int_VFMADD213SHZmk_Int_VFMADD213SHZmkz_Int_VFMADD231SHZm_Int_VFMADD231SHZmk_Int_VFMADD231SHZmkz_Int_VFMSUB132SHZm_Int_VFMSUB132SHZmk_Int_VFMSUB132SHZmkz_Int_VFMSUB213SHZm_Int_VFMSUB213SHZmk_Int_VFMSUB213SHZmkz_Int_VFMSUB231SHZm_Int_VFMSUB231SHZmk_Int_VFMSUB231SHZmkz_Int_VFNMADD132SHZm_Int_VFNMADD132SHZmk_Int_VFNMADD132SHZmkz_Int_VFNMADD213SHZm_Int_VFNMADD213SHZmk_Int_VFNMADD213SHZmkz_Int_VFNMADD231SHZm_Int_VFNMADD231SHZmk_Int_VFNMADD231SHZmkz_Int_VFNMSUB132SHZm_Int_VFNMSUB132SHZmk_Int_VFNMSUB132SHZmkz_Int_VFNMSUB213SHZm_Int_VFNMSUB213SHZmk_Int_VFNMSUB213SHZmkz_Int_VFNMSUB231SHZm_Int_VFNMSUB231SHZmk_Int_VFNMSUB231SHZmkz_Int = 1771, |
| 24126 | VPMADD52HUQZ256m_VPMADD52HUQZ256mb_VPMADD52HUQZ256mbk_VPMADD52HUQZ256mk_VPMADD52HUQZ256mkz_VPMADD52LUQZ256m_VPMADD52LUQZ256mb_VPMADD52LUQZ256mbk_VPMADD52LUQZ256mk_VPMADD52LUQZ256mkz_VPMADD52HUQZ256mbkz_VPMADD52LUQZ256mbkz = 1772, |
| 24127 | VADDPHZ128rr_VSUBPHZ128rr = 1773, |
| 24128 | VADDPHZ256rr_VSUBPHZ256rr = 1774, |
| 24129 | VADDSHZrr_VSUBSHZrr_VADDSHZrr_Int_VADDSHZrrb_Int_VSUBSHZrr_Int_VSUBSHZrrb_Int = 1775, |
| 24130 | VCVTPH2UWZ128rr_VCVTPH2WZ128rr_VCVTTPH2UWZ128rr_VCVTTPH2WZ128rr_VCVTUW2PHZ128rr_VCVTW2PHZ128rr = 1776, |
| 24131 | VCVTPH2UWZ256rr_VCVTPH2WZ256rr_VCVTTPH2UWZ256rr_VCVTTPH2WZ256rr_VCVTUW2PHZ256rr_VCVTW2PHZ256rr = 1777, |
| 24132 | VCVTSH2SSZrr_Int_VCVTSH2SSZrrb_Int = 1778, |
| 24133 | VFMADD132PHZ128r_VFMADD213PHZ128r_VFMADD231PHZ128r_VFMSUB132PHZ128r_VFMSUB213PHZ128r_VFMSUB231PHZ128r_VFNMADD132PHZ128r_VFNMADD213PHZ128r_VFNMADD231PHZ128r_VFNMSUB132PHZ128r_VFNMSUB213PHZ128r_VFNMSUB231PHZ128r_VFMADDSUB132PHZ128r_VFMADDSUB213PHZ128r_VFMADDSUB231PHZ128r_VFMSUBADD132PHZ128r_VFMSUBADD213PHZ128r_VFMSUBADD231PHZ128r = 1779, |
| 24134 | VFMADD132PHZ256r_VFMADD213PHZ256r_VFMADD231PHZ256r_VFMSUB132PHZ256r_VFMSUB213PHZ256r_VFMSUB231PHZ256r_VFNMADD132PHZ256r_VFNMADD213PHZ256r_VFNMADD231PHZ256r_VFNMSUB132PHZ256r_VFNMSUB213PHZ256r_VFNMSUB231PHZ256r_VFMADDSUB132PHZ256r_VFMADDSUB213PHZ256r_VFMADDSUB231PHZ256r_VFMSUBADD132PHZ256r_VFMSUBADD213PHZ256r_VFMSUBADD231PHZ256r = 1780, |
| 24135 | VFMADD132SHZr_VFMADD132SHZr_Int_VFMADD132SHZrb_VFMADD132SHZrb_Int_VFMADD213SHZr_VFMADD213SHZr_Int_VFMADD213SHZrb_VFMADD213SHZrb_Int_VFMADD231SHZr_VFMADD231SHZr_Int_VFMADD231SHZrb_VFMADD231SHZrb_Int_VFMSUB132SHZr_VFMSUB132SHZr_Int_VFMSUB132SHZrb_VFMSUB132SHZrb_Int_VFMSUB213SHZr_VFMSUB213SHZr_Int_VFMSUB213SHZrb_VFMSUB213SHZrb_Int_VFMSUB231SHZr_VFMSUB231SHZr_Int_VFMSUB231SHZrb_VFMSUB231SHZrb_Int_VFNMADD132SHZr_VFNMADD132SHZr_Int_VFNMADD132SHZrb_VFNMADD132SHZrb_Int_VFNMADD213SHZr_VFNMADD213SHZr_Int_VFNMADD213SHZrb_VFNMADD213SHZrb_Int_VFNMADD231SHZr_VFNMADD231SHZr_Int_VFNMADD231SHZrb_VFNMADD231SHZrb_Int_VFNMSUB132SHZr_VFNMSUB132SHZr_Int_VFNMSUB132SHZrb_VFNMSUB132SHZrb_Int_VFNMSUB213SHZr_VFNMSUB213SHZr_Int_VFNMSUB213SHZrb_VFNMSUB213SHZrb_Int_VFNMSUB231SHZr_VFNMSUB231SHZr_Int_VFNMSUB231SHZrb_VFNMSUB231SHZrb_Int = 1781, |
| 24136 | VGETEXPPHZ128r_VGETEXPSHZr_VGETEXPSHZrb_VGETMANTPHZ128rri_VGETMANTSHZrri_VGETMANTSHZrrib = 1782, |
| 24137 | VGETEXPPHZ256r_VGETMANTPHZ256rri = 1783, |
| 24138 | VGF2P8MULBZ128rr = 1784, |
| 24139 | VGF2P8MULBZ256rr = 1785, |
| 24140 | VMAXCPHZ128rr_VMINCPHZ128rr_VMAXPHZ128rr_VMINPHZ128rr = 1786, |
| 24141 | VMAXCPHZ256rr_VMINCPHZ256rr_VMAXPHZ256rr_VMINPHZ256rr = 1787, |
| 24142 | VMAXCSHZrr_VMINCSHZrr_VMAXSHZrr_VMINSHZrr_VMAXSHZrr_Int_VMAXSHZrrb_Int_VMINSHZrr_Int_VMINSHZrrb_Int = 1788, |
| 24143 | VMULPHZ128rr = 1789, |
| 24144 | VMULPHZ256rr = 1790, |
| 24145 | VMULSHZrr_VMULSHZrr_Int_VMULSHZrrb_Int = 1791, |
| 24146 | VCVTSH2SSZrr = 1792, |
| 24147 | VBROADCASTSSZ128rm = 1793, |
| 24148 | VMOVDDUPZ128rm_VMOVSHDUPZ128rm_VMOVSLDUPZ128rm = 1794, |
| 24149 | VPBROADCASTDZ128rm_VPBROADCASTQZ128rm = 1795, |
| 24150 | VBROADCASTI32X2Z128rm = 1796, |
| 24151 | KANDBkk_KANDDkk_KANDNDkk_KANDNQkk_KANDNWkk_KANDQkk_KANDWkk_KNOTBkk_KNOTDkk_KNOTQkk_KNOTWkk_KORBkk_KORDkk_KORQkk_KORWkk_KXNORBkk_KXNORDkk_KXNORQkk_KXNORWkk_KXORBkk_KXORDkk_KXORQkk_KXORWkk = 1797, |
| 24152 | VPABSBZrr_VPSUBSBZrr_VPABSDZrr_VPABSQZrr_VPABSWZrr_VPABSDZrrk_VPABSDZrrkz_VPABSQZrrk_VPABSQZrrkz_VPADDSBZrr_VPADDSWZrr_VPADDUSBZrr_VPADDUSWZrr_VPAVGBZrr_VPAVGWZrr_VPMAXSBZrr_VPMAXUDZrr_VPMAXUWZrr_VPMINSBZrr_VPMINUDZrr_VPMINUWZrr_VPMAXSDZrr_VPMAXUBZrr_VPMINSDZrr_VPMINUBZrr_VPMAXSDZrrk_VPMAXSDZrrkz_VPMAXUDZrrk_VPMAXUDZrrkz_VPMINSDZrrk_VPMINSDZrrkz_VPMINUDZrrk_VPMINUDZrrkz_VPMAXSWZrr_VPMINSWZrr_VPSUBSWZrr_VPSUBUSWZrr = 1798, |
| 24153 | VPSHLDDZrri_VPSHLDQZrri_VPSHLDWZrri_VPSHRDDZrri_VPSHRDQZrri_VPSHRDWZrri_VPSHLDVDZrk_VPSHLDVDZrkz_VPSHLDVQZrk_VPSHLDVQZrkz_VPSHRDVDZrk_VPSHRDVDZrkz_VPSHRDVQZrk_VPSHRDVQZrkz = 1799, |
| 24154 | VPSHLDVDZr_VPSHLDVQZr_VPSHLDVWZr_VPSHRDVDZr_VPSHRDVQZr_VPSHRDVWZr = 1800, |
| 24155 | VPSUBUSBZrr = 1801, |
| 24156 | KMOVBkm_KMOVDkm_KMOVQkm_KMOVWkm = 1802, |
| 24157 | KMOVBmk = 1803, |
| 24158 | VBROADCASTSSZ128rr_VBROADCASTSSZ128rrk_VBROADCASTSSZ128rrkz = 1804, |
| 24159 | VPALIGNRZrri = 1805, |
| 24160 | VPSHUFDZri_VPSHUFHWZri_VPSHUFLWZri_VPSHUFDZrik_VPSHUFDZrikz_VPUNPCKHBWZrr_VPUNPCKHWDZrr_VPUNPCKLBWZrr_VPUNPCKLWDZrr_VPUNPCKHDQZrr_VPUNPCKHDQZrrk_VPUNPCKHDQZrrkz_VPUNPCKLDQZrr_VPUNPCKLDQZrrk_VPUNPCKLDQZrrkz_VPUNPCKLQDQZrr_VPUNPCKLQDQZrrk_VPUNPCKLQDQZrrkz_VPUNPCKHQDQZrr_VPUNPCKHQDQZrrk_VPUNPCKHQDQZrrkz = 1806, |
| 24161 | VPSHUFBZrr = 1807, |
| 24162 | VPABSBZrrk_VPABSBZrrkz_VPABSWZrrk_VPABSWZrrkz_VPSUBSBZrrk_VPSUBSBZrrkz_VPSUBSWZrrk_VPSUBSWZrrkz_VPADDSBZrrk_VPADDSBZrrkz_VPADDSWZrrk_VPADDSWZrrkz_VPADDUSBZrrk_VPADDUSBZrrkz_VPADDUSWZrrk_VPADDUSWZrrkz_VPAVGBZrrk_VPAVGBZrrkz_VPAVGWZrrk_VPAVGWZrrkz_VPMAXSBZrrk_VPMAXSBZrrkz_VPMAXUWZrrk_VPMAXUWZrrkz_VPMINSBZrrk_VPMINSBZrrkz_VPMINUWZrrk_VPMINUWZrrkz_VPMAXSWZrrk_VPMAXSWZrrkz_VPMAXUBZrrk_VPMAXUBZrrkz_VPMINSWZrrk_VPMINSWZrrkz_VPMINUBZrrk_VPMINUBZrrkz_VPSUBUSBZrrk_VPSUBUSBZrrkz_VPSUBUSWZrrk_VPSUBUSWZrrkz = 1808, |
| 24163 | VPSHLDVWZrk_VPSHLDVWZrkz_VPSHRDVWZrk_VPSHRDVWZrkz = 1809, |
| 24164 | VPSLLVWZrrk_VPSLLVWZrrkz_VPSRLVWZrrk_VPSRLVWZrrkz_VPSRAVWZrrk_VPSRAVWZrrkz = 1810, |
| 24165 | VPSLLWZrik_VPSLLWZrikz_VPSRLWZrik_VPSRLWZrikz_VPSRAWZrik_VPSRAWZrikz = 1811, |
| 24166 | VCVTPH2DQZ128rr_VCVTPH2UDQZ128rr_VCVTTPH2DQZ128rr_VCVTTPH2UDQZ128rr = 1812, |
| 24167 | VCVTPH2DQZ256rr_VCVTPH2UDQZ256rr_VCVTTPH2DQZ256rr_VCVTTPH2UDQZ256rr = 1813, |
| 24168 | VCVTPH2PSXZ256rr = 1814, |
| 24169 | VCVTPS2PHXZ256rr = 1815, |
| 24170 | VCVTPH2PSXZ128rr = 1816, |
| 24171 | VCVTPS2PHXZ128rr = 1817, |
| 24172 | VPERMWZ128rrk_VPERMWZ128rrkz = 1818, |
| 24173 | VPERMWZ256rrk_VPERMWZ256rrkz = 1819, |
| 24174 | VPSLLWZ256rrk_VPSLLWZ256rrkz_VPSRLWZ256rrk_VPSRLWZ256rrkz_VPSRAWZ256rrk_VPSRAWZ256rrkz = 1820, |
| 24175 | VMOVSHZmr_VMOVWmr = 1821, |
| 24176 | VBROADCASTF32X2Z256rm_VBROADCASTI32X2Z256rm_VBROADCASTF32X2Zrm_VBROADCASTI32X2Zrm_VPBROADCASTQZrm_VPBROADCASTDZ256rm_VPBROADCASTQZ256rm_VPBROADCASTDZrm = 1822, |
| 24177 | VBROADCASTF32X4Z256rm_VBROADCASTI32X4Z256rm_VBROADCASTF32X8Zrm_VBROADCASTI32X8Zrm_VBROADCASTF32X4Zrm_VBROADCASTF64X4Zrm_VBROADCASTI32X4Zrm_VBROADCASTI64X4Zrm_VBROADCASTF64X2Z256rm_VBROADCASTF64X2Zrm_VBROADCASTI64X2Z256rm_VBROADCASTI64X2Zrm = 1823, |
| 24178 | VBROADCASTSSZrm_VBROADCASTSDZ256rm_VBROADCASTSSZ256rm_VBROADCASTSDZrm = 1824, |
| 24179 | VMOVDDUPZrm_VMOVSHDUPZrm_VMOVSLDUPZrm = 1825, |
| 24180 | VMOVDDUPZ256rm_VMOVSHDUPZ256rm_VMOVSLDUPZ256rm = 1826, |
| 24181 | VPMOVDBZrr_VPMOVQBZrr_VPMOVSQBZrr_VPMOVSWBZrr_VPMOVWBZrr_VPMOVDWZrr_VPMOVQWZrr_VPMOVSDWZrr_VPMOVSQWZrr_VPMOVUSDWZrr_VPMOVSDBZrr_VPMOVSQDZrr_VPMOVUSDBZrr_VPMOVUSQDZrr_VPMOVSQDZrrk_VPMOVSQDZrrkz_VPMOVUSQDZrrk_VPMOVUSQDZrrkz_VPMOVUSQBZrr_VPMOVUSWBZrr = 1827, |
| 24182 | VPMOVUSQWZrr = 1828, |
| 24183 | VBROADCASTF32X2Zrmk_VBROADCASTF32X2Zrmkz_VBROADCASTI32X2Zrmk_VBROADCASTI32X2Zrmkz_VPBROADCASTDZrmk_VPBROADCASTDZrmkz_VPBROADCASTQZrmk_VPBROADCASTQZrmkz = 1829, |
| 24184 | VBROADCASTF32X8Zrmk_VBROADCASTF32X8Zrmkz_VBROADCASTI32X8Zrmk_VBROADCASTI32X8Zrmkz_VBROADCASTF32X4Zrmk_VBROADCASTF32X4Zrmkz_VBROADCASTF64X4Zrmk_VBROADCASTF64X4Zrmkz_VBROADCASTI32X4Zrmk_VBROADCASTI32X4Zrmkz_VBROADCASTI64X4Zrmk_VBROADCASTI64X4Zrmkz_VBROADCASTF64X2Zrmk_VBROADCASTF64X2Zrmkz_VBROADCASTI64X2Zrmk_VBROADCASTI64X2Zrmkz = 1830, |
| 24185 | VBROADCASTSDZrmk_VBROADCASTSDZrmkz_VBROADCASTSSZrmk_VBROADCASTSSZrmkz = 1831, |
| 24186 | VMOVAPDZrmk_VMOVAPDZrmkz_VMOVAPSZrmk_VMOVAPSZrmkz_VMOVUPDZrmk_VMOVUPDZrmkz_VMOVUPSZrmk_VMOVUPSZrmkz = 1832, |
| 24187 | VMOVDQA32Zrmk_VMOVDQA32Zrmkz_VMOVDQA64Zrmk_VMOVDQA64Zrmkz_VMOVDQU32Zrmk_VMOVDQU32Zrmkz_VMOVDQU64Zrmk_VMOVDQU64Zrmkz = 1833, |
| 24188 | VINSERTF32X4Zrmi_VINSERTF32X4Zrmik_VINSERTF32X4Zrmikz_VINSERTF64X4Zrmi_VINSERTF64X4Zrmik_VINSERTF64X4Zrmikz_VINSERTF32X8Zrmi_VINSERTF32X8Zrmik_VINSERTF32X8Zrmikz_VINSERTF64X2Zrmi_VINSERTF64X2Zrmik_VINSERTF64X2Zrmikz = 1834, |
| 24189 | VINSERTI32X4Zrmi_VINSERTI32X4Zrmik_VINSERTI32X4Zrmikz_VINSERTI64X4Zrmi_VINSERTI64X4Zrmik_VINSERTI64X4Zrmikz_VINSERTI32X8Zrmi_VINSERTI32X8Zrmik_VINSERTI32X8Zrmikz_VINSERTI64X2Zrmi_VINSERTI64X2Zrmik_VINSERTI64X2Zrmikz = 1835, |
| 24190 | VPADDBZrm_VPADDDZrm_VPADDQZrm_VPADDWZrm_VPSUBBZrm_VPSUBDZrm_VPSUBQZrm_VPSUBWZrm_VPADDDZrmb_VPADDDZrmk_VPADDDZrmkz_VPADDQZrmb_VPADDQZrmk_VPADDQZrmkz_VPSUBDZrmb_VPSUBDZrmk_VPSUBDZrmkz_VPSUBQZrmb_VPSUBQZrmk_VPSUBQZrmkz_VPADDDZrmbk_VPADDDZrmbkz_VPADDQZrmbk_VPADDQZrmbkz_VPSUBDZrmbk_VPSUBDZrmbkz_VPSUBQZrmbk_VPSUBQZrmbkz_VPTERNLOGDZrmbi_VPTERNLOGDZrmik_VPTERNLOGQZrmbi_VPTERNLOGQZrmik_VPTERNLOGDZrmbik_VPTERNLOGDZrmbikz_VPTERNLOGQZrmbik_VPTERNLOGQZrmbikz_VPTERNLOGDZrmi_VPTERNLOGDZrmikz_VPTERNLOGQZrmi_VPTERNLOGQZrmikz = 1836, |
| 24191 | VPBROADCASTWZrm_VPBROADCASTBZ256rm_VPBROADCASTWZ256rm_VPBROADCASTBZrm = 1837, |
| 24192 | VFPCLASSPDZ128mi_VFPCLASSPSZ128mi = 1838, |
| 24193 | VFPCLASSSDZmi_VFPCLASSSSZmi = 1839, |
| 24194 | VFPCLASSSHZmi = 1840, |
| 24195 | VPALIGNRZ256rmi = 1841, |
| 24196 | VPSHUFBZrm = 1842, |
| 24197 | MOV16ri_MOV64ri_MOV8ri_MOV16ri_alt_MOV8ri_alt_MOV16rr_MOV16rr_REV_MOV8rr_MOV8rr_REV = 1843, |
| 24198 | MOV32ri_MOV32ri_alt = 1844, |
| 24199 | MOV8rr_NOREX = 1845, |
| 24200 | VMOVLPDZ128rm_VMOVLPSZ128rm_VSHUFPDZ128rmbi_VSHUFPDZ128rmik_VSHUFPSZ128rmbi_VSHUFPSZ128rmik_VSHUFPDZ128rmbik_VSHUFPDZ128rmbikz_VSHUFPSZ128rmbik_VSHUFPSZ128rmbikz_VSHUFPDZ128rmi_VSHUFPDZ128rmikz_VSHUFPSZ128rmi_VSHUFPSZ128rmikz = 1846, |
| 24201 | VMOVAPDZ128rrk_VMOVAPDZ128rrk_REV_VMOVAPDZ128rrkz_VMOVAPDZ128rrkz_REV_VMOVAPSZ128rrk_VMOVAPSZ128rrk_REV_VMOVAPSZ128rrkz_VMOVAPSZ128rrkz_REV_VMOVUPDZ128rrk_VMOVUPDZ128rrk_REV_VMOVUPDZ128rrkz_VMOVUPDZ128rrkz_REV_VMOVUPSZ128rrk_VMOVUPSZ128rrk_REV_VMOVUPSZ128rrkz_VMOVUPSZ128rrkz_REV = 1847, |
| 24202 | VMOVAPDZ256rrk_VMOVAPDZ256rrk_REV_VMOVAPDZ256rrkz_VMOVAPDZ256rrkz_REV_VMOVAPSZ256rrk_VMOVAPSZ256rrk_REV_VMOVAPSZ256rrkz_VMOVAPSZ256rrkz_REV_VMOVUPDZ256rrk_VMOVUPDZ256rrk_REV_VMOVUPDZ256rrkz_VMOVUPDZ256rrkz_REV_VMOVUPSZ256rrk_VMOVUPSZ256rrk_REV_VMOVUPSZ256rrkz_VMOVUPSZ256rrkz_REV = 1848, |
| 24203 | VMOVDQA32Z128rrk_VMOVDQA32Z128rrk_REV_VMOVDQA32Z128rrkz_VMOVDQA32Z128rrkz_REV_VMOVDQA64Z128rrk_VMOVDQA64Z128rrk_REV_VMOVDQA64Z128rrkz_VMOVDQA64Z128rrkz_REV_VMOVDQU32Z128rrk_VMOVDQU32Z128rrk_REV_VMOVDQU32Z128rrkz_VMOVDQU32Z128rrkz_REV_VMOVDQU64Z128rrk_VMOVDQU64Z128rrk_REV_VMOVDQU64Z128rrkz_VMOVDQU64Z128rrkz_REV_VPMOVM2DZ128rk_VPMOVM2QZ128rk = 1849, |
| 24204 | VMOVSHZrr_VMOVSHZrr_REV = 1850, |
| 24205 | VPADDBZ128rr_VPADDDZ128rr_VPADDQZ128rr_VPADDWZ128rr_VPADDDZ128rrk_VPADDDZ128rrkz_VPADDQZ128rrk_VPADDQZ128rrkz_VPSUBDZ128rrk_VPSUBDZ128rrkz_VPSUBQZ128rrk_VPSUBQZ128rrkz_VPTERNLOGDZ128rri_VPTERNLOGDZ128rrik_VPTERNLOGDZ128rrikz_VPTERNLOGQZ128rri_VPTERNLOGQZ128rrik_VPTERNLOGQZ128rrikz = 1851, |
| 24206 | VPADDBZ256rr_VPADDDZ256rr_VPADDQZ256rr_VPADDWZ256rr_VPADDDZ256rrk_VPADDDZ256rrkz_VPADDQZ256rrk_VPADDQZ256rrkz_VPSUBDZ256rrk_VPSUBDZ256rrkz_VPSUBQZ256rrk_VPSUBQZ256rrkz_VPTERNLOGDZ256rri_VPTERNLOGDZ256rrik_VPTERNLOGDZ256rrikz_VPTERNLOGQZ256rri_VPTERNLOGQZ256rrik_VPTERNLOGQZ256rrikz = 1852, |
| 24207 | VPABSBZrmk_VPABSBZrmkz_VPABSWZrmk_VPABSWZrmkz = 1853, |
| 24208 | VPSLLWZmik_VPSLLWZmikz_VPSRLWZmik_VPSRLWZmikz_VPSRAWZmik_VPSRAWZmikz = 1854, |
| 24209 | VPADDSBZrmk_VPADDSBZrmkz_VPADDSWZrmk_VPADDSWZrmkz_VPADDUSBZrmk_VPADDUSBZrmkz_VPADDUSWZrmk_VPADDUSWZrmkz_VPSUBSBZrmk_VPSUBSBZrmkz_VPSUBSWZrmk_VPSUBSWZrmkz_VPSUBUSBZrmk_VPSUBUSBZrmkz_VPSUBUSWZrmk_VPSUBUSWZrmkz_VPAVGBZrmk_VPAVGBZrmkz_VPAVGWZrmk_VPAVGWZrmkz_VPMAXSBZrmk_VPMAXSBZrmkz_VPMAXUWZrmk_VPMAXUWZrmkz_VPMINSBZrmk_VPMINSBZrmkz_VPMINUWZrmk_VPMINUWZrmkz_VPMAXSWZrmk_VPMAXSWZrmkz_VPMAXUBZrmk_VPMAXUBZrmkz_VPMINSWZrmk_VPMINSWZrmkz_VPMINUBZrmk_VPMINUBZrmkz = 1855, |
| 24210 | VPSHLDVWZmk_VPSHLDVWZmkz_VPSHRDVWZmk_VPSHRDVWZmkz = 1856, |
| 24211 | VPSLLVWZrmk_VPSLLVWZrmkz_VPSRLVWZrmk_VPSRLVWZrmkz_VPSRAVWZrmk_VPSRAVWZrmkz = 1857, |
| 24212 | VPSLLWZrmk_VPSLLWZrmkz_VPSRLWZrmk_VPSRLWZrmkz_VPSRAWZrmk_VPSRAWZrmkz = 1858, |
| 24213 | VCOMISHZrr_VCOMISHZrrb_VUCOMISHZrr_VUCOMISHZrrb_VCOMISHZrr_Int_VUCOMISHZrr_Int = 1859, |
| 24214 | VCVTPD2QQZrrb_VCVTPD2QQZrrbk_VCVTPD2QQZrrk_VCVTPD2QQZrrkz_VCVTPD2UQQZrrb_VCVTPD2UQQZrrbk_VCVTPD2UQQZrrk_VCVTPD2UQQZrrkz_VCVTTPD2QQZrrb_VCVTTPD2QQZrrbk_VCVTTPD2QQZrrk_VCVTTPD2QQZrrkz_VCVTTPD2UQQZrrb_VCVTTPD2UQQZrrbk_VCVTTPD2UQQZrrk_VCVTTPD2UQQZrrkz_VCVTPD2QQZrrbkz_VCVTPD2UQQZrrbkz_VCVTTPD2QQZrrbkz_VCVTTPD2UQQZrrbkz = 1860, |
| 24215 | VCVTPS2DQZrrb_VCVTPS2DQZrrbk_VCVTPS2DQZrrk_VCVTPS2DQZrrkz_VCVTPS2UDQZrrb_VCVTPS2UDQZrrbk_VCVTPS2UDQZrrk_VCVTPS2UDQZrrkz_VCVTTPS2DQZrrb_VCVTTPS2DQZrrbk_VCVTTPS2DQZrrk_VCVTTPS2DQZrrkz_VCVTTPS2UDQZrrb_VCVTTPS2UDQZrrbk_VCVTTPS2UDQZrrk_VCVTTPS2UDQZrrkz_VCVTPS2DQZrrbkz_VCVTPS2UDQZrrbkz_VCVTTPS2DQZrrbkz_VCVTTPS2UDQZrrbkz = 1861, |
| 24216 | VMAXCPSZrr_VMAXCPSZrrk_VMAXCPSZrrkz_VMAXPSZrr_VMAXPSZrrk_VMAXPSZrrkz_VMINCPSZrr_VMINCPSZrrk_VMINCPSZrrkz_VMINPSZrr_VMINPSZrrk_VMINPSZrrkz_VMAXPSZrrb_VMAXPSZrrbk_VMAXPSZrrbkz_VMINPSZrrb_VMINPSZrrbk_VMINPSZrrbkz = 1862, |
| 24217 | VPLZCNTDZrr_VPLZCNTDZrrk_VPLZCNTDZrrkz_VPLZCNTQZrr_VPLZCNTQZrrk_VPLZCNTQZrrkz = 1863, |
| 24218 | VPMADD52HUQZr_VPMADD52HUQZrk_VPMADD52HUQZrkz_VPMADD52LUQZr_VPMADD52LUQZrk_VPMADD52LUQZrkz = 1864, |
| 24219 | VMOVAPDZ128rmk_VMOVAPDZ128rmkz_VMOVAPSZ128rmk_VMOVAPSZ128rmkz_VMOVUPDZ128rmk_VMOVUPDZ128rmkz_VMOVUPSZ128rmk_VMOVUPSZ128rmkz = 1865, |
| 24220 | VMOVDQA32Z128rmk_VMOVDQA32Z128rmkz_VMOVDQA64Z128rmk_VMOVDQA64Z128rmkz_VMOVDQU32Z128rmk_VMOVDQU32Z128rmkz_VMOVDQU64Z128rmk_VMOVDQU64Z128rmkz = 1866, |
| 24221 | VMOVSDZrmk_VMOVSDZrmkz_VMOVSSZrmk_VMOVSSZrmkz = 1867, |
| 24222 | VPADDBZ128rm_VPADDDZ128rm_VPADDQZ128rm_VPADDWZ128rm_VPSUBBZ128rm_VPSUBDZ128rm_VPSUBQZ128rm_VPSUBWZ128rm_VPADDDZ128rmb_VPADDDZ128rmk_VPADDDZ128rmkz_VPADDQZ128rmb_VPADDQZ128rmk_VPADDQZ128rmkz_VPSUBDZ128rmb_VPSUBDZ128rmk_VPSUBDZ128rmkz_VPSUBQZ128rmb_VPSUBQZ128rmk_VPSUBQZ128rmkz_VPADDDZ128rmbk_VPADDDZ128rmbkz_VPADDQZ128rmbk_VPADDQZ128rmbkz_VPSUBDZ128rmbk_VPSUBDZ128rmbkz_VPSUBQZ128rmbk_VPSUBQZ128rmbkz_VPTERNLOGDZ128rmbi_VPTERNLOGDZ128rmik_VPTERNLOGQZ128rmbi_VPTERNLOGQZ128rmik_VPTERNLOGDZ128rmbik_VPTERNLOGDZ128rmbikz_VPTERNLOGQZ128rmbik_VPTERNLOGQZ128rmbikz_VPTERNLOGDZ128rmi_VPTERNLOGDZ128rmikz_VPTERNLOGQZ128rmi_VPTERNLOGQZ128rmikz = 1868, |
| 24223 | VPBROADCASTBZ128rm_VPBROADCASTWZ128rm = 1869, |
| 24224 | VPALIGNRZ128rmi = 1870, |
| 24225 | VPEXTRDZmri_VPEXTRQZmri = 1871, |
| 24226 | VPMOVQDZ128mr_VPMOVQDZ128mrk = 1872, |
| 24227 | ROUNDPDmi_ROUNDPSmi_VROUNDPDmi_VROUNDPSmi = 1873, |
| 24228 | ROUNDSDmi_ROUNDSDmi_Int_ROUNDSSmi_ROUNDSSmi_Int_VROUNDSDmi_VROUNDSDmi_Int_VROUNDSSmi_VROUNDSSmi_Int_VRNDSCALEPDZ128rmbi_VRNDSCALEPDZ128rmik_VRNDSCALEPSZ128rmbi_VRNDSCALEPSZ128rmik_VRNDSCALEPDZ128rmbik_VRNDSCALEPDZ128rmbikz_VRNDSCALEPSZ128rmbik_VRNDSCALEPSZ128rmbikz_VRNDSCALEPDZ128rmi_VRNDSCALEPDZ128rmikz_VRNDSCALEPSZ128rmi_VRNDSCALEPSZ128rmikz_VRNDSCALESDZrmi_VRNDSCALESSZrmi_VRNDSCALESDZrmi_Int_VRNDSCALESDZrmik_Int_VRNDSCALESDZrmikz_Int_VRNDSCALESSZrmi_Int_VRNDSCALESSZrmik_Int_VRNDSCALESSZrmikz_Int = 1874, |
| 24229 | ROUNDPDri_ROUNDSSri_VROUNDPDri_VROUNDSSri_ROUNDPSri_ROUNDSDri_VROUNDPSri_VROUNDSDri_ROUNDSDri_Int_ROUNDSSri_Int_VROUNDSDri_Int_VROUNDSSri_Int_VRNDSCALEPDZ128rri_VRNDSCALEPDZ128rrik_VRNDSCALEPDZ128rrikz_VRNDSCALEPSZ128rri_VRNDSCALEPSZ128rrik_VRNDSCALEPSZ128rrikz_VRNDSCALESDZrri_VRNDSCALESSZrri_VRNDSCALESDZrri_Int_VRNDSCALESDZrrib_Int_VRNDSCALESDZrribk_Int_VRNDSCALESDZrribkz_Int_VRNDSCALESDZrrik_Int_VRNDSCALESDZrrikz_Int_VRNDSCALESSZrri_Int_VRNDSCALESSZrrib_Int_VRNDSCALESSZrribk_Int_VRNDSCALESSZrribkz_Int_VRNDSCALESSZrrik_Int_VRNDSCALESSZrrikz_Int = 1875, |
| 24230 | VRNDSCALEPDZ256rri_VRNDSCALEPDZ256rrik_VRNDSCALEPDZ256rrikz_VRNDSCALEPSZ256rri_VRNDSCALEPSZ256rrik_VRNDSCALEPSZ256rrikz_VROUNDPDYri_VROUNDPSYri = 1876, |
| 24231 | VPMOVSXBWZ256rmk_VPMOVSXBWZ256rmkz_VPMOVSXBWZrmk_VPMOVSXBWZrmkz_VPMOVZXBWZ256rmk_VPMOVZXBWZ256rmkz_VPMOVZXBWZrmk_VPMOVZXBWZrmkz = 1877, |
| 24232 | VPOPCNTBZ128rmk_VPOPCNTBZ128rmkz_VPOPCNTWZ128rmk_VPOPCNTWZ128rmkz = 1878, |
| 24233 | VPOPCNTBZ256rmk_VPOPCNTBZ256rmkz_VPOPCNTWZ256rmk_VPOPCNTWZ256rmkz = 1879, |
| 24234 | VPOPCNTBZrmk_VPOPCNTBZrmkz_VPOPCNTWZrmk_VPOPCNTWZrmkz = 1880, |
| 24235 | VDBPSADBWZ128rmik_VDBPSADBWZ128rmikz = 1881, |
| 24236 | VPMULTISHIFTQBZ128rmbk_VPMULTISHIFTQBZ128rmkz_VPMULTISHIFTQBZ128rmbkz_VPMULTISHIFTQBZ128rmk = 1882, |
| 24237 | VDBPSADBWZ256rmik_VDBPSADBWZ256rmikz = 1883, |
| 24238 | VDBPSADBWZrmik_VDBPSADBWZrmikz = 1884, |
| 24239 | VPACKSSDWZ256rmbk_VPACKSSDWZ256rmkz_VPACKUSDWZ256rmbk_VPACKUSDWZ256rmkz_VPACKSSDWZ256rmbkz_VPACKUSDWZ256rmbkz_VPACKSSDWZ256rmk_VPACKSSWBZ256rmk_VPACKUSDWZ256rmk_VPACKUSWBZ256rmk_VPACKSSWBZ256rmkz_VPACKUSWBZ256rmkz = 1885, |
| 24240 | VPACKSSDWZrmbk_VPACKSSDWZrmkz_VPACKUSDWZrmbk_VPACKUSDWZrmkz_VPACKSSDWZrmbkz_VPACKUSDWZrmbkz_VPACKSSDWZrmk_VPACKSSWBZrmk_VPACKUSDWZrmk_VPACKUSWBZrmk_VPACKSSWBZrmkz_VPACKUSWBZrmkz = 1886, |
| 24241 | VPERMBZ128rmk_VPERMBZ128rmkz_VPERMBZ256rmk_VPERMBZ256rmkz_VPERMBZrmk_VPERMBZrmkz = 1887, |
| 24242 | VPMULTISHIFTQBZ256rmbk_VPMULTISHIFTQBZ256rmkz_VPMULTISHIFTQBZ256rmbkz_VPMULTISHIFTQBZ256rmk = 1888, |
| 24243 | VPMULTISHIFTQBZrmbk_VPMULTISHIFTQBZrmkz_VPMULTISHIFTQBZrmbkz_VPMULTISHIFTQBZrmk = 1889, |
| 24244 | VPMOVUSQWZrrk_VPMOVUSQWZrrkz = 1890, |
| 24245 | VSQRTSDZm_Int = 1891, |
| 24246 | VADDPDZ128rrkz_VSUBPDZ128rrkz = 1892, |
| 24247 | VADDPDZ256rrkz_VSUBPDZ256rrkz = 1893, |
| 24248 | VADDPSZ128rrkz_VSUBPSZ128rrkz = 1894, |
| 24249 | VADDPSZ256rrkz_VSUBPSZ256rrkz = 1895, |
| 24250 | VADDSDZrrbkz_Int_VADDSDZrrkz_Int_VSUBSDZrrbkz_Int_VSUBSDZrrkz_Int = 1896, |
| 24251 | VADDSSZrrbkz_Int_VADDSSZrrkz_Int_VSUBSSZrrbkz_Int_VSUBSSZrrkz_Int = 1897, |
| 24252 | VADDPDZrr_VADDPDZrrb_VSUBPDZrr_VSUBPDZrrb = 1898, |
| 24253 | VADDPSZrr_VADDPSZrrb_VSUBPSZrr_VSUBPSZrrb = 1899, |
| 24254 | VMOVDQU16Zrrk_VMOVDQU16Zrrk_REV_VMOVDQU16Zrrkz_VMOVDQU16Zrrkz_REV_VMOVDQU8Zrrk_VMOVDQU8Zrrk_REV_VMOVDQU8Zrrkz_VMOVDQU8Zrrkz_REV_VPMOVM2BZrk_VPMOVM2WZrk = 1900, |
| 24255 | VPBLENDMBZrrk_VPBLENDMBZrrkz_VPBLENDMWZrrk_VPBLENDMWZrrkz = 1901, |
| 24256 | VADDPHZ128rrk_VADDPHZ128rrkz_VSUBPHZ128rrk_VSUBPHZ128rrkz = 1902, |
| 24257 | VADDPHZ256rrk_VADDPHZ256rrkz_VSUBPHZ256rrk_VSUBPHZ256rrkz = 1903, |
| 24258 | VADDSHZrrbk_Int_VADDSHZrrbkz_Int_VADDSHZrrk_Int_VADDSHZrrkz_Int_VSUBSHZrrbk_Int_VSUBSHZrrbkz_Int_VSUBSHZrrk_Int_VSUBSHZrrkz_Int = 1904, |
| 24259 | VCVTPH2UWZ128rrk_VCVTPH2UWZ128rrkz_VCVTPH2WZ128rrk_VCVTPH2WZ128rrkz_VCVTTPH2UWZ128rrk_VCVTTPH2UWZ128rrkz_VCVTTPH2WZ128rrk_VCVTTPH2WZ128rrkz_VCVTUW2PHZ128rrk_VCVTUW2PHZ128rrkz_VCVTW2PHZ128rrk_VCVTW2PHZ128rrkz = 1905, |
| 24260 | VCVTPH2UWZ256rrk_VCVTPH2UWZ256rrkz_VCVTPH2WZ256rrk_VCVTPH2WZ256rrkz_VCVTTPH2UWZ256rrk_VCVTTPH2UWZ256rrkz_VCVTTPH2WZ256rrk_VCVTTPH2WZ256rrkz_VCVTUW2PHZ256rrk_VCVTUW2PHZ256rrkz_VCVTW2PHZ256rrk_VCVTW2PHZ256rrkz = 1906, |
| 24261 | VFMADD132PHZ128rk_VFMADD132PHZ128rkz_VFMADD213PHZ128rk_VFMADD213PHZ128rkz_VFMADD231PHZ128rk_VFMADD231PHZ128rkz_VFMSUB132PHZ128rk_VFMSUB132PHZ128rkz_VFMSUB213PHZ128rk_VFMSUB213PHZ128rkz_VFMSUB231PHZ128rk_VFMSUB231PHZ128rkz_VFNMADD132PHZ128rk_VFNMADD132PHZ128rkz_VFNMADD213PHZ128rk_VFNMADD213PHZ128rkz_VFNMADD231PHZ128rk_VFNMADD231PHZ128rkz_VFNMSUB132PHZ128rk_VFNMSUB132PHZ128rkz_VFNMSUB213PHZ128rk_VFNMSUB213PHZ128rkz_VFNMSUB231PHZ128rk_VFNMSUB231PHZ128rkz_VFMADDSUB132PHZ128rk_VFMADDSUB132PHZ128rkz_VFMADDSUB213PHZ128rk_VFMADDSUB213PHZ128rkz_VFMADDSUB231PHZ128rk_VFMADDSUB231PHZ128rkz_VFMSUBADD132PHZ128rk_VFMSUBADD132PHZ128rkz_VFMSUBADD213PHZ128rk_VFMSUBADD213PHZ128rkz_VFMSUBADD231PHZ128rk_VFMSUBADD231PHZ128rkz = 1907, |
| 24262 | VFMADD132PHZ256rk_VFMADD132PHZ256rkz_VFMADD213PHZ256rk_VFMADD213PHZ256rkz_VFMADD231PHZ256rk_VFMADD231PHZ256rkz_VFMSUB132PHZ256rk_VFMSUB132PHZ256rkz_VFMSUB213PHZ256rk_VFMSUB213PHZ256rkz_VFMSUB231PHZ256rk_VFMSUB231PHZ256rkz_VFNMADD132PHZ256rk_VFNMADD132PHZ256rkz_VFNMADD213PHZ256rk_VFNMADD213PHZ256rkz_VFNMADD231PHZ256rk_VFNMADD231PHZ256rkz_VFNMSUB132PHZ256rk_VFNMSUB132PHZ256rkz_VFNMSUB213PHZ256rk_VFNMSUB213PHZ256rkz_VFNMSUB231PHZ256rk_VFNMSUB231PHZ256rkz_VFMADDSUB132PHZ256rk_VFMADDSUB132PHZ256rkz_VFMADDSUB213PHZ256rk_VFMADDSUB213PHZ256rkz_VFMADDSUB231PHZ256rk_VFMADDSUB231PHZ256rkz_VFMSUBADD132PHZ256rk_VFMSUBADD132PHZ256rkz_VFMSUBADD213PHZ256rk_VFMSUBADD213PHZ256rkz_VFMSUBADD231PHZ256rk_VFMSUBADD231PHZ256rkz = 1908, |
| 24263 | VFMADD132SHZrbk_Int_VFMADD132SHZrbkz_Int_VFMADD132SHZrk_Int_VFMADD132SHZrkz_Int_VFMADD213SHZrbk_Int_VFMADD213SHZrbkz_Int_VFMADD213SHZrk_Int_VFMADD213SHZrkz_Int_VFMADD231SHZrbk_Int_VFMADD231SHZrbkz_Int_VFMADD231SHZrk_Int_VFMADD231SHZrkz_Int_VFMSUB132SHZrbk_Int_VFMSUB132SHZrbkz_Int_VFMSUB132SHZrk_Int_VFMSUB132SHZrkz_Int_VFMSUB213SHZrbk_Int_VFMSUB213SHZrbkz_Int_VFMSUB213SHZrk_Int_VFMSUB213SHZrkz_Int_VFMSUB231SHZrbk_Int_VFMSUB231SHZrbkz_Int_VFMSUB231SHZrk_Int_VFMSUB231SHZrkz_Int_VFNMADD132SHZrbk_Int_VFNMADD132SHZrbkz_Int_VFNMADD132SHZrk_Int_VFNMADD132SHZrkz_Int_VFNMADD213SHZrbk_Int_VFNMADD213SHZrbkz_Int_VFNMADD213SHZrk_Int_VFNMADD213SHZrkz_Int_VFNMADD231SHZrbk_Int_VFNMADD231SHZrbkz_Int_VFNMADD231SHZrk_Int_VFNMADD231SHZrkz_Int_VFNMSUB132SHZrbk_Int_VFNMSUB132SHZrbkz_Int_VFNMSUB132SHZrk_Int_VFNMSUB132SHZrkz_Int_VFNMSUB213SHZrbk_Int_VFNMSUB213SHZrbkz_Int_VFNMSUB213SHZrk_Int_VFNMSUB213SHZrkz_Int_VFNMSUB231SHZrbk_Int_VFNMSUB231SHZrbkz_Int_VFNMSUB231SHZrk_Int_VFNMSUB231SHZrkz_Int = 1909, |
| 24264 | VGETEXPPHZ128rk_VGETEXPPHZ128rkz_VGETEXPSHZrbk_VGETEXPSHZrkz_VGETEXPSHZrbkz_VGETEXPSHZrk_VGETMANTPHZ128rrik_VGETMANTPHZ128rrikz_VGETMANTSHZrribk_VGETMANTSHZrrikz_VGETMANTSHZrribkz_VGETMANTSHZrrik = 1910, |
| 24265 | VGETEXPPHZ256rk_VGETEXPPHZ256rkz_VGETMANTPHZ256rrik_VGETMANTPHZ256rrikz = 1911, |
| 24266 | VMAXCPHZ128rrk_VMAXCPHZ128rrkz_VMINCPHZ128rrk_VMINCPHZ128rrkz_VMAXPHZ128rrk_VMAXPHZ128rrkz_VMINPHZ128rrk_VMINPHZ128rrkz = 1912, |
| 24267 | VMAXCPHZ256rrk_VMAXCPHZ256rrkz_VMINCPHZ256rrk_VMINCPHZ256rrkz_VMAXPHZ256rrk_VMAXPHZ256rrkz_VMINPHZ256rrk_VMINPHZ256rrkz = 1913, |
| 24268 | VMULPHZ128rrk_VMULPHZ128rrkz = 1914, |
| 24269 | VMULPHZ256rrk_VMULPHZ256rrkz = 1915, |
| 24270 | VMAXSHZrrbk_Int_VMAXSHZrrbkz_Int_VMAXSHZrrk_Int_VMAXSHZrrkz_Int_VMINSHZrrbk_Int_VMINSHZrrbkz_Int_VMINSHZrrk_Int_VMINSHZrrkz_Int = 1916, |
| 24271 | VMULSHZrrbk_Int_VMULSHZrrbkz_Int_VMULSHZrrk_Int_VMULSHZrrkz_Int = 1917, |
| 24272 | VADDPHZrr_VADDPHZrrb_VSUBPHZrr_VSUBPHZrrb = 1918, |
| 24273 | VAESDECLASTZrr_VAESDECZrr_VAESENCLASTZrr_VAESENCZrr = 1919, |
| 24274 | VCVTPH2UWZrr_VCVTPH2UWZrrb_VCVTPH2WZrr_VCVTPH2WZrrb_VCVTTPH2UWZrr_VCVTTPH2UWZrrb_VCVTTPH2WZrr_VCVTTPH2WZrrb_VCVTUW2PHZrr_VCVTUW2PHZrrb_VCVTW2PHZrr_VCVTW2PHZrrb = 1920, |
| 24275 | VFMADD132PHZr_VFMADD132PHZrb_VFMADD213PHZr_VFMADD213PHZrb_VFMADD231PHZr_VFMADD231PHZrb_VFMSUB132PHZr_VFMSUB132PHZrb_VFMSUB213PHZr_VFMSUB213PHZrb_VFMSUB231PHZr_VFMSUB231PHZrb_VFNMADD132PHZr_VFNMADD132PHZrb_VFNMADD213PHZr_VFNMADD213PHZrb_VFNMADD231PHZr_VFNMADD231PHZrb_VFNMSUB132PHZr_VFNMSUB132PHZrb_VFNMSUB213PHZr_VFNMSUB213PHZrb_VFNMSUB231PHZr_VFNMSUB231PHZrb_VFMADDSUB132PHZr_VFMADDSUB132PHZrb_VFMADDSUB213PHZr_VFMADDSUB213PHZrb_VFMADDSUB231PHZr_VFMADDSUB231PHZrb_VFMSUBADD132PHZr_VFMSUBADD132PHZrb_VFMSUBADD213PHZr_VFMSUBADD213PHZrb_VFMSUBADD231PHZr_VFMSUBADD231PHZrb = 1921, |
| 24276 | VGETEXPPHZr_VGETEXPPHZrb_VGETMANTPHZrri_VGETMANTPHZrrib = 1922, |
| 24277 | VMAXCPHZrr_VMINCPHZrr_VMAXPHZrr_VMAXPHZrrb_VMINPHZrr_VMINPHZrrb = 1923, |
| 24278 | VMULPHZrr_VMULPHZrrb = 1924, |
| 24279 | VGF2P8MULBZrr = 1925, |
| 24280 | VADDPHZrrbk_VADDPHZrrkz_VSUBPHZrrbk_VSUBPHZrrkz_VADDPHZrrbkz_VADDPHZrrk_VSUBPHZrrbkz_VSUBPHZrrk = 1926, |
| 24281 | VCVTPH2UWZrrbk_VCVTPH2UWZrrkz_VCVTPH2WZrrbk_VCVTPH2WZrrkz_VCVTTPH2UWZrrbk_VCVTTPH2UWZrrkz_VCVTTPH2WZrrbk_VCVTTPH2WZrrkz_VCVTPH2UWZrrbkz_VCVTPH2UWZrrk_VCVTPH2WZrrbkz_VCVTPH2WZrrk_VCVTTPH2UWZrrbkz_VCVTTPH2UWZrrk_VCVTTPH2WZrrbkz_VCVTTPH2WZrrk_VCVTUW2PHZrrbk_VCVTUW2PHZrrkz_VCVTW2PHZrrbk_VCVTW2PHZrrkz_VCVTUW2PHZrrbkz_VCVTUW2PHZrrk_VCVTW2PHZrrbkz_VCVTW2PHZrrk = 1927, |
| 24282 | VFMADD132PHZrbk_VFMADD132PHZrkz_VFMADD213PHZrbk_VFMADD213PHZrkz_VFMADD231PHZrbk_VFMADD231PHZrkz_VFMSUB132PHZrbk_VFMSUB132PHZrkz_VFMSUB213PHZrbk_VFMSUB213PHZrkz_VFMSUB231PHZrbk_VFMSUB231PHZrkz_VFNMADD132PHZrbk_VFNMADD132PHZrkz_VFNMADD213PHZrbk_VFNMADD213PHZrkz_VFNMADD231PHZrbk_VFNMADD231PHZrkz_VFNMSUB132PHZrbk_VFNMSUB132PHZrkz_VFNMSUB213PHZrbk_VFNMSUB213PHZrkz_VFNMSUB231PHZrbk_VFNMSUB231PHZrkz_VFMADD132PHZrbkz_VFMADD132PHZrk_VFMADD213PHZrbkz_VFMADD213PHZrk_VFMADD231PHZrbkz_VFMADD231PHZrk_VFMSUB132PHZrbkz_VFMSUB132PHZrk_VFMSUB213PHZrbkz_VFMSUB213PHZrk_VFMSUB231PHZrbkz_VFMSUB231PHZrk_VFNMADD132PHZrbkz_VFNMADD132PHZrk_VFNMADD213PHZrbkz_VFNMADD213PHZrk_VFNMADD231PHZrbkz_VFNMADD231PHZrk_VFNMSUB132PHZrbkz_VFNMSUB132PHZrk_VFNMSUB213PHZrbkz_VFNMSUB213PHZrk_VFNMSUB231PHZrbkz_VFNMSUB231PHZrk_VFMADDSUB132PHZrbk_VFMADDSUB132PHZrkz_VFMADDSUB213PHZrbk_VFMADDSUB213PHZrkz_VFMADDSUB231PHZrbk_VFMADDSUB231PHZrkz_VFMADDSUB132PHZrbkz_VFMADDSUB132PHZrk_VFMADDSUB213PHZrbkz_VFMADDSUB213PHZrk_VFMADDSUB231PHZrbkz_VFMADDSUB231PHZrk_VFMSUBADD132PHZrbk_VFMSUBADD132PHZrkz_VFMSUBADD213PHZrbk_VFMSUBADD213PHZrkz_VFMSUBADD231PHZrbk_VFMSUBADD231PHZrkz_VFMSUBADD132PHZrbkz_VFMSUBADD132PHZrk_VFMSUBADD213PHZrbkz_VFMSUBADD213PHZrk_VFMSUBADD231PHZrbkz_VFMSUBADD231PHZrk = 1928, |
| 24283 | VGETEXPPHZrbk_VGETEXPPHZrkz_VGETEXPPHZrbkz_VGETEXPPHZrk_VGETMANTPHZrribk_VGETMANTPHZrrikz_VGETMANTPHZrribkz_VGETMANTPHZrrik = 1929, |
| 24284 | VMAXCPHZrrk_VMAXCPHZrrkz_VMINCPHZrrk_VMINCPHZrrkz_VMAXPHZrrbk_VMAXPHZrrkz_VMINPHZrrbk_VMINPHZrrkz_VMAXPHZrrbkz_VMAXPHZrrk_VMINPHZrrbkz_VMINPHZrrk = 1930, |
| 24285 | VMULPHZrrbk_VMULPHZrrkz_VMULPHZrrbkz_VMULPHZrrk = 1931, |
| 24286 | VPMOVSXBWZ128rmk_VPMOVSXBWZ128rmkz_VPMOVZXBWZ128rmk_VPMOVZXBWZ128rmkz_VPSHUFHWZ128mik_VPSHUFHWZ128mikz_VPSHUFLWZ128mik_VPSHUFLWZ128mikz = 1932, |
| 24287 | VPSHUFHWZ256mik_VPSHUFHWZ256mikz_VPSHUFLWZ256mik_VPSHUFLWZ256mikz = 1933, |
| 24288 | VADDPSYrm_VSUBPSYrm_VADDPSZ256rm_VADDPSZ256rmb_VADDPSZ256rmbk_VADDPSZ256rmk_VADDPSZ256rmkz_VSUBPSZ256rm_VSUBPSZ256rmb_VSUBPSZ256rmbk_VSUBPSZ256rmk_VSUBPSZ256rmkz_VADDPSZ256rmbkz_VSUBPSZ256rmbkz = 1934, |
| 24289 | VPSHUFBZ256rmk_VPSHUFBZ256rmkz = 1935, |
| 24290 | VPUNPCKHBWZ256rmk_VPUNPCKHBWZ256rmkz_VPUNPCKHWDZ256rmk_VPUNPCKHWDZ256rmkz_VPUNPCKLBWZ256rmk_VPUNPCKLBWZ256rmkz_VPUNPCKLWDZ256rmk_VPUNPCKLWDZ256rmkz = 1936, |
| 24291 | VADDSUBPSYrm = 1937, |
| 24292 | VPSHUFBZ128rmk_VPSHUFBZ128rmkz = 1938, |
| 24293 | VPUNPCKHBWZ128rmk_VPUNPCKHBWZ128rmkz_VPUNPCKHWDZ128rmk_VPUNPCKHWDZ128rmkz_VPUNPCKLBWZ128rmk_VPUNPCKLBWZ128rmkz_VPUNPCKLWDZ128rmk_VPUNPCKLWDZ128rmkz = 1939, |
| 24294 | VMOVDQU16Zrmk_VMOVDQU16Zrmkz_VMOVDQU8Zrmk_VMOVDQU8Zrmkz = 1940, |
| 24295 | VADDPSZrm_VADDPSZrmb_VADDPSZrmbk_VADDPSZrmk_VADDPSZrmkz_VSUBPSZrm_VSUBPSZrmb_VSUBPSZrmbk_VSUBPSZrmk_VSUBPSZrmkz_VADDPSZrmbkz_VSUBPSZrmbkz = 1941, |
| 24296 | VPBLENDMBZrmk_VPBLENDMBZrmkz_VPBLENDMWZrmk_VPBLENDMWZrmkz = 1942, |
| 24297 | VADDPSZrrbk_VADDPSZrrkz_VSUBPSZrrbk_VSUBPSZrrkz_VADDPSZrrbkz_VADDPSZrrk_VSUBPSZrrbkz_VSUBPSZrrk = 1943, |
| 24298 | VPLZCNTDZrm_VPLZCNTDZrmb_VPLZCNTDZrmbk_VPLZCNTDZrmk_VPLZCNTDZrmkz_VPLZCNTQZrm_VPLZCNTQZrmb_VPLZCNTQZrmbk_VPLZCNTQZrmk_VPLZCNTQZrmkz_VPLZCNTDZrmbkz_VPLZCNTQZrmbkz = 1944, |
| 24299 | VAESDECLASTZrm_VAESDECZrm_VAESENCLASTZrm_VAESENCZrm = 1945, |
| 24300 | VGF2P8AFFINEINVQBZrmbi_VGF2P8AFFINEINVQBZrmi_VGF2P8AFFINEQBZrmbi_VGF2P8AFFINEQBZrmi = 1946, |
| 24301 | VGF2P8MULBZrm = 1947, |
| 24302 | VPMADD52HUQZm_VPMADD52HUQZmb_VPMADD52HUQZmbk_VPMADD52HUQZmk_VPMADD52HUQZmkz_VPMADD52LUQZm_VPMADD52LUQZmb_VPMADD52LUQZmbk_VPMADD52LUQZmk_VPMADD52LUQZmkz_VPMADD52HUQZmbkz_VPMADD52LUQZmbkz = 1948, |
| 24303 | VPOPCNTBZ256rm_VPOPCNTDZ256rm_VPOPCNTQZ256rm_VPOPCNTWZ256rm_VPOPCNTDZ256rmb_VPOPCNTDZ256rmk_VPOPCNTDZ256rmkz_VPOPCNTQZ256rmb_VPOPCNTQZ256rmk_VPOPCNTQZ256rmkz_VPOPCNTDZ256rmbk_VPOPCNTDZ256rmbkz_VPOPCNTQZ256rmbk_VPOPCNTQZ256rmbkz = 1949, |
| 24304 | VPOPCNTBZrm_VPOPCNTDZrm_VPOPCNTQZrm_VPOPCNTWZrm_VPOPCNTDZrmb_VPOPCNTDZrmk_VPOPCNTDZrmkz_VPOPCNTQZrmb_VPOPCNTQZrmk_VPOPCNTQZrmkz_VPOPCNTDZrmbk_VPOPCNTDZrmbkz_VPOPCNTQZrmbk_VPOPCNTQZrmbkz = 1950, |
| 24305 | VPSHUFHWZmik_VPSHUFHWZmikz_VPSHUFLWZmik_VPSHUFLWZmikz = 1951, |
| 24306 | VFPCLASSPDZ256mbi_VFPCLASSPSZ256mbi = 1952, |
| 24307 | VFPCLASSPDZmbi_VFPCLASSPSZmbi = 1953, |
| 24308 | VFPCLASSPHZ256mbi = 1954, |
| 24309 | VFPCLASSPHZmbi = 1955, |
| 24310 | VPALIGNRZrmik_VPALIGNRZrmikz_VPUNPCKHBWZrmk_VPUNPCKHBWZrmkz_VPUNPCKHWDZrmk_VPUNPCKHWDZrmkz_VPUNPCKLBWZrmk_VPUNPCKLBWZrmkz_VPUNPCKLWDZrmk_VPUNPCKLWDZrmkz = 1956, |
| 24311 | VPMULTISHIFTQBZ256rm_VPMULTISHIFTQBZ256rmb = 1957, |
| 24312 | VPMULTISHIFTQBZrm_VPMULTISHIFTQBZrmb = 1958, |
| 24313 | VPCLMULQDQZrmi = 1959, |
| 24314 | VPCLMULQDQZ256rmi = 1960, |
| 24315 | VBLENDVPDYrmr_VBLENDVPSYrmr = 1961, |
| 24316 | VPBLENDVBYrmr = 1962, |
| 24317 | VBLENDVPDYrrr_VBLENDVPSYrrr = 1963, |
| 24318 | VPBLENDVBYrrr = 1964, |
| 24319 | VMOVAPDZ256rmk_VMOVAPDZ256rmkz_VMOVAPSZ256rmk_VMOVAPSZ256rmkz_VMOVUPDZ256rmk_VMOVUPDZ256rmkz_VMOVUPSZ256rmk_VMOVUPSZ256rmkz = 1965, |
| 24320 | VMOVDQA32Z256rmk_VMOVDQA32Z256rmkz_VMOVDQA64Z256rmk_VMOVDQA64Z256rmkz_VMOVDQU32Z256rmk_VMOVDQU32Z256rmkz_VMOVDQU64Z256rmk_VMOVDQU64Z256rmkz = 1966, |
| 24321 | VPADDBZ256rm_VPADDDZ256rm_VPADDQZ256rm_VPADDWZ256rm_VPSUBBZ256rm_VPSUBDZ256rm_VPSUBQZ256rm_VPSUBWZ256rm_VPADDDZ256rmb_VPADDDZ256rmk_VPADDDZ256rmkz_VPADDQZ256rmb_VPADDQZ256rmk_VPADDQZ256rmkz_VPSUBDZ256rmb_VPSUBDZ256rmk_VPSUBDZ256rmkz_VPSUBQZ256rmb_VPSUBQZ256rmk_VPSUBQZ256rmkz_VPADDDZ256rmbk_VPADDDZ256rmbkz_VPADDQZ256rmbk_VPADDQZ256rmbkz_VPSUBDZ256rmbk_VPSUBDZ256rmbkz_VPSUBQZ256rmbk_VPSUBQZ256rmbkz_VPTERNLOGDZ256rmbi_VPTERNLOGDZ256rmik_VPTERNLOGQZ256rmbi_VPTERNLOGQZ256rmik_VPTERNLOGDZ256rmbik_VPTERNLOGDZ256rmbikz_VPTERNLOGQZ256rmbik_VPTERNLOGQZ256rmbikz_VPTERNLOGDZ256rmi_VPTERNLOGDZ256rmikz_VPTERNLOGQZ256rmi_VPTERNLOGQZ256rmikz = 1967, |
| 24322 | VCMPPHZ128rmbi_VCMPPHZ128rmik_VCMPPHZ128rmbik_VCMPPHZ128rmi_VFPCLASSPHZ128mbik_VFPCLASSPHZ128mik = 1968, |
| 24323 | VCMPPHZ256rmbi_VCMPPHZ256rmik_VCMPPHZ256rmbik_VCMPPHZ256rmi_VFPCLASSPHZ256mbik_VFPCLASSPHZ256mik = 1969, |
| 24324 | VCMPPHZrmbi_VCMPPHZrmik_VCMPPHZrmbik_VCMPPHZrmi_VFPCLASSPHZmbik_VFPCLASSPHZmik = 1970, |
| 24325 | VCMPSHZrmi_VCMPSHZrmi_Int_VCMPSHZrmik_Int_VFPCLASSSHZmik = 1971, |
| 24326 | VCOMISHZrm_VCOMISHZrm_Int_VUCOMISHZrm_VUCOMISHZrm_Int = 1972, |
| 24327 | VCOMPRESSPDZ128mr_VCOMPRESSPDZ256mr_VCOMPRESSPSZ128mr_VCOMPRESSPSZ256mr_VCOMPRESSPDZmr_VCOMPRESSPSZmr_VPCOMPRESSDZ128mr_VPCOMPRESSDZ256mr_VPCOMPRESSQZ128mr_VPCOMPRESSQZ256mr_VPCOMPRESSDZmr_VPCOMPRESSQZmr = 1973, |
| 24328 | VPMOVDBZmr_VPMOVQBZmr_VPMOVSQBZmr_VPMOVSWBZmr_VPMOVWBZmr_VPMOVDWZmr_VPMOVQWZmr_VPMOVSDWZmr_VPMOVSQWZmr_VPMOVUSDWZmr_VPMOVUSQWZmr_VPMOVSDBZmr_VPMOVSQDZmr_VPMOVUSDBZmr_VPMOVUSQDZmr_VPMOVUSQBZmr_VPMOVUSWBZmr = 1974, |
| 24329 | VPMOVDBZmrk_VPMOVQBZmrk_VPMOVSQBZmrk_VPMOVSWBZmrk_VPMOVWBZmrk_VPMOVDWZmrk_VPMOVQWZmrk_VPMOVSDWZmrk_VPMOVSQWZmrk_VPMOVUSDWZmrk_VPMOVUSQWZmrk_VPMOVSDBZmrk_VPMOVSQDZmrk_VPMOVUSDBZmrk_VPMOVUSQDZmrk_VPMOVUSQBZmrk_VPMOVUSWBZmrk = 1975, |
| 24330 | VCOMPRESSPDZ128rr_VCOMPRESSPSZ128rr_VPCOMPRESSDZ128rr_VPCOMPRESSQZ128rr = 1976, |
| 24331 | VCOMPRESSPDZ256rr_VCOMPRESSPSZ256rr_VPCOMPRESSDZ256rr_VPCOMPRESSQZ256rr = 1977, |
| 24332 | VCOMPRESSPDZrr_VCOMPRESSPSZrr_VPCOMPRESSDZrr_VPCOMPRESSQZrr = 1978, |
| 24333 | VEXPANDPDZ128rr_VEXPANDPDZ256rr_VEXPANDPSZ128rr_VEXPANDPSZ256rr_VEXPANDPDZrr_VEXPANDPSZrr_VPEXPANDDZ128rr_VPEXPANDDZ256rr_VPEXPANDQZ128rr_VPEXPANDQZ256rr_VPEXPANDDZrr_VPEXPANDQZrr = 1979, |
| 24334 | VPCOMPRESSBZ128rr_VPCOMPRESSWZ128rr = 1980, |
| 24335 | VPCOMPRESSBZ256rr_VPCOMPRESSWZ256rr_VPEXPANDBZ256rr_VPEXPANDWZ256rr = 1981, |
| 24336 | VPCOMPRESSBZrr_VPCOMPRESSWZrr_VPEXPANDBZrr_VPEXPANDWZrr = 1982, |
| 24337 | VPEXPANDBZ128rr_VPEXPANDWZ128rr = 1983, |
| 24338 | VCVTDQ2PDZrrk_VCVTDQ2PDZrrkz_VCVTUDQ2PDZrrk_VCVTUDQ2PDZrrkz = 1984, |
| 24339 | VCVTPS2QQZrrb_VCVTPS2QQZrrbk_VCVTPS2QQZrrk_VCVTPS2QQZrrkz_VCVTPS2UQQZrrb_VCVTPS2UQQZrrbk_VCVTPS2UQQZrrk_VCVTPS2UQQZrrkz_VCVTTPS2QQZrrb_VCVTTPS2QQZrrbk_VCVTTPS2QQZrrk_VCVTTPS2QQZrrkz_VCVTTPS2UQQZrrb_VCVTTPS2UQQZrrbk_VCVTTPS2UQQZrrk_VCVTTPS2UQQZrrkz_VCVTPS2QQZrrbkz_VCVTPS2UQQZrrbkz_VCVTTPS2QQZrrbkz_VCVTTPS2UQQZrrbkz = 1985, |
| 24340 | VCVTQQ2PSZrrb_VCVTQQ2PSZrrbk_VCVTQQ2PSZrrk_VCVTQQ2PSZrrkz_VCVTUQQ2PSZrrb_VCVTUQQ2PSZrrbk_VCVTUQQ2PSZrrk_VCVTUQQ2PSZrrkz_VCVTQQ2PSZrrbkz_VCVTUQQ2PSZrrbkz = 1986, |
| 24341 | VCVTDQ2PHZ128rm_VCVTDQ2PHZ128rmb_VCVTUDQ2PHZ128rm_VCVTUDQ2PHZ128rmb = 1987, |
| 24342 | VCVTNEPS2BF16Z128rm_VCVTNEPS2BF16Z128rmb = 1988, |
| 24343 | VCVTDQ2PHZ128rmbk_VCVTDQ2PHZ128rmkz_VCVTUDQ2PHZ128rmbk_VCVTUDQ2PHZ128rmkz_VCVTDQ2PHZ128rmbkz_VCVTDQ2PHZ128rmk_VCVTUDQ2PHZ128rmbkz_VCVTUDQ2PHZ128rmk = 1989, |
| 24344 | VCVTDQ2PHZ128rr_VCVTUDQ2PHZ128rr = 1990, |
| 24345 | VCVTDQ2PHZ128rrk_VCVTDQ2PHZ128rrkz_VCVTUDQ2PHZ128rrk_VCVTUDQ2PHZ128rrkz = 1991, |
| 24346 | VCVTDQ2PHZ256rm_VCVTDQ2PHZ256rmb_VCVTUDQ2PHZ256rm_VCVTUDQ2PHZ256rmb = 1992, |
| 24347 | VCVTNEPS2BF16Z128rmbk_VCVTNEPS2BF16Z128rmkz_VCVTNEPS2BF16Z128rmbkz_VCVTNEPS2BF16Z128rmk = 1993, |
| 24348 | VCVTDQ2PHZ256rmbk_VCVTDQ2PHZ256rmkz_VCVTUDQ2PHZ256rmbk_VCVTUDQ2PHZ256rmkz_VCVTDQ2PHZ256rmbkz_VCVTDQ2PHZ256rmk_VCVTUDQ2PHZ256rmbkz_VCVTUDQ2PHZ256rmk = 1994, |
| 24349 | VCVTDQ2PHZ256rr_VCVTUDQ2PHZ256rr = 1995, |
| 24350 | VCVTDQ2PHZ256rrk_VCVTDQ2PHZ256rrkz_VCVTUDQ2PHZ256rrk_VCVTUDQ2PHZ256rrkz = 1996, |
| 24351 | VCVTDQ2PHZrm_VCVTDQ2PHZrmb_VCVTUDQ2PHZrm_VCVTUDQ2PHZrmb = 1997, |
| 24352 | VCVTDQ2PHZrmbk_VCVTDQ2PHZrmkz_VCVTUDQ2PHZrmbk_VCVTUDQ2PHZrmkz_VCVTDQ2PHZrmbkz_VCVTDQ2PHZrmk_VCVTUDQ2PHZrmbkz_VCVTUDQ2PHZrmk = 1998, |
| 24353 | VCVTDQ2PHZrr_VCVTDQ2PHZrrb_VCVTUDQ2PHZrr_VCVTUDQ2PHZrrb = 1999, |
| 24354 | VCVTDQ2PHZrrbk_VCVTDQ2PHZrrkz_VCVTUDQ2PHZrrbk_VCVTUDQ2PHZrrkz_VCVTDQ2PHZrrbkz_VCVTDQ2PHZrrk_VCVTUDQ2PHZrrbkz_VCVTUDQ2PHZrrk = 2000, |
| 24355 | VCVTNE2PS2BF16Z128rm_VCVTNE2PS2BF16Z128rmb = 2001, |
| 24356 | VCVTNE2PS2BF16Z128rmbk_VCVTNE2PS2BF16Z128rmkz_VCVTNE2PS2BF16Z128rmbkz_VCVTNE2PS2BF16Z128rmk = 2002, |
| 24357 | VCVTNE2PS2BF16Z128rr = 2003, |
| 24358 | VCVTNE2PS2BF16Z256rr = 2004, |
| 24359 | VCVTNE2PS2BF16Z128rrk_VCVTNE2PS2BF16Z128rrkz = 2005, |
| 24360 | VCVTNE2PS2BF16Z256rrk_VCVTNE2PS2BF16Z256rrkz = 2006, |
| 24361 | VCVTNE2PS2BF16Z256rm_VCVTNE2PS2BF16Z256rmb = 2007, |
| 24362 | VCVTNE2PS2BF16Z256rmbk_VCVTNE2PS2BF16Z256rmkz_VCVTNE2PS2BF16Z256rmbkz_VCVTNE2PS2BF16Z256rmk = 2008, |
| 24363 | VCVTNE2PS2BF16Zrm_VCVTNE2PS2BF16Zrmb = 2009, |
| 24364 | VDPBF16PSZm_VDPBF16PSZmb_VDPBF16PSZmbk_VDPBF16PSZmk_VDPBF16PSZmkz = 2010, |
| 24365 | VDPBF16PSZmbkz = 2011, |
| 24366 | VCVTNE2PS2BF16Zrmbk_VCVTNE2PS2BF16Zrmkz_VCVTNE2PS2BF16Zrmbkz_VCVTNE2PS2BF16Zrmk = 2012, |
| 24367 | VCVTNE2PS2BF16Zrr = 2013, |
| 24368 | VCVTNE2PS2BF16Zrrk_VCVTNE2PS2BF16Zrrkz = 2014, |
| 24369 | VCVTNEPS2BF16Z128rr = 2015, |
| 24370 | VCVTNEPS2BF16Z256rr = 2016, |
| 24371 | VCVTNEPS2BF16Z128rrk_VCVTNEPS2BF16Z128rrkz = 2017, |
| 24372 | VCVTNEPS2BF16Z256rrk_VCVTNEPS2BF16Z256rrkz = 2018, |
| 24373 | VCVTNEPS2BF16Z256rm_VCVTNEPS2BF16Z256rmb = 2019, |
| 24374 | VCVTNEPS2BF16Z256rmbk_VCVTNEPS2BF16Z256rmkz_VCVTNEPS2BF16Z256rmbkz_VCVTNEPS2BF16Z256rmk = 2020, |
| 24375 | VCVTNEPS2BF16Zrm_VCVTNEPS2BF16Zrmb = 2021, |
| 24376 | VCVTNEPS2BF16Zrmbk_VCVTNEPS2BF16Zrmkz_VCVTNEPS2BF16Zrmbkz_VCVTNEPS2BF16Zrmk = 2022, |
| 24377 | VCVTNEPS2BF16Zrr = 2023, |
| 24378 | VCVTNEPS2BF16Zrrk_VCVTNEPS2BF16Zrrkz = 2024, |
| 24379 | VCVTPD2DQZ256rm_VCVTPD2DQZ256rmb_VCVTPD2UDQZ256rm_VCVTPD2UDQZ256rmb_VCVTTPD2DQZ256rm_VCVTTPD2DQZ256rmb_VCVTTPD2UDQZ256rm_VCVTTPD2UDQZ256rmb_VCVTPD2DQZ256rmbk_VCVTPD2DQZ256rmkz_VCVTPD2UDQZ256rmbk_VCVTPD2UDQZ256rmkz_VCVTTPD2DQZ256rmbk_VCVTTPD2DQZ256rmkz_VCVTTPD2UDQZ256rmbk_VCVTTPD2UDQZ256rmkz_VCVTPD2DQZ256rmbkz_VCVTPD2DQZ256rmk_VCVTPD2UDQZ256rmbkz_VCVTPD2UDQZ256rmk_VCVTTPD2DQZ256rmbkz_VCVTTPD2DQZ256rmk_VCVTTPD2UDQZ256rmbkz_VCVTTPD2UDQZ256rmk = 2025, |
| 24380 | VCVTPH2DQZ256rm_VCVTPH2DQZ256rmb_VCVTPH2UDQZ256rm_VCVTPH2UDQZ256rmb_VCVTTPH2DQZ256rm_VCVTTPH2DQZ256rmb_VCVTTPH2UDQZ256rm_VCVTTPH2UDQZ256rmb = 2026, |
| 24381 | VCVTPH2PSXZ128rmbk_VCVTPH2PSXZ128rmkz_VCVTPH2PSXZ128rmbkz_VCVTPH2PSXZ128rmk = 2027, |
| 24382 | VCVTPH2PSXZ256rm_VCVTPH2PSXZ256rmb = 2028, |
| 24383 | VCVTQQ2PSZ256rm_VCVTQQ2PSZ256rmb_VCVTQQ2PSZ256rmbk_VCVTQQ2PSZ256rmk_VCVTQQ2PSZ256rmkz_VCVTUQQ2PSZ256rm_VCVTUQQ2PSZ256rmb_VCVTUQQ2PSZ256rmbk_VCVTUQQ2PSZ256rmk_VCVTUQQ2PSZ256rmkz_VCVTQQ2PSZ256rmbkz_VCVTUQQ2PSZ256rmbkz = 2029, |
| 24384 | VCVTPH2DQZrm_VCVTPH2DQZrmb_VCVTPH2UDQZrm_VCVTPH2UDQZrmb_VCVTTPH2DQZrm_VCVTTPH2DQZrmb_VCVTTPH2UDQZrm_VCVTTPH2UDQZrmb = 2030, |
| 24385 | VCVTPH2PSXZrm_VCVTPH2PSXZrmb = 2031, |
| 24386 | VCVTPD2PHZ128rm_VCVTPD2PHZ128rmb = 2032, |
| 24387 | VCVTPD2PHZ128rmbk_VCVTPD2PHZ128rmkz_VCVTPD2PHZ128rmbkz_VCVTPD2PHZ128rmk = 2033, |
| 24388 | VCVTPD2PHZ128rr = 2034, |
| 24389 | VCVTPD2PHZ128rrk_VCVTPD2PHZ128rrkz = 2035, |
| 24390 | VCVTPD2PHZ256rm_VCVTPD2PHZ256rmb = 2036, |
| 24391 | VCVTPD2PHZ256rmbk_VCVTPD2PHZ256rmkz_VCVTPD2PHZ256rmbkz_VCVTPD2PHZ256rmk = 2037, |
| 24392 | VCVTPD2PHZ256rr = 2038, |
| 24393 | VCVTPD2PHZ256rrk_VCVTPD2PHZ256rrkz = 2039, |
| 24394 | VCVTPD2PHZrm_VCVTPD2PHZrmb = 2040, |
| 24395 | VCVTPH2PDZrm_VCVTPH2PDZrmb = 2041, |
| 24396 | VCVTPD2PHZrmbk_VCVTPD2PHZrmkz_VCVTPD2PHZrmbkz_VCVTPD2PHZrmk = 2042, |
| 24397 | VCVTPH2PDZrmbk_VCVTPH2PDZrmkz_VCVTPH2PDZrmbkz_VCVTPH2PDZrmk = 2043, |
| 24398 | VCVTPD2PHZrr_VCVTPD2PHZrrb = 2044, |
| 24399 | VCVTPH2PDZrr_VCVTPH2PDZrrb = 2045, |
| 24400 | VCVTPD2PHZrrbk_VCVTPD2PHZrrkz_VCVTPD2PHZrrbkz_VCVTPD2PHZrrk = 2046, |
| 24401 | VCVTPH2PDZrrbk_VCVTPH2PDZrrkz_VCVTPH2PDZrrbkz_VCVTPH2PDZrrk = 2047, |
| 24402 | VPABSBZ128rmk_VPABSBZ128rmkz_VPABSWZ128rmk_VPABSWZ128rmkz = 2048, |
| 24403 | VPABSBZ256rmk_VPABSBZ256rmkz_VPABSWZ256rmk_VPABSWZ256rmkz = 2049, |
| 24404 | VPLZCNTDZ128rm_VPLZCNTDZ128rmb_VPLZCNTDZ128rmbk_VPLZCNTDZ128rmk_VPLZCNTDZ128rmkz_VPLZCNTQZ128rm_VPLZCNTQZ128rmb_VPLZCNTQZ128rmbk_VPLZCNTQZ128rmk_VPLZCNTQZ128rmkz_VPLZCNTDZ128rmbkz_VPLZCNTQZ128rmbkz = 2050, |
| 24405 | VPSLLWZ128mik_VPSLLWZ128mikz_VPSRLWZ128mik_VPSRLWZ128mikz_VPSRAWZ128mik_VPSRAWZ128mikz = 2051, |
| 24406 | VPSLLWZ256mik_VPSLLWZ256mikz_VPSRLWZ256mik_VPSRLWZ256mikz_VPSRAWZ256mik_VPSRAWZ256mikz = 2052, |
| 24407 | VFIXUPIMMSDZrmi_VFIXUPIMMSDZrmik_VFIXUPIMMSDZrmikz_VFIXUPIMMSSZrmi_VFIXUPIMMSSZrmik_VFIXUPIMMSSZrmikz_VSCALEFSDZrm_VSCALEFSDZrmk_VSCALEFSDZrmkz_VSCALEFSSZrm_VSCALEFSSZrmk_VSCALEFSSZrmkz = 2053, |
| 24408 | VPADDSBZ128rmk_VPADDSBZ128rmkz_VPADDSWZ128rmk_VPADDSWZ128rmkz_VPADDUSBZ128rmk_VPADDUSBZ128rmkz_VPADDUSWZ128rmk_VPADDUSWZ128rmkz_VPSUBSBZ128rmk_VPSUBSBZ128rmkz_VPSUBSWZ128rmk_VPSUBSWZ128rmkz_VPSUBUSBZ128rmk_VPSUBUSBZ128rmkz_VPSUBUSWZ128rmk_VPSUBUSWZ128rmkz_VPAVGBZ128rmk_VPAVGBZ128rmkz_VPAVGWZ128rmk_VPAVGWZ128rmkz_VPMAXSBZ128rmk_VPMAXSBZ128rmkz_VPMAXUWZ128rmk_VPMAXUWZ128rmkz_VPMINSBZ128rmk_VPMINSBZ128rmkz_VPMINUWZ128rmk_VPMINUWZ128rmkz_VPMAXSWZ128rmk_VPMAXSWZ128rmkz_VPMAXUBZ128rmk_VPMAXUBZ128rmkz_VPMINSWZ128rmk_VPMINSWZ128rmkz_VPMINUBZ128rmk_VPMINUBZ128rmkz = 2054, |
| 24409 | VPSHLDVWZ128mk_VPSHLDVWZ128mkz_VPSHRDVWZ128mk_VPSHRDVWZ128mkz = 2055, |
| 24410 | VPSLLVWZ128rmk_VPSLLVWZ128rmkz_VPSRLVWZ128rmk_VPSRLVWZ128rmkz_VPSRAVWZ128rmk_VPSRAVWZ128rmkz = 2056, |
| 24411 | VPSLLWZ128rmk_VPSLLWZ128rmkz_VPSRLWZ128rmk_VPSRLWZ128rmkz_VPSRAWZ128rmk_VPSRAWZ128rmkz = 2057, |
| 24412 | VPADDSBZ256rmk_VPADDSBZ256rmkz_VPADDSWZ256rmk_VPADDSWZ256rmkz_VPADDUSBZ256rmk_VPADDUSBZ256rmkz_VPADDUSWZ256rmk_VPADDUSWZ256rmkz_VPSUBSBZ256rmk_VPSUBSBZ256rmkz_VPSUBSWZ256rmk_VPSUBSWZ256rmkz_VPSUBUSBZ256rmk_VPSUBUSBZ256rmkz_VPSUBUSWZ256rmk_VPSUBUSWZ256rmkz_VPAVGBZ256rmk_VPAVGBZ256rmkz_VPAVGWZ256rmk_VPAVGWZ256rmkz_VPMAXSBZ256rmk_VPMAXSBZ256rmkz_VPMAXUWZ256rmk_VPMAXUWZ256rmkz_VPMINSBZ256rmk_VPMINSBZ256rmkz_VPMINUWZ256rmk_VPMINUWZ256rmkz_VPMAXSWZ256rmk_VPMAXSWZ256rmkz_VPMAXUBZ256rmk_VPMAXUBZ256rmkz_VPMINSWZ256rmk_VPMINSWZ256rmkz_VPMINUBZ256rmk_VPMINUBZ256rmkz = 2058, |
| 24413 | VPSHLDVWZ256mk_VPSHLDVWZ256mkz_VPSHRDVWZ256mk_VPSHRDVWZ256mkz = 2059, |
| 24414 | VPSLLVWZ256rmk_VPSLLVWZ256rmkz_VPSRLVWZ256rmk_VPSRLVWZ256rmkz_VPSRAVWZ256rmk_VPSRAVWZ256rmkz = 2060, |
| 24415 | VPSLLWZ256rmk_VPSLLWZ256rmkz_VPSRLWZ256rmk_VPSRLWZ256rmkz_VPSRAWZ256rmk_VPSRAWZ256rmkz = 2061, |
| 24416 | VPMADD52HUQZ128m_VPMADD52HUQZ128mb_VPMADD52HUQZ128mbk_VPMADD52HUQZ128mk_VPMADD52HUQZ128mkz_VPMADD52LUQZ128m_VPMADD52LUQZ128mb_VPMADD52LUQZ128mbk_VPMADD52LUQZ128mk_VPMADD52LUQZ128mkz_VPMADD52HUQZ128mbkz_VPMADD52LUQZ128mbkz = 2062, |
| 24417 | VCVTQQ2PDZ128rr_VCVTQQ2PDZ128rrk_VCVTQQ2PDZ128rrkz_VCVTUQQ2PDZ128rr_VCVTUQQ2PDZ128rrk_VCVTUQQ2PDZ128rrkz = 2063, |
| 24418 | VCVTQQ2PDZ256rr_VCVTQQ2PDZ256rrk_VCVTQQ2PDZ256rrkz_VCVTUQQ2PDZ256rr_VCVTUQQ2PDZ256rrk_VCVTUQQ2PDZ256rrkz = 2064, |
| 24419 | VFIXUPIMMSDZrri_VFIXUPIMMSSZrri_VSCALEFSDZrr_VSCALEFSDZrrk_VSCALEFSDZrrkz_VSCALEFSSZrr_VSCALEFSSZrrk_VSCALEFSSZrrkz_VSCALEFSDZrrbk_Int_VSCALEFSDZrrbkz_Int_VSCALEFSSZrrbk_Int_VSCALEFSSZrrbkz_Int = 2065, |
| 24420 | VPLZCNTDZ128rr_VPLZCNTDZ128rrk_VPLZCNTDZ128rrkz_VPLZCNTQZ128rr_VPLZCNTQZ128rrk_VPLZCNTQZ128rrkz = 2066, |
| 24421 | VPLZCNTDZ256rr_VPLZCNTDZ256rrk_VPLZCNTDZ256rrkz_VPLZCNTQZ256rr_VPLZCNTQZ256rrk_VPLZCNTQZ256rrkz = 2067, |
| 24422 | VPMADD52HUQZ128r_VPMADD52HUQZ128rk_VPMADD52HUQZ128rkz_VPMADD52LUQZ128r_VPMADD52LUQZ128rk_VPMADD52LUQZ128rkz = 2068, |
| 24423 | VPMADD52HUQZ256r_VPMADD52HUQZ256rk_VPMADD52HUQZ256rkz_VPMADD52LUQZ256r_VPMADD52LUQZ256rk_VPMADD52LUQZ256rkz = 2069, |
| 24424 | VFIXUPIMMSDZrrib_VFIXUPIMMSDZrribk_VFIXUPIMMSDZrribkz_VFIXUPIMMSSZrrib_VFIXUPIMMSSZrribk_VFIXUPIMMSSZrribkz = 2070, |
| 24425 | VCVTPH2DQZ128rm_VCVTPH2DQZ128rmb_VCVTPH2UDQZ128rm_VCVTPH2UDQZ128rmb_VCVTTPH2DQZ128rm_VCVTTPH2DQZ128rmb_VCVTTPH2UDQZ128rm_VCVTTPH2UDQZ128rmb = 2071, |
| 24426 | VCVTPS2PHXZ128rm_VCVTPS2PHXZ128rmb = 2072, |
| 24427 | VCVTPH2DQZ128rmbk_VCVTPH2DQZ128rmkz_VCVTPH2UDQZ128rmbk_VCVTPH2UDQZ128rmkz_VCVTTPH2DQZ128rmbk_VCVTTPH2DQZ128rmkz_VCVTTPH2UDQZ128rmbk_VCVTTPH2UDQZ128rmkz_VCVTPH2DQZ128rmbkz_VCVTPH2DQZ128rmk_VCVTPH2UDQZ128rmbkz_VCVTPH2UDQZ128rmk_VCVTTPH2DQZ128rmbkz_VCVTTPH2DQZ128rmk_VCVTTPH2UDQZ128rmbkz_VCVTTPH2UDQZ128rmk = 2073, |
| 24428 | VCVTPH2DQZ128rrk_VCVTPH2DQZ128rrkz_VCVTPH2UDQZ128rrk_VCVTPH2UDQZ128rrkz_VCVTTPH2DQZ128rrk_VCVTTPH2DQZ128rrkz_VCVTTPH2UDQZ128rrk_VCVTTPH2UDQZ128rrkz = 2074, |
| 24429 | VCVTPH2DQZ256rrk_VCVTPH2DQZ256rrkz_VCVTPH2UDQZ256rrk_VCVTPH2UDQZ256rrkz_VCVTTPH2DQZ256rrk_VCVTTPH2DQZ256rrkz_VCVTTPH2UDQZ256rrk_VCVTTPH2UDQZ256rrkz = 2075, |
| 24430 | VCVTPH2PSXZ256rrk_VCVTPH2PSXZ256rrkz = 2076, |
| 24431 | VCVTPH2PSZ256rrk_VCVTPH2PSZ256rrkz = 2077, |
| 24432 | VCVTPS2PHXZ256rrk_VCVTPS2PHXZ256rrkz = 2078, |
| 24433 | VCVTPS2PHZ256rrk_VCVTPS2PHZ256rrkz = 2079, |
| 24434 | VCVTPH2DQZ256rmbk_VCVTPH2DQZ256rmkz_VCVTPH2UDQZ256rmbk_VCVTPH2UDQZ256rmkz_VCVTTPH2DQZ256rmbk_VCVTTPH2DQZ256rmkz_VCVTTPH2UDQZ256rmbk_VCVTTPH2UDQZ256rmkz_VCVTPH2DQZ256rmbkz_VCVTPH2DQZ256rmk_VCVTPH2UDQZ256rmbkz_VCVTPH2UDQZ256rmk_VCVTTPH2DQZ256rmbkz_VCVTTPH2DQZ256rmk_VCVTTPH2UDQZ256rmbkz_VCVTTPH2UDQZ256rmk = 2080, |
| 24435 | VCVTPH2PSXZ256rmbk_VCVTPH2PSXZ256rmkz_VCVTPH2PSXZ256rmbkz_VCVTPH2PSXZ256rmk = 2081, |
| 24436 | VCVTPS2PHXZ256rmbk_VCVTPS2PHXZ256rmkz_VCVTPS2PHXZ256rmbkz_VCVTPS2PHXZ256rmk = 2082, |
| 24437 | VCVTPH2DQZrmbk_VCVTPH2DQZrmkz_VCVTPH2UDQZrmbk_VCVTPH2UDQZrmkz_VCVTTPH2DQZrmbk_VCVTTPH2DQZrmkz_VCVTTPH2UDQZrmbk_VCVTTPH2UDQZrmkz_VCVTPH2DQZrmbkz_VCVTPH2DQZrmk_VCVTPH2UDQZrmbkz_VCVTPH2UDQZrmk_VCVTTPH2DQZrmbkz_VCVTTPH2DQZrmk_VCVTTPH2UDQZrmbkz_VCVTTPH2UDQZrmk = 2083, |
| 24438 | VCVTPH2PSXZrmbk_VCVTPH2PSXZrmkz_VCVTPH2PSXZrmbkz_VCVTPH2PSXZrmk = 2084, |
| 24439 | VCVTPS2PHXZrmbk_VCVTPS2PHXZrmkz_VCVTPS2PHXZrmbkz_VCVTPS2PHXZrmk = 2085, |
| 24440 | VCVTPH2DQZrr_VCVTPH2DQZrrb_VCVTPH2UDQZrr_VCVTPH2UDQZrrb_VCVTTPH2DQZrr_VCVTTPH2DQZrrb_VCVTTPH2UDQZrr_VCVTTPH2UDQZrrb = 2086, |
| 24441 | VCVTPH2PSXZrr_VCVTPH2PSXZrrb = 2087, |
| 24442 | VCVTPH2PSZrr_VCVTPH2PSZrrb = 2088, |
| 24443 | VCVTPS2PHXZrr_VCVTPS2PHXZrrb = 2089, |
| 24444 | VCVTPS2PHZrr_VCVTPS2PHZrrb = 2090, |
| 24445 | VPSHUFBITQMBZ128rrk = 2091, |
| 24446 | VPSHUFBITQMBZ256rrk = 2092, |
| 24447 | VPSHUFBITQMBZrrk = 2093, |
| 24448 | VCVTPH2DQZrrbk_VCVTPH2DQZrrkz_VCVTPH2UDQZrrbk_VCVTPH2UDQZrrkz_VCVTTPH2DQZrrbk_VCVTTPH2DQZrrkz_VCVTTPH2UDQZrrbk_VCVTTPH2UDQZrrkz_VCVTPH2DQZrrbkz_VCVTPH2DQZrrk_VCVTPH2UDQZrrbkz_VCVTPH2UDQZrrk_VCVTTPH2DQZrrbkz_VCVTTPH2DQZrrk_VCVTTPH2UDQZrrbkz_VCVTTPH2UDQZrrk = 2094, |
| 24449 | VCVTPH2PSXZrrbk_VCVTPH2PSXZrrkz_VCVTPH2PSXZrrbkz_VCVTPH2PSXZrrk = 2095, |
| 24450 | VCVTPS2PHXZrrbk_VCVTPS2PHXZrrkz_VCVTPS2PHXZrrbkz_VCVTPS2PHXZrrk = 2096, |
| 24451 | VCVTPH2PDZ128rm_VCVTPH2PDZ128rmb = 2097, |
| 24452 | VCVTPH2PDZ128rmbk_VCVTPH2PDZ128rmkz_VCVTPH2PDZ128rmbkz_VCVTPH2PDZ128rmk = 2098, |
| 24453 | VCVTPH2PDZ128rr = 2099, |
| 24454 | VCVTPH2PDZ128rrk_VCVTPH2PDZ128rrkz = 2100, |
| 24455 | VCVTPH2PDZ256rm_VCVTPH2PDZ256rmb = 2101, |
| 24456 | VCVTPH2PDZ256rmbk_VCVTPH2PDZ256rmkz_VCVTPH2PDZ256rmbkz_VCVTPH2PDZ256rmk = 2102, |
| 24457 | VCVTPH2PDZ256rr = 2103, |
| 24458 | VCVTPH2PDZ256rrk_VCVTPH2PDZ256rrkz = 2104, |
| 24459 | VCVTPH2PSXZ128rrk_VCVTPH2PSXZ128rrkz = 2105, |
| 24460 | VCVTPH2PSZ128rrk_VCVTPH2PSZ128rrkz = 2106, |
| 24461 | VCVTPS2PHXZ128rrk_VCVTPS2PHXZ128rrkz = 2107, |
| 24462 | VCVTPS2PHZ128rrk_VCVTPS2PHZ128rrkz = 2108, |
| 24463 | VCVTPH2PSZ128rmk_VCVTPH2PSZ128rmkz = 2109, |
| 24464 | VCVTPH2PSZ256rmk_VCVTPH2PSZ256rmkz = 2110, |
| 24465 | VCVTSH2SSZrmk_Int_VCVTSH2SSZrmkz_Int = 2111, |
| 24466 | VPMADDUBSWZ128rmk_VPMADDUBSWZ128rmkz_VPMULHRSWZ128rmk_VPMULHRSWZ128rmkz_VPMULHUWZ128rmk_VPMULHUWZ128rmkz_VPMULHWZ128rmk_VPMULHWZ128rmkz_VPMULLWZ128rmk_VPMULLWZ128rmkz = 2112, |
| 24467 | VPMADDUBSWZ256rmk_VPMADDUBSWZ256rmkz_VPMULHRSWZ256rmk_VPMULHRSWZ256rmkz_VPMULHUWZ256rmk_VPMULHUWZ256rmkz_VPMULHWZ256rmk_VPMULHWZ256rmkz_VPMULLWZ256rmk_VPMULLWZ256rmkz = 2113, |
| 24468 | VCVTPH2PSZrm = 2114, |
| 24469 | VPERMWZrmk_VPERMWZrmkz = 2115, |
| 24470 | VCVTPH2QQZ128rm_VCVTPH2QQZ128rmb_VCVTPH2QQZ128rmbk_VCVTPH2QQZ128rmk_VCVTPH2QQZ128rmkz_VCVTPH2UQQZ128rm_VCVTPH2UQQZ128rmb_VCVTPH2UQQZ128rmbk_VCVTPH2UQQZ128rmk_VCVTPH2UQQZ128rmkz_VCVTTPH2QQZ128rm_VCVTTPH2QQZ128rmb_VCVTTPH2QQZ128rmbk_VCVTTPH2QQZ128rmk_VCVTTPH2QQZ128rmkz_VCVTTPH2UQQZ128rm_VCVTTPH2UQQZ128rmb_VCVTTPH2UQQZ128rmbk_VCVTTPH2UQQZ128rmk_VCVTTPH2UQQZ128rmkz_VCVTPH2QQZ128rmbkz_VCVTPH2UQQZ128rmbkz_VCVTTPH2QQZ128rmbkz_VCVTTPH2UQQZ128rmbkz = 2116, |
| 24471 | VCVTPH2QQZ128rr_VCVTPH2QQZ128rrk_VCVTPH2QQZ128rrkz_VCVTPH2UQQZ128rr_VCVTPH2UQQZ128rrk_VCVTPH2UQQZ128rrkz_VCVTTPH2QQZ128rr_VCVTTPH2QQZ128rrk_VCVTTPH2QQZ128rrkz_VCVTTPH2UQQZ128rr_VCVTTPH2UQQZ128rrk_VCVTTPH2UQQZ128rrkz = 2117, |
| 24472 | VCVTPH2QQZ256rr_VCVTPH2QQZ256rrk_VCVTPH2QQZ256rrkz_VCVTPH2UQQZ256rr_VCVTPH2UQQZ256rrk_VCVTPH2UQQZ256rrkz_VCVTTPH2QQZ256rr_VCVTTPH2QQZ256rrk_VCVTTPH2QQZ256rrkz_VCVTTPH2UQQZ256rr_VCVTTPH2UQQZ256rrk_VCVTTPH2UQQZ256rrkz = 2118, |
| 24473 | VCVTPH2QQZ256rm_VCVTPH2QQZ256rmb_VCVTPH2QQZ256rmbk_VCVTPH2QQZ256rmk_VCVTPH2QQZ256rmkz_VCVTPH2UQQZ256rm_VCVTPH2UQQZ256rmb_VCVTPH2UQQZ256rmbk_VCVTPH2UQQZ256rmk_VCVTPH2UQQZ256rmkz_VCVTTPH2QQZ256rm_VCVTTPH2QQZ256rmb_VCVTTPH2QQZ256rmbk_VCVTTPH2QQZ256rmk_VCVTTPH2QQZ256rmkz_VCVTTPH2UQQZ256rm_VCVTTPH2UQQZ256rmb_VCVTTPH2UQQZ256rmbk_VCVTTPH2UQQZ256rmk_VCVTTPH2UQQZ256rmkz_VCVTPH2QQZ256rmbkz_VCVTPH2UQQZ256rmbkz_VCVTTPH2QQZ256rmbkz_VCVTTPH2UQQZ256rmbkz = 2119, |
| 24474 | VCVTPS2PHXZ128rmbk_VCVTPS2PHXZ128rmkz_VCVTPS2PHXZ128rmbkz_VCVTPS2PHXZ128rmk = 2120, |
| 24475 | VCVTPS2PHXZ256rm_VCVTPS2PHXZ256rmb = 2121, |
| 24476 | VCVTPS2PHXZrm_VCVTPS2PHXZrmb = 2122, |
| 24477 | VCVTPS2PHZ128mrk = 2123, |
| 24478 | VCVTPS2PHZ256mrk = 2124, |
| 24479 | VCVTPS2PHZmrk = 2125, |
| 24480 | VCVTQQ2PHZ128rm_VCVTQQ2PHZ128rmb_VCVTUQQ2PHZ128rm_VCVTUQQ2PHZ128rmb = 2126, |
| 24481 | VCVTQQ2PHZ128rmbk_VCVTQQ2PHZ128rmkz_VCVTUQQ2PHZ128rmbk_VCVTUQQ2PHZ128rmkz_VCVTQQ2PHZ128rmbkz_VCVTQQ2PHZ128rmk_VCVTUQQ2PHZ128rmbkz_VCVTUQQ2PHZ128rmk = 2127, |
| 24482 | VCVTQQ2PHZ128rr_VCVTUQQ2PHZ128rr = 2128, |
| 24483 | VCVTQQ2PHZ128rrk_VCVTQQ2PHZ128rrkz_VCVTUQQ2PHZ128rrk_VCVTUQQ2PHZ128rrkz = 2129, |
| 24484 | VCVTQQ2PHZ256rr_VCVTUQQ2PHZ256rr = 2130, |
| 24485 | VCVTQQ2PHZ256rm_VCVTQQ2PHZ256rmb_VCVTUQQ2PHZ256rm_VCVTUQQ2PHZ256rmb = 2131, |
| 24486 | VCVTQQ2PHZ256rmbk_VCVTQQ2PHZ256rmkz_VCVTUQQ2PHZ256rmbk_VCVTUQQ2PHZ256rmkz_VCVTQQ2PHZ256rmbkz_VCVTQQ2PHZ256rmk_VCVTUQQ2PHZ256rmbkz_VCVTUQQ2PHZ256rmk = 2132, |
| 24487 | VCVTQQ2PHZ256rrk_VCVTQQ2PHZ256rrkz_VCVTUQQ2PHZ256rrk_VCVTUQQ2PHZ256rrkz = 2133, |
| 24488 | VCVTQQ2PHZrm_VCVTQQ2PHZrmb_VCVTUQQ2PHZrm_VCVTUQQ2PHZrmb = 2134, |
| 24489 | VCVTQQ2PHZrmbk_VCVTQQ2PHZrmkz_VCVTUQQ2PHZrmbk_VCVTUQQ2PHZrmkz_VCVTQQ2PHZrmbkz_VCVTQQ2PHZrmk_VCVTUQQ2PHZrmbkz_VCVTUQQ2PHZrmk = 2135, |
| 24490 | VCVTQQ2PHZrr_VCVTQQ2PHZrrb_VCVTUQQ2PHZrr_VCVTUQQ2PHZrrb = 2136, |
| 24491 | VCVTQQ2PHZrrbk_VCVTQQ2PHZrrkz_VCVTUQQ2PHZrrbk_VCVTUQQ2PHZrrkz_VCVTQQ2PHZrrbkz_VCVTQQ2PHZrrk_VCVTUQQ2PHZrrbkz_VCVTUQQ2PHZrrk = 2137, |
| 24492 | VCVTSD2SHZrm_VCVTSD2SHZrm_Int = 2138, |
| 24493 | VCVTSD2SHZrmk_Int_VCVTSD2SHZrmkz_Int = 2139, |
| 24494 | VCVTSD2SHZrr_Int_VCVTSD2SHZrrb_Int = 2140, |
| 24495 | VCVTSD2SHZrr = 2141, |
| 24496 | VCVTSD2SHZrrbk_Int_VCVTSD2SHZrrbkz_Int_VCVTSD2SHZrrk_Int_VCVTSD2SHZrrkz_Int = 2142, |
| 24497 | VCVTSH2SDZrm_VCVTSH2SDZrm_Int = 2143, |
| 24498 | VCVTSH2SDZrmk_Int_VCVTSH2SDZrmkz_Int = 2144, |
| 24499 | VCVTSH2SDZrr_Int_VCVTSH2SDZrrb_Int = 2145, |
| 24500 | VCVTSH2SDZrr = 2146, |
| 24501 | VCVTSH2SDZrrbk_Int_VCVTSH2SDZrrbkz_Int_VCVTSH2SDZrrk_Int_VCVTSH2SDZrrkz_Int = 2147, |
| 24502 | VCVTSH2SI64Zrm_Int_VCVTSH2SIZrm_Int_VCVTSH2USI64Zrm_Int_VCVTSH2USIZrm_Int_VCVTTSH2SI64Zrm_Int_VCVTTSH2SIZrm_Int_VCVTTSH2USI64Zrm_Int_VCVTTSH2USIZrm_Int_VCVTTSH2SI64Zrm_VCVTTSH2SIZrm_VCVTTSH2USI64Zrm_VCVTTSH2USIZrm = 2148, |
| 24503 | VCVTSH2SI64Zrr_Int_VCVTSH2SI64Zrrb_Int_VCVTSH2SIZrr_Int_VCVTSH2SIZrrb_Int_VCVTSH2USI64Zrr_Int_VCVTSH2USI64Zrrb_Int_VCVTSH2USIZrr_Int_VCVTSH2USIZrrb_Int_VCVTTSH2SI64Zrr_Int_VCVTTSH2SI64Zrrb_Int_VCVTTSH2SIZrr_Int_VCVTTSH2SIZrrb_Int_VCVTTSH2USI64Zrr_Int_VCVTTSH2USI64Zrrb_Int_VCVTTSH2USIZrr_Int_VCVTTSH2USIZrrb_Int_VCVTTSH2SI64Zrr_VCVTTSH2SIZrr_VCVTTSH2USI64Zrr_VCVTTSH2USIZrr = 2149, |
| 24504 | VCVTSH2SSZrrbk_Int_VCVTSH2SSZrrbkz_Int_VCVTSH2SSZrrk_Int_VCVTSH2SSZrrkz_Int = 2150, |
| 24505 | VCVTSI2SHZrm_VCVTSI2SHZrm_Int_VCVTSI642SHZrm_VCVTSI642SHZrm_Int_VCVTUSI2SHZrm_VCVTUSI2SHZrm_Int_VCVTUSI642SHZrm_VCVTUSI642SHZrm_Int = 2151, |
| 24506 | VCVTSS2SHZrm_VCVTSS2SHZrm_Int = 2152, |
| 24507 | VCVTSS2SHZrmk_Int_VCVTSS2SHZrmkz_Int = 2153, |
| 24508 | VCVTSS2SHZrr_Int_VCVTSS2SHZrrb_Int = 2154, |
| 24509 | VCVTSS2SHZrr = 2155, |
| 24510 | VCVTSS2SHZrrbk_Int_VCVTSS2SHZrrbkz_Int_VCVTSS2SHZrrk_Int_VCVTSS2SHZrrkz_Int = 2156, |
| 24511 | VDBPSADBWZ128rrik_VDBPSADBWZ128rrikz = 2157, |
| 24512 | VDBPSADBWZ256rrik_VDBPSADBWZ256rrikz = 2158, |
| 24513 | VDBPSADBWZrrik_VDBPSADBWZrrikz = 2159, |
| 24514 | VPACKSSDWZrrk_VPACKSSDWZrrkz_VPACKSSWBZrrk_VPACKSSWBZrrkz_VPACKUSDWZrrk_VPACKUSDWZrrkz_VPACKUSWBZrrk_VPACKUSWBZrrkz = 2160, |
| 24515 | VPBROADCASTBZ256rrk_VPBROADCASTBZ256rrkz_VPBROADCASTBZrrk_VPBROADCASTBZrrkz_VPBROADCASTDrZ256rrk_VPBROADCASTDrZ256rrkz_VPBROADCASTDrZrrk_VPBROADCASTDrZrrkz_VPBROADCASTQrZ256rrk_VPBROADCASTQrZ256rrkz_VPBROADCASTQrZrrk_VPBROADCASTQrZrrkz_VPBROADCASTWZ256rrk_VPBROADCASTWZ256rrkz_VPBROADCASTWZrrk_VPBROADCASTWZrrkz_VPBROADCASTWrZ256rrk_VPBROADCASTWrZ256rrkz_VPBROADCASTWrZrrk_VPBROADCASTWrZrrkz_VPBROADCASTBrZ256rr_VPBROADCASTDrZ256rr_VPBROADCASTQrZ256rr_VPBROADCASTWrZ256rr_VPBROADCASTBrZ256rrk_VPBROADCASTBrZ256rrkz_VPBROADCASTBrZrr_VPBROADCASTDrZrr_VPBROADCASTQrZrr_VPBROADCASTWrZrr_VPBROADCASTBrZrrk_VPBROADCASTBrZrrkz = 2161, |
| 24516 | VPBROADCASTBrZ128rr_VPBROADCASTDrZ128rr_VPBROADCASTQrZ128rr_VPBROADCASTWrZ128rr_VPBROADCASTBrZ128rrk_VPBROADCASTBrZ128rrkz_VPBROADCASTDrZ128rrk_VPBROADCASTDrZ128rrkz_VPBROADCASTQrZ128rrk_VPBROADCASTQrZ128rrkz_VPBROADCASTWrZ128rrk_VPBROADCASTWrZ128rrkz = 2162, |
| 24517 | VPERMBZ128rrk_VPERMBZ128rrkz = 2163, |
| 24518 | VPERMBZ256rrk_VPERMBZ256rrkz = 2164, |
| 24519 | VPERMBZrrk_VPERMBZrrkz = 2165, |
| 24520 | VPMOVSXBWZ256rrk_VPMOVSXBWZ256rrkz_VPMOVZXBWZ256rrk_VPMOVZXBWZ256rrkz = 2166, |
| 24521 | VPMOVSXBWZrrk_VPMOVSXBWZrrkz_VPMOVZXBWZrrk_VPMOVZXBWZrrkz = 2167, |
| 24522 | VPMULTISHIFTQBZ128rrk_VPMULTISHIFTQBZ128rrkz = 2168, |
| 24523 | VPMULTISHIFTQBZ256rrk_VPMULTISHIFTQBZ256rrkz_VPOPCNTBZ256rrk_VPOPCNTBZ256rrkz_VPOPCNTWZ256rrk_VPOPCNTWZ256rrkz = 2169, |
| 24524 | VPMULTISHIFTQBZrrk_VPMULTISHIFTQBZrrkz_VPOPCNTBZrrk_VPOPCNTBZrrkz_VPOPCNTWZrrk_VPOPCNTWZrrkz = 2170, |
| 24525 | VPOPCNTBZ128rrk_VPOPCNTBZ128rrkz_VPOPCNTWZ128rrk_VPOPCNTWZ128rrkz = 2171, |
| 24526 | VDIVPHZ128rm_VDIVPHZ128rmb = 2172, |
| 24527 | VDIVPHZ128rmbk_VDIVPHZ128rmkz_VDIVPHZ128rmbkz_VDIVPHZ128rmk = 2173, |
| 24528 | VDIVPHZ128rr = 2174, |
| 24529 | VDIVPHZ256rr = 2175, |
| 24530 | VDIVPHZ128rrk = 2176, |
| 24531 | VDIVPHZ256rrk = 2177, |
| 24532 | VSQRTPHZ128r = 2178, |
| 24533 | VSQRTPHZ256r = 2179, |
| 24534 | VDIVPHZ128rrkz = 2180, |
| 24535 | VDIVPHZ256rm_VDIVPHZ256rmb = 2181, |
| 24536 | VDIVPHZ256rmbk_VDIVPHZ256rmkz_VDIVPHZ256rmbkz_VDIVPHZ256rmk = 2182, |
| 24537 | VSQRTPHZ128m_VSQRTPHZ128mb = 2183, |
| 24538 | VDIVPHZ256rrkz = 2184, |
| 24539 | VDIVPHZrm_VDIVPHZrmb = 2185, |
| 24540 | VDIVPHZrmbk_VDIVPHZrmkz_VDIVPHZrmbkz_VDIVPHZrmk = 2186, |
| 24541 | VDIVPHZrr_VDIVPHZrrb = 2187, |
| 24542 | VDIVPHZrrbk_VDIVPHZrrkz_VDIVPHZrrbkz_VDIVPHZrrk = 2188, |
| 24543 | VDIVPSZrr = 2189, |
| 24544 | VDIVSHZrm_Int_VDIVSHZrmk_Int_VDIVSHZrmkz_Int = 2190, |
| 24545 | VDIVSHZrm = 2191, |
| 24546 | VDIVSHZrr_Int = 2192, |
| 24547 | VSQRTSHZr_Int = 2193, |
| 24548 | VDPBF16PSZ128m_VDPBF16PSZ128mb_VDPBF16PSZ128mbk_VDPBF16PSZ128mk_VDPBF16PSZ128mkz = 2194, |
| 24549 | VDPBF16PSZ128mbkz = 2195, |
| 24550 | VDPBF16PSZ256m_VDPBF16PSZ256mb_VDPBF16PSZ256mbk_VDPBF16PSZ256mk_VDPBF16PSZ256mkz = 2196, |
| 24551 | VDPBF16PSZ256mbkz = 2197, |
| 24552 | VPEXPANDBZ128rm_VPEXPANDWZ128rm = 2198, |
| 24553 | VFCMADDCPHZ128m_VFCMADDCPHZ128mb_VFMADDCPHZ128m_VFMADDCPHZ128mb = 2199, |
| 24554 | VFCMADDCPHZ256m_VFCMADDCPHZ256mb_VFMADDCPHZ256m_VFMADDCPHZ256mb = 2200, |
| 24555 | VROUNDPDYmi_VROUNDPSYmi = 2201, |
| 24556 | VFCMADDCSHZm_VFMADDCSHZm_VFCMULCPHZ128rm_VFCMULCPHZ128rmb_VFMULCPHZ128rm_VFMULCPHZ128rmb_VFCMULCSHZrm_VFMULCSHZrm = 2202, |
| 24557 | VRNDSCALEPHZ128rmbi_VRNDSCALEPHZ128rmi_VRNDSCALESHZrmi_VRNDSCALESHZrmi_Int = 2203, |
| 24558 | VSCALEFPHZ128rm_VSCALEFPHZ128rmb = 2204, |
| 24559 | VFCMULCPHZ256rm_VFCMULCPHZ256rmb_VFMULCPHZ256rm_VFMULCPHZ256rmb = 2205, |
| 24560 | VRNDSCALEPDZ256rmbi_VRNDSCALEPDZ256rmi_VRNDSCALEPHZ256rmbi_VRNDSCALEPHZ256rmi_VRNDSCALEPSZ256rmbi_VRNDSCALEPSZ256rmi_VRNDSCALEPDZ256rmbik_VRNDSCALEPDZ256rmbikz_VRNDSCALEPDZ256rmik_VRNDSCALEPDZ256rmikz_VRNDSCALEPSZ256rmbik_VRNDSCALEPSZ256rmbikz_VRNDSCALEPSZ256rmik_VRNDSCALEPSZ256rmikz = 2206, |
| 24561 | VSCALEFPHZ256rm_VSCALEFPHZ256rmb = 2207, |
| 24562 | VSCALEFSHZrm = 2208, |
| 24563 | VFCMADDCPHZ128mbk_VFCMADDCPHZ128mkz_VFMADDCPHZ128mbk_VFMADDCPHZ128mkz_VFCMADDCPHZ128mbkz_VFCMADDCPHZ128mk_VFMADDCPHZ128mbkz_VFMADDCPHZ128mk = 2209, |
| 24564 | VFCMADDCPHZ256mbk_VFCMADDCPHZ256mkz_VFMADDCPHZ256mbk_VFMADDCPHZ256mkz_VFCMADDCPHZ256mbkz_VFCMADDCPHZ256mk_VFMADDCPHZ256mbkz_VFMADDCPHZ256mk = 2210, |
| 24565 | VFCMADDCSHZmk_VFCMADDCSHZmkz_VFMADDCSHZmk_VFMADDCSHZmkz_VFCMULCPHZ128rmbk_VFCMULCPHZ128rmkz_VFMULCPHZ128rmbk_VFMULCPHZ128rmkz_VFCMULCPHZ128rmbkz_VFCMULCPHZ128rmk_VFMULCPHZ128rmbkz_VFMULCPHZ128rmk_VFCMULCSHZrmk_VFCMULCSHZrmkz_VFMULCSHZrmk_VFMULCSHZrmkz = 2211, |
| 24566 | VFCMULCPHZ256rmbk_VFCMULCPHZ256rmkz_VFMULCPHZ256rmbk_VFMULCPHZ256rmkz_VFCMULCPHZ256rmbkz_VFCMULCPHZ256rmk_VFMULCPHZ256rmbkz_VFMULCPHZ256rmk = 2212, |
| 24567 | VFCMADDCPHZ128r_VFMADDCPHZ128r_VFCMADDCSHZr_VFCMADDCSHZrb_VFMADDCSHZr_VFMADDCSHZrb_VFCMULCPHZ128rr_VFMULCPHZ128rr_VFCMULCSHZrr_VFCMULCSHZrrb_VFMULCSHZrr_VFMULCSHZrrb = 2213, |
| 24568 | VFCMADDCPHZ256r_VFMADDCPHZ256r_VFCMULCPHZ256rr_VFMULCPHZ256rr = 2214, |
| 24569 | VRNDSCALEPHZ128rri_VRNDSCALESHZrri_Int_VRNDSCALESHZrrib_Int = 2215, |
| 24570 | VRNDSCALEPHZ256rri = 2216, |
| 24571 | VSCALEFPHZ128rr = 2217, |
| 24572 | VSCALEFPHZ256rr = 2218, |
| 24573 | VRNDSCALESHZrri = 2219, |
| 24574 | VSCALEFSHZrr_VSCALEFSHZrrb_Int = 2220, |
| 24575 | VFCMADDCPHZ128rk_VFCMADDCPHZ128rkz_VFMADDCPHZ128rk_VFMADDCPHZ128rkz_VFCMADDCSHZrbk_VFCMADDCSHZrkz_VFMADDCSHZrbk_VFMADDCSHZrkz_VFCMADDCSHZrbkz_VFCMADDCSHZrk_VFMADDCSHZrbkz_VFMADDCSHZrk_VFCMULCPHZ128rrk_VFCMULCPHZ128rrkz_VFMULCPHZ128rrk_VFMULCPHZ128rrkz_VFCMULCSHZrrbk_VFCMULCSHZrrkz_VFMULCSHZrrbk_VFMULCSHZrrkz_VFCMULCSHZrrbkz_VFCMULCSHZrrk_VFMULCSHZrrbkz_VFMULCSHZrrk = 2221, |
| 24576 | VFCMADDCPHZ256rk_VFCMADDCPHZ256rkz_VFMADDCPHZ256rk_VFMADDCPHZ256rkz_VFCMULCPHZ256rrk_VFCMULCPHZ256rrkz_VFMULCPHZ256rrk_VFMULCPHZ256rrkz = 2222, |
| 24577 | VFCMADDCPHZm_VFCMADDCPHZmb_VFMADDCPHZm_VFMADDCPHZmb = 2223, |
| 24578 | VFCMULCPHZrm_VFCMULCPHZrmb_VFMULCPHZrm_VFMULCPHZrmb = 2224, |
| 24579 | VRNDSCALEPDZrmbi_VRNDSCALEPDZrmi_VRNDSCALEPHZrmbi_VRNDSCALEPHZrmi_VRNDSCALEPSZrmbi_VRNDSCALEPSZrmi_VRNDSCALEPDZrmbik_VRNDSCALEPDZrmbikz_VRNDSCALEPDZrmik_VRNDSCALEPDZrmikz_VRNDSCALEPSZrmbik_VRNDSCALEPSZrmbikz_VRNDSCALEPSZrmik_VRNDSCALEPSZrmikz = 2225, |
| 24580 | VSCALEFPHZrm_VSCALEFPHZrmb = 2226, |
| 24581 | VFCMADDCPHZmbk_VFCMADDCPHZmkz_VFMADDCPHZmbk_VFMADDCPHZmkz_VFCMADDCPHZmbkz_VFCMADDCPHZmk_VFMADDCPHZmbkz_VFMADDCPHZmk = 2227, |
| 24582 | VFCMULCPHZrmbk_VFCMULCPHZrmkz_VFMULCPHZrmbk_VFMULCPHZrmkz_VFCMULCPHZrmbkz_VFCMULCPHZrmk_VFMULCPHZrmbkz_VFMULCPHZrmk = 2228, |
| 24583 | VFCMADDCPHZr_VFCMADDCPHZrb_VFMADDCPHZr_VFMADDCPHZrb_VFCMULCPHZrr_VFCMULCPHZrrb_VFMULCPHZrr_VFMULCPHZrrb = 2229, |
| 24584 | VRNDSCALEPHZrri_VRNDSCALEPHZrrib = 2230, |
| 24585 | VSCALEFPHZrr_VSCALEFPHZrrb = 2231, |
| 24586 | VFCMADDCPHZrbk_VFCMADDCPHZrkz_VFMADDCPHZrbk_VFMADDCPHZrkz_VFCMADDCPHZrbkz_VFCMADDCPHZrk_VFMADDCPHZrbkz_VFMADDCPHZrk_VFCMULCPHZrrbk_VFCMULCPHZrrkz_VFMULCPHZrrbk_VFMULCPHZrrkz_VFCMULCPHZrrbkz_VFCMULCPHZrrk_VFMULCPHZrrbkz_VFMULCPHZrrk = 2232, |
| 24587 | VGATHERDPDZ128rm_VGATHERQPDZ128rm_VPGATHERDQZ128rm_VPGATHERQQZ128rm = 2233, |
| 24588 | VGATHERDPDZ256rm_VGATHERQPDZ256rm_VPGATHERDQZ256rm_VPGATHERQQZ256rm = 2234, |
| 24589 | VGATHERQPSZ256rm_VPGATHERQDZ256rm = 2235, |
| 24590 | VGATHERDPDZrm_VGATHERQPDZrm_VPGATHERDQZrm_VPGATHERQQZrm = 2236, |
| 24591 | VGATHERQPSZrm_VPGATHERQDZrm = 2237, |
| 24592 | VGF2P8AFFINEINVQBZ128rmbik_VGF2P8AFFINEINVQBZ128rmbikz_VGF2P8AFFINEINVQBZ128rmik_VGF2P8AFFINEINVQBZ128rmikz_VGF2P8AFFINEQBZ128rmbik_VGF2P8AFFINEQBZ128rmbikz_VGF2P8AFFINEQBZ128rmik_VGF2P8AFFINEQBZ128rmikz = 2238, |
| 24593 | VGF2P8MULBZ128rmk_VGF2P8MULBZ128rmkz = 2239, |
| 24594 | VGF2P8AFFINEINVQBZ256rmbik_VGF2P8AFFINEINVQBZ256rmbikz_VGF2P8AFFINEINVQBZ256rmik_VGF2P8AFFINEINVQBZ256rmikz_VGF2P8AFFINEQBZ256rmbik_VGF2P8AFFINEQBZ256rmbikz_VGF2P8AFFINEQBZ256rmik_VGF2P8AFFINEQBZ256rmikz = 2240, |
| 24595 | VGF2P8MULBZ256rmk_VGF2P8MULBZ256rmkz = 2241, |
| 24596 | VGF2P8AFFINEINVQBZ128rrik_VGF2P8AFFINEQBZ128rrik = 2242, |
| 24597 | VGF2P8AFFINEINVQBZ256rrik_VGF2P8AFFINEQBZ256rrik = 2243, |
| 24598 | VGF2P8MULBZ128rrk = 2244, |
| 24599 | VGF2P8MULBZ256rrk = 2245, |
| 24600 | VGF2P8AFFINEINVQBZ128rrikz_VGF2P8AFFINEQBZ128rrikz = 2246, |
| 24601 | VGF2P8AFFINEINVQBZ256rrikz_VGF2P8AFFINEQBZ256rrikz = 2247, |
| 24602 | VGF2P8MULBZ128rrkz = 2248, |
| 24603 | VGF2P8MULBZ256rrkz = 2249, |
| 24604 | VGF2P8AFFINEINVQBZrmbik_VGF2P8AFFINEINVQBZrmbikz_VGF2P8AFFINEINVQBZrmik_VGF2P8AFFINEINVQBZrmikz_VGF2P8AFFINEQBZrmbik_VGF2P8AFFINEQBZrmbikz_VGF2P8AFFINEQBZrmik_VGF2P8AFFINEQBZrmikz = 2250, |
| 24605 | VGF2P8MULBZrmk_VGF2P8MULBZrmkz = 2251, |
| 24606 | VGF2P8AFFINEINVQBZrrik_VGF2P8AFFINEQBZrrik = 2252, |
| 24607 | VGF2P8MULBZrrk = 2253, |
| 24608 | VGF2P8AFFINEINVQBZrrikz_VGF2P8AFFINEQBZrrikz = 2254, |
| 24609 | VGF2P8MULBZrrkz = 2255, |
| 24610 | VMOVDQU16Z128rmk_VMOVDQU16Z128rmkz_VMOVDQU8Z128rmk_VMOVDQU8Z128rmkz = 2256, |
| 24611 | VMOVDQU16Z256rmk_VMOVDQU16Z256rmkz_VMOVDQU8Z256rmk_VMOVDQU8Z256rmkz = 2257, |
| 24612 | VMOVSHZrmk_VMOVSHZrmkz = 2258, |
| 24613 | VPBLENDMBZ128rmk_VPBLENDMBZ128rmkz_VPBLENDMWZ128rmk_VPBLENDMWZ128rmkz = 2259, |
| 24614 | VPBLENDMBZ256rmk_VPBLENDMBZ256rmkz_VPBLENDMWZ256rmk_VPBLENDMWZ256rmkz = 2260, |
| 24615 | VMOVDQU16Z128rrk_VMOVDQU16Z128rrk_REV_VMOVDQU16Z128rrkz_VMOVDQU16Z128rrkz_REV_VMOVDQU8Z128rrk_VMOVDQU8Z128rrk_REV_VMOVDQU8Z128rrkz_VMOVDQU8Z128rrkz_REV_VPMOVM2BZ128rk_VPMOVM2WZ128rk = 2261, |
| 24616 | VMOVDQU16Z256rrk_VMOVDQU16Z256rrk_REV_VMOVDQU16Z256rrkz_VMOVDQU16Z256rrkz_REV_VMOVDQU8Z256rrk_VMOVDQU8Z256rrk_REV_VMOVDQU8Z256rrkz_VMOVDQU8Z256rrkz_REV_VPMOVM2BZ256rk_VPMOVM2WZ256rk = 2262, |
| 24617 | VMOVSHZrrk_VMOVSHZrrk_REV_VMOVSHZrrkz_VMOVSHZrrkz_REV = 2263, |
| 24618 | VPBLENDMBZ128rrk_VPBLENDMBZ128rrkz_VPBLENDMWZ128rrk_VPBLENDMWZ128rrkz = 2264, |
| 24619 | VPBLENDMBZ256rrk_VPBLENDMBZ256rrkz_VPBLENDMWZ256rrk_VPBLENDMWZ256rrkz = 2265, |
| 24620 | VMOVDQU8Zmrk = 2266, |
| 24621 | VMOVNTDQZ128mr = 2267, |
| 24622 | VMOVNTDQZ256mr = 2268, |
| 24623 | VMOVNTDQZmr = 2269, |
| 24624 | VMOVNTPDZ128mr = 2270, |
| 24625 | VMOVNTPDZ256mr = 2271, |
| 24626 | VMOVNTPDZmr = 2272, |
| 24627 | VMOVNTPSZ128mr = 2273, |
| 24628 | VMOVNTPSZ256mr = 2274, |
| 24629 | VMOVNTPSZmr = 2275, |
| 24630 | VP2INTERSECTDZ128rm_VP2INTERSECTDZ128rmb = 2276, |
| 24631 | VP2INTERSECTQZ256rm_VP2INTERSECTQZ256rmb = 2277, |
| 24632 | VP2INTERSECTDZ128rr = 2278, |
| 24633 | VP2INTERSECTQZ256rr = 2279, |
| 24634 | VP2INTERSECTDZ256rm_VP2INTERSECTDZ256rmb = 2280, |
| 24635 | VP2INTERSECTDZ256rr = 2281, |
| 24636 | VP2INTERSECTDZrm_VP2INTERSECTDZrmb = 2282, |
| 24637 | VP2INTERSECTDZrr = 2283, |
| 24638 | VP2INTERSECTQZ128rm_VP2INTERSECTQZ128rmb = 2284, |
| 24639 | VP2INTERSECTQZ128rr = 2285, |
| 24640 | VP2INTERSECTQZrm_VP2INTERSECTQZrmb = 2286, |
| 24641 | VP2INTERSECTQZrr = 2287, |
| 24642 | VPABSBZ128rrk_VPABSBZ128rrkz_VPABSWZ128rrk_VPABSWZ128rrkz_VPSUBSBZ128rrk_VPSUBSBZ128rrkz_VPSUBSWZ128rrk_VPSUBSWZ128rrkz_VPADDSBZ128rrk_VPADDSBZ128rrkz_VPADDSWZ128rrk_VPADDSWZ128rrkz_VPADDUSBZ128rrk_VPADDUSBZ128rrkz_VPADDUSWZ128rrk_VPADDUSWZ128rrkz_VPAVGBZ128rrk_VPAVGBZ128rrkz_VPAVGWZ128rrk_VPAVGWZ128rrkz_VPSUBUSBZ128rrk_VPSUBUSBZ128rrkz_VPSUBUSWZ128rrk_VPSUBUSWZ128rrkz = 2288, |
| 24643 | VPABSBZ256rrk_VPABSBZ256rrkz_VPABSWZ256rrk_VPABSWZ256rrkz_VPSUBSBZ256rrk_VPSUBSBZ256rrkz_VPSUBSWZ256rrk_VPSUBSWZ256rrkz_VPADDSBZ256rrk_VPADDSBZ256rrkz_VPADDSWZ256rrk_VPADDSWZ256rrkz_VPADDUSBZ256rrk_VPADDUSBZ256rrkz_VPADDUSWZ256rrk_VPADDUSWZ256rrkz_VPAVGBZ256rrk_VPAVGBZ256rrkz_VPAVGWZ256rrk_VPAVGWZ256rrkz_VPMAXSBZ256rrk_VPMAXSBZ256rrkz_VPMAXUWZ256rrk_VPMAXUWZ256rrkz_VPMINSBZ256rrk_VPMINSBZ256rrkz_VPMINUWZ256rrk_VPMINUWZ256rrkz_VPMAXSWZ256rrk_VPMAXSWZ256rrkz_VPMAXUBZ256rrk_VPMAXUBZ256rrkz_VPMINSWZ256rrk_VPMINSWZ256rrkz_VPMINUBZ256rrk_VPMINUBZ256rrkz_VPSUBUSBZ256rrk_VPSUBUSBZ256rrkz_VPSUBUSWZ256rrk_VPSUBUSWZ256rrkz = 2289, |
| 24644 | VPMAXSBZ128rrk_VPMAXSBZ128rrkz_VPMAXUWZ128rrk_VPMAXUWZ128rrkz_VPMINSBZ128rrk_VPMINSBZ128rrkz_VPMINUWZ128rrk_VPMINUWZ128rrkz_VPMAXSWZ128rrk_VPMAXSWZ128rrkz_VPMAXUBZ128rrk_VPMAXUBZ128rrkz_VPMINSWZ128rrk_VPMINSWZ128rrkz_VPMINUBZ128rrk_VPMINUBZ128rrkz = 2290, |
| 24645 | VPSHLDVWZ128rk_VPSHLDVWZ128rkz_VPSHRDVWZ128rk_VPSHRDVWZ128rkz = 2291, |
| 24646 | VPSHLDVWZ256rk_VPSHLDVWZ256rkz_VPSHRDVWZ256rk_VPSHRDVWZ256rkz = 2292, |
| 24647 | VPSLLVWZ128rrk_VPSLLVWZ128rrkz_VPSRLVWZ128rrk_VPSRLVWZ128rrkz_VPSRAVWZ128rrk_VPSRAVWZ128rrkz = 2293, |
| 24648 | VPSLLVWZ256rrk_VPSLLVWZ256rrkz_VPSRLVWZ256rrk_VPSRLVWZ256rrkz_VPSRAVWZ256rrk_VPSRAVWZ256rrkz = 2294, |
| 24649 | VPSLLWZ128rik_VPSLLWZ128rikz_VPSRLWZ128rik_VPSRLWZ128rikz_VPSRAWZ128rik_VPSRAWZ128rikz = 2295, |
| 24650 | VPSLLWZ256rik_VPSLLWZ256rikz_VPSRLWZ256rik_VPSRLWZ256rikz_VPSRAWZ256rik_VPSRAWZ256rikz = 2296, |
| 24651 | VSHUFPDZ256rmbi_VSHUFPDZ256rmik_VSHUFPSZ256rmbi_VSHUFPSZ256rmik_VSHUFPDZ256rmbik_VSHUFPDZ256rmbikz_VSHUFPSZ256rmbik_VSHUFPSZ256rmbikz_VSHUFPDZ256rmi_VSHUFPDZ256rmikz_VSHUFPSZ256rmi_VSHUFPSZ256rmikz = 2297, |
| 24652 | VPBROADCASTMB2QZ128rr_VPBROADCASTMB2QZ256rr_VPBROADCASTMW2DZ128rr_VPBROADCASTMW2DZ256rr_VPBROADCASTMB2QZrr_VPBROADCASTMW2DZrr = 2298, |
| 24653 | VPERMWZrrk_VPERMWZrrkz = 2299, |
| 24654 | VPSRAWZrrk_VPSRAWZrrkz_VPSLLWZrrk_VPSLLWZrrkz_VPSRLWZrrk_VPSRLWZrrkz = 2300, |
| 24655 | VPSHUFBITQMBZ128rr = 2301, |
| 24656 | VPSHUFBITQMBZ256rr = 2302, |
| 24657 | VPSHUFBITQMBZrr = 2303, |
| 24658 | VPCOMPRESSBZ128mr_VPCOMPRESSBZ256mr_VPCOMPRESSWZ128mr_VPCOMPRESSWZ256mr = 2304, |
| 24659 | VPCOMPRESSWZmr = 2305, |
| 24660 | VPCOMPRESSBZ128mrk_VPCOMPRESSBZ256mrk_VPCOMPRESSWZ128mrk_VPCOMPRESSWZ256mrk = 2306, |
| 24661 | VPCOMPRESSWZmrk = 2307, |
| 24662 | VPCOMPRESSBZmr = 2308, |
| 24663 | VPCOMPRESSBZmrk = 2309, |
| 24664 | VPCONFLICTDZ128rm_VPCONFLICTDZ128rmb_VPCONFLICTDZ128rmbk_VPCONFLICTDZ128rmk_VPCONFLICTDZ128rmkz = 2310, |
| 24665 | VPCONFLICTDZ256rm_VPCONFLICTDZ256rmb_VPCONFLICTDZ256rmbk_VPCONFLICTDZ256rmk_VPCONFLICTDZ256rmkz = 2311, |
| 24666 | VPCONFLICTDZrm_VPCONFLICTDZrmb_VPCONFLICTDZrmbk_VPCONFLICTDZrmk_VPCONFLICTDZrmkz = 2312, |
| 24667 | VPCONFLICTDZrr_VPCONFLICTDZrrkz = 2313, |
| 24668 | VPCONFLICTQZ128rm_VPCONFLICTQZ128rmb_VPCONFLICTQZ128rmbk_VPCONFLICTQZ128rmk_VPCONFLICTQZ128rmkz = 2314, |
| 24669 | VPERMI2BZ128rm_VPERMT2BZ128rm = 2315, |
| 24670 | VPCONFLICTQZ256rm_VPCONFLICTQZ256rmb_VPCONFLICTQZ256rmbk_VPCONFLICTQZ256rmk_VPCONFLICTQZ256rmkz = 2316, |
| 24671 | VPCONFLICTQZrm_VPCONFLICTQZrmb_VPCONFLICTQZrmbk_VPCONFLICTQZrmk_VPCONFLICTQZrmkz = 2317, |
| 24672 | VPCONFLICTQZrr_VPCONFLICTQZrrkz = 2318, |
| 24673 | VPERMI2BZ128rmk_VPERMI2BZ128rmkz_VPERMT2BZ128rmk_VPERMT2BZ128rmkz = 2319, |
| 24674 | VPERMT2WZ128rm = 2320, |
| 24675 | VPERMI2BZ128rr_VPERMT2BZ128rr = 2321, |
| 24676 | VPERMI2BZ256rr_VPERMT2BZ256rr = 2322, |
| 24677 | VPERMI2BZ256rrk_VPERMI2BZ256rrkz_VPERMT2BZ256rrk_VPERMT2BZ256rrkz = 2323, |
| 24678 | VPERMI2WZ128rr_VPERMT2WZ128rr = 2324, |
| 24679 | VPERMI2WZ256rr_VPERMT2WZ256rr = 2325, |
| 24680 | VPERMI2BZ256rm_VPERMT2BZ256rm = 2326, |
| 24681 | VPERMI2BZ256rmk_VPERMI2BZ256rmkz_VPERMT2BZ256rmk_VPERMT2BZ256rmkz = 2327, |
| 24682 | VPERMI2WZ128rm = 2328, |
| 24683 | VPERMT2WZ256rm = 2329, |
| 24684 | VPERMI2BZrm_VPERMT2BZrm = 2330, |
| 24685 | VPERMI2BZrmk_VPERMI2BZrmkz_VPERMT2BZrmk_VPERMT2BZrmkz = 2331, |
| 24686 | VPERMT2WZrm = 2332, |
| 24687 | VPERMI2BZrr_VPERMT2BZrr = 2333, |
| 24688 | VPERMI2BZrrk_VPERMI2BZrrkz_VPERMT2BZrrk_VPERMT2BZrrkz = 2334, |
| 24689 | VPERMI2WZrr_VPERMT2WZrr = 2335, |
| 24690 | VPERMI2WZ128rmk_VPERMI2WZ128rmkz = 2336, |
| 24691 | VPERMT2WZ256rmk_VPERMT2WZ256rmkz = 2337, |
| 24692 | VPERMI2WZ256rm = 2338, |
| 24693 | VPERMI2WZ256rmk_VPERMI2WZ256rmkz = 2339, |
| 24694 | VPERMI2WZrm = 2340, |
| 24695 | VPERMI2WZrmk_VPERMI2WZrmkz = 2341, |
| 24696 | VPERMWZ128rm = 2342, |
| 24697 | VPERMWZ256rmk_VPERMWZ256rmkz = 2343, |
| 24698 | VPERMWZ128rr = 2344, |
| 24699 | VPERMWZ256rr = 2345, |
| 24700 | VPERMWZ256rm = 2346, |
| 24701 | VPEXPANDBZ128rrk_VPEXPANDBZ128rrkz_VPEXPANDWZ128rrk_VPEXPANDWZ128rrkz = 2347, |
| 24702 | VPEXPANDBZ256rrk_VPEXPANDBZ256rrkz_VPEXPANDWZ256rrk_VPEXPANDWZ256rrkz = 2348, |
| 24703 | VPEXPANDBZrrk_VPEXPANDBZrrkz_VPEXPANDWZrrk_VPEXPANDWZrrkz = 2349, |
| 24704 | VPMADDUBSWZ128rrk_VPMADDUBSWZ128rrkz_VPMULHRSWZ128rrk_VPMULHRSWZ128rrkz_VPMULHUWZ128rrk_VPMULHUWZ128rrkz_VPMULHWZ128rrk_VPMULHWZ128rrkz_VPMULLWZ128rrk_VPMULLWZ128rrkz = 2350, |
| 24705 | VPMADDUBSWZ256rrk_VPMADDUBSWZ256rrkz_VPMULHRSWZ256rrk_VPMULHRSWZ256rrkz_VPMULHUWZ256rrk_VPMULHUWZ256rrkz_VPMULHWZ256rrk_VPMULHWZ256rrkz_VPMULLWZ256rrk_VPMULLWZ256rrkz = 2351, |
| 24706 | VPMADDUBSWZrmk_VPMADDUBSWZrmkz_VPMULHRSWZrmk_VPMULHRSWZrmkz_VPMULHUWZrmk_VPMULHUWZrmkz_VPMULHWZrmk_VPMULHWZrmkz_VPMULLWZrmk_VPMULLWZrmkz = 2352, |
| 24707 | VPMADDUBSWZrrk_VPMADDUBSWZrrkz_VPMULHRSWZrrk_VPMULHRSWZrrkz_VPMULHUWZrrk_VPMULHUWZrrkz_VPMULHWZrrk_VPMULHWZrrkz_VPMULLWZrrk_VPMULLWZrrkz = 2353, |
| 24708 | VPMOVDBZ128mr_VPMOVDBZ256mr_VPMOVUSDBZ128mr_VPMOVUSDBZ256mr_VPMOVDWZ128mr_VPMOVDWZ256mr_VPMOVQWZ128mr_VPMOVQWZ256mr_VPMOVSDWZ128mr_VPMOVSDWZ256mr_VPMOVSQWZ128mr_VPMOVSQWZ256mr_VPMOVUSDWZ128mr_VPMOVUSDWZ256mr_VPMOVUSQWZ128mr_VPMOVUSQWZ256mr_VPMOVQBZ256mr_VPMOVSDBZ256mr_VPMOVSWBZ256mr_VPMOVWBZ256mr_VPMOVSDBZ128mr_VPMOVWBZ128mr_VPMOVSQBZ256mr_VPMOVUSQBZ256mr_VPMOVSQDZ128mr_VPMOVSQDZ256mr_VPMOVUSQDZ128mr_VPMOVUSQDZ256mr_VPMOVSWBZ128mr_VPMOVUSWBZ128mr = 2354, |
| 24709 | VPMOVUSWBZ256mr = 2355, |
| 24710 | VPMOVDBZ128mrk_VPMOVQBZ128mrk_VPMOVSQBZ128mrk_VPMOVSWBZ128mrk_VPMOVWBZ128mrk_VPMOVDWZ128mrk_VPMOVQWZ128mrk_VPMOVSDWZ128mrk_VPMOVSQWZ128mrk_VPMOVUSDWZ128mrk_VPMOVUSQWZ128mrk_VPMOVSDBZ128mrk_VPMOVSQDZ128mrk_VPMOVUSDBZ128mrk_VPMOVUSQDZ128mrk_VPMOVUSQBZ128mrk_VPMOVUSWBZ128mrk = 2356, |
| 24711 | VPMOVDBZ128rr_VPMOVQBZ128rr_VPMOVSQBZ128rr_VPMOVSWBZ128rr_VPMOVWBZ128rr_VPMOVDWZ128rr_VPMOVQWZ128rr_VPMOVSDWZ128rr_VPMOVSQWZ128rr_VPMOVUSDWZ128rr_VPMOVSDBZ128rr_VPMOVSQDZ128rr_VPMOVUSDBZ128rr_VPMOVUSQDZ128rr_VPMOVSQDZ128rrk_VPMOVSQDZ128rrkz_VPMOVUSQDZ128rrk_VPMOVUSQDZ128rrkz_VPMOVUSQBZ128rr_VPMOVUSWBZ128rr = 2357, |
| 24712 | VPMOVUSQWZ128rr = 2358, |
| 24713 | VPMOVDBZ128rrk_VPMOVDBZ128rrkz_VPMOVQBZ128rrk_VPMOVQBZ128rrkz_VPMOVSQBZ128rrk_VPMOVSQBZ128rrkz_VPMOVSWBZ128rrk_VPMOVSWBZ128rrkz_VPMOVWBZ128rrk_VPMOVWBZ128rrkz_VPMOVDBZ256rr_VPMOVQBZ256rr_VPMOVSQBZ256rr_VPMOVSWBZ256rr_VPMOVWBZ256rr_VPMOVDWZ128rrk_VPMOVDWZ128rrkz_VPMOVQWZ128rrk_VPMOVQWZ128rrkz_VPMOVSDWZ128rrk_VPMOVSDWZ128rrkz_VPMOVSQWZ128rrk_VPMOVSQWZ128rrkz_VPMOVUSDWZ128rrk_VPMOVUSDWZ128rrkz_VPMOVDWZ256rr_VPMOVQWZ256rr_VPMOVSDWZ256rr_VPMOVSQWZ256rr_VPMOVUSDWZ256rr_VPMOVSDBZ128rrk_VPMOVSDBZ128rrkz_VPMOVUSDBZ128rrk_VPMOVUSDBZ128rrkz_VPMOVSDBZ256rr_VPMOVSQDZ256rr_VPMOVUSDBZ256rr_VPMOVUSQDZ256rr_VPMOVSQDZ256rrk_VPMOVSQDZ256rrkz_VPMOVUSQDZ256rrk_VPMOVUSQDZ256rrkz_VPMOVUSQBZ128rrk_VPMOVUSQBZ128rrkz_VPMOVUSWBZ128rrk_VPMOVUSWBZ128rrkz_VPMOVUSQBZ256rr_VPMOVUSWBZ256rr = 2359, |
| 24714 | VPMOVUSQWZ128rrk_VPMOVUSQWZ128rrkz_VPMOVUSQWZ256rr = 2360, |
| 24715 | VPMOVDBZ256mrk_VPMOVQBZ256mrk_VPMOVSQBZ256mrk_VPMOVSWBZ256mrk_VPMOVWBZ256mrk_VPMOVDWZ256mrk_VPMOVQWZ256mrk_VPMOVSDWZ256mrk_VPMOVSQWZ256mrk_VPMOVUSDWZ256mrk_VPMOVUSQWZ256mrk_VPMOVSDBZ256mrk_VPMOVSQDZ256mrk_VPMOVUSDBZ256mrk_VPMOVUSQDZ256mrk_VPMOVUSQBZ256mrk_VPMOVUSWBZ256mrk = 2361, |
| 24716 | VPMOVUSQWZ256rrk_VPMOVUSQWZ256rrkz = 2362, |
| 24717 | VPMULLQZ128rm_VPMULLQZ128rmb_VPMULLQZ128rmbk_VPMULLQZ128rmk_VPMULLQZ128rmkz = 2363, |
| 24718 | VPMULLQZ256rm_VPMULLQZ256rmb_VPMULLQZ256rmbk_VPMULLQZ256rmk_VPMULLQZ256rmkz = 2364, |
| 24719 | VPMULLQZrm_VPMULLQZrmb_VPMULLQZrmbk_VPMULLQZrmk_VPMULLQZrmkz = 2365, |
| 24720 | VPSCATTERQDZ256mr_VSCATTERQPSZ256mr = 2366, |
| 24721 | VPSCATTERDQZmr_VPSCATTERQQZmr_VSCATTERDPDZmr_VSCATTERQPDZmr = 2367, |
| 24722 | VPSHLDDZ128rmbi_VPSHLDQZ128rmbi_VPSHRDDZ128rmbi_VPSHRDQZ128rmbi_VPSHLDDZ128rmi_VPSHLDQZ128rmi_VPSHLDWZ128rmi_VPSHRDDZ128rmi_VPSHRDQZ128rmi_VPSHRDWZ128rmi_VPSHLDVDZ128m_VPSHLDVQZ128m_VPSHLDVWZ128m_VPSHRDVDZ128m_VPSHRDVQZ128m_VPSHRDVWZ128m_VPSHLDVDZ128mb_VPSHLDVDZ128mk_VPSHLDVDZ128mkz_VPSHLDVQZ128mb_VPSHLDVQZ128mk_VPSHLDVQZ128mkz_VPSHRDVDZ128mb_VPSHRDVDZ128mk_VPSHRDVDZ128mkz_VPSHRDVQZ128mb_VPSHRDVQZ128mk_VPSHRDVQZ128mkz_VPSHLDVDZ128mbk_VPSHLDVDZ128mbkz_VPSHLDVQZ128mbk_VPSHLDVQZ128mbkz_VPSHRDVDZ128mbk_VPSHRDVDZ128mbkz_VPSHRDVQZ128mbk_VPSHRDVQZ128mbkz = 2368, |
| 24723 | VPSHLDDZ128rmbik_VPSHLDDZ128rmbikz_VPSHLDDZ128rmik_VPSHLDDZ128rmikz_VPSHLDQZ128rmbik_VPSHLDQZ128rmbikz_VPSHLDQZ128rmik_VPSHLDQZ128rmikz_VPSHRDDZ128rmbik_VPSHRDDZ128rmbikz_VPSHRDDZ128rmik_VPSHRDDZ128rmikz_VPSHRDQZ128rmbik_VPSHRDQZ128rmbikz_VPSHRDQZ128rmik_VPSHRDQZ128rmikz = 2369, |
| 24724 | VPSHLDDZ128rri_VPSHLDQZ128rri_VPSHLDWZ128rri_VPSHRDDZ128rri_VPSHRDQZ128rri_VPSHRDWZ128rri_VPSHLDVDZ128rk_VPSHLDVDZ128rkz_VPSHLDVQZ128rk_VPSHLDVQZ128rkz_VPSHRDVDZ128rk_VPSHRDVDZ128rkz_VPSHRDVQZ128rk_VPSHRDVQZ128rkz = 2370, |
| 24725 | VPSHLDDZ256rri_VPSHLDQZ256rri_VPSHLDWZ256rri_VPSHRDDZ256rri_VPSHRDQZ256rri_VPSHRDWZ256rri_VPSHLDVDZ256rk_VPSHLDVDZ256rkz_VPSHLDVQZ256rk_VPSHLDVQZ256rkz_VPSHRDVDZ256rk_VPSHRDVDZ256rkz_VPSHRDVQZ256rk_VPSHRDVQZ256rkz = 2371, |
| 24726 | VPSHLDVDZ128r_VPSHLDVQZ128r_VPSHLDVWZ128r_VPSHRDVDZ128r_VPSHRDVQZ128r_VPSHRDVWZ128r = 2372, |
| 24727 | VPSHLDVDZ256r_VPSHLDVQZ256r_VPSHLDVWZ256r_VPSHRDVDZ256r_VPSHRDVQZ256r_VPSHRDVWZ256r = 2373, |
| 24728 | VPSHLDDZ128rrik_VPSHLDDZ128rrikz_VPSHLDQZ128rrik_VPSHLDQZ128rrikz_VPSHRDDZ128rrik_VPSHRDDZ128rrikz_VPSHRDQZ128rrik_VPSHRDQZ128rrikz = 2374, |
| 24729 | VPSHLDDZ256rrik_VPSHLDDZ256rrikz_VPSHLDQZ256rrik_VPSHLDQZ256rrikz_VPSHRDDZ256rrik_VPSHRDDZ256rrikz_VPSHRDQZ256rrik_VPSHRDQZ256rrikz = 2375, |
| 24730 | VPSHLDDZ256rmbi_VPSHLDQZ256rmbi_VPSHRDDZ256rmbi_VPSHRDQZ256rmbi_VPSHLDDZ256rmi_VPSHLDQZ256rmi_VPSHLDWZ256rmi_VPSHRDDZ256rmi_VPSHRDQZ256rmi_VPSHRDWZ256rmi_VPSHLDVDZ256m_VPSHLDVQZ256m_VPSHLDVWZ256m_VPSHRDVDZ256m_VPSHRDVQZ256m_VPSHRDVWZ256m_VPSHLDVDZ256mb_VPSHLDVDZ256mk_VPSHLDVDZ256mkz_VPSHLDVQZ256mb_VPSHLDVQZ256mk_VPSHLDVQZ256mkz_VPSHRDVDZ256mb_VPSHRDVDZ256mk_VPSHRDVDZ256mkz_VPSHRDVQZ256mb_VPSHRDVQZ256mk_VPSHRDVQZ256mkz_VPSHLDVDZ256mbk_VPSHLDVDZ256mbkz_VPSHLDVQZ256mbk_VPSHLDVQZ256mbkz_VPSHRDVDZ256mbk_VPSHRDVDZ256mbkz_VPSHRDVQZ256mbk_VPSHRDVQZ256mbkz = 2376, |
| 24731 | VPSHLDDZ256rmbik_VPSHLDDZ256rmbikz_VPSHLDDZ256rmik_VPSHLDDZ256rmikz_VPSHLDQZ256rmbik_VPSHLDQZ256rmbikz_VPSHLDQZ256rmik_VPSHLDQZ256rmikz_VPSHRDDZ256rmbik_VPSHRDDZ256rmbikz_VPSHRDDZ256rmik_VPSHRDDZ256rmikz_VPSHRDQZ256rmbik_VPSHRDQZ256rmbikz_VPSHRDQZ256rmik_VPSHRDQZ256rmikz = 2377, |
| 24732 | VPSHLDDZrmbi_VPSHLDQZrmbi_VPSHRDDZrmbi_VPSHRDQZrmbi_VPSHLDDZrmi_VPSHLDQZrmi_VPSHLDWZrmi_VPSHRDDZrmi_VPSHRDQZrmi_VPSHRDWZrmi_VPSHLDVDZm_VPSHLDVQZm_VPSHLDVWZm_VPSHRDVDZm_VPSHRDVQZm_VPSHRDVWZm_VPSHLDVDZmb_VPSHLDVDZmk_VPSHLDVDZmkz_VPSHLDVQZmb_VPSHLDVQZmk_VPSHLDVQZmkz_VPSHRDVDZmb_VPSHRDVDZmk_VPSHRDVDZmkz_VPSHRDVQZmb_VPSHRDVQZmk_VPSHRDVQZmkz_VPSHLDVDZmbk_VPSHLDVDZmbkz_VPSHLDVQZmbk_VPSHLDVQZmbkz_VPSHRDVDZmbk_VPSHRDVDZmbkz_VPSHRDVQZmbk_VPSHRDVQZmbkz = 2378, |
| 24733 | VPSHLDDZrmbik_VPSHLDDZrmbikz_VPSHLDDZrmik_VPSHLDDZrmikz_VPSHLDQZrmbik_VPSHLDQZrmbikz_VPSHLDQZrmik_VPSHLDQZrmikz_VPSHRDDZrmbik_VPSHRDDZrmbikz_VPSHRDDZrmik_VPSHRDDZrmikz_VPSHRDQZrmbik_VPSHRDQZrmbikz_VPSHRDQZrmik_VPSHRDQZrmikz = 2379, |
| 24734 | VPSHLDDZrrik_VPSHLDDZrrikz_VPSHLDQZrrik_VPSHLDQZrrikz_VPSHRDDZrrik_VPSHRDDZrrikz_VPSHRDQZrrik_VPSHRDQZrrikz = 2380, |
| 24735 | VPSHLDWZ128rmik_VPSHLDWZ128rmikz_VPSHRDWZ128rmik_VPSHRDWZ128rmikz = 2381, |
| 24736 | VPSHLDWZ256rmik_VPSHLDWZ256rmikz_VPSHRDWZ256rmik_VPSHRDWZ256rmikz = 2382, |
| 24737 | VPSHLDWZrmik_VPSHLDWZrmikz_VPSHRDWZrmik_VPSHRDWZrmikz = 2383, |
| 24738 | VPSHUFBITQMBZ128rm = 2384, |
| 24739 | VPSHUFBITQMBZ256rm = 2385, |
| 24740 | VPSHUFBITQMBZrm = 2386, |
| 24741 | VPSHUFBITQMBZ128rmk = 2387, |
| 24742 | VPSHUFBITQMBZ256rmk = 2388, |
| 24743 | VPSHUFBITQMBZrmk = 2389, |
| 24744 | VPSLLWZ128rrk_VPSLLWZ128rrkz_VPSRLWZ128rrk_VPSRLWZ128rrkz_VPSRAWZ128rrk_VPSRAWZ128rrkz = 2390, |
| 24745 | VRCPPHZmbk_VRCPPHZmkz_VRCPPHZmbkz_VRCPPHZmk = 2391, |
| 24746 | VRSQRTPHZmbk_VRSQRTPHZmkz_VRSQRTPHZmbkz_VRSQRTPHZmk = 2392, |
| 24747 | VRCPPHZrk_VRCPPHZrkz = 2393, |
| 24748 | VREDUCEPHZ128rmbi_VREDUCEPHZ128rmi = 2394, |
| 24749 | VREDUCESHZrmi = 2395, |
| 24750 | VREDUCEPHZ256rmbi_VREDUCEPHZ256rmi = 2396, |
| 24751 | VREDUCEPHZ128rmbik_VREDUCEPHZ128rmbikz_VREDUCEPHZ128rmik_VREDUCEPHZ128rmikz_VREDUCESHZrmik_VREDUCESHZrmikz = 2397, |
| 24752 | VREDUCEPHZ256rmbik_VREDUCEPHZ256rmbikz_VREDUCEPHZ256rmik_VREDUCEPHZ256rmikz = 2398, |
| 24753 | VREDUCEPHZ128rri_VREDUCESHZrri_VREDUCESHZrrib = 2399, |
| 24754 | VREDUCEPHZ256rri = 2400, |
| 24755 | VREDUCEPHZ128rrik_VREDUCEPHZ128rrikz_VREDUCESHZrribk_VREDUCESHZrrikz_VREDUCESHZrribkz_VREDUCESHZrrik = 2401, |
| 24756 | VREDUCEPHZ256rrik_VREDUCEPHZ256rrikz = 2402, |
| 24757 | VREDUCEPHZrmbi_VREDUCEPHZrmi = 2403, |
| 24758 | VREDUCEPHZrmbik_VREDUCEPHZrmbikz_VREDUCEPHZrmik_VREDUCEPHZrmikz = 2404, |
| 24759 | VREDUCEPHZrri_VREDUCEPHZrrib = 2405, |
| 24760 | VREDUCEPHZrribk_VREDUCEPHZrrikz_VREDUCEPHZrribkz_VREDUCEPHZrrik = 2406, |
| 24761 | VRNDSCALEPDZrri_VRNDSCALEPDZrrib_VRNDSCALEPDZrribk_VRNDSCALEPDZrrik_VRNDSCALEPDZrrikz_VRNDSCALEPSZrri_VRNDSCALEPSZrrib_VRNDSCALEPSZrribk_VRNDSCALEPSZrrik_VRNDSCALEPSZrrikz_VRNDSCALEPDZrribkz_VRNDSCALEPSZrribkz = 2407, |
| 24762 | VRNDSCALEPHZ128rmbik_VRNDSCALEPHZ128rmbikz_VRNDSCALEPHZ128rmik_VRNDSCALEPHZ128rmikz_VRNDSCALESHZrmik_Int_VRNDSCALESHZrmikz_Int = 2408, |
| 24763 | VSCALEFPHZ128rmbk_VSCALEFPHZ128rmkz_VSCALEFPHZ128rmbkz_VSCALEFPHZ128rmk = 2409, |
| 24764 | VRNDSCALEPHZ256rmbik_VRNDSCALEPHZ256rmbikz_VRNDSCALEPHZ256rmik_VRNDSCALEPHZ256rmikz = 2410, |
| 24765 | VSCALEFPHZ256rmbk_VSCALEFPHZ256rmkz_VSCALEFPHZ256rmbkz_VSCALEFPHZ256rmk = 2411, |
| 24766 | VSCALEFSHZrmk_VSCALEFSHZrmkz = 2412, |
| 24767 | VRNDSCALEPHZ128rrik_VRNDSCALEPHZ128rrikz_VRNDSCALESHZrribk_Int_VRNDSCALESHZrribkz_Int_VRNDSCALESHZrrik_Int_VRNDSCALESHZrrikz_Int = 2413, |
| 24768 | VRNDSCALEPHZ256rrik_VRNDSCALEPHZ256rrikz = 2414, |
| 24769 | VSCALEFPHZ128rrk_VSCALEFPHZ128rrkz = 2415, |
| 24770 | VSCALEFPHZ256rrk_VSCALEFPHZ256rrkz = 2416, |
| 24771 | VSCALEFSHZrrbk_Int_VSCALEFSHZrrbkz_Int_VSCALEFSHZrrk_VSCALEFSHZrrkz = 2417, |
| 24772 | VRNDSCALEPHZrmbik_VRNDSCALEPHZrmbikz_VRNDSCALEPHZrmik_VRNDSCALEPHZrmikz = 2418, |
| 24773 | VSCALEFPHZrmbk_VSCALEFPHZrmkz_VSCALEFPHZrmbkz_VSCALEFPHZrmk = 2419, |
| 24774 | VRNDSCALEPHZrribk_VRNDSCALEPHZrrikz_VRNDSCALEPHZrribkz_VRNDSCALEPHZrrik = 2420, |
| 24775 | VSCALEFPHZrrbk_VSCALEFPHZrrkz_VSCALEFPHZrrbkz_VSCALEFPHZrrk = 2421, |
| 24776 | VRSQRT14PDZr_VRSQRT14PSZr = 2422, |
| 24777 | VRSQRT14PSZrk = 2423, |
| 24778 | VRSQRTPHZr = 2424, |
| 24779 | VSQRTPDYm = 2425, |
| 24780 | VSQRTPDZ256m_VSQRTPDZ256mb = 2426, |
| 24781 | VSQRTPDZ128mbk_VSQRTPDZ128mkz_VSQRTPDZ128mbkz_VSQRTPDZ128mk = 2427, |
| 24782 | VSQRTSDZmk_Int_VSQRTSDZmkz_Int = 2428, |
| 24783 | VSQRTPDZm = 2429, |
| 24784 | VSQRTPDZmb = 2430, |
| 24785 | VSQRTPDZr = 2431, |
| 24786 | VSQRTPHZ128mbk_VSQRTPHZ128mkz_VSQRTPHZ128mbkz_VSQRTPHZ128mk = 2432, |
| 24787 | VSQRTPHZ128rk = 2433, |
| 24788 | VSQRTPHZ256rk = 2434, |
| 24789 | VSQRTPHZ256rkz = 2435, |
| 24790 | VSQRTPHZ128rkz = 2436, |
| 24791 | VSQRTPHZ256m_VSQRTPHZ256mb = 2437, |
| 24792 | VSQRTPHZ256mbk_VSQRTPHZ256mkz_VSQRTPHZ256mbkz_VSQRTPHZ256mk = 2438, |
| 24793 | VSQRTPHZm_VSQRTPHZmb = 2439, |
| 24794 | VSQRTPHZmbk_VSQRTPHZmkz_VSQRTPHZmbkz_VSQRTPHZmk = 2440, |
| 24795 | VSQRTPHZr_VSQRTPHZrb = 2441, |
| 24796 | VSQRTPHZrbk_VSQRTPHZrkz_VSQRTPHZrbkz_VSQRTPHZrk = 2442, |
| 24797 | VSQRTPSZr = 2443, |
| 24798 | XTEST = 2444, |
| 24799 | SCHED_LIST_END = 2445 |
| 24800 | }; |
| 24801 | } // end namespace llvm::X86::Sched |
| 24802 | #endif // GET_INSTRINFO_SCHED_ENUM |
| 24803 | |
| 24804 | #if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
| 24805 | namespace llvm { |
| 24806 | |
| 24807 | struct X86InstrTable { |
| 24808 | MCInstrDesc Insts[22330]; |
| 24809 | static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo"); |
| 24810 | MCOperandInfo OperandInfo[5874]; |
| 24811 | static_assert(alignof(MCOperandInfo) >= alignof(MCPhysReg), "Unwanted padding between OperandInfo and ImplicitOps"); |
| 24812 | MCPhysReg ImplicitOps[734]; |
| 24813 | }; |
| 24814 | |
| 24815 | } // end namespace llvm |
| 24816 | #endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
| 24817 | |
| 24818 | #ifdef GET_INSTRINFO_MC_DESC |
| 24819 | #undef GET_INSTRINFO_MC_DESC |
| 24820 | namespace llvm { |
| 24821 | |
| 24822 | static_assert(sizeof(MCOperandInfo) % sizeof(MCPhysReg) == 0); |
| 24823 | static constexpr unsigned X86ImpOpBase = sizeof X86InstrTable::OperandInfo / (sizeof(MCPhysReg)); |
| 24824 | |
| 24825 | extern const X86InstrTable X86Descs = { |
| 24826 | { |
| 24827 | { 22329, 0, 0, 0, 2444, 0, 1, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002056ULL }, // Inst #22329 = XTEST |
| 24828 | { 22328, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80003868ULL }, // Inst #22328 = XSUSLDTRK |
| 24829 | { 22327, 0, 0, 0, 8, 2, 2, 1, X86ImpOpBase + 730, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380002040ULL }, // Inst #22327 = XSTORE |
| 24830 | { 22326, 0, 0, 0, 8, 3, 3, 1, X86ImpOpBase + 724, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5304002050ULL }, // Inst #22326 = XSHA256 |
| 24831 | { 22325, 0, 0, 0, 8, 3, 3, 1, X86ImpOpBase + 724, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5304002048ULL }, // Inst #22325 = XSHA1 |
| 24832 | { 22324, 0, 0, 0, 874, 3, 0, 1, X86ImpOpBase + 721, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80002051ULL }, // Inst #22324 = XSETBV |
| 24833 | { 22323, 5, 0, 0, 1223, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380022025ULL }, // Inst #22323 = XSAVES64 |
| 24834 | { 22322, 5, 0, 0, 1657, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002025ULL }, // Inst #22322 = XSAVES |
| 24835 | { 22321, 5, 0, 0, 888, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700022026ULL }, // Inst #22321 = XSAVEOPT64 |
| 24836 | { 22320, 5, 0, 0, 1656, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002026ULL }, // Inst #22320 = XSAVEOPT |
| 24837 | { 22319, 5, 0, 0, 1655, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380022024ULL }, // Inst #22319 = XSAVEC64 |
| 24838 | { 22318, 5, 0, 0, 1654, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002024ULL }, // Inst #22318 = XSAVEC |
| 24839 | { 22317, 5, 0, 0, 886, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700022024ULL }, // Inst #22317 = XSAVE64 |
| 24840 | { 22316, 5, 0, 0, 887, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002024ULL }, // Inst #22316 = XSAVE |
| 24841 | { 22315, 5, 0, 0, 881, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380022023ULL }, // Inst #22315 = XRSTORS64 |
| 24842 | { 22314, 5, 0, 0, 1653, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002023ULL }, // Inst #22314 = XRSTORS |
| 24843 | { 22313, 5, 0, 0, 1653, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700022025ULL }, // Inst #22313 = XRSTOR64 |
| 24844 | { 22312, 5, 0, 0, 1653, 2, 0, 232, X86ImpOpBase + 719, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002025ULL }, // Inst #22312 = XRSTOR |
| 24845 | { 22311, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80003869ULL }, // Inst #22311 = XRESLDTRK |
| 24846 | { 22310, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x798000000aULL }, // Inst #22310 = XRELEASE_PREFIX |
| 24847 | { 22309, 3, 1, 0, 808, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x2b88002029ULL }, // Inst #22309 = XORPSrr |
| 24848 | { 22308, 7, 1, 0, 43, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2b88002019ULL }, // Inst #22308 = XORPSrm |
| 24849 | { 22307, 3, 1, 0, 808, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x2b90002829ULL }, // Inst #22307 = XORPDrr |
| 24850 | { 22306, 7, 1, 0, 43, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2b90002819ULL }, // Inst #22306 = XORPDrm |
| 24851 | { 22305, 3, 1, 0, 1462, 0, 1, 173, X86ImpOpBase + 0, 0, 0x1900000029ULL }, // Inst #22305 = XOR8rr_REV |
| 24852 | { 22304, 3, 1, 0, 1466, 0, 1, 5871, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1800000028ULL }, // Inst #22304 = XOR8rr_NOREX |
| 24853 | { 22303, 3, 1, 0, 1, 0, 0, 173, X86ImpOpBase + 0, 0, 0x10001960010029ULL }, // Inst #22303 = XOR8rr_NF_REV |
| 24854 | { 22302, 3, 1, 0, 1, 0, 0, 484, X86ImpOpBase + 0, 0, 0x10109960010029ULL }, // Inst #22302 = XOR8rr_NF_ND_REV |
| 24855 | { 22301, 3, 1, 0, 1, 0, 0, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10109860010028ULL }, // Inst #22301 = XOR8rr_NF_ND |
| 24856 | { 22300, 3, 1, 0, 1, 0, 0, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10001860010028ULL }, // Inst #22300 = XOR8rr_NF |
| 24857 | { 22299, 3, 1, 0, 1, 0, 1, 484, X86ImpOpBase + 0, 0, 0x109960010029ULL }, // Inst #22299 = XOR8rr_ND_REV |
| 24858 | { 22298, 3, 1, 0, 1, 0, 1, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x109860010028ULL }, // Inst #22298 = XOR8rr_ND |
| 24859 | { 22297, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0, 0xc001960010029ULL }, // Inst #22297 = XOR8rr_EVEX_REV |
| 24860 | { 22296, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc001860010028ULL }, // Inst #22296 = XOR8rr_EVEX |
| 24861 | { 22295, 3, 1, 0, 1462, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1800000028ULL }, // Inst #22295 = XOR8rr |
| 24862 | { 22294, 7, 1, 0, 25, 0, 0, 477, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10109960010019ULL }, // Inst #22294 = XOR8rm_NF_ND |
| 24863 | { 22293, 7, 1, 0, 25, 0, 0, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10001960010019ULL }, // Inst #22293 = XOR8rm_NF |
| 24864 | { 22292, 7, 1, 0, 25, 0, 1, 477, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x109960010019ULL }, // Inst #22292 = XOR8rm_ND |
| 24865 | { 22291, 7, 1, 0, 25, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc001960010019ULL }, // Inst #22291 = XOR8rm_EVEX |
| 24866 | { 22290, 7, 1, 0, 1450, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1900000019ULL }, // Inst #22290 = XOR8rm |
| 24867 | { 22289, 3, 1, 0, 1, 0, 0, 467, X86ImpOpBase + 0, 0, 0x1010c060050036ULL }, // Inst #22289 = XOR8ri_NF_ND |
| 24868 | { 22288, 3, 1, 0, 1, 0, 0, 170, X86ImpOpBase + 0, 0, 0x10004060050036ULL }, // Inst #22288 = XOR8ri_NF |
| 24869 | { 22287, 3, 1, 0, 1, 0, 1, 467, X86ImpOpBase + 0, 0, 0x10c060050036ULL }, // Inst #22287 = XOR8ri_ND |
| 24870 | { 22286, 3, 1, 0, 1, 0, 1, 170, X86ImpOpBase + 0, 0, 0xc004060050036ULL }, // Inst #22286 = XOR8ri_EVEX |
| 24871 | { 22285, 3, 1, 0, 1462, 0, 1, 170, X86ImpOpBase + 0, 0, 0x4100040036ULL }, // Inst #22285 = XOR8ri8 |
| 24872 | { 22284, 3, 1, 0, 1462, 0, 1, 170, X86ImpOpBase + 0, 0, 0x4000040036ULL }, // Inst #22284 = XOR8ri |
| 24873 | { 22283, 7, 1, 0, 932, 0, 0, 460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10109860010018ULL }, // Inst #22283 = XOR8mr_NF_ND |
| 24874 | { 22282, 6, 0, 0, 934, 0, 0, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001860010018ULL }, // Inst #22282 = XOR8mr_NF |
| 24875 | { 22281, 7, 1, 0, 932, 0, 1, 460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x109860010018ULL }, // Inst #22281 = XOR8mr_ND |
| 24876 | { 22280, 6, 0, 0, 933, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001860010018ULL }, // Inst #22280 = XOR8mr_EVEX |
| 24877 | { 22279, 6, 0, 0, 1459, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1800000018ULL }, // Inst #22279 = XOR8mr |
| 24878 | { 22278, 7, 1, 0, 932, 0, 0, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c060050026ULL }, // Inst #22278 = XOR8mi_NF_ND |
| 24879 | { 22277, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10004060050026ULL }, // Inst #22277 = XOR8mi_NF |
| 24880 | { 22276, 7, 1, 0, 932, 0, 1, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c060050026ULL }, // Inst #22276 = XOR8mi_ND |
| 24881 | { 22275, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050026ULL }, // Inst #22275 = XOR8mi_EVEX |
| 24882 | { 22274, 6, 0, 0, 1456, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040026ULL }, // Inst #22274 = XOR8mi8 |
| 24883 | { 22273, 6, 0, 0, 1456, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040026ULL }, // Inst #22273 = XOR8mi |
| 24884 | { 22272, 1, 0, 0, 1463, 1, 2, 1, X86ImpOpBase + 75, 0, 0x1a00040001ULL }, // Inst #22272 = XOR8i8 |
| 24885 | { 22271, 3, 1, 0, 1465, 0, 1, 167, X86ImpOpBase + 0, 0, 0x1980020029ULL }, // Inst #22271 = XOR64rr_REV |
| 24886 | { 22270, 3, 1, 0, 1, 0, 0, 167, X86ImpOpBase + 0, 0, 0x100019e0030029ULL }, // Inst #22270 = XOR64rr_NF_REV |
| 24887 | { 22269, 3, 1, 0, 1, 0, 0, 444, X86ImpOpBase + 0, 0, 0x101099e0030029ULL }, // Inst #22269 = XOR64rr_NF_ND_REV |
| 24888 | { 22268, 3, 1, 0, 1, 0, 0, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x101098e0030028ULL }, // Inst #22268 = XOR64rr_NF_ND |
| 24889 | { 22267, 3, 1, 0, 1, 0, 0, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100018e0030028ULL }, // Inst #22267 = XOR64rr_NF |
| 24890 | { 22266, 3, 1, 0, 1, 0, 1, 444, X86ImpOpBase + 0, 0, 0x1099e0030029ULL }, // Inst #22266 = XOR64rr_ND_REV |
| 24891 | { 22265, 3, 1, 0, 1, 0, 1, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1098e0030028ULL }, // Inst #22265 = XOR64rr_ND |
| 24892 | { 22264, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0, 0xc0019e0030029ULL }, // Inst #22264 = XOR64rr_EVEX_REV |
| 24893 | { 22263, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0018e0030028ULL }, // Inst #22263 = XOR64rr_EVEX |
| 24894 | { 22262, 3, 1, 0, 1464, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1880020028ULL }, // Inst #22262 = XOR64rr |
| 24895 | { 22261, 7, 1, 0, 25, 0, 0, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101099e0030019ULL }, // Inst #22261 = XOR64rm_NF_ND |
| 24896 | { 22260, 7, 1, 0, 25, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100019e0030019ULL }, // Inst #22260 = XOR64rm_NF |
| 24897 | { 22259, 7, 1, 0, 25, 0, 1, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1099e0030019ULL }, // Inst #22259 = XOR64rm_ND |
| 24898 | { 22258, 7, 1, 0, 25, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0019e0030019ULL }, // Inst #22258 = XOR64rm_EVEX |
| 24899 | { 22257, 7, 1, 0, 1469, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1980020019ULL }, // Inst #22257 = XOR64rm |
| 24900 | { 22256, 3, 1, 0, 1, 0, 0, 427, X86ImpOpBase + 0, 0, 0x1010c1e0070036ULL }, // Inst #22256 = XOR64ri8_NF_ND |
| 24901 | { 22255, 3, 1, 0, 1, 0, 0, 164, X86ImpOpBase + 0, 0, 0x100041e0070036ULL }, // Inst #22255 = XOR64ri8_NF |
| 24902 | { 22254, 3, 1, 0, 1, 0, 1, 427, X86ImpOpBase + 0, 0, 0x10c1e0070036ULL }, // Inst #22254 = XOR64ri8_ND |
| 24903 | { 22253, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0, 0xc0041e0070036ULL }, // Inst #22253 = XOR64ri8_EVEX |
| 24904 | { 22252, 3, 1, 0, 1462, 0, 1, 164, X86ImpOpBase + 0, 0, 0x4180060036ULL }, // Inst #22252 = XOR64ri8 |
| 24905 | { 22251, 3, 1, 0, 1, 0, 0, 427, X86ImpOpBase + 0, 0, 0x1010c0e0230036ULL }, // Inst #22251 = XOR64ri32_NF_ND |
| 24906 | { 22250, 3, 1, 0, 1, 0, 0, 164, X86ImpOpBase + 0, 0, 0x100040e0230036ULL }, // Inst #22250 = XOR64ri32_NF |
| 24907 | { 22249, 3, 1, 0, 1, 0, 1, 427, X86ImpOpBase + 0, 0, 0x10c0e0230036ULL }, // Inst #22249 = XOR64ri32_ND |
| 24908 | { 22248, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0, 0xc0040e0230036ULL }, // Inst #22248 = XOR64ri32_EVEX |
| 24909 | { 22247, 3, 1, 0, 1462, 0, 1, 164, X86ImpOpBase + 0, 0, 0x4080220036ULL }, // Inst #22247 = XOR64ri32 |
| 24910 | { 22246, 7, 1, 0, 932, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101098e0030018ULL }, // Inst #22246 = XOR64mr_NF_ND |
| 24911 | { 22245, 6, 0, 0, 934, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100018e0030018ULL }, // Inst #22245 = XOR64mr_NF |
| 24912 | { 22244, 7, 1, 0, 932, 0, 1, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1098e0030018ULL }, // Inst #22244 = XOR64mr_ND |
| 24913 | { 22243, 6, 0, 0, 933, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0018e0030018ULL }, // Inst #22243 = XOR64mr_EVEX |
| 24914 | { 22242, 6, 0, 0, 933, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880020018ULL }, // Inst #22242 = XOR64mr |
| 24915 | { 22241, 7, 1, 0, 932, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0070026ULL }, // Inst #22241 = XOR64mi8_NF_ND |
| 24916 | { 22240, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0070026ULL }, // Inst #22240 = XOR64mi8_NF |
| 24917 | { 22239, 7, 1, 0, 932, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070026ULL }, // Inst #22239 = XOR64mi8_ND |
| 24918 | { 22238, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070026ULL }, // Inst #22238 = XOR64mi8_EVEX |
| 24919 | { 22237, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060026ULL }, // Inst #22237 = XOR64mi8 |
| 24920 | { 22236, 7, 1, 0, 932, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0230026ULL }, // Inst #22236 = XOR64mi32_NF_ND |
| 24921 | { 22235, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0230026ULL }, // Inst #22235 = XOR64mi32_NF |
| 24922 | { 22234, 7, 1, 0, 932, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230026ULL }, // Inst #22234 = XOR64mi32_ND |
| 24923 | { 22233, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230026ULL }, // Inst #22233 = XOR64mi32_EVEX |
| 24924 | { 22232, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220026ULL }, // Inst #22232 = XOR64mi32 |
| 24925 | { 22231, 1, 0, 0, 1463, 1, 2, 1, X86ImpOpBase + 72, 0, 0x1a80220001ULL }, // Inst #22231 = XOR64i32 |
| 24926 | { 22230, 3, 1, 0, 1465, 0, 1, 161, X86ImpOpBase + 0, 0, 0x1980000129ULL }, // Inst #22230 = XOR32rr_REV |
| 24927 | { 22229, 3, 1, 0, 1, 0, 0, 161, X86ImpOpBase + 0, 0, 0x100019e0010029ULL }, // Inst #22229 = XOR32rr_NF_REV |
| 24928 | { 22228, 3, 1, 0, 1, 0, 0, 226, X86ImpOpBase + 0, 0, 0x101099e0010029ULL }, // Inst #22228 = XOR32rr_NF_ND_REV |
| 24929 | { 22227, 3, 1, 0, 1, 0, 0, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x101098e0010028ULL }, // Inst #22227 = XOR32rr_NF_ND |
| 24930 | { 22226, 3, 1, 0, 1, 0, 0, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100018e0010028ULL }, // Inst #22226 = XOR32rr_NF |
| 24931 | { 22225, 3, 1, 0, 1, 0, 1, 226, X86ImpOpBase + 0, 0, 0x1099e0010029ULL }, // Inst #22225 = XOR32rr_ND_REV |
| 24932 | { 22224, 3, 1, 0, 1, 0, 1, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1098e0010028ULL }, // Inst #22224 = XOR32rr_ND |
| 24933 | { 22223, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0, 0xc0019e0010029ULL }, // Inst #22223 = XOR32rr_EVEX_REV |
| 24934 | { 22222, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0018e0010028ULL }, // Inst #22222 = XOR32rr_EVEX |
| 24935 | { 22221, 3, 1, 0, 1464, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1880000128ULL }, // Inst #22221 = XOR32rr |
| 24936 | { 22220, 7, 1, 0, 25, 0, 0, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101099e0010019ULL }, // Inst #22220 = XOR32rm_NF_ND |
| 24937 | { 22219, 7, 1, 0, 25, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100019e0010019ULL }, // Inst #22219 = XOR32rm_NF |
| 24938 | { 22218, 7, 1, 0, 25, 0, 1, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1099e0010019ULL }, // Inst #22218 = XOR32rm_ND |
| 24939 | { 22217, 7, 1, 0, 25, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0019e0010019ULL }, // Inst #22217 = XOR32rm_EVEX |
| 24940 | { 22216, 7, 1, 0, 1450, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1980000119ULL }, // Inst #22216 = XOR32rm |
| 24941 | { 22215, 3, 1, 0, 1, 0, 0, 396, X86ImpOpBase + 0, 0, 0x1010c0e0190036ULL }, // Inst #22215 = XOR32ri_NF_ND |
| 24942 | { 22214, 3, 1, 0, 1, 0, 0, 158, X86ImpOpBase + 0, 0, 0x100040e0190036ULL }, // Inst #22214 = XOR32ri_NF |
| 24943 | { 22213, 3, 1, 0, 1, 0, 1, 396, X86ImpOpBase + 0, 0, 0x10c0e0190036ULL }, // Inst #22213 = XOR32ri_ND |
| 24944 | { 22212, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0, 0xc0040e0190036ULL }, // Inst #22212 = XOR32ri_EVEX |
| 24945 | { 22211, 3, 1, 0, 1, 0, 0, 396, X86ImpOpBase + 0, 0, 0x1010c1e0050036ULL }, // Inst #22211 = XOR32ri8_NF_ND |
| 24946 | { 22210, 3, 1, 0, 1, 0, 0, 158, X86ImpOpBase + 0, 0, 0x100041e0050036ULL }, // Inst #22210 = XOR32ri8_NF |
| 24947 | { 22209, 3, 1, 0, 1, 0, 1, 396, X86ImpOpBase + 0, 0, 0x10c1e0050036ULL }, // Inst #22209 = XOR32ri8_ND |
| 24948 | { 22208, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0, 0xc0041e0050036ULL }, // Inst #22208 = XOR32ri8_EVEX |
| 24949 | { 22207, 3, 1, 0, 1462, 0, 1, 158, X86ImpOpBase + 0, 0, 0x4180040136ULL }, // Inst #22207 = XOR32ri8 |
| 24950 | { 22206, 3, 1, 0, 1462, 0, 1, 158, X86ImpOpBase + 0, 0, 0x4080180136ULL }, // Inst #22206 = XOR32ri |
| 24951 | { 22205, 7, 1, 0, 932, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101098e0010018ULL }, // Inst #22205 = XOR32mr_NF_ND |
| 24952 | { 22204, 6, 0, 0, 934, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100018e0010018ULL }, // Inst #22204 = XOR32mr_NF |
| 24953 | { 22203, 7, 1, 0, 932, 0, 1, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1098e0010018ULL }, // Inst #22203 = XOR32mr_ND |
| 24954 | { 22202, 6, 0, 0, 933, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0018e0010018ULL }, // Inst #22202 = XOR32mr_EVEX |
| 24955 | { 22201, 6, 0, 0, 933, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880000118ULL }, // Inst #22201 = XOR32mr |
| 24956 | { 22200, 7, 1, 0, 932, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0190026ULL }, // Inst #22200 = XOR32mi_NF_ND |
| 24957 | { 22199, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0190026ULL }, // Inst #22199 = XOR32mi_NF |
| 24958 | { 22198, 7, 1, 0, 932, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190026ULL }, // Inst #22198 = XOR32mi_ND |
| 24959 | { 22197, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190026ULL }, // Inst #22197 = XOR32mi_EVEX |
| 24960 | { 22196, 7, 1, 0, 932, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050026ULL }, // Inst #22196 = XOR32mi8_NF_ND |
| 24961 | { 22195, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050026ULL }, // Inst #22195 = XOR32mi8_NF |
| 24962 | { 22194, 7, 1, 0, 932, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050026ULL }, // Inst #22194 = XOR32mi8_ND |
| 24963 | { 22193, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050026ULL }, // Inst #22193 = XOR32mi8_EVEX |
| 24964 | { 22192, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040126ULL }, // Inst #22192 = XOR32mi8 |
| 24965 | { 22191, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180126ULL }, // Inst #22191 = XOR32mi |
| 24966 | { 22190, 1, 0, 0, 1463, 1, 2, 1, X86ImpOpBase + 69, 0, 0x1a80180101ULL }, // Inst #22190 = XOR32i32 |
| 24967 | { 22189, 3, 1, 0, 1462, 0, 1, 155, X86ImpOpBase + 0, 0, 0x19800000a9ULL }, // Inst #22189 = XOR16rr_REV |
| 24968 | { 22188, 3, 1, 0, 1, 0, 0, 155, X86ImpOpBase + 0, 0, 0x100019e0010829ULL }, // Inst #22188 = XOR16rr_NF_REV |
| 24969 | { 22187, 3, 1, 0, 1, 0, 0, 379, X86ImpOpBase + 0, 0, 0x101099e0010829ULL }, // Inst #22187 = XOR16rr_NF_ND_REV |
| 24970 | { 22186, 3, 1, 0, 1, 0, 0, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x101098e0010828ULL }, // Inst #22186 = XOR16rr_NF_ND |
| 24971 | { 22185, 3, 1, 0, 1, 0, 0, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100018e0010828ULL }, // Inst #22185 = XOR16rr_NF |
| 24972 | { 22184, 3, 1, 0, 1, 0, 1, 379, X86ImpOpBase + 0, 0, 0x1099e0010829ULL }, // Inst #22184 = XOR16rr_ND_REV |
| 24973 | { 22183, 3, 1, 0, 1, 0, 1, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1098e0010828ULL }, // Inst #22183 = XOR16rr_ND |
| 24974 | { 22182, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0, 0xc0019e0010829ULL }, // Inst #22182 = XOR16rr_EVEX_REV |
| 24975 | { 22181, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0018e0010828ULL }, // Inst #22181 = XOR16rr_EVEX |
| 24976 | { 22180, 3, 1, 0, 1462, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x18800000a8ULL }, // Inst #22180 = XOR16rr |
| 24977 | { 22179, 7, 1, 0, 25, 0, 0, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101099e0010819ULL }, // Inst #22179 = XOR16rm_NF_ND |
| 24978 | { 22178, 7, 1, 0, 25, 0, 0, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100019e0010819ULL }, // Inst #22178 = XOR16rm_NF |
| 24979 | { 22177, 7, 1, 0, 25, 0, 1, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1099e0010819ULL }, // Inst #22177 = XOR16rm_ND |
| 24980 | { 22176, 7, 1, 0, 25, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0019e0010819ULL }, // Inst #22176 = XOR16rm_EVEX |
| 24981 | { 22175, 7, 1, 0, 1450, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1980000099ULL }, // Inst #22175 = XOR16rm |
| 24982 | { 22174, 3, 1, 0, 1, 0, 0, 362, X86ImpOpBase + 0, 0, 0x1010c0e0110836ULL }, // Inst #22174 = XOR16ri_NF_ND |
| 24983 | { 22173, 3, 1, 0, 1, 0, 0, 152, X86ImpOpBase + 0, 0, 0x100040e0110836ULL }, // Inst #22173 = XOR16ri_NF |
| 24984 | { 22172, 3, 1, 0, 1, 0, 1, 362, X86ImpOpBase + 0, 0, 0x10c0e0110836ULL }, // Inst #22172 = XOR16ri_ND |
| 24985 | { 22171, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0, 0xc0040e0110836ULL }, // Inst #22171 = XOR16ri_EVEX |
| 24986 | { 22170, 3, 1, 0, 1, 0, 0, 362, X86ImpOpBase + 0, 0, 0x1010c1e0050836ULL }, // Inst #22170 = XOR16ri8_NF_ND |
| 24987 | { 22169, 3, 1, 0, 1, 0, 0, 152, X86ImpOpBase + 0, 0, 0x100041e0050836ULL }, // Inst #22169 = XOR16ri8_NF |
| 24988 | { 22168, 3, 1, 0, 1, 0, 1, 362, X86ImpOpBase + 0, 0, 0x10c1e0050836ULL }, // Inst #22168 = XOR16ri8_ND |
| 24989 | { 22167, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0, 0xc0041e0050836ULL }, // Inst #22167 = XOR16ri8_EVEX |
| 24990 | { 22166, 3, 1, 0, 1462, 0, 1, 152, X86ImpOpBase + 0, 0, 0x41800400b6ULL }, // Inst #22166 = XOR16ri8 |
| 24991 | { 22165, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0, 0x40801000b6ULL }, // Inst #22165 = XOR16ri |
| 24992 | { 22164, 7, 1, 0, 932, 0, 0, 355, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101098e0010818ULL }, // Inst #22164 = XOR16mr_NF_ND |
| 24993 | { 22163, 6, 0, 0, 934, 0, 0, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100018e0010818ULL }, // Inst #22163 = XOR16mr_NF |
| 24994 | { 22162, 7, 1, 0, 932, 0, 1, 355, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1098e0010818ULL }, // Inst #22162 = XOR16mr_ND |
| 24995 | { 22161, 6, 0, 0, 933, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0018e0010818ULL }, // Inst #22161 = XOR16mr_EVEX |
| 24996 | { 22160, 6, 0, 0, 933, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880000098ULL }, // Inst #22160 = XOR16mr |
| 24997 | { 22159, 7, 1, 0, 932, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0110826ULL }, // Inst #22159 = XOR16mi_NF_ND |
| 24998 | { 22158, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0110826ULL }, // Inst #22158 = XOR16mi_NF |
| 24999 | { 22157, 7, 1, 0, 932, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110826ULL }, // Inst #22157 = XOR16mi_ND |
| 25000 | { 22156, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110826ULL }, // Inst #22156 = XOR16mi_EVEX |
| 25001 | { 22155, 7, 1, 0, 932, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050826ULL }, // Inst #22155 = XOR16mi8_NF_ND |
| 25002 | { 22154, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050826ULL }, // Inst #22154 = XOR16mi8_NF |
| 25003 | { 22153, 7, 1, 0, 932, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050826ULL }, // Inst #22153 = XOR16mi8_ND |
| 25004 | { 22152, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050826ULL }, // Inst #22152 = XOR16mi8_EVEX |
| 25005 | { 22151, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a6ULL }, // Inst #22151 = XOR16mi8 |
| 25006 | { 22150, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a6ULL }, // Inst #22150 = XOR16mi |
| 25007 | { 22149, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 46, 0, 0x1a80100081ULL }, // Inst #22149 = XOR16i16 |
| 25008 | { 22148, 0, 0, 0, 670, 2, 1, 1, X86ImpOpBase + 716, 0|(1ULL<<MCID::MayLoad), 0x6b80000001ULL }, // Inst #22148 = XLAT |
| 25009 | { 22147, 0, 0, 0, 858, 1, 2, 1, X86ImpOpBase + 713, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002050ULL }, // Inst #22147 = XGETBV |
| 25010 | { 22146, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80002055ULL }, // Inst #22146 = XEND |
| 25011 | { 22145, 0, 0, 0, 8, 4, 2, 1, X86ImpOpBase + 707, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5384002068ULL }, // Inst #22145 = XCRYPTOFB |
| 25012 | { 22144, 0, 0, 0, 8, 4, 2, 1, X86ImpOpBase + 707, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5384002048ULL }, // Inst #22144 = XCRYPTECB |
| 25013 | { 22143, 0, 0, 0, 8, 4, 2, 1, X86ImpOpBase + 707, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5384002058ULL }, // Inst #22143 = XCRYPTCTR |
| 25014 | { 22142, 0, 0, 0, 8, 4, 2, 1, X86ImpOpBase + 707, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5384002060ULL }, // Inst #22142 = XCRYPTCFB |
| 25015 | { 22141, 0, 0, 0, 8, 4, 2, 1, X86ImpOpBase + 707, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5384002050ULL }, // Inst #22141 = XCRYPTCBC |
| 25016 | { 22140, 1, 0, 0, 621, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000031ULL }, // Inst #22140 = XCH_F |
| 25017 | { 22139, 4, 2, 0, 1203, 0, 0, 5867, X86ImpOpBase + 0, 0, 0x4300000029ULL }, // Inst #22139 = XCHG8rr |
| 25018 | { 22138, 7, 1, 0, 1018, 0, 0, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4300000019ULL }, // Inst #22138 = XCHG8rm |
| 25019 | { 22137, 4, 2, 0, 1001, 0, 0, 5863, X86ImpOpBase + 0, 0, 0x4380020029ULL }, // Inst #22137 = XCHG64rr |
| 25020 | { 22136, 7, 1, 0, 653, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380020019ULL }, // Inst #22136 = XCHG64rm |
| 25021 | { 22135, 2, 1, 0, 1001, 1, 1, 322, X86ImpOpBase + 705, 0, 0x4800020002ULL }, // Inst #22135 = XCHG64ar |
| 25022 | { 22134, 4, 2, 0, 1001, 0, 0, 5859, X86ImpOpBase + 0, 0, 0x4380000129ULL }, // Inst #22134 = XCHG32rr |
| 25023 | { 22133, 7, 1, 0, 1652, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380000119ULL }, // Inst #22133 = XCHG32rm |
| 25024 | { 22132, 2, 1, 0, 1001, 1, 1, 320, X86ImpOpBase + 703, 0, 0x4800000102ULL }, // Inst #22132 = XCHG32ar |
| 25025 | { 22131, 4, 2, 0, 1017, 0, 0, 5855, X86ImpOpBase + 0, 0, 0x43800000a9ULL }, // Inst #22131 = XCHG16rr |
| 25026 | { 22130, 7, 1, 0, 1651, 0, 0, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380000099ULL }, // Inst #22130 = XCHG16rm |
| 25027 | { 22129, 2, 1, 0, 1017, 1, 1, 595, X86ImpOpBase + 701, 0, 0x4800000082ULL }, // Inst #22129 = XCHG16ar |
| 25028 | { 22128, 1, 0, 0, 8, 0, 1, 600, X86ImpOpBase + 41, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x63801c0178ULL }, // Inst #22128 = XBEGIN_4 |
| 25029 | { 22127, 1, 0, 0, 8, 0, 1, 600, X86ImpOpBase + 41, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x63801400f8ULL }, // Inst #22127 = XBEGIN_2 |
| 25030 | { 22126, 1, 1, 0, 8, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #22126 = XBEGIN |
| 25031 | { 22125, 1, 0, 0, 599, 0, 1, 1221, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800000ULL }, // Inst #22125 = XAM_Fp80 |
| 25032 | { 22124, 1, 0, 0, 599, 0, 1, 1220, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800000ULL }, // Inst #22124 = XAM_Fp64 |
| 25033 | { 22123, 1, 0, 0, 599, 0, 1, 1219, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800000ULL }, // Inst #22123 = XAM_Fp32 |
| 25034 | { 22122, 0, 0, 0, 602, 0, 1, 1, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000065ULL }, // Inst #22122 = XAM_F |
| 25035 | { 22121, 4, 2, 0, 938, 0, 1, 5867, X86ImpOpBase + 0, 0, 0x6000002028ULL }, // Inst #22121 = XADD8rr |
| 25036 | { 22120, 7, 1, 0, 790, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000002019ULL }, // Inst #22120 = XADD8rm |
| 25037 | { 22119, 4, 2, 0, 938, 0, 1, 5863, X86ImpOpBase + 0, 0, 0x6080022028ULL }, // Inst #22119 = XADD64rr |
| 25038 | { 22118, 7, 1, 0, 1650, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080022019ULL }, // Inst #22118 = XADD64rm |
| 25039 | { 22117, 4, 2, 0, 938, 0, 1, 5859, X86ImpOpBase + 0, 0, 0x6080002128ULL }, // Inst #22117 = XADD32rr |
| 25040 | { 22116, 7, 1, 0, 1650, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080002119ULL }, // Inst #22116 = XADD32rm |
| 25041 | { 22115, 4, 2, 0, 938, 0, 1, 5855, X86ImpOpBase + 0, 0, 0x60800020a8ULL }, // Inst #22115 = XADD16rr |
| 25042 | { 22114, 7, 1, 0, 1650, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080002099ULL }, // Inst #22114 = XADD16rm |
| 25043 | { 22113, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x790000000aULL }, // Inst #22113 = XACQUIRE_PREFIX |
| 25044 | { 22112, 1, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6300040078ULL }, // Inst #22112 = XABORT |
| 25045 | { 22111, 6, 0, 0, 8, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x32e0030818ULL }, // Inst #22111 = WRUSSQ_EVEX |
| 25046 | { 22110, 6, 0, 0, 8, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7a80024818ULL }, // Inst #22110 = WRUSSQ |
| 25047 | { 22109, 6, 0, 0, 8, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x32e0010818ULL }, // Inst #22109 = WRUSSD_EVEX |
| 25048 | { 22108, 6, 0, 0, 8, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7a80004818ULL }, // Inst #22108 = WRUSSD |
| 25049 | { 22107, 6, 0, 0, 8, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3360030018ULL }, // Inst #22107 = WRSSQ_EVEX |
| 25050 | { 22106, 6, 0, 0, 8, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00024018ULL }, // Inst #22106 = WRSSQ |
| 25051 | { 22105, 6, 0, 0, 8, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3360010018ULL }, // Inst #22105 = WRSSD_EVEX |
| 25052 | { 22104, 6, 0, 0, 8, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00004018ULL }, // Inst #22104 = WRSSD |
| 25053 | { 22103, 0, 0, 0, 1649, 3, 0, 1, X86ImpOpBase + 348, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000206fULL }, // Inst #22103 = WRPKRUr |
| 25054 | { 22102, 2, 0, 0, 8, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b60197030ULL }, // Inst #22102 = WRMSRNSir_EVEX |
| 25055 | { 22101, 2, 0, 0, 8, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b20197030ULL }, // Inst #22101 = WRMSRNSir |
| 25056 | { 22100, 0, 0, 0, 8, 3, 0, 1, X86ImpOpBase + 348, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002046ULL }, // Inst #22100 = WRMSRNS |
| 25057 | { 22099, 0, 0, 0, 8, 3, 0, 1, X86ImpOpBase + 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80003046ULL }, // Inst #22099 = WRMSRLIST |
| 25058 | { 22098, 0, 0, 0, 736, 3, 0, 1, X86ImpOpBase + 348, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1800002001ULL }, // Inst #22098 = WRMSR |
| 25059 | { 22097, 1, 0, 0, 8, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023033ULL }, // Inst #22097 = WRGSBASE64 |
| 25060 | { 22096, 1, 0, 0, 8, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003033ULL }, // Inst #22096 = WRGSBASE |
| 25061 | { 22095, 1, 0, 0, 8, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023032ULL }, // Inst #22095 = WRFSBASE64 |
| 25062 | { 22094, 1, 0, 0, 8, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003032ULL }, // Inst #22094 = WRFSBASE |
| 25063 | { 22093, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x480003001ULL }, // Inst #22093 = WBNOINVD |
| 25064 | { 22092, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x480002001ULL }, // Inst #22092 = WBINVD |
| 25065 | { 22091, 0, 0, 0, 634, 0, 1, 1, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4d80000001ULL }, // Inst #22091 = WAIT |
| 25066 | { 22090, 0, 0, 0, 805, 0, 16, 1, X86ImpOpBase + 685, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3ba0002001ULL }, // Inst #22090 = VZEROUPPER |
| 25067 | { 22089, 0, 0, 0, 804, 0, 16, 1, X86ImpOpBase + 685, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x13ba0002001ULL }, // Inst #22089 = VZEROALL |
| 25068 | { 22088, 3, 1, 0, 1052, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xaba8002029ULL }, // Inst #22088 = VXORPSrr |
| 25069 | { 22087, 7, 1, 0, 43, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaba8002019ULL }, // Inst #22087 = VXORPSrm |
| 25070 | { 22086, 4, 1, 0, 352, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeabe8002029ULL }, // Inst #22086 = VXORPSZrrkz |
| 25071 | { 22085, 5, 1, 0, 352, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaabe8002029ULL }, // Inst #22085 = VXORPSZrrk |
| 25072 | { 22084, 3, 1, 0, 1412, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8abe8002029ULL }, // Inst #22084 = VXORPSZrr |
| 25073 | { 22083, 8, 1, 0, 351, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeabe8002019ULL }, // Inst #22083 = VXORPSZrmkz |
| 25074 | { 22082, 9, 1, 0, 351, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaabe8002019ULL }, // Inst #22082 = VXORPSZrmk |
| 25075 | { 22081, 8, 1, 0, 351, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eabe8002019ULL }, // Inst #22081 = VXORPSZrmbkz |
| 25076 | { 22080, 9, 1, 0, 351, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aabe8002019ULL }, // Inst #22080 = VXORPSZrmbk |
| 25077 | { 22079, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78abe8002019ULL }, // Inst #22079 = VXORPSZrmb |
| 25078 | { 22078, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8abe8002019ULL }, // Inst #22078 = VXORPSZrm |
| 25079 | { 22077, 4, 1, 0, 350, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7abe8002029ULL }, // Inst #22077 = VXORPSZ256rrkz |
| 25080 | { 22076, 5, 1, 0, 350, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3abe8002029ULL }, // Inst #22076 = VXORPSZ256rrk |
| 25081 | { 22075, 3, 1, 0, 1411, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1abe8002029ULL }, // Inst #22075 = VXORPSZ256rr |
| 25082 | { 22074, 8, 1, 0, 349, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7abe8002019ULL }, // Inst #22074 = VXORPSZ256rmkz |
| 25083 | { 22073, 9, 1, 0, 349, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3abe8002019ULL }, // Inst #22073 = VXORPSZ256rmk |
| 25084 | { 22072, 8, 1, 0, 349, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77abe8002019ULL }, // Inst #22072 = VXORPSZ256rmbkz |
| 25085 | { 22071, 9, 1, 0, 349, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73abe8002019ULL }, // Inst #22071 = VXORPSZ256rmbk |
| 25086 | { 22070, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71abe8002019ULL }, // Inst #22070 = VXORPSZ256rmb |
| 25087 | { 22069, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1abe8002019ULL }, // Inst #22069 = VXORPSZ256rm |
| 25088 | { 22068, 4, 1, 0, 44, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6abe8002029ULL }, // Inst #22068 = VXORPSZ128rrkz |
| 25089 | { 22067, 5, 1, 0, 44, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2abe8002029ULL }, // Inst #22067 = VXORPSZ128rrk |
| 25090 | { 22066, 3, 1, 0, 1410, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0abe8002029ULL }, // Inst #22066 = VXORPSZ128rr |
| 25091 | { 22065, 8, 1, 0, 43, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6abe8002019ULL }, // Inst #22065 = VXORPSZ128rmkz |
| 25092 | { 22064, 9, 1, 0, 43, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2abe8002019ULL }, // Inst #22064 = VXORPSZ128rmk |
| 25093 | { 22063, 8, 1, 0, 43, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76abe8002019ULL }, // Inst #22063 = VXORPSZ128rmbkz |
| 25094 | { 22062, 9, 1, 0, 43, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72abe8002019ULL }, // Inst #22062 = VXORPSZ128rmbk |
| 25095 | { 22061, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70abe8002019ULL }, // Inst #22061 = VXORPSZ128rmb |
| 25096 | { 22060, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0abe8002019ULL }, // Inst #22060 = VXORPSZ128rm |
| 25097 | { 22059, 3, 1, 0, 809, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1aba8002029ULL }, // Inst #22059 = VXORPSYrr |
| 25098 | { 22058, 7, 1, 0, 349, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1aba8002019ULL }, // Inst #22058 = VXORPSYrm |
| 25099 | { 22057, 3, 1, 0, 1052, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xabb0002829ULL }, // Inst #22057 = VXORPDrr |
| 25100 | { 22056, 7, 1, 0, 43, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xabb0002819ULL }, // Inst #22056 = VXORPDrm |
| 25101 | { 22055, 4, 1, 0, 352, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeabf0022829ULL }, // Inst #22055 = VXORPDZrrkz |
| 25102 | { 22054, 5, 1, 0, 352, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaabf0022829ULL }, // Inst #22054 = VXORPDZrrk |
| 25103 | { 22053, 3, 1, 0, 1412, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8abf0022829ULL }, // Inst #22053 = VXORPDZrr |
| 25104 | { 22052, 8, 1, 0, 351, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeabf0022819ULL }, // Inst #22052 = VXORPDZrmkz |
| 25105 | { 22051, 9, 1, 0, 351, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaabf0022819ULL }, // Inst #22051 = VXORPDZrmk |
| 25106 | { 22050, 8, 1, 0, 351, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eabf0022819ULL }, // Inst #22050 = VXORPDZrmbkz |
| 25107 | { 22049, 9, 1, 0, 351, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aabf0022819ULL }, // Inst #22049 = VXORPDZrmbk |
| 25108 | { 22048, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98abf0022819ULL }, // Inst #22048 = VXORPDZrmb |
| 25109 | { 22047, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8abf0022819ULL }, // Inst #22047 = VXORPDZrm |
| 25110 | { 22046, 4, 1, 0, 350, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7abf0022829ULL }, // Inst #22046 = VXORPDZ256rrkz |
| 25111 | { 22045, 5, 1, 0, 350, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3abf0022829ULL }, // Inst #22045 = VXORPDZ256rrk |
| 25112 | { 22044, 3, 1, 0, 1411, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1abf0022829ULL }, // Inst #22044 = VXORPDZ256rr |
| 25113 | { 22043, 8, 1, 0, 349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7abf0022819ULL }, // Inst #22043 = VXORPDZ256rmkz |
| 25114 | { 22042, 9, 1, 0, 349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3abf0022819ULL }, // Inst #22042 = VXORPDZ256rmk |
| 25115 | { 22041, 8, 1, 0, 349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97abf0022819ULL }, // Inst #22041 = VXORPDZ256rmbkz |
| 25116 | { 22040, 9, 1, 0, 349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93abf0022819ULL }, // Inst #22040 = VXORPDZ256rmbk |
| 25117 | { 22039, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91abf0022819ULL }, // Inst #22039 = VXORPDZ256rmb |
| 25118 | { 22038, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1abf0022819ULL }, // Inst #22038 = VXORPDZ256rm |
| 25119 | { 22037, 4, 1, 0, 44, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6abf0022829ULL }, // Inst #22037 = VXORPDZ128rrkz |
| 25120 | { 22036, 5, 1, 0, 44, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2abf0022829ULL }, // Inst #22036 = VXORPDZ128rrk |
| 25121 | { 22035, 3, 1, 0, 1410, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0abf0022829ULL }, // Inst #22035 = VXORPDZ128rr |
| 25122 | { 22034, 8, 1, 0, 43, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6abf0022819ULL }, // Inst #22034 = VXORPDZ128rmkz |
| 25123 | { 22033, 9, 1, 0, 43, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2abf0022819ULL }, // Inst #22033 = VXORPDZ128rmk |
| 25124 | { 22032, 8, 1, 0, 43, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96abf0022819ULL }, // Inst #22032 = VXORPDZ128rmbkz |
| 25125 | { 22031, 9, 1, 0, 43, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92abf0022819ULL }, // Inst #22031 = VXORPDZ128rmbk |
| 25126 | { 22030, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90abf0022819ULL }, // Inst #22030 = VXORPDZ128rmb |
| 25127 | { 22029, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0abf0022819ULL }, // Inst #22029 = VXORPDZ128rm |
| 25128 | { 22028, 3, 1, 0, 809, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1abb0002829ULL }, // Inst #22028 = VXORPDYrr |
| 25129 | { 22027, 7, 1, 0, 349, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1abb0002819ULL }, // Inst #22027 = VXORPDYrm |
| 25130 | { 22026, 3, 1, 0, 1417, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8a28002029ULL }, // Inst #22026 = VUNPCKLPSrr |
| 25131 | { 22025, 7, 1, 0, 1426, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a28002019ULL }, // Inst #22025 = VUNPCKLPSrm |
| 25132 | { 22024, 4, 1, 0, 475, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xee8a68002029ULL }, // Inst #22024 = VUNPCKLPSZrrkz |
| 25133 | { 22023, 5, 1, 0, 475, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xea8a68002029ULL }, // Inst #22023 = VUNPCKLPSZrrk |
| 25134 | { 22022, 3, 1, 0, 475, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88a68002029ULL }, // Inst #22022 = VUNPCKLPSZrr |
| 25135 | { 22021, 8, 1, 0, 583, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8a68002019ULL }, // Inst #22021 = VUNPCKLPSZrmkz |
| 25136 | { 22020, 9, 1, 0, 583, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8a68002019ULL }, // Inst #22020 = VUNPCKLPSZrmk |
| 25137 | { 22019, 8, 1, 0, 583, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e8a68002019ULL }, // Inst #22019 = VUNPCKLPSZrmbkz |
| 25138 | { 22018, 9, 1, 0, 583, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a8a68002019ULL }, // Inst #22018 = VUNPCKLPSZrmbk |
| 25139 | { 22017, 7, 1, 0, 583, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x788a68002019ULL }, // Inst #22017 = VUNPCKLPSZrmb |
| 25140 | { 22016, 7, 1, 0, 583, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88a68002019ULL }, // Inst #22016 = VUNPCKLPSZrm |
| 25141 | { 22015, 4, 1, 0, 1418, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc78a68002029ULL }, // Inst #22015 = VUNPCKLPSZ256rrkz |
| 25142 | { 22014, 5, 1, 0, 1418, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc38a68002029ULL }, // Inst #22014 = VUNPCKLPSZ256rrk |
| 25143 | { 22013, 3, 1, 0, 1418, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18a68002029ULL }, // Inst #22013 = VUNPCKLPSZ256rr |
| 25144 | { 22012, 8, 1, 0, 1433, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78a68002019ULL }, // Inst #22012 = VUNPCKLPSZ256rmkz |
| 25145 | { 22011, 9, 1, 0, 1433, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38a68002019ULL }, // Inst #22011 = VUNPCKLPSZ256rmk |
| 25146 | { 22010, 8, 1, 0, 1433, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x778a68002019ULL }, // Inst #22010 = VUNPCKLPSZ256rmbkz |
| 25147 | { 22009, 9, 1, 0, 1433, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x738a68002019ULL }, // Inst #22009 = VUNPCKLPSZ256rmbk |
| 25148 | { 22008, 7, 1, 0, 1433, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x718a68002019ULL }, // Inst #22008 = VUNPCKLPSZ256rmb |
| 25149 | { 22007, 7, 1, 0, 1433, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18a68002019ULL }, // Inst #22007 = VUNPCKLPSZ256rm |
| 25150 | { 22006, 4, 1, 0, 1417, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa68a68002029ULL }, // Inst #22006 = VUNPCKLPSZ128rrkz |
| 25151 | { 22005, 5, 1, 0, 1417, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa28a68002029ULL }, // Inst #22005 = VUNPCKLPSZ128rrk |
| 25152 | { 22004, 3, 1, 0, 1417, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08a68002029ULL }, // Inst #22004 = VUNPCKLPSZ128rr |
| 25153 | { 22003, 8, 1, 0, 1426, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68a68002019ULL }, // Inst #22003 = VUNPCKLPSZ128rmkz |
| 25154 | { 22002, 9, 1, 0, 1426, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28a68002019ULL }, // Inst #22002 = VUNPCKLPSZ128rmk |
| 25155 | { 22001, 8, 1, 0, 1426, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x768a68002019ULL }, // Inst #22001 = VUNPCKLPSZ128rmbkz |
| 25156 | { 22000, 9, 1, 0, 1426, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x728a68002019ULL }, // Inst #22000 = VUNPCKLPSZ128rmbk |
| 25157 | { 21999, 7, 1, 0, 1426, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x708a68002019ULL }, // Inst #21999 = VUNPCKLPSZ128rmb |
| 25158 | { 21998, 7, 1, 0, 1426, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08a68002019ULL }, // Inst #21998 = VUNPCKLPSZ128rm |
| 25159 | { 21997, 3, 1, 0, 1418, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18a28002029ULL }, // Inst #21997 = VUNPCKLPSYrr |
| 25160 | { 21996, 7, 1, 0, 1687, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18a28002019ULL }, // Inst #21996 = VUNPCKLPSYrm |
| 25161 | { 21995, 3, 1, 0, 1417, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8a30002829ULL }, // Inst #21995 = VUNPCKLPDrr |
| 25162 | { 21994, 7, 1, 0, 1426, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a30002819ULL }, // Inst #21994 = VUNPCKLPDrm |
| 25163 | { 21993, 4, 1, 0, 475, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xee8a70022829ULL }, // Inst #21993 = VUNPCKLPDZrrkz |
| 25164 | { 21992, 5, 1, 0, 475, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xea8a70022829ULL }, // Inst #21992 = VUNPCKLPDZrrk |
| 25165 | { 21991, 3, 1, 0, 475, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88a70022829ULL }, // Inst #21991 = VUNPCKLPDZrr |
| 25166 | { 21990, 8, 1, 0, 583, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8a70022819ULL }, // Inst #21990 = VUNPCKLPDZrmkz |
| 25167 | { 21989, 9, 1, 0, 583, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8a70022819ULL }, // Inst #21989 = VUNPCKLPDZrmk |
| 25168 | { 21988, 8, 1, 0, 583, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e8a70022819ULL }, // Inst #21988 = VUNPCKLPDZrmbkz |
| 25169 | { 21987, 9, 1, 0, 583, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a8a70022819ULL }, // Inst #21987 = VUNPCKLPDZrmbk |
| 25170 | { 21986, 7, 1, 0, 583, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x988a70022819ULL }, // Inst #21986 = VUNPCKLPDZrmb |
| 25171 | { 21985, 7, 1, 0, 583, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88a70022819ULL }, // Inst #21985 = VUNPCKLPDZrm |
| 25172 | { 21984, 4, 1, 0, 1418, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc78a70022829ULL }, // Inst #21984 = VUNPCKLPDZ256rrkz |
| 25173 | { 21983, 5, 1, 0, 1418, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc38a70022829ULL }, // Inst #21983 = VUNPCKLPDZ256rrk |
| 25174 | { 21982, 3, 1, 0, 1418, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18a70022829ULL }, // Inst #21982 = VUNPCKLPDZ256rr |
| 25175 | { 21981, 8, 1, 0, 1433, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78a70022819ULL }, // Inst #21981 = VUNPCKLPDZ256rmkz |
| 25176 | { 21980, 9, 1, 0, 1433, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38a70022819ULL }, // Inst #21980 = VUNPCKLPDZ256rmk |
| 25177 | { 21979, 8, 1, 0, 1433, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x978a70022819ULL }, // Inst #21979 = VUNPCKLPDZ256rmbkz |
| 25178 | { 21978, 9, 1, 0, 1433, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x938a70022819ULL }, // Inst #21978 = VUNPCKLPDZ256rmbk |
| 25179 | { 21977, 7, 1, 0, 1433, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x918a70022819ULL }, // Inst #21977 = VUNPCKLPDZ256rmb |
| 25180 | { 21976, 7, 1, 0, 1433, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18a70022819ULL }, // Inst #21976 = VUNPCKLPDZ256rm |
| 25181 | { 21975, 4, 1, 0, 1417, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa68a70022829ULL }, // Inst #21975 = VUNPCKLPDZ128rrkz |
| 25182 | { 21974, 5, 1, 0, 1417, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa28a70022829ULL }, // Inst #21974 = VUNPCKLPDZ128rrk |
| 25183 | { 21973, 3, 1, 0, 1417, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08a70022829ULL }, // Inst #21973 = VUNPCKLPDZ128rr |
| 25184 | { 21972, 8, 1, 0, 1426, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68a70022819ULL }, // Inst #21972 = VUNPCKLPDZ128rmkz |
| 25185 | { 21971, 9, 1, 0, 1426, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28a70022819ULL }, // Inst #21971 = VUNPCKLPDZ128rmk |
| 25186 | { 21970, 8, 1, 0, 1426, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x968a70022819ULL }, // Inst #21970 = VUNPCKLPDZ128rmbkz |
| 25187 | { 21969, 9, 1, 0, 1426, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x928a70022819ULL }, // Inst #21969 = VUNPCKLPDZ128rmbk |
| 25188 | { 21968, 7, 1, 0, 1426, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x908a70022819ULL }, // Inst #21968 = VUNPCKLPDZ128rmb |
| 25189 | { 21967, 7, 1, 0, 1426, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08a70022819ULL }, // Inst #21967 = VUNPCKLPDZ128rm |
| 25190 | { 21966, 3, 1, 0, 1418, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18a30002829ULL }, // Inst #21966 = VUNPCKLPDYrr |
| 25191 | { 21965, 7, 1, 0, 1687, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18a30002819ULL }, // Inst #21965 = VUNPCKLPDYrm |
| 25192 | { 21964, 3, 1, 0, 1417, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8aa8002029ULL }, // Inst #21964 = VUNPCKHPSrr |
| 25193 | { 21963, 7, 1, 0, 1426, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8aa8002019ULL }, // Inst #21963 = VUNPCKHPSrm |
| 25194 | { 21962, 4, 1, 0, 475, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xee8ae8002029ULL }, // Inst #21962 = VUNPCKHPSZrrkz |
| 25195 | { 21961, 5, 1, 0, 475, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xea8ae8002029ULL }, // Inst #21961 = VUNPCKHPSZrrk |
| 25196 | { 21960, 3, 1, 0, 475, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88ae8002029ULL }, // Inst #21960 = VUNPCKHPSZrr |
| 25197 | { 21959, 8, 1, 0, 583, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8ae8002019ULL }, // Inst #21959 = VUNPCKHPSZrmkz |
| 25198 | { 21958, 9, 1, 0, 583, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8ae8002019ULL }, // Inst #21958 = VUNPCKHPSZrmk |
| 25199 | { 21957, 8, 1, 0, 583, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e8ae8002019ULL }, // Inst #21957 = VUNPCKHPSZrmbkz |
| 25200 | { 21956, 9, 1, 0, 583, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a8ae8002019ULL }, // Inst #21956 = VUNPCKHPSZrmbk |
| 25201 | { 21955, 7, 1, 0, 583, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x788ae8002019ULL }, // Inst #21955 = VUNPCKHPSZrmb |
| 25202 | { 21954, 7, 1, 0, 583, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88ae8002019ULL }, // Inst #21954 = VUNPCKHPSZrm |
| 25203 | { 21953, 4, 1, 0, 1418, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc78ae8002029ULL }, // Inst #21953 = VUNPCKHPSZ256rrkz |
| 25204 | { 21952, 5, 1, 0, 1418, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc38ae8002029ULL }, // Inst #21952 = VUNPCKHPSZ256rrk |
| 25205 | { 21951, 3, 1, 0, 1418, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18ae8002029ULL }, // Inst #21951 = VUNPCKHPSZ256rr |
| 25206 | { 21950, 8, 1, 0, 1433, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78ae8002019ULL }, // Inst #21950 = VUNPCKHPSZ256rmkz |
| 25207 | { 21949, 9, 1, 0, 1433, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38ae8002019ULL }, // Inst #21949 = VUNPCKHPSZ256rmk |
| 25208 | { 21948, 8, 1, 0, 1433, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x778ae8002019ULL }, // Inst #21948 = VUNPCKHPSZ256rmbkz |
| 25209 | { 21947, 9, 1, 0, 1433, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x738ae8002019ULL }, // Inst #21947 = VUNPCKHPSZ256rmbk |
| 25210 | { 21946, 7, 1, 0, 1433, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x718ae8002019ULL }, // Inst #21946 = VUNPCKHPSZ256rmb |
| 25211 | { 21945, 7, 1, 0, 1433, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18ae8002019ULL }, // Inst #21945 = VUNPCKHPSZ256rm |
| 25212 | { 21944, 4, 1, 0, 1417, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa68ae8002029ULL }, // Inst #21944 = VUNPCKHPSZ128rrkz |
| 25213 | { 21943, 5, 1, 0, 1417, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa28ae8002029ULL }, // Inst #21943 = VUNPCKHPSZ128rrk |
| 25214 | { 21942, 3, 1, 0, 1417, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08ae8002029ULL }, // Inst #21942 = VUNPCKHPSZ128rr |
| 25215 | { 21941, 8, 1, 0, 1426, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68ae8002019ULL }, // Inst #21941 = VUNPCKHPSZ128rmkz |
| 25216 | { 21940, 9, 1, 0, 1426, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28ae8002019ULL }, // Inst #21940 = VUNPCKHPSZ128rmk |
| 25217 | { 21939, 8, 1, 0, 1426, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x768ae8002019ULL }, // Inst #21939 = VUNPCKHPSZ128rmbkz |
| 25218 | { 21938, 9, 1, 0, 1426, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x728ae8002019ULL }, // Inst #21938 = VUNPCKHPSZ128rmbk |
| 25219 | { 21937, 7, 1, 0, 1426, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x708ae8002019ULL }, // Inst #21937 = VUNPCKHPSZ128rmb |
| 25220 | { 21936, 7, 1, 0, 1426, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08ae8002019ULL }, // Inst #21936 = VUNPCKHPSZ128rm |
| 25221 | { 21935, 3, 1, 0, 1418, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18aa8002029ULL }, // Inst #21935 = VUNPCKHPSYrr |
| 25222 | { 21934, 7, 1, 0, 1687, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18aa8002019ULL }, // Inst #21934 = VUNPCKHPSYrm |
| 25223 | { 21933, 3, 1, 0, 1417, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x8ab0002829ULL }, // Inst #21933 = VUNPCKHPDrr |
| 25224 | { 21932, 7, 1, 0, 1426, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8ab0002819ULL }, // Inst #21932 = VUNPCKHPDrm |
| 25225 | { 21931, 4, 1, 0, 475, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xee8af0022829ULL }, // Inst #21931 = VUNPCKHPDZrrkz |
| 25226 | { 21930, 5, 1, 0, 475, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xea8af0022829ULL }, // Inst #21930 = VUNPCKHPDZrrk |
| 25227 | { 21929, 3, 1, 0, 475, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88af0022829ULL }, // Inst #21929 = VUNPCKHPDZrr |
| 25228 | { 21928, 8, 1, 0, 583, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8af0022819ULL }, // Inst #21928 = VUNPCKHPDZrmkz |
| 25229 | { 21927, 9, 1, 0, 583, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8af0022819ULL }, // Inst #21927 = VUNPCKHPDZrmk |
| 25230 | { 21926, 8, 1, 0, 583, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e8af0022819ULL }, // Inst #21926 = VUNPCKHPDZrmbkz |
| 25231 | { 21925, 9, 1, 0, 583, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a8af0022819ULL }, // Inst #21925 = VUNPCKHPDZrmbk |
| 25232 | { 21924, 7, 1, 0, 583, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x988af0022819ULL }, // Inst #21924 = VUNPCKHPDZrmb |
| 25233 | { 21923, 7, 1, 0, 583, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88af0022819ULL }, // Inst #21923 = VUNPCKHPDZrm |
| 25234 | { 21922, 4, 1, 0, 1418, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc78af0022829ULL }, // Inst #21922 = VUNPCKHPDZ256rrkz |
| 25235 | { 21921, 5, 1, 0, 1418, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc38af0022829ULL }, // Inst #21921 = VUNPCKHPDZ256rrk |
| 25236 | { 21920, 3, 1, 0, 1418, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18af0022829ULL }, // Inst #21920 = VUNPCKHPDZ256rr |
| 25237 | { 21919, 8, 1, 0, 1433, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78af0022819ULL }, // Inst #21919 = VUNPCKHPDZ256rmkz |
| 25238 | { 21918, 9, 1, 0, 1433, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38af0022819ULL }, // Inst #21918 = VUNPCKHPDZ256rmk |
| 25239 | { 21917, 8, 1, 0, 1433, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x978af0022819ULL }, // Inst #21917 = VUNPCKHPDZ256rmbkz |
| 25240 | { 21916, 9, 1, 0, 1433, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x938af0022819ULL }, // Inst #21916 = VUNPCKHPDZ256rmbk |
| 25241 | { 21915, 7, 1, 0, 1433, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x918af0022819ULL }, // Inst #21915 = VUNPCKHPDZ256rmb |
| 25242 | { 21914, 7, 1, 0, 1433, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18af0022819ULL }, // Inst #21914 = VUNPCKHPDZ256rm |
| 25243 | { 21913, 4, 1, 0, 1417, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa68af0022829ULL }, // Inst #21913 = VUNPCKHPDZ128rrkz |
| 25244 | { 21912, 5, 1, 0, 1417, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa28af0022829ULL }, // Inst #21912 = VUNPCKHPDZ128rrk |
| 25245 | { 21911, 3, 1, 0, 1417, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa08af0022829ULL }, // Inst #21911 = VUNPCKHPDZ128rr |
| 25246 | { 21910, 8, 1, 0, 1426, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68af0022819ULL }, // Inst #21910 = VUNPCKHPDZ128rmkz |
| 25247 | { 21909, 9, 1, 0, 1426, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28af0022819ULL }, // Inst #21909 = VUNPCKHPDZ128rmk |
| 25248 | { 21908, 8, 1, 0, 1426, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x968af0022819ULL }, // Inst #21908 = VUNPCKHPDZ128rmbkz |
| 25249 | { 21907, 9, 1, 0, 1426, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x928af0022819ULL }, // Inst #21907 = VUNPCKHPDZ128rmbk |
| 25250 | { 21906, 7, 1, 0, 1426, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x908af0022819ULL }, // Inst #21906 = VUNPCKHPDZ128rmb |
| 25251 | { 21905, 7, 1, 0, 1426, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08af0022819ULL }, // Inst #21905 = VUNPCKHPDZ128rm |
| 25252 | { 21904, 3, 1, 0, 1418, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18ab0002829ULL }, // Inst #21904 = VUNPCKHPDYrr |
| 25253 | { 21903, 7, 1, 0, 1687, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18ab0002819ULL }, // Inst #21903 = VUNPCKHPDYrm |
| 25254 | { 21902, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x701768003029ULL }, // Inst #21902 = VUCOMXSSZrrb_Int |
| 25255 | { 21901, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x601768003029ULL }, // Inst #21901 = VUCOMXSSZrr_Int |
| 25256 | { 21900, 2, 0, 0, 86, 1, 1, 2757, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x601768003029ULL }, // Inst #21900 = VUCOMXSSZrr |
| 25257 | { 21899, 6, 0, 0, 86, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601768003019ULL }, // Inst #21899 = VUCOMXSSZrm_Int |
| 25258 | { 21898, 6, 0, 0, 85, 1, 1, 2751, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601768003019ULL }, // Inst #21898 = VUCOMXSSZrm |
| 25259 | { 21897, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x501768013029ULL }, // Inst #21897 = VUCOMXSHZrrb_Int |
| 25260 | { 21896, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x401768013029ULL }, // Inst #21896 = VUCOMXSHZrr_Int |
| 25261 | { 21895, 2, 0, 0, 86, 1, 1, 2741, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x401768013029ULL }, // Inst #21895 = VUCOMXSHZrr |
| 25262 | { 21894, 6, 0, 0, 86, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401768013019ULL }, // Inst #21894 = VUCOMXSHZrm_Int |
| 25263 | { 21893, 6, 0, 0, 85, 1, 1, 2735, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401768013019ULL }, // Inst #21893 = VUCOMXSHZrm |
| 25264 | { 21892, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x901770023829ULL }, // Inst #21892 = VUCOMXSDZrrb_Int |
| 25265 | { 21891, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x801770023829ULL }, // Inst #21891 = VUCOMXSDZrr_Int |
| 25266 | { 21890, 2, 0, 0, 86, 1, 1, 2749, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x801770023829ULL }, // Inst #21890 = VUCOMXSDZrr |
| 25267 | { 21889, 6, 0, 0, 86, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801770023819ULL }, // Inst #21889 = VUCOMXSDZrm_Int |
| 25268 | { 21888, 6, 0, 0, 85, 1, 1, 2743, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801770023819ULL }, // Inst #21888 = VUCOMXSDZrm |
| 25269 | { 21887, 2, 0, 0, 746, 1, 1, 557, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1728002029ULL }, // Inst #21887 = VUCOMISSrr_Int |
| 25270 | { 21886, 2, 0, 0, 746, 1, 1, 1008, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1728002029ULL }, // Inst #21886 = VUCOMISSrr |
| 25271 | { 21885, 6, 0, 0, 786, 1, 1, 551, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1728002019ULL }, // Inst #21885 = VUCOMISSrm_Int |
| 25272 | { 21884, 6, 0, 0, 786, 1, 1, 1002, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1728002019ULL }, // Inst #21884 = VUCOMISSrm |
| 25273 | { 21883, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0, 0x701768042029ULL }, // Inst #21883 = VUCOMISSZrrb |
| 25274 | { 21882, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x601768002029ULL }, // Inst #21882 = VUCOMISSZrr_Int |
| 25275 | { 21881, 2, 0, 0, 86, 1, 1, 2757, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x601768002029ULL }, // Inst #21881 = VUCOMISSZrr |
| 25276 | { 21880, 6, 0, 0, 85, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601768002019ULL }, // Inst #21880 = VUCOMISSZrm_Int |
| 25277 | { 21879, 6, 0, 0, 85, 1, 1, 2751, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601768002019ULL }, // Inst #21879 = VUCOMISSZrm |
| 25278 | { 21878, 2, 0, 0, 1859, 1, 1, 2398, X86ImpOpBase + 154, 0, 0x501768052029ULL }, // Inst #21878 = VUCOMISHZrrb |
| 25279 | { 21877, 2, 0, 0, 1859, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x401768012029ULL }, // Inst #21877 = VUCOMISHZrr_Int |
| 25280 | { 21876, 2, 0, 0, 1859, 1, 1, 2741, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x401768012029ULL }, // Inst #21876 = VUCOMISHZrr |
| 25281 | { 21875, 6, 0, 0, 1972, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401768012019ULL }, // Inst #21875 = VUCOMISHZrm_Int |
| 25282 | { 21874, 6, 0, 0, 1972, 1, 1, 2735, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401768012019ULL }, // Inst #21874 = VUCOMISHZrm |
| 25283 | { 21873, 2, 0, 0, 746, 1, 1, 557, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1730002829ULL }, // Inst #21873 = VUCOMISDrr_Int |
| 25284 | { 21872, 2, 0, 0, 746, 1, 1, 1000, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1730002829ULL }, // Inst #21872 = VUCOMISDrr |
| 25285 | { 21871, 6, 0, 0, 786, 1, 1, 551, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1730002819ULL }, // Inst #21871 = VUCOMISDrm_Int |
| 25286 | { 21870, 6, 0, 0, 786, 1, 1, 994, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1730002819ULL }, // Inst #21870 = VUCOMISDrm |
| 25287 | { 21869, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0, 0x901770062829ULL }, // Inst #21869 = VUCOMISDZrrb |
| 25288 | { 21868, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x801770022829ULL }, // Inst #21868 = VUCOMISDZrr_Int |
| 25289 | { 21867, 2, 0, 0, 86, 1, 1, 2749, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x801770022829ULL }, // Inst #21867 = VUCOMISDZrr |
| 25290 | { 21866, 6, 0, 0, 85, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801770022819ULL }, // Inst #21866 = VUCOMISDZrm_Int |
| 25291 | { 21865, 6, 0, 0, 85, 1, 1, 2743, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801770022819ULL }, // Inst #21865 = VUCOMISDZrm |
| 25292 | { 21864, 2, 0, 0, 599, 0, 1, 557, X86ImpOpBase + 0, 0, 0x728004829ULL }, // Inst #21864 = VTESTPSrr |
| 25293 | { 21863, 6, 0, 0, 598, 0, 1, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x728004819ULL }, // Inst #21863 = VTESTPSrm |
| 25294 | { 21862, 2, 0, 0, 1692, 0, 1, 3116, X86ImpOpBase + 0, 0, 0x10728004829ULL }, // Inst #21862 = VTESTPSYrr |
| 25295 | { 21861, 6, 0, 0, 596, 0, 1, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10728004819ULL }, // Inst #21861 = VTESTPSYrm |
| 25296 | { 21860, 2, 0, 0, 599, 0, 1, 557, X86ImpOpBase + 0, 0, 0x7b0004829ULL }, // Inst #21860 = VTESTPDrr |
| 25297 | { 21859, 6, 0, 0, 598, 0, 1, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7b0004819ULL }, // Inst #21859 = VTESTPDrm |
| 25298 | { 21858, 2, 0, 0, 597, 0, 1, 3116, X86ImpOpBase + 0, 0, 0x107b0004829ULL }, // Inst #21858 = VTESTPDYrr |
| 25299 | { 21857, 6, 0, 0, 596, 0, 1, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x107b0004819ULL }, // Inst #21857 = VTESTPDYrm |
| 25300 | { 21856, 3, 1, 0, 1461, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae28003029ULL }, // Inst #21856 = VSUBSSrr_Int |
| 25301 | { 21855, 3, 1, 0, 1461, 1, 0, 2046, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae28003029ULL }, // Inst #21855 = VSUBSSrr |
| 25302 | { 21854, 7, 1, 0, 34, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae28003019ULL }, // Inst #21854 = VSUBSSrm_Int |
| 25303 | { 21853, 7, 1, 0, 34, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae28003019ULL }, // Inst #21853 = VSUBSSrm |
| 25304 | { 21852, 4, 1, 0, 1897, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66ae68003029ULL }, // Inst #21852 = VSUBSSZrrkz_Int |
| 25305 | { 21851, 5, 1, 0, 35, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62ae68003029ULL }, // Inst #21851 = VSUBSSZrrk_Int |
| 25306 | { 21850, 5, 1, 0, 1897, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x176ae68003029ULL }, // Inst #21850 = VSUBSSZrrbkz_Int |
| 25307 | { 21849, 6, 1, 0, 35, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x172ae68003029ULL }, // Inst #21849 = VSUBSSZrrbk_Int |
| 25308 | { 21848, 4, 1, 0, 35, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x170ae68003029ULL }, // Inst #21848 = VSUBSSZrrb_Int |
| 25309 | { 21847, 3, 1, 0, 35, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ae68003029ULL }, // Inst #21847 = VSUBSSZrr_Int |
| 25310 | { 21846, 3, 1, 0, 35, 1, 0, 2036, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ae68003029ULL }, // Inst #21846 = VSUBSSZrr |
| 25311 | { 21845, 8, 1, 0, 34, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66ae68003019ULL }, // Inst #21845 = VSUBSSZrmkz_Int |
| 25312 | { 21844, 9, 1, 0, 34, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62ae68003019ULL }, // Inst #21844 = VSUBSSZrmk_Int |
| 25313 | { 21843, 7, 1, 0, 34, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ae68003019ULL }, // Inst #21843 = VSUBSSZrm_Int |
| 25314 | { 21842, 7, 1, 0, 34, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ae68003019ULL }, // Inst #21842 = VSUBSSZrm |
| 25315 | { 21841, 4, 1, 0, 1904, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x46ae68013029ULL }, // Inst #21841 = VSUBSHZrrkz_Int |
| 25316 | { 21840, 5, 1, 0, 1904, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x42ae68013029ULL }, // Inst #21840 = VSUBSHZrrk_Int |
| 25317 | { 21839, 5, 1, 0, 1904, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x156ae68013029ULL }, // Inst #21839 = VSUBSHZrrbkz_Int |
| 25318 | { 21838, 6, 1, 0, 1904, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x152ae68013029ULL }, // Inst #21838 = VSUBSHZrrbk_Int |
| 25319 | { 21837, 4, 1, 0, 1775, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x150ae68013029ULL }, // Inst #21837 = VSUBSHZrrb_Int |
| 25320 | { 21836, 3, 1, 0, 1775, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ae68013029ULL }, // Inst #21836 = VSUBSHZrr_Int |
| 25321 | { 21835, 3, 1, 0, 1775, 1, 0, 2026, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ae68013029ULL }, // Inst #21835 = VSUBSHZrr |
| 25322 | { 21834, 8, 1, 0, 1764, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46ae68013019ULL }, // Inst #21834 = VSUBSHZrmkz_Int |
| 25323 | { 21833, 9, 1, 0, 1764, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42ae68013019ULL }, // Inst #21833 = VSUBSHZrmk_Int |
| 25324 | { 21832, 7, 1, 0, 1764, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ae68013019ULL }, // Inst #21832 = VSUBSHZrm_Int |
| 25325 | { 21831, 7, 1, 0, 1764, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ae68013019ULL }, // Inst #21831 = VSUBSHZrm |
| 25326 | { 21830, 3, 1, 0, 33, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae30003829ULL }, // Inst #21830 = VSUBSDrr_Int |
| 25327 | { 21829, 3, 1, 0, 33, 1, 0, 2016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae30003829ULL }, // Inst #21829 = VSUBSDrr |
| 25328 | { 21828, 7, 1, 0, 32, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae30003819ULL }, // Inst #21828 = VSUBSDrm_Int |
| 25329 | { 21827, 7, 1, 0, 32, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae30003819ULL }, // Inst #21827 = VSUBSDrm |
| 25330 | { 21826, 4, 1, 0, 1896, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86ae70023829ULL }, // Inst #21826 = VSUBSDZrrkz_Int |
| 25331 | { 21825, 5, 1, 0, 33, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82ae70023829ULL }, // Inst #21825 = VSUBSDZrrk_Int |
| 25332 | { 21824, 5, 1, 0, 1896, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x196ae70023829ULL }, // Inst #21824 = VSUBSDZrrbkz_Int |
| 25333 | { 21823, 6, 1, 0, 33, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x192ae70023829ULL }, // Inst #21823 = VSUBSDZrrbk_Int |
| 25334 | { 21822, 4, 1, 0, 33, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x190ae70023829ULL }, // Inst #21822 = VSUBSDZrrb_Int |
| 25335 | { 21821, 3, 1, 0, 33, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ae70023829ULL }, // Inst #21821 = VSUBSDZrr_Int |
| 25336 | { 21820, 3, 1, 0, 33, 1, 0, 1982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ae70023829ULL }, // Inst #21820 = VSUBSDZrr |
| 25337 | { 21819, 8, 1, 0, 32, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86ae70023819ULL }, // Inst #21819 = VSUBSDZrmkz_Int |
| 25338 | { 21818, 9, 1, 0, 32, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82ae70023819ULL }, // Inst #21818 = VSUBSDZrmk_Int |
| 25339 | { 21817, 7, 1, 0, 32, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ae70023819ULL }, // Inst #21817 = VSUBSDZrm_Int |
| 25340 | { 21816, 7, 1, 0, 32, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ae70023819ULL }, // Inst #21816 = VSUBSDZrm |
| 25341 | { 21815, 3, 1, 0, 1697, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae28002029ULL }, // Inst #21815 = VSUBPSrr |
| 25342 | { 21814, 7, 1, 0, 1696, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae28002019ULL }, // Inst #21814 = VSUBPSrm |
| 25343 | { 21813, 4, 1, 0, 1943, 1, 0, 1963, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeae68002029ULL }, // Inst #21813 = VSUBPSZrrkz |
| 25344 | { 21812, 5, 1, 0, 1943, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaae68002029ULL }, // Inst #21812 = VSUBPSZrrk |
| 25345 | { 21811, 5, 1, 0, 1943, 1, 0, 1953, X86ImpOpBase + 78, 0, 0x17eae68002029ULL }, // Inst #21811 = VSUBPSZrrbkz |
| 25346 | { 21810, 6, 1, 0, 1943, 1, 0, 1947, X86ImpOpBase + 78, 0, 0x17aae68002029ULL }, // Inst #21810 = VSUBPSZrrbk |
| 25347 | { 21809, 4, 1, 0, 1899, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x178ae68002029ULL }, // Inst #21809 = VSUBPSZrrb |
| 25348 | { 21808, 3, 1, 0, 1899, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8ae68002029ULL }, // Inst #21808 = VSUBPSZrr |
| 25349 | { 21807, 8, 1, 0, 1941, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeae68002019ULL }, // Inst #21807 = VSUBPSZrmkz |
| 25350 | { 21806, 9, 1, 0, 1941, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaae68002019ULL }, // Inst #21806 = VSUBPSZrmk |
| 25351 | { 21805, 8, 1, 0, 1941, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eae68002019ULL }, // Inst #21805 = VSUBPSZrmbkz |
| 25352 | { 21804, 9, 1, 0, 1941, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aae68002019ULL }, // Inst #21804 = VSUBPSZrmbk |
| 25353 | { 21803, 7, 1, 0, 1941, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78ae68002019ULL }, // Inst #21803 = VSUBPSZrmb |
| 25354 | { 21802, 7, 1, 0, 1941, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ae68002019ULL }, // Inst #21802 = VSUBPSZrm |
| 25355 | { 21801, 4, 1, 0, 1895, 1, 0, 1935, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7ae68002029ULL }, // Inst #21801 = VSUBPSZ256rrkz |
| 25356 | { 21800, 5, 1, 0, 1698, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3ae68002029ULL }, // Inst #21800 = VSUBPSZ256rrk |
| 25357 | { 21799, 3, 1, 0, 1698, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1ae68002029ULL }, // Inst #21799 = VSUBPSZ256rr |
| 25358 | { 21798, 8, 1, 0, 1934, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ae68002019ULL }, // Inst #21798 = VSUBPSZ256rmkz |
| 25359 | { 21797, 9, 1, 0, 1934, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ae68002019ULL }, // Inst #21797 = VSUBPSZ256rmk |
| 25360 | { 21796, 8, 1, 0, 1934, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77ae68002019ULL }, // Inst #21796 = VSUBPSZ256rmbkz |
| 25361 | { 21795, 9, 1, 0, 1934, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73ae68002019ULL }, // Inst #21795 = VSUBPSZ256rmbk |
| 25362 | { 21794, 7, 1, 0, 1934, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71ae68002019ULL }, // Inst #21794 = VSUBPSZ256rmb |
| 25363 | { 21793, 7, 1, 0, 1934, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ae68002019ULL }, // Inst #21793 = VSUBPSZ256rm |
| 25364 | { 21792, 4, 1, 0, 1894, 1, 0, 1909, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6ae68002029ULL }, // Inst #21792 = VSUBPSZ128rrkz |
| 25365 | { 21791, 5, 1, 0, 1697, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2ae68002029ULL }, // Inst #21791 = VSUBPSZ128rrk |
| 25366 | { 21790, 3, 1, 0, 1697, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0ae68002029ULL }, // Inst #21790 = VSUBPSZ128rr |
| 25367 | { 21789, 8, 1, 0, 1696, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ae68002019ULL }, // Inst #21789 = VSUBPSZ128rmkz |
| 25368 | { 21788, 9, 1, 0, 1696, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ae68002019ULL }, // Inst #21788 = VSUBPSZ128rmk |
| 25369 | { 21787, 8, 1, 0, 1696, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76ae68002019ULL }, // Inst #21787 = VSUBPSZ128rmbkz |
| 25370 | { 21786, 9, 1, 0, 1696, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72ae68002019ULL }, // Inst #21786 = VSUBPSZ128rmbk |
| 25371 | { 21785, 7, 1, 0, 1696, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70ae68002019ULL }, // Inst #21785 = VSUBPSZ128rmb |
| 25372 | { 21784, 7, 1, 0, 1696, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ae68002019ULL }, // Inst #21784 = VSUBPSZ128rm |
| 25373 | { 21783, 3, 1, 0, 1698, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1ae28002029ULL }, // Inst #21783 = VSUBPSYrr |
| 25374 | { 21782, 7, 1, 0, 1934, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ae28002019ULL }, // Inst #21782 = VSUBPSYrm |
| 25375 | { 21781, 4, 1, 0, 1926, 1, 0, 1759, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeae68012029ULL }, // Inst #21781 = VSUBPHZrrkz |
| 25376 | { 21780, 5, 1, 0, 1926, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaae68012029ULL }, // Inst #21780 = VSUBPHZrrk |
| 25377 | { 21779, 5, 1, 0, 1926, 1, 0, 1882, X86ImpOpBase + 78, 0, 0x15eae68012029ULL }, // Inst #21779 = VSUBPHZrrbkz |
| 25378 | { 21778, 6, 1, 0, 1926, 1, 0, 1876, X86ImpOpBase + 78, 0, 0x15aae68012029ULL }, // Inst #21778 = VSUBPHZrrbk |
| 25379 | { 21777, 4, 1, 0, 1918, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x158ae68012029ULL }, // Inst #21777 = VSUBPHZrrb |
| 25380 | { 21776, 3, 1, 0, 1918, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8ae68012029ULL }, // Inst #21776 = VSUBPHZrr |
| 25381 | { 21775, 8, 1, 0, 339, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeae68012019ULL }, // Inst #21775 = VSUBPHZrmkz |
| 25382 | { 21774, 9, 1, 0, 339, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaae68012019ULL }, // Inst #21774 = VSUBPHZrmk |
| 25383 | { 21773, 8, 1, 0, 339, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eae68012019ULL }, // Inst #21773 = VSUBPHZrmbkz |
| 25384 | { 21772, 9, 1, 0, 339, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aae68012019ULL }, // Inst #21772 = VSUBPHZrmbk |
| 25385 | { 21771, 7, 1, 0, 339, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58ae68012019ULL }, // Inst #21771 = VSUBPHZrmb |
| 25386 | { 21770, 7, 1, 0, 339, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ae68012019ULL }, // Inst #21770 = VSUBPHZrm |
| 25387 | { 21769, 4, 1, 0, 1903, 1, 0, 1723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7ae68012029ULL }, // Inst #21769 = VSUBPHZ256rrkz |
| 25388 | { 21768, 5, 1, 0, 1903, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3ae68012029ULL }, // Inst #21768 = VSUBPHZ256rrk |
| 25389 | { 21767, 3, 1, 0, 1774, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1ae68012029ULL }, // Inst #21767 = VSUBPHZ256rr |
| 25390 | { 21766, 8, 1, 0, 337, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ae68012019ULL }, // Inst #21766 = VSUBPHZ256rmkz |
| 25391 | { 21765, 9, 1, 0, 337, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ae68012019ULL }, // Inst #21765 = VSUBPHZ256rmk |
| 25392 | { 21764, 8, 1, 0, 337, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57ae68012019ULL }, // Inst #21764 = VSUBPHZ256rmbkz |
| 25393 | { 21763, 9, 1, 0, 337, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53ae68012019ULL }, // Inst #21763 = VSUBPHZ256rmbk |
| 25394 | { 21762, 7, 1, 0, 337, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51ae68012019ULL }, // Inst #21762 = VSUBPHZ256rmb |
| 25395 | { 21761, 7, 1, 0, 337, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ae68012019ULL }, // Inst #21761 = VSUBPHZ256rm |
| 25396 | { 21760, 4, 1, 0, 1902, 1, 0, 1687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6ae68012029ULL }, // Inst #21760 = VSUBPHZ128rrkz |
| 25397 | { 21759, 5, 1, 0, 1902, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2ae68012029ULL }, // Inst #21759 = VSUBPHZ128rrk |
| 25398 | { 21758, 3, 1, 0, 1773, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0ae68012029ULL }, // Inst #21758 = VSUBPHZ128rr |
| 25399 | { 21757, 8, 1, 0, 1757, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ae68012019ULL }, // Inst #21757 = VSUBPHZ128rmkz |
| 25400 | { 21756, 9, 1, 0, 1757, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ae68012019ULL }, // Inst #21756 = VSUBPHZ128rmk |
| 25401 | { 21755, 8, 1, 0, 1757, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56ae68012019ULL }, // Inst #21755 = VSUBPHZ128rmbkz |
| 25402 | { 21754, 9, 1, 0, 1757, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52ae68012019ULL }, // Inst #21754 = VSUBPHZ128rmbk |
| 25403 | { 21753, 7, 1, 0, 1757, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50ae68012019ULL }, // Inst #21753 = VSUBPHZ128rmb |
| 25404 | { 21752, 7, 1, 0, 1757, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ae68012019ULL }, // Inst #21752 = VSUBPHZ128rm |
| 25405 | { 21751, 3, 1, 0, 28, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae30002829ULL }, // Inst #21751 = VSUBPDrr |
| 25406 | { 21750, 7, 1, 0, 27, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae30002819ULL }, // Inst #21750 = VSUBPDrm |
| 25407 | { 21749, 4, 1, 0, 344, 1, 0, 1862, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeae70022829ULL }, // Inst #21749 = VSUBPDZrrkz |
| 25408 | { 21748, 5, 1, 0, 344, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaae70022829ULL }, // Inst #21748 = VSUBPDZrrk |
| 25409 | { 21747, 5, 1, 0, 344, 1, 0, 1852, X86ImpOpBase + 78, 0, 0x19eae70022829ULL }, // Inst #21747 = VSUBPDZrrbkz |
| 25410 | { 21746, 6, 1, 0, 344, 1, 0, 1846, X86ImpOpBase + 78, 0, 0x19aae70022829ULL }, // Inst #21746 = VSUBPDZrrbk |
| 25411 | { 21745, 4, 1, 0, 1898, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x198ae70022829ULL }, // Inst #21745 = VSUBPDZrrb |
| 25412 | { 21744, 3, 1, 0, 1898, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8ae70022829ULL }, // Inst #21744 = VSUBPDZrr |
| 25413 | { 21743, 8, 1, 0, 343, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeae70022819ULL }, // Inst #21743 = VSUBPDZrmkz |
| 25414 | { 21742, 9, 1, 0, 343, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaae70022819ULL }, // Inst #21742 = VSUBPDZrmk |
| 25415 | { 21741, 8, 1, 0, 343, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eae70022819ULL }, // Inst #21741 = VSUBPDZrmbkz |
| 25416 | { 21740, 9, 1, 0, 343, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aae70022819ULL }, // Inst #21740 = VSUBPDZrmbk |
| 25417 | { 21739, 7, 1, 0, 343, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98ae70022819ULL }, // Inst #21739 = VSUBPDZrmb |
| 25418 | { 21738, 7, 1, 0, 343, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ae70022819ULL }, // Inst #21738 = VSUBPDZrm |
| 25419 | { 21737, 4, 1, 0, 1893, 1, 0, 1821, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7ae70022829ULL }, // Inst #21737 = VSUBPDZ256rrkz |
| 25420 | { 21736, 5, 1, 0, 342, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3ae70022829ULL }, // Inst #21736 = VSUBPDZ256rrk |
| 25421 | { 21735, 3, 1, 0, 342, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1ae70022829ULL }, // Inst #21735 = VSUBPDZ256rr |
| 25422 | { 21734, 8, 1, 0, 341, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ae70022819ULL }, // Inst #21734 = VSUBPDZ256rmkz |
| 25423 | { 21733, 9, 1, 0, 341, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ae70022819ULL }, // Inst #21733 = VSUBPDZ256rmk |
| 25424 | { 21732, 8, 1, 0, 341, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97ae70022819ULL }, // Inst #21732 = VSUBPDZ256rmbkz |
| 25425 | { 21731, 9, 1, 0, 341, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93ae70022819ULL }, // Inst #21731 = VSUBPDZ256rmbk |
| 25426 | { 21730, 7, 1, 0, 341, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91ae70022819ULL }, // Inst #21730 = VSUBPDZ256rmb |
| 25427 | { 21729, 7, 1, 0, 341, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ae70022819ULL }, // Inst #21729 = VSUBPDZ256rm |
| 25428 | { 21728, 4, 1, 0, 1892, 1, 0, 1795, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6ae70022829ULL }, // Inst #21728 = VSUBPDZ128rrkz |
| 25429 | { 21727, 5, 1, 0, 28, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2ae70022829ULL }, // Inst #21727 = VSUBPDZ128rrk |
| 25430 | { 21726, 3, 1, 0, 28, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0ae70022829ULL }, // Inst #21726 = VSUBPDZ128rr |
| 25431 | { 21725, 8, 1, 0, 27, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ae70022819ULL }, // Inst #21725 = VSUBPDZ128rmkz |
| 25432 | { 21724, 9, 1, 0, 27, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ae70022819ULL }, // Inst #21724 = VSUBPDZ128rmk |
| 25433 | { 21723, 8, 1, 0, 27, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96ae70022819ULL }, // Inst #21723 = VSUBPDZ128rmbkz |
| 25434 | { 21722, 9, 1, 0, 27, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92ae70022819ULL }, // Inst #21722 = VSUBPDZ128rmbk |
| 25435 | { 21721, 7, 1, 0, 27, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90ae70022819ULL }, // Inst #21721 = VSUBPDZ128rmb |
| 25436 | { 21720, 7, 1, 0, 27, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ae70022819ULL }, // Inst #21720 = VSUBPDZ128rm |
| 25437 | { 21719, 3, 1, 0, 342, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1ae30002829ULL }, // Inst #21719 = VSUBPDYrr |
| 25438 | { 21718, 7, 1, 0, 341, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ae30002819ULL }, // Inst #21718 = VSUBPDYrm |
| 25439 | { 21717, 4, 1, 0, 340, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeeae68012829ULL }, // Inst #21717 = VSUBBF16Zrrkz |
| 25440 | { 21716, 5, 1, 0, 340, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeaae68012829ULL }, // Inst #21716 = VSUBBF16Zrrk |
| 25441 | { 21715, 3, 1, 0, 340, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8ae68012829ULL }, // Inst #21715 = VSUBBF16Zrr |
| 25442 | { 21714, 8, 1, 0, 339, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeae68012819ULL }, // Inst #21714 = VSUBBF16Zrmkz |
| 25443 | { 21713, 9, 1, 0, 339, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaae68012819ULL }, // Inst #21713 = VSUBBF16Zrmk |
| 25444 | { 21712, 8, 1, 0, 339, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5eae68012819ULL }, // Inst #21712 = VSUBBF16Zrmbkz |
| 25445 | { 21711, 9, 1, 0, 339, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5aae68012819ULL }, // Inst #21711 = VSUBBF16Zrmbk |
| 25446 | { 21710, 7, 1, 0, 339, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58ae68012819ULL }, // Inst #21710 = VSUBBF16Zrmb |
| 25447 | { 21709, 7, 1, 0, 339, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ae68012819ULL }, // Inst #21709 = VSUBBF16Zrm |
| 25448 | { 21708, 4, 1, 0, 338, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7ae68012829ULL }, // Inst #21708 = VSUBBF16Z256rrkz |
| 25449 | { 21707, 5, 1, 0, 338, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3ae68012829ULL }, // Inst #21707 = VSUBBF16Z256rrk |
| 25450 | { 21706, 3, 1, 0, 338, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1ae68012829ULL }, // Inst #21706 = VSUBBF16Z256rr |
| 25451 | { 21705, 8, 1, 0, 337, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ae68012819ULL }, // Inst #21705 = VSUBBF16Z256rmkz |
| 25452 | { 21704, 9, 1, 0, 337, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ae68012819ULL }, // Inst #21704 = VSUBBF16Z256rmk |
| 25453 | { 21703, 8, 1, 0, 337, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x57ae68012819ULL }, // Inst #21703 = VSUBBF16Z256rmbkz |
| 25454 | { 21702, 9, 1, 0, 337, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53ae68012819ULL }, // Inst #21702 = VSUBBF16Z256rmbk |
| 25455 | { 21701, 7, 1, 0, 337, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51ae68012819ULL }, // Inst #21701 = VSUBBF16Z256rmb |
| 25456 | { 21700, 7, 1, 0, 337, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ae68012819ULL }, // Inst #21700 = VSUBBF16Z256rm |
| 25457 | { 21699, 4, 1, 0, 30, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6ae68012829ULL }, // Inst #21699 = VSUBBF16Z128rrkz |
| 25458 | { 21698, 5, 1, 0, 30, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2ae68012829ULL }, // Inst #21698 = VSUBBF16Z128rrk |
| 25459 | { 21697, 3, 1, 0, 30, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ae68012829ULL }, // Inst #21697 = VSUBBF16Z128rr |
| 25460 | { 21696, 8, 1, 0, 29, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ae68012819ULL }, // Inst #21696 = VSUBBF16Z128rmkz |
| 25461 | { 21695, 9, 1, 0, 29, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ae68012819ULL }, // Inst #21695 = VSUBBF16Z128rmk |
| 25462 | { 21694, 8, 1, 0, 29, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x56ae68012819ULL }, // Inst #21694 = VSUBBF16Z128rmbkz |
| 25463 | { 21693, 9, 1, 0, 29, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52ae68012819ULL }, // Inst #21693 = VSUBBF16Z128rmbk |
| 25464 | { 21692, 7, 1, 0, 29, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50ae68012819ULL }, // Inst #21692 = VSUBBF16Z128rmb |
| 25465 | { 21691, 7, 1, 0, 29, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ae68012819ULL }, // Inst #21691 = VSUBBF16Z128rm |
| 25466 | { 21690, 5, 0, 0, 332, 1, 0, 232, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5728002023ULL }, // Inst #21690 = VSTMXCSR |
| 25467 | { 21689, 3, 1, 0, 330, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa8a8003029ULL }, // Inst #21689 = VSQRTSSr_Int |
| 25468 | { 21688, 3, 1, 0, 330, 1, 0, 2046, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa8a8003029ULL }, // Inst #21688 = VSQRTSSr |
| 25469 | { 21687, 7, 1, 0, 329, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8a8003019ULL }, // Inst #21687 = VSQRTSSm_Int |
| 25470 | { 21686, 7, 1, 0, 329, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8a8003019ULL }, // Inst #21686 = VSQRTSSm |
| 25471 | { 21685, 4, 1, 0, 330, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66a8e8003029ULL }, // Inst #21685 = VSQRTSSZrkz_Int |
| 25472 | { 21684, 5, 1, 0, 330, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62a8e8003029ULL }, // Inst #21684 = VSQRTSSZrk_Int |
| 25473 | { 21683, 5, 1, 0, 330, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x176a8e8003029ULL }, // Inst #21683 = VSQRTSSZrbkz_Int |
| 25474 | { 21682, 6, 1, 0, 330, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x172a8e8003029ULL }, // Inst #21682 = VSQRTSSZrbk_Int |
| 25475 | { 21681, 4, 1, 0, 330, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x170a8e8003029ULL }, // Inst #21681 = VSQRTSSZrb_Int |
| 25476 | { 21680, 3, 1, 0, 330, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8003029ULL }, // Inst #21680 = VSQRTSSZr_Int |
| 25477 | { 21679, 3, 1, 0, 330, 1, 0, 2036, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8003029ULL }, // Inst #21679 = VSQRTSSZr |
| 25478 | { 21678, 8, 1, 0, 329, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66a8e8003019ULL }, // Inst #21678 = VSQRTSSZmkz_Int |
| 25479 | { 21677, 9, 1, 0, 329, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62a8e8003019ULL }, // Inst #21677 = VSQRTSSZmk_Int |
| 25480 | { 21676, 7, 1, 0, 329, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8003019ULL }, // Inst #21676 = VSQRTSSZm_Int |
| 25481 | { 21675, 7, 1, 0, 329, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8003019ULL }, // Inst #21675 = VSQRTSSZm |
| 25482 | { 21674, 4, 1, 0, 330, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x46a8e8013029ULL }, // Inst #21674 = VSQRTSHZrkz_Int |
| 25483 | { 21673, 5, 1, 0, 330, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x42a8e8013029ULL }, // Inst #21673 = VSQRTSHZrk_Int |
| 25484 | { 21672, 5, 1, 0, 330, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x156a8e8013029ULL }, // Inst #21672 = VSQRTSHZrbkz_Int |
| 25485 | { 21671, 6, 1, 0, 330, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x152a8e8013029ULL }, // Inst #21671 = VSQRTSHZrbk_Int |
| 25486 | { 21670, 4, 1, 0, 330, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x150a8e8013029ULL }, // Inst #21670 = VSQRTSHZrb_Int |
| 25487 | { 21669, 3, 1, 0, 2193, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40a8e8013029ULL }, // Inst #21669 = VSQRTSHZr_Int |
| 25488 | { 21668, 3, 1, 0, 330, 1, 0, 2026, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40a8e8013029ULL }, // Inst #21668 = VSQRTSHZr |
| 25489 | { 21667, 8, 1, 0, 1749, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46a8e8013019ULL }, // Inst #21667 = VSQRTSHZmkz_Int |
| 25490 | { 21666, 9, 1, 0, 1749, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42a8e8013019ULL }, // Inst #21666 = VSQRTSHZmk_Int |
| 25491 | { 21665, 7, 1, 0, 1749, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40a8e8013019ULL }, // Inst #21665 = VSQRTSHZm_Int |
| 25492 | { 21664, 7, 1, 0, 1750, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40a8e8013019ULL }, // Inst #21664 = VSQRTSHZm |
| 25493 | { 21663, 3, 1, 0, 327, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa8b0003829ULL }, // Inst #21663 = VSQRTSDr_Int |
| 25494 | { 21662, 3, 1, 0, 327, 1, 0, 2016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa8b0003829ULL }, // Inst #21662 = VSQRTSDr |
| 25495 | { 21661, 7, 1, 0, 1628, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8b0003819ULL }, // Inst #21661 = VSQRTSDm_Int |
| 25496 | { 21660, 7, 1, 0, 326, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8b0003819ULL }, // Inst #21660 = VSQRTSDm |
| 25497 | { 21659, 4, 1, 0, 327, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86a8f0023829ULL }, // Inst #21659 = VSQRTSDZrkz_Int |
| 25498 | { 21658, 5, 1, 0, 327, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82a8f0023829ULL }, // Inst #21658 = VSQRTSDZrk_Int |
| 25499 | { 21657, 5, 1, 0, 327, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x196a8f0023829ULL }, // Inst #21657 = VSQRTSDZrbkz_Int |
| 25500 | { 21656, 6, 1, 0, 327, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x192a8f0023829ULL }, // Inst #21656 = VSQRTSDZrbk_Int |
| 25501 | { 21655, 4, 1, 0, 327, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x190a8f0023829ULL }, // Inst #21655 = VSQRTSDZrb_Int |
| 25502 | { 21654, 3, 1, 0, 327, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0023829ULL }, // Inst #21654 = VSQRTSDZr_Int |
| 25503 | { 21653, 3, 1, 0, 327, 1, 0, 1982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0023829ULL }, // Inst #21653 = VSQRTSDZr |
| 25504 | { 21652, 8, 1, 0, 2428, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86a8f0023819ULL }, // Inst #21652 = VSQRTSDZmkz_Int |
| 25505 | { 21651, 9, 1, 0, 2428, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82a8f0023819ULL }, // Inst #21651 = VSQRTSDZmk_Int |
| 25506 | { 21650, 7, 1, 0, 1891, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0023819ULL }, // Inst #21650 = VSQRTSDZm_Int |
| 25507 | { 21649, 7, 1, 0, 326, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0023819ULL }, // Inst #21649 = VSQRTSDZm |
| 25508 | { 21648, 2, 1, 0, 324, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x28a8002029ULL }, // Inst #21648 = VSQRTPSr |
| 25509 | { 21647, 6, 1, 0, 323, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x28a8002019ULL }, // Inst #21647 = VSQRTPSm |
| 25510 | { 21646, 3, 1, 0, 588, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee28e8002029ULL }, // Inst #21646 = VSQRTPSZrkz |
| 25511 | { 21645, 4, 1, 0, 588, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea28e8002029ULL }, // Inst #21645 = VSQRTPSZrk |
| 25512 | { 21644, 4, 1, 0, 588, 1, 0, 3126, X86ImpOpBase + 78, 0, 0x17e28e8002029ULL }, // Inst #21644 = VSQRTPSZrbkz |
| 25513 | { 21643, 5, 1, 0, 588, 1, 0, 3121, X86ImpOpBase + 78, 0, 0x17a28e8002029ULL }, // Inst #21643 = VSQRTPSZrbk |
| 25514 | { 21642, 3, 1, 0, 588, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x17828e8002029ULL }, // Inst #21642 = VSQRTPSZrb |
| 25515 | { 21641, 2, 1, 0, 2443, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe828e8002029ULL }, // Inst #21641 = VSQRTPSZr |
| 25516 | { 21640, 7, 1, 0, 587, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee28e8002019ULL }, // Inst #21640 = VSQRTPSZmkz |
| 25517 | { 21639, 8, 1, 0, 587, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea28e8002019ULL }, // Inst #21639 = VSQRTPSZmk |
| 25518 | { 21638, 7, 1, 0, 587, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e28e8002019ULL }, // Inst #21638 = VSQRTPSZmbkz |
| 25519 | { 21637, 8, 1, 0, 587, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a28e8002019ULL }, // Inst #21637 = VSQRTPSZmbk |
| 25520 | { 21636, 6, 1, 0, 587, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7828e8002019ULL }, // Inst #21636 = VSQRTPSZmb |
| 25521 | { 21635, 6, 1, 0, 587, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe828e8002019ULL }, // Inst #21635 = VSQRTPSZm |
| 25522 | { 21634, 3, 1, 0, 586, 1, 0, 2829, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc728e8002029ULL }, // Inst #21634 = VSQRTPSZ256rkz |
| 25523 | { 21633, 4, 1, 0, 586, 1, 0, 2825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc328e8002029ULL }, // Inst #21633 = VSQRTPSZ256rk |
| 25524 | { 21632, 2, 1, 0, 586, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc128e8002029ULL }, // Inst #21632 = VSQRTPSZ256r |
| 25525 | { 21631, 7, 1, 0, 585, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc728e8002019ULL }, // Inst #21631 = VSQRTPSZ256mkz |
| 25526 | { 21630, 8, 1, 0, 585, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc328e8002019ULL }, // Inst #21630 = VSQRTPSZ256mk |
| 25527 | { 21629, 7, 1, 0, 585, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7728e8002019ULL }, // Inst #21629 = VSQRTPSZ256mbkz |
| 25528 | { 21628, 8, 1, 0, 585, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7328e8002019ULL }, // Inst #21628 = VSQRTPSZ256mbk |
| 25529 | { 21627, 6, 1, 0, 585, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7128e8002019ULL }, // Inst #21627 = VSQRTPSZ256mb |
| 25530 | { 21626, 6, 1, 0, 585, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc128e8002019ULL }, // Inst #21626 = VSQRTPSZ256m |
| 25531 | { 21625, 3, 1, 0, 324, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa628e8002029ULL }, // Inst #21625 = VSQRTPSZ128rkz |
| 25532 | { 21624, 4, 1, 0, 324, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa228e8002029ULL }, // Inst #21624 = VSQRTPSZ128rk |
| 25533 | { 21623, 2, 1, 0, 324, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa028e8002029ULL }, // Inst #21623 = VSQRTPSZ128r |
| 25534 | { 21622, 7, 1, 0, 584, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa628e8002019ULL }, // Inst #21622 = VSQRTPSZ128mkz |
| 25535 | { 21621, 8, 1, 0, 584, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa228e8002019ULL }, // Inst #21621 = VSQRTPSZ128mk |
| 25536 | { 21620, 7, 1, 0, 584, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7628e8002019ULL }, // Inst #21620 = VSQRTPSZ128mbkz |
| 25537 | { 21619, 8, 1, 0, 584, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7228e8002019ULL }, // Inst #21619 = VSQRTPSZ128mbk |
| 25538 | { 21618, 6, 1, 0, 584, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7028e8002019ULL }, // Inst #21618 = VSQRTPSZ128mb |
| 25539 | { 21617, 6, 1, 0, 584, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa028e8002019ULL }, // Inst #21617 = VSQRTPSZ128m |
| 25540 | { 21616, 2, 1, 0, 586, 1, 0, 3116, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x128a8002029ULL }, // Inst #21616 = VSQRTPSYr |
| 25541 | { 21615, 6, 1, 0, 595, 1, 0, 2253, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x128a8002019ULL }, // Inst #21615 = VSQRTPSYm |
| 25542 | { 21614, 3, 1, 0, 2442, 1, 0, 2987, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee28e8012029ULL }, // Inst #21614 = VSQRTPHZrkz |
| 25543 | { 21613, 4, 1, 0, 2442, 1, 0, 2983, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea28e8012029ULL }, // Inst #21613 = VSQRTPHZrk |
| 25544 | { 21612, 4, 1, 0, 2442, 1, 0, 3267, X86ImpOpBase + 78, 0, 0x15e28e8012029ULL }, // Inst #21612 = VSQRTPHZrbkz |
| 25545 | { 21611, 5, 1, 0, 2442, 1, 0, 3262, X86ImpOpBase + 78, 0, 0x15a28e8012029ULL }, // Inst #21611 = VSQRTPHZrbk |
| 25546 | { 21610, 3, 1, 0, 2441, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x15828e8012029ULL }, // Inst #21610 = VSQRTPHZrb |
| 25547 | { 21609, 2, 1, 0, 2441, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe828e8012029ULL }, // Inst #21609 = VSQRTPHZr |
| 25548 | { 21608, 7, 1, 0, 2440, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee28e8012019ULL }, // Inst #21608 = VSQRTPHZmkz |
| 25549 | { 21607, 8, 1, 0, 2440, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea28e8012019ULL }, // Inst #21607 = VSQRTPHZmk |
| 25550 | { 21606, 7, 1, 0, 2440, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e28e8012019ULL }, // Inst #21606 = VSQRTPHZmbkz |
| 25551 | { 21605, 8, 1, 0, 2440, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a28e8012019ULL }, // Inst #21605 = VSQRTPHZmbk |
| 25552 | { 21604, 6, 1, 0, 2439, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5828e8012019ULL }, // Inst #21604 = VSQRTPHZmb |
| 25553 | { 21603, 6, 1, 0, 2439, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe828e8012019ULL }, // Inst #21603 = VSQRTPHZm |
| 25554 | { 21602, 3, 1, 0, 2435, 1, 0, 2965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc728e8012029ULL }, // Inst #21602 = VSQRTPHZ256rkz |
| 25555 | { 21601, 4, 1, 0, 2434, 1, 0, 2961, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc328e8012029ULL }, // Inst #21601 = VSQRTPHZ256rk |
| 25556 | { 21600, 2, 1, 0, 2179, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc128e8012029ULL }, // Inst #21600 = VSQRTPHZ256r |
| 25557 | { 21599, 7, 1, 0, 2438, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc728e8012019ULL }, // Inst #21599 = VSQRTPHZ256mkz |
| 25558 | { 21598, 8, 1, 0, 2438, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc328e8012019ULL }, // Inst #21598 = VSQRTPHZ256mk |
| 25559 | { 21597, 7, 1, 0, 2438, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5728e8012019ULL }, // Inst #21597 = VSQRTPHZ256mbkz |
| 25560 | { 21596, 8, 1, 0, 2438, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5328e8012019ULL }, // Inst #21596 = VSQRTPHZ256mbk |
| 25561 | { 21595, 6, 1, 0, 2437, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5128e8012019ULL }, // Inst #21595 = VSQRTPHZ256mb |
| 25562 | { 21594, 6, 1, 0, 2437, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc128e8012019ULL }, // Inst #21594 = VSQRTPHZ256m |
| 25563 | { 21593, 3, 1, 0, 2436, 1, 0, 2943, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa628e8012029ULL }, // Inst #21593 = VSQRTPHZ128rkz |
| 25564 | { 21592, 4, 1, 0, 2433, 1, 0, 2939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa228e8012029ULL }, // Inst #21592 = VSQRTPHZ128rk |
| 25565 | { 21591, 2, 1, 0, 2178, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa028e8012029ULL }, // Inst #21591 = VSQRTPHZ128r |
| 25566 | { 21590, 7, 1, 0, 2432, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa628e8012019ULL }, // Inst #21590 = VSQRTPHZ128mkz |
| 25567 | { 21589, 8, 1, 0, 2432, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa228e8012019ULL }, // Inst #21589 = VSQRTPHZ128mk |
| 25568 | { 21588, 7, 1, 0, 2432, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5628e8012019ULL }, // Inst #21588 = VSQRTPHZ128mbkz |
| 25569 | { 21587, 8, 1, 0, 2432, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5228e8012019ULL }, // Inst #21587 = VSQRTPHZ128mbk |
| 25570 | { 21586, 6, 1, 0, 2183, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5028e8012019ULL }, // Inst #21586 = VSQRTPHZ128mb |
| 25571 | { 21585, 6, 1, 0, 2183, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa028e8012019ULL }, // Inst #21585 = VSQRTPHZ128m |
| 25572 | { 21584, 2, 1, 0, 322, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x28b0002829ULL }, // Inst #21584 = VSQRTPDr |
| 25573 | { 21583, 6, 1, 0, 321, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x28b0002819ULL }, // Inst #21583 = VSQRTPDm |
| 25574 | { 21582, 3, 1, 0, 594, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee28f0022829ULL }, // Inst #21582 = VSQRTPDZrkz |
| 25575 | { 21581, 4, 1, 0, 594, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea28f0022829ULL }, // Inst #21581 = VSQRTPDZrk |
| 25576 | { 21580, 4, 1, 0, 594, 1, 0, 3195, X86ImpOpBase + 78, 0, 0x19e28f0022829ULL }, // Inst #21580 = VSQRTPDZrbkz |
| 25577 | { 21579, 5, 1, 0, 594, 1, 0, 3190, X86ImpOpBase + 78, 0, 0x19a28f0022829ULL }, // Inst #21579 = VSQRTPDZrbk |
| 25578 | { 21578, 3, 1, 0, 594, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x19828f0022829ULL }, // Inst #21578 = VSQRTPDZrb |
| 25579 | { 21577, 2, 1, 0, 2431, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe828f0022829ULL }, // Inst #21577 = VSQRTPDZr |
| 25580 | { 21576, 7, 1, 0, 593, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee28f0022819ULL }, // Inst #21576 = VSQRTPDZmkz |
| 25581 | { 21575, 8, 1, 0, 593, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea28f0022819ULL }, // Inst #21575 = VSQRTPDZmk |
| 25582 | { 21574, 7, 1, 0, 593, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e28f0022819ULL }, // Inst #21574 = VSQRTPDZmbkz |
| 25583 | { 21573, 8, 1, 0, 593, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a28f0022819ULL }, // Inst #21573 = VSQRTPDZmbk |
| 25584 | { 21572, 6, 1, 0, 2430, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9828f0022819ULL }, // Inst #21572 = VSQRTPDZmb |
| 25585 | { 21571, 6, 1, 0, 2429, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe828f0022819ULL }, // Inst #21571 = VSQRTPDZm |
| 25586 | { 21570, 3, 1, 0, 590, 1, 0, 2786, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc728f0022829ULL }, // Inst #21570 = VSQRTPDZ256rkz |
| 25587 | { 21569, 4, 1, 0, 590, 1, 0, 2782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc328f0022829ULL }, // Inst #21569 = VSQRTPDZ256rk |
| 25588 | { 21568, 2, 1, 0, 590, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc128f0022829ULL }, // Inst #21568 = VSQRTPDZ256r |
| 25589 | { 21567, 7, 1, 0, 592, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc728f0022819ULL }, // Inst #21567 = VSQRTPDZ256mkz |
| 25590 | { 21566, 8, 1, 0, 592, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc328f0022819ULL }, // Inst #21566 = VSQRTPDZ256mk |
| 25591 | { 21565, 7, 1, 0, 592, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9728f0022819ULL }, // Inst #21565 = VSQRTPDZ256mbkz |
| 25592 | { 21564, 8, 1, 0, 592, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9328f0022819ULL }, // Inst #21564 = VSQRTPDZ256mbk |
| 25593 | { 21563, 6, 1, 0, 2426, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9128f0022819ULL }, // Inst #21563 = VSQRTPDZ256mb |
| 25594 | { 21562, 6, 1, 0, 2426, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc128f0022819ULL }, // Inst #21562 = VSQRTPDZ256m |
| 25595 | { 21561, 3, 1, 0, 322, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa628f0022829ULL }, // Inst #21561 = VSQRTPDZ128rkz |
| 25596 | { 21560, 4, 1, 0, 322, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa228f0022829ULL }, // Inst #21560 = VSQRTPDZ128rk |
| 25597 | { 21559, 2, 1, 0, 322, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa028f0022829ULL }, // Inst #21559 = VSQRTPDZ128r |
| 25598 | { 21558, 7, 1, 0, 2427, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa628f0022819ULL }, // Inst #21558 = VSQRTPDZ128mkz |
| 25599 | { 21557, 8, 1, 0, 2427, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa228f0022819ULL }, // Inst #21557 = VSQRTPDZ128mk |
| 25600 | { 21556, 7, 1, 0, 2427, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9628f0022819ULL }, // Inst #21556 = VSQRTPDZ128mbkz |
| 25601 | { 21555, 8, 1, 0, 2427, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9228f0022819ULL }, // Inst #21555 = VSQRTPDZ128mbk |
| 25602 | { 21554, 6, 1, 0, 591, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9028f0022819ULL }, // Inst #21554 = VSQRTPDZ128mb |
| 25603 | { 21553, 6, 1, 0, 591, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa028f0022819ULL }, // Inst #21553 = VSQRTPDZ128m |
| 25604 | { 21552, 2, 1, 0, 590, 1, 0, 3116, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x128b0002829ULL }, // Inst #21552 = VSQRTPDYr |
| 25605 | { 21551, 6, 1, 0, 2425, 1, 0, 2253, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x128b0002819ULL }, // Inst #21551 = VSQRTPDYm |
| 25606 | { 21550, 3, 1, 0, 588, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee28e8012829ULL }, // Inst #21550 = VSQRTBF16Zrkz |
| 25607 | { 21549, 4, 1, 0, 588, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea28e8012829ULL }, // Inst #21549 = VSQRTBF16Zrk |
| 25608 | { 21548, 2, 1, 0, 588, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe828e8012829ULL }, // Inst #21548 = VSQRTBF16Zr |
| 25609 | { 21547, 7, 1, 0, 587, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee28e8012819ULL }, // Inst #21547 = VSQRTBF16Zmkz |
| 25610 | { 21546, 8, 1, 0, 587, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea28e8012819ULL }, // Inst #21546 = VSQRTBF16Zmk |
| 25611 | { 21545, 7, 1, 0, 587, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e28e8012819ULL }, // Inst #21545 = VSQRTBF16Zmbkz |
| 25612 | { 21544, 8, 1, 0, 587, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a28e8012819ULL }, // Inst #21544 = VSQRTBF16Zmbk |
| 25613 | { 21543, 6, 1, 0, 587, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5828e8012819ULL }, // Inst #21543 = VSQRTBF16Zmb |
| 25614 | { 21542, 6, 1, 0, 587, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe828e8012819ULL }, // Inst #21542 = VSQRTBF16Zm |
| 25615 | { 21541, 3, 1, 0, 586, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc728e8012829ULL }, // Inst #21541 = VSQRTBF16Z256rkz |
| 25616 | { 21540, 4, 1, 0, 586, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc328e8012829ULL }, // Inst #21540 = VSQRTBF16Z256rk |
| 25617 | { 21539, 2, 1, 0, 586, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc128e8012829ULL }, // Inst #21539 = VSQRTBF16Z256r |
| 25618 | { 21538, 7, 1, 0, 585, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc728e8012819ULL }, // Inst #21538 = VSQRTBF16Z256mkz |
| 25619 | { 21537, 8, 1, 0, 585, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc328e8012819ULL }, // Inst #21537 = VSQRTBF16Z256mk |
| 25620 | { 21536, 7, 1, 0, 585, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5728e8012819ULL }, // Inst #21536 = VSQRTBF16Z256mbkz |
| 25621 | { 21535, 8, 1, 0, 585, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5328e8012819ULL }, // Inst #21535 = VSQRTBF16Z256mbk |
| 25622 | { 21534, 6, 1, 0, 585, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5128e8012819ULL }, // Inst #21534 = VSQRTBF16Z256mb |
| 25623 | { 21533, 6, 1, 0, 585, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc128e8012819ULL }, // Inst #21533 = VSQRTBF16Z256m |
| 25624 | { 21532, 3, 1, 0, 324, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa628e8012829ULL }, // Inst #21532 = VSQRTBF16Z128rkz |
| 25625 | { 21531, 4, 1, 0, 324, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa228e8012829ULL }, // Inst #21531 = VSQRTBF16Z128rk |
| 25626 | { 21530, 2, 1, 0, 324, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa028e8012829ULL }, // Inst #21530 = VSQRTBF16Z128r |
| 25627 | { 21529, 7, 1, 0, 584, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa628e8012819ULL }, // Inst #21529 = VSQRTBF16Z128mkz |
| 25628 | { 21528, 8, 1, 0, 584, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa228e8012819ULL }, // Inst #21528 = VSQRTBF16Z128mk |
| 25629 | { 21527, 7, 1, 0, 584, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5628e8012819ULL }, // Inst #21527 = VSQRTBF16Z128mbkz |
| 25630 | { 21526, 8, 1, 0, 584, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5228e8012819ULL }, // Inst #21526 = VSQRTBF16Z128mbk |
| 25631 | { 21525, 6, 1, 0, 584, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5028e8012819ULL }, // Inst #21525 = VSQRTBF16Z128mb |
| 25632 | { 21524, 6, 1, 0, 584, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa028e8012819ULL }, // Inst #21524 = VSQRTBF16Z128m |
| 25633 | { 21523, 3, 1, 0, 211, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xed20005829ULL }, // Inst #21523 = VSM4RNDS4rr |
| 25634 | { 21522, 7, 1, 0, 211, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xed20005819ULL }, // Inst #21522 = VSM4RNDS4rm |
| 25635 | { 21521, 3, 1, 0, 211, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8ed60005829ULL }, // Inst #21521 = VSM4RNDS4Zrr |
| 25636 | { 21520, 7, 1, 0, 211, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ed60005819ULL }, // Inst #21520 = VSM4RNDS4Zrm |
| 25637 | { 21519, 3, 1, 0, 211, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1ed60005829ULL }, // Inst #21519 = VSM4RNDS4Z256rr |
| 25638 | { 21518, 7, 1, 0, 211, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ed60005819ULL }, // Inst #21518 = VSM4RNDS4Z256rm |
| 25639 | { 21517, 3, 1, 0, 211, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ed60005829ULL }, // Inst #21517 = VSM4RNDS4Z128rr |
| 25640 | { 21516, 7, 1, 0, 211, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ed60005819ULL }, // Inst #21516 = VSM4RNDS4Z128rm |
| 25641 | { 21515, 3, 1, 0, 211, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1ed20005829ULL }, // Inst #21515 = VSM4RNDS4Yrr |
| 25642 | { 21514, 7, 1, 0, 211, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ed20005819ULL }, // Inst #21514 = VSM4RNDS4Yrm |
| 25643 | { 21513, 3, 1, 0, 211, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xed20005029ULL }, // Inst #21513 = VSM4KEY4rr |
| 25644 | { 21512, 7, 1, 0, 211, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xed20005019ULL }, // Inst #21512 = VSM4KEY4rm |
| 25645 | { 21511, 3, 1, 0, 211, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8ed60005029ULL }, // Inst #21511 = VSM4KEY4Zrr |
| 25646 | { 21510, 7, 1, 0, 211, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ed60005019ULL }, // Inst #21510 = VSM4KEY4Zrm |
| 25647 | { 21509, 3, 1, 0, 211, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1ed60005029ULL }, // Inst #21509 = VSM4KEY4Z256rr |
| 25648 | { 21508, 7, 1, 0, 211, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ed60005019ULL }, // Inst #21508 = VSM4KEY4Z256rm |
| 25649 | { 21507, 3, 1, 0, 211, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ed60005029ULL }, // Inst #21507 = VSM4KEY4Z128rr |
| 25650 | { 21506, 7, 1, 0, 211, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ed60005019ULL }, // Inst #21506 = VSM4KEY4Z128rm |
| 25651 | { 21505, 3, 1, 0, 211, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1ed20005029ULL }, // Inst #21505 = VSM4KEY4Yrr |
| 25652 | { 21504, 7, 1, 0, 211, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ed20005019ULL }, // Inst #21504 = VSM4KEY4Yrm |
| 25653 | { 21503, 5, 1, 0, 211, 0, 0, 5850, X86ImpOpBase + 0, 0, 0xef20046829ULL }, // Inst #21503 = VSM3RNDS2rri |
| 25654 | { 21502, 9, 1, 0, 211, 0, 0, 5841, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xef20046819ULL }, // Inst #21502 = VSM3RNDS2rmi |
| 25655 | { 21501, 4, 1, 0, 1691, 0, 0, 3982, X86ImpOpBase + 0, 0, 0xed20004829ULL }, // Inst #21501 = VSM3MSG2rr |
| 25656 | { 21500, 8, 1, 0, 1690, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xed20004819ULL }, // Inst #21500 = VSM3MSG2rm |
| 25657 | { 21499, 4, 1, 0, 1691, 0, 0, 3982, X86ImpOpBase + 0, 0, 0xed20004029ULL }, // Inst #21499 = VSM3MSG1rr |
| 25658 | { 21498, 8, 1, 0, 1690, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xed20004019ULL }, // Inst #21498 = VSM3MSG1rm |
| 25659 | { 21497, 4, 1, 0, 1482, 0, 0, 915, X86ImpOpBase + 0, 0, 0xe328042029ULL }, // Inst #21497 = VSHUFPSrri |
| 25660 | { 21496, 8, 1, 0, 1572, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe328042019ULL }, // Inst #21496 = VSHUFPSrmi |
| 25661 | { 21495, 5, 1, 0, 475, 0, 0, 2158, X86ImpOpBase + 0, 0, 0xeee368042029ULL }, // Inst #21495 = VSHUFPSZrrikz |
| 25662 | { 21494, 6, 1, 0, 475, 0, 0, 2152, X86ImpOpBase + 0, 0, 0xeae368042029ULL }, // Inst #21494 = VSHUFPSZrrik |
| 25663 | { 21493, 4, 1, 0, 475, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8e368042029ULL }, // Inst #21493 = VSHUFPSZrri |
| 25664 | { 21492, 9, 1, 0, 583, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee368042019ULL }, // Inst #21492 = VSHUFPSZrmikz |
| 25665 | { 21491, 10, 1, 0, 583, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae368042019ULL }, // Inst #21491 = VSHUFPSZrmik |
| 25666 | { 21490, 8, 1, 0, 583, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e368042019ULL }, // Inst #21490 = VSHUFPSZrmi |
| 25667 | { 21489, 9, 1, 0, 583, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ee368042019ULL }, // Inst #21489 = VSHUFPSZrmbikz |
| 25668 | { 21488, 10, 1, 0, 583, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ae368042019ULL }, // Inst #21488 = VSHUFPSZrmbik |
| 25669 | { 21487, 8, 1, 0, 583, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78e368042019ULL }, // Inst #21487 = VSHUFPSZrmbi |
| 25670 | { 21486, 5, 1, 0, 1737, 0, 0, 2120, X86ImpOpBase + 0, 0, 0xc7e368042029ULL }, // Inst #21486 = VSHUFPSZ256rrikz |
| 25671 | { 21485, 6, 1, 0, 1737, 0, 0, 2114, X86ImpOpBase + 0, 0, 0xc3e368042029ULL }, // Inst #21485 = VSHUFPSZ256rrik |
| 25672 | { 21484, 4, 1, 0, 1737, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1e368042029ULL }, // Inst #21484 = VSHUFPSZ256rri |
| 25673 | { 21483, 9, 1, 0, 2297, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e368042019ULL }, // Inst #21483 = VSHUFPSZ256rmikz |
| 25674 | { 21482, 10, 1, 0, 2297, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e368042019ULL }, // Inst #21482 = VSHUFPSZ256rmik |
| 25675 | { 21481, 8, 1, 0, 2297, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e368042019ULL }, // Inst #21481 = VSHUFPSZ256rmi |
| 25676 | { 21480, 9, 1, 0, 2297, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77e368042019ULL }, // Inst #21480 = VSHUFPSZ256rmbikz |
| 25677 | { 21479, 10, 1, 0, 2297, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73e368042019ULL }, // Inst #21479 = VSHUFPSZ256rmbik |
| 25678 | { 21478, 8, 1, 0, 2297, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71e368042019ULL }, // Inst #21478 = VSHUFPSZ256rmbi |
| 25679 | { 21477, 5, 1, 0, 1736, 0, 0, 2082, X86ImpOpBase + 0, 0, 0xa6e368042029ULL }, // Inst #21477 = VSHUFPSZ128rrikz |
| 25680 | { 21476, 6, 1, 0, 1736, 0, 0, 2076, X86ImpOpBase + 0, 0, 0xa2e368042029ULL }, // Inst #21476 = VSHUFPSZ128rrik |
| 25681 | { 21475, 4, 1, 0, 1736, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0e368042029ULL }, // Inst #21475 = VSHUFPSZ128rri |
| 25682 | { 21474, 9, 1, 0, 1846, 0, 0, 2067, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e368042019ULL }, // Inst #21474 = VSHUFPSZ128rmikz |
| 25683 | { 21473, 10, 1, 0, 1846, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e368042019ULL }, // Inst #21473 = VSHUFPSZ128rmik |
| 25684 | { 21472, 8, 1, 0, 1846, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e368042019ULL }, // Inst #21472 = VSHUFPSZ128rmi |
| 25685 | { 21471, 9, 1, 0, 1846, 0, 0, 2067, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76e368042019ULL }, // Inst #21471 = VSHUFPSZ128rmbikz |
| 25686 | { 21470, 10, 1, 0, 1846, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72e368042019ULL }, // Inst #21470 = VSHUFPSZ128rmbik |
| 25687 | { 21469, 8, 1, 0, 1846, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70e368042019ULL }, // Inst #21469 = VSHUFPSZ128rmbi |
| 25688 | { 21468, 4, 1, 0, 1483, 0, 0, 923, X86ImpOpBase + 0, 0, 0x1e328042029ULL }, // Inst #21468 = VSHUFPSYrri |
| 25689 | { 21467, 8, 1, 0, 1647, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e328042019ULL }, // Inst #21467 = VSHUFPSYrmi |
| 25690 | { 21466, 4, 1, 0, 1482, 0, 0, 915, X86ImpOpBase + 0, 0, 0xe330042829ULL }, // Inst #21466 = VSHUFPDrri |
| 25691 | { 21465, 8, 1, 0, 1572, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe330042819ULL }, // Inst #21465 = VSHUFPDrmi |
| 25692 | { 21464, 5, 1, 0, 475, 0, 0, 2248, X86ImpOpBase + 0, 0, 0xeee370062829ULL }, // Inst #21464 = VSHUFPDZrrikz |
| 25693 | { 21463, 6, 1, 0, 475, 0, 0, 2242, X86ImpOpBase + 0, 0, 0xeae370062829ULL }, // Inst #21463 = VSHUFPDZrrik |
| 25694 | { 21462, 4, 1, 0, 475, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8e370062829ULL }, // Inst #21462 = VSHUFPDZrri |
| 25695 | { 21461, 9, 1, 0, 583, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee370062819ULL }, // Inst #21461 = VSHUFPDZrmikz |
| 25696 | { 21460, 10, 1, 0, 583, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae370062819ULL }, // Inst #21460 = VSHUFPDZrmik |
| 25697 | { 21459, 8, 1, 0, 583, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e370062819ULL }, // Inst #21459 = VSHUFPDZrmi |
| 25698 | { 21458, 9, 1, 0, 583, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ee370062819ULL }, // Inst #21458 = VSHUFPDZrmbikz |
| 25699 | { 21457, 10, 1, 0, 583, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ae370062819ULL }, // Inst #21457 = VSHUFPDZrmbik |
| 25700 | { 21456, 8, 1, 0, 583, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98e370062819ULL }, // Inst #21456 = VSHUFPDZrmbi |
| 25701 | { 21455, 5, 1, 0, 1737, 0, 0, 2218, X86ImpOpBase + 0, 0, 0xc7e370062829ULL }, // Inst #21455 = VSHUFPDZ256rrikz |
| 25702 | { 21454, 6, 1, 0, 1737, 0, 0, 2212, X86ImpOpBase + 0, 0, 0xc3e370062829ULL }, // Inst #21454 = VSHUFPDZ256rrik |
| 25703 | { 21453, 4, 1, 0, 1737, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1e370062829ULL }, // Inst #21453 = VSHUFPDZ256rri |
| 25704 | { 21452, 9, 1, 0, 2297, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e370062819ULL }, // Inst #21452 = VSHUFPDZ256rmikz |
| 25705 | { 21451, 10, 1, 0, 2297, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e370062819ULL }, // Inst #21451 = VSHUFPDZ256rmik |
| 25706 | { 21450, 8, 1, 0, 2297, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e370062819ULL }, // Inst #21450 = VSHUFPDZ256rmi |
| 25707 | { 21449, 9, 1, 0, 2297, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97e370062819ULL }, // Inst #21449 = VSHUFPDZ256rmbikz |
| 25708 | { 21448, 10, 1, 0, 2297, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93e370062819ULL }, // Inst #21448 = VSHUFPDZ256rmbik |
| 25709 | { 21447, 8, 1, 0, 2297, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91e370062819ULL }, // Inst #21447 = VSHUFPDZ256rmbi |
| 25710 | { 21446, 5, 1, 0, 1736, 0, 0, 2188, X86ImpOpBase + 0, 0, 0xa6e370062829ULL }, // Inst #21446 = VSHUFPDZ128rrikz |
| 25711 | { 21445, 6, 1, 0, 1736, 0, 0, 2182, X86ImpOpBase + 0, 0, 0xa2e370062829ULL }, // Inst #21445 = VSHUFPDZ128rrik |
| 25712 | { 21444, 4, 1, 0, 1736, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0e370062829ULL }, // Inst #21444 = VSHUFPDZ128rri |
| 25713 | { 21443, 9, 1, 0, 1846, 0, 0, 2173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e370062819ULL }, // Inst #21443 = VSHUFPDZ128rmikz |
| 25714 | { 21442, 10, 1, 0, 1846, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e370062819ULL }, // Inst #21442 = VSHUFPDZ128rmik |
| 25715 | { 21441, 8, 1, 0, 1846, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e370062819ULL }, // Inst #21441 = VSHUFPDZ128rmi |
| 25716 | { 21440, 9, 1, 0, 1846, 0, 0, 2173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96e370062819ULL }, // Inst #21440 = VSHUFPDZ128rmbikz |
| 25717 | { 21439, 10, 1, 0, 1846, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92e370062819ULL }, // Inst #21439 = VSHUFPDZ128rmbik |
| 25718 | { 21438, 8, 1, 0, 1846, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90e370062819ULL }, // Inst #21438 = VSHUFPDZ128rmbi |
| 25719 | { 21437, 4, 1, 0, 1483, 0, 0, 923, X86ImpOpBase + 0, 0, 0x1e330042829ULL }, // Inst #21437 = VSHUFPDYrri |
| 25720 | { 21436, 8, 1, 0, 1647, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e330042819ULL }, // Inst #21436 = VSHUFPDYrmi |
| 25721 | { 21435, 5, 1, 0, 366, 0, 0, 2248, X86ImpOpBase + 0, 0, 0xeea1f8066829ULL }, // Inst #21435 = VSHUFI64X2Zrrikz |
| 25722 | { 21434, 6, 1, 0, 366, 0, 0, 2242, X86ImpOpBase + 0, 0, 0xeaa1f8066829ULL }, // Inst #21434 = VSHUFI64X2Zrrik |
| 25723 | { 21433, 4, 1, 0, 366, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8a1f8066829ULL }, // Inst #21433 = VSHUFI64X2Zrri |
| 25724 | { 21432, 9, 1, 0, 459, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea1f8066819ULL }, // Inst #21432 = VSHUFI64X2Zrmikz |
| 25725 | { 21431, 10, 1, 0, 459, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa1f8066819ULL }, // Inst #21431 = VSHUFI64X2Zrmik |
| 25726 | { 21430, 8, 1, 0, 459, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a1f8066819ULL }, // Inst #21430 = VSHUFI64X2Zrmi |
| 25727 | { 21429, 9, 1, 0, 459, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ea1f8066819ULL }, // Inst #21429 = VSHUFI64X2Zrmbikz |
| 25728 | { 21428, 10, 1, 0, 459, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aa1f8066819ULL }, // Inst #21428 = VSHUFI64X2Zrmbik |
| 25729 | { 21427, 8, 1, 0, 459, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98a1f8066819ULL }, // Inst #21427 = VSHUFI64X2Zrmbi |
| 25730 | { 21426, 5, 1, 0, 366, 0, 0, 2218, X86ImpOpBase + 0, 0, 0xc7a1f8066829ULL }, // Inst #21426 = VSHUFI64X2Z256rrikz |
| 25731 | { 21425, 6, 1, 0, 366, 0, 0, 2212, X86ImpOpBase + 0, 0, 0xc3a1f8066829ULL }, // Inst #21425 = VSHUFI64X2Z256rrik |
| 25732 | { 21424, 4, 1, 0, 366, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1a1f8066829ULL }, // Inst #21424 = VSHUFI64X2Z256rri |
| 25733 | { 21423, 9, 1, 0, 459, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a1f8066819ULL }, // Inst #21423 = VSHUFI64X2Z256rmikz |
| 25734 | { 21422, 10, 1, 0, 459, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a1f8066819ULL }, // Inst #21422 = VSHUFI64X2Z256rmik |
| 25735 | { 21421, 8, 1, 0, 459, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a1f8066819ULL }, // Inst #21421 = VSHUFI64X2Z256rmi |
| 25736 | { 21420, 9, 1, 0, 459, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97a1f8066819ULL }, // Inst #21420 = VSHUFI64X2Z256rmbikz |
| 25737 | { 21419, 10, 1, 0, 459, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93a1f8066819ULL }, // Inst #21419 = VSHUFI64X2Z256rmbik |
| 25738 | { 21418, 8, 1, 0, 459, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91a1f8066819ULL }, // Inst #21418 = VSHUFI64X2Z256rmbi |
| 25739 | { 21417, 5, 1, 0, 366, 0, 0, 2158, X86ImpOpBase + 0, 0, 0xeea1f8046829ULL }, // Inst #21417 = VSHUFI32X4Zrrikz |
| 25740 | { 21416, 6, 1, 0, 366, 0, 0, 2152, X86ImpOpBase + 0, 0, 0xeaa1f8046829ULL }, // Inst #21416 = VSHUFI32X4Zrrik |
| 25741 | { 21415, 4, 1, 0, 366, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8a1f8046829ULL }, // Inst #21415 = VSHUFI32X4Zrri |
| 25742 | { 21414, 9, 1, 0, 459, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea1f8046819ULL }, // Inst #21414 = VSHUFI32X4Zrmikz |
| 25743 | { 21413, 10, 1, 0, 459, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa1f8046819ULL }, // Inst #21413 = VSHUFI32X4Zrmik |
| 25744 | { 21412, 8, 1, 0, 459, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a1f8046819ULL }, // Inst #21412 = VSHUFI32X4Zrmi |
| 25745 | { 21411, 9, 1, 0, 459, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea1f8046819ULL }, // Inst #21411 = VSHUFI32X4Zrmbikz |
| 25746 | { 21410, 10, 1, 0, 459, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa1f8046819ULL }, // Inst #21410 = VSHUFI32X4Zrmbik |
| 25747 | { 21409, 8, 1, 0, 459, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a1f8046819ULL }, // Inst #21409 = VSHUFI32X4Zrmbi |
| 25748 | { 21408, 5, 1, 0, 366, 0, 0, 2120, X86ImpOpBase + 0, 0, 0xc7a1f8046829ULL }, // Inst #21408 = VSHUFI32X4Z256rrikz |
| 25749 | { 21407, 6, 1, 0, 366, 0, 0, 2114, X86ImpOpBase + 0, 0, 0xc3a1f8046829ULL }, // Inst #21407 = VSHUFI32X4Z256rrik |
| 25750 | { 21406, 4, 1, 0, 366, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1a1f8046829ULL }, // Inst #21406 = VSHUFI32X4Z256rri |
| 25751 | { 21405, 9, 1, 0, 459, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a1f8046819ULL }, // Inst #21405 = VSHUFI32X4Z256rmikz |
| 25752 | { 21404, 10, 1, 0, 459, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a1f8046819ULL }, // Inst #21404 = VSHUFI32X4Z256rmik |
| 25753 | { 21403, 8, 1, 0, 459, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a1f8046819ULL }, // Inst #21403 = VSHUFI32X4Z256rmi |
| 25754 | { 21402, 9, 1, 0, 459, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a1f8046819ULL }, // Inst #21402 = VSHUFI32X4Z256rmbikz |
| 25755 | { 21401, 10, 1, 0, 459, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a1f8046819ULL }, // Inst #21401 = VSHUFI32X4Z256rmbik |
| 25756 | { 21400, 8, 1, 0, 459, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a1f8046819ULL }, // Inst #21400 = VSHUFI32X4Z256rmbi |
| 25757 | { 21399, 5, 1, 0, 366, 0, 0, 2248, X86ImpOpBase + 0, 0, 0xee91f0066829ULL }, // Inst #21399 = VSHUFF64X2Zrrikz |
| 25758 | { 21398, 6, 1, 0, 366, 0, 0, 2242, X86ImpOpBase + 0, 0, 0xea91f0066829ULL }, // Inst #21398 = VSHUFF64X2Zrrik |
| 25759 | { 21397, 4, 1, 0, 366, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe891f0066829ULL }, // Inst #21397 = VSHUFF64X2Zrri |
| 25760 | { 21396, 9, 1, 0, 459, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee91f0066819ULL }, // Inst #21396 = VSHUFF64X2Zrmikz |
| 25761 | { 21395, 10, 1, 0, 459, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea91f0066819ULL }, // Inst #21395 = VSHUFF64X2Zrmik |
| 25762 | { 21394, 8, 1, 0, 459, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe891f0066819ULL }, // Inst #21394 = VSHUFF64X2Zrmi |
| 25763 | { 21393, 9, 1, 0, 459, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e91f0066819ULL }, // Inst #21393 = VSHUFF64X2Zrmbikz |
| 25764 | { 21392, 10, 1, 0, 459, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a91f0066819ULL }, // Inst #21392 = VSHUFF64X2Zrmbik |
| 25765 | { 21391, 8, 1, 0, 459, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9891f0066819ULL }, // Inst #21391 = VSHUFF64X2Zrmbi |
| 25766 | { 21390, 5, 1, 0, 366, 0, 0, 2218, X86ImpOpBase + 0, 0, 0xc791f0066829ULL }, // Inst #21390 = VSHUFF64X2Z256rrikz |
| 25767 | { 21389, 6, 1, 0, 366, 0, 0, 2212, X86ImpOpBase + 0, 0, 0xc391f0066829ULL }, // Inst #21389 = VSHUFF64X2Z256rrik |
| 25768 | { 21388, 4, 1, 0, 366, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc191f0066829ULL }, // Inst #21388 = VSHUFF64X2Z256rri |
| 25769 | { 21387, 9, 1, 0, 459, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc791f0066819ULL }, // Inst #21387 = VSHUFF64X2Z256rmikz |
| 25770 | { 21386, 10, 1, 0, 459, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc391f0066819ULL }, // Inst #21386 = VSHUFF64X2Z256rmik |
| 25771 | { 21385, 8, 1, 0, 459, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc191f0066819ULL }, // Inst #21385 = VSHUFF64X2Z256rmi |
| 25772 | { 21384, 9, 1, 0, 459, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9791f0066819ULL }, // Inst #21384 = VSHUFF64X2Z256rmbikz |
| 25773 | { 21383, 10, 1, 0, 459, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9391f0066819ULL }, // Inst #21383 = VSHUFF64X2Z256rmbik |
| 25774 | { 21382, 8, 1, 0, 459, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9191f0066819ULL }, // Inst #21382 = VSHUFF64X2Z256rmbi |
| 25775 | { 21381, 5, 1, 0, 366, 0, 0, 2158, X86ImpOpBase + 0, 0, 0xee91e8046829ULL }, // Inst #21381 = VSHUFF32X4Zrrikz |
| 25776 | { 21380, 6, 1, 0, 366, 0, 0, 2152, X86ImpOpBase + 0, 0, 0xea91e8046829ULL }, // Inst #21380 = VSHUFF32X4Zrrik |
| 25777 | { 21379, 4, 1, 0, 366, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe891e8046829ULL }, // Inst #21379 = VSHUFF32X4Zrri |
| 25778 | { 21378, 9, 1, 0, 459, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee91e8046819ULL }, // Inst #21378 = VSHUFF32X4Zrmikz |
| 25779 | { 21377, 10, 1, 0, 459, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea91e8046819ULL }, // Inst #21377 = VSHUFF32X4Zrmik |
| 25780 | { 21376, 8, 1, 0, 459, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe891e8046819ULL }, // Inst #21376 = VSHUFF32X4Zrmi |
| 25781 | { 21375, 9, 1, 0, 459, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e91e8046819ULL }, // Inst #21375 = VSHUFF32X4Zrmbikz |
| 25782 | { 21374, 10, 1, 0, 459, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a91e8046819ULL }, // Inst #21374 = VSHUFF32X4Zrmbik |
| 25783 | { 21373, 8, 1, 0, 459, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7891e8046819ULL }, // Inst #21373 = VSHUFF32X4Zrmbi |
| 25784 | { 21372, 5, 1, 0, 366, 0, 0, 2120, X86ImpOpBase + 0, 0, 0xc791e8046829ULL }, // Inst #21372 = VSHUFF32X4Z256rrikz |
| 25785 | { 21371, 6, 1, 0, 366, 0, 0, 2114, X86ImpOpBase + 0, 0, 0xc391e8046829ULL }, // Inst #21371 = VSHUFF32X4Z256rrik |
| 25786 | { 21370, 4, 1, 0, 366, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc191e8046829ULL }, // Inst #21370 = VSHUFF32X4Z256rri |
| 25787 | { 21369, 9, 1, 0, 459, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc791e8046819ULL }, // Inst #21369 = VSHUFF32X4Z256rmikz |
| 25788 | { 21368, 10, 1, 0, 459, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc391e8046819ULL }, // Inst #21368 = VSHUFF32X4Z256rmik |
| 25789 | { 21367, 8, 1, 0, 459, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc191e8046819ULL }, // Inst #21367 = VSHUFF32X4Z256rmi |
| 25790 | { 21366, 9, 1, 0, 459, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7791e8046819ULL }, // Inst #21366 = VSHUFF32X4Z256rmbikz |
| 25791 | { 21365, 10, 1, 0, 459, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7391e8046819ULL }, // Inst #21365 = VSHUFF32X4Z256rmbik |
| 25792 | { 21364, 8, 1, 0, 459, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7191e8046819ULL }, // Inst #21364 = VSHUFF32X4Z256rmbi |
| 25793 | { 21363, 4, 1, 0, 1689, 0, 0, 5837, X86ImpOpBase + 0, 0, 0x1e5a0005829ULL }, // Inst #21363 = VSHA512RNDS2rr |
| 25794 | { 21362, 3, 1, 0, 1670, 0, 0, 5834, X86ImpOpBase + 0, 0, 0x166a0005829ULL }, // Inst #21362 = VSHA512MSG2rr |
| 25795 | { 21361, 3, 1, 0, 1670, 0, 0, 5831, X86ImpOpBase + 0, 0, 0x16620005829ULL }, // Inst #21361 = VSHA512MSG1rr |
| 25796 | { 21360, 8, 1, 0, 1315, 0, 0, 5744, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6a51e8004818ULL }, // Inst #21360 = VSCATTERQPSZmr |
| 25797 | { 21359, 8, 1, 0, 2366, 0, 0, 5736, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6351e8004818ULL }, // Inst #21359 = VSCATTERQPSZ256mr |
| 25798 | { 21358, 8, 1, 0, 1333, 0, 0, 5712, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6251e8004818ULL }, // Inst #21358 = VSCATTERQPSZ128mr |
| 25799 | { 21357, 8, 1, 0, 2367, 0, 0, 5760, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a51f0024818ULL }, // Inst #21357 = VSCATTERQPDZmr |
| 25800 | { 21356, 8, 1, 0, 1314, 0, 0, 5752, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8351f0024818ULL }, // Inst #21356 = VSCATTERQPDZ256mr |
| 25801 | { 21355, 8, 1, 0, 1313, 0, 0, 5712, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8251f0024818ULL }, // Inst #21355 = VSCATTERQPDZ128mr |
| 25802 | { 21354, 6, 0, 0, 72, 0, 0, 4375, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a63f8004826ULL }, // Inst #21354 = VSCATTERPF1QPSm |
| 25803 | { 21353, 6, 0, 0, 72, 0, 0, 4375, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8024826ULL }, // Inst #21353 = VSCATTERPF1QPDm |
| 25804 | { 21352, 6, 0, 0, 72, 0, 0, 4369, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378004826ULL }, // Inst #21352 = VSCATTERPF1DPSm |
| 25805 | { 21351, 6, 0, 0, 72, 0, 0, 4363, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a6378024826ULL }, // Inst #21351 = VSCATTERPF1DPDm |
| 25806 | { 21350, 6, 0, 0, 72, 0, 0, 4375, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a63f8004825ULL }, // Inst #21350 = VSCATTERPF0QPSm |
| 25807 | { 21349, 6, 0, 0, 72, 0, 0, 4375, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8024825ULL }, // Inst #21349 = VSCATTERPF0QPDm |
| 25808 | { 21348, 6, 0, 0, 72, 0, 0, 4369, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378004825ULL }, // Inst #21348 = VSCATTERPF0DPSm |
| 25809 | { 21347, 6, 0, 0, 72, 0, 0, 4363, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a6378024825ULL }, // Inst #21347 = VSCATTERPF0DPDm |
| 25810 | { 21346, 8, 1, 0, 1316, 0, 0, 5704, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6a5168004818ULL }, // Inst #21346 = VSCATTERDPSZmr |
| 25811 | { 21345, 8, 1, 0, 1335, 0, 0, 5696, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x635168004818ULL }, // Inst #21345 = VSCATTERDPSZ256mr |
| 25812 | { 21344, 8, 1, 0, 1334, 0, 0, 5688, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x625168004818ULL }, // Inst #21344 = VSCATTERDPSZ128mr |
| 25813 | { 21343, 8, 1, 0, 2367, 0, 0, 5728, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a5170024818ULL }, // Inst #21343 = VSCATTERDPDZmr |
| 25814 | { 21342, 8, 1, 0, 1314, 0, 0, 5720, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x835170024818ULL }, // Inst #21342 = VSCATTERDPDZ256mr |
| 25815 | { 21341, 8, 1, 0, 1313, 0, 0, 5712, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x825170024818ULL }, // Inst #21341 = VSCATTERDPDZ128mr |
| 25816 | { 21340, 4, 1, 0, 2065, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6696e8004829ULL }, // Inst #21340 = VSCALEFSSZrrkz |
| 25817 | { 21339, 5, 1, 0, 2065, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6296e8004829ULL }, // Inst #21339 = VSCALEFSSZrrk |
| 25818 | { 21338, 5, 1, 0, 2065, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x17696e8004829ULL }, // Inst #21338 = VSCALEFSSZrrbkz_Int |
| 25819 | { 21337, 6, 1, 0, 2065, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x17296e8004829ULL }, // Inst #21337 = VSCALEFSSZrrbk_Int |
| 25820 | { 21336, 4, 1, 0, 1073, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x17096e8004829ULL }, // Inst #21336 = VSCALEFSSZrrb_Int |
| 25821 | { 21335, 3, 1, 0, 2065, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6096e8004829ULL }, // Inst #21335 = VSCALEFSSZrr |
| 25822 | { 21334, 8, 1, 0, 2053, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6696e8004819ULL }, // Inst #21334 = VSCALEFSSZrmkz |
| 25823 | { 21333, 9, 1, 0, 2053, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6296e8004819ULL }, // Inst #21333 = VSCALEFSSZrmk |
| 25824 | { 21332, 7, 1, 0, 2053, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6096e8004819ULL }, // Inst #21332 = VSCALEFSSZrm |
| 25825 | { 21331, 4, 1, 0, 2417, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4696e8014829ULL }, // Inst #21331 = VSCALEFSHZrrkz |
| 25826 | { 21330, 5, 1, 0, 2417, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4296e8014829ULL }, // Inst #21330 = VSCALEFSHZrrk |
| 25827 | { 21329, 5, 1, 0, 2417, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x15696e8014829ULL }, // Inst #21329 = VSCALEFSHZrrbkz_Int |
| 25828 | { 21328, 6, 1, 0, 2417, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x15296e8014829ULL }, // Inst #21328 = VSCALEFSHZrrbk_Int |
| 25829 | { 21327, 4, 1, 0, 2220, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x15096e8014829ULL }, // Inst #21327 = VSCALEFSHZrrb_Int |
| 25830 | { 21326, 3, 1, 0, 2220, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4096e8014829ULL }, // Inst #21326 = VSCALEFSHZrr |
| 25831 | { 21325, 8, 1, 0, 2412, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4696e8014819ULL }, // Inst #21325 = VSCALEFSHZrmkz |
| 25832 | { 21324, 9, 1, 0, 2412, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4296e8014819ULL }, // Inst #21324 = VSCALEFSHZrmk |
| 25833 | { 21323, 7, 1, 0, 2208, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4096e8014819ULL }, // Inst #21323 = VSCALEFSHZrm |
| 25834 | { 21322, 4, 1, 0, 2065, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8696f0024829ULL }, // Inst #21322 = VSCALEFSDZrrkz |
| 25835 | { 21321, 5, 1, 0, 2065, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8296f0024829ULL }, // Inst #21321 = VSCALEFSDZrrk |
| 25836 | { 21320, 5, 1, 0, 2065, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x19696f0024829ULL }, // Inst #21320 = VSCALEFSDZrrbkz_Int |
| 25837 | { 21319, 6, 1, 0, 2065, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x19296f0024829ULL }, // Inst #21319 = VSCALEFSDZrrbk_Int |
| 25838 | { 21318, 4, 1, 0, 1073, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x19096f0024829ULL }, // Inst #21318 = VSCALEFSDZrrb_Int |
| 25839 | { 21317, 3, 1, 0, 2065, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8096f0024829ULL }, // Inst #21317 = VSCALEFSDZrr |
| 25840 | { 21316, 8, 1, 0, 2053, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8696f0024819ULL }, // Inst #21316 = VSCALEFSDZrmkz |
| 25841 | { 21315, 9, 1, 0, 2053, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8296f0024819ULL }, // Inst #21315 = VSCALEFSDZrmk |
| 25842 | { 21314, 7, 1, 0, 2053, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8096f0024819ULL }, // Inst #21314 = VSCALEFSDZrm |
| 25843 | { 21313, 4, 1, 0, 340, 1, 0, 1963, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee9668004829ULL }, // Inst #21313 = VSCALEFPSZrrkz |
| 25844 | { 21312, 5, 1, 0, 340, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea9668004829ULL }, // Inst #21312 = VSCALEFPSZrrk |
| 25845 | { 21311, 5, 1, 0, 340, 1, 0, 1953, X86ImpOpBase + 78, 0, 0x17e9668004829ULL }, // Inst #21311 = VSCALEFPSZrrbkz |
| 25846 | { 21310, 6, 1, 0, 340, 1, 0, 1947, X86ImpOpBase + 78, 0, 0x17a9668004829ULL }, // Inst #21310 = VSCALEFPSZrrbk |
| 25847 | { 21309, 4, 1, 0, 340, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x1789668004829ULL }, // Inst #21309 = VSCALEFPSZrrb |
| 25848 | { 21308, 3, 1, 0, 340, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe89668004829ULL }, // Inst #21308 = VSCALEFPSZrr |
| 25849 | { 21307, 8, 1, 0, 339, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee9668004819ULL }, // Inst #21307 = VSCALEFPSZrmkz |
| 25850 | { 21306, 9, 1, 0, 339, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea9668004819ULL }, // Inst #21306 = VSCALEFPSZrmk |
| 25851 | { 21305, 8, 1, 0, 339, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e9668004819ULL }, // Inst #21305 = VSCALEFPSZrmbkz |
| 25852 | { 21304, 9, 1, 0, 339, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a9668004819ULL }, // Inst #21304 = VSCALEFPSZrmbk |
| 25853 | { 21303, 7, 1, 0, 339, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x789668004819ULL }, // Inst #21303 = VSCALEFPSZrmb |
| 25854 | { 21302, 7, 1, 0, 339, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe89668004819ULL }, // Inst #21302 = VSCALEFPSZrm |
| 25855 | { 21301, 4, 1, 0, 338, 1, 0, 1935, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc79668004829ULL }, // Inst #21301 = VSCALEFPSZ256rrkz |
| 25856 | { 21300, 5, 1, 0, 338, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc39668004829ULL }, // Inst #21300 = VSCALEFPSZ256rrk |
| 25857 | { 21299, 3, 1, 0, 338, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc19668004829ULL }, // Inst #21299 = VSCALEFPSZ256rr |
| 25858 | { 21298, 8, 1, 0, 337, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc79668004819ULL }, // Inst #21298 = VSCALEFPSZ256rmkz |
| 25859 | { 21297, 9, 1, 0, 337, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc39668004819ULL }, // Inst #21297 = VSCALEFPSZ256rmk |
| 25860 | { 21296, 8, 1, 0, 337, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x779668004819ULL }, // Inst #21296 = VSCALEFPSZ256rmbkz |
| 25861 | { 21295, 9, 1, 0, 337, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x739668004819ULL }, // Inst #21295 = VSCALEFPSZ256rmbk |
| 25862 | { 21294, 7, 1, 0, 337, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x719668004819ULL }, // Inst #21294 = VSCALEFPSZ256rmb |
| 25863 | { 21293, 7, 1, 0, 337, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc19668004819ULL }, // Inst #21293 = VSCALEFPSZ256rm |
| 25864 | { 21292, 4, 1, 0, 30, 1, 0, 1909, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa69668004829ULL }, // Inst #21292 = VSCALEFPSZ128rrkz |
| 25865 | { 21291, 5, 1, 0, 30, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa29668004829ULL }, // Inst #21291 = VSCALEFPSZ128rrk |
| 25866 | { 21290, 3, 1, 0, 30, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa09668004829ULL }, // Inst #21290 = VSCALEFPSZ128rr |
| 25867 | { 21289, 8, 1, 0, 29, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa69668004819ULL }, // Inst #21289 = VSCALEFPSZ128rmkz |
| 25868 | { 21288, 9, 1, 0, 29, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa29668004819ULL }, // Inst #21288 = VSCALEFPSZ128rmk |
| 25869 | { 21287, 8, 1, 0, 29, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x769668004819ULL }, // Inst #21287 = VSCALEFPSZ128rmbkz |
| 25870 | { 21286, 9, 1, 0, 29, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x729668004819ULL }, // Inst #21286 = VSCALEFPSZ128rmbk |
| 25871 | { 21285, 7, 1, 0, 29, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x709668004819ULL }, // Inst #21285 = VSCALEFPSZ128rmb |
| 25872 | { 21284, 7, 1, 0, 29, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa09668004819ULL }, // Inst #21284 = VSCALEFPSZ128rm |
| 25873 | { 21283, 4, 1, 0, 2421, 1, 0, 1759, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee9668014829ULL }, // Inst #21283 = VSCALEFPHZrrkz |
| 25874 | { 21282, 5, 1, 0, 2421, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea9668014829ULL }, // Inst #21282 = VSCALEFPHZrrk |
| 25875 | { 21281, 5, 1, 0, 2421, 1, 0, 1882, X86ImpOpBase + 78, 0, 0x15e9668014829ULL }, // Inst #21281 = VSCALEFPHZrrbkz |
| 25876 | { 21280, 6, 1, 0, 2421, 1, 0, 1876, X86ImpOpBase + 78, 0, 0x15a9668014829ULL }, // Inst #21280 = VSCALEFPHZrrbk |
| 25877 | { 21279, 4, 1, 0, 2231, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x1589668014829ULL }, // Inst #21279 = VSCALEFPHZrrb |
| 25878 | { 21278, 3, 1, 0, 2231, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe89668014829ULL }, // Inst #21278 = VSCALEFPHZrr |
| 25879 | { 21277, 8, 1, 0, 2419, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee9668014819ULL }, // Inst #21277 = VSCALEFPHZrmkz |
| 25880 | { 21276, 9, 1, 0, 2419, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea9668014819ULL }, // Inst #21276 = VSCALEFPHZrmk |
| 25881 | { 21275, 8, 1, 0, 2419, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e9668014819ULL }, // Inst #21275 = VSCALEFPHZrmbkz |
| 25882 | { 21274, 9, 1, 0, 2419, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a9668014819ULL }, // Inst #21274 = VSCALEFPHZrmbk |
| 25883 | { 21273, 7, 1, 0, 2226, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x589668014819ULL }, // Inst #21273 = VSCALEFPHZrmb |
| 25884 | { 21272, 7, 1, 0, 2226, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe89668014819ULL }, // Inst #21272 = VSCALEFPHZrm |
| 25885 | { 21271, 4, 1, 0, 2416, 1, 0, 1723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc79668014829ULL }, // Inst #21271 = VSCALEFPHZ256rrkz |
| 25886 | { 21270, 5, 1, 0, 2416, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc39668014829ULL }, // Inst #21270 = VSCALEFPHZ256rrk |
| 25887 | { 21269, 3, 1, 0, 2218, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc19668014829ULL }, // Inst #21269 = VSCALEFPHZ256rr |
| 25888 | { 21268, 8, 1, 0, 2411, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc79668014819ULL }, // Inst #21268 = VSCALEFPHZ256rmkz |
| 25889 | { 21267, 9, 1, 0, 2411, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc39668014819ULL }, // Inst #21267 = VSCALEFPHZ256rmk |
| 25890 | { 21266, 8, 1, 0, 2411, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x579668014819ULL }, // Inst #21266 = VSCALEFPHZ256rmbkz |
| 25891 | { 21265, 9, 1, 0, 2411, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x539668014819ULL }, // Inst #21265 = VSCALEFPHZ256rmbk |
| 25892 | { 21264, 7, 1, 0, 2207, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x519668014819ULL }, // Inst #21264 = VSCALEFPHZ256rmb |
| 25893 | { 21263, 7, 1, 0, 2207, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc19668014819ULL }, // Inst #21263 = VSCALEFPHZ256rm |
| 25894 | { 21262, 4, 1, 0, 2415, 1, 0, 1687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa69668014829ULL }, // Inst #21262 = VSCALEFPHZ128rrkz |
| 25895 | { 21261, 5, 1, 0, 2415, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa29668014829ULL }, // Inst #21261 = VSCALEFPHZ128rrk |
| 25896 | { 21260, 3, 1, 0, 2217, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa09668014829ULL }, // Inst #21260 = VSCALEFPHZ128rr |
| 25897 | { 21259, 8, 1, 0, 2409, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa69668014819ULL }, // Inst #21259 = VSCALEFPHZ128rmkz |
| 25898 | { 21258, 9, 1, 0, 2409, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa29668014819ULL }, // Inst #21258 = VSCALEFPHZ128rmk |
| 25899 | { 21257, 8, 1, 0, 2409, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x569668014819ULL }, // Inst #21257 = VSCALEFPHZ128rmbkz |
| 25900 | { 21256, 9, 1, 0, 2409, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x529668014819ULL }, // Inst #21256 = VSCALEFPHZ128rmbk |
| 25901 | { 21255, 7, 1, 0, 2204, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x509668014819ULL }, // Inst #21255 = VSCALEFPHZ128rmb |
| 25902 | { 21254, 7, 1, 0, 2204, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa09668014819ULL }, // Inst #21254 = VSCALEFPHZ128rm |
| 25903 | { 21253, 4, 1, 0, 340, 1, 0, 1862, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee9670024829ULL }, // Inst #21253 = VSCALEFPDZrrkz |
| 25904 | { 21252, 5, 1, 0, 340, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea9670024829ULL }, // Inst #21252 = VSCALEFPDZrrk |
| 25905 | { 21251, 5, 1, 0, 340, 1, 0, 1852, X86ImpOpBase + 78, 0, 0x19e9670024829ULL }, // Inst #21251 = VSCALEFPDZrrbkz |
| 25906 | { 21250, 6, 1, 0, 340, 1, 0, 1846, X86ImpOpBase + 78, 0, 0x19a9670024829ULL }, // Inst #21250 = VSCALEFPDZrrbk |
| 25907 | { 21249, 4, 1, 0, 340, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x1989670024829ULL }, // Inst #21249 = VSCALEFPDZrrb |
| 25908 | { 21248, 3, 1, 0, 340, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe89670024829ULL }, // Inst #21248 = VSCALEFPDZrr |
| 25909 | { 21247, 8, 1, 0, 339, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee9670024819ULL }, // Inst #21247 = VSCALEFPDZrmkz |
| 25910 | { 21246, 9, 1, 0, 339, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea9670024819ULL }, // Inst #21246 = VSCALEFPDZrmk |
| 25911 | { 21245, 8, 1, 0, 339, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e9670024819ULL }, // Inst #21245 = VSCALEFPDZrmbkz |
| 25912 | { 21244, 9, 1, 0, 339, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a9670024819ULL }, // Inst #21244 = VSCALEFPDZrmbk |
| 25913 | { 21243, 7, 1, 0, 339, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x989670024819ULL }, // Inst #21243 = VSCALEFPDZrmb |
| 25914 | { 21242, 7, 1, 0, 339, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe89670024819ULL }, // Inst #21242 = VSCALEFPDZrm |
| 25915 | { 21241, 4, 1, 0, 338, 1, 0, 1821, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc79670024829ULL }, // Inst #21241 = VSCALEFPDZ256rrkz |
| 25916 | { 21240, 5, 1, 0, 338, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc39670024829ULL }, // Inst #21240 = VSCALEFPDZ256rrk |
| 25917 | { 21239, 3, 1, 0, 338, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc19670024829ULL }, // Inst #21239 = VSCALEFPDZ256rr |
| 25918 | { 21238, 8, 1, 0, 337, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc79670024819ULL }, // Inst #21238 = VSCALEFPDZ256rmkz |
| 25919 | { 21237, 9, 1, 0, 337, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc39670024819ULL }, // Inst #21237 = VSCALEFPDZ256rmk |
| 25920 | { 21236, 8, 1, 0, 337, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x979670024819ULL }, // Inst #21236 = VSCALEFPDZ256rmbkz |
| 25921 | { 21235, 9, 1, 0, 337, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x939670024819ULL }, // Inst #21235 = VSCALEFPDZ256rmbk |
| 25922 | { 21234, 7, 1, 0, 337, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x919670024819ULL }, // Inst #21234 = VSCALEFPDZ256rmb |
| 25923 | { 21233, 7, 1, 0, 337, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc19670024819ULL }, // Inst #21233 = VSCALEFPDZ256rm |
| 25924 | { 21232, 4, 1, 0, 30, 1, 0, 1795, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa69670024829ULL }, // Inst #21232 = VSCALEFPDZ128rrkz |
| 25925 | { 21231, 5, 1, 0, 30, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa29670024829ULL }, // Inst #21231 = VSCALEFPDZ128rrk |
| 25926 | { 21230, 3, 1, 0, 30, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa09670024829ULL }, // Inst #21230 = VSCALEFPDZ128rr |
| 25927 | { 21229, 8, 1, 0, 29, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa69670024819ULL }, // Inst #21229 = VSCALEFPDZ128rmkz |
| 25928 | { 21228, 9, 1, 0, 29, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa29670024819ULL }, // Inst #21228 = VSCALEFPDZ128rmk |
| 25929 | { 21227, 8, 1, 0, 29, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x969670024819ULL }, // Inst #21227 = VSCALEFPDZ128rmbkz |
| 25930 | { 21226, 9, 1, 0, 29, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x929670024819ULL }, // Inst #21226 = VSCALEFPDZ128rmbk |
| 25931 | { 21225, 7, 1, 0, 29, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x909670024819ULL }, // Inst #21225 = VSCALEFPDZ128rmb |
| 25932 | { 21224, 7, 1, 0, 29, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa09670024819ULL }, // Inst #21224 = VSCALEFPDZ128rm |
| 25933 | { 21223, 4, 1, 0, 340, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xee9668014029ULL }, // Inst #21223 = VSCALEFBF16Zrrkz |
| 25934 | { 21222, 5, 1, 0, 340, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xea9668014029ULL }, // Inst #21222 = VSCALEFBF16Zrrk |
| 25935 | { 21221, 3, 1, 0, 340, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe89668014029ULL }, // Inst #21221 = VSCALEFBF16Zrr |
| 25936 | { 21220, 8, 1, 0, 339, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9668014019ULL }, // Inst #21220 = VSCALEFBF16Zrmkz |
| 25937 | { 21219, 9, 1, 0, 339, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9668014019ULL }, // Inst #21219 = VSCALEFBF16Zrmk |
| 25938 | { 21218, 8, 1, 0, 339, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e9668014019ULL }, // Inst #21218 = VSCALEFBF16Zrmbkz |
| 25939 | { 21217, 9, 1, 0, 339, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a9668014019ULL }, // Inst #21217 = VSCALEFBF16Zrmbk |
| 25940 | { 21216, 7, 1, 0, 339, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x589668014019ULL }, // Inst #21216 = VSCALEFBF16Zrmb |
| 25941 | { 21215, 7, 1, 0, 339, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89668014019ULL }, // Inst #21215 = VSCALEFBF16Zrm |
| 25942 | { 21214, 4, 1, 0, 338, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc79668014029ULL }, // Inst #21214 = VSCALEFBF16Z256rrkz |
| 25943 | { 21213, 5, 1, 0, 338, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc39668014029ULL }, // Inst #21213 = VSCALEFBF16Z256rrk |
| 25944 | { 21212, 3, 1, 0, 338, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc19668014029ULL }, // Inst #21212 = VSCALEFBF16Z256rr |
| 25945 | { 21211, 8, 1, 0, 337, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79668014019ULL }, // Inst #21211 = VSCALEFBF16Z256rmkz |
| 25946 | { 21210, 9, 1, 0, 337, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39668014019ULL }, // Inst #21210 = VSCALEFBF16Z256rmk |
| 25947 | { 21209, 8, 1, 0, 337, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x579668014019ULL }, // Inst #21209 = VSCALEFBF16Z256rmbkz |
| 25948 | { 21208, 9, 1, 0, 337, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x539668014019ULL }, // Inst #21208 = VSCALEFBF16Z256rmbk |
| 25949 | { 21207, 7, 1, 0, 337, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x519668014019ULL }, // Inst #21207 = VSCALEFBF16Z256rmb |
| 25950 | { 21206, 7, 1, 0, 337, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19668014019ULL }, // Inst #21206 = VSCALEFBF16Z256rm |
| 25951 | { 21205, 4, 1, 0, 30, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa69668014029ULL }, // Inst #21205 = VSCALEFBF16Z128rrkz |
| 25952 | { 21204, 5, 1, 0, 30, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa29668014029ULL }, // Inst #21204 = VSCALEFBF16Z128rrk |
| 25953 | { 21203, 3, 1, 0, 30, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa09668014029ULL }, // Inst #21203 = VSCALEFBF16Z128rr |
| 25954 | { 21202, 8, 1, 0, 29, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69668014019ULL }, // Inst #21202 = VSCALEFBF16Z128rmkz |
| 25955 | { 21201, 9, 1, 0, 29, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29668014019ULL }, // Inst #21201 = VSCALEFBF16Z128rmk |
| 25956 | { 21200, 8, 1, 0, 29, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x569668014019ULL }, // Inst #21200 = VSCALEFBF16Z128rmbkz |
| 25957 | { 21199, 9, 1, 0, 29, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x529668014019ULL }, // Inst #21199 = VSCALEFBF16Z128rmbk |
| 25958 | { 21198, 7, 1, 0, 29, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x509668014019ULL }, // Inst #21198 = VSCALEFBF16Z128rmb |
| 25959 | { 21197, 7, 1, 0, 29, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09668014019ULL }, // Inst #21197 = VSCALEFBF16Z128rm |
| 25960 | { 21196, 3, 1, 0, 309, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xa928003029ULL }, // Inst #21196 = VRSQRTSSr_Int |
| 25961 | { 21195, 3, 1, 0, 309, 0, 0, 2046, X86ImpOpBase + 0, 0, 0xa928003029ULL }, // Inst #21195 = VRSQRTSSr |
| 25962 | { 21194, 7, 1, 0, 308, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa928003019ULL }, // Inst #21194 = VRSQRTSSm_Int |
| 25963 | { 21193, 7, 1, 0, 308, 0, 0, 2039, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa928003019ULL }, // Inst #21193 = VRSQRTSSm |
| 25964 | { 21192, 4, 1, 0, 309, 0, 0, 2005, X86ImpOpBase + 0, 0, 0x46a7e8014829ULL }, // Inst #21192 = VRSQRTSHZrrkz |
| 25965 | { 21191, 5, 1, 0, 309, 0, 0, 2000, X86ImpOpBase + 0, 0, 0x42a7e8014829ULL }, // Inst #21191 = VRSQRTSHZrrk |
| 25966 | { 21190, 3, 1, 0, 309, 0, 0, 1679, X86ImpOpBase + 0, 0, 0x40a7e8014829ULL }, // Inst #21190 = VRSQRTSHZrr |
| 25967 | { 21189, 8, 1, 0, 308, 0, 0, 1974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x46a7e8014819ULL }, // Inst #21189 = VRSQRTSHZrmkz |
| 25968 | { 21188, 9, 1, 0, 308, 0, 0, 1628, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x42a7e8014819ULL }, // Inst #21188 = VRSQRTSHZrmk |
| 25969 | { 21187, 7, 1, 0, 308, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x40a7e8014819ULL }, // Inst #21187 = VRSQRTSHZrm |
| 25970 | { 21186, 2, 1, 0, 306, 0, 0, 557, X86ImpOpBase + 0, 0, 0x2928002029ULL }, // Inst #21186 = VRSQRTPSr |
| 25971 | { 21185, 6, 1, 0, 305, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2928002019ULL }, // Inst #21185 = VRSQRTPSm |
| 25972 | { 21184, 2, 1, 0, 578, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x12928002029ULL }, // Inst #21184 = VRSQRTPSYr |
| 25973 | { 21183, 6, 1, 0, 581, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x12928002019ULL }, // Inst #21183 = VRSQRTPSYm |
| 25974 | { 21182, 3, 1, 0, 580, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee2768014829ULL }, // Inst #21182 = VRSQRTPHZrkz |
| 25975 | { 21181, 4, 1, 0, 580, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea2768014829ULL }, // Inst #21181 = VRSQRTPHZrk |
| 25976 | { 21180, 2, 1, 0, 2424, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82768014829ULL }, // Inst #21180 = VRSQRTPHZr |
| 25977 | { 21179, 7, 1, 0, 2392, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2768014819ULL }, // Inst #21179 = VRSQRTPHZmkz |
| 25978 | { 21178, 8, 1, 0, 2392, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2768014819ULL }, // Inst #21178 = VRSQRTPHZmk |
| 25979 | { 21177, 7, 1, 0, 2392, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e2768014819ULL }, // Inst #21177 = VRSQRTPHZmbkz |
| 25980 | { 21176, 8, 1, 0, 2392, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a2768014819ULL }, // Inst #21176 = VRSQRTPHZmbk |
| 25981 | { 21175, 6, 1, 0, 579, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x582768014819ULL }, // Inst #21175 = VRSQRTPHZmb |
| 25982 | { 21174, 6, 1, 0, 579, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82768014819ULL }, // Inst #21174 = VRSQRTPHZm |
| 25983 | { 21173, 3, 1, 0, 578, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc72768014829ULL }, // Inst #21173 = VRSQRTPHZ256rkz |
| 25984 | { 21172, 4, 1, 0, 578, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc32768014829ULL }, // Inst #21172 = VRSQRTPHZ256rk |
| 25985 | { 21171, 2, 1, 0, 578, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12768014829ULL }, // Inst #21171 = VRSQRTPHZ256r |
| 25986 | { 21170, 7, 1, 0, 577, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72768014819ULL }, // Inst #21170 = VRSQRTPHZ256mkz |
| 25987 | { 21169, 8, 1, 0, 577, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32768014819ULL }, // Inst #21169 = VRSQRTPHZ256mk |
| 25988 | { 21168, 7, 1, 0, 577, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x572768014819ULL }, // Inst #21168 = VRSQRTPHZ256mbkz |
| 25989 | { 21167, 8, 1, 0, 577, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x532768014819ULL }, // Inst #21167 = VRSQRTPHZ256mbk |
| 25990 | { 21166, 6, 1, 0, 577, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x512768014819ULL }, // Inst #21166 = VRSQRTPHZ256mb |
| 25991 | { 21165, 6, 1, 0, 577, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12768014819ULL }, // Inst #21165 = VRSQRTPHZ256m |
| 25992 | { 21164, 3, 1, 0, 306, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa62768014829ULL }, // Inst #21164 = VRSQRTPHZ128rkz |
| 25993 | { 21163, 4, 1, 0, 306, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa22768014829ULL }, // Inst #21163 = VRSQRTPHZ128rk |
| 25994 | { 21162, 2, 1, 0, 306, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02768014829ULL }, // Inst #21162 = VRSQRTPHZ128r |
| 25995 | { 21161, 7, 1, 0, 576, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62768014819ULL }, // Inst #21161 = VRSQRTPHZ128mkz |
| 25996 | { 21160, 8, 1, 0, 576, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22768014819ULL }, // Inst #21160 = VRSQRTPHZ128mk |
| 25997 | { 21159, 7, 1, 0, 576, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x562768014819ULL }, // Inst #21159 = VRSQRTPHZ128mbkz |
| 25998 | { 21158, 8, 1, 0, 576, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x522768014819ULL }, // Inst #21158 = VRSQRTPHZ128mbk |
| 25999 | { 21157, 6, 1, 0, 576, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x502768014819ULL }, // Inst #21157 = VRSQRTPHZ128mb |
| 26000 | { 21156, 6, 1, 0, 576, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02768014819ULL }, // Inst #21156 = VRSQRTPHZ128m |
| 26001 | { 21155, 3, 1, 0, 580, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee2768014029ULL }, // Inst #21155 = VRSQRTBF16Zrkz |
| 26002 | { 21154, 4, 1, 0, 580, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea2768014029ULL }, // Inst #21154 = VRSQRTBF16Zrk |
| 26003 | { 21153, 2, 1, 0, 580, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82768014029ULL }, // Inst #21153 = VRSQRTBF16Zr |
| 26004 | { 21152, 7, 1, 0, 579, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2768014019ULL }, // Inst #21152 = VRSQRTBF16Zmkz |
| 26005 | { 21151, 8, 1, 0, 579, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2768014019ULL }, // Inst #21151 = VRSQRTBF16Zmk |
| 26006 | { 21150, 7, 1, 0, 579, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e2768014019ULL }, // Inst #21150 = VRSQRTBF16Zmbkz |
| 26007 | { 21149, 8, 1, 0, 579, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a2768014019ULL }, // Inst #21149 = VRSQRTBF16Zmbk |
| 26008 | { 21148, 6, 1, 0, 579, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x582768014019ULL }, // Inst #21148 = VRSQRTBF16Zmb |
| 26009 | { 21147, 6, 1, 0, 579, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82768014019ULL }, // Inst #21147 = VRSQRTBF16Zm |
| 26010 | { 21146, 3, 1, 0, 578, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc72768014029ULL }, // Inst #21146 = VRSQRTBF16Z256rkz |
| 26011 | { 21145, 4, 1, 0, 578, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc32768014029ULL }, // Inst #21145 = VRSQRTBF16Z256rk |
| 26012 | { 21144, 2, 1, 0, 578, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12768014029ULL }, // Inst #21144 = VRSQRTBF16Z256r |
| 26013 | { 21143, 7, 1, 0, 577, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72768014019ULL }, // Inst #21143 = VRSQRTBF16Z256mkz |
| 26014 | { 21142, 8, 1, 0, 577, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32768014019ULL }, // Inst #21142 = VRSQRTBF16Z256mk |
| 26015 | { 21141, 7, 1, 0, 577, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x572768014019ULL }, // Inst #21141 = VRSQRTBF16Z256mbkz |
| 26016 | { 21140, 8, 1, 0, 577, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x532768014019ULL }, // Inst #21140 = VRSQRTBF16Z256mbk |
| 26017 | { 21139, 6, 1, 0, 577, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x512768014019ULL }, // Inst #21139 = VRSQRTBF16Z256mb |
| 26018 | { 21138, 6, 1, 0, 577, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12768014019ULL }, // Inst #21138 = VRSQRTBF16Z256m |
| 26019 | { 21137, 3, 1, 0, 306, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa62768014029ULL }, // Inst #21137 = VRSQRTBF16Z128rkz |
| 26020 | { 21136, 4, 1, 0, 306, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa22768014029ULL }, // Inst #21136 = VRSQRTBF16Z128rk |
| 26021 | { 21135, 2, 1, 0, 306, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02768014029ULL }, // Inst #21135 = VRSQRTBF16Z128r |
| 26022 | { 21134, 7, 1, 0, 576, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62768014019ULL }, // Inst #21134 = VRSQRTBF16Z128mkz |
| 26023 | { 21133, 8, 1, 0, 576, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22768014019ULL }, // Inst #21133 = VRSQRTBF16Z128mk |
| 26024 | { 21132, 7, 1, 0, 576, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x562768014019ULL }, // Inst #21132 = VRSQRTBF16Z128mbkz |
| 26025 | { 21131, 8, 1, 0, 576, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x522768014019ULL }, // Inst #21131 = VRSQRTBF16Z128mbk |
| 26026 | { 21130, 6, 1, 0, 576, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x502768014019ULL }, // Inst #21130 = VRSQRTBF16Z128mb |
| 26027 | { 21129, 6, 1, 0, 576, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02768014019ULL }, // Inst #21129 = VRSQRTBF16Z128m |
| 26028 | { 21128, 4, 1, 0, 309, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66e6e8004829ULL }, // Inst #21128 = VRSQRT28SSZrkz |
| 26029 | { 21127, 5, 1, 0, 309, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62e6e8004829ULL }, // Inst #21127 = VRSQRT28SSZrk |
| 26030 | { 21126, 4, 1, 0, 309, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x76e6e8004829ULL }, // Inst #21126 = VRSQRT28SSZrbkz |
| 26031 | { 21125, 5, 1, 0, 309, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x72e6e8004829ULL }, // Inst #21125 = VRSQRT28SSZrbk |
| 26032 | { 21124, 3, 1, 0, 309, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x70e6e8004829ULL }, // Inst #21124 = VRSQRT28SSZrb |
| 26033 | { 21123, 3, 1, 0, 309, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60e6e8004829ULL }, // Inst #21123 = VRSQRT28SSZr |
| 26034 | { 21122, 8, 1, 0, 308, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66e6e8004819ULL }, // Inst #21122 = VRSQRT28SSZmkz |
| 26035 | { 21121, 9, 1, 0, 308, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62e6e8004819ULL }, // Inst #21121 = VRSQRT28SSZmk |
| 26036 | { 21120, 7, 1, 0, 308, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60e6e8004819ULL }, // Inst #21120 = VRSQRT28SSZm |
| 26037 | { 21119, 4, 1, 0, 309, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86e6f0024829ULL }, // Inst #21119 = VRSQRT28SDZrkz |
| 26038 | { 21118, 5, 1, 0, 309, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82e6f0024829ULL }, // Inst #21118 = VRSQRT28SDZrk |
| 26039 | { 21117, 4, 1, 0, 309, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x96e6f0024829ULL }, // Inst #21117 = VRSQRT28SDZrbkz |
| 26040 | { 21116, 5, 1, 0, 309, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x92e6f0024829ULL }, // Inst #21116 = VRSQRT28SDZrbk |
| 26041 | { 21115, 3, 1, 0, 309, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x90e6f0024829ULL }, // Inst #21115 = VRSQRT28SDZrb |
| 26042 | { 21114, 3, 1, 0, 309, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80e6f0024829ULL }, // Inst #21114 = VRSQRT28SDZr |
| 26043 | { 21113, 8, 1, 0, 308, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86e6f0024819ULL }, // Inst #21113 = VRSQRT28SDZmkz |
| 26044 | { 21112, 9, 1, 0, 308, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82e6f0024819ULL }, // Inst #21112 = VRSQRT28SDZmk |
| 26045 | { 21111, 7, 1, 0, 308, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80e6f0024819ULL }, // Inst #21111 = VRSQRT28SDZm |
| 26046 | { 21110, 3, 1, 0, 580, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6668004829ULL }, // Inst #21110 = VRSQRT28PSZrkz |
| 26047 | { 21109, 4, 1, 0, 580, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6668004829ULL }, // Inst #21109 = VRSQRT28PSZrk |
| 26048 | { 21108, 3, 1, 0, 580, 1, 0, 2843, X86ImpOpBase + 78, 0, 0x7e6668004829ULL }, // Inst #21108 = VRSQRT28PSZrbkz |
| 26049 | { 21107, 4, 1, 0, 580, 1, 0, 2839, X86ImpOpBase + 78, 0, 0x7a6668004829ULL }, // Inst #21107 = VRSQRT28PSZrbk |
| 26050 | { 21106, 2, 1, 0, 580, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x786668004829ULL }, // Inst #21106 = VRSQRT28PSZrb |
| 26051 | { 21105, 2, 1, 0, 580, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86668004829ULL }, // Inst #21105 = VRSQRT28PSZr |
| 26052 | { 21104, 7, 1, 0, 579, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6668004819ULL }, // Inst #21104 = VRSQRT28PSZmkz |
| 26053 | { 21103, 8, 1, 0, 579, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6668004819ULL }, // Inst #21103 = VRSQRT28PSZmk |
| 26054 | { 21102, 7, 1, 0, 579, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e6668004819ULL }, // Inst #21102 = VRSQRT28PSZmbkz |
| 26055 | { 21101, 8, 1, 0, 579, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a6668004819ULL }, // Inst #21101 = VRSQRT28PSZmbk |
| 26056 | { 21100, 6, 1, 0, 579, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x786668004819ULL }, // Inst #21100 = VRSQRT28PSZmb |
| 26057 | { 21099, 6, 1, 0, 579, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86668004819ULL }, // Inst #21099 = VRSQRT28PSZm |
| 26058 | { 21098, 3, 1, 0, 580, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6670024829ULL }, // Inst #21098 = VRSQRT28PDZrkz |
| 26059 | { 21097, 4, 1, 0, 580, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6670024829ULL }, // Inst #21097 = VRSQRT28PDZrk |
| 26060 | { 21096, 3, 1, 0, 580, 1, 0, 2808, X86ImpOpBase + 78, 0, 0x9e6670024829ULL }, // Inst #21096 = VRSQRT28PDZrbkz |
| 26061 | { 21095, 4, 1, 0, 580, 1, 0, 2804, X86ImpOpBase + 78, 0, 0x9a6670024829ULL }, // Inst #21095 = VRSQRT28PDZrbk |
| 26062 | { 21094, 2, 1, 0, 580, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x986670024829ULL }, // Inst #21094 = VRSQRT28PDZrb |
| 26063 | { 21093, 2, 1, 0, 580, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86670024829ULL }, // Inst #21093 = VRSQRT28PDZr |
| 26064 | { 21092, 7, 1, 0, 579, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6670024819ULL }, // Inst #21092 = VRSQRT28PDZmkz |
| 26065 | { 21091, 8, 1, 0, 579, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6670024819ULL }, // Inst #21091 = VRSQRT28PDZmk |
| 26066 | { 21090, 7, 1, 0, 579, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e6670024819ULL }, // Inst #21090 = VRSQRT28PDZmbkz |
| 26067 | { 21089, 8, 1, 0, 579, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a6670024819ULL }, // Inst #21089 = VRSQRT28PDZmbk |
| 26068 | { 21088, 6, 1, 0, 579, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x986670024819ULL }, // Inst #21088 = VRSQRT28PDZmb |
| 26069 | { 21087, 6, 1, 0, 579, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86670024819ULL }, // Inst #21087 = VRSQRT28PDZm |
| 26070 | { 21086, 4, 1, 0, 309, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x66a7e8004829ULL }, // Inst #21086 = VRSQRT14SSZrrkz |
| 26071 | { 21085, 5, 1, 0, 309, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x62a7e8004829ULL }, // Inst #21085 = VRSQRT14SSZrrk |
| 26072 | { 21084, 3, 1, 0, 309, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x60a7e8004829ULL }, // Inst #21084 = VRSQRT14SSZrr |
| 26073 | { 21083, 8, 1, 0, 308, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x66a7e8004819ULL }, // Inst #21083 = VRSQRT14SSZrmkz |
| 26074 | { 21082, 9, 1, 0, 308, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x62a7e8004819ULL }, // Inst #21082 = VRSQRT14SSZrmk |
| 26075 | { 21081, 7, 1, 0, 308, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x60a7e8004819ULL }, // Inst #21081 = VRSQRT14SSZrm |
| 26076 | { 21080, 4, 1, 0, 309, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x86a7f0024829ULL }, // Inst #21080 = VRSQRT14SDZrrkz |
| 26077 | { 21079, 5, 1, 0, 309, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x82a7f0024829ULL }, // Inst #21079 = VRSQRT14SDZrrk |
| 26078 | { 21078, 3, 1, 0, 309, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x80a7f0024829ULL }, // Inst #21078 = VRSQRT14SDZrr |
| 26079 | { 21077, 8, 1, 0, 308, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x86a7f0024819ULL }, // Inst #21077 = VRSQRT14SDZrmkz |
| 26080 | { 21076, 9, 1, 0, 308, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x82a7f0024819ULL }, // Inst #21076 = VRSQRT14SDZrmk |
| 26081 | { 21075, 7, 1, 0, 308, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x80a7f0024819ULL }, // Inst #21075 = VRSQRT14SDZrm |
| 26082 | { 21074, 3, 1, 0, 1134, 1, 0, 2843, X86ImpOpBase + 78, 0, 0xee2768004829ULL }, // Inst #21074 = VRSQRT14PSZrkz |
| 26083 | { 21073, 4, 1, 0, 2423, 1, 0, 2839, X86ImpOpBase + 78, 0, 0xea2768004829ULL }, // Inst #21073 = VRSQRT14PSZrk |
| 26084 | { 21072, 2, 1, 0, 2422, 1, 0, 2802, X86ImpOpBase + 78, 0, 0xe82768004829ULL }, // Inst #21072 = VRSQRT14PSZr |
| 26085 | { 21071, 7, 1, 0, 579, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xee2768004819ULL }, // Inst #21071 = VRSQRT14PSZmkz |
| 26086 | { 21070, 8, 1, 0, 579, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xea2768004819ULL }, // Inst #21070 = VRSQRT14PSZmk |
| 26087 | { 21069, 7, 1, 0, 579, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7e2768004819ULL }, // Inst #21069 = VRSQRT14PSZmbkz |
| 26088 | { 21068, 8, 1, 0, 579, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7a2768004819ULL }, // Inst #21068 = VRSQRT14PSZmbk |
| 26089 | { 21067, 6, 1, 0, 579, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x782768004819ULL }, // Inst #21067 = VRSQRT14PSZmb |
| 26090 | { 21066, 6, 1, 0, 579, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe82768004819ULL }, // Inst #21066 = VRSQRT14PSZm |
| 26091 | { 21065, 3, 1, 0, 1133, 1, 0, 2829, X86ImpOpBase + 78, 0, 0xc72768004829ULL }, // Inst #21065 = VRSQRT14PSZ256rkz |
| 26092 | { 21064, 4, 1, 0, 1133, 1, 0, 2825, X86ImpOpBase + 78, 0, 0xc32768004829ULL }, // Inst #21064 = VRSQRT14PSZ256rk |
| 26093 | { 21063, 2, 1, 0, 1133, 1, 0, 2780, X86ImpOpBase + 78, 0, 0xc12768004829ULL }, // Inst #21063 = VRSQRT14PSZ256r |
| 26094 | { 21062, 7, 1, 0, 577, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc72768004819ULL }, // Inst #21062 = VRSQRT14PSZ256mkz |
| 26095 | { 21061, 8, 1, 0, 577, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc32768004819ULL }, // Inst #21061 = VRSQRT14PSZ256mk |
| 26096 | { 21060, 7, 1, 0, 577, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x772768004819ULL }, // Inst #21060 = VRSQRT14PSZ256mbkz |
| 26097 | { 21059, 8, 1, 0, 577, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x732768004819ULL }, // Inst #21059 = VRSQRT14PSZ256mbk |
| 26098 | { 21058, 6, 1, 0, 577, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x712768004819ULL }, // Inst #21058 = VRSQRT14PSZ256mb |
| 26099 | { 21057, 6, 1, 0, 577, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc12768004819ULL }, // Inst #21057 = VRSQRT14PSZ256m |
| 26100 | { 21056, 3, 1, 0, 1132, 1, 0, 2404, X86ImpOpBase + 78, 0, 0xa62768004829ULL }, // Inst #21056 = VRSQRT14PSZ128rkz |
| 26101 | { 21055, 4, 1, 0, 1132, 1, 0, 2400, X86ImpOpBase + 78, 0, 0xa22768004829ULL }, // Inst #21055 = VRSQRT14PSZ128rk |
| 26102 | { 21054, 2, 1, 0, 1132, 1, 0, 2398, X86ImpOpBase + 78, 0, 0xa02768004829ULL }, // Inst #21054 = VRSQRT14PSZ128r |
| 26103 | { 21053, 7, 1, 0, 576, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa62768004819ULL }, // Inst #21053 = VRSQRT14PSZ128mkz |
| 26104 | { 21052, 8, 1, 0, 576, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa22768004819ULL }, // Inst #21052 = VRSQRT14PSZ128mk |
| 26105 | { 21051, 7, 1, 0, 576, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x762768004819ULL }, // Inst #21051 = VRSQRT14PSZ128mbkz |
| 26106 | { 21050, 8, 1, 0, 576, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x722768004819ULL }, // Inst #21050 = VRSQRT14PSZ128mbk |
| 26107 | { 21049, 6, 1, 0, 576, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x702768004819ULL }, // Inst #21049 = VRSQRT14PSZ128mb |
| 26108 | { 21048, 6, 1, 0, 576, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa02768004819ULL }, // Inst #21048 = VRSQRT14PSZ128m |
| 26109 | { 21047, 3, 1, 0, 1134, 1, 0, 2808, X86ImpOpBase + 78, 0, 0xee2770024829ULL }, // Inst #21047 = VRSQRT14PDZrkz |
| 26110 | { 21046, 4, 1, 0, 1134, 1, 0, 2804, X86ImpOpBase + 78, 0, 0xea2770024829ULL }, // Inst #21046 = VRSQRT14PDZrk |
| 26111 | { 21045, 2, 1, 0, 2422, 1, 0, 2802, X86ImpOpBase + 78, 0, 0xe82770024829ULL }, // Inst #21045 = VRSQRT14PDZr |
| 26112 | { 21044, 7, 1, 0, 579, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xee2770024819ULL }, // Inst #21044 = VRSQRT14PDZmkz |
| 26113 | { 21043, 8, 1, 0, 579, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xea2770024819ULL }, // Inst #21043 = VRSQRT14PDZmk |
| 26114 | { 21042, 7, 1, 0, 579, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x9e2770024819ULL }, // Inst #21042 = VRSQRT14PDZmbkz |
| 26115 | { 21041, 8, 1, 0, 579, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x9a2770024819ULL }, // Inst #21041 = VRSQRT14PDZmbk |
| 26116 | { 21040, 6, 1, 0, 579, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x982770024819ULL }, // Inst #21040 = VRSQRT14PDZmb |
| 26117 | { 21039, 6, 1, 0, 579, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe82770024819ULL }, // Inst #21039 = VRSQRT14PDZm |
| 26118 | { 21038, 3, 1, 0, 1133, 1, 0, 2786, X86ImpOpBase + 78, 0, 0xc72770024829ULL }, // Inst #21038 = VRSQRT14PDZ256rkz |
| 26119 | { 21037, 4, 1, 0, 1133, 1, 0, 2782, X86ImpOpBase + 78, 0, 0xc32770024829ULL }, // Inst #21037 = VRSQRT14PDZ256rk |
| 26120 | { 21036, 2, 1, 0, 1133, 1, 0, 2780, X86ImpOpBase + 78, 0, 0xc12770024829ULL }, // Inst #21036 = VRSQRT14PDZ256r |
| 26121 | { 21035, 7, 1, 0, 577, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc72770024819ULL }, // Inst #21035 = VRSQRT14PDZ256mkz |
| 26122 | { 21034, 8, 1, 0, 577, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc32770024819ULL }, // Inst #21034 = VRSQRT14PDZ256mk |
| 26123 | { 21033, 7, 1, 0, 577, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x972770024819ULL }, // Inst #21033 = VRSQRT14PDZ256mbkz |
| 26124 | { 21032, 8, 1, 0, 577, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x932770024819ULL }, // Inst #21032 = VRSQRT14PDZ256mbk |
| 26125 | { 21031, 6, 1, 0, 577, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x912770024819ULL }, // Inst #21031 = VRSQRT14PDZ256mb |
| 26126 | { 21030, 6, 1, 0, 577, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc12770024819ULL }, // Inst #21030 = VRSQRT14PDZ256m |
| 26127 | { 21029, 3, 1, 0, 1132, 1, 0, 2770, X86ImpOpBase + 78, 0, 0xa62770024829ULL }, // Inst #21029 = VRSQRT14PDZ128rkz |
| 26128 | { 21028, 4, 1, 0, 1132, 1, 0, 2766, X86ImpOpBase + 78, 0, 0xa22770024829ULL }, // Inst #21028 = VRSQRT14PDZ128rk |
| 26129 | { 21027, 2, 1, 0, 1132, 1, 0, 2398, X86ImpOpBase + 78, 0, 0xa02770024829ULL }, // Inst #21027 = VRSQRT14PDZ128r |
| 26130 | { 21026, 7, 1, 0, 576, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa62770024819ULL }, // Inst #21026 = VRSQRT14PDZ128mkz |
| 26131 | { 21025, 8, 1, 0, 576, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa22770024819ULL }, // Inst #21025 = VRSQRT14PDZ128mk |
| 26132 | { 21024, 7, 1, 0, 576, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x962770024819ULL }, // Inst #21024 = VRSQRT14PDZ128mbkz |
| 26133 | { 21023, 8, 1, 0, 576, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x922770024819ULL }, // Inst #21023 = VRSQRT14PDZ128mbk |
| 26134 | { 21022, 6, 1, 0, 576, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x902770024819ULL }, // Inst #21022 = VRSQRT14PDZ128mb |
| 26135 | { 21021, 6, 1, 0, 576, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa02770024819ULL }, // Inst #21021 = VRSQRT14PDZ128m |
| 26136 | { 21020, 4, 1, 0, 1875, 1, 0, 915, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8528046829ULL }, // Inst #21020 = VROUNDSSri_Int |
| 26137 | { 21019, 4, 1, 0, 1875, 1, 0, 847, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8528046829ULL }, // Inst #21019 = VROUNDSSri |
| 26138 | { 21018, 8, 1, 0, 1874, 1, 0, 2267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8528046819ULL }, // Inst #21018 = VROUNDSSmi_Int |
| 26139 | { 21017, 8, 1, 0, 1874, 1, 0, 2727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8528046819ULL }, // Inst #21017 = VROUNDSSmi |
| 26140 | { 21016, 4, 1, 0, 1875, 1, 0, 915, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x85b0046829ULL }, // Inst #21016 = VROUNDSDri_Int |
| 26141 | { 21015, 4, 1, 0, 1875, 1, 0, 855, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x85b0046829ULL }, // Inst #21015 = VROUNDSDri |
| 26142 | { 21014, 8, 1, 0, 1874, 1, 0, 2267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x85b0046819ULL }, // Inst #21014 = VROUNDSDmi_Int |
| 26143 | { 21013, 8, 1, 0, 1874, 1, 0, 2695, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x85b0046819ULL }, // Inst #21013 = VROUNDSDmi |
| 26144 | { 21012, 3, 1, 0, 1875, 1, 0, 566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x428046829ULL }, // Inst #21012 = VROUNDPSri |
| 26145 | { 21011, 7, 1, 0, 1873, 1, 0, 559, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x428046819ULL }, // Inst #21011 = VROUNDPSmi |
| 26146 | { 21010, 3, 1, 0, 1876, 1, 0, 5616, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x10428046829ULL }, // Inst #21010 = VROUNDPSYri |
| 26147 | { 21009, 7, 1, 0, 2201, 1, 0, 5609, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x10428046819ULL }, // Inst #21009 = VROUNDPSYmi |
| 26148 | { 21008, 3, 1, 0, 1875, 1, 0, 566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4b0046829ULL }, // Inst #21008 = VROUNDPDri |
| 26149 | { 21007, 7, 1, 0, 1873, 1, 0, 559, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4b0046819ULL }, // Inst #21007 = VROUNDPDmi |
| 26150 | { 21006, 3, 1, 0, 1876, 1, 0, 5616, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x104b0046829ULL }, // Inst #21006 = VROUNDPDYri |
| 26151 | { 21005, 7, 1, 0, 2201, 1, 0, 5609, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x104b0046819ULL }, // Inst #21005 = VROUNDPDYmi |
| 26152 | { 21004, 5, 1, 0, 1875, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x668568046829ULL }, // Inst #21004 = VRNDSCALESSZrrikz_Int |
| 26153 | { 21003, 6, 1, 0, 1875, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x628568046829ULL }, // Inst #21003 = VRNDSCALESSZrrik_Int |
| 26154 | { 21002, 5, 1, 0, 1875, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x768568046829ULL }, // Inst #21002 = VRNDSCALESSZrribkz_Int |
| 26155 | { 21001, 6, 1, 0, 1875, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x728568046829ULL }, // Inst #21001 = VRNDSCALESSZrribk_Int |
| 26156 | { 21000, 4, 1, 0, 1875, 1, 0, 919, X86ImpOpBase + 78, 0, 0x708568046829ULL }, // Inst #21000 = VRNDSCALESSZrrib_Int |
| 26157 | { 20999, 4, 1, 0, 1875, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x608568046829ULL }, // Inst #20999 = VRNDSCALESSZrri_Int |
| 26158 | { 20998, 4, 1, 0, 1875, 1, 0, 851, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x608568046829ULL }, // Inst #20998 = VRNDSCALESSZrri |
| 26159 | { 20997, 9, 1, 0, 1874, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x668568046819ULL }, // Inst #20997 = VRNDSCALESSZrmikz_Int |
| 26160 | { 20996, 10, 1, 0, 1874, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x628568046819ULL }, // Inst #20996 = VRNDSCALESSZrmik_Int |
| 26161 | { 20995, 8, 1, 0, 1874, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x608568046819ULL }, // Inst #20995 = VRNDSCALESSZrmi_Int |
| 26162 | { 20994, 8, 1, 0, 1874, 1, 0, 4894, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x608568046819ULL }, // Inst #20994 = VRNDSCALESSZrmi |
| 26163 | { 20993, 5, 1, 0, 2413, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x468568046029ULL }, // Inst #20993 = VRNDSCALESHZrrikz_Int |
| 26164 | { 20992, 6, 1, 0, 2413, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x428568046029ULL }, // Inst #20992 = VRNDSCALESHZrrik_Int |
| 26165 | { 20991, 5, 1, 0, 2413, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x568568046029ULL }, // Inst #20991 = VRNDSCALESHZrribkz_Int |
| 26166 | { 20990, 6, 1, 0, 2413, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x528568046029ULL }, // Inst #20990 = VRNDSCALESHZrribk_Int |
| 26167 | { 20989, 4, 1, 0, 2215, 1, 0, 919, X86ImpOpBase + 78, 0, 0x508568046029ULL }, // Inst #20989 = VRNDSCALESHZrrib_Int |
| 26168 | { 20988, 4, 1, 0, 2215, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x408568046029ULL }, // Inst #20988 = VRNDSCALESHZrri_Int |
| 26169 | { 20987, 4, 1, 0, 2219, 1, 0, 843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x408568046029ULL }, // Inst #20987 = VRNDSCALESHZrri |
| 26170 | { 20986, 9, 1, 0, 2408, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x468568046019ULL }, // Inst #20986 = VRNDSCALESHZrmikz_Int |
| 26171 | { 20985, 10, 1, 0, 2408, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x428568046019ULL }, // Inst #20985 = VRNDSCALESHZrmik_Int |
| 26172 | { 20984, 8, 1, 0, 2203, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x408568046019ULL }, // Inst #20984 = VRNDSCALESHZrmi_Int |
| 26173 | { 20983, 8, 1, 0, 2203, 1, 0, 4886, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x408568046019ULL }, // Inst #20983 = VRNDSCALESHZrmi |
| 26174 | { 20982, 5, 1, 0, 1875, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8685f0066829ULL }, // Inst #20982 = VRNDSCALESDZrrikz_Int |
| 26175 | { 20981, 6, 1, 0, 1875, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8285f0066829ULL }, // Inst #20981 = VRNDSCALESDZrrik_Int |
| 26176 | { 20980, 5, 1, 0, 1875, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x9685f0066829ULL }, // Inst #20980 = VRNDSCALESDZrribkz_Int |
| 26177 | { 20979, 6, 1, 0, 1875, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x9285f0066829ULL }, // Inst #20979 = VRNDSCALESDZrribk_Int |
| 26178 | { 20978, 4, 1, 0, 1875, 1, 0, 919, X86ImpOpBase + 78, 0, 0x9085f0066829ULL }, // Inst #20978 = VRNDSCALESDZrrib_Int |
| 26179 | { 20977, 4, 1, 0, 1875, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8085f0066829ULL }, // Inst #20977 = VRNDSCALESDZrri_Int |
| 26180 | { 20976, 4, 1, 0, 1875, 1, 0, 859, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8085f0066829ULL }, // Inst #20976 = VRNDSCALESDZrri |
| 26181 | { 20975, 9, 1, 0, 1874, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8685f0066819ULL }, // Inst #20975 = VRNDSCALESDZrmikz_Int |
| 26182 | { 20974, 10, 1, 0, 1874, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8285f0066819ULL }, // Inst #20974 = VRNDSCALESDZrmik_Int |
| 26183 | { 20973, 8, 1, 0, 1874, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8085f0066819ULL }, // Inst #20973 = VRNDSCALESDZrmi_Int |
| 26184 | { 20972, 8, 1, 0, 1874, 1, 0, 4878, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8085f0066819ULL }, // Inst #20972 = VRNDSCALESDZrmi |
| 26185 | { 20971, 4, 1, 0, 2407, 1, 0, 4674, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee0468046829ULL }, // Inst #20971 = VRNDSCALEPSZrrikz |
| 26186 | { 20970, 5, 1, 0, 2407, 1, 0, 4669, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea0468046829ULL }, // Inst #20970 = VRNDSCALEPSZrrik |
| 26187 | { 20969, 4, 1, 0, 2407, 1, 0, 4674, X86ImpOpBase + 78, 0, 0x7e0468046829ULL }, // Inst #20969 = VRNDSCALEPSZrribkz |
| 26188 | { 20968, 5, 1, 0, 2407, 1, 0, 4669, X86ImpOpBase + 78, 0, 0x7a0468046829ULL }, // Inst #20968 = VRNDSCALEPSZrribk |
| 26189 | { 20967, 3, 1, 0, 2407, 1, 0, 4519, X86ImpOpBase + 78, 0, 0x780468046829ULL }, // Inst #20967 = VRNDSCALEPSZrrib |
| 26190 | { 20966, 3, 1, 0, 2407, 1, 0, 4519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe80468046829ULL }, // Inst #20966 = VRNDSCALEPSZrri |
| 26191 | { 20965, 8, 1, 0, 2225, 1, 0, 4661, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee0468046819ULL }, // Inst #20965 = VRNDSCALEPSZrmikz |
| 26192 | { 20964, 9, 1, 0, 2225, 1, 0, 4652, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea0468046819ULL }, // Inst #20964 = VRNDSCALEPSZrmik |
| 26193 | { 20963, 7, 1, 0, 2225, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe80468046819ULL }, // Inst #20963 = VRNDSCALEPSZrmi |
| 26194 | { 20962, 8, 1, 0, 2225, 1, 0, 4661, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e0468046819ULL }, // Inst #20962 = VRNDSCALEPSZrmbikz |
| 26195 | { 20961, 9, 1, 0, 2225, 1, 0, 4652, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a0468046819ULL }, // Inst #20961 = VRNDSCALEPSZrmbik |
| 26196 | { 20960, 7, 1, 0, 2225, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x780468046819ULL }, // Inst #20960 = VRNDSCALEPSZrmbi |
| 26197 | { 20959, 4, 1, 0, 1876, 1, 0, 4648, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc70468046829ULL }, // Inst #20959 = VRNDSCALEPSZ256rrikz |
| 26198 | { 20958, 5, 1, 0, 1876, 1, 0, 4643, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc30468046829ULL }, // Inst #20958 = VRNDSCALEPSZ256rrik |
| 26199 | { 20957, 3, 1, 0, 1876, 1, 0, 4483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc10468046829ULL }, // Inst #20957 = VRNDSCALEPSZ256rri |
| 26200 | { 20956, 8, 1, 0, 2206, 1, 0, 4635, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc70468046819ULL }, // Inst #20956 = VRNDSCALEPSZ256rmikz |
| 26201 | { 20955, 9, 1, 0, 2206, 1, 0, 4626, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc30468046819ULL }, // Inst #20955 = VRNDSCALEPSZ256rmik |
| 26202 | { 20954, 7, 1, 0, 2206, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc10468046819ULL }, // Inst #20954 = VRNDSCALEPSZ256rmi |
| 26203 | { 20953, 8, 1, 0, 2206, 1, 0, 4635, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x770468046819ULL }, // Inst #20953 = VRNDSCALEPSZ256rmbikz |
| 26204 | { 20952, 9, 1, 0, 2206, 1, 0, 4626, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x730468046819ULL }, // Inst #20952 = VRNDSCALEPSZ256rmbik |
| 26205 | { 20951, 7, 1, 0, 2206, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x710468046819ULL }, // Inst #20951 = VRNDSCALEPSZ256rmbi |
| 26206 | { 20950, 4, 1, 0, 1875, 1, 0, 3316, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa60468046829ULL }, // Inst #20950 = VRNDSCALEPSZ128rrikz |
| 26207 | { 20949, 5, 1, 0, 1875, 1, 0, 3311, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa20468046829ULL }, // Inst #20949 = VRNDSCALEPSZ128rrik |
| 26208 | { 20948, 3, 1, 0, 1875, 1, 0, 3308, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa00468046829ULL }, // Inst #20948 = VRNDSCALEPSZ128rri |
| 26209 | { 20947, 8, 1, 0, 1874, 1, 0, 4618, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa60468046819ULL }, // Inst #20947 = VRNDSCALEPSZ128rmikz |
| 26210 | { 20946, 9, 1, 0, 1874, 1, 0, 4609, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa20468046819ULL }, // Inst #20946 = VRNDSCALEPSZ128rmik |
| 26211 | { 20945, 7, 1, 0, 1874, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa00468046819ULL }, // Inst #20945 = VRNDSCALEPSZ128rmi |
| 26212 | { 20944, 8, 1, 0, 1874, 1, 0, 4618, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x760468046819ULL }, // Inst #20944 = VRNDSCALEPSZ128rmbikz |
| 26213 | { 20943, 9, 1, 0, 1874, 1, 0, 4609, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x720468046819ULL }, // Inst #20943 = VRNDSCALEPSZ128rmbik |
| 26214 | { 20942, 7, 1, 0, 1874, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x700468046819ULL }, // Inst #20942 = VRNDSCALEPSZ128rmbi |
| 26215 | { 20941, 4, 1, 0, 2420, 1, 0, 4527, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee0468046029ULL }, // Inst #20941 = VRNDSCALEPHZrrikz |
| 26216 | { 20940, 5, 1, 0, 2420, 1, 0, 4522, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea0468046029ULL }, // Inst #20940 = VRNDSCALEPHZrrik |
| 26217 | { 20939, 4, 1, 0, 2420, 1, 0, 4527, X86ImpOpBase + 78, 0, 0x5e0468046029ULL }, // Inst #20939 = VRNDSCALEPHZrribkz |
| 26218 | { 20938, 5, 1, 0, 2420, 1, 0, 4522, X86ImpOpBase + 78, 0, 0x5a0468046029ULL }, // Inst #20938 = VRNDSCALEPHZrribk |
| 26219 | { 20937, 3, 1, 0, 2230, 1, 0, 4519, X86ImpOpBase + 78, 0, 0x580468046029ULL }, // Inst #20937 = VRNDSCALEPHZrrib |
| 26220 | { 20936, 3, 1, 0, 2230, 1, 0, 4519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe80468046029ULL }, // Inst #20936 = VRNDSCALEPHZrri |
| 26221 | { 20935, 8, 1, 0, 2418, 1, 0, 4511, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee0468046019ULL }, // Inst #20935 = VRNDSCALEPHZrmikz |
| 26222 | { 20934, 9, 1, 0, 2418, 1, 0, 4502, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea0468046019ULL }, // Inst #20934 = VRNDSCALEPHZrmik |
| 26223 | { 20933, 7, 1, 0, 2225, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe80468046019ULL }, // Inst #20933 = VRNDSCALEPHZrmi |
| 26224 | { 20932, 8, 1, 0, 2418, 1, 0, 4511, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e0468046019ULL }, // Inst #20932 = VRNDSCALEPHZrmbikz |
| 26225 | { 20931, 9, 1, 0, 2418, 1, 0, 4502, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a0468046019ULL }, // Inst #20931 = VRNDSCALEPHZrmbik |
| 26226 | { 20930, 7, 1, 0, 2225, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x580468046019ULL }, // Inst #20930 = VRNDSCALEPHZrmbi |
| 26227 | { 20929, 4, 1, 0, 2414, 1, 0, 4491, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc70468046029ULL }, // Inst #20929 = VRNDSCALEPHZ256rrikz |
| 26228 | { 20928, 5, 1, 0, 2414, 1, 0, 4486, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc30468046029ULL }, // Inst #20928 = VRNDSCALEPHZ256rrik |
| 26229 | { 20927, 3, 1, 0, 2216, 1, 0, 4483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc10468046029ULL }, // Inst #20927 = VRNDSCALEPHZ256rri |
| 26230 | { 20926, 8, 1, 0, 2410, 1, 0, 4475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc70468046019ULL }, // Inst #20926 = VRNDSCALEPHZ256rmikz |
| 26231 | { 20925, 9, 1, 0, 2410, 1, 0, 4466, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc30468046019ULL }, // Inst #20925 = VRNDSCALEPHZ256rmik |
| 26232 | { 20924, 7, 1, 0, 2206, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc10468046019ULL }, // Inst #20924 = VRNDSCALEPHZ256rmi |
| 26233 | { 20923, 8, 1, 0, 2410, 1, 0, 4475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x570468046019ULL }, // Inst #20923 = VRNDSCALEPHZ256rmbikz |
| 26234 | { 20922, 9, 1, 0, 2410, 1, 0, 4466, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x530468046019ULL }, // Inst #20922 = VRNDSCALEPHZ256rmbik |
| 26235 | { 20921, 7, 1, 0, 2206, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x510468046019ULL }, // Inst #20921 = VRNDSCALEPHZ256rmbi |
| 26236 | { 20920, 4, 1, 0, 2413, 1, 0, 4455, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa60468046029ULL }, // Inst #20920 = VRNDSCALEPHZ128rrikz |
| 26237 | { 20919, 5, 1, 0, 2413, 1, 0, 4450, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa20468046029ULL }, // Inst #20919 = VRNDSCALEPHZ128rrik |
| 26238 | { 20918, 3, 1, 0, 2215, 1, 0, 3308, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa00468046029ULL }, // Inst #20918 = VRNDSCALEPHZ128rri |
| 26239 | { 20917, 8, 1, 0, 2408, 1, 0, 4442, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa60468046019ULL }, // Inst #20917 = VRNDSCALEPHZ128rmikz |
| 26240 | { 20916, 9, 1, 0, 2408, 1, 0, 4433, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa20468046019ULL }, // Inst #20916 = VRNDSCALEPHZ128rmik |
| 26241 | { 20915, 7, 1, 0, 2203, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa00468046019ULL }, // Inst #20915 = VRNDSCALEPHZ128rmi |
| 26242 | { 20914, 8, 1, 0, 2408, 1, 0, 4442, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x560468046019ULL }, // Inst #20914 = VRNDSCALEPHZ128rmbikz |
| 26243 | { 20913, 9, 1, 0, 2408, 1, 0, 4433, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x520468046019ULL }, // Inst #20913 = VRNDSCALEPHZ128rmbik |
| 26244 | { 20912, 7, 1, 0, 2203, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x500468046019ULL }, // Inst #20912 = VRNDSCALEPHZ128rmbi |
| 26245 | { 20911, 4, 1, 0, 2407, 1, 0, 4605, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee04f0066829ULL }, // Inst #20911 = VRNDSCALEPDZrrikz |
| 26246 | { 20910, 5, 1, 0, 2407, 1, 0, 4600, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea04f0066829ULL }, // Inst #20910 = VRNDSCALEPDZrrik |
| 26247 | { 20909, 4, 1, 0, 2407, 1, 0, 4605, X86ImpOpBase + 78, 0, 0x9e04f0066829ULL }, // Inst #20909 = VRNDSCALEPDZrribkz |
| 26248 | { 20908, 5, 1, 0, 2407, 1, 0, 4600, X86ImpOpBase + 78, 0, 0x9a04f0066829ULL }, // Inst #20908 = VRNDSCALEPDZrribk |
| 26249 | { 20907, 3, 1, 0, 2407, 1, 0, 4519, X86ImpOpBase + 78, 0, 0x9804f0066829ULL }, // Inst #20907 = VRNDSCALEPDZrrib |
| 26250 | { 20906, 3, 1, 0, 2407, 1, 0, 4519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe804f0066829ULL }, // Inst #20906 = VRNDSCALEPDZrri |
| 26251 | { 20905, 8, 1, 0, 2225, 1, 0, 4592, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee04f0066819ULL }, // Inst #20905 = VRNDSCALEPDZrmikz |
| 26252 | { 20904, 9, 1, 0, 2225, 1, 0, 4583, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea04f0066819ULL }, // Inst #20904 = VRNDSCALEPDZrmik |
| 26253 | { 20903, 7, 1, 0, 2225, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe804f0066819ULL }, // Inst #20903 = VRNDSCALEPDZrmi |
| 26254 | { 20902, 8, 1, 0, 2225, 1, 0, 4592, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e04f0066819ULL }, // Inst #20902 = VRNDSCALEPDZrmbikz |
| 26255 | { 20901, 9, 1, 0, 2225, 1, 0, 4583, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a04f0066819ULL }, // Inst #20901 = VRNDSCALEPDZrmbik |
| 26256 | { 20900, 7, 1, 0, 2225, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9804f0066819ULL }, // Inst #20900 = VRNDSCALEPDZrmbi |
| 26257 | { 20899, 4, 1, 0, 1876, 1, 0, 4579, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc704f0066829ULL }, // Inst #20899 = VRNDSCALEPDZ256rrikz |
| 26258 | { 20898, 5, 1, 0, 1876, 1, 0, 4574, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc304f0066829ULL }, // Inst #20898 = VRNDSCALEPDZ256rrik |
| 26259 | { 20897, 3, 1, 0, 1876, 1, 0, 4483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc104f0066829ULL }, // Inst #20897 = VRNDSCALEPDZ256rri |
| 26260 | { 20896, 8, 1, 0, 2206, 1, 0, 4566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc704f0066819ULL }, // Inst #20896 = VRNDSCALEPDZ256rmikz |
| 26261 | { 20895, 9, 1, 0, 2206, 1, 0, 4557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc304f0066819ULL }, // Inst #20895 = VRNDSCALEPDZ256rmik |
| 26262 | { 20894, 7, 1, 0, 2206, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc104f0066819ULL }, // Inst #20894 = VRNDSCALEPDZ256rmi |
| 26263 | { 20893, 8, 1, 0, 2206, 1, 0, 4566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9704f0066819ULL }, // Inst #20893 = VRNDSCALEPDZ256rmbikz |
| 26264 | { 20892, 9, 1, 0, 2206, 1, 0, 4557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9304f0066819ULL }, // Inst #20892 = VRNDSCALEPDZ256rmbik |
| 26265 | { 20891, 7, 1, 0, 2206, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9104f0066819ULL }, // Inst #20891 = VRNDSCALEPDZ256rmbi |
| 26266 | { 20890, 4, 1, 0, 1875, 1, 0, 4553, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa604f0066829ULL }, // Inst #20890 = VRNDSCALEPDZ128rrikz |
| 26267 | { 20889, 5, 1, 0, 1875, 1, 0, 4548, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa204f0066829ULL }, // Inst #20889 = VRNDSCALEPDZ128rrik |
| 26268 | { 20888, 3, 1, 0, 1875, 1, 0, 3308, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa004f0066829ULL }, // Inst #20888 = VRNDSCALEPDZ128rri |
| 26269 | { 20887, 8, 1, 0, 1874, 1, 0, 4540, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa604f0066819ULL }, // Inst #20887 = VRNDSCALEPDZ128rmikz |
| 26270 | { 20886, 9, 1, 0, 1874, 1, 0, 4531, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa204f0066819ULL }, // Inst #20886 = VRNDSCALEPDZ128rmik |
| 26271 | { 20885, 7, 1, 0, 1874, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa004f0066819ULL }, // Inst #20885 = VRNDSCALEPDZ128rmi |
| 26272 | { 20884, 8, 1, 0, 1874, 1, 0, 4540, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9604f0066819ULL }, // Inst #20884 = VRNDSCALEPDZ128rmbikz |
| 26273 | { 20883, 9, 1, 0, 1874, 1, 0, 4531, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9204f0066819ULL }, // Inst #20883 = VRNDSCALEPDZ128rmbik |
| 26274 | { 20882, 7, 1, 0, 1874, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9004f0066819ULL }, // Inst #20882 = VRNDSCALEPDZ128rmbi |
| 26275 | { 20881, 4, 1, 0, 452, 0, 0, 4527, X86ImpOpBase + 0, 0, 0xee0478047829ULL }, // Inst #20881 = VRNDSCALEBF16Zrrikz |
| 26276 | { 20880, 5, 1, 0, 452, 0, 0, 4522, X86ImpOpBase + 0, 0, 0xea0478047829ULL }, // Inst #20880 = VRNDSCALEBF16Zrrik |
| 26277 | { 20879, 3, 1, 0, 452, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe80478047829ULL }, // Inst #20879 = VRNDSCALEBF16Zrri |
| 26278 | { 20878, 8, 1, 0, 451, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0478047819ULL }, // Inst #20878 = VRNDSCALEBF16Zrmikz |
| 26279 | { 20877, 9, 1, 0, 451, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0478047819ULL }, // Inst #20877 = VRNDSCALEBF16Zrmik |
| 26280 | { 20876, 7, 1, 0, 451, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80478047819ULL }, // Inst #20876 = VRNDSCALEBF16Zrmi |
| 26281 | { 20875, 8, 1, 0, 451, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e0478047819ULL }, // Inst #20875 = VRNDSCALEBF16Zrmbikz |
| 26282 | { 20874, 9, 1, 0, 451, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a0478047819ULL }, // Inst #20874 = VRNDSCALEBF16Zrmbik |
| 26283 | { 20873, 7, 1, 0, 451, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x580478047819ULL }, // Inst #20873 = VRNDSCALEBF16Zrmbi |
| 26284 | { 20872, 4, 1, 0, 449, 0, 0, 4491, X86ImpOpBase + 0, 0, 0xc70478047829ULL }, // Inst #20872 = VRNDSCALEBF16Z256rrikz |
| 26285 | { 20871, 5, 1, 0, 449, 0, 0, 4486, X86ImpOpBase + 0, 0, 0xc30478047829ULL }, // Inst #20871 = VRNDSCALEBF16Z256rrik |
| 26286 | { 20870, 3, 1, 0, 449, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc10478047829ULL }, // Inst #20870 = VRNDSCALEBF16Z256rri |
| 26287 | { 20869, 8, 1, 0, 448, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70478047819ULL }, // Inst #20869 = VRNDSCALEBF16Z256rmikz |
| 26288 | { 20868, 9, 1, 0, 448, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30478047819ULL }, // Inst #20868 = VRNDSCALEBF16Z256rmik |
| 26289 | { 20867, 7, 1, 0, 448, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10478047819ULL }, // Inst #20867 = VRNDSCALEBF16Z256rmi |
| 26290 | { 20866, 8, 1, 0, 448, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x570478047819ULL }, // Inst #20866 = VRNDSCALEBF16Z256rmbikz |
| 26291 | { 20865, 9, 1, 0, 448, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x530478047819ULL }, // Inst #20865 = VRNDSCALEBF16Z256rmbik |
| 26292 | { 20864, 7, 1, 0, 448, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x510478047819ULL }, // Inst #20864 = VRNDSCALEBF16Z256rmbi |
| 26293 | { 20863, 4, 1, 0, 303, 0, 0, 4455, X86ImpOpBase + 0, 0, 0xa60478047829ULL }, // Inst #20863 = VRNDSCALEBF16Z128rrikz |
| 26294 | { 20862, 5, 1, 0, 303, 0, 0, 4450, X86ImpOpBase + 0, 0, 0xa20478047829ULL }, // Inst #20862 = VRNDSCALEBF16Z128rrik |
| 26295 | { 20861, 3, 1, 0, 303, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa00478047829ULL }, // Inst #20861 = VRNDSCALEBF16Z128rri |
| 26296 | { 20860, 8, 1, 0, 304, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60478047819ULL }, // Inst #20860 = VRNDSCALEBF16Z128rmikz |
| 26297 | { 20859, 9, 1, 0, 304, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa20478047819ULL }, // Inst #20859 = VRNDSCALEBF16Z128rmik |
| 26298 | { 20858, 7, 1, 0, 304, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa00478047819ULL }, // Inst #20858 = VRNDSCALEBF16Z128rmi |
| 26299 | { 20857, 8, 1, 0, 304, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x560478047819ULL }, // Inst #20857 = VRNDSCALEBF16Z128rmbikz |
| 26300 | { 20856, 9, 1, 0, 304, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x520478047819ULL }, // Inst #20856 = VRNDSCALEBF16Z128rmbik |
| 26301 | { 20855, 7, 1, 0, 304, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x500478047819ULL }, // Inst #20855 = VRNDSCALEBF16Z128rmbi |
| 26302 | { 20854, 5, 1, 0, 1074, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66abe8046829ULL }, // Inst #20854 = VREDUCESSZrrikz |
| 26303 | { 20853, 6, 1, 0, 1074, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62abe8046829ULL }, // Inst #20853 = VREDUCESSZrrik |
| 26304 | { 20852, 5, 1, 0, 1074, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x76abe8046829ULL }, // Inst #20852 = VREDUCESSZrribkz |
| 26305 | { 20851, 6, 1, 0, 1074, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x72abe8046829ULL }, // Inst #20851 = VREDUCESSZrribk |
| 26306 | { 20850, 4, 1, 0, 1074, 1, 0, 919, X86ImpOpBase + 78, 0, 0x70abe8046829ULL }, // Inst #20850 = VREDUCESSZrrib |
| 26307 | { 20849, 4, 1, 0, 1074, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60abe8046829ULL }, // Inst #20849 = VREDUCESSZrri |
| 26308 | { 20848, 9, 1, 0, 304, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66abe8046819ULL }, // Inst #20848 = VREDUCESSZrmikz |
| 26309 | { 20847, 10, 1, 0, 304, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62abe8046819ULL }, // Inst #20847 = VREDUCESSZrmik |
| 26310 | { 20846, 8, 1, 0, 304, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60abe8046819ULL }, // Inst #20846 = VREDUCESSZrmi |
| 26311 | { 20845, 5, 1, 0, 2401, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x46abe8046029ULL }, // Inst #20845 = VREDUCESHZrrikz |
| 26312 | { 20844, 6, 1, 0, 2401, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x42abe8046029ULL }, // Inst #20844 = VREDUCESHZrrik |
| 26313 | { 20843, 5, 1, 0, 2401, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x56abe8046029ULL }, // Inst #20843 = VREDUCESHZrribkz |
| 26314 | { 20842, 6, 1, 0, 2401, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x52abe8046029ULL }, // Inst #20842 = VREDUCESHZrribk |
| 26315 | { 20841, 4, 1, 0, 2399, 1, 0, 919, X86ImpOpBase + 78, 0, 0x50abe8046029ULL }, // Inst #20841 = VREDUCESHZrrib |
| 26316 | { 20840, 4, 1, 0, 2399, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40abe8046029ULL }, // Inst #20840 = VREDUCESHZrri |
| 26317 | { 20839, 9, 1, 0, 2397, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46abe8046019ULL }, // Inst #20839 = VREDUCESHZrmikz |
| 26318 | { 20838, 10, 1, 0, 2397, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42abe8046019ULL }, // Inst #20838 = VREDUCESHZrmik |
| 26319 | { 20837, 8, 1, 0, 2395, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40abe8046019ULL }, // Inst #20837 = VREDUCESHZrmi |
| 26320 | { 20836, 5, 1, 0, 1074, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86abf0066829ULL }, // Inst #20836 = VREDUCESDZrrikz |
| 26321 | { 20835, 6, 1, 0, 1074, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82abf0066829ULL }, // Inst #20835 = VREDUCESDZrrik |
| 26322 | { 20834, 5, 1, 0, 1074, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x96abf0066829ULL }, // Inst #20834 = VREDUCESDZrribkz |
| 26323 | { 20833, 6, 1, 0, 1074, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x92abf0066829ULL }, // Inst #20833 = VREDUCESDZrribk |
| 26324 | { 20832, 4, 1, 0, 1074, 1, 0, 919, X86ImpOpBase + 78, 0, 0x90abf0066829ULL }, // Inst #20832 = VREDUCESDZrrib |
| 26325 | { 20831, 4, 1, 0, 1074, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80abf0066829ULL }, // Inst #20831 = VREDUCESDZrri |
| 26326 | { 20830, 9, 1, 0, 304, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86abf0066819ULL }, // Inst #20830 = VREDUCESDZrmikz |
| 26327 | { 20829, 10, 1, 0, 304, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82abf0066819ULL }, // Inst #20829 = VREDUCESDZrmik |
| 26328 | { 20828, 8, 1, 0, 304, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80abf0066819ULL }, // Inst #20828 = VREDUCESDZrmi |
| 26329 | { 20827, 4, 1, 0, 1075, 1, 0, 4674, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2b68046829ULL }, // Inst #20827 = VREDUCEPSZrrikz |
| 26330 | { 20826, 5, 1, 0, 1075, 1, 0, 4669, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2b68046829ULL }, // Inst #20826 = VREDUCEPSZrrik |
| 26331 | { 20825, 4, 1, 0, 1075, 1, 0, 4674, X86ImpOpBase + 78, 0, 0x7e2b68046829ULL }, // Inst #20825 = VREDUCEPSZrribkz |
| 26332 | { 20824, 5, 1, 0, 1075, 1, 0, 4669, X86ImpOpBase + 78, 0, 0x7a2b68046829ULL }, // Inst #20824 = VREDUCEPSZrribk |
| 26333 | { 20823, 3, 1, 0, 1075, 1, 0, 4519, X86ImpOpBase + 78, 0, 0x782b68046829ULL }, // Inst #20823 = VREDUCEPSZrrib |
| 26334 | { 20822, 3, 1, 0, 1075, 1, 0, 4519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82b68046829ULL }, // Inst #20822 = VREDUCEPSZrri |
| 26335 | { 20821, 8, 1, 0, 451, 1, 0, 4661, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2b68046819ULL }, // Inst #20821 = VREDUCEPSZrmikz |
| 26336 | { 20820, 9, 1, 0, 451, 1, 0, 4652, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2b68046819ULL }, // Inst #20820 = VREDUCEPSZrmik |
| 26337 | { 20819, 7, 1, 0, 451, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82b68046819ULL }, // Inst #20819 = VREDUCEPSZrmi |
| 26338 | { 20818, 8, 1, 0, 451, 1, 0, 4661, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2b68046819ULL }, // Inst #20818 = VREDUCEPSZrmbikz |
| 26339 | { 20817, 9, 1, 0, 451, 1, 0, 4652, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2b68046819ULL }, // Inst #20817 = VREDUCEPSZrmbik |
| 26340 | { 20816, 7, 1, 0, 451, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782b68046819ULL }, // Inst #20816 = VREDUCEPSZrmbi |
| 26341 | { 20815, 4, 1, 0, 449, 1, 0, 4648, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72b68046829ULL }, // Inst #20815 = VREDUCEPSZ256rrikz |
| 26342 | { 20814, 5, 1, 0, 449, 1, 0, 4643, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32b68046829ULL }, // Inst #20814 = VREDUCEPSZ256rrik |
| 26343 | { 20813, 3, 1, 0, 449, 1, 0, 4483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12b68046829ULL }, // Inst #20813 = VREDUCEPSZ256rri |
| 26344 | { 20812, 8, 1, 0, 448, 1, 0, 4635, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72b68046819ULL }, // Inst #20812 = VREDUCEPSZ256rmikz |
| 26345 | { 20811, 9, 1, 0, 448, 1, 0, 4626, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32b68046819ULL }, // Inst #20811 = VREDUCEPSZ256rmik |
| 26346 | { 20810, 7, 1, 0, 448, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12b68046819ULL }, // Inst #20810 = VREDUCEPSZ256rmi |
| 26347 | { 20809, 8, 1, 0, 448, 1, 0, 4635, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772b68046819ULL }, // Inst #20809 = VREDUCEPSZ256rmbikz |
| 26348 | { 20808, 9, 1, 0, 448, 1, 0, 4626, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732b68046819ULL }, // Inst #20808 = VREDUCEPSZ256rmbik |
| 26349 | { 20807, 7, 1, 0, 448, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712b68046819ULL }, // Inst #20807 = VREDUCEPSZ256rmbi |
| 26350 | { 20806, 4, 1, 0, 1074, 1, 0, 3316, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62b68046829ULL }, // Inst #20806 = VREDUCEPSZ128rrikz |
| 26351 | { 20805, 5, 1, 0, 1074, 1, 0, 3311, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22b68046829ULL }, // Inst #20805 = VREDUCEPSZ128rrik |
| 26352 | { 20804, 3, 1, 0, 1074, 1, 0, 3308, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02b68046829ULL }, // Inst #20804 = VREDUCEPSZ128rri |
| 26353 | { 20803, 8, 1, 0, 304, 1, 0, 4618, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62b68046819ULL }, // Inst #20803 = VREDUCEPSZ128rmikz |
| 26354 | { 20802, 9, 1, 0, 304, 1, 0, 4609, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22b68046819ULL }, // Inst #20802 = VREDUCEPSZ128rmik |
| 26355 | { 20801, 7, 1, 0, 304, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02b68046819ULL }, // Inst #20801 = VREDUCEPSZ128rmi |
| 26356 | { 20800, 8, 1, 0, 304, 1, 0, 4618, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762b68046819ULL }, // Inst #20800 = VREDUCEPSZ128rmbikz |
| 26357 | { 20799, 9, 1, 0, 304, 1, 0, 4609, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722b68046819ULL }, // Inst #20799 = VREDUCEPSZ128rmbik |
| 26358 | { 20798, 7, 1, 0, 304, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702b68046819ULL }, // Inst #20798 = VREDUCEPSZ128rmbi |
| 26359 | { 20797, 4, 1, 0, 2406, 1, 0, 4527, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2b68046029ULL }, // Inst #20797 = VREDUCEPHZrrikz |
| 26360 | { 20796, 5, 1, 0, 2406, 1, 0, 4522, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2b68046029ULL }, // Inst #20796 = VREDUCEPHZrrik |
| 26361 | { 20795, 4, 1, 0, 2406, 1, 0, 4527, X86ImpOpBase + 78, 0, 0x5e2b68046029ULL }, // Inst #20795 = VREDUCEPHZrribkz |
| 26362 | { 20794, 5, 1, 0, 2406, 1, 0, 4522, X86ImpOpBase + 78, 0, 0x5a2b68046029ULL }, // Inst #20794 = VREDUCEPHZrribk |
| 26363 | { 20793, 3, 1, 0, 2405, 1, 0, 4519, X86ImpOpBase + 78, 0, 0x582b68046029ULL }, // Inst #20793 = VREDUCEPHZrrib |
| 26364 | { 20792, 3, 1, 0, 2405, 1, 0, 4519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82b68046029ULL }, // Inst #20792 = VREDUCEPHZrri |
| 26365 | { 20791, 8, 1, 0, 2404, 1, 0, 4511, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2b68046019ULL }, // Inst #20791 = VREDUCEPHZrmikz |
| 26366 | { 20790, 9, 1, 0, 2404, 1, 0, 4502, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2b68046019ULL }, // Inst #20790 = VREDUCEPHZrmik |
| 26367 | { 20789, 7, 1, 0, 2403, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82b68046019ULL }, // Inst #20789 = VREDUCEPHZrmi |
| 26368 | { 20788, 8, 1, 0, 2404, 1, 0, 4511, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e2b68046019ULL }, // Inst #20788 = VREDUCEPHZrmbikz |
| 26369 | { 20787, 9, 1, 0, 2404, 1, 0, 4502, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a2b68046019ULL }, // Inst #20787 = VREDUCEPHZrmbik |
| 26370 | { 20786, 7, 1, 0, 2403, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x582b68046019ULL }, // Inst #20786 = VREDUCEPHZrmbi |
| 26371 | { 20785, 4, 1, 0, 2402, 1, 0, 4491, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72b68046029ULL }, // Inst #20785 = VREDUCEPHZ256rrikz |
| 26372 | { 20784, 5, 1, 0, 2402, 1, 0, 4486, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32b68046029ULL }, // Inst #20784 = VREDUCEPHZ256rrik |
| 26373 | { 20783, 3, 1, 0, 2400, 1, 0, 4483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12b68046029ULL }, // Inst #20783 = VREDUCEPHZ256rri |
| 26374 | { 20782, 8, 1, 0, 2398, 1, 0, 4475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72b68046019ULL }, // Inst #20782 = VREDUCEPHZ256rmikz |
| 26375 | { 20781, 9, 1, 0, 2398, 1, 0, 4466, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32b68046019ULL }, // Inst #20781 = VREDUCEPHZ256rmik |
| 26376 | { 20780, 7, 1, 0, 2396, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12b68046019ULL }, // Inst #20780 = VREDUCEPHZ256rmi |
| 26377 | { 20779, 8, 1, 0, 2398, 1, 0, 4475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x572b68046019ULL }, // Inst #20779 = VREDUCEPHZ256rmbikz |
| 26378 | { 20778, 9, 1, 0, 2398, 1, 0, 4466, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x532b68046019ULL }, // Inst #20778 = VREDUCEPHZ256rmbik |
| 26379 | { 20777, 7, 1, 0, 2396, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x512b68046019ULL }, // Inst #20777 = VREDUCEPHZ256rmbi |
| 26380 | { 20776, 4, 1, 0, 2401, 1, 0, 4455, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62b68046029ULL }, // Inst #20776 = VREDUCEPHZ128rrikz |
| 26381 | { 20775, 5, 1, 0, 2401, 1, 0, 4450, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22b68046029ULL }, // Inst #20775 = VREDUCEPHZ128rrik |
| 26382 | { 20774, 3, 1, 0, 2399, 1, 0, 3308, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02b68046029ULL }, // Inst #20774 = VREDUCEPHZ128rri |
| 26383 | { 20773, 8, 1, 0, 2397, 1, 0, 4442, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62b68046019ULL }, // Inst #20773 = VREDUCEPHZ128rmikz |
| 26384 | { 20772, 9, 1, 0, 2397, 1, 0, 4433, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22b68046019ULL }, // Inst #20772 = VREDUCEPHZ128rmik |
| 26385 | { 20771, 7, 1, 0, 2394, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02b68046019ULL }, // Inst #20771 = VREDUCEPHZ128rmi |
| 26386 | { 20770, 8, 1, 0, 2397, 1, 0, 4442, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x562b68046019ULL }, // Inst #20770 = VREDUCEPHZ128rmbikz |
| 26387 | { 20769, 9, 1, 0, 2397, 1, 0, 4433, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x522b68046019ULL }, // Inst #20769 = VREDUCEPHZ128rmbik |
| 26388 | { 20768, 7, 1, 0, 2394, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x502b68046019ULL }, // Inst #20768 = VREDUCEPHZ128rmbi |
| 26389 | { 20767, 4, 1, 0, 1075, 1, 0, 4605, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2b70066829ULL }, // Inst #20767 = VREDUCEPDZrrikz |
| 26390 | { 20766, 5, 1, 0, 1075, 1, 0, 4600, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2b70066829ULL }, // Inst #20766 = VREDUCEPDZrrik |
| 26391 | { 20765, 4, 1, 0, 1075, 1, 0, 4605, X86ImpOpBase + 78, 0, 0x9e2b70066829ULL }, // Inst #20765 = VREDUCEPDZrribkz |
| 26392 | { 20764, 5, 1, 0, 1075, 1, 0, 4600, X86ImpOpBase + 78, 0, 0x9a2b70066829ULL }, // Inst #20764 = VREDUCEPDZrribk |
| 26393 | { 20763, 3, 1, 0, 1075, 1, 0, 4519, X86ImpOpBase + 78, 0, 0x982b70066829ULL }, // Inst #20763 = VREDUCEPDZrrib |
| 26394 | { 20762, 3, 1, 0, 1075, 1, 0, 4519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82b70066829ULL }, // Inst #20762 = VREDUCEPDZrri |
| 26395 | { 20761, 8, 1, 0, 451, 1, 0, 4592, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2b70066819ULL }, // Inst #20761 = VREDUCEPDZrmikz |
| 26396 | { 20760, 9, 1, 0, 451, 1, 0, 4583, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2b70066819ULL }, // Inst #20760 = VREDUCEPDZrmik |
| 26397 | { 20759, 7, 1, 0, 451, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82b70066819ULL }, // Inst #20759 = VREDUCEPDZrmi |
| 26398 | { 20758, 8, 1, 0, 451, 1, 0, 4592, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2b70066819ULL }, // Inst #20758 = VREDUCEPDZrmbikz |
| 26399 | { 20757, 9, 1, 0, 451, 1, 0, 4583, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2b70066819ULL }, // Inst #20757 = VREDUCEPDZrmbik |
| 26400 | { 20756, 7, 1, 0, 451, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982b70066819ULL }, // Inst #20756 = VREDUCEPDZrmbi |
| 26401 | { 20755, 4, 1, 0, 449, 1, 0, 4579, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72b70066829ULL }, // Inst #20755 = VREDUCEPDZ256rrikz |
| 26402 | { 20754, 5, 1, 0, 449, 1, 0, 4574, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32b70066829ULL }, // Inst #20754 = VREDUCEPDZ256rrik |
| 26403 | { 20753, 3, 1, 0, 449, 1, 0, 4483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12b70066829ULL }, // Inst #20753 = VREDUCEPDZ256rri |
| 26404 | { 20752, 8, 1, 0, 448, 1, 0, 4566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72b70066819ULL }, // Inst #20752 = VREDUCEPDZ256rmikz |
| 26405 | { 20751, 9, 1, 0, 448, 1, 0, 4557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32b70066819ULL }, // Inst #20751 = VREDUCEPDZ256rmik |
| 26406 | { 20750, 7, 1, 0, 448, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12b70066819ULL }, // Inst #20750 = VREDUCEPDZ256rmi |
| 26407 | { 20749, 8, 1, 0, 448, 1, 0, 4566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972b70066819ULL }, // Inst #20749 = VREDUCEPDZ256rmbikz |
| 26408 | { 20748, 9, 1, 0, 448, 1, 0, 4557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932b70066819ULL }, // Inst #20748 = VREDUCEPDZ256rmbik |
| 26409 | { 20747, 7, 1, 0, 448, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912b70066819ULL }, // Inst #20747 = VREDUCEPDZ256rmbi |
| 26410 | { 20746, 4, 1, 0, 1074, 1, 0, 4553, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62b70066829ULL }, // Inst #20746 = VREDUCEPDZ128rrikz |
| 26411 | { 20745, 5, 1, 0, 1074, 1, 0, 4548, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22b70066829ULL }, // Inst #20745 = VREDUCEPDZ128rrik |
| 26412 | { 20744, 3, 1, 0, 1074, 1, 0, 3308, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02b70066829ULL }, // Inst #20744 = VREDUCEPDZ128rri |
| 26413 | { 20743, 8, 1, 0, 304, 1, 0, 4540, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62b70066819ULL }, // Inst #20743 = VREDUCEPDZ128rmikz |
| 26414 | { 20742, 9, 1, 0, 304, 1, 0, 4531, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22b70066819ULL }, // Inst #20742 = VREDUCEPDZ128rmik |
| 26415 | { 20741, 7, 1, 0, 304, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02b70066819ULL }, // Inst #20741 = VREDUCEPDZ128rmi |
| 26416 | { 20740, 8, 1, 0, 304, 1, 0, 4540, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962b70066819ULL }, // Inst #20740 = VREDUCEPDZ128rmbikz |
| 26417 | { 20739, 9, 1, 0, 304, 1, 0, 4531, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922b70066819ULL }, // Inst #20739 = VREDUCEPDZ128rmbik |
| 26418 | { 20738, 7, 1, 0, 304, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902b70066819ULL }, // Inst #20738 = VREDUCEPDZ128rmbi |
| 26419 | { 20737, 4, 1, 0, 452, 0, 0, 4527, X86ImpOpBase + 0, 0, 0xee2b78047829ULL }, // Inst #20737 = VREDUCEBF16Zrrikz |
| 26420 | { 20736, 5, 1, 0, 452, 0, 0, 4522, X86ImpOpBase + 0, 0, 0xea2b78047829ULL }, // Inst #20736 = VREDUCEBF16Zrrik |
| 26421 | { 20735, 3, 1, 0, 452, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe82b78047829ULL }, // Inst #20735 = VREDUCEBF16Zrri |
| 26422 | { 20734, 8, 1, 0, 451, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2b78047819ULL }, // Inst #20734 = VREDUCEBF16Zrmikz |
| 26423 | { 20733, 9, 1, 0, 451, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2b78047819ULL }, // Inst #20733 = VREDUCEBF16Zrmik |
| 26424 | { 20732, 7, 1, 0, 451, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82b78047819ULL }, // Inst #20732 = VREDUCEBF16Zrmi |
| 26425 | { 20731, 8, 1, 0, 451, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e2b78047819ULL }, // Inst #20731 = VREDUCEBF16Zrmbikz |
| 26426 | { 20730, 9, 1, 0, 451, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a2b78047819ULL }, // Inst #20730 = VREDUCEBF16Zrmbik |
| 26427 | { 20729, 7, 1, 0, 451, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x582b78047819ULL }, // Inst #20729 = VREDUCEBF16Zrmbi |
| 26428 | { 20728, 4, 1, 0, 449, 0, 0, 4491, X86ImpOpBase + 0, 0, 0xc72b78047829ULL }, // Inst #20728 = VREDUCEBF16Z256rrikz |
| 26429 | { 20727, 5, 1, 0, 449, 0, 0, 4486, X86ImpOpBase + 0, 0, 0xc32b78047829ULL }, // Inst #20727 = VREDUCEBF16Z256rrik |
| 26430 | { 20726, 3, 1, 0, 449, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc12b78047829ULL }, // Inst #20726 = VREDUCEBF16Z256rri |
| 26431 | { 20725, 8, 1, 0, 448, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72b78047819ULL }, // Inst #20725 = VREDUCEBF16Z256rmikz |
| 26432 | { 20724, 9, 1, 0, 448, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32b78047819ULL }, // Inst #20724 = VREDUCEBF16Z256rmik |
| 26433 | { 20723, 7, 1, 0, 448, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12b78047819ULL }, // Inst #20723 = VREDUCEBF16Z256rmi |
| 26434 | { 20722, 8, 1, 0, 448, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x572b78047819ULL }, // Inst #20722 = VREDUCEBF16Z256rmbikz |
| 26435 | { 20721, 9, 1, 0, 448, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x532b78047819ULL }, // Inst #20721 = VREDUCEBF16Z256rmbik |
| 26436 | { 20720, 7, 1, 0, 448, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x512b78047819ULL }, // Inst #20720 = VREDUCEBF16Z256rmbi |
| 26437 | { 20719, 4, 1, 0, 303, 0, 0, 4455, X86ImpOpBase + 0, 0, 0xa62b78047829ULL }, // Inst #20719 = VREDUCEBF16Z128rrikz |
| 26438 | { 20718, 5, 1, 0, 303, 0, 0, 4450, X86ImpOpBase + 0, 0, 0xa22b78047829ULL }, // Inst #20718 = VREDUCEBF16Z128rrik |
| 26439 | { 20717, 3, 1, 0, 303, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa02b78047829ULL }, // Inst #20717 = VREDUCEBF16Z128rri |
| 26440 | { 20716, 8, 1, 0, 304, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62b78047819ULL }, // Inst #20716 = VREDUCEBF16Z128rmikz |
| 26441 | { 20715, 9, 1, 0, 304, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22b78047819ULL }, // Inst #20715 = VREDUCEBF16Z128rmik |
| 26442 | { 20714, 7, 1, 0, 304, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02b78047819ULL }, // Inst #20714 = VREDUCEBF16Z128rmi |
| 26443 | { 20713, 8, 1, 0, 304, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x562b78047819ULL }, // Inst #20713 = VREDUCEBF16Z128rmbikz |
| 26444 | { 20712, 9, 1, 0, 304, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x522b78047819ULL }, // Inst #20712 = VREDUCEBF16Z128rmbik |
| 26445 | { 20711, 7, 1, 0, 304, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x502b78047819ULL }, // Inst #20711 = VREDUCEBF16Z128rmbi |
| 26446 | { 20710, 3, 1, 0, 299, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xa9a8003029ULL }, // Inst #20710 = VRCPSSr_Int |
| 26447 | { 20709, 3, 1, 0, 299, 0, 0, 2046, X86ImpOpBase + 0, 0, 0xa9a8003029ULL }, // Inst #20709 = VRCPSSr |
| 26448 | { 20708, 7, 1, 0, 298, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa9a8003019ULL }, // Inst #20708 = VRCPSSm_Int |
| 26449 | { 20707, 7, 1, 0, 298, 0, 0, 2039, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa9a8003019ULL }, // Inst #20707 = VRCPSSm |
| 26450 | { 20706, 4, 1, 0, 299, 0, 0, 2005, X86ImpOpBase + 0, 0, 0x46a6e8014829ULL }, // Inst #20706 = VRCPSHZrrkz |
| 26451 | { 20705, 5, 1, 0, 299, 0, 0, 2000, X86ImpOpBase + 0, 0, 0x42a6e8014829ULL }, // Inst #20705 = VRCPSHZrrk |
| 26452 | { 20704, 3, 1, 0, 299, 0, 0, 1679, X86ImpOpBase + 0, 0, 0x40a6e8014829ULL }, // Inst #20704 = VRCPSHZrr |
| 26453 | { 20703, 8, 1, 0, 298, 0, 0, 1974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x46a6e8014819ULL }, // Inst #20703 = VRCPSHZrmkz |
| 26454 | { 20702, 9, 1, 0, 298, 0, 0, 1628, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x42a6e8014819ULL }, // Inst #20702 = VRCPSHZrmk |
| 26455 | { 20701, 7, 1, 0, 298, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x40a6e8014819ULL }, // Inst #20701 = VRCPSHZrm |
| 26456 | { 20700, 2, 1, 0, 296, 0, 0, 557, X86ImpOpBase + 0, 0, 0x29a8002029ULL }, // Inst #20700 = VRCPPSr |
| 26457 | { 20699, 6, 1, 0, 295, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x29a8002019ULL }, // Inst #20699 = VRCPPSm |
| 26458 | { 20698, 2, 1, 0, 571, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x129a8002029ULL }, // Inst #20698 = VRCPPSYr |
| 26459 | { 20697, 6, 1, 0, 574, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x129a8002019ULL }, // Inst #20697 = VRCPPSYm |
| 26460 | { 20696, 3, 1, 0, 2393, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee2668014829ULL }, // Inst #20696 = VRCPPHZrkz |
| 26461 | { 20695, 4, 1, 0, 2393, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea2668014829ULL }, // Inst #20695 = VRCPPHZrk |
| 26462 | { 20694, 2, 1, 0, 573, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82668014829ULL }, // Inst #20694 = VRCPPHZr |
| 26463 | { 20693, 7, 1, 0, 2391, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2668014819ULL }, // Inst #20693 = VRCPPHZmkz |
| 26464 | { 20692, 8, 1, 0, 2391, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2668014819ULL }, // Inst #20692 = VRCPPHZmk |
| 26465 | { 20691, 7, 1, 0, 2391, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e2668014819ULL }, // Inst #20691 = VRCPPHZmbkz |
| 26466 | { 20690, 8, 1, 0, 2391, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a2668014819ULL }, // Inst #20690 = VRCPPHZmbk |
| 26467 | { 20689, 6, 1, 0, 572, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x582668014819ULL }, // Inst #20689 = VRCPPHZmb |
| 26468 | { 20688, 6, 1, 0, 572, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82668014819ULL }, // Inst #20688 = VRCPPHZm |
| 26469 | { 20687, 3, 1, 0, 571, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc72668014829ULL }, // Inst #20687 = VRCPPHZ256rkz |
| 26470 | { 20686, 4, 1, 0, 571, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc32668014829ULL }, // Inst #20686 = VRCPPHZ256rk |
| 26471 | { 20685, 2, 1, 0, 571, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12668014829ULL }, // Inst #20685 = VRCPPHZ256r |
| 26472 | { 20684, 7, 1, 0, 570, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72668014819ULL }, // Inst #20684 = VRCPPHZ256mkz |
| 26473 | { 20683, 8, 1, 0, 570, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32668014819ULL }, // Inst #20683 = VRCPPHZ256mk |
| 26474 | { 20682, 7, 1, 0, 570, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x572668014819ULL }, // Inst #20682 = VRCPPHZ256mbkz |
| 26475 | { 20681, 8, 1, 0, 570, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x532668014819ULL }, // Inst #20681 = VRCPPHZ256mbk |
| 26476 | { 20680, 6, 1, 0, 570, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x512668014819ULL }, // Inst #20680 = VRCPPHZ256mb |
| 26477 | { 20679, 6, 1, 0, 570, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12668014819ULL }, // Inst #20679 = VRCPPHZ256m |
| 26478 | { 20678, 3, 1, 0, 296, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa62668014829ULL }, // Inst #20678 = VRCPPHZ128rkz |
| 26479 | { 20677, 4, 1, 0, 296, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa22668014829ULL }, // Inst #20677 = VRCPPHZ128rk |
| 26480 | { 20676, 2, 1, 0, 296, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02668014829ULL }, // Inst #20676 = VRCPPHZ128r |
| 26481 | { 20675, 7, 1, 0, 569, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62668014819ULL }, // Inst #20675 = VRCPPHZ128mkz |
| 26482 | { 20674, 8, 1, 0, 569, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22668014819ULL }, // Inst #20674 = VRCPPHZ128mk |
| 26483 | { 20673, 7, 1, 0, 569, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x562668014819ULL }, // Inst #20673 = VRCPPHZ128mbkz |
| 26484 | { 20672, 8, 1, 0, 569, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x522668014819ULL }, // Inst #20672 = VRCPPHZ128mbk |
| 26485 | { 20671, 6, 1, 0, 569, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x502668014819ULL }, // Inst #20671 = VRCPPHZ128mb |
| 26486 | { 20670, 6, 1, 0, 569, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02668014819ULL }, // Inst #20670 = VRCPPHZ128m |
| 26487 | { 20669, 3, 1, 0, 573, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee2668014029ULL }, // Inst #20669 = VRCPBF16Zrkz |
| 26488 | { 20668, 4, 1, 0, 573, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea2668014029ULL }, // Inst #20668 = VRCPBF16Zrk |
| 26489 | { 20667, 2, 1, 0, 573, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82668014029ULL }, // Inst #20667 = VRCPBF16Zr |
| 26490 | { 20666, 7, 1, 0, 572, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2668014019ULL }, // Inst #20666 = VRCPBF16Zmkz |
| 26491 | { 20665, 8, 1, 0, 572, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2668014019ULL }, // Inst #20665 = VRCPBF16Zmk |
| 26492 | { 20664, 7, 1, 0, 572, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e2668014019ULL }, // Inst #20664 = VRCPBF16Zmbkz |
| 26493 | { 20663, 8, 1, 0, 572, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a2668014019ULL }, // Inst #20663 = VRCPBF16Zmbk |
| 26494 | { 20662, 6, 1, 0, 572, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x582668014019ULL }, // Inst #20662 = VRCPBF16Zmb |
| 26495 | { 20661, 6, 1, 0, 572, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82668014019ULL }, // Inst #20661 = VRCPBF16Zm |
| 26496 | { 20660, 3, 1, 0, 571, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc72668014029ULL }, // Inst #20660 = VRCPBF16Z256rkz |
| 26497 | { 20659, 4, 1, 0, 571, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc32668014029ULL }, // Inst #20659 = VRCPBF16Z256rk |
| 26498 | { 20658, 2, 1, 0, 571, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12668014029ULL }, // Inst #20658 = VRCPBF16Z256r |
| 26499 | { 20657, 7, 1, 0, 570, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72668014019ULL }, // Inst #20657 = VRCPBF16Z256mkz |
| 26500 | { 20656, 8, 1, 0, 570, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32668014019ULL }, // Inst #20656 = VRCPBF16Z256mk |
| 26501 | { 20655, 7, 1, 0, 570, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x572668014019ULL }, // Inst #20655 = VRCPBF16Z256mbkz |
| 26502 | { 20654, 8, 1, 0, 570, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x532668014019ULL }, // Inst #20654 = VRCPBF16Z256mbk |
| 26503 | { 20653, 6, 1, 0, 570, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x512668014019ULL }, // Inst #20653 = VRCPBF16Z256mb |
| 26504 | { 20652, 6, 1, 0, 570, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12668014019ULL }, // Inst #20652 = VRCPBF16Z256m |
| 26505 | { 20651, 3, 1, 0, 296, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa62668014029ULL }, // Inst #20651 = VRCPBF16Z128rkz |
| 26506 | { 20650, 4, 1, 0, 296, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa22668014029ULL }, // Inst #20650 = VRCPBF16Z128rk |
| 26507 | { 20649, 2, 1, 0, 296, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02668014029ULL }, // Inst #20649 = VRCPBF16Z128r |
| 26508 | { 20648, 7, 1, 0, 569, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62668014019ULL }, // Inst #20648 = VRCPBF16Z128mkz |
| 26509 | { 20647, 8, 1, 0, 569, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22668014019ULL }, // Inst #20647 = VRCPBF16Z128mk |
| 26510 | { 20646, 7, 1, 0, 569, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x562668014019ULL }, // Inst #20646 = VRCPBF16Z128mbkz |
| 26511 | { 20645, 8, 1, 0, 569, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x522668014019ULL }, // Inst #20645 = VRCPBF16Z128mbk |
| 26512 | { 20644, 6, 1, 0, 569, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x502668014019ULL }, // Inst #20644 = VRCPBF16Z128mb |
| 26513 | { 20643, 6, 1, 0, 569, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02668014019ULL }, // Inst #20643 = VRCPBF16Z128m |
| 26514 | { 20642, 4, 1, 0, 299, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66e5e8004829ULL }, // Inst #20642 = VRCP28SSZrkz |
| 26515 | { 20641, 5, 1, 0, 299, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62e5e8004829ULL }, // Inst #20641 = VRCP28SSZrk |
| 26516 | { 20640, 4, 1, 0, 299, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x76e5e8004829ULL }, // Inst #20640 = VRCP28SSZrbkz |
| 26517 | { 20639, 5, 1, 0, 299, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x72e5e8004829ULL }, // Inst #20639 = VRCP28SSZrbk |
| 26518 | { 20638, 3, 1, 0, 299, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x70e5e8004829ULL }, // Inst #20638 = VRCP28SSZrb |
| 26519 | { 20637, 3, 1, 0, 299, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60e5e8004829ULL }, // Inst #20637 = VRCP28SSZr |
| 26520 | { 20636, 8, 1, 0, 298, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66e5e8004819ULL }, // Inst #20636 = VRCP28SSZmkz |
| 26521 | { 20635, 9, 1, 0, 298, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62e5e8004819ULL }, // Inst #20635 = VRCP28SSZmk |
| 26522 | { 20634, 7, 1, 0, 298, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60e5e8004819ULL }, // Inst #20634 = VRCP28SSZm |
| 26523 | { 20633, 4, 1, 0, 299, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86e5f0024829ULL }, // Inst #20633 = VRCP28SDZrkz |
| 26524 | { 20632, 5, 1, 0, 299, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82e5f0024829ULL }, // Inst #20632 = VRCP28SDZrk |
| 26525 | { 20631, 4, 1, 0, 299, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x96e5f0024829ULL }, // Inst #20631 = VRCP28SDZrbkz |
| 26526 | { 20630, 5, 1, 0, 299, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x92e5f0024829ULL }, // Inst #20630 = VRCP28SDZrbk |
| 26527 | { 20629, 3, 1, 0, 299, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x90e5f0024829ULL }, // Inst #20629 = VRCP28SDZrb |
| 26528 | { 20628, 3, 1, 0, 299, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80e5f0024829ULL }, // Inst #20628 = VRCP28SDZr |
| 26529 | { 20627, 8, 1, 0, 298, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86e5f0024819ULL }, // Inst #20627 = VRCP28SDZmkz |
| 26530 | { 20626, 9, 1, 0, 298, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82e5f0024819ULL }, // Inst #20626 = VRCP28SDZmk |
| 26531 | { 20625, 7, 1, 0, 298, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80e5f0024819ULL }, // Inst #20625 = VRCP28SDZm |
| 26532 | { 20624, 3, 1, 0, 573, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6568004829ULL }, // Inst #20624 = VRCP28PSZrkz |
| 26533 | { 20623, 4, 1, 0, 573, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6568004829ULL }, // Inst #20623 = VRCP28PSZrk |
| 26534 | { 20622, 3, 1, 0, 573, 1, 0, 2843, X86ImpOpBase + 78, 0, 0x7e6568004829ULL }, // Inst #20622 = VRCP28PSZrbkz |
| 26535 | { 20621, 4, 1, 0, 573, 1, 0, 2839, X86ImpOpBase + 78, 0, 0x7a6568004829ULL }, // Inst #20621 = VRCP28PSZrbk |
| 26536 | { 20620, 2, 1, 0, 573, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x786568004829ULL }, // Inst #20620 = VRCP28PSZrb |
| 26537 | { 20619, 2, 1, 0, 573, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86568004829ULL }, // Inst #20619 = VRCP28PSZr |
| 26538 | { 20618, 7, 1, 0, 572, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6568004819ULL }, // Inst #20618 = VRCP28PSZmkz |
| 26539 | { 20617, 8, 1, 0, 572, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6568004819ULL }, // Inst #20617 = VRCP28PSZmk |
| 26540 | { 20616, 7, 1, 0, 572, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e6568004819ULL }, // Inst #20616 = VRCP28PSZmbkz |
| 26541 | { 20615, 8, 1, 0, 572, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a6568004819ULL }, // Inst #20615 = VRCP28PSZmbk |
| 26542 | { 20614, 6, 1, 0, 572, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x786568004819ULL }, // Inst #20614 = VRCP28PSZmb |
| 26543 | { 20613, 6, 1, 0, 572, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86568004819ULL }, // Inst #20613 = VRCP28PSZm |
| 26544 | { 20612, 3, 1, 0, 573, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6570024829ULL }, // Inst #20612 = VRCP28PDZrkz |
| 26545 | { 20611, 4, 1, 0, 573, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6570024829ULL }, // Inst #20611 = VRCP28PDZrk |
| 26546 | { 20610, 3, 1, 0, 573, 1, 0, 2808, X86ImpOpBase + 78, 0, 0x9e6570024829ULL }, // Inst #20610 = VRCP28PDZrbkz |
| 26547 | { 20609, 4, 1, 0, 573, 1, 0, 2804, X86ImpOpBase + 78, 0, 0x9a6570024829ULL }, // Inst #20609 = VRCP28PDZrbk |
| 26548 | { 20608, 2, 1, 0, 573, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x986570024829ULL }, // Inst #20608 = VRCP28PDZrb |
| 26549 | { 20607, 2, 1, 0, 573, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86570024829ULL }, // Inst #20607 = VRCP28PDZr |
| 26550 | { 20606, 7, 1, 0, 572, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6570024819ULL }, // Inst #20606 = VRCP28PDZmkz |
| 26551 | { 20605, 8, 1, 0, 572, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6570024819ULL }, // Inst #20605 = VRCP28PDZmk |
| 26552 | { 20604, 7, 1, 0, 572, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e6570024819ULL }, // Inst #20604 = VRCP28PDZmbkz |
| 26553 | { 20603, 8, 1, 0, 572, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a6570024819ULL }, // Inst #20603 = VRCP28PDZmbk |
| 26554 | { 20602, 6, 1, 0, 572, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x986570024819ULL }, // Inst #20602 = VRCP28PDZmb |
| 26555 | { 20601, 6, 1, 0, 572, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86570024819ULL }, // Inst #20601 = VRCP28PDZm |
| 26556 | { 20600, 4, 1, 0, 299, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x66a6e8004829ULL }, // Inst #20600 = VRCP14SSZrrkz |
| 26557 | { 20599, 5, 1, 0, 299, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x62a6e8004829ULL }, // Inst #20599 = VRCP14SSZrrk |
| 26558 | { 20598, 3, 1, 0, 299, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x60a6e8004829ULL }, // Inst #20598 = VRCP14SSZrr |
| 26559 | { 20597, 8, 1, 0, 298, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x66a6e8004819ULL }, // Inst #20597 = VRCP14SSZrmkz |
| 26560 | { 20596, 9, 1, 0, 298, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x62a6e8004819ULL }, // Inst #20596 = VRCP14SSZrmk |
| 26561 | { 20595, 7, 1, 0, 298, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x60a6e8004819ULL }, // Inst #20595 = VRCP14SSZrm |
| 26562 | { 20594, 4, 1, 0, 299, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x86a6f0024829ULL }, // Inst #20594 = VRCP14SDZrrkz |
| 26563 | { 20593, 5, 1, 0, 299, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x82a6f0024829ULL }, // Inst #20593 = VRCP14SDZrrk |
| 26564 | { 20592, 3, 1, 0, 299, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x80a6f0024829ULL }, // Inst #20592 = VRCP14SDZrr |
| 26565 | { 20591, 8, 1, 0, 298, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x86a6f0024819ULL }, // Inst #20591 = VRCP14SDZrmkz |
| 26566 | { 20590, 9, 1, 0, 298, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x82a6f0024819ULL }, // Inst #20590 = VRCP14SDZrmk |
| 26567 | { 20589, 7, 1, 0, 298, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x80a6f0024819ULL }, // Inst #20589 = VRCP14SDZrm |
| 26568 | { 20588, 3, 1, 0, 573, 1, 0, 2843, X86ImpOpBase + 78, 0, 0xee2668004829ULL }, // Inst #20588 = VRCP14PSZrkz |
| 26569 | { 20587, 4, 1, 0, 573, 1, 0, 2839, X86ImpOpBase + 78, 0, 0xea2668004829ULL }, // Inst #20587 = VRCP14PSZrk |
| 26570 | { 20586, 2, 1, 0, 573, 1, 0, 2802, X86ImpOpBase + 78, 0, 0xe82668004829ULL }, // Inst #20586 = VRCP14PSZr |
| 26571 | { 20585, 7, 1, 0, 572, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xee2668004819ULL }, // Inst #20585 = VRCP14PSZmkz |
| 26572 | { 20584, 8, 1, 0, 572, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xea2668004819ULL }, // Inst #20584 = VRCP14PSZmk |
| 26573 | { 20583, 7, 1, 0, 572, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7e2668004819ULL }, // Inst #20583 = VRCP14PSZmbkz |
| 26574 | { 20582, 8, 1, 0, 572, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7a2668004819ULL }, // Inst #20582 = VRCP14PSZmbk |
| 26575 | { 20581, 6, 1, 0, 572, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x782668004819ULL }, // Inst #20581 = VRCP14PSZmb |
| 26576 | { 20580, 6, 1, 0, 572, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe82668004819ULL }, // Inst #20580 = VRCP14PSZm |
| 26577 | { 20579, 3, 1, 0, 571, 1, 0, 2829, X86ImpOpBase + 78, 0, 0xc72668004829ULL }, // Inst #20579 = VRCP14PSZ256rkz |
| 26578 | { 20578, 4, 1, 0, 571, 1, 0, 2825, X86ImpOpBase + 78, 0, 0xc32668004829ULL }, // Inst #20578 = VRCP14PSZ256rk |
| 26579 | { 20577, 2, 1, 0, 571, 1, 0, 2780, X86ImpOpBase + 78, 0, 0xc12668004829ULL }, // Inst #20577 = VRCP14PSZ256r |
| 26580 | { 20576, 7, 1, 0, 570, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc72668004819ULL }, // Inst #20576 = VRCP14PSZ256mkz |
| 26581 | { 20575, 8, 1, 0, 570, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc32668004819ULL }, // Inst #20575 = VRCP14PSZ256mk |
| 26582 | { 20574, 7, 1, 0, 570, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x772668004819ULL }, // Inst #20574 = VRCP14PSZ256mbkz |
| 26583 | { 20573, 8, 1, 0, 570, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x732668004819ULL }, // Inst #20573 = VRCP14PSZ256mbk |
| 26584 | { 20572, 6, 1, 0, 570, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x712668004819ULL }, // Inst #20572 = VRCP14PSZ256mb |
| 26585 | { 20571, 6, 1, 0, 570, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc12668004819ULL }, // Inst #20571 = VRCP14PSZ256m |
| 26586 | { 20570, 3, 1, 0, 296, 1, 0, 2404, X86ImpOpBase + 78, 0, 0xa62668004829ULL }, // Inst #20570 = VRCP14PSZ128rkz |
| 26587 | { 20569, 4, 1, 0, 296, 1, 0, 2400, X86ImpOpBase + 78, 0, 0xa22668004829ULL }, // Inst #20569 = VRCP14PSZ128rk |
| 26588 | { 20568, 2, 1, 0, 296, 1, 0, 2398, X86ImpOpBase + 78, 0, 0xa02668004829ULL }, // Inst #20568 = VRCP14PSZ128r |
| 26589 | { 20567, 7, 1, 0, 569, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa62668004819ULL }, // Inst #20567 = VRCP14PSZ128mkz |
| 26590 | { 20566, 8, 1, 0, 569, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa22668004819ULL }, // Inst #20566 = VRCP14PSZ128mk |
| 26591 | { 20565, 7, 1, 0, 569, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x762668004819ULL }, // Inst #20565 = VRCP14PSZ128mbkz |
| 26592 | { 20564, 8, 1, 0, 569, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x722668004819ULL }, // Inst #20564 = VRCP14PSZ128mbk |
| 26593 | { 20563, 6, 1, 0, 569, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x702668004819ULL }, // Inst #20563 = VRCP14PSZ128mb |
| 26594 | { 20562, 6, 1, 0, 569, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa02668004819ULL }, // Inst #20562 = VRCP14PSZ128m |
| 26595 | { 20561, 3, 1, 0, 573, 1, 0, 2808, X86ImpOpBase + 78, 0, 0xee2670024829ULL }, // Inst #20561 = VRCP14PDZrkz |
| 26596 | { 20560, 4, 1, 0, 573, 1, 0, 2804, X86ImpOpBase + 78, 0, 0xea2670024829ULL }, // Inst #20560 = VRCP14PDZrk |
| 26597 | { 20559, 2, 1, 0, 573, 1, 0, 2802, X86ImpOpBase + 78, 0, 0xe82670024829ULL }, // Inst #20559 = VRCP14PDZr |
| 26598 | { 20558, 7, 1, 0, 572, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xee2670024819ULL }, // Inst #20558 = VRCP14PDZmkz |
| 26599 | { 20557, 8, 1, 0, 572, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xea2670024819ULL }, // Inst #20557 = VRCP14PDZmk |
| 26600 | { 20556, 7, 1, 0, 572, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x9e2670024819ULL }, // Inst #20556 = VRCP14PDZmbkz |
| 26601 | { 20555, 8, 1, 0, 572, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x9a2670024819ULL }, // Inst #20555 = VRCP14PDZmbk |
| 26602 | { 20554, 6, 1, 0, 572, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x982670024819ULL }, // Inst #20554 = VRCP14PDZmb |
| 26603 | { 20553, 6, 1, 0, 572, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe82670024819ULL }, // Inst #20553 = VRCP14PDZm |
| 26604 | { 20552, 3, 1, 0, 571, 1, 0, 2786, X86ImpOpBase + 78, 0, 0xc72670024829ULL }, // Inst #20552 = VRCP14PDZ256rkz |
| 26605 | { 20551, 4, 1, 0, 571, 1, 0, 2782, X86ImpOpBase + 78, 0, 0xc32670024829ULL }, // Inst #20551 = VRCP14PDZ256rk |
| 26606 | { 20550, 2, 1, 0, 571, 1, 0, 2780, X86ImpOpBase + 78, 0, 0xc12670024829ULL }, // Inst #20550 = VRCP14PDZ256r |
| 26607 | { 20549, 7, 1, 0, 570, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc72670024819ULL }, // Inst #20549 = VRCP14PDZ256mkz |
| 26608 | { 20548, 8, 1, 0, 570, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc32670024819ULL }, // Inst #20548 = VRCP14PDZ256mk |
| 26609 | { 20547, 7, 1, 0, 570, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x972670024819ULL }, // Inst #20547 = VRCP14PDZ256mbkz |
| 26610 | { 20546, 8, 1, 0, 570, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x932670024819ULL }, // Inst #20546 = VRCP14PDZ256mbk |
| 26611 | { 20545, 6, 1, 0, 570, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x912670024819ULL }, // Inst #20545 = VRCP14PDZ256mb |
| 26612 | { 20544, 6, 1, 0, 570, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc12670024819ULL }, // Inst #20544 = VRCP14PDZ256m |
| 26613 | { 20543, 3, 1, 0, 296, 1, 0, 2770, X86ImpOpBase + 78, 0, 0xa62670024829ULL }, // Inst #20543 = VRCP14PDZ128rkz |
| 26614 | { 20542, 4, 1, 0, 296, 1, 0, 2766, X86ImpOpBase + 78, 0, 0xa22670024829ULL }, // Inst #20542 = VRCP14PDZ128rk |
| 26615 | { 20541, 2, 1, 0, 296, 1, 0, 2398, X86ImpOpBase + 78, 0, 0xa02670024829ULL }, // Inst #20541 = VRCP14PDZ128r |
| 26616 | { 20540, 7, 1, 0, 569, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa62670024819ULL }, // Inst #20540 = VRCP14PDZ128mkz |
| 26617 | { 20539, 8, 1, 0, 569, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa22670024819ULL }, // Inst #20539 = VRCP14PDZ128mk |
| 26618 | { 20538, 7, 1, 0, 569, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x962670024819ULL }, // Inst #20538 = VRCP14PDZ128mbkz |
| 26619 | { 20537, 8, 1, 0, 569, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x922670024819ULL }, // Inst #20537 = VRCP14PDZ128mbk |
| 26620 | { 20536, 6, 1, 0, 569, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x902670024819ULL }, // Inst #20536 = VRCP14PDZ128mb |
| 26621 | { 20535, 6, 1, 0, 569, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa02670024819ULL }, // Inst #20535 = VRCP14PDZ128m |
| 26622 | { 20534, 5, 1, 0, 1069, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66a8e8046829ULL }, // Inst #20534 = VRANGESSZrrikz |
| 26623 | { 20533, 6, 1, 0, 1069, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62a8e8046829ULL }, // Inst #20533 = VRANGESSZrrik |
| 26624 | { 20532, 5, 1, 0, 1069, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x76a8e8046829ULL }, // Inst #20532 = VRANGESSZrribkz |
| 26625 | { 20531, 6, 1, 0, 1069, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x72a8e8046829ULL }, // Inst #20531 = VRANGESSZrribk |
| 26626 | { 20530, 4, 1, 0, 1069, 1, 0, 919, X86ImpOpBase + 78, 0, 0x70a8e8046829ULL }, // Inst #20530 = VRANGESSZrrib |
| 26627 | { 20529, 4, 1, 0, 1069, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8046829ULL }, // Inst #20529 = VRANGESSZrri |
| 26628 | { 20528, 9, 1, 0, 29, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66a8e8046819ULL }, // Inst #20528 = VRANGESSZrmikz |
| 26629 | { 20527, 10, 1, 0, 29, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62a8e8046819ULL }, // Inst #20527 = VRANGESSZrmik |
| 26630 | { 20526, 8, 1, 0, 29, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8046819ULL }, // Inst #20526 = VRANGESSZrmi |
| 26631 | { 20525, 5, 1, 0, 1069, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86a8f0066829ULL }, // Inst #20525 = VRANGESDZrrikz |
| 26632 | { 20524, 6, 1, 0, 1069, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82a8f0066829ULL }, // Inst #20524 = VRANGESDZrrik |
| 26633 | { 20523, 5, 1, 0, 1069, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x96a8f0066829ULL }, // Inst #20523 = VRANGESDZrribkz |
| 26634 | { 20522, 6, 1, 0, 1069, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x92a8f0066829ULL }, // Inst #20522 = VRANGESDZrribk |
| 26635 | { 20521, 4, 1, 0, 1069, 1, 0, 919, X86ImpOpBase + 78, 0, 0x90a8f0066829ULL }, // Inst #20521 = VRANGESDZrrib |
| 26636 | { 20520, 4, 1, 0, 1069, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0066829ULL }, // Inst #20520 = VRANGESDZrri |
| 26637 | { 20519, 9, 1, 0, 29, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86a8f0066819ULL }, // Inst #20519 = VRANGESDZrmikz |
| 26638 | { 20518, 10, 1, 0, 29, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82a8f0066819ULL }, // Inst #20518 = VRANGESDZrmik |
| 26639 | { 20517, 8, 1, 0, 29, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0066819ULL }, // Inst #20517 = VRANGESDZrmi |
| 26640 | { 20516, 5, 1, 0, 1071, 1, 0, 2158, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeea868046829ULL }, // Inst #20516 = VRANGEPSZrrikz |
| 26641 | { 20515, 6, 1, 0, 1071, 1, 0, 2152, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaa868046829ULL }, // Inst #20515 = VRANGEPSZrrik |
| 26642 | { 20514, 5, 1, 0, 1071, 1, 0, 2158, X86ImpOpBase + 78, 0, 0x7ea868046829ULL }, // Inst #20514 = VRANGEPSZrribkz |
| 26643 | { 20513, 6, 1, 0, 1071, 1, 0, 2152, X86ImpOpBase + 78, 0, 0x7aa868046829ULL }, // Inst #20513 = VRANGEPSZrribk |
| 26644 | { 20512, 4, 1, 0, 1071, 1, 0, 931, X86ImpOpBase + 78, 0, 0x78a868046829ULL }, // Inst #20512 = VRANGEPSZrrib |
| 26645 | { 20511, 4, 1, 0, 1071, 1, 0, 931, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8a868046829ULL }, // Inst #20511 = VRANGEPSZrri |
| 26646 | { 20510, 9, 1, 0, 339, 1, 0, 2143, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeea868046819ULL }, // Inst #20510 = VRANGEPSZrmikz |
| 26647 | { 20509, 10, 1, 0, 339, 1, 0, 2133, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaa868046819ULL }, // Inst #20509 = VRANGEPSZrmik |
| 26648 | { 20508, 8, 1, 0, 339, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8a868046819ULL }, // Inst #20508 = VRANGEPSZrmi |
| 26649 | { 20507, 9, 1, 0, 339, 1, 0, 2143, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ea868046819ULL }, // Inst #20507 = VRANGEPSZrmbikz |
| 26650 | { 20506, 10, 1, 0, 339, 1, 0, 2133, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aa868046819ULL }, // Inst #20506 = VRANGEPSZrmbik |
| 26651 | { 20505, 8, 1, 0, 339, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78a868046819ULL }, // Inst #20505 = VRANGEPSZrmbi |
| 26652 | { 20504, 5, 1, 0, 1070, 1, 0, 2120, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7a868046829ULL }, // Inst #20504 = VRANGEPSZ256rrikz |
| 26653 | { 20503, 6, 1, 0, 1070, 1, 0, 2114, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3a868046829ULL }, // Inst #20503 = VRANGEPSZ256rrik |
| 26654 | { 20502, 4, 1, 0, 1070, 1, 0, 927, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1a868046829ULL }, // Inst #20502 = VRANGEPSZ256rri |
| 26655 | { 20501, 9, 1, 0, 337, 1, 0, 2105, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7a868046819ULL }, // Inst #20501 = VRANGEPSZ256rmikz |
| 26656 | { 20500, 10, 1, 0, 337, 1, 0, 2095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3a868046819ULL }, // Inst #20500 = VRANGEPSZ256rmik |
| 26657 | { 20499, 8, 1, 0, 337, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1a868046819ULL }, // Inst #20499 = VRANGEPSZ256rmi |
| 26658 | { 20498, 9, 1, 0, 337, 1, 0, 2105, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77a868046819ULL }, // Inst #20498 = VRANGEPSZ256rmbikz |
| 26659 | { 20497, 10, 1, 0, 337, 1, 0, 2095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73a868046819ULL }, // Inst #20497 = VRANGEPSZ256rmbik |
| 26660 | { 20496, 8, 1, 0, 337, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71a868046819ULL }, // Inst #20496 = VRANGEPSZ256rmbi |
| 26661 | { 20495, 5, 1, 0, 1069, 1, 0, 2082, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6a868046829ULL }, // Inst #20495 = VRANGEPSZ128rrikz |
| 26662 | { 20494, 6, 1, 0, 1069, 1, 0, 2076, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2a868046829ULL }, // Inst #20494 = VRANGEPSZ128rrik |
| 26663 | { 20493, 4, 1, 0, 1069, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0a868046829ULL }, // Inst #20493 = VRANGEPSZ128rri |
| 26664 | { 20492, 9, 1, 0, 29, 1, 0, 2067, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6a868046819ULL }, // Inst #20492 = VRANGEPSZ128rmikz |
| 26665 | { 20491, 10, 1, 0, 29, 1, 0, 2057, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2a868046819ULL }, // Inst #20491 = VRANGEPSZ128rmik |
| 26666 | { 20490, 8, 1, 0, 29, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0a868046819ULL }, // Inst #20490 = VRANGEPSZ128rmi |
| 26667 | { 20489, 9, 1, 0, 29, 1, 0, 2067, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76a868046819ULL }, // Inst #20489 = VRANGEPSZ128rmbikz |
| 26668 | { 20488, 10, 1, 0, 29, 1, 0, 2057, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72a868046819ULL }, // Inst #20488 = VRANGEPSZ128rmbik |
| 26669 | { 20487, 8, 1, 0, 29, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70a868046819ULL }, // Inst #20487 = VRANGEPSZ128rmbi |
| 26670 | { 20486, 5, 1, 0, 1071, 1, 0, 2248, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeea870066829ULL }, // Inst #20486 = VRANGEPDZrrikz |
| 26671 | { 20485, 6, 1, 0, 1071, 1, 0, 2242, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaa870066829ULL }, // Inst #20485 = VRANGEPDZrrik |
| 26672 | { 20484, 5, 1, 0, 1071, 1, 0, 2248, X86ImpOpBase + 78, 0, 0x9ea870066829ULL }, // Inst #20484 = VRANGEPDZrribkz |
| 26673 | { 20483, 6, 1, 0, 1071, 1, 0, 2242, X86ImpOpBase + 78, 0, 0x9aa870066829ULL }, // Inst #20483 = VRANGEPDZrribk |
| 26674 | { 20482, 4, 1, 0, 1071, 1, 0, 931, X86ImpOpBase + 78, 0, 0x98a870066829ULL }, // Inst #20482 = VRANGEPDZrrib |
| 26675 | { 20481, 4, 1, 0, 1071, 1, 0, 931, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8a870066829ULL }, // Inst #20481 = VRANGEPDZrri |
| 26676 | { 20480, 9, 1, 0, 339, 1, 0, 2233, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeea870066819ULL }, // Inst #20480 = VRANGEPDZrmikz |
| 26677 | { 20479, 10, 1, 0, 339, 1, 0, 2223, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaa870066819ULL }, // Inst #20479 = VRANGEPDZrmik |
| 26678 | { 20478, 8, 1, 0, 339, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8a870066819ULL }, // Inst #20478 = VRANGEPDZrmi |
| 26679 | { 20477, 9, 1, 0, 339, 1, 0, 2233, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ea870066819ULL }, // Inst #20477 = VRANGEPDZrmbikz |
| 26680 | { 20476, 10, 1, 0, 339, 1, 0, 2223, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aa870066819ULL }, // Inst #20476 = VRANGEPDZrmbik |
| 26681 | { 20475, 8, 1, 0, 339, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98a870066819ULL }, // Inst #20475 = VRANGEPDZrmbi |
| 26682 | { 20474, 5, 1, 0, 1070, 1, 0, 2218, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7a870066829ULL }, // Inst #20474 = VRANGEPDZ256rrikz |
| 26683 | { 20473, 6, 1, 0, 1070, 1, 0, 2212, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3a870066829ULL }, // Inst #20473 = VRANGEPDZ256rrik |
| 26684 | { 20472, 4, 1, 0, 1070, 1, 0, 927, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1a870066829ULL }, // Inst #20472 = VRANGEPDZ256rri |
| 26685 | { 20471, 9, 1, 0, 337, 1, 0, 2203, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7a870066819ULL }, // Inst #20471 = VRANGEPDZ256rmikz |
| 26686 | { 20470, 10, 1, 0, 337, 1, 0, 2193, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3a870066819ULL }, // Inst #20470 = VRANGEPDZ256rmik |
| 26687 | { 20469, 8, 1, 0, 337, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1a870066819ULL }, // Inst #20469 = VRANGEPDZ256rmi |
| 26688 | { 20468, 9, 1, 0, 337, 1, 0, 2203, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97a870066819ULL }, // Inst #20468 = VRANGEPDZ256rmbikz |
| 26689 | { 20467, 10, 1, 0, 337, 1, 0, 2193, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93a870066819ULL }, // Inst #20467 = VRANGEPDZ256rmbik |
| 26690 | { 20466, 8, 1, 0, 337, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91a870066819ULL }, // Inst #20466 = VRANGEPDZ256rmbi |
| 26691 | { 20465, 5, 1, 0, 1069, 1, 0, 2188, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6a870066829ULL }, // Inst #20465 = VRANGEPDZ128rrikz |
| 26692 | { 20464, 6, 1, 0, 1069, 1, 0, 2182, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2a870066829ULL }, // Inst #20464 = VRANGEPDZ128rrik |
| 26693 | { 20463, 4, 1, 0, 1069, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0a870066829ULL }, // Inst #20463 = VRANGEPDZ128rri |
| 26694 | { 20462, 9, 1, 0, 29, 1, 0, 2173, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6a870066819ULL }, // Inst #20462 = VRANGEPDZ128rmikz |
| 26695 | { 20461, 10, 1, 0, 29, 1, 0, 2163, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2a870066819ULL }, // Inst #20461 = VRANGEPDZ128rmik |
| 26696 | { 20460, 8, 1, 0, 29, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0a870066819ULL }, // Inst #20460 = VRANGEPDZ128rmi |
| 26697 | { 20459, 9, 1, 0, 29, 1, 0, 2173, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96a870066819ULL }, // Inst #20459 = VRANGEPDZ128rmbikz |
| 26698 | { 20458, 10, 1, 0, 29, 1, 0, 2163, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92a870066819ULL }, // Inst #20458 = VRANGEPDZ128rmbik |
| 26699 | { 20457, 8, 1, 0, 29, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90a870066819ULL }, // Inst #20457 = VRANGEPDZ128rmbi |
| 26700 | { 20456, 3, 1, 0, 1055, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf7b8002829ULL }, // Inst #20456 = VPXORrr |
| 26701 | { 20455, 7, 1, 0, 252, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf7b8002819ULL }, // Inst #20455 = VPXORrm |
| 26702 | { 20454, 3, 1, 0, 900, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f7b8002829ULL }, // Inst #20454 = VPXORYrr |
| 26703 | { 20453, 7, 1, 0, 494, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f7b8002819ULL }, // Inst #20453 = VPXORYrm |
| 26704 | { 20452, 4, 1, 0, 497, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef7f8022829ULL }, // Inst #20452 = VPXORQZrrkz |
| 26705 | { 20451, 5, 1, 0, 497, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf7f8022829ULL }, // Inst #20451 = VPXORQZrrk |
| 26706 | { 20450, 3, 1, 0, 1415, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f7f8022829ULL }, // Inst #20450 = VPXORQZrr |
| 26707 | { 20449, 8, 1, 0, 496, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef7f8022819ULL }, // Inst #20449 = VPXORQZrmkz |
| 26708 | { 20448, 9, 1, 0, 496, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf7f8022819ULL }, // Inst #20448 = VPXORQZrmk |
| 26709 | { 20447, 8, 1, 0, 496, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ef7f8022819ULL }, // Inst #20447 = VPXORQZrmbkz |
| 26710 | { 20446, 9, 1, 0, 496, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9af7f8022819ULL }, // Inst #20446 = VPXORQZrmbk |
| 26711 | { 20445, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98f7f8022819ULL }, // Inst #20445 = VPXORQZrmb |
| 26712 | { 20444, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f7f8022819ULL }, // Inst #20444 = VPXORQZrm |
| 26713 | { 20443, 4, 1, 0, 495, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f7f8022829ULL }, // Inst #20443 = VPXORQZ256rrkz |
| 26714 | { 20442, 5, 1, 0, 495, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f7f8022829ULL }, // Inst #20442 = VPXORQZ256rrk |
| 26715 | { 20441, 3, 1, 0, 1414, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f7f8022829ULL }, // Inst #20441 = VPXORQZ256rr |
| 26716 | { 20440, 8, 1, 0, 494, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f7f8022819ULL }, // Inst #20440 = VPXORQZ256rmkz |
| 26717 | { 20439, 9, 1, 0, 494, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f7f8022819ULL }, // Inst #20439 = VPXORQZ256rmk |
| 26718 | { 20438, 8, 1, 0, 494, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97f7f8022819ULL }, // Inst #20438 = VPXORQZ256rmbkz |
| 26719 | { 20437, 9, 1, 0, 494, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93f7f8022819ULL }, // Inst #20437 = VPXORQZ256rmbk |
| 26720 | { 20436, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91f7f8022819ULL }, // Inst #20436 = VPXORQZ256rmb |
| 26721 | { 20435, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f7f8022819ULL }, // Inst #20435 = VPXORQZ256rm |
| 26722 | { 20434, 4, 1, 0, 183, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f7f8022829ULL }, // Inst #20434 = VPXORQZ128rrkz |
| 26723 | { 20433, 5, 1, 0, 183, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f7f8022829ULL }, // Inst #20433 = VPXORQZ128rrk |
| 26724 | { 20432, 3, 1, 0, 1413, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f7f8022829ULL }, // Inst #20432 = VPXORQZ128rr |
| 26725 | { 20431, 8, 1, 0, 252, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f7f8022819ULL }, // Inst #20431 = VPXORQZ128rmkz |
| 26726 | { 20430, 9, 1, 0, 252, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f7f8022819ULL }, // Inst #20430 = VPXORQZ128rmk |
| 26727 | { 20429, 8, 1, 0, 252, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96f7f8022819ULL }, // Inst #20429 = VPXORQZ128rmbkz |
| 26728 | { 20428, 9, 1, 0, 252, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92f7f8022819ULL }, // Inst #20428 = VPXORQZ128rmbk |
| 26729 | { 20427, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90f7f8022819ULL }, // Inst #20427 = VPXORQZ128rmb |
| 26730 | { 20426, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f7f8022819ULL }, // Inst #20426 = VPXORQZ128rm |
| 26731 | { 20425, 4, 1, 0, 497, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef7f8002829ULL }, // Inst #20425 = VPXORDZrrkz |
| 26732 | { 20424, 5, 1, 0, 497, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf7f8002829ULL }, // Inst #20424 = VPXORDZrrk |
| 26733 | { 20423, 3, 1, 0, 1415, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f7f8002829ULL }, // Inst #20423 = VPXORDZrr |
| 26734 | { 20422, 8, 1, 0, 496, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef7f8002819ULL }, // Inst #20422 = VPXORDZrmkz |
| 26735 | { 20421, 9, 1, 0, 496, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf7f8002819ULL }, // Inst #20421 = VPXORDZrmk |
| 26736 | { 20420, 8, 1, 0, 496, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ef7f8002819ULL }, // Inst #20420 = VPXORDZrmbkz |
| 26737 | { 20419, 9, 1, 0, 496, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7af7f8002819ULL }, // Inst #20419 = VPXORDZrmbk |
| 26738 | { 20418, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78f7f8002819ULL }, // Inst #20418 = VPXORDZrmb |
| 26739 | { 20417, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f7f8002819ULL }, // Inst #20417 = VPXORDZrm |
| 26740 | { 20416, 4, 1, 0, 495, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f7f8002829ULL }, // Inst #20416 = VPXORDZ256rrkz |
| 26741 | { 20415, 5, 1, 0, 495, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f7f8002829ULL }, // Inst #20415 = VPXORDZ256rrk |
| 26742 | { 20414, 3, 1, 0, 1414, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f7f8002829ULL }, // Inst #20414 = VPXORDZ256rr |
| 26743 | { 20413, 8, 1, 0, 494, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f7f8002819ULL }, // Inst #20413 = VPXORDZ256rmkz |
| 26744 | { 20412, 9, 1, 0, 494, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f7f8002819ULL }, // Inst #20412 = VPXORDZ256rmk |
| 26745 | { 20411, 8, 1, 0, 494, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77f7f8002819ULL }, // Inst #20411 = VPXORDZ256rmbkz |
| 26746 | { 20410, 9, 1, 0, 494, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73f7f8002819ULL }, // Inst #20410 = VPXORDZ256rmbk |
| 26747 | { 20409, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71f7f8002819ULL }, // Inst #20409 = VPXORDZ256rmb |
| 26748 | { 20408, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f7f8002819ULL }, // Inst #20408 = VPXORDZ256rm |
| 26749 | { 20407, 4, 1, 0, 183, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f7f8002829ULL }, // Inst #20407 = VPXORDZ128rrkz |
| 26750 | { 20406, 5, 1, 0, 183, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f7f8002829ULL }, // Inst #20406 = VPXORDZ128rrk |
| 26751 | { 20405, 3, 1, 0, 1413, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f7f8002829ULL }, // Inst #20405 = VPXORDZ128rr |
| 26752 | { 20404, 8, 1, 0, 252, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f7f8002819ULL }, // Inst #20404 = VPXORDZ128rmkz |
| 26753 | { 20403, 9, 1, 0, 252, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f7f8002819ULL }, // Inst #20403 = VPXORDZ128rmk |
| 26754 | { 20402, 8, 1, 0, 252, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76f7f8002819ULL }, // Inst #20402 = VPXORDZ128rmbkz |
| 26755 | { 20401, 9, 1, 0, 252, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72f7f8002819ULL }, // Inst #20401 = VPXORDZ128rmbk |
| 26756 | { 20400, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70f7f8002819ULL }, // Inst #20400 = VPXORDZ128rmb |
| 26757 | { 20399, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f7f8002819ULL }, // Inst #20399 = VPXORDZ128rm |
| 26758 | { 20398, 3, 1, 0, 251, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb0b8002829ULL }, // Inst #20398 = VPUNPCKLWDrr |
| 26759 | { 20397, 7, 1, 0, 250, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb0b8002819ULL }, // Inst #20397 = VPUNPCKLWDrm |
| 26760 | { 20396, 4, 1, 0, 348, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeeb0f8002829ULL }, // Inst #20396 = VPUNPCKLWDZrrkz |
| 26761 | { 20395, 5, 1, 0, 348, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeab0f8002829ULL }, // Inst #20395 = VPUNPCKLWDZrrk |
| 26762 | { 20394, 3, 1, 0, 1806, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b0f8002829ULL }, // Inst #20394 = VPUNPCKLWDZrr |
| 26763 | { 20393, 8, 1, 0, 1956, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb0f8002819ULL }, // Inst #20393 = VPUNPCKLWDZrmkz |
| 26764 | { 20392, 9, 1, 0, 1956, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab0f8002819ULL }, // Inst #20392 = VPUNPCKLWDZrmk |
| 26765 | { 20391, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b0f8002819ULL }, // Inst #20391 = VPUNPCKLWDZrm |
| 26766 | { 20390, 4, 1, 0, 1703, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7b0f8002829ULL }, // Inst #20390 = VPUNPCKLWDZ256rrkz |
| 26767 | { 20389, 5, 1, 0, 1703, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3b0f8002829ULL }, // Inst #20389 = VPUNPCKLWDZ256rrk |
| 26768 | { 20388, 3, 1, 0, 346, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b0f8002829ULL }, // Inst #20388 = VPUNPCKLWDZ256rr |
| 26769 | { 20387, 8, 1, 0, 1936, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b0f8002819ULL }, // Inst #20387 = VPUNPCKLWDZ256rmkz |
| 26770 | { 20386, 9, 1, 0, 1936, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b0f8002819ULL }, // Inst #20386 = VPUNPCKLWDZ256rmk |
| 26771 | { 20385, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b0f8002819ULL }, // Inst #20385 = VPUNPCKLWDZ256rm |
| 26772 | { 20384, 4, 1, 0, 1702, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6b0f8002829ULL }, // Inst #20384 = VPUNPCKLWDZ128rrkz |
| 26773 | { 20383, 5, 1, 0, 1702, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2b0f8002829ULL }, // Inst #20383 = VPUNPCKLWDZ128rrk |
| 26774 | { 20382, 3, 1, 0, 251, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b0f8002829ULL }, // Inst #20382 = VPUNPCKLWDZ128rr |
| 26775 | { 20381, 8, 1, 0, 1939, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b0f8002819ULL }, // Inst #20381 = VPUNPCKLWDZ128rmkz |
| 26776 | { 20380, 9, 1, 0, 1939, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b0f8002819ULL }, // Inst #20380 = VPUNPCKLWDZ128rmk |
| 26777 | { 20379, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b0f8002819ULL }, // Inst #20379 = VPUNPCKLWDZ128rm |
| 26778 | { 20378, 3, 1, 0, 346, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b0b8002829ULL }, // Inst #20378 = VPUNPCKLWDYrr |
| 26779 | { 20377, 7, 1, 0, 345, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b0b8002819ULL }, // Inst #20377 = VPUNPCKLWDYrm |
| 26780 | { 20376, 3, 1, 0, 251, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb638002829ULL }, // Inst #20376 = VPUNPCKLQDQrr |
| 26781 | { 20375, 7, 1, 0, 250, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb638002819ULL }, // Inst #20375 = VPUNPCKLQDQrm |
| 26782 | { 20374, 4, 1, 0, 1806, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeeb678022829ULL }, // Inst #20374 = VPUNPCKLQDQZrrkz |
| 26783 | { 20373, 5, 1, 0, 1806, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeab678022829ULL }, // Inst #20373 = VPUNPCKLQDQZrrk |
| 26784 | { 20372, 3, 1, 0, 1806, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b678022829ULL }, // Inst #20372 = VPUNPCKLQDQZrr |
| 26785 | { 20371, 8, 1, 0, 347, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb678022819ULL }, // Inst #20371 = VPUNPCKLQDQZrmkz |
| 26786 | { 20370, 9, 1, 0, 347, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab678022819ULL }, // Inst #20370 = VPUNPCKLQDQZrmk |
| 26787 | { 20369, 8, 1, 0, 347, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb678022819ULL }, // Inst #20369 = VPUNPCKLQDQZrmbkz |
| 26788 | { 20368, 9, 1, 0, 347, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab678022819ULL }, // Inst #20368 = VPUNPCKLQDQZrmbk |
| 26789 | { 20367, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b678022819ULL }, // Inst #20367 = VPUNPCKLQDQZrmb |
| 26790 | { 20366, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b678022819ULL }, // Inst #20366 = VPUNPCKLQDQZrm |
| 26791 | { 20365, 4, 1, 0, 346, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc7b678022829ULL }, // Inst #20365 = VPUNPCKLQDQZ256rrkz |
| 26792 | { 20364, 5, 1, 0, 346, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3b678022829ULL }, // Inst #20364 = VPUNPCKLQDQZ256rrk |
| 26793 | { 20363, 3, 1, 0, 346, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b678022829ULL }, // Inst #20363 = VPUNPCKLQDQZ256rr |
| 26794 | { 20362, 8, 1, 0, 345, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b678022819ULL }, // Inst #20362 = VPUNPCKLQDQZ256rmkz |
| 26795 | { 20361, 9, 1, 0, 345, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b678022819ULL }, // Inst #20361 = VPUNPCKLQDQZ256rmk |
| 26796 | { 20360, 8, 1, 0, 345, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b678022819ULL }, // Inst #20360 = VPUNPCKLQDQZ256rmbkz |
| 26797 | { 20359, 9, 1, 0, 345, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b678022819ULL }, // Inst #20359 = VPUNPCKLQDQZ256rmbk |
| 26798 | { 20358, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b678022819ULL }, // Inst #20358 = VPUNPCKLQDQZ256rmb |
| 26799 | { 20357, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b678022819ULL }, // Inst #20357 = VPUNPCKLQDQZ256rm |
| 26800 | { 20356, 4, 1, 0, 251, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6b678022829ULL }, // Inst #20356 = VPUNPCKLQDQZ128rrkz |
| 26801 | { 20355, 5, 1, 0, 251, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2b678022829ULL }, // Inst #20355 = VPUNPCKLQDQZ128rrk |
| 26802 | { 20354, 3, 1, 0, 251, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b678022829ULL }, // Inst #20354 = VPUNPCKLQDQZ128rr |
| 26803 | { 20353, 8, 1, 0, 250, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b678022819ULL }, // Inst #20353 = VPUNPCKLQDQZ128rmkz |
| 26804 | { 20352, 9, 1, 0, 250, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b678022819ULL }, // Inst #20352 = VPUNPCKLQDQZ128rmk |
| 26805 | { 20351, 8, 1, 0, 250, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b678022819ULL }, // Inst #20351 = VPUNPCKLQDQZ128rmbkz |
| 26806 | { 20350, 9, 1, 0, 250, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b678022819ULL }, // Inst #20350 = VPUNPCKLQDQZ128rmbk |
| 26807 | { 20349, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b678022819ULL }, // Inst #20349 = VPUNPCKLQDQZ128rmb |
| 26808 | { 20348, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b678022819ULL }, // Inst #20348 = VPUNPCKLQDQZ128rm |
| 26809 | { 20347, 3, 1, 0, 346, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b638002829ULL }, // Inst #20347 = VPUNPCKLQDQYrr |
| 26810 | { 20346, 7, 1, 0, 345, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b638002819ULL }, // Inst #20346 = VPUNPCKLQDQYrm |
| 26811 | { 20345, 3, 1, 0, 251, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb138002829ULL }, // Inst #20345 = VPUNPCKLDQrr |
| 26812 | { 20344, 7, 1, 0, 250, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb138002819ULL }, // Inst #20344 = VPUNPCKLDQrm |
| 26813 | { 20343, 4, 1, 0, 1806, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeeb178002829ULL }, // Inst #20343 = VPUNPCKLDQZrrkz |
| 26814 | { 20342, 5, 1, 0, 1806, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeab178002829ULL }, // Inst #20342 = VPUNPCKLDQZrrk |
| 26815 | { 20341, 3, 1, 0, 1806, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b178002829ULL }, // Inst #20341 = VPUNPCKLDQZrr |
| 26816 | { 20340, 8, 1, 0, 347, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb178002819ULL }, // Inst #20340 = VPUNPCKLDQZrmkz |
| 26817 | { 20339, 9, 1, 0, 347, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab178002819ULL }, // Inst #20339 = VPUNPCKLDQZrmk |
| 26818 | { 20338, 8, 1, 0, 347, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb178002819ULL }, // Inst #20338 = VPUNPCKLDQZrmbkz |
| 26819 | { 20337, 9, 1, 0, 347, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab178002819ULL }, // Inst #20337 = VPUNPCKLDQZrmbk |
| 26820 | { 20336, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b178002819ULL }, // Inst #20336 = VPUNPCKLDQZrmb |
| 26821 | { 20335, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b178002819ULL }, // Inst #20335 = VPUNPCKLDQZrm |
| 26822 | { 20334, 4, 1, 0, 346, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc7b178002829ULL }, // Inst #20334 = VPUNPCKLDQZ256rrkz |
| 26823 | { 20333, 5, 1, 0, 346, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3b178002829ULL }, // Inst #20333 = VPUNPCKLDQZ256rrk |
| 26824 | { 20332, 3, 1, 0, 346, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b178002829ULL }, // Inst #20332 = VPUNPCKLDQZ256rr |
| 26825 | { 20331, 8, 1, 0, 345, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b178002819ULL }, // Inst #20331 = VPUNPCKLDQZ256rmkz |
| 26826 | { 20330, 9, 1, 0, 345, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b178002819ULL }, // Inst #20330 = VPUNPCKLDQZ256rmk |
| 26827 | { 20329, 8, 1, 0, 345, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b178002819ULL }, // Inst #20329 = VPUNPCKLDQZ256rmbkz |
| 26828 | { 20328, 9, 1, 0, 345, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b178002819ULL }, // Inst #20328 = VPUNPCKLDQZ256rmbk |
| 26829 | { 20327, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b178002819ULL }, // Inst #20327 = VPUNPCKLDQZ256rmb |
| 26830 | { 20326, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b178002819ULL }, // Inst #20326 = VPUNPCKLDQZ256rm |
| 26831 | { 20325, 4, 1, 0, 251, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6b178002829ULL }, // Inst #20325 = VPUNPCKLDQZ128rrkz |
| 26832 | { 20324, 5, 1, 0, 251, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2b178002829ULL }, // Inst #20324 = VPUNPCKLDQZ128rrk |
| 26833 | { 20323, 3, 1, 0, 251, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b178002829ULL }, // Inst #20323 = VPUNPCKLDQZ128rr |
| 26834 | { 20322, 8, 1, 0, 250, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b178002819ULL }, // Inst #20322 = VPUNPCKLDQZ128rmkz |
| 26835 | { 20321, 9, 1, 0, 250, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b178002819ULL }, // Inst #20321 = VPUNPCKLDQZ128rmk |
| 26836 | { 20320, 8, 1, 0, 250, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b178002819ULL }, // Inst #20320 = VPUNPCKLDQZ128rmbkz |
| 26837 | { 20319, 9, 1, 0, 250, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b178002819ULL }, // Inst #20319 = VPUNPCKLDQZ128rmbk |
| 26838 | { 20318, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b178002819ULL }, // Inst #20318 = VPUNPCKLDQZ128rmb |
| 26839 | { 20317, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b178002819ULL }, // Inst #20317 = VPUNPCKLDQZ128rm |
| 26840 | { 20316, 3, 1, 0, 346, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b138002829ULL }, // Inst #20316 = VPUNPCKLDQYrr |
| 26841 | { 20315, 7, 1, 0, 345, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b138002819ULL }, // Inst #20315 = VPUNPCKLDQYrm |
| 26842 | { 20314, 3, 1, 0, 251, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb038002829ULL }, // Inst #20314 = VPUNPCKLBWrr |
| 26843 | { 20313, 7, 1, 0, 250, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb038002819ULL }, // Inst #20313 = VPUNPCKLBWrm |
| 26844 | { 20312, 4, 1, 0, 348, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeeb078002829ULL }, // Inst #20312 = VPUNPCKLBWZrrkz |
| 26845 | { 20311, 5, 1, 0, 348, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeab078002829ULL }, // Inst #20311 = VPUNPCKLBWZrrk |
| 26846 | { 20310, 3, 1, 0, 1806, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b078002829ULL }, // Inst #20310 = VPUNPCKLBWZrr |
| 26847 | { 20309, 8, 1, 0, 1956, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb078002819ULL }, // Inst #20309 = VPUNPCKLBWZrmkz |
| 26848 | { 20308, 9, 1, 0, 1956, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab078002819ULL }, // Inst #20308 = VPUNPCKLBWZrmk |
| 26849 | { 20307, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b078002819ULL }, // Inst #20307 = VPUNPCKLBWZrm |
| 26850 | { 20306, 4, 1, 0, 1703, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7b078002829ULL }, // Inst #20306 = VPUNPCKLBWZ256rrkz |
| 26851 | { 20305, 5, 1, 0, 1703, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3b078002829ULL }, // Inst #20305 = VPUNPCKLBWZ256rrk |
| 26852 | { 20304, 3, 1, 0, 346, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b078002829ULL }, // Inst #20304 = VPUNPCKLBWZ256rr |
| 26853 | { 20303, 8, 1, 0, 1936, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b078002819ULL }, // Inst #20303 = VPUNPCKLBWZ256rmkz |
| 26854 | { 20302, 9, 1, 0, 1936, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b078002819ULL }, // Inst #20302 = VPUNPCKLBWZ256rmk |
| 26855 | { 20301, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b078002819ULL }, // Inst #20301 = VPUNPCKLBWZ256rm |
| 26856 | { 20300, 4, 1, 0, 1702, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6b078002829ULL }, // Inst #20300 = VPUNPCKLBWZ128rrkz |
| 26857 | { 20299, 5, 1, 0, 1702, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2b078002829ULL }, // Inst #20299 = VPUNPCKLBWZ128rrk |
| 26858 | { 20298, 3, 1, 0, 251, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b078002829ULL }, // Inst #20298 = VPUNPCKLBWZ128rr |
| 26859 | { 20297, 8, 1, 0, 1939, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b078002819ULL }, // Inst #20297 = VPUNPCKLBWZ128rmkz |
| 26860 | { 20296, 9, 1, 0, 1939, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b078002819ULL }, // Inst #20296 = VPUNPCKLBWZ128rmk |
| 26861 | { 20295, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b078002819ULL }, // Inst #20295 = VPUNPCKLBWZ128rm |
| 26862 | { 20294, 3, 1, 0, 346, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b038002829ULL }, // Inst #20294 = VPUNPCKLBWYrr |
| 26863 | { 20293, 7, 1, 0, 345, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b038002819ULL }, // Inst #20293 = VPUNPCKLBWYrm |
| 26864 | { 20292, 3, 1, 0, 251, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb4b8002829ULL }, // Inst #20292 = VPUNPCKHWDrr |
| 26865 | { 20291, 7, 1, 0, 250, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb4b8002819ULL }, // Inst #20291 = VPUNPCKHWDrm |
| 26866 | { 20290, 4, 1, 0, 348, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeeb4f8002829ULL }, // Inst #20290 = VPUNPCKHWDZrrkz |
| 26867 | { 20289, 5, 1, 0, 348, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeab4f8002829ULL }, // Inst #20289 = VPUNPCKHWDZrrk |
| 26868 | { 20288, 3, 1, 0, 1806, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b4f8002829ULL }, // Inst #20288 = VPUNPCKHWDZrr |
| 26869 | { 20287, 8, 1, 0, 1956, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb4f8002819ULL }, // Inst #20287 = VPUNPCKHWDZrmkz |
| 26870 | { 20286, 9, 1, 0, 1956, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab4f8002819ULL }, // Inst #20286 = VPUNPCKHWDZrmk |
| 26871 | { 20285, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b4f8002819ULL }, // Inst #20285 = VPUNPCKHWDZrm |
| 26872 | { 20284, 4, 1, 0, 1703, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7b4f8002829ULL }, // Inst #20284 = VPUNPCKHWDZ256rrkz |
| 26873 | { 20283, 5, 1, 0, 1703, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3b4f8002829ULL }, // Inst #20283 = VPUNPCKHWDZ256rrk |
| 26874 | { 20282, 3, 1, 0, 346, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b4f8002829ULL }, // Inst #20282 = VPUNPCKHWDZ256rr |
| 26875 | { 20281, 8, 1, 0, 1936, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b4f8002819ULL }, // Inst #20281 = VPUNPCKHWDZ256rmkz |
| 26876 | { 20280, 9, 1, 0, 1936, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b4f8002819ULL }, // Inst #20280 = VPUNPCKHWDZ256rmk |
| 26877 | { 20279, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b4f8002819ULL }, // Inst #20279 = VPUNPCKHWDZ256rm |
| 26878 | { 20278, 4, 1, 0, 1702, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6b4f8002829ULL }, // Inst #20278 = VPUNPCKHWDZ128rrkz |
| 26879 | { 20277, 5, 1, 0, 1702, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2b4f8002829ULL }, // Inst #20277 = VPUNPCKHWDZ128rrk |
| 26880 | { 20276, 3, 1, 0, 251, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b4f8002829ULL }, // Inst #20276 = VPUNPCKHWDZ128rr |
| 26881 | { 20275, 8, 1, 0, 1939, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b4f8002819ULL }, // Inst #20275 = VPUNPCKHWDZ128rmkz |
| 26882 | { 20274, 9, 1, 0, 1939, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b4f8002819ULL }, // Inst #20274 = VPUNPCKHWDZ128rmk |
| 26883 | { 20273, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b4f8002819ULL }, // Inst #20273 = VPUNPCKHWDZ128rm |
| 26884 | { 20272, 3, 1, 0, 346, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b4b8002829ULL }, // Inst #20272 = VPUNPCKHWDYrr |
| 26885 | { 20271, 7, 1, 0, 345, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b4b8002819ULL }, // Inst #20271 = VPUNPCKHWDYrm |
| 26886 | { 20270, 3, 1, 0, 251, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb6b8002829ULL }, // Inst #20270 = VPUNPCKHQDQrr |
| 26887 | { 20269, 7, 1, 0, 250, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb6b8002819ULL }, // Inst #20269 = VPUNPCKHQDQrm |
| 26888 | { 20268, 4, 1, 0, 1806, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeeb6f8022829ULL }, // Inst #20268 = VPUNPCKHQDQZrrkz |
| 26889 | { 20267, 5, 1, 0, 1806, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeab6f8022829ULL }, // Inst #20267 = VPUNPCKHQDQZrrk |
| 26890 | { 20266, 3, 1, 0, 1806, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b6f8022829ULL }, // Inst #20266 = VPUNPCKHQDQZrr |
| 26891 | { 20265, 8, 1, 0, 347, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb6f8022819ULL }, // Inst #20265 = VPUNPCKHQDQZrmkz |
| 26892 | { 20264, 9, 1, 0, 347, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab6f8022819ULL }, // Inst #20264 = VPUNPCKHQDQZrmk |
| 26893 | { 20263, 8, 1, 0, 347, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb6f8022819ULL }, // Inst #20263 = VPUNPCKHQDQZrmbkz |
| 26894 | { 20262, 9, 1, 0, 347, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab6f8022819ULL }, // Inst #20262 = VPUNPCKHQDQZrmbk |
| 26895 | { 20261, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b6f8022819ULL }, // Inst #20261 = VPUNPCKHQDQZrmb |
| 26896 | { 20260, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b6f8022819ULL }, // Inst #20260 = VPUNPCKHQDQZrm |
| 26897 | { 20259, 4, 1, 0, 346, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc7b6f8022829ULL }, // Inst #20259 = VPUNPCKHQDQZ256rrkz |
| 26898 | { 20258, 5, 1, 0, 346, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3b6f8022829ULL }, // Inst #20258 = VPUNPCKHQDQZ256rrk |
| 26899 | { 20257, 3, 1, 0, 346, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b6f8022829ULL }, // Inst #20257 = VPUNPCKHQDQZ256rr |
| 26900 | { 20256, 8, 1, 0, 345, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b6f8022819ULL }, // Inst #20256 = VPUNPCKHQDQZ256rmkz |
| 26901 | { 20255, 9, 1, 0, 345, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b6f8022819ULL }, // Inst #20255 = VPUNPCKHQDQZ256rmk |
| 26902 | { 20254, 8, 1, 0, 345, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b6f8022819ULL }, // Inst #20254 = VPUNPCKHQDQZ256rmbkz |
| 26903 | { 20253, 9, 1, 0, 345, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b6f8022819ULL }, // Inst #20253 = VPUNPCKHQDQZ256rmbk |
| 26904 | { 20252, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b6f8022819ULL }, // Inst #20252 = VPUNPCKHQDQZ256rmb |
| 26905 | { 20251, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b6f8022819ULL }, // Inst #20251 = VPUNPCKHQDQZ256rm |
| 26906 | { 20250, 4, 1, 0, 251, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6b6f8022829ULL }, // Inst #20250 = VPUNPCKHQDQZ128rrkz |
| 26907 | { 20249, 5, 1, 0, 251, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2b6f8022829ULL }, // Inst #20249 = VPUNPCKHQDQZ128rrk |
| 26908 | { 20248, 3, 1, 0, 251, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b6f8022829ULL }, // Inst #20248 = VPUNPCKHQDQZ128rr |
| 26909 | { 20247, 8, 1, 0, 250, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b6f8022819ULL }, // Inst #20247 = VPUNPCKHQDQZ128rmkz |
| 26910 | { 20246, 9, 1, 0, 250, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b6f8022819ULL }, // Inst #20246 = VPUNPCKHQDQZ128rmk |
| 26911 | { 20245, 8, 1, 0, 250, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b6f8022819ULL }, // Inst #20245 = VPUNPCKHQDQZ128rmbkz |
| 26912 | { 20244, 9, 1, 0, 250, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b6f8022819ULL }, // Inst #20244 = VPUNPCKHQDQZ128rmbk |
| 26913 | { 20243, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b6f8022819ULL }, // Inst #20243 = VPUNPCKHQDQZ128rmb |
| 26914 | { 20242, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b6f8022819ULL }, // Inst #20242 = VPUNPCKHQDQZ128rm |
| 26915 | { 20241, 3, 1, 0, 346, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b6b8002829ULL }, // Inst #20241 = VPUNPCKHQDQYrr |
| 26916 | { 20240, 7, 1, 0, 345, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b6b8002819ULL }, // Inst #20240 = VPUNPCKHQDQYrm |
| 26917 | { 20239, 3, 1, 0, 251, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb538002829ULL }, // Inst #20239 = VPUNPCKHDQrr |
| 26918 | { 20238, 7, 1, 0, 250, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb538002819ULL }, // Inst #20238 = VPUNPCKHDQrm |
| 26919 | { 20237, 4, 1, 0, 1806, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeeb578002829ULL }, // Inst #20237 = VPUNPCKHDQZrrkz |
| 26920 | { 20236, 5, 1, 0, 1806, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeab578002829ULL }, // Inst #20236 = VPUNPCKHDQZrrk |
| 26921 | { 20235, 3, 1, 0, 1806, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b578002829ULL }, // Inst #20235 = VPUNPCKHDQZrr |
| 26922 | { 20234, 8, 1, 0, 347, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb578002819ULL }, // Inst #20234 = VPUNPCKHDQZrmkz |
| 26923 | { 20233, 9, 1, 0, 347, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab578002819ULL }, // Inst #20233 = VPUNPCKHDQZrmk |
| 26924 | { 20232, 8, 1, 0, 347, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb578002819ULL }, // Inst #20232 = VPUNPCKHDQZrmbkz |
| 26925 | { 20231, 9, 1, 0, 347, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab578002819ULL }, // Inst #20231 = VPUNPCKHDQZrmbk |
| 26926 | { 20230, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b578002819ULL }, // Inst #20230 = VPUNPCKHDQZrmb |
| 26927 | { 20229, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b578002819ULL }, // Inst #20229 = VPUNPCKHDQZrm |
| 26928 | { 20228, 4, 1, 0, 346, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc7b578002829ULL }, // Inst #20228 = VPUNPCKHDQZ256rrkz |
| 26929 | { 20227, 5, 1, 0, 346, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3b578002829ULL }, // Inst #20227 = VPUNPCKHDQZ256rrk |
| 26930 | { 20226, 3, 1, 0, 346, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b578002829ULL }, // Inst #20226 = VPUNPCKHDQZ256rr |
| 26931 | { 20225, 8, 1, 0, 345, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b578002819ULL }, // Inst #20225 = VPUNPCKHDQZ256rmkz |
| 26932 | { 20224, 9, 1, 0, 345, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b578002819ULL }, // Inst #20224 = VPUNPCKHDQZ256rmk |
| 26933 | { 20223, 8, 1, 0, 345, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b578002819ULL }, // Inst #20223 = VPUNPCKHDQZ256rmbkz |
| 26934 | { 20222, 9, 1, 0, 345, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b578002819ULL }, // Inst #20222 = VPUNPCKHDQZ256rmbk |
| 26935 | { 20221, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b578002819ULL }, // Inst #20221 = VPUNPCKHDQZ256rmb |
| 26936 | { 20220, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b578002819ULL }, // Inst #20220 = VPUNPCKHDQZ256rm |
| 26937 | { 20219, 4, 1, 0, 251, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6b578002829ULL }, // Inst #20219 = VPUNPCKHDQZ128rrkz |
| 26938 | { 20218, 5, 1, 0, 251, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2b578002829ULL }, // Inst #20218 = VPUNPCKHDQZ128rrk |
| 26939 | { 20217, 3, 1, 0, 251, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b578002829ULL }, // Inst #20217 = VPUNPCKHDQZ128rr |
| 26940 | { 20216, 8, 1, 0, 250, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b578002819ULL }, // Inst #20216 = VPUNPCKHDQZ128rmkz |
| 26941 | { 20215, 9, 1, 0, 250, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b578002819ULL }, // Inst #20215 = VPUNPCKHDQZ128rmk |
| 26942 | { 20214, 8, 1, 0, 250, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b578002819ULL }, // Inst #20214 = VPUNPCKHDQZ128rmbkz |
| 26943 | { 20213, 9, 1, 0, 250, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b578002819ULL }, // Inst #20213 = VPUNPCKHDQZ128rmbk |
| 26944 | { 20212, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b578002819ULL }, // Inst #20212 = VPUNPCKHDQZ128rmb |
| 26945 | { 20211, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b578002819ULL }, // Inst #20211 = VPUNPCKHDQZ128rm |
| 26946 | { 20210, 3, 1, 0, 346, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b538002829ULL }, // Inst #20210 = VPUNPCKHDQYrr |
| 26947 | { 20209, 7, 1, 0, 345, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b538002819ULL }, // Inst #20209 = VPUNPCKHDQYrm |
| 26948 | { 20208, 3, 1, 0, 251, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb438002829ULL }, // Inst #20208 = VPUNPCKHBWrr |
| 26949 | { 20207, 7, 1, 0, 250, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb438002819ULL }, // Inst #20207 = VPUNPCKHBWrm |
| 26950 | { 20206, 4, 1, 0, 348, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeeb478002829ULL }, // Inst #20206 = VPUNPCKHBWZrrkz |
| 26951 | { 20205, 5, 1, 0, 348, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeab478002829ULL }, // Inst #20205 = VPUNPCKHBWZrrk |
| 26952 | { 20204, 3, 1, 0, 1806, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b478002829ULL }, // Inst #20204 = VPUNPCKHBWZrr |
| 26953 | { 20203, 8, 1, 0, 1956, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb478002819ULL }, // Inst #20203 = VPUNPCKHBWZrmkz |
| 26954 | { 20202, 9, 1, 0, 1956, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab478002819ULL }, // Inst #20202 = VPUNPCKHBWZrmk |
| 26955 | { 20201, 7, 1, 0, 347, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b478002819ULL }, // Inst #20201 = VPUNPCKHBWZrm |
| 26956 | { 20200, 4, 1, 0, 1703, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7b478002829ULL }, // Inst #20200 = VPUNPCKHBWZ256rrkz |
| 26957 | { 20199, 5, 1, 0, 1703, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3b478002829ULL }, // Inst #20199 = VPUNPCKHBWZ256rrk |
| 26958 | { 20198, 3, 1, 0, 346, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b478002829ULL }, // Inst #20198 = VPUNPCKHBWZ256rr |
| 26959 | { 20197, 8, 1, 0, 1936, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b478002819ULL }, // Inst #20197 = VPUNPCKHBWZ256rmkz |
| 26960 | { 20196, 9, 1, 0, 1936, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b478002819ULL }, // Inst #20196 = VPUNPCKHBWZ256rmk |
| 26961 | { 20195, 7, 1, 0, 345, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b478002819ULL }, // Inst #20195 = VPUNPCKHBWZ256rm |
| 26962 | { 20194, 4, 1, 0, 1702, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6b478002829ULL }, // Inst #20194 = VPUNPCKHBWZ128rrkz |
| 26963 | { 20193, 5, 1, 0, 1702, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2b478002829ULL }, // Inst #20193 = VPUNPCKHBWZ128rrk |
| 26964 | { 20192, 3, 1, 0, 251, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b478002829ULL }, // Inst #20192 = VPUNPCKHBWZ128rr |
| 26965 | { 20191, 8, 1, 0, 1939, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b478002819ULL }, // Inst #20191 = VPUNPCKHBWZ128rmkz |
| 26966 | { 20190, 9, 1, 0, 1939, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b478002819ULL }, // Inst #20190 = VPUNPCKHBWZ128rmk |
| 26967 | { 20189, 7, 1, 0, 250, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b478002819ULL }, // Inst #20189 = VPUNPCKHBWZ128rm |
| 26968 | { 20188, 3, 1, 0, 346, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b438002829ULL }, // Inst #20188 = VPUNPCKHBWYrr |
| 26969 | { 20187, 7, 1, 0, 345, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b438002819ULL }, // Inst #20187 = VPUNPCKHBWYrm |
| 26970 | { 20186, 2, 0, 0, 288, 0, 1, 557, X86ImpOpBase + 0, 0, 0xbb8004829ULL }, // Inst #20186 = VPTESTrr |
| 26971 | { 20185, 6, 0, 0, 287, 0, 1, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xbb8004819ULL }, // Inst #20185 = VPTESTrm |
| 26972 | { 20184, 2, 0, 0, 568, 0, 1, 3116, X86ImpOpBase + 0, 0, 0x10bb8004829ULL }, // Inst #20184 = VPTESTYrr |
| 26973 | { 20183, 6, 0, 0, 567, 0, 1, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10bb8004819ULL }, // Inst #20183 = VPTESTYrm |
| 26974 | { 20182, 4, 1, 0, 1128, 0, 0, 5559, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9378025029ULL }, // Inst #20182 = VPTESTNMWZrrk |
| 26975 | { 20181, 3, 1, 0, 1258, 0, 0, 5556, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89378025029ULL }, // Inst #20181 = VPTESTNMWZrr |
| 26976 | { 20180, 8, 1, 0, 1356, 0, 0, 5548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9378025019ULL }, // Inst #20180 = VPTESTNMWZrmk |
| 26977 | { 20179, 7, 1, 0, 1356, 0, 0, 5541, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89378025019ULL }, // Inst #20179 = VPTESTNMWZrm |
| 26978 | { 20178, 4, 1, 0, 1127, 0, 0, 5537, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39378025029ULL }, // Inst #20178 = VPTESTNMWZ256rrk |
| 26979 | { 20177, 3, 1, 0, 1127, 0, 0, 5534, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19378025029ULL }, // Inst #20177 = VPTESTNMWZ256rr |
| 26980 | { 20176, 8, 1, 0, 1355, 0, 0, 5526, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39378025019ULL }, // Inst #20176 = VPTESTNMWZ256rmk |
| 26981 | { 20175, 7, 1, 0, 1355, 0, 0, 5519, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19378025019ULL }, // Inst #20175 = VPTESTNMWZ256rm |
| 26982 | { 20174, 4, 1, 0, 1126, 0, 0, 5515, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29378025029ULL }, // Inst #20174 = VPTESTNMWZ128rrk |
| 26983 | { 20173, 3, 1, 0, 1257, 0, 0, 5512, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09378025029ULL }, // Inst #20173 = VPTESTNMWZ128rr |
| 26984 | { 20172, 8, 1, 0, 1345, 0, 0, 5504, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29378025019ULL }, // Inst #20172 = VPTESTNMWZ128rmk |
| 26985 | { 20171, 7, 1, 0, 1345, 0, 0, 5497, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09378025019ULL }, // Inst #20171 = VPTESTNMWZ128rm |
| 26986 | { 20170, 4, 1, 0, 1128, 0, 0, 5493, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea93f8025029ULL }, // Inst #20170 = VPTESTNMQZrrk |
| 26987 | { 20169, 3, 1, 0, 1258, 0, 0, 5490, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe893f8025029ULL }, // Inst #20169 = VPTESTNMQZrr |
| 26988 | { 20168, 8, 1, 0, 1356, 0, 0, 5482, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea93f8025019ULL }, // Inst #20168 = VPTESTNMQZrmk |
| 26989 | { 20167, 8, 1, 0, 1356, 0, 0, 5482, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a93f8025019ULL }, // Inst #20167 = VPTESTNMQZrmbk |
| 26990 | { 20166, 7, 1, 0, 1356, 0, 0, 5475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9893f8025019ULL }, // Inst #20166 = VPTESTNMQZrmb |
| 26991 | { 20165, 7, 1, 0, 1356, 0, 0, 5475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe893f8025019ULL }, // Inst #20165 = VPTESTNMQZrm |
| 26992 | { 20164, 4, 1, 0, 1127, 0, 0, 5471, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc393f8025029ULL }, // Inst #20164 = VPTESTNMQZ256rrk |
| 26993 | { 20163, 3, 1, 0, 1127, 0, 0, 5468, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc193f8025029ULL }, // Inst #20163 = VPTESTNMQZ256rr |
| 26994 | { 20162, 8, 1, 0, 1355, 0, 0, 5460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc393f8025019ULL }, // Inst #20162 = VPTESTNMQZ256rmk |
| 26995 | { 20161, 8, 1, 0, 1355, 0, 0, 5460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9393f8025019ULL }, // Inst #20161 = VPTESTNMQZ256rmbk |
| 26996 | { 20160, 7, 1, 0, 1355, 0, 0, 5453, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9193f8025019ULL }, // Inst #20160 = VPTESTNMQZ256rmb |
| 26997 | { 20159, 7, 1, 0, 1355, 0, 0, 5453, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc193f8025019ULL }, // Inst #20159 = VPTESTNMQZ256rm |
| 26998 | { 20158, 4, 1, 0, 1126, 0, 0, 5449, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa293f8025029ULL }, // Inst #20158 = VPTESTNMQZ128rrk |
| 26999 | { 20157, 3, 1, 0, 1257, 0, 0, 5446, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa093f8025029ULL }, // Inst #20157 = VPTESTNMQZ128rr |
| 27000 | { 20156, 8, 1, 0, 1345, 0, 0, 5438, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa293f8025019ULL }, // Inst #20156 = VPTESTNMQZ128rmk |
| 27001 | { 20155, 8, 1, 0, 1345, 0, 0, 5438, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9293f8025019ULL }, // Inst #20155 = VPTESTNMQZ128rmbk |
| 27002 | { 20154, 7, 1, 0, 1345, 0, 0, 5431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9093f8025019ULL }, // Inst #20154 = VPTESTNMQZ128rmb |
| 27003 | { 20153, 7, 1, 0, 1345, 0, 0, 5431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa093f8025019ULL }, // Inst #20153 = VPTESTNMQZ128rm |
| 27004 | { 20152, 4, 1, 0, 1128, 0, 0, 5427, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea93f8005029ULL }, // Inst #20152 = VPTESTNMDZrrk |
| 27005 | { 20151, 3, 1, 0, 1258, 0, 0, 5424, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe893f8005029ULL }, // Inst #20151 = VPTESTNMDZrr |
| 27006 | { 20150, 8, 1, 0, 1356, 0, 0, 5416, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea93f8005019ULL }, // Inst #20150 = VPTESTNMDZrmk |
| 27007 | { 20149, 8, 1, 0, 1356, 0, 0, 5416, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a93f8005019ULL }, // Inst #20149 = VPTESTNMDZrmbk |
| 27008 | { 20148, 7, 1, 0, 1356, 0, 0, 5409, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7893f8005019ULL }, // Inst #20148 = VPTESTNMDZrmb |
| 27009 | { 20147, 7, 1, 0, 1356, 0, 0, 5409, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe893f8005019ULL }, // Inst #20147 = VPTESTNMDZrm |
| 27010 | { 20146, 4, 1, 0, 1127, 0, 0, 5405, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc393f8005029ULL }, // Inst #20146 = VPTESTNMDZ256rrk |
| 27011 | { 20145, 3, 1, 0, 1127, 0, 0, 5402, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc193f8005029ULL }, // Inst #20145 = VPTESTNMDZ256rr |
| 27012 | { 20144, 8, 1, 0, 1355, 0, 0, 5394, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc393f8005019ULL }, // Inst #20144 = VPTESTNMDZ256rmk |
| 27013 | { 20143, 8, 1, 0, 1355, 0, 0, 5394, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7393f8005019ULL }, // Inst #20143 = VPTESTNMDZ256rmbk |
| 27014 | { 20142, 7, 1, 0, 1355, 0, 0, 5387, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7193f8005019ULL }, // Inst #20142 = VPTESTNMDZ256rmb |
| 27015 | { 20141, 7, 1, 0, 1355, 0, 0, 5387, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc193f8005019ULL }, // Inst #20141 = VPTESTNMDZ256rm |
| 27016 | { 20140, 4, 1, 0, 1126, 0, 0, 5383, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa293f8005029ULL }, // Inst #20140 = VPTESTNMDZ128rrk |
| 27017 | { 20139, 3, 1, 0, 1257, 0, 0, 5380, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa093f8005029ULL }, // Inst #20139 = VPTESTNMDZ128rr |
| 27018 | { 20138, 8, 1, 0, 1345, 0, 0, 5372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa293f8005019ULL }, // Inst #20138 = VPTESTNMDZ128rmk |
| 27019 | { 20137, 8, 1, 0, 1345, 0, 0, 5372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7293f8005019ULL }, // Inst #20137 = VPTESTNMDZ128rmbk |
| 27020 | { 20136, 7, 1, 0, 1345, 0, 0, 5365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7093f8005019ULL }, // Inst #20136 = VPTESTNMDZ128rmb |
| 27021 | { 20135, 7, 1, 0, 1345, 0, 0, 5365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa093f8005019ULL }, // Inst #20135 = VPTESTNMDZ128rm |
| 27022 | { 20134, 4, 1, 0, 1128, 0, 0, 5361, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9378005029ULL }, // Inst #20134 = VPTESTNMBZrrk |
| 27023 | { 20133, 3, 1, 0, 1258, 0, 0, 5358, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89378005029ULL }, // Inst #20133 = VPTESTNMBZrr |
| 27024 | { 20132, 8, 1, 0, 1356, 0, 0, 5350, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9378005019ULL }, // Inst #20132 = VPTESTNMBZrmk |
| 27025 | { 20131, 7, 1, 0, 1356, 0, 0, 5343, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89378005019ULL }, // Inst #20131 = VPTESTNMBZrm |
| 27026 | { 20130, 4, 1, 0, 1127, 0, 0, 5339, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39378005029ULL }, // Inst #20130 = VPTESTNMBZ256rrk |
| 27027 | { 20129, 3, 1, 0, 1127, 0, 0, 5336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19378005029ULL }, // Inst #20129 = VPTESTNMBZ256rr |
| 27028 | { 20128, 8, 1, 0, 1355, 0, 0, 5328, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39378005019ULL }, // Inst #20128 = VPTESTNMBZ256rmk |
| 27029 | { 20127, 7, 1, 0, 1355, 0, 0, 5321, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19378005019ULL }, // Inst #20127 = VPTESTNMBZ256rm |
| 27030 | { 20126, 4, 1, 0, 1126, 0, 0, 5317, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29378005029ULL }, // Inst #20126 = VPTESTNMBZ128rrk |
| 27031 | { 20125, 3, 1, 0, 1257, 0, 0, 5314, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09378005029ULL }, // Inst #20125 = VPTESTNMBZ128rr |
| 27032 | { 20124, 8, 1, 0, 1345, 0, 0, 5306, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29378005019ULL }, // Inst #20124 = VPTESTNMBZ128rmk |
| 27033 | { 20123, 7, 1, 0, 1345, 0, 0, 5299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09378005019ULL }, // Inst #20123 = VPTESTNMBZ128rm |
| 27034 | { 20122, 4, 1, 0, 1128, 0, 0, 5559, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9378024829ULL }, // Inst #20122 = VPTESTMWZrrk |
| 27035 | { 20121, 3, 1, 0, 1258, 0, 0, 5556, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89378024829ULL }, // Inst #20121 = VPTESTMWZrr |
| 27036 | { 20120, 8, 1, 0, 1356, 0, 0, 5548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9378024819ULL }, // Inst #20120 = VPTESTMWZrmk |
| 27037 | { 20119, 7, 1, 0, 1356, 0, 0, 5541, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89378024819ULL }, // Inst #20119 = VPTESTMWZrm |
| 27038 | { 20118, 4, 1, 0, 1127, 0, 0, 5537, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39378024829ULL }, // Inst #20118 = VPTESTMWZ256rrk |
| 27039 | { 20117, 3, 1, 0, 1127, 0, 0, 5534, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19378024829ULL }, // Inst #20117 = VPTESTMWZ256rr |
| 27040 | { 20116, 8, 1, 0, 1355, 0, 0, 5526, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39378024819ULL }, // Inst #20116 = VPTESTMWZ256rmk |
| 27041 | { 20115, 7, 1, 0, 1355, 0, 0, 5519, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19378024819ULL }, // Inst #20115 = VPTESTMWZ256rm |
| 27042 | { 20114, 4, 1, 0, 1126, 0, 0, 5515, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29378024829ULL }, // Inst #20114 = VPTESTMWZ128rrk |
| 27043 | { 20113, 3, 1, 0, 1257, 0, 0, 5512, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09378024829ULL }, // Inst #20113 = VPTESTMWZ128rr |
| 27044 | { 20112, 8, 1, 0, 1345, 0, 0, 5504, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29378024819ULL }, // Inst #20112 = VPTESTMWZ128rmk |
| 27045 | { 20111, 7, 1, 0, 1345, 0, 0, 5497, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09378024819ULL }, // Inst #20111 = VPTESTMWZ128rm |
| 27046 | { 20110, 4, 1, 0, 1128, 0, 0, 5493, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea93f8024829ULL }, // Inst #20110 = VPTESTMQZrrk |
| 27047 | { 20109, 3, 1, 0, 1258, 0, 0, 5490, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe893f8024829ULL }, // Inst #20109 = VPTESTMQZrr |
| 27048 | { 20108, 8, 1, 0, 1356, 0, 0, 5482, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea93f8024819ULL }, // Inst #20108 = VPTESTMQZrmk |
| 27049 | { 20107, 8, 1, 0, 1356, 0, 0, 5482, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a93f8024819ULL }, // Inst #20107 = VPTESTMQZrmbk |
| 27050 | { 20106, 7, 1, 0, 1356, 0, 0, 5475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9893f8024819ULL }, // Inst #20106 = VPTESTMQZrmb |
| 27051 | { 20105, 7, 1, 0, 1356, 0, 0, 5475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe893f8024819ULL }, // Inst #20105 = VPTESTMQZrm |
| 27052 | { 20104, 4, 1, 0, 1127, 0, 0, 5471, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc393f8024829ULL }, // Inst #20104 = VPTESTMQZ256rrk |
| 27053 | { 20103, 3, 1, 0, 1127, 0, 0, 5468, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc193f8024829ULL }, // Inst #20103 = VPTESTMQZ256rr |
| 27054 | { 20102, 8, 1, 0, 1355, 0, 0, 5460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc393f8024819ULL }, // Inst #20102 = VPTESTMQZ256rmk |
| 27055 | { 20101, 8, 1, 0, 1355, 0, 0, 5460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9393f8024819ULL }, // Inst #20101 = VPTESTMQZ256rmbk |
| 27056 | { 20100, 7, 1, 0, 1355, 0, 0, 5453, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9193f8024819ULL }, // Inst #20100 = VPTESTMQZ256rmb |
| 27057 | { 20099, 7, 1, 0, 1355, 0, 0, 5453, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc193f8024819ULL }, // Inst #20099 = VPTESTMQZ256rm |
| 27058 | { 20098, 4, 1, 0, 1126, 0, 0, 5449, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa293f8024829ULL }, // Inst #20098 = VPTESTMQZ128rrk |
| 27059 | { 20097, 3, 1, 0, 1257, 0, 0, 5446, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa093f8024829ULL }, // Inst #20097 = VPTESTMQZ128rr |
| 27060 | { 20096, 8, 1, 0, 1345, 0, 0, 5438, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa293f8024819ULL }, // Inst #20096 = VPTESTMQZ128rmk |
| 27061 | { 20095, 8, 1, 0, 1345, 0, 0, 5438, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9293f8024819ULL }, // Inst #20095 = VPTESTMQZ128rmbk |
| 27062 | { 20094, 7, 1, 0, 1345, 0, 0, 5431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9093f8024819ULL }, // Inst #20094 = VPTESTMQZ128rmb |
| 27063 | { 20093, 7, 1, 0, 1345, 0, 0, 5431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa093f8024819ULL }, // Inst #20093 = VPTESTMQZ128rm |
| 27064 | { 20092, 4, 1, 0, 1128, 0, 0, 5427, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea93f8004829ULL }, // Inst #20092 = VPTESTMDZrrk |
| 27065 | { 20091, 3, 1, 0, 1258, 0, 0, 5424, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe893f8004829ULL }, // Inst #20091 = VPTESTMDZrr |
| 27066 | { 20090, 8, 1, 0, 1356, 0, 0, 5416, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea93f8004819ULL }, // Inst #20090 = VPTESTMDZrmk |
| 27067 | { 20089, 8, 1, 0, 1356, 0, 0, 5416, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a93f8004819ULL }, // Inst #20089 = VPTESTMDZrmbk |
| 27068 | { 20088, 7, 1, 0, 1356, 0, 0, 5409, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7893f8004819ULL }, // Inst #20088 = VPTESTMDZrmb |
| 27069 | { 20087, 7, 1, 0, 1356, 0, 0, 5409, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe893f8004819ULL }, // Inst #20087 = VPTESTMDZrm |
| 27070 | { 20086, 4, 1, 0, 1127, 0, 0, 5405, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc393f8004829ULL }, // Inst #20086 = VPTESTMDZ256rrk |
| 27071 | { 20085, 3, 1, 0, 1127, 0, 0, 5402, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc193f8004829ULL }, // Inst #20085 = VPTESTMDZ256rr |
| 27072 | { 20084, 8, 1, 0, 1355, 0, 0, 5394, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc393f8004819ULL }, // Inst #20084 = VPTESTMDZ256rmk |
| 27073 | { 20083, 8, 1, 0, 1355, 0, 0, 5394, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7393f8004819ULL }, // Inst #20083 = VPTESTMDZ256rmbk |
| 27074 | { 20082, 7, 1, 0, 1355, 0, 0, 5387, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7193f8004819ULL }, // Inst #20082 = VPTESTMDZ256rmb |
| 27075 | { 20081, 7, 1, 0, 1355, 0, 0, 5387, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc193f8004819ULL }, // Inst #20081 = VPTESTMDZ256rm |
| 27076 | { 20080, 4, 1, 0, 1126, 0, 0, 5383, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa293f8004829ULL }, // Inst #20080 = VPTESTMDZ128rrk |
| 27077 | { 20079, 3, 1, 0, 1257, 0, 0, 5380, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa093f8004829ULL }, // Inst #20079 = VPTESTMDZ128rr |
| 27078 | { 20078, 8, 1, 0, 1345, 0, 0, 5372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa293f8004819ULL }, // Inst #20078 = VPTESTMDZ128rmk |
| 27079 | { 20077, 8, 1, 0, 1345, 0, 0, 5372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7293f8004819ULL }, // Inst #20077 = VPTESTMDZ128rmbk |
| 27080 | { 20076, 7, 1, 0, 1345, 0, 0, 5365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7093f8004819ULL }, // Inst #20076 = VPTESTMDZ128rmb |
| 27081 | { 20075, 7, 1, 0, 1345, 0, 0, 5365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa093f8004819ULL }, // Inst #20075 = VPTESTMDZ128rm |
| 27082 | { 20074, 4, 1, 0, 1128, 0, 0, 5361, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9378004829ULL }, // Inst #20074 = VPTESTMBZrrk |
| 27083 | { 20073, 3, 1, 0, 1258, 0, 0, 5358, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89378004829ULL }, // Inst #20073 = VPTESTMBZrr |
| 27084 | { 20072, 8, 1, 0, 1356, 0, 0, 5350, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9378004819ULL }, // Inst #20072 = VPTESTMBZrmk |
| 27085 | { 20071, 7, 1, 0, 1356, 0, 0, 5343, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89378004819ULL }, // Inst #20071 = VPTESTMBZrm |
| 27086 | { 20070, 4, 1, 0, 1127, 0, 0, 5339, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39378004829ULL }, // Inst #20070 = VPTESTMBZ256rrk |
| 27087 | { 20069, 3, 1, 0, 1127, 0, 0, 5336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19378004829ULL }, // Inst #20069 = VPTESTMBZ256rr |
| 27088 | { 20068, 8, 1, 0, 1355, 0, 0, 5328, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39378004819ULL }, // Inst #20068 = VPTESTMBZ256rmk |
| 27089 | { 20067, 7, 1, 0, 1355, 0, 0, 5321, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19378004819ULL }, // Inst #20067 = VPTESTMBZ256rm |
| 27090 | { 20066, 4, 1, 0, 1126, 0, 0, 5317, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29378004829ULL }, // Inst #20066 = VPTESTMBZ128rrk |
| 27091 | { 20065, 3, 1, 0, 1257, 0, 0, 5314, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09378004829ULL }, // Inst #20065 = VPTESTMBZ128rr |
| 27092 | { 20064, 8, 1, 0, 1345, 0, 0, 5306, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29378004819ULL }, // Inst #20064 = VPTESTMBZ128rmk |
| 27093 | { 20063, 7, 1, 0, 1345, 0, 0, 5299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09378004819ULL }, // Inst #20063 = VPTESTMBZ128rm |
| 27094 | { 20062, 6, 1, 0, 1755, 0, 0, 2242, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee92f8066829ULL }, // Inst #20062 = VPTERNLOGQZrrikz |
| 27095 | { 20061, 6, 1, 0, 1755, 0, 0, 2242, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea92f8066829ULL }, // Inst #20061 = VPTERNLOGQZrrik |
| 27096 | { 20060, 5, 1, 0, 1755, 0, 0, 3936, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe892f8066829ULL }, // Inst #20060 = VPTERNLOGQZrri |
| 27097 | { 20059, 10, 1, 0, 1836, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xee92f8066819ULL }, // Inst #20059 = VPTERNLOGQZrmikz |
| 27098 | { 20058, 10, 1, 0, 1836, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea92f8066819ULL }, // Inst #20058 = VPTERNLOGQZrmik |
| 27099 | { 20057, 9, 1, 0, 1836, 0, 0, 3927, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe892f8066819ULL }, // Inst #20057 = VPTERNLOGQZrmi |
| 27100 | { 20056, 10, 1, 0, 1836, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9e92f8066819ULL }, // Inst #20056 = VPTERNLOGQZrmbikz |
| 27101 | { 20055, 10, 1, 0, 1836, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a92f8066819ULL }, // Inst #20055 = VPTERNLOGQZrmbik |
| 27102 | { 20054, 9, 1, 0, 1836, 0, 0, 3927, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9892f8066819ULL }, // Inst #20054 = VPTERNLOGQZrmbi |
| 27103 | { 20053, 6, 1, 0, 1852, 0, 0, 2212, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc792f8066829ULL }, // Inst #20053 = VPTERNLOGQZ256rrikz |
| 27104 | { 20052, 6, 1, 0, 1852, 0, 0, 2212, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc392f8066829ULL }, // Inst #20052 = VPTERNLOGQZ256rrik |
| 27105 | { 20051, 5, 1, 0, 1852, 0, 0, 3922, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc192f8066829ULL }, // Inst #20051 = VPTERNLOGQZ256rri |
| 27106 | { 20050, 10, 1, 0, 1967, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc792f8066819ULL }, // Inst #20050 = VPTERNLOGQZ256rmikz |
| 27107 | { 20049, 10, 1, 0, 1967, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc392f8066819ULL }, // Inst #20049 = VPTERNLOGQZ256rmik |
| 27108 | { 20048, 9, 1, 0, 1967, 0, 0, 3913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc192f8066819ULL }, // Inst #20048 = VPTERNLOGQZ256rmi |
| 27109 | { 20047, 10, 1, 0, 1967, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9792f8066819ULL }, // Inst #20047 = VPTERNLOGQZ256rmbikz |
| 27110 | { 20046, 10, 1, 0, 1967, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9392f8066819ULL }, // Inst #20046 = VPTERNLOGQZ256rmbik |
| 27111 | { 20045, 9, 1, 0, 1967, 0, 0, 3913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9192f8066819ULL }, // Inst #20045 = VPTERNLOGQZ256rmbi |
| 27112 | { 20044, 6, 1, 0, 1851, 0, 0, 2182, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa692f8066829ULL }, // Inst #20044 = VPTERNLOGQZ128rrikz |
| 27113 | { 20043, 6, 1, 0, 1851, 0, 0, 2182, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa292f8066829ULL }, // Inst #20043 = VPTERNLOGQZ128rrik |
| 27114 | { 20042, 5, 1, 0, 1851, 0, 0, 3908, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa092f8066829ULL }, // Inst #20042 = VPTERNLOGQZ128rri |
| 27115 | { 20041, 10, 1, 0, 1868, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa692f8066819ULL }, // Inst #20041 = VPTERNLOGQZ128rmikz |
| 27116 | { 20040, 10, 1, 0, 1868, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa292f8066819ULL }, // Inst #20040 = VPTERNLOGQZ128rmik |
| 27117 | { 20039, 9, 1, 0, 1868, 0, 0, 3899, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa092f8066819ULL }, // Inst #20039 = VPTERNLOGQZ128rmi |
| 27118 | { 20038, 10, 1, 0, 1868, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9692f8066819ULL }, // Inst #20038 = VPTERNLOGQZ128rmbikz |
| 27119 | { 20037, 10, 1, 0, 1868, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9292f8066819ULL }, // Inst #20037 = VPTERNLOGQZ128rmbik |
| 27120 | { 20036, 9, 1, 0, 1868, 0, 0, 3899, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9092f8066819ULL }, // Inst #20036 = VPTERNLOGQZ128rmbi |
| 27121 | { 20035, 6, 1, 0, 1755, 0, 0, 2152, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee92f8046829ULL }, // Inst #20035 = VPTERNLOGDZrrikz |
| 27122 | { 20034, 6, 1, 0, 1755, 0, 0, 2152, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea92f8046829ULL }, // Inst #20034 = VPTERNLOGDZrrik |
| 27123 | { 20033, 5, 1, 0, 1755, 0, 0, 3936, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe892f8046829ULL }, // Inst #20033 = VPTERNLOGDZrri |
| 27124 | { 20032, 10, 1, 0, 1836, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xee92f8046819ULL }, // Inst #20032 = VPTERNLOGDZrmikz |
| 27125 | { 20031, 10, 1, 0, 1836, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea92f8046819ULL }, // Inst #20031 = VPTERNLOGDZrmik |
| 27126 | { 20030, 9, 1, 0, 1836, 0, 0, 3927, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe892f8046819ULL }, // Inst #20030 = VPTERNLOGDZrmi |
| 27127 | { 20029, 10, 1, 0, 1836, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7e92f8046819ULL }, // Inst #20029 = VPTERNLOGDZrmbikz |
| 27128 | { 20028, 10, 1, 0, 1836, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a92f8046819ULL }, // Inst #20028 = VPTERNLOGDZrmbik |
| 27129 | { 20027, 9, 1, 0, 1836, 0, 0, 3927, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7892f8046819ULL }, // Inst #20027 = VPTERNLOGDZrmbi |
| 27130 | { 20026, 6, 1, 0, 1852, 0, 0, 2114, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc792f8046829ULL }, // Inst #20026 = VPTERNLOGDZ256rrikz |
| 27131 | { 20025, 6, 1, 0, 1852, 0, 0, 2114, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc392f8046829ULL }, // Inst #20025 = VPTERNLOGDZ256rrik |
| 27132 | { 20024, 5, 1, 0, 1852, 0, 0, 3922, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc192f8046829ULL }, // Inst #20024 = VPTERNLOGDZ256rri |
| 27133 | { 20023, 10, 1, 0, 1967, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc792f8046819ULL }, // Inst #20023 = VPTERNLOGDZ256rmikz |
| 27134 | { 20022, 10, 1, 0, 1967, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc392f8046819ULL }, // Inst #20022 = VPTERNLOGDZ256rmik |
| 27135 | { 20021, 9, 1, 0, 1967, 0, 0, 3913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc192f8046819ULL }, // Inst #20021 = VPTERNLOGDZ256rmi |
| 27136 | { 20020, 10, 1, 0, 1967, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7792f8046819ULL }, // Inst #20020 = VPTERNLOGDZ256rmbikz |
| 27137 | { 20019, 10, 1, 0, 1967, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7392f8046819ULL }, // Inst #20019 = VPTERNLOGDZ256rmbik |
| 27138 | { 20018, 9, 1, 0, 1967, 0, 0, 3913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7192f8046819ULL }, // Inst #20018 = VPTERNLOGDZ256rmbi |
| 27139 | { 20017, 6, 1, 0, 1851, 0, 0, 2076, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa692f8046829ULL }, // Inst #20017 = VPTERNLOGDZ128rrikz |
| 27140 | { 20016, 6, 1, 0, 1851, 0, 0, 2076, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa292f8046829ULL }, // Inst #20016 = VPTERNLOGDZ128rrik |
| 27141 | { 20015, 5, 1, 0, 1851, 0, 0, 3908, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa092f8046829ULL }, // Inst #20015 = VPTERNLOGDZ128rri |
| 27142 | { 20014, 10, 1, 0, 1868, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa692f8046819ULL }, // Inst #20014 = VPTERNLOGDZ128rmikz |
| 27143 | { 20013, 10, 1, 0, 1868, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa292f8046819ULL }, // Inst #20013 = VPTERNLOGDZ128rmik |
| 27144 | { 20012, 9, 1, 0, 1868, 0, 0, 3899, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa092f8046819ULL }, // Inst #20012 = VPTERNLOGDZ128rmi |
| 27145 | { 20011, 10, 1, 0, 1868, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7692f8046819ULL }, // Inst #20011 = VPTERNLOGDZ128rmbikz |
| 27146 | { 20010, 10, 1, 0, 1868, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7292f8046819ULL }, // Inst #20010 = VPTERNLOGDZ128rmbik |
| 27147 | { 20009, 9, 1, 0, 1868, 0, 0, 3899, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7092f8046819ULL }, // Inst #20009 = VPTERNLOGDZ128rmbi |
| 27148 | { 20008, 3, 1, 0, 1058, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xfcb8002829ULL }, // Inst #20008 = VPSUBWrr |
| 27149 | { 20007, 7, 1, 0, 1216, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfcb8002819ULL }, // Inst #20007 = VPSUBWrm |
| 27150 | { 20006, 4, 1, 0, 1236, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeefcf8002829ULL }, // Inst #20006 = VPSUBWZrrkz |
| 27151 | { 20005, 5, 1, 0, 1236, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeafcf8002829ULL }, // Inst #20005 = VPSUBWZrrk |
| 27152 | { 20004, 3, 1, 0, 1154, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8fcf8002829ULL }, // Inst #20004 = VPSUBWZrr |
| 27153 | { 20003, 8, 1, 0, 1330, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeefcf8002819ULL }, // Inst #20003 = VPSUBWZrmkz |
| 27154 | { 20002, 9, 1, 0, 1330, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeafcf8002819ULL }, // Inst #20002 = VPSUBWZrmk |
| 27155 | { 20001, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8fcf8002819ULL }, // Inst #20001 = VPSUBWZrm |
| 27156 | { 20000, 4, 1, 0, 1235, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7fcf8002829ULL }, // Inst #20000 = VPSUBWZ256rrkz |
| 27157 | { 19999, 5, 1, 0, 1235, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3fcf8002829ULL }, // Inst #19999 = VPSUBWZ256rrk |
| 27158 | { 19998, 3, 1, 0, 1153, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1fcf8002829ULL }, // Inst #19998 = VPSUBWZ256rr |
| 27159 | { 19997, 8, 1, 0, 1329, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7fcf8002819ULL }, // Inst #19997 = VPSUBWZ256rmkz |
| 27160 | { 19996, 9, 1, 0, 1329, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3fcf8002819ULL }, // Inst #19996 = VPSUBWZ256rmk |
| 27161 | { 19995, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1fcf8002819ULL }, // Inst #19995 = VPSUBWZ256rm |
| 27162 | { 19994, 4, 1, 0, 1234, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6fcf8002829ULL }, // Inst #19994 = VPSUBWZ128rrkz |
| 27163 | { 19993, 5, 1, 0, 1234, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2fcf8002829ULL }, // Inst #19993 = VPSUBWZ128rrk |
| 27164 | { 19992, 3, 1, 0, 1152, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0fcf8002829ULL }, // Inst #19992 = VPSUBWZ128rr |
| 27165 | { 19991, 8, 1, 0, 1305, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6fcf8002819ULL }, // Inst #19991 = VPSUBWZ128rmkz |
| 27166 | { 19990, 9, 1, 0, 1305, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2fcf8002819ULL }, // Inst #19990 = VPSUBWZ128rmk |
| 27167 | { 19989, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0fcf8002819ULL }, // Inst #19989 = VPSUBWZ128rm |
| 27168 | { 19988, 3, 1, 0, 901, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1fcb8002829ULL }, // Inst #19988 = VPSUBWYrr |
| 27169 | { 19987, 7, 1, 0, 1219, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1fcb8002819ULL }, // Inst #19987 = VPSUBWYrm |
| 27170 | { 19986, 3, 1, 0, 1205, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xecb8002829ULL }, // Inst #19986 = VPSUBUSWrr |
| 27171 | { 19985, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xecb8002819ULL }, // Inst #19985 = VPSUBUSWrm |
| 27172 | { 19984, 4, 1, 0, 1808, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeeecf8002829ULL }, // Inst #19984 = VPSUBUSWZrrkz |
| 27173 | { 19983, 5, 1, 0, 1808, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeaecf8002829ULL }, // Inst #19983 = VPSUBUSWZrrk |
| 27174 | { 19982, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8ecf8002829ULL }, // Inst #19982 = VPSUBUSWZrr |
| 27175 | { 19981, 8, 1, 0, 1855, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeecf8002819ULL }, // Inst #19981 = VPSUBUSWZrmkz |
| 27176 | { 19980, 9, 1, 0, 1855, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaecf8002819ULL }, // Inst #19980 = VPSUBUSWZrmk |
| 27177 | { 19979, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ecf8002819ULL }, // Inst #19979 = VPSUBUSWZrm |
| 27178 | { 19978, 4, 1, 0, 2289, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7ecf8002829ULL }, // Inst #19978 = VPSUBUSWZ256rrkz |
| 27179 | { 19977, 5, 1, 0, 2289, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3ecf8002829ULL }, // Inst #19977 = VPSUBUSWZ256rrk |
| 27180 | { 19976, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1ecf8002829ULL }, // Inst #19976 = VPSUBUSWZ256rr |
| 27181 | { 19975, 8, 1, 0, 2058, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ecf8002819ULL }, // Inst #19975 = VPSUBUSWZ256rmkz |
| 27182 | { 19974, 9, 1, 0, 2058, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ecf8002819ULL }, // Inst #19974 = VPSUBUSWZ256rmk |
| 27183 | { 19973, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ecf8002819ULL }, // Inst #19973 = VPSUBUSWZ256rm |
| 27184 | { 19972, 4, 1, 0, 2288, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6ecf8002829ULL }, // Inst #19972 = VPSUBUSWZ128rrkz |
| 27185 | { 19971, 5, 1, 0, 2288, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2ecf8002829ULL }, // Inst #19971 = VPSUBUSWZ128rrk |
| 27186 | { 19970, 3, 1, 0, 1145, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ecf8002829ULL }, // Inst #19970 = VPSUBUSWZ128rr |
| 27187 | { 19969, 8, 1, 0, 2054, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ecf8002819ULL }, // Inst #19969 = VPSUBUSWZ128rmkz |
| 27188 | { 19968, 9, 1, 0, 2054, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ecf8002819ULL }, // Inst #19968 = VPSUBUSWZ128rmk |
| 27189 | { 19967, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ecf8002819ULL }, // Inst #19967 = VPSUBUSWZ128rm |
| 27190 | { 19966, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1ecb8002829ULL }, // Inst #19966 = VPSUBUSWYrr |
| 27191 | { 19965, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ecb8002819ULL }, // Inst #19965 = VPSUBUSWYrm |
| 27192 | { 19964, 3, 1, 0, 1205, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xec38002829ULL }, // Inst #19964 = VPSUBUSBrr |
| 27193 | { 19963, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xec38002819ULL }, // Inst #19963 = VPSUBUSBrm |
| 27194 | { 19962, 4, 1, 0, 1808, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeeec78002829ULL }, // Inst #19962 = VPSUBUSBZrrkz |
| 27195 | { 19961, 5, 1, 0, 1808, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeaec78002829ULL }, // Inst #19961 = VPSUBUSBZrrk |
| 27196 | { 19960, 3, 1, 0, 1801, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8ec78002829ULL }, // Inst #19960 = VPSUBUSBZrr |
| 27197 | { 19959, 8, 1, 0, 1855, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeec78002819ULL }, // Inst #19959 = VPSUBUSBZrmkz |
| 27198 | { 19958, 9, 1, 0, 1855, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaec78002819ULL }, // Inst #19958 = VPSUBUSBZrmk |
| 27199 | { 19957, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ec78002819ULL }, // Inst #19957 = VPSUBUSBZrm |
| 27200 | { 19956, 4, 1, 0, 2289, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7ec78002829ULL }, // Inst #19956 = VPSUBUSBZ256rrkz |
| 27201 | { 19955, 5, 1, 0, 2289, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3ec78002829ULL }, // Inst #19955 = VPSUBUSBZ256rrk |
| 27202 | { 19954, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1ec78002829ULL }, // Inst #19954 = VPSUBUSBZ256rr |
| 27203 | { 19953, 8, 1, 0, 2058, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ec78002819ULL }, // Inst #19953 = VPSUBUSBZ256rmkz |
| 27204 | { 19952, 9, 1, 0, 2058, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ec78002819ULL }, // Inst #19952 = VPSUBUSBZ256rmk |
| 27205 | { 19951, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ec78002819ULL }, // Inst #19951 = VPSUBUSBZ256rm |
| 27206 | { 19950, 4, 1, 0, 2288, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6ec78002829ULL }, // Inst #19950 = VPSUBUSBZ128rrkz |
| 27207 | { 19949, 5, 1, 0, 2288, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2ec78002829ULL }, // Inst #19949 = VPSUBUSBZ128rrk |
| 27208 | { 19948, 3, 1, 0, 1145, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ec78002829ULL }, // Inst #19948 = VPSUBUSBZ128rr |
| 27209 | { 19947, 8, 1, 0, 2054, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ec78002819ULL }, // Inst #19947 = VPSUBUSBZ128rmkz |
| 27210 | { 19946, 9, 1, 0, 2054, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ec78002819ULL }, // Inst #19946 = VPSUBUSBZ128rmk |
| 27211 | { 19945, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ec78002819ULL }, // Inst #19945 = VPSUBUSBZ128rm |
| 27212 | { 19944, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1ec38002829ULL }, // Inst #19944 = VPSUBUSBYrr |
| 27213 | { 19943, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ec38002819ULL }, // Inst #19943 = VPSUBUSBYrm |
| 27214 | { 19942, 3, 1, 0, 1205, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xf4b8002829ULL }, // Inst #19942 = VPSUBSWrr |
| 27215 | { 19941, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf4b8002819ULL }, // Inst #19941 = VPSUBSWrm |
| 27216 | { 19940, 4, 1, 0, 1808, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeef4f8002829ULL }, // Inst #19940 = VPSUBSWZrrkz |
| 27217 | { 19939, 5, 1, 0, 1808, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeaf4f8002829ULL }, // Inst #19939 = VPSUBSWZrrk |
| 27218 | { 19938, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8f4f8002829ULL }, // Inst #19938 = VPSUBSWZrr |
| 27219 | { 19937, 8, 1, 0, 1855, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef4f8002819ULL }, // Inst #19937 = VPSUBSWZrmkz |
| 27220 | { 19936, 9, 1, 0, 1855, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf4f8002819ULL }, // Inst #19936 = VPSUBSWZrmk |
| 27221 | { 19935, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f4f8002819ULL }, // Inst #19935 = VPSUBSWZrm |
| 27222 | { 19934, 4, 1, 0, 2289, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7f4f8002829ULL }, // Inst #19934 = VPSUBSWZ256rrkz |
| 27223 | { 19933, 5, 1, 0, 2289, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3f4f8002829ULL }, // Inst #19933 = VPSUBSWZ256rrk |
| 27224 | { 19932, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1f4f8002829ULL }, // Inst #19932 = VPSUBSWZ256rr |
| 27225 | { 19931, 8, 1, 0, 2058, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f4f8002819ULL }, // Inst #19931 = VPSUBSWZ256rmkz |
| 27226 | { 19930, 9, 1, 0, 2058, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f4f8002819ULL }, // Inst #19930 = VPSUBSWZ256rmk |
| 27227 | { 19929, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f4f8002819ULL }, // Inst #19929 = VPSUBSWZ256rm |
| 27228 | { 19928, 4, 1, 0, 2288, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6f4f8002829ULL }, // Inst #19928 = VPSUBSWZ128rrkz |
| 27229 | { 19927, 5, 1, 0, 2288, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2f4f8002829ULL }, // Inst #19927 = VPSUBSWZ128rrk |
| 27230 | { 19926, 3, 1, 0, 1145, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0f4f8002829ULL }, // Inst #19926 = VPSUBSWZ128rr |
| 27231 | { 19925, 8, 1, 0, 2054, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f4f8002819ULL }, // Inst #19925 = VPSUBSWZ128rmkz |
| 27232 | { 19924, 9, 1, 0, 2054, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f4f8002819ULL }, // Inst #19924 = VPSUBSWZ128rmk |
| 27233 | { 19923, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f4f8002819ULL }, // Inst #19923 = VPSUBSWZ128rm |
| 27234 | { 19922, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1f4b8002829ULL }, // Inst #19922 = VPSUBSWYrr |
| 27235 | { 19921, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f4b8002819ULL }, // Inst #19921 = VPSUBSWYrm |
| 27236 | { 19920, 3, 1, 0, 1205, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xf438002829ULL }, // Inst #19920 = VPSUBSBrr |
| 27237 | { 19919, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf438002819ULL }, // Inst #19919 = VPSUBSBrm |
| 27238 | { 19918, 4, 1, 0, 1808, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeef478002829ULL }, // Inst #19918 = VPSUBSBZrrkz |
| 27239 | { 19917, 5, 1, 0, 1808, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeaf478002829ULL }, // Inst #19917 = VPSUBSBZrrk |
| 27240 | { 19916, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8f478002829ULL }, // Inst #19916 = VPSUBSBZrr |
| 27241 | { 19915, 8, 1, 0, 1855, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef478002819ULL }, // Inst #19915 = VPSUBSBZrmkz |
| 27242 | { 19914, 9, 1, 0, 1855, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf478002819ULL }, // Inst #19914 = VPSUBSBZrmk |
| 27243 | { 19913, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f478002819ULL }, // Inst #19913 = VPSUBSBZrm |
| 27244 | { 19912, 4, 1, 0, 2289, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7f478002829ULL }, // Inst #19912 = VPSUBSBZ256rrkz |
| 27245 | { 19911, 5, 1, 0, 2289, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3f478002829ULL }, // Inst #19911 = VPSUBSBZ256rrk |
| 27246 | { 19910, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1f478002829ULL }, // Inst #19910 = VPSUBSBZ256rr |
| 27247 | { 19909, 8, 1, 0, 2058, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f478002819ULL }, // Inst #19909 = VPSUBSBZ256rmkz |
| 27248 | { 19908, 9, 1, 0, 2058, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f478002819ULL }, // Inst #19908 = VPSUBSBZ256rmk |
| 27249 | { 19907, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f478002819ULL }, // Inst #19907 = VPSUBSBZ256rm |
| 27250 | { 19906, 4, 1, 0, 2288, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6f478002829ULL }, // Inst #19906 = VPSUBSBZ128rrkz |
| 27251 | { 19905, 5, 1, 0, 2288, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2f478002829ULL }, // Inst #19905 = VPSUBSBZ128rrk |
| 27252 | { 19904, 3, 1, 0, 1145, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0f478002829ULL }, // Inst #19904 = VPSUBSBZ128rr |
| 27253 | { 19903, 8, 1, 0, 2054, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f478002819ULL }, // Inst #19903 = VPSUBSBZ128rmkz |
| 27254 | { 19902, 9, 1, 0, 2054, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f478002819ULL }, // Inst #19902 = VPSUBSBZ128rmk |
| 27255 | { 19901, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f478002819ULL }, // Inst #19901 = VPSUBSBZ128rm |
| 27256 | { 19900, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1f438002829ULL }, // Inst #19900 = VPSUBSBYrr |
| 27257 | { 19899, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f438002819ULL }, // Inst #19899 = VPSUBSBYrm |
| 27258 | { 19898, 3, 1, 0, 1058, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xfdb8002829ULL }, // Inst #19898 = VPSUBQrr |
| 27259 | { 19897, 7, 1, 0, 1216, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfdb8002819ULL }, // Inst #19897 = VPSUBQrm |
| 27260 | { 19896, 4, 1, 0, 1755, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeefdf8022829ULL }, // Inst #19896 = VPSUBQZrrkz |
| 27261 | { 19895, 5, 1, 0, 1755, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeafdf8022829ULL }, // Inst #19895 = VPSUBQZrrk |
| 27262 | { 19894, 3, 1, 0, 1154, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8fdf8022829ULL }, // Inst #19894 = VPSUBQZrr |
| 27263 | { 19893, 8, 1, 0, 1836, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeefdf8022819ULL }, // Inst #19893 = VPSUBQZrmkz |
| 27264 | { 19892, 9, 1, 0, 1836, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeafdf8022819ULL }, // Inst #19892 = VPSUBQZrmk |
| 27265 | { 19891, 8, 1, 0, 1836, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9efdf8022819ULL }, // Inst #19891 = VPSUBQZrmbkz |
| 27266 | { 19890, 9, 1, 0, 1836, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9afdf8022819ULL }, // Inst #19890 = VPSUBQZrmbk |
| 27267 | { 19889, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98fdf8022819ULL }, // Inst #19889 = VPSUBQZrmb |
| 27268 | { 19888, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8fdf8022819ULL }, // Inst #19888 = VPSUBQZrm |
| 27269 | { 19887, 4, 1, 0, 1852, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc7fdf8022829ULL }, // Inst #19887 = VPSUBQZ256rrkz |
| 27270 | { 19886, 5, 1, 0, 1852, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3fdf8022829ULL }, // Inst #19886 = VPSUBQZ256rrk |
| 27271 | { 19885, 3, 1, 0, 1153, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1fdf8022829ULL }, // Inst #19885 = VPSUBQZ256rr |
| 27272 | { 19884, 8, 1, 0, 1967, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7fdf8022819ULL }, // Inst #19884 = VPSUBQZ256rmkz |
| 27273 | { 19883, 9, 1, 0, 1967, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3fdf8022819ULL }, // Inst #19883 = VPSUBQZ256rmk |
| 27274 | { 19882, 8, 1, 0, 1967, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97fdf8022819ULL }, // Inst #19882 = VPSUBQZ256rmbkz |
| 27275 | { 19881, 9, 1, 0, 1967, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93fdf8022819ULL }, // Inst #19881 = VPSUBQZ256rmbk |
| 27276 | { 19880, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91fdf8022819ULL }, // Inst #19880 = VPSUBQZ256rmb |
| 27277 | { 19879, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1fdf8022819ULL }, // Inst #19879 = VPSUBQZ256rm |
| 27278 | { 19878, 4, 1, 0, 1851, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6fdf8022829ULL }, // Inst #19878 = VPSUBQZ128rrkz |
| 27279 | { 19877, 5, 1, 0, 1851, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2fdf8022829ULL }, // Inst #19877 = VPSUBQZ128rrk |
| 27280 | { 19876, 3, 1, 0, 1152, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0fdf8022829ULL }, // Inst #19876 = VPSUBQZ128rr |
| 27281 | { 19875, 8, 1, 0, 1868, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6fdf8022819ULL }, // Inst #19875 = VPSUBQZ128rmkz |
| 27282 | { 19874, 9, 1, 0, 1868, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2fdf8022819ULL }, // Inst #19874 = VPSUBQZ128rmk |
| 27283 | { 19873, 8, 1, 0, 1868, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96fdf8022819ULL }, // Inst #19873 = VPSUBQZ128rmbkz |
| 27284 | { 19872, 9, 1, 0, 1868, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92fdf8022819ULL }, // Inst #19872 = VPSUBQZ128rmbk |
| 27285 | { 19871, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90fdf8022819ULL }, // Inst #19871 = VPSUBQZ128rmb |
| 27286 | { 19870, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0fdf8022819ULL }, // Inst #19870 = VPSUBQZ128rm |
| 27287 | { 19869, 3, 1, 0, 901, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1fdb8002829ULL }, // Inst #19869 = VPSUBQYrr |
| 27288 | { 19868, 7, 1, 0, 1219, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1fdb8002819ULL }, // Inst #19868 = VPSUBQYrm |
| 27289 | { 19867, 3, 1, 0, 1058, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xfd38002829ULL }, // Inst #19867 = VPSUBDrr |
| 27290 | { 19866, 7, 1, 0, 1216, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfd38002819ULL }, // Inst #19866 = VPSUBDrm |
| 27291 | { 19865, 4, 1, 0, 1755, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeefd78002829ULL }, // Inst #19865 = VPSUBDZrrkz |
| 27292 | { 19864, 5, 1, 0, 1755, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeafd78002829ULL }, // Inst #19864 = VPSUBDZrrk |
| 27293 | { 19863, 3, 1, 0, 1154, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8fd78002829ULL }, // Inst #19863 = VPSUBDZrr |
| 27294 | { 19862, 8, 1, 0, 1836, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeefd78002819ULL }, // Inst #19862 = VPSUBDZrmkz |
| 27295 | { 19861, 9, 1, 0, 1836, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeafd78002819ULL }, // Inst #19861 = VPSUBDZrmk |
| 27296 | { 19860, 8, 1, 0, 1836, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7efd78002819ULL }, // Inst #19860 = VPSUBDZrmbkz |
| 27297 | { 19859, 9, 1, 0, 1836, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7afd78002819ULL }, // Inst #19859 = VPSUBDZrmbk |
| 27298 | { 19858, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78fd78002819ULL }, // Inst #19858 = VPSUBDZrmb |
| 27299 | { 19857, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8fd78002819ULL }, // Inst #19857 = VPSUBDZrm |
| 27300 | { 19856, 4, 1, 0, 1852, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc7fd78002829ULL }, // Inst #19856 = VPSUBDZ256rrkz |
| 27301 | { 19855, 5, 1, 0, 1852, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3fd78002829ULL }, // Inst #19855 = VPSUBDZ256rrk |
| 27302 | { 19854, 3, 1, 0, 1153, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1fd78002829ULL }, // Inst #19854 = VPSUBDZ256rr |
| 27303 | { 19853, 8, 1, 0, 1967, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7fd78002819ULL }, // Inst #19853 = VPSUBDZ256rmkz |
| 27304 | { 19852, 9, 1, 0, 1967, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3fd78002819ULL }, // Inst #19852 = VPSUBDZ256rmk |
| 27305 | { 19851, 8, 1, 0, 1967, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77fd78002819ULL }, // Inst #19851 = VPSUBDZ256rmbkz |
| 27306 | { 19850, 9, 1, 0, 1967, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73fd78002819ULL }, // Inst #19850 = VPSUBDZ256rmbk |
| 27307 | { 19849, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71fd78002819ULL }, // Inst #19849 = VPSUBDZ256rmb |
| 27308 | { 19848, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1fd78002819ULL }, // Inst #19848 = VPSUBDZ256rm |
| 27309 | { 19847, 4, 1, 0, 1851, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6fd78002829ULL }, // Inst #19847 = VPSUBDZ128rrkz |
| 27310 | { 19846, 5, 1, 0, 1851, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2fd78002829ULL }, // Inst #19846 = VPSUBDZ128rrk |
| 27311 | { 19845, 3, 1, 0, 1152, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0fd78002829ULL }, // Inst #19845 = VPSUBDZ128rr |
| 27312 | { 19844, 8, 1, 0, 1868, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6fd78002819ULL }, // Inst #19844 = VPSUBDZ128rmkz |
| 27313 | { 19843, 9, 1, 0, 1868, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2fd78002819ULL }, // Inst #19843 = VPSUBDZ128rmk |
| 27314 | { 19842, 8, 1, 0, 1868, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76fd78002819ULL }, // Inst #19842 = VPSUBDZ128rmbkz |
| 27315 | { 19841, 9, 1, 0, 1868, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72fd78002819ULL }, // Inst #19841 = VPSUBDZ128rmbk |
| 27316 | { 19840, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70fd78002819ULL }, // Inst #19840 = VPSUBDZ128rmb |
| 27317 | { 19839, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0fd78002819ULL }, // Inst #19839 = VPSUBDZ128rm |
| 27318 | { 19838, 3, 1, 0, 901, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1fd38002829ULL }, // Inst #19838 = VPSUBDYrr |
| 27319 | { 19837, 7, 1, 0, 1219, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1fd38002819ULL }, // Inst #19837 = VPSUBDYrm |
| 27320 | { 19836, 3, 1, 0, 1058, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xfc38002829ULL }, // Inst #19836 = VPSUBBrr |
| 27321 | { 19835, 7, 1, 0, 1216, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfc38002819ULL }, // Inst #19835 = VPSUBBrm |
| 27322 | { 19834, 4, 1, 0, 1236, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeefc78002829ULL }, // Inst #19834 = VPSUBBZrrkz |
| 27323 | { 19833, 5, 1, 0, 1236, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeafc78002829ULL }, // Inst #19833 = VPSUBBZrrk |
| 27324 | { 19832, 3, 1, 0, 1154, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8fc78002829ULL }, // Inst #19832 = VPSUBBZrr |
| 27325 | { 19831, 8, 1, 0, 1330, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeefc78002819ULL }, // Inst #19831 = VPSUBBZrmkz |
| 27326 | { 19830, 9, 1, 0, 1330, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeafc78002819ULL }, // Inst #19830 = VPSUBBZrmk |
| 27327 | { 19829, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8fc78002819ULL }, // Inst #19829 = VPSUBBZrm |
| 27328 | { 19828, 4, 1, 0, 1235, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7fc78002829ULL }, // Inst #19828 = VPSUBBZ256rrkz |
| 27329 | { 19827, 5, 1, 0, 1235, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3fc78002829ULL }, // Inst #19827 = VPSUBBZ256rrk |
| 27330 | { 19826, 3, 1, 0, 1153, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1fc78002829ULL }, // Inst #19826 = VPSUBBZ256rr |
| 27331 | { 19825, 8, 1, 0, 1329, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7fc78002819ULL }, // Inst #19825 = VPSUBBZ256rmkz |
| 27332 | { 19824, 9, 1, 0, 1329, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3fc78002819ULL }, // Inst #19824 = VPSUBBZ256rmk |
| 27333 | { 19823, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1fc78002819ULL }, // Inst #19823 = VPSUBBZ256rm |
| 27334 | { 19822, 4, 1, 0, 1234, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6fc78002829ULL }, // Inst #19822 = VPSUBBZ128rrkz |
| 27335 | { 19821, 5, 1, 0, 1234, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2fc78002829ULL }, // Inst #19821 = VPSUBBZ128rrk |
| 27336 | { 19820, 3, 1, 0, 1152, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0fc78002829ULL }, // Inst #19820 = VPSUBBZ128rr |
| 27337 | { 19819, 8, 1, 0, 1305, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6fc78002819ULL }, // Inst #19819 = VPSUBBZ128rmkz |
| 27338 | { 19818, 9, 1, 0, 1305, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2fc78002819ULL }, // Inst #19818 = VPSUBBZ128rmk |
| 27339 | { 19817, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0fc78002819ULL }, // Inst #19817 = VPSUBBZ128rm |
| 27340 | { 19816, 3, 1, 0, 901, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1fc38002829ULL }, // Inst #19816 = VPSUBBYrr |
| 27341 | { 19815, 7, 1, 0, 1219, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1fc38002819ULL }, // Inst #19815 = VPSUBBYrm |
| 27342 | { 19814, 3, 1, 0, 1085, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xe8b8002829ULL }, // Inst #19814 = VPSRLWrr |
| 27343 | { 19813, 7, 1, 0, 285, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b8002819ULL }, // Inst #19813 = VPSRLWrm |
| 27344 | { 19812, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0xb8b8042832ULL }, // Inst #19812 = VPSRLWri |
| 27345 | { 19811, 4, 1, 0, 2300, 0, 0, 5827, X86ImpOpBase + 0, 0, 0xaee8f8002829ULL }, // Inst #19811 = VPSRLWZrrkz |
| 27346 | { 19810, 5, 1, 0, 2300, 0, 0, 5822, X86ImpOpBase + 0, 0, 0xaae8f8002829ULL }, // Inst #19810 = VPSRLWZrrk |
| 27347 | { 19809, 3, 1, 0, 1087, 0, 0, 5783, X86ImpOpBase + 0, 0, 0xa8e8f8002829ULL }, // Inst #19809 = VPSRLWZrr |
| 27348 | { 19808, 8, 1, 0, 1858, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaee8f8002819ULL }, // Inst #19808 = VPSRLWZrmkz |
| 27349 | { 19807, 9, 1, 0, 1858, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaae8f8002819ULL }, // Inst #19807 = VPSRLWZrmk |
| 27350 | { 19806, 7, 1, 0, 565, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8e8f8002819ULL }, // Inst #19806 = VPSRLWZrm |
| 27351 | { 19805, 4, 1, 0, 1811, 0, 0, 4527, X86ImpOpBase + 0, 0, 0xeeb8f8042832ULL }, // Inst #19805 = VPSRLWZrikz |
| 27352 | { 19804, 5, 1, 0, 1811, 0, 0, 4522, X86ImpOpBase + 0, 0, 0xeab8f8042832ULL }, // Inst #19804 = VPSRLWZrik |
| 27353 | { 19803, 3, 1, 0, 1103, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b8f8042832ULL }, // Inst #19803 = VPSRLWZri |
| 27354 | { 19802, 8, 1, 0, 1854, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8042822ULL }, // Inst #19802 = VPSRLWZmikz |
| 27355 | { 19801, 9, 1, 0, 1854, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab8f8042822ULL }, // Inst #19801 = VPSRLWZmik |
| 27356 | { 19800, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8042822ULL }, // Inst #19800 = VPSRLWZmi |
| 27357 | { 19799, 4, 1, 0, 1820, 0, 0, 5818, X86ImpOpBase + 0, 0, 0xa7e8f8002829ULL }, // Inst #19799 = VPSRLWZ256rrkz |
| 27358 | { 19798, 5, 1, 0, 1820, 0, 0, 5813, X86ImpOpBase + 0, 0, 0xa3e8f8002829ULL }, // Inst #19798 = VPSRLWZ256rrk |
| 27359 | { 19797, 3, 1, 0, 1086, 0, 0, 5771, X86ImpOpBase + 0, 0, 0xa1e8f8002829ULL }, // Inst #19797 = VPSRLWZ256rr |
| 27360 | { 19796, 8, 1, 0, 2061, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa7e8f8002819ULL }, // Inst #19796 = VPSRLWZ256rmkz |
| 27361 | { 19795, 9, 1, 0, 2061, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3e8f8002819ULL }, // Inst #19795 = VPSRLWZ256rmk |
| 27362 | { 19794, 7, 1, 0, 563, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa1e8f8002819ULL }, // Inst #19794 = VPSRLWZ256rm |
| 27363 | { 19793, 4, 1, 0, 2296, 0, 0, 4491, X86ImpOpBase + 0, 0, 0xc7b8f8042832ULL }, // Inst #19793 = VPSRLWZ256rikz |
| 27364 | { 19792, 5, 1, 0, 2296, 0, 0, 4486, X86ImpOpBase + 0, 0, 0xc3b8f8042832ULL }, // Inst #19792 = VPSRLWZ256rik |
| 27365 | { 19791, 3, 1, 0, 1102, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b8f8042832ULL }, // Inst #19791 = VPSRLWZ256ri |
| 27366 | { 19790, 8, 1, 0, 2052, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8042822ULL }, // Inst #19790 = VPSRLWZ256mikz |
| 27367 | { 19789, 9, 1, 0, 2052, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8042822ULL }, // Inst #19789 = VPSRLWZ256mik |
| 27368 | { 19788, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8042822ULL }, // Inst #19788 = VPSRLWZ256mi |
| 27369 | { 19787, 4, 1, 0, 2390, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6e8f8002829ULL }, // Inst #19787 = VPSRLWZ128rrkz |
| 27370 | { 19786, 5, 1, 0, 2390, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2e8f8002829ULL }, // Inst #19786 = VPSRLWZ128rrk |
| 27371 | { 19785, 3, 1, 0, 1085, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0e8f8002829ULL }, // Inst #19785 = VPSRLWZ128rr |
| 27372 | { 19784, 8, 1, 0, 2057, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e8f8002819ULL }, // Inst #19784 = VPSRLWZ128rmkz |
| 27373 | { 19783, 9, 1, 0, 2057, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e8f8002819ULL }, // Inst #19783 = VPSRLWZ128rmk |
| 27374 | { 19782, 7, 1, 0, 285, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e8f8002819ULL }, // Inst #19782 = VPSRLWZ128rm |
| 27375 | { 19781, 4, 1, 0, 2295, 0, 0, 4455, X86ImpOpBase + 0, 0, 0xa6b8f8042832ULL }, // Inst #19781 = VPSRLWZ128rikz |
| 27376 | { 19780, 5, 1, 0, 2295, 0, 0, 4450, X86ImpOpBase + 0, 0, 0xa2b8f8042832ULL }, // Inst #19780 = VPSRLWZ128rik |
| 27377 | { 19779, 3, 1, 0, 1101, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b8f8042832ULL }, // Inst #19779 = VPSRLWZ128ri |
| 27378 | { 19778, 8, 1, 0, 2051, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8042822ULL }, // Inst #19778 = VPSRLWZ128mikz |
| 27379 | { 19777, 9, 1, 0, 2051, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8042822ULL }, // Inst #19777 = VPSRLWZ128mik |
| 27380 | { 19776, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8042822ULL }, // Inst #19776 = VPSRLWZ128mi |
| 27381 | { 19775, 3, 1, 0, 1086, 0, 0, 5768, X86ImpOpBase + 0, 0, 0x1e8b8002829ULL }, // Inst #19775 = VPSRLWYrr |
| 27382 | { 19774, 7, 1, 0, 563, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e8b8002819ULL }, // Inst #19774 = VPSRLWYrm |
| 27383 | { 19773, 3, 1, 0, 548, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x1b8b8042832ULL }, // Inst #19773 = VPSRLWYri |
| 27384 | { 19772, 4, 1, 0, 1810, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xee8878024829ULL }, // Inst #19772 = VPSRLVWZrrkz |
| 27385 | { 19771, 5, 1, 0, 1810, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xea8878024829ULL }, // Inst #19771 = VPSRLVWZrrk |
| 27386 | { 19770, 3, 1, 0, 556, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88878024829ULL }, // Inst #19770 = VPSRLVWZrr |
| 27387 | { 19769, 8, 1, 0, 1857, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8878024819ULL }, // Inst #19769 = VPSRLVWZrmkz |
| 27388 | { 19768, 9, 1, 0, 1857, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8878024819ULL }, // Inst #19768 = VPSRLVWZrmk |
| 27389 | { 19767, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88878024819ULL }, // Inst #19767 = VPSRLVWZrm |
| 27390 | { 19766, 4, 1, 0, 2294, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc78878024829ULL }, // Inst #19766 = VPSRLVWZ256rrkz |
| 27391 | { 19765, 5, 1, 0, 2294, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc38878024829ULL }, // Inst #19765 = VPSRLVWZ256rrk |
| 27392 | { 19764, 3, 1, 0, 554, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18878024829ULL }, // Inst #19764 = VPSRLVWZ256rr |
| 27393 | { 19763, 8, 1, 0, 2060, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78878024819ULL }, // Inst #19763 = VPSRLVWZ256rmkz |
| 27394 | { 19762, 9, 1, 0, 2060, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38878024819ULL }, // Inst #19762 = VPSRLVWZ256rmk |
| 27395 | { 19761, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18878024819ULL }, // Inst #19761 = VPSRLVWZ256rm |
| 27396 | { 19760, 4, 1, 0, 2293, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa68878024829ULL }, // Inst #19760 = VPSRLVWZ128rrkz |
| 27397 | { 19759, 5, 1, 0, 2293, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa28878024829ULL }, // Inst #19759 = VPSRLVWZ128rrk |
| 27398 | { 19758, 3, 1, 0, 552, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08878024829ULL }, // Inst #19758 = VPSRLVWZ128rr |
| 27399 | { 19757, 8, 1, 0, 2056, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68878024819ULL }, // Inst #19757 = VPSRLVWZ128rmkz |
| 27400 | { 19756, 9, 1, 0, 2056, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28878024819ULL }, // Inst #19756 = VPSRLVWZ128rmk |
| 27401 | { 19755, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08878024819ULL }, // Inst #19755 = VPSRLVWZ128rm |
| 27402 | { 19754, 3, 1, 0, 836, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xa2b8024829ULL }, // Inst #19754 = VPSRLVQrr |
| 27403 | { 19753, 7, 1, 0, 843, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b8024819ULL }, // Inst #19753 = VPSRLVQrm |
| 27404 | { 19752, 4, 1, 0, 556, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeea2f8024829ULL }, // Inst #19752 = VPSRLVQZrrkz |
| 27405 | { 19751, 5, 1, 0, 556, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeaa2f8024829ULL }, // Inst #19751 = VPSRLVQZrrk |
| 27406 | { 19750, 3, 1, 0, 556, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8a2f8024829ULL }, // Inst #19750 = VPSRLVQZrr |
| 27407 | { 19749, 8, 1, 0, 555, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea2f8024819ULL }, // Inst #19749 = VPSRLVQZrmkz |
| 27408 | { 19748, 9, 1, 0, 555, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa2f8024819ULL }, // Inst #19748 = VPSRLVQZrmk |
| 27409 | { 19747, 8, 1, 0, 555, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ea2f8024819ULL }, // Inst #19747 = VPSRLVQZrmbkz |
| 27410 | { 19746, 9, 1, 0, 555, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aa2f8024819ULL }, // Inst #19746 = VPSRLVQZrmbk |
| 27411 | { 19745, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98a2f8024819ULL }, // Inst #19745 = VPSRLVQZrmb |
| 27412 | { 19744, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a2f8024819ULL }, // Inst #19744 = VPSRLVQZrm |
| 27413 | { 19743, 4, 1, 0, 554, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc7a2f8024829ULL }, // Inst #19743 = VPSRLVQZ256rrkz |
| 27414 | { 19742, 5, 1, 0, 554, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3a2f8024829ULL }, // Inst #19742 = VPSRLVQZ256rrk |
| 27415 | { 19741, 3, 1, 0, 554, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1a2f8024829ULL }, // Inst #19741 = VPSRLVQZ256rr |
| 27416 | { 19740, 8, 1, 0, 553, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a2f8024819ULL }, // Inst #19740 = VPSRLVQZ256rmkz |
| 27417 | { 19739, 9, 1, 0, 553, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a2f8024819ULL }, // Inst #19739 = VPSRLVQZ256rmk |
| 27418 | { 19738, 8, 1, 0, 553, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97a2f8024819ULL }, // Inst #19738 = VPSRLVQZ256rmbkz |
| 27419 | { 19737, 9, 1, 0, 553, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93a2f8024819ULL }, // Inst #19737 = VPSRLVQZ256rmbk |
| 27420 | { 19736, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91a2f8024819ULL }, // Inst #19736 = VPSRLVQZ256rmb |
| 27421 | { 19735, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a2f8024819ULL }, // Inst #19735 = VPSRLVQZ256rm |
| 27422 | { 19734, 4, 1, 0, 552, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6a2f8024829ULL }, // Inst #19734 = VPSRLVQZ128rrkz |
| 27423 | { 19733, 5, 1, 0, 552, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2a2f8024829ULL }, // Inst #19733 = VPSRLVQZ128rrk |
| 27424 | { 19732, 3, 1, 0, 552, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0a2f8024829ULL }, // Inst #19732 = VPSRLVQZ128rr |
| 27425 | { 19731, 8, 1, 0, 551, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a2f8024819ULL }, // Inst #19731 = VPSRLVQZ128rmkz |
| 27426 | { 19730, 9, 1, 0, 551, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a2f8024819ULL }, // Inst #19730 = VPSRLVQZ128rmk |
| 27427 | { 19729, 8, 1, 0, 551, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96a2f8024819ULL }, // Inst #19729 = VPSRLVQZ128rmbkz |
| 27428 | { 19728, 9, 1, 0, 551, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92a2f8024819ULL }, // Inst #19728 = VPSRLVQZ128rmbk |
| 27429 | { 19727, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90a2f8024819ULL }, // Inst #19727 = VPSRLVQZ128rmb |
| 27430 | { 19726, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a2f8024819ULL }, // Inst #19726 = VPSRLVQZ128rm |
| 27431 | { 19725, 3, 1, 0, 835, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1a2b8024829ULL }, // Inst #19725 = VPSRLVQYrr |
| 27432 | { 19724, 7, 1, 0, 844, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a2b8024819ULL }, // Inst #19724 = VPSRLVQYrm |
| 27433 | { 19723, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xa2b8004829ULL }, // Inst #19723 = VPSRLVDrr |
| 27434 | { 19722, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b8004819ULL }, // Inst #19722 = VPSRLVDrm |
| 27435 | { 19721, 4, 1, 0, 556, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeea2f8004829ULL }, // Inst #19721 = VPSRLVDZrrkz |
| 27436 | { 19720, 5, 1, 0, 556, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaa2f8004829ULL }, // Inst #19720 = VPSRLVDZrrk |
| 27437 | { 19719, 3, 1, 0, 556, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8a2f8004829ULL }, // Inst #19719 = VPSRLVDZrr |
| 27438 | { 19718, 8, 1, 0, 555, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea2f8004819ULL }, // Inst #19718 = VPSRLVDZrmkz |
| 27439 | { 19717, 9, 1, 0, 555, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa2f8004819ULL }, // Inst #19717 = VPSRLVDZrmk |
| 27440 | { 19716, 8, 1, 0, 555, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea2f8004819ULL }, // Inst #19716 = VPSRLVDZrmbkz |
| 27441 | { 19715, 9, 1, 0, 555, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa2f8004819ULL }, // Inst #19715 = VPSRLVDZrmbk |
| 27442 | { 19714, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a2f8004819ULL }, // Inst #19714 = VPSRLVDZrmb |
| 27443 | { 19713, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a2f8004819ULL }, // Inst #19713 = VPSRLVDZrm |
| 27444 | { 19712, 4, 1, 0, 554, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc7a2f8004829ULL }, // Inst #19712 = VPSRLVDZ256rrkz |
| 27445 | { 19711, 5, 1, 0, 554, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3a2f8004829ULL }, // Inst #19711 = VPSRLVDZ256rrk |
| 27446 | { 19710, 3, 1, 0, 554, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1a2f8004829ULL }, // Inst #19710 = VPSRLVDZ256rr |
| 27447 | { 19709, 8, 1, 0, 553, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a2f8004819ULL }, // Inst #19709 = VPSRLVDZ256rmkz |
| 27448 | { 19708, 9, 1, 0, 553, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a2f8004819ULL }, // Inst #19708 = VPSRLVDZ256rmk |
| 27449 | { 19707, 8, 1, 0, 553, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a2f8004819ULL }, // Inst #19707 = VPSRLVDZ256rmbkz |
| 27450 | { 19706, 9, 1, 0, 553, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a2f8004819ULL }, // Inst #19706 = VPSRLVDZ256rmbk |
| 27451 | { 19705, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a2f8004819ULL }, // Inst #19705 = VPSRLVDZ256rmb |
| 27452 | { 19704, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a2f8004819ULL }, // Inst #19704 = VPSRLVDZ256rm |
| 27453 | { 19703, 4, 1, 0, 552, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6a2f8004829ULL }, // Inst #19703 = VPSRLVDZ128rrkz |
| 27454 | { 19702, 5, 1, 0, 552, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2a2f8004829ULL }, // Inst #19702 = VPSRLVDZ128rrk |
| 27455 | { 19701, 3, 1, 0, 552, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0a2f8004829ULL }, // Inst #19701 = VPSRLVDZ128rr |
| 27456 | { 19700, 8, 1, 0, 551, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a2f8004819ULL }, // Inst #19700 = VPSRLVDZ128rmkz |
| 27457 | { 19699, 9, 1, 0, 551, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a2f8004819ULL }, // Inst #19699 = VPSRLVDZ128rmk |
| 27458 | { 19698, 8, 1, 0, 551, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a2f8004819ULL }, // Inst #19698 = VPSRLVDZ128rmbkz |
| 27459 | { 19697, 9, 1, 0, 551, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a2f8004819ULL }, // Inst #19697 = VPSRLVDZ128rmbk |
| 27460 | { 19696, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a2f8004819ULL }, // Inst #19696 = VPSRLVDZ128rmb |
| 27461 | { 19695, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a2f8004819ULL }, // Inst #19695 = VPSRLVDZ128rm |
| 27462 | { 19694, 3, 1, 0, 554, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1a2b8004829ULL }, // Inst #19694 = VPSRLVDYrr |
| 27463 | { 19693, 7, 1, 0, 553, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a2b8004819ULL }, // Inst #19693 = VPSRLVDYrm |
| 27464 | { 19692, 3, 1, 0, 1085, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xe9b8002829ULL }, // Inst #19692 = VPSRLQrr |
| 27465 | { 19691, 7, 1, 0, 285, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe9b8002819ULL }, // Inst #19691 = VPSRLQrm |
| 27466 | { 19690, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0xb9b8042832ULL }, // Inst #19690 = VPSRLQri |
| 27467 | { 19689, 4, 1, 0, 1087, 0, 0, 5809, X86ImpOpBase + 0, 0, 0xaee9f8022829ULL }, // Inst #19689 = VPSRLQZrrkz |
| 27468 | { 19688, 5, 1, 0, 1087, 0, 0, 5804, X86ImpOpBase + 0, 0, 0xaae9f8022829ULL }, // Inst #19688 = VPSRLQZrrk |
| 27469 | { 19687, 3, 1, 0, 1087, 0, 0, 5783, X86ImpOpBase + 0, 0, 0xa8e9f8022829ULL }, // Inst #19687 = VPSRLQZrr |
| 27470 | { 19686, 8, 1, 0, 565, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaee9f8022819ULL }, // Inst #19686 = VPSRLQZrmkz |
| 27471 | { 19685, 9, 1, 0, 565, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaae9f8022819ULL }, // Inst #19685 = VPSRLQZrmk |
| 27472 | { 19684, 7, 1, 0, 565, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8e9f8022819ULL }, // Inst #19684 = VPSRLQZrm |
| 27473 | { 19683, 4, 1, 0, 1103, 0, 0, 4605, X86ImpOpBase + 0, 0, 0xeeb9f8062832ULL }, // Inst #19683 = VPSRLQZrikz |
| 27474 | { 19682, 5, 1, 0, 1103, 0, 0, 4600, X86ImpOpBase + 0, 0, 0xeab9f8062832ULL }, // Inst #19682 = VPSRLQZrik |
| 27475 | { 19681, 3, 1, 0, 1103, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b9f8062832ULL }, // Inst #19681 = VPSRLQZri |
| 27476 | { 19680, 8, 1, 0, 549, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8062822ULL }, // Inst #19680 = VPSRLQZmikz |
| 27477 | { 19679, 9, 1, 0, 549, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab9f8062822ULL }, // Inst #19679 = VPSRLQZmik |
| 27478 | { 19678, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8062822ULL }, // Inst #19678 = VPSRLQZmi |
| 27479 | { 19677, 8, 1, 0, 549, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb9f8062822ULL }, // Inst #19677 = VPSRLQZmbikz |
| 27480 | { 19676, 9, 1, 0, 549, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab9f8062822ULL }, // Inst #19676 = VPSRLQZmbik |
| 27481 | { 19675, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b9f8062822ULL }, // Inst #19675 = VPSRLQZmbi |
| 27482 | { 19674, 4, 1, 0, 1086, 0, 0, 5800, X86ImpOpBase + 0, 0, 0xa7e9f8022829ULL }, // Inst #19674 = VPSRLQZ256rrkz |
| 27483 | { 19673, 5, 1, 0, 1086, 0, 0, 5795, X86ImpOpBase + 0, 0, 0xa3e9f8022829ULL }, // Inst #19673 = VPSRLQZ256rrk |
| 27484 | { 19672, 3, 1, 0, 1086, 0, 0, 5771, X86ImpOpBase + 0, 0, 0xa1e9f8022829ULL }, // Inst #19672 = VPSRLQZ256rr |
| 27485 | { 19671, 8, 1, 0, 563, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa7e9f8022819ULL }, // Inst #19671 = VPSRLQZ256rmkz |
| 27486 | { 19670, 9, 1, 0, 563, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3e9f8022819ULL }, // Inst #19670 = VPSRLQZ256rmk |
| 27487 | { 19669, 7, 1, 0, 563, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa1e9f8022819ULL }, // Inst #19669 = VPSRLQZ256rm |
| 27488 | { 19668, 4, 1, 0, 1102, 0, 0, 4579, X86ImpOpBase + 0, 0, 0xc7b9f8062832ULL }, // Inst #19668 = VPSRLQZ256rikz |
| 27489 | { 19667, 5, 1, 0, 1102, 0, 0, 4574, X86ImpOpBase + 0, 0, 0xc3b9f8062832ULL }, // Inst #19667 = VPSRLQZ256rik |
| 27490 | { 19666, 3, 1, 0, 1102, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b9f8062832ULL }, // Inst #19666 = VPSRLQZ256ri |
| 27491 | { 19665, 8, 1, 0, 547, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8062822ULL }, // Inst #19665 = VPSRLQZ256mikz |
| 27492 | { 19664, 9, 1, 0, 547, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8062822ULL }, // Inst #19664 = VPSRLQZ256mik |
| 27493 | { 19663, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8062822ULL }, // Inst #19663 = VPSRLQZ256mi |
| 27494 | { 19662, 8, 1, 0, 547, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b9f8062822ULL }, // Inst #19662 = VPSRLQZ256mbikz |
| 27495 | { 19661, 9, 1, 0, 547, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b9f8062822ULL }, // Inst #19661 = VPSRLQZ256mbik |
| 27496 | { 19660, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b9f8062822ULL }, // Inst #19660 = VPSRLQZ256mbi |
| 27497 | { 19659, 4, 1, 0, 1085, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6e9f8022829ULL }, // Inst #19659 = VPSRLQZ128rrkz |
| 27498 | { 19658, 5, 1, 0, 1085, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2e9f8022829ULL }, // Inst #19658 = VPSRLQZ128rrk |
| 27499 | { 19657, 3, 1, 0, 1085, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0e9f8022829ULL }, // Inst #19657 = VPSRLQZ128rr |
| 27500 | { 19656, 8, 1, 0, 285, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e9f8022819ULL }, // Inst #19656 = VPSRLQZ128rmkz |
| 27501 | { 19655, 9, 1, 0, 285, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e9f8022819ULL }, // Inst #19655 = VPSRLQZ128rmk |
| 27502 | { 19654, 7, 1, 0, 285, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e9f8022819ULL }, // Inst #19654 = VPSRLQZ128rm |
| 27503 | { 19653, 4, 1, 0, 1101, 0, 0, 4553, X86ImpOpBase + 0, 0, 0xa6b9f8062832ULL }, // Inst #19653 = VPSRLQZ128rikz |
| 27504 | { 19652, 5, 1, 0, 1101, 0, 0, 4548, X86ImpOpBase + 0, 0, 0xa2b9f8062832ULL }, // Inst #19652 = VPSRLQZ128rik |
| 27505 | { 19651, 3, 1, 0, 1101, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b9f8062832ULL }, // Inst #19651 = VPSRLQZ128ri |
| 27506 | { 19650, 8, 1, 0, 546, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8062822ULL }, // Inst #19650 = VPSRLQZ128mikz |
| 27507 | { 19649, 9, 1, 0, 546, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8062822ULL }, // Inst #19649 = VPSRLQZ128mik |
| 27508 | { 19648, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8062822ULL }, // Inst #19648 = VPSRLQZ128mi |
| 27509 | { 19647, 8, 1, 0, 546, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b9f8062822ULL }, // Inst #19647 = VPSRLQZ128mbikz |
| 27510 | { 19646, 9, 1, 0, 546, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b9f8062822ULL }, // Inst #19646 = VPSRLQZ128mbik |
| 27511 | { 19645, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b9f8062822ULL }, // Inst #19645 = VPSRLQZ128mbi |
| 27512 | { 19644, 3, 1, 0, 1086, 0, 0, 5768, X86ImpOpBase + 0, 0, 0x1e9b8002829ULL }, // Inst #19644 = VPSRLQYrr |
| 27513 | { 19643, 7, 1, 0, 563, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e9b8002819ULL }, // Inst #19643 = VPSRLQYrm |
| 27514 | { 19642, 3, 1, 0, 548, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x1b9b8042832ULL }, // Inst #19642 = VPSRLQYri |
| 27515 | { 19641, 3, 1, 0, 1085, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xe938002829ULL }, // Inst #19641 = VPSRLDrr |
| 27516 | { 19640, 7, 1, 0, 285, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe938002819ULL }, // Inst #19640 = VPSRLDrm |
| 27517 | { 19639, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0xb938042832ULL }, // Inst #19639 = VPSRLDri |
| 27518 | { 19638, 4, 1, 0, 1087, 0, 0, 5791, X86ImpOpBase + 0, 0, 0xaee978002829ULL }, // Inst #19638 = VPSRLDZrrkz |
| 27519 | { 19637, 5, 1, 0, 1087, 0, 0, 5786, X86ImpOpBase + 0, 0, 0xaae978002829ULL }, // Inst #19637 = VPSRLDZrrk |
| 27520 | { 19636, 3, 1, 0, 1087, 0, 0, 5783, X86ImpOpBase + 0, 0, 0xa8e978002829ULL }, // Inst #19636 = VPSRLDZrr |
| 27521 | { 19635, 8, 1, 0, 565, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaee978002819ULL }, // Inst #19635 = VPSRLDZrmkz |
| 27522 | { 19634, 9, 1, 0, 565, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaae978002819ULL }, // Inst #19634 = VPSRLDZrmk |
| 27523 | { 19633, 7, 1, 0, 565, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8e978002819ULL }, // Inst #19633 = VPSRLDZrm |
| 27524 | { 19632, 4, 1, 0, 1103, 0, 0, 4674, X86ImpOpBase + 0, 0, 0xeeb978042832ULL }, // Inst #19632 = VPSRLDZrikz |
| 27525 | { 19631, 5, 1, 0, 1103, 0, 0, 4669, X86ImpOpBase + 0, 0, 0xeab978042832ULL }, // Inst #19631 = VPSRLDZrik |
| 27526 | { 19630, 3, 1, 0, 1103, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b978042832ULL }, // Inst #19630 = VPSRLDZri |
| 27527 | { 19629, 8, 1, 0, 549, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb978042822ULL }, // Inst #19629 = VPSRLDZmikz |
| 27528 | { 19628, 9, 1, 0, 549, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab978042822ULL }, // Inst #19628 = VPSRLDZmik |
| 27529 | { 19627, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b978042822ULL }, // Inst #19627 = VPSRLDZmi |
| 27530 | { 19626, 8, 1, 0, 549, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb978042822ULL }, // Inst #19626 = VPSRLDZmbikz |
| 27531 | { 19625, 9, 1, 0, 549, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab978042822ULL }, // Inst #19625 = VPSRLDZmbik |
| 27532 | { 19624, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b978042822ULL }, // Inst #19624 = VPSRLDZmbi |
| 27533 | { 19623, 4, 1, 0, 1086, 0, 0, 5779, X86ImpOpBase + 0, 0, 0xa7e978002829ULL }, // Inst #19623 = VPSRLDZ256rrkz |
| 27534 | { 19622, 5, 1, 0, 1086, 0, 0, 5774, X86ImpOpBase + 0, 0, 0xa3e978002829ULL }, // Inst #19622 = VPSRLDZ256rrk |
| 27535 | { 19621, 3, 1, 0, 1086, 0, 0, 5771, X86ImpOpBase + 0, 0, 0xa1e978002829ULL }, // Inst #19621 = VPSRLDZ256rr |
| 27536 | { 19620, 8, 1, 0, 563, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa7e978002819ULL }, // Inst #19620 = VPSRLDZ256rmkz |
| 27537 | { 19619, 9, 1, 0, 563, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3e978002819ULL }, // Inst #19619 = VPSRLDZ256rmk |
| 27538 | { 19618, 7, 1, 0, 563, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa1e978002819ULL }, // Inst #19618 = VPSRLDZ256rm |
| 27539 | { 19617, 4, 1, 0, 1102, 0, 0, 4648, X86ImpOpBase + 0, 0, 0xc7b978042832ULL }, // Inst #19617 = VPSRLDZ256rikz |
| 27540 | { 19616, 5, 1, 0, 1102, 0, 0, 4643, X86ImpOpBase + 0, 0, 0xc3b978042832ULL }, // Inst #19616 = VPSRLDZ256rik |
| 27541 | { 19615, 3, 1, 0, 1102, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b978042832ULL }, // Inst #19615 = VPSRLDZ256ri |
| 27542 | { 19614, 8, 1, 0, 547, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b978042822ULL }, // Inst #19614 = VPSRLDZ256mikz |
| 27543 | { 19613, 9, 1, 0, 547, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b978042822ULL }, // Inst #19613 = VPSRLDZ256mik |
| 27544 | { 19612, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b978042822ULL }, // Inst #19612 = VPSRLDZ256mi |
| 27545 | { 19611, 8, 1, 0, 547, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b978042822ULL }, // Inst #19611 = VPSRLDZ256mbikz |
| 27546 | { 19610, 9, 1, 0, 547, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b978042822ULL }, // Inst #19610 = VPSRLDZ256mbik |
| 27547 | { 19609, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b978042822ULL }, // Inst #19609 = VPSRLDZ256mbi |
| 27548 | { 19608, 4, 1, 0, 1085, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6e978002829ULL }, // Inst #19608 = VPSRLDZ128rrkz |
| 27549 | { 19607, 5, 1, 0, 1085, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2e978002829ULL }, // Inst #19607 = VPSRLDZ128rrk |
| 27550 | { 19606, 3, 1, 0, 1085, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0e978002829ULL }, // Inst #19606 = VPSRLDZ128rr |
| 27551 | { 19605, 8, 1, 0, 285, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e978002819ULL }, // Inst #19605 = VPSRLDZ128rmkz |
| 27552 | { 19604, 9, 1, 0, 285, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e978002819ULL }, // Inst #19604 = VPSRLDZ128rmk |
| 27553 | { 19603, 7, 1, 0, 285, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e978002819ULL }, // Inst #19603 = VPSRLDZ128rm |
| 27554 | { 19602, 4, 1, 0, 1101, 0, 0, 3316, X86ImpOpBase + 0, 0, 0xa6b978042832ULL }, // Inst #19602 = VPSRLDZ128rikz |
| 27555 | { 19601, 5, 1, 0, 1101, 0, 0, 3311, X86ImpOpBase + 0, 0, 0xa2b978042832ULL }, // Inst #19601 = VPSRLDZ128rik |
| 27556 | { 19600, 3, 1, 0, 1101, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b978042832ULL }, // Inst #19600 = VPSRLDZ128ri |
| 27557 | { 19599, 8, 1, 0, 546, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b978042822ULL }, // Inst #19599 = VPSRLDZ128mikz |
| 27558 | { 19598, 9, 1, 0, 546, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b978042822ULL }, // Inst #19598 = VPSRLDZ128mik |
| 27559 | { 19597, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b978042822ULL }, // Inst #19597 = VPSRLDZ128mi |
| 27560 | { 19596, 8, 1, 0, 546, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b978042822ULL }, // Inst #19596 = VPSRLDZ128mbikz |
| 27561 | { 19595, 9, 1, 0, 546, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b978042822ULL }, // Inst #19595 = VPSRLDZ128mbik |
| 27562 | { 19594, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b978042822ULL }, // Inst #19594 = VPSRLDZ128mbi |
| 27563 | { 19593, 3, 1, 0, 1086, 0, 0, 5768, X86ImpOpBase + 0, 0, 0x1e938002829ULL }, // Inst #19593 = VPSRLDYrr |
| 27564 | { 19592, 7, 1, 0, 563, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e938002819ULL }, // Inst #19592 = VPSRLDYrm |
| 27565 | { 19591, 3, 1, 0, 548, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x1b938042832ULL }, // Inst #19591 = VPSRLDYri |
| 27566 | { 19590, 3, 1, 0, 1089, 0, 0, 566, X86ImpOpBase + 0, 0, 0xb9b8042833ULL }, // Inst #19590 = VPSRLDQri |
| 27567 | { 19589, 3, 1, 0, 1090, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b9f0042833ULL }, // Inst #19589 = VPSRLDQZri |
| 27568 | { 19588, 7, 1, 0, 347, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b9f0042823ULL }, // Inst #19588 = VPSRLDQZmi |
| 27569 | { 19587, 3, 1, 0, 1088, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b9f0042833ULL }, // Inst #19587 = VPSRLDQZ256ri |
| 27570 | { 19586, 7, 1, 0, 345, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b9f0042823ULL }, // Inst #19586 = VPSRLDQZ256mi |
| 27571 | { 19585, 3, 1, 0, 251, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b9f0042833ULL }, // Inst #19585 = VPSRLDQZ128ri |
| 27572 | { 19584, 7, 1, 0, 250, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b9f0042823ULL }, // Inst #19584 = VPSRLDQZ128mi |
| 27573 | { 19583, 3, 1, 0, 1088, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x1b9b8042833ULL }, // Inst #19583 = VPSRLDQYri |
| 27574 | { 19582, 3, 1, 0, 1085, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xf0b8002829ULL }, // Inst #19582 = VPSRAWrr |
| 27575 | { 19581, 7, 1, 0, 285, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf0b8002819ULL }, // Inst #19581 = VPSRAWrm |
| 27576 | { 19580, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0xb8b8042834ULL }, // Inst #19580 = VPSRAWri |
| 27577 | { 19579, 4, 1, 0, 2300, 0, 0, 5827, X86ImpOpBase + 0, 0, 0xaef0f8002829ULL }, // Inst #19579 = VPSRAWZrrkz |
| 27578 | { 19578, 5, 1, 0, 2300, 0, 0, 5822, X86ImpOpBase + 0, 0, 0xaaf0f8002829ULL }, // Inst #19578 = VPSRAWZrrk |
| 27579 | { 19577, 3, 1, 0, 1087, 0, 0, 5783, X86ImpOpBase + 0, 0, 0xa8f0f8002829ULL }, // Inst #19577 = VPSRAWZrr |
| 27580 | { 19576, 8, 1, 0, 1858, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaef0f8002819ULL }, // Inst #19576 = VPSRAWZrmkz |
| 27581 | { 19575, 9, 1, 0, 1858, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaaf0f8002819ULL }, // Inst #19575 = VPSRAWZrmk |
| 27582 | { 19574, 7, 1, 0, 565, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8f0f8002819ULL }, // Inst #19574 = VPSRAWZrm |
| 27583 | { 19573, 4, 1, 0, 1811, 0, 0, 4527, X86ImpOpBase + 0, 0, 0xeeb8f8042834ULL }, // Inst #19573 = VPSRAWZrikz |
| 27584 | { 19572, 5, 1, 0, 1811, 0, 0, 4522, X86ImpOpBase + 0, 0, 0xeab8f8042834ULL }, // Inst #19572 = VPSRAWZrik |
| 27585 | { 19571, 3, 1, 0, 1103, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b8f8042834ULL }, // Inst #19571 = VPSRAWZri |
| 27586 | { 19570, 8, 1, 0, 1854, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8042824ULL }, // Inst #19570 = VPSRAWZmikz |
| 27587 | { 19569, 9, 1, 0, 1854, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab8f8042824ULL }, // Inst #19569 = VPSRAWZmik |
| 27588 | { 19568, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8042824ULL }, // Inst #19568 = VPSRAWZmi |
| 27589 | { 19567, 4, 1, 0, 1820, 0, 0, 5818, X86ImpOpBase + 0, 0, 0xa7f0f8002829ULL }, // Inst #19567 = VPSRAWZ256rrkz |
| 27590 | { 19566, 5, 1, 0, 1820, 0, 0, 5813, X86ImpOpBase + 0, 0, 0xa3f0f8002829ULL }, // Inst #19566 = VPSRAWZ256rrk |
| 27591 | { 19565, 3, 1, 0, 1086, 0, 0, 5771, X86ImpOpBase + 0, 0, 0xa1f0f8002829ULL }, // Inst #19565 = VPSRAWZ256rr |
| 27592 | { 19564, 8, 1, 0, 2061, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa7f0f8002819ULL }, // Inst #19564 = VPSRAWZ256rmkz |
| 27593 | { 19563, 9, 1, 0, 2061, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3f0f8002819ULL }, // Inst #19563 = VPSRAWZ256rmk |
| 27594 | { 19562, 7, 1, 0, 563, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa1f0f8002819ULL }, // Inst #19562 = VPSRAWZ256rm |
| 27595 | { 19561, 4, 1, 0, 2296, 0, 0, 4491, X86ImpOpBase + 0, 0, 0xc7b8f8042834ULL }, // Inst #19561 = VPSRAWZ256rikz |
| 27596 | { 19560, 5, 1, 0, 2296, 0, 0, 4486, X86ImpOpBase + 0, 0, 0xc3b8f8042834ULL }, // Inst #19560 = VPSRAWZ256rik |
| 27597 | { 19559, 3, 1, 0, 1102, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b8f8042834ULL }, // Inst #19559 = VPSRAWZ256ri |
| 27598 | { 19558, 8, 1, 0, 2052, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8042824ULL }, // Inst #19558 = VPSRAWZ256mikz |
| 27599 | { 19557, 9, 1, 0, 2052, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8042824ULL }, // Inst #19557 = VPSRAWZ256mik |
| 27600 | { 19556, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8042824ULL }, // Inst #19556 = VPSRAWZ256mi |
| 27601 | { 19555, 4, 1, 0, 2390, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6f0f8002829ULL }, // Inst #19555 = VPSRAWZ128rrkz |
| 27602 | { 19554, 5, 1, 0, 2390, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2f0f8002829ULL }, // Inst #19554 = VPSRAWZ128rrk |
| 27603 | { 19553, 3, 1, 0, 1085, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0f0f8002829ULL }, // Inst #19553 = VPSRAWZ128rr |
| 27604 | { 19552, 8, 1, 0, 2057, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f0f8002819ULL }, // Inst #19552 = VPSRAWZ128rmkz |
| 27605 | { 19551, 9, 1, 0, 2057, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f0f8002819ULL }, // Inst #19551 = VPSRAWZ128rmk |
| 27606 | { 19550, 7, 1, 0, 285, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f0f8002819ULL }, // Inst #19550 = VPSRAWZ128rm |
| 27607 | { 19549, 4, 1, 0, 2295, 0, 0, 4455, X86ImpOpBase + 0, 0, 0xa6b8f8042834ULL }, // Inst #19549 = VPSRAWZ128rikz |
| 27608 | { 19548, 5, 1, 0, 2295, 0, 0, 4450, X86ImpOpBase + 0, 0, 0xa2b8f8042834ULL }, // Inst #19548 = VPSRAWZ128rik |
| 27609 | { 19547, 3, 1, 0, 1101, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b8f8042834ULL }, // Inst #19547 = VPSRAWZ128ri |
| 27610 | { 19546, 8, 1, 0, 2051, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8042824ULL }, // Inst #19546 = VPSRAWZ128mikz |
| 27611 | { 19545, 9, 1, 0, 2051, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8042824ULL }, // Inst #19545 = VPSRAWZ128mik |
| 27612 | { 19544, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8042824ULL }, // Inst #19544 = VPSRAWZ128mi |
| 27613 | { 19543, 3, 1, 0, 1086, 0, 0, 5768, X86ImpOpBase + 0, 0, 0x1f0b8002829ULL }, // Inst #19543 = VPSRAWYrr |
| 27614 | { 19542, 7, 1, 0, 563, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f0b8002819ULL }, // Inst #19542 = VPSRAWYrm |
| 27615 | { 19541, 3, 1, 0, 548, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x1b8b8042834ULL }, // Inst #19541 = VPSRAWYri |
| 27616 | { 19540, 4, 1, 0, 1810, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xee88f8024829ULL }, // Inst #19540 = VPSRAVWZrrkz |
| 27617 | { 19539, 5, 1, 0, 1810, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xea88f8024829ULL }, // Inst #19539 = VPSRAVWZrrk |
| 27618 | { 19538, 3, 1, 0, 556, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe888f8024829ULL }, // Inst #19538 = VPSRAVWZrr |
| 27619 | { 19537, 8, 1, 0, 1857, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee88f8024819ULL }, // Inst #19537 = VPSRAVWZrmkz |
| 27620 | { 19536, 9, 1, 0, 1857, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea88f8024819ULL }, // Inst #19536 = VPSRAVWZrmk |
| 27621 | { 19535, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe888f8024819ULL }, // Inst #19535 = VPSRAVWZrm |
| 27622 | { 19534, 4, 1, 0, 2294, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc788f8024829ULL }, // Inst #19534 = VPSRAVWZ256rrkz |
| 27623 | { 19533, 5, 1, 0, 2294, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc388f8024829ULL }, // Inst #19533 = VPSRAVWZ256rrk |
| 27624 | { 19532, 3, 1, 0, 554, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc188f8024829ULL }, // Inst #19532 = VPSRAVWZ256rr |
| 27625 | { 19531, 8, 1, 0, 2060, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc788f8024819ULL }, // Inst #19531 = VPSRAVWZ256rmkz |
| 27626 | { 19530, 9, 1, 0, 2060, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc388f8024819ULL }, // Inst #19530 = VPSRAVWZ256rmk |
| 27627 | { 19529, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc188f8024819ULL }, // Inst #19529 = VPSRAVWZ256rm |
| 27628 | { 19528, 4, 1, 0, 2293, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa688f8024829ULL }, // Inst #19528 = VPSRAVWZ128rrkz |
| 27629 | { 19527, 5, 1, 0, 2293, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa288f8024829ULL }, // Inst #19527 = VPSRAVWZ128rrk |
| 27630 | { 19526, 3, 1, 0, 552, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa088f8024829ULL }, // Inst #19526 = VPSRAVWZ128rr |
| 27631 | { 19525, 8, 1, 0, 2056, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa688f8024819ULL }, // Inst #19525 = VPSRAVWZ128rmkz |
| 27632 | { 19524, 9, 1, 0, 2056, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa288f8024819ULL }, // Inst #19524 = VPSRAVWZ128rmk |
| 27633 | { 19523, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa088f8024819ULL }, // Inst #19523 = VPSRAVWZ128rm |
| 27634 | { 19522, 4, 1, 0, 556, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeea378024829ULL }, // Inst #19522 = VPSRAVQZrrkz |
| 27635 | { 19521, 5, 1, 0, 556, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeaa378024829ULL }, // Inst #19521 = VPSRAVQZrrk |
| 27636 | { 19520, 3, 1, 0, 556, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8a378024829ULL }, // Inst #19520 = VPSRAVQZrr |
| 27637 | { 19519, 8, 1, 0, 555, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea378024819ULL }, // Inst #19519 = VPSRAVQZrmkz |
| 27638 | { 19518, 9, 1, 0, 555, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa378024819ULL }, // Inst #19518 = VPSRAVQZrmk |
| 27639 | { 19517, 8, 1, 0, 555, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ea378024819ULL }, // Inst #19517 = VPSRAVQZrmbkz |
| 27640 | { 19516, 9, 1, 0, 555, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aa378024819ULL }, // Inst #19516 = VPSRAVQZrmbk |
| 27641 | { 19515, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98a378024819ULL }, // Inst #19515 = VPSRAVQZrmb |
| 27642 | { 19514, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a378024819ULL }, // Inst #19514 = VPSRAVQZrm |
| 27643 | { 19513, 4, 1, 0, 554, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc7a378024829ULL }, // Inst #19513 = VPSRAVQZ256rrkz |
| 27644 | { 19512, 5, 1, 0, 554, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3a378024829ULL }, // Inst #19512 = VPSRAVQZ256rrk |
| 27645 | { 19511, 3, 1, 0, 554, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1a378024829ULL }, // Inst #19511 = VPSRAVQZ256rr |
| 27646 | { 19510, 8, 1, 0, 553, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a378024819ULL }, // Inst #19510 = VPSRAVQZ256rmkz |
| 27647 | { 19509, 9, 1, 0, 553, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a378024819ULL }, // Inst #19509 = VPSRAVQZ256rmk |
| 27648 | { 19508, 8, 1, 0, 553, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97a378024819ULL }, // Inst #19508 = VPSRAVQZ256rmbkz |
| 27649 | { 19507, 9, 1, 0, 553, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93a378024819ULL }, // Inst #19507 = VPSRAVQZ256rmbk |
| 27650 | { 19506, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91a378024819ULL }, // Inst #19506 = VPSRAVQZ256rmb |
| 27651 | { 19505, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a378024819ULL }, // Inst #19505 = VPSRAVQZ256rm |
| 27652 | { 19504, 4, 1, 0, 552, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6a378024829ULL }, // Inst #19504 = VPSRAVQZ128rrkz |
| 27653 | { 19503, 5, 1, 0, 552, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2a378024829ULL }, // Inst #19503 = VPSRAVQZ128rrk |
| 27654 | { 19502, 3, 1, 0, 552, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0a378024829ULL }, // Inst #19502 = VPSRAVQZ128rr |
| 27655 | { 19501, 8, 1, 0, 551, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a378024819ULL }, // Inst #19501 = VPSRAVQZ128rmkz |
| 27656 | { 19500, 9, 1, 0, 551, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a378024819ULL }, // Inst #19500 = VPSRAVQZ128rmk |
| 27657 | { 19499, 8, 1, 0, 551, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96a378024819ULL }, // Inst #19499 = VPSRAVQZ128rmbkz |
| 27658 | { 19498, 9, 1, 0, 551, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92a378024819ULL }, // Inst #19498 = VPSRAVQZ128rmbk |
| 27659 | { 19497, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90a378024819ULL }, // Inst #19497 = VPSRAVQZ128rmb |
| 27660 | { 19496, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a378024819ULL }, // Inst #19496 = VPSRAVQZ128rm |
| 27661 | { 19495, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xa338004829ULL }, // Inst #19495 = VPSRAVDrr |
| 27662 | { 19494, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa338004819ULL }, // Inst #19494 = VPSRAVDrm |
| 27663 | { 19493, 4, 1, 0, 556, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeea378004829ULL }, // Inst #19493 = VPSRAVDZrrkz |
| 27664 | { 19492, 5, 1, 0, 556, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaa378004829ULL }, // Inst #19492 = VPSRAVDZrrk |
| 27665 | { 19491, 3, 1, 0, 556, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8a378004829ULL }, // Inst #19491 = VPSRAVDZrr |
| 27666 | { 19490, 8, 1, 0, 555, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea378004819ULL }, // Inst #19490 = VPSRAVDZrmkz |
| 27667 | { 19489, 9, 1, 0, 555, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa378004819ULL }, // Inst #19489 = VPSRAVDZrmk |
| 27668 | { 19488, 8, 1, 0, 555, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea378004819ULL }, // Inst #19488 = VPSRAVDZrmbkz |
| 27669 | { 19487, 9, 1, 0, 555, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa378004819ULL }, // Inst #19487 = VPSRAVDZrmbk |
| 27670 | { 19486, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a378004819ULL }, // Inst #19486 = VPSRAVDZrmb |
| 27671 | { 19485, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a378004819ULL }, // Inst #19485 = VPSRAVDZrm |
| 27672 | { 19484, 4, 1, 0, 554, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc7a378004829ULL }, // Inst #19484 = VPSRAVDZ256rrkz |
| 27673 | { 19483, 5, 1, 0, 554, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3a378004829ULL }, // Inst #19483 = VPSRAVDZ256rrk |
| 27674 | { 19482, 3, 1, 0, 554, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1a378004829ULL }, // Inst #19482 = VPSRAVDZ256rr |
| 27675 | { 19481, 8, 1, 0, 553, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a378004819ULL }, // Inst #19481 = VPSRAVDZ256rmkz |
| 27676 | { 19480, 9, 1, 0, 553, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a378004819ULL }, // Inst #19480 = VPSRAVDZ256rmk |
| 27677 | { 19479, 8, 1, 0, 553, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a378004819ULL }, // Inst #19479 = VPSRAVDZ256rmbkz |
| 27678 | { 19478, 9, 1, 0, 553, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a378004819ULL }, // Inst #19478 = VPSRAVDZ256rmbk |
| 27679 | { 19477, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a378004819ULL }, // Inst #19477 = VPSRAVDZ256rmb |
| 27680 | { 19476, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a378004819ULL }, // Inst #19476 = VPSRAVDZ256rm |
| 27681 | { 19475, 4, 1, 0, 552, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6a378004829ULL }, // Inst #19475 = VPSRAVDZ128rrkz |
| 27682 | { 19474, 5, 1, 0, 552, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2a378004829ULL }, // Inst #19474 = VPSRAVDZ128rrk |
| 27683 | { 19473, 3, 1, 0, 552, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0a378004829ULL }, // Inst #19473 = VPSRAVDZ128rr |
| 27684 | { 19472, 8, 1, 0, 551, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a378004819ULL }, // Inst #19472 = VPSRAVDZ128rmkz |
| 27685 | { 19471, 9, 1, 0, 551, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a378004819ULL }, // Inst #19471 = VPSRAVDZ128rmk |
| 27686 | { 19470, 8, 1, 0, 551, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a378004819ULL }, // Inst #19470 = VPSRAVDZ128rmbkz |
| 27687 | { 19469, 9, 1, 0, 551, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a378004819ULL }, // Inst #19469 = VPSRAVDZ128rmbk |
| 27688 | { 19468, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a378004819ULL }, // Inst #19468 = VPSRAVDZ128rmb |
| 27689 | { 19467, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a378004819ULL }, // Inst #19467 = VPSRAVDZ128rm |
| 27690 | { 19466, 3, 1, 0, 554, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1a338004829ULL }, // Inst #19466 = VPSRAVDYrr |
| 27691 | { 19465, 7, 1, 0, 553, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a338004819ULL }, // Inst #19465 = VPSRAVDYrm |
| 27692 | { 19464, 4, 1, 0, 1087, 0, 0, 5809, X86ImpOpBase + 0, 0, 0xaef178022829ULL }, // Inst #19464 = VPSRAQZrrkz |
| 27693 | { 19463, 5, 1, 0, 1087, 0, 0, 5804, X86ImpOpBase + 0, 0, 0xaaf178022829ULL }, // Inst #19463 = VPSRAQZrrk |
| 27694 | { 19462, 3, 1, 0, 1087, 0, 0, 5783, X86ImpOpBase + 0, 0, 0xa8f178022829ULL }, // Inst #19462 = VPSRAQZrr |
| 27695 | { 19461, 8, 1, 0, 565, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaef178022819ULL }, // Inst #19461 = VPSRAQZrmkz |
| 27696 | { 19460, 9, 1, 0, 565, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaaf178022819ULL }, // Inst #19460 = VPSRAQZrmk |
| 27697 | { 19459, 7, 1, 0, 565, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8f178022819ULL }, // Inst #19459 = VPSRAQZrm |
| 27698 | { 19458, 4, 1, 0, 1103, 0, 0, 4605, X86ImpOpBase + 0, 0, 0xeeb978062834ULL }, // Inst #19458 = VPSRAQZrikz |
| 27699 | { 19457, 5, 1, 0, 1103, 0, 0, 4600, X86ImpOpBase + 0, 0, 0xeab978062834ULL }, // Inst #19457 = VPSRAQZrik |
| 27700 | { 19456, 3, 1, 0, 1103, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b978062834ULL }, // Inst #19456 = VPSRAQZri |
| 27701 | { 19455, 8, 1, 0, 549, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb978062824ULL }, // Inst #19455 = VPSRAQZmikz |
| 27702 | { 19454, 9, 1, 0, 549, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab978062824ULL }, // Inst #19454 = VPSRAQZmik |
| 27703 | { 19453, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b978062824ULL }, // Inst #19453 = VPSRAQZmi |
| 27704 | { 19452, 8, 1, 0, 549, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb978062824ULL }, // Inst #19452 = VPSRAQZmbikz |
| 27705 | { 19451, 9, 1, 0, 549, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab978062824ULL }, // Inst #19451 = VPSRAQZmbik |
| 27706 | { 19450, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b978062824ULL }, // Inst #19450 = VPSRAQZmbi |
| 27707 | { 19449, 4, 1, 0, 1086, 0, 0, 5800, X86ImpOpBase + 0, 0, 0xa7f178022829ULL }, // Inst #19449 = VPSRAQZ256rrkz |
| 27708 | { 19448, 5, 1, 0, 1086, 0, 0, 5795, X86ImpOpBase + 0, 0, 0xa3f178022829ULL }, // Inst #19448 = VPSRAQZ256rrk |
| 27709 | { 19447, 3, 1, 0, 1086, 0, 0, 5771, X86ImpOpBase + 0, 0, 0xa1f178022829ULL }, // Inst #19447 = VPSRAQZ256rr |
| 27710 | { 19446, 8, 1, 0, 563, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa7f178022819ULL }, // Inst #19446 = VPSRAQZ256rmkz |
| 27711 | { 19445, 9, 1, 0, 563, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3f178022819ULL }, // Inst #19445 = VPSRAQZ256rmk |
| 27712 | { 19444, 7, 1, 0, 563, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa1f178022819ULL }, // Inst #19444 = VPSRAQZ256rm |
| 27713 | { 19443, 4, 1, 0, 1102, 0, 0, 4579, X86ImpOpBase + 0, 0, 0xc7b978062834ULL }, // Inst #19443 = VPSRAQZ256rikz |
| 27714 | { 19442, 5, 1, 0, 1102, 0, 0, 4574, X86ImpOpBase + 0, 0, 0xc3b978062834ULL }, // Inst #19442 = VPSRAQZ256rik |
| 27715 | { 19441, 3, 1, 0, 1102, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b978062834ULL }, // Inst #19441 = VPSRAQZ256ri |
| 27716 | { 19440, 8, 1, 0, 547, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b978062824ULL }, // Inst #19440 = VPSRAQZ256mikz |
| 27717 | { 19439, 9, 1, 0, 547, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b978062824ULL }, // Inst #19439 = VPSRAQZ256mik |
| 27718 | { 19438, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b978062824ULL }, // Inst #19438 = VPSRAQZ256mi |
| 27719 | { 19437, 8, 1, 0, 547, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b978062824ULL }, // Inst #19437 = VPSRAQZ256mbikz |
| 27720 | { 19436, 9, 1, 0, 547, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b978062824ULL }, // Inst #19436 = VPSRAQZ256mbik |
| 27721 | { 19435, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b978062824ULL }, // Inst #19435 = VPSRAQZ256mbi |
| 27722 | { 19434, 4, 1, 0, 1085, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6f178022829ULL }, // Inst #19434 = VPSRAQZ128rrkz |
| 27723 | { 19433, 5, 1, 0, 1085, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2f178022829ULL }, // Inst #19433 = VPSRAQZ128rrk |
| 27724 | { 19432, 3, 1, 0, 1085, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0f178022829ULL }, // Inst #19432 = VPSRAQZ128rr |
| 27725 | { 19431, 8, 1, 0, 285, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f178022819ULL }, // Inst #19431 = VPSRAQZ128rmkz |
| 27726 | { 19430, 9, 1, 0, 285, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f178022819ULL }, // Inst #19430 = VPSRAQZ128rmk |
| 27727 | { 19429, 7, 1, 0, 285, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f178022819ULL }, // Inst #19429 = VPSRAQZ128rm |
| 27728 | { 19428, 4, 1, 0, 1101, 0, 0, 4553, X86ImpOpBase + 0, 0, 0xa6b978062834ULL }, // Inst #19428 = VPSRAQZ128rikz |
| 27729 | { 19427, 5, 1, 0, 1101, 0, 0, 4548, X86ImpOpBase + 0, 0, 0xa2b978062834ULL }, // Inst #19427 = VPSRAQZ128rik |
| 27730 | { 19426, 3, 1, 0, 1101, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b978062834ULL }, // Inst #19426 = VPSRAQZ128ri |
| 27731 | { 19425, 8, 1, 0, 546, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b978062824ULL }, // Inst #19425 = VPSRAQZ128mikz |
| 27732 | { 19424, 9, 1, 0, 546, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b978062824ULL }, // Inst #19424 = VPSRAQZ128mik |
| 27733 | { 19423, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b978062824ULL }, // Inst #19423 = VPSRAQZ128mi |
| 27734 | { 19422, 8, 1, 0, 546, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b978062824ULL }, // Inst #19422 = VPSRAQZ128mbikz |
| 27735 | { 19421, 9, 1, 0, 546, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b978062824ULL }, // Inst #19421 = VPSRAQZ128mbik |
| 27736 | { 19420, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b978062824ULL }, // Inst #19420 = VPSRAQZ128mbi |
| 27737 | { 19419, 3, 1, 0, 1085, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xf138002829ULL }, // Inst #19419 = VPSRADrr |
| 27738 | { 19418, 7, 1, 0, 285, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf138002819ULL }, // Inst #19418 = VPSRADrm |
| 27739 | { 19417, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0xb938042834ULL }, // Inst #19417 = VPSRADri |
| 27740 | { 19416, 4, 1, 0, 1087, 0, 0, 5791, X86ImpOpBase + 0, 0, 0xaef178002829ULL }, // Inst #19416 = VPSRADZrrkz |
| 27741 | { 19415, 5, 1, 0, 1087, 0, 0, 5786, X86ImpOpBase + 0, 0, 0xaaf178002829ULL }, // Inst #19415 = VPSRADZrrk |
| 27742 | { 19414, 3, 1, 0, 1087, 0, 0, 5783, X86ImpOpBase + 0, 0, 0xa8f178002829ULL }, // Inst #19414 = VPSRADZrr |
| 27743 | { 19413, 8, 1, 0, 565, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaef178002819ULL }, // Inst #19413 = VPSRADZrmkz |
| 27744 | { 19412, 9, 1, 0, 565, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaaf178002819ULL }, // Inst #19412 = VPSRADZrmk |
| 27745 | { 19411, 7, 1, 0, 565, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8f178002819ULL }, // Inst #19411 = VPSRADZrm |
| 27746 | { 19410, 4, 1, 0, 1103, 0, 0, 4674, X86ImpOpBase + 0, 0, 0xeeb978042834ULL }, // Inst #19410 = VPSRADZrikz |
| 27747 | { 19409, 5, 1, 0, 1103, 0, 0, 4669, X86ImpOpBase + 0, 0, 0xeab978042834ULL }, // Inst #19409 = VPSRADZrik |
| 27748 | { 19408, 3, 1, 0, 1103, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b978042834ULL }, // Inst #19408 = VPSRADZri |
| 27749 | { 19407, 8, 1, 0, 549, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb978042824ULL }, // Inst #19407 = VPSRADZmikz |
| 27750 | { 19406, 9, 1, 0, 549, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab978042824ULL }, // Inst #19406 = VPSRADZmik |
| 27751 | { 19405, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b978042824ULL }, // Inst #19405 = VPSRADZmi |
| 27752 | { 19404, 8, 1, 0, 549, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb978042824ULL }, // Inst #19404 = VPSRADZmbikz |
| 27753 | { 19403, 9, 1, 0, 549, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab978042824ULL }, // Inst #19403 = VPSRADZmbik |
| 27754 | { 19402, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b978042824ULL }, // Inst #19402 = VPSRADZmbi |
| 27755 | { 19401, 4, 1, 0, 1086, 0, 0, 5779, X86ImpOpBase + 0, 0, 0xa7f178002829ULL }, // Inst #19401 = VPSRADZ256rrkz |
| 27756 | { 19400, 5, 1, 0, 1086, 0, 0, 5774, X86ImpOpBase + 0, 0, 0xa3f178002829ULL }, // Inst #19400 = VPSRADZ256rrk |
| 27757 | { 19399, 3, 1, 0, 1086, 0, 0, 5771, X86ImpOpBase + 0, 0, 0xa1f178002829ULL }, // Inst #19399 = VPSRADZ256rr |
| 27758 | { 19398, 8, 1, 0, 563, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa7f178002819ULL }, // Inst #19398 = VPSRADZ256rmkz |
| 27759 | { 19397, 9, 1, 0, 563, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3f178002819ULL }, // Inst #19397 = VPSRADZ256rmk |
| 27760 | { 19396, 7, 1, 0, 563, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa1f178002819ULL }, // Inst #19396 = VPSRADZ256rm |
| 27761 | { 19395, 4, 1, 0, 1102, 0, 0, 4648, X86ImpOpBase + 0, 0, 0xc7b978042834ULL }, // Inst #19395 = VPSRADZ256rikz |
| 27762 | { 19394, 5, 1, 0, 1102, 0, 0, 4643, X86ImpOpBase + 0, 0, 0xc3b978042834ULL }, // Inst #19394 = VPSRADZ256rik |
| 27763 | { 19393, 3, 1, 0, 1102, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b978042834ULL }, // Inst #19393 = VPSRADZ256ri |
| 27764 | { 19392, 8, 1, 0, 547, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b978042824ULL }, // Inst #19392 = VPSRADZ256mikz |
| 27765 | { 19391, 9, 1, 0, 547, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b978042824ULL }, // Inst #19391 = VPSRADZ256mik |
| 27766 | { 19390, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b978042824ULL }, // Inst #19390 = VPSRADZ256mi |
| 27767 | { 19389, 8, 1, 0, 547, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b978042824ULL }, // Inst #19389 = VPSRADZ256mbikz |
| 27768 | { 19388, 9, 1, 0, 547, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b978042824ULL }, // Inst #19388 = VPSRADZ256mbik |
| 27769 | { 19387, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b978042824ULL }, // Inst #19387 = VPSRADZ256mbi |
| 27770 | { 19386, 4, 1, 0, 1085, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6f178002829ULL }, // Inst #19386 = VPSRADZ128rrkz |
| 27771 | { 19385, 5, 1, 0, 1085, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2f178002829ULL }, // Inst #19385 = VPSRADZ128rrk |
| 27772 | { 19384, 3, 1, 0, 1085, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0f178002829ULL }, // Inst #19384 = VPSRADZ128rr |
| 27773 | { 19383, 8, 1, 0, 285, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f178002819ULL }, // Inst #19383 = VPSRADZ128rmkz |
| 27774 | { 19382, 9, 1, 0, 285, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f178002819ULL }, // Inst #19382 = VPSRADZ128rmk |
| 27775 | { 19381, 7, 1, 0, 285, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f178002819ULL }, // Inst #19381 = VPSRADZ128rm |
| 27776 | { 19380, 4, 1, 0, 1101, 0, 0, 3316, X86ImpOpBase + 0, 0, 0xa6b978042834ULL }, // Inst #19380 = VPSRADZ128rikz |
| 27777 | { 19379, 5, 1, 0, 1101, 0, 0, 3311, X86ImpOpBase + 0, 0, 0xa2b978042834ULL }, // Inst #19379 = VPSRADZ128rik |
| 27778 | { 19378, 3, 1, 0, 1101, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b978042834ULL }, // Inst #19378 = VPSRADZ128ri |
| 27779 | { 19377, 8, 1, 0, 546, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b978042824ULL }, // Inst #19377 = VPSRADZ128mikz |
| 27780 | { 19376, 9, 1, 0, 546, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b978042824ULL }, // Inst #19376 = VPSRADZ128mik |
| 27781 | { 19375, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b978042824ULL }, // Inst #19375 = VPSRADZ128mi |
| 27782 | { 19374, 8, 1, 0, 546, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b978042824ULL }, // Inst #19374 = VPSRADZ128mbikz |
| 27783 | { 19373, 9, 1, 0, 546, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b978042824ULL }, // Inst #19373 = VPSRADZ128mbik |
| 27784 | { 19372, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b978042824ULL }, // Inst #19372 = VPSRADZ128mbi |
| 27785 | { 19371, 3, 1, 0, 1086, 0, 0, 5768, X86ImpOpBase + 0, 0, 0x1f138002829ULL }, // Inst #19371 = VPSRADYrr |
| 27786 | { 19370, 7, 1, 0, 563, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f138002819ULL }, // Inst #19370 = VPSRADYrm |
| 27787 | { 19369, 3, 1, 0, 548, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x1b938042834ULL }, // Inst #19369 = VPSRADYri |
| 27788 | { 19368, 3, 1, 0, 1085, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xf8b8002829ULL }, // Inst #19368 = VPSLLWrr |
| 27789 | { 19367, 7, 1, 0, 285, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf8b8002819ULL }, // Inst #19367 = VPSLLWrm |
| 27790 | { 19366, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0xb8b8042836ULL }, // Inst #19366 = VPSLLWri |
| 27791 | { 19365, 4, 1, 0, 2300, 0, 0, 5827, X86ImpOpBase + 0, 0, 0xaef8f8002829ULL }, // Inst #19365 = VPSLLWZrrkz |
| 27792 | { 19364, 5, 1, 0, 2300, 0, 0, 5822, X86ImpOpBase + 0, 0, 0xaaf8f8002829ULL }, // Inst #19364 = VPSLLWZrrk |
| 27793 | { 19363, 3, 1, 0, 1087, 0, 0, 5783, X86ImpOpBase + 0, 0, 0xa8f8f8002829ULL }, // Inst #19363 = VPSLLWZrr |
| 27794 | { 19362, 8, 1, 0, 1858, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaef8f8002819ULL }, // Inst #19362 = VPSLLWZrmkz |
| 27795 | { 19361, 9, 1, 0, 1858, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaaf8f8002819ULL }, // Inst #19361 = VPSLLWZrmk |
| 27796 | { 19360, 7, 1, 0, 565, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8f8f8002819ULL }, // Inst #19360 = VPSLLWZrm |
| 27797 | { 19359, 4, 1, 0, 1811, 0, 0, 4527, X86ImpOpBase + 0, 0, 0xeeb8f8042836ULL }, // Inst #19359 = VPSLLWZrikz |
| 27798 | { 19358, 5, 1, 0, 1811, 0, 0, 4522, X86ImpOpBase + 0, 0, 0xeab8f8042836ULL }, // Inst #19358 = VPSLLWZrik |
| 27799 | { 19357, 3, 1, 0, 1103, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b8f8042836ULL }, // Inst #19357 = VPSLLWZri |
| 27800 | { 19356, 8, 1, 0, 1854, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8042826ULL }, // Inst #19356 = VPSLLWZmikz |
| 27801 | { 19355, 9, 1, 0, 1854, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab8f8042826ULL }, // Inst #19355 = VPSLLWZmik |
| 27802 | { 19354, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8042826ULL }, // Inst #19354 = VPSLLWZmi |
| 27803 | { 19353, 4, 1, 0, 1820, 0, 0, 5818, X86ImpOpBase + 0, 0, 0xa7f8f8002829ULL }, // Inst #19353 = VPSLLWZ256rrkz |
| 27804 | { 19352, 5, 1, 0, 1820, 0, 0, 5813, X86ImpOpBase + 0, 0, 0xa3f8f8002829ULL }, // Inst #19352 = VPSLLWZ256rrk |
| 27805 | { 19351, 3, 1, 0, 1086, 0, 0, 5771, X86ImpOpBase + 0, 0, 0xa1f8f8002829ULL }, // Inst #19351 = VPSLLWZ256rr |
| 27806 | { 19350, 8, 1, 0, 2061, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa7f8f8002819ULL }, // Inst #19350 = VPSLLWZ256rmkz |
| 27807 | { 19349, 9, 1, 0, 2061, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3f8f8002819ULL }, // Inst #19349 = VPSLLWZ256rmk |
| 27808 | { 19348, 7, 1, 0, 563, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa1f8f8002819ULL }, // Inst #19348 = VPSLLWZ256rm |
| 27809 | { 19347, 4, 1, 0, 2296, 0, 0, 4491, X86ImpOpBase + 0, 0, 0xc7b8f8042836ULL }, // Inst #19347 = VPSLLWZ256rikz |
| 27810 | { 19346, 5, 1, 0, 2296, 0, 0, 4486, X86ImpOpBase + 0, 0, 0xc3b8f8042836ULL }, // Inst #19346 = VPSLLWZ256rik |
| 27811 | { 19345, 3, 1, 0, 1102, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b8f8042836ULL }, // Inst #19345 = VPSLLWZ256ri |
| 27812 | { 19344, 8, 1, 0, 2052, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8042826ULL }, // Inst #19344 = VPSLLWZ256mikz |
| 27813 | { 19343, 9, 1, 0, 2052, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8042826ULL }, // Inst #19343 = VPSLLWZ256mik |
| 27814 | { 19342, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8042826ULL }, // Inst #19342 = VPSLLWZ256mi |
| 27815 | { 19341, 4, 1, 0, 2390, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6f8f8002829ULL }, // Inst #19341 = VPSLLWZ128rrkz |
| 27816 | { 19340, 5, 1, 0, 2390, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2f8f8002829ULL }, // Inst #19340 = VPSLLWZ128rrk |
| 27817 | { 19339, 3, 1, 0, 1085, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0f8f8002829ULL }, // Inst #19339 = VPSLLWZ128rr |
| 27818 | { 19338, 8, 1, 0, 2057, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f8f8002819ULL }, // Inst #19338 = VPSLLWZ128rmkz |
| 27819 | { 19337, 9, 1, 0, 2057, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f8f8002819ULL }, // Inst #19337 = VPSLLWZ128rmk |
| 27820 | { 19336, 7, 1, 0, 285, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f8f8002819ULL }, // Inst #19336 = VPSLLWZ128rm |
| 27821 | { 19335, 4, 1, 0, 2295, 0, 0, 4455, X86ImpOpBase + 0, 0, 0xa6b8f8042836ULL }, // Inst #19335 = VPSLLWZ128rikz |
| 27822 | { 19334, 5, 1, 0, 2295, 0, 0, 4450, X86ImpOpBase + 0, 0, 0xa2b8f8042836ULL }, // Inst #19334 = VPSLLWZ128rik |
| 27823 | { 19333, 3, 1, 0, 1101, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b8f8042836ULL }, // Inst #19333 = VPSLLWZ128ri |
| 27824 | { 19332, 8, 1, 0, 2051, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8042826ULL }, // Inst #19332 = VPSLLWZ128mikz |
| 27825 | { 19331, 9, 1, 0, 2051, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8042826ULL }, // Inst #19331 = VPSLLWZ128mik |
| 27826 | { 19330, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8042826ULL }, // Inst #19330 = VPSLLWZ128mi |
| 27827 | { 19329, 3, 1, 0, 1086, 0, 0, 5768, X86ImpOpBase + 0, 0, 0x1f8b8002829ULL }, // Inst #19329 = VPSLLWYrr |
| 27828 | { 19328, 7, 1, 0, 563, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f8b8002819ULL }, // Inst #19328 = VPSLLWYrm |
| 27829 | { 19327, 3, 1, 0, 548, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x1b8b8042836ULL }, // Inst #19327 = VPSLLWYri |
| 27830 | { 19326, 4, 1, 0, 1810, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xee8978024829ULL }, // Inst #19326 = VPSLLVWZrrkz |
| 27831 | { 19325, 5, 1, 0, 1810, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xea8978024829ULL }, // Inst #19325 = VPSLLVWZrrk |
| 27832 | { 19324, 3, 1, 0, 556, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88978024829ULL }, // Inst #19324 = VPSLLVWZrr |
| 27833 | { 19323, 8, 1, 0, 1857, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8978024819ULL }, // Inst #19323 = VPSLLVWZrmkz |
| 27834 | { 19322, 9, 1, 0, 1857, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8978024819ULL }, // Inst #19322 = VPSLLVWZrmk |
| 27835 | { 19321, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88978024819ULL }, // Inst #19321 = VPSLLVWZrm |
| 27836 | { 19320, 4, 1, 0, 2294, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc78978024829ULL }, // Inst #19320 = VPSLLVWZ256rrkz |
| 27837 | { 19319, 5, 1, 0, 2294, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc38978024829ULL }, // Inst #19319 = VPSLLVWZ256rrk |
| 27838 | { 19318, 3, 1, 0, 554, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18978024829ULL }, // Inst #19318 = VPSLLVWZ256rr |
| 27839 | { 19317, 8, 1, 0, 2060, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78978024819ULL }, // Inst #19317 = VPSLLVWZ256rmkz |
| 27840 | { 19316, 9, 1, 0, 2060, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38978024819ULL }, // Inst #19316 = VPSLLVWZ256rmk |
| 27841 | { 19315, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18978024819ULL }, // Inst #19315 = VPSLLVWZ256rm |
| 27842 | { 19314, 4, 1, 0, 2293, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa68978024829ULL }, // Inst #19314 = VPSLLVWZ128rrkz |
| 27843 | { 19313, 5, 1, 0, 2293, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa28978024829ULL }, // Inst #19313 = VPSLLVWZ128rrk |
| 27844 | { 19312, 3, 1, 0, 552, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08978024829ULL }, // Inst #19312 = VPSLLVWZ128rr |
| 27845 | { 19311, 8, 1, 0, 2056, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68978024819ULL }, // Inst #19311 = VPSLLVWZ128rmkz |
| 27846 | { 19310, 9, 1, 0, 2056, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28978024819ULL }, // Inst #19310 = VPSLLVWZ128rmk |
| 27847 | { 19309, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08978024819ULL }, // Inst #19309 = VPSLLVWZ128rm |
| 27848 | { 19308, 3, 1, 0, 836, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xa3b8024829ULL }, // Inst #19308 = VPSLLVQrr |
| 27849 | { 19307, 7, 1, 0, 843, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3b8024819ULL }, // Inst #19307 = VPSLLVQrm |
| 27850 | { 19306, 4, 1, 0, 556, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeea3f8024829ULL }, // Inst #19306 = VPSLLVQZrrkz |
| 27851 | { 19305, 5, 1, 0, 556, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeaa3f8024829ULL }, // Inst #19305 = VPSLLVQZrrk |
| 27852 | { 19304, 3, 1, 0, 556, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8a3f8024829ULL }, // Inst #19304 = VPSLLVQZrr |
| 27853 | { 19303, 8, 1, 0, 555, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea3f8024819ULL }, // Inst #19303 = VPSLLVQZrmkz |
| 27854 | { 19302, 9, 1, 0, 555, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa3f8024819ULL }, // Inst #19302 = VPSLLVQZrmk |
| 27855 | { 19301, 8, 1, 0, 555, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ea3f8024819ULL }, // Inst #19301 = VPSLLVQZrmbkz |
| 27856 | { 19300, 9, 1, 0, 555, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aa3f8024819ULL }, // Inst #19300 = VPSLLVQZrmbk |
| 27857 | { 19299, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98a3f8024819ULL }, // Inst #19299 = VPSLLVQZrmb |
| 27858 | { 19298, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a3f8024819ULL }, // Inst #19298 = VPSLLVQZrm |
| 27859 | { 19297, 4, 1, 0, 554, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc7a3f8024829ULL }, // Inst #19297 = VPSLLVQZ256rrkz |
| 27860 | { 19296, 5, 1, 0, 554, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3a3f8024829ULL }, // Inst #19296 = VPSLLVQZ256rrk |
| 27861 | { 19295, 3, 1, 0, 554, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1a3f8024829ULL }, // Inst #19295 = VPSLLVQZ256rr |
| 27862 | { 19294, 8, 1, 0, 553, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a3f8024819ULL }, // Inst #19294 = VPSLLVQZ256rmkz |
| 27863 | { 19293, 9, 1, 0, 553, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a3f8024819ULL }, // Inst #19293 = VPSLLVQZ256rmk |
| 27864 | { 19292, 8, 1, 0, 553, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97a3f8024819ULL }, // Inst #19292 = VPSLLVQZ256rmbkz |
| 27865 | { 19291, 9, 1, 0, 553, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93a3f8024819ULL }, // Inst #19291 = VPSLLVQZ256rmbk |
| 27866 | { 19290, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91a3f8024819ULL }, // Inst #19290 = VPSLLVQZ256rmb |
| 27867 | { 19289, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a3f8024819ULL }, // Inst #19289 = VPSLLVQZ256rm |
| 27868 | { 19288, 4, 1, 0, 552, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6a3f8024829ULL }, // Inst #19288 = VPSLLVQZ128rrkz |
| 27869 | { 19287, 5, 1, 0, 552, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2a3f8024829ULL }, // Inst #19287 = VPSLLVQZ128rrk |
| 27870 | { 19286, 3, 1, 0, 552, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0a3f8024829ULL }, // Inst #19286 = VPSLLVQZ128rr |
| 27871 | { 19285, 8, 1, 0, 551, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a3f8024819ULL }, // Inst #19285 = VPSLLVQZ128rmkz |
| 27872 | { 19284, 9, 1, 0, 551, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a3f8024819ULL }, // Inst #19284 = VPSLLVQZ128rmk |
| 27873 | { 19283, 8, 1, 0, 551, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96a3f8024819ULL }, // Inst #19283 = VPSLLVQZ128rmbkz |
| 27874 | { 19282, 9, 1, 0, 551, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92a3f8024819ULL }, // Inst #19282 = VPSLLVQZ128rmbk |
| 27875 | { 19281, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90a3f8024819ULL }, // Inst #19281 = VPSLLVQZ128rmb |
| 27876 | { 19280, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a3f8024819ULL }, // Inst #19280 = VPSLLVQZ128rm |
| 27877 | { 19279, 3, 1, 0, 835, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1a3b8024829ULL }, // Inst #19279 = VPSLLVQYrr |
| 27878 | { 19278, 7, 1, 0, 844, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a3b8024819ULL }, // Inst #19278 = VPSLLVQYrm |
| 27879 | { 19277, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xa3b8004829ULL }, // Inst #19277 = VPSLLVDrr |
| 27880 | { 19276, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3b8004819ULL }, // Inst #19276 = VPSLLVDrm |
| 27881 | { 19275, 4, 1, 0, 556, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeea3f8004829ULL }, // Inst #19275 = VPSLLVDZrrkz |
| 27882 | { 19274, 5, 1, 0, 556, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaa3f8004829ULL }, // Inst #19274 = VPSLLVDZrrk |
| 27883 | { 19273, 3, 1, 0, 556, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8a3f8004829ULL }, // Inst #19273 = VPSLLVDZrr |
| 27884 | { 19272, 8, 1, 0, 555, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea3f8004819ULL }, // Inst #19272 = VPSLLVDZrmkz |
| 27885 | { 19271, 9, 1, 0, 555, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa3f8004819ULL }, // Inst #19271 = VPSLLVDZrmk |
| 27886 | { 19270, 8, 1, 0, 555, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea3f8004819ULL }, // Inst #19270 = VPSLLVDZrmbkz |
| 27887 | { 19269, 9, 1, 0, 555, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa3f8004819ULL }, // Inst #19269 = VPSLLVDZrmbk |
| 27888 | { 19268, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a3f8004819ULL }, // Inst #19268 = VPSLLVDZrmb |
| 27889 | { 19267, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a3f8004819ULL }, // Inst #19267 = VPSLLVDZrm |
| 27890 | { 19266, 4, 1, 0, 554, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc7a3f8004829ULL }, // Inst #19266 = VPSLLVDZ256rrkz |
| 27891 | { 19265, 5, 1, 0, 554, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3a3f8004829ULL }, // Inst #19265 = VPSLLVDZ256rrk |
| 27892 | { 19264, 3, 1, 0, 554, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1a3f8004829ULL }, // Inst #19264 = VPSLLVDZ256rr |
| 27893 | { 19263, 8, 1, 0, 553, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a3f8004819ULL }, // Inst #19263 = VPSLLVDZ256rmkz |
| 27894 | { 19262, 9, 1, 0, 553, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a3f8004819ULL }, // Inst #19262 = VPSLLVDZ256rmk |
| 27895 | { 19261, 8, 1, 0, 553, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a3f8004819ULL }, // Inst #19261 = VPSLLVDZ256rmbkz |
| 27896 | { 19260, 9, 1, 0, 553, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a3f8004819ULL }, // Inst #19260 = VPSLLVDZ256rmbk |
| 27897 | { 19259, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a3f8004819ULL }, // Inst #19259 = VPSLLVDZ256rmb |
| 27898 | { 19258, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a3f8004819ULL }, // Inst #19258 = VPSLLVDZ256rm |
| 27899 | { 19257, 4, 1, 0, 552, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6a3f8004829ULL }, // Inst #19257 = VPSLLVDZ128rrkz |
| 27900 | { 19256, 5, 1, 0, 552, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2a3f8004829ULL }, // Inst #19256 = VPSLLVDZ128rrk |
| 27901 | { 19255, 3, 1, 0, 552, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0a3f8004829ULL }, // Inst #19255 = VPSLLVDZ128rr |
| 27902 | { 19254, 8, 1, 0, 551, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a3f8004819ULL }, // Inst #19254 = VPSLLVDZ128rmkz |
| 27903 | { 19253, 9, 1, 0, 551, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a3f8004819ULL }, // Inst #19253 = VPSLLVDZ128rmk |
| 27904 | { 19252, 8, 1, 0, 551, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a3f8004819ULL }, // Inst #19252 = VPSLLVDZ128rmbkz |
| 27905 | { 19251, 9, 1, 0, 551, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a3f8004819ULL }, // Inst #19251 = VPSLLVDZ128rmbk |
| 27906 | { 19250, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a3f8004819ULL }, // Inst #19250 = VPSLLVDZ128rmb |
| 27907 | { 19249, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a3f8004819ULL }, // Inst #19249 = VPSLLVDZ128rm |
| 27908 | { 19248, 3, 1, 0, 554, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1a3b8004829ULL }, // Inst #19248 = VPSLLVDYrr |
| 27909 | { 19247, 7, 1, 0, 553, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a3b8004819ULL }, // Inst #19247 = VPSLLVDYrm |
| 27910 | { 19246, 3, 1, 0, 1085, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xf9b8002829ULL }, // Inst #19246 = VPSLLQrr |
| 27911 | { 19245, 7, 1, 0, 285, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9b8002819ULL }, // Inst #19245 = VPSLLQrm |
| 27912 | { 19244, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0xb9b8042836ULL }, // Inst #19244 = VPSLLQri |
| 27913 | { 19243, 4, 1, 0, 1087, 0, 0, 5809, X86ImpOpBase + 0, 0, 0xaef9f8022829ULL }, // Inst #19243 = VPSLLQZrrkz |
| 27914 | { 19242, 5, 1, 0, 1087, 0, 0, 5804, X86ImpOpBase + 0, 0, 0xaaf9f8022829ULL }, // Inst #19242 = VPSLLQZrrk |
| 27915 | { 19241, 3, 1, 0, 1087, 0, 0, 5783, X86ImpOpBase + 0, 0, 0xa8f9f8022829ULL }, // Inst #19241 = VPSLLQZrr |
| 27916 | { 19240, 8, 1, 0, 565, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaef9f8022819ULL }, // Inst #19240 = VPSLLQZrmkz |
| 27917 | { 19239, 9, 1, 0, 565, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaaf9f8022819ULL }, // Inst #19239 = VPSLLQZrmk |
| 27918 | { 19238, 7, 1, 0, 565, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8f9f8022819ULL }, // Inst #19238 = VPSLLQZrm |
| 27919 | { 19237, 4, 1, 0, 1103, 0, 0, 4605, X86ImpOpBase + 0, 0, 0xeeb9f8062836ULL }, // Inst #19237 = VPSLLQZrikz |
| 27920 | { 19236, 5, 1, 0, 1103, 0, 0, 4600, X86ImpOpBase + 0, 0, 0xeab9f8062836ULL }, // Inst #19236 = VPSLLQZrik |
| 27921 | { 19235, 3, 1, 0, 1103, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b9f8062836ULL }, // Inst #19235 = VPSLLQZri |
| 27922 | { 19234, 8, 1, 0, 549, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8062826ULL }, // Inst #19234 = VPSLLQZmikz |
| 27923 | { 19233, 9, 1, 0, 549, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab9f8062826ULL }, // Inst #19233 = VPSLLQZmik |
| 27924 | { 19232, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8062826ULL }, // Inst #19232 = VPSLLQZmi |
| 27925 | { 19231, 8, 1, 0, 549, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb9f8062826ULL }, // Inst #19231 = VPSLLQZmbikz |
| 27926 | { 19230, 9, 1, 0, 549, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab9f8062826ULL }, // Inst #19230 = VPSLLQZmbik |
| 27927 | { 19229, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b9f8062826ULL }, // Inst #19229 = VPSLLQZmbi |
| 27928 | { 19228, 4, 1, 0, 1086, 0, 0, 5800, X86ImpOpBase + 0, 0, 0xa7f9f8022829ULL }, // Inst #19228 = VPSLLQZ256rrkz |
| 27929 | { 19227, 5, 1, 0, 1086, 0, 0, 5795, X86ImpOpBase + 0, 0, 0xa3f9f8022829ULL }, // Inst #19227 = VPSLLQZ256rrk |
| 27930 | { 19226, 3, 1, 0, 1086, 0, 0, 5771, X86ImpOpBase + 0, 0, 0xa1f9f8022829ULL }, // Inst #19226 = VPSLLQZ256rr |
| 27931 | { 19225, 8, 1, 0, 563, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa7f9f8022819ULL }, // Inst #19225 = VPSLLQZ256rmkz |
| 27932 | { 19224, 9, 1, 0, 563, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3f9f8022819ULL }, // Inst #19224 = VPSLLQZ256rmk |
| 27933 | { 19223, 7, 1, 0, 563, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa1f9f8022819ULL }, // Inst #19223 = VPSLLQZ256rm |
| 27934 | { 19222, 4, 1, 0, 1102, 0, 0, 4579, X86ImpOpBase + 0, 0, 0xc7b9f8062836ULL }, // Inst #19222 = VPSLLQZ256rikz |
| 27935 | { 19221, 5, 1, 0, 1102, 0, 0, 4574, X86ImpOpBase + 0, 0, 0xc3b9f8062836ULL }, // Inst #19221 = VPSLLQZ256rik |
| 27936 | { 19220, 3, 1, 0, 1102, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b9f8062836ULL }, // Inst #19220 = VPSLLQZ256ri |
| 27937 | { 19219, 8, 1, 0, 547, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8062826ULL }, // Inst #19219 = VPSLLQZ256mikz |
| 27938 | { 19218, 9, 1, 0, 547, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8062826ULL }, // Inst #19218 = VPSLLQZ256mik |
| 27939 | { 19217, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8062826ULL }, // Inst #19217 = VPSLLQZ256mi |
| 27940 | { 19216, 8, 1, 0, 547, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b9f8062826ULL }, // Inst #19216 = VPSLLQZ256mbikz |
| 27941 | { 19215, 9, 1, 0, 547, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b9f8062826ULL }, // Inst #19215 = VPSLLQZ256mbik |
| 27942 | { 19214, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b9f8062826ULL }, // Inst #19214 = VPSLLQZ256mbi |
| 27943 | { 19213, 4, 1, 0, 1085, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6f9f8022829ULL }, // Inst #19213 = VPSLLQZ128rrkz |
| 27944 | { 19212, 5, 1, 0, 1085, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2f9f8022829ULL }, // Inst #19212 = VPSLLQZ128rrk |
| 27945 | { 19211, 3, 1, 0, 1085, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0f9f8022829ULL }, // Inst #19211 = VPSLLQZ128rr |
| 27946 | { 19210, 8, 1, 0, 285, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f9f8022819ULL }, // Inst #19210 = VPSLLQZ128rmkz |
| 27947 | { 19209, 9, 1, 0, 285, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f9f8022819ULL }, // Inst #19209 = VPSLLQZ128rmk |
| 27948 | { 19208, 7, 1, 0, 285, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f9f8022819ULL }, // Inst #19208 = VPSLLQZ128rm |
| 27949 | { 19207, 4, 1, 0, 1101, 0, 0, 4553, X86ImpOpBase + 0, 0, 0xa6b9f8062836ULL }, // Inst #19207 = VPSLLQZ128rikz |
| 27950 | { 19206, 5, 1, 0, 1101, 0, 0, 4548, X86ImpOpBase + 0, 0, 0xa2b9f8062836ULL }, // Inst #19206 = VPSLLQZ128rik |
| 27951 | { 19205, 3, 1, 0, 1101, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b9f8062836ULL }, // Inst #19205 = VPSLLQZ128ri |
| 27952 | { 19204, 8, 1, 0, 546, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8062826ULL }, // Inst #19204 = VPSLLQZ128mikz |
| 27953 | { 19203, 9, 1, 0, 546, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8062826ULL }, // Inst #19203 = VPSLLQZ128mik |
| 27954 | { 19202, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8062826ULL }, // Inst #19202 = VPSLLQZ128mi |
| 27955 | { 19201, 8, 1, 0, 546, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b9f8062826ULL }, // Inst #19201 = VPSLLQZ128mbikz |
| 27956 | { 19200, 9, 1, 0, 546, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b9f8062826ULL }, // Inst #19200 = VPSLLQZ128mbik |
| 27957 | { 19199, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b9f8062826ULL }, // Inst #19199 = VPSLLQZ128mbi |
| 27958 | { 19198, 3, 1, 0, 1086, 0, 0, 5768, X86ImpOpBase + 0, 0, 0x1f9b8002829ULL }, // Inst #19198 = VPSLLQYrr |
| 27959 | { 19197, 7, 1, 0, 563, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f9b8002819ULL }, // Inst #19197 = VPSLLQYrm |
| 27960 | { 19196, 3, 1, 0, 548, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x1b9b8042836ULL }, // Inst #19196 = VPSLLQYri |
| 27961 | { 19195, 3, 1, 0, 1085, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xf938002829ULL }, // Inst #19195 = VPSLLDrr |
| 27962 | { 19194, 7, 1, 0, 285, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf938002819ULL }, // Inst #19194 = VPSLLDrm |
| 27963 | { 19193, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0xb938042836ULL }, // Inst #19193 = VPSLLDri |
| 27964 | { 19192, 4, 1, 0, 1087, 0, 0, 5791, X86ImpOpBase + 0, 0, 0xaef978002829ULL }, // Inst #19192 = VPSLLDZrrkz |
| 27965 | { 19191, 5, 1, 0, 1087, 0, 0, 5786, X86ImpOpBase + 0, 0, 0xaaf978002829ULL }, // Inst #19191 = VPSLLDZrrk |
| 27966 | { 19190, 3, 1, 0, 1087, 0, 0, 5783, X86ImpOpBase + 0, 0, 0xa8f978002829ULL }, // Inst #19190 = VPSLLDZrr |
| 27967 | { 19189, 8, 1, 0, 565, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaef978002819ULL }, // Inst #19189 = VPSLLDZrmkz |
| 27968 | { 19188, 9, 1, 0, 565, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaaf978002819ULL }, // Inst #19188 = VPSLLDZrmk |
| 27969 | { 19187, 7, 1, 0, 565, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8f978002819ULL }, // Inst #19187 = VPSLLDZrm |
| 27970 | { 19186, 4, 1, 0, 1103, 0, 0, 4674, X86ImpOpBase + 0, 0, 0xeeb978042836ULL }, // Inst #19186 = VPSLLDZrikz |
| 27971 | { 19185, 5, 1, 0, 1103, 0, 0, 4669, X86ImpOpBase + 0, 0, 0xeab978042836ULL }, // Inst #19185 = VPSLLDZrik |
| 27972 | { 19184, 3, 1, 0, 1103, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b978042836ULL }, // Inst #19184 = VPSLLDZri |
| 27973 | { 19183, 8, 1, 0, 549, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb978042826ULL }, // Inst #19183 = VPSLLDZmikz |
| 27974 | { 19182, 9, 1, 0, 549, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab978042826ULL }, // Inst #19182 = VPSLLDZmik |
| 27975 | { 19181, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b978042826ULL }, // Inst #19181 = VPSLLDZmi |
| 27976 | { 19180, 8, 1, 0, 549, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb978042826ULL }, // Inst #19180 = VPSLLDZmbikz |
| 27977 | { 19179, 9, 1, 0, 549, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab978042826ULL }, // Inst #19179 = VPSLLDZmbik |
| 27978 | { 19178, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b978042826ULL }, // Inst #19178 = VPSLLDZmbi |
| 27979 | { 19177, 4, 1, 0, 1086, 0, 0, 5779, X86ImpOpBase + 0, 0, 0xa7f978002829ULL }, // Inst #19177 = VPSLLDZ256rrkz |
| 27980 | { 19176, 5, 1, 0, 1086, 0, 0, 5774, X86ImpOpBase + 0, 0, 0xa3f978002829ULL }, // Inst #19176 = VPSLLDZ256rrk |
| 27981 | { 19175, 3, 1, 0, 1086, 0, 0, 5771, X86ImpOpBase + 0, 0, 0xa1f978002829ULL }, // Inst #19175 = VPSLLDZ256rr |
| 27982 | { 19174, 8, 1, 0, 563, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa7f978002819ULL }, // Inst #19174 = VPSLLDZ256rmkz |
| 27983 | { 19173, 9, 1, 0, 563, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa3f978002819ULL }, // Inst #19173 = VPSLLDZ256rmk |
| 27984 | { 19172, 7, 1, 0, 563, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa1f978002819ULL }, // Inst #19172 = VPSLLDZ256rm |
| 27985 | { 19171, 4, 1, 0, 1102, 0, 0, 4648, X86ImpOpBase + 0, 0, 0xc7b978042836ULL }, // Inst #19171 = VPSLLDZ256rikz |
| 27986 | { 19170, 5, 1, 0, 1102, 0, 0, 4643, X86ImpOpBase + 0, 0, 0xc3b978042836ULL }, // Inst #19170 = VPSLLDZ256rik |
| 27987 | { 19169, 3, 1, 0, 1102, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b978042836ULL }, // Inst #19169 = VPSLLDZ256ri |
| 27988 | { 19168, 8, 1, 0, 547, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b978042826ULL }, // Inst #19168 = VPSLLDZ256mikz |
| 27989 | { 19167, 9, 1, 0, 547, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b978042826ULL }, // Inst #19167 = VPSLLDZ256mik |
| 27990 | { 19166, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b978042826ULL }, // Inst #19166 = VPSLLDZ256mi |
| 27991 | { 19165, 8, 1, 0, 547, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b978042826ULL }, // Inst #19165 = VPSLLDZ256mbikz |
| 27992 | { 19164, 9, 1, 0, 547, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b978042826ULL }, // Inst #19164 = VPSLLDZ256mbik |
| 27993 | { 19163, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b978042826ULL }, // Inst #19163 = VPSLLDZ256mbi |
| 27994 | { 19162, 4, 1, 0, 1085, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6f978002829ULL }, // Inst #19162 = VPSLLDZ128rrkz |
| 27995 | { 19161, 5, 1, 0, 1085, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2f978002829ULL }, // Inst #19161 = VPSLLDZ128rrk |
| 27996 | { 19160, 3, 1, 0, 1085, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0f978002829ULL }, // Inst #19160 = VPSLLDZ128rr |
| 27997 | { 19159, 8, 1, 0, 285, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f978002819ULL }, // Inst #19159 = VPSLLDZ128rmkz |
| 27998 | { 19158, 9, 1, 0, 285, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f978002819ULL }, // Inst #19158 = VPSLLDZ128rmk |
| 27999 | { 19157, 7, 1, 0, 285, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f978002819ULL }, // Inst #19157 = VPSLLDZ128rm |
| 28000 | { 19156, 4, 1, 0, 1101, 0, 0, 3316, X86ImpOpBase + 0, 0, 0xa6b978042836ULL }, // Inst #19156 = VPSLLDZ128rikz |
| 28001 | { 19155, 5, 1, 0, 1101, 0, 0, 3311, X86ImpOpBase + 0, 0, 0xa2b978042836ULL }, // Inst #19155 = VPSLLDZ128rik |
| 28002 | { 19154, 3, 1, 0, 1101, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b978042836ULL }, // Inst #19154 = VPSLLDZ128ri |
| 28003 | { 19153, 8, 1, 0, 546, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b978042826ULL }, // Inst #19153 = VPSLLDZ128mikz |
| 28004 | { 19152, 9, 1, 0, 546, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b978042826ULL }, // Inst #19152 = VPSLLDZ128mik |
| 28005 | { 19151, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b978042826ULL }, // Inst #19151 = VPSLLDZ128mi |
| 28006 | { 19150, 8, 1, 0, 546, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b978042826ULL }, // Inst #19150 = VPSLLDZ128mbikz |
| 28007 | { 19149, 9, 1, 0, 546, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b978042826ULL }, // Inst #19149 = VPSLLDZ128mbik |
| 28008 | { 19148, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b978042826ULL }, // Inst #19148 = VPSLLDZ128mbi |
| 28009 | { 19147, 3, 1, 0, 1086, 0, 0, 5768, X86ImpOpBase + 0, 0, 0x1f938002829ULL }, // Inst #19147 = VPSLLDYrr |
| 28010 | { 19146, 7, 1, 0, 563, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f938002819ULL }, // Inst #19146 = VPSLLDYrm |
| 28011 | { 19145, 3, 1, 0, 548, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x1b938042836ULL }, // Inst #19145 = VPSLLDYri |
| 28012 | { 19144, 3, 1, 0, 1089, 0, 0, 566, X86ImpOpBase + 0, 0, 0xb9b8042837ULL }, // Inst #19144 = VPSLLDQri |
| 28013 | { 19143, 3, 1, 0, 1090, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b9f0042837ULL }, // Inst #19143 = VPSLLDQZri |
| 28014 | { 19142, 7, 1, 0, 347, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b9f0042827ULL }, // Inst #19142 = VPSLLDQZmi |
| 28015 | { 19141, 3, 1, 0, 1088, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b9f0042837ULL }, // Inst #19141 = VPSLLDQZ256ri |
| 28016 | { 19140, 7, 1, 0, 345, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b9f0042827ULL }, // Inst #19140 = VPSLLDQZ256mi |
| 28017 | { 19139, 3, 1, 0, 251, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b9f0042837ULL }, // Inst #19139 = VPSLLDQZ128ri |
| 28018 | { 19138, 7, 1, 0, 250, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b9f0042827ULL }, // Inst #19138 = VPSLLDQZ128mi |
| 28019 | { 19137, 3, 1, 0, 1088, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x1b9b8042837ULL }, // Inst #19137 = VPSLLDQYri |
| 28020 | { 19136, 3, 1, 0, 1034, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x84b8004829ULL }, // Inst #19136 = VPSIGNWrr |
| 28021 | { 19135, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84b8004819ULL }, // Inst #19135 = VPSIGNWrm |
| 28022 | { 19134, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x184b8004829ULL }, // Inst #19134 = VPSIGNWYrr |
| 28023 | { 19133, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x184b8004819ULL }, // Inst #19133 = VPSIGNWYrm |
| 28024 | { 19132, 3, 1, 0, 1034, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8538004829ULL }, // Inst #19132 = VPSIGNDrr |
| 28025 | { 19131, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8538004819ULL }, // Inst #19131 = VPSIGNDrm |
| 28026 | { 19130, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18538004829ULL }, // Inst #19130 = VPSIGNDYrr |
| 28027 | { 19129, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18538004819ULL }, // Inst #19129 = VPSIGNDYrm |
| 28028 | { 19128, 3, 1, 0, 1034, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8438004829ULL }, // Inst #19128 = VPSIGNBrr |
| 28029 | { 19127, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8438004819ULL }, // Inst #19127 = VPSIGNBrm |
| 28030 | { 19126, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18438004829ULL }, // Inst #19126 = VPSIGNBYrr |
| 28031 | { 19125, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18438004819ULL }, // Inst #19125 = VPSIGNBYrm |
| 28032 | { 19124, 3, 1, 0, 251, 0, 0, 566, X86ImpOpBase + 0, 0, 0x3838043829ULL }, // Inst #19124 = VPSHUFLWri |
| 28033 | { 19123, 7, 1, 0, 1671, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3838043819ULL }, // Inst #19123 = VPSHUFLWmi |
| 28034 | { 19122, 4, 1, 0, 348, 0, 0, 4527, X86ImpOpBase + 0, 0, 0xee3878043829ULL }, // Inst #19122 = VPSHUFLWZrikz |
| 28035 | { 19121, 5, 1, 0, 348, 0, 0, 4522, X86ImpOpBase + 0, 0, 0xea3878043829ULL }, // Inst #19121 = VPSHUFLWZrik |
| 28036 | { 19120, 3, 1, 0, 1806, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe83878043829ULL }, // Inst #19120 = VPSHUFLWZri |
| 28037 | { 19119, 8, 1, 0, 1951, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3878043819ULL }, // Inst #19119 = VPSHUFLWZmikz |
| 28038 | { 19118, 9, 1, 0, 1951, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3878043819ULL }, // Inst #19118 = VPSHUFLWZmik |
| 28039 | { 19117, 7, 1, 0, 562, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83878043819ULL }, // Inst #19117 = VPSHUFLWZmi |
| 28040 | { 19116, 4, 1, 0, 1703, 0, 0, 4491, X86ImpOpBase + 0, 0, 0xc73878043829ULL }, // Inst #19116 = VPSHUFLWZ256rikz |
| 28041 | { 19115, 5, 1, 0, 1703, 0, 0, 4486, X86ImpOpBase + 0, 0, 0xc33878043829ULL }, // Inst #19115 = VPSHUFLWZ256rik |
| 28042 | { 19114, 3, 1, 0, 346, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc13878043829ULL }, // Inst #19114 = VPSHUFLWZ256ri |
| 28043 | { 19113, 8, 1, 0, 1933, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73878043819ULL }, // Inst #19113 = VPSHUFLWZ256mikz |
| 28044 | { 19112, 9, 1, 0, 1933, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33878043819ULL }, // Inst #19112 = VPSHUFLWZ256mik |
| 28045 | { 19111, 7, 1, 0, 365, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13878043819ULL }, // Inst #19111 = VPSHUFLWZ256mi |
| 28046 | { 19110, 4, 1, 0, 1702, 0, 0, 4455, X86ImpOpBase + 0, 0, 0xa63878043829ULL }, // Inst #19110 = VPSHUFLWZ128rikz |
| 28047 | { 19109, 5, 1, 0, 1702, 0, 0, 4450, X86ImpOpBase + 0, 0, 0xa23878043829ULL }, // Inst #19109 = VPSHUFLWZ128rik |
| 28048 | { 19108, 3, 1, 0, 251, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa03878043829ULL }, // Inst #19108 = VPSHUFLWZ128ri |
| 28049 | { 19107, 8, 1, 0, 1932, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63878043819ULL }, // Inst #19107 = VPSHUFLWZ128mikz |
| 28050 | { 19106, 9, 1, 0, 1932, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23878043819ULL }, // Inst #19106 = VPSHUFLWZ128mik |
| 28051 | { 19105, 7, 1, 0, 274, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03878043819ULL }, // Inst #19105 = VPSHUFLWZ128mi |
| 28052 | { 19104, 3, 1, 0, 346, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x13838043829ULL }, // Inst #19104 = VPSHUFLWYri |
| 28053 | { 19103, 7, 1, 0, 1685, 0, 0, 5609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x13838043819ULL }, // Inst #19103 = VPSHUFLWYmi |
| 28054 | { 19102, 3, 1, 0, 251, 0, 0, 566, X86ImpOpBase + 0, 0, 0x3838043029ULL }, // Inst #19102 = VPSHUFHWri |
| 28055 | { 19101, 7, 1, 0, 1671, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3838043019ULL }, // Inst #19101 = VPSHUFHWmi |
| 28056 | { 19100, 4, 1, 0, 348, 0, 0, 4527, X86ImpOpBase + 0, 0, 0xee3878043029ULL }, // Inst #19100 = VPSHUFHWZrikz |
| 28057 | { 19099, 5, 1, 0, 348, 0, 0, 4522, X86ImpOpBase + 0, 0, 0xea3878043029ULL }, // Inst #19099 = VPSHUFHWZrik |
| 28058 | { 19098, 3, 1, 0, 1806, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe83878043029ULL }, // Inst #19098 = VPSHUFHWZri |
| 28059 | { 19097, 8, 1, 0, 1951, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3878043019ULL }, // Inst #19097 = VPSHUFHWZmikz |
| 28060 | { 19096, 9, 1, 0, 1951, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3878043019ULL }, // Inst #19096 = VPSHUFHWZmik |
| 28061 | { 19095, 7, 1, 0, 562, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83878043019ULL }, // Inst #19095 = VPSHUFHWZmi |
| 28062 | { 19094, 4, 1, 0, 1703, 0, 0, 4491, X86ImpOpBase + 0, 0, 0xc73878043029ULL }, // Inst #19094 = VPSHUFHWZ256rikz |
| 28063 | { 19093, 5, 1, 0, 1703, 0, 0, 4486, X86ImpOpBase + 0, 0, 0xc33878043029ULL }, // Inst #19093 = VPSHUFHWZ256rik |
| 28064 | { 19092, 3, 1, 0, 346, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc13878043029ULL }, // Inst #19092 = VPSHUFHWZ256ri |
| 28065 | { 19091, 8, 1, 0, 1933, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73878043019ULL }, // Inst #19091 = VPSHUFHWZ256mikz |
| 28066 | { 19090, 9, 1, 0, 1933, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33878043019ULL }, // Inst #19090 = VPSHUFHWZ256mik |
| 28067 | { 19089, 7, 1, 0, 365, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13878043019ULL }, // Inst #19089 = VPSHUFHWZ256mi |
| 28068 | { 19088, 4, 1, 0, 1702, 0, 0, 4455, X86ImpOpBase + 0, 0, 0xa63878043029ULL }, // Inst #19088 = VPSHUFHWZ128rikz |
| 28069 | { 19087, 5, 1, 0, 1702, 0, 0, 4450, X86ImpOpBase + 0, 0, 0xa23878043029ULL }, // Inst #19087 = VPSHUFHWZ128rik |
| 28070 | { 19086, 3, 1, 0, 251, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa03878043029ULL }, // Inst #19086 = VPSHUFHWZ128ri |
| 28071 | { 19085, 8, 1, 0, 1932, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63878043019ULL }, // Inst #19085 = VPSHUFHWZ128mikz |
| 28072 | { 19084, 9, 1, 0, 1932, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23878043019ULL }, // Inst #19084 = VPSHUFHWZ128mik |
| 28073 | { 19083, 7, 1, 0, 274, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03878043019ULL }, // Inst #19083 = VPSHUFHWZ128mi |
| 28074 | { 19082, 3, 1, 0, 346, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x13838043029ULL }, // Inst #19082 = VPSHUFHWYri |
| 28075 | { 19081, 7, 1, 0, 1685, 0, 0, 5609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x13838043019ULL }, // Inst #19081 = VPSHUFHWYmi |
| 28076 | { 19080, 3, 1, 0, 251, 0, 0, 566, X86ImpOpBase + 0, 0, 0x3838042829ULL }, // Inst #19080 = VPSHUFDri |
| 28077 | { 19079, 7, 1, 0, 1671, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3838042819ULL }, // Inst #19079 = VPSHUFDmi |
| 28078 | { 19078, 4, 1, 0, 1806, 0, 0, 4674, X86ImpOpBase + 0, 0, 0xee3878042829ULL }, // Inst #19078 = VPSHUFDZrikz |
| 28079 | { 19077, 5, 1, 0, 1806, 0, 0, 4669, X86ImpOpBase + 0, 0, 0xea3878042829ULL }, // Inst #19077 = VPSHUFDZrik |
| 28080 | { 19076, 3, 1, 0, 1806, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe83878042829ULL }, // Inst #19076 = VPSHUFDZri |
| 28081 | { 19075, 8, 1, 0, 562, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3878042819ULL }, // Inst #19075 = VPSHUFDZmikz |
| 28082 | { 19074, 9, 1, 0, 562, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3878042819ULL }, // Inst #19074 = VPSHUFDZmik |
| 28083 | { 19073, 7, 1, 0, 562, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83878042819ULL }, // Inst #19073 = VPSHUFDZmi |
| 28084 | { 19072, 8, 1, 0, 562, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e3878042819ULL }, // Inst #19072 = VPSHUFDZmbikz |
| 28085 | { 19071, 9, 1, 0, 562, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a3878042819ULL }, // Inst #19071 = VPSHUFDZmbik |
| 28086 | { 19070, 7, 1, 0, 562, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x783878042819ULL }, // Inst #19070 = VPSHUFDZmbi |
| 28087 | { 19069, 4, 1, 0, 346, 0, 0, 4648, X86ImpOpBase + 0, 0, 0xc73878042829ULL }, // Inst #19069 = VPSHUFDZ256rikz |
| 28088 | { 19068, 5, 1, 0, 346, 0, 0, 4643, X86ImpOpBase + 0, 0, 0xc33878042829ULL }, // Inst #19068 = VPSHUFDZ256rik |
| 28089 | { 19067, 3, 1, 0, 346, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc13878042829ULL }, // Inst #19067 = VPSHUFDZ256ri |
| 28090 | { 19066, 8, 1, 0, 365, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73878042819ULL }, // Inst #19066 = VPSHUFDZ256mikz |
| 28091 | { 19065, 9, 1, 0, 365, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33878042819ULL }, // Inst #19065 = VPSHUFDZ256mik |
| 28092 | { 19064, 7, 1, 0, 365, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13878042819ULL }, // Inst #19064 = VPSHUFDZ256mi |
| 28093 | { 19063, 8, 1, 0, 365, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x773878042819ULL }, // Inst #19063 = VPSHUFDZ256mbikz |
| 28094 | { 19062, 9, 1, 0, 365, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x733878042819ULL }, // Inst #19062 = VPSHUFDZ256mbik |
| 28095 | { 19061, 7, 1, 0, 365, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x713878042819ULL }, // Inst #19061 = VPSHUFDZ256mbi |
| 28096 | { 19060, 4, 1, 0, 251, 0, 0, 3316, X86ImpOpBase + 0, 0, 0xa63878042829ULL }, // Inst #19060 = VPSHUFDZ128rikz |
| 28097 | { 19059, 5, 1, 0, 251, 0, 0, 3311, X86ImpOpBase + 0, 0, 0xa23878042829ULL }, // Inst #19059 = VPSHUFDZ128rik |
| 28098 | { 19058, 3, 1, 0, 251, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa03878042829ULL }, // Inst #19058 = VPSHUFDZ128ri |
| 28099 | { 19057, 8, 1, 0, 274, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63878042819ULL }, // Inst #19057 = VPSHUFDZ128mikz |
| 28100 | { 19056, 9, 1, 0, 274, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23878042819ULL }, // Inst #19056 = VPSHUFDZ128mik |
| 28101 | { 19055, 7, 1, 0, 274, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03878042819ULL }, // Inst #19055 = VPSHUFDZ128mi |
| 28102 | { 19054, 8, 1, 0, 274, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x763878042819ULL }, // Inst #19054 = VPSHUFDZ128mbikz |
| 28103 | { 19053, 9, 1, 0, 274, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x723878042819ULL }, // Inst #19053 = VPSHUFDZ128mbik |
| 28104 | { 19052, 7, 1, 0, 274, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x703878042819ULL }, // Inst #19052 = VPSHUFDZ128mbi |
| 28105 | { 19051, 3, 1, 0, 346, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x13838042829ULL }, // Inst #19051 = VPSHUFDYri |
| 28106 | { 19050, 7, 1, 0, 1685, 0, 0, 5609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x13838042819ULL }, // Inst #19050 = VPSHUFDYmi |
| 28107 | { 19049, 3, 1, 0, 283, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8038004829ULL }, // Inst #19049 = VPSHUFBrr |
| 28108 | { 19048, 7, 1, 0, 282, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8038004819ULL }, // Inst #19048 = VPSHUFBrm |
| 28109 | { 19047, 4, 1, 0, 1093, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xee8078004829ULL }, // Inst #19047 = VPSHUFBZrrkz |
| 28110 | { 19046, 5, 1, 0, 1093, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xea8078004829ULL }, // Inst #19046 = VPSHUFBZrrk |
| 28111 | { 19045, 3, 1, 0, 1807, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88078004829ULL }, // Inst #19045 = VPSHUFBZrr |
| 28112 | { 19044, 8, 1, 0, 560, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8078004819ULL }, // Inst #19044 = VPSHUFBZrmkz |
| 28113 | { 19043, 9, 1, 0, 560, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8078004819ULL }, // Inst #19043 = VPSHUFBZrmk |
| 28114 | { 19042, 7, 1, 0, 1842, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88078004819ULL }, // Inst #19042 = VPSHUFBZrm |
| 28115 | { 19041, 4, 1, 0, 1701, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc78078004829ULL }, // Inst #19041 = VPSHUFBZ256rrkz |
| 28116 | { 19040, 5, 1, 0, 1701, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc38078004829ULL }, // Inst #19040 = VPSHUFBZ256rrk |
| 28117 | { 19039, 3, 1, 0, 1091, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18078004829ULL }, // Inst #19039 = VPSHUFBZ256rr |
| 28118 | { 19038, 8, 1, 0, 1935, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78078004819ULL }, // Inst #19038 = VPSHUFBZ256rmkz |
| 28119 | { 19037, 9, 1, 0, 1935, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38078004819ULL }, // Inst #19037 = VPSHUFBZ256rmk |
| 28120 | { 19036, 7, 1, 0, 558, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18078004819ULL }, // Inst #19036 = VPSHUFBZ256rm |
| 28121 | { 19035, 4, 1, 0, 1700, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa68078004829ULL }, // Inst #19035 = VPSHUFBZ128rrkz |
| 28122 | { 19034, 5, 1, 0, 1700, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa28078004829ULL }, // Inst #19034 = VPSHUFBZ128rrk |
| 28123 | { 19033, 3, 1, 0, 1092, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08078004829ULL }, // Inst #19033 = VPSHUFBZ128rr |
| 28124 | { 19032, 8, 1, 0, 1938, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68078004819ULL }, // Inst #19032 = VPSHUFBZ128rmkz |
| 28125 | { 19031, 9, 1, 0, 1938, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28078004819ULL }, // Inst #19031 = VPSHUFBZ128rmk |
| 28126 | { 19030, 7, 1, 0, 282, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08078004819ULL }, // Inst #19030 = VPSHUFBZ128rm |
| 28127 | { 19029, 3, 1, 0, 1091, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18038004829ULL }, // Inst #19029 = VPSHUFBYrr |
| 28128 | { 19028, 7, 1, 0, 558, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18038004819ULL }, // Inst #19028 = VPSHUFBYrm |
| 28129 | { 19027, 4, 1, 0, 2093, 0, 0, 5361, X86ImpOpBase + 0, 0, 0xeac7e0004829ULL }, // Inst #19027 = VPSHUFBITQMBZrrk |
| 28130 | { 19026, 3, 1, 0, 2303, 0, 0, 5358, X86ImpOpBase + 0, 0, 0xe8c7e0004829ULL }, // Inst #19026 = VPSHUFBITQMBZrr |
| 28131 | { 19025, 8, 1, 0, 2389, 0, 0, 5350, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeac7e0004819ULL }, // Inst #19025 = VPSHUFBITQMBZrmk |
| 28132 | { 19024, 7, 1, 0, 2386, 0, 0, 5343, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8c7e0004819ULL }, // Inst #19024 = VPSHUFBITQMBZrm |
| 28133 | { 19023, 4, 1, 0, 2092, 0, 0, 5339, X86ImpOpBase + 0, 0, 0xc3c7e0004829ULL }, // Inst #19023 = VPSHUFBITQMBZ256rrk |
| 28134 | { 19022, 3, 1, 0, 2302, 0, 0, 5336, X86ImpOpBase + 0, 0, 0xc1c7e0004829ULL }, // Inst #19022 = VPSHUFBITQMBZ256rr |
| 28135 | { 19021, 8, 1, 0, 2388, 0, 0, 5328, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3c7e0004819ULL }, // Inst #19021 = VPSHUFBITQMBZ256rmk |
| 28136 | { 19020, 7, 1, 0, 2385, 0, 0, 5321, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1c7e0004819ULL }, // Inst #19020 = VPSHUFBITQMBZ256rm |
| 28137 | { 19019, 4, 1, 0, 2091, 0, 0, 5317, X86ImpOpBase + 0, 0, 0xa2c7e0004829ULL }, // Inst #19019 = VPSHUFBITQMBZ128rrk |
| 28138 | { 19018, 3, 1, 0, 2301, 0, 0, 5314, X86ImpOpBase + 0, 0, 0xa0c7e0004829ULL }, // Inst #19018 = VPSHUFBITQMBZ128rr |
| 28139 | { 19017, 8, 1, 0, 2387, 0, 0, 5306, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2c7e0004819ULL }, // Inst #19017 = VPSHUFBITQMBZ128rmk |
| 28140 | { 19016, 7, 1, 0, 2384, 0, 0, 5299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0c7e0004819ULL }, // Inst #19016 = VPSHUFBITQMBZ128rm |
| 28141 | { 19015, 5, 1, 0, 1084, 0, 0, 3564, X86ImpOpBase + 0, 0, 0xeeb978066829ULL }, // Inst #19015 = VPSHRDWZrrikz |
| 28142 | { 19014, 6, 1, 0, 1084, 0, 0, 3558, X86ImpOpBase + 0, 0, 0xeab978066829ULL }, // Inst #19014 = VPSHRDWZrrik |
| 28143 | { 19013, 4, 1, 0, 1799, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8b978066829ULL }, // Inst #19013 = VPSHRDWZrri |
| 28144 | { 19012, 9, 1, 0, 2383, 0, 0, 3549, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb978066819ULL }, // Inst #19012 = VPSHRDWZrmikz |
| 28145 | { 19011, 10, 1, 0, 2383, 0, 0, 3539, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab978066819ULL }, // Inst #19011 = VPSHRDWZrmik |
| 28146 | { 19010, 8, 1, 0, 2378, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b978066819ULL }, // Inst #19010 = VPSHRDWZrmi |
| 28147 | { 19009, 5, 1, 0, 1083, 0, 0, 3534, X86ImpOpBase + 0, 0, 0xc7b978066829ULL }, // Inst #19009 = VPSHRDWZ256rrikz |
| 28148 | { 19008, 6, 1, 0, 1083, 0, 0, 3528, X86ImpOpBase + 0, 0, 0xc3b978066829ULL }, // Inst #19008 = VPSHRDWZ256rrik |
| 28149 | { 19007, 4, 1, 0, 2371, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1b978066829ULL }, // Inst #19007 = VPSHRDWZ256rri |
| 28150 | { 19006, 9, 1, 0, 2382, 0, 0, 3519, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b978066819ULL }, // Inst #19006 = VPSHRDWZ256rmikz |
| 28151 | { 19005, 10, 1, 0, 2382, 0, 0, 3509, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b978066819ULL }, // Inst #19005 = VPSHRDWZ256rmik |
| 28152 | { 19004, 8, 1, 0, 2376, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b978066819ULL }, // Inst #19004 = VPSHRDWZ256rmi |
| 28153 | { 19003, 5, 1, 0, 1082, 0, 0, 3504, X86ImpOpBase + 0, 0, 0xa6b978066829ULL }, // Inst #19003 = VPSHRDWZ128rrikz |
| 28154 | { 19002, 6, 1, 0, 1082, 0, 0, 3498, X86ImpOpBase + 0, 0, 0xa2b978066829ULL }, // Inst #19002 = VPSHRDWZ128rrik |
| 28155 | { 19001, 4, 1, 0, 2370, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0b978066829ULL }, // Inst #19001 = VPSHRDWZ128rri |
| 28156 | { 19000, 9, 1, 0, 2381, 0, 0, 3489, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b978066819ULL }, // Inst #19000 = VPSHRDWZ128rmikz |
| 28157 | { 18999, 10, 1, 0, 2381, 0, 0, 3479, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b978066819ULL }, // Inst #18999 = VPSHRDWZ128rmik |
| 28158 | { 18998, 8, 1, 0, 2368, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b978066819ULL }, // Inst #18998 = VPSHRDWZ128rmi |
| 28159 | { 18997, 5, 1, 0, 1809, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeeb978024829ULL }, // Inst #18997 = VPSHRDVWZrkz |
| 28160 | { 18996, 5, 1, 0, 1809, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeab978024829ULL }, // Inst #18996 = VPSHRDVWZrk |
| 28161 | { 18995, 4, 1, 0, 1800, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8b978024829ULL }, // Inst #18995 = VPSHRDVWZr |
| 28162 | { 18994, 9, 1, 0, 1856, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb978024819ULL }, // Inst #18994 = VPSHRDVWZmkz |
| 28163 | { 18993, 9, 1, 0, 1856, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab978024819ULL }, // Inst #18993 = VPSHRDVWZmk |
| 28164 | { 18992, 8, 1, 0, 2378, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b978024819ULL }, // Inst #18992 = VPSHRDVWZm |
| 28165 | { 18991, 5, 1, 0, 2292, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc7b978024829ULL }, // Inst #18991 = VPSHRDVWZ256rkz |
| 28166 | { 18990, 5, 1, 0, 2292, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3b978024829ULL }, // Inst #18990 = VPSHRDVWZ256rk |
| 28167 | { 18989, 4, 1, 0, 2373, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1b978024829ULL }, // Inst #18989 = VPSHRDVWZ256r |
| 28168 | { 18988, 9, 1, 0, 2059, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b978024819ULL }, // Inst #18988 = VPSHRDVWZ256mkz |
| 28169 | { 18987, 9, 1, 0, 2059, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b978024819ULL }, // Inst #18987 = VPSHRDVWZ256mk |
| 28170 | { 18986, 8, 1, 0, 2376, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b978024819ULL }, // Inst #18986 = VPSHRDVWZ256m |
| 28171 | { 18985, 5, 1, 0, 2291, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa6b978024829ULL }, // Inst #18985 = VPSHRDVWZ128rkz |
| 28172 | { 18984, 5, 1, 0, 2291, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2b978024829ULL }, // Inst #18984 = VPSHRDVWZ128rk |
| 28173 | { 18983, 4, 1, 0, 2372, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0b978024829ULL }, // Inst #18983 = VPSHRDVWZ128r |
| 28174 | { 18982, 9, 1, 0, 2055, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b978024819ULL }, // Inst #18982 = VPSHRDVWZ128mkz |
| 28175 | { 18981, 9, 1, 0, 2055, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b978024819ULL }, // Inst #18981 = VPSHRDVWZ128mk |
| 28176 | { 18980, 8, 1, 0, 2368, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b978024819ULL }, // Inst #18980 = VPSHRDVWZ128m |
| 28177 | { 18979, 5, 1, 0, 1799, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeeb9f8024829ULL }, // Inst #18979 = VPSHRDVQZrkz |
| 28178 | { 18978, 5, 1, 0, 1799, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeab9f8024829ULL }, // Inst #18978 = VPSHRDVQZrk |
| 28179 | { 18977, 4, 1, 0, 1800, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8b9f8024829ULL }, // Inst #18977 = VPSHRDVQZr |
| 28180 | { 18976, 9, 1, 0, 2378, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8024819ULL }, // Inst #18976 = VPSHRDVQZmkz |
| 28181 | { 18975, 9, 1, 0, 2378, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab9f8024819ULL }, // Inst #18975 = VPSHRDVQZmk |
| 28182 | { 18974, 9, 1, 0, 2378, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb9f8024819ULL }, // Inst #18974 = VPSHRDVQZmbkz |
| 28183 | { 18973, 9, 1, 0, 2378, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab9f8024819ULL }, // Inst #18973 = VPSHRDVQZmbk |
| 28184 | { 18972, 8, 1, 0, 2378, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b9f8024819ULL }, // Inst #18972 = VPSHRDVQZmb |
| 28185 | { 18971, 8, 1, 0, 2378, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8024819ULL }, // Inst #18971 = VPSHRDVQZm |
| 28186 | { 18970, 5, 1, 0, 2371, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc7b9f8024829ULL }, // Inst #18970 = VPSHRDVQZ256rkz |
| 28187 | { 18969, 5, 1, 0, 2371, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3b9f8024829ULL }, // Inst #18969 = VPSHRDVQZ256rk |
| 28188 | { 18968, 4, 1, 0, 2373, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1b9f8024829ULL }, // Inst #18968 = VPSHRDVQZ256r |
| 28189 | { 18967, 9, 1, 0, 2376, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8024819ULL }, // Inst #18967 = VPSHRDVQZ256mkz |
| 28190 | { 18966, 9, 1, 0, 2376, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8024819ULL }, // Inst #18966 = VPSHRDVQZ256mk |
| 28191 | { 18965, 9, 1, 0, 2376, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b9f8024819ULL }, // Inst #18965 = VPSHRDVQZ256mbkz |
| 28192 | { 18964, 9, 1, 0, 2376, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b9f8024819ULL }, // Inst #18964 = VPSHRDVQZ256mbk |
| 28193 | { 18963, 8, 1, 0, 2376, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b9f8024819ULL }, // Inst #18963 = VPSHRDVQZ256mb |
| 28194 | { 18962, 8, 1, 0, 2376, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8024819ULL }, // Inst #18962 = VPSHRDVQZ256m |
| 28195 | { 18961, 5, 1, 0, 2370, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa6b9f8024829ULL }, // Inst #18961 = VPSHRDVQZ128rkz |
| 28196 | { 18960, 5, 1, 0, 2370, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2b9f8024829ULL }, // Inst #18960 = VPSHRDVQZ128rk |
| 28197 | { 18959, 4, 1, 0, 2372, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0b9f8024829ULL }, // Inst #18959 = VPSHRDVQZ128r |
| 28198 | { 18958, 9, 1, 0, 2368, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8024819ULL }, // Inst #18958 = VPSHRDVQZ128mkz |
| 28199 | { 18957, 9, 1, 0, 2368, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8024819ULL }, // Inst #18957 = VPSHRDVQZ128mk |
| 28200 | { 18956, 9, 1, 0, 2368, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b9f8024819ULL }, // Inst #18956 = VPSHRDVQZ128mbkz |
| 28201 | { 18955, 9, 1, 0, 2368, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b9f8024819ULL }, // Inst #18955 = VPSHRDVQZ128mbk |
| 28202 | { 18954, 8, 1, 0, 2368, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b9f8024819ULL }, // Inst #18954 = VPSHRDVQZ128mb |
| 28203 | { 18953, 8, 1, 0, 2368, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8024819ULL }, // Inst #18953 = VPSHRDVQZ128m |
| 28204 | { 18952, 5, 1, 0, 1799, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeeb9f8004829ULL }, // Inst #18952 = VPSHRDVDZrkz |
| 28205 | { 18951, 5, 1, 0, 1799, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeab9f8004829ULL }, // Inst #18951 = VPSHRDVDZrk |
| 28206 | { 18950, 4, 1, 0, 1800, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8b9f8004829ULL }, // Inst #18950 = VPSHRDVDZr |
| 28207 | { 18949, 9, 1, 0, 2378, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8004819ULL }, // Inst #18949 = VPSHRDVDZmkz |
| 28208 | { 18948, 9, 1, 0, 2378, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab9f8004819ULL }, // Inst #18948 = VPSHRDVDZmk |
| 28209 | { 18947, 9, 1, 0, 2378, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb9f8004819ULL }, // Inst #18947 = VPSHRDVDZmbkz |
| 28210 | { 18946, 9, 1, 0, 2378, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab9f8004819ULL }, // Inst #18946 = VPSHRDVDZmbk |
| 28211 | { 18945, 8, 1, 0, 2378, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b9f8004819ULL }, // Inst #18945 = VPSHRDVDZmb |
| 28212 | { 18944, 8, 1, 0, 2378, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8004819ULL }, // Inst #18944 = VPSHRDVDZm |
| 28213 | { 18943, 5, 1, 0, 2371, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7b9f8004829ULL }, // Inst #18943 = VPSHRDVDZ256rkz |
| 28214 | { 18942, 5, 1, 0, 2371, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3b9f8004829ULL }, // Inst #18942 = VPSHRDVDZ256rk |
| 28215 | { 18941, 4, 1, 0, 2373, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1b9f8004829ULL }, // Inst #18941 = VPSHRDVDZ256r |
| 28216 | { 18940, 9, 1, 0, 2376, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8004819ULL }, // Inst #18940 = VPSHRDVDZ256mkz |
| 28217 | { 18939, 9, 1, 0, 2376, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8004819ULL }, // Inst #18939 = VPSHRDVDZ256mk |
| 28218 | { 18938, 9, 1, 0, 2376, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b9f8004819ULL }, // Inst #18938 = VPSHRDVDZ256mbkz |
| 28219 | { 18937, 9, 1, 0, 2376, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b9f8004819ULL }, // Inst #18937 = VPSHRDVDZ256mbk |
| 28220 | { 18936, 8, 1, 0, 2376, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b9f8004819ULL }, // Inst #18936 = VPSHRDVDZ256mb |
| 28221 | { 18935, 8, 1, 0, 2376, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8004819ULL }, // Inst #18935 = VPSHRDVDZ256m |
| 28222 | { 18934, 5, 1, 0, 2370, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6b9f8004829ULL }, // Inst #18934 = VPSHRDVDZ128rkz |
| 28223 | { 18933, 5, 1, 0, 2370, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2b9f8004829ULL }, // Inst #18933 = VPSHRDVDZ128rk |
| 28224 | { 18932, 4, 1, 0, 2372, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0b9f8004829ULL }, // Inst #18932 = VPSHRDVDZ128r |
| 28225 | { 18931, 9, 1, 0, 2368, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8004819ULL }, // Inst #18931 = VPSHRDVDZ128mkz |
| 28226 | { 18930, 9, 1, 0, 2368, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8004819ULL }, // Inst #18930 = VPSHRDVDZ128mk |
| 28227 | { 18929, 9, 1, 0, 2368, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b9f8004819ULL }, // Inst #18929 = VPSHRDVDZ128mbkz |
| 28228 | { 18928, 9, 1, 0, 2368, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b9f8004819ULL }, // Inst #18928 = VPSHRDVDZ128mbk |
| 28229 | { 18927, 8, 1, 0, 2368, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b9f8004819ULL }, // Inst #18927 = VPSHRDVDZ128mb |
| 28230 | { 18926, 8, 1, 0, 2368, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8004819ULL }, // Inst #18926 = VPSHRDVDZ128m |
| 28231 | { 18925, 5, 1, 0, 2380, 0, 0, 2248, X86ImpOpBase + 0, 0, 0xeeb9f8066829ULL }, // Inst #18925 = VPSHRDQZrrikz |
| 28232 | { 18924, 6, 1, 0, 2380, 0, 0, 2242, X86ImpOpBase + 0, 0, 0xeab9f8066829ULL }, // Inst #18924 = VPSHRDQZrrik |
| 28233 | { 18923, 4, 1, 0, 1799, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8b9f8066829ULL }, // Inst #18923 = VPSHRDQZrri |
| 28234 | { 18922, 9, 1, 0, 2379, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8066819ULL }, // Inst #18922 = VPSHRDQZrmikz |
| 28235 | { 18921, 10, 1, 0, 2379, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab9f8066819ULL }, // Inst #18921 = VPSHRDQZrmik |
| 28236 | { 18920, 8, 1, 0, 2378, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8066819ULL }, // Inst #18920 = VPSHRDQZrmi |
| 28237 | { 18919, 9, 1, 0, 2379, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb9f8066819ULL }, // Inst #18919 = VPSHRDQZrmbikz |
| 28238 | { 18918, 10, 1, 0, 2379, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab9f8066819ULL }, // Inst #18918 = VPSHRDQZrmbik |
| 28239 | { 18917, 8, 1, 0, 2378, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b9f8066819ULL }, // Inst #18917 = VPSHRDQZrmbi |
| 28240 | { 18916, 5, 1, 0, 2375, 0, 0, 2218, X86ImpOpBase + 0, 0, 0xc7b9f8066829ULL }, // Inst #18916 = VPSHRDQZ256rrikz |
| 28241 | { 18915, 6, 1, 0, 2375, 0, 0, 2212, X86ImpOpBase + 0, 0, 0xc3b9f8066829ULL }, // Inst #18915 = VPSHRDQZ256rrik |
| 28242 | { 18914, 4, 1, 0, 2371, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1b9f8066829ULL }, // Inst #18914 = VPSHRDQZ256rri |
| 28243 | { 18913, 9, 1, 0, 2377, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8066819ULL }, // Inst #18913 = VPSHRDQZ256rmikz |
| 28244 | { 18912, 10, 1, 0, 2377, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8066819ULL }, // Inst #18912 = VPSHRDQZ256rmik |
| 28245 | { 18911, 8, 1, 0, 2376, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8066819ULL }, // Inst #18911 = VPSHRDQZ256rmi |
| 28246 | { 18910, 9, 1, 0, 2377, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b9f8066819ULL }, // Inst #18910 = VPSHRDQZ256rmbikz |
| 28247 | { 18909, 10, 1, 0, 2377, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b9f8066819ULL }, // Inst #18909 = VPSHRDQZ256rmbik |
| 28248 | { 18908, 8, 1, 0, 2376, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b9f8066819ULL }, // Inst #18908 = VPSHRDQZ256rmbi |
| 28249 | { 18907, 5, 1, 0, 2374, 0, 0, 2188, X86ImpOpBase + 0, 0, 0xa6b9f8066829ULL }, // Inst #18907 = VPSHRDQZ128rrikz |
| 28250 | { 18906, 6, 1, 0, 2374, 0, 0, 2182, X86ImpOpBase + 0, 0, 0xa2b9f8066829ULL }, // Inst #18906 = VPSHRDQZ128rrik |
| 28251 | { 18905, 4, 1, 0, 2370, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0b9f8066829ULL }, // Inst #18905 = VPSHRDQZ128rri |
| 28252 | { 18904, 9, 1, 0, 2369, 0, 0, 2173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8066819ULL }, // Inst #18904 = VPSHRDQZ128rmikz |
| 28253 | { 18903, 10, 1, 0, 2369, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8066819ULL }, // Inst #18903 = VPSHRDQZ128rmik |
| 28254 | { 18902, 8, 1, 0, 2368, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8066819ULL }, // Inst #18902 = VPSHRDQZ128rmi |
| 28255 | { 18901, 9, 1, 0, 2369, 0, 0, 2173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b9f8066819ULL }, // Inst #18901 = VPSHRDQZ128rmbikz |
| 28256 | { 18900, 10, 1, 0, 2369, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b9f8066819ULL }, // Inst #18900 = VPSHRDQZ128rmbik |
| 28257 | { 18899, 8, 1, 0, 2368, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b9f8066819ULL }, // Inst #18899 = VPSHRDQZ128rmbi |
| 28258 | { 18898, 5, 1, 0, 2380, 0, 0, 2158, X86ImpOpBase + 0, 0, 0xeeb9f8046829ULL }, // Inst #18898 = VPSHRDDZrrikz |
| 28259 | { 18897, 6, 1, 0, 2380, 0, 0, 2152, X86ImpOpBase + 0, 0, 0xeab9f8046829ULL }, // Inst #18897 = VPSHRDDZrrik |
| 28260 | { 18896, 4, 1, 0, 1799, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8b9f8046829ULL }, // Inst #18896 = VPSHRDDZrri |
| 28261 | { 18895, 9, 1, 0, 2379, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8046819ULL }, // Inst #18895 = VPSHRDDZrmikz |
| 28262 | { 18894, 10, 1, 0, 2379, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab9f8046819ULL }, // Inst #18894 = VPSHRDDZrmik |
| 28263 | { 18893, 8, 1, 0, 2378, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8046819ULL }, // Inst #18893 = VPSHRDDZrmi |
| 28264 | { 18892, 9, 1, 0, 2379, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb9f8046819ULL }, // Inst #18892 = VPSHRDDZrmbikz |
| 28265 | { 18891, 10, 1, 0, 2379, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab9f8046819ULL }, // Inst #18891 = VPSHRDDZrmbik |
| 28266 | { 18890, 8, 1, 0, 2378, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b9f8046819ULL }, // Inst #18890 = VPSHRDDZrmbi |
| 28267 | { 18889, 5, 1, 0, 2375, 0, 0, 2120, X86ImpOpBase + 0, 0, 0xc7b9f8046829ULL }, // Inst #18889 = VPSHRDDZ256rrikz |
| 28268 | { 18888, 6, 1, 0, 2375, 0, 0, 2114, X86ImpOpBase + 0, 0, 0xc3b9f8046829ULL }, // Inst #18888 = VPSHRDDZ256rrik |
| 28269 | { 18887, 4, 1, 0, 2371, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1b9f8046829ULL }, // Inst #18887 = VPSHRDDZ256rri |
| 28270 | { 18886, 9, 1, 0, 2377, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8046819ULL }, // Inst #18886 = VPSHRDDZ256rmikz |
| 28271 | { 18885, 10, 1, 0, 2377, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8046819ULL }, // Inst #18885 = VPSHRDDZ256rmik |
| 28272 | { 18884, 8, 1, 0, 2376, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8046819ULL }, // Inst #18884 = VPSHRDDZ256rmi |
| 28273 | { 18883, 9, 1, 0, 2377, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b9f8046819ULL }, // Inst #18883 = VPSHRDDZ256rmbikz |
| 28274 | { 18882, 10, 1, 0, 2377, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b9f8046819ULL }, // Inst #18882 = VPSHRDDZ256rmbik |
| 28275 | { 18881, 8, 1, 0, 2376, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b9f8046819ULL }, // Inst #18881 = VPSHRDDZ256rmbi |
| 28276 | { 18880, 5, 1, 0, 2374, 0, 0, 2082, X86ImpOpBase + 0, 0, 0xa6b9f8046829ULL }, // Inst #18880 = VPSHRDDZ128rrikz |
| 28277 | { 18879, 6, 1, 0, 2374, 0, 0, 2076, X86ImpOpBase + 0, 0, 0xa2b9f8046829ULL }, // Inst #18879 = VPSHRDDZ128rrik |
| 28278 | { 18878, 4, 1, 0, 2370, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0b9f8046829ULL }, // Inst #18878 = VPSHRDDZ128rri |
| 28279 | { 18877, 9, 1, 0, 2369, 0, 0, 2067, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8046819ULL }, // Inst #18877 = VPSHRDDZ128rmikz |
| 28280 | { 18876, 10, 1, 0, 2369, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8046819ULL }, // Inst #18876 = VPSHRDDZ128rmik |
| 28281 | { 18875, 8, 1, 0, 2368, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8046819ULL }, // Inst #18875 = VPSHRDDZ128rmi |
| 28282 | { 18874, 9, 1, 0, 2369, 0, 0, 2067, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b9f8046819ULL }, // Inst #18874 = VPSHRDDZ128rmbikz |
| 28283 | { 18873, 10, 1, 0, 2369, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b9f8046819ULL }, // Inst #18873 = VPSHRDDZ128rmbik |
| 28284 | { 18872, 8, 1, 0, 2368, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b9f8046819ULL }, // Inst #18872 = VPSHRDDZ128rmbi |
| 28285 | { 18871, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xcad802a029ULL }, // Inst #18871 = VPSHLWrr_REV |
| 28286 | { 18870, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x4ad800a02aULL }, // Inst #18870 = VPSHLWrr |
| 28287 | { 18869, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcad802a019ULL }, // Inst #18869 = VPSHLWrm |
| 28288 | { 18868, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4ad800a01aULL }, // Inst #18868 = VPSHLWmr |
| 28289 | { 18867, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xcbd802a029ULL }, // Inst #18867 = VPSHLQrr_REV |
| 28290 | { 18866, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x4bd800a02aULL }, // Inst #18866 = VPSHLQrr |
| 28291 | { 18865, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcbd802a019ULL }, // Inst #18865 = VPSHLQrm |
| 28292 | { 18864, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4bd800a01aULL }, // Inst #18864 = VPSHLQmr |
| 28293 | { 18863, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xcb5802a029ULL }, // Inst #18863 = VPSHLDrr_REV |
| 28294 | { 18862, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x4b5800a02aULL }, // Inst #18862 = VPSHLDrr |
| 28295 | { 18861, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcb5802a019ULL }, // Inst #18861 = VPSHLDrm |
| 28296 | { 18860, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4b5800a01aULL }, // Inst #18860 = VPSHLDmr |
| 28297 | { 18859, 5, 1, 0, 1084, 0, 0, 3564, X86ImpOpBase + 0, 0, 0xeeb878066829ULL }, // Inst #18859 = VPSHLDWZrrikz |
| 28298 | { 18858, 6, 1, 0, 1084, 0, 0, 3558, X86ImpOpBase + 0, 0, 0xeab878066829ULL }, // Inst #18858 = VPSHLDWZrrik |
| 28299 | { 18857, 4, 1, 0, 1799, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8b878066829ULL }, // Inst #18857 = VPSHLDWZrri |
| 28300 | { 18856, 9, 1, 0, 2383, 0, 0, 3549, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb878066819ULL }, // Inst #18856 = VPSHLDWZrmikz |
| 28301 | { 18855, 10, 1, 0, 2383, 0, 0, 3539, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab878066819ULL }, // Inst #18855 = VPSHLDWZrmik |
| 28302 | { 18854, 8, 1, 0, 2378, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b878066819ULL }, // Inst #18854 = VPSHLDWZrmi |
| 28303 | { 18853, 5, 1, 0, 1083, 0, 0, 3534, X86ImpOpBase + 0, 0, 0xc7b878066829ULL }, // Inst #18853 = VPSHLDWZ256rrikz |
| 28304 | { 18852, 6, 1, 0, 1083, 0, 0, 3528, X86ImpOpBase + 0, 0, 0xc3b878066829ULL }, // Inst #18852 = VPSHLDWZ256rrik |
| 28305 | { 18851, 4, 1, 0, 2371, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1b878066829ULL }, // Inst #18851 = VPSHLDWZ256rri |
| 28306 | { 18850, 9, 1, 0, 2382, 0, 0, 3519, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b878066819ULL }, // Inst #18850 = VPSHLDWZ256rmikz |
| 28307 | { 18849, 10, 1, 0, 2382, 0, 0, 3509, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b878066819ULL }, // Inst #18849 = VPSHLDWZ256rmik |
| 28308 | { 18848, 8, 1, 0, 2376, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b878066819ULL }, // Inst #18848 = VPSHLDWZ256rmi |
| 28309 | { 18847, 5, 1, 0, 1082, 0, 0, 3504, X86ImpOpBase + 0, 0, 0xa6b878066829ULL }, // Inst #18847 = VPSHLDWZ128rrikz |
| 28310 | { 18846, 6, 1, 0, 1082, 0, 0, 3498, X86ImpOpBase + 0, 0, 0xa2b878066829ULL }, // Inst #18846 = VPSHLDWZ128rrik |
| 28311 | { 18845, 4, 1, 0, 2370, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0b878066829ULL }, // Inst #18845 = VPSHLDWZ128rri |
| 28312 | { 18844, 9, 1, 0, 2381, 0, 0, 3489, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b878066819ULL }, // Inst #18844 = VPSHLDWZ128rmikz |
| 28313 | { 18843, 10, 1, 0, 2381, 0, 0, 3479, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b878066819ULL }, // Inst #18843 = VPSHLDWZ128rmik |
| 28314 | { 18842, 8, 1, 0, 2368, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b878066819ULL }, // Inst #18842 = VPSHLDWZ128rmi |
| 28315 | { 18841, 5, 1, 0, 1809, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeeb878024829ULL }, // Inst #18841 = VPSHLDVWZrkz |
| 28316 | { 18840, 5, 1, 0, 1809, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeab878024829ULL }, // Inst #18840 = VPSHLDVWZrk |
| 28317 | { 18839, 4, 1, 0, 1800, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8b878024829ULL }, // Inst #18839 = VPSHLDVWZr |
| 28318 | { 18838, 9, 1, 0, 1856, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb878024819ULL }, // Inst #18838 = VPSHLDVWZmkz |
| 28319 | { 18837, 9, 1, 0, 1856, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab878024819ULL }, // Inst #18837 = VPSHLDVWZmk |
| 28320 | { 18836, 8, 1, 0, 2378, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b878024819ULL }, // Inst #18836 = VPSHLDVWZm |
| 28321 | { 18835, 5, 1, 0, 2292, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc7b878024829ULL }, // Inst #18835 = VPSHLDVWZ256rkz |
| 28322 | { 18834, 5, 1, 0, 2292, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3b878024829ULL }, // Inst #18834 = VPSHLDVWZ256rk |
| 28323 | { 18833, 4, 1, 0, 2373, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1b878024829ULL }, // Inst #18833 = VPSHLDVWZ256r |
| 28324 | { 18832, 9, 1, 0, 2059, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b878024819ULL }, // Inst #18832 = VPSHLDVWZ256mkz |
| 28325 | { 18831, 9, 1, 0, 2059, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b878024819ULL }, // Inst #18831 = VPSHLDVWZ256mk |
| 28326 | { 18830, 8, 1, 0, 2376, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b878024819ULL }, // Inst #18830 = VPSHLDVWZ256m |
| 28327 | { 18829, 5, 1, 0, 2291, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa6b878024829ULL }, // Inst #18829 = VPSHLDVWZ128rkz |
| 28328 | { 18828, 5, 1, 0, 2291, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2b878024829ULL }, // Inst #18828 = VPSHLDVWZ128rk |
| 28329 | { 18827, 4, 1, 0, 2372, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0b878024829ULL }, // Inst #18827 = VPSHLDVWZ128r |
| 28330 | { 18826, 9, 1, 0, 2055, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b878024819ULL }, // Inst #18826 = VPSHLDVWZ128mkz |
| 28331 | { 18825, 9, 1, 0, 2055, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b878024819ULL }, // Inst #18825 = VPSHLDVWZ128mk |
| 28332 | { 18824, 8, 1, 0, 2368, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b878024819ULL }, // Inst #18824 = VPSHLDVWZ128m |
| 28333 | { 18823, 5, 1, 0, 1799, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeeb8f8024829ULL }, // Inst #18823 = VPSHLDVQZrkz |
| 28334 | { 18822, 5, 1, 0, 1799, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeab8f8024829ULL }, // Inst #18822 = VPSHLDVQZrk |
| 28335 | { 18821, 4, 1, 0, 1800, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8b8f8024829ULL }, // Inst #18821 = VPSHLDVQZr |
| 28336 | { 18820, 9, 1, 0, 2378, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8024819ULL }, // Inst #18820 = VPSHLDVQZmkz |
| 28337 | { 18819, 9, 1, 0, 2378, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab8f8024819ULL }, // Inst #18819 = VPSHLDVQZmk |
| 28338 | { 18818, 9, 1, 0, 2378, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb8f8024819ULL }, // Inst #18818 = VPSHLDVQZmbkz |
| 28339 | { 18817, 9, 1, 0, 2378, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab8f8024819ULL }, // Inst #18817 = VPSHLDVQZmbk |
| 28340 | { 18816, 8, 1, 0, 2378, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b8f8024819ULL }, // Inst #18816 = VPSHLDVQZmb |
| 28341 | { 18815, 8, 1, 0, 2378, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8024819ULL }, // Inst #18815 = VPSHLDVQZm |
| 28342 | { 18814, 5, 1, 0, 2371, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc7b8f8024829ULL }, // Inst #18814 = VPSHLDVQZ256rkz |
| 28343 | { 18813, 5, 1, 0, 2371, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3b8f8024829ULL }, // Inst #18813 = VPSHLDVQZ256rk |
| 28344 | { 18812, 4, 1, 0, 2373, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1b8f8024829ULL }, // Inst #18812 = VPSHLDVQZ256r |
| 28345 | { 18811, 9, 1, 0, 2376, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8024819ULL }, // Inst #18811 = VPSHLDVQZ256mkz |
| 28346 | { 18810, 9, 1, 0, 2376, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8024819ULL }, // Inst #18810 = VPSHLDVQZ256mk |
| 28347 | { 18809, 9, 1, 0, 2376, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b8f8024819ULL }, // Inst #18809 = VPSHLDVQZ256mbkz |
| 28348 | { 18808, 9, 1, 0, 2376, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b8f8024819ULL }, // Inst #18808 = VPSHLDVQZ256mbk |
| 28349 | { 18807, 8, 1, 0, 2376, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b8f8024819ULL }, // Inst #18807 = VPSHLDVQZ256mb |
| 28350 | { 18806, 8, 1, 0, 2376, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8024819ULL }, // Inst #18806 = VPSHLDVQZ256m |
| 28351 | { 18805, 5, 1, 0, 2370, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa6b8f8024829ULL }, // Inst #18805 = VPSHLDVQZ128rkz |
| 28352 | { 18804, 5, 1, 0, 2370, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2b8f8024829ULL }, // Inst #18804 = VPSHLDVQZ128rk |
| 28353 | { 18803, 4, 1, 0, 2372, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0b8f8024829ULL }, // Inst #18803 = VPSHLDVQZ128r |
| 28354 | { 18802, 9, 1, 0, 2368, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8024819ULL }, // Inst #18802 = VPSHLDVQZ128mkz |
| 28355 | { 18801, 9, 1, 0, 2368, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8024819ULL }, // Inst #18801 = VPSHLDVQZ128mk |
| 28356 | { 18800, 9, 1, 0, 2368, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b8f8024819ULL }, // Inst #18800 = VPSHLDVQZ128mbkz |
| 28357 | { 18799, 9, 1, 0, 2368, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b8f8024819ULL }, // Inst #18799 = VPSHLDVQZ128mbk |
| 28358 | { 18798, 8, 1, 0, 2368, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b8f8024819ULL }, // Inst #18798 = VPSHLDVQZ128mb |
| 28359 | { 18797, 8, 1, 0, 2368, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8024819ULL }, // Inst #18797 = VPSHLDVQZ128m |
| 28360 | { 18796, 5, 1, 0, 1799, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeeb8f8004829ULL }, // Inst #18796 = VPSHLDVDZrkz |
| 28361 | { 18795, 5, 1, 0, 1799, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeab8f8004829ULL }, // Inst #18795 = VPSHLDVDZrk |
| 28362 | { 18794, 4, 1, 0, 1800, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8b8f8004829ULL }, // Inst #18794 = VPSHLDVDZr |
| 28363 | { 18793, 9, 1, 0, 2378, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8004819ULL }, // Inst #18793 = VPSHLDVDZmkz |
| 28364 | { 18792, 9, 1, 0, 2378, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab8f8004819ULL }, // Inst #18792 = VPSHLDVDZmk |
| 28365 | { 18791, 9, 1, 0, 2378, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb8f8004819ULL }, // Inst #18791 = VPSHLDVDZmbkz |
| 28366 | { 18790, 9, 1, 0, 2378, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab8f8004819ULL }, // Inst #18790 = VPSHLDVDZmbk |
| 28367 | { 18789, 8, 1, 0, 2378, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b8f8004819ULL }, // Inst #18789 = VPSHLDVDZmb |
| 28368 | { 18788, 8, 1, 0, 2378, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8004819ULL }, // Inst #18788 = VPSHLDVDZm |
| 28369 | { 18787, 5, 1, 0, 2371, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7b8f8004829ULL }, // Inst #18787 = VPSHLDVDZ256rkz |
| 28370 | { 18786, 5, 1, 0, 2371, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3b8f8004829ULL }, // Inst #18786 = VPSHLDVDZ256rk |
| 28371 | { 18785, 4, 1, 0, 2373, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1b8f8004829ULL }, // Inst #18785 = VPSHLDVDZ256r |
| 28372 | { 18784, 9, 1, 0, 2376, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8004819ULL }, // Inst #18784 = VPSHLDVDZ256mkz |
| 28373 | { 18783, 9, 1, 0, 2376, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8004819ULL }, // Inst #18783 = VPSHLDVDZ256mk |
| 28374 | { 18782, 9, 1, 0, 2376, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b8f8004819ULL }, // Inst #18782 = VPSHLDVDZ256mbkz |
| 28375 | { 18781, 9, 1, 0, 2376, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b8f8004819ULL }, // Inst #18781 = VPSHLDVDZ256mbk |
| 28376 | { 18780, 8, 1, 0, 2376, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b8f8004819ULL }, // Inst #18780 = VPSHLDVDZ256mb |
| 28377 | { 18779, 8, 1, 0, 2376, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8004819ULL }, // Inst #18779 = VPSHLDVDZ256m |
| 28378 | { 18778, 5, 1, 0, 2370, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6b8f8004829ULL }, // Inst #18778 = VPSHLDVDZ128rkz |
| 28379 | { 18777, 5, 1, 0, 2370, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2b8f8004829ULL }, // Inst #18777 = VPSHLDVDZ128rk |
| 28380 | { 18776, 4, 1, 0, 2372, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0b8f8004829ULL }, // Inst #18776 = VPSHLDVDZ128r |
| 28381 | { 18775, 9, 1, 0, 2368, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8004819ULL }, // Inst #18775 = VPSHLDVDZ128mkz |
| 28382 | { 18774, 9, 1, 0, 2368, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8004819ULL }, // Inst #18774 = VPSHLDVDZ128mk |
| 28383 | { 18773, 9, 1, 0, 2368, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b8f8004819ULL }, // Inst #18773 = VPSHLDVDZ128mbkz |
| 28384 | { 18772, 9, 1, 0, 2368, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b8f8004819ULL }, // Inst #18772 = VPSHLDVDZ128mbk |
| 28385 | { 18771, 8, 1, 0, 2368, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b8f8004819ULL }, // Inst #18771 = VPSHLDVDZ128mb |
| 28386 | { 18770, 8, 1, 0, 2368, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8004819ULL }, // Inst #18770 = VPSHLDVDZ128m |
| 28387 | { 18769, 5, 1, 0, 2380, 0, 0, 2248, X86ImpOpBase + 0, 0, 0xeeb8f8066829ULL }, // Inst #18769 = VPSHLDQZrrikz |
| 28388 | { 18768, 6, 1, 0, 2380, 0, 0, 2242, X86ImpOpBase + 0, 0, 0xeab8f8066829ULL }, // Inst #18768 = VPSHLDQZrrik |
| 28389 | { 18767, 4, 1, 0, 1799, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8b8f8066829ULL }, // Inst #18767 = VPSHLDQZrri |
| 28390 | { 18766, 9, 1, 0, 2379, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8066819ULL }, // Inst #18766 = VPSHLDQZrmikz |
| 28391 | { 18765, 10, 1, 0, 2379, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab8f8066819ULL }, // Inst #18765 = VPSHLDQZrmik |
| 28392 | { 18764, 8, 1, 0, 2378, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8066819ULL }, // Inst #18764 = VPSHLDQZrmi |
| 28393 | { 18763, 9, 1, 0, 2379, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb8f8066819ULL }, // Inst #18763 = VPSHLDQZrmbikz |
| 28394 | { 18762, 10, 1, 0, 2379, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab8f8066819ULL }, // Inst #18762 = VPSHLDQZrmbik |
| 28395 | { 18761, 8, 1, 0, 2378, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b8f8066819ULL }, // Inst #18761 = VPSHLDQZrmbi |
| 28396 | { 18760, 5, 1, 0, 2375, 0, 0, 2218, X86ImpOpBase + 0, 0, 0xc7b8f8066829ULL }, // Inst #18760 = VPSHLDQZ256rrikz |
| 28397 | { 18759, 6, 1, 0, 2375, 0, 0, 2212, X86ImpOpBase + 0, 0, 0xc3b8f8066829ULL }, // Inst #18759 = VPSHLDQZ256rrik |
| 28398 | { 18758, 4, 1, 0, 2371, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1b8f8066829ULL }, // Inst #18758 = VPSHLDQZ256rri |
| 28399 | { 18757, 9, 1, 0, 2377, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8066819ULL }, // Inst #18757 = VPSHLDQZ256rmikz |
| 28400 | { 18756, 10, 1, 0, 2377, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8066819ULL }, // Inst #18756 = VPSHLDQZ256rmik |
| 28401 | { 18755, 8, 1, 0, 2376, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8066819ULL }, // Inst #18755 = VPSHLDQZ256rmi |
| 28402 | { 18754, 9, 1, 0, 2377, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b8f8066819ULL }, // Inst #18754 = VPSHLDQZ256rmbikz |
| 28403 | { 18753, 10, 1, 0, 2377, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b8f8066819ULL }, // Inst #18753 = VPSHLDQZ256rmbik |
| 28404 | { 18752, 8, 1, 0, 2376, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b8f8066819ULL }, // Inst #18752 = VPSHLDQZ256rmbi |
| 28405 | { 18751, 5, 1, 0, 2374, 0, 0, 2188, X86ImpOpBase + 0, 0, 0xa6b8f8066829ULL }, // Inst #18751 = VPSHLDQZ128rrikz |
| 28406 | { 18750, 6, 1, 0, 2374, 0, 0, 2182, X86ImpOpBase + 0, 0, 0xa2b8f8066829ULL }, // Inst #18750 = VPSHLDQZ128rrik |
| 28407 | { 18749, 4, 1, 0, 2370, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0b8f8066829ULL }, // Inst #18749 = VPSHLDQZ128rri |
| 28408 | { 18748, 9, 1, 0, 2369, 0, 0, 2173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8066819ULL }, // Inst #18748 = VPSHLDQZ128rmikz |
| 28409 | { 18747, 10, 1, 0, 2369, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8066819ULL }, // Inst #18747 = VPSHLDQZ128rmik |
| 28410 | { 18746, 8, 1, 0, 2368, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8066819ULL }, // Inst #18746 = VPSHLDQZ128rmi |
| 28411 | { 18745, 9, 1, 0, 2369, 0, 0, 2173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b8f8066819ULL }, // Inst #18745 = VPSHLDQZ128rmbikz |
| 28412 | { 18744, 10, 1, 0, 2369, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b8f8066819ULL }, // Inst #18744 = VPSHLDQZ128rmbik |
| 28413 | { 18743, 8, 1, 0, 2368, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b8f8066819ULL }, // Inst #18743 = VPSHLDQZ128rmbi |
| 28414 | { 18742, 5, 1, 0, 2380, 0, 0, 2158, X86ImpOpBase + 0, 0, 0xeeb8f8046829ULL }, // Inst #18742 = VPSHLDDZrrikz |
| 28415 | { 18741, 6, 1, 0, 2380, 0, 0, 2152, X86ImpOpBase + 0, 0, 0xeab8f8046829ULL }, // Inst #18741 = VPSHLDDZrrik |
| 28416 | { 18740, 4, 1, 0, 1799, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8b8f8046829ULL }, // Inst #18740 = VPSHLDDZrri |
| 28417 | { 18739, 9, 1, 0, 2379, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8046819ULL }, // Inst #18739 = VPSHLDDZrmikz |
| 28418 | { 18738, 10, 1, 0, 2379, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab8f8046819ULL }, // Inst #18738 = VPSHLDDZrmik |
| 28419 | { 18737, 8, 1, 0, 2378, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8046819ULL }, // Inst #18737 = VPSHLDDZrmi |
| 28420 | { 18736, 9, 1, 0, 2379, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb8f8046819ULL }, // Inst #18736 = VPSHLDDZrmbikz |
| 28421 | { 18735, 10, 1, 0, 2379, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab8f8046819ULL }, // Inst #18735 = VPSHLDDZrmbik |
| 28422 | { 18734, 8, 1, 0, 2378, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b8f8046819ULL }, // Inst #18734 = VPSHLDDZrmbi |
| 28423 | { 18733, 5, 1, 0, 2375, 0, 0, 2120, X86ImpOpBase + 0, 0, 0xc7b8f8046829ULL }, // Inst #18733 = VPSHLDDZ256rrikz |
| 28424 | { 18732, 6, 1, 0, 2375, 0, 0, 2114, X86ImpOpBase + 0, 0, 0xc3b8f8046829ULL }, // Inst #18732 = VPSHLDDZ256rrik |
| 28425 | { 18731, 4, 1, 0, 2371, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1b8f8046829ULL }, // Inst #18731 = VPSHLDDZ256rri |
| 28426 | { 18730, 9, 1, 0, 2377, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8046819ULL }, // Inst #18730 = VPSHLDDZ256rmikz |
| 28427 | { 18729, 10, 1, 0, 2377, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8046819ULL }, // Inst #18729 = VPSHLDDZ256rmik |
| 28428 | { 18728, 8, 1, 0, 2376, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8046819ULL }, // Inst #18728 = VPSHLDDZ256rmi |
| 28429 | { 18727, 9, 1, 0, 2377, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b8f8046819ULL }, // Inst #18727 = VPSHLDDZ256rmbikz |
| 28430 | { 18726, 10, 1, 0, 2377, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b8f8046819ULL }, // Inst #18726 = VPSHLDDZ256rmbik |
| 28431 | { 18725, 8, 1, 0, 2376, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b8f8046819ULL }, // Inst #18725 = VPSHLDDZ256rmbi |
| 28432 | { 18724, 5, 1, 0, 2374, 0, 0, 2082, X86ImpOpBase + 0, 0, 0xa6b8f8046829ULL }, // Inst #18724 = VPSHLDDZ128rrikz |
| 28433 | { 18723, 6, 1, 0, 2374, 0, 0, 2076, X86ImpOpBase + 0, 0, 0xa2b8f8046829ULL }, // Inst #18723 = VPSHLDDZ128rrik |
| 28434 | { 18722, 4, 1, 0, 2370, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0b8f8046829ULL }, // Inst #18722 = VPSHLDDZ128rri |
| 28435 | { 18721, 9, 1, 0, 2369, 0, 0, 2067, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8046819ULL }, // Inst #18721 = VPSHLDDZ128rmikz |
| 28436 | { 18720, 10, 1, 0, 2369, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8046819ULL }, // Inst #18720 = VPSHLDDZ128rmik |
| 28437 | { 18719, 8, 1, 0, 2368, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8046819ULL }, // Inst #18719 = VPSHLDDZ128rmi |
| 28438 | { 18718, 9, 1, 0, 2369, 0, 0, 2067, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b8f8046819ULL }, // Inst #18718 = VPSHLDDZ128rmbikz |
| 28439 | { 18717, 10, 1, 0, 2369, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b8f8046819ULL }, // Inst #18717 = VPSHLDDZ128rmbik |
| 28440 | { 18716, 8, 1, 0, 2368, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b8f8046819ULL }, // Inst #18716 = VPSHLDDZ128rmbi |
| 28441 | { 18715, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xca5802a029ULL }, // Inst #18715 = VPSHLBrr_REV |
| 28442 | { 18714, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x4a5800a02aULL }, // Inst #18714 = VPSHLBrr |
| 28443 | { 18713, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca5802a019ULL }, // Inst #18713 = VPSHLBrm |
| 28444 | { 18712, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4a5800a01aULL }, // Inst #18712 = VPSHLBmr |
| 28445 | { 18711, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xccd802a029ULL }, // Inst #18711 = VPSHAWrr_REV |
| 28446 | { 18710, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x4cd800a02aULL }, // Inst #18710 = VPSHAWrr |
| 28447 | { 18709, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xccd802a019ULL }, // Inst #18709 = VPSHAWrm |
| 28448 | { 18708, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4cd800a01aULL }, // Inst #18708 = VPSHAWmr |
| 28449 | { 18707, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xcdd802a029ULL }, // Inst #18707 = VPSHAQrr_REV |
| 28450 | { 18706, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x4dd800a02aULL }, // Inst #18706 = VPSHAQrr |
| 28451 | { 18705, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcdd802a019ULL }, // Inst #18705 = VPSHAQrm |
| 28452 | { 18704, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4dd800a01aULL }, // Inst #18704 = VPSHAQmr |
| 28453 | { 18703, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xcd5802a029ULL }, // Inst #18703 = VPSHADrr_REV |
| 28454 | { 18702, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x4d5800a02aULL }, // Inst #18702 = VPSHADrr |
| 28455 | { 18701, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcd5802a019ULL }, // Inst #18701 = VPSHADrm |
| 28456 | { 18700, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4d5800a01aULL }, // Inst #18700 = VPSHADmr |
| 28457 | { 18699, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xcc5802a029ULL }, // Inst #18699 = VPSHABrr_REV |
| 28458 | { 18698, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x4c5800a02aULL }, // Inst #18698 = VPSHABrr |
| 28459 | { 18697, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcc5802a019ULL }, // Inst #18697 = VPSHABrm |
| 28460 | { 18696, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4c5800a01aULL }, // Inst #18696 = VPSHABmr |
| 28461 | { 18695, 8, 1, 0, 2367, 0, 0, 5760, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a50f8024818ULL }, // Inst #18695 = VPSCATTERQQZmr |
| 28462 | { 18694, 8, 1, 0, 1314, 0, 0, 5752, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8350f8024818ULL }, // Inst #18694 = VPSCATTERQQZ256mr |
| 28463 | { 18693, 8, 1, 0, 1313, 0, 0, 5712, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8250f8024818ULL }, // Inst #18693 = VPSCATTERQQZ128mr |
| 28464 | { 18692, 8, 1, 0, 1315, 0, 0, 5744, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6a50f8004818ULL }, // Inst #18692 = VPSCATTERQDZmr |
| 28465 | { 18691, 8, 1, 0, 2366, 0, 0, 5736, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6350f8004818ULL }, // Inst #18691 = VPSCATTERQDZ256mr |
| 28466 | { 18690, 8, 1, 0, 1333, 0, 0, 5712, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6250f8004818ULL }, // Inst #18690 = VPSCATTERQDZ128mr |
| 28467 | { 18689, 8, 1, 0, 2367, 0, 0, 5728, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a5078024818ULL }, // Inst #18689 = VPSCATTERDQZmr |
| 28468 | { 18688, 8, 1, 0, 1314, 0, 0, 5720, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x835078024818ULL }, // Inst #18688 = VPSCATTERDQZ256mr |
| 28469 | { 18687, 8, 1, 0, 1313, 0, 0, 5712, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x825078024818ULL }, // Inst #18687 = VPSCATTERDQZ128mr |
| 28470 | { 18686, 8, 1, 0, 1336, 0, 0, 5704, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6a5078004818ULL }, // Inst #18686 = VPSCATTERDDZmr |
| 28471 | { 18685, 8, 1, 0, 1335, 0, 0, 5696, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x635078004818ULL }, // Inst #18685 = VPSCATTERDDZ256mr |
| 28472 | { 18684, 8, 1, 0, 1334, 0, 0, 5688, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x625078004818ULL }, // Inst #18684 = VPSCATTERDDZ128mr |
| 28473 | { 18683, 3, 1, 0, 281, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xfb38002829ULL }, // Inst #18683 = VPSADBWrr |
| 28474 | { 18682, 7, 1, 0, 280, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfb38002819ULL }, // Inst #18682 = VPSADBWrm |
| 28475 | { 18681, 3, 1, 0, 422, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8fb78002829ULL }, // Inst #18681 = VPSADBWZrr |
| 28476 | { 18680, 7, 1, 0, 421, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8fb78002819ULL }, // Inst #18680 = VPSADBWZrm |
| 28477 | { 18679, 3, 1, 0, 420, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1fb78002829ULL }, // Inst #18679 = VPSADBWZ256rr |
| 28478 | { 18678, 7, 1, 0, 419, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1fb78002819ULL }, // Inst #18678 = VPSADBWZ256rm |
| 28479 | { 18677, 3, 1, 0, 281, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0fb78002829ULL }, // Inst #18677 = VPSADBWZ128rr |
| 28480 | { 18676, 7, 1, 0, 280, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0fb78002819ULL }, // Inst #18676 = VPSADBWZ128rm |
| 28481 | { 18675, 3, 1, 0, 420, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1fb38002829ULL }, // Inst #18675 = VPSADBWYrr |
| 28482 | { 18674, 7, 1, 0, 419, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1fb38002819ULL }, // Inst #18674 = VPSADBWYrm |
| 28483 | { 18673, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xc8d802a029ULL }, // Inst #18673 = VPROTWrr_REV |
| 28484 | { 18672, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x48d800a02aULL }, // Inst #18672 = VPROTWrr |
| 28485 | { 18671, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc8d802a019ULL }, // Inst #18671 = VPROTWrm |
| 28486 | { 18670, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0x60d8048029ULL }, // Inst #18670 = VPROTWri |
| 28487 | { 18669, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x48d800a01aULL }, // Inst #18669 = VPROTWmr |
| 28488 | { 18668, 7, 1, 0, 557, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x60d8048019ULL }, // Inst #18668 = VPROTWmi |
| 28489 | { 18667, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xc9d802a029ULL }, // Inst #18667 = VPROTQrr_REV |
| 28490 | { 18666, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x49d800a02aULL }, // Inst #18666 = VPROTQrr |
| 28491 | { 18665, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc9d802a019ULL }, // Inst #18665 = VPROTQrm |
| 28492 | { 18664, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0x61d8048029ULL }, // Inst #18664 = VPROTQri |
| 28493 | { 18663, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x49d800a01aULL }, // Inst #18663 = VPROTQmr |
| 28494 | { 18662, 7, 1, 0, 557, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x61d8048019ULL }, // Inst #18662 = VPROTQmi |
| 28495 | { 18661, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xc95802a029ULL }, // Inst #18661 = VPROTDrr_REV |
| 28496 | { 18660, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x495800a02aULL }, // Inst #18660 = VPROTDrr |
| 28497 | { 18659, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc95802a019ULL }, // Inst #18659 = VPROTDrm |
| 28498 | { 18658, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0x6158048029ULL }, // Inst #18658 = VPROTDri |
| 28499 | { 18657, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x495800a01aULL }, // Inst #18657 = VPROTDmr |
| 28500 | { 18656, 7, 1, 0, 557, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6158048019ULL }, // Inst #18656 = VPROTDmi |
| 28501 | { 18655, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xc85802a029ULL }, // Inst #18655 = VPROTBrr_REV |
| 28502 | { 18654, 3, 1, 0, 552, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x485800a02aULL }, // Inst #18654 = VPROTBrr |
| 28503 | { 18653, 7, 1, 0, 551, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc85802a019ULL }, // Inst #18653 = VPROTBrm |
| 28504 | { 18652, 3, 1, 0, 284, 0, 0, 566, X86ImpOpBase + 0, 0, 0x6058048029ULL }, // Inst #18652 = VPROTBri |
| 28505 | { 18651, 7, 1, 0, 551, 0, 0, 5681, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x485800a01aULL }, // Inst #18651 = VPROTBmr |
| 28506 | { 18650, 7, 1, 0, 557, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6058048019ULL }, // Inst #18650 = VPROTBmi |
| 28507 | { 18649, 4, 1, 0, 1096, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xee8a78024829ULL }, // Inst #18649 = VPRORVQZrrkz |
| 28508 | { 18648, 5, 1, 0, 1096, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xea8a78024829ULL }, // Inst #18648 = VPRORVQZrrk |
| 28509 | { 18647, 3, 1, 0, 1096, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88a78024829ULL }, // Inst #18647 = VPRORVQZrr |
| 28510 | { 18646, 8, 1, 0, 555, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8a78024819ULL }, // Inst #18646 = VPRORVQZrmkz |
| 28511 | { 18645, 9, 1, 0, 555, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8a78024819ULL }, // Inst #18645 = VPRORVQZrmk |
| 28512 | { 18644, 8, 1, 0, 555, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e8a78024819ULL }, // Inst #18644 = VPRORVQZrmbkz |
| 28513 | { 18643, 9, 1, 0, 555, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a8a78024819ULL }, // Inst #18643 = VPRORVQZrmbk |
| 28514 | { 18642, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x988a78024819ULL }, // Inst #18642 = VPRORVQZrmb |
| 28515 | { 18641, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88a78024819ULL }, // Inst #18641 = VPRORVQZrm |
| 28516 | { 18640, 4, 1, 0, 1095, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc78a78024829ULL }, // Inst #18640 = VPRORVQZ256rrkz |
| 28517 | { 18639, 5, 1, 0, 1095, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc38a78024829ULL }, // Inst #18639 = VPRORVQZ256rrk |
| 28518 | { 18638, 3, 1, 0, 1095, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18a78024829ULL }, // Inst #18638 = VPRORVQZ256rr |
| 28519 | { 18637, 8, 1, 0, 553, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78a78024819ULL }, // Inst #18637 = VPRORVQZ256rmkz |
| 28520 | { 18636, 9, 1, 0, 553, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38a78024819ULL }, // Inst #18636 = VPRORVQZ256rmk |
| 28521 | { 18635, 8, 1, 0, 553, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x978a78024819ULL }, // Inst #18635 = VPRORVQZ256rmbkz |
| 28522 | { 18634, 9, 1, 0, 553, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x938a78024819ULL }, // Inst #18634 = VPRORVQZ256rmbk |
| 28523 | { 18633, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x918a78024819ULL }, // Inst #18633 = VPRORVQZ256rmb |
| 28524 | { 18632, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18a78024819ULL }, // Inst #18632 = VPRORVQZ256rm |
| 28525 | { 18631, 4, 1, 0, 1094, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa68a78024829ULL }, // Inst #18631 = VPRORVQZ128rrkz |
| 28526 | { 18630, 5, 1, 0, 1094, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa28a78024829ULL }, // Inst #18630 = VPRORVQZ128rrk |
| 28527 | { 18629, 3, 1, 0, 1094, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08a78024829ULL }, // Inst #18629 = VPRORVQZ128rr |
| 28528 | { 18628, 8, 1, 0, 551, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68a78024819ULL }, // Inst #18628 = VPRORVQZ128rmkz |
| 28529 | { 18627, 9, 1, 0, 551, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28a78024819ULL }, // Inst #18627 = VPRORVQZ128rmk |
| 28530 | { 18626, 8, 1, 0, 551, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x968a78024819ULL }, // Inst #18626 = VPRORVQZ128rmbkz |
| 28531 | { 18625, 9, 1, 0, 551, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x928a78024819ULL }, // Inst #18625 = VPRORVQZ128rmbk |
| 28532 | { 18624, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x908a78024819ULL }, // Inst #18624 = VPRORVQZ128rmb |
| 28533 | { 18623, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08a78024819ULL }, // Inst #18623 = VPRORVQZ128rm |
| 28534 | { 18622, 4, 1, 0, 1096, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xee8a78004829ULL }, // Inst #18622 = VPRORVDZrrkz |
| 28535 | { 18621, 5, 1, 0, 1096, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xea8a78004829ULL }, // Inst #18621 = VPRORVDZrrk |
| 28536 | { 18620, 3, 1, 0, 1096, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88a78004829ULL }, // Inst #18620 = VPRORVDZrr |
| 28537 | { 18619, 8, 1, 0, 555, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8a78004819ULL }, // Inst #18619 = VPRORVDZrmkz |
| 28538 | { 18618, 9, 1, 0, 555, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8a78004819ULL }, // Inst #18618 = VPRORVDZrmk |
| 28539 | { 18617, 8, 1, 0, 555, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e8a78004819ULL }, // Inst #18617 = VPRORVDZrmbkz |
| 28540 | { 18616, 9, 1, 0, 555, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a8a78004819ULL }, // Inst #18616 = VPRORVDZrmbk |
| 28541 | { 18615, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x788a78004819ULL }, // Inst #18615 = VPRORVDZrmb |
| 28542 | { 18614, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88a78004819ULL }, // Inst #18614 = VPRORVDZrm |
| 28543 | { 18613, 4, 1, 0, 1095, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc78a78004829ULL }, // Inst #18613 = VPRORVDZ256rrkz |
| 28544 | { 18612, 5, 1, 0, 1095, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc38a78004829ULL }, // Inst #18612 = VPRORVDZ256rrk |
| 28545 | { 18611, 3, 1, 0, 1095, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18a78004829ULL }, // Inst #18611 = VPRORVDZ256rr |
| 28546 | { 18610, 8, 1, 0, 553, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78a78004819ULL }, // Inst #18610 = VPRORVDZ256rmkz |
| 28547 | { 18609, 9, 1, 0, 553, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38a78004819ULL }, // Inst #18609 = VPRORVDZ256rmk |
| 28548 | { 18608, 8, 1, 0, 553, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x778a78004819ULL }, // Inst #18608 = VPRORVDZ256rmbkz |
| 28549 | { 18607, 9, 1, 0, 553, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x738a78004819ULL }, // Inst #18607 = VPRORVDZ256rmbk |
| 28550 | { 18606, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x718a78004819ULL }, // Inst #18606 = VPRORVDZ256rmb |
| 28551 | { 18605, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18a78004819ULL }, // Inst #18605 = VPRORVDZ256rm |
| 28552 | { 18604, 4, 1, 0, 1094, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa68a78004829ULL }, // Inst #18604 = VPRORVDZ128rrkz |
| 28553 | { 18603, 5, 1, 0, 1094, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa28a78004829ULL }, // Inst #18603 = VPRORVDZ128rrk |
| 28554 | { 18602, 3, 1, 0, 1094, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08a78004829ULL }, // Inst #18602 = VPRORVDZ128rr |
| 28555 | { 18601, 8, 1, 0, 551, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68a78004819ULL }, // Inst #18601 = VPRORVDZ128rmkz |
| 28556 | { 18600, 9, 1, 0, 551, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28a78004819ULL }, // Inst #18600 = VPRORVDZ128rmk |
| 28557 | { 18599, 8, 1, 0, 551, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x768a78004819ULL }, // Inst #18599 = VPRORVDZ128rmbkz |
| 28558 | { 18598, 9, 1, 0, 551, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x728a78004819ULL }, // Inst #18598 = VPRORVDZ128rmbk |
| 28559 | { 18597, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x708a78004819ULL }, // Inst #18597 = VPRORVDZ128rmb |
| 28560 | { 18596, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08a78004819ULL }, // Inst #18596 = VPRORVDZ128rm |
| 28561 | { 18595, 4, 1, 0, 1099, 0, 0, 4605, X86ImpOpBase + 0, 0, 0xeeb978062830ULL }, // Inst #18595 = VPRORQZrikz |
| 28562 | { 18594, 5, 1, 0, 1099, 0, 0, 4600, X86ImpOpBase + 0, 0, 0xeab978062830ULL }, // Inst #18594 = VPRORQZrik |
| 28563 | { 18593, 3, 1, 0, 1099, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b978062830ULL }, // Inst #18593 = VPRORQZri |
| 28564 | { 18592, 8, 1, 0, 549, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb978062820ULL }, // Inst #18592 = VPRORQZmikz |
| 28565 | { 18591, 9, 1, 0, 549, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab978062820ULL }, // Inst #18591 = VPRORQZmik |
| 28566 | { 18590, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b978062820ULL }, // Inst #18590 = VPRORQZmi |
| 28567 | { 18589, 8, 1, 0, 549, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb978062820ULL }, // Inst #18589 = VPRORQZmbikz |
| 28568 | { 18588, 9, 1, 0, 549, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab978062820ULL }, // Inst #18588 = VPRORQZmbik |
| 28569 | { 18587, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b978062820ULL }, // Inst #18587 = VPRORQZmbi |
| 28570 | { 18586, 4, 1, 0, 1097, 0, 0, 4579, X86ImpOpBase + 0, 0, 0xc7b978062830ULL }, // Inst #18586 = VPRORQZ256rikz |
| 28571 | { 18585, 5, 1, 0, 1097, 0, 0, 4574, X86ImpOpBase + 0, 0, 0xc3b978062830ULL }, // Inst #18585 = VPRORQZ256rik |
| 28572 | { 18584, 3, 1, 0, 1097, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b978062830ULL }, // Inst #18584 = VPRORQZ256ri |
| 28573 | { 18583, 8, 1, 0, 547, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b978062820ULL }, // Inst #18583 = VPRORQZ256mikz |
| 28574 | { 18582, 9, 1, 0, 547, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b978062820ULL }, // Inst #18582 = VPRORQZ256mik |
| 28575 | { 18581, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b978062820ULL }, // Inst #18581 = VPRORQZ256mi |
| 28576 | { 18580, 8, 1, 0, 547, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b978062820ULL }, // Inst #18580 = VPRORQZ256mbikz |
| 28577 | { 18579, 9, 1, 0, 547, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b978062820ULL }, // Inst #18579 = VPRORQZ256mbik |
| 28578 | { 18578, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b978062820ULL }, // Inst #18578 = VPRORQZ256mbi |
| 28579 | { 18577, 4, 1, 0, 1098, 0, 0, 4553, X86ImpOpBase + 0, 0, 0xa6b978062830ULL }, // Inst #18577 = VPRORQZ128rikz |
| 28580 | { 18576, 5, 1, 0, 1098, 0, 0, 4548, X86ImpOpBase + 0, 0, 0xa2b978062830ULL }, // Inst #18576 = VPRORQZ128rik |
| 28581 | { 18575, 3, 1, 0, 1098, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b978062830ULL }, // Inst #18575 = VPRORQZ128ri |
| 28582 | { 18574, 8, 1, 0, 546, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b978062820ULL }, // Inst #18574 = VPRORQZ128mikz |
| 28583 | { 18573, 9, 1, 0, 546, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b978062820ULL }, // Inst #18573 = VPRORQZ128mik |
| 28584 | { 18572, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b978062820ULL }, // Inst #18572 = VPRORQZ128mi |
| 28585 | { 18571, 8, 1, 0, 546, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b978062820ULL }, // Inst #18571 = VPRORQZ128mbikz |
| 28586 | { 18570, 9, 1, 0, 546, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b978062820ULL }, // Inst #18570 = VPRORQZ128mbik |
| 28587 | { 18569, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b978062820ULL }, // Inst #18569 = VPRORQZ128mbi |
| 28588 | { 18568, 4, 1, 0, 1099, 0, 0, 4674, X86ImpOpBase + 0, 0, 0xeeb978042830ULL }, // Inst #18568 = VPRORDZrikz |
| 28589 | { 18567, 5, 1, 0, 1099, 0, 0, 4669, X86ImpOpBase + 0, 0, 0xeab978042830ULL }, // Inst #18567 = VPRORDZrik |
| 28590 | { 18566, 3, 1, 0, 1099, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b978042830ULL }, // Inst #18566 = VPRORDZri |
| 28591 | { 18565, 8, 1, 0, 549, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb978042820ULL }, // Inst #18565 = VPRORDZmikz |
| 28592 | { 18564, 9, 1, 0, 549, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab978042820ULL }, // Inst #18564 = VPRORDZmik |
| 28593 | { 18563, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b978042820ULL }, // Inst #18563 = VPRORDZmi |
| 28594 | { 18562, 8, 1, 0, 549, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb978042820ULL }, // Inst #18562 = VPRORDZmbikz |
| 28595 | { 18561, 9, 1, 0, 549, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab978042820ULL }, // Inst #18561 = VPRORDZmbik |
| 28596 | { 18560, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b978042820ULL }, // Inst #18560 = VPRORDZmbi |
| 28597 | { 18559, 4, 1, 0, 1097, 0, 0, 4648, X86ImpOpBase + 0, 0, 0xc7b978042830ULL }, // Inst #18559 = VPRORDZ256rikz |
| 28598 | { 18558, 5, 1, 0, 1097, 0, 0, 4643, X86ImpOpBase + 0, 0, 0xc3b978042830ULL }, // Inst #18558 = VPRORDZ256rik |
| 28599 | { 18557, 3, 1, 0, 1097, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b978042830ULL }, // Inst #18557 = VPRORDZ256ri |
| 28600 | { 18556, 8, 1, 0, 547, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b978042820ULL }, // Inst #18556 = VPRORDZ256mikz |
| 28601 | { 18555, 9, 1, 0, 547, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b978042820ULL }, // Inst #18555 = VPRORDZ256mik |
| 28602 | { 18554, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b978042820ULL }, // Inst #18554 = VPRORDZ256mi |
| 28603 | { 18553, 8, 1, 0, 547, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b978042820ULL }, // Inst #18553 = VPRORDZ256mbikz |
| 28604 | { 18552, 9, 1, 0, 547, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b978042820ULL }, // Inst #18552 = VPRORDZ256mbik |
| 28605 | { 18551, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b978042820ULL }, // Inst #18551 = VPRORDZ256mbi |
| 28606 | { 18550, 4, 1, 0, 1098, 0, 0, 3316, X86ImpOpBase + 0, 0, 0xa6b978042830ULL }, // Inst #18550 = VPRORDZ128rikz |
| 28607 | { 18549, 5, 1, 0, 1098, 0, 0, 3311, X86ImpOpBase + 0, 0, 0xa2b978042830ULL }, // Inst #18549 = VPRORDZ128rik |
| 28608 | { 18548, 3, 1, 0, 1098, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b978042830ULL }, // Inst #18548 = VPRORDZ128ri |
| 28609 | { 18547, 8, 1, 0, 546, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b978042820ULL }, // Inst #18547 = VPRORDZ128mikz |
| 28610 | { 18546, 9, 1, 0, 546, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b978042820ULL }, // Inst #18546 = VPRORDZ128mik |
| 28611 | { 18545, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b978042820ULL }, // Inst #18545 = VPRORDZ128mi |
| 28612 | { 18544, 8, 1, 0, 546, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b978042820ULL }, // Inst #18544 = VPRORDZ128mbikz |
| 28613 | { 18543, 9, 1, 0, 546, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b978042820ULL }, // Inst #18543 = VPRORDZ128mbik |
| 28614 | { 18542, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b978042820ULL }, // Inst #18542 = VPRORDZ128mbi |
| 28615 | { 18541, 4, 1, 0, 1096, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xee8af8024829ULL }, // Inst #18541 = VPROLVQZrrkz |
| 28616 | { 18540, 5, 1, 0, 1096, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xea8af8024829ULL }, // Inst #18540 = VPROLVQZrrk |
| 28617 | { 18539, 3, 1, 0, 1096, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88af8024829ULL }, // Inst #18539 = VPROLVQZrr |
| 28618 | { 18538, 8, 1, 0, 555, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8af8024819ULL }, // Inst #18538 = VPROLVQZrmkz |
| 28619 | { 18537, 9, 1, 0, 555, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8af8024819ULL }, // Inst #18537 = VPROLVQZrmk |
| 28620 | { 18536, 8, 1, 0, 555, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e8af8024819ULL }, // Inst #18536 = VPROLVQZrmbkz |
| 28621 | { 18535, 9, 1, 0, 555, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a8af8024819ULL }, // Inst #18535 = VPROLVQZrmbk |
| 28622 | { 18534, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x988af8024819ULL }, // Inst #18534 = VPROLVQZrmb |
| 28623 | { 18533, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88af8024819ULL }, // Inst #18533 = VPROLVQZrm |
| 28624 | { 18532, 4, 1, 0, 1095, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc78af8024829ULL }, // Inst #18532 = VPROLVQZ256rrkz |
| 28625 | { 18531, 5, 1, 0, 1095, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc38af8024829ULL }, // Inst #18531 = VPROLVQZ256rrk |
| 28626 | { 18530, 3, 1, 0, 1095, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18af8024829ULL }, // Inst #18530 = VPROLVQZ256rr |
| 28627 | { 18529, 8, 1, 0, 553, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78af8024819ULL }, // Inst #18529 = VPROLVQZ256rmkz |
| 28628 | { 18528, 9, 1, 0, 553, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38af8024819ULL }, // Inst #18528 = VPROLVQZ256rmk |
| 28629 | { 18527, 8, 1, 0, 553, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x978af8024819ULL }, // Inst #18527 = VPROLVQZ256rmbkz |
| 28630 | { 18526, 9, 1, 0, 553, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x938af8024819ULL }, // Inst #18526 = VPROLVQZ256rmbk |
| 28631 | { 18525, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x918af8024819ULL }, // Inst #18525 = VPROLVQZ256rmb |
| 28632 | { 18524, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18af8024819ULL }, // Inst #18524 = VPROLVQZ256rm |
| 28633 | { 18523, 4, 1, 0, 1094, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa68af8024829ULL }, // Inst #18523 = VPROLVQZ128rrkz |
| 28634 | { 18522, 5, 1, 0, 1094, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa28af8024829ULL }, // Inst #18522 = VPROLVQZ128rrk |
| 28635 | { 18521, 3, 1, 0, 1094, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08af8024829ULL }, // Inst #18521 = VPROLVQZ128rr |
| 28636 | { 18520, 8, 1, 0, 551, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68af8024819ULL }, // Inst #18520 = VPROLVQZ128rmkz |
| 28637 | { 18519, 9, 1, 0, 551, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28af8024819ULL }, // Inst #18519 = VPROLVQZ128rmk |
| 28638 | { 18518, 8, 1, 0, 551, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x968af8024819ULL }, // Inst #18518 = VPROLVQZ128rmbkz |
| 28639 | { 18517, 9, 1, 0, 551, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x928af8024819ULL }, // Inst #18517 = VPROLVQZ128rmbk |
| 28640 | { 18516, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x908af8024819ULL }, // Inst #18516 = VPROLVQZ128rmb |
| 28641 | { 18515, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08af8024819ULL }, // Inst #18515 = VPROLVQZ128rm |
| 28642 | { 18514, 4, 1, 0, 1096, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xee8af8004829ULL }, // Inst #18514 = VPROLVDZrrkz |
| 28643 | { 18513, 5, 1, 0, 1096, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xea8af8004829ULL }, // Inst #18513 = VPROLVDZrrk |
| 28644 | { 18512, 3, 1, 0, 1096, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88af8004829ULL }, // Inst #18512 = VPROLVDZrr |
| 28645 | { 18511, 8, 1, 0, 555, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8af8004819ULL }, // Inst #18511 = VPROLVDZrmkz |
| 28646 | { 18510, 9, 1, 0, 555, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8af8004819ULL }, // Inst #18510 = VPROLVDZrmk |
| 28647 | { 18509, 8, 1, 0, 555, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e8af8004819ULL }, // Inst #18509 = VPROLVDZrmbkz |
| 28648 | { 18508, 9, 1, 0, 555, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a8af8004819ULL }, // Inst #18508 = VPROLVDZrmbk |
| 28649 | { 18507, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x788af8004819ULL }, // Inst #18507 = VPROLVDZrmb |
| 28650 | { 18506, 7, 1, 0, 555, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88af8004819ULL }, // Inst #18506 = VPROLVDZrm |
| 28651 | { 18505, 4, 1, 0, 1095, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc78af8004829ULL }, // Inst #18505 = VPROLVDZ256rrkz |
| 28652 | { 18504, 5, 1, 0, 1095, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc38af8004829ULL }, // Inst #18504 = VPROLVDZ256rrk |
| 28653 | { 18503, 3, 1, 0, 1095, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18af8004829ULL }, // Inst #18503 = VPROLVDZ256rr |
| 28654 | { 18502, 8, 1, 0, 553, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78af8004819ULL }, // Inst #18502 = VPROLVDZ256rmkz |
| 28655 | { 18501, 9, 1, 0, 553, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38af8004819ULL }, // Inst #18501 = VPROLVDZ256rmk |
| 28656 | { 18500, 8, 1, 0, 553, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x778af8004819ULL }, // Inst #18500 = VPROLVDZ256rmbkz |
| 28657 | { 18499, 9, 1, 0, 553, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x738af8004819ULL }, // Inst #18499 = VPROLVDZ256rmbk |
| 28658 | { 18498, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x718af8004819ULL }, // Inst #18498 = VPROLVDZ256rmb |
| 28659 | { 18497, 7, 1, 0, 553, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18af8004819ULL }, // Inst #18497 = VPROLVDZ256rm |
| 28660 | { 18496, 4, 1, 0, 1094, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa68af8004829ULL }, // Inst #18496 = VPROLVDZ128rrkz |
| 28661 | { 18495, 5, 1, 0, 1094, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa28af8004829ULL }, // Inst #18495 = VPROLVDZ128rrk |
| 28662 | { 18494, 3, 1, 0, 1094, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08af8004829ULL }, // Inst #18494 = VPROLVDZ128rr |
| 28663 | { 18493, 8, 1, 0, 551, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68af8004819ULL }, // Inst #18493 = VPROLVDZ128rmkz |
| 28664 | { 18492, 9, 1, 0, 551, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28af8004819ULL }, // Inst #18492 = VPROLVDZ128rmk |
| 28665 | { 18491, 8, 1, 0, 551, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x768af8004819ULL }, // Inst #18491 = VPROLVDZ128rmbkz |
| 28666 | { 18490, 9, 1, 0, 551, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x728af8004819ULL }, // Inst #18490 = VPROLVDZ128rmbk |
| 28667 | { 18489, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x708af8004819ULL }, // Inst #18489 = VPROLVDZ128rmb |
| 28668 | { 18488, 7, 1, 0, 551, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08af8004819ULL }, // Inst #18488 = VPROLVDZ128rm |
| 28669 | { 18487, 4, 1, 0, 1099, 0, 0, 4605, X86ImpOpBase + 0, 0, 0xeeb978062831ULL }, // Inst #18487 = VPROLQZrikz |
| 28670 | { 18486, 5, 1, 0, 1099, 0, 0, 4600, X86ImpOpBase + 0, 0, 0xeab978062831ULL }, // Inst #18486 = VPROLQZrik |
| 28671 | { 18485, 3, 1, 0, 1099, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b978062831ULL }, // Inst #18485 = VPROLQZri |
| 28672 | { 18484, 8, 1, 0, 549, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb978062821ULL }, // Inst #18484 = VPROLQZmikz |
| 28673 | { 18483, 9, 1, 0, 549, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab978062821ULL }, // Inst #18483 = VPROLQZmik |
| 28674 | { 18482, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b978062821ULL }, // Inst #18482 = VPROLQZmi |
| 28675 | { 18481, 8, 1, 0, 549, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb978062821ULL }, // Inst #18481 = VPROLQZmbikz |
| 28676 | { 18480, 9, 1, 0, 549, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab978062821ULL }, // Inst #18480 = VPROLQZmbik |
| 28677 | { 18479, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b978062821ULL }, // Inst #18479 = VPROLQZmbi |
| 28678 | { 18478, 4, 1, 0, 1097, 0, 0, 4579, X86ImpOpBase + 0, 0, 0xc7b978062831ULL }, // Inst #18478 = VPROLQZ256rikz |
| 28679 | { 18477, 5, 1, 0, 1097, 0, 0, 4574, X86ImpOpBase + 0, 0, 0xc3b978062831ULL }, // Inst #18477 = VPROLQZ256rik |
| 28680 | { 18476, 3, 1, 0, 1097, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b978062831ULL }, // Inst #18476 = VPROLQZ256ri |
| 28681 | { 18475, 8, 1, 0, 547, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b978062821ULL }, // Inst #18475 = VPROLQZ256mikz |
| 28682 | { 18474, 9, 1, 0, 547, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b978062821ULL }, // Inst #18474 = VPROLQZ256mik |
| 28683 | { 18473, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b978062821ULL }, // Inst #18473 = VPROLQZ256mi |
| 28684 | { 18472, 8, 1, 0, 547, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b978062821ULL }, // Inst #18472 = VPROLQZ256mbikz |
| 28685 | { 18471, 9, 1, 0, 547, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b978062821ULL }, // Inst #18471 = VPROLQZ256mbik |
| 28686 | { 18470, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b978062821ULL }, // Inst #18470 = VPROLQZ256mbi |
| 28687 | { 18469, 4, 1, 0, 1098, 0, 0, 4553, X86ImpOpBase + 0, 0, 0xa6b978062831ULL }, // Inst #18469 = VPROLQZ128rikz |
| 28688 | { 18468, 5, 1, 0, 1098, 0, 0, 4548, X86ImpOpBase + 0, 0, 0xa2b978062831ULL }, // Inst #18468 = VPROLQZ128rik |
| 28689 | { 18467, 3, 1, 0, 1098, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b978062831ULL }, // Inst #18467 = VPROLQZ128ri |
| 28690 | { 18466, 8, 1, 0, 546, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b978062821ULL }, // Inst #18466 = VPROLQZ128mikz |
| 28691 | { 18465, 9, 1, 0, 546, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b978062821ULL }, // Inst #18465 = VPROLQZ128mik |
| 28692 | { 18464, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b978062821ULL }, // Inst #18464 = VPROLQZ128mi |
| 28693 | { 18463, 8, 1, 0, 546, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b978062821ULL }, // Inst #18463 = VPROLQZ128mbikz |
| 28694 | { 18462, 9, 1, 0, 546, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b978062821ULL }, // Inst #18462 = VPROLQZ128mbik |
| 28695 | { 18461, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b978062821ULL }, // Inst #18461 = VPROLQZ128mbi |
| 28696 | { 18460, 4, 1, 0, 1099, 0, 0, 4674, X86ImpOpBase + 0, 0, 0xeeb978042831ULL }, // Inst #18460 = VPROLDZrikz |
| 28697 | { 18459, 5, 1, 0, 1099, 0, 0, 4669, X86ImpOpBase + 0, 0, 0xeab978042831ULL }, // Inst #18459 = VPROLDZrik |
| 28698 | { 18458, 3, 1, 0, 1099, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe8b978042831ULL }, // Inst #18458 = VPROLDZri |
| 28699 | { 18457, 8, 1, 0, 549, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb978042821ULL }, // Inst #18457 = VPROLDZmikz |
| 28700 | { 18456, 9, 1, 0, 549, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab978042821ULL }, // Inst #18456 = VPROLDZmik |
| 28701 | { 18455, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b978042821ULL }, // Inst #18455 = VPROLDZmi |
| 28702 | { 18454, 8, 1, 0, 549, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb978042821ULL }, // Inst #18454 = VPROLDZmbikz |
| 28703 | { 18453, 9, 1, 0, 549, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab978042821ULL }, // Inst #18453 = VPROLDZmbik |
| 28704 | { 18452, 7, 1, 0, 549, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b978042821ULL }, // Inst #18452 = VPROLDZmbi |
| 28705 | { 18451, 4, 1, 0, 1097, 0, 0, 4648, X86ImpOpBase + 0, 0, 0xc7b978042831ULL }, // Inst #18451 = VPROLDZ256rikz |
| 28706 | { 18450, 5, 1, 0, 1097, 0, 0, 4643, X86ImpOpBase + 0, 0, 0xc3b978042831ULL }, // Inst #18450 = VPROLDZ256rik |
| 28707 | { 18449, 3, 1, 0, 1097, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc1b978042831ULL }, // Inst #18449 = VPROLDZ256ri |
| 28708 | { 18448, 8, 1, 0, 547, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b978042821ULL }, // Inst #18448 = VPROLDZ256mikz |
| 28709 | { 18447, 9, 1, 0, 547, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b978042821ULL }, // Inst #18447 = VPROLDZ256mik |
| 28710 | { 18446, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b978042821ULL }, // Inst #18446 = VPROLDZ256mi |
| 28711 | { 18445, 8, 1, 0, 547, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b978042821ULL }, // Inst #18445 = VPROLDZ256mbikz |
| 28712 | { 18444, 9, 1, 0, 547, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b978042821ULL }, // Inst #18444 = VPROLDZ256mbik |
| 28713 | { 18443, 7, 1, 0, 547, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b978042821ULL }, // Inst #18443 = VPROLDZ256mbi |
| 28714 | { 18442, 4, 1, 0, 1098, 0, 0, 3316, X86ImpOpBase + 0, 0, 0xa6b978042831ULL }, // Inst #18442 = VPROLDZ128rikz |
| 28715 | { 18441, 5, 1, 0, 1098, 0, 0, 3311, X86ImpOpBase + 0, 0, 0xa2b978042831ULL }, // Inst #18441 = VPROLDZ128rik |
| 28716 | { 18440, 3, 1, 0, 1098, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa0b978042831ULL }, // Inst #18440 = VPROLDZ128ri |
| 28717 | { 18439, 8, 1, 0, 546, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b978042821ULL }, // Inst #18439 = VPROLDZ128mikz |
| 28718 | { 18438, 9, 1, 0, 546, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b978042821ULL }, // Inst #18438 = VPROLDZ128mik |
| 28719 | { 18437, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b978042821ULL }, // Inst #18437 = VPROLDZ128mi |
| 28720 | { 18436, 8, 1, 0, 546, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b978042821ULL }, // Inst #18436 = VPROLDZ128mbikz |
| 28721 | { 18435, 9, 1, 0, 546, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b978042821ULL }, // Inst #18435 = VPROLDZ128mbik |
| 28722 | { 18434, 7, 1, 0, 546, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b978042821ULL }, // Inst #18434 = VPROLDZ128mbi |
| 28723 | { 18433, 4, 1, 0, 1188, 0, 0, 2295, X86ImpOpBase + 0, 0, 0xd1d80e802bULL }, // Inst #18433 = VPPERMrrr_REV |
| 28724 | { 18432, 4, 1, 0, 1188, 0, 0, 2295, X86ImpOpBase + 0, 0, 0xd1d80c8029ULL }, // Inst #18432 = VPPERMrrr |
| 28725 | { 18431, 8, 1, 0, 1189, 0, 0, 4074, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xd1d80e801bULL }, // Inst #18431 = VPPERMrrm |
| 28726 | { 18430, 8, 1, 0, 1190, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xd1d80c8019ULL }, // Inst #18430 = VPPERMrmr |
| 28727 | { 18429, 3, 1, 0, 183, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf5b8002829ULL }, // Inst #18429 = VPORrr |
| 28728 | { 18428, 7, 1, 0, 252, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf5b8002819ULL }, // Inst #18428 = VPORrm |
| 28729 | { 18427, 3, 1, 0, 495, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f5b8002829ULL }, // Inst #18427 = VPORYrr |
| 28730 | { 18426, 7, 1, 0, 494, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f5b8002819ULL }, // Inst #18426 = VPORYrm |
| 28731 | { 18425, 4, 1, 0, 497, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef5f8022829ULL }, // Inst #18425 = VPORQZrrkz |
| 28732 | { 18424, 5, 1, 0, 497, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf5f8022829ULL }, // Inst #18424 = VPORQZrrk |
| 28733 | { 18423, 3, 1, 0, 497, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f5f8022829ULL }, // Inst #18423 = VPORQZrr |
| 28734 | { 18422, 8, 1, 0, 496, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef5f8022819ULL }, // Inst #18422 = VPORQZrmkz |
| 28735 | { 18421, 9, 1, 0, 496, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf5f8022819ULL }, // Inst #18421 = VPORQZrmk |
| 28736 | { 18420, 8, 1, 0, 496, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ef5f8022819ULL }, // Inst #18420 = VPORQZrmbkz |
| 28737 | { 18419, 9, 1, 0, 496, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9af5f8022819ULL }, // Inst #18419 = VPORQZrmbk |
| 28738 | { 18418, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98f5f8022819ULL }, // Inst #18418 = VPORQZrmb |
| 28739 | { 18417, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f5f8022819ULL }, // Inst #18417 = VPORQZrm |
| 28740 | { 18416, 4, 1, 0, 495, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f5f8022829ULL }, // Inst #18416 = VPORQZ256rrkz |
| 28741 | { 18415, 5, 1, 0, 495, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f5f8022829ULL }, // Inst #18415 = VPORQZ256rrk |
| 28742 | { 18414, 3, 1, 0, 495, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f5f8022829ULL }, // Inst #18414 = VPORQZ256rr |
| 28743 | { 18413, 8, 1, 0, 494, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f5f8022819ULL }, // Inst #18413 = VPORQZ256rmkz |
| 28744 | { 18412, 9, 1, 0, 494, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f5f8022819ULL }, // Inst #18412 = VPORQZ256rmk |
| 28745 | { 18411, 8, 1, 0, 494, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97f5f8022819ULL }, // Inst #18411 = VPORQZ256rmbkz |
| 28746 | { 18410, 9, 1, 0, 494, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93f5f8022819ULL }, // Inst #18410 = VPORQZ256rmbk |
| 28747 | { 18409, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91f5f8022819ULL }, // Inst #18409 = VPORQZ256rmb |
| 28748 | { 18408, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f5f8022819ULL }, // Inst #18408 = VPORQZ256rm |
| 28749 | { 18407, 4, 1, 0, 183, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f5f8022829ULL }, // Inst #18407 = VPORQZ128rrkz |
| 28750 | { 18406, 5, 1, 0, 183, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f5f8022829ULL }, // Inst #18406 = VPORQZ128rrk |
| 28751 | { 18405, 3, 1, 0, 183, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f5f8022829ULL }, // Inst #18405 = VPORQZ128rr |
| 28752 | { 18404, 8, 1, 0, 252, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f5f8022819ULL }, // Inst #18404 = VPORQZ128rmkz |
| 28753 | { 18403, 9, 1, 0, 252, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f5f8022819ULL }, // Inst #18403 = VPORQZ128rmk |
| 28754 | { 18402, 8, 1, 0, 252, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96f5f8022819ULL }, // Inst #18402 = VPORQZ128rmbkz |
| 28755 | { 18401, 9, 1, 0, 252, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92f5f8022819ULL }, // Inst #18401 = VPORQZ128rmbk |
| 28756 | { 18400, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90f5f8022819ULL }, // Inst #18400 = VPORQZ128rmb |
| 28757 | { 18399, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f5f8022819ULL }, // Inst #18399 = VPORQZ128rm |
| 28758 | { 18398, 4, 1, 0, 497, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef5f8002829ULL }, // Inst #18398 = VPORDZrrkz |
| 28759 | { 18397, 5, 1, 0, 497, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf5f8002829ULL }, // Inst #18397 = VPORDZrrk |
| 28760 | { 18396, 3, 1, 0, 497, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f5f8002829ULL }, // Inst #18396 = VPORDZrr |
| 28761 | { 18395, 8, 1, 0, 496, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef5f8002819ULL }, // Inst #18395 = VPORDZrmkz |
| 28762 | { 18394, 9, 1, 0, 496, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf5f8002819ULL }, // Inst #18394 = VPORDZrmk |
| 28763 | { 18393, 8, 1, 0, 496, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ef5f8002819ULL }, // Inst #18393 = VPORDZrmbkz |
| 28764 | { 18392, 9, 1, 0, 496, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7af5f8002819ULL }, // Inst #18392 = VPORDZrmbk |
| 28765 | { 18391, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78f5f8002819ULL }, // Inst #18391 = VPORDZrmb |
| 28766 | { 18390, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f5f8002819ULL }, // Inst #18390 = VPORDZrm |
| 28767 | { 18389, 4, 1, 0, 495, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f5f8002829ULL }, // Inst #18389 = VPORDZ256rrkz |
| 28768 | { 18388, 5, 1, 0, 495, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f5f8002829ULL }, // Inst #18388 = VPORDZ256rrk |
| 28769 | { 18387, 3, 1, 0, 495, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f5f8002829ULL }, // Inst #18387 = VPORDZ256rr |
| 28770 | { 18386, 8, 1, 0, 494, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f5f8002819ULL }, // Inst #18386 = VPORDZ256rmkz |
| 28771 | { 18385, 9, 1, 0, 494, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f5f8002819ULL }, // Inst #18385 = VPORDZ256rmk |
| 28772 | { 18384, 8, 1, 0, 494, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77f5f8002819ULL }, // Inst #18384 = VPORDZ256rmbkz |
| 28773 | { 18383, 9, 1, 0, 494, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73f5f8002819ULL }, // Inst #18383 = VPORDZ256rmbk |
| 28774 | { 18382, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71f5f8002819ULL }, // Inst #18382 = VPORDZ256rmb |
| 28775 | { 18381, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f5f8002819ULL }, // Inst #18381 = VPORDZ256rm |
| 28776 | { 18380, 4, 1, 0, 183, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f5f8002829ULL }, // Inst #18380 = VPORDZ128rrkz |
| 28777 | { 18379, 5, 1, 0, 183, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f5f8002829ULL }, // Inst #18379 = VPORDZ128rrk |
| 28778 | { 18378, 3, 1, 0, 183, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f5f8002829ULL }, // Inst #18378 = VPORDZ128rr |
| 28779 | { 18377, 8, 1, 0, 252, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f5f8002819ULL }, // Inst #18377 = VPORDZ128rmkz |
| 28780 | { 18376, 9, 1, 0, 252, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f5f8002819ULL }, // Inst #18376 = VPORDZ128rmk |
| 28781 | { 18375, 8, 1, 0, 252, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76f5f8002819ULL }, // Inst #18375 = VPORDZ128rmbkz |
| 28782 | { 18374, 9, 1, 0, 252, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72f5f8002819ULL }, // Inst #18374 = VPORDZ128rmbk |
| 28783 | { 18373, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70f5f8002819ULL }, // Inst #18373 = VPORDZ128rmb |
| 28784 | { 18372, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f5f8002819ULL }, // Inst #18372 = VPORDZ128rm |
| 28785 | { 18371, 3, 1, 0, 2170, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee2a78024829ULL }, // Inst #18371 = VPOPCNTWZrrkz |
| 28786 | { 18370, 4, 1, 0, 2170, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea2a78024829ULL }, // Inst #18370 = VPOPCNTWZrrk |
| 28787 | { 18369, 2, 1, 0, 456, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82a78024829ULL }, // Inst #18369 = VPOPCNTWZrr |
| 28788 | { 18368, 7, 1, 0, 1880, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2a78024819ULL }, // Inst #18368 = VPOPCNTWZrmkz |
| 28789 | { 18367, 8, 1, 0, 1880, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2a78024819ULL }, // Inst #18367 = VPOPCNTWZrmk |
| 28790 | { 18366, 6, 1, 0, 1950, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82a78024819ULL }, // Inst #18366 = VPOPCNTWZrm |
| 28791 | { 18365, 3, 1, 0, 2169, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc72a78024829ULL }, // Inst #18365 = VPOPCNTWZ256rrkz |
| 28792 | { 18364, 4, 1, 0, 2169, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc32a78024829ULL }, // Inst #18364 = VPOPCNTWZ256rrk |
| 28793 | { 18363, 2, 1, 0, 1734, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12a78024829ULL }, // Inst #18363 = VPOPCNTWZ256rr |
| 28794 | { 18362, 7, 1, 0, 1879, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72a78024819ULL }, // Inst #18362 = VPOPCNTWZ256rmkz |
| 28795 | { 18361, 8, 1, 0, 1879, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32a78024819ULL }, // Inst #18361 = VPOPCNTWZ256rmk |
| 28796 | { 18360, 6, 1, 0, 1949, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12a78024819ULL }, // Inst #18360 = VPOPCNTWZ256rm |
| 28797 | { 18359, 3, 1, 0, 2171, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa62a78024829ULL }, // Inst #18359 = VPOPCNTWZ128rrkz |
| 28798 | { 18358, 4, 1, 0, 2171, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa22a78024829ULL }, // Inst #18358 = VPOPCNTWZ128rrk |
| 28799 | { 18357, 2, 1, 0, 1735, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02a78024829ULL }, // Inst #18357 = VPOPCNTWZ128rr |
| 28800 | { 18356, 7, 1, 0, 1878, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62a78024819ULL }, // Inst #18356 = VPOPCNTWZ128rmkz |
| 28801 | { 18355, 8, 1, 0, 1878, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22a78024819ULL }, // Inst #18355 = VPOPCNTWZ128rmk |
| 28802 | { 18354, 6, 1, 0, 1705, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02a78024819ULL }, // Inst #18354 = VPOPCNTWZ128rm |
| 28803 | { 18353, 3, 1, 0, 456, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee2af8024829ULL }, // Inst #18353 = VPOPCNTQZrrkz |
| 28804 | { 18352, 4, 1, 0, 456, 0, 0, 2804, X86ImpOpBase + 0, 0, 0xea2af8024829ULL }, // Inst #18352 = VPOPCNTQZrrk |
| 28805 | { 18351, 2, 1, 0, 456, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82af8024829ULL }, // Inst #18351 = VPOPCNTQZrr |
| 28806 | { 18350, 7, 1, 0, 1950, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2af8024819ULL }, // Inst #18350 = VPOPCNTQZrmkz |
| 28807 | { 18349, 8, 1, 0, 1950, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2af8024819ULL }, // Inst #18349 = VPOPCNTQZrmk |
| 28808 | { 18348, 7, 1, 0, 1950, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e2af8024819ULL }, // Inst #18348 = VPOPCNTQZrmbkz |
| 28809 | { 18347, 8, 1, 0, 1950, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a2af8024819ULL }, // Inst #18347 = VPOPCNTQZrmbk |
| 28810 | { 18346, 6, 1, 0, 1950, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x982af8024819ULL }, // Inst #18346 = VPOPCNTQZrmb |
| 28811 | { 18345, 6, 1, 0, 1950, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82af8024819ULL }, // Inst #18345 = VPOPCNTQZrm |
| 28812 | { 18344, 3, 1, 0, 1734, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc72af8024829ULL }, // Inst #18344 = VPOPCNTQZ256rrkz |
| 28813 | { 18343, 4, 1, 0, 1734, 0, 0, 2782, X86ImpOpBase + 0, 0, 0xc32af8024829ULL }, // Inst #18343 = VPOPCNTQZ256rrk |
| 28814 | { 18342, 2, 1, 0, 1734, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12af8024829ULL }, // Inst #18342 = VPOPCNTQZ256rr |
| 28815 | { 18341, 7, 1, 0, 1949, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72af8024819ULL }, // Inst #18341 = VPOPCNTQZ256rmkz |
| 28816 | { 18340, 8, 1, 0, 1949, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32af8024819ULL }, // Inst #18340 = VPOPCNTQZ256rmk |
| 28817 | { 18339, 7, 1, 0, 1949, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x972af8024819ULL }, // Inst #18339 = VPOPCNTQZ256rmbkz |
| 28818 | { 18338, 8, 1, 0, 1949, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x932af8024819ULL }, // Inst #18338 = VPOPCNTQZ256rmbk |
| 28819 | { 18337, 6, 1, 0, 1949, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x912af8024819ULL }, // Inst #18337 = VPOPCNTQZ256rmb |
| 28820 | { 18336, 6, 1, 0, 1949, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12af8024819ULL }, // Inst #18336 = VPOPCNTQZ256rm |
| 28821 | { 18335, 3, 1, 0, 1735, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa62af8024829ULL }, // Inst #18335 = VPOPCNTQZ128rrkz |
| 28822 | { 18334, 4, 1, 0, 1735, 0, 0, 2766, X86ImpOpBase + 0, 0, 0xa22af8024829ULL }, // Inst #18334 = VPOPCNTQZ128rrk |
| 28823 | { 18333, 2, 1, 0, 1735, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02af8024829ULL }, // Inst #18333 = VPOPCNTQZ128rr |
| 28824 | { 18332, 7, 1, 0, 1705, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62af8024819ULL }, // Inst #18332 = VPOPCNTQZ128rmkz |
| 28825 | { 18331, 8, 1, 0, 1705, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22af8024819ULL }, // Inst #18331 = VPOPCNTQZ128rmk |
| 28826 | { 18330, 7, 1, 0, 1705, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x962af8024819ULL }, // Inst #18330 = VPOPCNTQZ128rmbkz |
| 28827 | { 18329, 8, 1, 0, 1705, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x922af8024819ULL }, // Inst #18329 = VPOPCNTQZ128rmbk |
| 28828 | { 18328, 6, 1, 0, 1705, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x902af8024819ULL }, // Inst #18328 = VPOPCNTQZ128rmb |
| 28829 | { 18327, 6, 1, 0, 1705, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02af8024819ULL }, // Inst #18327 = VPOPCNTQZ128rm |
| 28830 | { 18326, 3, 1, 0, 456, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee2af8004829ULL }, // Inst #18326 = VPOPCNTDZrrkz |
| 28831 | { 18325, 4, 1, 0, 456, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea2af8004829ULL }, // Inst #18325 = VPOPCNTDZrrk |
| 28832 | { 18324, 2, 1, 0, 456, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82af8004829ULL }, // Inst #18324 = VPOPCNTDZrr |
| 28833 | { 18323, 7, 1, 0, 1950, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2af8004819ULL }, // Inst #18323 = VPOPCNTDZrmkz |
| 28834 | { 18322, 8, 1, 0, 1950, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2af8004819ULL }, // Inst #18322 = VPOPCNTDZrmk |
| 28835 | { 18321, 7, 1, 0, 1950, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e2af8004819ULL }, // Inst #18321 = VPOPCNTDZrmbkz |
| 28836 | { 18320, 8, 1, 0, 1950, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a2af8004819ULL }, // Inst #18320 = VPOPCNTDZrmbk |
| 28837 | { 18319, 6, 1, 0, 1950, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x782af8004819ULL }, // Inst #18319 = VPOPCNTDZrmb |
| 28838 | { 18318, 6, 1, 0, 1950, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82af8004819ULL }, // Inst #18318 = VPOPCNTDZrm |
| 28839 | { 18317, 3, 1, 0, 1734, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc72af8004829ULL }, // Inst #18317 = VPOPCNTDZ256rrkz |
| 28840 | { 18316, 4, 1, 0, 1734, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc32af8004829ULL }, // Inst #18316 = VPOPCNTDZ256rrk |
| 28841 | { 18315, 2, 1, 0, 1734, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12af8004829ULL }, // Inst #18315 = VPOPCNTDZ256rr |
| 28842 | { 18314, 7, 1, 0, 1949, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72af8004819ULL }, // Inst #18314 = VPOPCNTDZ256rmkz |
| 28843 | { 18313, 8, 1, 0, 1949, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32af8004819ULL }, // Inst #18313 = VPOPCNTDZ256rmk |
| 28844 | { 18312, 7, 1, 0, 1949, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x772af8004819ULL }, // Inst #18312 = VPOPCNTDZ256rmbkz |
| 28845 | { 18311, 8, 1, 0, 1949, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x732af8004819ULL }, // Inst #18311 = VPOPCNTDZ256rmbk |
| 28846 | { 18310, 6, 1, 0, 1949, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x712af8004819ULL }, // Inst #18310 = VPOPCNTDZ256rmb |
| 28847 | { 18309, 6, 1, 0, 1949, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12af8004819ULL }, // Inst #18309 = VPOPCNTDZ256rm |
| 28848 | { 18308, 3, 1, 0, 1735, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa62af8004829ULL }, // Inst #18308 = VPOPCNTDZ128rrkz |
| 28849 | { 18307, 4, 1, 0, 1735, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa22af8004829ULL }, // Inst #18307 = VPOPCNTDZ128rrk |
| 28850 | { 18306, 2, 1, 0, 1735, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02af8004829ULL }, // Inst #18306 = VPOPCNTDZ128rr |
| 28851 | { 18305, 7, 1, 0, 1705, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62af8004819ULL }, // Inst #18305 = VPOPCNTDZ128rmkz |
| 28852 | { 18304, 8, 1, 0, 1705, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22af8004819ULL }, // Inst #18304 = VPOPCNTDZ128rmk |
| 28853 | { 18303, 7, 1, 0, 1705, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x762af8004819ULL }, // Inst #18303 = VPOPCNTDZ128rmbkz |
| 28854 | { 18302, 8, 1, 0, 1705, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x722af8004819ULL }, // Inst #18302 = VPOPCNTDZ128rmbk |
| 28855 | { 18301, 6, 1, 0, 1705, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x702af8004819ULL }, // Inst #18301 = VPOPCNTDZ128rmb |
| 28856 | { 18300, 6, 1, 0, 1705, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02af8004819ULL }, // Inst #18300 = VPOPCNTDZ128rm |
| 28857 | { 18299, 3, 1, 0, 2170, 0, 0, 4991, X86ImpOpBase + 0, 0, 0xee2a78004829ULL }, // Inst #18299 = VPOPCNTBZrrkz |
| 28858 | { 18298, 4, 1, 0, 2170, 0, 0, 4987, X86ImpOpBase + 0, 0, 0xea2a78004829ULL }, // Inst #18298 = VPOPCNTBZrrk |
| 28859 | { 18297, 2, 1, 0, 456, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82a78004829ULL }, // Inst #18297 = VPOPCNTBZrr |
| 28860 | { 18296, 7, 1, 0, 1880, 0, 0, 4980, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2a78004819ULL }, // Inst #18296 = VPOPCNTBZrmkz |
| 28861 | { 18295, 8, 1, 0, 1880, 0, 0, 4972, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2a78004819ULL }, // Inst #18295 = VPOPCNTBZrmk |
| 28862 | { 18294, 6, 1, 0, 1950, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82a78004819ULL }, // Inst #18294 = VPOPCNTBZrm |
| 28863 | { 18293, 3, 1, 0, 2169, 0, 0, 4962, X86ImpOpBase + 0, 0, 0xc72a78004829ULL }, // Inst #18293 = VPOPCNTBZ256rrkz |
| 28864 | { 18292, 4, 1, 0, 2169, 0, 0, 4958, X86ImpOpBase + 0, 0, 0xc32a78004829ULL }, // Inst #18292 = VPOPCNTBZ256rrk |
| 28865 | { 18291, 2, 1, 0, 1734, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12a78004829ULL }, // Inst #18291 = VPOPCNTBZ256rr |
| 28866 | { 18290, 7, 1, 0, 1879, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72a78004819ULL }, // Inst #18290 = VPOPCNTBZ256rmkz |
| 28867 | { 18289, 8, 1, 0, 1879, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32a78004819ULL }, // Inst #18289 = VPOPCNTBZ256rmk |
| 28868 | { 18288, 6, 1, 0, 1949, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12a78004819ULL }, // Inst #18288 = VPOPCNTBZ256rm |
| 28869 | { 18287, 3, 1, 0, 2171, 0, 0, 4948, X86ImpOpBase + 0, 0, 0xa62a78004829ULL }, // Inst #18287 = VPOPCNTBZ128rrkz |
| 28870 | { 18286, 4, 1, 0, 2171, 0, 0, 4944, X86ImpOpBase + 0, 0, 0xa22a78004829ULL }, // Inst #18286 = VPOPCNTBZ128rrk |
| 28871 | { 18285, 2, 1, 0, 1735, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02a78004829ULL }, // Inst #18285 = VPOPCNTBZ128rr |
| 28872 | { 18284, 7, 1, 0, 1878, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62a78004819ULL }, // Inst #18284 = VPOPCNTBZ128rmkz |
| 28873 | { 18283, 8, 1, 0, 1878, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22a78004819ULL }, // Inst #18283 = VPOPCNTBZ128rmk |
| 28874 | { 18282, 6, 1, 0, 1705, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02a78004819ULL }, // Inst #18282 = VPOPCNTBZ128rm |
| 28875 | { 18281, 3, 1, 0, 1677, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xfa38002829ULL }, // Inst #18281 = VPMULUDQrr |
| 28876 | { 18280, 7, 1, 0, 1675, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfa38002819ULL }, // Inst #18280 = VPMULUDQrm |
| 28877 | { 18279, 4, 1, 0, 384, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeefa78022829ULL }, // Inst #18279 = VPMULUDQZrrkz |
| 28878 | { 18278, 5, 1, 0, 384, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeafa78022829ULL }, // Inst #18278 = VPMULUDQZrrk |
| 28879 | { 18277, 3, 1, 0, 384, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8fa78022829ULL }, // Inst #18277 = VPMULUDQZrr |
| 28880 | { 18276, 8, 1, 0, 383, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeefa78022819ULL }, // Inst #18276 = VPMULUDQZrmkz |
| 28881 | { 18275, 9, 1, 0, 383, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeafa78022819ULL }, // Inst #18275 = VPMULUDQZrmk |
| 28882 | { 18274, 8, 1, 0, 383, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9efa78022819ULL }, // Inst #18274 = VPMULUDQZrmbkz |
| 28883 | { 18273, 9, 1, 0, 383, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9afa78022819ULL }, // Inst #18273 = VPMULUDQZrmbk |
| 28884 | { 18272, 7, 1, 0, 383, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98fa78022819ULL }, // Inst #18272 = VPMULUDQZrmb |
| 28885 | { 18271, 7, 1, 0, 383, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8fa78022819ULL }, // Inst #18271 = VPMULUDQZrm |
| 28886 | { 18270, 4, 1, 0, 382, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7fa78022829ULL }, // Inst #18270 = VPMULUDQZ256rrkz |
| 28887 | { 18269, 5, 1, 0, 382, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3fa78022829ULL }, // Inst #18269 = VPMULUDQZ256rrk |
| 28888 | { 18268, 3, 1, 0, 382, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1fa78022829ULL }, // Inst #18268 = VPMULUDQZ256rr |
| 28889 | { 18267, 8, 1, 0, 381, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7fa78022819ULL }, // Inst #18267 = VPMULUDQZ256rmkz |
| 28890 | { 18266, 9, 1, 0, 381, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3fa78022819ULL }, // Inst #18266 = VPMULUDQZ256rmk |
| 28891 | { 18265, 8, 1, 0, 381, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97fa78022819ULL }, // Inst #18265 = VPMULUDQZ256rmbkz |
| 28892 | { 18264, 9, 1, 0, 381, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93fa78022819ULL }, // Inst #18264 = VPMULUDQZ256rmbk |
| 28893 | { 18263, 7, 1, 0, 381, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91fa78022819ULL }, // Inst #18263 = VPMULUDQZ256rmb |
| 28894 | { 18262, 7, 1, 0, 381, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1fa78022819ULL }, // Inst #18262 = VPMULUDQZ256rm |
| 28895 | { 18261, 4, 1, 0, 149, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6fa78022829ULL }, // Inst #18261 = VPMULUDQZ128rrkz |
| 28896 | { 18260, 5, 1, 0, 149, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2fa78022829ULL }, // Inst #18260 = VPMULUDQZ128rrk |
| 28897 | { 18259, 3, 1, 0, 149, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0fa78022829ULL }, // Inst #18259 = VPMULUDQZ128rr |
| 28898 | { 18258, 8, 1, 0, 148, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6fa78022819ULL }, // Inst #18258 = VPMULUDQZ128rmkz |
| 28899 | { 18257, 9, 1, 0, 148, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2fa78022819ULL }, // Inst #18257 = VPMULUDQZ128rmk |
| 28900 | { 18256, 8, 1, 0, 148, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96fa78022819ULL }, // Inst #18256 = VPMULUDQZ128rmbkz |
| 28901 | { 18255, 9, 1, 0, 148, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92fa78022819ULL }, // Inst #18255 = VPMULUDQZ128rmbk |
| 28902 | { 18254, 7, 1, 0, 148, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90fa78022819ULL }, // Inst #18254 = VPMULUDQZ128rmb |
| 28903 | { 18253, 7, 1, 0, 148, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0fa78022819ULL }, // Inst #18253 = VPMULUDQZ128rm |
| 28904 | { 18252, 3, 1, 0, 1678, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1fa38002829ULL }, // Inst #18252 = VPMULUDQYrr |
| 28905 | { 18251, 7, 1, 0, 1688, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1fa38002819ULL }, // Inst #18251 = VPMULUDQYrm |
| 28906 | { 18250, 4, 1, 0, 2170, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeec1f8024829ULL }, // Inst #18250 = VPMULTISHIFTQBZrrkz |
| 28907 | { 18249, 5, 1, 0, 2170, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeac1f8024829ULL }, // Inst #18249 = VPMULTISHIFTQBZrrk |
| 28908 | { 18248, 3, 1, 0, 456, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8c1f8024829ULL }, // Inst #18248 = VPMULTISHIFTQBZrr |
| 28909 | { 18247, 8, 1, 0, 1889, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeec1f8024819ULL }, // Inst #18247 = VPMULTISHIFTQBZrmkz |
| 28910 | { 18246, 9, 1, 0, 1889, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeac1f8024819ULL }, // Inst #18246 = VPMULTISHIFTQBZrmk |
| 28911 | { 18245, 8, 1, 0, 1889, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ec1f8024819ULL }, // Inst #18245 = VPMULTISHIFTQBZrmbkz |
| 28912 | { 18244, 9, 1, 0, 1889, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ac1f8024819ULL }, // Inst #18244 = VPMULTISHIFTQBZrmbk |
| 28913 | { 18243, 7, 1, 0, 1958, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98c1f8024819ULL }, // Inst #18243 = VPMULTISHIFTQBZrmb |
| 28914 | { 18242, 7, 1, 0, 1958, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8c1f8024819ULL }, // Inst #18242 = VPMULTISHIFTQBZrm |
| 28915 | { 18241, 4, 1, 0, 2169, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7c1f8024829ULL }, // Inst #18241 = VPMULTISHIFTQBZ256rrkz |
| 28916 | { 18240, 5, 1, 0, 2169, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3c1f8024829ULL }, // Inst #18240 = VPMULTISHIFTQBZ256rrk |
| 28917 | { 18239, 3, 1, 0, 1734, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1c1f8024829ULL }, // Inst #18239 = VPMULTISHIFTQBZ256rr |
| 28918 | { 18238, 8, 1, 0, 1888, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7c1f8024819ULL }, // Inst #18238 = VPMULTISHIFTQBZ256rmkz |
| 28919 | { 18237, 9, 1, 0, 1888, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3c1f8024819ULL }, // Inst #18237 = VPMULTISHIFTQBZ256rmk |
| 28920 | { 18236, 8, 1, 0, 1888, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97c1f8024819ULL }, // Inst #18236 = VPMULTISHIFTQBZ256rmbkz |
| 28921 | { 18235, 9, 1, 0, 1888, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93c1f8024819ULL }, // Inst #18235 = VPMULTISHIFTQBZ256rmbk |
| 28922 | { 18234, 7, 1, 0, 1957, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91c1f8024819ULL }, // Inst #18234 = VPMULTISHIFTQBZ256rmb |
| 28923 | { 18233, 7, 1, 0, 1957, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1c1f8024819ULL }, // Inst #18233 = VPMULTISHIFTQBZ256rm |
| 28924 | { 18232, 4, 1, 0, 2168, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6c1f8024829ULL }, // Inst #18232 = VPMULTISHIFTQBZ128rrkz |
| 28925 | { 18231, 5, 1, 0, 2168, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2c1f8024829ULL }, // Inst #18231 = VPMULTISHIFTQBZ128rrk |
| 28926 | { 18230, 3, 1, 0, 1733, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0c1f8024829ULL }, // Inst #18230 = VPMULTISHIFTQBZ128rr |
| 28927 | { 18229, 8, 1, 0, 1882, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6c1f8024819ULL }, // Inst #18229 = VPMULTISHIFTQBZ128rmkz |
| 28928 | { 18228, 9, 1, 0, 1882, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2c1f8024819ULL }, // Inst #18228 = VPMULTISHIFTQBZ128rmk |
| 28929 | { 18227, 8, 1, 0, 1882, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96c1f8024819ULL }, // Inst #18227 = VPMULTISHIFTQBZ128rmbkz |
| 28930 | { 18226, 9, 1, 0, 1882, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92c1f8024819ULL }, // Inst #18226 = VPMULTISHIFTQBZ128rmbk |
| 28931 | { 18225, 7, 1, 0, 1709, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90c1f8024819ULL }, // Inst #18225 = VPMULTISHIFTQBZ128rmb |
| 28932 | { 18224, 7, 1, 0, 1709, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0c1f8024819ULL }, // Inst #18224 = VPMULTISHIFTQBZ128rm |
| 28933 | { 18223, 3, 1, 0, 149, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeab8002829ULL }, // Inst #18223 = VPMULLWrr |
| 28934 | { 18222, 7, 1, 0, 148, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab8002819ULL }, // Inst #18222 = VPMULLWrm |
| 28935 | { 18221, 4, 1, 0, 2353, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeeaf8002829ULL }, // Inst #18221 = VPMULLWZrrkz |
| 28936 | { 18220, 5, 1, 0, 2353, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaeaf8002829ULL }, // Inst #18220 = VPMULLWZrrk |
| 28937 | { 18219, 3, 1, 0, 384, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8eaf8002829ULL }, // Inst #18219 = VPMULLWZrr |
| 28938 | { 18218, 8, 1, 0, 2352, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeeaf8002819ULL }, // Inst #18218 = VPMULLWZrmkz |
| 28939 | { 18217, 9, 1, 0, 2352, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaeaf8002819ULL }, // Inst #18217 = VPMULLWZrmk |
| 28940 | { 18216, 7, 1, 0, 383, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8eaf8002819ULL }, // Inst #18216 = VPMULLWZrm |
| 28941 | { 18215, 4, 1, 0, 2351, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7eaf8002829ULL }, // Inst #18215 = VPMULLWZ256rrkz |
| 28942 | { 18214, 5, 1, 0, 2351, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3eaf8002829ULL }, // Inst #18214 = VPMULLWZ256rrk |
| 28943 | { 18213, 3, 1, 0, 382, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1eaf8002829ULL }, // Inst #18213 = VPMULLWZ256rr |
| 28944 | { 18212, 8, 1, 0, 2113, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7eaf8002819ULL }, // Inst #18212 = VPMULLWZ256rmkz |
| 28945 | { 18211, 9, 1, 0, 2113, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3eaf8002819ULL }, // Inst #18211 = VPMULLWZ256rmk |
| 28946 | { 18210, 7, 1, 0, 381, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1eaf8002819ULL }, // Inst #18210 = VPMULLWZ256rm |
| 28947 | { 18209, 4, 1, 0, 2350, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6eaf8002829ULL }, // Inst #18209 = VPMULLWZ128rrkz |
| 28948 | { 18208, 5, 1, 0, 2350, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2eaf8002829ULL }, // Inst #18208 = VPMULLWZ128rrk |
| 28949 | { 18207, 3, 1, 0, 149, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0eaf8002829ULL }, // Inst #18207 = VPMULLWZ128rr |
| 28950 | { 18206, 8, 1, 0, 2112, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6eaf8002819ULL }, // Inst #18206 = VPMULLWZ128rmkz |
| 28951 | { 18205, 9, 1, 0, 2112, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2eaf8002819ULL }, // Inst #18205 = VPMULLWZ128rmk |
| 28952 | { 18204, 7, 1, 0, 148, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0eaf8002819ULL }, // Inst #18204 = VPMULLWZ128rm |
| 28953 | { 18203, 3, 1, 0, 382, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1eab8002829ULL }, // Inst #18203 = VPMULLWYrr |
| 28954 | { 18202, 7, 1, 0, 381, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1eab8002819ULL }, // Inst #18202 = VPMULLWYrm |
| 28955 | { 18201, 4, 1, 0, 1385, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeea078024829ULL }, // Inst #18201 = VPMULLQZrrkz |
| 28956 | { 18200, 5, 1, 0, 1385, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaa078024829ULL }, // Inst #18200 = VPMULLQZrrk |
| 28957 | { 18199, 3, 1, 0, 1385, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8a078024829ULL }, // Inst #18199 = VPMULLQZrr |
| 28958 | { 18198, 8, 1, 0, 2365, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea078024819ULL }, // Inst #18198 = VPMULLQZrmkz |
| 28959 | { 18197, 9, 1, 0, 2365, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa078024819ULL }, // Inst #18197 = VPMULLQZrmk |
| 28960 | { 18196, 8, 1, 0, 1399, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ea078024819ULL }, // Inst #18196 = VPMULLQZrmbkz |
| 28961 | { 18195, 9, 1, 0, 2365, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aa078024819ULL }, // Inst #18195 = VPMULLQZrmbk |
| 28962 | { 18194, 7, 1, 0, 2365, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98a078024819ULL }, // Inst #18194 = VPMULLQZrmb |
| 28963 | { 18193, 7, 1, 0, 2365, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a078024819ULL }, // Inst #18193 = VPMULLQZrm |
| 28964 | { 18192, 4, 1, 0, 1384, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7a078024829ULL }, // Inst #18192 = VPMULLQZ256rrkz |
| 28965 | { 18191, 5, 1, 0, 1384, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3a078024829ULL }, // Inst #18191 = VPMULLQZ256rrk |
| 28966 | { 18190, 3, 1, 0, 1384, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1a078024829ULL }, // Inst #18190 = VPMULLQZ256rr |
| 28967 | { 18189, 8, 1, 0, 2364, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a078024819ULL }, // Inst #18189 = VPMULLQZ256rmkz |
| 28968 | { 18188, 9, 1, 0, 2364, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a078024819ULL }, // Inst #18188 = VPMULLQZ256rmk |
| 28969 | { 18187, 8, 1, 0, 1398, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97a078024819ULL }, // Inst #18187 = VPMULLQZ256rmbkz |
| 28970 | { 18186, 9, 1, 0, 2364, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93a078024819ULL }, // Inst #18186 = VPMULLQZ256rmbk |
| 28971 | { 18185, 7, 1, 0, 2364, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91a078024819ULL }, // Inst #18185 = VPMULLQZ256rmb |
| 28972 | { 18184, 7, 1, 0, 2364, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a078024819ULL }, // Inst #18184 = VPMULLQZ256rm |
| 28973 | { 18183, 4, 1, 0, 1383, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6a078024829ULL }, // Inst #18183 = VPMULLQZ128rrkz |
| 28974 | { 18182, 5, 1, 0, 1383, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2a078024829ULL }, // Inst #18182 = VPMULLQZ128rrk |
| 28975 | { 18181, 3, 1, 0, 1383, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0a078024829ULL }, // Inst #18181 = VPMULLQZ128rr |
| 28976 | { 18180, 8, 1, 0, 2363, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a078024819ULL }, // Inst #18180 = VPMULLQZ128rmkz |
| 28977 | { 18179, 9, 1, 0, 2363, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a078024819ULL }, // Inst #18179 = VPMULLQZ128rmk |
| 28978 | { 18178, 8, 1, 0, 1397, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96a078024819ULL }, // Inst #18178 = VPMULLQZ128rmbkz |
| 28979 | { 18177, 9, 1, 0, 2363, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92a078024819ULL }, // Inst #18177 = VPMULLQZ128rmbk |
| 28980 | { 18176, 7, 1, 0, 2363, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90a078024819ULL }, // Inst #18176 = VPMULLQZ128rmb |
| 28981 | { 18175, 7, 1, 0, 2363, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a078024819ULL }, // Inst #18175 = VPMULLQZ128rm |
| 28982 | { 18174, 3, 1, 0, 276, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa038004829ULL }, // Inst #18174 = VPMULLDrr |
| 28983 | { 18173, 7, 1, 0, 275, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa038004819ULL }, // Inst #18173 = VPMULLDrm |
| 28984 | { 18172, 4, 1, 0, 543, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeea078004829ULL }, // Inst #18172 = VPMULLDZrrkz |
| 28985 | { 18171, 5, 1, 0, 543, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaa078004829ULL }, // Inst #18171 = VPMULLDZrrk |
| 28986 | { 18170, 3, 1, 0, 543, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8a078004829ULL }, // Inst #18170 = VPMULLDZrr |
| 28987 | { 18169, 8, 1, 0, 542, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea078004819ULL }, // Inst #18169 = VPMULLDZrmkz |
| 28988 | { 18168, 9, 1, 0, 542, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa078004819ULL }, // Inst #18168 = VPMULLDZrmk |
| 28989 | { 18167, 8, 1, 0, 542, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea078004819ULL }, // Inst #18167 = VPMULLDZrmbkz |
| 28990 | { 18166, 9, 1, 0, 542, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa078004819ULL }, // Inst #18166 = VPMULLDZrmbk |
| 28991 | { 18165, 7, 1, 0, 542, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a078004819ULL }, // Inst #18165 = VPMULLDZrmb |
| 28992 | { 18164, 7, 1, 0, 542, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a078004819ULL }, // Inst #18164 = VPMULLDZrm |
| 28993 | { 18163, 4, 1, 0, 541, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7a078004829ULL }, // Inst #18163 = VPMULLDZ256rrkz |
| 28994 | { 18162, 5, 1, 0, 541, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3a078004829ULL }, // Inst #18162 = VPMULLDZ256rrk |
| 28995 | { 18161, 3, 1, 0, 541, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1a078004829ULL }, // Inst #18161 = VPMULLDZ256rr |
| 28996 | { 18160, 8, 1, 0, 540, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a078004819ULL }, // Inst #18160 = VPMULLDZ256rmkz |
| 28997 | { 18159, 9, 1, 0, 540, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a078004819ULL }, // Inst #18159 = VPMULLDZ256rmk |
| 28998 | { 18158, 8, 1, 0, 540, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a078004819ULL }, // Inst #18158 = VPMULLDZ256rmbkz |
| 28999 | { 18157, 9, 1, 0, 540, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a078004819ULL }, // Inst #18157 = VPMULLDZ256rmbk |
| 29000 | { 18156, 7, 1, 0, 540, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a078004819ULL }, // Inst #18156 = VPMULLDZ256rmb |
| 29001 | { 18155, 7, 1, 0, 540, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a078004819ULL }, // Inst #18155 = VPMULLDZ256rm |
| 29002 | { 18154, 4, 1, 0, 276, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6a078004829ULL }, // Inst #18154 = VPMULLDZ128rrkz |
| 29003 | { 18153, 5, 1, 0, 276, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2a078004829ULL }, // Inst #18153 = VPMULLDZ128rrk |
| 29004 | { 18152, 3, 1, 0, 276, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0a078004829ULL }, // Inst #18152 = VPMULLDZ128rr |
| 29005 | { 18151, 8, 1, 0, 275, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a078004819ULL }, // Inst #18151 = VPMULLDZ128rmkz |
| 29006 | { 18150, 9, 1, 0, 275, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a078004819ULL }, // Inst #18150 = VPMULLDZ128rmk |
| 29007 | { 18149, 8, 1, 0, 275, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a078004819ULL }, // Inst #18149 = VPMULLDZ128rmbkz |
| 29008 | { 18148, 9, 1, 0, 275, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a078004819ULL }, // Inst #18148 = VPMULLDZ128rmbk |
| 29009 | { 18147, 7, 1, 0, 275, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a078004819ULL }, // Inst #18147 = VPMULLDZ128rmb |
| 29010 | { 18146, 7, 1, 0, 275, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a078004819ULL }, // Inst #18146 = VPMULLDZ128rm |
| 29011 | { 18145, 3, 1, 0, 541, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a038004829ULL }, // Inst #18145 = VPMULLDYrr |
| 29012 | { 18144, 7, 1, 0, 540, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a038004819ULL }, // Inst #18144 = VPMULLDYrm |
| 29013 | { 18143, 3, 1, 0, 149, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf2b8002829ULL }, // Inst #18143 = VPMULHWrr |
| 29014 | { 18142, 7, 1, 0, 148, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf2b8002819ULL }, // Inst #18142 = VPMULHWrm |
| 29015 | { 18141, 4, 1, 0, 2353, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef2f8002829ULL }, // Inst #18141 = VPMULHWZrrkz |
| 29016 | { 18140, 5, 1, 0, 2353, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf2f8002829ULL }, // Inst #18140 = VPMULHWZrrk |
| 29017 | { 18139, 3, 1, 0, 384, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f2f8002829ULL }, // Inst #18139 = VPMULHWZrr |
| 29018 | { 18138, 8, 1, 0, 2352, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef2f8002819ULL }, // Inst #18138 = VPMULHWZrmkz |
| 29019 | { 18137, 9, 1, 0, 2352, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf2f8002819ULL }, // Inst #18137 = VPMULHWZrmk |
| 29020 | { 18136, 7, 1, 0, 383, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f2f8002819ULL }, // Inst #18136 = VPMULHWZrm |
| 29021 | { 18135, 4, 1, 0, 2351, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f2f8002829ULL }, // Inst #18135 = VPMULHWZ256rrkz |
| 29022 | { 18134, 5, 1, 0, 2351, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f2f8002829ULL }, // Inst #18134 = VPMULHWZ256rrk |
| 29023 | { 18133, 3, 1, 0, 382, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f2f8002829ULL }, // Inst #18133 = VPMULHWZ256rr |
| 29024 | { 18132, 8, 1, 0, 2113, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f2f8002819ULL }, // Inst #18132 = VPMULHWZ256rmkz |
| 29025 | { 18131, 9, 1, 0, 2113, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f2f8002819ULL }, // Inst #18131 = VPMULHWZ256rmk |
| 29026 | { 18130, 7, 1, 0, 381, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f2f8002819ULL }, // Inst #18130 = VPMULHWZ256rm |
| 29027 | { 18129, 4, 1, 0, 2350, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f2f8002829ULL }, // Inst #18129 = VPMULHWZ128rrkz |
| 29028 | { 18128, 5, 1, 0, 2350, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f2f8002829ULL }, // Inst #18128 = VPMULHWZ128rrk |
| 29029 | { 18127, 3, 1, 0, 149, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f2f8002829ULL }, // Inst #18127 = VPMULHWZ128rr |
| 29030 | { 18126, 8, 1, 0, 2112, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f2f8002819ULL }, // Inst #18126 = VPMULHWZ128rmkz |
| 29031 | { 18125, 9, 1, 0, 2112, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f2f8002819ULL }, // Inst #18125 = VPMULHWZ128rmk |
| 29032 | { 18124, 7, 1, 0, 148, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f2f8002819ULL }, // Inst #18124 = VPMULHWZ128rm |
| 29033 | { 18123, 3, 1, 0, 382, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f2b8002829ULL }, // Inst #18123 = VPMULHWYrr |
| 29034 | { 18122, 7, 1, 0, 381, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f2b8002819ULL }, // Inst #18122 = VPMULHWYrm |
| 29035 | { 18121, 3, 1, 0, 149, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf238002829ULL }, // Inst #18121 = VPMULHUWrr |
| 29036 | { 18120, 7, 1, 0, 148, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf238002819ULL }, // Inst #18120 = VPMULHUWrm |
| 29037 | { 18119, 4, 1, 0, 2353, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef278002829ULL }, // Inst #18119 = VPMULHUWZrrkz |
| 29038 | { 18118, 5, 1, 0, 2353, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf278002829ULL }, // Inst #18118 = VPMULHUWZrrk |
| 29039 | { 18117, 3, 1, 0, 384, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f278002829ULL }, // Inst #18117 = VPMULHUWZrr |
| 29040 | { 18116, 8, 1, 0, 2352, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef278002819ULL }, // Inst #18116 = VPMULHUWZrmkz |
| 29041 | { 18115, 9, 1, 0, 2352, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf278002819ULL }, // Inst #18115 = VPMULHUWZrmk |
| 29042 | { 18114, 7, 1, 0, 383, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f278002819ULL }, // Inst #18114 = VPMULHUWZrm |
| 29043 | { 18113, 4, 1, 0, 2351, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f278002829ULL }, // Inst #18113 = VPMULHUWZ256rrkz |
| 29044 | { 18112, 5, 1, 0, 2351, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f278002829ULL }, // Inst #18112 = VPMULHUWZ256rrk |
| 29045 | { 18111, 3, 1, 0, 382, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f278002829ULL }, // Inst #18111 = VPMULHUWZ256rr |
| 29046 | { 18110, 8, 1, 0, 2113, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f278002819ULL }, // Inst #18110 = VPMULHUWZ256rmkz |
| 29047 | { 18109, 9, 1, 0, 2113, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f278002819ULL }, // Inst #18109 = VPMULHUWZ256rmk |
| 29048 | { 18108, 7, 1, 0, 381, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f278002819ULL }, // Inst #18108 = VPMULHUWZ256rm |
| 29049 | { 18107, 4, 1, 0, 2350, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f278002829ULL }, // Inst #18107 = VPMULHUWZ128rrkz |
| 29050 | { 18106, 5, 1, 0, 2350, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f278002829ULL }, // Inst #18106 = VPMULHUWZ128rrk |
| 29051 | { 18105, 3, 1, 0, 149, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f278002829ULL }, // Inst #18105 = VPMULHUWZ128rr |
| 29052 | { 18104, 8, 1, 0, 2112, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f278002819ULL }, // Inst #18104 = VPMULHUWZ128rmkz |
| 29053 | { 18103, 9, 1, 0, 2112, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f278002819ULL }, // Inst #18103 = VPMULHUWZ128rmk |
| 29054 | { 18102, 7, 1, 0, 148, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f278002819ULL }, // Inst #18102 = VPMULHUWZ128rm |
| 29055 | { 18101, 3, 1, 0, 382, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f238002829ULL }, // Inst #18101 = VPMULHUWYrr |
| 29056 | { 18100, 7, 1, 0, 381, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f238002819ULL }, // Inst #18100 = VPMULHUWYrm |
| 29057 | { 18099, 3, 1, 0, 149, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x85b8004829ULL }, // Inst #18099 = VPMULHRSWrr |
| 29058 | { 18098, 7, 1, 0, 148, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x85b8004819ULL }, // Inst #18098 = VPMULHRSWrm |
| 29059 | { 18097, 4, 1, 0, 2353, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee85f8004829ULL }, // Inst #18097 = VPMULHRSWZrrkz |
| 29060 | { 18096, 5, 1, 0, 2353, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea85f8004829ULL }, // Inst #18096 = VPMULHRSWZrrk |
| 29061 | { 18095, 3, 1, 0, 384, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe885f8004829ULL }, // Inst #18095 = VPMULHRSWZrr |
| 29062 | { 18094, 8, 1, 0, 2352, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee85f8004819ULL }, // Inst #18094 = VPMULHRSWZrmkz |
| 29063 | { 18093, 9, 1, 0, 2352, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea85f8004819ULL }, // Inst #18093 = VPMULHRSWZrmk |
| 29064 | { 18092, 7, 1, 0, 383, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe885f8004819ULL }, // Inst #18092 = VPMULHRSWZrm |
| 29065 | { 18091, 4, 1, 0, 2351, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc785f8004829ULL }, // Inst #18091 = VPMULHRSWZ256rrkz |
| 29066 | { 18090, 5, 1, 0, 2351, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc385f8004829ULL }, // Inst #18090 = VPMULHRSWZ256rrk |
| 29067 | { 18089, 3, 1, 0, 382, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc185f8004829ULL }, // Inst #18089 = VPMULHRSWZ256rr |
| 29068 | { 18088, 8, 1, 0, 2113, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc785f8004819ULL }, // Inst #18088 = VPMULHRSWZ256rmkz |
| 29069 | { 18087, 9, 1, 0, 2113, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc385f8004819ULL }, // Inst #18087 = VPMULHRSWZ256rmk |
| 29070 | { 18086, 7, 1, 0, 381, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc185f8004819ULL }, // Inst #18086 = VPMULHRSWZ256rm |
| 29071 | { 18085, 4, 1, 0, 2350, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa685f8004829ULL }, // Inst #18085 = VPMULHRSWZ128rrkz |
| 29072 | { 18084, 5, 1, 0, 2350, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa285f8004829ULL }, // Inst #18084 = VPMULHRSWZ128rrk |
| 29073 | { 18083, 3, 1, 0, 149, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa085f8004829ULL }, // Inst #18083 = VPMULHRSWZ128rr |
| 29074 | { 18082, 8, 1, 0, 2112, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa685f8004819ULL }, // Inst #18082 = VPMULHRSWZ128rmkz |
| 29075 | { 18081, 9, 1, 0, 2112, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa285f8004819ULL }, // Inst #18081 = VPMULHRSWZ128rmk |
| 29076 | { 18080, 7, 1, 0, 148, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa085f8004819ULL }, // Inst #18080 = VPMULHRSWZ128rm |
| 29077 | { 18079, 3, 1, 0, 382, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x185b8004829ULL }, // Inst #18079 = VPMULHRSWYrr |
| 29078 | { 18078, 7, 1, 0, 381, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x185b8004819ULL }, // Inst #18078 = VPMULHRSWYrm |
| 29079 | { 18077, 3, 1, 0, 1680, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x9438004829ULL }, // Inst #18077 = VPMULDQrr |
| 29080 | { 18076, 7, 1, 0, 1676, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9438004819ULL }, // Inst #18076 = VPMULDQrm |
| 29081 | { 18075, 4, 1, 0, 384, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9478024829ULL }, // Inst #18075 = VPMULDQZrrkz |
| 29082 | { 18074, 5, 1, 0, 384, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9478024829ULL }, // Inst #18074 = VPMULDQZrrk |
| 29083 | { 18073, 3, 1, 0, 384, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89478024829ULL }, // Inst #18073 = VPMULDQZrr |
| 29084 | { 18072, 8, 1, 0, 383, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9478024819ULL }, // Inst #18072 = VPMULDQZrmkz |
| 29085 | { 18071, 9, 1, 0, 383, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9478024819ULL }, // Inst #18071 = VPMULDQZrmk |
| 29086 | { 18070, 8, 1, 0, 383, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e9478024819ULL }, // Inst #18070 = VPMULDQZrmbkz |
| 29087 | { 18069, 9, 1, 0, 383, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a9478024819ULL }, // Inst #18069 = VPMULDQZrmbk |
| 29088 | { 18068, 7, 1, 0, 383, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x989478024819ULL }, // Inst #18068 = VPMULDQZrmb |
| 29089 | { 18067, 7, 1, 0, 383, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89478024819ULL }, // Inst #18067 = VPMULDQZrm |
| 29090 | { 18066, 4, 1, 0, 382, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79478024829ULL }, // Inst #18066 = VPMULDQZ256rrkz |
| 29091 | { 18065, 5, 1, 0, 382, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39478024829ULL }, // Inst #18065 = VPMULDQZ256rrk |
| 29092 | { 18064, 3, 1, 0, 382, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19478024829ULL }, // Inst #18064 = VPMULDQZ256rr |
| 29093 | { 18063, 8, 1, 0, 381, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79478024819ULL }, // Inst #18063 = VPMULDQZ256rmkz |
| 29094 | { 18062, 9, 1, 0, 381, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39478024819ULL }, // Inst #18062 = VPMULDQZ256rmk |
| 29095 | { 18061, 8, 1, 0, 381, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x979478024819ULL }, // Inst #18061 = VPMULDQZ256rmbkz |
| 29096 | { 18060, 9, 1, 0, 381, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x939478024819ULL }, // Inst #18060 = VPMULDQZ256rmbk |
| 29097 | { 18059, 7, 1, 0, 381, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x919478024819ULL }, // Inst #18059 = VPMULDQZ256rmb |
| 29098 | { 18058, 7, 1, 0, 381, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19478024819ULL }, // Inst #18058 = VPMULDQZ256rm |
| 29099 | { 18057, 4, 1, 0, 149, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69478024829ULL }, // Inst #18057 = VPMULDQZ128rrkz |
| 29100 | { 18056, 5, 1, 0, 149, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29478024829ULL }, // Inst #18056 = VPMULDQZ128rrk |
| 29101 | { 18055, 3, 1, 0, 149, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09478024829ULL }, // Inst #18055 = VPMULDQZ128rr |
| 29102 | { 18054, 8, 1, 0, 148, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69478024819ULL }, // Inst #18054 = VPMULDQZ128rmkz |
| 29103 | { 18053, 9, 1, 0, 148, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29478024819ULL }, // Inst #18053 = VPMULDQZ128rmk |
| 29104 | { 18052, 8, 1, 0, 148, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x969478024819ULL }, // Inst #18052 = VPMULDQZ128rmbkz |
| 29105 | { 18051, 9, 1, 0, 148, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x929478024819ULL }, // Inst #18051 = VPMULDQZ128rmbk |
| 29106 | { 18050, 7, 1, 0, 148, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x909478024819ULL }, // Inst #18050 = VPMULDQZ128rmb |
| 29107 | { 18049, 7, 1, 0, 148, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09478024819ULL }, // Inst #18049 = VPMULDQZ128rm |
| 29108 | { 18048, 3, 1, 0, 1678, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x19438004829ULL }, // Inst #18048 = VPMULDQYrr |
| 29109 | { 18047, 7, 1, 0, 1688, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19438004819ULL }, // Inst #18047 = VPMULDQYrm |
| 29110 | { 18046, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1a38004829ULL }, // Inst #18046 = VPMOVZXWQrr |
| 29111 | { 18045, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a38004819ULL }, // Inst #18045 = VPMOVZXWQrm |
| 29112 | { 18044, 3, 1, 0, 1124, 0, 0, 2420, X86ImpOpBase + 0, 0, 0xae1a78004829ULL }, // Inst #18044 = VPMOVZXWQZrrkz |
| 29113 | { 18043, 4, 1, 0, 1124, 0, 0, 2416, X86ImpOpBase + 0, 0, 0xaa1a78004829ULL }, // Inst #18043 = VPMOVZXWQZrrk |
| 29114 | { 18042, 2, 1, 0, 1124, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xa81a78004829ULL }, // Inst #18042 = VPMOVZXWQZrr |
| 29115 | { 18041, 7, 1, 0, 537, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae1a78004819ULL }, // Inst #18041 = VPMOVZXWQZrmkz |
| 29116 | { 18040, 8, 1, 0, 537, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa1a78004819ULL }, // Inst #18040 = VPMOVZXWQZrmk |
| 29117 | { 18039, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa81a78004819ULL }, // Inst #18039 = VPMOVZXWQZrm |
| 29118 | { 18038, 3, 1, 0, 1123, 0, 0, 2413, X86ImpOpBase + 0, 0, 0x871a78004829ULL }, // Inst #18038 = VPMOVZXWQZ256rrkz |
| 29119 | { 18037, 4, 1, 0, 1123, 0, 0, 2409, X86ImpOpBase + 0, 0, 0x831a78004829ULL }, // Inst #18037 = VPMOVZXWQZ256rrk |
| 29120 | { 18036, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0x811a78004829ULL }, // Inst #18036 = VPMOVZXWQZ256rr |
| 29121 | { 18035, 7, 1, 0, 537, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x871a78004819ULL }, // Inst #18035 = VPMOVZXWQZ256rmkz |
| 29122 | { 18034, 8, 1, 0, 537, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x831a78004819ULL }, // Inst #18034 = VPMOVZXWQZ256rmk |
| 29123 | { 18033, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x811a78004819ULL }, // Inst #18033 = VPMOVZXWQZ256rm |
| 29124 | { 18032, 3, 1, 0, 1122, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x661a78004829ULL }, // Inst #18032 = VPMOVZXWQZ128rrkz |
| 29125 | { 18031, 4, 1, 0, 1122, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x621a78004829ULL }, // Inst #18031 = VPMOVZXWQZ128rrk |
| 29126 | { 18030, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x601a78004829ULL }, // Inst #18030 = VPMOVZXWQZ128rr |
| 29127 | { 18029, 7, 1, 0, 274, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x661a78004819ULL }, // Inst #18029 = VPMOVZXWQZ128rmkz |
| 29128 | { 18028, 8, 1, 0, 274, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x621a78004819ULL }, // Inst #18028 = VPMOVZXWQZ128rmk |
| 29129 | { 18027, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x601a78004819ULL }, // Inst #18027 = VPMOVZXWQZ128rm |
| 29130 | { 18026, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x11a38004829ULL }, // Inst #18026 = VPMOVZXWQYrr |
| 29131 | { 18025, 6, 1, 0, 537, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x11a38004819ULL }, // Inst #18025 = VPMOVZXWQYrm |
| 29132 | { 18024, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x19b8004829ULL }, // Inst #18024 = VPMOVZXWDrr |
| 29133 | { 18023, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19b8004819ULL }, // Inst #18023 = VPMOVZXWDrm |
| 29134 | { 18022, 3, 1, 0, 1124, 0, 0, 3259, X86ImpOpBase + 0, 0, 0xce19f8004829ULL }, // Inst #18022 = VPMOVZXWDZrrkz |
| 29135 | { 18021, 4, 1, 0, 1124, 0, 0, 3255, X86ImpOpBase + 0, 0, 0xca19f8004829ULL }, // Inst #18021 = VPMOVZXWDZrrk |
| 29136 | { 18020, 2, 1, 0, 1124, 0, 0, 3077, X86ImpOpBase + 0, 0, 0xc819f8004829ULL }, // Inst #18020 = VPMOVZXWDZrr |
| 29137 | { 18019, 7, 1, 0, 537, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce19f8004819ULL }, // Inst #18019 = VPMOVZXWDZrmkz |
| 29138 | { 18018, 8, 1, 0, 537, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca19f8004819ULL }, // Inst #18018 = VPMOVZXWDZrmk |
| 29139 | { 18017, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc819f8004819ULL }, // Inst #18017 = VPMOVZXWDZrm |
| 29140 | { 18016, 3, 1, 0, 1123, 0, 0, 2320, X86ImpOpBase + 0, 0, 0xa719f8004829ULL }, // Inst #18016 = VPMOVZXWDZ256rrkz |
| 29141 | { 18015, 4, 1, 0, 1123, 0, 0, 2316, X86ImpOpBase + 0, 0, 0xa319f8004829ULL }, // Inst #18015 = VPMOVZXWDZ256rrk |
| 29142 | { 18014, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xa119f8004829ULL }, // Inst #18014 = VPMOVZXWDZ256rr |
| 29143 | { 18013, 7, 1, 0, 537, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa719f8004819ULL }, // Inst #18013 = VPMOVZXWDZ256rmkz |
| 29144 | { 18012, 8, 1, 0, 537, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa319f8004819ULL }, // Inst #18012 = VPMOVZXWDZ256rmk |
| 29145 | { 18011, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa119f8004819ULL }, // Inst #18011 = VPMOVZXWDZ256rm |
| 29146 | { 18010, 3, 1, 0, 1122, 0, 0, 2404, X86ImpOpBase + 0, 0, 0x8619f8004829ULL }, // Inst #18010 = VPMOVZXWDZ128rrkz |
| 29147 | { 18009, 4, 1, 0, 1122, 0, 0, 2400, X86ImpOpBase + 0, 0, 0x8219f8004829ULL }, // Inst #18009 = VPMOVZXWDZ128rrk |
| 29148 | { 18008, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x8019f8004829ULL }, // Inst #18008 = VPMOVZXWDZ128rr |
| 29149 | { 18007, 7, 1, 0, 274, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8619f8004819ULL }, // Inst #18007 = VPMOVZXWDZ128rmkz |
| 29150 | { 18006, 8, 1, 0, 274, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8219f8004819ULL }, // Inst #18006 = VPMOVZXWDZ128rmk |
| 29151 | { 18005, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8019f8004819ULL }, // Inst #18005 = VPMOVZXWDZ128rm |
| 29152 | { 18004, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x119b8004829ULL }, // Inst #18004 = VPMOVZXWDYrr |
| 29153 | { 18003, 6, 1, 0, 864, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x119b8004819ULL }, // Inst #18003 = VPMOVZXWDYrm |
| 29154 | { 18002, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1ab8004829ULL }, // Inst #18002 = VPMOVZXDQrr |
| 29155 | { 18001, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ab8004819ULL }, // Inst #18001 = VPMOVZXDQrm |
| 29156 | { 18000, 3, 1, 0, 1124, 0, 0, 3083, X86ImpOpBase + 0, 0, 0xce1af8004829ULL }, // Inst #18000 = VPMOVZXDQZrrkz |
| 29157 | { 17999, 4, 1, 0, 1124, 0, 0, 3079, X86ImpOpBase + 0, 0, 0xca1af8004829ULL }, // Inst #17999 = VPMOVZXDQZrrk |
| 29158 | { 17998, 2, 1, 0, 1124, 0, 0, 3077, X86ImpOpBase + 0, 0, 0xc81af8004829ULL }, // Inst #17998 = VPMOVZXDQZrr |
| 29159 | { 17997, 7, 1, 0, 537, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce1af8004819ULL }, // Inst #17997 = VPMOVZXDQZrmkz |
| 29160 | { 17996, 8, 1, 0, 537, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca1af8004819ULL }, // Inst #17996 = VPMOVZXDQZrmk |
| 29161 | { 17995, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc81af8004819ULL }, // Inst #17995 = VPMOVZXDQZrm |
| 29162 | { 17994, 3, 1, 0, 1123, 0, 0, 2413, X86ImpOpBase + 0, 0, 0xa71af8004829ULL }, // Inst #17994 = VPMOVZXDQZ256rrkz |
| 29163 | { 17993, 4, 1, 0, 1123, 0, 0, 2409, X86ImpOpBase + 0, 0, 0xa31af8004829ULL }, // Inst #17993 = VPMOVZXDQZ256rrk |
| 29164 | { 17992, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xa11af8004829ULL }, // Inst #17992 = VPMOVZXDQZ256rr |
| 29165 | { 17991, 7, 1, 0, 537, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa71af8004819ULL }, // Inst #17991 = VPMOVZXDQZ256rmkz |
| 29166 | { 17990, 8, 1, 0, 537, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa31af8004819ULL }, // Inst #17990 = VPMOVZXDQZ256rmk |
| 29167 | { 17989, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa11af8004819ULL }, // Inst #17989 = VPMOVZXDQZ256rm |
| 29168 | { 17988, 3, 1, 0, 1122, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x861af8004829ULL }, // Inst #17988 = VPMOVZXDQZ128rrkz |
| 29169 | { 17987, 4, 1, 0, 1122, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x821af8004829ULL }, // Inst #17987 = VPMOVZXDQZ128rrk |
| 29170 | { 17986, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x801af8004829ULL }, // Inst #17986 = VPMOVZXDQZ128rr |
| 29171 | { 17985, 7, 1, 0, 274, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x861af8004819ULL }, // Inst #17985 = VPMOVZXDQZ128rmkz |
| 29172 | { 17984, 8, 1, 0, 274, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x821af8004819ULL }, // Inst #17984 = VPMOVZXDQZ128rmk |
| 29173 | { 17983, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x801af8004819ULL }, // Inst #17983 = VPMOVZXDQZ128rm |
| 29174 | { 17982, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x11ab8004829ULL }, // Inst #17982 = VPMOVZXDQYrr |
| 29175 | { 17981, 6, 1, 0, 537, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x11ab8004819ULL }, // Inst #17981 = VPMOVZXDQYrm |
| 29176 | { 17980, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1838004829ULL }, // Inst #17980 = VPMOVZXBWrr |
| 29177 | { 17979, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1838004819ULL }, // Inst #17979 = VPMOVZXBWrm |
| 29178 | { 17978, 3, 1, 0, 2167, 0, 0, 3141, X86ImpOpBase + 0, 0, 0xce1878004829ULL }, // Inst #17978 = VPMOVZXBWZrrkz |
| 29179 | { 17977, 4, 1, 0, 2167, 0, 0, 3137, X86ImpOpBase + 0, 0, 0xca1878004829ULL }, // Inst #17977 = VPMOVZXBWZrrk |
| 29180 | { 17976, 2, 1, 0, 1124, 0, 0, 3077, X86ImpOpBase + 0, 0, 0xc81878004829ULL }, // Inst #17976 = VPMOVZXBWZrr |
| 29181 | { 17975, 7, 1, 0, 1877, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce1878004819ULL }, // Inst #17975 = VPMOVZXBWZrmkz |
| 29182 | { 17974, 8, 1, 0, 1877, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca1878004819ULL }, // Inst #17974 = VPMOVZXBWZrmk |
| 29183 | { 17973, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc81878004819ULL }, // Inst #17973 = VPMOVZXBWZrm |
| 29184 | { 17972, 3, 1, 0, 2166, 0, 0, 3134, X86ImpOpBase + 0, 0, 0xa71878004829ULL }, // Inst #17972 = VPMOVZXBWZ256rrkz |
| 29185 | { 17971, 4, 1, 0, 2166, 0, 0, 3130, X86ImpOpBase + 0, 0, 0xa31878004829ULL }, // Inst #17971 = VPMOVZXBWZ256rrk |
| 29186 | { 17970, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xa11878004829ULL }, // Inst #17970 = VPMOVZXBWZ256rr |
| 29187 | { 17969, 7, 1, 0, 1877, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa71878004819ULL }, // Inst #17969 = VPMOVZXBWZ256rmkz |
| 29188 | { 17968, 8, 1, 0, 1877, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa31878004819ULL }, // Inst #17968 = VPMOVZXBWZ256rmk |
| 29189 | { 17967, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa11878004819ULL }, // Inst #17967 = VPMOVZXBWZ256rm |
| 29190 | { 17966, 3, 1, 0, 1699, 0, 0, 2943, X86ImpOpBase + 0, 0, 0x861878004829ULL }, // Inst #17966 = VPMOVZXBWZ128rrkz |
| 29191 | { 17965, 4, 1, 0, 1699, 0, 0, 2939, X86ImpOpBase + 0, 0, 0x821878004829ULL }, // Inst #17965 = VPMOVZXBWZ128rrk |
| 29192 | { 17964, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x801878004829ULL }, // Inst #17964 = VPMOVZXBWZ128rr |
| 29193 | { 17963, 7, 1, 0, 1932, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x861878004819ULL }, // Inst #17963 = VPMOVZXBWZ128rmkz |
| 29194 | { 17962, 8, 1, 0, 1932, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x821878004819ULL }, // Inst #17962 = VPMOVZXBWZ128rmk |
| 29195 | { 17961, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x801878004819ULL }, // Inst #17961 = VPMOVZXBWZ128rm |
| 29196 | { 17960, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x11838004829ULL }, // Inst #17960 = VPMOVZXBWYrr |
| 29197 | { 17959, 6, 1, 0, 537, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x11838004819ULL }, // Inst #17959 = VPMOVZXBWYrm |
| 29198 | { 17958, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1938004829ULL }, // Inst #17958 = VPMOVZXBQrr |
| 29199 | { 17957, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1938004819ULL }, // Inst #17957 = VPMOVZXBQrm |
| 29200 | { 17956, 3, 1, 0, 1124, 0, 0, 2420, X86ImpOpBase + 0, 0, 0x8e1978004829ULL }, // Inst #17956 = VPMOVZXBQZrrkz |
| 29201 | { 17955, 4, 1, 0, 1124, 0, 0, 2416, X86ImpOpBase + 0, 0, 0x8a1978004829ULL }, // Inst #17955 = VPMOVZXBQZrrk |
| 29202 | { 17954, 2, 1, 0, 1124, 0, 0, 2344, X86ImpOpBase + 0, 0, 0x881978004829ULL }, // Inst #17954 = VPMOVZXBQZrr |
| 29203 | { 17953, 7, 1, 0, 537, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8e1978004819ULL }, // Inst #17953 = VPMOVZXBQZrmkz |
| 29204 | { 17952, 8, 1, 0, 537, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a1978004819ULL }, // Inst #17952 = VPMOVZXBQZrmk |
| 29205 | { 17951, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x881978004819ULL }, // Inst #17951 = VPMOVZXBQZrm |
| 29206 | { 17950, 3, 1, 0, 1123, 0, 0, 2413, X86ImpOpBase + 0, 0, 0x671978004829ULL }, // Inst #17950 = VPMOVZXBQZ256rrkz |
| 29207 | { 17949, 4, 1, 0, 1123, 0, 0, 2409, X86ImpOpBase + 0, 0, 0x631978004829ULL }, // Inst #17949 = VPMOVZXBQZ256rrk |
| 29208 | { 17948, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0x611978004829ULL }, // Inst #17948 = VPMOVZXBQZ256rr |
| 29209 | { 17947, 7, 1, 0, 537, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x671978004819ULL }, // Inst #17947 = VPMOVZXBQZ256rmkz |
| 29210 | { 17946, 8, 1, 0, 537, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x631978004819ULL }, // Inst #17946 = VPMOVZXBQZ256rmk |
| 29211 | { 17945, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x611978004819ULL }, // Inst #17945 = VPMOVZXBQZ256rm |
| 29212 | { 17944, 3, 1, 0, 1122, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x461978004829ULL }, // Inst #17944 = VPMOVZXBQZ128rrkz |
| 29213 | { 17943, 4, 1, 0, 1122, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x421978004829ULL }, // Inst #17943 = VPMOVZXBQZ128rrk |
| 29214 | { 17942, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x401978004829ULL }, // Inst #17942 = VPMOVZXBQZ128rr |
| 29215 | { 17941, 7, 1, 0, 274, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x461978004819ULL }, // Inst #17941 = VPMOVZXBQZ128rmkz |
| 29216 | { 17940, 8, 1, 0, 274, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x421978004819ULL }, // Inst #17940 = VPMOVZXBQZ128rmk |
| 29217 | { 17939, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x401978004819ULL }, // Inst #17939 = VPMOVZXBQZ128rm |
| 29218 | { 17938, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x11938004829ULL }, // Inst #17938 = VPMOVZXBQYrr |
| 29219 | { 17937, 6, 1, 0, 537, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x11938004819ULL }, // Inst #17937 = VPMOVZXBQYrm |
| 29220 | { 17936, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x18b8004829ULL }, // Inst #17936 = VPMOVZXBDrr |
| 29221 | { 17935, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18b8004819ULL }, // Inst #17935 = VPMOVZXBDrm |
| 29222 | { 17934, 3, 1, 0, 1124, 0, 0, 2350, X86ImpOpBase + 0, 0, 0xae18f8004829ULL }, // Inst #17934 = VPMOVZXBDZrrkz |
| 29223 | { 17933, 4, 1, 0, 1124, 0, 0, 2346, X86ImpOpBase + 0, 0, 0xaa18f8004829ULL }, // Inst #17933 = VPMOVZXBDZrrk |
| 29224 | { 17932, 2, 1, 0, 1124, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xa818f8004829ULL }, // Inst #17932 = VPMOVZXBDZrr |
| 29225 | { 17931, 7, 1, 0, 537, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae18f8004819ULL }, // Inst #17931 = VPMOVZXBDZrmkz |
| 29226 | { 17930, 8, 1, 0, 537, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa18f8004819ULL }, // Inst #17930 = VPMOVZXBDZrmk |
| 29227 | { 17929, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa818f8004819ULL }, // Inst #17929 = VPMOVZXBDZrm |
| 29228 | { 17928, 3, 1, 0, 1123, 0, 0, 2320, X86ImpOpBase + 0, 0, 0x8718f8004829ULL }, // Inst #17928 = VPMOVZXBDZ256rrkz |
| 29229 | { 17927, 4, 1, 0, 1123, 0, 0, 2316, X86ImpOpBase + 0, 0, 0x8318f8004829ULL }, // Inst #17927 = VPMOVZXBDZ256rrk |
| 29230 | { 17926, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0x8118f8004829ULL }, // Inst #17926 = VPMOVZXBDZ256rr |
| 29231 | { 17925, 7, 1, 0, 537, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8718f8004819ULL }, // Inst #17925 = VPMOVZXBDZ256rmkz |
| 29232 | { 17924, 8, 1, 0, 537, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8318f8004819ULL }, // Inst #17924 = VPMOVZXBDZ256rmk |
| 29233 | { 17923, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8118f8004819ULL }, // Inst #17923 = VPMOVZXBDZ256rm |
| 29234 | { 17922, 3, 1, 0, 1122, 0, 0, 2404, X86ImpOpBase + 0, 0, 0x6618f8004829ULL }, // Inst #17922 = VPMOVZXBDZ128rrkz |
| 29235 | { 17921, 4, 1, 0, 1122, 0, 0, 2400, X86ImpOpBase + 0, 0, 0x6218f8004829ULL }, // Inst #17921 = VPMOVZXBDZ128rrk |
| 29236 | { 17920, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x6018f8004829ULL }, // Inst #17920 = VPMOVZXBDZ128rr |
| 29237 | { 17919, 7, 1, 0, 274, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6618f8004819ULL }, // Inst #17919 = VPMOVZXBDZ128rmkz |
| 29238 | { 17918, 8, 1, 0, 274, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6218f8004819ULL }, // Inst #17918 = VPMOVZXBDZ128rmk |
| 29239 | { 17917, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6018f8004819ULL }, // Inst #17917 = VPMOVZXBDZ128rm |
| 29240 | { 17916, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x118b8004829ULL }, // Inst #17916 = VPMOVZXBDYrr |
| 29241 | { 17915, 6, 1, 0, 537, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x118b8004819ULL }, // Inst #17915 = VPMOVZXBDYrm |
| 29242 | { 17914, 3, 1, 0, 1267, 0, 0, 3240, X86ImpOpBase + 0, 0, 0xce1878005028ULL }, // Inst #17914 = VPMOVWBZrrkz |
| 29243 | { 17913, 4, 1, 0, 1267, 0, 0, 3236, X86ImpOpBase + 0, 0, 0xca1878005028ULL }, // Inst #17913 = VPMOVWBZrrk |
| 29244 | { 17912, 2, 1, 0, 1827, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xc81878005028ULL }, // Inst #17912 = VPMOVWBZrr |
| 29245 | { 17911, 7, 0, 0, 1975, 0, 0, 4930, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca1878005018ULL }, // Inst #17911 = VPMOVWBZmrk |
| 29246 | { 17910, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc81878005018ULL }, // Inst #17910 = VPMOVWBZmr |
| 29247 | { 17909, 3, 1, 0, 1266, 0, 0, 3218, X86ImpOpBase + 0, 0, 0xa71878005028ULL }, // Inst #17909 = VPMOVWBZ256rrkz |
| 29248 | { 17908, 4, 1, 0, 1266, 0, 0, 3214, X86ImpOpBase + 0, 0, 0xa31878005028ULL }, // Inst #17908 = VPMOVWBZ256rrk |
| 29249 | { 17907, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xa11878005028ULL }, // Inst #17907 = VPMOVWBZ256rr |
| 29250 | { 17906, 7, 0, 0, 2361, 0, 0, 4923, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa31878005018ULL }, // Inst #17906 = VPMOVWBZ256mrk |
| 29251 | { 17905, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa11878005018ULL }, // Inst #17905 = VPMOVWBZ256mr |
| 29252 | { 17904, 3, 1, 0, 2359, 0, 0, 2943, X86ImpOpBase + 0, 0, 0x861878005028ULL }, // Inst #17904 = VPMOVWBZ128rrkz |
| 29253 | { 17903, 4, 1, 0, 2359, 0, 0, 2939, X86ImpOpBase + 0, 0, 0x821878005028ULL }, // Inst #17903 = VPMOVWBZ128rrk |
| 29254 | { 17902, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x801878005028ULL }, // Inst #17902 = VPMOVWBZ128rr |
| 29255 | { 17901, 7, 0, 0, 2356, 0, 0, 4916, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x821878005018ULL }, // Inst #17901 = VPMOVWBZ128mrk |
| 29256 | { 17900, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x801878005018ULL }, // Inst #17900 = VPMOVWBZ128mr |
| 29257 | { 17899, 2, 1, 0, 1229, 0, 0, 5679, X86ImpOpBase + 0, 0, 0xe814f8025029ULL }, // Inst #17899 = VPMOVW2MZkr |
| 29258 | { 17898, 2, 1, 0, 1229, 0, 0, 5677, X86ImpOpBase + 0, 0, 0xc114f8025029ULL }, // Inst #17898 = VPMOVW2MZ256kr |
| 29259 | { 17897, 2, 1, 0, 1229, 0, 0, 5675, X86ImpOpBase + 0, 0, 0xa014f8025029ULL }, // Inst #17897 = VPMOVW2MZ128kr |
| 29260 | { 17896, 3, 1, 0, 1267, 0, 0, 3240, X86ImpOpBase + 0, 0, 0xce0878005028ULL }, // Inst #17896 = VPMOVUSWBZrrkz |
| 29261 | { 17895, 4, 1, 0, 1267, 0, 0, 3236, X86ImpOpBase + 0, 0, 0xca0878005028ULL }, // Inst #17895 = VPMOVUSWBZrrk |
| 29262 | { 17894, 2, 1, 0, 1827, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xc80878005028ULL }, // Inst #17894 = VPMOVUSWBZrr |
| 29263 | { 17893, 7, 0, 0, 1975, 0, 0, 4930, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca0878005018ULL }, // Inst #17893 = VPMOVUSWBZmrk |
| 29264 | { 17892, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc80878005018ULL }, // Inst #17892 = VPMOVUSWBZmr |
| 29265 | { 17891, 3, 1, 0, 1266, 0, 0, 3218, X86ImpOpBase + 0, 0, 0xa70878005028ULL }, // Inst #17891 = VPMOVUSWBZ256rrkz |
| 29266 | { 17890, 4, 1, 0, 1266, 0, 0, 3214, X86ImpOpBase + 0, 0, 0xa30878005028ULL }, // Inst #17890 = VPMOVUSWBZ256rrk |
| 29267 | { 17889, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xa10878005028ULL }, // Inst #17889 = VPMOVUSWBZ256rr |
| 29268 | { 17888, 7, 0, 0, 2361, 0, 0, 4923, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa30878005018ULL }, // Inst #17888 = VPMOVUSWBZ256mrk |
| 29269 | { 17887, 6, 0, 0, 2355, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa10878005018ULL }, // Inst #17887 = VPMOVUSWBZ256mr |
| 29270 | { 17886, 3, 1, 0, 2359, 0, 0, 2943, X86ImpOpBase + 0, 0, 0x860878005028ULL }, // Inst #17886 = VPMOVUSWBZ128rrkz |
| 29271 | { 17885, 4, 1, 0, 2359, 0, 0, 2939, X86ImpOpBase + 0, 0, 0x820878005028ULL }, // Inst #17885 = VPMOVUSWBZ128rrk |
| 29272 | { 17884, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x800878005028ULL }, // Inst #17884 = VPMOVUSWBZ128rr |
| 29273 | { 17883, 7, 0, 0, 2356, 0, 0, 4916, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x820878005018ULL }, // Inst #17883 = VPMOVUSWBZ128mrk |
| 29274 | { 17882, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x800878005018ULL }, // Inst #17882 = VPMOVUSWBZ128mr |
| 29275 | { 17881, 3, 1, 0, 1890, 0, 0, 3187, X86ImpOpBase + 0, 0, 0xae0a78005028ULL }, // Inst #17881 = VPMOVUSQWZrrkz |
| 29276 | { 17880, 4, 1, 0, 1890, 0, 0, 3183, X86ImpOpBase + 0, 0, 0xaa0a78005028ULL }, // Inst #17880 = VPMOVUSQWZrrk |
| 29277 | { 17879, 2, 1, 0, 1828, 0, 0, 3169, X86ImpOpBase + 0, 0, 0xa80a78005028ULL }, // Inst #17879 = VPMOVUSQWZrr |
| 29278 | { 17878, 7, 0, 0, 1975, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xaa0a78005018ULL }, // Inst #17878 = VPMOVUSQWZmrk |
| 29279 | { 17877, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa80a78005018ULL }, // Inst #17877 = VPMOVUSQWZmr |
| 29280 | { 17876, 3, 1, 0, 2362, 0, 0, 3150, X86ImpOpBase + 0, 0, 0x870a78005028ULL }, // Inst #17876 = VPMOVUSQWZ256rrkz |
| 29281 | { 17875, 4, 1, 0, 2362, 0, 0, 3146, X86ImpOpBase + 0, 0, 0x830a78005028ULL }, // Inst #17875 = VPMOVUSQWZ256rrk |
| 29282 | { 17874, 2, 1, 0, 2360, 0, 0, 3086, X86ImpOpBase + 0, 0, 0x810a78005028ULL }, // Inst #17874 = VPMOVUSQWZ256rr |
| 29283 | { 17873, 7, 0, 0, 2361, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x830a78005018ULL }, // Inst #17873 = VPMOVUSQWZ256mrk |
| 29284 | { 17872, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x810a78005018ULL }, // Inst #17872 = VPMOVUSQWZ256mr |
| 29285 | { 17871, 3, 1, 0, 2360, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x660a78005028ULL }, // Inst #17871 = VPMOVUSQWZ128rrkz |
| 29286 | { 17870, 4, 1, 0, 2360, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x620a78005028ULL }, // Inst #17870 = VPMOVUSQWZ128rrk |
| 29287 | { 17869, 2, 1, 0, 2358, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x600a78005028ULL }, // Inst #17869 = VPMOVUSQWZ128rr |
| 29288 | { 17868, 7, 0, 0, 2356, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x620a78005018ULL }, // Inst #17868 = VPMOVUSQWZ128mrk |
| 29289 | { 17867, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x600a78005018ULL }, // Inst #17867 = VPMOVUSQWZ128mr |
| 29290 | { 17866, 3, 1, 0, 1827, 0, 0, 3166, X86ImpOpBase + 0, 0, 0xce0af8005028ULL }, // Inst #17866 = VPMOVUSQDZrrkz |
| 29291 | { 17865, 4, 1, 0, 1827, 0, 0, 3162, X86ImpOpBase + 0, 0, 0xca0af8005028ULL }, // Inst #17865 = VPMOVUSQDZrrk |
| 29292 | { 17864, 2, 1, 0, 1827, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xc80af8005028ULL }, // Inst #17864 = VPMOVUSQDZrr |
| 29293 | { 17863, 7, 0, 0, 1975, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca0af8005018ULL }, // Inst #17863 = VPMOVUSQDZmrk |
| 29294 | { 17862, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc80af8005018ULL }, // Inst #17862 = VPMOVUSQDZmr |
| 29295 | { 17861, 3, 1, 0, 2359, 0, 0, 3150, X86ImpOpBase + 0, 0, 0xa70af8005028ULL }, // Inst #17861 = VPMOVUSQDZ256rrkz |
| 29296 | { 17860, 4, 1, 0, 2359, 0, 0, 3146, X86ImpOpBase + 0, 0, 0xa30af8005028ULL }, // Inst #17860 = VPMOVUSQDZ256rrk |
| 29297 | { 17859, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xa10af8005028ULL }, // Inst #17859 = VPMOVUSQDZ256rr |
| 29298 | { 17858, 7, 0, 0, 2361, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa30af8005018ULL }, // Inst #17858 = VPMOVUSQDZ256mrk |
| 29299 | { 17857, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa10af8005018ULL }, // Inst #17857 = VPMOVUSQDZ256mr |
| 29300 | { 17856, 3, 1, 0, 2357, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x860af8005028ULL }, // Inst #17856 = VPMOVUSQDZ128rrkz |
| 29301 | { 17855, 4, 1, 0, 2357, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x820af8005028ULL }, // Inst #17855 = VPMOVUSQDZ128rrk |
| 29302 | { 17854, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x800af8005028ULL }, // Inst #17854 = VPMOVUSQDZ128rr |
| 29303 | { 17853, 7, 0, 0, 2356, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x820af8005018ULL }, // Inst #17853 = VPMOVUSQDZ128mrk |
| 29304 | { 17852, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x800af8005018ULL }, // Inst #17852 = VPMOVUSQDZ128mr |
| 29305 | { 17851, 3, 1, 0, 1267, 0, 0, 3187, X86ImpOpBase + 0, 0, 0x8e0978005028ULL }, // Inst #17851 = VPMOVUSQBZrrkz |
| 29306 | { 17850, 4, 1, 0, 1267, 0, 0, 3183, X86ImpOpBase + 0, 0, 0x8a0978005028ULL }, // Inst #17850 = VPMOVUSQBZrrk |
| 29307 | { 17849, 2, 1, 0, 1827, 0, 0, 3169, X86ImpOpBase + 0, 0, 0x880978005028ULL }, // Inst #17849 = VPMOVUSQBZrr |
| 29308 | { 17848, 7, 0, 0, 1975, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a0978005018ULL }, // Inst #17848 = VPMOVUSQBZmrk |
| 29309 | { 17847, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x880978005018ULL }, // Inst #17847 = VPMOVUSQBZmr |
| 29310 | { 17846, 3, 1, 0, 1266, 0, 0, 3150, X86ImpOpBase + 0, 0, 0x670978005028ULL }, // Inst #17846 = VPMOVUSQBZ256rrkz |
| 29311 | { 17845, 4, 1, 0, 1266, 0, 0, 3146, X86ImpOpBase + 0, 0, 0x630978005028ULL }, // Inst #17845 = VPMOVUSQBZ256rrk |
| 29312 | { 17844, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0x610978005028ULL }, // Inst #17844 = VPMOVUSQBZ256rr |
| 29313 | { 17843, 7, 0, 0, 2361, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x630978005018ULL }, // Inst #17843 = VPMOVUSQBZ256mrk |
| 29314 | { 17842, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x610978005018ULL }, // Inst #17842 = VPMOVUSQBZ256mr |
| 29315 | { 17841, 3, 1, 0, 2359, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x460978005028ULL }, // Inst #17841 = VPMOVUSQBZ128rrkz |
| 29316 | { 17840, 4, 1, 0, 2359, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x420978005028ULL }, // Inst #17840 = VPMOVUSQBZ128rrk |
| 29317 | { 17839, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x400978005028ULL }, // Inst #17839 = VPMOVUSQBZ128rr |
| 29318 | { 17838, 7, 0, 0, 2356, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x420978005018ULL }, // Inst #17838 = VPMOVUSQBZ128mrk |
| 29319 | { 17837, 6, 0, 0, 1281, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x400978005018ULL }, // Inst #17837 = VPMOVUSQBZ128mr |
| 29320 | { 17836, 3, 1, 0, 1267, 0, 0, 3113, X86ImpOpBase + 0, 0, 0xce09f8005028ULL }, // Inst #17836 = VPMOVUSDWZrrkz |
| 29321 | { 17835, 4, 1, 0, 1267, 0, 0, 3109, X86ImpOpBase + 0, 0, 0xca09f8005028ULL }, // Inst #17835 = VPMOVUSDWZrrk |
| 29322 | { 17834, 2, 1, 0, 1827, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xc809f8005028ULL }, // Inst #17834 = VPMOVUSDWZrr |
| 29323 | { 17833, 7, 0, 0, 1975, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca09f8005018ULL }, // Inst #17833 = VPMOVUSDWZmrk |
| 29324 | { 17832, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc809f8005018ULL }, // Inst #17832 = VPMOVUSDWZmr |
| 29325 | { 17831, 3, 1, 0, 1266, 0, 0, 3092, X86ImpOpBase + 0, 0, 0xa709f8005028ULL }, // Inst #17831 = VPMOVUSDWZ256rrkz |
| 29326 | { 17830, 4, 1, 0, 1266, 0, 0, 3088, X86ImpOpBase + 0, 0, 0xa309f8005028ULL }, // Inst #17830 = VPMOVUSDWZ256rrk |
| 29327 | { 17829, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xa109f8005028ULL }, // Inst #17829 = VPMOVUSDWZ256rr |
| 29328 | { 17828, 7, 0, 0, 2361, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa309f8005018ULL }, // Inst #17828 = VPMOVUSDWZ256mrk |
| 29329 | { 17827, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa109f8005018ULL }, // Inst #17827 = VPMOVUSDWZ256mr |
| 29330 | { 17826, 3, 1, 0, 2359, 0, 0, 2404, X86ImpOpBase + 0, 0, 0x8609f8005028ULL }, // Inst #17826 = VPMOVUSDWZ128rrkz |
| 29331 | { 17825, 4, 1, 0, 2359, 0, 0, 2400, X86ImpOpBase + 0, 0, 0x8209f8005028ULL }, // Inst #17825 = VPMOVUSDWZ128rrk |
| 29332 | { 17824, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x8009f8005028ULL }, // Inst #17824 = VPMOVUSDWZ128rr |
| 29333 | { 17823, 7, 0, 0, 2356, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8209f8005018ULL }, // Inst #17823 = VPMOVUSDWZ128mrk |
| 29334 | { 17822, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8009f8005018ULL }, // Inst #17822 = VPMOVUSDWZ128mr |
| 29335 | { 17821, 3, 1, 0, 1267, 0, 0, 5654, X86ImpOpBase + 0, 0, 0xae08f8005028ULL }, // Inst #17821 = VPMOVUSDBZrrkz |
| 29336 | { 17820, 4, 1, 0, 1267, 0, 0, 5650, X86ImpOpBase + 0, 0, 0xaa08f8005028ULL }, // Inst #17820 = VPMOVUSDBZrrk |
| 29337 | { 17819, 2, 1, 0, 1827, 0, 0, 3169, X86ImpOpBase + 0, 0, 0xa808f8005028ULL }, // Inst #17819 = VPMOVUSDBZrr |
| 29338 | { 17818, 7, 0, 0, 1975, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xaa08f8005018ULL }, // Inst #17818 = VPMOVUSDBZmrk |
| 29339 | { 17817, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa808f8005018ULL }, // Inst #17817 = VPMOVUSDBZmr |
| 29340 | { 17816, 3, 1, 0, 1266, 0, 0, 3092, X86ImpOpBase + 0, 0, 0x8708f8005028ULL }, // Inst #17816 = VPMOVUSDBZ256rrkz |
| 29341 | { 17815, 4, 1, 0, 1266, 0, 0, 3088, X86ImpOpBase + 0, 0, 0x8308f8005028ULL }, // Inst #17815 = VPMOVUSDBZ256rrk |
| 29342 | { 17814, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0x8108f8005028ULL }, // Inst #17814 = VPMOVUSDBZ256rr |
| 29343 | { 17813, 7, 0, 0, 2361, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8308f8005018ULL }, // Inst #17813 = VPMOVUSDBZ256mrk |
| 29344 | { 17812, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8108f8005018ULL }, // Inst #17812 = VPMOVUSDBZ256mr |
| 29345 | { 17811, 3, 1, 0, 2359, 0, 0, 2404, X86ImpOpBase + 0, 0, 0x6608f8005028ULL }, // Inst #17811 = VPMOVUSDBZ128rrkz |
| 29346 | { 17810, 4, 1, 0, 2359, 0, 0, 2400, X86ImpOpBase + 0, 0, 0x6208f8005028ULL }, // Inst #17810 = VPMOVUSDBZ128rrk |
| 29347 | { 17809, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x6008f8005028ULL }, // Inst #17809 = VPMOVUSDBZ128rr |
| 29348 | { 17808, 7, 0, 0, 2356, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6208f8005018ULL }, // Inst #17808 = VPMOVUSDBZ128mrk |
| 29349 | { 17807, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6008f8005018ULL }, // Inst #17807 = VPMOVUSDBZ128mr |
| 29350 | { 17806, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1238004829ULL }, // Inst #17806 = VPMOVSXWQrr |
| 29351 | { 17805, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1238004819ULL }, // Inst #17805 = VPMOVSXWQrm |
| 29352 | { 17804, 3, 1, 0, 1124, 0, 0, 2420, X86ImpOpBase + 0, 0, 0xae1278004829ULL }, // Inst #17804 = VPMOVSXWQZrrkz |
| 29353 | { 17803, 4, 1, 0, 1124, 0, 0, 2416, X86ImpOpBase + 0, 0, 0xaa1278004829ULL }, // Inst #17803 = VPMOVSXWQZrrk |
| 29354 | { 17802, 2, 1, 0, 1124, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xa81278004829ULL }, // Inst #17802 = VPMOVSXWQZrr |
| 29355 | { 17801, 7, 1, 0, 537, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae1278004819ULL }, // Inst #17801 = VPMOVSXWQZrmkz |
| 29356 | { 17800, 8, 1, 0, 537, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa1278004819ULL }, // Inst #17800 = VPMOVSXWQZrmk |
| 29357 | { 17799, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa81278004819ULL }, // Inst #17799 = VPMOVSXWQZrm |
| 29358 | { 17798, 3, 1, 0, 1123, 0, 0, 2413, X86ImpOpBase + 0, 0, 0x871278004829ULL }, // Inst #17798 = VPMOVSXWQZ256rrkz |
| 29359 | { 17797, 4, 1, 0, 1123, 0, 0, 2409, X86ImpOpBase + 0, 0, 0x831278004829ULL }, // Inst #17797 = VPMOVSXWQZ256rrk |
| 29360 | { 17796, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0x811278004829ULL }, // Inst #17796 = VPMOVSXWQZ256rr |
| 29361 | { 17795, 7, 1, 0, 537, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x871278004819ULL }, // Inst #17795 = VPMOVSXWQZ256rmkz |
| 29362 | { 17794, 8, 1, 0, 537, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x831278004819ULL }, // Inst #17794 = VPMOVSXWQZ256rmk |
| 29363 | { 17793, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x811278004819ULL }, // Inst #17793 = VPMOVSXWQZ256rm |
| 29364 | { 17792, 3, 1, 0, 1122, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x661278004829ULL }, // Inst #17792 = VPMOVSXWQZ128rrkz |
| 29365 | { 17791, 4, 1, 0, 1122, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x621278004829ULL }, // Inst #17791 = VPMOVSXWQZ128rrk |
| 29366 | { 17790, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x601278004829ULL }, // Inst #17790 = VPMOVSXWQZ128rr |
| 29367 | { 17789, 7, 1, 0, 274, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x661278004819ULL }, // Inst #17789 = VPMOVSXWQZ128rmkz |
| 29368 | { 17788, 8, 1, 0, 274, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x621278004819ULL }, // Inst #17788 = VPMOVSXWQZ128rmk |
| 29369 | { 17787, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x601278004819ULL }, // Inst #17787 = VPMOVSXWQZ128rm |
| 29370 | { 17786, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x11238004829ULL }, // Inst #17786 = VPMOVSXWQYrr |
| 29371 | { 17785, 6, 1, 0, 847, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x11238004819ULL }, // Inst #17785 = VPMOVSXWQYrm |
| 29372 | { 17784, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x11b8004829ULL }, // Inst #17784 = VPMOVSXWDrr |
| 29373 | { 17783, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x11b8004819ULL }, // Inst #17783 = VPMOVSXWDrm |
| 29374 | { 17782, 3, 1, 0, 1124, 0, 0, 3259, X86ImpOpBase + 0, 0, 0xce11f8004829ULL }, // Inst #17782 = VPMOVSXWDZrrkz |
| 29375 | { 17781, 4, 1, 0, 1124, 0, 0, 3255, X86ImpOpBase + 0, 0, 0xca11f8004829ULL }, // Inst #17781 = VPMOVSXWDZrrk |
| 29376 | { 17780, 2, 1, 0, 1124, 0, 0, 3077, X86ImpOpBase + 0, 0, 0xc811f8004829ULL }, // Inst #17780 = VPMOVSXWDZrr |
| 29377 | { 17779, 7, 1, 0, 537, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce11f8004819ULL }, // Inst #17779 = VPMOVSXWDZrmkz |
| 29378 | { 17778, 8, 1, 0, 537, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca11f8004819ULL }, // Inst #17778 = VPMOVSXWDZrmk |
| 29379 | { 17777, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc811f8004819ULL }, // Inst #17777 = VPMOVSXWDZrm |
| 29380 | { 17776, 3, 1, 0, 1123, 0, 0, 2320, X86ImpOpBase + 0, 0, 0xa711f8004829ULL }, // Inst #17776 = VPMOVSXWDZ256rrkz |
| 29381 | { 17775, 4, 1, 0, 1123, 0, 0, 2316, X86ImpOpBase + 0, 0, 0xa311f8004829ULL }, // Inst #17775 = VPMOVSXWDZ256rrk |
| 29382 | { 17774, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xa111f8004829ULL }, // Inst #17774 = VPMOVSXWDZ256rr |
| 29383 | { 17773, 7, 1, 0, 537, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa711f8004819ULL }, // Inst #17773 = VPMOVSXWDZ256rmkz |
| 29384 | { 17772, 8, 1, 0, 537, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa311f8004819ULL }, // Inst #17772 = VPMOVSXWDZ256rmk |
| 29385 | { 17771, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa111f8004819ULL }, // Inst #17771 = VPMOVSXWDZ256rm |
| 29386 | { 17770, 3, 1, 0, 1122, 0, 0, 2404, X86ImpOpBase + 0, 0, 0x8611f8004829ULL }, // Inst #17770 = VPMOVSXWDZ128rrkz |
| 29387 | { 17769, 4, 1, 0, 1122, 0, 0, 2400, X86ImpOpBase + 0, 0, 0x8211f8004829ULL }, // Inst #17769 = VPMOVSXWDZ128rrk |
| 29388 | { 17768, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x8011f8004829ULL }, // Inst #17768 = VPMOVSXWDZ128rr |
| 29389 | { 17767, 7, 1, 0, 274, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8611f8004819ULL }, // Inst #17767 = VPMOVSXWDZ128rmkz |
| 29390 | { 17766, 8, 1, 0, 274, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8211f8004819ULL }, // Inst #17766 = VPMOVSXWDZ128rmk |
| 29391 | { 17765, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8011f8004819ULL }, // Inst #17765 = VPMOVSXWDZ128rm |
| 29392 | { 17764, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x111b8004829ULL }, // Inst #17764 = VPMOVSXWDYrr |
| 29393 | { 17763, 6, 1, 0, 864, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x111b8004819ULL }, // Inst #17763 = VPMOVSXWDYrm |
| 29394 | { 17762, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x12b8004829ULL }, // Inst #17762 = VPMOVSXDQrr |
| 29395 | { 17761, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x12b8004819ULL }, // Inst #17761 = VPMOVSXDQrm |
| 29396 | { 17760, 3, 1, 0, 1124, 0, 0, 3083, X86ImpOpBase + 0, 0, 0xce12f8004829ULL }, // Inst #17760 = VPMOVSXDQZrrkz |
| 29397 | { 17759, 4, 1, 0, 1124, 0, 0, 3079, X86ImpOpBase + 0, 0, 0xca12f8004829ULL }, // Inst #17759 = VPMOVSXDQZrrk |
| 29398 | { 17758, 2, 1, 0, 1124, 0, 0, 3077, X86ImpOpBase + 0, 0, 0xc812f8004829ULL }, // Inst #17758 = VPMOVSXDQZrr |
| 29399 | { 17757, 7, 1, 0, 537, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce12f8004819ULL }, // Inst #17757 = VPMOVSXDQZrmkz |
| 29400 | { 17756, 8, 1, 0, 537, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca12f8004819ULL }, // Inst #17756 = VPMOVSXDQZrmk |
| 29401 | { 17755, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc812f8004819ULL }, // Inst #17755 = VPMOVSXDQZrm |
| 29402 | { 17754, 3, 1, 0, 1123, 0, 0, 2413, X86ImpOpBase + 0, 0, 0xa712f8004829ULL }, // Inst #17754 = VPMOVSXDQZ256rrkz |
| 29403 | { 17753, 4, 1, 0, 1123, 0, 0, 2409, X86ImpOpBase + 0, 0, 0xa312f8004829ULL }, // Inst #17753 = VPMOVSXDQZ256rrk |
| 29404 | { 17752, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xa112f8004829ULL }, // Inst #17752 = VPMOVSXDQZ256rr |
| 29405 | { 17751, 7, 1, 0, 537, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa712f8004819ULL }, // Inst #17751 = VPMOVSXDQZ256rmkz |
| 29406 | { 17750, 8, 1, 0, 537, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa312f8004819ULL }, // Inst #17750 = VPMOVSXDQZ256rmk |
| 29407 | { 17749, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa112f8004819ULL }, // Inst #17749 = VPMOVSXDQZ256rm |
| 29408 | { 17748, 3, 1, 0, 1122, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x8612f8004829ULL }, // Inst #17748 = VPMOVSXDQZ128rrkz |
| 29409 | { 17747, 4, 1, 0, 1122, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x8212f8004829ULL }, // Inst #17747 = VPMOVSXDQZ128rrk |
| 29410 | { 17746, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x8012f8004829ULL }, // Inst #17746 = VPMOVSXDQZ128rr |
| 29411 | { 17745, 7, 1, 0, 274, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8612f8004819ULL }, // Inst #17745 = VPMOVSXDQZ128rmkz |
| 29412 | { 17744, 8, 1, 0, 274, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8212f8004819ULL }, // Inst #17744 = VPMOVSXDQZ128rmk |
| 29413 | { 17743, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8012f8004819ULL }, // Inst #17743 = VPMOVSXDQZ128rm |
| 29414 | { 17742, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x112b8004829ULL }, // Inst #17742 = VPMOVSXDQYrr |
| 29415 | { 17741, 6, 1, 0, 864, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x112b8004819ULL }, // Inst #17741 = VPMOVSXDQYrm |
| 29416 | { 17740, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1038004829ULL }, // Inst #17740 = VPMOVSXBWrr |
| 29417 | { 17739, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1038004819ULL }, // Inst #17739 = VPMOVSXBWrm |
| 29418 | { 17738, 3, 1, 0, 2167, 0, 0, 3141, X86ImpOpBase + 0, 0, 0xce1078004829ULL }, // Inst #17738 = VPMOVSXBWZrrkz |
| 29419 | { 17737, 4, 1, 0, 2167, 0, 0, 3137, X86ImpOpBase + 0, 0, 0xca1078004829ULL }, // Inst #17737 = VPMOVSXBWZrrk |
| 29420 | { 17736, 2, 1, 0, 1124, 0, 0, 3077, X86ImpOpBase + 0, 0, 0xc81078004829ULL }, // Inst #17736 = VPMOVSXBWZrr |
| 29421 | { 17735, 7, 1, 0, 1877, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce1078004819ULL }, // Inst #17735 = VPMOVSXBWZrmkz |
| 29422 | { 17734, 8, 1, 0, 1877, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca1078004819ULL }, // Inst #17734 = VPMOVSXBWZrmk |
| 29423 | { 17733, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc81078004819ULL }, // Inst #17733 = VPMOVSXBWZrm |
| 29424 | { 17732, 3, 1, 0, 2166, 0, 0, 3134, X86ImpOpBase + 0, 0, 0xa71078004829ULL }, // Inst #17732 = VPMOVSXBWZ256rrkz |
| 29425 | { 17731, 4, 1, 0, 2166, 0, 0, 3130, X86ImpOpBase + 0, 0, 0xa31078004829ULL }, // Inst #17731 = VPMOVSXBWZ256rrk |
| 29426 | { 17730, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xa11078004829ULL }, // Inst #17730 = VPMOVSXBWZ256rr |
| 29427 | { 17729, 7, 1, 0, 1877, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa71078004819ULL }, // Inst #17729 = VPMOVSXBWZ256rmkz |
| 29428 | { 17728, 8, 1, 0, 1877, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa31078004819ULL }, // Inst #17728 = VPMOVSXBWZ256rmk |
| 29429 | { 17727, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa11078004819ULL }, // Inst #17727 = VPMOVSXBWZ256rm |
| 29430 | { 17726, 3, 1, 0, 1699, 0, 0, 2943, X86ImpOpBase + 0, 0, 0x861078004829ULL }, // Inst #17726 = VPMOVSXBWZ128rrkz |
| 29431 | { 17725, 4, 1, 0, 1699, 0, 0, 2939, X86ImpOpBase + 0, 0, 0x821078004829ULL }, // Inst #17725 = VPMOVSXBWZ128rrk |
| 29432 | { 17724, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x801078004829ULL }, // Inst #17724 = VPMOVSXBWZ128rr |
| 29433 | { 17723, 7, 1, 0, 1932, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x861078004819ULL }, // Inst #17723 = VPMOVSXBWZ128rmkz |
| 29434 | { 17722, 8, 1, 0, 1932, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x821078004819ULL }, // Inst #17722 = VPMOVSXBWZ128rmk |
| 29435 | { 17721, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x801078004819ULL }, // Inst #17721 = VPMOVSXBWZ128rm |
| 29436 | { 17720, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x11038004829ULL }, // Inst #17720 = VPMOVSXBWYrr |
| 29437 | { 17719, 6, 1, 0, 864, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x11038004819ULL }, // Inst #17719 = VPMOVSXBWYrm |
| 29438 | { 17718, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1138004829ULL }, // Inst #17718 = VPMOVSXBQrr |
| 29439 | { 17717, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1138004819ULL }, // Inst #17717 = VPMOVSXBQrm |
| 29440 | { 17716, 3, 1, 0, 1124, 0, 0, 2420, X86ImpOpBase + 0, 0, 0x8e1178004829ULL }, // Inst #17716 = VPMOVSXBQZrrkz |
| 29441 | { 17715, 4, 1, 0, 1124, 0, 0, 2416, X86ImpOpBase + 0, 0, 0x8a1178004829ULL }, // Inst #17715 = VPMOVSXBQZrrk |
| 29442 | { 17714, 2, 1, 0, 1124, 0, 0, 2344, X86ImpOpBase + 0, 0, 0x881178004829ULL }, // Inst #17714 = VPMOVSXBQZrr |
| 29443 | { 17713, 7, 1, 0, 537, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8e1178004819ULL }, // Inst #17713 = VPMOVSXBQZrmkz |
| 29444 | { 17712, 8, 1, 0, 537, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a1178004819ULL }, // Inst #17712 = VPMOVSXBQZrmk |
| 29445 | { 17711, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x881178004819ULL }, // Inst #17711 = VPMOVSXBQZrm |
| 29446 | { 17710, 3, 1, 0, 1123, 0, 0, 2413, X86ImpOpBase + 0, 0, 0x671178004829ULL }, // Inst #17710 = VPMOVSXBQZ256rrkz |
| 29447 | { 17709, 4, 1, 0, 1123, 0, 0, 2409, X86ImpOpBase + 0, 0, 0x631178004829ULL }, // Inst #17709 = VPMOVSXBQZ256rrk |
| 29448 | { 17708, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0x611178004829ULL }, // Inst #17708 = VPMOVSXBQZ256rr |
| 29449 | { 17707, 7, 1, 0, 537, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x671178004819ULL }, // Inst #17707 = VPMOVSXBQZ256rmkz |
| 29450 | { 17706, 8, 1, 0, 537, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x631178004819ULL }, // Inst #17706 = VPMOVSXBQZ256rmk |
| 29451 | { 17705, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x611178004819ULL }, // Inst #17705 = VPMOVSXBQZ256rm |
| 29452 | { 17704, 3, 1, 0, 1122, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x461178004829ULL }, // Inst #17704 = VPMOVSXBQZ128rrkz |
| 29453 | { 17703, 4, 1, 0, 1122, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x421178004829ULL }, // Inst #17703 = VPMOVSXBQZ128rrk |
| 29454 | { 17702, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x401178004829ULL }, // Inst #17702 = VPMOVSXBQZ128rr |
| 29455 | { 17701, 7, 1, 0, 274, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x461178004819ULL }, // Inst #17701 = VPMOVSXBQZ128rmkz |
| 29456 | { 17700, 8, 1, 0, 274, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x421178004819ULL }, // Inst #17700 = VPMOVSXBQZ128rmk |
| 29457 | { 17699, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x401178004819ULL }, // Inst #17699 = VPMOVSXBQZ128rm |
| 29458 | { 17698, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x11138004829ULL }, // Inst #17698 = VPMOVSXBQYrr |
| 29459 | { 17697, 6, 1, 0, 847, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x11138004819ULL }, // Inst #17697 = VPMOVSXBQYrm |
| 29460 | { 17696, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x10b8004829ULL }, // Inst #17696 = VPMOVSXBDrr |
| 29461 | { 17695, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10b8004819ULL }, // Inst #17695 = VPMOVSXBDrm |
| 29462 | { 17694, 3, 1, 0, 1124, 0, 0, 2350, X86ImpOpBase + 0, 0, 0xae10f8004829ULL }, // Inst #17694 = VPMOVSXBDZrrkz |
| 29463 | { 17693, 4, 1, 0, 1124, 0, 0, 2346, X86ImpOpBase + 0, 0, 0xaa10f8004829ULL }, // Inst #17693 = VPMOVSXBDZrrk |
| 29464 | { 17692, 2, 1, 0, 1124, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xa810f8004829ULL }, // Inst #17692 = VPMOVSXBDZrr |
| 29465 | { 17691, 7, 1, 0, 537, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae10f8004819ULL }, // Inst #17691 = VPMOVSXBDZrmkz |
| 29466 | { 17690, 8, 1, 0, 537, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa10f8004819ULL }, // Inst #17690 = VPMOVSXBDZrmk |
| 29467 | { 17689, 6, 1, 0, 537, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa810f8004819ULL }, // Inst #17689 = VPMOVSXBDZrm |
| 29468 | { 17688, 3, 1, 0, 1123, 0, 0, 2320, X86ImpOpBase + 0, 0, 0x8710f8004829ULL }, // Inst #17688 = VPMOVSXBDZ256rrkz |
| 29469 | { 17687, 4, 1, 0, 1123, 0, 0, 2316, X86ImpOpBase + 0, 0, 0x8310f8004829ULL }, // Inst #17687 = VPMOVSXBDZ256rrk |
| 29470 | { 17686, 2, 1, 0, 1123, 0, 0, 2314, X86ImpOpBase + 0, 0, 0x8110f8004829ULL }, // Inst #17686 = VPMOVSXBDZ256rr |
| 29471 | { 17685, 7, 1, 0, 537, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8710f8004819ULL }, // Inst #17685 = VPMOVSXBDZ256rmkz |
| 29472 | { 17684, 8, 1, 0, 537, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8310f8004819ULL }, // Inst #17684 = VPMOVSXBDZ256rmk |
| 29473 | { 17683, 6, 1, 0, 537, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8110f8004819ULL }, // Inst #17683 = VPMOVSXBDZ256rm |
| 29474 | { 17682, 3, 1, 0, 1122, 0, 0, 2404, X86ImpOpBase + 0, 0, 0x6610f8004829ULL }, // Inst #17682 = VPMOVSXBDZ128rrkz |
| 29475 | { 17681, 4, 1, 0, 1122, 0, 0, 2400, X86ImpOpBase + 0, 0, 0x6210f8004829ULL }, // Inst #17681 = VPMOVSXBDZ128rrk |
| 29476 | { 17680, 2, 1, 0, 1122, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x6010f8004829ULL }, // Inst #17680 = VPMOVSXBDZ128rr |
| 29477 | { 17679, 7, 1, 0, 274, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6610f8004819ULL }, // Inst #17679 = VPMOVSXBDZ128rmkz |
| 29478 | { 17678, 8, 1, 0, 274, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6210f8004819ULL }, // Inst #17678 = VPMOVSXBDZ128rmk |
| 29479 | { 17677, 6, 1, 0, 274, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6010f8004819ULL }, // Inst #17677 = VPMOVSXBDZ128rm |
| 29480 | { 17676, 2, 1, 0, 1123, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x110b8004829ULL }, // Inst #17676 = VPMOVSXBDYrr |
| 29481 | { 17675, 6, 1, 0, 847, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x110b8004819ULL }, // Inst #17675 = VPMOVSXBDYrm |
| 29482 | { 17674, 3, 1, 0, 1267, 0, 0, 3240, X86ImpOpBase + 0, 0, 0xce1078005028ULL }, // Inst #17674 = VPMOVSWBZrrkz |
| 29483 | { 17673, 4, 1, 0, 1267, 0, 0, 3236, X86ImpOpBase + 0, 0, 0xca1078005028ULL }, // Inst #17673 = VPMOVSWBZrrk |
| 29484 | { 17672, 2, 1, 0, 1827, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xc81078005028ULL }, // Inst #17672 = VPMOVSWBZrr |
| 29485 | { 17671, 7, 0, 0, 1975, 0, 0, 4930, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca1078005018ULL }, // Inst #17671 = VPMOVSWBZmrk |
| 29486 | { 17670, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc81078005018ULL }, // Inst #17670 = VPMOVSWBZmr |
| 29487 | { 17669, 3, 1, 0, 1266, 0, 0, 3218, X86ImpOpBase + 0, 0, 0xa71078005028ULL }, // Inst #17669 = VPMOVSWBZ256rrkz |
| 29488 | { 17668, 4, 1, 0, 1266, 0, 0, 3214, X86ImpOpBase + 0, 0, 0xa31078005028ULL }, // Inst #17668 = VPMOVSWBZ256rrk |
| 29489 | { 17667, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xa11078005028ULL }, // Inst #17667 = VPMOVSWBZ256rr |
| 29490 | { 17666, 7, 0, 0, 2361, 0, 0, 4923, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa31078005018ULL }, // Inst #17666 = VPMOVSWBZ256mrk |
| 29491 | { 17665, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa11078005018ULL }, // Inst #17665 = VPMOVSWBZ256mr |
| 29492 | { 17664, 3, 1, 0, 2359, 0, 0, 2943, X86ImpOpBase + 0, 0, 0x861078005028ULL }, // Inst #17664 = VPMOVSWBZ128rrkz |
| 29493 | { 17663, 4, 1, 0, 2359, 0, 0, 2939, X86ImpOpBase + 0, 0, 0x821078005028ULL }, // Inst #17663 = VPMOVSWBZ128rrk |
| 29494 | { 17662, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x801078005028ULL }, // Inst #17662 = VPMOVSWBZ128rr |
| 29495 | { 17661, 7, 0, 0, 2356, 0, 0, 4916, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x821078005018ULL }, // Inst #17661 = VPMOVSWBZ128mrk |
| 29496 | { 17660, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x801078005018ULL }, // Inst #17660 = VPMOVSWBZ128mr |
| 29497 | { 17659, 3, 1, 0, 1267, 0, 0, 3187, X86ImpOpBase + 0, 0, 0xae1278005028ULL }, // Inst #17659 = VPMOVSQWZrrkz |
| 29498 | { 17658, 4, 1, 0, 1267, 0, 0, 3183, X86ImpOpBase + 0, 0, 0xaa1278005028ULL }, // Inst #17658 = VPMOVSQWZrrk |
| 29499 | { 17657, 2, 1, 0, 1827, 0, 0, 3169, X86ImpOpBase + 0, 0, 0xa81278005028ULL }, // Inst #17657 = VPMOVSQWZrr |
| 29500 | { 17656, 7, 0, 0, 1975, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xaa1278005018ULL }, // Inst #17656 = VPMOVSQWZmrk |
| 29501 | { 17655, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa81278005018ULL }, // Inst #17655 = VPMOVSQWZmr |
| 29502 | { 17654, 3, 1, 0, 1266, 0, 0, 3150, X86ImpOpBase + 0, 0, 0x871278005028ULL }, // Inst #17654 = VPMOVSQWZ256rrkz |
| 29503 | { 17653, 4, 1, 0, 1266, 0, 0, 3146, X86ImpOpBase + 0, 0, 0x831278005028ULL }, // Inst #17653 = VPMOVSQWZ256rrk |
| 29504 | { 17652, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0x811278005028ULL }, // Inst #17652 = VPMOVSQWZ256rr |
| 29505 | { 17651, 7, 0, 0, 2361, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x831278005018ULL }, // Inst #17651 = VPMOVSQWZ256mrk |
| 29506 | { 17650, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x811278005018ULL }, // Inst #17650 = VPMOVSQWZ256mr |
| 29507 | { 17649, 3, 1, 0, 2359, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x661278005028ULL }, // Inst #17649 = VPMOVSQWZ128rrkz |
| 29508 | { 17648, 4, 1, 0, 2359, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x621278005028ULL }, // Inst #17648 = VPMOVSQWZ128rrk |
| 29509 | { 17647, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x601278005028ULL }, // Inst #17647 = VPMOVSQWZ128rr |
| 29510 | { 17646, 7, 0, 0, 2356, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x621278005018ULL }, // Inst #17646 = VPMOVSQWZ128mrk |
| 29511 | { 17645, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x601278005018ULL }, // Inst #17645 = VPMOVSQWZ128mr |
| 29512 | { 17644, 3, 1, 0, 1827, 0, 0, 3166, X86ImpOpBase + 0, 0, 0xce12f8005028ULL }, // Inst #17644 = VPMOVSQDZrrkz |
| 29513 | { 17643, 4, 1, 0, 1827, 0, 0, 3162, X86ImpOpBase + 0, 0, 0xca12f8005028ULL }, // Inst #17643 = VPMOVSQDZrrk |
| 29514 | { 17642, 2, 1, 0, 1827, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xc812f8005028ULL }, // Inst #17642 = VPMOVSQDZrr |
| 29515 | { 17641, 7, 0, 0, 1975, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca12f8005018ULL }, // Inst #17641 = VPMOVSQDZmrk |
| 29516 | { 17640, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc812f8005018ULL }, // Inst #17640 = VPMOVSQDZmr |
| 29517 | { 17639, 3, 1, 0, 2359, 0, 0, 3150, X86ImpOpBase + 0, 0, 0xa712f8005028ULL }, // Inst #17639 = VPMOVSQDZ256rrkz |
| 29518 | { 17638, 4, 1, 0, 2359, 0, 0, 3146, X86ImpOpBase + 0, 0, 0xa312f8005028ULL }, // Inst #17638 = VPMOVSQDZ256rrk |
| 29519 | { 17637, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xa112f8005028ULL }, // Inst #17637 = VPMOVSQDZ256rr |
| 29520 | { 17636, 7, 0, 0, 2361, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa312f8005018ULL }, // Inst #17636 = VPMOVSQDZ256mrk |
| 29521 | { 17635, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa112f8005018ULL }, // Inst #17635 = VPMOVSQDZ256mr |
| 29522 | { 17634, 3, 1, 0, 2357, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x8612f8005028ULL }, // Inst #17634 = VPMOVSQDZ128rrkz |
| 29523 | { 17633, 4, 1, 0, 2357, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x8212f8005028ULL }, // Inst #17633 = VPMOVSQDZ128rrk |
| 29524 | { 17632, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x8012f8005028ULL }, // Inst #17632 = VPMOVSQDZ128rr |
| 29525 | { 17631, 7, 0, 0, 2356, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8212f8005018ULL }, // Inst #17631 = VPMOVSQDZ128mrk |
| 29526 | { 17630, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8012f8005018ULL }, // Inst #17630 = VPMOVSQDZ128mr |
| 29527 | { 17629, 3, 1, 0, 1267, 0, 0, 3187, X86ImpOpBase + 0, 0, 0x8e1178005028ULL }, // Inst #17629 = VPMOVSQBZrrkz |
| 29528 | { 17628, 4, 1, 0, 1267, 0, 0, 3183, X86ImpOpBase + 0, 0, 0x8a1178005028ULL }, // Inst #17628 = VPMOVSQBZrrk |
| 29529 | { 17627, 2, 1, 0, 1827, 0, 0, 3169, X86ImpOpBase + 0, 0, 0x881178005028ULL }, // Inst #17627 = VPMOVSQBZrr |
| 29530 | { 17626, 7, 0, 0, 1975, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a1178005018ULL }, // Inst #17626 = VPMOVSQBZmrk |
| 29531 | { 17625, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x881178005018ULL }, // Inst #17625 = VPMOVSQBZmr |
| 29532 | { 17624, 3, 1, 0, 1266, 0, 0, 3150, X86ImpOpBase + 0, 0, 0x671178005028ULL }, // Inst #17624 = VPMOVSQBZ256rrkz |
| 29533 | { 17623, 4, 1, 0, 1266, 0, 0, 3146, X86ImpOpBase + 0, 0, 0x631178005028ULL }, // Inst #17623 = VPMOVSQBZ256rrk |
| 29534 | { 17622, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0x611178005028ULL }, // Inst #17622 = VPMOVSQBZ256rr |
| 29535 | { 17621, 7, 0, 0, 2361, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x631178005018ULL }, // Inst #17621 = VPMOVSQBZ256mrk |
| 29536 | { 17620, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x611178005018ULL }, // Inst #17620 = VPMOVSQBZ256mr |
| 29537 | { 17619, 3, 1, 0, 2359, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x461178005028ULL }, // Inst #17619 = VPMOVSQBZ128rrkz |
| 29538 | { 17618, 4, 1, 0, 2359, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x421178005028ULL }, // Inst #17618 = VPMOVSQBZ128rrk |
| 29539 | { 17617, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x401178005028ULL }, // Inst #17617 = VPMOVSQBZ128rr |
| 29540 | { 17616, 7, 0, 0, 2356, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x421178005018ULL }, // Inst #17616 = VPMOVSQBZ128mrk |
| 29541 | { 17615, 6, 0, 0, 1281, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x401178005018ULL }, // Inst #17615 = VPMOVSQBZ128mr |
| 29542 | { 17614, 3, 1, 0, 1267, 0, 0, 3113, X86ImpOpBase + 0, 0, 0xce11f8005028ULL }, // Inst #17614 = VPMOVSDWZrrkz |
| 29543 | { 17613, 4, 1, 0, 1267, 0, 0, 3109, X86ImpOpBase + 0, 0, 0xca11f8005028ULL }, // Inst #17613 = VPMOVSDWZrrk |
| 29544 | { 17612, 2, 1, 0, 1827, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xc811f8005028ULL }, // Inst #17612 = VPMOVSDWZrr |
| 29545 | { 17611, 7, 0, 0, 1975, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca11f8005018ULL }, // Inst #17611 = VPMOVSDWZmrk |
| 29546 | { 17610, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc811f8005018ULL }, // Inst #17610 = VPMOVSDWZmr |
| 29547 | { 17609, 3, 1, 0, 1266, 0, 0, 3092, X86ImpOpBase + 0, 0, 0xa711f8005028ULL }, // Inst #17609 = VPMOVSDWZ256rrkz |
| 29548 | { 17608, 4, 1, 0, 1266, 0, 0, 3088, X86ImpOpBase + 0, 0, 0xa311f8005028ULL }, // Inst #17608 = VPMOVSDWZ256rrk |
| 29549 | { 17607, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xa111f8005028ULL }, // Inst #17607 = VPMOVSDWZ256rr |
| 29550 | { 17606, 7, 0, 0, 2361, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa311f8005018ULL }, // Inst #17606 = VPMOVSDWZ256mrk |
| 29551 | { 17605, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa111f8005018ULL }, // Inst #17605 = VPMOVSDWZ256mr |
| 29552 | { 17604, 3, 1, 0, 2359, 0, 0, 2404, X86ImpOpBase + 0, 0, 0x8611f8005028ULL }, // Inst #17604 = VPMOVSDWZ128rrkz |
| 29553 | { 17603, 4, 1, 0, 2359, 0, 0, 2400, X86ImpOpBase + 0, 0, 0x8211f8005028ULL }, // Inst #17603 = VPMOVSDWZ128rrk |
| 29554 | { 17602, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x8011f8005028ULL }, // Inst #17602 = VPMOVSDWZ128rr |
| 29555 | { 17601, 7, 0, 0, 2356, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8211f8005018ULL }, // Inst #17601 = VPMOVSDWZ128mrk |
| 29556 | { 17600, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8011f8005018ULL }, // Inst #17600 = VPMOVSDWZ128mr |
| 29557 | { 17599, 3, 1, 0, 1267, 0, 0, 5654, X86ImpOpBase + 0, 0, 0xae10f8005028ULL }, // Inst #17599 = VPMOVSDBZrrkz |
| 29558 | { 17598, 4, 1, 0, 1267, 0, 0, 5650, X86ImpOpBase + 0, 0, 0xaa10f8005028ULL }, // Inst #17598 = VPMOVSDBZrrk |
| 29559 | { 17597, 2, 1, 0, 1827, 0, 0, 3169, X86ImpOpBase + 0, 0, 0xa810f8005028ULL }, // Inst #17597 = VPMOVSDBZrr |
| 29560 | { 17596, 7, 0, 0, 1975, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xaa10f8005018ULL }, // Inst #17596 = VPMOVSDBZmrk |
| 29561 | { 17595, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa810f8005018ULL }, // Inst #17595 = VPMOVSDBZmr |
| 29562 | { 17594, 3, 1, 0, 1266, 0, 0, 3092, X86ImpOpBase + 0, 0, 0x8710f8005028ULL }, // Inst #17594 = VPMOVSDBZ256rrkz |
| 29563 | { 17593, 4, 1, 0, 1266, 0, 0, 3088, X86ImpOpBase + 0, 0, 0x8310f8005028ULL }, // Inst #17593 = VPMOVSDBZ256rrk |
| 29564 | { 17592, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0x8110f8005028ULL }, // Inst #17592 = VPMOVSDBZ256rr |
| 29565 | { 17591, 7, 0, 0, 2361, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8310f8005018ULL }, // Inst #17591 = VPMOVSDBZ256mrk |
| 29566 | { 17590, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8110f8005018ULL }, // Inst #17590 = VPMOVSDBZ256mr |
| 29567 | { 17589, 3, 1, 0, 2359, 0, 0, 2404, X86ImpOpBase + 0, 0, 0x6610f8005028ULL }, // Inst #17589 = VPMOVSDBZ128rrkz |
| 29568 | { 17588, 4, 1, 0, 2359, 0, 0, 2400, X86ImpOpBase + 0, 0, 0x6210f8005028ULL }, // Inst #17588 = VPMOVSDBZ128rrk |
| 29569 | { 17587, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x6010f8005028ULL }, // Inst #17587 = VPMOVSDBZ128rr |
| 29570 | { 17586, 7, 0, 0, 2356, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6210f8005018ULL }, // Inst #17586 = VPMOVSDBZ128mrk |
| 29571 | { 17585, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6010f8005018ULL }, // Inst #17585 = VPMOVSDBZ128mr |
| 29572 | { 17584, 3, 1, 0, 1267, 0, 0, 3187, X86ImpOpBase + 0, 0, 0xae1a78005028ULL }, // Inst #17584 = VPMOVQWZrrkz |
| 29573 | { 17583, 4, 1, 0, 1267, 0, 0, 3183, X86ImpOpBase + 0, 0, 0xaa1a78005028ULL }, // Inst #17583 = VPMOVQWZrrk |
| 29574 | { 17582, 2, 1, 0, 1827, 0, 0, 3169, X86ImpOpBase + 0, 0, 0xa81a78005028ULL }, // Inst #17582 = VPMOVQWZrr |
| 29575 | { 17581, 7, 0, 0, 1975, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xaa1a78005018ULL }, // Inst #17581 = VPMOVQWZmrk |
| 29576 | { 17580, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa81a78005018ULL }, // Inst #17580 = VPMOVQWZmr |
| 29577 | { 17579, 3, 1, 0, 1266, 0, 0, 3150, X86ImpOpBase + 0, 0, 0x871a78005028ULL }, // Inst #17579 = VPMOVQWZ256rrkz |
| 29578 | { 17578, 4, 1, 0, 1266, 0, 0, 3146, X86ImpOpBase + 0, 0, 0x831a78005028ULL }, // Inst #17578 = VPMOVQWZ256rrk |
| 29579 | { 17577, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0x811a78005028ULL }, // Inst #17577 = VPMOVQWZ256rr |
| 29580 | { 17576, 7, 0, 0, 2361, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x831a78005018ULL }, // Inst #17576 = VPMOVQWZ256mrk |
| 29581 | { 17575, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x811a78005018ULL }, // Inst #17575 = VPMOVQWZ256mr |
| 29582 | { 17574, 3, 1, 0, 2359, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x661a78005028ULL }, // Inst #17574 = VPMOVQWZ128rrkz |
| 29583 | { 17573, 4, 1, 0, 2359, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x621a78005028ULL }, // Inst #17573 = VPMOVQWZ128rrk |
| 29584 | { 17572, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x601a78005028ULL }, // Inst #17572 = VPMOVQWZ128rr |
| 29585 | { 17571, 7, 0, 0, 2356, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x621a78005018ULL }, // Inst #17571 = VPMOVQWZ128mrk |
| 29586 | { 17570, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x601a78005018ULL }, // Inst #17570 = VPMOVQWZ128mr |
| 29587 | { 17569, 3, 1, 0, 1125, 0, 0, 3166, X86ImpOpBase + 0, 0, 0xce1af8005028ULL }, // Inst #17569 = VPMOVQDZrrkz |
| 29588 | { 17568, 4, 1, 0, 1125, 0, 0, 3162, X86ImpOpBase + 0, 0, 0xca1af8005028ULL }, // Inst #17568 = VPMOVQDZrrk |
| 29589 | { 17567, 2, 1, 0, 1125, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xc81af8005028ULL }, // Inst #17567 = VPMOVQDZrr |
| 29590 | { 17566, 7, 0, 0, 1268, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca1af8005018ULL }, // Inst #17566 = VPMOVQDZmrk |
| 29591 | { 17565, 6, 0, 0, 1752, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc81af8005018ULL }, // Inst #17565 = VPMOVQDZmr |
| 29592 | { 17564, 3, 1, 0, 1123, 0, 0, 3150, X86ImpOpBase + 0, 0, 0xa71af8005028ULL }, // Inst #17564 = VPMOVQDZ256rrkz |
| 29593 | { 17563, 4, 1, 0, 1123, 0, 0, 3146, X86ImpOpBase + 0, 0, 0xa31af8005028ULL }, // Inst #17563 = VPMOVQDZ256rrk |
| 29594 | { 17562, 2, 1, 0, 1123, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xa11af8005028ULL }, // Inst #17562 = VPMOVQDZ256rr |
| 29595 | { 17561, 7, 0, 0, 1268, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa31af8005018ULL }, // Inst #17561 = VPMOVQDZ256mrk |
| 29596 | { 17560, 6, 0, 0, 1752, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa11af8005018ULL }, // Inst #17560 = VPMOVQDZ256mr |
| 29597 | { 17559, 3, 1, 0, 1738, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x861af8005028ULL }, // Inst #17559 = VPMOVQDZ128rrkz |
| 29598 | { 17558, 4, 1, 0, 1738, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x821af8005028ULL }, // Inst #17558 = VPMOVQDZ128rrk |
| 29599 | { 17557, 2, 1, 0, 1738, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x801af8005028ULL }, // Inst #17557 = VPMOVQDZ128rr |
| 29600 | { 17556, 7, 0, 0, 1872, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x821af8005018ULL }, // Inst #17556 = VPMOVQDZ128mrk |
| 29601 | { 17555, 6, 0, 0, 1872, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x801af8005018ULL }, // Inst #17555 = VPMOVQDZ128mr |
| 29602 | { 17554, 3, 1, 0, 1267, 0, 0, 3187, X86ImpOpBase + 0, 0, 0x8e1978005028ULL }, // Inst #17554 = VPMOVQBZrrkz |
| 29603 | { 17553, 4, 1, 0, 1267, 0, 0, 3183, X86ImpOpBase + 0, 0, 0x8a1978005028ULL }, // Inst #17553 = VPMOVQBZrrk |
| 29604 | { 17552, 2, 1, 0, 1827, 0, 0, 3169, X86ImpOpBase + 0, 0, 0x881978005028ULL }, // Inst #17552 = VPMOVQBZrr |
| 29605 | { 17551, 7, 0, 0, 1975, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a1978005018ULL }, // Inst #17551 = VPMOVQBZmrk |
| 29606 | { 17550, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x881978005018ULL }, // Inst #17550 = VPMOVQBZmr |
| 29607 | { 17549, 3, 1, 0, 1266, 0, 0, 3150, X86ImpOpBase + 0, 0, 0x671978005028ULL }, // Inst #17549 = VPMOVQBZ256rrkz |
| 29608 | { 17548, 4, 1, 0, 1266, 0, 0, 3146, X86ImpOpBase + 0, 0, 0x631978005028ULL }, // Inst #17548 = VPMOVQBZ256rrk |
| 29609 | { 17547, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0x611978005028ULL }, // Inst #17547 = VPMOVQBZ256rr |
| 29610 | { 17546, 7, 0, 0, 2361, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x631978005018ULL }, // Inst #17546 = VPMOVQBZ256mrk |
| 29611 | { 17545, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x611978005018ULL }, // Inst #17545 = VPMOVQBZ256mr |
| 29612 | { 17544, 3, 1, 0, 2359, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x461978005028ULL }, // Inst #17544 = VPMOVQBZ128rrkz |
| 29613 | { 17543, 4, 1, 0, 2359, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x421978005028ULL }, // Inst #17543 = VPMOVQBZ128rrk |
| 29614 | { 17542, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x401978005028ULL }, // Inst #17542 = VPMOVQBZ128rr |
| 29615 | { 17541, 7, 0, 0, 2356, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x421978005018ULL }, // Inst #17541 = VPMOVQBZ128mrk |
| 29616 | { 17540, 6, 0, 0, 1281, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x401978005018ULL }, // Inst #17540 = VPMOVQBZ128mr |
| 29617 | { 17539, 2, 1, 0, 1229, 0, 0, 5673, X86ImpOpBase + 0, 0, 0xe81cf8025029ULL }, // Inst #17539 = VPMOVQ2MZkr |
| 29618 | { 17538, 2, 1, 0, 1229, 0, 0, 5671, X86ImpOpBase + 0, 0, 0xc11cf8025029ULL }, // Inst #17538 = VPMOVQ2MZ256kr |
| 29619 | { 17537, 2, 1, 0, 1229, 0, 0, 5669, X86ImpOpBase + 0, 0, 0xa01cf8025029ULL }, // Inst #17537 = VPMOVQ2MZ128kr |
| 29620 | { 17536, 2, 1, 0, 273, 0, 0, 1025, X86ImpOpBase + 0, 0, 0x6bb8002829ULL }, // Inst #17536 = VPMOVMSKBrr |
| 29621 | { 17535, 2, 1, 0, 539, 0, 0, 4994, X86ImpOpBase + 0, 0, 0x16bb8002829ULL }, // Inst #17535 = VPMOVMSKBYrr |
| 29622 | { 17534, 2, 1, 0, 1900, 0, 0, 5667, X86ImpOpBase + 0, 0, 0xe81478025029ULL }, // Inst #17534 = VPMOVM2WZrk |
| 29623 | { 17533, 2, 1, 0, 2262, 0, 0, 5164, X86ImpOpBase + 0, 0, 0xc11478025029ULL }, // Inst #17533 = VPMOVM2WZ256rk |
| 29624 | { 17532, 2, 1, 0, 2261, 0, 0, 5156, X86ImpOpBase + 0, 0, 0xa01478025029ULL }, // Inst #17532 = VPMOVM2WZ128rk |
| 29625 | { 17531, 2, 1, 0, 478, 0, 0, 5160, X86ImpOpBase + 0, 0, 0xe81c78025029ULL }, // Inst #17531 = VPMOVM2QZrk |
| 29626 | { 17530, 2, 1, 0, 477, 0, 0, 5665, X86ImpOpBase + 0, 0, 0xc11c78025029ULL }, // Inst #17530 = VPMOVM2QZ256rk |
| 29627 | { 17529, 2, 1, 0, 1849, 0, 0, 5663, X86ImpOpBase + 0, 0, 0xa01c78025029ULL }, // Inst #17529 = VPMOVM2QZ128rk |
| 29628 | { 17528, 2, 1, 0, 478, 0, 0, 5166, X86ImpOpBase + 0, 0, 0xe81c78005029ULL }, // Inst #17528 = VPMOVM2DZrk |
| 29629 | { 17527, 2, 1, 0, 477, 0, 0, 5158, X86ImpOpBase + 0, 0, 0xc11c78005029ULL }, // Inst #17527 = VPMOVM2DZ256rk |
| 29630 | { 17526, 2, 1, 0, 1849, 0, 0, 5661, X86ImpOpBase + 0, 0, 0xa01c78005029ULL }, // Inst #17526 = VPMOVM2DZ128rk |
| 29631 | { 17525, 2, 1, 0, 1900, 0, 0, 5659, X86ImpOpBase + 0, 0, 0xe81478005029ULL }, // Inst #17525 = VPMOVM2BZrk |
| 29632 | { 17524, 2, 1, 0, 2262, 0, 0, 5657, X86ImpOpBase + 0, 0, 0xc11478005029ULL }, // Inst #17524 = VPMOVM2BZ256rk |
| 29633 | { 17523, 2, 1, 0, 2261, 0, 0, 5162, X86ImpOpBase + 0, 0, 0xa01478005029ULL }, // Inst #17523 = VPMOVM2BZ128rk |
| 29634 | { 17522, 3, 1, 0, 1267, 0, 0, 3113, X86ImpOpBase + 0, 0, 0xce19f8005028ULL }, // Inst #17522 = VPMOVDWZrrkz |
| 29635 | { 17521, 4, 1, 0, 1267, 0, 0, 3109, X86ImpOpBase + 0, 0, 0xca19f8005028ULL }, // Inst #17521 = VPMOVDWZrrk |
| 29636 | { 17520, 2, 1, 0, 1827, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xc819f8005028ULL }, // Inst #17520 = VPMOVDWZrr |
| 29637 | { 17519, 7, 0, 0, 1975, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca19f8005018ULL }, // Inst #17519 = VPMOVDWZmrk |
| 29638 | { 17518, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc819f8005018ULL }, // Inst #17518 = VPMOVDWZmr |
| 29639 | { 17517, 3, 1, 0, 1266, 0, 0, 3092, X86ImpOpBase + 0, 0, 0xa719f8005028ULL }, // Inst #17517 = VPMOVDWZ256rrkz |
| 29640 | { 17516, 4, 1, 0, 1266, 0, 0, 3088, X86ImpOpBase + 0, 0, 0xa319f8005028ULL }, // Inst #17516 = VPMOVDWZ256rrk |
| 29641 | { 17515, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xa119f8005028ULL }, // Inst #17515 = VPMOVDWZ256rr |
| 29642 | { 17514, 7, 0, 0, 2361, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa319f8005018ULL }, // Inst #17514 = VPMOVDWZ256mrk |
| 29643 | { 17513, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa119f8005018ULL }, // Inst #17513 = VPMOVDWZ256mr |
| 29644 | { 17512, 3, 1, 0, 2359, 0, 0, 2404, X86ImpOpBase + 0, 0, 0x8619f8005028ULL }, // Inst #17512 = VPMOVDWZ128rrkz |
| 29645 | { 17511, 4, 1, 0, 2359, 0, 0, 2400, X86ImpOpBase + 0, 0, 0x8219f8005028ULL }, // Inst #17511 = VPMOVDWZ128rrk |
| 29646 | { 17510, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x8019f8005028ULL }, // Inst #17510 = VPMOVDWZ128rr |
| 29647 | { 17509, 7, 0, 0, 2356, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8219f8005018ULL }, // Inst #17509 = VPMOVDWZ128mrk |
| 29648 | { 17508, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8019f8005018ULL }, // Inst #17508 = VPMOVDWZ128mr |
| 29649 | { 17507, 3, 1, 0, 1267, 0, 0, 5654, X86ImpOpBase + 0, 0, 0xae18f8005028ULL }, // Inst #17507 = VPMOVDBZrrkz |
| 29650 | { 17506, 4, 1, 0, 1267, 0, 0, 5650, X86ImpOpBase + 0, 0, 0xaa18f8005028ULL }, // Inst #17506 = VPMOVDBZrrk |
| 29651 | { 17505, 2, 1, 0, 1827, 0, 0, 3169, X86ImpOpBase + 0, 0, 0xa818f8005028ULL }, // Inst #17505 = VPMOVDBZrr |
| 29652 | { 17504, 7, 0, 0, 1975, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xaa18f8005018ULL }, // Inst #17504 = VPMOVDBZmrk |
| 29653 | { 17503, 6, 0, 0, 1974, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa818f8005018ULL }, // Inst #17503 = VPMOVDBZmr |
| 29654 | { 17502, 3, 1, 0, 1266, 0, 0, 3092, X86ImpOpBase + 0, 0, 0x8718f8005028ULL }, // Inst #17502 = VPMOVDBZ256rrkz |
| 29655 | { 17501, 4, 1, 0, 1266, 0, 0, 3088, X86ImpOpBase + 0, 0, 0x8318f8005028ULL }, // Inst #17501 = VPMOVDBZ256rrk |
| 29656 | { 17500, 2, 1, 0, 2359, 0, 0, 3086, X86ImpOpBase + 0, 0, 0x8118f8005028ULL }, // Inst #17500 = VPMOVDBZ256rr |
| 29657 | { 17499, 7, 0, 0, 2361, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8318f8005018ULL }, // Inst #17499 = VPMOVDBZ256mrk |
| 29658 | { 17498, 6, 0, 0, 2354, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8118f8005018ULL }, // Inst #17498 = VPMOVDBZ256mr |
| 29659 | { 17497, 3, 1, 0, 2359, 0, 0, 2404, X86ImpOpBase + 0, 0, 0x6618f8005028ULL }, // Inst #17497 = VPMOVDBZ128rrkz |
| 29660 | { 17496, 4, 1, 0, 2359, 0, 0, 2400, X86ImpOpBase + 0, 0, 0x6218f8005028ULL }, // Inst #17496 = VPMOVDBZ128rrk |
| 29661 | { 17495, 2, 1, 0, 2357, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x6018f8005028ULL }, // Inst #17495 = VPMOVDBZ128rr |
| 29662 | { 17494, 7, 0, 0, 2356, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6218f8005018ULL }, // Inst #17494 = VPMOVDBZ128mrk |
| 29663 | { 17493, 6, 0, 0, 2354, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6018f8005018ULL }, // Inst #17493 = VPMOVDBZ128mr |
| 29664 | { 17492, 2, 1, 0, 1229, 0, 0, 5648, X86ImpOpBase + 0, 0, 0xe81cf8005029ULL }, // Inst #17492 = VPMOVD2MZkr |
| 29665 | { 17491, 2, 1, 0, 1229, 0, 0, 5646, X86ImpOpBase + 0, 0, 0xc11cf8005029ULL }, // Inst #17491 = VPMOVD2MZ256kr |
| 29666 | { 17490, 2, 1, 0, 1229, 0, 0, 5644, X86ImpOpBase + 0, 0, 0xa01cf8005029ULL }, // Inst #17490 = VPMOVD2MZ128kr |
| 29667 | { 17489, 2, 1, 0, 1229, 0, 0, 5642, X86ImpOpBase + 0, 0, 0xe814f8005029ULL }, // Inst #17489 = VPMOVB2MZkr |
| 29668 | { 17488, 2, 1, 0, 1229, 0, 0, 5640, X86ImpOpBase + 0, 0, 0xc114f8005029ULL }, // Inst #17488 = VPMOVB2MZ256kr |
| 29669 | { 17487, 2, 1, 0, 1229, 0, 0, 5638, X86ImpOpBase + 0, 0, 0xa014f8005029ULL }, // Inst #17487 = VPMOVB2MZ128kr |
| 29670 | { 17486, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x9d38004829ULL }, // Inst #17486 = VPMINUWrr |
| 29671 | { 17485, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9d38004819ULL }, // Inst #17485 = VPMINUWrm |
| 29672 | { 17484, 4, 1, 0, 1808, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9d78004829ULL }, // Inst #17484 = VPMINUWZrrkz |
| 29673 | { 17483, 5, 1, 0, 1808, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9d78004829ULL }, // Inst #17483 = VPMINUWZrrk |
| 29674 | { 17482, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89d78004829ULL }, // Inst #17482 = VPMINUWZrr |
| 29675 | { 17481, 8, 1, 0, 1855, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9d78004819ULL }, // Inst #17481 = VPMINUWZrmkz |
| 29676 | { 17480, 9, 1, 0, 1855, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9d78004819ULL }, // Inst #17480 = VPMINUWZrmk |
| 29677 | { 17479, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89d78004819ULL }, // Inst #17479 = VPMINUWZrm |
| 29678 | { 17478, 4, 1, 0, 2289, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79d78004829ULL }, // Inst #17478 = VPMINUWZ256rrkz |
| 29679 | { 17477, 5, 1, 0, 2289, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39d78004829ULL }, // Inst #17477 = VPMINUWZ256rrk |
| 29680 | { 17476, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19d78004829ULL }, // Inst #17476 = VPMINUWZ256rr |
| 29681 | { 17475, 8, 1, 0, 2058, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79d78004819ULL }, // Inst #17475 = VPMINUWZ256rmkz |
| 29682 | { 17474, 9, 1, 0, 2058, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39d78004819ULL }, // Inst #17474 = VPMINUWZ256rmk |
| 29683 | { 17473, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19d78004819ULL }, // Inst #17473 = VPMINUWZ256rm |
| 29684 | { 17472, 4, 1, 0, 2290, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69d78004829ULL }, // Inst #17472 = VPMINUWZ128rrkz |
| 29685 | { 17471, 5, 1, 0, 2290, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29d78004829ULL }, // Inst #17471 = VPMINUWZ128rrk |
| 29686 | { 17470, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09d78004829ULL }, // Inst #17470 = VPMINUWZ128rr |
| 29687 | { 17469, 8, 1, 0, 2054, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69d78004819ULL }, // Inst #17469 = VPMINUWZ128rmkz |
| 29688 | { 17468, 9, 1, 0, 2054, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29d78004819ULL }, // Inst #17468 = VPMINUWZ128rmk |
| 29689 | { 17467, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09d78004819ULL }, // Inst #17467 = VPMINUWZ128rm |
| 29690 | { 17466, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x19d38004829ULL }, // Inst #17466 = VPMINUWYrr |
| 29691 | { 17465, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19d38004819ULL }, // Inst #17465 = VPMINUWYrm |
| 29692 | { 17464, 4, 1, 0, 1116, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9df8024829ULL }, // Inst #17464 = VPMINUQZrrkz |
| 29693 | { 17463, 5, 1, 0, 1116, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9df8024829ULL }, // Inst #17463 = VPMINUQZrrk |
| 29694 | { 17462, 3, 1, 0, 1116, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89df8024829ULL }, // Inst #17462 = VPMINUQZrr |
| 29695 | { 17461, 8, 1, 0, 1350, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9df8024819ULL }, // Inst #17461 = VPMINUQZrmkz |
| 29696 | { 17460, 9, 1, 0, 1350, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9df8024819ULL }, // Inst #17460 = VPMINUQZrmk |
| 29697 | { 17459, 8, 1, 0, 1350, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e9df8024819ULL }, // Inst #17459 = VPMINUQZrmbkz |
| 29698 | { 17458, 9, 1, 0, 1350, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a9df8024819ULL }, // Inst #17458 = VPMINUQZrmbk |
| 29699 | { 17457, 7, 1, 0, 1350, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x989df8024819ULL }, // Inst #17457 = VPMINUQZrmb |
| 29700 | { 17456, 7, 1, 0, 1350, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89df8024819ULL }, // Inst #17456 = VPMINUQZrm |
| 29701 | { 17455, 4, 1, 0, 1115, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79df8024829ULL }, // Inst #17455 = VPMINUQZ256rrkz |
| 29702 | { 17454, 5, 1, 0, 1115, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39df8024829ULL }, // Inst #17454 = VPMINUQZ256rrk |
| 29703 | { 17453, 3, 1, 0, 1115, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19df8024829ULL }, // Inst #17453 = VPMINUQZ256rr |
| 29704 | { 17452, 8, 1, 0, 1349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79df8024819ULL }, // Inst #17452 = VPMINUQZ256rmkz |
| 29705 | { 17451, 9, 1, 0, 1349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39df8024819ULL }, // Inst #17451 = VPMINUQZ256rmk |
| 29706 | { 17450, 8, 1, 0, 1349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x979df8024819ULL }, // Inst #17450 = VPMINUQZ256rmbkz |
| 29707 | { 17449, 9, 1, 0, 1349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x939df8024819ULL }, // Inst #17449 = VPMINUQZ256rmbk |
| 29708 | { 17448, 7, 1, 0, 1349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x919df8024819ULL }, // Inst #17448 = VPMINUQZ256rmb |
| 29709 | { 17447, 7, 1, 0, 1349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19df8024819ULL }, // Inst #17447 = VPMINUQZ256rm |
| 29710 | { 17446, 4, 1, 0, 1114, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69df8024829ULL }, // Inst #17446 = VPMINUQZ128rrkz |
| 29711 | { 17445, 5, 1, 0, 1114, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29df8024829ULL }, // Inst #17445 = VPMINUQZ128rrk |
| 29712 | { 17444, 3, 1, 0, 1114, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09df8024829ULL }, // Inst #17444 = VPMINUQZ128rr |
| 29713 | { 17443, 8, 1, 0, 1341, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69df8024819ULL }, // Inst #17443 = VPMINUQZ128rmkz |
| 29714 | { 17442, 9, 1, 0, 1341, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29df8024819ULL }, // Inst #17442 = VPMINUQZ128rmk |
| 29715 | { 17441, 8, 1, 0, 1341, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x969df8024819ULL }, // Inst #17441 = VPMINUQZ128rmbkz |
| 29716 | { 17440, 9, 1, 0, 1341, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x929df8024819ULL }, // Inst #17440 = VPMINUQZ128rmbk |
| 29717 | { 17439, 7, 1, 0, 1341, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x909df8024819ULL }, // Inst #17439 = VPMINUQZ128rmb |
| 29718 | { 17438, 7, 1, 0, 1341, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09df8024819ULL }, // Inst #17438 = VPMINUQZ128rm |
| 29719 | { 17437, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x9db8004829ULL }, // Inst #17437 = VPMINUDrr |
| 29720 | { 17436, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9db8004819ULL }, // Inst #17436 = VPMINUDrm |
| 29721 | { 17435, 4, 1, 0, 1798, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9df8004829ULL }, // Inst #17435 = VPMINUDZrrkz |
| 29722 | { 17434, 5, 1, 0, 1798, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9df8004829ULL }, // Inst #17434 = VPMINUDZrrk |
| 29723 | { 17433, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89df8004829ULL }, // Inst #17433 = VPMINUDZrr |
| 29724 | { 17432, 8, 1, 0, 455, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9df8004819ULL }, // Inst #17432 = VPMINUDZrmkz |
| 29725 | { 17431, 9, 1, 0, 455, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9df8004819ULL }, // Inst #17431 = VPMINUDZrmk |
| 29726 | { 17430, 8, 1, 0, 455, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e9df8004819ULL }, // Inst #17430 = VPMINUDZrmbkz |
| 29727 | { 17429, 9, 1, 0, 455, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a9df8004819ULL }, // Inst #17429 = VPMINUDZrmbk |
| 29728 | { 17428, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x789df8004819ULL }, // Inst #17428 = VPMINUDZrmb |
| 29729 | { 17427, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89df8004819ULL }, // Inst #17427 = VPMINUDZrm |
| 29730 | { 17426, 4, 1, 0, 454, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79df8004829ULL }, // Inst #17426 = VPMINUDZ256rrkz |
| 29731 | { 17425, 5, 1, 0, 454, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39df8004829ULL }, // Inst #17425 = VPMINUDZ256rrk |
| 29732 | { 17424, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19df8004829ULL }, // Inst #17424 = VPMINUDZ256rr |
| 29733 | { 17423, 8, 1, 0, 453, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79df8004819ULL }, // Inst #17423 = VPMINUDZ256rmkz |
| 29734 | { 17422, 9, 1, 0, 453, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39df8004819ULL }, // Inst #17422 = VPMINUDZ256rmk |
| 29735 | { 17421, 8, 1, 0, 453, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x779df8004819ULL }, // Inst #17421 = VPMINUDZ256rmbkz |
| 29736 | { 17420, 9, 1, 0, 453, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x739df8004819ULL }, // Inst #17420 = VPMINUDZ256rmbk |
| 29737 | { 17419, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x719df8004819ULL }, // Inst #17419 = VPMINUDZ256rmb |
| 29738 | { 17418, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19df8004819ULL }, // Inst #17418 = VPMINUDZ256rm |
| 29739 | { 17417, 4, 1, 0, 144, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69df8004829ULL }, // Inst #17417 = VPMINUDZ128rrkz |
| 29740 | { 17416, 5, 1, 0, 144, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29df8004829ULL }, // Inst #17416 = VPMINUDZ128rrk |
| 29741 | { 17415, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09df8004829ULL }, // Inst #17415 = VPMINUDZ128rr |
| 29742 | { 17414, 8, 1, 0, 150, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69df8004819ULL }, // Inst #17414 = VPMINUDZ128rmkz |
| 29743 | { 17413, 9, 1, 0, 150, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29df8004819ULL }, // Inst #17413 = VPMINUDZ128rmk |
| 29744 | { 17412, 8, 1, 0, 150, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x769df8004819ULL }, // Inst #17412 = VPMINUDZ128rmbkz |
| 29745 | { 17411, 9, 1, 0, 150, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x729df8004819ULL }, // Inst #17411 = VPMINUDZ128rmbk |
| 29746 | { 17410, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x709df8004819ULL }, // Inst #17410 = VPMINUDZ128rmb |
| 29747 | { 17409, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09df8004819ULL }, // Inst #17409 = VPMINUDZ128rm |
| 29748 | { 17408, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x19db8004829ULL }, // Inst #17408 = VPMINUDYrr |
| 29749 | { 17407, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19db8004819ULL }, // Inst #17407 = VPMINUDYrm |
| 29750 | { 17406, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xed38002829ULL }, // Inst #17406 = VPMINUBrr |
| 29751 | { 17405, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xed38002819ULL }, // Inst #17405 = VPMINUBrm |
| 29752 | { 17404, 4, 1, 0, 1808, 0, 0, 2920, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeed78002829ULL }, // Inst #17404 = VPMINUBZrrkz |
| 29753 | { 17403, 5, 1, 0, 1808, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaed78002829ULL }, // Inst #17403 = VPMINUBZrrk |
| 29754 | { 17402, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ed78002829ULL }, // Inst #17402 = VPMINUBZrr |
| 29755 | { 17401, 8, 1, 0, 1855, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeed78002819ULL }, // Inst #17401 = VPMINUBZrmkz |
| 29756 | { 17400, 9, 1, 0, 1855, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaed78002819ULL }, // Inst #17400 = VPMINUBZrmk |
| 29757 | { 17399, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ed78002819ULL }, // Inst #17399 = VPMINUBZrm |
| 29758 | { 17398, 4, 1, 0, 2289, 0, 0, 2894, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7ed78002829ULL }, // Inst #17398 = VPMINUBZ256rrkz |
| 29759 | { 17397, 5, 1, 0, 2289, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ed78002829ULL }, // Inst #17397 = VPMINUBZ256rrk |
| 29760 | { 17396, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ed78002829ULL }, // Inst #17396 = VPMINUBZ256rr |
| 29761 | { 17395, 8, 1, 0, 2058, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ed78002819ULL }, // Inst #17395 = VPMINUBZ256rmkz |
| 29762 | { 17394, 9, 1, 0, 2058, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ed78002819ULL }, // Inst #17394 = VPMINUBZ256rmk |
| 29763 | { 17393, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ed78002819ULL }, // Inst #17393 = VPMINUBZ256rm |
| 29764 | { 17392, 4, 1, 0, 2290, 0, 0, 2868, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6ed78002829ULL }, // Inst #17392 = VPMINUBZ128rrkz |
| 29765 | { 17391, 5, 1, 0, 2290, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ed78002829ULL }, // Inst #17391 = VPMINUBZ128rrk |
| 29766 | { 17390, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ed78002829ULL }, // Inst #17390 = VPMINUBZ128rr |
| 29767 | { 17389, 8, 1, 0, 2054, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ed78002819ULL }, // Inst #17389 = VPMINUBZ128rmkz |
| 29768 | { 17388, 9, 1, 0, 2054, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ed78002819ULL }, // Inst #17388 = VPMINUBZ128rmk |
| 29769 | { 17387, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ed78002819ULL }, // Inst #17387 = VPMINUBZ128rm |
| 29770 | { 17386, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1ed38002829ULL }, // Inst #17386 = VPMINUBYrr |
| 29771 | { 17385, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ed38002819ULL }, // Inst #17385 = VPMINUBYrm |
| 29772 | { 17384, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf538002829ULL }, // Inst #17384 = VPMINSWrr |
| 29773 | { 17383, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf538002819ULL }, // Inst #17383 = VPMINSWrm |
| 29774 | { 17382, 4, 1, 0, 1808, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef578002829ULL }, // Inst #17382 = VPMINSWZrrkz |
| 29775 | { 17381, 5, 1, 0, 1808, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf578002829ULL }, // Inst #17381 = VPMINSWZrrk |
| 29776 | { 17380, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f578002829ULL }, // Inst #17380 = VPMINSWZrr |
| 29777 | { 17379, 8, 1, 0, 1855, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef578002819ULL }, // Inst #17379 = VPMINSWZrmkz |
| 29778 | { 17378, 9, 1, 0, 1855, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf578002819ULL }, // Inst #17378 = VPMINSWZrmk |
| 29779 | { 17377, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f578002819ULL }, // Inst #17377 = VPMINSWZrm |
| 29780 | { 17376, 4, 1, 0, 2289, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f578002829ULL }, // Inst #17376 = VPMINSWZ256rrkz |
| 29781 | { 17375, 5, 1, 0, 2289, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f578002829ULL }, // Inst #17375 = VPMINSWZ256rrk |
| 29782 | { 17374, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f578002829ULL }, // Inst #17374 = VPMINSWZ256rr |
| 29783 | { 17373, 8, 1, 0, 2058, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f578002819ULL }, // Inst #17373 = VPMINSWZ256rmkz |
| 29784 | { 17372, 9, 1, 0, 2058, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f578002819ULL }, // Inst #17372 = VPMINSWZ256rmk |
| 29785 | { 17371, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f578002819ULL }, // Inst #17371 = VPMINSWZ256rm |
| 29786 | { 17370, 4, 1, 0, 2290, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f578002829ULL }, // Inst #17370 = VPMINSWZ128rrkz |
| 29787 | { 17369, 5, 1, 0, 2290, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f578002829ULL }, // Inst #17369 = VPMINSWZ128rrk |
| 29788 | { 17368, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f578002829ULL }, // Inst #17368 = VPMINSWZ128rr |
| 29789 | { 17367, 8, 1, 0, 2054, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f578002819ULL }, // Inst #17367 = VPMINSWZ128rmkz |
| 29790 | { 17366, 9, 1, 0, 2054, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f578002819ULL }, // Inst #17366 = VPMINSWZ128rmk |
| 29791 | { 17365, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f578002819ULL }, // Inst #17365 = VPMINSWZ128rm |
| 29792 | { 17364, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f538002829ULL }, // Inst #17364 = VPMINSWYrr |
| 29793 | { 17363, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f538002819ULL }, // Inst #17363 = VPMINSWYrm |
| 29794 | { 17362, 4, 1, 0, 1116, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9cf8024829ULL }, // Inst #17362 = VPMINSQZrrkz |
| 29795 | { 17361, 5, 1, 0, 1116, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9cf8024829ULL }, // Inst #17361 = VPMINSQZrrk |
| 29796 | { 17360, 3, 1, 0, 1116, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89cf8024829ULL }, // Inst #17360 = VPMINSQZrr |
| 29797 | { 17359, 8, 1, 0, 1350, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9cf8024819ULL }, // Inst #17359 = VPMINSQZrmkz |
| 29798 | { 17358, 9, 1, 0, 1350, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9cf8024819ULL }, // Inst #17358 = VPMINSQZrmk |
| 29799 | { 17357, 8, 1, 0, 1350, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e9cf8024819ULL }, // Inst #17357 = VPMINSQZrmbkz |
| 29800 | { 17356, 9, 1, 0, 1350, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a9cf8024819ULL }, // Inst #17356 = VPMINSQZrmbk |
| 29801 | { 17355, 7, 1, 0, 1350, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x989cf8024819ULL }, // Inst #17355 = VPMINSQZrmb |
| 29802 | { 17354, 7, 1, 0, 1350, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89cf8024819ULL }, // Inst #17354 = VPMINSQZrm |
| 29803 | { 17353, 4, 1, 0, 1115, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79cf8024829ULL }, // Inst #17353 = VPMINSQZ256rrkz |
| 29804 | { 17352, 5, 1, 0, 1115, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39cf8024829ULL }, // Inst #17352 = VPMINSQZ256rrk |
| 29805 | { 17351, 3, 1, 0, 1115, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19cf8024829ULL }, // Inst #17351 = VPMINSQZ256rr |
| 29806 | { 17350, 8, 1, 0, 1349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79cf8024819ULL }, // Inst #17350 = VPMINSQZ256rmkz |
| 29807 | { 17349, 9, 1, 0, 1349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39cf8024819ULL }, // Inst #17349 = VPMINSQZ256rmk |
| 29808 | { 17348, 8, 1, 0, 1349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x979cf8024819ULL }, // Inst #17348 = VPMINSQZ256rmbkz |
| 29809 | { 17347, 9, 1, 0, 1349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x939cf8024819ULL }, // Inst #17347 = VPMINSQZ256rmbk |
| 29810 | { 17346, 7, 1, 0, 1349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x919cf8024819ULL }, // Inst #17346 = VPMINSQZ256rmb |
| 29811 | { 17345, 7, 1, 0, 1349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19cf8024819ULL }, // Inst #17345 = VPMINSQZ256rm |
| 29812 | { 17344, 4, 1, 0, 1114, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69cf8024829ULL }, // Inst #17344 = VPMINSQZ128rrkz |
| 29813 | { 17343, 5, 1, 0, 1114, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29cf8024829ULL }, // Inst #17343 = VPMINSQZ128rrk |
| 29814 | { 17342, 3, 1, 0, 1114, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09cf8024829ULL }, // Inst #17342 = VPMINSQZ128rr |
| 29815 | { 17341, 8, 1, 0, 1341, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69cf8024819ULL }, // Inst #17341 = VPMINSQZ128rmkz |
| 29816 | { 17340, 9, 1, 0, 1341, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29cf8024819ULL }, // Inst #17340 = VPMINSQZ128rmk |
| 29817 | { 17339, 8, 1, 0, 1341, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x969cf8024819ULL }, // Inst #17339 = VPMINSQZ128rmbkz |
| 29818 | { 17338, 9, 1, 0, 1341, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x929cf8024819ULL }, // Inst #17338 = VPMINSQZ128rmbk |
| 29819 | { 17337, 7, 1, 0, 1341, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x909cf8024819ULL }, // Inst #17337 = VPMINSQZ128rmb |
| 29820 | { 17336, 7, 1, 0, 1341, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09cf8024819ULL }, // Inst #17336 = VPMINSQZ128rm |
| 29821 | { 17335, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x9cb8004829ULL }, // Inst #17335 = VPMINSDrr |
| 29822 | { 17334, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9cb8004819ULL }, // Inst #17334 = VPMINSDrm |
| 29823 | { 17333, 4, 1, 0, 1798, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9cf8004829ULL }, // Inst #17333 = VPMINSDZrrkz |
| 29824 | { 17332, 5, 1, 0, 1798, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9cf8004829ULL }, // Inst #17332 = VPMINSDZrrk |
| 29825 | { 17331, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89cf8004829ULL }, // Inst #17331 = VPMINSDZrr |
| 29826 | { 17330, 8, 1, 0, 455, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9cf8004819ULL }, // Inst #17330 = VPMINSDZrmkz |
| 29827 | { 17329, 9, 1, 0, 455, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9cf8004819ULL }, // Inst #17329 = VPMINSDZrmk |
| 29828 | { 17328, 8, 1, 0, 455, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e9cf8004819ULL }, // Inst #17328 = VPMINSDZrmbkz |
| 29829 | { 17327, 9, 1, 0, 455, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a9cf8004819ULL }, // Inst #17327 = VPMINSDZrmbk |
| 29830 | { 17326, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x789cf8004819ULL }, // Inst #17326 = VPMINSDZrmb |
| 29831 | { 17325, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89cf8004819ULL }, // Inst #17325 = VPMINSDZrm |
| 29832 | { 17324, 4, 1, 0, 454, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79cf8004829ULL }, // Inst #17324 = VPMINSDZ256rrkz |
| 29833 | { 17323, 5, 1, 0, 454, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39cf8004829ULL }, // Inst #17323 = VPMINSDZ256rrk |
| 29834 | { 17322, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19cf8004829ULL }, // Inst #17322 = VPMINSDZ256rr |
| 29835 | { 17321, 8, 1, 0, 453, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79cf8004819ULL }, // Inst #17321 = VPMINSDZ256rmkz |
| 29836 | { 17320, 9, 1, 0, 453, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39cf8004819ULL }, // Inst #17320 = VPMINSDZ256rmk |
| 29837 | { 17319, 8, 1, 0, 453, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x779cf8004819ULL }, // Inst #17319 = VPMINSDZ256rmbkz |
| 29838 | { 17318, 9, 1, 0, 453, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x739cf8004819ULL }, // Inst #17318 = VPMINSDZ256rmbk |
| 29839 | { 17317, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x719cf8004819ULL }, // Inst #17317 = VPMINSDZ256rmb |
| 29840 | { 17316, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19cf8004819ULL }, // Inst #17316 = VPMINSDZ256rm |
| 29841 | { 17315, 4, 1, 0, 144, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69cf8004829ULL }, // Inst #17315 = VPMINSDZ128rrkz |
| 29842 | { 17314, 5, 1, 0, 144, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29cf8004829ULL }, // Inst #17314 = VPMINSDZ128rrk |
| 29843 | { 17313, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09cf8004829ULL }, // Inst #17313 = VPMINSDZ128rr |
| 29844 | { 17312, 8, 1, 0, 150, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69cf8004819ULL }, // Inst #17312 = VPMINSDZ128rmkz |
| 29845 | { 17311, 9, 1, 0, 150, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29cf8004819ULL }, // Inst #17311 = VPMINSDZ128rmk |
| 29846 | { 17310, 8, 1, 0, 150, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x769cf8004819ULL }, // Inst #17310 = VPMINSDZ128rmbkz |
| 29847 | { 17309, 9, 1, 0, 150, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x729cf8004819ULL }, // Inst #17309 = VPMINSDZ128rmbk |
| 29848 | { 17308, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x709cf8004819ULL }, // Inst #17308 = VPMINSDZ128rmb |
| 29849 | { 17307, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09cf8004819ULL }, // Inst #17307 = VPMINSDZ128rm |
| 29850 | { 17306, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x19cb8004829ULL }, // Inst #17306 = VPMINSDYrr |
| 29851 | { 17305, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19cb8004819ULL }, // Inst #17305 = VPMINSDYrm |
| 29852 | { 17304, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x9c38004829ULL }, // Inst #17304 = VPMINSBrr |
| 29853 | { 17303, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9c38004819ULL }, // Inst #17303 = VPMINSBrm |
| 29854 | { 17302, 4, 1, 0, 1808, 0, 0, 2920, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9c78004829ULL }, // Inst #17302 = VPMINSBZrrkz |
| 29855 | { 17301, 5, 1, 0, 1808, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9c78004829ULL }, // Inst #17301 = VPMINSBZrrk |
| 29856 | { 17300, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89c78004829ULL }, // Inst #17300 = VPMINSBZrr |
| 29857 | { 17299, 8, 1, 0, 1855, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9c78004819ULL }, // Inst #17299 = VPMINSBZrmkz |
| 29858 | { 17298, 9, 1, 0, 1855, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9c78004819ULL }, // Inst #17298 = VPMINSBZrmk |
| 29859 | { 17297, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89c78004819ULL }, // Inst #17297 = VPMINSBZrm |
| 29860 | { 17296, 4, 1, 0, 2289, 0, 0, 2894, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79c78004829ULL }, // Inst #17296 = VPMINSBZ256rrkz |
| 29861 | { 17295, 5, 1, 0, 2289, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39c78004829ULL }, // Inst #17295 = VPMINSBZ256rrk |
| 29862 | { 17294, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19c78004829ULL }, // Inst #17294 = VPMINSBZ256rr |
| 29863 | { 17293, 8, 1, 0, 2058, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79c78004819ULL }, // Inst #17293 = VPMINSBZ256rmkz |
| 29864 | { 17292, 9, 1, 0, 2058, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39c78004819ULL }, // Inst #17292 = VPMINSBZ256rmk |
| 29865 | { 17291, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19c78004819ULL }, // Inst #17291 = VPMINSBZ256rm |
| 29866 | { 17290, 4, 1, 0, 2290, 0, 0, 2868, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69c78004829ULL }, // Inst #17290 = VPMINSBZ128rrkz |
| 29867 | { 17289, 5, 1, 0, 2290, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29c78004829ULL }, // Inst #17289 = VPMINSBZ128rrk |
| 29868 | { 17288, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09c78004829ULL }, // Inst #17288 = VPMINSBZ128rr |
| 29869 | { 17287, 8, 1, 0, 2054, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69c78004819ULL }, // Inst #17287 = VPMINSBZ128rmkz |
| 29870 | { 17286, 9, 1, 0, 2054, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29c78004819ULL }, // Inst #17286 = VPMINSBZ128rmk |
| 29871 | { 17285, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09c78004819ULL }, // Inst #17285 = VPMINSBZ128rm |
| 29872 | { 17284, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x19c38004829ULL }, // Inst #17284 = VPMINSBYrr |
| 29873 | { 17283, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19c38004819ULL }, // Inst #17283 = VPMINSBYrm |
| 29874 | { 17282, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x9f38004829ULL }, // Inst #17282 = VPMAXUWrr |
| 29875 | { 17281, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9f38004819ULL }, // Inst #17281 = VPMAXUWrm |
| 29876 | { 17280, 4, 1, 0, 1808, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9f78004829ULL }, // Inst #17280 = VPMAXUWZrrkz |
| 29877 | { 17279, 5, 1, 0, 1808, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9f78004829ULL }, // Inst #17279 = VPMAXUWZrrk |
| 29878 | { 17278, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89f78004829ULL }, // Inst #17278 = VPMAXUWZrr |
| 29879 | { 17277, 8, 1, 0, 1855, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9f78004819ULL }, // Inst #17277 = VPMAXUWZrmkz |
| 29880 | { 17276, 9, 1, 0, 1855, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9f78004819ULL }, // Inst #17276 = VPMAXUWZrmk |
| 29881 | { 17275, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89f78004819ULL }, // Inst #17275 = VPMAXUWZrm |
| 29882 | { 17274, 4, 1, 0, 2289, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79f78004829ULL }, // Inst #17274 = VPMAXUWZ256rrkz |
| 29883 | { 17273, 5, 1, 0, 2289, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39f78004829ULL }, // Inst #17273 = VPMAXUWZ256rrk |
| 29884 | { 17272, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19f78004829ULL }, // Inst #17272 = VPMAXUWZ256rr |
| 29885 | { 17271, 8, 1, 0, 2058, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79f78004819ULL }, // Inst #17271 = VPMAXUWZ256rmkz |
| 29886 | { 17270, 9, 1, 0, 2058, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39f78004819ULL }, // Inst #17270 = VPMAXUWZ256rmk |
| 29887 | { 17269, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19f78004819ULL }, // Inst #17269 = VPMAXUWZ256rm |
| 29888 | { 17268, 4, 1, 0, 2290, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69f78004829ULL }, // Inst #17268 = VPMAXUWZ128rrkz |
| 29889 | { 17267, 5, 1, 0, 2290, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29f78004829ULL }, // Inst #17267 = VPMAXUWZ128rrk |
| 29890 | { 17266, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09f78004829ULL }, // Inst #17266 = VPMAXUWZ128rr |
| 29891 | { 17265, 8, 1, 0, 2054, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69f78004819ULL }, // Inst #17265 = VPMAXUWZ128rmkz |
| 29892 | { 17264, 9, 1, 0, 2054, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29f78004819ULL }, // Inst #17264 = VPMAXUWZ128rmk |
| 29893 | { 17263, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09f78004819ULL }, // Inst #17263 = VPMAXUWZ128rm |
| 29894 | { 17262, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x19f38004829ULL }, // Inst #17262 = VPMAXUWYrr |
| 29895 | { 17261, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19f38004819ULL }, // Inst #17261 = VPMAXUWYrm |
| 29896 | { 17260, 4, 1, 0, 1116, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9ff8024829ULL }, // Inst #17260 = VPMAXUQZrrkz |
| 29897 | { 17259, 5, 1, 0, 1116, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9ff8024829ULL }, // Inst #17259 = VPMAXUQZrrk |
| 29898 | { 17258, 3, 1, 0, 1116, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89ff8024829ULL }, // Inst #17258 = VPMAXUQZrr |
| 29899 | { 17257, 8, 1, 0, 1350, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9ff8024819ULL }, // Inst #17257 = VPMAXUQZrmkz |
| 29900 | { 17256, 9, 1, 0, 1350, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9ff8024819ULL }, // Inst #17256 = VPMAXUQZrmk |
| 29901 | { 17255, 8, 1, 0, 1350, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e9ff8024819ULL }, // Inst #17255 = VPMAXUQZrmbkz |
| 29902 | { 17254, 9, 1, 0, 1350, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a9ff8024819ULL }, // Inst #17254 = VPMAXUQZrmbk |
| 29903 | { 17253, 7, 1, 0, 1350, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x989ff8024819ULL }, // Inst #17253 = VPMAXUQZrmb |
| 29904 | { 17252, 7, 1, 0, 1350, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89ff8024819ULL }, // Inst #17252 = VPMAXUQZrm |
| 29905 | { 17251, 4, 1, 0, 1115, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79ff8024829ULL }, // Inst #17251 = VPMAXUQZ256rrkz |
| 29906 | { 17250, 5, 1, 0, 1115, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39ff8024829ULL }, // Inst #17250 = VPMAXUQZ256rrk |
| 29907 | { 17249, 3, 1, 0, 1115, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19ff8024829ULL }, // Inst #17249 = VPMAXUQZ256rr |
| 29908 | { 17248, 8, 1, 0, 1349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79ff8024819ULL }, // Inst #17248 = VPMAXUQZ256rmkz |
| 29909 | { 17247, 9, 1, 0, 1349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39ff8024819ULL }, // Inst #17247 = VPMAXUQZ256rmk |
| 29910 | { 17246, 8, 1, 0, 1349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x979ff8024819ULL }, // Inst #17246 = VPMAXUQZ256rmbkz |
| 29911 | { 17245, 9, 1, 0, 1349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x939ff8024819ULL }, // Inst #17245 = VPMAXUQZ256rmbk |
| 29912 | { 17244, 7, 1, 0, 1349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x919ff8024819ULL }, // Inst #17244 = VPMAXUQZ256rmb |
| 29913 | { 17243, 7, 1, 0, 1349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19ff8024819ULL }, // Inst #17243 = VPMAXUQZ256rm |
| 29914 | { 17242, 4, 1, 0, 1114, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69ff8024829ULL }, // Inst #17242 = VPMAXUQZ128rrkz |
| 29915 | { 17241, 5, 1, 0, 1114, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29ff8024829ULL }, // Inst #17241 = VPMAXUQZ128rrk |
| 29916 | { 17240, 3, 1, 0, 1114, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09ff8024829ULL }, // Inst #17240 = VPMAXUQZ128rr |
| 29917 | { 17239, 8, 1, 0, 1341, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69ff8024819ULL }, // Inst #17239 = VPMAXUQZ128rmkz |
| 29918 | { 17238, 9, 1, 0, 1341, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29ff8024819ULL }, // Inst #17238 = VPMAXUQZ128rmk |
| 29919 | { 17237, 8, 1, 0, 1341, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x969ff8024819ULL }, // Inst #17237 = VPMAXUQZ128rmbkz |
| 29920 | { 17236, 9, 1, 0, 1341, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x929ff8024819ULL }, // Inst #17236 = VPMAXUQZ128rmbk |
| 29921 | { 17235, 7, 1, 0, 1341, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x909ff8024819ULL }, // Inst #17235 = VPMAXUQZ128rmb |
| 29922 | { 17234, 7, 1, 0, 1341, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09ff8024819ULL }, // Inst #17234 = VPMAXUQZ128rm |
| 29923 | { 17233, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x9fb8004829ULL }, // Inst #17233 = VPMAXUDrr |
| 29924 | { 17232, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9fb8004819ULL }, // Inst #17232 = VPMAXUDrm |
| 29925 | { 17231, 4, 1, 0, 1798, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9ff8004829ULL }, // Inst #17231 = VPMAXUDZrrkz |
| 29926 | { 17230, 5, 1, 0, 1798, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9ff8004829ULL }, // Inst #17230 = VPMAXUDZrrk |
| 29927 | { 17229, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89ff8004829ULL }, // Inst #17229 = VPMAXUDZrr |
| 29928 | { 17228, 8, 1, 0, 455, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9ff8004819ULL }, // Inst #17228 = VPMAXUDZrmkz |
| 29929 | { 17227, 9, 1, 0, 455, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9ff8004819ULL }, // Inst #17227 = VPMAXUDZrmk |
| 29930 | { 17226, 8, 1, 0, 455, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e9ff8004819ULL }, // Inst #17226 = VPMAXUDZrmbkz |
| 29931 | { 17225, 9, 1, 0, 455, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a9ff8004819ULL }, // Inst #17225 = VPMAXUDZrmbk |
| 29932 | { 17224, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x789ff8004819ULL }, // Inst #17224 = VPMAXUDZrmb |
| 29933 | { 17223, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89ff8004819ULL }, // Inst #17223 = VPMAXUDZrm |
| 29934 | { 17222, 4, 1, 0, 454, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79ff8004829ULL }, // Inst #17222 = VPMAXUDZ256rrkz |
| 29935 | { 17221, 5, 1, 0, 454, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39ff8004829ULL }, // Inst #17221 = VPMAXUDZ256rrk |
| 29936 | { 17220, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19ff8004829ULL }, // Inst #17220 = VPMAXUDZ256rr |
| 29937 | { 17219, 8, 1, 0, 453, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79ff8004819ULL }, // Inst #17219 = VPMAXUDZ256rmkz |
| 29938 | { 17218, 9, 1, 0, 453, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39ff8004819ULL }, // Inst #17218 = VPMAXUDZ256rmk |
| 29939 | { 17217, 8, 1, 0, 453, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x779ff8004819ULL }, // Inst #17217 = VPMAXUDZ256rmbkz |
| 29940 | { 17216, 9, 1, 0, 453, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x739ff8004819ULL }, // Inst #17216 = VPMAXUDZ256rmbk |
| 29941 | { 17215, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x719ff8004819ULL }, // Inst #17215 = VPMAXUDZ256rmb |
| 29942 | { 17214, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19ff8004819ULL }, // Inst #17214 = VPMAXUDZ256rm |
| 29943 | { 17213, 4, 1, 0, 144, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69ff8004829ULL }, // Inst #17213 = VPMAXUDZ128rrkz |
| 29944 | { 17212, 5, 1, 0, 144, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29ff8004829ULL }, // Inst #17212 = VPMAXUDZ128rrk |
| 29945 | { 17211, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09ff8004829ULL }, // Inst #17211 = VPMAXUDZ128rr |
| 29946 | { 17210, 8, 1, 0, 150, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69ff8004819ULL }, // Inst #17210 = VPMAXUDZ128rmkz |
| 29947 | { 17209, 9, 1, 0, 150, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29ff8004819ULL }, // Inst #17209 = VPMAXUDZ128rmk |
| 29948 | { 17208, 8, 1, 0, 150, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x769ff8004819ULL }, // Inst #17208 = VPMAXUDZ128rmbkz |
| 29949 | { 17207, 9, 1, 0, 150, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x729ff8004819ULL }, // Inst #17207 = VPMAXUDZ128rmbk |
| 29950 | { 17206, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x709ff8004819ULL }, // Inst #17206 = VPMAXUDZ128rmb |
| 29951 | { 17205, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09ff8004819ULL }, // Inst #17205 = VPMAXUDZ128rm |
| 29952 | { 17204, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x19fb8004829ULL }, // Inst #17204 = VPMAXUDYrr |
| 29953 | { 17203, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19fb8004819ULL }, // Inst #17203 = VPMAXUDYrm |
| 29954 | { 17202, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xef38002829ULL }, // Inst #17202 = VPMAXUBrr |
| 29955 | { 17201, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xef38002819ULL }, // Inst #17201 = VPMAXUBrm |
| 29956 | { 17200, 4, 1, 0, 1808, 0, 0, 2920, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeef78002829ULL }, // Inst #17200 = VPMAXUBZrrkz |
| 29957 | { 17199, 5, 1, 0, 1808, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaef78002829ULL }, // Inst #17199 = VPMAXUBZrrk |
| 29958 | { 17198, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ef78002829ULL }, // Inst #17198 = VPMAXUBZrr |
| 29959 | { 17197, 8, 1, 0, 1855, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeef78002819ULL }, // Inst #17197 = VPMAXUBZrmkz |
| 29960 | { 17196, 9, 1, 0, 1855, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaef78002819ULL }, // Inst #17196 = VPMAXUBZrmk |
| 29961 | { 17195, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ef78002819ULL }, // Inst #17195 = VPMAXUBZrm |
| 29962 | { 17194, 4, 1, 0, 2289, 0, 0, 2894, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7ef78002829ULL }, // Inst #17194 = VPMAXUBZ256rrkz |
| 29963 | { 17193, 5, 1, 0, 2289, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ef78002829ULL }, // Inst #17193 = VPMAXUBZ256rrk |
| 29964 | { 17192, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ef78002829ULL }, // Inst #17192 = VPMAXUBZ256rr |
| 29965 | { 17191, 8, 1, 0, 2058, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ef78002819ULL }, // Inst #17191 = VPMAXUBZ256rmkz |
| 29966 | { 17190, 9, 1, 0, 2058, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ef78002819ULL }, // Inst #17190 = VPMAXUBZ256rmk |
| 29967 | { 17189, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ef78002819ULL }, // Inst #17189 = VPMAXUBZ256rm |
| 29968 | { 17188, 4, 1, 0, 2290, 0, 0, 2868, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6ef78002829ULL }, // Inst #17188 = VPMAXUBZ128rrkz |
| 29969 | { 17187, 5, 1, 0, 2290, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ef78002829ULL }, // Inst #17187 = VPMAXUBZ128rrk |
| 29970 | { 17186, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ef78002829ULL }, // Inst #17186 = VPMAXUBZ128rr |
| 29971 | { 17185, 8, 1, 0, 2054, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ef78002819ULL }, // Inst #17185 = VPMAXUBZ128rmkz |
| 29972 | { 17184, 9, 1, 0, 2054, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ef78002819ULL }, // Inst #17184 = VPMAXUBZ128rmk |
| 29973 | { 17183, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ef78002819ULL }, // Inst #17183 = VPMAXUBZ128rm |
| 29974 | { 17182, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1ef38002829ULL }, // Inst #17182 = VPMAXUBYrr |
| 29975 | { 17181, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ef38002819ULL }, // Inst #17181 = VPMAXUBYrm |
| 29976 | { 17180, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf738002829ULL }, // Inst #17180 = VPMAXSWrr |
| 29977 | { 17179, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf738002819ULL }, // Inst #17179 = VPMAXSWrm |
| 29978 | { 17178, 4, 1, 0, 1808, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef778002829ULL }, // Inst #17178 = VPMAXSWZrrkz |
| 29979 | { 17177, 5, 1, 0, 1808, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf778002829ULL }, // Inst #17177 = VPMAXSWZrrk |
| 29980 | { 17176, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f778002829ULL }, // Inst #17176 = VPMAXSWZrr |
| 29981 | { 17175, 8, 1, 0, 1855, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef778002819ULL }, // Inst #17175 = VPMAXSWZrmkz |
| 29982 | { 17174, 9, 1, 0, 1855, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf778002819ULL }, // Inst #17174 = VPMAXSWZrmk |
| 29983 | { 17173, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f778002819ULL }, // Inst #17173 = VPMAXSWZrm |
| 29984 | { 17172, 4, 1, 0, 2289, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f778002829ULL }, // Inst #17172 = VPMAXSWZ256rrkz |
| 29985 | { 17171, 5, 1, 0, 2289, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f778002829ULL }, // Inst #17171 = VPMAXSWZ256rrk |
| 29986 | { 17170, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f778002829ULL }, // Inst #17170 = VPMAXSWZ256rr |
| 29987 | { 17169, 8, 1, 0, 2058, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f778002819ULL }, // Inst #17169 = VPMAXSWZ256rmkz |
| 29988 | { 17168, 9, 1, 0, 2058, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f778002819ULL }, // Inst #17168 = VPMAXSWZ256rmk |
| 29989 | { 17167, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f778002819ULL }, // Inst #17167 = VPMAXSWZ256rm |
| 29990 | { 17166, 4, 1, 0, 2290, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f778002829ULL }, // Inst #17166 = VPMAXSWZ128rrkz |
| 29991 | { 17165, 5, 1, 0, 2290, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f778002829ULL }, // Inst #17165 = VPMAXSWZ128rrk |
| 29992 | { 17164, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f778002829ULL }, // Inst #17164 = VPMAXSWZ128rr |
| 29993 | { 17163, 8, 1, 0, 2054, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f778002819ULL }, // Inst #17163 = VPMAXSWZ128rmkz |
| 29994 | { 17162, 9, 1, 0, 2054, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f778002819ULL }, // Inst #17162 = VPMAXSWZ128rmk |
| 29995 | { 17161, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f778002819ULL }, // Inst #17161 = VPMAXSWZ128rm |
| 29996 | { 17160, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f738002829ULL }, // Inst #17160 = VPMAXSWYrr |
| 29997 | { 17159, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f738002819ULL }, // Inst #17159 = VPMAXSWYrm |
| 29998 | { 17158, 4, 1, 0, 1116, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9ef8024829ULL }, // Inst #17158 = VPMAXSQZrrkz |
| 29999 | { 17157, 5, 1, 0, 1116, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9ef8024829ULL }, // Inst #17157 = VPMAXSQZrrk |
| 30000 | { 17156, 3, 1, 0, 1116, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89ef8024829ULL }, // Inst #17156 = VPMAXSQZrr |
| 30001 | { 17155, 8, 1, 0, 1350, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9ef8024819ULL }, // Inst #17155 = VPMAXSQZrmkz |
| 30002 | { 17154, 9, 1, 0, 1350, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9ef8024819ULL }, // Inst #17154 = VPMAXSQZrmk |
| 30003 | { 17153, 8, 1, 0, 1350, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e9ef8024819ULL }, // Inst #17153 = VPMAXSQZrmbkz |
| 30004 | { 17152, 9, 1, 0, 1350, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a9ef8024819ULL }, // Inst #17152 = VPMAXSQZrmbk |
| 30005 | { 17151, 7, 1, 0, 1350, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x989ef8024819ULL }, // Inst #17151 = VPMAXSQZrmb |
| 30006 | { 17150, 7, 1, 0, 1350, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89ef8024819ULL }, // Inst #17150 = VPMAXSQZrm |
| 30007 | { 17149, 4, 1, 0, 1115, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79ef8024829ULL }, // Inst #17149 = VPMAXSQZ256rrkz |
| 30008 | { 17148, 5, 1, 0, 1115, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39ef8024829ULL }, // Inst #17148 = VPMAXSQZ256rrk |
| 30009 | { 17147, 3, 1, 0, 1115, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19ef8024829ULL }, // Inst #17147 = VPMAXSQZ256rr |
| 30010 | { 17146, 8, 1, 0, 1349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79ef8024819ULL }, // Inst #17146 = VPMAXSQZ256rmkz |
| 30011 | { 17145, 9, 1, 0, 1349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39ef8024819ULL }, // Inst #17145 = VPMAXSQZ256rmk |
| 30012 | { 17144, 8, 1, 0, 1349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x979ef8024819ULL }, // Inst #17144 = VPMAXSQZ256rmbkz |
| 30013 | { 17143, 9, 1, 0, 1349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x939ef8024819ULL }, // Inst #17143 = VPMAXSQZ256rmbk |
| 30014 | { 17142, 7, 1, 0, 1349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x919ef8024819ULL }, // Inst #17142 = VPMAXSQZ256rmb |
| 30015 | { 17141, 7, 1, 0, 1349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19ef8024819ULL }, // Inst #17141 = VPMAXSQZ256rm |
| 30016 | { 17140, 4, 1, 0, 1114, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69ef8024829ULL }, // Inst #17140 = VPMAXSQZ128rrkz |
| 30017 | { 17139, 5, 1, 0, 1114, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29ef8024829ULL }, // Inst #17139 = VPMAXSQZ128rrk |
| 30018 | { 17138, 3, 1, 0, 1114, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09ef8024829ULL }, // Inst #17138 = VPMAXSQZ128rr |
| 30019 | { 17137, 8, 1, 0, 1341, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69ef8024819ULL }, // Inst #17137 = VPMAXSQZ128rmkz |
| 30020 | { 17136, 9, 1, 0, 1341, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29ef8024819ULL }, // Inst #17136 = VPMAXSQZ128rmk |
| 30021 | { 17135, 8, 1, 0, 1341, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x969ef8024819ULL }, // Inst #17135 = VPMAXSQZ128rmbkz |
| 30022 | { 17134, 9, 1, 0, 1341, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x929ef8024819ULL }, // Inst #17134 = VPMAXSQZ128rmbk |
| 30023 | { 17133, 7, 1, 0, 1341, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x909ef8024819ULL }, // Inst #17133 = VPMAXSQZ128rmb |
| 30024 | { 17132, 7, 1, 0, 1341, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09ef8024819ULL }, // Inst #17132 = VPMAXSQZ128rm |
| 30025 | { 17131, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x9eb8004829ULL }, // Inst #17131 = VPMAXSDrr |
| 30026 | { 17130, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb8004819ULL }, // Inst #17130 = VPMAXSDrm |
| 30027 | { 17129, 4, 1, 0, 1798, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9ef8004829ULL }, // Inst #17129 = VPMAXSDZrrkz |
| 30028 | { 17128, 5, 1, 0, 1798, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9ef8004829ULL }, // Inst #17128 = VPMAXSDZrrk |
| 30029 | { 17127, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89ef8004829ULL }, // Inst #17127 = VPMAXSDZrr |
| 30030 | { 17126, 8, 1, 0, 455, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9ef8004819ULL }, // Inst #17126 = VPMAXSDZrmkz |
| 30031 | { 17125, 9, 1, 0, 455, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9ef8004819ULL }, // Inst #17125 = VPMAXSDZrmk |
| 30032 | { 17124, 8, 1, 0, 455, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e9ef8004819ULL }, // Inst #17124 = VPMAXSDZrmbkz |
| 30033 | { 17123, 9, 1, 0, 455, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a9ef8004819ULL }, // Inst #17123 = VPMAXSDZrmbk |
| 30034 | { 17122, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x789ef8004819ULL }, // Inst #17122 = VPMAXSDZrmb |
| 30035 | { 17121, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89ef8004819ULL }, // Inst #17121 = VPMAXSDZrm |
| 30036 | { 17120, 4, 1, 0, 454, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79ef8004829ULL }, // Inst #17120 = VPMAXSDZ256rrkz |
| 30037 | { 17119, 5, 1, 0, 454, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39ef8004829ULL }, // Inst #17119 = VPMAXSDZ256rrk |
| 30038 | { 17118, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19ef8004829ULL }, // Inst #17118 = VPMAXSDZ256rr |
| 30039 | { 17117, 8, 1, 0, 453, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79ef8004819ULL }, // Inst #17117 = VPMAXSDZ256rmkz |
| 30040 | { 17116, 9, 1, 0, 453, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39ef8004819ULL }, // Inst #17116 = VPMAXSDZ256rmk |
| 30041 | { 17115, 8, 1, 0, 453, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x779ef8004819ULL }, // Inst #17115 = VPMAXSDZ256rmbkz |
| 30042 | { 17114, 9, 1, 0, 453, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x739ef8004819ULL }, // Inst #17114 = VPMAXSDZ256rmbk |
| 30043 | { 17113, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x719ef8004819ULL }, // Inst #17113 = VPMAXSDZ256rmb |
| 30044 | { 17112, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19ef8004819ULL }, // Inst #17112 = VPMAXSDZ256rm |
| 30045 | { 17111, 4, 1, 0, 144, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69ef8004829ULL }, // Inst #17111 = VPMAXSDZ128rrkz |
| 30046 | { 17110, 5, 1, 0, 144, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29ef8004829ULL }, // Inst #17110 = VPMAXSDZ128rrk |
| 30047 | { 17109, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09ef8004829ULL }, // Inst #17109 = VPMAXSDZ128rr |
| 30048 | { 17108, 8, 1, 0, 150, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69ef8004819ULL }, // Inst #17108 = VPMAXSDZ128rmkz |
| 30049 | { 17107, 9, 1, 0, 150, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29ef8004819ULL }, // Inst #17107 = VPMAXSDZ128rmk |
| 30050 | { 17106, 8, 1, 0, 150, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x769ef8004819ULL }, // Inst #17106 = VPMAXSDZ128rmbkz |
| 30051 | { 17105, 9, 1, 0, 150, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x729ef8004819ULL }, // Inst #17105 = VPMAXSDZ128rmbk |
| 30052 | { 17104, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x709ef8004819ULL }, // Inst #17104 = VPMAXSDZ128rmb |
| 30053 | { 17103, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09ef8004819ULL }, // Inst #17103 = VPMAXSDZ128rm |
| 30054 | { 17102, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x19eb8004829ULL }, // Inst #17102 = VPMAXSDYrr |
| 30055 | { 17101, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19eb8004819ULL }, // Inst #17101 = VPMAXSDYrm |
| 30056 | { 17100, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x9e38004829ULL }, // Inst #17100 = VPMAXSBrr |
| 30057 | { 17099, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e38004819ULL }, // Inst #17099 = VPMAXSBrm |
| 30058 | { 17098, 4, 1, 0, 1808, 0, 0, 2920, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee9e78004829ULL }, // Inst #17098 = VPMAXSBZrrkz |
| 30059 | { 17097, 5, 1, 0, 1808, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9e78004829ULL }, // Inst #17097 = VPMAXSBZrrk |
| 30060 | { 17096, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89e78004829ULL }, // Inst #17096 = VPMAXSBZrr |
| 30061 | { 17095, 8, 1, 0, 1855, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9e78004819ULL }, // Inst #17095 = VPMAXSBZrmkz |
| 30062 | { 17094, 9, 1, 0, 1855, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9e78004819ULL }, // Inst #17094 = VPMAXSBZrmk |
| 30063 | { 17093, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89e78004819ULL }, // Inst #17093 = VPMAXSBZrm |
| 30064 | { 17092, 4, 1, 0, 2289, 0, 0, 2894, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc79e78004829ULL }, // Inst #17092 = VPMAXSBZ256rrkz |
| 30065 | { 17091, 5, 1, 0, 2289, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39e78004829ULL }, // Inst #17091 = VPMAXSBZ256rrk |
| 30066 | { 17090, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19e78004829ULL }, // Inst #17090 = VPMAXSBZ256rr |
| 30067 | { 17089, 8, 1, 0, 2058, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79e78004819ULL }, // Inst #17089 = VPMAXSBZ256rmkz |
| 30068 | { 17088, 9, 1, 0, 2058, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39e78004819ULL }, // Inst #17088 = VPMAXSBZ256rmk |
| 30069 | { 17087, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19e78004819ULL }, // Inst #17087 = VPMAXSBZ256rm |
| 30070 | { 17086, 4, 1, 0, 2290, 0, 0, 2868, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa69e78004829ULL }, // Inst #17086 = VPMAXSBZ128rrkz |
| 30071 | { 17085, 5, 1, 0, 2290, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29e78004829ULL }, // Inst #17085 = VPMAXSBZ128rrk |
| 30072 | { 17084, 3, 1, 0, 144, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09e78004829ULL }, // Inst #17084 = VPMAXSBZ128rr |
| 30073 | { 17083, 8, 1, 0, 2054, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa69e78004819ULL }, // Inst #17083 = VPMAXSBZ128rmkz |
| 30074 | { 17082, 9, 1, 0, 2054, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29e78004819ULL }, // Inst #17082 = VPMAXSBZ128rmk |
| 30075 | { 17081, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09e78004819ULL }, // Inst #17081 = VPMAXSBZ128rm |
| 30076 | { 17080, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x19e38004829ULL }, // Inst #17080 = VPMAXSBYrr |
| 30077 | { 17079, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19e38004819ULL }, // Inst #17079 = VPMAXSBYrm |
| 30078 | { 17078, 7, 1, 0, 534, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc638024819ULL }, // Inst #17078 = VPMASKMOVQrm |
| 30079 | { 17077, 7, 0, 0, 948, 0, 0, 4871, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc738024818ULL }, // Inst #17077 = VPMASKMOVQmr |
| 30080 | { 17076, 7, 1, 0, 532, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1c638024819ULL }, // Inst #17076 = VPMASKMOVQYrm |
| 30081 | { 17075, 7, 0, 0, 947, 0, 0, 4864, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1c738024818ULL }, // Inst #17075 = VPMASKMOVQYmr |
| 30082 | { 17074, 7, 1, 0, 944, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc638004819ULL }, // Inst #17074 = VPMASKMOVDrm |
| 30083 | { 17073, 7, 0, 0, 946, 0, 0, 4871, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc738004818ULL }, // Inst #17073 = VPMASKMOVDmr |
| 30084 | { 17072, 7, 1, 0, 943, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1c638004819ULL }, // Inst #17072 = VPMASKMOVDYrm |
| 30085 | { 17071, 7, 0, 0, 945, 0, 0, 4864, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1c738004818ULL }, // Inst #17071 = VPMASKMOVDYmr |
| 30086 | { 17070, 3, 1, 0, 149, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xfab8002829ULL }, // Inst #17070 = VPMADDWDrr |
| 30087 | { 17069, 7, 1, 0, 148, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfab8002819ULL }, // Inst #17069 = VPMADDWDrm |
| 30088 | { 17068, 4, 1, 0, 384, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeefaf8002829ULL }, // Inst #17068 = VPMADDWDZrrkz |
| 30089 | { 17067, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeafaf8002829ULL }, // Inst #17067 = VPMADDWDZrrk |
| 30090 | { 17066, 3, 1, 0, 384, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8faf8002829ULL }, // Inst #17066 = VPMADDWDZrr |
| 30091 | { 17065, 8, 1, 0, 383, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeefaf8002819ULL }, // Inst #17065 = VPMADDWDZrmkz |
| 30092 | { 17064, 9, 1, 0, 383, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeafaf8002819ULL }, // Inst #17064 = VPMADDWDZrmk |
| 30093 | { 17063, 7, 1, 0, 383, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8faf8002819ULL }, // Inst #17063 = VPMADDWDZrm |
| 30094 | { 17062, 4, 1, 0, 382, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7faf8002829ULL }, // Inst #17062 = VPMADDWDZ256rrkz |
| 30095 | { 17061, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3faf8002829ULL }, // Inst #17061 = VPMADDWDZ256rrk |
| 30096 | { 17060, 3, 1, 0, 382, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1faf8002829ULL }, // Inst #17060 = VPMADDWDZ256rr |
| 30097 | { 17059, 8, 1, 0, 381, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7faf8002819ULL }, // Inst #17059 = VPMADDWDZ256rmkz |
| 30098 | { 17058, 9, 1, 0, 381, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3faf8002819ULL }, // Inst #17058 = VPMADDWDZ256rmk |
| 30099 | { 17057, 7, 1, 0, 381, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1faf8002819ULL }, // Inst #17057 = VPMADDWDZ256rm |
| 30100 | { 17056, 4, 1, 0, 149, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6faf8002829ULL }, // Inst #17056 = VPMADDWDZ128rrkz |
| 30101 | { 17055, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2faf8002829ULL }, // Inst #17055 = VPMADDWDZ128rrk |
| 30102 | { 17054, 3, 1, 0, 149, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0faf8002829ULL }, // Inst #17054 = VPMADDWDZ128rr |
| 30103 | { 17053, 8, 1, 0, 148, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6faf8002819ULL }, // Inst #17053 = VPMADDWDZ128rmkz |
| 30104 | { 17052, 9, 1, 0, 148, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2faf8002819ULL }, // Inst #17052 = VPMADDWDZ128rmk |
| 30105 | { 17051, 7, 1, 0, 148, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0faf8002819ULL }, // Inst #17051 = VPMADDWDZ128rm |
| 30106 | { 17050, 3, 1, 0, 382, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1fab8002829ULL }, // Inst #17050 = VPMADDWDYrr |
| 30107 | { 17049, 7, 1, 0, 381, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1fab8002819ULL }, // Inst #17049 = VPMADDWDYrm |
| 30108 | { 17048, 3, 1, 0, 149, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8238004829ULL }, // Inst #17048 = VPMADDUBSWrr |
| 30109 | { 17047, 7, 1, 0, 148, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8238004819ULL }, // Inst #17047 = VPMADDUBSWrm |
| 30110 | { 17046, 4, 1, 0, 2353, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xee8278004829ULL }, // Inst #17046 = VPMADDUBSWZrrkz |
| 30111 | { 17045, 5, 1, 0, 2353, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xea8278004829ULL }, // Inst #17045 = VPMADDUBSWZrrk |
| 30112 | { 17044, 3, 1, 0, 384, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88278004829ULL }, // Inst #17044 = VPMADDUBSWZrr |
| 30113 | { 17043, 8, 1, 0, 2352, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8278004819ULL }, // Inst #17043 = VPMADDUBSWZrmkz |
| 30114 | { 17042, 9, 1, 0, 2352, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8278004819ULL }, // Inst #17042 = VPMADDUBSWZrmk |
| 30115 | { 17041, 7, 1, 0, 383, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88278004819ULL }, // Inst #17041 = VPMADDUBSWZrm |
| 30116 | { 17040, 4, 1, 0, 2351, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc78278004829ULL }, // Inst #17040 = VPMADDUBSWZ256rrkz |
| 30117 | { 17039, 5, 1, 0, 2351, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc38278004829ULL }, // Inst #17039 = VPMADDUBSWZ256rrk |
| 30118 | { 17038, 3, 1, 0, 382, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18278004829ULL }, // Inst #17038 = VPMADDUBSWZ256rr |
| 30119 | { 17037, 8, 1, 0, 2113, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78278004819ULL }, // Inst #17037 = VPMADDUBSWZ256rmkz |
| 30120 | { 17036, 9, 1, 0, 2113, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38278004819ULL }, // Inst #17036 = VPMADDUBSWZ256rmk |
| 30121 | { 17035, 7, 1, 0, 381, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18278004819ULL }, // Inst #17035 = VPMADDUBSWZ256rm |
| 30122 | { 17034, 4, 1, 0, 2350, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa68278004829ULL }, // Inst #17034 = VPMADDUBSWZ128rrkz |
| 30123 | { 17033, 5, 1, 0, 2350, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa28278004829ULL }, // Inst #17033 = VPMADDUBSWZ128rrk |
| 30124 | { 17032, 3, 1, 0, 149, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08278004829ULL }, // Inst #17032 = VPMADDUBSWZ128rr |
| 30125 | { 17031, 8, 1, 0, 2112, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68278004819ULL }, // Inst #17031 = VPMADDUBSWZ128rmkz |
| 30126 | { 17030, 9, 1, 0, 2112, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28278004819ULL }, // Inst #17030 = VPMADDUBSWZ128rmk |
| 30127 | { 17029, 7, 1, 0, 148, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08278004819ULL }, // Inst #17029 = VPMADDUBSWZ128rm |
| 30128 | { 17028, 3, 1, 0, 382, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18238004829ULL }, // Inst #17028 = VPMADDUBSWYrr |
| 30129 | { 17027, 7, 1, 0, 381, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18238004819ULL }, // Inst #17027 = VPMADDUBSWYrm |
| 30130 | { 17026, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x800da38024829ULL }, // Inst #17026 = VPMADD52LUQrr |
| 30131 | { 17025, 8, 1, 0, 149, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x800da38024819ULL }, // Inst #17025 = VPMADD52LUQrm |
| 30132 | { 17024, 5, 1, 0, 1864, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeda78024829ULL }, // Inst #17024 = VPMADD52LUQZrkz |
| 30133 | { 17023, 5, 1, 0, 1864, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeada78024829ULL }, // Inst #17023 = VPMADD52LUQZrk |
| 30134 | { 17022, 4, 1, 0, 1864, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8da78024829ULL }, // Inst #17022 = VPMADD52LUQZr |
| 30135 | { 17021, 9, 1, 0, 1948, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeda78024819ULL }, // Inst #17021 = VPMADD52LUQZmkz |
| 30136 | { 17020, 9, 1, 0, 1948, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeada78024819ULL }, // Inst #17020 = VPMADD52LUQZmk |
| 30137 | { 17019, 9, 1, 0, 1948, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eda78024819ULL }, // Inst #17019 = VPMADD52LUQZmbkz |
| 30138 | { 17018, 9, 1, 0, 1948, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ada78024819ULL }, // Inst #17018 = VPMADD52LUQZmbk |
| 30139 | { 17017, 8, 1, 0, 1948, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98da78024819ULL }, // Inst #17017 = VPMADD52LUQZmb |
| 30140 | { 17016, 8, 1, 0, 1948, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8da78024819ULL }, // Inst #17016 = VPMADD52LUQZm |
| 30141 | { 17015, 5, 1, 0, 2069, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7da78024829ULL }, // Inst #17015 = VPMADD52LUQZ256rkz |
| 30142 | { 17014, 5, 1, 0, 2069, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3da78024829ULL }, // Inst #17014 = VPMADD52LUQZ256rk |
| 30143 | { 17013, 4, 1, 0, 2069, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1da78024829ULL }, // Inst #17013 = VPMADD52LUQZ256r |
| 30144 | { 17012, 9, 1, 0, 1772, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7da78024819ULL }, // Inst #17012 = VPMADD52LUQZ256mkz |
| 30145 | { 17011, 9, 1, 0, 1772, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3da78024819ULL }, // Inst #17011 = VPMADD52LUQZ256mk |
| 30146 | { 17010, 9, 1, 0, 1772, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97da78024819ULL }, // Inst #17010 = VPMADD52LUQZ256mbkz |
| 30147 | { 17009, 9, 1, 0, 1772, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93da78024819ULL }, // Inst #17009 = VPMADD52LUQZ256mbk |
| 30148 | { 17008, 8, 1, 0, 1772, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91da78024819ULL }, // Inst #17008 = VPMADD52LUQZ256mb |
| 30149 | { 17007, 8, 1, 0, 1772, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1da78024819ULL }, // Inst #17007 = VPMADD52LUQZ256m |
| 30150 | { 17006, 5, 1, 0, 2068, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6da78024829ULL }, // Inst #17006 = VPMADD52LUQZ128rkz |
| 30151 | { 17005, 5, 1, 0, 2068, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2da78024829ULL }, // Inst #17005 = VPMADD52LUQZ128rk |
| 30152 | { 17004, 4, 1, 0, 2068, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0da78024829ULL }, // Inst #17004 = VPMADD52LUQZ128r |
| 30153 | { 17003, 9, 1, 0, 2062, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6da78024819ULL }, // Inst #17003 = VPMADD52LUQZ128mkz |
| 30154 | { 17002, 9, 1, 0, 2062, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2da78024819ULL }, // Inst #17002 = VPMADD52LUQZ128mk |
| 30155 | { 17001, 9, 1, 0, 2062, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96da78024819ULL }, // Inst #17001 = VPMADD52LUQZ128mbkz |
| 30156 | { 17000, 9, 1, 0, 2062, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92da78024819ULL }, // Inst #17000 = VPMADD52LUQZ128mbk |
| 30157 | { 16999, 8, 1, 0, 2062, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90da78024819ULL }, // Inst #16999 = VPMADD52LUQZ128mb |
| 30158 | { 16998, 8, 1, 0, 2062, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0da78024819ULL }, // Inst #16998 = VPMADD52LUQZ128m |
| 30159 | { 16997, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x801da38024829ULL }, // Inst #16997 = VPMADD52LUQYrr |
| 30160 | { 16996, 8, 1, 0, 382, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x801da38024819ULL }, // Inst #16996 = VPMADD52LUQYrm |
| 30161 | { 16995, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x800dab8024829ULL }, // Inst #16995 = VPMADD52HUQrr |
| 30162 | { 16994, 8, 1, 0, 149, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x800dab8024819ULL }, // Inst #16994 = VPMADD52HUQrm |
| 30163 | { 16993, 5, 1, 0, 1864, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeedaf8024829ULL }, // Inst #16993 = VPMADD52HUQZrkz |
| 30164 | { 16992, 5, 1, 0, 1864, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeadaf8024829ULL }, // Inst #16992 = VPMADD52HUQZrk |
| 30165 | { 16991, 4, 1, 0, 1864, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8daf8024829ULL }, // Inst #16991 = VPMADD52HUQZr |
| 30166 | { 16990, 9, 1, 0, 1948, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeedaf8024819ULL }, // Inst #16990 = VPMADD52HUQZmkz |
| 30167 | { 16989, 9, 1, 0, 1948, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeadaf8024819ULL }, // Inst #16989 = VPMADD52HUQZmk |
| 30168 | { 16988, 9, 1, 0, 1948, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9edaf8024819ULL }, // Inst #16988 = VPMADD52HUQZmbkz |
| 30169 | { 16987, 9, 1, 0, 1948, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9adaf8024819ULL }, // Inst #16987 = VPMADD52HUQZmbk |
| 30170 | { 16986, 8, 1, 0, 1948, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98daf8024819ULL }, // Inst #16986 = VPMADD52HUQZmb |
| 30171 | { 16985, 8, 1, 0, 1948, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8daf8024819ULL }, // Inst #16985 = VPMADD52HUQZm |
| 30172 | { 16984, 5, 1, 0, 2069, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7daf8024829ULL }, // Inst #16984 = VPMADD52HUQZ256rkz |
| 30173 | { 16983, 5, 1, 0, 2069, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3daf8024829ULL }, // Inst #16983 = VPMADD52HUQZ256rk |
| 30174 | { 16982, 4, 1, 0, 2069, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1daf8024829ULL }, // Inst #16982 = VPMADD52HUQZ256r |
| 30175 | { 16981, 9, 1, 0, 1772, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7daf8024819ULL }, // Inst #16981 = VPMADD52HUQZ256mkz |
| 30176 | { 16980, 9, 1, 0, 1772, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3daf8024819ULL }, // Inst #16980 = VPMADD52HUQZ256mk |
| 30177 | { 16979, 9, 1, 0, 1772, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97daf8024819ULL }, // Inst #16979 = VPMADD52HUQZ256mbkz |
| 30178 | { 16978, 9, 1, 0, 1772, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93daf8024819ULL }, // Inst #16978 = VPMADD52HUQZ256mbk |
| 30179 | { 16977, 8, 1, 0, 1772, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91daf8024819ULL }, // Inst #16977 = VPMADD52HUQZ256mb |
| 30180 | { 16976, 8, 1, 0, 1772, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1daf8024819ULL }, // Inst #16976 = VPMADD52HUQZ256m |
| 30181 | { 16975, 5, 1, 0, 2068, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6daf8024829ULL }, // Inst #16975 = VPMADD52HUQZ128rkz |
| 30182 | { 16974, 5, 1, 0, 2068, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2daf8024829ULL }, // Inst #16974 = VPMADD52HUQZ128rk |
| 30183 | { 16973, 4, 1, 0, 2068, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0daf8024829ULL }, // Inst #16973 = VPMADD52HUQZ128r |
| 30184 | { 16972, 9, 1, 0, 2062, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6daf8024819ULL }, // Inst #16972 = VPMADD52HUQZ128mkz |
| 30185 | { 16971, 9, 1, 0, 2062, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2daf8024819ULL }, // Inst #16971 = VPMADD52HUQZ128mk |
| 30186 | { 16970, 9, 1, 0, 2062, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96daf8024819ULL }, // Inst #16970 = VPMADD52HUQZ128mbkz |
| 30187 | { 16969, 9, 1, 0, 2062, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92daf8024819ULL }, // Inst #16969 = VPMADD52HUQZ128mbk |
| 30188 | { 16968, 8, 1, 0, 2062, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90daf8024819ULL }, // Inst #16968 = VPMADD52HUQZ128mb |
| 30189 | { 16967, 8, 1, 0, 2062, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0daf8024819ULL }, // Inst #16967 = VPMADD52HUQZ128m |
| 30190 | { 16966, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x801dab8024829ULL }, // Inst #16966 = VPMADD52HUQYrr |
| 30191 | { 16965, 8, 1, 0, 382, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x801dab8024819ULL }, // Inst #16965 = VPMADD52HUQYrm |
| 30192 | { 16964, 4, 1, 0, 149, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xdb580c8029ULL }, // Inst #16964 = VPMADCSWDrr |
| 30193 | { 16963, 8, 1, 0, 148, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xdb580c8019ULL }, // Inst #16963 = VPMADCSWDrm |
| 30194 | { 16962, 4, 1, 0, 149, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xd3580c8029ULL }, // Inst #16962 = VPMADCSSWDrr |
| 30195 | { 16961, 8, 1, 0, 148, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xd3580c8019ULL }, // Inst #16961 = VPMADCSSWDrm |
| 30196 | { 16960, 4, 1, 0, 149, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xcad80c8029ULL }, // Inst #16960 = VPMACSWWrr |
| 30197 | { 16959, 8, 1, 0, 148, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcad80c8019ULL }, // Inst #16959 = VPMACSWWrm |
| 30198 | { 16958, 4, 1, 0, 149, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xcb580c8029ULL }, // Inst #16958 = VPMACSWDrr |
| 30199 | { 16957, 8, 1, 0, 148, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcb580c8019ULL }, // Inst #16957 = VPMACSWDrm |
| 30200 | { 16956, 4, 1, 0, 149, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc2d80c8029ULL }, // Inst #16956 = VPMACSSWWrr |
| 30201 | { 16955, 8, 1, 0, 148, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc2d80c8019ULL }, // Inst #16955 = VPMACSSWWrm |
| 30202 | { 16954, 4, 1, 0, 149, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3580c8029ULL }, // Inst #16954 = VPMACSSWDrr |
| 30203 | { 16953, 8, 1, 0, 148, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3580c8019ULL }, // Inst #16953 = VPMACSSWDrm |
| 30204 | { 16952, 4, 1, 0, 1187, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3d80c8029ULL }, // Inst #16952 = VPMACSSDQLrr |
| 30205 | { 16951, 8, 1, 0, 275, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3d80c8019ULL }, // Inst #16951 = VPMACSSDQLrm |
| 30206 | { 16950, 4, 1, 0, 1187, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7d80c8029ULL }, // Inst #16950 = VPMACSSDQHrr |
| 30207 | { 16949, 8, 1, 0, 275, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7d80c8019ULL }, // Inst #16949 = VPMACSSDQHrm |
| 30208 | { 16948, 4, 1, 0, 276, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7580c8029ULL }, // Inst #16948 = VPMACSSDDrr |
| 30209 | { 16947, 8, 1, 0, 275, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7580c8019ULL }, // Inst #16947 = VPMACSSDDrm |
| 30210 | { 16946, 4, 1, 0, 1187, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xcbd80c8029ULL }, // Inst #16946 = VPMACSDQLrr |
| 30211 | { 16945, 8, 1, 0, 275, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcbd80c8019ULL }, // Inst #16945 = VPMACSDQLrm |
| 30212 | { 16944, 4, 1, 0, 1187, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xcfd80c8029ULL }, // Inst #16944 = VPMACSDQHrr |
| 30213 | { 16943, 8, 1, 0, 275, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcfd80c8019ULL }, // Inst #16943 = VPMACSDQHrm |
| 30214 | { 16942, 4, 1, 0, 276, 0, 0, 2295, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xcf580c8029ULL }, // Inst #16942 = VPMACSDDrr |
| 30215 | { 16941, 8, 1, 0, 275, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xcf580c8019ULL }, // Inst #16941 = VPMACSDDrm |
| 30216 | { 16940, 3, 1, 0, 1863, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee2278024829ULL }, // Inst #16940 = VPLZCNTQZrrkz |
| 30217 | { 16939, 4, 1, 0, 1863, 0, 0, 2804, X86ImpOpBase + 0, 0, 0xea2278024829ULL }, // Inst #16939 = VPLZCNTQZrrk |
| 30218 | { 16938, 2, 1, 0, 1863, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82278024829ULL }, // Inst #16938 = VPLZCNTQZrr |
| 30219 | { 16937, 7, 1, 0, 1944, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2278024819ULL }, // Inst #16937 = VPLZCNTQZrmkz |
| 30220 | { 16936, 8, 1, 0, 1944, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2278024819ULL }, // Inst #16936 = VPLZCNTQZrmk |
| 30221 | { 16935, 7, 1, 0, 1944, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e2278024819ULL }, // Inst #16935 = VPLZCNTQZrmbkz |
| 30222 | { 16934, 8, 1, 0, 1944, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a2278024819ULL }, // Inst #16934 = VPLZCNTQZrmbk |
| 30223 | { 16933, 6, 1, 0, 1944, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x982278024819ULL }, // Inst #16933 = VPLZCNTQZrmb |
| 30224 | { 16932, 6, 1, 0, 1944, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82278024819ULL }, // Inst #16932 = VPLZCNTQZrm |
| 30225 | { 16931, 3, 1, 0, 2067, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc72278024829ULL }, // Inst #16931 = VPLZCNTQZ256rrkz |
| 30226 | { 16930, 4, 1, 0, 2067, 0, 0, 2782, X86ImpOpBase + 0, 0, 0xc32278024829ULL }, // Inst #16930 = VPLZCNTQZ256rrk |
| 30227 | { 16929, 2, 1, 0, 2067, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12278024829ULL }, // Inst #16929 = VPLZCNTQZ256rr |
| 30228 | { 16928, 7, 1, 0, 1756, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72278024819ULL }, // Inst #16928 = VPLZCNTQZ256rmkz |
| 30229 | { 16927, 8, 1, 0, 1756, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32278024819ULL }, // Inst #16927 = VPLZCNTQZ256rmk |
| 30230 | { 16926, 7, 1, 0, 1756, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x972278024819ULL }, // Inst #16926 = VPLZCNTQZ256rmbkz |
| 30231 | { 16925, 8, 1, 0, 1756, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x932278024819ULL }, // Inst #16925 = VPLZCNTQZ256rmbk |
| 30232 | { 16924, 6, 1, 0, 1756, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x912278024819ULL }, // Inst #16924 = VPLZCNTQZ256rmb |
| 30233 | { 16923, 6, 1, 0, 1756, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12278024819ULL }, // Inst #16923 = VPLZCNTQZ256rm |
| 30234 | { 16922, 3, 1, 0, 2066, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa62278024829ULL }, // Inst #16922 = VPLZCNTQZ128rrkz |
| 30235 | { 16921, 4, 1, 0, 2066, 0, 0, 2766, X86ImpOpBase + 0, 0, 0xa22278024829ULL }, // Inst #16921 = VPLZCNTQZ128rrk |
| 30236 | { 16920, 2, 1, 0, 2066, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02278024829ULL }, // Inst #16920 = VPLZCNTQZ128rr |
| 30237 | { 16919, 7, 1, 0, 2050, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62278024819ULL }, // Inst #16919 = VPLZCNTQZ128rmkz |
| 30238 | { 16918, 8, 1, 0, 2050, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22278024819ULL }, // Inst #16918 = VPLZCNTQZ128rmk |
| 30239 | { 16917, 7, 1, 0, 2050, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x962278024819ULL }, // Inst #16917 = VPLZCNTQZ128rmbkz |
| 30240 | { 16916, 8, 1, 0, 2050, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x922278024819ULL }, // Inst #16916 = VPLZCNTQZ128rmbk |
| 30241 | { 16915, 6, 1, 0, 2050, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x902278024819ULL }, // Inst #16915 = VPLZCNTQZ128rmb |
| 30242 | { 16914, 6, 1, 0, 2050, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02278024819ULL }, // Inst #16914 = VPLZCNTQZ128rm |
| 30243 | { 16913, 3, 1, 0, 1863, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee2278004829ULL }, // Inst #16913 = VPLZCNTDZrrkz |
| 30244 | { 16912, 4, 1, 0, 1863, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea2278004829ULL }, // Inst #16912 = VPLZCNTDZrrk |
| 30245 | { 16911, 2, 1, 0, 1863, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82278004829ULL }, // Inst #16911 = VPLZCNTDZrr |
| 30246 | { 16910, 7, 1, 0, 1944, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2278004819ULL }, // Inst #16910 = VPLZCNTDZrmkz |
| 30247 | { 16909, 8, 1, 0, 1944, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2278004819ULL }, // Inst #16909 = VPLZCNTDZrmk |
| 30248 | { 16908, 7, 1, 0, 1944, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e2278004819ULL }, // Inst #16908 = VPLZCNTDZrmbkz |
| 30249 | { 16907, 8, 1, 0, 1944, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a2278004819ULL }, // Inst #16907 = VPLZCNTDZrmbk |
| 30250 | { 16906, 6, 1, 0, 1944, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x782278004819ULL }, // Inst #16906 = VPLZCNTDZrmb |
| 30251 | { 16905, 6, 1, 0, 1944, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82278004819ULL }, // Inst #16905 = VPLZCNTDZrm |
| 30252 | { 16904, 3, 1, 0, 2067, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc72278004829ULL }, // Inst #16904 = VPLZCNTDZ256rrkz |
| 30253 | { 16903, 4, 1, 0, 2067, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc32278004829ULL }, // Inst #16903 = VPLZCNTDZ256rrk |
| 30254 | { 16902, 2, 1, 0, 2067, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12278004829ULL }, // Inst #16902 = VPLZCNTDZ256rr |
| 30255 | { 16901, 7, 1, 0, 1756, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72278004819ULL }, // Inst #16901 = VPLZCNTDZ256rmkz |
| 30256 | { 16900, 8, 1, 0, 1756, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32278004819ULL }, // Inst #16900 = VPLZCNTDZ256rmk |
| 30257 | { 16899, 7, 1, 0, 1756, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x772278004819ULL }, // Inst #16899 = VPLZCNTDZ256rmbkz |
| 30258 | { 16898, 8, 1, 0, 1756, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x732278004819ULL }, // Inst #16898 = VPLZCNTDZ256rmbk |
| 30259 | { 16897, 6, 1, 0, 1756, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x712278004819ULL }, // Inst #16897 = VPLZCNTDZ256rmb |
| 30260 | { 16896, 6, 1, 0, 1756, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12278004819ULL }, // Inst #16896 = VPLZCNTDZ256rm |
| 30261 | { 16895, 3, 1, 0, 2066, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa62278004829ULL }, // Inst #16895 = VPLZCNTDZ128rrkz |
| 30262 | { 16894, 4, 1, 0, 2066, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa22278004829ULL }, // Inst #16894 = VPLZCNTDZ128rrk |
| 30263 | { 16893, 2, 1, 0, 2066, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02278004829ULL }, // Inst #16893 = VPLZCNTDZ128rr |
| 30264 | { 16892, 7, 1, 0, 2050, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62278004819ULL }, // Inst #16892 = VPLZCNTDZ128rmkz |
| 30265 | { 16891, 8, 1, 0, 2050, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22278004819ULL }, // Inst #16891 = VPLZCNTDZ128rmk |
| 30266 | { 16890, 7, 1, 0, 2050, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x762278004819ULL }, // Inst #16890 = VPLZCNTDZ128rmbkz |
| 30267 | { 16889, 8, 1, 0, 2050, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x722278004819ULL }, // Inst #16889 = VPLZCNTDZ128rmbk |
| 30268 | { 16888, 6, 1, 0, 2050, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x702278004819ULL }, // Inst #16888 = VPLZCNTDZ128rmb |
| 30269 | { 16887, 6, 1, 0, 2050, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02278004819ULL }, // Inst #16887 = VPLZCNTDZ128rm |
| 30270 | { 16886, 4, 1, 0, 209, 0, 0, 5626, X86ImpOpBase + 0, 0, 0xe238042829ULL }, // Inst #16886 = VPINSRWrri |
| 30271 | { 16885, 8, 1, 0, 208, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe238042819ULL }, // Inst #16885 = VPINSRWrmi |
| 30272 | { 16884, 4, 1, 0, 527, 0, 0, 5622, X86ImpOpBase + 0, 0, 0xa0e278042829ULL }, // Inst #16884 = VPINSRWZrri |
| 30273 | { 16883, 8, 1, 0, 208, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x40e278042819ULL }, // Inst #16883 = VPINSRWZrmi |
| 30274 | { 16882, 4, 1, 0, 209, 0, 0, 5634, X86ImpOpBase + 0, 0, 0x9138066829ULL }, // Inst #16882 = VPINSRQrri |
| 30275 | { 16881, 8, 1, 0, 208, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9138066819ULL }, // Inst #16881 = VPINSRQrmi |
| 30276 | { 16880, 4, 1, 0, 527, 0, 0, 5630, X86ImpOpBase + 0, 0, 0xa09178066829ULL }, // Inst #16880 = VPINSRQZrri |
| 30277 | { 16879, 8, 1, 0, 208, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x809178066819ULL }, // Inst #16879 = VPINSRQZrmi |
| 30278 | { 16878, 4, 1, 0, 209, 0, 0, 5626, X86ImpOpBase + 0, 0, 0x9138046829ULL }, // Inst #16878 = VPINSRDrri |
| 30279 | { 16877, 8, 1, 0, 208, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9138046819ULL }, // Inst #16877 = VPINSRDrmi |
| 30280 | { 16876, 4, 1, 0, 527, 0, 0, 5622, X86ImpOpBase + 0, 0, 0xa09178046829ULL }, // Inst #16876 = VPINSRDZrri |
| 30281 | { 16875, 8, 1, 0, 208, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x609178046819ULL }, // Inst #16875 = VPINSRDZrmi |
| 30282 | { 16874, 4, 1, 0, 209, 0, 0, 5626, X86ImpOpBase + 0, 0, 0x9038046829ULL }, // Inst #16874 = VPINSRBrri |
| 30283 | { 16873, 8, 1, 0, 208, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9038046819ULL }, // Inst #16873 = VPINSRBrmi |
| 30284 | { 16872, 4, 1, 0, 527, 0, 0, 5622, X86ImpOpBase + 0, 0, 0xa09078046829ULL }, // Inst #16872 = VPINSRBZrri |
| 30285 | { 16871, 8, 1, 0, 208, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x209078046819ULL }, // Inst #16871 = VPINSRBZrmi |
| 30286 | { 16870, 3, 1, 0, 1191, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x82b8004829ULL }, // Inst #16870 = VPHSUBWrr |
| 30287 | { 16869, 7, 1, 0, 1192, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x82b8004819ULL }, // Inst #16869 = VPHSUBWrm |
| 30288 | { 16868, 3, 1, 0, 526, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x182b8004829ULL }, // Inst #16868 = VPHSUBWYrr |
| 30289 | { 16867, 7, 1, 0, 525, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x182b8004819ULL }, // Inst #16867 = VPHSUBWYrm |
| 30290 | { 16866, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x715800a029ULL }, // Inst #16866 = VPHSUBWDrr |
| 30291 | { 16865, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x715800a019ULL }, // Inst #16865 = VPHSUBWDrm |
| 30292 | { 16864, 3, 1, 0, 1213, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x83b8004829ULL }, // Inst #16864 = VPHSUBSWrr |
| 30293 | { 16863, 7, 1, 0, 1221, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x83b8004819ULL }, // Inst #16863 = VPHSUBSWrm |
| 30294 | { 16862, 3, 1, 0, 1214, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x183b8004829ULL }, // Inst #16862 = VPHSUBSWYrr |
| 30295 | { 16861, 7, 1, 0, 1222, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x183b8004819ULL }, // Inst #16861 = VPHSUBSWYrm |
| 30296 | { 16860, 3, 1, 0, 1191, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8338004829ULL }, // Inst #16860 = VPHSUBDrr |
| 30297 | { 16859, 7, 1, 0, 1192, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8338004819ULL }, // Inst #16859 = VPHSUBDrm |
| 30298 | { 16858, 3, 1, 0, 526, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18338004829ULL }, // Inst #16858 = VPHSUBDYrr |
| 30299 | { 16857, 7, 1, 0, 525, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18338004819ULL }, // Inst #16857 = VPHSUBDYrm |
| 30300 | { 16856, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x71d800a029ULL }, // Inst #16856 = VPHSUBDQrr |
| 30301 | { 16855, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71d800a019ULL }, // Inst #16855 = VPHSUBDQrm |
| 30302 | { 16854, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x70d800a029ULL }, // Inst #16854 = VPHSUBBWrr |
| 30303 | { 16853, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70d800a019ULL }, // Inst #16853 = VPHSUBBWrm |
| 30304 | { 16852, 2, 1, 0, 271, 0, 0, 557, X86ImpOpBase + 0, 0, 0x20b8004829ULL }, // Inst #16852 = VPHMINPOSUWrr |
| 30305 | { 16851, 6, 1, 0, 270, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x20b8004819ULL }, // Inst #16851 = VPHMINPOSUWrm |
| 30306 | { 16850, 3, 1, 0, 1191, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x80b8004829ULL }, // Inst #16850 = VPHADDWrr |
| 30307 | { 16849, 7, 1, 0, 1192, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80b8004819ULL }, // Inst #16849 = VPHADDWrm |
| 30308 | { 16848, 3, 1, 0, 526, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x180b8004829ULL }, // Inst #16848 = VPHADDWYrr |
| 30309 | { 16847, 7, 1, 0, 525, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x180b8004819ULL }, // Inst #16847 = VPHADDWYrm |
| 30310 | { 16846, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x63d800a029ULL }, // Inst #16846 = VPHADDWQrr |
| 30311 | { 16845, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x63d800a019ULL }, // Inst #16845 = VPHADDWQrm |
| 30312 | { 16844, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x635800a029ULL }, // Inst #16844 = VPHADDWDrr |
| 30313 | { 16843, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x635800a019ULL }, // Inst #16843 = VPHADDWDrm |
| 30314 | { 16842, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x6bd800a029ULL }, // Inst #16842 = VPHADDUWQrr |
| 30315 | { 16841, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6bd800a019ULL }, // Inst #16841 = VPHADDUWQrm |
| 30316 | { 16840, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x6b5800a029ULL }, // Inst #16840 = VPHADDUWDrr |
| 30317 | { 16839, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6b5800a019ULL }, // Inst #16839 = VPHADDUWDrm |
| 30318 | { 16838, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x6dd800a029ULL }, // Inst #16838 = VPHADDUDQrr |
| 30319 | { 16837, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6dd800a019ULL }, // Inst #16837 = VPHADDUDQrm |
| 30320 | { 16836, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x68d800a029ULL }, // Inst #16836 = VPHADDUBWrr |
| 30321 | { 16835, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x68d800a019ULL }, // Inst #16835 = VPHADDUBWrm |
| 30322 | { 16834, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x69d800a029ULL }, // Inst #16834 = VPHADDUBQrr |
| 30323 | { 16833, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x69d800a019ULL }, // Inst #16833 = VPHADDUBQrm |
| 30324 | { 16832, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x695800a029ULL }, // Inst #16832 = VPHADDUBDrr |
| 30325 | { 16831, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x695800a019ULL }, // Inst #16831 = VPHADDUBDrm |
| 30326 | { 16830, 3, 1, 0, 1213, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x81b8004829ULL }, // Inst #16830 = VPHADDSWrr |
| 30327 | { 16829, 7, 1, 0, 1221, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x81b8004819ULL }, // Inst #16829 = VPHADDSWrm |
| 30328 | { 16828, 3, 1, 0, 1214, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x181b8004829ULL }, // Inst #16828 = VPHADDSWYrr |
| 30329 | { 16827, 7, 1, 0, 1222, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x181b8004819ULL }, // Inst #16827 = VPHADDSWYrm |
| 30330 | { 16826, 3, 1, 0, 1191, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8138004829ULL }, // Inst #16826 = VPHADDDrr |
| 30331 | { 16825, 7, 1, 0, 1192, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8138004819ULL }, // Inst #16825 = VPHADDDrm |
| 30332 | { 16824, 3, 1, 0, 526, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18138004829ULL }, // Inst #16824 = VPHADDDYrr |
| 30333 | { 16823, 7, 1, 0, 525, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18138004819ULL }, // Inst #16823 = VPHADDDYrm |
| 30334 | { 16822, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x65d800a029ULL }, // Inst #16822 = VPHADDDQrr |
| 30335 | { 16821, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x65d800a019ULL }, // Inst #16821 = VPHADDDQrm |
| 30336 | { 16820, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x60d800a029ULL }, // Inst #16820 = VPHADDBWrr |
| 30337 | { 16819, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x60d800a019ULL }, // Inst #16819 = VPHADDBWrm |
| 30338 | { 16818, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x61d800a029ULL }, // Inst #16818 = VPHADDBQrr |
| 30339 | { 16817, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x61d800a019ULL }, // Inst #16817 = VPHADDBQrm |
| 30340 | { 16816, 2, 1, 0, 144, 0, 0, 557, X86ImpOpBase + 0, 0, 0x615800a029ULL }, // Inst #16816 = VPHADDBDrr |
| 30341 | { 16815, 6, 1, 0, 150, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x615800a019ULL }, // Inst #16815 = VPHADDBDrm |
| 30342 | { 16814, 9, 2, 0, 957, 0, 0, 4318, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x48b802481aULL }, // Inst #16814 = VPGATHERQQrm |
| 30343 | { 16813, 9, 2, 0, 2236, 0, 0, 4390, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a48f8024819ULL }, // Inst #16813 = VPGATHERQQZrm |
| 30344 | { 16812, 9, 2, 0, 2234, 0, 0, 4381, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8348f8024819ULL }, // Inst #16812 = VPGATHERQQZ256rm |
| 30345 | { 16811, 9, 2, 0, 2233, 0, 0, 4291, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8248f8024819ULL }, // Inst #16811 = VPGATHERQQZ128rm |
| 30346 | { 16810, 9, 2, 0, 956, 0, 0, 4327, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x148b802481aULL }, // Inst #16810 = VPGATHERQQYrm |
| 30347 | { 16809, 9, 2, 0, 955, 0, 0, 4318, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x48b800481aULL }, // Inst #16809 = VPGATHERQDrm |
| 30348 | { 16808, 9, 2, 0, 2237, 0, 0, 4417, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6a48f8004819ULL }, // Inst #16808 = VPGATHERQDZrm |
| 30349 | { 16807, 9, 2, 0, 2235, 0, 0, 4408, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6348f8004819ULL }, // Inst #16807 = VPGATHERQDZ256rm |
| 30350 | { 16806, 9, 2, 0, 1400, 0, 0, 4291, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6248f8004819ULL }, // Inst #16806 = VPGATHERQDZ128rm |
| 30351 | { 16805, 9, 2, 0, 954, 0, 0, 4399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x148b800481aULL }, // Inst #16805 = VPGATHERQDYrm |
| 30352 | { 16804, 9, 2, 0, 953, 0, 0, 4318, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x483802481aULL }, // Inst #16804 = VPGATHERDQrm |
| 30353 | { 16803, 9, 2, 0, 2236, 0, 0, 4309, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a4878024819ULL }, // Inst #16803 = VPGATHERDQZrm |
| 30354 | { 16802, 9, 2, 0, 2234, 0, 0, 4300, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x834878024819ULL }, // Inst #16802 = VPGATHERDQZ256rm |
| 30355 | { 16801, 9, 2, 0, 2233, 0, 0, 4291, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x824878024819ULL }, // Inst #16801 = VPGATHERDQZ128rm |
| 30356 | { 16800, 9, 2, 0, 952, 0, 0, 4282, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1483802481aULL }, // Inst #16800 = VPGATHERDQYrm |
| 30357 | { 16799, 9, 2, 0, 951, 0, 0, 4318, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x483800481aULL }, // Inst #16799 = VPGATHERDDrm |
| 30358 | { 16798, 9, 2, 0, 1403, 0, 0, 4354, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6a4878004819ULL }, // Inst #16798 = VPGATHERDDZrm |
| 30359 | { 16797, 9, 2, 0, 1402, 0, 0, 4345, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x634878004819ULL }, // Inst #16797 = VPGATHERDDZ256rm |
| 30360 | { 16796, 9, 2, 0, 1401, 0, 0, 4336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x624878004819ULL }, // Inst #16796 = VPGATHERDDZ128rm |
| 30361 | { 16795, 9, 2, 0, 950, 0, 0, 4327, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1483800481aULL }, // Inst #16795 = VPGATHERDDYrm |
| 30362 | { 16794, 3, 1, 0, 143, 0, 0, 1059, X86ImpOpBase + 0, 0, 0xab8046828ULL }, // Inst #16794 = VPEXTRWrri_REV |
| 30363 | { 16793, 3, 1, 0, 143, 0, 0, 1059, X86ImpOpBase + 0, 0, 0x62b8042829ULL }, // Inst #16793 = VPEXTRWrri |
| 30364 | { 16792, 7, 0, 0, 142, 0, 0, 1052, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xab8046818ULL }, // Inst #16792 = VPEXTRWmri |
| 30365 | { 16791, 3, 1, 0, 143, 0, 0, 3686, X86ImpOpBase + 0, 0, 0xa00af8046828ULL }, // Inst #16791 = VPEXTRWZrri_REV |
| 30366 | { 16790, 3, 1, 0, 143, 0, 0, 3686, X86ImpOpBase + 0, 0, 0xa062f8042829ULL }, // Inst #16790 = VPEXTRWZrri |
| 30367 | { 16789, 7, 0, 0, 142, 0, 0, 3293, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x400af8046818ULL }, // Inst #16789 = VPEXTRWZmri |
| 30368 | { 16788, 3, 1, 0, 143, 0, 0, 1434, X86ImpOpBase + 0, 0, 0xb38066828ULL }, // Inst #16788 = VPEXTRQrri |
| 30369 | { 16787, 7, 0, 0, 766, 0, 0, 1052, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xb38066818ULL }, // Inst #16787 = VPEXTRQmri |
| 30370 | { 16786, 3, 1, 0, 143, 0, 0, 5619, X86ImpOpBase + 0, 0, 0xa00b78066828ULL }, // Inst #16786 = VPEXTRQZrri |
| 30371 | { 16785, 7, 0, 0, 1871, 0, 0, 3293, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x800b78066818ULL }, // Inst #16785 = VPEXTRQZmri |
| 30372 | { 16784, 3, 1, 0, 143, 0, 0, 1059, X86ImpOpBase + 0, 0, 0xb38046828ULL }, // Inst #16784 = VPEXTRDrri |
| 30373 | { 16783, 7, 0, 0, 766, 0, 0, 1052, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xb38046818ULL }, // Inst #16783 = VPEXTRDmri |
| 30374 | { 16782, 3, 1, 0, 143, 0, 0, 3686, X86ImpOpBase + 0, 0, 0xa00b78046828ULL }, // Inst #16782 = VPEXTRDZrri |
| 30375 | { 16781, 7, 0, 0, 1871, 0, 0, 3293, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x600b78046818ULL }, // Inst #16781 = VPEXTRDZmri |
| 30376 | { 16780, 3, 1, 0, 143, 0, 0, 1059, X86ImpOpBase + 0, 0, 0xa38046828ULL }, // Inst #16780 = VPEXTRBrri |
| 30377 | { 16779, 7, 0, 0, 142, 0, 0, 1052, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa38046818ULL }, // Inst #16779 = VPEXTRBmri |
| 30378 | { 16778, 3, 1, 0, 143, 0, 0, 3686, X86ImpOpBase + 0, 0, 0xa00a78046828ULL }, // Inst #16778 = VPEXTRBZrri |
| 30379 | { 16777, 7, 0, 0, 142, 0, 0, 3293, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x200a78046818ULL }, // Inst #16777 = VPEXTRBZmri |
| 30380 | { 16776, 3, 1, 0, 2349, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee3178024829ULL }, // Inst #16776 = VPEXPANDWZrrkz |
| 30381 | { 16775, 4, 1, 0, 2349, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea3178024829ULL }, // Inst #16775 = VPEXPANDWZrrk |
| 30382 | { 16774, 2, 1, 0, 1982, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe83178024829ULL }, // Inst #16774 = VPEXPANDWZrr |
| 30383 | { 16773, 7, 1, 0, 1716, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4e3178024819ULL }, // Inst #16773 = VPEXPANDWZrmkz |
| 30384 | { 16772, 8, 1, 0, 1716, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4a3178024819ULL }, // Inst #16772 = VPEXPANDWZrmk |
| 30385 | { 16771, 6, 1, 0, 1754, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x483178024819ULL }, // Inst #16771 = VPEXPANDWZrm |
| 30386 | { 16770, 3, 1, 0, 2348, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc73178024829ULL }, // Inst #16770 = VPEXPANDWZ256rrkz |
| 30387 | { 16769, 4, 1, 0, 2348, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc33178024829ULL }, // Inst #16769 = VPEXPANDWZ256rrk |
| 30388 | { 16768, 2, 1, 0, 1981, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc13178024829ULL }, // Inst #16768 = VPEXPANDWZ256rr |
| 30389 | { 16767, 7, 1, 0, 1716, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x473178024819ULL }, // Inst #16767 = VPEXPANDWZ256rmkz |
| 30390 | { 16766, 8, 1, 0, 1716, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x433178024819ULL }, // Inst #16766 = VPEXPANDWZ256rmk |
| 30391 | { 16765, 6, 1, 0, 1754, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x413178024819ULL }, // Inst #16765 = VPEXPANDWZ256rm |
| 30392 | { 16764, 3, 1, 0, 2347, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa63178024829ULL }, // Inst #16764 = VPEXPANDWZ128rrkz |
| 30393 | { 16763, 4, 1, 0, 2347, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa23178024829ULL }, // Inst #16763 = VPEXPANDWZ128rrk |
| 30394 | { 16762, 2, 1, 0, 1983, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa03178024829ULL }, // Inst #16762 = VPEXPANDWZ128rr |
| 30395 | { 16761, 7, 1, 0, 1716, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x463178024819ULL }, // Inst #16761 = VPEXPANDWZ128rmkz |
| 30396 | { 16760, 8, 1, 0, 1716, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x423178024819ULL }, // Inst #16760 = VPEXPANDWZ128rmk |
| 30397 | { 16759, 6, 1, 0, 2198, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x403178024819ULL }, // Inst #16759 = VPEXPANDWZ128rm |
| 30398 | { 16758, 3, 1, 0, 1265, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee44f8024829ULL }, // Inst #16758 = VPEXPANDQZrrkz |
| 30399 | { 16757, 4, 1, 0, 1265, 0, 0, 2804, X86ImpOpBase + 0, 0, 0xea44f8024829ULL }, // Inst #16757 = VPEXPANDQZrrk |
| 30400 | { 16756, 2, 1, 0, 1979, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe844f8024829ULL }, // Inst #16756 = VPEXPANDQZrr |
| 30401 | { 16755, 7, 1, 0, 1379, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8e44f8024819ULL }, // Inst #16755 = VPEXPANDQZrmkz |
| 30402 | { 16754, 8, 1, 0, 1379, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a44f8024819ULL }, // Inst #16754 = VPEXPANDQZrmk |
| 30403 | { 16753, 6, 1, 0, 1379, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8844f8024819ULL }, // Inst #16753 = VPEXPANDQZrm |
| 30404 | { 16752, 3, 1, 0, 1265, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc744f8024829ULL }, // Inst #16752 = VPEXPANDQZ256rrkz |
| 30405 | { 16751, 4, 1, 0, 1265, 0, 0, 2782, X86ImpOpBase + 0, 0, 0xc344f8024829ULL }, // Inst #16751 = VPEXPANDQZ256rrk |
| 30406 | { 16750, 2, 1, 0, 1979, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc144f8024829ULL }, // Inst #16750 = VPEXPANDQZ256rr |
| 30407 | { 16749, 7, 1, 0, 1379, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8744f8024819ULL }, // Inst #16749 = VPEXPANDQZ256rmkz |
| 30408 | { 16748, 8, 1, 0, 1379, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8344f8024819ULL }, // Inst #16748 = VPEXPANDQZ256rmk |
| 30409 | { 16747, 6, 1, 0, 1379, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8144f8024819ULL }, // Inst #16747 = VPEXPANDQZ256rm |
| 30410 | { 16746, 3, 1, 0, 1265, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa644f8024829ULL }, // Inst #16746 = VPEXPANDQZ128rrkz |
| 30411 | { 16745, 4, 1, 0, 1265, 0, 0, 2766, X86ImpOpBase + 0, 0, 0xa244f8024829ULL }, // Inst #16745 = VPEXPANDQZ128rrk |
| 30412 | { 16744, 2, 1, 0, 1979, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa044f8024829ULL }, // Inst #16744 = VPEXPANDQZ128rr |
| 30413 | { 16743, 7, 1, 0, 1364, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8644f8024819ULL }, // Inst #16743 = VPEXPANDQZ128rmkz |
| 30414 | { 16742, 8, 1, 0, 1364, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8244f8024819ULL }, // Inst #16742 = VPEXPANDQZ128rmk |
| 30415 | { 16741, 6, 1, 0, 1364, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8044f8024819ULL }, // Inst #16741 = VPEXPANDQZ128rm |
| 30416 | { 16740, 3, 1, 0, 1265, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee44f8004829ULL }, // Inst #16740 = VPEXPANDDZrrkz |
| 30417 | { 16739, 4, 1, 0, 1265, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea44f8004829ULL }, // Inst #16739 = VPEXPANDDZrrk |
| 30418 | { 16738, 2, 1, 0, 1979, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe844f8004829ULL }, // Inst #16738 = VPEXPANDDZrr |
| 30419 | { 16737, 7, 1, 0, 1379, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6e44f8004819ULL }, // Inst #16737 = VPEXPANDDZrmkz |
| 30420 | { 16736, 8, 1, 0, 1379, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6a44f8004819ULL }, // Inst #16736 = VPEXPANDDZrmk |
| 30421 | { 16735, 6, 1, 0, 1379, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6844f8004819ULL }, // Inst #16735 = VPEXPANDDZrm |
| 30422 | { 16734, 3, 1, 0, 1265, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc744f8004829ULL }, // Inst #16734 = VPEXPANDDZ256rrkz |
| 30423 | { 16733, 4, 1, 0, 1265, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc344f8004829ULL }, // Inst #16733 = VPEXPANDDZ256rrk |
| 30424 | { 16732, 2, 1, 0, 1979, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc144f8004829ULL }, // Inst #16732 = VPEXPANDDZ256rr |
| 30425 | { 16731, 7, 1, 0, 1379, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6744f8004819ULL }, // Inst #16731 = VPEXPANDDZ256rmkz |
| 30426 | { 16730, 8, 1, 0, 1379, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6344f8004819ULL }, // Inst #16730 = VPEXPANDDZ256rmk |
| 30427 | { 16729, 6, 1, 0, 1379, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6144f8004819ULL }, // Inst #16729 = VPEXPANDDZ256rm |
| 30428 | { 16728, 3, 1, 0, 1265, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa644f8004829ULL }, // Inst #16728 = VPEXPANDDZ128rrkz |
| 30429 | { 16727, 4, 1, 0, 1265, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa244f8004829ULL }, // Inst #16727 = VPEXPANDDZ128rrk |
| 30430 | { 16726, 2, 1, 0, 1979, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa044f8004829ULL }, // Inst #16726 = VPEXPANDDZ128rr |
| 30431 | { 16725, 7, 1, 0, 1364, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6644f8004819ULL }, // Inst #16725 = VPEXPANDDZ128rmkz |
| 30432 | { 16724, 8, 1, 0, 1364, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6244f8004819ULL }, // Inst #16724 = VPEXPANDDZ128rmk |
| 30433 | { 16723, 6, 1, 0, 1364, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6044f8004819ULL }, // Inst #16723 = VPEXPANDDZ128rm |
| 30434 | { 16722, 3, 1, 0, 2349, 0, 0, 4991, X86ImpOpBase + 0, 0, 0xee3178004829ULL }, // Inst #16722 = VPEXPANDBZrrkz |
| 30435 | { 16721, 4, 1, 0, 2349, 0, 0, 4987, X86ImpOpBase + 0, 0, 0xea3178004829ULL }, // Inst #16721 = VPEXPANDBZrrk |
| 30436 | { 16720, 2, 1, 0, 1982, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe83178004829ULL }, // Inst #16720 = VPEXPANDBZrr |
| 30437 | { 16719, 7, 1, 0, 1716, 0, 0, 4980, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2e3178004819ULL }, // Inst #16719 = VPEXPANDBZrmkz |
| 30438 | { 16718, 8, 1, 0, 1716, 0, 0, 4972, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2a3178004819ULL }, // Inst #16718 = VPEXPANDBZrmk |
| 30439 | { 16717, 6, 1, 0, 1754, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x283178004819ULL }, // Inst #16717 = VPEXPANDBZrm |
| 30440 | { 16716, 3, 1, 0, 2348, 0, 0, 4962, X86ImpOpBase + 0, 0, 0xc73178004829ULL }, // Inst #16716 = VPEXPANDBZ256rrkz |
| 30441 | { 16715, 4, 1, 0, 2348, 0, 0, 4958, X86ImpOpBase + 0, 0, 0xc33178004829ULL }, // Inst #16715 = VPEXPANDBZ256rrk |
| 30442 | { 16714, 2, 1, 0, 1981, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc13178004829ULL }, // Inst #16714 = VPEXPANDBZ256rr |
| 30443 | { 16713, 7, 1, 0, 1716, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x273178004819ULL }, // Inst #16713 = VPEXPANDBZ256rmkz |
| 30444 | { 16712, 8, 1, 0, 1716, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x233178004819ULL }, // Inst #16712 = VPEXPANDBZ256rmk |
| 30445 | { 16711, 6, 1, 0, 1754, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x213178004819ULL }, // Inst #16711 = VPEXPANDBZ256rm |
| 30446 | { 16710, 3, 1, 0, 2347, 0, 0, 4948, X86ImpOpBase + 0, 0, 0xa63178004829ULL }, // Inst #16710 = VPEXPANDBZ128rrkz |
| 30447 | { 16709, 4, 1, 0, 2347, 0, 0, 4944, X86ImpOpBase + 0, 0, 0xa23178004829ULL }, // Inst #16709 = VPEXPANDBZ128rrk |
| 30448 | { 16708, 2, 1, 0, 1983, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa03178004829ULL }, // Inst #16708 = VPEXPANDBZ128rr |
| 30449 | { 16707, 7, 1, 0, 1716, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x263178004819ULL }, // Inst #16707 = VPEXPANDBZ128rmkz |
| 30450 | { 16706, 8, 1, 0, 1716, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x223178004819ULL }, // Inst #16706 = VPEXPANDBZ128rmk |
| 30451 | { 16705, 6, 1, 0, 2198, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x203178004819ULL }, // Inst #16705 = VPEXPANDBZ128rm |
| 30452 | { 16704, 4, 1, 0, 2299, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeec6f8024829ULL }, // Inst #16704 = VPERMWZrrkz |
| 30453 | { 16703, 5, 1, 0, 2299, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeac6f8024829ULL }, // Inst #16703 = VPERMWZrrk |
| 30454 | { 16702, 3, 1, 0, 1753, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8c6f8024829ULL }, // Inst #16702 = VPERMWZrr |
| 30455 | { 16701, 8, 1, 0, 2115, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeec6f8024819ULL }, // Inst #16701 = VPERMWZrmkz |
| 30456 | { 16700, 9, 1, 0, 2115, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeac6f8024819ULL }, // Inst #16700 = VPERMWZrmk |
| 30457 | { 16699, 7, 1, 0, 1390, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8c6f8024819ULL }, // Inst #16699 = VPERMWZrm |
| 30458 | { 16698, 4, 1, 0, 1819, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7c6f8024829ULL }, // Inst #16698 = VPERMWZ256rrkz |
| 30459 | { 16697, 5, 1, 0, 1819, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3c6f8024829ULL }, // Inst #16697 = VPERMWZ256rrk |
| 30460 | { 16696, 3, 1, 0, 2345, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1c6f8024829ULL }, // Inst #16696 = VPERMWZ256rr |
| 30461 | { 16695, 8, 1, 0, 2343, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7c6f8024819ULL }, // Inst #16695 = VPERMWZ256rmkz |
| 30462 | { 16694, 9, 1, 0, 2343, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3c6f8024819ULL }, // Inst #16694 = VPERMWZ256rmk |
| 30463 | { 16693, 7, 1, 0, 2346, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1c6f8024819ULL }, // Inst #16693 = VPERMWZ256rm |
| 30464 | { 16692, 4, 1, 0, 1818, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6c6f8024829ULL }, // Inst #16692 = VPERMWZ128rrkz |
| 30465 | { 16691, 5, 1, 0, 1818, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2c6f8024829ULL }, // Inst #16691 = VPERMWZ128rrk |
| 30466 | { 16690, 3, 1, 0, 2344, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0c6f8024829ULL }, // Inst #16690 = VPERMWZ128rr |
| 30467 | { 16689, 8, 1, 0, 1386, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6c6f8024819ULL }, // Inst #16689 = VPERMWZ128rmkz |
| 30468 | { 16688, 9, 1, 0, 1386, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2c6f8024819ULL }, // Inst #16688 = VPERMWZ128rmk |
| 30469 | { 16687, 7, 1, 0, 2342, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0c6f8024819ULL }, // Inst #16687 = VPERMWZ128rm |
| 30470 | { 16686, 5, 1, 0, 1309, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebef8024829ULL }, // Inst #16686 = VPERMT2WZrrkz |
| 30471 | { 16685, 5, 1, 0, 1309, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeabef8024829ULL }, // Inst #16685 = VPERMT2WZrrk |
| 30472 | { 16684, 4, 1, 0, 2335, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bef8024829ULL }, // Inst #16684 = VPERMT2WZrr |
| 30473 | { 16683, 9, 1, 0, 1395, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebef8024819ULL }, // Inst #16683 = VPERMT2WZrmkz |
| 30474 | { 16682, 9, 1, 0, 1395, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabef8024819ULL }, // Inst #16682 = VPERMT2WZrmk |
| 30475 | { 16681, 8, 1, 0, 2332, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bef8024819ULL }, // Inst #16681 = VPERMT2WZrm |
| 30476 | { 16680, 5, 1, 0, 1308, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7bef8024829ULL }, // Inst #16680 = VPERMT2WZ256rrkz |
| 30477 | { 16679, 5, 1, 0, 1308, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3bef8024829ULL }, // Inst #16679 = VPERMT2WZ256rrk |
| 30478 | { 16678, 4, 1, 0, 2325, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bef8024829ULL }, // Inst #16678 = VPERMT2WZ256rr |
| 30479 | { 16677, 9, 1, 0, 2337, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bef8024819ULL }, // Inst #16677 = VPERMT2WZ256rmkz |
| 30480 | { 16676, 9, 1, 0, 2337, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bef8024819ULL }, // Inst #16676 = VPERMT2WZ256rmk |
| 30481 | { 16675, 8, 1, 0, 2329, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bef8024819ULL }, // Inst #16675 = VPERMT2WZ256rm |
| 30482 | { 16674, 5, 1, 0, 1307, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6bef8024829ULL }, // Inst #16674 = VPERMT2WZ128rrkz |
| 30483 | { 16673, 5, 1, 0, 1307, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2bef8024829ULL }, // Inst #16673 = VPERMT2WZ128rrk |
| 30484 | { 16672, 4, 1, 0, 2324, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bef8024829ULL }, // Inst #16672 = VPERMT2WZ128rr |
| 30485 | { 16671, 9, 1, 0, 1392, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bef8024819ULL }, // Inst #16671 = VPERMT2WZ128rmkz |
| 30486 | { 16670, 9, 1, 0, 1392, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bef8024819ULL }, // Inst #16670 = VPERMT2WZ128rmk |
| 30487 | { 16669, 8, 1, 0, 2320, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bef8024819ULL }, // Inst #16669 = VPERMT2WZ128rm |
| 30488 | { 16668, 5, 1, 0, 1730, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebf78024829ULL }, // Inst #16668 = VPERMT2QZrrkz |
| 30489 | { 16667, 5, 1, 0, 1730, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeabf78024829ULL }, // Inst #16667 = VPERMT2QZrrk |
| 30490 | { 16666, 4, 1, 0, 1730, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bf78024829ULL }, // Inst #16666 = VPERMT2QZrr |
| 30491 | { 16665, 9, 1, 0, 439, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebf78024819ULL }, // Inst #16665 = VPERMT2QZrmkz |
| 30492 | { 16664, 9, 1, 0, 439, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabf78024819ULL }, // Inst #16664 = VPERMT2QZrmk |
| 30493 | { 16663, 9, 1, 0, 439, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9ebf78024819ULL }, // Inst #16663 = VPERMT2QZrmbkz |
| 30494 | { 16662, 9, 1, 0, 439, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9abf78024819ULL }, // Inst #16662 = VPERMT2QZrmbk |
| 30495 | { 16661, 8, 1, 0, 439, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x98bf78024819ULL }, // Inst #16661 = VPERMT2QZrmb |
| 30496 | { 16660, 8, 1, 0, 439, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bf78024819ULL }, // Inst #16660 = VPERMT2QZrm |
| 30497 | { 16659, 5, 1, 0, 1729, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7bf78024829ULL }, // Inst #16659 = VPERMT2QZ256rrkz |
| 30498 | { 16658, 5, 1, 0, 1729, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3bf78024829ULL }, // Inst #16658 = VPERMT2QZ256rrk |
| 30499 | { 16657, 4, 1, 0, 1729, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bf78024829ULL }, // Inst #16657 = VPERMT2QZ256rr |
| 30500 | { 16656, 9, 1, 0, 439, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bf78024819ULL }, // Inst #16656 = VPERMT2QZ256rmkz |
| 30501 | { 16655, 9, 1, 0, 439, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bf78024819ULL }, // Inst #16655 = VPERMT2QZ256rmk |
| 30502 | { 16654, 9, 1, 0, 439, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x97bf78024819ULL }, // Inst #16654 = VPERMT2QZ256rmbkz |
| 30503 | { 16653, 9, 1, 0, 439, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93bf78024819ULL }, // Inst #16653 = VPERMT2QZ256rmbk |
| 30504 | { 16652, 8, 1, 0, 439, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x91bf78024819ULL }, // Inst #16652 = VPERMT2QZ256rmb |
| 30505 | { 16651, 8, 1, 0, 439, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bf78024819ULL }, // Inst #16651 = VPERMT2QZ256rm |
| 30506 | { 16650, 5, 1, 0, 1732, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6bf78024829ULL }, // Inst #16650 = VPERMT2QZ128rrkz |
| 30507 | { 16649, 5, 1, 0, 1732, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2bf78024829ULL }, // Inst #16649 = VPERMT2QZ128rrk |
| 30508 | { 16648, 4, 1, 0, 1732, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bf78024829ULL }, // Inst #16648 = VPERMT2QZ128rr |
| 30509 | { 16647, 9, 1, 0, 1339, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bf78024819ULL }, // Inst #16647 = VPERMT2QZ128rmkz |
| 30510 | { 16646, 9, 1, 0, 1339, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bf78024819ULL }, // Inst #16646 = VPERMT2QZ128rmk |
| 30511 | { 16645, 9, 1, 0, 1339, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x96bf78024819ULL }, // Inst #16645 = VPERMT2QZ128rmbkz |
| 30512 | { 16644, 9, 1, 0, 1339, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92bf78024819ULL }, // Inst #16644 = VPERMT2QZ128rmbk |
| 30513 | { 16643, 8, 1, 0, 1339, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x90bf78024819ULL }, // Inst #16643 = VPERMT2QZ128rmb |
| 30514 | { 16642, 8, 1, 0, 1339, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bf78024819ULL }, // Inst #16642 = VPERMT2QZ128rm |
| 30515 | { 16641, 5, 1, 0, 1143, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebfe8004829ULL }, // Inst #16641 = VPERMT2PSZrrkz |
| 30516 | { 16640, 5, 1, 0, 1143, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeabfe8004829ULL }, // Inst #16640 = VPERMT2PSZrrk |
| 30517 | { 16639, 4, 1, 0, 1143, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bfe8004829ULL }, // Inst #16639 = VPERMT2PSZrr |
| 30518 | { 16638, 9, 1, 0, 513, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebfe8004819ULL }, // Inst #16638 = VPERMT2PSZrmkz |
| 30519 | { 16637, 9, 1, 0, 513, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabfe8004819ULL }, // Inst #16637 = VPERMT2PSZrmk |
| 30520 | { 16636, 9, 1, 0, 513, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7ebfe8004819ULL }, // Inst #16636 = VPERMT2PSZrmbkz |
| 30521 | { 16635, 9, 1, 0, 513, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7abfe8004819ULL }, // Inst #16635 = VPERMT2PSZrmbk |
| 30522 | { 16634, 8, 1, 0, 513, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x78bfe8004819ULL }, // Inst #16634 = VPERMT2PSZrmb |
| 30523 | { 16633, 8, 1, 0, 513, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bfe8004819ULL }, // Inst #16633 = VPERMT2PSZrm |
| 30524 | { 16632, 5, 1, 0, 1141, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7bfe8004829ULL }, // Inst #16632 = VPERMT2PSZ256rrkz |
| 30525 | { 16631, 5, 1, 0, 1141, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3bfe8004829ULL }, // Inst #16631 = VPERMT2PSZ256rrk |
| 30526 | { 16630, 4, 1, 0, 1141, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bfe8004829ULL }, // Inst #16630 = VPERMT2PSZ256rr |
| 30527 | { 16629, 9, 1, 0, 513, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bfe8004819ULL }, // Inst #16629 = VPERMT2PSZ256rmkz |
| 30528 | { 16628, 9, 1, 0, 513, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bfe8004819ULL }, // Inst #16628 = VPERMT2PSZ256rmk |
| 30529 | { 16627, 9, 1, 0, 513, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x77bfe8004819ULL }, // Inst #16627 = VPERMT2PSZ256rmbkz |
| 30530 | { 16626, 9, 1, 0, 513, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73bfe8004819ULL }, // Inst #16626 = VPERMT2PSZ256rmbk |
| 30531 | { 16625, 8, 1, 0, 513, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x71bfe8004819ULL }, // Inst #16625 = VPERMT2PSZ256rmb |
| 30532 | { 16624, 8, 1, 0, 513, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bfe8004819ULL }, // Inst #16624 = VPERMT2PSZ256rm |
| 30533 | { 16623, 5, 1, 0, 1138, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6bfe8004829ULL }, // Inst #16623 = VPERMT2PSZ128rrkz |
| 30534 | { 16622, 5, 1, 0, 1138, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2bfe8004829ULL }, // Inst #16622 = VPERMT2PSZ128rrk |
| 30535 | { 16621, 4, 1, 0, 1138, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bfe8004829ULL }, // Inst #16621 = VPERMT2PSZ128rr |
| 30536 | { 16620, 9, 1, 0, 1340, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bfe8004819ULL }, // Inst #16620 = VPERMT2PSZ128rmkz |
| 30537 | { 16619, 9, 1, 0, 1340, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bfe8004819ULL }, // Inst #16619 = VPERMT2PSZ128rmk |
| 30538 | { 16618, 9, 1, 0, 1340, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x76bfe8004819ULL }, // Inst #16618 = VPERMT2PSZ128rmbkz |
| 30539 | { 16617, 9, 1, 0, 1340, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72bfe8004819ULL }, // Inst #16617 = VPERMT2PSZ128rmbk |
| 30540 | { 16616, 8, 1, 0, 1340, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x70bfe8004819ULL }, // Inst #16616 = VPERMT2PSZ128rmb |
| 30541 | { 16615, 8, 1, 0, 1340, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bfe8004819ULL }, // Inst #16615 = VPERMT2PSZ128rm |
| 30542 | { 16614, 5, 1, 0, 1143, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebff0024829ULL }, // Inst #16614 = VPERMT2PDZrrkz |
| 30543 | { 16613, 5, 1, 0, 1143, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeabff0024829ULL }, // Inst #16613 = VPERMT2PDZrrk |
| 30544 | { 16612, 4, 1, 0, 1143, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bff0024829ULL }, // Inst #16612 = VPERMT2PDZrr |
| 30545 | { 16611, 9, 1, 0, 513, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebff0024819ULL }, // Inst #16611 = VPERMT2PDZrmkz |
| 30546 | { 16610, 9, 1, 0, 513, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabff0024819ULL }, // Inst #16610 = VPERMT2PDZrmk |
| 30547 | { 16609, 9, 1, 0, 513, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9ebff0024819ULL }, // Inst #16609 = VPERMT2PDZrmbkz |
| 30548 | { 16608, 9, 1, 0, 513, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9abff0024819ULL }, // Inst #16608 = VPERMT2PDZrmbk |
| 30549 | { 16607, 8, 1, 0, 513, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x98bff0024819ULL }, // Inst #16607 = VPERMT2PDZrmb |
| 30550 | { 16606, 8, 1, 0, 513, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bff0024819ULL }, // Inst #16606 = VPERMT2PDZrm |
| 30551 | { 16605, 5, 1, 0, 1141, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7bff0024829ULL }, // Inst #16605 = VPERMT2PDZ256rrkz |
| 30552 | { 16604, 5, 1, 0, 1141, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3bff0024829ULL }, // Inst #16604 = VPERMT2PDZ256rrk |
| 30553 | { 16603, 4, 1, 0, 1141, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bff0024829ULL }, // Inst #16603 = VPERMT2PDZ256rr |
| 30554 | { 16602, 9, 1, 0, 513, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bff0024819ULL }, // Inst #16602 = VPERMT2PDZ256rmkz |
| 30555 | { 16601, 9, 1, 0, 513, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bff0024819ULL }, // Inst #16601 = VPERMT2PDZ256rmk |
| 30556 | { 16600, 9, 1, 0, 513, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x97bff0024819ULL }, // Inst #16600 = VPERMT2PDZ256rmbkz |
| 30557 | { 16599, 9, 1, 0, 513, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93bff0024819ULL }, // Inst #16599 = VPERMT2PDZ256rmbk |
| 30558 | { 16598, 8, 1, 0, 513, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x91bff0024819ULL }, // Inst #16598 = VPERMT2PDZ256rmb |
| 30559 | { 16597, 8, 1, 0, 513, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bff0024819ULL }, // Inst #16597 = VPERMT2PDZ256rm |
| 30560 | { 16596, 5, 1, 0, 1138, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6bff0024829ULL }, // Inst #16596 = VPERMT2PDZ128rrkz |
| 30561 | { 16595, 5, 1, 0, 1138, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2bff0024829ULL }, // Inst #16595 = VPERMT2PDZ128rrk |
| 30562 | { 16594, 4, 1, 0, 1138, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bff0024829ULL }, // Inst #16594 = VPERMT2PDZ128rr |
| 30563 | { 16593, 9, 1, 0, 1340, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bff0024819ULL }, // Inst #16593 = VPERMT2PDZ128rmkz |
| 30564 | { 16592, 9, 1, 0, 1340, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bff0024819ULL }, // Inst #16592 = VPERMT2PDZ128rmk |
| 30565 | { 16591, 9, 1, 0, 1340, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x96bff0024819ULL }, // Inst #16591 = VPERMT2PDZ128rmbkz |
| 30566 | { 16590, 9, 1, 0, 1340, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92bff0024819ULL }, // Inst #16590 = VPERMT2PDZ128rmbk |
| 30567 | { 16589, 8, 1, 0, 1340, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x90bff0024819ULL }, // Inst #16589 = VPERMT2PDZ128rmb |
| 30568 | { 16588, 8, 1, 0, 1340, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bff0024819ULL }, // Inst #16588 = VPERMT2PDZ128rm |
| 30569 | { 16587, 5, 1, 0, 1730, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebf78004829ULL }, // Inst #16587 = VPERMT2DZrrkz |
| 30570 | { 16586, 5, 1, 0, 1730, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeabf78004829ULL }, // Inst #16586 = VPERMT2DZrrk |
| 30571 | { 16585, 4, 1, 0, 1730, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bf78004829ULL }, // Inst #16585 = VPERMT2DZrr |
| 30572 | { 16584, 9, 1, 0, 439, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebf78004819ULL }, // Inst #16584 = VPERMT2DZrmkz |
| 30573 | { 16583, 9, 1, 0, 439, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabf78004819ULL }, // Inst #16583 = VPERMT2DZrmk |
| 30574 | { 16582, 9, 1, 0, 439, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7ebf78004819ULL }, // Inst #16582 = VPERMT2DZrmbkz |
| 30575 | { 16581, 9, 1, 0, 439, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7abf78004819ULL }, // Inst #16581 = VPERMT2DZrmbk |
| 30576 | { 16580, 8, 1, 0, 439, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x78bf78004819ULL }, // Inst #16580 = VPERMT2DZrmb |
| 30577 | { 16579, 8, 1, 0, 439, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bf78004819ULL }, // Inst #16579 = VPERMT2DZrm |
| 30578 | { 16578, 5, 1, 0, 1729, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7bf78004829ULL }, // Inst #16578 = VPERMT2DZ256rrkz |
| 30579 | { 16577, 5, 1, 0, 1729, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3bf78004829ULL }, // Inst #16577 = VPERMT2DZ256rrk |
| 30580 | { 16576, 4, 1, 0, 1729, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bf78004829ULL }, // Inst #16576 = VPERMT2DZ256rr |
| 30581 | { 16575, 9, 1, 0, 439, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bf78004819ULL }, // Inst #16575 = VPERMT2DZ256rmkz |
| 30582 | { 16574, 9, 1, 0, 439, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bf78004819ULL }, // Inst #16574 = VPERMT2DZ256rmk |
| 30583 | { 16573, 9, 1, 0, 439, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x77bf78004819ULL }, // Inst #16573 = VPERMT2DZ256rmbkz |
| 30584 | { 16572, 9, 1, 0, 439, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73bf78004819ULL }, // Inst #16572 = VPERMT2DZ256rmbk |
| 30585 | { 16571, 8, 1, 0, 439, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x71bf78004819ULL }, // Inst #16571 = VPERMT2DZ256rmb |
| 30586 | { 16570, 8, 1, 0, 439, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bf78004819ULL }, // Inst #16570 = VPERMT2DZ256rm |
| 30587 | { 16569, 5, 1, 0, 1732, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6bf78004829ULL }, // Inst #16569 = VPERMT2DZ128rrkz |
| 30588 | { 16568, 5, 1, 0, 1732, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2bf78004829ULL }, // Inst #16568 = VPERMT2DZ128rrk |
| 30589 | { 16567, 4, 1, 0, 1732, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bf78004829ULL }, // Inst #16567 = VPERMT2DZ128rr |
| 30590 | { 16566, 9, 1, 0, 1339, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bf78004819ULL }, // Inst #16566 = VPERMT2DZ128rmkz |
| 30591 | { 16565, 9, 1, 0, 1339, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bf78004819ULL }, // Inst #16565 = VPERMT2DZ128rmk |
| 30592 | { 16564, 9, 1, 0, 1339, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x76bf78004819ULL }, // Inst #16564 = VPERMT2DZ128rmbkz |
| 30593 | { 16563, 9, 1, 0, 1339, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72bf78004819ULL }, // Inst #16563 = VPERMT2DZ128rmbk |
| 30594 | { 16562, 8, 1, 0, 1339, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x70bf78004819ULL }, // Inst #16562 = VPERMT2DZ128rmb |
| 30595 | { 16561, 8, 1, 0, 1339, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bf78004819ULL }, // Inst #16561 = VPERMT2DZ128rm |
| 30596 | { 16560, 5, 1, 0, 2334, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebef8004829ULL }, // Inst #16560 = VPERMT2BZrrkz |
| 30597 | { 16559, 5, 1, 0, 2334, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeabef8004829ULL }, // Inst #16559 = VPERMT2BZrrk |
| 30598 | { 16558, 4, 1, 0, 2333, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bef8004829ULL }, // Inst #16558 = VPERMT2BZrr |
| 30599 | { 16557, 9, 1, 0, 2331, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebef8004819ULL }, // Inst #16557 = VPERMT2BZrmkz |
| 30600 | { 16556, 9, 1, 0, 2331, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabef8004819ULL }, // Inst #16556 = VPERMT2BZrmk |
| 30601 | { 16555, 8, 1, 0, 2330, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bef8004819ULL }, // Inst #16555 = VPERMT2BZrm |
| 30602 | { 16554, 5, 1, 0, 2323, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7bef8004829ULL }, // Inst #16554 = VPERMT2BZ256rrkz |
| 30603 | { 16553, 5, 1, 0, 2323, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3bef8004829ULL }, // Inst #16553 = VPERMT2BZ256rrk |
| 30604 | { 16552, 4, 1, 0, 2322, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bef8004829ULL }, // Inst #16552 = VPERMT2BZ256rr |
| 30605 | { 16551, 9, 1, 0, 2327, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bef8004819ULL }, // Inst #16551 = VPERMT2BZ256rmkz |
| 30606 | { 16550, 9, 1, 0, 2327, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bef8004819ULL }, // Inst #16550 = VPERMT2BZ256rmk |
| 30607 | { 16549, 8, 1, 0, 2326, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bef8004819ULL }, // Inst #16549 = VPERMT2BZ256rm |
| 30608 | { 16548, 5, 1, 0, 1139, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6bef8004829ULL }, // Inst #16548 = VPERMT2BZ128rrkz |
| 30609 | { 16547, 5, 1, 0, 1139, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2bef8004829ULL }, // Inst #16547 = VPERMT2BZ128rrk |
| 30610 | { 16546, 4, 1, 0, 2321, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bef8004829ULL }, // Inst #16546 = VPERMT2BZ128rr |
| 30611 | { 16545, 9, 1, 0, 2319, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bef8004819ULL }, // Inst #16545 = VPERMT2BZ128rmkz |
| 30612 | { 16544, 9, 1, 0, 2319, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bef8004819ULL }, // Inst #16544 = VPERMT2BZ128rmk |
| 30613 | { 16543, 8, 1, 0, 2315, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bef8004819ULL }, // Inst #16543 = VPERMT2BZ128rm |
| 30614 | { 16542, 4, 1, 0, 1731, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xee9b78024829ULL }, // Inst #16542 = VPERMQZrrkz |
| 30615 | { 16541, 5, 1, 0, 1731, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xea9b78024829ULL }, // Inst #16541 = VPERMQZrrk |
| 30616 | { 16540, 3, 1, 0, 1731, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe89b78024829ULL }, // Inst #16540 = VPERMQZrr |
| 30617 | { 16539, 8, 1, 0, 439, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9b78024819ULL }, // Inst #16539 = VPERMQZrmkz |
| 30618 | { 16538, 9, 1, 0, 439, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9b78024819ULL }, // Inst #16538 = VPERMQZrmk |
| 30619 | { 16537, 8, 1, 0, 439, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e9b78024819ULL }, // Inst #16537 = VPERMQZrmbkz |
| 30620 | { 16536, 9, 1, 0, 439, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a9b78024819ULL }, // Inst #16536 = VPERMQZrmbk |
| 30621 | { 16535, 7, 1, 0, 439, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x989b78024819ULL }, // Inst #16535 = VPERMQZrmb |
| 30622 | { 16534, 7, 1, 0, 439, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89b78024819ULL }, // Inst #16534 = VPERMQZrm |
| 30623 | { 16533, 4, 1, 0, 364, 0, 0, 4605, X86ImpOpBase + 0, 0, 0xee0078066829ULL }, // Inst #16533 = VPERMQZrikz |
| 30624 | { 16532, 5, 1, 0, 364, 0, 0, 4600, X86ImpOpBase + 0, 0, 0xea0078066829ULL }, // Inst #16532 = VPERMQZrik |
| 30625 | { 16531, 3, 1, 0, 364, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe80078066829ULL }, // Inst #16531 = VPERMQZri |
| 30626 | { 16530, 8, 1, 0, 363, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0078066819ULL }, // Inst #16530 = VPERMQZmikz |
| 30627 | { 16529, 9, 1, 0, 363, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0078066819ULL }, // Inst #16529 = VPERMQZmik |
| 30628 | { 16528, 7, 1, 0, 363, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80078066819ULL }, // Inst #16528 = VPERMQZmi |
| 30629 | { 16527, 8, 1, 0, 363, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e0078066819ULL }, // Inst #16527 = VPERMQZmbikz |
| 30630 | { 16526, 9, 1, 0, 363, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a0078066819ULL }, // Inst #16526 = VPERMQZmbik |
| 30631 | { 16525, 7, 1, 0, 363, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x980078066819ULL }, // Inst #16525 = VPERMQZmbi |
| 30632 | { 16524, 4, 1, 0, 1729, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc79b78024829ULL }, // Inst #16524 = VPERMQZ256rrkz |
| 30633 | { 16523, 5, 1, 0, 1729, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc39b78024829ULL }, // Inst #16523 = VPERMQZ256rrk |
| 30634 | { 16522, 3, 1, 0, 1729, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc19b78024829ULL }, // Inst #16522 = VPERMQZ256rr |
| 30635 | { 16521, 8, 1, 0, 439, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79b78024819ULL }, // Inst #16521 = VPERMQZ256rmkz |
| 30636 | { 16520, 9, 1, 0, 439, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39b78024819ULL }, // Inst #16520 = VPERMQZ256rmk |
| 30637 | { 16519, 8, 1, 0, 439, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x979b78024819ULL }, // Inst #16519 = VPERMQZ256rmbkz |
| 30638 | { 16518, 9, 1, 0, 439, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x939b78024819ULL }, // Inst #16518 = VPERMQZ256rmbk |
| 30639 | { 16517, 7, 1, 0, 439, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x919b78024819ULL }, // Inst #16517 = VPERMQZ256rmb |
| 30640 | { 16516, 7, 1, 0, 439, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19b78024819ULL }, // Inst #16516 = VPERMQZ256rm |
| 30641 | { 16515, 4, 1, 0, 364, 0, 0, 4579, X86ImpOpBase + 0, 0, 0xc70078066829ULL }, // Inst #16515 = VPERMQZ256rikz |
| 30642 | { 16514, 5, 1, 0, 364, 0, 0, 4574, X86ImpOpBase + 0, 0, 0xc30078066829ULL }, // Inst #16514 = VPERMQZ256rik |
| 30643 | { 16513, 3, 1, 0, 364, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc10078066829ULL }, // Inst #16513 = VPERMQZ256ri |
| 30644 | { 16512, 8, 1, 0, 363, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70078066819ULL }, // Inst #16512 = VPERMQZ256mikz |
| 30645 | { 16511, 9, 1, 0, 363, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30078066819ULL }, // Inst #16511 = VPERMQZ256mik |
| 30646 | { 16510, 7, 1, 0, 363, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10078066819ULL }, // Inst #16510 = VPERMQZ256mi |
| 30647 | { 16509, 8, 1, 0, 363, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x970078066819ULL }, // Inst #16509 = VPERMQZ256mbikz |
| 30648 | { 16508, 9, 1, 0, 363, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x930078066819ULL }, // Inst #16508 = VPERMQZ256mbik |
| 30649 | { 16507, 7, 1, 0, 363, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x910078066819ULL }, // Inst #16507 = VPERMQZ256mbi |
| 30650 | { 16506, 3, 1, 0, 1043, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x10038066829ULL }, // Inst #16506 = VPERMQYri |
| 30651 | { 16505, 7, 1, 0, 1045, 0, 0, 5609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10038066819ULL }, // Inst #16505 = VPERMQYmi |
| 30652 | { 16504, 4, 1, 0, 1143, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xee8b68004829ULL }, // Inst #16504 = VPERMPSZrrkz |
| 30653 | { 16503, 5, 1, 0, 1143, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xea8b68004829ULL }, // Inst #16503 = VPERMPSZrrk |
| 30654 | { 16502, 3, 1, 0, 1143, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88b68004829ULL }, // Inst #16502 = VPERMPSZrr |
| 30655 | { 16501, 8, 1, 0, 513, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8b68004819ULL }, // Inst #16501 = VPERMPSZrmkz |
| 30656 | { 16500, 9, 1, 0, 513, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8b68004819ULL }, // Inst #16500 = VPERMPSZrmk |
| 30657 | { 16499, 8, 1, 0, 513, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e8b68004819ULL }, // Inst #16499 = VPERMPSZrmbkz |
| 30658 | { 16498, 9, 1, 0, 513, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a8b68004819ULL }, // Inst #16498 = VPERMPSZrmbk |
| 30659 | { 16497, 7, 1, 0, 513, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x788b68004819ULL }, // Inst #16497 = VPERMPSZrmb |
| 30660 | { 16496, 7, 1, 0, 513, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88b68004819ULL }, // Inst #16496 = VPERMPSZrm |
| 30661 | { 16495, 4, 1, 0, 1141, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc78b68004829ULL }, // Inst #16495 = VPERMPSZ256rrkz |
| 30662 | { 16494, 5, 1, 0, 1141, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc38b68004829ULL }, // Inst #16494 = VPERMPSZ256rrk |
| 30663 | { 16493, 3, 1, 0, 1141, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18b68004829ULL }, // Inst #16493 = VPERMPSZ256rr |
| 30664 | { 16492, 8, 1, 0, 513, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78b68004819ULL }, // Inst #16492 = VPERMPSZ256rmkz |
| 30665 | { 16491, 9, 1, 0, 513, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38b68004819ULL }, // Inst #16491 = VPERMPSZ256rmk |
| 30666 | { 16490, 8, 1, 0, 513, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x778b68004819ULL }, // Inst #16490 = VPERMPSZ256rmbkz |
| 30667 | { 16489, 9, 1, 0, 513, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x738b68004819ULL }, // Inst #16489 = VPERMPSZ256rmbk |
| 30668 | { 16488, 7, 1, 0, 513, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x718b68004819ULL }, // Inst #16488 = VPERMPSZ256rmb |
| 30669 | { 16487, 7, 1, 0, 513, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18b68004819ULL }, // Inst #16487 = VPERMPSZ256rm |
| 30670 | { 16486, 3, 1, 0, 1067, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18b28004829ULL }, // Inst #16486 = VPERMPSYrr |
| 30671 | { 16485, 7, 1, 0, 1041, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18b28004819ULL }, // Inst #16485 = VPERMPSYrm |
| 30672 | { 16484, 4, 1, 0, 1143, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xee8b70024829ULL }, // Inst #16484 = VPERMPDZrrkz |
| 30673 | { 16483, 5, 1, 0, 1143, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xea8b70024829ULL }, // Inst #16483 = VPERMPDZrrk |
| 30674 | { 16482, 3, 1, 0, 1143, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88b70024829ULL }, // Inst #16482 = VPERMPDZrr |
| 30675 | { 16481, 8, 1, 0, 513, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8b70024819ULL }, // Inst #16481 = VPERMPDZrmkz |
| 30676 | { 16480, 9, 1, 0, 513, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8b70024819ULL }, // Inst #16480 = VPERMPDZrmk |
| 30677 | { 16479, 8, 1, 0, 513, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e8b70024819ULL }, // Inst #16479 = VPERMPDZrmbkz |
| 30678 | { 16478, 9, 1, 0, 513, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a8b70024819ULL }, // Inst #16478 = VPERMPDZrmbk |
| 30679 | { 16477, 7, 1, 0, 513, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x988b70024819ULL }, // Inst #16477 = VPERMPDZrmb |
| 30680 | { 16476, 7, 1, 0, 513, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88b70024819ULL }, // Inst #16476 = VPERMPDZrm |
| 30681 | { 16475, 4, 1, 0, 366, 0, 0, 4605, X86ImpOpBase + 0, 0, 0xee00f0066829ULL }, // Inst #16475 = VPERMPDZrikz |
| 30682 | { 16474, 5, 1, 0, 366, 0, 0, 4600, X86ImpOpBase + 0, 0, 0xea00f0066829ULL }, // Inst #16474 = VPERMPDZrik |
| 30683 | { 16473, 3, 1, 0, 366, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe800f0066829ULL }, // Inst #16473 = VPERMPDZri |
| 30684 | { 16472, 8, 1, 0, 367, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee00f0066819ULL }, // Inst #16472 = VPERMPDZmikz |
| 30685 | { 16471, 9, 1, 0, 367, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea00f0066819ULL }, // Inst #16471 = VPERMPDZmik |
| 30686 | { 16470, 7, 1, 0, 367, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe800f0066819ULL }, // Inst #16470 = VPERMPDZmi |
| 30687 | { 16469, 8, 1, 0, 367, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e00f0066819ULL }, // Inst #16469 = VPERMPDZmbikz |
| 30688 | { 16468, 9, 1, 0, 367, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a00f0066819ULL }, // Inst #16468 = VPERMPDZmbik |
| 30689 | { 16467, 7, 1, 0, 367, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9800f0066819ULL }, // Inst #16467 = VPERMPDZmbi |
| 30690 | { 16466, 4, 1, 0, 1141, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc78b70024829ULL }, // Inst #16466 = VPERMPDZ256rrkz |
| 30691 | { 16465, 5, 1, 0, 1141, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc38b70024829ULL }, // Inst #16465 = VPERMPDZ256rrk |
| 30692 | { 16464, 3, 1, 0, 1141, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18b70024829ULL }, // Inst #16464 = VPERMPDZ256rr |
| 30693 | { 16463, 8, 1, 0, 513, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78b70024819ULL }, // Inst #16463 = VPERMPDZ256rmkz |
| 30694 | { 16462, 9, 1, 0, 513, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38b70024819ULL }, // Inst #16462 = VPERMPDZ256rmk |
| 30695 | { 16461, 8, 1, 0, 513, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x978b70024819ULL }, // Inst #16461 = VPERMPDZ256rmbkz |
| 30696 | { 16460, 9, 1, 0, 513, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x938b70024819ULL }, // Inst #16460 = VPERMPDZ256rmbk |
| 30697 | { 16459, 7, 1, 0, 513, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x918b70024819ULL }, // Inst #16459 = VPERMPDZ256rmb |
| 30698 | { 16458, 7, 1, 0, 513, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18b70024819ULL }, // Inst #16458 = VPERMPDZ256rm |
| 30699 | { 16457, 4, 1, 0, 366, 0, 0, 4579, X86ImpOpBase + 0, 0, 0xc700f0066829ULL }, // Inst #16457 = VPERMPDZ256rikz |
| 30700 | { 16456, 5, 1, 0, 366, 0, 0, 4574, X86ImpOpBase + 0, 0, 0xc300f0066829ULL }, // Inst #16456 = VPERMPDZ256rik |
| 30701 | { 16455, 3, 1, 0, 366, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc100f0066829ULL }, // Inst #16455 = VPERMPDZ256ri |
| 30702 | { 16454, 8, 1, 0, 367, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc700f0066819ULL }, // Inst #16454 = VPERMPDZ256mikz |
| 30703 | { 16453, 9, 1, 0, 367, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc300f0066819ULL }, // Inst #16453 = VPERMPDZ256mik |
| 30704 | { 16452, 7, 1, 0, 367, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc100f0066819ULL }, // Inst #16452 = VPERMPDZ256mi |
| 30705 | { 16451, 8, 1, 0, 367, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9700f0066819ULL }, // Inst #16451 = VPERMPDZ256mbikz |
| 30706 | { 16450, 9, 1, 0, 367, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9300f0066819ULL }, // Inst #16450 = VPERMPDZ256mbik |
| 30707 | { 16449, 7, 1, 0, 367, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9100f0066819ULL }, // Inst #16449 = VPERMPDZ256mbi |
| 30708 | { 16448, 3, 1, 0, 1042, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x100b0066829ULL }, // Inst #16448 = VPERMPDYri |
| 30709 | { 16447, 7, 1, 0, 1044, 0, 0, 5609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100b0066819ULL }, // Inst #16447 = VPERMPDYmi |
| 30710 | { 16446, 3, 1, 0, 1420, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8628004829ULL }, // Inst #16446 = VPERMILPSrr |
| 30711 | { 16445, 7, 1, 0, 1429, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8628004819ULL }, // Inst #16445 = VPERMILPSrm |
| 30712 | { 16444, 3, 1, 0, 1417, 0, 0, 566, X86ImpOpBase + 0, 0, 0x228046829ULL }, // Inst #16444 = VPERMILPSri |
| 30713 | { 16443, 7, 1, 0, 1672, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x228046819ULL }, // Inst #16443 = VPERMILPSmi |
| 30714 | { 16442, 4, 1, 0, 1137, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xee8668004829ULL }, // Inst #16442 = VPERMILPSZrrkz |
| 30715 | { 16441, 5, 1, 0, 1137, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xea8668004829ULL }, // Inst #16441 = VPERMILPSZrrk |
| 30716 | { 16440, 3, 1, 0, 1137, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88668004829ULL }, // Inst #16440 = VPERMILPSZrr |
| 30717 | { 16439, 8, 1, 0, 523, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8668004819ULL }, // Inst #16439 = VPERMILPSZrmkz |
| 30718 | { 16438, 9, 1, 0, 523, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8668004819ULL }, // Inst #16438 = VPERMILPSZrmk |
| 30719 | { 16437, 8, 1, 0, 523, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e8668004819ULL }, // Inst #16437 = VPERMILPSZrmbkz |
| 30720 | { 16436, 9, 1, 0, 523, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a8668004819ULL }, // Inst #16436 = VPERMILPSZrmbk |
| 30721 | { 16435, 7, 1, 0, 523, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x788668004819ULL }, // Inst #16435 = VPERMILPSZrmb |
| 30722 | { 16434, 7, 1, 0, 523, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88668004819ULL }, // Inst #16434 = VPERMILPSZrm |
| 30723 | { 16433, 4, 1, 0, 475, 0, 0, 4674, X86ImpOpBase + 0, 0, 0xee0268046829ULL }, // Inst #16433 = VPERMILPSZrikz |
| 30724 | { 16432, 5, 1, 0, 475, 0, 0, 4669, X86ImpOpBase + 0, 0, 0xea0268046829ULL }, // Inst #16432 = VPERMILPSZrik |
| 30725 | { 16431, 3, 1, 0, 475, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe80268046829ULL }, // Inst #16431 = VPERMILPSZri |
| 30726 | { 16430, 8, 1, 0, 474, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0268046819ULL }, // Inst #16430 = VPERMILPSZmikz |
| 30727 | { 16429, 9, 1, 0, 474, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0268046819ULL }, // Inst #16429 = VPERMILPSZmik |
| 30728 | { 16428, 7, 1, 0, 474, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80268046819ULL }, // Inst #16428 = VPERMILPSZmi |
| 30729 | { 16427, 8, 1, 0, 474, 0, 0, 4661, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e0268046819ULL }, // Inst #16427 = VPERMILPSZmbikz |
| 30730 | { 16426, 9, 1, 0, 474, 0, 0, 4652, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a0268046819ULL }, // Inst #16426 = VPERMILPSZmbik |
| 30731 | { 16425, 7, 1, 0, 474, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x780268046819ULL }, // Inst #16425 = VPERMILPSZmbi |
| 30732 | { 16424, 4, 1, 0, 1135, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc78668004829ULL }, // Inst #16424 = VPERMILPSZ256rrkz |
| 30733 | { 16423, 5, 1, 0, 1135, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc38668004829ULL }, // Inst #16423 = VPERMILPSZ256rrk |
| 30734 | { 16422, 3, 1, 0, 1135, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18668004829ULL }, // Inst #16422 = VPERMILPSZ256rr |
| 30735 | { 16421, 8, 1, 0, 1432, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78668004819ULL }, // Inst #16421 = VPERMILPSZ256rmkz |
| 30736 | { 16420, 9, 1, 0, 1432, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38668004819ULL }, // Inst #16420 = VPERMILPSZ256rmk |
| 30737 | { 16419, 8, 1, 0, 1432, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x778668004819ULL }, // Inst #16419 = VPERMILPSZ256rmbkz |
| 30738 | { 16418, 9, 1, 0, 1432, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x738668004819ULL }, // Inst #16418 = VPERMILPSZ256rmbk |
| 30739 | { 16417, 7, 1, 0, 1432, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x718668004819ULL }, // Inst #16417 = VPERMILPSZ256rmb |
| 30740 | { 16416, 7, 1, 0, 1432, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18668004819ULL }, // Inst #16416 = VPERMILPSZ256rm |
| 30741 | { 16415, 4, 1, 0, 1418, 0, 0, 4648, X86ImpOpBase + 0, 0, 0xc70268046829ULL }, // Inst #16415 = VPERMILPSZ256rikz |
| 30742 | { 16414, 5, 1, 0, 1418, 0, 0, 4643, X86ImpOpBase + 0, 0, 0xc30268046829ULL }, // Inst #16414 = VPERMILPSZ256rik |
| 30743 | { 16413, 3, 1, 0, 1418, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc10268046829ULL }, // Inst #16413 = VPERMILPSZ256ri |
| 30744 | { 16412, 8, 1, 0, 1431, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70268046819ULL }, // Inst #16412 = VPERMILPSZ256mikz |
| 30745 | { 16411, 9, 1, 0, 1431, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30268046819ULL }, // Inst #16411 = VPERMILPSZ256mik |
| 30746 | { 16410, 7, 1, 0, 1431, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10268046819ULL }, // Inst #16410 = VPERMILPSZ256mi |
| 30747 | { 16409, 8, 1, 0, 1431, 0, 0, 4635, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x770268046819ULL }, // Inst #16409 = VPERMILPSZ256mbikz |
| 30748 | { 16408, 9, 1, 0, 1431, 0, 0, 4626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x730268046819ULL }, // Inst #16408 = VPERMILPSZ256mbik |
| 30749 | { 16407, 7, 1, 0, 1431, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x710268046819ULL }, // Inst #16407 = VPERMILPSZ256mbi |
| 30750 | { 16406, 4, 1, 0, 1136, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa68668004829ULL }, // Inst #16406 = VPERMILPSZ128rrkz |
| 30751 | { 16405, 5, 1, 0, 1136, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa28668004829ULL }, // Inst #16405 = VPERMILPSZ128rrk |
| 30752 | { 16404, 3, 1, 0, 1136, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08668004829ULL }, // Inst #16404 = VPERMILPSZ128rr |
| 30753 | { 16403, 8, 1, 0, 1429, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68668004819ULL }, // Inst #16403 = VPERMILPSZ128rmkz |
| 30754 | { 16402, 9, 1, 0, 1429, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28668004819ULL }, // Inst #16402 = VPERMILPSZ128rmk |
| 30755 | { 16401, 8, 1, 0, 1429, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x768668004819ULL }, // Inst #16401 = VPERMILPSZ128rmbkz |
| 30756 | { 16400, 9, 1, 0, 1429, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x728668004819ULL }, // Inst #16400 = VPERMILPSZ128rmbk |
| 30757 | { 16399, 7, 1, 0, 1429, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x708668004819ULL }, // Inst #16399 = VPERMILPSZ128rmb |
| 30758 | { 16398, 7, 1, 0, 1429, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08668004819ULL }, // Inst #16398 = VPERMILPSZ128rm |
| 30759 | { 16397, 4, 1, 0, 1417, 0, 0, 3316, X86ImpOpBase + 0, 0, 0xa60268046829ULL }, // Inst #16397 = VPERMILPSZ128rikz |
| 30760 | { 16396, 5, 1, 0, 1417, 0, 0, 3311, X86ImpOpBase + 0, 0, 0xa20268046829ULL }, // Inst #16396 = VPERMILPSZ128rik |
| 30761 | { 16395, 3, 1, 0, 1417, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa00268046829ULL }, // Inst #16395 = VPERMILPSZ128ri |
| 30762 | { 16394, 8, 1, 0, 1428, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60268046819ULL }, // Inst #16394 = VPERMILPSZ128mikz |
| 30763 | { 16393, 9, 1, 0, 1428, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa20268046819ULL }, // Inst #16393 = VPERMILPSZ128mik |
| 30764 | { 16392, 7, 1, 0, 1428, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa00268046819ULL }, // Inst #16392 = VPERMILPSZ128mi |
| 30765 | { 16391, 8, 1, 0, 1428, 0, 0, 4618, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x760268046819ULL }, // Inst #16391 = VPERMILPSZ128mbikz |
| 30766 | { 16390, 9, 1, 0, 1428, 0, 0, 4609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x720268046819ULL }, // Inst #16390 = VPERMILPSZ128mbik |
| 30767 | { 16389, 7, 1, 0, 1428, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x700268046819ULL }, // Inst #16389 = VPERMILPSZ128mbi |
| 30768 | { 16388, 3, 1, 0, 1135, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x18628004829ULL }, // Inst #16388 = VPERMILPSYrr |
| 30769 | { 16387, 7, 1, 0, 1432, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18628004819ULL }, // Inst #16387 = VPERMILPSYrm |
| 30770 | { 16386, 3, 1, 0, 1418, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x10228046829ULL }, // Inst #16386 = VPERMILPSYri |
| 30771 | { 16385, 7, 1, 0, 1431, 0, 0, 5609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10228046819ULL }, // Inst #16385 = VPERMILPSYmi |
| 30772 | { 16384, 3, 1, 0, 1420, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x86b0004829ULL }, // Inst #16384 = VPERMILPDrr |
| 30773 | { 16383, 7, 1, 0, 1429, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x86b0004819ULL }, // Inst #16383 = VPERMILPDrm |
| 30774 | { 16382, 3, 1, 0, 1417, 0, 0, 566, X86ImpOpBase + 0, 0, 0x2b0046829ULL }, // Inst #16382 = VPERMILPDri |
| 30775 | { 16381, 7, 1, 0, 1672, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2b0046819ULL }, // Inst #16381 = VPERMILPDmi |
| 30776 | { 16380, 4, 1, 0, 1137, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xee86f0024829ULL }, // Inst #16380 = VPERMILPDZrrkz |
| 30777 | { 16379, 5, 1, 0, 1137, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xea86f0024829ULL }, // Inst #16379 = VPERMILPDZrrk |
| 30778 | { 16378, 3, 1, 0, 1137, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe886f0024829ULL }, // Inst #16378 = VPERMILPDZrr |
| 30779 | { 16377, 8, 1, 0, 523, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee86f0024819ULL }, // Inst #16377 = VPERMILPDZrmkz |
| 30780 | { 16376, 9, 1, 0, 523, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea86f0024819ULL }, // Inst #16376 = VPERMILPDZrmk |
| 30781 | { 16375, 8, 1, 0, 523, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e86f0024819ULL }, // Inst #16375 = VPERMILPDZrmbkz |
| 30782 | { 16374, 9, 1, 0, 523, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a86f0024819ULL }, // Inst #16374 = VPERMILPDZrmbk |
| 30783 | { 16373, 7, 1, 0, 523, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9886f0024819ULL }, // Inst #16373 = VPERMILPDZrmb |
| 30784 | { 16372, 7, 1, 0, 523, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe886f0024819ULL }, // Inst #16372 = VPERMILPDZrm |
| 30785 | { 16371, 4, 1, 0, 475, 0, 0, 4605, X86ImpOpBase + 0, 0, 0xee02f0066829ULL }, // Inst #16371 = VPERMILPDZrikz |
| 30786 | { 16370, 5, 1, 0, 475, 0, 0, 4600, X86ImpOpBase + 0, 0, 0xea02f0066829ULL }, // Inst #16370 = VPERMILPDZrik |
| 30787 | { 16369, 3, 1, 0, 475, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe802f0066829ULL }, // Inst #16369 = VPERMILPDZri |
| 30788 | { 16368, 8, 1, 0, 474, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee02f0066819ULL }, // Inst #16368 = VPERMILPDZmikz |
| 30789 | { 16367, 9, 1, 0, 474, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea02f0066819ULL }, // Inst #16367 = VPERMILPDZmik |
| 30790 | { 16366, 7, 1, 0, 474, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe802f0066819ULL }, // Inst #16366 = VPERMILPDZmi |
| 30791 | { 16365, 8, 1, 0, 474, 0, 0, 4592, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e02f0066819ULL }, // Inst #16365 = VPERMILPDZmbikz |
| 30792 | { 16364, 9, 1, 0, 474, 0, 0, 4583, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a02f0066819ULL }, // Inst #16364 = VPERMILPDZmbik |
| 30793 | { 16363, 7, 1, 0, 474, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9802f0066819ULL }, // Inst #16363 = VPERMILPDZmbi |
| 30794 | { 16362, 4, 1, 0, 1135, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc786f0024829ULL }, // Inst #16362 = VPERMILPDZ256rrkz |
| 30795 | { 16361, 5, 1, 0, 1135, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc386f0024829ULL }, // Inst #16361 = VPERMILPDZ256rrk |
| 30796 | { 16360, 3, 1, 0, 1135, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc186f0024829ULL }, // Inst #16360 = VPERMILPDZ256rr |
| 30797 | { 16359, 8, 1, 0, 1432, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc786f0024819ULL }, // Inst #16359 = VPERMILPDZ256rmkz |
| 30798 | { 16358, 9, 1, 0, 1432, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc386f0024819ULL }, // Inst #16358 = VPERMILPDZ256rmk |
| 30799 | { 16357, 8, 1, 0, 1432, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9786f0024819ULL }, // Inst #16357 = VPERMILPDZ256rmbkz |
| 30800 | { 16356, 9, 1, 0, 1432, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9386f0024819ULL }, // Inst #16356 = VPERMILPDZ256rmbk |
| 30801 | { 16355, 7, 1, 0, 1432, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9186f0024819ULL }, // Inst #16355 = VPERMILPDZ256rmb |
| 30802 | { 16354, 7, 1, 0, 1432, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc186f0024819ULL }, // Inst #16354 = VPERMILPDZ256rm |
| 30803 | { 16353, 4, 1, 0, 1418, 0, 0, 4579, X86ImpOpBase + 0, 0, 0xc702f0066829ULL }, // Inst #16353 = VPERMILPDZ256rikz |
| 30804 | { 16352, 5, 1, 0, 1418, 0, 0, 4574, X86ImpOpBase + 0, 0, 0xc302f0066829ULL }, // Inst #16352 = VPERMILPDZ256rik |
| 30805 | { 16351, 3, 1, 0, 1418, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc102f0066829ULL }, // Inst #16351 = VPERMILPDZ256ri |
| 30806 | { 16350, 8, 1, 0, 1431, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc702f0066819ULL }, // Inst #16350 = VPERMILPDZ256mikz |
| 30807 | { 16349, 9, 1, 0, 1431, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc302f0066819ULL }, // Inst #16349 = VPERMILPDZ256mik |
| 30808 | { 16348, 7, 1, 0, 1431, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc102f0066819ULL }, // Inst #16348 = VPERMILPDZ256mi |
| 30809 | { 16347, 8, 1, 0, 1431, 0, 0, 4566, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9702f0066819ULL }, // Inst #16347 = VPERMILPDZ256mbikz |
| 30810 | { 16346, 9, 1, 0, 1431, 0, 0, 4557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9302f0066819ULL }, // Inst #16346 = VPERMILPDZ256mbik |
| 30811 | { 16345, 7, 1, 0, 1431, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9102f0066819ULL }, // Inst #16345 = VPERMILPDZ256mbi |
| 30812 | { 16344, 4, 1, 0, 1136, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa686f0024829ULL }, // Inst #16344 = VPERMILPDZ128rrkz |
| 30813 | { 16343, 5, 1, 0, 1136, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa286f0024829ULL }, // Inst #16343 = VPERMILPDZ128rrk |
| 30814 | { 16342, 3, 1, 0, 1136, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa086f0024829ULL }, // Inst #16342 = VPERMILPDZ128rr |
| 30815 | { 16341, 8, 1, 0, 1429, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa686f0024819ULL }, // Inst #16341 = VPERMILPDZ128rmkz |
| 30816 | { 16340, 9, 1, 0, 1429, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa286f0024819ULL }, // Inst #16340 = VPERMILPDZ128rmk |
| 30817 | { 16339, 8, 1, 0, 1429, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9686f0024819ULL }, // Inst #16339 = VPERMILPDZ128rmbkz |
| 30818 | { 16338, 9, 1, 0, 1429, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9286f0024819ULL }, // Inst #16338 = VPERMILPDZ128rmbk |
| 30819 | { 16337, 7, 1, 0, 1429, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9086f0024819ULL }, // Inst #16337 = VPERMILPDZ128rmb |
| 30820 | { 16336, 7, 1, 0, 1429, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa086f0024819ULL }, // Inst #16336 = VPERMILPDZ128rm |
| 30821 | { 16335, 4, 1, 0, 1417, 0, 0, 4553, X86ImpOpBase + 0, 0, 0xa602f0066829ULL }, // Inst #16335 = VPERMILPDZ128rikz |
| 30822 | { 16334, 5, 1, 0, 1417, 0, 0, 4548, X86ImpOpBase + 0, 0, 0xa202f0066829ULL }, // Inst #16334 = VPERMILPDZ128rik |
| 30823 | { 16333, 3, 1, 0, 1417, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa002f0066829ULL }, // Inst #16333 = VPERMILPDZ128ri |
| 30824 | { 16332, 8, 1, 0, 1428, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa602f0066819ULL }, // Inst #16332 = VPERMILPDZ128mikz |
| 30825 | { 16331, 9, 1, 0, 1428, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa202f0066819ULL }, // Inst #16331 = VPERMILPDZ128mik |
| 30826 | { 16330, 7, 1, 0, 1428, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa002f0066819ULL }, // Inst #16330 = VPERMILPDZ128mi |
| 30827 | { 16329, 8, 1, 0, 1428, 0, 0, 4540, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9602f0066819ULL }, // Inst #16329 = VPERMILPDZ128mbikz |
| 30828 | { 16328, 9, 1, 0, 1428, 0, 0, 4531, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9202f0066819ULL }, // Inst #16328 = VPERMILPDZ128mbik |
| 30829 | { 16327, 7, 1, 0, 1428, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9002f0066819ULL }, // Inst #16327 = VPERMILPDZ128mbi |
| 30830 | { 16326, 3, 1, 0, 1135, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x186b0004829ULL }, // Inst #16326 = VPERMILPDYrr |
| 30831 | { 16325, 7, 1, 0, 1432, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x186b0004819ULL }, // Inst #16325 = VPERMILPDYrm |
| 30832 | { 16324, 3, 1, 0, 1418, 0, 0, 5616, X86ImpOpBase + 0, 0, 0x102b0046829ULL }, // Inst #16324 = VPERMILPDYri |
| 30833 | { 16323, 7, 1, 0, 1431, 0, 0, 5609, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x102b0046819ULL }, // Inst #16323 = VPERMILPDYmi |
| 30834 | { 16322, 5, 1, 0, 520, 0, 0, 5604, X86ImpOpBase + 0, 0, 0xa4280e682bULL }, // Inst #16322 = VPERMIL2PSrr_REV |
| 30835 | { 16321, 5, 1, 0, 520, 0, 0, 5604, X86ImpOpBase + 0, 0, 0xa4280c6829ULL }, // Inst #16321 = VPERMIL2PSrr |
| 30836 | { 16320, 9, 1, 0, 519, 0, 0, 5595, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa4280e681bULL }, // Inst #16320 = VPERMIL2PSrm |
| 30837 | { 16319, 9, 1, 0, 518, 0, 0, 5586, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa4280c6819ULL }, // Inst #16319 = VPERMIL2PSmr |
| 30838 | { 16318, 5, 1, 0, 517, 0, 0, 5581, X86ImpOpBase + 0, 0, 0x1a4280e682bULL }, // Inst #16318 = VPERMIL2PSYrr_REV |
| 30839 | { 16317, 5, 1, 0, 517, 0, 0, 5581, X86ImpOpBase + 0, 0, 0x1a4280c6829ULL }, // Inst #16317 = VPERMIL2PSYrr |
| 30840 | { 16316, 9, 1, 0, 516, 0, 0, 5572, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a4280e681bULL }, // Inst #16316 = VPERMIL2PSYrm |
| 30841 | { 16315, 9, 1, 0, 515, 0, 0, 5563, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a4280c6819ULL }, // Inst #16315 = VPERMIL2PSYmr |
| 30842 | { 16314, 5, 1, 0, 520, 0, 0, 5604, X86ImpOpBase + 0, 0, 0xa4b00e682bULL }, // Inst #16314 = VPERMIL2PDrr_REV |
| 30843 | { 16313, 5, 1, 0, 520, 0, 0, 5604, X86ImpOpBase + 0, 0, 0xa4b00c6829ULL }, // Inst #16313 = VPERMIL2PDrr |
| 30844 | { 16312, 9, 1, 0, 519, 0, 0, 5595, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa4b00e681bULL }, // Inst #16312 = VPERMIL2PDrm |
| 30845 | { 16311, 9, 1, 0, 518, 0, 0, 5586, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa4b00c6819ULL }, // Inst #16311 = VPERMIL2PDmr |
| 30846 | { 16310, 5, 1, 0, 517, 0, 0, 5581, X86ImpOpBase + 0, 0, 0x1a4b00e682bULL }, // Inst #16310 = VPERMIL2PDYrr_REV |
| 30847 | { 16309, 5, 1, 0, 517, 0, 0, 5581, X86ImpOpBase + 0, 0, 0x1a4b00c6829ULL }, // Inst #16309 = VPERMIL2PDYrr |
| 30848 | { 16308, 9, 1, 0, 516, 0, 0, 5572, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a4b00e681bULL }, // Inst #16308 = VPERMIL2PDYrm |
| 30849 | { 16307, 9, 1, 0, 515, 0, 0, 5563, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a4b00c6819ULL }, // Inst #16307 = VPERMIL2PDYmr |
| 30850 | { 16306, 5, 1, 0, 1309, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebaf8024829ULL }, // Inst #16306 = VPERMI2WZrrkz |
| 30851 | { 16305, 5, 1, 0, 1309, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeabaf8024829ULL }, // Inst #16305 = VPERMI2WZrrk |
| 30852 | { 16304, 4, 1, 0, 2335, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8baf8024829ULL }, // Inst #16304 = VPERMI2WZrr |
| 30853 | { 16303, 9, 1, 0, 2341, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebaf8024819ULL }, // Inst #16303 = VPERMI2WZrmkz |
| 30854 | { 16302, 9, 1, 0, 2341, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabaf8024819ULL }, // Inst #16302 = VPERMI2WZrmk |
| 30855 | { 16301, 8, 1, 0, 2340, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8baf8024819ULL }, // Inst #16301 = VPERMI2WZrm |
| 30856 | { 16300, 5, 1, 0, 1308, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7baf8024829ULL }, // Inst #16300 = VPERMI2WZ256rrkz |
| 30857 | { 16299, 5, 1, 0, 1308, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3baf8024829ULL }, // Inst #16299 = VPERMI2WZ256rrk |
| 30858 | { 16298, 4, 1, 0, 2325, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1baf8024829ULL }, // Inst #16298 = VPERMI2WZ256rr |
| 30859 | { 16297, 9, 1, 0, 2339, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7baf8024819ULL }, // Inst #16297 = VPERMI2WZ256rmkz |
| 30860 | { 16296, 9, 1, 0, 2339, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3baf8024819ULL }, // Inst #16296 = VPERMI2WZ256rmk |
| 30861 | { 16295, 8, 1, 0, 2338, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1baf8024819ULL }, // Inst #16295 = VPERMI2WZ256rm |
| 30862 | { 16294, 5, 1, 0, 1307, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6baf8024829ULL }, // Inst #16294 = VPERMI2WZ128rrkz |
| 30863 | { 16293, 5, 1, 0, 1307, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2baf8024829ULL }, // Inst #16293 = VPERMI2WZ128rrk |
| 30864 | { 16292, 4, 1, 0, 2324, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0baf8024829ULL }, // Inst #16292 = VPERMI2WZ128rr |
| 30865 | { 16291, 9, 1, 0, 2336, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6baf8024819ULL }, // Inst #16291 = VPERMI2WZ128rmkz |
| 30866 | { 16290, 9, 1, 0, 2336, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2baf8024819ULL }, // Inst #16290 = VPERMI2WZ128rmk |
| 30867 | { 16289, 8, 1, 0, 2328, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0baf8024819ULL }, // Inst #16289 = VPERMI2WZ128rm |
| 30868 | { 16288, 5, 1, 0, 1730, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebb78024829ULL }, // Inst #16288 = VPERMI2QZrrkz |
| 30869 | { 16287, 5, 1, 0, 1730, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeabb78024829ULL }, // Inst #16287 = VPERMI2QZrrk |
| 30870 | { 16286, 4, 1, 0, 1730, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bb78024829ULL }, // Inst #16286 = VPERMI2QZrr |
| 30871 | { 16285, 9, 1, 0, 439, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebb78024819ULL }, // Inst #16285 = VPERMI2QZrmkz |
| 30872 | { 16284, 9, 1, 0, 439, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabb78024819ULL }, // Inst #16284 = VPERMI2QZrmk |
| 30873 | { 16283, 9, 1, 0, 439, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9ebb78024819ULL }, // Inst #16283 = VPERMI2QZrmbkz |
| 30874 | { 16282, 9, 1, 0, 439, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9abb78024819ULL }, // Inst #16282 = VPERMI2QZrmbk |
| 30875 | { 16281, 8, 1, 0, 439, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x98bb78024819ULL }, // Inst #16281 = VPERMI2QZrmb |
| 30876 | { 16280, 8, 1, 0, 439, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bb78024819ULL }, // Inst #16280 = VPERMI2QZrm |
| 30877 | { 16279, 5, 1, 0, 1729, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7bb78024829ULL }, // Inst #16279 = VPERMI2QZ256rrkz |
| 30878 | { 16278, 5, 1, 0, 1729, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3bb78024829ULL }, // Inst #16278 = VPERMI2QZ256rrk |
| 30879 | { 16277, 4, 1, 0, 1729, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bb78024829ULL }, // Inst #16277 = VPERMI2QZ256rr |
| 30880 | { 16276, 9, 1, 0, 439, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bb78024819ULL }, // Inst #16276 = VPERMI2QZ256rmkz |
| 30881 | { 16275, 9, 1, 0, 439, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bb78024819ULL }, // Inst #16275 = VPERMI2QZ256rmk |
| 30882 | { 16274, 9, 1, 0, 439, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x97bb78024819ULL }, // Inst #16274 = VPERMI2QZ256rmbkz |
| 30883 | { 16273, 9, 1, 0, 439, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93bb78024819ULL }, // Inst #16273 = VPERMI2QZ256rmbk |
| 30884 | { 16272, 8, 1, 0, 439, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x91bb78024819ULL }, // Inst #16272 = VPERMI2QZ256rmb |
| 30885 | { 16271, 8, 1, 0, 439, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bb78024819ULL }, // Inst #16271 = VPERMI2QZ256rm |
| 30886 | { 16270, 5, 1, 0, 1732, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6bb78024829ULL }, // Inst #16270 = VPERMI2QZ128rrkz |
| 30887 | { 16269, 5, 1, 0, 1732, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2bb78024829ULL }, // Inst #16269 = VPERMI2QZ128rrk |
| 30888 | { 16268, 4, 1, 0, 1732, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bb78024829ULL }, // Inst #16268 = VPERMI2QZ128rr |
| 30889 | { 16267, 9, 1, 0, 1339, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bb78024819ULL }, // Inst #16267 = VPERMI2QZ128rmkz |
| 30890 | { 16266, 9, 1, 0, 1339, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bb78024819ULL }, // Inst #16266 = VPERMI2QZ128rmk |
| 30891 | { 16265, 9, 1, 0, 1339, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x96bb78024819ULL }, // Inst #16265 = VPERMI2QZ128rmbkz |
| 30892 | { 16264, 9, 1, 0, 1339, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92bb78024819ULL }, // Inst #16264 = VPERMI2QZ128rmbk |
| 30893 | { 16263, 8, 1, 0, 1339, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x90bb78024819ULL }, // Inst #16263 = VPERMI2QZ128rmb |
| 30894 | { 16262, 8, 1, 0, 1339, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bb78024819ULL }, // Inst #16262 = VPERMI2QZ128rm |
| 30895 | { 16261, 5, 1, 0, 1143, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebbe8004829ULL }, // Inst #16261 = VPERMI2PSZrrkz |
| 30896 | { 16260, 5, 1, 0, 1143, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeabbe8004829ULL }, // Inst #16260 = VPERMI2PSZrrk |
| 30897 | { 16259, 4, 1, 0, 1143, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bbe8004829ULL }, // Inst #16259 = VPERMI2PSZrr |
| 30898 | { 16258, 9, 1, 0, 513, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebbe8004819ULL }, // Inst #16258 = VPERMI2PSZrmkz |
| 30899 | { 16257, 9, 1, 0, 513, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabbe8004819ULL }, // Inst #16257 = VPERMI2PSZrmk |
| 30900 | { 16256, 9, 1, 0, 513, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7ebbe8004819ULL }, // Inst #16256 = VPERMI2PSZrmbkz |
| 30901 | { 16255, 9, 1, 0, 513, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7abbe8004819ULL }, // Inst #16255 = VPERMI2PSZrmbk |
| 30902 | { 16254, 8, 1, 0, 513, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x78bbe8004819ULL }, // Inst #16254 = VPERMI2PSZrmb |
| 30903 | { 16253, 8, 1, 0, 513, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bbe8004819ULL }, // Inst #16253 = VPERMI2PSZrm |
| 30904 | { 16252, 5, 1, 0, 1141, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7bbe8004829ULL }, // Inst #16252 = VPERMI2PSZ256rrkz |
| 30905 | { 16251, 5, 1, 0, 1141, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3bbe8004829ULL }, // Inst #16251 = VPERMI2PSZ256rrk |
| 30906 | { 16250, 4, 1, 0, 1141, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bbe8004829ULL }, // Inst #16250 = VPERMI2PSZ256rr |
| 30907 | { 16249, 9, 1, 0, 513, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bbe8004819ULL }, // Inst #16249 = VPERMI2PSZ256rmkz |
| 30908 | { 16248, 9, 1, 0, 513, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bbe8004819ULL }, // Inst #16248 = VPERMI2PSZ256rmk |
| 30909 | { 16247, 9, 1, 0, 513, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x77bbe8004819ULL }, // Inst #16247 = VPERMI2PSZ256rmbkz |
| 30910 | { 16246, 9, 1, 0, 513, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73bbe8004819ULL }, // Inst #16246 = VPERMI2PSZ256rmbk |
| 30911 | { 16245, 8, 1, 0, 513, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x71bbe8004819ULL }, // Inst #16245 = VPERMI2PSZ256rmb |
| 30912 | { 16244, 8, 1, 0, 513, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bbe8004819ULL }, // Inst #16244 = VPERMI2PSZ256rm |
| 30913 | { 16243, 5, 1, 0, 1138, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6bbe8004829ULL }, // Inst #16243 = VPERMI2PSZ128rrkz |
| 30914 | { 16242, 5, 1, 0, 1138, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2bbe8004829ULL }, // Inst #16242 = VPERMI2PSZ128rrk |
| 30915 | { 16241, 4, 1, 0, 1138, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bbe8004829ULL }, // Inst #16241 = VPERMI2PSZ128rr |
| 30916 | { 16240, 9, 1, 0, 1340, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bbe8004819ULL }, // Inst #16240 = VPERMI2PSZ128rmkz |
| 30917 | { 16239, 9, 1, 0, 1340, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bbe8004819ULL }, // Inst #16239 = VPERMI2PSZ128rmk |
| 30918 | { 16238, 9, 1, 0, 1340, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x76bbe8004819ULL }, // Inst #16238 = VPERMI2PSZ128rmbkz |
| 30919 | { 16237, 9, 1, 0, 1340, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72bbe8004819ULL }, // Inst #16237 = VPERMI2PSZ128rmbk |
| 30920 | { 16236, 8, 1, 0, 1340, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x70bbe8004819ULL }, // Inst #16236 = VPERMI2PSZ128rmb |
| 30921 | { 16235, 8, 1, 0, 1340, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bbe8004819ULL }, // Inst #16235 = VPERMI2PSZ128rm |
| 30922 | { 16234, 5, 1, 0, 1143, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebbf0024829ULL }, // Inst #16234 = VPERMI2PDZrrkz |
| 30923 | { 16233, 5, 1, 0, 1143, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeabbf0024829ULL }, // Inst #16233 = VPERMI2PDZrrk |
| 30924 | { 16232, 4, 1, 0, 1143, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bbf0024829ULL }, // Inst #16232 = VPERMI2PDZrr |
| 30925 | { 16231, 9, 1, 0, 513, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebbf0024819ULL }, // Inst #16231 = VPERMI2PDZrmkz |
| 30926 | { 16230, 9, 1, 0, 513, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabbf0024819ULL }, // Inst #16230 = VPERMI2PDZrmk |
| 30927 | { 16229, 9, 1, 0, 513, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9ebbf0024819ULL }, // Inst #16229 = VPERMI2PDZrmbkz |
| 30928 | { 16228, 9, 1, 0, 513, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9abbf0024819ULL }, // Inst #16228 = VPERMI2PDZrmbk |
| 30929 | { 16227, 8, 1, 0, 513, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x98bbf0024819ULL }, // Inst #16227 = VPERMI2PDZrmb |
| 30930 | { 16226, 8, 1, 0, 513, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bbf0024819ULL }, // Inst #16226 = VPERMI2PDZrm |
| 30931 | { 16225, 5, 1, 0, 1141, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7bbf0024829ULL }, // Inst #16225 = VPERMI2PDZ256rrkz |
| 30932 | { 16224, 5, 1, 0, 1141, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3bbf0024829ULL }, // Inst #16224 = VPERMI2PDZ256rrk |
| 30933 | { 16223, 4, 1, 0, 1141, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bbf0024829ULL }, // Inst #16223 = VPERMI2PDZ256rr |
| 30934 | { 16222, 9, 1, 0, 513, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bbf0024819ULL }, // Inst #16222 = VPERMI2PDZ256rmkz |
| 30935 | { 16221, 9, 1, 0, 513, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bbf0024819ULL }, // Inst #16221 = VPERMI2PDZ256rmk |
| 30936 | { 16220, 9, 1, 0, 513, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x97bbf0024819ULL }, // Inst #16220 = VPERMI2PDZ256rmbkz |
| 30937 | { 16219, 9, 1, 0, 513, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93bbf0024819ULL }, // Inst #16219 = VPERMI2PDZ256rmbk |
| 30938 | { 16218, 8, 1, 0, 513, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x91bbf0024819ULL }, // Inst #16218 = VPERMI2PDZ256rmb |
| 30939 | { 16217, 8, 1, 0, 513, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bbf0024819ULL }, // Inst #16217 = VPERMI2PDZ256rm |
| 30940 | { 16216, 5, 1, 0, 1138, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6bbf0024829ULL }, // Inst #16216 = VPERMI2PDZ128rrkz |
| 30941 | { 16215, 5, 1, 0, 1138, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2bbf0024829ULL }, // Inst #16215 = VPERMI2PDZ128rrk |
| 30942 | { 16214, 4, 1, 0, 1138, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bbf0024829ULL }, // Inst #16214 = VPERMI2PDZ128rr |
| 30943 | { 16213, 9, 1, 0, 1340, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bbf0024819ULL }, // Inst #16213 = VPERMI2PDZ128rmkz |
| 30944 | { 16212, 9, 1, 0, 1340, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bbf0024819ULL }, // Inst #16212 = VPERMI2PDZ128rmk |
| 30945 | { 16211, 9, 1, 0, 1340, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x96bbf0024819ULL }, // Inst #16211 = VPERMI2PDZ128rmbkz |
| 30946 | { 16210, 9, 1, 0, 1340, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92bbf0024819ULL }, // Inst #16210 = VPERMI2PDZ128rmbk |
| 30947 | { 16209, 8, 1, 0, 1340, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x90bbf0024819ULL }, // Inst #16209 = VPERMI2PDZ128rmb |
| 30948 | { 16208, 8, 1, 0, 1340, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bbf0024819ULL }, // Inst #16208 = VPERMI2PDZ128rm |
| 30949 | { 16207, 5, 1, 0, 1730, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebb78004829ULL }, // Inst #16207 = VPERMI2DZrrkz |
| 30950 | { 16206, 5, 1, 0, 1730, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeabb78004829ULL }, // Inst #16206 = VPERMI2DZrrk |
| 30951 | { 16205, 4, 1, 0, 1730, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bb78004829ULL }, // Inst #16205 = VPERMI2DZrr |
| 30952 | { 16204, 9, 1, 0, 439, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebb78004819ULL }, // Inst #16204 = VPERMI2DZrmkz |
| 30953 | { 16203, 9, 1, 0, 439, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabb78004819ULL }, // Inst #16203 = VPERMI2DZrmk |
| 30954 | { 16202, 9, 1, 0, 439, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7ebb78004819ULL }, // Inst #16202 = VPERMI2DZrmbkz |
| 30955 | { 16201, 9, 1, 0, 439, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7abb78004819ULL }, // Inst #16201 = VPERMI2DZrmbk |
| 30956 | { 16200, 8, 1, 0, 439, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x78bb78004819ULL }, // Inst #16200 = VPERMI2DZrmb |
| 30957 | { 16199, 8, 1, 0, 439, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bb78004819ULL }, // Inst #16199 = VPERMI2DZrm |
| 30958 | { 16198, 5, 1, 0, 1729, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7bb78004829ULL }, // Inst #16198 = VPERMI2DZ256rrkz |
| 30959 | { 16197, 5, 1, 0, 1729, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3bb78004829ULL }, // Inst #16197 = VPERMI2DZ256rrk |
| 30960 | { 16196, 4, 1, 0, 1729, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bb78004829ULL }, // Inst #16196 = VPERMI2DZ256rr |
| 30961 | { 16195, 9, 1, 0, 439, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bb78004819ULL }, // Inst #16195 = VPERMI2DZ256rmkz |
| 30962 | { 16194, 9, 1, 0, 439, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bb78004819ULL }, // Inst #16194 = VPERMI2DZ256rmk |
| 30963 | { 16193, 9, 1, 0, 439, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x77bb78004819ULL }, // Inst #16193 = VPERMI2DZ256rmbkz |
| 30964 | { 16192, 9, 1, 0, 439, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73bb78004819ULL }, // Inst #16192 = VPERMI2DZ256rmbk |
| 30965 | { 16191, 8, 1, 0, 439, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x71bb78004819ULL }, // Inst #16191 = VPERMI2DZ256rmb |
| 30966 | { 16190, 8, 1, 0, 439, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bb78004819ULL }, // Inst #16190 = VPERMI2DZ256rm |
| 30967 | { 16189, 5, 1, 0, 1732, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6bb78004829ULL }, // Inst #16189 = VPERMI2DZ128rrkz |
| 30968 | { 16188, 5, 1, 0, 1732, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2bb78004829ULL }, // Inst #16188 = VPERMI2DZ128rrk |
| 30969 | { 16187, 4, 1, 0, 1732, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bb78004829ULL }, // Inst #16187 = VPERMI2DZ128rr |
| 30970 | { 16186, 9, 1, 0, 1339, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bb78004819ULL }, // Inst #16186 = VPERMI2DZ128rmkz |
| 30971 | { 16185, 9, 1, 0, 1339, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bb78004819ULL }, // Inst #16185 = VPERMI2DZ128rmk |
| 30972 | { 16184, 9, 1, 0, 1339, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x76bb78004819ULL }, // Inst #16184 = VPERMI2DZ128rmbkz |
| 30973 | { 16183, 9, 1, 0, 1339, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72bb78004819ULL }, // Inst #16183 = VPERMI2DZ128rmbk |
| 30974 | { 16182, 8, 1, 0, 1339, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x70bb78004819ULL }, // Inst #16182 = VPERMI2DZ128rmb |
| 30975 | { 16181, 8, 1, 0, 1339, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bb78004819ULL }, // Inst #16181 = VPERMI2DZ128rm |
| 30976 | { 16180, 5, 1, 0, 2334, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeebaf8004829ULL }, // Inst #16180 = VPERMI2BZrrkz |
| 30977 | { 16179, 5, 1, 0, 2334, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeabaf8004829ULL }, // Inst #16179 = VPERMI2BZrrk |
| 30978 | { 16178, 4, 1, 0, 2333, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8baf8004829ULL }, // Inst #16178 = VPERMI2BZrr |
| 30979 | { 16177, 9, 1, 0, 2331, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebaf8004819ULL }, // Inst #16177 = VPERMI2BZrmkz |
| 30980 | { 16176, 9, 1, 0, 2331, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabaf8004819ULL }, // Inst #16176 = VPERMI2BZrmk |
| 30981 | { 16175, 8, 1, 0, 2330, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8baf8004819ULL }, // Inst #16175 = VPERMI2BZrm |
| 30982 | { 16174, 5, 1, 0, 2323, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7baf8004829ULL }, // Inst #16174 = VPERMI2BZ256rrkz |
| 30983 | { 16173, 5, 1, 0, 2323, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3baf8004829ULL }, // Inst #16173 = VPERMI2BZ256rrk |
| 30984 | { 16172, 4, 1, 0, 2322, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1baf8004829ULL }, // Inst #16172 = VPERMI2BZ256rr |
| 30985 | { 16171, 9, 1, 0, 2327, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7baf8004819ULL }, // Inst #16171 = VPERMI2BZ256rmkz |
| 30986 | { 16170, 9, 1, 0, 2327, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3baf8004819ULL }, // Inst #16170 = VPERMI2BZ256rmk |
| 30987 | { 16169, 8, 1, 0, 2326, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1baf8004819ULL }, // Inst #16169 = VPERMI2BZ256rm |
| 30988 | { 16168, 5, 1, 0, 1139, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6baf8004829ULL }, // Inst #16168 = VPERMI2BZ128rrkz |
| 30989 | { 16167, 5, 1, 0, 1139, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2baf8004829ULL }, // Inst #16167 = VPERMI2BZ128rrk |
| 30990 | { 16166, 4, 1, 0, 2321, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0baf8004829ULL }, // Inst #16166 = VPERMI2BZ128rr |
| 30991 | { 16165, 9, 1, 0, 2319, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6baf8004819ULL }, // Inst #16165 = VPERMI2BZ128rmkz |
| 30992 | { 16164, 9, 1, 0, 2319, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2baf8004819ULL }, // Inst #16164 = VPERMI2BZ128rmk |
| 30993 | { 16163, 8, 1, 0, 2315, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0baf8004819ULL }, // Inst #16163 = VPERMI2BZ128rm |
| 30994 | { 16162, 4, 1, 0, 1730, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xee9b78004829ULL }, // Inst #16162 = VPERMDZrrkz |
| 30995 | { 16161, 5, 1, 0, 1730, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xea9b78004829ULL }, // Inst #16161 = VPERMDZrrk |
| 30996 | { 16160, 3, 1, 0, 1730, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe89b78004829ULL }, // Inst #16160 = VPERMDZrr |
| 30997 | { 16159, 8, 1, 0, 439, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee9b78004819ULL }, // Inst #16159 = VPERMDZrmkz |
| 30998 | { 16158, 9, 1, 0, 439, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9b78004819ULL }, // Inst #16158 = VPERMDZrmk |
| 30999 | { 16157, 8, 1, 0, 439, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e9b78004819ULL }, // Inst #16157 = VPERMDZrmbkz |
| 31000 | { 16156, 9, 1, 0, 439, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a9b78004819ULL }, // Inst #16156 = VPERMDZrmbk |
| 31001 | { 16155, 7, 1, 0, 439, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x789b78004819ULL }, // Inst #16155 = VPERMDZrmb |
| 31002 | { 16154, 7, 1, 0, 439, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89b78004819ULL }, // Inst #16154 = VPERMDZrm |
| 31003 | { 16153, 4, 1, 0, 1729, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc79b78004829ULL }, // Inst #16153 = VPERMDZ256rrkz |
| 31004 | { 16152, 5, 1, 0, 1729, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc39b78004829ULL }, // Inst #16152 = VPERMDZ256rrk |
| 31005 | { 16151, 3, 1, 0, 1729, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc19b78004829ULL }, // Inst #16151 = VPERMDZ256rr |
| 31006 | { 16150, 8, 1, 0, 439, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc79b78004819ULL }, // Inst #16150 = VPERMDZ256rmkz |
| 31007 | { 16149, 9, 1, 0, 439, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39b78004819ULL }, // Inst #16149 = VPERMDZ256rmk |
| 31008 | { 16148, 8, 1, 0, 439, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x779b78004819ULL }, // Inst #16148 = VPERMDZ256rmbkz |
| 31009 | { 16147, 9, 1, 0, 439, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x739b78004819ULL }, // Inst #16147 = VPERMDZ256rmbk |
| 31010 | { 16146, 7, 1, 0, 439, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x719b78004819ULL }, // Inst #16146 = VPERMDZ256rmb |
| 31011 | { 16145, 7, 1, 0, 439, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19b78004819ULL }, // Inst #16145 = VPERMDZ256rm |
| 31012 | { 16144, 3, 1, 0, 1068, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x19b38004829ULL }, // Inst #16144 = VPERMDYrr |
| 31013 | { 16143, 7, 1, 0, 1046, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19b38004819ULL }, // Inst #16143 = VPERMDYrm |
| 31014 | { 16142, 4, 1, 0, 2165, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeec6f8004829ULL }, // Inst #16142 = VPERMBZrrkz |
| 31015 | { 16141, 5, 1, 0, 2165, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeac6f8004829ULL }, // Inst #16141 = VPERMBZrrk |
| 31016 | { 16140, 3, 1, 0, 1730, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8c6f8004829ULL }, // Inst #16140 = VPERMBZrr |
| 31017 | { 16139, 8, 1, 0, 1887, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeec6f8004819ULL }, // Inst #16139 = VPERMBZrmkz |
| 31018 | { 16138, 9, 1, 0, 1887, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeac6f8004819ULL }, // Inst #16138 = VPERMBZrmk |
| 31019 | { 16137, 7, 1, 0, 439, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8c6f8004819ULL }, // Inst #16137 = VPERMBZrm |
| 31020 | { 16136, 4, 1, 0, 2164, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7c6f8004829ULL }, // Inst #16136 = VPERMBZ256rrkz |
| 31021 | { 16135, 5, 1, 0, 2164, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3c6f8004829ULL }, // Inst #16135 = VPERMBZ256rrk |
| 31022 | { 16134, 3, 1, 0, 1729, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1c6f8004829ULL }, // Inst #16134 = VPERMBZ256rr |
| 31023 | { 16133, 8, 1, 0, 1887, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7c6f8004819ULL }, // Inst #16133 = VPERMBZ256rmkz |
| 31024 | { 16132, 9, 1, 0, 1887, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3c6f8004819ULL }, // Inst #16132 = VPERMBZ256rmk |
| 31025 | { 16131, 7, 1, 0, 439, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1c6f8004819ULL }, // Inst #16131 = VPERMBZ256rm |
| 31026 | { 16130, 4, 1, 0, 2163, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6c6f8004829ULL }, // Inst #16130 = VPERMBZ128rrkz |
| 31027 | { 16129, 5, 1, 0, 2163, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2c6f8004829ULL }, // Inst #16129 = VPERMBZ128rrk |
| 31028 | { 16128, 3, 1, 0, 1728, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0c6f8004829ULL }, // Inst #16128 = VPERMBZ128rr |
| 31029 | { 16127, 8, 1, 0, 1887, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6c6f8004819ULL }, // Inst #16127 = VPERMBZ128rmkz |
| 31030 | { 16126, 9, 1, 0, 1887, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2c6f8004819ULL }, // Inst #16126 = VPERMBZ128rmk |
| 31031 | { 16125, 7, 1, 0, 1715, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0c6f8004819ULL }, // Inst #16125 = VPERMBZ128rm |
| 31032 | { 16124, 4, 1, 0, 959, 0, 0, 923, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a338046829ULL }, // Inst #16124 = VPERM2I128rri |
| 31033 | { 16123, 8, 1, 0, 961, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a338046819ULL }, // Inst #16123 = VPERM2I128rmi |
| 31034 | { 16122, 4, 1, 0, 958, 0, 0, 923, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x18328046829ULL }, // Inst #16122 = VPERM2F128rri |
| 31035 | { 16121, 8, 1, 0, 960, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18328046819ULL }, // Inst #16121 = VPERM2F128rmi |
| 31036 | { 16120, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe920004029ULL }, // Inst #16120 = VPDPWUUDrr |
| 31037 | { 16119, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe920004019ULL }, // Inst #16119 = VPDPWUUDrm |
| 31038 | { 16118, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeee978004029ULL }, // Inst #16118 = VPDPWUUDZrkz |
| 31039 | { 16117, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeae978004029ULL }, // Inst #16117 = VPDPWUUDZrk |
| 31040 | { 16116, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8e978004029ULL }, // Inst #16116 = VPDPWUUDZr |
| 31041 | { 16115, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee978004019ULL }, // Inst #16115 = VPDPWUUDZmkz |
| 31042 | { 16114, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae978004019ULL }, // Inst #16114 = VPDPWUUDZmk |
| 31043 | { 16113, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ee978004019ULL }, // Inst #16113 = VPDPWUUDZmbkz |
| 31044 | { 16112, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ae978004019ULL }, // Inst #16112 = VPDPWUUDZmbk |
| 31045 | { 16111, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78e978004019ULL }, // Inst #16111 = VPDPWUUDZmb |
| 31046 | { 16110, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e978004019ULL }, // Inst #16110 = VPDPWUUDZm |
| 31047 | { 16109, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7e978004029ULL }, // Inst #16109 = VPDPWUUDZ256rkz |
| 31048 | { 16108, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3e978004029ULL }, // Inst #16108 = VPDPWUUDZ256rk |
| 31049 | { 16107, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1e978004029ULL }, // Inst #16107 = VPDPWUUDZ256r |
| 31050 | { 16106, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e978004019ULL }, // Inst #16106 = VPDPWUUDZ256mkz |
| 31051 | { 16105, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e978004019ULL }, // Inst #16105 = VPDPWUUDZ256mk |
| 31052 | { 16104, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77e978004019ULL }, // Inst #16104 = VPDPWUUDZ256mbkz |
| 31053 | { 16103, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73e978004019ULL }, // Inst #16103 = VPDPWUUDZ256mbk |
| 31054 | { 16102, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71e978004019ULL }, // Inst #16102 = VPDPWUUDZ256mb |
| 31055 | { 16101, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e978004019ULL }, // Inst #16101 = VPDPWUUDZ256m |
| 31056 | { 16100, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6e978004029ULL }, // Inst #16100 = VPDPWUUDZ128rkz |
| 31057 | { 16099, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2e978004029ULL }, // Inst #16099 = VPDPWUUDZ128rk |
| 31058 | { 16098, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0e978004029ULL }, // Inst #16098 = VPDPWUUDZ128r |
| 31059 | { 16097, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e978004019ULL }, // Inst #16097 = VPDPWUUDZ128mkz |
| 31060 | { 16096, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e978004019ULL }, // Inst #16096 = VPDPWUUDZ128mk |
| 31061 | { 16095, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76e978004019ULL }, // Inst #16095 = VPDPWUUDZ128mbkz |
| 31062 | { 16094, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72e978004019ULL }, // Inst #16094 = VPDPWUUDZ128mbk |
| 31063 | { 16093, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70e978004019ULL }, // Inst #16093 = VPDPWUUDZ128mb |
| 31064 | { 16092, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e978004019ULL }, // Inst #16092 = VPDPWUUDZ128m |
| 31065 | { 16091, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1e920004029ULL }, // Inst #16091 = VPDPWUUDYrr |
| 31066 | { 16090, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e920004019ULL }, // Inst #16090 = VPDPWUUDYrm |
| 31067 | { 16089, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe9a0004029ULL }, // Inst #16089 = VPDPWUUDSrr |
| 31068 | { 16088, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe9a0004019ULL }, // Inst #16088 = VPDPWUUDSrm |
| 31069 | { 16087, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeee9f8004029ULL }, // Inst #16087 = VPDPWUUDSZrkz |
| 31070 | { 16086, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeae9f8004029ULL }, // Inst #16086 = VPDPWUUDSZrk |
| 31071 | { 16085, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8e9f8004029ULL }, // Inst #16085 = VPDPWUUDSZr |
| 31072 | { 16084, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee9f8004019ULL }, // Inst #16084 = VPDPWUUDSZmkz |
| 31073 | { 16083, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae9f8004019ULL }, // Inst #16083 = VPDPWUUDSZmk |
| 31074 | { 16082, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ee9f8004019ULL }, // Inst #16082 = VPDPWUUDSZmbkz |
| 31075 | { 16081, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ae9f8004019ULL }, // Inst #16081 = VPDPWUUDSZmbk |
| 31076 | { 16080, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78e9f8004019ULL }, // Inst #16080 = VPDPWUUDSZmb |
| 31077 | { 16079, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e9f8004019ULL }, // Inst #16079 = VPDPWUUDSZm |
| 31078 | { 16078, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7e9f8004029ULL }, // Inst #16078 = VPDPWUUDSZ256rkz |
| 31079 | { 16077, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3e9f8004029ULL }, // Inst #16077 = VPDPWUUDSZ256rk |
| 31080 | { 16076, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1e9f8004029ULL }, // Inst #16076 = VPDPWUUDSZ256r |
| 31081 | { 16075, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e9f8004019ULL }, // Inst #16075 = VPDPWUUDSZ256mkz |
| 31082 | { 16074, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e9f8004019ULL }, // Inst #16074 = VPDPWUUDSZ256mk |
| 31083 | { 16073, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77e9f8004019ULL }, // Inst #16073 = VPDPWUUDSZ256mbkz |
| 31084 | { 16072, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73e9f8004019ULL }, // Inst #16072 = VPDPWUUDSZ256mbk |
| 31085 | { 16071, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71e9f8004019ULL }, // Inst #16071 = VPDPWUUDSZ256mb |
| 31086 | { 16070, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e9f8004019ULL }, // Inst #16070 = VPDPWUUDSZ256m |
| 31087 | { 16069, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6e9f8004029ULL }, // Inst #16069 = VPDPWUUDSZ128rkz |
| 31088 | { 16068, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2e9f8004029ULL }, // Inst #16068 = VPDPWUUDSZ128rk |
| 31089 | { 16067, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0e9f8004029ULL }, // Inst #16067 = VPDPWUUDSZ128r |
| 31090 | { 16066, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e9f8004019ULL }, // Inst #16066 = VPDPWUUDSZ128mkz |
| 31091 | { 16065, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e9f8004019ULL }, // Inst #16065 = VPDPWUUDSZ128mk |
| 31092 | { 16064, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76e9f8004019ULL }, // Inst #16064 = VPDPWUUDSZ128mbkz |
| 31093 | { 16063, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72e9f8004019ULL }, // Inst #16063 = VPDPWUUDSZ128mbk |
| 31094 | { 16062, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70e9f8004019ULL }, // Inst #16062 = VPDPWUUDSZ128mb |
| 31095 | { 16061, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e9f8004019ULL }, // Inst #16061 = VPDPWUUDSZ128m |
| 31096 | { 16060, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1e9a0004029ULL }, // Inst #16060 = VPDPWUUDSYrr |
| 31097 | { 16059, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e9a0004019ULL }, // Inst #16059 = VPDPWUUDSYrm |
| 31098 | { 16058, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0, 0xe920004829ULL }, // Inst #16058 = VPDPWUSDrr |
| 31099 | { 16057, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe920004819ULL }, // Inst #16057 = VPDPWUSDrm |
| 31100 | { 16056, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeee978004829ULL }, // Inst #16056 = VPDPWUSDZrkz |
| 31101 | { 16055, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeae978004829ULL }, // Inst #16055 = VPDPWUSDZrk |
| 31102 | { 16054, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8e978004829ULL }, // Inst #16054 = VPDPWUSDZr |
| 31103 | { 16053, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee978004819ULL }, // Inst #16053 = VPDPWUSDZmkz |
| 31104 | { 16052, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae978004819ULL }, // Inst #16052 = VPDPWUSDZmk |
| 31105 | { 16051, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ee978004819ULL }, // Inst #16051 = VPDPWUSDZmbkz |
| 31106 | { 16050, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ae978004819ULL }, // Inst #16050 = VPDPWUSDZmbk |
| 31107 | { 16049, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78e978004819ULL }, // Inst #16049 = VPDPWUSDZmb |
| 31108 | { 16048, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e978004819ULL }, // Inst #16048 = VPDPWUSDZm |
| 31109 | { 16047, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7e978004829ULL }, // Inst #16047 = VPDPWUSDZ256rkz |
| 31110 | { 16046, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3e978004829ULL }, // Inst #16046 = VPDPWUSDZ256rk |
| 31111 | { 16045, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1e978004829ULL }, // Inst #16045 = VPDPWUSDZ256r |
| 31112 | { 16044, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e978004819ULL }, // Inst #16044 = VPDPWUSDZ256mkz |
| 31113 | { 16043, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e978004819ULL }, // Inst #16043 = VPDPWUSDZ256mk |
| 31114 | { 16042, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77e978004819ULL }, // Inst #16042 = VPDPWUSDZ256mbkz |
| 31115 | { 16041, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73e978004819ULL }, // Inst #16041 = VPDPWUSDZ256mbk |
| 31116 | { 16040, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71e978004819ULL }, // Inst #16040 = VPDPWUSDZ256mb |
| 31117 | { 16039, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e978004819ULL }, // Inst #16039 = VPDPWUSDZ256m |
| 31118 | { 16038, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6e978004829ULL }, // Inst #16038 = VPDPWUSDZ128rkz |
| 31119 | { 16037, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2e978004829ULL }, // Inst #16037 = VPDPWUSDZ128rk |
| 31120 | { 16036, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0e978004829ULL }, // Inst #16036 = VPDPWUSDZ128r |
| 31121 | { 16035, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e978004819ULL }, // Inst #16035 = VPDPWUSDZ128mkz |
| 31122 | { 16034, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e978004819ULL }, // Inst #16034 = VPDPWUSDZ128mk |
| 31123 | { 16033, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76e978004819ULL }, // Inst #16033 = VPDPWUSDZ128mbkz |
| 31124 | { 16032, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72e978004819ULL }, // Inst #16032 = VPDPWUSDZ128mbk |
| 31125 | { 16031, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70e978004819ULL }, // Inst #16031 = VPDPWUSDZ128mb |
| 31126 | { 16030, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e978004819ULL }, // Inst #16030 = VPDPWUSDZ128m |
| 31127 | { 16029, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0, 0x1e920004829ULL }, // Inst #16029 = VPDPWUSDYrr |
| 31128 | { 16028, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e920004819ULL }, // Inst #16028 = VPDPWUSDYrm |
| 31129 | { 16027, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0, 0xe9a0004829ULL }, // Inst #16027 = VPDPWUSDSrr |
| 31130 | { 16026, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe9a0004819ULL }, // Inst #16026 = VPDPWUSDSrm |
| 31131 | { 16025, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeee9f8004829ULL }, // Inst #16025 = VPDPWUSDSZrkz |
| 31132 | { 16024, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeae9f8004829ULL }, // Inst #16024 = VPDPWUSDSZrk |
| 31133 | { 16023, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8e9f8004829ULL }, // Inst #16023 = VPDPWUSDSZr |
| 31134 | { 16022, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee9f8004819ULL }, // Inst #16022 = VPDPWUSDSZmkz |
| 31135 | { 16021, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae9f8004819ULL }, // Inst #16021 = VPDPWUSDSZmk |
| 31136 | { 16020, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ee9f8004819ULL }, // Inst #16020 = VPDPWUSDSZmbkz |
| 31137 | { 16019, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ae9f8004819ULL }, // Inst #16019 = VPDPWUSDSZmbk |
| 31138 | { 16018, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78e9f8004819ULL }, // Inst #16018 = VPDPWUSDSZmb |
| 31139 | { 16017, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e9f8004819ULL }, // Inst #16017 = VPDPWUSDSZm |
| 31140 | { 16016, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7e9f8004829ULL }, // Inst #16016 = VPDPWUSDSZ256rkz |
| 31141 | { 16015, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3e9f8004829ULL }, // Inst #16015 = VPDPWUSDSZ256rk |
| 31142 | { 16014, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1e9f8004829ULL }, // Inst #16014 = VPDPWUSDSZ256r |
| 31143 | { 16013, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e9f8004819ULL }, // Inst #16013 = VPDPWUSDSZ256mkz |
| 31144 | { 16012, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e9f8004819ULL }, // Inst #16012 = VPDPWUSDSZ256mk |
| 31145 | { 16011, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77e9f8004819ULL }, // Inst #16011 = VPDPWUSDSZ256mbkz |
| 31146 | { 16010, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73e9f8004819ULL }, // Inst #16010 = VPDPWUSDSZ256mbk |
| 31147 | { 16009, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71e9f8004819ULL }, // Inst #16009 = VPDPWUSDSZ256mb |
| 31148 | { 16008, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e9f8004819ULL }, // Inst #16008 = VPDPWUSDSZ256m |
| 31149 | { 16007, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6e9f8004829ULL }, // Inst #16007 = VPDPWUSDSZ128rkz |
| 31150 | { 16006, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2e9f8004829ULL }, // Inst #16006 = VPDPWUSDSZ128rk |
| 31151 | { 16005, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0e9f8004829ULL }, // Inst #16005 = VPDPWUSDSZ128r |
| 31152 | { 16004, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e9f8004819ULL }, // Inst #16004 = VPDPWUSDSZ128mkz |
| 31153 | { 16003, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e9f8004819ULL }, // Inst #16003 = VPDPWUSDSZ128mk |
| 31154 | { 16002, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76e9f8004819ULL }, // Inst #16002 = VPDPWUSDSZ128mbkz |
| 31155 | { 16001, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72e9f8004819ULL }, // Inst #16001 = VPDPWUSDSZ128mbk |
| 31156 | { 16000, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70e9f8004819ULL }, // Inst #16000 = VPDPWUSDSZ128mb |
| 31157 | { 15999, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e9f8004819ULL }, // Inst #15999 = VPDPWUSDSZ128m |
| 31158 | { 15998, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0, 0x1e9a0004829ULL }, // Inst #15998 = VPDPWUSDSYrr |
| 31159 | { 15997, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e9a0004819ULL }, // Inst #15997 = VPDPWUSDSYrm |
| 31160 | { 15996, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0, 0xe920005029ULL }, // Inst #15996 = VPDPWSUDrr |
| 31161 | { 15995, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe920005019ULL }, // Inst #15995 = VPDPWSUDrm |
| 31162 | { 15994, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeee978005029ULL }, // Inst #15994 = VPDPWSUDZrkz |
| 31163 | { 15993, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeae978005029ULL }, // Inst #15993 = VPDPWSUDZrk |
| 31164 | { 15992, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8e978005029ULL }, // Inst #15992 = VPDPWSUDZr |
| 31165 | { 15991, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee978005019ULL }, // Inst #15991 = VPDPWSUDZmkz |
| 31166 | { 15990, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae978005019ULL }, // Inst #15990 = VPDPWSUDZmk |
| 31167 | { 15989, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ee978005019ULL }, // Inst #15989 = VPDPWSUDZmbkz |
| 31168 | { 15988, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ae978005019ULL }, // Inst #15988 = VPDPWSUDZmbk |
| 31169 | { 15987, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78e978005019ULL }, // Inst #15987 = VPDPWSUDZmb |
| 31170 | { 15986, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e978005019ULL }, // Inst #15986 = VPDPWSUDZm |
| 31171 | { 15985, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7e978005029ULL }, // Inst #15985 = VPDPWSUDZ256rkz |
| 31172 | { 15984, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3e978005029ULL }, // Inst #15984 = VPDPWSUDZ256rk |
| 31173 | { 15983, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1e978005029ULL }, // Inst #15983 = VPDPWSUDZ256r |
| 31174 | { 15982, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e978005019ULL }, // Inst #15982 = VPDPWSUDZ256mkz |
| 31175 | { 15981, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e978005019ULL }, // Inst #15981 = VPDPWSUDZ256mk |
| 31176 | { 15980, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77e978005019ULL }, // Inst #15980 = VPDPWSUDZ256mbkz |
| 31177 | { 15979, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73e978005019ULL }, // Inst #15979 = VPDPWSUDZ256mbk |
| 31178 | { 15978, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71e978005019ULL }, // Inst #15978 = VPDPWSUDZ256mb |
| 31179 | { 15977, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e978005019ULL }, // Inst #15977 = VPDPWSUDZ256m |
| 31180 | { 15976, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6e978005029ULL }, // Inst #15976 = VPDPWSUDZ128rkz |
| 31181 | { 15975, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2e978005029ULL }, // Inst #15975 = VPDPWSUDZ128rk |
| 31182 | { 15974, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0e978005029ULL }, // Inst #15974 = VPDPWSUDZ128r |
| 31183 | { 15973, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e978005019ULL }, // Inst #15973 = VPDPWSUDZ128mkz |
| 31184 | { 15972, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e978005019ULL }, // Inst #15972 = VPDPWSUDZ128mk |
| 31185 | { 15971, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76e978005019ULL }, // Inst #15971 = VPDPWSUDZ128mbkz |
| 31186 | { 15970, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72e978005019ULL }, // Inst #15970 = VPDPWSUDZ128mbk |
| 31187 | { 15969, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70e978005019ULL }, // Inst #15969 = VPDPWSUDZ128mb |
| 31188 | { 15968, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e978005019ULL }, // Inst #15968 = VPDPWSUDZ128m |
| 31189 | { 15967, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0, 0x1e920005029ULL }, // Inst #15967 = VPDPWSUDYrr |
| 31190 | { 15966, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e920005019ULL }, // Inst #15966 = VPDPWSUDYrm |
| 31191 | { 15965, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0, 0xe9a0005029ULL }, // Inst #15965 = VPDPWSUDSrr |
| 31192 | { 15964, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe9a0005019ULL }, // Inst #15964 = VPDPWSUDSrm |
| 31193 | { 15963, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeee9f8005029ULL }, // Inst #15963 = VPDPWSUDSZrkz |
| 31194 | { 15962, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeae9f8005029ULL }, // Inst #15962 = VPDPWSUDSZrk |
| 31195 | { 15961, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8e9f8005029ULL }, // Inst #15961 = VPDPWSUDSZr |
| 31196 | { 15960, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee9f8005019ULL }, // Inst #15960 = VPDPWSUDSZmkz |
| 31197 | { 15959, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae9f8005019ULL }, // Inst #15959 = VPDPWSUDSZmk |
| 31198 | { 15958, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ee9f8005019ULL }, // Inst #15958 = VPDPWSUDSZmbkz |
| 31199 | { 15957, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ae9f8005019ULL }, // Inst #15957 = VPDPWSUDSZmbk |
| 31200 | { 15956, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78e9f8005019ULL }, // Inst #15956 = VPDPWSUDSZmb |
| 31201 | { 15955, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e9f8005019ULL }, // Inst #15955 = VPDPWSUDSZm |
| 31202 | { 15954, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7e9f8005029ULL }, // Inst #15954 = VPDPWSUDSZ256rkz |
| 31203 | { 15953, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3e9f8005029ULL }, // Inst #15953 = VPDPWSUDSZ256rk |
| 31204 | { 15952, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1e9f8005029ULL }, // Inst #15952 = VPDPWSUDSZ256r |
| 31205 | { 15951, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e9f8005019ULL }, // Inst #15951 = VPDPWSUDSZ256mkz |
| 31206 | { 15950, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e9f8005019ULL }, // Inst #15950 = VPDPWSUDSZ256mk |
| 31207 | { 15949, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77e9f8005019ULL }, // Inst #15949 = VPDPWSUDSZ256mbkz |
| 31208 | { 15948, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73e9f8005019ULL }, // Inst #15948 = VPDPWSUDSZ256mbk |
| 31209 | { 15947, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71e9f8005019ULL }, // Inst #15947 = VPDPWSUDSZ256mb |
| 31210 | { 15946, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e9f8005019ULL }, // Inst #15946 = VPDPWSUDSZ256m |
| 31211 | { 15945, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6e9f8005029ULL }, // Inst #15945 = VPDPWSUDSZ128rkz |
| 31212 | { 15944, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2e9f8005029ULL }, // Inst #15944 = VPDPWSUDSZ128rk |
| 31213 | { 15943, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0e9f8005029ULL }, // Inst #15943 = VPDPWSUDSZ128r |
| 31214 | { 15942, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e9f8005019ULL }, // Inst #15942 = VPDPWSUDSZ128mkz |
| 31215 | { 15941, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e9f8005019ULL }, // Inst #15941 = VPDPWSUDSZ128mk |
| 31216 | { 15940, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76e9f8005019ULL }, // Inst #15940 = VPDPWSUDSZ128mbkz |
| 31217 | { 15939, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72e9f8005019ULL }, // Inst #15939 = VPDPWSUDSZ128mbk |
| 31218 | { 15938, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70e9f8005019ULL }, // Inst #15938 = VPDPWSUDSZ128mb |
| 31219 | { 15937, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e9f8005019ULL }, // Inst #15937 = VPDPWSUDSZ128m |
| 31220 | { 15936, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0, 0x1e9a0005029ULL }, // Inst #15936 = VPDPWSUDSYrr |
| 31221 | { 15935, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e9a0005019ULL }, // Inst #15935 = VPDPWSUDSYrm |
| 31222 | { 15934, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x800a938004829ULL }, // Inst #15934 = VPDPWSSDrr |
| 31223 | { 15933, 8, 1, 0, 510, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x800a938004819ULL }, // Inst #15933 = VPDPWSSDrm |
| 31224 | { 15932, 5, 1, 0, 1081, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeea978004829ULL }, // Inst #15932 = VPDPWSSDZrkz |
| 31225 | { 15931, 5, 1, 0, 1081, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaa978004829ULL }, // Inst #15931 = VPDPWSSDZrk |
| 31226 | { 15930, 4, 1, 0, 1081, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8a978004829ULL }, // Inst #15930 = VPDPWSSDZr |
| 31227 | { 15929, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea978004819ULL }, // Inst #15929 = VPDPWSSDZmkz |
| 31228 | { 15928, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa978004819ULL }, // Inst #15928 = VPDPWSSDZmk |
| 31229 | { 15927, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea978004819ULL }, // Inst #15927 = VPDPWSSDZmbkz |
| 31230 | { 15926, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa978004819ULL }, // Inst #15926 = VPDPWSSDZmbk |
| 31231 | { 15925, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a978004819ULL }, // Inst #15925 = VPDPWSSDZmb |
| 31232 | { 15924, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a978004819ULL }, // Inst #15924 = VPDPWSSDZm |
| 31233 | { 15923, 5, 1, 0, 1080, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7a978004829ULL }, // Inst #15923 = VPDPWSSDZ256rkz |
| 31234 | { 15922, 5, 1, 0, 1080, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3a978004829ULL }, // Inst #15922 = VPDPWSSDZ256rk |
| 31235 | { 15921, 4, 1, 0, 1080, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1a978004829ULL }, // Inst #15921 = VPDPWSSDZ256r |
| 31236 | { 15920, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a978004819ULL }, // Inst #15920 = VPDPWSSDZ256mkz |
| 31237 | { 15919, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a978004819ULL }, // Inst #15919 = VPDPWSSDZ256mk |
| 31238 | { 15918, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a978004819ULL }, // Inst #15918 = VPDPWSSDZ256mbkz |
| 31239 | { 15917, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a978004819ULL }, // Inst #15917 = VPDPWSSDZ256mbk |
| 31240 | { 15916, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a978004819ULL }, // Inst #15916 = VPDPWSSDZ256mb |
| 31241 | { 15915, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a978004819ULL }, // Inst #15915 = VPDPWSSDZ256m |
| 31242 | { 15914, 5, 1, 0, 1079, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6a978004829ULL }, // Inst #15914 = VPDPWSSDZ128rkz |
| 31243 | { 15913, 5, 1, 0, 1079, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2a978004829ULL }, // Inst #15913 = VPDPWSSDZ128rk |
| 31244 | { 15912, 4, 1, 0, 1079, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0a978004829ULL }, // Inst #15912 = VPDPWSSDZ128r |
| 31245 | { 15911, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a978004819ULL }, // Inst #15911 = VPDPWSSDZ128mkz |
| 31246 | { 15910, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a978004819ULL }, // Inst #15910 = VPDPWSSDZ128mk |
| 31247 | { 15909, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a978004819ULL }, // Inst #15909 = VPDPWSSDZ128mbkz |
| 31248 | { 15908, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a978004819ULL }, // Inst #15908 = VPDPWSSDZ128mbk |
| 31249 | { 15907, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a978004819ULL }, // Inst #15907 = VPDPWSSDZ128mb |
| 31250 | { 15906, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a978004819ULL }, // Inst #15906 = VPDPWSSDZ128m |
| 31251 | { 15905, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x801a938004829ULL }, // Inst #15905 = VPDPWSSDYrr |
| 31252 | { 15904, 8, 1, 0, 511, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x801a938004819ULL }, // Inst #15904 = VPDPWSSDYrm |
| 31253 | { 15903, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x800a9b8004829ULL }, // Inst #15903 = VPDPWSSDSrr |
| 31254 | { 15902, 8, 1, 0, 510, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x800a9b8004819ULL }, // Inst #15902 = VPDPWSSDSrm |
| 31255 | { 15901, 5, 1, 0, 1081, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeea9f8004829ULL }, // Inst #15901 = VPDPWSSDSZrkz |
| 31256 | { 15900, 5, 1, 0, 1081, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaa9f8004829ULL }, // Inst #15900 = VPDPWSSDSZrk |
| 31257 | { 15899, 4, 1, 0, 1081, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8a9f8004829ULL }, // Inst #15899 = VPDPWSSDSZr |
| 31258 | { 15898, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea9f8004819ULL }, // Inst #15898 = VPDPWSSDSZmkz |
| 31259 | { 15897, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa9f8004819ULL }, // Inst #15897 = VPDPWSSDSZmk |
| 31260 | { 15896, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea9f8004819ULL }, // Inst #15896 = VPDPWSSDSZmbkz |
| 31261 | { 15895, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa9f8004819ULL }, // Inst #15895 = VPDPWSSDSZmbk |
| 31262 | { 15894, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a9f8004819ULL }, // Inst #15894 = VPDPWSSDSZmb |
| 31263 | { 15893, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a9f8004819ULL }, // Inst #15893 = VPDPWSSDSZm |
| 31264 | { 15892, 5, 1, 0, 1080, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7a9f8004829ULL }, // Inst #15892 = VPDPWSSDSZ256rkz |
| 31265 | { 15891, 5, 1, 0, 1080, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3a9f8004829ULL }, // Inst #15891 = VPDPWSSDSZ256rk |
| 31266 | { 15890, 4, 1, 0, 1080, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1a9f8004829ULL }, // Inst #15890 = VPDPWSSDSZ256r |
| 31267 | { 15889, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a9f8004819ULL }, // Inst #15889 = VPDPWSSDSZ256mkz |
| 31268 | { 15888, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a9f8004819ULL }, // Inst #15888 = VPDPWSSDSZ256mk |
| 31269 | { 15887, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a9f8004819ULL }, // Inst #15887 = VPDPWSSDSZ256mbkz |
| 31270 | { 15886, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a9f8004819ULL }, // Inst #15886 = VPDPWSSDSZ256mbk |
| 31271 | { 15885, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a9f8004819ULL }, // Inst #15885 = VPDPWSSDSZ256mb |
| 31272 | { 15884, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a9f8004819ULL }, // Inst #15884 = VPDPWSSDSZ256m |
| 31273 | { 15883, 5, 1, 0, 1079, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6a9f8004829ULL }, // Inst #15883 = VPDPWSSDSZ128rkz |
| 31274 | { 15882, 5, 1, 0, 1079, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2a9f8004829ULL }, // Inst #15882 = VPDPWSSDSZ128rk |
| 31275 | { 15881, 4, 1, 0, 1079, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0a9f8004829ULL }, // Inst #15881 = VPDPWSSDSZ128r |
| 31276 | { 15880, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a9f8004819ULL }, // Inst #15880 = VPDPWSSDSZ128mkz |
| 31277 | { 15879, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a9f8004819ULL }, // Inst #15879 = VPDPWSSDSZ128mk |
| 31278 | { 15878, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a9f8004819ULL }, // Inst #15878 = VPDPWSSDSZ128mbkz |
| 31279 | { 15877, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a9f8004819ULL }, // Inst #15877 = VPDPWSSDSZ128mbk |
| 31280 | { 15876, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a9f8004819ULL }, // Inst #15876 = VPDPWSSDSZ128mb |
| 31281 | { 15875, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a9f8004819ULL }, // Inst #15875 = VPDPWSSDSZ128m |
| 31282 | { 15874, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x801a9b8004829ULL }, // Inst #15874 = VPDPWSSDSYrr |
| 31283 | { 15873, 8, 1, 0, 511, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x801a9b8004819ULL }, // Inst #15873 = VPDPWSSDSYrm |
| 31284 | { 15872, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa820004029ULL }, // Inst #15872 = VPDPBUUDrr |
| 31285 | { 15871, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa820004019ULL }, // Inst #15871 = VPDPBUUDrm |
| 31286 | { 15870, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeea878004029ULL }, // Inst #15870 = VPDPBUUDZrkz |
| 31287 | { 15869, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaa878004029ULL }, // Inst #15869 = VPDPBUUDZrk |
| 31288 | { 15868, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8a878004029ULL }, // Inst #15868 = VPDPBUUDZr |
| 31289 | { 15867, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea878004019ULL }, // Inst #15867 = VPDPBUUDZmkz |
| 31290 | { 15866, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa878004019ULL }, // Inst #15866 = VPDPBUUDZmk |
| 31291 | { 15865, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea878004019ULL }, // Inst #15865 = VPDPBUUDZmbkz |
| 31292 | { 15864, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa878004019ULL }, // Inst #15864 = VPDPBUUDZmbk |
| 31293 | { 15863, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a878004019ULL }, // Inst #15863 = VPDPBUUDZmb |
| 31294 | { 15862, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a878004019ULL }, // Inst #15862 = VPDPBUUDZm |
| 31295 | { 15861, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7a878004029ULL }, // Inst #15861 = VPDPBUUDZ256rkz |
| 31296 | { 15860, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3a878004029ULL }, // Inst #15860 = VPDPBUUDZ256rk |
| 31297 | { 15859, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1a878004029ULL }, // Inst #15859 = VPDPBUUDZ256r |
| 31298 | { 15858, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a878004019ULL }, // Inst #15858 = VPDPBUUDZ256mkz |
| 31299 | { 15857, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a878004019ULL }, // Inst #15857 = VPDPBUUDZ256mk |
| 31300 | { 15856, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a878004019ULL }, // Inst #15856 = VPDPBUUDZ256mbkz |
| 31301 | { 15855, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a878004019ULL }, // Inst #15855 = VPDPBUUDZ256mbk |
| 31302 | { 15854, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a878004019ULL }, // Inst #15854 = VPDPBUUDZ256mb |
| 31303 | { 15853, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a878004019ULL }, // Inst #15853 = VPDPBUUDZ256m |
| 31304 | { 15852, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6a878004029ULL }, // Inst #15852 = VPDPBUUDZ128rkz |
| 31305 | { 15851, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2a878004029ULL }, // Inst #15851 = VPDPBUUDZ128rk |
| 31306 | { 15850, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0a878004029ULL }, // Inst #15850 = VPDPBUUDZ128r |
| 31307 | { 15849, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a878004019ULL }, // Inst #15849 = VPDPBUUDZ128mkz |
| 31308 | { 15848, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a878004019ULL }, // Inst #15848 = VPDPBUUDZ128mk |
| 31309 | { 15847, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a878004019ULL }, // Inst #15847 = VPDPBUUDZ128mbkz |
| 31310 | { 15846, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a878004019ULL }, // Inst #15846 = VPDPBUUDZ128mbk |
| 31311 | { 15845, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a878004019ULL }, // Inst #15845 = VPDPBUUDZ128mb |
| 31312 | { 15844, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a878004019ULL }, // Inst #15844 = VPDPBUUDZ128m |
| 31313 | { 15843, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a820004029ULL }, // Inst #15843 = VPDPBUUDYrr |
| 31314 | { 15842, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a820004019ULL }, // Inst #15842 = VPDPBUUDYrm |
| 31315 | { 15841, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa8a0004029ULL }, // Inst #15841 = VPDPBUUDSrr |
| 31316 | { 15840, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8a0004019ULL }, // Inst #15840 = VPDPBUUDSrm |
| 31317 | { 15839, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeea8f8004029ULL }, // Inst #15839 = VPDPBUUDSZrkz |
| 31318 | { 15838, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaa8f8004029ULL }, // Inst #15838 = VPDPBUUDSZrk |
| 31319 | { 15837, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8a8f8004029ULL }, // Inst #15837 = VPDPBUUDSZr |
| 31320 | { 15836, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea8f8004019ULL }, // Inst #15836 = VPDPBUUDSZmkz |
| 31321 | { 15835, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa8f8004019ULL }, // Inst #15835 = VPDPBUUDSZmk |
| 31322 | { 15834, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea8f8004019ULL }, // Inst #15834 = VPDPBUUDSZmbkz |
| 31323 | { 15833, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa8f8004019ULL }, // Inst #15833 = VPDPBUUDSZmbk |
| 31324 | { 15832, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a8f8004019ULL }, // Inst #15832 = VPDPBUUDSZmb |
| 31325 | { 15831, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a8f8004019ULL }, // Inst #15831 = VPDPBUUDSZm |
| 31326 | { 15830, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7a8f8004029ULL }, // Inst #15830 = VPDPBUUDSZ256rkz |
| 31327 | { 15829, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3a8f8004029ULL }, // Inst #15829 = VPDPBUUDSZ256rk |
| 31328 | { 15828, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1a8f8004029ULL }, // Inst #15828 = VPDPBUUDSZ256r |
| 31329 | { 15827, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a8f8004019ULL }, // Inst #15827 = VPDPBUUDSZ256mkz |
| 31330 | { 15826, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a8f8004019ULL }, // Inst #15826 = VPDPBUUDSZ256mk |
| 31331 | { 15825, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a8f8004019ULL }, // Inst #15825 = VPDPBUUDSZ256mbkz |
| 31332 | { 15824, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a8f8004019ULL }, // Inst #15824 = VPDPBUUDSZ256mbk |
| 31333 | { 15823, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a8f8004019ULL }, // Inst #15823 = VPDPBUUDSZ256mb |
| 31334 | { 15822, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a8f8004019ULL }, // Inst #15822 = VPDPBUUDSZ256m |
| 31335 | { 15821, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6a8f8004029ULL }, // Inst #15821 = VPDPBUUDSZ128rkz |
| 31336 | { 15820, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2a8f8004029ULL }, // Inst #15820 = VPDPBUUDSZ128rk |
| 31337 | { 15819, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0a8f8004029ULL }, // Inst #15819 = VPDPBUUDSZ128r |
| 31338 | { 15818, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a8f8004019ULL }, // Inst #15818 = VPDPBUUDSZ128mkz |
| 31339 | { 15817, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a8f8004019ULL }, // Inst #15817 = VPDPBUUDSZ128mk |
| 31340 | { 15816, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a8f8004019ULL }, // Inst #15816 = VPDPBUUDSZ128mbkz |
| 31341 | { 15815, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a8f8004019ULL }, // Inst #15815 = VPDPBUUDSZ128mbk |
| 31342 | { 15814, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a8f8004019ULL }, // Inst #15814 = VPDPBUUDSZ128mb |
| 31343 | { 15813, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a8f8004019ULL }, // Inst #15813 = VPDPBUUDSZ128m |
| 31344 | { 15812, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a8a0004029ULL }, // Inst #15812 = VPDPBUUDSYrr |
| 31345 | { 15811, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a8a0004019ULL }, // Inst #15811 = VPDPBUUDSYrm |
| 31346 | { 15810, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0, 0x800a838004829ULL }, // Inst #15810 = VPDPBUSDrr |
| 31347 | { 15809, 8, 1, 0, 510, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x800a838004819ULL }, // Inst #15809 = VPDPBUSDrm |
| 31348 | { 15808, 5, 1, 0, 1081, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeea878004829ULL }, // Inst #15808 = VPDPBUSDZrkz |
| 31349 | { 15807, 5, 1, 0, 1081, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaa878004829ULL }, // Inst #15807 = VPDPBUSDZrk |
| 31350 | { 15806, 4, 1, 0, 1081, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8a878004829ULL }, // Inst #15806 = VPDPBUSDZr |
| 31351 | { 15805, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea878004819ULL }, // Inst #15805 = VPDPBUSDZmkz |
| 31352 | { 15804, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa878004819ULL }, // Inst #15804 = VPDPBUSDZmk |
| 31353 | { 15803, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea878004819ULL }, // Inst #15803 = VPDPBUSDZmbkz |
| 31354 | { 15802, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa878004819ULL }, // Inst #15802 = VPDPBUSDZmbk |
| 31355 | { 15801, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a878004819ULL }, // Inst #15801 = VPDPBUSDZmb |
| 31356 | { 15800, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a878004819ULL }, // Inst #15800 = VPDPBUSDZm |
| 31357 | { 15799, 5, 1, 0, 1080, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7a878004829ULL }, // Inst #15799 = VPDPBUSDZ256rkz |
| 31358 | { 15798, 5, 1, 0, 1080, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3a878004829ULL }, // Inst #15798 = VPDPBUSDZ256rk |
| 31359 | { 15797, 4, 1, 0, 1080, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1a878004829ULL }, // Inst #15797 = VPDPBUSDZ256r |
| 31360 | { 15796, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a878004819ULL }, // Inst #15796 = VPDPBUSDZ256mkz |
| 31361 | { 15795, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a878004819ULL }, // Inst #15795 = VPDPBUSDZ256mk |
| 31362 | { 15794, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a878004819ULL }, // Inst #15794 = VPDPBUSDZ256mbkz |
| 31363 | { 15793, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a878004819ULL }, // Inst #15793 = VPDPBUSDZ256mbk |
| 31364 | { 15792, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a878004819ULL }, // Inst #15792 = VPDPBUSDZ256mb |
| 31365 | { 15791, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a878004819ULL }, // Inst #15791 = VPDPBUSDZ256m |
| 31366 | { 15790, 5, 1, 0, 1079, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6a878004829ULL }, // Inst #15790 = VPDPBUSDZ128rkz |
| 31367 | { 15789, 5, 1, 0, 1079, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2a878004829ULL }, // Inst #15789 = VPDPBUSDZ128rk |
| 31368 | { 15788, 4, 1, 0, 1079, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0a878004829ULL }, // Inst #15788 = VPDPBUSDZ128r |
| 31369 | { 15787, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a878004819ULL }, // Inst #15787 = VPDPBUSDZ128mkz |
| 31370 | { 15786, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a878004819ULL }, // Inst #15786 = VPDPBUSDZ128mk |
| 31371 | { 15785, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a878004819ULL }, // Inst #15785 = VPDPBUSDZ128mbkz |
| 31372 | { 15784, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a878004819ULL }, // Inst #15784 = VPDPBUSDZ128mbk |
| 31373 | { 15783, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a878004819ULL }, // Inst #15783 = VPDPBUSDZ128mb |
| 31374 | { 15782, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a878004819ULL }, // Inst #15782 = VPDPBUSDZ128m |
| 31375 | { 15781, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0, 0x801a838004829ULL }, // Inst #15781 = VPDPBUSDYrr |
| 31376 | { 15780, 8, 1, 0, 511, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x801a838004819ULL }, // Inst #15780 = VPDPBUSDYrm |
| 31377 | { 15779, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0, 0x800a8b8004829ULL }, // Inst #15779 = VPDPBUSDSrr |
| 31378 | { 15778, 8, 1, 0, 510, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x800a8b8004819ULL }, // Inst #15778 = VPDPBUSDSrm |
| 31379 | { 15777, 5, 1, 0, 1081, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeea8f8004829ULL }, // Inst #15777 = VPDPBUSDSZrkz |
| 31380 | { 15776, 5, 1, 0, 1081, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaa8f8004829ULL }, // Inst #15776 = VPDPBUSDSZrk |
| 31381 | { 15775, 4, 1, 0, 1081, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8a8f8004829ULL }, // Inst #15775 = VPDPBUSDSZr |
| 31382 | { 15774, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea8f8004819ULL }, // Inst #15774 = VPDPBUSDSZmkz |
| 31383 | { 15773, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa8f8004819ULL }, // Inst #15773 = VPDPBUSDSZmk |
| 31384 | { 15772, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea8f8004819ULL }, // Inst #15772 = VPDPBUSDSZmbkz |
| 31385 | { 15771, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa8f8004819ULL }, // Inst #15771 = VPDPBUSDSZmbk |
| 31386 | { 15770, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a8f8004819ULL }, // Inst #15770 = VPDPBUSDSZmb |
| 31387 | { 15769, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a8f8004819ULL }, // Inst #15769 = VPDPBUSDSZm |
| 31388 | { 15768, 5, 1, 0, 1080, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7a8f8004829ULL }, // Inst #15768 = VPDPBUSDSZ256rkz |
| 31389 | { 15767, 5, 1, 0, 1080, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3a8f8004829ULL }, // Inst #15767 = VPDPBUSDSZ256rk |
| 31390 | { 15766, 4, 1, 0, 1080, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1a8f8004829ULL }, // Inst #15766 = VPDPBUSDSZ256r |
| 31391 | { 15765, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a8f8004819ULL }, // Inst #15765 = VPDPBUSDSZ256mkz |
| 31392 | { 15764, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a8f8004819ULL }, // Inst #15764 = VPDPBUSDSZ256mk |
| 31393 | { 15763, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a8f8004819ULL }, // Inst #15763 = VPDPBUSDSZ256mbkz |
| 31394 | { 15762, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a8f8004819ULL }, // Inst #15762 = VPDPBUSDSZ256mbk |
| 31395 | { 15761, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a8f8004819ULL }, // Inst #15761 = VPDPBUSDSZ256mb |
| 31396 | { 15760, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a8f8004819ULL }, // Inst #15760 = VPDPBUSDSZ256m |
| 31397 | { 15759, 5, 1, 0, 1079, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6a8f8004829ULL }, // Inst #15759 = VPDPBUSDSZ128rkz |
| 31398 | { 15758, 5, 1, 0, 1079, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2a8f8004829ULL }, // Inst #15758 = VPDPBUSDSZ128rk |
| 31399 | { 15757, 4, 1, 0, 1079, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0a8f8004829ULL }, // Inst #15757 = VPDPBUSDSZ128r |
| 31400 | { 15756, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a8f8004819ULL }, // Inst #15756 = VPDPBUSDSZ128mkz |
| 31401 | { 15755, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a8f8004819ULL }, // Inst #15755 = VPDPBUSDSZ128mk |
| 31402 | { 15754, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a8f8004819ULL }, // Inst #15754 = VPDPBUSDSZ128mbkz |
| 31403 | { 15753, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a8f8004819ULL }, // Inst #15753 = VPDPBUSDSZ128mbk |
| 31404 | { 15752, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a8f8004819ULL }, // Inst #15752 = VPDPBUSDSZ128mb |
| 31405 | { 15751, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a8f8004819ULL }, // Inst #15751 = VPDPBUSDSZ128m |
| 31406 | { 15750, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0, 0x801a8b8004829ULL }, // Inst #15750 = VPDPBUSDSYrr |
| 31407 | { 15749, 8, 1, 0, 511, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x801a8b8004819ULL }, // Inst #15749 = VPDPBUSDSYrm |
| 31408 | { 15748, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0, 0xa820005029ULL }, // Inst #15748 = VPDPBSUDrr |
| 31409 | { 15747, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa820005019ULL }, // Inst #15747 = VPDPBSUDrm |
| 31410 | { 15746, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeea878005029ULL }, // Inst #15746 = VPDPBSUDZrkz |
| 31411 | { 15745, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaa878005029ULL }, // Inst #15745 = VPDPBSUDZrk |
| 31412 | { 15744, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8a878005029ULL }, // Inst #15744 = VPDPBSUDZr |
| 31413 | { 15743, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea878005019ULL }, // Inst #15743 = VPDPBSUDZmkz |
| 31414 | { 15742, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa878005019ULL }, // Inst #15742 = VPDPBSUDZmk |
| 31415 | { 15741, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea878005019ULL }, // Inst #15741 = VPDPBSUDZmbkz |
| 31416 | { 15740, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa878005019ULL }, // Inst #15740 = VPDPBSUDZmbk |
| 31417 | { 15739, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a878005019ULL }, // Inst #15739 = VPDPBSUDZmb |
| 31418 | { 15738, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a878005019ULL }, // Inst #15738 = VPDPBSUDZm |
| 31419 | { 15737, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7a878005029ULL }, // Inst #15737 = VPDPBSUDZ256rkz |
| 31420 | { 15736, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3a878005029ULL }, // Inst #15736 = VPDPBSUDZ256rk |
| 31421 | { 15735, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1a878005029ULL }, // Inst #15735 = VPDPBSUDZ256r |
| 31422 | { 15734, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a878005019ULL }, // Inst #15734 = VPDPBSUDZ256mkz |
| 31423 | { 15733, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a878005019ULL }, // Inst #15733 = VPDPBSUDZ256mk |
| 31424 | { 15732, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a878005019ULL }, // Inst #15732 = VPDPBSUDZ256mbkz |
| 31425 | { 15731, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a878005019ULL }, // Inst #15731 = VPDPBSUDZ256mbk |
| 31426 | { 15730, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a878005019ULL }, // Inst #15730 = VPDPBSUDZ256mb |
| 31427 | { 15729, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a878005019ULL }, // Inst #15729 = VPDPBSUDZ256m |
| 31428 | { 15728, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6a878005029ULL }, // Inst #15728 = VPDPBSUDZ128rkz |
| 31429 | { 15727, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2a878005029ULL }, // Inst #15727 = VPDPBSUDZ128rk |
| 31430 | { 15726, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0a878005029ULL }, // Inst #15726 = VPDPBSUDZ128r |
| 31431 | { 15725, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a878005019ULL }, // Inst #15725 = VPDPBSUDZ128mkz |
| 31432 | { 15724, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a878005019ULL }, // Inst #15724 = VPDPBSUDZ128mk |
| 31433 | { 15723, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a878005019ULL }, // Inst #15723 = VPDPBSUDZ128mbkz |
| 31434 | { 15722, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a878005019ULL }, // Inst #15722 = VPDPBSUDZ128mbk |
| 31435 | { 15721, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a878005019ULL }, // Inst #15721 = VPDPBSUDZ128mb |
| 31436 | { 15720, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a878005019ULL }, // Inst #15720 = VPDPBSUDZ128m |
| 31437 | { 15719, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0, 0x1a820005029ULL }, // Inst #15719 = VPDPBSUDYrr |
| 31438 | { 15718, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a820005019ULL }, // Inst #15718 = VPDPBSUDYrm |
| 31439 | { 15717, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0, 0xa8a0005029ULL }, // Inst #15717 = VPDPBSUDSrr |
| 31440 | { 15716, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8a0005019ULL }, // Inst #15716 = VPDPBSUDSrm |
| 31441 | { 15715, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeea8f8005029ULL }, // Inst #15715 = VPDPBSUDSZrkz |
| 31442 | { 15714, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaa8f8005029ULL }, // Inst #15714 = VPDPBSUDSZrk |
| 31443 | { 15713, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8a8f8005029ULL }, // Inst #15713 = VPDPBSUDSZr |
| 31444 | { 15712, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea8f8005019ULL }, // Inst #15712 = VPDPBSUDSZmkz |
| 31445 | { 15711, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa8f8005019ULL }, // Inst #15711 = VPDPBSUDSZmk |
| 31446 | { 15710, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea8f8005019ULL }, // Inst #15710 = VPDPBSUDSZmbkz |
| 31447 | { 15709, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa8f8005019ULL }, // Inst #15709 = VPDPBSUDSZmbk |
| 31448 | { 15708, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a8f8005019ULL }, // Inst #15708 = VPDPBSUDSZmb |
| 31449 | { 15707, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a8f8005019ULL }, // Inst #15707 = VPDPBSUDSZm |
| 31450 | { 15706, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7a8f8005029ULL }, // Inst #15706 = VPDPBSUDSZ256rkz |
| 31451 | { 15705, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3a8f8005029ULL }, // Inst #15705 = VPDPBSUDSZ256rk |
| 31452 | { 15704, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1a8f8005029ULL }, // Inst #15704 = VPDPBSUDSZ256r |
| 31453 | { 15703, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a8f8005019ULL }, // Inst #15703 = VPDPBSUDSZ256mkz |
| 31454 | { 15702, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a8f8005019ULL }, // Inst #15702 = VPDPBSUDSZ256mk |
| 31455 | { 15701, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a8f8005019ULL }, // Inst #15701 = VPDPBSUDSZ256mbkz |
| 31456 | { 15700, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a8f8005019ULL }, // Inst #15700 = VPDPBSUDSZ256mbk |
| 31457 | { 15699, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a8f8005019ULL }, // Inst #15699 = VPDPBSUDSZ256mb |
| 31458 | { 15698, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a8f8005019ULL }, // Inst #15698 = VPDPBSUDSZ256m |
| 31459 | { 15697, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6a8f8005029ULL }, // Inst #15697 = VPDPBSUDSZ128rkz |
| 31460 | { 15696, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2a8f8005029ULL }, // Inst #15696 = VPDPBSUDSZ128rk |
| 31461 | { 15695, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0a8f8005029ULL }, // Inst #15695 = VPDPBSUDSZ128r |
| 31462 | { 15694, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a8f8005019ULL }, // Inst #15694 = VPDPBSUDSZ128mkz |
| 31463 | { 15693, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a8f8005019ULL }, // Inst #15693 = VPDPBSUDSZ128mk |
| 31464 | { 15692, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a8f8005019ULL }, // Inst #15692 = VPDPBSUDSZ128mbkz |
| 31465 | { 15691, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a8f8005019ULL }, // Inst #15691 = VPDPBSUDSZ128mbk |
| 31466 | { 15690, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a8f8005019ULL }, // Inst #15690 = VPDPBSUDSZ128mb |
| 31467 | { 15689, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a8f8005019ULL }, // Inst #15689 = VPDPBSUDSZ128m |
| 31468 | { 15688, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0, 0x1a8a0005029ULL }, // Inst #15688 = VPDPBSUDSYrr |
| 31469 | { 15687, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a8a0005019ULL }, // Inst #15687 = VPDPBSUDSYrm |
| 31470 | { 15686, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa820005829ULL }, // Inst #15686 = VPDPBSSDrr |
| 31471 | { 15685, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa820005819ULL }, // Inst #15685 = VPDPBSSDrm |
| 31472 | { 15684, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeea878005829ULL }, // Inst #15684 = VPDPBSSDZrkz |
| 31473 | { 15683, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaa878005829ULL }, // Inst #15683 = VPDPBSSDZrk |
| 31474 | { 15682, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8a878005829ULL }, // Inst #15682 = VPDPBSSDZr |
| 31475 | { 15681, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea878005819ULL }, // Inst #15681 = VPDPBSSDZmkz |
| 31476 | { 15680, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa878005819ULL }, // Inst #15680 = VPDPBSSDZmk |
| 31477 | { 15679, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea878005819ULL }, // Inst #15679 = VPDPBSSDZmbkz |
| 31478 | { 15678, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa878005819ULL }, // Inst #15678 = VPDPBSSDZmbk |
| 31479 | { 15677, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a878005819ULL }, // Inst #15677 = VPDPBSSDZmb |
| 31480 | { 15676, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a878005819ULL }, // Inst #15676 = VPDPBSSDZm |
| 31481 | { 15675, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7a878005829ULL }, // Inst #15675 = VPDPBSSDZ256rkz |
| 31482 | { 15674, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3a878005829ULL }, // Inst #15674 = VPDPBSSDZ256rk |
| 31483 | { 15673, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1a878005829ULL }, // Inst #15673 = VPDPBSSDZ256r |
| 31484 | { 15672, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a878005819ULL }, // Inst #15672 = VPDPBSSDZ256mkz |
| 31485 | { 15671, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a878005819ULL }, // Inst #15671 = VPDPBSSDZ256mk |
| 31486 | { 15670, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a878005819ULL }, // Inst #15670 = VPDPBSSDZ256mbkz |
| 31487 | { 15669, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a878005819ULL }, // Inst #15669 = VPDPBSSDZ256mbk |
| 31488 | { 15668, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a878005819ULL }, // Inst #15668 = VPDPBSSDZ256mb |
| 31489 | { 15667, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a878005819ULL }, // Inst #15667 = VPDPBSSDZ256m |
| 31490 | { 15666, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6a878005829ULL }, // Inst #15666 = VPDPBSSDZ128rkz |
| 31491 | { 15665, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2a878005829ULL }, // Inst #15665 = VPDPBSSDZ128rk |
| 31492 | { 15664, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0a878005829ULL }, // Inst #15664 = VPDPBSSDZ128r |
| 31493 | { 15663, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a878005819ULL }, // Inst #15663 = VPDPBSSDZ128mkz |
| 31494 | { 15662, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a878005819ULL }, // Inst #15662 = VPDPBSSDZ128mk |
| 31495 | { 15661, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a878005819ULL }, // Inst #15661 = VPDPBSSDZ128mbkz |
| 31496 | { 15660, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a878005819ULL }, // Inst #15660 = VPDPBSSDZ128mbk |
| 31497 | { 15659, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a878005819ULL }, // Inst #15659 = VPDPBSSDZ128mb |
| 31498 | { 15658, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a878005819ULL }, // Inst #15658 = VPDPBSSDZ128m |
| 31499 | { 15657, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a820005829ULL }, // Inst #15657 = VPDPBSSDYrr |
| 31500 | { 15656, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a820005819ULL }, // Inst #15656 = VPDPBSSDYrm |
| 31501 | { 15655, 4, 1, 0, 149, 0, 0, 3982, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa8a0005829ULL }, // Inst #15655 = VPDPBSSDSrr |
| 31502 | { 15654, 8, 1, 0, 148, 0, 0, 3974, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8a0005819ULL }, // Inst #15654 = VPDPBSSDSrm |
| 31503 | { 15653, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeea8f8005829ULL }, // Inst #15653 = VPDPBSSDSZrkz |
| 31504 | { 15652, 5, 1, 0, 384, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaa8f8005829ULL }, // Inst #15652 = VPDPBSSDSZrk |
| 31505 | { 15651, 4, 1, 0, 384, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8a8f8005829ULL }, // Inst #15651 = VPDPBSSDSZr |
| 31506 | { 15650, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea8f8005819ULL }, // Inst #15650 = VPDPBSSDSZmkz |
| 31507 | { 15649, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa8f8005819ULL }, // Inst #15649 = VPDPBSSDSZmk |
| 31508 | { 15648, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea8f8005819ULL }, // Inst #15648 = VPDPBSSDSZmbkz |
| 31509 | { 15647, 9, 1, 0, 512, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa8f8005819ULL }, // Inst #15647 = VPDPBSSDSZmbk |
| 31510 | { 15646, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a8f8005819ULL }, // Inst #15646 = VPDPBSSDSZmb |
| 31511 | { 15645, 8, 1, 0, 512, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a8f8005819ULL }, // Inst #15645 = VPDPBSSDSZm |
| 31512 | { 15644, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7a8f8005829ULL }, // Inst #15644 = VPDPBSSDSZ256rkz |
| 31513 | { 15643, 5, 1, 0, 382, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3a8f8005829ULL }, // Inst #15643 = VPDPBSSDSZ256rk |
| 31514 | { 15642, 4, 1, 0, 382, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1a8f8005829ULL }, // Inst #15642 = VPDPBSSDSZ256r |
| 31515 | { 15641, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a8f8005819ULL }, // Inst #15641 = VPDPBSSDSZ256mkz |
| 31516 | { 15640, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a8f8005819ULL }, // Inst #15640 = VPDPBSSDSZ256mk |
| 31517 | { 15639, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a8f8005819ULL }, // Inst #15639 = VPDPBSSDSZ256mbkz |
| 31518 | { 15638, 9, 1, 0, 511, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a8f8005819ULL }, // Inst #15638 = VPDPBSSDSZ256mbk |
| 31519 | { 15637, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a8f8005819ULL }, // Inst #15637 = VPDPBSSDSZ256mb |
| 31520 | { 15636, 8, 1, 0, 511, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a8f8005819ULL }, // Inst #15636 = VPDPBSSDSZ256m |
| 31521 | { 15635, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6a8f8005829ULL }, // Inst #15635 = VPDPBSSDSZ128rkz |
| 31522 | { 15634, 5, 1, 0, 149, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2a8f8005829ULL }, // Inst #15634 = VPDPBSSDSZ128rk |
| 31523 | { 15633, 4, 1, 0, 149, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0a8f8005829ULL }, // Inst #15633 = VPDPBSSDSZ128r |
| 31524 | { 15632, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a8f8005819ULL }, // Inst #15632 = VPDPBSSDSZ128mkz |
| 31525 | { 15631, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a8f8005819ULL }, // Inst #15631 = VPDPBSSDSZ128mk |
| 31526 | { 15630, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a8f8005819ULL }, // Inst #15630 = VPDPBSSDSZ128mbkz |
| 31527 | { 15629, 9, 1, 0, 510, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a8f8005819ULL }, // Inst #15629 = VPDPBSSDSZ128mbk |
| 31528 | { 15628, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a8f8005819ULL }, // Inst #15628 = VPDPBSSDSZ128mb |
| 31529 | { 15627, 8, 1, 0, 510, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a8f8005819ULL }, // Inst #15627 = VPDPBSSDSZ128m |
| 31530 | { 15626, 4, 1, 0, 382, 0, 0, 3965, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a8a0005829ULL }, // Inst #15626 = VPDPBSSDSYrr |
| 31531 | { 15625, 8, 1, 0, 381, 0, 0, 3957, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a8a0005819ULL }, // Inst #15625 = VPDPBSSDSYrm |
| 31532 | { 15624, 3, 1, 0, 2318, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee6278024829ULL }, // Inst #15624 = VPCONFLICTQZrrkz |
| 31533 | { 15623, 4, 1, 0, 1406, 0, 0, 2804, X86ImpOpBase + 0, 0, 0xea6278024829ULL }, // Inst #15623 = VPCONFLICTQZrrk |
| 31534 | { 15622, 2, 1, 0, 2318, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe86278024829ULL }, // Inst #15622 = VPCONFLICTQZrr |
| 31535 | { 15621, 7, 1, 0, 2317, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee6278024819ULL }, // Inst #15621 = VPCONFLICTQZrmkz |
| 31536 | { 15620, 8, 1, 0, 2317, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea6278024819ULL }, // Inst #15620 = VPCONFLICTQZrmk |
| 31537 | { 15619, 7, 1, 0, 1408, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e6278024819ULL }, // Inst #15619 = VPCONFLICTQZrmbkz |
| 31538 | { 15618, 8, 1, 0, 2317, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a6278024819ULL }, // Inst #15618 = VPCONFLICTQZrmbk |
| 31539 | { 15617, 6, 1, 0, 2317, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x986278024819ULL }, // Inst #15617 = VPCONFLICTQZrmb |
| 31540 | { 15616, 6, 1, 0, 2317, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe86278024819ULL }, // Inst #15616 = VPCONFLICTQZrm |
| 31541 | { 15615, 3, 1, 0, 1404, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc76278024829ULL }, // Inst #15615 = VPCONFLICTQZ256rrkz |
| 31542 | { 15614, 4, 1, 0, 1404, 0, 0, 2782, X86ImpOpBase + 0, 0, 0xc36278024829ULL }, // Inst #15614 = VPCONFLICTQZ256rrk |
| 31543 | { 15613, 2, 1, 0, 1404, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc16278024829ULL }, // Inst #15613 = VPCONFLICTQZ256rr |
| 31544 | { 15612, 7, 1, 0, 2316, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc76278024819ULL }, // Inst #15612 = VPCONFLICTQZ256rmkz |
| 31545 | { 15611, 8, 1, 0, 2316, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc36278024819ULL }, // Inst #15611 = VPCONFLICTQZ256rmk |
| 31546 | { 15610, 7, 1, 0, 1405, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x976278024819ULL }, // Inst #15610 = VPCONFLICTQZ256rmbkz |
| 31547 | { 15609, 8, 1, 0, 2316, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x936278024819ULL }, // Inst #15609 = VPCONFLICTQZ256rmbk |
| 31548 | { 15608, 6, 1, 0, 2316, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x916278024819ULL }, // Inst #15608 = VPCONFLICTQZ256rmb |
| 31549 | { 15607, 6, 1, 0, 2316, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc16278024819ULL }, // Inst #15607 = VPCONFLICTQZ256rm |
| 31550 | { 15606, 3, 1, 0, 1277, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa66278024829ULL }, // Inst #15606 = VPCONFLICTQZ128rrkz |
| 31551 | { 15605, 4, 1, 0, 1277, 0, 0, 2766, X86ImpOpBase + 0, 0, 0xa26278024829ULL }, // Inst #15605 = VPCONFLICTQZ128rrk |
| 31552 | { 15604, 2, 1, 0, 1277, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa06278024829ULL }, // Inst #15604 = VPCONFLICTQZ128rr |
| 31553 | { 15603, 7, 1, 0, 2314, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa66278024819ULL }, // Inst #15603 = VPCONFLICTQZ128rmkz |
| 31554 | { 15602, 8, 1, 0, 2314, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa26278024819ULL }, // Inst #15602 = VPCONFLICTQZ128rmk |
| 31555 | { 15601, 7, 1, 0, 1382, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x966278024819ULL }, // Inst #15601 = VPCONFLICTQZ128rmbkz |
| 31556 | { 15600, 8, 1, 0, 2314, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x926278024819ULL }, // Inst #15600 = VPCONFLICTQZ128rmbk |
| 31557 | { 15599, 6, 1, 0, 2314, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x906278024819ULL }, // Inst #15599 = VPCONFLICTQZ128rmb |
| 31558 | { 15598, 6, 1, 0, 2314, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa06278024819ULL }, // Inst #15598 = VPCONFLICTQZ128rm |
| 31559 | { 15597, 3, 1, 0, 2313, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee6278004829ULL }, // Inst #15597 = VPCONFLICTDZrrkz |
| 31560 | { 15596, 4, 1, 0, 1131, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea6278004829ULL }, // Inst #15596 = VPCONFLICTDZrrk |
| 31561 | { 15595, 2, 1, 0, 2313, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe86278004829ULL }, // Inst #15595 = VPCONFLICTDZrr |
| 31562 | { 15594, 7, 1, 0, 2312, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee6278004819ULL }, // Inst #15594 = VPCONFLICTDZrmkz |
| 31563 | { 15593, 8, 1, 0, 2312, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea6278004819ULL }, // Inst #15593 = VPCONFLICTDZrmk |
| 31564 | { 15592, 7, 1, 0, 1409, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e6278004819ULL }, // Inst #15592 = VPCONFLICTDZrmbkz |
| 31565 | { 15591, 8, 1, 0, 2312, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a6278004819ULL }, // Inst #15591 = VPCONFLICTDZrmbk |
| 31566 | { 15590, 6, 1, 0, 2312, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x786278004819ULL }, // Inst #15590 = VPCONFLICTDZrmb |
| 31567 | { 15589, 6, 1, 0, 2312, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe86278004819ULL }, // Inst #15589 = VPCONFLICTDZrm |
| 31568 | { 15588, 3, 1, 0, 1130, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc76278004829ULL }, // Inst #15588 = VPCONFLICTDZ256rrkz |
| 31569 | { 15587, 4, 1, 0, 1130, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc36278004829ULL }, // Inst #15587 = VPCONFLICTDZ256rrk |
| 31570 | { 15586, 2, 1, 0, 1130, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc16278004829ULL }, // Inst #15586 = VPCONFLICTDZ256rr |
| 31571 | { 15585, 7, 1, 0, 2311, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc76278004819ULL }, // Inst #15585 = VPCONFLICTDZ256rmkz |
| 31572 | { 15584, 8, 1, 0, 2311, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc36278004819ULL }, // Inst #15584 = VPCONFLICTDZ256rmk |
| 31573 | { 15583, 7, 1, 0, 1407, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x776278004819ULL }, // Inst #15583 = VPCONFLICTDZ256rmbkz |
| 31574 | { 15582, 8, 1, 0, 2311, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x736278004819ULL }, // Inst #15582 = VPCONFLICTDZ256rmbk |
| 31575 | { 15581, 6, 1, 0, 2311, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x716278004819ULL }, // Inst #15581 = VPCONFLICTDZ256rmb |
| 31576 | { 15580, 6, 1, 0, 2311, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc16278004819ULL }, // Inst #15580 = VPCONFLICTDZ256rm |
| 31577 | { 15579, 3, 1, 0, 1129, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa66278004829ULL }, // Inst #15579 = VPCONFLICTDZ128rrkz |
| 31578 | { 15578, 4, 1, 0, 1129, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa26278004829ULL }, // Inst #15578 = VPCONFLICTDZ128rrk |
| 31579 | { 15577, 2, 1, 0, 1129, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa06278004829ULL }, // Inst #15577 = VPCONFLICTDZ128rr |
| 31580 | { 15576, 7, 1, 0, 2310, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa66278004819ULL }, // Inst #15576 = VPCONFLICTDZ128rmkz |
| 31581 | { 15575, 8, 1, 0, 2310, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa26278004819ULL }, // Inst #15575 = VPCONFLICTDZ128rmk |
| 31582 | { 15574, 7, 1, 0, 1396, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x766278004819ULL }, // Inst #15574 = VPCONFLICTDZ128rmbkz |
| 31583 | { 15573, 8, 1, 0, 2310, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x726278004819ULL }, // Inst #15573 = VPCONFLICTDZ128rmbk |
| 31584 | { 15572, 6, 1, 0, 2310, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x706278004819ULL }, // Inst #15572 = VPCONFLICTDZ128rmb |
| 31585 | { 15571, 6, 1, 0, 2310, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa06278004819ULL }, // Inst #15571 = VPCONFLICTDZ128rm |
| 31586 | { 15570, 4, 1, 0, 144, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe6d8048029ULL }, // Inst #15570 = VPCOMWri |
| 31587 | { 15569, 8, 1, 0, 150, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe6d8048019ULL }, // Inst #15569 = VPCOMWmi |
| 31588 | { 15568, 4, 1, 0, 144, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf6d8048029ULL }, // Inst #15568 = VPCOMUWri |
| 31589 | { 15567, 8, 1, 0, 150, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf6d8048019ULL }, // Inst #15567 = VPCOMUWmi |
| 31590 | { 15566, 4, 1, 0, 144, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf7d8048029ULL }, // Inst #15566 = VPCOMUQri |
| 31591 | { 15565, 8, 1, 0, 150, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf7d8048019ULL }, // Inst #15565 = VPCOMUQmi |
| 31592 | { 15564, 4, 1, 0, 144, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf758048029ULL }, // Inst #15564 = VPCOMUDri |
| 31593 | { 15563, 8, 1, 0, 150, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf758048019ULL }, // Inst #15563 = VPCOMUDmi |
| 31594 | { 15562, 4, 1, 0, 144, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf658048029ULL }, // Inst #15562 = VPCOMUBri |
| 31595 | { 15561, 8, 1, 0, 150, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf658048019ULL }, // Inst #15561 = VPCOMUBmi |
| 31596 | { 15560, 4, 1, 0, 144, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe7d8048029ULL }, // Inst #15560 = VPCOMQri |
| 31597 | { 15559, 8, 1, 0, 150, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe7d8048019ULL }, // Inst #15559 = VPCOMQmi |
| 31598 | { 15558, 3, 1, 0, 1144, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee31f8024828ULL }, // Inst #15558 = VPCOMPRESSWZrrkz |
| 31599 | { 15557, 4, 1, 0, 1144, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea31f8024828ULL }, // Inst #15557 = VPCOMPRESSWZrrk |
| 31600 | { 15556, 2, 1, 0, 1982, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe831f8024828ULL }, // Inst #15556 = VPCOMPRESSWZrr |
| 31601 | { 15555, 7, 0, 0, 2307, 0, 0, 4930, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4a31f8024818ULL }, // Inst #15555 = VPCOMPRESSWZmrk |
| 31602 | { 15554, 6, 0, 0, 2305, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4831f8024818ULL }, // Inst #15554 = VPCOMPRESSWZmr |
| 31603 | { 15553, 3, 1, 0, 1142, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc731f8024828ULL }, // Inst #15553 = VPCOMPRESSWZ256rrkz |
| 31604 | { 15552, 4, 1, 0, 1142, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc331f8024828ULL }, // Inst #15552 = VPCOMPRESSWZ256rrk |
| 31605 | { 15551, 2, 1, 0, 1981, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc131f8024828ULL }, // Inst #15551 = VPCOMPRESSWZ256rr |
| 31606 | { 15550, 7, 0, 0, 2306, 0, 0, 4923, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4331f8024818ULL }, // Inst #15550 = VPCOMPRESSWZ256mrk |
| 31607 | { 15549, 6, 0, 0, 2304, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4131f8024818ULL }, // Inst #15549 = VPCOMPRESSWZ256mr |
| 31608 | { 15548, 3, 1, 0, 1140, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa631f8024828ULL }, // Inst #15548 = VPCOMPRESSWZ128rrkz |
| 31609 | { 15547, 4, 1, 0, 1140, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa231f8024828ULL }, // Inst #15547 = VPCOMPRESSWZ128rrk |
| 31610 | { 15546, 2, 1, 0, 1980, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa031f8024828ULL }, // Inst #15546 = VPCOMPRESSWZ128rr |
| 31611 | { 15545, 7, 0, 0, 2306, 0, 0, 4916, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4231f8024818ULL }, // Inst #15545 = VPCOMPRESSWZ128mrk |
| 31612 | { 15544, 6, 0, 0, 2304, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4031f8024818ULL }, // Inst #15544 = VPCOMPRESSWZ128mr |
| 31613 | { 15543, 3, 1, 0, 1284, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee45f8024828ULL }, // Inst #15543 = VPCOMPRESSQZrrkz |
| 31614 | { 15542, 4, 1, 0, 1284, 0, 0, 2804, X86ImpOpBase + 0, 0, 0xea45f8024828ULL }, // Inst #15542 = VPCOMPRESSQZrrk |
| 31615 | { 15541, 2, 1, 0, 1978, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe845f8024828ULL }, // Inst #15541 = VPCOMPRESSQZrr |
| 31616 | { 15540, 7, 0, 0, 1312, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a45f8024818ULL }, // Inst #15540 = VPCOMPRESSQZmrk |
| 31617 | { 15539, 6, 0, 0, 1973, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8845f8024818ULL }, // Inst #15539 = VPCOMPRESSQZmr |
| 31618 | { 15538, 3, 1, 0, 1283, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc745f8024828ULL }, // Inst #15538 = VPCOMPRESSQZ256rrkz |
| 31619 | { 15537, 4, 1, 0, 1283, 0, 0, 2782, X86ImpOpBase + 0, 0, 0xc345f8024828ULL }, // Inst #15537 = VPCOMPRESSQZ256rrk |
| 31620 | { 15536, 2, 1, 0, 1977, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc145f8024828ULL }, // Inst #15536 = VPCOMPRESSQZ256rr |
| 31621 | { 15535, 7, 0, 0, 1312, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8345f8024818ULL }, // Inst #15535 = VPCOMPRESSQZ256mrk |
| 31622 | { 15534, 6, 0, 0, 1973, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8145f8024818ULL }, // Inst #15534 = VPCOMPRESSQZ256mr |
| 31623 | { 15533, 3, 1, 0, 1282, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa645f8024828ULL }, // Inst #15533 = VPCOMPRESSQZ128rrkz |
| 31624 | { 15532, 4, 1, 0, 1282, 0, 0, 2766, X86ImpOpBase + 0, 0, 0xa245f8024828ULL }, // Inst #15532 = VPCOMPRESSQZ128rrk |
| 31625 | { 15531, 2, 1, 0, 1976, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa045f8024828ULL }, // Inst #15531 = VPCOMPRESSQZ128rr |
| 31626 | { 15530, 7, 0, 0, 1312, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8245f8024818ULL }, // Inst #15530 = VPCOMPRESSQZ128mrk |
| 31627 | { 15529, 6, 0, 0, 1973, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8045f8024818ULL }, // Inst #15529 = VPCOMPRESSQZ128mr |
| 31628 | { 15528, 3, 1, 0, 1284, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee45f8004828ULL }, // Inst #15528 = VPCOMPRESSDZrrkz |
| 31629 | { 15527, 4, 1, 0, 1284, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea45f8004828ULL }, // Inst #15527 = VPCOMPRESSDZrrk |
| 31630 | { 15526, 2, 1, 0, 1978, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe845f8004828ULL }, // Inst #15526 = VPCOMPRESSDZrr |
| 31631 | { 15525, 7, 0, 0, 1312, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6a45f8004818ULL }, // Inst #15525 = VPCOMPRESSDZmrk |
| 31632 | { 15524, 6, 0, 0, 1973, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6845f8004818ULL }, // Inst #15524 = VPCOMPRESSDZmr |
| 31633 | { 15523, 3, 1, 0, 1283, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc745f8004828ULL }, // Inst #15523 = VPCOMPRESSDZ256rrkz |
| 31634 | { 15522, 4, 1, 0, 1283, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc345f8004828ULL }, // Inst #15522 = VPCOMPRESSDZ256rrk |
| 31635 | { 15521, 2, 1, 0, 1977, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc145f8004828ULL }, // Inst #15521 = VPCOMPRESSDZ256rr |
| 31636 | { 15520, 7, 0, 0, 1312, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6345f8004818ULL }, // Inst #15520 = VPCOMPRESSDZ256mrk |
| 31637 | { 15519, 6, 0, 0, 1973, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6145f8004818ULL }, // Inst #15519 = VPCOMPRESSDZ256mr |
| 31638 | { 15518, 3, 1, 0, 1282, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa645f8004828ULL }, // Inst #15518 = VPCOMPRESSDZ128rrkz |
| 31639 | { 15517, 4, 1, 0, 1282, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa245f8004828ULL }, // Inst #15517 = VPCOMPRESSDZ128rrk |
| 31640 | { 15516, 2, 1, 0, 1976, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa045f8004828ULL }, // Inst #15516 = VPCOMPRESSDZ128rr |
| 31641 | { 15515, 7, 0, 0, 1312, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6245f8004818ULL }, // Inst #15515 = VPCOMPRESSDZ128mrk |
| 31642 | { 15514, 6, 0, 0, 1973, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6045f8004818ULL }, // Inst #15514 = VPCOMPRESSDZ128mr |
| 31643 | { 15513, 3, 1, 0, 1144, 0, 0, 4991, X86ImpOpBase + 0, 0, 0xee31f8004828ULL }, // Inst #15513 = VPCOMPRESSBZrrkz |
| 31644 | { 15512, 4, 1, 0, 1144, 0, 0, 4987, X86ImpOpBase + 0, 0, 0xea31f8004828ULL }, // Inst #15512 = VPCOMPRESSBZrrk |
| 31645 | { 15511, 2, 1, 0, 1982, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe831f8004828ULL }, // Inst #15511 = VPCOMPRESSBZrr |
| 31646 | { 15510, 7, 0, 0, 2309, 0, 0, 4965, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x2a31f8004818ULL }, // Inst #15510 = VPCOMPRESSBZmrk |
| 31647 | { 15509, 6, 0, 0, 2308, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x2831f8004818ULL }, // Inst #15509 = VPCOMPRESSBZmr |
| 31648 | { 15508, 3, 1, 0, 1142, 0, 0, 4962, X86ImpOpBase + 0, 0, 0xc731f8004828ULL }, // Inst #15508 = VPCOMPRESSBZ256rrkz |
| 31649 | { 15507, 4, 1, 0, 1142, 0, 0, 4958, X86ImpOpBase + 0, 0, 0xc331f8004828ULL }, // Inst #15507 = VPCOMPRESSBZ256rrk |
| 31650 | { 15506, 2, 1, 0, 1981, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc131f8004828ULL }, // Inst #15506 = VPCOMPRESSBZ256rr |
| 31651 | { 15505, 7, 0, 0, 2306, 0, 0, 4951, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x2331f8004818ULL }, // Inst #15505 = VPCOMPRESSBZ256mrk |
| 31652 | { 15504, 6, 0, 0, 2304, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x2131f8004818ULL }, // Inst #15504 = VPCOMPRESSBZ256mr |
| 31653 | { 15503, 3, 1, 0, 1140, 0, 0, 4948, X86ImpOpBase + 0, 0, 0xa631f8004828ULL }, // Inst #15503 = VPCOMPRESSBZ128rrkz |
| 31654 | { 15502, 4, 1, 0, 1140, 0, 0, 4944, X86ImpOpBase + 0, 0, 0xa231f8004828ULL }, // Inst #15502 = VPCOMPRESSBZ128rrk |
| 31655 | { 15501, 2, 1, 0, 1980, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa031f8004828ULL }, // Inst #15501 = VPCOMPRESSBZ128rr |
| 31656 | { 15500, 7, 0, 0, 2306, 0, 0, 4937, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x2231f8004818ULL }, // Inst #15500 = VPCOMPRESSBZ128mrk |
| 31657 | { 15499, 6, 0, 0, 2304, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x2031f8004818ULL }, // Inst #15499 = VPCOMPRESSBZ128mr |
| 31658 | { 15498, 4, 1, 0, 144, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe758048029ULL }, // Inst #15498 = VPCOMDri |
| 31659 | { 15497, 8, 1, 0, 150, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe758048019ULL }, // Inst #15497 = VPCOMDmi |
| 31660 | { 15496, 4, 1, 0, 144, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe658048029ULL }, // Inst #15496 = VPCOMBri |
| 31661 | { 15495, 8, 1, 0, 150, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe658048019ULL }, // Inst #15495 = VPCOMBmi |
| 31662 | { 15494, 5, 1, 0, 1253, 0, 0, 2496, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9ff8066829ULL }, // Inst #15494 = VPCMPWZrrik |
| 31663 | { 15493, 4, 1, 0, 1253, 0, 0, 2492, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89ff8066829ULL }, // Inst #15493 = VPCMPWZrri |
| 31664 | { 15492, 9, 1, 0, 1354, 0, 0, 2483, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9ff8066819ULL }, // Inst #15492 = VPCMPWZrmik |
| 31665 | { 15491, 8, 1, 0, 1354, 0, 0, 2475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89ff8066819ULL }, // Inst #15491 = VPCMPWZrmi |
| 31666 | { 15490, 5, 1, 0, 1252, 0, 0, 2470, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39ff8066829ULL }, // Inst #15490 = VPCMPWZ256rrik |
| 31667 | { 15489, 4, 1, 0, 1252, 0, 0, 2466, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19ff8066829ULL }, // Inst #15489 = VPCMPWZ256rri |
| 31668 | { 15488, 9, 1, 0, 1353, 0, 0, 2457, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39ff8066819ULL }, // Inst #15488 = VPCMPWZ256rmik |
| 31669 | { 15487, 8, 1, 0, 1353, 0, 0, 2449, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19ff8066819ULL }, // Inst #15487 = VPCMPWZ256rmi |
| 31670 | { 15486, 5, 1, 0, 1251, 0, 0, 2444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29ff8066829ULL }, // Inst #15486 = VPCMPWZ128rrik |
| 31671 | { 15485, 4, 1, 0, 1251, 0, 0, 2440, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09ff8066829ULL }, // Inst #15485 = VPCMPWZ128rri |
| 31672 | { 15484, 9, 1, 0, 1344, 0, 0, 2431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29ff8066819ULL }, // Inst #15484 = VPCMPWZ128rmik |
| 31673 | { 15483, 8, 1, 0, 1344, 0, 0, 2423, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09ff8066819ULL }, // Inst #15483 = VPCMPWZ128rmi |
| 31674 | { 15482, 5, 1, 0, 1253, 0, 0, 2496, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9f78066829ULL }, // Inst #15482 = VPCMPUWZrrik |
| 31675 | { 15481, 4, 1, 0, 1253, 0, 0, 2492, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89f78066829ULL }, // Inst #15481 = VPCMPUWZrri |
| 31676 | { 15480, 9, 1, 0, 1354, 0, 0, 2483, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9f78066819ULL }, // Inst #15480 = VPCMPUWZrmik |
| 31677 | { 15479, 8, 1, 0, 1354, 0, 0, 2475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89f78066819ULL }, // Inst #15479 = VPCMPUWZrmi |
| 31678 | { 15478, 5, 1, 0, 1252, 0, 0, 2470, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39f78066829ULL }, // Inst #15478 = VPCMPUWZ256rrik |
| 31679 | { 15477, 4, 1, 0, 1252, 0, 0, 2466, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19f78066829ULL }, // Inst #15477 = VPCMPUWZ256rri |
| 31680 | { 15476, 9, 1, 0, 1353, 0, 0, 2457, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39f78066819ULL }, // Inst #15476 = VPCMPUWZ256rmik |
| 31681 | { 15475, 8, 1, 0, 1353, 0, 0, 2449, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19f78066819ULL }, // Inst #15475 = VPCMPUWZ256rmi |
| 31682 | { 15474, 5, 1, 0, 1251, 0, 0, 2444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29f78066829ULL }, // Inst #15474 = VPCMPUWZ128rrik |
| 31683 | { 15473, 4, 1, 0, 1251, 0, 0, 2440, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09f78066829ULL }, // Inst #15473 = VPCMPUWZ128rri |
| 31684 | { 15472, 9, 1, 0, 1344, 0, 0, 2431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29f78066819ULL }, // Inst #15472 = VPCMPUWZ128rmik |
| 31685 | { 15471, 8, 1, 0, 1344, 0, 0, 2423, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09f78066819ULL }, // Inst #15471 = VPCMPUWZ128rmi |
| 31686 | { 15470, 5, 1, 0, 1253, 0, 0, 2574, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea8f78066829ULL }, // Inst #15470 = VPCMPUQZrrik |
| 31687 | { 15469, 4, 1, 0, 1253, 0, 0, 2570, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe88f78066829ULL }, // Inst #15469 = VPCMPUQZrri |
| 31688 | { 15468, 9, 1, 0, 1354, 0, 0, 2561, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8f78066819ULL }, // Inst #15468 = VPCMPUQZrmik |
| 31689 | { 15467, 8, 1, 0, 1354, 0, 0, 2553, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88f78066819ULL }, // Inst #15467 = VPCMPUQZrmi |
| 31690 | { 15466, 9, 1, 0, 1354, 0, 0, 2561, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a8f78066819ULL }, // Inst #15466 = VPCMPUQZrmbik |
| 31691 | { 15465, 8, 1, 0, 1354, 0, 0, 2553, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x988f78066819ULL }, // Inst #15465 = VPCMPUQZrmbi |
| 31692 | { 15464, 5, 1, 0, 1252, 0, 0, 2548, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc38f78066829ULL }, // Inst #15464 = VPCMPUQZ256rrik |
| 31693 | { 15463, 4, 1, 0, 1252, 0, 0, 2544, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc18f78066829ULL }, // Inst #15463 = VPCMPUQZ256rri |
| 31694 | { 15462, 9, 1, 0, 1353, 0, 0, 2535, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38f78066819ULL }, // Inst #15462 = VPCMPUQZ256rmik |
| 31695 | { 15461, 8, 1, 0, 1353, 0, 0, 2527, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18f78066819ULL }, // Inst #15461 = VPCMPUQZ256rmi |
| 31696 | { 15460, 9, 1, 0, 1353, 0, 0, 2535, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x938f78066819ULL }, // Inst #15460 = VPCMPUQZ256rmbik |
| 31697 | { 15459, 8, 1, 0, 1353, 0, 0, 2527, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x918f78066819ULL }, // Inst #15459 = VPCMPUQZ256rmbi |
| 31698 | { 15458, 5, 1, 0, 1251, 0, 0, 2522, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa28f78066829ULL }, // Inst #15458 = VPCMPUQZ128rrik |
| 31699 | { 15457, 4, 1, 0, 1251, 0, 0, 2518, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa08f78066829ULL }, // Inst #15457 = VPCMPUQZ128rri |
| 31700 | { 15456, 9, 1, 0, 1344, 0, 0, 2509, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28f78066819ULL }, // Inst #15456 = VPCMPUQZ128rmik |
| 31701 | { 15455, 8, 1, 0, 1344, 0, 0, 2501, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08f78066819ULL }, // Inst #15455 = VPCMPUQZ128rmi |
| 31702 | { 15454, 9, 1, 0, 1344, 0, 0, 2509, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x928f78066819ULL }, // Inst #15454 = VPCMPUQZ128rmbik |
| 31703 | { 15453, 8, 1, 0, 1344, 0, 0, 2501, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x908f78066819ULL }, // Inst #15453 = VPCMPUQZ128rmbi |
| 31704 | { 15452, 5, 1, 0, 1253, 0, 0, 2652, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea8f78046829ULL }, // Inst #15452 = VPCMPUDZrrik |
| 31705 | { 15451, 4, 1, 0, 1253, 0, 0, 2648, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe88f78046829ULL }, // Inst #15451 = VPCMPUDZrri |
| 31706 | { 15450, 9, 1, 0, 1354, 0, 0, 2639, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8f78046819ULL }, // Inst #15450 = VPCMPUDZrmik |
| 31707 | { 15449, 8, 1, 0, 1354, 0, 0, 2631, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88f78046819ULL }, // Inst #15449 = VPCMPUDZrmi |
| 31708 | { 15448, 9, 1, 0, 1354, 0, 0, 2639, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a8f78046819ULL }, // Inst #15448 = VPCMPUDZrmbik |
| 31709 | { 15447, 8, 1, 0, 1354, 0, 0, 2631, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x788f78046819ULL }, // Inst #15447 = VPCMPUDZrmbi |
| 31710 | { 15446, 5, 1, 0, 1252, 0, 0, 2626, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc38f78046829ULL }, // Inst #15446 = VPCMPUDZ256rrik |
| 31711 | { 15445, 4, 1, 0, 1252, 0, 0, 2622, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc18f78046829ULL }, // Inst #15445 = VPCMPUDZ256rri |
| 31712 | { 15444, 9, 1, 0, 1353, 0, 0, 2613, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38f78046819ULL }, // Inst #15444 = VPCMPUDZ256rmik |
| 31713 | { 15443, 8, 1, 0, 1353, 0, 0, 2605, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18f78046819ULL }, // Inst #15443 = VPCMPUDZ256rmi |
| 31714 | { 15442, 9, 1, 0, 1353, 0, 0, 2613, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x738f78046819ULL }, // Inst #15442 = VPCMPUDZ256rmbik |
| 31715 | { 15441, 8, 1, 0, 1353, 0, 0, 2605, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x718f78046819ULL }, // Inst #15441 = VPCMPUDZ256rmbi |
| 31716 | { 15440, 5, 1, 0, 1251, 0, 0, 2600, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa28f78046829ULL }, // Inst #15440 = VPCMPUDZ128rrik |
| 31717 | { 15439, 4, 1, 0, 1251, 0, 0, 2596, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa08f78046829ULL }, // Inst #15439 = VPCMPUDZ128rri |
| 31718 | { 15438, 9, 1, 0, 1344, 0, 0, 2587, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28f78046819ULL }, // Inst #15438 = VPCMPUDZ128rmik |
| 31719 | { 15437, 8, 1, 0, 1344, 0, 0, 2579, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08f78046819ULL }, // Inst #15437 = VPCMPUDZ128rmi |
| 31720 | { 15436, 9, 1, 0, 1344, 0, 0, 2587, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x728f78046819ULL }, // Inst #15436 = VPCMPUDZ128rmbik |
| 31721 | { 15435, 8, 1, 0, 1344, 0, 0, 2579, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x708f78046819ULL }, // Inst #15435 = VPCMPUDZ128rmbi |
| 31722 | { 15434, 5, 1, 0, 1253, 0, 0, 5294, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9f78046829ULL }, // Inst #15434 = VPCMPUBZrrik |
| 31723 | { 15433, 4, 1, 0, 1253, 0, 0, 5290, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89f78046829ULL }, // Inst #15433 = VPCMPUBZrri |
| 31724 | { 15432, 9, 1, 0, 1354, 0, 0, 5281, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9f78046819ULL }, // Inst #15432 = VPCMPUBZrmik |
| 31725 | { 15431, 8, 1, 0, 1354, 0, 0, 5273, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89f78046819ULL }, // Inst #15431 = VPCMPUBZrmi |
| 31726 | { 15430, 5, 1, 0, 1252, 0, 0, 5268, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39f78046829ULL }, // Inst #15430 = VPCMPUBZ256rrik |
| 31727 | { 15429, 4, 1, 0, 1252, 0, 0, 5264, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19f78046829ULL }, // Inst #15429 = VPCMPUBZ256rri |
| 31728 | { 15428, 9, 1, 0, 1353, 0, 0, 5255, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39f78046819ULL }, // Inst #15428 = VPCMPUBZ256rmik |
| 31729 | { 15427, 8, 1, 0, 1353, 0, 0, 5247, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19f78046819ULL }, // Inst #15427 = VPCMPUBZ256rmi |
| 31730 | { 15426, 5, 1, 0, 1251, 0, 0, 5242, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29f78046829ULL }, // Inst #15426 = VPCMPUBZ128rrik |
| 31731 | { 15425, 4, 1, 0, 1251, 0, 0, 5238, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09f78046829ULL }, // Inst #15425 = VPCMPUBZ128rri |
| 31732 | { 15424, 9, 1, 0, 1344, 0, 0, 5229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29f78046819ULL }, // Inst #15424 = VPCMPUBZ128rmik |
| 31733 | { 15423, 8, 1, 0, 1344, 0, 0, 5221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09f78046819ULL }, // Inst #15423 = VPCMPUBZ128rmi |
| 31734 | { 15422, 5, 1, 0, 1253, 0, 0, 2574, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea8ff8066829ULL }, // Inst #15422 = VPCMPQZrrik |
| 31735 | { 15421, 4, 1, 0, 1253, 0, 0, 2570, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe88ff8066829ULL }, // Inst #15421 = VPCMPQZrri |
| 31736 | { 15420, 9, 1, 0, 1354, 0, 0, 2561, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8ff8066819ULL }, // Inst #15420 = VPCMPQZrmik |
| 31737 | { 15419, 8, 1, 0, 1354, 0, 0, 2553, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88ff8066819ULL }, // Inst #15419 = VPCMPQZrmi |
| 31738 | { 15418, 9, 1, 0, 1354, 0, 0, 2561, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a8ff8066819ULL }, // Inst #15418 = VPCMPQZrmbik |
| 31739 | { 15417, 8, 1, 0, 1354, 0, 0, 2553, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x988ff8066819ULL }, // Inst #15417 = VPCMPQZrmbi |
| 31740 | { 15416, 5, 1, 0, 1252, 0, 0, 2548, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc38ff8066829ULL }, // Inst #15416 = VPCMPQZ256rrik |
| 31741 | { 15415, 4, 1, 0, 1252, 0, 0, 2544, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc18ff8066829ULL }, // Inst #15415 = VPCMPQZ256rri |
| 31742 | { 15414, 9, 1, 0, 1353, 0, 0, 2535, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38ff8066819ULL }, // Inst #15414 = VPCMPQZ256rmik |
| 31743 | { 15413, 8, 1, 0, 1353, 0, 0, 2527, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18ff8066819ULL }, // Inst #15413 = VPCMPQZ256rmi |
| 31744 | { 15412, 9, 1, 0, 1353, 0, 0, 2535, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x938ff8066819ULL }, // Inst #15412 = VPCMPQZ256rmbik |
| 31745 | { 15411, 8, 1, 0, 1353, 0, 0, 2527, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x918ff8066819ULL }, // Inst #15411 = VPCMPQZ256rmbi |
| 31746 | { 15410, 5, 1, 0, 1251, 0, 0, 2522, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa28ff8066829ULL }, // Inst #15410 = VPCMPQZ128rrik |
| 31747 | { 15409, 4, 1, 0, 1251, 0, 0, 2518, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa08ff8066829ULL }, // Inst #15409 = VPCMPQZ128rri |
| 31748 | { 15408, 9, 1, 0, 1344, 0, 0, 2509, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28ff8066819ULL }, // Inst #15408 = VPCMPQZ128rmik |
| 31749 | { 15407, 8, 1, 0, 1344, 0, 0, 2501, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08ff8066819ULL }, // Inst #15407 = VPCMPQZ128rmi |
| 31750 | { 15406, 9, 1, 0, 1344, 0, 0, 2509, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x928ff8066819ULL }, // Inst #15406 = VPCMPQZ128rmbik |
| 31751 | { 15405, 8, 1, 0, 1344, 0, 0, 2501, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x908ff8066819ULL }, // Inst #15405 = VPCMPQZ128rmbi |
| 31752 | { 15404, 3, 0, 0, 266, 0, 2, 566, X86ImpOpBase + 386, 0, 0x3138046829ULL }, // Inst #15404 = VPCMPISTRMrri |
| 31753 | { 15403, 7, 0, 0, 265, 0, 2, 559, X86ImpOpBase + 386, 0|(1ULL<<MCID::MayLoad), 0x3138046819ULL }, // Inst #15403 = VPCMPISTRMrmi |
| 31754 | { 15402, 3, 0, 0, 264, 0, 2, 566, X86ImpOpBase + 384, 0, 0x31b8046829ULL }, // Inst #15402 = VPCMPISTRIrri |
| 31755 | { 15401, 7, 0, 0, 263, 0, 2, 559, X86ImpOpBase + 384, 0|(1ULL<<MCID::MayLoad), 0x31b8046819ULL }, // Inst #15401 = VPCMPISTRIrmi |
| 31756 | { 15400, 3, 1, 0, 1225, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb2b8002829ULL }, // Inst #15400 = VPCMPGTWrr |
| 31757 | { 15399, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb2b8002819ULL }, // Inst #15399 = VPCMPGTWrm |
| 31758 | { 15398, 4, 1, 0, 1253, 0, 0, 5559, X86ImpOpBase + 0, 0, 0xeab2f8002829ULL }, // Inst #15398 = VPCMPGTWZrrk |
| 31759 | { 15397, 3, 1, 0, 1256, 0, 0, 5556, X86ImpOpBase + 0, 0, 0xe8b2f8002829ULL }, // Inst #15397 = VPCMPGTWZrr |
| 31760 | { 15396, 8, 1, 0, 1354, 0, 0, 5548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab2f8002819ULL }, // Inst #15396 = VPCMPGTWZrmk |
| 31761 | { 15395, 7, 1, 0, 1354, 0, 0, 5541, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b2f8002819ULL }, // Inst #15395 = VPCMPGTWZrm |
| 31762 | { 15394, 4, 1, 0, 1252, 0, 0, 5537, X86ImpOpBase + 0, 0, 0xc3b2f8002829ULL }, // Inst #15394 = VPCMPGTWZ256rrk |
| 31763 | { 15393, 3, 1, 0, 1255, 0, 0, 5534, X86ImpOpBase + 0, 0, 0xc1b2f8002829ULL }, // Inst #15393 = VPCMPGTWZ256rr |
| 31764 | { 15392, 8, 1, 0, 1353, 0, 0, 5526, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b2f8002819ULL }, // Inst #15392 = VPCMPGTWZ256rmk |
| 31765 | { 15391, 7, 1, 0, 1353, 0, 0, 5519, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b2f8002819ULL }, // Inst #15391 = VPCMPGTWZ256rm |
| 31766 | { 15390, 4, 1, 0, 1251, 0, 0, 5515, X86ImpOpBase + 0, 0, 0xa2b2f8002829ULL }, // Inst #15390 = VPCMPGTWZ128rrk |
| 31767 | { 15389, 3, 1, 0, 1254, 0, 0, 5512, X86ImpOpBase + 0, 0, 0xa0b2f8002829ULL }, // Inst #15389 = VPCMPGTWZ128rr |
| 31768 | { 15388, 8, 1, 0, 1344, 0, 0, 5504, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b2f8002819ULL }, // Inst #15388 = VPCMPGTWZ128rmk |
| 31769 | { 15387, 7, 1, 0, 1344, 0, 0, 5497, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b2f8002819ULL }, // Inst #15387 = VPCMPGTWZ128rm |
| 31770 | { 15386, 3, 1, 0, 1226, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b2b8002829ULL }, // Inst #15386 = VPCMPGTWYrr |
| 31771 | { 15385, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b2b8002819ULL }, // Inst #15385 = VPCMPGTWYrm |
| 31772 | { 15384, 3, 1, 0, 813, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x9bb8004829ULL }, // Inst #15384 = VPCMPGTQrr |
| 31773 | { 15383, 7, 1, 0, 797, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9bb8004819ULL }, // Inst #15383 = VPCMPGTQrm |
| 31774 | { 15382, 4, 1, 0, 1253, 0, 0, 5493, X86ImpOpBase + 0, 0, 0xea9bf8024829ULL }, // Inst #15382 = VPCMPGTQZrrk |
| 31775 | { 15381, 3, 1, 0, 1256, 0, 0, 5490, X86ImpOpBase + 0, 0, 0xe89bf8024829ULL }, // Inst #15381 = VPCMPGTQZrr |
| 31776 | { 15380, 8, 1, 0, 1354, 0, 0, 5482, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9bf8024819ULL }, // Inst #15380 = VPCMPGTQZrmk |
| 31777 | { 15379, 8, 1, 0, 1354, 0, 0, 5482, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a9bf8024819ULL }, // Inst #15379 = VPCMPGTQZrmbk |
| 31778 | { 15378, 7, 1, 0, 1354, 0, 0, 5475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x989bf8024819ULL }, // Inst #15378 = VPCMPGTQZrmb |
| 31779 | { 15377, 7, 1, 0, 1354, 0, 0, 5475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89bf8024819ULL }, // Inst #15377 = VPCMPGTQZrm |
| 31780 | { 15376, 4, 1, 0, 1252, 0, 0, 5471, X86ImpOpBase + 0, 0, 0xc39bf8024829ULL }, // Inst #15376 = VPCMPGTQZ256rrk |
| 31781 | { 15375, 3, 1, 0, 1255, 0, 0, 5468, X86ImpOpBase + 0, 0, 0xc19bf8024829ULL }, // Inst #15375 = VPCMPGTQZ256rr |
| 31782 | { 15374, 8, 1, 0, 1353, 0, 0, 5460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39bf8024819ULL }, // Inst #15374 = VPCMPGTQZ256rmk |
| 31783 | { 15373, 8, 1, 0, 1353, 0, 0, 5460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x939bf8024819ULL }, // Inst #15373 = VPCMPGTQZ256rmbk |
| 31784 | { 15372, 7, 1, 0, 1353, 0, 0, 5453, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x919bf8024819ULL }, // Inst #15372 = VPCMPGTQZ256rmb |
| 31785 | { 15371, 7, 1, 0, 1353, 0, 0, 5453, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19bf8024819ULL }, // Inst #15371 = VPCMPGTQZ256rm |
| 31786 | { 15370, 4, 1, 0, 1251, 0, 0, 5449, X86ImpOpBase + 0, 0, 0xa29bf8024829ULL }, // Inst #15370 = VPCMPGTQZ128rrk |
| 31787 | { 15369, 3, 1, 0, 1254, 0, 0, 5446, X86ImpOpBase + 0, 0, 0xa09bf8024829ULL }, // Inst #15369 = VPCMPGTQZ128rr |
| 31788 | { 15368, 8, 1, 0, 1344, 0, 0, 5438, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29bf8024819ULL }, // Inst #15368 = VPCMPGTQZ128rmk |
| 31789 | { 15367, 8, 1, 0, 1344, 0, 0, 5438, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x929bf8024819ULL }, // Inst #15367 = VPCMPGTQZ128rmbk |
| 31790 | { 15366, 7, 1, 0, 1344, 0, 0, 5431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x909bf8024819ULL }, // Inst #15366 = VPCMPGTQZ128rmb |
| 31791 | { 15365, 7, 1, 0, 1344, 0, 0, 5431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09bf8024819ULL }, // Inst #15365 = VPCMPGTQZ128rm |
| 31792 | { 15364, 3, 1, 0, 902, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x19bb8004829ULL }, // Inst #15364 = VPCMPGTQYrr |
| 31793 | { 15363, 7, 1, 0, 871, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19bb8004819ULL }, // Inst #15363 = VPCMPGTQYrm |
| 31794 | { 15362, 3, 1, 0, 1225, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb338002829ULL }, // Inst #15362 = VPCMPGTDrr |
| 31795 | { 15361, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb338002819ULL }, // Inst #15361 = VPCMPGTDrm |
| 31796 | { 15360, 4, 1, 0, 1253, 0, 0, 5427, X86ImpOpBase + 0, 0, 0xeab378002829ULL }, // Inst #15360 = VPCMPGTDZrrk |
| 31797 | { 15359, 3, 1, 0, 1256, 0, 0, 5424, X86ImpOpBase + 0, 0, 0xe8b378002829ULL }, // Inst #15359 = VPCMPGTDZrr |
| 31798 | { 15358, 8, 1, 0, 1354, 0, 0, 5416, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab378002819ULL }, // Inst #15358 = VPCMPGTDZrmk |
| 31799 | { 15357, 8, 1, 0, 1354, 0, 0, 5416, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab378002819ULL }, // Inst #15357 = VPCMPGTDZrmbk |
| 31800 | { 15356, 7, 1, 0, 1354, 0, 0, 5409, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b378002819ULL }, // Inst #15356 = VPCMPGTDZrmb |
| 31801 | { 15355, 7, 1, 0, 1354, 0, 0, 5409, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b378002819ULL }, // Inst #15355 = VPCMPGTDZrm |
| 31802 | { 15354, 4, 1, 0, 1252, 0, 0, 5405, X86ImpOpBase + 0, 0, 0xc3b378002829ULL }, // Inst #15354 = VPCMPGTDZ256rrk |
| 31803 | { 15353, 3, 1, 0, 1255, 0, 0, 5402, X86ImpOpBase + 0, 0, 0xc1b378002829ULL }, // Inst #15353 = VPCMPGTDZ256rr |
| 31804 | { 15352, 8, 1, 0, 1353, 0, 0, 5394, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b378002819ULL }, // Inst #15352 = VPCMPGTDZ256rmk |
| 31805 | { 15351, 8, 1, 0, 1353, 0, 0, 5394, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b378002819ULL }, // Inst #15351 = VPCMPGTDZ256rmbk |
| 31806 | { 15350, 7, 1, 0, 1353, 0, 0, 5387, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b378002819ULL }, // Inst #15350 = VPCMPGTDZ256rmb |
| 31807 | { 15349, 7, 1, 0, 1353, 0, 0, 5387, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b378002819ULL }, // Inst #15349 = VPCMPGTDZ256rm |
| 31808 | { 15348, 4, 1, 0, 1251, 0, 0, 5383, X86ImpOpBase + 0, 0, 0xa2b378002829ULL }, // Inst #15348 = VPCMPGTDZ128rrk |
| 31809 | { 15347, 3, 1, 0, 1254, 0, 0, 5380, X86ImpOpBase + 0, 0, 0xa0b378002829ULL }, // Inst #15347 = VPCMPGTDZ128rr |
| 31810 | { 15346, 8, 1, 0, 1344, 0, 0, 5372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b378002819ULL }, // Inst #15346 = VPCMPGTDZ128rmk |
| 31811 | { 15345, 8, 1, 0, 1344, 0, 0, 5372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b378002819ULL }, // Inst #15345 = VPCMPGTDZ128rmbk |
| 31812 | { 15344, 7, 1, 0, 1344, 0, 0, 5365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b378002819ULL }, // Inst #15344 = VPCMPGTDZ128rmb |
| 31813 | { 15343, 7, 1, 0, 1344, 0, 0, 5365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b378002819ULL }, // Inst #15343 = VPCMPGTDZ128rm |
| 31814 | { 15342, 3, 1, 0, 1226, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b338002829ULL }, // Inst #15342 = VPCMPGTDYrr |
| 31815 | { 15341, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b338002819ULL }, // Inst #15341 = VPCMPGTDYrm |
| 31816 | { 15340, 3, 1, 0, 1225, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb238002829ULL }, // Inst #15340 = VPCMPGTBrr |
| 31817 | { 15339, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb238002819ULL }, // Inst #15339 = VPCMPGTBrm |
| 31818 | { 15338, 4, 1, 0, 1253, 0, 0, 5361, X86ImpOpBase + 0, 0, 0xeab278002829ULL }, // Inst #15338 = VPCMPGTBZrrk |
| 31819 | { 15337, 3, 1, 0, 1256, 0, 0, 5358, X86ImpOpBase + 0, 0, 0xe8b278002829ULL }, // Inst #15337 = VPCMPGTBZrr |
| 31820 | { 15336, 8, 1, 0, 1354, 0, 0, 5350, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab278002819ULL }, // Inst #15336 = VPCMPGTBZrmk |
| 31821 | { 15335, 7, 1, 0, 1354, 0, 0, 5343, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b278002819ULL }, // Inst #15335 = VPCMPGTBZrm |
| 31822 | { 15334, 4, 1, 0, 1252, 0, 0, 5339, X86ImpOpBase + 0, 0, 0xc3b278002829ULL }, // Inst #15334 = VPCMPGTBZ256rrk |
| 31823 | { 15333, 3, 1, 0, 1255, 0, 0, 5336, X86ImpOpBase + 0, 0, 0xc1b278002829ULL }, // Inst #15333 = VPCMPGTBZ256rr |
| 31824 | { 15332, 8, 1, 0, 1353, 0, 0, 5328, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b278002819ULL }, // Inst #15332 = VPCMPGTBZ256rmk |
| 31825 | { 15331, 7, 1, 0, 1353, 0, 0, 5321, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b278002819ULL }, // Inst #15331 = VPCMPGTBZ256rm |
| 31826 | { 15330, 4, 1, 0, 1251, 0, 0, 5317, X86ImpOpBase + 0, 0, 0xa2b278002829ULL }, // Inst #15330 = VPCMPGTBZ128rrk |
| 31827 | { 15329, 3, 1, 0, 1254, 0, 0, 5314, X86ImpOpBase + 0, 0, 0xa0b278002829ULL }, // Inst #15329 = VPCMPGTBZ128rr |
| 31828 | { 15328, 8, 1, 0, 1344, 0, 0, 5306, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b278002819ULL }, // Inst #15328 = VPCMPGTBZ128rmk |
| 31829 | { 15327, 7, 1, 0, 1344, 0, 0, 5299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b278002819ULL }, // Inst #15327 = VPCMPGTBZ128rm |
| 31830 | { 15326, 3, 1, 0, 1226, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b238002829ULL }, // Inst #15326 = VPCMPGTBYrr |
| 31831 | { 15325, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b238002819ULL }, // Inst #15325 = VPCMPGTBYrm |
| 31832 | { 15324, 3, 0, 0, 262, 2, 2, 566, X86ImpOpBase + 380, 0, 0x3038046829ULL }, // Inst #15324 = VPCMPESTRMrri |
| 31833 | { 15323, 7, 0, 0, 261, 2, 2, 559, X86ImpOpBase + 380, 0|(1ULL<<MCID::MayLoad), 0x3038046819ULL }, // Inst #15323 = VPCMPESTRMrmi |
| 31834 | { 15322, 3, 0, 0, 260, 2, 2, 566, X86ImpOpBase + 376, 0, 0x30b8046829ULL }, // Inst #15322 = VPCMPESTRIrri |
| 31835 | { 15321, 7, 0, 0, 259, 2, 2, 559, X86ImpOpBase + 376, 0|(1ULL<<MCID::MayLoad), 0x30b8046819ULL }, // Inst #15321 = VPCMPESTRIrmi |
| 31836 | { 15320, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xbab8002829ULL }, // Inst #15320 = VPCMPEQWrr |
| 31837 | { 15319, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xbab8002819ULL }, // Inst #15319 = VPCMPEQWrm |
| 31838 | { 15318, 4, 1, 0, 1253, 0, 0, 5559, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeabaf8002829ULL }, // Inst #15318 = VPCMPEQWZrrk |
| 31839 | { 15317, 3, 1, 0, 1253, 0, 0, 5556, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8baf8002829ULL }, // Inst #15317 = VPCMPEQWZrr |
| 31840 | { 15316, 8, 1, 0, 1354, 0, 0, 5548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabaf8002819ULL }, // Inst #15316 = VPCMPEQWZrmk |
| 31841 | { 15315, 7, 1, 0, 1354, 0, 0, 5541, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8baf8002819ULL }, // Inst #15315 = VPCMPEQWZrm |
| 31842 | { 15314, 4, 1, 0, 1252, 0, 0, 5537, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3baf8002829ULL }, // Inst #15314 = VPCMPEQWZ256rrk |
| 31843 | { 15313, 3, 1, 0, 1252, 0, 0, 5534, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1baf8002829ULL }, // Inst #15313 = VPCMPEQWZ256rr |
| 31844 | { 15312, 8, 1, 0, 1353, 0, 0, 5526, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3baf8002819ULL }, // Inst #15312 = VPCMPEQWZ256rmk |
| 31845 | { 15311, 7, 1, 0, 1353, 0, 0, 5519, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1baf8002819ULL }, // Inst #15311 = VPCMPEQWZ256rm |
| 31846 | { 15310, 4, 1, 0, 1251, 0, 0, 5515, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2baf8002829ULL }, // Inst #15310 = VPCMPEQWZ128rrk |
| 31847 | { 15309, 3, 1, 0, 1251, 0, 0, 5512, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0baf8002829ULL }, // Inst #15309 = VPCMPEQWZ128rr |
| 31848 | { 15308, 8, 1, 0, 1344, 0, 0, 5504, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2baf8002819ULL }, // Inst #15308 = VPCMPEQWZ128rmk |
| 31849 | { 15307, 7, 1, 0, 1344, 0, 0, 5497, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0baf8002819ULL }, // Inst #15307 = VPCMPEQWZ128rm |
| 31850 | { 15306, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1bab8002829ULL }, // Inst #15306 = VPCMPEQWYrr |
| 31851 | { 15305, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1bab8002819ULL }, // Inst #15305 = VPCMPEQWYrm |
| 31852 | { 15304, 3, 1, 0, 1034, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x94b8004829ULL }, // Inst #15304 = VPCMPEQQrr |
| 31853 | { 15303, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x94b8004819ULL }, // Inst #15303 = VPCMPEQQrm |
| 31854 | { 15302, 4, 1, 0, 1253, 0, 0, 5493, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea94f8024829ULL }, // Inst #15302 = VPCMPEQQZrrk |
| 31855 | { 15301, 3, 1, 0, 1253, 0, 0, 5490, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe894f8024829ULL }, // Inst #15301 = VPCMPEQQZrr |
| 31856 | { 15300, 8, 1, 0, 1354, 0, 0, 5482, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea94f8024819ULL }, // Inst #15300 = VPCMPEQQZrmk |
| 31857 | { 15299, 8, 1, 0, 1354, 0, 0, 5482, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a94f8024819ULL }, // Inst #15299 = VPCMPEQQZrmbk |
| 31858 | { 15298, 7, 1, 0, 1354, 0, 0, 5475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9894f8024819ULL }, // Inst #15298 = VPCMPEQQZrmb |
| 31859 | { 15297, 7, 1, 0, 1354, 0, 0, 5475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe894f8024819ULL }, // Inst #15297 = VPCMPEQQZrm |
| 31860 | { 15296, 4, 1, 0, 1252, 0, 0, 5471, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc394f8024829ULL }, // Inst #15296 = VPCMPEQQZ256rrk |
| 31861 | { 15295, 3, 1, 0, 1252, 0, 0, 5468, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc194f8024829ULL }, // Inst #15295 = VPCMPEQQZ256rr |
| 31862 | { 15294, 8, 1, 0, 1353, 0, 0, 5460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc394f8024819ULL }, // Inst #15294 = VPCMPEQQZ256rmk |
| 31863 | { 15293, 8, 1, 0, 1353, 0, 0, 5460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9394f8024819ULL }, // Inst #15293 = VPCMPEQQZ256rmbk |
| 31864 | { 15292, 7, 1, 0, 1353, 0, 0, 5453, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9194f8024819ULL }, // Inst #15292 = VPCMPEQQZ256rmb |
| 31865 | { 15291, 7, 1, 0, 1353, 0, 0, 5453, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc194f8024819ULL }, // Inst #15291 = VPCMPEQQZ256rm |
| 31866 | { 15290, 4, 1, 0, 1251, 0, 0, 5449, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa294f8024829ULL }, // Inst #15290 = VPCMPEQQZ128rrk |
| 31867 | { 15289, 3, 1, 0, 1251, 0, 0, 5446, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa094f8024829ULL }, // Inst #15289 = VPCMPEQQZ128rr |
| 31868 | { 15288, 8, 1, 0, 1344, 0, 0, 5438, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa294f8024819ULL }, // Inst #15288 = VPCMPEQQZ128rmk |
| 31869 | { 15287, 8, 1, 0, 1344, 0, 0, 5438, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9294f8024819ULL }, // Inst #15287 = VPCMPEQQZ128rmbk |
| 31870 | { 15286, 7, 1, 0, 1344, 0, 0, 5431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9094f8024819ULL }, // Inst #15286 = VPCMPEQQZ128rmb |
| 31871 | { 15285, 7, 1, 0, 1344, 0, 0, 5431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa094f8024819ULL }, // Inst #15285 = VPCMPEQQZ128rm |
| 31872 | { 15284, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x194b8004829ULL }, // Inst #15284 = VPCMPEQQYrr |
| 31873 | { 15283, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x194b8004819ULL }, // Inst #15283 = VPCMPEQQYrm |
| 31874 | { 15282, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xbb38002829ULL }, // Inst #15282 = VPCMPEQDrr |
| 31875 | { 15281, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xbb38002819ULL }, // Inst #15281 = VPCMPEQDrm |
| 31876 | { 15280, 4, 1, 0, 1253, 0, 0, 5427, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeabb78002829ULL }, // Inst #15280 = VPCMPEQDZrrk |
| 31877 | { 15279, 3, 1, 0, 1253, 0, 0, 5424, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8bb78002829ULL }, // Inst #15279 = VPCMPEQDZrr |
| 31878 | { 15278, 8, 1, 0, 1354, 0, 0, 5416, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeabb78002819ULL }, // Inst #15278 = VPCMPEQDZrmk |
| 31879 | { 15277, 8, 1, 0, 1354, 0, 0, 5416, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7abb78002819ULL }, // Inst #15277 = VPCMPEQDZrmbk |
| 31880 | { 15276, 7, 1, 0, 1354, 0, 0, 5409, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78bb78002819ULL }, // Inst #15276 = VPCMPEQDZrmb |
| 31881 | { 15275, 7, 1, 0, 1354, 0, 0, 5409, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8bb78002819ULL }, // Inst #15275 = VPCMPEQDZrm |
| 31882 | { 15274, 4, 1, 0, 1252, 0, 0, 5405, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3bb78002829ULL }, // Inst #15274 = VPCMPEQDZ256rrk |
| 31883 | { 15273, 3, 1, 0, 1252, 0, 0, 5402, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1bb78002829ULL }, // Inst #15273 = VPCMPEQDZ256rr |
| 31884 | { 15272, 8, 1, 0, 1353, 0, 0, 5394, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3bb78002819ULL }, // Inst #15272 = VPCMPEQDZ256rmk |
| 31885 | { 15271, 8, 1, 0, 1353, 0, 0, 5394, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73bb78002819ULL }, // Inst #15271 = VPCMPEQDZ256rmbk |
| 31886 | { 15270, 7, 1, 0, 1353, 0, 0, 5387, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71bb78002819ULL }, // Inst #15270 = VPCMPEQDZ256rmb |
| 31887 | { 15269, 7, 1, 0, 1353, 0, 0, 5387, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1bb78002819ULL }, // Inst #15269 = VPCMPEQDZ256rm |
| 31888 | { 15268, 4, 1, 0, 1251, 0, 0, 5383, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2bb78002829ULL }, // Inst #15268 = VPCMPEQDZ128rrk |
| 31889 | { 15267, 3, 1, 0, 1251, 0, 0, 5380, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0bb78002829ULL }, // Inst #15267 = VPCMPEQDZ128rr |
| 31890 | { 15266, 8, 1, 0, 1344, 0, 0, 5372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2bb78002819ULL }, // Inst #15266 = VPCMPEQDZ128rmk |
| 31891 | { 15265, 8, 1, 0, 1344, 0, 0, 5372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72bb78002819ULL }, // Inst #15265 = VPCMPEQDZ128rmbk |
| 31892 | { 15264, 7, 1, 0, 1344, 0, 0, 5365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70bb78002819ULL }, // Inst #15264 = VPCMPEQDZ128rmb |
| 31893 | { 15263, 7, 1, 0, 1344, 0, 0, 5365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0bb78002819ULL }, // Inst #15263 = VPCMPEQDZ128rm |
| 31894 | { 15262, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1bb38002829ULL }, // Inst #15262 = VPCMPEQDYrr |
| 31895 | { 15261, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1bb38002819ULL }, // Inst #15261 = VPCMPEQDYrm |
| 31896 | { 15260, 3, 1, 0, 144, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xba38002829ULL }, // Inst #15260 = VPCMPEQBrr |
| 31897 | { 15259, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xba38002819ULL }, // Inst #15259 = VPCMPEQBrm |
| 31898 | { 15258, 4, 1, 0, 1253, 0, 0, 5361, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaba78002829ULL }, // Inst #15258 = VPCMPEQBZrrk |
| 31899 | { 15257, 3, 1, 0, 1253, 0, 0, 5358, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ba78002829ULL }, // Inst #15257 = VPCMPEQBZrr |
| 31900 | { 15256, 8, 1, 0, 1354, 0, 0, 5350, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaba78002819ULL }, // Inst #15256 = VPCMPEQBZrmk |
| 31901 | { 15255, 7, 1, 0, 1354, 0, 0, 5343, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ba78002819ULL }, // Inst #15255 = VPCMPEQBZrm |
| 31902 | { 15254, 4, 1, 0, 1252, 0, 0, 5339, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ba78002829ULL }, // Inst #15254 = VPCMPEQBZ256rrk |
| 31903 | { 15253, 3, 1, 0, 1252, 0, 0, 5336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ba78002829ULL }, // Inst #15253 = VPCMPEQBZ256rr |
| 31904 | { 15252, 8, 1, 0, 1353, 0, 0, 5328, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ba78002819ULL }, // Inst #15252 = VPCMPEQBZ256rmk |
| 31905 | { 15251, 7, 1, 0, 1353, 0, 0, 5321, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ba78002819ULL }, // Inst #15251 = VPCMPEQBZ256rm |
| 31906 | { 15250, 4, 1, 0, 1251, 0, 0, 5317, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ba78002829ULL }, // Inst #15250 = VPCMPEQBZ128rrk |
| 31907 | { 15249, 3, 1, 0, 1251, 0, 0, 5314, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ba78002829ULL }, // Inst #15249 = VPCMPEQBZ128rr |
| 31908 | { 15248, 8, 1, 0, 1344, 0, 0, 5306, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ba78002819ULL }, // Inst #15248 = VPCMPEQBZ128rmk |
| 31909 | { 15247, 7, 1, 0, 1344, 0, 0, 5299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ba78002819ULL }, // Inst #15247 = VPCMPEQBZ128rm |
| 31910 | { 15246, 3, 1, 0, 454, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1ba38002829ULL }, // Inst #15246 = VPCMPEQBYrr |
| 31911 | { 15245, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ba38002819ULL }, // Inst #15245 = VPCMPEQBYrm |
| 31912 | { 15244, 5, 1, 0, 1253, 0, 0, 2652, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea8ff8046829ULL }, // Inst #15244 = VPCMPDZrrik |
| 31913 | { 15243, 4, 1, 0, 1253, 0, 0, 2648, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe88ff8046829ULL }, // Inst #15243 = VPCMPDZrri |
| 31914 | { 15242, 9, 1, 0, 1354, 0, 0, 2639, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8ff8046819ULL }, // Inst #15242 = VPCMPDZrmik |
| 31915 | { 15241, 8, 1, 0, 1354, 0, 0, 2631, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88ff8046819ULL }, // Inst #15241 = VPCMPDZrmi |
| 31916 | { 15240, 9, 1, 0, 1354, 0, 0, 2639, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a8ff8046819ULL }, // Inst #15240 = VPCMPDZrmbik |
| 31917 | { 15239, 8, 1, 0, 1354, 0, 0, 2631, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x788ff8046819ULL }, // Inst #15239 = VPCMPDZrmbi |
| 31918 | { 15238, 5, 1, 0, 1252, 0, 0, 2626, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc38ff8046829ULL }, // Inst #15238 = VPCMPDZ256rrik |
| 31919 | { 15237, 4, 1, 0, 1252, 0, 0, 2622, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc18ff8046829ULL }, // Inst #15237 = VPCMPDZ256rri |
| 31920 | { 15236, 9, 1, 0, 1353, 0, 0, 2613, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38ff8046819ULL }, // Inst #15236 = VPCMPDZ256rmik |
| 31921 | { 15235, 8, 1, 0, 1353, 0, 0, 2605, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18ff8046819ULL }, // Inst #15235 = VPCMPDZ256rmi |
| 31922 | { 15234, 9, 1, 0, 1353, 0, 0, 2613, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x738ff8046819ULL }, // Inst #15234 = VPCMPDZ256rmbik |
| 31923 | { 15233, 8, 1, 0, 1353, 0, 0, 2605, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x718ff8046819ULL }, // Inst #15233 = VPCMPDZ256rmbi |
| 31924 | { 15232, 5, 1, 0, 1251, 0, 0, 2600, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa28ff8046829ULL }, // Inst #15232 = VPCMPDZ128rrik |
| 31925 | { 15231, 4, 1, 0, 1251, 0, 0, 2596, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa08ff8046829ULL }, // Inst #15231 = VPCMPDZ128rri |
| 31926 | { 15230, 9, 1, 0, 1344, 0, 0, 2587, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28ff8046819ULL }, // Inst #15230 = VPCMPDZ128rmik |
| 31927 | { 15229, 8, 1, 0, 1344, 0, 0, 2579, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08ff8046819ULL }, // Inst #15229 = VPCMPDZ128rmi |
| 31928 | { 15228, 9, 1, 0, 1344, 0, 0, 2587, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x728ff8046819ULL }, // Inst #15228 = VPCMPDZ128rmbik |
| 31929 | { 15227, 8, 1, 0, 1344, 0, 0, 2579, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x708ff8046819ULL }, // Inst #15227 = VPCMPDZ128rmbi |
| 31930 | { 15226, 5, 1, 0, 1253, 0, 0, 5294, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea9ff8046829ULL }, // Inst #15226 = VPCMPBZrrik |
| 31931 | { 15225, 4, 1, 0, 1253, 0, 0, 5290, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe89ff8046829ULL }, // Inst #15225 = VPCMPBZrri |
| 31932 | { 15224, 9, 1, 0, 1354, 0, 0, 5281, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea9ff8046819ULL }, // Inst #15224 = VPCMPBZrmik |
| 31933 | { 15223, 8, 1, 0, 1354, 0, 0, 5273, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe89ff8046819ULL }, // Inst #15223 = VPCMPBZrmi |
| 31934 | { 15222, 5, 1, 0, 1252, 0, 0, 5268, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc39ff8046829ULL }, // Inst #15222 = VPCMPBZ256rrik |
| 31935 | { 15221, 4, 1, 0, 1252, 0, 0, 5264, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc19ff8046829ULL }, // Inst #15221 = VPCMPBZ256rri |
| 31936 | { 15220, 9, 1, 0, 1353, 0, 0, 5255, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc39ff8046819ULL }, // Inst #15220 = VPCMPBZ256rmik |
| 31937 | { 15219, 8, 1, 0, 1353, 0, 0, 5247, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc19ff8046819ULL }, // Inst #15219 = VPCMPBZ256rmi |
| 31938 | { 15218, 5, 1, 0, 1251, 0, 0, 5242, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa29ff8046829ULL }, // Inst #15218 = VPCMPBZ128rrik |
| 31939 | { 15217, 4, 1, 0, 1251, 0, 0, 5238, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa09ff8046829ULL }, // Inst #15217 = VPCMPBZ128rri |
| 31940 | { 15216, 9, 1, 0, 1344, 0, 0, 5229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa29ff8046819ULL }, // Inst #15216 = VPCMPBZ128rmik |
| 31941 | { 15215, 8, 1, 0, 1344, 0, 0, 5221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa09ff8046819ULL }, // Inst #15215 = VPCMPBZ128rmi |
| 31942 | { 15214, 4, 1, 0, 251, 0, 0, 2295, X86ImpOpBase + 0, 0, 0xd1580e802bULL }, // Inst #15214 = VPCMOVrrr_REV |
| 31943 | { 15213, 4, 1, 0, 251, 0, 0, 2295, X86ImpOpBase + 0, 0, 0xd1580c8029ULL }, // Inst #15213 = VPCMOVrrr |
| 31944 | { 15212, 8, 1, 0, 509, 0, 0, 4074, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xd1580e801bULL }, // Inst #15212 = VPCMOVrrm |
| 31945 | { 15211, 8, 1, 0, 508, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xd1580c8019ULL }, // Inst #15211 = VPCMOVrmr |
| 31946 | { 15210, 4, 1, 0, 346, 0, 0, 2283, X86ImpOpBase + 0, 0, 0x1d1580e802bULL }, // Inst #15210 = VPCMOVYrrr_REV |
| 31947 | { 15209, 4, 1, 0, 346, 0, 0, 2283, X86ImpOpBase + 0, 0, 0x1d1580c8029ULL }, // Inst #15209 = VPCMOVYrrr |
| 31948 | { 15208, 8, 1, 0, 507, 0, 0, 4066, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1d1580e801bULL }, // Inst #15208 = VPCMOVYrrm |
| 31949 | { 15207, 8, 1, 0, 506, 0, 0, 2275, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1d1580c8019ULL }, // Inst #15207 = VPCMOVYrmr |
| 31950 | { 15206, 4, 1, 0, 1193, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa238046829ULL }, // Inst #15206 = VPCLMULQDQrri |
| 31951 | { 15205, 8, 1, 0, 257, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa238046819ULL }, // Inst #15205 = VPCLMULQDQrmi |
| 31952 | { 15204, 4, 1, 0, 258, 0, 0, 931, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8a278046829ULL }, // Inst #15204 = VPCLMULQDQZrri |
| 31953 | { 15203, 8, 1, 0, 1959, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a278046819ULL }, // Inst #15203 = VPCLMULQDQZrmi |
| 31954 | { 15202, 4, 1, 0, 258, 0, 0, 927, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1a278046829ULL }, // Inst #15202 = VPCLMULQDQZ256rri |
| 31955 | { 15201, 8, 1, 0, 1960, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a278046819ULL }, // Inst #15201 = VPCLMULQDQZ256rmi |
| 31956 | { 15200, 4, 1, 0, 258, 0, 0, 919, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0a278046829ULL }, // Inst #15200 = VPCLMULQDQZ128rri |
| 31957 | { 15199, 8, 1, 0, 257, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a278046819ULL }, // Inst #15199 = VPCLMULQDQZ128rmi |
| 31958 | { 15198, 4, 1, 0, 258, 0, 0, 923, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a238046829ULL }, // Inst #15198 = VPCLMULQDQYrri |
| 31959 | { 15197, 8, 1, 0, 1646, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a238046819ULL }, // Inst #15197 = VPCLMULQDQYrmi |
| 31960 | { 15196, 2, 1, 0, 863, 0, 0, 557, X86ImpOpBase + 0, 0, 0x3cb8004829ULL }, // Inst #15196 = VPBROADCASTWrr |
| 31961 | { 15195, 6, 1, 0, 1669, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3cb8004819ULL }, // Inst #15195 = VPBROADCASTWrm |
| 31962 | { 15194, 3, 1, 0, 2161, 0, 0, 5218, X86ImpOpBase + 0, 0, 0xee3df8004829ULL }, // Inst #15194 = VPBROADCASTWrZrrkz |
| 31963 | { 15193, 4, 1, 0, 2161, 0, 0, 5214, X86ImpOpBase + 0, 0, 0xea3df8004829ULL }, // Inst #15193 = VPBROADCASTWrZrrk |
| 31964 | { 15192, 2, 1, 0, 2161, 0, 0, 5126, X86ImpOpBase + 0, 0, 0xe83df8004829ULL }, // Inst #15192 = VPBROADCASTWrZrr |
| 31965 | { 15191, 3, 1, 0, 2161, 0, 0, 5211, X86ImpOpBase + 0, 0, 0xc73df8004829ULL }, // Inst #15191 = VPBROADCASTWrZ256rrkz |
| 31966 | { 15190, 4, 1, 0, 2161, 0, 0, 5207, X86ImpOpBase + 0, 0, 0xc33df8004829ULL }, // Inst #15190 = VPBROADCASTWrZ256rrk |
| 31967 | { 15189, 2, 1, 0, 2161, 0, 0, 5117, X86ImpOpBase + 0, 0, 0xc13df8004829ULL }, // Inst #15189 = VPBROADCASTWrZ256rr |
| 31968 | { 15188, 3, 1, 0, 2162, 0, 0, 5204, X86ImpOpBase + 0, 0, 0xa63df8004829ULL }, // Inst #15188 = VPBROADCASTWrZ128rrkz |
| 31969 | { 15187, 4, 1, 0, 2162, 0, 0, 5200, X86ImpOpBase + 0, 0, 0xa23df8004829ULL }, // Inst #15187 = VPBROADCASTWrZ128rrk |
| 31970 | { 15186, 2, 1, 0, 2162, 0, 0, 4912, X86ImpOpBase + 0, 0, 0xa03df8004829ULL }, // Inst #15186 = VPBROADCASTWrZ128rr |
| 31971 | { 15185, 3, 1, 0, 2161, 0, 0, 5197, X86ImpOpBase + 0, 0, 0xee3cf8004829ULL }, // Inst #15185 = VPBROADCASTWZrrkz |
| 31972 | { 15184, 4, 1, 0, 2161, 0, 0, 5193, X86ImpOpBase + 0, 0, 0xea3cf8004829ULL }, // Inst #15184 = VPBROADCASTWZrrk |
| 31973 | { 15183, 2, 1, 0, 364, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xe83cf8004829ULL }, // Inst #15183 = VPBROADCASTWZrr |
| 31974 | { 15182, 7, 1, 0, 1317, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4e3cf8004819ULL }, // Inst #15182 = VPBROADCASTWZrmkz |
| 31975 | { 15181, 8, 1, 0, 1317, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4a3cf8004819ULL }, // Inst #15181 = VPBROADCASTWZrmk |
| 31976 | { 15180, 6, 1, 0, 1837, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x483cf8004819ULL }, // Inst #15180 = VPBROADCASTWZrm |
| 31977 | { 15179, 3, 1, 0, 2161, 0, 0, 3134, X86ImpOpBase + 0, 0, 0xc73cf8004829ULL }, // Inst #15179 = VPBROADCASTWZ256rrkz |
| 31978 | { 15178, 4, 1, 0, 2161, 0, 0, 3130, X86ImpOpBase + 0, 0, 0xc33cf8004829ULL }, // Inst #15178 = VPBROADCASTWZ256rrk |
| 31979 | { 15177, 2, 1, 0, 364, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xc13cf8004829ULL }, // Inst #15177 = VPBROADCASTWZ256rr |
| 31980 | { 15176, 7, 1, 0, 1317, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x473cf8004819ULL }, // Inst #15176 = VPBROADCASTWZ256rmkz |
| 31981 | { 15175, 8, 1, 0, 1317, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x433cf8004819ULL }, // Inst #15175 = VPBROADCASTWZ256rmk |
| 31982 | { 15174, 6, 1, 0, 1837, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x413cf8004819ULL }, // Inst #15174 = VPBROADCASTWZ256rm |
| 31983 | { 15173, 3, 1, 0, 1727, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa63cf8004829ULL }, // Inst #15173 = VPBROADCASTWZ128rrkz |
| 31984 | { 15172, 4, 1, 0, 1727, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa23cf8004829ULL }, // Inst #15172 = VPBROADCASTWZ128rrk |
| 31985 | { 15171, 2, 1, 0, 184, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03cf8004829ULL }, // Inst #15171 = VPBROADCASTWZ128rr |
| 31986 | { 15170, 7, 1, 0, 1425, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x463cf8004819ULL }, // Inst #15170 = VPBROADCASTWZ128rmkz |
| 31987 | { 15169, 8, 1, 0, 1425, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x423cf8004819ULL }, // Inst #15169 = VPBROADCASTWZ128rmk |
| 31988 | { 15168, 6, 1, 0, 1869, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x403cf8004819ULL }, // Inst #15168 = VPBROADCASTWZ128rm |
| 31989 | { 15167, 2, 1, 0, 364, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x13cb8004829ULL }, // Inst #15167 = VPBROADCASTWYrr |
| 31990 | { 15166, 6, 1, 0, 1681, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x13cb8004819ULL }, // Inst #15166 = VPBROADCASTWYrm |
| 31991 | { 15165, 2, 1, 0, 1416, 0, 0, 557, X86ImpOpBase + 0, 0, 0x2cb8004829ULL }, // Inst #15165 = VPBROADCASTQrr |
| 31992 | { 15164, 6, 1, 0, 828, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2cb8004819ULL }, // Inst #15164 = VPBROADCASTQrm |
| 31993 | { 15163, 3, 1, 0, 2161, 0, 0, 5190, X86ImpOpBase + 0, 0, 0xee3e78024829ULL }, // Inst #15163 = VPBROADCASTQrZrrkz |
| 31994 | { 15162, 4, 1, 0, 2161, 0, 0, 5186, X86ImpOpBase + 0, 0, 0xea3e78024829ULL }, // Inst #15162 = VPBROADCASTQrZrrk |
| 31995 | { 15161, 2, 1, 0, 2161, 0, 0, 5184, X86ImpOpBase + 0, 0, 0xe83e78024829ULL }, // Inst #15161 = VPBROADCASTQrZrr |
| 31996 | { 15160, 3, 1, 0, 2161, 0, 0, 5181, X86ImpOpBase + 0, 0, 0xc73e78024829ULL }, // Inst #15160 = VPBROADCASTQrZ256rrkz |
| 31997 | { 15159, 4, 1, 0, 2161, 0, 0, 5177, X86ImpOpBase + 0, 0, 0xc33e78024829ULL }, // Inst #15159 = VPBROADCASTQrZ256rrk |
| 31998 | { 15158, 2, 1, 0, 2161, 0, 0, 5175, X86ImpOpBase + 0, 0, 0xc13e78024829ULL }, // Inst #15158 = VPBROADCASTQrZ256rr |
| 31999 | { 15157, 3, 1, 0, 2162, 0, 0, 5172, X86ImpOpBase + 0, 0, 0xa63e78024829ULL }, // Inst #15157 = VPBROADCASTQrZ128rrkz |
| 32000 | { 15156, 4, 1, 0, 2162, 0, 0, 5168, X86ImpOpBase + 0, 0, 0xa23e78024829ULL }, // Inst #15156 = VPBROADCASTQrZ128rrk |
| 32001 | { 15155, 2, 1, 0, 2162, 0, 0, 4902, X86ImpOpBase + 0, 0, 0xa03e78024829ULL }, // Inst #15155 = VPBROADCASTQrZ128rr |
| 32002 | { 15154, 3, 1, 0, 364, 0, 0, 2420, X86ImpOpBase + 0, 0, 0xee2cf8024829ULL }, // Inst #15154 = VPBROADCASTQZrrkz |
| 32003 | { 15153, 4, 1, 0, 364, 0, 0, 2416, X86ImpOpBase + 0, 0, 0xea2cf8024829ULL }, // Inst #15153 = VPBROADCASTQZrrk |
| 32004 | { 15152, 2, 1, 0, 364, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xe82cf8024829ULL }, // Inst #15152 = VPBROADCASTQZrr |
| 32005 | { 15151, 7, 1, 0, 1829, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8e2cf8024819ULL }, // Inst #15151 = VPBROADCASTQZrmkz |
| 32006 | { 15150, 8, 1, 0, 1829, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x8a2cf8024819ULL }, // Inst #15150 = VPBROADCASTQZrmk |
| 32007 | { 15149, 6, 1, 0, 1822, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x882cf8024819ULL }, // Inst #15149 = VPBROADCASTQZrm |
| 32008 | { 15148, 3, 1, 0, 364, 0, 0, 2413, X86ImpOpBase + 0, 0, 0xc72cf8024829ULL }, // Inst #15148 = VPBROADCASTQZ256rrkz |
| 32009 | { 15147, 4, 1, 0, 364, 0, 0, 2409, X86ImpOpBase + 0, 0, 0xc32cf8024829ULL }, // Inst #15147 = VPBROADCASTQZ256rrk |
| 32010 | { 15146, 2, 1, 0, 364, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xc12cf8024829ULL }, // Inst #15146 = VPBROADCASTQZ256rr |
| 32011 | { 15145, 7, 1, 0, 1320, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x872cf8024819ULL }, // Inst #15145 = VPBROADCASTQZ256rmkz |
| 32012 | { 15144, 8, 1, 0, 1320, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x832cf8024819ULL }, // Inst #15144 = VPBROADCASTQZ256rmk |
| 32013 | { 15143, 6, 1, 0, 1822, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x812cf8024819ULL }, // Inst #15143 = VPBROADCASTQZ256rm |
| 32014 | { 15142, 3, 1, 0, 184, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa62cf8024829ULL }, // Inst #15142 = VPBROADCASTQZ128rrkz |
| 32015 | { 15141, 4, 1, 0, 184, 0, 0, 2766, X86ImpOpBase + 0, 0, 0xa22cf8024829ULL }, // Inst #15141 = VPBROADCASTQZ128rrk |
| 32016 | { 15140, 2, 1, 0, 184, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02cf8024829ULL }, // Inst #15140 = VPBROADCASTQZ128rr |
| 32017 | { 15139, 7, 1, 0, 1300, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x862cf8024819ULL }, // Inst #15139 = VPBROADCASTQZ128rmkz |
| 32018 | { 15138, 8, 1, 0, 1300, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x822cf8024819ULL }, // Inst #15138 = VPBROADCASTQZ128rmk |
| 32019 | { 15137, 6, 1, 0, 1795, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x802cf8024819ULL }, // Inst #15137 = VPBROADCASTQZ128rm |
| 32020 | { 15136, 2, 1, 0, 364, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x12cb8004829ULL }, // Inst #15136 = VPBROADCASTQYrr |
| 32021 | { 15135, 6, 1, 0, 831, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x12cb8004819ULL }, // Inst #15135 = VPBROADCASTQYrm |
| 32022 | { 15134, 2, 1, 0, 2298, 0, 0, 5166, X86ImpOpBase + 0, 0, 0xe81d78005029ULL }, // Inst #15134 = VPBROADCASTMW2DZrr |
| 32023 | { 15133, 2, 1, 0, 2298, 0, 0, 5164, X86ImpOpBase + 0, 0, 0xc11d78005029ULL }, // Inst #15133 = VPBROADCASTMW2DZ256rr |
| 32024 | { 15132, 2, 1, 0, 2298, 0, 0, 5162, X86ImpOpBase + 0, 0, 0xa01d78005029ULL }, // Inst #15132 = VPBROADCASTMW2DZ128rr |
| 32025 | { 15131, 2, 1, 0, 2298, 0, 0, 5160, X86ImpOpBase + 0, 0, 0xe81578025029ULL }, // Inst #15131 = VPBROADCASTMB2QZrr |
| 32026 | { 15130, 2, 1, 0, 2298, 0, 0, 5158, X86ImpOpBase + 0, 0, 0xc11578025029ULL }, // Inst #15130 = VPBROADCASTMB2QZ256rr |
| 32027 | { 15129, 2, 1, 0, 2298, 0, 0, 5156, X86ImpOpBase + 0, 0, 0xa01578025029ULL }, // Inst #15129 = VPBROADCASTMB2QZ128rr |
| 32028 | { 15128, 2, 1, 0, 1416, 0, 0, 557, X86ImpOpBase + 0, 0, 0x2c38004829ULL }, // Inst #15128 = VPBROADCASTDrr |
| 32029 | { 15127, 6, 1, 0, 828, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2c38004819ULL }, // Inst #15127 = VPBROADCASTDrm |
| 32030 | { 15126, 3, 1, 0, 2161, 0, 0, 5153, X86ImpOpBase + 0, 0, 0xee3e78004829ULL }, // Inst #15126 = VPBROADCASTDrZrrkz |
| 32031 | { 15125, 4, 1, 0, 2161, 0, 0, 5149, X86ImpOpBase + 0, 0, 0xea3e78004829ULL }, // Inst #15125 = VPBROADCASTDrZrrk |
| 32032 | { 15124, 2, 1, 0, 2161, 0, 0, 5126, X86ImpOpBase + 0, 0, 0xe83e78004829ULL }, // Inst #15124 = VPBROADCASTDrZrr |
| 32033 | { 15123, 3, 1, 0, 2161, 0, 0, 5146, X86ImpOpBase + 0, 0, 0xc73e78004829ULL }, // Inst #15123 = VPBROADCASTDrZ256rrkz |
| 32034 | { 15122, 4, 1, 0, 2161, 0, 0, 5142, X86ImpOpBase + 0, 0, 0xc33e78004829ULL }, // Inst #15122 = VPBROADCASTDrZ256rrk |
| 32035 | { 15121, 2, 1, 0, 2161, 0, 0, 5117, X86ImpOpBase + 0, 0, 0xc13e78004829ULL }, // Inst #15121 = VPBROADCASTDrZ256rr |
| 32036 | { 15120, 3, 1, 0, 2162, 0, 0, 5139, X86ImpOpBase + 0, 0, 0xa63e78004829ULL }, // Inst #15120 = VPBROADCASTDrZ128rrkz |
| 32037 | { 15119, 4, 1, 0, 2162, 0, 0, 5135, X86ImpOpBase + 0, 0, 0xa23e78004829ULL }, // Inst #15119 = VPBROADCASTDrZ128rrk |
| 32038 | { 15118, 2, 1, 0, 2162, 0, 0, 4912, X86ImpOpBase + 0, 0, 0xa03e78004829ULL }, // Inst #15118 = VPBROADCASTDrZ128rr |
| 32039 | { 15117, 3, 1, 0, 364, 0, 0, 2350, X86ImpOpBase + 0, 0, 0xee2c78004829ULL }, // Inst #15117 = VPBROADCASTDZrrkz |
| 32040 | { 15116, 4, 1, 0, 364, 0, 0, 2346, X86ImpOpBase + 0, 0, 0xea2c78004829ULL }, // Inst #15116 = VPBROADCASTDZrrk |
| 32041 | { 15115, 2, 1, 0, 364, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xe82c78004829ULL }, // Inst #15115 = VPBROADCASTDZrr |
| 32042 | { 15114, 7, 1, 0, 1829, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6e2c78004819ULL }, // Inst #15114 = VPBROADCASTDZrmkz |
| 32043 | { 15113, 8, 1, 0, 1829, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x6a2c78004819ULL }, // Inst #15113 = VPBROADCASTDZrmk |
| 32044 | { 15112, 6, 1, 0, 1822, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x682c78004819ULL }, // Inst #15112 = VPBROADCASTDZrm |
| 32045 | { 15111, 3, 1, 0, 364, 0, 0, 2320, X86ImpOpBase + 0, 0, 0xc72c78004829ULL }, // Inst #15111 = VPBROADCASTDZ256rrkz |
| 32046 | { 15110, 4, 1, 0, 364, 0, 0, 2316, X86ImpOpBase + 0, 0, 0xc32c78004829ULL }, // Inst #15110 = VPBROADCASTDZ256rrk |
| 32047 | { 15109, 2, 1, 0, 364, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xc12c78004829ULL }, // Inst #15109 = VPBROADCASTDZ256rr |
| 32048 | { 15108, 7, 1, 0, 1320, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x672c78004819ULL }, // Inst #15108 = VPBROADCASTDZ256rmkz |
| 32049 | { 15107, 8, 1, 0, 1320, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x632c78004819ULL }, // Inst #15107 = VPBROADCASTDZ256rmk |
| 32050 | { 15106, 6, 1, 0, 1822, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x612c78004819ULL }, // Inst #15106 = VPBROADCASTDZ256rm |
| 32051 | { 15105, 3, 1, 0, 184, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa62c78004829ULL }, // Inst #15105 = VPBROADCASTDZ128rrkz |
| 32052 | { 15104, 4, 1, 0, 184, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa22c78004829ULL }, // Inst #15104 = VPBROADCASTDZ128rrk |
| 32053 | { 15103, 2, 1, 0, 184, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02c78004829ULL }, // Inst #15103 = VPBROADCASTDZ128rr |
| 32054 | { 15102, 7, 1, 0, 1300, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x662c78004819ULL }, // Inst #15102 = VPBROADCASTDZ128rmkz |
| 32055 | { 15101, 8, 1, 0, 1300, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x622c78004819ULL }, // Inst #15101 = VPBROADCASTDZ128rmk |
| 32056 | { 15100, 6, 1, 0, 1795, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x602c78004819ULL }, // Inst #15100 = VPBROADCASTDZ128rm |
| 32057 | { 15099, 2, 1, 0, 364, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x12c38004829ULL }, // Inst #15099 = VPBROADCASTDYrr |
| 32058 | { 15098, 6, 1, 0, 831, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x12c38004819ULL }, // Inst #15098 = VPBROADCASTDYrm |
| 32059 | { 15097, 2, 1, 0, 863, 0, 0, 557, X86ImpOpBase + 0, 0, 0x3c38004829ULL }, // Inst #15097 = VPBROADCASTBrr |
| 32060 | { 15096, 6, 1, 0, 949, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3c38004819ULL }, // Inst #15096 = VPBROADCASTBrm |
| 32061 | { 15095, 3, 1, 0, 2161, 0, 0, 5132, X86ImpOpBase + 0, 0, 0xee3d78004829ULL }, // Inst #15095 = VPBROADCASTBrZrrkz |
| 32062 | { 15094, 4, 1, 0, 2161, 0, 0, 5128, X86ImpOpBase + 0, 0, 0xea3d78004829ULL }, // Inst #15094 = VPBROADCASTBrZrrk |
| 32063 | { 15093, 2, 1, 0, 2161, 0, 0, 5126, X86ImpOpBase + 0, 0, 0xe83d78004829ULL }, // Inst #15093 = VPBROADCASTBrZrr |
| 32064 | { 15092, 3, 1, 0, 2161, 0, 0, 5123, X86ImpOpBase + 0, 0, 0xc73d78004829ULL }, // Inst #15092 = VPBROADCASTBrZ256rrkz |
| 32065 | { 15091, 4, 1, 0, 2161, 0, 0, 5119, X86ImpOpBase + 0, 0, 0xc33d78004829ULL }, // Inst #15091 = VPBROADCASTBrZ256rrk |
| 32066 | { 15090, 2, 1, 0, 2161, 0, 0, 5117, X86ImpOpBase + 0, 0, 0xc13d78004829ULL }, // Inst #15090 = VPBROADCASTBrZ256rr |
| 32067 | { 15089, 3, 1, 0, 2162, 0, 0, 5114, X86ImpOpBase + 0, 0, 0xa63d78004829ULL }, // Inst #15089 = VPBROADCASTBrZ128rrkz |
| 32068 | { 15088, 4, 1, 0, 2162, 0, 0, 5110, X86ImpOpBase + 0, 0, 0xa23d78004829ULL }, // Inst #15088 = VPBROADCASTBrZ128rrk |
| 32069 | { 15087, 2, 1, 0, 2162, 0, 0, 4912, X86ImpOpBase + 0, 0, 0xa03d78004829ULL }, // Inst #15087 = VPBROADCASTBrZ128rr |
| 32070 | { 15086, 3, 1, 0, 2161, 0, 0, 5107, X86ImpOpBase + 0, 0, 0xee3c78004829ULL }, // Inst #15086 = VPBROADCASTBZrrkz |
| 32071 | { 15085, 4, 1, 0, 2161, 0, 0, 5103, X86ImpOpBase + 0, 0, 0xea3c78004829ULL }, // Inst #15085 = VPBROADCASTBZrrk |
| 32072 | { 15084, 2, 1, 0, 364, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xe83c78004829ULL }, // Inst #15084 = VPBROADCASTBZrr |
| 32073 | { 15083, 7, 1, 0, 1317, 0, 0, 4980, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2e3c78004819ULL }, // Inst #15083 = VPBROADCASTBZrmkz |
| 32074 | { 15082, 8, 1, 0, 1317, 0, 0, 4972, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2a3c78004819ULL }, // Inst #15082 = VPBROADCASTBZrmk |
| 32075 | { 15081, 6, 1, 0, 1837, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x283c78004819ULL }, // Inst #15081 = VPBROADCASTBZrm |
| 32076 | { 15080, 3, 1, 0, 2161, 0, 0, 5100, X86ImpOpBase + 0, 0, 0xc73c78004829ULL }, // Inst #15080 = VPBROADCASTBZ256rrkz |
| 32077 | { 15079, 4, 1, 0, 2161, 0, 0, 5096, X86ImpOpBase + 0, 0, 0xc33c78004829ULL }, // Inst #15079 = VPBROADCASTBZ256rrk |
| 32078 | { 15078, 2, 1, 0, 364, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xc13c78004829ULL }, // Inst #15078 = VPBROADCASTBZ256rr |
| 32079 | { 15077, 7, 1, 0, 1317, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x273c78004819ULL }, // Inst #15077 = VPBROADCASTBZ256rmkz |
| 32080 | { 15076, 8, 1, 0, 1317, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x233c78004819ULL }, // Inst #15076 = VPBROADCASTBZ256rmk |
| 32081 | { 15075, 6, 1, 0, 1837, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x213c78004819ULL }, // Inst #15075 = VPBROADCASTBZ256rm |
| 32082 | { 15074, 3, 1, 0, 1727, 0, 0, 4948, X86ImpOpBase + 0, 0, 0xa63c78004829ULL }, // Inst #15074 = VPBROADCASTBZ128rrkz |
| 32083 | { 15073, 4, 1, 0, 1727, 0, 0, 4944, X86ImpOpBase + 0, 0, 0xa23c78004829ULL }, // Inst #15073 = VPBROADCASTBZ128rrk |
| 32084 | { 15072, 2, 1, 0, 184, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03c78004829ULL }, // Inst #15072 = VPBROADCASTBZ128rr |
| 32085 | { 15071, 7, 1, 0, 1425, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x263c78004819ULL }, // Inst #15071 = VPBROADCASTBZ128rmkz |
| 32086 | { 15070, 8, 1, 0, 1425, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x223c78004819ULL }, // Inst #15070 = VPBROADCASTBZ128rmk |
| 32087 | { 15069, 6, 1, 0, 1869, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x203c78004819ULL }, // Inst #15069 = VPBROADCASTBZ128rm |
| 32088 | { 15068, 2, 1, 0, 364, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x13c38004829ULL }, // Inst #15068 = VPBROADCASTBYrr |
| 32089 | { 15067, 6, 1, 0, 867, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x13c38004819ULL }, // Inst #15067 = VPBROADCASTBYrm |
| 32090 | { 15066, 4, 1, 0, 1686, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x8738046829ULL }, // Inst #15066 = VPBLENDWrri |
| 32091 | { 15065, 8, 1, 0, 1674, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8738046819ULL }, // Inst #15065 = VPBLENDWrmi |
| 32092 | { 15064, 4, 1, 0, 1484, 0, 0, 923, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x18738046829ULL }, // Inst #15064 = VPBLENDWYrri |
| 32093 | { 15063, 8, 1, 0, 1648, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18738046819ULL }, // Inst #15063 = VPBLENDWYrmi |
| 32094 | { 15062, 4, 1, 0, 1634, 0, 0, 2295, X86ImpOpBase + 0, 0, 0xa6380c6829ULL }, // Inst #15062 = VPBLENDVBrrr |
| 32095 | { 15061, 8, 1, 0, 1632, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6380c6819ULL }, // Inst #15061 = VPBLENDVBrmr |
| 32096 | { 15060, 4, 1, 0, 1964, 0, 0, 2283, X86ImpOpBase + 0, 0, 0x1a6380c6829ULL }, // Inst #15060 = VPBLENDVBYrrr |
| 32097 | { 15059, 8, 1, 0, 1962, 0, 0, 2275, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a6380c6819ULL }, // Inst #15059 = VPBLENDVBYrmr |
| 32098 | { 15058, 4, 1, 0, 1901, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeeb378024829ULL }, // Inst #15058 = VPBLENDMWZrrkz |
| 32099 | { 15057, 4, 1, 0, 1901, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeab378024829ULL }, // Inst #15057 = VPBLENDMWZrrk |
| 32100 | { 15056, 3, 1, 0, 503, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b378024829ULL }, // Inst #15056 = VPBLENDMWZrr |
| 32101 | { 15055, 8, 1, 0, 1942, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb378024819ULL }, // Inst #15055 = VPBLENDMWZrmkz |
| 32102 | { 15054, 8, 1, 0, 1942, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab378024819ULL }, // Inst #15054 = VPBLENDMWZrmk |
| 32103 | { 15053, 7, 1, 0, 1332, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b378024819ULL }, // Inst #15053 = VPBLENDMWZrm |
| 32104 | { 15052, 4, 1, 0, 2265, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7b378024829ULL }, // Inst #15052 = VPBLENDMWZ256rrkz |
| 32105 | { 15051, 4, 1, 0, 2265, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc3b378024829ULL }, // Inst #15051 = VPBLENDMWZ256rrk |
| 32106 | { 15050, 3, 1, 0, 1238, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b378024829ULL }, // Inst #15050 = VPBLENDMWZ256rr |
| 32107 | { 15049, 8, 1, 0, 2260, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b378024819ULL }, // Inst #15049 = VPBLENDMWZ256rmkz |
| 32108 | { 15048, 8, 1, 0, 2260, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b378024819ULL }, // Inst #15048 = VPBLENDMWZ256rmk |
| 32109 | { 15047, 7, 1, 0, 1331, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b378024819ULL }, // Inst #15047 = VPBLENDMWZ256rm |
| 32110 | { 15046, 4, 1, 0, 2264, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6b378024829ULL }, // Inst #15046 = VPBLENDMWZ128rrkz |
| 32111 | { 15045, 4, 1, 0, 2264, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa2b378024829ULL }, // Inst #15045 = VPBLENDMWZ128rrk |
| 32112 | { 15044, 3, 1, 0, 1237, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b378024829ULL }, // Inst #15044 = VPBLENDMWZ128rr |
| 32113 | { 15043, 8, 1, 0, 2259, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b378024819ULL }, // Inst #15043 = VPBLENDMWZ128rmkz |
| 32114 | { 15042, 8, 1, 0, 2259, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b378024819ULL }, // Inst #15042 = VPBLENDMWZ128rmk |
| 32115 | { 15041, 7, 1, 0, 1306, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b378024819ULL }, // Inst #15041 = VPBLENDMWZ128rm |
| 32116 | { 15040, 4, 1, 0, 503, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeeb278024829ULL }, // Inst #15040 = VPBLENDMQZrrkz |
| 32117 | { 15039, 4, 1, 0, 503, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeab278024829ULL }, // Inst #15039 = VPBLENDMQZrrk |
| 32118 | { 15038, 3, 1, 0, 503, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b278024829ULL }, // Inst #15038 = VPBLENDMQZrr |
| 32119 | { 15037, 8, 1, 0, 1332, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb278024819ULL }, // Inst #15037 = VPBLENDMQZrmkz |
| 32120 | { 15036, 8, 1, 0, 1332, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab278024819ULL }, // Inst #15036 = VPBLENDMQZrmk |
| 32121 | { 15035, 8, 1, 0, 1332, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb278024819ULL }, // Inst #15035 = VPBLENDMQZrmbkz |
| 32122 | { 15034, 8, 1, 0, 1332, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab278024819ULL }, // Inst #15034 = VPBLENDMQZrmbk |
| 32123 | { 15033, 7, 1, 0, 1332, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b278024819ULL }, // Inst #15033 = VPBLENDMQZrmb |
| 32124 | { 15032, 7, 1, 0, 1332, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b278024819ULL }, // Inst #15032 = VPBLENDMQZrm |
| 32125 | { 15031, 4, 1, 0, 1238, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc7b278024829ULL }, // Inst #15031 = VPBLENDMQZ256rrkz |
| 32126 | { 15030, 4, 1, 0, 1238, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc3b278024829ULL }, // Inst #15030 = VPBLENDMQZ256rrk |
| 32127 | { 15029, 3, 1, 0, 1238, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b278024829ULL }, // Inst #15029 = VPBLENDMQZ256rr |
| 32128 | { 15028, 8, 1, 0, 1331, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b278024819ULL }, // Inst #15028 = VPBLENDMQZ256rmkz |
| 32129 | { 15027, 8, 1, 0, 1331, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b278024819ULL }, // Inst #15027 = VPBLENDMQZ256rmk |
| 32130 | { 15026, 8, 1, 0, 1331, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b278024819ULL }, // Inst #15026 = VPBLENDMQZ256rmbkz |
| 32131 | { 15025, 8, 1, 0, 1331, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b278024819ULL }, // Inst #15025 = VPBLENDMQZ256rmbk |
| 32132 | { 15024, 7, 1, 0, 1331, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b278024819ULL }, // Inst #15024 = VPBLENDMQZ256rmb |
| 32133 | { 15023, 7, 1, 0, 1331, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b278024819ULL }, // Inst #15023 = VPBLENDMQZ256rm |
| 32134 | { 15022, 4, 1, 0, 1237, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6b278024829ULL }, // Inst #15022 = VPBLENDMQZ128rrkz |
| 32135 | { 15021, 4, 1, 0, 1237, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa2b278024829ULL }, // Inst #15021 = VPBLENDMQZ128rrk |
| 32136 | { 15020, 3, 1, 0, 1237, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b278024829ULL }, // Inst #15020 = VPBLENDMQZ128rr |
| 32137 | { 15019, 8, 1, 0, 1306, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b278024819ULL }, // Inst #15019 = VPBLENDMQZ128rmkz |
| 32138 | { 15018, 8, 1, 0, 1306, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b278024819ULL }, // Inst #15018 = VPBLENDMQZ128rmk |
| 32139 | { 15017, 8, 1, 0, 1306, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b278024819ULL }, // Inst #15017 = VPBLENDMQZ128rmbkz |
| 32140 | { 15016, 8, 1, 0, 1306, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b278024819ULL }, // Inst #15016 = VPBLENDMQZ128rmbk |
| 32141 | { 15015, 7, 1, 0, 1306, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b278024819ULL }, // Inst #15015 = VPBLENDMQZ128rmb |
| 32142 | { 15014, 7, 1, 0, 1306, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b278024819ULL }, // Inst #15014 = VPBLENDMQZ128rm |
| 32143 | { 15013, 4, 1, 0, 503, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeeb278004829ULL }, // Inst #15013 = VPBLENDMDZrrkz |
| 32144 | { 15012, 4, 1, 0, 503, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeab278004829ULL }, // Inst #15012 = VPBLENDMDZrrk |
| 32145 | { 15011, 3, 1, 0, 503, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b278004829ULL }, // Inst #15011 = VPBLENDMDZrr |
| 32146 | { 15010, 8, 1, 0, 1332, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb278004819ULL }, // Inst #15010 = VPBLENDMDZrmkz |
| 32147 | { 15009, 8, 1, 0, 1332, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab278004819ULL }, // Inst #15009 = VPBLENDMDZrmk |
| 32148 | { 15008, 8, 1, 0, 1332, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb278004819ULL }, // Inst #15008 = VPBLENDMDZrmbkz |
| 32149 | { 15007, 8, 1, 0, 1332, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab278004819ULL }, // Inst #15007 = VPBLENDMDZrmbk |
| 32150 | { 15006, 7, 1, 0, 1332, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b278004819ULL }, // Inst #15006 = VPBLENDMDZrmb |
| 32151 | { 15005, 7, 1, 0, 1332, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b278004819ULL }, // Inst #15005 = VPBLENDMDZrm |
| 32152 | { 15004, 4, 1, 0, 1238, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc7b278004829ULL }, // Inst #15004 = VPBLENDMDZ256rrkz |
| 32153 | { 15003, 4, 1, 0, 1238, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc3b278004829ULL }, // Inst #15003 = VPBLENDMDZ256rrk |
| 32154 | { 15002, 3, 1, 0, 1238, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b278004829ULL }, // Inst #15002 = VPBLENDMDZ256rr |
| 32155 | { 15001, 8, 1, 0, 1331, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b278004819ULL }, // Inst #15001 = VPBLENDMDZ256rmkz |
| 32156 | { 15000, 8, 1, 0, 1331, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b278004819ULL }, // Inst #15000 = VPBLENDMDZ256rmk |
| 32157 | { 14999, 8, 1, 0, 1331, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b278004819ULL }, // Inst #14999 = VPBLENDMDZ256rmbkz |
| 32158 | { 14998, 8, 1, 0, 1331, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b278004819ULL }, // Inst #14998 = VPBLENDMDZ256rmbk |
| 32159 | { 14997, 7, 1, 0, 1331, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b278004819ULL }, // Inst #14997 = VPBLENDMDZ256rmb |
| 32160 | { 14996, 7, 1, 0, 1331, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b278004819ULL }, // Inst #14996 = VPBLENDMDZ256rm |
| 32161 | { 14995, 4, 1, 0, 1237, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6b278004829ULL }, // Inst #14995 = VPBLENDMDZ128rrkz |
| 32162 | { 14994, 4, 1, 0, 1237, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa2b278004829ULL }, // Inst #14994 = VPBLENDMDZ128rrk |
| 32163 | { 14993, 3, 1, 0, 1237, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b278004829ULL }, // Inst #14993 = VPBLENDMDZ128rr |
| 32164 | { 14992, 8, 1, 0, 1306, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b278004819ULL }, // Inst #14992 = VPBLENDMDZ128rmkz |
| 32165 | { 14991, 8, 1, 0, 1306, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b278004819ULL }, // Inst #14991 = VPBLENDMDZ128rmk |
| 32166 | { 14990, 8, 1, 0, 1306, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b278004819ULL }, // Inst #14990 = VPBLENDMDZ128rmbkz |
| 32167 | { 14989, 8, 1, 0, 1306, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b278004819ULL }, // Inst #14989 = VPBLENDMDZ128rmbk |
| 32168 | { 14988, 7, 1, 0, 1306, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b278004819ULL }, // Inst #14988 = VPBLENDMDZ128rmb |
| 32169 | { 14987, 7, 1, 0, 1306, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b278004819ULL }, // Inst #14987 = VPBLENDMDZ128rm |
| 32170 | { 14986, 4, 1, 0, 1901, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeeb378004829ULL }, // Inst #14986 = VPBLENDMBZrrkz |
| 32171 | { 14985, 4, 1, 0, 1901, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeab378004829ULL }, // Inst #14985 = VPBLENDMBZrrk |
| 32172 | { 14984, 3, 1, 0, 503, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b378004829ULL }, // Inst #14984 = VPBLENDMBZrr |
| 32173 | { 14983, 8, 1, 0, 1942, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb378004819ULL }, // Inst #14983 = VPBLENDMBZrmkz |
| 32174 | { 14982, 8, 1, 0, 1942, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab378004819ULL }, // Inst #14982 = VPBLENDMBZrmk |
| 32175 | { 14981, 7, 1, 0, 1332, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b378004819ULL }, // Inst #14981 = VPBLENDMBZrm |
| 32176 | { 14980, 4, 1, 0, 2265, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7b378004829ULL }, // Inst #14980 = VPBLENDMBZ256rrkz |
| 32177 | { 14979, 4, 1, 0, 2265, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc3b378004829ULL }, // Inst #14979 = VPBLENDMBZ256rrk |
| 32178 | { 14978, 3, 1, 0, 1238, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b378004829ULL }, // Inst #14978 = VPBLENDMBZ256rr |
| 32179 | { 14977, 8, 1, 0, 2260, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b378004819ULL }, // Inst #14977 = VPBLENDMBZ256rmkz |
| 32180 | { 14976, 8, 1, 0, 2260, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b378004819ULL }, // Inst #14976 = VPBLENDMBZ256rmk |
| 32181 | { 14975, 7, 1, 0, 1331, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b378004819ULL }, // Inst #14975 = VPBLENDMBZ256rm |
| 32182 | { 14974, 4, 1, 0, 2264, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6b378004829ULL }, // Inst #14974 = VPBLENDMBZ128rrkz |
| 32183 | { 14973, 4, 1, 0, 2264, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa2b378004829ULL }, // Inst #14973 = VPBLENDMBZ128rrk |
| 32184 | { 14972, 3, 1, 0, 1237, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b378004829ULL }, // Inst #14972 = VPBLENDMBZ128rr |
| 32185 | { 14971, 8, 1, 0, 2259, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b378004819ULL }, // Inst #14971 = VPBLENDMBZ128rmkz |
| 32186 | { 14970, 8, 1, 0, 2259, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b378004819ULL }, // Inst #14970 = VPBLENDMBZ128rmk |
| 32187 | { 14969, 7, 1, 0, 1306, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b378004819ULL }, // Inst #14969 = VPBLENDMBZ128rm |
| 32188 | { 14968, 4, 1, 0, 841, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x8138046829ULL }, // Inst #14968 = VPBLENDDrri |
| 32189 | { 14967, 8, 1, 0, 852, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8138046819ULL }, // Inst #14967 = VPBLENDDrmi |
| 32190 | { 14966, 4, 1, 0, 840, 0, 0, 923, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x18138046829ULL }, // Inst #14966 = VPBLENDDYrri |
| 32191 | { 14965, 8, 1, 0, 853, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18138046819ULL }, // Inst #14965 = VPBLENDDYrmi |
| 32192 | { 14964, 3, 1, 0, 1034, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf1b8002829ULL }, // Inst #14964 = VPAVGWrr |
| 32193 | { 14963, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf1b8002819ULL }, // Inst #14963 = VPAVGWrm |
| 32194 | { 14962, 4, 1, 0, 1808, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef1f8002829ULL }, // Inst #14962 = VPAVGWZrrkz |
| 32195 | { 14961, 5, 1, 0, 1808, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf1f8002829ULL }, // Inst #14961 = VPAVGWZrrk |
| 32196 | { 14960, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f1f8002829ULL }, // Inst #14960 = VPAVGWZrr |
| 32197 | { 14959, 8, 1, 0, 1855, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef1f8002819ULL }, // Inst #14959 = VPAVGWZrmkz |
| 32198 | { 14958, 9, 1, 0, 1855, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf1f8002819ULL }, // Inst #14958 = VPAVGWZrmk |
| 32199 | { 14957, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f1f8002819ULL }, // Inst #14957 = VPAVGWZrm |
| 32200 | { 14956, 4, 1, 0, 2289, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f1f8002829ULL }, // Inst #14956 = VPAVGWZ256rrkz |
| 32201 | { 14955, 5, 1, 0, 2289, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f1f8002829ULL }, // Inst #14955 = VPAVGWZ256rrk |
| 32202 | { 14954, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f1f8002829ULL }, // Inst #14954 = VPAVGWZ256rr |
| 32203 | { 14953, 8, 1, 0, 2058, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f1f8002819ULL }, // Inst #14953 = VPAVGWZ256rmkz |
| 32204 | { 14952, 9, 1, 0, 2058, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f1f8002819ULL }, // Inst #14952 = VPAVGWZ256rmk |
| 32205 | { 14951, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f1f8002819ULL }, // Inst #14951 = VPAVGWZ256rm |
| 32206 | { 14950, 4, 1, 0, 2288, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f1f8002829ULL }, // Inst #14950 = VPAVGWZ128rrkz |
| 32207 | { 14949, 5, 1, 0, 2288, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f1f8002829ULL }, // Inst #14949 = VPAVGWZ128rrk |
| 32208 | { 14948, 3, 1, 0, 1145, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f1f8002829ULL }, // Inst #14948 = VPAVGWZ128rr |
| 32209 | { 14947, 8, 1, 0, 2054, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f1f8002819ULL }, // Inst #14947 = VPAVGWZ128rmkz |
| 32210 | { 14946, 9, 1, 0, 2054, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f1f8002819ULL }, // Inst #14946 = VPAVGWZ128rmk |
| 32211 | { 14945, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f1f8002819ULL }, // Inst #14945 = VPAVGWZ128rm |
| 32212 | { 14944, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f1b8002829ULL }, // Inst #14944 = VPAVGWYrr |
| 32213 | { 14943, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f1b8002819ULL }, // Inst #14943 = VPAVGWYrm |
| 32214 | { 14942, 3, 1, 0, 1034, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf038002829ULL }, // Inst #14942 = VPAVGBrr |
| 32215 | { 14941, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf038002819ULL }, // Inst #14941 = VPAVGBrm |
| 32216 | { 14940, 4, 1, 0, 1808, 0, 0, 2920, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef078002829ULL }, // Inst #14940 = VPAVGBZrrkz |
| 32217 | { 14939, 5, 1, 0, 1808, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf078002829ULL }, // Inst #14939 = VPAVGBZrrk |
| 32218 | { 14938, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f078002829ULL }, // Inst #14938 = VPAVGBZrr |
| 32219 | { 14937, 8, 1, 0, 1855, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef078002819ULL }, // Inst #14937 = VPAVGBZrmkz |
| 32220 | { 14936, 9, 1, 0, 1855, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf078002819ULL }, // Inst #14936 = VPAVGBZrmk |
| 32221 | { 14935, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f078002819ULL }, // Inst #14935 = VPAVGBZrm |
| 32222 | { 14934, 4, 1, 0, 2289, 0, 0, 2894, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f078002829ULL }, // Inst #14934 = VPAVGBZ256rrkz |
| 32223 | { 14933, 5, 1, 0, 2289, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f078002829ULL }, // Inst #14933 = VPAVGBZ256rrk |
| 32224 | { 14932, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f078002829ULL }, // Inst #14932 = VPAVGBZ256rr |
| 32225 | { 14931, 8, 1, 0, 2058, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f078002819ULL }, // Inst #14931 = VPAVGBZ256rmkz |
| 32226 | { 14930, 9, 1, 0, 2058, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f078002819ULL }, // Inst #14930 = VPAVGBZ256rmk |
| 32227 | { 14929, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f078002819ULL }, // Inst #14929 = VPAVGBZ256rm |
| 32228 | { 14928, 4, 1, 0, 2288, 0, 0, 2868, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f078002829ULL }, // Inst #14928 = VPAVGBZ128rrkz |
| 32229 | { 14927, 5, 1, 0, 2288, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f078002829ULL }, // Inst #14927 = VPAVGBZ128rrk |
| 32230 | { 14926, 3, 1, 0, 1145, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f078002829ULL }, // Inst #14926 = VPAVGBZ128rr |
| 32231 | { 14925, 8, 1, 0, 2054, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f078002819ULL }, // Inst #14925 = VPAVGBZ128rmkz |
| 32232 | { 14924, 9, 1, 0, 2054, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f078002819ULL }, // Inst #14924 = VPAVGBZ128rmk |
| 32233 | { 14923, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f078002819ULL }, // Inst #14923 = VPAVGBZ128rm |
| 32234 | { 14922, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f038002829ULL }, // Inst #14922 = VPAVGBYrr |
| 32235 | { 14921, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f038002819ULL }, // Inst #14921 = VPAVGBYrm |
| 32236 | { 14920, 3, 1, 0, 183, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xedb8002829ULL }, // Inst #14920 = VPANDrr |
| 32237 | { 14919, 7, 1, 0, 252, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xedb8002819ULL }, // Inst #14919 = VPANDrm |
| 32238 | { 14918, 3, 1, 0, 495, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1edb8002829ULL }, // Inst #14918 = VPANDYrr |
| 32239 | { 14917, 7, 1, 0, 494, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1edb8002819ULL }, // Inst #14917 = VPANDYrm |
| 32240 | { 14916, 4, 1, 0, 497, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeedf8022829ULL }, // Inst #14916 = VPANDQZrrkz |
| 32241 | { 14915, 5, 1, 0, 497, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaedf8022829ULL }, // Inst #14915 = VPANDQZrrk |
| 32242 | { 14914, 3, 1, 0, 497, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8edf8022829ULL }, // Inst #14914 = VPANDQZrr |
| 32243 | { 14913, 8, 1, 0, 496, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeedf8022819ULL }, // Inst #14913 = VPANDQZrmkz |
| 32244 | { 14912, 9, 1, 0, 496, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaedf8022819ULL }, // Inst #14912 = VPANDQZrmk |
| 32245 | { 14911, 8, 1, 0, 496, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eedf8022819ULL }, // Inst #14911 = VPANDQZrmbkz |
| 32246 | { 14910, 9, 1, 0, 496, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aedf8022819ULL }, // Inst #14910 = VPANDQZrmbk |
| 32247 | { 14909, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98edf8022819ULL }, // Inst #14909 = VPANDQZrmb |
| 32248 | { 14908, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8edf8022819ULL }, // Inst #14908 = VPANDQZrm |
| 32249 | { 14907, 4, 1, 0, 495, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7edf8022829ULL }, // Inst #14907 = VPANDQZ256rrkz |
| 32250 | { 14906, 5, 1, 0, 495, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3edf8022829ULL }, // Inst #14906 = VPANDQZ256rrk |
| 32251 | { 14905, 3, 1, 0, 495, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1edf8022829ULL }, // Inst #14905 = VPANDQZ256rr |
| 32252 | { 14904, 8, 1, 0, 494, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7edf8022819ULL }, // Inst #14904 = VPANDQZ256rmkz |
| 32253 | { 14903, 9, 1, 0, 494, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3edf8022819ULL }, // Inst #14903 = VPANDQZ256rmk |
| 32254 | { 14902, 8, 1, 0, 494, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97edf8022819ULL }, // Inst #14902 = VPANDQZ256rmbkz |
| 32255 | { 14901, 9, 1, 0, 494, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93edf8022819ULL }, // Inst #14901 = VPANDQZ256rmbk |
| 32256 | { 14900, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91edf8022819ULL }, // Inst #14900 = VPANDQZ256rmb |
| 32257 | { 14899, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1edf8022819ULL }, // Inst #14899 = VPANDQZ256rm |
| 32258 | { 14898, 4, 1, 0, 183, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6edf8022829ULL }, // Inst #14898 = VPANDQZ128rrkz |
| 32259 | { 14897, 5, 1, 0, 183, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2edf8022829ULL }, // Inst #14897 = VPANDQZ128rrk |
| 32260 | { 14896, 3, 1, 0, 183, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0edf8022829ULL }, // Inst #14896 = VPANDQZ128rr |
| 32261 | { 14895, 8, 1, 0, 252, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6edf8022819ULL }, // Inst #14895 = VPANDQZ128rmkz |
| 32262 | { 14894, 9, 1, 0, 252, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2edf8022819ULL }, // Inst #14894 = VPANDQZ128rmk |
| 32263 | { 14893, 8, 1, 0, 252, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96edf8022819ULL }, // Inst #14893 = VPANDQZ128rmbkz |
| 32264 | { 14892, 9, 1, 0, 252, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92edf8022819ULL }, // Inst #14892 = VPANDQZ128rmbk |
| 32265 | { 14891, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90edf8022819ULL }, // Inst #14891 = VPANDQZ128rmb |
| 32266 | { 14890, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0edf8022819ULL }, // Inst #14890 = VPANDQZ128rm |
| 32267 | { 14889, 3, 1, 0, 1056, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xefb8002829ULL }, // Inst #14889 = VPANDNrr |
| 32268 | { 14888, 7, 1, 0, 252, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xefb8002819ULL }, // Inst #14888 = VPANDNrm |
| 32269 | { 14887, 3, 1, 0, 1057, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1efb8002829ULL }, // Inst #14887 = VPANDNYrr |
| 32270 | { 14886, 7, 1, 0, 494, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1efb8002819ULL }, // Inst #14886 = VPANDNYrm |
| 32271 | { 14885, 4, 1, 0, 497, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeeeff8022829ULL }, // Inst #14885 = VPANDNQZrrkz |
| 32272 | { 14884, 5, 1, 0, 497, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeaeff8022829ULL }, // Inst #14884 = VPANDNQZrrk |
| 32273 | { 14883, 3, 1, 0, 1151, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8eff8022829ULL }, // Inst #14883 = VPANDNQZrr |
| 32274 | { 14882, 8, 1, 0, 496, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeeff8022819ULL }, // Inst #14882 = VPANDNQZrmkz |
| 32275 | { 14881, 9, 1, 0, 496, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaeff8022819ULL }, // Inst #14881 = VPANDNQZrmk |
| 32276 | { 14880, 8, 1, 0, 496, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eeff8022819ULL }, // Inst #14880 = VPANDNQZrmbkz |
| 32277 | { 14879, 9, 1, 0, 496, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aeff8022819ULL }, // Inst #14879 = VPANDNQZrmbk |
| 32278 | { 14878, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98eff8022819ULL }, // Inst #14878 = VPANDNQZrmb |
| 32279 | { 14877, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8eff8022819ULL }, // Inst #14877 = VPANDNQZrm |
| 32280 | { 14876, 4, 1, 0, 495, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc7eff8022829ULL }, // Inst #14876 = VPANDNQZ256rrkz |
| 32281 | { 14875, 5, 1, 0, 495, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3eff8022829ULL }, // Inst #14875 = VPANDNQZ256rrk |
| 32282 | { 14874, 3, 1, 0, 1150, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1eff8022829ULL }, // Inst #14874 = VPANDNQZ256rr |
| 32283 | { 14873, 8, 1, 0, 494, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7eff8022819ULL }, // Inst #14873 = VPANDNQZ256rmkz |
| 32284 | { 14872, 9, 1, 0, 494, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3eff8022819ULL }, // Inst #14872 = VPANDNQZ256rmk |
| 32285 | { 14871, 8, 1, 0, 494, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97eff8022819ULL }, // Inst #14871 = VPANDNQZ256rmbkz |
| 32286 | { 14870, 9, 1, 0, 494, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93eff8022819ULL }, // Inst #14870 = VPANDNQZ256rmbk |
| 32287 | { 14869, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91eff8022819ULL }, // Inst #14869 = VPANDNQZ256rmb |
| 32288 | { 14868, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1eff8022819ULL }, // Inst #14868 = VPANDNQZ256rm |
| 32289 | { 14867, 4, 1, 0, 183, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6eff8022829ULL }, // Inst #14867 = VPANDNQZ128rrkz |
| 32290 | { 14866, 5, 1, 0, 183, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2eff8022829ULL }, // Inst #14866 = VPANDNQZ128rrk |
| 32291 | { 14865, 3, 1, 0, 1149, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0eff8022829ULL }, // Inst #14865 = VPANDNQZ128rr |
| 32292 | { 14864, 8, 1, 0, 252, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6eff8022819ULL }, // Inst #14864 = VPANDNQZ128rmkz |
| 32293 | { 14863, 9, 1, 0, 252, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2eff8022819ULL }, // Inst #14863 = VPANDNQZ128rmk |
| 32294 | { 14862, 8, 1, 0, 252, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96eff8022819ULL }, // Inst #14862 = VPANDNQZ128rmbkz |
| 32295 | { 14861, 9, 1, 0, 252, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92eff8022819ULL }, // Inst #14861 = VPANDNQZ128rmbk |
| 32296 | { 14860, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90eff8022819ULL }, // Inst #14860 = VPANDNQZ128rmb |
| 32297 | { 14859, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0eff8022819ULL }, // Inst #14859 = VPANDNQZ128rm |
| 32298 | { 14858, 4, 1, 0, 497, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeeeff8002829ULL }, // Inst #14858 = VPANDNDZrrkz |
| 32299 | { 14857, 5, 1, 0, 497, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaeff8002829ULL }, // Inst #14857 = VPANDNDZrrk |
| 32300 | { 14856, 3, 1, 0, 1151, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8eff8002829ULL }, // Inst #14856 = VPANDNDZrr |
| 32301 | { 14855, 8, 1, 0, 496, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeeff8002819ULL }, // Inst #14855 = VPANDNDZrmkz |
| 32302 | { 14854, 9, 1, 0, 496, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaeff8002819ULL }, // Inst #14854 = VPANDNDZrmk |
| 32303 | { 14853, 8, 1, 0, 496, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eeff8002819ULL }, // Inst #14853 = VPANDNDZrmbkz |
| 32304 | { 14852, 9, 1, 0, 496, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aeff8002819ULL }, // Inst #14852 = VPANDNDZrmbk |
| 32305 | { 14851, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78eff8002819ULL }, // Inst #14851 = VPANDNDZrmb |
| 32306 | { 14850, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8eff8002819ULL }, // Inst #14850 = VPANDNDZrm |
| 32307 | { 14849, 4, 1, 0, 495, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc7eff8002829ULL }, // Inst #14849 = VPANDNDZ256rrkz |
| 32308 | { 14848, 5, 1, 0, 495, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3eff8002829ULL }, // Inst #14848 = VPANDNDZ256rrk |
| 32309 | { 14847, 3, 1, 0, 1150, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1eff8002829ULL }, // Inst #14847 = VPANDNDZ256rr |
| 32310 | { 14846, 8, 1, 0, 494, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7eff8002819ULL }, // Inst #14846 = VPANDNDZ256rmkz |
| 32311 | { 14845, 9, 1, 0, 494, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3eff8002819ULL }, // Inst #14845 = VPANDNDZ256rmk |
| 32312 | { 14844, 8, 1, 0, 494, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77eff8002819ULL }, // Inst #14844 = VPANDNDZ256rmbkz |
| 32313 | { 14843, 9, 1, 0, 494, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73eff8002819ULL }, // Inst #14843 = VPANDNDZ256rmbk |
| 32314 | { 14842, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71eff8002819ULL }, // Inst #14842 = VPANDNDZ256rmb |
| 32315 | { 14841, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1eff8002819ULL }, // Inst #14841 = VPANDNDZ256rm |
| 32316 | { 14840, 4, 1, 0, 183, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6eff8002829ULL }, // Inst #14840 = VPANDNDZ128rrkz |
| 32317 | { 14839, 5, 1, 0, 183, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2eff8002829ULL }, // Inst #14839 = VPANDNDZ128rrk |
| 32318 | { 14838, 3, 1, 0, 1149, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0eff8002829ULL }, // Inst #14838 = VPANDNDZ128rr |
| 32319 | { 14837, 8, 1, 0, 252, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6eff8002819ULL }, // Inst #14837 = VPANDNDZ128rmkz |
| 32320 | { 14836, 9, 1, 0, 252, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2eff8002819ULL }, // Inst #14836 = VPANDNDZ128rmk |
| 32321 | { 14835, 8, 1, 0, 252, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76eff8002819ULL }, // Inst #14835 = VPANDNDZ128rmbkz |
| 32322 | { 14834, 9, 1, 0, 252, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72eff8002819ULL }, // Inst #14834 = VPANDNDZ128rmbk |
| 32323 | { 14833, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70eff8002819ULL }, // Inst #14833 = VPANDNDZ128rmb |
| 32324 | { 14832, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0eff8002819ULL }, // Inst #14832 = VPANDNDZ128rm |
| 32325 | { 14831, 4, 1, 0, 497, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeedf8002829ULL }, // Inst #14831 = VPANDDZrrkz |
| 32326 | { 14830, 5, 1, 0, 497, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaedf8002829ULL }, // Inst #14830 = VPANDDZrrk |
| 32327 | { 14829, 3, 1, 0, 497, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8edf8002829ULL }, // Inst #14829 = VPANDDZrr |
| 32328 | { 14828, 8, 1, 0, 496, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeedf8002819ULL }, // Inst #14828 = VPANDDZrmkz |
| 32329 | { 14827, 9, 1, 0, 496, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaedf8002819ULL }, // Inst #14827 = VPANDDZrmk |
| 32330 | { 14826, 8, 1, 0, 496, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eedf8002819ULL }, // Inst #14826 = VPANDDZrmbkz |
| 32331 | { 14825, 9, 1, 0, 496, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aedf8002819ULL }, // Inst #14825 = VPANDDZrmbk |
| 32332 | { 14824, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78edf8002819ULL }, // Inst #14824 = VPANDDZrmb |
| 32333 | { 14823, 7, 1, 0, 496, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8edf8002819ULL }, // Inst #14823 = VPANDDZrm |
| 32334 | { 14822, 4, 1, 0, 495, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7edf8002829ULL }, // Inst #14822 = VPANDDZ256rrkz |
| 32335 | { 14821, 5, 1, 0, 495, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3edf8002829ULL }, // Inst #14821 = VPANDDZ256rrk |
| 32336 | { 14820, 3, 1, 0, 495, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1edf8002829ULL }, // Inst #14820 = VPANDDZ256rr |
| 32337 | { 14819, 8, 1, 0, 494, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7edf8002819ULL }, // Inst #14819 = VPANDDZ256rmkz |
| 32338 | { 14818, 9, 1, 0, 494, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3edf8002819ULL }, // Inst #14818 = VPANDDZ256rmk |
| 32339 | { 14817, 8, 1, 0, 494, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77edf8002819ULL }, // Inst #14817 = VPANDDZ256rmbkz |
| 32340 | { 14816, 9, 1, 0, 494, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73edf8002819ULL }, // Inst #14816 = VPANDDZ256rmbk |
| 32341 | { 14815, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71edf8002819ULL }, // Inst #14815 = VPANDDZ256rmb |
| 32342 | { 14814, 7, 1, 0, 494, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1edf8002819ULL }, // Inst #14814 = VPANDDZ256rm |
| 32343 | { 14813, 4, 1, 0, 183, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6edf8002829ULL }, // Inst #14813 = VPANDDZ128rrkz |
| 32344 | { 14812, 5, 1, 0, 183, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2edf8002829ULL }, // Inst #14812 = VPANDDZ128rrk |
| 32345 | { 14811, 3, 1, 0, 183, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0edf8002829ULL }, // Inst #14811 = VPANDDZ128rr |
| 32346 | { 14810, 8, 1, 0, 252, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6edf8002819ULL }, // Inst #14810 = VPANDDZ128rmkz |
| 32347 | { 14809, 9, 1, 0, 252, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2edf8002819ULL }, // Inst #14809 = VPANDDZ128rmk |
| 32348 | { 14808, 8, 1, 0, 252, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76edf8002819ULL }, // Inst #14808 = VPANDDZ128rmbkz |
| 32349 | { 14807, 9, 1, 0, 252, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72edf8002819ULL }, // Inst #14807 = VPANDDZ128rmbk |
| 32350 | { 14806, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70edf8002819ULL }, // Inst #14806 = VPANDDZ128rmb |
| 32351 | { 14805, 7, 1, 0, 252, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0edf8002819ULL }, // Inst #14805 = VPANDDZ128rm |
| 32352 | { 14804, 4, 1, 0, 1594, 0, 0, 915, X86ImpOpBase + 0, 0, 0x87b8046829ULL }, // Inst #14804 = VPALIGNRrri |
| 32353 | { 14803, 8, 1, 0, 1593, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x87b8046819ULL }, // Inst #14803 = VPALIGNRrmi |
| 32354 | { 14802, 5, 1, 0, 1106, 0, 0, 4777, X86ImpOpBase + 0, 0, 0xee87f8046829ULL }, // Inst #14802 = VPALIGNRZrrikz |
| 32355 | { 14801, 6, 1, 0, 1106, 0, 0, 4771, X86ImpOpBase + 0, 0, 0xea87f8046829ULL }, // Inst #14801 = VPALIGNRZrrik |
| 32356 | { 14800, 4, 1, 0, 1805, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe887f8046829ULL }, // Inst #14800 = VPALIGNRZrri |
| 32357 | { 14799, 9, 1, 0, 1956, 0, 0, 4762, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee87f8046819ULL }, // Inst #14799 = VPALIGNRZrmikz |
| 32358 | { 14798, 10, 1, 0, 1956, 0, 0, 4752, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea87f8046819ULL }, // Inst #14798 = VPALIGNRZrmik |
| 32359 | { 14797, 8, 1, 0, 347, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe887f8046819ULL }, // Inst #14797 = VPALIGNRZrmi |
| 32360 | { 14796, 5, 1, 0, 1726, 0, 0, 4747, X86ImpOpBase + 0, 0, 0xc787f8046829ULL }, // Inst #14796 = VPALIGNRZ256rrikz |
| 32361 | { 14795, 6, 1, 0, 1726, 0, 0, 4741, X86ImpOpBase + 0, 0, 0xc387f8046829ULL }, // Inst #14795 = VPALIGNRZ256rrik |
| 32362 | { 14794, 4, 1, 0, 1105, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc187f8046829ULL }, // Inst #14794 = VPALIGNRZ256rri |
| 32363 | { 14793, 9, 1, 0, 1430, 0, 0, 4732, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc787f8046819ULL }, // Inst #14793 = VPALIGNRZ256rmikz |
| 32364 | { 14792, 10, 1, 0, 1430, 0, 0, 4722, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc387f8046819ULL }, // Inst #14792 = VPALIGNRZ256rmik |
| 32365 | { 14791, 8, 1, 0, 1841, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc187f8046819ULL }, // Inst #14791 = VPALIGNRZ256rmi |
| 32366 | { 14790, 5, 1, 0, 1725, 0, 0, 4717, X86ImpOpBase + 0, 0, 0xa687f8046829ULL }, // Inst #14790 = VPALIGNRZ128rrikz |
| 32367 | { 14789, 6, 1, 0, 1725, 0, 0, 4711, X86ImpOpBase + 0, 0, 0xa287f8046829ULL }, // Inst #14789 = VPALIGNRZ128rrik |
| 32368 | { 14788, 4, 1, 0, 1104, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa087f8046829ULL }, // Inst #14788 = VPALIGNRZ128rri |
| 32369 | { 14787, 9, 1, 0, 1427, 0, 0, 4702, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa687f8046819ULL }, // Inst #14787 = VPALIGNRZ128rmikz |
| 32370 | { 14786, 10, 1, 0, 1427, 0, 0, 4692, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa287f8046819ULL }, // Inst #14786 = VPALIGNRZ128rmik |
| 32371 | { 14785, 8, 1, 0, 1870, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa087f8046819ULL }, // Inst #14785 = VPALIGNRZ128rmi |
| 32372 | { 14784, 4, 1, 0, 1419, 0, 0, 923, X86ImpOpBase + 0, 0, 0x187b8046829ULL }, // Inst #14784 = VPALIGNRYrri |
| 32373 | { 14783, 8, 1, 0, 1543, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x187b8046819ULL }, // Inst #14783 = VPALIGNRYrmi |
| 32374 | { 14782, 3, 1, 0, 1209, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xfeb8002829ULL }, // Inst #14782 = VPADDWrr |
| 32375 | { 14781, 7, 1, 0, 1216, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfeb8002819ULL }, // Inst #14781 = VPADDWrm |
| 32376 | { 14780, 4, 1, 0, 1236, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeefef8002829ULL }, // Inst #14780 = VPADDWZrrkz |
| 32377 | { 14779, 5, 1, 0, 1236, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeafef8002829ULL }, // Inst #14779 = VPADDWZrrk |
| 32378 | { 14778, 3, 1, 0, 1755, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8fef8002829ULL }, // Inst #14778 = VPADDWZrr |
| 32379 | { 14777, 8, 1, 0, 1330, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeefef8002819ULL }, // Inst #14777 = VPADDWZrmkz |
| 32380 | { 14776, 9, 1, 0, 1330, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeafef8002819ULL }, // Inst #14776 = VPADDWZrmk |
| 32381 | { 14775, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8fef8002819ULL }, // Inst #14775 = VPADDWZrm |
| 32382 | { 14774, 4, 1, 0, 1235, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7fef8002829ULL }, // Inst #14774 = VPADDWZ256rrkz |
| 32383 | { 14773, 5, 1, 0, 1235, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3fef8002829ULL }, // Inst #14773 = VPADDWZ256rrk |
| 32384 | { 14772, 3, 1, 0, 1852, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1fef8002829ULL }, // Inst #14772 = VPADDWZ256rr |
| 32385 | { 14771, 8, 1, 0, 1329, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7fef8002819ULL }, // Inst #14771 = VPADDWZ256rmkz |
| 32386 | { 14770, 9, 1, 0, 1329, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3fef8002819ULL }, // Inst #14770 = VPADDWZ256rmk |
| 32387 | { 14769, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1fef8002819ULL }, // Inst #14769 = VPADDWZ256rm |
| 32388 | { 14768, 4, 1, 0, 1234, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6fef8002829ULL }, // Inst #14768 = VPADDWZ128rrkz |
| 32389 | { 14767, 5, 1, 0, 1234, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2fef8002829ULL }, // Inst #14767 = VPADDWZ128rrk |
| 32390 | { 14766, 3, 1, 0, 1851, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0fef8002829ULL }, // Inst #14766 = VPADDWZ128rr |
| 32391 | { 14765, 8, 1, 0, 1305, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6fef8002819ULL }, // Inst #14765 = VPADDWZ128rmkz |
| 32392 | { 14764, 9, 1, 0, 1305, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2fef8002819ULL }, // Inst #14764 = VPADDWZ128rmk |
| 32393 | { 14763, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0fef8002819ULL }, // Inst #14763 = VPADDWZ128rm |
| 32394 | { 14762, 3, 1, 0, 1210, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1feb8002829ULL }, // Inst #14762 = VPADDWYrr |
| 32395 | { 14761, 7, 1, 0, 1219, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1feb8002819ULL }, // Inst #14761 = VPADDWYrm |
| 32396 | { 14760, 3, 1, 0, 1034, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeb8002829ULL }, // Inst #14760 = VPADDUSWrr |
| 32397 | { 14759, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb8002819ULL }, // Inst #14759 = VPADDUSWrm |
| 32398 | { 14758, 4, 1, 0, 1808, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeeef8002829ULL }, // Inst #14758 = VPADDUSWZrrkz |
| 32399 | { 14757, 5, 1, 0, 1808, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaeef8002829ULL }, // Inst #14757 = VPADDUSWZrrk |
| 32400 | { 14756, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8eef8002829ULL }, // Inst #14756 = VPADDUSWZrr |
| 32401 | { 14755, 8, 1, 0, 1855, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeeef8002819ULL }, // Inst #14755 = VPADDUSWZrmkz |
| 32402 | { 14754, 9, 1, 0, 1855, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaeef8002819ULL }, // Inst #14754 = VPADDUSWZrmk |
| 32403 | { 14753, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8eef8002819ULL }, // Inst #14753 = VPADDUSWZrm |
| 32404 | { 14752, 4, 1, 0, 2289, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7eef8002829ULL }, // Inst #14752 = VPADDUSWZ256rrkz |
| 32405 | { 14751, 5, 1, 0, 2289, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3eef8002829ULL }, // Inst #14751 = VPADDUSWZ256rrk |
| 32406 | { 14750, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1eef8002829ULL }, // Inst #14750 = VPADDUSWZ256rr |
| 32407 | { 14749, 8, 1, 0, 2058, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7eef8002819ULL }, // Inst #14749 = VPADDUSWZ256rmkz |
| 32408 | { 14748, 9, 1, 0, 2058, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3eef8002819ULL }, // Inst #14748 = VPADDUSWZ256rmk |
| 32409 | { 14747, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1eef8002819ULL }, // Inst #14747 = VPADDUSWZ256rm |
| 32410 | { 14746, 4, 1, 0, 2288, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6eef8002829ULL }, // Inst #14746 = VPADDUSWZ128rrkz |
| 32411 | { 14745, 5, 1, 0, 2288, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2eef8002829ULL }, // Inst #14745 = VPADDUSWZ128rrk |
| 32412 | { 14744, 3, 1, 0, 1145, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0eef8002829ULL }, // Inst #14744 = VPADDUSWZ128rr |
| 32413 | { 14743, 8, 1, 0, 2054, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6eef8002819ULL }, // Inst #14743 = VPADDUSWZ128rmkz |
| 32414 | { 14742, 9, 1, 0, 2054, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2eef8002819ULL }, // Inst #14742 = VPADDUSWZ128rmk |
| 32415 | { 14741, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0eef8002819ULL }, // Inst #14741 = VPADDUSWZ128rm |
| 32416 | { 14740, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1eeb8002829ULL }, // Inst #14740 = VPADDUSWYrr |
| 32417 | { 14739, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1eeb8002819ULL }, // Inst #14739 = VPADDUSWYrm |
| 32418 | { 14738, 3, 1, 0, 1034, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xee38002829ULL }, // Inst #14738 = VPADDUSBrr |
| 32419 | { 14737, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee38002819ULL }, // Inst #14737 = VPADDUSBrm |
| 32420 | { 14736, 4, 1, 0, 1808, 0, 0, 2920, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeee78002829ULL }, // Inst #14736 = VPADDUSBZrrkz |
| 32421 | { 14735, 5, 1, 0, 1808, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaee78002829ULL }, // Inst #14735 = VPADDUSBZrrk |
| 32422 | { 14734, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ee78002829ULL }, // Inst #14734 = VPADDUSBZrr |
| 32423 | { 14733, 8, 1, 0, 1855, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeee78002819ULL }, // Inst #14733 = VPADDUSBZrmkz |
| 32424 | { 14732, 9, 1, 0, 1855, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaee78002819ULL }, // Inst #14732 = VPADDUSBZrmk |
| 32425 | { 14731, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ee78002819ULL }, // Inst #14731 = VPADDUSBZrm |
| 32426 | { 14730, 4, 1, 0, 2289, 0, 0, 2894, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7ee78002829ULL }, // Inst #14730 = VPADDUSBZ256rrkz |
| 32427 | { 14729, 5, 1, 0, 2289, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ee78002829ULL }, // Inst #14729 = VPADDUSBZ256rrk |
| 32428 | { 14728, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ee78002829ULL }, // Inst #14728 = VPADDUSBZ256rr |
| 32429 | { 14727, 8, 1, 0, 2058, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ee78002819ULL }, // Inst #14727 = VPADDUSBZ256rmkz |
| 32430 | { 14726, 9, 1, 0, 2058, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ee78002819ULL }, // Inst #14726 = VPADDUSBZ256rmk |
| 32431 | { 14725, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ee78002819ULL }, // Inst #14725 = VPADDUSBZ256rm |
| 32432 | { 14724, 4, 1, 0, 2288, 0, 0, 2868, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6ee78002829ULL }, // Inst #14724 = VPADDUSBZ128rrkz |
| 32433 | { 14723, 5, 1, 0, 2288, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ee78002829ULL }, // Inst #14723 = VPADDUSBZ128rrk |
| 32434 | { 14722, 3, 1, 0, 1145, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ee78002829ULL }, // Inst #14722 = VPADDUSBZ128rr |
| 32435 | { 14721, 8, 1, 0, 2054, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ee78002819ULL }, // Inst #14721 = VPADDUSBZ128rmkz |
| 32436 | { 14720, 9, 1, 0, 2054, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ee78002819ULL }, // Inst #14720 = VPADDUSBZ128rmk |
| 32437 | { 14719, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ee78002819ULL }, // Inst #14719 = VPADDUSBZ128rm |
| 32438 | { 14718, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1ee38002829ULL }, // Inst #14718 = VPADDUSBYrr |
| 32439 | { 14717, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ee38002819ULL }, // Inst #14717 = VPADDUSBYrm |
| 32440 | { 14716, 3, 1, 0, 1034, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf6b8002829ULL }, // Inst #14716 = VPADDSWrr |
| 32441 | { 14715, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf6b8002819ULL }, // Inst #14715 = VPADDSWrm |
| 32442 | { 14714, 4, 1, 0, 1808, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef6f8002829ULL }, // Inst #14714 = VPADDSWZrrkz |
| 32443 | { 14713, 5, 1, 0, 1808, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf6f8002829ULL }, // Inst #14713 = VPADDSWZrrk |
| 32444 | { 14712, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f6f8002829ULL }, // Inst #14712 = VPADDSWZrr |
| 32445 | { 14711, 8, 1, 0, 1855, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef6f8002819ULL }, // Inst #14711 = VPADDSWZrmkz |
| 32446 | { 14710, 9, 1, 0, 1855, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf6f8002819ULL }, // Inst #14710 = VPADDSWZrmk |
| 32447 | { 14709, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f6f8002819ULL }, // Inst #14709 = VPADDSWZrm |
| 32448 | { 14708, 4, 1, 0, 2289, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f6f8002829ULL }, // Inst #14708 = VPADDSWZ256rrkz |
| 32449 | { 14707, 5, 1, 0, 2289, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f6f8002829ULL }, // Inst #14707 = VPADDSWZ256rrk |
| 32450 | { 14706, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f6f8002829ULL }, // Inst #14706 = VPADDSWZ256rr |
| 32451 | { 14705, 8, 1, 0, 2058, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f6f8002819ULL }, // Inst #14705 = VPADDSWZ256rmkz |
| 32452 | { 14704, 9, 1, 0, 2058, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f6f8002819ULL }, // Inst #14704 = VPADDSWZ256rmk |
| 32453 | { 14703, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f6f8002819ULL }, // Inst #14703 = VPADDSWZ256rm |
| 32454 | { 14702, 4, 1, 0, 2288, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f6f8002829ULL }, // Inst #14702 = VPADDSWZ128rrkz |
| 32455 | { 14701, 5, 1, 0, 2288, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f6f8002829ULL }, // Inst #14701 = VPADDSWZ128rrk |
| 32456 | { 14700, 3, 1, 0, 1145, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f6f8002829ULL }, // Inst #14700 = VPADDSWZ128rr |
| 32457 | { 14699, 8, 1, 0, 2054, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f6f8002819ULL }, // Inst #14699 = VPADDSWZ128rmkz |
| 32458 | { 14698, 9, 1, 0, 2054, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f6f8002819ULL }, // Inst #14698 = VPADDSWZ128rmk |
| 32459 | { 14697, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f6f8002819ULL }, // Inst #14697 = VPADDSWZ128rm |
| 32460 | { 14696, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f6b8002829ULL }, // Inst #14696 = VPADDSWYrr |
| 32461 | { 14695, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f6b8002819ULL }, // Inst #14695 = VPADDSWYrm |
| 32462 | { 14694, 3, 1, 0, 1034, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xf638002829ULL }, // Inst #14694 = VPADDSBrr |
| 32463 | { 14693, 7, 1, 0, 150, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf638002819ULL }, // Inst #14693 = VPADDSBrm |
| 32464 | { 14692, 4, 1, 0, 1808, 0, 0, 2920, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeef678002829ULL }, // Inst #14692 = VPADDSBZrrkz |
| 32465 | { 14691, 5, 1, 0, 1808, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaf678002829ULL }, // Inst #14691 = VPADDSBZrrk |
| 32466 | { 14690, 3, 1, 0, 1798, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8f678002829ULL }, // Inst #14690 = VPADDSBZrr |
| 32467 | { 14689, 8, 1, 0, 1855, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeef678002819ULL }, // Inst #14689 = VPADDSBZrmkz |
| 32468 | { 14688, 9, 1, 0, 1855, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaf678002819ULL }, // Inst #14688 = VPADDSBZrmk |
| 32469 | { 14687, 7, 1, 0, 455, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8f678002819ULL }, // Inst #14687 = VPADDSBZrm |
| 32470 | { 14686, 4, 1, 0, 2289, 0, 0, 2894, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7f678002829ULL }, // Inst #14686 = VPADDSBZ256rrkz |
| 32471 | { 14685, 5, 1, 0, 2289, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3f678002829ULL }, // Inst #14685 = VPADDSBZ256rrk |
| 32472 | { 14684, 3, 1, 0, 454, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1f678002829ULL }, // Inst #14684 = VPADDSBZ256rr |
| 32473 | { 14683, 8, 1, 0, 2058, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7f678002819ULL }, // Inst #14683 = VPADDSBZ256rmkz |
| 32474 | { 14682, 9, 1, 0, 2058, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3f678002819ULL }, // Inst #14682 = VPADDSBZ256rmk |
| 32475 | { 14681, 7, 1, 0, 453, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1f678002819ULL }, // Inst #14681 = VPADDSBZ256rm |
| 32476 | { 14680, 4, 1, 0, 2288, 0, 0, 2868, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6f678002829ULL }, // Inst #14680 = VPADDSBZ128rrkz |
| 32477 | { 14679, 5, 1, 0, 2288, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2f678002829ULL }, // Inst #14679 = VPADDSBZ128rrk |
| 32478 | { 14678, 3, 1, 0, 1145, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0f678002829ULL }, // Inst #14678 = VPADDSBZ128rr |
| 32479 | { 14677, 8, 1, 0, 2054, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6f678002819ULL }, // Inst #14677 = VPADDSBZ128rmkz |
| 32480 | { 14676, 9, 1, 0, 2054, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2f678002819ULL }, // Inst #14676 = VPADDSBZ128rmk |
| 32481 | { 14675, 7, 1, 0, 150, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0f678002819ULL }, // Inst #14675 = VPADDSBZ128rm |
| 32482 | { 14674, 3, 1, 0, 1036, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f638002829ULL }, // Inst #14674 = VPADDSBYrr |
| 32483 | { 14673, 7, 1, 0, 453, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f638002819ULL }, // Inst #14673 = VPADDSBYrm |
| 32484 | { 14672, 3, 1, 0, 1209, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xea38002829ULL }, // Inst #14672 = VPADDQrr |
| 32485 | { 14671, 7, 1, 0, 1216, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea38002819ULL }, // Inst #14671 = VPADDQrm |
| 32486 | { 14670, 4, 1, 0, 1755, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeea78022829ULL }, // Inst #14670 = VPADDQZrrkz |
| 32487 | { 14669, 5, 1, 0, 1755, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaea78022829ULL }, // Inst #14669 = VPADDQZrrk |
| 32488 | { 14668, 3, 1, 0, 1755, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ea78022829ULL }, // Inst #14668 = VPADDQZrr |
| 32489 | { 14667, 8, 1, 0, 1836, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeea78022819ULL }, // Inst #14667 = VPADDQZrmkz |
| 32490 | { 14666, 9, 1, 0, 1836, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaea78022819ULL }, // Inst #14666 = VPADDQZrmk |
| 32491 | { 14665, 8, 1, 0, 1836, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eea78022819ULL }, // Inst #14665 = VPADDQZrmbkz |
| 32492 | { 14664, 9, 1, 0, 1836, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aea78022819ULL }, // Inst #14664 = VPADDQZrmbk |
| 32493 | { 14663, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98ea78022819ULL }, // Inst #14663 = VPADDQZrmb |
| 32494 | { 14662, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ea78022819ULL }, // Inst #14662 = VPADDQZrm |
| 32495 | { 14661, 4, 1, 0, 1852, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7ea78022829ULL }, // Inst #14661 = VPADDQZ256rrkz |
| 32496 | { 14660, 5, 1, 0, 1852, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ea78022829ULL }, // Inst #14660 = VPADDQZ256rrk |
| 32497 | { 14659, 3, 1, 0, 1852, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ea78022829ULL }, // Inst #14659 = VPADDQZ256rr |
| 32498 | { 14658, 8, 1, 0, 1967, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ea78022819ULL }, // Inst #14658 = VPADDQZ256rmkz |
| 32499 | { 14657, 9, 1, 0, 1967, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ea78022819ULL }, // Inst #14657 = VPADDQZ256rmk |
| 32500 | { 14656, 8, 1, 0, 1967, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97ea78022819ULL }, // Inst #14656 = VPADDQZ256rmbkz |
| 32501 | { 14655, 9, 1, 0, 1967, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93ea78022819ULL }, // Inst #14655 = VPADDQZ256rmbk |
| 32502 | { 14654, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91ea78022819ULL }, // Inst #14654 = VPADDQZ256rmb |
| 32503 | { 14653, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ea78022819ULL }, // Inst #14653 = VPADDQZ256rm |
| 32504 | { 14652, 4, 1, 0, 1851, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6ea78022829ULL }, // Inst #14652 = VPADDQZ128rrkz |
| 32505 | { 14651, 5, 1, 0, 1851, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ea78022829ULL }, // Inst #14651 = VPADDQZ128rrk |
| 32506 | { 14650, 3, 1, 0, 1851, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ea78022829ULL }, // Inst #14650 = VPADDQZ128rr |
| 32507 | { 14649, 8, 1, 0, 1868, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ea78022819ULL }, // Inst #14649 = VPADDQZ128rmkz |
| 32508 | { 14648, 9, 1, 0, 1868, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ea78022819ULL }, // Inst #14648 = VPADDQZ128rmk |
| 32509 | { 14647, 8, 1, 0, 1868, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96ea78022819ULL }, // Inst #14647 = VPADDQZ128rmbkz |
| 32510 | { 14646, 9, 1, 0, 1868, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92ea78022819ULL }, // Inst #14646 = VPADDQZ128rmbk |
| 32511 | { 14645, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90ea78022819ULL }, // Inst #14645 = VPADDQZ128rmb |
| 32512 | { 14644, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ea78022819ULL }, // Inst #14644 = VPADDQZ128rm |
| 32513 | { 14643, 3, 1, 0, 1210, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1ea38002829ULL }, // Inst #14643 = VPADDQYrr |
| 32514 | { 14642, 7, 1, 0, 1219, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ea38002819ULL }, // Inst #14642 = VPADDQYrm |
| 32515 | { 14641, 3, 1, 0, 1209, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xff38002829ULL }, // Inst #14641 = VPADDDrr |
| 32516 | { 14640, 7, 1, 0, 1216, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xff38002819ULL }, // Inst #14640 = VPADDDrm |
| 32517 | { 14639, 4, 1, 0, 1755, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeff78002829ULL }, // Inst #14639 = VPADDDZrrkz |
| 32518 | { 14638, 5, 1, 0, 1755, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaff78002829ULL }, // Inst #14638 = VPADDDZrrk |
| 32519 | { 14637, 3, 1, 0, 1755, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ff78002829ULL }, // Inst #14637 = VPADDDZrr |
| 32520 | { 14636, 8, 1, 0, 1836, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeff78002819ULL }, // Inst #14636 = VPADDDZrmkz |
| 32521 | { 14635, 9, 1, 0, 1836, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaff78002819ULL }, // Inst #14635 = VPADDDZrmk |
| 32522 | { 14634, 8, 1, 0, 1836, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eff78002819ULL }, // Inst #14634 = VPADDDZrmbkz |
| 32523 | { 14633, 9, 1, 0, 1836, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aff78002819ULL }, // Inst #14633 = VPADDDZrmbk |
| 32524 | { 14632, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78ff78002819ULL }, // Inst #14632 = VPADDDZrmb |
| 32525 | { 14631, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ff78002819ULL }, // Inst #14631 = VPADDDZrm |
| 32526 | { 14630, 4, 1, 0, 1852, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7ff78002829ULL }, // Inst #14630 = VPADDDZ256rrkz |
| 32527 | { 14629, 5, 1, 0, 1852, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ff78002829ULL }, // Inst #14629 = VPADDDZ256rrk |
| 32528 | { 14628, 3, 1, 0, 1852, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ff78002829ULL }, // Inst #14628 = VPADDDZ256rr |
| 32529 | { 14627, 8, 1, 0, 1967, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ff78002819ULL }, // Inst #14627 = VPADDDZ256rmkz |
| 32530 | { 14626, 9, 1, 0, 1967, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ff78002819ULL }, // Inst #14626 = VPADDDZ256rmk |
| 32531 | { 14625, 8, 1, 0, 1967, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77ff78002819ULL }, // Inst #14625 = VPADDDZ256rmbkz |
| 32532 | { 14624, 9, 1, 0, 1967, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73ff78002819ULL }, // Inst #14624 = VPADDDZ256rmbk |
| 32533 | { 14623, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71ff78002819ULL }, // Inst #14623 = VPADDDZ256rmb |
| 32534 | { 14622, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ff78002819ULL }, // Inst #14622 = VPADDDZ256rm |
| 32535 | { 14621, 4, 1, 0, 1851, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6ff78002829ULL }, // Inst #14621 = VPADDDZ128rrkz |
| 32536 | { 14620, 5, 1, 0, 1851, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ff78002829ULL }, // Inst #14620 = VPADDDZ128rrk |
| 32537 | { 14619, 3, 1, 0, 1851, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ff78002829ULL }, // Inst #14619 = VPADDDZ128rr |
| 32538 | { 14618, 8, 1, 0, 1868, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ff78002819ULL }, // Inst #14618 = VPADDDZ128rmkz |
| 32539 | { 14617, 9, 1, 0, 1868, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ff78002819ULL }, // Inst #14617 = VPADDDZ128rmk |
| 32540 | { 14616, 8, 1, 0, 1868, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76ff78002819ULL }, // Inst #14616 = VPADDDZ128rmbkz |
| 32541 | { 14615, 9, 1, 0, 1868, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72ff78002819ULL }, // Inst #14615 = VPADDDZ128rmbk |
| 32542 | { 14614, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70ff78002819ULL }, // Inst #14614 = VPADDDZ128rmb |
| 32543 | { 14613, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ff78002819ULL }, // Inst #14613 = VPADDDZ128rm |
| 32544 | { 14612, 3, 1, 0, 1210, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1ff38002829ULL }, // Inst #14612 = VPADDDYrr |
| 32545 | { 14611, 7, 1, 0, 1219, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ff38002819ULL }, // Inst #14611 = VPADDDYrm |
| 32546 | { 14610, 3, 1, 0, 1209, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xfe38002829ULL }, // Inst #14610 = VPADDBrr |
| 32547 | { 14609, 7, 1, 0, 1216, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfe38002819ULL }, // Inst #14609 = VPADDBrm |
| 32548 | { 14608, 4, 1, 0, 1236, 0, 0, 2920, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeefe78002829ULL }, // Inst #14608 = VPADDBZrrkz |
| 32549 | { 14607, 5, 1, 0, 1236, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeafe78002829ULL }, // Inst #14607 = VPADDBZrrk |
| 32550 | { 14606, 3, 1, 0, 1755, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8fe78002829ULL }, // Inst #14606 = VPADDBZrr |
| 32551 | { 14605, 8, 1, 0, 1330, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeefe78002819ULL }, // Inst #14605 = VPADDBZrmkz |
| 32552 | { 14604, 9, 1, 0, 1330, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeafe78002819ULL }, // Inst #14604 = VPADDBZrmk |
| 32553 | { 14603, 7, 1, 0, 1836, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8fe78002819ULL }, // Inst #14603 = VPADDBZrm |
| 32554 | { 14602, 4, 1, 0, 1235, 0, 0, 2894, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7fe78002829ULL }, // Inst #14602 = VPADDBZ256rrkz |
| 32555 | { 14601, 5, 1, 0, 1235, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3fe78002829ULL }, // Inst #14601 = VPADDBZ256rrk |
| 32556 | { 14600, 3, 1, 0, 1852, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1fe78002829ULL }, // Inst #14600 = VPADDBZ256rr |
| 32557 | { 14599, 8, 1, 0, 1329, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7fe78002819ULL }, // Inst #14599 = VPADDBZ256rmkz |
| 32558 | { 14598, 9, 1, 0, 1329, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3fe78002819ULL }, // Inst #14598 = VPADDBZ256rmk |
| 32559 | { 14597, 7, 1, 0, 1967, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1fe78002819ULL }, // Inst #14597 = VPADDBZ256rm |
| 32560 | { 14596, 4, 1, 0, 1234, 0, 0, 2868, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6fe78002829ULL }, // Inst #14596 = VPADDBZ128rrkz |
| 32561 | { 14595, 5, 1, 0, 1234, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2fe78002829ULL }, // Inst #14595 = VPADDBZ128rrk |
| 32562 | { 14594, 3, 1, 0, 1851, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0fe78002829ULL }, // Inst #14594 = VPADDBZ128rr |
| 32563 | { 14593, 8, 1, 0, 1305, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6fe78002819ULL }, // Inst #14593 = VPADDBZ128rmkz |
| 32564 | { 14592, 9, 1, 0, 1305, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2fe78002819ULL }, // Inst #14592 = VPADDBZ128rmk |
| 32565 | { 14591, 7, 1, 0, 1868, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0fe78002819ULL }, // Inst #14591 = VPADDBZ128rm |
| 32566 | { 14590, 3, 1, 0, 1210, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1fe38002829ULL }, // Inst #14590 = VPADDBYrr |
| 32567 | { 14589, 7, 1, 0, 1219, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1fe38002819ULL }, // Inst #14589 = VPADDBYrm |
| 32568 | { 14588, 3, 1, 0, 1592, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb3b8002829ULL }, // Inst #14588 = VPACKUSWBrr |
| 32569 | { 14587, 7, 1, 0, 1591, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb3b8002819ULL }, // Inst #14587 = VPACKUSWBrm |
| 32570 | { 14586, 4, 1, 0, 2160, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeeb3f8002829ULL }, // Inst #14586 = VPACKUSWBZrrkz |
| 32571 | { 14585, 5, 1, 0, 2160, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeab3f8002829ULL }, // Inst #14585 = VPACKUSWBZrrk |
| 32572 | { 14584, 3, 1, 0, 1109, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b3f8002829ULL }, // Inst #14584 = VPACKUSWBZrr |
| 32573 | { 14583, 8, 1, 0, 1886, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb3f8002819ULL }, // Inst #14583 = VPACKUSWBZrmkz |
| 32574 | { 14582, 9, 1, 0, 1886, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab3f8002819ULL }, // Inst #14582 = VPACKUSWBZrmk |
| 32575 | { 14581, 7, 1, 0, 1436, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b3f8002819ULL }, // Inst #14581 = VPACKUSWBZrm |
| 32576 | { 14580, 4, 1, 0, 1108, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7b3f8002829ULL }, // Inst #14580 = VPACKUSWBZ256rrkz |
| 32577 | { 14579, 5, 1, 0, 1108, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3b3f8002829ULL }, // Inst #14579 = VPACKUSWBZ256rrk |
| 32578 | { 14578, 3, 1, 0, 1724, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b3f8002829ULL }, // Inst #14578 = VPACKUSWBZ256rr |
| 32579 | { 14577, 8, 1, 0, 1885, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b3f8002819ULL }, // Inst #14577 = VPACKUSWBZ256rmkz |
| 32580 | { 14576, 9, 1, 0, 1885, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b3f8002819ULL }, // Inst #14576 = VPACKUSWBZ256rmk |
| 32581 | { 14575, 7, 1, 0, 1435, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b3f8002819ULL }, // Inst #14575 = VPACKUSWBZ256rm |
| 32582 | { 14574, 4, 1, 0, 1107, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6b3f8002829ULL }, // Inst #14574 = VPACKUSWBZ128rrkz |
| 32583 | { 14573, 5, 1, 0, 1107, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2b3f8002829ULL }, // Inst #14573 = VPACKUSWBZ128rrk |
| 32584 | { 14572, 3, 1, 0, 1723, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b3f8002829ULL }, // Inst #14572 = VPACKUSWBZ128rr |
| 32585 | { 14571, 8, 1, 0, 1434, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b3f8002819ULL }, // Inst #14571 = VPACKUSWBZ128rmkz |
| 32586 | { 14570, 9, 1, 0, 1434, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b3f8002819ULL }, // Inst #14570 = VPACKUSWBZ128rmk |
| 32587 | { 14569, 7, 1, 0, 1708, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b3f8002819ULL }, // Inst #14569 = VPACKUSWBZ128rm |
| 32588 | { 14568, 3, 1, 0, 1422, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b3b8002829ULL }, // Inst #14568 = VPACKUSWBYrr |
| 32589 | { 14567, 7, 1, 0, 1645, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b3b8002819ULL }, // Inst #14567 = VPACKUSWBYrm |
| 32590 | { 14566, 3, 1, 0, 1592, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x95b8004829ULL }, // Inst #14566 = VPACKUSDWrr |
| 32591 | { 14565, 7, 1, 0, 1591, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x95b8004819ULL }, // Inst #14565 = VPACKUSDWrm |
| 32592 | { 14564, 4, 1, 0, 2160, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xee95f8004829ULL }, // Inst #14564 = VPACKUSDWZrrkz |
| 32593 | { 14563, 5, 1, 0, 2160, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xea95f8004829ULL }, // Inst #14563 = VPACKUSDWZrrk |
| 32594 | { 14562, 3, 1, 0, 1109, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe895f8004829ULL }, // Inst #14562 = VPACKUSDWZrr |
| 32595 | { 14561, 8, 1, 0, 1886, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee95f8004819ULL }, // Inst #14561 = VPACKUSDWZrmkz |
| 32596 | { 14560, 9, 1, 0, 1886, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea95f8004819ULL }, // Inst #14560 = VPACKUSDWZrmk |
| 32597 | { 14559, 8, 1, 0, 1886, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e95f8004819ULL }, // Inst #14559 = VPACKUSDWZrmbkz |
| 32598 | { 14558, 9, 1, 0, 1886, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a95f8004819ULL }, // Inst #14558 = VPACKUSDWZrmbk |
| 32599 | { 14557, 7, 1, 0, 1436, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7895f8004819ULL }, // Inst #14557 = VPACKUSDWZrmb |
| 32600 | { 14556, 7, 1, 0, 1436, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe895f8004819ULL }, // Inst #14556 = VPACKUSDWZrm |
| 32601 | { 14555, 4, 1, 0, 1108, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc795f8004829ULL }, // Inst #14555 = VPACKUSDWZ256rrkz |
| 32602 | { 14554, 5, 1, 0, 1108, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc395f8004829ULL }, // Inst #14554 = VPACKUSDWZ256rrk |
| 32603 | { 14553, 3, 1, 0, 1724, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc195f8004829ULL }, // Inst #14553 = VPACKUSDWZ256rr |
| 32604 | { 14552, 8, 1, 0, 1885, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc795f8004819ULL }, // Inst #14552 = VPACKUSDWZ256rmkz |
| 32605 | { 14551, 9, 1, 0, 1885, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc395f8004819ULL }, // Inst #14551 = VPACKUSDWZ256rmk |
| 32606 | { 14550, 8, 1, 0, 1885, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7795f8004819ULL }, // Inst #14550 = VPACKUSDWZ256rmbkz |
| 32607 | { 14549, 9, 1, 0, 1885, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7395f8004819ULL }, // Inst #14549 = VPACKUSDWZ256rmbk |
| 32608 | { 14548, 7, 1, 0, 1435, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7195f8004819ULL }, // Inst #14548 = VPACKUSDWZ256rmb |
| 32609 | { 14547, 7, 1, 0, 1435, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc195f8004819ULL }, // Inst #14547 = VPACKUSDWZ256rm |
| 32610 | { 14546, 4, 1, 0, 1107, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa695f8004829ULL }, // Inst #14546 = VPACKUSDWZ128rrkz |
| 32611 | { 14545, 5, 1, 0, 1107, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa295f8004829ULL }, // Inst #14545 = VPACKUSDWZ128rrk |
| 32612 | { 14544, 3, 1, 0, 1723, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa095f8004829ULL }, // Inst #14544 = VPACKUSDWZ128rr |
| 32613 | { 14543, 8, 1, 0, 1434, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa695f8004819ULL }, // Inst #14543 = VPACKUSDWZ128rmkz |
| 32614 | { 14542, 9, 1, 0, 1434, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa295f8004819ULL }, // Inst #14542 = VPACKUSDWZ128rmk |
| 32615 | { 14541, 8, 1, 0, 1434, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7695f8004819ULL }, // Inst #14541 = VPACKUSDWZ128rmbkz |
| 32616 | { 14540, 9, 1, 0, 1434, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7295f8004819ULL }, // Inst #14540 = VPACKUSDWZ128rmbk |
| 32617 | { 14539, 7, 1, 0, 1708, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7095f8004819ULL }, // Inst #14539 = VPACKUSDWZ128rmb |
| 32618 | { 14538, 7, 1, 0, 1708, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa095f8004819ULL }, // Inst #14538 = VPACKUSDWZ128rm |
| 32619 | { 14537, 3, 1, 0, 1422, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x195b8004829ULL }, // Inst #14537 = VPACKUSDWYrr |
| 32620 | { 14536, 7, 1, 0, 1645, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x195b8004819ULL }, // Inst #14536 = VPACKUSDWYrm |
| 32621 | { 14535, 3, 1, 0, 1592, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb1b8002829ULL }, // Inst #14535 = VPACKSSWBrr |
| 32622 | { 14534, 7, 1, 0, 1591, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb1b8002819ULL }, // Inst #14534 = VPACKSSWBrm |
| 32623 | { 14533, 4, 1, 0, 2160, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeeb1f8002829ULL }, // Inst #14533 = VPACKSSWBZrrkz |
| 32624 | { 14532, 5, 1, 0, 2160, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeab1f8002829ULL }, // Inst #14532 = VPACKSSWBZrrk |
| 32625 | { 14531, 3, 1, 0, 1109, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b1f8002829ULL }, // Inst #14531 = VPACKSSWBZrr |
| 32626 | { 14530, 8, 1, 0, 1886, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb1f8002819ULL }, // Inst #14530 = VPACKSSWBZrmkz |
| 32627 | { 14529, 9, 1, 0, 1886, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab1f8002819ULL }, // Inst #14529 = VPACKSSWBZrmk |
| 32628 | { 14528, 7, 1, 0, 1436, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b1f8002819ULL }, // Inst #14528 = VPACKSSWBZrm |
| 32629 | { 14527, 4, 1, 0, 1108, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7b1f8002829ULL }, // Inst #14527 = VPACKSSWBZ256rrkz |
| 32630 | { 14526, 5, 1, 0, 1108, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3b1f8002829ULL }, // Inst #14526 = VPACKSSWBZ256rrk |
| 32631 | { 14525, 3, 1, 0, 1724, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b1f8002829ULL }, // Inst #14525 = VPACKSSWBZ256rr |
| 32632 | { 14524, 8, 1, 0, 1885, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b1f8002819ULL }, // Inst #14524 = VPACKSSWBZ256rmkz |
| 32633 | { 14523, 9, 1, 0, 1885, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b1f8002819ULL }, // Inst #14523 = VPACKSSWBZ256rmk |
| 32634 | { 14522, 7, 1, 0, 1435, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b1f8002819ULL }, // Inst #14522 = VPACKSSWBZ256rm |
| 32635 | { 14521, 4, 1, 0, 1107, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6b1f8002829ULL }, // Inst #14521 = VPACKSSWBZ128rrkz |
| 32636 | { 14520, 5, 1, 0, 1107, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2b1f8002829ULL }, // Inst #14520 = VPACKSSWBZ128rrk |
| 32637 | { 14519, 3, 1, 0, 1723, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b1f8002829ULL }, // Inst #14519 = VPACKSSWBZ128rr |
| 32638 | { 14518, 8, 1, 0, 1434, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b1f8002819ULL }, // Inst #14518 = VPACKSSWBZ128rmkz |
| 32639 | { 14517, 9, 1, 0, 1434, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b1f8002819ULL }, // Inst #14517 = VPACKSSWBZ128rmk |
| 32640 | { 14516, 7, 1, 0, 1708, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b1f8002819ULL }, // Inst #14516 = VPACKSSWBZ128rm |
| 32641 | { 14515, 3, 1, 0, 1422, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b1b8002829ULL }, // Inst #14515 = VPACKSSWBYrr |
| 32642 | { 14514, 7, 1, 0, 1645, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b1b8002819ULL }, // Inst #14514 = VPACKSSWBYrm |
| 32643 | { 14513, 3, 1, 0, 1592, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xb5b8002829ULL }, // Inst #14513 = VPACKSSDWrr |
| 32644 | { 14512, 7, 1, 0, 1591, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb5b8002819ULL }, // Inst #14512 = VPACKSSDWrm |
| 32645 | { 14511, 4, 1, 0, 2160, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeeb5f8002829ULL }, // Inst #14511 = VPACKSSDWZrrkz |
| 32646 | { 14510, 5, 1, 0, 2160, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeab5f8002829ULL }, // Inst #14510 = VPACKSSDWZrrk |
| 32647 | { 14509, 3, 1, 0, 1109, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b5f8002829ULL }, // Inst #14509 = VPACKSSDWZrr |
| 32648 | { 14508, 8, 1, 0, 1886, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb5f8002819ULL }, // Inst #14508 = VPACKSSDWZrmkz |
| 32649 | { 14507, 9, 1, 0, 1886, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab5f8002819ULL }, // Inst #14507 = VPACKSSDWZrmk |
| 32650 | { 14506, 8, 1, 0, 1886, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb5f8002819ULL }, // Inst #14506 = VPACKSSDWZrmbkz |
| 32651 | { 14505, 9, 1, 0, 1886, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab5f8002819ULL }, // Inst #14505 = VPACKSSDWZrmbk |
| 32652 | { 14504, 7, 1, 0, 1436, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b5f8002819ULL }, // Inst #14504 = VPACKSSDWZrmb |
| 32653 | { 14503, 7, 1, 0, 1436, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b5f8002819ULL }, // Inst #14503 = VPACKSSDWZrm |
| 32654 | { 14502, 4, 1, 0, 1108, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7b5f8002829ULL }, // Inst #14502 = VPACKSSDWZ256rrkz |
| 32655 | { 14501, 5, 1, 0, 1108, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3b5f8002829ULL }, // Inst #14501 = VPACKSSDWZ256rrk |
| 32656 | { 14500, 3, 1, 0, 1724, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b5f8002829ULL }, // Inst #14500 = VPACKSSDWZ256rr |
| 32657 | { 14499, 8, 1, 0, 1885, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b5f8002819ULL }, // Inst #14499 = VPACKSSDWZ256rmkz |
| 32658 | { 14498, 9, 1, 0, 1885, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b5f8002819ULL }, // Inst #14498 = VPACKSSDWZ256rmk |
| 32659 | { 14497, 8, 1, 0, 1885, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b5f8002819ULL }, // Inst #14497 = VPACKSSDWZ256rmbkz |
| 32660 | { 14496, 9, 1, 0, 1885, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b5f8002819ULL }, // Inst #14496 = VPACKSSDWZ256rmbk |
| 32661 | { 14495, 7, 1, 0, 1435, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b5f8002819ULL }, // Inst #14495 = VPACKSSDWZ256rmb |
| 32662 | { 14494, 7, 1, 0, 1435, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b5f8002819ULL }, // Inst #14494 = VPACKSSDWZ256rm |
| 32663 | { 14493, 4, 1, 0, 1107, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6b5f8002829ULL }, // Inst #14493 = VPACKSSDWZ128rrkz |
| 32664 | { 14492, 5, 1, 0, 1107, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2b5f8002829ULL }, // Inst #14492 = VPACKSSDWZ128rrk |
| 32665 | { 14491, 3, 1, 0, 1723, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b5f8002829ULL }, // Inst #14491 = VPACKSSDWZ128rr |
| 32666 | { 14490, 8, 1, 0, 1434, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b5f8002819ULL }, // Inst #14490 = VPACKSSDWZ128rmkz |
| 32667 | { 14489, 9, 1, 0, 1434, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b5f8002819ULL }, // Inst #14489 = VPACKSSDWZ128rmk |
| 32668 | { 14488, 8, 1, 0, 1434, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b5f8002819ULL }, // Inst #14488 = VPACKSSDWZ128rmbkz |
| 32669 | { 14487, 9, 1, 0, 1434, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b5f8002819ULL }, // Inst #14487 = VPACKSSDWZ128rmbk |
| 32670 | { 14486, 7, 1, 0, 1708, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b5f8002819ULL }, // Inst #14486 = VPACKSSDWZ128rmb |
| 32671 | { 14485, 7, 1, 0, 1708, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b5f8002819ULL }, // Inst #14485 = VPACKSSDWZ128rm |
| 32672 | { 14484, 3, 1, 0, 1422, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1b5b8002829ULL }, // Inst #14484 = VPACKSSDWYrr |
| 32673 | { 14483, 7, 1, 0, 1645, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b5b8002819ULL }, // Inst #14483 = VPACKSSDWYrm |
| 32674 | { 14482, 2, 1, 0, 1034, 0, 0, 557, X86ImpOpBase + 0, 0, 0xeb8004829ULL }, // Inst #14482 = VPABSWrr |
| 32675 | { 14481, 6, 1, 0, 249, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeb8004819ULL }, // Inst #14481 = VPABSWrm |
| 32676 | { 14480, 3, 1, 0, 1808, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee0ef8004829ULL }, // Inst #14480 = VPABSWZrrkz |
| 32677 | { 14479, 4, 1, 0, 1808, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea0ef8004829ULL }, // Inst #14479 = VPABSWZrrk |
| 32678 | { 14478, 2, 1, 0, 1798, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe80ef8004829ULL }, // Inst #14478 = VPABSWZrr |
| 32679 | { 14477, 7, 1, 0, 1853, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0ef8004819ULL }, // Inst #14477 = VPABSWZrmkz |
| 32680 | { 14476, 8, 1, 0, 1853, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0ef8004819ULL }, // Inst #14476 = VPABSWZrmk |
| 32681 | { 14475, 6, 1, 0, 493, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80ef8004819ULL }, // Inst #14475 = VPABSWZrm |
| 32682 | { 14474, 3, 1, 0, 2289, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc70ef8004829ULL }, // Inst #14474 = VPABSWZ256rrkz |
| 32683 | { 14473, 4, 1, 0, 2289, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc30ef8004829ULL }, // Inst #14473 = VPABSWZ256rrk |
| 32684 | { 14472, 2, 1, 0, 454, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc10ef8004829ULL }, // Inst #14472 = VPABSWZ256rr |
| 32685 | { 14471, 7, 1, 0, 2049, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70ef8004819ULL }, // Inst #14471 = VPABSWZ256rmkz |
| 32686 | { 14470, 8, 1, 0, 2049, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30ef8004819ULL }, // Inst #14470 = VPABSWZ256rmk |
| 32687 | { 14469, 6, 1, 0, 492, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10ef8004819ULL }, // Inst #14469 = VPABSWZ256rm |
| 32688 | { 14468, 3, 1, 0, 2288, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa60ef8004829ULL }, // Inst #14468 = VPABSWZ128rrkz |
| 32689 | { 14467, 4, 1, 0, 2288, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa20ef8004829ULL }, // Inst #14467 = VPABSWZ128rrk |
| 32690 | { 14466, 2, 1, 0, 1145, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa00ef8004829ULL }, // Inst #14466 = VPABSWZ128rr |
| 32691 | { 14465, 7, 1, 0, 2048, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60ef8004819ULL }, // Inst #14465 = VPABSWZ128rmkz |
| 32692 | { 14464, 8, 1, 0, 2048, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa20ef8004819ULL }, // Inst #14464 = VPABSWZ128rmk |
| 32693 | { 14463, 6, 1, 0, 249, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa00ef8004819ULL }, // Inst #14463 = VPABSWZ128rm |
| 32694 | { 14462, 2, 1, 0, 1036, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x10eb8004829ULL }, // Inst #14462 = VPABSWYrr |
| 32695 | { 14461, 6, 1, 0, 492, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10eb8004819ULL }, // Inst #14461 = VPABSWYrm |
| 32696 | { 14460, 3, 1, 0, 1798, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee0ff8024829ULL }, // Inst #14460 = VPABSQZrrkz |
| 32697 | { 14459, 4, 1, 0, 1798, 0, 0, 2804, X86ImpOpBase + 0, 0, 0xea0ff8024829ULL }, // Inst #14459 = VPABSQZrrk |
| 32698 | { 14458, 2, 1, 0, 1798, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe80ff8024829ULL }, // Inst #14458 = VPABSQZrr |
| 32699 | { 14457, 7, 1, 0, 493, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0ff8024819ULL }, // Inst #14457 = VPABSQZrmkz |
| 32700 | { 14456, 8, 1, 0, 493, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0ff8024819ULL }, // Inst #14456 = VPABSQZrmk |
| 32701 | { 14455, 7, 1, 0, 493, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e0ff8024819ULL }, // Inst #14455 = VPABSQZrmbkz |
| 32702 | { 14454, 8, 1, 0, 493, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a0ff8024819ULL }, // Inst #14454 = VPABSQZrmbk |
| 32703 | { 14453, 6, 1, 0, 493, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x980ff8024819ULL }, // Inst #14453 = VPABSQZrmb |
| 32704 | { 14452, 6, 1, 0, 493, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80ff8024819ULL }, // Inst #14452 = VPABSQZrm |
| 32705 | { 14451, 3, 1, 0, 454, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc70ff8024829ULL }, // Inst #14451 = VPABSQZ256rrkz |
| 32706 | { 14450, 4, 1, 0, 454, 0, 0, 2782, X86ImpOpBase + 0, 0, 0xc30ff8024829ULL }, // Inst #14450 = VPABSQZ256rrk |
| 32707 | { 14449, 2, 1, 0, 454, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc10ff8024829ULL }, // Inst #14449 = VPABSQZ256rr |
| 32708 | { 14448, 7, 1, 0, 492, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70ff8024819ULL }, // Inst #14448 = VPABSQZ256rmkz |
| 32709 | { 14447, 8, 1, 0, 492, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30ff8024819ULL }, // Inst #14447 = VPABSQZ256rmk |
| 32710 | { 14446, 7, 1, 0, 492, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x970ff8024819ULL }, // Inst #14446 = VPABSQZ256rmbkz |
| 32711 | { 14445, 8, 1, 0, 492, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x930ff8024819ULL }, // Inst #14445 = VPABSQZ256rmbk |
| 32712 | { 14444, 6, 1, 0, 492, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x910ff8024819ULL }, // Inst #14444 = VPABSQZ256rmb |
| 32713 | { 14443, 6, 1, 0, 492, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10ff8024819ULL }, // Inst #14443 = VPABSQZ256rm |
| 32714 | { 14442, 3, 1, 0, 1145, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa60ff8024829ULL }, // Inst #14442 = VPABSQZ128rrkz |
| 32715 | { 14441, 4, 1, 0, 1145, 0, 0, 2766, X86ImpOpBase + 0, 0, 0xa20ff8024829ULL }, // Inst #14441 = VPABSQZ128rrk |
| 32716 | { 14440, 2, 1, 0, 1145, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa00ff8024829ULL }, // Inst #14440 = VPABSQZ128rr |
| 32717 | { 14439, 7, 1, 0, 249, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60ff8024819ULL }, // Inst #14439 = VPABSQZ128rmkz |
| 32718 | { 14438, 8, 1, 0, 249, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa20ff8024819ULL }, // Inst #14438 = VPABSQZ128rmk |
| 32719 | { 14437, 7, 1, 0, 249, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x960ff8024819ULL }, // Inst #14437 = VPABSQZ128rmbkz |
| 32720 | { 14436, 8, 1, 0, 249, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x920ff8024819ULL }, // Inst #14436 = VPABSQZ128rmbk |
| 32721 | { 14435, 6, 1, 0, 249, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x900ff8024819ULL }, // Inst #14435 = VPABSQZ128rmb |
| 32722 | { 14434, 6, 1, 0, 249, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa00ff8024819ULL }, // Inst #14434 = VPABSQZ128rm |
| 32723 | { 14433, 2, 1, 0, 1034, 0, 0, 557, X86ImpOpBase + 0, 0, 0xf38004829ULL }, // Inst #14433 = VPABSDrr |
| 32724 | { 14432, 6, 1, 0, 249, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf38004819ULL }, // Inst #14432 = VPABSDrm |
| 32725 | { 14431, 3, 1, 0, 1798, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee0f78004829ULL }, // Inst #14431 = VPABSDZrrkz |
| 32726 | { 14430, 4, 1, 0, 1798, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea0f78004829ULL }, // Inst #14430 = VPABSDZrrk |
| 32727 | { 14429, 2, 1, 0, 1798, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe80f78004829ULL }, // Inst #14429 = VPABSDZrr |
| 32728 | { 14428, 7, 1, 0, 493, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0f78004819ULL }, // Inst #14428 = VPABSDZrmkz |
| 32729 | { 14427, 8, 1, 0, 493, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0f78004819ULL }, // Inst #14427 = VPABSDZrmk |
| 32730 | { 14426, 7, 1, 0, 493, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e0f78004819ULL }, // Inst #14426 = VPABSDZrmbkz |
| 32731 | { 14425, 8, 1, 0, 493, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a0f78004819ULL }, // Inst #14425 = VPABSDZrmbk |
| 32732 | { 14424, 6, 1, 0, 493, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x780f78004819ULL }, // Inst #14424 = VPABSDZrmb |
| 32733 | { 14423, 6, 1, 0, 493, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80f78004819ULL }, // Inst #14423 = VPABSDZrm |
| 32734 | { 14422, 3, 1, 0, 454, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc70f78004829ULL }, // Inst #14422 = VPABSDZ256rrkz |
| 32735 | { 14421, 4, 1, 0, 454, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc30f78004829ULL }, // Inst #14421 = VPABSDZ256rrk |
| 32736 | { 14420, 2, 1, 0, 454, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc10f78004829ULL }, // Inst #14420 = VPABSDZ256rr |
| 32737 | { 14419, 7, 1, 0, 492, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70f78004819ULL }, // Inst #14419 = VPABSDZ256rmkz |
| 32738 | { 14418, 8, 1, 0, 492, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30f78004819ULL }, // Inst #14418 = VPABSDZ256rmk |
| 32739 | { 14417, 7, 1, 0, 492, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x770f78004819ULL }, // Inst #14417 = VPABSDZ256rmbkz |
| 32740 | { 14416, 8, 1, 0, 492, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x730f78004819ULL }, // Inst #14416 = VPABSDZ256rmbk |
| 32741 | { 14415, 6, 1, 0, 492, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x710f78004819ULL }, // Inst #14415 = VPABSDZ256rmb |
| 32742 | { 14414, 6, 1, 0, 492, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10f78004819ULL }, // Inst #14414 = VPABSDZ256rm |
| 32743 | { 14413, 3, 1, 0, 1145, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa60f78004829ULL }, // Inst #14413 = VPABSDZ128rrkz |
| 32744 | { 14412, 4, 1, 0, 1145, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa20f78004829ULL }, // Inst #14412 = VPABSDZ128rrk |
| 32745 | { 14411, 2, 1, 0, 1145, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa00f78004829ULL }, // Inst #14411 = VPABSDZ128rr |
| 32746 | { 14410, 7, 1, 0, 249, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60f78004819ULL }, // Inst #14410 = VPABSDZ128rmkz |
| 32747 | { 14409, 8, 1, 0, 249, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa20f78004819ULL }, // Inst #14409 = VPABSDZ128rmk |
| 32748 | { 14408, 7, 1, 0, 249, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x760f78004819ULL }, // Inst #14408 = VPABSDZ128rmbkz |
| 32749 | { 14407, 8, 1, 0, 249, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x720f78004819ULL }, // Inst #14407 = VPABSDZ128rmbk |
| 32750 | { 14406, 6, 1, 0, 249, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x700f78004819ULL }, // Inst #14406 = VPABSDZ128rmb |
| 32751 | { 14405, 6, 1, 0, 249, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa00f78004819ULL }, // Inst #14405 = VPABSDZ128rm |
| 32752 | { 14404, 2, 1, 0, 1036, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x10f38004829ULL }, // Inst #14404 = VPABSDYrr |
| 32753 | { 14403, 6, 1, 0, 492, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10f38004819ULL }, // Inst #14403 = VPABSDYrm |
| 32754 | { 14402, 2, 1, 0, 1034, 0, 0, 557, X86ImpOpBase + 0, 0, 0xe38004829ULL }, // Inst #14402 = VPABSBrr |
| 32755 | { 14401, 6, 1, 0, 249, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe38004819ULL }, // Inst #14401 = VPABSBrm |
| 32756 | { 14400, 3, 1, 0, 1808, 0, 0, 4991, X86ImpOpBase + 0, 0, 0xee0e78004829ULL }, // Inst #14400 = VPABSBZrrkz |
| 32757 | { 14399, 4, 1, 0, 1808, 0, 0, 4987, X86ImpOpBase + 0, 0, 0xea0e78004829ULL }, // Inst #14399 = VPABSBZrrk |
| 32758 | { 14398, 2, 1, 0, 1798, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe80e78004829ULL }, // Inst #14398 = VPABSBZrr |
| 32759 | { 14397, 7, 1, 0, 1853, 0, 0, 4980, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0e78004819ULL }, // Inst #14397 = VPABSBZrmkz |
| 32760 | { 14396, 8, 1, 0, 1853, 0, 0, 4972, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0e78004819ULL }, // Inst #14396 = VPABSBZrmk |
| 32761 | { 14395, 6, 1, 0, 493, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80e78004819ULL }, // Inst #14395 = VPABSBZrm |
| 32762 | { 14394, 3, 1, 0, 2289, 0, 0, 4962, X86ImpOpBase + 0, 0, 0xc70e78004829ULL }, // Inst #14394 = VPABSBZ256rrkz |
| 32763 | { 14393, 4, 1, 0, 2289, 0, 0, 4958, X86ImpOpBase + 0, 0, 0xc30e78004829ULL }, // Inst #14393 = VPABSBZ256rrk |
| 32764 | { 14392, 2, 1, 0, 454, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc10e78004829ULL }, // Inst #14392 = VPABSBZ256rr |
| 32765 | { 14391, 7, 1, 0, 2049, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70e78004819ULL }, // Inst #14391 = VPABSBZ256rmkz |
| 32766 | { 14390, 8, 1, 0, 2049, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30e78004819ULL }, // Inst #14390 = VPABSBZ256rmk |
| 32767 | { 14389, 6, 1, 0, 492, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10e78004819ULL }, // Inst #14389 = VPABSBZ256rm |
| 32768 | { 14388, 3, 1, 0, 2288, 0, 0, 4948, X86ImpOpBase + 0, 0, 0xa60e78004829ULL }, // Inst #14388 = VPABSBZ128rrkz |
| 32769 | { 14387, 4, 1, 0, 2288, 0, 0, 4944, X86ImpOpBase + 0, 0, 0xa20e78004829ULL }, // Inst #14387 = VPABSBZ128rrk |
| 32770 | { 14386, 2, 1, 0, 1145, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa00e78004829ULL }, // Inst #14386 = VPABSBZ128rr |
| 32771 | { 14385, 7, 1, 0, 2048, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60e78004819ULL }, // Inst #14385 = VPABSBZ128rmkz |
| 32772 | { 14384, 8, 1, 0, 2048, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa20e78004819ULL }, // Inst #14384 = VPABSBZ128rmk |
| 32773 | { 14383, 6, 1, 0, 249, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa00e78004819ULL }, // Inst #14383 = VPABSBZ128rm |
| 32774 | { 14382, 2, 1, 0, 1036, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x10e38004829ULL }, // Inst #14382 = VPABSBYrr |
| 32775 | { 14381, 6, 1, 0, 492, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e38004819ULL }, // Inst #14381 = VPABSBYrm |
| 32776 | { 14380, 9, 1, 0, 335, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaea978005819ULL }, // Inst #14380 = VP4DPWSSDrmkz |
| 32777 | { 14379, 9, 1, 0, 335, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaaa978005819ULL }, // Inst #14379 = VP4DPWSSDrmk |
| 32778 | { 14378, 8, 1, 0, 335, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8a978005819ULL }, // Inst #14378 = VP4DPWSSDrm |
| 32779 | { 14377, 9, 1, 0, 335, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaea9f8005819ULL }, // Inst #14377 = VP4DPWSSDSrmkz |
| 32780 | { 14376, 9, 1, 0, 335, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaaa9f8005819ULL }, // Inst #14376 = VP4DPWSSDSrmk |
| 32781 | { 14375, 8, 1, 0, 335, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa8a9f8005819ULL }, // Inst #14375 = VP4DPWSSDSrm |
| 32782 | { 14374, 3, 1, 0, 2287, 0, 0, 5093, X86ImpOpBase + 0, 0, 0xe8b478025829ULL }, // Inst #14374 = VP2INTERSECTQZrr |
| 32783 | { 14373, 7, 1, 0, 2286, 0, 0, 5086, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b478025819ULL }, // Inst #14373 = VP2INTERSECTQZrmb |
| 32784 | { 14372, 7, 1, 0, 2286, 0, 0, 5086, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b478025819ULL }, // Inst #14372 = VP2INTERSECTQZrm |
| 32785 | { 14371, 3, 1, 0, 2279, 0, 0, 5083, X86ImpOpBase + 0, 0, 0xc1b478025829ULL }, // Inst #14371 = VP2INTERSECTQZ256rr |
| 32786 | { 14370, 7, 1, 0, 2277, 0, 0, 5076, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b478025819ULL }, // Inst #14370 = VP2INTERSECTQZ256rmb |
| 32787 | { 14369, 7, 1, 0, 2277, 0, 0, 5076, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b478025819ULL }, // Inst #14369 = VP2INTERSECTQZ256rm |
| 32788 | { 14368, 3, 1, 0, 2285, 0, 0, 5073, X86ImpOpBase + 0, 0, 0xa0b478025829ULL }, // Inst #14368 = VP2INTERSECTQZ128rr |
| 32789 | { 14367, 7, 1, 0, 2284, 0, 0, 5066, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b478025819ULL }, // Inst #14367 = VP2INTERSECTQZ128rmb |
| 32790 | { 14366, 7, 1, 0, 2284, 0, 0, 5066, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b478025819ULL }, // Inst #14366 = VP2INTERSECTQZ128rm |
| 32791 | { 14365, 3, 1, 0, 2283, 0, 0, 5063, X86ImpOpBase + 0, 0, 0xe8b478005829ULL }, // Inst #14365 = VP2INTERSECTDZrr |
| 32792 | { 14364, 7, 1, 0, 2282, 0, 0, 5056, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b478005819ULL }, // Inst #14364 = VP2INTERSECTDZrmb |
| 32793 | { 14363, 7, 1, 0, 2282, 0, 0, 5056, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b478005819ULL }, // Inst #14363 = VP2INTERSECTDZrm |
| 32794 | { 14362, 3, 1, 0, 2281, 0, 0, 5053, X86ImpOpBase + 0, 0, 0xc1b478005829ULL }, // Inst #14362 = VP2INTERSECTDZ256rr |
| 32795 | { 14361, 7, 1, 0, 2280, 0, 0, 5046, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b478005819ULL }, // Inst #14361 = VP2INTERSECTDZ256rmb |
| 32796 | { 14360, 7, 1, 0, 2280, 0, 0, 5046, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b478005819ULL }, // Inst #14360 = VP2INTERSECTDZ256rm |
| 32797 | { 14359, 3, 1, 0, 2278, 0, 0, 5043, X86ImpOpBase + 0, 0, 0xa0b478005829ULL }, // Inst #14359 = VP2INTERSECTDZ128rr |
| 32798 | { 14358, 7, 1, 0, 2276, 0, 0, 5036, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b478005819ULL }, // Inst #14358 = VP2INTERSECTDZ128rmb |
| 32799 | { 14357, 7, 1, 0, 2276, 0, 0, 5036, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b478005819ULL }, // Inst #14357 = VP2INTERSECTDZ128rm |
| 32800 | { 14356, 3, 1, 0, 44, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xab28002029ULL }, // Inst #14356 = VORPSrr |
| 32801 | { 14355, 7, 1, 0, 43, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xab28002019ULL }, // Inst #14355 = VORPSrm |
| 32802 | { 14354, 4, 1, 0, 352, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeab68002029ULL }, // Inst #14354 = VORPSZrrkz |
| 32803 | { 14353, 5, 1, 0, 352, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaab68002029ULL }, // Inst #14353 = VORPSZrrk |
| 32804 | { 14352, 3, 1, 0, 352, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ab68002029ULL }, // Inst #14352 = VORPSZrr |
| 32805 | { 14351, 8, 1, 0, 351, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeab68002019ULL }, // Inst #14351 = VORPSZrmkz |
| 32806 | { 14350, 9, 1, 0, 351, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaab68002019ULL }, // Inst #14350 = VORPSZrmk |
| 32807 | { 14349, 8, 1, 0, 351, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eab68002019ULL }, // Inst #14349 = VORPSZrmbkz |
| 32808 | { 14348, 9, 1, 0, 351, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aab68002019ULL }, // Inst #14348 = VORPSZrmbk |
| 32809 | { 14347, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78ab68002019ULL }, // Inst #14347 = VORPSZrmb |
| 32810 | { 14346, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ab68002019ULL }, // Inst #14346 = VORPSZrm |
| 32811 | { 14345, 4, 1, 0, 350, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7ab68002029ULL }, // Inst #14345 = VORPSZ256rrkz |
| 32812 | { 14344, 5, 1, 0, 350, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ab68002029ULL }, // Inst #14344 = VORPSZ256rrk |
| 32813 | { 14343, 3, 1, 0, 350, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ab68002029ULL }, // Inst #14343 = VORPSZ256rr |
| 32814 | { 14342, 8, 1, 0, 349, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ab68002019ULL }, // Inst #14342 = VORPSZ256rmkz |
| 32815 | { 14341, 9, 1, 0, 349, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ab68002019ULL }, // Inst #14341 = VORPSZ256rmk |
| 32816 | { 14340, 8, 1, 0, 349, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77ab68002019ULL }, // Inst #14340 = VORPSZ256rmbkz |
| 32817 | { 14339, 9, 1, 0, 349, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73ab68002019ULL }, // Inst #14339 = VORPSZ256rmbk |
| 32818 | { 14338, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71ab68002019ULL }, // Inst #14338 = VORPSZ256rmb |
| 32819 | { 14337, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ab68002019ULL }, // Inst #14337 = VORPSZ256rm |
| 32820 | { 14336, 4, 1, 0, 44, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6ab68002029ULL }, // Inst #14336 = VORPSZ128rrkz |
| 32821 | { 14335, 5, 1, 0, 44, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ab68002029ULL }, // Inst #14335 = VORPSZ128rrk |
| 32822 | { 14334, 3, 1, 0, 44, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ab68002029ULL }, // Inst #14334 = VORPSZ128rr |
| 32823 | { 14333, 8, 1, 0, 43, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ab68002019ULL }, // Inst #14333 = VORPSZ128rmkz |
| 32824 | { 14332, 9, 1, 0, 43, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ab68002019ULL }, // Inst #14332 = VORPSZ128rmk |
| 32825 | { 14331, 8, 1, 0, 43, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76ab68002019ULL }, // Inst #14331 = VORPSZ128rmbkz |
| 32826 | { 14330, 9, 1, 0, 43, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72ab68002019ULL }, // Inst #14330 = VORPSZ128rmbk |
| 32827 | { 14329, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70ab68002019ULL }, // Inst #14329 = VORPSZ128rmb |
| 32828 | { 14328, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ab68002019ULL }, // Inst #14328 = VORPSZ128rm |
| 32829 | { 14327, 3, 1, 0, 350, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1ab28002029ULL }, // Inst #14327 = VORPSYrr |
| 32830 | { 14326, 7, 1, 0, 349, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ab28002019ULL }, // Inst #14326 = VORPSYrm |
| 32831 | { 14325, 3, 1, 0, 44, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xab30002829ULL }, // Inst #14325 = VORPDrr |
| 32832 | { 14324, 7, 1, 0, 43, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xab30002819ULL }, // Inst #14324 = VORPDrm |
| 32833 | { 14323, 4, 1, 0, 352, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeab70022829ULL }, // Inst #14323 = VORPDZrrkz |
| 32834 | { 14322, 5, 1, 0, 352, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaab70022829ULL }, // Inst #14322 = VORPDZrrk |
| 32835 | { 14321, 3, 1, 0, 352, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ab70022829ULL }, // Inst #14321 = VORPDZrr |
| 32836 | { 14320, 8, 1, 0, 351, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeab70022819ULL }, // Inst #14320 = VORPDZrmkz |
| 32837 | { 14319, 9, 1, 0, 351, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaab70022819ULL }, // Inst #14319 = VORPDZrmk |
| 32838 | { 14318, 8, 1, 0, 351, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eab70022819ULL }, // Inst #14318 = VORPDZrmbkz |
| 32839 | { 14317, 9, 1, 0, 351, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aab70022819ULL }, // Inst #14317 = VORPDZrmbk |
| 32840 | { 14316, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98ab70022819ULL }, // Inst #14316 = VORPDZrmb |
| 32841 | { 14315, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ab70022819ULL }, // Inst #14315 = VORPDZrm |
| 32842 | { 14314, 4, 1, 0, 350, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7ab70022829ULL }, // Inst #14314 = VORPDZ256rrkz |
| 32843 | { 14313, 5, 1, 0, 350, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ab70022829ULL }, // Inst #14313 = VORPDZ256rrk |
| 32844 | { 14312, 3, 1, 0, 350, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ab70022829ULL }, // Inst #14312 = VORPDZ256rr |
| 32845 | { 14311, 8, 1, 0, 349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ab70022819ULL }, // Inst #14311 = VORPDZ256rmkz |
| 32846 | { 14310, 9, 1, 0, 349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ab70022819ULL }, // Inst #14310 = VORPDZ256rmk |
| 32847 | { 14309, 8, 1, 0, 349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97ab70022819ULL }, // Inst #14309 = VORPDZ256rmbkz |
| 32848 | { 14308, 9, 1, 0, 349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93ab70022819ULL }, // Inst #14308 = VORPDZ256rmbk |
| 32849 | { 14307, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91ab70022819ULL }, // Inst #14307 = VORPDZ256rmb |
| 32850 | { 14306, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ab70022819ULL }, // Inst #14306 = VORPDZ256rm |
| 32851 | { 14305, 4, 1, 0, 44, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6ab70022829ULL }, // Inst #14305 = VORPDZ128rrkz |
| 32852 | { 14304, 5, 1, 0, 44, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ab70022829ULL }, // Inst #14304 = VORPDZ128rrk |
| 32853 | { 14303, 3, 1, 0, 44, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ab70022829ULL }, // Inst #14303 = VORPDZ128rr |
| 32854 | { 14302, 8, 1, 0, 43, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ab70022819ULL }, // Inst #14302 = VORPDZ128rmkz |
| 32855 | { 14301, 9, 1, 0, 43, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ab70022819ULL }, // Inst #14301 = VORPDZ128rmk |
| 32856 | { 14300, 8, 1, 0, 43, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96ab70022819ULL }, // Inst #14300 = VORPDZ128rmbkz |
| 32857 | { 14299, 9, 1, 0, 43, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92ab70022819ULL }, // Inst #14299 = VORPDZ128rmbk |
| 32858 | { 14298, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90ab70022819ULL }, // Inst #14298 = VORPDZ128rmb |
| 32859 | { 14297, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ab70022819ULL }, // Inst #14297 = VORPDZ128rm |
| 32860 | { 14296, 3, 1, 0, 350, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1ab30002829ULL }, // Inst #14296 = VORPDYrr |
| 32861 | { 14295, 7, 1, 0, 349, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ab30002819ULL }, // Inst #14295 = VORPDYrm |
| 32862 | { 14294, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380003026ULL }, // Inst #14294 = VMXON |
| 32863 | { 14293, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002044ULL }, // Inst #14293 = VMXOFF |
| 32864 | { 14292, 2, 1, 0, 8, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80002029ULL }, // Inst #14292 = VMWRITE64rr |
| 32865 | { 14291, 6, 1, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80002019ULL }, // Inst #14291 = VMWRITE64rm |
| 32866 | { 14290, 2, 1, 0, 8, 0, 0, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80002029ULL }, // Inst #14290 = VMWRITE32rr |
| 32867 | { 14289, 6, 1, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80002019ULL }, // Inst #14289 = VMWRITE32rm |
| 32868 | { 14288, 3, 1, 0, 239, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaca8003029ULL }, // Inst #14288 = VMULSSrr_Int |
| 32869 | { 14287, 3, 1, 0, 239, 1, 0, 2046, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaca8003029ULL }, // Inst #14287 = VMULSSrr |
| 32870 | { 14286, 7, 1, 0, 238, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaca8003019ULL }, // Inst #14286 = VMULSSrm_Int |
| 32871 | { 14285, 7, 1, 0, 238, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaca8003019ULL }, // Inst #14285 = VMULSSrm |
| 32872 | { 14284, 4, 1, 0, 239, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66ace8003029ULL }, // Inst #14284 = VMULSSZrrkz_Int |
| 32873 | { 14283, 5, 1, 0, 239, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62ace8003029ULL }, // Inst #14283 = VMULSSZrrk_Int |
| 32874 | { 14282, 5, 1, 0, 239, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x176ace8003029ULL }, // Inst #14282 = VMULSSZrrbkz_Int |
| 32875 | { 14281, 6, 1, 0, 239, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x172ace8003029ULL }, // Inst #14281 = VMULSSZrrbk_Int |
| 32876 | { 14280, 4, 1, 0, 239, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x170ace8003029ULL }, // Inst #14280 = VMULSSZrrb_Int |
| 32877 | { 14279, 3, 1, 0, 239, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ace8003029ULL }, // Inst #14279 = VMULSSZrr_Int |
| 32878 | { 14278, 3, 1, 0, 239, 1, 0, 2036, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60ace8003029ULL }, // Inst #14278 = VMULSSZrr |
| 32879 | { 14277, 8, 1, 0, 238, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66ace8003019ULL }, // Inst #14277 = VMULSSZrmkz_Int |
| 32880 | { 14276, 9, 1, 0, 238, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62ace8003019ULL }, // Inst #14276 = VMULSSZrmk_Int |
| 32881 | { 14275, 7, 1, 0, 238, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ace8003019ULL }, // Inst #14275 = VMULSSZrm_Int |
| 32882 | { 14274, 7, 1, 0, 238, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ace8003019ULL }, // Inst #14274 = VMULSSZrm |
| 32883 | { 14273, 4, 1, 0, 1917, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x46ace8013029ULL }, // Inst #14273 = VMULSHZrrkz_Int |
| 32884 | { 14272, 5, 1, 0, 1917, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x42ace8013029ULL }, // Inst #14272 = VMULSHZrrk_Int |
| 32885 | { 14271, 5, 1, 0, 1917, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x156ace8013029ULL }, // Inst #14271 = VMULSHZrrbkz_Int |
| 32886 | { 14270, 6, 1, 0, 1917, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x152ace8013029ULL }, // Inst #14270 = VMULSHZrrbk_Int |
| 32887 | { 14269, 4, 1, 0, 1791, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x150ace8013029ULL }, // Inst #14269 = VMULSHZrrb_Int |
| 32888 | { 14268, 3, 1, 0, 1791, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ace8013029ULL }, // Inst #14268 = VMULSHZrr_Int |
| 32889 | { 14267, 3, 1, 0, 1791, 1, 0, 2026, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40ace8013029ULL }, // Inst #14267 = VMULSHZrr |
| 32890 | { 14266, 8, 1, 0, 1767, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46ace8013019ULL }, // Inst #14266 = VMULSHZrmkz_Int |
| 32891 | { 14265, 9, 1, 0, 1767, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42ace8013019ULL }, // Inst #14265 = VMULSHZrmk_Int |
| 32892 | { 14264, 7, 1, 0, 1767, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ace8013019ULL }, // Inst #14264 = VMULSHZrm_Int |
| 32893 | { 14263, 7, 1, 0, 1767, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ace8013019ULL }, // Inst #14263 = VMULSHZrm |
| 32894 | { 14262, 3, 1, 0, 237, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xacb0003829ULL }, // Inst #14262 = VMULSDrr_Int |
| 32895 | { 14261, 3, 1, 0, 237, 1, 0, 2016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xacb0003829ULL }, // Inst #14261 = VMULSDrr |
| 32896 | { 14260, 7, 1, 0, 236, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xacb0003819ULL }, // Inst #14260 = VMULSDrm_Int |
| 32897 | { 14259, 7, 1, 0, 236, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xacb0003819ULL }, // Inst #14259 = VMULSDrm |
| 32898 | { 14258, 4, 1, 0, 237, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86acf0023829ULL }, // Inst #14258 = VMULSDZrrkz_Int |
| 32899 | { 14257, 5, 1, 0, 237, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82acf0023829ULL }, // Inst #14257 = VMULSDZrrk_Int |
| 32900 | { 14256, 5, 1, 0, 237, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x196acf0023829ULL }, // Inst #14256 = VMULSDZrrbkz_Int |
| 32901 | { 14255, 6, 1, 0, 237, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x192acf0023829ULL }, // Inst #14255 = VMULSDZrrbk_Int |
| 32902 | { 14254, 4, 1, 0, 237, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x190acf0023829ULL }, // Inst #14254 = VMULSDZrrb_Int |
| 32903 | { 14253, 3, 1, 0, 237, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80acf0023829ULL }, // Inst #14253 = VMULSDZrr_Int |
| 32904 | { 14252, 3, 1, 0, 237, 1, 0, 1982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80acf0023829ULL }, // Inst #14252 = VMULSDZrr |
| 32905 | { 14251, 8, 1, 0, 236, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86acf0023819ULL }, // Inst #14251 = VMULSDZrmkz_Int |
| 32906 | { 14250, 9, 1, 0, 236, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82acf0023819ULL }, // Inst #14250 = VMULSDZrmk_Int |
| 32907 | { 14249, 7, 1, 0, 236, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80acf0023819ULL }, // Inst #14249 = VMULSDZrm_Int |
| 32908 | { 14248, 7, 1, 0, 236, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80acf0023819ULL }, // Inst #14248 = VMULSDZrm |
| 32909 | { 14247, 3, 1, 0, 235, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaca8002029ULL }, // Inst #14247 = VMULPSrr |
| 32910 | { 14246, 7, 1, 0, 234, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaca8002019ULL }, // Inst #14246 = VMULPSrm |
| 32911 | { 14245, 4, 1, 0, 487, 1, 0, 1963, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeace8002029ULL }, // Inst #14245 = VMULPSZrrkz |
| 32912 | { 14244, 5, 1, 0, 487, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaace8002029ULL }, // Inst #14244 = VMULPSZrrk |
| 32913 | { 14243, 5, 1, 0, 487, 1, 0, 1953, X86ImpOpBase + 78, 0, 0x17eace8002029ULL }, // Inst #14243 = VMULPSZrrbkz |
| 32914 | { 14242, 6, 1, 0, 487, 1, 0, 1947, X86ImpOpBase + 78, 0, 0x17aace8002029ULL }, // Inst #14242 = VMULPSZrrbk |
| 32915 | { 14241, 4, 1, 0, 487, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x178ace8002029ULL }, // Inst #14241 = VMULPSZrrb |
| 32916 | { 14240, 3, 1, 0, 487, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ace8002029ULL }, // Inst #14240 = VMULPSZrr |
| 32917 | { 14239, 8, 1, 0, 486, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeace8002019ULL }, // Inst #14239 = VMULPSZrmkz |
| 32918 | { 14238, 9, 1, 0, 486, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaace8002019ULL }, // Inst #14238 = VMULPSZrmk |
| 32919 | { 14237, 8, 1, 0, 486, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eace8002019ULL }, // Inst #14237 = VMULPSZrmbkz |
| 32920 | { 14236, 9, 1, 0, 486, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aace8002019ULL }, // Inst #14236 = VMULPSZrmbk |
| 32921 | { 14235, 7, 1, 0, 486, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78ace8002019ULL }, // Inst #14235 = VMULPSZrmb |
| 32922 | { 14234, 7, 1, 0, 486, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ace8002019ULL }, // Inst #14234 = VMULPSZrm |
| 32923 | { 14233, 4, 1, 0, 485, 1, 0, 1935, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ace8002029ULL }, // Inst #14233 = VMULPSZ256rrkz |
| 32924 | { 14232, 5, 1, 0, 485, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ace8002029ULL }, // Inst #14232 = VMULPSZ256rrk |
| 32925 | { 14231, 3, 1, 0, 485, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ace8002029ULL }, // Inst #14231 = VMULPSZ256rr |
| 32926 | { 14230, 8, 1, 0, 484, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ace8002019ULL }, // Inst #14230 = VMULPSZ256rmkz |
| 32927 | { 14229, 9, 1, 0, 484, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ace8002019ULL }, // Inst #14229 = VMULPSZ256rmk |
| 32928 | { 14228, 8, 1, 0, 484, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77ace8002019ULL }, // Inst #14228 = VMULPSZ256rmbkz |
| 32929 | { 14227, 9, 1, 0, 484, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73ace8002019ULL }, // Inst #14227 = VMULPSZ256rmbk |
| 32930 | { 14226, 7, 1, 0, 484, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71ace8002019ULL }, // Inst #14226 = VMULPSZ256rmb |
| 32931 | { 14225, 7, 1, 0, 484, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ace8002019ULL }, // Inst #14225 = VMULPSZ256rm |
| 32932 | { 14224, 4, 1, 0, 235, 1, 0, 1909, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ace8002029ULL }, // Inst #14224 = VMULPSZ128rrkz |
| 32933 | { 14223, 5, 1, 0, 235, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ace8002029ULL }, // Inst #14223 = VMULPSZ128rrk |
| 32934 | { 14222, 3, 1, 0, 235, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ace8002029ULL }, // Inst #14222 = VMULPSZ128rr |
| 32935 | { 14221, 8, 1, 0, 234, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ace8002019ULL }, // Inst #14221 = VMULPSZ128rmkz |
| 32936 | { 14220, 9, 1, 0, 234, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ace8002019ULL }, // Inst #14220 = VMULPSZ128rmk |
| 32937 | { 14219, 8, 1, 0, 234, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76ace8002019ULL }, // Inst #14219 = VMULPSZ128rmbkz |
| 32938 | { 14218, 9, 1, 0, 234, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72ace8002019ULL }, // Inst #14218 = VMULPSZ128rmbk |
| 32939 | { 14217, 7, 1, 0, 234, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70ace8002019ULL }, // Inst #14217 = VMULPSZ128rmb |
| 32940 | { 14216, 7, 1, 0, 234, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ace8002019ULL }, // Inst #14216 = VMULPSZ128rm |
| 32941 | { 14215, 3, 1, 0, 485, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1aca8002029ULL }, // Inst #14215 = VMULPSYrr |
| 32942 | { 14214, 7, 1, 0, 484, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aca8002019ULL }, // Inst #14214 = VMULPSYrm |
| 32943 | { 14213, 4, 1, 0, 1931, 1, 0, 1759, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeace8012029ULL }, // Inst #14213 = VMULPHZrrkz |
| 32944 | { 14212, 5, 1, 0, 1931, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaace8012029ULL }, // Inst #14212 = VMULPHZrrk |
| 32945 | { 14211, 5, 1, 0, 1931, 1, 0, 1882, X86ImpOpBase + 78, 0, 0x15eace8012029ULL }, // Inst #14211 = VMULPHZrrbkz |
| 32946 | { 14210, 6, 1, 0, 1931, 1, 0, 1876, X86ImpOpBase + 78, 0, 0x15aace8012029ULL }, // Inst #14210 = VMULPHZrrbk |
| 32947 | { 14209, 4, 1, 0, 1924, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x158ace8012029ULL }, // Inst #14209 = VMULPHZrrb |
| 32948 | { 14208, 3, 1, 0, 1924, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ace8012029ULL }, // Inst #14208 = VMULPHZrr |
| 32949 | { 14207, 8, 1, 0, 486, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeace8012019ULL }, // Inst #14207 = VMULPHZrmkz |
| 32950 | { 14206, 9, 1, 0, 486, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaace8012019ULL }, // Inst #14206 = VMULPHZrmk |
| 32951 | { 14205, 8, 1, 0, 486, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eace8012019ULL }, // Inst #14205 = VMULPHZrmbkz |
| 32952 | { 14204, 9, 1, 0, 486, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aace8012019ULL }, // Inst #14204 = VMULPHZrmbk |
| 32953 | { 14203, 7, 1, 0, 486, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58ace8012019ULL }, // Inst #14203 = VMULPHZrmb |
| 32954 | { 14202, 7, 1, 0, 486, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ace8012019ULL }, // Inst #14202 = VMULPHZrm |
| 32955 | { 14201, 4, 1, 0, 1915, 1, 0, 1723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ace8012029ULL }, // Inst #14201 = VMULPHZ256rrkz |
| 32956 | { 14200, 5, 1, 0, 1915, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ace8012029ULL }, // Inst #14200 = VMULPHZ256rrk |
| 32957 | { 14199, 3, 1, 0, 1790, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ace8012029ULL }, // Inst #14199 = VMULPHZ256rr |
| 32958 | { 14198, 8, 1, 0, 484, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ace8012019ULL }, // Inst #14198 = VMULPHZ256rmkz |
| 32959 | { 14197, 9, 1, 0, 484, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ace8012019ULL }, // Inst #14197 = VMULPHZ256rmk |
| 32960 | { 14196, 8, 1, 0, 484, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57ace8012019ULL }, // Inst #14196 = VMULPHZ256rmbkz |
| 32961 | { 14195, 9, 1, 0, 484, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53ace8012019ULL }, // Inst #14195 = VMULPHZ256rmbk |
| 32962 | { 14194, 7, 1, 0, 484, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51ace8012019ULL }, // Inst #14194 = VMULPHZ256rmb |
| 32963 | { 14193, 7, 1, 0, 484, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ace8012019ULL }, // Inst #14193 = VMULPHZ256rm |
| 32964 | { 14192, 4, 1, 0, 1914, 1, 0, 1687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ace8012029ULL }, // Inst #14192 = VMULPHZ128rrkz |
| 32965 | { 14191, 5, 1, 0, 1914, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ace8012029ULL }, // Inst #14191 = VMULPHZ128rrk |
| 32966 | { 14190, 3, 1, 0, 1789, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ace8012029ULL }, // Inst #14190 = VMULPHZ128rr |
| 32967 | { 14189, 8, 1, 0, 1761, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ace8012019ULL }, // Inst #14189 = VMULPHZ128rmkz |
| 32968 | { 14188, 9, 1, 0, 1761, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ace8012019ULL }, // Inst #14188 = VMULPHZ128rmk |
| 32969 | { 14187, 8, 1, 0, 1761, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56ace8012019ULL }, // Inst #14187 = VMULPHZ128rmbkz |
| 32970 | { 14186, 9, 1, 0, 1761, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52ace8012019ULL }, // Inst #14186 = VMULPHZ128rmbk |
| 32971 | { 14185, 7, 1, 0, 1761, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50ace8012019ULL }, // Inst #14185 = VMULPHZ128rmb |
| 32972 | { 14184, 7, 1, 0, 1761, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ace8012019ULL }, // Inst #14184 = VMULPHZ128rm |
| 32973 | { 14183, 3, 1, 0, 233, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xacb0002829ULL }, // Inst #14183 = VMULPDrr |
| 32974 | { 14182, 7, 1, 0, 232, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xacb0002819ULL }, // Inst #14182 = VMULPDrm |
| 32975 | { 14181, 4, 1, 0, 491, 1, 0, 1862, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeacf0022829ULL }, // Inst #14181 = VMULPDZrrkz |
| 32976 | { 14180, 5, 1, 0, 491, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaacf0022829ULL }, // Inst #14180 = VMULPDZrrk |
| 32977 | { 14179, 5, 1, 0, 491, 1, 0, 1852, X86ImpOpBase + 78, 0, 0x19eacf0022829ULL }, // Inst #14179 = VMULPDZrrbkz |
| 32978 | { 14178, 6, 1, 0, 491, 1, 0, 1846, X86ImpOpBase + 78, 0, 0x19aacf0022829ULL }, // Inst #14178 = VMULPDZrrbk |
| 32979 | { 14177, 4, 1, 0, 491, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x198acf0022829ULL }, // Inst #14177 = VMULPDZrrb |
| 32980 | { 14176, 3, 1, 0, 491, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8acf0022829ULL }, // Inst #14176 = VMULPDZrr |
| 32981 | { 14175, 8, 1, 0, 490, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeacf0022819ULL }, // Inst #14175 = VMULPDZrmkz |
| 32982 | { 14174, 9, 1, 0, 490, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaacf0022819ULL }, // Inst #14174 = VMULPDZrmk |
| 32983 | { 14173, 8, 1, 0, 490, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eacf0022819ULL }, // Inst #14173 = VMULPDZrmbkz |
| 32984 | { 14172, 9, 1, 0, 490, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aacf0022819ULL }, // Inst #14172 = VMULPDZrmbk |
| 32985 | { 14171, 7, 1, 0, 490, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98acf0022819ULL }, // Inst #14171 = VMULPDZrmb |
| 32986 | { 14170, 7, 1, 0, 490, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8acf0022819ULL }, // Inst #14170 = VMULPDZrm |
| 32987 | { 14169, 4, 1, 0, 489, 1, 0, 1821, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7acf0022829ULL }, // Inst #14169 = VMULPDZ256rrkz |
| 32988 | { 14168, 5, 1, 0, 489, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3acf0022829ULL }, // Inst #14168 = VMULPDZ256rrk |
| 32989 | { 14167, 3, 1, 0, 489, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1acf0022829ULL }, // Inst #14167 = VMULPDZ256rr |
| 32990 | { 14166, 8, 1, 0, 488, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7acf0022819ULL }, // Inst #14166 = VMULPDZ256rmkz |
| 32991 | { 14165, 9, 1, 0, 488, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3acf0022819ULL }, // Inst #14165 = VMULPDZ256rmk |
| 32992 | { 14164, 8, 1, 0, 488, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97acf0022819ULL }, // Inst #14164 = VMULPDZ256rmbkz |
| 32993 | { 14163, 9, 1, 0, 488, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93acf0022819ULL }, // Inst #14163 = VMULPDZ256rmbk |
| 32994 | { 14162, 7, 1, 0, 488, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91acf0022819ULL }, // Inst #14162 = VMULPDZ256rmb |
| 32995 | { 14161, 7, 1, 0, 488, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1acf0022819ULL }, // Inst #14161 = VMULPDZ256rm |
| 32996 | { 14160, 4, 1, 0, 233, 1, 0, 1795, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6acf0022829ULL }, // Inst #14160 = VMULPDZ128rrkz |
| 32997 | { 14159, 5, 1, 0, 233, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2acf0022829ULL }, // Inst #14159 = VMULPDZ128rrk |
| 32998 | { 14158, 3, 1, 0, 233, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0acf0022829ULL }, // Inst #14158 = VMULPDZ128rr |
| 32999 | { 14157, 8, 1, 0, 232, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6acf0022819ULL }, // Inst #14157 = VMULPDZ128rmkz |
| 33000 | { 14156, 9, 1, 0, 232, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2acf0022819ULL }, // Inst #14156 = VMULPDZ128rmk |
| 33001 | { 14155, 8, 1, 0, 232, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96acf0022819ULL }, // Inst #14155 = VMULPDZ128rmbkz |
| 33002 | { 14154, 9, 1, 0, 232, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92acf0022819ULL }, // Inst #14154 = VMULPDZ128rmbk |
| 33003 | { 14153, 7, 1, 0, 232, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90acf0022819ULL }, // Inst #14153 = VMULPDZ128rmb |
| 33004 | { 14152, 7, 1, 0, 232, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0acf0022819ULL }, // Inst #14152 = VMULPDZ128rm |
| 33005 | { 14151, 3, 1, 0, 489, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1acb0002829ULL }, // Inst #14151 = VMULPDYrr |
| 33006 | { 14150, 7, 1, 0, 488, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1acb0002819ULL }, // Inst #14150 = VMULPDYrm |
| 33007 | { 14149, 4, 1, 0, 487, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeace8012829ULL }, // Inst #14149 = VMULBF16Zrrkz |
| 33008 | { 14148, 5, 1, 0, 487, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaace8012829ULL }, // Inst #14148 = VMULBF16Zrrk |
| 33009 | { 14147, 3, 1, 0, 487, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ace8012829ULL }, // Inst #14147 = VMULBF16Zrr |
| 33010 | { 14146, 8, 1, 0, 486, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeace8012819ULL }, // Inst #14146 = VMULBF16Zrmkz |
| 33011 | { 14145, 9, 1, 0, 486, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaace8012819ULL }, // Inst #14145 = VMULBF16Zrmk |
| 33012 | { 14144, 8, 1, 0, 486, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5eace8012819ULL }, // Inst #14144 = VMULBF16Zrmbkz |
| 33013 | { 14143, 9, 1, 0, 486, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5aace8012819ULL }, // Inst #14143 = VMULBF16Zrmbk |
| 33014 | { 14142, 7, 1, 0, 486, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58ace8012819ULL }, // Inst #14142 = VMULBF16Zrmb |
| 33015 | { 14141, 7, 1, 0, 486, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ace8012819ULL }, // Inst #14141 = VMULBF16Zrm |
| 33016 | { 14140, 4, 1, 0, 485, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7ace8012829ULL }, // Inst #14140 = VMULBF16Z256rrkz |
| 33017 | { 14139, 5, 1, 0, 485, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ace8012829ULL }, // Inst #14139 = VMULBF16Z256rrk |
| 33018 | { 14138, 3, 1, 0, 485, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ace8012829ULL }, // Inst #14138 = VMULBF16Z256rr |
| 33019 | { 14137, 8, 1, 0, 484, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ace8012819ULL }, // Inst #14137 = VMULBF16Z256rmkz |
| 33020 | { 14136, 9, 1, 0, 484, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ace8012819ULL }, // Inst #14136 = VMULBF16Z256rmk |
| 33021 | { 14135, 8, 1, 0, 484, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x57ace8012819ULL }, // Inst #14135 = VMULBF16Z256rmbkz |
| 33022 | { 14134, 9, 1, 0, 484, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53ace8012819ULL }, // Inst #14134 = VMULBF16Z256rmbk |
| 33023 | { 14133, 7, 1, 0, 484, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51ace8012819ULL }, // Inst #14133 = VMULBF16Z256rmb |
| 33024 | { 14132, 7, 1, 0, 484, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ace8012819ULL }, // Inst #14132 = VMULBF16Z256rm |
| 33025 | { 14131, 4, 1, 0, 235, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6ace8012829ULL }, // Inst #14131 = VMULBF16Z128rrkz |
| 33026 | { 14130, 5, 1, 0, 235, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ace8012829ULL }, // Inst #14130 = VMULBF16Z128rrk |
| 33027 | { 14129, 3, 1, 0, 235, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ace8012829ULL }, // Inst #14129 = VMULBF16Z128rr |
| 33028 | { 14128, 8, 1, 0, 234, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ace8012819ULL }, // Inst #14128 = VMULBF16Z128rmkz |
| 33029 | { 14127, 9, 1, 0, 234, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ace8012819ULL }, // Inst #14127 = VMULBF16Z128rmk |
| 33030 | { 14126, 8, 1, 0, 234, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x56ace8012819ULL }, // Inst #14126 = VMULBF16Z128rmbkz |
| 33031 | { 14125, 9, 1, 0, 234, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52ace8012819ULL }, // Inst #14125 = VMULBF16Z128rmbk |
| 33032 | { 14124, 7, 1, 0, 234, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50ace8012819ULL }, // Inst #14124 = VMULBF16Z128rmb |
| 33033 | { 14123, 7, 1, 0, 234, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ace8012819ULL }, // Inst #14123 = VMULBF16Z128rm |
| 33034 | { 14122, 0, 0, 0, 8, 1, 0, 1, X86ImpOpBase + 123, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205bULL }, // Inst #14122 = VMSAVE64 |
| 33035 | { 14121, 0, 0, 0, 8, 1, 0, 1, X86ImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205bULL }, // Inst #14121 = VMSAVE32 |
| 33036 | { 14120, 0, 0, 0, 8, 1, 0, 1, X86ImpOpBase + 123, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002058ULL }, // Inst #14120 = VMRUN64 |
| 33037 | { 14119, 0, 0, 0, 8, 1, 0, 1, X86ImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002058ULL }, // Inst #14119 = VMRUN32 |
| 33038 | { 14118, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002043ULL }, // Inst #14118 = VMRESUME |
| 33039 | { 14117, 2, 1, 0, 8, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00002028ULL }, // Inst #14117 = VMREAD64rr |
| 33040 | { 14116, 6, 0, 0, 8, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00002018ULL }, // Inst #14116 = VMREAD64mr |
| 33041 | { 14115, 2, 1, 0, 8, 0, 0, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00002028ULL }, // Inst #14115 = VMREAD32rr |
| 33042 | { 14114, 6, 0, 0, 8, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00002018ULL }, // Inst #14114 = VMREAD32mr |
| 33043 | { 14113, 5, 0, 0, 833, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002027ULL }, // Inst #14113 = VMPTRSTm |
| 33044 | { 14112, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002026ULL }, // Inst #14112 = VMPTRLDm |
| 33045 | { 14111, 4, 1, 0, 231, 0, 0, 915, X86ImpOpBase + 0, 0, 0xa138046829ULL }, // Inst #14111 = VMPSADBWrri |
| 33046 | { 14110, 8, 1, 0, 230, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa138046819ULL }, // Inst #14110 = VMPSADBWrmi |
| 33047 | { 14109, 5, 1, 0, 422, 0, 0, 3564, X86ImpOpBase + 0, 0, 0xeea178047029ULL }, // Inst #14109 = VMPSADBWZrrikz |
| 33048 | { 14108, 6, 1, 0, 422, 0, 0, 3558, X86ImpOpBase + 0, 0, 0xeaa178047029ULL }, // Inst #14108 = VMPSADBWZrrik |
| 33049 | { 14107, 4, 1, 0, 422, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8a178047029ULL }, // Inst #14107 = VMPSADBWZrri |
| 33050 | { 14106, 9, 1, 0, 421, 0, 0, 3549, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea178047019ULL }, // Inst #14106 = VMPSADBWZrmikz |
| 33051 | { 14105, 10, 1, 0, 421, 0, 0, 3539, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa178047019ULL }, // Inst #14105 = VMPSADBWZrmik |
| 33052 | { 14104, 8, 1, 0, 421, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a178047019ULL }, // Inst #14104 = VMPSADBWZrmi |
| 33053 | { 14103, 5, 1, 0, 420, 0, 0, 3534, X86ImpOpBase + 0, 0, 0xc7a178047029ULL }, // Inst #14103 = VMPSADBWZ256rrikz |
| 33054 | { 14102, 6, 1, 0, 420, 0, 0, 3528, X86ImpOpBase + 0, 0, 0xc3a178047029ULL }, // Inst #14102 = VMPSADBWZ256rrik |
| 33055 | { 14101, 4, 1, 0, 420, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1a178047029ULL }, // Inst #14101 = VMPSADBWZ256rri |
| 33056 | { 14100, 9, 1, 0, 419, 0, 0, 3519, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a178047019ULL }, // Inst #14100 = VMPSADBWZ256rmikz |
| 33057 | { 14099, 10, 1, 0, 419, 0, 0, 3509, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a178047019ULL }, // Inst #14099 = VMPSADBWZ256rmik |
| 33058 | { 14098, 8, 1, 0, 419, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a178047019ULL }, // Inst #14098 = VMPSADBWZ256rmi |
| 33059 | { 14097, 5, 1, 0, 281, 0, 0, 3504, X86ImpOpBase + 0, 0, 0xa6a178047029ULL }, // Inst #14097 = VMPSADBWZ128rrikz |
| 33060 | { 14096, 6, 1, 0, 281, 0, 0, 3498, X86ImpOpBase + 0, 0, 0xa2a178047029ULL }, // Inst #14096 = VMPSADBWZ128rrik |
| 33061 | { 14095, 4, 1, 0, 281, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0a178047029ULL }, // Inst #14095 = VMPSADBWZ128rri |
| 33062 | { 14094, 9, 1, 0, 280, 0, 0, 3489, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a178047019ULL }, // Inst #14094 = VMPSADBWZ128rmikz |
| 33063 | { 14093, 10, 1, 0, 280, 0, 0, 3479, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a178047019ULL }, // Inst #14093 = VMPSADBWZ128rmik |
| 33064 | { 14092, 8, 1, 0, 280, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a178047019ULL }, // Inst #14092 = VMPSADBWZ128rmi |
| 33065 | { 14091, 4, 1, 0, 483, 0, 0, 923, X86ImpOpBase + 0, 0, 0x1a138046829ULL }, // Inst #14091 = VMPSADBWYrri |
| 33066 | { 14090, 8, 1, 0, 482, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a138046819ULL }, // Inst #14090 = VMPSADBWYrmi |
| 33067 | { 14089, 2, 1, 0, 197, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03f60013029ULL }, // Inst #14089 = VMOVZPWILo2PWIZrr2 |
| 33068 | { 14088, 2, 1, 0, 197, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03760013029ULL }, // Inst #14088 = VMOVZPWILo2PWIZrr |
| 33069 | { 14087, 6, 1, 0, 196, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x403760013019ULL }, // Inst #14087 = VMOVZPWILo2PWIZrm |
| 33070 | { 14086, 6, 0, 0, 194, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x403f60013018ULL }, // Inst #14086 = VMOVZPWILo2PWIZmr |
| 33071 | { 14085, 2, 1, 0, 183, 0, 0, 557, X86ImpOpBase + 0, 0, 0x3f38003029ULL }, // Inst #14085 = VMOVZPQILo2PQIrr |
| 33072 | { 14084, 2, 1, 0, 183, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03f78023029ULL }, // Inst #14084 = VMOVZPQILo2PQIZrr |
| 33073 | { 14083, 2, 1, 0, 197, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa06b70002829ULL }, // Inst #14083 = VMOVZPDILo2PDIZrr2 |
| 33074 | { 14082, 2, 1, 0, 197, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03f60003029ULL }, // Inst #14082 = VMOVZPDILo2PDIZrr |
| 33075 | { 14081, 6, 1, 0, 196, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x603f60003019ULL }, // Inst #14081 = VMOVZPDILo2PDIZrm |
| 33076 | { 14080, 6, 0, 0, 194, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x606b70002818ULL }, // Inst #14080 = VMOVZPDILo2PDIZmr |
| 33077 | { 14079, 6, 1, 0, 229, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x403760012819ULL }, // Inst #14079 = VMOVWrm |
| 33078 | { 14078, 6, 0, 0, 1821, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x403f60012818ULL }, // Inst #14078 = VMOVWmr |
| 33079 | { 14077, 2, 1, 0, 197, 0, 0, 4902, X86ImpOpBase + 0, 0, 0xa03760032829ULL }, // Inst #14077 = VMOVW64toSHrr |
| 33080 | { 14076, 2, 1, 0, 197, 0, 0, 4912, X86ImpOpBase + 0, 0, 0xa03760012829ULL }, // Inst #14076 = VMOVW2SHrr |
| 33081 | { 14075, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x8a8002028ULL }, // Inst #14075 = VMOVUPSrr_REV |
| 33082 | { 14074, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x828002029ULL }, // Inst #14074 = VMOVUPSrr |
| 33083 | { 14073, 6, 1, 0, 14, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x828002019ULL }, // Inst #14073 = VMOVUPSrm |
| 33084 | { 14072, 6, 0, 0, 13, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a8002018ULL }, // Inst #14072 = VMOVUPSmr |
| 33085 | { 14071, 3, 1, 0, 471, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee08e8002028ULL }, // Inst #14071 = VMOVUPSZrrkz_REV |
| 33086 | { 14070, 3, 1, 0, 471, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee0868002029ULL }, // Inst #14070 = VMOVUPSZrrkz |
| 33087 | { 14069, 3, 1, 0, 471, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xea08e8002028ULL }, // Inst #14069 = VMOVUPSZrrk_REV |
| 33088 | { 14068, 4, 1, 0, 471, 0, 0, 2839, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea0868002029ULL }, // Inst #14068 = VMOVUPSZrrk |
| 33089 | { 14067, 2, 1, 0, 1693, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe808e8002028ULL }, // Inst #14067 = VMOVUPSZrr_REV |
| 33090 | { 14066, 2, 1, 0, 1693, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe80868002029ULL }, // Inst #14066 = VMOVUPSZrr |
| 33091 | { 14065, 7, 1, 0, 1832, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0868002019ULL }, // Inst #14065 = VMOVUPSZrmkz |
| 33092 | { 14064, 8, 1, 0, 1832, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea0868002019ULL }, // Inst #14064 = VMOVUPSZrmk |
| 33093 | { 14063, 6, 1, 0, 1325, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe80868002019ULL }, // Inst #14063 = VMOVUPSZrm |
| 33094 | { 14062, 7, 0, 0, 15, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xea08e8002018ULL }, // Inst #14062 = VMOVUPSZmrk |
| 33095 | { 14061, 6, 0, 0, 15, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe808e8002018ULL }, // Inst #14061 = VMOVUPSZmr |
| 33096 | { 14060, 3, 1, 0, 1848, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc708e8002028ULL }, // Inst #14060 = VMOVUPSZ256rrkz_REV |
| 33097 | { 14059, 3, 1, 0, 1848, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc70868002029ULL }, // Inst #14059 = VMOVUPSZ256rrkz |
| 33098 | { 14058, 3, 1, 0, 1848, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc308e8002028ULL }, // Inst #14058 = VMOVUPSZ256rrk_REV |
| 33099 | { 14057, 4, 1, 0, 1848, 0, 0, 2825, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc30868002029ULL }, // Inst #14057 = VMOVUPSZ256rrk |
| 33100 | { 14056, 2, 1, 0, 470, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc108e8002028ULL }, // Inst #14056 = VMOVUPSZ256rr_REV |
| 33101 | { 14055, 2, 1, 0, 470, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc10868002029ULL }, // Inst #14055 = VMOVUPSZ256rr |
| 33102 | { 14054, 7, 1, 0, 1965, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70868002019ULL }, // Inst #14054 = VMOVUPSZ256rmkz |
| 33103 | { 14053, 8, 1, 0, 1965, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc30868002019ULL }, // Inst #14053 = VMOVUPSZ256rmk |
| 33104 | { 14052, 6, 1, 0, 1325, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc10868002019ULL }, // Inst #14052 = VMOVUPSZ256rm |
| 33105 | { 14051, 7, 0, 0, 15, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc308e8002018ULL }, // Inst #14051 = VMOVUPSZ256mrk |
| 33106 | { 14050, 6, 0, 0, 15, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc108e8002018ULL }, // Inst #14050 = VMOVUPSZ256mr |
| 33107 | { 14049, 3, 1, 0, 1847, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa608e8002028ULL }, // Inst #14049 = VMOVUPSZ128rrkz_REV |
| 33108 | { 14048, 3, 1, 0, 1847, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa60868002029ULL }, // Inst #14048 = VMOVUPSZ128rrkz |
| 33109 | { 14047, 3, 1, 0, 1847, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa208e8002028ULL }, // Inst #14047 = VMOVUPSZ128rrk_REV |
| 33110 | { 14046, 4, 1, 0, 1847, 0, 0, 2400, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa20868002029ULL }, // Inst #14046 = VMOVUPSZ128rrk |
| 33111 | { 14045, 2, 1, 0, 221, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa008e8002028ULL }, // Inst #14045 = VMOVUPSZ128rr_REV |
| 33112 | { 14044, 2, 1, 0, 221, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa00868002029ULL }, // Inst #14044 = VMOVUPSZ128rr |
| 33113 | { 14043, 7, 1, 0, 1865, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60868002019ULL }, // Inst #14043 = VMOVUPSZ128rmkz |
| 33114 | { 14042, 8, 1, 0, 1865, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa20868002019ULL }, // Inst #14042 = VMOVUPSZ128rmk |
| 33115 | { 14041, 6, 1, 0, 1302, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa00868002019ULL }, // Inst #14041 = VMOVUPSZ128rm |
| 33116 | { 14040, 7, 0, 0, 13, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa208e8002018ULL }, // Inst #14040 = VMOVUPSZ128mrk |
| 33117 | { 14039, 6, 0, 0, 13, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa008e8002018ULL }, // Inst #14039 = VMOVUPSZ128mr |
| 33118 | { 14038, 2, 1, 0, 470, 0, 0, 3116, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x108a8002028ULL }, // Inst #14038 = VMOVUPSYrr_REV |
| 33119 | { 14037, 2, 1, 0, 470, 0, 0, 3116, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x10828002029ULL }, // Inst #14037 = VMOVUPSYrr |
| 33120 | { 14036, 6, 1, 0, 16, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x10828002019ULL }, // Inst #14036 = VMOVUPSYrm |
| 33121 | { 14035, 6, 0, 0, 1174, 0, 0, 4906, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x108a8002018ULL }, // Inst #14035 = VMOVUPSYmr |
| 33122 | { 14034, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x8b0002828ULL }, // Inst #14034 = VMOVUPDrr_REV |
| 33123 | { 14033, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x830002829ULL }, // Inst #14033 = VMOVUPDrr |
| 33124 | { 14032, 6, 1, 0, 14, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x830002819ULL }, // Inst #14032 = VMOVUPDrm |
| 33125 | { 14031, 6, 0, 0, 13, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8b0002818ULL }, // Inst #14031 = VMOVUPDmr |
| 33126 | { 14030, 3, 1, 0, 471, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee08f0022828ULL }, // Inst #14030 = VMOVUPDZrrkz_REV |
| 33127 | { 14029, 3, 1, 0, 471, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee0870022829ULL }, // Inst #14029 = VMOVUPDZrrkz |
| 33128 | { 14028, 3, 1, 0, 471, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xea08f0022828ULL }, // Inst #14028 = VMOVUPDZrrk_REV |
| 33129 | { 14027, 4, 1, 0, 471, 0, 0, 2804, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea0870022829ULL }, // Inst #14027 = VMOVUPDZrrk |
| 33130 | { 14026, 2, 1, 0, 1693, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe808f0022828ULL }, // Inst #14026 = VMOVUPDZrr_REV |
| 33131 | { 14025, 2, 1, 0, 1693, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe80870022829ULL }, // Inst #14025 = VMOVUPDZrr |
| 33132 | { 14024, 7, 1, 0, 1832, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0870022819ULL }, // Inst #14024 = VMOVUPDZrmkz |
| 33133 | { 14023, 8, 1, 0, 1832, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea0870022819ULL }, // Inst #14023 = VMOVUPDZrmk |
| 33134 | { 14022, 6, 1, 0, 1325, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe80870022819ULL }, // Inst #14022 = VMOVUPDZrm |
| 33135 | { 14021, 7, 0, 0, 15, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xea08f0022818ULL }, // Inst #14021 = VMOVUPDZmrk |
| 33136 | { 14020, 6, 0, 0, 15, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe808f0022818ULL }, // Inst #14020 = VMOVUPDZmr |
| 33137 | { 14019, 3, 1, 0, 1848, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc708f0022828ULL }, // Inst #14019 = VMOVUPDZ256rrkz_REV |
| 33138 | { 14018, 3, 1, 0, 1848, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc70870022829ULL }, // Inst #14018 = VMOVUPDZ256rrkz |
| 33139 | { 14017, 3, 1, 0, 1848, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc308f0022828ULL }, // Inst #14017 = VMOVUPDZ256rrk_REV |
| 33140 | { 14016, 4, 1, 0, 1848, 0, 0, 2782, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc30870022829ULL }, // Inst #14016 = VMOVUPDZ256rrk |
| 33141 | { 14015, 2, 1, 0, 470, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc108f0022828ULL }, // Inst #14015 = VMOVUPDZ256rr_REV |
| 33142 | { 14014, 2, 1, 0, 470, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc10870022829ULL }, // Inst #14014 = VMOVUPDZ256rr |
| 33143 | { 14013, 7, 1, 0, 1965, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70870022819ULL }, // Inst #14013 = VMOVUPDZ256rmkz |
| 33144 | { 14012, 8, 1, 0, 1965, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc30870022819ULL }, // Inst #14012 = VMOVUPDZ256rmk |
| 33145 | { 14011, 6, 1, 0, 1325, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc10870022819ULL }, // Inst #14011 = VMOVUPDZ256rm |
| 33146 | { 14010, 7, 0, 0, 15, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc308f0022818ULL }, // Inst #14010 = VMOVUPDZ256mrk |
| 33147 | { 14009, 6, 0, 0, 15, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc108f0022818ULL }, // Inst #14009 = VMOVUPDZ256mr |
| 33148 | { 14008, 3, 1, 0, 1847, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa608f0022828ULL }, // Inst #14008 = VMOVUPDZ128rrkz_REV |
| 33149 | { 14007, 3, 1, 0, 1847, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa60870022829ULL }, // Inst #14007 = VMOVUPDZ128rrkz |
| 33150 | { 14006, 3, 1, 0, 1847, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa208f0022828ULL }, // Inst #14006 = VMOVUPDZ128rrk_REV |
| 33151 | { 14005, 4, 1, 0, 1847, 0, 0, 2766, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa20870022829ULL }, // Inst #14005 = VMOVUPDZ128rrk |
| 33152 | { 14004, 2, 1, 0, 221, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa008f0022828ULL }, // Inst #14004 = VMOVUPDZ128rr_REV |
| 33153 | { 14003, 2, 1, 0, 221, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa00870022829ULL }, // Inst #14003 = VMOVUPDZ128rr |
| 33154 | { 14002, 7, 1, 0, 1865, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60870022819ULL }, // Inst #14002 = VMOVUPDZ128rmkz |
| 33155 | { 14001, 8, 1, 0, 1865, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa20870022819ULL }, // Inst #14001 = VMOVUPDZ128rmk |
| 33156 | { 14000, 6, 1, 0, 1302, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa00870022819ULL }, // Inst #14000 = VMOVUPDZ128rm |
| 33157 | { 13999, 7, 0, 0, 13, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa208f0022818ULL }, // Inst #13999 = VMOVUPDZ128mrk |
| 33158 | { 13998, 6, 0, 0, 13, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa008f0022818ULL }, // Inst #13998 = VMOVUPDZ128mr |
| 33159 | { 13997, 2, 1, 0, 470, 0, 0, 3116, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x108b0002828ULL }, // Inst #13997 = VMOVUPDYrr_REV |
| 33160 | { 13996, 2, 1, 0, 470, 0, 0, 3116, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x10830002829ULL }, // Inst #13996 = VMOVUPDYrr |
| 33161 | { 13995, 6, 1, 0, 16, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x10830002819ULL }, // Inst #13995 = VMOVUPDYrm |
| 33162 | { 13994, 6, 0, 0, 1174, 0, 0, 4906, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x108b0002818ULL }, // Inst #13994 = VMOVUPDYmr |
| 33163 | { 13993, 3, 1, 0, 1576, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x88a0003028ULL }, // Inst #13993 = VMOVSSrr_REV |
| 33164 | { 13992, 3, 1, 0, 1576, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x8828003029ULL }, // Inst #13992 = VMOVSSrr |
| 33165 | { 13991, 6, 1, 0, 772, 0, 0, 1002, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x828003019ULL }, // Inst #13991 = VMOVSSrm_alt |
| 33166 | { 13990, 6, 1, 0, 772, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x828003019ULL }, // Inst #13990 = VMOVSSrm |
| 33167 | { 13989, 6, 0, 0, 223, 0, 0, 1410, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a8003018ULL }, // Inst #13989 = VMOVSSmr |
| 33168 | { 13988, 4, 1, 0, 1421, 0, 0, 2005, X86ImpOpBase + 0, 0, 0xa688e0003028ULL }, // Inst #13988 = VMOVSSZrrkz_REV |
| 33169 | { 13987, 4, 1, 0, 1421, 0, 0, 2005, X86ImpOpBase + 0, 0, 0x668868003029ULL }, // Inst #13987 = VMOVSSZrrkz |
| 33170 | { 13986, 5, 1, 0, 1421, 0, 0, 2000, X86ImpOpBase + 0, 0, 0xa288e0003028ULL }, // Inst #13986 = VMOVSSZrrk_REV |
| 33171 | { 13985, 5, 1, 0, 1421, 0, 0, 2000, X86ImpOpBase + 0, 0, 0x628868003029ULL }, // Inst #13985 = VMOVSSZrrk |
| 33172 | { 13984, 3, 1, 0, 1421, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa088e0003028ULL }, // Inst #13984 = VMOVSSZrr_REV |
| 33173 | { 13983, 3, 1, 0, 1421, 0, 0, 1679, X86ImpOpBase + 0, 0, 0x608868003029ULL }, // Inst #13983 = VMOVSSZrr |
| 33174 | { 13982, 7, 1, 0, 1867, 0, 0, 5017, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x660868003019ULL }, // Inst #13982 = VMOVSSZrmkz |
| 33175 | { 13981, 8, 1, 0, 1867, 0, 0, 5009, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x620868003019ULL }, // Inst #13981 = VMOVSSZrmk |
| 33176 | { 13980, 6, 1, 0, 1288, 0, 0, 2751, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x600868003019ULL }, // Inst #13980 = VMOVSSZrm_alt |
| 33177 | { 13979, 6, 1, 0, 1288, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x600868003019ULL }, // Inst #13979 = VMOVSSZrm |
| 33178 | { 13978, 7, 0, 0, 223, 0, 0, 5002, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6208e8003018ULL }, // Inst #13978 = VMOVSSZmrk |
| 33179 | { 13977, 6, 0, 0, 223, 0, 0, 5030, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6008e8003018ULL }, // Inst #13977 = VMOVSSZmr |
| 33180 | { 13976, 2, 1, 0, 195, 0, 0, 1047, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x3f38002828ULL }, // Inst #13976 = VMOVSS2DIrr |
| 33181 | { 13975, 2, 1, 0, 195, 0, 0, 3473, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0xa03f78002828ULL }, // Inst #13975 = VMOVSS2DIZrr |
| 33182 | { 13974, 2, 1, 0, 1482, 0, 0, 557, X86ImpOpBase + 0, 0, 0x928003029ULL }, // Inst #13974 = VMOVSLDUPrr |
| 33183 | { 13973, 6, 1, 0, 771, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x928003019ULL }, // Inst #13973 = VMOVSLDUPrm |
| 33184 | { 13972, 3, 1, 0, 475, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee0968003029ULL }, // Inst #13972 = VMOVSLDUPZrrkz |
| 33185 | { 13971, 4, 1, 0, 475, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea0968003029ULL }, // Inst #13971 = VMOVSLDUPZrrk |
| 33186 | { 13970, 2, 1, 0, 475, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe80968003029ULL }, // Inst #13970 = VMOVSLDUPZrr |
| 33187 | { 13969, 7, 1, 0, 1327, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0968003019ULL }, // Inst #13969 = VMOVSLDUPZrmkz |
| 33188 | { 13968, 8, 1, 0, 1327, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0968003019ULL }, // Inst #13968 = VMOVSLDUPZrmk |
| 33189 | { 13967, 6, 1, 0, 1825, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80968003019ULL }, // Inst #13967 = VMOVSLDUPZrm |
| 33190 | { 13966, 3, 1, 0, 1737, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc70968003029ULL }, // Inst #13966 = VMOVSLDUPZ256rrkz |
| 33191 | { 13965, 4, 1, 0, 1737, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc30968003029ULL }, // Inst #13965 = VMOVSLDUPZ256rrk |
| 33192 | { 13964, 2, 1, 0, 1737, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc10968003029ULL }, // Inst #13964 = VMOVSLDUPZ256rr |
| 33193 | { 13963, 7, 1, 0, 1326, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70968003019ULL }, // Inst #13963 = VMOVSLDUPZ256rmkz |
| 33194 | { 13962, 8, 1, 0, 1326, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30968003019ULL }, // Inst #13962 = VMOVSLDUPZ256rmk |
| 33195 | { 13961, 6, 1, 0, 1826, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10968003019ULL }, // Inst #13961 = VMOVSLDUPZ256rm |
| 33196 | { 13960, 3, 1, 0, 1736, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa60968003029ULL }, // Inst #13960 = VMOVSLDUPZ128rrkz |
| 33197 | { 13959, 4, 1, 0, 1736, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa20968003029ULL }, // Inst #13959 = VMOVSLDUPZ128rrk |
| 33198 | { 13958, 2, 1, 0, 1736, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa00968003029ULL }, // Inst #13958 = VMOVSLDUPZ128rr |
| 33199 | { 13957, 7, 1, 0, 1303, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60968003019ULL }, // Inst #13957 = VMOVSLDUPZ128rmkz |
| 33200 | { 13956, 8, 1, 0, 1303, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa20968003019ULL }, // Inst #13956 = VMOVSLDUPZ128rmk |
| 33201 | { 13955, 6, 1, 0, 1794, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa00968003019ULL }, // Inst #13955 = VMOVSLDUPZ128rm |
| 33202 | { 13954, 2, 1, 0, 1483, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x10928003029ULL }, // Inst #13954 = VMOVSLDUPYrr |
| 33203 | { 13953, 6, 1, 0, 778, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10928003019ULL }, // Inst #13953 = VMOVSLDUPYrm |
| 33204 | { 13952, 2, 1, 0, 195, 0, 0, 3388, X86ImpOpBase + 0, 0, 0xa03f60032828ULL }, // Inst #13952 = VMOVSHtoW64rr |
| 33205 | { 13951, 4, 1, 0, 2263, 0, 0, 2005, X86ImpOpBase + 0, 0, 0xa688e0013028ULL }, // Inst #13951 = VMOVSHZrrkz_REV |
| 33206 | { 13950, 4, 1, 0, 2263, 0, 0, 2005, X86ImpOpBase + 0, 0, 0x468868013029ULL }, // Inst #13950 = VMOVSHZrrkz |
| 33207 | { 13949, 5, 1, 0, 2263, 0, 0, 2000, X86ImpOpBase + 0, 0, 0xa288e0013028ULL }, // Inst #13949 = VMOVSHZrrk_REV |
| 33208 | { 13948, 5, 1, 0, 2263, 0, 0, 2000, X86ImpOpBase + 0, 0, 0x428868013029ULL }, // Inst #13948 = VMOVSHZrrk |
| 33209 | { 13947, 3, 1, 0, 1850, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa088e0013028ULL }, // Inst #13947 = VMOVSHZrr_REV |
| 33210 | { 13946, 3, 1, 0, 1850, 0, 0, 1679, X86ImpOpBase + 0, 0, 0x408868013029ULL }, // Inst #13946 = VMOVSHZrr |
| 33211 | { 13945, 7, 1, 0, 2258, 0, 0, 5017, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x460868013019ULL }, // Inst #13945 = VMOVSHZrmkz |
| 33212 | { 13944, 8, 1, 0, 2258, 0, 0, 5009, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x420868013019ULL }, // Inst #13944 = VMOVSHZrmk |
| 33213 | { 13943, 6, 1, 0, 229, 0, 0, 2735, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400868013019ULL }, // Inst #13943 = VMOVSHZrm_alt |
| 33214 | { 13942, 6, 1, 0, 229, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400868013019ULL }, // Inst #13942 = VMOVSHZrm |
| 33215 | { 13941, 7, 0, 0, 223, 0, 0, 5002, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4208e8013018ULL }, // Inst #13941 = VMOVSHZmrk |
| 33216 | { 13940, 6, 0, 0, 1821, 0, 0, 5024, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4008e8013018ULL }, // Inst #13940 = VMOVSHZmr |
| 33217 | { 13939, 2, 1, 0, 1482, 0, 0, 557, X86ImpOpBase + 0, 0, 0xb28003029ULL }, // Inst #13939 = VMOVSHDUPrr |
| 33218 | { 13938, 6, 1, 0, 771, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb28003019ULL }, // Inst #13938 = VMOVSHDUPrm |
| 33219 | { 13937, 3, 1, 0, 475, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee0b68003029ULL }, // Inst #13937 = VMOVSHDUPZrrkz |
| 33220 | { 13936, 4, 1, 0, 475, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea0b68003029ULL }, // Inst #13936 = VMOVSHDUPZrrk |
| 33221 | { 13935, 2, 1, 0, 475, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe80b68003029ULL }, // Inst #13935 = VMOVSHDUPZrr |
| 33222 | { 13934, 7, 1, 0, 1327, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0b68003019ULL }, // Inst #13934 = VMOVSHDUPZrmkz |
| 33223 | { 13933, 8, 1, 0, 1327, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0b68003019ULL }, // Inst #13933 = VMOVSHDUPZrmk |
| 33224 | { 13932, 6, 1, 0, 1825, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80b68003019ULL }, // Inst #13932 = VMOVSHDUPZrm |
| 33225 | { 13931, 3, 1, 0, 1737, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc70b68003029ULL }, // Inst #13931 = VMOVSHDUPZ256rrkz |
| 33226 | { 13930, 4, 1, 0, 1737, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc30b68003029ULL }, // Inst #13930 = VMOVSHDUPZ256rrk |
| 33227 | { 13929, 2, 1, 0, 1737, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc10b68003029ULL }, // Inst #13929 = VMOVSHDUPZ256rr |
| 33228 | { 13928, 7, 1, 0, 1326, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70b68003019ULL }, // Inst #13928 = VMOVSHDUPZ256rmkz |
| 33229 | { 13927, 8, 1, 0, 1326, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30b68003019ULL }, // Inst #13927 = VMOVSHDUPZ256rmk |
| 33230 | { 13926, 6, 1, 0, 1826, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10b68003019ULL }, // Inst #13926 = VMOVSHDUPZ256rm |
| 33231 | { 13925, 3, 1, 0, 1736, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa60b68003029ULL }, // Inst #13925 = VMOVSHDUPZ128rrkz |
| 33232 | { 13924, 4, 1, 0, 1736, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa20b68003029ULL }, // Inst #13924 = VMOVSHDUPZ128rrk |
| 33233 | { 13923, 2, 1, 0, 1736, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa00b68003029ULL }, // Inst #13923 = VMOVSHDUPZ128rr |
| 33234 | { 13922, 7, 1, 0, 1303, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60b68003019ULL }, // Inst #13922 = VMOVSHDUPZ128rmkz |
| 33235 | { 13921, 8, 1, 0, 1303, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa20b68003019ULL }, // Inst #13921 = VMOVSHDUPZ128rmk |
| 33236 | { 13920, 6, 1, 0, 1794, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa00b68003019ULL }, // Inst #13920 = VMOVSHDUPZ128rm |
| 33237 | { 13919, 2, 1, 0, 1483, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x10b28003029ULL }, // Inst #13919 = VMOVSHDUPYrr |
| 33238 | { 13918, 6, 1, 0, 778, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10b28003019ULL }, // Inst #13918 = VMOVSHDUPYrm |
| 33239 | { 13917, 2, 1, 0, 195, 0, 0, 3395, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa03f60012828ULL }, // Inst #13917 = VMOVSH2Wrr |
| 33240 | { 13916, 2, 1, 0, 195, 0, 0, 1019, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x3f38022828ULL }, // Inst #13916 = VMOVSDto64rr |
| 33241 | { 13915, 2, 1, 0, 1679, 0, 0, 3386, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0xa03f78022828ULL }, // Inst #13915 = VMOVSDto64Zrr |
| 33242 | { 13914, 3, 1, 0, 1576, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x88a0003828ULL }, // Inst #13914 = VMOVSDrr_REV |
| 33243 | { 13913, 3, 1, 0, 1576, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x8830003829ULL }, // Inst #13913 = VMOVSDrr |
| 33244 | { 13912, 6, 1, 0, 772, 0, 0, 994, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x830003819ULL }, // Inst #13912 = VMOVSDrm_alt |
| 33245 | { 13911, 6, 1, 0, 772, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x830003819ULL }, // Inst #13911 = VMOVSDrm |
| 33246 | { 13910, 6, 0, 0, 223, 0, 0, 1404, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8b0003818ULL }, // Inst #13910 = VMOVSDmr |
| 33247 | { 13909, 4, 1, 0, 1421, 0, 0, 2005, X86ImpOpBase + 0, 0, 0xa688e0023828ULL }, // Inst #13909 = VMOVSDZrrkz_REV |
| 33248 | { 13908, 4, 1, 0, 1421, 0, 0, 2005, X86ImpOpBase + 0, 0, 0x868870023829ULL }, // Inst #13908 = VMOVSDZrrkz |
| 33249 | { 13907, 5, 1, 0, 1421, 0, 0, 2000, X86ImpOpBase + 0, 0, 0xa288e0023828ULL }, // Inst #13907 = VMOVSDZrrk_REV |
| 33250 | { 13906, 5, 1, 0, 1421, 0, 0, 2000, X86ImpOpBase + 0, 0, 0x828870023829ULL }, // Inst #13906 = VMOVSDZrrk |
| 33251 | { 13905, 3, 1, 0, 1421, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa088e0023828ULL }, // Inst #13905 = VMOVSDZrr_REV |
| 33252 | { 13904, 3, 1, 0, 1421, 0, 0, 1679, X86ImpOpBase + 0, 0, 0x808870023829ULL }, // Inst #13904 = VMOVSDZrr |
| 33253 | { 13903, 7, 1, 0, 1867, 0, 0, 5017, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x860870023819ULL }, // Inst #13903 = VMOVSDZrmkz |
| 33254 | { 13902, 8, 1, 0, 1867, 0, 0, 5009, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x820870023819ULL }, // Inst #13902 = VMOVSDZrmk |
| 33255 | { 13901, 6, 1, 0, 1288, 0, 0, 2743, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x800870023819ULL }, // Inst #13901 = VMOVSDZrm_alt |
| 33256 | { 13900, 6, 1, 0, 1288, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x800870023819ULL }, // Inst #13900 = VMOVSDZrm |
| 33257 | { 13899, 7, 0, 0, 223, 0, 0, 5002, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8208f0023818ULL }, // Inst #13899 = VMOVSDZmrk |
| 33258 | { 13898, 6, 0, 0, 223, 0, 0, 4996, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8008f0023818ULL }, // Inst #13898 = VMOVSDZmr |
| 33259 | { 13897, 7, 1, 0, 196, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee37f8033819ULL }, // Inst #13897 = VMOVRSWZmkz |
| 33260 | { 13896, 8, 1, 0, 196, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea37f8033819ULL }, // Inst #13896 = VMOVRSWZmk |
| 33261 | { 13895, 6, 1, 0, 196, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe837f8033819ULL }, // Inst #13895 = VMOVRSWZm |
| 33262 | { 13894, 7, 1, 0, 196, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc737f8033819ULL }, // Inst #13894 = VMOVRSWZ256mkz |
| 33263 | { 13893, 8, 1, 0, 196, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc337f8033819ULL }, // Inst #13893 = VMOVRSWZ256mk |
| 33264 | { 13892, 6, 1, 0, 196, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc137f8033819ULL }, // Inst #13892 = VMOVRSWZ256m |
| 33265 | { 13891, 7, 1, 0, 196, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa637f8033819ULL }, // Inst #13891 = VMOVRSWZ128mkz |
| 33266 | { 13890, 8, 1, 0, 196, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa237f8033819ULL }, // Inst #13890 = VMOVRSWZ128mk |
| 33267 | { 13889, 6, 1, 0, 196, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa037f8033819ULL }, // Inst #13889 = VMOVRSWZ128m |
| 33268 | { 13888, 7, 1, 0, 196, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee37f8033019ULL }, // Inst #13888 = VMOVRSQZmkz |
| 33269 | { 13887, 8, 1, 0, 196, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea37f8033019ULL }, // Inst #13887 = VMOVRSQZmk |
| 33270 | { 13886, 6, 1, 0, 196, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe837f8033019ULL }, // Inst #13886 = VMOVRSQZm |
| 33271 | { 13885, 7, 1, 0, 196, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc737f8033019ULL }, // Inst #13885 = VMOVRSQZ256mkz |
| 33272 | { 13884, 8, 1, 0, 196, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc337f8033019ULL }, // Inst #13884 = VMOVRSQZ256mk |
| 33273 | { 13883, 6, 1, 0, 196, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc137f8033019ULL }, // Inst #13883 = VMOVRSQZ256m |
| 33274 | { 13882, 7, 1, 0, 196, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa637f8033019ULL }, // Inst #13882 = VMOVRSQZ128mkz |
| 33275 | { 13881, 8, 1, 0, 196, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa237f8033019ULL }, // Inst #13881 = VMOVRSQZ128mk |
| 33276 | { 13880, 6, 1, 0, 196, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa037f8033019ULL }, // Inst #13880 = VMOVRSQZ128m |
| 33277 | { 13879, 7, 1, 0, 196, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee37f8013019ULL }, // Inst #13879 = VMOVRSDZmkz |
| 33278 | { 13878, 8, 1, 0, 196, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea37f8013019ULL }, // Inst #13878 = VMOVRSDZmk |
| 33279 | { 13877, 6, 1, 0, 196, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe837f8013019ULL }, // Inst #13877 = VMOVRSDZm |
| 33280 | { 13876, 7, 1, 0, 196, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc737f8013019ULL }, // Inst #13876 = VMOVRSDZ256mkz |
| 33281 | { 13875, 8, 1, 0, 196, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc337f8013019ULL }, // Inst #13875 = VMOVRSDZ256mk |
| 33282 | { 13874, 6, 1, 0, 196, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc137f8013019ULL }, // Inst #13874 = VMOVRSDZ256m |
| 33283 | { 13873, 7, 1, 0, 196, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa637f8013019ULL }, // Inst #13873 = VMOVRSDZ128mkz |
| 33284 | { 13872, 8, 1, 0, 196, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa237f8013019ULL }, // Inst #13872 = VMOVRSDZ128mk |
| 33285 | { 13871, 6, 1, 0, 196, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa037f8013019ULL }, // Inst #13871 = VMOVRSDZ128m |
| 33286 | { 13870, 7, 1, 0, 196, 0, 0, 4980, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee37f8013819ULL }, // Inst #13870 = VMOVRSBZmkz |
| 33287 | { 13869, 8, 1, 0, 196, 0, 0, 4972, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea37f8013819ULL }, // Inst #13869 = VMOVRSBZmk |
| 33288 | { 13868, 6, 1, 0, 196, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe837f8013819ULL }, // Inst #13868 = VMOVRSBZm |
| 33289 | { 13867, 7, 1, 0, 196, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc737f8013819ULL }, // Inst #13867 = VMOVRSBZ256mkz |
| 33290 | { 13866, 8, 1, 0, 196, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc337f8013819ULL }, // Inst #13866 = VMOVRSBZ256mk |
| 33291 | { 13865, 6, 1, 0, 196, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc137f8013819ULL }, // Inst #13865 = VMOVRSBZ256m |
| 33292 | { 13864, 7, 1, 0, 196, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa637f8013819ULL }, // Inst #13864 = VMOVRSBZ128mkz |
| 33293 | { 13863, 8, 1, 0, 196, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa237f8013819ULL }, // Inst #13863 = VMOVRSBZ128mk |
| 33294 | { 13862, 6, 1, 0, 196, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa037f8013819ULL }, // Inst #13862 = VMOVRSBZ128m |
| 33295 | { 13861, 6, 1, 0, 770, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3f38003019ULL }, // Inst #13861 = VMOVQI2PQIrm |
| 33296 | { 13860, 6, 1, 0, 1285, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x803f78023019ULL }, // Inst #13860 = VMOVQI2PQIZrm |
| 33297 | { 13859, 2, 1, 0, 195, 0, 0, 1021, X86ImpOpBase + 0, 0, 0x3f38022828ULL }, // Inst #13859 = VMOVPQIto64rr |
| 33298 | { 13858, 6, 0, 0, 194, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x3f38022818ULL }, // Inst #13858 = VMOVPQIto64mr |
| 33299 | { 13857, 2, 1, 0, 195, 0, 0, 3388, X86ImpOpBase + 0, 0, 0xa03f78022828ULL }, // Inst #13857 = VMOVPQIto64Zrr |
| 33300 | { 13856, 6, 0, 0, 194, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x803f78022818ULL }, // Inst #13856 = VMOVPQIto64Zmr |
| 33301 | { 13855, 2, 1, 0, 183, 0, 0, 557, X86ImpOpBase + 0, 0, 0x6b20002828ULL }, // Inst #13855 = VMOVPQI2QIrr |
| 33302 | { 13854, 6, 0, 0, 194, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6b38002818ULL }, // Inst #13854 = VMOVPQI2QImr |
| 33303 | { 13853, 2, 1, 0, 183, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa06b78022828ULL }, // Inst #13853 = VMOVPQI2QIZrr |
| 33304 | { 13852, 6, 0, 0, 194, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x806b78022818ULL }, // Inst #13852 = VMOVPQI2QIZmr |
| 33305 | { 13851, 2, 1, 0, 195, 0, 0, 1025, X86ImpOpBase + 0, 0, 0x3f38002828ULL }, // Inst #13851 = VMOVPDI2DIrr |
| 33306 | { 13850, 6, 0, 0, 194, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x3f38002818ULL }, // Inst #13850 = VMOVPDI2DImr |
| 33307 | { 13849, 2, 1, 0, 195, 0, 0, 3395, X86ImpOpBase + 0, 0, 0xa03f78002828ULL }, // Inst #13849 = VMOVPDI2DIZrr |
| 33308 | { 13848, 6, 0, 0, 194, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x603f78002818ULL }, // Inst #13848 = VMOVPDI2DIZmr |
| 33309 | { 13847, 6, 0, 0, 1644, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x15a8002018ULL }, // Inst #13847 = VMOVNTPSmr |
| 33310 | { 13846, 6, 0, 0, 2275, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe815e8002018ULL }, // Inst #13846 = VMOVNTPSZmr |
| 33311 | { 13845, 6, 0, 0, 2274, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc115e8002018ULL }, // Inst #13845 = VMOVNTPSZ256mr |
| 33312 | { 13844, 6, 0, 0, 2273, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa015e8002018ULL }, // Inst #13844 = VMOVNTPSZ128mr |
| 33313 | { 13843, 6, 0, 0, 1643, 0, 0, 4906, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x115a8002018ULL }, // Inst #13843 = VMOVNTPSYmr |
| 33314 | { 13842, 6, 0, 0, 1642, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x15b0002818ULL }, // Inst #13842 = VMOVNTPDmr |
| 33315 | { 13841, 6, 0, 0, 2272, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe815f0022818ULL }, // Inst #13841 = VMOVNTPDZmr |
| 33316 | { 13840, 6, 0, 0, 2271, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc115f0022818ULL }, // Inst #13840 = VMOVNTPDZ256mr |
| 33317 | { 13839, 6, 0, 0, 2270, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa015f0022818ULL }, // Inst #13839 = VMOVNTPDZ128mr |
| 33318 | { 13838, 6, 0, 0, 481, 0, 0, 4906, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x115b0002818ULL }, // Inst #13838 = VMOVNTPDYmr |
| 33319 | { 13837, 6, 0, 0, 1641, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x73b8002818ULL }, // Inst #13837 = VMOVNTDQmr |
| 33320 | { 13836, 6, 0, 0, 2269, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe873f8002818ULL }, // Inst #13836 = VMOVNTDQZmr |
| 33321 | { 13835, 6, 0, 0, 2268, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc173f8002818ULL }, // Inst #13835 = VMOVNTDQZ256mr |
| 33322 | { 13834, 6, 0, 0, 2267, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa073f8002818ULL }, // Inst #13834 = VMOVNTDQZ128mr |
| 33323 | { 13833, 6, 0, 0, 480, 0, 0, 4906, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x173b8002818ULL }, // Inst #13833 = VMOVNTDQYmr |
| 33324 | { 13832, 6, 1, 0, 225, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1538004819ULL }, // Inst #13832 = VMOVNTDQArm |
| 33325 | { 13831, 6, 1, 0, 479, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe81578004819ULL }, // Inst #13831 = VMOVNTDQAZrm |
| 33326 | { 13830, 6, 1, 0, 479, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc11578004819ULL }, // Inst #13830 = VMOVNTDQAZ256rm |
| 33327 | { 13829, 6, 1, 0, 225, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa01578004819ULL }, // Inst #13829 = VMOVNTDQAZ128rm |
| 33328 | { 13828, 6, 1, 0, 479, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x11538004819ULL }, // Inst #13828 = VMOVNTDQAYrm |
| 33329 | { 13827, 2, 1, 0, 224, 0, 0, 1025, X86ImpOpBase + 0, 0, 0x2828002029ULL }, // Inst #13827 = VMOVMSKPSrr |
| 33330 | { 13826, 2, 1, 0, 1640, 0, 0, 4994, X86ImpOpBase + 0, 0, 0x12828002029ULL }, // Inst #13826 = VMOVMSKPSYrr |
| 33331 | { 13825, 2, 1, 0, 224, 0, 0, 1025, X86ImpOpBase + 0, 0, 0x2830002829ULL }, // Inst #13825 = VMOVMSKPDrr |
| 33332 | { 13824, 2, 1, 0, 1640, 0, 0, 4994, X86ImpOpBase + 0, 0, 0x12830002829ULL }, // Inst #13824 = VMOVMSKPDYrr |
| 33333 | { 13823, 7, 1, 0, 1571, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8928002019ULL }, // Inst #13823 = VMOVLPSrm |
| 33334 | { 13822, 6, 0, 0, 223, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x9a8002018ULL }, // Inst #13822 = VMOVLPSmr |
| 33335 | { 13821, 7, 1, 0, 1846, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x808968002019ULL }, // Inst #13821 = VMOVLPSZ128rm |
| 33336 | { 13820, 6, 0, 0, 223, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8009e8002018ULL }, // Inst #13820 = VMOVLPSZ128mr |
| 33337 | { 13819, 7, 1, 0, 1571, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8930002819ULL }, // Inst #13819 = VMOVLPDrm |
| 33338 | { 13818, 6, 0, 0, 223, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x9b0002818ULL }, // Inst #13818 = VMOVLPDmr |
| 33339 | { 13817, 7, 1, 0, 1846, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x808970022819ULL }, // Inst #13817 = VMOVLPDZ128rm |
| 33340 | { 13816, 6, 0, 0, 223, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8009f0022818ULL }, // Inst #13816 = VMOVLPDZ128mr |
| 33341 | { 13815, 3, 1, 0, 1417, 0, 0, 1873, X86ImpOpBase + 0, 0, 0x8b28002029ULL }, // Inst #13815 = VMOVLHPSrr |
| 33342 | { 13814, 3, 1, 0, 1417, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08b68002029ULL }, // Inst #13814 = VMOVLHPSZrr |
| 33343 | { 13813, 7, 1, 0, 818, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8b28002019ULL }, // Inst #13813 = VMOVHPSrm |
| 33344 | { 13812, 6, 0, 0, 1029, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xba8002018ULL }, // Inst #13812 = VMOVHPSmr |
| 33345 | { 13811, 7, 1, 0, 181, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x808b68002019ULL }, // Inst #13811 = VMOVHPSZ128rm |
| 33346 | { 13810, 6, 0, 0, 223, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x800be8002018ULL }, // Inst #13810 = VMOVHPSZ128mr |
| 33347 | { 13809, 7, 1, 0, 818, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8b30002819ULL }, // Inst #13809 = VMOVHPDrm |
| 33348 | { 13808, 6, 0, 0, 1029, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xbb0002818ULL }, // Inst #13808 = VMOVHPDmr |
| 33349 | { 13807, 7, 1, 0, 181, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x808b70022819ULL }, // Inst #13807 = VMOVHPDZ128rm |
| 33350 | { 13806, 6, 0, 0, 223, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x800bf0022818ULL }, // Inst #13806 = VMOVHPDZ128mr |
| 33351 | { 13805, 3, 1, 0, 1417, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x8928002029ULL }, // Inst #13805 = VMOVHLPSrr |
| 33352 | { 13804, 3, 1, 0, 1417, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa08968002029ULL }, // Inst #13804 = VMOVHLPSZrr |
| 33353 | { 13803, 2, 1, 0, 198, 0, 0, 557, X86ImpOpBase + 0, 0, 0x3fb8003028ULL }, // Inst #13803 = VMOVDQUrr_REV |
| 33354 | { 13802, 2, 1, 0, 198, 0, 0, 557, X86ImpOpBase + 0, 0, 0x37b8003029ULL }, // Inst #13802 = VMOVDQUrr |
| 33355 | { 13801, 6, 1, 0, 186, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x37b8003019ULL }, // Inst #13801 = VMOVDQUrm |
| 33356 | { 13800, 6, 0, 0, 193, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x3fb8003018ULL }, // Inst #13800 = VMOVDQUmr |
| 33357 | { 13799, 2, 1, 0, 1694, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x13fb8003028ULL }, // Inst #13799 = VMOVDQUYrr_REV |
| 33358 | { 13798, 2, 1, 0, 1694, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x137b8003029ULL }, // Inst #13798 = VMOVDQUYrr |
| 33359 | { 13797, 6, 1, 0, 461, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x137b8003019ULL }, // Inst #13797 = VMOVDQUYrm |
| 33360 | { 13796, 6, 0, 0, 1184, 0, 0, 4906, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x13fb8003018ULL }, // Inst #13796 = VMOVDQUYmr |
| 33361 | { 13795, 3, 1, 0, 1900, 0, 0, 4991, X86ImpOpBase + 0, 0, 0xee3ff8003828ULL }, // Inst #13795 = VMOVDQU8Zrrkz_REV |
| 33362 | { 13794, 3, 1, 0, 1900, 0, 0, 4991, X86ImpOpBase + 0, 0, 0xee37f8003829ULL }, // Inst #13794 = VMOVDQU8Zrrkz |
| 33363 | { 13793, 3, 1, 0, 1900, 0, 0, 4991, X86ImpOpBase + 0, 0, 0xea3ff8003828ULL }, // Inst #13793 = VMOVDQU8Zrrk_REV |
| 33364 | { 13792, 4, 1, 0, 1900, 0, 0, 4987, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8003829ULL }, // Inst #13792 = VMOVDQU8Zrrk |
| 33365 | { 13791, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe83ff8003828ULL }, // Inst #13791 = VMOVDQU8Zrr_REV |
| 33366 | { 13790, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe837f8003829ULL }, // Inst #13790 = VMOVDQU8Zrr |
| 33367 | { 13789, 7, 1, 0, 1940, 0, 0, 4980, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee37f8003819ULL }, // Inst #13789 = VMOVDQU8Zrmkz |
| 33368 | { 13788, 8, 1, 0, 1940, 0, 0, 4972, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8003819ULL }, // Inst #13788 = VMOVDQU8Zrmk |
| 33369 | { 13787, 6, 1, 0, 1328, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8003819ULL }, // Inst #13787 = VMOVDQU8Zrm |
| 33370 | { 13786, 7, 0, 0, 2266, 0, 0, 4965, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xea3ff8003818ULL }, // Inst #13786 = VMOVDQU8Zmrk |
| 33371 | { 13785, 6, 0, 0, 1240, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe83ff8003818ULL }, // Inst #13785 = VMOVDQU8Zmr |
| 33372 | { 13784, 3, 1, 0, 2262, 0, 0, 4962, X86ImpOpBase + 0, 0, 0xc73ff8003828ULL }, // Inst #13784 = VMOVDQU8Z256rrkz_REV |
| 33373 | { 13783, 3, 1, 0, 2262, 0, 0, 4962, X86ImpOpBase + 0, 0, 0xc737f8003829ULL }, // Inst #13783 = VMOVDQU8Z256rrkz |
| 33374 | { 13782, 3, 1, 0, 2262, 0, 0, 4962, X86ImpOpBase + 0, 0, 0xc33ff8003828ULL }, // Inst #13782 = VMOVDQU8Z256rrk_REV |
| 33375 | { 13781, 4, 1, 0, 2262, 0, 0, 4958, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8003829ULL }, // Inst #13781 = VMOVDQU8Z256rrk |
| 33376 | { 13780, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc13ff8003828ULL }, // Inst #13780 = VMOVDQU8Z256rr_REV |
| 33377 | { 13779, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc137f8003829ULL }, // Inst #13779 = VMOVDQU8Z256rr |
| 33378 | { 13778, 7, 1, 0, 2257, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc737f8003819ULL }, // Inst #13778 = VMOVDQU8Z256rmkz |
| 33379 | { 13777, 8, 1, 0, 2257, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8003819ULL }, // Inst #13777 = VMOVDQU8Z256rmk |
| 33380 | { 13776, 6, 1, 0, 1328, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8003819ULL }, // Inst #13776 = VMOVDQU8Z256rm |
| 33381 | { 13775, 7, 0, 0, 476, 0, 0, 4951, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc33ff8003818ULL }, // Inst #13775 = VMOVDQU8Z256mrk |
| 33382 | { 13774, 6, 0, 0, 476, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc13ff8003818ULL }, // Inst #13774 = VMOVDQU8Z256mr |
| 33383 | { 13773, 3, 1, 0, 2261, 0, 0, 4948, X86ImpOpBase + 0, 0, 0xa63ff8003828ULL }, // Inst #13773 = VMOVDQU8Z128rrkz_REV |
| 33384 | { 13772, 3, 1, 0, 2261, 0, 0, 4948, X86ImpOpBase + 0, 0, 0xa637f8003829ULL }, // Inst #13772 = VMOVDQU8Z128rrkz |
| 33385 | { 13771, 3, 1, 0, 2261, 0, 0, 4948, X86ImpOpBase + 0, 0, 0xa23ff8003828ULL }, // Inst #13771 = VMOVDQU8Z128rrk_REV |
| 33386 | { 13770, 4, 1, 0, 2261, 0, 0, 4944, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8003829ULL }, // Inst #13770 = VMOVDQU8Z128rrk |
| 33387 | { 13769, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa03ff8003828ULL }, // Inst #13769 = VMOVDQU8Z128rr_REV |
| 33388 | { 13768, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa037f8003829ULL }, // Inst #13768 = VMOVDQU8Z128rr |
| 33389 | { 13767, 7, 1, 0, 2256, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa637f8003819ULL }, // Inst #13767 = VMOVDQU8Z128rmkz |
| 33390 | { 13766, 8, 1, 0, 2256, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8003819ULL }, // Inst #13766 = VMOVDQU8Z128rmk |
| 33391 | { 13765, 6, 1, 0, 1304, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8003819ULL }, // Inst #13765 = VMOVDQU8Z128rm |
| 33392 | { 13764, 7, 0, 0, 193, 0, 0, 4937, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa23ff8003818ULL }, // Inst #13764 = VMOVDQU8Z128mrk |
| 33393 | { 13763, 6, 0, 0, 193, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa03ff8003818ULL }, // Inst #13763 = VMOVDQU8Z128mr |
| 33394 | { 13762, 3, 1, 0, 478, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee3ff8023028ULL }, // Inst #13762 = VMOVDQU64Zrrkz_REV |
| 33395 | { 13761, 3, 1, 0, 478, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee37f8023029ULL }, // Inst #13761 = VMOVDQU64Zrrkz |
| 33396 | { 13760, 3, 1, 0, 478, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xea3ff8023028ULL }, // Inst #13760 = VMOVDQU64Zrrk_REV |
| 33397 | { 13759, 4, 1, 0, 478, 0, 0, 2804, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8023029ULL }, // Inst #13759 = VMOVDQU64Zrrk |
| 33398 | { 13758, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe83ff8023028ULL }, // Inst #13758 = VMOVDQU64Zrr_REV |
| 33399 | { 13757, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe837f8023029ULL }, // Inst #13757 = VMOVDQU64Zrr |
| 33400 | { 13756, 7, 1, 0, 1833, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee37f8023019ULL }, // Inst #13756 = VMOVDQU64Zrmkz |
| 33401 | { 13755, 8, 1, 0, 1833, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8023019ULL }, // Inst #13755 = VMOVDQU64Zrmk |
| 33402 | { 13754, 6, 1, 0, 1328, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8023019ULL }, // Inst #13754 = VMOVDQU64Zrm |
| 33403 | { 13753, 7, 0, 0, 476, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xea3ff8023018ULL }, // Inst #13753 = VMOVDQU64Zmrk |
| 33404 | { 13752, 6, 0, 0, 476, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe83ff8023018ULL }, // Inst #13752 = VMOVDQU64Zmr |
| 33405 | { 13751, 3, 1, 0, 477, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc73ff8023028ULL }, // Inst #13751 = VMOVDQU64Z256rrkz_REV |
| 33406 | { 13750, 3, 1, 0, 477, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc737f8023029ULL }, // Inst #13750 = VMOVDQU64Z256rrkz |
| 33407 | { 13749, 3, 1, 0, 477, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc33ff8023028ULL }, // Inst #13749 = VMOVDQU64Z256rrk_REV |
| 33408 | { 13748, 4, 1, 0, 477, 0, 0, 2782, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8023029ULL }, // Inst #13748 = VMOVDQU64Z256rrk |
| 33409 | { 13747, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc13ff8023028ULL }, // Inst #13747 = VMOVDQU64Z256rr_REV |
| 33410 | { 13746, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc137f8023029ULL }, // Inst #13746 = VMOVDQU64Z256rr |
| 33411 | { 13745, 7, 1, 0, 1966, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc737f8023019ULL }, // Inst #13745 = VMOVDQU64Z256rmkz |
| 33412 | { 13744, 8, 1, 0, 1966, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8023019ULL }, // Inst #13744 = VMOVDQU64Z256rmk |
| 33413 | { 13743, 6, 1, 0, 1328, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8023019ULL }, // Inst #13743 = VMOVDQU64Z256rm |
| 33414 | { 13742, 7, 0, 0, 476, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc33ff8023018ULL }, // Inst #13742 = VMOVDQU64Z256mrk |
| 33415 | { 13741, 6, 0, 0, 476, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc13ff8023018ULL }, // Inst #13741 = VMOVDQU64Z256mr |
| 33416 | { 13740, 3, 1, 0, 1849, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa63ff8023028ULL }, // Inst #13740 = VMOVDQU64Z128rrkz_REV |
| 33417 | { 13739, 3, 1, 0, 1849, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa637f8023029ULL }, // Inst #13739 = VMOVDQU64Z128rrkz |
| 33418 | { 13738, 3, 1, 0, 1849, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa23ff8023028ULL }, // Inst #13738 = VMOVDQU64Z128rrk_REV |
| 33419 | { 13737, 4, 1, 0, 1849, 0, 0, 2766, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8023029ULL }, // Inst #13737 = VMOVDQU64Z128rrk |
| 33420 | { 13736, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa03ff8023028ULL }, // Inst #13736 = VMOVDQU64Z128rr_REV |
| 33421 | { 13735, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa037f8023029ULL }, // Inst #13735 = VMOVDQU64Z128rr |
| 33422 | { 13734, 7, 1, 0, 1866, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa637f8023019ULL }, // Inst #13734 = VMOVDQU64Z128rmkz |
| 33423 | { 13733, 8, 1, 0, 1866, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8023019ULL }, // Inst #13733 = VMOVDQU64Z128rmk |
| 33424 | { 13732, 6, 1, 0, 1304, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8023019ULL }, // Inst #13732 = VMOVDQU64Z128rm |
| 33425 | { 13731, 7, 0, 0, 193, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa23ff8023018ULL }, // Inst #13731 = VMOVDQU64Z128mrk |
| 33426 | { 13730, 6, 0, 0, 193, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa03ff8023018ULL }, // Inst #13730 = VMOVDQU64Z128mr |
| 33427 | { 13729, 3, 1, 0, 478, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee3ff8003028ULL }, // Inst #13729 = VMOVDQU32Zrrkz_REV |
| 33428 | { 13728, 3, 1, 0, 478, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee37f8003029ULL }, // Inst #13728 = VMOVDQU32Zrrkz |
| 33429 | { 13727, 3, 1, 0, 478, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xea3ff8003028ULL }, // Inst #13727 = VMOVDQU32Zrrk_REV |
| 33430 | { 13726, 4, 1, 0, 478, 0, 0, 2839, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8003029ULL }, // Inst #13726 = VMOVDQU32Zrrk |
| 33431 | { 13725, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe83ff8003028ULL }, // Inst #13725 = VMOVDQU32Zrr_REV |
| 33432 | { 13724, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe837f8003029ULL }, // Inst #13724 = VMOVDQU32Zrr |
| 33433 | { 13723, 7, 1, 0, 1833, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee37f8003019ULL }, // Inst #13723 = VMOVDQU32Zrmkz |
| 33434 | { 13722, 8, 1, 0, 1833, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8003019ULL }, // Inst #13722 = VMOVDQU32Zrmk |
| 33435 | { 13721, 6, 1, 0, 1328, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8003019ULL }, // Inst #13721 = VMOVDQU32Zrm |
| 33436 | { 13720, 7, 0, 0, 476, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xea3ff8003018ULL }, // Inst #13720 = VMOVDQU32Zmrk |
| 33437 | { 13719, 6, 0, 0, 476, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe83ff8003018ULL }, // Inst #13719 = VMOVDQU32Zmr |
| 33438 | { 13718, 3, 1, 0, 477, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc73ff8003028ULL }, // Inst #13718 = VMOVDQU32Z256rrkz_REV |
| 33439 | { 13717, 3, 1, 0, 477, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc737f8003029ULL }, // Inst #13717 = VMOVDQU32Z256rrkz |
| 33440 | { 13716, 3, 1, 0, 477, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc33ff8003028ULL }, // Inst #13716 = VMOVDQU32Z256rrk_REV |
| 33441 | { 13715, 4, 1, 0, 477, 0, 0, 2825, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8003029ULL }, // Inst #13715 = VMOVDQU32Z256rrk |
| 33442 | { 13714, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc13ff8003028ULL }, // Inst #13714 = VMOVDQU32Z256rr_REV |
| 33443 | { 13713, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc137f8003029ULL }, // Inst #13713 = VMOVDQU32Z256rr |
| 33444 | { 13712, 7, 1, 0, 1966, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc737f8003019ULL }, // Inst #13712 = VMOVDQU32Z256rmkz |
| 33445 | { 13711, 8, 1, 0, 1966, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8003019ULL }, // Inst #13711 = VMOVDQU32Z256rmk |
| 33446 | { 13710, 6, 1, 0, 1328, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8003019ULL }, // Inst #13710 = VMOVDQU32Z256rm |
| 33447 | { 13709, 7, 0, 0, 476, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc33ff8003018ULL }, // Inst #13709 = VMOVDQU32Z256mrk |
| 33448 | { 13708, 6, 0, 0, 476, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc13ff8003018ULL }, // Inst #13708 = VMOVDQU32Z256mr |
| 33449 | { 13707, 3, 1, 0, 1849, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa63ff8003028ULL }, // Inst #13707 = VMOVDQU32Z128rrkz_REV |
| 33450 | { 13706, 3, 1, 0, 1849, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa637f8003029ULL }, // Inst #13706 = VMOVDQU32Z128rrkz |
| 33451 | { 13705, 3, 1, 0, 1849, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa23ff8003028ULL }, // Inst #13705 = VMOVDQU32Z128rrk_REV |
| 33452 | { 13704, 4, 1, 0, 1849, 0, 0, 2400, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8003029ULL }, // Inst #13704 = VMOVDQU32Z128rrk |
| 33453 | { 13703, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa03ff8003028ULL }, // Inst #13703 = VMOVDQU32Z128rr_REV |
| 33454 | { 13702, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa037f8003029ULL }, // Inst #13702 = VMOVDQU32Z128rr |
| 33455 | { 13701, 7, 1, 0, 1866, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa637f8003019ULL }, // Inst #13701 = VMOVDQU32Z128rmkz |
| 33456 | { 13700, 8, 1, 0, 1866, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8003019ULL }, // Inst #13700 = VMOVDQU32Z128rmk |
| 33457 | { 13699, 6, 1, 0, 1304, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8003019ULL }, // Inst #13699 = VMOVDQU32Z128rm |
| 33458 | { 13698, 7, 0, 0, 193, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa23ff8003018ULL }, // Inst #13698 = VMOVDQU32Z128mrk |
| 33459 | { 13697, 6, 0, 0, 193, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa03ff8003018ULL }, // Inst #13697 = VMOVDQU32Z128mr |
| 33460 | { 13696, 3, 1, 0, 1900, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee3ff8023828ULL }, // Inst #13696 = VMOVDQU16Zrrkz_REV |
| 33461 | { 13695, 3, 1, 0, 1900, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee37f8023829ULL }, // Inst #13695 = VMOVDQU16Zrrkz |
| 33462 | { 13694, 3, 1, 0, 1900, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xea3ff8023828ULL }, // Inst #13694 = VMOVDQU16Zrrk_REV |
| 33463 | { 13693, 4, 1, 0, 1900, 0, 0, 2983, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8023829ULL }, // Inst #13693 = VMOVDQU16Zrrk |
| 33464 | { 13692, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe83ff8023828ULL }, // Inst #13692 = VMOVDQU16Zrr_REV |
| 33465 | { 13691, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe837f8023829ULL }, // Inst #13691 = VMOVDQU16Zrr |
| 33466 | { 13690, 7, 1, 0, 1940, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee37f8023819ULL }, // Inst #13690 = VMOVDQU16Zrmkz |
| 33467 | { 13689, 8, 1, 0, 1940, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8023819ULL }, // Inst #13689 = VMOVDQU16Zrmk |
| 33468 | { 13688, 6, 1, 0, 1328, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8023819ULL }, // Inst #13688 = VMOVDQU16Zrm |
| 33469 | { 13687, 7, 0, 0, 476, 0, 0, 4930, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xea3ff8023818ULL }, // Inst #13687 = VMOVDQU16Zmrk |
| 33470 | { 13686, 6, 0, 0, 476, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe83ff8023818ULL }, // Inst #13686 = VMOVDQU16Zmr |
| 33471 | { 13685, 3, 1, 0, 2262, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc73ff8023828ULL }, // Inst #13685 = VMOVDQU16Z256rrkz_REV |
| 33472 | { 13684, 3, 1, 0, 2262, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc737f8023829ULL }, // Inst #13684 = VMOVDQU16Z256rrkz |
| 33473 | { 13683, 3, 1, 0, 2262, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc33ff8023828ULL }, // Inst #13683 = VMOVDQU16Z256rrk_REV |
| 33474 | { 13682, 4, 1, 0, 2262, 0, 0, 2961, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8023829ULL }, // Inst #13682 = VMOVDQU16Z256rrk |
| 33475 | { 13681, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc13ff8023828ULL }, // Inst #13681 = VMOVDQU16Z256rr_REV |
| 33476 | { 13680, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc137f8023829ULL }, // Inst #13680 = VMOVDQU16Z256rr |
| 33477 | { 13679, 7, 1, 0, 2257, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc737f8023819ULL }, // Inst #13679 = VMOVDQU16Z256rmkz |
| 33478 | { 13678, 8, 1, 0, 2257, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8023819ULL }, // Inst #13678 = VMOVDQU16Z256rmk |
| 33479 | { 13677, 6, 1, 0, 1328, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8023819ULL }, // Inst #13677 = VMOVDQU16Z256rm |
| 33480 | { 13676, 7, 0, 0, 476, 0, 0, 4923, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc33ff8023818ULL }, // Inst #13676 = VMOVDQU16Z256mrk |
| 33481 | { 13675, 6, 0, 0, 476, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc13ff8023818ULL }, // Inst #13675 = VMOVDQU16Z256mr |
| 33482 | { 13674, 3, 1, 0, 2261, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa63ff8023828ULL }, // Inst #13674 = VMOVDQU16Z128rrkz_REV |
| 33483 | { 13673, 3, 1, 0, 2261, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa637f8023829ULL }, // Inst #13673 = VMOVDQU16Z128rrkz |
| 33484 | { 13672, 3, 1, 0, 2261, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa23ff8023828ULL }, // Inst #13672 = VMOVDQU16Z128rrk_REV |
| 33485 | { 13671, 4, 1, 0, 2261, 0, 0, 2939, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8023829ULL }, // Inst #13671 = VMOVDQU16Z128rrk |
| 33486 | { 13670, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa03ff8023828ULL }, // Inst #13670 = VMOVDQU16Z128rr_REV |
| 33487 | { 13669, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa037f8023829ULL }, // Inst #13669 = VMOVDQU16Z128rr |
| 33488 | { 13668, 7, 1, 0, 2256, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa637f8023819ULL }, // Inst #13668 = VMOVDQU16Z128rmkz |
| 33489 | { 13667, 8, 1, 0, 2256, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8023819ULL }, // Inst #13667 = VMOVDQU16Z128rmk |
| 33490 | { 13666, 6, 1, 0, 1304, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8023819ULL }, // Inst #13666 = VMOVDQU16Z128rm |
| 33491 | { 13665, 7, 0, 0, 193, 0, 0, 4916, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa23ff8023818ULL }, // Inst #13665 = VMOVDQU16Z128mrk |
| 33492 | { 13664, 6, 0, 0, 193, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa03ff8023818ULL }, // Inst #13664 = VMOVDQU16Z128mr |
| 33493 | { 13663, 2, 1, 0, 198, 0, 0, 557, X86ImpOpBase + 0, 0, 0x3fb8002828ULL }, // Inst #13663 = VMOVDQArr_REV |
| 33494 | { 13662, 2, 1, 0, 198, 0, 0, 557, X86ImpOpBase + 0, 0, 0x37b8002829ULL }, // Inst #13662 = VMOVDQArr |
| 33495 | { 13661, 6, 1, 0, 186, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x37b8002819ULL }, // Inst #13661 = VMOVDQArm |
| 33496 | { 13660, 6, 0, 0, 193, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x3fb8002818ULL }, // Inst #13660 = VMOVDQAmr |
| 33497 | { 13659, 2, 1, 0, 1694, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x13fb8002828ULL }, // Inst #13659 = VMOVDQAYrr_REV |
| 33498 | { 13658, 2, 1, 0, 1694, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x137b8002829ULL }, // Inst #13658 = VMOVDQAYrr |
| 33499 | { 13657, 6, 1, 0, 461, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x137b8002819ULL }, // Inst #13657 = VMOVDQAYrm |
| 33500 | { 13656, 6, 0, 0, 476, 0, 0, 4906, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x13fb8002818ULL }, // Inst #13656 = VMOVDQAYmr |
| 33501 | { 13655, 3, 1, 0, 478, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee3ff8022828ULL }, // Inst #13655 = VMOVDQA64Zrrkz_REV |
| 33502 | { 13654, 3, 1, 0, 478, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee37f8022829ULL }, // Inst #13654 = VMOVDQA64Zrrkz |
| 33503 | { 13653, 3, 1, 0, 478, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xea3ff8022828ULL }, // Inst #13653 = VMOVDQA64Zrrk_REV |
| 33504 | { 13652, 4, 1, 0, 478, 0, 0, 2804, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8022829ULL }, // Inst #13652 = VMOVDQA64Zrrk |
| 33505 | { 13651, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe83ff8022828ULL }, // Inst #13651 = VMOVDQA64Zrr_REV |
| 33506 | { 13650, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe837f8022829ULL }, // Inst #13650 = VMOVDQA64Zrr |
| 33507 | { 13649, 7, 1, 0, 1833, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee37f8022819ULL }, // Inst #13649 = VMOVDQA64Zrmkz |
| 33508 | { 13648, 8, 1, 0, 1833, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8022819ULL }, // Inst #13648 = VMOVDQA64Zrmk |
| 33509 | { 13647, 6, 1, 0, 1328, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8022819ULL }, // Inst #13647 = VMOVDQA64Zrm |
| 33510 | { 13646, 7, 0, 0, 476, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xea3ff8022818ULL }, // Inst #13646 = VMOVDQA64Zmrk |
| 33511 | { 13645, 6, 0, 0, 476, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe83ff8022818ULL }, // Inst #13645 = VMOVDQA64Zmr |
| 33512 | { 13644, 3, 1, 0, 477, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc73ff8022828ULL }, // Inst #13644 = VMOVDQA64Z256rrkz_REV |
| 33513 | { 13643, 3, 1, 0, 477, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc737f8022829ULL }, // Inst #13643 = VMOVDQA64Z256rrkz |
| 33514 | { 13642, 3, 1, 0, 477, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc33ff8022828ULL }, // Inst #13642 = VMOVDQA64Z256rrk_REV |
| 33515 | { 13641, 4, 1, 0, 477, 0, 0, 2782, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8022829ULL }, // Inst #13641 = VMOVDQA64Z256rrk |
| 33516 | { 13640, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc13ff8022828ULL }, // Inst #13640 = VMOVDQA64Z256rr_REV |
| 33517 | { 13639, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc137f8022829ULL }, // Inst #13639 = VMOVDQA64Z256rr |
| 33518 | { 13638, 7, 1, 0, 1966, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc737f8022819ULL }, // Inst #13638 = VMOVDQA64Z256rmkz |
| 33519 | { 13637, 8, 1, 0, 1966, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8022819ULL }, // Inst #13637 = VMOVDQA64Z256rmk |
| 33520 | { 13636, 6, 1, 0, 1328, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8022819ULL }, // Inst #13636 = VMOVDQA64Z256rm |
| 33521 | { 13635, 7, 0, 0, 476, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc33ff8022818ULL }, // Inst #13635 = VMOVDQA64Z256mrk |
| 33522 | { 13634, 6, 0, 0, 476, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc13ff8022818ULL }, // Inst #13634 = VMOVDQA64Z256mr |
| 33523 | { 13633, 3, 1, 0, 1849, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa63ff8022828ULL }, // Inst #13633 = VMOVDQA64Z128rrkz_REV |
| 33524 | { 13632, 3, 1, 0, 1849, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa637f8022829ULL }, // Inst #13632 = VMOVDQA64Z128rrkz |
| 33525 | { 13631, 3, 1, 0, 1849, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa23ff8022828ULL }, // Inst #13631 = VMOVDQA64Z128rrk_REV |
| 33526 | { 13630, 4, 1, 0, 1849, 0, 0, 2766, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8022829ULL }, // Inst #13630 = VMOVDQA64Z128rrk |
| 33527 | { 13629, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa03ff8022828ULL }, // Inst #13629 = VMOVDQA64Z128rr_REV |
| 33528 | { 13628, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa037f8022829ULL }, // Inst #13628 = VMOVDQA64Z128rr |
| 33529 | { 13627, 7, 1, 0, 1866, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa637f8022819ULL }, // Inst #13627 = VMOVDQA64Z128rmkz |
| 33530 | { 13626, 8, 1, 0, 1866, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8022819ULL }, // Inst #13626 = VMOVDQA64Z128rmk |
| 33531 | { 13625, 6, 1, 0, 1304, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8022819ULL }, // Inst #13625 = VMOVDQA64Z128rm |
| 33532 | { 13624, 7, 0, 0, 193, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa23ff8022818ULL }, // Inst #13624 = VMOVDQA64Z128mrk |
| 33533 | { 13623, 6, 0, 0, 193, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa03ff8022818ULL }, // Inst #13623 = VMOVDQA64Z128mr |
| 33534 | { 13622, 3, 1, 0, 478, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee3ff8002828ULL }, // Inst #13622 = VMOVDQA32Zrrkz_REV |
| 33535 | { 13621, 3, 1, 0, 478, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee37f8002829ULL }, // Inst #13621 = VMOVDQA32Zrrkz |
| 33536 | { 13620, 3, 1, 0, 478, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xea3ff8002828ULL }, // Inst #13620 = VMOVDQA32Zrrk_REV |
| 33537 | { 13619, 4, 1, 0, 478, 0, 0, 2839, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8002829ULL }, // Inst #13619 = VMOVDQA32Zrrk |
| 33538 | { 13618, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe83ff8002828ULL }, // Inst #13618 = VMOVDQA32Zrr_REV |
| 33539 | { 13617, 2, 1, 0, 1695, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe837f8002829ULL }, // Inst #13617 = VMOVDQA32Zrr |
| 33540 | { 13616, 7, 1, 0, 1833, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee37f8002819ULL }, // Inst #13616 = VMOVDQA32Zrmkz |
| 33541 | { 13615, 8, 1, 0, 1833, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8002819ULL }, // Inst #13615 = VMOVDQA32Zrmk |
| 33542 | { 13614, 6, 1, 0, 1328, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8002819ULL }, // Inst #13614 = VMOVDQA32Zrm |
| 33543 | { 13613, 7, 0, 0, 476, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xea3ff8002818ULL }, // Inst #13613 = VMOVDQA32Zmrk |
| 33544 | { 13612, 6, 0, 0, 476, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe83ff8002818ULL }, // Inst #13612 = VMOVDQA32Zmr |
| 33545 | { 13611, 3, 1, 0, 477, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc73ff8002828ULL }, // Inst #13611 = VMOVDQA32Z256rrkz_REV |
| 33546 | { 13610, 3, 1, 0, 477, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc737f8002829ULL }, // Inst #13610 = VMOVDQA32Z256rrkz |
| 33547 | { 13609, 3, 1, 0, 477, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc33ff8002828ULL }, // Inst #13609 = VMOVDQA32Z256rrk_REV |
| 33548 | { 13608, 4, 1, 0, 477, 0, 0, 2825, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8002829ULL }, // Inst #13608 = VMOVDQA32Z256rrk |
| 33549 | { 13607, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc13ff8002828ULL }, // Inst #13607 = VMOVDQA32Z256rr_REV |
| 33550 | { 13606, 2, 1, 0, 1694, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc137f8002829ULL }, // Inst #13606 = VMOVDQA32Z256rr |
| 33551 | { 13605, 7, 1, 0, 1966, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc737f8002819ULL }, // Inst #13605 = VMOVDQA32Z256rmkz |
| 33552 | { 13604, 8, 1, 0, 1966, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8002819ULL }, // Inst #13604 = VMOVDQA32Z256rmk |
| 33553 | { 13603, 6, 1, 0, 1328, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8002819ULL }, // Inst #13603 = VMOVDQA32Z256rm |
| 33554 | { 13602, 7, 0, 0, 476, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc33ff8002818ULL }, // Inst #13602 = VMOVDQA32Z256mrk |
| 33555 | { 13601, 6, 0, 0, 476, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc13ff8002818ULL }, // Inst #13601 = VMOVDQA32Z256mr |
| 33556 | { 13600, 3, 1, 0, 1849, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa63ff8002828ULL }, // Inst #13600 = VMOVDQA32Z128rrkz_REV |
| 33557 | { 13599, 3, 1, 0, 1849, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa637f8002829ULL }, // Inst #13599 = VMOVDQA32Z128rrkz |
| 33558 | { 13598, 3, 1, 0, 1849, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa23ff8002828ULL }, // Inst #13598 = VMOVDQA32Z128rrk_REV |
| 33559 | { 13597, 4, 1, 0, 1849, 0, 0, 2400, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8002829ULL }, // Inst #13597 = VMOVDQA32Z128rrk |
| 33560 | { 13596, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa03ff8002828ULL }, // Inst #13596 = VMOVDQA32Z128rr_REV |
| 33561 | { 13595, 2, 1, 0, 198, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa037f8002829ULL }, // Inst #13595 = VMOVDQA32Z128rr |
| 33562 | { 13594, 7, 1, 0, 1866, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa637f8002819ULL }, // Inst #13594 = VMOVDQA32Z128rmkz |
| 33563 | { 13593, 8, 1, 0, 1866, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8002819ULL }, // Inst #13593 = VMOVDQA32Z128rmk |
| 33564 | { 13592, 6, 1, 0, 1304, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8002819ULL }, // Inst #13592 = VMOVDQA32Z128rm |
| 33565 | { 13591, 7, 0, 0, 193, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa23ff8002818ULL }, // Inst #13591 = VMOVDQA32Z128mrk |
| 33566 | { 13590, 6, 0, 0, 193, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa03ff8002818ULL }, // Inst #13590 = VMOVDQA32Z128mr |
| 33567 | { 13589, 2, 1, 0, 197, 0, 0, 1034, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x3738002829ULL }, // Inst #13589 = VMOVDI2SSrr |
| 33568 | { 13588, 2, 1, 0, 197, 0, 0, 4914, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0xa03778002829ULL }, // Inst #13588 = VMOVDI2SSZrr |
| 33569 | { 13587, 2, 1, 0, 197, 0, 0, 1402, X86ImpOpBase + 0, 0, 0x3738002829ULL }, // Inst #13587 = VMOVDI2PDIrr |
| 33570 | { 13586, 6, 1, 0, 770, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3738002819ULL }, // Inst #13586 = VMOVDI2PDIrm |
| 33571 | { 13585, 2, 1, 0, 197, 0, 0, 4912, X86ImpOpBase + 0, 0, 0xa03778002829ULL }, // Inst #13585 = VMOVDI2PDIZrr |
| 33572 | { 13584, 6, 1, 0, 1286, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x603778002819ULL }, // Inst #13584 = VMOVDI2PDIZrm |
| 33573 | { 13583, 2, 1, 0, 1417, 0, 0, 557, X86ImpOpBase + 0, 0, 0x930003829ULL }, // Inst #13583 = VMOVDDUPrr |
| 33574 | { 13582, 6, 1, 0, 771, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x930003819ULL }, // Inst #13582 = VMOVDDUPrm |
| 33575 | { 13581, 3, 1, 0, 1121, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee0970023829ULL }, // Inst #13581 = VMOVDDUPZrrkz |
| 33576 | { 13580, 4, 1, 0, 1121, 0, 0, 2804, X86ImpOpBase + 0, 0, 0xea0970023829ULL }, // Inst #13580 = VMOVDDUPZrrk |
| 33577 | { 13579, 2, 1, 0, 1121, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe80970023829ULL }, // Inst #13579 = VMOVDDUPZrr |
| 33578 | { 13578, 7, 1, 0, 1327, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0970023819ULL }, // Inst #13578 = VMOVDDUPZrmkz |
| 33579 | { 13577, 8, 1, 0, 1327, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0970023819ULL }, // Inst #13577 = VMOVDDUPZrmk |
| 33580 | { 13576, 6, 1, 0, 1825, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80970023819ULL }, // Inst #13576 = VMOVDDUPZrm |
| 33581 | { 13575, 3, 1, 0, 1120, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc70970023829ULL }, // Inst #13575 = VMOVDDUPZ256rrkz |
| 33582 | { 13574, 4, 1, 0, 1120, 0, 0, 2782, X86ImpOpBase + 0, 0, 0xc30970023829ULL }, // Inst #13574 = VMOVDDUPZ256rrk |
| 33583 | { 13573, 2, 1, 0, 1120, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc10970023829ULL }, // Inst #13573 = VMOVDDUPZ256rr |
| 33584 | { 13572, 7, 1, 0, 1326, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70970023819ULL }, // Inst #13572 = VMOVDDUPZ256rmkz |
| 33585 | { 13571, 8, 1, 0, 1326, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30970023819ULL }, // Inst #13571 = VMOVDDUPZ256rmk |
| 33586 | { 13570, 6, 1, 0, 1826, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10970023819ULL }, // Inst #13570 = VMOVDDUPZ256rm |
| 33587 | { 13569, 3, 1, 0, 1119, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa60970023829ULL }, // Inst #13569 = VMOVDDUPZ128rrkz |
| 33588 | { 13568, 4, 1, 0, 1119, 0, 0, 2766, X86ImpOpBase + 0, 0, 0xa20970023829ULL }, // Inst #13568 = VMOVDDUPZ128rrk |
| 33589 | { 13567, 2, 1, 0, 1119, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa00970023829ULL }, // Inst #13567 = VMOVDDUPZ128rr |
| 33590 | { 13566, 7, 1, 0, 1303, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x860970023819ULL }, // Inst #13566 = VMOVDDUPZ128rmkz |
| 33591 | { 13565, 8, 1, 0, 1303, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x820970023819ULL }, // Inst #13565 = VMOVDDUPZ128rmk |
| 33592 | { 13564, 6, 1, 0, 1794, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x800970023819ULL }, // Inst #13564 = VMOVDDUPZ128rm |
| 33593 | { 13563, 2, 1, 0, 1418, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x10930003829ULL }, // Inst #13563 = VMOVDDUPYrr |
| 33594 | { 13562, 6, 1, 0, 778, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10930003819ULL }, // Inst #13562 = VMOVDDUPYrm |
| 33595 | { 13561, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x14a8002028ULL }, // Inst #13561 = VMOVAPSrr_REV |
| 33596 | { 13560, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x1428002029ULL }, // Inst #13560 = VMOVAPSrr |
| 33597 | { 13559, 6, 1, 0, 14, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1428002019ULL }, // Inst #13559 = VMOVAPSrm |
| 33598 | { 13558, 6, 0, 0, 13, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x14a8002018ULL }, // Inst #13558 = VMOVAPSmr |
| 33599 | { 13557, 3, 1, 0, 471, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee14e8002028ULL }, // Inst #13557 = VMOVAPSZrrkz_REV |
| 33600 | { 13556, 3, 1, 0, 471, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee1468002029ULL }, // Inst #13556 = VMOVAPSZrrkz |
| 33601 | { 13555, 3, 1, 0, 471, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xea14e8002028ULL }, // Inst #13555 = VMOVAPSZrrk_REV |
| 33602 | { 13554, 4, 1, 0, 471, 0, 0, 2839, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea1468002029ULL }, // Inst #13554 = VMOVAPSZrrk |
| 33603 | { 13553, 2, 1, 0, 1693, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe814e8002028ULL }, // Inst #13553 = VMOVAPSZrr_REV |
| 33604 | { 13552, 2, 1, 0, 1693, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe81468002029ULL }, // Inst #13552 = VMOVAPSZrr |
| 33605 | { 13551, 7, 1, 0, 1832, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee1468002019ULL }, // Inst #13551 = VMOVAPSZrmkz |
| 33606 | { 13550, 8, 1, 0, 1832, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea1468002019ULL }, // Inst #13550 = VMOVAPSZrmk |
| 33607 | { 13549, 6, 1, 0, 1325, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe81468002019ULL }, // Inst #13549 = VMOVAPSZrm |
| 33608 | { 13548, 7, 0, 0, 15, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xea14e8002018ULL }, // Inst #13548 = VMOVAPSZmrk |
| 33609 | { 13547, 6, 0, 0, 15, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe814e8002018ULL }, // Inst #13547 = VMOVAPSZmr |
| 33610 | { 13546, 3, 1, 0, 1848, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc714e8002028ULL }, // Inst #13546 = VMOVAPSZ256rrkz_REV |
| 33611 | { 13545, 3, 1, 0, 1848, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc71468002029ULL }, // Inst #13545 = VMOVAPSZ256rrkz |
| 33612 | { 13544, 3, 1, 0, 1848, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc314e8002028ULL }, // Inst #13544 = VMOVAPSZ256rrk_REV |
| 33613 | { 13543, 4, 1, 0, 1848, 0, 0, 2825, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc31468002029ULL }, // Inst #13543 = VMOVAPSZ256rrk |
| 33614 | { 13542, 2, 1, 0, 470, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc114e8002028ULL }, // Inst #13542 = VMOVAPSZ256rr_REV |
| 33615 | { 13541, 2, 1, 0, 470, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc11468002029ULL }, // Inst #13541 = VMOVAPSZ256rr |
| 33616 | { 13540, 7, 1, 0, 1965, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc71468002019ULL }, // Inst #13540 = VMOVAPSZ256rmkz |
| 33617 | { 13539, 8, 1, 0, 1965, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc31468002019ULL }, // Inst #13539 = VMOVAPSZ256rmk |
| 33618 | { 13538, 6, 1, 0, 1325, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc11468002019ULL }, // Inst #13538 = VMOVAPSZ256rm |
| 33619 | { 13537, 7, 0, 0, 15, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc314e8002018ULL }, // Inst #13537 = VMOVAPSZ256mrk |
| 33620 | { 13536, 6, 0, 0, 15, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc114e8002018ULL }, // Inst #13536 = VMOVAPSZ256mr |
| 33621 | { 13535, 3, 1, 0, 1847, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa614e8002028ULL }, // Inst #13535 = VMOVAPSZ128rrkz_REV |
| 33622 | { 13534, 3, 1, 0, 1847, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa61468002029ULL }, // Inst #13534 = VMOVAPSZ128rrkz |
| 33623 | { 13533, 3, 1, 0, 1847, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa214e8002028ULL }, // Inst #13533 = VMOVAPSZ128rrk_REV |
| 33624 | { 13532, 4, 1, 0, 1847, 0, 0, 2400, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa21468002029ULL }, // Inst #13532 = VMOVAPSZ128rrk |
| 33625 | { 13531, 2, 1, 0, 221, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa014e8002028ULL }, // Inst #13531 = VMOVAPSZ128rr_REV |
| 33626 | { 13530, 2, 1, 0, 221, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa01468002029ULL }, // Inst #13530 = VMOVAPSZ128rr |
| 33627 | { 13529, 7, 1, 0, 1865, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa61468002019ULL }, // Inst #13529 = VMOVAPSZ128rmkz |
| 33628 | { 13528, 8, 1, 0, 1865, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa21468002019ULL }, // Inst #13528 = VMOVAPSZ128rmk |
| 33629 | { 13527, 6, 1, 0, 1302, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa01468002019ULL }, // Inst #13527 = VMOVAPSZ128rm |
| 33630 | { 13526, 7, 0, 0, 13, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa214e8002018ULL }, // Inst #13526 = VMOVAPSZ128mrk |
| 33631 | { 13525, 6, 0, 0, 13, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa014e8002018ULL }, // Inst #13525 = VMOVAPSZ128mr |
| 33632 | { 13524, 2, 1, 0, 470, 0, 0, 3116, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x114a8002028ULL }, // Inst #13524 = VMOVAPSYrr_REV |
| 33633 | { 13523, 2, 1, 0, 470, 0, 0, 3116, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x11428002029ULL }, // Inst #13523 = VMOVAPSYrr |
| 33634 | { 13522, 6, 1, 0, 16, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x11428002019ULL }, // Inst #13522 = VMOVAPSYrm |
| 33635 | { 13521, 6, 0, 0, 15, 0, 0, 4906, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x114a8002018ULL }, // Inst #13521 = VMOVAPSYmr |
| 33636 | { 13520, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x14b0002828ULL }, // Inst #13520 = VMOVAPDrr_REV |
| 33637 | { 13519, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x1430002829ULL }, // Inst #13519 = VMOVAPDrr |
| 33638 | { 13518, 6, 1, 0, 14, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1430002819ULL }, // Inst #13518 = VMOVAPDrm |
| 33639 | { 13517, 6, 0, 0, 13, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x14b0002818ULL }, // Inst #13517 = VMOVAPDmr |
| 33640 | { 13516, 3, 1, 0, 471, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee14f0022828ULL }, // Inst #13516 = VMOVAPDZrrkz_REV |
| 33641 | { 13515, 3, 1, 0, 471, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee1470022829ULL }, // Inst #13515 = VMOVAPDZrrkz |
| 33642 | { 13514, 3, 1, 0, 471, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xea14f0022828ULL }, // Inst #13514 = VMOVAPDZrrk_REV |
| 33643 | { 13513, 4, 1, 0, 471, 0, 0, 2804, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea1470022829ULL }, // Inst #13513 = VMOVAPDZrrk |
| 33644 | { 13512, 2, 1, 0, 1693, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe814f0022828ULL }, // Inst #13512 = VMOVAPDZrr_REV |
| 33645 | { 13511, 2, 1, 0, 1693, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xe81470022829ULL }, // Inst #13511 = VMOVAPDZrr |
| 33646 | { 13510, 7, 1, 0, 1832, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee1470022819ULL }, // Inst #13510 = VMOVAPDZrmkz |
| 33647 | { 13509, 8, 1, 0, 1832, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea1470022819ULL }, // Inst #13509 = VMOVAPDZrmk |
| 33648 | { 13508, 6, 1, 0, 1325, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe81470022819ULL }, // Inst #13508 = VMOVAPDZrm |
| 33649 | { 13507, 7, 0, 0, 15, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xea14f0022818ULL }, // Inst #13507 = VMOVAPDZmrk |
| 33650 | { 13506, 6, 0, 0, 15, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xe814f0022818ULL }, // Inst #13506 = VMOVAPDZmr |
| 33651 | { 13505, 3, 1, 0, 1848, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc714f0022828ULL }, // Inst #13505 = VMOVAPDZ256rrkz_REV |
| 33652 | { 13504, 3, 1, 0, 1848, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc71470022829ULL }, // Inst #13504 = VMOVAPDZ256rrkz |
| 33653 | { 13503, 3, 1, 0, 1848, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc314f0022828ULL }, // Inst #13503 = VMOVAPDZ256rrk_REV |
| 33654 | { 13502, 4, 1, 0, 1848, 0, 0, 2782, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc31470022829ULL }, // Inst #13502 = VMOVAPDZ256rrk |
| 33655 | { 13501, 2, 1, 0, 470, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc114f0022828ULL }, // Inst #13501 = VMOVAPDZ256rr_REV |
| 33656 | { 13500, 2, 1, 0, 470, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xc11470022829ULL }, // Inst #13500 = VMOVAPDZ256rr |
| 33657 | { 13499, 7, 1, 0, 1965, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc71470022819ULL }, // Inst #13499 = VMOVAPDZ256rmkz |
| 33658 | { 13498, 8, 1, 0, 1965, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc31470022819ULL }, // Inst #13498 = VMOVAPDZ256rmk |
| 33659 | { 13497, 6, 1, 0, 1325, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc11470022819ULL }, // Inst #13497 = VMOVAPDZ256rm |
| 33660 | { 13496, 7, 0, 0, 15, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc314f0022818ULL }, // Inst #13496 = VMOVAPDZ256mrk |
| 33661 | { 13495, 6, 0, 0, 15, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc114f0022818ULL }, // Inst #13495 = VMOVAPDZ256mr |
| 33662 | { 13494, 3, 1, 0, 1847, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa614f0022828ULL }, // Inst #13494 = VMOVAPDZ128rrkz_REV |
| 33663 | { 13493, 3, 1, 0, 1847, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa61470022829ULL }, // Inst #13493 = VMOVAPDZ128rrkz |
| 33664 | { 13492, 3, 1, 0, 1847, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa214f0022828ULL }, // Inst #13492 = VMOVAPDZ128rrk_REV |
| 33665 | { 13491, 4, 1, 0, 1847, 0, 0, 2766, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa21470022829ULL }, // Inst #13491 = VMOVAPDZ128rrk |
| 33666 | { 13490, 2, 1, 0, 221, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa014f0022828ULL }, // Inst #13490 = VMOVAPDZ128rr_REV |
| 33667 | { 13489, 2, 1, 0, 221, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xa01470022829ULL }, // Inst #13489 = VMOVAPDZ128rr |
| 33668 | { 13488, 7, 1, 0, 1865, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa61470022819ULL }, // Inst #13488 = VMOVAPDZ128rmkz |
| 33669 | { 13487, 8, 1, 0, 1865, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa21470022819ULL }, // Inst #13487 = VMOVAPDZ128rmk |
| 33670 | { 13486, 6, 1, 0, 1302, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa01470022819ULL }, // Inst #13486 = VMOVAPDZ128rm |
| 33671 | { 13485, 7, 0, 0, 13, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa214f0022818ULL }, // Inst #13485 = VMOVAPDZ128mrk |
| 33672 | { 13484, 6, 0, 0, 13, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa014f0022818ULL }, // Inst #13484 = VMOVAPDZ128mr |
| 33673 | { 13483, 2, 1, 0, 470, 0, 0, 3116, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x114b0002828ULL }, // Inst #13483 = VMOVAPDYrr_REV |
| 33674 | { 13482, 2, 1, 0, 470, 0, 0, 3116, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x11430002829ULL }, // Inst #13482 = VMOVAPDYrr |
| 33675 | { 13481, 6, 1, 0, 16, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x11430002819ULL }, // Inst #13481 = VMOVAPDYrm |
| 33676 | { 13480, 6, 0, 0, 15, 0, 0, 4906, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x114b0002818ULL }, // Inst #13480 = VMOVAPDYmr |
| 33677 | { 13479, 2, 1, 0, 197, 0, 0, 1036, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x3738022829ULL }, // Inst #13479 = VMOV64toSDrr |
| 33678 | { 13478, 2, 1, 0, 197, 0, 0, 4904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0xa03778022829ULL }, // Inst #13478 = VMOV64toSDZrr |
| 33679 | { 13477, 2, 1, 0, 197, 0, 0, 1380, X86ImpOpBase + 0, 0, 0x3738022829ULL }, // Inst #13477 = VMOV64toPQIrr |
| 33680 | { 13476, 6, 1, 0, 770, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3738022819ULL }, // Inst #13476 = VMOV64toPQIrm |
| 33681 | { 13475, 2, 1, 0, 197, 0, 0, 4902, X86ImpOpBase + 0, 0, 0xa03778022829ULL }, // Inst #13475 = VMOV64toPQIZrr |
| 33682 | { 13474, 6, 1, 0, 1285, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x803778022819ULL }, // Inst #13474 = VMOV64toPQIZrm |
| 33683 | { 13473, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002059ULL }, // Inst #13473 = VMMCALL |
| 33684 | { 13472, 0, 0, 0, 8, 1, 0, 1, X86ImpOpBase + 123, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205aULL }, // Inst #13472 = VMLOAD64 |
| 33685 | { 13471, 0, 0, 0, 8, 1, 0, 1, X86ImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205aULL }, // Inst #13471 = VMLOAD32 |
| 33686 | { 13470, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002042ULL }, // Inst #13470 = VMLAUNCH |
| 33687 | { 13469, 3, 1, 0, 1113, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaea8003029ULL }, // Inst #13469 = VMINSSrr_Int |
| 33688 | { 13468, 3, 1, 0, 83, 1, 0, 2046, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaea8003029ULL }, // Inst #13468 = VMINSSrr |
| 33689 | { 13467, 7, 1, 0, 82, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaea8003019ULL }, // Inst #13467 = VMINSSrm_Int |
| 33690 | { 13466, 7, 1, 0, 82, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaea8003019ULL }, // Inst #13466 = VMINSSrm |
| 33691 | { 13465, 4, 1, 0, 1113, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66aee8003029ULL }, // Inst #13465 = VMINSSZrrkz_Int |
| 33692 | { 13464, 5, 1, 0, 1113, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62aee8003029ULL }, // Inst #13464 = VMINSSZrrk_Int |
| 33693 | { 13463, 4, 1, 0, 83, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x76aee8003029ULL }, // Inst #13463 = VMINSSZrrbkz_Int |
| 33694 | { 13462, 5, 1, 0, 83, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x72aee8003029ULL }, // Inst #13462 = VMINSSZrrbk_Int |
| 33695 | { 13461, 3, 1, 0, 83, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x70aee8003029ULL }, // Inst #13461 = VMINSSZrrb_Int |
| 33696 | { 13460, 3, 1, 0, 1113, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60aee8003029ULL }, // Inst #13460 = VMINSSZrr_Int |
| 33697 | { 13459, 3, 1, 0, 83, 1, 0, 2036, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60aee8003029ULL }, // Inst #13459 = VMINSSZrr |
| 33698 | { 13458, 8, 1, 0, 82, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66aee8003019ULL }, // Inst #13458 = VMINSSZrmkz_Int |
| 33699 | { 13457, 9, 1, 0, 82, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62aee8003019ULL }, // Inst #13457 = VMINSSZrmk_Int |
| 33700 | { 13456, 7, 1, 0, 82, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60aee8003019ULL }, // Inst #13456 = VMINSSZrm_Int |
| 33701 | { 13455, 7, 1, 0, 82, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60aee8003019ULL }, // Inst #13455 = VMINSSZrm |
| 33702 | { 13454, 4, 1, 0, 1916, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x46aee8013029ULL }, // Inst #13454 = VMINSHZrrkz_Int |
| 33703 | { 13453, 5, 1, 0, 1916, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x42aee8013029ULL }, // Inst #13453 = VMINSHZrrk_Int |
| 33704 | { 13452, 4, 1, 0, 1916, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x56aee8013029ULL }, // Inst #13452 = VMINSHZrrbkz_Int |
| 33705 | { 13451, 5, 1, 0, 1916, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x52aee8013029ULL }, // Inst #13451 = VMINSHZrrbk_Int |
| 33706 | { 13450, 3, 1, 0, 1788, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x50aee8013029ULL }, // Inst #13450 = VMINSHZrrb_Int |
| 33707 | { 13449, 3, 1, 0, 1788, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40aee8013029ULL }, // Inst #13449 = VMINSHZrr_Int |
| 33708 | { 13448, 3, 1, 0, 1788, 1, 0, 2026, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40aee8013029ULL }, // Inst #13448 = VMINSHZrr |
| 33709 | { 13447, 8, 1, 0, 1766, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46aee8013019ULL }, // Inst #13447 = VMINSHZrmkz_Int |
| 33710 | { 13446, 9, 1, 0, 1766, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42aee8013019ULL }, // Inst #13446 = VMINSHZrmk_Int |
| 33711 | { 13445, 7, 1, 0, 1766, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40aee8013019ULL }, // Inst #13445 = VMINSHZrm_Int |
| 33712 | { 13444, 7, 1, 0, 1766, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40aee8013019ULL }, // Inst #13444 = VMINSHZrm |
| 33713 | { 13443, 3, 1, 0, 1112, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaeb0003829ULL }, // Inst #13443 = VMINSDrr_Int |
| 33714 | { 13442, 3, 1, 0, 81, 1, 0, 2016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaeb0003829ULL }, // Inst #13442 = VMINSDrr |
| 33715 | { 13441, 7, 1, 0, 80, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb0003819ULL }, // Inst #13441 = VMINSDrm_Int |
| 33716 | { 13440, 7, 1, 0, 80, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb0003819ULL }, // Inst #13440 = VMINSDrm |
| 33717 | { 13439, 4, 1, 0, 1112, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86aef0023829ULL }, // Inst #13439 = VMINSDZrrkz_Int |
| 33718 | { 13438, 5, 1, 0, 1112, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82aef0023829ULL }, // Inst #13438 = VMINSDZrrk_Int |
| 33719 | { 13437, 4, 1, 0, 81, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x96aef0023829ULL }, // Inst #13437 = VMINSDZrrbkz_Int |
| 33720 | { 13436, 5, 1, 0, 81, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x92aef0023829ULL }, // Inst #13436 = VMINSDZrrbk_Int |
| 33721 | { 13435, 3, 1, 0, 81, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x90aef0023829ULL }, // Inst #13435 = VMINSDZrrb_Int |
| 33722 | { 13434, 3, 1, 0, 1112, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80aef0023829ULL }, // Inst #13434 = VMINSDZrr_Int |
| 33723 | { 13433, 3, 1, 0, 81, 1, 0, 1982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80aef0023829ULL }, // Inst #13433 = VMINSDZrr |
| 33724 | { 13432, 8, 1, 0, 80, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86aef0023819ULL }, // Inst #13432 = VMINSDZrmkz_Int |
| 33725 | { 13431, 9, 1, 0, 80, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82aef0023819ULL }, // Inst #13431 = VMINSDZrmk_Int |
| 33726 | { 13430, 7, 1, 0, 80, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aef0023819ULL }, // Inst #13430 = VMINSDZrm_Int |
| 33727 | { 13429, 7, 1, 0, 80, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aef0023819ULL }, // Inst #13429 = VMINSDZrm |
| 33728 | { 13428, 3, 1, 0, 79, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaea8002029ULL }, // Inst #13428 = VMINPSrr |
| 33729 | { 13427, 7, 1, 0, 78, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaea8002019ULL }, // Inst #13427 = VMINPSrm |
| 33730 | { 13426, 4, 1, 0, 1862, 1, 0, 1963, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8002029ULL }, // Inst #13426 = VMINPSZrrkz |
| 33731 | { 13425, 5, 1, 0, 1862, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8002029ULL }, // Inst #13425 = VMINPSZrrk |
| 33732 | { 13424, 4, 1, 0, 1862, 1, 0, 1963, X86ImpOpBase + 78, 0, 0x7eaee8002029ULL }, // Inst #13424 = VMINPSZrrbkz |
| 33733 | { 13423, 5, 1, 0, 1862, 1, 0, 1958, X86ImpOpBase + 78, 0, 0x7aaee8002029ULL }, // Inst #13423 = VMINPSZrrbk |
| 33734 | { 13422, 3, 1, 0, 1862, 1, 0, 1751, X86ImpOpBase + 78, 0, 0x78aee8002029ULL }, // Inst #13422 = VMINPSZrrb |
| 33735 | { 13421, 3, 1, 0, 1862, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8002029ULL }, // Inst #13421 = VMINPSZrr |
| 33736 | { 13420, 8, 1, 0, 370, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8002019ULL }, // Inst #13420 = VMINPSZrmkz |
| 33737 | { 13419, 9, 1, 0, 370, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8002019ULL }, // Inst #13419 = VMINPSZrmk |
| 33738 | { 13418, 8, 1, 0, 370, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eaee8002019ULL }, // Inst #13418 = VMINPSZrmbkz |
| 33739 | { 13417, 9, 1, 0, 370, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aaee8002019ULL }, // Inst #13417 = VMINPSZrmbk |
| 33740 | { 13416, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78aee8002019ULL }, // Inst #13416 = VMINPSZrmb |
| 33741 | { 13415, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8002019ULL }, // Inst #13415 = VMINPSZrm |
| 33742 | { 13414, 4, 1, 0, 369, 1, 0, 1935, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8002029ULL }, // Inst #13414 = VMINPSZ256rrkz |
| 33743 | { 13413, 5, 1, 0, 369, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8002029ULL }, // Inst #13413 = VMINPSZ256rrk |
| 33744 | { 13412, 3, 1, 0, 369, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8002029ULL }, // Inst #13412 = VMINPSZ256rr |
| 33745 | { 13411, 8, 1, 0, 368, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8002019ULL }, // Inst #13411 = VMINPSZ256rmkz |
| 33746 | { 13410, 9, 1, 0, 368, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8002019ULL }, // Inst #13410 = VMINPSZ256rmk |
| 33747 | { 13409, 8, 1, 0, 368, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77aee8002019ULL }, // Inst #13409 = VMINPSZ256rmbkz |
| 33748 | { 13408, 9, 1, 0, 368, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73aee8002019ULL }, // Inst #13408 = VMINPSZ256rmbk |
| 33749 | { 13407, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71aee8002019ULL }, // Inst #13407 = VMINPSZ256rmb |
| 33750 | { 13406, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8002019ULL }, // Inst #13406 = VMINPSZ256rm |
| 33751 | { 13405, 4, 1, 0, 79, 1, 0, 1909, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8002029ULL }, // Inst #13405 = VMINPSZ128rrkz |
| 33752 | { 13404, 5, 1, 0, 79, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8002029ULL }, // Inst #13404 = VMINPSZ128rrk |
| 33753 | { 13403, 3, 1, 0, 79, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8002029ULL }, // Inst #13403 = VMINPSZ128rr |
| 33754 | { 13402, 8, 1, 0, 78, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8002019ULL }, // Inst #13402 = VMINPSZ128rmkz |
| 33755 | { 13401, 9, 1, 0, 78, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8002019ULL }, // Inst #13401 = VMINPSZ128rmk |
| 33756 | { 13400, 8, 1, 0, 78, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76aee8002019ULL }, // Inst #13400 = VMINPSZ128rmbkz |
| 33757 | { 13399, 9, 1, 0, 78, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72aee8002019ULL }, // Inst #13399 = VMINPSZ128rmbk |
| 33758 | { 13398, 7, 1, 0, 78, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70aee8002019ULL }, // Inst #13398 = VMINPSZ128rmb |
| 33759 | { 13397, 7, 1, 0, 78, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8002019ULL }, // Inst #13397 = VMINPSZ128rm |
| 33760 | { 13396, 3, 1, 0, 369, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1aea8002029ULL }, // Inst #13396 = VMINPSYrr |
| 33761 | { 13395, 7, 1, 0, 368, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aea8002019ULL }, // Inst #13395 = VMINPSYrm |
| 33762 | { 13394, 4, 1, 0, 1930, 1, 0, 1759, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8012029ULL }, // Inst #13394 = VMINPHZrrkz |
| 33763 | { 13393, 5, 1, 0, 1930, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8012029ULL }, // Inst #13393 = VMINPHZrrk |
| 33764 | { 13392, 4, 1, 0, 1930, 1, 0, 1759, X86ImpOpBase + 78, 0, 0x5eaee8012029ULL }, // Inst #13392 = VMINPHZrrbkz |
| 33765 | { 13391, 5, 1, 0, 1930, 1, 0, 1754, X86ImpOpBase + 78, 0, 0x5aaee8012029ULL }, // Inst #13391 = VMINPHZrrbk |
| 33766 | { 13390, 3, 1, 0, 1923, 1, 0, 1751, X86ImpOpBase + 78, 0, 0x58aee8012029ULL }, // Inst #13390 = VMINPHZrrb |
| 33767 | { 13389, 3, 1, 0, 1923, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8012029ULL }, // Inst #13389 = VMINPHZrr |
| 33768 | { 13388, 8, 1, 0, 370, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8012019ULL }, // Inst #13388 = VMINPHZrmkz |
| 33769 | { 13387, 9, 1, 0, 370, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8012019ULL }, // Inst #13387 = VMINPHZrmk |
| 33770 | { 13386, 8, 1, 0, 370, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eaee8012019ULL }, // Inst #13386 = VMINPHZrmbkz |
| 33771 | { 13385, 9, 1, 0, 370, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aaee8012019ULL }, // Inst #13385 = VMINPHZrmbk |
| 33772 | { 13384, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58aee8012019ULL }, // Inst #13384 = VMINPHZrmb |
| 33773 | { 13383, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8012019ULL }, // Inst #13383 = VMINPHZrm |
| 33774 | { 13382, 4, 1, 0, 1913, 1, 0, 1723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8012029ULL }, // Inst #13382 = VMINPHZ256rrkz |
| 33775 | { 13381, 5, 1, 0, 1913, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8012029ULL }, // Inst #13381 = VMINPHZ256rrk |
| 33776 | { 13380, 3, 1, 0, 1787, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8012029ULL }, // Inst #13380 = VMINPHZ256rr |
| 33777 | { 13379, 8, 1, 0, 368, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8012019ULL }, // Inst #13379 = VMINPHZ256rmkz |
| 33778 | { 13378, 9, 1, 0, 368, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8012019ULL }, // Inst #13378 = VMINPHZ256rmk |
| 33779 | { 13377, 8, 1, 0, 368, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57aee8012019ULL }, // Inst #13377 = VMINPHZ256rmbkz |
| 33780 | { 13376, 9, 1, 0, 368, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53aee8012019ULL }, // Inst #13376 = VMINPHZ256rmbk |
| 33781 | { 13375, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51aee8012019ULL }, // Inst #13375 = VMINPHZ256rmb |
| 33782 | { 13374, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8012019ULL }, // Inst #13374 = VMINPHZ256rm |
| 33783 | { 13373, 4, 1, 0, 1912, 1, 0, 1687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8012029ULL }, // Inst #13373 = VMINPHZ128rrkz |
| 33784 | { 13372, 5, 1, 0, 1912, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8012029ULL }, // Inst #13372 = VMINPHZ128rrk |
| 33785 | { 13371, 3, 1, 0, 1786, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8012029ULL }, // Inst #13371 = VMINPHZ128rr |
| 33786 | { 13370, 8, 1, 0, 1760, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8012019ULL }, // Inst #13370 = VMINPHZ128rmkz |
| 33787 | { 13369, 9, 1, 0, 1760, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8012019ULL }, // Inst #13369 = VMINPHZ128rmk |
| 33788 | { 13368, 8, 1, 0, 1760, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56aee8012019ULL }, // Inst #13368 = VMINPHZ128rmbkz |
| 33789 | { 13367, 9, 1, 0, 1760, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52aee8012019ULL }, // Inst #13367 = VMINPHZ128rmbk |
| 33790 | { 13366, 7, 1, 0, 1760, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50aee8012019ULL }, // Inst #13366 = VMINPHZ128rmb |
| 33791 | { 13365, 7, 1, 0, 1760, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8012019ULL }, // Inst #13365 = VMINPHZ128rm |
| 33792 | { 13364, 3, 1, 0, 77, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaeb0002829ULL }, // Inst #13364 = VMINPDrr |
| 33793 | { 13363, 7, 1, 0, 76, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb0002819ULL }, // Inst #13363 = VMINPDrm |
| 33794 | { 13362, 4, 1, 0, 1118, 1, 0, 1862, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaef0022829ULL }, // Inst #13362 = VMINPDZrrkz |
| 33795 | { 13361, 5, 1, 0, 1118, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaef0022829ULL }, // Inst #13361 = VMINPDZrrk |
| 33796 | { 13360, 4, 1, 0, 1118, 1, 0, 1862, X86ImpOpBase + 78, 0, 0x9eaef0022829ULL }, // Inst #13360 = VMINPDZrrbkz |
| 33797 | { 13359, 5, 1, 0, 1118, 1, 0, 1857, X86ImpOpBase + 78, 0, 0x9aaef0022829ULL }, // Inst #13359 = VMINPDZrrbk |
| 33798 | { 13358, 3, 1, 0, 1118, 1, 0, 1751, X86ImpOpBase + 78, 0, 0x98aef0022829ULL }, // Inst #13358 = VMINPDZrrb |
| 33799 | { 13357, 3, 1, 0, 1118, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aef0022829ULL }, // Inst #13357 = VMINPDZrr |
| 33800 | { 13356, 8, 1, 0, 468, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaef0022819ULL }, // Inst #13356 = VMINPDZrmkz |
| 33801 | { 13355, 9, 1, 0, 468, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaef0022819ULL }, // Inst #13355 = VMINPDZrmk |
| 33802 | { 13354, 8, 1, 0, 468, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaef0022819ULL }, // Inst #13354 = VMINPDZrmbkz |
| 33803 | { 13353, 9, 1, 0, 468, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaef0022819ULL }, // Inst #13353 = VMINPDZrmbk |
| 33804 | { 13352, 7, 1, 0, 468, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98aef0022819ULL }, // Inst #13352 = VMINPDZrmb |
| 33805 | { 13351, 7, 1, 0, 468, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aef0022819ULL }, // Inst #13351 = VMINPDZrm |
| 33806 | { 13350, 4, 1, 0, 1117, 1, 0, 1821, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aef0022829ULL }, // Inst #13350 = VMINPDZ256rrkz |
| 33807 | { 13349, 5, 1, 0, 1117, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aef0022829ULL }, // Inst #13349 = VMINPDZ256rrk |
| 33808 | { 13348, 3, 1, 0, 1117, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aef0022829ULL }, // Inst #13348 = VMINPDZ256rr |
| 33809 | { 13347, 8, 1, 0, 372, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aef0022819ULL }, // Inst #13347 = VMINPDZ256rmkz |
| 33810 | { 13346, 9, 1, 0, 372, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aef0022819ULL }, // Inst #13346 = VMINPDZ256rmk |
| 33811 | { 13345, 8, 1, 0, 372, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97aef0022819ULL }, // Inst #13345 = VMINPDZ256rmbkz |
| 33812 | { 13344, 9, 1, 0, 372, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93aef0022819ULL }, // Inst #13344 = VMINPDZ256rmbk |
| 33813 | { 13343, 7, 1, 0, 372, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91aef0022819ULL }, // Inst #13343 = VMINPDZ256rmb |
| 33814 | { 13342, 7, 1, 0, 372, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aef0022819ULL }, // Inst #13342 = VMINPDZ256rm |
| 33815 | { 13341, 4, 1, 0, 1110, 1, 0, 1795, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aef0022829ULL }, // Inst #13341 = VMINPDZ128rrkz |
| 33816 | { 13340, 5, 1, 0, 1110, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aef0022829ULL }, // Inst #13340 = VMINPDZ128rrk |
| 33817 | { 13339, 3, 1, 0, 1110, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aef0022829ULL }, // Inst #13339 = VMINPDZ128rr |
| 33818 | { 13338, 8, 1, 0, 76, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aef0022819ULL }, // Inst #13338 = VMINPDZ128rmkz |
| 33819 | { 13337, 9, 1, 0, 76, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aef0022819ULL }, // Inst #13337 = VMINPDZ128rmk |
| 33820 | { 13336, 8, 1, 0, 76, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96aef0022819ULL }, // Inst #13336 = VMINPDZ128rmbkz |
| 33821 | { 13335, 9, 1, 0, 76, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92aef0022819ULL }, // Inst #13335 = VMINPDZ128rmbk |
| 33822 | { 13334, 7, 1, 0, 76, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90aef0022819ULL }, // Inst #13334 = VMINPDZ128rmb |
| 33823 | { 13333, 7, 1, 0, 76, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aef0022819ULL }, // Inst #13333 = VMINPDZ128rm |
| 33824 | { 13332, 3, 1, 0, 373, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1aeb0002829ULL }, // Inst #13332 = VMINPDYrr |
| 33825 | { 13331, 7, 1, 0, 372, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aeb0002819ULL }, // Inst #13331 = VMINPDYrm |
| 33826 | { 13330, 5, 1, 0, 432, 0, 0, 2082, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x66a9e8046829ULL }, // Inst #13330 = VMINMAXSSrrikz_Int |
| 33827 | { 13329, 6, 1, 0, 432, 0, 0, 2076, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x62a9e8046829ULL }, // Inst #13329 = VMINMAXSSrrik_Int |
| 33828 | { 13328, 5, 1, 0, 432, 0, 0, 2082, X86ImpOpBase + 0, 0, 0x76a9e8046829ULL }, // Inst #13328 = VMINMAXSSrribkz_Int |
| 33829 | { 13327, 6, 1, 0, 432, 0, 0, 2076, X86ImpOpBase + 0, 0, 0x72a9e8046829ULL }, // Inst #13327 = VMINMAXSSrribk_Int |
| 33830 | { 13326, 4, 1, 0, 432, 0, 0, 919, X86ImpOpBase + 0, 0, 0x70a9e8046829ULL }, // Inst #13326 = VMINMAXSSrrib_Int |
| 33831 | { 13325, 4, 1, 0, 432, 0, 0, 919, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x60a9e8046829ULL }, // Inst #13325 = VMINMAXSSrri_Int |
| 33832 | { 13324, 4, 1, 0, 432, 0, 0, 851, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x60a9e8046829ULL }, // Inst #13324 = VMINMAXSSrri |
| 33833 | { 13323, 9, 1, 0, 431, 0, 0, 2067, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66a9e8046819ULL }, // Inst #13323 = VMINMAXSSrmikz_Int |
| 33834 | { 13322, 10, 1, 0, 431, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62a9e8046819ULL }, // Inst #13322 = VMINMAXSSrmik_Int |
| 33835 | { 13321, 8, 1, 0, 431, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60a9e8046819ULL }, // Inst #13321 = VMINMAXSSrmi_Int |
| 33836 | { 13320, 8, 1, 0, 431, 0, 0, 4894, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60a9e8046819ULL }, // Inst #13320 = VMINMAXSSrmi |
| 33837 | { 13319, 5, 1, 0, 432, 0, 0, 3504, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x46a9e8046029ULL }, // Inst #13319 = VMINMAXSHrrikz_Int |
| 33838 | { 13318, 6, 1, 0, 432, 0, 0, 3498, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x42a9e8046029ULL }, // Inst #13318 = VMINMAXSHrrik_Int |
| 33839 | { 13317, 5, 1, 0, 432, 0, 0, 3504, X86ImpOpBase + 0, 0, 0x56a9e8046029ULL }, // Inst #13317 = VMINMAXSHrribkz_Int |
| 33840 | { 13316, 6, 1, 0, 432, 0, 0, 3498, X86ImpOpBase + 0, 0, 0x52a9e8046029ULL }, // Inst #13316 = VMINMAXSHrribk_Int |
| 33841 | { 13315, 4, 1, 0, 432, 0, 0, 919, X86ImpOpBase + 0, 0, 0x50a9e8046029ULL }, // Inst #13315 = VMINMAXSHrrib_Int |
| 33842 | { 13314, 4, 1, 0, 432, 0, 0, 919, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x40a9e8046029ULL }, // Inst #13314 = VMINMAXSHrri_Int |
| 33843 | { 13313, 4, 1, 0, 432, 0, 0, 843, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x40a9e8046029ULL }, // Inst #13313 = VMINMAXSHrri |
| 33844 | { 13312, 9, 1, 0, 431, 0, 0, 3489, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46a9e8046019ULL }, // Inst #13312 = VMINMAXSHrmikz_Int |
| 33845 | { 13311, 10, 1, 0, 431, 0, 0, 3479, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42a9e8046019ULL }, // Inst #13311 = VMINMAXSHrmik_Int |
| 33846 | { 13310, 8, 1, 0, 431, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40a9e8046019ULL }, // Inst #13310 = VMINMAXSHrmi_Int |
| 33847 | { 13309, 8, 1, 0, 431, 0, 0, 4886, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40a9e8046019ULL }, // Inst #13309 = VMINMAXSHrmi |
| 33848 | { 13308, 5, 1, 0, 432, 0, 0, 2188, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x86a9f0066829ULL }, // Inst #13308 = VMINMAXSDrrikz_Int |
| 33849 | { 13307, 6, 1, 0, 432, 0, 0, 2182, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x82a9f0066829ULL }, // Inst #13307 = VMINMAXSDrrik_Int |
| 33850 | { 13306, 5, 1, 0, 432, 0, 0, 2188, X86ImpOpBase + 0, 0, 0x96a9f0066829ULL }, // Inst #13306 = VMINMAXSDrribkz_Int |
| 33851 | { 13305, 6, 1, 0, 432, 0, 0, 2182, X86ImpOpBase + 0, 0, 0x92a9f0066829ULL }, // Inst #13305 = VMINMAXSDrribk_Int |
| 33852 | { 13304, 4, 1, 0, 432, 0, 0, 919, X86ImpOpBase + 0, 0, 0x90a9f0066829ULL }, // Inst #13304 = VMINMAXSDrrib_Int |
| 33853 | { 13303, 4, 1, 0, 432, 0, 0, 919, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x80a9f0066829ULL }, // Inst #13303 = VMINMAXSDrri_Int |
| 33854 | { 13302, 4, 1, 0, 432, 0, 0, 859, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayRaiseFPException), 0x80a9f0066829ULL }, // Inst #13302 = VMINMAXSDrri |
| 33855 | { 13301, 9, 1, 0, 431, 0, 0, 2173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86a9f0066819ULL }, // Inst #13301 = VMINMAXSDrmikz_Int |
| 33856 | { 13300, 10, 1, 0, 431, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82a9f0066819ULL }, // Inst #13300 = VMINMAXSDrmik_Int |
| 33857 | { 13299, 8, 1, 0, 431, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80a9f0066819ULL }, // Inst #13299 = VMINMAXSDrmi_Int |
| 33858 | { 13298, 8, 1, 0, 431, 0, 0, 4878, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80a9f0066819ULL }, // Inst #13298 = VMINMAXSDrmi |
| 33859 | { 13297, 5, 1, 0, 432, 1, 0, 2158, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeea970046829ULL }, // Inst #13297 = VMINMAXPSZrrikz |
| 33860 | { 13296, 6, 1, 0, 432, 1, 0, 2152, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaa970046829ULL }, // Inst #13296 = VMINMAXPSZrrik |
| 33861 | { 13295, 5, 1, 0, 432, 0, 0, 2158, X86ImpOpBase + 0, 0, 0x7ea970046829ULL }, // Inst #13295 = VMINMAXPSZrribkz |
| 33862 | { 13294, 6, 1, 0, 432, 0, 0, 2152, X86ImpOpBase + 0, 0, 0x7aa970046829ULL }, // Inst #13294 = VMINMAXPSZrribk |
| 33863 | { 13293, 4, 1, 0, 432, 0, 0, 931, X86ImpOpBase + 0, 0, 0x78a970046829ULL }, // Inst #13293 = VMINMAXPSZrrib |
| 33864 | { 13292, 4, 1, 0, 432, 1, 0, 931, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8a970046829ULL }, // Inst #13292 = VMINMAXPSZrri |
| 33865 | { 13291, 9, 1, 0, 431, 1, 0, 2143, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeea970046819ULL }, // Inst #13291 = VMINMAXPSZrmikz |
| 33866 | { 13290, 10, 1, 0, 431, 1, 0, 2133, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaa970046819ULL }, // Inst #13290 = VMINMAXPSZrmik |
| 33867 | { 13289, 8, 1, 0, 431, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8a970046819ULL }, // Inst #13289 = VMINMAXPSZrmi |
| 33868 | { 13288, 9, 1, 0, 431, 1, 0, 2143, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ea970046819ULL }, // Inst #13288 = VMINMAXPSZrmbikz |
| 33869 | { 13287, 10, 1, 0, 431, 1, 0, 2133, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aa970046819ULL }, // Inst #13287 = VMINMAXPSZrmbik |
| 33870 | { 13286, 8, 1, 0, 431, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78a970046819ULL }, // Inst #13286 = VMINMAXPSZrmbi |
| 33871 | { 13285, 5, 1, 0, 432, 1, 0, 2120, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7a970046829ULL }, // Inst #13285 = VMINMAXPSZ256rrikz |
| 33872 | { 13284, 6, 1, 0, 432, 1, 0, 2114, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3a970046829ULL }, // Inst #13284 = VMINMAXPSZ256rrik |
| 33873 | { 13283, 4, 1, 0, 432, 1, 0, 927, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1a970046829ULL }, // Inst #13283 = VMINMAXPSZ256rri |
| 33874 | { 13282, 9, 1, 0, 431, 1, 0, 2105, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7a970046819ULL }, // Inst #13282 = VMINMAXPSZ256rmikz |
| 33875 | { 13281, 10, 1, 0, 431, 1, 0, 2095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3a970046819ULL }, // Inst #13281 = VMINMAXPSZ256rmik |
| 33876 | { 13280, 8, 1, 0, 431, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1a970046819ULL }, // Inst #13280 = VMINMAXPSZ256rmi |
| 33877 | { 13279, 9, 1, 0, 431, 1, 0, 2105, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77a970046819ULL }, // Inst #13279 = VMINMAXPSZ256rmbikz |
| 33878 | { 13278, 10, 1, 0, 431, 1, 0, 2095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73a970046819ULL }, // Inst #13278 = VMINMAXPSZ256rmbik |
| 33879 | { 13277, 8, 1, 0, 431, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71a970046819ULL }, // Inst #13277 = VMINMAXPSZ256rmbi |
| 33880 | { 13276, 5, 1, 0, 432, 1, 0, 2082, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6a970046829ULL }, // Inst #13276 = VMINMAXPSZ128rrikz |
| 33881 | { 13275, 6, 1, 0, 432, 1, 0, 2076, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2a970046829ULL }, // Inst #13275 = VMINMAXPSZ128rrik |
| 33882 | { 13274, 4, 1, 0, 432, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0a970046829ULL }, // Inst #13274 = VMINMAXPSZ128rri |
| 33883 | { 13273, 9, 1, 0, 431, 1, 0, 2067, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6a970046819ULL }, // Inst #13273 = VMINMAXPSZ128rmikz |
| 33884 | { 13272, 10, 1, 0, 431, 1, 0, 2057, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2a970046819ULL }, // Inst #13272 = VMINMAXPSZ128rmik |
| 33885 | { 13271, 8, 1, 0, 431, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0a970046819ULL }, // Inst #13271 = VMINMAXPSZ128rmi |
| 33886 | { 13270, 9, 1, 0, 431, 1, 0, 2067, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76a970046819ULL }, // Inst #13270 = VMINMAXPSZ128rmbikz |
| 33887 | { 13269, 10, 1, 0, 431, 1, 0, 2057, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72a970046819ULL }, // Inst #13269 = VMINMAXPSZ128rmbik |
| 33888 | { 13268, 8, 1, 0, 431, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70a970046819ULL }, // Inst #13268 = VMINMAXPSZ128rmbi |
| 33889 | { 13267, 5, 1, 0, 432, 1, 0, 3564, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeea968046029ULL }, // Inst #13267 = VMINMAXPHZrrikz |
| 33890 | { 13266, 6, 1, 0, 432, 1, 0, 3558, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaa968046029ULL }, // Inst #13266 = VMINMAXPHZrrik |
| 33891 | { 13265, 5, 1, 0, 432, 0, 0, 3564, X86ImpOpBase + 0, 0, 0x5ea968046029ULL }, // Inst #13265 = VMINMAXPHZrribkz |
| 33892 | { 13264, 6, 1, 0, 432, 0, 0, 3558, X86ImpOpBase + 0, 0, 0x5aa968046029ULL }, // Inst #13264 = VMINMAXPHZrribk |
| 33893 | { 13263, 4, 1, 0, 432, 0, 0, 931, X86ImpOpBase + 0, 0, 0x58a968046029ULL }, // Inst #13263 = VMINMAXPHZrrib |
| 33894 | { 13262, 4, 1, 0, 432, 1, 0, 931, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8a968046029ULL }, // Inst #13262 = VMINMAXPHZrri |
| 33895 | { 13261, 9, 1, 0, 431, 1, 0, 3549, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeea968046019ULL }, // Inst #13261 = VMINMAXPHZrmikz |
| 33896 | { 13260, 10, 1, 0, 431, 1, 0, 3539, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaa968046019ULL }, // Inst #13260 = VMINMAXPHZrmik |
| 33897 | { 13259, 8, 1, 0, 431, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8a968046019ULL }, // Inst #13259 = VMINMAXPHZrmi |
| 33898 | { 13258, 9, 1, 0, 431, 1, 0, 3549, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ea968046019ULL }, // Inst #13258 = VMINMAXPHZrmbikz |
| 33899 | { 13257, 10, 1, 0, 431, 1, 0, 3539, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aa968046019ULL }, // Inst #13257 = VMINMAXPHZrmbik |
| 33900 | { 13256, 8, 1, 0, 431, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58a968046019ULL }, // Inst #13256 = VMINMAXPHZrmbi |
| 33901 | { 13255, 5, 1, 0, 432, 1, 0, 3534, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7a968046029ULL }, // Inst #13255 = VMINMAXPHZ256rrikz |
| 33902 | { 13254, 6, 1, 0, 432, 1, 0, 3528, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3a968046029ULL }, // Inst #13254 = VMINMAXPHZ256rrik |
| 33903 | { 13253, 4, 1, 0, 432, 1, 0, 927, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1a968046029ULL }, // Inst #13253 = VMINMAXPHZ256rri |
| 33904 | { 13252, 9, 1, 0, 431, 1, 0, 3519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7a968046019ULL }, // Inst #13252 = VMINMAXPHZ256rmikz |
| 33905 | { 13251, 10, 1, 0, 431, 1, 0, 3509, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3a968046019ULL }, // Inst #13251 = VMINMAXPHZ256rmik |
| 33906 | { 13250, 8, 1, 0, 431, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1a968046019ULL }, // Inst #13250 = VMINMAXPHZ256rmi |
| 33907 | { 13249, 9, 1, 0, 431, 1, 0, 3519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57a968046019ULL }, // Inst #13249 = VMINMAXPHZ256rmbikz |
| 33908 | { 13248, 10, 1, 0, 431, 1, 0, 3509, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53a968046019ULL }, // Inst #13248 = VMINMAXPHZ256rmbik |
| 33909 | { 13247, 8, 1, 0, 431, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51a968046019ULL }, // Inst #13247 = VMINMAXPHZ256rmbi |
| 33910 | { 13246, 5, 1, 0, 432, 1, 0, 3504, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6a968046029ULL }, // Inst #13246 = VMINMAXPHZ128rrikz |
| 33911 | { 13245, 6, 1, 0, 432, 1, 0, 3498, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2a968046029ULL }, // Inst #13245 = VMINMAXPHZ128rrik |
| 33912 | { 13244, 4, 1, 0, 432, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0a968046029ULL }, // Inst #13244 = VMINMAXPHZ128rri |
| 33913 | { 13243, 9, 1, 0, 431, 1, 0, 3489, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6a968046019ULL }, // Inst #13243 = VMINMAXPHZ128rmikz |
| 33914 | { 13242, 10, 1, 0, 431, 1, 0, 3479, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2a968046019ULL }, // Inst #13242 = VMINMAXPHZ128rmik |
| 33915 | { 13241, 8, 1, 0, 431, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0a968046019ULL }, // Inst #13241 = VMINMAXPHZ128rmi |
| 33916 | { 13240, 9, 1, 0, 431, 1, 0, 3489, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56a968046019ULL }, // Inst #13240 = VMINMAXPHZ128rmbikz |
| 33917 | { 13239, 10, 1, 0, 431, 1, 0, 3479, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52a968046019ULL }, // Inst #13239 = VMINMAXPHZ128rmbik |
| 33918 | { 13238, 8, 1, 0, 431, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50a968046019ULL }, // Inst #13238 = VMINMAXPHZ128rmbi |
| 33919 | { 13237, 5, 1, 0, 432, 1, 0, 2248, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeea970066829ULL }, // Inst #13237 = VMINMAXPDZrrikz |
| 33920 | { 13236, 6, 1, 0, 432, 1, 0, 2242, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaa970066829ULL }, // Inst #13236 = VMINMAXPDZrrik |
| 33921 | { 13235, 5, 1, 0, 432, 0, 0, 2248, X86ImpOpBase + 0, 0, 0x9ea970066829ULL }, // Inst #13235 = VMINMAXPDZrribkz |
| 33922 | { 13234, 6, 1, 0, 432, 0, 0, 2242, X86ImpOpBase + 0, 0, 0x9aa970066829ULL }, // Inst #13234 = VMINMAXPDZrribk |
| 33923 | { 13233, 4, 1, 0, 432, 0, 0, 931, X86ImpOpBase + 0, 0, 0x98a970066829ULL }, // Inst #13233 = VMINMAXPDZrrib |
| 33924 | { 13232, 4, 1, 0, 432, 1, 0, 931, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8a970066829ULL }, // Inst #13232 = VMINMAXPDZrri |
| 33925 | { 13231, 9, 1, 0, 431, 1, 0, 2233, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeea970066819ULL }, // Inst #13231 = VMINMAXPDZrmikz |
| 33926 | { 13230, 10, 1, 0, 431, 1, 0, 2223, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaa970066819ULL }, // Inst #13230 = VMINMAXPDZrmik |
| 33927 | { 13229, 8, 1, 0, 431, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8a970066819ULL }, // Inst #13229 = VMINMAXPDZrmi |
| 33928 | { 13228, 9, 1, 0, 431, 1, 0, 2233, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ea970066819ULL }, // Inst #13228 = VMINMAXPDZrmbikz |
| 33929 | { 13227, 10, 1, 0, 431, 1, 0, 2223, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aa970066819ULL }, // Inst #13227 = VMINMAXPDZrmbik |
| 33930 | { 13226, 8, 1, 0, 431, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98a970066819ULL }, // Inst #13226 = VMINMAXPDZrmbi |
| 33931 | { 13225, 5, 1, 0, 432, 1, 0, 2218, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7a970066829ULL }, // Inst #13225 = VMINMAXPDZ256rrikz |
| 33932 | { 13224, 6, 1, 0, 432, 1, 0, 2212, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3a970066829ULL }, // Inst #13224 = VMINMAXPDZ256rrik |
| 33933 | { 13223, 4, 1, 0, 432, 1, 0, 927, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1a970066829ULL }, // Inst #13223 = VMINMAXPDZ256rri |
| 33934 | { 13222, 9, 1, 0, 431, 1, 0, 2203, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7a970066819ULL }, // Inst #13222 = VMINMAXPDZ256rmikz |
| 33935 | { 13221, 10, 1, 0, 431, 1, 0, 2193, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3a970066819ULL }, // Inst #13221 = VMINMAXPDZ256rmik |
| 33936 | { 13220, 8, 1, 0, 431, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1a970066819ULL }, // Inst #13220 = VMINMAXPDZ256rmi |
| 33937 | { 13219, 9, 1, 0, 431, 1, 0, 2203, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97a970066819ULL }, // Inst #13219 = VMINMAXPDZ256rmbikz |
| 33938 | { 13218, 10, 1, 0, 431, 1, 0, 2193, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93a970066819ULL }, // Inst #13218 = VMINMAXPDZ256rmbik |
| 33939 | { 13217, 8, 1, 0, 431, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91a970066819ULL }, // Inst #13217 = VMINMAXPDZ256rmbi |
| 33940 | { 13216, 5, 1, 0, 432, 1, 0, 2188, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6a970066829ULL }, // Inst #13216 = VMINMAXPDZ128rrikz |
| 33941 | { 13215, 6, 1, 0, 432, 1, 0, 2182, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2a970066829ULL }, // Inst #13215 = VMINMAXPDZ128rrik |
| 33942 | { 13214, 4, 1, 0, 432, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0a970066829ULL }, // Inst #13214 = VMINMAXPDZ128rri |
| 33943 | { 13213, 9, 1, 0, 431, 1, 0, 2173, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6a970066819ULL }, // Inst #13213 = VMINMAXPDZ128rmikz |
| 33944 | { 13212, 10, 1, 0, 431, 1, 0, 2163, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2a970066819ULL }, // Inst #13212 = VMINMAXPDZ128rmik |
| 33945 | { 13211, 8, 1, 0, 431, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0a970066819ULL }, // Inst #13211 = VMINMAXPDZ128rmi |
| 33946 | { 13210, 9, 1, 0, 431, 1, 0, 2173, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96a970066819ULL }, // Inst #13210 = VMINMAXPDZ128rmbikz |
| 33947 | { 13209, 10, 1, 0, 431, 1, 0, 2163, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92a970066819ULL }, // Inst #13209 = VMINMAXPDZ128rmbik |
| 33948 | { 13208, 8, 1, 0, 431, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90a970066819ULL }, // Inst #13208 = VMINMAXPDZ128rmbi |
| 33949 | { 13207, 5, 1, 0, 432, 1, 0, 3564, X86ImpOpBase + 78, 0, 0xeea978047829ULL }, // Inst #13207 = VMINMAXBF16Zrrikz |
| 33950 | { 13206, 6, 1, 0, 432, 1, 0, 3558, X86ImpOpBase + 78, 0, 0xeaa978047829ULL }, // Inst #13206 = VMINMAXBF16Zrrik |
| 33951 | { 13205, 4, 1, 0, 432, 1, 0, 931, X86ImpOpBase + 78, 0, 0xe8a978047829ULL }, // Inst #13205 = VMINMAXBF16Zrri |
| 33952 | { 13204, 9, 1, 0, 431, 1, 0, 3549, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeea978047819ULL }, // Inst #13204 = VMINMAXBF16Zrmikz |
| 33953 | { 13203, 10, 1, 0, 431, 1, 0, 3539, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeaa978047819ULL }, // Inst #13203 = VMINMAXBF16Zrmik |
| 33954 | { 13202, 8, 1, 0, 431, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe8a978047819ULL }, // Inst #13202 = VMINMAXBF16Zrmi |
| 33955 | { 13201, 9, 1, 0, 431, 1, 0, 3549, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x5ea978047819ULL }, // Inst #13201 = VMINMAXBF16Zrmbikz |
| 33956 | { 13200, 10, 1, 0, 431, 1, 0, 3539, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x5aa978047819ULL }, // Inst #13200 = VMINMAXBF16Zrmbik |
| 33957 | { 13199, 8, 1, 0, 431, 1, 0, 2125, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x58a978047819ULL }, // Inst #13199 = VMINMAXBF16Zrmbi |
| 33958 | { 13198, 5, 1, 0, 432, 1, 0, 3534, X86ImpOpBase + 78, 0, 0xc7a978047829ULL }, // Inst #13198 = VMINMAXBF16Z256rrikz |
| 33959 | { 13197, 6, 1, 0, 432, 1, 0, 3528, X86ImpOpBase + 78, 0, 0xc3a978047829ULL }, // Inst #13197 = VMINMAXBF16Z256rrik |
| 33960 | { 13196, 4, 1, 0, 432, 1, 0, 927, X86ImpOpBase + 78, 0, 0xc1a978047829ULL }, // Inst #13196 = VMINMAXBF16Z256rri |
| 33961 | { 13195, 9, 1, 0, 431, 1, 0, 3519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc7a978047819ULL }, // Inst #13195 = VMINMAXBF16Z256rmikz |
| 33962 | { 13194, 10, 1, 0, 431, 1, 0, 3509, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc3a978047819ULL }, // Inst #13194 = VMINMAXBF16Z256rmik |
| 33963 | { 13193, 8, 1, 0, 431, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc1a978047819ULL }, // Inst #13193 = VMINMAXBF16Z256rmi |
| 33964 | { 13192, 9, 1, 0, 431, 1, 0, 3519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x57a978047819ULL }, // Inst #13192 = VMINMAXBF16Z256rmbikz |
| 33965 | { 13191, 10, 1, 0, 431, 1, 0, 3509, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x53a978047819ULL }, // Inst #13191 = VMINMAXBF16Z256rmbik |
| 33966 | { 13190, 8, 1, 0, 431, 1, 0, 2087, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x51a978047819ULL }, // Inst #13190 = VMINMAXBF16Z256rmbi |
| 33967 | { 13189, 5, 1, 0, 432, 1, 0, 3504, X86ImpOpBase + 78, 0, 0xa6a978047829ULL }, // Inst #13189 = VMINMAXBF16Z128rrikz |
| 33968 | { 13188, 6, 1, 0, 432, 1, 0, 3498, X86ImpOpBase + 78, 0, 0xa2a978047829ULL }, // Inst #13188 = VMINMAXBF16Z128rrik |
| 33969 | { 13187, 4, 1, 0, 432, 1, 0, 919, X86ImpOpBase + 78, 0, 0xa0a978047829ULL }, // Inst #13187 = VMINMAXBF16Z128rri |
| 33970 | { 13186, 9, 1, 0, 431, 1, 0, 3489, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa6a978047819ULL }, // Inst #13186 = VMINMAXBF16Z128rmikz |
| 33971 | { 13185, 10, 1, 0, 431, 1, 0, 3479, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa2a978047819ULL }, // Inst #13185 = VMINMAXBF16Z128rmik |
| 33972 | { 13184, 8, 1, 0, 431, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa0a978047819ULL }, // Inst #13184 = VMINMAXBF16Z128rmi |
| 33973 | { 13183, 9, 1, 0, 431, 1, 0, 3489, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x56a978047819ULL }, // Inst #13183 = VMINMAXBF16Z128rmbikz |
| 33974 | { 13182, 10, 1, 0, 431, 1, 0, 3479, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x52a978047819ULL }, // Inst #13182 = VMINMAXBF16Z128rmbik |
| 33975 | { 13181, 8, 1, 0, 431, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x50a978047819ULL }, // Inst #13181 = VMINMAXBF16Z128rmbi |
| 33976 | { 13180, 3, 1, 0, 83, 1, 0, 2046, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaea8003029ULL }, // Inst #13180 = VMINCSSrr |
| 33977 | { 13179, 7, 1, 0, 82, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaea8003019ULL }, // Inst #13179 = VMINCSSrm |
| 33978 | { 13178, 3, 1, 0, 83, 1, 0, 2036, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60aee8003029ULL }, // Inst #13178 = VMINCSSZrr |
| 33979 | { 13177, 7, 1, 0, 82, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60aee8003019ULL }, // Inst #13177 = VMINCSSZrm |
| 33980 | { 13176, 3, 1, 0, 1788, 1, 0, 2026, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40aee8013029ULL }, // Inst #13176 = VMINCSHZrr |
| 33981 | { 13175, 7, 1, 0, 1766, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40aee8013019ULL }, // Inst #13175 = VMINCSHZrm |
| 33982 | { 13174, 3, 1, 0, 81, 1, 0, 2016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaeb0003829ULL }, // Inst #13174 = VMINCSDrr |
| 33983 | { 13173, 7, 1, 0, 80, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb0003819ULL }, // Inst #13173 = VMINCSDrm |
| 33984 | { 13172, 3, 1, 0, 83, 1, 0, 1982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80aef0023829ULL }, // Inst #13172 = VMINCSDZrr |
| 33985 | { 13171, 7, 1, 0, 82, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aef0023819ULL }, // Inst #13171 = VMINCSDZrm |
| 33986 | { 13170, 3, 1, 0, 79, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaea8002029ULL }, // Inst #13170 = VMINCPSrr |
| 33987 | { 13169, 7, 1, 0, 78, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaea8002019ULL }, // Inst #13169 = VMINCPSrm |
| 33988 | { 13168, 4, 1, 0, 1862, 1, 0, 1963, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeaee8002029ULL }, // Inst #13168 = VMINCPSZrrkz |
| 33989 | { 13167, 5, 1, 0, 1862, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaaee8002029ULL }, // Inst #13167 = VMINCPSZrrk |
| 33990 | { 13166, 3, 1, 0, 1862, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8aee8002029ULL }, // Inst #13166 = VMINCPSZrr |
| 33991 | { 13165, 8, 1, 0, 370, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8002019ULL }, // Inst #13165 = VMINCPSZrmkz |
| 33992 | { 13164, 9, 1, 0, 370, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8002019ULL }, // Inst #13164 = VMINCPSZrmk |
| 33993 | { 13163, 8, 1, 0, 370, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eaee8002019ULL }, // Inst #13163 = VMINCPSZrmbkz |
| 33994 | { 13162, 9, 1, 0, 370, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aaee8002019ULL }, // Inst #13162 = VMINCPSZrmbk |
| 33995 | { 13161, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78aee8002019ULL }, // Inst #13161 = VMINCPSZrmb |
| 33996 | { 13160, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8002019ULL }, // Inst #13160 = VMINCPSZrm |
| 33997 | { 13159, 4, 1, 0, 369, 1, 0, 1935, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7aee8002029ULL }, // Inst #13159 = VMINCPSZ256rrkz |
| 33998 | { 13158, 5, 1, 0, 369, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3aee8002029ULL }, // Inst #13158 = VMINCPSZ256rrk |
| 33999 | { 13157, 3, 1, 0, 369, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1aee8002029ULL }, // Inst #13157 = VMINCPSZ256rr |
| 34000 | { 13156, 8, 1, 0, 368, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8002019ULL }, // Inst #13156 = VMINCPSZ256rmkz |
| 34001 | { 13155, 9, 1, 0, 368, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8002019ULL }, // Inst #13155 = VMINCPSZ256rmk |
| 34002 | { 13154, 8, 1, 0, 368, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77aee8002019ULL }, // Inst #13154 = VMINCPSZ256rmbkz |
| 34003 | { 13153, 9, 1, 0, 368, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73aee8002019ULL }, // Inst #13153 = VMINCPSZ256rmbk |
| 34004 | { 13152, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71aee8002019ULL }, // Inst #13152 = VMINCPSZ256rmb |
| 34005 | { 13151, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8002019ULL }, // Inst #13151 = VMINCPSZ256rm |
| 34006 | { 13150, 4, 1, 0, 79, 1, 0, 1909, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6aee8002029ULL }, // Inst #13150 = VMINCPSZ128rrkz |
| 34007 | { 13149, 5, 1, 0, 79, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2aee8002029ULL }, // Inst #13149 = VMINCPSZ128rrk |
| 34008 | { 13148, 3, 1, 0, 79, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0aee8002029ULL }, // Inst #13148 = VMINCPSZ128rr |
| 34009 | { 13147, 8, 1, 0, 78, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8002019ULL }, // Inst #13147 = VMINCPSZ128rmkz |
| 34010 | { 13146, 9, 1, 0, 78, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8002019ULL }, // Inst #13146 = VMINCPSZ128rmk |
| 34011 | { 13145, 8, 1, 0, 78, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76aee8002019ULL }, // Inst #13145 = VMINCPSZ128rmbkz |
| 34012 | { 13144, 9, 1, 0, 78, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72aee8002019ULL }, // Inst #13144 = VMINCPSZ128rmbk |
| 34013 | { 13143, 7, 1, 0, 78, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70aee8002019ULL }, // Inst #13143 = VMINCPSZ128rmb |
| 34014 | { 13142, 7, 1, 0, 78, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8002019ULL }, // Inst #13142 = VMINCPSZ128rm |
| 34015 | { 13141, 3, 1, 0, 369, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1aea8002029ULL }, // Inst #13141 = VMINCPSYrr |
| 34016 | { 13140, 7, 1, 0, 368, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aea8002019ULL }, // Inst #13140 = VMINCPSYrm |
| 34017 | { 13139, 4, 1, 0, 1930, 1, 0, 1759, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeaee8012029ULL }, // Inst #13139 = VMINCPHZrrkz |
| 34018 | { 13138, 5, 1, 0, 1930, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaaee8012029ULL }, // Inst #13138 = VMINCPHZrrk |
| 34019 | { 13137, 3, 1, 0, 1923, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8aee8012029ULL }, // Inst #13137 = VMINCPHZrr |
| 34020 | { 13136, 8, 1, 0, 370, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8012019ULL }, // Inst #13136 = VMINCPHZrmkz |
| 34021 | { 13135, 9, 1, 0, 370, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8012019ULL }, // Inst #13135 = VMINCPHZrmk |
| 34022 | { 13134, 8, 1, 0, 370, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eaee8012019ULL }, // Inst #13134 = VMINCPHZrmbkz |
| 34023 | { 13133, 9, 1, 0, 370, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aaee8012019ULL }, // Inst #13133 = VMINCPHZrmbk |
| 34024 | { 13132, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58aee8012019ULL }, // Inst #13132 = VMINCPHZrmb |
| 34025 | { 13131, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8012019ULL }, // Inst #13131 = VMINCPHZrm |
| 34026 | { 13130, 4, 1, 0, 1913, 1, 0, 1723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7aee8012029ULL }, // Inst #13130 = VMINCPHZ256rrkz |
| 34027 | { 13129, 5, 1, 0, 1913, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3aee8012029ULL }, // Inst #13129 = VMINCPHZ256rrk |
| 34028 | { 13128, 3, 1, 0, 1787, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1aee8012029ULL }, // Inst #13128 = VMINCPHZ256rr |
| 34029 | { 13127, 8, 1, 0, 368, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8012019ULL }, // Inst #13127 = VMINCPHZ256rmkz |
| 34030 | { 13126, 9, 1, 0, 368, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8012019ULL }, // Inst #13126 = VMINCPHZ256rmk |
| 34031 | { 13125, 8, 1, 0, 368, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57aee8012019ULL }, // Inst #13125 = VMINCPHZ256rmbkz |
| 34032 | { 13124, 9, 1, 0, 368, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53aee8012019ULL }, // Inst #13124 = VMINCPHZ256rmbk |
| 34033 | { 13123, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51aee8012019ULL }, // Inst #13123 = VMINCPHZ256rmb |
| 34034 | { 13122, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8012019ULL }, // Inst #13122 = VMINCPHZ256rm |
| 34035 | { 13121, 4, 1, 0, 1912, 1, 0, 1687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6aee8012029ULL }, // Inst #13121 = VMINCPHZ128rrkz |
| 34036 | { 13120, 5, 1, 0, 1912, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2aee8012029ULL }, // Inst #13120 = VMINCPHZ128rrk |
| 34037 | { 13119, 3, 1, 0, 1786, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0aee8012029ULL }, // Inst #13119 = VMINCPHZ128rr |
| 34038 | { 13118, 8, 1, 0, 1760, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8012019ULL }, // Inst #13118 = VMINCPHZ128rmkz |
| 34039 | { 13117, 9, 1, 0, 1760, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8012019ULL }, // Inst #13117 = VMINCPHZ128rmk |
| 34040 | { 13116, 8, 1, 0, 1760, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56aee8012019ULL }, // Inst #13116 = VMINCPHZ128rmbkz |
| 34041 | { 13115, 9, 1, 0, 1760, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52aee8012019ULL }, // Inst #13115 = VMINCPHZ128rmbk |
| 34042 | { 13114, 7, 1, 0, 1760, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50aee8012019ULL }, // Inst #13114 = VMINCPHZ128rmb |
| 34043 | { 13113, 7, 1, 0, 1760, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8012019ULL }, // Inst #13113 = VMINCPHZ128rm |
| 34044 | { 13112, 3, 1, 0, 77, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaeb0002829ULL }, // Inst #13112 = VMINCPDrr |
| 34045 | { 13111, 7, 1, 0, 76, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb0002819ULL }, // Inst #13111 = VMINCPDrm |
| 34046 | { 13110, 4, 1, 0, 1118, 1, 0, 1862, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeaef0022829ULL }, // Inst #13110 = VMINCPDZrrkz |
| 34047 | { 13109, 5, 1, 0, 1118, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaaef0022829ULL }, // Inst #13109 = VMINCPDZrrk |
| 34048 | { 13108, 3, 1, 0, 1118, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8aef0022829ULL }, // Inst #13108 = VMINCPDZrr |
| 34049 | { 13107, 8, 1, 0, 468, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaef0022819ULL }, // Inst #13107 = VMINCPDZrmkz |
| 34050 | { 13106, 9, 1, 0, 468, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaef0022819ULL }, // Inst #13106 = VMINCPDZrmk |
| 34051 | { 13105, 8, 1, 0, 468, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaef0022819ULL }, // Inst #13105 = VMINCPDZrmbkz |
| 34052 | { 13104, 9, 1, 0, 468, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaef0022819ULL }, // Inst #13104 = VMINCPDZrmbk |
| 34053 | { 13103, 7, 1, 0, 468, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98aef0022819ULL }, // Inst #13103 = VMINCPDZrmb |
| 34054 | { 13102, 7, 1, 0, 468, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aef0022819ULL }, // Inst #13102 = VMINCPDZrm |
| 34055 | { 13101, 4, 1, 0, 1117, 1, 0, 1821, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7aef0022829ULL }, // Inst #13101 = VMINCPDZ256rrkz |
| 34056 | { 13100, 5, 1, 0, 1117, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3aef0022829ULL }, // Inst #13100 = VMINCPDZ256rrk |
| 34057 | { 13099, 3, 1, 0, 1117, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1aef0022829ULL }, // Inst #13099 = VMINCPDZ256rr |
| 34058 | { 13098, 8, 1, 0, 372, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aef0022819ULL }, // Inst #13098 = VMINCPDZ256rmkz |
| 34059 | { 13097, 9, 1, 0, 372, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aef0022819ULL }, // Inst #13097 = VMINCPDZ256rmk |
| 34060 | { 13096, 8, 1, 0, 372, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97aef0022819ULL }, // Inst #13096 = VMINCPDZ256rmbkz |
| 34061 | { 13095, 9, 1, 0, 372, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93aef0022819ULL }, // Inst #13095 = VMINCPDZ256rmbk |
| 34062 | { 13094, 7, 1, 0, 372, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91aef0022819ULL }, // Inst #13094 = VMINCPDZ256rmb |
| 34063 | { 13093, 7, 1, 0, 372, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aef0022819ULL }, // Inst #13093 = VMINCPDZ256rm |
| 34064 | { 13092, 4, 1, 0, 1110, 1, 0, 1795, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6aef0022829ULL }, // Inst #13092 = VMINCPDZ128rrkz |
| 34065 | { 13091, 5, 1, 0, 1110, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2aef0022829ULL }, // Inst #13091 = VMINCPDZ128rrk |
| 34066 | { 13090, 3, 1, 0, 1110, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0aef0022829ULL }, // Inst #13090 = VMINCPDZ128rr |
| 34067 | { 13089, 8, 1, 0, 76, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aef0022819ULL }, // Inst #13089 = VMINCPDZ128rmkz |
| 34068 | { 13088, 9, 1, 0, 76, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aef0022819ULL }, // Inst #13088 = VMINCPDZ128rmk |
| 34069 | { 13087, 8, 1, 0, 76, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96aef0022819ULL }, // Inst #13087 = VMINCPDZ128rmbkz |
| 34070 | { 13086, 9, 1, 0, 76, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92aef0022819ULL }, // Inst #13086 = VMINCPDZ128rmbk |
| 34071 | { 13085, 7, 1, 0, 76, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90aef0022819ULL }, // Inst #13085 = VMINCPDZ128rmb |
| 34072 | { 13084, 7, 1, 0, 76, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aef0022819ULL }, // Inst #13084 = VMINCPDZ128rm |
| 34073 | { 13083, 3, 1, 0, 373, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1aeb0002829ULL }, // Inst #13083 = VMINCPDYrr |
| 34074 | { 13082, 7, 1, 0, 372, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aeb0002819ULL }, // Inst #13082 = VMINCPDYrm |
| 34075 | { 13081, 4, 1, 0, 371, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeeaee8012829ULL }, // Inst #13081 = VMINBF16Zrrkz |
| 34076 | { 13080, 5, 1, 0, 371, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeaaee8012829ULL }, // Inst #13080 = VMINBF16Zrrk |
| 34077 | { 13079, 3, 1, 0, 371, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8aee8012829ULL }, // Inst #13079 = VMINBF16Zrr |
| 34078 | { 13078, 8, 1, 0, 370, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeaee8012819ULL }, // Inst #13078 = VMINBF16Zrmkz |
| 34079 | { 13077, 9, 1, 0, 370, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaaee8012819ULL }, // Inst #13077 = VMINBF16Zrmk |
| 34080 | { 13076, 8, 1, 0, 370, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5eaee8012819ULL }, // Inst #13076 = VMINBF16Zrmbkz |
| 34081 | { 13075, 9, 1, 0, 370, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5aaee8012819ULL }, // Inst #13075 = VMINBF16Zrmbk |
| 34082 | { 13074, 7, 1, 0, 370, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58aee8012819ULL }, // Inst #13074 = VMINBF16Zrmb |
| 34083 | { 13073, 7, 1, 0, 370, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8aee8012819ULL }, // Inst #13073 = VMINBF16Zrm |
| 34084 | { 13072, 4, 1, 0, 369, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7aee8012829ULL }, // Inst #13072 = VMINBF16Z256rrkz |
| 34085 | { 13071, 5, 1, 0, 369, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3aee8012829ULL }, // Inst #13071 = VMINBF16Z256rrk |
| 34086 | { 13070, 3, 1, 0, 369, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1aee8012829ULL }, // Inst #13070 = VMINBF16Z256rr |
| 34087 | { 13069, 8, 1, 0, 368, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7aee8012819ULL }, // Inst #13069 = VMINBF16Z256rmkz |
| 34088 | { 13068, 9, 1, 0, 368, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3aee8012819ULL }, // Inst #13068 = VMINBF16Z256rmk |
| 34089 | { 13067, 8, 1, 0, 368, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x57aee8012819ULL }, // Inst #13067 = VMINBF16Z256rmbkz |
| 34090 | { 13066, 9, 1, 0, 368, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53aee8012819ULL }, // Inst #13066 = VMINBF16Z256rmbk |
| 34091 | { 13065, 7, 1, 0, 368, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51aee8012819ULL }, // Inst #13065 = VMINBF16Z256rmb |
| 34092 | { 13064, 7, 1, 0, 368, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1aee8012819ULL }, // Inst #13064 = VMINBF16Z256rm |
| 34093 | { 13063, 4, 1, 0, 79, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6aee8012829ULL }, // Inst #13063 = VMINBF16Z128rrkz |
| 34094 | { 13062, 5, 1, 0, 79, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2aee8012829ULL }, // Inst #13062 = VMINBF16Z128rrk |
| 34095 | { 13061, 3, 1, 0, 79, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0aee8012829ULL }, // Inst #13061 = VMINBF16Z128rr |
| 34096 | { 13060, 8, 1, 0, 78, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6aee8012819ULL }, // Inst #13060 = VMINBF16Z128rmkz |
| 34097 | { 13059, 9, 1, 0, 78, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2aee8012819ULL }, // Inst #13059 = VMINBF16Z128rmk |
| 34098 | { 13058, 8, 1, 0, 78, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x56aee8012819ULL }, // Inst #13058 = VMINBF16Z128rmbkz |
| 34099 | { 13057, 9, 1, 0, 78, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52aee8012819ULL }, // Inst #13057 = VMINBF16Z128rmbk |
| 34100 | { 13056, 7, 1, 0, 78, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50aee8012819ULL }, // Inst #13056 = VMINBF16Z128rmb |
| 34101 | { 13055, 7, 1, 0, 78, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0aee8012819ULL }, // Inst #13055 = VMINBF16Z128rm |
| 34102 | { 13054, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002054ULL }, // Inst #13054 = VMFUNC |
| 34103 | { 13053, 5, 0, 0, 889, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002826ULL }, // Inst #13053 = VMCLEARm |
| 34104 | { 13052, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002041ULL }, // Inst #13052 = VMCALL |
| 34105 | { 13051, 3, 1, 0, 1113, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xafa8003029ULL }, // Inst #13051 = VMAXSSrr_Int |
| 34106 | { 13050, 3, 1, 0, 83, 1, 0, 2046, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xafa8003029ULL }, // Inst #13050 = VMAXSSrr |
| 34107 | { 13049, 7, 1, 0, 82, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafa8003019ULL }, // Inst #13049 = VMAXSSrm_Int |
| 34108 | { 13048, 7, 1, 0, 82, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafa8003019ULL }, // Inst #13048 = VMAXSSrm |
| 34109 | { 13047, 4, 1, 0, 1113, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66afe8003029ULL }, // Inst #13047 = VMAXSSZrrkz_Int |
| 34110 | { 13046, 5, 1, 0, 1113, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62afe8003029ULL }, // Inst #13046 = VMAXSSZrrk_Int |
| 34111 | { 13045, 4, 1, 0, 83, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x76afe8003029ULL }, // Inst #13045 = VMAXSSZrrbkz_Int |
| 34112 | { 13044, 5, 1, 0, 83, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x72afe8003029ULL }, // Inst #13044 = VMAXSSZrrbk_Int |
| 34113 | { 13043, 3, 1, 0, 83, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x70afe8003029ULL }, // Inst #13043 = VMAXSSZrrb_Int |
| 34114 | { 13042, 3, 1, 0, 1113, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60afe8003029ULL }, // Inst #13042 = VMAXSSZrr_Int |
| 34115 | { 13041, 3, 1, 0, 83, 1, 0, 2036, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60afe8003029ULL }, // Inst #13041 = VMAXSSZrr |
| 34116 | { 13040, 8, 1, 0, 82, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66afe8003019ULL }, // Inst #13040 = VMAXSSZrmkz_Int |
| 34117 | { 13039, 9, 1, 0, 82, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62afe8003019ULL }, // Inst #13039 = VMAXSSZrmk_Int |
| 34118 | { 13038, 7, 1, 0, 82, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60afe8003019ULL }, // Inst #13038 = VMAXSSZrm_Int |
| 34119 | { 13037, 7, 1, 0, 82, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60afe8003019ULL }, // Inst #13037 = VMAXSSZrm |
| 34120 | { 13036, 4, 1, 0, 1916, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x46afe8013029ULL }, // Inst #13036 = VMAXSHZrrkz_Int |
| 34121 | { 13035, 5, 1, 0, 1916, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x42afe8013029ULL }, // Inst #13035 = VMAXSHZrrk_Int |
| 34122 | { 13034, 4, 1, 0, 1916, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x56afe8013029ULL }, // Inst #13034 = VMAXSHZrrbkz_Int |
| 34123 | { 13033, 5, 1, 0, 1916, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x52afe8013029ULL }, // Inst #13033 = VMAXSHZrrbk_Int |
| 34124 | { 13032, 3, 1, 0, 1788, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x50afe8013029ULL }, // Inst #13032 = VMAXSHZrrb_Int |
| 34125 | { 13031, 3, 1, 0, 1788, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40afe8013029ULL }, // Inst #13031 = VMAXSHZrr_Int |
| 34126 | { 13030, 3, 1, 0, 1788, 1, 0, 2026, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40afe8013029ULL }, // Inst #13030 = VMAXSHZrr |
| 34127 | { 13029, 8, 1, 0, 1766, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46afe8013019ULL }, // Inst #13029 = VMAXSHZrmkz_Int |
| 34128 | { 13028, 9, 1, 0, 1766, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42afe8013019ULL }, // Inst #13028 = VMAXSHZrmk_Int |
| 34129 | { 13027, 7, 1, 0, 1766, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40afe8013019ULL }, // Inst #13027 = VMAXSHZrm_Int |
| 34130 | { 13026, 7, 1, 0, 1766, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40afe8013019ULL }, // Inst #13026 = VMAXSHZrm |
| 34131 | { 13025, 3, 1, 0, 1112, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xafb0003829ULL }, // Inst #13025 = VMAXSDrr_Int |
| 34132 | { 13024, 3, 1, 0, 81, 1, 0, 2016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xafb0003829ULL }, // Inst #13024 = VMAXSDrr |
| 34133 | { 13023, 7, 1, 0, 80, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb0003819ULL }, // Inst #13023 = VMAXSDrm_Int |
| 34134 | { 13022, 7, 1, 0, 80, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb0003819ULL }, // Inst #13022 = VMAXSDrm |
| 34135 | { 13021, 4, 1, 0, 1112, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86aff0023829ULL }, // Inst #13021 = VMAXSDZrrkz_Int |
| 34136 | { 13020, 5, 1, 0, 1112, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82aff0023829ULL }, // Inst #13020 = VMAXSDZrrk_Int |
| 34137 | { 13019, 4, 1, 0, 81, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x96aff0023829ULL }, // Inst #13019 = VMAXSDZrrbkz_Int |
| 34138 | { 13018, 5, 1, 0, 81, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x92aff0023829ULL }, // Inst #13018 = VMAXSDZrrbk_Int |
| 34139 | { 13017, 3, 1, 0, 81, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x90aff0023829ULL }, // Inst #13017 = VMAXSDZrrb_Int |
| 34140 | { 13016, 3, 1, 0, 1112, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80aff0023829ULL }, // Inst #13016 = VMAXSDZrr_Int |
| 34141 | { 13015, 3, 1, 0, 81, 1, 0, 1982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80aff0023829ULL }, // Inst #13015 = VMAXSDZrr |
| 34142 | { 13014, 8, 1, 0, 80, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86aff0023819ULL }, // Inst #13014 = VMAXSDZrmkz_Int |
| 34143 | { 13013, 9, 1, 0, 80, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82aff0023819ULL }, // Inst #13013 = VMAXSDZrmk_Int |
| 34144 | { 13012, 7, 1, 0, 80, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aff0023819ULL }, // Inst #13012 = VMAXSDZrm_Int |
| 34145 | { 13011, 7, 1, 0, 80, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aff0023819ULL }, // Inst #13011 = VMAXSDZrm |
| 34146 | { 13010, 3, 1, 0, 79, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xafa8002029ULL }, // Inst #13010 = VMAXPSrr |
| 34147 | { 13009, 7, 1, 0, 78, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafa8002019ULL }, // Inst #13009 = VMAXPSrm |
| 34148 | { 13008, 4, 1, 0, 1862, 1, 0, 1963, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8002029ULL }, // Inst #13008 = VMAXPSZrrkz |
| 34149 | { 13007, 5, 1, 0, 1862, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8002029ULL }, // Inst #13007 = VMAXPSZrrk |
| 34150 | { 13006, 4, 1, 0, 1862, 1, 0, 1963, X86ImpOpBase + 78, 0, 0x7eafe8002029ULL }, // Inst #13006 = VMAXPSZrrbkz |
| 34151 | { 13005, 5, 1, 0, 1862, 1, 0, 1958, X86ImpOpBase + 78, 0, 0x7aafe8002029ULL }, // Inst #13005 = VMAXPSZrrbk |
| 34152 | { 13004, 3, 1, 0, 1862, 1, 0, 1751, X86ImpOpBase + 78, 0, 0x78afe8002029ULL }, // Inst #13004 = VMAXPSZrrb |
| 34153 | { 13003, 3, 1, 0, 1862, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8002029ULL }, // Inst #13003 = VMAXPSZrr |
| 34154 | { 13002, 8, 1, 0, 370, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8002019ULL }, // Inst #13002 = VMAXPSZrmkz |
| 34155 | { 13001, 9, 1, 0, 370, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8002019ULL }, // Inst #13001 = VMAXPSZrmk |
| 34156 | { 13000, 8, 1, 0, 370, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eafe8002019ULL }, // Inst #13000 = VMAXPSZrmbkz |
| 34157 | { 12999, 9, 1, 0, 370, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aafe8002019ULL }, // Inst #12999 = VMAXPSZrmbk |
| 34158 | { 12998, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78afe8002019ULL }, // Inst #12998 = VMAXPSZrmb |
| 34159 | { 12997, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8002019ULL }, // Inst #12997 = VMAXPSZrm |
| 34160 | { 12996, 4, 1, 0, 369, 1, 0, 1935, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8002029ULL }, // Inst #12996 = VMAXPSZ256rrkz |
| 34161 | { 12995, 5, 1, 0, 369, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8002029ULL }, // Inst #12995 = VMAXPSZ256rrk |
| 34162 | { 12994, 3, 1, 0, 369, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8002029ULL }, // Inst #12994 = VMAXPSZ256rr |
| 34163 | { 12993, 8, 1, 0, 368, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8002019ULL }, // Inst #12993 = VMAXPSZ256rmkz |
| 34164 | { 12992, 9, 1, 0, 368, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8002019ULL }, // Inst #12992 = VMAXPSZ256rmk |
| 34165 | { 12991, 8, 1, 0, 368, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77afe8002019ULL }, // Inst #12991 = VMAXPSZ256rmbkz |
| 34166 | { 12990, 9, 1, 0, 368, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73afe8002019ULL }, // Inst #12990 = VMAXPSZ256rmbk |
| 34167 | { 12989, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71afe8002019ULL }, // Inst #12989 = VMAXPSZ256rmb |
| 34168 | { 12988, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8002019ULL }, // Inst #12988 = VMAXPSZ256rm |
| 34169 | { 12987, 4, 1, 0, 79, 1, 0, 1909, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8002029ULL }, // Inst #12987 = VMAXPSZ128rrkz |
| 34170 | { 12986, 5, 1, 0, 79, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8002029ULL }, // Inst #12986 = VMAXPSZ128rrk |
| 34171 | { 12985, 3, 1, 0, 79, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8002029ULL }, // Inst #12985 = VMAXPSZ128rr |
| 34172 | { 12984, 8, 1, 0, 78, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8002019ULL }, // Inst #12984 = VMAXPSZ128rmkz |
| 34173 | { 12983, 9, 1, 0, 78, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8002019ULL }, // Inst #12983 = VMAXPSZ128rmk |
| 34174 | { 12982, 8, 1, 0, 78, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76afe8002019ULL }, // Inst #12982 = VMAXPSZ128rmbkz |
| 34175 | { 12981, 9, 1, 0, 78, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72afe8002019ULL }, // Inst #12981 = VMAXPSZ128rmbk |
| 34176 | { 12980, 7, 1, 0, 78, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70afe8002019ULL }, // Inst #12980 = VMAXPSZ128rmb |
| 34177 | { 12979, 7, 1, 0, 78, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8002019ULL }, // Inst #12979 = VMAXPSZ128rm |
| 34178 | { 12978, 3, 1, 0, 369, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1afa8002029ULL }, // Inst #12978 = VMAXPSYrr |
| 34179 | { 12977, 7, 1, 0, 368, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afa8002019ULL }, // Inst #12977 = VMAXPSYrm |
| 34180 | { 12976, 4, 1, 0, 1930, 1, 0, 1759, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8012029ULL }, // Inst #12976 = VMAXPHZrrkz |
| 34181 | { 12975, 5, 1, 0, 1930, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8012029ULL }, // Inst #12975 = VMAXPHZrrk |
| 34182 | { 12974, 4, 1, 0, 1930, 1, 0, 1759, X86ImpOpBase + 78, 0, 0x5eafe8012029ULL }, // Inst #12974 = VMAXPHZrrbkz |
| 34183 | { 12973, 5, 1, 0, 1930, 1, 0, 1754, X86ImpOpBase + 78, 0, 0x5aafe8012029ULL }, // Inst #12973 = VMAXPHZrrbk |
| 34184 | { 12972, 3, 1, 0, 1923, 1, 0, 1751, X86ImpOpBase + 78, 0, 0x58afe8012029ULL }, // Inst #12972 = VMAXPHZrrb |
| 34185 | { 12971, 3, 1, 0, 1923, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8012029ULL }, // Inst #12971 = VMAXPHZrr |
| 34186 | { 12970, 8, 1, 0, 370, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8012019ULL }, // Inst #12970 = VMAXPHZrmkz |
| 34187 | { 12969, 9, 1, 0, 370, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8012019ULL }, // Inst #12969 = VMAXPHZrmk |
| 34188 | { 12968, 8, 1, 0, 370, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eafe8012019ULL }, // Inst #12968 = VMAXPHZrmbkz |
| 34189 | { 12967, 9, 1, 0, 370, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aafe8012019ULL }, // Inst #12967 = VMAXPHZrmbk |
| 34190 | { 12966, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58afe8012019ULL }, // Inst #12966 = VMAXPHZrmb |
| 34191 | { 12965, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8012019ULL }, // Inst #12965 = VMAXPHZrm |
| 34192 | { 12964, 4, 1, 0, 1913, 1, 0, 1723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8012029ULL }, // Inst #12964 = VMAXPHZ256rrkz |
| 34193 | { 12963, 5, 1, 0, 1913, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8012029ULL }, // Inst #12963 = VMAXPHZ256rrk |
| 34194 | { 12962, 3, 1, 0, 1787, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8012029ULL }, // Inst #12962 = VMAXPHZ256rr |
| 34195 | { 12961, 8, 1, 0, 368, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8012019ULL }, // Inst #12961 = VMAXPHZ256rmkz |
| 34196 | { 12960, 9, 1, 0, 368, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8012019ULL }, // Inst #12960 = VMAXPHZ256rmk |
| 34197 | { 12959, 8, 1, 0, 368, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57afe8012019ULL }, // Inst #12959 = VMAXPHZ256rmbkz |
| 34198 | { 12958, 9, 1, 0, 368, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53afe8012019ULL }, // Inst #12958 = VMAXPHZ256rmbk |
| 34199 | { 12957, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51afe8012019ULL }, // Inst #12957 = VMAXPHZ256rmb |
| 34200 | { 12956, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8012019ULL }, // Inst #12956 = VMAXPHZ256rm |
| 34201 | { 12955, 4, 1, 0, 1912, 1, 0, 1687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8012029ULL }, // Inst #12955 = VMAXPHZ128rrkz |
| 34202 | { 12954, 5, 1, 0, 1912, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8012029ULL }, // Inst #12954 = VMAXPHZ128rrk |
| 34203 | { 12953, 3, 1, 0, 1786, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8012029ULL }, // Inst #12953 = VMAXPHZ128rr |
| 34204 | { 12952, 8, 1, 0, 1760, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8012019ULL }, // Inst #12952 = VMAXPHZ128rmkz |
| 34205 | { 12951, 9, 1, 0, 1760, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8012019ULL }, // Inst #12951 = VMAXPHZ128rmk |
| 34206 | { 12950, 8, 1, 0, 1760, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56afe8012019ULL }, // Inst #12950 = VMAXPHZ128rmbkz |
| 34207 | { 12949, 9, 1, 0, 1760, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52afe8012019ULL }, // Inst #12949 = VMAXPHZ128rmbk |
| 34208 | { 12948, 7, 1, 0, 1760, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50afe8012019ULL }, // Inst #12948 = VMAXPHZ128rmb |
| 34209 | { 12947, 7, 1, 0, 1760, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8012019ULL }, // Inst #12947 = VMAXPHZ128rm |
| 34210 | { 12946, 3, 1, 0, 77, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xafb0002829ULL }, // Inst #12946 = VMAXPDrr |
| 34211 | { 12945, 7, 1, 0, 76, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb0002819ULL }, // Inst #12945 = VMAXPDrm |
| 34212 | { 12944, 4, 1, 0, 1118, 1, 0, 1862, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaff0022829ULL }, // Inst #12944 = VMAXPDZrrkz |
| 34213 | { 12943, 5, 1, 0, 1118, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaff0022829ULL }, // Inst #12943 = VMAXPDZrrk |
| 34214 | { 12942, 4, 1, 0, 1118, 1, 0, 1862, X86ImpOpBase + 78, 0, 0x9eaff0022829ULL }, // Inst #12942 = VMAXPDZrrbkz |
| 34215 | { 12941, 5, 1, 0, 1118, 1, 0, 1857, X86ImpOpBase + 78, 0, 0x9aaff0022829ULL }, // Inst #12941 = VMAXPDZrrbk |
| 34216 | { 12940, 3, 1, 0, 1118, 1, 0, 1751, X86ImpOpBase + 78, 0, 0x98aff0022829ULL }, // Inst #12940 = VMAXPDZrrb |
| 34217 | { 12939, 3, 1, 0, 1118, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aff0022829ULL }, // Inst #12939 = VMAXPDZrr |
| 34218 | { 12938, 8, 1, 0, 468, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaff0022819ULL }, // Inst #12938 = VMAXPDZrmkz |
| 34219 | { 12937, 9, 1, 0, 468, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaff0022819ULL }, // Inst #12937 = VMAXPDZrmk |
| 34220 | { 12936, 8, 1, 0, 468, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaff0022819ULL }, // Inst #12936 = VMAXPDZrmbkz |
| 34221 | { 12935, 9, 1, 0, 468, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaff0022819ULL }, // Inst #12935 = VMAXPDZrmbk |
| 34222 | { 12934, 7, 1, 0, 468, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98aff0022819ULL }, // Inst #12934 = VMAXPDZrmb |
| 34223 | { 12933, 7, 1, 0, 468, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aff0022819ULL }, // Inst #12933 = VMAXPDZrm |
| 34224 | { 12932, 4, 1, 0, 1117, 1, 0, 1821, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aff0022829ULL }, // Inst #12932 = VMAXPDZ256rrkz |
| 34225 | { 12931, 5, 1, 0, 1117, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aff0022829ULL }, // Inst #12931 = VMAXPDZ256rrk |
| 34226 | { 12930, 3, 1, 0, 1117, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aff0022829ULL }, // Inst #12930 = VMAXPDZ256rr |
| 34227 | { 12929, 8, 1, 0, 372, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aff0022819ULL }, // Inst #12929 = VMAXPDZ256rmkz |
| 34228 | { 12928, 9, 1, 0, 372, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aff0022819ULL }, // Inst #12928 = VMAXPDZ256rmk |
| 34229 | { 12927, 8, 1, 0, 372, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97aff0022819ULL }, // Inst #12927 = VMAXPDZ256rmbkz |
| 34230 | { 12926, 9, 1, 0, 372, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93aff0022819ULL }, // Inst #12926 = VMAXPDZ256rmbk |
| 34231 | { 12925, 7, 1, 0, 372, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91aff0022819ULL }, // Inst #12925 = VMAXPDZ256rmb |
| 34232 | { 12924, 7, 1, 0, 372, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aff0022819ULL }, // Inst #12924 = VMAXPDZ256rm |
| 34233 | { 12923, 4, 1, 0, 1110, 1, 0, 1795, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aff0022829ULL }, // Inst #12923 = VMAXPDZ128rrkz |
| 34234 | { 12922, 5, 1, 0, 1110, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aff0022829ULL }, // Inst #12922 = VMAXPDZ128rrk |
| 34235 | { 12921, 3, 1, 0, 1110, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aff0022829ULL }, // Inst #12921 = VMAXPDZ128rr |
| 34236 | { 12920, 8, 1, 0, 76, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aff0022819ULL }, // Inst #12920 = VMAXPDZ128rmkz |
| 34237 | { 12919, 9, 1, 0, 76, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aff0022819ULL }, // Inst #12919 = VMAXPDZ128rmk |
| 34238 | { 12918, 8, 1, 0, 76, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96aff0022819ULL }, // Inst #12918 = VMAXPDZ128rmbkz |
| 34239 | { 12917, 9, 1, 0, 76, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92aff0022819ULL }, // Inst #12917 = VMAXPDZ128rmbk |
| 34240 | { 12916, 7, 1, 0, 76, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90aff0022819ULL }, // Inst #12916 = VMAXPDZ128rmb |
| 34241 | { 12915, 7, 1, 0, 76, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aff0022819ULL }, // Inst #12915 = VMAXPDZ128rm |
| 34242 | { 12914, 3, 1, 0, 373, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1afb0002829ULL }, // Inst #12914 = VMAXPDYrr |
| 34243 | { 12913, 7, 1, 0, 372, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afb0002819ULL }, // Inst #12913 = VMAXPDYrm |
| 34244 | { 12912, 3, 1, 0, 83, 1, 0, 2046, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xafa8003029ULL }, // Inst #12912 = VMAXCSSrr |
| 34245 | { 12911, 7, 1, 0, 82, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafa8003019ULL }, // Inst #12911 = VMAXCSSrm |
| 34246 | { 12910, 3, 1, 0, 83, 1, 0, 2036, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60afe8003029ULL }, // Inst #12910 = VMAXCSSZrr |
| 34247 | { 12909, 7, 1, 0, 82, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60afe8003019ULL }, // Inst #12909 = VMAXCSSZrm |
| 34248 | { 12908, 3, 1, 0, 1788, 1, 0, 2026, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40afe8013029ULL }, // Inst #12908 = VMAXCSHZrr |
| 34249 | { 12907, 7, 1, 0, 1766, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40afe8013019ULL }, // Inst #12907 = VMAXCSHZrm |
| 34250 | { 12906, 3, 1, 0, 81, 1, 0, 2016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xafb0003829ULL }, // Inst #12906 = VMAXCSDrr |
| 34251 | { 12905, 7, 1, 0, 80, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb0003819ULL }, // Inst #12905 = VMAXCSDrm |
| 34252 | { 12904, 3, 1, 0, 83, 1, 0, 1982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80aff0023829ULL }, // Inst #12904 = VMAXCSDZrr |
| 34253 | { 12903, 7, 1, 0, 82, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aff0023819ULL }, // Inst #12903 = VMAXCSDZrm |
| 34254 | { 12902, 3, 1, 0, 79, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xafa8002029ULL }, // Inst #12902 = VMAXCPSrr |
| 34255 | { 12901, 7, 1, 0, 78, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafa8002019ULL }, // Inst #12901 = VMAXCPSrm |
| 34256 | { 12900, 4, 1, 0, 1862, 1, 0, 1963, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeafe8002029ULL }, // Inst #12900 = VMAXCPSZrrkz |
| 34257 | { 12899, 5, 1, 0, 1862, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaafe8002029ULL }, // Inst #12899 = VMAXCPSZrrk |
| 34258 | { 12898, 3, 1, 0, 1862, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8afe8002029ULL }, // Inst #12898 = VMAXCPSZrr |
| 34259 | { 12897, 8, 1, 0, 370, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8002019ULL }, // Inst #12897 = VMAXCPSZrmkz |
| 34260 | { 12896, 9, 1, 0, 370, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8002019ULL }, // Inst #12896 = VMAXCPSZrmk |
| 34261 | { 12895, 8, 1, 0, 370, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eafe8002019ULL }, // Inst #12895 = VMAXCPSZrmbkz |
| 34262 | { 12894, 9, 1, 0, 370, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aafe8002019ULL }, // Inst #12894 = VMAXCPSZrmbk |
| 34263 | { 12893, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78afe8002019ULL }, // Inst #12893 = VMAXCPSZrmb |
| 34264 | { 12892, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8002019ULL }, // Inst #12892 = VMAXCPSZrm |
| 34265 | { 12891, 4, 1, 0, 369, 1, 0, 1935, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7afe8002029ULL }, // Inst #12891 = VMAXCPSZ256rrkz |
| 34266 | { 12890, 5, 1, 0, 369, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3afe8002029ULL }, // Inst #12890 = VMAXCPSZ256rrk |
| 34267 | { 12889, 3, 1, 0, 369, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1afe8002029ULL }, // Inst #12889 = VMAXCPSZ256rr |
| 34268 | { 12888, 8, 1, 0, 368, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8002019ULL }, // Inst #12888 = VMAXCPSZ256rmkz |
| 34269 | { 12887, 9, 1, 0, 368, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8002019ULL }, // Inst #12887 = VMAXCPSZ256rmk |
| 34270 | { 12886, 8, 1, 0, 368, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77afe8002019ULL }, // Inst #12886 = VMAXCPSZ256rmbkz |
| 34271 | { 12885, 9, 1, 0, 368, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73afe8002019ULL }, // Inst #12885 = VMAXCPSZ256rmbk |
| 34272 | { 12884, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71afe8002019ULL }, // Inst #12884 = VMAXCPSZ256rmb |
| 34273 | { 12883, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8002019ULL }, // Inst #12883 = VMAXCPSZ256rm |
| 34274 | { 12882, 4, 1, 0, 79, 1, 0, 1909, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6afe8002029ULL }, // Inst #12882 = VMAXCPSZ128rrkz |
| 34275 | { 12881, 5, 1, 0, 79, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2afe8002029ULL }, // Inst #12881 = VMAXCPSZ128rrk |
| 34276 | { 12880, 3, 1, 0, 79, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0afe8002029ULL }, // Inst #12880 = VMAXCPSZ128rr |
| 34277 | { 12879, 8, 1, 0, 78, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8002019ULL }, // Inst #12879 = VMAXCPSZ128rmkz |
| 34278 | { 12878, 9, 1, 0, 78, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8002019ULL }, // Inst #12878 = VMAXCPSZ128rmk |
| 34279 | { 12877, 8, 1, 0, 78, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76afe8002019ULL }, // Inst #12877 = VMAXCPSZ128rmbkz |
| 34280 | { 12876, 9, 1, 0, 78, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72afe8002019ULL }, // Inst #12876 = VMAXCPSZ128rmbk |
| 34281 | { 12875, 7, 1, 0, 78, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70afe8002019ULL }, // Inst #12875 = VMAXCPSZ128rmb |
| 34282 | { 12874, 7, 1, 0, 78, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8002019ULL }, // Inst #12874 = VMAXCPSZ128rm |
| 34283 | { 12873, 3, 1, 0, 369, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1afa8002029ULL }, // Inst #12873 = VMAXCPSYrr |
| 34284 | { 12872, 7, 1, 0, 368, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afa8002019ULL }, // Inst #12872 = VMAXCPSYrm |
| 34285 | { 12871, 4, 1, 0, 1930, 1, 0, 1759, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeafe8012029ULL }, // Inst #12871 = VMAXCPHZrrkz |
| 34286 | { 12870, 5, 1, 0, 1930, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaafe8012029ULL }, // Inst #12870 = VMAXCPHZrrk |
| 34287 | { 12869, 3, 1, 0, 1923, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8afe8012029ULL }, // Inst #12869 = VMAXCPHZrr |
| 34288 | { 12868, 8, 1, 0, 370, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8012019ULL }, // Inst #12868 = VMAXCPHZrmkz |
| 34289 | { 12867, 9, 1, 0, 370, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8012019ULL }, // Inst #12867 = VMAXCPHZrmk |
| 34290 | { 12866, 8, 1, 0, 370, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eafe8012019ULL }, // Inst #12866 = VMAXCPHZrmbkz |
| 34291 | { 12865, 9, 1, 0, 370, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aafe8012019ULL }, // Inst #12865 = VMAXCPHZrmbk |
| 34292 | { 12864, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58afe8012019ULL }, // Inst #12864 = VMAXCPHZrmb |
| 34293 | { 12863, 7, 1, 0, 370, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8012019ULL }, // Inst #12863 = VMAXCPHZrm |
| 34294 | { 12862, 4, 1, 0, 1913, 1, 0, 1723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7afe8012029ULL }, // Inst #12862 = VMAXCPHZ256rrkz |
| 34295 | { 12861, 5, 1, 0, 1913, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3afe8012029ULL }, // Inst #12861 = VMAXCPHZ256rrk |
| 34296 | { 12860, 3, 1, 0, 1787, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1afe8012029ULL }, // Inst #12860 = VMAXCPHZ256rr |
| 34297 | { 12859, 8, 1, 0, 368, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8012019ULL }, // Inst #12859 = VMAXCPHZ256rmkz |
| 34298 | { 12858, 9, 1, 0, 368, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8012019ULL }, // Inst #12858 = VMAXCPHZ256rmk |
| 34299 | { 12857, 8, 1, 0, 368, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57afe8012019ULL }, // Inst #12857 = VMAXCPHZ256rmbkz |
| 34300 | { 12856, 9, 1, 0, 368, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53afe8012019ULL }, // Inst #12856 = VMAXCPHZ256rmbk |
| 34301 | { 12855, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51afe8012019ULL }, // Inst #12855 = VMAXCPHZ256rmb |
| 34302 | { 12854, 7, 1, 0, 368, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8012019ULL }, // Inst #12854 = VMAXCPHZ256rm |
| 34303 | { 12853, 4, 1, 0, 1912, 1, 0, 1687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6afe8012029ULL }, // Inst #12853 = VMAXCPHZ128rrkz |
| 34304 | { 12852, 5, 1, 0, 1912, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2afe8012029ULL }, // Inst #12852 = VMAXCPHZ128rrk |
| 34305 | { 12851, 3, 1, 0, 1786, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0afe8012029ULL }, // Inst #12851 = VMAXCPHZ128rr |
| 34306 | { 12850, 8, 1, 0, 1760, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8012019ULL }, // Inst #12850 = VMAXCPHZ128rmkz |
| 34307 | { 12849, 9, 1, 0, 1760, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8012019ULL }, // Inst #12849 = VMAXCPHZ128rmk |
| 34308 | { 12848, 8, 1, 0, 1760, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56afe8012019ULL }, // Inst #12848 = VMAXCPHZ128rmbkz |
| 34309 | { 12847, 9, 1, 0, 1760, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52afe8012019ULL }, // Inst #12847 = VMAXCPHZ128rmbk |
| 34310 | { 12846, 7, 1, 0, 1760, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50afe8012019ULL }, // Inst #12846 = VMAXCPHZ128rmb |
| 34311 | { 12845, 7, 1, 0, 1760, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8012019ULL }, // Inst #12845 = VMAXCPHZ128rm |
| 34312 | { 12844, 3, 1, 0, 77, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xafb0002829ULL }, // Inst #12844 = VMAXCPDrr |
| 34313 | { 12843, 7, 1, 0, 76, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb0002819ULL }, // Inst #12843 = VMAXCPDrm |
| 34314 | { 12842, 4, 1, 0, 1118, 1, 0, 1862, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeaff0022829ULL }, // Inst #12842 = VMAXCPDZrrkz |
| 34315 | { 12841, 5, 1, 0, 1118, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaaff0022829ULL }, // Inst #12841 = VMAXCPDZrrk |
| 34316 | { 12840, 3, 1, 0, 1118, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8aff0022829ULL }, // Inst #12840 = VMAXCPDZrr |
| 34317 | { 12839, 8, 1, 0, 468, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaff0022819ULL }, // Inst #12839 = VMAXCPDZrmkz |
| 34318 | { 12838, 9, 1, 0, 468, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaff0022819ULL }, // Inst #12838 = VMAXCPDZrmk |
| 34319 | { 12837, 8, 1, 0, 468, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaff0022819ULL }, // Inst #12837 = VMAXCPDZrmbkz |
| 34320 | { 12836, 9, 1, 0, 468, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaff0022819ULL }, // Inst #12836 = VMAXCPDZrmbk |
| 34321 | { 12835, 7, 1, 0, 468, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98aff0022819ULL }, // Inst #12835 = VMAXCPDZrmb |
| 34322 | { 12834, 7, 1, 0, 468, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aff0022819ULL }, // Inst #12834 = VMAXCPDZrm |
| 34323 | { 12833, 4, 1, 0, 1117, 1, 0, 1821, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7aff0022829ULL }, // Inst #12833 = VMAXCPDZ256rrkz |
| 34324 | { 12832, 5, 1, 0, 1117, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3aff0022829ULL }, // Inst #12832 = VMAXCPDZ256rrk |
| 34325 | { 12831, 3, 1, 0, 1117, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1aff0022829ULL }, // Inst #12831 = VMAXCPDZ256rr |
| 34326 | { 12830, 8, 1, 0, 372, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aff0022819ULL }, // Inst #12830 = VMAXCPDZ256rmkz |
| 34327 | { 12829, 9, 1, 0, 372, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aff0022819ULL }, // Inst #12829 = VMAXCPDZ256rmk |
| 34328 | { 12828, 8, 1, 0, 372, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97aff0022819ULL }, // Inst #12828 = VMAXCPDZ256rmbkz |
| 34329 | { 12827, 9, 1, 0, 372, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93aff0022819ULL }, // Inst #12827 = VMAXCPDZ256rmbk |
| 34330 | { 12826, 7, 1, 0, 372, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91aff0022819ULL }, // Inst #12826 = VMAXCPDZ256rmb |
| 34331 | { 12825, 7, 1, 0, 372, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aff0022819ULL }, // Inst #12825 = VMAXCPDZ256rm |
| 34332 | { 12824, 4, 1, 0, 1110, 1, 0, 1795, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6aff0022829ULL }, // Inst #12824 = VMAXCPDZ128rrkz |
| 34333 | { 12823, 5, 1, 0, 1110, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2aff0022829ULL }, // Inst #12823 = VMAXCPDZ128rrk |
| 34334 | { 12822, 3, 1, 0, 1110, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0aff0022829ULL }, // Inst #12822 = VMAXCPDZ128rr |
| 34335 | { 12821, 8, 1, 0, 76, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aff0022819ULL }, // Inst #12821 = VMAXCPDZ128rmkz |
| 34336 | { 12820, 9, 1, 0, 76, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aff0022819ULL }, // Inst #12820 = VMAXCPDZ128rmk |
| 34337 | { 12819, 8, 1, 0, 76, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96aff0022819ULL }, // Inst #12819 = VMAXCPDZ128rmbkz |
| 34338 | { 12818, 9, 1, 0, 76, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92aff0022819ULL }, // Inst #12818 = VMAXCPDZ128rmbk |
| 34339 | { 12817, 7, 1, 0, 76, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90aff0022819ULL }, // Inst #12817 = VMAXCPDZ128rmb |
| 34340 | { 12816, 7, 1, 0, 76, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aff0022819ULL }, // Inst #12816 = VMAXCPDZ128rm |
| 34341 | { 12815, 3, 1, 0, 373, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1afb0002829ULL }, // Inst #12815 = VMAXCPDYrr |
| 34342 | { 12814, 7, 1, 0, 372, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afb0002819ULL }, // Inst #12814 = VMAXCPDYrm |
| 34343 | { 12813, 4, 1, 0, 371, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeeafe8012829ULL }, // Inst #12813 = VMAXBF16Zrrkz |
| 34344 | { 12812, 5, 1, 0, 371, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeaafe8012829ULL }, // Inst #12812 = VMAXBF16Zrrk |
| 34345 | { 12811, 3, 1, 0, 371, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8afe8012829ULL }, // Inst #12811 = VMAXBF16Zrr |
| 34346 | { 12810, 8, 1, 0, 370, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeafe8012819ULL }, // Inst #12810 = VMAXBF16Zrmkz |
| 34347 | { 12809, 9, 1, 0, 370, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaafe8012819ULL }, // Inst #12809 = VMAXBF16Zrmk |
| 34348 | { 12808, 8, 1, 0, 370, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5eafe8012819ULL }, // Inst #12808 = VMAXBF16Zrmbkz |
| 34349 | { 12807, 9, 1, 0, 370, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5aafe8012819ULL }, // Inst #12807 = VMAXBF16Zrmbk |
| 34350 | { 12806, 7, 1, 0, 370, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58afe8012819ULL }, // Inst #12806 = VMAXBF16Zrmb |
| 34351 | { 12805, 7, 1, 0, 370, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8afe8012819ULL }, // Inst #12805 = VMAXBF16Zrm |
| 34352 | { 12804, 4, 1, 0, 369, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7afe8012829ULL }, // Inst #12804 = VMAXBF16Z256rrkz |
| 34353 | { 12803, 5, 1, 0, 369, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3afe8012829ULL }, // Inst #12803 = VMAXBF16Z256rrk |
| 34354 | { 12802, 3, 1, 0, 369, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1afe8012829ULL }, // Inst #12802 = VMAXBF16Z256rr |
| 34355 | { 12801, 8, 1, 0, 368, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7afe8012819ULL }, // Inst #12801 = VMAXBF16Z256rmkz |
| 34356 | { 12800, 9, 1, 0, 368, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3afe8012819ULL }, // Inst #12800 = VMAXBF16Z256rmk |
| 34357 | { 12799, 8, 1, 0, 368, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x57afe8012819ULL }, // Inst #12799 = VMAXBF16Z256rmbkz |
| 34358 | { 12798, 9, 1, 0, 368, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53afe8012819ULL }, // Inst #12798 = VMAXBF16Z256rmbk |
| 34359 | { 12797, 7, 1, 0, 368, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51afe8012819ULL }, // Inst #12797 = VMAXBF16Z256rmb |
| 34360 | { 12796, 7, 1, 0, 368, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1afe8012819ULL }, // Inst #12796 = VMAXBF16Z256rm |
| 34361 | { 12795, 4, 1, 0, 79, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6afe8012829ULL }, // Inst #12795 = VMAXBF16Z128rrkz |
| 34362 | { 12794, 5, 1, 0, 79, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2afe8012829ULL }, // Inst #12794 = VMAXBF16Z128rrk |
| 34363 | { 12793, 3, 1, 0, 79, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0afe8012829ULL }, // Inst #12793 = VMAXBF16Z128rr |
| 34364 | { 12792, 8, 1, 0, 78, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6afe8012819ULL }, // Inst #12792 = VMAXBF16Z128rmkz |
| 34365 | { 12791, 9, 1, 0, 78, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2afe8012819ULL }, // Inst #12791 = VMAXBF16Z128rmk |
| 34366 | { 12790, 8, 1, 0, 78, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x56afe8012819ULL }, // Inst #12790 = VMAXBF16Z128rmbkz |
| 34367 | { 12789, 9, 1, 0, 78, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52afe8012819ULL }, // Inst #12789 = VMAXBF16Z128rmbk |
| 34368 | { 12788, 7, 1, 0, 78, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50afe8012819ULL }, // Inst #12788 = VMAXBF16Z128rmb |
| 34369 | { 12787, 7, 1, 0, 78, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0afe8012819ULL }, // Inst #12787 = VMAXBF16Z128rm |
| 34370 | { 12786, 7, 1, 0, 465, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9628004819ULL }, // Inst #12786 = VMASKMOVPSrm |
| 34371 | { 12785, 7, 0, 0, 467, 0, 0, 4871, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x9728004818ULL }, // Inst #12785 = VMASKMOVPSmr |
| 34372 | { 12784, 7, 1, 0, 463, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19628004819ULL }, // Inst #12784 = VMASKMOVPSYrm |
| 34373 | { 12783, 7, 0, 0, 466, 0, 0, 4864, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x19728004818ULL }, // Inst #12783 = VMASKMOVPSYmr |
| 34374 | { 12782, 7, 1, 0, 465, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b0004819ULL }, // Inst #12782 = VMASKMOVPDrm |
| 34375 | { 12781, 7, 0, 0, 464, 0, 0, 4871, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x97b0004818ULL }, // Inst #12781 = VMASKMOVPDmr |
| 34376 | { 12780, 7, 1, 0, 463, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x196b0004819ULL }, // Inst #12780 = VMASKMOVPDYrm |
| 34377 | { 12779, 7, 0, 0, 462, 0, 0, 4864, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x197b0004818ULL }, // Inst #12779 = VMASKMOVPDYmr |
| 34378 | { 12778, 2, 0, 0, 942, 1, 0, 557, X86ImpOpBase + 331, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7bb8002829ULL }, // Inst #12778 = VMASKMOVDQU64 |
| 34379 | { 12777, 2, 0, 0, 942, 1, 0, 557, X86ImpOpBase + 330, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7bb8002829ULL }, // Inst #12777 = VMASKMOVDQU |
| 34380 | { 12776, 5, 0, 0, 1639, 0, 1, 232, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5728002022ULL }, // Inst #12776 = VLDMXCSR |
| 34381 | { 12775, 6, 1, 0, 186, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7830003819ULL }, // Inst #12775 = VLDDQUrm |
| 34382 | { 12774, 6, 1, 0, 461, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x17830003819ULL }, // Inst #12774 = VLDDQUYrm |
| 34383 | { 12773, 4, 1, 0, 1417, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x90a8046829ULL }, // Inst #12773 = VINSERTPSrri |
| 34384 | { 12772, 8, 1, 0, 1673, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90a8046819ULL }, // Inst #12772 = VINSERTPSrmi |
| 34385 | { 12771, 4, 1, 0, 1417, 0, 0, 919, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa090e8046829ULL }, // Inst #12771 = VINSERTPSZrri |
| 34386 | { 12770, 8, 1, 0, 1426, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6090e8046819ULL }, // Inst #12770 = VINSERTPSZrmi |
| 34387 | { 12769, 5, 1, 0, 364, 0, 0, 4859, X86ImpOpBase + 0, 0, 0xee9d78066829ULL }, // Inst #12769 = VINSERTI64X4Zrrikz |
| 34388 | { 12768, 6, 1, 0, 364, 0, 0, 4853, X86ImpOpBase + 0, 0, 0xea9d78066829ULL }, // Inst #12768 = VINSERTI64X4Zrrik |
| 34389 | { 12767, 4, 1, 0, 364, 0, 0, 4816, X86ImpOpBase + 0, 0, 0xe89d78066829ULL }, // Inst #12767 = VINSERTI64X4Zrri |
| 34390 | { 12766, 9, 1, 0, 1835, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce9d78066819ULL }, // Inst #12766 = VINSERTI64X4Zrmikz |
| 34391 | { 12765, 10, 1, 0, 1835, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca9d78066819ULL }, // Inst #12765 = VINSERTI64X4Zrmik |
| 34392 | { 12764, 8, 1, 0, 1835, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc89d78066819ULL }, // Inst #12764 = VINSERTI64X4Zrmi |
| 34393 | { 12763, 5, 1, 0, 364, 0, 0, 4848, X86ImpOpBase + 0, 0, 0xee9c78066829ULL }, // Inst #12763 = VINSERTI64X2Zrrikz |
| 34394 | { 12762, 6, 1, 0, 364, 0, 0, 4842, X86ImpOpBase + 0, 0, 0xea9c78066829ULL }, // Inst #12762 = VINSERTI64X2Zrrik |
| 34395 | { 12761, 4, 1, 0, 364, 0, 0, 4801, X86ImpOpBase + 0, 0, 0xe89c78066829ULL }, // Inst #12761 = VINSERTI64X2Zrri |
| 34396 | { 12760, 9, 1, 0, 1835, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae9c78066819ULL }, // Inst #12760 = VINSERTI64X2Zrmikz |
| 34397 | { 12759, 10, 1, 0, 1835, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa9c78066819ULL }, // Inst #12759 = VINSERTI64X2Zrmik |
| 34398 | { 12758, 8, 1, 0, 1835, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa89c78066819ULL }, // Inst #12758 = VINSERTI64X2Zrmi |
| 34399 | { 12757, 5, 1, 0, 364, 0, 0, 4837, X86ImpOpBase + 0, 0, 0xc79c78066829ULL }, // Inst #12757 = VINSERTI64X2Z256rrikz |
| 34400 | { 12756, 6, 1, 0, 364, 0, 0, 4831, X86ImpOpBase + 0, 0, 0xc39c78066829ULL }, // Inst #12756 = VINSERTI64X2Z256rrik |
| 34401 | { 12755, 4, 1, 0, 364, 0, 0, 4786, X86ImpOpBase + 0, 0, 0xc19c78066829ULL }, // Inst #12755 = VINSERTI64X2Z256rri |
| 34402 | { 12754, 9, 1, 0, 1324, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa79c78066819ULL }, // Inst #12754 = VINSERTI64X2Z256rmikz |
| 34403 | { 12753, 10, 1, 0, 1324, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa39c78066819ULL }, // Inst #12753 = VINSERTI64X2Z256rmik |
| 34404 | { 12752, 8, 1, 0, 1324, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa19c78066819ULL }, // Inst #12752 = VINSERTI64X2Z256rmi |
| 34405 | { 12751, 5, 1, 0, 364, 0, 0, 4826, X86ImpOpBase + 0, 0, 0xee9d78046829ULL }, // Inst #12751 = VINSERTI32X8Zrrikz |
| 34406 | { 12750, 6, 1, 0, 364, 0, 0, 4820, X86ImpOpBase + 0, 0, 0xea9d78046829ULL }, // Inst #12750 = VINSERTI32X8Zrrik |
| 34407 | { 12749, 4, 1, 0, 364, 0, 0, 4816, X86ImpOpBase + 0, 0, 0xe89d78046829ULL }, // Inst #12749 = VINSERTI32X8Zrri |
| 34408 | { 12748, 9, 1, 0, 1835, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce9d78046819ULL }, // Inst #12748 = VINSERTI32X8Zrmikz |
| 34409 | { 12747, 10, 1, 0, 1835, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca9d78046819ULL }, // Inst #12747 = VINSERTI32X8Zrmik |
| 34410 | { 12746, 8, 1, 0, 1835, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc89d78046819ULL }, // Inst #12746 = VINSERTI32X8Zrmi |
| 34411 | { 12745, 5, 1, 0, 364, 0, 0, 4811, X86ImpOpBase + 0, 0, 0xee9c78046829ULL }, // Inst #12745 = VINSERTI32X4Zrrikz |
| 34412 | { 12744, 6, 1, 0, 364, 0, 0, 4805, X86ImpOpBase + 0, 0, 0xea9c78046829ULL }, // Inst #12744 = VINSERTI32X4Zrrik |
| 34413 | { 12743, 4, 1, 0, 364, 0, 0, 4801, X86ImpOpBase + 0, 0, 0xe89c78046829ULL }, // Inst #12743 = VINSERTI32X4Zrri |
| 34414 | { 12742, 9, 1, 0, 1835, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae9c78046819ULL }, // Inst #12742 = VINSERTI32X4Zrmikz |
| 34415 | { 12741, 10, 1, 0, 1835, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa9c78046819ULL }, // Inst #12741 = VINSERTI32X4Zrmik |
| 34416 | { 12740, 8, 1, 0, 1835, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa89c78046819ULL }, // Inst #12740 = VINSERTI32X4Zrmi |
| 34417 | { 12739, 5, 1, 0, 364, 0, 0, 4796, X86ImpOpBase + 0, 0, 0xc79c78046829ULL }, // Inst #12739 = VINSERTI32X4Z256rrikz |
| 34418 | { 12738, 6, 1, 0, 364, 0, 0, 4790, X86ImpOpBase + 0, 0, 0xc39c78046829ULL }, // Inst #12738 = VINSERTI32X4Z256rrik |
| 34419 | { 12737, 4, 1, 0, 364, 0, 0, 4786, X86ImpOpBase + 0, 0, 0xc19c78046829ULL }, // Inst #12737 = VINSERTI32X4Z256rri |
| 34420 | { 12736, 9, 1, 0, 1324, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa79c78046819ULL }, // Inst #12736 = VINSERTI32X4Z256rmikz |
| 34421 | { 12735, 10, 1, 0, 1324, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa39c78046819ULL }, // Inst #12735 = VINSERTI32X4Z256rmik |
| 34422 | { 12734, 8, 1, 0, 1324, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa19c78046819ULL }, // Inst #12734 = VINSERTI32X4Z256rmi |
| 34423 | { 12733, 4, 1, 0, 968, 0, 0, 4782, X86ImpOpBase + 0, 0, 0x19c38046829ULL }, // Inst #12733 = VINSERTI128rri |
| 34424 | { 12732, 8, 1, 0, 851, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x19c38046819ULL }, // Inst #12732 = VINSERTI128rmi |
| 34425 | { 12731, 5, 1, 0, 366, 0, 0, 4859, X86ImpOpBase + 0, 0, 0xee8d70066829ULL }, // Inst #12731 = VINSERTF64X4Zrrikz |
| 34426 | { 12730, 6, 1, 0, 366, 0, 0, 4853, X86ImpOpBase + 0, 0, 0xea8d70066829ULL }, // Inst #12730 = VINSERTF64X4Zrrik |
| 34427 | { 12729, 4, 1, 0, 366, 0, 0, 4816, X86ImpOpBase + 0, 0, 0xe88d70066829ULL }, // Inst #12729 = VINSERTF64X4Zrri |
| 34428 | { 12728, 9, 1, 0, 1834, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce8d70066819ULL }, // Inst #12728 = VINSERTF64X4Zrmikz |
| 34429 | { 12727, 10, 1, 0, 1834, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca8d70066819ULL }, // Inst #12727 = VINSERTF64X4Zrmik |
| 34430 | { 12726, 8, 1, 0, 1834, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc88d70066819ULL }, // Inst #12726 = VINSERTF64X4Zrmi |
| 34431 | { 12725, 5, 1, 0, 366, 0, 0, 4848, X86ImpOpBase + 0, 0, 0xee8c70066829ULL }, // Inst #12725 = VINSERTF64X2Zrrikz |
| 34432 | { 12724, 6, 1, 0, 366, 0, 0, 4842, X86ImpOpBase + 0, 0, 0xea8c70066829ULL }, // Inst #12724 = VINSERTF64X2Zrrik |
| 34433 | { 12723, 4, 1, 0, 366, 0, 0, 4801, X86ImpOpBase + 0, 0, 0xe88c70066829ULL }, // Inst #12723 = VINSERTF64X2Zrri |
| 34434 | { 12722, 9, 1, 0, 1834, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae8c70066819ULL }, // Inst #12722 = VINSERTF64X2Zrmikz |
| 34435 | { 12721, 10, 1, 0, 1834, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa8c70066819ULL }, // Inst #12721 = VINSERTF64X2Zrmik |
| 34436 | { 12720, 8, 1, 0, 1834, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa88c70066819ULL }, // Inst #12720 = VINSERTF64X2Zrmi |
| 34437 | { 12719, 5, 1, 0, 366, 0, 0, 4837, X86ImpOpBase + 0, 0, 0xc78c70066829ULL }, // Inst #12719 = VINSERTF64X2Z256rrikz |
| 34438 | { 12718, 6, 1, 0, 366, 0, 0, 4831, X86ImpOpBase + 0, 0, 0xc38c70066829ULL }, // Inst #12718 = VINSERTF64X2Z256rrik |
| 34439 | { 12717, 4, 1, 0, 366, 0, 0, 4786, X86ImpOpBase + 0, 0, 0xc18c70066829ULL }, // Inst #12717 = VINSERTF64X2Z256rri |
| 34440 | { 12716, 9, 1, 0, 1323, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa78c70066819ULL }, // Inst #12716 = VINSERTF64X2Z256rmikz |
| 34441 | { 12715, 10, 1, 0, 1323, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa38c70066819ULL }, // Inst #12715 = VINSERTF64X2Z256rmik |
| 34442 | { 12714, 8, 1, 0, 1323, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa18c70066819ULL }, // Inst #12714 = VINSERTF64X2Z256rmi |
| 34443 | { 12713, 5, 1, 0, 366, 0, 0, 4826, X86ImpOpBase + 0, 0, 0xee8d68046829ULL }, // Inst #12713 = VINSERTF32X8Zrrikz |
| 34444 | { 12712, 6, 1, 0, 366, 0, 0, 4820, X86ImpOpBase + 0, 0, 0xea8d68046829ULL }, // Inst #12712 = VINSERTF32X8Zrrik |
| 34445 | { 12711, 4, 1, 0, 366, 0, 0, 4816, X86ImpOpBase + 0, 0, 0xe88d68046829ULL }, // Inst #12711 = VINSERTF32X8Zrri |
| 34446 | { 12710, 9, 1, 0, 1834, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce8d68046819ULL }, // Inst #12710 = VINSERTF32X8Zrmikz |
| 34447 | { 12709, 10, 1, 0, 1834, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca8d68046819ULL }, // Inst #12709 = VINSERTF32X8Zrmik |
| 34448 | { 12708, 8, 1, 0, 1834, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc88d68046819ULL }, // Inst #12708 = VINSERTF32X8Zrmi |
| 34449 | { 12707, 5, 1, 0, 366, 0, 0, 4811, X86ImpOpBase + 0, 0, 0xee8c68046829ULL }, // Inst #12707 = VINSERTF32X4Zrrikz |
| 34450 | { 12706, 6, 1, 0, 366, 0, 0, 4805, X86ImpOpBase + 0, 0, 0xea8c68046829ULL }, // Inst #12706 = VINSERTF32X4Zrrik |
| 34451 | { 12705, 4, 1, 0, 366, 0, 0, 4801, X86ImpOpBase + 0, 0, 0xe88c68046829ULL }, // Inst #12705 = VINSERTF32X4Zrri |
| 34452 | { 12704, 9, 1, 0, 1834, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae8c68046819ULL }, // Inst #12704 = VINSERTF32X4Zrmikz |
| 34453 | { 12703, 10, 1, 0, 1834, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa8c68046819ULL }, // Inst #12703 = VINSERTF32X4Zrmik |
| 34454 | { 12702, 8, 1, 0, 1834, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa88c68046819ULL }, // Inst #12702 = VINSERTF32X4Zrmi |
| 34455 | { 12701, 5, 1, 0, 366, 0, 0, 4796, X86ImpOpBase + 0, 0, 0xc78c68046829ULL }, // Inst #12701 = VINSERTF32X4Z256rrikz |
| 34456 | { 12700, 6, 1, 0, 366, 0, 0, 4790, X86ImpOpBase + 0, 0, 0xc38c68046829ULL }, // Inst #12700 = VINSERTF32X4Z256rrik |
| 34457 | { 12699, 4, 1, 0, 366, 0, 0, 4786, X86ImpOpBase + 0, 0, 0xc18c68046829ULL }, // Inst #12699 = VINSERTF32X4Z256rri |
| 34458 | { 12698, 9, 1, 0, 1323, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa78c68046819ULL }, // Inst #12698 = VINSERTF32X4Z256rmikz |
| 34459 | { 12697, 10, 1, 0, 1323, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa38c68046819ULL }, // Inst #12697 = VINSERTF32X4Z256rmik |
| 34460 | { 12696, 8, 1, 0, 1323, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa18c68046819ULL }, // Inst #12696 = VINSERTF32X4Z256rmi |
| 34461 | { 12695, 4, 1, 0, 967, 0, 0, 4782, X86ImpOpBase + 0, 0, 0x18c28046829ULL }, // Inst #12695 = VINSERTF128rri |
| 34462 | { 12694, 8, 1, 0, 779, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18c28046819ULL }, // Inst #12694 = VINSERTF128rmi |
| 34463 | { 12693, 3, 1, 0, 1638, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbea8003829ULL }, // Inst #12693 = VHSUBPSrr |
| 34464 | { 12692, 7, 1, 0, 151, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbea8003819ULL }, // Inst #12692 = VHSUBPSrm |
| 34465 | { 12691, 3, 1, 0, 458, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1bea8003829ULL }, // Inst #12691 = VHSUBPSYrr |
| 34466 | { 12690, 7, 1, 0, 457, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1bea8003819ULL }, // Inst #12690 = VHSUBPSYrm |
| 34467 | { 12689, 3, 1, 0, 1638, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbeb0002829ULL }, // Inst #12689 = VHSUBPDrr |
| 34468 | { 12688, 7, 1, 0, 151, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbeb0002819ULL }, // Inst #12688 = VHSUBPDrm |
| 34469 | { 12687, 3, 1, 0, 458, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1beb0002829ULL }, // Inst #12687 = VHSUBPDYrr |
| 34470 | { 12686, 7, 1, 0, 457, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1beb0002819ULL }, // Inst #12686 = VHSUBPDYrm |
| 34471 | { 12685, 3, 1, 0, 1638, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbe28003829ULL }, // Inst #12685 = VHADDPSrr |
| 34472 | { 12684, 7, 1, 0, 151, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbe28003819ULL }, // Inst #12684 = VHADDPSrm |
| 34473 | { 12683, 3, 1, 0, 458, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1be28003829ULL }, // Inst #12683 = VHADDPSYrr |
| 34474 | { 12682, 7, 1, 0, 457, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1be28003819ULL }, // Inst #12682 = VHADDPSYrm |
| 34475 | { 12681, 3, 1, 0, 1638, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbe30002829ULL }, // Inst #12681 = VHADDPDrr |
| 34476 | { 12680, 7, 1, 0, 151, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbe30002819ULL }, // Inst #12680 = VHADDPDrm |
| 34477 | { 12679, 3, 1, 0, 458, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1be30002829ULL }, // Inst #12679 = VHADDPDYrr |
| 34478 | { 12678, 7, 1, 0, 457, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1be30002819ULL }, // Inst #12678 = VHADDPDYrm |
| 34479 | { 12677, 3, 1, 0, 1510, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe7b8004829ULL }, // Inst #12677 = VGF2P8MULBrr |
| 34480 | { 12676, 7, 1, 0, 1507, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe7b8004819ULL }, // Inst #12676 = VGF2P8MULBrm |
| 34481 | { 12675, 4, 1, 0, 2255, 0, 0, 2920, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeee7f8004829ULL }, // Inst #12675 = VGF2P8MULBZrrkz |
| 34482 | { 12674, 5, 1, 0, 2253, 0, 0, 2915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeae7f8004829ULL }, // Inst #12674 = VGF2P8MULBZrrk |
| 34483 | { 12673, 3, 1, 0, 1925, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8e7f8004829ULL }, // Inst #12673 = VGF2P8MULBZrr |
| 34484 | { 12672, 8, 1, 0, 2251, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee7f8004819ULL }, // Inst #12672 = VGF2P8MULBZrmkz |
| 34485 | { 12671, 9, 1, 0, 2251, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae7f8004819ULL }, // Inst #12671 = VGF2P8MULBZrmk |
| 34486 | { 12670, 7, 1, 0, 1947, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e7f8004819ULL }, // Inst #12670 = VGF2P8MULBZrm |
| 34487 | { 12669, 4, 1, 0, 2249, 0, 0, 2894, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7e7f8004829ULL }, // Inst #12669 = VGF2P8MULBZ256rrkz |
| 34488 | { 12668, 5, 1, 0, 2245, 0, 0, 2889, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3e7f8004829ULL }, // Inst #12668 = VGF2P8MULBZ256rrk |
| 34489 | { 12667, 3, 1, 0, 1785, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1e7f8004829ULL }, // Inst #12667 = VGF2P8MULBZ256rr |
| 34490 | { 12666, 8, 1, 0, 2241, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e7f8004819ULL }, // Inst #12666 = VGF2P8MULBZ256rmkz |
| 34491 | { 12665, 9, 1, 0, 2241, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e7f8004819ULL }, // Inst #12665 = VGF2P8MULBZ256rmk |
| 34492 | { 12664, 7, 1, 0, 1769, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e7f8004819ULL }, // Inst #12664 = VGF2P8MULBZ256rm |
| 34493 | { 12663, 4, 1, 0, 2248, 0, 0, 2868, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6e7f8004829ULL }, // Inst #12663 = VGF2P8MULBZ128rrkz |
| 34494 | { 12662, 5, 1, 0, 2244, 0, 0, 2863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2e7f8004829ULL }, // Inst #12662 = VGF2P8MULBZ128rrk |
| 34495 | { 12661, 3, 1, 0, 1784, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0e7f8004829ULL }, // Inst #12661 = VGF2P8MULBZ128rr |
| 34496 | { 12660, 8, 1, 0, 2239, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e7f8004819ULL }, // Inst #12660 = VGF2P8MULBZ128rmkz |
| 34497 | { 12659, 9, 1, 0, 2239, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e7f8004819ULL }, // Inst #12659 = VGF2P8MULBZ128rmk |
| 34498 | { 12658, 7, 1, 0, 1763, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e7f8004819ULL }, // Inst #12658 = VGF2P8MULBZ128rm |
| 34499 | { 12657, 3, 1, 0, 1511, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1e7b8004829ULL }, // Inst #12657 = VGF2P8MULBYrr |
| 34500 | { 12656, 7, 1, 0, 1509, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e7b8004819ULL }, // Inst #12656 = VGF2P8MULBYrm |
| 34501 | { 12655, 4, 1, 0, 149, 0, 0, 915, X86ImpOpBase + 0, 0, 0xe738066829ULL }, // Inst #12655 = VGF2P8AFFINEQBrri |
| 34502 | { 12654, 8, 1, 0, 1506, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe738066819ULL }, // Inst #12654 = VGF2P8AFFINEQBrmi |
| 34503 | { 12653, 5, 1, 0, 2254, 0, 0, 4777, X86ImpOpBase + 0, 0, 0xeee778066829ULL }, // Inst #12653 = VGF2P8AFFINEQBZrrikz |
| 34504 | { 12652, 6, 1, 0, 2252, 0, 0, 4771, X86ImpOpBase + 0, 0, 0xeae778066829ULL }, // Inst #12652 = VGF2P8AFFINEQBZrrik |
| 34505 | { 12651, 4, 1, 0, 384, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8e778066829ULL }, // Inst #12651 = VGF2P8AFFINEQBZrri |
| 34506 | { 12650, 9, 1, 0, 2250, 0, 0, 4762, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee778066819ULL }, // Inst #12650 = VGF2P8AFFINEQBZrmikz |
| 34507 | { 12649, 10, 1, 0, 2250, 0, 0, 4752, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae778066819ULL }, // Inst #12649 = VGF2P8AFFINEQBZrmik |
| 34508 | { 12648, 8, 1, 0, 1946, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e778066819ULL }, // Inst #12648 = VGF2P8AFFINEQBZrmi |
| 34509 | { 12647, 9, 1, 0, 2250, 0, 0, 4762, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ee778066819ULL }, // Inst #12647 = VGF2P8AFFINEQBZrmbikz |
| 34510 | { 12646, 10, 1, 0, 2250, 0, 0, 4752, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ae778066819ULL }, // Inst #12646 = VGF2P8AFFINEQBZrmbik |
| 34511 | { 12645, 8, 1, 0, 1946, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98e778066819ULL }, // Inst #12645 = VGF2P8AFFINEQBZrmbi |
| 34512 | { 12644, 5, 1, 0, 2247, 0, 0, 4747, X86ImpOpBase + 0, 0, 0xc7e778066829ULL }, // Inst #12644 = VGF2P8AFFINEQBZ256rrikz |
| 34513 | { 12643, 6, 1, 0, 2243, 0, 0, 4741, X86ImpOpBase + 0, 0, 0xc3e778066829ULL }, // Inst #12643 = VGF2P8AFFINEQBZ256rrik |
| 34514 | { 12642, 4, 1, 0, 382, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1e778066829ULL }, // Inst #12642 = VGF2P8AFFINEQBZ256rri |
| 34515 | { 12641, 9, 1, 0, 2240, 0, 0, 4732, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e778066819ULL }, // Inst #12641 = VGF2P8AFFINEQBZ256rmikz |
| 34516 | { 12640, 10, 1, 0, 2240, 0, 0, 4722, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e778066819ULL }, // Inst #12640 = VGF2P8AFFINEQBZ256rmik |
| 34517 | { 12639, 8, 1, 0, 1768, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e778066819ULL }, // Inst #12639 = VGF2P8AFFINEQBZ256rmi |
| 34518 | { 12638, 9, 1, 0, 2240, 0, 0, 4732, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97e778066819ULL }, // Inst #12638 = VGF2P8AFFINEQBZ256rmbikz |
| 34519 | { 12637, 10, 1, 0, 2240, 0, 0, 4722, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93e778066819ULL }, // Inst #12637 = VGF2P8AFFINEQBZ256rmbik |
| 34520 | { 12636, 8, 1, 0, 1768, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91e778066819ULL }, // Inst #12636 = VGF2P8AFFINEQBZ256rmbi |
| 34521 | { 12635, 5, 1, 0, 2246, 0, 0, 4717, X86ImpOpBase + 0, 0, 0xa6e778066829ULL }, // Inst #12635 = VGF2P8AFFINEQBZ128rrikz |
| 34522 | { 12634, 6, 1, 0, 2242, 0, 0, 4711, X86ImpOpBase + 0, 0, 0xa2e778066829ULL }, // Inst #12634 = VGF2P8AFFINEQBZ128rrik |
| 34523 | { 12633, 4, 1, 0, 149, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0e778066829ULL }, // Inst #12633 = VGF2P8AFFINEQBZ128rri |
| 34524 | { 12632, 9, 1, 0, 2238, 0, 0, 4702, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e778066819ULL }, // Inst #12632 = VGF2P8AFFINEQBZ128rmikz |
| 34525 | { 12631, 10, 1, 0, 2238, 0, 0, 4692, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e778066819ULL }, // Inst #12631 = VGF2P8AFFINEQBZ128rmik |
| 34526 | { 12630, 8, 1, 0, 1759, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e778066819ULL }, // Inst #12630 = VGF2P8AFFINEQBZ128rmi |
| 34527 | { 12629, 9, 1, 0, 2238, 0, 0, 4702, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96e778066819ULL }, // Inst #12629 = VGF2P8AFFINEQBZ128rmbikz |
| 34528 | { 12628, 10, 1, 0, 2238, 0, 0, 4692, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92e778066819ULL }, // Inst #12628 = VGF2P8AFFINEQBZ128rmbik |
| 34529 | { 12627, 8, 1, 0, 1759, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90e778066819ULL }, // Inst #12627 = VGF2P8AFFINEQBZ128rmbi |
| 34530 | { 12626, 4, 1, 0, 382, 0, 0, 923, X86ImpOpBase + 0, 0, 0x1e738066829ULL }, // Inst #12626 = VGF2P8AFFINEQBYrri |
| 34531 | { 12625, 8, 1, 0, 1508, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e738066819ULL }, // Inst #12625 = VGF2P8AFFINEQBYrmi |
| 34532 | { 12624, 4, 1, 0, 149, 0, 0, 915, X86ImpOpBase + 0, 0, 0xe7b8066829ULL }, // Inst #12624 = VGF2P8AFFINEINVQBrri |
| 34533 | { 12623, 8, 1, 0, 1506, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe7b8066819ULL }, // Inst #12623 = VGF2P8AFFINEINVQBrmi |
| 34534 | { 12622, 5, 1, 0, 2254, 0, 0, 4777, X86ImpOpBase + 0, 0, 0xeee7f8066829ULL }, // Inst #12622 = VGF2P8AFFINEINVQBZrrikz |
| 34535 | { 12621, 6, 1, 0, 2252, 0, 0, 4771, X86ImpOpBase + 0, 0, 0xeae7f8066829ULL }, // Inst #12621 = VGF2P8AFFINEINVQBZrrik |
| 34536 | { 12620, 4, 1, 0, 384, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8e7f8066829ULL }, // Inst #12620 = VGF2P8AFFINEINVQBZrri |
| 34537 | { 12619, 9, 1, 0, 2250, 0, 0, 4762, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeee7f8066819ULL }, // Inst #12619 = VGF2P8AFFINEINVQBZrmikz |
| 34538 | { 12618, 10, 1, 0, 2250, 0, 0, 4752, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae7f8066819ULL }, // Inst #12618 = VGF2P8AFFINEINVQBZrmik |
| 34539 | { 12617, 8, 1, 0, 1946, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e7f8066819ULL }, // Inst #12617 = VGF2P8AFFINEINVQBZrmi |
| 34540 | { 12616, 9, 1, 0, 2250, 0, 0, 4762, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ee7f8066819ULL }, // Inst #12616 = VGF2P8AFFINEINVQBZrmbikz |
| 34541 | { 12615, 10, 1, 0, 2250, 0, 0, 4752, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ae7f8066819ULL }, // Inst #12615 = VGF2P8AFFINEINVQBZrmbik |
| 34542 | { 12614, 8, 1, 0, 1946, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98e7f8066819ULL }, // Inst #12614 = VGF2P8AFFINEINVQBZrmbi |
| 34543 | { 12613, 5, 1, 0, 2247, 0, 0, 4747, X86ImpOpBase + 0, 0, 0xc7e7f8066829ULL }, // Inst #12613 = VGF2P8AFFINEINVQBZ256rrikz |
| 34544 | { 12612, 6, 1, 0, 2243, 0, 0, 4741, X86ImpOpBase + 0, 0, 0xc3e7f8066829ULL }, // Inst #12612 = VGF2P8AFFINEINVQBZ256rrik |
| 34545 | { 12611, 4, 1, 0, 382, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1e7f8066829ULL }, // Inst #12611 = VGF2P8AFFINEINVQBZ256rri |
| 34546 | { 12610, 9, 1, 0, 2240, 0, 0, 4732, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7e7f8066819ULL }, // Inst #12610 = VGF2P8AFFINEINVQBZ256rmikz |
| 34547 | { 12609, 10, 1, 0, 2240, 0, 0, 4722, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e7f8066819ULL }, // Inst #12609 = VGF2P8AFFINEINVQBZ256rmik |
| 34548 | { 12608, 8, 1, 0, 1768, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e7f8066819ULL }, // Inst #12608 = VGF2P8AFFINEINVQBZ256rmi |
| 34549 | { 12607, 9, 1, 0, 2240, 0, 0, 4732, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97e7f8066819ULL }, // Inst #12607 = VGF2P8AFFINEINVQBZ256rmbikz |
| 34550 | { 12606, 10, 1, 0, 2240, 0, 0, 4722, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93e7f8066819ULL }, // Inst #12606 = VGF2P8AFFINEINVQBZ256rmbik |
| 34551 | { 12605, 8, 1, 0, 1768, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91e7f8066819ULL }, // Inst #12605 = VGF2P8AFFINEINVQBZ256rmbi |
| 34552 | { 12604, 5, 1, 0, 2246, 0, 0, 4717, X86ImpOpBase + 0, 0, 0xa6e7f8066829ULL }, // Inst #12604 = VGF2P8AFFINEINVQBZ128rrikz |
| 34553 | { 12603, 6, 1, 0, 2242, 0, 0, 4711, X86ImpOpBase + 0, 0, 0xa2e7f8066829ULL }, // Inst #12603 = VGF2P8AFFINEINVQBZ128rrik |
| 34554 | { 12602, 4, 1, 0, 149, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0e7f8066829ULL }, // Inst #12602 = VGF2P8AFFINEINVQBZ128rri |
| 34555 | { 12601, 9, 1, 0, 2238, 0, 0, 4702, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6e7f8066819ULL }, // Inst #12601 = VGF2P8AFFINEINVQBZ128rmikz |
| 34556 | { 12600, 10, 1, 0, 2238, 0, 0, 4692, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e7f8066819ULL }, // Inst #12600 = VGF2P8AFFINEINVQBZ128rmik |
| 34557 | { 12599, 8, 1, 0, 1759, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e7f8066819ULL }, // Inst #12599 = VGF2P8AFFINEINVQBZ128rmi |
| 34558 | { 12598, 9, 1, 0, 2238, 0, 0, 4702, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96e7f8066819ULL }, // Inst #12598 = VGF2P8AFFINEINVQBZ128rmbikz |
| 34559 | { 12597, 10, 1, 0, 2238, 0, 0, 4692, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92e7f8066819ULL }, // Inst #12597 = VGF2P8AFFINEINVQBZ128rmbik |
| 34560 | { 12596, 8, 1, 0, 1759, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90e7f8066819ULL }, // Inst #12596 = VGF2P8AFFINEINVQBZ128rmbi |
| 34561 | { 12595, 4, 1, 0, 382, 0, 0, 923, X86ImpOpBase + 0, 0, 0x1e7b8066829ULL }, // Inst #12595 = VGF2P8AFFINEINVQBYrri |
| 34562 | { 12594, 8, 1, 0, 1508, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e7b8066819ULL }, // Inst #12594 = VGF2P8AFFINEINVQBYrmi |
| 34563 | { 12593, 5, 1, 0, 303, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6693e8046829ULL }, // Inst #12593 = VGETMANTSSZrrikz |
| 34564 | { 12592, 6, 1, 0, 303, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6293e8046829ULL }, // Inst #12592 = VGETMANTSSZrrik |
| 34565 | { 12591, 5, 1, 0, 303, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x7693e8046829ULL }, // Inst #12591 = VGETMANTSSZrribkz |
| 34566 | { 12590, 6, 1, 0, 303, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x7293e8046829ULL }, // Inst #12590 = VGETMANTSSZrribk |
| 34567 | { 12589, 4, 1, 0, 303, 1, 0, 919, X86ImpOpBase + 78, 0, 0x7093e8046829ULL }, // Inst #12589 = VGETMANTSSZrrib |
| 34568 | { 12588, 4, 1, 0, 303, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6093e8046829ULL }, // Inst #12588 = VGETMANTSSZrri |
| 34569 | { 12587, 9, 1, 0, 304, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6693e8046819ULL }, // Inst #12587 = VGETMANTSSZrmikz |
| 34570 | { 12586, 10, 1, 0, 304, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6293e8046819ULL }, // Inst #12586 = VGETMANTSSZrmik |
| 34571 | { 12585, 8, 1, 0, 304, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6093e8046819ULL }, // Inst #12585 = VGETMANTSSZrmi |
| 34572 | { 12584, 5, 1, 0, 1910, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4693e8046029ULL }, // Inst #12584 = VGETMANTSHZrrikz |
| 34573 | { 12583, 6, 1, 0, 1910, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4293e8046029ULL }, // Inst #12583 = VGETMANTSHZrrik |
| 34574 | { 12582, 5, 1, 0, 1910, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x5693e8046029ULL }, // Inst #12582 = VGETMANTSHZrribkz |
| 34575 | { 12581, 6, 1, 0, 1910, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x5293e8046029ULL }, // Inst #12581 = VGETMANTSHZrribk |
| 34576 | { 12580, 4, 1, 0, 1782, 1, 0, 919, X86ImpOpBase + 78, 0, 0x5093e8046029ULL }, // Inst #12580 = VGETMANTSHZrrib |
| 34577 | { 12579, 4, 1, 0, 1782, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4093e8046029ULL }, // Inst #12579 = VGETMANTSHZrri |
| 34578 | { 12578, 9, 1, 0, 1758, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4693e8046019ULL }, // Inst #12578 = VGETMANTSHZrmikz |
| 34579 | { 12577, 10, 1, 0, 1758, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4293e8046019ULL }, // Inst #12577 = VGETMANTSHZrmik |
| 34580 | { 12576, 8, 1, 0, 1758, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4093e8046019ULL }, // Inst #12576 = VGETMANTSHZrmi |
| 34581 | { 12575, 5, 1, 0, 303, 1, 0, 4687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8693f0066829ULL }, // Inst #12575 = VGETMANTSDZrrikz |
| 34582 | { 12574, 6, 1, 0, 303, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8293f0066829ULL }, // Inst #12574 = VGETMANTSDZrrik |
| 34583 | { 12573, 5, 1, 0, 303, 1, 0, 4687, X86ImpOpBase + 78, 0, 0x9693f0066829ULL }, // Inst #12573 = VGETMANTSDZrribkz |
| 34584 | { 12572, 6, 1, 0, 303, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x9293f0066829ULL }, // Inst #12572 = VGETMANTSDZrribk |
| 34585 | { 12571, 4, 1, 0, 303, 1, 0, 919, X86ImpOpBase + 78, 0, 0x9093f0066829ULL }, // Inst #12571 = VGETMANTSDZrrib |
| 34586 | { 12570, 4, 1, 0, 303, 1, 0, 919, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8093f0066829ULL }, // Inst #12570 = VGETMANTSDZrri |
| 34587 | { 12569, 9, 1, 0, 304, 1, 0, 4678, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8693f0066819ULL }, // Inst #12569 = VGETMANTSDZrmikz |
| 34588 | { 12568, 10, 1, 0, 304, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8293f0066819ULL }, // Inst #12568 = VGETMANTSDZrmik |
| 34589 | { 12567, 8, 1, 0, 304, 1, 0, 2049, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8093f0066819ULL }, // Inst #12567 = VGETMANTSDZrmi |
| 34590 | { 12566, 4, 1, 0, 452, 1, 0, 4674, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee1368046829ULL }, // Inst #12566 = VGETMANTPSZrrikz |
| 34591 | { 12565, 5, 1, 0, 452, 1, 0, 4669, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea1368046829ULL }, // Inst #12565 = VGETMANTPSZrrik |
| 34592 | { 12564, 4, 1, 0, 452, 1, 0, 4674, X86ImpOpBase + 78, 0, 0x7e1368046829ULL }, // Inst #12564 = VGETMANTPSZrribkz |
| 34593 | { 12563, 5, 1, 0, 452, 1, 0, 4669, X86ImpOpBase + 78, 0, 0x7a1368046829ULL }, // Inst #12563 = VGETMANTPSZrribk |
| 34594 | { 12562, 3, 1, 0, 452, 1, 0, 4519, X86ImpOpBase + 78, 0, 0x781368046829ULL }, // Inst #12562 = VGETMANTPSZrrib |
| 34595 | { 12561, 3, 1, 0, 452, 1, 0, 4519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe81368046829ULL }, // Inst #12561 = VGETMANTPSZrri |
| 34596 | { 12560, 8, 1, 0, 451, 1, 0, 4661, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee1368046819ULL }, // Inst #12560 = VGETMANTPSZrmikz |
| 34597 | { 12559, 9, 1, 0, 451, 1, 0, 4652, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea1368046819ULL }, // Inst #12559 = VGETMANTPSZrmik |
| 34598 | { 12558, 7, 1, 0, 451, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe81368046819ULL }, // Inst #12558 = VGETMANTPSZrmi |
| 34599 | { 12557, 8, 1, 0, 451, 1, 0, 4661, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e1368046819ULL }, // Inst #12557 = VGETMANTPSZrmbikz |
| 34600 | { 12556, 9, 1, 0, 451, 1, 0, 4652, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a1368046819ULL }, // Inst #12556 = VGETMANTPSZrmbik |
| 34601 | { 12555, 7, 1, 0, 451, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x781368046819ULL }, // Inst #12555 = VGETMANTPSZrmbi |
| 34602 | { 12554, 4, 1, 0, 449, 1, 0, 4648, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc71368046829ULL }, // Inst #12554 = VGETMANTPSZ256rrikz |
| 34603 | { 12553, 5, 1, 0, 449, 1, 0, 4643, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc31368046829ULL }, // Inst #12553 = VGETMANTPSZ256rrik |
| 34604 | { 12552, 3, 1, 0, 449, 1, 0, 4483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc11368046829ULL }, // Inst #12552 = VGETMANTPSZ256rri |
| 34605 | { 12551, 8, 1, 0, 448, 1, 0, 4635, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc71368046819ULL }, // Inst #12551 = VGETMANTPSZ256rmikz |
| 34606 | { 12550, 9, 1, 0, 448, 1, 0, 4626, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc31368046819ULL }, // Inst #12550 = VGETMANTPSZ256rmik |
| 34607 | { 12549, 7, 1, 0, 448, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc11368046819ULL }, // Inst #12549 = VGETMANTPSZ256rmi |
| 34608 | { 12548, 8, 1, 0, 448, 1, 0, 4635, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x771368046819ULL }, // Inst #12548 = VGETMANTPSZ256rmbikz |
| 34609 | { 12547, 9, 1, 0, 448, 1, 0, 4626, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x731368046819ULL }, // Inst #12547 = VGETMANTPSZ256rmbik |
| 34610 | { 12546, 7, 1, 0, 448, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x711368046819ULL }, // Inst #12546 = VGETMANTPSZ256rmbi |
| 34611 | { 12545, 4, 1, 0, 303, 1, 0, 3316, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa61368046829ULL }, // Inst #12545 = VGETMANTPSZ128rrikz |
| 34612 | { 12544, 5, 1, 0, 303, 1, 0, 3311, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa21368046829ULL }, // Inst #12544 = VGETMANTPSZ128rrik |
| 34613 | { 12543, 3, 1, 0, 303, 1, 0, 3308, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa01368046829ULL }, // Inst #12543 = VGETMANTPSZ128rri |
| 34614 | { 12542, 8, 1, 0, 304, 1, 0, 4618, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa61368046819ULL }, // Inst #12542 = VGETMANTPSZ128rmikz |
| 34615 | { 12541, 9, 1, 0, 304, 1, 0, 4609, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa21368046819ULL }, // Inst #12541 = VGETMANTPSZ128rmik |
| 34616 | { 12540, 7, 1, 0, 304, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa01368046819ULL }, // Inst #12540 = VGETMANTPSZ128rmi |
| 34617 | { 12539, 8, 1, 0, 304, 1, 0, 4618, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x761368046819ULL }, // Inst #12539 = VGETMANTPSZ128rmbikz |
| 34618 | { 12538, 9, 1, 0, 304, 1, 0, 4609, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x721368046819ULL }, // Inst #12538 = VGETMANTPSZ128rmbik |
| 34619 | { 12537, 7, 1, 0, 304, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x701368046819ULL }, // Inst #12537 = VGETMANTPSZ128rmbi |
| 34620 | { 12536, 4, 1, 0, 1929, 1, 0, 4527, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee1368046029ULL }, // Inst #12536 = VGETMANTPHZrrikz |
| 34621 | { 12535, 5, 1, 0, 1929, 1, 0, 4522, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea1368046029ULL }, // Inst #12535 = VGETMANTPHZrrik |
| 34622 | { 12534, 4, 1, 0, 1929, 1, 0, 4527, X86ImpOpBase + 78, 0, 0x5e1368046029ULL }, // Inst #12534 = VGETMANTPHZrribkz |
| 34623 | { 12533, 5, 1, 0, 1929, 1, 0, 4522, X86ImpOpBase + 78, 0, 0x5a1368046029ULL }, // Inst #12533 = VGETMANTPHZrribk |
| 34624 | { 12532, 3, 1, 0, 1922, 1, 0, 4519, X86ImpOpBase + 78, 0, 0x581368046029ULL }, // Inst #12532 = VGETMANTPHZrrib |
| 34625 | { 12531, 3, 1, 0, 1922, 1, 0, 4519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe81368046029ULL }, // Inst #12531 = VGETMANTPHZrri |
| 34626 | { 12530, 8, 1, 0, 451, 1, 0, 4511, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee1368046019ULL }, // Inst #12530 = VGETMANTPHZrmikz |
| 34627 | { 12529, 9, 1, 0, 451, 1, 0, 4502, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea1368046019ULL }, // Inst #12529 = VGETMANTPHZrmik |
| 34628 | { 12528, 7, 1, 0, 451, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe81368046019ULL }, // Inst #12528 = VGETMANTPHZrmi |
| 34629 | { 12527, 8, 1, 0, 451, 1, 0, 4511, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e1368046019ULL }, // Inst #12527 = VGETMANTPHZrmbikz |
| 34630 | { 12526, 9, 1, 0, 451, 1, 0, 4502, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a1368046019ULL }, // Inst #12526 = VGETMANTPHZrmbik |
| 34631 | { 12525, 7, 1, 0, 451, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x581368046019ULL }, // Inst #12525 = VGETMANTPHZrmbi |
| 34632 | { 12524, 4, 1, 0, 1911, 1, 0, 4491, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc71368046029ULL }, // Inst #12524 = VGETMANTPHZ256rrikz |
| 34633 | { 12523, 5, 1, 0, 1911, 1, 0, 4486, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc31368046029ULL }, // Inst #12523 = VGETMANTPHZ256rrik |
| 34634 | { 12522, 3, 1, 0, 1783, 1, 0, 4483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc11368046029ULL }, // Inst #12522 = VGETMANTPHZ256rri |
| 34635 | { 12521, 8, 1, 0, 448, 1, 0, 4475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc71368046019ULL }, // Inst #12521 = VGETMANTPHZ256rmikz |
| 34636 | { 12520, 9, 1, 0, 448, 1, 0, 4466, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc31368046019ULL }, // Inst #12520 = VGETMANTPHZ256rmik |
| 34637 | { 12519, 7, 1, 0, 448, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc11368046019ULL }, // Inst #12519 = VGETMANTPHZ256rmi |
| 34638 | { 12518, 8, 1, 0, 448, 1, 0, 4475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x571368046019ULL }, // Inst #12518 = VGETMANTPHZ256rmbikz |
| 34639 | { 12517, 9, 1, 0, 448, 1, 0, 4466, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x531368046019ULL }, // Inst #12517 = VGETMANTPHZ256rmbik |
| 34640 | { 12516, 7, 1, 0, 448, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x511368046019ULL }, // Inst #12516 = VGETMANTPHZ256rmbi |
| 34641 | { 12515, 4, 1, 0, 1910, 1, 0, 4455, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa61368046029ULL }, // Inst #12515 = VGETMANTPHZ128rrikz |
| 34642 | { 12514, 5, 1, 0, 1910, 1, 0, 4450, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa21368046029ULL }, // Inst #12514 = VGETMANTPHZ128rrik |
| 34643 | { 12513, 3, 1, 0, 1782, 1, 0, 3308, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa01368046029ULL }, // Inst #12513 = VGETMANTPHZ128rri |
| 34644 | { 12512, 8, 1, 0, 1758, 1, 0, 4442, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa61368046019ULL }, // Inst #12512 = VGETMANTPHZ128rmikz |
| 34645 | { 12511, 9, 1, 0, 1758, 1, 0, 4433, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa21368046019ULL }, // Inst #12511 = VGETMANTPHZ128rmik |
| 34646 | { 12510, 7, 1, 0, 1758, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa01368046019ULL }, // Inst #12510 = VGETMANTPHZ128rmi |
| 34647 | { 12509, 8, 1, 0, 1758, 1, 0, 4442, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x561368046019ULL }, // Inst #12509 = VGETMANTPHZ128rmbikz |
| 34648 | { 12508, 9, 1, 0, 1758, 1, 0, 4433, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x521368046019ULL }, // Inst #12508 = VGETMANTPHZ128rmbik |
| 34649 | { 12507, 7, 1, 0, 1758, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x501368046019ULL }, // Inst #12507 = VGETMANTPHZ128rmbi |
| 34650 | { 12506, 4, 1, 0, 452, 1, 0, 4605, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee1370066829ULL }, // Inst #12506 = VGETMANTPDZrrikz |
| 34651 | { 12505, 5, 1, 0, 452, 1, 0, 4600, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea1370066829ULL }, // Inst #12505 = VGETMANTPDZrrik |
| 34652 | { 12504, 4, 1, 0, 452, 1, 0, 4605, X86ImpOpBase + 78, 0, 0x9e1370066829ULL }, // Inst #12504 = VGETMANTPDZrribkz |
| 34653 | { 12503, 5, 1, 0, 452, 1, 0, 4600, X86ImpOpBase + 78, 0, 0x9a1370066829ULL }, // Inst #12503 = VGETMANTPDZrribk |
| 34654 | { 12502, 3, 1, 0, 452, 1, 0, 4519, X86ImpOpBase + 78, 0, 0x981370066829ULL }, // Inst #12502 = VGETMANTPDZrrib |
| 34655 | { 12501, 3, 1, 0, 452, 1, 0, 4519, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe81370066829ULL }, // Inst #12501 = VGETMANTPDZrri |
| 34656 | { 12500, 8, 1, 0, 451, 1, 0, 4592, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee1370066819ULL }, // Inst #12500 = VGETMANTPDZrmikz |
| 34657 | { 12499, 9, 1, 0, 451, 1, 0, 4583, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea1370066819ULL }, // Inst #12499 = VGETMANTPDZrmik |
| 34658 | { 12498, 7, 1, 0, 451, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe81370066819ULL }, // Inst #12498 = VGETMANTPDZrmi |
| 34659 | { 12497, 8, 1, 0, 451, 1, 0, 4592, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e1370066819ULL }, // Inst #12497 = VGETMANTPDZrmbikz |
| 34660 | { 12496, 9, 1, 0, 451, 1, 0, 4583, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a1370066819ULL }, // Inst #12496 = VGETMANTPDZrmbik |
| 34661 | { 12495, 7, 1, 0, 451, 1, 0, 4495, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x981370066819ULL }, // Inst #12495 = VGETMANTPDZrmbi |
| 34662 | { 12494, 4, 1, 0, 449, 1, 0, 4579, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc71370066829ULL }, // Inst #12494 = VGETMANTPDZ256rrikz |
| 34663 | { 12493, 5, 1, 0, 449, 1, 0, 4574, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc31370066829ULL }, // Inst #12493 = VGETMANTPDZ256rrik |
| 34664 | { 12492, 3, 1, 0, 449, 1, 0, 4483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc11370066829ULL }, // Inst #12492 = VGETMANTPDZ256rri |
| 34665 | { 12491, 8, 1, 0, 448, 1, 0, 4566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc71370066819ULL }, // Inst #12491 = VGETMANTPDZ256rmikz |
| 34666 | { 12490, 9, 1, 0, 448, 1, 0, 4557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc31370066819ULL }, // Inst #12490 = VGETMANTPDZ256rmik |
| 34667 | { 12489, 7, 1, 0, 448, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc11370066819ULL }, // Inst #12489 = VGETMANTPDZ256rmi |
| 34668 | { 12488, 8, 1, 0, 448, 1, 0, 4566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x971370066819ULL }, // Inst #12488 = VGETMANTPDZ256rmbikz |
| 34669 | { 12487, 9, 1, 0, 448, 1, 0, 4557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x931370066819ULL }, // Inst #12487 = VGETMANTPDZ256rmbik |
| 34670 | { 12486, 7, 1, 0, 448, 1, 0, 4459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x911370066819ULL }, // Inst #12486 = VGETMANTPDZ256rmbi |
| 34671 | { 12485, 4, 1, 0, 303, 1, 0, 4553, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa61370066829ULL }, // Inst #12485 = VGETMANTPDZ128rrikz |
| 34672 | { 12484, 5, 1, 0, 303, 1, 0, 4548, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa21370066829ULL }, // Inst #12484 = VGETMANTPDZ128rrik |
| 34673 | { 12483, 3, 1, 0, 303, 1, 0, 3308, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa01370066829ULL }, // Inst #12483 = VGETMANTPDZ128rri |
| 34674 | { 12482, 8, 1, 0, 304, 1, 0, 4540, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa61370066819ULL }, // Inst #12482 = VGETMANTPDZ128rmikz |
| 34675 | { 12481, 9, 1, 0, 304, 1, 0, 4531, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa21370066819ULL }, // Inst #12481 = VGETMANTPDZ128rmik |
| 34676 | { 12480, 7, 1, 0, 304, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa01370066819ULL }, // Inst #12480 = VGETMANTPDZ128rmi |
| 34677 | { 12479, 8, 1, 0, 304, 1, 0, 4540, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x961370066819ULL }, // Inst #12479 = VGETMANTPDZ128rmbikz |
| 34678 | { 12478, 9, 1, 0, 304, 1, 0, 4531, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x921370066819ULL }, // Inst #12478 = VGETMANTPDZ128rmbik |
| 34679 | { 12477, 7, 1, 0, 304, 1, 0, 4426, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x901370066819ULL }, // Inst #12477 = VGETMANTPDZ128rmbi |
| 34680 | { 12476, 4, 1, 0, 452, 0, 0, 4527, X86ImpOpBase + 0, 0, 0xee1378047829ULL }, // Inst #12476 = VGETMANTBF16Zrrikz |
| 34681 | { 12475, 5, 1, 0, 452, 0, 0, 4522, X86ImpOpBase + 0, 0, 0xea1378047829ULL }, // Inst #12475 = VGETMANTBF16Zrrik |
| 34682 | { 12474, 3, 1, 0, 452, 0, 0, 4519, X86ImpOpBase + 0, 0, 0xe81378047829ULL }, // Inst #12474 = VGETMANTBF16Zrri |
| 34683 | { 12473, 8, 1, 0, 451, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee1378047819ULL }, // Inst #12473 = VGETMANTBF16Zrmikz |
| 34684 | { 12472, 9, 1, 0, 451, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea1378047819ULL }, // Inst #12472 = VGETMANTBF16Zrmik |
| 34685 | { 12471, 7, 1, 0, 451, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe81378047819ULL }, // Inst #12471 = VGETMANTBF16Zrmi |
| 34686 | { 12470, 8, 1, 0, 451, 0, 0, 4511, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e1378047819ULL }, // Inst #12470 = VGETMANTBF16Zrmbikz |
| 34687 | { 12469, 9, 1, 0, 451, 0, 0, 4502, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a1378047819ULL }, // Inst #12469 = VGETMANTBF16Zrmbik |
| 34688 | { 12468, 7, 1, 0, 451, 0, 0, 4495, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x581378047819ULL }, // Inst #12468 = VGETMANTBF16Zrmbi |
| 34689 | { 12467, 4, 1, 0, 449, 0, 0, 4491, X86ImpOpBase + 0, 0, 0xc71378047829ULL }, // Inst #12467 = VGETMANTBF16Z256rrikz |
| 34690 | { 12466, 5, 1, 0, 449, 0, 0, 4486, X86ImpOpBase + 0, 0, 0xc31378047829ULL }, // Inst #12466 = VGETMANTBF16Z256rrik |
| 34691 | { 12465, 3, 1, 0, 449, 0, 0, 4483, X86ImpOpBase + 0, 0, 0xc11378047829ULL }, // Inst #12465 = VGETMANTBF16Z256rri |
| 34692 | { 12464, 8, 1, 0, 448, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc71378047819ULL }, // Inst #12464 = VGETMANTBF16Z256rmikz |
| 34693 | { 12463, 9, 1, 0, 448, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc31378047819ULL }, // Inst #12463 = VGETMANTBF16Z256rmik |
| 34694 | { 12462, 7, 1, 0, 448, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc11378047819ULL }, // Inst #12462 = VGETMANTBF16Z256rmi |
| 34695 | { 12461, 8, 1, 0, 448, 0, 0, 4475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x571378047819ULL }, // Inst #12461 = VGETMANTBF16Z256rmbikz |
| 34696 | { 12460, 9, 1, 0, 448, 0, 0, 4466, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x531378047819ULL }, // Inst #12460 = VGETMANTBF16Z256rmbik |
| 34697 | { 12459, 7, 1, 0, 448, 0, 0, 4459, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x511378047819ULL }, // Inst #12459 = VGETMANTBF16Z256rmbi |
| 34698 | { 12458, 4, 1, 0, 303, 0, 0, 4455, X86ImpOpBase + 0, 0, 0xa61378047829ULL }, // Inst #12458 = VGETMANTBF16Z128rrikz |
| 34699 | { 12457, 5, 1, 0, 303, 0, 0, 4450, X86ImpOpBase + 0, 0, 0xa21378047829ULL }, // Inst #12457 = VGETMANTBF16Z128rrik |
| 34700 | { 12456, 3, 1, 0, 303, 0, 0, 3308, X86ImpOpBase + 0, 0, 0xa01378047829ULL }, // Inst #12456 = VGETMANTBF16Z128rri |
| 34701 | { 12455, 8, 1, 0, 304, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa61378047819ULL }, // Inst #12455 = VGETMANTBF16Z128rmikz |
| 34702 | { 12454, 9, 1, 0, 304, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa21378047819ULL }, // Inst #12454 = VGETMANTBF16Z128rmik |
| 34703 | { 12453, 7, 1, 0, 304, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa01378047819ULL }, // Inst #12453 = VGETMANTBF16Z128rmi |
| 34704 | { 12452, 8, 1, 0, 304, 0, 0, 4442, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x561378047819ULL }, // Inst #12452 = VGETMANTBF16Z128rmbikz |
| 34705 | { 12451, 9, 1, 0, 304, 0, 0, 4433, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x521378047819ULL }, // Inst #12451 = VGETMANTBF16Z128rmbik |
| 34706 | { 12450, 7, 1, 0, 304, 0, 0, 4426, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x501378047819ULL }, // Inst #12450 = VGETMANTBF16Z128rmbi |
| 34707 | { 12449, 4, 1, 0, 303, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66a1e8004829ULL }, // Inst #12449 = VGETEXPSSZrkz |
| 34708 | { 12448, 5, 1, 0, 303, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62a1e8004829ULL }, // Inst #12448 = VGETEXPSSZrk |
| 34709 | { 12447, 4, 1, 0, 303, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x76a1e8004829ULL }, // Inst #12447 = VGETEXPSSZrbkz |
| 34710 | { 12446, 5, 1, 0, 303, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x72a1e8004829ULL }, // Inst #12446 = VGETEXPSSZrbk |
| 34711 | { 12445, 3, 1, 0, 303, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x70a1e8004829ULL }, // Inst #12445 = VGETEXPSSZrb |
| 34712 | { 12444, 3, 1, 0, 303, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60a1e8004829ULL }, // Inst #12444 = VGETEXPSSZr |
| 34713 | { 12443, 8, 1, 0, 304, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66a1e8004819ULL }, // Inst #12443 = VGETEXPSSZmkz |
| 34714 | { 12442, 9, 1, 0, 304, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62a1e8004819ULL }, // Inst #12442 = VGETEXPSSZmk |
| 34715 | { 12441, 7, 1, 0, 304, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60a1e8004819ULL }, // Inst #12441 = VGETEXPSSZm |
| 34716 | { 12440, 4, 1, 0, 1910, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x46a1e8014829ULL }, // Inst #12440 = VGETEXPSHZrkz |
| 34717 | { 12439, 5, 1, 0, 1910, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x42a1e8014829ULL }, // Inst #12439 = VGETEXPSHZrk |
| 34718 | { 12438, 4, 1, 0, 1910, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x56a1e8014829ULL }, // Inst #12438 = VGETEXPSHZrbkz |
| 34719 | { 12437, 5, 1, 0, 1910, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x52a1e8014829ULL }, // Inst #12437 = VGETEXPSHZrbk |
| 34720 | { 12436, 3, 1, 0, 1782, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x50a1e8014829ULL }, // Inst #12436 = VGETEXPSHZrb |
| 34721 | { 12435, 3, 1, 0, 1782, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40a1e8014829ULL }, // Inst #12435 = VGETEXPSHZr |
| 34722 | { 12434, 8, 1, 0, 1758, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46a1e8014819ULL }, // Inst #12434 = VGETEXPSHZmkz |
| 34723 | { 12433, 9, 1, 0, 1758, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42a1e8014819ULL }, // Inst #12433 = VGETEXPSHZmk |
| 34724 | { 12432, 7, 1, 0, 1758, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40a1e8014819ULL }, // Inst #12432 = VGETEXPSHZm |
| 34725 | { 12431, 4, 1, 0, 303, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86a1f0024829ULL }, // Inst #12431 = VGETEXPSDZrkz |
| 34726 | { 12430, 5, 1, 0, 303, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82a1f0024829ULL }, // Inst #12430 = VGETEXPSDZrk |
| 34727 | { 12429, 4, 1, 0, 303, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x96a1f0024829ULL }, // Inst #12429 = VGETEXPSDZrbkz |
| 34728 | { 12428, 5, 1, 0, 303, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x92a1f0024829ULL }, // Inst #12428 = VGETEXPSDZrbk |
| 34729 | { 12427, 3, 1, 0, 303, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x90a1f0024829ULL }, // Inst #12427 = VGETEXPSDZrb |
| 34730 | { 12426, 3, 1, 0, 303, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80a1f0024829ULL }, // Inst #12426 = VGETEXPSDZr |
| 34731 | { 12425, 8, 1, 0, 304, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86a1f0024819ULL }, // Inst #12425 = VGETEXPSDZmkz |
| 34732 | { 12424, 9, 1, 0, 304, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82a1f0024819ULL }, // Inst #12424 = VGETEXPSDZmk |
| 34733 | { 12423, 7, 1, 0, 304, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80a1f0024819ULL }, // Inst #12423 = VGETEXPSDZm |
| 34734 | { 12422, 3, 1, 0, 452, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2168004829ULL }, // Inst #12422 = VGETEXPPSZrkz |
| 34735 | { 12421, 4, 1, 0, 452, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2168004829ULL }, // Inst #12421 = VGETEXPPSZrk |
| 34736 | { 12420, 3, 1, 0, 452, 1, 0, 2843, X86ImpOpBase + 78, 0, 0x7e2168004829ULL }, // Inst #12420 = VGETEXPPSZrbkz |
| 34737 | { 12419, 4, 1, 0, 452, 1, 0, 2839, X86ImpOpBase + 78, 0, 0x7a2168004829ULL }, // Inst #12419 = VGETEXPPSZrbk |
| 34738 | { 12418, 2, 1, 0, 452, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x782168004829ULL }, // Inst #12418 = VGETEXPPSZrb |
| 34739 | { 12417, 2, 1, 0, 452, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82168004829ULL }, // Inst #12417 = VGETEXPPSZr |
| 34740 | { 12416, 7, 1, 0, 451, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2168004819ULL }, // Inst #12416 = VGETEXPPSZmkz |
| 34741 | { 12415, 8, 1, 0, 451, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2168004819ULL }, // Inst #12415 = VGETEXPPSZmk |
| 34742 | { 12414, 7, 1, 0, 451, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2168004819ULL }, // Inst #12414 = VGETEXPPSZmbkz |
| 34743 | { 12413, 8, 1, 0, 451, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2168004819ULL }, // Inst #12413 = VGETEXPPSZmbk |
| 34744 | { 12412, 6, 1, 0, 451, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782168004819ULL }, // Inst #12412 = VGETEXPPSZmb |
| 34745 | { 12411, 6, 1, 0, 451, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82168004819ULL }, // Inst #12411 = VGETEXPPSZm |
| 34746 | { 12410, 3, 1, 0, 449, 1, 0, 2829, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72168004829ULL }, // Inst #12410 = VGETEXPPSZ256rkz |
| 34747 | { 12409, 4, 1, 0, 449, 1, 0, 2825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32168004829ULL }, // Inst #12409 = VGETEXPPSZ256rk |
| 34748 | { 12408, 2, 1, 0, 449, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12168004829ULL }, // Inst #12408 = VGETEXPPSZ256r |
| 34749 | { 12407, 7, 1, 0, 448, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72168004819ULL }, // Inst #12407 = VGETEXPPSZ256mkz |
| 34750 | { 12406, 8, 1, 0, 448, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32168004819ULL }, // Inst #12406 = VGETEXPPSZ256mk |
| 34751 | { 12405, 7, 1, 0, 448, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772168004819ULL }, // Inst #12405 = VGETEXPPSZ256mbkz |
| 34752 | { 12404, 8, 1, 0, 448, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732168004819ULL }, // Inst #12404 = VGETEXPPSZ256mbk |
| 34753 | { 12403, 6, 1, 0, 448, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712168004819ULL }, // Inst #12403 = VGETEXPPSZ256mb |
| 34754 | { 12402, 6, 1, 0, 448, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12168004819ULL }, // Inst #12402 = VGETEXPPSZ256m |
| 34755 | { 12401, 3, 1, 0, 303, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62168004829ULL }, // Inst #12401 = VGETEXPPSZ128rkz |
| 34756 | { 12400, 4, 1, 0, 303, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22168004829ULL }, // Inst #12400 = VGETEXPPSZ128rk |
| 34757 | { 12399, 2, 1, 0, 303, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02168004829ULL }, // Inst #12399 = VGETEXPPSZ128r |
| 34758 | { 12398, 7, 1, 0, 304, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62168004819ULL }, // Inst #12398 = VGETEXPPSZ128mkz |
| 34759 | { 12397, 8, 1, 0, 304, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22168004819ULL }, // Inst #12397 = VGETEXPPSZ128mk |
| 34760 | { 12396, 7, 1, 0, 304, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762168004819ULL }, // Inst #12396 = VGETEXPPSZ128mbkz |
| 34761 | { 12395, 8, 1, 0, 304, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722168004819ULL }, // Inst #12395 = VGETEXPPSZ128mbk |
| 34762 | { 12394, 6, 1, 0, 304, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702168004819ULL }, // Inst #12394 = VGETEXPPSZ128mb |
| 34763 | { 12393, 6, 1, 0, 304, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02168004819ULL }, // Inst #12393 = VGETEXPPSZ128m |
| 34764 | { 12392, 3, 1, 0, 1929, 1, 0, 2987, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2168014829ULL }, // Inst #12392 = VGETEXPPHZrkz |
| 34765 | { 12391, 4, 1, 0, 1929, 1, 0, 2983, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2168014829ULL }, // Inst #12391 = VGETEXPPHZrk |
| 34766 | { 12390, 3, 1, 0, 1929, 1, 0, 2987, X86ImpOpBase + 78, 0, 0x5e2168014829ULL }, // Inst #12390 = VGETEXPPHZrbkz |
| 34767 | { 12389, 4, 1, 0, 1929, 1, 0, 2983, X86ImpOpBase + 78, 0, 0x5a2168014829ULL }, // Inst #12389 = VGETEXPPHZrbk |
| 34768 | { 12388, 2, 1, 0, 1922, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x582168014829ULL }, // Inst #12388 = VGETEXPPHZrb |
| 34769 | { 12387, 2, 1, 0, 1922, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82168014829ULL }, // Inst #12387 = VGETEXPPHZr |
| 34770 | { 12386, 7, 1, 0, 451, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2168014819ULL }, // Inst #12386 = VGETEXPPHZmkz |
| 34771 | { 12385, 8, 1, 0, 451, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2168014819ULL }, // Inst #12385 = VGETEXPPHZmk |
| 34772 | { 12384, 7, 1, 0, 451, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e2168014819ULL }, // Inst #12384 = VGETEXPPHZmbkz |
| 34773 | { 12383, 8, 1, 0, 451, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a2168014819ULL }, // Inst #12383 = VGETEXPPHZmbk |
| 34774 | { 12382, 6, 1, 0, 451, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x582168014819ULL }, // Inst #12382 = VGETEXPPHZmb |
| 34775 | { 12381, 6, 1, 0, 451, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82168014819ULL }, // Inst #12381 = VGETEXPPHZm |
| 34776 | { 12380, 3, 1, 0, 1911, 1, 0, 2965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72168014829ULL }, // Inst #12380 = VGETEXPPHZ256rkz |
| 34777 | { 12379, 4, 1, 0, 1911, 1, 0, 2961, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32168014829ULL }, // Inst #12379 = VGETEXPPHZ256rk |
| 34778 | { 12378, 2, 1, 0, 1783, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12168014829ULL }, // Inst #12378 = VGETEXPPHZ256r |
| 34779 | { 12377, 7, 1, 0, 448, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72168014819ULL }, // Inst #12377 = VGETEXPPHZ256mkz |
| 34780 | { 12376, 8, 1, 0, 448, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32168014819ULL }, // Inst #12376 = VGETEXPPHZ256mk |
| 34781 | { 12375, 7, 1, 0, 448, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x572168014819ULL }, // Inst #12375 = VGETEXPPHZ256mbkz |
| 34782 | { 12374, 8, 1, 0, 448, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x532168014819ULL }, // Inst #12374 = VGETEXPPHZ256mbk |
| 34783 | { 12373, 6, 1, 0, 448, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x512168014819ULL }, // Inst #12373 = VGETEXPPHZ256mb |
| 34784 | { 12372, 6, 1, 0, 448, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12168014819ULL }, // Inst #12372 = VGETEXPPHZ256m |
| 34785 | { 12371, 3, 1, 0, 1910, 1, 0, 2943, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62168014829ULL }, // Inst #12371 = VGETEXPPHZ128rkz |
| 34786 | { 12370, 4, 1, 0, 1910, 1, 0, 2939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22168014829ULL }, // Inst #12370 = VGETEXPPHZ128rk |
| 34787 | { 12369, 2, 1, 0, 1782, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02168014829ULL }, // Inst #12369 = VGETEXPPHZ128r |
| 34788 | { 12368, 7, 1, 0, 1758, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62168014819ULL }, // Inst #12368 = VGETEXPPHZ128mkz |
| 34789 | { 12367, 8, 1, 0, 1758, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22168014819ULL }, // Inst #12367 = VGETEXPPHZ128mk |
| 34790 | { 12366, 7, 1, 0, 1762, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x562168014819ULL }, // Inst #12366 = VGETEXPPHZ128mbkz |
| 34791 | { 12365, 8, 1, 0, 1758, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x522168014819ULL }, // Inst #12365 = VGETEXPPHZ128mbk |
| 34792 | { 12364, 6, 1, 0, 1758, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x502168014819ULL }, // Inst #12364 = VGETEXPPHZ128mb |
| 34793 | { 12363, 6, 1, 0, 1758, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02168014819ULL }, // Inst #12363 = VGETEXPPHZ128m |
| 34794 | { 12362, 3, 1, 0, 452, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2170024829ULL }, // Inst #12362 = VGETEXPPDZrkz |
| 34795 | { 12361, 4, 1, 0, 452, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2170024829ULL }, // Inst #12361 = VGETEXPPDZrk |
| 34796 | { 12360, 3, 1, 0, 452, 1, 0, 2808, X86ImpOpBase + 78, 0, 0x9e2170024829ULL }, // Inst #12360 = VGETEXPPDZrbkz |
| 34797 | { 12359, 4, 1, 0, 452, 1, 0, 2804, X86ImpOpBase + 78, 0, 0x9a2170024829ULL }, // Inst #12359 = VGETEXPPDZrbk |
| 34798 | { 12358, 2, 1, 0, 452, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x982170024829ULL }, // Inst #12358 = VGETEXPPDZrb |
| 34799 | { 12357, 2, 1, 0, 452, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82170024829ULL }, // Inst #12357 = VGETEXPPDZr |
| 34800 | { 12356, 7, 1, 0, 451, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2170024819ULL }, // Inst #12356 = VGETEXPPDZmkz |
| 34801 | { 12355, 8, 1, 0, 451, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2170024819ULL }, // Inst #12355 = VGETEXPPDZmk |
| 34802 | { 12354, 7, 1, 0, 451, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2170024819ULL }, // Inst #12354 = VGETEXPPDZmbkz |
| 34803 | { 12353, 8, 1, 0, 451, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2170024819ULL }, // Inst #12353 = VGETEXPPDZmbk |
| 34804 | { 12352, 6, 1, 0, 451, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982170024819ULL }, // Inst #12352 = VGETEXPPDZmb |
| 34805 | { 12351, 6, 1, 0, 451, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82170024819ULL }, // Inst #12351 = VGETEXPPDZm |
| 34806 | { 12350, 3, 1, 0, 449, 1, 0, 2786, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72170024829ULL }, // Inst #12350 = VGETEXPPDZ256rkz |
| 34807 | { 12349, 4, 1, 0, 449, 1, 0, 2782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32170024829ULL }, // Inst #12349 = VGETEXPPDZ256rk |
| 34808 | { 12348, 2, 1, 0, 449, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12170024829ULL }, // Inst #12348 = VGETEXPPDZ256r |
| 34809 | { 12347, 7, 1, 0, 448, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72170024819ULL }, // Inst #12347 = VGETEXPPDZ256mkz |
| 34810 | { 12346, 8, 1, 0, 448, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32170024819ULL }, // Inst #12346 = VGETEXPPDZ256mk |
| 34811 | { 12345, 7, 1, 0, 448, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972170024819ULL }, // Inst #12345 = VGETEXPPDZ256mbkz |
| 34812 | { 12344, 8, 1, 0, 448, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932170024819ULL }, // Inst #12344 = VGETEXPPDZ256mbk |
| 34813 | { 12343, 6, 1, 0, 448, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912170024819ULL }, // Inst #12343 = VGETEXPPDZ256mb |
| 34814 | { 12342, 6, 1, 0, 448, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12170024819ULL }, // Inst #12342 = VGETEXPPDZ256m |
| 34815 | { 12341, 3, 1, 0, 303, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62170024829ULL }, // Inst #12341 = VGETEXPPDZ128rkz |
| 34816 | { 12340, 4, 1, 0, 303, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22170024829ULL }, // Inst #12340 = VGETEXPPDZ128rk |
| 34817 | { 12339, 2, 1, 0, 303, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02170024829ULL }, // Inst #12339 = VGETEXPPDZ128r |
| 34818 | { 12338, 7, 1, 0, 304, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62170024819ULL }, // Inst #12338 = VGETEXPPDZ128mkz |
| 34819 | { 12337, 8, 1, 0, 304, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22170024819ULL }, // Inst #12337 = VGETEXPPDZ128mk |
| 34820 | { 12336, 7, 1, 0, 304, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962170024819ULL }, // Inst #12336 = VGETEXPPDZ128mbkz |
| 34821 | { 12335, 8, 1, 0, 304, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922170024819ULL }, // Inst #12335 = VGETEXPPDZ128mbk |
| 34822 | { 12334, 6, 1, 0, 304, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902170024819ULL }, // Inst #12334 = VGETEXPPDZ128mb |
| 34823 | { 12333, 6, 1, 0, 304, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02170024819ULL }, // Inst #12333 = VGETEXPPDZ128m |
| 34824 | { 12332, 3, 1, 0, 452, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee2168014029ULL }, // Inst #12332 = VGETEXPBF16Zrkz |
| 34825 | { 12331, 4, 1, 0, 452, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea2168014029ULL }, // Inst #12331 = VGETEXPBF16Zrk |
| 34826 | { 12330, 2, 1, 0, 452, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe82168014029ULL }, // Inst #12330 = VGETEXPBF16Zr |
| 34827 | { 12329, 7, 1, 0, 451, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee2168014019ULL }, // Inst #12329 = VGETEXPBF16Zmkz |
| 34828 | { 12328, 8, 1, 0, 451, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea2168014019ULL }, // Inst #12328 = VGETEXPBF16Zmk |
| 34829 | { 12327, 7, 1, 0, 451, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e2168014019ULL }, // Inst #12327 = VGETEXPBF16Zmbkz |
| 34830 | { 12326, 8, 1, 0, 451, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a2168014019ULL }, // Inst #12326 = VGETEXPBF16Zmbk |
| 34831 | { 12325, 6, 1, 0, 451, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x582168014019ULL }, // Inst #12325 = VGETEXPBF16Zmb |
| 34832 | { 12324, 6, 1, 0, 451, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe82168014019ULL }, // Inst #12324 = VGETEXPBF16Zm |
| 34833 | { 12323, 3, 1, 0, 449, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc72168014029ULL }, // Inst #12323 = VGETEXPBF16Z256rkz |
| 34834 | { 12322, 4, 1, 0, 449, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc32168014029ULL }, // Inst #12322 = VGETEXPBF16Z256rk |
| 34835 | { 12321, 2, 1, 0, 449, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc12168014029ULL }, // Inst #12321 = VGETEXPBF16Z256r |
| 34836 | { 12320, 7, 1, 0, 448, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc72168014019ULL }, // Inst #12320 = VGETEXPBF16Z256mkz |
| 34837 | { 12319, 8, 1, 0, 448, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc32168014019ULL }, // Inst #12319 = VGETEXPBF16Z256mk |
| 34838 | { 12318, 7, 1, 0, 448, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x572168014019ULL }, // Inst #12318 = VGETEXPBF16Z256mbkz |
| 34839 | { 12317, 8, 1, 0, 448, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x532168014019ULL }, // Inst #12317 = VGETEXPBF16Z256mbk |
| 34840 | { 12316, 6, 1, 0, 448, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x512168014019ULL }, // Inst #12316 = VGETEXPBF16Z256mb |
| 34841 | { 12315, 6, 1, 0, 448, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc12168014019ULL }, // Inst #12315 = VGETEXPBF16Z256m |
| 34842 | { 12314, 3, 1, 0, 303, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa62168014029ULL }, // Inst #12314 = VGETEXPBF16Z128rkz |
| 34843 | { 12313, 4, 1, 0, 303, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa22168014029ULL }, // Inst #12313 = VGETEXPBF16Z128rk |
| 34844 | { 12312, 2, 1, 0, 303, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02168014029ULL }, // Inst #12312 = VGETEXPBF16Z128r |
| 34845 | { 12311, 7, 1, 0, 304, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa62168014019ULL }, // Inst #12311 = VGETEXPBF16Z128mkz |
| 34846 | { 12310, 8, 1, 0, 304, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa22168014019ULL }, // Inst #12310 = VGETEXPBF16Z128mk |
| 34847 | { 12309, 7, 1, 0, 304, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x562168014019ULL }, // Inst #12309 = VGETEXPBF16Z128mbkz |
| 34848 | { 12308, 8, 1, 0, 304, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x522168014019ULL }, // Inst #12308 = VGETEXPBF16Z128mbk |
| 34849 | { 12307, 6, 1, 0, 304, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x502168014019ULL }, // Inst #12307 = VGETEXPBF16Z128mb |
| 34850 | { 12306, 6, 1, 0, 304, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa02168014019ULL }, // Inst #12306 = VGETEXPBF16Z128m |
| 34851 | { 12305, 9, 2, 0, 899, 0, 0, 4318, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x49a800481aULL }, // Inst #12305 = VGATHERQPSrm |
| 34852 | { 12304, 9, 2, 0, 2237, 0, 0, 4417, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6a49e8004819ULL }, // Inst #12304 = VGATHERQPSZrm |
| 34853 | { 12303, 9, 2, 0, 2235, 0, 0, 4408, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6349e8004819ULL }, // Inst #12303 = VGATHERQPSZ256rm |
| 34854 | { 12302, 9, 2, 0, 1400, 0, 0, 4291, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6249e8004819ULL }, // Inst #12302 = VGATHERQPSZ128rm |
| 34855 | { 12301, 9, 2, 0, 898, 0, 0, 4399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x149a800481aULL }, // Inst #12301 = VGATHERQPSYrm |
| 34856 | { 12300, 9, 2, 0, 897, 0, 0, 4318, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x49b002481aULL }, // Inst #12300 = VGATHERQPDrm |
| 34857 | { 12299, 9, 2, 0, 2236, 0, 0, 4390, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a49f0024819ULL }, // Inst #12299 = VGATHERQPDZrm |
| 34858 | { 12298, 9, 2, 0, 2234, 0, 0, 4381, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8349f0024819ULL }, // Inst #12298 = VGATHERQPDZ256rm |
| 34859 | { 12297, 9, 2, 0, 2233, 0, 0, 4291, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8249f0024819ULL }, // Inst #12297 = VGATHERQPDZ128rm |
| 34860 | { 12296, 9, 2, 0, 909, 0, 0, 4327, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x149b002481aULL }, // Inst #12296 = VGATHERQPDYrm |
| 34861 | { 12295, 6, 0, 0, 72, 0, 0, 4375, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a63f8004822ULL }, // Inst #12295 = VGATHERPF1QPSm |
| 34862 | { 12294, 6, 0, 0, 72, 0, 0, 4375, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8024822ULL }, // Inst #12294 = VGATHERPF1QPDm |
| 34863 | { 12293, 6, 0, 0, 72, 0, 0, 4369, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378004822ULL }, // Inst #12293 = VGATHERPF1DPSm |
| 34864 | { 12292, 6, 0, 0, 72, 0, 0, 4363, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a6378024822ULL }, // Inst #12292 = VGATHERPF1DPDm |
| 34865 | { 12291, 6, 0, 0, 72, 0, 0, 4375, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a63f8004821ULL }, // Inst #12291 = VGATHERPF0QPSm |
| 34866 | { 12290, 6, 0, 0, 72, 0, 0, 4375, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8024821ULL }, // Inst #12290 = VGATHERPF0QPDm |
| 34867 | { 12289, 6, 0, 0, 72, 0, 0, 4369, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378004821ULL }, // Inst #12289 = VGATHERPF0DPSm |
| 34868 | { 12288, 6, 0, 0, 72, 0, 0, 4363, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a6378024821ULL }, // Inst #12288 = VGATHERPF0DPDm |
| 34869 | { 12287, 9, 2, 0, 895, 0, 0, 4318, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x492800481aULL }, // Inst #12287 = VGATHERDPSrm |
| 34870 | { 12286, 9, 2, 0, 1403, 0, 0, 4354, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6a4968004819ULL }, // Inst #12286 = VGATHERDPSZrm |
| 34871 | { 12285, 9, 2, 0, 1402, 0, 0, 4345, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x634968004819ULL }, // Inst #12285 = VGATHERDPSZ256rm |
| 34872 | { 12284, 9, 2, 0, 1401, 0, 0, 4336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x624968004819ULL }, // Inst #12284 = VGATHERDPSZ128rm |
| 34873 | { 12283, 9, 2, 0, 896, 0, 0, 4327, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1492800481aULL }, // Inst #12283 = VGATHERDPSYrm |
| 34874 | { 12282, 9, 2, 0, 893, 0, 0, 4318, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x493002481aULL }, // Inst #12282 = VGATHERDPDrm |
| 34875 | { 12281, 9, 2, 0, 2236, 0, 0, 4309, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a4970024819ULL }, // Inst #12281 = VGATHERDPDZrm |
| 34876 | { 12280, 9, 2, 0, 2234, 0, 0, 4300, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x834970024819ULL }, // Inst #12280 = VGATHERDPDZ256rm |
| 34877 | { 12279, 9, 2, 0, 2233, 0, 0, 4291, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x824970024819ULL }, // Inst #12279 = VGATHERDPDZ128rm |
| 34878 | { 12278, 9, 2, 0, 894, 0, 0, 4282, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1493002481aULL }, // Inst #12278 = VGATHERDPDYrm |
| 34879 | { 12277, 2, 1, 0, 1178, 0, 0, 557, X86ImpOpBase + 0, 0, 0x414800a029ULL }, // Inst #12277 = VFRCZSSrr |
| 34880 | { 12276, 6, 1, 0, 1179, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x414800a019ULL }, // Inst #12276 = VFRCZSSrm |
| 34881 | { 12275, 2, 1, 0, 1178, 0, 0, 557, X86ImpOpBase + 0, 0, 0x41d000a029ULL }, // Inst #12275 = VFRCZSDrr |
| 34882 | { 12274, 6, 1, 0, 1179, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x41d000a019ULL }, // Inst #12274 = VFRCZSDrm |
| 34883 | { 12273, 2, 1, 0, 1177, 0, 0, 557, X86ImpOpBase + 0, 0, 0x404800a029ULL }, // Inst #12273 = VFRCZPSrr |
| 34884 | { 12272, 6, 1, 0, 1179, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x404800a019ULL }, // Inst #12272 = VFRCZPSrm |
| 34885 | { 12271, 2, 1, 0, 1180, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x1404800a029ULL }, // Inst #12271 = VFRCZPSYrr |
| 34886 | { 12270, 6, 1, 0, 1181, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1404800a019ULL }, // Inst #12270 = VFRCZPSYrm |
| 34887 | { 12269, 2, 1, 0, 1177, 0, 0, 557, X86ImpOpBase + 0, 0, 0x40d000a029ULL }, // Inst #12269 = VFRCZPDrr |
| 34888 | { 12268, 6, 1, 0, 1179, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x40d000a019ULL }, // Inst #12268 = VFRCZPDrm |
| 34889 | { 12267, 2, 1, 0, 1180, 0, 0, 3116, X86ImpOpBase + 0, 0, 0x140d000a029ULL }, // Inst #12267 = VFRCZPDYrr |
| 34890 | { 12266, 6, 1, 0, 1181, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x140d000a019ULL }, // Inst #12266 = VFRCZPDYrm |
| 34891 | { 12265, 4, 1, 0, 1721, 1, 0, 4278, X86ImpOpBase + 78, 0, 0x6233e8046829ULL }, // Inst #12265 = VFPCLASSSSZrik |
| 34892 | { 12264, 3, 1, 0, 1721, 1, 0, 4275, X86ImpOpBase + 78, 0, 0x6033e8046829ULL }, // Inst #12264 = VFPCLASSSSZri |
| 34893 | { 12263, 8, 1, 0, 1338, 1, 0, 4267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x6233e8046819ULL }, // Inst #12263 = VFPCLASSSSZmik |
| 34894 | { 12262, 7, 1, 0, 1839, 1, 0, 4260, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x6033e8046819ULL }, // Inst #12262 = VFPCLASSSSZmi |
| 34895 | { 12261, 4, 1, 0, 1722, 1, 0, 4278, X86ImpOpBase + 78, 0, 0x4233e8046029ULL }, // Inst #12261 = VFPCLASSSHZrik |
| 34896 | { 12260, 3, 1, 0, 1722, 1, 0, 4275, X86ImpOpBase + 78, 0, 0x4033e8046029ULL }, // Inst #12260 = VFPCLASSSHZri |
| 34897 | { 12259, 8, 1, 0, 1971, 1, 0, 4267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x4233e8046019ULL }, // Inst #12259 = VFPCLASSSHZmik |
| 34898 | { 12258, 7, 1, 0, 1840, 1, 0, 4260, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x4033e8046019ULL }, // Inst #12258 = VFPCLASSSHZmi |
| 34899 | { 12257, 4, 1, 0, 1721, 1, 0, 4278, X86ImpOpBase + 78, 0, 0x8233f0066829ULL }, // Inst #12257 = VFPCLASSSDZrik |
| 34900 | { 12256, 3, 1, 0, 1721, 1, 0, 4275, X86ImpOpBase + 78, 0, 0x8033f0066829ULL }, // Inst #12256 = VFPCLASSSDZri |
| 34901 | { 12255, 8, 1, 0, 1338, 1, 0, 4267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x8233f0066819ULL }, // Inst #12255 = VFPCLASSSDZmik |
| 34902 | { 12254, 7, 1, 0, 1839, 1, 0, 4260, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x8033f0066819ULL }, // Inst #12254 = VFPCLASSSDZmi |
| 34903 | { 12253, 4, 1, 0, 1249, 1, 0, 4256, X86ImpOpBase + 78, 0, 0xea3368046829ULL }, // Inst #12253 = VFPCLASSPSZrik |
| 34904 | { 12252, 3, 1, 0, 1249, 1, 0, 4253, X86ImpOpBase + 78, 0, 0xe83368046829ULL }, // Inst #12252 = VFPCLASSPSZri |
| 34905 | { 12251, 8, 1, 0, 1352, 1, 0, 4151, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xea3368046819ULL }, // Inst #12251 = VFPCLASSPSZmik |
| 34906 | { 12250, 7, 1, 0, 1712, 1, 0, 4144, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe83368046819ULL }, // Inst #12250 = VFPCLASSPSZmi |
| 34907 | { 12249, 8, 1, 0, 1352, 1, 0, 4151, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7a3368046819ULL }, // Inst #12249 = VFPCLASSPSZmbik |
| 34908 | { 12248, 7, 1, 0, 1953, 1, 0, 4144, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x783368046819ULL }, // Inst #12248 = VFPCLASSPSZmbi |
| 34909 | { 12247, 4, 1, 0, 1248, 1, 0, 4249, X86ImpOpBase + 78, 0, 0xc33368046829ULL }, // Inst #12247 = VFPCLASSPSZ256rik |
| 34910 | { 12246, 3, 1, 0, 1248, 1, 0, 4246, X86ImpOpBase + 78, 0, 0xc13368046829ULL }, // Inst #12246 = VFPCLASSPSZ256ri |
| 34911 | { 12245, 8, 1, 0, 1351, 1, 0, 4129, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc33368046819ULL }, // Inst #12245 = VFPCLASSPSZ256mik |
| 34912 | { 12244, 7, 1, 0, 1711, 1, 0, 4122, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc13368046819ULL }, // Inst #12244 = VFPCLASSPSZ256mi |
| 34913 | { 12243, 8, 1, 0, 1351, 1, 0, 4129, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x733368046819ULL }, // Inst #12243 = VFPCLASSPSZ256mbik |
| 34914 | { 12242, 7, 1, 0, 1952, 1, 0, 4122, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x713368046819ULL }, // Inst #12242 = VFPCLASSPSZ256mbi |
| 34915 | { 12241, 4, 1, 0, 1247, 1, 0, 4242, X86ImpOpBase + 78, 0, 0xa23368046829ULL }, // Inst #12241 = VFPCLASSPSZ128rik |
| 34916 | { 12240, 3, 1, 0, 1247, 1, 0, 4239, X86ImpOpBase + 78, 0, 0xa03368046829ULL }, // Inst #12240 = VFPCLASSPSZ128ri |
| 34917 | { 12239, 8, 1, 0, 1342, 1, 0, 4217, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa23368046819ULL }, // Inst #12239 = VFPCLASSPSZ128mik |
| 34918 | { 12238, 7, 1, 0, 1838, 1, 0, 4210, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa03368046819ULL }, // Inst #12238 = VFPCLASSPSZ128mi |
| 34919 | { 12237, 8, 1, 0, 1342, 1, 0, 4217, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x723368046819ULL }, // Inst #12237 = VFPCLASSPSZ128mbik |
| 34920 | { 12236, 7, 1, 0, 1706, 1, 0, 4210, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x703368046819ULL }, // Inst #12236 = VFPCLASSPSZ128mbi |
| 34921 | { 12235, 4, 1, 0, 371, 1, 0, 4184, X86ImpOpBase + 78, 0, 0xea3368046029ULL }, // Inst #12235 = VFPCLASSPHZrik |
| 34922 | { 12234, 3, 1, 0, 371, 1, 0, 4181, X86ImpOpBase + 78, 0, 0xe83368046029ULL }, // Inst #12234 = VFPCLASSPHZri |
| 34923 | { 12233, 8, 1, 0, 1970, 1, 0, 4173, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xea3368046019ULL }, // Inst #12233 = VFPCLASSPHZmik |
| 34924 | { 12232, 7, 1, 0, 1714, 1, 0, 4166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe83368046019ULL }, // Inst #12232 = VFPCLASSPHZmi |
| 34925 | { 12231, 8, 1, 0, 1970, 1, 0, 4173, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x5a3368046019ULL }, // Inst #12231 = VFPCLASSPHZmbik |
| 34926 | { 12230, 7, 1, 0, 1955, 1, 0, 4166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x583368046019ULL }, // Inst #12230 = VFPCLASSPHZmbi |
| 34927 | { 12229, 4, 1, 0, 1720, 1, 0, 4162, X86ImpOpBase + 78, 0, 0xc33368046029ULL }, // Inst #12229 = VFPCLASSPHZ256rik |
| 34928 | { 12228, 3, 1, 0, 1720, 1, 0, 4159, X86ImpOpBase + 78, 0, 0xc13368046029ULL }, // Inst #12228 = VFPCLASSPHZ256ri |
| 34929 | { 12227, 8, 1, 0, 1969, 1, 0, 4151, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc33368046019ULL }, // Inst #12227 = VFPCLASSPHZ256mik |
| 34930 | { 12226, 7, 1, 0, 1713, 1, 0, 4144, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc13368046019ULL }, // Inst #12226 = VFPCLASSPHZ256mi |
| 34931 | { 12225, 8, 1, 0, 1969, 1, 0, 4151, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x533368046019ULL }, // Inst #12225 = VFPCLASSPHZ256mbik |
| 34932 | { 12224, 7, 1, 0, 1954, 1, 0, 4144, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x513368046019ULL }, // Inst #12224 = VFPCLASSPHZ256mbi |
| 34933 | { 12223, 4, 1, 0, 1719, 1, 0, 4140, X86ImpOpBase + 78, 0, 0xa23368046029ULL }, // Inst #12223 = VFPCLASSPHZ128rik |
| 34934 | { 12222, 3, 1, 0, 1719, 1, 0, 4137, X86ImpOpBase + 78, 0, 0xa03368046029ULL }, // Inst #12222 = VFPCLASSPHZ128ri |
| 34935 | { 12221, 8, 1, 0, 1968, 1, 0, 4129, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa23368046019ULL }, // Inst #12221 = VFPCLASSPHZ128mik |
| 34936 | { 12220, 7, 1, 0, 1710, 1, 0, 4122, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa03368046019ULL }, // Inst #12220 = VFPCLASSPHZ128mi |
| 34937 | { 12219, 8, 1, 0, 1968, 1, 0, 4129, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x523368046019ULL }, // Inst #12219 = VFPCLASSPHZ128mbik |
| 34938 | { 12218, 7, 1, 0, 1707, 1, 0, 4122, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x503368046019ULL }, // Inst #12218 = VFPCLASSPHZ128mbi |
| 34939 | { 12217, 4, 1, 0, 1249, 1, 0, 4235, X86ImpOpBase + 78, 0, 0xea3370066829ULL }, // Inst #12217 = VFPCLASSPDZrik |
| 34940 | { 12216, 3, 1, 0, 1249, 1, 0, 4232, X86ImpOpBase + 78, 0, 0xe83370066829ULL }, // Inst #12216 = VFPCLASSPDZri |
| 34941 | { 12215, 8, 1, 0, 1352, 1, 0, 4129, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xea3370066819ULL }, // Inst #12215 = VFPCLASSPDZmik |
| 34942 | { 12214, 7, 1, 0, 1712, 1, 0, 4122, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe83370066819ULL }, // Inst #12214 = VFPCLASSPDZmi |
| 34943 | { 12213, 8, 1, 0, 1352, 1, 0, 4129, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x9a3370066819ULL }, // Inst #12213 = VFPCLASSPDZmbik |
| 34944 | { 12212, 7, 1, 0, 1953, 1, 0, 4122, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x983370066819ULL }, // Inst #12212 = VFPCLASSPDZmbi |
| 34945 | { 12211, 4, 1, 0, 1248, 1, 0, 4228, X86ImpOpBase + 78, 0, 0xc33370066829ULL }, // Inst #12211 = VFPCLASSPDZ256rik |
| 34946 | { 12210, 3, 1, 0, 1248, 1, 0, 4225, X86ImpOpBase + 78, 0, 0xc13370066829ULL }, // Inst #12210 = VFPCLASSPDZ256ri |
| 34947 | { 12209, 8, 1, 0, 1351, 1, 0, 4217, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc33370066819ULL }, // Inst #12209 = VFPCLASSPDZ256mik |
| 34948 | { 12208, 7, 1, 0, 1711, 1, 0, 4210, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc13370066819ULL }, // Inst #12208 = VFPCLASSPDZ256mi |
| 34949 | { 12207, 8, 1, 0, 1351, 1, 0, 4217, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x933370066819ULL }, // Inst #12207 = VFPCLASSPDZ256mbik |
| 34950 | { 12206, 7, 1, 0, 1952, 1, 0, 4210, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x913370066819ULL }, // Inst #12206 = VFPCLASSPDZ256mbi |
| 34951 | { 12205, 4, 1, 0, 1247, 1, 0, 4206, X86ImpOpBase + 78, 0, 0xa23370066829ULL }, // Inst #12205 = VFPCLASSPDZ128rik |
| 34952 | { 12204, 3, 1, 0, 1247, 1, 0, 4203, X86ImpOpBase + 78, 0, 0xa03370066829ULL }, // Inst #12204 = VFPCLASSPDZ128ri |
| 34953 | { 12203, 8, 1, 0, 1342, 1, 0, 4195, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa23370066819ULL }, // Inst #12203 = VFPCLASSPDZ128mik |
| 34954 | { 12202, 7, 1, 0, 1838, 1, 0, 4188, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa03370066819ULL }, // Inst #12202 = VFPCLASSPDZ128mi |
| 34955 | { 12201, 8, 1, 0, 1342, 1, 0, 4195, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x923370066819ULL }, // Inst #12201 = VFPCLASSPDZ128mbik |
| 34956 | { 12200, 7, 1, 0, 1706, 1, 0, 4188, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x903370066819ULL }, // Inst #12200 = VFPCLASSPDZ128mbi |
| 34957 | { 12199, 4, 1, 0, 371, 0, 0, 4184, X86ImpOpBase + 0, 0, 0xea3378047829ULL }, // Inst #12199 = VFPCLASSBF16Zrik |
| 34958 | { 12198, 3, 1, 0, 371, 0, 0, 4181, X86ImpOpBase + 0, 0, 0xe83378047829ULL }, // Inst #12198 = VFPCLASSBF16Zri |
| 34959 | { 12197, 8, 1, 0, 370, 0, 0, 4173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3378047819ULL }, // Inst #12197 = VFPCLASSBF16Zmik |
| 34960 | { 12196, 7, 1, 0, 370, 0, 0, 4166, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83378047819ULL }, // Inst #12196 = VFPCLASSBF16Zmi |
| 34961 | { 12195, 8, 1, 0, 370, 0, 0, 4173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a3378047819ULL }, // Inst #12195 = VFPCLASSBF16Zmbik |
| 34962 | { 12194, 7, 1, 0, 370, 0, 0, 4166, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x583378047819ULL }, // Inst #12194 = VFPCLASSBF16Zmbi |
| 34963 | { 12193, 4, 1, 0, 369, 0, 0, 4162, X86ImpOpBase + 0, 0, 0xc33378047829ULL }, // Inst #12193 = VFPCLASSBF16Z256rik |
| 34964 | { 12192, 3, 1, 0, 369, 0, 0, 4159, X86ImpOpBase + 0, 0, 0xc13378047829ULL }, // Inst #12192 = VFPCLASSBF16Z256ri |
| 34965 | { 12191, 8, 1, 0, 368, 0, 0, 4151, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33378047819ULL }, // Inst #12191 = VFPCLASSBF16Z256mik |
| 34966 | { 12190, 7, 1, 0, 368, 0, 0, 4144, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13378047819ULL }, // Inst #12190 = VFPCLASSBF16Z256mi |
| 34967 | { 12189, 8, 1, 0, 368, 0, 0, 4151, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x533378047819ULL }, // Inst #12189 = VFPCLASSBF16Z256mbik |
| 34968 | { 12188, 7, 1, 0, 368, 0, 0, 4144, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x513378047819ULL }, // Inst #12188 = VFPCLASSBF16Z256mbi |
| 34969 | { 12187, 4, 1, 0, 79, 0, 0, 4140, X86ImpOpBase + 0, 0, 0xa23378047829ULL }, // Inst #12187 = VFPCLASSBF16Z128rik |
| 34970 | { 12186, 3, 1, 0, 79, 0, 0, 4137, X86ImpOpBase + 0, 0, 0xa03378047829ULL }, // Inst #12186 = VFPCLASSBF16Z128ri |
| 34971 | { 12185, 8, 1, 0, 78, 0, 0, 4129, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23378047819ULL }, // Inst #12185 = VFPCLASSBF16Z128mik |
| 34972 | { 12184, 7, 1, 0, 78, 0, 0, 4122, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03378047819ULL }, // Inst #12184 = VFPCLASSBF16Z128mi |
| 34973 | { 12183, 8, 1, 0, 78, 0, 0, 4129, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x523378047819ULL }, // Inst #12183 = VFPCLASSBF16Z128mbik |
| 34974 | { 12182, 7, 1, 0, 78, 0, 0, 4122, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x503378047819ULL }, // Inst #12182 = VFPCLASSBF16Z128mbi |
| 34975 | { 12181, 4, 1, 0, 444, 1, 0, 4118, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbf280c6829ULL }, // Inst #12181 = VFNMSUBSS4rr_REV |
| 34976 | { 12180, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbf280c6829ULL }, // Inst #12180 = VFNMSUBSS4rr_Int_REV |
| 34977 | { 12179, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbf280e682bULL }, // Inst #12179 = VFNMSUBSS4rr_Int |
| 34978 | { 12178, 4, 1, 0, 444, 1, 0, 4118, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbf280e682bULL }, // Inst #12178 = VFNMSUBSS4rr |
| 34979 | { 12177, 8, 1, 0, 443, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbf280e681bULL }, // Inst #12177 = VFNMSUBSS4rm_Int |
| 34980 | { 12176, 8, 1, 0, 443, 1, 0, 4110, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbf280e681bULL }, // Inst #12176 = VFNMSUBSS4rm |
| 34981 | { 12175, 8, 1, 0, 447, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbf280c6819ULL }, // Inst #12175 = VFNMSUBSS4mr_Int |
| 34982 | { 12174, 8, 1, 0, 447, 1, 0, 4102, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbf280c6819ULL }, // Inst #12174 = VFNMSUBSS4mr |
| 34983 | { 12173, 4, 1, 0, 444, 1, 0, 4098, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbfb00c6829ULL }, // Inst #12173 = VFNMSUBSD4rr_REV |
| 34984 | { 12172, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbfb00c6829ULL }, // Inst #12172 = VFNMSUBSD4rr_Int_REV |
| 34985 | { 12171, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbfb00e682bULL }, // Inst #12171 = VFNMSUBSD4rr_Int |
| 34986 | { 12170, 4, 1, 0, 444, 1, 0, 4098, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbfb00e682bULL }, // Inst #12170 = VFNMSUBSD4rr |
| 34987 | { 12169, 8, 1, 0, 443, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbfb00e681bULL }, // Inst #12169 = VFNMSUBSD4rm_Int |
| 34988 | { 12168, 8, 1, 0, 443, 1, 0, 4090, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbfb00e681bULL }, // Inst #12168 = VFNMSUBSD4rm |
| 34989 | { 12167, 8, 1, 0, 447, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbfb00c6819ULL }, // Inst #12167 = VFNMSUBSD4mr_Int |
| 34990 | { 12166, 8, 1, 0, 447, 1, 0, 4082, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbfb00c6819ULL }, // Inst #12166 = VFNMSUBSD4mr |
| 34991 | { 12165, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbe280c6829ULL }, // Inst #12165 = VFNMSUBPS4rr_REV |
| 34992 | { 12164, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbe280e682bULL }, // Inst #12164 = VFNMSUBPS4rr |
| 34993 | { 12163, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbe280e681bULL }, // Inst #12163 = VFNMSUBPS4rm |
| 34994 | { 12162, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbe280c6819ULL }, // Inst #12162 = VFNMSUBPS4mr |
| 34995 | { 12161, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1be280c6829ULL }, // Inst #12161 = VFNMSUBPS4Yrr_REV |
| 34996 | { 12160, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1be280e682bULL }, // Inst #12160 = VFNMSUBPS4Yrr |
| 34997 | { 12159, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1be280e681bULL }, // Inst #12159 = VFNMSUBPS4Yrm |
| 34998 | { 12158, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1be280c6819ULL }, // Inst #12158 = VFNMSUBPS4Ymr |
| 34999 | { 12157, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbeb00c6829ULL }, // Inst #12157 = VFNMSUBPD4rr_REV |
| 35000 | { 12156, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbeb00e682bULL }, // Inst #12156 = VFNMSUBPD4rr |
| 35001 | { 12155, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbeb00e681bULL }, // Inst #12155 = VFNMSUBPD4rm |
| 35002 | { 12154, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbeb00c6819ULL }, // Inst #12154 = VFNMSUBPD4mr |
| 35003 | { 12153, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1beb00c6829ULL }, // Inst #12153 = VFNMSUBPD4Yrr_REV |
| 35004 | { 12152, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1beb00e682bULL }, // Inst #12152 = VFNMSUBPD4Yrr |
| 35005 | { 12151, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1beb00e681bULL }, // Inst #12151 = VFNMSUBPD4Yrm |
| 35006 | { 12150, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1beb00c6819ULL }, // Inst #12150 = VFNMSUBPD4Ymr |
| 35007 | { 12149, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfa8004829ULL }, // Inst #12149 = VFNMSUB231SSr_Int |
| 35008 | { 12148, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfa8004829ULL }, // Inst #12148 = VFNMSUB231SSr |
| 35009 | { 12147, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfa8004819ULL }, // Inst #12147 = VFNMSUB231SSm_Int |
| 35010 | { 12146, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfa8004819ULL }, // Inst #12146 = VFNMSUB231SSm |
| 35011 | { 12145, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dfe8004829ULL }, // Inst #12145 = VFNMSUB231SSZrkz_Int |
| 35012 | { 12144, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dfe8004829ULL }, // Inst #12144 = VFNMSUB231SSZrk_Int |
| 35013 | { 12143, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176dfe8004829ULL }, // Inst #12143 = VFNMSUB231SSZrbkz_Int |
| 35014 | { 12142, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172dfe8004829ULL }, // Inst #12142 = VFNMSUB231SSZrbk_Int |
| 35015 | { 12141, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170dfe8004829ULL }, // Inst #12141 = VFNMSUB231SSZrb_Int |
| 35016 | { 12140, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170dfe8004829ULL }, // Inst #12140 = VFNMSUB231SSZrb |
| 35017 | { 12139, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dfe8004829ULL }, // Inst #12139 = VFNMSUB231SSZr_Int |
| 35018 | { 12138, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dfe8004829ULL }, // Inst #12138 = VFNMSUB231SSZr |
| 35019 | { 12137, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dfe8004819ULL }, // Inst #12137 = VFNMSUB231SSZmkz_Int |
| 35020 | { 12136, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dfe8004819ULL }, // Inst #12136 = VFNMSUB231SSZmk_Int |
| 35021 | { 12135, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dfe8004819ULL }, // Inst #12135 = VFNMSUB231SSZm_Int |
| 35022 | { 12134, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dfe8004819ULL }, // Inst #12134 = VFNMSUB231SSZm |
| 35023 | { 12133, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dfe8014829ULL }, // Inst #12133 = VFNMSUB231SHZrkz_Int |
| 35024 | { 12132, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dfe8014829ULL }, // Inst #12132 = VFNMSUB231SHZrk_Int |
| 35025 | { 12131, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156dfe8014829ULL }, // Inst #12131 = VFNMSUB231SHZrbkz_Int |
| 35026 | { 12130, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152dfe8014829ULL }, // Inst #12130 = VFNMSUB231SHZrbk_Int |
| 35027 | { 12129, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150dfe8014829ULL }, // Inst #12129 = VFNMSUB231SHZrb_Int |
| 35028 | { 12128, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150dfe8014829ULL }, // Inst #12128 = VFNMSUB231SHZrb |
| 35029 | { 12127, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dfe8014829ULL }, // Inst #12127 = VFNMSUB231SHZr_Int |
| 35030 | { 12126, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dfe8014829ULL }, // Inst #12126 = VFNMSUB231SHZr |
| 35031 | { 12125, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dfe8014819ULL }, // Inst #12125 = VFNMSUB231SHZmkz_Int |
| 35032 | { 12124, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dfe8014819ULL }, // Inst #12124 = VFNMSUB231SHZmk_Int |
| 35033 | { 12123, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dfe8014819ULL }, // Inst #12123 = VFNMSUB231SHZm_Int |
| 35034 | { 12122, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dfe8014819ULL }, // Inst #12122 = VFNMSUB231SHZm |
| 35035 | { 12121, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfb0024829ULL }, // Inst #12121 = VFNMSUB231SDr_Int |
| 35036 | { 12120, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfb0024829ULL }, // Inst #12120 = VFNMSUB231SDr |
| 35037 | { 12119, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfb0024819ULL }, // Inst #12119 = VFNMSUB231SDm_Int |
| 35038 | { 12118, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfb0024819ULL }, // Inst #12118 = VFNMSUB231SDm |
| 35039 | { 12117, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86dff0024829ULL }, // Inst #12117 = VFNMSUB231SDZrkz_Int |
| 35040 | { 12116, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82dff0024829ULL }, // Inst #12116 = VFNMSUB231SDZrk_Int |
| 35041 | { 12115, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196dff0024829ULL }, // Inst #12115 = VFNMSUB231SDZrbkz_Int |
| 35042 | { 12114, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192dff0024829ULL }, // Inst #12114 = VFNMSUB231SDZrbk_Int |
| 35043 | { 12113, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190dff0024829ULL }, // Inst #12113 = VFNMSUB231SDZrb_Int |
| 35044 | { 12112, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190dff0024829ULL }, // Inst #12112 = VFNMSUB231SDZrb |
| 35045 | { 12111, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dff0024829ULL }, // Inst #12111 = VFNMSUB231SDZr_Int |
| 35046 | { 12110, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dff0024829ULL }, // Inst #12110 = VFNMSUB231SDZr |
| 35047 | { 12109, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86dff0024819ULL }, // Inst #12109 = VFNMSUB231SDZmkz_Int |
| 35048 | { 12108, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82dff0024819ULL }, // Inst #12108 = VFNMSUB231SDZmk_Int |
| 35049 | { 12107, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dff0024819ULL }, // Inst #12107 = VFNMSUB231SDZm_Int |
| 35050 | { 12106, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dff0024819ULL }, // Inst #12106 = VFNMSUB231SDZm |
| 35051 | { 12105, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdf28004829ULL }, // Inst #12105 = VFNMSUB231PSr |
| 35052 | { 12104, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdf28004819ULL }, // Inst #12104 = VFNMSUB231PSm |
| 35053 | { 12103, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf68004829ULL }, // Inst #12103 = VFNMSUB231PSZrkz |
| 35054 | { 12102, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadf68004829ULL }, // Inst #12102 = VFNMSUB231PSZrk |
| 35055 | { 12101, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17edf68004829ULL }, // Inst #12101 = VFNMSUB231PSZrbkz |
| 35056 | { 12100, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17adf68004829ULL }, // Inst #12100 = VFNMSUB231PSZrbk |
| 35057 | { 12099, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178df68004829ULL }, // Inst #12099 = VFNMSUB231PSZrb |
| 35058 | { 12098, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df68004829ULL }, // Inst #12098 = VFNMSUB231PSZr |
| 35059 | { 12097, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf68004819ULL }, // Inst #12097 = VFNMSUB231PSZmkz |
| 35060 | { 12096, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadf68004819ULL }, // Inst #12096 = VFNMSUB231PSZmk |
| 35061 | { 12095, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7edf68004819ULL }, // Inst #12095 = VFNMSUB231PSZmbkz |
| 35062 | { 12094, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7adf68004819ULL }, // Inst #12094 = VFNMSUB231PSZmbk |
| 35063 | { 12093, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78df68004819ULL }, // Inst #12093 = VFNMSUB231PSZmb |
| 35064 | { 12092, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df68004819ULL }, // Inst #12092 = VFNMSUB231PSZm |
| 35065 | { 12091, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df68004829ULL }, // Inst #12091 = VFNMSUB231PSZ256rkz |
| 35066 | { 12090, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3df68004829ULL }, // Inst #12090 = VFNMSUB231PSZ256rk |
| 35067 | { 12089, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df68004829ULL }, // Inst #12089 = VFNMSUB231PSZ256r |
| 35068 | { 12088, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df68004819ULL }, // Inst #12088 = VFNMSUB231PSZ256mkz |
| 35069 | { 12087, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3df68004819ULL }, // Inst #12087 = VFNMSUB231PSZ256mk |
| 35070 | { 12086, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77df68004819ULL }, // Inst #12086 = VFNMSUB231PSZ256mbkz |
| 35071 | { 12085, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73df68004819ULL }, // Inst #12085 = VFNMSUB231PSZ256mbk |
| 35072 | { 12084, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71df68004819ULL }, // Inst #12084 = VFNMSUB231PSZ256mb |
| 35073 | { 12083, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df68004819ULL }, // Inst #12083 = VFNMSUB231PSZ256m |
| 35074 | { 12082, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df68004829ULL }, // Inst #12082 = VFNMSUB231PSZ128rkz |
| 35075 | { 12081, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2df68004829ULL }, // Inst #12081 = VFNMSUB231PSZ128rk |
| 35076 | { 12080, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df68004829ULL }, // Inst #12080 = VFNMSUB231PSZ128r |
| 35077 | { 12079, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df68004819ULL }, // Inst #12079 = VFNMSUB231PSZ128mkz |
| 35078 | { 12078, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2df68004819ULL }, // Inst #12078 = VFNMSUB231PSZ128mk |
| 35079 | { 12077, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76df68004819ULL }, // Inst #12077 = VFNMSUB231PSZ128mbkz |
| 35080 | { 12076, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72df68004819ULL }, // Inst #12076 = VFNMSUB231PSZ128mbk |
| 35081 | { 12075, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70df68004819ULL }, // Inst #12075 = VFNMSUB231PSZ128mb |
| 35082 | { 12074, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df68004819ULL }, // Inst #12074 = VFNMSUB231PSZ128m |
| 35083 | { 12073, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1df28004829ULL }, // Inst #12073 = VFNMSUB231PSYr |
| 35084 | { 12072, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1df28004819ULL }, // Inst #12072 = VFNMSUB231PSYm |
| 35085 | { 12071, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf68014829ULL }, // Inst #12071 = VFNMSUB231PHZrkz |
| 35086 | { 12070, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadf68014829ULL }, // Inst #12070 = VFNMSUB231PHZrk |
| 35087 | { 12069, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15edf68014829ULL }, // Inst #12069 = VFNMSUB231PHZrbkz |
| 35088 | { 12068, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15adf68014829ULL }, // Inst #12068 = VFNMSUB231PHZrbk |
| 35089 | { 12067, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158df68014829ULL }, // Inst #12067 = VFNMSUB231PHZrb |
| 35090 | { 12066, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df68014829ULL }, // Inst #12066 = VFNMSUB231PHZr |
| 35091 | { 12065, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf68014819ULL }, // Inst #12065 = VFNMSUB231PHZmkz |
| 35092 | { 12064, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadf68014819ULL }, // Inst #12064 = VFNMSUB231PHZmk |
| 35093 | { 12063, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5edf68014819ULL }, // Inst #12063 = VFNMSUB231PHZmbkz |
| 35094 | { 12062, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5adf68014819ULL }, // Inst #12062 = VFNMSUB231PHZmbk |
| 35095 | { 12061, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58df68014819ULL }, // Inst #12061 = VFNMSUB231PHZmb |
| 35096 | { 12060, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df68014819ULL }, // Inst #12060 = VFNMSUB231PHZm |
| 35097 | { 12059, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df68014829ULL }, // Inst #12059 = VFNMSUB231PHZ256rkz |
| 35098 | { 12058, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3df68014829ULL }, // Inst #12058 = VFNMSUB231PHZ256rk |
| 35099 | { 12057, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df68014829ULL }, // Inst #12057 = VFNMSUB231PHZ256r |
| 35100 | { 12056, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df68014819ULL }, // Inst #12056 = VFNMSUB231PHZ256mkz |
| 35101 | { 12055, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3df68014819ULL }, // Inst #12055 = VFNMSUB231PHZ256mk |
| 35102 | { 12054, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57df68014819ULL }, // Inst #12054 = VFNMSUB231PHZ256mbkz |
| 35103 | { 12053, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53df68014819ULL }, // Inst #12053 = VFNMSUB231PHZ256mbk |
| 35104 | { 12052, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51df68014819ULL }, // Inst #12052 = VFNMSUB231PHZ256mb |
| 35105 | { 12051, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df68014819ULL }, // Inst #12051 = VFNMSUB231PHZ256m |
| 35106 | { 12050, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df68014829ULL }, // Inst #12050 = VFNMSUB231PHZ128rkz |
| 35107 | { 12049, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2df68014829ULL }, // Inst #12049 = VFNMSUB231PHZ128rk |
| 35108 | { 12048, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df68014829ULL }, // Inst #12048 = VFNMSUB231PHZ128r |
| 35109 | { 12047, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df68014819ULL }, // Inst #12047 = VFNMSUB231PHZ128mkz |
| 35110 | { 12046, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2df68014819ULL }, // Inst #12046 = VFNMSUB231PHZ128mk |
| 35111 | { 12045, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56df68014819ULL }, // Inst #12045 = VFNMSUB231PHZ128mbkz |
| 35112 | { 12044, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52df68014819ULL }, // Inst #12044 = VFNMSUB231PHZ128mbk |
| 35113 | { 12043, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50df68014819ULL }, // Inst #12043 = VFNMSUB231PHZ128mb |
| 35114 | { 12042, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df68014819ULL }, // Inst #12042 = VFNMSUB231PHZ128m |
| 35115 | { 12041, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdf30024829ULL }, // Inst #12041 = VFNMSUB231PDr |
| 35116 | { 12040, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdf30024819ULL }, // Inst #12040 = VFNMSUB231PDm |
| 35117 | { 12039, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf70024829ULL }, // Inst #12039 = VFNMSUB231PDZrkz |
| 35118 | { 12038, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadf70024829ULL }, // Inst #12038 = VFNMSUB231PDZrk |
| 35119 | { 12037, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19edf70024829ULL }, // Inst #12037 = VFNMSUB231PDZrbkz |
| 35120 | { 12036, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19adf70024829ULL }, // Inst #12036 = VFNMSUB231PDZrbk |
| 35121 | { 12035, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198df70024829ULL }, // Inst #12035 = VFNMSUB231PDZrb |
| 35122 | { 12034, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df70024829ULL }, // Inst #12034 = VFNMSUB231PDZr |
| 35123 | { 12033, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf70024819ULL }, // Inst #12033 = VFNMSUB231PDZmkz |
| 35124 | { 12032, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadf70024819ULL }, // Inst #12032 = VFNMSUB231PDZmk |
| 35125 | { 12031, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9edf70024819ULL }, // Inst #12031 = VFNMSUB231PDZmbkz |
| 35126 | { 12030, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9adf70024819ULL }, // Inst #12030 = VFNMSUB231PDZmbk |
| 35127 | { 12029, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98df70024819ULL }, // Inst #12029 = VFNMSUB231PDZmb |
| 35128 | { 12028, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df70024819ULL }, // Inst #12028 = VFNMSUB231PDZm |
| 35129 | { 12027, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df70024829ULL }, // Inst #12027 = VFNMSUB231PDZ256rkz |
| 35130 | { 12026, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3df70024829ULL }, // Inst #12026 = VFNMSUB231PDZ256rk |
| 35131 | { 12025, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df70024829ULL }, // Inst #12025 = VFNMSUB231PDZ256r |
| 35132 | { 12024, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df70024819ULL }, // Inst #12024 = VFNMSUB231PDZ256mkz |
| 35133 | { 12023, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3df70024819ULL }, // Inst #12023 = VFNMSUB231PDZ256mk |
| 35134 | { 12022, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97df70024819ULL }, // Inst #12022 = VFNMSUB231PDZ256mbkz |
| 35135 | { 12021, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93df70024819ULL }, // Inst #12021 = VFNMSUB231PDZ256mbk |
| 35136 | { 12020, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91df70024819ULL }, // Inst #12020 = VFNMSUB231PDZ256mb |
| 35137 | { 12019, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df70024819ULL }, // Inst #12019 = VFNMSUB231PDZ256m |
| 35138 | { 12018, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df70024829ULL }, // Inst #12018 = VFNMSUB231PDZ128rkz |
| 35139 | { 12017, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2df70024829ULL }, // Inst #12017 = VFNMSUB231PDZ128rk |
| 35140 | { 12016, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df70024829ULL }, // Inst #12016 = VFNMSUB231PDZ128r |
| 35141 | { 12015, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df70024819ULL }, // Inst #12015 = VFNMSUB231PDZ128mkz |
| 35142 | { 12014, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2df70024819ULL }, // Inst #12014 = VFNMSUB231PDZ128mk |
| 35143 | { 12013, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96df70024819ULL }, // Inst #12013 = VFNMSUB231PDZ128mbkz |
| 35144 | { 12012, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92df70024819ULL }, // Inst #12012 = VFNMSUB231PDZ128mbk |
| 35145 | { 12011, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90df70024819ULL }, // Inst #12011 = VFNMSUB231PDZ128mb |
| 35146 | { 12010, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df70024819ULL }, // Inst #12010 = VFNMSUB231PDZ128m |
| 35147 | { 12009, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1df30024829ULL }, // Inst #12009 = VFNMSUB231PDYr |
| 35148 | { 12008, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1df30024819ULL }, // Inst #12008 = VFNMSUB231PDYm |
| 35149 | { 12007, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeedf68014029ULL }, // Inst #12007 = VFNMSUB231BF16Zrkz |
| 35150 | { 12006, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeadf68014029ULL }, // Inst #12006 = VFNMSUB231BF16Zrk |
| 35151 | { 12005, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8df68014029ULL }, // Inst #12005 = VFNMSUB231BF16Zr |
| 35152 | { 12004, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeedf68014019ULL }, // Inst #12004 = VFNMSUB231BF16Zmkz |
| 35153 | { 12003, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeadf68014019ULL }, // Inst #12003 = VFNMSUB231BF16Zmk |
| 35154 | { 12002, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5edf68014019ULL }, // Inst #12002 = VFNMSUB231BF16Zmbkz |
| 35155 | { 12001, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5adf68014019ULL }, // Inst #12001 = VFNMSUB231BF16Zmbk |
| 35156 | { 12000, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58df68014019ULL }, // Inst #12000 = VFNMSUB231BF16Zmb |
| 35157 | { 11999, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8df68014019ULL }, // Inst #11999 = VFNMSUB231BF16Zm |
| 35158 | { 11998, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7df68014029ULL }, // Inst #11998 = VFNMSUB231BF16Z256rkz |
| 35159 | { 11997, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3df68014029ULL }, // Inst #11997 = VFNMSUB231BF16Z256rk |
| 35160 | { 11996, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1df68014029ULL }, // Inst #11996 = VFNMSUB231BF16Z256r |
| 35161 | { 11995, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7df68014019ULL }, // Inst #11995 = VFNMSUB231BF16Z256mkz |
| 35162 | { 11994, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3df68014019ULL }, // Inst #11994 = VFNMSUB231BF16Z256mk |
| 35163 | { 11993, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57df68014019ULL }, // Inst #11993 = VFNMSUB231BF16Z256mbkz |
| 35164 | { 11992, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53df68014019ULL }, // Inst #11992 = VFNMSUB231BF16Z256mbk |
| 35165 | { 11991, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51df68014019ULL }, // Inst #11991 = VFNMSUB231BF16Z256mb |
| 35166 | { 11990, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1df68014019ULL }, // Inst #11990 = VFNMSUB231BF16Z256m |
| 35167 | { 11989, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6df68014029ULL }, // Inst #11989 = VFNMSUB231BF16Z128rkz |
| 35168 | { 11988, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2df68014029ULL }, // Inst #11988 = VFNMSUB231BF16Z128rk |
| 35169 | { 11987, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0df68014029ULL }, // Inst #11987 = VFNMSUB231BF16Z128r |
| 35170 | { 11986, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6df68014019ULL }, // Inst #11986 = VFNMSUB231BF16Z128mkz |
| 35171 | { 11985, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2df68014019ULL }, // Inst #11985 = VFNMSUB231BF16Z128mk |
| 35172 | { 11984, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56df68014019ULL }, // Inst #11984 = VFNMSUB231BF16Z128mbkz |
| 35173 | { 11983, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52df68014019ULL }, // Inst #11983 = VFNMSUB231BF16Z128mbk |
| 35174 | { 11982, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50df68014019ULL }, // Inst #11982 = VFNMSUB231BF16Z128mb |
| 35175 | { 11981, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0df68014019ULL }, // Inst #11981 = VFNMSUB231BF16Z128m |
| 35176 | { 11980, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7a8004829ULL }, // Inst #11980 = VFNMSUB213SSr_Int |
| 35177 | { 11979, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7a8004829ULL }, // Inst #11979 = VFNMSUB213SSr |
| 35178 | { 11978, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7a8004819ULL }, // Inst #11978 = VFNMSUB213SSm_Int |
| 35179 | { 11977, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7a8004819ULL }, // Inst #11977 = VFNMSUB213SSm |
| 35180 | { 11976, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d7e8004829ULL }, // Inst #11976 = VFNMSUB213SSZrkz_Int |
| 35181 | { 11975, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d7e8004829ULL }, // Inst #11975 = VFNMSUB213SSZrk_Int |
| 35182 | { 11974, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176d7e8004829ULL }, // Inst #11974 = VFNMSUB213SSZrbkz_Int |
| 35183 | { 11973, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172d7e8004829ULL }, // Inst #11973 = VFNMSUB213SSZrbk_Int |
| 35184 | { 11972, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170d7e8004829ULL }, // Inst #11972 = VFNMSUB213SSZrb_Int |
| 35185 | { 11971, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170d7e8004829ULL }, // Inst #11971 = VFNMSUB213SSZrb |
| 35186 | { 11970, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d7e8004829ULL }, // Inst #11970 = VFNMSUB213SSZr_Int |
| 35187 | { 11969, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d7e8004829ULL }, // Inst #11969 = VFNMSUB213SSZr |
| 35188 | { 11968, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d7e8004819ULL }, // Inst #11968 = VFNMSUB213SSZmkz_Int |
| 35189 | { 11967, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d7e8004819ULL }, // Inst #11967 = VFNMSUB213SSZmk_Int |
| 35190 | { 11966, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d7e8004819ULL }, // Inst #11966 = VFNMSUB213SSZm_Int |
| 35191 | { 11965, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d7e8004819ULL }, // Inst #11965 = VFNMSUB213SSZm |
| 35192 | { 11964, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d7e8014829ULL }, // Inst #11964 = VFNMSUB213SHZrkz_Int |
| 35193 | { 11963, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d7e8014829ULL }, // Inst #11963 = VFNMSUB213SHZrk_Int |
| 35194 | { 11962, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156d7e8014829ULL }, // Inst #11962 = VFNMSUB213SHZrbkz_Int |
| 35195 | { 11961, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152d7e8014829ULL }, // Inst #11961 = VFNMSUB213SHZrbk_Int |
| 35196 | { 11960, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150d7e8014829ULL }, // Inst #11960 = VFNMSUB213SHZrb_Int |
| 35197 | { 11959, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150d7e8014829ULL }, // Inst #11959 = VFNMSUB213SHZrb |
| 35198 | { 11958, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d7e8014829ULL }, // Inst #11958 = VFNMSUB213SHZr_Int |
| 35199 | { 11957, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d7e8014829ULL }, // Inst #11957 = VFNMSUB213SHZr |
| 35200 | { 11956, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d7e8014819ULL }, // Inst #11956 = VFNMSUB213SHZmkz_Int |
| 35201 | { 11955, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d7e8014819ULL }, // Inst #11955 = VFNMSUB213SHZmk_Int |
| 35202 | { 11954, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d7e8014819ULL }, // Inst #11954 = VFNMSUB213SHZm_Int |
| 35203 | { 11953, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d7e8014819ULL }, // Inst #11953 = VFNMSUB213SHZm |
| 35204 | { 11952, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7b0024829ULL }, // Inst #11952 = VFNMSUB213SDr_Int |
| 35205 | { 11951, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7b0024829ULL }, // Inst #11951 = VFNMSUB213SDr |
| 35206 | { 11950, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7b0024819ULL }, // Inst #11950 = VFNMSUB213SDm_Int |
| 35207 | { 11949, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7b0024819ULL }, // Inst #11949 = VFNMSUB213SDm |
| 35208 | { 11948, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d7f0024829ULL }, // Inst #11948 = VFNMSUB213SDZrkz_Int |
| 35209 | { 11947, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d7f0024829ULL }, // Inst #11947 = VFNMSUB213SDZrk_Int |
| 35210 | { 11946, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196d7f0024829ULL }, // Inst #11946 = VFNMSUB213SDZrbkz_Int |
| 35211 | { 11945, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192d7f0024829ULL }, // Inst #11945 = VFNMSUB213SDZrbk_Int |
| 35212 | { 11944, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190d7f0024829ULL }, // Inst #11944 = VFNMSUB213SDZrb_Int |
| 35213 | { 11943, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190d7f0024829ULL }, // Inst #11943 = VFNMSUB213SDZrb |
| 35214 | { 11942, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d7f0024829ULL }, // Inst #11942 = VFNMSUB213SDZr_Int |
| 35215 | { 11941, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d7f0024829ULL }, // Inst #11941 = VFNMSUB213SDZr |
| 35216 | { 11940, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d7f0024819ULL }, // Inst #11940 = VFNMSUB213SDZmkz_Int |
| 35217 | { 11939, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d7f0024819ULL }, // Inst #11939 = VFNMSUB213SDZmk_Int |
| 35218 | { 11938, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d7f0024819ULL }, // Inst #11938 = VFNMSUB213SDZm_Int |
| 35219 | { 11937, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d7f0024819ULL }, // Inst #11937 = VFNMSUB213SDZm |
| 35220 | { 11936, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd728004829ULL }, // Inst #11936 = VFNMSUB213PSr |
| 35221 | { 11935, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd728004819ULL }, // Inst #11935 = VFNMSUB213PSm |
| 35222 | { 11934, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed768004829ULL }, // Inst #11934 = VFNMSUB213PSZrkz |
| 35223 | { 11933, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead768004829ULL }, // Inst #11933 = VFNMSUB213PSZrk |
| 35224 | { 11932, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ed768004829ULL }, // Inst #11932 = VFNMSUB213PSZrbkz |
| 35225 | { 11931, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ad768004829ULL }, // Inst #11931 = VFNMSUB213PSZrbk |
| 35226 | { 11930, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178d768004829ULL }, // Inst #11930 = VFNMSUB213PSZrb |
| 35227 | { 11929, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d768004829ULL }, // Inst #11929 = VFNMSUB213PSZr |
| 35228 | { 11928, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed768004819ULL }, // Inst #11928 = VFNMSUB213PSZmkz |
| 35229 | { 11927, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead768004819ULL }, // Inst #11927 = VFNMSUB213PSZmk |
| 35230 | { 11926, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed768004819ULL }, // Inst #11926 = VFNMSUB213PSZmbkz |
| 35231 | { 11925, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad768004819ULL }, // Inst #11925 = VFNMSUB213PSZmbk |
| 35232 | { 11924, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d768004819ULL }, // Inst #11924 = VFNMSUB213PSZmb |
| 35233 | { 11923, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d768004819ULL }, // Inst #11923 = VFNMSUB213PSZm |
| 35234 | { 11922, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d768004829ULL }, // Inst #11922 = VFNMSUB213PSZ256rkz |
| 35235 | { 11921, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d768004829ULL }, // Inst #11921 = VFNMSUB213PSZ256rk |
| 35236 | { 11920, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d768004829ULL }, // Inst #11920 = VFNMSUB213PSZ256r |
| 35237 | { 11919, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d768004819ULL }, // Inst #11919 = VFNMSUB213PSZ256mkz |
| 35238 | { 11918, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d768004819ULL }, // Inst #11918 = VFNMSUB213PSZ256mk |
| 35239 | { 11917, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d768004819ULL }, // Inst #11917 = VFNMSUB213PSZ256mbkz |
| 35240 | { 11916, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d768004819ULL }, // Inst #11916 = VFNMSUB213PSZ256mbk |
| 35241 | { 11915, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d768004819ULL }, // Inst #11915 = VFNMSUB213PSZ256mb |
| 35242 | { 11914, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d768004819ULL }, // Inst #11914 = VFNMSUB213PSZ256m |
| 35243 | { 11913, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d768004829ULL }, // Inst #11913 = VFNMSUB213PSZ128rkz |
| 35244 | { 11912, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d768004829ULL }, // Inst #11912 = VFNMSUB213PSZ128rk |
| 35245 | { 11911, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d768004829ULL }, // Inst #11911 = VFNMSUB213PSZ128r |
| 35246 | { 11910, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d768004819ULL }, // Inst #11910 = VFNMSUB213PSZ128mkz |
| 35247 | { 11909, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d768004819ULL }, // Inst #11909 = VFNMSUB213PSZ128mk |
| 35248 | { 11908, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d768004819ULL }, // Inst #11908 = VFNMSUB213PSZ128mbkz |
| 35249 | { 11907, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d768004819ULL }, // Inst #11907 = VFNMSUB213PSZ128mbk |
| 35250 | { 11906, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d768004819ULL }, // Inst #11906 = VFNMSUB213PSZ128mb |
| 35251 | { 11905, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d768004819ULL }, // Inst #11905 = VFNMSUB213PSZ128m |
| 35252 | { 11904, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d728004829ULL }, // Inst #11904 = VFNMSUB213PSYr |
| 35253 | { 11903, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d728004819ULL }, // Inst #11903 = VFNMSUB213PSYm |
| 35254 | { 11902, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed768014829ULL }, // Inst #11902 = VFNMSUB213PHZrkz |
| 35255 | { 11901, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead768014829ULL }, // Inst #11901 = VFNMSUB213PHZrk |
| 35256 | { 11900, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ed768014829ULL }, // Inst #11900 = VFNMSUB213PHZrbkz |
| 35257 | { 11899, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ad768014829ULL }, // Inst #11899 = VFNMSUB213PHZrbk |
| 35258 | { 11898, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158d768014829ULL }, // Inst #11898 = VFNMSUB213PHZrb |
| 35259 | { 11897, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d768014829ULL }, // Inst #11897 = VFNMSUB213PHZr |
| 35260 | { 11896, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed768014819ULL }, // Inst #11896 = VFNMSUB213PHZmkz |
| 35261 | { 11895, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead768014819ULL }, // Inst #11895 = VFNMSUB213PHZmk |
| 35262 | { 11894, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed768014819ULL }, // Inst #11894 = VFNMSUB213PHZmbkz |
| 35263 | { 11893, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad768014819ULL }, // Inst #11893 = VFNMSUB213PHZmbk |
| 35264 | { 11892, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d768014819ULL }, // Inst #11892 = VFNMSUB213PHZmb |
| 35265 | { 11891, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d768014819ULL }, // Inst #11891 = VFNMSUB213PHZm |
| 35266 | { 11890, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d768014829ULL }, // Inst #11890 = VFNMSUB213PHZ256rkz |
| 35267 | { 11889, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d768014829ULL }, // Inst #11889 = VFNMSUB213PHZ256rk |
| 35268 | { 11888, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d768014829ULL }, // Inst #11888 = VFNMSUB213PHZ256r |
| 35269 | { 11887, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d768014819ULL }, // Inst #11887 = VFNMSUB213PHZ256mkz |
| 35270 | { 11886, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d768014819ULL }, // Inst #11886 = VFNMSUB213PHZ256mk |
| 35271 | { 11885, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d768014819ULL }, // Inst #11885 = VFNMSUB213PHZ256mbkz |
| 35272 | { 11884, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d768014819ULL }, // Inst #11884 = VFNMSUB213PHZ256mbk |
| 35273 | { 11883, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d768014819ULL }, // Inst #11883 = VFNMSUB213PHZ256mb |
| 35274 | { 11882, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d768014819ULL }, // Inst #11882 = VFNMSUB213PHZ256m |
| 35275 | { 11881, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d768014829ULL }, // Inst #11881 = VFNMSUB213PHZ128rkz |
| 35276 | { 11880, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d768014829ULL }, // Inst #11880 = VFNMSUB213PHZ128rk |
| 35277 | { 11879, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d768014829ULL }, // Inst #11879 = VFNMSUB213PHZ128r |
| 35278 | { 11878, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d768014819ULL }, // Inst #11878 = VFNMSUB213PHZ128mkz |
| 35279 | { 11877, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d768014819ULL }, // Inst #11877 = VFNMSUB213PHZ128mk |
| 35280 | { 11876, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d768014819ULL }, // Inst #11876 = VFNMSUB213PHZ128mbkz |
| 35281 | { 11875, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d768014819ULL }, // Inst #11875 = VFNMSUB213PHZ128mbk |
| 35282 | { 11874, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d768014819ULL }, // Inst #11874 = VFNMSUB213PHZ128mb |
| 35283 | { 11873, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d768014819ULL }, // Inst #11873 = VFNMSUB213PHZ128m |
| 35284 | { 11872, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd730024829ULL }, // Inst #11872 = VFNMSUB213PDr |
| 35285 | { 11871, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd730024819ULL }, // Inst #11871 = VFNMSUB213PDm |
| 35286 | { 11870, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed770024829ULL }, // Inst #11870 = VFNMSUB213PDZrkz |
| 35287 | { 11869, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead770024829ULL }, // Inst #11869 = VFNMSUB213PDZrk |
| 35288 | { 11868, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ed770024829ULL }, // Inst #11868 = VFNMSUB213PDZrbkz |
| 35289 | { 11867, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ad770024829ULL }, // Inst #11867 = VFNMSUB213PDZrbk |
| 35290 | { 11866, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198d770024829ULL }, // Inst #11866 = VFNMSUB213PDZrb |
| 35291 | { 11865, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d770024829ULL }, // Inst #11865 = VFNMSUB213PDZr |
| 35292 | { 11864, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed770024819ULL }, // Inst #11864 = VFNMSUB213PDZmkz |
| 35293 | { 11863, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead770024819ULL }, // Inst #11863 = VFNMSUB213PDZmk |
| 35294 | { 11862, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed770024819ULL }, // Inst #11862 = VFNMSUB213PDZmbkz |
| 35295 | { 11861, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad770024819ULL }, // Inst #11861 = VFNMSUB213PDZmbk |
| 35296 | { 11860, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d770024819ULL }, // Inst #11860 = VFNMSUB213PDZmb |
| 35297 | { 11859, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d770024819ULL }, // Inst #11859 = VFNMSUB213PDZm |
| 35298 | { 11858, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d770024829ULL }, // Inst #11858 = VFNMSUB213PDZ256rkz |
| 35299 | { 11857, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d770024829ULL }, // Inst #11857 = VFNMSUB213PDZ256rk |
| 35300 | { 11856, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d770024829ULL }, // Inst #11856 = VFNMSUB213PDZ256r |
| 35301 | { 11855, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d770024819ULL }, // Inst #11855 = VFNMSUB213PDZ256mkz |
| 35302 | { 11854, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d770024819ULL }, // Inst #11854 = VFNMSUB213PDZ256mk |
| 35303 | { 11853, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d770024819ULL }, // Inst #11853 = VFNMSUB213PDZ256mbkz |
| 35304 | { 11852, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d770024819ULL }, // Inst #11852 = VFNMSUB213PDZ256mbk |
| 35305 | { 11851, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d770024819ULL }, // Inst #11851 = VFNMSUB213PDZ256mb |
| 35306 | { 11850, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d770024819ULL }, // Inst #11850 = VFNMSUB213PDZ256m |
| 35307 | { 11849, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d770024829ULL }, // Inst #11849 = VFNMSUB213PDZ128rkz |
| 35308 | { 11848, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d770024829ULL }, // Inst #11848 = VFNMSUB213PDZ128rk |
| 35309 | { 11847, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d770024829ULL }, // Inst #11847 = VFNMSUB213PDZ128r |
| 35310 | { 11846, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d770024819ULL }, // Inst #11846 = VFNMSUB213PDZ128mkz |
| 35311 | { 11845, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d770024819ULL }, // Inst #11845 = VFNMSUB213PDZ128mk |
| 35312 | { 11844, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d770024819ULL }, // Inst #11844 = VFNMSUB213PDZ128mbkz |
| 35313 | { 11843, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d770024819ULL }, // Inst #11843 = VFNMSUB213PDZ128mbk |
| 35314 | { 11842, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d770024819ULL }, // Inst #11842 = VFNMSUB213PDZ128mb |
| 35315 | { 11841, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d770024819ULL }, // Inst #11841 = VFNMSUB213PDZ128m |
| 35316 | { 11840, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d730024829ULL }, // Inst #11840 = VFNMSUB213PDYr |
| 35317 | { 11839, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d730024819ULL }, // Inst #11839 = VFNMSUB213PDYm |
| 35318 | { 11838, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeed768014029ULL }, // Inst #11838 = VFNMSUB213BF16Zrkz |
| 35319 | { 11837, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xead768014029ULL }, // Inst #11837 = VFNMSUB213BF16Zrk |
| 35320 | { 11836, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8d768014029ULL }, // Inst #11836 = VFNMSUB213BF16Zr |
| 35321 | { 11835, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeed768014019ULL }, // Inst #11835 = VFNMSUB213BF16Zmkz |
| 35322 | { 11834, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xead768014019ULL }, // Inst #11834 = VFNMSUB213BF16Zmk |
| 35323 | { 11833, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5ed768014019ULL }, // Inst #11833 = VFNMSUB213BF16Zmbkz |
| 35324 | { 11832, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5ad768014019ULL }, // Inst #11832 = VFNMSUB213BF16Zmbk |
| 35325 | { 11831, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58d768014019ULL }, // Inst #11831 = VFNMSUB213BF16Zmb |
| 35326 | { 11830, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8d768014019ULL }, // Inst #11830 = VFNMSUB213BF16Zm |
| 35327 | { 11829, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7d768014029ULL }, // Inst #11829 = VFNMSUB213BF16Z256rkz |
| 35328 | { 11828, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3d768014029ULL }, // Inst #11828 = VFNMSUB213BF16Z256rk |
| 35329 | { 11827, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1d768014029ULL }, // Inst #11827 = VFNMSUB213BF16Z256r |
| 35330 | { 11826, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7d768014019ULL }, // Inst #11826 = VFNMSUB213BF16Z256mkz |
| 35331 | { 11825, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3d768014019ULL }, // Inst #11825 = VFNMSUB213BF16Z256mk |
| 35332 | { 11824, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57d768014019ULL }, // Inst #11824 = VFNMSUB213BF16Z256mbkz |
| 35333 | { 11823, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53d768014019ULL }, // Inst #11823 = VFNMSUB213BF16Z256mbk |
| 35334 | { 11822, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51d768014019ULL }, // Inst #11822 = VFNMSUB213BF16Z256mb |
| 35335 | { 11821, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1d768014019ULL }, // Inst #11821 = VFNMSUB213BF16Z256m |
| 35336 | { 11820, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6d768014029ULL }, // Inst #11820 = VFNMSUB213BF16Z128rkz |
| 35337 | { 11819, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2d768014029ULL }, // Inst #11819 = VFNMSUB213BF16Z128rk |
| 35338 | { 11818, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0d768014029ULL }, // Inst #11818 = VFNMSUB213BF16Z128r |
| 35339 | { 11817, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6d768014019ULL }, // Inst #11817 = VFNMSUB213BF16Z128mkz |
| 35340 | { 11816, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2d768014019ULL }, // Inst #11816 = VFNMSUB213BF16Z128mk |
| 35341 | { 11815, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56d768014019ULL }, // Inst #11815 = VFNMSUB213BF16Z128mbkz |
| 35342 | { 11814, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52d768014019ULL }, // Inst #11814 = VFNMSUB213BF16Z128mbk |
| 35343 | { 11813, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50d768014019ULL }, // Inst #11813 = VFNMSUB213BF16Z128mb |
| 35344 | { 11812, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0d768014019ULL }, // Inst #11812 = VFNMSUB213BF16Z128m |
| 35345 | { 11811, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfa8004829ULL }, // Inst #11811 = VFNMSUB132SSr_Int |
| 35346 | { 11810, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfa8004829ULL }, // Inst #11810 = VFNMSUB132SSr |
| 35347 | { 11809, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfa8004819ULL }, // Inst #11809 = VFNMSUB132SSm_Int |
| 35348 | { 11808, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfa8004819ULL }, // Inst #11808 = VFNMSUB132SSm |
| 35349 | { 11807, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cfe8004829ULL }, // Inst #11807 = VFNMSUB132SSZrkz_Int |
| 35350 | { 11806, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cfe8004829ULL }, // Inst #11806 = VFNMSUB132SSZrk_Int |
| 35351 | { 11805, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176cfe8004829ULL }, // Inst #11805 = VFNMSUB132SSZrbkz_Int |
| 35352 | { 11804, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172cfe8004829ULL }, // Inst #11804 = VFNMSUB132SSZrbk_Int |
| 35353 | { 11803, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170cfe8004829ULL }, // Inst #11803 = VFNMSUB132SSZrb_Int |
| 35354 | { 11802, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170cfe8004829ULL }, // Inst #11802 = VFNMSUB132SSZrb |
| 35355 | { 11801, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cfe8004829ULL }, // Inst #11801 = VFNMSUB132SSZr_Int |
| 35356 | { 11800, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cfe8004829ULL }, // Inst #11800 = VFNMSUB132SSZr |
| 35357 | { 11799, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cfe8004819ULL }, // Inst #11799 = VFNMSUB132SSZmkz_Int |
| 35358 | { 11798, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cfe8004819ULL }, // Inst #11798 = VFNMSUB132SSZmk_Int |
| 35359 | { 11797, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cfe8004819ULL }, // Inst #11797 = VFNMSUB132SSZm_Int |
| 35360 | { 11796, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cfe8004819ULL }, // Inst #11796 = VFNMSUB132SSZm |
| 35361 | { 11795, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cfe8014829ULL }, // Inst #11795 = VFNMSUB132SHZrkz_Int |
| 35362 | { 11794, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cfe8014829ULL }, // Inst #11794 = VFNMSUB132SHZrk_Int |
| 35363 | { 11793, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156cfe8014829ULL }, // Inst #11793 = VFNMSUB132SHZrbkz_Int |
| 35364 | { 11792, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152cfe8014829ULL }, // Inst #11792 = VFNMSUB132SHZrbk_Int |
| 35365 | { 11791, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150cfe8014829ULL }, // Inst #11791 = VFNMSUB132SHZrb_Int |
| 35366 | { 11790, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150cfe8014829ULL }, // Inst #11790 = VFNMSUB132SHZrb |
| 35367 | { 11789, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cfe8014829ULL }, // Inst #11789 = VFNMSUB132SHZr_Int |
| 35368 | { 11788, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cfe8014829ULL }, // Inst #11788 = VFNMSUB132SHZr |
| 35369 | { 11787, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cfe8014819ULL }, // Inst #11787 = VFNMSUB132SHZmkz_Int |
| 35370 | { 11786, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cfe8014819ULL }, // Inst #11786 = VFNMSUB132SHZmk_Int |
| 35371 | { 11785, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cfe8014819ULL }, // Inst #11785 = VFNMSUB132SHZm_Int |
| 35372 | { 11784, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cfe8014819ULL }, // Inst #11784 = VFNMSUB132SHZm |
| 35373 | { 11783, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfb0024829ULL }, // Inst #11783 = VFNMSUB132SDr_Int |
| 35374 | { 11782, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfb0024829ULL }, // Inst #11782 = VFNMSUB132SDr |
| 35375 | { 11781, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfb0024819ULL }, // Inst #11781 = VFNMSUB132SDm_Int |
| 35376 | { 11780, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfb0024819ULL }, // Inst #11780 = VFNMSUB132SDm |
| 35377 | { 11779, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cff0024829ULL }, // Inst #11779 = VFNMSUB132SDZrkz_Int |
| 35378 | { 11778, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cff0024829ULL }, // Inst #11778 = VFNMSUB132SDZrk_Int |
| 35379 | { 11777, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196cff0024829ULL }, // Inst #11777 = VFNMSUB132SDZrbkz_Int |
| 35380 | { 11776, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192cff0024829ULL }, // Inst #11776 = VFNMSUB132SDZrbk_Int |
| 35381 | { 11775, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190cff0024829ULL }, // Inst #11775 = VFNMSUB132SDZrb_Int |
| 35382 | { 11774, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190cff0024829ULL }, // Inst #11774 = VFNMSUB132SDZrb |
| 35383 | { 11773, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cff0024829ULL }, // Inst #11773 = VFNMSUB132SDZr_Int |
| 35384 | { 11772, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cff0024829ULL }, // Inst #11772 = VFNMSUB132SDZr |
| 35385 | { 11771, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cff0024819ULL }, // Inst #11771 = VFNMSUB132SDZmkz_Int |
| 35386 | { 11770, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cff0024819ULL }, // Inst #11770 = VFNMSUB132SDZmk_Int |
| 35387 | { 11769, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cff0024819ULL }, // Inst #11769 = VFNMSUB132SDZm_Int |
| 35388 | { 11768, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cff0024819ULL }, // Inst #11768 = VFNMSUB132SDZm |
| 35389 | { 11767, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcf28004829ULL }, // Inst #11767 = VFNMSUB132PSr |
| 35390 | { 11766, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcf28004819ULL }, // Inst #11766 = VFNMSUB132PSm |
| 35391 | { 11765, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf68004829ULL }, // Inst #11765 = VFNMSUB132PSZrkz |
| 35392 | { 11764, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacf68004829ULL }, // Inst #11764 = VFNMSUB132PSZrk |
| 35393 | { 11763, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ecf68004829ULL }, // Inst #11763 = VFNMSUB132PSZrbkz |
| 35394 | { 11762, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17acf68004829ULL }, // Inst #11762 = VFNMSUB132PSZrbk |
| 35395 | { 11761, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178cf68004829ULL }, // Inst #11761 = VFNMSUB132PSZrb |
| 35396 | { 11760, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf68004829ULL }, // Inst #11760 = VFNMSUB132PSZr |
| 35397 | { 11759, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf68004819ULL }, // Inst #11759 = VFNMSUB132PSZmkz |
| 35398 | { 11758, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacf68004819ULL }, // Inst #11758 = VFNMSUB132PSZmk |
| 35399 | { 11757, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ecf68004819ULL }, // Inst #11757 = VFNMSUB132PSZmbkz |
| 35400 | { 11756, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7acf68004819ULL }, // Inst #11756 = VFNMSUB132PSZmbk |
| 35401 | { 11755, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78cf68004819ULL }, // Inst #11755 = VFNMSUB132PSZmb |
| 35402 | { 11754, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf68004819ULL }, // Inst #11754 = VFNMSUB132PSZm |
| 35403 | { 11753, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf68004829ULL }, // Inst #11753 = VFNMSUB132PSZ256rkz |
| 35404 | { 11752, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cf68004829ULL }, // Inst #11752 = VFNMSUB132PSZ256rk |
| 35405 | { 11751, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf68004829ULL }, // Inst #11751 = VFNMSUB132PSZ256r |
| 35406 | { 11750, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf68004819ULL }, // Inst #11750 = VFNMSUB132PSZ256mkz |
| 35407 | { 11749, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cf68004819ULL }, // Inst #11749 = VFNMSUB132PSZ256mk |
| 35408 | { 11748, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77cf68004819ULL }, // Inst #11748 = VFNMSUB132PSZ256mbkz |
| 35409 | { 11747, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73cf68004819ULL }, // Inst #11747 = VFNMSUB132PSZ256mbk |
| 35410 | { 11746, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71cf68004819ULL }, // Inst #11746 = VFNMSUB132PSZ256mb |
| 35411 | { 11745, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf68004819ULL }, // Inst #11745 = VFNMSUB132PSZ256m |
| 35412 | { 11744, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf68004829ULL }, // Inst #11744 = VFNMSUB132PSZ128rkz |
| 35413 | { 11743, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cf68004829ULL }, // Inst #11743 = VFNMSUB132PSZ128rk |
| 35414 | { 11742, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf68004829ULL }, // Inst #11742 = VFNMSUB132PSZ128r |
| 35415 | { 11741, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf68004819ULL }, // Inst #11741 = VFNMSUB132PSZ128mkz |
| 35416 | { 11740, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cf68004819ULL }, // Inst #11740 = VFNMSUB132PSZ128mk |
| 35417 | { 11739, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76cf68004819ULL }, // Inst #11739 = VFNMSUB132PSZ128mbkz |
| 35418 | { 11738, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72cf68004819ULL }, // Inst #11738 = VFNMSUB132PSZ128mbk |
| 35419 | { 11737, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70cf68004819ULL }, // Inst #11737 = VFNMSUB132PSZ128mb |
| 35420 | { 11736, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf68004819ULL }, // Inst #11736 = VFNMSUB132PSZ128m |
| 35421 | { 11735, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cf28004829ULL }, // Inst #11735 = VFNMSUB132PSYr |
| 35422 | { 11734, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cf28004819ULL }, // Inst #11734 = VFNMSUB132PSYm |
| 35423 | { 11733, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf68014829ULL }, // Inst #11733 = VFNMSUB132PHZrkz |
| 35424 | { 11732, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacf68014829ULL }, // Inst #11732 = VFNMSUB132PHZrk |
| 35425 | { 11731, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ecf68014829ULL }, // Inst #11731 = VFNMSUB132PHZrbkz |
| 35426 | { 11730, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15acf68014829ULL }, // Inst #11730 = VFNMSUB132PHZrbk |
| 35427 | { 11729, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158cf68014829ULL }, // Inst #11729 = VFNMSUB132PHZrb |
| 35428 | { 11728, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf68014829ULL }, // Inst #11728 = VFNMSUB132PHZr |
| 35429 | { 11727, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf68014819ULL }, // Inst #11727 = VFNMSUB132PHZmkz |
| 35430 | { 11726, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacf68014819ULL }, // Inst #11726 = VFNMSUB132PHZmk |
| 35431 | { 11725, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ecf68014819ULL }, // Inst #11725 = VFNMSUB132PHZmbkz |
| 35432 | { 11724, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5acf68014819ULL }, // Inst #11724 = VFNMSUB132PHZmbk |
| 35433 | { 11723, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58cf68014819ULL }, // Inst #11723 = VFNMSUB132PHZmb |
| 35434 | { 11722, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf68014819ULL }, // Inst #11722 = VFNMSUB132PHZm |
| 35435 | { 11721, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf68014829ULL }, // Inst #11721 = VFNMSUB132PHZ256rkz |
| 35436 | { 11720, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cf68014829ULL }, // Inst #11720 = VFNMSUB132PHZ256rk |
| 35437 | { 11719, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf68014829ULL }, // Inst #11719 = VFNMSUB132PHZ256r |
| 35438 | { 11718, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf68014819ULL }, // Inst #11718 = VFNMSUB132PHZ256mkz |
| 35439 | { 11717, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cf68014819ULL }, // Inst #11717 = VFNMSUB132PHZ256mk |
| 35440 | { 11716, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57cf68014819ULL }, // Inst #11716 = VFNMSUB132PHZ256mbkz |
| 35441 | { 11715, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53cf68014819ULL }, // Inst #11715 = VFNMSUB132PHZ256mbk |
| 35442 | { 11714, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51cf68014819ULL }, // Inst #11714 = VFNMSUB132PHZ256mb |
| 35443 | { 11713, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf68014819ULL }, // Inst #11713 = VFNMSUB132PHZ256m |
| 35444 | { 11712, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf68014829ULL }, // Inst #11712 = VFNMSUB132PHZ128rkz |
| 35445 | { 11711, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cf68014829ULL }, // Inst #11711 = VFNMSUB132PHZ128rk |
| 35446 | { 11710, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf68014829ULL }, // Inst #11710 = VFNMSUB132PHZ128r |
| 35447 | { 11709, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf68014819ULL }, // Inst #11709 = VFNMSUB132PHZ128mkz |
| 35448 | { 11708, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cf68014819ULL }, // Inst #11708 = VFNMSUB132PHZ128mk |
| 35449 | { 11707, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56cf68014819ULL }, // Inst #11707 = VFNMSUB132PHZ128mbkz |
| 35450 | { 11706, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52cf68014819ULL }, // Inst #11706 = VFNMSUB132PHZ128mbk |
| 35451 | { 11705, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50cf68014819ULL }, // Inst #11705 = VFNMSUB132PHZ128mb |
| 35452 | { 11704, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf68014819ULL }, // Inst #11704 = VFNMSUB132PHZ128m |
| 35453 | { 11703, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcf30024829ULL }, // Inst #11703 = VFNMSUB132PDr |
| 35454 | { 11702, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcf30024819ULL }, // Inst #11702 = VFNMSUB132PDm |
| 35455 | { 11701, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf70024829ULL }, // Inst #11701 = VFNMSUB132PDZrkz |
| 35456 | { 11700, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacf70024829ULL }, // Inst #11700 = VFNMSUB132PDZrk |
| 35457 | { 11699, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ecf70024829ULL }, // Inst #11699 = VFNMSUB132PDZrbkz |
| 35458 | { 11698, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19acf70024829ULL }, // Inst #11698 = VFNMSUB132PDZrbk |
| 35459 | { 11697, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198cf70024829ULL }, // Inst #11697 = VFNMSUB132PDZrb |
| 35460 | { 11696, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf70024829ULL }, // Inst #11696 = VFNMSUB132PDZr |
| 35461 | { 11695, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf70024819ULL }, // Inst #11695 = VFNMSUB132PDZmkz |
| 35462 | { 11694, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacf70024819ULL }, // Inst #11694 = VFNMSUB132PDZmk |
| 35463 | { 11693, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ecf70024819ULL }, // Inst #11693 = VFNMSUB132PDZmbkz |
| 35464 | { 11692, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9acf70024819ULL }, // Inst #11692 = VFNMSUB132PDZmbk |
| 35465 | { 11691, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98cf70024819ULL }, // Inst #11691 = VFNMSUB132PDZmb |
| 35466 | { 11690, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf70024819ULL }, // Inst #11690 = VFNMSUB132PDZm |
| 35467 | { 11689, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf70024829ULL }, // Inst #11689 = VFNMSUB132PDZ256rkz |
| 35468 | { 11688, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cf70024829ULL }, // Inst #11688 = VFNMSUB132PDZ256rk |
| 35469 | { 11687, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf70024829ULL }, // Inst #11687 = VFNMSUB132PDZ256r |
| 35470 | { 11686, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf70024819ULL }, // Inst #11686 = VFNMSUB132PDZ256mkz |
| 35471 | { 11685, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cf70024819ULL }, // Inst #11685 = VFNMSUB132PDZ256mk |
| 35472 | { 11684, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97cf70024819ULL }, // Inst #11684 = VFNMSUB132PDZ256mbkz |
| 35473 | { 11683, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93cf70024819ULL }, // Inst #11683 = VFNMSUB132PDZ256mbk |
| 35474 | { 11682, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91cf70024819ULL }, // Inst #11682 = VFNMSUB132PDZ256mb |
| 35475 | { 11681, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf70024819ULL }, // Inst #11681 = VFNMSUB132PDZ256m |
| 35476 | { 11680, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf70024829ULL }, // Inst #11680 = VFNMSUB132PDZ128rkz |
| 35477 | { 11679, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cf70024829ULL }, // Inst #11679 = VFNMSUB132PDZ128rk |
| 35478 | { 11678, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf70024829ULL }, // Inst #11678 = VFNMSUB132PDZ128r |
| 35479 | { 11677, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf70024819ULL }, // Inst #11677 = VFNMSUB132PDZ128mkz |
| 35480 | { 11676, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cf70024819ULL }, // Inst #11676 = VFNMSUB132PDZ128mk |
| 35481 | { 11675, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96cf70024819ULL }, // Inst #11675 = VFNMSUB132PDZ128mbkz |
| 35482 | { 11674, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92cf70024819ULL }, // Inst #11674 = VFNMSUB132PDZ128mbk |
| 35483 | { 11673, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90cf70024819ULL }, // Inst #11673 = VFNMSUB132PDZ128mb |
| 35484 | { 11672, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf70024819ULL }, // Inst #11672 = VFNMSUB132PDZ128m |
| 35485 | { 11671, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cf30024829ULL }, // Inst #11671 = VFNMSUB132PDYr |
| 35486 | { 11670, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cf30024819ULL }, // Inst #11670 = VFNMSUB132PDYm |
| 35487 | { 11669, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeecf68014029ULL }, // Inst #11669 = VFNMSUB132BF16Zrkz |
| 35488 | { 11668, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeacf68014029ULL }, // Inst #11668 = VFNMSUB132BF16Zrk |
| 35489 | { 11667, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8cf68014029ULL }, // Inst #11667 = VFNMSUB132BF16Zr |
| 35490 | { 11666, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeecf68014019ULL }, // Inst #11666 = VFNMSUB132BF16Zmkz |
| 35491 | { 11665, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeacf68014019ULL }, // Inst #11665 = VFNMSUB132BF16Zmk |
| 35492 | { 11664, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5ecf68014019ULL }, // Inst #11664 = VFNMSUB132BF16Zmbkz |
| 35493 | { 11663, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5acf68014019ULL }, // Inst #11663 = VFNMSUB132BF16Zmbk |
| 35494 | { 11662, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58cf68014019ULL }, // Inst #11662 = VFNMSUB132BF16Zmb |
| 35495 | { 11661, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8cf68014019ULL }, // Inst #11661 = VFNMSUB132BF16Zm |
| 35496 | { 11660, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7cf68014029ULL }, // Inst #11660 = VFNMSUB132BF16Z256rkz |
| 35497 | { 11659, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3cf68014029ULL }, // Inst #11659 = VFNMSUB132BF16Z256rk |
| 35498 | { 11658, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1cf68014029ULL }, // Inst #11658 = VFNMSUB132BF16Z256r |
| 35499 | { 11657, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7cf68014019ULL }, // Inst #11657 = VFNMSUB132BF16Z256mkz |
| 35500 | { 11656, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3cf68014019ULL }, // Inst #11656 = VFNMSUB132BF16Z256mk |
| 35501 | { 11655, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57cf68014019ULL }, // Inst #11655 = VFNMSUB132BF16Z256mbkz |
| 35502 | { 11654, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53cf68014019ULL }, // Inst #11654 = VFNMSUB132BF16Z256mbk |
| 35503 | { 11653, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51cf68014019ULL }, // Inst #11653 = VFNMSUB132BF16Z256mb |
| 35504 | { 11652, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1cf68014019ULL }, // Inst #11652 = VFNMSUB132BF16Z256m |
| 35505 | { 11651, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6cf68014029ULL }, // Inst #11651 = VFNMSUB132BF16Z128rkz |
| 35506 | { 11650, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2cf68014029ULL }, // Inst #11650 = VFNMSUB132BF16Z128rk |
| 35507 | { 11649, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0cf68014029ULL }, // Inst #11649 = VFNMSUB132BF16Z128r |
| 35508 | { 11648, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6cf68014019ULL }, // Inst #11648 = VFNMSUB132BF16Z128mkz |
| 35509 | { 11647, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2cf68014019ULL }, // Inst #11647 = VFNMSUB132BF16Z128mk |
| 35510 | { 11646, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56cf68014019ULL }, // Inst #11646 = VFNMSUB132BF16Z128mbkz |
| 35511 | { 11645, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52cf68014019ULL }, // Inst #11645 = VFNMSUB132BF16Z128mbk |
| 35512 | { 11644, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50cf68014019ULL }, // Inst #11644 = VFNMSUB132BF16Z128mb |
| 35513 | { 11643, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0cf68014019ULL }, // Inst #11643 = VFNMSUB132BF16Z128m |
| 35514 | { 11642, 4, 1, 0, 444, 1, 0, 4118, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbd280c6829ULL }, // Inst #11642 = VFNMADDSS4rr_REV |
| 35515 | { 11641, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbd280c6829ULL }, // Inst #11641 = VFNMADDSS4rr_Int_REV |
| 35516 | { 11640, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbd280e682bULL }, // Inst #11640 = VFNMADDSS4rr_Int |
| 35517 | { 11639, 4, 1, 0, 444, 1, 0, 4118, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbd280e682bULL }, // Inst #11639 = VFNMADDSS4rr |
| 35518 | { 11638, 8, 1, 0, 443, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbd280e681bULL }, // Inst #11638 = VFNMADDSS4rm_Int |
| 35519 | { 11637, 8, 1, 0, 443, 1, 0, 4110, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbd280e681bULL }, // Inst #11637 = VFNMADDSS4rm |
| 35520 | { 11636, 8, 1, 0, 447, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbd280c6819ULL }, // Inst #11636 = VFNMADDSS4mr_Int |
| 35521 | { 11635, 8, 1, 0, 447, 1, 0, 4102, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbd280c6819ULL }, // Inst #11635 = VFNMADDSS4mr |
| 35522 | { 11634, 4, 1, 0, 444, 1, 0, 4098, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbdb00c6829ULL }, // Inst #11634 = VFNMADDSD4rr_REV |
| 35523 | { 11633, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbdb00c6829ULL }, // Inst #11633 = VFNMADDSD4rr_Int_REV |
| 35524 | { 11632, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbdb00e682bULL }, // Inst #11632 = VFNMADDSD4rr_Int |
| 35525 | { 11631, 4, 1, 0, 444, 1, 0, 4098, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbdb00e682bULL }, // Inst #11631 = VFNMADDSD4rr |
| 35526 | { 11630, 8, 1, 0, 443, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbdb00e681bULL }, // Inst #11630 = VFNMADDSD4rm_Int |
| 35527 | { 11629, 8, 1, 0, 443, 1, 0, 4090, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbdb00e681bULL }, // Inst #11629 = VFNMADDSD4rm |
| 35528 | { 11628, 8, 1, 0, 447, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbdb00c6819ULL }, // Inst #11628 = VFNMADDSD4mr_Int |
| 35529 | { 11627, 8, 1, 0, 447, 1, 0, 4082, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbdb00c6819ULL }, // Inst #11627 = VFNMADDSD4mr |
| 35530 | { 11626, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbc280c6829ULL }, // Inst #11626 = VFNMADDPS4rr_REV |
| 35531 | { 11625, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbc280e682bULL }, // Inst #11625 = VFNMADDPS4rr |
| 35532 | { 11624, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbc280e681bULL }, // Inst #11624 = VFNMADDPS4rm |
| 35533 | { 11623, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbc280c6819ULL }, // Inst #11623 = VFNMADDPS4mr |
| 35534 | { 11622, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1bc280c6829ULL }, // Inst #11622 = VFNMADDPS4Yrr_REV |
| 35535 | { 11621, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1bc280e682bULL }, // Inst #11621 = VFNMADDPS4Yrr |
| 35536 | { 11620, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1bc280e681bULL }, // Inst #11620 = VFNMADDPS4Yrm |
| 35537 | { 11619, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1bc280c6819ULL }, // Inst #11619 = VFNMADDPS4Ymr |
| 35538 | { 11618, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xbcb00c6829ULL }, // Inst #11618 = VFNMADDPD4rr_REV |
| 35539 | { 11617, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbcb00e682bULL }, // Inst #11617 = VFNMADDPD4rr |
| 35540 | { 11616, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbcb00e681bULL }, // Inst #11616 = VFNMADDPD4rm |
| 35541 | { 11615, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbcb00c6819ULL }, // Inst #11615 = VFNMADDPD4mr |
| 35542 | { 11614, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1bcb00c6829ULL }, // Inst #11614 = VFNMADDPD4Yrr_REV |
| 35543 | { 11613, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1bcb00e682bULL }, // Inst #11613 = VFNMADDPD4Yrr |
| 35544 | { 11612, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1bcb00e681bULL }, // Inst #11612 = VFNMADDPD4Yrm |
| 35545 | { 11611, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1bcb00c6819ULL }, // Inst #11611 = VFNMADDPD4Ymr |
| 35546 | { 11610, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdea8004829ULL }, // Inst #11610 = VFNMADD231SSr_Int |
| 35547 | { 11609, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdea8004829ULL }, // Inst #11609 = VFNMADD231SSr |
| 35548 | { 11608, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdea8004819ULL }, // Inst #11608 = VFNMADD231SSm_Int |
| 35549 | { 11607, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdea8004819ULL }, // Inst #11607 = VFNMADD231SSm |
| 35550 | { 11606, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dee8004829ULL }, // Inst #11606 = VFNMADD231SSZrkz_Int |
| 35551 | { 11605, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dee8004829ULL }, // Inst #11605 = VFNMADD231SSZrk_Int |
| 35552 | { 11604, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176dee8004829ULL }, // Inst #11604 = VFNMADD231SSZrbkz_Int |
| 35553 | { 11603, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172dee8004829ULL }, // Inst #11603 = VFNMADD231SSZrbk_Int |
| 35554 | { 11602, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170dee8004829ULL }, // Inst #11602 = VFNMADD231SSZrb_Int |
| 35555 | { 11601, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170dee8004829ULL }, // Inst #11601 = VFNMADD231SSZrb |
| 35556 | { 11600, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dee8004829ULL }, // Inst #11600 = VFNMADD231SSZr_Int |
| 35557 | { 11599, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dee8004829ULL }, // Inst #11599 = VFNMADD231SSZr |
| 35558 | { 11598, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dee8004819ULL }, // Inst #11598 = VFNMADD231SSZmkz_Int |
| 35559 | { 11597, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dee8004819ULL }, // Inst #11597 = VFNMADD231SSZmk_Int |
| 35560 | { 11596, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dee8004819ULL }, // Inst #11596 = VFNMADD231SSZm_Int |
| 35561 | { 11595, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dee8004819ULL }, // Inst #11595 = VFNMADD231SSZm |
| 35562 | { 11594, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dee8014829ULL }, // Inst #11594 = VFNMADD231SHZrkz_Int |
| 35563 | { 11593, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dee8014829ULL }, // Inst #11593 = VFNMADD231SHZrk_Int |
| 35564 | { 11592, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156dee8014829ULL }, // Inst #11592 = VFNMADD231SHZrbkz_Int |
| 35565 | { 11591, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152dee8014829ULL }, // Inst #11591 = VFNMADD231SHZrbk_Int |
| 35566 | { 11590, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150dee8014829ULL }, // Inst #11590 = VFNMADD231SHZrb_Int |
| 35567 | { 11589, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150dee8014829ULL }, // Inst #11589 = VFNMADD231SHZrb |
| 35568 | { 11588, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dee8014829ULL }, // Inst #11588 = VFNMADD231SHZr_Int |
| 35569 | { 11587, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dee8014829ULL }, // Inst #11587 = VFNMADD231SHZr |
| 35570 | { 11586, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dee8014819ULL }, // Inst #11586 = VFNMADD231SHZmkz_Int |
| 35571 | { 11585, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dee8014819ULL }, // Inst #11585 = VFNMADD231SHZmk_Int |
| 35572 | { 11584, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dee8014819ULL }, // Inst #11584 = VFNMADD231SHZm_Int |
| 35573 | { 11583, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dee8014819ULL }, // Inst #11583 = VFNMADD231SHZm |
| 35574 | { 11582, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdeb0024829ULL }, // Inst #11582 = VFNMADD231SDr_Int |
| 35575 | { 11581, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdeb0024829ULL }, // Inst #11581 = VFNMADD231SDr |
| 35576 | { 11580, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdeb0024819ULL }, // Inst #11580 = VFNMADD231SDm_Int |
| 35577 | { 11579, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdeb0024819ULL }, // Inst #11579 = VFNMADD231SDm |
| 35578 | { 11578, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86def0024829ULL }, // Inst #11578 = VFNMADD231SDZrkz_Int |
| 35579 | { 11577, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82def0024829ULL }, // Inst #11577 = VFNMADD231SDZrk_Int |
| 35580 | { 11576, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196def0024829ULL }, // Inst #11576 = VFNMADD231SDZrbkz_Int |
| 35581 | { 11575, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192def0024829ULL }, // Inst #11575 = VFNMADD231SDZrbk_Int |
| 35582 | { 11574, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190def0024829ULL }, // Inst #11574 = VFNMADD231SDZrb_Int |
| 35583 | { 11573, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190def0024829ULL }, // Inst #11573 = VFNMADD231SDZrb |
| 35584 | { 11572, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80def0024829ULL }, // Inst #11572 = VFNMADD231SDZr_Int |
| 35585 | { 11571, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80def0024829ULL }, // Inst #11571 = VFNMADD231SDZr |
| 35586 | { 11570, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86def0024819ULL }, // Inst #11570 = VFNMADD231SDZmkz_Int |
| 35587 | { 11569, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82def0024819ULL }, // Inst #11569 = VFNMADD231SDZmk_Int |
| 35588 | { 11568, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80def0024819ULL }, // Inst #11568 = VFNMADD231SDZm_Int |
| 35589 | { 11567, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80def0024819ULL }, // Inst #11567 = VFNMADD231SDZm |
| 35590 | { 11566, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xde28004829ULL }, // Inst #11566 = VFNMADD231PSr |
| 35591 | { 11565, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xde28004819ULL }, // Inst #11565 = VFNMADD231PSm |
| 35592 | { 11564, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede68004829ULL }, // Inst #11564 = VFNMADD231PSZrkz |
| 35593 | { 11563, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeade68004829ULL }, // Inst #11563 = VFNMADD231PSZrk |
| 35594 | { 11562, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ede68004829ULL }, // Inst #11562 = VFNMADD231PSZrbkz |
| 35595 | { 11561, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ade68004829ULL }, // Inst #11561 = VFNMADD231PSZrbk |
| 35596 | { 11560, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178de68004829ULL }, // Inst #11560 = VFNMADD231PSZrb |
| 35597 | { 11559, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de68004829ULL }, // Inst #11559 = VFNMADD231PSZr |
| 35598 | { 11558, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede68004819ULL }, // Inst #11558 = VFNMADD231PSZmkz |
| 35599 | { 11557, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeade68004819ULL }, // Inst #11557 = VFNMADD231PSZmk |
| 35600 | { 11556, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ede68004819ULL }, // Inst #11556 = VFNMADD231PSZmbkz |
| 35601 | { 11555, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ade68004819ULL }, // Inst #11555 = VFNMADD231PSZmbk |
| 35602 | { 11554, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78de68004819ULL }, // Inst #11554 = VFNMADD231PSZmb |
| 35603 | { 11553, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de68004819ULL }, // Inst #11553 = VFNMADD231PSZm |
| 35604 | { 11552, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de68004829ULL }, // Inst #11552 = VFNMADD231PSZ256rkz |
| 35605 | { 11551, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3de68004829ULL }, // Inst #11551 = VFNMADD231PSZ256rk |
| 35606 | { 11550, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de68004829ULL }, // Inst #11550 = VFNMADD231PSZ256r |
| 35607 | { 11549, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de68004819ULL }, // Inst #11549 = VFNMADD231PSZ256mkz |
| 35608 | { 11548, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3de68004819ULL }, // Inst #11548 = VFNMADD231PSZ256mk |
| 35609 | { 11547, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77de68004819ULL }, // Inst #11547 = VFNMADD231PSZ256mbkz |
| 35610 | { 11546, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73de68004819ULL }, // Inst #11546 = VFNMADD231PSZ256mbk |
| 35611 | { 11545, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71de68004819ULL }, // Inst #11545 = VFNMADD231PSZ256mb |
| 35612 | { 11544, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de68004819ULL }, // Inst #11544 = VFNMADD231PSZ256m |
| 35613 | { 11543, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de68004829ULL }, // Inst #11543 = VFNMADD231PSZ128rkz |
| 35614 | { 11542, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2de68004829ULL }, // Inst #11542 = VFNMADD231PSZ128rk |
| 35615 | { 11541, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de68004829ULL }, // Inst #11541 = VFNMADD231PSZ128r |
| 35616 | { 11540, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de68004819ULL }, // Inst #11540 = VFNMADD231PSZ128mkz |
| 35617 | { 11539, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2de68004819ULL }, // Inst #11539 = VFNMADD231PSZ128mk |
| 35618 | { 11538, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76de68004819ULL }, // Inst #11538 = VFNMADD231PSZ128mbkz |
| 35619 | { 11537, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72de68004819ULL }, // Inst #11537 = VFNMADD231PSZ128mbk |
| 35620 | { 11536, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70de68004819ULL }, // Inst #11536 = VFNMADD231PSZ128mb |
| 35621 | { 11535, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de68004819ULL }, // Inst #11535 = VFNMADD231PSZ128m |
| 35622 | { 11534, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1de28004829ULL }, // Inst #11534 = VFNMADD231PSYr |
| 35623 | { 11533, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1de28004819ULL }, // Inst #11533 = VFNMADD231PSYm |
| 35624 | { 11532, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede68014829ULL }, // Inst #11532 = VFNMADD231PHZrkz |
| 35625 | { 11531, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeade68014829ULL }, // Inst #11531 = VFNMADD231PHZrk |
| 35626 | { 11530, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ede68014829ULL }, // Inst #11530 = VFNMADD231PHZrbkz |
| 35627 | { 11529, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ade68014829ULL }, // Inst #11529 = VFNMADD231PHZrbk |
| 35628 | { 11528, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158de68014829ULL }, // Inst #11528 = VFNMADD231PHZrb |
| 35629 | { 11527, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de68014829ULL }, // Inst #11527 = VFNMADD231PHZr |
| 35630 | { 11526, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede68014819ULL }, // Inst #11526 = VFNMADD231PHZmkz |
| 35631 | { 11525, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeade68014819ULL }, // Inst #11525 = VFNMADD231PHZmk |
| 35632 | { 11524, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ede68014819ULL }, // Inst #11524 = VFNMADD231PHZmbkz |
| 35633 | { 11523, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ade68014819ULL }, // Inst #11523 = VFNMADD231PHZmbk |
| 35634 | { 11522, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58de68014819ULL }, // Inst #11522 = VFNMADD231PHZmb |
| 35635 | { 11521, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de68014819ULL }, // Inst #11521 = VFNMADD231PHZm |
| 35636 | { 11520, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de68014829ULL }, // Inst #11520 = VFNMADD231PHZ256rkz |
| 35637 | { 11519, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3de68014829ULL }, // Inst #11519 = VFNMADD231PHZ256rk |
| 35638 | { 11518, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de68014829ULL }, // Inst #11518 = VFNMADD231PHZ256r |
| 35639 | { 11517, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de68014819ULL }, // Inst #11517 = VFNMADD231PHZ256mkz |
| 35640 | { 11516, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3de68014819ULL }, // Inst #11516 = VFNMADD231PHZ256mk |
| 35641 | { 11515, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57de68014819ULL }, // Inst #11515 = VFNMADD231PHZ256mbkz |
| 35642 | { 11514, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53de68014819ULL }, // Inst #11514 = VFNMADD231PHZ256mbk |
| 35643 | { 11513, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51de68014819ULL }, // Inst #11513 = VFNMADD231PHZ256mb |
| 35644 | { 11512, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de68014819ULL }, // Inst #11512 = VFNMADD231PHZ256m |
| 35645 | { 11511, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de68014829ULL }, // Inst #11511 = VFNMADD231PHZ128rkz |
| 35646 | { 11510, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2de68014829ULL }, // Inst #11510 = VFNMADD231PHZ128rk |
| 35647 | { 11509, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de68014829ULL }, // Inst #11509 = VFNMADD231PHZ128r |
| 35648 | { 11508, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de68014819ULL }, // Inst #11508 = VFNMADD231PHZ128mkz |
| 35649 | { 11507, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2de68014819ULL }, // Inst #11507 = VFNMADD231PHZ128mk |
| 35650 | { 11506, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56de68014819ULL }, // Inst #11506 = VFNMADD231PHZ128mbkz |
| 35651 | { 11505, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52de68014819ULL }, // Inst #11505 = VFNMADD231PHZ128mbk |
| 35652 | { 11504, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50de68014819ULL }, // Inst #11504 = VFNMADD231PHZ128mb |
| 35653 | { 11503, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de68014819ULL }, // Inst #11503 = VFNMADD231PHZ128m |
| 35654 | { 11502, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xde30024829ULL }, // Inst #11502 = VFNMADD231PDr |
| 35655 | { 11501, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xde30024819ULL }, // Inst #11501 = VFNMADD231PDm |
| 35656 | { 11500, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede70024829ULL }, // Inst #11500 = VFNMADD231PDZrkz |
| 35657 | { 11499, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeade70024829ULL }, // Inst #11499 = VFNMADD231PDZrk |
| 35658 | { 11498, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ede70024829ULL }, // Inst #11498 = VFNMADD231PDZrbkz |
| 35659 | { 11497, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ade70024829ULL }, // Inst #11497 = VFNMADD231PDZrbk |
| 35660 | { 11496, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198de70024829ULL }, // Inst #11496 = VFNMADD231PDZrb |
| 35661 | { 11495, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de70024829ULL }, // Inst #11495 = VFNMADD231PDZr |
| 35662 | { 11494, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede70024819ULL }, // Inst #11494 = VFNMADD231PDZmkz |
| 35663 | { 11493, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeade70024819ULL }, // Inst #11493 = VFNMADD231PDZmk |
| 35664 | { 11492, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ede70024819ULL }, // Inst #11492 = VFNMADD231PDZmbkz |
| 35665 | { 11491, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ade70024819ULL }, // Inst #11491 = VFNMADD231PDZmbk |
| 35666 | { 11490, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98de70024819ULL }, // Inst #11490 = VFNMADD231PDZmb |
| 35667 | { 11489, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de70024819ULL }, // Inst #11489 = VFNMADD231PDZm |
| 35668 | { 11488, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de70024829ULL }, // Inst #11488 = VFNMADD231PDZ256rkz |
| 35669 | { 11487, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3de70024829ULL }, // Inst #11487 = VFNMADD231PDZ256rk |
| 35670 | { 11486, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de70024829ULL }, // Inst #11486 = VFNMADD231PDZ256r |
| 35671 | { 11485, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de70024819ULL }, // Inst #11485 = VFNMADD231PDZ256mkz |
| 35672 | { 11484, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3de70024819ULL }, // Inst #11484 = VFNMADD231PDZ256mk |
| 35673 | { 11483, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97de70024819ULL }, // Inst #11483 = VFNMADD231PDZ256mbkz |
| 35674 | { 11482, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93de70024819ULL }, // Inst #11482 = VFNMADD231PDZ256mbk |
| 35675 | { 11481, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91de70024819ULL }, // Inst #11481 = VFNMADD231PDZ256mb |
| 35676 | { 11480, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de70024819ULL }, // Inst #11480 = VFNMADD231PDZ256m |
| 35677 | { 11479, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de70024829ULL }, // Inst #11479 = VFNMADD231PDZ128rkz |
| 35678 | { 11478, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2de70024829ULL }, // Inst #11478 = VFNMADD231PDZ128rk |
| 35679 | { 11477, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de70024829ULL }, // Inst #11477 = VFNMADD231PDZ128r |
| 35680 | { 11476, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de70024819ULL }, // Inst #11476 = VFNMADD231PDZ128mkz |
| 35681 | { 11475, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2de70024819ULL }, // Inst #11475 = VFNMADD231PDZ128mk |
| 35682 | { 11474, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96de70024819ULL }, // Inst #11474 = VFNMADD231PDZ128mbkz |
| 35683 | { 11473, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92de70024819ULL }, // Inst #11473 = VFNMADD231PDZ128mbk |
| 35684 | { 11472, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90de70024819ULL }, // Inst #11472 = VFNMADD231PDZ128mb |
| 35685 | { 11471, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de70024819ULL }, // Inst #11471 = VFNMADD231PDZ128m |
| 35686 | { 11470, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1de30024829ULL }, // Inst #11470 = VFNMADD231PDYr |
| 35687 | { 11469, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1de30024819ULL }, // Inst #11469 = VFNMADD231PDYm |
| 35688 | { 11468, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeede68014029ULL }, // Inst #11468 = VFNMADD231BF16Zrkz |
| 35689 | { 11467, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeade68014029ULL }, // Inst #11467 = VFNMADD231BF16Zrk |
| 35690 | { 11466, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8de68014029ULL }, // Inst #11466 = VFNMADD231BF16Zr |
| 35691 | { 11465, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeede68014019ULL }, // Inst #11465 = VFNMADD231BF16Zmkz |
| 35692 | { 11464, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeade68014019ULL }, // Inst #11464 = VFNMADD231BF16Zmk |
| 35693 | { 11463, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5ede68014019ULL }, // Inst #11463 = VFNMADD231BF16Zmbkz |
| 35694 | { 11462, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5ade68014019ULL }, // Inst #11462 = VFNMADD231BF16Zmbk |
| 35695 | { 11461, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58de68014019ULL }, // Inst #11461 = VFNMADD231BF16Zmb |
| 35696 | { 11460, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8de68014019ULL }, // Inst #11460 = VFNMADD231BF16Zm |
| 35697 | { 11459, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7de68014029ULL }, // Inst #11459 = VFNMADD231BF16Z256rkz |
| 35698 | { 11458, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3de68014029ULL }, // Inst #11458 = VFNMADD231BF16Z256rk |
| 35699 | { 11457, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1de68014029ULL }, // Inst #11457 = VFNMADD231BF16Z256r |
| 35700 | { 11456, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7de68014019ULL }, // Inst #11456 = VFNMADD231BF16Z256mkz |
| 35701 | { 11455, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3de68014019ULL }, // Inst #11455 = VFNMADD231BF16Z256mk |
| 35702 | { 11454, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57de68014019ULL }, // Inst #11454 = VFNMADD231BF16Z256mbkz |
| 35703 | { 11453, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53de68014019ULL }, // Inst #11453 = VFNMADD231BF16Z256mbk |
| 35704 | { 11452, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51de68014019ULL }, // Inst #11452 = VFNMADD231BF16Z256mb |
| 35705 | { 11451, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1de68014019ULL }, // Inst #11451 = VFNMADD231BF16Z256m |
| 35706 | { 11450, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6de68014029ULL }, // Inst #11450 = VFNMADD231BF16Z128rkz |
| 35707 | { 11449, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2de68014029ULL }, // Inst #11449 = VFNMADD231BF16Z128rk |
| 35708 | { 11448, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0de68014029ULL }, // Inst #11448 = VFNMADD231BF16Z128r |
| 35709 | { 11447, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6de68014019ULL }, // Inst #11447 = VFNMADD231BF16Z128mkz |
| 35710 | { 11446, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2de68014019ULL }, // Inst #11446 = VFNMADD231BF16Z128mk |
| 35711 | { 11445, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56de68014019ULL }, // Inst #11445 = VFNMADD231BF16Z128mbkz |
| 35712 | { 11444, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52de68014019ULL }, // Inst #11444 = VFNMADD231BF16Z128mbk |
| 35713 | { 11443, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50de68014019ULL }, // Inst #11443 = VFNMADD231BF16Z128mb |
| 35714 | { 11442, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0de68014019ULL }, // Inst #11442 = VFNMADD231BF16Z128m |
| 35715 | { 11441, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6a8004829ULL }, // Inst #11441 = VFNMADD213SSr_Int |
| 35716 | { 11440, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6a8004829ULL }, // Inst #11440 = VFNMADD213SSr |
| 35717 | { 11439, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6a8004819ULL }, // Inst #11439 = VFNMADD213SSm_Int |
| 35718 | { 11438, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6a8004819ULL }, // Inst #11438 = VFNMADD213SSm |
| 35719 | { 11437, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d6e8004829ULL }, // Inst #11437 = VFNMADD213SSZrkz_Int |
| 35720 | { 11436, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d6e8004829ULL }, // Inst #11436 = VFNMADD213SSZrk_Int |
| 35721 | { 11435, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176d6e8004829ULL }, // Inst #11435 = VFNMADD213SSZrbkz_Int |
| 35722 | { 11434, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172d6e8004829ULL }, // Inst #11434 = VFNMADD213SSZrbk_Int |
| 35723 | { 11433, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170d6e8004829ULL }, // Inst #11433 = VFNMADD213SSZrb_Int |
| 35724 | { 11432, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170d6e8004829ULL }, // Inst #11432 = VFNMADD213SSZrb |
| 35725 | { 11431, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d6e8004829ULL }, // Inst #11431 = VFNMADD213SSZr_Int |
| 35726 | { 11430, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d6e8004829ULL }, // Inst #11430 = VFNMADD213SSZr |
| 35727 | { 11429, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d6e8004819ULL }, // Inst #11429 = VFNMADD213SSZmkz_Int |
| 35728 | { 11428, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d6e8004819ULL }, // Inst #11428 = VFNMADD213SSZmk_Int |
| 35729 | { 11427, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d6e8004819ULL }, // Inst #11427 = VFNMADD213SSZm_Int |
| 35730 | { 11426, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d6e8004819ULL }, // Inst #11426 = VFNMADD213SSZm |
| 35731 | { 11425, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d6e8014829ULL }, // Inst #11425 = VFNMADD213SHZrkz_Int |
| 35732 | { 11424, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d6e8014829ULL }, // Inst #11424 = VFNMADD213SHZrk_Int |
| 35733 | { 11423, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156d6e8014829ULL }, // Inst #11423 = VFNMADD213SHZrbkz_Int |
| 35734 | { 11422, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152d6e8014829ULL }, // Inst #11422 = VFNMADD213SHZrbk_Int |
| 35735 | { 11421, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150d6e8014829ULL }, // Inst #11421 = VFNMADD213SHZrb_Int |
| 35736 | { 11420, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150d6e8014829ULL }, // Inst #11420 = VFNMADD213SHZrb |
| 35737 | { 11419, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d6e8014829ULL }, // Inst #11419 = VFNMADD213SHZr_Int |
| 35738 | { 11418, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d6e8014829ULL }, // Inst #11418 = VFNMADD213SHZr |
| 35739 | { 11417, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d6e8014819ULL }, // Inst #11417 = VFNMADD213SHZmkz_Int |
| 35740 | { 11416, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d6e8014819ULL }, // Inst #11416 = VFNMADD213SHZmk_Int |
| 35741 | { 11415, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d6e8014819ULL }, // Inst #11415 = VFNMADD213SHZm_Int |
| 35742 | { 11414, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d6e8014819ULL }, // Inst #11414 = VFNMADD213SHZm |
| 35743 | { 11413, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6b0024829ULL }, // Inst #11413 = VFNMADD213SDr_Int |
| 35744 | { 11412, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6b0024829ULL }, // Inst #11412 = VFNMADD213SDr |
| 35745 | { 11411, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6b0024819ULL }, // Inst #11411 = VFNMADD213SDm_Int |
| 35746 | { 11410, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6b0024819ULL }, // Inst #11410 = VFNMADD213SDm |
| 35747 | { 11409, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d6f0024829ULL }, // Inst #11409 = VFNMADD213SDZrkz_Int |
| 35748 | { 11408, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d6f0024829ULL }, // Inst #11408 = VFNMADD213SDZrk_Int |
| 35749 | { 11407, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196d6f0024829ULL }, // Inst #11407 = VFNMADD213SDZrbkz_Int |
| 35750 | { 11406, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192d6f0024829ULL }, // Inst #11406 = VFNMADD213SDZrbk_Int |
| 35751 | { 11405, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190d6f0024829ULL }, // Inst #11405 = VFNMADD213SDZrb_Int |
| 35752 | { 11404, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190d6f0024829ULL }, // Inst #11404 = VFNMADD213SDZrb |
| 35753 | { 11403, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d6f0024829ULL }, // Inst #11403 = VFNMADD213SDZr_Int |
| 35754 | { 11402, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d6f0024829ULL }, // Inst #11402 = VFNMADD213SDZr |
| 35755 | { 11401, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d6f0024819ULL }, // Inst #11401 = VFNMADD213SDZmkz_Int |
| 35756 | { 11400, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d6f0024819ULL }, // Inst #11400 = VFNMADD213SDZmk_Int |
| 35757 | { 11399, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d6f0024819ULL }, // Inst #11399 = VFNMADD213SDZm_Int |
| 35758 | { 11398, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d6f0024819ULL }, // Inst #11398 = VFNMADD213SDZm |
| 35759 | { 11397, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd628004829ULL }, // Inst #11397 = VFNMADD213PSr |
| 35760 | { 11396, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd628004819ULL }, // Inst #11396 = VFNMADD213PSm |
| 35761 | { 11395, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed668004829ULL }, // Inst #11395 = VFNMADD213PSZrkz |
| 35762 | { 11394, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead668004829ULL }, // Inst #11394 = VFNMADD213PSZrk |
| 35763 | { 11393, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ed668004829ULL }, // Inst #11393 = VFNMADD213PSZrbkz |
| 35764 | { 11392, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ad668004829ULL }, // Inst #11392 = VFNMADD213PSZrbk |
| 35765 | { 11391, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178d668004829ULL }, // Inst #11391 = VFNMADD213PSZrb |
| 35766 | { 11390, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d668004829ULL }, // Inst #11390 = VFNMADD213PSZr |
| 35767 | { 11389, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed668004819ULL }, // Inst #11389 = VFNMADD213PSZmkz |
| 35768 | { 11388, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead668004819ULL }, // Inst #11388 = VFNMADD213PSZmk |
| 35769 | { 11387, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed668004819ULL }, // Inst #11387 = VFNMADD213PSZmbkz |
| 35770 | { 11386, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad668004819ULL }, // Inst #11386 = VFNMADD213PSZmbk |
| 35771 | { 11385, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d668004819ULL }, // Inst #11385 = VFNMADD213PSZmb |
| 35772 | { 11384, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d668004819ULL }, // Inst #11384 = VFNMADD213PSZm |
| 35773 | { 11383, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d668004829ULL }, // Inst #11383 = VFNMADD213PSZ256rkz |
| 35774 | { 11382, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d668004829ULL }, // Inst #11382 = VFNMADD213PSZ256rk |
| 35775 | { 11381, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d668004829ULL }, // Inst #11381 = VFNMADD213PSZ256r |
| 35776 | { 11380, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d668004819ULL }, // Inst #11380 = VFNMADD213PSZ256mkz |
| 35777 | { 11379, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d668004819ULL }, // Inst #11379 = VFNMADD213PSZ256mk |
| 35778 | { 11378, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d668004819ULL }, // Inst #11378 = VFNMADD213PSZ256mbkz |
| 35779 | { 11377, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d668004819ULL }, // Inst #11377 = VFNMADD213PSZ256mbk |
| 35780 | { 11376, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d668004819ULL }, // Inst #11376 = VFNMADD213PSZ256mb |
| 35781 | { 11375, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d668004819ULL }, // Inst #11375 = VFNMADD213PSZ256m |
| 35782 | { 11374, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d668004829ULL }, // Inst #11374 = VFNMADD213PSZ128rkz |
| 35783 | { 11373, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d668004829ULL }, // Inst #11373 = VFNMADD213PSZ128rk |
| 35784 | { 11372, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d668004829ULL }, // Inst #11372 = VFNMADD213PSZ128r |
| 35785 | { 11371, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d668004819ULL }, // Inst #11371 = VFNMADD213PSZ128mkz |
| 35786 | { 11370, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d668004819ULL }, // Inst #11370 = VFNMADD213PSZ128mk |
| 35787 | { 11369, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d668004819ULL }, // Inst #11369 = VFNMADD213PSZ128mbkz |
| 35788 | { 11368, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d668004819ULL }, // Inst #11368 = VFNMADD213PSZ128mbk |
| 35789 | { 11367, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d668004819ULL }, // Inst #11367 = VFNMADD213PSZ128mb |
| 35790 | { 11366, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d668004819ULL }, // Inst #11366 = VFNMADD213PSZ128m |
| 35791 | { 11365, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d628004829ULL }, // Inst #11365 = VFNMADD213PSYr |
| 35792 | { 11364, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d628004819ULL }, // Inst #11364 = VFNMADD213PSYm |
| 35793 | { 11363, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed668014829ULL }, // Inst #11363 = VFNMADD213PHZrkz |
| 35794 | { 11362, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead668014829ULL }, // Inst #11362 = VFNMADD213PHZrk |
| 35795 | { 11361, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ed668014829ULL }, // Inst #11361 = VFNMADD213PHZrbkz |
| 35796 | { 11360, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ad668014829ULL }, // Inst #11360 = VFNMADD213PHZrbk |
| 35797 | { 11359, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158d668014829ULL }, // Inst #11359 = VFNMADD213PHZrb |
| 35798 | { 11358, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d668014829ULL }, // Inst #11358 = VFNMADD213PHZr |
| 35799 | { 11357, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed668014819ULL }, // Inst #11357 = VFNMADD213PHZmkz |
| 35800 | { 11356, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead668014819ULL }, // Inst #11356 = VFNMADD213PHZmk |
| 35801 | { 11355, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed668014819ULL }, // Inst #11355 = VFNMADD213PHZmbkz |
| 35802 | { 11354, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad668014819ULL }, // Inst #11354 = VFNMADD213PHZmbk |
| 35803 | { 11353, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d668014819ULL }, // Inst #11353 = VFNMADD213PHZmb |
| 35804 | { 11352, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d668014819ULL }, // Inst #11352 = VFNMADD213PHZm |
| 35805 | { 11351, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d668014829ULL }, // Inst #11351 = VFNMADD213PHZ256rkz |
| 35806 | { 11350, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d668014829ULL }, // Inst #11350 = VFNMADD213PHZ256rk |
| 35807 | { 11349, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d668014829ULL }, // Inst #11349 = VFNMADD213PHZ256r |
| 35808 | { 11348, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d668014819ULL }, // Inst #11348 = VFNMADD213PHZ256mkz |
| 35809 | { 11347, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d668014819ULL }, // Inst #11347 = VFNMADD213PHZ256mk |
| 35810 | { 11346, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d668014819ULL }, // Inst #11346 = VFNMADD213PHZ256mbkz |
| 35811 | { 11345, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d668014819ULL }, // Inst #11345 = VFNMADD213PHZ256mbk |
| 35812 | { 11344, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d668014819ULL }, // Inst #11344 = VFNMADD213PHZ256mb |
| 35813 | { 11343, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d668014819ULL }, // Inst #11343 = VFNMADD213PHZ256m |
| 35814 | { 11342, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d668014829ULL }, // Inst #11342 = VFNMADD213PHZ128rkz |
| 35815 | { 11341, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d668014829ULL }, // Inst #11341 = VFNMADD213PHZ128rk |
| 35816 | { 11340, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d668014829ULL }, // Inst #11340 = VFNMADD213PHZ128r |
| 35817 | { 11339, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d668014819ULL }, // Inst #11339 = VFNMADD213PHZ128mkz |
| 35818 | { 11338, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d668014819ULL }, // Inst #11338 = VFNMADD213PHZ128mk |
| 35819 | { 11337, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d668014819ULL }, // Inst #11337 = VFNMADD213PHZ128mbkz |
| 35820 | { 11336, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d668014819ULL }, // Inst #11336 = VFNMADD213PHZ128mbk |
| 35821 | { 11335, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d668014819ULL }, // Inst #11335 = VFNMADD213PHZ128mb |
| 35822 | { 11334, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d668014819ULL }, // Inst #11334 = VFNMADD213PHZ128m |
| 35823 | { 11333, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd630024829ULL }, // Inst #11333 = VFNMADD213PDr |
| 35824 | { 11332, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd630024819ULL }, // Inst #11332 = VFNMADD213PDm |
| 35825 | { 11331, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed670024829ULL }, // Inst #11331 = VFNMADD213PDZrkz |
| 35826 | { 11330, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead670024829ULL }, // Inst #11330 = VFNMADD213PDZrk |
| 35827 | { 11329, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ed670024829ULL }, // Inst #11329 = VFNMADD213PDZrbkz |
| 35828 | { 11328, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ad670024829ULL }, // Inst #11328 = VFNMADD213PDZrbk |
| 35829 | { 11327, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198d670024829ULL }, // Inst #11327 = VFNMADD213PDZrb |
| 35830 | { 11326, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d670024829ULL }, // Inst #11326 = VFNMADD213PDZr |
| 35831 | { 11325, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed670024819ULL }, // Inst #11325 = VFNMADD213PDZmkz |
| 35832 | { 11324, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead670024819ULL }, // Inst #11324 = VFNMADD213PDZmk |
| 35833 | { 11323, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed670024819ULL }, // Inst #11323 = VFNMADD213PDZmbkz |
| 35834 | { 11322, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad670024819ULL }, // Inst #11322 = VFNMADD213PDZmbk |
| 35835 | { 11321, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d670024819ULL }, // Inst #11321 = VFNMADD213PDZmb |
| 35836 | { 11320, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d670024819ULL }, // Inst #11320 = VFNMADD213PDZm |
| 35837 | { 11319, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d670024829ULL }, // Inst #11319 = VFNMADD213PDZ256rkz |
| 35838 | { 11318, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d670024829ULL }, // Inst #11318 = VFNMADD213PDZ256rk |
| 35839 | { 11317, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d670024829ULL }, // Inst #11317 = VFNMADD213PDZ256r |
| 35840 | { 11316, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d670024819ULL }, // Inst #11316 = VFNMADD213PDZ256mkz |
| 35841 | { 11315, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d670024819ULL }, // Inst #11315 = VFNMADD213PDZ256mk |
| 35842 | { 11314, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d670024819ULL }, // Inst #11314 = VFNMADD213PDZ256mbkz |
| 35843 | { 11313, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d670024819ULL }, // Inst #11313 = VFNMADD213PDZ256mbk |
| 35844 | { 11312, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d670024819ULL }, // Inst #11312 = VFNMADD213PDZ256mb |
| 35845 | { 11311, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d670024819ULL }, // Inst #11311 = VFNMADD213PDZ256m |
| 35846 | { 11310, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d670024829ULL }, // Inst #11310 = VFNMADD213PDZ128rkz |
| 35847 | { 11309, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d670024829ULL }, // Inst #11309 = VFNMADD213PDZ128rk |
| 35848 | { 11308, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d670024829ULL }, // Inst #11308 = VFNMADD213PDZ128r |
| 35849 | { 11307, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d670024819ULL }, // Inst #11307 = VFNMADD213PDZ128mkz |
| 35850 | { 11306, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d670024819ULL }, // Inst #11306 = VFNMADD213PDZ128mk |
| 35851 | { 11305, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d670024819ULL }, // Inst #11305 = VFNMADD213PDZ128mbkz |
| 35852 | { 11304, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d670024819ULL }, // Inst #11304 = VFNMADD213PDZ128mbk |
| 35853 | { 11303, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d670024819ULL }, // Inst #11303 = VFNMADD213PDZ128mb |
| 35854 | { 11302, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d670024819ULL }, // Inst #11302 = VFNMADD213PDZ128m |
| 35855 | { 11301, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d630024829ULL }, // Inst #11301 = VFNMADD213PDYr |
| 35856 | { 11300, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d630024819ULL }, // Inst #11300 = VFNMADD213PDYm |
| 35857 | { 11299, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeed668014029ULL }, // Inst #11299 = VFNMADD213BF16Zrkz |
| 35858 | { 11298, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xead668014029ULL }, // Inst #11298 = VFNMADD213BF16Zrk |
| 35859 | { 11297, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8d668014029ULL }, // Inst #11297 = VFNMADD213BF16Zr |
| 35860 | { 11296, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeed668014019ULL }, // Inst #11296 = VFNMADD213BF16Zmkz |
| 35861 | { 11295, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xead668014019ULL }, // Inst #11295 = VFNMADD213BF16Zmk |
| 35862 | { 11294, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5ed668014019ULL }, // Inst #11294 = VFNMADD213BF16Zmbkz |
| 35863 | { 11293, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5ad668014019ULL }, // Inst #11293 = VFNMADD213BF16Zmbk |
| 35864 | { 11292, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58d668014019ULL }, // Inst #11292 = VFNMADD213BF16Zmb |
| 35865 | { 11291, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8d668014019ULL }, // Inst #11291 = VFNMADD213BF16Zm |
| 35866 | { 11290, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7d668014029ULL }, // Inst #11290 = VFNMADD213BF16Z256rkz |
| 35867 | { 11289, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3d668014029ULL }, // Inst #11289 = VFNMADD213BF16Z256rk |
| 35868 | { 11288, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1d668014029ULL }, // Inst #11288 = VFNMADD213BF16Z256r |
| 35869 | { 11287, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7d668014019ULL }, // Inst #11287 = VFNMADD213BF16Z256mkz |
| 35870 | { 11286, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3d668014019ULL }, // Inst #11286 = VFNMADD213BF16Z256mk |
| 35871 | { 11285, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57d668014019ULL }, // Inst #11285 = VFNMADD213BF16Z256mbkz |
| 35872 | { 11284, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53d668014019ULL }, // Inst #11284 = VFNMADD213BF16Z256mbk |
| 35873 | { 11283, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51d668014019ULL }, // Inst #11283 = VFNMADD213BF16Z256mb |
| 35874 | { 11282, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1d668014019ULL }, // Inst #11282 = VFNMADD213BF16Z256m |
| 35875 | { 11281, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6d668014029ULL }, // Inst #11281 = VFNMADD213BF16Z128rkz |
| 35876 | { 11280, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2d668014029ULL }, // Inst #11280 = VFNMADD213BF16Z128rk |
| 35877 | { 11279, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0d668014029ULL }, // Inst #11279 = VFNMADD213BF16Z128r |
| 35878 | { 11278, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6d668014019ULL }, // Inst #11278 = VFNMADD213BF16Z128mkz |
| 35879 | { 11277, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2d668014019ULL }, // Inst #11277 = VFNMADD213BF16Z128mk |
| 35880 | { 11276, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56d668014019ULL }, // Inst #11276 = VFNMADD213BF16Z128mbkz |
| 35881 | { 11275, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52d668014019ULL }, // Inst #11275 = VFNMADD213BF16Z128mbk |
| 35882 | { 11274, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50d668014019ULL }, // Inst #11274 = VFNMADD213BF16Z128mb |
| 35883 | { 11273, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0d668014019ULL }, // Inst #11273 = VFNMADD213BF16Z128m |
| 35884 | { 11272, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcea8004829ULL }, // Inst #11272 = VFNMADD132SSr_Int |
| 35885 | { 11271, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcea8004829ULL }, // Inst #11271 = VFNMADD132SSr |
| 35886 | { 11270, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcea8004819ULL }, // Inst #11270 = VFNMADD132SSm_Int |
| 35887 | { 11269, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcea8004819ULL }, // Inst #11269 = VFNMADD132SSm |
| 35888 | { 11268, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cee8004829ULL }, // Inst #11268 = VFNMADD132SSZrkz_Int |
| 35889 | { 11267, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cee8004829ULL }, // Inst #11267 = VFNMADD132SSZrk_Int |
| 35890 | { 11266, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176cee8004829ULL }, // Inst #11266 = VFNMADD132SSZrbkz_Int |
| 35891 | { 11265, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172cee8004829ULL }, // Inst #11265 = VFNMADD132SSZrbk_Int |
| 35892 | { 11264, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170cee8004829ULL }, // Inst #11264 = VFNMADD132SSZrb_Int |
| 35893 | { 11263, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170cee8004829ULL }, // Inst #11263 = VFNMADD132SSZrb |
| 35894 | { 11262, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cee8004829ULL }, // Inst #11262 = VFNMADD132SSZr_Int |
| 35895 | { 11261, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cee8004829ULL }, // Inst #11261 = VFNMADD132SSZr |
| 35896 | { 11260, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cee8004819ULL }, // Inst #11260 = VFNMADD132SSZmkz_Int |
| 35897 | { 11259, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cee8004819ULL }, // Inst #11259 = VFNMADD132SSZmk_Int |
| 35898 | { 11258, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cee8004819ULL }, // Inst #11258 = VFNMADD132SSZm_Int |
| 35899 | { 11257, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cee8004819ULL }, // Inst #11257 = VFNMADD132SSZm |
| 35900 | { 11256, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cee8014829ULL }, // Inst #11256 = VFNMADD132SHZrkz_Int |
| 35901 | { 11255, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cee8014829ULL }, // Inst #11255 = VFNMADD132SHZrk_Int |
| 35902 | { 11254, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156cee8014829ULL }, // Inst #11254 = VFNMADD132SHZrbkz_Int |
| 35903 | { 11253, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152cee8014829ULL }, // Inst #11253 = VFNMADD132SHZrbk_Int |
| 35904 | { 11252, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150cee8014829ULL }, // Inst #11252 = VFNMADD132SHZrb_Int |
| 35905 | { 11251, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150cee8014829ULL }, // Inst #11251 = VFNMADD132SHZrb |
| 35906 | { 11250, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cee8014829ULL }, // Inst #11250 = VFNMADD132SHZr_Int |
| 35907 | { 11249, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cee8014829ULL }, // Inst #11249 = VFNMADD132SHZr |
| 35908 | { 11248, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cee8014819ULL }, // Inst #11248 = VFNMADD132SHZmkz_Int |
| 35909 | { 11247, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cee8014819ULL }, // Inst #11247 = VFNMADD132SHZmk_Int |
| 35910 | { 11246, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cee8014819ULL }, // Inst #11246 = VFNMADD132SHZm_Int |
| 35911 | { 11245, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cee8014819ULL }, // Inst #11245 = VFNMADD132SHZm |
| 35912 | { 11244, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xceb0024829ULL }, // Inst #11244 = VFNMADD132SDr_Int |
| 35913 | { 11243, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xceb0024829ULL }, // Inst #11243 = VFNMADD132SDr |
| 35914 | { 11242, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xceb0024819ULL }, // Inst #11242 = VFNMADD132SDm_Int |
| 35915 | { 11241, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xceb0024819ULL }, // Inst #11241 = VFNMADD132SDm |
| 35916 | { 11240, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cef0024829ULL }, // Inst #11240 = VFNMADD132SDZrkz_Int |
| 35917 | { 11239, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cef0024829ULL }, // Inst #11239 = VFNMADD132SDZrk_Int |
| 35918 | { 11238, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196cef0024829ULL }, // Inst #11238 = VFNMADD132SDZrbkz_Int |
| 35919 | { 11237, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192cef0024829ULL }, // Inst #11237 = VFNMADD132SDZrbk_Int |
| 35920 | { 11236, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190cef0024829ULL }, // Inst #11236 = VFNMADD132SDZrb_Int |
| 35921 | { 11235, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190cef0024829ULL }, // Inst #11235 = VFNMADD132SDZrb |
| 35922 | { 11234, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cef0024829ULL }, // Inst #11234 = VFNMADD132SDZr_Int |
| 35923 | { 11233, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cef0024829ULL }, // Inst #11233 = VFNMADD132SDZr |
| 35924 | { 11232, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cef0024819ULL }, // Inst #11232 = VFNMADD132SDZmkz_Int |
| 35925 | { 11231, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cef0024819ULL }, // Inst #11231 = VFNMADD132SDZmk_Int |
| 35926 | { 11230, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cef0024819ULL }, // Inst #11230 = VFNMADD132SDZm_Int |
| 35927 | { 11229, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cef0024819ULL }, // Inst #11229 = VFNMADD132SDZm |
| 35928 | { 11228, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xce28004829ULL }, // Inst #11228 = VFNMADD132PSr |
| 35929 | { 11227, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xce28004819ULL }, // Inst #11227 = VFNMADD132PSm |
| 35930 | { 11226, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece68004829ULL }, // Inst #11226 = VFNMADD132PSZrkz |
| 35931 | { 11225, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeace68004829ULL }, // Inst #11225 = VFNMADD132PSZrk |
| 35932 | { 11224, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ece68004829ULL }, // Inst #11224 = VFNMADD132PSZrbkz |
| 35933 | { 11223, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ace68004829ULL }, // Inst #11223 = VFNMADD132PSZrbk |
| 35934 | { 11222, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178ce68004829ULL }, // Inst #11222 = VFNMADD132PSZrb |
| 35935 | { 11221, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce68004829ULL }, // Inst #11221 = VFNMADD132PSZr |
| 35936 | { 11220, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece68004819ULL }, // Inst #11220 = VFNMADD132PSZmkz |
| 35937 | { 11219, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeace68004819ULL }, // Inst #11219 = VFNMADD132PSZmk |
| 35938 | { 11218, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ece68004819ULL }, // Inst #11218 = VFNMADD132PSZmbkz |
| 35939 | { 11217, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ace68004819ULL }, // Inst #11217 = VFNMADD132PSZmbk |
| 35940 | { 11216, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78ce68004819ULL }, // Inst #11216 = VFNMADD132PSZmb |
| 35941 | { 11215, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce68004819ULL }, // Inst #11215 = VFNMADD132PSZm |
| 35942 | { 11214, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce68004829ULL }, // Inst #11214 = VFNMADD132PSZ256rkz |
| 35943 | { 11213, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ce68004829ULL }, // Inst #11213 = VFNMADD132PSZ256rk |
| 35944 | { 11212, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce68004829ULL }, // Inst #11212 = VFNMADD132PSZ256r |
| 35945 | { 11211, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce68004819ULL }, // Inst #11211 = VFNMADD132PSZ256mkz |
| 35946 | { 11210, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ce68004819ULL }, // Inst #11210 = VFNMADD132PSZ256mk |
| 35947 | { 11209, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77ce68004819ULL }, // Inst #11209 = VFNMADD132PSZ256mbkz |
| 35948 | { 11208, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73ce68004819ULL }, // Inst #11208 = VFNMADD132PSZ256mbk |
| 35949 | { 11207, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71ce68004819ULL }, // Inst #11207 = VFNMADD132PSZ256mb |
| 35950 | { 11206, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce68004819ULL }, // Inst #11206 = VFNMADD132PSZ256m |
| 35951 | { 11205, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce68004829ULL }, // Inst #11205 = VFNMADD132PSZ128rkz |
| 35952 | { 11204, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ce68004829ULL }, // Inst #11204 = VFNMADD132PSZ128rk |
| 35953 | { 11203, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce68004829ULL }, // Inst #11203 = VFNMADD132PSZ128r |
| 35954 | { 11202, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce68004819ULL }, // Inst #11202 = VFNMADD132PSZ128mkz |
| 35955 | { 11201, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ce68004819ULL }, // Inst #11201 = VFNMADD132PSZ128mk |
| 35956 | { 11200, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76ce68004819ULL }, // Inst #11200 = VFNMADD132PSZ128mbkz |
| 35957 | { 11199, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72ce68004819ULL }, // Inst #11199 = VFNMADD132PSZ128mbk |
| 35958 | { 11198, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70ce68004819ULL }, // Inst #11198 = VFNMADD132PSZ128mb |
| 35959 | { 11197, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce68004819ULL }, // Inst #11197 = VFNMADD132PSZ128m |
| 35960 | { 11196, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ce28004829ULL }, // Inst #11196 = VFNMADD132PSYr |
| 35961 | { 11195, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ce28004819ULL }, // Inst #11195 = VFNMADD132PSYm |
| 35962 | { 11194, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece68014829ULL }, // Inst #11194 = VFNMADD132PHZrkz |
| 35963 | { 11193, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeace68014829ULL }, // Inst #11193 = VFNMADD132PHZrk |
| 35964 | { 11192, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ece68014829ULL }, // Inst #11192 = VFNMADD132PHZrbkz |
| 35965 | { 11191, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ace68014829ULL }, // Inst #11191 = VFNMADD132PHZrbk |
| 35966 | { 11190, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158ce68014829ULL }, // Inst #11190 = VFNMADD132PHZrb |
| 35967 | { 11189, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce68014829ULL }, // Inst #11189 = VFNMADD132PHZr |
| 35968 | { 11188, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece68014819ULL }, // Inst #11188 = VFNMADD132PHZmkz |
| 35969 | { 11187, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeace68014819ULL }, // Inst #11187 = VFNMADD132PHZmk |
| 35970 | { 11186, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ece68014819ULL }, // Inst #11186 = VFNMADD132PHZmbkz |
| 35971 | { 11185, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ace68014819ULL }, // Inst #11185 = VFNMADD132PHZmbk |
| 35972 | { 11184, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58ce68014819ULL }, // Inst #11184 = VFNMADD132PHZmb |
| 35973 | { 11183, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce68014819ULL }, // Inst #11183 = VFNMADD132PHZm |
| 35974 | { 11182, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce68014829ULL }, // Inst #11182 = VFNMADD132PHZ256rkz |
| 35975 | { 11181, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ce68014829ULL }, // Inst #11181 = VFNMADD132PHZ256rk |
| 35976 | { 11180, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce68014829ULL }, // Inst #11180 = VFNMADD132PHZ256r |
| 35977 | { 11179, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce68014819ULL }, // Inst #11179 = VFNMADD132PHZ256mkz |
| 35978 | { 11178, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ce68014819ULL }, // Inst #11178 = VFNMADD132PHZ256mk |
| 35979 | { 11177, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57ce68014819ULL }, // Inst #11177 = VFNMADD132PHZ256mbkz |
| 35980 | { 11176, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53ce68014819ULL }, // Inst #11176 = VFNMADD132PHZ256mbk |
| 35981 | { 11175, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51ce68014819ULL }, // Inst #11175 = VFNMADD132PHZ256mb |
| 35982 | { 11174, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce68014819ULL }, // Inst #11174 = VFNMADD132PHZ256m |
| 35983 | { 11173, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce68014829ULL }, // Inst #11173 = VFNMADD132PHZ128rkz |
| 35984 | { 11172, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ce68014829ULL }, // Inst #11172 = VFNMADD132PHZ128rk |
| 35985 | { 11171, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce68014829ULL }, // Inst #11171 = VFNMADD132PHZ128r |
| 35986 | { 11170, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce68014819ULL }, // Inst #11170 = VFNMADD132PHZ128mkz |
| 35987 | { 11169, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ce68014819ULL }, // Inst #11169 = VFNMADD132PHZ128mk |
| 35988 | { 11168, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56ce68014819ULL }, // Inst #11168 = VFNMADD132PHZ128mbkz |
| 35989 | { 11167, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52ce68014819ULL }, // Inst #11167 = VFNMADD132PHZ128mbk |
| 35990 | { 11166, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50ce68014819ULL }, // Inst #11166 = VFNMADD132PHZ128mb |
| 35991 | { 11165, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce68014819ULL }, // Inst #11165 = VFNMADD132PHZ128m |
| 35992 | { 11164, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xce30024829ULL }, // Inst #11164 = VFNMADD132PDr |
| 35993 | { 11163, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xce30024819ULL }, // Inst #11163 = VFNMADD132PDm |
| 35994 | { 11162, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece70024829ULL }, // Inst #11162 = VFNMADD132PDZrkz |
| 35995 | { 11161, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeace70024829ULL }, // Inst #11161 = VFNMADD132PDZrk |
| 35996 | { 11160, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ece70024829ULL }, // Inst #11160 = VFNMADD132PDZrbkz |
| 35997 | { 11159, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ace70024829ULL }, // Inst #11159 = VFNMADD132PDZrbk |
| 35998 | { 11158, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198ce70024829ULL }, // Inst #11158 = VFNMADD132PDZrb |
| 35999 | { 11157, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce70024829ULL }, // Inst #11157 = VFNMADD132PDZr |
| 36000 | { 11156, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece70024819ULL }, // Inst #11156 = VFNMADD132PDZmkz |
| 36001 | { 11155, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeace70024819ULL }, // Inst #11155 = VFNMADD132PDZmk |
| 36002 | { 11154, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ece70024819ULL }, // Inst #11154 = VFNMADD132PDZmbkz |
| 36003 | { 11153, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ace70024819ULL }, // Inst #11153 = VFNMADD132PDZmbk |
| 36004 | { 11152, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98ce70024819ULL }, // Inst #11152 = VFNMADD132PDZmb |
| 36005 | { 11151, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce70024819ULL }, // Inst #11151 = VFNMADD132PDZm |
| 36006 | { 11150, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce70024829ULL }, // Inst #11150 = VFNMADD132PDZ256rkz |
| 36007 | { 11149, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ce70024829ULL }, // Inst #11149 = VFNMADD132PDZ256rk |
| 36008 | { 11148, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce70024829ULL }, // Inst #11148 = VFNMADD132PDZ256r |
| 36009 | { 11147, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce70024819ULL }, // Inst #11147 = VFNMADD132PDZ256mkz |
| 36010 | { 11146, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ce70024819ULL }, // Inst #11146 = VFNMADD132PDZ256mk |
| 36011 | { 11145, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97ce70024819ULL }, // Inst #11145 = VFNMADD132PDZ256mbkz |
| 36012 | { 11144, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93ce70024819ULL }, // Inst #11144 = VFNMADD132PDZ256mbk |
| 36013 | { 11143, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91ce70024819ULL }, // Inst #11143 = VFNMADD132PDZ256mb |
| 36014 | { 11142, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce70024819ULL }, // Inst #11142 = VFNMADD132PDZ256m |
| 36015 | { 11141, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce70024829ULL }, // Inst #11141 = VFNMADD132PDZ128rkz |
| 36016 | { 11140, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ce70024829ULL }, // Inst #11140 = VFNMADD132PDZ128rk |
| 36017 | { 11139, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce70024829ULL }, // Inst #11139 = VFNMADD132PDZ128r |
| 36018 | { 11138, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce70024819ULL }, // Inst #11138 = VFNMADD132PDZ128mkz |
| 36019 | { 11137, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ce70024819ULL }, // Inst #11137 = VFNMADD132PDZ128mk |
| 36020 | { 11136, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96ce70024819ULL }, // Inst #11136 = VFNMADD132PDZ128mbkz |
| 36021 | { 11135, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92ce70024819ULL }, // Inst #11135 = VFNMADD132PDZ128mbk |
| 36022 | { 11134, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90ce70024819ULL }, // Inst #11134 = VFNMADD132PDZ128mb |
| 36023 | { 11133, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce70024819ULL }, // Inst #11133 = VFNMADD132PDZ128m |
| 36024 | { 11132, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ce30024829ULL }, // Inst #11132 = VFNMADD132PDYr |
| 36025 | { 11131, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ce30024819ULL }, // Inst #11131 = VFNMADD132PDYm |
| 36026 | { 11130, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeece68014029ULL }, // Inst #11130 = VFNMADD132BF16Zrkz |
| 36027 | { 11129, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeace68014029ULL }, // Inst #11129 = VFNMADD132BF16Zrk |
| 36028 | { 11128, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ce68014029ULL }, // Inst #11128 = VFNMADD132BF16Zr |
| 36029 | { 11127, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeece68014019ULL }, // Inst #11127 = VFNMADD132BF16Zmkz |
| 36030 | { 11126, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeace68014019ULL }, // Inst #11126 = VFNMADD132BF16Zmk |
| 36031 | { 11125, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5ece68014019ULL }, // Inst #11125 = VFNMADD132BF16Zmbkz |
| 36032 | { 11124, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5ace68014019ULL }, // Inst #11124 = VFNMADD132BF16Zmbk |
| 36033 | { 11123, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58ce68014019ULL }, // Inst #11123 = VFNMADD132BF16Zmb |
| 36034 | { 11122, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8ce68014019ULL }, // Inst #11122 = VFNMADD132BF16Zm |
| 36035 | { 11121, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7ce68014029ULL }, // Inst #11121 = VFNMADD132BF16Z256rkz |
| 36036 | { 11120, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ce68014029ULL }, // Inst #11120 = VFNMADD132BF16Z256rk |
| 36037 | { 11119, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ce68014029ULL }, // Inst #11119 = VFNMADD132BF16Z256r |
| 36038 | { 11118, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7ce68014019ULL }, // Inst #11118 = VFNMADD132BF16Z256mkz |
| 36039 | { 11117, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ce68014019ULL }, // Inst #11117 = VFNMADD132BF16Z256mk |
| 36040 | { 11116, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57ce68014019ULL }, // Inst #11116 = VFNMADD132BF16Z256mbkz |
| 36041 | { 11115, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53ce68014019ULL }, // Inst #11115 = VFNMADD132BF16Z256mbk |
| 36042 | { 11114, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51ce68014019ULL }, // Inst #11114 = VFNMADD132BF16Z256mb |
| 36043 | { 11113, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1ce68014019ULL }, // Inst #11113 = VFNMADD132BF16Z256m |
| 36044 | { 11112, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6ce68014029ULL }, // Inst #11112 = VFNMADD132BF16Z128rkz |
| 36045 | { 11111, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ce68014029ULL }, // Inst #11111 = VFNMADD132BF16Z128rk |
| 36046 | { 11110, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ce68014029ULL }, // Inst #11110 = VFNMADD132BF16Z128r |
| 36047 | { 11109, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6ce68014019ULL }, // Inst #11109 = VFNMADD132BF16Z128mkz |
| 36048 | { 11108, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ce68014019ULL }, // Inst #11108 = VFNMADD132BF16Z128mk |
| 36049 | { 11107, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56ce68014019ULL }, // Inst #11107 = VFNMADD132BF16Z128mbkz |
| 36050 | { 11106, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52ce68014019ULL }, // Inst #11106 = VFNMADD132BF16Z128mbk |
| 36051 | { 11105, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50ce68014019ULL }, // Inst #11105 = VFNMADD132BF16Z128mb |
| 36052 | { 11104, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0ce68014019ULL }, // Inst #11104 = VFNMADD132BF16Z128m |
| 36053 | { 11103, 4, 1, 0, 2221, 1, 0, 3895, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x66ebe0015029ULL }, // Inst #11103 = VFMULCSHZrrkz |
| 36054 | { 11102, 5, 1, 0, 2221, 1, 0, 3798, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x62ebe0015029ULL }, // Inst #11102 = VFMULCSHZrrk |
| 36055 | { 11101, 5, 1, 0, 2221, 1, 0, 3890, X86ImpOpBase + 78, 0, 0x176ebe0015029ULL }, // Inst #11101 = VFMULCSHZrrbkz |
| 36056 | { 11100, 6, 1, 0, 2221, 1, 0, 3792, X86ImpOpBase + 78, 0, 0x172ebe0015029ULL }, // Inst #11100 = VFMULCSHZrrbk |
| 36057 | { 11099, 4, 1, 0, 2213, 1, 0, 3886, X86ImpOpBase + 78, 0, 0x170ebe0015029ULL }, // Inst #11099 = VFMULCSHZrrb |
| 36058 | { 11098, 3, 1, 0, 2213, 1, 0, 3818, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x60ebe0015029ULL }, // Inst #11098 = VFMULCSHZrr |
| 36059 | { 11097, 8, 1, 0, 2211, 1, 0, 3878, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x66ebe0015019ULL }, // Inst #11097 = VFMULCSHZrmkz |
| 36060 | { 11096, 9, 1, 0, 2211, 1, 0, 3778, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x62ebe0015019ULL }, // Inst #11096 = VFMULCSHZrmk |
| 36061 | { 11095, 7, 1, 0, 2202, 1, 0, 3803, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x60ebe0015019ULL }, // Inst #11095 = VFMULCSHZrm |
| 36062 | { 11094, 4, 1, 0, 2232, 1, 0, 3874, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xeeeb68015029ULL }, // Inst #11094 = VFMULCPHZrrkz |
| 36063 | { 11093, 5, 1, 0, 2232, 1, 0, 3773, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xeaeb68015029ULL }, // Inst #11093 = VFMULCPHZrrk |
| 36064 | { 11092, 5, 1, 0, 2232, 1, 0, 3869, X86ImpOpBase + 78, 0, 0x17eeb68015029ULL }, // Inst #11092 = VFMULCPHZrrbkz |
| 36065 | { 11091, 6, 1, 0, 2232, 1, 0, 3767, X86ImpOpBase + 78, 0, 0x17aeb68015029ULL }, // Inst #11091 = VFMULCPHZrrbk |
| 36066 | { 11090, 4, 1, 0, 2229, 1, 0, 3865, X86ImpOpBase + 78, 0, 0x178eb68015029ULL }, // Inst #11090 = VFMULCPHZrrb |
| 36067 | { 11089, 3, 1, 0, 2229, 1, 0, 3862, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xe8eb68015029ULL }, // Inst #11089 = VFMULCPHZrr |
| 36068 | { 11088, 8, 1, 0, 2228, 1, 0, 3854, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeeeb68015019ULL }, // Inst #11088 = VFMULCPHZrmkz |
| 36069 | { 11087, 9, 1, 0, 2228, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeaeb68015019ULL }, // Inst #11087 = VFMULCPHZrmk |
| 36070 | { 11086, 8, 1, 0, 2228, 1, 0, 3854, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7eeb68015019ULL }, // Inst #11086 = VFMULCPHZrmbkz |
| 36071 | { 11085, 9, 1, 0, 2228, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7aeb68015019ULL }, // Inst #11085 = VFMULCPHZrmbk |
| 36072 | { 11084, 7, 1, 0, 2224, 1, 0, 3847, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x78eb68015019ULL }, // Inst #11084 = VFMULCPHZrmb |
| 36073 | { 11083, 7, 1, 0, 2224, 1, 0, 3847, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe8eb68015019ULL }, // Inst #11083 = VFMULCPHZrm |
| 36074 | { 11082, 4, 1, 0, 2222, 1, 0, 3843, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xc7eb68015029ULL }, // Inst #11082 = VFMULCPHZ256rrkz |
| 36075 | { 11081, 5, 1, 0, 2222, 1, 0, 3736, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xc3eb68015029ULL }, // Inst #11081 = VFMULCPHZ256rrk |
| 36076 | { 11080, 3, 1, 0, 2214, 1, 0, 3840, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xc1eb68015029ULL }, // Inst #11080 = VFMULCPHZ256rr |
| 36077 | { 11079, 8, 1, 0, 2212, 1, 0, 3832, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc7eb68015019ULL }, // Inst #11079 = VFMULCPHZ256rmkz |
| 36078 | { 11078, 9, 1, 0, 2212, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc3eb68015019ULL }, // Inst #11078 = VFMULCPHZ256rmk |
| 36079 | { 11077, 8, 1, 0, 2212, 1, 0, 3832, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x77eb68015019ULL }, // Inst #11077 = VFMULCPHZ256rmbkz |
| 36080 | { 11076, 9, 1, 0, 2212, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x73eb68015019ULL }, // Inst #11076 = VFMULCPHZ256rmbk |
| 36081 | { 11075, 7, 1, 0, 2205, 1, 0, 3825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x71eb68015019ULL }, // Inst #11075 = VFMULCPHZ256rmb |
| 36082 | { 11074, 7, 1, 0, 2205, 1, 0, 3825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc1eb68015019ULL }, // Inst #11074 = VFMULCPHZ256rm |
| 36083 | { 11073, 4, 1, 0, 2221, 1, 0, 3821, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xa6eb68015029ULL }, // Inst #11073 = VFMULCPHZ128rrkz |
| 36084 | { 11072, 5, 1, 0, 2221, 1, 0, 3710, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xa2eb68015029ULL }, // Inst #11072 = VFMULCPHZ128rrk |
| 36085 | { 11071, 3, 1, 0, 2213, 1, 0, 3818, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xa0eb68015029ULL }, // Inst #11071 = VFMULCPHZ128rr |
| 36086 | { 11070, 8, 1, 0, 2211, 1, 0, 3810, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa6eb68015019ULL }, // Inst #11070 = VFMULCPHZ128rmkz |
| 36087 | { 11069, 9, 1, 0, 2211, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa2eb68015019ULL }, // Inst #11069 = VFMULCPHZ128rmk |
| 36088 | { 11068, 8, 1, 0, 2211, 1, 0, 3810, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x76eb68015019ULL }, // Inst #11068 = VFMULCPHZ128rmbkz |
| 36089 | { 11067, 9, 1, 0, 2211, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x72eb68015019ULL }, // Inst #11067 = VFMULCPHZ128rmbk |
| 36090 | { 11066, 7, 1, 0, 2202, 1, 0, 3803, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x70eb68015019ULL }, // Inst #11066 = VFMULCPHZ128rmb |
| 36091 | { 11065, 7, 1, 0, 2202, 1, 0, 3803, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa0eb68015019ULL }, // Inst #11065 = VFMULCPHZ128rm |
| 36092 | { 11064, 4, 1, 0, 444, 1, 0, 4118, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7280c6829ULL }, // Inst #11064 = VFMSUBSS4rr_REV |
| 36093 | { 11063, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7280c6829ULL }, // Inst #11063 = VFMSUBSS4rr_Int_REV |
| 36094 | { 11062, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7280e682bULL }, // Inst #11062 = VFMSUBSS4rr_Int |
| 36095 | { 11061, 4, 1, 0, 444, 1, 0, 4118, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb7280e682bULL }, // Inst #11061 = VFMSUBSS4rr |
| 36096 | { 11060, 8, 1, 0, 443, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7280e681bULL }, // Inst #11060 = VFMSUBSS4rm_Int |
| 36097 | { 11059, 8, 1, 0, 443, 1, 0, 4110, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7280e681bULL }, // Inst #11059 = VFMSUBSS4rm |
| 36098 | { 11058, 8, 1, 0, 447, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7280c6819ULL }, // Inst #11058 = VFMSUBSS4mr_Int |
| 36099 | { 11057, 8, 1, 0, 447, 1, 0, 4102, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7280c6819ULL }, // Inst #11057 = VFMSUBSS4mr |
| 36100 | { 11056, 4, 1, 0, 444, 1, 0, 4098, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7b00c6829ULL }, // Inst #11056 = VFMSUBSD4rr_REV |
| 36101 | { 11055, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7b00c6829ULL }, // Inst #11055 = VFMSUBSD4rr_Int_REV |
| 36102 | { 11054, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7b00e682bULL }, // Inst #11054 = VFMSUBSD4rr_Int |
| 36103 | { 11053, 4, 1, 0, 444, 1, 0, 4098, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb7b00e682bULL }, // Inst #11053 = VFMSUBSD4rr |
| 36104 | { 11052, 8, 1, 0, 443, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7b00e681bULL }, // Inst #11052 = VFMSUBSD4rm_Int |
| 36105 | { 11051, 8, 1, 0, 443, 1, 0, 4090, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7b00e681bULL }, // Inst #11051 = VFMSUBSD4rm |
| 36106 | { 11050, 8, 1, 0, 447, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7b00c6819ULL }, // Inst #11050 = VFMSUBSD4mr_Int |
| 36107 | { 11049, 8, 1, 0, 447, 1, 0, 4082, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7b00c6819ULL }, // Inst #11049 = VFMSUBSD4mr |
| 36108 | { 11048, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb6280c6829ULL }, // Inst #11048 = VFMSUBPS4rr_REV |
| 36109 | { 11047, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb6280e682bULL }, // Inst #11047 = VFMSUBPS4rr |
| 36110 | { 11046, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb6280e681bULL }, // Inst #11046 = VFMSUBPS4rm |
| 36111 | { 11045, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb6280c6819ULL }, // Inst #11045 = VFMSUBPS4mr |
| 36112 | { 11044, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1b6280c6829ULL }, // Inst #11044 = VFMSUBPS4Yrr_REV |
| 36113 | { 11043, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1b6280e682bULL }, // Inst #11043 = VFMSUBPS4Yrr |
| 36114 | { 11042, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b6280e681bULL }, // Inst #11042 = VFMSUBPS4Yrm |
| 36115 | { 11041, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b6280c6819ULL }, // Inst #11041 = VFMSUBPS4Ymr |
| 36116 | { 11040, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb6b00c6829ULL }, // Inst #11040 = VFMSUBPD4rr_REV |
| 36117 | { 11039, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb6b00e682bULL }, // Inst #11039 = VFMSUBPD4rr |
| 36118 | { 11038, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb6b00e681bULL }, // Inst #11038 = VFMSUBPD4rm |
| 36119 | { 11037, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb6b00c6819ULL }, // Inst #11037 = VFMSUBPD4mr |
| 36120 | { 11036, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1b6b00c6829ULL }, // Inst #11036 = VFMSUBPD4Yrr_REV |
| 36121 | { 11035, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1b6b00e682bULL }, // Inst #11035 = VFMSUBPD4Yrr |
| 36122 | { 11034, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b6b00e681bULL }, // Inst #11034 = VFMSUBPD4Yrm |
| 36123 | { 11033, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b6b00c6819ULL }, // Inst #11033 = VFMSUBPD4Ymr |
| 36124 | { 11032, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf280c6829ULL }, // Inst #11032 = VFMSUBADDPS4rr_REV |
| 36125 | { 11031, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaf280e682bULL }, // Inst #11031 = VFMSUBADDPS4rr |
| 36126 | { 11030, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf280e681bULL }, // Inst #11030 = VFMSUBADDPS4rm |
| 36127 | { 11029, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf280c6819ULL }, // Inst #11029 = VFMSUBADDPS4mr |
| 36128 | { 11028, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1af280c6829ULL }, // Inst #11028 = VFMSUBADDPS4Yrr_REV |
| 36129 | { 11027, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1af280e682bULL }, // Inst #11027 = VFMSUBADDPS4Yrr |
| 36130 | { 11026, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1af280e681bULL }, // Inst #11026 = VFMSUBADDPS4Yrm |
| 36131 | { 11025, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1af280c6819ULL }, // Inst #11025 = VFMSUBADDPS4Ymr |
| 36132 | { 11024, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xafb00c6829ULL }, // Inst #11024 = VFMSUBADDPD4rr_REV |
| 36133 | { 11023, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xafb00e682bULL }, // Inst #11023 = VFMSUBADDPD4rr |
| 36134 | { 11022, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb00e681bULL }, // Inst #11022 = VFMSUBADDPD4rm |
| 36135 | { 11021, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb00c6819ULL }, // Inst #11021 = VFMSUBADDPD4mr |
| 36136 | { 11020, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1afb00c6829ULL }, // Inst #11020 = VFMSUBADDPD4Yrr_REV |
| 36137 | { 11019, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1afb00e682bULL }, // Inst #11019 = VFMSUBADDPD4Yrr |
| 36138 | { 11018, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afb00e681bULL }, // Inst #11018 = VFMSUBADDPD4Yrm |
| 36139 | { 11017, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afb00c6819ULL }, // Inst #11017 = VFMSUBADDPD4Ymr |
| 36140 | { 11016, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdba8004829ULL }, // Inst #11016 = VFMSUBADD231PSr |
| 36141 | { 11015, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdba8004819ULL }, // Inst #11015 = VFMSUBADD231PSm |
| 36142 | { 11014, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbe8004829ULL }, // Inst #11014 = VFMSUBADD231PSZrkz |
| 36143 | { 11013, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadbe8004829ULL }, // Inst #11013 = VFMSUBADD231PSZrk |
| 36144 | { 11012, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17edbe8004829ULL }, // Inst #11012 = VFMSUBADD231PSZrbkz |
| 36145 | { 11011, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17adbe8004829ULL }, // Inst #11011 = VFMSUBADD231PSZrbk |
| 36146 | { 11010, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178dbe8004829ULL }, // Inst #11010 = VFMSUBADD231PSZrb |
| 36147 | { 11009, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbe8004829ULL }, // Inst #11009 = VFMSUBADD231PSZr |
| 36148 | { 11008, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbe8004819ULL }, // Inst #11008 = VFMSUBADD231PSZmkz |
| 36149 | { 11007, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadbe8004819ULL }, // Inst #11007 = VFMSUBADD231PSZmk |
| 36150 | { 11006, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7edbe8004819ULL }, // Inst #11006 = VFMSUBADD231PSZmbkz |
| 36151 | { 11005, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7adbe8004819ULL }, // Inst #11005 = VFMSUBADD231PSZmbk |
| 36152 | { 11004, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78dbe8004819ULL }, // Inst #11004 = VFMSUBADD231PSZmb |
| 36153 | { 11003, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbe8004819ULL }, // Inst #11003 = VFMSUBADD231PSZm |
| 36154 | { 11002, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbe8004829ULL }, // Inst #11002 = VFMSUBADD231PSZ256rkz |
| 36155 | { 11001, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dbe8004829ULL }, // Inst #11001 = VFMSUBADD231PSZ256rk |
| 36156 | { 11000, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbe8004829ULL }, // Inst #11000 = VFMSUBADD231PSZ256r |
| 36157 | { 10999, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbe8004819ULL }, // Inst #10999 = VFMSUBADD231PSZ256mkz |
| 36158 | { 10998, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dbe8004819ULL }, // Inst #10998 = VFMSUBADD231PSZ256mk |
| 36159 | { 10997, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77dbe8004819ULL }, // Inst #10997 = VFMSUBADD231PSZ256mbkz |
| 36160 | { 10996, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73dbe8004819ULL }, // Inst #10996 = VFMSUBADD231PSZ256mbk |
| 36161 | { 10995, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71dbe8004819ULL }, // Inst #10995 = VFMSUBADD231PSZ256mb |
| 36162 | { 10994, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbe8004819ULL }, // Inst #10994 = VFMSUBADD231PSZ256m |
| 36163 | { 10993, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbe8004829ULL }, // Inst #10993 = VFMSUBADD231PSZ128rkz |
| 36164 | { 10992, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dbe8004829ULL }, // Inst #10992 = VFMSUBADD231PSZ128rk |
| 36165 | { 10991, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbe8004829ULL }, // Inst #10991 = VFMSUBADD231PSZ128r |
| 36166 | { 10990, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbe8004819ULL }, // Inst #10990 = VFMSUBADD231PSZ128mkz |
| 36167 | { 10989, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dbe8004819ULL }, // Inst #10989 = VFMSUBADD231PSZ128mk |
| 36168 | { 10988, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76dbe8004819ULL }, // Inst #10988 = VFMSUBADD231PSZ128mbkz |
| 36169 | { 10987, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72dbe8004819ULL }, // Inst #10987 = VFMSUBADD231PSZ128mbk |
| 36170 | { 10986, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70dbe8004819ULL }, // Inst #10986 = VFMSUBADD231PSZ128mb |
| 36171 | { 10985, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbe8004819ULL }, // Inst #10985 = VFMSUBADD231PSZ128m |
| 36172 | { 10984, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dba8004829ULL }, // Inst #10984 = VFMSUBADD231PSYr |
| 36173 | { 10983, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dba8004819ULL }, // Inst #10983 = VFMSUBADD231PSYm |
| 36174 | { 10982, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbe8014829ULL }, // Inst #10982 = VFMSUBADD231PHZrkz |
| 36175 | { 10981, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadbe8014829ULL }, // Inst #10981 = VFMSUBADD231PHZrk |
| 36176 | { 10980, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15edbe8014829ULL }, // Inst #10980 = VFMSUBADD231PHZrbkz |
| 36177 | { 10979, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15adbe8014829ULL }, // Inst #10979 = VFMSUBADD231PHZrbk |
| 36178 | { 10978, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158dbe8014829ULL }, // Inst #10978 = VFMSUBADD231PHZrb |
| 36179 | { 10977, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbe8014829ULL }, // Inst #10977 = VFMSUBADD231PHZr |
| 36180 | { 10976, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbe8014819ULL }, // Inst #10976 = VFMSUBADD231PHZmkz |
| 36181 | { 10975, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadbe8014819ULL }, // Inst #10975 = VFMSUBADD231PHZmk |
| 36182 | { 10974, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5edbe8014819ULL }, // Inst #10974 = VFMSUBADD231PHZmbkz |
| 36183 | { 10973, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5adbe8014819ULL }, // Inst #10973 = VFMSUBADD231PHZmbk |
| 36184 | { 10972, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58dbe8014819ULL }, // Inst #10972 = VFMSUBADD231PHZmb |
| 36185 | { 10971, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbe8014819ULL }, // Inst #10971 = VFMSUBADD231PHZm |
| 36186 | { 10970, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbe8014829ULL }, // Inst #10970 = VFMSUBADD231PHZ256rkz |
| 36187 | { 10969, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dbe8014829ULL }, // Inst #10969 = VFMSUBADD231PHZ256rk |
| 36188 | { 10968, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbe8014829ULL }, // Inst #10968 = VFMSUBADD231PHZ256r |
| 36189 | { 10967, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbe8014819ULL }, // Inst #10967 = VFMSUBADD231PHZ256mkz |
| 36190 | { 10966, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dbe8014819ULL }, // Inst #10966 = VFMSUBADD231PHZ256mk |
| 36191 | { 10965, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57dbe8014819ULL }, // Inst #10965 = VFMSUBADD231PHZ256mbkz |
| 36192 | { 10964, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53dbe8014819ULL }, // Inst #10964 = VFMSUBADD231PHZ256mbk |
| 36193 | { 10963, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51dbe8014819ULL }, // Inst #10963 = VFMSUBADD231PHZ256mb |
| 36194 | { 10962, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbe8014819ULL }, // Inst #10962 = VFMSUBADD231PHZ256m |
| 36195 | { 10961, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbe8014829ULL }, // Inst #10961 = VFMSUBADD231PHZ128rkz |
| 36196 | { 10960, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dbe8014829ULL }, // Inst #10960 = VFMSUBADD231PHZ128rk |
| 36197 | { 10959, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbe8014829ULL }, // Inst #10959 = VFMSUBADD231PHZ128r |
| 36198 | { 10958, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbe8014819ULL }, // Inst #10958 = VFMSUBADD231PHZ128mkz |
| 36199 | { 10957, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dbe8014819ULL }, // Inst #10957 = VFMSUBADD231PHZ128mk |
| 36200 | { 10956, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56dbe8014819ULL }, // Inst #10956 = VFMSUBADD231PHZ128mbkz |
| 36201 | { 10955, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52dbe8014819ULL }, // Inst #10955 = VFMSUBADD231PHZ128mbk |
| 36202 | { 10954, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50dbe8014819ULL }, // Inst #10954 = VFMSUBADD231PHZ128mb |
| 36203 | { 10953, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbe8014819ULL }, // Inst #10953 = VFMSUBADD231PHZ128m |
| 36204 | { 10952, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdbb0024829ULL }, // Inst #10952 = VFMSUBADD231PDr |
| 36205 | { 10951, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdbb0024819ULL }, // Inst #10951 = VFMSUBADD231PDm |
| 36206 | { 10950, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbf0024829ULL }, // Inst #10950 = VFMSUBADD231PDZrkz |
| 36207 | { 10949, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadbf0024829ULL }, // Inst #10949 = VFMSUBADD231PDZrk |
| 36208 | { 10948, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19edbf0024829ULL }, // Inst #10948 = VFMSUBADD231PDZrbkz |
| 36209 | { 10947, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19adbf0024829ULL }, // Inst #10947 = VFMSUBADD231PDZrbk |
| 36210 | { 10946, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198dbf0024829ULL }, // Inst #10946 = VFMSUBADD231PDZrb |
| 36211 | { 10945, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbf0024829ULL }, // Inst #10945 = VFMSUBADD231PDZr |
| 36212 | { 10944, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbf0024819ULL }, // Inst #10944 = VFMSUBADD231PDZmkz |
| 36213 | { 10943, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadbf0024819ULL }, // Inst #10943 = VFMSUBADD231PDZmk |
| 36214 | { 10942, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9edbf0024819ULL }, // Inst #10942 = VFMSUBADD231PDZmbkz |
| 36215 | { 10941, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9adbf0024819ULL }, // Inst #10941 = VFMSUBADD231PDZmbk |
| 36216 | { 10940, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98dbf0024819ULL }, // Inst #10940 = VFMSUBADD231PDZmb |
| 36217 | { 10939, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbf0024819ULL }, // Inst #10939 = VFMSUBADD231PDZm |
| 36218 | { 10938, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbf0024829ULL }, // Inst #10938 = VFMSUBADD231PDZ256rkz |
| 36219 | { 10937, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dbf0024829ULL }, // Inst #10937 = VFMSUBADD231PDZ256rk |
| 36220 | { 10936, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbf0024829ULL }, // Inst #10936 = VFMSUBADD231PDZ256r |
| 36221 | { 10935, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbf0024819ULL }, // Inst #10935 = VFMSUBADD231PDZ256mkz |
| 36222 | { 10934, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dbf0024819ULL }, // Inst #10934 = VFMSUBADD231PDZ256mk |
| 36223 | { 10933, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97dbf0024819ULL }, // Inst #10933 = VFMSUBADD231PDZ256mbkz |
| 36224 | { 10932, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93dbf0024819ULL }, // Inst #10932 = VFMSUBADD231PDZ256mbk |
| 36225 | { 10931, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91dbf0024819ULL }, // Inst #10931 = VFMSUBADD231PDZ256mb |
| 36226 | { 10930, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbf0024819ULL }, // Inst #10930 = VFMSUBADD231PDZ256m |
| 36227 | { 10929, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbf0024829ULL }, // Inst #10929 = VFMSUBADD231PDZ128rkz |
| 36228 | { 10928, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dbf0024829ULL }, // Inst #10928 = VFMSUBADD231PDZ128rk |
| 36229 | { 10927, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbf0024829ULL }, // Inst #10927 = VFMSUBADD231PDZ128r |
| 36230 | { 10926, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbf0024819ULL }, // Inst #10926 = VFMSUBADD231PDZ128mkz |
| 36231 | { 10925, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dbf0024819ULL }, // Inst #10925 = VFMSUBADD231PDZ128mk |
| 36232 | { 10924, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96dbf0024819ULL }, // Inst #10924 = VFMSUBADD231PDZ128mbkz |
| 36233 | { 10923, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92dbf0024819ULL }, // Inst #10923 = VFMSUBADD231PDZ128mbk |
| 36234 | { 10922, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90dbf0024819ULL }, // Inst #10922 = VFMSUBADD231PDZ128mb |
| 36235 | { 10921, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbf0024819ULL }, // Inst #10921 = VFMSUBADD231PDZ128m |
| 36236 | { 10920, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dbb0024829ULL }, // Inst #10920 = VFMSUBADD231PDYr |
| 36237 | { 10919, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dbb0024819ULL }, // Inst #10919 = VFMSUBADD231PDYm |
| 36238 | { 10918, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd3a8004829ULL }, // Inst #10918 = VFMSUBADD213PSr |
| 36239 | { 10917, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd3a8004819ULL }, // Inst #10917 = VFMSUBADD213PSm |
| 36240 | { 10916, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3e8004829ULL }, // Inst #10916 = VFMSUBADD213PSZrkz |
| 36241 | { 10915, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead3e8004829ULL }, // Inst #10915 = VFMSUBADD213PSZrk |
| 36242 | { 10914, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ed3e8004829ULL }, // Inst #10914 = VFMSUBADD213PSZrbkz |
| 36243 | { 10913, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ad3e8004829ULL }, // Inst #10913 = VFMSUBADD213PSZrbk |
| 36244 | { 10912, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178d3e8004829ULL }, // Inst #10912 = VFMSUBADD213PSZrb |
| 36245 | { 10911, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3e8004829ULL }, // Inst #10911 = VFMSUBADD213PSZr |
| 36246 | { 10910, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3e8004819ULL }, // Inst #10910 = VFMSUBADD213PSZmkz |
| 36247 | { 10909, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead3e8004819ULL }, // Inst #10909 = VFMSUBADD213PSZmk |
| 36248 | { 10908, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed3e8004819ULL }, // Inst #10908 = VFMSUBADD213PSZmbkz |
| 36249 | { 10907, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad3e8004819ULL }, // Inst #10907 = VFMSUBADD213PSZmbk |
| 36250 | { 10906, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d3e8004819ULL }, // Inst #10906 = VFMSUBADD213PSZmb |
| 36251 | { 10905, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3e8004819ULL }, // Inst #10905 = VFMSUBADD213PSZm |
| 36252 | { 10904, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3e8004829ULL }, // Inst #10904 = VFMSUBADD213PSZ256rkz |
| 36253 | { 10903, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d3e8004829ULL }, // Inst #10903 = VFMSUBADD213PSZ256rk |
| 36254 | { 10902, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3e8004829ULL }, // Inst #10902 = VFMSUBADD213PSZ256r |
| 36255 | { 10901, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3e8004819ULL }, // Inst #10901 = VFMSUBADD213PSZ256mkz |
| 36256 | { 10900, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d3e8004819ULL }, // Inst #10900 = VFMSUBADD213PSZ256mk |
| 36257 | { 10899, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d3e8004819ULL }, // Inst #10899 = VFMSUBADD213PSZ256mbkz |
| 36258 | { 10898, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d3e8004819ULL }, // Inst #10898 = VFMSUBADD213PSZ256mbk |
| 36259 | { 10897, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d3e8004819ULL }, // Inst #10897 = VFMSUBADD213PSZ256mb |
| 36260 | { 10896, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3e8004819ULL }, // Inst #10896 = VFMSUBADD213PSZ256m |
| 36261 | { 10895, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3e8004829ULL }, // Inst #10895 = VFMSUBADD213PSZ128rkz |
| 36262 | { 10894, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d3e8004829ULL }, // Inst #10894 = VFMSUBADD213PSZ128rk |
| 36263 | { 10893, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3e8004829ULL }, // Inst #10893 = VFMSUBADD213PSZ128r |
| 36264 | { 10892, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3e8004819ULL }, // Inst #10892 = VFMSUBADD213PSZ128mkz |
| 36265 | { 10891, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d3e8004819ULL }, // Inst #10891 = VFMSUBADD213PSZ128mk |
| 36266 | { 10890, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d3e8004819ULL }, // Inst #10890 = VFMSUBADD213PSZ128mbkz |
| 36267 | { 10889, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d3e8004819ULL }, // Inst #10889 = VFMSUBADD213PSZ128mbk |
| 36268 | { 10888, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d3e8004819ULL }, // Inst #10888 = VFMSUBADD213PSZ128mb |
| 36269 | { 10887, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3e8004819ULL }, // Inst #10887 = VFMSUBADD213PSZ128m |
| 36270 | { 10886, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d3a8004829ULL }, // Inst #10886 = VFMSUBADD213PSYr |
| 36271 | { 10885, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d3a8004819ULL }, // Inst #10885 = VFMSUBADD213PSYm |
| 36272 | { 10884, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3e8014829ULL }, // Inst #10884 = VFMSUBADD213PHZrkz |
| 36273 | { 10883, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead3e8014829ULL }, // Inst #10883 = VFMSUBADD213PHZrk |
| 36274 | { 10882, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ed3e8014829ULL }, // Inst #10882 = VFMSUBADD213PHZrbkz |
| 36275 | { 10881, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ad3e8014829ULL }, // Inst #10881 = VFMSUBADD213PHZrbk |
| 36276 | { 10880, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158d3e8014829ULL }, // Inst #10880 = VFMSUBADD213PHZrb |
| 36277 | { 10879, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3e8014829ULL }, // Inst #10879 = VFMSUBADD213PHZr |
| 36278 | { 10878, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3e8014819ULL }, // Inst #10878 = VFMSUBADD213PHZmkz |
| 36279 | { 10877, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead3e8014819ULL }, // Inst #10877 = VFMSUBADD213PHZmk |
| 36280 | { 10876, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed3e8014819ULL }, // Inst #10876 = VFMSUBADD213PHZmbkz |
| 36281 | { 10875, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad3e8014819ULL }, // Inst #10875 = VFMSUBADD213PHZmbk |
| 36282 | { 10874, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d3e8014819ULL }, // Inst #10874 = VFMSUBADD213PHZmb |
| 36283 | { 10873, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3e8014819ULL }, // Inst #10873 = VFMSUBADD213PHZm |
| 36284 | { 10872, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3e8014829ULL }, // Inst #10872 = VFMSUBADD213PHZ256rkz |
| 36285 | { 10871, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d3e8014829ULL }, // Inst #10871 = VFMSUBADD213PHZ256rk |
| 36286 | { 10870, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3e8014829ULL }, // Inst #10870 = VFMSUBADD213PHZ256r |
| 36287 | { 10869, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3e8014819ULL }, // Inst #10869 = VFMSUBADD213PHZ256mkz |
| 36288 | { 10868, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d3e8014819ULL }, // Inst #10868 = VFMSUBADD213PHZ256mk |
| 36289 | { 10867, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d3e8014819ULL }, // Inst #10867 = VFMSUBADD213PHZ256mbkz |
| 36290 | { 10866, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d3e8014819ULL }, // Inst #10866 = VFMSUBADD213PHZ256mbk |
| 36291 | { 10865, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d3e8014819ULL }, // Inst #10865 = VFMSUBADD213PHZ256mb |
| 36292 | { 10864, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3e8014819ULL }, // Inst #10864 = VFMSUBADD213PHZ256m |
| 36293 | { 10863, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3e8014829ULL }, // Inst #10863 = VFMSUBADD213PHZ128rkz |
| 36294 | { 10862, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d3e8014829ULL }, // Inst #10862 = VFMSUBADD213PHZ128rk |
| 36295 | { 10861, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3e8014829ULL }, // Inst #10861 = VFMSUBADD213PHZ128r |
| 36296 | { 10860, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3e8014819ULL }, // Inst #10860 = VFMSUBADD213PHZ128mkz |
| 36297 | { 10859, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d3e8014819ULL }, // Inst #10859 = VFMSUBADD213PHZ128mk |
| 36298 | { 10858, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d3e8014819ULL }, // Inst #10858 = VFMSUBADD213PHZ128mbkz |
| 36299 | { 10857, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d3e8014819ULL }, // Inst #10857 = VFMSUBADD213PHZ128mbk |
| 36300 | { 10856, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d3e8014819ULL }, // Inst #10856 = VFMSUBADD213PHZ128mb |
| 36301 | { 10855, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3e8014819ULL }, // Inst #10855 = VFMSUBADD213PHZ128m |
| 36302 | { 10854, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd3b0024829ULL }, // Inst #10854 = VFMSUBADD213PDr |
| 36303 | { 10853, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd3b0024819ULL }, // Inst #10853 = VFMSUBADD213PDm |
| 36304 | { 10852, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3f0024829ULL }, // Inst #10852 = VFMSUBADD213PDZrkz |
| 36305 | { 10851, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead3f0024829ULL }, // Inst #10851 = VFMSUBADD213PDZrk |
| 36306 | { 10850, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ed3f0024829ULL }, // Inst #10850 = VFMSUBADD213PDZrbkz |
| 36307 | { 10849, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ad3f0024829ULL }, // Inst #10849 = VFMSUBADD213PDZrbk |
| 36308 | { 10848, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198d3f0024829ULL }, // Inst #10848 = VFMSUBADD213PDZrb |
| 36309 | { 10847, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3f0024829ULL }, // Inst #10847 = VFMSUBADD213PDZr |
| 36310 | { 10846, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3f0024819ULL }, // Inst #10846 = VFMSUBADD213PDZmkz |
| 36311 | { 10845, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead3f0024819ULL }, // Inst #10845 = VFMSUBADD213PDZmk |
| 36312 | { 10844, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed3f0024819ULL }, // Inst #10844 = VFMSUBADD213PDZmbkz |
| 36313 | { 10843, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad3f0024819ULL }, // Inst #10843 = VFMSUBADD213PDZmbk |
| 36314 | { 10842, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d3f0024819ULL }, // Inst #10842 = VFMSUBADD213PDZmb |
| 36315 | { 10841, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3f0024819ULL }, // Inst #10841 = VFMSUBADD213PDZm |
| 36316 | { 10840, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3f0024829ULL }, // Inst #10840 = VFMSUBADD213PDZ256rkz |
| 36317 | { 10839, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d3f0024829ULL }, // Inst #10839 = VFMSUBADD213PDZ256rk |
| 36318 | { 10838, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3f0024829ULL }, // Inst #10838 = VFMSUBADD213PDZ256r |
| 36319 | { 10837, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3f0024819ULL }, // Inst #10837 = VFMSUBADD213PDZ256mkz |
| 36320 | { 10836, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d3f0024819ULL }, // Inst #10836 = VFMSUBADD213PDZ256mk |
| 36321 | { 10835, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d3f0024819ULL }, // Inst #10835 = VFMSUBADD213PDZ256mbkz |
| 36322 | { 10834, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d3f0024819ULL }, // Inst #10834 = VFMSUBADD213PDZ256mbk |
| 36323 | { 10833, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d3f0024819ULL }, // Inst #10833 = VFMSUBADD213PDZ256mb |
| 36324 | { 10832, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3f0024819ULL }, // Inst #10832 = VFMSUBADD213PDZ256m |
| 36325 | { 10831, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3f0024829ULL }, // Inst #10831 = VFMSUBADD213PDZ128rkz |
| 36326 | { 10830, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d3f0024829ULL }, // Inst #10830 = VFMSUBADD213PDZ128rk |
| 36327 | { 10829, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3f0024829ULL }, // Inst #10829 = VFMSUBADD213PDZ128r |
| 36328 | { 10828, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3f0024819ULL }, // Inst #10828 = VFMSUBADD213PDZ128mkz |
| 36329 | { 10827, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d3f0024819ULL }, // Inst #10827 = VFMSUBADD213PDZ128mk |
| 36330 | { 10826, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d3f0024819ULL }, // Inst #10826 = VFMSUBADD213PDZ128mbkz |
| 36331 | { 10825, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d3f0024819ULL }, // Inst #10825 = VFMSUBADD213PDZ128mbk |
| 36332 | { 10824, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d3f0024819ULL }, // Inst #10824 = VFMSUBADD213PDZ128mb |
| 36333 | { 10823, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3f0024819ULL }, // Inst #10823 = VFMSUBADD213PDZ128m |
| 36334 | { 10822, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d3b0024829ULL }, // Inst #10822 = VFMSUBADD213PDYr |
| 36335 | { 10821, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d3b0024819ULL }, // Inst #10821 = VFMSUBADD213PDYm |
| 36336 | { 10820, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcba8004829ULL }, // Inst #10820 = VFMSUBADD132PSr |
| 36337 | { 10819, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcba8004819ULL }, // Inst #10819 = VFMSUBADD132PSm |
| 36338 | { 10818, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbe8004829ULL }, // Inst #10818 = VFMSUBADD132PSZrkz |
| 36339 | { 10817, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacbe8004829ULL }, // Inst #10817 = VFMSUBADD132PSZrk |
| 36340 | { 10816, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ecbe8004829ULL }, // Inst #10816 = VFMSUBADD132PSZrbkz |
| 36341 | { 10815, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17acbe8004829ULL }, // Inst #10815 = VFMSUBADD132PSZrbk |
| 36342 | { 10814, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178cbe8004829ULL }, // Inst #10814 = VFMSUBADD132PSZrb |
| 36343 | { 10813, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbe8004829ULL }, // Inst #10813 = VFMSUBADD132PSZr |
| 36344 | { 10812, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbe8004819ULL }, // Inst #10812 = VFMSUBADD132PSZmkz |
| 36345 | { 10811, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacbe8004819ULL }, // Inst #10811 = VFMSUBADD132PSZmk |
| 36346 | { 10810, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ecbe8004819ULL }, // Inst #10810 = VFMSUBADD132PSZmbkz |
| 36347 | { 10809, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7acbe8004819ULL }, // Inst #10809 = VFMSUBADD132PSZmbk |
| 36348 | { 10808, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78cbe8004819ULL }, // Inst #10808 = VFMSUBADD132PSZmb |
| 36349 | { 10807, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbe8004819ULL }, // Inst #10807 = VFMSUBADD132PSZm |
| 36350 | { 10806, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbe8004829ULL }, // Inst #10806 = VFMSUBADD132PSZ256rkz |
| 36351 | { 10805, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cbe8004829ULL }, // Inst #10805 = VFMSUBADD132PSZ256rk |
| 36352 | { 10804, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbe8004829ULL }, // Inst #10804 = VFMSUBADD132PSZ256r |
| 36353 | { 10803, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbe8004819ULL }, // Inst #10803 = VFMSUBADD132PSZ256mkz |
| 36354 | { 10802, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cbe8004819ULL }, // Inst #10802 = VFMSUBADD132PSZ256mk |
| 36355 | { 10801, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77cbe8004819ULL }, // Inst #10801 = VFMSUBADD132PSZ256mbkz |
| 36356 | { 10800, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73cbe8004819ULL }, // Inst #10800 = VFMSUBADD132PSZ256mbk |
| 36357 | { 10799, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71cbe8004819ULL }, // Inst #10799 = VFMSUBADD132PSZ256mb |
| 36358 | { 10798, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbe8004819ULL }, // Inst #10798 = VFMSUBADD132PSZ256m |
| 36359 | { 10797, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbe8004829ULL }, // Inst #10797 = VFMSUBADD132PSZ128rkz |
| 36360 | { 10796, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cbe8004829ULL }, // Inst #10796 = VFMSUBADD132PSZ128rk |
| 36361 | { 10795, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbe8004829ULL }, // Inst #10795 = VFMSUBADD132PSZ128r |
| 36362 | { 10794, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbe8004819ULL }, // Inst #10794 = VFMSUBADD132PSZ128mkz |
| 36363 | { 10793, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cbe8004819ULL }, // Inst #10793 = VFMSUBADD132PSZ128mk |
| 36364 | { 10792, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76cbe8004819ULL }, // Inst #10792 = VFMSUBADD132PSZ128mbkz |
| 36365 | { 10791, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72cbe8004819ULL }, // Inst #10791 = VFMSUBADD132PSZ128mbk |
| 36366 | { 10790, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70cbe8004819ULL }, // Inst #10790 = VFMSUBADD132PSZ128mb |
| 36367 | { 10789, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbe8004819ULL }, // Inst #10789 = VFMSUBADD132PSZ128m |
| 36368 | { 10788, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cba8004829ULL }, // Inst #10788 = VFMSUBADD132PSYr |
| 36369 | { 10787, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cba8004819ULL }, // Inst #10787 = VFMSUBADD132PSYm |
| 36370 | { 10786, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbe8014829ULL }, // Inst #10786 = VFMSUBADD132PHZrkz |
| 36371 | { 10785, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacbe8014829ULL }, // Inst #10785 = VFMSUBADD132PHZrk |
| 36372 | { 10784, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ecbe8014829ULL }, // Inst #10784 = VFMSUBADD132PHZrbkz |
| 36373 | { 10783, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15acbe8014829ULL }, // Inst #10783 = VFMSUBADD132PHZrbk |
| 36374 | { 10782, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158cbe8014829ULL }, // Inst #10782 = VFMSUBADD132PHZrb |
| 36375 | { 10781, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbe8014829ULL }, // Inst #10781 = VFMSUBADD132PHZr |
| 36376 | { 10780, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbe8014819ULL }, // Inst #10780 = VFMSUBADD132PHZmkz |
| 36377 | { 10779, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacbe8014819ULL }, // Inst #10779 = VFMSUBADD132PHZmk |
| 36378 | { 10778, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ecbe8014819ULL }, // Inst #10778 = VFMSUBADD132PHZmbkz |
| 36379 | { 10777, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5acbe8014819ULL }, // Inst #10777 = VFMSUBADD132PHZmbk |
| 36380 | { 10776, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58cbe8014819ULL }, // Inst #10776 = VFMSUBADD132PHZmb |
| 36381 | { 10775, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbe8014819ULL }, // Inst #10775 = VFMSUBADD132PHZm |
| 36382 | { 10774, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbe8014829ULL }, // Inst #10774 = VFMSUBADD132PHZ256rkz |
| 36383 | { 10773, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cbe8014829ULL }, // Inst #10773 = VFMSUBADD132PHZ256rk |
| 36384 | { 10772, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbe8014829ULL }, // Inst #10772 = VFMSUBADD132PHZ256r |
| 36385 | { 10771, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbe8014819ULL }, // Inst #10771 = VFMSUBADD132PHZ256mkz |
| 36386 | { 10770, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cbe8014819ULL }, // Inst #10770 = VFMSUBADD132PHZ256mk |
| 36387 | { 10769, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57cbe8014819ULL }, // Inst #10769 = VFMSUBADD132PHZ256mbkz |
| 36388 | { 10768, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53cbe8014819ULL }, // Inst #10768 = VFMSUBADD132PHZ256mbk |
| 36389 | { 10767, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51cbe8014819ULL }, // Inst #10767 = VFMSUBADD132PHZ256mb |
| 36390 | { 10766, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbe8014819ULL }, // Inst #10766 = VFMSUBADD132PHZ256m |
| 36391 | { 10765, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbe8014829ULL }, // Inst #10765 = VFMSUBADD132PHZ128rkz |
| 36392 | { 10764, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cbe8014829ULL }, // Inst #10764 = VFMSUBADD132PHZ128rk |
| 36393 | { 10763, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbe8014829ULL }, // Inst #10763 = VFMSUBADD132PHZ128r |
| 36394 | { 10762, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbe8014819ULL }, // Inst #10762 = VFMSUBADD132PHZ128mkz |
| 36395 | { 10761, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cbe8014819ULL }, // Inst #10761 = VFMSUBADD132PHZ128mk |
| 36396 | { 10760, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56cbe8014819ULL }, // Inst #10760 = VFMSUBADD132PHZ128mbkz |
| 36397 | { 10759, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52cbe8014819ULL }, // Inst #10759 = VFMSUBADD132PHZ128mbk |
| 36398 | { 10758, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50cbe8014819ULL }, // Inst #10758 = VFMSUBADD132PHZ128mb |
| 36399 | { 10757, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbe8014819ULL }, // Inst #10757 = VFMSUBADD132PHZ128m |
| 36400 | { 10756, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcbb0024829ULL }, // Inst #10756 = VFMSUBADD132PDr |
| 36401 | { 10755, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcbb0024819ULL }, // Inst #10755 = VFMSUBADD132PDm |
| 36402 | { 10754, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbf0024829ULL }, // Inst #10754 = VFMSUBADD132PDZrkz |
| 36403 | { 10753, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacbf0024829ULL }, // Inst #10753 = VFMSUBADD132PDZrk |
| 36404 | { 10752, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ecbf0024829ULL }, // Inst #10752 = VFMSUBADD132PDZrbkz |
| 36405 | { 10751, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19acbf0024829ULL }, // Inst #10751 = VFMSUBADD132PDZrbk |
| 36406 | { 10750, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198cbf0024829ULL }, // Inst #10750 = VFMSUBADD132PDZrb |
| 36407 | { 10749, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbf0024829ULL }, // Inst #10749 = VFMSUBADD132PDZr |
| 36408 | { 10748, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbf0024819ULL }, // Inst #10748 = VFMSUBADD132PDZmkz |
| 36409 | { 10747, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacbf0024819ULL }, // Inst #10747 = VFMSUBADD132PDZmk |
| 36410 | { 10746, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ecbf0024819ULL }, // Inst #10746 = VFMSUBADD132PDZmbkz |
| 36411 | { 10745, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9acbf0024819ULL }, // Inst #10745 = VFMSUBADD132PDZmbk |
| 36412 | { 10744, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98cbf0024819ULL }, // Inst #10744 = VFMSUBADD132PDZmb |
| 36413 | { 10743, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbf0024819ULL }, // Inst #10743 = VFMSUBADD132PDZm |
| 36414 | { 10742, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbf0024829ULL }, // Inst #10742 = VFMSUBADD132PDZ256rkz |
| 36415 | { 10741, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cbf0024829ULL }, // Inst #10741 = VFMSUBADD132PDZ256rk |
| 36416 | { 10740, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbf0024829ULL }, // Inst #10740 = VFMSUBADD132PDZ256r |
| 36417 | { 10739, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbf0024819ULL }, // Inst #10739 = VFMSUBADD132PDZ256mkz |
| 36418 | { 10738, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cbf0024819ULL }, // Inst #10738 = VFMSUBADD132PDZ256mk |
| 36419 | { 10737, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97cbf0024819ULL }, // Inst #10737 = VFMSUBADD132PDZ256mbkz |
| 36420 | { 10736, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93cbf0024819ULL }, // Inst #10736 = VFMSUBADD132PDZ256mbk |
| 36421 | { 10735, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91cbf0024819ULL }, // Inst #10735 = VFMSUBADD132PDZ256mb |
| 36422 | { 10734, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbf0024819ULL }, // Inst #10734 = VFMSUBADD132PDZ256m |
| 36423 | { 10733, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbf0024829ULL }, // Inst #10733 = VFMSUBADD132PDZ128rkz |
| 36424 | { 10732, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cbf0024829ULL }, // Inst #10732 = VFMSUBADD132PDZ128rk |
| 36425 | { 10731, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbf0024829ULL }, // Inst #10731 = VFMSUBADD132PDZ128r |
| 36426 | { 10730, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbf0024819ULL }, // Inst #10730 = VFMSUBADD132PDZ128mkz |
| 36427 | { 10729, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cbf0024819ULL }, // Inst #10729 = VFMSUBADD132PDZ128mk |
| 36428 | { 10728, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96cbf0024819ULL }, // Inst #10728 = VFMSUBADD132PDZ128mbkz |
| 36429 | { 10727, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92cbf0024819ULL }, // Inst #10727 = VFMSUBADD132PDZ128mbk |
| 36430 | { 10726, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90cbf0024819ULL }, // Inst #10726 = VFMSUBADD132PDZ128mb |
| 36431 | { 10725, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbf0024819ULL }, // Inst #10725 = VFMSUBADD132PDZ128m |
| 36432 | { 10724, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cbb0024829ULL }, // Inst #10724 = VFMSUBADD132PDYr |
| 36433 | { 10723, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cbb0024819ULL }, // Inst #10723 = VFMSUBADD132PDYm |
| 36434 | { 10722, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdda8004829ULL }, // Inst #10722 = VFMSUB231SSr_Int |
| 36435 | { 10721, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdda8004829ULL }, // Inst #10721 = VFMSUB231SSr |
| 36436 | { 10720, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdda8004819ULL }, // Inst #10720 = VFMSUB231SSm_Int |
| 36437 | { 10719, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdda8004819ULL }, // Inst #10719 = VFMSUB231SSm |
| 36438 | { 10718, 5, 1, 0, 1100, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dde8004829ULL }, // Inst #10718 = VFMSUB231SSZrkz_Int |
| 36439 | { 10717, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dde8004829ULL }, // Inst #10717 = VFMSUB231SSZrk_Int |
| 36440 | { 10716, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176dde8004829ULL }, // Inst #10716 = VFMSUB231SSZrbkz_Int |
| 36441 | { 10715, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172dde8004829ULL }, // Inst #10715 = VFMSUB231SSZrbk_Int |
| 36442 | { 10714, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170dde8004829ULL }, // Inst #10714 = VFMSUB231SSZrb_Int |
| 36443 | { 10713, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170dde8004829ULL }, // Inst #10713 = VFMSUB231SSZrb |
| 36444 | { 10712, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dde8004829ULL }, // Inst #10712 = VFMSUB231SSZr_Int |
| 36445 | { 10711, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dde8004829ULL }, // Inst #10711 = VFMSUB231SSZr |
| 36446 | { 10710, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dde8004819ULL }, // Inst #10710 = VFMSUB231SSZmkz_Int |
| 36447 | { 10709, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dde8004819ULL }, // Inst #10709 = VFMSUB231SSZmk_Int |
| 36448 | { 10708, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dde8004819ULL }, // Inst #10708 = VFMSUB231SSZm_Int |
| 36449 | { 10707, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dde8004819ULL }, // Inst #10707 = VFMSUB231SSZm |
| 36450 | { 10706, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dde8014829ULL }, // Inst #10706 = VFMSUB231SHZrkz_Int |
| 36451 | { 10705, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dde8014829ULL }, // Inst #10705 = VFMSUB231SHZrk_Int |
| 36452 | { 10704, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156dde8014829ULL }, // Inst #10704 = VFMSUB231SHZrbkz_Int |
| 36453 | { 10703, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152dde8014829ULL }, // Inst #10703 = VFMSUB231SHZrbk_Int |
| 36454 | { 10702, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150dde8014829ULL }, // Inst #10702 = VFMSUB231SHZrb_Int |
| 36455 | { 10701, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150dde8014829ULL }, // Inst #10701 = VFMSUB231SHZrb |
| 36456 | { 10700, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dde8014829ULL }, // Inst #10700 = VFMSUB231SHZr_Int |
| 36457 | { 10699, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dde8014829ULL }, // Inst #10699 = VFMSUB231SHZr |
| 36458 | { 10698, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dde8014819ULL }, // Inst #10698 = VFMSUB231SHZmkz_Int |
| 36459 | { 10697, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dde8014819ULL }, // Inst #10697 = VFMSUB231SHZmk_Int |
| 36460 | { 10696, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dde8014819ULL }, // Inst #10696 = VFMSUB231SHZm_Int |
| 36461 | { 10695, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dde8014819ULL }, // Inst #10695 = VFMSUB231SHZm |
| 36462 | { 10694, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xddb0024829ULL }, // Inst #10694 = VFMSUB231SDr_Int |
| 36463 | { 10693, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xddb0024829ULL }, // Inst #10693 = VFMSUB231SDr |
| 36464 | { 10692, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xddb0024819ULL }, // Inst #10692 = VFMSUB231SDm_Int |
| 36465 | { 10691, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xddb0024819ULL }, // Inst #10691 = VFMSUB231SDm |
| 36466 | { 10690, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86ddf0024829ULL }, // Inst #10690 = VFMSUB231SDZrkz_Int |
| 36467 | { 10689, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82ddf0024829ULL }, // Inst #10689 = VFMSUB231SDZrk_Int |
| 36468 | { 10688, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196ddf0024829ULL }, // Inst #10688 = VFMSUB231SDZrbkz_Int |
| 36469 | { 10687, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192ddf0024829ULL }, // Inst #10687 = VFMSUB231SDZrbk_Int |
| 36470 | { 10686, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190ddf0024829ULL }, // Inst #10686 = VFMSUB231SDZrb_Int |
| 36471 | { 10685, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190ddf0024829ULL }, // Inst #10685 = VFMSUB231SDZrb |
| 36472 | { 10684, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ddf0024829ULL }, // Inst #10684 = VFMSUB231SDZr_Int |
| 36473 | { 10683, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ddf0024829ULL }, // Inst #10683 = VFMSUB231SDZr |
| 36474 | { 10682, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86ddf0024819ULL }, // Inst #10682 = VFMSUB231SDZmkz_Int |
| 36475 | { 10681, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82ddf0024819ULL }, // Inst #10681 = VFMSUB231SDZmk_Int |
| 36476 | { 10680, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ddf0024819ULL }, // Inst #10680 = VFMSUB231SDZm_Int |
| 36477 | { 10679, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ddf0024819ULL }, // Inst #10679 = VFMSUB231SDZm |
| 36478 | { 10678, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdd28004829ULL }, // Inst #10678 = VFMSUB231PSr |
| 36479 | { 10677, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdd28004819ULL }, // Inst #10677 = VFMSUB231PSm |
| 36480 | { 10676, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd68004829ULL }, // Inst #10676 = VFMSUB231PSZrkz |
| 36481 | { 10675, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadd68004829ULL }, // Inst #10675 = VFMSUB231PSZrk |
| 36482 | { 10674, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17edd68004829ULL }, // Inst #10674 = VFMSUB231PSZrbkz |
| 36483 | { 10673, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17add68004829ULL }, // Inst #10673 = VFMSUB231PSZrbk |
| 36484 | { 10672, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178dd68004829ULL }, // Inst #10672 = VFMSUB231PSZrb |
| 36485 | { 10671, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd68004829ULL }, // Inst #10671 = VFMSUB231PSZr |
| 36486 | { 10670, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd68004819ULL }, // Inst #10670 = VFMSUB231PSZmkz |
| 36487 | { 10669, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadd68004819ULL }, // Inst #10669 = VFMSUB231PSZmk |
| 36488 | { 10668, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7edd68004819ULL }, // Inst #10668 = VFMSUB231PSZmbkz |
| 36489 | { 10667, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7add68004819ULL }, // Inst #10667 = VFMSUB231PSZmbk |
| 36490 | { 10666, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78dd68004819ULL }, // Inst #10666 = VFMSUB231PSZmb |
| 36491 | { 10665, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd68004819ULL }, // Inst #10665 = VFMSUB231PSZm |
| 36492 | { 10664, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd68004829ULL }, // Inst #10664 = VFMSUB231PSZ256rkz |
| 36493 | { 10663, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dd68004829ULL }, // Inst #10663 = VFMSUB231PSZ256rk |
| 36494 | { 10662, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd68004829ULL }, // Inst #10662 = VFMSUB231PSZ256r |
| 36495 | { 10661, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd68004819ULL }, // Inst #10661 = VFMSUB231PSZ256mkz |
| 36496 | { 10660, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dd68004819ULL }, // Inst #10660 = VFMSUB231PSZ256mk |
| 36497 | { 10659, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77dd68004819ULL }, // Inst #10659 = VFMSUB231PSZ256mbkz |
| 36498 | { 10658, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73dd68004819ULL }, // Inst #10658 = VFMSUB231PSZ256mbk |
| 36499 | { 10657, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71dd68004819ULL }, // Inst #10657 = VFMSUB231PSZ256mb |
| 36500 | { 10656, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd68004819ULL }, // Inst #10656 = VFMSUB231PSZ256m |
| 36501 | { 10655, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd68004829ULL }, // Inst #10655 = VFMSUB231PSZ128rkz |
| 36502 | { 10654, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dd68004829ULL }, // Inst #10654 = VFMSUB231PSZ128rk |
| 36503 | { 10653, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd68004829ULL }, // Inst #10653 = VFMSUB231PSZ128r |
| 36504 | { 10652, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd68004819ULL }, // Inst #10652 = VFMSUB231PSZ128mkz |
| 36505 | { 10651, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dd68004819ULL }, // Inst #10651 = VFMSUB231PSZ128mk |
| 36506 | { 10650, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76dd68004819ULL }, // Inst #10650 = VFMSUB231PSZ128mbkz |
| 36507 | { 10649, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72dd68004819ULL }, // Inst #10649 = VFMSUB231PSZ128mbk |
| 36508 | { 10648, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70dd68004819ULL }, // Inst #10648 = VFMSUB231PSZ128mb |
| 36509 | { 10647, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd68004819ULL }, // Inst #10647 = VFMSUB231PSZ128m |
| 36510 | { 10646, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dd28004829ULL }, // Inst #10646 = VFMSUB231PSYr |
| 36511 | { 10645, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dd28004819ULL }, // Inst #10645 = VFMSUB231PSYm |
| 36512 | { 10644, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd68014829ULL }, // Inst #10644 = VFMSUB231PHZrkz |
| 36513 | { 10643, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadd68014829ULL }, // Inst #10643 = VFMSUB231PHZrk |
| 36514 | { 10642, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15edd68014829ULL }, // Inst #10642 = VFMSUB231PHZrbkz |
| 36515 | { 10641, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15add68014829ULL }, // Inst #10641 = VFMSUB231PHZrbk |
| 36516 | { 10640, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158dd68014829ULL }, // Inst #10640 = VFMSUB231PHZrb |
| 36517 | { 10639, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd68014829ULL }, // Inst #10639 = VFMSUB231PHZr |
| 36518 | { 10638, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd68014819ULL }, // Inst #10638 = VFMSUB231PHZmkz |
| 36519 | { 10637, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadd68014819ULL }, // Inst #10637 = VFMSUB231PHZmk |
| 36520 | { 10636, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5edd68014819ULL }, // Inst #10636 = VFMSUB231PHZmbkz |
| 36521 | { 10635, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5add68014819ULL }, // Inst #10635 = VFMSUB231PHZmbk |
| 36522 | { 10634, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58dd68014819ULL }, // Inst #10634 = VFMSUB231PHZmb |
| 36523 | { 10633, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd68014819ULL }, // Inst #10633 = VFMSUB231PHZm |
| 36524 | { 10632, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd68014829ULL }, // Inst #10632 = VFMSUB231PHZ256rkz |
| 36525 | { 10631, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dd68014829ULL }, // Inst #10631 = VFMSUB231PHZ256rk |
| 36526 | { 10630, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd68014829ULL }, // Inst #10630 = VFMSUB231PHZ256r |
| 36527 | { 10629, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd68014819ULL }, // Inst #10629 = VFMSUB231PHZ256mkz |
| 36528 | { 10628, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dd68014819ULL }, // Inst #10628 = VFMSUB231PHZ256mk |
| 36529 | { 10627, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57dd68014819ULL }, // Inst #10627 = VFMSUB231PHZ256mbkz |
| 36530 | { 10626, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53dd68014819ULL }, // Inst #10626 = VFMSUB231PHZ256mbk |
| 36531 | { 10625, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51dd68014819ULL }, // Inst #10625 = VFMSUB231PHZ256mb |
| 36532 | { 10624, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd68014819ULL }, // Inst #10624 = VFMSUB231PHZ256m |
| 36533 | { 10623, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd68014829ULL }, // Inst #10623 = VFMSUB231PHZ128rkz |
| 36534 | { 10622, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dd68014829ULL }, // Inst #10622 = VFMSUB231PHZ128rk |
| 36535 | { 10621, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd68014829ULL }, // Inst #10621 = VFMSUB231PHZ128r |
| 36536 | { 10620, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd68014819ULL }, // Inst #10620 = VFMSUB231PHZ128mkz |
| 36537 | { 10619, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dd68014819ULL }, // Inst #10619 = VFMSUB231PHZ128mk |
| 36538 | { 10618, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56dd68014819ULL }, // Inst #10618 = VFMSUB231PHZ128mbkz |
| 36539 | { 10617, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52dd68014819ULL }, // Inst #10617 = VFMSUB231PHZ128mbk |
| 36540 | { 10616, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50dd68014819ULL }, // Inst #10616 = VFMSUB231PHZ128mb |
| 36541 | { 10615, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd68014819ULL }, // Inst #10615 = VFMSUB231PHZ128m |
| 36542 | { 10614, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdd30024829ULL }, // Inst #10614 = VFMSUB231PDr |
| 36543 | { 10613, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdd30024819ULL }, // Inst #10613 = VFMSUB231PDm |
| 36544 | { 10612, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd70024829ULL }, // Inst #10612 = VFMSUB231PDZrkz |
| 36545 | { 10611, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadd70024829ULL }, // Inst #10611 = VFMSUB231PDZrk |
| 36546 | { 10610, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19edd70024829ULL }, // Inst #10610 = VFMSUB231PDZrbkz |
| 36547 | { 10609, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19add70024829ULL }, // Inst #10609 = VFMSUB231PDZrbk |
| 36548 | { 10608, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198dd70024829ULL }, // Inst #10608 = VFMSUB231PDZrb |
| 36549 | { 10607, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd70024829ULL }, // Inst #10607 = VFMSUB231PDZr |
| 36550 | { 10606, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd70024819ULL }, // Inst #10606 = VFMSUB231PDZmkz |
| 36551 | { 10605, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadd70024819ULL }, // Inst #10605 = VFMSUB231PDZmk |
| 36552 | { 10604, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9edd70024819ULL }, // Inst #10604 = VFMSUB231PDZmbkz |
| 36553 | { 10603, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9add70024819ULL }, // Inst #10603 = VFMSUB231PDZmbk |
| 36554 | { 10602, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98dd70024819ULL }, // Inst #10602 = VFMSUB231PDZmb |
| 36555 | { 10601, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd70024819ULL }, // Inst #10601 = VFMSUB231PDZm |
| 36556 | { 10600, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd70024829ULL }, // Inst #10600 = VFMSUB231PDZ256rkz |
| 36557 | { 10599, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dd70024829ULL }, // Inst #10599 = VFMSUB231PDZ256rk |
| 36558 | { 10598, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd70024829ULL }, // Inst #10598 = VFMSUB231PDZ256r |
| 36559 | { 10597, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd70024819ULL }, // Inst #10597 = VFMSUB231PDZ256mkz |
| 36560 | { 10596, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dd70024819ULL }, // Inst #10596 = VFMSUB231PDZ256mk |
| 36561 | { 10595, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97dd70024819ULL }, // Inst #10595 = VFMSUB231PDZ256mbkz |
| 36562 | { 10594, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93dd70024819ULL }, // Inst #10594 = VFMSUB231PDZ256mbk |
| 36563 | { 10593, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91dd70024819ULL }, // Inst #10593 = VFMSUB231PDZ256mb |
| 36564 | { 10592, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd70024819ULL }, // Inst #10592 = VFMSUB231PDZ256m |
| 36565 | { 10591, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd70024829ULL }, // Inst #10591 = VFMSUB231PDZ128rkz |
| 36566 | { 10590, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dd70024829ULL }, // Inst #10590 = VFMSUB231PDZ128rk |
| 36567 | { 10589, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd70024829ULL }, // Inst #10589 = VFMSUB231PDZ128r |
| 36568 | { 10588, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd70024819ULL }, // Inst #10588 = VFMSUB231PDZ128mkz |
| 36569 | { 10587, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dd70024819ULL }, // Inst #10587 = VFMSUB231PDZ128mk |
| 36570 | { 10586, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96dd70024819ULL }, // Inst #10586 = VFMSUB231PDZ128mbkz |
| 36571 | { 10585, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92dd70024819ULL }, // Inst #10585 = VFMSUB231PDZ128mbk |
| 36572 | { 10584, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90dd70024819ULL }, // Inst #10584 = VFMSUB231PDZ128mb |
| 36573 | { 10583, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd70024819ULL }, // Inst #10583 = VFMSUB231PDZ128m |
| 36574 | { 10582, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dd30024829ULL }, // Inst #10582 = VFMSUB231PDYr |
| 36575 | { 10581, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dd30024819ULL }, // Inst #10581 = VFMSUB231PDYm |
| 36576 | { 10580, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeedd68014029ULL }, // Inst #10580 = VFMSUB231BF16Zrkz |
| 36577 | { 10579, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeadd68014029ULL }, // Inst #10579 = VFMSUB231BF16Zrk |
| 36578 | { 10578, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8dd68014029ULL }, // Inst #10578 = VFMSUB231BF16Zr |
| 36579 | { 10577, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeedd68014019ULL }, // Inst #10577 = VFMSUB231BF16Zmkz |
| 36580 | { 10576, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeadd68014019ULL }, // Inst #10576 = VFMSUB231BF16Zmk |
| 36581 | { 10575, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5edd68014019ULL }, // Inst #10575 = VFMSUB231BF16Zmbkz |
| 36582 | { 10574, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5add68014019ULL }, // Inst #10574 = VFMSUB231BF16Zmbk |
| 36583 | { 10573, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58dd68014019ULL }, // Inst #10573 = VFMSUB231BF16Zmb |
| 36584 | { 10572, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8dd68014019ULL }, // Inst #10572 = VFMSUB231BF16Zm |
| 36585 | { 10571, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7dd68014029ULL }, // Inst #10571 = VFMSUB231BF16Z256rkz |
| 36586 | { 10570, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3dd68014029ULL }, // Inst #10570 = VFMSUB231BF16Z256rk |
| 36587 | { 10569, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1dd68014029ULL }, // Inst #10569 = VFMSUB231BF16Z256r |
| 36588 | { 10568, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7dd68014019ULL }, // Inst #10568 = VFMSUB231BF16Z256mkz |
| 36589 | { 10567, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3dd68014019ULL }, // Inst #10567 = VFMSUB231BF16Z256mk |
| 36590 | { 10566, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57dd68014019ULL }, // Inst #10566 = VFMSUB231BF16Z256mbkz |
| 36591 | { 10565, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53dd68014019ULL }, // Inst #10565 = VFMSUB231BF16Z256mbk |
| 36592 | { 10564, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51dd68014019ULL }, // Inst #10564 = VFMSUB231BF16Z256mb |
| 36593 | { 10563, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1dd68014019ULL }, // Inst #10563 = VFMSUB231BF16Z256m |
| 36594 | { 10562, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6dd68014029ULL }, // Inst #10562 = VFMSUB231BF16Z128rkz |
| 36595 | { 10561, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2dd68014029ULL }, // Inst #10561 = VFMSUB231BF16Z128rk |
| 36596 | { 10560, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0dd68014029ULL }, // Inst #10560 = VFMSUB231BF16Z128r |
| 36597 | { 10559, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6dd68014019ULL }, // Inst #10559 = VFMSUB231BF16Z128mkz |
| 36598 | { 10558, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2dd68014019ULL }, // Inst #10558 = VFMSUB231BF16Z128mk |
| 36599 | { 10557, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56dd68014019ULL }, // Inst #10557 = VFMSUB231BF16Z128mbkz |
| 36600 | { 10556, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52dd68014019ULL }, // Inst #10556 = VFMSUB231BF16Z128mbk |
| 36601 | { 10555, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50dd68014019ULL }, // Inst #10555 = VFMSUB231BF16Z128mb |
| 36602 | { 10554, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0dd68014019ULL }, // Inst #10554 = VFMSUB231BF16Z128m |
| 36603 | { 10553, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5a8004829ULL }, // Inst #10553 = VFMSUB213SSr_Int |
| 36604 | { 10552, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5a8004829ULL }, // Inst #10552 = VFMSUB213SSr |
| 36605 | { 10551, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5a8004819ULL }, // Inst #10551 = VFMSUB213SSm_Int |
| 36606 | { 10550, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5a8004819ULL }, // Inst #10550 = VFMSUB213SSm |
| 36607 | { 10549, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d5e8004829ULL }, // Inst #10549 = VFMSUB213SSZrkz_Int |
| 36608 | { 10548, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d5e8004829ULL }, // Inst #10548 = VFMSUB213SSZrk_Int |
| 36609 | { 10547, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176d5e8004829ULL }, // Inst #10547 = VFMSUB213SSZrbkz_Int |
| 36610 | { 10546, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172d5e8004829ULL }, // Inst #10546 = VFMSUB213SSZrbk_Int |
| 36611 | { 10545, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170d5e8004829ULL }, // Inst #10545 = VFMSUB213SSZrb_Int |
| 36612 | { 10544, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170d5e8004829ULL }, // Inst #10544 = VFMSUB213SSZrb |
| 36613 | { 10543, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d5e8004829ULL }, // Inst #10543 = VFMSUB213SSZr_Int |
| 36614 | { 10542, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d5e8004829ULL }, // Inst #10542 = VFMSUB213SSZr |
| 36615 | { 10541, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d5e8004819ULL }, // Inst #10541 = VFMSUB213SSZmkz_Int |
| 36616 | { 10540, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d5e8004819ULL }, // Inst #10540 = VFMSUB213SSZmk_Int |
| 36617 | { 10539, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d5e8004819ULL }, // Inst #10539 = VFMSUB213SSZm_Int |
| 36618 | { 10538, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d5e8004819ULL }, // Inst #10538 = VFMSUB213SSZm |
| 36619 | { 10537, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d5e8014829ULL }, // Inst #10537 = VFMSUB213SHZrkz_Int |
| 36620 | { 10536, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d5e8014829ULL }, // Inst #10536 = VFMSUB213SHZrk_Int |
| 36621 | { 10535, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156d5e8014829ULL }, // Inst #10535 = VFMSUB213SHZrbkz_Int |
| 36622 | { 10534, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152d5e8014829ULL }, // Inst #10534 = VFMSUB213SHZrbk_Int |
| 36623 | { 10533, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150d5e8014829ULL }, // Inst #10533 = VFMSUB213SHZrb_Int |
| 36624 | { 10532, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150d5e8014829ULL }, // Inst #10532 = VFMSUB213SHZrb |
| 36625 | { 10531, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d5e8014829ULL }, // Inst #10531 = VFMSUB213SHZr_Int |
| 36626 | { 10530, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d5e8014829ULL }, // Inst #10530 = VFMSUB213SHZr |
| 36627 | { 10529, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d5e8014819ULL }, // Inst #10529 = VFMSUB213SHZmkz_Int |
| 36628 | { 10528, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d5e8014819ULL }, // Inst #10528 = VFMSUB213SHZmk_Int |
| 36629 | { 10527, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d5e8014819ULL }, // Inst #10527 = VFMSUB213SHZm_Int |
| 36630 | { 10526, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d5e8014819ULL }, // Inst #10526 = VFMSUB213SHZm |
| 36631 | { 10525, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5b0024829ULL }, // Inst #10525 = VFMSUB213SDr_Int |
| 36632 | { 10524, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5b0024829ULL }, // Inst #10524 = VFMSUB213SDr |
| 36633 | { 10523, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5b0024819ULL }, // Inst #10523 = VFMSUB213SDm_Int |
| 36634 | { 10522, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5b0024819ULL }, // Inst #10522 = VFMSUB213SDm |
| 36635 | { 10521, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d5f0024829ULL }, // Inst #10521 = VFMSUB213SDZrkz_Int |
| 36636 | { 10520, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d5f0024829ULL }, // Inst #10520 = VFMSUB213SDZrk_Int |
| 36637 | { 10519, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196d5f0024829ULL }, // Inst #10519 = VFMSUB213SDZrbkz_Int |
| 36638 | { 10518, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192d5f0024829ULL }, // Inst #10518 = VFMSUB213SDZrbk_Int |
| 36639 | { 10517, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190d5f0024829ULL }, // Inst #10517 = VFMSUB213SDZrb_Int |
| 36640 | { 10516, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190d5f0024829ULL }, // Inst #10516 = VFMSUB213SDZrb |
| 36641 | { 10515, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d5f0024829ULL }, // Inst #10515 = VFMSUB213SDZr_Int |
| 36642 | { 10514, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d5f0024829ULL }, // Inst #10514 = VFMSUB213SDZr |
| 36643 | { 10513, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d5f0024819ULL }, // Inst #10513 = VFMSUB213SDZmkz_Int |
| 36644 | { 10512, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d5f0024819ULL }, // Inst #10512 = VFMSUB213SDZmk_Int |
| 36645 | { 10511, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d5f0024819ULL }, // Inst #10511 = VFMSUB213SDZm_Int |
| 36646 | { 10510, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d5f0024819ULL }, // Inst #10510 = VFMSUB213SDZm |
| 36647 | { 10509, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd528004829ULL }, // Inst #10509 = VFMSUB213PSr |
| 36648 | { 10508, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd528004819ULL }, // Inst #10508 = VFMSUB213PSm |
| 36649 | { 10507, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed568004829ULL }, // Inst #10507 = VFMSUB213PSZrkz |
| 36650 | { 10506, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead568004829ULL }, // Inst #10506 = VFMSUB213PSZrk |
| 36651 | { 10505, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ed568004829ULL }, // Inst #10505 = VFMSUB213PSZrbkz |
| 36652 | { 10504, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ad568004829ULL }, // Inst #10504 = VFMSUB213PSZrbk |
| 36653 | { 10503, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178d568004829ULL }, // Inst #10503 = VFMSUB213PSZrb |
| 36654 | { 10502, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d568004829ULL }, // Inst #10502 = VFMSUB213PSZr |
| 36655 | { 10501, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed568004819ULL }, // Inst #10501 = VFMSUB213PSZmkz |
| 36656 | { 10500, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead568004819ULL }, // Inst #10500 = VFMSUB213PSZmk |
| 36657 | { 10499, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed568004819ULL }, // Inst #10499 = VFMSUB213PSZmbkz |
| 36658 | { 10498, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad568004819ULL }, // Inst #10498 = VFMSUB213PSZmbk |
| 36659 | { 10497, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d568004819ULL }, // Inst #10497 = VFMSUB213PSZmb |
| 36660 | { 10496, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d568004819ULL }, // Inst #10496 = VFMSUB213PSZm |
| 36661 | { 10495, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d568004829ULL }, // Inst #10495 = VFMSUB213PSZ256rkz |
| 36662 | { 10494, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d568004829ULL }, // Inst #10494 = VFMSUB213PSZ256rk |
| 36663 | { 10493, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d568004829ULL }, // Inst #10493 = VFMSUB213PSZ256r |
| 36664 | { 10492, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d568004819ULL }, // Inst #10492 = VFMSUB213PSZ256mkz |
| 36665 | { 10491, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d568004819ULL }, // Inst #10491 = VFMSUB213PSZ256mk |
| 36666 | { 10490, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d568004819ULL }, // Inst #10490 = VFMSUB213PSZ256mbkz |
| 36667 | { 10489, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d568004819ULL }, // Inst #10489 = VFMSUB213PSZ256mbk |
| 36668 | { 10488, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d568004819ULL }, // Inst #10488 = VFMSUB213PSZ256mb |
| 36669 | { 10487, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d568004819ULL }, // Inst #10487 = VFMSUB213PSZ256m |
| 36670 | { 10486, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d568004829ULL }, // Inst #10486 = VFMSUB213PSZ128rkz |
| 36671 | { 10485, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d568004829ULL }, // Inst #10485 = VFMSUB213PSZ128rk |
| 36672 | { 10484, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d568004829ULL }, // Inst #10484 = VFMSUB213PSZ128r |
| 36673 | { 10483, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d568004819ULL }, // Inst #10483 = VFMSUB213PSZ128mkz |
| 36674 | { 10482, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d568004819ULL }, // Inst #10482 = VFMSUB213PSZ128mk |
| 36675 | { 10481, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d568004819ULL }, // Inst #10481 = VFMSUB213PSZ128mbkz |
| 36676 | { 10480, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d568004819ULL }, // Inst #10480 = VFMSUB213PSZ128mbk |
| 36677 | { 10479, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d568004819ULL }, // Inst #10479 = VFMSUB213PSZ128mb |
| 36678 | { 10478, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d568004819ULL }, // Inst #10478 = VFMSUB213PSZ128m |
| 36679 | { 10477, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d528004829ULL }, // Inst #10477 = VFMSUB213PSYr |
| 36680 | { 10476, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d528004819ULL }, // Inst #10476 = VFMSUB213PSYm |
| 36681 | { 10475, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed568014829ULL }, // Inst #10475 = VFMSUB213PHZrkz |
| 36682 | { 10474, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead568014829ULL }, // Inst #10474 = VFMSUB213PHZrk |
| 36683 | { 10473, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ed568014829ULL }, // Inst #10473 = VFMSUB213PHZrbkz |
| 36684 | { 10472, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ad568014829ULL }, // Inst #10472 = VFMSUB213PHZrbk |
| 36685 | { 10471, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158d568014829ULL }, // Inst #10471 = VFMSUB213PHZrb |
| 36686 | { 10470, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d568014829ULL }, // Inst #10470 = VFMSUB213PHZr |
| 36687 | { 10469, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed568014819ULL }, // Inst #10469 = VFMSUB213PHZmkz |
| 36688 | { 10468, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead568014819ULL }, // Inst #10468 = VFMSUB213PHZmk |
| 36689 | { 10467, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed568014819ULL }, // Inst #10467 = VFMSUB213PHZmbkz |
| 36690 | { 10466, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad568014819ULL }, // Inst #10466 = VFMSUB213PHZmbk |
| 36691 | { 10465, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d568014819ULL }, // Inst #10465 = VFMSUB213PHZmb |
| 36692 | { 10464, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d568014819ULL }, // Inst #10464 = VFMSUB213PHZm |
| 36693 | { 10463, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d568014829ULL }, // Inst #10463 = VFMSUB213PHZ256rkz |
| 36694 | { 10462, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d568014829ULL }, // Inst #10462 = VFMSUB213PHZ256rk |
| 36695 | { 10461, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d568014829ULL }, // Inst #10461 = VFMSUB213PHZ256r |
| 36696 | { 10460, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d568014819ULL }, // Inst #10460 = VFMSUB213PHZ256mkz |
| 36697 | { 10459, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d568014819ULL }, // Inst #10459 = VFMSUB213PHZ256mk |
| 36698 | { 10458, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d568014819ULL }, // Inst #10458 = VFMSUB213PHZ256mbkz |
| 36699 | { 10457, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d568014819ULL }, // Inst #10457 = VFMSUB213PHZ256mbk |
| 36700 | { 10456, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d568014819ULL }, // Inst #10456 = VFMSUB213PHZ256mb |
| 36701 | { 10455, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d568014819ULL }, // Inst #10455 = VFMSUB213PHZ256m |
| 36702 | { 10454, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d568014829ULL }, // Inst #10454 = VFMSUB213PHZ128rkz |
| 36703 | { 10453, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d568014829ULL }, // Inst #10453 = VFMSUB213PHZ128rk |
| 36704 | { 10452, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d568014829ULL }, // Inst #10452 = VFMSUB213PHZ128r |
| 36705 | { 10451, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d568014819ULL }, // Inst #10451 = VFMSUB213PHZ128mkz |
| 36706 | { 10450, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d568014819ULL }, // Inst #10450 = VFMSUB213PHZ128mk |
| 36707 | { 10449, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d568014819ULL }, // Inst #10449 = VFMSUB213PHZ128mbkz |
| 36708 | { 10448, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d568014819ULL }, // Inst #10448 = VFMSUB213PHZ128mbk |
| 36709 | { 10447, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d568014819ULL }, // Inst #10447 = VFMSUB213PHZ128mb |
| 36710 | { 10446, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d568014819ULL }, // Inst #10446 = VFMSUB213PHZ128m |
| 36711 | { 10445, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd530024829ULL }, // Inst #10445 = VFMSUB213PDr |
| 36712 | { 10444, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd530024819ULL }, // Inst #10444 = VFMSUB213PDm |
| 36713 | { 10443, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed570024829ULL }, // Inst #10443 = VFMSUB213PDZrkz |
| 36714 | { 10442, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead570024829ULL }, // Inst #10442 = VFMSUB213PDZrk |
| 36715 | { 10441, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ed570024829ULL }, // Inst #10441 = VFMSUB213PDZrbkz |
| 36716 | { 10440, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ad570024829ULL }, // Inst #10440 = VFMSUB213PDZrbk |
| 36717 | { 10439, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198d570024829ULL }, // Inst #10439 = VFMSUB213PDZrb |
| 36718 | { 10438, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d570024829ULL }, // Inst #10438 = VFMSUB213PDZr |
| 36719 | { 10437, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed570024819ULL }, // Inst #10437 = VFMSUB213PDZmkz |
| 36720 | { 10436, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead570024819ULL }, // Inst #10436 = VFMSUB213PDZmk |
| 36721 | { 10435, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed570024819ULL }, // Inst #10435 = VFMSUB213PDZmbkz |
| 36722 | { 10434, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad570024819ULL }, // Inst #10434 = VFMSUB213PDZmbk |
| 36723 | { 10433, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d570024819ULL }, // Inst #10433 = VFMSUB213PDZmb |
| 36724 | { 10432, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d570024819ULL }, // Inst #10432 = VFMSUB213PDZm |
| 36725 | { 10431, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d570024829ULL }, // Inst #10431 = VFMSUB213PDZ256rkz |
| 36726 | { 10430, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d570024829ULL }, // Inst #10430 = VFMSUB213PDZ256rk |
| 36727 | { 10429, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d570024829ULL }, // Inst #10429 = VFMSUB213PDZ256r |
| 36728 | { 10428, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d570024819ULL }, // Inst #10428 = VFMSUB213PDZ256mkz |
| 36729 | { 10427, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d570024819ULL }, // Inst #10427 = VFMSUB213PDZ256mk |
| 36730 | { 10426, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d570024819ULL }, // Inst #10426 = VFMSUB213PDZ256mbkz |
| 36731 | { 10425, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d570024819ULL }, // Inst #10425 = VFMSUB213PDZ256mbk |
| 36732 | { 10424, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d570024819ULL }, // Inst #10424 = VFMSUB213PDZ256mb |
| 36733 | { 10423, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d570024819ULL }, // Inst #10423 = VFMSUB213PDZ256m |
| 36734 | { 10422, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d570024829ULL }, // Inst #10422 = VFMSUB213PDZ128rkz |
| 36735 | { 10421, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d570024829ULL }, // Inst #10421 = VFMSUB213PDZ128rk |
| 36736 | { 10420, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d570024829ULL }, // Inst #10420 = VFMSUB213PDZ128r |
| 36737 | { 10419, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d570024819ULL }, // Inst #10419 = VFMSUB213PDZ128mkz |
| 36738 | { 10418, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d570024819ULL }, // Inst #10418 = VFMSUB213PDZ128mk |
| 36739 | { 10417, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d570024819ULL }, // Inst #10417 = VFMSUB213PDZ128mbkz |
| 36740 | { 10416, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d570024819ULL }, // Inst #10416 = VFMSUB213PDZ128mbk |
| 36741 | { 10415, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d570024819ULL }, // Inst #10415 = VFMSUB213PDZ128mb |
| 36742 | { 10414, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d570024819ULL }, // Inst #10414 = VFMSUB213PDZ128m |
| 36743 | { 10413, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d530024829ULL }, // Inst #10413 = VFMSUB213PDYr |
| 36744 | { 10412, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d530024819ULL }, // Inst #10412 = VFMSUB213PDYm |
| 36745 | { 10411, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeed568014029ULL }, // Inst #10411 = VFMSUB213BF16Zrkz |
| 36746 | { 10410, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xead568014029ULL }, // Inst #10410 = VFMSUB213BF16Zrk |
| 36747 | { 10409, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8d568014029ULL }, // Inst #10409 = VFMSUB213BF16Zr |
| 36748 | { 10408, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeed568014019ULL }, // Inst #10408 = VFMSUB213BF16Zmkz |
| 36749 | { 10407, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xead568014019ULL }, // Inst #10407 = VFMSUB213BF16Zmk |
| 36750 | { 10406, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5ed568014019ULL }, // Inst #10406 = VFMSUB213BF16Zmbkz |
| 36751 | { 10405, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5ad568014019ULL }, // Inst #10405 = VFMSUB213BF16Zmbk |
| 36752 | { 10404, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58d568014019ULL }, // Inst #10404 = VFMSUB213BF16Zmb |
| 36753 | { 10403, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8d568014019ULL }, // Inst #10403 = VFMSUB213BF16Zm |
| 36754 | { 10402, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7d568014029ULL }, // Inst #10402 = VFMSUB213BF16Z256rkz |
| 36755 | { 10401, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3d568014029ULL }, // Inst #10401 = VFMSUB213BF16Z256rk |
| 36756 | { 10400, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1d568014029ULL }, // Inst #10400 = VFMSUB213BF16Z256r |
| 36757 | { 10399, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7d568014019ULL }, // Inst #10399 = VFMSUB213BF16Z256mkz |
| 36758 | { 10398, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3d568014019ULL }, // Inst #10398 = VFMSUB213BF16Z256mk |
| 36759 | { 10397, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57d568014019ULL }, // Inst #10397 = VFMSUB213BF16Z256mbkz |
| 36760 | { 10396, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53d568014019ULL }, // Inst #10396 = VFMSUB213BF16Z256mbk |
| 36761 | { 10395, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51d568014019ULL }, // Inst #10395 = VFMSUB213BF16Z256mb |
| 36762 | { 10394, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1d568014019ULL }, // Inst #10394 = VFMSUB213BF16Z256m |
| 36763 | { 10393, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6d568014029ULL }, // Inst #10393 = VFMSUB213BF16Z128rkz |
| 36764 | { 10392, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2d568014029ULL }, // Inst #10392 = VFMSUB213BF16Z128rk |
| 36765 | { 10391, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0d568014029ULL }, // Inst #10391 = VFMSUB213BF16Z128r |
| 36766 | { 10390, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6d568014019ULL }, // Inst #10390 = VFMSUB213BF16Z128mkz |
| 36767 | { 10389, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2d568014019ULL }, // Inst #10389 = VFMSUB213BF16Z128mk |
| 36768 | { 10388, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56d568014019ULL }, // Inst #10388 = VFMSUB213BF16Z128mbkz |
| 36769 | { 10387, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52d568014019ULL }, // Inst #10387 = VFMSUB213BF16Z128mbk |
| 36770 | { 10386, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50d568014019ULL }, // Inst #10386 = VFMSUB213BF16Z128mb |
| 36771 | { 10385, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0d568014019ULL }, // Inst #10385 = VFMSUB213BF16Z128m |
| 36772 | { 10384, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcda8004829ULL }, // Inst #10384 = VFMSUB132SSr_Int |
| 36773 | { 10383, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcda8004829ULL }, // Inst #10383 = VFMSUB132SSr |
| 36774 | { 10382, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcda8004819ULL }, // Inst #10382 = VFMSUB132SSm_Int |
| 36775 | { 10381, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcda8004819ULL }, // Inst #10381 = VFMSUB132SSm |
| 36776 | { 10380, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cde8004829ULL }, // Inst #10380 = VFMSUB132SSZrkz_Int |
| 36777 | { 10379, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cde8004829ULL }, // Inst #10379 = VFMSUB132SSZrk_Int |
| 36778 | { 10378, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176cde8004829ULL }, // Inst #10378 = VFMSUB132SSZrbkz_Int |
| 36779 | { 10377, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172cde8004829ULL }, // Inst #10377 = VFMSUB132SSZrbk_Int |
| 36780 | { 10376, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170cde8004829ULL }, // Inst #10376 = VFMSUB132SSZrb_Int |
| 36781 | { 10375, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170cde8004829ULL }, // Inst #10375 = VFMSUB132SSZrb |
| 36782 | { 10374, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cde8004829ULL }, // Inst #10374 = VFMSUB132SSZr_Int |
| 36783 | { 10373, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cde8004829ULL }, // Inst #10373 = VFMSUB132SSZr |
| 36784 | { 10372, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cde8004819ULL }, // Inst #10372 = VFMSUB132SSZmkz_Int |
| 36785 | { 10371, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cde8004819ULL }, // Inst #10371 = VFMSUB132SSZmk_Int |
| 36786 | { 10370, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cde8004819ULL }, // Inst #10370 = VFMSUB132SSZm_Int |
| 36787 | { 10369, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cde8004819ULL }, // Inst #10369 = VFMSUB132SSZm |
| 36788 | { 10368, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cde8014829ULL }, // Inst #10368 = VFMSUB132SHZrkz_Int |
| 36789 | { 10367, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cde8014829ULL }, // Inst #10367 = VFMSUB132SHZrk_Int |
| 36790 | { 10366, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156cde8014829ULL }, // Inst #10366 = VFMSUB132SHZrbkz_Int |
| 36791 | { 10365, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152cde8014829ULL }, // Inst #10365 = VFMSUB132SHZrbk_Int |
| 36792 | { 10364, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150cde8014829ULL }, // Inst #10364 = VFMSUB132SHZrb_Int |
| 36793 | { 10363, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150cde8014829ULL }, // Inst #10363 = VFMSUB132SHZrb |
| 36794 | { 10362, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cde8014829ULL }, // Inst #10362 = VFMSUB132SHZr_Int |
| 36795 | { 10361, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cde8014829ULL }, // Inst #10361 = VFMSUB132SHZr |
| 36796 | { 10360, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cde8014819ULL }, // Inst #10360 = VFMSUB132SHZmkz_Int |
| 36797 | { 10359, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cde8014819ULL }, // Inst #10359 = VFMSUB132SHZmk_Int |
| 36798 | { 10358, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cde8014819ULL }, // Inst #10358 = VFMSUB132SHZm_Int |
| 36799 | { 10357, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cde8014819ULL }, // Inst #10357 = VFMSUB132SHZm |
| 36800 | { 10356, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcdb0024829ULL }, // Inst #10356 = VFMSUB132SDr_Int |
| 36801 | { 10355, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcdb0024829ULL }, // Inst #10355 = VFMSUB132SDr |
| 36802 | { 10354, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcdb0024819ULL }, // Inst #10354 = VFMSUB132SDm_Int |
| 36803 | { 10353, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcdb0024819ULL }, // Inst #10353 = VFMSUB132SDm |
| 36804 | { 10352, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cdf0024829ULL }, // Inst #10352 = VFMSUB132SDZrkz_Int |
| 36805 | { 10351, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cdf0024829ULL }, // Inst #10351 = VFMSUB132SDZrk_Int |
| 36806 | { 10350, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196cdf0024829ULL }, // Inst #10350 = VFMSUB132SDZrbkz_Int |
| 36807 | { 10349, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192cdf0024829ULL }, // Inst #10349 = VFMSUB132SDZrbk_Int |
| 36808 | { 10348, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190cdf0024829ULL }, // Inst #10348 = VFMSUB132SDZrb_Int |
| 36809 | { 10347, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190cdf0024829ULL }, // Inst #10347 = VFMSUB132SDZrb |
| 36810 | { 10346, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cdf0024829ULL }, // Inst #10346 = VFMSUB132SDZr_Int |
| 36811 | { 10345, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cdf0024829ULL }, // Inst #10345 = VFMSUB132SDZr |
| 36812 | { 10344, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cdf0024819ULL }, // Inst #10344 = VFMSUB132SDZmkz_Int |
| 36813 | { 10343, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cdf0024819ULL }, // Inst #10343 = VFMSUB132SDZmk_Int |
| 36814 | { 10342, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cdf0024819ULL }, // Inst #10342 = VFMSUB132SDZm_Int |
| 36815 | { 10341, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cdf0024819ULL }, // Inst #10341 = VFMSUB132SDZm |
| 36816 | { 10340, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcd28004829ULL }, // Inst #10340 = VFMSUB132PSr |
| 36817 | { 10339, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcd28004819ULL }, // Inst #10339 = VFMSUB132PSm |
| 36818 | { 10338, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd68004829ULL }, // Inst #10338 = VFMSUB132PSZrkz |
| 36819 | { 10337, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacd68004829ULL }, // Inst #10337 = VFMSUB132PSZrk |
| 36820 | { 10336, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ecd68004829ULL }, // Inst #10336 = VFMSUB132PSZrbkz |
| 36821 | { 10335, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17acd68004829ULL }, // Inst #10335 = VFMSUB132PSZrbk |
| 36822 | { 10334, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178cd68004829ULL }, // Inst #10334 = VFMSUB132PSZrb |
| 36823 | { 10333, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd68004829ULL }, // Inst #10333 = VFMSUB132PSZr |
| 36824 | { 10332, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd68004819ULL }, // Inst #10332 = VFMSUB132PSZmkz |
| 36825 | { 10331, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacd68004819ULL }, // Inst #10331 = VFMSUB132PSZmk |
| 36826 | { 10330, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ecd68004819ULL }, // Inst #10330 = VFMSUB132PSZmbkz |
| 36827 | { 10329, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7acd68004819ULL }, // Inst #10329 = VFMSUB132PSZmbk |
| 36828 | { 10328, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78cd68004819ULL }, // Inst #10328 = VFMSUB132PSZmb |
| 36829 | { 10327, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd68004819ULL }, // Inst #10327 = VFMSUB132PSZm |
| 36830 | { 10326, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd68004829ULL }, // Inst #10326 = VFMSUB132PSZ256rkz |
| 36831 | { 10325, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cd68004829ULL }, // Inst #10325 = VFMSUB132PSZ256rk |
| 36832 | { 10324, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd68004829ULL }, // Inst #10324 = VFMSUB132PSZ256r |
| 36833 | { 10323, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd68004819ULL }, // Inst #10323 = VFMSUB132PSZ256mkz |
| 36834 | { 10322, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cd68004819ULL }, // Inst #10322 = VFMSUB132PSZ256mk |
| 36835 | { 10321, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77cd68004819ULL }, // Inst #10321 = VFMSUB132PSZ256mbkz |
| 36836 | { 10320, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73cd68004819ULL }, // Inst #10320 = VFMSUB132PSZ256mbk |
| 36837 | { 10319, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71cd68004819ULL }, // Inst #10319 = VFMSUB132PSZ256mb |
| 36838 | { 10318, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd68004819ULL }, // Inst #10318 = VFMSUB132PSZ256m |
| 36839 | { 10317, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd68004829ULL }, // Inst #10317 = VFMSUB132PSZ128rkz |
| 36840 | { 10316, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cd68004829ULL }, // Inst #10316 = VFMSUB132PSZ128rk |
| 36841 | { 10315, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd68004829ULL }, // Inst #10315 = VFMSUB132PSZ128r |
| 36842 | { 10314, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd68004819ULL }, // Inst #10314 = VFMSUB132PSZ128mkz |
| 36843 | { 10313, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cd68004819ULL }, // Inst #10313 = VFMSUB132PSZ128mk |
| 36844 | { 10312, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76cd68004819ULL }, // Inst #10312 = VFMSUB132PSZ128mbkz |
| 36845 | { 10311, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72cd68004819ULL }, // Inst #10311 = VFMSUB132PSZ128mbk |
| 36846 | { 10310, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70cd68004819ULL }, // Inst #10310 = VFMSUB132PSZ128mb |
| 36847 | { 10309, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd68004819ULL }, // Inst #10309 = VFMSUB132PSZ128m |
| 36848 | { 10308, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cd28004829ULL }, // Inst #10308 = VFMSUB132PSYr |
| 36849 | { 10307, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cd28004819ULL }, // Inst #10307 = VFMSUB132PSYm |
| 36850 | { 10306, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd68014829ULL }, // Inst #10306 = VFMSUB132PHZrkz |
| 36851 | { 10305, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacd68014829ULL }, // Inst #10305 = VFMSUB132PHZrk |
| 36852 | { 10304, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ecd68014829ULL }, // Inst #10304 = VFMSUB132PHZrbkz |
| 36853 | { 10303, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15acd68014829ULL }, // Inst #10303 = VFMSUB132PHZrbk |
| 36854 | { 10302, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158cd68014829ULL }, // Inst #10302 = VFMSUB132PHZrb |
| 36855 | { 10301, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd68014829ULL }, // Inst #10301 = VFMSUB132PHZr |
| 36856 | { 10300, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd68014819ULL }, // Inst #10300 = VFMSUB132PHZmkz |
| 36857 | { 10299, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacd68014819ULL }, // Inst #10299 = VFMSUB132PHZmk |
| 36858 | { 10298, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ecd68014819ULL }, // Inst #10298 = VFMSUB132PHZmbkz |
| 36859 | { 10297, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5acd68014819ULL }, // Inst #10297 = VFMSUB132PHZmbk |
| 36860 | { 10296, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58cd68014819ULL }, // Inst #10296 = VFMSUB132PHZmb |
| 36861 | { 10295, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd68014819ULL }, // Inst #10295 = VFMSUB132PHZm |
| 36862 | { 10294, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd68014829ULL }, // Inst #10294 = VFMSUB132PHZ256rkz |
| 36863 | { 10293, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cd68014829ULL }, // Inst #10293 = VFMSUB132PHZ256rk |
| 36864 | { 10292, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd68014829ULL }, // Inst #10292 = VFMSUB132PHZ256r |
| 36865 | { 10291, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd68014819ULL }, // Inst #10291 = VFMSUB132PHZ256mkz |
| 36866 | { 10290, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cd68014819ULL }, // Inst #10290 = VFMSUB132PHZ256mk |
| 36867 | { 10289, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57cd68014819ULL }, // Inst #10289 = VFMSUB132PHZ256mbkz |
| 36868 | { 10288, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53cd68014819ULL }, // Inst #10288 = VFMSUB132PHZ256mbk |
| 36869 | { 10287, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51cd68014819ULL }, // Inst #10287 = VFMSUB132PHZ256mb |
| 36870 | { 10286, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd68014819ULL }, // Inst #10286 = VFMSUB132PHZ256m |
| 36871 | { 10285, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd68014829ULL }, // Inst #10285 = VFMSUB132PHZ128rkz |
| 36872 | { 10284, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cd68014829ULL }, // Inst #10284 = VFMSUB132PHZ128rk |
| 36873 | { 10283, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd68014829ULL }, // Inst #10283 = VFMSUB132PHZ128r |
| 36874 | { 10282, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd68014819ULL }, // Inst #10282 = VFMSUB132PHZ128mkz |
| 36875 | { 10281, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cd68014819ULL }, // Inst #10281 = VFMSUB132PHZ128mk |
| 36876 | { 10280, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56cd68014819ULL }, // Inst #10280 = VFMSUB132PHZ128mbkz |
| 36877 | { 10279, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52cd68014819ULL }, // Inst #10279 = VFMSUB132PHZ128mbk |
| 36878 | { 10278, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50cd68014819ULL }, // Inst #10278 = VFMSUB132PHZ128mb |
| 36879 | { 10277, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd68014819ULL }, // Inst #10277 = VFMSUB132PHZ128m |
| 36880 | { 10276, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcd30024829ULL }, // Inst #10276 = VFMSUB132PDr |
| 36881 | { 10275, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcd30024819ULL }, // Inst #10275 = VFMSUB132PDm |
| 36882 | { 10274, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd70024829ULL }, // Inst #10274 = VFMSUB132PDZrkz |
| 36883 | { 10273, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacd70024829ULL }, // Inst #10273 = VFMSUB132PDZrk |
| 36884 | { 10272, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ecd70024829ULL }, // Inst #10272 = VFMSUB132PDZrbkz |
| 36885 | { 10271, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19acd70024829ULL }, // Inst #10271 = VFMSUB132PDZrbk |
| 36886 | { 10270, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198cd70024829ULL }, // Inst #10270 = VFMSUB132PDZrb |
| 36887 | { 10269, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd70024829ULL }, // Inst #10269 = VFMSUB132PDZr |
| 36888 | { 10268, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd70024819ULL }, // Inst #10268 = VFMSUB132PDZmkz |
| 36889 | { 10267, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacd70024819ULL }, // Inst #10267 = VFMSUB132PDZmk |
| 36890 | { 10266, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ecd70024819ULL }, // Inst #10266 = VFMSUB132PDZmbkz |
| 36891 | { 10265, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9acd70024819ULL }, // Inst #10265 = VFMSUB132PDZmbk |
| 36892 | { 10264, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98cd70024819ULL }, // Inst #10264 = VFMSUB132PDZmb |
| 36893 | { 10263, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd70024819ULL }, // Inst #10263 = VFMSUB132PDZm |
| 36894 | { 10262, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd70024829ULL }, // Inst #10262 = VFMSUB132PDZ256rkz |
| 36895 | { 10261, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cd70024829ULL }, // Inst #10261 = VFMSUB132PDZ256rk |
| 36896 | { 10260, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd70024829ULL }, // Inst #10260 = VFMSUB132PDZ256r |
| 36897 | { 10259, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd70024819ULL }, // Inst #10259 = VFMSUB132PDZ256mkz |
| 36898 | { 10258, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cd70024819ULL }, // Inst #10258 = VFMSUB132PDZ256mk |
| 36899 | { 10257, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97cd70024819ULL }, // Inst #10257 = VFMSUB132PDZ256mbkz |
| 36900 | { 10256, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93cd70024819ULL }, // Inst #10256 = VFMSUB132PDZ256mbk |
| 36901 | { 10255, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91cd70024819ULL }, // Inst #10255 = VFMSUB132PDZ256mb |
| 36902 | { 10254, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd70024819ULL }, // Inst #10254 = VFMSUB132PDZ256m |
| 36903 | { 10253, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd70024829ULL }, // Inst #10253 = VFMSUB132PDZ128rkz |
| 36904 | { 10252, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cd70024829ULL }, // Inst #10252 = VFMSUB132PDZ128rk |
| 36905 | { 10251, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd70024829ULL }, // Inst #10251 = VFMSUB132PDZ128r |
| 36906 | { 10250, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd70024819ULL }, // Inst #10250 = VFMSUB132PDZ128mkz |
| 36907 | { 10249, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cd70024819ULL }, // Inst #10249 = VFMSUB132PDZ128mk |
| 36908 | { 10248, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96cd70024819ULL }, // Inst #10248 = VFMSUB132PDZ128mbkz |
| 36909 | { 10247, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92cd70024819ULL }, // Inst #10247 = VFMSUB132PDZ128mbk |
| 36910 | { 10246, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90cd70024819ULL }, // Inst #10246 = VFMSUB132PDZ128mb |
| 36911 | { 10245, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd70024819ULL }, // Inst #10245 = VFMSUB132PDZ128m |
| 36912 | { 10244, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cd30024829ULL }, // Inst #10244 = VFMSUB132PDYr |
| 36913 | { 10243, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cd30024819ULL }, // Inst #10243 = VFMSUB132PDYm |
| 36914 | { 10242, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeecd68014029ULL }, // Inst #10242 = VFMSUB132BF16Zrkz |
| 36915 | { 10241, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeacd68014029ULL }, // Inst #10241 = VFMSUB132BF16Zrk |
| 36916 | { 10240, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8cd68014029ULL }, // Inst #10240 = VFMSUB132BF16Zr |
| 36917 | { 10239, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeecd68014019ULL }, // Inst #10239 = VFMSUB132BF16Zmkz |
| 36918 | { 10238, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeacd68014019ULL }, // Inst #10238 = VFMSUB132BF16Zmk |
| 36919 | { 10237, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5ecd68014019ULL }, // Inst #10237 = VFMSUB132BF16Zmbkz |
| 36920 | { 10236, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5acd68014019ULL }, // Inst #10236 = VFMSUB132BF16Zmbk |
| 36921 | { 10235, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58cd68014019ULL }, // Inst #10235 = VFMSUB132BF16Zmb |
| 36922 | { 10234, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8cd68014019ULL }, // Inst #10234 = VFMSUB132BF16Zm |
| 36923 | { 10233, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7cd68014029ULL }, // Inst #10233 = VFMSUB132BF16Z256rkz |
| 36924 | { 10232, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3cd68014029ULL }, // Inst #10232 = VFMSUB132BF16Z256rk |
| 36925 | { 10231, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1cd68014029ULL }, // Inst #10231 = VFMSUB132BF16Z256r |
| 36926 | { 10230, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7cd68014019ULL }, // Inst #10230 = VFMSUB132BF16Z256mkz |
| 36927 | { 10229, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3cd68014019ULL }, // Inst #10229 = VFMSUB132BF16Z256mk |
| 36928 | { 10228, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57cd68014019ULL }, // Inst #10228 = VFMSUB132BF16Z256mbkz |
| 36929 | { 10227, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53cd68014019ULL }, // Inst #10227 = VFMSUB132BF16Z256mbk |
| 36930 | { 10226, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51cd68014019ULL }, // Inst #10226 = VFMSUB132BF16Z256mb |
| 36931 | { 10225, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1cd68014019ULL }, // Inst #10225 = VFMSUB132BF16Z256m |
| 36932 | { 10224, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6cd68014029ULL }, // Inst #10224 = VFMSUB132BF16Z128rkz |
| 36933 | { 10223, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2cd68014029ULL }, // Inst #10223 = VFMSUB132BF16Z128rk |
| 36934 | { 10222, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0cd68014029ULL }, // Inst #10222 = VFMSUB132BF16Z128r |
| 36935 | { 10221, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6cd68014019ULL }, // Inst #10221 = VFMSUB132BF16Z128mkz |
| 36936 | { 10220, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2cd68014019ULL }, // Inst #10220 = VFMSUB132BF16Z128mk |
| 36937 | { 10219, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56cd68014019ULL }, // Inst #10219 = VFMSUB132BF16Z128mbkz |
| 36938 | { 10218, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52cd68014019ULL }, // Inst #10218 = VFMSUB132BF16Z128mbk |
| 36939 | { 10217, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50cd68014019ULL }, // Inst #10217 = VFMSUB132BF16Z128mb |
| 36940 | { 10216, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0cd68014019ULL }, // Inst #10216 = VFMSUB132BF16Z128m |
| 36941 | { 10215, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae280c6829ULL }, // Inst #10215 = VFMADDSUBPS4rr_REV |
| 36942 | { 10214, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xae280e682bULL }, // Inst #10214 = VFMADDSUBPS4rr |
| 36943 | { 10213, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae280e681bULL }, // Inst #10213 = VFMADDSUBPS4rm |
| 36944 | { 10212, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae280c6819ULL }, // Inst #10212 = VFMADDSUBPS4mr |
| 36945 | { 10211, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1ae280c6829ULL }, // Inst #10211 = VFMADDSUBPS4Yrr_REV |
| 36946 | { 10210, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ae280e682bULL }, // Inst #10210 = VFMADDSUBPS4Yrr |
| 36947 | { 10209, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ae280e681bULL }, // Inst #10209 = VFMADDSUBPS4Yrm |
| 36948 | { 10208, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ae280c6819ULL }, // Inst #10208 = VFMADDSUBPS4Ymr |
| 36949 | { 10207, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaeb00c6829ULL }, // Inst #10207 = VFMADDSUBPD4rr_REV |
| 36950 | { 10206, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaeb00e682bULL }, // Inst #10206 = VFMADDSUBPD4rr |
| 36951 | { 10205, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb00e681bULL }, // Inst #10205 = VFMADDSUBPD4rm |
| 36952 | { 10204, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb00c6819ULL }, // Inst #10204 = VFMADDSUBPD4mr |
| 36953 | { 10203, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1aeb00c6829ULL }, // Inst #10203 = VFMADDSUBPD4Yrr_REV |
| 36954 | { 10202, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1aeb00e682bULL }, // Inst #10202 = VFMADDSUBPD4Yrr |
| 36955 | { 10201, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aeb00e681bULL }, // Inst #10201 = VFMADDSUBPD4Yrm |
| 36956 | { 10200, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aeb00c6819ULL }, // Inst #10200 = VFMADDSUBPD4Ymr |
| 36957 | { 10199, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdb28004829ULL }, // Inst #10199 = VFMADDSUB231PSr |
| 36958 | { 10198, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdb28004819ULL }, // Inst #10198 = VFMADDSUB231PSm |
| 36959 | { 10197, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb68004829ULL }, // Inst #10197 = VFMADDSUB231PSZrkz |
| 36960 | { 10196, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadb68004829ULL }, // Inst #10196 = VFMADDSUB231PSZrk |
| 36961 | { 10195, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17edb68004829ULL }, // Inst #10195 = VFMADDSUB231PSZrbkz |
| 36962 | { 10194, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17adb68004829ULL }, // Inst #10194 = VFMADDSUB231PSZrbk |
| 36963 | { 10193, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178db68004829ULL }, // Inst #10193 = VFMADDSUB231PSZrb |
| 36964 | { 10192, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db68004829ULL }, // Inst #10192 = VFMADDSUB231PSZr |
| 36965 | { 10191, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb68004819ULL }, // Inst #10191 = VFMADDSUB231PSZmkz |
| 36966 | { 10190, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadb68004819ULL }, // Inst #10190 = VFMADDSUB231PSZmk |
| 36967 | { 10189, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7edb68004819ULL }, // Inst #10189 = VFMADDSUB231PSZmbkz |
| 36968 | { 10188, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7adb68004819ULL }, // Inst #10188 = VFMADDSUB231PSZmbk |
| 36969 | { 10187, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78db68004819ULL }, // Inst #10187 = VFMADDSUB231PSZmb |
| 36970 | { 10186, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db68004819ULL }, // Inst #10186 = VFMADDSUB231PSZm |
| 36971 | { 10185, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db68004829ULL }, // Inst #10185 = VFMADDSUB231PSZ256rkz |
| 36972 | { 10184, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3db68004829ULL }, // Inst #10184 = VFMADDSUB231PSZ256rk |
| 36973 | { 10183, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db68004829ULL }, // Inst #10183 = VFMADDSUB231PSZ256r |
| 36974 | { 10182, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db68004819ULL }, // Inst #10182 = VFMADDSUB231PSZ256mkz |
| 36975 | { 10181, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3db68004819ULL }, // Inst #10181 = VFMADDSUB231PSZ256mk |
| 36976 | { 10180, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77db68004819ULL }, // Inst #10180 = VFMADDSUB231PSZ256mbkz |
| 36977 | { 10179, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73db68004819ULL }, // Inst #10179 = VFMADDSUB231PSZ256mbk |
| 36978 | { 10178, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71db68004819ULL }, // Inst #10178 = VFMADDSUB231PSZ256mb |
| 36979 | { 10177, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db68004819ULL }, // Inst #10177 = VFMADDSUB231PSZ256m |
| 36980 | { 10176, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db68004829ULL }, // Inst #10176 = VFMADDSUB231PSZ128rkz |
| 36981 | { 10175, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2db68004829ULL }, // Inst #10175 = VFMADDSUB231PSZ128rk |
| 36982 | { 10174, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db68004829ULL }, // Inst #10174 = VFMADDSUB231PSZ128r |
| 36983 | { 10173, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db68004819ULL }, // Inst #10173 = VFMADDSUB231PSZ128mkz |
| 36984 | { 10172, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2db68004819ULL }, // Inst #10172 = VFMADDSUB231PSZ128mk |
| 36985 | { 10171, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76db68004819ULL }, // Inst #10171 = VFMADDSUB231PSZ128mbkz |
| 36986 | { 10170, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72db68004819ULL }, // Inst #10170 = VFMADDSUB231PSZ128mbk |
| 36987 | { 10169, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70db68004819ULL }, // Inst #10169 = VFMADDSUB231PSZ128mb |
| 36988 | { 10168, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db68004819ULL }, // Inst #10168 = VFMADDSUB231PSZ128m |
| 36989 | { 10167, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1db28004829ULL }, // Inst #10167 = VFMADDSUB231PSYr |
| 36990 | { 10166, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1db28004819ULL }, // Inst #10166 = VFMADDSUB231PSYm |
| 36991 | { 10165, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb68014829ULL }, // Inst #10165 = VFMADDSUB231PHZrkz |
| 36992 | { 10164, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadb68014829ULL }, // Inst #10164 = VFMADDSUB231PHZrk |
| 36993 | { 10163, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15edb68014829ULL }, // Inst #10163 = VFMADDSUB231PHZrbkz |
| 36994 | { 10162, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15adb68014829ULL }, // Inst #10162 = VFMADDSUB231PHZrbk |
| 36995 | { 10161, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158db68014829ULL }, // Inst #10161 = VFMADDSUB231PHZrb |
| 36996 | { 10160, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db68014829ULL }, // Inst #10160 = VFMADDSUB231PHZr |
| 36997 | { 10159, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb68014819ULL }, // Inst #10159 = VFMADDSUB231PHZmkz |
| 36998 | { 10158, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadb68014819ULL }, // Inst #10158 = VFMADDSUB231PHZmk |
| 36999 | { 10157, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5edb68014819ULL }, // Inst #10157 = VFMADDSUB231PHZmbkz |
| 37000 | { 10156, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5adb68014819ULL }, // Inst #10156 = VFMADDSUB231PHZmbk |
| 37001 | { 10155, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58db68014819ULL }, // Inst #10155 = VFMADDSUB231PHZmb |
| 37002 | { 10154, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db68014819ULL }, // Inst #10154 = VFMADDSUB231PHZm |
| 37003 | { 10153, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db68014829ULL }, // Inst #10153 = VFMADDSUB231PHZ256rkz |
| 37004 | { 10152, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3db68014829ULL }, // Inst #10152 = VFMADDSUB231PHZ256rk |
| 37005 | { 10151, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db68014829ULL }, // Inst #10151 = VFMADDSUB231PHZ256r |
| 37006 | { 10150, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db68014819ULL }, // Inst #10150 = VFMADDSUB231PHZ256mkz |
| 37007 | { 10149, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3db68014819ULL }, // Inst #10149 = VFMADDSUB231PHZ256mk |
| 37008 | { 10148, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57db68014819ULL }, // Inst #10148 = VFMADDSUB231PHZ256mbkz |
| 37009 | { 10147, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53db68014819ULL }, // Inst #10147 = VFMADDSUB231PHZ256mbk |
| 37010 | { 10146, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51db68014819ULL }, // Inst #10146 = VFMADDSUB231PHZ256mb |
| 37011 | { 10145, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db68014819ULL }, // Inst #10145 = VFMADDSUB231PHZ256m |
| 37012 | { 10144, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db68014829ULL }, // Inst #10144 = VFMADDSUB231PHZ128rkz |
| 37013 | { 10143, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2db68014829ULL }, // Inst #10143 = VFMADDSUB231PHZ128rk |
| 37014 | { 10142, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db68014829ULL }, // Inst #10142 = VFMADDSUB231PHZ128r |
| 37015 | { 10141, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db68014819ULL }, // Inst #10141 = VFMADDSUB231PHZ128mkz |
| 37016 | { 10140, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2db68014819ULL }, // Inst #10140 = VFMADDSUB231PHZ128mk |
| 37017 | { 10139, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56db68014819ULL }, // Inst #10139 = VFMADDSUB231PHZ128mbkz |
| 37018 | { 10138, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52db68014819ULL }, // Inst #10138 = VFMADDSUB231PHZ128mbk |
| 37019 | { 10137, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50db68014819ULL }, // Inst #10137 = VFMADDSUB231PHZ128mb |
| 37020 | { 10136, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db68014819ULL }, // Inst #10136 = VFMADDSUB231PHZ128m |
| 37021 | { 10135, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdb30024829ULL }, // Inst #10135 = VFMADDSUB231PDr |
| 37022 | { 10134, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdb30024819ULL }, // Inst #10134 = VFMADDSUB231PDm |
| 37023 | { 10133, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb70024829ULL }, // Inst #10133 = VFMADDSUB231PDZrkz |
| 37024 | { 10132, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadb70024829ULL }, // Inst #10132 = VFMADDSUB231PDZrk |
| 37025 | { 10131, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19edb70024829ULL }, // Inst #10131 = VFMADDSUB231PDZrbkz |
| 37026 | { 10130, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19adb70024829ULL }, // Inst #10130 = VFMADDSUB231PDZrbk |
| 37027 | { 10129, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198db70024829ULL }, // Inst #10129 = VFMADDSUB231PDZrb |
| 37028 | { 10128, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db70024829ULL }, // Inst #10128 = VFMADDSUB231PDZr |
| 37029 | { 10127, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb70024819ULL }, // Inst #10127 = VFMADDSUB231PDZmkz |
| 37030 | { 10126, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadb70024819ULL }, // Inst #10126 = VFMADDSUB231PDZmk |
| 37031 | { 10125, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9edb70024819ULL }, // Inst #10125 = VFMADDSUB231PDZmbkz |
| 37032 | { 10124, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9adb70024819ULL }, // Inst #10124 = VFMADDSUB231PDZmbk |
| 37033 | { 10123, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98db70024819ULL }, // Inst #10123 = VFMADDSUB231PDZmb |
| 37034 | { 10122, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db70024819ULL }, // Inst #10122 = VFMADDSUB231PDZm |
| 37035 | { 10121, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db70024829ULL }, // Inst #10121 = VFMADDSUB231PDZ256rkz |
| 37036 | { 10120, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3db70024829ULL }, // Inst #10120 = VFMADDSUB231PDZ256rk |
| 37037 | { 10119, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db70024829ULL }, // Inst #10119 = VFMADDSUB231PDZ256r |
| 37038 | { 10118, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db70024819ULL }, // Inst #10118 = VFMADDSUB231PDZ256mkz |
| 37039 | { 10117, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3db70024819ULL }, // Inst #10117 = VFMADDSUB231PDZ256mk |
| 37040 | { 10116, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97db70024819ULL }, // Inst #10116 = VFMADDSUB231PDZ256mbkz |
| 37041 | { 10115, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93db70024819ULL }, // Inst #10115 = VFMADDSUB231PDZ256mbk |
| 37042 | { 10114, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91db70024819ULL }, // Inst #10114 = VFMADDSUB231PDZ256mb |
| 37043 | { 10113, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db70024819ULL }, // Inst #10113 = VFMADDSUB231PDZ256m |
| 37044 | { 10112, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db70024829ULL }, // Inst #10112 = VFMADDSUB231PDZ128rkz |
| 37045 | { 10111, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2db70024829ULL }, // Inst #10111 = VFMADDSUB231PDZ128rk |
| 37046 | { 10110, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db70024829ULL }, // Inst #10110 = VFMADDSUB231PDZ128r |
| 37047 | { 10109, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db70024819ULL }, // Inst #10109 = VFMADDSUB231PDZ128mkz |
| 37048 | { 10108, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2db70024819ULL }, // Inst #10108 = VFMADDSUB231PDZ128mk |
| 37049 | { 10107, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96db70024819ULL }, // Inst #10107 = VFMADDSUB231PDZ128mbkz |
| 37050 | { 10106, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92db70024819ULL }, // Inst #10106 = VFMADDSUB231PDZ128mbk |
| 37051 | { 10105, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90db70024819ULL }, // Inst #10105 = VFMADDSUB231PDZ128mb |
| 37052 | { 10104, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db70024819ULL }, // Inst #10104 = VFMADDSUB231PDZ128m |
| 37053 | { 10103, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1db30024829ULL }, // Inst #10103 = VFMADDSUB231PDYr |
| 37054 | { 10102, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1db30024819ULL }, // Inst #10102 = VFMADDSUB231PDYm |
| 37055 | { 10101, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd328004829ULL }, // Inst #10101 = VFMADDSUB213PSr |
| 37056 | { 10100, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd328004819ULL }, // Inst #10100 = VFMADDSUB213PSm |
| 37057 | { 10099, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed368004829ULL }, // Inst #10099 = VFMADDSUB213PSZrkz |
| 37058 | { 10098, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead368004829ULL }, // Inst #10098 = VFMADDSUB213PSZrk |
| 37059 | { 10097, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ed368004829ULL }, // Inst #10097 = VFMADDSUB213PSZrbkz |
| 37060 | { 10096, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ad368004829ULL }, // Inst #10096 = VFMADDSUB213PSZrbk |
| 37061 | { 10095, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178d368004829ULL }, // Inst #10095 = VFMADDSUB213PSZrb |
| 37062 | { 10094, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d368004829ULL }, // Inst #10094 = VFMADDSUB213PSZr |
| 37063 | { 10093, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed368004819ULL }, // Inst #10093 = VFMADDSUB213PSZmkz |
| 37064 | { 10092, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead368004819ULL }, // Inst #10092 = VFMADDSUB213PSZmk |
| 37065 | { 10091, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed368004819ULL }, // Inst #10091 = VFMADDSUB213PSZmbkz |
| 37066 | { 10090, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad368004819ULL }, // Inst #10090 = VFMADDSUB213PSZmbk |
| 37067 | { 10089, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d368004819ULL }, // Inst #10089 = VFMADDSUB213PSZmb |
| 37068 | { 10088, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d368004819ULL }, // Inst #10088 = VFMADDSUB213PSZm |
| 37069 | { 10087, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d368004829ULL }, // Inst #10087 = VFMADDSUB213PSZ256rkz |
| 37070 | { 10086, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d368004829ULL }, // Inst #10086 = VFMADDSUB213PSZ256rk |
| 37071 | { 10085, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d368004829ULL }, // Inst #10085 = VFMADDSUB213PSZ256r |
| 37072 | { 10084, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d368004819ULL }, // Inst #10084 = VFMADDSUB213PSZ256mkz |
| 37073 | { 10083, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d368004819ULL }, // Inst #10083 = VFMADDSUB213PSZ256mk |
| 37074 | { 10082, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d368004819ULL }, // Inst #10082 = VFMADDSUB213PSZ256mbkz |
| 37075 | { 10081, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d368004819ULL }, // Inst #10081 = VFMADDSUB213PSZ256mbk |
| 37076 | { 10080, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d368004819ULL }, // Inst #10080 = VFMADDSUB213PSZ256mb |
| 37077 | { 10079, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d368004819ULL }, // Inst #10079 = VFMADDSUB213PSZ256m |
| 37078 | { 10078, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d368004829ULL }, // Inst #10078 = VFMADDSUB213PSZ128rkz |
| 37079 | { 10077, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d368004829ULL }, // Inst #10077 = VFMADDSUB213PSZ128rk |
| 37080 | { 10076, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d368004829ULL }, // Inst #10076 = VFMADDSUB213PSZ128r |
| 37081 | { 10075, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d368004819ULL }, // Inst #10075 = VFMADDSUB213PSZ128mkz |
| 37082 | { 10074, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d368004819ULL }, // Inst #10074 = VFMADDSUB213PSZ128mk |
| 37083 | { 10073, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d368004819ULL }, // Inst #10073 = VFMADDSUB213PSZ128mbkz |
| 37084 | { 10072, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d368004819ULL }, // Inst #10072 = VFMADDSUB213PSZ128mbk |
| 37085 | { 10071, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d368004819ULL }, // Inst #10071 = VFMADDSUB213PSZ128mb |
| 37086 | { 10070, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d368004819ULL }, // Inst #10070 = VFMADDSUB213PSZ128m |
| 37087 | { 10069, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d328004829ULL }, // Inst #10069 = VFMADDSUB213PSYr |
| 37088 | { 10068, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d328004819ULL }, // Inst #10068 = VFMADDSUB213PSYm |
| 37089 | { 10067, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed368014829ULL }, // Inst #10067 = VFMADDSUB213PHZrkz |
| 37090 | { 10066, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead368014829ULL }, // Inst #10066 = VFMADDSUB213PHZrk |
| 37091 | { 10065, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ed368014829ULL }, // Inst #10065 = VFMADDSUB213PHZrbkz |
| 37092 | { 10064, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ad368014829ULL }, // Inst #10064 = VFMADDSUB213PHZrbk |
| 37093 | { 10063, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158d368014829ULL }, // Inst #10063 = VFMADDSUB213PHZrb |
| 37094 | { 10062, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d368014829ULL }, // Inst #10062 = VFMADDSUB213PHZr |
| 37095 | { 10061, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed368014819ULL }, // Inst #10061 = VFMADDSUB213PHZmkz |
| 37096 | { 10060, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead368014819ULL }, // Inst #10060 = VFMADDSUB213PHZmk |
| 37097 | { 10059, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed368014819ULL }, // Inst #10059 = VFMADDSUB213PHZmbkz |
| 37098 | { 10058, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad368014819ULL }, // Inst #10058 = VFMADDSUB213PHZmbk |
| 37099 | { 10057, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d368014819ULL }, // Inst #10057 = VFMADDSUB213PHZmb |
| 37100 | { 10056, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d368014819ULL }, // Inst #10056 = VFMADDSUB213PHZm |
| 37101 | { 10055, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d368014829ULL }, // Inst #10055 = VFMADDSUB213PHZ256rkz |
| 37102 | { 10054, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d368014829ULL }, // Inst #10054 = VFMADDSUB213PHZ256rk |
| 37103 | { 10053, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d368014829ULL }, // Inst #10053 = VFMADDSUB213PHZ256r |
| 37104 | { 10052, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d368014819ULL }, // Inst #10052 = VFMADDSUB213PHZ256mkz |
| 37105 | { 10051, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d368014819ULL }, // Inst #10051 = VFMADDSUB213PHZ256mk |
| 37106 | { 10050, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d368014819ULL }, // Inst #10050 = VFMADDSUB213PHZ256mbkz |
| 37107 | { 10049, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d368014819ULL }, // Inst #10049 = VFMADDSUB213PHZ256mbk |
| 37108 | { 10048, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d368014819ULL }, // Inst #10048 = VFMADDSUB213PHZ256mb |
| 37109 | { 10047, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d368014819ULL }, // Inst #10047 = VFMADDSUB213PHZ256m |
| 37110 | { 10046, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d368014829ULL }, // Inst #10046 = VFMADDSUB213PHZ128rkz |
| 37111 | { 10045, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d368014829ULL }, // Inst #10045 = VFMADDSUB213PHZ128rk |
| 37112 | { 10044, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d368014829ULL }, // Inst #10044 = VFMADDSUB213PHZ128r |
| 37113 | { 10043, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d368014819ULL }, // Inst #10043 = VFMADDSUB213PHZ128mkz |
| 37114 | { 10042, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d368014819ULL }, // Inst #10042 = VFMADDSUB213PHZ128mk |
| 37115 | { 10041, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d368014819ULL }, // Inst #10041 = VFMADDSUB213PHZ128mbkz |
| 37116 | { 10040, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d368014819ULL }, // Inst #10040 = VFMADDSUB213PHZ128mbk |
| 37117 | { 10039, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d368014819ULL }, // Inst #10039 = VFMADDSUB213PHZ128mb |
| 37118 | { 10038, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d368014819ULL }, // Inst #10038 = VFMADDSUB213PHZ128m |
| 37119 | { 10037, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd330024829ULL }, // Inst #10037 = VFMADDSUB213PDr |
| 37120 | { 10036, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd330024819ULL }, // Inst #10036 = VFMADDSUB213PDm |
| 37121 | { 10035, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed370024829ULL }, // Inst #10035 = VFMADDSUB213PDZrkz |
| 37122 | { 10034, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead370024829ULL }, // Inst #10034 = VFMADDSUB213PDZrk |
| 37123 | { 10033, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ed370024829ULL }, // Inst #10033 = VFMADDSUB213PDZrbkz |
| 37124 | { 10032, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ad370024829ULL }, // Inst #10032 = VFMADDSUB213PDZrbk |
| 37125 | { 10031, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198d370024829ULL }, // Inst #10031 = VFMADDSUB213PDZrb |
| 37126 | { 10030, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d370024829ULL }, // Inst #10030 = VFMADDSUB213PDZr |
| 37127 | { 10029, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed370024819ULL }, // Inst #10029 = VFMADDSUB213PDZmkz |
| 37128 | { 10028, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead370024819ULL }, // Inst #10028 = VFMADDSUB213PDZmk |
| 37129 | { 10027, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed370024819ULL }, // Inst #10027 = VFMADDSUB213PDZmbkz |
| 37130 | { 10026, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad370024819ULL }, // Inst #10026 = VFMADDSUB213PDZmbk |
| 37131 | { 10025, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d370024819ULL }, // Inst #10025 = VFMADDSUB213PDZmb |
| 37132 | { 10024, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d370024819ULL }, // Inst #10024 = VFMADDSUB213PDZm |
| 37133 | { 10023, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d370024829ULL }, // Inst #10023 = VFMADDSUB213PDZ256rkz |
| 37134 | { 10022, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d370024829ULL }, // Inst #10022 = VFMADDSUB213PDZ256rk |
| 37135 | { 10021, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d370024829ULL }, // Inst #10021 = VFMADDSUB213PDZ256r |
| 37136 | { 10020, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d370024819ULL }, // Inst #10020 = VFMADDSUB213PDZ256mkz |
| 37137 | { 10019, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d370024819ULL }, // Inst #10019 = VFMADDSUB213PDZ256mk |
| 37138 | { 10018, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d370024819ULL }, // Inst #10018 = VFMADDSUB213PDZ256mbkz |
| 37139 | { 10017, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d370024819ULL }, // Inst #10017 = VFMADDSUB213PDZ256mbk |
| 37140 | { 10016, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d370024819ULL }, // Inst #10016 = VFMADDSUB213PDZ256mb |
| 37141 | { 10015, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d370024819ULL }, // Inst #10015 = VFMADDSUB213PDZ256m |
| 37142 | { 10014, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d370024829ULL }, // Inst #10014 = VFMADDSUB213PDZ128rkz |
| 37143 | { 10013, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d370024829ULL }, // Inst #10013 = VFMADDSUB213PDZ128rk |
| 37144 | { 10012, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d370024829ULL }, // Inst #10012 = VFMADDSUB213PDZ128r |
| 37145 | { 10011, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d370024819ULL }, // Inst #10011 = VFMADDSUB213PDZ128mkz |
| 37146 | { 10010, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d370024819ULL }, // Inst #10010 = VFMADDSUB213PDZ128mk |
| 37147 | { 10009, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d370024819ULL }, // Inst #10009 = VFMADDSUB213PDZ128mbkz |
| 37148 | { 10008, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d370024819ULL }, // Inst #10008 = VFMADDSUB213PDZ128mbk |
| 37149 | { 10007, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d370024819ULL }, // Inst #10007 = VFMADDSUB213PDZ128mb |
| 37150 | { 10006, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d370024819ULL }, // Inst #10006 = VFMADDSUB213PDZ128m |
| 37151 | { 10005, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d330024829ULL }, // Inst #10005 = VFMADDSUB213PDYr |
| 37152 | { 10004, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d330024819ULL }, // Inst #10004 = VFMADDSUB213PDYm |
| 37153 | { 10003, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcb28004829ULL }, // Inst #10003 = VFMADDSUB132PSr |
| 37154 | { 10002, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcb28004819ULL }, // Inst #10002 = VFMADDSUB132PSm |
| 37155 | { 10001, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb68004829ULL }, // Inst #10001 = VFMADDSUB132PSZrkz |
| 37156 | { 10000, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacb68004829ULL }, // Inst #10000 = VFMADDSUB132PSZrk |
| 37157 | { 9999, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ecb68004829ULL }, // Inst #9999 = VFMADDSUB132PSZrbkz |
| 37158 | { 9998, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17acb68004829ULL }, // Inst #9998 = VFMADDSUB132PSZrbk |
| 37159 | { 9997, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178cb68004829ULL }, // Inst #9997 = VFMADDSUB132PSZrb |
| 37160 | { 9996, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb68004829ULL }, // Inst #9996 = VFMADDSUB132PSZr |
| 37161 | { 9995, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb68004819ULL }, // Inst #9995 = VFMADDSUB132PSZmkz |
| 37162 | { 9994, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacb68004819ULL }, // Inst #9994 = VFMADDSUB132PSZmk |
| 37163 | { 9993, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ecb68004819ULL }, // Inst #9993 = VFMADDSUB132PSZmbkz |
| 37164 | { 9992, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7acb68004819ULL }, // Inst #9992 = VFMADDSUB132PSZmbk |
| 37165 | { 9991, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78cb68004819ULL }, // Inst #9991 = VFMADDSUB132PSZmb |
| 37166 | { 9990, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb68004819ULL }, // Inst #9990 = VFMADDSUB132PSZm |
| 37167 | { 9989, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb68004829ULL }, // Inst #9989 = VFMADDSUB132PSZ256rkz |
| 37168 | { 9988, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cb68004829ULL }, // Inst #9988 = VFMADDSUB132PSZ256rk |
| 37169 | { 9987, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb68004829ULL }, // Inst #9987 = VFMADDSUB132PSZ256r |
| 37170 | { 9986, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb68004819ULL }, // Inst #9986 = VFMADDSUB132PSZ256mkz |
| 37171 | { 9985, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cb68004819ULL }, // Inst #9985 = VFMADDSUB132PSZ256mk |
| 37172 | { 9984, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77cb68004819ULL }, // Inst #9984 = VFMADDSUB132PSZ256mbkz |
| 37173 | { 9983, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73cb68004819ULL }, // Inst #9983 = VFMADDSUB132PSZ256mbk |
| 37174 | { 9982, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71cb68004819ULL }, // Inst #9982 = VFMADDSUB132PSZ256mb |
| 37175 | { 9981, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb68004819ULL }, // Inst #9981 = VFMADDSUB132PSZ256m |
| 37176 | { 9980, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb68004829ULL }, // Inst #9980 = VFMADDSUB132PSZ128rkz |
| 37177 | { 9979, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cb68004829ULL }, // Inst #9979 = VFMADDSUB132PSZ128rk |
| 37178 | { 9978, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb68004829ULL }, // Inst #9978 = VFMADDSUB132PSZ128r |
| 37179 | { 9977, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb68004819ULL }, // Inst #9977 = VFMADDSUB132PSZ128mkz |
| 37180 | { 9976, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cb68004819ULL }, // Inst #9976 = VFMADDSUB132PSZ128mk |
| 37181 | { 9975, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76cb68004819ULL }, // Inst #9975 = VFMADDSUB132PSZ128mbkz |
| 37182 | { 9974, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72cb68004819ULL }, // Inst #9974 = VFMADDSUB132PSZ128mbk |
| 37183 | { 9973, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70cb68004819ULL }, // Inst #9973 = VFMADDSUB132PSZ128mb |
| 37184 | { 9972, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb68004819ULL }, // Inst #9972 = VFMADDSUB132PSZ128m |
| 37185 | { 9971, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cb28004829ULL }, // Inst #9971 = VFMADDSUB132PSYr |
| 37186 | { 9970, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cb28004819ULL }, // Inst #9970 = VFMADDSUB132PSYm |
| 37187 | { 9969, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb68014829ULL }, // Inst #9969 = VFMADDSUB132PHZrkz |
| 37188 | { 9968, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacb68014829ULL }, // Inst #9968 = VFMADDSUB132PHZrk |
| 37189 | { 9967, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ecb68014829ULL }, // Inst #9967 = VFMADDSUB132PHZrbkz |
| 37190 | { 9966, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15acb68014829ULL }, // Inst #9966 = VFMADDSUB132PHZrbk |
| 37191 | { 9965, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158cb68014829ULL }, // Inst #9965 = VFMADDSUB132PHZrb |
| 37192 | { 9964, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb68014829ULL }, // Inst #9964 = VFMADDSUB132PHZr |
| 37193 | { 9963, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb68014819ULL }, // Inst #9963 = VFMADDSUB132PHZmkz |
| 37194 | { 9962, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacb68014819ULL }, // Inst #9962 = VFMADDSUB132PHZmk |
| 37195 | { 9961, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ecb68014819ULL }, // Inst #9961 = VFMADDSUB132PHZmbkz |
| 37196 | { 9960, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5acb68014819ULL }, // Inst #9960 = VFMADDSUB132PHZmbk |
| 37197 | { 9959, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58cb68014819ULL }, // Inst #9959 = VFMADDSUB132PHZmb |
| 37198 | { 9958, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb68014819ULL }, // Inst #9958 = VFMADDSUB132PHZm |
| 37199 | { 9957, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb68014829ULL }, // Inst #9957 = VFMADDSUB132PHZ256rkz |
| 37200 | { 9956, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cb68014829ULL }, // Inst #9956 = VFMADDSUB132PHZ256rk |
| 37201 | { 9955, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb68014829ULL }, // Inst #9955 = VFMADDSUB132PHZ256r |
| 37202 | { 9954, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb68014819ULL }, // Inst #9954 = VFMADDSUB132PHZ256mkz |
| 37203 | { 9953, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cb68014819ULL }, // Inst #9953 = VFMADDSUB132PHZ256mk |
| 37204 | { 9952, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57cb68014819ULL }, // Inst #9952 = VFMADDSUB132PHZ256mbkz |
| 37205 | { 9951, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53cb68014819ULL }, // Inst #9951 = VFMADDSUB132PHZ256mbk |
| 37206 | { 9950, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51cb68014819ULL }, // Inst #9950 = VFMADDSUB132PHZ256mb |
| 37207 | { 9949, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb68014819ULL }, // Inst #9949 = VFMADDSUB132PHZ256m |
| 37208 | { 9948, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb68014829ULL }, // Inst #9948 = VFMADDSUB132PHZ128rkz |
| 37209 | { 9947, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cb68014829ULL }, // Inst #9947 = VFMADDSUB132PHZ128rk |
| 37210 | { 9946, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb68014829ULL }, // Inst #9946 = VFMADDSUB132PHZ128r |
| 37211 | { 9945, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb68014819ULL }, // Inst #9945 = VFMADDSUB132PHZ128mkz |
| 37212 | { 9944, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cb68014819ULL }, // Inst #9944 = VFMADDSUB132PHZ128mk |
| 37213 | { 9943, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56cb68014819ULL }, // Inst #9943 = VFMADDSUB132PHZ128mbkz |
| 37214 | { 9942, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52cb68014819ULL }, // Inst #9942 = VFMADDSUB132PHZ128mbk |
| 37215 | { 9941, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50cb68014819ULL }, // Inst #9941 = VFMADDSUB132PHZ128mb |
| 37216 | { 9940, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb68014819ULL }, // Inst #9940 = VFMADDSUB132PHZ128m |
| 37217 | { 9939, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcb30024829ULL }, // Inst #9939 = VFMADDSUB132PDr |
| 37218 | { 9938, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcb30024819ULL }, // Inst #9938 = VFMADDSUB132PDm |
| 37219 | { 9937, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb70024829ULL }, // Inst #9937 = VFMADDSUB132PDZrkz |
| 37220 | { 9936, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacb70024829ULL }, // Inst #9936 = VFMADDSUB132PDZrk |
| 37221 | { 9935, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ecb70024829ULL }, // Inst #9935 = VFMADDSUB132PDZrbkz |
| 37222 | { 9934, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19acb70024829ULL }, // Inst #9934 = VFMADDSUB132PDZrbk |
| 37223 | { 9933, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198cb70024829ULL }, // Inst #9933 = VFMADDSUB132PDZrb |
| 37224 | { 9932, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb70024829ULL }, // Inst #9932 = VFMADDSUB132PDZr |
| 37225 | { 9931, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb70024819ULL }, // Inst #9931 = VFMADDSUB132PDZmkz |
| 37226 | { 9930, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacb70024819ULL }, // Inst #9930 = VFMADDSUB132PDZmk |
| 37227 | { 9929, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ecb70024819ULL }, // Inst #9929 = VFMADDSUB132PDZmbkz |
| 37228 | { 9928, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9acb70024819ULL }, // Inst #9928 = VFMADDSUB132PDZmbk |
| 37229 | { 9927, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98cb70024819ULL }, // Inst #9927 = VFMADDSUB132PDZmb |
| 37230 | { 9926, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb70024819ULL }, // Inst #9926 = VFMADDSUB132PDZm |
| 37231 | { 9925, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb70024829ULL }, // Inst #9925 = VFMADDSUB132PDZ256rkz |
| 37232 | { 9924, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cb70024829ULL }, // Inst #9924 = VFMADDSUB132PDZ256rk |
| 37233 | { 9923, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb70024829ULL }, // Inst #9923 = VFMADDSUB132PDZ256r |
| 37234 | { 9922, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb70024819ULL }, // Inst #9922 = VFMADDSUB132PDZ256mkz |
| 37235 | { 9921, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cb70024819ULL }, // Inst #9921 = VFMADDSUB132PDZ256mk |
| 37236 | { 9920, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97cb70024819ULL }, // Inst #9920 = VFMADDSUB132PDZ256mbkz |
| 37237 | { 9919, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93cb70024819ULL }, // Inst #9919 = VFMADDSUB132PDZ256mbk |
| 37238 | { 9918, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91cb70024819ULL }, // Inst #9918 = VFMADDSUB132PDZ256mb |
| 37239 | { 9917, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb70024819ULL }, // Inst #9917 = VFMADDSUB132PDZ256m |
| 37240 | { 9916, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb70024829ULL }, // Inst #9916 = VFMADDSUB132PDZ128rkz |
| 37241 | { 9915, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cb70024829ULL }, // Inst #9915 = VFMADDSUB132PDZ128rk |
| 37242 | { 9914, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb70024829ULL }, // Inst #9914 = VFMADDSUB132PDZ128r |
| 37243 | { 9913, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb70024819ULL }, // Inst #9913 = VFMADDSUB132PDZ128mkz |
| 37244 | { 9912, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cb70024819ULL }, // Inst #9912 = VFMADDSUB132PDZ128mk |
| 37245 | { 9911, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96cb70024819ULL }, // Inst #9911 = VFMADDSUB132PDZ128mbkz |
| 37246 | { 9910, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92cb70024819ULL }, // Inst #9910 = VFMADDSUB132PDZ128mbk |
| 37247 | { 9909, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90cb70024819ULL }, // Inst #9909 = VFMADDSUB132PDZ128mb |
| 37248 | { 9908, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb70024819ULL }, // Inst #9908 = VFMADDSUB132PDZ128m |
| 37249 | { 9907, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cb30024829ULL }, // Inst #9907 = VFMADDSUB132PDYr |
| 37250 | { 9906, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cb30024819ULL }, // Inst #9906 = VFMADDSUB132PDYm |
| 37251 | { 9905, 4, 1, 0, 444, 1, 0, 4118, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5280c6829ULL }, // Inst #9905 = VFMADDSS4rr_REV |
| 37252 | { 9904, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5280c6829ULL }, // Inst #9904 = VFMADDSS4rr_Int_REV |
| 37253 | { 9903, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5280e682bULL }, // Inst #9903 = VFMADDSS4rr_Int |
| 37254 | { 9902, 4, 1, 0, 444, 1, 0, 4118, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb5280e682bULL }, // Inst #9902 = VFMADDSS4rr |
| 37255 | { 9901, 8, 1, 0, 443, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5280e681bULL }, // Inst #9901 = VFMADDSS4rm_Int |
| 37256 | { 9900, 8, 1, 0, 443, 1, 0, 4110, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5280e681bULL }, // Inst #9900 = VFMADDSS4rm |
| 37257 | { 9899, 8, 1, 0, 447, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5280c6819ULL }, // Inst #9899 = VFMADDSS4mr_Int |
| 37258 | { 9898, 8, 1, 0, 447, 1, 0, 4102, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5280c6819ULL }, // Inst #9898 = VFMADDSS4mr |
| 37259 | { 9897, 4, 1, 0, 444, 1, 0, 4098, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5b00c6829ULL }, // Inst #9897 = VFMADDSD4rr_REV |
| 37260 | { 9896, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5b00c6829ULL }, // Inst #9896 = VFMADDSD4rr_Int_REV |
| 37261 | { 9895, 4, 1, 0, 444, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5b00e682bULL }, // Inst #9895 = VFMADDSD4rr_Int |
| 37262 | { 9894, 4, 1, 0, 444, 1, 0, 4098, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb5b00e682bULL }, // Inst #9894 = VFMADDSD4rr |
| 37263 | { 9893, 8, 1, 0, 443, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5b00e681bULL }, // Inst #9893 = VFMADDSD4rm_Int |
| 37264 | { 9892, 8, 1, 0, 443, 1, 0, 4090, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5b00e681bULL }, // Inst #9892 = VFMADDSD4rm |
| 37265 | { 9891, 8, 1, 0, 447, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5b00c6819ULL }, // Inst #9891 = VFMADDSD4mr_Int |
| 37266 | { 9890, 8, 1, 0, 447, 1, 0, 4082, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5b00c6819ULL }, // Inst #9890 = VFMADDSD4mr |
| 37267 | { 9889, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb4280c6829ULL }, // Inst #9889 = VFMADDPS4rr_REV |
| 37268 | { 9888, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb4280e682bULL }, // Inst #9888 = VFMADDPS4rr |
| 37269 | { 9887, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb4280e681bULL }, // Inst #9887 = VFMADDPS4rm |
| 37270 | { 9886, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb4280c6819ULL }, // Inst #9886 = VFMADDPS4mr |
| 37271 | { 9885, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1b4280c6829ULL }, // Inst #9885 = VFMADDPS4Yrr_REV |
| 37272 | { 9884, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1b4280e682bULL }, // Inst #9884 = VFMADDPS4Yrr |
| 37273 | { 9883, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b4280e681bULL }, // Inst #9883 = VFMADDPS4Yrm |
| 37274 | { 9882, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b4280c6819ULL }, // Inst #9882 = VFMADDPS4Ymr |
| 37275 | { 9881, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xb4b00c6829ULL }, // Inst #9881 = VFMADDPD4rr_REV |
| 37276 | { 9880, 4, 1, 0, 432, 1, 0, 2295, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb4b00e682bULL }, // Inst #9880 = VFMADDPD4rr |
| 37277 | { 9879, 8, 1, 0, 440, 1, 0, 4074, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb4b00e681bULL }, // Inst #9879 = VFMADDPD4rm |
| 37278 | { 9878, 8, 1, 0, 446, 1, 0, 2287, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb4b00c6819ULL }, // Inst #9878 = VFMADDPD4mr |
| 37279 | { 9877, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1b4b00c6829ULL }, // Inst #9877 = VFMADDPD4Yrr_REV |
| 37280 | { 9876, 4, 1, 0, 434, 1, 0, 2283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1b4b00e682bULL }, // Inst #9876 = VFMADDPD4Yrr |
| 37281 | { 9875, 8, 1, 0, 441, 1, 0, 4066, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b4b00e681bULL }, // Inst #9875 = VFMADDPD4Yrm |
| 37282 | { 9874, 8, 1, 0, 445, 1, 0, 2275, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b4b00c6819ULL }, // Inst #9874 = VFMADDPD4Ymr |
| 37283 | { 9873, 5, 1, 0, 2221, 1, 0, 3798, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x66abe0015029ULL }, // Inst #9873 = VFMADDCSHZrkz |
| 37284 | { 9872, 5, 1, 0, 2221, 1, 0, 3798, X86ImpOpBase + 78, 0, 0x62abe0015029ULL }, // Inst #9872 = VFMADDCSHZrk |
| 37285 | { 9871, 6, 1, 0, 2221, 1, 0, 3792, X86ImpOpBase + 78, 0, 0x176abe0015029ULL }, // Inst #9871 = VFMADDCSHZrbkz |
| 37286 | { 9870, 6, 1, 0, 2221, 1, 0, 3792, X86ImpOpBase + 78, 0, 0x172abe0015029ULL }, // Inst #9870 = VFMADDCSHZrbk |
| 37287 | { 9869, 5, 1, 0, 2213, 1, 0, 3787, X86ImpOpBase + 78, 0, 0x170abe0015029ULL }, // Inst #9869 = VFMADDCSHZrb |
| 37288 | { 9868, 4, 1, 0, 2213, 1, 0, 3706, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x60abe0015029ULL }, // Inst #9868 = VFMADDCSHZr |
| 37289 | { 9867, 9, 1, 0, 2211, 1, 0, 3778, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x66abe0015019ULL }, // Inst #9867 = VFMADDCSHZmkz |
| 37290 | { 9866, 9, 1, 0, 2211, 1, 0, 3778, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x62abe0015019ULL }, // Inst #9866 = VFMADDCSHZmk |
| 37291 | { 9865, 8, 1, 0, 2202, 1, 0, 3689, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x60abe0015019ULL }, // Inst #9865 = VFMADDCSHZm |
| 37292 | { 9864, 5, 1, 0, 2232, 1, 0, 3773, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xeeab60015029ULL }, // Inst #9864 = VFMADDCPHZrkz |
| 37293 | { 9863, 5, 1, 0, 2232, 1, 0, 3773, X86ImpOpBase + 78, 0, 0xeaab60015029ULL }, // Inst #9863 = VFMADDCPHZrk |
| 37294 | { 9862, 6, 1, 0, 2232, 1, 0, 3767, X86ImpOpBase + 78, 0, 0x17eab60015029ULL }, // Inst #9862 = VFMADDCPHZrbkz |
| 37295 | { 9861, 6, 1, 0, 2232, 1, 0, 3767, X86ImpOpBase + 78, 0, 0x17aab60015029ULL }, // Inst #9861 = VFMADDCPHZrbk |
| 37296 | { 9860, 5, 1, 0, 2229, 1, 0, 3762, X86ImpOpBase + 78, 0, 0x178ab60015029ULL }, // Inst #9860 = VFMADDCPHZrb |
| 37297 | { 9859, 4, 1, 0, 2229, 1, 0, 3758, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xe8ab60015029ULL }, // Inst #9859 = VFMADDCPHZr |
| 37298 | { 9858, 9, 1, 0, 2227, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeeab60015019ULL }, // Inst #9858 = VFMADDCPHZmkz |
| 37299 | { 9857, 9, 1, 0, 2227, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeaab60015019ULL }, // Inst #9857 = VFMADDCPHZmk |
| 37300 | { 9856, 9, 1, 0, 2227, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7eab60015019ULL }, // Inst #9856 = VFMADDCPHZmbkz |
| 37301 | { 9855, 9, 1, 0, 2227, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7aab60015019ULL }, // Inst #9855 = VFMADDCPHZmbk |
| 37302 | { 9854, 8, 1, 0, 2223, 1, 0, 3741, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x78ab60015019ULL }, // Inst #9854 = VFMADDCPHZmb |
| 37303 | { 9853, 8, 1, 0, 2223, 1, 0, 3741, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe8ab60015019ULL }, // Inst #9853 = VFMADDCPHZm |
| 37304 | { 9852, 5, 1, 0, 2222, 1, 0, 3736, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xc7ab60015029ULL }, // Inst #9852 = VFMADDCPHZ256rkz |
| 37305 | { 9851, 5, 1, 0, 2222, 1, 0, 3736, X86ImpOpBase + 78, 0, 0xc3ab60015029ULL }, // Inst #9851 = VFMADDCPHZ256rk |
| 37306 | { 9850, 4, 1, 0, 2214, 1, 0, 3732, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xc1ab60015029ULL }, // Inst #9850 = VFMADDCPHZ256r |
| 37307 | { 9849, 9, 1, 0, 2210, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc7ab60015019ULL }, // Inst #9849 = VFMADDCPHZ256mkz |
| 37308 | { 9848, 9, 1, 0, 2210, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc3ab60015019ULL }, // Inst #9848 = VFMADDCPHZ256mk |
| 37309 | { 9847, 9, 1, 0, 2210, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x77ab60015019ULL }, // Inst #9847 = VFMADDCPHZ256mbkz |
| 37310 | { 9846, 9, 1, 0, 2210, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x73ab60015019ULL }, // Inst #9846 = VFMADDCPHZ256mbk |
| 37311 | { 9845, 8, 1, 0, 2200, 1, 0, 3715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x71ab60015019ULL }, // Inst #9845 = VFMADDCPHZ256mb |
| 37312 | { 9844, 8, 1, 0, 2200, 1, 0, 3715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc1ab60015019ULL }, // Inst #9844 = VFMADDCPHZ256m |
| 37313 | { 9843, 5, 1, 0, 2221, 1, 0, 3710, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xa6ab60015029ULL }, // Inst #9843 = VFMADDCPHZ128rkz |
| 37314 | { 9842, 5, 1, 0, 2221, 1, 0, 3710, X86ImpOpBase + 78, 0, 0xa2ab60015029ULL }, // Inst #9842 = VFMADDCPHZ128rk |
| 37315 | { 9841, 4, 1, 0, 2213, 1, 0, 3706, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0xa0ab60015029ULL }, // Inst #9841 = VFMADDCPHZ128r |
| 37316 | { 9840, 9, 1, 0, 2209, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa6ab60015019ULL }, // Inst #9840 = VFMADDCPHZ128mkz |
| 37317 | { 9839, 9, 1, 0, 2209, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa2ab60015019ULL }, // Inst #9839 = VFMADDCPHZ128mk |
| 37318 | { 9838, 9, 1, 0, 2209, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x76ab60015019ULL }, // Inst #9838 = VFMADDCPHZ128mbkz |
| 37319 | { 9837, 9, 1, 0, 2209, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x72ab60015019ULL }, // Inst #9837 = VFMADDCPHZ128mbk |
| 37320 | { 9836, 8, 1, 0, 2199, 1, 0, 3689, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x70ab60015019ULL }, // Inst #9836 = VFMADDCPHZ128mb |
| 37321 | { 9835, 8, 1, 0, 2199, 1, 0, 3689, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa0ab60015019ULL }, // Inst #9835 = VFMADDCPHZ128m |
| 37322 | { 9834, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdca8004829ULL }, // Inst #9834 = VFMADD231SSr_Int |
| 37323 | { 9833, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdca8004829ULL }, // Inst #9833 = VFMADD231SSr |
| 37324 | { 9832, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdca8004819ULL }, // Inst #9832 = VFMADD231SSm_Int |
| 37325 | { 9831, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdca8004819ULL }, // Inst #9831 = VFMADD231SSm |
| 37326 | { 9830, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dce8004829ULL }, // Inst #9830 = VFMADD231SSZrkz_Int |
| 37327 | { 9829, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dce8004829ULL }, // Inst #9829 = VFMADD231SSZrk_Int |
| 37328 | { 9828, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176dce8004829ULL }, // Inst #9828 = VFMADD231SSZrbkz_Int |
| 37329 | { 9827, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172dce8004829ULL }, // Inst #9827 = VFMADD231SSZrbk_Int |
| 37330 | { 9826, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170dce8004829ULL }, // Inst #9826 = VFMADD231SSZrb_Int |
| 37331 | { 9825, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170dce8004829ULL }, // Inst #9825 = VFMADD231SSZrb |
| 37332 | { 9824, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dce8004829ULL }, // Inst #9824 = VFMADD231SSZr_Int |
| 37333 | { 9823, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dce8004829ULL }, // Inst #9823 = VFMADD231SSZr |
| 37334 | { 9822, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dce8004819ULL }, // Inst #9822 = VFMADD231SSZmkz_Int |
| 37335 | { 9821, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dce8004819ULL }, // Inst #9821 = VFMADD231SSZmk_Int |
| 37336 | { 9820, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dce8004819ULL }, // Inst #9820 = VFMADD231SSZm_Int |
| 37337 | { 9819, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dce8004819ULL }, // Inst #9819 = VFMADD231SSZm |
| 37338 | { 9818, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dce8014829ULL }, // Inst #9818 = VFMADD231SHZrkz_Int |
| 37339 | { 9817, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dce8014829ULL }, // Inst #9817 = VFMADD231SHZrk_Int |
| 37340 | { 9816, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156dce8014829ULL }, // Inst #9816 = VFMADD231SHZrbkz_Int |
| 37341 | { 9815, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152dce8014829ULL }, // Inst #9815 = VFMADD231SHZrbk_Int |
| 37342 | { 9814, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150dce8014829ULL }, // Inst #9814 = VFMADD231SHZrb_Int |
| 37343 | { 9813, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150dce8014829ULL }, // Inst #9813 = VFMADD231SHZrb |
| 37344 | { 9812, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dce8014829ULL }, // Inst #9812 = VFMADD231SHZr_Int |
| 37345 | { 9811, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dce8014829ULL }, // Inst #9811 = VFMADD231SHZr |
| 37346 | { 9810, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dce8014819ULL }, // Inst #9810 = VFMADD231SHZmkz_Int |
| 37347 | { 9809, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dce8014819ULL }, // Inst #9809 = VFMADD231SHZmk_Int |
| 37348 | { 9808, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dce8014819ULL }, // Inst #9808 = VFMADD231SHZm_Int |
| 37349 | { 9807, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dce8014819ULL }, // Inst #9807 = VFMADD231SHZm |
| 37350 | { 9806, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdcb0024829ULL }, // Inst #9806 = VFMADD231SDr_Int |
| 37351 | { 9805, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdcb0024829ULL }, // Inst #9805 = VFMADD231SDr |
| 37352 | { 9804, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdcb0024819ULL }, // Inst #9804 = VFMADD231SDm_Int |
| 37353 | { 9803, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdcb0024819ULL }, // Inst #9803 = VFMADD231SDm |
| 37354 | { 9802, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86dcf0024829ULL }, // Inst #9802 = VFMADD231SDZrkz_Int |
| 37355 | { 9801, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82dcf0024829ULL }, // Inst #9801 = VFMADD231SDZrk_Int |
| 37356 | { 9800, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196dcf0024829ULL }, // Inst #9800 = VFMADD231SDZrbkz_Int |
| 37357 | { 9799, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192dcf0024829ULL }, // Inst #9799 = VFMADD231SDZrbk_Int |
| 37358 | { 9798, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190dcf0024829ULL }, // Inst #9798 = VFMADD231SDZrb_Int |
| 37359 | { 9797, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190dcf0024829ULL }, // Inst #9797 = VFMADD231SDZrb |
| 37360 | { 9796, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dcf0024829ULL }, // Inst #9796 = VFMADD231SDZr_Int |
| 37361 | { 9795, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dcf0024829ULL }, // Inst #9795 = VFMADD231SDZr |
| 37362 | { 9794, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86dcf0024819ULL }, // Inst #9794 = VFMADD231SDZmkz_Int |
| 37363 | { 9793, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82dcf0024819ULL }, // Inst #9793 = VFMADD231SDZmk_Int |
| 37364 | { 9792, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dcf0024819ULL }, // Inst #9792 = VFMADD231SDZm_Int |
| 37365 | { 9791, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dcf0024819ULL }, // Inst #9791 = VFMADD231SDZm |
| 37366 | { 9790, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdc28004829ULL }, // Inst #9790 = VFMADD231PSr |
| 37367 | { 9789, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdc28004819ULL }, // Inst #9789 = VFMADD231PSm |
| 37368 | { 9788, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc68004829ULL }, // Inst #9788 = VFMADD231PSZrkz |
| 37369 | { 9787, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadc68004829ULL }, // Inst #9787 = VFMADD231PSZrk |
| 37370 | { 9786, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17edc68004829ULL }, // Inst #9786 = VFMADD231PSZrbkz |
| 37371 | { 9785, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17adc68004829ULL }, // Inst #9785 = VFMADD231PSZrbk |
| 37372 | { 9784, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178dc68004829ULL }, // Inst #9784 = VFMADD231PSZrb |
| 37373 | { 9783, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc68004829ULL }, // Inst #9783 = VFMADD231PSZr |
| 37374 | { 9782, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc68004819ULL }, // Inst #9782 = VFMADD231PSZmkz |
| 37375 | { 9781, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadc68004819ULL }, // Inst #9781 = VFMADD231PSZmk |
| 37376 | { 9780, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7edc68004819ULL }, // Inst #9780 = VFMADD231PSZmbkz |
| 37377 | { 9779, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7adc68004819ULL }, // Inst #9779 = VFMADD231PSZmbk |
| 37378 | { 9778, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78dc68004819ULL }, // Inst #9778 = VFMADD231PSZmb |
| 37379 | { 9777, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc68004819ULL }, // Inst #9777 = VFMADD231PSZm |
| 37380 | { 9776, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc68004829ULL }, // Inst #9776 = VFMADD231PSZ256rkz |
| 37381 | { 9775, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dc68004829ULL }, // Inst #9775 = VFMADD231PSZ256rk |
| 37382 | { 9774, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc68004829ULL }, // Inst #9774 = VFMADD231PSZ256r |
| 37383 | { 9773, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc68004819ULL }, // Inst #9773 = VFMADD231PSZ256mkz |
| 37384 | { 9772, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dc68004819ULL }, // Inst #9772 = VFMADD231PSZ256mk |
| 37385 | { 9771, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77dc68004819ULL }, // Inst #9771 = VFMADD231PSZ256mbkz |
| 37386 | { 9770, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73dc68004819ULL }, // Inst #9770 = VFMADD231PSZ256mbk |
| 37387 | { 9769, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71dc68004819ULL }, // Inst #9769 = VFMADD231PSZ256mb |
| 37388 | { 9768, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc68004819ULL }, // Inst #9768 = VFMADD231PSZ256m |
| 37389 | { 9767, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc68004829ULL }, // Inst #9767 = VFMADD231PSZ128rkz |
| 37390 | { 9766, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dc68004829ULL }, // Inst #9766 = VFMADD231PSZ128rk |
| 37391 | { 9765, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc68004829ULL }, // Inst #9765 = VFMADD231PSZ128r |
| 37392 | { 9764, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc68004819ULL }, // Inst #9764 = VFMADD231PSZ128mkz |
| 37393 | { 9763, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dc68004819ULL }, // Inst #9763 = VFMADD231PSZ128mk |
| 37394 | { 9762, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76dc68004819ULL }, // Inst #9762 = VFMADD231PSZ128mbkz |
| 37395 | { 9761, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72dc68004819ULL }, // Inst #9761 = VFMADD231PSZ128mbk |
| 37396 | { 9760, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70dc68004819ULL }, // Inst #9760 = VFMADD231PSZ128mb |
| 37397 | { 9759, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc68004819ULL }, // Inst #9759 = VFMADD231PSZ128m |
| 37398 | { 9758, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dc28004829ULL }, // Inst #9758 = VFMADD231PSYr |
| 37399 | { 9757, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dc28004819ULL }, // Inst #9757 = VFMADD231PSYm |
| 37400 | { 9756, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc68014829ULL }, // Inst #9756 = VFMADD231PHZrkz |
| 37401 | { 9755, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadc68014829ULL }, // Inst #9755 = VFMADD231PHZrk |
| 37402 | { 9754, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15edc68014829ULL }, // Inst #9754 = VFMADD231PHZrbkz |
| 37403 | { 9753, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15adc68014829ULL }, // Inst #9753 = VFMADD231PHZrbk |
| 37404 | { 9752, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158dc68014829ULL }, // Inst #9752 = VFMADD231PHZrb |
| 37405 | { 9751, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc68014829ULL }, // Inst #9751 = VFMADD231PHZr |
| 37406 | { 9750, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc68014819ULL }, // Inst #9750 = VFMADD231PHZmkz |
| 37407 | { 9749, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadc68014819ULL }, // Inst #9749 = VFMADD231PHZmk |
| 37408 | { 9748, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5edc68014819ULL }, // Inst #9748 = VFMADD231PHZmbkz |
| 37409 | { 9747, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5adc68014819ULL }, // Inst #9747 = VFMADD231PHZmbk |
| 37410 | { 9746, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58dc68014819ULL }, // Inst #9746 = VFMADD231PHZmb |
| 37411 | { 9745, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc68014819ULL }, // Inst #9745 = VFMADD231PHZm |
| 37412 | { 9744, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc68014829ULL }, // Inst #9744 = VFMADD231PHZ256rkz |
| 37413 | { 9743, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dc68014829ULL }, // Inst #9743 = VFMADD231PHZ256rk |
| 37414 | { 9742, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc68014829ULL }, // Inst #9742 = VFMADD231PHZ256r |
| 37415 | { 9741, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc68014819ULL }, // Inst #9741 = VFMADD231PHZ256mkz |
| 37416 | { 9740, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dc68014819ULL }, // Inst #9740 = VFMADD231PHZ256mk |
| 37417 | { 9739, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57dc68014819ULL }, // Inst #9739 = VFMADD231PHZ256mbkz |
| 37418 | { 9738, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53dc68014819ULL }, // Inst #9738 = VFMADD231PHZ256mbk |
| 37419 | { 9737, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51dc68014819ULL }, // Inst #9737 = VFMADD231PHZ256mb |
| 37420 | { 9736, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc68014819ULL }, // Inst #9736 = VFMADD231PHZ256m |
| 37421 | { 9735, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc68014829ULL }, // Inst #9735 = VFMADD231PHZ128rkz |
| 37422 | { 9734, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dc68014829ULL }, // Inst #9734 = VFMADD231PHZ128rk |
| 37423 | { 9733, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc68014829ULL }, // Inst #9733 = VFMADD231PHZ128r |
| 37424 | { 9732, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc68014819ULL }, // Inst #9732 = VFMADD231PHZ128mkz |
| 37425 | { 9731, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dc68014819ULL }, // Inst #9731 = VFMADD231PHZ128mk |
| 37426 | { 9730, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56dc68014819ULL }, // Inst #9730 = VFMADD231PHZ128mbkz |
| 37427 | { 9729, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52dc68014819ULL }, // Inst #9729 = VFMADD231PHZ128mbk |
| 37428 | { 9728, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50dc68014819ULL }, // Inst #9728 = VFMADD231PHZ128mb |
| 37429 | { 9727, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc68014819ULL }, // Inst #9727 = VFMADD231PHZ128m |
| 37430 | { 9726, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdc30024829ULL }, // Inst #9726 = VFMADD231PDr |
| 37431 | { 9725, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdc30024819ULL }, // Inst #9725 = VFMADD231PDm |
| 37432 | { 9724, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc70024829ULL }, // Inst #9724 = VFMADD231PDZrkz |
| 37433 | { 9723, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadc70024829ULL }, // Inst #9723 = VFMADD231PDZrk |
| 37434 | { 9722, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19edc70024829ULL }, // Inst #9722 = VFMADD231PDZrbkz |
| 37435 | { 9721, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19adc70024829ULL }, // Inst #9721 = VFMADD231PDZrbk |
| 37436 | { 9720, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198dc70024829ULL }, // Inst #9720 = VFMADD231PDZrb |
| 37437 | { 9719, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc70024829ULL }, // Inst #9719 = VFMADD231PDZr |
| 37438 | { 9718, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc70024819ULL }, // Inst #9718 = VFMADD231PDZmkz |
| 37439 | { 9717, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadc70024819ULL }, // Inst #9717 = VFMADD231PDZmk |
| 37440 | { 9716, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9edc70024819ULL }, // Inst #9716 = VFMADD231PDZmbkz |
| 37441 | { 9715, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9adc70024819ULL }, // Inst #9715 = VFMADD231PDZmbk |
| 37442 | { 9714, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98dc70024819ULL }, // Inst #9714 = VFMADD231PDZmb |
| 37443 | { 9713, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc70024819ULL }, // Inst #9713 = VFMADD231PDZm |
| 37444 | { 9712, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc70024829ULL }, // Inst #9712 = VFMADD231PDZ256rkz |
| 37445 | { 9711, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dc70024829ULL }, // Inst #9711 = VFMADD231PDZ256rk |
| 37446 | { 9710, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc70024829ULL }, // Inst #9710 = VFMADD231PDZ256r |
| 37447 | { 9709, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc70024819ULL }, // Inst #9709 = VFMADD231PDZ256mkz |
| 37448 | { 9708, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dc70024819ULL }, // Inst #9708 = VFMADD231PDZ256mk |
| 37449 | { 9707, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97dc70024819ULL }, // Inst #9707 = VFMADD231PDZ256mbkz |
| 37450 | { 9706, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93dc70024819ULL }, // Inst #9706 = VFMADD231PDZ256mbk |
| 37451 | { 9705, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91dc70024819ULL }, // Inst #9705 = VFMADD231PDZ256mb |
| 37452 | { 9704, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc70024819ULL }, // Inst #9704 = VFMADD231PDZ256m |
| 37453 | { 9703, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc70024829ULL }, // Inst #9703 = VFMADD231PDZ128rkz |
| 37454 | { 9702, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dc70024829ULL }, // Inst #9702 = VFMADD231PDZ128rk |
| 37455 | { 9701, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc70024829ULL }, // Inst #9701 = VFMADD231PDZ128r |
| 37456 | { 9700, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc70024819ULL }, // Inst #9700 = VFMADD231PDZ128mkz |
| 37457 | { 9699, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dc70024819ULL }, // Inst #9699 = VFMADD231PDZ128mk |
| 37458 | { 9698, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96dc70024819ULL }, // Inst #9698 = VFMADD231PDZ128mbkz |
| 37459 | { 9697, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92dc70024819ULL }, // Inst #9697 = VFMADD231PDZ128mbk |
| 37460 | { 9696, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90dc70024819ULL }, // Inst #9696 = VFMADD231PDZ128mb |
| 37461 | { 9695, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc70024819ULL }, // Inst #9695 = VFMADD231PDZ128m |
| 37462 | { 9694, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dc30024829ULL }, // Inst #9694 = VFMADD231PDYr |
| 37463 | { 9693, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dc30024819ULL }, // Inst #9693 = VFMADD231PDYm |
| 37464 | { 9692, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeedc68014029ULL }, // Inst #9692 = VFMADD231BF16Zrkz |
| 37465 | { 9691, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeadc68014029ULL }, // Inst #9691 = VFMADD231BF16Zrk |
| 37466 | { 9690, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8dc68014029ULL }, // Inst #9690 = VFMADD231BF16Zr |
| 37467 | { 9689, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeedc68014019ULL }, // Inst #9689 = VFMADD231BF16Zmkz |
| 37468 | { 9688, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeadc68014019ULL }, // Inst #9688 = VFMADD231BF16Zmk |
| 37469 | { 9687, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5edc68014019ULL }, // Inst #9687 = VFMADD231BF16Zmbkz |
| 37470 | { 9686, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5adc68014019ULL }, // Inst #9686 = VFMADD231BF16Zmbk |
| 37471 | { 9685, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58dc68014019ULL }, // Inst #9685 = VFMADD231BF16Zmb |
| 37472 | { 9684, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8dc68014019ULL }, // Inst #9684 = VFMADD231BF16Zm |
| 37473 | { 9683, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7dc68014029ULL }, // Inst #9683 = VFMADD231BF16Z256rkz |
| 37474 | { 9682, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3dc68014029ULL }, // Inst #9682 = VFMADD231BF16Z256rk |
| 37475 | { 9681, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1dc68014029ULL }, // Inst #9681 = VFMADD231BF16Z256r |
| 37476 | { 9680, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7dc68014019ULL }, // Inst #9680 = VFMADD231BF16Z256mkz |
| 37477 | { 9679, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3dc68014019ULL }, // Inst #9679 = VFMADD231BF16Z256mk |
| 37478 | { 9678, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57dc68014019ULL }, // Inst #9678 = VFMADD231BF16Z256mbkz |
| 37479 | { 9677, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53dc68014019ULL }, // Inst #9677 = VFMADD231BF16Z256mbk |
| 37480 | { 9676, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51dc68014019ULL }, // Inst #9676 = VFMADD231BF16Z256mb |
| 37481 | { 9675, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1dc68014019ULL }, // Inst #9675 = VFMADD231BF16Z256m |
| 37482 | { 9674, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6dc68014029ULL }, // Inst #9674 = VFMADD231BF16Z128rkz |
| 37483 | { 9673, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2dc68014029ULL }, // Inst #9673 = VFMADD231BF16Z128rk |
| 37484 | { 9672, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0dc68014029ULL }, // Inst #9672 = VFMADD231BF16Z128r |
| 37485 | { 9671, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6dc68014019ULL }, // Inst #9671 = VFMADD231BF16Z128mkz |
| 37486 | { 9670, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2dc68014019ULL }, // Inst #9670 = VFMADD231BF16Z128mk |
| 37487 | { 9669, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56dc68014019ULL }, // Inst #9669 = VFMADD231BF16Z128mbkz |
| 37488 | { 9668, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52dc68014019ULL }, // Inst #9668 = VFMADD231BF16Z128mbk |
| 37489 | { 9667, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50dc68014019ULL }, // Inst #9667 = VFMADD231BF16Z128mb |
| 37490 | { 9666, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0dc68014019ULL }, // Inst #9666 = VFMADD231BF16Z128m |
| 37491 | { 9665, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4a8004829ULL }, // Inst #9665 = VFMADD213SSr_Int |
| 37492 | { 9664, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4a8004829ULL }, // Inst #9664 = VFMADD213SSr |
| 37493 | { 9663, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4a8004819ULL }, // Inst #9663 = VFMADD213SSm_Int |
| 37494 | { 9662, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4a8004819ULL }, // Inst #9662 = VFMADD213SSm |
| 37495 | { 9661, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d4e8004829ULL }, // Inst #9661 = VFMADD213SSZrkz_Int |
| 37496 | { 9660, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d4e8004829ULL }, // Inst #9660 = VFMADD213SSZrk_Int |
| 37497 | { 9659, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176d4e8004829ULL }, // Inst #9659 = VFMADD213SSZrbkz_Int |
| 37498 | { 9658, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172d4e8004829ULL }, // Inst #9658 = VFMADD213SSZrbk_Int |
| 37499 | { 9657, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170d4e8004829ULL }, // Inst #9657 = VFMADD213SSZrb_Int |
| 37500 | { 9656, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170d4e8004829ULL }, // Inst #9656 = VFMADD213SSZrb |
| 37501 | { 9655, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d4e8004829ULL }, // Inst #9655 = VFMADD213SSZr_Int |
| 37502 | { 9654, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d4e8004829ULL }, // Inst #9654 = VFMADD213SSZr |
| 37503 | { 9653, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d4e8004819ULL }, // Inst #9653 = VFMADD213SSZmkz_Int |
| 37504 | { 9652, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d4e8004819ULL }, // Inst #9652 = VFMADD213SSZmk_Int |
| 37505 | { 9651, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d4e8004819ULL }, // Inst #9651 = VFMADD213SSZm_Int |
| 37506 | { 9650, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d4e8004819ULL }, // Inst #9650 = VFMADD213SSZm |
| 37507 | { 9649, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d4e8014829ULL }, // Inst #9649 = VFMADD213SHZrkz_Int |
| 37508 | { 9648, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d4e8014829ULL }, // Inst #9648 = VFMADD213SHZrk_Int |
| 37509 | { 9647, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156d4e8014829ULL }, // Inst #9647 = VFMADD213SHZrbkz_Int |
| 37510 | { 9646, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152d4e8014829ULL }, // Inst #9646 = VFMADD213SHZrbk_Int |
| 37511 | { 9645, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150d4e8014829ULL }, // Inst #9645 = VFMADD213SHZrb_Int |
| 37512 | { 9644, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150d4e8014829ULL }, // Inst #9644 = VFMADD213SHZrb |
| 37513 | { 9643, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d4e8014829ULL }, // Inst #9643 = VFMADD213SHZr_Int |
| 37514 | { 9642, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d4e8014829ULL }, // Inst #9642 = VFMADD213SHZr |
| 37515 | { 9641, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d4e8014819ULL }, // Inst #9641 = VFMADD213SHZmkz_Int |
| 37516 | { 9640, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d4e8014819ULL }, // Inst #9640 = VFMADD213SHZmk_Int |
| 37517 | { 9639, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d4e8014819ULL }, // Inst #9639 = VFMADD213SHZm_Int |
| 37518 | { 9638, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d4e8014819ULL }, // Inst #9638 = VFMADD213SHZm |
| 37519 | { 9637, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4b0024829ULL }, // Inst #9637 = VFMADD213SDr_Int |
| 37520 | { 9636, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4b0024829ULL }, // Inst #9636 = VFMADD213SDr |
| 37521 | { 9635, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4b0024819ULL }, // Inst #9635 = VFMADD213SDm_Int |
| 37522 | { 9634, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4b0024819ULL }, // Inst #9634 = VFMADD213SDm |
| 37523 | { 9633, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d4f0024829ULL }, // Inst #9633 = VFMADD213SDZrkz_Int |
| 37524 | { 9632, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d4f0024829ULL }, // Inst #9632 = VFMADD213SDZrk_Int |
| 37525 | { 9631, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196d4f0024829ULL }, // Inst #9631 = VFMADD213SDZrbkz_Int |
| 37526 | { 9630, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192d4f0024829ULL }, // Inst #9630 = VFMADD213SDZrbk_Int |
| 37527 | { 9629, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190d4f0024829ULL }, // Inst #9629 = VFMADD213SDZrb_Int |
| 37528 | { 9628, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190d4f0024829ULL }, // Inst #9628 = VFMADD213SDZrb |
| 37529 | { 9627, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d4f0024829ULL }, // Inst #9627 = VFMADD213SDZr_Int |
| 37530 | { 9626, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d4f0024829ULL }, // Inst #9626 = VFMADD213SDZr |
| 37531 | { 9625, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d4f0024819ULL }, // Inst #9625 = VFMADD213SDZmkz_Int |
| 37532 | { 9624, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d4f0024819ULL }, // Inst #9624 = VFMADD213SDZmk_Int |
| 37533 | { 9623, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d4f0024819ULL }, // Inst #9623 = VFMADD213SDZm_Int |
| 37534 | { 9622, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d4f0024819ULL }, // Inst #9622 = VFMADD213SDZm |
| 37535 | { 9621, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd428004829ULL }, // Inst #9621 = VFMADD213PSr |
| 37536 | { 9620, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd428004819ULL }, // Inst #9620 = VFMADD213PSm |
| 37537 | { 9619, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed468004829ULL }, // Inst #9619 = VFMADD213PSZrkz |
| 37538 | { 9618, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead468004829ULL }, // Inst #9618 = VFMADD213PSZrk |
| 37539 | { 9617, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ed468004829ULL }, // Inst #9617 = VFMADD213PSZrbkz |
| 37540 | { 9616, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ad468004829ULL }, // Inst #9616 = VFMADD213PSZrbk |
| 37541 | { 9615, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178d468004829ULL }, // Inst #9615 = VFMADD213PSZrb |
| 37542 | { 9614, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d468004829ULL }, // Inst #9614 = VFMADD213PSZr |
| 37543 | { 9613, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed468004819ULL }, // Inst #9613 = VFMADD213PSZmkz |
| 37544 | { 9612, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead468004819ULL }, // Inst #9612 = VFMADD213PSZmk |
| 37545 | { 9611, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed468004819ULL }, // Inst #9611 = VFMADD213PSZmbkz |
| 37546 | { 9610, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad468004819ULL }, // Inst #9610 = VFMADD213PSZmbk |
| 37547 | { 9609, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d468004819ULL }, // Inst #9609 = VFMADD213PSZmb |
| 37548 | { 9608, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d468004819ULL }, // Inst #9608 = VFMADD213PSZm |
| 37549 | { 9607, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d468004829ULL }, // Inst #9607 = VFMADD213PSZ256rkz |
| 37550 | { 9606, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d468004829ULL }, // Inst #9606 = VFMADD213PSZ256rk |
| 37551 | { 9605, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d468004829ULL }, // Inst #9605 = VFMADD213PSZ256r |
| 37552 | { 9604, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d468004819ULL }, // Inst #9604 = VFMADD213PSZ256mkz |
| 37553 | { 9603, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d468004819ULL }, // Inst #9603 = VFMADD213PSZ256mk |
| 37554 | { 9602, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d468004819ULL }, // Inst #9602 = VFMADD213PSZ256mbkz |
| 37555 | { 9601, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d468004819ULL }, // Inst #9601 = VFMADD213PSZ256mbk |
| 37556 | { 9600, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d468004819ULL }, // Inst #9600 = VFMADD213PSZ256mb |
| 37557 | { 9599, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d468004819ULL }, // Inst #9599 = VFMADD213PSZ256m |
| 37558 | { 9598, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d468004829ULL }, // Inst #9598 = VFMADD213PSZ128rkz |
| 37559 | { 9597, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d468004829ULL }, // Inst #9597 = VFMADD213PSZ128rk |
| 37560 | { 9596, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d468004829ULL }, // Inst #9596 = VFMADD213PSZ128r |
| 37561 | { 9595, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d468004819ULL }, // Inst #9595 = VFMADD213PSZ128mkz |
| 37562 | { 9594, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d468004819ULL }, // Inst #9594 = VFMADD213PSZ128mk |
| 37563 | { 9593, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d468004819ULL }, // Inst #9593 = VFMADD213PSZ128mbkz |
| 37564 | { 9592, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d468004819ULL }, // Inst #9592 = VFMADD213PSZ128mbk |
| 37565 | { 9591, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d468004819ULL }, // Inst #9591 = VFMADD213PSZ128mb |
| 37566 | { 9590, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d468004819ULL }, // Inst #9590 = VFMADD213PSZ128m |
| 37567 | { 9589, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d428004829ULL }, // Inst #9589 = VFMADD213PSYr |
| 37568 | { 9588, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d428004819ULL }, // Inst #9588 = VFMADD213PSYm |
| 37569 | { 9587, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed468014829ULL }, // Inst #9587 = VFMADD213PHZrkz |
| 37570 | { 9586, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead468014829ULL }, // Inst #9586 = VFMADD213PHZrk |
| 37571 | { 9585, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ed468014829ULL }, // Inst #9585 = VFMADD213PHZrbkz |
| 37572 | { 9584, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ad468014829ULL }, // Inst #9584 = VFMADD213PHZrbk |
| 37573 | { 9583, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158d468014829ULL }, // Inst #9583 = VFMADD213PHZrb |
| 37574 | { 9582, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d468014829ULL }, // Inst #9582 = VFMADD213PHZr |
| 37575 | { 9581, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed468014819ULL }, // Inst #9581 = VFMADD213PHZmkz |
| 37576 | { 9580, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead468014819ULL }, // Inst #9580 = VFMADD213PHZmk |
| 37577 | { 9579, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed468014819ULL }, // Inst #9579 = VFMADD213PHZmbkz |
| 37578 | { 9578, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad468014819ULL }, // Inst #9578 = VFMADD213PHZmbk |
| 37579 | { 9577, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d468014819ULL }, // Inst #9577 = VFMADD213PHZmb |
| 37580 | { 9576, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d468014819ULL }, // Inst #9576 = VFMADD213PHZm |
| 37581 | { 9575, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d468014829ULL }, // Inst #9575 = VFMADD213PHZ256rkz |
| 37582 | { 9574, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d468014829ULL }, // Inst #9574 = VFMADD213PHZ256rk |
| 37583 | { 9573, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d468014829ULL }, // Inst #9573 = VFMADD213PHZ256r |
| 37584 | { 9572, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d468014819ULL }, // Inst #9572 = VFMADD213PHZ256mkz |
| 37585 | { 9571, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d468014819ULL }, // Inst #9571 = VFMADD213PHZ256mk |
| 37586 | { 9570, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d468014819ULL }, // Inst #9570 = VFMADD213PHZ256mbkz |
| 37587 | { 9569, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d468014819ULL }, // Inst #9569 = VFMADD213PHZ256mbk |
| 37588 | { 9568, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d468014819ULL }, // Inst #9568 = VFMADD213PHZ256mb |
| 37589 | { 9567, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d468014819ULL }, // Inst #9567 = VFMADD213PHZ256m |
| 37590 | { 9566, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d468014829ULL }, // Inst #9566 = VFMADD213PHZ128rkz |
| 37591 | { 9565, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d468014829ULL }, // Inst #9565 = VFMADD213PHZ128rk |
| 37592 | { 9564, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d468014829ULL }, // Inst #9564 = VFMADD213PHZ128r |
| 37593 | { 9563, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d468014819ULL }, // Inst #9563 = VFMADD213PHZ128mkz |
| 37594 | { 9562, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d468014819ULL }, // Inst #9562 = VFMADD213PHZ128mk |
| 37595 | { 9561, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d468014819ULL }, // Inst #9561 = VFMADD213PHZ128mbkz |
| 37596 | { 9560, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d468014819ULL }, // Inst #9560 = VFMADD213PHZ128mbk |
| 37597 | { 9559, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d468014819ULL }, // Inst #9559 = VFMADD213PHZ128mb |
| 37598 | { 9558, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d468014819ULL }, // Inst #9558 = VFMADD213PHZ128m |
| 37599 | { 9557, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd430024829ULL }, // Inst #9557 = VFMADD213PDr |
| 37600 | { 9556, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd430024819ULL }, // Inst #9556 = VFMADD213PDm |
| 37601 | { 9555, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed470024829ULL }, // Inst #9555 = VFMADD213PDZrkz |
| 37602 | { 9554, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead470024829ULL }, // Inst #9554 = VFMADD213PDZrk |
| 37603 | { 9553, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ed470024829ULL }, // Inst #9553 = VFMADD213PDZrbkz |
| 37604 | { 9552, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ad470024829ULL }, // Inst #9552 = VFMADD213PDZrbk |
| 37605 | { 9551, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198d470024829ULL }, // Inst #9551 = VFMADD213PDZrb |
| 37606 | { 9550, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d470024829ULL }, // Inst #9550 = VFMADD213PDZr |
| 37607 | { 9549, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed470024819ULL }, // Inst #9549 = VFMADD213PDZmkz |
| 37608 | { 9548, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead470024819ULL }, // Inst #9548 = VFMADD213PDZmk |
| 37609 | { 9547, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed470024819ULL }, // Inst #9547 = VFMADD213PDZmbkz |
| 37610 | { 9546, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad470024819ULL }, // Inst #9546 = VFMADD213PDZmbk |
| 37611 | { 9545, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d470024819ULL }, // Inst #9545 = VFMADD213PDZmb |
| 37612 | { 9544, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d470024819ULL }, // Inst #9544 = VFMADD213PDZm |
| 37613 | { 9543, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d470024829ULL }, // Inst #9543 = VFMADD213PDZ256rkz |
| 37614 | { 9542, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d470024829ULL }, // Inst #9542 = VFMADD213PDZ256rk |
| 37615 | { 9541, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d470024829ULL }, // Inst #9541 = VFMADD213PDZ256r |
| 37616 | { 9540, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d470024819ULL }, // Inst #9540 = VFMADD213PDZ256mkz |
| 37617 | { 9539, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d470024819ULL }, // Inst #9539 = VFMADD213PDZ256mk |
| 37618 | { 9538, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d470024819ULL }, // Inst #9538 = VFMADD213PDZ256mbkz |
| 37619 | { 9537, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d470024819ULL }, // Inst #9537 = VFMADD213PDZ256mbk |
| 37620 | { 9536, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d470024819ULL }, // Inst #9536 = VFMADD213PDZ256mb |
| 37621 | { 9535, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d470024819ULL }, // Inst #9535 = VFMADD213PDZ256m |
| 37622 | { 9534, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d470024829ULL }, // Inst #9534 = VFMADD213PDZ128rkz |
| 37623 | { 9533, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d470024829ULL }, // Inst #9533 = VFMADD213PDZ128rk |
| 37624 | { 9532, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d470024829ULL }, // Inst #9532 = VFMADD213PDZ128r |
| 37625 | { 9531, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d470024819ULL }, // Inst #9531 = VFMADD213PDZ128mkz |
| 37626 | { 9530, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d470024819ULL }, // Inst #9530 = VFMADD213PDZ128mk |
| 37627 | { 9529, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d470024819ULL }, // Inst #9529 = VFMADD213PDZ128mbkz |
| 37628 | { 9528, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d470024819ULL }, // Inst #9528 = VFMADD213PDZ128mbk |
| 37629 | { 9527, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d470024819ULL }, // Inst #9527 = VFMADD213PDZ128mb |
| 37630 | { 9526, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d470024819ULL }, // Inst #9526 = VFMADD213PDZ128m |
| 37631 | { 9525, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d430024829ULL }, // Inst #9525 = VFMADD213PDYr |
| 37632 | { 9524, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d430024819ULL }, // Inst #9524 = VFMADD213PDYm |
| 37633 | { 9523, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeed468014029ULL }, // Inst #9523 = VFMADD213BF16Zrkz |
| 37634 | { 9522, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xead468014029ULL }, // Inst #9522 = VFMADD213BF16Zrk |
| 37635 | { 9521, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8d468014029ULL }, // Inst #9521 = VFMADD213BF16Zr |
| 37636 | { 9520, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeed468014019ULL }, // Inst #9520 = VFMADD213BF16Zmkz |
| 37637 | { 9519, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xead468014019ULL }, // Inst #9519 = VFMADD213BF16Zmk |
| 37638 | { 9518, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5ed468014019ULL }, // Inst #9518 = VFMADD213BF16Zmbkz |
| 37639 | { 9517, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5ad468014019ULL }, // Inst #9517 = VFMADD213BF16Zmbk |
| 37640 | { 9516, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58d468014019ULL }, // Inst #9516 = VFMADD213BF16Zmb |
| 37641 | { 9515, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8d468014019ULL }, // Inst #9515 = VFMADD213BF16Zm |
| 37642 | { 9514, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7d468014029ULL }, // Inst #9514 = VFMADD213BF16Z256rkz |
| 37643 | { 9513, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3d468014029ULL }, // Inst #9513 = VFMADD213BF16Z256rk |
| 37644 | { 9512, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1d468014029ULL }, // Inst #9512 = VFMADD213BF16Z256r |
| 37645 | { 9511, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7d468014019ULL }, // Inst #9511 = VFMADD213BF16Z256mkz |
| 37646 | { 9510, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3d468014019ULL }, // Inst #9510 = VFMADD213BF16Z256mk |
| 37647 | { 9509, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57d468014019ULL }, // Inst #9509 = VFMADD213BF16Z256mbkz |
| 37648 | { 9508, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53d468014019ULL }, // Inst #9508 = VFMADD213BF16Z256mbk |
| 37649 | { 9507, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51d468014019ULL }, // Inst #9507 = VFMADD213BF16Z256mb |
| 37650 | { 9506, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1d468014019ULL }, // Inst #9506 = VFMADD213BF16Z256m |
| 37651 | { 9505, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6d468014029ULL }, // Inst #9505 = VFMADD213BF16Z128rkz |
| 37652 | { 9504, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2d468014029ULL }, // Inst #9504 = VFMADD213BF16Z128rk |
| 37653 | { 9503, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0d468014029ULL }, // Inst #9503 = VFMADD213BF16Z128r |
| 37654 | { 9502, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6d468014019ULL }, // Inst #9502 = VFMADD213BF16Z128mkz |
| 37655 | { 9501, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2d468014019ULL }, // Inst #9501 = VFMADD213BF16Z128mk |
| 37656 | { 9500, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56d468014019ULL }, // Inst #9500 = VFMADD213BF16Z128mbkz |
| 37657 | { 9499, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52d468014019ULL }, // Inst #9499 = VFMADD213BF16Z128mbk |
| 37658 | { 9498, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50d468014019ULL }, // Inst #9498 = VFMADD213BF16Z128mb |
| 37659 | { 9497, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0d468014019ULL }, // Inst #9497 = VFMADD213BF16Z128m |
| 37660 | { 9496, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcca8004829ULL }, // Inst #9496 = VFMADD132SSr_Int |
| 37661 | { 9495, 4, 1, 0, 444, 1, 0, 4062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcca8004829ULL }, // Inst #9495 = VFMADD132SSr |
| 37662 | { 9494, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcca8004819ULL }, // Inst #9494 = VFMADD132SSm_Int |
| 37663 | { 9493, 8, 1, 0, 443, 1, 0, 4054, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcca8004819ULL }, // Inst #9493 = VFMADD132SSm |
| 37664 | { 9492, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cce8004829ULL }, // Inst #9492 = VFMADD132SSZrkz_Int |
| 37665 | { 9491, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cce8004829ULL }, // Inst #9491 = VFMADD132SSZrk_Int |
| 37666 | { 9490, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x176cce8004829ULL }, // Inst #9490 = VFMADD132SSZrbkz_Int |
| 37667 | { 9489, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x172cce8004829ULL }, // Inst #9489 = VFMADD132SSZrbk_Int |
| 37668 | { 9488, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170cce8004829ULL }, // Inst #9488 = VFMADD132SSZrb_Int |
| 37669 | { 9487, 5, 1, 0, 444, 1, 0, 4049, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x170cce8004829ULL }, // Inst #9487 = VFMADD132SSZrb |
| 37670 | { 9486, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cce8004829ULL }, // Inst #9486 = VFMADD132SSZr_Int |
| 37671 | { 9485, 4, 1, 0, 444, 1, 0, 4045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cce8004829ULL }, // Inst #9485 = VFMADD132SSZr |
| 37672 | { 9484, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cce8004819ULL }, // Inst #9484 = VFMADD132SSZmkz_Int |
| 37673 | { 9483, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cce8004819ULL }, // Inst #9483 = VFMADD132SSZmk_Int |
| 37674 | { 9482, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cce8004819ULL }, // Inst #9482 = VFMADD132SSZm_Int |
| 37675 | { 9481, 8, 1, 0, 443, 1, 0, 4037, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cce8004819ULL }, // Inst #9481 = VFMADD132SSZm |
| 37676 | { 9480, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cce8014829ULL }, // Inst #9480 = VFMADD132SHZrkz_Int |
| 37677 | { 9479, 5, 1, 0, 1909, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cce8014829ULL }, // Inst #9479 = VFMADD132SHZrk_Int |
| 37678 | { 9478, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x156cce8014829ULL }, // Inst #9478 = VFMADD132SHZrbkz_Int |
| 37679 | { 9477, 6, 1, 0, 1909, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x152cce8014829ULL }, // Inst #9477 = VFMADD132SHZrbk_Int |
| 37680 | { 9476, 5, 1, 0, 1781, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150cce8014829ULL }, // Inst #9476 = VFMADD132SHZrb_Int |
| 37681 | { 9475, 5, 1, 0, 1781, 1, 0, 4032, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x150cce8014829ULL }, // Inst #9475 = VFMADD132SHZrb |
| 37682 | { 9474, 4, 1, 0, 1781, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cce8014829ULL }, // Inst #9474 = VFMADD132SHZr_Int |
| 37683 | { 9473, 4, 1, 0, 1781, 1, 0, 4028, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cce8014829ULL }, // Inst #9473 = VFMADD132SHZr |
| 37684 | { 9472, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cce8014819ULL }, // Inst #9472 = VFMADD132SHZmkz_Int |
| 37685 | { 9471, 9, 1, 0, 1771, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cce8014819ULL }, // Inst #9471 = VFMADD132SHZmk_Int |
| 37686 | { 9470, 8, 1, 0, 1771, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cce8014819ULL }, // Inst #9470 = VFMADD132SHZm_Int |
| 37687 | { 9469, 8, 1, 0, 1771, 1, 0, 4020, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cce8014819ULL }, // Inst #9469 = VFMADD132SHZm |
| 37688 | { 9468, 4, 1, 0, 444, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xccb0024829ULL }, // Inst #9468 = VFMADD132SDr_Int |
| 37689 | { 9467, 4, 1, 0, 444, 1, 0, 4016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xccb0024829ULL }, // Inst #9467 = VFMADD132SDr |
| 37690 | { 9466, 8, 1, 0, 443, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xccb0024819ULL }, // Inst #9466 = VFMADD132SDm_Int |
| 37691 | { 9465, 8, 1, 0, 443, 1, 0, 4008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xccb0024819ULL }, // Inst #9465 = VFMADD132SDm |
| 37692 | { 9464, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86ccf0024829ULL }, // Inst #9464 = VFMADD132SDZrkz_Int |
| 37693 | { 9463, 5, 1, 0, 444, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82ccf0024829ULL }, // Inst #9463 = VFMADD132SDZrk_Int |
| 37694 | { 9462, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x196ccf0024829ULL }, // Inst #9462 = VFMADD132SDZrbkz_Int |
| 37695 | { 9461, 6, 1, 0, 444, 1, 0, 1989, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x192ccf0024829ULL }, // Inst #9461 = VFMADD132SDZrbk_Int |
| 37696 | { 9460, 5, 1, 0, 444, 1, 0, 4003, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190ccf0024829ULL }, // Inst #9460 = VFMADD132SDZrb_Int |
| 37697 | { 9459, 5, 1, 0, 444, 1, 0, 3998, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x190ccf0024829ULL }, // Inst #9459 = VFMADD132SDZrb |
| 37698 | { 9458, 4, 1, 0, 444, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ccf0024829ULL }, // Inst #9458 = VFMADD132SDZr_Int |
| 37699 | { 9457, 4, 1, 0, 444, 1, 0, 3994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ccf0024829ULL }, // Inst #9457 = VFMADD132SDZr |
| 37700 | { 9456, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86ccf0024819ULL }, // Inst #9456 = VFMADD132SDZmkz_Int |
| 37701 | { 9455, 9, 1, 0, 443, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82ccf0024819ULL }, // Inst #9455 = VFMADD132SDZmk_Int |
| 37702 | { 9454, 8, 1, 0, 443, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ccf0024819ULL }, // Inst #9454 = VFMADD132SDZm_Int |
| 37703 | { 9453, 8, 1, 0, 443, 1, 0, 3986, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ccf0024819ULL }, // Inst #9453 = VFMADD132SDZm |
| 37704 | { 9452, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcc28004829ULL }, // Inst #9452 = VFMADD132PSr |
| 37705 | { 9451, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcc28004819ULL }, // Inst #9451 = VFMADD132PSm |
| 37706 | { 9450, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc68004829ULL }, // Inst #9450 = VFMADD132PSZrkz |
| 37707 | { 9449, 5, 1, 0, 436, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacc68004829ULL }, // Inst #9449 = VFMADD132PSZrk |
| 37708 | { 9448, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17ecc68004829ULL }, // Inst #9448 = VFMADD132PSZrbkz |
| 37709 | { 9447, 6, 1, 0, 436, 1, 0, 1947, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x17acc68004829ULL }, // Inst #9447 = VFMADD132PSZrbk |
| 37710 | { 9446, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x178cc68004829ULL }, // Inst #9446 = VFMADD132PSZrb |
| 37711 | { 9445, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc68004829ULL }, // Inst #9445 = VFMADD132PSZr |
| 37712 | { 9444, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc68004819ULL }, // Inst #9444 = VFMADD132PSZmkz |
| 37713 | { 9443, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacc68004819ULL }, // Inst #9443 = VFMADD132PSZmk |
| 37714 | { 9442, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ecc68004819ULL }, // Inst #9442 = VFMADD132PSZmbkz |
| 37715 | { 9441, 9, 1, 0, 442, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7acc68004819ULL }, // Inst #9441 = VFMADD132PSZmbk |
| 37716 | { 9440, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78cc68004819ULL }, // Inst #9440 = VFMADD132PSZmb |
| 37717 | { 9439, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc68004819ULL }, // Inst #9439 = VFMADD132PSZm |
| 37718 | { 9438, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc68004829ULL }, // Inst #9438 = VFMADD132PSZ256rkz |
| 37719 | { 9437, 5, 1, 0, 434, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cc68004829ULL }, // Inst #9437 = VFMADD132PSZ256rk |
| 37720 | { 9436, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc68004829ULL }, // Inst #9436 = VFMADD132PSZ256r |
| 37721 | { 9435, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc68004819ULL }, // Inst #9435 = VFMADD132PSZ256mkz |
| 37722 | { 9434, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cc68004819ULL }, // Inst #9434 = VFMADD132PSZ256mk |
| 37723 | { 9433, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77cc68004819ULL }, // Inst #9433 = VFMADD132PSZ256mbkz |
| 37724 | { 9432, 9, 1, 0, 441, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73cc68004819ULL }, // Inst #9432 = VFMADD132PSZ256mbk |
| 37725 | { 9431, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71cc68004819ULL }, // Inst #9431 = VFMADD132PSZ256mb |
| 37726 | { 9430, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc68004819ULL }, // Inst #9430 = VFMADD132PSZ256m |
| 37727 | { 9429, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc68004829ULL }, // Inst #9429 = VFMADD132PSZ128rkz |
| 37728 | { 9428, 5, 1, 0, 432, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cc68004829ULL }, // Inst #9428 = VFMADD132PSZ128rk |
| 37729 | { 9427, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc68004829ULL }, // Inst #9427 = VFMADD132PSZ128r |
| 37730 | { 9426, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc68004819ULL }, // Inst #9426 = VFMADD132PSZ128mkz |
| 37731 | { 9425, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cc68004819ULL }, // Inst #9425 = VFMADD132PSZ128mk |
| 37732 | { 9424, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76cc68004819ULL }, // Inst #9424 = VFMADD132PSZ128mbkz |
| 37733 | { 9423, 9, 1, 0, 440, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72cc68004819ULL }, // Inst #9423 = VFMADD132PSZ128mbk |
| 37734 | { 9422, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70cc68004819ULL }, // Inst #9422 = VFMADD132PSZ128mb |
| 37735 | { 9421, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc68004819ULL }, // Inst #9421 = VFMADD132PSZ128m |
| 37736 | { 9420, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cc28004829ULL }, // Inst #9420 = VFMADD132PSYr |
| 37737 | { 9419, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cc28004819ULL }, // Inst #9419 = VFMADD132PSYm |
| 37738 | { 9418, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc68014829ULL }, // Inst #9418 = VFMADD132PHZrkz |
| 37739 | { 9417, 5, 1, 0, 1928, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacc68014829ULL }, // Inst #9417 = VFMADD132PHZrk |
| 37740 | { 9416, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15ecc68014829ULL }, // Inst #9416 = VFMADD132PHZrbkz |
| 37741 | { 9415, 6, 1, 0, 1928, 1, 0, 1876, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x15acc68014829ULL }, // Inst #9415 = VFMADD132PHZrbk |
| 37742 | { 9414, 5, 1, 0, 1921, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x158cc68014829ULL }, // Inst #9414 = VFMADD132PHZrb |
| 37743 | { 9413, 4, 1, 0, 1921, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc68014829ULL }, // Inst #9413 = VFMADD132PHZr |
| 37744 | { 9412, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc68014819ULL }, // Inst #9412 = VFMADD132PHZmkz |
| 37745 | { 9411, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacc68014819ULL }, // Inst #9411 = VFMADD132PHZmk |
| 37746 | { 9410, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ecc68014819ULL }, // Inst #9410 = VFMADD132PHZmbkz |
| 37747 | { 9409, 9, 1, 0, 442, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5acc68014819ULL }, // Inst #9409 = VFMADD132PHZmbk |
| 37748 | { 9408, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58cc68014819ULL }, // Inst #9408 = VFMADD132PHZmb |
| 37749 | { 9407, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc68014819ULL }, // Inst #9407 = VFMADD132PHZm |
| 37750 | { 9406, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc68014829ULL }, // Inst #9406 = VFMADD132PHZ256rkz |
| 37751 | { 9405, 5, 1, 0, 1908, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cc68014829ULL }, // Inst #9405 = VFMADD132PHZ256rk |
| 37752 | { 9404, 4, 1, 0, 1780, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc68014829ULL }, // Inst #9404 = VFMADD132PHZ256r |
| 37753 | { 9403, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc68014819ULL }, // Inst #9403 = VFMADD132PHZ256mkz |
| 37754 | { 9402, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cc68014819ULL }, // Inst #9402 = VFMADD132PHZ256mk |
| 37755 | { 9401, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57cc68014819ULL }, // Inst #9401 = VFMADD132PHZ256mbkz |
| 37756 | { 9400, 9, 1, 0, 441, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53cc68014819ULL }, // Inst #9400 = VFMADD132PHZ256mbk |
| 37757 | { 9399, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51cc68014819ULL }, // Inst #9399 = VFMADD132PHZ256mb |
| 37758 | { 9398, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc68014819ULL }, // Inst #9398 = VFMADD132PHZ256m |
| 37759 | { 9397, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc68014829ULL }, // Inst #9397 = VFMADD132PHZ128rkz |
| 37760 | { 9396, 5, 1, 0, 1907, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cc68014829ULL }, // Inst #9396 = VFMADD132PHZ128rk |
| 37761 | { 9395, 4, 1, 0, 1779, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc68014829ULL }, // Inst #9395 = VFMADD132PHZ128r |
| 37762 | { 9394, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc68014819ULL }, // Inst #9394 = VFMADD132PHZ128mkz |
| 37763 | { 9393, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cc68014819ULL }, // Inst #9393 = VFMADD132PHZ128mk |
| 37764 | { 9392, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56cc68014819ULL }, // Inst #9392 = VFMADD132PHZ128mbkz |
| 37765 | { 9391, 9, 1, 0, 1770, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52cc68014819ULL }, // Inst #9391 = VFMADD132PHZ128mbk |
| 37766 | { 9390, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50cc68014819ULL }, // Inst #9390 = VFMADD132PHZ128mb |
| 37767 | { 9389, 8, 1, 0, 1770, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc68014819ULL }, // Inst #9389 = VFMADD132PHZ128m |
| 37768 | { 9388, 4, 1, 0, 432, 1, 0, 3982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcc30024829ULL }, // Inst #9388 = VFMADD132PDr |
| 37769 | { 9387, 8, 1, 0, 440, 1, 0, 3974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcc30024819ULL }, // Inst #9387 = VFMADD132PDm |
| 37770 | { 9386, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc70024829ULL }, // Inst #9386 = VFMADD132PDZrkz |
| 37771 | { 9385, 5, 1, 0, 436, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacc70024829ULL }, // Inst #9385 = VFMADD132PDZrk |
| 37772 | { 9384, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19ecc70024829ULL }, // Inst #9384 = VFMADD132PDZrbkz |
| 37773 | { 9383, 6, 1, 0, 436, 1, 0, 1846, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x19acc70024829ULL }, // Inst #9383 = VFMADD132PDZrbk |
| 37774 | { 9382, 5, 1, 0, 436, 1, 0, 3969, X86ImpOpBase + 78, 0|(1ULL<<MCID::Commutable), 0x198cc70024829ULL }, // Inst #9382 = VFMADD132PDZrb |
| 37775 | { 9381, 4, 1, 0, 436, 1, 0, 3585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc70024829ULL }, // Inst #9381 = VFMADD132PDZr |
| 37776 | { 9380, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc70024819ULL }, // Inst #9380 = VFMADD132PDZmkz |
| 37777 | { 9379, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacc70024819ULL }, // Inst #9379 = VFMADD132PDZmk |
| 37778 | { 9378, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ecc70024819ULL }, // Inst #9378 = VFMADD132PDZmbkz |
| 37779 | { 9377, 9, 1, 0, 442, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9acc70024819ULL }, // Inst #9377 = VFMADD132PDZmbk |
| 37780 | { 9376, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98cc70024819ULL }, // Inst #9376 = VFMADD132PDZmb |
| 37781 | { 9375, 8, 1, 0, 442, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc70024819ULL }, // Inst #9375 = VFMADD132PDZm |
| 37782 | { 9374, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc70024829ULL }, // Inst #9374 = VFMADD132PDZ256rkz |
| 37783 | { 9373, 5, 1, 0, 434, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cc70024829ULL }, // Inst #9373 = VFMADD132PDZ256rk |
| 37784 | { 9372, 4, 1, 0, 434, 1, 0, 3581, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc70024829ULL }, // Inst #9372 = VFMADD132PDZ256r |
| 37785 | { 9371, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc70024819ULL }, // Inst #9371 = VFMADD132PDZ256mkz |
| 37786 | { 9370, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cc70024819ULL }, // Inst #9370 = VFMADD132PDZ256mk |
| 37787 | { 9369, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97cc70024819ULL }, // Inst #9369 = VFMADD132PDZ256mbkz |
| 37788 | { 9368, 9, 1, 0, 441, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93cc70024819ULL }, // Inst #9368 = VFMADD132PDZ256mbk |
| 37789 | { 9367, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91cc70024819ULL }, // Inst #9367 = VFMADD132PDZ256mb |
| 37790 | { 9366, 8, 1, 0, 441, 1, 0, 3573, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc70024819ULL }, // Inst #9366 = VFMADD132PDZ256m |
| 37791 | { 9365, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc70024829ULL }, // Inst #9365 = VFMADD132PDZ128rkz |
| 37792 | { 9364, 5, 1, 0, 432, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cc70024829ULL }, // Inst #9364 = VFMADD132PDZ128rk |
| 37793 | { 9363, 4, 1, 0, 432, 1, 0, 3569, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc70024829ULL }, // Inst #9363 = VFMADD132PDZ128r |
| 37794 | { 9362, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc70024819ULL }, // Inst #9362 = VFMADD132PDZ128mkz |
| 37795 | { 9361, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cc70024819ULL }, // Inst #9361 = VFMADD132PDZ128mk |
| 37796 | { 9360, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96cc70024819ULL }, // Inst #9360 = VFMADD132PDZ128mbkz |
| 37797 | { 9359, 9, 1, 0, 440, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92cc70024819ULL }, // Inst #9359 = VFMADD132PDZ128mbk |
| 37798 | { 9358, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90cc70024819ULL }, // Inst #9358 = VFMADD132PDZ128mb |
| 37799 | { 9357, 8, 1, 0, 440, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc70024819ULL }, // Inst #9357 = VFMADD132PDZ128m |
| 37800 | { 9356, 4, 1, 0, 434, 1, 0, 3965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cc30024829ULL }, // Inst #9356 = VFMADD132PDYr |
| 37801 | { 9355, 8, 1, 0, 441, 1, 0, 3957, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cc30024819ULL }, // Inst #9355 = VFMADD132PDYm |
| 37802 | { 9354, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeecc68014029ULL }, // Inst #9354 = VFMADD132BF16Zrkz |
| 37803 | { 9353, 5, 1, 0, 436, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeacc68014029ULL }, // Inst #9353 = VFMADD132BF16Zrk |
| 37804 | { 9352, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8cc68014029ULL }, // Inst #9352 = VFMADD132BF16Zr |
| 37805 | { 9351, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeecc68014019ULL }, // Inst #9351 = VFMADD132BF16Zmkz |
| 37806 | { 9350, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeacc68014019ULL }, // Inst #9350 = VFMADD132BF16Zmk |
| 37807 | { 9349, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x5ecc68014019ULL }, // Inst #9349 = VFMADD132BF16Zmbkz |
| 37808 | { 9348, 9, 1, 0, 442, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5acc68014019ULL }, // Inst #9348 = VFMADD132BF16Zmbk |
| 37809 | { 9347, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x58cc68014019ULL }, // Inst #9347 = VFMADD132BF16Zmb |
| 37810 | { 9346, 8, 1, 0, 442, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8cc68014019ULL }, // Inst #9346 = VFMADD132BF16Zm |
| 37811 | { 9345, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7cc68014029ULL }, // Inst #9345 = VFMADD132BF16Z256rkz |
| 37812 | { 9344, 5, 1, 0, 434, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3cc68014029ULL }, // Inst #9344 = VFMADD132BF16Z256rk |
| 37813 | { 9343, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1cc68014029ULL }, // Inst #9343 = VFMADD132BF16Z256r |
| 37814 | { 9342, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7cc68014019ULL }, // Inst #9342 = VFMADD132BF16Z256mkz |
| 37815 | { 9341, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3cc68014019ULL }, // Inst #9341 = VFMADD132BF16Z256mk |
| 37816 | { 9340, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x57cc68014019ULL }, // Inst #9340 = VFMADD132BF16Z256mbkz |
| 37817 | { 9339, 9, 1, 0, 441, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53cc68014019ULL }, // Inst #9339 = VFMADD132BF16Z256mbk |
| 37818 | { 9338, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x51cc68014019ULL }, // Inst #9338 = VFMADD132BF16Z256mb |
| 37819 | { 9337, 8, 1, 0, 441, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1cc68014019ULL }, // Inst #9337 = VFMADD132BF16Z256m |
| 37820 | { 9336, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6cc68014029ULL }, // Inst #9336 = VFMADD132BF16Z128rkz |
| 37821 | { 9335, 5, 1, 0, 432, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2cc68014029ULL }, // Inst #9335 = VFMADD132BF16Z128rk |
| 37822 | { 9334, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0cc68014029ULL }, // Inst #9334 = VFMADD132BF16Z128r |
| 37823 | { 9333, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6cc68014019ULL }, // Inst #9333 = VFMADD132BF16Z128mkz |
| 37824 | { 9332, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2cc68014019ULL }, // Inst #9332 = VFMADD132BF16Z128mk |
| 37825 | { 9331, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x56cc68014019ULL }, // Inst #9331 = VFMADD132BF16Z128mbkz |
| 37826 | { 9330, 9, 1, 0, 440, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52cc68014019ULL }, // Inst #9330 = VFMADD132BF16Z128mbk |
| 37827 | { 9329, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x50cc68014019ULL }, // Inst #9329 = VFMADD132BF16Z128mb |
| 37828 | { 9328, 8, 1, 0, 440, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0cc68014019ULL }, // Inst #9328 = VFMADD132BF16Z128m |
| 37829 | { 9327, 6, 1, 0, 1072, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66aae8046829ULL }, // Inst #9327 = VFIXUPIMMSSZrrikz |
| 37830 | { 9326, 6, 1, 0, 1072, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62aae8046829ULL }, // Inst #9326 = VFIXUPIMMSSZrrik |
| 37831 | { 9325, 6, 1, 0, 2070, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x76aae8046829ULL }, // Inst #9325 = VFIXUPIMMSSZrribkz |
| 37832 | { 9324, 6, 1, 0, 2070, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x72aae8046829ULL }, // Inst #9324 = VFIXUPIMMSSZrribk |
| 37833 | { 9323, 5, 1, 0, 2070, 1, 0, 3908, X86ImpOpBase + 78, 0, 0x70aae8046829ULL }, // Inst #9323 = VFIXUPIMMSSZrrib |
| 37834 | { 9322, 5, 1, 0, 2065, 1, 0, 3908, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60aae8046829ULL }, // Inst #9322 = VFIXUPIMMSSZrri |
| 37835 | { 9321, 10, 1, 0, 2053, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66aae8046819ULL }, // Inst #9321 = VFIXUPIMMSSZrmikz |
| 37836 | { 9320, 10, 1, 0, 2053, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62aae8046819ULL }, // Inst #9320 = VFIXUPIMMSSZrmik |
| 37837 | { 9319, 9, 1, 0, 2053, 1, 0, 3899, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60aae8046819ULL }, // Inst #9319 = VFIXUPIMMSSZrmi |
| 37838 | { 9318, 6, 1, 0, 1072, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86aaf0066829ULL }, // Inst #9318 = VFIXUPIMMSDZrrikz |
| 37839 | { 9317, 6, 1, 0, 1072, 1, 0, 3951, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82aaf0066829ULL }, // Inst #9317 = VFIXUPIMMSDZrrik |
| 37840 | { 9316, 6, 1, 0, 2070, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x96aaf0066829ULL }, // Inst #9316 = VFIXUPIMMSDZrribkz |
| 37841 | { 9315, 6, 1, 0, 2070, 1, 0, 3951, X86ImpOpBase + 78, 0, 0x92aaf0066829ULL }, // Inst #9315 = VFIXUPIMMSDZrribk |
| 37842 | { 9314, 5, 1, 0, 2070, 1, 0, 3908, X86ImpOpBase + 78, 0, 0x90aaf0066829ULL }, // Inst #9314 = VFIXUPIMMSDZrrib |
| 37843 | { 9313, 5, 1, 0, 2065, 1, 0, 3908, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80aaf0066829ULL }, // Inst #9313 = VFIXUPIMMSDZrri |
| 37844 | { 9312, 10, 1, 0, 2053, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86aaf0066819ULL }, // Inst #9312 = VFIXUPIMMSDZrmikz |
| 37845 | { 9311, 10, 1, 0, 2053, 1, 0, 3941, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82aaf0066819ULL }, // Inst #9311 = VFIXUPIMMSDZrmik |
| 37846 | { 9310, 9, 1, 0, 2053, 1, 0, 3899, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aaf0066819ULL }, // Inst #9310 = VFIXUPIMMSDZrmi |
| 37847 | { 9309, 6, 1, 0, 1071, 1, 0, 2152, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaa68046829ULL }, // Inst #9309 = VFIXUPIMMPSZrrikz |
| 37848 | { 9308, 6, 1, 0, 1071, 1, 0, 2152, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaa68046829ULL }, // Inst #9308 = VFIXUPIMMPSZrrik |
| 37849 | { 9307, 6, 1, 0, 340, 1, 0, 2152, X86ImpOpBase + 78, 0, 0x7eaa68046829ULL }, // Inst #9307 = VFIXUPIMMPSZrribkz |
| 37850 | { 9306, 6, 1, 0, 340, 1, 0, 2152, X86ImpOpBase + 78, 0, 0x7aaa68046829ULL }, // Inst #9306 = VFIXUPIMMPSZrribk |
| 37851 | { 9305, 5, 1, 0, 340, 1, 0, 3936, X86ImpOpBase + 78, 0, 0x78aa68046829ULL }, // Inst #9305 = VFIXUPIMMPSZrrib |
| 37852 | { 9304, 5, 1, 0, 340, 1, 0, 3936, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aa68046829ULL }, // Inst #9304 = VFIXUPIMMPSZrri |
| 37853 | { 9303, 10, 1, 0, 339, 1, 0, 2133, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaa68046819ULL }, // Inst #9303 = VFIXUPIMMPSZrmikz |
| 37854 | { 9302, 10, 1, 0, 339, 1, 0, 2133, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaa68046819ULL }, // Inst #9302 = VFIXUPIMMPSZrmik |
| 37855 | { 9301, 9, 1, 0, 339, 1, 0, 3927, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aa68046819ULL }, // Inst #9301 = VFIXUPIMMPSZrmi |
| 37856 | { 9300, 10, 1, 0, 339, 1, 0, 2133, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eaa68046819ULL }, // Inst #9300 = VFIXUPIMMPSZrmbikz |
| 37857 | { 9299, 10, 1, 0, 339, 1, 0, 2133, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aaa68046819ULL }, // Inst #9299 = VFIXUPIMMPSZrmbik |
| 37858 | { 9298, 9, 1, 0, 339, 1, 0, 3927, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78aa68046819ULL }, // Inst #9298 = VFIXUPIMMPSZrmbi |
| 37859 | { 9297, 6, 1, 0, 1070, 1, 0, 2114, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aa68046829ULL }, // Inst #9297 = VFIXUPIMMPSZ256rrikz |
| 37860 | { 9296, 6, 1, 0, 1070, 1, 0, 2114, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aa68046829ULL }, // Inst #9296 = VFIXUPIMMPSZ256rrik |
| 37861 | { 9295, 5, 1, 0, 1070, 1, 0, 3922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aa68046829ULL }, // Inst #9295 = VFIXUPIMMPSZ256rri |
| 37862 | { 9294, 10, 1, 0, 337, 1, 0, 2095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aa68046819ULL }, // Inst #9294 = VFIXUPIMMPSZ256rmikz |
| 37863 | { 9293, 10, 1, 0, 337, 1, 0, 2095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aa68046819ULL }, // Inst #9293 = VFIXUPIMMPSZ256rmik |
| 37864 | { 9292, 9, 1, 0, 337, 1, 0, 3913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aa68046819ULL }, // Inst #9292 = VFIXUPIMMPSZ256rmi |
| 37865 | { 9291, 10, 1, 0, 337, 1, 0, 2095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77aa68046819ULL }, // Inst #9291 = VFIXUPIMMPSZ256rmbikz |
| 37866 | { 9290, 10, 1, 0, 337, 1, 0, 2095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73aa68046819ULL }, // Inst #9290 = VFIXUPIMMPSZ256rmbik |
| 37867 | { 9289, 9, 1, 0, 337, 1, 0, 3913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71aa68046819ULL }, // Inst #9289 = VFIXUPIMMPSZ256rmbi |
| 37868 | { 9288, 6, 1, 0, 1069, 1, 0, 2076, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aa68046829ULL }, // Inst #9288 = VFIXUPIMMPSZ128rrikz |
| 37869 | { 9287, 6, 1, 0, 1069, 1, 0, 2076, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aa68046829ULL }, // Inst #9287 = VFIXUPIMMPSZ128rrik |
| 37870 | { 9286, 5, 1, 0, 1069, 1, 0, 3908, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aa68046829ULL }, // Inst #9286 = VFIXUPIMMPSZ128rri |
| 37871 | { 9285, 10, 1, 0, 29, 1, 0, 2057, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aa68046819ULL }, // Inst #9285 = VFIXUPIMMPSZ128rmikz |
| 37872 | { 9284, 10, 1, 0, 29, 1, 0, 2057, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aa68046819ULL }, // Inst #9284 = VFIXUPIMMPSZ128rmik |
| 37873 | { 9283, 9, 1, 0, 29, 1, 0, 3899, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aa68046819ULL }, // Inst #9283 = VFIXUPIMMPSZ128rmi |
| 37874 | { 9282, 10, 1, 0, 29, 1, 0, 2057, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76aa68046819ULL }, // Inst #9282 = VFIXUPIMMPSZ128rmbikz |
| 37875 | { 9281, 10, 1, 0, 29, 1, 0, 2057, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72aa68046819ULL }, // Inst #9281 = VFIXUPIMMPSZ128rmbik |
| 37876 | { 9280, 9, 1, 0, 29, 1, 0, 3899, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70aa68046819ULL }, // Inst #9280 = VFIXUPIMMPSZ128rmbi |
| 37877 | { 9279, 6, 1, 0, 1071, 1, 0, 2242, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaa70066829ULL }, // Inst #9279 = VFIXUPIMMPDZrrikz |
| 37878 | { 9278, 6, 1, 0, 1071, 1, 0, 2242, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaa70066829ULL }, // Inst #9278 = VFIXUPIMMPDZrrik |
| 37879 | { 9277, 6, 1, 0, 340, 1, 0, 2242, X86ImpOpBase + 78, 0, 0x9eaa70066829ULL }, // Inst #9277 = VFIXUPIMMPDZrribkz |
| 37880 | { 9276, 6, 1, 0, 340, 1, 0, 2242, X86ImpOpBase + 78, 0, 0x9aaa70066829ULL }, // Inst #9276 = VFIXUPIMMPDZrribk |
| 37881 | { 9275, 5, 1, 0, 340, 1, 0, 3936, X86ImpOpBase + 78, 0, 0x98aa70066829ULL }, // Inst #9275 = VFIXUPIMMPDZrrib |
| 37882 | { 9274, 5, 1, 0, 340, 1, 0, 3936, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aa70066829ULL }, // Inst #9274 = VFIXUPIMMPDZrri |
| 37883 | { 9273, 10, 1, 0, 339, 1, 0, 2223, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaa70066819ULL }, // Inst #9273 = VFIXUPIMMPDZrmikz |
| 37884 | { 9272, 10, 1, 0, 339, 1, 0, 2223, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaa70066819ULL }, // Inst #9272 = VFIXUPIMMPDZrmik |
| 37885 | { 9271, 9, 1, 0, 339, 1, 0, 3927, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aa70066819ULL }, // Inst #9271 = VFIXUPIMMPDZrmi |
| 37886 | { 9270, 10, 1, 0, 339, 1, 0, 2223, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaa70066819ULL }, // Inst #9270 = VFIXUPIMMPDZrmbikz |
| 37887 | { 9269, 10, 1, 0, 339, 1, 0, 2223, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaa70066819ULL }, // Inst #9269 = VFIXUPIMMPDZrmbik |
| 37888 | { 9268, 9, 1, 0, 339, 1, 0, 3927, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98aa70066819ULL }, // Inst #9268 = VFIXUPIMMPDZrmbi |
| 37889 | { 9267, 6, 1, 0, 1070, 1, 0, 2212, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aa70066829ULL }, // Inst #9267 = VFIXUPIMMPDZ256rrikz |
| 37890 | { 9266, 6, 1, 0, 1070, 1, 0, 2212, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aa70066829ULL }, // Inst #9266 = VFIXUPIMMPDZ256rrik |
| 37891 | { 9265, 5, 1, 0, 1070, 1, 0, 3922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aa70066829ULL }, // Inst #9265 = VFIXUPIMMPDZ256rri |
| 37892 | { 9264, 10, 1, 0, 337, 1, 0, 2193, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aa70066819ULL }, // Inst #9264 = VFIXUPIMMPDZ256rmikz |
| 37893 | { 9263, 10, 1, 0, 337, 1, 0, 2193, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aa70066819ULL }, // Inst #9263 = VFIXUPIMMPDZ256rmik |
| 37894 | { 9262, 9, 1, 0, 337, 1, 0, 3913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aa70066819ULL }, // Inst #9262 = VFIXUPIMMPDZ256rmi |
| 37895 | { 9261, 10, 1, 0, 337, 1, 0, 2193, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97aa70066819ULL }, // Inst #9261 = VFIXUPIMMPDZ256rmbikz |
| 37896 | { 9260, 10, 1, 0, 337, 1, 0, 2193, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93aa70066819ULL }, // Inst #9260 = VFIXUPIMMPDZ256rmbik |
| 37897 | { 9259, 9, 1, 0, 337, 1, 0, 3913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91aa70066819ULL }, // Inst #9259 = VFIXUPIMMPDZ256rmbi |
| 37898 | { 9258, 6, 1, 0, 1069, 1, 0, 2182, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aa70066829ULL }, // Inst #9258 = VFIXUPIMMPDZ128rrikz |
| 37899 | { 9257, 6, 1, 0, 1069, 1, 0, 2182, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aa70066829ULL }, // Inst #9257 = VFIXUPIMMPDZ128rrik |
| 37900 | { 9256, 5, 1, 0, 1069, 1, 0, 3908, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aa70066829ULL }, // Inst #9256 = VFIXUPIMMPDZ128rri |
| 37901 | { 9255, 10, 1, 0, 29, 1, 0, 2163, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aa70066819ULL }, // Inst #9255 = VFIXUPIMMPDZ128rmikz |
| 37902 | { 9254, 10, 1, 0, 29, 1, 0, 2163, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aa70066819ULL }, // Inst #9254 = VFIXUPIMMPDZ128rmik |
| 37903 | { 9253, 9, 1, 0, 29, 1, 0, 3899, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aa70066819ULL }, // Inst #9253 = VFIXUPIMMPDZ128rmi |
| 37904 | { 9252, 10, 1, 0, 29, 1, 0, 2163, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96aa70066819ULL }, // Inst #9252 = VFIXUPIMMPDZ128rmbikz |
| 37905 | { 9251, 10, 1, 0, 29, 1, 0, 2163, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92aa70066819ULL }, // Inst #9251 = VFIXUPIMMPDZ128rmbik |
| 37906 | { 9250, 9, 1, 0, 29, 1, 0, 3899, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90aa70066819ULL }, // Inst #9250 = VFIXUPIMMPDZ128rmbi |
| 37907 | { 9249, 4, 1, 0, 2221, 1, 0, 3895, X86ImpOpBase + 78, 0, 0x66ebe0015829ULL }, // Inst #9249 = VFCMULCSHZrrkz |
| 37908 | { 9248, 5, 1, 0, 2221, 1, 0, 3798, X86ImpOpBase + 78, 0, 0x62ebe0015829ULL }, // Inst #9248 = VFCMULCSHZrrk |
| 37909 | { 9247, 5, 1, 0, 2221, 1, 0, 3890, X86ImpOpBase + 78, 0, 0x176ebe0015829ULL }, // Inst #9247 = VFCMULCSHZrrbkz |
| 37910 | { 9246, 6, 1, 0, 2221, 1, 0, 3792, X86ImpOpBase + 78, 0, 0x172ebe0015829ULL }, // Inst #9246 = VFCMULCSHZrrbk |
| 37911 | { 9245, 4, 1, 0, 2213, 1, 0, 3886, X86ImpOpBase + 78, 0, 0x170ebe0015829ULL }, // Inst #9245 = VFCMULCSHZrrb |
| 37912 | { 9244, 3, 1, 0, 2213, 1, 0, 3818, X86ImpOpBase + 78, 0, 0x60ebe0015829ULL }, // Inst #9244 = VFCMULCSHZrr |
| 37913 | { 9243, 8, 1, 0, 2211, 1, 0, 3878, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x66ebe0015819ULL }, // Inst #9243 = VFCMULCSHZrmkz |
| 37914 | { 9242, 9, 1, 0, 2211, 1, 0, 3778, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x62ebe0015819ULL }, // Inst #9242 = VFCMULCSHZrmk |
| 37915 | { 9241, 7, 1, 0, 2202, 1, 0, 3803, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x60ebe0015819ULL }, // Inst #9241 = VFCMULCSHZrm |
| 37916 | { 9240, 4, 1, 0, 2232, 1, 0, 3874, X86ImpOpBase + 78, 0, 0xeeeb68015829ULL }, // Inst #9240 = VFCMULCPHZrrkz |
| 37917 | { 9239, 5, 1, 0, 2232, 1, 0, 3773, X86ImpOpBase + 78, 0, 0xeaeb68015829ULL }, // Inst #9239 = VFCMULCPHZrrk |
| 37918 | { 9238, 5, 1, 0, 2232, 1, 0, 3869, X86ImpOpBase + 78, 0, 0x17eeb68015829ULL }, // Inst #9238 = VFCMULCPHZrrbkz |
| 37919 | { 9237, 6, 1, 0, 2232, 1, 0, 3767, X86ImpOpBase + 78, 0, 0x17aeb68015829ULL }, // Inst #9237 = VFCMULCPHZrrbk |
| 37920 | { 9236, 4, 1, 0, 2229, 1, 0, 3865, X86ImpOpBase + 78, 0, 0x178eb68015829ULL }, // Inst #9236 = VFCMULCPHZrrb |
| 37921 | { 9235, 3, 1, 0, 2229, 1, 0, 3862, X86ImpOpBase + 78, 0, 0xe8eb68015829ULL }, // Inst #9235 = VFCMULCPHZrr |
| 37922 | { 9234, 8, 1, 0, 2228, 1, 0, 3854, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeeeb68015819ULL }, // Inst #9234 = VFCMULCPHZrmkz |
| 37923 | { 9233, 9, 1, 0, 2228, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeaeb68015819ULL }, // Inst #9233 = VFCMULCPHZrmk |
| 37924 | { 9232, 8, 1, 0, 2228, 1, 0, 3854, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7eeb68015819ULL }, // Inst #9232 = VFCMULCPHZrmbkz |
| 37925 | { 9231, 9, 1, 0, 2228, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7aeb68015819ULL }, // Inst #9231 = VFCMULCPHZrmbk |
| 37926 | { 9230, 7, 1, 0, 2224, 1, 0, 3847, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x78eb68015819ULL }, // Inst #9230 = VFCMULCPHZrmb |
| 37927 | { 9229, 7, 1, 0, 2224, 1, 0, 3847, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe8eb68015819ULL }, // Inst #9229 = VFCMULCPHZrm |
| 37928 | { 9228, 4, 1, 0, 2222, 1, 0, 3843, X86ImpOpBase + 78, 0, 0xc7eb68015829ULL }, // Inst #9228 = VFCMULCPHZ256rrkz |
| 37929 | { 9227, 5, 1, 0, 2222, 1, 0, 3736, X86ImpOpBase + 78, 0, 0xc3eb68015829ULL }, // Inst #9227 = VFCMULCPHZ256rrk |
| 37930 | { 9226, 3, 1, 0, 2214, 1, 0, 3840, X86ImpOpBase + 78, 0, 0xc1eb68015829ULL }, // Inst #9226 = VFCMULCPHZ256rr |
| 37931 | { 9225, 8, 1, 0, 2212, 1, 0, 3832, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc7eb68015819ULL }, // Inst #9225 = VFCMULCPHZ256rmkz |
| 37932 | { 9224, 9, 1, 0, 2212, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc3eb68015819ULL }, // Inst #9224 = VFCMULCPHZ256rmk |
| 37933 | { 9223, 8, 1, 0, 2212, 1, 0, 3832, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x77eb68015819ULL }, // Inst #9223 = VFCMULCPHZ256rmbkz |
| 37934 | { 9222, 9, 1, 0, 2212, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x73eb68015819ULL }, // Inst #9222 = VFCMULCPHZ256rmbk |
| 37935 | { 9221, 7, 1, 0, 2205, 1, 0, 3825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x71eb68015819ULL }, // Inst #9221 = VFCMULCPHZ256rmb |
| 37936 | { 9220, 7, 1, 0, 2205, 1, 0, 3825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc1eb68015819ULL }, // Inst #9220 = VFCMULCPHZ256rm |
| 37937 | { 9219, 4, 1, 0, 2221, 1, 0, 3821, X86ImpOpBase + 78, 0, 0xa6eb68015829ULL }, // Inst #9219 = VFCMULCPHZ128rrkz |
| 37938 | { 9218, 5, 1, 0, 2221, 1, 0, 3710, X86ImpOpBase + 78, 0, 0xa2eb68015829ULL }, // Inst #9218 = VFCMULCPHZ128rrk |
| 37939 | { 9217, 3, 1, 0, 2213, 1, 0, 3818, X86ImpOpBase + 78, 0, 0xa0eb68015829ULL }, // Inst #9217 = VFCMULCPHZ128rr |
| 37940 | { 9216, 8, 1, 0, 2211, 1, 0, 3810, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa6eb68015819ULL }, // Inst #9216 = VFCMULCPHZ128rmkz |
| 37941 | { 9215, 9, 1, 0, 2211, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa2eb68015819ULL }, // Inst #9215 = VFCMULCPHZ128rmk |
| 37942 | { 9214, 8, 1, 0, 2211, 1, 0, 3810, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x76eb68015819ULL }, // Inst #9214 = VFCMULCPHZ128rmbkz |
| 37943 | { 9213, 9, 1, 0, 2211, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x72eb68015819ULL }, // Inst #9213 = VFCMULCPHZ128rmbk |
| 37944 | { 9212, 7, 1, 0, 2202, 1, 0, 3803, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x70eb68015819ULL }, // Inst #9212 = VFCMULCPHZ128rmb |
| 37945 | { 9211, 7, 1, 0, 2202, 1, 0, 3803, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa0eb68015819ULL }, // Inst #9211 = VFCMULCPHZ128rm |
| 37946 | { 9210, 5, 1, 0, 2221, 1, 0, 3798, X86ImpOpBase + 78, 0, 0x66abe0015829ULL }, // Inst #9210 = VFCMADDCSHZrkz |
| 37947 | { 9209, 5, 1, 0, 2221, 1, 0, 3798, X86ImpOpBase + 78, 0, 0x62abe0015829ULL }, // Inst #9209 = VFCMADDCSHZrk |
| 37948 | { 9208, 6, 1, 0, 2221, 1, 0, 3792, X86ImpOpBase + 78, 0, 0x176abe0015829ULL }, // Inst #9208 = VFCMADDCSHZrbkz |
| 37949 | { 9207, 6, 1, 0, 2221, 1, 0, 3792, X86ImpOpBase + 78, 0, 0x172abe0015829ULL }, // Inst #9207 = VFCMADDCSHZrbk |
| 37950 | { 9206, 5, 1, 0, 2213, 1, 0, 3787, X86ImpOpBase + 78, 0, 0x170abe0015829ULL }, // Inst #9206 = VFCMADDCSHZrb |
| 37951 | { 9205, 4, 1, 0, 2213, 1, 0, 3706, X86ImpOpBase + 78, 0, 0x60abe0015829ULL }, // Inst #9205 = VFCMADDCSHZr |
| 37952 | { 9204, 9, 1, 0, 2211, 1, 0, 3778, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x66abe0015819ULL }, // Inst #9204 = VFCMADDCSHZmkz |
| 37953 | { 9203, 9, 1, 0, 2211, 1, 0, 3778, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x62abe0015819ULL }, // Inst #9203 = VFCMADDCSHZmk |
| 37954 | { 9202, 8, 1, 0, 2202, 1, 0, 3689, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x60abe0015819ULL }, // Inst #9202 = VFCMADDCSHZm |
| 37955 | { 9201, 5, 1, 0, 2232, 1, 0, 3773, X86ImpOpBase + 78, 0, 0xeeab60015829ULL }, // Inst #9201 = VFCMADDCPHZrkz |
| 37956 | { 9200, 5, 1, 0, 2232, 1, 0, 3773, X86ImpOpBase + 78, 0, 0xeaab60015829ULL }, // Inst #9200 = VFCMADDCPHZrk |
| 37957 | { 9199, 6, 1, 0, 2232, 1, 0, 3767, X86ImpOpBase + 78, 0, 0x17eab60015829ULL }, // Inst #9199 = VFCMADDCPHZrbkz |
| 37958 | { 9198, 6, 1, 0, 2232, 1, 0, 3767, X86ImpOpBase + 78, 0, 0x17aab60015829ULL }, // Inst #9198 = VFCMADDCPHZrbk |
| 37959 | { 9197, 5, 1, 0, 2229, 1, 0, 3762, X86ImpOpBase + 78, 0, 0x178ab60015829ULL }, // Inst #9197 = VFCMADDCPHZrb |
| 37960 | { 9196, 4, 1, 0, 2229, 1, 0, 3758, X86ImpOpBase + 78, 0, 0xe8ab60015829ULL }, // Inst #9196 = VFCMADDCPHZr |
| 37961 | { 9195, 9, 1, 0, 2227, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeeab60015819ULL }, // Inst #9195 = VFCMADDCPHZmkz |
| 37962 | { 9194, 9, 1, 0, 2227, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeaab60015819ULL }, // Inst #9194 = VFCMADDCPHZmk |
| 37963 | { 9193, 9, 1, 0, 2227, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7eab60015819ULL }, // Inst #9193 = VFCMADDCPHZmbkz |
| 37964 | { 9192, 9, 1, 0, 2227, 1, 0, 3749, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7aab60015819ULL }, // Inst #9192 = VFCMADDCPHZmbk |
| 37965 | { 9191, 8, 1, 0, 2223, 1, 0, 3741, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x78ab60015819ULL }, // Inst #9191 = VFCMADDCPHZmb |
| 37966 | { 9190, 8, 1, 0, 2223, 1, 0, 3741, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe8ab60015819ULL }, // Inst #9190 = VFCMADDCPHZm |
| 37967 | { 9189, 5, 1, 0, 2222, 1, 0, 3736, X86ImpOpBase + 78, 0, 0xc7ab60015829ULL }, // Inst #9189 = VFCMADDCPHZ256rkz |
| 37968 | { 9188, 5, 1, 0, 2222, 1, 0, 3736, X86ImpOpBase + 78, 0, 0xc3ab60015829ULL }, // Inst #9188 = VFCMADDCPHZ256rk |
| 37969 | { 9187, 4, 1, 0, 2214, 1, 0, 3732, X86ImpOpBase + 78, 0, 0xc1ab60015829ULL }, // Inst #9187 = VFCMADDCPHZ256r |
| 37970 | { 9186, 9, 1, 0, 2210, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc7ab60015819ULL }, // Inst #9186 = VFCMADDCPHZ256mkz |
| 37971 | { 9185, 9, 1, 0, 2210, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc3ab60015819ULL }, // Inst #9185 = VFCMADDCPHZ256mk |
| 37972 | { 9184, 9, 1, 0, 2210, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x77ab60015819ULL }, // Inst #9184 = VFCMADDCPHZ256mbkz |
| 37973 | { 9183, 9, 1, 0, 2210, 1, 0, 3723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x73ab60015819ULL }, // Inst #9183 = VFCMADDCPHZ256mbk |
| 37974 | { 9182, 8, 1, 0, 2200, 1, 0, 3715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x71ab60015819ULL }, // Inst #9182 = VFCMADDCPHZ256mb |
| 37975 | { 9181, 8, 1, 0, 2200, 1, 0, 3715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xc1ab60015819ULL }, // Inst #9181 = VFCMADDCPHZ256m |
| 37976 | { 9180, 5, 1, 0, 2221, 1, 0, 3710, X86ImpOpBase + 78, 0, 0xa6ab60015829ULL }, // Inst #9180 = VFCMADDCPHZ128rkz |
| 37977 | { 9179, 5, 1, 0, 2221, 1, 0, 3710, X86ImpOpBase + 78, 0, 0xa2ab60015829ULL }, // Inst #9179 = VFCMADDCPHZ128rk |
| 37978 | { 9178, 4, 1, 0, 2213, 1, 0, 3706, X86ImpOpBase + 78, 0, 0xa0ab60015829ULL }, // Inst #9178 = VFCMADDCPHZ128r |
| 37979 | { 9177, 9, 1, 0, 2209, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa6ab60015819ULL }, // Inst #9177 = VFCMADDCPHZ128mkz |
| 37980 | { 9176, 9, 1, 0, 2209, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa2ab60015819ULL }, // Inst #9176 = VFCMADDCPHZ128mk |
| 37981 | { 9175, 9, 1, 0, 2209, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x76ab60015819ULL }, // Inst #9175 = VFCMADDCPHZ128mbkz |
| 37982 | { 9174, 9, 1, 0, 2209, 1, 0, 3697, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x72ab60015819ULL }, // Inst #9174 = VFCMADDCPHZ128mbk |
| 37983 | { 9173, 8, 1, 0, 2199, 1, 0, 3689, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x70ab60015819ULL }, // Inst #9173 = VFCMADDCPHZ128mb |
| 37984 | { 9172, 8, 1, 0, 2199, 1, 0, 3689, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xa0ab60015819ULL }, // Inst #9172 = VFCMADDCPHZ128m |
| 37985 | { 9171, 3, 1, 0, 751, 0, 0, 1059, X86ImpOpBase + 0, 0, 0xba8046828ULL }, // Inst #9171 = VEXTRACTPSrri |
| 37986 | { 9170, 7, 0, 0, 764, 0, 0, 1052, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xba8046818ULL }, // Inst #9170 = VEXTRACTPSmri |
| 37987 | { 9169, 3, 1, 0, 1423, 0, 0, 3686, X86ImpOpBase + 0, 0, 0xa00bf8046828ULL }, // Inst #9169 = VEXTRACTPSZrri |
| 37988 | { 9168, 7, 0, 0, 1424, 0, 0, 3293, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x600bf8046818ULL }, // Inst #9168 = VEXTRACTPSZmri |
| 37989 | { 9167, 4, 1, 0, 364, 0, 0, 3682, X86ImpOpBase + 0, 0, 0xce1df8066828ULL }, // Inst #9167 = VEXTRACTI64X4Zrrikz |
| 37990 | { 9166, 5, 1, 0, 364, 0, 0, 3677, X86ImpOpBase + 0, 0, 0xca1df8066828ULL }, // Inst #9166 = VEXTRACTI64X4Zrrik |
| 37991 | { 9165, 3, 1, 0, 364, 0, 0, 3362, X86ImpOpBase + 0, 0, 0xc81df8066828ULL }, // Inst #9165 = VEXTRACTI64X4Zrri |
| 37992 | { 9164, 8, 0, 0, 194, 0, 0, 3606, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca1df8066818ULL }, // Inst #9164 = VEXTRACTI64X4Zmrik |
| 37993 | { 9163, 7, 0, 0, 194, 0, 0, 3347, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc81df8066818ULL }, // Inst #9163 = VEXTRACTI64X4Zmri |
| 37994 | { 9162, 4, 1, 0, 364, 0, 0, 3673, X86ImpOpBase + 0, 0, 0xae1cf8066828ULL }, // Inst #9162 = VEXTRACTI64X2Zrrikz |
| 37995 | { 9161, 5, 1, 0, 364, 0, 0, 3668, X86ImpOpBase + 0, 0, 0xaa1cf8066828ULL }, // Inst #9161 = VEXTRACTI64X2Zrrik |
| 37996 | { 9160, 3, 1, 0, 364, 0, 0, 3614, X86ImpOpBase + 0, 0, 0xa81cf8066828ULL }, // Inst #9160 = VEXTRACTI64X2Zrri |
| 37997 | { 9159, 8, 0, 0, 194, 0, 0, 3660, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xaa1cf8066818ULL }, // Inst #9159 = VEXTRACTI64X2Zmrik |
| 37998 | { 9158, 7, 0, 0, 194, 0, 0, 3347, X86ImpOpBase + 0, 0, 0xa81cf8066818ULL }, // Inst #9158 = VEXTRACTI64X2Zmri |
| 37999 | { 9157, 4, 1, 0, 364, 0, 0, 3656, X86ImpOpBase + 0, 0, 0xa71cf8066828ULL }, // Inst #9157 = VEXTRACTI64X2Z256rrikz |
| 38000 | { 9156, 5, 1, 0, 364, 0, 0, 3651, X86ImpOpBase + 0, 0, 0xa31cf8066828ULL }, // Inst #9156 = VEXTRACTI64X2Z256rrik |
| 38001 | { 9155, 3, 1, 0, 364, 0, 0, 3335, X86ImpOpBase + 0, 0, 0xa11cf8066828ULL }, // Inst #9155 = VEXTRACTI64X2Z256rri |
| 38002 | { 9154, 8, 0, 0, 194, 0, 0, 3643, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa31cf8066818ULL }, // Inst #9154 = VEXTRACTI64X2Z256mrik |
| 38003 | { 9153, 7, 0, 0, 194, 0, 0, 3320, X86ImpOpBase + 0, 0, 0xa11cf8066818ULL }, // Inst #9153 = VEXTRACTI64X2Z256mri |
| 38004 | { 9152, 4, 1, 0, 364, 0, 0, 3639, X86ImpOpBase + 0, 0, 0xce1df8046828ULL }, // Inst #9152 = VEXTRACTI32X8Zrrikz |
| 38005 | { 9151, 5, 1, 0, 364, 0, 0, 3634, X86ImpOpBase + 0, 0, 0xca1df8046828ULL }, // Inst #9151 = VEXTRACTI32X8Zrrik |
| 38006 | { 9150, 3, 1, 0, 364, 0, 0, 3362, X86ImpOpBase + 0, 0, 0xc81df8046828ULL }, // Inst #9150 = VEXTRACTI32X8Zrri |
| 38007 | { 9149, 8, 0, 0, 194, 0, 0, 3626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca1df8046818ULL }, // Inst #9149 = VEXTRACTI32X8Zmrik |
| 38008 | { 9148, 7, 0, 0, 194, 0, 0, 3347, X86ImpOpBase + 0, 0, 0xc81df8046818ULL }, // Inst #9148 = VEXTRACTI32X8Zmri |
| 38009 | { 9147, 4, 1, 0, 364, 0, 0, 3622, X86ImpOpBase + 0, 0, 0xae1cf8046828ULL }, // Inst #9147 = VEXTRACTI32X4Zrrikz |
| 38010 | { 9146, 5, 1, 0, 364, 0, 0, 3617, X86ImpOpBase + 0, 0, 0xaa1cf8046828ULL }, // Inst #9146 = VEXTRACTI32X4Zrrik |
| 38011 | { 9145, 3, 1, 0, 364, 0, 0, 3614, X86ImpOpBase + 0, 0, 0xa81cf8046828ULL }, // Inst #9145 = VEXTRACTI32X4Zrri |
| 38012 | { 9144, 8, 0, 0, 194, 0, 0, 3606, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xaa1cf8046818ULL }, // Inst #9144 = VEXTRACTI32X4Zmrik |
| 38013 | { 9143, 7, 0, 0, 194, 0, 0, 3347, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa81cf8046818ULL }, // Inst #9143 = VEXTRACTI32X4Zmri |
| 38014 | { 9142, 4, 1, 0, 364, 0, 0, 3602, X86ImpOpBase + 0, 0, 0xa71cf8046828ULL }, // Inst #9142 = VEXTRACTI32X4Z256rrikz |
| 38015 | { 9141, 5, 1, 0, 364, 0, 0, 3597, X86ImpOpBase + 0, 0, 0xa31cf8046828ULL }, // Inst #9141 = VEXTRACTI32X4Z256rrik |
| 38016 | { 9140, 3, 1, 0, 364, 0, 0, 3335, X86ImpOpBase + 0, 0, 0xa11cf8046828ULL }, // Inst #9140 = VEXTRACTI32X4Z256rri |
| 38017 | { 9139, 8, 0, 0, 194, 0, 0, 3589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa31cf8046818ULL }, // Inst #9139 = VEXTRACTI32X4Z256mrik |
| 38018 | { 9138, 7, 0, 0, 194, 0, 0, 3320, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa11cf8046818ULL }, // Inst #9138 = VEXTRACTI32X4Z256mri |
| 38019 | { 9137, 3, 1, 0, 964, 0, 0, 3290, X86ImpOpBase + 0, 0, 0x11cb8046828ULL }, // Inst #9137 = VEXTRACTI128rri |
| 38020 | { 9136, 7, 0, 0, 966, 0, 0, 3283, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x11cb8046818ULL }, // Inst #9136 = VEXTRACTI128mri |
| 38021 | { 9135, 4, 1, 0, 366, 0, 0, 3682, X86ImpOpBase + 0, 0, 0xce0df0066828ULL }, // Inst #9135 = VEXTRACTF64X4Zrrikz |
| 38022 | { 9134, 5, 1, 0, 366, 0, 0, 3677, X86ImpOpBase + 0, 0, 0xca0df0066828ULL }, // Inst #9134 = VEXTRACTF64X4Zrrik |
| 38023 | { 9133, 3, 1, 0, 366, 0, 0, 3362, X86ImpOpBase + 0, 0, 0xc80df0066828ULL }, // Inst #9133 = VEXTRACTF64X4Zrri |
| 38024 | { 9132, 8, 0, 0, 223, 0, 0, 3606, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca0df0066818ULL }, // Inst #9132 = VEXTRACTF64X4Zmrik |
| 38025 | { 9131, 7, 0, 0, 223, 0, 0, 3347, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xc80df0066818ULL }, // Inst #9131 = VEXTRACTF64X4Zmri |
| 38026 | { 9130, 4, 1, 0, 366, 0, 0, 3673, X86ImpOpBase + 0, 0, 0xae0cf0066828ULL }, // Inst #9130 = VEXTRACTF64X2Zrrikz |
| 38027 | { 9129, 5, 1, 0, 366, 0, 0, 3668, X86ImpOpBase + 0, 0, 0xaa0cf0066828ULL }, // Inst #9129 = VEXTRACTF64X2Zrrik |
| 38028 | { 9128, 3, 1, 0, 366, 0, 0, 3614, X86ImpOpBase + 0, 0, 0xa80cf0066828ULL }, // Inst #9128 = VEXTRACTF64X2Zrri |
| 38029 | { 9127, 8, 0, 0, 223, 0, 0, 3660, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xaa0cf0066818ULL }, // Inst #9127 = VEXTRACTF64X2Zmrik |
| 38030 | { 9126, 7, 0, 0, 223, 0, 0, 3347, X86ImpOpBase + 0, 0, 0xa80cf0066818ULL }, // Inst #9126 = VEXTRACTF64X2Zmri |
| 38031 | { 9125, 4, 1, 0, 366, 0, 0, 3656, X86ImpOpBase + 0, 0, 0xa70cf0066828ULL }, // Inst #9125 = VEXTRACTF64X2Z256rrikz |
| 38032 | { 9124, 5, 1, 0, 366, 0, 0, 3651, X86ImpOpBase + 0, 0, 0xa30cf0066828ULL }, // Inst #9124 = VEXTRACTF64X2Z256rrik |
| 38033 | { 9123, 3, 1, 0, 366, 0, 0, 3335, X86ImpOpBase + 0, 0, 0xa10cf0066828ULL }, // Inst #9123 = VEXTRACTF64X2Z256rri |
| 38034 | { 9122, 8, 0, 0, 223, 0, 0, 3643, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa30cf0066818ULL }, // Inst #9122 = VEXTRACTF64X2Z256mrik |
| 38035 | { 9121, 7, 0, 0, 223, 0, 0, 3320, X86ImpOpBase + 0, 0, 0xa10cf0066818ULL }, // Inst #9121 = VEXTRACTF64X2Z256mri |
| 38036 | { 9120, 4, 1, 0, 366, 0, 0, 3639, X86ImpOpBase + 0, 0, 0xce0de8046828ULL }, // Inst #9120 = VEXTRACTF32X8Zrrikz |
| 38037 | { 9119, 5, 1, 0, 366, 0, 0, 3634, X86ImpOpBase + 0, 0, 0xca0de8046828ULL }, // Inst #9119 = VEXTRACTF32X8Zrrik |
| 38038 | { 9118, 3, 1, 0, 366, 0, 0, 3362, X86ImpOpBase + 0, 0, 0xc80de8046828ULL }, // Inst #9118 = VEXTRACTF32X8Zrri |
| 38039 | { 9117, 8, 0, 0, 223, 0, 0, 3626, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca0de8046818ULL }, // Inst #9117 = VEXTRACTF32X8Zmrik |
| 38040 | { 9116, 7, 0, 0, 223, 0, 0, 3347, X86ImpOpBase + 0, 0, 0xc80de8046818ULL }, // Inst #9116 = VEXTRACTF32X8Zmri |
| 38041 | { 9115, 4, 1, 0, 366, 0, 0, 3622, X86ImpOpBase + 0, 0, 0xae0ce8046828ULL }, // Inst #9115 = VEXTRACTF32X4Zrrikz |
| 38042 | { 9114, 5, 1, 0, 366, 0, 0, 3617, X86ImpOpBase + 0, 0, 0xaa0ce8046828ULL }, // Inst #9114 = VEXTRACTF32X4Zrrik |
| 38043 | { 9113, 3, 1, 0, 366, 0, 0, 3614, X86ImpOpBase + 0, 0, 0xa80ce8046828ULL }, // Inst #9113 = VEXTRACTF32X4Zrri |
| 38044 | { 9112, 8, 0, 0, 223, 0, 0, 3606, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xaa0ce8046818ULL }, // Inst #9112 = VEXTRACTF32X4Zmrik |
| 38045 | { 9111, 7, 0, 0, 223, 0, 0, 3347, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa80ce8046818ULL }, // Inst #9111 = VEXTRACTF32X4Zmri |
| 38046 | { 9110, 4, 1, 0, 366, 0, 0, 3602, X86ImpOpBase + 0, 0, 0xa70ce8046828ULL }, // Inst #9110 = VEXTRACTF32X4Z256rrikz |
| 38047 | { 9109, 5, 1, 0, 366, 0, 0, 3597, X86ImpOpBase + 0, 0, 0xa30ce8046828ULL }, // Inst #9109 = VEXTRACTF32X4Z256rrik |
| 38048 | { 9108, 3, 1, 0, 366, 0, 0, 3335, X86ImpOpBase + 0, 0, 0xa10ce8046828ULL }, // Inst #9108 = VEXTRACTF32X4Z256rri |
| 38049 | { 9107, 8, 0, 0, 223, 0, 0, 3589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa30ce8046818ULL }, // Inst #9107 = VEXTRACTF32X4Z256mrik |
| 38050 | { 9106, 7, 0, 0, 223, 0, 0, 3320, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa10ce8046818ULL }, // Inst #9106 = VEXTRACTF32X4Z256mri |
| 38051 | { 9105, 3, 1, 0, 963, 0, 0, 3290, X86ImpOpBase + 0, 0, 0x10ca8046828ULL }, // Inst #9105 = VEXTRACTF128rri |
| 38052 | { 9104, 7, 0, 0, 965, 0, 0, 3283, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x10ca8046818ULL }, // Inst #9104 = VEXTRACTF128mri |
| 38053 | { 9103, 3, 1, 0, 1265, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee4478004829ULL }, // Inst #9103 = VEXPANDPSZrrkz |
| 38054 | { 9102, 4, 1, 0, 1265, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea4478004829ULL }, // Inst #9102 = VEXPANDPSZrrk |
| 38055 | { 9101, 2, 1, 0, 1979, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe84478004829ULL }, // Inst #9101 = VEXPANDPSZrr |
| 38056 | { 9100, 7, 1, 0, 1379, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6e4478004819ULL }, // Inst #9100 = VEXPANDPSZrmkz |
| 38057 | { 9099, 8, 1, 0, 1379, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6a4478004819ULL }, // Inst #9099 = VEXPANDPSZrmk |
| 38058 | { 9098, 6, 1, 0, 1379, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x684478004819ULL }, // Inst #9098 = VEXPANDPSZrm |
| 38059 | { 9097, 3, 1, 0, 1265, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc74478004829ULL }, // Inst #9097 = VEXPANDPSZ256rrkz |
| 38060 | { 9096, 4, 1, 0, 1265, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc34478004829ULL }, // Inst #9096 = VEXPANDPSZ256rrk |
| 38061 | { 9095, 2, 1, 0, 1979, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc14478004829ULL }, // Inst #9095 = VEXPANDPSZ256rr |
| 38062 | { 9094, 7, 1, 0, 1379, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x674478004819ULL }, // Inst #9094 = VEXPANDPSZ256rmkz |
| 38063 | { 9093, 8, 1, 0, 1379, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x634478004819ULL }, // Inst #9093 = VEXPANDPSZ256rmk |
| 38064 | { 9092, 6, 1, 0, 1379, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x614478004819ULL }, // Inst #9092 = VEXPANDPSZ256rm |
| 38065 | { 9091, 3, 1, 0, 1265, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa64478004829ULL }, // Inst #9091 = VEXPANDPSZ128rrkz |
| 38066 | { 9090, 4, 1, 0, 1265, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa24478004829ULL }, // Inst #9090 = VEXPANDPSZ128rrk |
| 38067 | { 9089, 2, 1, 0, 1979, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa04478004829ULL }, // Inst #9089 = VEXPANDPSZ128rr |
| 38068 | { 9088, 7, 1, 0, 1364, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x664478004819ULL }, // Inst #9088 = VEXPANDPSZ128rmkz |
| 38069 | { 9087, 8, 1, 0, 1364, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x624478004819ULL }, // Inst #9087 = VEXPANDPSZ128rmk |
| 38070 | { 9086, 6, 1, 0, 1364, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x604478004819ULL }, // Inst #9086 = VEXPANDPSZ128rm |
| 38071 | { 9085, 3, 1, 0, 1265, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee4478024829ULL }, // Inst #9085 = VEXPANDPDZrrkz |
| 38072 | { 9084, 4, 1, 0, 1265, 0, 0, 2804, X86ImpOpBase + 0, 0, 0xea4478024829ULL }, // Inst #9084 = VEXPANDPDZrrk |
| 38073 | { 9083, 2, 1, 0, 1979, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe84478024829ULL }, // Inst #9083 = VEXPANDPDZrr |
| 38074 | { 9082, 7, 1, 0, 1379, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8e4478024819ULL }, // Inst #9082 = VEXPANDPDZrmkz |
| 38075 | { 9081, 8, 1, 0, 1379, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a4478024819ULL }, // Inst #9081 = VEXPANDPDZrmk |
| 38076 | { 9080, 6, 1, 0, 1379, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x884478024819ULL }, // Inst #9080 = VEXPANDPDZrm |
| 38077 | { 9079, 3, 1, 0, 1265, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc74478024829ULL }, // Inst #9079 = VEXPANDPDZ256rrkz |
| 38078 | { 9078, 4, 1, 0, 1265, 0, 0, 2782, X86ImpOpBase + 0, 0, 0xc34478024829ULL }, // Inst #9078 = VEXPANDPDZ256rrk |
| 38079 | { 9077, 2, 1, 0, 1979, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc14478024829ULL }, // Inst #9077 = VEXPANDPDZ256rr |
| 38080 | { 9076, 7, 1, 0, 1379, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x874478024819ULL }, // Inst #9076 = VEXPANDPDZ256rmkz |
| 38081 | { 9075, 8, 1, 0, 1379, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x834478024819ULL }, // Inst #9075 = VEXPANDPDZ256rmk |
| 38082 | { 9074, 6, 1, 0, 1379, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x814478024819ULL }, // Inst #9074 = VEXPANDPDZ256rm |
| 38083 | { 9073, 3, 1, 0, 1265, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa64478024829ULL }, // Inst #9073 = VEXPANDPDZ128rrkz |
| 38084 | { 9072, 4, 1, 0, 1265, 0, 0, 2766, X86ImpOpBase + 0, 0, 0xa24478024829ULL }, // Inst #9072 = VEXPANDPDZ128rrk |
| 38085 | { 9071, 2, 1, 0, 1979, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa04478024829ULL }, // Inst #9071 = VEXPANDPDZ128rr |
| 38086 | { 9070, 7, 1, 0, 1364, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x864478024819ULL }, // Inst #9070 = VEXPANDPDZ128rmkz |
| 38087 | { 9069, 8, 1, 0, 1364, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x824478024819ULL }, // Inst #9069 = VEXPANDPDZ128rmk |
| 38088 | { 9068, 6, 1, 0, 1364, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x804478024819ULL }, // Inst #9068 = VEXPANDPDZ128rm |
| 38089 | { 9067, 3, 1, 0, 340, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6468004829ULL }, // Inst #9067 = VEXP2PSZrkz |
| 38090 | { 9066, 4, 1, 0, 340, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6468004829ULL }, // Inst #9066 = VEXP2PSZrk |
| 38091 | { 9065, 3, 1, 0, 340, 1, 0, 2843, X86ImpOpBase + 78, 0, 0x7e6468004829ULL }, // Inst #9065 = VEXP2PSZrbkz |
| 38092 | { 9064, 4, 1, 0, 340, 1, 0, 2839, X86ImpOpBase + 78, 0, 0x7a6468004829ULL }, // Inst #9064 = VEXP2PSZrbk |
| 38093 | { 9063, 2, 1, 0, 340, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x786468004829ULL }, // Inst #9063 = VEXP2PSZrb |
| 38094 | { 9062, 2, 1, 0, 340, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86468004829ULL }, // Inst #9062 = VEXP2PSZr |
| 38095 | { 9061, 7, 1, 0, 339, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6468004819ULL }, // Inst #9061 = VEXP2PSZmkz |
| 38096 | { 9060, 8, 1, 0, 339, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6468004819ULL }, // Inst #9060 = VEXP2PSZmk |
| 38097 | { 9059, 7, 1, 0, 339, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e6468004819ULL }, // Inst #9059 = VEXP2PSZmbkz |
| 38098 | { 9058, 8, 1, 0, 339, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a6468004819ULL }, // Inst #9058 = VEXP2PSZmbk |
| 38099 | { 9057, 6, 1, 0, 339, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x786468004819ULL }, // Inst #9057 = VEXP2PSZmb |
| 38100 | { 9056, 6, 1, 0, 339, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86468004819ULL }, // Inst #9056 = VEXP2PSZm |
| 38101 | { 9055, 3, 1, 0, 340, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6470024829ULL }, // Inst #9055 = VEXP2PDZrkz |
| 38102 | { 9054, 4, 1, 0, 340, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6470024829ULL }, // Inst #9054 = VEXP2PDZrk |
| 38103 | { 9053, 3, 1, 0, 340, 1, 0, 2808, X86ImpOpBase + 78, 0, 0x9e6470024829ULL }, // Inst #9053 = VEXP2PDZrbkz |
| 38104 | { 9052, 4, 1, 0, 340, 1, 0, 2804, X86ImpOpBase + 78, 0, 0x9a6470024829ULL }, // Inst #9052 = VEXP2PDZrbk |
| 38105 | { 9051, 2, 1, 0, 340, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x986470024829ULL }, // Inst #9051 = VEXP2PDZrb |
| 38106 | { 9050, 2, 1, 0, 340, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86470024829ULL }, // Inst #9050 = VEXP2PDZr |
| 38107 | { 9049, 7, 1, 0, 339, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6470024819ULL }, // Inst #9049 = VEXP2PDZmkz |
| 38108 | { 9048, 8, 1, 0, 339, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6470024819ULL }, // Inst #9048 = VEXP2PDZmk |
| 38109 | { 9047, 7, 1, 0, 339, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e6470024819ULL }, // Inst #9047 = VEXP2PDZmbkz |
| 38110 | { 9046, 8, 1, 0, 339, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a6470024819ULL }, // Inst #9046 = VEXP2PDZmbk |
| 38111 | { 9045, 6, 1, 0, 339, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x986470024819ULL }, // Inst #9045 = VEXP2PDZmb |
| 38112 | { 9044, 6, 1, 0, 339, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86470024819ULL }, // Inst #9044 = VEXP2PDZm |
| 38113 | { 9043, 1, 0, 0, 1637, 0, 1, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2035ULL }, // Inst #9043 = VERWr |
| 38114 | { 9042, 5, 0, 0, 780, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2025ULL }, // Inst #9042 = VERWm |
| 38115 | { 9041, 1, 0, 0, 1636, 0, 1, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2034ULL }, // Inst #9041 = VERRr |
| 38116 | { 9040, 5, 0, 0, 1635, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2024ULL }, // Inst #9040 = VERRm |
| 38117 | { 9039, 4, 1, 0, 1176, 1, 0, 915, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa028046829ULL }, // Inst #9039 = VDPPSrri |
| 38118 | { 9038, 8, 1, 0, 139, 1, 0, 2267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa028046819ULL }, // Inst #9038 = VDPPSrmi |
| 38119 | { 9037, 4, 1, 0, 438, 1, 0, 923, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1a028046829ULL }, // Inst #9037 = VDPPSYrri |
| 38120 | { 9036, 8, 1, 0, 437, 1, 0, 2259, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1a028046819ULL }, // Inst #9036 = VDPPSYrmi |
| 38121 | { 9035, 5, 1, 0, 436, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeea968004029ULL }, // Inst #9035 = VDPPHPSZrkz |
| 38122 | { 9034, 5, 1, 0, 436, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaa968004029ULL }, // Inst #9034 = VDPPHPSZrk |
| 38123 | { 9033, 4, 1, 0, 436, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8a968004029ULL }, // Inst #9033 = VDPPHPSZr |
| 38124 | { 9032, 9, 1, 0, 435, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea968004019ULL }, // Inst #9032 = VDPPHPSZmkz |
| 38125 | { 9031, 9, 1, 0, 435, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa968004019ULL }, // Inst #9031 = VDPPHPSZmk |
| 38126 | { 9030, 9, 1, 0, 435, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea968004019ULL }, // Inst #9030 = VDPPHPSZmbkz |
| 38127 | { 9029, 9, 1, 0, 435, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa968004019ULL }, // Inst #9029 = VDPPHPSZmbk |
| 38128 | { 9028, 8, 1, 0, 435, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a968004019ULL }, // Inst #9028 = VDPPHPSZmb |
| 38129 | { 9027, 8, 1, 0, 435, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a968004019ULL }, // Inst #9027 = VDPPHPSZm |
| 38130 | { 9026, 5, 1, 0, 434, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7a968004029ULL }, // Inst #9026 = VDPPHPSZ256rkz |
| 38131 | { 9025, 5, 1, 0, 434, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3a968004029ULL }, // Inst #9025 = VDPPHPSZ256rk |
| 38132 | { 9024, 4, 1, 0, 434, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1a968004029ULL }, // Inst #9024 = VDPPHPSZ256r |
| 38133 | { 9023, 9, 1, 0, 433, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a968004019ULL }, // Inst #9023 = VDPPHPSZ256mkz |
| 38134 | { 9022, 9, 1, 0, 433, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a968004019ULL }, // Inst #9022 = VDPPHPSZ256mk |
| 38135 | { 9021, 9, 1, 0, 433, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a968004019ULL }, // Inst #9021 = VDPPHPSZ256mbkz |
| 38136 | { 9020, 9, 1, 0, 433, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a968004019ULL }, // Inst #9020 = VDPPHPSZ256mbk |
| 38137 | { 9019, 8, 1, 0, 433, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a968004019ULL }, // Inst #9019 = VDPPHPSZ256mb |
| 38138 | { 9018, 8, 1, 0, 433, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a968004019ULL }, // Inst #9018 = VDPPHPSZ256m |
| 38139 | { 9017, 5, 1, 0, 432, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6a968004029ULL }, // Inst #9017 = VDPPHPSZ128rkz |
| 38140 | { 9016, 5, 1, 0, 432, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2a968004029ULL }, // Inst #9016 = VDPPHPSZ128rk |
| 38141 | { 9015, 4, 1, 0, 432, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0a968004029ULL }, // Inst #9015 = VDPPHPSZ128r |
| 38142 | { 9014, 9, 1, 0, 431, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a968004019ULL }, // Inst #9014 = VDPPHPSZ128mkz |
| 38143 | { 9013, 9, 1, 0, 431, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a968004019ULL }, // Inst #9013 = VDPPHPSZ128mk |
| 38144 | { 9012, 9, 1, 0, 431, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a968004019ULL }, // Inst #9012 = VDPPHPSZ128mbkz |
| 38145 | { 9011, 9, 1, 0, 431, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a968004019ULL }, // Inst #9011 = VDPPHPSZ128mbk |
| 38146 | { 9010, 8, 1, 0, 431, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a968004019ULL }, // Inst #9010 = VDPPHPSZ128mb |
| 38147 | { 9009, 8, 1, 0, 431, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a968004019ULL }, // Inst #9009 = VDPPHPSZ128m |
| 38148 | { 9008, 4, 1, 0, 138, 1, 0, 915, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0b0046829ULL }, // Inst #9008 = VDPPDrri |
| 38149 | { 9007, 8, 1, 0, 137, 1, 0, 2267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0b0046819ULL }, // Inst #9007 = VDPPDrmi |
| 38150 | { 9006, 5, 1, 0, 1078, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeea968005029ULL }, // Inst #9006 = VDPBF16PSZrkz |
| 38151 | { 9005, 5, 1, 0, 1078, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaa968005029ULL }, // Inst #9005 = VDPBF16PSZrk |
| 38152 | { 9004, 4, 1, 0, 1078, 0, 0, 3585, X86ImpOpBase + 0, 0, 0xe8a968005029ULL }, // Inst #9004 = VDPBF16PSZr |
| 38153 | { 9003, 9, 1, 0, 2010, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea968005019ULL }, // Inst #9003 = VDPBF16PSZmkz |
| 38154 | { 9002, 9, 1, 0, 2010, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa968005019ULL }, // Inst #9002 = VDPBF16PSZmk |
| 38155 | { 9001, 9, 1, 0, 2011, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ea968005019ULL }, // Inst #9001 = VDPBF16PSZmbkz |
| 38156 | { 9000, 9, 1, 0, 2010, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa968005019ULL }, // Inst #9000 = VDPBF16PSZmbk |
| 38157 | { 8999, 8, 1, 0, 2010, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78a968005019ULL }, // Inst #8999 = VDPBF16PSZmb |
| 38158 | { 8998, 8, 1, 0, 2010, 0, 0, 1603, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a968005019ULL }, // Inst #8998 = VDPBF16PSZm |
| 38159 | { 8997, 5, 1, 0, 1077, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc7a968005029ULL }, // Inst #8997 = VDPBF16PSZ256rkz |
| 38160 | { 8996, 5, 1, 0, 1077, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3a968005029ULL }, // Inst #8996 = VDPBF16PSZ256rk |
| 38161 | { 8995, 4, 1, 0, 1077, 0, 0, 3581, X86ImpOpBase + 0, 0, 0xc1a968005029ULL }, // Inst #8995 = VDPBF16PSZ256r |
| 38162 | { 8994, 9, 1, 0, 2196, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a968005019ULL }, // Inst #8994 = VDPBF16PSZ256mkz |
| 38163 | { 8993, 9, 1, 0, 2196, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a968005019ULL }, // Inst #8993 = VDPBF16PSZ256mk |
| 38164 | { 8992, 9, 1, 0, 2197, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77a968005019ULL }, // Inst #8992 = VDPBF16PSZ256mbkz |
| 38165 | { 8991, 9, 1, 0, 2196, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73a968005019ULL }, // Inst #8991 = VDPBF16PSZ256mbk |
| 38166 | { 8990, 8, 1, 0, 2196, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71a968005019ULL }, // Inst #8990 = VDPBF16PSZ256mb |
| 38167 | { 8989, 8, 1, 0, 2196, 0, 0, 3573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a968005019ULL }, // Inst #8989 = VDPBF16PSZ256m |
| 38168 | { 8988, 5, 1, 0, 1076, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa6a968005029ULL }, // Inst #8988 = VDPBF16PSZ128rkz |
| 38169 | { 8987, 5, 1, 0, 1076, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2a968005029ULL }, // Inst #8987 = VDPBF16PSZ128rk |
| 38170 | { 8986, 4, 1, 0, 1076, 0, 0, 3569, X86ImpOpBase + 0, 0, 0xa0a968005029ULL }, // Inst #8986 = VDPBF16PSZ128r |
| 38171 | { 8985, 9, 1, 0, 2194, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a968005019ULL }, // Inst #8985 = VDPBF16PSZ128mkz |
| 38172 | { 8984, 9, 1, 0, 2194, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a968005019ULL }, // Inst #8984 = VDPBF16PSZ128mk |
| 38173 | { 8983, 9, 1, 0, 2195, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76a968005019ULL }, // Inst #8983 = VDPBF16PSZ128mbkz |
| 38174 | { 8982, 9, 1, 0, 2194, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72a968005019ULL }, // Inst #8982 = VDPBF16PSZ128mbk |
| 38175 | { 8981, 8, 1, 0, 2194, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70a968005019ULL }, // Inst #8981 = VDPBF16PSZ128mb |
| 38176 | { 8980, 8, 1, 0, 2194, 0, 0, 1620, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a968005019ULL }, // Inst #8980 = VDPBF16PSZ128m |
| 38177 | { 8979, 3, 1, 0, 133, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf28003029ULL }, // Inst #8979 = VDIVSSrr_Int |
| 38178 | { 8978, 3, 1, 0, 133, 1, 0, 2046, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf28003029ULL }, // Inst #8978 = VDIVSSrr |
| 38179 | { 8977, 7, 1, 0, 136, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf28003019ULL }, // Inst #8977 = VDIVSSrm_Int |
| 38180 | { 8976, 7, 1, 0, 136, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf28003019ULL }, // Inst #8976 = VDIVSSrm |
| 38181 | { 8975, 4, 1, 0, 133, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66af68003029ULL }, // Inst #8975 = VDIVSSZrrkz_Int |
| 38182 | { 8974, 5, 1, 0, 133, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62af68003029ULL }, // Inst #8974 = VDIVSSZrrk_Int |
| 38183 | { 8973, 5, 1, 0, 133, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x176af68003029ULL }, // Inst #8973 = VDIVSSZrrbkz_Int |
| 38184 | { 8972, 6, 1, 0, 133, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x172af68003029ULL }, // Inst #8972 = VDIVSSZrrbk_Int |
| 38185 | { 8971, 4, 1, 0, 133, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x170af68003029ULL }, // Inst #8971 = VDIVSSZrrb_Int |
| 38186 | { 8970, 3, 1, 0, 133, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60af68003029ULL }, // Inst #8970 = VDIVSSZrr_Int |
| 38187 | { 8969, 3, 1, 0, 133, 1, 0, 2036, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60af68003029ULL }, // Inst #8969 = VDIVSSZrr |
| 38188 | { 8968, 8, 1, 0, 136, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66af68003019ULL }, // Inst #8968 = VDIVSSZrmkz_Int |
| 38189 | { 8967, 9, 1, 0, 136, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62af68003019ULL }, // Inst #8967 = VDIVSSZrmk_Int |
| 38190 | { 8966, 7, 1, 0, 136, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60af68003019ULL }, // Inst #8966 = VDIVSSZrm_Int |
| 38191 | { 8965, 7, 1, 0, 136, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60af68003019ULL }, // Inst #8965 = VDIVSSZrm |
| 38192 | { 8964, 4, 1, 0, 133, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x46af68013029ULL }, // Inst #8964 = VDIVSHZrrkz_Int |
| 38193 | { 8963, 5, 1, 0, 133, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x42af68013029ULL }, // Inst #8963 = VDIVSHZrrk_Int |
| 38194 | { 8962, 5, 1, 0, 133, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x156af68013029ULL }, // Inst #8962 = VDIVSHZrrbkz_Int |
| 38195 | { 8961, 6, 1, 0, 133, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x152af68013029ULL }, // Inst #8961 = VDIVSHZrrbk_Int |
| 38196 | { 8960, 4, 1, 0, 133, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x150af68013029ULL }, // Inst #8960 = VDIVSHZrrb_Int |
| 38197 | { 8959, 3, 1, 0, 2192, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40af68013029ULL }, // Inst #8959 = VDIVSHZrr_Int |
| 38198 | { 8958, 3, 1, 0, 133, 1, 0, 2026, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40af68013029ULL }, // Inst #8958 = VDIVSHZrr |
| 38199 | { 8957, 8, 1, 0, 2190, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46af68013019ULL }, // Inst #8957 = VDIVSHZrmkz_Int |
| 38200 | { 8956, 9, 1, 0, 2190, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42af68013019ULL }, // Inst #8956 = VDIVSHZrmk_Int |
| 38201 | { 8955, 7, 1, 0, 2190, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40af68013019ULL }, // Inst #8955 = VDIVSHZrm_Int |
| 38202 | { 8954, 7, 1, 0, 2191, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40af68013019ULL }, // Inst #8954 = VDIVSHZrm |
| 38203 | { 8953, 3, 1, 0, 135, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf30003829ULL }, // Inst #8953 = VDIVSDrr_Int |
| 38204 | { 8952, 3, 1, 0, 135, 1, 0, 2016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf30003829ULL }, // Inst #8952 = VDIVSDrr |
| 38205 | { 8951, 7, 1, 0, 1501, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf30003819ULL }, // Inst #8951 = VDIVSDrm_Int |
| 38206 | { 8950, 7, 1, 0, 1747, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf30003819ULL }, // Inst #8950 = VDIVSDrm |
| 38207 | { 8949, 4, 1, 0, 135, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86af70023829ULL }, // Inst #8949 = VDIVSDZrrkz_Int |
| 38208 | { 8948, 5, 1, 0, 135, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82af70023829ULL }, // Inst #8948 = VDIVSDZrrk_Int |
| 38209 | { 8947, 5, 1, 0, 135, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x196af70023829ULL }, // Inst #8947 = VDIVSDZrrbkz_Int |
| 38210 | { 8946, 6, 1, 0, 135, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x192af70023829ULL }, // Inst #8946 = VDIVSDZrrbk_Int |
| 38211 | { 8945, 4, 1, 0, 135, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x190af70023829ULL }, // Inst #8945 = VDIVSDZrrb_Int |
| 38212 | { 8944, 3, 1, 0, 135, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80af70023829ULL }, // Inst #8944 = VDIVSDZrr_Int |
| 38213 | { 8943, 3, 1, 0, 135, 1, 0, 1982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80af70023829ULL }, // Inst #8943 = VDIVSDZrr |
| 38214 | { 8942, 8, 1, 0, 134, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86af70023819ULL }, // Inst #8942 = VDIVSDZrmkz_Int |
| 38215 | { 8941, 9, 1, 0, 134, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82af70023819ULL }, // Inst #8941 = VDIVSDZrmk_Int |
| 38216 | { 8940, 7, 1, 0, 134, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80af70023819ULL }, // Inst #8940 = VDIVSDZrm_Int |
| 38217 | { 8939, 7, 1, 0, 1748, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80af70023819ULL }, // Inst #8939 = VDIVSDZrm |
| 38218 | { 8938, 3, 1, 0, 131, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf28002029ULL }, // Inst #8938 = VDIVPSrr |
| 38219 | { 8937, 7, 1, 0, 130, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf28002019ULL }, // Inst #8937 = VDIVPSrm |
| 38220 | { 8936, 4, 1, 0, 426, 1, 0, 1963, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaf68002029ULL }, // Inst #8936 = VDIVPSZrrkz |
| 38221 | { 8935, 5, 1, 0, 426, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaf68002029ULL }, // Inst #8935 = VDIVPSZrrk |
| 38222 | { 8934, 5, 1, 0, 426, 1, 0, 1953, X86ImpOpBase + 78, 0, 0x17eaf68002029ULL }, // Inst #8934 = VDIVPSZrrbkz |
| 38223 | { 8933, 6, 1, 0, 426, 1, 0, 1947, X86ImpOpBase + 78, 0, 0x17aaf68002029ULL }, // Inst #8933 = VDIVPSZrrbk |
| 38224 | { 8932, 4, 1, 0, 426, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x178af68002029ULL }, // Inst #8932 = VDIVPSZrrb |
| 38225 | { 8931, 3, 1, 0, 2189, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8af68002029ULL }, // Inst #8931 = VDIVPSZrr |
| 38226 | { 8930, 8, 1, 0, 425, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaf68002019ULL }, // Inst #8930 = VDIVPSZrmkz |
| 38227 | { 8929, 9, 1, 0, 425, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaf68002019ULL }, // Inst #8929 = VDIVPSZrmk |
| 38228 | { 8928, 8, 1, 0, 425, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eaf68002019ULL }, // Inst #8928 = VDIVPSZrmbkz |
| 38229 | { 8927, 9, 1, 0, 425, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aaf68002019ULL }, // Inst #8927 = VDIVPSZrmbk |
| 38230 | { 8926, 7, 1, 0, 425, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78af68002019ULL }, // Inst #8926 = VDIVPSZrmb |
| 38231 | { 8925, 7, 1, 0, 425, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8af68002019ULL }, // Inst #8925 = VDIVPSZrm |
| 38232 | { 8924, 4, 1, 0, 424, 1, 0, 1935, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7af68002029ULL }, // Inst #8924 = VDIVPSZ256rrkz |
| 38233 | { 8923, 5, 1, 0, 424, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3af68002029ULL }, // Inst #8923 = VDIVPSZ256rrk |
| 38234 | { 8922, 3, 1, 0, 424, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1af68002029ULL }, // Inst #8922 = VDIVPSZ256rr |
| 38235 | { 8921, 8, 1, 0, 423, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7af68002019ULL }, // Inst #8921 = VDIVPSZ256rmkz |
| 38236 | { 8920, 9, 1, 0, 423, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3af68002019ULL }, // Inst #8920 = VDIVPSZ256rmk |
| 38237 | { 8919, 8, 1, 0, 423, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77af68002019ULL }, // Inst #8919 = VDIVPSZ256rmbkz |
| 38238 | { 8918, 9, 1, 0, 423, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73af68002019ULL }, // Inst #8918 = VDIVPSZ256rmbk |
| 38239 | { 8917, 7, 1, 0, 423, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71af68002019ULL }, // Inst #8917 = VDIVPSZ256rmb |
| 38240 | { 8916, 7, 1, 0, 423, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1af68002019ULL }, // Inst #8916 = VDIVPSZ256rm |
| 38241 | { 8915, 4, 1, 0, 131, 1, 0, 1909, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6af68002029ULL }, // Inst #8915 = VDIVPSZ128rrkz |
| 38242 | { 8914, 5, 1, 0, 131, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2af68002029ULL }, // Inst #8914 = VDIVPSZ128rrk |
| 38243 | { 8913, 3, 1, 0, 131, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0af68002029ULL }, // Inst #8913 = VDIVPSZ128rr |
| 38244 | { 8912, 8, 1, 0, 130, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6af68002019ULL }, // Inst #8912 = VDIVPSZ128rmkz |
| 38245 | { 8911, 9, 1, 0, 130, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2af68002019ULL }, // Inst #8911 = VDIVPSZ128rmk |
| 38246 | { 8910, 8, 1, 0, 130, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76af68002019ULL }, // Inst #8910 = VDIVPSZ128rmbkz |
| 38247 | { 8909, 9, 1, 0, 130, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72af68002019ULL }, // Inst #8909 = VDIVPSZ128rmbk |
| 38248 | { 8908, 7, 1, 0, 130, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70af68002019ULL }, // Inst #8908 = VDIVPSZ128rmb |
| 38249 | { 8907, 7, 1, 0, 130, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0af68002019ULL }, // Inst #8907 = VDIVPSZ128rm |
| 38250 | { 8906, 3, 1, 0, 424, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1af28002029ULL }, // Inst #8906 = VDIVPSYrr |
| 38251 | { 8905, 7, 1, 0, 423, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1af28002019ULL }, // Inst #8905 = VDIVPSYrm |
| 38252 | { 8904, 4, 1, 0, 2188, 1, 0, 1759, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaf68012029ULL }, // Inst #8904 = VDIVPHZrrkz |
| 38253 | { 8903, 5, 1, 0, 2188, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaf68012029ULL }, // Inst #8903 = VDIVPHZrrk |
| 38254 | { 8902, 5, 1, 0, 2188, 1, 0, 1882, X86ImpOpBase + 78, 0, 0x15eaf68012029ULL }, // Inst #8902 = VDIVPHZrrbkz |
| 38255 | { 8901, 6, 1, 0, 2188, 1, 0, 1876, X86ImpOpBase + 78, 0, 0x15aaf68012029ULL }, // Inst #8901 = VDIVPHZrrbk |
| 38256 | { 8900, 4, 1, 0, 2187, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x158af68012029ULL }, // Inst #8900 = VDIVPHZrrb |
| 38257 | { 8899, 3, 1, 0, 2187, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8af68012029ULL }, // Inst #8899 = VDIVPHZrr |
| 38258 | { 8898, 8, 1, 0, 2186, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaf68012019ULL }, // Inst #8898 = VDIVPHZrmkz |
| 38259 | { 8897, 9, 1, 0, 2186, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaf68012019ULL }, // Inst #8897 = VDIVPHZrmk |
| 38260 | { 8896, 8, 1, 0, 2186, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eaf68012019ULL }, // Inst #8896 = VDIVPHZrmbkz |
| 38261 | { 8895, 9, 1, 0, 2186, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aaf68012019ULL }, // Inst #8895 = VDIVPHZrmbk |
| 38262 | { 8894, 7, 1, 0, 2185, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58af68012019ULL }, // Inst #8894 = VDIVPHZrmb |
| 38263 | { 8893, 7, 1, 0, 2185, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8af68012019ULL }, // Inst #8893 = VDIVPHZrm |
| 38264 | { 8892, 4, 1, 0, 2184, 1, 0, 1723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7af68012029ULL }, // Inst #8892 = VDIVPHZ256rrkz |
| 38265 | { 8891, 5, 1, 0, 2177, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3af68012029ULL }, // Inst #8891 = VDIVPHZ256rrk |
| 38266 | { 8890, 3, 1, 0, 2175, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1af68012029ULL }, // Inst #8890 = VDIVPHZ256rr |
| 38267 | { 8889, 8, 1, 0, 2182, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7af68012019ULL }, // Inst #8889 = VDIVPHZ256rmkz |
| 38268 | { 8888, 9, 1, 0, 2182, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3af68012019ULL }, // Inst #8888 = VDIVPHZ256rmk |
| 38269 | { 8887, 8, 1, 0, 2182, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57af68012019ULL }, // Inst #8887 = VDIVPHZ256rmbkz |
| 38270 | { 8886, 9, 1, 0, 2182, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53af68012019ULL }, // Inst #8886 = VDIVPHZ256rmbk |
| 38271 | { 8885, 7, 1, 0, 2181, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51af68012019ULL }, // Inst #8885 = VDIVPHZ256rmb |
| 38272 | { 8884, 7, 1, 0, 2181, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1af68012019ULL }, // Inst #8884 = VDIVPHZ256rm |
| 38273 | { 8883, 4, 1, 0, 2180, 1, 0, 1687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6af68012029ULL }, // Inst #8883 = VDIVPHZ128rrkz |
| 38274 | { 8882, 5, 1, 0, 2176, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2af68012029ULL }, // Inst #8882 = VDIVPHZ128rrk |
| 38275 | { 8881, 3, 1, 0, 2174, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0af68012029ULL }, // Inst #8881 = VDIVPHZ128rr |
| 38276 | { 8880, 8, 1, 0, 2173, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6af68012019ULL }, // Inst #8880 = VDIVPHZ128rmkz |
| 38277 | { 8879, 9, 1, 0, 2173, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2af68012019ULL }, // Inst #8879 = VDIVPHZ128rmk |
| 38278 | { 8878, 8, 1, 0, 2173, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56af68012019ULL }, // Inst #8878 = VDIVPHZ128rmbkz |
| 38279 | { 8877, 9, 1, 0, 2173, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52af68012019ULL }, // Inst #8877 = VDIVPHZ128rmbk |
| 38280 | { 8876, 7, 1, 0, 2172, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50af68012019ULL }, // Inst #8876 = VDIVPHZ128rmb |
| 38281 | { 8875, 7, 1, 0, 2172, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0af68012019ULL }, // Inst #8875 = VDIVPHZ128rm |
| 38282 | { 8874, 3, 1, 0, 129, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf30002829ULL }, // Inst #8874 = VDIVPDrr |
| 38283 | { 8873, 7, 1, 0, 128, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf30002819ULL }, // Inst #8873 = VDIVPDrm |
| 38284 | { 8872, 4, 1, 0, 430, 1, 0, 1862, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaf70022829ULL }, // Inst #8872 = VDIVPDZrrkz |
| 38285 | { 8871, 5, 1, 0, 430, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaf70022829ULL }, // Inst #8871 = VDIVPDZrrk |
| 38286 | { 8870, 5, 1, 0, 430, 1, 0, 1852, X86ImpOpBase + 78, 0, 0x19eaf70022829ULL }, // Inst #8870 = VDIVPDZrrbkz |
| 38287 | { 8869, 6, 1, 0, 430, 1, 0, 1846, X86ImpOpBase + 78, 0, 0x19aaf70022829ULL }, // Inst #8869 = VDIVPDZrrbk |
| 38288 | { 8868, 4, 1, 0, 430, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x198af70022829ULL }, // Inst #8868 = VDIVPDZrrb |
| 38289 | { 8867, 3, 1, 0, 430, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8af70022829ULL }, // Inst #8867 = VDIVPDZrr |
| 38290 | { 8866, 8, 1, 0, 429, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaf70022819ULL }, // Inst #8866 = VDIVPDZrmkz |
| 38291 | { 8865, 9, 1, 0, 429, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaf70022819ULL }, // Inst #8865 = VDIVPDZrmk |
| 38292 | { 8864, 8, 1, 0, 429, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaf70022819ULL }, // Inst #8864 = VDIVPDZrmbkz |
| 38293 | { 8863, 9, 1, 0, 429, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaf70022819ULL }, // Inst #8863 = VDIVPDZrmbk |
| 38294 | { 8862, 7, 1, 0, 429, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98af70022819ULL }, // Inst #8862 = VDIVPDZrmb |
| 38295 | { 8861, 7, 1, 0, 429, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8af70022819ULL }, // Inst #8861 = VDIVPDZrm |
| 38296 | { 8860, 4, 1, 0, 428, 1, 0, 1821, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7af70022829ULL }, // Inst #8860 = VDIVPDZ256rrkz |
| 38297 | { 8859, 5, 1, 0, 428, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3af70022829ULL }, // Inst #8859 = VDIVPDZ256rrk |
| 38298 | { 8858, 3, 1, 0, 428, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1af70022829ULL }, // Inst #8858 = VDIVPDZ256rr |
| 38299 | { 8857, 8, 1, 0, 427, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7af70022819ULL }, // Inst #8857 = VDIVPDZ256rmkz |
| 38300 | { 8856, 9, 1, 0, 427, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3af70022819ULL }, // Inst #8856 = VDIVPDZ256rmk |
| 38301 | { 8855, 8, 1, 0, 427, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97af70022819ULL }, // Inst #8855 = VDIVPDZ256rmbkz |
| 38302 | { 8854, 9, 1, 0, 427, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93af70022819ULL }, // Inst #8854 = VDIVPDZ256rmbk |
| 38303 | { 8853, 7, 1, 0, 427, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91af70022819ULL }, // Inst #8853 = VDIVPDZ256rmb |
| 38304 | { 8852, 7, 1, 0, 427, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1af70022819ULL }, // Inst #8852 = VDIVPDZ256rm |
| 38305 | { 8851, 4, 1, 0, 129, 1, 0, 1795, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6af70022829ULL }, // Inst #8851 = VDIVPDZ128rrkz |
| 38306 | { 8850, 5, 1, 0, 129, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2af70022829ULL }, // Inst #8850 = VDIVPDZ128rrk |
| 38307 | { 8849, 3, 1, 0, 129, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0af70022829ULL }, // Inst #8849 = VDIVPDZ128rr |
| 38308 | { 8848, 8, 1, 0, 128, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6af70022819ULL }, // Inst #8848 = VDIVPDZ128rmkz |
| 38309 | { 8847, 9, 1, 0, 128, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2af70022819ULL }, // Inst #8847 = VDIVPDZ128rmk |
| 38310 | { 8846, 8, 1, 0, 128, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96af70022819ULL }, // Inst #8846 = VDIVPDZ128rmbkz |
| 38311 | { 8845, 9, 1, 0, 128, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92af70022819ULL }, // Inst #8845 = VDIVPDZ128rmbk |
| 38312 | { 8844, 7, 1, 0, 128, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90af70022819ULL }, // Inst #8844 = VDIVPDZ128rmb |
| 38313 | { 8843, 7, 1, 0, 128, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0af70022819ULL }, // Inst #8843 = VDIVPDZ128rm |
| 38314 | { 8842, 3, 1, 0, 428, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1af30002829ULL }, // Inst #8842 = VDIVPDYrr |
| 38315 | { 8841, 7, 1, 0, 427, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1af30002819ULL }, // Inst #8841 = VDIVPDYrm |
| 38316 | { 8840, 4, 1, 0, 426, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeeaf68012829ULL }, // Inst #8840 = VDIVBF16Zrrkz |
| 38317 | { 8839, 5, 1, 0, 426, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeaaf68012829ULL }, // Inst #8839 = VDIVBF16Zrrk |
| 38318 | { 8838, 3, 1, 0, 426, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8af68012829ULL }, // Inst #8838 = VDIVBF16Zrr |
| 38319 | { 8837, 8, 1, 0, 425, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeaf68012819ULL }, // Inst #8837 = VDIVBF16Zrmkz |
| 38320 | { 8836, 9, 1, 0, 425, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaaf68012819ULL }, // Inst #8836 = VDIVBF16Zrmk |
| 38321 | { 8835, 8, 1, 0, 425, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5eaf68012819ULL }, // Inst #8835 = VDIVBF16Zrmbkz |
| 38322 | { 8834, 9, 1, 0, 425, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5aaf68012819ULL }, // Inst #8834 = VDIVBF16Zrmbk |
| 38323 | { 8833, 7, 1, 0, 425, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58af68012819ULL }, // Inst #8833 = VDIVBF16Zrmb |
| 38324 | { 8832, 7, 1, 0, 425, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8af68012819ULL }, // Inst #8832 = VDIVBF16Zrm |
| 38325 | { 8831, 4, 1, 0, 424, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7af68012829ULL }, // Inst #8831 = VDIVBF16Z256rrkz |
| 38326 | { 8830, 5, 1, 0, 424, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3af68012829ULL }, // Inst #8830 = VDIVBF16Z256rrk |
| 38327 | { 8829, 3, 1, 0, 424, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1af68012829ULL }, // Inst #8829 = VDIVBF16Z256rr |
| 38328 | { 8828, 8, 1, 0, 423, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7af68012819ULL }, // Inst #8828 = VDIVBF16Z256rmkz |
| 38329 | { 8827, 9, 1, 0, 423, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3af68012819ULL }, // Inst #8827 = VDIVBF16Z256rmk |
| 38330 | { 8826, 8, 1, 0, 423, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x57af68012819ULL }, // Inst #8826 = VDIVBF16Z256rmbkz |
| 38331 | { 8825, 9, 1, 0, 423, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53af68012819ULL }, // Inst #8825 = VDIVBF16Z256rmbk |
| 38332 | { 8824, 7, 1, 0, 423, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51af68012819ULL }, // Inst #8824 = VDIVBF16Z256rmb |
| 38333 | { 8823, 7, 1, 0, 423, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1af68012819ULL }, // Inst #8823 = VDIVBF16Z256rm |
| 38334 | { 8822, 4, 1, 0, 131, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6af68012829ULL }, // Inst #8822 = VDIVBF16Z128rrkz |
| 38335 | { 8821, 5, 1, 0, 131, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2af68012829ULL }, // Inst #8821 = VDIVBF16Z128rrk |
| 38336 | { 8820, 3, 1, 0, 131, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0af68012829ULL }, // Inst #8820 = VDIVBF16Z128rr |
| 38337 | { 8819, 8, 1, 0, 130, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6af68012819ULL }, // Inst #8819 = VDIVBF16Z128rmkz |
| 38338 | { 8818, 9, 1, 0, 130, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2af68012819ULL }, // Inst #8818 = VDIVBF16Z128rmk |
| 38339 | { 8817, 8, 1, 0, 130, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x56af68012819ULL }, // Inst #8817 = VDIVBF16Z128rmbkz |
| 38340 | { 8816, 9, 1, 0, 130, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52af68012819ULL }, // Inst #8816 = VDIVBF16Z128rmbk |
| 38341 | { 8815, 7, 1, 0, 130, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50af68012819ULL }, // Inst #8815 = VDIVBF16Z128rmb |
| 38342 | { 8814, 7, 1, 0, 130, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0af68012819ULL }, // Inst #8814 = VDIVBF16Z128rm |
| 38343 | { 8813, 5, 1, 0, 2159, 0, 0, 3564, X86ImpOpBase + 0, 0, 0xeea178046829ULL }, // Inst #8813 = VDBPSADBWZrrikz |
| 38344 | { 8812, 6, 1, 0, 2159, 0, 0, 3558, X86ImpOpBase + 0, 0, 0xeaa178046829ULL }, // Inst #8812 = VDBPSADBWZrrik |
| 38345 | { 8811, 4, 1, 0, 422, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe8a178046829ULL }, // Inst #8811 = VDBPSADBWZrri |
| 38346 | { 8810, 9, 1, 0, 1884, 0, 0, 3549, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeea178046819ULL }, // Inst #8810 = VDBPSADBWZrmikz |
| 38347 | { 8809, 10, 1, 0, 1884, 0, 0, 3539, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaa178046819ULL }, // Inst #8809 = VDBPSADBWZrmik |
| 38348 | { 8808, 8, 1, 0, 421, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8a178046819ULL }, // Inst #8808 = VDBPSADBWZrmi |
| 38349 | { 8807, 5, 1, 0, 2158, 0, 0, 3534, X86ImpOpBase + 0, 0, 0xc7a178046829ULL }, // Inst #8807 = VDBPSADBWZ256rrikz |
| 38350 | { 8806, 6, 1, 0, 2158, 0, 0, 3528, X86ImpOpBase + 0, 0, 0xc3a178046829ULL }, // Inst #8806 = VDBPSADBWZ256rrik |
| 38351 | { 8805, 4, 1, 0, 420, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc1a178046829ULL }, // Inst #8805 = VDBPSADBWZ256rri |
| 38352 | { 8804, 9, 1, 0, 1883, 0, 0, 3519, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7a178046819ULL }, // Inst #8804 = VDBPSADBWZ256rmikz |
| 38353 | { 8803, 10, 1, 0, 1883, 0, 0, 3509, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3a178046819ULL }, // Inst #8803 = VDBPSADBWZ256rmik |
| 38354 | { 8802, 8, 1, 0, 419, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1a178046819ULL }, // Inst #8802 = VDBPSADBWZ256rmi |
| 38355 | { 8801, 5, 1, 0, 2157, 0, 0, 3504, X86ImpOpBase + 0, 0, 0xa6a178046829ULL }, // Inst #8801 = VDBPSADBWZ128rrikz |
| 38356 | { 8800, 6, 1, 0, 2157, 0, 0, 3498, X86ImpOpBase + 0, 0, 0xa2a178046829ULL }, // Inst #8800 = VDBPSADBWZ128rrik |
| 38357 | { 8799, 4, 1, 0, 281, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa0a178046829ULL }, // Inst #8799 = VDBPSADBWZ128rri |
| 38358 | { 8798, 9, 1, 0, 1881, 0, 0, 3489, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6a178046819ULL }, // Inst #8798 = VDBPSADBWZ128rmikz |
| 38359 | { 8797, 10, 1, 0, 1881, 0, 0, 3479, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2a178046819ULL }, // Inst #8797 = VDBPSADBWZ128rmik |
| 38360 | { 8796, 8, 1, 0, 280, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0a178046819ULL }, // Inst #8796 = VDBPSADBWZ128rmi |
| 38361 | { 8795, 3, 1, 0, 1927, 1, 0, 2987, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0013029ULL }, // Inst #8795 = VCVTW2PHZrrkz |
| 38362 | { 8794, 4, 1, 0, 1927, 1, 0, 2983, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0013029ULL }, // Inst #8794 = VCVTW2PHZrrk |
| 38363 | { 8793, 4, 1, 0, 1927, 1, 0, 3267, X86ImpOpBase + 78, 0, 0x15e3ee0013029ULL }, // Inst #8793 = VCVTW2PHZrrbkz |
| 38364 | { 8792, 5, 1, 0, 1927, 1, 0, 3262, X86ImpOpBase + 78, 0, 0x15a3ee0013029ULL }, // Inst #8792 = VCVTW2PHZrrbk |
| 38365 | { 8791, 3, 1, 0, 1920, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1583ee0013029ULL }, // Inst #8791 = VCVTW2PHZrrb |
| 38366 | { 8790, 2, 1, 0, 1920, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0013029ULL }, // Inst #8790 = VCVTW2PHZrr |
| 38367 | { 8789, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0013019ULL }, // Inst #8789 = VCVTW2PHZrmkz |
| 38368 | { 8788, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0013019ULL }, // Inst #8788 = VCVTW2PHZrmk |
| 38369 | { 8787, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ee0013019ULL }, // Inst #8787 = VCVTW2PHZrmbkz |
| 38370 | { 8786, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ee0013019ULL }, // Inst #8786 = VCVTW2PHZrmbk |
| 38371 | { 8785, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ee0013019ULL }, // Inst #8785 = VCVTW2PHZrmb |
| 38372 | { 8784, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0013019ULL }, // Inst #8784 = VCVTW2PHZrm |
| 38373 | { 8783, 3, 1, 0, 1906, 1, 0, 2965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0013029ULL }, // Inst #8783 = VCVTW2PHZ256rrkz |
| 38374 | { 8782, 4, 1, 0, 1906, 1, 0, 2961, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0013029ULL }, // Inst #8782 = VCVTW2PHZ256rrk |
| 38375 | { 8781, 2, 1, 0, 1777, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0013029ULL }, // Inst #8781 = VCVTW2PHZ256rr |
| 38376 | { 8780, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0013019ULL }, // Inst #8780 = VCVTW2PHZ256rmkz |
| 38377 | { 8779, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0013019ULL }, // Inst #8779 = VCVTW2PHZ256rmk |
| 38378 | { 8778, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ee0013019ULL }, // Inst #8778 = VCVTW2PHZ256rmbkz |
| 38379 | { 8777, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ee0013019ULL }, // Inst #8777 = VCVTW2PHZ256rmbk |
| 38380 | { 8776, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ee0013019ULL }, // Inst #8776 = VCVTW2PHZ256rmb |
| 38381 | { 8775, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0013019ULL }, // Inst #8775 = VCVTW2PHZ256rm |
| 38382 | { 8774, 3, 1, 0, 1905, 1, 0, 2943, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0013029ULL }, // Inst #8774 = VCVTW2PHZ128rrkz |
| 38383 | { 8773, 4, 1, 0, 1905, 1, 0, 2939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0013029ULL }, // Inst #8773 = VCVTW2PHZ128rrk |
| 38384 | { 8772, 2, 1, 0, 1776, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0013029ULL }, // Inst #8772 = VCVTW2PHZ128rr |
| 38385 | { 8771, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0013019ULL }, // Inst #8771 = VCVTW2PHZ128rmkz |
| 38386 | { 8770, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0013019ULL }, // Inst #8770 = VCVTW2PHZ128rmk |
| 38387 | { 8769, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ee0013019ULL }, // Inst #8769 = VCVTW2PHZ128rmbkz |
| 38388 | { 8768, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ee0013019ULL }, // Inst #8768 = VCVTW2PHZ128rmbk |
| 38389 | { 8767, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ee0013019ULL }, // Inst #8767 = VCVTW2PHZ128rmb |
| 38390 | { 8766, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0013019ULL }, // Inst #8766 = VCVTW2PHZ128rm |
| 38391 | { 8765, 3, 1, 0, 1927, 1, 0, 2987, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0013829ULL }, // Inst #8765 = VCVTUW2PHZrrkz |
| 38392 | { 8764, 4, 1, 0, 1927, 1, 0, 2983, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0013829ULL }, // Inst #8764 = VCVTUW2PHZrrk |
| 38393 | { 8763, 4, 1, 0, 1927, 1, 0, 3267, X86ImpOpBase + 78, 0, 0x15e3ee0013829ULL }, // Inst #8763 = VCVTUW2PHZrrbkz |
| 38394 | { 8762, 5, 1, 0, 1927, 1, 0, 3262, X86ImpOpBase + 78, 0, 0x15a3ee0013829ULL }, // Inst #8762 = VCVTUW2PHZrrbk |
| 38395 | { 8761, 3, 1, 0, 1920, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1583ee0013829ULL }, // Inst #8761 = VCVTUW2PHZrrb |
| 38396 | { 8760, 2, 1, 0, 1920, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0013829ULL }, // Inst #8760 = VCVTUW2PHZrr |
| 38397 | { 8759, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0013819ULL }, // Inst #8759 = VCVTUW2PHZrmkz |
| 38398 | { 8758, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0013819ULL }, // Inst #8758 = VCVTUW2PHZrmk |
| 38399 | { 8757, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ee0013819ULL }, // Inst #8757 = VCVTUW2PHZrmbkz |
| 38400 | { 8756, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ee0013819ULL }, // Inst #8756 = VCVTUW2PHZrmbk |
| 38401 | { 8755, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ee0013819ULL }, // Inst #8755 = VCVTUW2PHZrmb |
| 38402 | { 8754, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0013819ULL }, // Inst #8754 = VCVTUW2PHZrm |
| 38403 | { 8753, 3, 1, 0, 1906, 1, 0, 2965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0013829ULL }, // Inst #8753 = VCVTUW2PHZ256rrkz |
| 38404 | { 8752, 4, 1, 0, 1906, 1, 0, 2961, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0013829ULL }, // Inst #8752 = VCVTUW2PHZ256rrk |
| 38405 | { 8751, 2, 1, 0, 1777, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0013829ULL }, // Inst #8751 = VCVTUW2PHZ256rr |
| 38406 | { 8750, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0013819ULL }, // Inst #8750 = VCVTUW2PHZ256rmkz |
| 38407 | { 8749, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0013819ULL }, // Inst #8749 = VCVTUW2PHZ256rmk |
| 38408 | { 8748, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ee0013819ULL }, // Inst #8748 = VCVTUW2PHZ256rmbkz |
| 38409 | { 8747, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ee0013819ULL }, // Inst #8747 = VCVTUW2PHZ256rmbk |
| 38410 | { 8746, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ee0013819ULL }, // Inst #8746 = VCVTUW2PHZ256rmb |
| 38411 | { 8745, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0013819ULL }, // Inst #8745 = VCVTUW2PHZ256rm |
| 38412 | { 8744, 3, 1, 0, 1905, 1, 0, 2943, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0013829ULL }, // Inst #8744 = VCVTUW2PHZ128rrkz |
| 38413 | { 8743, 4, 1, 0, 1905, 1, 0, 2939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0013829ULL }, // Inst #8743 = VCVTUW2PHZ128rrk |
| 38414 | { 8742, 2, 1, 0, 1776, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0013829ULL }, // Inst #8742 = VCVTUW2PHZ128rr |
| 38415 | { 8741, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0013819ULL }, // Inst #8741 = VCVTUW2PHZ128rmkz |
| 38416 | { 8740, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0013819ULL }, // Inst #8740 = VCVTUW2PHZ128rmk |
| 38417 | { 8739, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ee0013819ULL }, // Inst #8739 = VCVTUW2PHZ128rmbkz |
| 38418 | { 8738, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ee0013819ULL }, // Inst #8738 = VCVTUW2PHZ128rmbk |
| 38419 | { 8737, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ee0013819ULL }, // Inst #8737 = VCVTUW2PHZ128rmb |
| 38420 | { 8736, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0013819ULL }, // Inst #8736 = VCVTUW2PHZ128rm |
| 38421 | { 8735, 4, 1, 0, 1287, 1, 0, 3443, X86ImpOpBase + 78, 0, 0x190bde8023029ULL }, // Inst #8735 = VCVTUSI642SSZrrb_Int |
| 38422 | { 8734, 3, 1, 0, 1287, 1, 0, 3440, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bde8023029ULL }, // Inst #8734 = VCVTUSI642SSZrr_Int |
| 38423 | { 8733, 3, 1, 0, 1287, 1, 0, 3456, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bde8023029ULL }, // Inst #8733 = VCVTUSI642SSZrr |
| 38424 | { 8732, 7, 1, 0, 1742, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bde8023019ULL }, // Inst #8732 = VCVTUSI642SSZrm_Int |
| 38425 | { 8731, 7, 1, 0, 1742, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bde8023019ULL }, // Inst #8731 = VCVTUSI642SSZrm |
| 38426 | { 8730, 4, 1, 0, 114, 1, 0, 3443, X86ImpOpBase + 78, 0, 0x190bde8033029ULL }, // Inst #8730 = VCVTUSI642SHZrrb_Int |
| 38427 | { 8729, 3, 1, 0, 114, 1, 0, 3440, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bde8033029ULL }, // Inst #8729 = VCVTUSI642SHZrr_Int |
| 38428 | { 8728, 3, 1, 0, 114, 1, 0, 3453, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bde8033029ULL }, // Inst #8728 = VCVTUSI642SHZrr |
| 38429 | { 8727, 7, 1, 0, 2151, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bde8033019ULL }, // Inst #8727 = VCVTUSI642SHZrm_Int |
| 38430 | { 8726, 7, 1, 0, 2151, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bde8033019ULL }, // Inst #8726 = VCVTUSI642SHZrm |
| 38431 | { 8725, 4, 1, 0, 1275, 1, 0, 3443, X86ImpOpBase + 78, 0, 0x190bdf0023829ULL }, // Inst #8725 = VCVTUSI642SDZrrb_Int |
| 38432 | { 8724, 3, 1, 0, 1275, 1, 0, 3440, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bdf0023829ULL }, // Inst #8724 = VCVTUSI642SDZrr_Int |
| 38433 | { 8723, 3, 1, 0, 1275, 1, 0, 3437, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bdf0023829ULL }, // Inst #8723 = VCVTUSI642SDZrr |
| 38434 | { 8722, 7, 1, 0, 108, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bdf0023819ULL }, // Inst #8722 = VCVTUSI642SDZrm_Int |
| 38435 | { 8721, 7, 1, 0, 108, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bdf0023819ULL }, // Inst #8721 = VCVTUSI642SDZrm |
| 38436 | { 8720, 4, 1, 0, 1745, 1, 0, 3427, X86ImpOpBase + 78, 0, 0x170bde8003029ULL }, // Inst #8720 = VCVTUSI2SSZrrb_Int |
| 38437 | { 8719, 3, 1, 0, 1745, 1, 0, 3415, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60bde8003029ULL }, // Inst #8719 = VCVTUSI2SSZrr_Int |
| 38438 | { 8718, 3, 1, 0, 1745, 1, 0, 3431, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60bde8003029ULL }, // Inst #8718 = VCVTUSI2SSZrr |
| 38439 | { 8717, 7, 1, 0, 112, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60bde8003019ULL }, // Inst #8717 = VCVTUSI2SSZrm_Int |
| 38440 | { 8716, 7, 1, 0, 112, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60bde8003019ULL }, // Inst #8716 = VCVTUSI2SSZrm |
| 38441 | { 8715, 4, 1, 0, 114, 1, 0, 3427, X86ImpOpBase + 78, 0, 0x170bde8013029ULL }, // Inst #8715 = VCVTUSI2SHZrrb_Int |
| 38442 | { 8714, 3, 1, 0, 114, 1, 0, 3415, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60bde8013029ULL }, // Inst #8714 = VCVTUSI2SHZrr_Int |
| 38443 | { 8713, 3, 1, 0, 114, 1, 0, 3424, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60bde8013029ULL }, // Inst #8713 = VCVTUSI2SHZrr |
| 38444 | { 8712, 7, 1, 0, 2151, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60bde8013019ULL }, // Inst #8712 = VCVTUSI2SHZrm_Int |
| 38445 | { 8711, 7, 1, 0, 2151, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60bde8013019ULL }, // Inst #8711 = VCVTUSI2SHZrm |
| 38446 | { 8710, 3, 1, 0, 1275, 0, 0, 3415, X86ImpOpBase + 0, 0, 0x60bdf0003829ULL }, // Inst #8710 = VCVTUSI2SDZrr_Int |
| 38447 | { 8709, 3, 1, 0, 1275, 0, 0, 3412, X86ImpOpBase + 0, 0, 0x60bdf0003829ULL }, // Inst #8709 = VCVTUSI2SDZrr |
| 38448 | { 8708, 7, 1, 0, 108, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x60bdf0003819ULL }, // Inst #8708 = VCVTUSI2SDZrm_Int |
| 38449 | { 8707, 7, 1, 0, 108, 0, 0, 1967, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x60bdf0003819ULL }, // Inst #8707 = VCVTUSI2SDZrm |
| 38450 | { 8706, 3, 1, 0, 1986, 1, 0, 3166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60023829ULL }, // Inst #8706 = VCVTUQQ2PSZrrkz |
| 38451 | { 8705, 4, 1, 0, 1986, 1, 0, 3162, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60023829ULL }, // Inst #8705 = VCVTUQQ2PSZrrk |
| 38452 | { 8704, 4, 1, 0, 1986, 1, 0, 3158, X86ImpOpBase + 78, 0, 0x19e3d60023829ULL }, // Inst #8704 = VCVTUQQ2PSZrrbkz |
| 38453 | { 8703, 5, 1, 0, 1986, 1, 0, 3153, X86ImpOpBase + 78, 0, 0x19a3d60023829ULL }, // Inst #8703 = VCVTUQQ2PSZrrbk |
| 38454 | { 8702, 3, 1, 0, 1986, 1, 0, 3097, X86ImpOpBase + 78, 0, 0x1983d60023829ULL }, // Inst #8702 = VCVTUQQ2PSZrrb |
| 38455 | { 8701, 2, 1, 0, 1298, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60023829ULL }, // Inst #8701 = VCVTUQQ2PSZrr |
| 38456 | { 8700, 7, 1, 0, 1394, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60023819ULL }, // Inst #8700 = VCVTUQQ2PSZrmkz |
| 38457 | { 8699, 8, 1, 0, 1394, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60023819ULL }, // Inst #8699 = VCVTUQQ2PSZrmk |
| 38458 | { 8698, 7, 1, 0, 1394, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3d60023819ULL }, // Inst #8698 = VCVTUQQ2PSZrmbkz |
| 38459 | { 8697, 8, 1, 0, 1394, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3d60023819ULL }, // Inst #8697 = VCVTUQQ2PSZrmbk |
| 38460 | { 8696, 6, 1, 0, 1394, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983d60023819ULL }, // Inst #8696 = VCVTUQQ2PSZrmb |
| 38461 | { 8695, 6, 1, 0, 1394, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60023819ULL }, // Inst #8695 = VCVTUQQ2PSZrm |
| 38462 | { 8694, 3, 1, 0, 1293, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60023829ULL }, // Inst #8694 = VCVTUQQ2PSZ256rrkz |
| 38463 | { 8693, 4, 1, 0, 1293, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60023829ULL }, // Inst #8693 = VCVTUQQ2PSZ256rrk |
| 38464 | { 8692, 2, 1, 0, 1293, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60023829ULL }, // Inst #8692 = VCVTUQQ2PSZ256rr |
| 38465 | { 8691, 7, 1, 0, 2029, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60023819ULL }, // Inst #8691 = VCVTUQQ2PSZ256rmkz |
| 38466 | { 8690, 8, 1, 0, 2029, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60023819ULL }, // Inst #8690 = VCVTUQQ2PSZ256rmk |
| 38467 | { 8689, 7, 1, 0, 2029, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973d60023819ULL }, // Inst #8689 = VCVTUQQ2PSZ256rmbkz |
| 38468 | { 8688, 8, 1, 0, 2029, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933d60023819ULL }, // Inst #8688 = VCVTUQQ2PSZ256rmbk |
| 38469 | { 8687, 6, 1, 0, 2029, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913d60023819ULL }, // Inst #8687 = VCVTUQQ2PSZ256rmb |
| 38470 | { 8686, 6, 1, 0, 2029, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60023819ULL }, // Inst #8686 = VCVTUQQ2PSZ256rm |
| 38471 | { 8685, 3, 1, 0, 1273, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60023829ULL }, // Inst #8685 = VCVTUQQ2PSZ128rrkz |
| 38472 | { 8684, 4, 1, 0, 1273, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60023829ULL }, // Inst #8684 = VCVTUQQ2PSZ128rrk |
| 38473 | { 8683, 2, 1, 0, 1273, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60023829ULL }, // Inst #8683 = VCVTUQQ2PSZ128rr |
| 38474 | { 8682, 7, 1, 0, 1741, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60023819ULL }, // Inst #8682 = VCVTUQQ2PSZ128rmkz |
| 38475 | { 8681, 8, 1, 0, 1741, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60023819ULL }, // Inst #8681 = VCVTUQQ2PSZ128rmk |
| 38476 | { 8680, 7, 1, 0, 1741, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963d60023819ULL }, // Inst #8680 = VCVTUQQ2PSZ128rmbkz |
| 38477 | { 8679, 8, 1, 0, 1741, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923d60023819ULL }, // Inst #8679 = VCVTUQQ2PSZ128rmbk |
| 38478 | { 8678, 6, 1, 0, 1741, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903d60023819ULL }, // Inst #8678 = VCVTUQQ2PSZ128rmb |
| 38479 | { 8677, 6, 1, 0, 1741, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60023819ULL }, // Inst #8677 = VCVTUQQ2PSZ128rm |
| 38480 | { 8676, 3, 1, 0, 2137, 1, 0, 3187, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60033829ULL }, // Inst #8676 = VCVTUQQ2PHZrrkz |
| 38481 | { 8675, 4, 1, 0, 2137, 1, 0, 3183, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60033829ULL }, // Inst #8675 = VCVTUQQ2PHZrrk |
| 38482 | { 8674, 4, 1, 0, 2137, 1, 0, 3179, X86ImpOpBase + 78, 0, 0x19e3d60033829ULL }, // Inst #8674 = VCVTUQQ2PHZrrbkz |
| 38483 | { 8673, 5, 1, 0, 2137, 1, 0, 3174, X86ImpOpBase + 78, 0, 0x19a3d60033829ULL }, // Inst #8673 = VCVTUQQ2PHZrrbk |
| 38484 | { 8672, 3, 1, 0, 2136, 1, 0, 3171, X86ImpOpBase + 78, 0, 0x1983d60033829ULL }, // Inst #8672 = VCVTUQQ2PHZrrb |
| 38485 | { 8671, 2, 1, 0, 2136, 1, 0, 3169, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60033829ULL }, // Inst #8671 = VCVTUQQ2PHZrr |
| 38486 | { 8670, 7, 1, 0, 2135, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60033819ULL }, // Inst #8670 = VCVTUQQ2PHZrmkz |
| 38487 | { 8669, 8, 1, 0, 2135, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60033819ULL }, // Inst #8669 = VCVTUQQ2PHZrmk |
| 38488 | { 8668, 7, 1, 0, 2135, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3d60033819ULL }, // Inst #8668 = VCVTUQQ2PHZrmbkz |
| 38489 | { 8667, 8, 1, 0, 2135, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3d60033819ULL }, // Inst #8667 = VCVTUQQ2PHZrmbk |
| 38490 | { 8666, 6, 1, 0, 2134, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983d60033819ULL }, // Inst #8666 = VCVTUQQ2PHZrmb |
| 38491 | { 8665, 6, 1, 0, 2134, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60033819ULL }, // Inst #8665 = VCVTUQQ2PHZrm |
| 38492 | { 8664, 3, 1, 0, 2133, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60033829ULL }, // Inst #8664 = VCVTUQQ2PHZ256rrkz |
| 38493 | { 8663, 4, 1, 0, 2133, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60033829ULL }, // Inst #8663 = VCVTUQQ2PHZ256rrk |
| 38494 | { 8662, 2, 1, 0, 2130, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60033829ULL }, // Inst #8662 = VCVTUQQ2PHZ256rr |
| 38495 | { 8661, 7, 1, 0, 2132, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60033819ULL }, // Inst #8661 = VCVTUQQ2PHZ256rmkz |
| 38496 | { 8660, 8, 1, 0, 2132, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60033819ULL }, // Inst #8660 = VCVTUQQ2PHZ256rmk |
| 38497 | { 8659, 7, 1, 0, 2132, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973d60033819ULL }, // Inst #8659 = VCVTUQQ2PHZ256rmbkz |
| 38498 | { 8658, 8, 1, 0, 2132, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933d60033819ULL }, // Inst #8658 = VCVTUQQ2PHZ256rmbk |
| 38499 | { 8657, 6, 1, 0, 2131, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913d60033819ULL }, // Inst #8657 = VCVTUQQ2PHZ256rmb |
| 38500 | { 8656, 6, 1, 0, 2131, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60033819ULL }, // Inst #8656 = VCVTUQQ2PHZ256rm |
| 38501 | { 8655, 3, 1, 0, 2129, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60033829ULL }, // Inst #8655 = VCVTUQQ2PHZ128rrkz |
| 38502 | { 8654, 4, 1, 0, 2129, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60033829ULL }, // Inst #8654 = VCVTUQQ2PHZ128rrk |
| 38503 | { 8653, 2, 1, 0, 2128, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60033829ULL }, // Inst #8653 = VCVTUQQ2PHZ128rr |
| 38504 | { 8652, 7, 1, 0, 2127, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60033819ULL }, // Inst #8652 = VCVTUQQ2PHZ128rmkz |
| 38505 | { 8651, 8, 1, 0, 2127, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60033819ULL }, // Inst #8651 = VCVTUQQ2PHZ128rmk |
| 38506 | { 8650, 7, 1, 0, 2127, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963d60033819ULL }, // Inst #8650 = VCVTUQQ2PHZ128rmbkz |
| 38507 | { 8649, 8, 1, 0, 2127, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923d60033819ULL }, // Inst #8649 = VCVTUQQ2PHZ128rmbk |
| 38508 | { 8648, 6, 1, 0, 2126, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903d60033819ULL }, // Inst #8648 = VCVTUQQ2PHZ128rmb |
| 38509 | { 8647, 6, 1, 0, 2126, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60033819ULL }, // Inst #8647 = VCVTUQQ2PHZ128rm |
| 38510 | { 8646, 3, 1, 0, 388, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60023029ULL }, // Inst #8646 = VCVTUQQ2PDZrrkz |
| 38511 | { 8645, 4, 1, 0, 388, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60023029ULL }, // Inst #8645 = VCVTUQQ2PDZrrk |
| 38512 | { 8644, 4, 1, 0, 388, 1, 0, 3195, X86ImpOpBase + 78, 0, 0x19e3d60023029ULL }, // Inst #8644 = VCVTUQQ2PDZrrbkz |
| 38513 | { 8643, 5, 1, 0, 388, 1, 0, 3190, X86ImpOpBase + 78, 0, 0x19a3d60023029ULL }, // Inst #8643 = VCVTUQQ2PDZrrbk |
| 38514 | { 8642, 3, 1, 0, 388, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1983d60023029ULL }, // Inst #8642 = VCVTUQQ2PDZrrb |
| 38515 | { 8641, 2, 1, 0, 388, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60023029ULL }, // Inst #8641 = VCVTUQQ2PDZrr |
| 38516 | { 8640, 7, 1, 0, 1368, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60023019ULL }, // Inst #8640 = VCVTUQQ2PDZrmkz |
| 38517 | { 8639, 8, 1, 0, 1368, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60023019ULL }, // Inst #8639 = VCVTUQQ2PDZrmk |
| 38518 | { 8638, 7, 1, 0, 1368, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3d60023019ULL }, // Inst #8638 = VCVTUQQ2PDZrmbkz |
| 38519 | { 8637, 8, 1, 0, 1368, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3d60023019ULL }, // Inst #8637 = VCVTUQQ2PDZrmbk |
| 38520 | { 8636, 6, 1, 0, 1368, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983d60023019ULL }, // Inst #8636 = VCVTUQQ2PDZrmb |
| 38521 | { 8635, 6, 1, 0, 1368, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60023019ULL }, // Inst #8635 = VCVTUQQ2PDZrm |
| 38522 | { 8634, 3, 1, 0, 2064, 1, 0, 2786, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60023029ULL }, // Inst #8634 = VCVTUQQ2PDZ256rrkz |
| 38523 | { 8633, 4, 1, 0, 2064, 1, 0, 2782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60023029ULL }, // Inst #8633 = VCVTUQQ2PDZ256rrk |
| 38524 | { 8632, 2, 1, 0, 2064, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60023029ULL }, // Inst #8632 = VCVTUQQ2PDZ256rr |
| 38525 | { 8631, 7, 1, 0, 1367, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60023019ULL }, // Inst #8631 = VCVTUQQ2PDZ256rmkz |
| 38526 | { 8630, 8, 1, 0, 1367, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60023019ULL }, // Inst #8630 = VCVTUQQ2PDZ256rmk |
| 38527 | { 8629, 7, 1, 0, 1367, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973d60023019ULL }, // Inst #8629 = VCVTUQQ2PDZ256rmbkz |
| 38528 | { 8628, 8, 1, 0, 1367, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933d60023019ULL }, // Inst #8628 = VCVTUQQ2PDZ256rmbk |
| 38529 | { 8627, 6, 1, 0, 1367, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913d60023019ULL }, // Inst #8627 = VCVTUQQ2PDZ256rmb |
| 38530 | { 8626, 6, 1, 0, 1367, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60023019ULL }, // Inst #8626 = VCVTUQQ2PDZ256rm |
| 38531 | { 8625, 3, 1, 0, 2063, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60023029ULL }, // Inst #8625 = VCVTUQQ2PDZ128rrkz |
| 38532 | { 8624, 4, 1, 0, 2063, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60023029ULL }, // Inst #8624 = VCVTUQQ2PDZ128rrk |
| 38533 | { 8623, 2, 1, 0, 2063, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60023029ULL }, // Inst #8623 = VCVTUQQ2PDZ128rr |
| 38534 | { 8622, 7, 1, 0, 1357, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60023019ULL }, // Inst #8622 = VCVTUQQ2PDZ128rmkz |
| 38535 | { 8621, 8, 1, 0, 1357, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60023019ULL }, // Inst #8621 = VCVTUQQ2PDZ128rmk |
| 38536 | { 8620, 7, 1, 0, 1357, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963d60023019ULL }, // Inst #8620 = VCVTUQQ2PDZ128rmbkz |
| 38537 | { 8619, 8, 1, 0, 1357, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923d60023019ULL }, // Inst #8619 = VCVTUQQ2PDZ128rmbk |
| 38538 | { 8618, 6, 1, 0, 1357, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903d60023019ULL }, // Inst #8618 = VCVTUQQ2PDZ128rmb |
| 38539 | { 8617, 6, 1, 0, 1357, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60023019ULL }, // Inst #8617 = VCVTUQQ2PDZ128rm |
| 38540 | { 8616, 3, 1, 0, 392, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60003829ULL }, // Inst #8616 = VCVTUDQ2PSZrrkz |
| 38541 | { 8615, 4, 1, 0, 392, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60003829ULL }, // Inst #8615 = VCVTUDQ2PSZrrk |
| 38542 | { 8614, 4, 1, 0, 392, 1, 0, 3126, X86ImpOpBase + 78, 0, 0x17e3d60003829ULL }, // Inst #8614 = VCVTUDQ2PSZrrbkz |
| 38543 | { 8613, 5, 1, 0, 392, 1, 0, 3121, X86ImpOpBase + 78, 0, 0x17a3d60003829ULL }, // Inst #8613 = VCVTUDQ2PSZrrbk |
| 38544 | { 8612, 3, 1, 0, 392, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1783d60003829ULL }, // Inst #8612 = VCVTUDQ2PSZrrb |
| 38545 | { 8611, 2, 1, 0, 392, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60003829ULL }, // Inst #8611 = VCVTUDQ2PSZrr |
| 38546 | { 8610, 7, 1, 0, 1370, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60003819ULL }, // Inst #8610 = VCVTUDQ2PSZrmkz |
| 38547 | { 8609, 8, 1, 0, 1370, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60003819ULL }, // Inst #8609 = VCVTUDQ2PSZrmk |
| 38548 | { 8608, 7, 1, 0, 1370, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3d60003819ULL }, // Inst #8608 = VCVTUDQ2PSZrmbkz |
| 38549 | { 8607, 8, 1, 0, 1370, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3d60003819ULL }, // Inst #8607 = VCVTUDQ2PSZrmbk |
| 38550 | { 8606, 6, 1, 0, 1370, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783d60003819ULL }, // Inst #8606 = VCVTUDQ2PSZrmb |
| 38551 | { 8605, 6, 1, 0, 1370, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60003819ULL }, // Inst #8605 = VCVTUDQ2PSZrm |
| 38552 | { 8604, 3, 1, 0, 390, 1, 0, 2829, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60003829ULL }, // Inst #8604 = VCVTUDQ2PSZ256rrkz |
| 38553 | { 8603, 4, 1, 0, 390, 1, 0, 2825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60003829ULL }, // Inst #8603 = VCVTUDQ2PSZ256rrk |
| 38554 | { 8602, 2, 1, 0, 390, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60003829ULL }, // Inst #8602 = VCVTUDQ2PSZ256rr |
| 38555 | { 8601, 7, 1, 0, 1369, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60003819ULL }, // Inst #8601 = VCVTUDQ2PSZ256rmkz |
| 38556 | { 8600, 8, 1, 0, 1369, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60003819ULL }, // Inst #8600 = VCVTUDQ2PSZ256rmk |
| 38557 | { 8599, 7, 1, 0, 1369, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773d60003819ULL }, // Inst #8599 = VCVTUDQ2PSZ256rmbkz |
| 38558 | { 8598, 8, 1, 0, 1369, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733d60003819ULL }, // Inst #8598 = VCVTUDQ2PSZ256rmbk |
| 38559 | { 8597, 6, 1, 0, 1369, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713d60003819ULL }, // Inst #8597 = VCVTUDQ2PSZ256rmb |
| 38560 | { 8596, 6, 1, 0, 1369, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60003819ULL }, // Inst #8596 = VCVTUDQ2PSZ256rm |
| 38561 | { 8595, 3, 1, 0, 93, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60003829ULL }, // Inst #8595 = VCVTUDQ2PSZ128rrkz |
| 38562 | { 8594, 4, 1, 0, 93, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60003829ULL }, // Inst #8594 = VCVTUDQ2PSZ128rrk |
| 38563 | { 8593, 2, 1, 0, 93, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60003829ULL }, // Inst #8593 = VCVTUDQ2PSZ128rr |
| 38564 | { 8592, 7, 1, 0, 1358, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60003819ULL }, // Inst #8592 = VCVTUDQ2PSZ128rmkz |
| 38565 | { 8591, 8, 1, 0, 1358, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60003819ULL }, // Inst #8591 = VCVTUDQ2PSZ128rmk |
| 38566 | { 8590, 7, 1, 0, 1358, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763d60003819ULL }, // Inst #8590 = VCVTUDQ2PSZ128rmbkz |
| 38567 | { 8589, 8, 1, 0, 1358, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723d60003819ULL }, // Inst #8589 = VCVTUDQ2PSZ128rmbk |
| 38568 | { 8588, 6, 1, 0, 1358, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703d60003819ULL }, // Inst #8588 = VCVTUDQ2PSZ128rmb |
| 38569 | { 8587, 6, 1, 0, 1358, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60003819ULL }, // Inst #8587 = VCVTUDQ2PSZ128rm |
| 38570 | { 8586, 3, 1, 0, 2000, 1, 0, 3113, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60013829ULL }, // Inst #8586 = VCVTUDQ2PHZrrkz |
| 38571 | { 8585, 4, 1, 0, 2000, 1, 0, 3109, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60013829ULL }, // Inst #8585 = VCVTUDQ2PHZrrk |
| 38572 | { 8584, 4, 1, 0, 2000, 1, 0, 3105, X86ImpOpBase + 78, 0, 0x17e3d60013829ULL }, // Inst #8584 = VCVTUDQ2PHZrrbkz |
| 38573 | { 8583, 5, 1, 0, 2000, 1, 0, 3100, X86ImpOpBase + 78, 0, 0x17a3d60013829ULL }, // Inst #8583 = VCVTUDQ2PHZrrbk |
| 38574 | { 8582, 3, 1, 0, 1999, 1, 0, 3097, X86ImpOpBase + 78, 0, 0x1783d60013829ULL }, // Inst #8582 = VCVTUDQ2PHZrrb |
| 38575 | { 8581, 2, 1, 0, 1999, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60013829ULL }, // Inst #8581 = VCVTUDQ2PHZrr |
| 38576 | { 8580, 7, 1, 0, 1998, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60013819ULL }, // Inst #8580 = VCVTUDQ2PHZrmkz |
| 38577 | { 8579, 8, 1, 0, 1998, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60013819ULL }, // Inst #8579 = VCVTUDQ2PHZrmk |
| 38578 | { 8578, 7, 1, 0, 1998, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3d60013819ULL }, // Inst #8578 = VCVTUDQ2PHZrmbkz |
| 38579 | { 8577, 8, 1, 0, 1998, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3d60013819ULL }, // Inst #8577 = VCVTUDQ2PHZrmbk |
| 38580 | { 8576, 6, 1, 0, 1997, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783d60013819ULL }, // Inst #8576 = VCVTUDQ2PHZrmb |
| 38581 | { 8575, 6, 1, 0, 1997, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60013819ULL }, // Inst #8575 = VCVTUDQ2PHZrm |
| 38582 | { 8574, 3, 1, 0, 1996, 1, 0, 3092, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60013829ULL }, // Inst #8574 = VCVTUDQ2PHZ256rrkz |
| 38583 | { 8573, 4, 1, 0, 1996, 1, 0, 3088, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60013829ULL }, // Inst #8573 = VCVTUDQ2PHZ256rrk |
| 38584 | { 8572, 2, 1, 0, 1995, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60013829ULL }, // Inst #8572 = VCVTUDQ2PHZ256rr |
| 38585 | { 8571, 7, 1, 0, 1994, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60013819ULL }, // Inst #8571 = VCVTUDQ2PHZ256rmkz |
| 38586 | { 8570, 8, 1, 0, 1994, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60013819ULL }, // Inst #8570 = VCVTUDQ2PHZ256rmk |
| 38587 | { 8569, 7, 1, 0, 1994, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773d60013819ULL }, // Inst #8569 = VCVTUDQ2PHZ256rmbkz |
| 38588 | { 8568, 8, 1, 0, 1994, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733d60013819ULL }, // Inst #8568 = VCVTUDQ2PHZ256rmbk |
| 38589 | { 8567, 6, 1, 0, 1992, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713d60013819ULL }, // Inst #8567 = VCVTUDQ2PHZ256rmb |
| 38590 | { 8566, 6, 1, 0, 1992, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60013819ULL }, // Inst #8566 = VCVTUDQ2PHZ256rm |
| 38591 | { 8565, 3, 1, 0, 1991, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60013829ULL }, // Inst #8565 = VCVTUDQ2PHZ128rrkz |
| 38592 | { 8564, 4, 1, 0, 1991, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60013829ULL }, // Inst #8564 = VCVTUDQ2PHZ128rrk |
| 38593 | { 8563, 2, 1, 0, 1990, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60013829ULL }, // Inst #8563 = VCVTUDQ2PHZ128rr |
| 38594 | { 8562, 7, 1, 0, 1989, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60013819ULL }, // Inst #8562 = VCVTUDQ2PHZ128rmkz |
| 38595 | { 8561, 8, 1, 0, 1989, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60013819ULL }, // Inst #8561 = VCVTUDQ2PHZ128rmk |
| 38596 | { 8560, 7, 1, 0, 1989, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763d60013819ULL }, // Inst #8560 = VCVTUDQ2PHZ128rmbkz |
| 38597 | { 8559, 8, 1, 0, 1989, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723d60013819ULL }, // Inst #8559 = VCVTUDQ2PHZ128rmbk |
| 38598 | { 8558, 6, 1, 0, 1987, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703d60013819ULL }, // Inst #8558 = VCVTUDQ2PHZ128rmb |
| 38599 | { 8557, 6, 1, 0, 1987, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60013819ULL }, // Inst #8557 = VCVTUDQ2PHZ128rm |
| 38600 | { 8556, 3, 1, 0, 1984, 0, 0, 3083, X86ImpOpBase + 0, 0, 0xce3d60003029ULL }, // Inst #8556 = VCVTUDQ2PDZrrkz |
| 38601 | { 8555, 4, 1, 0, 1984, 0, 0, 3079, X86ImpOpBase + 0, 0, 0xca3d60003029ULL }, // Inst #8555 = VCVTUDQ2PDZrrk |
| 38602 | { 8554, 2, 1, 0, 1294, 0, 0, 3077, X86ImpOpBase + 0, 0, 0xc83d60003029ULL }, // Inst #8554 = VCVTUDQ2PDZrr |
| 38603 | { 8553, 7, 1, 0, 1368, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce3d60003019ULL }, // Inst #8553 = VCVTUDQ2PDZrmkz |
| 38604 | { 8552, 8, 1, 0, 1368, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca3d60003019ULL }, // Inst #8552 = VCVTUDQ2PDZrmk |
| 38605 | { 8551, 7, 1, 0, 1368, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e3d60003019ULL }, // Inst #8551 = VCVTUDQ2PDZrmbkz |
| 38606 | { 8550, 8, 1, 0, 1368, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a3d60003019ULL }, // Inst #8550 = VCVTUDQ2PDZrmbk |
| 38607 | { 8549, 6, 1, 0, 1368, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x783d60003019ULL }, // Inst #8549 = VCVTUDQ2PDZrmb |
| 38608 | { 8548, 6, 1, 0, 1368, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc83d60003019ULL }, // Inst #8548 = VCVTUDQ2PDZrm |
| 38609 | { 8547, 3, 1, 0, 1289, 0, 0, 2413, X86ImpOpBase + 0, 0, 0xa73d60003029ULL }, // Inst #8547 = VCVTUDQ2PDZ256rrkz |
| 38610 | { 8546, 4, 1, 0, 1289, 0, 0, 2409, X86ImpOpBase + 0, 0, 0xa33d60003029ULL }, // Inst #8546 = VCVTUDQ2PDZ256rrk |
| 38611 | { 8545, 2, 1, 0, 1289, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xa13d60003029ULL }, // Inst #8545 = VCVTUDQ2PDZ256rr |
| 38612 | { 8544, 7, 1, 0, 1367, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa73d60003019ULL }, // Inst #8544 = VCVTUDQ2PDZ256rmkz |
| 38613 | { 8543, 8, 1, 0, 1367, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa33d60003019ULL }, // Inst #8543 = VCVTUDQ2PDZ256rmk |
| 38614 | { 8542, 7, 1, 0, 1367, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x773d60003019ULL }, // Inst #8542 = VCVTUDQ2PDZ256rmbkz |
| 38615 | { 8541, 8, 1, 0, 1367, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x733d60003019ULL }, // Inst #8541 = VCVTUDQ2PDZ256rmbk |
| 38616 | { 8540, 6, 1, 0, 1367, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x713d60003019ULL }, // Inst #8540 = VCVTUDQ2PDZ256rmb |
| 38617 | { 8539, 6, 1, 0, 1367, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa13d60003019ULL }, // Inst #8539 = VCVTUDQ2PDZ256rm |
| 38618 | { 8538, 3, 1, 0, 1269, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x863d60003029ULL }, // Inst #8538 = VCVTUDQ2PDZ128rrkz |
| 38619 | { 8537, 4, 1, 0, 1269, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x823d60003029ULL }, // Inst #8537 = VCVTUDQ2PDZ128rrk |
| 38620 | { 8536, 2, 1, 0, 1269, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x803d60003029ULL }, // Inst #8536 = VCVTUDQ2PDZ128rr |
| 38621 | { 8535, 7, 1, 0, 1357, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x863d60003019ULL }, // Inst #8535 = VCVTUDQ2PDZ128rmkz |
| 38622 | { 8534, 8, 1, 0, 1357, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x823d60003019ULL }, // Inst #8534 = VCVTUDQ2PDZ128rmk |
| 38623 | { 8533, 7, 1, 0, 1357, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x763d60003019ULL }, // Inst #8533 = VCVTUDQ2PDZ128rmbkz |
| 38624 | { 8532, 8, 1, 0, 1357, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x723d60003019ULL }, // Inst #8532 = VCVTUDQ2PDZ128rmbk |
| 38625 | { 8531, 6, 1, 0, 1357, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x703d60003019ULL }, // Inst #8531 = VCVTUDQ2PDZ128rmb |
| 38626 | { 8530, 6, 1, 0, 1357, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x803d60003019ULL }, // Inst #8530 = VCVTUDQ2PDZ128rm |
| 38627 | { 8529, 2, 1, 0, 119, 1, 0, 3395, X86ImpOpBase + 78, 0, 0x703c68003029ULL }, // Inst #8529 = VCVTTSS2USIZrrb_Int |
| 38628 | { 8528, 2, 1, 0, 119, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603c68003029ULL }, // Inst #8528 = VCVTTSS2USIZrr_Int |
| 38629 | { 8527, 2, 1, 0, 119, 1, 0, 3473, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603c68003029ULL }, // Inst #8527 = VCVTTSS2USIZrr |
| 38630 | { 8526, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603c68003019ULL }, // Inst #8526 = VCVTTSS2USIZrm_Int |
| 38631 | { 8525, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603c68003019ULL }, // Inst #8525 = VCVTTSS2USIZrm |
| 38632 | { 8524, 2, 1, 0, 119, 1, 0, 3395, X86ImpOpBase + 78, 0, 0x703668013029ULL }, // Inst #8524 = VCVTTSS2USISrrb_Int |
| 38633 | { 8523, 2, 1, 0, 119, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603668013029ULL }, // Inst #8523 = VCVTTSS2USISrr_Int |
| 38634 | { 8522, 2, 1, 0, 119, 1, 0, 3473, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603668013029ULL }, // Inst #8522 = VCVTTSS2USISrr |
| 38635 | { 8521, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603668013019ULL }, // Inst #8521 = VCVTTSS2USISrm_Int |
| 38636 | { 8520, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603668013019ULL }, // Inst #8520 = VCVTTSS2USISrm |
| 38637 | { 8519, 2, 1, 0, 1746, 1, 0, 3388, X86ImpOpBase + 78, 0, 0x703c68023029ULL }, // Inst #8519 = VCVTTSS2USI64Zrrb_Int |
| 38638 | { 8518, 2, 1, 0, 1746, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603c68023029ULL }, // Inst #8518 = VCVTTSS2USI64Zrr_Int |
| 38639 | { 8517, 2, 1, 0, 1310, 1, 0, 3471, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603c68023029ULL }, // Inst #8517 = VCVTTSS2USI64Zrr |
| 38640 | { 8516, 6, 1, 0, 1388, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603c68023019ULL }, // Inst #8516 = VCVTTSS2USI64Zrm_Int |
| 38641 | { 8515, 6, 1, 0, 1388, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603c68023019ULL }, // Inst #8515 = VCVTTSS2USI64Zrm |
| 38642 | { 8514, 2, 1, 0, 119, 1, 0, 3388, X86ImpOpBase + 78, 0, 0x703668033029ULL }, // Inst #8514 = VCVTTSS2USI64Srrb_Int |
| 38643 | { 8513, 2, 1, 0, 119, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603668033029ULL }, // Inst #8513 = VCVTTSS2USI64Srr_Int |
| 38644 | { 8512, 2, 1, 0, 119, 1, 0, 3471, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603668033029ULL }, // Inst #8512 = VCVTTSS2USI64Srr |
| 38645 | { 8511, 6, 1, 0, 418, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603668033019ULL }, // Inst #8511 = VCVTTSS2USI64Srm_Int |
| 38646 | { 8510, 6, 1, 0, 418, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603668033019ULL }, // Inst #8510 = VCVTTSS2USI64Srm |
| 38647 | { 8509, 2, 1, 0, 978, 1, 0, 1025, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1628003029ULL }, // Inst #8509 = VCVTTSS2SIrr_Int |
| 38648 | { 8508, 2, 1, 0, 977, 1, 0, 1047, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1628003029ULL }, // Inst #8508 = VCVTTSS2SIrr |
| 38649 | { 8507, 6, 1, 0, 979, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1628003019ULL }, // Inst #8507 = VCVTTSS2SIrm_Int |
| 38650 | { 8506, 6, 1, 0, 979, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1628003019ULL }, // Inst #8506 = VCVTTSS2SIrm |
| 38651 | { 8505, 2, 1, 0, 119, 1, 0, 3395, X86ImpOpBase + 78, 0, 0x701668003029ULL }, // Inst #8505 = VCVTTSS2SIZrrb_Int |
| 38652 | { 8504, 2, 1, 0, 119, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x601668003029ULL }, // Inst #8504 = VCVTTSS2SIZrr_Int |
| 38653 | { 8503, 2, 1, 0, 119, 1, 0, 3473, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x601668003029ULL }, // Inst #8503 = VCVTTSS2SIZrr |
| 38654 | { 8502, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601668003019ULL }, // Inst #8502 = VCVTTSS2SIZrm_Int |
| 38655 | { 8501, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601668003019ULL }, // Inst #8501 = VCVTTSS2SIZrm |
| 38656 | { 8500, 2, 1, 0, 119, 1, 0, 3395, X86ImpOpBase + 78, 0, 0x7036e8013029ULL }, // Inst #8500 = VCVTTSS2SISrrb_Int |
| 38657 | { 8499, 2, 1, 0, 119, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6036e8013029ULL }, // Inst #8499 = VCVTTSS2SISrr_Int |
| 38658 | { 8498, 2, 1, 0, 119, 1, 0, 3473, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6036e8013029ULL }, // Inst #8498 = VCVTTSS2SISrr |
| 38659 | { 8497, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6036e8013019ULL }, // Inst #8497 = VCVTTSS2SISrm_Int |
| 38660 | { 8496, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6036e8013019ULL }, // Inst #8496 = VCVTTSS2SISrm |
| 38661 | { 8495, 2, 1, 0, 1218, 1, 0, 1021, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1628023029ULL }, // Inst #8495 = VCVTTSS2SI64rr_Int |
| 38662 | { 8494, 2, 1, 0, 1217, 1, 0, 1045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1628023029ULL }, // Inst #8494 = VCVTTSS2SI64rr |
| 38663 | { 8493, 6, 1, 0, 979, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1628023019ULL }, // Inst #8493 = VCVTTSS2SI64rm_Int |
| 38664 | { 8492, 6, 1, 0, 979, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1628023019ULL }, // Inst #8492 = VCVTTSS2SI64rm |
| 38665 | { 8491, 2, 1, 0, 1746, 1, 0, 3388, X86ImpOpBase + 78, 0, 0x701668023029ULL }, // Inst #8491 = VCVTTSS2SI64Zrrb_Int |
| 38666 | { 8490, 2, 1, 0, 1746, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x601668023029ULL }, // Inst #8490 = VCVTTSS2SI64Zrr_Int |
| 38667 | { 8489, 2, 1, 0, 1746, 1, 0, 3471, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x601668023029ULL }, // Inst #8489 = VCVTTSS2SI64Zrr |
| 38668 | { 8488, 6, 1, 0, 418, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601668023019ULL }, // Inst #8488 = VCVTTSS2SI64Zrm_Int |
| 38669 | { 8487, 6, 1, 0, 418, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601668023019ULL }, // Inst #8487 = VCVTTSS2SI64Zrm |
| 38670 | { 8486, 2, 1, 0, 119, 1, 0, 3388, X86ImpOpBase + 78, 0, 0x7036e8033029ULL }, // Inst #8486 = VCVTTSS2SI64Srrb_Int |
| 38671 | { 8485, 2, 1, 0, 119, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6036e8033029ULL }, // Inst #8485 = VCVTTSS2SI64Srr_Int |
| 38672 | { 8484, 2, 1, 0, 119, 1, 0, 3471, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6036e8033029ULL }, // Inst #8484 = VCVTTSS2SI64Srr |
| 38673 | { 8483, 6, 1, 0, 418, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6036e8033019ULL }, // Inst #8483 = VCVTTSS2SI64Srm_Int |
| 38674 | { 8482, 6, 1, 0, 418, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6036e8033019ULL }, // Inst #8482 = VCVTTSS2SI64Srm |
| 38675 | { 8481, 2, 1, 0, 2149, 1, 0, 3395, X86ImpOpBase + 78, 0, 0x503c68013029ULL }, // Inst #8481 = VCVTTSH2USIZrrb_Int |
| 38676 | { 8480, 2, 1, 0, 2149, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x403c68013029ULL }, // Inst #8480 = VCVTTSH2USIZrr_Int |
| 38677 | { 8479, 2, 1, 0, 2149, 1, 0, 3477, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x403c68013029ULL }, // Inst #8479 = VCVTTSH2USIZrr |
| 38678 | { 8478, 6, 1, 0, 2148, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403c68013019ULL }, // Inst #8478 = VCVTTSH2USIZrm_Int |
| 38679 | { 8477, 6, 1, 0, 2148, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403c68013019ULL }, // Inst #8477 = VCVTTSH2USIZrm |
| 38680 | { 8476, 2, 1, 0, 2149, 1, 0, 3388, X86ImpOpBase + 78, 0, 0x503c68033029ULL }, // Inst #8476 = VCVTTSH2USI64Zrrb_Int |
| 38681 | { 8475, 2, 1, 0, 2149, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x403c68033029ULL }, // Inst #8475 = VCVTTSH2USI64Zrr_Int |
| 38682 | { 8474, 2, 1, 0, 2149, 1, 0, 3475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x403c68033029ULL }, // Inst #8474 = VCVTTSH2USI64Zrr |
| 38683 | { 8473, 6, 1, 0, 2148, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403c68033019ULL }, // Inst #8473 = VCVTTSH2USI64Zrm_Int |
| 38684 | { 8472, 6, 1, 0, 2148, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403c68033019ULL }, // Inst #8472 = VCVTTSH2USI64Zrm |
| 38685 | { 8471, 2, 1, 0, 2149, 1, 0, 3395, X86ImpOpBase + 78, 0, 0x501668013029ULL }, // Inst #8471 = VCVTTSH2SIZrrb_Int |
| 38686 | { 8470, 2, 1, 0, 2149, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x401668013029ULL }, // Inst #8470 = VCVTTSH2SIZrr_Int |
| 38687 | { 8469, 2, 1, 0, 2149, 1, 0, 3477, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x401668013029ULL }, // Inst #8469 = VCVTTSH2SIZrr |
| 38688 | { 8468, 6, 1, 0, 2148, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401668013019ULL }, // Inst #8468 = VCVTTSH2SIZrm_Int |
| 38689 | { 8467, 6, 1, 0, 2148, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401668013019ULL }, // Inst #8467 = VCVTTSH2SIZrm |
| 38690 | { 8466, 2, 1, 0, 2149, 1, 0, 3388, X86ImpOpBase + 78, 0, 0x501668033029ULL }, // Inst #8466 = VCVTTSH2SI64Zrrb_Int |
| 38691 | { 8465, 2, 1, 0, 2149, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x401668033029ULL }, // Inst #8465 = VCVTTSH2SI64Zrr_Int |
| 38692 | { 8464, 2, 1, 0, 2149, 1, 0, 3475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x401668033029ULL }, // Inst #8464 = VCVTTSH2SI64Zrr |
| 38693 | { 8463, 6, 1, 0, 2148, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401668033019ULL }, // Inst #8463 = VCVTTSH2SI64Zrm_Int |
| 38694 | { 8462, 6, 1, 0, 2148, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401668033019ULL }, // Inst #8462 = VCVTTSH2SI64Zrm |
| 38695 | { 8461, 2, 1, 0, 104, 1, 0, 3395, X86ImpOpBase + 78, 0, 0x903c70003829ULL }, // Inst #8461 = VCVTTSD2USIZrrb_Int |
| 38696 | { 8460, 2, 1, 0, 104, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c70003829ULL }, // Inst #8460 = VCVTTSD2USIZrr_Int |
| 38697 | { 8459, 2, 1, 0, 104, 1, 0, 3393, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c70003829ULL }, // Inst #8459 = VCVTTSD2USIZrr |
| 38698 | { 8458, 6, 1, 0, 1744, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c70003819ULL }, // Inst #8458 = VCVTTSD2USIZrm_Int |
| 38699 | { 8457, 6, 1, 0, 1387, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c70003819ULL }, // Inst #8457 = VCVTTSD2USIZrm |
| 38700 | { 8456, 2, 1, 0, 104, 1, 0, 3395, X86ImpOpBase + 78, 0, 0x903670013829ULL }, // Inst #8456 = VCVTTSD2USISrrb_Int |
| 38701 | { 8455, 2, 1, 0, 104, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803670013829ULL }, // Inst #8455 = VCVTTSD2USISrr_Int |
| 38702 | { 8454, 2, 1, 0, 104, 1, 0, 3393, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803670013829ULL }, // Inst #8454 = VCVTTSD2USISrr |
| 38703 | { 8453, 6, 1, 0, 417, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803670013819ULL }, // Inst #8453 = VCVTTSD2USISrm_Int |
| 38704 | { 8452, 6, 1, 0, 417, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803670013819ULL }, // Inst #8452 = VCVTTSD2USISrm |
| 38705 | { 8451, 2, 1, 0, 104, 1, 0, 3388, X86ImpOpBase + 78, 0, 0x903c70023829ULL }, // Inst #8451 = VCVTTSD2USI64Zrrb_Int |
| 38706 | { 8450, 2, 1, 0, 104, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c70023829ULL }, // Inst #8450 = VCVTTSD2USI64Zrr_Int |
| 38707 | { 8449, 2, 1, 0, 104, 1, 0, 3386, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c70023829ULL }, // Inst #8449 = VCVTTSD2USI64Zrr |
| 38708 | { 8448, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c70023819ULL }, // Inst #8448 = VCVTTSD2USI64Zrm_Int |
| 38709 | { 8447, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c70023819ULL }, // Inst #8447 = VCVTTSD2USI64Zrm |
| 38710 | { 8446, 2, 1, 0, 104, 1, 0, 3388, X86ImpOpBase + 78, 0, 0x903670033829ULL }, // Inst #8446 = VCVTTSD2USI64Srrb_Int |
| 38711 | { 8445, 2, 1, 0, 104, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803670033829ULL }, // Inst #8445 = VCVTTSD2USI64Srr_Int |
| 38712 | { 8444, 2, 1, 0, 104, 1, 0, 3386, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803670033829ULL }, // Inst #8444 = VCVTTSD2USI64Srr |
| 38713 | { 8443, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803670033819ULL }, // Inst #8443 = VCVTTSD2USI64Srm_Int |
| 38714 | { 8442, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803670033819ULL }, // Inst #8442 = VCVTTSD2USI64Srm |
| 38715 | { 8441, 2, 1, 0, 984, 1, 0, 1025, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1630003829ULL }, // Inst #8441 = VCVTTSD2SIrr_Int |
| 38716 | { 8440, 2, 1, 0, 982, 1, 0, 1023, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1630003829ULL }, // Inst #8440 = VCVTTSD2SIrr |
| 38717 | { 8439, 6, 1, 0, 1490, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1630003819ULL }, // Inst #8439 = VCVTTSD2SIrm_Int |
| 38718 | { 8438, 6, 1, 0, 1489, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1630003819ULL }, // Inst #8438 = VCVTTSD2SIrm |
| 38719 | { 8437, 2, 1, 0, 104, 1, 0, 3395, X86ImpOpBase + 78, 0, 0x901670003829ULL }, // Inst #8437 = VCVTTSD2SIZrrb_Int |
| 38720 | { 8436, 2, 1, 0, 104, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x801670003829ULL }, // Inst #8436 = VCVTTSD2SIZrr_Int |
| 38721 | { 8435, 2, 1, 0, 104, 1, 0, 3393, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x801670003829ULL }, // Inst #8435 = VCVTTSD2SIZrr |
| 38722 | { 8434, 6, 1, 0, 1743, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801670003819ULL }, // Inst #8434 = VCVTTSD2SIZrm_Int |
| 38723 | { 8433, 6, 1, 0, 1743, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801670003819ULL }, // Inst #8433 = VCVTTSD2SIZrm |
| 38724 | { 8432, 2, 1, 0, 104, 1, 0, 3395, X86ImpOpBase + 78, 0, 0x9036f0013829ULL }, // Inst #8432 = VCVTTSD2SISrrb_Int |
| 38725 | { 8431, 2, 1, 0, 104, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8036f0013829ULL }, // Inst #8431 = VCVTTSD2SISrr_Int |
| 38726 | { 8430, 2, 1, 0, 104, 1, 0, 3393, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8036f0013829ULL }, // Inst #8430 = VCVTTSD2SISrr |
| 38727 | { 8429, 6, 1, 0, 417, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8036f0013819ULL }, // Inst #8429 = VCVTTSD2SISrm_Int |
| 38728 | { 8428, 6, 1, 0, 417, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8036f0013819ULL }, // Inst #8428 = VCVTTSD2SISrm |
| 38729 | { 8427, 2, 1, 0, 984, 1, 0, 1021, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1630023829ULL }, // Inst #8427 = VCVTTSD2SI64rr_Int |
| 38730 | { 8426, 2, 1, 0, 982, 1, 0, 1019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1630023829ULL }, // Inst #8426 = VCVTTSD2SI64rr |
| 38731 | { 8425, 6, 1, 0, 986, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1630023819ULL }, // Inst #8425 = VCVTTSD2SI64rm_Int |
| 38732 | { 8424, 6, 1, 0, 985, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1630023819ULL }, // Inst #8424 = VCVTTSD2SI64rm |
| 38733 | { 8423, 2, 1, 0, 104, 1, 0, 3388, X86ImpOpBase + 78, 0, 0x901670023829ULL }, // Inst #8423 = VCVTTSD2SI64Zrrb_Int |
| 38734 | { 8422, 2, 1, 0, 104, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x801670023829ULL }, // Inst #8422 = VCVTTSD2SI64Zrr_Int |
| 38735 | { 8421, 2, 1, 0, 104, 1, 0, 3386, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x801670023829ULL }, // Inst #8421 = VCVTTSD2SI64Zrr |
| 38736 | { 8420, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801670023819ULL }, // Inst #8420 = VCVTTSD2SI64Zrm_Int |
| 38737 | { 8419, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801670023819ULL }, // Inst #8419 = VCVTTSD2SI64Zrm |
| 38738 | { 8418, 2, 1, 0, 104, 1, 0, 3388, X86ImpOpBase + 78, 0, 0x9036f0033829ULL }, // Inst #8418 = VCVTTSD2SI64Srrb_Int |
| 38739 | { 8417, 2, 1, 0, 104, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8036f0033829ULL }, // Inst #8417 = VCVTTSD2SI64Srr_Int |
| 38740 | { 8416, 2, 1, 0, 104, 1, 0, 3386, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8036f0033829ULL }, // Inst #8416 = VCVTTSD2SI64Srr |
| 38741 | { 8415, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8036f0033819ULL }, // Inst #8415 = VCVTTSD2SI64Srm_Int |
| 38742 | { 8414, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8036f0033819ULL }, // Inst #8414 = VCVTTSD2SI64Srm |
| 38743 | { 8413, 3, 1, 0, 1985, 1, 0, 3083, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3c60002829ULL }, // Inst #8413 = VCVTTPS2UQQZrrkz |
| 38744 | { 8412, 4, 1, 0, 1985, 1, 0, 3079, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3c60002829ULL }, // Inst #8412 = VCVTTPS2UQQZrrk |
| 38745 | { 8411, 3, 1, 0, 1985, 1, 0, 3083, X86ImpOpBase + 78, 0, 0x7e3c60002829ULL }, // Inst #8411 = VCVTTPS2UQQZrrbkz |
| 38746 | { 8410, 4, 1, 0, 1985, 1, 0, 3079, X86ImpOpBase + 78, 0, 0x7a3c60002829ULL }, // Inst #8410 = VCVTTPS2UQQZrrbk |
| 38747 | { 8409, 2, 1, 0, 1985, 1, 0, 3077, X86ImpOpBase + 78, 0, 0x783c60002829ULL }, // Inst #8409 = VCVTTPS2UQQZrrb |
| 38748 | { 8408, 2, 1, 0, 1297, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83c60002829ULL }, // Inst #8408 = VCVTTPS2UQQZrr |
| 38749 | { 8407, 7, 1, 0, 1389, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3c60002819ULL }, // Inst #8407 = VCVTTPS2UQQZrmkz |
| 38750 | { 8406, 8, 1, 0, 1389, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3c60002819ULL }, // Inst #8406 = VCVTTPS2UQQZrmk |
| 38751 | { 8405, 7, 1, 0, 1389, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3c60002819ULL }, // Inst #8405 = VCVTTPS2UQQZrmbkz |
| 38752 | { 8404, 8, 1, 0, 1389, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3c60002819ULL }, // Inst #8404 = VCVTTPS2UQQZrmbk |
| 38753 | { 8403, 6, 1, 0, 1389, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783c60002819ULL }, // Inst #8403 = VCVTTPS2UQQZrmb |
| 38754 | { 8402, 6, 1, 0, 1389, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83c60002819ULL }, // Inst #8402 = VCVTTPS2UQQZrm |
| 38755 | { 8401, 3, 1, 0, 1292, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73c60002829ULL }, // Inst #8401 = VCVTTPS2UQQZ256rrkz |
| 38756 | { 8400, 4, 1, 0, 1292, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33c60002829ULL }, // Inst #8400 = VCVTTPS2UQQZ256rrk |
| 38757 | { 8399, 2, 1, 0, 1292, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13c60002829ULL }, // Inst #8399 = VCVTTPS2UQQZ256rr |
| 38758 | { 8398, 7, 1, 0, 1377, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73c60002819ULL }, // Inst #8398 = VCVTTPS2UQQZ256rmkz |
| 38759 | { 8397, 8, 1, 0, 1377, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33c60002819ULL }, // Inst #8397 = VCVTTPS2UQQZ256rmk |
| 38760 | { 8396, 7, 1, 0, 1377, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773c60002819ULL }, // Inst #8396 = VCVTTPS2UQQZ256rmbkz |
| 38761 | { 8395, 8, 1, 0, 1377, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733c60002819ULL }, // Inst #8395 = VCVTTPS2UQQZ256rmbk |
| 38762 | { 8394, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713c60002819ULL }, // Inst #8394 = VCVTTPS2UQQZ256rmb |
| 38763 | { 8393, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13c60002819ULL }, // Inst #8393 = VCVTTPS2UQQZ256rm |
| 38764 | { 8392, 3, 1, 0, 1272, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x863c60002829ULL }, // Inst #8392 = VCVTTPS2UQQZ128rrkz |
| 38765 | { 8391, 4, 1, 0, 1272, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x823c60002829ULL }, // Inst #8391 = VCVTTPS2UQQZ128rrk |
| 38766 | { 8390, 2, 1, 0, 1272, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c60002829ULL }, // Inst #8390 = VCVTTPS2UQQZ128rr |
| 38767 | { 8389, 7, 1, 0, 1361, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863c60002819ULL }, // Inst #8389 = VCVTTPS2UQQZ128rmkz |
| 38768 | { 8388, 8, 1, 0, 1361, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823c60002819ULL }, // Inst #8388 = VCVTTPS2UQQZ128rmk |
| 38769 | { 8387, 7, 1, 0, 1361, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763c60002819ULL }, // Inst #8387 = VCVTTPS2UQQZ128rmbkz |
| 38770 | { 8386, 8, 1, 0, 1361, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723c60002819ULL }, // Inst #8386 = VCVTTPS2UQQZ128rmbk |
| 38771 | { 8385, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703c60002819ULL }, // Inst #8385 = VCVTTPS2UQQZ128rmb |
| 38772 | { 8384, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c60002819ULL }, // Inst #8384 = VCVTTPS2UQQZ128rm |
| 38773 | { 8383, 3, 1, 0, 404, 1, 0, 3083, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3660012829ULL }, // Inst #8383 = VCVTTPS2UQQSZrrkz |
| 38774 | { 8382, 4, 1, 0, 404, 1, 0, 3079, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3660012829ULL }, // Inst #8382 = VCVTTPS2UQQSZrrk |
| 38775 | { 8381, 3, 1, 0, 404, 1, 0, 3083, X86ImpOpBase + 78, 0, 0x7e3660012829ULL }, // Inst #8381 = VCVTTPS2UQQSZrrbkz |
| 38776 | { 8380, 4, 1, 0, 404, 1, 0, 3079, X86ImpOpBase + 78, 0, 0x7a3660012829ULL }, // Inst #8380 = VCVTTPS2UQQSZrrbk |
| 38777 | { 8379, 2, 1, 0, 404, 1, 0, 3077, X86ImpOpBase + 78, 0, 0x783660012829ULL }, // Inst #8379 = VCVTTPS2UQQSZrrb |
| 38778 | { 8378, 2, 1, 0, 404, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83660012829ULL }, // Inst #8378 = VCVTTPS2UQQSZrr |
| 38779 | { 8377, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3660012819ULL }, // Inst #8377 = VCVTTPS2UQQSZrmkz |
| 38780 | { 8376, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3660012819ULL }, // Inst #8376 = VCVTTPS2UQQSZrmk |
| 38781 | { 8375, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3660012819ULL }, // Inst #8375 = VCVTTPS2UQQSZrmbkz |
| 38782 | { 8374, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3660012819ULL }, // Inst #8374 = VCVTTPS2UQQSZrmbk |
| 38783 | { 8373, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783660012819ULL }, // Inst #8373 = VCVTTPS2UQQSZrmb |
| 38784 | { 8372, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83660012819ULL }, // Inst #8372 = VCVTTPS2UQQSZrm |
| 38785 | { 8371, 3, 1, 0, 402, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73660012829ULL }, // Inst #8371 = VCVTTPS2UQQSZ256rrkz |
| 38786 | { 8370, 4, 1, 0, 402, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33660012829ULL }, // Inst #8370 = VCVTTPS2UQQSZ256rrk |
| 38787 | { 8369, 3, 1, 0, 402, 1, 0, 2413, X86ImpOpBase + 78, 0, 0x40773660012829ULL }, // Inst #8369 = VCVTTPS2UQQSZ256rrbkz |
| 38788 | { 8368, 4, 1, 0, 402, 1, 0, 2409, X86ImpOpBase + 78, 0, 0x40733660012829ULL }, // Inst #8368 = VCVTTPS2UQQSZ256rrbk |
| 38789 | { 8367, 2, 1, 0, 402, 1, 0, 2314, X86ImpOpBase + 78, 0, 0x40713660012829ULL }, // Inst #8367 = VCVTTPS2UQQSZ256rrb |
| 38790 | { 8366, 2, 1, 0, 402, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13660012829ULL }, // Inst #8366 = VCVTTPS2UQQSZ256rr |
| 38791 | { 8365, 7, 1, 0, 401, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73660012819ULL }, // Inst #8365 = VCVTTPS2UQQSZ256rmkz |
| 38792 | { 8364, 8, 1, 0, 401, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33660012819ULL }, // Inst #8364 = VCVTTPS2UQQSZ256rmk |
| 38793 | { 8363, 7, 1, 0, 401, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773660012819ULL }, // Inst #8363 = VCVTTPS2UQQSZ256rmbkz |
| 38794 | { 8362, 8, 1, 0, 401, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733660012819ULL }, // Inst #8362 = VCVTTPS2UQQSZ256rmbk |
| 38795 | { 8361, 6, 1, 0, 401, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713660012819ULL }, // Inst #8361 = VCVTTPS2UQQSZ256rmb |
| 38796 | { 8360, 6, 1, 0, 401, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13660012819ULL }, // Inst #8360 = VCVTTPS2UQQSZ256rm |
| 38797 | { 8359, 3, 1, 0, 99, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x863660012829ULL }, // Inst #8359 = VCVTTPS2UQQSZ128rrkz |
| 38798 | { 8358, 4, 1, 0, 99, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x823660012829ULL }, // Inst #8358 = VCVTTPS2UQQSZ128rrk |
| 38799 | { 8357, 2, 1, 0, 99, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803660012829ULL }, // Inst #8357 = VCVTTPS2UQQSZ128rr |
| 38800 | { 8356, 7, 1, 0, 98, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863660012819ULL }, // Inst #8356 = VCVTTPS2UQQSZ128rmkz |
| 38801 | { 8355, 8, 1, 0, 98, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823660012819ULL }, // Inst #8355 = VCVTTPS2UQQSZ128rmk |
| 38802 | { 8354, 7, 1, 0, 98, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763660012819ULL }, // Inst #8354 = VCVTTPS2UQQSZ128rmbkz |
| 38803 | { 8353, 8, 1, 0, 98, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723660012819ULL }, // Inst #8353 = VCVTTPS2UQQSZ128rmbk |
| 38804 | { 8352, 6, 1, 0, 98, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703660012819ULL }, // Inst #8352 = VCVTTPS2UQQSZ128rmb |
| 38805 | { 8351, 6, 1, 0, 98, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803660012819ULL }, // Inst #8351 = VCVTTPS2UQQSZ128rm |
| 38806 | { 8350, 3, 1, 0, 1861, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3c60002029ULL }, // Inst #8350 = VCVTTPS2UDQZrrkz |
| 38807 | { 8349, 4, 1, 0, 1861, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3c60002029ULL }, // Inst #8349 = VCVTTPS2UDQZrrk |
| 38808 | { 8348, 3, 1, 0, 1861, 1, 0, 2843, X86ImpOpBase + 78, 0, 0x7e3c60002029ULL }, // Inst #8348 = VCVTTPS2UDQZrrbkz |
| 38809 | { 8347, 4, 1, 0, 1861, 1, 0, 2839, X86ImpOpBase + 78, 0, 0x7a3c60002029ULL }, // Inst #8347 = VCVTTPS2UDQZrrbk |
| 38810 | { 8346, 2, 1, 0, 1861, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x783c60002029ULL }, // Inst #8346 = VCVTTPS2UDQZrrb |
| 38811 | { 8345, 2, 1, 0, 1264, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83c60002029ULL }, // Inst #8345 = VCVTTPS2UDQZrr |
| 38812 | { 8344, 7, 1, 0, 1378, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3c60002019ULL }, // Inst #8344 = VCVTTPS2UDQZrmkz |
| 38813 | { 8343, 8, 1, 0, 1378, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3c60002019ULL }, // Inst #8343 = VCVTTPS2UDQZrmk |
| 38814 | { 8342, 7, 1, 0, 1378, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3c60002019ULL }, // Inst #8342 = VCVTTPS2UDQZrmbkz |
| 38815 | { 8341, 8, 1, 0, 1378, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3c60002019ULL }, // Inst #8341 = VCVTTPS2UDQZrmbk |
| 38816 | { 8340, 6, 1, 0, 1378, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783c60002019ULL }, // Inst #8340 = VCVTTPS2UDQZrmb |
| 38817 | { 8339, 6, 1, 0, 1378, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83c60002019ULL }, // Inst #8339 = VCVTTPS2UDQZrm |
| 38818 | { 8338, 3, 1, 0, 1261, 1, 0, 2829, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73c60002029ULL }, // Inst #8338 = VCVTTPS2UDQZ256rrkz |
| 38819 | { 8337, 4, 1, 0, 1261, 1, 0, 2825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33c60002029ULL }, // Inst #8337 = VCVTTPS2UDQZ256rrk |
| 38820 | { 8336, 2, 1, 0, 1261, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13c60002029ULL }, // Inst #8336 = VCVTTPS2UDQZ256rr |
| 38821 | { 8335, 7, 1, 0, 1377, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73c60002019ULL }, // Inst #8335 = VCVTTPS2UDQZ256rmkz |
| 38822 | { 8334, 8, 1, 0, 1377, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33c60002019ULL }, // Inst #8334 = VCVTTPS2UDQZ256rmk |
| 38823 | { 8333, 7, 1, 0, 1377, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773c60002019ULL }, // Inst #8333 = VCVTTPS2UDQZ256rmbkz |
| 38824 | { 8332, 8, 1, 0, 1377, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733c60002019ULL }, // Inst #8332 = VCVTTPS2UDQZ256rmbk |
| 38825 | { 8331, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713c60002019ULL }, // Inst #8331 = VCVTTPS2UDQZ256rmb |
| 38826 | { 8330, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13c60002019ULL }, // Inst #8330 = VCVTTPS2UDQZ256rm |
| 38827 | { 8329, 3, 1, 0, 1262, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63c60002029ULL }, // Inst #8329 = VCVTTPS2UDQZ128rrkz |
| 38828 | { 8328, 4, 1, 0, 1262, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23c60002029ULL }, // Inst #8328 = VCVTTPS2UDQZ128rrk |
| 38829 | { 8327, 2, 1, 0, 1262, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03c60002029ULL }, // Inst #8327 = VCVTTPS2UDQZ128rr |
| 38830 | { 8326, 7, 1, 0, 1361, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63c60002019ULL }, // Inst #8326 = VCVTTPS2UDQZ128rmkz |
| 38831 | { 8325, 8, 1, 0, 1361, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23c60002019ULL }, // Inst #8325 = VCVTTPS2UDQZ128rmk |
| 38832 | { 8324, 7, 1, 0, 1361, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763c60002019ULL }, // Inst #8324 = VCVTTPS2UDQZ128rmbkz |
| 38833 | { 8323, 8, 1, 0, 1361, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723c60002019ULL }, // Inst #8323 = VCVTTPS2UDQZ128rmbk |
| 38834 | { 8322, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703c60002019ULL }, // Inst #8322 = VCVTTPS2UDQZ128rmb |
| 38835 | { 8321, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03c60002019ULL }, // Inst #8321 = VCVTTPS2UDQZ128rm |
| 38836 | { 8320, 3, 1, 0, 404, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3660012029ULL }, // Inst #8320 = VCVTTPS2UDQSZrrkz |
| 38837 | { 8319, 4, 1, 0, 404, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3660012029ULL }, // Inst #8319 = VCVTTPS2UDQSZrrk |
| 38838 | { 8318, 3, 1, 0, 404, 1, 0, 2843, X86ImpOpBase + 78, 0, 0x7e3660012029ULL }, // Inst #8318 = VCVTTPS2UDQSZrrbkz |
| 38839 | { 8317, 4, 1, 0, 404, 1, 0, 2839, X86ImpOpBase + 78, 0, 0x7a3660012029ULL }, // Inst #8317 = VCVTTPS2UDQSZrrbk |
| 38840 | { 8316, 2, 1, 0, 404, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x783660012029ULL }, // Inst #8316 = VCVTTPS2UDQSZrrb |
| 38841 | { 8315, 2, 1, 0, 404, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83660012029ULL }, // Inst #8315 = VCVTTPS2UDQSZrr |
| 38842 | { 8314, 7, 1, 0, 403, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3660012019ULL }, // Inst #8314 = VCVTTPS2UDQSZrmkz |
| 38843 | { 8313, 8, 1, 0, 403, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3660012019ULL }, // Inst #8313 = VCVTTPS2UDQSZrmk |
| 38844 | { 8312, 7, 1, 0, 403, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3660012019ULL }, // Inst #8312 = VCVTTPS2UDQSZrmbkz |
| 38845 | { 8311, 8, 1, 0, 403, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3660012019ULL }, // Inst #8311 = VCVTTPS2UDQSZrmbk |
| 38846 | { 8310, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783660012019ULL }, // Inst #8310 = VCVTTPS2UDQSZrmb |
| 38847 | { 8309, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83660012019ULL }, // Inst #8309 = VCVTTPS2UDQSZrm |
| 38848 | { 8308, 3, 1, 0, 402, 1, 0, 2829, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73660012029ULL }, // Inst #8308 = VCVTTPS2UDQSZ256rrkz |
| 38849 | { 8307, 4, 1, 0, 402, 1, 0, 2825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33660012029ULL }, // Inst #8307 = VCVTTPS2UDQSZ256rrk |
| 38850 | { 8306, 2, 1, 0, 402, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13660012029ULL }, // Inst #8306 = VCVTTPS2UDQSZ256rr |
| 38851 | { 8305, 7, 1, 0, 401, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73660012019ULL }, // Inst #8305 = VCVTTPS2UDQSZ256rmkz |
| 38852 | { 8304, 8, 1, 0, 401, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33660012019ULL }, // Inst #8304 = VCVTTPS2UDQSZ256rmk |
| 38853 | { 8303, 7, 1, 0, 401, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773660012019ULL }, // Inst #8303 = VCVTTPS2UDQSZ256rmbkz |
| 38854 | { 8302, 8, 1, 0, 401, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733660012019ULL }, // Inst #8302 = VCVTTPS2UDQSZ256rmbk |
| 38855 | { 8301, 6, 1, 0, 401, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713660012019ULL }, // Inst #8301 = VCVTTPS2UDQSZ256rmb |
| 38856 | { 8300, 6, 1, 0, 401, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13660012019ULL }, // Inst #8300 = VCVTTPS2UDQSZ256rm |
| 38857 | { 8299, 3, 1, 0, 99, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63660012029ULL }, // Inst #8299 = VCVTTPS2UDQSZ128rrkz |
| 38858 | { 8298, 4, 1, 0, 99, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23660012029ULL }, // Inst #8298 = VCVTTPS2UDQSZ128rrk |
| 38859 | { 8297, 2, 1, 0, 99, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03660012029ULL }, // Inst #8297 = VCVTTPS2UDQSZ128rr |
| 38860 | { 8296, 7, 1, 0, 98, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63660012019ULL }, // Inst #8296 = VCVTTPS2UDQSZ128rmkz |
| 38861 | { 8295, 8, 1, 0, 98, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23660012019ULL }, // Inst #8295 = VCVTTPS2UDQSZ128rmk |
| 38862 | { 8294, 7, 1, 0, 98, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763660012019ULL }, // Inst #8294 = VCVTTPS2UDQSZ128rmbkz |
| 38863 | { 8293, 8, 1, 0, 98, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723660012019ULL }, // Inst #8293 = VCVTTPS2UDQSZ128rmbk |
| 38864 | { 8292, 6, 1, 0, 98, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703660012019ULL }, // Inst #8292 = VCVTTPS2UDQSZ128rmb |
| 38865 | { 8291, 6, 1, 0, 98, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03660012019ULL }, // Inst #8291 = VCVTTPS2UDQSZ128rm |
| 38866 | { 8290, 3, 1, 0, 1985, 1, 0, 3083, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3d60002829ULL }, // Inst #8290 = VCVTTPS2QQZrrkz |
| 38867 | { 8289, 4, 1, 0, 1985, 1, 0, 3079, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3d60002829ULL }, // Inst #8289 = VCVTTPS2QQZrrk |
| 38868 | { 8288, 3, 1, 0, 1985, 1, 0, 3083, X86ImpOpBase + 78, 0, 0x7e3d60002829ULL }, // Inst #8288 = VCVTTPS2QQZrrbkz |
| 38869 | { 8287, 4, 1, 0, 1985, 1, 0, 3079, X86ImpOpBase + 78, 0, 0x7a3d60002829ULL }, // Inst #8287 = VCVTTPS2QQZrrbk |
| 38870 | { 8286, 2, 1, 0, 1985, 1, 0, 3077, X86ImpOpBase + 78, 0, 0x783d60002829ULL }, // Inst #8286 = VCVTTPS2QQZrrb |
| 38871 | { 8285, 2, 1, 0, 1297, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83d60002829ULL }, // Inst #8285 = VCVTTPS2QQZrr |
| 38872 | { 8284, 7, 1, 0, 1389, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3d60002819ULL }, // Inst #8284 = VCVTTPS2QQZrmkz |
| 38873 | { 8283, 8, 1, 0, 1389, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3d60002819ULL }, // Inst #8283 = VCVTTPS2QQZrmk |
| 38874 | { 8282, 7, 1, 0, 1389, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3d60002819ULL }, // Inst #8282 = VCVTTPS2QQZrmbkz |
| 38875 | { 8281, 8, 1, 0, 1389, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3d60002819ULL }, // Inst #8281 = VCVTTPS2QQZrmbk |
| 38876 | { 8280, 6, 1, 0, 1389, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783d60002819ULL }, // Inst #8280 = VCVTTPS2QQZrmb |
| 38877 | { 8279, 6, 1, 0, 1389, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83d60002819ULL }, // Inst #8279 = VCVTTPS2QQZrm |
| 38878 | { 8278, 3, 1, 0, 1292, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73d60002829ULL }, // Inst #8278 = VCVTTPS2QQZ256rrkz |
| 38879 | { 8277, 4, 1, 0, 1292, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33d60002829ULL }, // Inst #8277 = VCVTTPS2QQZ256rrk |
| 38880 | { 8276, 2, 1, 0, 1292, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13d60002829ULL }, // Inst #8276 = VCVTTPS2QQZ256rr |
| 38881 | { 8275, 7, 1, 0, 1377, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73d60002819ULL }, // Inst #8275 = VCVTTPS2QQZ256rmkz |
| 38882 | { 8274, 8, 1, 0, 1377, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33d60002819ULL }, // Inst #8274 = VCVTTPS2QQZ256rmk |
| 38883 | { 8273, 7, 1, 0, 1377, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773d60002819ULL }, // Inst #8273 = VCVTTPS2QQZ256rmbkz |
| 38884 | { 8272, 8, 1, 0, 1377, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733d60002819ULL }, // Inst #8272 = VCVTTPS2QQZ256rmbk |
| 38885 | { 8271, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713d60002819ULL }, // Inst #8271 = VCVTTPS2QQZ256rmb |
| 38886 | { 8270, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13d60002819ULL }, // Inst #8270 = VCVTTPS2QQZ256rm |
| 38887 | { 8269, 3, 1, 0, 1272, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x863d60002829ULL }, // Inst #8269 = VCVTTPS2QQZ128rrkz |
| 38888 | { 8268, 4, 1, 0, 1272, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x823d60002829ULL }, // Inst #8268 = VCVTTPS2QQZ128rrk |
| 38889 | { 8267, 2, 1, 0, 1272, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803d60002829ULL }, // Inst #8267 = VCVTTPS2QQZ128rr |
| 38890 | { 8266, 7, 1, 0, 1361, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863d60002819ULL }, // Inst #8266 = VCVTTPS2QQZ128rmkz |
| 38891 | { 8265, 8, 1, 0, 1361, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823d60002819ULL }, // Inst #8265 = VCVTTPS2QQZ128rmk |
| 38892 | { 8264, 7, 1, 0, 1361, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763d60002819ULL }, // Inst #8264 = VCVTTPS2QQZ128rmbkz |
| 38893 | { 8263, 8, 1, 0, 1361, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723d60002819ULL }, // Inst #8263 = VCVTTPS2QQZ128rmbk |
| 38894 | { 8262, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703d60002819ULL }, // Inst #8262 = VCVTTPS2QQZ128rmb |
| 38895 | { 8261, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803d60002819ULL }, // Inst #8261 = VCVTTPS2QQZ128rm |
| 38896 | { 8260, 3, 1, 0, 404, 1, 0, 3083, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce36e0012829ULL }, // Inst #8260 = VCVTTPS2QQSZrrkz |
| 38897 | { 8259, 4, 1, 0, 404, 1, 0, 3079, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca36e0012829ULL }, // Inst #8259 = VCVTTPS2QQSZrrk |
| 38898 | { 8258, 3, 1, 0, 404, 1, 0, 3083, X86ImpOpBase + 78, 0, 0x7e36e0012829ULL }, // Inst #8258 = VCVTTPS2QQSZrrbkz |
| 38899 | { 8257, 4, 1, 0, 404, 1, 0, 3079, X86ImpOpBase + 78, 0, 0x7a36e0012829ULL }, // Inst #8257 = VCVTTPS2QQSZrrbk |
| 38900 | { 8256, 2, 1, 0, 404, 1, 0, 3077, X86ImpOpBase + 78, 0, 0x7836e0012829ULL }, // Inst #8256 = VCVTTPS2QQSZrrb |
| 38901 | { 8255, 2, 1, 0, 404, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc836e0012829ULL }, // Inst #8255 = VCVTTPS2QQSZrr |
| 38902 | { 8254, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce36e0012819ULL }, // Inst #8254 = VCVTTPS2QQSZrmkz |
| 38903 | { 8253, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca36e0012819ULL }, // Inst #8253 = VCVTTPS2QQSZrmk |
| 38904 | { 8252, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e36e0012819ULL }, // Inst #8252 = VCVTTPS2QQSZrmbkz |
| 38905 | { 8251, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a36e0012819ULL }, // Inst #8251 = VCVTTPS2QQSZrmbk |
| 38906 | { 8250, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7836e0012819ULL }, // Inst #8250 = VCVTTPS2QQSZrmb |
| 38907 | { 8249, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc836e0012819ULL }, // Inst #8249 = VCVTTPS2QQSZrm |
| 38908 | { 8248, 3, 1, 0, 402, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa736e0012829ULL }, // Inst #8248 = VCVTTPS2QQSZ256rrkz |
| 38909 | { 8247, 4, 1, 0, 402, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa336e0012829ULL }, // Inst #8247 = VCVTTPS2QQSZ256rrk |
| 38910 | { 8246, 3, 1, 0, 402, 1, 0, 2413, X86ImpOpBase + 78, 0, 0x407736e0012829ULL }, // Inst #8246 = VCVTTPS2QQSZ256rrbkz |
| 38911 | { 8245, 4, 1, 0, 402, 1, 0, 2409, X86ImpOpBase + 78, 0, 0x407336e0012829ULL }, // Inst #8245 = VCVTTPS2QQSZ256rrbk |
| 38912 | { 8244, 2, 1, 0, 402, 1, 0, 2314, X86ImpOpBase + 78, 0, 0x407136e0012829ULL }, // Inst #8244 = VCVTTPS2QQSZ256rrb |
| 38913 | { 8243, 2, 1, 0, 402, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa136e0012829ULL }, // Inst #8243 = VCVTTPS2QQSZ256rr |
| 38914 | { 8242, 7, 1, 0, 401, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa736e0012819ULL }, // Inst #8242 = VCVTTPS2QQSZ256rmkz |
| 38915 | { 8241, 8, 1, 0, 401, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa336e0012819ULL }, // Inst #8241 = VCVTTPS2QQSZ256rmk |
| 38916 | { 8240, 7, 1, 0, 401, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7736e0012819ULL }, // Inst #8240 = VCVTTPS2QQSZ256rmbkz |
| 38917 | { 8239, 8, 1, 0, 401, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7336e0012819ULL }, // Inst #8239 = VCVTTPS2QQSZ256rmbk |
| 38918 | { 8238, 6, 1, 0, 401, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7136e0012819ULL }, // Inst #8238 = VCVTTPS2QQSZ256rmb |
| 38919 | { 8237, 6, 1, 0, 401, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa136e0012819ULL }, // Inst #8237 = VCVTTPS2QQSZ256rm |
| 38920 | { 8236, 3, 1, 0, 99, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8636e0012829ULL }, // Inst #8236 = VCVTTPS2QQSZ128rrkz |
| 38921 | { 8235, 4, 1, 0, 99, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8236e0012829ULL }, // Inst #8235 = VCVTTPS2QQSZ128rrk |
| 38922 | { 8234, 2, 1, 0, 99, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8036e0012829ULL }, // Inst #8234 = VCVTTPS2QQSZ128rr |
| 38923 | { 8233, 7, 1, 0, 98, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8636e0012819ULL }, // Inst #8233 = VCVTTPS2QQSZ128rmkz |
| 38924 | { 8232, 8, 1, 0, 98, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8236e0012819ULL }, // Inst #8232 = VCVTTPS2QQSZ128rmk |
| 38925 | { 8231, 7, 1, 0, 98, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7636e0012819ULL }, // Inst #8231 = VCVTTPS2QQSZ128rmbkz |
| 38926 | { 8230, 8, 1, 0, 98, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7236e0012819ULL }, // Inst #8230 = VCVTTPS2QQSZ128rmbk |
| 38927 | { 8229, 6, 1, 0, 98, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7036e0012819ULL }, // Inst #8229 = VCVTTPS2QQSZ128rmb |
| 38928 | { 8228, 6, 1, 0, 98, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8036e0012819ULL }, // Inst #8228 = VCVTTPS2QQSZ128rm |
| 38929 | { 8227, 3, 1, 0, 384, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee3570052829ULL }, // Inst #8227 = VCVTTPS2IUBSZrrkz |
| 38930 | { 8226, 4, 1, 0, 384, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea3570052829ULL }, // Inst #8226 = VCVTTPS2IUBSZrrk |
| 38931 | { 8225, 3, 1, 0, 384, 1, 0, 2843, X86ImpOpBase + 78, 0, 0x763570052829ULL }, // Inst #8225 = VCVTTPS2IUBSZrrbkz |
| 38932 | { 8224, 4, 1, 0, 384, 1, 0, 2839, X86ImpOpBase + 78, 0, 0x723570052829ULL }, // Inst #8224 = VCVTTPS2IUBSZrrbk |
| 38933 | { 8223, 2, 1, 0, 384, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x703570052829ULL }, // Inst #8223 = VCVTTPS2IUBSZrrb |
| 38934 | { 8222, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe83570052829ULL }, // Inst #8222 = VCVTTPS2IUBSZrr |
| 38935 | { 8221, 7, 1, 0, 383, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3570052819ULL }, // Inst #8221 = VCVTTPS2IUBSZrmkz |
| 38936 | { 8220, 8, 1, 0, 383, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3570052819ULL }, // Inst #8220 = VCVTTPS2IUBSZrmk |
| 38937 | { 8219, 7, 1, 0, 383, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e3570052819ULL }, // Inst #8219 = VCVTTPS2IUBSZrmbkz |
| 38938 | { 8218, 8, 1, 0, 383, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a3570052819ULL }, // Inst #8218 = VCVTTPS2IUBSZrmbk |
| 38939 | { 8217, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x783570052819ULL }, // Inst #8217 = VCVTTPS2IUBSZrmb |
| 38940 | { 8216, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83570052819ULL }, // Inst #8216 = VCVTTPS2IUBSZrm |
| 38941 | { 8215, 3, 1, 0, 382, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc73570052829ULL }, // Inst #8215 = VCVTTPS2IUBSZ256rrkz |
| 38942 | { 8214, 4, 1, 0, 382, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc33570052829ULL }, // Inst #8214 = VCVTTPS2IUBSZ256rrk |
| 38943 | { 8213, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc13570052829ULL }, // Inst #8213 = VCVTTPS2IUBSZ256rr |
| 38944 | { 8212, 7, 1, 0, 381, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73570052819ULL }, // Inst #8212 = VCVTTPS2IUBSZ256rmkz |
| 38945 | { 8211, 8, 1, 0, 381, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33570052819ULL }, // Inst #8211 = VCVTTPS2IUBSZ256rmk |
| 38946 | { 8210, 7, 1, 0, 381, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x773570052819ULL }, // Inst #8210 = VCVTTPS2IUBSZ256rmbkz |
| 38947 | { 8209, 8, 1, 0, 381, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x733570052819ULL }, // Inst #8209 = VCVTTPS2IUBSZ256rmbk |
| 38948 | { 8208, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x713570052819ULL }, // Inst #8208 = VCVTTPS2IUBSZ256rmb |
| 38949 | { 8207, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13570052819ULL }, // Inst #8207 = VCVTTPS2IUBSZ256rm |
| 38950 | { 8206, 3, 1, 0, 149, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa63570052829ULL }, // Inst #8206 = VCVTTPS2IUBSZ128rrkz |
| 38951 | { 8205, 4, 1, 0, 149, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa23570052829ULL }, // Inst #8205 = VCVTTPS2IUBSZ128rrk |
| 38952 | { 8204, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03570052829ULL }, // Inst #8204 = VCVTTPS2IUBSZ128rr |
| 38953 | { 8203, 7, 1, 0, 148, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63570052819ULL }, // Inst #8203 = VCVTTPS2IUBSZ128rmkz |
| 38954 | { 8202, 8, 1, 0, 148, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23570052819ULL }, // Inst #8202 = VCVTTPS2IUBSZ128rmk |
| 38955 | { 8201, 7, 1, 0, 148, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x763570052819ULL }, // Inst #8201 = VCVTTPS2IUBSZ128rmbkz |
| 38956 | { 8200, 8, 1, 0, 148, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x723570052819ULL }, // Inst #8200 = VCVTTPS2IUBSZ128rmbk |
| 38957 | { 8199, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x703570052819ULL }, // Inst #8199 = VCVTTPS2IUBSZ128rmb |
| 38958 | { 8198, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03570052819ULL }, // Inst #8198 = VCVTTPS2IUBSZ128rm |
| 38959 | { 8197, 3, 1, 0, 384, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee3470052829ULL }, // Inst #8197 = VCVTTPS2IBSZrrkz |
| 38960 | { 8196, 4, 1, 0, 384, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea3470052829ULL }, // Inst #8196 = VCVTTPS2IBSZrrk |
| 38961 | { 8195, 3, 1, 0, 384, 1, 0, 2843, X86ImpOpBase + 78, 0, 0x763470052829ULL }, // Inst #8195 = VCVTTPS2IBSZrrbkz |
| 38962 | { 8194, 4, 1, 0, 384, 1, 0, 2839, X86ImpOpBase + 78, 0, 0x723470052829ULL }, // Inst #8194 = VCVTTPS2IBSZrrbk |
| 38963 | { 8193, 2, 1, 0, 384, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x703470052829ULL }, // Inst #8193 = VCVTTPS2IBSZrrb |
| 38964 | { 8192, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe83470052829ULL }, // Inst #8192 = VCVTTPS2IBSZrr |
| 38965 | { 8191, 7, 1, 0, 383, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3470052819ULL }, // Inst #8191 = VCVTTPS2IBSZrmkz |
| 38966 | { 8190, 8, 1, 0, 383, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3470052819ULL }, // Inst #8190 = VCVTTPS2IBSZrmk |
| 38967 | { 8189, 7, 1, 0, 383, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e3470052819ULL }, // Inst #8189 = VCVTTPS2IBSZrmbkz |
| 38968 | { 8188, 8, 1, 0, 383, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a3470052819ULL }, // Inst #8188 = VCVTTPS2IBSZrmbk |
| 38969 | { 8187, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x783470052819ULL }, // Inst #8187 = VCVTTPS2IBSZrmb |
| 38970 | { 8186, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83470052819ULL }, // Inst #8186 = VCVTTPS2IBSZrm |
| 38971 | { 8185, 3, 1, 0, 382, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc73470052829ULL }, // Inst #8185 = VCVTTPS2IBSZ256rrkz |
| 38972 | { 8184, 4, 1, 0, 382, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc33470052829ULL }, // Inst #8184 = VCVTTPS2IBSZ256rrk |
| 38973 | { 8183, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc13470052829ULL }, // Inst #8183 = VCVTTPS2IBSZ256rr |
| 38974 | { 8182, 7, 1, 0, 381, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73470052819ULL }, // Inst #8182 = VCVTTPS2IBSZ256rmkz |
| 38975 | { 8181, 8, 1, 0, 381, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33470052819ULL }, // Inst #8181 = VCVTTPS2IBSZ256rmk |
| 38976 | { 8180, 7, 1, 0, 381, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x773470052819ULL }, // Inst #8180 = VCVTTPS2IBSZ256rmbkz |
| 38977 | { 8179, 8, 1, 0, 381, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x733470052819ULL }, // Inst #8179 = VCVTTPS2IBSZ256rmbk |
| 38978 | { 8178, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x713470052819ULL }, // Inst #8178 = VCVTTPS2IBSZ256rmb |
| 38979 | { 8177, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13470052819ULL }, // Inst #8177 = VCVTTPS2IBSZ256rm |
| 38980 | { 8176, 3, 1, 0, 149, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa63470052829ULL }, // Inst #8176 = VCVTTPS2IBSZ128rrkz |
| 38981 | { 8175, 4, 1, 0, 149, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa23470052829ULL }, // Inst #8175 = VCVTTPS2IBSZ128rrk |
| 38982 | { 8174, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03470052829ULL }, // Inst #8174 = VCVTTPS2IBSZ128rr |
| 38983 | { 8173, 7, 1, 0, 148, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63470052819ULL }, // Inst #8173 = VCVTTPS2IBSZ128rmkz |
| 38984 | { 8172, 8, 1, 0, 148, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23470052819ULL }, // Inst #8172 = VCVTTPS2IBSZ128rmk |
| 38985 | { 8171, 7, 1, 0, 148, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x763470052819ULL }, // Inst #8171 = VCVTTPS2IBSZ128rmbkz |
| 38986 | { 8170, 8, 1, 0, 148, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x723470052819ULL }, // Inst #8170 = VCVTTPS2IBSZ128rmbk |
| 38987 | { 8169, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x703470052819ULL }, // Inst #8169 = VCVTTPS2IBSZ128rmb |
| 38988 | { 8168, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03470052819ULL }, // Inst #8168 = VCVTTPS2IBSZ128rm |
| 38989 | { 8167, 2, 1, 0, 1004, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2da0003029ULL }, // Inst #8167 = VCVTTPS2DQrr |
| 38990 | { 8166, 6, 1, 0, 1684, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2da0003019ULL }, // Inst #8166 = VCVTTPS2DQrm |
| 38991 | { 8165, 3, 1, 0, 1861, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0003029ULL }, // Inst #8165 = VCVTTPS2DQZrrkz |
| 38992 | { 8164, 4, 1, 0, 1861, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0003029ULL }, // Inst #8164 = VCVTTPS2DQZrrk |
| 38993 | { 8163, 3, 1, 0, 1861, 1, 0, 2843, X86ImpOpBase + 78, 0, 0x7e2de0003029ULL }, // Inst #8163 = VCVTTPS2DQZrrbkz |
| 38994 | { 8162, 4, 1, 0, 1861, 1, 0, 2839, X86ImpOpBase + 78, 0, 0x7a2de0003029ULL }, // Inst #8162 = VCVTTPS2DQZrrbk |
| 38995 | { 8161, 2, 1, 0, 1861, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x782de0003029ULL }, // Inst #8161 = VCVTTPS2DQZrrb |
| 38996 | { 8160, 2, 1, 0, 1264, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0003029ULL }, // Inst #8160 = VCVTTPS2DQZrr |
| 38997 | { 8159, 7, 1, 0, 1378, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0003019ULL }, // Inst #8159 = VCVTTPS2DQZrmkz |
| 38998 | { 8158, 8, 1, 0, 1378, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0003019ULL }, // Inst #8158 = VCVTTPS2DQZrmk |
| 38999 | { 8157, 7, 1, 0, 1378, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2de0003019ULL }, // Inst #8157 = VCVTTPS2DQZrmbkz |
| 39000 | { 8156, 8, 1, 0, 1378, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2de0003019ULL }, // Inst #8156 = VCVTTPS2DQZrmbk |
| 39001 | { 8155, 6, 1, 0, 1378, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782de0003019ULL }, // Inst #8155 = VCVTTPS2DQZrmb |
| 39002 | { 8154, 6, 1, 0, 1378, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0003019ULL }, // Inst #8154 = VCVTTPS2DQZrm |
| 39003 | { 8153, 3, 1, 0, 1261, 1, 0, 2829, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0003029ULL }, // Inst #8153 = VCVTTPS2DQZ256rrkz |
| 39004 | { 8152, 4, 1, 0, 1261, 1, 0, 2825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0003029ULL }, // Inst #8152 = VCVTTPS2DQZ256rrk |
| 39005 | { 8151, 2, 1, 0, 1261, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0003029ULL }, // Inst #8151 = VCVTTPS2DQZ256rr |
| 39006 | { 8150, 7, 1, 0, 1377, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0003019ULL }, // Inst #8150 = VCVTTPS2DQZ256rmkz |
| 39007 | { 8149, 8, 1, 0, 1377, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0003019ULL }, // Inst #8149 = VCVTTPS2DQZ256rmk |
| 39008 | { 8148, 7, 1, 0, 1377, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772de0003019ULL }, // Inst #8148 = VCVTTPS2DQZ256rmbkz |
| 39009 | { 8147, 8, 1, 0, 1377, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732de0003019ULL }, // Inst #8147 = VCVTTPS2DQZ256rmbk |
| 39010 | { 8146, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712de0003019ULL }, // Inst #8146 = VCVTTPS2DQZ256rmb |
| 39011 | { 8145, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0003019ULL }, // Inst #8145 = VCVTTPS2DQZ256rm |
| 39012 | { 8144, 3, 1, 0, 1262, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0003029ULL }, // Inst #8144 = VCVTTPS2DQZ128rrkz |
| 39013 | { 8143, 4, 1, 0, 1262, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0003029ULL }, // Inst #8143 = VCVTTPS2DQZ128rrk |
| 39014 | { 8142, 2, 1, 0, 1262, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0003029ULL }, // Inst #8142 = VCVTTPS2DQZ128rr |
| 39015 | { 8141, 7, 1, 0, 1361, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0003019ULL }, // Inst #8141 = VCVTTPS2DQZ128rmkz |
| 39016 | { 8140, 8, 1, 0, 1361, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0003019ULL }, // Inst #8140 = VCVTTPS2DQZ128rmk |
| 39017 | { 8139, 7, 1, 0, 1361, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762de0003019ULL }, // Inst #8139 = VCVTTPS2DQZ128rmbkz |
| 39018 | { 8138, 8, 1, 0, 1361, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722de0003019ULL }, // Inst #8138 = VCVTTPS2DQZ128rmbk |
| 39019 | { 8137, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702de0003019ULL }, // Inst #8137 = VCVTTPS2DQZ128rmb |
| 39020 | { 8136, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0003019ULL }, // Inst #8136 = VCVTTPS2DQZ128rm |
| 39021 | { 8135, 2, 1, 0, 402, 1, 0, 3116, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x12da0003029ULL }, // Inst #8135 = VCVTTPS2DQYrr |
| 39022 | { 8134, 6, 1, 0, 1377, 1, 0, 2253, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x12da0003019ULL }, // Inst #8134 = VCVTTPS2DQYrm |
| 39023 | { 8133, 3, 1, 0, 404, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee36e0012029ULL }, // Inst #8133 = VCVTTPS2DQSZrrkz |
| 39024 | { 8132, 4, 1, 0, 404, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea36e0012029ULL }, // Inst #8132 = VCVTTPS2DQSZrrk |
| 39025 | { 8131, 3, 1, 0, 404, 1, 0, 2843, X86ImpOpBase + 78, 0, 0x7e36e0012029ULL }, // Inst #8131 = VCVTTPS2DQSZrrbkz |
| 39026 | { 8130, 4, 1, 0, 404, 1, 0, 2839, X86ImpOpBase + 78, 0, 0x7a36e0012029ULL }, // Inst #8130 = VCVTTPS2DQSZrrbk |
| 39027 | { 8129, 2, 1, 0, 404, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x7836e0012029ULL }, // Inst #8129 = VCVTTPS2DQSZrrb |
| 39028 | { 8128, 2, 1, 0, 404, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe836e0012029ULL }, // Inst #8128 = VCVTTPS2DQSZrr |
| 39029 | { 8127, 7, 1, 0, 403, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee36e0012019ULL }, // Inst #8127 = VCVTTPS2DQSZrmkz |
| 39030 | { 8126, 8, 1, 0, 403, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea36e0012019ULL }, // Inst #8126 = VCVTTPS2DQSZrmk |
| 39031 | { 8125, 7, 1, 0, 403, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e36e0012019ULL }, // Inst #8125 = VCVTTPS2DQSZrmbkz |
| 39032 | { 8124, 8, 1, 0, 403, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a36e0012019ULL }, // Inst #8124 = VCVTTPS2DQSZrmbk |
| 39033 | { 8123, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7836e0012019ULL }, // Inst #8123 = VCVTTPS2DQSZrmb |
| 39034 | { 8122, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe836e0012019ULL }, // Inst #8122 = VCVTTPS2DQSZrm |
| 39035 | { 8121, 3, 1, 0, 402, 1, 0, 2829, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc736e0012029ULL }, // Inst #8121 = VCVTTPS2DQSZ256rrkz |
| 39036 | { 8120, 4, 1, 0, 402, 1, 0, 2825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc336e0012029ULL }, // Inst #8120 = VCVTTPS2DQSZ256rrk |
| 39037 | { 8119, 2, 1, 0, 402, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc136e0012029ULL }, // Inst #8119 = VCVTTPS2DQSZ256rr |
| 39038 | { 8118, 7, 1, 0, 401, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc736e0012019ULL }, // Inst #8118 = VCVTTPS2DQSZ256rmkz |
| 39039 | { 8117, 8, 1, 0, 401, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc336e0012019ULL }, // Inst #8117 = VCVTTPS2DQSZ256rmk |
| 39040 | { 8116, 7, 1, 0, 401, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7736e0012019ULL }, // Inst #8116 = VCVTTPS2DQSZ256rmbkz |
| 39041 | { 8115, 8, 1, 0, 401, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7336e0012019ULL }, // Inst #8115 = VCVTTPS2DQSZ256rmbk |
| 39042 | { 8114, 6, 1, 0, 401, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7136e0012019ULL }, // Inst #8114 = VCVTTPS2DQSZ256rmb |
| 39043 | { 8113, 6, 1, 0, 401, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc136e0012019ULL }, // Inst #8113 = VCVTTPS2DQSZ256rm |
| 39044 | { 8112, 3, 1, 0, 99, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa636e0012029ULL }, // Inst #8112 = VCVTTPS2DQSZ128rrkz |
| 39045 | { 8111, 4, 1, 0, 99, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa236e0012029ULL }, // Inst #8111 = VCVTTPS2DQSZ128rrk |
| 39046 | { 8110, 2, 1, 0, 99, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa036e0012029ULL }, // Inst #8110 = VCVTTPS2DQSZ128rr |
| 39047 | { 8109, 7, 1, 0, 98, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa636e0012019ULL }, // Inst #8109 = VCVTTPS2DQSZ128rmkz |
| 39048 | { 8108, 8, 1, 0, 98, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa236e0012019ULL }, // Inst #8108 = VCVTTPS2DQSZ128rmk |
| 39049 | { 8107, 7, 1, 0, 98, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7636e0012019ULL }, // Inst #8107 = VCVTTPS2DQSZ128rmbkz |
| 39050 | { 8106, 8, 1, 0, 98, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7236e0012019ULL }, // Inst #8106 = VCVTTPS2DQSZ128rmbk |
| 39051 | { 8105, 6, 1, 0, 98, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7036e0012019ULL }, // Inst #8105 = VCVTTPS2DQSZ128rmb |
| 39052 | { 8104, 6, 1, 0, 98, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa036e0012019ULL }, // Inst #8104 = VCVTTPS2DQSZ128rm |
| 39053 | { 8103, 3, 1, 0, 1927, 1, 0, 2987, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3e60012829ULL }, // Inst #8103 = VCVTTPH2WZrrkz |
| 39054 | { 8102, 4, 1, 0, 1927, 1, 0, 2983, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3e60012829ULL }, // Inst #8102 = VCVTTPH2WZrrk |
| 39055 | { 8101, 3, 1, 0, 1927, 1, 0, 2987, X86ImpOpBase + 78, 0, 0x5e3e60012829ULL }, // Inst #8101 = VCVTTPH2WZrrbkz |
| 39056 | { 8100, 4, 1, 0, 1927, 1, 0, 2983, X86ImpOpBase + 78, 0, 0x5a3e60012829ULL }, // Inst #8100 = VCVTTPH2WZrrbk |
| 39057 | { 8099, 2, 1, 0, 1920, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x583e60012829ULL }, // Inst #8099 = VCVTTPH2WZrrb |
| 39058 | { 8098, 2, 1, 0, 1920, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83e60012829ULL }, // Inst #8098 = VCVTTPH2WZrr |
| 39059 | { 8097, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3e60012819ULL }, // Inst #8097 = VCVTTPH2WZrmkz |
| 39060 | { 8096, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3e60012819ULL }, // Inst #8096 = VCVTTPH2WZrmk |
| 39061 | { 8095, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3e60012819ULL }, // Inst #8095 = VCVTTPH2WZrmbkz |
| 39062 | { 8094, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3e60012819ULL }, // Inst #8094 = VCVTTPH2WZrmbk |
| 39063 | { 8093, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583e60012819ULL }, // Inst #8093 = VCVTTPH2WZrmb |
| 39064 | { 8092, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83e60012819ULL }, // Inst #8092 = VCVTTPH2WZrm |
| 39065 | { 8091, 3, 1, 0, 1906, 1, 0, 2965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73e60012829ULL }, // Inst #8091 = VCVTTPH2WZ256rrkz |
| 39066 | { 8090, 4, 1, 0, 1906, 1, 0, 2961, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33e60012829ULL }, // Inst #8090 = VCVTTPH2WZ256rrk |
| 39067 | { 8089, 2, 1, 0, 1777, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13e60012829ULL }, // Inst #8089 = VCVTTPH2WZ256rr |
| 39068 | { 8088, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73e60012819ULL }, // Inst #8088 = VCVTTPH2WZ256rmkz |
| 39069 | { 8087, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33e60012819ULL }, // Inst #8087 = VCVTTPH2WZ256rmk |
| 39070 | { 8086, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573e60012819ULL }, // Inst #8086 = VCVTTPH2WZ256rmbkz |
| 39071 | { 8085, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533e60012819ULL }, // Inst #8085 = VCVTTPH2WZ256rmbk |
| 39072 | { 8084, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513e60012819ULL }, // Inst #8084 = VCVTTPH2WZ256rmb |
| 39073 | { 8083, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13e60012819ULL }, // Inst #8083 = VCVTTPH2WZ256rm |
| 39074 | { 8082, 3, 1, 0, 1905, 1, 0, 2943, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63e60012829ULL }, // Inst #8082 = VCVTTPH2WZ128rrkz |
| 39075 | { 8081, 4, 1, 0, 1905, 1, 0, 2939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23e60012829ULL }, // Inst #8081 = VCVTTPH2WZ128rrk |
| 39076 | { 8080, 2, 1, 0, 1776, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03e60012829ULL }, // Inst #8080 = VCVTTPH2WZ128rr |
| 39077 | { 8079, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63e60012819ULL }, // Inst #8079 = VCVTTPH2WZ128rmkz |
| 39078 | { 8078, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23e60012819ULL }, // Inst #8078 = VCVTTPH2WZ128rmk |
| 39079 | { 8077, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563e60012819ULL }, // Inst #8077 = VCVTTPH2WZ128rmbkz |
| 39080 | { 8076, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523e60012819ULL }, // Inst #8076 = VCVTTPH2WZ128rmbk |
| 39081 | { 8075, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503e60012819ULL }, // Inst #8075 = VCVTTPH2WZ128rmb |
| 39082 | { 8074, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03e60012819ULL }, // Inst #8074 = VCVTTPH2WZ128rm |
| 39083 | { 8073, 3, 1, 0, 1927, 1, 0, 2987, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3e60012029ULL }, // Inst #8073 = VCVTTPH2UWZrrkz |
| 39084 | { 8072, 4, 1, 0, 1927, 1, 0, 2983, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3e60012029ULL }, // Inst #8072 = VCVTTPH2UWZrrk |
| 39085 | { 8071, 3, 1, 0, 1927, 1, 0, 2987, X86ImpOpBase + 78, 0, 0x5e3e60012029ULL }, // Inst #8071 = VCVTTPH2UWZrrbkz |
| 39086 | { 8070, 4, 1, 0, 1927, 1, 0, 2983, X86ImpOpBase + 78, 0, 0x5a3e60012029ULL }, // Inst #8070 = VCVTTPH2UWZrrbk |
| 39087 | { 8069, 2, 1, 0, 1920, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x583e60012029ULL }, // Inst #8069 = VCVTTPH2UWZrrb |
| 39088 | { 8068, 2, 1, 0, 1920, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83e60012029ULL }, // Inst #8068 = VCVTTPH2UWZrr |
| 39089 | { 8067, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3e60012019ULL }, // Inst #8067 = VCVTTPH2UWZrmkz |
| 39090 | { 8066, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3e60012019ULL }, // Inst #8066 = VCVTTPH2UWZrmk |
| 39091 | { 8065, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3e60012019ULL }, // Inst #8065 = VCVTTPH2UWZrmbkz |
| 39092 | { 8064, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3e60012019ULL }, // Inst #8064 = VCVTTPH2UWZrmbk |
| 39093 | { 8063, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583e60012019ULL }, // Inst #8063 = VCVTTPH2UWZrmb |
| 39094 | { 8062, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83e60012019ULL }, // Inst #8062 = VCVTTPH2UWZrm |
| 39095 | { 8061, 3, 1, 0, 1906, 1, 0, 2965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73e60012029ULL }, // Inst #8061 = VCVTTPH2UWZ256rrkz |
| 39096 | { 8060, 4, 1, 0, 1906, 1, 0, 2961, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33e60012029ULL }, // Inst #8060 = VCVTTPH2UWZ256rrk |
| 39097 | { 8059, 2, 1, 0, 1777, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13e60012029ULL }, // Inst #8059 = VCVTTPH2UWZ256rr |
| 39098 | { 8058, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73e60012019ULL }, // Inst #8058 = VCVTTPH2UWZ256rmkz |
| 39099 | { 8057, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33e60012019ULL }, // Inst #8057 = VCVTTPH2UWZ256rmk |
| 39100 | { 8056, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573e60012019ULL }, // Inst #8056 = VCVTTPH2UWZ256rmbkz |
| 39101 | { 8055, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533e60012019ULL }, // Inst #8055 = VCVTTPH2UWZ256rmbk |
| 39102 | { 8054, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513e60012019ULL }, // Inst #8054 = VCVTTPH2UWZ256rmb |
| 39103 | { 8053, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13e60012019ULL }, // Inst #8053 = VCVTTPH2UWZ256rm |
| 39104 | { 8052, 3, 1, 0, 1905, 1, 0, 2943, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63e60012029ULL }, // Inst #8052 = VCVTTPH2UWZ128rrkz |
| 39105 | { 8051, 4, 1, 0, 1905, 1, 0, 2939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23e60012029ULL }, // Inst #8051 = VCVTTPH2UWZ128rrk |
| 39106 | { 8050, 2, 1, 0, 1776, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03e60012029ULL }, // Inst #8050 = VCVTTPH2UWZ128rr |
| 39107 | { 8049, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63e60012019ULL }, // Inst #8049 = VCVTTPH2UWZ128rmkz |
| 39108 | { 8048, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23e60012019ULL }, // Inst #8048 = VCVTTPH2UWZ128rmk |
| 39109 | { 8047, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563e60012019ULL }, // Inst #8047 = VCVTTPH2UWZ128rmbkz |
| 39110 | { 8046, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523e60012019ULL }, // Inst #8046 = VCVTTPH2UWZ128rmbk |
| 39111 | { 8045, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503e60012019ULL }, // Inst #8045 = VCVTTPH2UWZ128rmb |
| 39112 | { 8044, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03e60012019ULL }, // Inst #8044 = VCVTTPH2UWZ128rm |
| 39113 | { 8043, 3, 1, 0, 404, 1, 0, 2420, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae3c60012829ULL }, // Inst #8043 = VCVTTPH2UQQZrrkz |
| 39114 | { 8042, 4, 1, 0, 404, 1, 0, 2416, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaa3c60012829ULL }, // Inst #8042 = VCVTTPH2UQQZrrk |
| 39115 | { 8041, 3, 1, 0, 404, 1, 0, 2420, X86ImpOpBase + 78, 0, 0x5e3c60012829ULL }, // Inst #8041 = VCVTTPH2UQQZrrbkz |
| 39116 | { 8040, 4, 1, 0, 404, 1, 0, 2416, X86ImpOpBase + 78, 0, 0x5a3c60012829ULL }, // Inst #8040 = VCVTTPH2UQQZrrbk |
| 39117 | { 8039, 2, 1, 0, 404, 1, 0, 2344, X86ImpOpBase + 78, 0, 0x583c60012829ULL }, // Inst #8039 = VCVTTPH2UQQZrrb |
| 39118 | { 8038, 2, 1, 0, 404, 1, 0, 2344, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa83c60012829ULL }, // Inst #8038 = VCVTTPH2UQQZrr |
| 39119 | { 8037, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae3c60012819ULL }, // Inst #8037 = VCVTTPH2UQQZrmkz |
| 39120 | { 8036, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaa3c60012819ULL }, // Inst #8036 = VCVTTPH2UQQZrmk |
| 39121 | { 8035, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3c60012819ULL }, // Inst #8035 = VCVTTPH2UQQZrmbkz |
| 39122 | { 8034, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3c60012819ULL }, // Inst #8034 = VCVTTPH2UQQZrmbk |
| 39123 | { 8033, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583c60012819ULL }, // Inst #8033 = VCVTTPH2UQQZrmb |
| 39124 | { 8032, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa83c60012819ULL }, // Inst #8032 = VCVTTPH2UQQZrm |
| 39125 | { 8031, 3, 1, 0, 2118, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x873c60012829ULL }, // Inst #8031 = VCVTTPH2UQQZ256rrkz |
| 39126 | { 8030, 4, 1, 0, 2118, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x833c60012829ULL }, // Inst #8030 = VCVTTPH2UQQZ256rrk |
| 39127 | { 8029, 2, 1, 0, 2118, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x813c60012829ULL }, // Inst #8029 = VCVTTPH2UQQZ256rr |
| 39128 | { 8028, 7, 1, 0, 2119, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x873c60012819ULL }, // Inst #8028 = VCVTTPH2UQQZ256rmkz |
| 39129 | { 8027, 8, 1, 0, 2119, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x833c60012819ULL }, // Inst #8027 = VCVTTPH2UQQZ256rmk |
| 39130 | { 8026, 7, 1, 0, 2119, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573c60012819ULL }, // Inst #8026 = VCVTTPH2UQQZ256rmbkz |
| 39131 | { 8025, 8, 1, 0, 2119, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533c60012819ULL }, // Inst #8025 = VCVTTPH2UQQZ256rmbk |
| 39132 | { 8024, 6, 1, 0, 2119, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513c60012819ULL }, // Inst #8024 = VCVTTPH2UQQZ256rmb |
| 39133 | { 8023, 6, 1, 0, 2119, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x813c60012819ULL }, // Inst #8023 = VCVTTPH2UQQZ256rm |
| 39134 | { 8022, 3, 1, 0, 2117, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x663c60012829ULL }, // Inst #8022 = VCVTTPH2UQQZ128rrkz |
| 39135 | { 8021, 4, 1, 0, 2117, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x623c60012829ULL }, // Inst #8021 = VCVTTPH2UQQZ128rrk |
| 39136 | { 8020, 2, 1, 0, 2117, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603c60012829ULL }, // Inst #8020 = VCVTTPH2UQQZ128rr |
| 39137 | { 8019, 7, 1, 0, 2116, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x663c60012819ULL }, // Inst #8019 = VCVTTPH2UQQZ128rmkz |
| 39138 | { 8018, 8, 1, 0, 2116, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x623c60012819ULL }, // Inst #8018 = VCVTTPH2UQQZ128rmk |
| 39139 | { 8017, 7, 1, 0, 2116, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563c60012819ULL }, // Inst #8017 = VCVTTPH2UQQZ128rmbkz |
| 39140 | { 8016, 8, 1, 0, 2116, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523c60012819ULL }, // Inst #8016 = VCVTTPH2UQQZ128rmbk |
| 39141 | { 8015, 6, 1, 0, 2116, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503c60012819ULL }, // Inst #8015 = VCVTTPH2UQQZ128rmb |
| 39142 | { 8014, 6, 1, 0, 2116, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603c60012819ULL }, // Inst #8014 = VCVTTPH2UQQZ128rm |
| 39143 | { 8013, 3, 1, 0, 2094, 1, 0, 3259, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3c60012029ULL }, // Inst #8013 = VCVTTPH2UDQZrrkz |
| 39144 | { 8012, 4, 1, 0, 2094, 1, 0, 3255, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3c60012029ULL }, // Inst #8012 = VCVTTPH2UDQZrrk |
| 39145 | { 8011, 3, 1, 0, 2094, 1, 0, 3259, X86ImpOpBase + 78, 0, 0x5e3c60012029ULL }, // Inst #8011 = VCVTTPH2UDQZrrbkz |
| 39146 | { 8010, 4, 1, 0, 2094, 1, 0, 3255, X86ImpOpBase + 78, 0, 0x5a3c60012029ULL }, // Inst #8010 = VCVTTPH2UDQZrrbk |
| 39147 | { 8009, 2, 1, 0, 2086, 1, 0, 3077, X86ImpOpBase + 78, 0, 0x583c60012029ULL }, // Inst #8009 = VCVTTPH2UDQZrrb |
| 39148 | { 8008, 2, 1, 0, 2086, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83c60012029ULL }, // Inst #8008 = VCVTTPH2UDQZrr |
| 39149 | { 8007, 7, 1, 0, 2083, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3c60012019ULL }, // Inst #8007 = VCVTTPH2UDQZrmkz |
| 39150 | { 8006, 8, 1, 0, 2083, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3c60012019ULL }, // Inst #8006 = VCVTTPH2UDQZrmk |
| 39151 | { 8005, 7, 1, 0, 2083, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3c60012019ULL }, // Inst #8005 = VCVTTPH2UDQZrmbkz |
| 39152 | { 8004, 8, 1, 0, 2083, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3c60012019ULL }, // Inst #8004 = VCVTTPH2UDQZrmbk |
| 39153 | { 8003, 6, 1, 0, 2030, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583c60012019ULL }, // Inst #8003 = VCVTTPH2UDQZrmb |
| 39154 | { 8002, 6, 1, 0, 2030, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83c60012019ULL }, // Inst #8002 = VCVTTPH2UDQZrm |
| 39155 | { 8001, 3, 1, 0, 2075, 1, 0, 2320, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73c60012029ULL }, // Inst #8001 = VCVTTPH2UDQZ256rrkz |
| 39156 | { 8000, 4, 1, 0, 2075, 1, 0, 2316, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33c60012029ULL }, // Inst #8000 = VCVTTPH2UDQZ256rrk |
| 39157 | { 7999, 2, 1, 0, 1813, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13c60012029ULL }, // Inst #7999 = VCVTTPH2UDQZ256rr |
| 39158 | { 7998, 7, 1, 0, 2080, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73c60012019ULL }, // Inst #7998 = VCVTTPH2UDQZ256rmkz |
| 39159 | { 7997, 8, 1, 0, 2080, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33c60012019ULL }, // Inst #7997 = VCVTTPH2UDQZ256rmk |
| 39160 | { 7996, 7, 1, 0, 2080, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573c60012019ULL }, // Inst #7996 = VCVTTPH2UDQZ256rmbkz |
| 39161 | { 7995, 8, 1, 0, 2080, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533c60012019ULL }, // Inst #7995 = VCVTTPH2UDQZ256rmbk |
| 39162 | { 7994, 6, 1, 0, 2026, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513c60012019ULL }, // Inst #7994 = VCVTTPH2UDQZ256rmb |
| 39163 | { 7993, 6, 1, 0, 2026, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13c60012019ULL }, // Inst #7993 = VCVTTPH2UDQZ256rm |
| 39164 | { 7992, 3, 1, 0, 2074, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x863c60012029ULL }, // Inst #7992 = VCVTTPH2UDQZ128rrkz |
| 39165 | { 7991, 4, 1, 0, 2074, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x823c60012029ULL }, // Inst #7991 = VCVTTPH2UDQZ128rrk |
| 39166 | { 7990, 2, 1, 0, 1812, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c60012029ULL }, // Inst #7990 = VCVTTPH2UDQZ128rr |
| 39167 | { 7989, 7, 1, 0, 2073, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863c60012019ULL }, // Inst #7989 = VCVTTPH2UDQZ128rmkz |
| 39168 | { 7988, 8, 1, 0, 2073, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823c60012019ULL }, // Inst #7988 = VCVTTPH2UDQZ128rmk |
| 39169 | { 7987, 7, 1, 0, 2073, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563c60012019ULL }, // Inst #7987 = VCVTTPH2UDQZ128rmbkz |
| 39170 | { 7986, 8, 1, 0, 2073, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523c60012019ULL }, // Inst #7986 = VCVTTPH2UDQZ128rmbk |
| 39171 | { 7985, 6, 1, 0, 2071, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503c60012019ULL }, // Inst #7985 = VCVTTPH2UDQZ128rmb |
| 39172 | { 7984, 6, 1, 0, 2071, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c60012019ULL }, // Inst #7984 = VCVTTPH2UDQZ128rm |
| 39173 | { 7983, 3, 1, 0, 404, 1, 0, 2420, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae3d60012829ULL }, // Inst #7983 = VCVTTPH2QQZrrkz |
| 39174 | { 7982, 4, 1, 0, 404, 1, 0, 2416, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaa3d60012829ULL }, // Inst #7982 = VCVTTPH2QQZrrk |
| 39175 | { 7981, 3, 1, 0, 404, 1, 0, 2420, X86ImpOpBase + 78, 0, 0x5e3d60012829ULL }, // Inst #7981 = VCVTTPH2QQZrrbkz |
| 39176 | { 7980, 4, 1, 0, 404, 1, 0, 2416, X86ImpOpBase + 78, 0, 0x5a3d60012829ULL }, // Inst #7980 = VCVTTPH2QQZrrbk |
| 39177 | { 7979, 2, 1, 0, 404, 1, 0, 2344, X86ImpOpBase + 78, 0, 0x583d60012829ULL }, // Inst #7979 = VCVTTPH2QQZrrb |
| 39178 | { 7978, 2, 1, 0, 404, 1, 0, 2344, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa83d60012829ULL }, // Inst #7978 = VCVTTPH2QQZrr |
| 39179 | { 7977, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae3d60012819ULL }, // Inst #7977 = VCVTTPH2QQZrmkz |
| 39180 | { 7976, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaa3d60012819ULL }, // Inst #7976 = VCVTTPH2QQZrmk |
| 39181 | { 7975, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3d60012819ULL }, // Inst #7975 = VCVTTPH2QQZrmbkz |
| 39182 | { 7974, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3d60012819ULL }, // Inst #7974 = VCVTTPH2QQZrmbk |
| 39183 | { 7973, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583d60012819ULL }, // Inst #7973 = VCVTTPH2QQZrmb |
| 39184 | { 7972, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa83d60012819ULL }, // Inst #7972 = VCVTTPH2QQZrm |
| 39185 | { 7971, 3, 1, 0, 2118, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x873d60012829ULL }, // Inst #7971 = VCVTTPH2QQZ256rrkz |
| 39186 | { 7970, 4, 1, 0, 2118, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x833d60012829ULL }, // Inst #7970 = VCVTTPH2QQZ256rrk |
| 39187 | { 7969, 2, 1, 0, 2118, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x813d60012829ULL }, // Inst #7969 = VCVTTPH2QQZ256rr |
| 39188 | { 7968, 7, 1, 0, 2119, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x873d60012819ULL }, // Inst #7968 = VCVTTPH2QQZ256rmkz |
| 39189 | { 7967, 8, 1, 0, 2119, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x833d60012819ULL }, // Inst #7967 = VCVTTPH2QQZ256rmk |
| 39190 | { 7966, 7, 1, 0, 2119, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573d60012819ULL }, // Inst #7966 = VCVTTPH2QQZ256rmbkz |
| 39191 | { 7965, 8, 1, 0, 2119, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533d60012819ULL }, // Inst #7965 = VCVTTPH2QQZ256rmbk |
| 39192 | { 7964, 6, 1, 0, 2119, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513d60012819ULL }, // Inst #7964 = VCVTTPH2QQZ256rmb |
| 39193 | { 7963, 6, 1, 0, 2119, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x813d60012819ULL }, // Inst #7963 = VCVTTPH2QQZ256rm |
| 39194 | { 7962, 3, 1, 0, 2117, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x663d60012829ULL }, // Inst #7962 = VCVTTPH2QQZ128rrkz |
| 39195 | { 7961, 4, 1, 0, 2117, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x623d60012829ULL }, // Inst #7961 = VCVTTPH2QQZ128rrk |
| 39196 | { 7960, 2, 1, 0, 2117, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603d60012829ULL }, // Inst #7960 = VCVTTPH2QQZ128rr |
| 39197 | { 7959, 7, 1, 0, 2116, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x663d60012819ULL }, // Inst #7959 = VCVTTPH2QQZ128rmkz |
| 39198 | { 7958, 8, 1, 0, 2116, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x623d60012819ULL }, // Inst #7958 = VCVTTPH2QQZ128rmk |
| 39199 | { 7957, 7, 1, 0, 2116, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563d60012819ULL }, // Inst #7957 = VCVTTPH2QQZ128rmbkz |
| 39200 | { 7956, 8, 1, 0, 2116, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523d60012819ULL }, // Inst #7956 = VCVTTPH2QQZ128rmbk |
| 39201 | { 7955, 6, 1, 0, 2116, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503d60012819ULL }, // Inst #7955 = VCVTTPH2QQZ128rmb |
| 39202 | { 7954, 6, 1, 0, 2116, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603d60012819ULL }, // Inst #7954 = VCVTTPH2QQZ128rm |
| 39203 | { 7953, 3, 1, 0, 384, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee3568052029ULL }, // Inst #7953 = VCVTTPH2IUBSZrrkz |
| 39204 | { 7952, 4, 1, 0, 384, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea3568052029ULL }, // Inst #7952 = VCVTTPH2IUBSZrrk |
| 39205 | { 7951, 3, 1, 0, 384, 1, 0, 2987, X86ImpOpBase + 78, 0, 0x563568052029ULL }, // Inst #7951 = VCVTTPH2IUBSZrrbkz |
| 39206 | { 7950, 4, 1, 0, 384, 1, 0, 2983, X86ImpOpBase + 78, 0, 0x523568052029ULL }, // Inst #7950 = VCVTTPH2IUBSZrrbk |
| 39207 | { 7949, 2, 1, 0, 384, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x503568052029ULL }, // Inst #7949 = VCVTTPH2IUBSZrrb |
| 39208 | { 7948, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe83568052029ULL }, // Inst #7948 = VCVTTPH2IUBSZrr |
| 39209 | { 7947, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3568052019ULL }, // Inst #7947 = VCVTTPH2IUBSZrmkz |
| 39210 | { 7946, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3568052019ULL }, // Inst #7946 = VCVTTPH2IUBSZrmk |
| 39211 | { 7945, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e3568052019ULL }, // Inst #7945 = VCVTTPH2IUBSZrmbkz |
| 39212 | { 7944, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a3568052019ULL }, // Inst #7944 = VCVTTPH2IUBSZrmbk |
| 39213 | { 7943, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x583568052019ULL }, // Inst #7943 = VCVTTPH2IUBSZrmb |
| 39214 | { 7942, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83568052019ULL }, // Inst #7942 = VCVTTPH2IUBSZrm |
| 39215 | { 7941, 3, 1, 0, 382, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc73568052029ULL }, // Inst #7941 = VCVTTPH2IUBSZ256rrkz |
| 39216 | { 7940, 4, 1, 0, 382, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc33568052029ULL }, // Inst #7940 = VCVTTPH2IUBSZ256rrk |
| 39217 | { 7939, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc13568052029ULL }, // Inst #7939 = VCVTTPH2IUBSZ256rr |
| 39218 | { 7938, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73568052019ULL }, // Inst #7938 = VCVTTPH2IUBSZ256rmkz |
| 39219 | { 7937, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33568052019ULL }, // Inst #7937 = VCVTTPH2IUBSZ256rmk |
| 39220 | { 7936, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x573568052019ULL }, // Inst #7936 = VCVTTPH2IUBSZ256rmbkz |
| 39221 | { 7935, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x533568052019ULL }, // Inst #7935 = VCVTTPH2IUBSZ256rmbk |
| 39222 | { 7934, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x513568052019ULL }, // Inst #7934 = VCVTTPH2IUBSZ256rmb |
| 39223 | { 7933, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13568052019ULL }, // Inst #7933 = VCVTTPH2IUBSZ256rm |
| 39224 | { 7932, 3, 1, 0, 149, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa63568052029ULL }, // Inst #7932 = VCVTTPH2IUBSZ128rrkz |
| 39225 | { 7931, 4, 1, 0, 149, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa23568052029ULL }, // Inst #7931 = VCVTTPH2IUBSZ128rrk |
| 39226 | { 7930, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03568052029ULL }, // Inst #7930 = VCVTTPH2IUBSZ128rr |
| 39227 | { 7929, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63568052019ULL }, // Inst #7929 = VCVTTPH2IUBSZ128rmkz |
| 39228 | { 7928, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23568052019ULL }, // Inst #7928 = VCVTTPH2IUBSZ128rmk |
| 39229 | { 7927, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x563568052019ULL }, // Inst #7927 = VCVTTPH2IUBSZ128rmbkz |
| 39230 | { 7926, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x523568052019ULL }, // Inst #7926 = VCVTTPH2IUBSZ128rmbk |
| 39231 | { 7925, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x503568052019ULL }, // Inst #7925 = VCVTTPH2IUBSZ128rmb |
| 39232 | { 7924, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03568052019ULL }, // Inst #7924 = VCVTTPH2IUBSZ128rm |
| 39233 | { 7923, 3, 1, 0, 384, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee3468052029ULL }, // Inst #7923 = VCVTTPH2IBSZrrkz |
| 39234 | { 7922, 4, 1, 0, 384, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea3468052029ULL }, // Inst #7922 = VCVTTPH2IBSZrrk |
| 39235 | { 7921, 3, 1, 0, 384, 1, 0, 2987, X86ImpOpBase + 78, 0, 0x563468052029ULL }, // Inst #7921 = VCVTTPH2IBSZrrbkz |
| 39236 | { 7920, 4, 1, 0, 384, 1, 0, 2983, X86ImpOpBase + 78, 0, 0x523468052029ULL }, // Inst #7920 = VCVTTPH2IBSZrrbk |
| 39237 | { 7919, 2, 1, 0, 384, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x503468052029ULL }, // Inst #7919 = VCVTTPH2IBSZrrb |
| 39238 | { 7918, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe83468052029ULL }, // Inst #7918 = VCVTTPH2IBSZrr |
| 39239 | { 7917, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3468052019ULL }, // Inst #7917 = VCVTTPH2IBSZrmkz |
| 39240 | { 7916, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3468052019ULL }, // Inst #7916 = VCVTTPH2IBSZrmk |
| 39241 | { 7915, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e3468052019ULL }, // Inst #7915 = VCVTTPH2IBSZrmbkz |
| 39242 | { 7914, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a3468052019ULL }, // Inst #7914 = VCVTTPH2IBSZrmbk |
| 39243 | { 7913, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x583468052019ULL }, // Inst #7913 = VCVTTPH2IBSZrmb |
| 39244 | { 7912, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83468052019ULL }, // Inst #7912 = VCVTTPH2IBSZrm |
| 39245 | { 7911, 3, 1, 0, 382, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc73468052029ULL }, // Inst #7911 = VCVTTPH2IBSZ256rrkz |
| 39246 | { 7910, 4, 1, 0, 382, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc33468052029ULL }, // Inst #7910 = VCVTTPH2IBSZ256rrk |
| 39247 | { 7909, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc13468052029ULL }, // Inst #7909 = VCVTTPH2IBSZ256rr |
| 39248 | { 7908, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73468052019ULL }, // Inst #7908 = VCVTTPH2IBSZ256rmkz |
| 39249 | { 7907, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33468052019ULL }, // Inst #7907 = VCVTTPH2IBSZ256rmk |
| 39250 | { 7906, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x573468052019ULL }, // Inst #7906 = VCVTTPH2IBSZ256rmbkz |
| 39251 | { 7905, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x533468052019ULL }, // Inst #7905 = VCVTTPH2IBSZ256rmbk |
| 39252 | { 7904, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x513468052019ULL }, // Inst #7904 = VCVTTPH2IBSZ256rmb |
| 39253 | { 7903, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13468052019ULL }, // Inst #7903 = VCVTTPH2IBSZ256rm |
| 39254 | { 7902, 3, 1, 0, 149, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa63468052029ULL }, // Inst #7902 = VCVTTPH2IBSZ128rrkz |
| 39255 | { 7901, 4, 1, 0, 149, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa23468052029ULL }, // Inst #7901 = VCVTTPH2IBSZ128rrk |
| 39256 | { 7900, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03468052029ULL }, // Inst #7900 = VCVTTPH2IBSZ128rr |
| 39257 | { 7899, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63468052019ULL }, // Inst #7899 = VCVTTPH2IBSZ128rmkz |
| 39258 | { 7898, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23468052019ULL }, // Inst #7898 = VCVTTPH2IBSZ128rmk |
| 39259 | { 7897, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x563468052019ULL }, // Inst #7897 = VCVTTPH2IBSZ128rmbkz |
| 39260 | { 7896, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x523468052019ULL }, // Inst #7896 = VCVTTPH2IBSZ128rmbk |
| 39261 | { 7895, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x503468052019ULL }, // Inst #7895 = VCVTTPH2IBSZ128rmb |
| 39262 | { 7894, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03468052019ULL }, // Inst #7894 = VCVTTPH2IBSZ128rm |
| 39263 | { 7893, 3, 1, 0, 2094, 1, 0, 3259, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce2de0013029ULL }, // Inst #7893 = VCVTTPH2DQZrrkz |
| 39264 | { 7892, 4, 1, 0, 2094, 1, 0, 3255, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca2de0013029ULL }, // Inst #7892 = VCVTTPH2DQZrrk |
| 39265 | { 7891, 3, 1, 0, 2094, 1, 0, 3259, X86ImpOpBase + 78, 0, 0x5e2de0013029ULL }, // Inst #7891 = VCVTTPH2DQZrrbkz |
| 39266 | { 7890, 4, 1, 0, 2094, 1, 0, 3255, X86ImpOpBase + 78, 0, 0x5a2de0013029ULL }, // Inst #7890 = VCVTTPH2DQZrrbk |
| 39267 | { 7889, 2, 1, 0, 2086, 1, 0, 3077, X86ImpOpBase + 78, 0, 0x582de0013029ULL }, // Inst #7889 = VCVTTPH2DQZrrb |
| 39268 | { 7888, 2, 1, 0, 2086, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc82de0013029ULL }, // Inst #7888 = VCVTTPH2DQZrr |
| 39269 | { 7887, 7, 1, 0, 2083, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce2de0013019ULL }, // Inst #7887 = VCVTTPH2DQZrmkz |
| 39270 | { 7886, 8, 1, 0, 2083, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca2de0013019ULL }, // Inst #7886 = VCVTTPH2DQZrmk |
| 39271 | { 7885, 7, 1, 0, 2083, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e2de0013019ULL }, // Inst #7885 = VCVTTPH2DQZrmbkz |
| 39272 | { 7884, 8, 1, 0, 2083, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a2de0013019ULL }, // Inst #7884 = VCVTTPH2DQZrmbk |
| 39273 | { 7883, 6, 1, 0, 2030, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x582de0013019ULL }, // Inst #7883 = VCVTTPH2DQZrmb |
| 39274 | { 7882, 6, 1, 0, 2030, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc82de0013019ULL }, // Inst #7882 = VCVTTPH2DQZrm |
| 39275 | { 7881, 3, 1, 0, 2075, 1, 0, 2320, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa72de0013029ULL }, // Inst #7881 = VCVTTPH2DQZ256rrkz |
| 39276 | { 7880, 4, 1, 0, 2075, 1, 0, 2316, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa32de0013029ULL }, // Inst #7880 = VCVTTPH2DQZ256rrk |
| 39277 | { 7879, 2, 1, 0, 1813, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa12de0013029ULL }, // Inst #7879 = VCVTTPH2DQZ256rr |
| 39278 | { 7878, 7, 1, 0, 2080, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa72de0013019ULL }, // Inst #7878 = VCVTTPH2DQZ256rmkz |
| 39279 | { 7877, 8, 1, 0, 2080, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa32de0013019ULL }, // Inst #7877 = VCVTTPH2DQZ256rmk |
| 39280 | { 7876, 7, 1, 0, 2080, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x572de0013019ULL }, // Inst #7876 = VCVTTPH2DQZ256rmbkz |
| 39281 | { 7875, 8, 1, 0, 2080, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x532de0013019ULL }, // Inst #7875 = VCVTTPH2DQZ256rmbk |
| 39282 | { 7874, 6, 1, 0, 2026, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x512de0013019ULL }, // Inst #7874 = VCVTTPH2DQZ256rmb |
| 39283 | { 7873, 6, 1, 0, 2026, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa12de0013019ULL }, // Inst #7873 = VCVTTPH2DQZ256rm |
| 39284 | { 7872, 3, 1, 0, 2074, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x862de0013029ULL }, // Inst #7872 = VCVTTPH2DQZ128rrkz |
| 39285 | { 7871, 4, 1, 0, 2074, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x822de0013029ULL }, // Inst #7871 = VCVTTPH2DQZ128rrk |
| 39286 | { 7870, 2, 1, 0, 1812, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x802de0013029ULL }, // Inst #7870 = VCVTTPH2DQZ128rr |
| 39287 | { 7869, 7, 1, 0, 2073, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x862de0013019ULL }, // Inst #7869 = VCVTTPH2DQZ128rmkz |
| 39288 | { 7868, 8, 1, 0, 2073, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x822de0013019ULL }, // Inst #7868 = VCVTTPH2DQZ128rmk |
| 39289 | { 7867, 7, 1, 0, 2073, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x562de0013019ULL }, // Inst #7867 = VCVTTPH2DQZ128rmbkz |
| 39290 | { 7866, 8, 1, 0, 2073, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x522de0013019ULL }, // Inst #7866 = VCVTTPH2DQZ128rmbk |
| 39291 | { 7865, 6, 1, 0, 2071, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x502de0013019ULL }, // Inst #7865 = VCVTTPH2DQZ128rmb |
| 39292 | { 7864, 6, 1, 0, 2071, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x802de0013019ULL }, // Inst #7864 = VCVTTPH2DQZ128rm |
| 39293 | { 7863, 3, 1, 0, 1860, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3c60022829ULL }, // Inst #7863 = VCVTTPD2UQQZrrkz |
| 39294 | { 7862, 4, 1, 0, 1860, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3c60022829ULL }, // Inst #7862 = VCVTTPD2UQQZrrk |
| 39295 | { 7861, 3, 1, 0, 1860, 1, 0, 2808, X86ImpOpBase + 78, 0, 0x9e3c60022829ULL }, // Inst #7861 = VCVTTPD2UQQZrrbkz |
| 39296 | { 7860, 4, 1, 0, 1860, 1, 0, 2804, X86ImpOpBase + 78, 0, 0x9a3c60022829ULL }, // Inst #7860 = VCVTTPD2UQQZrrbk |
| 39297 | { 7859, 2, 1, 0, 1860, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x983c60022829ULL }, // Inst #7859 = VCVTTPD2UQQZrrb |
| 39298 | { 7858, 2, 1, 0, 1263, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83c60022829ULL }, // Inst #7858 = VCVTTPD2UQQZrr |
| 39299 | { 7857, 7, 1, 0, 1376, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3c60022819ULL }, // Inst #7857 = VCVTTPD2UQQZrmkz |
| 39300 | { 7856, 8, 1, 0, 1376, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3c60022819ULL }, // Inst #7856 = VCVTTPD2UQQZrmk |
| 39301 | { 7855, 7, 1, 0, 1376, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3c60022819ULL }, // Inst #7855 = VCVTTPD2UQQZrmbkz |
| 39302 | { 7854, 8, 1, 0, 1376, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3c60022819ULL }, // Inst #7854 = VCVTTPD2UQQZrmbk |
| 39303 | { 7853, 6, 1, 0, 1376, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983c60022819ULL }, // Inst #7853 = VCVTTPD2UQQZrmb |
| 39304 | { 7852, 6, 1, 0, 1376, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83c60022819ULL }, // Inst #7852 = VCVTTPD2UQQZrm |
| 39305 | { 7851, 3, 1, 0, 1260, 1, 0, 2786, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73c60022829ULL }, // Inst #7851 = VCVTTPD2UQQZ256rrkz |
| 39306 | { 7850, 4, 1, 0, 1260, 1, 0, 2782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33c60022829ULL }, // Inst #7850 = VCVTTPD2UQQZ256rrk |
| 39307 | { 7849, 2, 1, 0, 1260, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13c60022829ULL }, // Inst #7849 = VCVTTPD2UQQZ256rr |
| 39308 | { 7848, 7, 1, 0, 1375, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73c60022819ULL }, // Inst #7848 = VCVTTPD2UQQZ256rmkz |
| 39309 | { 7847, 8, 1, 0, 1375, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33c60022819ULL }, // Inst #7847 = VCVTTPD2UQQZ256rmk |
| 39310 | { 7846, 7, 1, 0, 1375, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973c60022819ULL }, // Inst #7846 = VCVTTPD2UQQZ256rmbkz |
| 39311 | { 7845, 8, 1, 0, 1375, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933c60022819ULL }, // Inst #7845 = VCVTTPD2UQQZ256rmbk |
| 39312 | { 7844, 6, 1, 0, 1375, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913c60022819ULL }, // Inst #7844 = VCVTTPD2UQQZ256rmb |
| 39313 | { 7843, 6, 1, 0, 1375, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13c60022819ULL }, // Inst #7843 = VCVTTPD2UQQZ256rm |
| 39314 | { 7842, 3, 1, 0, 1259, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63c60022829ULL }, // Inst #7842 = VCVTTPD2UQQZ128rrkz |
| 39315 | { 7841, 4, 1, 0, 1259, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23c60022829ULL }, // Inst #7841 = VCVTTPD2UQQZ128rrk |
| 39316 | { 7840, 2, 1, 0, 1259, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03c60022829ULL }, // Inst #7840 = VCVTTPD2UQQZ128rr |
| 39317 | { 7839, 7, 1, 0, 1359, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63c60022819ULL }, // Inst #7839 = VCVTTPD2UQQZ128rmkz |
| 39318 | { 7838, 8, 1, 0, 1359, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23c60022819ULL }, // Inst #7838 = VCVTTPD2UQQZ128rmk |
| 39319 | { 7837, 7, 1, 0, 1359, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963c60022819ULL }, // Inst #7837 = VCVTTPD2UQQZ128rmbkz |
| 39320 | { 7836, 8, 1, 0, 1359, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923c60022819ULL }, // Inst #7836 = VCVTTPD2UQQZ128rmbk |
| 39321 | { 7835, 6, 1, 0, 1359, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903c60022819ULL }, // Inst #7835 = VCVTTPD2UQQZ128rmb |
| 39322 | { 7834, 6, 1, 0, 1359, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03c60022819ULL }, // Inst #7834 = VCVTTPD2UQQZ128rm |
| 39323 | { 7833, 3, 1, 0, 400, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3660032829ULL }, // Inst #7833 = VCVTTPD2UQQSZrrkz |
| 39324 | { 7832, 4, 1, 0, 400, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3660032829ULL }, // Inst #7832 = VCVTTPD2UQQSZrrk |
| 39325 | { 7831, 3, 1, 0, 400, 1, 0, 2808, X86ImpOpBase + 78, 0, 0x9e3660032829ULL }, // Inst #7831 = VCVTTPD2UQQSZrrbkz |
| 39326 | { 7830, 4, 1, 0, 400, 1, 0, 2804, X86ImpOpBase + 78, 0, 0x9a3660032829ULL }, // Inst #7830 = VCVTTPD2UQQSZrrbk |
| 39327 | { 7829, 2, 1, 0, 400, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x983660032829ULL }, // Inst #7829 = VCVTTPD2UQQSZrrb |
| 39328 | { 7828, 2, 1, 0, 400, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83660032829ULL }, // Inst #7828 = VCVTTPD2UQQSZrr |
| 39329 | { 7827, 7, 1, 0, 399, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3660032819ULL }, // Inst #7827 = VCVTTPD2UQQSZrmkz |
| 39330 | { 7826, 8, 1, 0, 399, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3660032819ULL }, // Inst #7826 = VCVTTPD2UQQSZrmk |
| 39331 | { 7825, 7, 1, 0, 399, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3660032819ULL }, // Inst #7825 = VCVTTPD2UQQSZrmbkz |
| 39332 | { 7824, 8, 1, 0, 399, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3660032819ULL }, // Inst #7824 = VCVTTPD2UQQSZrmbk |
| 39333 | { 7823, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983660032819ULL }, // Inst #7823 = VCVTTPD2UQQSZrmb |
| 39334 | { 7822, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83660032819ULL }, // Inst #7822 = VCVTTPD2UQQSZrm |
| 39335 | { 7821, 3, 1, 0, 398, 1, 0, 2786, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73660032829ULL }, // Inst #7821 = VCVTTPD2UQQSZ256rrkz |
| 39336 | { 7820, 4, 1, 0, 398, 1, 0, 2782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33660032829ULL }, // Inst #7820 = VCVTTPD2UQQSZ256rrk |
| 39337 | { 7819, 3, 1, 0, 398, 1, 0, 2786, X86ImpOpBase + 78, 0, 0x40973660032829ULL }, // Inst #7819 = VCVTTPD2UQQSZ256rrbkz |
| 39338 | { 7818, 4, 1, 0, 398, 1, 0, 2782, X86ImpOpBase + 78, 0, 0x40933660032829ULL }, // Inst #7818 = VCVTTPD2UQQSZ256rrbk |
| 39339 | { 7817, 2, 1, 0, 398, 1, 0, 2780, X86ImpOpBase + 78, 0, 0x40913660032829ULL }, // Inst #7817 = VCVTTPD2UQQSZ256rrb |
| 39340 | { 7816, 2, 1, 0, 398, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13660032829ULL }, // Inst #7816 = VCVTTPD2UQQSZ256rr |
| 39341 | { 7815, 7, 1, 0, 397, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73660032819ULL }, // Inst #7815 = VCVTTPD2UQQSZ256rmkz |
| 39342 | { 7814, 8, 1, 0, 397, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33660032819ULL }, // Inst #7814 = VCVTTPD2UQQSZ256rmk |
| 39343 | { 7813, 7, 1, 0, 397, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973660032819ULL }, // Inst #7813 = VCVTTPD2UQQSZ256rmbkz |
| 39344 | { 7812, 8, 1, 0, 397, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933660032819ULL }, // Inst #7812 = VCVTTPD2UQQSZ256rmbk |
| 39345 | { 7811, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913660032819ULL }, // Inst #7811 = VCVTTPD2UQQSZ256rmb |
| 39346 | { 7810, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13660032819ULL }, // Inst #7810 = VCVTTPD2UQQSZ256rm |
| 39347 | { 7809, 3, 1, 0, 95, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63660032829ULL }, // Inst #7809 = VCVTTPD2UQQSZ128rrkz |
| 39348 | { 7808, 4, 1, 0, 95, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23660032829ULL }, // Inst #7808 = VCVTTPD2UQQSZ128rrk |
| 39349 | { 7807, 2, 1, 0, 95, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03660032829ULL }, // Inst #7807 = VCVTTPD2UQQSZ128rr |
| 39350 | { 7806, 7, 1, 0, 94, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63660032819ULL }, // Inst #7806 = VCVTTPD2UQQSZ128rmkz |
| 39351 | { 7805, 8, 1, 0, 94, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23660032819ULL }, // Inst #7805 = VCVTTPD2UQQSZ128rmk |
| 39352 | { 7804, 7, 1, 0, 94, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963660032819ULL }, // Inst #7804 = VCVTTPD2UQQSZ128rmbkz |
| 39353 | { 7803, 8, 1, 0, 94, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923660032819ULL }, // Inst #7803 = VCVTTPD2UQQSZ128rmbk |
| 39354 | { 7802, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903660032819ULL }, // Inst #7802 = VCVTTPD2UQQSZ128rmb |
| 39355 | { 7801, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03660032819ULL }, // Inst #7801 = VCVTTPD2UQQSZ128rm |
| 39356 | { 7800, 3, 1, 0, 400, 1, 0, 3166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3c60022029ULL }, // Inst #7800 = VCVTTPD2UDQZrrkz |
| 39357 | { 7799, 4, 1, 0, 400, 1, 0, 3162, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3c60022029ULL }, // Inst #7799 = VCVTTPD2UDQZrrk |
| 39358 | { 7798, 3, 1, 0, 400, 1, 0, 3166, X86ImpOpBase + 78, 0, 0x9e3c60022029ULL }, // Inst #7798 = VCVTTPD2UDQZrrbkz |
| 39359 | { 7797, 4, 1, 0, 400, 1, 0, 3162, X86ImpOpBase + 78, 0, 0x9a3c60022029ULL }, // Inst #7797 = VCVTTPD2UDQZrrbk |
| 39360 | { 7796, 2, 1, 0, 400, 1, 0, 3095, X86ImpOpBase + 78, 0, 0x983c60022029ULL }, // Inst #7796 = VCVTTPD2UDQZrrb |
| 39361 | { 7795, 2, 1, 0, 1295, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83c60022029ULL }, // Inst #7795 = VCVTTPD2UDQZrr |
| 39362 | { 7794, 7, 1, 0, 1393, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3c60022019ULL }, // Inst #7794 = VCVTTPD2UDQZrmkz |
| 39363 | { 7793, 8, 1, 0, 1393, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3c60022019ULL }, // Inst #7793 = VCVTTPD2UDQZrmk |
| 39364 | { 7792, 7, 1, 0, 1393, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3c60022019ULL }, // Inst #7792 = VCVTTPD2UDQZrmbkz |
| 39365 | { 7791, 8, 1, 0, 1393, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3c60022019ULL }, // Inst #7791 = VCVTTPD2UDQZrmbk |
| 39366 | { 7790, 6, 1, 0, 1393, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983c60022019ULL }, // Inst #7790 = VCVTTPD2UDQZrmb |
| 39367 | { 7789, 6, 1, 0, 1393, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83c60022019ULL }, // Inst #7789 = VCVTTPD2UDQZrm |
| 39368 | { 7788, 3, 1, 0, 1290, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73c60022029ULL }, // Inst #7788 = VCVTTPD2UDQZ256rrkz |
| 39369 | { 7787, 4, 1, 0, 1290, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33c60022029ULL }, // Inst #7787 = VCVTTPD2UDQZ256rrk |
| 39370 | { 7786, 2, 1, 0, 1290, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13c60022029ULL }, // Inst #7786 = VCVTTPD2UDQZ256rr |
| 39371 | { 7785, 7, 1, 0, 2025, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73c60022019ULL }, // Inst #7785 = VCVTTPD2UDQZ256rmkz |
| 39372 | { 7784, 8, 1, 0, 2025, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33c60022019ULL }, // Inst #7784 = VCVTTPD2UDQZ256rmk |
| 39373 | { 7783, 7, 1, 0, 2025, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973c60022019ULL }, // Inst #7783 = VCVTTPD2UDQZ256rmbkz |
| 39374 | { 7782, 8, 1, 0, 2025, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933c60022019ULL }, // Inst #7782 = VCVTTPD2UDQZ256rmbk |
| 39375 | { 7781, 6, 1, 0, 2025, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913c60022019ULL }, // Inst #7781 = VCVTTPD2UDQZ256rmb |
| 39376 | { 7780, 6, 1, 0, 2025, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13c60022019ULL }, // Inst #7780 = VCVTTPD2UDQZ256rm |
| 39377 | { 7779, 3, 1, 0, 1270, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63c60022029ULL }, // Inst #7779 = VCVTTPD2UDQZ128rrkz |
| 39378 | { 7778, 4, 1, 0, 1270, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23c60022029ULL }, // Inst #7778 = VCVTTPD2UDQZ128rrk |
| 39379 | { 7777, 2, 1, 0, 1270, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03c60022029ULL }, // Inst #7777 = VCVTTPD2UDQZ128rr |
| 39380 | { 7776, 7, 1, 0, 1739, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63c60022019ULL }, // Inst #7776 = VCVTTPD2UDQZ128rmkz |
| 39381 | { 7775, 8, 1, 0, 1739, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23c60022019ULL }, // Inst #7775 = VCVTTPD2UDQZ128rmk |
| 39382 | { 7774, 7, 1, 0, 1739, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963c60022019ULL }, // Inst #7774 = VCVTTPD2UDQZ128rmbkz |
| 39383 | { 7773, 8, 1, 0, 1739, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923c60022019ULL }, // Inst #7773 = VCVTTPD2UDQZ128rmbk |
| 39384 | { 7772, 6, 1, 0, 1739, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903c60022019ULL }, // Inst #7772 = VCVTTPD2UDQZ128rmb |
| 39385 | { 7771, 6, 1, 0, 1739, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03c60022019ULL }, // Inst #7771 = VCVTTPD2UDQZ128rm |
| 39386 | { 7770, 3, 1, 0, 400, 1, 0, 3166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3660032029ULL }, // Inst #7770 = VCVTTPD2UDQSZrrkz |
| 39387 | { 7769, 4, 1, 0, 400, 1, 0, 3162, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3660032029ULL }, // Inst #7769 = VCVTTPD2UDQSZrrk |
| 39388 | { 7768, 3, 1, 0, 400, 1, 0, 3166, X86ImpOpBase + 78, 0, 0x9e3660032029ULL }, // Inst #7768 = VCVTTPD2UDQSZrrbkz |
| 39389 | { 7767, 4, 1, 0, 400, 1, 0, 3162, X86ImpOpBase + 78, 0, 0x9a3660032029ULL }, // Inst #7767 = VCVTTPD2UDQSZrrbk |
| 39390 | { 7766, 2, 1, 0, 400, 1, 0, 3095, X86ImpOpBase + 78, 0, 0x983660032029ULL }, // Inst #7766 = VCVTTPD2UDQSZrrb |
| 39391 | { 7765, 2, 1, 0, 400, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83660032029ULL }, // Inst #7765 = VCVTTPD2UDQSZrr |
| 39392 | { 7764, 7, 1, 0, 399, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3660032019ULL }, // Inst #7764 = VCVTTPD2UDQSZrmkz |
| 39393 | { 7763, 8, 1, 0, 399, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3660032019ULL }, // Inst #7763 = VCVTTPD2UDQSZrmk |
| 39394 | { 7762, 7, 1, 0, 399, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3660032019ULL }, // Inst #7762 = VCVTTPD2UDQSZrmbkz |
| 39395 | { 7761, 8, 1, 0, 399, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3660032019ULL }, // Inst #7761 = VCVTTPD2UDQSZrmbk |
| 39396 | { 7760, 6, 1, 0, 399, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983660032019ULL }, // Inst #7760 = VCVTTPD2UDQSZrmb |
| 39397 | { 7759, 6, 1, 0, 399, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83660032019ULL }, // Inst #7759 = VCVTTPD2UDQSZrm |
| 39398 | { 7758, 3, 1, 0, 398, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73660032029ULL }, // Inst #7758 = VCVTTPD2UDQSZ256rrkz |
| 39399 | { 7757, 4, 1, 0, 398, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33660032029ULL }, // Inst #7757 = VCVTTPD2UDQSZ256rrk |
| 39400 | { 7756, 3, 1, 0, 398, 1, 0, 3150, X86ImpOpBase + 78, 0, 0x40973660032029ULL }, // Inst #7756 = VCVTTPD2UDQSZ256rrbkz |
| 39401 | { 7755, 4, 1, 0, 398, 1, 0, 3146, X86ImpOpBase + 78, 0, 0x40933660032029ULL }, // Inst #7755 = VCVTTPD2UDQSZ256rrbk |
| 39402 | { 7754, 2, 1, 0, 398, 1, 0, 3086, X86ImpOpBase + 78, 0, 0x40913660032029ULL }, // Inst #7754 = VCVTTPD2UDQSZ256rrb |
| 39403 | { 7753, 2, 1, 0, 398, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13660032029ULL }, // Inst #7753 = VCVTTPD2UDQSZ256rr |
| 39404 | { 7752, 7, 1, 0, 397, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73660032019ULL }, // Inst #7752 = VCVTTPD2UDQSZ256rmkz |
| 39405 | { 7751, 8, 1, 0, 397, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33660032019ULL }, // Inst #7751 = VCVTTPD2UDQSZ256rmk |
| 39406 | { 7750, 7, 1, 0, 397, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973660032019ULL }, // Inst #7750 = VCVTTPD2UDQSZ256rmbkz |
| 39407 | { 7749, 8, 1, 0, 397, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933660032019ULL }, // Inst #7749 = VCVTTPD2UDQSZ256rmbk |
| 39408 | { 7748, 6, 1, 0, 397, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913660032019ULL }, // Inst #7748 = VCVTTPD2UDQSZ256rmb |
| 39409 | { 7747, 6, 1, 0, 397, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13660032019ULL }, // Inst #7747 = VCVTTPD2UDQSZ256rm |
| 39410 | { 7746, 3, 1, 0, 95, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63660032029ULL }, // Inst #7746 = VCVTTPD2UDQSZ128rrkz |
| 39411 | { 7745, 4, 1, 0, 95, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23660032029ULL }, // Inst #7745 = VCVTTPD2UDQSZ128rrk |
| 39412 | { 7744, 2, 1, 0, 95, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03660032029ULL }, // Inst #7744 = VCVTTPD2UDQSZ128rr |
| 39413 | { 7743, 7, 1, 0, 94, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63660032019ULL }, // Inst #7743 = VCVTTPD2UDQSZ128rmkz |
| 39414 | { 7742, 8, 1, 0, 94, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23660032019ULL }, // Inst #7742 = VCVTTPD2UDQSZ128rmk |
| 39415 | { 7741, 7, 1, 0, 94, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963660032019ULL }, // Inst #7741 = VCVTTPD2UDQSZ128rmbkz |
| 39416 | { 7740, 8, 1, 0, 94, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923660032019ULL }, // Inst #7740 = VCVTTPD2UDQSZ128rmbk |
| 39417 | { 7739, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903660032019ULL }, // Inst #7739 = VCVTTPD2UDQSZ128rmb |
| 39418 | { 7738, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0xa03660032019ULL }, // Inst #7738 = VCVTTPD2UDQSZ128rm |
| 39419 | { 7737, 3, 1, 0, 1860, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60022829ULL }, // Inst #7737 = VCVTTPD2QQZrrkz |
| 39420 | { 7736, 4, 1, 0, 1860, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60022829ULL }, // Inst #7736 = VCVTTPD2QQZrrk |
| 39421 | { 7735, 3, 1, 0, 1860, 1, 0, 2808, X86ImpOpBase + 78, 0, 0x9e3d60022829ULL }, // Inst #7735 = VCVTTPD2QQZrrbkz |
| 39422 | { 7734, 4, 1, 0, 1860, 1, 0, 2804, X86ImpOpBase + 78, 0, 0x9a3d60022829ULL }, // Inst #7734 = VCVTTPD2QQZrrbk |
| 39423 | { 7733, 2, 1, 0, 1860, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x983d60022829ULL }, // Inst #7733 = VCVTTPD2QQZrrb |
| 39424 | { 7732, 2, 1, 0, 1263, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60022829ULL }, // Inst #7732 = VCVTTPD2QQZrr |
| 39425 | { 7731, 7, 1, 0, 1376, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60022819ULL }, // Inst #7731 = VCVTTPD2QQZrmkz |
| 39426 | { 7730, 8, 1, 0, 1376, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60022819ULL }, // Inst #7730 = VCVTTPD2QQZrmk |
| 39427 | { 7729, 7, 1, 0, 1376, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3d60022819ULL }, // Inst #7729 = VCVTTPD2QQZrmbkz |
| 39428 | { 7728, 8, 1, 0, 1376, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3d60022819ULL }, // Inst #7728 = VCVTTPD2QQZrmbk |
| 39429 | { 7727, 6, 1, 0, 1376, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983d60022819ULL }, // Inst #7727 = VCVTTPD2QQZrmb |
| 39430 | { 7726, 6, 1, 0, 1376, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60022819ULL }, // Inst #7726 = VCVTTPD2QQZrm |
| 39431 | { 7725, 3, 1, 0, 1260, 1, 0, 2786, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60022829ULL }, // Inst #7725 = VCVTTPD2QQZ256rrkz |
| 39432 | { 7724, 4, 1, 0, 1260, 1, 0, 2782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60022829ULL }, // Inst #7724 = VCVTTPD2QQZ256rrk |
| 39433 | { 7723, 2, 1, 0, 1260, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60022829ULL }, // Inst #7723 = VCVTTPD2QQZ256rr |
| 39434 | { 7722, 7, 1, 0, 1375, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60022819ULL }, // Inst #7722 = VCVTTPD2QQZ256rmkz |
| 39435 | { 7721, 8, 1, 0, 1375, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60022819ULL }, // Inst #7721 = VCVTTPD2QQZ256rmk |
| 39436 | { 7720, 7, 1, 0, 1375, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973d60022819ULL }, // Inst #7720 = VCVTTPD2QQZ256rmbkz |
| 39437 | { 7719, 8, 1, 0, 1375, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933d60022819ULL }, // Inst #7719 = VCVTTPD2QQZ256rmbk |
| 39438 | { 7718, 6, 1, 0, 1375, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913d60022819ULL }, // Inst #7718 = VCVTTPD2QQZ256rmb |
| 39439 | { 7717, 6, 1, 0, 1375, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60022819ULL }, // Inst #7717 = VCVTTPD2QQZ256rm |
| 39440 | { 7716, 3, 1, 0, 1259, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60022829ULL }, // Inst #7716 = VCVTTPD2QQZ128rrkz |
| 39441 | { 7715, 4, 1, 0, 1259, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60022829ULL }, // Inst #7715 = VCVTTPD2QQZ128rrk |
| 39442 | { 7714, 2, 1, 0, 1259, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60022829ULL }, // Inst #7714 = VCVTTPD2QQZ128rr |
| 39443 | { 7713, 7, 1, 0, 1359, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60022819ULL }, // Inst #7713 = VCVTTPD2QQZ128rmkz |
| 39444 | { 7712, 8, 1, 0, 1359, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60022819ULL }, // Inst #7712 = VCVTTPD2QQZ128rmk |
| 39445 | { 7711, 7, 1, 0, 1359, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963d60022819ULL }, // Inst #7711 = VCVTTPD2QQZ128rmbkz |
| 39446 | { 7710, 8, 1, 0, 1359, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923d60022819ULL }, // Inst #7710 = VCVTTPD2QQZ128rmbk |
| 39447 | { 7709, 6, 1, 0, 1359, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903d60022819ULL }, // Inst #7709 = VCVTTPD2QQZ128rmb |
| 39448 | { 7708, 6, 1, 0, 1359, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60022819ULL }, // Inst #7708 = VCVTTPD2QQZ128rm |
| 39449 | { 7707, 3, 1, 0, 400, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee36e0032829ULL }, // Inst #7707 = VCVTTPD2QQSZrrkz |
| 39450 | { 7706, 4, 1, 0, 400, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea36e0032829ULL }, // Inst #7706 = VCVTTPD2QQSZrrk |
| 39451 | { 7705, 3, 1, 0, 400, 1, 0, 2808, X86ImpOpBase + 78, 0, 0x9e36e0032829ULL }, // Inst #7705 = VCVTTPD2QQSZrrbkz |
| 39452 | { 7704, 4, 1, 0, 400, 1, 0, 2804, X86ImpOpBase + 78, 0, 0x9a36e0032829ULL }, // Inst #7704 = VCVTTPD2QQSZrrbk |
| 39453 | { 7703, 2, 1, 0, 400, 1, 0, 2802, X86ImpOpBase + 78, 0, 0x9836e0032829ULL }, // Inst #7703 = VCVTTPD2QQSZrrb |
| 39454 | { 7702, 2, 1, 0, 400, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe836e0032829ULL }, // Inst #7702 = VCVTTPD2QQSZrr |
| 39455 | { 7701, 7, 1, 0, 399, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee36e0032819ULL }, // Inst #7701 = VCVTTPD2QQSZrmkz |
| 39456 | { 7700, 8, 1, 0, 399, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea36e0032819ULL }, // Inst #7700 = VCVTTPD2QQSZrmk |
| 39457 | { 7699, 7, 1, 0, 399, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e36e0032819ULL }, // Inst #7699 = VCVTTPD2QQSZrmbkz |
| 39458 | { 7698, 8, 1, 0, 399, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a36e0032819ULL }, // Inst #7698 = VCVTTPD2QQSZrmbk |
| 39459 | { 7697, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9836e0032819ULL }, // Inst #7697 = VCVTTPD2QQSZrmb |
| 39460 | { 7696, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe836e0032819ULL }, // Inst #7696 = VCVTTPD2QQSZrm |
| 39461 | { 7695, 3, 1, 0, 398, 1, 0, 2786, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc736e0032829ULL }, // Inst #7695 = VCVTTPD2QQSZ256rrkz |
| 39462 | { 7694, 4, 1, 0, 398, 1, 0, 2782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc336e0032829ULL }, // Inst #7694 = VCVTTPD2QQSZ256rrk |
| 39463 | { 7693, 3, 1, 0, 398, 1, 0, 2786, X86ImpOpBase + 78, 0, 0x409736e0032829ULL }, // Inst #7693 = VCVTTPD2QQSZ256rrbkz |
| 39464 | { 7692, 4, 1, 0, 398, 1, 0, 2782, X86ImpOpBase + 78, 0, 0x409336e0032829ULL }, // Inst #7692 = VCVTTPD2QQSZ256rrbk |
| 39465 | { 7691, 2, 1, 0, 398, 1, 0, 2780, X86ImpOpBase + 78, 0, 0x409136e0032829ULL }, // Inst #7691 = VCVTTPD2QQSZ256rrb |
| 39466 | { 7690, 2, 1, 0, 398, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc136e0032829ULL }, // Inst #7690 = VCVTTPD2QQSZ256rr |
| 39467 | { 7689, 7, 1, 0, 397, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc736e0032819ULL }, // Inst #7689 = VCVTTPD2QQSZ256rmkz |
| 39468 | { 7688, 8, 1, 0, 397, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc336e0032819ULL }, // Inst #7688 = VCVTTPD2QQSZ256rmk |
| 39469 | { 7687, 7, 1, 0, 397, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9736e0032819ULL }, // Inst #7687 = VCVTTPD2QQSZ256rmbkz |
| 39470 | { 7686, 8, 1, 0, 397, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9336e0032819ULL }, // Inst #7686 = VCVTTPD2QQSZ256rmbk |
| 39471 | { 7685, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9136e0032819ULL }, // Inst #7685 = VCVTTPD2QQSZ256rmb |
| 39472 | { 7684, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc136e0032819ULL }, // Inst #7684 = VCVTTPD2QQSZ256rm |
| 39473 | { 7683, 3, 1, 0, 95, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa636e0032829ULL }, // Inst #7683 = VCVTTPD2QQSZ128rrkz |
| 39474 | { 7682, 4, 1, 0, 95, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa236e0032829ULL }, // Inst #7682 = VCVTTPD2QQSZ128rrk |
| 39475 | { 7681, 2, 1, 0, 95, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa036e0032829ULL }, // Inst #7681 = VCVTTPD2QQSZ128rr |
| 39476 | { 7680, 7, 1, 0, 94, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa636e0032819ULL }, // Inst #7680 = VCVTTPD2QQSZ128rmkz |
| 39477 | { 7679, 8, 1, 0, 94, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa236e0032819ULL }, // Inst #7679 = VCVTTPD2QQSZ128rmk |
| 39478 | { 7678, 7, 1, 0, 94, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9636e0032819ULL }, // Inst #7678 = VCVTTPD2QQSZ128rmbkz |
| 39479 | { 7677, 8, 1, 0, 94, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9236e0032819ULL }, // Inst #7677 = VCVTTPD2QQSZ128rmbk |
| 39480 | { 7676, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9036e0032819ULL }, // Inst #7676 = VCVTTPD2QQSZ128rmb |
| 39481 | { 7675, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa036e0032819ULL }, // Inst #7675 = VCVTTPD2QQSZ128rm |
| 39482 | { 7674, 2, 1, 0, 971, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x7330002829ULL }, // Inst #7674 = VCVTTPD2DQrr |
| 39483 | { 7673, 6, 1, 0, 972, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7330002819ULL }, // Inst #7673 = VCVTTPD2DQrm |
| 39484 | { 7672, 3, 1, 0, 400, 1, 0, 3166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee7360022829ULL }, // Inst #7672 = VCVTTPD2DQZrrkz |
| 39485 | { 7671, 4, 1, 0, 400, 1, 0, 3162, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea7360022829ULL }, // Inst #7671 = VCVTTPD2DQZrrk |
| 39486 | { 7670, 3, 1, 0, 400, 1, 0, 3166, X86ImpOpBase + 78, 0, 0x9e7360022829ULL }, // Inst #7670 = VCVTTPD2DQZrrbkz |
| 39487 | { 7669, 4, 1, 0, 400, 1, 0, 3162, X86ImpOpBase + 78, 0, 0x9a7360022829ULL }, // Inst #7669 = VCVTTPD2DQZrrbk |
| 39488 | { 7668, 2, 1, 0, 400, 1, 0, 3095, X86ImpOpBase + 78, 0, 0x987360022829ULL }, // Inst #7668 = VCVTTPD2DQZrrb |
| 39489 | { 7667, 2, 1, 0, 1295, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe87360022829ULL }, // Inst #7667 = VCVTTPD2DQZrr |
| 39490 | { 7666, 7, 1, 0, 1393, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee7360022819ULL }, // Inst #7666 = VCVTTPD2DQZrmkz |
| 39491 | { 7665, 8, 1, 0, 1393, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea7360022819ULL }, // Inst #7665 = VCVTTPD2DQZrmk |
| 39492 | { 7664, 7, 1, 0, 1393, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e7360022819ULL }, // Inst #7664 = VCVTTPD2DQZrmbkz |
| 39493 | { 7663, 8, 1, 0, 1393, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a7360022819ULL }, // Inst #7663 = VCVTTPD2DQZrmbk |
| 39494 | { 7662, 6, 1, 0, 1393, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x987360022819ULL }, // Inst #7662 = VCVTTPD2DQZrmb |
| 39495 | { 7661, 6, 1, 0, 1393, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe87360022819ULL }, // Inst #7661 = VCVTTPD2DQZrm |
| 39496 | { 7660, 3, 1, 0, 1290, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc77360022829ULL }, // Inst #7660 = VCVTTPD2DQZ256rrkz |
| 39497 | { 7659, 4, 1, 0, 1290, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc37360022829ULL }, // Inst #7659 = VCVTTPD2DQZ256rrk |
| 39498 | { 7658, 2, 1, 0, 1290, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc17360022829ULL }, // Inst #7658 = VCVTTPD2DQZ256rr |
| 39499 | { 7657, 7, 1, 0, 2025, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc77360022819ULL }, // Inst #7657 = VCVTTPD2DQZ256rmkz |
| 39500 | { 7656, 8, 1, 0, 2025, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc37360022819ULL }, // Inst #7656 = VCVTTPD2DQZ256rmk |
| 39501 | { 7655, 7, 1, 0, 2025, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x977360022819ULL }, // Inst #7655 = VCVTTPD2DQZ256rmbkz |
| 39502 | { 7654, 8, 1, 0, 2025, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x937360022819ULL }, // Inst #7654 = VCVTTPD2DQZ256rmbk |
| 39503 | { 7653, 6, 1, 0, 2025, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x917360022819ULL }, // Inst #7653 = VCVTTPD2DQZ256rmb |
| 39504 | { 7652, 6, 1, 0, 2025, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc17360022819ULL }, // Inst #7652 = VCVTTPD2DQZ256rm |
| 39505 | { 7651, 3, 1, 0, 1270, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa67360022829ULL }, // Inst #7651 = VCVTTPD2DQZ128rrkz |
| 39506 | { 7650, 4, 1, 0, 1270, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa27360022829ULL }, // Inst #7650 = VCVTTPD2DQZ128rrk |
| 39507 | { 7649, 2, 1, 0, 1270, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa07360022829ULL }, // Inst #7649 = VCVTTPD2DQZ128rr |
| 39508 | { 7648, 7, 1, 0, 1739, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa67360022819ULL }, // Inst #7648 = VCVTTPD2DQZ128rmkz |
| 39509 | { 7647, 8, 1, 0, 1739, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa27360022819ULL }, // Inst #7647 = VCVTTPD2DQZ128rmk |
| 39510 | { 7646, 7, 1, 0, 1739, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x967360022819ULL }, // Inst #7646 = VCVTTPD2DQZ128rmbkz |
| 39511 | { 7645, 8, 1, 0, 1739, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x927360022819ULL }, // Inst #7645 = VCVTTPD2DQZ128rmbk |
| 39512 | { 7644, 6, 1, 0, 1739, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x907360022819ULL }, // Inst #7644 = VCVTTPD2DQZ128rmb |
| 39513 | { 7643, 6, 1, 0, 1739, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa07360022819ULL }, // Inst #7643 = VCVTTPD2DQZ128rm |
| 39514 | { 7642, 2, 1, 0, 973, 1, 0, 3144, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x17330002829ULL }, // Inst #7642 = VCVTTPD2DQYrr |
| 39515 | { 7641, 6, 1, 0, 974, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17330002819ULL }, // Inst #7641 = VCVTTPD2DQYrm |
| 39516 | { 7640, 3, 1, 0, 400, 1, 0, 3166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee36e0032029ULL }, // Inst #7640 = VCVTTPD2DQSZrrkz |
| 39517 | { 7639, 4, 1, 0, 400, 1, 0, 3162, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea36e0032029ULL }, // Inst #7639 = VCVTTPD2DQSZrrk |
| 39518 | { 7638, 3, 1, 0, 400, 1, 0, 3166, X86ImpOpBase + 78, 0, 0x9e36e0032029ULL }, // Inst #7638 = VCVTTPD2DQSZrrbkz |
| 39519 | { 7637, 4, 1, 0, 400, 1, 0, 3162, X86ImpOpBase + 78, 0, 0x9a36e0032029ULL }, // Inst #7637 = VCVTTPD2DQSZrrbk |
| 39520 | { 7636, 2, 1, 0, 400, 1, 0, 3095, X86ImpOpBase + 78, 0, 0x9836e0032029ULL }, // Inst #7636 = VCVTTPD2DQSZrrb |
| 39521 | { 7635, 2, 1, 0, 400, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe836e0032029ULL }, // Inst #7635 = VCVTTPD2DQSZrr |
| 39522 | { 7634, 7, 1, 0, 399, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee36e0032019ULL }, // Inst #7634 = VCVTTPD2DQSZrmkz |
| 39523 | { 7633, 8, 1, 0, 399, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea36e0032019ULL }, // Inst #7633 = VCVTTPD2DQSZrmk |
| 39524 | { 7632, 7, 1, 0, 399, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e36e0032019ULL }, // Inst #7632 = VCVTTPD2DQSZrmbkz |
| 39525 | { 7631, 8, 1, 0, 399, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a36e0032019ULL }, // Inst #7631 = VCVTTPD2DQSZrmbk |
| 39526 | { 7630, 6, 1, 0, 399, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9836e0032019ULL }, // Inst #7630 = VCVTTPD2DQSZrmb |
| 39527 | { 7629, 6, 1, 0, 399, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe836e0032019ULL }, // Inst #7629 = VCVTTPD2DQSZrm |
| 39528 | { 7628, 3, 1, 0, 398, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc736e0032029ULL }, // Inst #7628 = VCVTTPD2DQSZ256rrkz |
| 39529 | { 7627, 4, 1, 0, 398, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc336e0032029ULL }, // Inst #7627 = VCVTTPD2DQSZ256rrk |
| 39530 | { 7626, 3, 1, 0, 398, 1, 0, 3150, X86ImpOpBase + 78, 0, 0x409736e0032029ULL }, // Inst #7626 = VCVTTPD2DQSZ256rrbkz |
| 39531 | { 7625, 4, 1, 0, 398, 1, 0, 3146, X86ImpOpBase + 78, 0, 0x409336e0032029ULL }, // Inst #7625 = VCVTTPD2DQSZ256rrbk |
| 39532 | { 7624, 2, 1, 0, 398, 1, 0, 3086, X86ImpOpBase + 78, 0, 0x409136e0032029ULL }, // Inst #7624 = VCVTTPD2DQSZ256rrb |
| 39533 | { 7623, 2, 1, 0, 398, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc136e0032029ULL }, // Inst #7623 = VCVTTPD2DQSZ256rr |
| 39534 | { 7622, 7, 1, 0, 397, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc736e0032019ULL }, // Inst #7622 = VCVTTPD2DQSZ256rmkz |
| 39535 | { 7621, 8, 1, 0, 397, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc336e0032019ULL }, // Inst #7621 = VCVTTPD2DQSZ256rmk |
| 39536 | { 7620, 7, 1, 0, 397, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9736e0032019ULL }, // Inst #7620 = VCVTTPD2DQSZ256rmbkz |
| 39537 | { 7619, 8, 1, 0, 397, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9336e0032019ULL }, // Inst #7619 = VCVTTPD2DQSZ256rmbk |
| 39538 | { 7618, 6, 1, 0, 397, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9136e0032019ULL }, // Inst #7618 = VCVTTPD2DQSZ256rmb |
| 39539 | { 7617, 6, 1, 0, 397, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc136e0032019ULL }, // Inst #7617 = VCVTTPD2DQSZ256rm |
| 39540 | { 7616, 3, 1, 0, 95, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa636e0032029ULL }, // Inst #7616 = VCVTTPD2DQSZ128rrkz |
| 39541 | { 7615, 4, 1, 0, 95, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa236e0032029ULL }, // Inst #7615 = VCVTTPD2DQSZ128rrk |
| 39542 | { 7614, 2, 1, 0, 95, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa036e0032029ULL }, // Inst #7614 = VCVTTPD2DQSZ128rr |
| 39543 | { 7613, 7, 1, 0, 94, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa636e0032019ULL }, // Inst #7613 = VCVTTPD2DQSZ128rmkz |
| 39544 | { 7612, 8, 1, 0, 94, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa236e0032019ULL }, // Inst #7612 = VCVTTPD2DQSZ128rmk |
| 39545 | { 7611, 7, 1, 0, 94, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9636e0032019ULL }, // Inst #7611 = VCVTTPD2DQSZ128rmbkz |
| 39546 | { 7610, 8, 1, 0, 94, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9236e0032019ULL }, // Inst #7610 = VCVTTPD2DQSZ128rmbk |
| 39547 | { 7609, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9036e0032019ULL }, // Inst #7609 = VCVTTPD2DQSZ128rmb |
| 39548 | { 7608, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa036e0032019ULL }, // Inst #7608 = VCVTTPD2DQSZ128rm |
| 39549 | { 7607, 3, 1, 0, 384, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee3578053829ULL }, // Inst #7607 = VCVTTBF162IUBSZrrkz |
| 39550 | { 7606, 4, 1, 0, 384, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea3578053829ULL }, // Inst #7606 = VCVTTBF162IUBSZrrk |
| 39551 | { 7605, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe83578053829ULL }, // Inst #7605 = VCVTTBF162IUBSZrr |
| 39552 | { 7604, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3578053819ULL }, // Inst #7604 = VCVTTBF162IUBSZrmkz |
| 39553 | { 7603, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3578053819ULL }, // Inst #7603 = VCVTTBF162IUBSZrmk |
| 39554 | { 7602, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e3578053819ULL }, // Inst #7602 = VCVTTBF162IUBSZrmbkz |
| 39555 | { 7601, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a3578053819ULL }, // Inst #7601 = VCVTTBF162IUBSZrmbk |
| 39556 | { 7600, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x583578053819ULL }, // Inst #7600 = VCVTTBF162IUBSZrmb |
| 39557 | { 7599, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83578053819ULL }, // Inst #7599 = VCVTTBF162IUBSZrm |
| 39558 | { 7598, 3, 1, 0, 382, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc73578053829ULL }, // Inst #7598 = VCVTTBF162IUBSZ256rrkz |
| 39559 | { 7597, 4, 1, 0, 382, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc33578053829ULL }, // Inst #7597 = VCVTTBF162IUBSZ256rrk |
| 39560 | { 7596, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc13578053829ULL }, // Inst #7596 = VCVTTBF162IUBSZ256rr |
| 39561 | { 7595, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73578053819ULL }, // Inst #7595 = VCVTTBF162IUBSZ256rmkz |
| 39562 | { 7594, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33578053819ULL }, // Inst #7594 = VCVTTBF162IUBSZ256rmk |
| 39563 | { 7593, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x573578053819ULL }, // Inst #7593 = VCVTTBF162IUBSZ256rmbkz |
| 39564 | { 7592, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x533578053819ULL }, // Inst #7592 = VCVTTBF162IUBSZ256rmbk |
| 39565 | { 7591, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x513578053819ULL }, // Inst #7591 = VCVTTBF162IUBSZ256rmb |
| 39566 | { 7590, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13578053819ULL }, // Inst #7590 = VCVTTBF162IUBSZ256rm |
| 39567 | { 7589, 3, 1, 0, 149, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa63578053829ULL }, // Inst #7589 = VCVTTBF162IUBSZ128rrkz |
| 39568 | { 7588, 4, 1, 0, 149, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa23578053829ULL }, // Inst #7588 = VCVTTBF162IUBSZ128rrk |
| 39569 | { 7587, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03578053829ULL }, // Inst #7587 = VCVTTBF162IUBSZ128rr |
| 39570 | { 7586, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63578053819ULL }, // Inst #7586 = VCVTTBF162IUBSZ128rmkz |
| 39571 | { 7585, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23578053819ULL }, // Inst #7585 = VCVTTBF162IUBSZ128rmk |
| 39572 | { 7584, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x563578053819ULL }, // Inst #7584 = VCVTTBF162IUBSZ128rmbkz |
| 39573 | { 7583, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x523578053819ULL }, // Inst #7583 = VCVTTBF162IUBSZ128rmbk |
| 39574 | { 7582, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x503578053819ULL }, // Inst #7582 = VCVTTBF162IUBSZ128rmb |
| 39575 | { 7581, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03578053819ULL }, // Inst #7581 = VCVTTBF162IUBSZ128rm |
| 39576 | { 7580, 3, 1, 0, 384, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee3478053829ULL }, // Inst #7580 = VCVTTBF162IBSZrrkz |
| 39577 | { 7579, 4, 1, 0, 384, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea3478053829ULL }, // Inst #7579 = VCVTTBF162IBSZrrk |
| 39578 | { 7578, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe83478053829ULL }, // Inst #7578 = VCVTTBF162IBSZrr |
| 39579 | { 7577, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3478053819ULL }, // Inst #7577 = VCVTTBF162IBSZrmkz |
| 39580 | { 7576, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3478053819ULL }, // Inst #7576 = VCVTTBF162IBSZrmk |
| 39581 | { 7575, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e3478053819ULL }, // Inst #7575 = VCVTTBF162IBSZrmbkz |
| 39582 | { 7574, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a3478053819ULL }, // Inst #7574 = VCVTTBF162IBSZrmbk |
| 39583 | { 7573, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x583478053819ULL }, // Inst #7573 = VCVTTBF162IBSZrmb |
| 39584 | { 7572, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83478053819ULL }, // Inst #7572 = VCVTTBF162IBSZrm |
| 39585 | { 7571, 3, 1, 0, 382, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc73478053829ULL }, // Inst #7571 = VCVTTBF162IBSZ256rrkz |
| 39586 | { 7570, 4, 1, 0, 382, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc33478053829ULL }, // Inst #7570 = VCVTTBF162IBSZ256rrk |
| 39587 | { 7569, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc13478053829ULL }, // Inst #7569 = VCVTTBF162IBSZ256rr |
| 39588 | { 7568, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73478053819ULL }, // Inst #7568 = VCVTTBF162IBSZ256rmkz |
| 39589 | { 7567, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33478053819ULL }, // Inst #7567 = VCVTTBF162IBSZ256rmk |
| 39590 | { 7566, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x573478053819ULL }, // Inst #7566 = VCVTTBF162IBSZ256rmbkz |
| 39591 | { 7565, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x533478053819ULL }, // Inst #7565 = VCVTTBF162IBSZ256rmbk |
| 39592 | { 7564, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x513478053819ULL }, // Inst #7564 = VCVTTBF162IBSZ256rmb |
| 39593 | { 7563, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13478053819ULL }, // Inst #7563 = VCVTTBF162IBSZ256rm |
| 39594 | { 7562, 3, 1, 0, 149, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa63478053829ULL }, // Inst #7562 = VCVTTBF162IBSZ128rrkz |
| 39595 | { 7561, 4, 1, 0, 149, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa23478053829ULL }, // Inst #7561 = VCVTTBF162IBSZ128rrk |
| 39596 | { 7560, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03478053829ULL }, // Inst #7560 = VCVTTBF162IBSZ128rr |
| 39597 | { 7559, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63478053819ULL }, // Inst #7559 = VCVTTBF162IBSZ128rmkz |
| 39598 | { 7558, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23478053819ULL }, // Inst #7558 = VCVTTBF162IBSZ128rmk |
| 39599 | { 7557, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x563478053819ULL }, // Inst #7557 = VCVTTBF162IBSZ128rmbkz |
| 39600 | { 7556, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x523478053819ULL }, // Inst #7556 = VCVTTBF162IBSZ128rmbk |
| 39601 | { 7555, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x503478053819ULL }, // Inst #7555 = VCVTTBF162IBSZ128rmb |
| 39602 | { 7554, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03478053819ULL }, // Inst #7554 = VCVTTBF162IBSZ128rm |
| 39603 | { 7553, 3, 1, 0, 119, 1, 0, 3397, X86ImpOpBase + 78, 0, 0x1703ce8003029ULL }, // Inst #7553 = VCVTSS2USIZrrb_Int |
| 39604 | { 7552, 2, 1, 0, 119, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603ce8003029ULL }, // Inst #7552 = VCVTSS2USIZrr_Int |
| 39605 | { 7551, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603ce8003019ULL }, // Inst #7551 = VCVTSS2USIZrm_Int |
| 39606 | { 7550, 3, 1, 0, 1746, 1, 0, 3390, X86ImpOpBase + 78, 0, 0x1703ce8023029ULL }, // Inst #7550 = VCVTSS2USI64Zrrb_Int |
| 39607 | { 7549, 2, 1, 0, 1746, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603ce8023029ULL }, // Inst #7549 = VCVTSS2USI64Zrr_Int |
| 39608 | { 7548, 6, 1, 0, 1388, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603ce8023019ULL }, // Inst #7548 = VCVTSS2USI64Zrm_Int |
| 39609 | { 7547, 2, 1, 0, 978, 1, 0, 1025, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x16a8003029ULL }, // Inst #7547 = VCVTSS2SIrr_Int |
| 39610 | { 7546, 2, 1, 0, 977, 1, 0, 1047, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x16a8003029ULL }, // Inst #7546 = VCVTSS2SIrr |
| 39611 | { 7545, 6, 1, 0, 979, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16a8003019ULL }, // Inst #7545 = VCVTSS2SIrm_Int |
| 39612 | { 7544, 6, 1, 0, 979, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16a8003019ULL }, // Inst #7544 = VCVTSS2SIrm |
| 39613 | { 7543, 3, 1, 0, 119, 1, 0, 3397, X86ImpOpBase + 78, 0, 0x17016e8003029ULL }, // Inst #7543 = VCVTSS2SIZrrb_Int |
| 39614 | { 7542, 2, 1, 0, 119, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6016e8003029ULL }, // Inst #7542 = VCVTSS2SIZrr_Int |
| 39615 | { 7541, 2, 1, 0, 119, 1, 0, 3473, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6016e8003029ULL }, // Inst #7541 = VCVTSS2SIZrr |
| 39616 | { 7540, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6016e8003019ULL }, // Inst #7540 = VCVTSS2SIZrm_Int |
| 39617 | { 7539, 6, 1, 0, 418, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6016e8003019ULL }, // Inst #7539 = VCVTSS2SIZrm |
| 39618 | { 7538, 2, 1, 0, 1218, 1, 0, 1021, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x16a8023029ULL }, // Inst #7538 = VCVTSS2SI64rr_Int |
| 39619 | { 7537, 2, 1, 0, 1217, 1, 0, 1045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x16a8023029ULL }, // Inst #7537 = VCVTSS2SI64rr |
| 39620 | { 7536, 6, 1, 0, 979, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16a8023019ULL }, // Inst #7536 = VCVTSS2SI64rm_Int |
| 39621 | { 7535, 6, 1, 0, 979, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16a8023019ULL }, // Inst #7535 = VCVTSS2SI64rm |
| 39622 | { 7534, 3, 1, 0, 1746, 1, 0, 3390, X86ImpOpBase + 78, 0, 0x17016e8023029ULL }, // Inst #7534 = VCVTSS2SI64Zrrb_Int |
| 39623 | { 7533, 2, 1, 0, 1746, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6016e8023029ULL }, // Inst #7533 = VCVTSS2SI64Zrr_Int |
| 39624 | { 7532, 2, 1, 0, 1746, 1, 0, 3471, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6016e8023029ULL }, // Inst #7532 = VCVTSS2SI64Zrr |
| 39625 | { 7531, 6, 1, 0, 418, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6016e8023019ULL }, // Inst #7531 = VCVTSS2SI64Zrm_Int |
| 39626 | { 7530, 6, 1, 0, 418, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6016e8023019ULL }, // Inst #7530 = VCVTSS2SI64Zrm |
| 39627 | { 7529, 4, 1, 0, 2156, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x668ee8012029ULL }, // Inst #7529 = VCVTSS2SHZrrkz_Int |
| 39628 | { 7528, 5, 1, 0, 2156, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x628ee8012029ULL }, // Inst #7528 = VCVTSS2SHZrrk_Int |
| 39629 | { 7527, 5, 1, 0, 2156, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x1768ee8012029ULL }, // Inst #7527 = VCVTSS2SHZrrbkz_Int |
| 39630 | { 7526, 6, 1, 0, 2156, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x1728ee8012029ULL }, // Inst #7526 = VCVTSS2SHZrrbk_Int |
| 39631 | { 7525, 4, 1, 0, 2154, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x1708ee8012029ULL }, // Inst #7525 = VCVTSS2SHZrrb_Int |
| 39632 | { 7524, 3, 1, 0, 2154, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x608ee8012029ULL }, // Inst #7524 = VCVTSS2SHZrr_Int |
| 39633 | { 7523, 3, 1, 0, 2155, 1, 0, 3468, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x608ee8012029ULL }, // Inst #7523 = VCVTSS2SHZrr |
| 39634 | { 7522, 8, 1, 0, 2153, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x668ee8012019ULL }, // Inst #7522 = VCVTSS2SHZrmkz_Int |
| 39635 | { 7521, 9, 1, 0, 2153, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x628ee8012019ULL }, // Inst #7521 = VCVTSS2SHZrmk_Int |
| 39636 | { 7520, 7, 1, 0, 2152, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x608ee8012019ULL }, // Inst #7520 = VCVTSS2SHZrm_Int |
| 39637 | { 7519, 7, 1, 0, 2152, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x608ee8012019ULL }, // Inst #7519 = VCVTSS2SHZrm |
| 39638 | { 7518, 3, 1, 0, 1276, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xad28003029ULL }, // Inst #7518 = VCVTSS2SDrr_Int |
| 39639 | { 7517, 3, 1, 0, 1276, 1, 0, 3465, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xad28003029ULL }, // Inst #7517 = VCVTSS2SDrr |
| 39640 | { 7516, 7, 1, 0, 1363, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xad28003019ULL }, // Inst #7516 = VCVTSS2SDrm_Int |
| 39641 | { 7515, 7, 1, 0, 1363, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xad28003019ULL }, // Inst #7515 = VCVTSS2SDrm |
| 39642 | { 7514, 4, 1, 0, 1276, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66ad68003029ULL }, // Inst #7514 = VCVTSS2SDZrrkz_Int |
| 39643 | { 7513, 5, 1, 0, 1276, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62ad68003029ULL }, // Inst #7513 = VCVTSS2SDZrrk_Int |
| 39644 | { 7512, 4, 1, 0, 1276, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x76ad68003029ULL }, // Inst #7512 = VCVTSS2SDZrrbkz_Int |
| 39645 | { 7511, 5, 1, 0, 1276, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x72ad68003029ULL }, // Inst #7511 = VCVTSS2SDZrrbk_Int |
| 39646 | { 7510, 3, 1, 0, 1276, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x70ad68003029ULL }, // Inst #7510 = VCVTSS2SDZrrb_Int |
| 39647 | { 7509, 3, 1, 0, 1276, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ad68003029ULL }, // Inst #7509 = VCVTSS2SDZrr_Int |
| 39648 | { 7508, 3, 1, 0, 1276, 1, 0, 3462, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ad68003029ULL }, // Inst #7508 = VCVTSS2SDZrr |
| 39649 | { 7507, 8, 1, 0, 1363, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66ad68003019ULL }, // Inst #7507 = VCVTSS2SDZrmkz_Int |
| 39650 | { 7506, 9, 1, 0, 1363, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62ad68003019ULL }, // Inst #7506 = VCVTSS2SDZrmk_Int |
| 39651 | { 7505, 7, 1, 0, 1363, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ad68003019ULL }, // Inst #7505 = VCVTSS2SDZrm_Int |
| 39652 | { 7504, 7, 1, 0, 1363, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ad68003019ULL }, // Inst #7504 = VCVTSS2SDZrm |
| 39653 | { 7503, 3, 1, 0, 1493, 1, 0, 3450, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x9528023029ULL }, // Inst #7503 = VCVTSI642SSrr_Int |
| 39654 | { 7502, 3, 1, 0, 872, 1, 0, 3459, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x9528023029ULL }, // Inst #7502 = VCVTSI642SSrr |
| 39655 | { 7501, 7, 1, 0, 1491, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9528023019ULL }, // Inst #7501 = VCVTSI642SSrm_Int |
| 39656 | { 7500, 7, 1, 0, 1492, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9528023019ULL }, // Inst #7500 = VCVTSI642SSrm |
| 39657 | { 7499, 4, 1, 0, 1287, 1, 0, 3443, X86ImpOpBase + 78, 0, 0x1909568023029ULL }, // Inst #7499 = VCVTSI642SSZrrb_Int |
| 39658 | { 7498, 3, 1, 0, 1287, 1, 0, 3440, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x809568023029ULL }, // Inst #7498 = VCVTSI642SSZrr_Int |
| 39659 | { 7497, 3, 1, 0, 1287, 1, 0, 3456, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x809568023029ULL }, // Inst #7497 = VCVTSI642SSZrr |
| 39660 | { 7496, 7, 1, 0, 1742, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809568023019ULL }, // Inst #7496 = VCVTSI642SSZrm_Int |
| 39661 | { 7495, 7, 1, 0, 1742, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809568023019ULL }, // Inst #7495 = VCVTSI642SSZrm |
| 39662 | { 7494, 4, 1, 0, 114, 1, 0, 3443, X86ImpOpBase + 78, 0, 0x1909568033029ULL }, // Inst #7494 = VCVTSI642SHZrrb_Int |
| 39663 | { 7493, 3, 1, 0, 114, 1, 0, 3440, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x809568033029ULL }, // Inst #7493 = VCVTSI642SHZrr_Int |
| 39664 | { 7492, 3, 1, 0, 114, 1, 0, 3453, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x809568033029ULL }, // Inst #7492 = VCVTSI642SHZrr |
| 39665 | { 7491, 7, 1, 0, 2151, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809568033019ULL }, // Inst #7491 = VCVTSI642SHZrm_Int |
| 39666 | { 7490, 7, 1, 0, 2151, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809568033019ULL }, // Inst #7490 = VCVTSI642SHZrm |
| 39667 | { 7489, 3, 1, 0, 981, 1, 0, 3450, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x9530023829ULL }, // Inst #7489 = VCVTSI642SDrr_Int |
| 39668 | { 7488, 3, 1, 0, 981, 1, 0, 3447, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x9530023829ULL }, // Inst #7488 = VCVTSI642SDrr |
| 39669 | { 7487, 7, 1, 0, 108, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9530023819ULL }, // Inst #7487 = VCVTSI642SDrm_Int |
| 39670 | { 7486, 7, 1, 0, 108, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9530023819ULL }, // Inst #7486 = VCVTSI642SDrm |
| 39671 | { 7485, 4, 1, 0, 1275, 1, 0, 3443, X86ImpOpBase + 78, 0, 0x1909570023829ULL }, // Inst #7485 = VCVTSI642SDZrrb_Int |
| 39672 | { 7484, 3, 1, 0, 1275, 1, 0, 3440, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x809570023829ULL }, // Inst #7484 = VCVTSI642SDZrr_Int |
| 39673 | { 7483, 3, 1, 0, 1275, 1, 0, 3437, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x809570023829ULL }, // Inst #7483 = VCVTSI642SDZrr |
| 39674 | { 7482, 7, 1, 0, 108, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809570023819ULL }, // Inst #7482 = VCVTSI642SDZrm_Int |
| 39675 | { 7481, 7, 1, 0, 108, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809570023819ULL }, // Inst #7481 = VCVTSI642SDZrm |
| 39676 | { 7480, 3, 1, 0, 1745, 1, 0, 3421, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x9528003029ULL }, // Inst #7480 = VCVTSI2SSrr_Int |
| 39677 | { 7479, 3, 1, 0, 1274, 1, 0, 3434, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x9528003029ULL }, // Inst #7479 = VCVTSI2SSrr |
| 39678 | { 7478, 7, 1, 0, 112, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9528003019ULL }, // Inst #7478 = VCVTSI2SSrm_Int |
| 39679 | { 7477, 7, 1, 0, 112, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9528003019ULL }, // Inst #7477 = VCVTSI2SSrm |
| 39680 | { 7476, 4, 1, 0, 1745, 1, 0, 3427, X86ImpOpBase + 78, 0, 0x1709568003029ULL }, // Inst #7476 = VCVTSI2SSZrrb_Int |
| 39681 | { 7475, 3, 1, 0, 1745, 1, 0, 3415, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x609568003029ULL }, // Inst #7475 = VCVTSI2SSZrr_Int |
| 39682 | { 7474, 3, 1, 0, 1745, 1, 0, 3431, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x609568003029ULL }, // Inst #7474 = VCVTSI2SSZrr |
| 39683 | { 7473, 7, 1, 0, 112, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x609568003019ULL }, // Inst #7473 = VCVTSI2SSZrm_Int |
| 39684 | { 7472, 7, 1, 0, 112, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x609568003019ULL }, // Inst #7472 = VCVTSI2SSZrm |
| 39685 | { 7471, 4, 1, 0, 114, 1, 0, 3427, X86ImpOpBase + 78, 0, 0x1709568013029ULL }, // Inst #7471 = VCVTSI2SHZrrb_Int |
| 39686 | { 7470, 3, 1, 0, 114, 1, 0, 3415, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x609568013029ULL }, // Inst #7470 = VCVTSI2SHZrr_Int |
| 39687 | { 7469, 3, 1, 0, 114, 1, 0, 3424, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x609568013029ULL }, // Inst #7469 = VCVTSI2SHZrr |
| 39688 | { 7468, 7, 1, 0, 2151, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x609568013019ULL }, // Inst #7468 = VCVTSI2SHZrm_Int |
| 39689 | { 7467, 7, 1, 0, 2151, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x609568013019ULL }, // Inst #7467 = VCVTSI2SHZrm |
| 39690 | { 7466, 3, 1, 0, 981, 0, 0, 3421, X86ImpOpBase + 0, 0, 0x9530003829ULL }, // Inst #7466 = VCVTSI2SDrr_Int |
| 39691 | { 7465, 3, 1, 0, 981, 0, 0, 3418, X86ImpOpBase + 0, 0, 0x9530003829ULL }, // Inst #7465 = VCVTSI2SDrr |
| 39692 | { 7464, 7, 1, 0, 108, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9530003819ULL }, // Inst #7464 = VCVTSI2SDrm_Int |
| 39693 | { 7463, 7, 1, 0, 108, 0, 0, 2009, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9530003819ULL }, // Inst #7463 = VCVTSI2SDrm |
| 39694 | { 7462, 3, 1, 0, 1275, 0, 0, 3415, X86ImpOpBase + 0, 0, 0x609570003829ULL }, // Inst #7462 = VCVTSI2SDZrr_Int |
| 39695 | { 7461, 3, 1, 0, 1275, 0, 0, 3412, X86ImpOpBase + 0, 0, 0x609570003829ULL }, // Inst #7461 = VCVTSI2SDZrr |
| 39696 | { 7460, 7, 1, 0, 108, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x609570003819ULL }, // Inst #7460 = VCVTSI2SDZrm_Int |
| 39697 | { 7459, 7, 1, 0, 108, 0, 0, 1967, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x609570003819ULL }, // Inst #7459 = VCVTSI2SDZrm |
| 39698 | { 7458, 3, 1, 0, 2149, 1, 0, 3397, X86ImpOpBase + 78, 0, 0x1503ce8013029ULL }, // Inst #7458 = VCVTSH2USIZrrb_Int |
| 39699 | { 7457, 2, 1, 0, 2149, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x403ce8013029ULL }, // Inst #7457 = VCVTSH2USIZrr_Int |
| 39700 | { 7456, 6, 1, 0, 2148, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403ce8013019ULL }, // Inst #7456 = VCVTSH2USIZrm_Int |
| 39701 | { 7455, 3, 1, 0, 2149, 1, 0, 3390, X86ImpOpBase + 78, 0, 0x1503ce8033029ULL }, // Inst #7455 = VCVTSH2USI64Zrrb_Int |
| 39702 | { 7454, 2, 1, 0, 2149, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x403ce8033029ULL }, // Inst #7454 = VCVTSH2USI64Zrr_Int |
| 39703 | { 7453, 6, 1, 0, 2148, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403ce8033019ULL }, // Inst #7453 = VCVTSH2USI64Zrm_Int |
| 39704 | { 7452, 4, 1, 0, 2150, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4689e8014029ULL }, // Inst #7452 = VCVTSH2SSZrrkz_Int |
| 39705 | { 7451, 5, 1, 0, 2150, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4289e8014029ULL }, // Inst #7451 = VCVTSH2SSZrrk_Int |
| 39706 | { 7450, 4, 1, 0, 2150, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x5689e8014029ULL }, // Inst #7450 = VCVTSH2SSZrrbkz_Int |
| 39707 | { 7449, 5, 1, 0, 2150, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x5289e8014029ULL }, // Inst #7449 = VCVTSH2SSZrrbk_Int |
| 39708 | { 7448, 3, 1, 0, 1778, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x5089e8014029ULL }, // Inst #7448 = VCVTSH2SSZrrb_Int |
| 39709 | { 7447, 3, 1, 0, 1778, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4089e8014029ULL }, // Inst #7447 = VCVTSH2SSZrr_Int |
| 39710 | { 7446, 3, 1, 0, 1792, 1, 0, 3409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4089e8014029ULL }, // Inst #7446 = VCVTSH2SSZrr |
| 39711 | { 7445, 8, 1, 0, 2111, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4689e8014019ULL }, // Inst #7445 = VCVTSH2SSZrmkz_Int |
| 39712 | { 7444, 9, 1, 0, 2111, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4289e8014019ULL }, // Inst #7444 = VCVTSH2SSZrmk_Int |
| 39713 | { 7443, 7, 1, 0, 1765, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4089e8014019ULL }, // Inst #7443 = VCVTSH2SSZrm_Int |
| 39714 | { 7442, 7, 1, 0, 1765, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4089e8014019ULL }, // Inst #7442 = VCVTSH2SSZrm |
| 39715 | { 7441, 3, 1, 0, 2149, 1, 0, 3397, X86ImpOpBase + 78, 0, 0x15016e8013029ULL }, // Inst #7441 = VCVTSH2SIZrrb_Int |
| 39716 | { 7440, 2, 1, 0, 2149, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4016e8013029ULL }, // Inst #7440 = VCVTSH2SIZrr_Int |
| 39717 | { 7439, 6, 1, 0, 2148, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4016e8013019ULL }, // Inst #7439 = VCVTSH2SIZrm_Int |
| 39718 | { 7438, 3, 1, 0, 2149, 1, 0, 3390, X86ImpOpBase + 78, 0, 0x15016e8033029ULL }, // Inst #7438 = VCVTSH2SI64Zrrb_Int |
| 39719 | { 7437, 2, 1, 0, 2149, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x4016e8033029ULL }, // Inst #7437 = VCVTSH2SI64Zrr_Int |
| 39720 | { 7436, 6, 1, 0, 2148, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4016e8033019ULL }, // Inst #7436 = VCVTSH2SI64Zrm_Int |
| 39721 | { 7435, 4, 1, 0, 2147, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x46ad68013029ULL }, // Inst #7435 = VCVTSH2SDZrrkz_Int |
| 39722 | { 7434, 5, 1, 0, 2147, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x42ad68013029ULL }, // Inst #7434 = VCVTSH2SDZrrk_Int |
| 39723 | { 7433, 4, 1, 0, 2147, 1, 0, 2005, X86ImpOpBase + 78, 0, 0x56ad68013029ULL }, // Inst #7433 = VCVTSH2SDZrrbkz_Int |
| 39724 | { 7432, 5, 1, 0, 2147, 1, 0, 2000, X86ImpOpBase + 78, 0, 0x52ad68013029ULL }, // Inst #7432 = VCVTSH2SDZrrbk_Int |
| 39725 | { 7431, 3, 1, 0, 2145, 1, 0, 1679, X86ImpOpBase + 78, 0, 0x50ad68013029ULL }, // Inst #7431 = VCVTSH2SDZrrb_Int |
| 39726 | { 7430, 3, 1, 0, 2145, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ad68013029ULL }, // Inst #7430 = VCVTSH2SDZrr_Int |
| 39727 | { 7429, 3, 1, 0, 2146, 1, 0, 3406, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ad68013029ULL }, // Inst #7429 = VCVTSH2SDZrr |
| 39728 | { 7428, 8, 1, 0, 2144, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46ad68013019ULL }, // Inst #7428 = VCVTSH2SDZrmkz_Int |
| 39729 | { 7427, 9, 1, 0, 2144, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42ad68013019ULL }, // Inst #7427 = VCVTSH2SDZrmk_Int |
| 39730 | { 7426, 7, 1, 0, 2143, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ad68013019ULL }, // Inst #7426 = VCVTSH2SDZrm_Int |
| 39731 | { 7425, 7, 1, 0, 2143, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ad68013019ULL }, // Inst #7425 = VCVTSH2SDZrm |
| 39732 | { 7424, 3, 1, 0, 104, 1, 0, 3397, X86ImpOpBase + 78, 0, 0x1903cf0003829ULL }, // Inst #7424 = VCVTSD2USIZrrb_Int |
| 39733 | { 7423, 2, 1, 0, 104, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803cf0003829ULL }, // Inst #7423 = VCVTSD2USIZrr_Int |
| 39734 | { 7422, 6, 1, 0, 1744, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803cf0003819ULL }, // Inst #7422 = VCVTSD2USIZrm_Int |
| 39735 | { 7421, 3, 1, 0, 104, 1, 0, 3390, X86ImpOpBase + 78, 0, 0x1903cf0023829ULL }, // Inst #7421 = VCVTSD2USI64Zrrb_Int |
| 39736 | { 7420, 2, 1, 0, 104, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803cf0023829ULL }, // Inst #7420 = VCVTSD2USI64Zrr_Int |
| 39737 | { 7419, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803cf0023819ULL }, // Inst #7419 = VCVTSD2USI64Zrm_Int |
| 39738 | { 7418, 3, 1, 0, 106, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xad28003829ULL }, // Inst #7418 = VCVTSD2SSrr_Int |
| 39739 | { 7417, 3, 1, 0, 106, 1, 0, 3403, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xad28003829ULL }, // Inst #7417 = VCVTSD2SSrr |
| 39740 | { 7416, 7, 1, 0, 105, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xad28003819ULL }, // Inst #7416 = VCVTSD2SSrm_Int |
| 39741 | { 7415, 7, 1, 0, 105, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xad28003819ULL }, // Inst #7415 = VCVTSD2SSrm |
| 39742 | { 7414, 4, 1, 0, 106, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86ad68023829ULL }, // Inst #7414 = VCVTSD2SSZrrkz_Int |
| 39743 | { 7413, 5, 1, 0, 106, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82ad68023829ULL }, // Inst #7413 = VCVTSD2SSZrrk_Int |
| 39744 | { 7412, 5, 1, 0, 106, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x196ad68023829ULL }, // Inst #7412 = VCVTSD2SSZrrbkz_Int |
| 39745 | { 7411, 6, 1, 0, 106, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x192ad68023829ULL }, // Inst #7411 = VCVTSD2SSZrrbk_Int |
| 39746 | { 7410, 4, 1, 0, 106, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x190ad68023829ULL }, // Inst #7410 = VCVTSD2SSZrrb_Int |
| 39747 | { 7409, 3, 1, 0, 106, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ad68023829ULL }, // Inst #7409 = VCVTSD2SSZrr_Int |
| 39748 | { 7408, 3, 1, 0, 106, 1, 0, 3400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ad68023829ULL }, // Inst #7408 = VCVTSD2SSZrr |
| 39749 | { 7407, 8, 1, 0, 105, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86ad68023819ULL }, // Inst #7407 = VCVTSD2SSZrmkz_Int |
| 39750 | { 7406, 9, 1, 0, 105, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82ad68023819ULL }, // Inst #7406 = VCVTSD2SSZrmk_Int |
| 39751 | { 7405, 7, 1, 0, 105, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ad68023819ULL }, // Inst #7405 = VCVTSD2SSZrm_Int |
| 39752 | { 7404, 7, 1, 0, 105, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ad68023819ULL }, // Inst #7404 = VCVTSD2SSZrm |
| 39753 | { 7403, 2, 1, 0, 983, 1, 0, 1025, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x16b0003829ULL }, // Inst #7403 = VCVTSD2SIrr_Int |
| 39754 | { 7402, 2, 1, 0, 982, 1, 0, 1023, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x16b0003829ULL }, // Inst #7402 = VCVTSD2SIrr |
| 39755 | { 7401, 6, 1, 0, 1489, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16b0003819ULL }, // Inst #7401 = VCVTSD2SIrm_Int |
| 39756 | { 7400, 6, 1, 0, 1489, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16b0003819ULL }, // Inst #7400 = VCVTSD2SIrm |
| 39757 | { 7399, 3, 1, 0, 104, 1, 0, 3397, X86ImpOpBase + 78, 0, 0x19016f0003829ULL }, // Inst #7399 = VCVTSD2SIZrrb_Int |
| 39758 | { 7398, 2, 1, 0, 104, 1, 0, 3395, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8016f0003829ULL }, // Inst #7398 = VCVTSD2SIZrr_Int |
| 39759 | { 7397, 2, 1, 0, 104, 1, 0, 3393, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8016f0003829ULL }, // Inst #7397 = VCVTSD2SIZrr |
| 39760 | { 7396, 6, 1, 0, 1743, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8016f0003819ULL }, // Inst #7396 = VCVTSD2SIZrm_Int |
| 39761 | { 7395, 6, 1, 0, 1743, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8016f0003819ULL }, // Inst #7395 = VCVTSD2SIZrm |
| 39762 | { 7394, 2, 1, 0, 983, 1, 0, 1021, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x16b0023829ULL }, // Inst #7394 = VCVTSD2SI64rr_Int |
| 39763 | { 7393, 2, 1, 0, 982, 1, 0, 1019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x16b0023829ULL }, // Inst #7393 = VCVTSD2SI64rr |
| 39764 | { 7392, 6, 1, 0, 985, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16b0023819ULL }, // Inst #7392 = VCVTSD2SI64rm_Int |
| 39765 | { 7391, 6, 1, 0, 985, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16b0023819ULL }, // Inst #7391 = VCVTSD2SI64rm |
| 39766 | { 7390, 3, 1, 0, 104, 1, 0, 3390, X86ImpOpBase + 78, 0, 0x19016f0023829ULL }, // Inst #7390 = VCVTSD2SI64Zrrb_Int |
| 39767 | { 7389, 2, 1, 0, 104, 1, 0, 3388, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8016f0023829ULL }, // Inst #7389 = VCVTSD2SI64Zrr_Int |
| 39768 | { 7388, 2, 1, 0, 104, 1, 0, 3386, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8016f0023829ULL }, // Inst #7388 = VCVTSD2SI64Zrr |
| 39769 | { 7387, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8016f0023819ULL }, // Inst #7387 = VCVTSD2SI64Zrm_Int |
| 39770 | { 7386, 6, 1, 0, 417, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8016f0023819ULL }, // Inst #7386 = VCVTSD2SI64Zrm |
| 39771 | { 7385, 4, 1, 0, 2142, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86ad68033829ULL }, // Inst #7385 = VCVTSD2SHZrrkz_Int |
| 39772 | { 7384, 5, 1, 0, 2142, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82ad68033829ULL }, // Inst #7384 = VCVTSD2SHZrrk_Int |
| 39773 | { 7383, 5, 1, 0, 2142, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x196ad68033829ULL }, // Inst #7383 = VCVTSD2SHZrrbkz_Int |
| 39774 | { 7382, 6, 1, 0, 2142, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x192ad68033829ULL }, // Inst #7382 = VCVTSD2SHZrrbk_Int |
| 39775 | { 7381, 4, 1, 0, 2140, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x190ad68033829ULL }, // Inst #7381 = VCVTSD2SHZrrb_Int |
| 39776 | { 7380, 3, 1, 0, 2140, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ad68033829ULL }, // Inst #7380 = VCVTSD2SHZrr_Int |
| 39777 | { 7379, 3, 1, 0, 2141, 1, 0, 3383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ad68033829ULL }, // Inst #7379 = VCVTSD2SHZrr |
| 39778 | { 7378, 8, 1, 0, 2139, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86ad68033819ULL }, // Inst #7378 = VCVTSD2SHZrmkz_Int |
| 39779 | { 7377, 9, 1, 0, 2139, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82ad68033819ULL }, // Inst #7377 = VCVTSD2SHZrmk_Int |
| 39780 | { 7376, 7, 1, 0, 2138, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ad68033819ULL }, // Inst #7376 = VCVTSD2SHZrm_Int |
| 39781 | { 7375, 7, 1, 0, 2138, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ad68033819ULL }, // Inst #7375 = VCVTSD2SHZrm |
| 39782 | { 7374, 3, 1, 0, 1986, 1, 0, 3166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0022029ULL }, // Inst #7374 = VCVTQQ2PSZrrkz |
| 39783 | { 7373, 4, 1, 0, 1986, 1, 0, 3162, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0022029ULL }, // Inst #7373 = VCVTQQ2PSZrrk |
| 39784 | { 7372, 4, 1, 0, 1986, 1, 0, 3158, X86ImpOpBase + 78, 0, 0x19e2de0022029ULL }, // Inst #7372 = VCVTQQ2PSZrrbkz |
| 39785 | { 7371, 5, 1, 0, 1986, 1, 0, 3153, X86ImpOpBase + 78, 0, 0x19a2de0022029ULL }, // Inst #7371 = VCVTQQ2PSZrrbk |
| 39786 | { 7370, 3, 1, 0, 1986, 1, 0, 3097, X86ImpOpBase + 78, 0, 0x1982de0022029ULL }, // Inst #7370 = VCVTQQ2PSZrrb |
| 39787 | { 7369, 2, 1, 0, 1298, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0022029ULL }, // Inst #7369 = VCVTQQ2PSZrr |
| 39788 | { 7368, 7, 1, 0, 1394, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0022019ULL }, // Inst #7368 = VCVTQQ2PSZrmkz |
| 39789 | { 7367, 8, 1, 0, 1394, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0022019ULL }, // Inst #7367 = VCVTQQ2PSZrmk |
| 39790 | { 7366, 7, 1, 0, 1394, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2de0022019ULL }, // Inst #7366 = VCVTQQ2PSZrmbkz |
| 39791 | { 7365, 8, 1, 0, 1394, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2de0022019ULL }, // Inst #7365 = VCVTQQ2PSZrmbk |
| 39792 | { 7364, 6, 1, 0, 1394, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982de0022019ULL }, // Inst #7364 = VCVTQQ2PSZrmb |
| 39793 | { 7363, 6, 1, 0, 1394, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0022019ULL }, // Inst #7363 = VCVTQQ2PSZrm |
| 39794 | { 7362, 3, 1, 0, 1293, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0022029ULL }, // Inst #7362 = VCVTQQ2PSZ256rrkz |
| 39795 | { 7361, 4, 1, 0, 1293, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0022029ULL }, // Inst #7361 = VCVTQQ2PSZ256rrk |
| 39796 | { 7360, 2, 1, 0, 1293, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0022029ULL }, // Inst #7360 = VCVTQQ2PSZ256rr |
| 39797 | { 7359, 7, 1, 0, 2029, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0022019ULL }, // Inst #7359 = VCVTQQ2PSZ256rmkz |
| 39798 | { 7358, 8, 1, 0, 2029, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0022019ULL }, // Inst #7358 = VCVTQQ2PSZ256rmk |
| 39799 | { 7357, 7, 1, 0, 2029, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972de0022019ULL }, // Inst #7357 = VCVTQQ2PSZ256rmbkz |
| 39800 | { 7356, 8, 1, 0, 2029, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932de0022019ULL }, // Inst #7356 = VCVTQQ2PSZ256rmbk |
| 39801 | { 7355, 6, 1, 0, 2029, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912de0022019ULL }, // Inst #7355 = VCVTQQ2PSZ256rmb |
| 39802 | { 7354, 6, 1, 0, 2029, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0022019ULL }, // Inst #7354 = VCVTQQ2PSZ256rm |
| 39803 | { 7353, 3, 1, 0, 1273, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0022029ULL }, // Inst #7353 = VCVTQQ2PSZ128rrkz |
| 39804 | { 7352, 4, 1, 0, 1273, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0022029ULL }, // Inst #7352 = VCVTQQ2PSZ128rrk |
| 39805 | { 7351, 2, 1, 0, 1273, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0022029ULL }, // Inst #7351 = VCVTQQ2PSZ128rr |
| 39806 | { 7350, 7, 1, 0, 1741, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0022019ULL }, // Inst #7350 = VCVTQQ2PSZ128rmkz |
| 39807 | { 7349, 8, 1, 0, 1741, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0022019ULL }, // Inst #7349 = VCVTQQ2PSZ128rmk |
| 39808 | { 7348, 7, 1, 0, 1741, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962de0022019ULL }, // Inst #7348 = VCVTQQ2PSZ128rmbkz |
| 39809 | { 7347, 8, 1, 0, 1741, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922de0022019ULL }, // Inst #7347 = VCVTQQ2PSZ128rmbk |
| 39810 | { 7346, 6, 1, 0, 1741, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902de0022019ULL }, // Inst #7346 = VCVTQQ2PSZ128rmb |
| 39811 | { 7345, 6, 1, 0, 1741, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0022019ULL }, // Inst #7345 = VCVTQQ2PSZ128rm |
| 39812 | { 7344, 3, 1, 0, 2137, 1, 0, 3187, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0032029ULL }, // Inst #7344 = VCVTQQ2PHZrrkz |
| 39813 | { 7343, 4, 1, 0, 2137, 1, 0, 3183, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0032029ULL }, // Inst #7343 = VCVTQQ2PHZrrk |
| 39814 | { 7342, 4, 1, 0, 2137, 1, 0, 3179, X86ImpOpBase + 78, 0, 0x19e2de0032029ULL }, // Inst #7342 = VCVTQQ2PHZrrbkz |
| 39815 | { 7341, 5, 1, 0, 2137, 1, 0, 3174, X86ImpOpBase + 78, 0, 0x19a2de0032029ULL }, // Inst #7341 = VCVTQQ2PHZrrbk |
| 39816 | { 7340, 3, 1, 0, 2136, 1, 0, 3171, X86ImpOpBase + 78, 0, 0x1982de0032029ULL }, // Inst #7340 = VCVTQQ2PHZrrb |
| 39817 | { 7339, 2, 1, 0, 2136, 1, 0, 3169, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0032029ULL }, // Inst #7339 = VCVTQQ2PHZrr |
| 39818 | { 7338, 7, 1, 0, 2135, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0032019ULL }, // Inst #7338 = VCVTQQ2PHZrmkz |
| 39819 | { 7337, 8, 1, 0, 2135, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0032019ULL }, // Inst #7337 = VCVTQQ2PHZrmk |
| 39820 | { 7336, 7, 1, 0, 2135, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2de0032019ULL }, // Inst #7336 = VCVTQQ2PHZrmbkz |
| 39821 | { 7335, 8, 1, 0, 2135, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2de0032019ULL }, // Inst #7335 = VCVTQQ2PHZrmbk |
| 39822 | { 7334, 6, 1, 0, 2134, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982de0032019ULL }, // Inst #7334 = VCVTQQ2PHZrmb |
| 39823 | { 7333, 6, 1, 0, 2134, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0032019ULL }, // Inst #7333 = VCVTQQ2PHZrm |
| 39824 | { 7332, 3, 1, 0, 2133, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0032029ULL }, // Inst #7332 = VCVTQQ2PHZ256rrkz |
| 39825 | { 7331, 4, 1, 0, 2133, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0032029ULL }, // Inst #7331 = VCVTQQ2PHZ256rrk |
| 39826 | { 7330, 2, 1, 0, 2130, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0032029ULL }, // Inst #7330 = VCVTQQ2PHZ256rr |
| 39827 | { 7329, 7, 1, 0, 2132, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0032019ULL }, // Inst #7329 = VCVTQQ2PHZ256rmkz |
| 39828 | { 7328, 8, 1, 0, 2132, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0032019ULL }, // Inst #7328 = VCVTQQ2PHZ256rmk |
| 39829 | { 7327, 7, 1, 0, 2132, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972de0032019ULL }, // Inst #7327 = VCVTQQ2PHZ256rmbkz |
| 39830 | { 7326, 8, 1, 0, 2132, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932de0032019ULL }, // Inst #7326 = VCVTQQ2PHZ256rmbk |
| 39831 | { 7325, 6, 1, 0, 2131, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912de0032019ULL }, // Inst #7325 = VCVTQQ2PHZ256rmb |
| 39832 | { 7324, 6, 1, 0, 2131, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0032019ULL }, // Inst #7324 = VCVTQQ2PHZ256rm |
| 39833 | { 7323, 3, 1, 0, 2129, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0032029ULL }, // Inst #7323 = VCVTQQ2PHZ128rrkz |
| 39834 | { 7322, 4, 1, 0, 2129, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0032029ULL }, // Inst #7322 = VCVTQQ2PHZ128rrk |
| 39835 | { 7321, 2, 1, 0, 2128, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0032029ULL }, // Inst #7321 = VCVTQQ2PHZ128rr |
| 39836 | { 7320, 7, 1, 0, 2127, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0032019ULL }, // Inst #7320 = VCVTQQ2PHZ128rmkz |
| 39837 | { 7319, 8, 1, 0, 2127, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0032019ULL }, // Inst #7319 = VCVTQQ2PHZ128rmk |
| 39838 | { 7318, 7, 1, 0, 2127, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962de0032019ULL }, // Inst #7318 = VCVTQQ2PHZ128rmbkz |
| 39839 | { 7317, 8, 1, 0, 2127, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922de0032019ULL }, // Inst #7317 = VCVTQQ2PHZ128rmbk |
| 39840 | { 7316, 6, 1, 0, 2126, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902de0032019ULL }, // Inst #7316 = VCVTQQ2PHZ128rmb |
| 39841 | { 7315, 6, 1, 0, 2126, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0032019ULL }, // Inst #7315 = VCVTQQ2PHZ128rm |
| 39842 | { 7314, 3, 1, 0, 388, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee7360023029ULL }, // Inst #7314 = VCVTQQ2PDZrrkz |
| 39843 | { 7313, 4, 1, 0, 388, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea7360023029ULL }, // Inst #7313 = VCVTQQ2PDZrrk |
| 39844 | { 7312, 4, 1, 0, 388, 1, 0, 3195, X86ImpOpBase + 78, 0, 0x19e7360023029ULL }, // Inst #7312 = VCVTQQ2PDZrrbkz |
| 39845 | { 7311, 5, 1, 0, 388, 1, 0, 3190, X86ImpOpBase + 78, 0, 0x19a7360023029ULL }, // Inst #7311 = VCVTQQ2PDZrrbk |
| 39846 | { 7310, 3, 1, 0, 388, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1987360023029ULL }, // Inst #7310 = VCVTQQ2PDZrrb |
| 39847 | { 7309, 2, 1, 0, 388, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe87360023029ULL }, // Inst #7309 = VCVTQQ2PDZrr |
| 39848 | { 7308, 7, 1, 0, 1368, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee7360023019ULL }, // Inst #7308 = VCVTQQ2PDZrmkz |
| 39849 | { 7307, 8, 1, 0, 1368, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea7360023019ULL }, // Inst #7307 = VCVTQQ2PDZrmk |
| 39850 | { 7306, 7, 1, 0, 1368, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e7360023019ULL }, // Inst #7306 = VCVTQQ2PDZrmbkz |
| 39851 | { 7305, 8, 1, 0, 1368, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a7360023019ULL }, // Inst #7305 = VCVTQQ2PDZrmbk |
| 39852 | { 7304, 6, 1, 0, 1368, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x987360023019ULL }, // Inst #7304 = VCVTQQ2PDZrmb |
| 39853 | { 7303, 6, 1, 0, 1368, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe87360023019ULL }, // Inst #7303 = VCVTQQ2PDZrm |
| 39854 | { 7302, 3, 1, 0, 2064, 1, 0, 2786, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc77360023029ULL }, // Inst #7302 = VCVTQQ2PDZ256rrkz |
| 39855 | { 7301, 4, 1, 0, 2064, 1, 0, 2782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc37360023029ULL }, // Inst #7301 = VCVTQQ2PDZ256rrk |
| 39856 | { 7300, 2, 1, 0, 2064, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc17360023029ULL }, // Inst #7300 = VCVTQQ2PDZ256rr |
| 39857 | { 7299, 7, 1, 0, 1367, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc77360023019ULL }, // Inst #7299 = VCVTQQ2PDZ256rmkz |
| 39858 | { 7298, 8, 1, 0, 1367, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc37360023019ULL }, // Inst #7298 = VCVTQQ2PDZ256rmk |
| 39859 | { 7297, 7, 1, 0, 1367, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x977360023019ULL }, // Inst #7297 = VCVTQQ2PDZ256rmbkz |
| 39860 | { 7296, 8, 1, 0, 1367, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x937360023019ULL }, // Inst #7296 = VCVTQQ2PDZ256rmbk |
| 39861 | { 7295, 6, 1, 0, 1367, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x917360023019ULL }, // Inst #7295 = VCVTQQ2PDZ256rmb |
| 39862 | { 7294, 6, 1, 0, 1367, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc17360023019ULL }, // Inst #7294 = VCVTQQ2PDZ256rm |
| 39863 | { 7293, 3, 1, 0, 2063, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa67360023029ULL }, // Inst #7293 = VCVTQQ2PDZ128rrkz |
| 39864 | { 7292, 4, 1, 0, 2063, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa27360023029ULL }, // Inst #7292 = VCVTQQ2PDZ128rrk |
| 39865 | { 7291, 2, 1, 0, 2063, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa07360023029ULL }, // Inst #7291 = VCVTQQ2PDZ128rr |
| 39866 | { 7290, 7, 1, 0, 1357, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa67360023019ULL }, // Inst #7290 = VCVTQQ2PDZ128rmkz |
| 39867 | { 7289, 8, 1, 0, 1357, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa27360023019ULL }, // Inst #7289 = VCVTQQ2PDZ128rmk |
| 39868 | { 7288, 7, 1, 0, 1357, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x967360023019ULL }, // Inst #7288 = VCVTQQ2PDZ128rmbkz |
| 39869 | { 7287, 8, 1, 0, 1357, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x927360023019ULL }, // Inst #7287 = VCVTQQ2PDZ128rmbk |
| 39870 | { 7286, 6, 1, 0, 1357, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x907360023019ULL }, // Inst #7286 = VCVTQQ2PDZ128rmb |
| 39871 | { 7285, 6, 1, 0, 1357, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa07360023019ULL }, // Inst #7285 = VCVTQQ2PDZ128rm |
| 39872 | { 7284, 3, 1, 0, 1985, 1, 0, 3083, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3ce0002829ULL }, // Inst #7284 = VCVTPS2UQQZrrkz |
| 39873 | { 7283, 4, 1, 0, 1985, 1, 0, 3079, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3ce0002829ULL }, // Inst #7283 = VCVTPS2UQQZrrk |
| 39874 | { 7282, 4, 1, 0, 1985, 1, 0, 3379, X86ImpOpBase + 78, 0, 0x17e3ce0002829ULL }, // Inst #7282 = VCVTPS2UQQZrrbkz |
| 39875 | { 7281, 5, 1, 0, 1985, 1, 0, 3374, X86ImpOpBase + 78, 0, 0x17a3ce0002829ULL }, // Inst #7281 = VCVTPS2UQQZrrbk |
| 39876 | { 7280, 3, 1, 0, 1985, 1, 0, 3243, X86ImpOpBase + 78, 0, 0x1783ce0002829ULL }, // Inst #7280 = VCVTPS2UQQZrrb |
| 39877 | { 7279, 2, 1, 0, 1297, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83ce0002829ULL }, // Inst #7279 = VCVTPS2UQQZrr |
| 39878 | { 7278, 7, 1, 0, 1389, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3ce0002819ULL }, // Inst #7278 = VCVTPS2UQQZrmkz |
| 39879 | { 7277, 8, 1, 0, 1389, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3ce0002819ULL }, // Inst #7277 = VCVTPS2UQQZrmk |
| 39880 | { 7276, 7, 1, 0, 1389, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3ce0002819ULL }, // Inst #7276 = VCVTPS2UQQZrmbkz |
| 39881 | { 7275, 8, 1, 0, 1389, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3ce0002819ULL }, // Inst #7275 = VCVTPS2UQQZrmbk |
| 39882 | { 7274, 6, 1, 0, 1389, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783ce0002819ULL }, // Inst #7274 = VCVTPS2UQQZrmb |
| 39883 | { 7273, 6, 1, 0, 1389, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83ce0002819ULL }, // Inst #7273 = VCVTPS2UQQZrm |
| 39884 | { 7272, 3, 1, 0, 1292, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73ce0002829ULL }, // Inst #7272 = VCVTPS2UQQZ256rrkz |
| 39885 | { 7271, 4, 1, 0, 1292, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33ce0002829ULL }, // Inst #7271 = VCVTPS2UQQZ256rrk |
| 39886 | { 7270, 2, 1, 0, 1292, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13ce0002829ULL }, // Inst #7270 = VCVTPS2UQQZ256rr |
| 39887 | { 7269, 7, 1, 0, 1377, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73ce0002819ULL }, // Inst #7269 = VCVTPS2UQQZ256rmkz |
| 39888 | { 7268, 8, 1, 0, 1377, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33ce0002819ULL }, // Inst #7268 = VCVTPS2UQQZ256rmk |
| 39889 | { 7267, 7, 1, 0, 1377, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773ce0002819ULL }, // Inst #7267 = VCVTPS2UQQZ256rmbkz |
| 39890 | { 7266, 8, 1, 0, 1377, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733ce0002819ULL }, // Inst #7266 = VCVTPS2UQQZ256rmbk |
| 39891 | { 7265, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713ce0002819ULL }, // Inst #7265 = VCVTPS2UQQZ256rmb |
| 39892 | { 7264, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13ce0002819ULL }, // Inst #7264 = VCVTPS2UQQZ256rm |
| 39893 | { 7263, 3, 1, 0, 1272, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x863ce0002829ULL }, // Inst #7263 = VCVTPS2UQQZ128rrkz |
| 39894 | { 7262, 4, 1, 0, 1272, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x823ce0002829ULL }, // Inst #7262 = VCVTPS2UQQZ128rrk |
| 39895 | { 7261, 2, 1, 0, 1272, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803ce0002829ULL }, // Inst #7261 = VCVTPS2UQQZ128rr |
| 39896 | { 7260, 7, 1, 0, 1361, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863ce0002819ULL }, // Inst #7260 = VCVTPS2UQQZ128rmkz |
| 39897 | { 7259, 8, 1, 0, 1361, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823ce0002819ULL }, // Inst #7259 = VCVTPS2UQQZ128rmk |
| 39898 | { 7258, 7, 1, 0, 1361, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763ce0002819ULL }, // Inst #7258 = VCVTPS2UQQZ128rmbkz |
| 39899 | { 7257, 8, 1, 0, 1361, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723ce0002819ULL }, // Inst #7257 = VCVTPS2UQQZ128rmbk |
| 39900 | { 7256, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703ce0002819ULL }, // Inst #7256 = VCVTPS2UQQZ128rmb |
| 39901 | { 7255, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803ce0002819ULL }, // Inst #7255 = VCVTPS2UQQZ128rm |
| 39902 | { 7254, 3, 1, 0, 1861, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0002029ULL }, // Inst #7254 = VCVTPS2UDQZrrkz |
| 39903 | { 7253, 4, 1, 0, 1861, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0002029ULL }, // Inst #7253 = VCVTPS2UDQZrrk |
| 39904 | { 7252, 4, 1, 0, 1861, 1, 0, 3126, X86ImpOpBase + 78, 0, 0x17e3ce0002029ULL }, // Inst #7252 = VCVTPS2UDQZrrbkz |
| 39905 | { 7251, 5, 1, 0, 1861, 1, 0, 3121, X86ImpOpBase + 78, 0, 0x17a3ce0002029ULL }, // Inst #7251 = VCVTPS2UDQZrrbk |
| 39906 | { 7250, 3, 1, 0, 1861, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1783ce0002029ULL }, // Inst #7250 = VCVTPS2UDQZrrb |
| 39907 | { 7249, 2, 1, 0, 1264, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0002029ULL }, // Inst #7249 = VCVTPS2UDQZrr |
| 39908 | { 7248, 7, 1, 0, 1378, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0002019ULL }, // Inst #7248 = VCVTPS2UDQZrmkz |
| 39909 | { 7247, 8, 1, 0, 1378, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0002019ULL }, // Inst #7247 = VCVTPS2UDQZrmk |
| 39910 | { 7246, 7, 1, 0, 1378, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3ce0002019ULL }, // Inst #7246 = VCVTPS2UDQZrmbkz |
| 39911 | { 7245, 8, 1, 0, 1378, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3ce0002019ULL }, // Inst #7245 = VCVTPS2UDQZrmbk |
| 39912 | { 7244, 6, 1, 0, 1378, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783ce0002019ULL }, // Inst #7244 = VCVTPS2UDQZrmb |
| 39913 | { 7243, 6, 1, 0, 1378, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0002019ULL }, // Inst #7243 = VCVTPS2UDQZrm |
| 39914 | { 7242, 3, 1, 0, 1261, 1, 0, 2829, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0002029ULL }, // Inst #7242 = VCVTPS2UDQZ256rrkz |
| 39915 | { 7241, 4, 1, 0, 1261, 1, 0, 2825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0002029ULL }, // Inst #7241 = VCVTPS2UDQZ256rrk |
| 39916 | { 7240, 2, 1, 0, 1261, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0002029ULL }, // Inst #7240 = VCVTPS2UDQZ256rr |
| 39917 | { 7239, 7, 1, 0, 1377, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0002019ULL }, // Inst #7239 = VCVTPS2UDQZ256rmkz |
| 39918 | { 7238, 8, 1, 0, 1377, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0002019ULL }, // Inst #7238 = VCVTPS2UDQZ256rmk |
| 39919 | { 7237, 7, 1, 0, 1377, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773ce0002019ULL }, // Inst #7237 = VCVTPS2UDQZ256rmbkz |
| 39920 | { 7236, 8, 1, 0, 1377, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733ce0002019ULL }, // Inst #7236 = VCVTPS2UDQZ256rmbk |
| 39921 | { 7235, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713ce0002019ULL }, // Inst #7235 = VCVTPS2UDQZ256rmb |
| 39922 | { 7234, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0002019ULL }, // Inst #7234 = VCVTPS2UDQZ256rm |
| 39923 | { 7233, 3, 1, 0, 1262, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0002029ULL }, // Inst #7233 = VCVTPS2UDQZ128rrkz |
| 39924 | { 7232, 4, 1, 0, 1262, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0002029ULL }, // Inst #7232 = VCVTPS2UDQZ128rrk |
| 39925 | { 7231, 2, 1, 0, 1262, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0002029ULL }, // Inst #7231 = VCVTPS2UDQZ128rr |
| 39926 | { 7230, 7, 1, 0, 1361, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0002019ULL }, // Inst #7230 = VCVTPS2UDQZ128rmkz |
| 39927 | { 7229, 8, 1, 0, 1361, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0002019ULL }, // Inst #7229 = VCVTPS2UDQZ128rmk |
| 39928 | { 7228, 7, 1, 0, 1361, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763ce0002019ULL }, // Inst #7228 = VCVTPS2UDQZ128rmbkz |
| 39929 | { 7227, 8, 1, 0, 1361, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723ce0002019ULL }, // Inst #7227 = VCVTPS2UDQZ128rmbk |
| 39930 | { 7226, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703ce0002019ULL }, // Inst #7226 = VCVTPS2UDQZ128rmb |
| 39931 | { 7225, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0002019ULL }, // Inst #7225 = VCVTPS2UDQZ128rm |
| 39932 | { 7224, 3, 1, 0, 1985, 1, 0, 3083, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3de0002829ULL }, // Inst #7224 = VCVTPS2QQZrrkz |
| 39933 | { 7223, 4, 1, 0, 1985, 1, 0, 3079, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3de0002829ULL }, // Inst #7223 = VCVTPS2QQZrrk |
| 39934 | { 7222, 4, 1, 0, 1985, 1, 0, 3379, X86ImpOpBase + 78, 0, 0x17e3de0002829ULL }, // Inst #7222 = VCVTPS2QQZrrbkz |
| 39935 | { 7221, 5, 1, 0, 1985, 1, 0, 3374, X86ImpOpBase + 78, 0, 0x17a3de0002829ULL }, // Inst #7221 = VCVTPS2QQZrrbk |
| 39936 | { 7220, 3, 1, 0, 1985, 1, 0, 3243, X86ImpOpBase + 78, 0, 0x1783de0002829ULL }, // Inst #7220 = VCVTPS2QQZrrb |
| 39937 | { 7219, 2, 1, 0, 1297, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83de0002829ULL }, // Inst #7219 = VCVTPS2QQZrr |
| 39938 | { 7218, 7, 1, 0, 1389, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3de0002819ULL }, // Inst #7218 = VCVTPS2QQZrmkz |
| 39939 | { 7217, 8, 1, 0, 1389, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3de0002819ULL }, // Inst #7217 = VCVTPS2QQZrmk |
| 39940 | { 7216, 7, 1, 0, 1389, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3de0002819ULL }, // Inst #7216 = VCVTPS2QQZrmbkz |
| 39941 | { 7215, 8, 1, 0, 1389, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3de0002819ULL }, // Inst #7215 = VCVTPS2QQZrmbk |
| 39942 | { 7214, 6, 1, 0, 1389, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783de0002819ULL }, // Inst #7214 = VCVTPS2QQZrmb |
| 39943 | { 7213, 6, 1, 0, 1389, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83de0002819ULL }, // Inst #7213 = VCVTPS2QQZrm |
| 39944 | { 7212, 3, 1, 0, 1292, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73de0002829ULL }, // Inst #7212 = VCVTPS2QQZ256rrkz |
| 39945 | { 7211, 4, 1, 0, 1292, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33de0002829ULL }, // Inst #7211 = VCVTPS2QQZ256rrk |
| 39946 | { 7210, 2, 1, 0, 1292, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13de0002829ULL }, // Inst #7210 = VCVTPS2QQZ256rr |
| 39947 | { 7209, 7, 1, 0, 1377, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73de0002819ULL }, // Inst #7209 = VCVTPS2QQZ256rmkz |
| 39948 | { 7208, 8, 1, 0, 1377, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33de0002819ULL }, // Inst #7208 = VCVTPS2QQZ256rmk |
| 39949 | { 7207, 7, 1, 0, 1377, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773de0002819ULL }, // Inst #7207 = VCVTPS2QQZ256rmbkz |
| 39950 | { 7206, 8, 1, 0, 1377, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733de0002819ULL }, // Inst #7206 = VCVTPS2QQZ256rmbk |
| 39951 | { 7205, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713de0002819ULL }, // Inst #7205 = VCVTPS2QQZ256rmb |
| 39952 | { 7204, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13de0002819ULL }, // Inst #7204 = VCVTPS2QQZ256rm |
| 39953 | { 7203, 3, 1, 0, 1272, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x863de0002829ULL }, // Inst #7203 = VCVTPS2QQZ128rrkz |
| 39954 | { 7202, 4, 1, 0, 1272, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x823de0002829ULL }, // Inst #7202 = VCVTPS2QQZ128rrk |
| 39955 | { 7201, 2, 1, 0, 1272, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803de0002829ULL }, // Inst #7201 = VCVTPS2QQZ128rr |
| 39956 | { 7200, 7, 1, 0, 1361, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863de0002819ULL }, // Inst #7200 = VCVTPS2QQZ128rmkz |
| 39957 | { 7199, 8, 1, 0, 1361, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823de0002819ULL }, // Inst #7199 = VCVTPS2QQZ128rmk |
| 39958 | { 7198, 7, 1, 0, 1361, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763de0002819ULL }, // Inst #7198 = VCVTPS2QQZ128rmbkz |
| 39959 | { 7197, 8, 1, 0, 1361, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723de0002819ULL }, // Inst #7197 = VCVTPS2QQZ128rmbk |
| 39960 | { 7196, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703de0002819ULL }, // Inst #7196 = VCVTPS2QQZ128rmb |
| 39961 | { 7195, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803de0002819ULL }, // Inst #7195 = VCVTPS2QQZ128rm |
| 39962 | { 7194, 3, 1, 0, 414, 1, 0, 566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea0046828ULL }, // Inst #7194 = VCVTPS2PHrr |
| 39963 | { 7193, 7, 0, 0, 413, 1, 0, 1052, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0xea0046818ULL }, // Inst #7193 = VCVTPS2PHmr |
| 39964 | { 7192, 4, 1, 0, 416, 1, 0, 3370, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce0ee0046828ULL }, // Inst #7192 = VCVTPS2PHZrrkz |
| 39965 | { 7191, 5, 1, 0, 416, 1, 0, 3365, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca0ee0046828ULL }, // Inst #7191 = VCVTPS2PHZrrk |
| 39966 | { 7190, 4, 1, 0, 416, 1, 0, 3370, X86ImpOpBase + 78, 0, 0x7e0ef8046828ULL }, // Inst #7190 = VCVTPS2PHZrrbkz |
| 39967 | { 7189, 5, 1, 0, 416, 1, 0, 3365, X86ImpOpBase + 78, 0, 0x7a0ef8046828ULL }, // Inst #7189 = VCVTPS2PHZrrbk |
| 39968 | { 7188, 3, 1, 0, 2090, 1, 0, 3362, X86ImpOpBase + 78, 0, 0x780ef8046828ULL }, // Inst #7188 = VCVTPS2PHZrrb |
| 39969 | { 7187, 3, 1, 0, 2090, 1, 0, 3362, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc80ee0046828ULL }, // Inst #7187 = VCVTPS2PHZrr |
| 39970 | { 7186, 8, 0, 0, 2125, 1, 0, 3354, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0xca0ee0046818ULL }, // Inst #7186 = VCVTPS2PHZmrk |
| 39971 | { 7185, 7, 0, 0, 1280, 1, 0, 3347, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0xc80ee0046818ULL }, // Inst #7185 = VCVTPS2PHZmr |
| 39972 | { 7184, 4, 1, 0, 2079, 1, 0, 3343, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa70ee0046828ULL }, // Inst #7184 = VCVTPS2PHZ256rrkz |
| 39973 | { 7183, 5, 1, 0, 2079, 1, 0, 3338, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa30ee0046828ULL }, // Inst #7183 = VCVTPS2PHZ256rrk |
| 39974 | { 7182, 3, 1, 0, 412, 1, 0, 3335, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa10ee0046828ULL }, // Inst #7182 = VCVTPS2PHZ256rr |
| 39975 | { 7181, 8, 0, 0, 2124, 1, 0, 3327, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0xa30ee0046818ULL }, // Inst #7181 = VCVTPS2PHZ256mrk |
| 39976 | { 7180, 7, 0, 0, 1279, 1, 0, 3320, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0xa10ee0046818ULL }, // Inst #7180 = VCVTPS2PHZ256mr |
| 39977 | { 7179, 4, 1, 0, 2108, 1, 0, 3316, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x860ee0046828ULL }, // Inst #7179 = VCVTPS2PHZ128rrkz |
| 39978 | { 7178, 5, 1, 0, 2108, 1, 0, 3311, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x820ee0046828ULL }, // Inst #7178 = VCVTPS2PHZ128rrk |
| 39979 | { 7177, 3, 1, 0, 414, 1, 0, 3308, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x800ee0046828ULL }, // Inst #7177 = VCVTPS2PHZ128rr |
| 39980 | { 7176, 8, 0, 0, 2123, 1, 0, 3300, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x820ee0046818ULL }, // Inst #7176 = VCVTPS2PHZ128mrk |
| 39981 | { 7175, 7, 0, 0, 1278, 1, 0, 3293, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800ee0046818ULL }, // Inst #7175 = VCVTPS2PHZ128mr |
| 39982 | { 7174, 3, 1, 0, 412, 1, 0, 3290, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x10ea0046828ULL }, // Inst #7174 = VCVTPS2PHYrr |
| 39983 | { 7173, 7, 0, 0, 411, 1, 0, 3283, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x10ea0046818ULL }, // Inst #7173 = VCVTPS2PHYmr |
| 39984 | { 7172, 3, 1, 0, 2096, 1, 0, 3113, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee0ee0012829ULL }, // Inst #7172 = VCVTPS2PHXZrrkz |
| 39985 | { 7171, 4, 1, 0, 2096, 1, 0, 3109, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea0ee0012829ULL }, // Inst #7171 = VCVTPS2PHXZrrk |
| 39986 | { 7170, 4, 1, 0, 2096, 1, 0, 3105, X86ImpOpBase + 78, 0, 0x17e0ee0012829ULL }, // Inst #7170 = VCVTPS2PHXZrrbkz |
| 39987 | { 7169, 5, 1, 0, 2096, 1, 0, 3100, X86ImpOpBase + 78, 0, 0x17a0ee0012829ULL }, // Inst #7169 = VCVTPS2PHXZrrbk |
| 39988 | { 7168, 3, 1, 0, 2089, 1, 0, 3097, X86ImpOpBase + 78, 0, 0x1780ee0012829ULL }, // Inst #7168 = VCVTPS2PHXZrrb |
| 39989 | { 7167, 2, 1, 0, 2089, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe80ee0012829ULL }, // Inst #7167 = VCVTPS2PHXZrr |
| 39990 | { 7166, 7, 1, 0, 2085, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee0ee0012819ULL }, // Inst #7166 = VCVTPS2PHXZrmkz |
| 39991 | { 7165, 8, 1, 0, 2085, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea0ee0012819ULL }, // Inst #7165 = VCVTPS2PHXZrmk |
| 39992 | { 7164, 7, 1, 0, 2085, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e0ee0012819ULL }, // Inst #7164 = VCVTPS2PHXZrmbkz |
| 39993 | { 7163, 8, 1, 0, 2085, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a0ee0012819ULL }, // Inst #7163 = VCVTPS2PHXZrmbk |
| 39994 | { 7162, 6, 1, 0, 2122, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x780ee0012819ULL }, // Inst #7162 = VCVTPS2PHXZrmb |
| 39995 | { 7161, 6, 1, 0, 2122, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe80ee0012819ULL }, // Inst #7161 = VCVTPS2PHXZrm |
| 39996 | { 7160, 3, 1, 0, 2078, 1, 0, 3092, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc70ee0012829ULL }, // Inst #7160 = VCVTPS2PHXZ256rrkz |
| 39997 | { 7159, 4, 1, 0, 2078, 1, 0, 3088, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc30ee0012829ULL }, // Inst #7159 = VCVTPS2PHXZ256rrk |
| 39998 | { 7158, 2, 1, 0, 1815, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc10ee0012829ULL }, // Inst #7158 = VCVTPS2PHXZ256rr |
| 39999 | { 7157, 7, 1, 0, 2082, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc70ee0012819ULL }, // Inst #7157 = VCVTPS2PHXZ256rmkz |
| 40000 | { 7156, 8, 1, 0, 2082, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc30ee0012819ULL }, // Inst #7156 = VCVTPS2PHXZ256rmk |
| 40001 | { 7155, 7, 1, 0, 2082, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x770ee0012819ULL }, // Inst #7155 = VCVTPS2PHXZ256rmbkz |
| 40002 | { 7154, 8, 1, 0, 2082, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x730ee0012819ULL }, // Inst #7154 = VCVTPS2PHXZ256rmbk |
| 40003 | { 7153, 6, 1, 0, 2121, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x710ee0012819ULL }, // Inst #7153 = VCVTPS2PHXZ256rmb |
| 40004 | { 7152, 6, 1, 0, 2121, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc10ee0012819ULL }, // Inst #7152 = VCVTPS2PHXZ256rm |
| 40005 | { 7151, 3, 1, 0, 2107, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa60ee0012829ULL }, // Inst #7151 = VCVTPS2PHXZ128rrkz |
| 40006 | { 7150, 4, 1, 0, 2107, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa20ee0012829ULL }, // Inst #7150 = VCVTPS2PHXZ128rrk |
| 40007 | { 7149, 2, 1, 0, 1817, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa00ee0012829ULL }, // Inst #7149 = VCVTPS2PHXZ128rr |
| 40008 | { 7148, 7, 1, 0, 2120, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa60ee0012819ULL }, // Inst #7148 = VCVTPS2PHXZ128rmkz |
| 40009 | { 7147, 8, 1, 0, 2120, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa20ee0012819ULL }, // Inst #7147 = VCVTPS2PHXZ128rmk |
| 40010 | { 7146, 7, 1, 0, 2120, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x760ee0012819ULL }, // Inst #7146 = VCVTPS2PHXZ128rmbkz |
| 40011 | { 7145, 8, 1, 0, 2120, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x720ee0012819ULL }, // Inst #7145 = VCVTPS2PHXZ128rmbk |
| 40012 | { 7144, 6, 1, 0, 2072, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x700ee0012819ULL }, // Inst #7144 = VCVTPS2PHXZ128rmb |
| 40013 | { 7143, 6, 1, 0, 2072, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa00ee0012819ULL }, // Inst #7143 = VCVTPS2PHXZ128rm |
| 40014 | { 7142, 2, 1, 0, 1271, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d20002029ULL }, // Inst #7142 = VCVTPS2PDrr |
| 40015 | { 7141, 6, 1, 0, 1346, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d20002019ULL }, // Inst #7141 = VCVTPS2PDrm |
| 40016 | { 7140, 3, 1, 0, 408, 1, 0, 3083, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce2d60002029ULL }, // Inst #7140 = VCVTPS2PDZrrkz |
| 40017 | { 7139, 4, 1, 0, 408, 1, 0, 3079, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca2d60002029ULL }, // Inst #7139 = VCVTPS2PDZrrk |
| 40018 | { 7138, 3, 1, 0, 408, 1, 0, 3083, X86ImpOpBase + 78, 0, 0x7e2d60002029ULL }, // Inst #7138 = VCVTPS2PDZrrbkz |
| 40019 | { 7137, 4, 1, 0, 408, 1, 0, 3079, X86ImpOpBase + 78, 0, 0x7a2d60002029ULL }, // Inst #7137 = VCVTPS2PDZrrbk |
| 40020 | { 7136, 2, 1, 0, 408, 1, 0, 3077, X86ImpOpBase + 78, 0, 0x782d60002029ULL }, // Inst #7136 = VCVTPS2PDZrrb |
| 40021 | { 7135, 2, 1, 0, 1296, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc82d60002029ULL }, // Inst #7135 = VCVTPS2PDZrr |
| 40022 | { 7134, 7, 1, 0, 1374, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce2d60002019ULL }, // Inst #7134 = VCVTPS2PDZrmkz |
| 40023 | { 7133, 8, 1, 0, 1374, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca2d60002019ULL }, // Inst #7133 = VCVTPS2PDZrmk |
| 40024 | { 7132, 7, 1, 0, 1374, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2d60002019ULL }, // Inst #7132 = VCVTPS2PDZrmbkz |
| 40025 | { 7131, 8, 1, 0, 1374, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2d60002019ULL }, // Inst #7131 = VCVTPS2PDZrmbk |
| 40026 | { 7130, 6, 1, 0, 1374, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782d60002019ULL }, // Inst #7130 = VCVTPS2PDZrmb |
| 40027 | { 7129, 6, 1, 0, 1374, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc82d60002019ULL }, // Inst #7129 = VCVTPS2PDZrm |
| 40028 | { 7128, 3, 1, 0, 1291, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa72d60002029ULL }, // Inst #7128 = VCVTPS2PDZ256rrkz |
| 40029 | { 7127, 4, 1, 0, 1291, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa32d60002029ULL }, // Inst #7127 = VCVTPS2PDZ256rrk |
| 40030 | { 7126, 2, 1, 0, 1291, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa12d60002029ULL }, // Inst #7126 = VCVTPS2PDZ256rr |
| 40031 | { 7125, 7, 1, 0, 1373, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa72d60002019ULL }, // Inst #7125 = VCVTPS2PDZ256rmkz |
| 40032 | { 7124, 8, 1, 0, 1373, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa32d60002019ULL }, // Inst #7124 = VCVTPS2PDZ256rmk |
| 40033 | { 7123, 7, 1, 0, 1373, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772d60002019ULL }, // Inst #7123 = VCVTPS2PDZ256rmbkz |
| 40034 | { 7122, 8, 1, 0, 1373, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732d60002019ULL }, // Inst #7122 = VCVTPS2PDZ256rmbk |
| 40035 | { 7121, 6, 1, 0, 1373, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712d60002019ULL }, // Inst #7121 = VCVTPS2PDZ256rmb |
| 40036 | { 7120, 6, 1, 0, 1373, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa12d60002019ULL }, // Inst #7120 = VCVTPS2PDZ256rm |
| 40037 | { 7119, 3, 1, 0, 1271, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x862d60002029ULL }, // Inst #7119 = VCVTPS2PDZ128rrkz |
| 40038 | { 7118, 4, 1, 0, 1271, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x822d60002029ULL }, // Inst #7118 = VCVTPS2PDZ128rrk |
| 40039 | { 7117, 2, 1, 0, 1271, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x802d60002029ULL }, // Inst #7117 = VCVTPS2PDZ128rr |
| 40040 | { 7116, 7, 1, 0, 1362, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x862d60002019ULL }, // Inst #7116 = VCVTPS2PDZ128rmkz |
| 40041 | { 7115, 8, 1, 0, 1362, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x822d60002019ULL }, // Inst #7115 = VCVTPS2PDZ128rmk |
| 40042 | { 7114, 7, 1, 0, 1362, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762d60002019ULL }, // Inst #7114 = VCVTPS2PDZ128rmbkz |
| 40043 | { 7113, 8, 1, 0, 1362, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722d60002019ULL }, // Inst #7113 = VCVTPS2PDZ128rmbk |
| 40044 | { 7112, 6, 1, 0, 1362, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702d60002019ULL }, // Inst #7112 = VCVTPS2PDZ128rmb |
| 40045 | { 7111, 6, 1, 0, 1362, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x802d60002019ULL }, // Inst #7111 = VCVTPS2PDZ128rm |
| 40046 | { 7110, 2, 1, 0, 1291, 1, 0, 2407, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x12d20002029ULL }, // Inst #7110 = VCVTPS2PDYrr |
| 40047 | { 7109, 6, 1, 0, 1366, 1, 0, 2253, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x12d20002019ULL }, // Inst #7109 = VCVTPS2PDYrm |
| 40048 | { 7108, 3, 1, 0, 384, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee35f0052829ULL }, // Inst #7108 = VCVTPS2IUBSZrrkz |
| 40049 | { 7107, 4, 1, 0, 384, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea35f0052829ULL }, // Inst #7107 = VCVTPS2IUBSZrrk |
| 40050 | { 7106, 4, 1, 0, 384, 1, 0, 3126, X86ImpOpBase + 78, 0, 0x17635f0052829ULL }, // Inst #7106 = VCVTPS2IUBSZrrbkz |
| 40051 | { 7105, 5, 1, 0, 384, 1, 0, 3121, X86ImpOpBase + 78, 0, 0x17235f0052829ULL }, // Inst #7105 = VCVTPS2IUBSZrrbk |
| 40052 | { 7104, 3, 1, 0, 384, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x17035f0052829ULL }, // Inst #7104 = VCVTPS2IUBSZrrb |
| 40053 | { 7103, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe835f0052829ULL }, // Inst #7103 = VCVTPS2IUBSZrr |
| 40054 | { 7102, 7, 1, 0, 383, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee35f0052819ULL }, // Inst #7102 = VCVTPS2IUBSZrmkz |
| 40055 | { 7101, 8, 1, 0, 383, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea35f0052819ULL }, // Inst #7101 = VCVTPS2IUBSZrmk |
| 40056 | { 7100, 7, 1, 0, 383, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e35f0052819ULL }, // Inst #7100 = VCVTPS2IUBSZrmbkz |
| 40057 | { 7099, 8, 1, 0, 383, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a35f0052819ULL }, // Inst #7099 = VCVTPS2IUBSZrmbk |
| 40058 | { 7098, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7835f0052819ULL }, // Inst #7098 = VCVTPS2IUBSZrmb |
| 40059 | { 7097, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe835f0052819ULL }, // Inst #7097 = VCVTPS2IUBSZrm |
| 40060 | { 7096, 3, 1, 0, 382, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc735f0052829ULL }, // Inst #7096 = VCVTPS2IUBSZ256rrkz |
| 40061 | { 7095, 4, 1, 0, 382, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc335f0052829ULL }, // Inst #7095 = VCVTPS2IUBSZ256rrk |
| 40062 | { 7094, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc135f0052829ULL }, // Inst #7094 = VCVTPS2IUBSZ256rr |
| 40063 | { 7093, 7, 1, 0, 381, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc735f0052819ULL }, // Inst #7093 = VCVTPS2IUBSZ256rmkz |
| 40064 | { 7092, 8, 1, 0, 381, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc335f0052819ULL }, // Inst #7092 = VCVTPS2IUBSZ256rmk |
| 40065 | { 7091, 7, 1, 0, 381, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7735f0052819ULL }, // Inst #7091 = VCVTPS2IUBSZ256rmbkz |
| 40066 | { 7090, 8, 1, 0, 381, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7335f0052819ULL }, // Inst #7090 = VCVTPS2IUBSZ256rmbk |
| 40067 | { 7089, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7135f0052819ULL }, // Inst #7089 = VCVTPS2IUBSZ256rmb |
| 40068 | { 7088, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc135f0052819ULL }, // Inst #7088 = VCVTPS2IUBSZ256rm |
| 40069 | { 7087, 3, 1, 0, 149, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa635f0052829ULL }, // Inst #7087 = VCVTPS2IUBSZ128rrkz |
| 40070 | { 7086, 4, 1, 0, 149, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa235f0052829ULL }, // Inst #7086 = VCVTPS2IUBSZ128rrk |
| 40071 | { 7085, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa035f0052829ULL }, // Inst #7085 = VCVTPS2IUBSZ128rr |
| 40072 | { 7084, 7, 1, 0, 148, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa635f0052819ULL }, // Inst #7084 = VCVTPS2IUBSZ128rmkz |
| 40073 | { 7083, 8, 1, 0, 148, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa235f0052819ULL }, // Inst #7083 = VCVTPS2IUBSZ128rmk |
| 40074 | { 7082, 7, 1, 0, 148, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7635f0052819ULL }, // Inst #7082 = VCVTPS2IUBSZ128rmbkz |
| 40075 | { 7081, 8, 1, 0, 148, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7235f0052819ULL }, // Inst #7081 = VCVTPS2IUBSZ128rmbk |
| 40076 | { 7080, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7035f0052819ULL }, // Inst #7080 = VCVTPS2IUBSZ128rmb |
| 40077 | { 7079, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa035f0052819ULL }, // Inst #7079 = VCVTPS2IUBSZ128rm |
| 40078 | { 7078, 3, 1, 0, 384, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee34f0052829ULL }, // Inst #7078 = VCVTPS2IBSZrrkz |
| 40079 | { 7077, 4, 1, 0, 384, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea34f0052829ULL }, // Inst #7077 = VCVTPS2IBSZrrk |
| 40080 | { 7076, 4, 1, 0, 384, 1, 0, 3126, X86ImpOpBase + 78, 0, 0x17634f0052829ULL }, // Inst #7076 = VCVTPS2IBSZrrbkz |
| 40081 | { 7075, 5, 1, 0, 384, 1, 0, 3121, X86ImpOpBase + 78, 0, 0x17234f0052829ULL }, // Inst #7075 = VCVTPS2IBSZrrbk |
| 40082 | { 7074, 3, 1, 0, 384, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x17034f0052829ULL }, // Inst #7074 = VCVTPS2IBSZrrb |
| 40083 | { 7073, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe834f0052829ULL }, // Inst #7073 = VCVTPS2IBSZrr |
| 40084 | { 7072, 7, 1, 0, 383, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee34f0052819ULL }, // Inst #7072 = VCVTPS2IBSZrmkz |
| 40085 | { 7071, 8, 1, 0, 383, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea34f0052819ULL }, // Inst #7071 = VCVTPS2IBSZrmk |
| 40086 | { 7070, 7, 1, 0, 383, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e34f0052819ULL }, // Inst #7070 = VCVTPS2IBSZrmbkz |
| 40087 | { 7069, 8, 1, 0, 383, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a34f0052819ULL }, // Inst #7069 = VCVTPS2IBSZrmbk |
| 40088 | { 7068, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7834f0052819ULL }, // Inst #7068 = VCVTPS2IBSZrmb |
| 40089 | { 7067, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe834f0052819ULL }, // Inst #7067 = VCVTPS2IBSZrm |
| 40090 | { 7066, 3, 1, 0, 382, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc734f0052829ULL }, // Inst #7066 = VCVTPS2IBSZ256rrkz |
| 40091 | { 7065, 4, 1, 0, 382, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc334f0052829ULL }, // Inst #7065 = VCVTPS2IBSZ256rrk |
| 40092 | { 7064, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc134f0052829ULL }, // Inst #7064 = VCVTPS2IBSZ256rr |
| 40093 | { 7063, 7, 1, 0, 381, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc734f0052819ULL }, // Inst #7063 = VCVTPS2IBSZ256rmkz |
| 40094 | { 7062, 8, 1, 0, 381, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc334f0052819ULL }, // Inst #7062 = VCVTPS2IBSZ256rmk |
| 40095 | { 7061, 7, 1, 0, 381, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7734f0052819ULL }, // Inst #7061 = VCVTPS2IBSZ256rmbkz |
| 40096 | { 7060, 8, 1, 0, 381, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7334f0052819ULL }, // Inst #7060 = VCVTPS2IBSZ256rmbk |
| 40097 | { 7059, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7134f0052819ULL }, // Inst #7059 = VCVTPS2IBSZ256rmb |
| 40098 | { 7058, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc134f0052819ULL }, // Inst #7058 = VCVTPS2IBSZ256rm |
| 40099 | { 7057, 3, 1, 0, 149, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa634f0052829ULL }, // Inst #7057 = VCVTPS2IBSZ128rrkz |
| 40100 | { 7056, 4, 1, 0, 149, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa234f0052829ULL }, // Inst #7056 = VCVTPS2IBSZ128rrk |
| 40101 | { 7055, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa034f0052829ULL }, // Inst #7055 = VCVTPS2IBSZ128rr |
| 40102 | { 7054, 7, 1, 0, 148, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa634f0052819ULL }, // Inst #7054 = VCVTPS2IBSZ128rmkz |
| 40103 | { 7053, 8, 1, 0, 148, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa234f0052819ULL }, // Inst #7053 = VCVTPS2IBSZ128rmk |
| 40104 | { 7052, 7, 1, 0, 148, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7634f0052819ULL }, // Inst #7052 = VCVTPS2IBSZ128rmbkz |
| 40105 | { 7051, 8, 1, 0, 148, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7234f0052819ULL }, // Inst #7051 = VCVTPS2IBSZ128rmbk |
| 40106 | { 7050, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7034f0052819ULL }, // Inst #7050 = VCVTPS2IBSZ128rmb |
| 40107 | { 7049, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa034f0052819ULL }, // Inst #7049 = VCVTPS2IBSZ128rm |
| 40108 | { 7048, 2, 1, 0, 1004, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2db0002829ULL }, // Inst #7048 = VCVTPS2DQrr |
| 40109 | { 7047, 6, 1, 0, 1684, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2db0002819ULL }, // Inst #7047 = VCVTPS2DQrm |
| 40110 | { 7046, 3, 1, 0, 1861, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0002829ULL }, // Inst #7046 = VCVTPS2DQZrrkz |
| 40111 | { 7045, 4, 1, 0, 1861, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0002829ULL }, // Inst #7045 = VCVTPS2DQZrrk |
| 40112 | { 7044, 4, 1, 0, 1861, 1, 0, 3126, X86ImpOpBase + 78, 0, 0x17e2de0002829ULL }, // Inst #7044 = VCVTPS2DQZrrbkz |
| 40113 | { 7043, 5, 1, 0, 1861, 1, 0, 3121, X86ImpOpBase + 78, 0, 0x17a2de0002829ULL }, // Inst #7043 = VCVTPS2DQZrrbk |
| 40114 | { 7042, 3, 1, 0, 1861, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1782de0002829ULL }, // Inst #7042 = VCVTPS2DQZrrb |
| 40115 | { 7041, 2, 1, 0, 1264, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0002829ULL }, // Inst #7041 = VCVTPS2DQZrr |
| 40116 | { 7040, 7, 1, 0, 1378, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0002819ULL }, // Inst #7040 = VCVTPS2DQZrmkz |
| 40117 | { 7039, 8, 1, 0, 1378, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0002819ULL }, // Inst #7039 = VCVTPS2DQZrmk |
| 40118 | { 7038, 7, 1, 0, 1378, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2de0002819ULL }, // Inst #7038 = VCVTPS2DQZrmbkz |
| 40119 | { 7037, 8, 1, 0, 1378, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2de0002819ULL }, // Inst #7037 = VCVTPS2DQZrmbk |
| 40120 | { 7036, 6, 1, 0, 1378, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782de0002819ULL }, // Inst #7036 = VCVTPS2DQZrmb |
| 40121 | { 7035, 6, 1, 0, 1378, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0002819ULL }, // Inst #7035 = VCVTPS2DQZrm |
| 40122 | { 7034, 3, 1, 0, 1261, 1, 0, 2829, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0002829ULL }, // Inst #7034 = VCVTPS2DQZ256rrkz |
| 40123 | { 7033, 4, 1, 0, 1261, 1, 0, 2825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0002829ULL }, // Inst #7033 = VCVTPS2DQZ256rrk |
| 40124 | { 7032, 2, 1, 0, 1261, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0002829ULL }, // Inst #7032 = VCVTPS2DQZ256rr |
| 40125 | { 7031, 7, 1, 0, 1377, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0002819ULL }, // Inst #7031 = VCVTPS2DQZ256rmkz |
| 40126 | { 7030, 8, 1, 0, 1377, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0002819ULL }, // Inst #7030 = VCVTPS2DQZ256rmk |
| 40127 | { 7029, 7, 1, 0, 1377, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772de0002819ULL }, // Inst #7029 = VCVTPS2DQZ256rmbkz |
| 40128 | { 7028, 8, 1, 0, 1377, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732de0002819ULL }, // Inst #7028 = VCVTPS2DQZ256rmbk |
| 40129 | { 7027, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712de0002819ULL }, // Inst #7027 = VCVTPS2DQZ256rmb |
| 40130 | { 7026, 6, 1, 0, 1377, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0002819ULL }, // Inst #7026 = VCVTPS2DQZ256rm |
| 40131 | { 7025, 3, 1, 0, 1262, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0002829ULL }, // Inst #7025 = VCVTPS2DQZ128rrkz |
| 40132 | { 7024, 4, 1, 0, 1262, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0002829ULL }, // Inst #7024 = VCVTPS2DQZ128rrk |
| 40133 | { 7023, 2, 1, 0, 1262, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0002829ULL }, // Inst #7023 = VCVTPS2DQZ128rr |
| 40134 | { 7022, 7, 1, 0, 1361, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0002819ULL }, // Inst #7022 = VCVTPS2DQZ128rmkz |
| 40135 | { 7021, 8, 1, 0, 1361, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0002819ULL }, // Inst #7021 = VCVTPS2DQZ128rmk |
| 40136 | { 7020, 7, 1, 0, 1361, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762de0002819ULL }, // Inst #7020 = VCVTPS2DQZ128rmbkz |
| 40137 | { 7019, 8, 1, 0, 1361, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722de0002819ULL }, // Inst #7019 = VCVTPS2DQZ128rmbk |
| 40138 | { 7018, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702de0002819ULL }, // Inst #7018 = VCVTPS2DQZ128rmb |
| 40139 | { 7017, 6, 1, 0, 1361, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0002819ULL }, // Inst #7017 = VCVTPS2DQZ128rm |
| 40140 | { 7016, 2, 1, 0, 1261, 1, 0, 3116, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x12db0002829ULL }, // Inst #7016 = VCVTPS2DQYrr |
| 40141 | { 7015, 6, 1, 0, 1377, 1, 0, 2253, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x12db0002819ULL }, // Inst #7015 = VCVTPS2DQYrm |
| 40142 | { 7014, 3, 1, 0, 1927, 1, 0, 2987, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0012829ULL }, // Inst #7014 = VCVTPH2WZrrkz |
| 40143 | { 7013, 4, 1, 0, 1927, 1, 0, 2983, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0012829ULL }, // Inst #7013 = VCVTPH2WZrrk |
| 40144 | { 7012, 4, 1, 0, 1927, 1, 0, 3267, X86ImpOpBase + 78, 0, 0x15e3ee0012829ULL }, // Inst #7012 = VCVTPH2WZrrbkz |
| 40145 | { 7011, 5, 1, 0, 1927, 1, 0, 3262, X86ImpOpBase + 78, 0, 0x15a3ee0012829ULL }, // Inst #7011 = VCVTPH2WZrrbk |
| 40146 | { 7010, 3, 1, 0, 1920, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1583ee0012829ULL }, // Inst #7010 = VCVTPH2WZrrb |
| 40147 | { 7009, 2, 1, 0, 1920, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0012829ULL }, // Inst #7009 = VCVTPH2WZrr |
| 40148 | { 7008, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0012819ULL }, // Inst #7008 = VCVTPH2WZrmkz |
| 40149 | { 7007, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0012819ULL }, // Inst #7007 = VCVTPH2WZrmk |
| 40150 | { 7006, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ee0012819ULL }, // Inst #7006 = VCVTPH2WZrmbkz |
| 40151 | { 7005, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ee0012819ULL }, // Inst #7005 = VCVTPH2WZrmbk |
| 40152 | { 7004, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ee0012819ULL }, // Inst #7004 = VCVTPH2WZrmb |
| 40153 | { 7003, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0012819ULL }, // Inst #7003 = VCVTPH2WZrm |
| 40154 | { 7002, 3, 1, 0, 1906, 1, 0, 2965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0012829ULL }, // Inst #7002 = VCVTPH2WZ256rrkz |
| 40155 | { 7001, 4, 1, 0, 1906, 1, 0, 2961, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0012829ULL }, // Inst #7001 = VCVTPH2WZ256rrk |
| 40156 | { 7000, 2, 1, 0, 1777, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0012829ULL }, // Inst #7000 = VCVTPH2WZ256rr |
| 40157 | { 6999, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0012819ULL }, // Inst #6999 = VCVTPH2WZ256rmkz |
| 40158 | { 6998, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0012819ULL }, // Inst #6998 = VCVTPH2WZ256rmk |
| 40159 | { 6997, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ee0012819ULL }, // Inst #6997 = VCVTPH2WZ256rmbkz |
| 40160 | { 6996, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ee0012819ULL }, // Inst #6996 = VCVTPH2WZ256rmbk |
| 40161 | { 6995, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ee0012819ULL }, // Inst #6995 = VCVTPH2WZ256rmb |
| 40162 | { 6994, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0012819ULL }, // Inst #6994 = VCVTPH2WZ256rm |
| 40163 | { 6993, 3, 1, 0, 1905, 1, 0, 2943, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0012829ULL }, // Inst #6993 = VCVTPH2WZ128rrkz |
| 40164 | { 6992, 4, 1, 0, 1905, 1, 0, 2939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0012829ULL }, // Inst #6992 = VCVTPH2WZ128rrk |
| 40165 | { 6991, 2, 1, 0, 1776, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0012829ULL }, // Inst #6991 = VCVTPH2WZ128rr |
| 40166 | { 6990, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0012819ULL }, // Inst #6990 = VCVTPH2WZ128rmkz |
| 40167 | { 6989, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0012819ULL }, // Inst #6989 = VCVTPH2WZ128rmk |
| 40168 | { 6988, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ee0012819ULL }, // Inst #6988 = VCVTPH2WZ128rmbkz |
| 40169 | { 6987, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ee0012819ULL }, // Inst #6987 = VCVTPH2WZ128rmbk |
| 40170 | { 6986, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ee0012819ULL }, // Inst #6986 = VCVTPH2WZ128rmb |
| 40171 | { 6985, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0012819ULL }, // Inst #6985 = VCVTPH2WZ128rm |
| 40172 | { 6984, 3, 1, 0, 1927, 1, 0, 2987, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0012029ULL }, // Inst #6984 = VCVTPH2UWZrrkz |
| 40173 | { 6983, 4, 1, 0, 1927, 1, 0, 2983, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0012029ULL }, // Inst #6983 = VCVTPH2UWZrrk |
| 40174 | { 6982, 4, 1, 0, 1927, 1, 0, 3267, X86ImpOpBase + 78, 0, 0x15e3ee0012029ULL }, // Inst #6982 = VCVTPH2UWZrrbkz |
| 40175 | { 6981, 5, 1, 0, 1927, 1, 0, 3262, X86ImpOpBase + 78, 0, 0x15a3ee0012029ULL }, // Inst #6981 = VCVTPH2UWZrrbk |
| 40176 | { 6980, 3, 1, 0, 1920, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1583ee0012029ULL }, // Inst #6980 = VCVTPH2UWZrrb |
| 40177 | { 6979, 2, 1, 0, 1920, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0012029ULL }, // Inst #6979 = VCVTPH2UWZrr |
| 40178 | { 6978, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0012019ULL }, // Inst #6978 = VCVTPH2UWZrmkz |
| 40179 | { 6977, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0012019ULL }, // Inst #6977 = VCVTPH2UWZrmk |
| 40180 | { 6976, 7, 1, 0, 399, 1, 0, 2976, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ee0012019ULL }, // Inst #6976 = VCVTPH2UWZrmbkz |
| 40181 | { 6975, 8, 1, 0, 399, 1, 0, 2968, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ee0012019ULL }, // Inst #6975 = VCVTPH2UWZrmbk |
| 40182 | { 6974, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ee0012019ULL }, // Inst #6974 = VCVTPH2UWZrmb |
| 40183 | { 6973, 6, 1, 0, 399, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0012019ULL }, // Inst #6973 = VCVTPH2UWZrm |
| 40184 | { 6972, 3, 1, 0, 1906, 1, 0, 2965, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0012029ULL }, // Inst #6972 = VCVTPH2UWZ256rrkz |
| 40185 | { 6971, 4, 1, 0, 1906, 1, 0, 2961, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0012029ULL }, // Inst #6971 = VCVTPH2UWZ256rrk |
| 40186 | { 6970, 2, 1, 0, 1777, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0012029ULL }, // Inst #6970 = VCVTPH2UWZ256rr |
| 40187 | { 6969, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0012019ULL }, // Inst #6969 = VCVTPH2UWZ256rmkz |
| 40188 | { 6968, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0012019ULL }, // Inst #6968 = VCVTPH2UWZ256rmk |
| 40189 | { 6967, 7, 1, 0, 397, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ee0012019ULL }, // Inst #6967 = VCVTPH2UWZ256rmbkz |
| 40190 | { 6966, 8, 1, 0, 397, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ee0012019ULL }, // Inst #6966 = VCVTPH2UWZ256rmbk |
| 40191 | { 6965, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ee0012019ULL }, // Inst #6965 = VCVTPH2UWZ256rmb |
| 40192 | { 6964, 6, 1, 0, 397, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0012019ULL }, // Inst #6964 = VCVTPH2UWZ256rm |
| 40193 | { 6963, 3, 1, 0, 1905, 1, 0, 2943, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0012029ULL }, // Inst #6963 = VCVTPH2UWZ128rrkz |
| 40194 | { 6962, 4, 1, 0, 1905, 1, 0, 2939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0012029ULL }, // Inst #6962 = VCVTPH2UWZ128rrk |
| 40195 | { 6961, 2, 1, 0, 1776, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0012029ULL }, // Inst #6961 = VCVTPH2UWZ128rr |
| 40196 | { 6960, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0012019ULL }, // Inst #6960 = VCVTPH2UWZ128rmkz |
| 40197 | { 6959, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0012019ULL }, // Inst #6959 = VCVTPH2UWZ128rmk |
| 40198 | { 6958, 7, 1, 0, 94, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ee0012019ULL }, // Inst #6958 = VCVTPH2UWZ128rmbkz |
| 40199 | { 6957, 8, 1, 0, 94, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ee0012019ULL }, // Inst #6957 = VCVTPH2UWZ128rmbk |
| 40200 | { 6956, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ee0012019ULL }, // Inst #6956 = VCVTPH2UWZ128rmb |
| 40201 | { 6955, 6, 1, 0, 94, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0012019ULL }, // Inst #6955 = VCVTPH2UWZ128rm |
| 40202 | { 6954, 3, 1, 0, 404, 1, 0, 2420, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae3ce0012829ULL }, // Inst #6954 = VCVTPH2UQQZrrkz |
| 40203 | { 6953, 4, 1, 0, 404, 1, 0, 2416, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaa3ce0012829ULL }, // Inst #6953 = VCVTPH2UQQZrrk |
| 40204 | { 6952, 4, 1, 0, 404, 1, 0, 3279, X86ImpOpBase + 78, 0, 0x15e3ce0012829ULL }, // Inst #6952 = VCVTPH2UQQZrrbkz |
| 40205 | { 6951, 5, 1, 0, 404, 1, 0, 3274, X86ImpOpBase + 78, 0, 0x15a3ce0012829ULL }, // Inst #6951 = VCVTPH2UQQZrrbk |
| 40206 | { 6950, 3, 1, 0, 404, 1, 0, 3271, X86ImpOpBase + 78, 0, 0x1583ce0012829ULL }, // Inst #6950 = VCVTPH2UQQZrrb |
| 40207 | { 6949, 2, 1, 0, 404, 1, 0, 2344, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa83ce0012829ULL }, // Inst #6949 = VCVTPH2UQQZrr |
| 40208 | { 6948, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae3ce0012819ULL }, // Inst #6948 = VCVTPH2UQQZrmkz |
| 40209 | { 6947, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaa3ce0012819ULL }, // Inst #6947 = VCVTPH2UQQZrmk |
| 40210 | { 6946, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ce0012819ULL }, // Inst #6946 = VCVTPH2UQQZrmbkz |
| 40211 | { 6945, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ce0012819ULL }, // Inst #6945 = VCVTPH2UQQZrmbk |
| 40212 | { 6944, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ce0012819ULL }, // Inst #6944 = VCVTPH2UQQZrmb |
| 40213 | { 6943, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa83ce0012819ULL }, // Inst #6943 = VCVTPH2UQQZrm |
| 40214 | { 6942, 3, 1, 0, 2118, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x873ce0012829ULL }, // Inst #6942 = VCVTPH2UQQZ256rrkz |
| 40215 | { 6941, 4, 1, 0, 2118, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x833ce0012829ULL }, // Inst #6941 = VCVTPH2UQQZ256rrk |
| 40216 | { 6940, 2, 1, 0, 2118, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x813ce0012829ULL }, // Inst #6940 = VCVTPH2UQQZ256rr |
| 40217 | { 6939, 7, 1, 0, 2119, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x873ce0012819ULL }, // Inst #6939 = VCVTPH2UQQZ256rmkz |
| 40218 | { 6938, 8, 1, 0, 2119, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x833ce0012819ULL }, // Inst #6938 = VCVTPH2UQQZ256rmk |
| 40219 | { 6937, 7, 1, 0, 2119, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ce0012819ULL }, // Inst #6937 = VCVTPH2UQQZ256rmbkz |
| 40220 | { 6936, 8, 1, 0, 2119, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ce0012819ULL }, // Inst #6936 = VCVTPH2UQQZ256rmbk |
| 40221 | { 6935, 6, 1, 0, 2119, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ce0012819ULL }, // Inst #6935 = VCVTPH2UQQZ256rmb |
| 40222 | { 6934, 6, 1, 0, 2119, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x813ce0012819ULL }, // Inst #6934 = VCVTPH2UQQZ256rm |
| 40223 | { 6933, 3, 1, 0, 2117, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x663ce0012829ULL }, // Inst #6933 = VCVTPH2UQQZ128rrkz |
| 40224 | { 6932, 4, 1, 0, 2117, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x623ce0012829ULL }, // Inst #6932 = VCVTPH2UQQZ128rrk |
| 40225 | { 6931, 2, 1, 0, 2117, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603ce0012829ULL }, // Inst #6931 = VCVTPH2UQQZ128rr |
| 40226 | { 6930, 7, 1, 0, 2116, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x663ce0012819ULL }, // Inst #6930 = VCVTPH2UQQZ128rmkz |
| 40227 | { 6929, 8, 1, 0, 2116, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x623ce0012819ULL }, // Inst #6929 = VCVTPH2UQQZ128rmk |
| 40228 | { 6928, 7, 1, 0, 2116, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ce0012819ULL }, // Inst #6928 = VCVTPH2UQQZ128rmbkz |
| 40229 | { 6927, 8, 1, 0, 2116, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ce0012819ULL }, // Inst #6927 = VCVTPH2UQQZ128rmbk |
| 40230 | { 6926, 6, 1, 0, 2116, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ce0012819ULL }, // Inst #6926 = VCVTPH2UQQZ128rmb |
| 40231 | { 6925, 6, 1, 0, 2116, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603ce0012819ULL }, // Inst #6925 = VCVTPH2UQQZ128rm |
| 40232 | { 6924, 3, 1, 0, 2094, 1, 0, 3259, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3ce0012029ULL }, // Inst #6924 = VCVTPH2UDQZrrkz |
| 40233 | { 6923, 4, 1, 0, 2094, 1, 0, 3255, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3ce0012029ULL }, // Inst #6923 = VCVTPH2UDQZrrk |
| 40234 | { 6922, 4, 1, 0, 2094, 1, 0, 3251, X86ImpOpBase + 78, 0, 0x15e3ce0012029ULL }, // Inst #6922 = VCVTPH2UDQZrrbkz |
| 40235 | { 6921, 5, 1, 0, 2094, 1, 0, 3246, X86ImpOpBase + 78, 0, 0x15a3ce0012029ULL }, // Inst #6921 = VCVTPH2UDQZrrbk |
| 40236 | { 6920, 3, 1, 0, 2086, 1, 0, 3243, X86ImpOpBase + 78, 0, 0x1583ce0012029ULL }, // Inst #6920 = VCVTPH2UDQZrrb |
| 40237 | { 6919, 2, 1, 0, 2086, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83ce0012029ULL }, // Inst #6919 = VCVTPH2UDQZrr |
| 40238 | { 6918, 7, 1, 0, 2083, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3ce0012019ULL }, // Inst #6918 = VCVTPH2UDQZrmkz |
| 40239 | { 6917, 8, 1, 0, 2083, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3ce0012019ULL }, // Inst #6917 = VCVTPH2UDQZrmk |
| 40240 | { 6916, 7, 1, 0, 2083, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ce0012019ULL }, // Inst #6916 = VCVTPH2UDQZrmbkz |
| 40241 | { 6915, 8, 1, 0, 2083, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ce0012019ULL }, // Inst #6915 = VCVTPH2UDQZrmbk |
| 40242 | { 6914, 6, 1, 0, 2030, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ce0012019ULL }, // Inst #6914 = VCVTPH2UDQZrmb |
| 40243 | { 6913, 6, 1, 0, 2030, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83ce0012019ULL }, // Inst #6913 = VCVTPH2UDQZrm |
| 40244 | { 6912, 3, 1, 0, 2075, 1, 0, 2320, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73ce0012029ULL }, // Inst #6912 = VCVTPH2UDQZ256rrkz |
| 40245 | { 6911, 4, 1, 0, 2075, 1, 0, 2316, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33ce0012029ULL }, // Inst #6911 = VCVTPH2UDQZ256rrk |
| 40246 | { 6910, 2, 1, 0, 1813, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13ce0012029ULL }, // Inst #6910 = VCVTPH2UDQZ256rr |
| 40247 | { 6909, 7, 1, 0, 2080, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73ce0012019ULL }, // Inst #6909 = VCVTPH2UDQZ256rmkz |
| 40248 | { 6908, 8, 1, 0, 2080, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33ce0012019ULL }, // Inst #6908 = VCVTPH2UDQZ256rmk |
| 40249 | { 6907, 7, 1, 0, 2080, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ce0012019ULL }, // Inst #6907 = VCVTPH2UDQZ256rmbkz |
| 40250 | { 6906, 8, 1, 0, 2080, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ce0012019ULL }, // Inst #6906 = VCVTPH2UDQZ256rmbk |
| 40251 | { 6905, 6, 1, 0, 2026, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ce0012019ULL }, // Inst #6905 = VCVTPH2UDQZ256rmb |
| 40252 | { 6904, 6, 1, 0, 2026, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13ce0012019ULL }, // Inst #6904 = VCVTPH2UDQZ256rm |
| 40253 | { 6903, 3, 1, 0, 2074, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x863ce0012029ULL }, // Inst #6903 = VCVTPH2UDQZ128rrkz |
| 40254 | { 6902, 4, 1, 0, 2074, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x823ce0012029ULL }, // Inst #6902 = VCVTPH2UDQZ128rrk |
| 40255 | { 6901, 2, 1, 0, 1812, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x803ce0012029ULL }, // Inst #6901 = VCVTPH2UDQZ128rr |
| 40256 | { 6900, 7, 1, 0, 2073, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863ce0012019ULL }, // Inst #6900 = VCVTPH2UDQZ128rmkz |
| 40257 | { 6899, 8, 1, 0, 2073, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823ce0012019ULL }, // Inst #6899 = VCVTPH2UDQZ128rmk |
| 40258 | { 6898, 7, 1, 0, 2073, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ce0012019ULL }, // Inst #6898 = VCVTPH2UDQZ128rmbkz |
| 40259 | { 6897, 8, 1, 0, 2073, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ce0012019ULL }, // Inst #6897 = VCVTPH2UDQZ128rmbk |
| 40260 | { 6896, 6, 1, 0, 2071, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ce0012019ULL }, // Inst #6896 = VCVTPH2UDQZ128rmb |
| 40261 | { 6895, 6, 1, 0, 2071, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803ce0012019ULL }, // Inst #6895 = VCVTPH2UDQZ128rm |
| 40262 | { 6894, 3, 1, 0, 404, 1, 0, 2420, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae3de0012829ULL }, // Inst #6894 = VCVTPH2QQZrrkz |
| 40263 | { 6893, 4, 1, 0, 404, 1, 0, 2416, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaa3de0012829ULL }, // Inst #6893 = VCVTPH2QQZrrk |
| 40264 | { 6892, 4, 1, 0, 404, 1, 0, 3279, X86ImpOpBase + 78, 0, 0x15e3de0012829ULL }, // Inst #6892 = VCVTPH2QQZrrbkz |
| 40265 | { 6891, 5, 1, 0, 404, 1, 0, 3274, X86ImpOpBase + 78, 0, 0x15a3de0012829ULL }, // Inst #6891 = VCVTPH2QQZrrbk |
| 40266 | { 6890, 3, 1, 0, 404, 1, 0, 3271, X86ImpOpBase + 78, 0, 0x1583de0012829ULL }, // Inst #6890 = VCVTPH2QQZrrb |
| 40267 | { 6889, 2, 1, 0, 404, 1, 0, 2344, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa83de0012829ULL }, // Inst #6889 = VCVTPH2QQZrr |
| 40268 | { 6888, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae3de0012819ULL }, // Inst #6888 = VCVTPH2QQZrmkz |
| 40269 | { 6887, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaa3de0012819ULL }, // Inst #6887 = VCVTPH2QQZrmk |
| 40270 | { 6886, 7, 1, 0, 403, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3de0012819ULL }, // Inst #6886 = VCVTPH2QQZrmbkz |
| 40271 | { 6885, 8, 1, 0, 403, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3de0012819ULL }, // Inst #6885 = VCVTPH2QQZrmbk |
| 40272 | { 6884, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583de0012819ULL }, // Inst #6884 = VCVTPH2QQZrmb |
| 40273 | { 6883, 6, 1, 0, 403, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa83de0012819ULL }, // Inst #6883 = VCVTPH2QQZrm |
| 40274 | { 6882, 3, 1, 0, 2118, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x873de0012829ULL }, // Inst #6882 = VCVTPH2QQZ256rrkz |
| 40275 | { 6881, 4, 1, 0, 2118, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x833de0012829ULL }, // Inst #6881 = VCVTPH2QQZ256rrk |
| 40276 | { 6880, 2, 1, 0, 2118, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x813de0012829ULL }, // Inst #6880 = VCVTPH2QQZ256rr |
| 40277 | { 6879, 7, 1, 0, 2119, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x873de0012819ULL }, // Inst #6879 = VCVTPH2QQZ256rmkz |
| 40278 | { 6878, 8, 1, 0, 2119, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x833de0012819ULL }, // Inst #6878 = VCVTPH2QQZ256rmk |
| 40279 | { 6877, 7, 1, 0, 2119, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573de0012819ULL }, // Inst #6877 = VCVTPH2QQZ256rmbkz |
| 40280 | { 6876, 8, 1, 0, 2119, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533de0012819ULL }, // Inst #6876 = VCVTPH2QQZ256rmbk |
| 40281 | { 6875, 6, 1, 0, 2119, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513de0012819ULL }, // Inst #6875 = VCVTPH2QQZ256rmb |
| 40282 | { 6874, 6, 1, 0, 2119, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x813de0012819ULL }, // Inst #6874 = VCVTPH2QQZ256rm |
| 40283 | { 6873, 3, 1, 0, 2117, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x663de0012829ULL }, // Inst #6873 = VCVTPH2QQZ128rrkz |
| 40284 | { 6872, 4, 1, 0, 2117, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x623de0012829ULL }, // Inst #6872 = VCVTPH2QQZ128rrk |
| 40285 | { 6871, 2, 1, 0, 2117, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x603de0012829ULL }, // Inst #6871 = VCVTPH2QQZ128rr |
| 40286 | { 6870, 7, 1, 0, 2116, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x663de0012819ULL }, // Inst #6870 = VCVTPH2QQZ128rmkz |
| 40287 | { 6869, 8, 1, 0, 2116, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x623de0012819ULL }, // Inst #6869 = VCVTPH2QQZ128rmk |
| 40288 | { 6868, 7, 1, 0, 2116, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563de0012819ULL }, // Inst #6868 = VCVTPH2QQZ128rmbkz |
| 40289 | { 6867, 8, 1, 0, 2116, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523de0012819ULL }, // Inst #6867 = VCVTPH2QQZ128rmbk |
| 40290 | { 6866, 6, 1, 0, 2116, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503de0012819ULL }, // Inst #6866 = VCVTPH2QQZ128rmb |
| 40291 | { 6865, 6, 1, 0, 2116, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603de0012819ULL }, // Inst #6865 = VCVTPH2QQZ128rm |
| 40292 | { 6864, 2, 1, 0, 354, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x9a0004829ULL }, // Inst #6864 = VCVTPH2PSrr |
| 40293 | { 6863, 6, 1, 0, 410, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a0004819ULL }, // Inst #6863 = VCVTPH2PSrm |
| 40294 | { 6862, 3, 1, 0, 394, 1, 0, 3259, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce09e0004829ULL }, // Inst #6862 = VCVTPH2PSZrrkz |
| 40295 | { 6861, 4, 1, 0, 394, 1, 0, 3255, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca09e0004829ULL }, // Inst #6861 = VCVTPH2PSZrrk |
| 40296 | { 6860, 3, 1, 0, 394, 1, 0, 3259, X86ImpOpBase + 78, 0, 0x7e09e0004829ULL }, // Inst #6860 = VCVTPH2PSZrrbkz |
| 40297 | { 6859, 4, 1, 0, 394, 1, 0, 3255, X86ImpOpBase + 78, 0, 0x7a09e0004829ULL }, // Inst #6859 = VCVTPH2PSZrrbk |
| 40298 | { 6858, 2, 1, 0, 2088, 1, 0, 3077, X86ImpOpBase + 78, 0, 0x7809e0004829ULL }, // Inst #6858 = VCVTPH2PSZrrb |
| 40299 | { 6857, 2, 1, 0, 2088, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc809e0004829ULL }, // Inst #6857 = VCVTPH2PSZrr |
| 40300 | { 6856, 7, 1, 0, 1372, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce09e0004819ULL }, // Inst #6856 = VCVTPH2PSZrmkz |
| 40301 | { 6855, 8, 1, 0, 1372, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca09e0004819ULL }, // Inst #6855 = VCVTPH2PSZrmk |
| 40302 | { 6854, 6, 1, 0, 2114, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc809e0004819ULL }, // Inst #6854 = VCVTPH2PSZrm |
| 40303 | { 6853, 3, 1, 0, 2077, 1, 0, 2320, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa709e0004829ULL }, // Inst #6853 = VCVTPH2PSZ256rrkz |
| 40304 | { 6852, 4, 1, 0, 2077, 1, 0, 2316, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa309e0004829ULL }, // Inst #6852 = VCVTPH2PSZ256rrk |
| 40305 | { 6851, 2, 1, 0, 353, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa109e0004829ULL }, // Inst #6851 = VCVTPH2PSZ256rr |
| 40306 | { 6850, 7, 1, 0, 2110, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa709e0004819ULL }, // Inst #6850 = VCVTPH2PSZ256rmkz |
| 40307 | { 6849, 8, 1, 0, 2110, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa309e0004819ULL }, // Inst #6849 = VCVTPH2PSZ256rmk |
| 40308 | { 6848, 6, 1, 0, 1371, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa109e0004819ULL }, // Inst #6848 = VCVTPH2PSZ256rm |
| 40309 | { 6847, 3, 1, 0, 2106, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8609e0004829ULL }, // Inst #6847 = VCVTPH2PSZ128rrkz |
| 40310 | { 6846, 4, 1, 0, 2106, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8209e0004829ULL }, // Inst #6846 = VCVTPH2PSZ128rrk |
| 40311 | { 6845, 2, 1, 0, 354, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8009e0004829ULL }, // Inst #6845 = VCVTPH2PSZ128rr |
| 40312 | { 6844, 7, 1, 0, 2109, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8609e0004819ULL }, // Inst #6844 = VCVTPH2PSZ128rmkz |
| 40313 | { 6843, 8, 1, 0, 2109, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8209e0004819ULL }, // Inst #6843 = VCVTPH2PSZ128rmk |
| 40314 | { 6842, 6, 1, 0, 1360, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8009e0004819ULL }, // Inst #6842 = VCVTPH2PSZ128rm |
| 40315 | { 6841, 2, 1, 0, 353, 1, 0, 2407, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x109a0004829ULL }, // Inst #6841 = VCVTPH2PSYrr |
| 40316 | { 6840, 6, 1, 0, 409, 1, 0, 2253, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x109a0004819ULL }, // Inst #6840 = VCVTPH2PSYrm |
| 40317 | { 6839, 3, 1, 0, 2095, 1, 0, 3259, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce09e0014829ULL }, // Inst #6839 = VCVTPH2PSXZrrkz |
| 40318 | { 6838, 4, 1, 0, 2095, 1, 0, 3255, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca09e0014829ULL }, // Inst #6838 = VCVTPH2PSXZrrk |
| 40319 | { 6837, 3, 1, 0, 2095, 1, 0, 3259, X86ImpOpBase + 78, 0, 0x5e09e0014829ULL }, // Inst #6837 = VCVTPH2PSXZrrbkz |
| 40320 | { 6836, 4, 1, 0, 2095, 1, 0, 3255, X86ImpOpBase + 78, 0, 0x5a09e0014829ULL }, // Inst #6836 = VCVTPH2PSXZrrbk |
| 40321 | { 6835, 2, 1, 0, 2087, 1, 0, 3077, X86ImpOpBase + 78, 0, 0x5809e0014829ULL }, // Inst #6835 = VCVTPH2PSXZrrb |
| 40322 | { 6834, 2, 1, 0, 2087, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc809e0014829ULL }, // Inst #6834 = VCVTPH2PSXZrr |
| 40323 | { 6833, 7, 1, 0, 2084, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce09e0014819ULL }, // Inst #6833 = VCVTPH2PSXZrmkz |
| 40324 | { 6832, 8, 1, 0, 2084, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca09e0014819ULL }, // Inst #6832 = VCVTPH2PSXZrmk |
| 40325 | { 6831, 7, 1, 0, 2084, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e09e0014819ULL }, // Inst #6831 = VCVTPH2PSXZrmbkz |
| 40326 | { 6830, 8, 1, 0, 2084, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a09e0014819ULL }, // Inst #6830 = VCVTPH2PSXZrmbk |
| 40327 | { 6829, 6, 1, 0, 2031, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5809e0014819ULL }, // Inst #6829 = VCVTPH2PSXZrmb |
| 40328 | { 6828, 6, 1, 0, 2031, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc809e0014819ULL }, // Inst #6828 = VCVTPH2PSXZrm |
| 40329 | { 6827, 3, 1, 0, 2076, 1, 0, 2320, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa709e0014829ULL }, // Inst #6827 = VCVTPH2PSXZ256rrkz |
| 40330 | { 6826, 4, 1, 0, 2076, 1, 0, 2316, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa309e0014829ULL }, // Inst #6826 = VCVTPH2PSXZ256rrk |
| 40331 | { 6825, 2, 1, 0, 1814, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa109e0014829ULL }, // Inst #6825 = VCVTPH2PSXZ256rr |
| 40332 | { 6824, 7, 1, 0, 2081, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa709e0014819ULL }, // Inst #6824 = VCVTPH2PSXZ256rmkz |
| 40333 | { 6823, 8, 1, 0, 2081, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa309e0014819ULL }, // Inst #6823 = VCVTPH2PSXZ256rmk |
| 40334 | { 6822, 7, 1, 0, 2081, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5709e0014819ULL }, // Inst #6822 = VCVTPH2PSXZ256rmbkz |
| 40335 | { 6821, 8, 1, 0, 2081, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5309e0014819ULL }, // Inst #6821 = VCVTPH2PSXZ256rmbk |
| 40336 | { 6820, 6, 1, 0, 2028, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5109e0014819ULL }, // Inst #6820 = VCVTPH2PSXZ256rmb |
| 40337 | { 6819, 6, 1, 0, 2028, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa109e0014819ULL }, // Inst #6819 = VCVTPH2PSXZ256rm |
| 40338 | { 6818, 3, 1, 0, 2105, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8609e0014829ULL }, // Inst #6818 = VCVTPH2PSXZ128rrkz |
| 40339 | { 6817, 4, 1, 0, 2105, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8209e0014829ULL }, // Inst #6817 = VCVTPH2PSXZ128rrk |
| 40340 | { 6816, 2, 1, 0, 1816, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x8009e0014829ULL }, // Inst #6816 = VCVTPH2PSXZ128rr |
| 40341 | { 6815, 7, 1, 0, 2027, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8609e0014819ULL }, // Inst #6815 = VCVTPH2PSXZ128rmkz |
| 40342 | { 6814, 8, 1, 0, 2027, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8209e0014819ULL }, // Inst #6814 = VCVTPH2PSXZ128rmk |
| 40343 | { 6813, 7, 1, 0, 2027, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5609e0014819ULL }, // Inst #6813 = VCVTPH2PSXZ128rmbkz |
| 40344 | { 6812, 8, 1, 0, 2027, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5209e0014819ULL }, // Inst #6812 = VCVTPH2PSXZ128rmbk |
| 40345 | { 6811, 6, 1, 0, 1740, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5009e0014819ULL }, // Inst #6811 = VCVTPH2PSXZ128rmb |
| 40346 | { 6810, 6, 1, 0, 1740, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8009e0014819ULL }, // Inst #6810 = VCVTPH2PSXZ128rm |
| 40347 | { 6809, 3, 1, 0, 2047, 1, 0, 2420, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xae2d60012029ULL }, // Inst #6809 = VCVTPH2PDZrrkz |
| 40348 | { 6808, 4, 1, 0, 2047, 1, 0, 2416, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xaa2d60012029ULL }, // Inst #6808 = VCVTPH2PDZrrk |
| 40349 | { 6807, 3, 1, 0, 2047, 1, 0, 2420, X86ImpOpBase + 78, 0, 0x5e2d60012029ULL }, // Inst #6807 = VCVTPH2PDZrrbkz |
| 40350 | { 6806, 4, 1, 0, 2047, 1, 0, 2416, X86ImpOpBase + 78, 0, 0x5a2d60012029ULL }, // Inst #6806 = VCVTPH2PDZrrbk |
| 40351 | { 6805, 2, 1, 0, 2045, 1, 0, 2344, X86ImpOpBase + 78, 0, 0x582d60012029ULL }, // Inst #6805 = VCVTPH2PDZrrb |
| 40352 | { 6804, 2, 1, 0, 2045, 1, 0, 2344, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa82d60012029ULL }, // Inst #6804 = VCVTPH2PDZrr |
| 40353 | { 6803, 7, 1, 0, 2043, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae2d60012019ULL }, // Inst #6803 = VCVTPH2PDZrmkz |
| 40354 | { 6802, 8, 1, 0, 2043, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaa2d60012019ULL }, // Inst #6802 = VCVTPH2PDZrmk |
| 40355 | { 6801, 7, 1, 0, 2043, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e2d60012019ULL }, // Inst #6801 = VCVTPH2PDZrmbkz |
| 40356 | { 6800, 8, 1, 0, 2043, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a2d60012019ULL }, // Inst #6800 = VCVTPH2PDZrmbk |
| 40357 | { 6799, 6, 1, 0, 2041, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x582d60012019ULL }, // Inst #6799 = VCVTPH2PDZrmb |
| 40358 | { 6798, 6, 1, 0, 2041, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa82d60012019ULL }, // Inst #6798 = VCVTPH2PDZrm |
| 40359 | { 6797, 3, 1, 0, 2104, 1, 0, 2413, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x872d60012029ULL }, // Inst #6797 = VCVTPH2PDZ256rrkz |
| 40360 | { 6796, 4, 1, 0, 2104, 1, 0, 2409, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x832d60012029ULL }, // Inst #6796 = VCVTPH2PDZ256rrk |
| 40361 | { 6795, 2, 1, 0, 2103, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x812d60012029ULL }, // Inst #6795 = VCVTPH2PDZ256rr |
| 40362 | { 6794, 7, 1, 0, 2102, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x872d60012019ULL }, // Inst #6794 = VCVTPH2PDZ256rmkz |
| 40363 | { 6793, 8, 1, 0, 2102, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x832d60012019ULL }, // Inst #6793 = VCVTPH2PDZ256rmk |
| 40364 | { 6792, 7, 1, 0, 2102, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x572d60012019ULL }, // Inst #6792 = VCVTPH2PDZ256rmbkz |
| 40365 | { 6791, 8, 1, 0, 2102, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x532d60012019ULL }, // Inst #6791 = VCVTPH2PDZ256rmbk |
| 40366 | { 6790, 6, 1, 0, 2101, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x512d60012019ULL }, // Inst #6790 = VCVTPH2PDZ256rmb |
| 40367 | { 6789, 6, 1, 0, 2101, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x812d60012019ULL }, // Inst #6789 = VCVTPH2PDZ256rm |
| 40368 | { 6788, 3, 1, 0, 2100, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x662d60012029ULL }, // Inst #6788 = VCVTPH2PDZ128rrkz |
| 40369 | { 6787, 4, 1, 0, 2100, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x622d60012029ULL }, // Inst #6787 = VCVTPH2PDZ128rrk |
| 40370 | { 6786, 2, 1, 0, 2099, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x602d60012029ULL }, // Inst #6786 = VCVTPH2PDZ128rr |
| 40371 | { 6785, 7, 1, 0, 2098, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x662d60012019ULL }, // Inst #6785 = VCVTPH2PDZ128rmkz |
| 40372 | { 6784, 8, 1, 0, 2098, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x622d60012019ULL }, // Inst #6784 = VCVTPH2PDZ128rmk |
| 40373 | { 6783, 7, 1, 0, 2098, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x562d60012019ULL }, // Inst #6783 = VCVTPH2PDZ128rmbkz |
| 40374 | { 6782, 8, 1, 0, 2098, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x522d60012019ULL }, // Inst #6782 = VCVTPH2PDZ128rmbk |
| 40375 | { 6781, 6, 1, 0, 2097, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x502d60012019ULL }, // Inst #6781 = VCVTPH2PDZ128rmb |
| 40376 | { 6780, 6, 1, 0, 2097, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x602d60012019ULL }, // Inst #6780 = VCVTPH2PDZ128rm |
| 40377 | { 6779, 3, 1, 0, 384, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee35e8052029ULL }, // Inst #6779 = VCVTPH2IUBSZrrkz |
| 40378 | { 6778, 4, 1, 0, 384, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea35e8052029ULL }, // Inst #6778 = VCVTPH2IUBSZrrk |
| 40379 | { 6777, 4, 1, 0, 384, 1, 0, 3267, X86ImpOpBase + 78, 0, 0x15635e8052029ULL }, // Inst #6777 = VCVTPH2IUBSZrrbkz |
| 40380 | { 6776, 5, 1, 0, 384, 1, 0, 3262, X86ImpOpBase + 78, 0, 0x15235e8052029ULL }, // Inst #6776 = VCVTPH2IUBSZrrbk |
| 40381 | { 6775, 3, 1, 0, 384, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x15035e8052029ULL }, // Inst #6775 = VCVTPH2IUBSZrrb |
| 40382 | { 6774, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe835e8052029ULL }, // Inst #6774 = VCVTPH2IUBSZrr |
| 40383 | { 6773, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee35e8052019ULL }, // Inst #6773 = VCVTPH2IUBSZrmkz |
| 40384 | { 6772, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea35e8052019ULL }, // Inst #6772 = VCVTPH2IUBSZrmk |
| 40385 | { 6771, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e35e8052019ULL }, // Inst #6771 = VCVTPH2IUBSZrmbkz |
| 40386 | { 6770, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a35e8052019ULL }, // Inst #6770 = VCVTPH2IUBSZrmbk |
| 40387 | { 6769, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5835e8052019ULL }, // Inst #6769 = VCVTPH2IUBSZrmb |
| 40388 | { 6768, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe835e8052019ULL }, // Inst #6768 = VCVTPH2IUBSZrm |
| 40389 | { 6767, 3, 1, 0, 382, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc735e8052029ULL }, // Inst #6767 = VCVTPH2IUBSZ256rrkz |
| 40390 | { 6766, 4, 1, 0, 382, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc335e8052029ULL }, // Inst #6766 = VCVTPH2IUBSZ256rrk |
| 40391 | { 6765, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc135e8052029ULL }, // Inst #6765 = VCVTPH2IUBSZ256rr |
| 40392 | { 6764, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc735e8052019ULL }, // Inst #6764 = VCVTPH2IUBSZ256rmkz |
| 40393 | { 6763, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc335e8052019ULL }, // Inst #6763 = VCVTPH2IUBSZ256rmk |
| 40394 | { 6762, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5735e8052019ULL }, // Inst #6762 = VCVTPH2IUBSZ256rmbkz |
| 40395 | { 6761, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5335e8052019ULL }, // Inst #6761 = VCVTPH2IUBSZ256rmbk |
| 40396 | { 6760, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5135e8052019ULL }, // Inst #6760 = VCVTPH2IUBSZ256rmb |
| 40397 | { 6759, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc135e8052019ULL }, // Inst #6759 = VCVTPH2IUBSZ256rm |
| 40398 | { 6758, 3, 1, 0, 149, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa635e8052029ULL }, // Inst #6758 = VCVTPH2IUBSZ128rrkz |
| 40399 | { 6757, 4, 1, 0, 149, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa235e8052029ULL }, // Inst #6757 = VCVTPH2IUBSZ128rrk |
| 40400 | { 6756, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa035e8052029ULL }, // Inst #6756 = VCVTPH2IUBSZ128rr |
| 40401 | { 6755, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa635e8052019ULL }, // Inst #6755 = VCVTPH2IUBSZ128rmkz |
| 40402 | { 6754, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa235e8052019ULL }, // Inst #6754 = VCVTPH2IUBSZ128rmk |
| 40403 | { 6753, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5635e8052019ULL }, // Inst #6753 = VCVTPH2IUBSZ128rmbkz |
| 40404 | { 6752, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5235e8052019ULL }, // Inst #6752 = VCVTPH2IUBSZ128rmbk |
| 40405 | { 6751, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5035e8052019ULL }, // Inst #6751 = VCVTPH2IUBSZ128rmb |
| 40406 | { 6750, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa035e8052019ULL }, // Inst #6750 = VCVTPH2IUBSZ128rm |
| 40407 | { 6749, 3, 1, 0, 384, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee34e8052029ULL }, // Inst #6749 = VCVTPH2IBSZrrkz |
| 40408 | { 6748, 4, 1, 0, 384, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea34e8052029ULL }, // Inst #6748 = VCVTPH2IBSZrrk |
| 40409 | { 6747, 4, 1, 0, 384, 1, 0, 3267, X86ImpOpBase + 78, 0, 0x15634e8052029ULL }, // Inst #6747 = VCVTPH2IBSZrrbkz |
| 40410 | { 6746, 5, 1, 0, 384, 1, 0, 3262, X86ImpOpBase + 78, 0, 0x15234e8052029ULL }, // Inst #6746 = VCVTPH2IBSZrrbk |
| 40411 | { 6745, 3, 1, 0, 384, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x15034e8052029ULL }, // Inst #6745 = VCVTPH2IBSZrrb |
| 40412 | { 6744, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe834e8052029ULL }, // Inst #6744 = VCVTPH2IBSZrr |
| 40413 | { 6743, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee34e8052019ULL }, // Inst #6743 = VCVTPH2IBSZrmkz |
| 40414 | { 6742, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea34e8052019ULL }, // Inst #6742 = VCVTPH2IBSZrmk |
| 40415 | { 6741, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e34e8052019ULL }, // Inst #6741 = VCVTPH2IBSZrmbkz |
| 40416 | { 6740, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a34e8052019ULL }, // Inst #6740 = VCVTPH2IBSZrmbk |
| 40417 | { 6739, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5834e8052019ULL }, // Inst #6739 = VCVTPH2IBSZrmb |
| 40418 | { 6738, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe834e8052019ULL }, // Inst #6738 = VCVTPH2IBSZrm |
| 40419 | { 6737, 3, 1, 0, 382, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc734e8052029ULL }, // Inst #6737 = VCVTPH2IBSZ256rrkz |
| 40420 | { 6736, 4, 1, 0, 382, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc334e8052029ULL }, // Inst #6736 = VCVTPH2IBSZ256rrk |
| 40421 | { 6735, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc134e8052029ULL }, // Inst #6735 = VCVTPH2IBSZ256rr |
| 40422 | { 6734, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc734e8052019ULL }, // Inst #6734 = VCVTPH2IBSZ256rmkz |
| 40423 | { 6733, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc334e8052019ULL }, // Inst #6733 = VCVTPH2IBSZ256rmk |
| 40424 | { 6732, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5734e8052019ULL }, // Inst #6732 = VCVTPH2IBSZ256rmbkz |
| 40425 | { 6731, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5334e8052019ULL }, // Inst #6731 = VCVTPH2IBSZ256rmbk |
| 40426 | { 6730, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5134e8052019ULL }, // Inst #6730 = VCVTPH2IBSZ256rmb |
| 40427 | { 6729, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc134e8052019ULL }, // Inst #6729 = VCVTPH2IBSZ256rm |
| 40428 | { 6728, 3, 1, 0, 149, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa634e8052029ULL }, // Inst #6728 = VCVTPH2IBSZ128rrkz |
| 40429 | { 6727, 4, 1, 0, 149, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa234e8052029ULL }, // Inst #6727 = VCVTPH2IBSZ128rrk |
| 40430 | { 6726, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa034e8052029ULL }, // Inst #6726 = VCVTPH2IBSZ128rr |
| 40431 | { 6725, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa634e8052019ULL }, // Inst #6725 = VCVTPH2IBSZ128rmkz |
| 40432 | { 6724, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa234e8052019ULL }, // Inst #6724 = VCVTPH2IBSZ128rmk |
| 40433 | { 6723, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5634e8052019ULL }, // Inst #6723 = VCVTPH2IBSZ128rmbkz |
| 40434 | { 6722, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5234e8052019ULL }, // Inst #6722 = VCVTPH2IBSZ128rmbk |
| 40435 | { 6721, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5034e8052019ULL }, // Inst #6721 = VCVTPH2IBSZ128rmb |
| 40436 | { 6720, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa034e8052019ULL }, // Inst #6720 = VCVTPH2IBSZ128rm |
| 40437 | { 6719, 3, 1, 0, 380, 0, 0, 3240, X86ImpOpBase + 0, 0, 0xee0c68013029ULL }, // Inst #6719 = VCVTPH2HF8Zrrkz |
| 40438 | { 6718, 4, 1, 0, 380, 0, 0, 3236, X86ImpOpBase + 0, 0, 0xea0c68013029ULL }, // Inst #6718 = VCVTPH2HF8Zrrk |
| 40439 | { 6717, 2, 1, 0, 380, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xe80c68013029ULL }, // Inst #6717 = VCVTPH2HF8Zrr |
| 40440 | { 6716, 7, 1, 0, 396, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0c68013019ULL }, // Inst #6716 = VCVTPH2HF8Zrmkz |
| 40441 | { 6715, 8, 1, 0, 396, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0c68013019ULL }, // Inst #6715 = VCVTPH2HF8Zrmk |
| 40442 | { 6714, 7, 1, 0, 396, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e0c68013019ULL }, // Inst #6714 = VCVTPH2HF8Zrmbkz |
| 40443 | { 6713, 8, 1, 0, 396, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a0c68013019ULL }, // Inst #6713 = VCVTPH2HF8Zrmbk |
| 40444 | { 6712, 6, 1, 0, 396, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x580c68013019ULL }, // Inst #6712 = VCVTPH2HF8Zrmb |
| 40445 | { 6711, 6, 1, 0, 396, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80c68013019ULL }, // Inst #6711 = VCVTPH2HF8Zrm |
| 40446 | { 6710, 3, 1, 0, 378, 0, 0, 3218, X86ImpOpBase + 0, 0, 0xc70c68013029ULL }, // Inst #6710 = VCVTPH2HF8Z256rrkz |
| 40447 | { 6709, 4, 1, 0, 378, 0, 0, 3214, X86ImpOpBase + 0, 0, 0xc30c68013029ULL }, // Inst #6709 = VCVTPH2HF8Z256rrk |
| 40448 | { 6708, 2, 1, 0, 378, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xc10c68013029ULL }, // Inst #6708 = VCVTPH2HF8Z256rr |
| 40449 | { 6707, 7, 1, 0, 395, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70c68013019ULL }, // Inst #6707 = VCVTPH2HF8Z256rmkz |
| 40450 | { 6706, 8, 1, 0, 395, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30c68013019ULL }, // Inst #6706 = VCVTPH2HF8Z256rmk |
| 40451 | { 6705, 7, 1, 0, 395, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x570c68013019ULL }, // Inst #6705 = VCVTPH2HF8Z256rmbkz |
| 40452 | { 6704, 8, 1, 0, 395, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x530c68013019ULL }, // Inst #6704 = VCVTPH2HF8Z256rmbk |
| 40453 | { 6703, 6, 1, 0, 395, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x510c68013019ULL }, // Inst #6703 = VCVTPH2HF8Z256rmb |
| 40454 | { 6702, 6, 1, 0, 395, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10c68013019ULL }, // Inst #6702 = VCVTPH2HF8Z256rm |
| 40455 | { 6701, 3, 1, 0, 97, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa60c68013029ULL }, // Inst #6701 = VCVTPH2HF8Z128rrkz |
| 40456 | { 6700, 4, 1, 0, 97, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa20c68013029ULL }, // Inst #6700 = VCVTPH2HF8Z128rrk |
| 40457 | { 6699, 2, 1, 0, 97, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa00c68013029ULL }, // Inst #6699 = VCVTPH2HF8Z128rr |
| 40458 | { 6698, 7, 1, 0, 96, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60c68013019ULL }, // Inst #6698 = VCVTPH2HF8Z128rmkz |
| 40459 | { 6697, 8, 1, 0, 96, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa20c68013019ULL }, // Inst #6697 = VCVTPH2HF8Z128rmk |
| 40460 | { 6696, 7, 1, 0, 96, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x560c68013019ULL }, // Inst #6696 = VCVTPH2HF8Z128rmbkz |
| 40461 | { 6695, 8, 1, 0, 96, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x520c68013019ULL }, // Inst #6695 = VCVTPH2HF8Z128rmbk |
| 40462 | { 6694, 6, 1, 0, 96, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x500c68013019ULL }, // Inst #6694 = VCVTPH2HF8Z128rmb |
| 40463 | { 6693, 6, 1, 0, 96, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa00c68013019ULL }, // Inst #6693 = VCVTPH2HF8Z128rm |
| 40464 | { 6692, 3, 1, 0, 380, 0, 0, 3240, X86ImpOpBase + 0, 0, 0xee0de8013029ULL }, // Inst #6692 = VCVTPH2HF8SZrrkz |
| 40465 | { 6691, 4, 1, 0, 380, 0, 0, 3236, X86ImpOpBase + 0, 0, 0xea0de8013029ULL }, // Inst #6691 = VCVTPH2HF8SZrrk |
| 40466 | { 6690, 2, 1, 0, 380, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xe80de8013029ULL }, // Inst #6690 = VCVTPH2HF8SZrr |
| 40467 | { 6689, 7, 1, 0, 396, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee0de8013019ULL }, // Inst #6689 = VCVTPH2HF8SZrmkz |
| 40468 | { 6688, 8, 1, 0, 396, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea0de8013019ULL }, // Inst #6688 = VCVTPH2HF8SZrmk |
| 40469 | { 6687, 7, 1, 0, 396, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e0de8013019ULL }, // Inst #6687 = VCVTPH2HF8SZrmbkz |
| 40470 | { 6686, 8, 1, 0, 396, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a0de8013019ULL }, // Inst #6686 = VCVTPH2HF8SZrmbk |
| 40471 | { 6685, 6, 1, 0, 396, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x580de8013019ULL }, // Inst #6685 = VCVTPH2HF8SZrmb |
| 40472 | { 6684, 6, 1, 0, 396, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe80de8013019ULL }, // Inst #6684 = VCVTPH2HF8SZrm |
| 40473 | { 6683, 3, 1, 0, 378, 0, 0, 3218, X86ImpOpBase + 0, 0, 0xc70de8013029ULL }, // Inst #6683 = VCVTPH2HF8SZ256rrkz |
| 40474 | { 6682, 4, 1, 0, 378, 0, 0, 3214, X86ImpOpBase + 0, 0, 0xc30de8013029ULL }, // Inst #6682 = VCVTPH2HF8SZ256rrk |
| 40475 | { 6681, 2, 1, 0, 378, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xc10de8013029ULL }, // Inst #6681 = VCVTPH2HF8SZ256rr |
| 40476 | { 6680, 7, 1, 0, 395, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc70de8013019ULL }, // Inst #6680 = VCVTPH2HF8SZ256rmkz |
| 40477 | { 6679, 8, 1, 0, 395, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc30de8013019ULL }, // Inst #6679 = VCVTPH2HF8SZ256rmk |
| 40478 | { 6678, 7, 1, 0, 395, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x570de8013019ULL }, // Inst #6678 = VCVTPH2HF8SZ256rmbkz |
| 40479 | { 6677, 8, 1, 0, 395, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x530de8013019ULL }, // Inst #6677 = VCVTPH2HF8SZ256rmbk |
| 40480 | { 6676, 6, 1, 0, 395, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x510de8013019ULL }, // Inst #6676 = VCVTPH2HF8SZ256rmb |
| 40481 | { 6675, 6, 1, 0, 395, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc10de8013019ULL }, // Inst #6675 = VCVTPH2HF8SZ256rm |
| 40482 | { 6674, 3, 1, 0, 97, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa60de8013029ULL }, // Inst #6674 = VCVTPH2HF8SZ128rrkz |
| 40483 | { 6673, 4, 1, 0, 97, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa20de8013029ULL }, // Inst #6673 = VCVTPH2HF8SZ128rrk |
| 40484 | { 6672, 2, 1, 0, 97, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa00de8013029ULL }, // Inst #6672 = VCVTPH2HF8SZ128rr |
| 40485 | { 6671, 7, 1, 0, 96, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa60de8013019ULL }, // Inst #6671 = VCVTPH2HF8SZ128rmkz |
| 40486 | { 6670, 8, 1, 0, 96, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa20de8013019ULL }, // Inst #6670 = VCVTPH2HF8SZ128rmk |
| 40487 | { 6669, 7, 1, 0, 96, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x560de8013019ULL }, // Inst #6669 = VCVTPH2HF8SZ128rmbkz |
| 40488 | { 6668, 8, 1, 0, 96, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x520de8013019ULL }, // Inst #6668 = VCVTPH2HF8SZ128rmbk |
| 40489 | { 6667, 6, 1, 0, 96, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x500de8013019ULL }, // Inst #6667 = VCVTPH2HF8SZ128rmb |
| 40490 | { 6666, 6, 1, 0, 96, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa00de8013019ULL }, // Inst #6666 = VCVTPH2HF8SZ128rm |
| 40491 | { 6665, 3, 1, 0, 2094, 1, 0, 3259, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xce2de0012829ULL }, // Inst #6665 = VCVTPH2DQZrrkz |
| 40492 | { 6664, 4, 1, 0, 2094, 1, 0, 3255, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xca2de0012829ULL }, // Inst #6664 = VCVTPH2DQZrrk |
| 40493 | { 6663, 4, 1, 0, 2094, 1, 0, 3251, X86ImpOpBase + 78, 0, 0x15e2de0012829ULL }, // Inst #6663 = VCVTPH2DQZrrbkz |
| 40494 | { 6662, 5, 1, 0, 2094, 1, 0, 3246, X86ImpOpBase + 78, 0, 0x15a2de0012829ULL }, // Inst #6662 = VCVTPH2DQZrrbk |
| 40495 | { 6661, 3, 1, 0, 2086, 1, 0, 3243, X86ImpOpBase + 78, 0, 0x1582de0012829ULL }, // Inst #6661 = VCVTPH2DQZrrb |
| 40496 | { 6660, 2, 1, 0, 2086, 1, 0, 3077, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc82de0012829ULL }, // Inst #6660 = VCVTPH2DQZrr |
| 40497 | { 6659, 7, 1, 0, 2083, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce2de0012819ULL }, // Inst #6659 = VCVTPH2DQZrmkz |
| 40498 | { 6658, 8, 1, 0, 2083, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca2de0012819ULL }, // Inst #6658 = VCVTPH2DQZrmk |
| 40499 | { 6657, 7, 1, 0, 2083, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e2de0012819ULL }, // Inst #6657 = VCVTPH2DQZrmbkz |
| 40500 | { 6656, 8, 1, 0, 2083, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a2de0012819ULL }, // Inst #6656 = VCVTPH2DQZrmbk |
| 40501 | { 6655, 6, 1, 0, 2030, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x582de0012819ULL }, // Inst #6655 = VCVTPH2DQZrmb |
| 40502 | { 6654, 6, 1, 0, 2030, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc82de0012819ULL }, // Inst #6654 = VCVTPH2DQZrm |
| 40503 | { 6653, 3, 1, 0, 2075, 1, 0, 2320, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa72de0012829ULL }, // Inst #6653 = VCVTPH2DQZ256rrkz |
| 40504 | { 6652, 4, 1, 0, 2075, 1, 0, 2316, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa32de0012829ULL }, // Inst #6652 = VCVTPH2DQZ256rrk |
| 40505 | { 6651, 2, 1, 0, 1813, 1, 0, 2314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa12de0012829ULL }, // Inst #6651 = VCVTPH2DQZ256rr |
| 40506 | { 6650, 7, 1, 0, 2080, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa72de0012819ULL }, // Inst #6650 = VCVTPH2DQZ256rmkz |
| 40507 | { 6649, 8, 1, 0, 2080, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa32de0012819ULL }, // Inst #6649 = VCVTPH2DQZ256rmk |
| 40508 | { 6648, 7, 1, 0, 2080, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x572de0012819ULL }, // Inst #6648 = VCVTPH2DQZ256rmbkz |
| 40509 | { 6647, 8, 1, 0, 2080, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x532de0012819ULL }, // Inst #6647 = VCVTPH2DQZ256rmbk |
| 40510 | { 6646, 6, 1, 0, 2026, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x512de0012819ULL }, // Inst #6646 = VCVTPH2DQZ256rmb |
| 40511 | { 6645, 6, 1, 0, 2026, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa12de0012819ULL }, // Inst #6645 = VCVTPH2DQZ256rm |
| 40512 | { 6644, 3, 1, 0, 2074, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x862de0012829ULL }, // Inst #6644 = VCVTPH2DQZ128rrkz |
| 40513 | { 6643, 4, 1, 0, 2074, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x822de0012829ULL }, // Inst #6643 = VCVTPH2DQZ128rrk |
| 40514 | { 6642, 2, 1, 0, 1812, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x802de0012829ULL }, // Inst #6642 = VCVTPH2DQZ128rr |
| 40515 | { 6641, 7, 1, 0, 2073, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x862de0012819ULL }, // Inst #6641 = VCVTPH2DQZ128rmkz |
| 40516 | { 6640, 8, 1, 0, 2073, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x822de0012819ULL }, // Inst #6640 = VCVTPH2DQZ128rmk |
| 40517 | { 6639, 7, 1, 0, 2073, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x562de0012819ULL }, // Inst #6639 = VCVTPH2DQZ128rmbkz |
| 40518 | { 6638, 8, 1, 0, 2073, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x522de0012819ULL }, // Inst #6638 = VCVTPH2DQZ128rmbk |
| 40519 | { 6637, 6, 1, 0, 2071, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x502de0012819ULL }, // Inst #6637 = VCVTPH2DQZ128rmb |
| 40520 | { 6636, 6, 1, 0, 2071, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x802de0012819ULL }, // Inst #6636 = VCVTPH2DQZ128rm |
| 40521 | { 6635, 3, 1, 0, 380, 0, 0, 3240, X86ImpOpBase + 0, 0, 0xee3a68005029ULL }, // Inst #6635 = VCVTPH2BF8Zrrkz |
| 40522 | { 6634, 4, 1, 0, 380, 0, 0, 3236, X86ImpOpBase + 0, 0, 0xea3a68005029ULL }, // Inst #6634 = VCVTPH2BF8Zrrk |
| 40523 | { 6633, 2, 1, 0, 380, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xe83a68005029ULL }, // Inst #6633 = VCVTPH2BF8Zrr |
| 40524 | { 6632, 7, 1, 0, 396, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3a68005019ULL }, // Inst #6632 = VCVTPH2BF8Zrmkz |
| 40525 | { 6631, 8, 1, 0, 396, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3a68005019ULL }, // Inst #6631 = VCVTPH2BF8Zrmk |
| 40526 | { 6630, 7, 1, 0, 396, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e3a68005019ULL }, // Inst #6630 = VCVTPH2BF8Zrmbkz |
| 40527 | { 6629, 8, 1, 0, 396, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a3a68005019ULL }, // Inst #6629 = VCVTPH2BF8Zrmbk |
| 40528 | { 6628, 6, 1, 0, 396, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x583a68005019ULL }, // Inst #6628 = VCVTPH2BF8Zrmb |
| 40529 | { 6627, 6, 1, 0, 396, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83a68005019ULL }, // Inst #6627 = VCVTPH2BF8Zrm |
| 40530 | { 6626, 3, 1, 0, 378, 0, 0, 3218, X86ImpOpBase + 0, 0, 0xc73a68005029ULL }, // Inst #6626 = VCVTPH2BF8Z256rrkz |
| 40531 | { 6625, 4, 1, 0, 378, 0, 0, 3214, X86ImpOpBase + 0, 0, 0xc33a68005029ULL }, // Inst #6625 = VCVTPH2BF8Z256rrk |
| 40532 | { 6624, 2, 1, 0, 378, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xc13a68005029ULL }, // Inst #6624 = VCVTPH2BF8Z256rr |
| 40533 | { 6623, 7, 1, 0, 395, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73a68005019ULL }, // Inst #6623 = VCVTPH2BF8Z256rmkz |
| 40534 | { 6622, 8, 1, 0, 395, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33a68005019ULL }, // Inst #6622 = VCVTPH2BF8Z256rmk |
| 40535 | { 6621, 7, 1, 0, 395, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x573a68005019ULL }, // Inst #6621 = VCVTPH2BF8Z256rmbkz |
| 40536 | { 6620, 8, 1, 0, 395, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x533a68005019ULL }, // Inst #6620 = VCVTPH2BF8Z256rmbk |
| 40537 | { 6619, 6, 1, 0, 395, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x513a68005019ULL }, // Inst #6619 = VCVTPH2BF8Z256rmb |
| 40538 | { 6618, 6, 1, 0, 395, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13a68005019ULL }, // Inst #6618 = VCVTPH2BF8Z256rm |
| 40539 | { 6617, 3, 1, 0, 97, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa63a68005029ULL }, // Inst #6617 = VCVTPH2BF8Z128rrkz |
| 40540 | { 6616, 4, 1, 0, 97, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa23a68005029ULL }, // Inst #6616 = VCVTPH2BF8Z128rrk |
| 40541 | { 6615, 2, 1, 0, 97, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03a68005029ULL }, // Inst #6615 = VCVTPH2BF8Z128rr |
| 40542 | { 6614, 7, 1, 0, 96, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63a68005019ULL }, // Inst #6614 = VCVTPH2BF8Z128rmkz |
| 40543 | { 6613, 8, 1, 0, 96, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23a68005019ULL }, // Inst #6613 = VCVTPH2BF8Z128rmk |
| 40544 | { 6612, 7, 1, 0, 96, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x563a68005019ULL }, // Inst #6612 = VCVTPH2BF8Z128rmbkz |
| 40545 | { 6611, 8, 1, 0, 96, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x523a68005019ULL }, // Inst #6611 = VCVTPH2BF8Z128rmbk |
| 40546 | { 6610, 6, 1, 0, 96, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x503a68005019ULL }, // Inst #6610 = VCVTPH2BF8Z128rmb |
| 40547 | { 6609, 6, 1, 0, 96, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03a68005019ULL }, // Inst #6609 = VCVTPH2BF8Z128rm |
| 40548 | { 6608, 3, 1, 0, 380, 0, 0, 3240, X86ImpOpBase + 0, 0, 0xee3a68013029ULL }, // Inst #6608 = VCVTPH2BF8SZrrkz |
| 40549 | { 6607, 4, 1, 0, 380, 0, 0, 3236, X86ImpOpBase + 0, 0, 0xea3a68013029ULL }, // Inst #6607 = VCVTPH2BF8SZrrk |
| 40550 | { 6606, 2, 1, 0, 380, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xe83a68013029ULL }, // Inst #6606 = VCVTPH2BF8SZrr |
| 40551 | { 6605, 7, 1, 0, 396, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3a68013019ULL }, // Inst #6605 = VCVTPH2BF8SZrmkz |
| 40552 | { 6604, 8, 1, 0, 396, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3a68013019ULL }, // Inst #6604 = VCVTPH2BF8SZrmk |
| 40553 | { 6603, 7, 1, 0, 396, 0, 0, 3229, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e3a68013019ULL }, // Inst #6603 = VCVTPH2BF8SZrmbkz |
| 40554 | { 6602, 8, 1, 0, 396, 0, 0, 3221, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a3a68013019ULL }, // Inst #6602 = VCVTPH2BF8SZrmbk |
| 40555 | { 6601, 6, 1, 0, 396, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x583a68013019ULL }, // Inst #6601 = VCVTPH2BF8SZrmb |
| 40556 | { 6600, 6, 1, 0, 396, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83a68013019ULL }, // Inst #6600 = VCVTPH2BF8SZrm |
| 40557 | { 6599, 3, 1, 0, 378, 0, 0, 3218, X86ImpOpBase + 0, 0, 0xc73a68013029ULL }, // Inst #6599 = VCVTPH2BF8SZ256rrkz |
| 40558 | { 6598, 4, 1, 0, 378, 0, 0, 3214, X86ImpOpBase + 0, 0, 0xc33a68013029ULL }, // Inst #6598 = VCVTPH2BF8SZ256rrk |
| 40559 | { 6597, 2, 1, 0, 378, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xc13a68013029ULL }, // Inst #6597 = VCVTPH2BF8SZ256rr |
| 40560 | { 6596, 7, 1, 0, 395, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73a68013019ULL }, // Inst #6596 = VCVTPH2BF8SZ256rmkz |
| 40561 | { 6595, 8, 1, 0, 395, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33a68013019ULL }, // Inst #6595 = VCVTPH2BF8SZ256rmk |
| 40562 | { 6594, 7, 1, 0, 395, 0, 0, 3207, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x573a68013019ULL }, // Inst #6594 = VCVTPH2BF8SZ256rmbkz |
| 40563 | { 6593, 8, 1, 0, 395, 0, 0, 3199, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x533a68013019ULL }, // Inst #6593 = VCVTPH2BF8SZ256rmbk |
| 40564 | { 6592, 6, 1, 0, 395, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x513a68013019ULL }, // Inst #6592 = VCVTPH2BF8SZ256rmb |
| 40565 | { 6591, 6, 1, 0, 395, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13a68013019ULL }, // Inst #6591 = VCVTPH2BF8SZ256rm |
| 40566 | { 6590, 3, 1, 0, 97, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa63a68013029ULL }, // Inst #6590 = VCVTPH2BF8SZ128rrkz |
| 40567 | { 6589, 4, 1, 0, 97, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa23a68013029ULL }, // Inst #6589 = VCVTPH2BF8SZ128rrk |
| 40568 | { 6588, 2, 1, 0, 97, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03a68013029ULL }, // Inst #6588 = VCVTPH2BF8SZ128rr |
| 40569 | { 6587, 7, 1, 0, 96, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63a68013019ULL }, // Inst #6587 = VCVTPH2BF8SZ128rmkz |
| 40570 | { 6586, 8, 1, 0, 96, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23a68013019ULL }, // Inst #6586 = VCVTPH2BF8SZ128rmk |
| 40571 | { 6585, 7, 1, 0, 96, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x563a68013019ULL }, // Inst #6585 = VCVTPH2BF8SZ128rmbkz |
| 40572 | { 6584, 8, 1, 0, 96, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x523a68013019ULL }, // Inst #6584 = VCVTPH2BF8SZ128rmbk |
| 40573 | { 6583, 6, 1, 0, 96, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x503a68013019ULL }, // Inst #6583 = VCVTPH2BF8SZ128rmb |
| 40574 | { 6582, 6, 1, 0, 96, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03a68013019ULL }, // Inst #6582 = VCVTPH2BF8SZ128rm |
| 40575 | { 6581, 3, 1, 0, 1860, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0022829ULL }, // Inst #6581 = VCVTPD2UQQZrrkz |
| 40576 | { 6580, 4, 1, 0, 1860, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0022829ULL }, // Inst #6580 = VCVTPD2UQQZrrk |
| 40577 | { 6579, 4, 1, 0, 1860, 1, 0, 3195, X86ImpOpBase + 78, 0, 0x19e3ce0022829ULL }, // Inst #6579 = VCVTPD2UQQZrrbkz |
| 40578 | { 6578, 5, 1, 0, 1860, 1, 0, 3190, X86ImpOpBase + 78, 0, 0x19a3ce0022829ULL }, // Inst #6578 = VCVTPD2UQQZrrbk |
| 40579 | { 6577, 3, 1, 0, 1860, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1983ce0022829ULL }, // Inst #6577 = VCVTPD2UQQZrrb |
| 40580 | { 6576, 2, 1, 0, 1263, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0022829ULL }, // Inst #6576 = VCVTPD2UQQZrr |
| 40581 | { 6575, 7, 1, 0, 1376, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0022819ULL }, // Inst #6575 = VCVTPD2UQQZrmkz |
| 40582 | { 6574, 8, 1, 0, 1376, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0022819ULL }, // Inst #6574 = VCVTPD2UQQZrmk |
| 40583 | { 6573, 7, 1, 0, 1376, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3ce0022819ULL }, // Inst #6573 = VCVTPD2UQQZrmbkz |
| 40584 | { 6572, 8, 1, 0, 1376, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3ce0022819ULL }, // Inst #6572 = VCVTPD2UQQZrmbk |
| 40585 | { 6571, 6, 1, 0, 1376, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983ce0022819ULL }, // Inst #6571 = VCVTPD2UQQZrmb |
| 40586 | { 6570, 6, 1, 0, 1376, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0022819ULL }, // Inst #6570 = VCVTPD2UQQZrm |
| 40587 | { 6569, 3, 1, 0, 1260, 1, 0, 2786, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0022829ULL }, // Inst #6569 = VCVTPD2UQQZ256rrkz |
| 40588 | { 6568, 4, 1, 0, 1260, 1, 0, 2782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0022829ULL }, // Inst #6568 = VCVTPD2UQQZ256rrk |
| 40589 | { 6567, 2, 1, 0, 1260, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0022829ULL }, // Inst #6567 = VCVTPD2UQQZ256rr |
| 40590 | { 6566, 7, 1, 0, 1375, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0022819ULL }, // Inst #6566 = VCVTPD2UQQZ256rmkz |
| 40591 | { 6565, 8, 1, 0, 1375, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0022819ULL }, // Inst #6565 = VCVTPD2UQQZ256rmk |
| 40592 | { 6564, 7, 1, 0, 1375, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973ce0022819ULL }, // Inst #6564 = VCVTPD2UQQZ256rmbkz |
| 40593 | { 6563, 8, 1, 0, 1375, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933ce0022819ULL }, // Inst #6563 = VCVTPD2UQQZ256rmbk |
| 40594 | { 6562, 6, 1, 0, 1375, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913ce0022819ULL }, // Inst #6562 = VCVTPD2UQQZ256rmb |
| 40595 | { 6561, 6, 1, 0, 1375, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0022819ULL }, // Inst #6561 = VCVTPD2UQQZ256rm |
| 40596 | { 6560, 3, 1, 0, 1259, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0022829ULL }, // Inst #6560 = VCVTPD2UQQZ128rrkz |
| 40597 | { 6559, 4, 1, 0, 1259, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0022829ULL }, // Inst #6559 = VCVTPD2UQQZ128rrk |
| 40598 | { 6558, 2, 1, 0, 1259, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0022829ULL }, // Inst #6558 = VCVTPD2UQQZ128rr |
| 40599 | { 6557, 7, 1, 0, 1359, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0022819ULL }, // Inst #6557 = VCVTPD2UQQZ128rmkz |
| 40600 | { 6556, 8, 1, 0, 1359, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0022819ULL }, // Inst #6556 = VCVTPD2UQQZ128rmk |
| 40601 | { 6555, 7, 1, 0, 1359, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963ce0022819ULL }, // Inst #6555 = VCVTPD2UQQZ128rmbkz |
| 40602 | { 6554, 8, 1, 0, 1359, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923ce0022819ULL }, // Inst #6554 = VCVTPD2UQQZ128rmbk |
| 40603 | { 6553, 6, 1, 0, 1359, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903ce0022819ULL }, // Inst #6553 = VCVTPD2UQQZ128rmb |
| 40604 | { 6552, 6, 1, 0, 1359, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0022819ULL }, // Inst #6552 = VCVTPD2UQQZ128rm |
| 40605 | { 6551, 3, 1, 0, 400, 1, 0, 3166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0022029ULL }, // Inst #6551 = VCVTPD2UDQZrrkz |
| 40606 | { 6550, 4, 1, 0, 400, 1, 0, 3162, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0022029ULL }, // Inst #6550 = VCVTPD2UDQZrrk |
| 40607 | { 6549, 4, 1, 0, 400, 1, 0, 3158, X86ImpOpBase + 78, 0, 0x19e3ce0022029ULL }, // Inst #6549 = VCVTPD2UDQZrrbkz |
| 40608 | { 6548, 5, 1, 0, 400, 1, 0, 3153, X86ImpOpBase + 78, 0, 0x19a3ce0022029ULL }, // Inst #6548 = VCVTPD2UDQZrrbk |
| 40609 | { 6547, 3, 1, 0, 400, 1, 0, 3097, X86ImpOpBase + 78, 0, 0x1983ce0022029ULL }, // Inst #6547 = VCVTPD2UDQZrrb |
| 40610 | { 6546, 2, 1, 0, 1295, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0022029ULL }, // Inst #6546 = VCVTPD2UDQZrr |
| 40611 | { 6545, 7, 1, 0, 1393, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0022019ULL }, // Inst #6545 = VCVTPD2UDQZrmkz |
| 40612 | { 6544, 8, 1, 0, 1393, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0022019ULL }, // Inst #6544 = VCVTPD2UDQZrmk |
| 40613 | { 6543, 7, 1, 0, 1393, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3ce0022019ULL }, // Inst #6543 = VCVTPD2UDQZrmbkz |
| 40614 | { 6542, 8, 1, 0, 1393, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3ce0022019ULL }, // Inst #6542 = VCVTPD2UDQZrmbk |
| 40615 | { 6541, 6, 1, 0, 1393, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983ce0022019ULL }, // Inst #6541 = VCVTPD2UDQZrmb |
| 40616 | { 6540, 6, 1, 0, 1393, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0022019ULL }, // Inst #6540 = VCVTPD2UDQZrm |
| 40617 | { 6539, 3, 1, 0, 1290, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0022029ULL }, // Inst #6539 = VCVTPD2UDQZ256rrkz |
| 40618 | { 6538, 4, 1, 0, 1290, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0022029ULL }, // Inst #6538 = VCVTPD2UDQZ256rrk |
| 40619 | { 6537, 2, 1, 0, 1290, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0022029ULL }, // Inst #6537 = VCVTPD2UDQZ256rr |
| 40620 | { 6536, 7, 1, 0, 2025, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0022019ULL }, // Inst #6536 = VCVTPD2UDQZ256rmkz |
| 40621 | { 6535, 8, 1, 0, 2025, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0022019ULL }, // Inst #6535 = VCVTPD2UDQZ256rmk |
| 40622 | { 6534, 7, 1, 0, 2025, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973ce0022019ULL }, // Inst #6534 = VCVTPD2UDQZ256rmbkz |
| 40623 | { 6533, 8, 1, 0, 2025, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933ce0022019ULL }, // Inst #6533 = VCVTPD2UDQZ256rmbk |
| 40624 | { 6532, 6, 1, 0, 2025, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913ce0022019ULL }, // Inst #6532 = VCVTPD2UDQZ256rmb |
| 40625 | { 6531, 6, 1, 0, 2025, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0022019ULL }, // Inst #6531 = VCVTPD2UDQZ256rm |
| 40626 | { 6530, 3, 1, 0, 1270, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0022029ULL }, // Inst #6530 = VCVTPD2UDQZ128rrkz |
| 40627 | { 6529, 4, 1, 0, 1270, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0022029ULL }, // Inst #6529 = VCVTPD2UDQZ128rrk |
| 40628 | { 6528, 2, 1, 0, 1270, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0022029ULL }, // Inst #6528 = VCVTPD2UDQZ128rr |
| 40629 | { 6527, 7, 1, 0, 1739, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0022019ULL }, // Inst #6527 = VCVTPD2UDQZ128rmkz |
| 40630 | { 6526, 8, 1, 0, 1739, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0022019ULL }, // Inst #6526 = VCVTPD2UDQZ128rmk |
| 40631 | { 6525, 7, 1, 0, 1739, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963ce0022019ULL }, // Inst #6525 = VCVTPD2UDQZ128rmbkz |
| 40632 | { 6524, 8, 1, 0, 1739, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923ce0022019ULL }, // Inst #6524 = VCVTPD2UDQZ128rmbk |
| 40633 | { 6523, 6, 1, 0, 1739, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903ce0022019ULL }, // Inst #6523 = VCVTPD2UDQZ128rmb |
| 40634 | { 6522, 6, 1, 0, 1739, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0022019ULL }, // Inst #6522 = VCVTPD2UDQZ128rm |
| 40635 | { 6521, 3, 1, 0, 1860, 1, 0, 2808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3de0022829ULL }, // Inst #6521 = VCVTPD2QQZrrkz |
| 40636 | { 6520, 4, 1, 0, 1860, 1, 0, 2804, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3de0022829ULL }, // Inst #6520 = VCVTPD2QQZrrk |
| 40637 | { 6519, 4, 1, 0, 1860, 1, 0, 3195, X86ImpOpBase + 78, 0, 0x19e3de0022829ULL }, // Inst #6519 = VCVTPD2QQZrrbkz |
| 40638 | { 6518, 5, 1, 0, 1860, 1, 0, 3190, X86ImpOpBase + 78, 0, 0x19a3de0022829ULL }, // Inst #6518 = VCVTPD2QQZrrbk |
| 40639 | { 6517, 3, 1, 0, 1860, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1983de0022829ULL }, // Inst #6517 = VCVTPD2QQZrrb |
| 40640 | { 6516, 2, 1, 0, 1263, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83de0022829ULL }, // Inst #6516 = VCVTPD2QQZrr |
| 40641 | { 6515, 7, 1, 0, 1376, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3de0022819ULL }, // Inst #6515 = VCVTPD2QQZrmkz |
| 40642 | { 6514, 8, 1, 0, 1376, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3de0022819ULL }, // Inst #6514 = VCVTPD2QQZrmk |
| 40643 | { 6513, 7, 1, 0, 1376, 1, 0, 2376, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3de0022819ULL }, // Inst #6513 = VCVTPD2QQZrmbkz |
| 40644 | { 6512, 8, 1, 0, 1376, 1, 0, 2368, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3de0022819ULL }, // Inst #6512 = VCVTPD2QQZrmbk |
| 40645 | { 6511, 6, 1, 0, 1376, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983de0022819ULL }, // Inst #6511 = VCVTPD2QQZrmb |
| 40646 | { 6510, 6, 1, 0, 1376, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83de0022819ULL }, // Inst #6510 = VCVTPD2QQZrm |
| 40647 | { 6509, 3, 1, 0, 1260, 1, 0, 2786, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73de0022829ULL }, // Inst #6509 = VCVTPD2QQZ256rrkz |
| 40648 | { 6508, 4, 1, 0, 1260, 1, 0, 2782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33de0022829ULL }, // Inst #6508 = VCVTPD2QQZ256rrk |
| 40649 | { 6507, 2, 1, 0, 1260, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13de0022829ULL }, // Inst #6507 = VCVTPD2QQZ256rr |
| 40650 | { 6506, 7, 1, 0, 1375, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73de0022819ULL }, // Inst #6506 = VCVTPD2QQZ256rmkz |
| 40651 | { 6505, 8, 1, 0, 1375, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33de0022819ULL }, // Inst #6505 = VCVTPD2QQZ256rmk |
| 40652 | { 6504, 7, 1, 0, 1375, 1, 0, 2361, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973de0022819ULL }, // Inst #6504 = VCVTPD2QQZ256rmbkz |
| 40653 | { 6503, 8, 1, 0, 1375, 1, 0, 2353, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933de0022819ULL }, // Inst #6503 = VCVTPD2QQZ256rmbk |
| 40654 | { 6502, 6, 1, 0, 1375, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913de0022819ULL }, // Inst #6502 = VCVTPD2QQZ256rmb |
| 40655 | { 6501, 6, 1, 0, 1375, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13de0022819ULL }, // Inst #6501 = VCVTPD2QQZ256rm |
| 40656 | { 6500, 3, 1, 0, 1259, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63de0022829ULL }, // Inst #6500 = VCVTPD2QQZ128rrkz |
| 40657 | { 6499, 4, 1, 0, 1259, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23de0022829ULL }, // Inst #6499 = VCVTPD2QQZ128rrk |
| 40658 | { 6498, 2, 1, 0, 1259, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03de0022829ULL }, // Inst #6498 = VCVTPD2QQZ128rr |
| 40659 | { 6497, 7, 1, 0, 1359, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63de0022819ULL }, // Inst #6497 = VCVTPD2QQZ128rmkz |
| 40660 | { 6496, 8, 1, 0, 1359, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23de0022819ULL }, // Inst #6496 = VCVTPD2QQZ128rmk |
| 40661 | { 6495, 7, 1, 0, 1359, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963de0022819ULL }, // Inst #6495 = VCVTPD2QQZ128rmbkz |
| 40662 | { 6494, 8, 1, 0, 1359, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923de0022819ULL }, // Inst #6494 = VCVTPD2QQZ128rmbk |
| 40663 | { 6493, 6, 1, 0, 1359, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903de0022819ULL }, // Inst #6493 = VCVTPD2QQZ128rmb |
| 40664 | { 6492, 6, 1, 0, 1359, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03de0022819ULL }, // Inst #6492 = VCVTPD2QQZ128rm |
| 40665 | { 6491, 2, 1, 0, 97, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d30002829ULL }, // Inst #6491 = VCVTPD2PSrr |
| 40666 | { 6490, 6, 1, 0, 96, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d30002819ULL }, // Inst #6490 = VCVTPD2PSrm |
| 40667 | { 6489, 3, 1, 0, 380, 1, 0, 3166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2d60022829ULL }, // Inst #6489 = VCVTPD2PSZrrkz |
| 40668 | { 6488, 4, 1, 0, 380, 1, 0, 3162, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2d60022829ULL }, // Inst #6488 = VCVTPD2PSZrrk |
| 40669 | { 6487, 4, 1, 0, 380, 1, 0, 3158, X86ImpOpBase + 78, 0, 0x19e2d60022829ULL }, // Inst #6487 = VCVTPD2PSZrrbkz |
| 40670 | { 6486, 5, 1, 0, 380, 1, 0, 3153, X86ImpOpBase + 78, 0, 0x19a2d60022829ULL }, // Inst #6486 = VCVTPD2PSZrrbk |
| 40671 | { 6485, 3, 1, 0, 380, 1, 0, 3097, X86ImpOpBase + 78, 0, 0x1982d60022829ULL }, // Inst #6485 = VCVTPD2PSZrrb |
| 40672 | { 6484, 2, 1, 0, 380, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82d60022829ULL }, // Inst #6484 = VCVTPD2PSZrr |
| 40673 | { 6483, 7, 1, 0, 396, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2d60022819ULL }, // Inst #6483 = VCVTPD2PSZrmkz |
| 40674 | { 6482, 8, 1, 0, 396, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2d60022819ULL }, // Inst #6482 = VCVTPD2PSZrmk |
| 40675 | { 6481, 7, 1, 0, 396, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2d60022819ULL }, // Inst #6481 = VCVTPD2PSZrmbkz |
| 40676 | { 6480, 8, 1, 0, 396, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2d60022819ULL }, // Inst #6480 = VCVTPD2PSZrmbk |
| 40677 | { 6479, 6, 1, 0, 396, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982d60022819ULL }, // Inst #6479 = VCVTPD2PSZrmb |
| 40678 | { 6478, 6, 1, 0, 396, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82d60022819ULL }, // Inst #6478 = VCVTPD2PSZrm |
| 40679 | { 6477, 3, 1, 0, 378, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72d60022829ULL }, // Inst #6477 = VCVTPD2PSZ256rrkz |
| 40680 | { 6476, 4, 1, 0, 378, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32d60022829ULL }, // Inst #6476 = VCVTPD2PSZ256rrk |
| 40681 | { 6475, 2, 1, 0, 378, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12d60022829ULL }, // Inst #6475 = VCVTPD2PSZ256rr |
| 40682 | { 6474, 7, 1, 0, 395, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72d60022819ULL }, // Inst #6474 = VCVTPD2PSZ256rmkz |
| 40683 | { 6473, 8, 1, 0, 395, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32d60022819ULL }, // Inst #6473 = VCVTPD2PSZ256rmk |
| 40684 | { 6472, 7, 1, 0, 395, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972d60022819ULL }, // Inst #6472 = VCVTPD2PSZ256rmbkz |
| 40685 | { 6471, 8, 1, 0, 395, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932d60022819ULL }, // Inst #6471 = VCVTPD2PSZ256rmbk |
| 40686 | { 6470, 6, 1, 0, 395, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912d60022819ULL }, // Inst #6470 = VCVTPD2PSZ256rmb |
| 40687 | { 6469, 6, 1, 0, 395, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12d60022819ULL }, // Inst #6469 = VCVTPD2PSZ256rm |
| 40688 | { 6468, 3, 1, 0, 97, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62d60022829ULL }, // Inst #6468 = VCVTPD2PSZ128rrkz |
| 40689 | { 6467, 4, 1, 0, 97, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22d60022829ULL }, // Inst #6467 = VCVTPD2PSZ128rrk |
| 40690 | { 6466, 2, 1, 0, 97, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02d60022829ULL }, // Inst #6466 = VCVTPD2PSZ128rr |
| 40691 | { 6465, 7, 1, 0, 96, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62d60022819ULL }, // Inst #6465 = VCVTPD2PSZ128rmkz |
| 40692 | { 6464, 8, 1, 0, 96, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22d60022819ULL }, // Inst #6464 = VCVTPD2PSZ128rmk |
| 40693 | { 6463, 7, 1, 0, 96, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962d60022819ULL }, // Inst #6463 = VCVTPD2PSZ128rmbkz |
| 40694 | { 6462, 8, 1, 0, 96, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922d60022819ULL }, // Inst #6462 = VCVTPD2PSZ128rmbk |
| 40695 | { 6461, 6, 1, 0, 96, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902d60022819ULL }, // Inst #6461 = VCVTPD2PSZ128rmb |
| 40696 | { 6460, 6, 1, 0, 96, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02d60022819ULL }, // Inst #6460 = VCVTPD2PSZ128rm |
| 40697 | { 6459, 2, 1, 0, 378, 1, 0, 3144, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x12d30002829ULL }, // Inst #6459 = VCVTPD2PSYrr |
| 40698 | { 6458, 6, 1, 0, 395, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x12d30002819ULL }, // Inst #6458 = VCVTPD2PSYrm |
| 40699 | { 6457, 3, 1, 0, 2046, 1, 0, 3187, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2d60032829ULL }, // Inst #6457 = VCVTPD2PHZrrkz |
| 40700 | { 6456, 4, 1, 0, 2046, 1, 0, 3183, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2d60032829ULL }, // Inst #6456 = VCVTPD2PHZrrk |
| 40701 | { 6455, 4, 1, 0, 2046, 1, 0, 3179, X86ImpOpBase + 78, 0, 0x19e2d60032829ULL }, // Inst #6455 = VCVTPD2PHZrrbkz |
| 40702 | { 6454, 5, 1, 0, 2046, 1, 0, 3174, X86ImpOpBase + 78, 0, 0x19a2d60032829ULL }, // Inst #6454 = VCVTPD2PHZrrbk |
| 40703 | { 6453, 3, 1, 0, 2044, 1, 0, 3171, X86ImpOpBase + 78, 0, 0x1982d60032829ULL }, // Inst #6453 = VCVTPD2PHZrrb |
| 40704 | { 6452, 2, 1, 0, 2044, 1, 0, 3169, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82d60032829ULL }, // Inst #6452 = VCVTPD2PHZrr |
| 40705 | { 6451, 7, 1, 0, 2042, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2d60032819ULL }, // Inst #6451 = VCVTPD2PHZrmkz |
| 40706 | { 6450, 8, 1, 0, 2042, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2d60032819ULL }, // Inst #6450 = VCVTPD2PHZrmk |
| 40707 | { 6449, 7, 1, 0, 2042, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2d60032819ULL }, // Inst #6449 = VCVTPD2PHZrmbkz |
| 40708 | { 6448, 8, 1, 0, 2042, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2d60032819ULL }, // Inst #6448 = VCVTPD2PHZrmbk |
| 40709 | { 6447, 6, 1, 0, 2040, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982d60032819ULL }, // Inst #6447 = VCVTPD2PHZrmb |
| 40710 | { 6446, 6, 1, 0, 2040, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82d60032819ULL }, // Inst #6446 = VCVTPD2PHZrm |
| 40711 | { 6445, 3, 1, 0, 2039, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72d60032829ULL }, // Inst #6445 = VCVTPD2PHZ256rrkz |
| 40712 | { 6444, 4, 1, 0, 2039, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32d60032829ULL }, // Inst #6444 = VCVTPD2PHZ256rrk |
| 40713 | { 6443, 2, 1, 0, 2038, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12d60032829ULL }, // Inst #6443 = VCVTPD2PHZ256rr |
| 40714 | { 6442, 7, 1, 0, 2037, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72d60032819ULL }, // Inst #6442 = VCVTPD2PHZ256rmkz |
| 40715 | { 6441, 8, 1, 0, 2037, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32d60032819ULL }, // Inst #6441 = VCVTPD2PHZ256rmk |
| 40716 | { 6440, 7, 1, 0, 2037, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972d60032819ULL }, // Inst #6440 = VCVTPD2PHZ256rmbkz |
| 40717 | { 6439, 8, 1, 0, 2037, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932d60032819ULL }, // Inst #6439 = VCVTPD2PHZ256rmbk |
| 40718 | { 6438, 6, 1, 0, 2036, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912d60032819ULL }, // Inst #6438 = VCVTPD2PHZ256rmb |
| 40719 | { 6437, 6, 1, 0, 2036, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12d60032819ULL }, // Inst #6437 = VCVTPD2PHZ256rm |
| 40720 | { 6436, 3, 1, 0, 2035, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62d60032829ULL }, // Inst #6436 = VCVTPD2PHZ128rrkz |
| 40721 | { 6435, 4, 1, 0, 2035, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22d60032829ULL }, // Inst #6435 = VCVTPD2PHZ128rrk |
| 40722 | { 6434, 2, 1, 0, 2034, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02d60032829ULL }, // Inst #6434 = VCVTPD2PHZ128rr |
| 40723 | { 6433, 7, 1, 0, 2033, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62d60032819ULL }, // Inst #6433 = VCVTPD2PHZ128rmkz |
| 40724 | { 6432, 8, 1, 0, 2033, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22d60032819ULL }, // Inst #6432 = VCVTPD2PHZ128rmk |
| 40725 | { 6431, 7, 1, 0, 2033, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962d60032819ULL }, // Inst #6431 = VCVTPD2PHZ128rmbkz |
| 40726 | { 6430, 8, 1, 0, 2033, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922d60032819ULL }, // Inst #6430 = VCVTPD2PHZ128rmbk |
| 40727 | { 6429, 6, 1, 0, 2032, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902d60032819ULL }, // Inst #6429 = VCVTPD2PHZ128rmb |
| 40728 | { 6428, 6, 1, 0, 2032, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02d60032819ULL }, // Inst #6428 = VCVTPD2PHZ128rm |
| 40729 | { 6427, 2, 1, 0, 971, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x7320003829ULL }, // Inst #6427 = VCVTPD2DQrr |
| 40730 | { 6426, 6, 1, 0, 972, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7320003819ULL }, // Inst #6426 = VCVTPD2DQrm |
| 40731 | { 6425, 3, 1, 0, 400, 1, 0, 3166, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee7360023829ULL }, // Inst #6425 = VCVTPD2DQZrrkz |
| 40732 | { 6424, 4, 1, 0, 400, 1, 0, 3162, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea7360023829ULL }, // Inst #6424 = VCVTPD2DQZrrk |
| 40733 | { 6423, 4, 1, 0, 400, 1, 0, 3158, X86ImpOpBase + 78, 0, 0x19e7360023829ULL }, // Inst #6423 = VCVTPD2DQZrrbkz |
| 40734 | { 6422, 5, 1, 0, 400, 1, 0, 3153, X86ImpOpBase + 78, 0, 0x19a7360023829ULL }, // Inst #6422 = VCVTPD2DQZrrbk |
| 40735 | { 6421, 3, 1, 0, 400, 1, 0, 3097, X86ImpOpBase + 78, 0, 0x1987360023829ULL }, // Inst #6421 = VCVTPD2DQZrrb |
| 40736 | { 6420, 2, 1, 0, 1295, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe87360023829ULL }, // Inst #6420 = VCVTPD2DQZrr |
| 40737 | { 6419, 7, 1, 0, 1393, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee7360023819ULL }, // Inst #6419 = VCVTPD2DQZrmkz |
| 40738 | { 6418, 8, 1, 0, 1393, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea7360023819ULL }, // Inst #6418 = VCVTPD2DQZrmk |
| 40739 | { 6417, 7, 1, 0, 1393, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e7360023819ULL }, // Inst #6417 = VCVTPD2DQZrmbkz |
| 40740 | { 6416, 8, 1, 0, 1393, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a7360023819ULL }, // Inst #6416 = VCVTPD2DQZrmbk |
| 40741 | { 6415, 6, 1, 0, 1393, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x987360023819ULL }, // Inst #6415 = VCVTPD2DQZrmb |
| 40742 | { 6414, 6, 1, 0, 1393, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe87360023819ULL }, // Inst #6414 = VCVTPD2DQZrm |
| 40743 | { 6413, 3, 1, 0, 1290, 1, 0, 3150, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc77360023829ULL }, // Inst #6413 = VCVTPD2DQZ256rrkz |
| 40744 | { 6412, 4, 1, 0, 1290, 1, 0, 3146, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc37360023829ULL }, // Inst #6412 = VCVTPD2DQZ256rrk |
| 40745 | { 6411, 2, 1, 0, 1290, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc17360023829ULL }, // Inst #6411 = VCVTPD2DQZ256rr |
| 40746 | { 6410, 7, 1, 0, 2025, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc77360023819ULL }, // Inst #6410 = VCVTPD2DQZ256rmkz |
| 40747 | { 6409, 8, 1, 0, 2025, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc37360023819ULL }, // Inst #6409 = VCVTPD2DQZ256rmk |
| 40748 | { 6408, 7, 1, 0, 2025, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x977360023819ULL }, // Inst #6408 = VCVTPD2DQZ256rmbkz |
| 40749 | { 6407, 8, 1, 0, 2025, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x937360023819ULL }, // Inst #6407 = VCVTPD2DQZ256rmbk |
| 40750 | { 6406, 6, 1, 0, 2025, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x917360023819ULL }, // Inst #6406 = VCVTPD2DQZ256rmb |
| 40751 | { 6405, 6, 1, 0, 2025, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc17360023819ULL }, // Inst #6405 = VCVTPD2DQZ256rm |
| 40752 | { 6404, 3, 1, 0, 1270, 1, 0, 2770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa67360023829ULL }, // Inst #6404 = VCVTPD2DQZ128rrkz |
| 40753 | { 6403, 4, 1, 0, 1270, 1, 0, 2766, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa27360023829ULL }, // Inst #6403 = VCVTPD2DQZ128rrk |
| 40754 | { 6402, 2, 1, 0, 1270, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa07360023829ULL }, // Inst #6402 = VCVTPD2DQZ128rr |
| 40755 | { 6401, 7, 1, 0, 1739, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa67360023819ULL }, // Inst #6401 = VCVTPD2DQZ128rmkz |
| 40756 | { 6400, 8, 1, 0, 1739, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa27360023819ULL }, // Inst #6400 = VCVTPD2DQZ128rmk |
| 40757 | { 6399, 7, 1, 0, 1739, 1, 0, 3070, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x967360023819ULL }, // Inst #6399 = VCVTPD2DQZ128rmbkz |
| 40758 | { 6398, 8, 1, 0, 1739, 1, 0, 3062, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x927360023819ULL }, // Inst #6398 = VCVTPD2DQZ128rmbk |
| 40759 | { 6397, 6, 1, 0, 1739, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x907360023819ULL }, // Inst #6397 = VCVTPD2DQZ128rmb |
| 40760 | { 6396, 6, 1, 0, 1739, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa07360023819ULL }, // Inst #6396 = VCVTPD2DQZ128rm |
| 40761 | { 6395, 2, 1, 0, 973, 1, 0, 3144, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x17320003829ULL }, // Inst #6395 = VCVTPD2DQYrr |
| 40762 | { 6394, 6, 1, 0, 974, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17320003819ULL }, // Inst #6394 = VCVTPD2DQYrm |
| 40763 | { 6393, 2, 1, 0, 354, 0, 0, 557, X86ImpOpBase + 0, 0, 0x8003920005029ULL }, // Inst #6393 = VCVTNEPS2BF16rr |
| 40764 | { 6392, 6, 1, 0, 354, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8003920005019ULL }, // Inst #6392 = VCVTNEPS2BF16rm |
| 40765 | { 6391, 3, 1, 0, 2024, 0, 0, 3113, X86ImpOpBase + 0, 0, 0xee3968005029ULL }, // Inst #6391 = VCVTNEPS2BF16Zrrkz |
| 40766 | { 6390, 4, 1, 0, 2024, 0, 0, 3109, X86ImpOpBase + 0, 0, 0xea3968005029ULL }, // Inst #6390 = VCVTNEPS2BF16Zrrk |
| 40767 | { 6389, 2, 1, 0, 2023, 0, 0, 3095, X86ImpOpBase + 0, 0, 0xe83968005029ULL }, // Inst #6389 = VCVTNEPS2BF16Zrr |
| 40768 | { 6388, 7, 1, 0, 2022, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee3968005019ULL }, // Inst #6388 = VCVTNEPS2BF16Zrmkz |
| 40769 | { 6387, 8, 1, 0, 2022, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea3968005019ULL }, // Inst #6387 = VCVTNEPS2BF16Zrmk |
| 40770 | { 6386, 7, 1, 0, 2022, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e3968005019ULL }, // Inst #6386 = VCVTNEPS2BF16Zrmbkz |
| 40771 | { 6385, 8, 1, 0, 2022, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a3968005019ULL }, // Inst #6385 = VCVTNEPS2BF16Zrmbk |
| 40772 | { 6384, 6, 1, 0, 2021, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x783968005019ULL }, // Inst #6384 = VCVTNEPS2BF16Zrmb |
| 40773 | { 6383, 6, 1, 0, 2021, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe83968005019ULL }, // Inst #6383 = VCVTNEPS2BF16Zrm |
| 40774 | { 6382, 3, 1, 0, 2018, 0, 0, 3092, X86ImpOpBase + 0, 0, 0xc73968005029ULL }, // Inst #6382 = VCVTNEPS2BF16Z256rrkz |
| 40775 | { 6381, 4, 1, 0, 2018, 0, 0, 3088, X86ImpOpBase + 0, 0, 0xc33968005029ULL }, // Inst #6381 = VCVTNEPS2BF16Z256rrk |
| 40776 | { 6380, 2, 1, 0, 2016, 0, 0, 3086, X86ImpOpBase + 0, 0, 0xc13968005029ULL }, // Inst #6380 = VCVTNEPS2BF16Z256rr |
| 40777 | { 6379, 7, 1, 0, 2020, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc73968005019ULL }, // Inst #6379 = VCVTNEPS2BF16Z256rmkz |
| 40778 | { 6378, 8, 1, 0, 2020, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc33968005019ULL }, // Inst #6378 = VCVTNEPS2BF16Z256rmk |
| 40779 | { 6377, 7, 1, 0, 2020, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x773968005019ULL }, // Inst #6377 = VCVTNEPS2BF16Z256rmbkz |
| 40780 | { 6376, 8, 1, 0, 2020, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x733968005019ULL }, // Inst #6376 = VCVTNEPS2BF16Z256rmbk |
| 40781 | { 6375, 6, 1, 0, 2019, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x713968005019ULL }, // Inst #6375 = VCVTNEPS2BF16Z256rmb |
| 40782 | { 6374, 6, 1, 0, 2019, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc13968005019ULL }, // Inst #6374 = VCVTNEPS2BF16Z256rm |
| 40783 | { 6373, 3, 1, 0, 2017, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa63968005029ULL }, // Inst #6373 = VCVTNEPS2BF16Z128rrkz |
| 40784 | { 6372, 4, 1, 0, 2017, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa23968005029ULL }, // Inst #6372 = VCVTNEPS2BF16Z128rrk |
| 40785 | { 6371, 2, 1, 0, 2015, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa03968005029ULL }, // Inst #6371 = VCVTNEPS2BF16Z128rr |
| 40786 | { 6370, 7, 1, 0, 1993, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa63968005019ULL }, // Inst #6370 = VCVTNEPS2BF16Z128rmkz |
| 40787 | { 6369, 8, 1, 0, 1993, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa23968005019ULL }, // Inst #6369 = VCVTNEPS2BF16Z128rmk |
| 40788 | { 6368, 7, 1, 0, 1993, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x763968005019ULL }, // Inst #6368 = VCVTNEPS2BF16Z128rmbkz |
| 40789 | { 6367, 8, 1, 0, 1993, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x723968005019ULL }, // Inst #6367 = VCVTNEPS2BF16Z128rmbk |
| 40790 | { 6366, 6, 1, 0, 1988, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x703968005019ULL }, // Inst #6366 = VCVTNEPS2BF16Z128rmb |
| 40791 | { 6365, 6, 1, 0, 1988, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa03968005019ULL }, // Inst #6365 = VCVTNEPS2BF16Z128rm |
| 40792 | { 6364, 2, 1, 0, 353, 0, 0, 3144, X86ImpOpBase + 0, 0, 0x8013920005029ULL }, // Inst #6364 = VCVTNEPS2BF16Yrr |
| 40793 | { 6363, 6, 1, 0, 353, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8013920005019ULL }, // Inst #6363 = VCVTNEPS2BF16Yrm |
| 40794 | { 6362, 6, 1, 0, 354, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5820004019ULL }, // Inst #6362 = VCVTNEOPH2PSrm |
| 40795 | { 6361, 6, 1, 0, 353, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x15820004019ULL }, // Inst #6361 = VCVTNEOPH2PSYrm |
| 40796 | { 6360, 6, 1, 0, 354, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5820005819ULL }, // Inst #6360 = VCVTNEOBF162PSrm |
| 40797 | { 6359, 6, 1, 0, 353, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x15820005819ULL }, // Inst #6359 = VCVTNEOBF162PSYrm |
| 40798 | { 6358, 6, 1, 0, 354, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5820004819ULL }, // Inst #6358 = VCVTNEEPH2PSrm |
| 40799 | { 6357, 6, 1, 0, 353, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x15820004819ULL }, // Inst #6357 = VCVTNEEPH2PSYrm |
| 40800 | { 6356, 6, 1, 0, 354, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5820005019ULL }, // Inst #6356 = VCVTNEEBF162PSrm |
| 40801 | { 6355, 6, 1, 0, 353, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x15820005019ULL }, // Inst #6355 = VCVTNEEBF162PSYrm |
| 40802 | { 6354, 4, 1, 0, 2014, 0, 0, 1759, X86ImpOpBase + 0, 0, 0xeeb968005829ULL }, // Inst #6354 = VCVTNE2PS2BF16Zrrkz |
| 40803 | { 6353, 5, 1, 0, 2014, 0, 0, 1754, X86ImpOpBase + 0, 0, 0xeab968005829ULL }, // Inst #6353 = VCVTNE2PS2BF16Zrrk |
| 40804 | { 6352, 3, 1, 0, 2013, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b968005829ULL }, // Inst #6352 = VCVTNE2PS2BF16Zrr |
| 40805 | { 6351, 8, 1, 0, 2012, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb968005819ULL }, // Inst #6351 = VCVTNE2PS2BF16Zrmkz |
| 40806 | { 6350, 9, 1, 0, 2012, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab968005819ULL }, // Inst #6350 = VCVTNE2PS2BF16Zrmk |
| 40807 | { 6349, 8, 1, 0, 2012, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb968005819ULL }, // Inst #6349 = VCVTNE2PS2BF16Zrmbkz |
| 40808 | { 6348, 9, 1, 0, 2012, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab968005819ULL }, // Inst #6348 = VCVTNE2PS2BF16Zrmbk |
| 40809 | { 6347, 7, 1, 0, 2009, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b968005819ULL }, // Inst #6347 = VCVTNE2PS2BF16Zrmb |
| 40810 | { 6346, 7, 1, 0, 2009, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b968005819ULL }, // Inst #6346 = VCVTNE2PS2BF16Zrm |
| 40811 | { 6345, 4, 1, 0, 2006, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7b968005829ULL }, // Inst #6345 = VCVTNE2PS2BF16Z256rrkz |
| 40812 | { 6344, 5, 1, 0, 2006, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3b968005829ULL }, // Inst #6344 = VCVTNE2PS2BF16Z256rrk |
| 40813 | { 6343, 3, 1, 0, 2004, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b968005829ULL }, // Inst #6343 = VCVTNE2PS2BF16Z256rr |
| 40814 | { 6342, 8, 1, 0, 2008, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b968005819ULL }, // Inst #6342 = VCVTNE2PS2BF16Z256rmkz |
| 40815 | { 6341, 9, 1, 0, 2008, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b968005819ULL }, // Inst #6341 = VCVTNE2PS2BF16Z256rmk |
| 40816 | { 6340, 8, 1, 0, 2008, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b968005819ULL }, // Inst #6340 = VCVTNE2PS2BF16Z256rmbkz |
| 40817 | { 6339, 9, 1, 0, 2008, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b968005819ULL }, // Inst #6339 = VCVTNE2PS2BF16Z256rmbk |
| 40818 | { 6338, 7, 1, 0, 2007, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b968005819ULL }, // Inst #6338 = VCVTNE2PS2BF16Z256rmb |
| 40819 | { 6337, 7, 1, 0, 2007, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b968005819ULL }, // Inst #6337 = VCVTNE2PS2BF16Z256rm |
| 40820 | { 6336, 4, 1, 0, 2005, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6b968005829ULL }, // Inst #6336 = VCVTNE2PS2BF16Z128rrkz |
| 40821 | { 6335, 5, 1, 0, 2005, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2b968005829ULL }, // Inst #6335 = VCVTNE2PS2BF16Z128rrk |
| 40822 | { 6334, 3, 1, 0, 2003, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b968005829ULL }, // Inst #6334 = VCVTNE2PS2BF16Z128rr |
| 40823 | { 6333, 8, 1, 0, 2002, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b968005819ULL }, // Inst #6333 = VCVTNE2PS2BF16Z128rmkz |
| 40824 | { 6332, 9, 1, 0, 2002, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b968005819ULL }, // Inst #6332 = VCVTNE2PS2BF16Z128rmk |
| 40825 | { 6331, 8, 1, 0, 2002, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b968005819ULL }, // Inst #6331 = VCVTNE2PS2BF16Z128rmbkz |
| 40826 | { 6330, 9, 1, 0, 2002, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b968005819ULL }, // Inst #6330 = VCVTNE2PS2BF16Z128rmbk |
| 40827 | { 6329, 7, 1, 0, 2001, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b968005819ULL }, // Inst #6329 = VCVTNE2PS2BF16Z128rmb |
| 40828 | { 6328, 7, 1, 0, 2001, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b968005819ULL }, // Inst #6328 = VCVTNE2PS2BF16Z128rm |
| 40829 | { 6327, 3, 1, 0, 394, 0, 0, 3141, X86ImpOpBase + 0, 0, 0xce0f78053829ULL }, // Inst #6327 = VCVTHF82PHZrrkz |
| 40830 | { 6326, 4, 1, 0, 394, 0, 0, 3137, X86ImpOpBase + 0, 0, 0xca0f78053829ULL }, // Inst #6326 = VCVTHF82PHZrrk |
| 40831 | { 6325, 2, 1, 0, 394, 0, 0, 3077, X86ImpOpBase + 0, 0, 0xc80f78053829ULL }, // Inst #6325 = VCVTHF82PHZrr |
| 40832 | { 6324, 7, 1, 0, 393, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce0f78053819ULL }, // Inst #6324 = VCVTHF82PHZrmkz |
| 40833 | { 6323, 8, 1, 0, 393, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca0f78053819ULL }, // Inst #6323 = VCVTHF82PHZrmk |
| 40834 | { 6322, 6, 1, 0, 393, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc80f78053819ULL }, // Inst #6322 = VCVTHF82PHZrm |
| 40835 | { 6321, 3, 1, 0, 394, 0, 0, 3134, X86ImpOpBase + 0, 0, 0xa70f78053829ULL }, // Inst #6321 = VCVTHF82PHZ256rrkz |
| 40836 | { 6320, 4, 1, 0, 394, 0, 0, 3130, X86ImpOpBase + 0, 0, 0xa30f78053829ULL }, // Inst #6320 = VCVTHF82PHZ256rrk |
| 40837 | { 6319, 2, 1, 0, 394, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xa10f78053829ULL }, // Inst #6319 = VCVTHF82PHZ256rr |
| 40838 | { 6318, 7, 1, 0, 393, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa70f78053819ULL }, // Inst #6318 = VCVTHF82PHZ256rmkz |
| 40839 | { 6317, 8, 1, 0, 393, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa30f78053819ULL }, // Inst #6317 = VCVTHF82PHZ256rmk |
| 40840 | { 6316, 6, 1, 0, 393, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa10f78053819ULL }, // Inst #6316 = VCVTHF82PHZ256rm |
| 40841 | { 6315, 3, 1, 0, 394, 0, 0, 2943, X86ImpOpBase + 0, 0, 0x860f78053829ULL }, // Inst #6315 = VCVTHF82PHZ128rrkz |
| 40842 | { 6314, 4, 1, 0, 394, 0, 0, 2939, X86ImpOpBase + 0, 0, 0x820f78053829ULL }, // Inst #6314 = VCVTHF82PHZ128rrk |
| 40843 | { 6313, 2, 1, 0, 394, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x800f78053829ULL }, // Inst #6313 = VCVTHF82PHZ128rr |
| 40844 | { 6312, 7, 1, 0, 393, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x860f78053819ULL }, // Inst #6312 = VCVTHF82PHZ128rmkz |
| 40845 | { 6311, 8, 1, 0, 393, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x820f78053819ULL }, // Inst #6311 = VCVTHF82PHZ128rmk |
| 40846 | { 6310, 6, 1, 0, 393, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x800f78053819ULL }, // Inst #6310 = VCVTHF82PHZ128rm |
| 40847 | { 6309, 2, 1, 0, 1002, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2da8002029ULL }, // Inst #6309 = VCVTDQ2PSrr |
| 40848 | { 6308, 6, 1, 0, 1358, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2da8002019ULL }, // Inst #6308 = VCVTDQ2PSrm |
| 40849 | { 6307, 3, 1, 0, 392, 1, 0, 2843, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0002029ULL }, // Inst #6307 = VCVTDQ2PSZrrkz |
| 40850 | { 6306, 4, 1, 0, 392, 1, 0, 2839, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0002029ULL }, // Inst #6306 = VCVTDQ2PSZrrk |
| 40851 | { 6305, 4, 1, 0, 392, 1, 0, 3126, X86ImpOpBase + 78, 0, 0x17e2de0002029ULL }, // Inst #6305 = VCVTDQ2PSZrrbkz |
| 40852 | { 6304, 5, 1, 0, 392, 1, 0, 3121, X86ImpOpBase + 78, 0, 0x17a2de0002029ULL }, // Inst #6304 = VCVTDQ2PSZrrbk |
| 40853 | { 6303, 3, 1, 0, 392, 1, 0, 3118, X86ImpOpBase + 78, 0, 0x1782de0002029ULL }, // Inst #6303 = VCVTDQ2PSZrrb |
| 40854 | { 6302, 2, 1, 0, 392, 1, 0, 2802, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0002029ULL }, // Inst #6302 = VCVTDQ2PSZrr |
| 40855 | { 6301, 7, 1, 0, 1370, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0002019ULL }, // Inst #6301 = VCVTDQ2PSZrmkz |
| 40856 | { 6300, 8, 1, 0, 1370, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0002019ULL }, // Inst #6300 = VCVTDQ2PSZrmk |
| 40857 | { 6299, 7, 1, 0, 1370, 1, 0, 2337, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2de0002019ULL }, // Inst #6299 = VCVTDQ2PSZrmbkz |
| 40858 | { 6298, 8, 1, 0, 1370, 1, 0, 2329, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2de0002019ULL }, // Inst #6298 = VCVTDQ2PSZrmbk |
| 40859 | { 6297, 6, 1, 0, 1370, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782de0002019ULL }, // Inst #6297 = VCVTDQ2PSZrmb |
| 40860 | { 6296, 6, 1, 0, 1370, 1, 0, 2323, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0002019ULL }, // Inst #6296 = VCVTDQ2PSZrm |
| 40861 | { 6295, 3, 1, 0, 390, 1, 0, 2829, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0002029ULL }, // Inst #6295 = VCVTDQ2PSZ256rrkz |
| 40862 | { 6294, 4, 1, 0, 390, 1, 0, 2825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0002029ULL }, // Inst #6294 = VCVTDQ2PSZ256rrk |
| 40863 | { 6293, 2, 1, 0, 390, 1, 0, 2780, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0002029ULL }, // Inst #6293 = VCVTDQ2PSZ256rr |
| 40864 | { 6292, 7, 1, 0, 1369, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0002019ULL }, // Inst #6292 = VCVTDQ2PSZ256rmkz |
| 40865 | { 6291, 8, 1, 0, 1369, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0002019ULL }, // Inst #6291 = VCVTDQ2PSZ256rmk |
| 40866 | { 6290, 7, 1, 0, 1369, 1, 0, 2307, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772de0002019ULL }, // Inst #6290 = VCVTDQ2PSZ256rmbkz |
| 40867 | { 6289, 8, 1, 0, 1369, 1, 0, 2299, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732de0002019ULL }, // Inst #6289 = VCVTDQ2PSZ256rmbk |
| 40868 | { 6288, 6, 1, 0, 1369, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712de0002019ULL }, // Inst #6288 = VCVTDQ2PSZ256rmb |
| 40869 | { 6287, 6, 1, 0, 1369, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0002019ULL }, // Inst #6287 = VCVTDQ2PSZ256rm |
| 40870 | { 6286, 3, 1, 0, 93, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0002029ULL }, // Inst #6286 = VCVTDQ2PSZ128rrkz |
| 40871 | { 6285, 4, 1, 0, 93, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0002029ULL }, // Inst #6285 = VCVTDQ2PSZ128rrk |
| 40872 | { 6284, 2, 1, 0, 93, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0002029ULL }, // Inst #6284 = VCVTDQ2PSZ128rr |
| 40873 | { 6283, 7, 1, 0, 1358, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0002019ULL }, // Inst #6283 = VCVTDQ2PSZ128rmkz |
| 40874 | { 6282, 8, 1, 0, 1358, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0002019ULL }, // Inst #6282 = VCVTDQ2PSZ128rmk |
| 40875 | { 6281, 7, 1, 0, 1358, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762de0002019ULL }, // Inst #6281 = VCVTDQ2PSZ128rmbkz |
| 40876 | { 6280, 8, 1, 0, 1358, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722de0002019ULL }, // Inst #6280 = VCVTDQ2PSZ128rmbk |
| 40877 | { 6279, 6, 1, 0, 1358, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702de0002019ULL }, // Inst #6279 = VCVTDQ2PSZ128rmb |
| 40878 | { 6278, 6, 1, 0, 1358, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0002019ULL }, // Inst #6278 = VCVTDQ2PSZ128rm |
| 40879 | { 6277, 2, 1, 0, 1003, 1, 0, 3116, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x12da8002029ULL }, // Inst #6277 = VCVTDQ2PSYrr |
| 40880 | { 6276, 6, 1, 0, 1365, 1, 0, 2253, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x12da8002019ULL }, // Inst #6276 = VCVTDQ2PSYrm |
| 40881 | { 6275, 3, 1, 0, 2000, 1, 0, 3113, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0012029ULL }, // Inst #6275 = VCVTDQ2PHZrrkz |
| 40882 | { 6274, 4, 1, 0, 2000, 1, 0, 3109, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0012029ULL }, // Inst #6274 = VCVTDQ2PHZrrk |
| 40883 | { 6273, 4, 1, 0, 2000, 1, 0, 3105, X86ImpOpBase + 78, 0, 0x17e2de0012029ULL }, // Inst #6273 = VCVTDQ2PHZrrbkz |
| 40884 | { 6272, 5, 1, 0, 2000, 1, 0, 3100, X86ImpOpBase + 78, 0, 0x17a2de0012029ULL }, // Inst #6272 = VCVTDQ2PHZrrbk |
| 40885 | { 6271, 3, 1, 0, 1999, 1, 0, 3097, X86ImpOpBase + 78, 0, 0x1782de0012029ULL }, // Inst #6271 = VCVTDQ2PHZrrb |
| 40886 | { 6270, 2, 1, 0, 1999, 1, 0, 3095, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0012029ULL }, // Inst #6270 = VCVTDQ2PHZrr |
| 40887 | { 6269, 7, 1, 0, 1998, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0012019ULL }, // Inst #6269 = VCVTDQ2PHZrmkz |
| 40888 | { 6268, 8, 1, 0, 1998, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0012019ULL }, // Inst #6268 = VCVTDQ2PHZrmk |
| 40889 | { 6267, 7, 1, 0, 1998, 1, 0, 2954, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2de0012019ULL }, // Inst #6267 = VCVTDQ2PHZrmbkz |
| 40890 | { 6266, 8, 1, 0, 1998, 1, 0, 2946, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2de0012019ULL }, // Inst #6266 = VCVTDQ2PHZrmbk |
| 40891 | { 6265, 6, 1, 0, 1997, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782de0012019ULL }, // Inst #6265 = VCVTDQ2PHZrmb |
| 40892 | { 6264, 6, 1, 0, 1997, 1, 0, 314, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0012019ULL }, // Inst #6264 = VCVTDQ2PHZrm |
| 40893 | { 6263, 3, 1, 0, 1996, 1, 0, 3092, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0012029ULL }, // Inst #6263 = VCVTDQ2PHZ256rrkz |
| 40894 | { 6262, 4, 1, 0, 1996, 1, 0, 3088, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0012029ULL }, // Inst #6262 = VCVTDQ2PHZ256rrk |
| 40895 | { 6261, 2, 1, 0, 1995, 1, 0, 3086, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0012029ULL }, // Inst #6261 = VCVTDQ2PHZ256rr |
| 40896 | { 6260, 7, 1, 0, 1994, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0012019ULL }, // Inst #6260 = VCVTDQ2PHZ256rmkz |
| 40897 | { 6259, 8, 1, 0, 1994, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0012019ULL }, // Inst #6259 = VCVTDQ2PHZ256rmk |
| 40898 | { 6258, 7, 1, 0, 1994, 1, 0, 2932, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772de0012019ULL }, // Inst #6258 = VCVTDQ2PHZ256rmbkz |
| 40899 | { 6257, 8, 1, 0, 1994, 1, 0, 2924, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732de0012019ULL }, // Inst #6257 = VCVTDQ2PHZ256rmbk |
| 40900 | { 6256, 6, 1, 0, 1992, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712de0012019ULL }, // Inst #6256 = VCVTDQ2PHZ256rmb |
| 40901 | { 6255, 6, 1, 0, 1992, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0012019ULL }, // Inst #6255 = VCVTDQ2PHZ256rm |
| 40902 | { 6254, 3, 1, 0, 1991, 1, 0, 2404, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0012029ULL }, // Inst #6254 = VCVTDQ2PHZ128rrkz |
| 40903 | { 6253, 4, 1, 0, 1991, 1, 0, 2400, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0012029ULL }, // Inst #6253 = VCVTDQ2PHZ128rrk |
| 40904 | { 6252, 2, 1, 0, 1990, 1, 0, 2398, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0012029ULL }, // Inst #6252 = VCVTDQ2PHZ128rr |
| 40905 | { 6251, 7, 1, 0, 1989, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0012019ULL }, // Inst #6251 = VCVTDQ2PHZ128rmkz |
| 40906 | { 6250, 8, 1, 0, 1989, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0012019ULL }, // Inst #6250 = VCVTDQ2PHZ128rmk |
| 40907 | { 6249, 7, 1, 0, 1989, 1, 0, 2391, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762de0012019ULL }, // Inst #6249 = VCVTDQ2PHZ128rmbkz |
| 40908 | { 6248, 8, 1, 0, 1989, 1, 0, 2383, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722de0012019ULL }, // Inst #6248 = VCVTDQ2PHZ128rmbk |
| 40909 | { 6247, 6, 1, 0, 1987, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702de0012019ULL }, // Inst #6247 = VCVTDQ2PHZ128rmb |
| 40910 | { 6246, 6, 1, 0, 1987, 1, 0, 302, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0012019ULL }, // Inst #6246 = VCVTDQ2PHZ128rm |
| 40911 | { 6245, 2, 1, 0, 969, 0, 0, 557, X86ImpOpBase + 0, 0, 0x7320003029ULL }, // Inst #6245 = VCVTDQ2PDrr |
| 40912 | { 6244, 6, 1, 0, 1380, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7320003019ULL }, // Inst #6244 = VCVTDQ2PDrm |
| 40913 | { 6243, 3, 1, 0, 1984, 0, 0, 3083, X86ImpOpBase + 0, 0, 0xce7360003029ULL }, // Inst #6243 = VCVTDQ2PDZrrkz |
| 40914 | { 6242, 4, 1, 0, 1984, 0, 0, 3079, X86ImpOpBase + 0, 0, 0xca7360003029ULL }, // Inst #6242 = VCVTDQ2PDZrrk |
| 40915 | { 6241, 2, 1, 0, 1294, 0, 0, 3077, X86ImpOpBase + 0, 0, 0xc87360003029ULL }, // Inst #6241 = VCVTDQ2PDZrr |
| 40916 | { 6240, 7, 1, 0, 1368, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce7360003019ULL }, // Inst #6240 = VCVTDQ2PDZrmkz |
| 40917 | { 6239, 8, 1, 0, 1368, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca7360003019ULL }, // Inst #6239 = VCVTDQ2PDZrmk |
| 40918 | { 6238, 7, 1, 0, 1368, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e7360003019ULL }, // Inst #6238 = VCVTDQ2PDZrmbkz |
| 40919 | { 6237, 8, 1, 0, 1368, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a7360003019ULL }, // Inst #6237 = VCVTDQ2PDZrmbk |
| 40920 | { 6236, 6, 1, 0, 1368, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x787360003019ULL }, // Inst #6236 = VCVTDQ2PDZrmb |
| 40921 | { 6235, 6, 1, 0, 1368, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc87360003019ULL }, // Inst #6235 = VCVTDQ2PDZrm |
| 40922 | { 6234, 3, 1, 0, 1289, 0, 0, 2413, X86ImpOpBase + 0, 0, 0xa77360003029ULL }, // Inst #6234 = VCVTDQ2PDZ256rrkz |
| 40923 | { 6233, 4, 1, 0, 1289, 0, 0, 2409, X86ImpOpBase + 0, 0, 0xa37360003029ULL }, // Inst #6233 = VCVTDQ2PDZ256rrk |
| 40924 | { 6232, 2, 1, 0, 1289, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xa17360003029ULL }, // Inst #6232 = VCVTDQ2PDZ256rr |
| 40925 | { 6231, 7, 1, 0, 1367, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa77360003019ULL }, // Inst #6231 = VCVTDQ2PDZ256rmkz |
| 40926 | { 6230, 8, 1, 0, 1367, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa37360003019ULL }, // Inst #6230 = VCVTDQ2PDZ256rmk |
| 40927 | { 6229, 7, 1, 0, 1367, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x777360003019ULL }, // Inst #6229 = VCVTDQ2PDZ256rmbkz |
| 40928 | { 6228, 8, 1, 0, 1367, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x737360003019ULL }, // Inst #6228 = VCVTDQ2PDZ256rmbk |
| 40929 | { 6227, 6, 1, 0, 1367, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x717360003019ULL }, // Inst #6227 = VCVTDQ2PDZ256rmb |
| 40930 | { 6226, 6, 1, 0, 1367, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa17360003019ULL }, // Inst #6226 = VCVTDQ2PDZ256rm |
| 40931 | { 6225, 3, 1, 0, 1269, 0, 0, 2770, X86ImpOpBase + 0, 0, 0x867360003029ULL }, // Inst #6225 = VCVTDQ2PDZ128rrkz |
| 40932 | { 6224, 4, 1, 0, 1269, 0, 0, 2766, X86ImpOpBase + 0, 0, 0x827360003029ULL }, // Inst #6224 = VCVTDQ2PDZ128rrk |
| 40933 | { 6223, 2, 1, 0, 1269, 0, 0, 2398, X86ImpOpBase + 0, 0, 0x807360003029ULL }, // Inst #6223 = VCVTDQ2PDZ128rr |
| 40934 | { 6222, 7, 1, 0, 1357, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x867360003019ULL }, // Inst #6222 = VCVTDQ2PDZ128rmkz |
| 40935 | { 6221, 8, 1, 0, 1357, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x827360003019ULL }, // Inst #6221 = VCVTDQ2PDZ128rmk |
| 40936 | { 6220, 7, 1, 0, 1357, 0, 0, 3070, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x767360003019ULL }, // Inst #6220 = VCVTDQ2PDZ128rmbkz |
| 40937 | { 6219, 8, 1, 0, 1357, 0, 0, 3062, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x727360003019ULL }, // Inst #6219 = VCVTDQ2PDZ128rmbk |
| 40938 | { 6218, 6, 1, 0, 1357, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x707360003019ULL }, // Inst #6218 = VCVTDQ2PDZ128rmb |
| 40939 | { 6217, 6, 1, 0, 1357, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x807360003019ULL }, // Inst #6217 = VCVTDQ2PDZ128rm |
| 40940 | { 6216, 2, 1, 0, 970, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x17320003029ULL }, // Inst #6216 = VCVTDQ2PDYrr |
| 40941 | { 6215, 6, 1, 0, 1391, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x17320003019ULL }, // Inst #6215 = VCVTDQ2PDYrm |
| 40942 | { 6214, 4, 1, 0, 380, 0, 0, 3058, X86ImpOpBase + 0, 0, 0xee8c60012029ULL }, // Inst #6214 = VCVTBIASPH2HF8Zrrkz |
| 40943 | { 6213, 5, 1, 0, 380, 0, 0, 3053, X86ImpOpBase + 0, 0, 0xea8c60012029ULL }, // Inst #6213 = VCVTBIASPH2HF8Zrrk |
| 40944 | { 6212, 3, 1, 0, 380, 0, 0, 3050, X86ImpOpBase + 0, 0, 0xe88c60012029ULL }, // Inst #6212 = VCVTBIASPH2HF8Zrr |
| 40945 | { 6211, 8, 1, 0, 380, 0, 0, 3042, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8c60012019ULL }, // Inst #6211 = VCVTBIASPH2HF8Zrmkz |
| 40946 | { 6210, 9, 1, 0, 380, 0, 0, 3033, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8c60012019ULL }, // Inst #6210 = VCVTBIASPH2HF8Zrmk |
| 40947 | { 6209, 8, 1, 0, 380, 0, 0, 3042, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e8c60012019ULL }, // Inst #6209 = VCVTBIASPH2HF8Zrmbkz |
| 40948 | { 6208, 9, 1, 0, 380, 0, 0, 3033, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a8c60012019ULL }, // Inst #6208 = VCVTBIASPH2HF8Zrmbk |
| 40949 | { 6207, 7, 1, 0, 380, 0, 0, 3026, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x588c60012019ULL }, // Inst #6207 = VCVTBIASPH2HF8Zrmb |
| 40950 | { 6206, 7, 1, 0, 380, 0, 0, 3026, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88c60012019ULL }, // Inst #6206 = VCVTBIASPH2HF8Zrm |
| 40951 | { 6205, 4, 1, 0, 378, 0, 0, 3022, X86ImpOpBase + 0, 0, 0xc78c60012029ULL }, // Inst #6205 = VCVTBIASPH2HF8Z256rrkz |
| 40952 | { 6204, 5, 1, 0, 378, 0, 0, 3017, X86ImpOpBase + 0, 0, 0xc38c60012029ULL }, // Inst #6204 = VCVTBIASPH2HF8Z256rrk |
| 40953 | { 6203, 3, 1, 0, 378, 0, 0, 3014, X86ImpOpBase + 0, 0, 0xc18c60012029ULL }, // Inst #6203 = VCVTBIASPH2HF8Z256rr |
| 40954 | { 6202, 8, 1, 0, 378, 0, 0, 3006, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78c60012019ULL }, // Inst #6202 = VCVTBIASPH2HF8Z256rmkz |
| 40955 | { 6201, 9, 1, 0, 378, 0, 0, 2997, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38c60012019ULL }, // Inst #6201 = VCVTBIASPH2HF8Z256rmk |
| 40956 | { 6200, 8, 1, 0, 378, 0, 0, 3006, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x578c60012019ULL }, // Inst #6200 = VCVTBIASPH2HF8Z256rmbkz |
| 40957 | { 6199, 9, 1, 0, 378, 0, 0, 2997, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x538c60012019ULL }, // Inst #6199 = VCVTBIASPH2HF8Z256rmbk |
| 40958 | { 6198, 7, 1, 0, 378, 0, 0, 2990, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x518c60012019ULL }, // Inst #6198 = VCVTBIASPH2HF8Z256rmb |
| 40959 | { 6197, 7, 1, 0, 378, 0, 0, 2990, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18c60012019ULL }, // Inst #6197 = VCVTBIASPH2HF8Z256rm |
| 40960 | { 6196, 4, 1, 0, 97, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa68c60012029ULL }, // Inst #6196 = VCVTBIASPH2HF8Z128rrkz |
| 40961 | { 6195, 5, 1, 0, 97, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa28c60012029ULL }, // Inst #6195 = VCVTBIASPH2HF8Z128rrk |
| 40962 | { 6194, 3, 1, 0, 97, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08c60012029ULL }, // Inst #6194 = VCVTBIASPH2HF8Z128rr |
| 40963 | { 6193, 8, 1, 0, 97, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68c60012019ULL }, // Inst #6193 = VCVTBIASPH2HF8Z128rmkz |
| 40964 | { 6192, 9, 1, 0, 97, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28c60012019ULL }, // Inst #6192 = VCVTBIASPH2HF8Z128rmk |
| 40965 | { 6191, 8, 1, 0, 97, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x568c60012019ULL }, // Inst #6191 = VCVTBIASPH2HF8Z128rmbkz |
| 40966 | { 6190, 9, 1, 0, 97, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x528c60012019ULL }, // Inst #6190 = VCVTBIASPH2HF8Z128rmbk |
| 40967 | { 6189, 7, 1, 0, 97, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x508c60012019ULL }, // Inst #6189 = VCVTBIASPH2HF8Z128rmb |
| 40968 | { 6188, 7, 1, 0, 97, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08c60012019ULL }, // Inst #6188 = VCVTBIASPH2HF8Z128rm |
| 40969 | { 6187, 4, 1, 0, 380, 0, 0, 3058, X86ImpOpBase + 0, 0, 0xee8de0012029ULL }, // Inst #6187 = VCVTBIASPH2HF8SZrrkz |
| 40970 | { 6186, 5, 1, 0, 380, 0, 0, 3053, X86ImpOpBase + 0, 0, 0xea8de0012029ULL }, // Inst #6186 = VCVTBIASPH2HF8SZrrk |
| 40971 | { 6185, 3, 1, 0, 380, 0, 0, 3050, X86ImpOpBase + 0, 0, 0xe88de0012029ULL }, // Inst #6185 = VCVTBIASPH2HF8SZrr |
| 40972 | { 6184, 8, 1, 0, 380, 0, 0, 3042, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8de0012019ULL }, // Inst #6184 = VCVTBIASPH2HF8SZrmkz |
| 40973 | { 6183, 9, 1, 0, 380, 0, 0, 3033, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8de0012019ULL }, // Inst #6183 = VCVTBIASPH2HF8SZrmk |
| 40974 | { 6182, 8, 1, 0, 380, 0, 0, 3042, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e8de0012019ULL }, // Inst #6182 = VCVTBIASPH2HF8SZrmbkz |
| 40975 | { 6181, 9, 1, 0, 380, 0, 0, 3033, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a8de0012019ULL }, // Inst #6181 = VCVTBIASPH2HF8SZrmbk |
| 40976 | { 6180, 7, 1, 0, 380, 0, 0, 3026, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x588de0012019ULL }, // Inst #6180 = VCVTBIASPH2HF8SZrmb |
| 40977 | { 6179, 7, 1, 0, 380, 0, 0, 3026, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88de0012019ULL }, // Inst #6179 = VCVTBIASPH2HF8SZrm |
| 40978 | { 6178, 4, 1, 0, 378, 0, 0, 3022, X86ImpOpBase + 0, 0, 0xc78de0012029ULL }, // Inst #6178 = VCVTBIASPH2HF8SZ256rrkz |
| 40979 | { 6177, 5, 1, 0, 378, 0, 0, 3017, X86ImpOpBase + 0, 0, 0xc38de0012029ULL }, // Inst #6177 = VCVTBIASPH2HF8SZ256rrk |
| 40980 | { 6176, 3, 1, 0, 378, 0, 0, 3014, X86ImpOpBase + 0, 0, 0xc18de0012029ULL }, // Inst #6176 = VCVTBIASPH2HF8SZ256rr |
| 40981 | { 6175, 8, 1, 0, 378, 0, 0, 3006, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78de0012019ULL }, // Inst #6175 = VCVTBIASPH2HF8SZ256rmkz |
| 40982 | { 6174, 9, 1, 0, 378, 0, 0, 2997, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38de0012019ULL }, // Inst #6174 = VCVTBIASPH2HF8SZ256rmk |
| 40983 | { 6173, 8, 1, 0, 378, 0, 0, 3006, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x578de0012019ULL }, // Inst #6173 = VCVTBIASPH2HF8SZ256rmbkz |
| 40984 | { 6172, 9, 1, 0, 378, 0, 0, 2997, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x538de0012019ULL }, // Inst #6172 = VCVTBIASPH2HF8SZ256rmbk |
| 40985 | { 6171, 7, 1, 0, 378, 0, 0, 2990, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x518de0012019ULL }, // Inst #6171 = VCVTBIASPH2HF8SZ256rmb |
| 40986 | { 6170, 7, 1, 0, 378, 0, 0, 2990, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18de0012019ULL }, // Inst #6170 = VCVTBIASPH2HF8SZ256rm |
| 40987 | { 6169, 4, 1, 0, 97, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa68de0012029ULL }, // Inst #6169 = VCVTBIASPH2HF8SZ128rrkz |
| 40988 | { 6168, 5, 1, 0, 97, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa28de0012029ULL }, // Inst #6168 = VCVTBIASPH2HF8SZ128rrk |
| 40989 | { 6167, 3, 1, 0, 97, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08de0012029ULL }, // Inst #6167 = VCVTBIASPH2HF8SZ128rr |
| 40990 | { 6166, 8, 1, 0, 97, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68de0012019ULL }, // Inst #6166 = VCVTBIASPH2HF8SZ128rmkz |
| 40991 | { 6165, 9, 1, 0, 97, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28de0012019ULL }, // Inst #6165 = VCVTBIASPH2HF8SZ128rmk |
| 40992 | { 6164, 8, 1, 0, 97, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x568de0012019ULL }, // Inst #6164 = VCVTBIASPH2HF8SZ128rmbkz |
| 40993 | { 6163, 9, 1, 0, 97, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x528de0012019ULL }, // Inst #6163 = VCVTBIASPH2HF8SZ128rmbk |
| 40994 | { 6162, 7, 1, 0, 97, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x508de0012019ULL }, // Inst #6162 = VCVTBIASPH2HF8SZ128rmb |
| 40995 | { 6161, 7, 1, 0, 97, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08de0012019ULL }, // Inst #6161 = VCVTBIASPH2HF8SZ128rm |
| 40996 | { 6160, 4, 1, 0, 380, 0, 0, 3058, X86ImpOpBase + 0, 0, 0xeeba60004029ULL }, // Inst #6160 = VCVTBIASPH2BF8Zrrkz |
| 40997 | { 6159, 5, 1, 0, 380, 0, 0, 3053, X86ImpOpBase + 0, 0, 0xeaba60004029ULL }, // Inst #6159 = VCVTBIASPH2BF8Zrrk |
| 40998 | { 6158, 3, 1, 0, 380, 0, 0, 3050, X86ImpOpBase + 0, 0, 0xe8ba60004029ULL }, // Inst #6158 = VCVTBIASPH2BF8Zrr |
| 40999 | { 6157, 8, 1, 0, 380, 0, 0, 3042, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeba60004019ULL }, // Inst #6157 = VCVTBIASPH2BF8Zrmkz |
| 41000 | { 6156, 9, 1, 0, 380, 0, 0, 3033, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaba60004019ULL }, // Inst #6156 = VCVTBIASPH2BF8Zrmk |
| 41001 | { 6155, 8, 1, 0, 380, 0, 0, 3042, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5eba60004019ULL }, // Inst #6155 = VCVTBIASPH2BF8Zrmbkz |
| 41002 | { 6154, 9, 1, 0, 380, 0, 0, 3033, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5aba60004019ULL }, // Inst #6154 = VCVTBIASPH2BF8Zrmbk |
| 41003 | { 6153, 7, 1, 0, 380, 0, 0, 3026, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58ba60004019ULL }, // Inst #6153 = VCVTBIASPH2BF8Zrmb |
| 41004 | { 6152, 7, 1, 0, 380, 0, 0, 3026, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ba60004019ULL }, // Inst #6152 = VCVTBIASPH2BF8Zrm |
| 41005 | { 6151, 4, 1, 0, 378, 0, 0, 3022, X86ImpOpBase + 0, 0, 0xc7ba60004029ULL }, // Inst #6151 = VCVTBIASPH2BF8Z256rrkz |
| 41006 | { 6150, 5, 1, 0, 378, 0, 0, 3017, X86ImpOpBase + 0, 0, 0xc3ba60004029ULL }, // Inst #6150 = VCVTBIASPH2BF8Z256rrk |
| 41007 | { 6149, 3, 1, 0, 378, 0, 0, 3014, X86ImpOpBase + 0, 0, 0xc1ba60004029ULL }, // Inst #6149 = VCVTBIASPH2BF8Z256rr |
| 41008 | { 6148, 8, 1, 0, 378, 0, 0, 3006, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ba60004019ULL }, // Inst #6148 = VCVTBIASPH2BF8Z256rmkz |
| 41009 | { 6147, 9, 1, 0, 378, 0, 0, 2997, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ba60004019ULL }, // Inst #6147 = VCVTBIASPH2BF8Z256rmk |
| 41010 | { 6146, 8, 1, 0, 378, 0, 0, 3006, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x57ba60004019ULL }, // Inst #6146 = VCVTBIASPH2BF8Z256rmbkz |
| 41011 | { 6145, 9, 1, 0, 378, 0, 0, 2997, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53ba60004019ULL }, // Inst #6145 = VCVTBIASPH2BF8Z256rmbk |
| 41012 | { 6144, 7, 1, 0, 378, 0, 0, 2990, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51ba60004019ULL }, // Inst #6144 = VCVTBIASPH2BF8Z256rmb |
| 41013 | { 6143, 7, 1, 0, 378, 0, 0, 2990, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ba60004019ULL }, // Inst #6143 = VCVTBIASPH2BF8Z256rm |
| 41014 | { 6142, 4, 1, 0, 97, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6ba60004029ULL }, // Inst #6142 = VCVTBIASPH2BF8Z128rrkz |
| 41015 | { 6141, 5, 1, 0, 97, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2ba60004029ULL }, // Inst #6141 = VCVTBIASPH2BF8Z128rrk |
| 41016 | { 6140, 3, 1, 0, 97, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ba60004029ULL }, // Inst #6140 = VCVTBIASPH2BF8Z128rr |
| 41017 | { 6139, 8, 1, 0, 97, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ba60004019ULL }, // Inst #6139 = VCVTBIASPH2BF8Z128rmkz |
| 41018 | { 6138, 9, 1, 0, 97, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ba60004019ULL }, // Inst #6138 = VCVTBIASPH2BF8Z128rmk |
| 41019 | { 6137, 8, 1, 0, 97, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x56ba60004019ULL }, // Inst #6137 = VCVTBIASPH2BF8Z128rmbkz |
| 41020 | { 6136, 9, 1, 0, 97, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52ba60004019ULL }, // Inst #6136 = VCVTBIASPH2BF8Z128rmbk |
| 41021 | { 6135, 7, 1, 0, 97, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50ba60004019ULL }, // Inst #6135 = VCVTBIASPH2BF8Z128rmb |
| 41022 | { 6134, 7, 1, 0, 97, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ba60004019ULL }, // Inst #6134 = VCVTBIASPH2BF8Z128rm |
| 41023 | { 6133, 4, 1, 0, 380, 0, 0, 3058, X86ImpOpBase + 0, 0, 0xeeba60012029ULL }, // Inst #6133 = VCVTBIASPH2BF8SZrrkz |
| 41024 | { 6132, 5, 1, 0, 380, 0, 0, 3053, X86ImpOpBase + 0, 0, 0xeaba60012029ULL }, // Inst #6132 = VCVTBIASPH2BF8SZrrk |
| 41025 | { 6131, 3, 1, 0, 380, 0, 0, 3050, X86ImpOpBase + 0, 0, 0xe8ba60012029ULL }, // Inst #6131 = VCVTBIASPH2BF8SZrr |
| 41026 | { 6130, 8, 1, 0, 380, 0, 0, 3042, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeba60012019ULL }, // Inst #6130 = VCVTBIASPH2BF8SZrmkz |
| 41027 | { 6129, 9, 1, 0, 380, 0, 0, 3033, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaba60012019ULL }, // Inst #6129 = VCVTBIASPH2BF8SZrmk |
| 41028 | { 6128, 8, 1, 0, 380, 0, 0, 3042, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5eba60012019ULL }, // Inst #6128 = VCVTBIASPH2BF8SZrmbkz |
| 41029 | { 6127, 9, 1, 0, 380, 0, 0, 3033, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5aba60012019ULL }, // Inst #6127 = VCVTBIASPH2BF8SZrmbk |
| 41030 | { 6126, 7, 1, 0, 380, 0, 0, 3026, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58ba60012019ULL }, // Inst #6126 = VCVTBIASPH2BF8SZrmb |
| 41031 | { 6125, 7, 1, 0, 380, 0, 0, 3026, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ba60012019ULL }, // Inst #6125 = VCVTBIASPH2BF8SZrm |
| 41032 | { 6124, 4, 1, 0, 378, 0, 0, 3022, X86ImpOpBase + 0, 0, 0xc7ba60012029ULL }, // Inst #6124 = VCVTBIASPH2BF8SZ256rrkz |
| 41033 | { 6123, 5, 1, 0, 378, 0, 0, 3017, X86ImpOpBase + 0, 0, 0xc3ba60012029ULL }, // Inst #6123 = VCVTBIASPH2BF8SZ256rrk |
| 41034 | { 6122, 3, 1, 0, 378, 0, 0, 3014, X86ImpOpBase + 0, 0, 0xc1ba60012029ULL }, // Inst #6122 = VCVTBIASPH2BF8SZ256rr |
| 41035 | { 6121, 8, 1, 0, 378, 0, 0, 3006, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ba60012019ULL }, // Inst #6121 = VCVTBIASPH2BF8SZ256rmkz |
| 41036 | { 6120, 9, 1, 0, 378, 0, 0, 2997, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ba60012019ULL }, // Inst #6120 = VCVTBIASPH2BF8SZ256rmk |
| 41037 | { 6119, 8, 1, 0, 378, 0, 0, 3006, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x57ba60012019ULL }, // Inst #6119 = VCVTBIASPH2BF8SZ256rmbkz |
| 41038 | { 6118, 9, 1, 0, 378, 0, 0, 2997, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53ba60012019ULL }, // Inst #6118 = VCVTBIASPH2BF8SZ256rmbk |
| 41039 | { 6117, 7, 1, 0, 378, 0, 0, 2990, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51ba60012019ULL }, // Inst #6117 = VCVTBIASPH2BF8SZ256rmb |
| 41040 | { 6116, 7, 1, 0, 378, 0, 0, 2990, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ba60012019ULL }, // Inst #6116 = VCVTBIASPH2BF8SZ256rm |
| 41041 | { 6115, 4, 1, 0, 97, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6ba60012029ULL }, // Inst #6115 = VCVTBIASPH2BF8SZ128rrkz |
| 41042 | { 6114, 5, 1, 0, 97, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2ba60012029ULL }, // Inst #6114 = VCVTBIASPH2BF8SZ128rrk |
| 41043 | { 6113, 3, 1, 0, 97, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ba60012029ULL }, // Inst #6113 = VCVTBIASPH2BF8SZ128rr |
| 41044 | { 6112, 8, 1, 0, 97, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ba60012019ULL }, // Inst #6112 = VCVTBIASPH2BF8SZ128rmkz |
| 41045 | { 6111, 9, 1, 0, 97, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ba60012019ULL }, // Inst #6111 = VCVTBIASPH2BF8SZ128rmk |
| 41046 | { 6110, 8, 1, 0, 97, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x56ba60012019ULL }, // Inst #6110 = VCVTBIASPH2BF8SZ128rmbkz |
| 41047 | { 6109, 9, 1, 0, 97, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52ba60012019ULL }, // Inst #6109 = VCVTBIASPH2BF8SZ128rmbk |
| 41048 | { 6108, 7, 1, 0, 97, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50ba60012019ULL }, // Inst #6108 = VCVTBIASPH2BF8SZ128rmb |
| 41049 | { 6107, 7, 1, 0, 97, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ba60012019ULL }, // Inst #6107 = VCVTBIASPH2BF8SZ128rm |
| 41050 | { 6106, 3, 1, 0, 384, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee35f8053829ULL }, // Inst #6106 = VCVTBF162IUBSZrrkz |
| 41051 | { 6105, 4, 1, 0, 384, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea35f8053829ULL }, // Inst #6105 = VCVTBF162IUBSZrrk |
| 41052 | { 6104, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe835f8053829ULL }, // Inst #6104 = VCVTBF162IUBSZrr |
| 41053 | { 6103, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee35f8053819ULL }, // Inst #6103 = VCVTBF162IUBSZrmkz |
| 41054 | { 6102, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea35f8053819ULL }, // Inst #6102 = VCVTBF162IUBSZrmk |
| 41055 | { 6101, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e35f8053819ULL }, // Inst #6101 = VCVTBF162IUBSZrmbkz |
| 41056 | { 6100, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a35f8053819ULL }, // Inst #6100 = VCVTBF162IUBSZrmbk |
| 41057 | { 6099, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5835f8053819ULL }, // Inst #6099 = VCVTBF162IUBSZrmb |
| 41058 | { 6098, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe835f8053819ULL }, // Inst #6098 = VCVTBF162IUBSZrm |
| 41059 | { 6097, 3, 1, 0, 382, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc735f8053829ULL }, // Inst #6097 = VCVTBF162IUBSZ256rrkz |
| 41060 | { 6096, 4, 1, 0, 382, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc335f8053829ULL }, // Inst #6096 = VCVTBF162IUBSZ256rrk |
| 41061 | { 6095, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc135f8053829ULL }, // Inst #6095 = VCVTBF162IUBSZ256rr |
| 41062 | { 6094, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc735f8053819ULL }, // Inst #6094 = VCVTBF162IUBSZ256rmkz |
| 41063 | { 6093, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc335f8053819ULL }, // Inst #6093 = VCVTBF162IUBSZ256rmk |
| 41064 | { 6092, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5735f8053819ULL }, // Inst #6092 = VCVTBF162IUBSZ256rmbkz |
| 41065 | { 6091, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5335f8053819ULL }, // Inst #6091 = VCVTBF162IUBSZ256rmbk |
| 41066 | { 6090, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5135f8053819ULL }, // Inst #6090 = VCVTBF162IUBSZ256rmb |
| 41067 | { 6089, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc135f8053819ULL }, // Inst #6089 = VCVTBF162IUBSZ256rm |
| 41068 | { 6088, 3, 1, 0, 149, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa635f8053829ULL }, // Inst #6088 = VCVTBF162IUBSZ128rrkz |
| 41069 | { 6087, 4, 1, 0, 149, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa235f8053829ULL }, // Inst #6087 = VCVTBF162IUBSZ128rrk |
| 41070 | { 6086, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa035f8053829ULL }, // Inst #6086 = VCVTBF162IUBSZ128rr |
| 41071 | { 6085, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa635f8053819ULL }, // Inst #6085 = VCVTBF162IUBSZ128rmkz |
| 41072 | { 6084, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa235f8053819ULL }, // Inst #6084 = VCVTBF162IUBSZ128rmk |
| 41073 | { 6083, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5635f8053819ULL }, // Inst #6083 = VCVTBF162IUBSZ128rmbkz |
| 41074 | { 6082, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5235f8053819ULL }, // Inst #6082 = VCVTBF162IUBSZ128rmbk |
| 41075 | { 6081, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5035f8053819ULL }, // Inst #6081 = VCVTBF162IUBSZ128rmb |
| 41076 | { 6080, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa035f8053819ULL }, // Inst #6080 = VCVTBF162IUBSZ128rm |
| 41077 | { 6079, 3, 1, 0, 384, 0, 0, 2987, X86ImpOpBase + 0, 0, 0xee34f8053829ULL }, // Inst #6079 = VCVTBF162IBSZrrkz |
| 41078 | { 6078, 4, 1, 0, 384, 0, 0, 2983, X86ImpOpBase + 0, 0, 0xea34f8053829ULL }, // Inst #6078 = VCVTBF162IBSZrrk |
| 41079 | { 6077, 2, 1, 0, 384, 0, 0, 2802, X86ImpOpBase + 0, 0, 0xe834f8053829ULL }, // Inst #6077 = VCVTBF162IBSZrr |
| 41080 | { 6076, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee34f8053819ULL }, // Inst #6076 = VCVTBF162IBSZrmkz |
| 41081 | { 6075, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea34f8053819ULL }, // Inst #6075 = VCVTBF162IBSZrmk |
| 41082 | { 6074, 7, 1, 0, 383, 0, 0, 2976, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e34f8053819ULL }, // Inst #6074 = VCVTBF162IBSZrmbkz |
| 41083 | { 6073, 8, 1, 0, 383, 0, 0, 2968, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a34f8053819ULL }, // Inst #6073 = VCVTBF162IBSZrmbk |
| 41084 | { 6072, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5834f8053819ULL }, // Inst #6072 = VCVTBF162IBSZrmb |
| 41085 | { 6071, 6, 1, 0, 383, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe834f8053819ULL }, // Inst #6071 = VCVTBF162IBSZrm |
| 41086 | { 6070, 3, 1, 0, 382, 0, 0, 2965, X86ImpOpBase + 0, 0, 0xc734f8053829ULL }, // Inst #6070 = VCVTBF162IBSZ256rrkz |
| 41087 | { 6069, 4, 1, 0, 382, 0, 0, 2961, X86ImpOpBase + 0, 0, 0xc334f8053829ULL }, // Inst #6069 = VCVTBF162IBSZ256rrk |
| 41088 | { 6068, 2, 1, 0, 382, 0, 0, 2780, X86ImpOpBase + 0, 0, 0xc134f8053829ULL }, // Inst #6068 = VCVTBF162IBSZ256rr |
| 41089 | { 6067, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc734f8053819ULL }, // Inst #6067 = VCVTBF162IBSZ256rmkz |
| 41090 | { 6066, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc334f8053819ULL }, // Inst #6066 = VCVTBF162IBSZ256rmk |
| 41091 | { 6065, 7, 1, 0, 381, 0, 0, 2954, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5734f8053819ULL }, // Inst #6065 = VCVTBF162IBSZ256rmbkz |
| 41092 | { 6064, 8, 1, 0, 381, 0, 0, 2946, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5334f8053819ULL }, // Inst #6064 = VCVTBF162IBSZ256rmbk |
| 41093 | { 6063, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5134f8053819ULL }, // Inst #6063 = VCVTBF162IBSZ256rmb |
| 41094 | { 6062, 6, 1, 0, 381, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc134f8053819ULL }, // Inst #6062 = VCVTBF162IBSZ256rm |
| 41095 | { 6061, 3, 1, 0, 149, 0, 0, 2943, X86ImpOpBase + 0, 0, 0xa634f8053829ULL }, // Inst #6061 = VCVTBF162IBSZ128rrkz |
| 41096 | { 6060, 4, 1, 0, 149, 0, 0, 2939, X86ImpOpBase + 0, 0, 0xa234f8053829ULL }, // Inst #6060 = VCVTBF162IBSZ128rrk |
| 41097 | { 6059, 2, 1, 0, 149, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa034f8053829ULL }, // Inst #6059 = VCVTBF162IBSZ128rr |
| 41098 | { 6058, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa634f8053819ULL }, // Inst #6058 = VCVTBF162IBSZ128rmkz |
| 41099 | { 6057, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa234f8053819ULL }, // Inst #6057 = VCVTBF162IBSZ128rmk |
| 41100 | { 6056, 7, 1, 0, 148, 0, 0, 2932, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5634f8053819ULL }, // Inst #6056 = VCVTBF162IBSZ128rmbkz |
| 41101 | { 6055, 8, 1, 0, 148, 0, 0, 2924, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5234f8053819ULL }, // Inst #6055 = VCVTBF162IBSZ128rmbk |
| 41102 | { 6054, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5034f8053819ULL }, // Inst #6054 = VCVTBF162IBSZ128rmb |
| 41103 | { 6053, 6, 1, 0, 148, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa034f8053819ULL }, // Inst #6053 = VCVTBF162IBSZ128rm |
| 41104 | { 6052, 4, 1, 0, 380, 1, 0, 1759, X86ImpOpBase + 78, 0, 0xeeb3f8004829ULL }, // Inst #6052 = VCVT2PS2PHXZrrkz |
| 41105 | { 6051, 5, 1, 0, 380, 1, 0, 1754, X86ImpOpBase + 78, 0, 0xeab3f8004829ULL }, // Inst #6051 = VCVT2PS2PHXZrrk |
| 41106 | { 6050, 5, 1, 0, 380, 1, 0, 1882, X86ImpOpBase + 78, 0, 0x17eb3e0004829ULL }, // Inst #6050 = VCVT2PS2PHXZrrbkz |
| 41107 | { 6049, 6, 1, 0, 380, 1, 0, 1876, X86ImpOpBase + 78, 0, 0x17ab3e0004829ULL }, // Inst #6049 = VCVT2PS2PHXZrrbk |
| 41108 | { 6048, 4, 1, 0, 380, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x178b3e0004829ULL }, // Inst #6048 = VCVT2PS2PHXZrrb |
| 41109 | { 6047, 3, 1, 0, 380, 1, 0, 1751, X86ImpOpBase + 78, 0, 0xe8b3f8004829ULL }, // Inst #6047 = VCVT2PS2PHXZrr |
| 41110 | { 6046, 8, 1, 0, 379, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeeb3f8004819ULL }, // Inst #6046 = VCVT2PS2PHXZrmkz |
| 41111 | { 6045, 9, 1, 0, 379, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xeab3f8004819ULL }, // Inst #6045 = VCVT2PS2PHXZrmk |
| 41112 | { 6044, 8, 1, 0, 379, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7eb3f8004819ULL }, // Inst #6044 = VCVT2PS2PHXZrmbkz |
| 41113 | { 6043, 9, 1, 0, 379, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x7ab3f8004819ULL }, // Inst #6043 = VCVT2PS2PHXZrmbk |
| 41114 | { 6042, 7, 1, 0, 379, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0x78b3f8004819ULL }, // Inst #6042 = VCVT2PS2PHXZrmb |
| 41115 | { 6041, 7, 1, 0, 379, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad), 0xe8b3f8004819ULL }, // Inst #6041 = VCVT2PS2PHXZrm |
| 41116 | { 6040, 4, 1, 0, 378, 0, 0, 1723, X86ImpOpBase + 0, 0, 0xc7b3f8004829ULL }, // Inst #6040 = VCVT2PS2PHXZ256rrkz |
| 41117 | { 6039, 5, 1, 0, 378, 0, 0, 1718, X86ImpOpBase + 0, 0, 0xc3b3f8004829ULL }, // Inst #6039 = VCVT2PS2PHXZ256rrk |
| 41118 | { 6038, 3, 1, 0, 378, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b3f8004829ULL }, // Inst #6038 = VCVT2PS2PHXZ256rr |
| 41119 | { 6037, 8, 1, 0, 377, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b3f8004819ULL }, // Inst #6037 = VCVT2PS2PHXZ256rmkz |
| 41120 | { 6036, 9, 1, 0, 377, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b3f8004819ULL }, // Inst #6036 = VCVT2PS2PHXZ256rmk |
| 41121 | { 6035, 8, 1, 0, 377, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b3f8004819ULL }, // Inst #6035 = VCVT2PS2PHXZ256rmbkz |
| 41122 | { 6034, 9, 1, 0, 377, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b3f8004819ULL }, // Inst #6034 = VCVT2PS2PHXZ256rmbk |
| 41123 | { 6033, 7, 1, 0, 377, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b3f8004819ULL }, // Inst #6033 = VCVT2PS2PHXZ256rmb |
| 41124 | { 6032, 7, 1, 0, 377, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b3f8004819ULL }, // Inst #6032 = VCVT2PS2PHXZ256rm |
| 41125 | { 6031, 4, 1, 0, 97, 0, 0, 1687, X86ImpOpBase + 0, 0, 0xa6b3f8004829ULL }, // Inst #6031 = VCVT2PS2PHXZ128rrkz |
| 41126 | { 6030, 5, 1, 0, 97, 0, 0, 1682, X86ImpOpBase + 0, 0, 0xa2b3f8004829ULL }, // Inst #6030 = VCVT2PS2PHXZ128rrk |
| 41127 | { 6029, 3, 1, 0, 97, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b3f8004829ULL }, // Inst #6029 = VCVT2PS2PHXZ128rr |
| 41128 | { 6028, 8, 1, 0, 376, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b3f8004819ULL }, // Inst #6028 = VCVT2PS2PHXZ128rmkz |
| 41129 | { 6027, 9, 1, 0, 376, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b3f8004819ULL }, // Inst #6027 = VCVT2PS2PHXZ128rmk |
| 41130 | { 6026, 8, 1, 0, 376, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b3f8004819ULL }, // Inst #6026 = VCVT2PS2PHXZ128rmbkz |
| 41131 | { 6025, 9, 1, 0, 376, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b3f8004819ULL }, // Inst #6025 = VCVT2PS2PHXZ128rmbk |
| 41132 | { 6024, 7, 1, 0, 376, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b3f8004819ULL }, // Inst #6024 = VCVT2PS2PHXZ128rmb |
| 41133 | { 6023, 7, 1, 0, 376, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b3f8004819ULL }, // Inst #6023 = VCVT2PS2PHXZ128rm |
| 41134 | { 6022, 4, 1, 0, 380, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xee8c78013829ULL }, // Inst #6022 = VCVT2PH2HF8Zrrkz |
| 41135 | { 6021, 5, 1, 0, 380, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xea8c78013829ULL }, // Inst #6021 = VCVT2PH2HF8Zrrk |
| 41136 | { 6020, 3, 1, 0, 380, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88c78013829ULL }, // Inst #6020 = VCVT2PH2HF8Zrr |
| 41137 | { 6019, 8, 1, 0, 379, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8c78013819ULL }, // Inst #6019 = VCVT2PH2HF8Zrmkz |
| 41138 | { 6018, 9, 1, 0, 379, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8c78013819ULL }, // Inst #6018 = VCVT2PH2HF8Zrmk |
| 41139 | { 6017, 8, 1, 0, 379, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e8c78013819ULL }, // Inst #6017 = VCVT2PH2HF8Zrmbkz |
| 41140 | { 6016, 9, 1, 0, 379, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a8c78013819ULL }, // Inst #6016 = VCVT2PH2HF8Zrmbk |
| 41141 | { 6015, 7, 1, 0, 379, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x588c78013819ULL }, // Inst #6015 = VCVT2PH2HF8Zrmb |
| 41142 | { 6014, 7, 1, 0, 379, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88c78013819ULL }, // Inst #6014 = VCVT2PH2HF8Zrm |
| 41143 | { 6013, 4, 1, 0, 378, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc78c78013829ULL }, // Inst #6013 = VCVT2PH2HF8Z256rrkz |
| 41144 | { 6012, 5, 1, 0, 378, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc38c78013829ULL }, // Inst #6012 = VCVT2PH2HF8Z256rrk |
| 41145 | { 6011, 3, 1, 0, 378, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18c78013829ULL }, // Inst #6011 = VCVT2PH2HF8Z256rr |
| 41146 | { 6010, 8, 1, 0, 377, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78c78013819ULL }, // Inst #6010 = VCVT2PH2HF8Z256rmkz |
| 41147 | { 6009, 9, 1, 0, 377, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38c78013819ULL }, // Inst #6009 = VCVT2PH2HF8Z256rmk |
| 41148 | { 6008, 8, 1, 0, 377, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x578c78013819ULL }, // Inst #6008 = VCVT2PH2HF8Z256rmbkz |
| 41149 | { 6007, 9, 1, 0, 377, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x538c78013819ULL }, // Inst #6007 = VCVT2PH2HF8Z256rmbk |
| 41150 | { 6006, 7, 1, 0, 377, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x518c78013819ULL }, // Inst #6006 = VCVT2PH2HF8Z256rmb |
| 41151 | { 6005, 7, 1, 0, 377, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18c78013819ULL }, // Inst #6005 = VCVT2PH2HF8Z256rm |
| 41152 | { 6004, 4, 1, 0, 97, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa68c78013829ULL }, // Inst #6004 = VCVT2PH2HF8Z128rrkz |
| 41153 | { 6003, 5, 1, 0, 97, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa28c78013829ULL }, // Inst #6003 = VCVT2PH2HF8Z128rrk |
| 41154 | { 6002, 3, 1, 0, 97, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08c78013829ULL }, // Inst #6002 = VCVT2PH2HF8Z128rr |
| 41155 | { 6001, 8, 1, 0, 376, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68c78013819ULL }, // Inst #6001 = VCVT2PH2HF8Z128rmkz |
| 41156 | { 6000, 9, 1, 0, 376, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28c78013819ULL }, // Inst #6000 = VCVT2PH2HF8Z128rmk |
| 41157 | { 5999, 8, 1, 0, 376, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x568c78013819ULL }, // Inst #5999 = VCVT2PH2HF8Z128rmbkz |
| 41158 | { 5998, 9, 1, 0, 376, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x528c78013819ULL }, // Inst #5998 = VCVT2PH2HF8Z128rmbk |
| 41159 | { 5997, 7, 1, 0, 376, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x508c78013819ULL }, // Inst #5997 = VCVT2PH2HF8Z128rmb |
| 41160 | { 5996, 7, 1, 0, 376, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08c78013819ULL }, // Inst #5996 = VCVT2PH2HF8Z128rm |
| 41161 | { 5995, 4, 1, 0, 380, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xee8df8013829ULL }, // Inst #5995 = VCVT2PH2HF8SZrrkz |
| 41162 | { 5994, 5, 1, 0, 380, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xea8df8013829ULL }, // Inst #5994 = VCVT2PH2HF8SZrrk |
| 41163 | { 5993, 3, 1, 0, 380, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe88df8013829ULL }, // Inst #5993 = VCVT2PH2HF8SZrr |
| 41164 | { 5992, 8, 1, 0, 379, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee8df8013819ULL }, // Inst #5992 = VCVT2PH2HF8SZrmkz |
| 41165 | { 5991, 9, 1, 0, 379, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea8df8013819ULL }, // Inst #5991 = VCVT2PH2HF8SZrmk |
| 41166 | { 5990, 8, 1, 0, 379, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e8df8013819ULL }, // Inst #5990 = VCVT2PH2HF8SZrmbkz |
| 41167 | { 5989, 9, 1, 0, 379, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a8df8013819ULL }, // Inst #5989 = VCVT2PH2HF8SZrmbk |
| 41168 | { 5988, 7, 1, 0, 379, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x588df8013819ULL }, // Inst #5988 = VCVT2PH2HF8SZrmb |
| 41169 | { 5987, 7, 1, 0, 379, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe88df8013819ULL }, // Inst #5987 = VCVT2PH2HF8SZrm |
| 41170 | { 5986, 4, 1, 0, 378, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc78df8013829ULL }, // Inst #5986 = VCVT2PH2HF8SZ256rrkz |
| 41171 | { 5985, 5, 1, 0, 378, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc38df8013829ULL }, // Inst #5985 = VCVT2PH2HF8SZ256rrk |
| 41172 | { 5984, 3, 1, 0, 378, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc18df8013829ULL }, // Inst #5984 = VCVT2PH2HF8SZ256rr |
| 41173 | { 5983, 8, 1, 0, 377, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc78df8013819ULL }, // Inst #5983 = VCVT2PH2HF8SZ256rmkz |
| 41174 | { 5982, 9, 1, 0, 377, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc38df8013819ULL }, // Inst #5982 = VCVT2PH2HF8SZ256rmk |
| 41175 | { 5981, 8, 1, 0, 377, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x578df8013819ULL }, // Inst #5981 = VCVT2PH2HF8SZ256rmbkz |
| 41176 | { 5980, 9, 1, 0, 377, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x538df8013819ULL }, // Inst #5980 = VCVT2PH2HF8SZ256rmbk |
| 41177 | { 5979, 7, 1, 0, 377, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x518df8013819ULL }, // Inst #5979 = VCVT2PH2HF8SZ256rmb |
| 41178 | { 5978, 7, 1, 0, 377, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc18df8013819ULL }, // Inst #5978 = VCVT2PH2HF8SZ256rm |
| 41179 | { 5977, 4, 1, 0, 97, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa68df8013829ULL }, // Inst #5977 = VCVT2PH2HF8SZ128rrkz |
| 41180 | { 5976, 5, 1, 0, 97, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa28df8013829ULL }, // Inst #5976 = VCVT2PH2HF8SZ128rrk |
| 41181 | { 5975, 3, 1, 0, 97, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa08df8013829ULL }, // Inst #5975 = VCVT2PH2HF8SZ128rr |
| 41182 | { 5974, 8, 1, 0, 376, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa68df8013819ULL }, // Inst #5974 = VCVT2PH2HF8SZ128rmkz |
| 41183 | { 5973, 9, 1, 0, 376, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa28df8013819ULL }, // Inst #5973 = VCVT2PH2HF8SZ128rmk |
| 41184 | { 5972, 8, 1, 0, 376, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x568df8013819ULL }, // Inst #5972 = VCVT2PH2HF8SZ128rmbkz |
| 41185 | { 5971, 9, 1, 0, 376, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x528df8013819ULL }, // Inst #5971 = VCVT2PH2HF8SZ128rmbk |
| 41186 | { 5970, 7, 1, 0, 376, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x508df8013819ULL }, // Inst #5970 = VCVT2PH2HF8SZ128rmb |
| 41187 | { 5969, 7, 1, 0, 376, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08df8013819ULL }, // Inst #5969 = VCVT2PH2HF8SZ128rm |
| 41188 | { 5968, 4, 1, 0, 380, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeeba78005829ULL }, // Inst #5968 = VCVT2PH2BF8Zrrkz |
| 41189 | { 5967, 5, 1, 0, 380, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeaba78005829ULL }, // Inst #5967 = VCVT2PH2BF8Zrrk |
| 41190 | { 5966, 3, 1, 0, 380, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8ba78005829ULL }, // Inst #5966 = VCVT2PH2BF8Zrr |
| 41191 | { 5965, 8, 1, 0, 379, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeba78005819ULL }, // Inst #5965 = VCVT2PH2BF8Zrmkz |
| 41192 | { 5964, 9, 1, 0, 379, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaba78005819ULL }, // Inst #5964 = VCVT2PH2BF8Zrmk |
| 41193 | { 5963, 8, 1, 0, 379, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5eba78005819ULL }, // Inst #5963 = VCVT2PH2BF8Zrmbkz |
| 41194 | { 5962, 9, 1, 0, 379, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5aba78005819ULL }, // Inst #5962 = VCVT2PH2BF8Zrmbk |
| 41195 | { 5961, 7, 1, 0, 379, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58ba78005819ULL }, // Inst #5961 = VCVT2PH2BF8Zrmb |
| 41196 | { 5960, 7, 1, 0, 379, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ba78005819ULL }, // Inst #5960 = VCVT2PH2BF8Zrm |
| 41197 | { 5959, 4, 1, 0, 378, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7ba78005829ULL }, // Inst #5959 = VCVT2PH2BF8Z256rrkz |
| 41198 | { 5958, 5, 1, 0, 378, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3ba78005829ULL }, // Inst #5958 = VCVT2PH2BF8Z256rrk |
| 41199 | { 5957, 3, 1, 0, 378, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1ba78005829ULL }, // Inst #5957 = VCVT2PH2BF8Z256rr |
| 41200 | { 5956, 8, 1, 0, 377, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ba78005819ULL }, // Inst #5956 = VCVT2PH2BF8Z256rmkz |
| 41201 | { 5955, 9, 1, 0, 377, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ba78005819ULL }, // Inst #5955 = VCVT2PH2BF8Z256rmk |
| 41202 | { 5954, 8, 1, 0, 377, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x57ba78005819ULL }, // Inst #5954 = VCVT2PH2BF8Z256rmbkz |
| 41203 | { 5953, 9, 1, 0, 377, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53ba78005819ULL }, // Inst #5953 = VCVT2PH2BF8Z256rmbk |
| 41204 | { 5952, 7, 1, 0, 377, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51ba78005819ULL }, // Inst #5952 = VCVT2PH2BF8Z256rmb |
| 41205 | { 5951, 7, 1, 0, 377, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ba78005819ULL }, // Inst #5951 = VCVT2PH2BF8Z256rm |
| 41206 | { 5950, 4, 1, 0, 97, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6ba78005829ULL }, // Inst #5950 = VCVT2PH2BF8Z128rrkz |
| 41207 | { 5949, 5, 1, 0, 97, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2ba78005829ULL }, // Inst #5949 = VCVT2PH2BF8Z128rrk |
| 41208 | { 5948, 3, 1, 0, 97, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ba78005829ULL }, // Inst #5948 = VCVT2PH2BF8Z128rr |
| 41209 | { 5947, 8, 1, 0, 376, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ba78005819ULL }, // Inst #5947 = VCVT2PH2BF8Z128rmkz |
| 41210 | { 5946, 9, 1, 0, 376, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ba78005819ULL }, // Inst #5946 = VCVT2PH2BF8Z128rmk |
| 41211 | { 5945, 8, 1, 0, 376, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x56ba78005819ULL }, // Inst #5945 = VCVT2PH2BF8Z128rmbkz |
| 41212 | { 5944, 9, 1, 0, 376, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52ba78005819ULL }, // Inst #5944 = VCVT2PH2BF8Z128rmbk |
| 41213 | { 5943, 7, 1, 0, 376, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50ba78005819ULL }, // Inst #5943 = VCVT2PH2BF8Z128rmb |
| 41214 | { 5942, 7, 1, 0, 376, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ba78005819ULL }, // Inst #5942 = VCVT2PH2BF8Z128rm |
| 41215 | { 5941, 4, 1, 0, 380, 0, 0, 2920, X86ImpOpBase + 0, 0, 0xeeba78013829ULL }, // Inst #5941 = VCVT2PH2BF8SZrrkz |
| 41216 | { 5940, 5, 1, 0, 380, 0, 0, 2915, X86ImpOpBase + 0, 0, 0xeaba78013829ULL }, // Inst #5940 = VCVT2PH2BF8SZrrk |
| 41217 | { 5939, 3, 1, 0, 380, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8ba78013829ULL }, // Inst #5939 = VCVT2PH2BF8SZrr |
| 41218 | { 5938, 8, 1, 0, 379, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeba78013819ULL }, // Inst #5938 = VCVT2PH2BF8SZrmkz |
| 41219 | { 5937, 9, 1, 0, 379, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaba78013819ULL }, // Inst #5937 = VCVT2PH2BF8SZrmk |
| 41220 | { 5936, 8, 1, 0, 379, 0, 0, 2907, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5eba78013819ULL }, // Inst #5936 = VCVT2PH2BF8SZrmbkz |
| 41221 | { 5935, 9, 1, 0, 379, 0, 0, 2898, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5aba78013819ULL }, // Inst #5935 = VCVT2PH2BF8SZrmbk |
| 41222 | { 5934, 7, 1, 0, 379, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58ba78013819ULL }, // Inst #5934 = VCVT2PH2BF8SZrmb |
| 41223 | { 5933, 7, 1, 0, 379, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ba78013819ULL }, // Inst #5933 = VCVT2PH2BF8SZrm |
| 41224 | { 5932, 4, 1, 0, 378, 0, 0, 2894, X86ImpOpBase + 0, 0, 0xc7ba78013829ULL }, // Inst #5932 = VCVT2PH2BF8SZ256rrkz |
| 41225 | { 5931, 5, 1, 0, 378, 0, 0, 2889, X86ImpOpBase + 0, 0, 0xc3ba78013829ULL }, // Inst #5931 = VCVT2PH2BF8SZ256rrk |
| 41226 | { 5930, 3, 1, 0, 378, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1ba78013829ULL }, // Inst #5930 = VCVT2PH2BF8SZ256rr |
| 41227 | { 5929, 8, 1, 0, 377, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ba78013819ULL }, // Inst #5929 = VCVT2PH2BF8SZ256rmkz |
| 41228 | { 5928, 9, 1, 0, 377, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ba78013819ULL }, // Inst #5928 = VCVT2PH2BF8SZ256rmk |
| 41229 | { 5927, 8, 1, 0, 377, 0, 0, 2881, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x57ba78013819ULL }, // Inst #5927 = VCVT2PH2BF8SZ256rmbkz |
| 41230 | { 5926, 9, 1, 0, 377, 0, 0, 2872, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53ba78013819ULL }, // Inst #5926 = VCVT2PH2BF8SZ256rmbk |
| 41231 | { 5925, 7, 1, 0, 377, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51ba78013819ULL }, // Inst #5925 = VCVT2PH2BF8SZ256rmb |
| 41232 | { 5924, 7, 1, 0, 377, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ba78013819ULL }, // Inst #5924 = VCVT2PH2BF8SZ256rm |
| 41233 | { 5923, 4, 1, 0, 97, 0, 0, 2868, X86ImpOpBase + 0, 0, 0xa6ba78013829ULL }, // Inst #5923 = VCVT2PH2BF8SZ128rrkz |
| 41234 | { 5922, 5, 1, 0, 97, 0, 0, 2863, X86ImpOpBase + 0, 0, 0xa2ba78013829ULL }, // Inst #5922 = VCVT2PH2BF8SZ128rrk |
| 41235 | { 5921, 3, 1, 0, 97, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ba78013829ULL }, // Inst #5921 = VCVT2PH2BF8SZ128rr |
| 41236 | { 5920, 8, 1, 0, 376, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ba78013819ULL }, // Inst #5920 = VCVT2PH2BF8SZ128rmkz |
| 41237 | { 5919, 9, 1, 0, 376, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ba78013819ULL }, // Inst #5919 = VCVT2PH2BF8SZ128rmk |
| 41238 | { 5918, 8, 1, 0, 376, 0, 0, 2855, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x56ba78013819ULL }, // Inst #5918 = VCVT2PH2BF8SZ128rmbkz |
| 41239 | { 5917, 9, 1, 0, 376, 0, 0, 2846, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52ba78013819ULL }, // Inst #5917 = VCVT2PH2BF8SZ128rmbk |
| 41240 | { 5916, 7, 1, 0, 376, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50ba78013819ULL }, // Inst #5916 = VCVT2PH2BF8SZ128rmb |
| 41241 | { 5915, 7, 1, 0, 376, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ba78013819ULL }, // Inst #5915 = VCVT2PH2BF8SZ128rm |
| 41242 | { 5914, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x7017e8003029ULL }, // Inst #5914 = VCOMXSSZrrb_Int |
| 41243 | { 5913, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x6017e8003029ULL }, // Inst #5913 = VCOMXSSZrr_Int |
| 41244 | { 5912, 6, 0, 0, 86, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6017e8003019ULL }, // Inst #5912 = VCOMXSSZrm_Int |
| 41245 | { 5911, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x5017e8013029ULL }, // Inst #5911 = VCOMXSHZrrb_Int |
| 41246 | { 5910, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x4017e8013029ULL }, // Inst #5910 = VCOMXSHZrr_Int |
| 41247 | { 5909, 6, 0, 0, 86, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4017e8013019ULL }, // Inst #5909 = VCOMXSHZrm_Int |
| 41248 | { 5908, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x9017f0023829ULL }, // Inst #5908 = VCOMXSDZrrb_Int |
| 41249 | { 5907, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x8017f0023829ULL }, // Inst #5907 = VCOMXSDZrr_Int |
| 41250 | { 5906, 6, 0, 0, 86, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8017f0023819ULL }, // Inst #5906 = VCOMXSDZrm_Int |
| 41251 | { 5905, 3, 1, 0, 1284, 0, 0, 2843, X86ImpOpBase + 0, 0, 0xee4578004828ULL }, // Inst #5905 = VCOMPRESSPSZrrkz |
| 41252 | { 5904, 4, 1, 0, 1284, 0, 0, 2839, X86ImpOpBase + 0, 0, 0xea4578004828ULL }, // Inst #5904 = VCOMPRESSPSZrrk |
| 41253 | { 5903, 2, 1, 0, 1978, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe84578004828ULL }, // Inst #5903 = VCOMPRESSPSZrr |
| 41254 | { 5902, 7, 0, 0, 1312, 0, 0, 2832, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6a4578004818ULL }, // Inst #5902 = VCOMPRESSPSZmrk |
| 41255 | { 5901, 6, 0, 0, 1973, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x684578004818ULL }, // Inst #5901 = VCOMPRESSPSZmr |
| 41256 | { 5900, 3, 1, 0, 1283, 0, 0, 2829, X86ImpOpBase + 0, 0, 0xc74578004828ULL }, // Inst #5900 = VCOMPRESSPSZ256rrkz |
| 41257 | { 5899, 4, 1, 0, 1283, 0, 0, 2825, X86ImpOpBase + 0, 0, 0xc34578004828ULL }, // Inst #5899 = VCOMPRESSPSZ256rrk |
| 41258 | { 5898, 2, 1, 0, 1977, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc14578004828ULL }, // Inst #5898 = VCOMPRESSPSZ256rr |
| 41259 | { 5897, 7, 0, 0, 1312, 0, 0, 2818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x634578004818ULL }, // Inst #5897 = VCOMPRESSPSZ256mrk |
| 41260 | { 5896, 6, 0, 0, 1973, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x614578004818ULL }, // Inst #5896 = VCOMPRESSPSZ256mr |
| 41261 | { 5895, 3, 1, 0, 1282, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa64578004828ULL }, // Inst #5895 = VCOMPRESSPSZ128rrkz |
| 41262 | { 5894, 4, 1, 0, 1282, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa24578004828ULL }, // Inst #5894 = VCOMPRESSPSZ128rrk |
| 41263 | { 5893, 2, 1, 0, 1976, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa04578004828ULL }, // Inst #5893 = VCOMPRESSPSZ128rr |
| 41264 | { 5892, 7, 0, 0, 1312, 0, 0, 2811, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x624578004818ULL }, // Inst #5892 = VCOMPRESSPSZ128mrk |
| 41265 | { 5891, 6, 0, 0, 1973, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x604578004818ULL }, // Inst #5891 = VCOMPRESSPSZ128mr |
| 41266 | { 5890, 3, 1, 0, 1284, 0, 0, 2808, X86ImpOpBase + 0, 0, 0xee4578024828ULL }, // Inst #5890 = VCOMPRESSPDZrrkz |
| 41267 | { 5889, 4, 1, 0, 1284, 0, 0, 2804, X86ImpOpBase + 0, 0, 0xea4578024828ULL }, // Inst #5889 = VCOMPRESSPDZrrk |
| 41268 | { 5888, 2, 1, 0, 1978, 0, 0, 2802, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe84578024828ULL }, // Inst #5888 = VCOMPRESSPDZrr |
| 41269 | { 5887, 7, 0, 0, 1312, 0, 0, 2795, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8a4578024818ULL }, // Inst #5887 = VCOMPRESSPDZmrk |
| 41270 | { 5886, 6, 0, 0, 1973, 0, 0, 2789, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x884578024818ULL }, // Inst #5886 = VCOMPRESSPDZmr |
| 41271 | { 5885, 3, 1, 0, 1283, 0, 0, 2786, X86ImpOpBase + 0, 0, 0xc74578024828ULL }, // Inst #5885 = VCOMPRESSPDZ256rrkz |
| 41272 | { 5884, 4, 1, 0, 1283, 0, 0, 2782, X86ImpOpBase + 0, 0, 0xc34578024828ULL }, // Inst #5884 = VCOMPRESSPDZ256rrk |
| 41273 | { 5883, 2, 1, 0, 1977, 0, 0, 2780, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc14578024828ULL }, // Inst #5883 = VCOMPRESSPDZ256rr |
| 41274 | { 5882, 7, 0, 0, 1312, 0, 0, 2773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x834578024818ULL }, // Inst #5882 = VCOMPRESSPDZ256mrk |
| 41275 | { 5881, 6, 0, 0, 1973, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x814578024818ULL }, // Inst #5881 = VCOMPRESSPDZ256mr |
| 41276 | { 5880, 3, 1, 0, 1282, 0, 0, 2770, X86ImpOpBase + 0, 0, 0xa64578024828ULL }, // Inst #5880 = VCOMPRESSPDZ128rrkz |
| 41277 | { 5879, 4, 1, 0, 1282, 0, 0, 2766, X86ImpOpBase + 0, 0, 0xa24578024828ULL }, // Inst #5879 = VCOMPRESSPDZ128rrk |
| 41278 | { 5878, 2, 1, 0, 1976, 0, 0, 2398, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa04578024828ULL }, // Inst #5878 = VCOMPRESSPDZ128rr |
| 41279 | { 5877, 7, 0, 0, 1312, 0, 0, 2759, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x824578024818ULL }, // Inst #5877 = VCOMPRESSPDZ128mrk |
| 41280 | { 5876, 6, 0, 0, 1973, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x804578024818ULL }, // Inst #5876 = VCOMPRESSPDZ128mr |
| 41281 | { 5875, 2, 0, 0, 746, 1, 1, 557, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x17a8002029ULL }, // Inst #5875 = VCOMISSrr_Int |
| 41282 | { 5874, 2, 0, 0, 746, 1, 1, 1008, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x17a8002029ULL }, // Inst #5874 = VCOMISSrr |
| 41283 | { 5873, 6, 0, 0, 786, 1, 1, 551, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17a8002019ULL }, // Inst #5873 = VCOMISSrm_Int |
| 41284 | { 5872, 6, 0, 0, 786, 1, 1, 1002, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17a8002019ULL }, // Inst #5872 = VCOMISSrm |
| 41285 | { 5871, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0, 0x7017e8042029ULL }, // Inst #5871 = VCOMISSZrrb |
| 41286 | { 5870, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x6017e8002029ULL }, // Inst #5870 = VCOMISSZrr_Int |
| 41287 | { 5869, 2, 0, 0, 86, 1, 1, 2757, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x6017e8002029ULL }, // Inst #5869 = VCOMISSZrr |
| 41288 | { 5868, 6, 0, 0, 85, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6017e8002019ULL }, // Inst #5868 = VCOMISSZrm_Int |
| 41289 | { 5867, 6, 0, 0, 85, 1, 1, 2751, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6017e8002019ULL }, // Inst #5867 = VCOMISSZrm |
| 41290 | { 5866, 2, 0, 0, 1859, 1, 1, 2398, X86ImpOpBase + 154, 0, 0x5017e8052029ULL }, // Inst #5866 = VCOMISHZrrb |
| 41291 | { 5865, 2, 0, 0, 1859, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x4017e8012029ULL }, // Inst #5865 = VCOMISHZrr_Int |
| 41292 | { 5864, 2, 0, 0, 1859, 1, 1, 2741, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x4017e8012029ULL }, // Inst #5864 = VCOMISHZrr |
| 41293 | { 5863, 6, 0, 0, 1972, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4017e8012019ULL }, // Inst #5863 = VCOMISHZrm_Int |
| 41294 | { 5862, 6, 0, 0, 1972, 1, 1, 2735, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4017e8012019ULL }, // Inst #5862 = VCOMISHZrm |
| 41295 | { 5861, 2, 0, 0, 746, 1, 1, 557, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x17b0002829ULL }, // Inst #5861 = VCOMISDrr_Int |
| 41296 | { 5860, 2, 0, 0, 746, 1, 1, 1000, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x17b0002829ULL }, // Inst #5860 = VCOMISDrr |
| 41297 | { 5859, 6, 0, 0, 786, 1, 1, 551, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17b0002819ULL }, // Inst #5859 = VCOMISDrm_Int |
| 41298 | { 5858, 6, 0, 0, 786, 1, 1, 994, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17b0002819ULL }, // Inst #5858 = VCOMISDrm |
| 41299 | { 5857, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0, 0x9017f0062829ULL }, // Inst #5857 = VCOMISDZrrb |
| 41300 | { 5856, 2, 0, 0, 86, 1, 1, 2398, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x8017f0022829ULL }, // Inst #5856 = VCOMISDZrr_Int |
| 41301 | { 5855, 2, 0, 0, 86, 1, 1, 2749, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x8017f0022829ULL }, // Inst #5855 = VCOMISDZrr |
| 41302 | { 5854, 6, 0, 0, 85, 1, 1, 302, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8017f0022819ULL }, // Inst #5854 = VCOMISDZrm_Int |
| 41303 | { 5853, 6, 0, 0, 85, 1, 1, 2743, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8017f0022819ULL }, // Inst #5853 = VCOMISDZrm |
| 41304 | { 5852, 2, 0, 0, 86, 0, 1, 2398, X86ImpOpBase + 0, 0, 0x4017e8012829ULL }, // Inst #5852 = VCOMISBF16Zrr_Int |
| 41305 | { 5851, 2, 0, 0, 86, 0, 1, 2741, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4017e8012829ULL }, // Inst #5851 = VCOMISBF16Zrr |
| 41306 | { 5850, 6, 0, 0, 85, 0, 1, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4017e8012819ULL }, // Inst #5850 = VCOMISBF16Zrm_Int |
| 41307 | { 5849, 6, 0, 0, 85, 0, 1, 2735, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4017e8012819ULL }, // Inst #5849 = VCOMISBF16Zrm |
| 41308 | { 5848, 4, 1, 0, 1113, 1, 0, 915, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe128043029ULL }, // Inst #5848 = VCMPSSrri_Int |
| 41309 | { 5847, 4, 1, 0, 1113, 1, 0, 847, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe128043029ULL }, // Inst #5847 = VCMPSSrri |
| 41310 | { 5846, 8, 1, 0, 1663, 1, 0, 2267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe128043019ULL }, // Inst #5846 = VCMPSSrmi_Int |
| 41311 | { 5845, 8, 1, 0, 1663, 1, 0, 2727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe128043019ULL }, // Inst #5845 = VCMPSSrmi |
| 41312 | { 5844, 5, 1, 0, 1721, 1, 0, 2690, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2e168043029ULL }, // Inst #5844 = VCMPSSZrrik_Int |
| 41313 | { 5843, 5, 1, 0, 1250, 1, 0, 2690, X86ImpOpBase + 78, 0, 0x12e168043029ULL }, // Inst #5843 = VCMPSSZrribk_Int |
| 41314 | { 5842, 4, 1, 0, 1250, 1, 0, 2686, X86ImpOpBase + 78, 0, 0x10e168043029ULL }, // Inst #5842 = VCMPSSZrrib_Int |
| 41315 | { 5841, 4, 1, 0, 1721, 1, 0, 2686, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0e168043029ULL }, // Inst #5841 = VCMPSSZrri_Int |
| 41316 | { 5840, 4, 1, 0, 1721, 1, 0, 2723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e168043029ULL }, // Inst #5840 = VCMPSSZrri |
| 41317 | { 5839, 9, 1, 0, 1343, 1, 0, 2673, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62e168043019ULL }, // Inst #5839 = VCMPSSZrmik_Int |
| 41318 | { 5838, 8, 1, 0, 1343, 1, 0, 2665, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60e168043019ULL }, // Inst #5838 = VCMPSSZrmi_Int |
| 41319 | { 5837, 8, 1, 0, 1343, 1, 0, 2715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60e168043019ULL }, // Inst #5837 = VCMPSSZrmi |
| 41320 | { 5836, 5, 1, 0, 1722, 1, 0, 2690, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2e168047029ULL }, // Inst #5836 = VCMPSHZrrik_Int |
| 41321 | { 5835, 5, 1, 0, 83, 1, 0, 2690, X86ImpOpBase + 78, 0, 0x12e168047029ULL }, // Inst #5835 = VCMPSHZrribk_Int |
| 41322 | { 5834, 4, 1, 0, 83, 1, 0, 2686, X86ImpOpBase + 78, 0, 0x10e168047029ULL }, // Inst #5834 = VCMPSHZrrib_Int |
| 41323 | { 5833, 4, 1, 0, 1722, 1, 0, 2686, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0e168047029ULL }, // Inst #5833 = VCMPSHZrri_Int |
| 41324 | { 5832, 4, 1, 0, 1722, 1, 0, 2711, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e168047029ULL }, // Inst #5832 = VCMPSHZrri |
| 41325 | { 5831, 9, 1, 0, 1971, 1, 0, 2673, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42e168047019ULL }, // Inst #5831 = VCMPSHZrmik_Int |
| 41326 | { 5830, 8, 1, 0, 1971, 1, 0, 2665, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40e168047019ULL }, // Inst #5830 = VCMPSHZrmi_Int |
| 41327 | { 5829, 8, 1, 0, 1971, 1, 0, 2703, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40e168047019ULL }, // Inst #5829 = VCMPSHZrmi |
| 41328 | { 5828, 4, 1, 0, 1112, 1, 0, 915, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe130043829ULL }, // Inst #5828 = VCMPSDrri_Int |
| 41329 | { 5827, 4, 1, 0, 1112, 1, 0, 855, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe130043829ULL }, // Inst #5827 = VCMPSDrri |
| 41330 | { 5826, 8, 1, 0, 1662, 1, 0, 2267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe130043819ULL }, // Inst #5826 = VCMPSDrmi_Int |
| 41331 | { 5825, 8, 1, 0, 1662, 1, 0, 2695, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe130043819ULL }, // Inst #5825 = VCMPSDrmi |
| 41332 | { 5824, 5, 1, 0, 1721, 1, 0, 2690, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2e170063829ULL }, // Inst #5824 = VCMPSDZrrik_Int |
| 41333 | { 5823, 5, 1, 0, 1250, 1, 0, 2690, X86ImpOpBase + 78, 0, 0x12e170063829ULL }, // Inst #5823 = VCMPSDZrribk_Int |
| 41334 | { 5822, 4, 1, 0, 1250, 1, 0, 2686, X86ImpOpBase + 78, 0, 0x10e170063829ULL }, // Inst #5822 = VCMPSDZrrib_Int |
| 41335 | { 5821, 4, 1, 0, 1721, 1, 0, 2686, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0e170063829ULL }, // Inst #5821 = VCMPSDZrri_Int |
| 41336 | { 5820, 4, 1, 0, 1721, 1, 0, 2682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e170063829ULL }, // Inst #5820 = VCMPSDZrri |
| 41337 | { 5819, 9, 1, 0, 1343, 1, 0, 2673, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82e170063819ULL }, // Inst #5819 = VCMPSDZrmik_Int |
| 41338 | { 5818, 8, 1, 0, 1343, 1, 0, 2665, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80e170063819ULL }, // Inst #5818 = VCMPSDZrmi_Int |
| 41339 | { 5817, 8, 1, 0, 1343, 1, 0, 2657, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80e170063819ULL }, // Inst #5817 = VCMPSDZrmi |
| 41340 | { 5816, 4, 1, 0, 1111, 1, 0, 915, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe128042029ULL }, // Inst #5816 = VCMPPSrri |
| 41341 | { 5815, 8, 1, 0, 1659, 1, 0, 2267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe128042019ULL }, // Inst #5815 = VCMPPSrmi |
| 41342 | { 5814, 5, 1, 0, 1249, 1, 0, 2652, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeae168042029ULL }, // Inst #5814 = VCMPPSZrrik |
| 41343 | { 5813, 5, 1, 0, 1249, 1, 0, 2652, X86ImpOpBase + 78, 0, 0x7ae168042029ULL }, // Inst #5813 = VCMPPSZrribk |
| 41344 | { 5812, 4, 1, 0, 1249, 1, 0, 2648, X86ImpOpBase + 78, 0, 0x78e168042029ULL }, // Inst #5812 = VCMPPSZrrib |
| 41345 | { 5811, 4, 1, 0, 1249, 1, 0, 2648, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8e168042029ULL }, // Inst #5811 = VCMPPSZrri |
| 41346 | { 5810, 9, 1, 0, 1352, 1, 0, 2639, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeae168042019ULL }, // Inst #5810 = VCMPPSZrmik |
| 41347 | { 5809, 8, 1, 0, 1352, 1, 0, 2631, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8e168042019ULL }, // Inst #5809 = VCMPPSZrmi |
| 41348 | { 5808, 9, 1, 0, 1352, 1, 0, 2639, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ae168042019ULL }, // Inst #5808 = VCMPPSZrmbik |
| 41349 | { 5807, 8, 1, 0, 1352, 1, 0, 2631, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78e168042019ULL }, // Inst #5807 = VCMPPSZrmbi |
| 41350 | { 5806, 5, 1, 0, 1248, 1, 0, 2626, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3e168042029ULL }, // Inst #5806 = VCMPPSZ256rrik |
| 41351 | { 5805, 4, 1, 0, 1248, 1, 0, 2622, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1e168042029ULL }, // Inst #5805 = VCMPPSZ256rri |
| 41352 | { 5804, 9, 1, 0, 1351, 1, 0, 2613, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3e168042019ULL }, // Inst #5804 = VCMPPSZ256rmik |
| 41353 | { 5803, 8, 1, 0, 1351, 1, 0, 2605, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1e168042019ULL }, // Inst #5803 = VCMPPSZ256rmi |
| 41354 | { 5802, 9, 1, 0, 1351, 1, 0, 2613, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73e168042019ULL }, // Inst #5802 = VCMPPSZ256rmbik |
| 41355 | { 5801, 8, 1, 0, 1351, 1, 0, 2605, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71e168042019ULL }, // Inst #5801 = VCMPPSZ256rmbi |
| 41356 | { 5800, 5, 1, 0, 1247, 1, 0, 2600, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2e168042029ULL }, // Inst #5800 = VCMPPSZ128rrik |
| 41357 | { 5799, 4, 1, 0, 1247, 1, 0, 2596, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e168042029ULL }, // Inst #5799 = VCMPPSZ128rri |
| 41358 | { 5798, 9, 1, 0, 1342, 1, 0, 2587, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2e168042019ULL }, // Inst #5798 = VCMPPSZ128rmik |
| 41359 | { 5797, 8, 1, 0, 1342, 1, 0, 2579, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0e168042019ULL }, // Inst #5797 = VCMPPSZ128rmi |
| 41360 | { 5796, 9, 1, 0, 1342, 1, 0, 2587, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72e168042019ULL }, // Inst #5796 = VCMPPSZ128rmbik |
| 41361 | { 5795, 8, 1, 0, 1342, 1, 0, 2579, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70e168042019ULL }, // Inst #5795 = VCMPPSZ128rmbi |
| 41362 | { 5794, 4, 1, 0, 369, 1, 0, 923, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1e128042029ULL }, // Inst #5794 = VCMPPSYrri |
| 41363 | { 5793, 8, 1, 0, 1683, 1, 0, 2259, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1e128042019ULL }, // Inst #5793 = VCMPPSYrmi |
| 41364 | { 5792, 5, 1, 0, 371, 1, 0, 2496, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeae168046029ULL }, // Inst #5792 = VCMPPHZrrik |
| 41365 | { 5791, 5, 1, 0, 371, 1, 0, 2496, X86ImpOpBase + 78, 0, 0x5ae168046029ULL }, // Inst #5791 = VCMPPHZrribk |
| 41366 | { 5790, 4, 1, 0, 371, 1, 0, 2492, X86ImpOpBase + 78, 0, 0x58e168046029ULL }, // Inst #5790 = VCMPPHZrrib |
| 41367 | { 5789, 4, 1, 0, 371, 1, 0, 2492, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8e168046029ULL }, // Inst #5789 = VCMPPHZrri |
| 41368 | { 5788, 9, 1, 0, 1970, 1, 0, 2483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeae168046019ULL }, // Inst #5788 = VCMPPHZrmik |
| 41369 | { 5787, 8, 1, 0, 1970, 1, 0, 2475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8e168046019ULL }, // Inst #5787 = VCMPPHZrmi |
| 41370 | { 5786, 9, 1, 0, 1970, 1, 0, 2483, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ae168046019ULL }, // Inst #5786 = VCMPPHZrmbik |
| 41371 | { 5785, 8, 1, 0, 1970, 1, 0, 2475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58e168046019ULL }, // Inst #5785 = VCMPPHZrmbi |
| 41372 | { 5784, 5, 1, 0, 1720, 1, 0, 2470, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3e168046029ULL }, // Inst #5784 = VCMPPHZ256rrik |
| 41373 | { 5783, 4, 1, 0, 1720, 1, 0, 2466, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1e168046029ULL }, // Inst #5783 = VCMPPHZ256rri |
| 41374 | { 5782, 9, 1, 0, 1969, 1, 0, 2457, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3e168046019ULL }, // Inst #5782 = VCMPPHZ256rmik |
| 41375 | { 5781, 8, 1, 0, 1969, 1, 0, 2449, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1e168046019ULL }, // Inst #5781 = VCMPPHZ256rmi |
| 41376 | { 5780, 9, 1, 0, 1969, 1, 0, 2457, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53e168046019ULL }, // Inst #5780 = VCMPPHZ256rmbik |
| 41377 | { 5779, 8, 1, 0, 1969, 1, 0, 2449, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51e168046019ULL }, // Inst #5779 = VCMPPHZ256rmbi |
| 41378 | { 5778, 5, 1, 0, 1719, 1, 0, 2444, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2e168046029ULL }, // Inst #5778 = VCMPPHZ128rrik |
| 41379 | { 5777, 4, 1, 0, 1719, 1, 0, 2440, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e168046029ULL }, // Inst #5777 = VCMPPHZ128rri |
| 41380 | { 5776, 9, 1, 0, 1968, 1, 0, 2431, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2e168046019ULL }, // Inst #5776 = VCMPPHZ128rmik |
| 41381 | { 5775, 8, 1, 0, 1968, 1, 0, 2423, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0e168046019ULL }, // Inst #5775 = VCMPPHZ128rmi |
| 41382 | { 5774, 9, 1, 0, 1968, 1, 0, 2431, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52e168046019ULL }, // Inst #5774 = VCMPPHZ128rmbik |
| 41383 | { 5773, 8, 1, 0, 1968, 1, 0, 2423, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50e168046019ULL }, // Inst #5773 = VCMPPHZ128rmbi |
| 41384 | { 5772, 4, 1, 0, 1110, 1, 0, 915, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe130042829ULL }, // Inst #5772 = VCMPPDrri |
| 41385 | { 5771, 8, 1, 0, 1658, 1, 0, 2267, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe130042819ULL }, // Inst #5771 = VCMPPDrmi |
| 41386 | { 5770, 5, 1, 0, 1249, 1, 0, 2574, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeae170062829ULL }, // Inst #5770 = VCMPPDZrrik |
| 41387 | { 5769, 5, 1, 0, 1249, 1, 0, 2574, X86ImpOpBase + 78, 0, 0x9ae170062829ULL }, // Inst #5769 = VCMPPDZrribk |
| 41388 | { 5768, 4, 1, 0, 1249, 1, 0, 2570, X86ImpOpBase + 78, 0, 0x98e170062829ULL }, // Inst #5768 = VCMPPDZrrib |
| 41389 | { 5767, 4, 1, 0, 1249, 1, 0, 2570, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8e170062829ULL }, // Inst #5767 = VCMPPDZrri |
| 41390 | { 5766, 9, 1, 0, 1352, 1, 0, 2561, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeae170062819ULL }, // Inst #5766 = VCMPPDZrmik |
| 41391 | { 5765, 8, 1, 0, 1352, 1, 0, 2553, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8e170062819ULL }, // Inst #5765 = VCMPPDZrmi |
| 41392 | { 5764, 9, 1, 0, 1352, 1, 0, 2561, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ae170062819ULL }, // Inst #5764 = VCMPPDZrmbik |
| 41393 | { 5763, 8, 1, 0, 1352, 1, 0, 2553, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98e170062819ULL }, // Inst #5763 = VCMPPDZrmbi |
| 41394 | { 5762, 5, 1, 0, 1248, 1, 0, 2548, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3e170062829ULL }, // Inst #5762 = VCMPPDZ256rrik |
| 41395 | { 5761, 4, 1, 0, 1248, 1, 0, 2544, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1e170062829ULL }, // Inst #5761 = VCMPPDZ256rri |
| 41396 | { 5760, 9, 1, 0, 1351, 1, 0, 2535, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3e170062819ULL }, // Inst #5760 = VCMPPDZ256rmik |
| 41397 | { 5759, 8, 1, 0, 1351, 1, 0, 2527, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1e170062819ULL }, // Inst #5759 = VCMPPDZ256rmi |
| 41398 | { 5758, 9, 1, 0, 1351, 1, 0, 2535, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93e170062819ULL }, // Inst #5758 = VCMPPDZ256rmbik |
| 41399 | { 5757, 8, 1, 0, 1351, 1, 0, 2527, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91e170062819ULL }, // Inst #5757 = VCMPPDZ256rmbi |
| 41400 | { 5756, 5, 1, 0, 1247, 1, 0, 2522, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2e170062829ULL }, // Inst #5756 = VCMPPDZ128rrik |
| 41401 | { 5755, 4, 1, 0, 1247, 1, 0, 2518, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e170062829ULL }, // Inst #5755 = VCMPPDZ128rri |
| 41402 | { 5754, 9, 1, 0, 1342, 1, 0, 2509, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2e170062819ULL }, // Inst #5754 = VCMPPDZ128rmik |
| 41403 | { 5753, 8, 1, 0, 1342, 1, 0, 2501, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0e170062819ULL }, // Inst #5753 = VCMPPDZ128rmi |
| 41404 | { 5752, 9, 1, 0, 1342, 1, 0, 2509, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92e170062819ULL }, // Inst #5752 = VCMPPDZ128rmbik |
| 41405 | { 5751, 8, 1, 0, 1342, 1, 0, 2501, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90e170062819ULL }, // Inst #5751 = VCMPPDZ128rmbi |
| 41406 | { 5750, 4, 1, 0, 373, 1, 0, 923, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1e130042829ULL }, // Inst #5750 = VCMPPDYrri |
| 41407 | { 5749, 8, 1, 0, 1682, 1, 0, 2259, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1e130042819ULL }, // Inst #5749 = VCMPPDYrmi |
| 41408 | { 5748, 5, 1, 0, 371, 0, 0, 2496, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeae178047829ULL }, // Inst #5748 = VCMPBF16Zrrik |
| 41409 | { 5747, 4, 1, 0, 371, 0, 0, 2492, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8e178047829ULL }, // Inst #5747 = VCMPBF16Zrri |
| 41410 | { 5746, 9, 1, 0, 370, 0, 0, 2483, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeae178047819ULL }, // Inst #5746 = VCMPBF16Zrmik |
| 41411 | { 5745, 8, 1, 0, 370, 0, 0, 2475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8e178047819ULL }, // Inst #5745 = VCMPBF16Zrmi |
| 41412 | { 5744, 9, 1, 0, 370, 0, 0, 2483, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5ae178047819ULL }, // Inst #5744 = VCMPBF16Zrmbik |
| 41413 | { 5743, 8, 1, 0, 370, 0, 0, 2475, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58e178047819ULL }, // Inst #5743 = VCMPBF16Zrmbi |
| 41414 | { 5742, 5, 1, 0, 369, 0, 0, 2470, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3e178047829ULL }, // Inst #5742 = VCMPBF16Z256rrik |
| 41415 | { 5741, 4, 1, 0, 369, 0, 0, 2466, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1e178047829ULL }, // Inst #5741 = VCMPBF16Z256rri |
| 41416 | { 5740, 9, 1, 0, 368, 0, 0, 2457, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3e178047819ULL }, // Inst #5740 = VCMPBF16Z256rmik |
| 41417 | { 5739, 8, 1, 0, 368, 0, 0, 2449, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1e178047819ULL }, // Inst #5739 = VCMPBF16Z256rmi |
| 41418 | { 5738, 9, 1, 0, 368, 0, 0, 2457, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53e178047819ULL }, // Inst #5738 = VCMPBF16Z256rmbik |
| 41419 | { 5737, 8, 1, 0, 368, 0, 0, 2449, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51e178047819ULL }, // Inst #5737 = VCMPBF16Z256rmbi |
| 41420 | { 5736, 5, 1, 0, 79, 0, 0, 2444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2e178047829ULL }, // Inst #5736 = VCMPBF16Z128rrik |
| 41421 | { 5735, 4, 1, 0, 79, 0, 0, 2440, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0e178047829ULL }, // Inst #5735 = VCMPBF16Z128rri |
| 41422 | { 5734, 9, 1, 0, 78, 0, 0, 2431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2e178047819ULL }, // Inst #5734 = VCMPBF16Z128rmik |
| 41423 | { 5733, 8, 1, 0, 78, 0, 0, 2423, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0e178047819ULL }, // Inst #5733 = VCMPBF16Z128rmi |
| 41424 | { 5732, 9, 1, 0, 78, 0, 0, 2431, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52e178047819ULL }, // Inst #5732 = VCMPBF16Z128rmbik |
| 41425 | { 5731, 8, 1, 0, 78, 0, 0, 2423, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50e178047819ULL }, // Inst #5731 = VCMPBF16Z128rmbi |
| 41426 | { 5730, 2, 1, 0, 182, 0, 0, 557, X86ImpOpBase + 0, 0, 0xc28004829ULL }, // Inst #5730 = VBROADCASTSSrr |
| 41427 | { 5729, 6, 1, 0, 769, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc28004819ULL }, // Inst #5729 = VBROADCASTSSrm |
| 41428 | { 5728, 3, 1, 0, 366, 0, 0, 2350, X86ImpOpBase + 0, 0, 0xee0c68004829ULL }, // Inst #5728 = VBROADCASTSSZrrkz |
| 41429 | { 5727, 4, 1, 0, 366, 0, 0, 2346, X86ImpOpBase + 0, 0, 0xea0c68004829ULL }, // Inst #5727 = VBROADCASTSSZrrk |
| 41430 | { 5726, 2, 1, 0, 366, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xe80c68004829ULL }, // Inst #5726 = VBROADCASTSSZrr |
| 41431 | { 5725, 7, 1, 0, 1831, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6e0c68004819ULL }, // Inst #5725 = VBROADCASTSSZrmkz |
| 41432 | { 5724, 8, 1, 0, 1831, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x6a0c68004819ULL }, // Inst #5724 = VBROADCASTSSZrmk |
| 41433 | { 5723, 6, 1, 0, 1824, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x680c68004819ULL }, // Inst #5723 = VBROADCASTSSZrm |
| 41434 | { 5722, 3, 1, 0, 366, 0, 0, 2320, X86ImpOpBase + 0, 0, 0xc70c68004829ULL }, // Inst #5722 = VBROADCASTSSZ256rrkz |
| 41435 | { 5721, 4, 1, 0, 366, 0, 0, 2316, X86ImpOpBase + 0, 0, 0xc30c68004829ULL }, // Inst #5721 = VBROADCASTSSZ256rrk |
| 41436 | { 5720, 2, 1, 0, 366, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xc10c68004829ULL }, // Inst #5720 = VBROADCASTSSZ256rr |
| 41437 | { 5719, 7, 1, 0, 1322, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x670c68004819ULL }, // Inst #5719 = VBROADCASTSSZ256rmkz |
| 41438 | { 5718, 8, 1, 0, 1322, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x630c68004819ULL }, // Inst #5718 = VBROADCASTSSZ256rmk |
| 41439 | { 5717, 6, 1, 0, 1824, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x610c68004819ULL }, // Inst #5717 = VBROADCASTSSZ256rm |
| 41440 | { 5716, 3, 1, 0, 1804, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa60c68004829ULL }, // Inst #5716 = VBROADCASTSSZ128rrkz |
| 41441 | { 5715, 4, 1, 0, 1804, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa20c68004829ULL }, // Inst #5715 = VBROADCASTSSZ128rrk |
| 41442 | { 5714, 2, 1, 0, 1804, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa00c68004829ULL }, // Inst #5714 = VBROADCASTSSZ128rr |
| 41443 | { 5713, 7, 1, 0, 1301, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x660c68004819ULL }, // Inst #5713 = VBROADCASTSSZ128rmkz |
| 41444 | { 5712, 8, 1, 0, 1301, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x620c68004819ULL }, // Inst #5712 = VBROADCASTSSZ128rmk |
| 41445 | { 5711, 6, 1, 0, 1793, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x600c68004819ULL }, // Inst #5711 = VBROADCASTSSZ128rm |
| 41446 | { 5710, 2, 1, 0, 366, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x10c28004829ULL }, // Inst #5710 = VBROADCASTSSYrr |
| 41447 | { 5709, 6, 1, 0, 829, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x10c28004819ULL }, // Inst #5709 = VBROADCASTSSYrm |
| 41448 | { 5708, 3, 1, 0, 366, 0, 0, 2420, X86ImpOpBase + 0, 0, 0xee0cf0024829ULL }, // Inst #5708 = VBROADCASTSDZrrkz |
| 41449 | { 5707, 4, 1, 0, 366, 0, 0, 2416, X86ImpOpBase + 0, 0, 0xea0cf0024829ULL }, // Inst #5707 = VBROADCASTSDZrrk |
| 41450 | { 5706, 2, 1, 0, 366, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xe80cf0024829ULL }, // Inst #5706 = VBROADCASTSDZrr |
| 41451 | { 5705, 7, 1, 0, 1831, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8e0cf0024819ULL }, // Inst #5705 = VBROADCASTSDZrmkz |
| 41452 | { 5704, 8, 1, 0, 1831, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x8a0cf0024819ULL }, // Inst #5704 = VBROADCASTSDZrmk |
| 41453 | { 5703, 6, 1, 0, 1824, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x880cf0024819ULL }, // Inst #5703 = VBROADCASTSDZrm |
| 41454 | { 5702, 3, 1, 0, 366, 0, 0, 2413, X86ImpOpBase + 0, 0, 0xc70cf0024829ULL }, // Inst #5702 = VBROADCASTSDZ256rrkz |
| 41455 | { 5701, 4, 1, 0, 366, 0, 0, 2409, X86ImpOpBase + 0, 0, 0xc30cf0024829ULL }, // Inst #5701 = VBROADCASTSDZ256rrk |
| 41456 | { 5700, 2, 1, 0, 366, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xc10cf0024829ULL }, // Inst #5700 = VBROADCASTSDZ256rr |
| 41457 | { 5699, 7, 1, 0, 1322, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x870cf0024819ULL }, // Inst #5699 = VBROADCASTSDZ256rmkz |
| 41458 | { 5698, 8, 1, 0, 1322, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x830cf0024819ULL }, // Inst #5698 = VBROADCASTSDZ256rmk |
| 41459 | { 5697, 6, 1, 0, 1824, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810cf0024819ULL }, // Inst #5697 = VBROADCASTSDZ256rm |
| 41460 | { 5696, 2, 1, 0, 366, 0, 0, 2407, X86ImpOpBase + 0, 0, 0x10cb0004829ULL }, // Inst #5696 = VBROADCASTSDYrr |
| 41461 | { 5695, 6, 1, 0, 829, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x10cb0004819ULL }, // Inst #5695 = VBROADCASTSDYrm |
| 41462 | { 5694, 7, 1, 0, 1830, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce2df8024819ULL }, // Inst #5694 = VBROADCASTI64X4Zrmkz |
| 41463 | { 5693, 8, 1, 0, 1830, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca2df8024819ULL }, // Inst #5693 = VBROADCASTI64X4Zrmk |
| 41464 | { 5692, 6, 1, 0, 1823, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc82df8024819ULL }, // Inst #5692 = VBROADCASTI64X4Zrm |
| 41465 | { 5691, 7, 1, 0, 1830, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae2d78024819ULL }, // Inst #5691 = VBROADCASTI64X2Zrmkz |
| 41466 | { 5690, 8, 1, 0, 1830, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa2d78024819ULL }, // Inst #5690 = VBROADCASTI64X2Zrmk |
| 41467 | { 5689, 6, 1, 0, 1823, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa82d78024819ULL }, // Inst #5689 = VBROADCASTI64X2Zrm |
| 41468 | { 5688, 7, 1, 0, 1321, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa72d78024819ULL }, // Inst #5688 = VBROADCASTI64X2Z256rmkz |
| 41469 | { 5687, 8, 1, 0, 1321, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa32d78024819ULL }, // Inst #5687 = VBROADCASTI64X2Z256rmk |
| 41470 | { 5686, 6, 1, 0, 1823, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa12d78024819ULL }, // Inst #5686 = VBROADCASTI64X2Z256rm |
| 41471 | { 5685, 7, 1, 0, 1830, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce2df8004819ULL }, // Inst #5685 = VBROADCASTI32X8Zrmkz |
| 41472 | { 5684, 8, 1, 0, 1830, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca2df8004819ULL }, // Inst #5684 = VBROADCASTI32X8Zrmk |
| 41473 | { 5683, 6, 1, 0, 1823, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc82df8004819ULL }, // Inst #5683 = VBROADCASTI32X8Zrm |
| 41474 | { 5682, 7, 1, 0, 1830, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae2d78004819ULL }, // Inst #5682 = VBROADCASTI32X4Zrmkz |
| 41475 | { 5681, 8, 1, 0, 1830, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa2d78004819ULL }, // Inst #5681 = VBROADCASTI32X4Zrmk |
| 41476 | { 5680, 6, 1, 0, 1823, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa82d78004819ULL }, // Inst #5680 = VBROADCASTI32X4Zrm |
| 41477 | { 5679, 7, 1, 0, 1321, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa72d78004819ULL }, // Inst #5679 = VBROADCASTI32X4Z256rmkz |
| 41478 | { 5678, 8, 1, 0, 1321, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa32d78004819ULL }, // Inst #5678 = VBROADCASTI32X4Z256rmk |
| 41479 | { 5677, 6, 1, 0, 1823, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa12d78004819ULL }, // Inst #5677 = VBROADCASTI32X4Z256rm |
| 41480 | { 5676, 3, 1, 0, 364, 0, 0, 2350, X86ImpOpBase + 0, 0, 0xee2cf8004829ULL }, // Inst #5676 = VBROADCASTI32X2Zrrkz |
| 41481 | { 5675, 4, 1, 0, 364, 0, 0, 2346, X86ImpOpBase + 0, 0, 0xea2cf8004829ULL }, // Inst #5675 = VBROADCASTI32X2Zrrk |
| 41482 | { 5674, 2, 1, 0, 364, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xe82cf8004829ULL }, // Inst #5674 = VBROADCASTI32X2Zrr |
| 41483 | { 5673, 7, 1, 0, 1829, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8e2cf8004819ULL }, // Inst #5673 = VBROADCASTI32X2Zrmkz |
| 41484 | { 5672, 8, 1, 0, 1829, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a2cf8004819ULL }, // Inst #5672 = VBROADCASTI32X2Zrmk |
| 41485 | { 5671, 6, 1, 0, 1822, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x882cf8004819ULL }, // Inst #5671 = VBROADCASTI32X2Zrm |
| 41486 | { 5670, 3, 1, 0, 364, 0, 0, 2320, X86ImpOpBase + 0, 0, 0xc72cf8004829ULL }, // Inst #5670 = VBROADCASTI32X2Z256rrkz |
| 41487 | { 5669, 4, 1, 0, 364, 0, 0, 2316, X86ImpOpBase + 0, 0, 0xc32cf8004829ULL }, // Inst #5669 = VBROADCASTI32X2Z256rrk |
| 41488 | { 5668, 2, 1, 0, 364, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xc12cf8004829ULL }, // Inst #5668 = VBROADCASTI32X2Z256rr |
| 41489 | { 5667, 7, 1, 0, 1320, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x872cf8004819ULL }, // Inst #5667 = VBROADCASTI32X2Z256rmkz |
| 41490 | { 5666, 8, 1, 0, 1320, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x832cf8004819ULL }, // Inst #5666 = VBROADCASTI32X2Z256rmk |
| 41491 | { 5665, 6, 1, 0, 1822, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x812cf8004819ULL }, // Inst #5665 = VBROADCASTI32X2Z256rm |
| 41492 | { 5664, 3, 1, 0, 184, 0, 0, 2404, X86ImpOpBase + 0, 0, 0xa62cf8004829ULL }, // Inst #5664 = VBROADCASTI32X2Z128rrkz |
| 41493 | { 5663, 4, 1, 0, 184, 0, 0, 2400, X86ImpOpBase + 0, 0, 0xa22cf8004829ULL }, // Inst #5663 = VBROADCASTI32X2Z128rrk |
| 41494 | { 5662, 2, 1, 0, 184, 0, 0, 2398, X86ImpOpBase + 0, 0, 0xa02cf8004829ULL }, // Inst #5662 = VBROADCASTI32X2Z128rr |
| 41495 | { 5661, 7, 1, 0, 1300, 0, 0, 2391, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x862cf8004819ULL }, // Inst #5661 = VBROADCASTI32X2Z128rmkz |
| 41496 | { 5660, 8, 1, 0, 1300, 0, 0, 2383, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x822cf8004819ULL }, // Inst #5660 = VBROADCASTI32X2Z128rmk |
| 41497 | { 5659, 6, 1, 0, 1796, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x802cf8004819ULL }, // Inst #5659 = VBROADCASTI32X2Z128rm |
| 41498 | { 5658, 6, 1, 0, 830, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x12d38004819ULL }, // Inst #5658 = VBROADCASTI128rm |
| 41499 | { 5657, 7, 1, 0, 1830, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce0df8024819ULL }, // Inst #5657 = VBROADCASTF64X4Zrmkz |
| 41500 | { 5656, 8, 1, 0, 1830, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca0df8024819ULL }, // Inst #5656 = VBROADCASTF64X4Zrmk |
| 41501 | { 5655, 6, 1, 0, 1823, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc80df8024819ULL }, // Inst #5655 = VBROADCASTF64X4Zrm |
| 41502 | { 5654, 7, 1, 0, 1830, 0, 0, 2376, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae0d78024819ULL }, // Inst #5654 = VBROADCASTF64X2Zrmkz |
| 41503 | { 5653, 8, 1, 0, 1830, 0, 0, 2368, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa0d78024819ULL }, // Inst #5653 = VBROADCASTF64X2Zrmk |
| 41504 | { 5652, 6, 1, 0, 1823, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa80d78024819ULL }, // Inst #5652 = VBROADCASTF64X2Zrm |
| 41505 | { 5651, 7, 1, 0, 1321, 0, 0, 2361, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa70d78024819ULL }, // Inst #5651 = VBROADCASTF64X2Z256rmkz |
| 41506 | { 5650, 8, 1, 0, 1321, 0, 0, 2353, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa30d78024819ULL }, // Inst #5650 = VBROADCASTF64X2Z256rmk |
| 41507 | { 5649, 6, 1, 0, 1823, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa10d78024819ULL }, // Inst #5649 = VBROADCASTF64X2Z256rm |
| 41508 | { 5648, 7, 1, 0, 1830, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xce0df8004819ULL }, // Inst #5648 = VBROADCASTF32X8Zrmkz |
| 41509 | { 5647, 8, 1, 0, 1830, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xca0df8004819ULL }, // Inst #5647 = VBROADCASTF32X8Zrmk |
| 41510 | { 5646, 6, 1, 0, 1823, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc80df8004819ULL }, // Inst #5646 = VBROADCASTF32X8Zrm |
| 41511 | { 5645, 7, 1, 0, 1830, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xae0d78004819ULL }, // Inst #5645 = VBROADCASTF32X4Zrmkz |
| 41512 | { 5644, 8, 1, 0, 1830, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa0d78004819ULL }, // Inst #5644 = VBROADCASTF32X4Zrmk |
| 41513 | { 5643, 6, 1, 0, 1823, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa80d78004819ULL }, // Inst #5643 = VBROADCASTF32X4Zrm |
| 41514 | { 5642, 7, 1, 0, 1321, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa70d78004819ULL }, // Inst #5642 = VBROADCASTF32X4Z256rmkz |
| 41515 | { 5641, 8, 1, 0, 1321, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa30d78004819ULL }, // Inst #5641 = VBROADCASTF32X4Z256rmk |
| 41516 | { 5640, 6, 1, 0, 1823, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa10d78004819ULL }, // Inst #5640 = VBROADCASTF32X4Z256rm |
| 41517 | { 5639, 3, 1, 0, 364, 0, 0, 2350, X86ImpOpBase + 0, 0, 0xee0cf0004829ULL }, // Inst #5639 = VBROADCASTF32X2Zrrkz |
| 41518 | { 5638, 4, 1, 0, 364, 0, 0, 2346, X86ImpOpBase + 0, 0, 0xea0cf0004829ULL }, // Inst #5638 = VBROADCASTF32X2Zrrk |
| 41519 | { 5637, 2, 1, 0, 364, 0, 0, 2344, X86ImpOpBase + 0, 0, 0xe80cf0004829ULL }, // Inst #5637 = VBROADCASTF32X2Zrr |
| 41520 | { 5636, 7, 1, 0, 1829, 0, 0, 2337, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8e0cf0004819ULL }, // Inst #5636 = VBROADCASTF32X2Zrmkz |
| 41521 | { 5635, 8, 1, 0, 1829, 0, 0, 2329, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8a0cf0004819ULL }, // Inst #5635 = VBROADCASTF32X2Zrmk |
| 41522 | { 5634, 6, 1, 0, 1822, 0, 0, 2323, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x880cf0004819ULL }, // Inst #5634 = VBROADCASTF32X2Zrm |
| 41523 | { 5633, 3, 1, 0, 364, 0, 0, 2320, X86ImpOpBase + 0, 0, 0xc70cf0004829ULL }, // Inst #5633 = VBROADCASTF32X2Z256rrkz |
| 41524 | { 5632, 4, 1, 0, 364, 0, 0, 2316, X86ImpOpBase + 0, 0, 0xc30cf0004829ULL }, // Inst #5632 = VBROADCASTF32X2Z256rrk |
| 41525 | { 5631, 2, 1, 0, 364, 0, 0, 2314, X86ImpOpBase + 0, 0, 0xc10cf0004829ULL }, // Inst #5631 = VBROADCASTF32X2Z256rr |
| 41526 | { 5630, 7, 1, 0, 1320, 0, 0, 2307, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x870cf0004819ULL }, // Inst #5630 = VBROADCASTF32X2Z256rmkz |
| 41527 | { 5629, 8, 1, 0, 1320, 0, 0, 2299, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x830cf0004819ULL }, // Inst #5629 = VBROADCASTF32X2Z256rmk |
| 41528 | { 5628, 6, 1, 0, 1822, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810cf0004819ULL }, // Inst #5628 = VBROADCASTF32X2Z256rm |
| 41529 | { 5627, 6, 1, 0, 962, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10d28004819ULL }, // Inst #5627 = VBROADCASTF128rm |
| 41530 | { 5626, 4, 1, 0, 1633, 0, 0, 2295, X86ImpOpBase + 0, 0, 0xa5280c6829ULL }, // Inst #5626 = VBLENDVPSrrr |
| 41531 | { 5625, 8, 1, 0, 1631, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa5280c6819ULL }, // Inst #5625 = VBLENDVPSrmr |
| 41532 | { 5624, 4, 1, 0, 1963, 0, 0, 2283, X86ImpOpBase + 0, 0, 0x1a5280c6829ULL }, // Inst #5624 = VBLENDVPSYrrr |
| 41533 | { 5623, 8, 1, 0, 1961, 0, 0, 2275, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a5280c6819ULL }, // Inst #5623 = VBLENDVPSYrmr |
| 41534 | { 5622, 4, 1, 0, 1633, 0, 0, 2295, X86ImpOpBase + 0, 0, 0xa5b00c6829ULL }, // Inst #5622 = VBLENDVPDrrr |
| 41535 | { 5621, 8, 1, 0, 1631, 0, 0, 2287, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa5b00c6819ULL }, // Inst #5621 = VBLENDVPDrmr |
| 41536 | { 5620, 4, 1, 0, 1963, 0, 0, 2283, X86ImpOpBase + 0, 0, 0x1a5b00c6829ULL }, // Inst #5620 = VBLENDVPDYrrr |
| 41537 | { 5619, 8, 1, 0, 1961, 0, 0, 2275, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a5b00c6819ULL }, // Inst #5619 = VBLENDVPDYrmr |
| 41538 | { 5618, 4, 1, 0, 50, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x8628046829ULL }, // Inst #5618 = VBLENDPSrri |
| 41539 | { 5617, 8, 1, 0, 49, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8628046819ULL }, // Inst #5617 = VBLENDPSrmi |
| 41540 | { 5616, 4, 1, 0, 360, 0, 0, 923, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x18628046829ULL }, // Inst #5616 = VBLENDPSYrri |
| 41541 | { 5615, 8, 1, 0, 359, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18628046819ULL }, // Inst #5615 = VBLENDPSYrmi |
| 41542 | { 5614, 4, 1, 0, 50, 0, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x86b0046829ULL }, // Inst #5614 = VBLENDPDrri |
| 41543 | { 5613, 8, 1, 0, 49, 0, 0, 2267, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x86b0046819ULL }, // Inst #5613 = VBLENDPDrmi |
| 41544 | { 5612, 4, 1, 0, 360, 0, 0, 923, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x186b0046829ULL }, // Inst #5612 = VBLENDPDYrri |
| 41545 | { 5611, 8, 1, 0, 359, 0, 0, 2259, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x186b0046819ULL }, // Inst #5611 = VBLENDPDYrmi |
| 41546 | { 5610, 4, 1, 0, 358, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeeb2e8004829ULL }, // Inst #5610 = VBLENDMPSZrrkz |
| 41547 | { 5609, 4, 1, 0, 358, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeab2e8004829ULL }, // Inst #5609 = VBLENDMPSZrrk |
| 41548 | { 5608, 3, 1, 0, 358, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b2e8004829ULL }, // Inst #5608 = VBLENDMPSZrr |
| 41549 | { 5607, 8, 1, 0, 1319, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb2e8004819ULL }, // Inst #5607 = VBLENDMPSZrmkz |
| 41550 | { 5606, 8, 1, 0, 1319, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab2e8004819ULL }, // Inst #5606 = VBLENDMPSZrmk |
| 41551 | { 5605, 8, 1, 0, 1319, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eb2e8004819ULL }, // Inst #5605 = VBLENDMPSZrmbkz |
| 41552 | { 5604, 8, 1, 0, 1319, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ab2e8004819ULL }, // Inst #5604 = VBLENDMPSZrmbk |
| 41553 | { 5603, 7, 1, 0, 1319, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78b2e8004819ULL }, // Inst #5603 = VBLENDMPSZrmb |
| 41554 | { 5602, 7, 1, 0, 1319, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b2e8004819ULL }, // Inst #5602 = VBLENDMPSZrm |
| 41555 | { 5601, 4, 1, 0, 1233, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc7b2e8004829ULL }, // Inst #5601 = VBLENDMPSZ256rrkz |
| 41556 | { 5600, 4, 1, 0, 1233, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc3b2e8004829ULL }, // Inst #5600 = VBLENDMPSZ256rrk |
| 41557 | { 5599, 3, 1, 0, 1233, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b2e8004829ULL }, // Inst #5599 = VBLENDMPSZ256rr |
| 41558 | { 5598, 8, 1, 0, 1318, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b2e8004819ULL }, // Inst #5598 = VBLENDMPSZ256rmkz |
| 41559 | { 5597, 8, 1, 0, 1318, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b2e8004819ULL }, // Inst #5597 = VBLENDMPSZ256rmk |
| 41560 | { 5596, 8, 1, 0, 1318, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77b2e8004819ULL }, // Inst #5596 = VBLENDMPSZ256rmbkz |
| 41561 | { 5595, 8, 1, 0, 1318, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73b2e8004819ULL }, // Inst #5595 = VBLENDMPSZ256rmbk |
| 41562 | { 5594, 7, 1, 0, 1318, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71b2e8004819ULL }, // Inst #5594 = VBLENDMPSZ256rmb |
| 41563 | { 5593, 7, 1, 0, 1318, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b2e8004819ULL }, // Inst #5593 = VBLENDMPSZ256rm |
| 41564 | { 5592, 4, 1, 0, 1232, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6b2e8004829ULL }, // Inst #5592 = VBLENDMPSZ128rrkz |
| 41565 | { 5591, 4, 1, 0, 1232, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa2b2e8004829ULL }, // Inst #5591 = VBLENDMPSZ128rrk |
| 41566 | { 5590, 3, 1, 0, 1232, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b2e8004829ULL }, // Inst #5590 = VBLENDMPSZ128rr |
| 41567 | { 5589, 8, 1, 0, 1299, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b2e8004819ULL }, // Inst #5589 = VBLENDMPSZ128rmkz |
| 41568 | { 5588, 8, 1, 0, 1299, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b2e8004819ULL }, // Inst #5588 = VBLENDMPSZ128rmk |
| 41569 | { 5587, 8, 1, 0, 1299, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76b2e8004819ULL }, // Inst #5587 = VBLENDMPSZ128rmbkz |
| 41570 | { 5586, 8, 1, 0, 1299, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72b2e8004819ULL }, // Inst #5586 = VBLENDMPSZ128rmbk |
| 41571 | { 5585, 7, 1, 0, 1299, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70b2e8004819ULL }, // Inst #5585 = VBLENDMPSZ128rmb |
| 41572 | { 5584, 7, 1, 0, 1299, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b2e8004819ULL }, // Inst #5584 = VBLENDMPSZ128rm |
| 41573 | { 5583, 4, 1, 0, 358, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeeb2f0024829ULL }, // Inst #5583 = VBLENDMPDZrrkz |
| 41574 | { 5582, 4, 1, 0, 358, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeab2f0024829ULL }, // Inst #5582 = VBLENDMPDZrrk |
| 41575 | { 5581, 3, 1, 0, 358, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8b2f0024829ULL }, // Inst #5581 = VBLENDMPDZrr |
| 41576 | { 5580, 8, 1, 0, 1319, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb2f0024819ULL }, // Inst #5580 = VBLENDMPDZrmkz |
| 41577 | { 5579, 8, 1, 0, 1319, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeab2f0024819ULL }, // Inst #5579 = VBLENDMPDZrmk |
| 41578 | { 5578, 8, 1, 0, 1319, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eb2f0024819ULL }, // Inst #5578 = VBLENDMPDZrmbkz |
| 41579 | { 5577, 8, 1, 0, 1319, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9ab2f0024819ULL }, // Inst #5577 = VBLENDMPDZrmbk |
| 41580 | { 5576, 7, 1, 0, 1319, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98b2f0024819ULL }, // Inst #5576 = VBLENDMPDZrmb |
| 41581 | { 5575, 7, 1, 0, 1319, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8b2f0024819ULL }, // Inst #5575 = VBLENDMPDZrm |
| 41582 | { 5574, 4, 1, 0, 1233, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc7b2f0024829ULL }, // Inst #5574 = VBLENDMPDZ256rrkz |
| 41583 | { 5573, 4, 1, 0, 1233, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc3b2f0024829ULL }, // Inst #5573 = VBLENDMPDZ256rrk |
| 41584 | { 5572, 3, 1, 0, 1233, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1b2f0024829ULL }, // Inst #5572 = VBLENDMPDZ256rr |
| 41585 | { 5571, 8, 1, 0, 1318, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7b2f0024819ULL }, // Inst #5571 = VBLENDMPDZ256rmkz |
| 41586 | { 5570, 8, 1, 0, 1318, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3b2f0024819ULL }, // Inst #5570 = VBLENDMPDZ256rmk |
| 41587 | { 5569, 8, 1, 0, 1318, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97b2f0024819ULL }, // Inst #5569 = VBLENDMPDZ256rmbkz |
| 41588 | { 5568, 8, 1, 0, 1318, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93b2f0024819ULL }, // Inst #5568 = VBLENDMPDZ256rmbk |
| 41589 | { 5567, 7, 1, 0, 1318, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91b2f0024819ULL }, // Inst #5567 = VBLENDMPDZ256rmb |
| 41590 | { 5566, 7, 1, 0, 1318, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1b2f0024819ULL }, // Inst #5566 = VBLENDMPDZ256rm |
| 41591 | { 5565, 4, 1, 0, 1232, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6b2f0024829ULL }, // Inst #5565 = VBLENDMPDZ128rrkz |
| 41592 | { 5564, 4, 1, 0, 1232, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa2b2f0024829ULL }, // Inst #5564 = VBLENDMPDZ128rrk |
| 41593 | { 5563, 3, 1, 0, 1232, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0b2f0024829ULL }, // Inst #5563 = VBLENDMPDZ128rr |
| 41594 | { 5562, 8, 1, 0, 1299, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6b2f0024819ULL }, // Inst #5562 = VBLENDMPDZ128rmkz |
| 41595 | { 5561, 8, 1, 0, 1299, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2b2f0024819ULL }, // Inst #5561 = VBLENDMPDZ128rmk |
| 41596 | { 5560, 8, 1, 0, 1299, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96b2f0024819ULL }, // Inst #5560 = VBLENDMPDZ128rmbkz |
| 41597 | { 5559, 8, 1, 0, 1299, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92b2f0024819ULL }, // Inst #5559 = VBLENDMPDZ128rmbk |
| 41598 | { 5558, 7, 1, 0, 1299, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90b2f0024819ULL }, // Inst #5558 = VBLENDMPDZ128rmb |
| 41599 | { 5557, 7, 1, 0, 1299, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0b2f0024819ULL }, // Inst #5557 = VBLENDMPDZ128rm |
| 41600 | { 5556, 6, 1, 0, 354, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58a0004819ULL }, // Inst #5556 = VBCSTNESH2PSrm |
| 41601 | { 5555, 6, 1, 0, 353, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x158a0004819ULL }, // Inst #5555 = VBCSTNESH2PSYrm |
| 41602 | { 5554, 6, 1, 0, 354, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58a0005019ULL }, // Inst #5554 = VBCSTNEBF162PSrm |
| 41603 | { 5553, 6, 1, 0, 353, 0, 0, 2253, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x158a0005019ULL }, // Inst #5553 = VBCSTNEBF162PSYrm |
| 41604 | { 5552, 6, 0, 0, 8, 0, 1, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #5552 = VASTART_SAVE_XMM_REGS |
| 41605 | { 5551, 3, 1, 0, 44, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xaa28002029ULL }, // Inst #5551 = VANDPSrr |
| 41606 | { 5550, 7, 1, 0, 43, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa28002019ULL }, // Inst #5550 = VANDPSrm |
| 41607 | { 5549, 4, 1, 0, 352, 0, 0, 1963, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeaa68002029ULL }, // Inst #5549 = VANDPSZrrkz |
| 41608 | { 5548, 5, 1, 0, 352, 0, 0, 1958, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaaa68002029ULL }, // Inst #5548 = VANDPSZrrk |
| 41609 | { 5547, 3, 1, 0, 352, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8aa68002029ULL }, // Inst #5547 = VANDPSZrr |
| 41610 | { 5546, 8, 1, 0, 351, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeaa68002019ULL }, // Inst #5546 = VANDPSZrmkz |
| 41611 | { 5545, 9, 1, 0, 351, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaaa68002019ULL }, // Inst #5545 = VANDPSZrmk |
| 41612 | { 5544, 8, 1, 0, 351, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eaa68002019ULL }, // Inst #5544 = VANDPSZrmbkz |
| 41613 | { 5543, 9, 1, 0, 351, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aaa68002019ULL }, // Inst #5543 = VANDPSZrmbk |
| 41614 | { 5542, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78aa68002019ULL }, // Inst #5542 = VANDPSZrmb |
| 41615 | { 5541, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8aa68002019ULL }, // Inst #5541 = VANDPSZrm |
| 41616 | { 5540, 4, 1, 0, 350, 0, 0, 1935, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7aa68002029ULL }, // Inst #5540 = VANDPSZ256rrkz |
| 41617 | { 5539, 5, 1, 0, 350, 0, 0, 1930, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3aa68002029ULL }, // Inst #5539 = VANDPSZ256rrk |
| 41618 | { 5538, 3, 1, 0, 350, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1aa68002029ULL }, // Inst #5538 = VANDPSZ256rr |
| 41619 | { 5537, 8, 1, 0, 349, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7aa68002019ULL }, // Inst #5537 = VANDPSZ256rmkz |
| 41620 | { 5536, 9, 1, 0, 349, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3aa68002019ULL }, // Inst #5536 = VANDPSZ256rmk |
| 41621 | { 5535, 8, 1, 0, 349, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77aa68002019ULL }, // Inst #5535 = VANDPSZ256rmbkz |
| 41622 | { 5534, 9, 1, 0, 349, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73aa68002019ULL }, // Inst #5534 = VANDPSZ256rmbk |
| 41623 | { 5533, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71aa68002019ULL }, // Inst #5533 = VANDPSZ256rmb |
| 41624 | { 5532, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1aa68002019ULL }, // Inst #5532 = VANDPSZ256rm |
| 41625 | { 5531, 4, 1, 0, 44, 0, 0, 1909, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6aa68002029ULL }, // Inst #5531 = VANDPSZ128rrkz |
| 41626 | { 5530, 5, 1, 0, 44, 0, 0, 1904, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2aa68002029ULL }, // Inst #5530 = VANDPSZ128rrk |
| 41627 | { 5529, 3, 1, 0, 44, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0aa68002029ULL }, // Inst #5529 = VANDPSZ128rr |
| 41628 | { 5528, 8, 1, 0, 43, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6aa68002019ULL }, // Inst #5528 = VANDPSZ128rmkz |
| 41629 | { 5527, 9, 1, 0, 43, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2aa68002019ULL }, // Inst #5527 = VANDPSZ128rmk |
| 41630 | { 5526, 8, 1, 0, 43, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76aa68002019ULL }, // Inst #5526 = VANDPSZ128rmbkz |
| 41631 | { 5525, 9, 1, 0, 43, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72aa68002019ULL }, // Inst #5525 = VANDPSZ128rmbk |
| 41632 | { 5524, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70aa68002019ULL }, // Inst #5524 = VANDPSZ128rmb |
| 41633 | { 5523, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0aa68002019ULL }, // Inst #5523 = VANDPSZ128rm |
| 41634 | { 5522, 3, 1, 0, 350, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1aa28002029ULL }, // Inst #5522 = VANDPSYrr |
| 41635 | { 5521, 7, 1, 0, 349, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1aa28002019ULL }, // Inst #5521 = VANDPSYrm |
| 41636 | { 5520, 3, 1, 0, 44, 0, 0, 1873, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xaa30002829ULL }, // Inst #5520 = VANDPDrr |
| 41637 | { 5519, 7, 1, 0, 43, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaa30002819ULL }, // Inst #5519 = VANDPDrm |
| 41638 | { 5518, 4, 1, 0, 352, 0, 0, 1862, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeaa70022829ULL }, // Inst #5518 = VANDPDZrrkz |
| 41639 | { 5517, 5, 1, 0, 352, 0, 0, 1857, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaaa70022829ULL }, // Inst #5517 = VANDPDZrrk |
| 41640 | { 5516, 3, 1, 0, 352, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8aa70022829ULL }, // Inst #5516 = VANDPDZrr |
| 41641 | { 5515, 8, 1, 0, 351, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeaa70022819ULL }, // Inst #5515 = VANDPDZrmkz |
| 41642 | { 5514, 9, 1, 0, 351, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaaa70022819ULL }, // Inst #5514 = VANDPDZrmk |
| 41643 | { 5513, 8, 1, 0, 351, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eaa70022819ULL }, // Inst #5513 = VANDPDZrmbkz |
| 41644 | { 5512, 9, 1, 0, 351, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aaa70022819ULL }, // Inst #5512 = VANDPDZrmbk |
| 41645 | { 5511, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98aa70022819ULL }, // Inst #5511 = VANDPDZrmb |
| 41646 | { 5510, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8aa70022819ULL }, // Inst #5510 = VANDPDZrm |
| 41647 | { 5509, 4, 1, 0, 350, 0, 0, 1821, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7aa70022829ULL }, // Inst #5509 = VANDPDZ256rrkz |
| 41648 | { 5508, 5, 1, 0, 350, 0, 0, 1816, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3aa70022829ULL }, // Inst #5508 = VANDPDZ256rrk |
| 41649 | { 5507, 3, 1, 0, 350, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1aa70022829ULL }, // Inst #5507 = VANDPDZ256rr |
| 41650 | { 5506, 8, 1, 0, 349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7aa70022819ULL }, // Inst #5506 = VANDPDZ256rmkz |
| 41651 | { 5505, 9, 1, 0, 349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3aa70022819ULL }, // Inst #5505 = VANDPDZ256rmk |
| 41652 | { 5504, 8, 1, 0, 349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97aa70022819ULL }, // Inst #5504 = VANDPDZ256rmbkz |
| 41653 | { 5503, 9, 1, 0, 349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93aa70022819ULL }, // Inst #5503 = VANDPDZ256rmbk |
| 41654 | { 5502, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91aa70022819ULL }, // Inst #5502 = VANDPDZ256rmb |
| 41655 | { 5501, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1aa70022819ULL }, // Inst #5501 = VANDPDZ256rm |
| 41656 | { 5500, 4, 1, 0, 44, 0, 0, 1795, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6aa70022829ULL }, // Inst #5500 = VANDPDZ128rrkz |
| 41657 | { 5499, 5, 1, 0, 44, 0, 0, 1790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2aa70022829ULL }, // Inst #5499 = VANDPDZ128rrk |
| 41658 | { 5498, 3, 1, 0, 44, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0aa70022829ULL }, // Inst #5498 = VANDPDZ128rr |
| 41659 | { 5497, 8, 1, 0, 43, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6aa70022819ULL }, // Inst #5497 = VANDPDZ128rmkz |
| 41660 | { 5496, 9, 1, 0, 43, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2aa70022819ULL }, // Inst #5496 = VANDPDZ128rmk |
| 41661 | { 5495, 8, 1, 0, 43, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96aa70022819ULL }, // Inst #5495 = VANDPDZ128rmbkz |
| 41662 | { 5494, 9, 1, 0, 43, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92aa70022819ULL }, // Inst #5494 = VANDPDZ128rmbk |
| 41663 | { 5493, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90aa70022819ULL }, // Inst #5493 = VANDPDZ128rmb |
| 41664 | { 5492, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0aa70022819ULL }, // Inst #5492 = VANDPDZ128rm |
| 41665 | { 5491, 3, 1, 0, 350, 0, 0, 1770, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1aa30002829ULL }, // Inst #5491 = VANDPDYrr |
| 41666 | { 5490, 7, 1, 0, 349, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1aa30002819ULL }, // Inst #5490 = VANDPDYrm |
| 41667 | { 5489, 3, 1, 0, 1053, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xaaa8002029ULL }, // Inst #5489 = VANDNPSrr |
| 41668 | { 5488, 7, 1, 0, 43, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaaa8002019ULL }, // Inst #5488 = VANDNPSrm |
| 41669 | { 5487, 4, 1, 0, 352, 0, 0, 1963, X86ImpOpBase + 0, 0, 0xeeaae8002029ULL }, // Inst #5487 = VANDNPSZrrkz |
| 41670 | { 5486, 5, 1, 0, 352, 0, 0, 1958, X86ImpOpBase + 0, 0, 0xeaaae8002029ULL }, // Inst #5486 = VANDNPSZrrk |
| 41671 | { 5485, 3, 1, 0, 1148, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8aae8002029ULL }, // Inst #5485 = VANDNPSZrr |
| 41672 | { 5484, 8, 1, 0, 351, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeaae8002019ULL }, // Inst #5484 = VANDNPSZrmkz |
| 41673 | { 5483, 9, 1, 0, 351, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaaae8002019ULL }, // Inst #5483 = VANDNPSZrmk |
| 41674 | { 5482, 8, 1, 0, 351, 0, 0, 1939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7eaae8002019ULL }, // Inst #5482 = VANDNPSZrmbkz |
| 41675 | { 5481, 9, 1, 0, 351, 0, 0, 1611, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aaae8002019ULL }, // Inst #5481 = VANDNPSZrmbk |
| 41676 | { 5480, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78aae8002019ULL }, // Inst #5480 = VANDNPSZrmb |
| 41677 | { 5479, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8aae8002019ULL }, // Inst #5479 = VANDNPSZrm |
| 41678 | { 5478, 4, 1, 0, 350, 0, 0, 1935, X86ImpOpBase + 0, 0, 0xc7aae8002029ULL }, // Inst #5478 = VANDNPSZ256rrkz |
| 41679 | { 5477, 5, 1, 0, 350, 0, 0, 1930, X86ImpOpBase + 0, 0, 0xc3aae8002029ULL }, // Inst #5477 = VANDNPSZ256rrk |
| 41680 | { 5476, 3, 1, 0, 1147, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1aae8002029ULL }, // Inst #5476 = VANDNPSZ256rr |
| 41681 | { 5475, 8, 1, 0, 349, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7aae8002019ULL }, // Inst #5475 = VANDNPSZ256rmkz |
| 41682 | { 5474, 9, 1, 0, 349, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3aae8002019ULL }, // Inst #5474 = VANDNPSZ256rmk |
| 41683 | { 5473, 8, 1, 0, 349, 0, 0, 1922, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x77aae8002019ULL }, // Inst #5473 = VANDNPSZ256rmbkz |
| 41684 | { 5472, 9, 1, 0, 349, 0, 0, 1913, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x73aae8002019ULL }, // Inst #5472 = VANDNPSZ256rmbk |
| 41685 | { 5471, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x71aae8002019ULL }, // Inst #5471 = VANDNPSZ256rmb |
| 41686 | { 5470, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1aae8002019ULL }, // Inst #5470 = VANDNPSZ256rm |
| 41687 | { 5469, 4, 1, 0, 44, 0, 0, 1909, X86ImpOpBase + 0, 0, 0xa6aae8002029ULL }, // Inst #5469 = VANDNPSZ128rrkz |
| 41688 | { 5468, 5, 1, 0, 44, 0, 0, 1904, X86ImpOpBase + 0, 0, 0xa2aae8002029ULL }, // Inst #5468 = VANDNPSZ128rrk |
| 41689 | { 5467, 3, 1, 0, 1146, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0aae8002029ULL }, // Inst #5467 = VANDNPSZ128rr |
| 41690 | { 5466, 8, 1, 0, 43, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6aae8002019ULL }, // Inst #5466 = VANDNPSZ128rmkz |
| 41691 | { 5465, 9, 1, 0, 43, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2aae8002019ULL }, // Inst #5465 = VANDNPSZ128rmk |
| 41692 | { 5464, 8, 1, 0, 43, 0, 0, 1896, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x76aae8002019ULL }, // Inst #5464 = VANDNPSZ128rmbkz |
| 41693 | { 5463, 9, 1, 0, 43, 0, 0, 1887, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x72aae8002019ULL }, // Inst #5463 = VANDNPSZ128rmbk |
| 41694 | { 5462, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x70aae8002019ULL }, // Inst #5462 = VANDNPSZ128rmb |
| 41695 | { 5461, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0aae8002019ULL }, // Inst #5461 = VANDNPSZ128rm |
| 41696 | { 5460, 3, 1, 0, 1054, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1aaa8002029ULL }, // Inst #5460 = VANDNPSYrr |
| 41697 | { 5459, 7, 1, 0, 349, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1aaa8002019ULL }, // Inst #5459 = VANDNPSYrm |
| 41698 | { 5458, 3, 1, 0, 1053, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xaab0002829ULL }, // Inst #5458 = VANDNPDrr |
| 41699 | { 5457, 7, 1, 0, 43, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xaab0002819ULL }, // Inst #5457 = VANDNPDrm |
| 41700 | { 5456, 4, 1, 0, 352, 0, 0, 1862, X86ImpOpBase + 0, 0, 0xeeaaf0022829ULL }, // Inst #5456 = VANDNPDZrrkz |
| 41701 | { 5455, 5, 1, 0, 352, 0, 0, 1857, X86ImpOpBase + 0, 0, 0xeaaaf0022829ULL }, // Inst #5455 = VANDNPDZrrk |
| 41702 | { 5454, 3, 1, 0, 1148, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8aaf0022829ULL }, // Inst #5454 = VANDNPDZrr |
| 41703 | { 5453, 8, 1, 0, 351, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeaaf0022819ULL }, // Inst #5453 = VANDNPDZrmkz |
| 41704 | { 5452, 9, 1, 0, 351, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaaaf0022819ULL }, // Inst #5452 = VANDNPDZrmk |
| 41705 | { 5451, 8, 1, 0, 351, 0, 0, 1834, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9eaaf0022819ULL }, // Inst #5451 = VANDNPDZrmbkz |
| 41706 | { 5450, 9, 1, 0, 351, 0, 0, 1825, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9aaaf0022819ULL }, // Inst #5450 = VANDNPDZrmbk |
| 41707 | { 5449, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98aaf0022819ULL }, // Inst #5449 = VANDNPDZrmb |
| 41708 | { 5448, 7, 1, 0, 351, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8aaf0022819ULL }, // Inst #5448 = VANDNPDZrm |
| 41709 | { 5447, 4, 1, 0, 350, 0, 0, 1821, X86ImpOpBase + 0, 0, 0xc7aaf0022829ULL }, // Inst #5447 = VANDNPDZ256rrkz |
| 41710 | { 5446, 5, 1, 0, 350, 0, 0, 1816, X86ImpOpBase + 0, 0, 0xc3aaf0022829ULL }, // Inst #5446 = VANDNPDZ256rrk |
| 41711 | { 5445, 3, 1, 0, 1147, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1aaf0022829ULL }, // Inst #5445 = VANDNPDZ256rr |
| 41712 | { 5444, 8, 1, 0, 349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7aaf0022819ULL }, // Inst #5444 = VANDNPDZ256rmkz |
| 41713 | { 5443, 9, 1, 0, 349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3aaf0022819ULL }, // Inst #5443 = VANDNPDZ256rmk |
| 41714 | { 5442, 8, 1, 0, 349, 0, 0, 1808, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x97aaf0022819ULL }, // Inst #5442 = VANDNPDZ256rmbkz |
| 41715 | { 5441, 9, 1, 0, 349, 0, 0, 1799, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x93aaf0022819ULL }, // Inst #5441 = VANDNPDZ256rmbk |
| 41716 | { 5440, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x91aaf0022819ULL }, // Inst #5440 = VANDNPDZ256rmb |
| 41717 | { 5439, 7, 1, 0, 349, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1aaf0022819ULL }, // Inst #5439 = VANDNPDZ256rm |
| 41718 | { 5438, 4, 1, 0, 44, 0, 0, 1795, X86ImpOpBase + 0, 0, 0xa6aaf0022829ULL }, // Inst #5438 = VANDNPDZ128rrkz |
| 41719 | { 5437, 5, 1, 0, 44, 0, 0, 1790, X86ImpOpBase + 0, 0, 0xa2aaf0022829ULL }, // Inst #5437 = VANDNPDZ128rrk |
| 41720 | { 5436, 3, 1, 0, 1146, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0aaf0022829ULL }, // Inst #5436 = VANDNPDZ128rr |
| 41721 | { 5435, 8, 1, 0, 43, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6aaf0022819ULL }, // Inst #5435 = VANDNPDZ128rmkz |
| 41722 | { 5434, 9, 1, 0, 43, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2aaf0022819ULL }, // Inst #5434 = VANDNPDZ128rmk |
| 41723 | { 5433, 8, 1, 0, 43, 0, 0, 1782, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x96aaf0022819ULL }, // Inst #5433 = VANDNPDZ128rmbkz |
| 41724 | { 5432, 9, 1, 0, 43, 0, 0, 1773, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x92aaf0022819ULL }, // Inst #5432 = VANDNPDZ128rmbk |
| 41725 | { 5431, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x90aaf0022819ULL }, // Inst #5431 = VANDNPDZ128rmb |
| 41726 | { 5430, 7, 1, 0, 43, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0aaf0022819ULL }, // Inst #5430 = VANDNPDZ128rm |
| 41727 | { 5429, 3, 1, 0, 1054, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1aab0002829ULL }, // Inst #5429 = VANDNPDYrr |
| 41728 | { 5428, 7, 1, 0, 349, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1aab0002819ULL }, // Inst #5428 = VANDNPDYrm |
| 41729 | { 5427, 5, 1, 0, 1245, 0, 0, 2248, X86ImpOpBase + 0, 0, 0xee81f8066829ULL }, // Inst #5427 = VALIGNQZrrikz |
| 41730 | { 5426, 6, 1, 0, 1245, 0, 0, 2242, X86ImpOpBase + 0, 0, 0xea81f8066829ULL }, // Inst #5426 = VALIGNQZrrik |
| 41731 | { 5425, 4, 1, 0, 1064, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe881f8066829ULL }, // Inst #5425 = VALIGNQZrri |
| 41732 | { 5424, 9, 1, 0, 1348, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee81f8066819ULL }, // Inst #5424 = VALIGNQZrmikz |
| 41733 | { 5423, 10, 1, 0, 1348, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea81f8066819ULL }, // Inst #5423 = VALIGNQZrmik |
| 41734 | { 5422, 8, 1, 0, 1348, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe881f8066819ULL }, // Inst #5422 = VALIGNQZrmi |
| 41735 | { 5421, 9, 1, 0, 1348, 0, 0, 2233, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9e81f8066819ULL }, // Inst #5421 = VALIGNQZrmbikz |
| 41736 | { 5420, 10, 1, 0, 1348, 0, 0, 2223, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9a81f8066819ULL }, // Inst #5420 = VALIGNQZrmbik |
| 41737 | { 5419, 8, 1, 0, 1348, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9881f8066819ULL }, // Inst #5419 = VALIGNQZrmbi |
| 41738 | { 5418, 5, 1, 0, 1244, 0, 0, 2218, X86ImpOpBase + 0, 0, 0xc781f8066829ULL }, // Inst #5418 = VALIGNQZ256rrikz |
| 41739 | { 5417, 6, 1, 0, 1244, 0, 0, 2212, X86ImpOpBase + 0, 0, 0xc381f8066829ULL }, // Inst #5417 = VALIGNQZ256rrik |
| 41740 | { 5416, 4, 1, 0, 1066, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc181f8066829ULL }, // Inst #5416 = VALIGNQZ256rri |
| 41741 | { 5415, 9, 1, 0, 1347, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc781f8066819ULL }, // Inst #5415 = VALIGNQZ256rmikz |
| 41742 | { 5414, 10, 1, 0, 1347, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc381f8066819ULL }, // Inst #5414 = VALIGNQZ256rmik |
| 41743 | { 5413, 8, 1, 0, 1347, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc181f8066819ULL }, // Inst #5413 = VALIGNQZ256rmi |
| 41744 | { 5412, 9, 1, 0, 1347, 0, 0, 2203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9781f8066819ULL }, // Inst #5412 = VALIGNQZ256rmbikz |
| 41745 | { 5411, 10, 1, 0, 1347, 0, 0, 2193, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9381f8066819ULL }, // Inst #5411 = VALIGNQZ256rmbik |
| 41746 | { 5410, 8, 1, 0, 1347, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9181f8066819ULL }, // Inst #5410 = VALIGNQZ256rmbi |
| 41747 | { 5409, 5, 1, 0, 1243, 0, 0, 2188, X86ImpOpBase + 0, 0, 0xa681f8066829ULL }, // Inst #5409 = VALIGNQZ128rrikz |
| 41748 | { 5408, 6, 1, 0, 1243, 0, 0, 2182, X86ImpOpBase + 0, 0, 0xa281f8066829ULL }, // Inst #5408 = VALIGNQZ128rrik |
| 41749 | { 5407, 4, 1, 0, 1065, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa081f8066829ULL }, // Inst #5407 = VALIGNQZ128rri |
| 41750 | { 5406, 9, 1, 0, 1337, 0, 0, 2173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa681f8066819ULL }, // Inst #5406 = VALIGNQZ128rmikz |
| 41751 | { 5405, 10, 1, 0, 1337, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa281f8066819ULL }, // Inst #5405 = VALIGNQZ128rmik |
| 41752 | { 5404, 8, 1, 0, 1337, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa081f8066819ULL }, // Inst #5404 = VALIGNQZ128rmi |
| 41753 | { 5403, 9, 1, 0, 1337, 0, 0, 2173, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9681f8066819ULL }, // Inst #5403 = VALIGNQZ128rmbikz |
| 41754 | { 5402, 10, 1, 0, 1337, 0, 0, 2163, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9281f8066819ULL }, // Inst #5402 = VALIGNQZ128rmbik |
| 41755 | { 5401, 8, 1, 0, 1337, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x9081f8066819ULL }, // Inst #5401 = VALIGNQZ128rmbi |
| 41756 | { 5400, 5, 1, 0, 1245, 0, 0, 2158, X86ImpOpBase + 0, 0, 0xee81f8046829ULL }, // Inst #5400 = VALIGNDZrrikz |
| 41757 | { 5399, 6, 1, 0, 1245, 0, 0, 2152, X86ImpOpBase + 0, 0, 0xea81f8046829ULL }, // Inst #5399 = VALIGNDZrrik |
| 41758 | { 5398, 4, 1, 0, 1064, 0, 0, 931, X86ImpOpBase + 0, 0, 0xe881f8046829ULL }, // Inst #5398 = VALIGNDZrri |
| 41759 | { 5397, 9, 1, 0, 1348, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee81f8046819ULL }, // Inst #5397 = VALIGNDZrmikz |
| 41760 | { 5396, 10, 1, 0, 1348, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xea81f8046819ULL }, // Inst #5396 = VALIGNDZrmik |
| 41761 | { 5395, 8, 1, 0, 1348, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe881f8046819ULL }, // Inst #5395 = VALIGNDZrmi |
| 41762 | { 5394, 9, 1, 0, 1348, 0, 0, 2143, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e81f8046819ULL }, // Inst #5394 = VALIGNDZrmbikz |
| 41763 | { 5393, 10, 1, 0, 1348, 0, 0, 2133, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a81f8046819ULL }, // Inst #5393 = VALIGNDZrmbik |
| 41764 | { 5392, 8, 1, 0, 1348, 0, 0, 2125, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7881f8046819ULL }, // Inst #5392 = VALIGNDZrmbi |
| 41765 | { 5391, 5, 1, 0, 1244, 0, 0, 2120, X86ImpOpBase + 0, 0, 0xc781f8046829ULL }, // Inst #5391 = VALIGNDZ256rrikz |
| 41766 | { 5390, 6, 1, 0, 1244, 0, 0, 2114, X86ImpOpBase + 0, 0, 0xc381f8046829ULL }, // Inst #5390 = VALIGNDZ256rrik |
| 41767 | { 5389, 4, 1, 0, 1066, 0, 0, 927, X86ImpOpBase + 0, 0, 0xc181f8046829ULL }, // Inst #5389 = VALIGNDZ256rri |
| 41768 | { 5388, 9, 1, 0, 1347, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc781f8046819ULL }, // Inst #5388 = VALIGNDZ256rmikz |
| 41769 | { 5387, 10, 1, 0, 1347, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc381f8046819ULL }, // Inst #5387 = VALIGNDZ256rmik |
| 41770 | { 5386, 8, 1, 0, 1347, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc181f8046819ULL }, // Inst #5386 = VALIGNDZ256rmi |
| 41771 | { 5385, 9, 1, 0, 1347, 0, 0, 2105, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7781f8046819ULL }, // Inst #5385 = VALIGNDZ256rmbikz |
| 41772 | { 5384, 10, 1, 0, 1347, 0, 0, 2095, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7381f8046819ULL }, // Inst #5384 = VALIGNDZ256rmbik |
| 41773 | { 5383, 8, 1, 0, 1347, 0, 0, 2087, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7181f8046819ULL }, // Inst #5383 = VALIGNDZ256rmbi |
| 41774 | { 5382, 5, 1, 0, 1243, 0, 0, 2082, X86ImpOpBase + 0, 0, 0xa681f8046829ULL }, // Inst #5382 = VALIGNDZ128rrikz |
| 41775 | { 5381, 6, 1, 0, 1243, 0, 0, 2076, X86ImpOpBase + 0, 0, 0xa281f8046829ULL }, // Inst #5381 = VALIGNDZ128rrik |
| 41776 | { 5380, 4, 1, 0, 1065, 0, 0, 919, X86ImpOpBase + 0, 0, 0xa081f8046829ULL }, // Inst #5380 = VALIGNDZ128rri |
| 41777 | { 5379, 9, 1, 0, 1337, 0, 0, 2067, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa681f8046819ULL }, // Inst #5379 = VALIGNDZ128rmikz |
| 41778 | { 5378, 10, 1, 0, 1337, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa281f8046819ULL }, // Inst #5378 = VALIGNDZ128rmik |
| 41779 | { 5377, 8, 1, 0, 1337, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa081f8046819ULL }, // Inst #5377 = VALIGNDZ128rmi |
| 41780 | { 5376, 9, 1, 0, 1337, 0, 0, 2067, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7681f8046819ULL }, // Inst #5376 = VALIGNDZ128rmbikz |
| 41781 | { 5375, 10, 1, 0, 1337, 0, 0, 2057, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7281f8046819ULL }, // Inst #5375 = VALIGNDZ128rmbik |
| 41782 | { 5374, 8, 1, 0, 1337, 0, 0, 2049, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7081f8046819ULL }, // Inst #5374 = VALIGNDZ128rmbi |
| 41783 | { 5373, 3, 1, 0, 42, 0, 0, 566, X86ImpOpBase + 0, 0, 0x6fb8046829ULL }, // Inst #5373 = VAESKEYGENASSIST128rr |
| 41784 | { 5372, 7, 1, 0, 41, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6fb8046819ULL }, // Inst #5372 = VAESKEYGENASSIST128rm |
| 41785 | { 5371, 2, 1, 0, 40, 0, 0, 557, X86ImpOpBase + 0, 0, 0x6db8004829ULL }, // Inst #5371 = VAESIMCrr |
| 41786 | { 5370, 6, 1, 0, 39, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6db8004819ULL }, // Inst #5370 = VAESIMCrm |
| 41787 | { 5369, 3, 1, 0, 38, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xee38004829ULL }, // Inst #5369 = VAESENCrr |
| 41788 | { 5368, 7, 1, 0, 37, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xee38004819ULL }, // Inst #5368 = VAESENCrm |
| 41789 | { 5367, 3, 1, 0, 1919, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8ee78004829ULL }, // Inst #5367 = VAESENCZrr |
| 41790 | { 5366, 7, 1, 0, 1945, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ee78004819ULL }, // Inst #5366 = VAESENCZrm |
| 41791 | { 5365, 3, 1, 0, 38, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1ee78004829ULL }, // Inst #5365 = VAESENCZ256rr |
| 41792 | { 5364, 7, 1, 0, 37, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ee78004819ULL }, // Inst #5364 = VAESENCZ256rm |
| 41793 | { 5363, 3, 1, 0, 38, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ee78004829ULL }, // Inst #5363 = VAESENCZ128rr |
| 41794 | { 5362, 7, 1, 0, 37, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ee78004819ULL }, // Inst #5362 = VAESENCZ128rm |
| 41795 | { 5361, 3, 1, 0, 38, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1ee38004829ULL }, // Inst #5361 = VAESENCYrr |
| 41796 | { 5360, 7, 1, 0, 37, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ee38004819ULL }, // Inst #5360 = VAESENCYrm |
| 41797 | { 5359, 3, 1, 0, 38, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xeeb8004829ULL }, // Inst #5359 = VAESENCLASTrr |
| 41798 | { 5358, 7, 1, 0, 37, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeb8004819ULL }, // Inst #5358 = VAESENCLASTrm |
| 41799 | { 5357, 3, 1, 0, 1919, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8eef8004829ULL }, // Inst #5357 = VAESENCLASTZrr |
| 41800 | { 5356, 7, 1, 0, 1945, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8eef8004819ULL }, // Inst #5356 = VAESENCLASTZrm |
| 41801 | { 5355, 3, 1, 0, 38, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1eef8004829ULL }, // Inst #5355 = VAESENCLASTZ256rr |
| 41802 | { 5354, 7, 1, 0, 37, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1eef8004819ULL }, // Inst #5354 = VAESENCLASTZ256rm |
| 41803 | { 5353, 3, 1, 0, 38, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0eef8004829ULL }, // Inst #5353 = VAESENCLASTZ128rr |
| 41804 | { 5352, 7, 1, 0, 37, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0eef8004819ULL }, // Inst #5352 = VAESENCLASTZ128rm |
| 41805 | { 5351, 3, 1, 0, 38, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1eeb8004829ULL }, // Inst #5351 = VAESENCLASTYrr |
| 41806 | { 5350, 7, 1, 0, 37, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1eeb8004819ULL }, // Inst #5350 = VAESENCLASTYrm |
| 41807 | { 5349, 3, 1, 0, 38, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xef38004829ULL }, // Inst #5349 = VAESDECrr |
| 41808 | { 5348, 7, 1, 0, 37, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xef38004819ULL }, // Inst #5348 = VAESDECrm |
| 41809 | { 5347, 3, 1, 0, 1919, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8ef78004829ULL }, // Inst #5347 = VAESDECZrr |
| 41810 | { 5346, 7, 1, 0, 1945, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ef78004819ULL }, // Inst #5346 = VAESDECZrm |
| 41811 | { 5345, 3, 1, 0, 38, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1ef78004829ULL }, // Inst #5345 = VAESDECZ256rr |
| 41812 | { 5344, 7, 1, 0, 37, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ef78004819ULL }, // Inst #5344 = VAESDECZ256rm |
| 41813 | { 5343, 3, 1, 0, 38, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0ef78004829ULL }, // Inst #5343 = VAESDECZ128rr |
| 41814 | { 5342, 7, 1, 0, 37, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ef78004819ULL }, // Inst #5342 = VAESDECZ128rm |
| 41815 | { 5341, 3, 1, 0, 38, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1ef38004829ULL }, // Inst #5341 = VAESDECYrr |
| 41816 | { 5340, 7, 1, 0, 37, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1ef38004819ULL }, // Inst #5340 = VAESDECYrm |
| 41817 | { 5339, 3, 1, 0, 38, 0, 0, 1873, X86ImpOpBase + 0, 0, 0xefb8004829ULL }, // Inst #5339 = VAESDECLASTrr |
| 41818 | { 5338, 7, 1, 0, 37, 0, 0, 1866, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xefb8004819ULL }, // Inst #5338 = VAESDECLASTrm |
| 41819 | { 5337, 3, 1, 0, 1919, 0, 0, 1751, X86ImpOpBase + 0, 0, 0xe8eff8004829ULL }, // Inst #5337 = VAESDECLASTZrr |
| 41820 | { 5336, 7, 1, 0, 1945, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8eff8004819ULL }, // Inst #5336 = VAESDECLASTZrm |
| 41821 | { 5335, 3, 1, 0, 38, 0, 0, 1715, X86ImpOpBase + 0, 0, 0xc1eff8004829ULL }, // Inst #5335 = VAESDECLASTZ256rr |
| 41822 | { 5334, 7, 1, 0, 37, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1eff8004819ULL }, // Inst #5334 = VAESDECLASTZ256rm |
| 41823 | { 5333, 3, 1, 0, 38, 0, 0, 1679, X86ImpOpBase + 0, 0, 0xa0eff8004829ULL }, // Inst #5333 = VAESDECLASTZ128rr |
| 41824 | { 5332, 7, 1, 0, 37, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0eff8004819ULL }, // Inst #5332 = VAESDECLASTZ128rm |
| 41825 | { 5331, 3, 1, 0, 38, 0, 0, 1770, X86ImpOpBase + 0, 0, 0x1efb8004829ULL }, // Inst #5331 = VAESDECLASTYrr |
| 41826 | { 5330, 7, 1, 0, 37, 0, 0, 1763, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1efb8004819ULL }, // Inst #5330 = VAESDECLASTYrm |
| 41827 | { 5329, 3, 1, 0, 1697, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe828003829ULL }, // Inst #5329 = VADDSUBPSrr |
| 41828 | { 5328, 7, 1, 0, 1696, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe828003819ULL }, // Inst #5328 = VADDSUBPSrm |
| 41829 | { 5327, 3, 1, 0, 1704, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1e828003829ULL }, // Inst #5327 = VADDSUBPSYrr |
| 41830 | { 5326, 7, 1, 0, 1937, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1e828003819ULL }, // Inst #5326 = VADDSUBPSYrm |
| 41831 | { 5325, 3, 1, 0, 28, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xe830002829ULL }, // Inst #5325 = VADDSUBPDrr |
| 41832 | { 5324, 7, 1, 0, 27, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe830002819ULL }, // Inst #5324 = VADDSUBPDrm |
| 41833 | { 5323, 3, 1, 0, 342, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1e830002829ULL }, // Inst #5323 = VADDSUBPDYrr |
| 41834 | { 5322, 7, 1, 0, 341, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1e830002819ULL }, // Inst #5322 = VADDSUBPDYrm |
| 41835 | { 5321, 3, 1, 0, 1461, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xac28003029ULL }, // Inst #5321 = VADDSSrr_Int |
| 41836 | { 5320, 3, 1, 0, 1461, 1, 0, 2046, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xac28003029ULL }, // Inst #5320 = VADDSSrr |
| 41837 | { 5319, 7, 1, 0, 34, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac28003019ULL }, // Inst #5319 = VADDSSrm_Int |
| 41838 | { 5318, 7, 1, 0, 34, 1, 0, 2039, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac28003019ULL }, // Inst #5318 = VADDSSrm |
| 41839 | { 5317, 4, 1, 0, 1897, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x66ac68003029ULL }, // Inst #5317 = VADDSSZrrkz_Int |
| 41840 | { 5316, 5, 1, 0, 35, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x62ac68003029ULL }, // Inst #5316 = VADDSSZrrk_Int |
| 41841 | { 5315, 5, 1, 0, 1897, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x176ac68003029ULL }, // Inst #5315 = VADDSSZrrbkz_Int |
| 41842 | { 5314, 6, 1, 0, 35, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x172ac68003029ULL }, // Inst #5314 = VADDSSZrrbk_Int |
| 41843 | { 5313, 4, 1, 0, 35, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x170ac68003029ULL }, // Inst #5313 = VADDSSZrrb_Int |
| 41844 | { 5312, 3, 1, 0, 35, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ac68003029ULL }, // Inst #5312 = VADDSSZrr_Int |
| 41845 | { 5311, 3, 1, 0, 35, 1, 0, 2036, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60ac68003029ULL }, // Inst #5311 = VADDSSZrr |
| 41846 | { 5310, 8, 1, 0, 34, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66ac68003019ULL }, // Inst #5310 = VADDSSZrmkz_Int |
| 41847 | { 5309, 9, 1, 0, 34, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62ac68003019ULL }, // Inst #5309 = VADDSSZrmk_Int |
| 41848 | { 5308, 7, 1, 0, 34, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ac68003019ULL }, // Inst #5308 = VADDSSZrm_Int |
| 41849 | { 5307, 7, 1, 0, 34, 1, 0, 2029, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ac68003019ULL }, // Inst #5307 = VADDSSZrm |
| 41850 | { 5306, 4, 1, 0, 1904, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x46ac68013029ULL }, // Inst #5306 = VADDSHZrrkz_Int |
| 41851 | { 5305, 5, 1, 0, 1904, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x42ac68013029ULL }, // Inst #5305 = VADDSHZrrk_Int |
| 41852 | { 5304, 5, 1, 0, 1904, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x156ac68013029ULL }, // Inst #5304 = VADDSHZrrbkz_Int |
| 41853 | { 5303, 6, 1, 0, 1904, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x152ac68013029ULL }, // Inst #5303 = VADDSHZrrbk_Int |
| 41854 | { 5302, 4, 1, 0, 1775, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x150ac68013029ULL }, // Inst #5302 = VADDSHZrrb_Int |
| 41855 | { 5301, 3, 1, 0, 1775, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ac68013029ULL }, // Inst #5301 = VADDSHZrr_Int |
| 41856 | { 5300, 3, 1, 0, 1775, 1, 0, 2026, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40ac68013029ULL }, // Inst #5300 = VADDSHZrr |
| 41857 | { 5299, 8, 1, 0, 1764, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46ac68013019ULL }, // Inst #5299 = VADDSHZrmkz_Int |
| 41858 | { 5298, 9, 1, 0, 1764, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42ac68013019ULL }, // Inst #5298 = VADDSHZrmk_Int |
| 41859 | { 5297, 7, 1, 0, 1764, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ac68013019ULL }, // Inst #5297 = VADDSHZrm_Int |
| 41860 | { 5296, 7, 1, 0, 1764, 1, 0, 2019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ac68013019ULL }, // Inst #5296 = VADDSHZrm |
| 41861 | { 5295, 3, 1, 0, 33, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0xac30003829ULL }, // Inst #5295 = VADDSDrr_Int |
| 41862 | { 5294, 3, 1, 0, 33, 1, 0, 2016, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xac30003829ULL }, // Inst #5294 = VADDSDrr |
| 41863 | { 5293, 7, 1, 0, 32, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac30003819ULL }, // Inst #5293 = VADDSDrm_Int |
| 41864 | { 5292, 7, 1, 0, 32, 1, 0, 2009, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac30003819ULL }, // Inst #5292 = VADDSDrm |
| 41865 | { 5291, 4, 1, 0, 1896, 1, 0, 2005, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x86ac70023829ULL }, // Inst #5291 = VADDSDZrrkz_Int |
| 41866 | { 5290, 5, 1, 0, 33, 1, 0, 2000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x82ac70023829ULL }, // Inst #5290 = VADDSDZrrk_Int |
| 41867 | { 5289, 5, 1, 0, 1896, 1, 0, 1995, X86ImpOpBase + 78, 0, 0x196ac70023829ULL }, // Inst #5289 = VADDSDZrrbkz_Int |
| 41868 | { 5288, 6, 1, 0, 33, 1, 0, 1989, X86ImpOpBase + 78, 0, 0x192ac70023829ULL }, // Inst #5288 = VADDSDZrrbk_Int |
| 41869 | { 5287, 4, 1, 0, 33, 1, 0, 1985, X86ImpOpBase + 78, 0, 0x190ac70023829ULL }, // Inst #5287 = VADDSDZrrb_Int |
| 41870 | { 5286, 3, 1, 0, 33, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ac70023829ULL }, // Inst #5286 = VADDSDZrr_Int |
| 41871 | { 5285, 3, 1, 0, 33, 1, 0, 1982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ac70023829ULL }, // Inst #5285 = VADDSDZrr |
| 41872 | { 5284, 8, 1, 0, 32, 1, 0, 1974, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86ac70023819ULL }, // Inst #5284 = VADDSDZrmkz_Int |
| 41873 | { 5283, 9, 1, 0, 32, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82ac70023819ULL }, // Inst #5283 = VADDSDZrmk_Int |
| 41874 | { 5282, 7, 1, 0, 32, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ac70023819ULL }, // Inst #5282 = VADDSDZrm_Int |
| 41875 | { 5281, 7, 1, 0, 32, 1, 0, 1967, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ac70023819ULL }, // Inst #5281 = VADDSDZrm |
| 41876 | { 5280, 3, 1, 0, 1697, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xac28002029ULL }, // Inst #5280 = VADDPSrr |
| 41877 | { 5279, 7, 1, 0, 1696, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac28002019ULL }, // Inst #5279 = VADDPSrm |
| 41878 | { 5278, 4, 1, 0, 1943, 1, 0, 1963, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeac68002029ULL }, // Inst #5278 = VADDPSZrrkz |
| 41879 | { 5277, 5, 1, 0, 1943, 1, 0, 1958, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaac68002029ULL }, // Inst #5277 = VADDPSZrrk |
| 41880 | { 5276, 5, 1, 0, 1943, 1, 0, 1953, X86ImpOpBase + 78, 0, 0x17eac68002029ULL }, // Inst #5276 = VADDPSZrrbkz |
| 41881 | { 5275, 6, 1, 0, 1943, 1, 0, 1947, X86ImpOpBase + 78, 0, 0x17aac68002029ULL }, // Inst #5275 = VADDPSZrrbk |
| 41882 | { 5274, 4, 1, 0, 1899, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x178ac68002029ULL }, // Inst #5274 = VADDPSZrrb |
| 41883 | { 5273, 3, 1, 0, 1899, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ac68002029ULL }, // Inst #5273 = VADDPSZrr |
| 41884 | { 5272, 8, 1, 0, 1941, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeac68002019ULL }, // Inst #5272 = VADDPSZrmkz |
| 41885 | { 5271, 9, 1, 0, 1941, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaac68002019ULL }, // Inst #5271 = VADDPSZrmk |
| 41886 | { 5270, 8, 1, 0, 1941, 1, 0, 1939, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eac68002019ULL }, // Inst #5270 = VADDPSZrmbkz |
| 41887 | { 5269, 9, 1, 0, 1941, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aac68002019ULL }, // Inst #5269 = VADDPSZrmbk |
| 41888 | { 5268, 7, 1, 0, 1941, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78ac68002019ULL }, // Inst #5268 = VADDPSZrmb |
| 41889 | { 5267, 7, 1, 0, 1941, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ac68002019ULL }, // Inst #5267 = VADDPSZrm |
| 41890 | { 5266, 4, 1, 0, 1895, 1, 0, 1935, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ac68002029ULL }, // Inst #5266 = VADDPSZ256rrkz |
| 41891 | { 5265, 5, 1, 0, 1698, 1, 0, 1930, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ac68002029ULL }, // Inst #5265 = VADDPSZ256rrk |
| 41892 | { 5264, 3, 1, 0, 1698, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ac68002029ULL }, // Inst #5264 = VADDPSZ256rr |
| 41893 | { 5263, 8, 1, 0, 1934, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ac68002019ULL }, // Inst #5263 = VADDPSZ256rmkz |
| 41894 | { 5262, 9, 1, 0, 1934, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ac68002019ULL }, // Inst #5262 = VADDPSZ256rmk |
| 41895 | { 5261, 8, 1, 0, 1934, 1, 0, 1922, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77ac68002019ULL }, // Inst #5261 = VADDPSZ256rmbkz |
| 41896 | { 5260, 9, 1, 0, 1934, 1, 0, 1913, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73ac68002019ULL }, // Inst #5260 = VADDPSZ256rmbk |
| 41897 | { 5259, 7, 1, 0, 1934, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71ac68002019ULL }, // Inst #5259 = VADDPSZ256rmb |
| 41898 | { 5258, 7, 1, 0, 1934, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ac68002019ULL }, // Inst #5258 = VADDPSZ256rm |
| 41899 | { 5257, 4, 1, 0, 1894, 1, 0, 1909, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ac68002029ULL }, // Inst #5257 = VADDPSZ128rrkz |
| 41900 | { 5256, 5, 1, 0, 1697, 1, 0, 1904, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ac68002029ULL }, // Inst #5256 = VADDPSZ128rrk |
| 41901 | { 5255, 3, 1, 0, 1697, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ac68002029ULL }, // Inst #5255 = VADDPSZ128rr |
| 41902 | { 5254, 8, 1, 0, 1696, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ac68002019ULL }, // Inst #5254 = VADDPSZ128rmkz |
| 41903 | { 5253, 9, 1, 0, 1696, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ac68002019ULL }, // Inst #5253 = VADDPSZ128rmk |
| 41904 | { 5252, 8, 1, 0, 1696, 1, 0, 1896, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76ac68002019ULL }, // Inst #5252 = VADDPSZ128rmbkz |
| 41905 | { 5251, 9, 1, 0, 1696, 1, 0, 1887, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72ac68002019ULL }, // Inst #5251 = VADDPSZ128rmbk |
| 41906 | { 5250, 7, 1, 0, 1696, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70ac68002019ULL }, // Inst #5250 = VADDPSZ128rmb |
| 41907 | { 5249, 7, 1, 0, 1696, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ac68002019ULL }, // Inst #5249 = VADDPSZ128rm |
| 41908 | { 5248, 3, 1, 0, 1698, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ac28002029ULL }, // Inst #5248 = VADDPSYrr |
| 41909 | { 5247, 7, 1, 0, 1934, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ac28002019ULL }, // Inst #5247 = VADDPSYrm |
| 41910 | { 5246, 4, 1, 0, 1926, 1, 0, 1759, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeac68012029ULL }, // Inst #5246 = VADDPHZrrkz |
| 41911 | { 5245, 5, 1, 0, 1926, 1, 0, 1754, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaac68012029ULL }, // Inst #5245 = VADDPHZrrk |
| 41912 | { 5244, 5, 1, 0, 1926, 1, 0, 1882, X86ImpOpBase + 78, 0, 0x15eac68012029ULL }, // Inst #5244 = VADDPHZrrbkz |
| 41913 | { 5243, 6, 1, 0, 1926, 1, 0, 1876, X86ImpOpBase + 78, 0, 0x15aac68012029ULL }, // Inst #5243 = VADDPHZrrbk |
| 41914 | { 5242, 4, 1, 0, 1918, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x158ac68012029ULL }, // Inst #5242 = VADDPHZrrb |
| 41915 | { 5241, 3, 1, 0, 1918, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ac68012029ULL }, // Inst #5241 = VADDPHZrr |
| 41916 | { 5240, 8, 1, 0, 339, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeac68012019ULL }, // Inst #5240 = VADDPHZrmkz |
| 41917 | { 5239, 9, 1, 0, 339, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaac68012019ULL }, // Inst #5239 = VADDPHZrmk |
| 41918 | { 5238, 8, 1, 0, 339, 1, 0, 1743, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eac68012019ULL }, // Inst #5238 = VADDPHZrmbkz |
| 41919 | { 5237, 9, 1, 0, 339, 1, 0, 1734, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aac68012019ULL }, // Inst #5237 = VADDPHZrmbk |
| 41920 | { 5236, 7, 1, 0, 339, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58ac68012019ULL }, // Inst #5236 = VADDPHZrmb |
| 41921 | { 5235, 7, 1, 0, 339, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ac68012019ULL }, // Inst #5235 = VADDPHZrm |
| 41922 | { 5234, 4, 1, 0, 1903, 1, 0, 1723, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ac68012029ULL }, // Inst #5234 = VADDPHZ256rrkz |
| 41923 | { 5233, 5, 1, 0, 1903, 1, 0, 1718, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ac68012029ULL }, // Inst #5233 = VADDPHZ256rrk |
| 41924 | { 5232, 3, 1, 0, 1774, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ac68012029ULL }, // Inst #5232 = VADDPHZ256rr |
| 41925 | { 5231, 8, 1, 0, 337, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ac68012019ULL }, // Inst #5231 = VADDPHZ256rmkz |
| 41926 | { 5230, 9, 1, 0, 337, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ac68012019ULL }, // Inst #5230 = VADDPHZ256rmk |
| 41927 | { 5229, 8, 1, 0, 337, 1, 0, 1707, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57ac68012019ULL }, // Inst #5229 = VADDPHZ256rmbkz |
| 41928 | { 5228, 9, 1, 0, 337, 1, 0, 1698, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53ac68012019ULL }, // Inst #5228 = VADDPHZ256rmbk |
| 41929 | { 5227, 7, 1, 0, 337, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51ac68012019ULL }, // Inst #5227 = VADDPHZ256rmb |
| 41930 | { 5226, 7, 1, 0, 337, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ac68012019ULL }, // Inst #5226 = VADDPHZ256rm |
| 41931 | { 5225, 4, 1, 0, 1902, 1, 0, 1687, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ac68012029ULL }, // Inst #5225 = VADDPHZ128rrkz |
| 41932 | { 5224, 5, 1, 0, 1902, 1, 0, 1682, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ac68012029ULL }, // Inst #5224 = VADDPHZ128rrk |
| 41933 | { 5223, 3, 1, 0, 1773, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ac68012029ULL }, // Inst #5223 = VADDPHZ128rr |
| 41934 | { 5222, 8, 1, 0, 1757, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ac68012019ULL }, // Inst #5222 = VADDPHZ128rmkz |
| 41935 | { 5221, 9, 1, 0, 1757, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ac68012019ULL }, // Inst #5221 = VADDPHZ128rmk |
| 41936 | { 5220, 8, 1, 0, 1757, 1, 0, 1671, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56ac68012019ULL }, // Inst #5220 = VADDPHZ128rmbkz |
| 41937 | { 5219, 9, 1, 0, 1757, 1, 0, 1662, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52ac68012019ULL }, // Inst #5219 = VADDPHZ128rmbk |
| 41938 | { 5218, 7, 1, 0, 1757, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50ac68012019ULL }, // Inst #5218 = VADDPHZ128rmb |
| 41939 | { 5217, 7, 1, 0, 1757, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ac68012019ULL }, // Inst #5217 = VADDPHZ128rm |
| 41940 | { 5216, 3, 1, 0, 28, 1, 0, 1873, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xac30002829ULL }, // Inst #5216 = VADDPDrr |
| 41941 | { 5215, 7, 1, 0, 27, 1, 0, 1866, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac30002819ULL }, // Inst #5215 = VADDPDrm |
| 41942 | { 5214, 4, 1, 0, 344, 1, 0, 1862, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeac70022829ULL }, // Inst #5214 = VADDPDZrrkz |
| 41943 | { 5213, 5, 1, 0, 344, 1, 0, 1857, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaac70022829ULL }, // Inst #5213 = VADDPDZrrk |
| 41944 | { 5212, 5, 1, 0, 344, 1, 0, 1852, X86ImpOpBase + 78, 0, 0x19eac70022829ULL }, // Inst #5212 = VADDPDZrrbkz |
| 41945 | { 5211, 6, 1, 0, 344, 1, 0, 1846, X86ImpOpBase + 78, 0, 0x19aac70022829ULL }, // Inst #5211 = VADDPDZrrbk |
| 41946 | { 5210, 4, 1, 0, 1898, 1, 0, 1842, X86ImpOpBase + 78, 0, 0x198ac70022829ULL }, // Inst #5210 = VADDPDZrrb |
| 41947 | { 5209, 3, 1, 0, 1898, 1, 0, 1751, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ac70022829ULL }, // Inst #5209 = VADDPDZrr |
| 41948 | { 5208, 8, 1, 0, 343, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeac70022819ULL }, // Inst #5208 = VADDPDZrmkz |
| 41949 | { 5207, 9, 1, 0, 343, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaac70022819ULL }, // Inst #5207 = VADDPDZrmk |
| 41950 | { 5206, 8, 1, 0, 343, 1, 0, 1834, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eac70022819ULL }, // Inst #5206 = VADDPDZrmbkz |
| 41951 | { 5205, 9, 1, 0, 343, 1, 0, 1825, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aac70022819ULL }, // Inst #5205 = VADDPDZrmbk |
| 41952 | { 5204, 7, 1, 0, 343, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98ac70022819ULL }, // Inst #5204 = VADDPDZrmb |
| 41953 | { 5203, 7, 1, 0, 343, 1, 0, 1727, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ac70022819ULL }, // Inst #5203 = VADDPDZrm |
| 41954 | { 5202, 4, 1, 0, 1893, 1, 0, 1821, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ac70022829ULL }, // Inst #5202 = VADDPDZ256rrkz |
| 41955 | { 5201, 5, 1, 0, 342, 1, 0, 1816, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ac70022829ULL }, // Inst #5201 = VADDPDZ256rrk |
| 41956 | { 5200, 3, 1, 0, 342, 1, 0, 1715, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ac70022829ULL }, // Inst #5200 = VADDPDZ256rr |
| 41957 | { 5199, 8, 1, 0, 341, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ac70022819ULL }, // Inst #5199 = VADDPDZ256rmkz |
| 41958 | { 5198, 9, 1, 0, 341, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ac70022819ULL }, // Inst #5198 = VADDPDZ256rmk |
| 41959 | { 5197, 8, 1, 0, 341, 1, 0, 1808, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97ac70022819ULL }, // Inst #5197 = VADDPDZ256rmbkz |
| 41960 | { 5196, 9, 1, 0, 341, 1, 0, 1799, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93ac70022819ULL }, // Inst #5196 = VADDPDZ256rmbk |
| 41961 | { 5195, 7, 1, 0, 341, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91ac70022819ULL }, // Inst #5195 = VADDPDZ256rmb |
| 41962 | { 5194, 7, 1, 0, 341, 1, 0, 1691, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ac70022819ULL }, // Inst #5194 = VADDPDZ256rm |
| 41963 | { 5193, 4, 1, 0, 1892, 1, 0, 1795, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ac70022829ULL }, // Inst #5193 = VADDPDZ128rrkz |
| 41964 | { 5192, 5, 1, 0, 28, 1, 0, 1790, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ac70022829ULL }, // Inst #5192 = VADDPDZ128rrk |
| 41965 | { 5191, 3, 1, 0, 28, 1, 0, 1679, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ac70022829ULL }, // Inst #5191 = VADDPDZ128rr |
| 41966 | { 5190, 8, 1, 0, 27, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ac70022819ULL }, // Inst #5190 = VADDPDZ128rmkz |
| 41967 | { 5189, 9, 1, 0, 27, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ac70022819ULL }, // Inst #5189 = VADDPDZ128rmk |
| 41968 | { 5188, 8, 1, 0, 27, 1, 0, 1782, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96ac70022819ULL }, // Inst #5188 = VADDPDZ128rmbkz |
| 41969 | { 5187, 9, 1, 0, 27, 1, 0, 1773, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92ac70022819ULL }, // Inst #5187 = VADDPDZ128rmbk |
| 41970 | { 5186, 7, 1, 0, 27, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90ac70022819ULL }, // Inst #5186 = VADDPDZ128rmb |
| 41971 | { 5185, 7, 1, 0, 27, 1, 0, 1655, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ac70022819ULL }, // Inst #5185 = VADDPDZ128rm |
| 41972 | { 5184, 3, 1, 0, 342, 1, 0, 1770, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ac30002829ULL }, // Inst #5184 = VADDPDYrr |
| 41973 | { 5183, 7, 1, 0, 341, 1, 0, 1763, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ac30002819ULL }, // Inst #5183 = VADDPDYrm |
| 41974 | { 5182, 4, 1, 0, 340, 0, 0, 1759, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeeac68012829ULL }, // Inst #5182 = VADDBF16Zrrkz |
| 41975 | { 5181, 5, 1, 0, 340, 0, 0, 1754, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xeaac68012829ULL }, // Inst #5181 = VADDBF16Zrrk |
| 41976 | { 5180, 3, 1, 0, 340, 0, 0, 1751, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xe8ac68012829ULL }, // Inst #5180 = VADDBF16Zrr |
| 41977 | { 5179, 8, 1, 0, 339, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeeac68012819ULL }, // Inst #5179 = VADDBF16Zrmkz |
| 41978 | { 5178, 9, 1, 0, 339, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xeaac68012819ULL }, // Inst #5178 = VADDBF16Zrmk |
| 41979 | { 5177, 8, 1, 0, 339, 0, 0, 1743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5eac68012819ULL }, // Inst #5177 = VADDBF16Zrmbkz |
| 41980 | { 5176, 9, 1, 0, 339, 0, 0, 1734, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5aac68012819ULL }, // Inst #5176 = VADDBF16Zrmbk |
| 41981 | { 5175, 7, 1, 0, 339, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x58ac68012819ULL }, // Inst #5175 = VADDBF16Zrmb |
| 41982 | { 5174, 7, 1, 0, 339, 0, 0, 1727, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8ac68012819ULL }, // Inst #5174 = VADDBF16Zrm |
| 41983 | { 5173, 4, 1, 0, 338, 0, 0, 1723, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc7ac68012829ULL }, // Inst #5173 = VADDBF16Z256rrkz |
| 41984 | { 5172, 5, 1, 0, 338, 0, 0, 1718, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc3ac68012829ULL }, // Inst #5172 = VADDBF16Z256rrk |
| 41985 | { 5171, 3, 1, 0, 338, 0, 0, 1715, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc1ac68012829ULL }, // Inst #5171 = VADDBF16Z256rr |
| 41986 | { 5170, 8, 1, 0, 337, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc7ac68012819ULL }, // Inst #5170 = VADDBF16Z256rmkz |
| 41987 | { 5169, 9, 1, 0, 337, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc3ac68012819ULL }, // Inst #5169 = VADDBF16Z256rmk |
| 41988 | { 5168, 8, 1, 0, 337, 0, 0, 1707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x57ac68012819ULL }, // Inst #5168 = VADDBF16Z256rmbkz |
| 41989 | { 5167, 9, 1, 0, 337, 0, 0, 1698, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x53ac68012819ULL }, // Inst #5167 = VADDBF16Z256rmbk |
| 41990 | { 5166, 7, 1, 0, 337, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x51ac68012819ULL }, // Inst #5166 = VADDBF16Z256rmb |
| 41991 | { 5165, 7, 1, 0, 337, 0, 0, 1691, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc1ac68012819ULL }, // Inst #5165 = VADDBF16Z256rm |
| 41992 | { 5164, 4, 1, 0, 30, 0, 0, 1687, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa6ac68012829ULL }, // Inst #5164 = VADDBF16Z128rrkz |
| 41993 | { 5163, 5, 1, 0, 30, 0, 0, 1682, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa2ac68012829ULL }, // Inst #5163 = VADDBF16Z128rrk |
| 41994 | { 5162, 3, 1, 0, 30, 0, 0, 1679, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa0ac68012829ULL }, // Inst #5162 = VADDBF16Z128rr |
| 41995 | { 5161, 8, 1, 0, 29, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa6ac68012819ULL }, // Inst #5161 = VADDBF16Z128rmkz |
| 41996 | { 5160, 9, 1, 0, 29, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa2ac68012819ULL }, // Inst #5160 = VADDBF16Z128rmk |
| 41997 | { 5159, 8, 1, 0, 29, 0, 0, 1671, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x56ac68012819ULL }, // Inst #5159 = VADDBF16Z128rmbkz |
| 41998 | { 5158, 9, 1, 0, 29, 0, 0, 1662, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x52ac68012819ULL }, // Inst #5158 = VADDBF16Z128rmbk |
| 41999 | { 5157, 7, 1, 0, 29, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x50ac68012819ULL }, // Inst #5157 = VADDBF16Z128rmb |
| 42000 | { 5156, 7, 1, 0, 29, 0, 0, 1655, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa0ac68012819ULL }, // Inst #5156 = VADDBF16Z128rm |
| 42001 | { 5155, 9, 1, 0, 8, 0, 1, 1646, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #5155 = VAARG_X32 |
| 42002 | { 5154, 9, 1, 0, 8, 0, 1, 1637, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #5154 = VAARG_64 |
| 42003 | { 5153, 9, 1, 0, 336, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6d5e8005819ULL }, // Inst #5153 = V4FNMADDSSrmkz |
| 42004 | { 5152, 9, 1, 0, 336, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d5e8005819ULL }, // Inst #5152 = V4FNMADDSSrmk |
| 42005 | { 5151, 8, 1, 0, 336, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0d5e8005819ULL }, // Inst #5151 = V4FNMADDSSrm |
| 42006 | { 5150, 9, 1, 0, 335, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaed568005819ULL }, // Inst #5150 = V4FNMADDPSrmkz |
| 42007 | { 5149, 9, 1, 0, 335, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaad568005819ULL }, // Inst #5149 = V4FNMADDPSrmk |
| 42008 | { 5148, 8, 1, 0, 335, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8d568005819ULL }, // Inst #5148 = V4FNMADDPSrm |
| 42009 | { 5147, 9, 1, 0, 336, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6cde8005819ULL }, // Inst #5147 = V4FMADDSSrmkz |
| 42010 | { 5146, 9, 1, 0, 336, 1, 0, 1628, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cde8005819ULL }, // Inst #5146 = V4FMADDSSrmk |
| 42011 | { 5145, 8, 1, 0, 336, 1, 0, 1620, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0cde8005819ULL }, // Inst #5145 = V4FMADDSSrm |
| 42012 | { 5144, 9, 1, 0, 335, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaecd68005819ULL }, // Inst #5144 = V4FMADDPSrmkz |
| 42013 | { 5143, 9, 1, 0, 335, 1, 0, 1611, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaacd68005819ULL }, // Inst #5143 = V4FMADDPSrmk |
| 42014 | { 5142, 8, 1, 0, 335, 1, 0, 1603, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8cd68005819ULL }, // Inst #5142 = V4FMADDPSrm |
| 42015 | { 5141, 2, 0, 0, 8, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c60011029ULL }, // Inst #5141 = UWRMSRrr_EVEX |
| 42016 | { 5140, 2, 0, 0, 8, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c00005029ULL }, // Inst #5140 = UWRMSRrr |
| 42017 | { 5139, 2, 0, 0, 8, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c60197030ULL }, // Inst #5139 = UWRMSRir_EVEX |
| 42018 | { 5138, 2, 0, 0, 8, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c20197030ULL }, // Inst #5138 = UWRMSRir |
| 42019 | { 5137, 2, 1, 0, 8, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c60011829ULL }, // Inst #5137 = URDMSRrr_EVEX |
| 42020 | { 5136, 2, 1, 0, 8, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c00005829ULL }, // Inst #5136 = URDMSRrr |
| 42021 | { 5135, 2, 1, 0, 8, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c60197830ULL }, // Inst #5135 = URDMSRri_EVEX |
| 42022 | { 5134, 2, 1, 0, 8, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c20197830ULL }, // Inst #5134 = URDMSRri |
| 42023 | { 5133, 3, 1, 0, 1417, 0, 0, 494, X86ImpOpBase + 0, 0, 0xa08002029ULL }, // Inst #5133 = UNPCKLPSrr |
| 42024 | { 5132, 7, 1, 0, 1426, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa08002019ULL }, // Inst #5132 = UNPCKLPSrm |
| 42025 | { 5131, 3, 1, 0, 1417, 0, 0, 494, X86ImpOpBase + 0, 0, 0xa10002829ULL }, // Inst #5131 = UNPCKLPDrr |
| 42026 | { 5130, 7, 1, 0, 1426, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa10002819ULL }, // Inst #5130 = UNPCKLPDrm |
| 42027 | { 5129, 3, 1, 0, 1417, 0, 0, 494, X86ImpOpBase + 0, 0, 0xa88002029ULL }, // Inst #5129 = UNPCKHPSrr |
| 42028 | { 5128, 7, 1, 0, 1426, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa88002019ULL }, // Inst #5128 = UNPCKHPSrm |
| 42029 | { 5127, 3, 1, 0, 1417, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xa90002829ULL }, // Inst #5127 = UNPCKHPDrr |
| 42030 | { 5126, 7, 1, 0, 1426, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xa90002819ULL }, // Inst #5126 = UNPCKHPDrm |
| 42031 | { 5125, 1, 0, 0, 8, 2, 1, 202, X86ImpOpBase + 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003836ULL }, // Inst #5125 = UMWAIT |
| 42032 | { 5124, 1, 0, 0, 8, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003636ULL }, // Inst #5124 = UMONITOR64 |
| 42033 | { 5123, 1, 0, 0, 8, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003436ULL }, // Inst #5123 = UMONITOR32 |
| 42034 | { 5122, 1, 0, 0, 8, 0, 0, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003236ULL }, // Inst #5122 = UMONITOR16 |
| 42035 | { 5121, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000306cULL }, // Inst #5121 = UIRET |
| 42036 | { 5120, 2, 0, 0, 8, 0, 0, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c800020a9ULL }, // Inst #5120 = UD1Wr |
| 42037 | { 5119, 6, 0, 0, 8, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80002099ULL }, // Inst #5119 = UD1Wm |
| 42038 | { 5118, 2, 0, 0, 8, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80022029ULL }, // Inst #5118 = UD1Qr |
| 42039 | { 5117, 6, 0, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80022019ULL }, // Inst #5117 = UD1Qm |
| 42040 | { 5116, 2, 0, 0, 8, 0, 0, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80002129ULL }, // Inst #5116 = UD1Lr |
| 42041 | { 5115, 6, 0, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80002119ULL }, // Inst #5115 = UD1Lm |
| 42042 | { 5114, 1, 0, 0, 738, 2, 1, 517, X86ImpOpBase + 682, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000034ULL }, // Inst #5114 = UCOM_Fr |
| 42043 | { 5113, 2, 0, 0, 87, 1, 1, 334, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #5113 = UCOM_Fpr80 |
| 42044 | { 5112, 2, 0, 0, 87, 1, 1, 332, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #5112 = UCOM_Fpr64 |
| 42045 | { 5111, 2, 0, 0, 87, 1, 1, 330, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #5111 = UCOM_Fpr32 |
| 42046 | { 5110, 2, 0, 0, 87, 1, 2, 334, X86ImpOpBase + 160, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #5110 = UCOM_FpIr80 |
| 42047 | { 5109, 2, 0, 0, 87, 1, 2, 332, X86ImpOpBase + 160, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #5109 = UCOM_FpIr64 |
| 42048 | { 5108, 2, 0, 0, 87, 1, 2, 330, X86ImpOpBase + 160, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #5108 = UCOM_FpIr32 |
| 42049 | { 5107, 1, 0, 0, 738, 2, 1, 517, X86ImpOpBase + 682, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000035ULL }, // Inst #5107 = UCOM_FPr |
| 42050 | { 5106, 0, 0, 0, 615, 2, 1, 1, X86ImpOpBase + 682, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000069ULL }, // Inst #5106 = UCOM_FPPr |
| 42051 | { 5105, 1, 0, 0, 755, 2, 2, 517, X86ImpOpBase + 156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000035ULL }, // Inst #5105 = UCOM_FIr |
| 42052 | { 5104, 1, 0, 0, 755, 2, 2, 517, X86ImpOpBase + 156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000035ULL }, // Inst #5104 = UCOM_FIPr |
| 42053 | { 5103, 2, 0, 0, 746, 1, 1, 557, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1708002029ULL }, // Inst #5103 = UCOMISSrr_Int |
| 42054 | { 5102, 2, 0, 0, 746, 1, 1, 1008, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1708002029ULL }, // Inst #5102 = UCOMISSrr |
| 42055 | { 5101, 6, 0, 0, 786, 1, 1, 551, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1708002019ULL }, // Inst #5101 = UCOMISSrm_Int |
| 42056 | { 5100, 6, 0, 0, 786, 1, 1, 1002, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1708002019ULL }, // Inst #5100 = UCOMISSrm |
| 42057 | { 5099, 2, 0, 0, 746, 1, 1, 557, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1710002829ULL }, // Inst #5099 = UCOMISDrr_Int |
| 42058 | { 5098, 2, 0, 0, 746, 1, 1, 1000, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1710002829ULL }, // Inst #5098 = UCOMISDrr |
| 42059 | { 5097, 6, 0, 0, 786, 1, 1, 551, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1710002819ULL }, // Inst #5097 = UCOMISDrm_Int |
| 42060 | { 5096, 6, 0, 0, 786, 1, 1, 994, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1710002819ULL }, // Inst #5096 = UCOMISDrm |
| 42061 | { 5095, 1, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #5095 = UBSAN_UD1 |
| 42062 | { 5094, 2, 1, 0, 1157, 0, 1, 575, X86ImpOpBase + 0, 0, 0x80c002a034ULL }, // Inst #5094 = TZMSK64rr |
| 42063 | { 5093, 6, 1, 0, 1158, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c002a024ULL }, // Inst #5093 = TZMSK64rm |
| 42064 | { 5092, 2, 1, 0, 1157, 0, 1, 573, X86ImpOpBase + 0, 0, 0x80c000a034ULL }, // Inst #5092 = TZMSK32rr |
| 42065 | { 5091, 6, 1, 0, 1158, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c000a024ULL }, // Inst #5091 = TZMSK32rm |
| 42066 | { 5090, 2, 1, 0, 334, 0, 0, 575, X86ImpOpBase + 0, 0, 0x10007a60030029ULL }, // Inst #5090 = TZCNT64rr_NF |
| 42067 | { 5089, 2, 1, 0, 334, 0, 1, 575, X86ImpOpBase + 0, 0, 0xc007a60030029ULL }, // Inst #5089 = TZCNT64rr_EVEX |
| 42068 | { 5088, 2, 1, 0, 334, 0, 1, 575, X86ImpOpBase + 0, 0, 0x5e00023029ULL }, // Inst #5088 = TZCNT64rr |
| 42069 | { 5087, 6, 1, 0, 333, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10007a60030019ULL }, // Inst #5087 = TZCNT64rm_NF |
| 42070 | { 5086, 6, 1, 0, 333, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc007a60030019ULL }, // Inst #5086 = TZCNT64rm_EVEX |
| 42071 | { 5085, 6, 1, 0, 333, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e00023019ULL }, // Inst #5085 = TZCNT64rm |
| 42072 | { 5084, 2, 1, 0, 334, 0, 0, 573, X86ImpOpBase + 0, 0, 0x10007a60010029ULL }, // Inst #5084 = TZCNT32rr_NF |
| 42073 | { 5083, 2, 1, 0, 334, 0, 1, 573, X86ImpOpBase + 0, 0, 0xc007a60010029ULL }, // Inst #5083 = TZCNT32rr_EVEX |
| 42074 | { 5082, 2, 1, 0, 334, 0, 1, 573, X86ImpOpBase + 0, 0, 0x5e00003129ULL }, // Inst #5082 = TZCNT32rr |
| 42075 | { 5081, 6, 1, 0, 333, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10007a60010019ULL }, // Inst #5081 = TZCNT32rm_NF |
| 42076 | { 5080, 6, 1, 0, 333, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc007a60010019ULL }, // Inst #5080 = TZCNT32rm_EVEX |
| 42077 | { 5079, 6, 1, 0, 333, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e00003119ULL }, // Inst #5079 = TZCNT32rm |
| 42078 | { 5078, 2, 1, 0, 334, 0, 0, 569, X86ImpOpBase + 0, 0, 0x10007a60010829ULL }, // Inst #5078 = TZCNT16rr_NF |
| 42079 | { 5077, 2, 1, 0, 334, 0, 1, 569, X86ImpOpBase + 0, 0, 0xc007a60010829ULL }, // Inst #5077 = TZCNT16rr_EVEX |
| 42080 | { 5076, 2, 1, 0, 1021, 0, 1, 569, X86ImpOpBase + 0, 0, 0x5e000030a9ULL }, // Inst #5076 = TZCNT16rr |
| 42081 | { 5075, 6, 1, 0, 333, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10007a60010819ULL }, // Inst #5075 = TZCNT16rm_NF |
| 42082 | { 5074, 6, 1, 0, 333, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc007a60010819ULL }, // Inst #5074 = TZCNT16rm_EVEX |
| 42083 | { 5073, 6, 1, 0, 333, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e00003099ULL }, // Inst #5073 = TZCNT16rm |
| 42084 | { 5072, 2, 1, 0, 8, 0, 0, 1569, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2fa0005029ULL }, // Inst #5072 = TTRANSPOSED |
| 42085 | { 5071, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa42000402aULL }, // Inst #5071 = TTMMULTF32PS |
| 42086 | { 5070, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb62000582aULL }, // Inst #5070 = TTDPFP16PS |
| 42087 | { 5069, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb62000502aULL }, // Inst #5069 = TTDPBF16PS |
| 42088 | { 5068, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb5a000502aULL }, // Inst #5068 = TTCMMRLFP16PS |
| 42089 | { 5067, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb5a000582aULL }, // Inst #5067 = TTCMMIMFP16PS |
| 42090 | { 5066, 1, 0, 0, 688, 1, 1, 1221, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #5066 = TST_Fp80 |
| 42091 | { 5065, 1, 0, 0, 688, 1, 1, 1220, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #5065 = TST_Fp64 |
| 42092 | { 5064, 1, 0, 0, 688, 1, 1, 1219, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #5064 = TST_Fp32 |
| 42093 | { 5063, 0, 0, 0, 1175, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000064ULL }, // Inst #5063 = TST_F |
| 42094 | { 5062, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x580002001ULL }, // Inst #5062 = TRAP |
| 42095 | { 5061, 1, 0, 0, 8, 2, 1, 202, X86ImpOpBase + 679, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002836ULL }, // Inst #5061 = TPAUSE |
| 42096 | { 5060, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa42000482aULL }, // Inst #5060 = TMMULTF32PS |
| 42097 | { 5059, 5, 0, 0, 8, 2, 2, 232, X86ImpOpBase + 675, 0, 0x0ULL }, // Inst #5059 = TLS_desc64 |
| 42098 | { 5058, 5, 0, 0, 8, 2, 2, 232, X86ImpOpBase + 675, 0, 0x0ULL }, // Inst #5058 = TLS_desc32 |
| 42099 | { 5057, 5, 0, 0, 8, 2, 51, 232, X86ImpOpBase + 622, 0, 0x0ULL }, // Inst #5057 = TLS_base_addrX32 |
| 42100 | { 5056, 5, 0, 0, 8, 2, 51, 232, X86ImpOpBase + 622, 0, 0x0ULL }, // Inst #5056 = TLS_base_addr64 |
| 42101 | { 5055, 5, 0, 0, 8, 2, 45, 232, X86ImpOpBase + 575, 0, 0x0ULL }, // Inst #5055 = TLS_base_addr32 |
| 42102 | { 5054, 5, 0, 0, 8, 2, 51, 232, X86ImpOpBase + 622, 0, 0x0ULL }, // Inst #5054 = TLS_addrX32 |
| 42103 | { 5053, 5, 0, 0, 8, 2, 51, 232, X86ImpOpBase + 622, 0, 0x0ULL }, // Inst #5053 = TLS_addr64 |
| 42104 | { 5052, 5, 0, 0, 8, 2, 45, 232, X86ImpOpBase + 575, 0, 0x0ULL }, // Inst #5052 = TLS_addr32 |
| 42105 | { 5051, 5, 0, 0, 8, 2, 3, 232, X86ImpOpBase + 570, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #5051 = TLSCall_64 |
| 42106 | { 5050, 5, 0, 0, 8, 2, 4, 232, X86ImpOpBase + 564, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #5050 = TLSCall_32 |
| 42107 | { 5049, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207fULL }, // Inst #5049 = TLBSYNC |
| 42108 | { 5048, 1, 1, 0, 8, 0, 0, 1602, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x24a0005815ULL }, // Inst #5048 = TILEZERO |
| 42109 | { 5047, 6, 0, 0, 8, 0, 0, 1596, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x25e0005017ULL }, // Inst #5047 = TILESTORED_EVEX |
| 42110 | { 5046, 6, 0, 0, 8, 0, 0, 1596, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x25a0005017ULL }, // Inst #5046 = TILESTORED |
| 42111 | { 5045, 0, 0, 0, 8, 0, 8, 1, X86ImpOpBase + 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x24a0004040ULL }, // Inst #5045 = TILERELEASE |
| 42112 | { 5044, 3, 1, 0, 8, 0, 0, 1587, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe803e0046829ULL }, // Inst #5044 = TILEMOVROWrri |
| 42113 | { 5043, 3, 1, 0, 8, 0, 0, 1584, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe8a56000482aULL }, // Inst #5043 = TILEMOVROWrre |
| 42114 | { 5042, 6, 1, 0, 8, 0, 0, 1590, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x25e0005816ULL }, // Inst #5042 = TILELOADD_EVEX |
| 42115 | { 5041, 6, 1, 0, 8, 0, 0, 1590, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x25e0004816ULL }, // Inst #5041 = TILELOADDT1_EVEX |
| 42116 | { 5040, 6, 1, 0, 8, 0, 0, 1590, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x25a0004816ULL }, // Inst #5040 = TILELOADDT1 |
| 42117 | { 5039, 6, 1, 0, 8, 0, 0, 1590, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2560005816ULL }, // Inst #5039 = TILELOADDRS_EVEX |
| 42118 | { 5038, 6, 1, 0, 8, 0, 0, 1590, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2560004816ULL }, // Inst #5038 = TILELOADDRST1_EVEX |
| 42119 | { 5037, 6, 1, 0, 8, 0, 0, 1590, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2520004816ULL }, // Inst #5037 = TILELOADDRST1 |
| 42120 | { 5036, 6, 1, 0, 8, 0, 0, 1590, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2520005816ULL }, // Inst #5036 = TILELOADDRS |
| 42121 | { 5035, 6, 1, 0, 8, 0, 0, 1590, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x25a0005816ULL }, // Inst #5035 = TILELOADD |
| 42122 | { 5034, 0, 0, 0, 8, 0, 1, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000306dULL }, // Inst #5034 = TESTUI |
| 42123 | { 5033, 2, 0, 0, 1462, 0, 1, 947, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4200000028ULL }, // Inst #5033 = TEST8rr |
| 42124 | { 5032, 2, 0, 0, 1462, 0, 1, 939, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x7b00040030ULL }, // Inst #5032 = TEST8ri |
| 42125 | { 5031, 6, 0, 0, 1471, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4200000018ULL }, // Inst #5031 = TEST8mr |
| 42126 | { 5030, 6, 0, 0, 1467, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b00040020ULL }, // Inst #5030 = TEST8mi |
| 42127 | { 5029, 1, 0, 0, 1462, 1, 1, 1, X86ImpOpBase + 132, 0|(1ULL<<MCID::Compare), 0x5400040001ULL }, // Inst #5029 = TEST8i8 |
| 42128 | { 5028, 2, 0, 0, 1462, 0, 1, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4280020028ULL }, // Inst #5028 = TEST64rr |
| 42129 | { 5027, 2, 0, 0, 1462, 0, 1, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x7b80220030ULL }, // Inst #5027 = TEST64ri32 |
| 42130 | { 5026, 6, 0, 0, 1471, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280020018ULL }, // Inst #5026 = TEST64mr |
| 42131 | { 5025, 6, 0, 0, 1468, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b80220020ULL }, // Inst #5025 = TEST64mi32 |
| 42132 | { 5024, 1, 0, 0, 1462, 1, 1, 1, X86ImpOpBase + 130, 0|(1ULL<<MCID::Compare), 0x5480220001ULL }, // Inst #5024 = TEST64i32 |
| 42133 | { 5023, 2, 0, 0, 1462, 0, 1, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4280000128ULL }, // Inst #5023 = TEST32rr |
| 42134 | { 5022, 2, 0, 0, 1462, 0, 1, 204, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x7b80180130ULL }, // Inst #5022 = TEST32ri |
| 42135 | { 5021, 6, 0, 0, 1471, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280000118ULL }, // Inst #5021 = TEST32mr |
| 42136 | { 5020, 6, 0, 0, 1467, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b80180120ULL }, // Inst #5020 = TEST32mi |
| 42137 | { 5019, 1, 0, 0, 1462, 1, 1, 1, X86ImpOpBase + 128, 0|(1ULL<<MCID::Compare), 0x5480180101ULL }, // Inst #5019 = TEST32i32 |
| 42138 | { 5018, 2, 0, 0, 1462, 0, 1, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x42800000a8ULL }, // Inst #5018 = TEST16rr |
| 42139 | { 5017, 2, 0, 0, 1, 0, 1, 597, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x7b801000b0ULL }, // Inst #5017 = TEST16ri |
| 42140 | { 5016, 6, 0, 0, 1471, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280000098ULL }, // Inst #5016 = TEST16mr |
| 42141 | { 5015, 6, 0, 0, 1467, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b801000a0ULL }, // Inst #5015 = TEST16mi |
| 42142 | { 5014, 1, 0, 0, 1, 1, 1, 1, X86ImpOpBase + 126, 0|(1ULL<<MCID::Compare), 0x5480100081ULL }, // Inst #5014 = TEST16i16 |
| 42143 | { 5013, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xfea001282aULL }, // Inst #5013 = TDPHF8PS |
| 42144 | { 5012, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xfea001302aULL }, // Inst #5012 = TDPHBF8PS |
| 42145 | { 5011, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xae2000582aULL }, // Inst #5011 = TDPFP16PS |
| 42146 | { 5010, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaf2000402aULL }, // Inst #5010 = TDPBUUD |
| 42147 | { 5009, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaf2000482aULL }, // Inst #5009 = TDPBUSD |
| 42148 | { 5008, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaf2000502aULL }, // Inst #5008 = TDPBSUD |
| 42149 | { 5007, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaf2000582aULL }, // Inst #5007 = TDPBSSD |
| 42150 | { 5006, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xfea001382aULL }, // Inst #5006 = TDPBHF8PS |
| 42151 | { 5005, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xfea001202aULL }, // Inst #5005 = TDPBF8PS |
| 42152 | { 5004, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xae2000502aULL }, // Inst #5004 = TDPBF16PS |
| 42153 | { 5003, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000284cULL }, // Inst #5003 = TDCALL |
| 42154 | { 5002, 3, 1, 0, 8, 0, 0, 1587, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe83be0047829ULL }, // Inst #5002 = TCVTROWPS2PHLrri |
| 42155 | { 5001, 3, 1, 0, 8, 0, 0, 1584, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe8b6e000482aULL }, // Inst #5001 = TCVTROWPS2PHLrre |
| 42156 | { 5000, 3, 1, 0, 8, 0, 0, 1587, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe803e0046029ULL }, // Inst #5000 = TCVTROWPS2PHHrri |
| 42157 | { 4999, 3, 1, 0, 8, 0, 0, 1584, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe8b6e000402aULL }, // Inst #4999 = TCVTROWPS2PHHrre |
| 42158 | { 4998, 3, 1, 0, 8, 0, 0, 1587, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe83be0047029ULL }, // Inst #4998 = TCVTROWPS2BF16Lrri |
| 42159 | { 4997, 3, 1, 0, 8, 0, 0, 1584, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe8b6e000502aULL }, // Inst #4997 = TCVTROWPS2BF16Lrre |
| 42160 | { 4996, 3, 1, 0, 8, 0, 0, 1587, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe803e0047829ULL }, // Inst #4996 = TCVTROWPS2BF16Hrri |
| 42161 | { 4995, 3, 1, 0, 8, 0, 0, 1584, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe8b6e000582aULL }, // Inst #4995 = TCVTROWPS2BF16Hrre |
| 42162 | { 4994, 3, 1, 0, 8, 0, 0, 1587, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe803e0047029ULL }, // Inst #4994 = TCVTROWD2PSrri |
| 42163 | { 4993, 3, 1, 0, 8, 0, 0, 1584, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe8a56000502aULL }, // Inst #4993 = TCVTROWD2PSrre |
| 42164 | { 4992, 2, 0, 0, 4, 2, 0, 1582, X86ImpOpBase + 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4992 = TCRETURNri64_ImpCall |
| 42165 | { 4991, 2, 0, 0, 4, 2, 0, 1580, X86ImpOpBase + 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4991 = TCRETURNri64 |
| 42166 | { 4990, 2, 0, 0, 4, 2, 0, 1580, X86ImpOpBase + 112, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4990 = TCRETURNri |
| 42167 | { 4989, 6, 0, 0, 6, 2, 0, 1574, X86ImpOpBase + 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4989 = TCRETURNmi64 |
| 42168 | { 4988, 6, 0, 0, 6, 2, 0, 1574, X86ImpOpBase + 112, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4988 = TCRETURNmi |
| 42169 | { 4987, 3, 0, 0, 4, 3, 0, 1571, X86ImpOpBase + 561, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4987 = TCRETURNdicc |
| 42170 | { 4986, 3, 0, 0, 4, 3, 0, 1571, X86ImpOpBase + 558, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4986 = TCRETURNdi64cc |
| 42171 | { 4985, 2, 0, 0, 4, 2, 0, 1557, X86ImpOpBase + 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4985 = TCRETURNdi64 |
| 42172 | { 4984, 2, 0, 0, 4, 2, 0, 1557, X86ImpOpBase + 112, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4984 = TCRETURNdi |
| 42173 | { 4983, 2, 1, 0, 8, 0, 0, 1569, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x35a0004829ULL }, // Inst #4983 = TCONJTFP16 |
| 42174 | { 4982, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb5a000402aULL }, // Inst #4982 = TCONJTCMMIMFP16PS |
| 42175 | { 4981, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb62000402aULL }, // Inst #4981 = TCMMRLFP16PS |
| 42176 | { 4980, 4, 1, 0, 8, 0, 0, 1565, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb62000482aULL }, // Inst #4980 = TCMMIMFP16PS |
| 42177 | { 4979, 1, 0, 0, 4, 2, 0, 1564, X86ImpOpBase + 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x20000ULL }, // Inst #4979 = TAILJMPr64_REX |
| 42178 | { 4978, 1, 0, 0, 4, 2, 0, 1564, X86ImpOpBase + 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4978 = TAILJMPr64 |
| 42179 | { 4977, 1, 0, 0, 4, 2, 0, 1564, X86ImpOpBase + 112, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4977 = TAILJMPr |
| 42180 | { 4976, 5, 0, 0, 6, 2, 0, 1559, X86ImpOpBase + 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x20000ULL }, // Inst #4976 = TAILJMPm64_REX |
| 42181 | { 4975, 5, 0, 0, 6, 2, 0, 1559, X86ImpOpBase + 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4975 = TAILJMPm64 |
| 42182 | { 4974, 5, 0, 0, 6, 2, 0, 1559, X86ImpOpBase + 112, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4974 = TAILJMPm |
| 42183 | { 4973, 2, 0, 0, 4, 3, 0, 1557, X86ImpOpBase + 561, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4973 = TAILJMPd_CC |
| 42184 | { 4972, 2, 0, 0, 4, 3, 0, 1557, X86ImpOpBase + 558, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4972 = TAILJMPd64_CC |
| 42185 | { 4971, 1, 0, 0, 4, 2, 0, 600, X86ImpOpBase + 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4971 = TAILJMPd64 |
| 42186 | { 4970, 1, 0, 0, 4, 2, 0, 600, X86ImpOpBase + 112, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4970 = TAILJMPd |
| 42187 | { 4969, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3760004816ULL }, // Inst #4969 = T2RPNTLVWZ1_EVEX |
| 42188 | { 4968, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x37e0004816ULL }, // Inst #4968 = T2RPNTLVWZ1T1_EVEX |
| 42189 | { 4967, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x37a0004816ULL }, // Inst #4967 = T2RPNTLVWZ1T1 |
| 42190 | { 4966, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60012816ULL }, // Inst #4966 = T2RPNTLVWZ1RS_EVEX |
| 42191 | { 4965, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7ce0012816ULL }, // Inst #4965 = T2RPNTLVWZ1RST1_EVEX |
| 42192 | { 4964, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7ca0012816ULL }, // Inst #4964 = T2RPNTLVWZ1RST1 |
| 42193 | { 4963, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c20012816ULL }, // Inst #4963 = T2RPNTLVWZ1RS |
| 42194 | { 4962, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3720004816ULL }, // Inst #4962 = T2RPNTLVWZ1 |
| 42195 | { 4961, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3760004016ULL }, // Inst #4961 = T2RPNTLVWZ0_EVEX |
| 42196 | { 4960, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x37e0004016ULL }, // Inst #4960 = T2RPNTLVWZ0T1_EVEX |
| 42197 | { 4959, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x37a0004016ULL }, // Inst #4959 = T2RPNTLVWZ0T1 |
| 42198 | { 4958, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60012016ULL }, // Inst #4958 = T2RPNTLVWZ0RS_EVEX |
| 42199 | { 4957, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7ce0012016ULL }, // Inst #4957 = T2RPNTLVWZ0RST1_EVEX |
| 42200 | { 4956, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7ca0012016ULL }, // Inst #4956 = T2RPNTLVWZ0RST1 |
| 42201 | { 4955, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c20012016ULL }, // Inst #4955 = T2RPNTLVWZ0RS |
| 42202 | { 4954, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3720004016ULL }, // Inst #4954 = T2RPNTLVWZ0 |
| 42203 | { 4953, 2, 1, 0, 1157, 0, 1, 575, X86ImpOpBase + 0, 0, 0x80c002a037ULL }, // Inst #4953 = T1MSKC64rr |
| 42204 | { 4952, 6, 1, 0, 1158, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c002a027ULL }, // Inst #4952 = T1MSKC64rm |
| 42205 | { 4951, 2, 1, 0, 1157, 0, 1, 573, X86ImpOpBase + 0, 0, 0x80c000a037ULL }, // Inst #4951 = T1MSKC32rr |
| 42206 | { 4950, 6, 1, 0, 1158, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c000a027ULL }, // Inst #4950 = T1MSKC32rm |
| 42207 | { 4949, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380022001ULL }, // Inst #4949 = SYSRET64 |
| 42208 | { 4948, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380002001ULL }, // Inst #4948 = SYSRET |
| 42209 | { 4947, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a80022001ULL }, // Inst #4947 = SYSEXIT64 |
| 42210 | { 4946, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a80002001ULL }, // Inst #4946 = SYSEXIT |
| 42211 | { 4945, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a00002001ULL }, // Inst #4945 = SYSENTER |
| 42212 | { 4944, 0, 0, 0, 1498, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x280002001ULL }, // Inst #4944 = SYSCALL |
| 42213 | { 4943, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002078ULL }, // Inst #4943 = SWAPGS |
| 42214 | { 4942, 1, 0, 0, 1717, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000035ULL }, // Inst #4942 = SUB_FrST0 |
| 42215 | { 4941, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4941 = SUB_FpI32m80 |
| 42216 | { 4940, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4940 = SUB_FpI32m64 |
| 42217 | { 4939, 7, 1, 0, 36, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4939 = SUB_FpI32m32 |
| 42218 | { 4938, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4938 = SUB_FpI16m80 |
| 42219 | { 4937, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4937 = SUB_FpI16m64 |
| 42220 | { 4936, 7, 1, 0, 36, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4936 = SUB_FpI16m32 |
| 42221 | { 4935, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4935 = SUB_Fp80m64 |
| 42222 | { 4934, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4934 = SUB_Fp80m32 |
| 42223 | { 4933, 3, 1, 0, 0, 1, 1, 538, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #4933 = SUB_Fp80 |
| 42224 | { 4932, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4932 = SUB_Fp64m32 |
| 42225 | { 4931, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4931 = SUB_Fp64m |
| 42226 | { 4930, 3, 1, 0, 0, 1, 1, 528, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #4930 = SUB_Fp64 |
| 42227 | { 4929, 7, 1, 0, 36, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4929 = SUB_Fp32m |
| 42228 | { 4928, 3, 1, 0, 0, 1, 1, 518, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #4928 = SUB_Fp32 |
| 42229 | { 4927, 1, 0, 0, 1717, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000034ULL }, // Inst #4927 = SUB_FST0r |
| 42230 | { 4926, 1, 0, 0, 1717, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000035ULL }, // Inst #4926 = SUB_FPrST0 |
| 42231 | { 4925, 5, 0, 0, 800, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000024ULL }, // Inst #4925 = SUB_FI32m |
| 42232 | { 4924, 5, 0, 0, 800, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000024ULL }, // Inst #4924 = SUB_FI16m |
| 42233 | { 4923, 5, 0, 0, 796, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000024ULL }, // Inst #4923 = SUB_F64m |
| 42234 | { 4922, 5, 0, 0, 796, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000024ULL }, // Inst #4922 = SUB_F32m |
| 42235 | { 4921, 3, 1, 0, 1461, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e08003029ULL }, // Inst #4921 = SUBSSrr_Int |
| 42236 | { 4920, 3, 1, 0, 1461, 1, 0, 514, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e08003029ULL }, // Inst #4920 = SUBSSrr |
| 42237 | { 4919, 7, 1, 0, 34, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e08003019ULL }, // Inst #4919 = SUBSSrm_Int |
| 42238 | { 4918, 7, 1, 0, 34, 1, 0, 507, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e08003019ULL }, // Inst #4918 = SUBSSrm |
| 42239 | { 4917, 3, 1, 0, 33, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e10003829ULL }, // Inst #4917 = SUBSDrr_Int |
| 42240 | { 4916, 3, 1, 0, 33, 1, 0, 504, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e10003829ULL }, // Inst #4916 = SUBSDrr |
| 42241 | { 4915, 7, 1, 0, 32, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e10003819ULL }, // Inst #4915 = SUBSDrm_Int |
| 42242 | { 4914, 7, 1, 0, 32, 1, 0, 497, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e10003819ULL }, // Inst #4914 = SUBSDrm |
| 42243 | { 4913, 1, 0, 0, 1717, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000034ULL }, // Inst #4913 = SUBR_FrST0 |
| 42244 | { 4912, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4912 = SUBR_FpI32m80 |
| 42245 | { 4911, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4911 = SUBR_FpI32m64 |
| 42246 | { 4910, 7, 1, 0, 36, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4910 = SUBR_FpI32m32 |
| 42247 | { 4909, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4909 = SUBR_FpI16m80 |
| 42248 | { 4908, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4908 = SUBR_FpI16m64 |
| 42249 | { 4907, 7, 1, 0, 36, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4907 = SUBR_FpI16m32 |
| 42250 | { 4906, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4906 = SUBR_Fp80m64 |
| 42251 | { 4905, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4905 = SUBR_Fp80m32 |
| 42252 | { 4904, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4904 = SUBR_Fp64m32 |
| 42253 | { 4903, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4903 = SUBR_Fp64m |
| 42254 | { 4902, 7, 1, 0, 36, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4902 = SUBR_Fp32m |
| 42255 | { 4901, 1, 0, 0, 1717, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000035ULL }, // Inst #4901 = SUBR_FST0r |
| 42256 | { 4900, 1, 0, 0, 1717, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000034ULL }, // Inst #4900 = SUBR_FPrST0 |
| 42257 | { 4899, 5, 0, 0, 800, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000025ULL }, // Inst #4899 = SUBR_FI32m |
| 42258 | { 4898, 5, 0, 0, 800, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000025ULL }, // Inst #4898 = SUBR_FI16m |
| 42259 | { 4897, 5, 0, 0, 796, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000025ULL }, // Inst #4897 = SUBR_F64m |
| 42260 | { 4896, 5, 0, 0, 796, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000025ULL }, // Inst #4896 = SUBR_F32m |
| 42261 | { 4895, 3, 1, 0, 1697, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e08002029ULL }, // Inst #4895 = SUBPSrr |
| 42262 | { 4894, 7, 1, 0, 1696, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e08002019ULL }, // Inst #4894 = SUBPSrm |
| 42263 | { 4893, 3, 1, 0, 28, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e10002829ULL }, // Inst #4893 = SUBPDrr |
| 42264 | { 4892, 7, 1, 0, 27, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e10002819ULL }, // Inst #4892 = SUBPDrm |
| 42265 | { 4891, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1500000029ULL }, // Inst #4891 = SUB8rr_REV |
| 42266 | { 4890, 3, 1, 0, 1, 0, 0, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x10001560010029ULL }, // Inst #4890 = SUB8rr_NF_REV |
| 42267 | { 4889, 3, 1, 0, 1, 0, 0, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x10109560010029ULL }, // Inst #4889 = SUB8rr_NF_ND_REV |
| 42268 | { 4888, 3, 1, 0, 1, 0, 0, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x10109460010028ULL }, // Inst #4888 = SUB8rr_NF_ND |
| 42269 | { 4887, 3, 1, 0, 1, 0, 0, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x10001460010028ULL }, // Inst #4887 = SUB8rr_NF |
| 42270 | { 4886, 3, 1, 0, 1, 0, 1, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x109560010029ULL }, // Inst #4886 = SUB8rr_ND_REV |
| 42271 | { 4885, 3, 1, 0, 1, 0, 1, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x109460010028ULL }, // Inst #4885 = SUB8rr_ND |
| 42272 | { 4884, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0xc001560010029ULL }, // Inst #4884 = SUB8rr_EVEX_REV |
| 42273 | { 4883, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0xc001460010028ULL }, // Inst #4883 = SUB8rr_EVEX |
| 42274 | { 4882, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1400000028ULL }, // Inst #4882 = SUB8rr |
| 42275 | { 4881, 7, 1, 0, 25, 0, 0, 477, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10109560010019ULL }, // Inst #4881 = SUB8rm_NF_ND |
| 42276 | { 4880, 7, 1, 0, 25, 0, 0, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10001560010019ULL }, // Inst #4880 = SUB8rm_NF |
| 42277 | { 4879, 7, 1, 0, 25, 0, 1, 477, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x109560010019ULL }, // Inst #4879 = SUB8rm_ND |
| 42278 | { 4878, 7, 1, 0, 25, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0xc001560010019ULL }, // Inst #4878 = SUB8rm_EVEX |
| 42279 | { 4877, 7, 1, 0, 1450, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1500000019ULL }, // Inst #4877 = SUB8rm |
| 42280 | { 4876, 3, 1, 0, 1, 0, 0, 467, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c060050035ULL }, // Inst #4876 = SUB8ri_NF_ND |
| 42281 | { 4875, 3, 1, 0, 1, 0, 0, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10004060050035ULL }, // Inst #4875 = SUB8ri_NF |
| 42282 | { 4874, 3, 1, 0, 1, 0, 1, 467, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c060050035ULL }, // Inst #4874 = SUB8ri_ND |
| 42283 | { 4873, 3, 1, 0, 1, 0, 1, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc004060050035ULL }, // Inst #4873 = SUB8ri_EVEX |
| 42284 | { 4872, 3, 1, 0, 1, 0, 1, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x4100040035ULL }, // Inst #4872 = SUB8ri8 |
| 42285 | { 4871, 3, 1, 0, 1, 0, 1, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x4000040035ULL }, // Inst #4871 = SUB8ri |
| 42286 | { 4870, 7, 1, 0, 920, 0, 0, 460, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10109460010018ULL }, // Inst #4870 = SUB8mr_NF_ND |
| 42287 | { 4869, 6, 0, 0, 922, 0, 0, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001460010018ULL }, // Inst #4869 = SUB8mr_NF |
| 42288 | { 4868, 7, 1, 0, 920, 0, 1, 460, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x109460010018ULL }, // Inst #4868 = SUB8mr_ND |
| 42289 | { 4867, 6, 0, 0, 921, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001460010018ULL }, // Inst #4867 = SUB8mr_EVEX |
| 42290 | { 4866, 6, 0, 0, 1460, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1400000018ULL }, // Inst #4866 = SUB8mr |
| 42291 | { 4865, 7, 1, 0, 920, 0, 0, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c060050025ULL }, // Inst #4865 = SUB8mi_NF_ND |
| 42292 | { 4864, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10004060050025ULL }, // Inst #4864 = SUB8mi_NF |
| 42293 | { 4863, 7, 1, 0, 920, 0, 1, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c060050025ULL }, // Inst #4863 = SUB8mi_ND |
| 42294 | { 4862, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050025ULL }, // Inst #4862 = SUB8mi_EVEX |
| 42295 | { 4861, 6, 0, 0, 1455, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040025ULL }, // Inst #4861 = SUB8mi8 |
| 42296 | { 4860, 6, 0, 0, 1455, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040025ULL }, // Inst #4860 = SUB8mi |
| 42297 | { 4859, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 75, 0|(1ULL<<MCID::Compare), 0x1600040001ULL }, // Inst #4859 = SUB8i8 |
| 42298 | { 4858, 3, 1, 0, 1050, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1580020029ULL }, // Inst #4858 = SUB64rr_REV |
| 42299 | { 4857, 3, 1, 0, 1, 0, 0, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x100015e0030029ULL }, // Inst #4857 = SUB64rr_NF_REV |
| 42300 | { 4856, 3, 1, 0, 1, 0, 0, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x101095e0030029ULL }, // Inst #4856 = SUB64rr_NF_ND_REV |
| 42301 | { 4855, 3, 1, 0, 1, 0, 0, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x101094e0030028ULL }, // Inst #4855 = SUB64rr_NF_ND |
| 42302 | { 4854, 3, 1, 0, 1, 0, 0, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x100014e0030028ULL }, // Inst #4854 = SUB64rr_NF |
| 42303 | { 4853, 3, 1, 0, 1, 0, 1, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1095e0030029ULL }, // Inst #4853 = SUB64rr_ND_REV |
| 42304 | { 4852, 3, 1, 0, 1, 0, 1, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1094e0030028ULL }, // Inst #4852 = SUB64rr_ND |
| 42305 | { 4851, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0xc0015e0030029ULL }, // Inst #4851 = SUB64rr_EVEX_REV |
| 42306 | { 4850, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0xc0014e0030028ULL }, // Inst #4850 = SUB64rr_EVEX |
| 42307 | { 4849, 3, 1, 0, 807, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1480020028ULL }, // Inst #4849 = SUB64rr |
| 42308 | { 4848, 7, 1, 0, 25, 0, 0, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101095e0030019ULL }, // Inst #4848 = SUB64rm_NF_ND |
| 42309 | { 4847, 7, 1, 0, 25, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x100015e0030019ULL }, // Inst #4847 = SUB64rm_NF |
| 42310 | { 4846, 7, 1, 0, 25, 0, 1, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1095e0030019ULL }, // Inst #4846 = SUB64rm_ND |
| 42311 | { 4845, 7, 1, 0, 25, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0xc0015e0030019ULL }, // Inst #4845 = SUB64rm_EVEX |
| 42312 | { 4844, 7, 1, 0, 1450, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580020019ULL }, // Inst #4844 = SUB64rm |
| 42313 | { 4843, 3, 1, 0, 1, 0, 0, 427, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0070035ULL }, // Inst #4843 = SUB64ri8_NF_ND |
| 42314 | { 4842, 3, 1, 0, 1, 0, 0, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0070035ULL }, // Inst #4842 = SUB64ri8_NF |
| 42315 | { 4841, 3, 1, 0, 1, 0, 1, 427, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0070035ULL }, // Inst #4841 = SUB64ri8_ND |
| 42316 | { 4840, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0070035ULL }, // Inst #4840 = SUB64ri8_EVEX |
| 42317 | { 4839, 3, 1, 0, 1452, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180060035ULL }, // Inst #4839 = SUB64ri8 |
| 42318 | { 4838, 3, 1, 0, 1, 0, 0, 427, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0230035ULL }, // Inst #4838 = SUB64ri32_NF_ND |
| 42319 | { 4837, 3, 1, 0, 1, 0, 0, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0230035ULL }, // Inst #4837 = SUB64ri32_NF |
| 42320 | { 4836, 3, 1, 0, 1, 0, 1, 427, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0230035ULL }, // Inst #4836 = SUB64ri32_ND |
| 42321 | { 4835, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0230035ULL }, // Inst #4835 = SUB64ri32_EVEX |
| 42322 | { 4834, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x4080220035ULL }, // Inst #4834 = SUB64ri32 |
| 42323 | { 4833, 7, 1, 0, 920, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101094e0030018ULL }, // Inst #4833 = SUB64mr_NF_ND |
| 42324 | { 4832, 6, 0, 0, 922, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100014e0030018ULL }, // Inst #4832 = SUB64mr_NF |
| 42325 | { 4831, 7, 1, 0, 920, 0, 1, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1094e0030018ULL }, // Inst #4831 = SUB64mr_ND |
| 42326 | { 4830, 6, 0, 0, 921, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0014e0030018ULL }, // Inst #4830 = SUB64mr_EVEX |
| 42327 | { 4829, 6, 0, 0, 921, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480020018ULL }, // Inst #4829 = SUB64mr |
| 42328 | { 4828, 7, 1, 0, 920, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c1e0070025ULL }, // Inst #4828 = SUB64mi8_NF_ND |
| 42329 | { 4827, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0070025ULL }, // Inst #4827 = SUB64mi8_NF |
| 42330 | { 4826, 7, 1, 0, 920, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c1e0070025ULL }, // Inst #4826 = SUB64mi8_ND |
| 42331 | { 4825, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070025ULL }, // Inst #4825 = SUB64mi8_EVEX |
| 42332 | { 4824, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060025ULL }, // Inst #4824 = SUB64mi8 |
| 42333 | { 4823, 7, 1, 0, 920, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c0e0230025ULL }, // Inst #4823 = SUB64mi32_NF_ND |
| 42334 | { 4822, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0230025ULL }, // Inst #4822 = SUB64mi32_NF |
| 42335 | { 4821, 7, 1, 0, 920, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c0e0230025ULL }, // Inst #4821 = SUB64mi32_ND |
| 42336 | { 4820, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230025ULL }, // Inst #4820 = SUB64mi32_EVEX |
| 42337 | { 4819, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220025ULL }, // Inst #4819 = SUB64mi32 |
| 42338 | { 4818, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 72, 0|(1ULL<<MCID::Compare), 0x1680220001ULL }, // Inst #4818 = SUB64i32 |
| 42339 | { 4817, 3, 1, 0, 1050, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1580000129ULL }, // Inst #4817 = SUB32rr_REV |
| 42340 | { 4816, 3, 1, 0, 1, 0, 0, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x100015e0010029ULL }, // Inst #4816 = SUB32rr_NF_REV |
| 42341 | { 4815, 3, 1, 0, 1, 0, 0, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x101095e0010029ULL }, // Inst #4815 = SUB32rr_NF_ND_REV |
| 42342 | { 4814, 3, 1, 0, 1, 0, 0, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x101094e0010028ULL }, // Inst #4814 = SUB32rr_NF_ND |
| 42343 | { 4813, 3, 1, 0, 1, 0, 0, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x100014e0010028ULL }, // Inst #4813 = SUB32rr_NF |
| 42344 | { 4812, 3, 1, 0, 1, 0, 1, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1095e0010029ULL }, // Inst #4812 = SUB32rr_ND_REV |
| 42345 | { 4811, 3, 1, 0, 1, 0, 1, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1094e0010028ULL }, // Inst #4811 = SUB32rr_ND |
| 42346 | { 4810, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0xc0015e0010029ULL }, // Inst #4810 = SUB32rr_EVEX_REV |
| 42347 | { 4809, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0xc0014e0010028ULL }, // Inst #4809 = SUB32rr_EVEX |
| 42348 | { 4808, 3, 1, 0, 807, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1480000128ULL }, // Inst #4808 = SUB32rr |
| 42349 | { 4807, 7, 1, 0, 25, 0, 0, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101095e0010019ULL }, // Inst #4807 = SUB32rm_NF_ND |
| 42350 | { 4806, 7, 1, 0, 25, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x100015e0010019ULL }, // Inst #4806 = SUB32rm_NF |
| 42351 | { 4805, 7, 1, 0, 25, 0, 1, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1095e0010019ULL }, // Inst #4805 = SUB32rm_ND |
| 42352 | { 4804, 7, 1, 0, 25, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0xc0015e0010019ULL }, // Inst #4804 = SUB32rm_EVEX |
| 42353 | { 4803, 7, 1, 0, 1450, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580000119ULL }, // Inst #4803 = SUB32rm |
| 42354 | { 4802, 3, 1, 0, 1, 0, 0, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0190035ULL }, // Inst #4802 = SUB32ri_NF_ND |
| 42355 | { 4801, 3, 1, 0, 1, 0, 0, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0190035ULL }, // Inst #4801 = SUB32ri_NF |
| 42356 | { 4800, 3, 1, 0, 1, 0, 1, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0190035ULL }, // Inst #4800 = SUB32ri_ND |
| 42357 | { 4799, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0190035ULL }, // Inst #4799 = SUB32ri_EVEX |
| 42358 | { 4798, 3, 1, 0, 1, 0, 0, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0050035ULL }, // Inst #4798 = SUB32ri8_NF_ND |
| 42359 | { 4797, 3, 1, 0, 1, 0, 0, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0050035ULL }, // Inst #4797 = SUB32ri8_NF |
| 42360 | { 4796, 3, 1, 0, 1, 0, 1, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0050035ULL }, // Inst #4796 = SUB32ri8_ND |
| 42361 | { 4795, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0050035ULL }, // Inst #4795 = SUB32ri8_EVEX |
| 42362 | { 4794, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180040135ULL }, // Inst #4794 = SUB32ri8 |
| 42363 | { 4793, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x4080180135ULL }, // Inst #4793 = SUB32ri |
| 42364 | { 4792, 7, 1, 0, 920, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101094e0010018ULL }, // Inst #4792 = SUB32mr_NF_ND |
| 42365 | { 4791, 6, 0, 0, 922, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100014e0010018ULL }, // Inst #4791 = SUB32mr_NF |
| 42366 | { 4790, 7, 1, 0, 920, 0, 1, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1094e0010018ULL }, // Inst #4790 = SUB32mr_ND |
| 42367 | { 4789, 6, 0, 0, 921, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0014e0010018ULL }, // Inst #4789 = SUB32mr_EVEX |
| 42368 | { 4788, 6, 0, 0, 921, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480000118ULL }, // Inst #4788 = SUB32mr |
| 42369 | { 4787, 7, 1, 0, 920, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c0e0190025ULL }, // Inst #4787 = SUB32mi_NF_ND |
| 42370 | { 4786, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0190025ULL }, // Inst #4786 = SUB32mi_NF |
| 42371 | { 4785, 7, 1, 0, 920, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c0e0190025ULL }, // Inst #4785 = SUB32mi_ND |
| 42372 | { 4784, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190025ULL }, // Inst #4784 = SUB32mi_EVEX |
| 42373 | { 4783, 7, 1, 0, 920, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c1e0050025ULL }, // Inst #4783 = SUB32mi8_NF_ND |
| 42374 | { 4782, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050025ULL }, // Inst #4782 = SUB32mi8_NF |
| 42375 | { 4781, 7, 1, 0, 920, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c1e0050025ULL }, // Inst #4781 = SUB32mi8_ND |
| 42376 | { 4780, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050025ULL }, // Inst #4780 = SUB32mi8_EVEX |
| 42377 | { 4779, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040125ULL }, // Inst #4779 = SUB32mi8 |
| 42378 | { 4778, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180125ULL }, // Inst #4778 = SUB32mi |
| 42379 | { 4777, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 69, 0|(1ULL<<MCID::Compare), 0x1680180101ULL }, // Inst #4777 = SUB32i32 |
| 42380 | { 4776, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x15800000a9ULL }, // Inst #4776 = SUB16rr_REV |
| 42381 | { 4775, 3, 1, 0, 1, 0, 0, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x100015e0010829ULL }, // Inst #4775 = SUB16rr_NF_REV |
| 42382 | { 4774, 3, 1, 0, 1, 0, 0, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x101095e0010829ULL }, // Inst #4774 = SUB16rr_NF_ND_REV |
| 42383 | { 4773, 3, 1, 0, 1, 0, 0, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x101094e0010828ULL }, // Inst #4773 = SUB16rr_NF_ND |
| 42384 | { 4772, 3, 1, 0, 1, 0, 0, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x100014e0010828ULL }, // Inst #4772 = SUB16rr_NF |
| 42385 | { 4771, 3, 1, 0, 1, 0, 1, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1095e0010829ULL }, // Inst #4771 = SUB16rr_ND_REV |
| 42386 | { 4770, 3, 1, 0, 1, 0, 1, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1094e0010828ULL }, // Inst #4770 = SUB16rr_ND |
| 42387 | { 4769, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0xc0015e0010829ULL }, // Inst #4769 = SUB16rr_EVEX_REV |
| 42388 | { 4768, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0xc0014e0010828ULL }, // Inst #4768 = SUB16rr_EVEX |
| 42389 | { 4767, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x14800000a8ULL }, // Inst #4767 = SUB16rr |
| 42390 | { 4766, 7, 1, 0, 25, 0, 0, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101095e0010819ULL }, // Inst #4766 = SUB16rm_NF_ND |
| 42391 | { 4765, 7, 1, 0, 25, 0, 0, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x100015e0010819ULL }, // Inst #4765 = SUB16rm_NF |
| 42392 | { 4764, 7, 1, 0, 25, 0, 1, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1095e0010819ULL }, // Inst #4764 = SUB16rm_ND |
| 42393 | { 4763, 7, 1, 0, 25, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0xc0015e0010819ULL }, // Inst #4763 = SUB16rm_EVEX |
| 42394 | { 4762, 7, 1, 0, 1450, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580000099ULL }, // Inst #4762 = SUB16rm |
| 42395 | { 4761, 3, 1, 0, 1, 0, 0, 362, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0110835ULL }, // Inst #4761 = SUB16ri_NF_ND |
| 42396 | { 4760, 3, 1, 0, 1, 0, 0, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0110835ULL }, // Inst #4760 = SUB16ri_NF |
| 42397 | { 4759, 3, 1, 0, 1, 0, 1, 362, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0110835ULL }, // Inst #4759 = SUB16ri_ND |
| 42398 | { 4758, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0110835ULL }, // Inst #4758 = SUB16ri_EVEX |
| 42399 | { 4757, 3, 1, 0, 1, 0, 0, 362, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0050835ULL }, // Inst #4757 = SUB16ri8_NF_ND |
| 42400 | { 4756, 3, 1, 0, 1, 0, 0, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0050835ULL }, // Inst #4756 = SUB16ri8_NF |
| 42401 | { 4755, 3, 1, 0, 1, 0, 1, 362, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0050835ULL }, // Inst #4755 = SUB16ri8_ND |
| 42402 | { 4754, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0050835ULL }, // Inst #4754 = SUB16ri8_EVEX |
| 42403 | { 4753, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x41800400b5ULL }, // Inst #4753 = SUB16ri8 |
| 42404 | { 4752, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x40801000b5ULL }, // Inst #4752 = SUB16ri |
| 42405 | { 4751, 7, 1, 0, 920, 0, 0, 355, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101094e0010818ULL }, // Inst #4751 = SUB16mr_NF_ND |
| 42406 | { 4750, 6, 0, 0, 922, 0, 0, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100014e0010818ULL }, // Inst #4750 = SUB16mr_NF |
| 42407 | { 4749, 7, 1, 0, 920, 0, 1, 355, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1094e0010818ULL }, // Inst #4749 = SUB16mr_ND |
| 42408 | { 4748, 6, 0, 0, 921, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0014e0010818ULL }, // Inst #4748 = SUB16mr_EVEX |
| 42409 | { 4747, 6, 0, 0, 921, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480000098ULL }, // Inst #4747 = SUB16mr |
| 42410 | { 4746, 7, 1, 0, 920, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c0e0110825ULL }, // Inst #4746 = SUB16mi_NF_ND |
| 42411 | { 4745, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0110825ULL }, // Inst #4745 = SUB16mi_NF |
| 42412 | { 4744, 7, 1, 0, 920, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c0e0110825ULL }, // Inst #4744 = SUB16mi_ND |
| 42413 | { 4743, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110825ULL }, // Inst #4743 = SUB16mi_EVEX |
| 42414 | { 4742, 7, 1, 0, 920, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c1e0050825ULL }, // Inst #4742 = SUB16mi8_NF_ND |
| 42415 | { 4741, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050825ULL }, // Inst #4741 = SUB16mi8_NF |
| 42416 | { 4740, 7, 1, 0, 920, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c1e0050825ULL }, // Inst #4740 = SUB16mi8_ND |
| 42417 | { 4739, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050825ULL }, // Inst #4739 = SUB16mi8_EVEX |
| 42418 | { 4738, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a5ULL }, // Inst #4738 = SUB16mi8 |
| 42419 | { 4737, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a5ULL }, // Inst #4737 = SUB16mi |
| 42420 | { 4736, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 46, 0|(1ULL<<MCID::Compare), 0x1680100081ULL }, // Inst #4736 = SUB16i16 |
| 42421 | { 4735, 1, 0, 0, 1495, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000032ULL }, // Inst #4735 = ST_Frr |
| 42422 | { 4734, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4734 = ST_FpP80m64 |
| 42423 | { 4733, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4733 = ST_FpP80m32 |
| 42424 | { 4732, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4732 = ST_FpP80m |
| 42425 | { 4731, 6, 0, 0, 141, 1, 1, 1072, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4731 = ST_FpP64m32 |
| 42426 | { 4730, 6, 0, 0, 141, 1, 1, 1072, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4730 = ST_FpP64m |
| 42427 | { 4729, 6, 0, 0, 141, 1, 1, 1066, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4729 = ST_FpP32m |
| 42428 | { 4728, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4728 = ST_Fp80m64 |
| 42429 | { 4727, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4727 = ST_Fp80m32 |
| 42430 | { 4726, 6, 0, 0, 141, 1, 1, 1072, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4726 = ST_Fp64m32 |
| 42431 | { 4725, 6, 0, 0, 141, 1, 1, 1072, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4725 = ST_Fp64m |
| 42432 | { 4724, 6, 0, 0, 141, 1, 1, 1066, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4724 = ST_Fp32m |
| 42433 | { 4723, 1, 0, 0, 643, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000033ULL }, // Inst #4723 = ST_FPrr |
| 42434 | { 4722, 5, 0, 0, 666, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000027ULL }, // Inst #4722 = ST_FP80m |
| 42435 | { 4721, 5, 0, 0, 834, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000023ULL }, // Inst #4721 = ST_FP64m |
| 42436 | { 4720, 5, 0, 0, 834, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000023ULL }, // Inst #4720 = ST_FP32m |
| 42437 | { 4719, 5, 0, 0, 642, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000022ULL }, // Inst #4719 = ST_F64m |
| 42438 | { 4718, 5, 0, 0, 642, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000022ULL }, // Inst #4718 = ST_F32m |
| 42439 | { 4717, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8000306fULL }, // Inst #4717 = STUI |
| 42440 | { 4716, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x24e0004820ULL }, // Inst #4716 = STTILECFG_EVEX |
| 42441 | { 4715, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x24a0004820ULL }, // Inst #4715 = STTILECFG |
| 42442 | { 4714, 5, 0, 0, 1566, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2021ULL }, // Inst #4714 = STRm |
| 42443 | { 4713, 1, 1, 0, 873, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x22031ULL }, // Inst #4713 = STR64r |
| 42444 | { 4712, 1, 1, 0, 873, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2131ULL }, // Inst #4712 = STR32r |
| 42445 | { 4711, 1, 1, 0, 1550, 0, 0, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20b1ULL }, // Inst #4711 = STR16r |
| 42446 | { 4710, 1, 0, 0, 765, 3, 1, 1102, X86ImpOpBase + 554, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580000085ULL }, // Inst #4710 = STOSW |
| 42447 | { 4709, 1, 0, 0, 765, 3, 1, 1102, X86ImpOpBase + 550, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580020005ULL }, // Inst #4709 = STOSQ |
| 42448 | { 4708, 1, 0, 0, 765, 3, 1, 1102, X86ImpOpBase + 546, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580000105ULL }, // Inst #4708 = STOSL |
| 42449 | { 4707, 1, 0, 0, 1630, 3, 1, 1102, X86ImpOpBase + 542, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5500000005ULL }, // Inst #4707 = STOSB |
| 42450 | { 4706, 5, 0, 0, 332, 1, 0, 232, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002023ULL }, // Inst #4706 = STMXCSR |
| 42451 | { 4705, 0, 0, 0, 1629, 1, 1, 1, X86ImpOpBase + 31, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d80000001ULL }, // Inst #4705 = STI |
| 42452 | { 4704, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205cULL }, // Inst #4704 = STGI |
| 42453 | { 4703, 0, 0, 0, 699, 0, 1, 1, X86ImpOpBase + 121, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7e80000001ULL }, // Inst #4703 = STD |
| 42454 | { 4702, 0, 0, 0, 1, 1, 1, 1, X86ImpOpBase + 31, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c80000001ULL }, // Inst #4702 = STC |
| 42455 | { 4701, 1, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4701 = STACKALLOC_W_PROBING |
| 42456 | { 4700, 0, 0, 0, 1208, 0, 1, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000204bULL }, // Inst #4700 = STAC |
| 42457 | { 4699, 0, 0, 0, 31, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1b0000000aULL }, // Inst #4699 = SS_PREFIX |
| 42458 | { 4698, 2, 1, 0, 331, 1, 1, 334, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4698 = SQRT_Fp80 |
| 42459 | { 4697, 2, 1, 0, 331, 1, 1, 332, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4697 = SQRT_Fp64 |
| 42460 | { 4696, 2, 1, 0, 331, 1, 1, 330, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4696 = SQRT_Fp32 |
| 42461 | { 4695, 0, 0, 0, 331, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007aULL }, // Inst #4695 = SQRT_F |
| 42462 | { 4694, 3, 1, 0, 330, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2888003029ULL }, // Inst #4694 = SQRTSSr_Int |
| 42463 | { 4693, 2, 1, 0, 330, 1, 0, 1008, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2888003029ULL }, // Inst #4693 = SQRTSSr |
| 42464 | { 4692, 7, 1, 0, 329, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2888003019ULL }, // Inst #4692 = SQRTSSm_Int |
| 42465 | { 4691, 6, 1, 0, 328, 1, 0, 1002, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2888003019ULL }, // Inst #4691 = SQRTSSm |
| 42466 | { 4690, 3, 1, 0, 327, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2890003829ULL }, // Inst #4690 = SQRTSDr_Int |
| 42467 | { 4689, 2, 1, 0, 327, 1, 0, 1000, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2890003829ULL }, // Inst #4689 = SQRTSDr |
| 42468 | { 4688, 7, 1, 0, 1628, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2890003819ULL }, // Inst #4688 = SQRTSDm_Int |
| 42469 | { 4687, 6, 1, 0, 325, 1, 0, 994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2890003819ULL }, // Inst #4687 = SQRTSDm |
| 42470 | { 4686, 2, 1, 0, 324, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2888002029ULL }, // Inst #4686 = SQRTPSr |
| 42471 | { 4685, 6, 1, 0, 323, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2888002019ULL }, // Inst #4685 = SQRTPSm |
| 42472 | { 4684, 2, 1, 0, 322, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2890002829ULL }, // Inst #4684 = SQRTPDr |
| 42473 | { 4683, 6, 1, 0, 321, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2890002819ULL }, // Inst #4683 = SQRTPDm |
| 42474 | { 4682, 1, 1, 0, 1627, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80022034ULL }, // Inst #4682 = SMSW64r |
| 42475 | { 4681, 1, 1, 0, 1627, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002134ULL }, // Inst #4681 = SMSW32r |
| 42476 | { 4680, 1, 1, 0, 1626, 0, 0, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800020b4ULL }, // Inst #4680 = SMSW16r |
| 42477 | { 4679, 5, 0, 0, 1503, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002024ULL }, // Inst #4679 = SMSW16m |
| 42478 | { 4678, 1, 1, 0, 8, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x94002a031ULL }, // Inst #4678 = SLWPCB64 |
| 42479 | { 4677, 1, 1, 0, 8, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x94000a031ULL }, // Inst #4677 = SLWPCB |
| 42480 | { 4676, 1, 1, 0, 783, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x22030ULL }, // Inst #4676 = SLDT64r |
| 42481 | { 4675, 1, 1, 0, 783, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2130ULL }, // Inst #4675 = SLDT32r |
| 42482 | { 4674, 1, 1, 0, 1549, 0, 0, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20b0ULL }, // Inst #4674 = SLDT16r |
| 42483 | { 4673, 5, 0, 0, 1565, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2020ULL }, // Inst #4673 = SLDT16m |
| 42484 | { 4672, 0, 0, 0, 8, 1, 0, 1, X86ImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205eULL }, // Inst #4672 = SKINIT |
| 42485 | { 4671, 5, 0, 0, 842, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002021ULL }, // Inst #4671 = SIDT64m |
| 42486 | { 4670, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002121ULL }, // Inst #4670 = SIDT32m |
| 42487 | { 4669, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800020a1ULL }, // Inst #4669 = SIDT16m |
| 42488 | { 4668, 4, 1, 0, 1482, 0, 0, 585, X86ImpOpBase + 0, 0, 0x6308042029ULL }, // Inst #4668 = SHUFPSrri |
| 42489 | { 4667, 8, 1, 0, 1572, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6308042019ULL }, // Inst #4667 = SHUFPSrmi |
| 42490 | { 4666, 4, 1, 0, 1482, 0, 0, 585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6310042829ULL }, // Inst #4666 = SHUFPDrri |
| 42491 | { 4665, 8, 1, 0, 1572, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6310042819ULL }, // Inst #4665 = SHUFPDrmi |
| 42492 | { 4664, 3, 1, 0, 301, 0, 0, 444, X86ImpOpBase + 0, 0, 0x7be002582aULL }, // Inst #4664 = SHRX64rr_EVEX |
| 42493 | { 4663, 3, 1, 0, 1623, 0, 0, 444, X86ImpOpBase + 0, 0, 0x7ba002582aULL }, // Inst #4663 = SHRX64rr |
| 42494 | { 4662, 7, 1, 0, 315, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7be002581aULL }, // Inst #4662 = SHRX64rm_EVEX |
| 42495 | { 4661, 7, 1, 0, 1622, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ba002581aULL }, // Inst #4661 = SHRX64rm |
| 42496 | { 4660, 3, 1, 0, 301, 0, 0, 226, X86ImpOpBase + 0, 0, 0x7be000582aULL }, // Inst #4660 = SHRX32rr_EVEX |
| 42497 | { 4659, 3, 1, 0, 1623, 0, 0, 226, X86ImpOpBase + 0, 0, 0x7ba000582aULL }, // Inst #4659 = SHRX32rr |
| 42498 | { 4658, 7, 1, 0, 315, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7be000581aULL }, // Inst #4658 = SHRX32rm_EVEX |
| 42499 | { 4657, 7, 1, 0, 1622, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ba000581aULL }, // Inst #4657 = SHRX32rm |
| 42500 | { 4656, 4, 1, 0, 12, 0, 0, 1553, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10109660070028ULL }, // Inst #4656 = SHRD64rri8_NF_ND |
| 42501 | { 4655, 4, 1, 0, 12, 0, 0, 1549, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10001660070028ULL }, // Inst #4655 = SHRD64rri8_NF |
| 42502 | { 4654, 4, 1, 0, 12, 0, 1, 1553, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x109660070028ULL }, // Inst #4654 = SHRD64rri8_ND |
| 42503 | { 4653, 4, 1, 0, 12, 0, 1, 1549, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc001660070028ULL }, // Inst #4653 = SHRD64rri8_EVEX |
| 42504 | { 4652, 4, 1, 0, 686, 0, 1, 1549, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x5600062028ULL }, // Inst #4652 = SHRD64rri8 |
| 42505 | { 4651, 3, 1, 0, 936, 1, 0, 444, X86ImpOpBase + 517, 0, 0x1010d6e0030028ULL }, // Inst #4651 = SHRD64rrCL_NF_ND |
| 42506 | { 4650, 3, 1, 0, 936, 1, 0, 167, X86ImpOpBase + 517, 0, 0x100056e0030028ULL }, // Inst #4650 = SHRD64rrCL_NF |
| 42507 | { 4649, 3, 1, 0, 936, 1, 1, 444, X86ImpOpBase + 515, 0, 0x10d6e0030028ULL }, // Inst #4649 = SHRD64rrCL_ND |
| 42508 | { 4648, 3, 1, 0, 936, 1, 1, 167, X86ImpOpBase + 515, 0, 0xc0056e0030028ULL }, // Inst #4648 = SHRD64rrCL_EVEX |
| 42509 | { 4647, 3, 1, 0, 680, 1, 1, 167, X86ImpOpBase + 515, 0, 0x5680022028ULL }, // Inst #4647 = SHRD64rrCL |
| 42510 | { 4646, 8, 1, 0, 935, 0, 0, 1541, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10109660070018ULL }, // Inst #4646 = SHRD64mri8_NF_ND |
| 42511 | { 4645, 7, 0, 0, 935, 0, 0, 1534, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001660070018ULL }, // Inst #4645 = SHRD64mri8_NF |
| 42512 | { 4644, 8, 1, 0, 935, 0, 1, 1541, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x109660070018ULL }, // Inst #4644 = SHRD64mri8_ND |
| 42513 | { 4643, 7, 0, 0, 935, 0, 1, 1534, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001660070018ULL }, // Inst #4643 = SHRD64mri8_EVEX |
| 42514 | { 4642, 7, 0, 0, 685, 0, 1, 1534, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600062018ULL }, // Inst #4642 = SHRD64mri8 |
| 42515 | { 4641, 7, 1, 0, 937, 1, 0, 420, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010d6e0030018ULL }, // Inst #4641 = SHRD64mrCL_NF_ND |
| 42516 | { 4640, 6, 0, 0, 937, 1, 0, 211, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100056e0030018ULL }, // Inst #4640 = SHRD64mrCL_NF |
| 42517 | { 4639, 7, 1, 0, 937, 1, 1, 420, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10d6e0030018ULL }, // Inst #4639 = SHRD64mrCL_ND |
| 42518 | { 4638, 6, 0, 0, 937, 1, 1, 211, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0056e0030018ULL }, // Inst #4638 = SHRD64mrCL_EVEX |
| 42519 | { 4637, 6, 0, 0, 684, 1, 1, 211, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680022018ULL }, // Inst #4637 = SHRD64mrCL |
| 42520 | { 4636, 4, 1, 0, 12, 0, 0, 867, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10109660050028ULL }, // Inst #4636 = SHRD32rri8_NF_ND |
| 42521 | { 4635, 4, 1, 0, 12, 0, 0, 1530, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10001660050028ULL }, // Inst #4635 = SHRD32rri8_NF |
| 42522 | { 4634, 4, 1, 0, 12, 0, 1, 867, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x109660050028ULL }, // Inst #4634 = SHRD32rri8_ND |
| 42523 | { 4633, 4, 1, 0, 12, 0, 1, 1530, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc001660050028ULL }, // Inst #4633 = SHRD32rri8_EVEX |
| 42524 | { 4632, 4, 1, 0, 12, 0, 1, 1530, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x5600042128ULL }, // Inst #4632 = SHRD32rri8 |
| 42525 | { 4631, 3, 1, 0, 936, 1, 0, 226, X86ImpOpBase + 517, 0, 0x1010d6e0010028ULL }, // Inst #4631 = SHRD32rrCL_NF_ND |
| 42526 | { 4630, 3, 1, 0, 936, 1, 0, 161, X86ImpOpBase + 517, 0, 0x100056e0010028ULL }, // Inst #4630 = SHRD32rrCL_NF |
| 42527 | { 4629, 3, 1, 0, 936, 1, 1, 226, X86ImpOpBase + 515, 0, 0x10d6e0010028ULL }, // Inst #4629 = SHRD32rrCL_ND |
| 42528 | { 4628, 3, 1, 0, 936, 1, 1, 161, X86ImpOpBase + 515, 0, 0xc0056e0010028ULL }, // Inst #4628 = SHRD32rrCL_EVEX |
| 42529 | { 4627, 3, 1, 0, 1173, 1, 1, 161, X86ImpOpBase + 515, 0, 0x5680002128ULL }, // Inst #4627 = SHRD32rrCL |
| 42530 | { 4626, 8, 1, 0, 935, 0, 0, 1522, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10109660050018ULL }, // Inst #4626 = SHRD32mri8_NF_ND |
| 42531 | { 4625, 7, 0, 0, 935, 0, 0, 1515, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001660050018ULL }, // Inst #4625 = SHRD32mri8_NF |
| 42532 | { 4624, 8, 1, 0, 935, 0, 1, 1522, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x109660050018ULL }, // Inst #4624 = SHRD32mri8_ND |
| 42533 | { 4623, 7, 0, 0, 935, 0, 1, 1515, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001660050018ULL }, // Inst #4623 = SHRD32mri8_EVEX |
| 42534 | { 4622, 7, 0, 0, 935, 0, 1, 1515, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600042118ULL }, // Inst #4622 = SHRD32mri8 |
| 42535 | { 4621, 7, 1, 0, 937, 1, 0, 389, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010d6e0010018ULL }, // Inst #4621 = SHRD32mrCL_NF_ND |
| 42536 | { 4620, 6, 0, 0, 937, 1, 0, 324, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100056e0010018ULL }, // Inst #4620 = SHRD32mrCL_NF |
| 42537 | { 4619, 7, 1, 0, 937, 1, 1, 389, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10d6e0010018ULL }, // Inst #4619 = SHRD32mrCL_ND |
| 42538 | { 4618, 6, 0, 0, 937, 1, 1, 324, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0056e0010018ULL }, // Inst #4618 = SHRD32mrCL_EVEX |
| 42539 | { 4617, 6, 0, 0, 937, 1, 1, 324, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680002118ULL }, // Inst #4617 = SHRD32mrCL |
| 42540 | { 4616, 4, 1, 0, 12, 0, 0, 863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10109660050828ULL }, // Inst #4616 = SHRD16rri8_NF_ND |
| 42541 | { 4615, 4, 1, 0, 12, 0, 0, 1511, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10001660050828ULL }, // Inst #4615 = SHRD16rri8_NF |
| 42542 | { 4614, 4, 1, 0, 12, 0, 1, 863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x109660050828ULL }, // Inst #4614 = SHRD16rri8_ND |
| 42543 | { 4613, 4, 1, 0, 12, 0, 1, 1511, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc001660050828ULL }, // Inst #4613 = SHRD16rri8_EVEX |
| 42544 | { 4612, 4, 1, 0, 672, 0, 1, 1511, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x56000420a8ULL }, // Inst #4612 = SHRD16rri8 |
| 42545 | { 4611, 3, 1, 0, 936, 1, 0, 379, X86ImpOpBase + 517, 0, 0x1010d6e0010828ULL }, // Inst #4611 = SHRD16rrCL_NF_ND |
| 42546 | { 4610, 3, 1, 0, 936, 1, 0, 155, X86ImpOpBase + 517, 0, 0x100056e0010828ULL }, // Inst #4610 = SHRD16rrCL_NF |
| 42547 | { 4609, 3, 1, 0, 936, 1, 1, 379, X86ImpOpBase + 515, 0, 0x10d6e0010828ULL }, // Inst #4609 = SHRD16rrCL_ND |
| 42548 | { 4608, 3, 1, 0, 936, 1, 1, 155, X86ImpOpBase + 515, 0, 0xc0056e0010828ULL }, // Inst #4608 = SHRD16rrCL_EVEX |
| 42549 | { 4607, 3, 1, 0, 671, 1, 1, 155, X86ImpOpBase + 515, 0, 0x56800020a8ULL }, // Inst #4607 = SHRD16rrCL |
| 42550 | { 4606, 8, 1, 0, 935, 0, 0, 1503, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10109660050818ULL }, // Inst #4606 = SHRD16mri8_NF_ND |
| 42551 | { 4605, 7, 0, 0, 935, 0, 0, 1496, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001660050818ULL }, // Inst #4605 = SHRD16mri8_NF |
| 42552 | { 4604, 8, 1, 0, 935, 0, 1, 1503, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x109660050818ULL }, // Inst #4604 = SHRD16mri8_ND |
| 42553 | { 4603, 7, 0, 0, 935, 0, 1, 1496, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001660050818ULL }, // Inst #4603 = SHRD16mri8_EVEX |
| 42554 | { 4602, 7, 0, 0, 1625, 0, 1, 1496, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600042098ULL }, // Inst #4602 = SHRD16mri8 |
| 42555 | { 4601, 7, 1, 0, 937, 1, 0, 355, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010d6e0010818ULL }, // Inst #4601 = SHRD16mrCL_NF_ND |
| 42556 | { 4600, 6, 0, 0, 937, 1, 0, 349, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100056e0010818ULL }, // Inst #4600 = SHRD16mrCL_NF |
| 42557 | { 4599, 7, 1, 0, 937, 1, 1, 355, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10d6e0010818ULL }, // Inst #4599 = SHRD16mrCL_ND |
| 42558 | { 4598, 6, 0, 0, 937, 1, 1, 349, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0056e0010818ULL }, // Inst #4598 = SHRD16mrCL_EVEX |
| 42559 | { 4597, 6, 0, 0, 673, 1, 1, 349, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680002098ULL }, // Inst #4597 = SHRD16mrCL |
| 42560 | { 4596, 3, 1, 0, 301, 0, 0, 467, X86ImpOpBase + 0, 0, 0x1010e060050035ULL }, // Inst #4596 = SHR8ri_NF_ND |
| 42561 | { 4595, 3, 1, 0, 301, 0, 0, 170, X86ImpOpBase + 0, 0, 0x10006060050035ULL }, // Inst #4595 = SHR8ri_NF |
| 42562 | { 4594, 3, 1, 0, 301, 0, 1, 467, X86ImpOpBase + 0, 0, 0x10e060050035ULL }, // Inst #4594 = SHR8ri_ND |
| 42563 | { 4593, 3, 1, 0, 301, 0, 1, 170, X86ImpOpBase + 0, 0, 0xc006060050035ULL }, // Inst #4593 = SHR8ri_EVEX |
| 42564 | { 4592, 3, 1, 0, 301, 0, 1, 170, X86ImpOpBase + 0, 0, 0x6000040035ULL }, // Inst #4592 = SHR8ri |
| 42565 | { 4591, 2, 1, 0, 314, 1, 0, 947, X86ImpOpBase + 517, 0, 0x1010e960010035ULL }, // Inst #4591 = SHR8rCL_NF_ND |
| 42566 | { 4590, 2, 1, 0, 314, 1, 0, 1049, X86ImpOpBase + 517, 0, 0x10006960010035ULL }, // Inst #4590 = SHR8rCL_NF |
| 42567 | { 4589, 2, 1, 0, 314, 1, 1, 947, X86ImpOpBase + 515, 0, 0x10e960010035ULL }, // Inst #4589 = SHR8rCL_ND |
| 42568 | { 4588, 2, 1, 0, 314, 1, 1, 1049, X86ImpOpBase + 515, 0, 0xc006960010035ULL }, // Inst #4588 = SHR8rCL_EVEX |
| 42569 | { 4587, 2, 1, 0, 314, 1, 1, 1049, X86ImpOpBase + 515, 0, 0x6900000035ULL }, // Inst #4587 = SHR8rCL |
| 42570 | { 4586, 2, 1, 0, 301, 0, 0, 947, X86ImpOpBase + 0, 0, 0x1010e860010035ULL }, // Inst #4586 = SHR8r1_NF_ND |
| 42571 | { 4585, 2, 1, 0, 301, 0, 0, 1049, X86ImpOpBase + 0, 0, 0x10006860010035ULL }, // Inst #4585 = SHR8r1_NF |
| 42572 | { 4584, 2, 1, 0, 301, 0, 1, 947, X86ImpOpBase + 0, 0, 0x10e860010035ULL }, // Inst #4584 = SHR8r1_ND |
| 42573 | { 4583, 2, 1, 0, 301, 0, 1, 1049, X86ImpOpBase + 0, 0, 0xc006860010035ULL }, // Inst #4583 = SHR8r1_EVEX |
| 42574 | { 4582, 2, 1, 0, 301, 0, 1, 1049, X86ImpOpBase + 0, 0, 0x6800000035ULL }, // Inst #4582 = SHR8r1 |
| 42575 | { 4581, 7, 1, 0, 610, 0, 0, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e060050025ULL }, // Inst #4581 = SHR8mi_NF_ND |
| 42576 | { 4580, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006060050025ULL }, // Inst #4580 = SHR8mi_NF |
| 42577 | { 4579, 7, 1, 0, 610, 0, 1, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e060050025ULL }, // Inst #4579 = SHR8mi_ND |
| 42578 | { 4578, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050025ULL }, // Inst #4578 = SHR8mi_EVEX |
| 42579 | { 4577, 6, 0, 0, 1621, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040025ULL }, // Inst #4577 = SHR8mi |
| 42580 | { 4576, 6, 1, 0, 612, 1, 0, 941, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e960010025ULL }, // Inst #4576 = SHR8mCL_NF_ND |
| 42581 | { 4575, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006960010025ULL }, // Inst #4575 = SHR8mCL_NF |
| 42582 | { 4574, 6, 1, 0, 612, 1, 1, 941, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e960010025ULL }, // Inst #4574 = SHR8mCL_ND |
| 42583 | { 4573, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010025ULL }, // Inst #4573 = SHR8mCL_EVEX |
| 42584 | { 4572, 5, 0, 0, 1620, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000025ULL }, // Inst #4572 = SHR8mCL |
| 42585 | { 4571, 6, 1, 0, 610, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e860010025ULL }, // Inst #4571 = SHR8m1_NF_ND |
| 42586 | { 4570, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006860010025ULL }, // Inst #4570 = SHR8m1_NF |
| 42587 | { 4569, 6, 1, 0, 610, 0, 1, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e860010025ULL }, // Inst #4569 = SHR8m1_ND |
| 42588 | { 4568, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010025ULL }, // Inst #4568 = SHR8m1_EVEX |
| 42589 | { 4567, 5, 0, 0, 1621, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000025ULL }, // Inst #4567 = SHR8m1 |
| 42590 | { 4566, 3, 1, 0, 301, 0, 0, 427, X86ImpOpBase + 0, 0, 0x1010e0e0070035ULL }, // Inst #4566 = SHR64ri_NF_ND |
| 42591 | { 4565, 3, 1, 0, 301, 0, 0, 164, X86ImpOpBase + 0, 0, 0x100060e0070035ULL }, // Inst #4565 = SHR64ri_NF |
| 42592 | { 4564, 3, 1, 0, 301, 0, 1, 427, X86ImpOpBase + 0, 0, 0x10e0e0070035ULL }, // Inst #4564 = SHR64ri_ND |
| 42593 | { 4563, 3, 1, 0, 301, 0, 1, 164, X86ImpOpBase + 0, 0, 0xc0060e0070035ULL }, // Inst #4563 = SHR64ri_EVEX |
| 42594 | { 4562, 3, 1, 0, 301, 0, 1, 164, X86ImpOpBase + 0, 0, 0x6080060035ULL }, // Inst #4562 = SHR64ri |
| 42595 | { 4561, 2, 1, 0, 314, 1, 0, 575, X86ImpOpBase + 517, 0, 0x1010e9e0030035ULL }, // Inst #4561 = SHR64rCL_NF_ND |
| 42596 | { 4560, 2, 1, 0, 314, 1, 0, 322, X86ImpOpBase + 517, 0, 0x100069e0030035ULL }, // Inst #4560 = SHR64rCL_NF |
| 42597 | { 4559, 2, 1, 0, 314, 1, 1, 575, X86ImpOpBase + 515, 0, 0x10e9e0030035ULL }, // Inst #4559 = SHR64rCL_ND |
| 42598 | { 4558, 2, 1, 0, 314, 1, 1, 322, X86ImpOpBase + 515, 0, 0xc0069e0030035ULL }, // Inst #4558 = SHR64rCL_EVEX |
| 42599 | { 4557, 2, 1, 0, 314, 1, 1, 322, X86ImpOpBase + 515, 0, 0x6980020035ULL }, // Inst #4557 = SHR64rCL |
| 42600 | { 4556, 2, 1, 0, 301, 0, 0, 575, X86ImpOpBase + 0, 0, 0x1010e8e0030035ULL }, // Inst #4556 = SHR64r1_NF_ND |
| 42601 | { 4555, 2, 1, 0, 301, 0, 0, 322, X86ImpOpBase + 0, 0, 0x100068e0030035ULL }, // Inst #4555 = SHR64r1_NF |
| 42602 | { 4554, 2, 1, 0, 301, 0, 1, 575, X86ImpOpBase + 0, 0, 0x10e8e0030035ULL }, // Inst #4554 = SHR64r1_ND |
| 42603 | { 4553, 2, 1, 0, 301, 0, 1, 322, X86ImpOpBase + 0, 0, 0xc0068e0030035ULL }, // Inst #4553 = SHR64r1_EVEX |
| 42604 | { 4552, 2, 1, 0, 301, 0, 1, 322, X86ImpOpBase + 0, 0, 0x6880020035ULL }, // Inst #4552 = SHR64r1 |
| 42605 | { 4551, 7, 1, 0, 610, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0070025ULL }, // Inst #4551 = SHR64mi_NF_ND |
| 42606 | { 4550, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0070025ULL }, // Inst #4550 = SHR64mi_NF |
| 42607 | { 4549, 7, 1, 0, 610, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070025ULL }, // Inst #4549 = SHR64mi_ND |
| 42608 | { 4548, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070025ULL }, // Inst #4548 = SHR64mi_EVEX |
| 42609 | { 4547, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060025ULL }, // Inst #4547 = SHR64mi |
| 42610 | { 4546, 6, 1, 0, 612, 1, 0, 243, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0030025ULL }, // Inst #4546 = SHR64mCL_NF_ND |
| 42611 | { 4545, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0030025ULL }, // Inst #4545 = SHR64mCL_NF |
| 42612 | { 4544, 6, 1, 0, 612, 1, 1, 243, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030025ULL }, // Inst #4544 = SHR64mCL_ND |
| 42613 | { 4543, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030025ULL }, // Inst #4543 = SHR64mCL_EVEX |
| 42614 | { 4542, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020025ULL }, // Inst #4542 = SHR64mCL |
| 42615 | { 4541, 6, 1, 0, 610, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0030025ULL }, // Inst #4541 = SHR64m1_NF_ND |
| 42616 | { 4540, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0030025ULL }, // Inst #4540 = SHR64m1_NF |
| 42617 | { 4539, 6, 1, 0, 610, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030025ULL }, // Inst #4539 = SHR64m1_ND |
| 42618 | { 4538, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030025ULL }, // Inst #4538 = SHR64m1_EVEX |
| 42619 | { 4537, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020025ULL }, // Inst #4537 = SHR64m1 |
| 42620 | { 4536, 3, 1, 0, 301, 0, 0, 396, X86ImpOpBase + 0, 0, 0x1010e0e0050035ULL }, // Inst #4536 = SHR32ri_NF_ND |
| 42621 | { 4535, 3, 1, 0, 301, 0, 0, 158, X86ImpOpBase + 0, 0, 0x100060e0050035ULL }, // Inst #4535 = SHR32ri_NF |
| 42622 | { 4534, 3, 1, 0, 301, 0, 1, 396, X86ImpOpBase + 0, 0, 0x10e0e0050035ULL }, // Inst #4534 = SHR32ri_ND |
| 42623 | { 4533, 3, 1, 0, 301, 0, 1, 158, X86ImpOpBase + 0, 0, 0xc0060e0050035ULL }, // Inst #4533 = SHR32ri_EVEX |
| 42624 | { 4532, 3, 1, 0, 301, 0, 1, 158, X86ImpOpBase + 0, 0, 0x6080040135ULL }, // Inst #4532 = SHR32ri |
| 42625 | { 4531, 2, 1, 0, 314, 1, 0, 573, X86ImpOpBase + 517, 0, 0x1010e9e0010035ULL }, // Inst #4531 = SHR32rCL_NF_ND |
| 42626 | { 4530, 2, 1, 0, 314, 1, 0, 320, X86ImpOpBase + 517, 0, 0x100069e0010035ULL }, // Inst #4530 = SHR32rCL_NF |
| 42627 | { 4529, 2, 1, 0, 314, 1, 1, 573, X86ImpOpBase + 515, 0, 0x10e9e0010035ULL }, // Inst #4529 = SHR32rCL_ND |
| 42628 | { 4528, 2, 1, 0, 314, 1, 1, 320, X86ImpOpBase + 515, 0, 0xc0069e0010035ULL }, // Inst #4528 = SHR32rCL_EVEX |
| 42629 | { 4527, 2, 1, 0, 314, 1, 1, 320, X86ImpOpBase + 515, 0, 0x6980000135ULL }, // Inst #4527 = SHR32rCL |
| 42630 | { 4526, 2, 1, 0, 301, 0, 0, 573, X86ImpOpBase + 0, 0, 0x1010e8e0010035ULL }, // Inst #4526 = SHR32r1_NF_ND |
| 42631 | { 4525, 2, 1, 0, 301, 0, 0, 320, X86ImpOpBase + 0, 0, 0x100068e0010035ULL }, // Inst #4525 = SHR32r1_NF |
| 42632 | { 4524, 2, 1, 0, 301, 0, 1, 573, X86ImpOpBase + 0, 0, 0x10e8e0010035ULL }, // Inst #4524 = SHR32r1_ND |
| 42633 | { 4523, 2, 1, 0, 301, 0, 1, 320, X86ImpOpBase + 0, 0, 0xc0068e0010035ULL }, // Inst #4523 = SHR32r1_EVEX |
| 42634 | { 4522, 2, 1, 0, 301, 0, 1, 320, X86ImpOpBase + 0, 0, 0x6880000135ULL }, // Inst #4522 = SHR32r1 |
| 42635 | { 4521, 7, 1, 0, 610, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050025ULL }, // Inst #4521 = SHR32mi_NF_ND |
| 42636 | { 4520, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050025ULL }, // Inst #4520 = SHR32mi_NF |
| 42637 | { 4519, 7, 1, 0, 610, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050025ULL }, // Inst #4519 = SHR32mi_ND |
| 42638 | { 4518, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050025ULL }, // Inst #4518 = SHR32mi_EVEX |
| 42639 | { 4517, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040125ULL }, // Inst #4517 = SHR32mi |
| 42640 | { 4516, 6, 1, 0, 612, 1, 0, 237, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010025ULL }, // Inst #4516 = SHR32mCL_NF_ND |
| 42641 | { 4515, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010025ULL }, // Inst #4515 = SHR32mCL_NF |
| 42642 | { 4514, 6, 1, 0, 612, 1, 1, 237, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010025ULL }, // Inst #4514 = SHR32mCL_ND |
| 42643 | { 4513, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010025ULL }, // Inst #4513 = SHR32mCL_EVEX |
| 42644 | { 4512, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000125ULL }, // Inst #4512 = SHR32mCL |
| 42645 | { 4511, 6, 1, 0, 610, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010025ULL }, // Inst #4511 = SHR32m1_NF_ND |
| 42646 | { 4510, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010025ULL }, // Inst #4510 = SHR32m1_NF |
| 42647 | { 4509, 6, 1, 0, 610, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010025ULL }, // Inst #4509 = SHR32m1_ND |
| 42648 | { 4508, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010025ULL }, // Inst #4508 = SHR32m1_EVEX |
| 42649 | { 4507, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000125ULL }, // Inst #4507 = SHR32m1 |
| 42650 | { 4506, 3, 1, 0, 301, 0, 0, 362, X86ImpOpBase + 0, 0, 0x1010e0e0050835ULL }, // Inst #4506 = SHR16ri_NF_ND |
| 42651 | { 4505, 3, 1, 0, 301, 0, 0, 152, X86ImpOpBase + 0, 0, 0x100060e0050835ULL }, // Inst #4505 = SHR16ri_NF |
| 42652 | { 4504, 3, 1, 0, 301, 0, 1, 362, X86ImpOpBase + 0, 0, 0x10e0e0050835ULL }, // Inst #4504 = SHR16ri_ND |
| 42653 | { 4503, 3, 1, 0, 301, 0, 1, 152, X86ImpOpBase + 0, 0, 0xc0060e0050835ULL }, // Inst #4503 = SHR16ri_EVEX |
| 42654 | { 4502, 3, 1, 0, 301, 0, 1, 152, X86ImpOpBase + 0, 0, 0x60800400b5ULL }, // Inst #4502 = SHR16ri |
| 42655 | { 4501, 2, 1, 0, 314, 1, 0, 569, X86ImpOpBase + 517, 0, 0x1010e9e0010835ULL }, // Inst #4501 = SHR16rCL_NF_ND |
| 42656 | { 4500, 2, 1, 0, 314, 1, 0, 595, X86ImpOpBase + 517, 0, 0x100069e0010835ULL }, // Inst #4500 = SHR16rCL_NF |
| 42657 | { 4499, 2, 1, 0, 314, 1, 1, 569, X86ImpOpBase + 515, 0, 0x10e9e0010835ULL }, // Inst #4499 = SHR16rCL_ND |
| 42658 | { 4498, 2, 1, 0, 314, 1, 1, 595, X86ImpOpBase + 515, 0, 0xc0069e0010835ULL }, // Inst #4498 = SHR16rCL_EVEX |
| 42659 | { 4497, 2, 1, 0, 314, 1, 1, 595, X86ImpOpBase + 515, 0, 0x69800000b5ULL }, // Inst #4497 = SHR16rCL |
| 42660 | { 4496, 2, 1, 0, 301, 0, 0, 569, X86ImpOpBase + 0, 0, 0x1010e8e0010835ULL }, // Inst #4496 = SHR16r1_NF_ND |
| 42661 | { 4495, 2, 1, 0, 301, 0, 0, 595, X86ImpOpBase + 0, 0, 0x100068e0010835ULL }, // Inst #4495 = SHR16r1_NF |
| 42662 | { 4494, 2, 1, 0, 301, 0, 1, 569, X86ImpOpBase + 0, 0, 0x10e8e0010835ULL }, // Inst #4494 = SHR16r1_ND |
| 42663 | { 4493, 2, 1, 0, 301, 0, 1, 595, X86ImpOpBase + 0, 0, 0xc0068e0010835ULL }, // Inst #4493 = SHR16r1_EVEX |
| 42664 | { 4492, 2, 1, 0, 301, 0, 1, 595, X86ImpOpBase + 0, 0, 0x68800000b5ULL }, // Inst #4492 = SHR16r1 |
| 42665 | { 4491, 7, 1, 0, 610, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050825ULL }, // Inst #4491 = SHR16mi_NF_ND |
| 42666 | { 4490, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050825ULL }, // Inst #4490 = SHR16mi_NF |
| 42667 | { 4489, 7, 1, 0, 610, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050825ULL }, // Inst #4489 = SHR16mi_ND |
| 42668 | { 4488, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050825ULL }, // Inst #4488 = SHR16mi_EVEX |
| 42669 | { 4487, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a5ULL }, // Inst #4487 = SHR16mi |
| 42670 | { 4486, 6, 1, 0, 612, 1, 0, 589, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010825ULL }, // Inst #4486 = SHR16mCL_NF_ND |
| 42671 | { 4485, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010825ULL }, // Inst #4485 = SHR16mCL_NF |
| 42672 | { 4484, 6, 1, 0, 612, 1, 1, 589, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010825ULL }, // Inst #4484 = SHR16mCL_ND |
| 42673 | { 4483, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010825ULL }, // Inst #4483 = SHR16mCL_EVEX |
| 42674 | { 4482, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a5ULL }, // Inst #4482 = SHR16mCL |
| 42675 | { 4481, 6, 1, 0, 610, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010825ULL }, // Inst #4481 = SHR16m1_NF_ND |
| 42676 | { 4480, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010825ULL }, // Inst #4480 = SHR16m1_NF |
| 42677 | { 4479, 6, 1, 0, 610, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010825ULL }, // Inst #4479 = SHR16m1_ND |
| 42678 | { 4478, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010825ULL }, // Inst #4478 = SHR16m1_EVEX |
| 42679 | { 4477, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a5ULL }, // Inst #4477 = SHR16m1 |
| 42680 | { 4476, 3, 1, 0, 301, 0, 0, 444, X86ImpOpBase + 0, 0, 0x7be002482aULL }, // Inst #4476 = SHLX64rr_EVEX |
| 42681 | { 4475, 3, 1, 0, 1623, 0, 0, 444, X86ImpOpBase + 0, 0, 0x7ba002482aULL }, // Inst #4475 = SHLX64rr |
| 42682 | { 4474, 7, 1, 0, 315, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7be002481aULL }, // Inst #4474 = SHLX64rm_EVEX |
| 42683 | { 4473, 7, 1, 0, 1622, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ba002481aULL }, // Inst #4473 = SHLX64rm |
| 42684 | { 4472, 3, 1, 0, 301, 0, 0, 226, X86ImpOpBase + 0, 0, 0x7be000482aULL }, // Inst #4472 = SHLX32rr_EVEX |
| 42685 | { 4471, 3, 1, 0, 1623, 0, 0, 226, X86ImpOpBase + 0, 0, 0x7ba000482aULL }, // Inst #4471 = SHLX32rr |
| 42686 | { 4470, 7, 1, 0, 315, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7be000481aULL }, // Inst #4470 = SHLX32rm_EVEX |
| 42687 | { 4469, 7, 1, 0, 1622, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ba000481aULL }, // Inst #4469 = SHLX32rm |
| 42688 | { 4468, 4, 1, 0, 12, 0, 0, 1553, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10109260070028ULL }, // Inst #4468 = SHLD64rri8_NF_ND |
| 42689 | { 4467, 4, 1, 0, 12, 0, 0, 1549, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10001260070028ULL }, // Inst #4467 = SHLD64rri8_NF |
| 42690 | { 4466, 4, 1, 0, 12, 0, 1, 1553, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x109260070028ULL }, // Inst #4466 = SHLD64rri8_ND |
| 42691 | { 4465, 4, 1, 0, 12, 0, 1, 1549, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc001260070028ULL }, // Inst #4465 = SHLD64rri8_EVEX |
| 42692 | { 4464, 4, 1, 0, 686, 0, 1, 1549, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x5200062028ULL }, // Inst #4464 = SHLD64rri8 |
| 42693 | { 4463, 3, 1, 0, 936, 1, 0, 444, X86ImpOpBase + 517, 0, 0x1010d2e0030028ULL }, // Inst #4463 = SHLD64rrCL_NF_ND |
| 42694 | { 4462, 3, 1, 0, 936, 1, 0, 167, X86ImpOpBase + 517, 0, 0x100052e0030028ULL }, // Inst #4462 = SHLD64rrCL_NF |
| 42695 | { 4461, 3, 1, 0, 936, 1, 1, 444, X86ImpOpBase + 515, 0, 0x10d2e0030028ULL }, // Inst #4461 = SHLD64rrCL_ND |
| 42696 | { 4460, 3, 1, 0, 936, 1, 1, 167, X86ImpOpBase + 515, 0, 0xc0052e0030028ULL }, // Inst #4460 = SHLD64rrCL_EVEX |
| 42697 | { 4459, 3, 1, 0, 680, 1, 1, 167, X86ImpOpBase + 515, 0, 0x5280022028ULL }, // Inst #4459 = SHLD64rrCL |
| 42698 | { 4458, 8, 1, 0, 935, 0, 0, 1541, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10109260070018ULL }, // Inst #4458 = SHLD64mri8_NF_ND |
| 42699 | { 4457, 7, 0, 0, 935, 0, 0, 1534, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001260070018ULL }, // Inst #4457 = SHLD64mri8_NF |
| 42700 | { 4456, 8, 1, 0, 935, 0, 1, 1541, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x109260070018ULL }, // Inst #4456 = SHLD64mri8_ND |
| 42701 | { 4455, 7, 0, 0, 935, 0, 1, 1534, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001260070018ULL }, // Inst #4455 = SHLD64mri8_EVEX |
| 42702 | { 4454, 7, 0, 0, 685, 0, 1, 1534, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200062018ULL }, // Inst #4454 = SHLD64mri8 |
| 42703 | { 4453, 7, 1, 0, 937, 1, 0, 420, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010d2e0030018ULL }, // Inst #4453 = SHLD64mrCL_NF_ND |
| 42704 | { 4452, 6, 0, 0, 937, 1, 0, 211, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100052e0030018ULL }, // Inst #4452 = SHLD64mrCL_NF |
| 42705 | { 4451, 7, 1, 0, 937, 1, 1, 420, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10d2e0030018ULL }, // Inst #4451 = SHLD64mrCL_ND |
| 42706 | { 4450, 6, 0, 0, 937, 1, 1, 211, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0052e0030018ULL }, // Inst #4450 = SHLD64mrCL_EVEX |
| 42707 | { 4449, 6, 0, 0, 684, 1, 1, 211, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280022018ULL }, // Inst #4449 = SHLD64mrCL |
| 42708 | { 4448, 4, 1, 0, 12, 0, 0, 867, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10109260050028ULL }, // Inst #4448 = SHLD32rri8_NF_ND |
| 42709 | { 4447, 4, 1, 0, 12, 0, 0, 1530, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10001260050028ULL }, // Inst #4447 = SHLD32rri8_NF |
| 42710 | { 4446, 4, 1, 0, 12, 0, 1, 867, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x109260050028ULL }, // Inst #4446 = SHLD32rri8_ND |
| 42711 | { 4445, 4, 1, 0, 12, 0, 1, 1530, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc001260050028ULL }, // Inst #4445 = SHLD32rri8_EVEX |
| 42712 | { 4444, 4, 1, 0, 12, 0, 1, 1530, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x5200042128ULL }, // Inst #4444 = SHLD32rri8 |
| 42713 | { 4443, 3, 1, 0, 936, 1, 0, 226, X86ImpOpBase + 517, 0, 0x1010d2e0010028ULL }, // Inst #4443 = SHLD32rrCL_NF_ND |
| 42714 | { 4442, 3, 1, 0, 936, 1, 0, 161, X86ImpOpBase + 517, 0, 0x100052e0010028ULL }, // Inst #4442 = SHLD32rrCL_NF |
| 42715 | { 4441, 3, 1, 0, 936, 1, 1, 226, X86ImpOpBase + 515, 0, 0x10d2e0010028ULL }, // Inst #4441 = SHLD32rrCL_ND |
| 42716 | { 4440, 3, 1, 0, 936, 1, 1, 161, X86ImpOpBase + 515, 0, 0xc0052e0010028ULL }, // Inst #4440 = SHLD32rrCL_EVEX |
| 42717 | { 4439, 3, 1, 0, 1173, 1, 1, 161, X86ImpOpBase + 515, 0, 0x5280002128ULL }, // Inst #4439 = SHLD32rrCL |
| 42718 | { 4438, 8, 1, 0, 935, 0, 0, 1522, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10109260050018ULL }, // Inst #4438 = SHLD32mri8_NF_ND |
| 42719 | { 4437, 7, 0, 0, 935, 0, 0, 1515, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001260050018ULL }, // Inst #4437 = SHLD32mri8_NF |
| 42720 | { 4436, 8, 1, 0, 935, 0, 1, 1522, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x109260050018ULL }, // Inst #4436 = SHLD32mri8_ND |
| 42721 | { 4435, 7, 0, 0, 935, 0, 1, 1515, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001260050018ULL }, // Inst #4435 = SHLD32mri8_EVEX |
| 42722 | { 4434, 7, 0, 0, 935, 0, 1, 1515, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200042118ULL }, // Inst #4434 = SHLD32mri8 |
| 42723 | { 4433, 7, 1, 0, 937, 1, 0, 389, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010d2e0010018ULL }, // Inst #4433 = SHLD32mrCL_NF_ND |
| 42724 | { 4432, 6, 0, 0, 937, 1, 0, 324, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100052e0010018ULL }, // Inst #4432 = SHLD32mrCL_NF |
| 42725 | { 4431, 7, 1, 0, 937, 1, 1, 389, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10d2e0010018ULL }, // Inst #4431 = SHLD32mrCL_ND |
| 42726 | { 4430, 6, 0, 0, 937, 1, 1, 324, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0052e0010018ULL }, // Inst #4430 = SHLD32mrCL_EVEX |
| 42727 | { 4429, 6, 0, 0, 937, 1, 1, 324, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280002118ULL }, // Inst #4429 = SHLD32mrCL |
| 42728 | { 4428, 4, 1, 0, 12, 0, 0, 863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10109260050828ULL }, // Inst #4428 = SHLD16rri8_NF_ND |
| 42729 | { 4427, 4, 1, 0, 12, 0, 0, 1511, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10001260050828ULL }, // Inst #4427 = SHLD16rri8_NF |
| 42730 | { 4426, 4, 1, 0, 12, 0, 1, 863, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x109260050828ULL }, // Inst #4426 = SHLD16rri8_ND |
| 42731 | { 4425, 4, 1, 0, 12, 0, 1, 1511, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc001260050828ULL }, // Inst #4425 = SHLD16rri8_EVEX |
| 42732 | { 4424, 4, 1, 0, 672, 0, 1, 1511, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x52000420a8ULL }, // Inst #4424 = SHLD16rri8 |
| 42733 | { 4423, 3, 1, 0, 936, 1, 0, 379, X86ImpOpBase + 517, 0, 0x1010d2e0010828ULL }, // Inst #4423 = SHLD16rrCL_NF_ND |
| 42734 | { 4422, 3, 1, 0, 936, 1, 0, 155, X86ImpOpBase + 517, 0, 0x100052e0010828ULL }, // Inst #4422 = SHLD16rrCL_NF |
| 42735 | { 4421, 3, 1, 0, 936, 1, 1, 379, X86ImpOpBase + 515, 0, 0x10d2e0010828ULL }, // Inst #4421 = SHLD16rrCL_ND |
| 42736 | { 4420, 3, 1, 0, 936, 1, 1, 155, X86ImpOpBase + 515, 0, 0xc0052e0010828ULL }, // Inst #4420 = SHLD16rrCL_EVEX |
| 42737 | { 4419, 3, 1, 0, 1172, 1, 1, 155, X86ImpOpBase + 515, 0, 0x52800020a8ULL }, // Inst #4419 = SHLD16rrCL |
| 42738 | { 4418, 8, 1, 0, 935, 0, 0, 1503, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10109260050818ULL }, // Inst #4418 = SHLD16mri8_NF_ND |
| 42739 | { 4417, 7, 0, 0, 935, 0, 0, 1496, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001260050818ULL }, // Inst #4417 = SHLD16mri8_NF |
| 42740 | { 4416, 8, 1, 0, 935, 0, 1, 1503, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x109260050818ULL }, // Inst #4416 = SHLD16mri8_ND |
| 42741 | { 4415, 7, 0, 0, 935, 0, 1, 1496, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001260050818ULL }, // Inst #4415 = SHLD16mri8_EVEX |
| 42742 | { 4414, 7, 0, 0, 674, 0, 1, 1496, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200042098ULL }, // Inst #4414 = SHLD16mri8 |
| 42743 | { 4413, 7, 1, 0, 937, 1, 0, 355, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010d2e0010818ULL }, // Inst #4413 = SHLD16mrCL_NF_ND |
| 42744 | { 4412, 6, 0, 0, 937, 1, 0, 349, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100052e0010818ULL }, // Inst #4412 = SHLD16mrCL_NF |
| 42745 | { 4411, 7, 1, 0, 937, 1, 1, 355, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10d2e0010818ULL }, // Inst #4411 = SHLD16mrCL_ND |
| 42746 | { 4410, 6, 0, 0, 937, 1, 1, 349, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0052e0010818ULL }, // Inst #4410 = SHLD16mrCL_EVEX |
| 42747 | { 4409, 6, 0, 0, 673, 1, 1, 349, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280002098ULL }, // Inst #4409 = SHLD16mrCL |
| 42748 | { 4408, 3, 1, 0, 301, 0, 0, 467, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010e060050034ULL }, // Inst #4408 = SHL8ri_NF_ND |
| 42749 | { 4407, 3, 1, 0, 301, 0, 0, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10006060050034ULL }, // Inst #4407 = SHL8ri_NF |
| 42750 | { 4406, 3, 1, 0, 301, 0, 1, 467, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10e060050034ULL }, // Inst #4406 = SHL8ri_ND |
| 42751 | { 4405, 3, 1, 0, 301, 0, 1, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc006060050034ULL }, // Inst #4405 = SHL8ri_EVEX |
| 42752 | { 4404, 3, 1, 0, 301, 0, 1, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6000040034ULL }, // Inst #4404 = SHL8ri |
| 42753 | { 4403, 2, 1, 0, 314, 1, 0, 947, X86ImpOpBase + 517, 0, 0x1010e960010034ULL }, // Inst #4403 = SHL8rCL_NF_ND |
| 42754 | { 4402, 2, 1, 0, 314, 1, 0, 1049, X86ImpOpBase + 517, 0, 0x10006960010034ULL }, // Inst #4402 = SHL8rCL_NF |
| 42755 | { 4401, 2, 1, 0, 314, 1, 1, 947, X86ImpOpBase + 515, 0, 0x10e960010034ULL }, // Inst #4401 = SHL8rCL_ND |
| 42756 | { 4400, 2, 1, 0, 314, 1, 1, 1049, X86ImpOpBase + 515, 0, 0xc006960010034ULL }, // Inst #4400 = SHL8rCL_EVEX |
| 42757 | { 4399, 2, 1, 0, 314, 1, 1, 1049, X86ImpOpBase + 515, 0, 0x6900000034ULL }, // Inst #4399 = SHL8rCL |
| 42758 | { 4398, 2, 1, 0, 301, 0, 0, 947, X86ImpOpBase + 0, 0, 0x1010e860010034ULL }, // Inst #4398 = SHL8r1_NF_ND |
| 42759 | { 4397, 2, 1, 0, 301, 0, 0, 1049, X86ImpOpBase + 0, 0, 0x10006860010034ULL }, // Inst #4397 = SHL8r1_NF |
| 42760 | { 4396, 2, 1, 0, 301, 0, 1, 947, X86ImpOpBase + 0, 0, 0x10e860010034ULL }, // Inst #4396 = SHL8r1_ND |
| 42761 | { 4395, 2, 1, 0, 301, 0, 1, 1049, X86ImpOpBase + 0, 0, 0xc006860010034ULL }, // Inst #4395 = SHL8r1_EVEX |
| 42762 | { 4394, 2, 1, 0, 301, 0, 1, 1049, X86ImpOpBase + 0, 0, 0x6800000034ULL }, // Inst #4394 = SHL8r1 |
| 42763 | { 4393, 7, 1, 0, 610, 0, 0, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e060050024ULL }, // Inst #4393 = SHL8mi_NF_ND |
| 42764 | { 4392, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006060050024ULL }, // Inst #4392 = SHL8mi_NF |
| 42765 | { 4391, 7, 1, 0, 610, 0, 1, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e060050024ULL }, // Inst #4391 = SHL8mi_ND |
| 42766 | { 4390, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050024ULL }, // Inst #4390 = SHL8mi_EVEX |
| 42767 | { 4389, 6, 0, 0, 1621, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040024ULL }, // Inst #4389 = SHL8mi |
| 42768 | { 4388, 6, 1, 0, 612, 1, 0, 941, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e960010024ULL }, // Inst #4388 = SHL8mCL_NF_ND |
| 42769 | { 4387, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006960010024ULL }, // Inst #4387 = SHL8mCL_NF |
| 42770 | { 4386, 6, 1, 0, 612, 1, 1, 941, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e960010024ULL }, // Inst #4386 = SHL8mCL_ND |
| 42771 | { 4385, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010024ULL }, // Inst #4385 = SHL8mCL_EVEX |
| 42772 | { 4384, 5, 0, 0, 1620, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000024ULL }, // Inst #4384 = SHL8mCL |
| 42773 | { 4383, 6, 1, 0, 610, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e860010024ULL }, // Inst #4383 = SHL8m1_NF_ND |
| 42774 | { 4382, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006860010024ULL }, // Inst #4382 = SHL8m1_NF |
| 42775 | { 4381, 6, 1, 0, 610, 0, 1, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e860010024ULL }, // Inst #4381 = SHL8m1_ND |
| 42776 | { 4380, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010024ULL }, // Inst #4380 = SHL8m1_EVEX |
| 42777 | { 4379, 5, 0, 0, 1621, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000024ULL }, // Inst #4379 = SHL8m1 |
| 42778 | { 4378, 3, 1, 0, 301, 0, 0, 427, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010e0e0070034ULL }, // Inst #4378 = SHL64ri_NF_ND |
| 42779 | { 4377, 3, 1, 0, 301, 0, 0, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100060e0070034ULL }, // Inst #4377 = SHL64ri_NF |
| 42780 | { 4376, 3, 1, 0, 301, 0, 1, 427, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10e0e0070034ULL }, // Inst #4376 = SHL64ri_ND |
| 42781 | { 4375, 3, 1, 0, 301, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0060e0070034ULL }, // Inst #4375 = SHL64ri_EVEX |
| 42782 | { 4374, 3, 1, 0, 301, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6080060034ULL }, // Inst #4374 = SHL64ri |
| 42783 | { 4373, 2, 1, 0, 314, 1, 0, 575, X86ImpOpBase + 517, 0, 0x1010e9e0030034ULL }, // Inst #4373 = SHL64rCL_NF_ND |
| 42784 | { 4372, 2, 1, 0, 314, 1, 0, 322, X86ImpOpBase + 517, 0, 0x100069e0030034ULL }, // Inst #4372 = SHL64rCL_NF |
| 42785 | { 4371, 2, 1, 0, 314, 1, 1, 575, X86ImpOpBase + 515, 0, 0x10e9e0030034ULL }, // Inst #4371 = SHL64rCL_ND |
| 42786 | { 4370, 2, 1, 0, 314, 1, 1, 322, X86ImpOpBase + 515, 0, 0xc0069e0030034ULL }, // Inst #4370 = SHL64rCL_EVEX |
| 42787 | { 4369, 2, 1, 0, 314, 1, 1, 322, X86ImpOpBase + 515, 0, 0x6980020034ULL }, // Inst #4369 = SHL64rCL |
| 42788 | { 4368, 2, 1, 0, 301, 0, 0, 575, X86ImpOpBase + 0, 0, 0x1010e8e0030034ULL }, // Inst #4368 = SHL64r1_NF_ND |
| 42789 | { 4367, 2, 1, 0, 301, 0, 0, 322, X86ImpOpBase + 0, 0, 0x100068e0030034ULL }, // Inst #4367 = SHL64r1_NF |
| 42790 | { 4366, 2, 1, 0, 301, 0, 1, 575, X86ImpOpBase + 0, 0, 0x10e8e0030034ULL }, // Inst #4366 = SHL64r1_ND |
| 42791 | { 4365, 2, 1, 0, 301, 0, 1, 322, X86ImpOpBase + 0, 0, 0xc0068e0030034ULL }, // Inst #4365 = SHL64r1_EVEX |
| 42792 | { 4364, 2, 1, 0, 301, 0, 1, 322, X86ImpOpBase + 0, 0, 0x6880020034ULL }, // Inst #4364 = SHL64r1 |
| 42793 | { 4363, 7, 1, 0, 610, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0070024ULL }, // Inst #4363 = SHL64mi_NF_ND |
| 42794 | { 4362, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0070024ULL }, // Inst #4362 = SHL64mi_NF |
| 42795 | { 4361, 7, 1, 0, 610, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070024ULL }, // Inst #4361 = SHL64mi_ND |
| 42796 | { 4360, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070024ULL }, // Inst #4360 = SHL64mi_EVEX |
| 42797 | { 4359, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060024ULL }, // Inst #4359 = SHL64mi |
| 42798 | { 4358, 6, 1, 0, 612, 1, 0, 243, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0030024ULL }, // Inst #4358 = SHL64mCL_NF_ND |
| 42799 | { 4357, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0030024ULL }, // Inst #4357 = SHL64mCL_NF |
| 42800 | { 4356, 6, 1, 0, 612, 1, 1, 243, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030024ULL }, // Inst #4356 = SHL64mCL_ND |
| 42801 | { 4355, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030024ULL }, // Inst #4355 = SHL64mCL_EVEX |
| 42802 | { 4354, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020024ULL }, // Inst #4354 = SHL64mCL |
| 42803 | { 4353, 6, 1, 0, 610, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0030024ULL }, // Inst #4353 = SHL64m1_NF_ND |
| 42804 | { 4352, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0030024ULL }, // Inst #4352 = SHL64m1_NF |
| 42805 | { 4351, 6, 1, 0, 610, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030024ULL }, // Inst #4351 = SHL64m1_ND |
| 42806 | { 4350, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030024ULL }, // Inst #4350 = SHL64m1_EVEX |
| 42807 | { 4349, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020024ULL }, // Inst #4349 = SHL64m1 |
| 42808 | { 4348, 3, 1, 0, 301, 0, 0, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010e0e0050034ULL }, // Inst #4348 = SHL32ri_NF_ND |
| 42809 | { 4347, 3, 1, 0, 301, 0, 0, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100060e0050034ULL }, // Inst #4347 = SHL32ri_NF |
| 42810 | { 4346, 3, 1, 0, 301, 0, 1, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10e0e0050034ULL }, // Inst #4346 = SHL32ri_ND |
| 42811 | { 4345, 3, 1, 0, 301, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0060e0050034ULL }, // Inst #4345 = SHL32ri_EVEX |
| 42812 | { 4344, 3, 1, 0, 301, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6080040134ULL }, // Inst #4344 = SHL32ri |
| 42813 | { 4343, 2, 1, 0, 314, 1, 0, 573, X86ImpOpBase + 517, 0, 0x1010e9e0010034ULL }, // Inst #4343 = SHL32rCL_NF_ND |
| 42814 | { 4342, 2, 1, 0, 314, 1, 0, 320, X86ImpOpBase + 517, 0, 0x100069e0010034ULL }, // Inst #4342 = SHL32rCL_NF |
| 42815 | { 4341, 2, 1, 0, 314, 1, 1, 573, X86ImpOpBase + 515, 0, 0x10e9e0010034ULL }, // Inst #4341 = SHL32rCL_ND |
| 42816 | { 4340, 2, 1, 0, 314, 1, 1, 320, X86ImpOpBase + 515, 0, 0xc0069e0010034ULL }, // Inst #4340 = SHL32rCL_EVEX |
| 42817 | { 4339, 2, 1, 0, 314, 1, 1, 320, X86ImpOpBase + 515, 0, 0x6980000134ULL }, // Inst #4339 = SHL32rCL |
| 42818 | { 4338, 2, 1, 0, 301, 0, 0, 573, X86ImpOpBase + 0, 0, 0x1010e8e0010034ULL }, // Inst #4338 = SHL32r1_NF_ND |
| 42819 | { 4337, 2, 1, 0, 301, 0, 0, 320, X86ImpOpBase + 0, 0, 0x100068e0010034ULL }, // Inst #4337 = SHL32r1_NF |
| 42820 | { 4336, 2, 1, 0, 301, 0, 1, 573, X86ImpOpBase + 0, 0, 0x10e8e0010034ULL }, // Inst #4336 = SHL32r1_ND |
| 42821 | { 4335, 2, 1, 0, 301, 0, 1, 320, X86ImpOpBase + 0, 0, 0xc0068e0010034ULL }, // Inst #4335 = SHL32r1_EVEX |
| 42822 | { 4334, 2, 1, 0, 301, 0, 1, 320, X86ImpOpBase + 0, 0, 0x6880000134ULL }, // Inst #4334 = SHL32r1 |
| 42823 | { 4333, 7, 1, 0, 610, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050024ULL }, // Inst #4333 = SHL32mi_NF_ND |
| 42824 | { 4332, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050024ULL }, // Inst #4332 = SHL32mi_NF |
| 42825 | { 4331, 7, 1, 0, 610, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050024ULL }, // Inst #4331 = SHL32mi_ND |
| 42826 | { 4330, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050024ULL }, // Inst #4330 = SHL32mi_EVEX |
| 42827 | { 4329, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040124ULL }, // Inst #4329 = SHL32mi |
| 42828 | { 4328, 6, 1, 0, 612, 1, 0, 237, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010024ULL }, // Inst #4328 = SHL32mCL_NF_ND |
| 42829 | { 4327, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010024ULL }, // Inst #4327 = SHL32mCL_NF |
| 42830 | { 4326, 6, 1, 0, 612, 1, 1, 237, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010024ULL }, // Inst #4326 = SHL32mCL_ND |
| 42831 | { 4325, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010024ULL }, // Inst #4325 = SHL32mCL_EVEX |
| 42832 | { 4324, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000124ULL }, // Inst #4324 = SHL32mCL |
| 42833 | { 4323, 6, 1, 0, 610, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010024ULL }, // Inst #4323 = SHL32m1_NF_ND |
| 42834 | { 4322, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010024ULL }, // Inst #4322 = SHL32m1_NF |
| 42835 | { 4321, 6, 1, 0, 610, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010024ULL }, // Inst #4321 = SHL32m1_ND |
| 42836 | { 4320, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010024ULL }, // Inst #4320 = SHL32m1_EVEX |
| 42837 | { 4319, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000124ULL }, // Inst #4319 = SHL32m1 |
| 42838 | { 4318, 3, 1, 0, 301, 0, 0, 362, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010e0e0050834ULL }, // Inst #4318 = SHL16ri_NF_ND |
| 42839 | { 4317, 3, 1, 0, 301, 0, 0, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100060e0050834ULL }, // Inst #4317 = SHL16ri_NF |
| 42840 | { 4316, 3, 1, 0, 301, 0, 1, 362, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10e0e0050834ULL }, // Inst #4316 = SHL16ri_ND |
| 42841 | { 4315, 3, 1, 0, 301, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0060e0050834ULL }, // Inst #4315 = SHL16ri_EVEX |
| 42842 | { 4314, 3, 1, 0, 301, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x60800400b4ULL }, // Inst #4314 = SHL16ri |
| 42843 | { 4313, 2, 1, 0, 314, 1, 0, 569, X86ImpOpBase + 517, 0, 0x1010e9e0010834ULL }, // Inst #4313 = SHL16rCL_NF_ND |
| 42844 | { 4312, 2, 1, 0, 314, 1, 0, 595, X86ImpOpBase + 517, 0, 0x100069e0010834ULL }, // Inst #4312 = SHL16rCL_NF |
| 42845 | { 4311, 2, 1, 0, 314, 1, 1, 569, X86ImpOpBase + 515, 0, 0x10e9e0010834ULL }, // Inst #4311 = SHL16rCL_ND |
| 42846 | { 4310, 2, 1, 0, 314, 1, 1, 595, X86ImpOpBase + 515, 0, 0xc0069e0010834ULL }, // Inst #4310 = SHL16rCL_EVEX |
| 42847 | { 4309, 2, 1, 0, 314, 1, 1, 595, X86ImpOpBase + 515, 0, 0x69800000b4ULL }, // Inst #4309 = SHL16rCL |
| 42848 | { 4308, 2, 1, 0, 301, 0, 0, 569, X86ImpOpBase + 0, 0, 0x1010e8e0010834ULL }, // Inst #4308 = SHL16r1_NF_ND |
| 42849 | { 4307, 2, 1, 0, 301, 0, 0, 595, X86ImpOpBase + 0, 0, 0x100068e0010834ULL }, // Inst #4307 = SHL16r1_NF |
| 42850 | { 4306, 2, 1, 0, 301, 0, 1, 569, X86ImpOpBase + 0, 0, 0x10e8e0010834ULL }, // Inst #4306 = SHL16r1_ND |
| 42851 | { 4305, 2, 1, 0, 301, 0, 1, 595, X86ImpOpBase + 0, 0, 0xc0068e0010834ULL }, // Inst #4305 = SHL16r1_EVEX |
| 42852 | { 4304, 2, 1, 0, 301, 0, 1, 595, X86ImpOpBase + 0, 0, 0x68800000b4ULL }, // Inst #4304 = SHL16r1 |
| 42853 | { 4303, 7, 1, 0, 610, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050824ULL }, // Inst #4303 = SHL16mi_NF_ND |
| 42854 | { 4302, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050824ULL }, // Inst #4302 = SHL16mi_NF |
| 42855 | { 4301, 7, 1, 0, 610, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050824ULL }, // Inst #4301 = SHL16mi_ND |
| 42856 | { 4300, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050824ULL }, // Inst #4300 = SHL16mi_EVEX |
| 42857 | { 4299, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a4ULL }, // Inst #4299 = SHL16mi |
| 42858 | { 4298, 6, 1, 0, 612, 1, 0, 589, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010824ULL }, // Inst #4298 = SHL16mCL_NF_ND |
| 42859 | { 4297, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010824ULL }, // Inst #4297 = SHL16mCL_NF |
| 42860 | { 4296, 6, 1, 0, 612, 1, 1, 589, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010824ULL }, // Inst #4296 = SHL16mCL_ND |
| 42861 | { 4295, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010824ULL }, // Inst #4295 = SHL16mCL_EVEX |
| 42862 | { 4294, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a4ULL }, // Inst #4294 = SHL16mCL |
| 42863 | { 4293, 6, 1, 0, 610, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010824ULL }, // Inst #4293 = SHL16m1_NF_ND |
| 42864 | { 4292, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010824ULL }, // Inst #4292 = SHL16m1_NF |
| 42865 | { 4291, 6, 1, 0, 610, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010824ULL }, // Inst #4291 = SHL16m1_ND |
| 42866 | { 4290, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010824ULL }, // Inst #4290 = SHL16m1_EVEX |
| 42867 | { 4289, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a4ULL }, // Inst #4289 = SHL16m1 |
| 42868 | { 4288, 3, 1, 0, 999, 1, 0, 494, X86ImpOpBase + 111, 0, 0x6580004029ULL }, // Inst #4288 = SHA256RNDS2rr |
| 42869 | { 4287, 7, 1, 0, 1000, 1, 0, 487, X86ImpOpBase + 111, 0|(1ULL<<MCID::MayLoad), 0x6580004019ULL }, // Inst #4287 = SHA256RNDS2rm |
| 42870 | { 4286, 3, 1, 0, 990, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6680004029ULL }, // Inst #4286 = SHA256MSG2rr |
| 42871 | { 4285, 7, 1, 0, 989, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6680004019ULL }, // Inst #4285 = SHA256MSG2rm |
| 42872 | { 4284, 3, 1, 0, 991, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6600004029ULL }, // Inst #4284 = SHA256MSG1rr |
| 42873 | { 4283, 7, 1, 0, 992, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6600004019ULL }, // Inst #4283 = SHA256MSG1rm |
| 42874 | { 4282, 4, 1, 0, 997, 0, 0, 585, X86ImpOpBase + 0, 0, 0x6600046029ULL }, // Inst #4282 = SHA1RNDS4rri |
| 42875 | { 4281, 8, 1, 0, 998, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6600046019ULL }, // Inst #4281 = SHA1RNDS4rmi |
| 42876 | { 4280, 3, 1, 0, 995, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6400004029ULL }, // Inst #4280 = SHA1NEXTErr |
| 42877 | { 4279, 7, 1, 0, 996, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6400004019ULL }, // Inst #4279 = SHA1NEXTErm |
| 42878 | { 4278, 3, 1, 0, 993, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6500004029ULL }, // Inst #4278 = SHA1MSG2rr |
| 42879 | { 4277, 7, 1, 0, 994, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6500004019ULL }, // Inst #4277 = SHA1MSG2rm |
| 42880 | { 4276, 3, 1, 0, 1039, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6480004029ULL }, // Inst #4276 = SHA1MSG1rr |
| 42881 | { 4275, 7, 1, 0, 1040, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6480004019ULL }, // Inst #4275 = SHA1MSG1rm |
| 42882 | { 4274, 5, 0, 0, 842, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002020ULL }, // Inst #4274 = SGDT64m |
| 42883 | { 4273, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002120ULL }, // Inst #4273 = SGDT32m |
| 42884 | { 4272, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800020a0ULL }, // Inst #4272 = SGDT16m |
| 42885 | { 4271, 0, 0, 0, 1047, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000203fULL }, // Inst #4271 = SFENCE |
| 42886 | { 4270, 2, 1, 0, 317, 1, 0, 1494, X86ImpOpBase + 0, 0, 0x10206001182eULL }, // Inst #4270 = SETZUCCr |
| 42887 | { 4269, 6, 0, 0, 316, 1, 0, 1488, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x10206001181eULL }, // Inst #4269 = SETZUCCm |
| 42888 | { 4268, 0, 0, 0, 8, 1, 1, 1, X86ImpOpBase + 284, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80003068ULL }, // Inst #4268 = SETSSBSY |
| 42889 | { 4267, 2, 1, 0, 317, 1, 0, 1494, X86ImpOpBase + 0, 0, 0xca0206001182eULL }, // Inst #4267 = SETCCr_EVEX |
| 42890 | { 4266, 2, 1, 0, 816, 1, 0, 1494, X86ImpOpBase + 0, 0, 0x480000202eULL }, // Inst #4266 = SETCCr |
| 42891 | { 4265, 6, 0, 0, 316, 1, 0, 1488, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xca0206001181eULL }, // Inst #4265 = SETCCm_EVEX |
| 42892 | { 4264, 6, 0, 0, 817, 1, 0, 1488, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x480000201eULL }, // Inst #4264 = SETCCm |
| 42893 | { 4263, 0, 0, 0, 1624, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80002068ULL }, // Inst #4263 = SERIALIZE |
| 42894 | { 4262, 1, 0, 0, 8, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380003036ULL }, // Inst #4262 = SENDUIPI |
| 42895 | { 4261, 2, 1, 0, 8, 1, 3, 575, X86ImpOpBase + 215, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4261 = SEG_ALLOCA_64 |
| 42896 | { 4260, 2, 1, 0, 8, 1, 3, 573, X86ImpOpBase + 211, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4260 = SEG_ALLOCA_32 |
| 42897 | { 4259, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000284dULL }, // Inst #4259 = SEAMRET |
| 42898 | { 4258, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000284eULL }, // Inst #4258 = SEAMOPS |
| 42899 | { 4257, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000284fULL }, // Inst #4257 = SEAMCALL |
| 42900 | { 4256, 1, 0, 0, 745, 3, 2, 1102, X86ImpOpBase + 537, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780000085ULL }, // Inst #4256 = SCASW |
| 42901 | { 4255, 1, 0, 0, 745, 3, 2, 1102, X86ImpOpBase + 532, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780020005ULL }, // Inst #4255 = SCASQ |
| 42902 | { 4254, 1, 0, 0, 745, 3, 2, 1102, X86ImpOpBase + 527, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780000105ULL }, // Inst #4254 = SCASL |
| 42903 | { 4253, 1, 0, 0, 745, 3, 2, 1102, X86ImpOpBase + 522, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5700000005ULL }, // Inst #4253 = SCASB |
| 42904 | { 4252, 3, 1, 0, 11, 1, 1, 173, X86ImpOpBase + 31, 0, 0xd00000029ULL }, // Inst #4252 = SBB8rr_REV |
| 42905 | { 4251, 3, 1, 0, 11, 1, 1, 484, X86ImpOpBase + 31, 0, 0x108d60010029ULL }, // Inst #4251 = SBB8rr_ND_REV |
| 42906 | { 4250, 3, 1, 0, 11, 1, 1, 484, X86ImpOpBase + 31, 0, 0x108c60010028ULL }, // Inst #4250 = SBB8rr_ND |
| 42907 | { 4249, 3, 1, 0, 11, 1, 1, 173, X86ImpOpBase + 31, 0, 0xc000d60010029ULL }, // Inst #4249 = SBB8rr_EVEX_REV |
| 42908 | { 4248, 3, 1, 0, 11, 1, 1, 173, X86ImpOpBase + 31, 0, 0xc000c60010028ULL }, // Inst #4248 = SBB8rr_EVEX |
| 42909 | { 4247, 3, 1, 0, 11, 1, 1, 173, X86ImpOpBase + 31, 0, 0xc00000028ULL }, // Inst #4247 = SBB8rr |
| 42910 | { 4246, 7, 1, 0, 23, 1, 1, 477, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x108d60010019ULL }, // Inst #4246 = SBB8rm_ND |
| 42911 | { 4245, 7, 1, 0, 23, 1, 1, 470, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xc000d60010019ULL }, // Inst #4245 = SBB8rm_EVEX |
| 42912 | { 4244, 7, 1, 0, 1441, 1, 1, 470, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xd00000019ULL }, // Inst #4244 = SBB8rm |
| 42913 | { 4243, 3, 1, 0, 11, 1, 1, 467, X86ImpOpBase + 31, 0, 0x10c060050033ULL }, // Inst #4243 = SBB8ri_ND |
| 42914 | { 4242, 3, 1, 0, 11, 1, 1, 170, X86ImpOpBase + 31, 0, 0xc004060050033ULL }, // Inst #4242 = SBB8ri_EVEX |
| 42915 | { 4241, 3, 1, 0, 11, 1, 1, 170, X86ImpOpBase + 31, 0, 0x4100040033ULL }, // Inst #4241 = SBB8ri8 |
| 42916 | { 4240, 3, 1, 0, 11, 1, 1, 170, X86ImpOpBase + 31, 0, 0x4000040033ULL }, // Inst #4240 = SBB8ri |
| 42917 | { 4239, 7, 1, 0, 924, 1, 1, 460, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x108c60010018ULL }, // Inst #4239 = SBB8mr_ND |
| 42918 | { 4238, 6, 0, 0, 925, 1, 1, 454, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000c60010018ULL }, // Inst #4238 = SBB8mr_EVEX |
| 42919 | { 4237, 6, 0, 0, 1012, 1, 1, 454, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00000018ULL }, // Inst #4237 = SBB8mr |
| 42920 | { 4236, 7, 1, 0, 924, 1, 1, 447, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c060050023ULL }, // Inst #4236 = SBB8mi_ND |
| 42921 | { 4235, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050023ULL }, // Inst #4235 = SBB8mi_EVEX |
| 42922 | { 4234, 6, 0, 0, 1442, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040023ULL }, // Inst #4234 = SBB8mi8 |
| 42923 | { 4233, 6, 0, 0, 1442, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040023ULL }, // Inst #4233 = SBB8mi |
| 42924 | { 4232, 1, 0, 0, 904, 2, 2, 1, X86ImpOpBase + 65, 0, 0xe00040001ULL }, // Inst #4232 = SBB8i8 |
| 42925 | { 4231, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0xd80020029ULL }, // Inst #4231 = SBB64rr_REV |
| 42926 | { 4230, 3, 1, 0, 11, 1, 1, 444, X86ImpOpBase + 31, 0, 0x108de0030029ULL }, // Inst #4230 = SBB64rr_ND_REV |
| 42927 | { 4229, 3, 1, 0, 11, 1, 1, 444, X86ImpOpBase + 31, 0, 0x108ce0030028ULL }, // Inst #4229 = SBB64rr_ND |
| 42928 | { 4228, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0xc000de0030029ULL }, // Inst #4228 = SBB64rr_EVEX_REV |
| 42929 | { 4227, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0xc000ce0030028ULL }, // Inst #4227 = SBB64rr_EVEX |
| 42930 | { 4226, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0xc80020028ULL }, // Inst #4226 = SBB64rr |
| 42931 | { 4225, 7, 1, 0, 23, 1, 1, 437, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x108de0030019ULL }, // Inst #4225 = SBB64rm_ND |
| 42932 | { 4224, 7, 1, 0, 23, 1, 1, 430, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xc000de0030019ULL }, // Inst #4224 = SBB64rm_EVEX |
| 42933 | { 4223, 7, 1, 0, 1441, 1, 1, 430, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xd80020019ULL }, // Inst #4223 = SBB64rm |
| 42934 | { 4222, 3, 1, 0, 11, 1, 1, 427, X86ImpOpBase + 31, 0, 0x10c1e0070033ULL }, // Inst #4222 = SBB64ri8_ND |
| 42935 | { 4221, 3, 1, 0, 11, 1, 1, 164, X86ImpOpBase + 31, 0, 0xc0041e0070033ULL }, // Inst #4221 = SBB64ri8_EVEX |
| 42936 | { 4220, 3, 1, 0, 903, 1, 1, 164, X86ImpOpBase + 31, 0, 0x4180060033ULL }, // Inst #4220 = SBB64ri8 |
| 42937 | { 4219, 3, 1, 0, 11, 1, 1, 427, X86ImpOpBase + 31, 0, 0x10c0e0230033ULL }, // Inst #4219 = SBB64ri32_ND |
| 42938 | { 4218, 3, 1, 0, 11, 1, 1, 164, X86ImpOpBase + 31, 0, 0xc0040e0230033ULL }, // Inst #4218 = SBB64ri32_EVEX |
| 42939 | { 4217, 3, 1, 0, 1159, 1, 1, 164, X86ImpOpBase + 31, 0, 0x4080220033ULL }, // Inst #4217 = SBB64ri32 |
| 42940 | { 4216, 7, 1, 0, 924, 1, 1, 420, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x108ce0030018ULL }, // Inst #4216 = SBB64mr_ND |
| 42941 | { 4215, 6, 0, 0, 925, 1, 1, 211, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000ce0030018ULL }, // Inst #4215 = SBB64mr_EVEX |
| 42942 | { 4214, 6, 0, 0, 795, 1, 1, 211, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80020018ULL }, // Inst #4214 = SBB64mr |
| 42943 | { 4213, 7, 1, 0, 924, 1, 1, 413, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070023ULL }, // Inst #4213 = SBB64mi8_ND |
| 42944 | { 4212, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070023ULL }, // Inst #4212 = SBB64mi8_EVEX |
| 42945 | { 4211, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060023ULL }, // Inst #4211 = SBB64mi8 |
| 42946 | { 4210, 7, 1, 0, 924, 1, 1, 413, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230023ULL }, // Inst #4210 = SBB64mi32_ND |
| 42947 | { 4209, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230023ULL }, // Inst #4209 = SBB64mi32_EVEX |
| 42948 | { 4208, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220023ULL }, // Inst #4208 = SBB64mi32 |
| 42949 | { 4207, 1, 0, 0, 904, 2, 2, 1, X86ImpOpBase + 61, 0, 0xe80220001ULL }, // Inst #4207 = SBB64i32 |
| 42950 | { 4206, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0xd80000129ULL }, // Inst #4206 = SBB32rr_REV |
| 42951 | { 4205, 3, 1, 0, 11, 1, 1, 226, X86ImpOpBase + 31, 0, 0x108de0010029ULL }, // Inst #4205 = SBB32rr_ND_REV |
| 42952 | { 4204, 3, 1, 0, 11, 1, 1, 226, X86ImpOpBase + 31, 0, 0x108ce0010028ULL }, // Inst #4204 = SBB32rr_ND |
| 42953 | { 4203, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0xc000de0010029ULL }, // Inst #4203 = SBB32rr_EVEX_REV |
| 42954 | { 4202, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0xc000ce0010028ULL }, // Inst #4202 = SBB32rr_EVEX |
| 42955 | { 4201, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0xc80000128ULL }, // Inst #4201 = SBB32rr |
| 42956 | { 4200, 7, 1, 0, 23, 1, 1, 406, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x108de0010019ULL }, // Inst #4200 = SBB32rm_ND |
| 42957 | { 4199, 7, 1, 0, 23, 1, 1, 399, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xc000de0010019ULL }, // Inst #4199 = SBB32rm_EVEX |
| 42958 | { 4198, 7, 1, 0, 1441, 1, 1, 399, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xd80000119ULL }, // Inst #4198 = SBB32rm |
| 42959 | { 4197, 3, 1, 0, 11, 1, 1, 396, X86ImpOpBase + 31, 0, 0x10c0e0190033ULL }, // Inst #4197 = SBB32ri_ND |
| 42960 | { 4196, 3, 1, 0, 11, 1, 1, 158, X86ImpOpBase + 31, 0, 0xc0040e0190033ULL }, // Inst #4196 = SBB32ri_EVEX |
| 42961 | { 4195, 3, 1, 0, 11, 1, 1, 396, X86ImpOpBase + 31, 0, 0x10c1e0050033ULL }, // Inst #4195 = SBB32ri8_ND |
| 42962 | { 4194, 3, 1, 0, 11, 1, 1, 158, X86ImpOpBase + 31, 0, 0xc0041e0050033ULL }, // Inst #4194 = SBB32ri8_EVEX |
| 42963 | { 4193, 3, 1, 0, 903, 1, 1, 158, X86ImpOpBase + 31, 0, 0x4180040133ULL }, // Inst #4193 = SBB32ri8 |
| 42964 | { 4192, 3, 1, 0, 11, 1, 1, 158, X86ImpOpBase + 31, 0, 0x4080180133ULL }, // Inst #4192 = SBB32ri |
| 42965 | { 4191, 7, 1, 0, 924, 1, 1, 389, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x108ce0010018ULL }, // Inst #4191 = SBB32mr_ND |
| 42966 | { 4190, 6, 0, 0, 925, 1, 1, 324, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000ce0010018ULL }, // Inst #4190 = SBB32mr_EVEX |
| 42967 | { 4189, 6, 0, 0, 795, 1, 1, 324, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80000118ULL }, // Inst #4189 = SBB32mr |
| 42968 | { 4188, 7, 1, 0, 924, 1, 1, 382, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190023ULL }, // Inst #4188 = SBB32mi_ND |
| 42969 | { 4187, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190023ULL }, // Inst #4187 = SBB32mi_EVEX |
| 42970 | { 4186, 7, 1, 0, 924, 1, 1, 382, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050023ULL }, // Inst #4186 = SBB32mi8_ND |
| 42971 | { 4185, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050023ULL }, // Inst #4185 = SBB32mi8_EVEX |
| 42972 | { 4184, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040123ULL }, // Inst #4184 = SBB32mi8 |
| 42973 | { 4183, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180123ULL }, // Inst #4183 = SBB32mi |
| 42974 | { 4182, 1, 0, 0, 904, 2, 2, 1, X86ImpOpBase + 57, 0, 0xe80180101ULL }, // Inst #4182 = SBB32i32 |
| 42975 | { 4181, 3, 1, 0, 11, 1, 1, 155, X86ImpOpBase + 31, 0, 0xd800000a9ULL }, // Inst #4181 = SBB16rr_REV |
| 42976 | { 4180, 3, 1, 0, 11, 1, 1, 379, X86ImpOpBase + 31, 0, 0x108de0010829ULL }, // Inst #4180 = SBB16rr_ND_REV |
| 42977 | { 4179, 3, 1, 0, 11, 1, 1, 379, X86ImpOpBase + 31, 0, 0x108ce0010828ULL }, // Inst #4179 = SBB16rr_ND |
| 42978 | { 4178, 3, 1, 0, 11, 1, 1, 155, X86ImpOpBase + 31, 0, 0xc000de0010829ULL }, // Inst #4178 = SBB16rr_EVEX_REV |
| 42979 | { 4177, 3, 1, 0, 11, 1, 1, 155, X86ImpOpBase + 31, 0, 0xc000ce0010828ULL }, // Inst #4177 = SBB16rr_EVEX |
| 42980 | { 4176, 3, 1, 0, 11, 1, 1, 155, X86ImpOpBase + 31, 0, 0xc800000a8ULL }, // Inst #4176 = SBB16rr |
| 42981 | { 4175, 7, 1, 0, 23, 1, 1, 372, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x108de0010819ULL }, // Inst #4175 = SBB16rm_ND |
| 42982 | { 4174, 7, 1, 0, 23, 1, 1, 365, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xc000de0010819ULL }, // Inst #4174 = SBB16rm_EVEX |
| 42983 | { 4173, 7, 1, 0, 1441, 1, 1, 365, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xd80000099ULL }, // Inst #4173 = SBB16rm |
| 42984 | { 4172, 3, 1, 0, 11, 1, 1, 362, X86ImpOpBase + 31, 0, 0x10c0e0110833ULL }, // Inst #4172 = SBB16ri_ND |
| 42985 | { 4171, 3, 1, 0, 11, 1, 1, 152, X86ImpOpBase + 31, 0, 0xc0040e0110833ULL }, // Inst #4171 = SBB16ri_EVEX |
| 42986 | { 4170, 3, 1, 0, 11, 1, 1, 362, X86ImpOpBase + 31, 0, 0x10c1e0050833ULL }, // Inst #4170 = SBB16ri8_ND |
| 42987 | { 4169, 3, 1, 0, 11, 1, 1, 152, X86ImpOpBase + 31, 0, 0xc0041e0050833ULL }, // Inst #4169 = SBB16ri8_EVEX |
| 42988 | { 4168, 3, 1, 0, 903, 1, 1, 152, X86ImpOpBase + 31, 0, 0x41800400b3ULL }, // Inst #4168 = SBB16ri8 |
| 42989 | { 4167, 3, 1, 0, 11, 1, 1, 152, X86ImpOpBase + 31, 0, 0x40801000b3ULL }, // Inst #4167 = SBB16ri |
| 42990 | { 4166, 7, 1, 0, 924, 1, 1, 355, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x108ce0010818ULL }, // Inst #4166 = SBB16mr_ND |
| 42991 | { 4165, 6, 0, 0, 925, 1, 1, 349, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000ce0010818ULL }, // Inst #4165 = SBB16mr_EVEX |
| 42992 | { 4164, 6, 0, 0, 795, 1, 1, 349, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80000098ULL }, // Inst #4164 = SBB16mr |
| 42993 | { 4163, 7, 1, 0, 924, 1, 1, 342, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110823ULL }, // Inst #4163 = SBB16mi_ND |
| 42994 | { 4162, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110823ULL }, // Inst #4162 = SBB16mi_EVEX |
| 42995 | { 4161, 7, 1, 0, 924, 1, 1, 342, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050823ULL }, // Inst #4161 = SBB16mi8_ND |
| 42996 | { 4160, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050823ULL }, // Inst #4160 = SBB16mi8_EVEX |
| 42997 | { 4159, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a3ULL }, // Inst #4159 = SBB16mi8 |
| 42998 | { 4158, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a3ULL }, // Inst #4158 = SBB16mi |
| 42999 | { 4157, 1, 0, 0, 904, 2, 2, 1, X86ImpOpBase + 53, 0, 0xe80100081ULL }, // Inst #4157 = SBB16i16 |
| 43000 | { 4156, 0, 0, 0, 8, 1, 1, 1, X86ImpOpBase + 284, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8000306aULL }, // Inst #4156 = SAVEPREVSSP |
| 43001 | { 4155, 3, 1, 0, 301, 0, 0, 444, X86ImpOpBase + 0, 0, 0x7be002502aULL }, // Inst #4155 = SARX64rr_EVEX |
| 43002 | { 4154, 3, 1, 0, 1623, 0, 0, 444, X86ImpOpBase + 0, 0, 0x7ba002502aULL }, // Inst #4154 = SARX64rr |
| 43003 | { 4153, 7, 1, 0, 315, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7be002501aULL }, // Inst #4153 = SARX64rm_EVEX |
| 43004 | { 4152, 7, 1, 0, 1622, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ba002501aULL }, // Inst #4152 = SARX64rm |
| 43005 | { 4151, 3, 1, 0, 301, 0, 0, 226, X86ImpOpBase + 0, 0, 0x7be000502aULL }, // Inst #4151 = SARX32rr_EVEX |
| 43006 | { 4150, 3, 1, 0, 1623, 0, 0, 226, X86ImpOpBase + 0, 0, 0x7ba000502aULL }, // Inst #4150 = SARX32rr |
| 43007 | { 4149, 7, 1, 0, 315, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7be000501aULL }, // Inst #4149 = SARX32rm_EVEX |
| 43008 | { 4148, 7, 1, 0, 1622, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ba000501aULL }, // Inst #4148 = SARX32rm |
| 43009 | { 4147, 3, 1, 0, 301, 0, 0, 467, X86ImpOpBase + 0, 0, 0x1010e060050037ULL }, // Inst #4147 = SAR8ri_NF_ND |
| 43010 | { 4146, 3, 1, 0, 301, 0, 0, 170, X86ImpOpBase + 0, 0, 0x10006060050037ULL }, // Inst #4146 = SAR8ri_NF |
| 43011 | { 4145, 3, 1, 0, 301, 0, 1, 467, X86ImpOpBase + 0, 0, 0x10e060050037ULL }, // Inst #4145 = SAR8ri_ND |
| 43012 | { 4144, 3, 1, 0, 301, 0, 1, 170, X86ImpOpBase + 0, 0, 0xc006060050037ULL }, // Inst #4144 = SAR8ri_EVEX |
| 43013 | { 4143, 3, 1, 0, 301, 0, 1, 170, X86ImpOpBase + 0, 0, 0x6000040037ULL }, // Inst #4143 = SAR8ri |
| 43014 | { 4142, 2, 1, 0, 314, 1, 0, 947, X86ImpOpBase + 517, 0, 0x1010e960010037ULL }, // Inst #4142 = SAR8rCL_NF_ND |
| 43015 | { 4141, 2, 1, 0, 314, 1, 0, 1049, X86ImpOpBase + 517, 0, 0x10006960010037ULL }, // Inst #4141 = SAR8rCL_NF |
| 43016 | { 4140, 2, 1, 0, 314, 1, 1, 947, X86ImpOpBase + 515, 0, 0x10e960010037ULL }, // Inst #4140 = SAR8rCL_ND |
| 43017 | { 4139, 2, 1, 0, 314, 1, 1, 1049, X86ImpOpBase + 515, 0, 0xc006960010037ULL }, // Inst #4139 = SAR8rCL_EVEX |
| 43018 | { 4138, 2, 1, 0, 314, 1, 1, 1049, X86ImpOpBase + 515, 0, 0x6900000037ULL }, // Inst #4138 = SAR8rCL |
| 43019 | { 4137, 2, 1, 0, 301, 0, 0, 947, X86ImpOpBase + 0, 0, 0x1010e860010037ULL }, // Inst #4137 = SAR8r1_NF_ND |
| 43020 | { 4136, 2, 1, 0, 301, 0, 0, 1049, X86ImpOpBase + 0, 0, 0x10006860010037ULL }, // Inst #4136 = SAR8r1_NF |
| 43021 | { 4135, 2, 1, 0, 301, 0, 1, 947, X86ImpOpBase + 0, 0, 0x10e860010037ULL }, // Inst #4135 = SAR8r1_ND |
| 43022 | { 4134, 2, 1, 0, 301, 0, 1, 1049, X86ImpOpBase + 0, 0, 0xc006860010037ULL }, // Inst #4134 = SAR8r1_EVEX |
| 43023 | { 4133, 2, 1, 0, 301, 0, 1, 1049, X86ImpOpBase + 0, 0, 0x6800000037ULL }, // Inst #4133 = SAR8r1 |
| 43024 | { 4132, 7, 1, 0, 610, 0, 0, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e060050027ULL }, // Inst #4132 = SAR8mi_NF_ND |
| 43025 | { 4131, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006060050027ULL }, // Inst #4131 = SAR8mi_NF |
| 43026 | { 4130, 7, 1, 0, 610, 0, 1, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e060050027ULL }, // Inst #4130 = SAR8mi_ND |
| 43027 | { 4129, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050027ULL }, // Inst #4129 = SAR8mi_EVEX |
| 43028 | { 4128, 6, 0, 0, 1621, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040027ULL }, // Inst #4128 = SAR8mi |
| 43029 | { 4127, 6, 1, 0, 612, 1, 0, 941, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e960010027ULL }, // Inst #4127 = SAR8mCL_NF_ND |
| 43030 | { 4126, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006960010027ULL }, // Inst #4126 = SAR8mCL_NF |
| 43031 | { 4125, 6, 1, 0, 612, 1, 1, 941, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e960010027ULL }, // Inst #4125 = SAR8mCL_ND |
| 43032 | { 4124, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010027ULL }, // Inst #4124 = SAR8mCL_EVEX |
| 43033 | { 4123, 5, 0, 0, 1620, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000027ULL }, // Inst #4123 = SAR8mCL |
| 43034 | { 4122, 6, 1, 0, 610, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e860010027ULL }, // Inst #4122 = SAR8m1_NF_ND |
| 43035 | { 4121, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006860010027ULL }, // Inst #4121 = SAR8m1_NF |
| 43036 | { 4120, 6, 1, 0, 610, 0, 1, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e860010027ULL }, // Inst #4120 = SAR8m1_ND |
| 43037 | { 4119, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010027ULL }, // Inst #4119 = SAR8m1_EVEX |
| 43038 | { 4118, 5, 0, 0, 1621, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000027ULL }, // Inst #4118 = SAR8m1 |
| 43039 | { 4117, 3, 1, 0, 301, 0, 0, 427, X86ImpOpBase + 0, 0, 0x1010e0e0070037ULL }, // Inst #4117 = SAR64ri_NF_ND |
| 43040 | { 4116, 3, 1, 0, 301, 0, 0, 164, X86ImpOpBase + 0, 0, 0x100060e0070037ULL }, // Inst #4116 = SAR64ri_NF |
| 43041 | { 4115, 3, 1, 0, 301, 0, 1, 427, X86ImpOpBase + 0, 0, 0x10e0e0070037ULL }, // Inst #4115 = SAR64ri_ND |
| 43042 | { 4114, 3, 1, 0, 301, 0, 1, 164, X86ImpOpBase + 0, 0, 0xc0060e0070037ULL }, // Inst #4114 = SAR64ri_EVEX |
| 43043 | { 4113, 3, 1, 0, 301, 0, 1, 164, X86ImpOpBase + 0, 0, 0x6080060037ULL }, // Inst #4113 = SAR64ri |
| 43044 | { 4112, 2, 1, 0, 314, 1, 0, 575, X86ImpOpBase + 517, 0, 0x1010e9e0030037ULL }, // Inst #4112 = SAR64rCL_NF_ND |
| 43045 | { 4111, 2, 1, 0, 314, 1, 0, 322, X86ImpOpBase + 517, 0, 0x100069e0030037ULL }, // Inst #4111 = SAR64rCL_NF |
| 43046 | { 4110, 2, 1, 0, 314, 1, 1, 575, X86ImpOpBase + 515, 0, 0x10e9e0030037ULL }, // Inst #4110 = SAR64rCL_ND |
| 43047 | { 4109, 2, 1, 0, 314, 1, 1, 322, X86ImpOpBase + 515, 0, 0xc0069e0030037ULL }, // Inst #4109 = SAR64rCL_EVEX |
| 43048 | { 4108, 2, 1, 0, 314, 1, 1, 322, X86ImpOpBase + 515, 0, 0x6980020037ULL }, // Inst #4108 = SAR64rCL |
| 43049 | { 4107, 2, 1, 0, 301, 0, 0, 575, X86ImpOpBase + 0, 0, 0x1010e8e0030037ULL }, // Inst #4107 = SAR64r1_NF_ND |
| 43050 | { 4106, 2, 1, 0, 301, 0, 0, 322, X86ImpOpBase + 0, 0, 0x100068e0030037ULL }, // Inst #4106 = SAR64r1_NF |
| 43051 | { 4105, 2, 1, 0, 301, 0, 1, 575, X86ImpOpBase + 0, 0, 0x10e8e0030037ULL }, // Inst #4105 = SAR64r1_ND |
| 43052 | { 4104, 2, 1, 0, 301, 0, 1, 322, X86ImpOpBase + 0, 0, 0xc0068e0030037ULL }, // Inst #4104 = SAR64r1_EVEX |
| 43053 | { 4103, 2, 1, 0, 301, 0, 1, 322, X86ImpOpBase + 0, 0, 0x6880020037ULL }, // Inst #4103 = SAR64r1 |
| 43054 | { 4102, 7, 1, 0, 610, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0070027ULL }, // Inst #4102 = SAR64mi_NF_ND |
| 43055 | { 4101, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0070027ULL }, // Inst #4101 = SAR64mi_NF |
| 43056 | { 4100, 7, 1, 0, 610, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070027ULL }, // Inst #4100 = SAR64mi_ND |
| 43057 | { 4099, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070027ULL }, // Inst #4099 = SAR64mi_EVEX |
| 43058 | { 4098, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060027ULL }, // Inst #4098 = SAR64mi |
| 43059 | { 4097, 6, 1, 0, 612, 1, 0, 243, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0030027ULL }, // Inst #4097 = SAR64mCL_NF_ND |
| 43060 | { 4096, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0030027ULL }, // Inst #4096 = SAR64mCL_NF |
| 43061 | { 4095, 6, 1, 0, 612, 1, 1, 243, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030027ULL }, // Inst #4095 = SAR64mCL_ND |
| 43062 | { 4094, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030027ULL }, // Inst #4094 = SAR64mCL_EVEX |
| 43063 | { 4093, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020027ULL }, // Inst #4093 = SAR64mCL |
| 43064 | { 4092, 6, 1, 0, 610, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0030027ULL }, // Inst #4092 = SAR64m1_NF_ND |
| 43065 | { 4091, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0030027ULL }, // Inst #4091 = SAR64m1_NF |
| 43066 | { 4090, 6, 1, 0, 610, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030027ULL }, // Inst #4090 = SAR64m1_ND |
| 43067 | { 4089, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030027ULL }, // Inst #4089 = SAR64m1_EVEX |
| 43068 | { 4088, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020027ULL }, // Inst #4088 = SAR64m1 |
| 43069 | { 4087, 3, 1, 0, 301, 0, 0, 396, X86ImpOpBase + 0, 0, 0x1010e0e0050037ULL }, // Inst #4087 = SAR32ri_NF_ND |
| 43070 | { 4086, 3, 1, 0, 301, 0, 0, 158, X86ImpOpBase + 0, 0, 0x100060e0050037ULL }, // Inst #4086 = SAR32ri_NF |
| 43071 | { 4085, 3, 1, 0, 301, 0, 1, 396, X86ImpOpBase + 0, 0, 0x10e0e0050037ULL }, // Inst #4085 = SAR32ri_ND |
| 43072 | { 4084, 3, 1, 0, 301, 0, 1, 158, X86ImpOpBase + 0, 0, 0xc0060e0050037ULL }, // Inst #4084 = SAR32ri_EVEX |
| 43073 | { 4083, 3, 1, 0, 301, 0, 1, 158, X86ImpOpBase + 0, 0, 0x6080040137ULL }, // Inst #4083 = SAR32ri |
| 43074 | { 4082, 2, 1, 0, 314, 1, 0, 573, X86ImpOpBase + 517, 0, 0x1010e9e0010037ULL }, // Inst #4082 = SAR32rCL_NF_ND |
| 43075 | { 4081, 2, 1, 0, 314, 1, 0, 320, X86ImpOpBase + 517, 0, 0x100069e0010037ULL }, // Inst #4081 = SAR32rCL_NF |
| 43076 | { 4080, 2, 1, 0, 314, 1, 1, 573, X86ImpOpBase + 515, 0, 0x10e9e0010037ULL }, // Inst #4080 = SAR32rCL_ND |
| 43077 | { 4079, 2, 1, 0, 314, 1, 1, 320, X86ImpOpBase + 515, 0, 0xc0069e0010037ULL }, // Inst #4079 = SAR32rCL_EVEX |
| 43078 | { 4078, 2, 1, 0, 314, 1, 1, 320, X86ImpOpBase + 515, 0, 0x6980000137ULL }, // Inst #4078 = SAR32rCL |
| 43079 | { 4077, 2, 1, 0, 301, 0, 0, 573, X86ImpOpBase + 0, 0, 0x1010e8e0010037ULL }, // Inst #4077 = SAR32r1_NF_ND |
| 43080 | { 4076, 2, 1, 0, 301, 0, 0, 320, X86ImpOpBase + 0, 0, 0x100068e0010037ULL }, // Inst #4076 = SAR32r1_NF |
| 43081 | { 4075, 2, 1, 0, 301, 0, 1, 573, X86ImpOpBase + 0, 0, 0x10e8e0010037ULL }, // Inst #4075 = SAR32r1_ND |
| 43082 | { 4074, 2, 1, 0, 301, 0, 1, 320, X86ImpOpBase + 0, 0, 0xc0068e0010037ULL }, // Inst #4074 = SAR32r1_EVEX |
| 43083 | { 4073, 2, 1, 0, 301, 0, 1, 320, X86ImpOpBase + 0, 0, 0x6880000137ULL }, // Inst #4073 = SAR32r1 |
| 43084 | { 4072, 7, 1, 0, 610, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050027ULL }, // Inst #4072 = SAR32mi_NF_ND |
| 43085 | { 4071, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050027ULL }, // Inst #4071 = SAR32mi_NF |
| 43086 | { 4070, 7, 1, 0, 610, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050027ULL }, // Inst #4070 = SAR32mi_ND |
| 43087 | { 4069, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050027ULL }, // Inst #4069 = SAR32mi_EVEX |
| 43088 | { 4068, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040127ULL }, // Inst #4068 = SAR32mi |
| 43089 | { 4067, 6, 1, 0, 612, 1, 0, 237, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010027ULL }, // Inst #4067 = SAR32mCL_NF_ND |
| 43090 | { 4066, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010027ULL }, // Inst #4066 = SAR32mCL_NF |
| 43091 | { 4065, 6, 1, 0, 612, 1, 1, 237, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010027ULL }, // Inst #4065 = SAR32mCL_ND |
| 43092 | { 4064, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010027ULL }, // Inst #4064 = SAR32mCL_EVEX |
| 43093 | { 4063, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000127ULL }, // Inst #4063 = SAR32mCL |
| 43094 | { 4062, 6, 1, 0, 610, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010027ULL }, // Inst #4062 = SAR32m1_NF_ND |
| 43095 | { 4061, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010027ULL }, // Inst #4061 = SAR32m1_NF |
| 43096 | { 4060, 6, 1, 0, 610, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010027ULL }, // Inst #4060 = SAR32m1_ND |
| 43097 | { 4059, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010027ULL }, // Inst #4059 = SAR32m1_EVEX |
| 43098 | { 4058, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000127ULL }, // Inst #4058 = SAR32m1 |
| 43099 | { 4057, 3, 1, 0, 301, 0, 0, 362, X86ImpOpBase + 0, 0, 0x1010e0e0050837ULL }, // Inst #4057 = SAR16ri_NF_ND |
| 43100 | { 4056, 3, 1, 0, 301, 0, 0, 152, X86ImpOpBase + 0, 0, 0x100060e0050837ULL }, // Inst #4056 = SAR16ri_NF |
| 43101 | { 4055, 3, 1, 0, 301, 0, 1, 362, X86ImpOpBase + 0, 0, 0x10e0e0050837ULL }, // Inst #4055 = SAR16ri_ND |
| 43102 | { 4054, 3, 1, 0, 301, 0, 1, 152, X86ImpOpBase + 0, 0, 0xc0060e0050837ULL }, // Inst #4054 = SAR16ri_EVEX |
| 43103 | { 4053, 3, 1, 0, 301, 0, 1, 152, X86ImpOpBase + 0, 0, 0x60800400b7ULL }, // Inst #4053 = SAR16ri |
| 43104 | { 4052, 2, 1, 0, 314, 1, 0, 569, X86ImpOpBase + 517, 0, 0x1010e9e0010837ULL }, // Inst #4052 = SAR16rCL_NF_ND |
| 43105 | { 4051, 2, 1, 0, 314, 1, 0, 595, X86ImpOpBase + 517, 0, 0x100069e0010837ULL }, // Inst #4051 = SAR16rCL_NF |
| 43106 | { 4050, 2, 1, 0, 314, 1, 1, 569, X86ImpOpBase + 515, 0, 0x10e9e0010837ULL }, // Inst #4050 = SAR16rCL_ND |
| 43107 | { 4049, 2, 1, 0, 314, 1, 1, 595, X86ImpOpBase + 515, 0, 0xc0069e0010837ULL }, // Inst #4049 = SAR16rCL_EVEX |
| 43108 | { 4048, 2, 1, 0, 314, 1, 1, 595, X86ImpOpBase + 515, 0, 0x69800000b7ULL }, // Inst #4048 = SAR16rCL |
| 43109 | { 4047, 2, 1, 0, 301, 0, 0, 569, X86ImpOpBase + 0, 0, 0x1010e8e0010837ULL }, // Inst #4047 = SAR16r1_NF_ND |
| 43110 | { 4046, 2, 1, 0, 301, 0, 0, 595, X86ImpOpBase + 0, 0, 0x100068e0010837ULL }, // Inst #4046 = SAR16r1_NF |
| 43111 | { 4045, 2, 1, 0, 301, 0, 1, 569, X86ImpOpBase + 0, 0, 0x10e8e0010837ULL }, // Inst #4045 = SAR16r1_ND |
| 43112 | { 4044, 2, 1, 0, 301, 0, 1, 595, X86ImpOpBase + 0, 0, 0xc0068e0010837ULL }, // Inst #4044 = SAR16r1_EVEX |
| 43113 | { 4043, 2, 1, 0, 301, 0, 1, 595, X86ImpOpBase + 0, 0, 0x68800000b7ULL }, // Inst #4043 = SAR16r1 |
| 43114 | { 4042, 7, 1, 0, 610, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050827ULL }, // Inst #4042 = SAR16mi_NF_ND |
| 43115 | { 4041, 6, 0, 0, 609, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050827ULL }, // Inst #4041 = SAR16mi_NF |
| 43116 | { 4040, 7, 1, 0, 610, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050827ULL }, // Inst #4040 = SAR16mi_ND |
| 43117 | { 4039, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050827ULL }, // Inst #4039 = SAR16mi_EVEX |
| 43118 | { 4038, 6, 0, 0, 609, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a7ULL }, // Inst #4038 = SAR16mi |
| 43119 | { 4037, 6, 1, 0, 612, 1, 0, 589, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010827ULL }, // Inst #4037 = SAR16mCL_NF_ND |
| 43120 | { 4036, 5, 0, 0, 611, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010827ULL }, // Inst #4036 = SAR16mCL_NF |
| 43121 | { 4035, 6, 1, 0, 612, 1, 1, 589, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010827ULL }, // Inst #4035 = SAR16mCL_ND |
| 43122 | { 4034, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010827ULL }, // Inst #4034 = SAR16mCL_EVEX |
| 43123 | { 4033, 5, 0, 0, 611, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a7ULL }, // Inst #4033 = SAR16mCL |
| 43124 | { 4032, 6, 1, 0, 610, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010827ULL }, // Inst #4032 = SAR16m1_NF_ND |
| 43125 | { 4031, 5, 0, 0, 609, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010827ULL }, // Inst #4031 = SAR16m1_NF |
| 43126 | { 4030, 6, 1, 0, 610, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010827ULL }, // Inst #4030 = SAR16m1_ND |
| 43127 | { 4029, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010827ULL }, // Inst #4029 = SAR16m1_EVEX |
| 43128 | { 4028, 5, 0, 0, 609, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a7ULL }, // Inst #4028 = SAR16m1 |
| 43129 | { 4027, 0, 0, 0, 1497, 1, 1, 1, X86ImpOpBase + 520, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00000001ULL }, // Inst #4027 = SALC |
| 43130 | { 4026, 0, 0, 0, 1163, 1, 1, 1, X86ImpOpBase + 518, 0, 0x4f00000001ULL }, // Inst #4026 = SAHF |
| 43131 | { 4025, 5, 0, 0, 8, 1, 1, 232, X86ImpOpBase + 284, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80003025ULL }, // Inst #4025 = RSTORSSP |
| 43132 | { 4024, 3, 1, 0, 309, 0, 0, 494, X86ImpOpBase + 0, 0, 0x2908003029ULL }, // Inst #4024 = RSQRTSSr_Int |
| 43133 | { 4023, 2, 1, 0, 309, 0, 0, 1008, X86ImpOpBase + 0, 0, 0x2908003029ULL }, // Inst #4023 = RSQRTSSr |
| 43134 | { 4022, 7, 1, 0, 308, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2908003019ULL }, // Inst #4022 = RSQRTSSm_Int |
| 43135 | { 4021, 6, 1, 0, 307, 0, 0, 1002, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2908003019ULL }, // Inst #4021 = RSQRTSSm |
| 43136 | { 4020, 2, 1, 0, 306, 0, 0, 557, X86ImpOpBase + 0, 0, 0x2908002029ULL }, // Inst #4020 = RSQRTPSr |
| 43137 | { 4019, 6, 1, 0, 305, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2908002019ULL }, // Inst #4019 = RSQRTPSm |
| 43138 | { 4018, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5500002001ULL }, // Inst #4018 = RSM |
| 43139 | { 4017, 4, 1, 0, 1875, 1, 0, 585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x508046829ULL }, // Inst #4017 = ROUNDSSri_Int |
| 43140 | { 4016, 3, 1, 0, 1875, 1, 0, 1485, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x508046829ULL }, // Inst #4016 = ROUNDSSri |
| 43141 | { 4015, 8, 1, 0, 1874, 1, 0, 577, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x508046819ULL }, // Inst #4015 = ROUNDSSmi_Int |
| 43142 | { 4014, 7, 1, 0, 1874, 1, 0, 1478, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x508046819ULL }, // Inst #4014 = ROUNDSSmi |
| 43143 | { 4013, 4, 1, 0, 1875, 1, 0, 585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x590046829ULL }, // Inst #4013 = ROUNDSDri_Int |
| 43144 | { 4012, 3, 1, 0, 1875, 1, 0, 1475, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x590046829ULL }, // Inst #4012 = ROUNDSDri |
| 43145 | { 4011, 8, 1, 0, 1874, 1, 0, 577, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x590046819ULL }, // Inst #4011 = ROUNDSDmi_Int |
| 43146 | { 4010, 7, 1, 0, 1874, 1, 0, 1468, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x590046819ULL }, // Inst #4010 = ROUNDSDmi |
| 43147 | { 4009, 3, 1, 0, 1875, 1, 0, 566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x408046829ULL }, // Inst #4009 = ROUNDPSri |
| 43148 | { 4008, 7, 1, 0, 1873, 1, 0, 559, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x408046819ULL }, // Inst #4008 = ROUNDPSmi |
| 43149 | { 4007, 3, 1, 0, 1875, 1, 0, 566, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x490046829ULL }, // Inst #4007 = ROUNDPDri |
| 43150 | { 4006, 7, 1, 0, 1873, 1, 0, 559, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x490046819ULL }, // Inst #4006 = ROUNDPDmi |
| 43151 | { 4005, 3, 1, 0, 301, 0, 0, 427, X86ImpOpBase + 0, 0, 0x7860067829ULL }, // Inst #4005 = RORX64ri_EVEX |
| 43152 | { 4004, 3, 1, 0, 301, 0, 0, 427, X86ImpOpBase + 0, 0, 0x7820067829ULL }, // Inst #4004 = RORX64ri |
| 43153 | { 4003, 7, 1, 0, 300, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7860067819ULL }, // Inst #4003 = RORX64mi_EVEX |
| 43154 | { 4002, 7, 1, 0, 1440, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7820067819ULL }, // Inst #4002 = RORX64mi |
| 43155 | { 4001, 3, 1, 0, 301, 0, 0, 396, X86ImpOpBase + 0, 0, 0x7860047829ULL }, // Inst #4001 = RORX32ri_EVEX |
| 43156 | { 4000, 3, 1, 0, 301, 0, 0, 396, X86ImpOpBase + 0, 0, 0x7820047829ULL }, // Inst #4000 = RORX32ri |
| 43157 | { 3999, 7, 1, 0, 300, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7860047819ULL }, // Inst #3999 = RORX32mi_EVEX |
| 43158 | { 3998, 7, 1, 0, 1440, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7820047819ULL }, // Inst #3998 = RORX32mi |
| 43159 | { 3997, 3, 1, 0, 293, 0, 0, 467, X86ImpOpBase + 0, 0, 0x1010e060050031ULL }, // Inst #3997 = ROR8ri_NF_ND |
| 43160 | { 3996, 3, 1, 0, 293, 0, 0, 170, X86ImpOpBase + 0, 0, 0x10006060050031ULL }, // Inst #3996 = ROR8ri_NF |
| 43161 | { 3995, 3, 1, 0, 293, 0, 1, 467, X86ImpOpBase + 0, 0, 0x10e060050031ULL }, // Inst #3995 = ROR8ri_ND |
| 43162 | { 3994, 3, 1, 0, 293, 0, 1, 170, X86ImpOpBase + 0, 0, 0xc006060050031ULL }, // Inst #3994 = ROR8ri_EVEX |
| 43163 | { 3993, 3, 1, 0, 1617, 0, 1, 170, X86ImpOpBase + 0, 0, 0x6000040031ULL }, // Inst #3993 = ROR8ri |
| 43164 | { 3992, 2, 1, 0, 294, 1, 0, 947, X86ImpOpBase + 517, 0, 0x1010e960010031ULL }, // Inst #3992 = ROR8rCL_NF_ND |
| 43165 | { 3991, 2, 1, 0, 294, 1, 0, 1049, X86ImpOpBase + 517, 0, 0x10006960010031ULL }, // Inst #3991 = ROR8rCL_NF |
| 43166 | { 3990, 2, 1, 0, 294, 1, 1, 947, X86ImpOpBase + 515, 0, 0x10e960010031ULL }, // Inst #3990 = ROR8rCL_ND |
| 43167 | { 3989, 2, 1, 0, 294, 1, 1, 1049, X86ImpOpBase + 515, 0, 0xc006960010031ULL }, // Inst #3989 = ROR8rCL_EVEX |
| 43168 | { 3988, 2, 1, 0, 294, 1, 1, 1049, X86ImpOpBase + 515, 0, 0x6900000031ULL }, // Inst #3988 = ROR8rCL |
| 43169 | { 3987, 2, 1, 0, 293, 0, 0, 947, X86ImpOpBase + 0, 0, 0x1010e860010031ULL }, // Inst #3987 = ROR8r1_NF_ND |
| 43170 | { 3986, 2, 1, 0, 293, 0, 0, 1049, X86ImpOpBase + 0, 0, 0x10006860010031ULL }, // Inst #3986 = ROR8r1_NF |
| 43171 | { 3985, 2, 1, 0, 293, 0, 1, 947, X86ImpOpBase + 0, 0, 0x10e860010031ULL }, // Inst #3985 = ROR8r1_ND |
| 43172 | { 3984, 2, 1, 0, 293, 0, 1, 1049, X86ImpOpBase + 0, 0, 0xc006860010031ULL }, // Inst #3984 = ROR8r1_EVEX |
| 43173 | { 3983, 2, 1, 0, 861, 0, 1, 1049, X86ImpOpBase + 0, 0, 0x6800000031ULL }, // Inst #3983 = ROR8r1 |
| 43174 | { 3982, 7, 1, 0, 789, 0, 0, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e060050021ULL }, // Inst #3982 = ROR8mi_NF_ND |
| 43175 | { 3981, 6, 0, 0, 788, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006060050021ULL }, // Inst #3981 = ROR8mi_NF |
| 43176 | { 3980, 7, 1, 0, 789, 0, 1, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e060050021ULL }, // Inst #3980 = ROR8mi_ND |
| 43177 | { 3979, 6, 0, 0, 788, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050021ULL }, // Inst #3979 = ROR8mi_EVEX |
| 43178 | { 3978, 6, 0, 0, 1618, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040021ULL }, // Inst #3978 = ROR8mi |
| 43179 | { 3977, 6, 1, 0, 794, 1, 0, 941, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e960010021ULL }, // Inst #3977 = ROR8mCL_NF_ND |
| 43180 | { 3976, 5, 0, 0, 793, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006960010021ULL }, // Inst #3976 = ROR8mCL_NF |
| 43181 | { 3975, 6, 1, 0, 794, 1, 1, 941, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e960010021ULL }, // Inst #3975 = ROR8mCL_ND |
| 43182 | { 3974, 5, 0, 0, 793, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010021ULL }, // Inst #3974 = ROR8mCL_EVEX |
| 43183 | { 3973, 5, 0, 0, 1619, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000021ULL }, // Inst #3973 = ROR8mCL |
| 43184 | { 3972, 6, 1, 0, 789, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e860010021ULL }, // Inst #3972 = ROR8m1_NF_ND |
| 43185 | { 3971, 5, 0, 0, 788, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006860010021ULL }, // Inst #3971 = ROR8m1_NF |
| 43186 | { 3970, 6, 1, 0, 789, 0, 1, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e860010021ULL }, // Inst #3970 = ROR8m1_ND |
| 43187 | { 3969, 5, 0, 0, 788, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010021ULL }, // Inst #3969 = ROR8m1_EVEX |
| 43188 | { 3968, 5, 0, 0, 1618, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000021ULL }, // Inst #3968 = ROR8m1 |
| 43189 | { 3967, 3, 1, 0, 293, 0, 0, 427, X86ImpOpBase + 0, 0, 0x1010e0e0070031ULL }, // Inst #3967 = ROR64ri_NF_ND |
| 43190 | { 3966, 3, 1, 0, 293, 0, 0, 164, X86ImpOpBase + 0, 0, 0x100060e0070031ULL }, // Inst #3966 = ROR64ri_NF |
| 43191 | { 3965, 3, 1, 0, 293, 0, 1, 427, X86ImpOpBase + 0, 0, 0x10e0e0070031ULL }, // Inst #3965 = ROR64ri_ND |
| 43192 | { 3964, 3, 1, 0, 293, 0, 1, 164, X86ImpOpBase + 0, 0, 0xc0060e0070031ULL }, // Inst #3964 = ROR64ri_EVEX |
| 43193 | { 3963, 3, 1, 0, 1617, 0, 1, 164, X86ImpOpBase + 0, 0, 0x6080060031ULL }, // Inst #3963 = ROR64ri |
| 43194 | { 3962, 2, 1, 0, 294, 1, 0, 575, X86ImpOpBase + 517, 0, 0x1010e9e0030031ULL }, // Inst #3962 = ROR64rCL_NF_ND |
| 43195 | { 3961, 2, 1, 0, 294, 1, 0, 322, X86ImpOpBase + 517, 0, 0x100069e0030031ULL }, // Inst #3961 = ROR64rCL_NF |
| 43196 | { 3960, 2, 1, 0, 294, 1, 1, 575, X86ImpOpBase + 515, 0, 0x10e9e0030031ULL }, // Inst #3960 = ROR64rCL_ND |
| 43197 | { 3959, 2, 1, 0, 294, 1, 1, 322, X86ImpOpBase + 515, 0, 0xc0069e0030031ULL }, // Inst #3959 = ROR64rCL_EVEX |
| 43198 | { 3958, 2, 1, 0, 294, 1, 1, 322, X86ImpOpBase + 515, 0, 0x6980020031ULL }, // Inst #3958 = ROR64rCL |
| 43199 | { 3957, 2, 1, 0, 293, 0, 0, 575, X86ImpOpBase + 0, 0, 0x1010e8e0030031ULL }, // Inst #3957 = ROR64r1_NF_ND |
| 43200 | { 3956, 2, 1, 0, 293, 0, 0, 322, X86ImpOpBase + 0, 0, 0x100068e0030031ULL }, // Inst #3956 = ROR64r1_NF |
| 43201 | { 3955, 2, 1, 0, 293, 0, 1, 575, X86ImpOpBase + 0, 0, 0x10e8e0030031ULL }, // Inst #3955 = ROR64r1_ND |
| 43202 | { 3954, 2, 1, 0, 293, 0, 1, 322, X86ImpOpBase + 0, 0, 0xc0068e0030031ULL }, // Inst #3954 = ROR64r1_EVEX |
| 43203 | { 3953, 2, 1, 0, 861, 0, 1, 322, X86ImpOpBase + 0, 0, 0x6880020031ULL }, // Inst #3953 = ROR64r1 |
| 43204 | { 3952, 7, 1, 0, 789, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0070021ULL }, // Inst #3952 = ROR64mi_NF_ND |
| 43205 | { 3951, 6, 0, 0, 788, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0070021ULL }, // Inst #3951 = ROR64mi_NF |
| 43206 | { 3950, 7, 1, 0, 789, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070021ULL }, // Inst #3950 = ROR64mi_ND |
| 43207 | { 3949, 6, 0, 0, 788, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070021ULL }, // Inst #3949 = ROR64mi_EVEX |
| 43208 | { 3948, 6, 0, 0, 1615, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060021ULL }, // Inst #3948 = ROR64mi |
| 43209 | { 3947, 6, 1, 0, 794, 1, 0, 243, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0030021ULL }, // Inst #3947 = ROR64mCL_NF_ND |
| 43210 | { 3946, 5, 0, 0, 793, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0030021ULL }, // Inst #3946 = ROR64mCL_NF |
| 43211 | { 3945, 6, 1, 0, 794, 1, 1, 243, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030021ULL }, // Inst #3945 = ROR64mCL_ND |
| 43212 | { 3944, 5, 0, 0, 793, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030021ULL }, // Inst #3944 = ROR64mCL_EVEX |
| 43213 | { 3943, 5, 0, 0, 1616, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020021ULL }, // Inst #3943 = ROR64mCL |
| 43214 | { 3942, 6, 1, 0, 789, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0030021ULL }, // Inst #3942 = ROR64m1_NF_ND |
| 43215 | { 3941, 5, 0, 0, 788, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0030021ULL }, // Inst #3941 = ROR64m1_NF |
| 43216 | { 3940, 6, 1, 0, 789, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030021ULL }, // Inst #3940 = ROR64m1_ND |
| 43217 | { 3939, 5, 0, 0, 788, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030021ULL }, // Inst #3939 = ROR64m1_EVEX |
| 43218 | { 3938, 5, 0, 0, 1615, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020021ULL }, // Inst #3938 = ROR64m1 |
| 43219 | { 3937, 3, 1, 0, 293, 0, 0, 396, X86ImpOpBase + 0, 0, 0x1010e0e0050031ULL }, // Inst #3937 = ROR32ri_NF_ND |
| 43220 | { 3936, 3, 1, 0, 293, 0, 0, 158, X86ImpOpBase + 0, 0, 0x100060e0050031ULL }, // Inst #3936 = ROR32ri_NF |
| 43221 | { 3935, 3, 1, 0, 293, 0, 1, 396, X86ImpOpBase + 0, 0, 0x10e0e0050031ULL }, // Inst #3935 = ROR32ri_ND |
| 43222 | { 3934, 3, 1, 0, 293, 0, 1, 158, X86ImpOpBase + 0, 0, 0xc0060e0050031ULL }, // Inst #3934 = ROR32ri_EVEX |
| 43223 | { 3933, 3, 1, 0, 1617, 0, 1, 158, X86ImpOpBase + 0, 0, 0x6080040131ULL }, // Inst #3933 = ROR32ri |
| 43224 | { 3932, 2, 1, 0, 294, 1, 0, 573, X86ImpOpBase + 517, 0, 0x1010e9e0010031ULL }, // Inst #3932 = ROR32rCL_NF_ND |
| 43225 | { 3931, 2, 1, 0, 294, 1, 0, 320, X86ImpOpBase + 517, 0, 0x100069e0010031ULL }, // Inst #3931 = ROR32rCL_NF |
| 43226 | { 3930, 2, 1, 0, 294, 1, 1, 573, X86ImpOpBase + 515, 0, 0x10e9e0010031ULL }, // Inst #3930 = ROR32rCL_ND |
| 43227 | { 3929, 2, 1, 0, 294, 1, 1, 320, X86ImpOpBase + 515, 0, 0xc0069e0010031ULL }, // Inst #3929 = ROR32rCL_EVEX |
| 43228 | { 3928, 2, 1, 0, 294, 1, 1, 320, X86ImpOpBase + 515, 0, 0x6980000131ULL }, // Inst #3928 = ROR32rCL |
| 43229 | { 3927, 2, 1, 0, 293, 0, 0, 573, X86ImpOpBase + 0, 0, 0x1010e8e0010031ULL }, // Inst #3927 = ROR32r1_NF_ND |
| 43230 | { 3926, 2, 1, 0, 293, 0, 0, 320, X86ImpOpBase + 0, 0, 0x100068e0010031ULL }, // Inst #3926 = ROR32r1_NF |
| 43231 | { 3925, 2, 1, 0, 293, 0, 1, 573, X86ImpOpBase + 0, 0, 0x10e8e0010031ULL }, // Inst #3925 = ROR32r1_ND |
| 43232 | { 3924, 2, 1, 0, 293, 0, 1, 320, X86ImpOpBase + 0, 0, 0xc0068e0010031ULL }, // Inst #3924 = ROR32r1_EVEX |
| 43233 | { 3923, 2, 1, 0, 861, 0, 1, 320, X86ImpOpBase + 0, 0, 0x6880000131ULL }, // Inst #3923 = ROR32r1 |
| 43234 | { 3922, 7, 1, 0, 789, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050021ULL }, // Inst #3922 = ROR32mi_NF_ND |
| 43235 | { 3921, 6, 0, 0, 788, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050021ULL }, // Inst #3921 = ROR32mi_NF |
| 43236 | { 3920, 7, 1, 0, 789, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050021ULL }, // Inst #3920 = ROR32mi_ND |
| 43237 | { 3919, 6, 0, 0, 788, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050021ULL }, // Inst #3919 = ROR32mi_EVEX |
| 43238 | { 3918, 6, 0, 0, 1615, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040121ULL }, // Inst #3918 = ROR32mi |
| 43239 | { 3917, 6, 1, 0, 794, 1, 0, 237, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010021ULL }, // Inst #3917 = ROR32mCL_NF_ND |
| 43240 | { 3916, 5, 0, 0, 793, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010021ULL }, // Inst #3916 = ROR32mCL_NF |
| 43241 | { 3915, 6, 1, 0, 794, 1, 1, 237, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010021ULL }, // Inst #3915 = ROR32mCL_ND |
| 43242 | { 3914, 5, 0, 0, 793, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010021ULL }, // Inst #3914 = ROR32mCL_EVEX |
| 43243 | { 3913, 5, 0, 0, 1616, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000121ULL }, // Inst #3913 = ROR32mCL |
| 43244 | { 3912, 6, 1, 0, 789, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010021ULL }, // Inst #3912 = ROR32m1_NF_ND |
| 43245 | { 3911, 5, 0, 0, 788, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010021ULL }, // Inst #3911 = ROR32m1_NF |
| 43246 | { 3910, 6, 1, 0, 789, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010021ULL }, // Inst #3910 = ROR32m1_ND |
| 43247 | { 3909, 5, 0, 0, 788, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010021ULL }, // Inst #3909 = ROR32m1_EVEX |
| 43248 | { 3908, 5, 0, 0, 1615, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000121ULL }, // Inst #3908 = ROR32m1 |
| 43249 | { 3907, 3, 1, 0, 293, 0, 0, 362, X86ImpOpBase + 0, 0, 0x1010e0e0050831ULL }, // Inst #3907 = ROR16ri_NF_ND |
| 43250 | { 3906, 3, 1, 0, 293, 0, 0, 152, X86ImpOpBase + 0, 0, 0x100060e0050831ULL }, // Inst #3906 = ROR16ri_NF |
| 43251 | { 3905, 3, 1, 0, 293, 0, 1, 362, X86ImpOpBase + 0, 0, 0x10e0e0050831ULL }, // Inst #3905 = ROR16ri_ND |
| 43252 | { 3904, 3, 1, 0, 293, 0, 1, 152, X86ImpOpBase + 0, 0, 0xc0060e0050831ULL }, // Inst #3904 = ROR16ri_EVEX |
| 43253 | { 3903, 3, 1, 0, 1617, 0, 1, 152, X86ImpOpBase + 0, 0, 0x60800400b1ULL }, // Inst #3903 = ROR16ri |
| 43254 | { 3902, 2, 1, 0, 294, 1, 0, 569, X86ImpOpBase + 517, 0, 0x1010e9e0010831ULL }, // Inst #3902 = ROR16rCL_NF_ND |
| 43255 | { 3901, 2, 1, 0, 294, 1, 0, 595, X86ImpOpBase + 517, 0, 0x100069e0010831ULL }, // Inst #3901 = ROR16rCL_NF |
| 43256 | { 3900, 2, 1, 0, 294, 1, 1, 569, X86ImpOpBase + 515, 0, 0x10e9e0010831ULL }, // Inst #3900 = ROR16rCL_ND |
| 43257 | { 3899, 2, 1, 0, 294, 1, 1, 595, X86ImpOpBase + 515, 0, 0xc0069e0010831ULL }, // Inst #3899 = ROR16rCL_EVEX |
| 43258 | { 3898, 2, 1, 0, 294, 1, 1, 595, X86ImpOpBase + 515, 0, 0x69800000b1ULL }, // Inst #3898 = ROR16rCL |
| 43259 | { 3897, 2, 1, 0, 293, 0, 0, 569, X86ImpOpBase + 0, 0, 0x1010e8e0010831ULL }, // Inst #3897 = ROR16r1_NF_ND |
| 43260 | { 3896, 2, 1, 0, 293, 0, 0, 595, X86ImpOpBase + 0, 0, 0x100068e0010831ULL }, // Inst #3896 = ROR16r1_NF |
| 43261 | { 3895, 2, 1, 0, 293, 0, 1, 569, X86ImpOpBase + 0, 0, 0x10e8e0010831ULL }, // Inst #3895 = ROR16r1_ND |
| 43262 | { 3894, 2, 1, 0, 293, 0, 1, 595, X86ImpOpBase + 0, 0, 0xc0068e0010831ULL }, // Inst #3894 = ROR16r1_EVEX |
| 43263 | { 3893, 2, 1, 0, 861, 0, 1, 595, X86ImpOpBase + 0, 0, 0x68800000b1ULL }, // Inst #3893 = ROR16r1 |
| 43264 | { 3892, 7, 1, 0, 789, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050821ULL }, // Inst #3892 = ROR16mi_NF_ND |
| 43265 | { 3891, 6, 0, 0, 788, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050821ULL }, // Inst #3891 = ROR16mi_NF |
| 43266 | { 3890, 7, 1, 0, 789, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050821ULL }, // Inst #3890 = ROR16mi_ND |
| 43267 | { 3889, 6, 0, 0, 788, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050821ULL }, // Inst #3889 = ROR16mi_EVEX |
| 43268 | { 3888, 6, 0, 0, 1615, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a1ULL }, // Inst #3888 = ROR16mi |
| 43269 | { 3887, 6, 1, 0, 794, 1, 0, 589, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010821ULL }, // Inst #3887 = ROR16mCL_NF_ND |
| 43270 | { 3886, 5, 0, 0, 793, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010821ULL }, // Inst #3886 = ROR16mCL_NF |
| 43271 | { 3885, 6, 1, 0, 794, 1, 1, 589, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010821ULL }, // Inst #3885 = ROR16mCL_ND |
| 43272 | { 3884, 5, 0, 0, 793, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010821ULL }, // Inst #3884 = ROR16mCL_EVEX |
| 43273 | { 3883, 5, 0, 0, 1616, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a1ULL }, // Inst #3883 = ROR16mCL |
| 43274 | { 3882, 6, 1, 0, 789, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010821ULL }, // Inst #3882 = ROR16m1_NF_ND |
| 43275 | { 3881, 5, 0, 0, 788, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010821ULL }, // Inst #3881 = ROR16m1_NF |
| 43276 | { 3880, 6, 1, 0, 789, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010821ULL }, // Inst #3880 = ROR16m1_ND |
| 43277 | { 3879, 5, 0, 0, 788, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010821ULL }, // Inst #3879 = ROR16m1_EVEX |
| 43278 | { 3878, 5, 0, 0, 1615, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a1ULL }, // Inst #3878 = ROR16m1 |
| 43279 | { 3877, 3, 1, 0, 293, 0, 0, 467, X86ImpOpBase + 0, 0, 0x1010e060050030ULL }, // Inst #3877 = ROL8ri_NF_ND |
| 43280 | { 3876, 3, 1, 0, 293, 0, 0, 170, X86ImpOpBase + 0, 0, 0x10006060050030ULL }, // Inst #3876 = ROL8ri_NF |
| 43281 | { 3875, 3, 1, 0, 293, 0, 1, 467, X86ImpOpBase + 0, 0, 0x10e060050030ULL }, // Inst #3875 = ROL8ri_ND |
| 43282 | { 3874, 3, 1, 0, 293, 0, 1, 170, X86ImpOpBase + 0, 0, 0xc006060050030ULL }, // Inst #3874 = ROL8ri_EVEX |
| 43283 | { 3873, 3, 1, 0, 1617, 0, 1, 170, X86ImpOpBase + 0, 0, 0x6000040030ULL }, // Inst #3873 = ROL8ri |
| 43284 | { 3872, 2, 1, 0, 294, 1, 0, 947, X86ImpOpBase + 517, 0, 0x1010e960010030ULL }, // Inst #3872 = ROL8rCL_NF_ND |
| 43285 | { 3871, 2, 1, 0, 294, 1, 0, 1049, X86ImpOpBase + 517, 0, 0x10006960010030ULL }, // Inst #3871 = ROL8rCL_NF |
| 43286 | { 3870, 2, 1, 0, 294, 1, 1, 947, X86ImpOpBase + 515, 0, 0x10e960010030ULL }, // Inst #3870 = ROL8rCL_ND |
| 43287 | { 3869, 2, 1, 0, 294, 1, 1, 1049, X86ImpOpBase + 515, 0, 0xc006960010030ULL }, // Inst #3869 = ROL8rCL_EVEX |
| 43288 | { 3868, 2, 1, 0, 294, 1, 1, 1049, X86ImpOpBase + 515, 0, 0x6900000030ULL }, // Inst #3868 = ROL8rCL |
| 43289 | { 3867, 2, 1, 0, 293, 0, 0, 947, X86ImpOpBase + 0, 0, 0x1010e860010030ULL }, // Inst #3867 = ROL8r1_NF_ND |
| 43290 | { 3866, 2, 1, 0, 293, 0, 0, 1049, X86ImpOpBase + 0, 0, 0x10006860010030ULL }, // Inst #3866 = ROL8r1_NF |
| 43291 | { 3865, 2, 1, 0, 293, 0, 1, 947, X86ImpOpBase + 0, 0, 0x10e860010030ULL }, // Inst #3865 = ROL8r1_ND |
| 43292 | { 3864, 2, 1, 0, 293, 0, 1, 1049, X86ImpOpBase + 0, 0, 0xc006860010030ULL }, // Inst #3864 = ROL8r1_EVEX |
| 43293 | { 3863, 2, 1, 0, 861, 0, 1, 1049, X86ImpOpBase + 0, 0, 0x6800000030ULL }, // Inst #3863 = ROL8r1 |
| 43294 | { 3862, 7, 1, 0, 789, 0, 0, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e060050020ULL }, // Inst #3862 = ROL8mi_NF_ND |
| 43295 | { 3861, 6, 0, 0, 788, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006060050020ULL }, // Inst #3861 = ROL8mi_NF |
| 43296 | { 3860, 7, 1, 0, 789, 0, 1, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e060050020ULL }, // Inst #3860 = ROL8mi_ND |
| 43297 | { 3859, 6, 0, 0, 788, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050020ULL }, // Inst #3859 = ROL8mi_EVEX |
| 43298 | { 3858, 6, 0, 0, 1618, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040020ULL }, // Inst #3858 = ROL8mi |
| 43299 | { 3857, 6, 1, 0, 794, 1, 0, 941, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e960010020ULL }, // Inst #3857 = ROL8mCL_NF_ND |
| 43300 | { 3856, 5, 0, 0, 793, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006960010020ULL }, // Inst #3856 = ROL8mCL_NF |
| 43301 | { 3855, 6, 1, 0, 794, 1, 1, 941, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e960010020ULL }, // Inst #3855 = ROL8mCL_ND |
| 43302 | { 3854, 5, 0, 0, 793, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010020ULL }, // Inst #3854 = ROL8mCL_EVEX |
| 43303 | { 3853, 5, 0, 0, 1619, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000020ULL }, // Inst #3853 = ROL8mCL |
| 43304 | { 3852, 6, 1, 0, 789, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e860010020ULL }, // Inst #3852 = ROL8m1_NF_ND |
| 43305 | { 3851, 5, 0, 0, 788, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006860010020ULL }, // Inst #3851 = ROL8m1_NF |
| 43306 | { 3850, 6, 1, 0, 789, 0, 1, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e860010020ULL }, // Inst #3850 = ROL8m1_ND |
| 43307 | { 3849, 5, 0, 0, 788, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010020ULL }, // Inst #3849 = ROL8m1_EVEX |
| 43308 | { 3848, 5, 0, 0, 1618, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000020ULL }, // Inst #3848 = ROL8m1 |
| 43309 | { 3847, 3, 1, 0, 293, 0, 0, 427, X86ImpOpBase + 0, 0, 0x1010e0e0070030ULL }, // Inst #3847 = ROL64ri_NF_ND |
| 43310 | { 3846, 3, 1, 0, 293, 0, 0, 164, X86ImpOpBase + 0, 0, 0x100060e0070030ULL }, // Inst #3846 = ROL64ri_NF |
| 43311 | { 3845, 3, 1, 0, 293, 0, 1, 427, X86ImpOpBase + 0, 0, 0x10e0e0070030ULL }, // Inst #3845 = ROL64ri_ND |
| 43312 | { 3844, 3, 1, 0, 293, 0, 1, 164, X86ImpOpBase + 0, 0, 0xc0060e0070030ULL }, // Inst #3844 = ROL64ri_EVEX |
| 43313 | { 3843, 3, 1, 0, 1617, 0, 1, 164, X86ImpOpBase + 0, 0, 0x6080060030ULL }, // Inst #3843 = ROL64ri |
| 43314 | { 3842, 2, 1, 0, 294, 1, 0, 575, X86ImpOpBase + 517, 0, 0x1010e9e0030030ULL }, // Inst #3842 = ROL64rCL_NF_ND |
| 43315 | { 3841, 2, 1, 0, 294, 1, 0, 322, X86ImpOpBase + 517, 0, 0x100069e0030030ULL }, // Inst #3841 = ROL64rCL_NF |
| 43316 | { 3840, 2, 1, 0, 294, 1, 1, 575, X86ImpOpBase + 515, 0, 0x10e9e0030030ULL }, // Inst #3840 = ROL64rCL_ND |
| 43317 | { 3839, 2, 1, 0, 294, 1, 1, 322, X86ImpOpBase + 515, 0, 0xc0069e0030030ULL }, // Inst #3839 = ROL64rCL_EVEX |
| 43318 | { 3838, 2, 1, 0, 294, 1, 1, 322, X86ImpOpBase + 515, 0, 0x6980020030ULL }, // Inst #3838 = ROL64rCL |
| 43319 | { 3837, 2, 1, 0, 293, 0, 0, 575, X86ImpOpBase + 0, 0, 0x1010e8e0030030ULL }, // Inst #3837 = ROL64r1_NF_ND |
| 43320 | { 3836, 2, 1, 0, 293, 0, 0, 322, X86ImpOpBase + 0, 0, 0x100068e0030030ULL }, // Inst #3836 = ROL64r1_NF |
| 43321 | { 3835, 2, 1, 0, 293, 0, 1, 575, X86ImpOpBase + 0, 0, 0x10e8e0030030ULL }, // Inst #3835 = ROL64r1_ND |
| 43322 | { 3834, 2, 1, 0, 293, 0, 1, 322, X86ImpOpBase + 0, 0, 0xc0068e0030030ULL }, // Inst #3834 = ROL64r1_EVEX |
| 43323 | { 3833, 2, 1, 0, 861, 0, 1, 322, X86ImpOpBase + 0, 0, 0x6880020030ULL }, // Inst #3833 = ROL64r1 |
| 43324 | { 3832, 7, 1, 0, 789, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0070020ULL }, // Inst #3832 = ROL64mi_NF_ND |
| 43325 | { 3831, 6, 0, 0, 788, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0070020ULL }, // Inst #3831 = ROL64mi_NF |
| 43326 | { 3830, 7, 1, 0, 789, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070020ULL }, // Inst #3830 = ROL64mi_ND |
| 43327 | { 3829, 6, 0, 0, 788, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070020ULL }, // Inst #3829 = ROL64mi_EVEX |
| 43328 | { 3828, 6, 0, 0, 1615, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060020ULL }, // Inst #3828 = ROL64mi |
| 43329 | { 3827, 6, 1, 0, 794, 1, 0, 243, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0030020ULL }, // Inst #3827 = ROL64mCL_NF_ND |
| 43330 | { 3826, 5, 0, 0, 793, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0030020ULL }, // Inst #3826 = ROL64mCL_NF |
| 43331 | { 3825, 6, 1, 0, 794, 1, 1, 243, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030020ULL }, // Inst #3825 = ROL64mCL_ND |
| 43332 | { 3824, 5, 0, 0, 793, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030020ULL }, // Inst #3824 = ROL64mCL_EVEX |
| 43333 | { 3823, 5, 0, 0, 1616, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020020ULL }, // Inst #3823 = ROL64mCL |
| 43334 | { 3822, 6, 1, 0, 789, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0030020ULL }, // Inst #3822 = ROL64m1_NF_ND |
| 43335 | { 3821, 5, 0, 0, 788, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0030020ULL }, // Inst #3821 = ROL64m1_NF |
| 43336 | { 3820, 6, 1, 0, 789, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030020ULL }, // Inst #3820 = ROL64m1_ND |
| 43337 | { 3819, 5, 0, 0, 788, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030020ULL }, // Inst #3819 = ROL64m1_EVEX |
| 43338 | { 3818, 5, 0, 0, 1615, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020020ULL }, // Inst #3818 = ROL64m1 |
| 43339 | { 3817, 3, 1, 0, 293, 0, 0, 396, X86ImpOpBase + 0, 0, 0x1010e0e0050030ULL }, // Inst #3817 = ROL32ri_NF_ND |
| 43340 | { 3816, 3, 1, 0, 293, 0, 0, 158, X86ImpOpBase + 0, 0, 0x100060e0050030ULL }, // Inst #3816 = ROL32ri_NF |
| 43341 | { 3815, 3, 1, 0, 293, 0, 1, 396, X86ImpOpBase + 0, 0, 0x10e0e0050030ULL }, // Inst #3815 = ROL32ri_ND |
| 43342 | { 3814, 3, 1, 0, 293, 0, 1, 158, X86ImpOpBase + 0, 0, 0xc0060e0050030ULL }, // Inst #3814 = ROL32ri_EVEX |
| 43343 | { 3813, 3, 1, 0, 1617, 0, 1, 158, X86ImpOpBase + 0, 0, 0x6080040130ULL }, // Inst #3813 = ROL32ri |
| 43344 | { 3812, 2, 1, 0, 294, 1, 0, 573, X86ImpOpBase + 517, 0, 0x1010e9e0010030ULL }, // Inst #3812 = ROL32rCL_NF_ND |
| 43345 | { 3811, 2, 1, 0, 294, 1, 0, 320, X86ImpOpBase + 517, 0, 0x100069e0010030ULL }, // Inst #3811 = ROL32rCL_NF |
| 43346 | { 3810, 2, 1, 0, 294, 1, 1, 573, X86ImpOpBase + 515, 0, 0x10e9e0010030ULL }, // Inst #3810 = ROL32rCL_ND |
| 43347 | { 3809, 2, 1, 0, 294, 1, 1, 320, X86ImpOpBase + 515, 0, 0xc0069e0010030ULL }, // Inst #3809 = ROL32rCL_EVEX |
| 43348 | { 3808, 2, 1, 0, 294, 1, 1, 320, X86ImpOpBase + 515, 0, 0x6980000130ULL }, // Inst #3808 = ROL32rCL |
| 43349 | { 3807, 2, 1, 0, 293, 0, 0, 573, X86ImpOpBase + 0, 0, 0x1010e8e0010030ULL }, // Inst #3807 = ROL32r1_NF_ND |
| 43350 | { 3806, 2, 1, 0, 293, 0, 0, 320, X86ImpOpBase + 0, 0, 0x100068e0010030ULL }, // Inst #3806 = ROL32r1_NF |
| 43351 | { 3805, 2, 1, 0, 293, 0, 1, 573, X86ImpOpBase + 0, 0, 0x10e8e0010030ULL }, // Inst #3805 = ROL32r1_ND |
| 43352 | { 3804, 2, 1, 0, 293, 0, 1, 320, X86ImpOpBase + 0, 0, 0xc0068e0010030ULL }, // Inst #3804 = ROL32r1_EVEX |
| 43353 | { 3803, 2, 1, 0, 861, 0, 1, 320, X86ImpOpBase + 0, 0, 0x6880000130ULL }, // Inst #3803 = ROL32r1 |
| 43354 | { 3802, 7, 1, 0, 789, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050020ULL }, // Inst #3802 = ROL32mi_NF_ND |
| 43355 | { 3801, 6, 0, 0, 788, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050020ULL }, // Inst #3801 = ROL32mi_NF |
| 43356 | { 3800, 7, 1, 0, 789, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050020ULL }, // Inst #3800 = ROL32mi_ND |
| 43357 | { 3799, 6, 0, 0, 788, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050020ULL }, // Inst #3799 = ROL32mi_EVEX |
| 43358 | { 3798, 6, 0, 0, 1615, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040120ULL }, // Inst #3798 = ROL32mi |
| 43359 | { 3797, 6, 1, 0, 794, 1, 0, 237, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010020ULL }, // Inst #3797 = ROL32mCL_NF_ND |
| 43360 | { 3796, 5, 0, 0, 793, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010020ULL }, // Inst #3796 = ROL32mCL_NF |
| 43361 | { 3795, 6, 1, 0, 794, 1, 1, 237, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010020ULL }, // Inst #3795 = ROL32mCL_ND |
| 43362 | { 3794, 5, 0, 0, 793, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010020ULL }, // Inst #3794 = ROL32mCL_EVEX |
| 43363 | { 3793, 5, 0, 0, 1616, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000120ULL }, // Inst #3793 = ROL32mCL |
| 43364 | { 3792, 6, 1, 0, 789, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010020ULL }, // Inst #3792 = ROL32m1_NF_ND |
| 43365 | { 3791, 5, 0, 0, 788, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010020ULL }, // Inst #3791 = ROL32m1_NF |
| 43366 | { 3790, 6, 1, 0, 789, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010020ULL }, // Inst #3790 = ROL32m1_ND |
| 43367 | { 3789, 5, 0, 0, 788, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010020ULL }, // Inst #3789 = ROL32m1_EVEX |
| 43368 | { 3788, 5, 0, 0, 1615, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000120ULL }, // Inst #3788 = ROL32m1 |
| 43369 | { 3787, 3, 1, 0, 293, 0, 0, 362, X86ImpOpBase + 0, 0, 0x1010e0e0050830ULL }, // Inst #3787 = ROL16ri_NF_ND |
| 43370 | { 3786, 3, 1, 0, 293, 0, 0, 152, X86ImpOpBase + 0, 0, 0x100060e0050830ULL }, // Inst #3786 = ROL16ri_NF |
| 43371 | { 3785, 3, 1, 0, 293, 0, 1, 362, X86ImpOpBase + 0, 0, 0x10e0e0050830ULL }, // Inst #3785 = ROL16ri_ND |
| 43372 | { 3784, 3, 1, 0, 293, 0, 1, 152, X86ImpOpBase + 0, 0, 0xc0060e0050830ULL }, // Inst #3784 = ROL16ri_EVEX |
| 43373 | { 3783, 3, 1, 0, 1617, 0, 1, 152, X86ImpOpBase + 0, 0, 0x60800400b0ULL }, // Inst #3783 = ROL16ri |
| 43374 | { 3782, 2, 1, 0, 294, 1, 0, 569, X86ImpOpBase + 517, 0, 0x1010e9e0010830ULL }, // Inst #3782 = ROL16rCL_NF_ND |
| 43375 | { 3781, 2, 1, 0, 294, 1, 0, 595, X86ImpOpBase + 517, 0, 0x100069e0010830ULL }, // Inst #3781 = ROL16rCL_NF |
| 43376 | { 3780, 2, 1, 0, 294, 1, 1, 569, X86ImpOpBase + 515, 0, 0x10e9e0010830ULL }, // Inst #3780 = ROL16rCL_ND |
| 43377 | { 3779, 2, 1, 0, 294, 1, 1, 595, X86ImpOpBase + 515, 0, 0xc0069e0010830ULL }, // Inst #3779 = ROL16rCL_EVEX |
| 43378 | { 3778, 2, 1, 0, 294, 1, 1, 595, X86ImpOpBase + 515, 0, 0x69800000b0ULL }, // Inst #3778 = ROL16rCL |
| 43379 | { 3777, 2, 1, 0, 293, 0, 0, 569, X86ImpOpBase + 0, 0, 0x1010e8e0010830ULL }, // Inst #3777 = ROL16r1_NF_ND |
| 43380 | { 3776, 2, 1, 0, 293, 0, 0, 595, X86ImpOpBase + 0, 0, 0x100068e0010830ULL }, // Inst #3776 = ROL16r1_NF |
| 43381 | { 3775, 2, 1, 0, 293, 0, 1, 569, X86ImpOpBase + 0, 0, 0x10e8e0010830ULL }, // Inst #3775 = ROL16r1_ND |
| 43382 | { 3774, 2, 1, 0, 293, 0, 1, 595, X86ImpOpBase + 0, 0, 0xc0068e0010830ULL }, // Inst #3774 = ROL16r1_EVEX |
| 43383 | { 3773, 2, 1, 0, 861, 0, 1, 595, X86ImpOpBase + 0, 0, 0x68800000b0ULL }, // Inst #3773 = ROL16r1 |
| 43384 | { 3772, 7, 1, 0, 789, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050820ULL }, // Inst #3772 = ROL16mi_NF_ND |
| 43385 | { 3771, 6, 0, 0, 788, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050820ULL }, // Inst #3771 = ROL16mi_NF |
| 43386 | { 3770, 7, 1, 0, 789, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050820ULL }, // Inst #3770 = ROL16mi_ND |
| 43387 | { 3769, 6, 0, 0, 788, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050820ULL }, // Inst #3769 = ROL16mi_EVEX |
| 43388 | { 3768, 6, 0, 0, 1615, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a0ULL }, // Inst #3768 = ROL16mi |
| 43389 | { 3767, 6, 1, 0, 794, 1, 0, 589, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010820ULL }, // Inst #3767 = ROL16mCL_NF_ND |
| 43390 | { 3766, 5, 0, 0, 793, 1, 0, 232, X86ImpOpBase + 517, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010820ULL }, // Inst #3766 = ROL16mCL_NF |
| 43391 | { 3765, 6, 1, 0, 794, 1, 1, 589, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010820ULL }, // Inst #3765 = ROL16mCL_ND |
| 43392 | { 3764, 5, 0, 0, 793, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010820ULL }, // Inst #3764 = ROL16mCL_EVEX |
| 43393 | { 3763, 5, 0, 0, 1616, 1, 1, 232, X86ImpOpBase + 515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a0ULL }, // Inst #3763 = ROL16mCL |
| 43394 | { 3762, 6, 1, 0, 789, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010820ULL }, // Inst #3762 = ROL16m1_NF_ND |
| 43395 | { 3761, 5, 0, 0, 788, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010820ULL }, // Inst #3761 = ROL16m1_NF |
| 43396 | { 3760, 6, 1, 0, 789, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010820ULL }, // Inst #3760 = ROL16m1_ND |
| 43397 | { 3759, 5, 0, 0, 788, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010820ULL }, // Inst #3759 = ROL16m1_EVEX |
| 43398 | { 3758, 5, 0, 0, 1615, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a0ULL }, // Inst #3758 = ROL16m1 |
| 43399 | { 3757, 0, 0, 0, 8, 2, 2, 1, X86ImpOpBase + 511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000387eULL }, // Inst #3757 = RMPUPDATE |
| 43400 | { 3756, 0, 0, 0, 8, 2, 4, 1, X86ImpOpBase + 505, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000307dULL }, // Inst #3756 = RMPQUERY |
| 43401 | { 3755, 0, 0, 0, 8, 3, 2, 1, X86ImpOpBase + 433, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000307eULL }, // Inst #3755 = RMPADJUST |
| 43402 | { 3754, 0, 0, 0, 1614, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x240000000aULL }, // Inst #3754 = REX64_PREFIX |
| 43403 | { 3753, 1, 0, 0, 819, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x6101d00101ULL }, // Inst #3753 = RETI64 |
| 43404 | { 3752, 1, 0, 0, 819, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x6101d00101ULL }, // Inst #3752 = RETI32 |
| 43405 | { 3751, 1, 0, 0, 819, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6101d00081ULL }, // Inst #3751 = RETI16 |
| 43406 | { 3750, 0, 0, 0, 741, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x6181c00101ULL }, // Inst #3750 = RET64 |
| 43407 | { 3749, 0, 0, 0, 860, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x6181c00101ULL }, // Inst #3749 = RET32 |
| 43408 | { 3748, 0, 0, 0, 1439, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6181c00081ULL }, // Inst #3748 = RET16 |
| 43409 | { 3747, 1, 0, 0, 722, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x1c00000ULL }, // Inst #3747 = RET |
| 43410 | { 3746, 0, 0, 0, 17, 3, 2, 1, X86ImpOpBase + 500, 0|(1ULL<<MCID::MayStore), 0x5584000681ULL }, // Inst #3746 = REP_STOSW_64 |
| 43411 | { 3745, 0, 0, 0, 17, 3, 2, 1, X86ImpOpBase + 495, 0|(1ULL<<MCID::MayStore), 0x5584000481ULL }, // Inst #3745 = REP_STOSW_32 |
| 43412 | { 3744, 0, 0, 0, 17, 3, 2, 1, X86ImpOpBase + 485, 0|(1ULL<<MCID::MayStore), 0x5584020601ULL }, // Inst #3744 = REP_STOSQ_64 |
| 43413 | { 3743, 0, 0, 0, 17, 3, 2, 1, X86ImpOpBase + 490, 0|(1ULL<<MCID::MayStore), 0x5584020401ULL }, // Inst #3743 = REP_STOSQ_32 |
| 43414 | { 3742, 0, 0, 0, 17, 3, 2, 1, X86ImpOpBase + 485, 0|(1ULL<<MCID::MayStore), 0x5584000701ULL }, // Inst #3742 = REP_STOSD_64 |
| 43415 | { 3741, 0, 0, 0, 17, 3, 2, 1, X86ImpOpBase + 480, 0|(1ULL<<MCID::MayStore), 0x5584000501ULL }, // Inst #3741 = REP_STOSD_32 |
| 43416 | { 3740, 0, 0, 0, 17, 3, 2, 1, X86ImpOpBase + 475, 0|(1ULL<<MCID::MayStore), 0x5504000601ULL }, // Inst #3740 = REP_STOSB_64 |
| 43417 | { 3739, 0, 0, 0, 17, 3, 2, 1, X86ImpOpBase + 470, 0|(1ULL<<MCID::MayStore), 0x5504000401ULL }, // Inst #3739 = REP_STOSB_32 |
| 43418 | { 3738, 0, 0, 0, 17, 2, 1, 1, X86ImpOpBase + 455, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x798000000aULL }, // Inst #3738 = REP_PREFIX |
| 43419 | { 3737, 0, 0, 0, 17, 3, 3, 1, X86ImpOpBase + 464, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000681ULL }, // Inst #3737 = REP_MOVSW_64 |
| 43420 | { 3736, 0, 0, 0, 17, 3, 3, 1, X86ImpOpBase + 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000481ULL }, // Inst #3736 = REP_MOVSW_32 |
| 43421 | { 3735, 0, 0, 0, 17, 3, 3, 1, X86ImpOpBase + 464, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284020601ULL }, // Inst #3735 = REP_MOVSQ_64 |
| 43422 | { 3734, 0, 0, 0, 17, 3, 3, 1, X86ImpOpBase + 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284020401ULL }, // Inst #3734 = REP_MOVSQ_32 |
| 43423 | { 3733, 0, 0, 0, 17, 3, 3, 1, X86ImpOpBase + 464, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000701ULL }, // Inst #3733 = REP_MOVSD_64 |
| 43424 | { 3732, 0, 0, 0, 17, 3, 3, 1, X86ImpOpBase + 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000501ULL }, // Inst #3732 = REP_MOVSD_32 |
| 43425 | { 3731, 0, 0, 0, 17, 3, 3, 1, X86ImpOpBase + 464, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5204000601ULL }, // Inst #3731 = REP_MOVSB_64 |
| 43426 | { 3730, 0, 0, 0, 17, 3, 3, 1, X86ImpOpBase + 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5204000401ULL }, // Inst #3730 = REP_MOVSB_32 |
| 43427 | { 3729, 0, 0, 0, 17, 2, 1, 1, X86ImpOpBase + 455, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x790000000aULL }, // Inst #3729 = REPNE_PREFIX |
| 43428 | { 3728, 0, 0, 0, 705, 0, 3, 1, X86ImpOpBase + 452, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002079ULL }, // Inst #3728 = RDTSCP |
| 43429 | { 3727, 0, 0, 0, 880, 0, 2, 1, X86ImpOpBase + 450, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1880002001ULL }, // Inst #3727 = RDTSC |
| 43430 | { 3726, 2, 1, 0, 8, 1, 0, 322, X86ImpOpBase + 122, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xf00023031ULL }, // Inst #3726 = RDSSPQ |
| 43431 | { 3725, 2, 1, 0, 8, 1, 0, 320, X86ImpOpBase + 122, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xf00003031ULL }, // Inst #3725 = RDSSPD |
| 43432 | { 3724, 1, 1, 0, 1613, 0, 1, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380022037ULL }, // Inst #3724 = RDSEED64r |
| 43433 | { 3723, 1, 1, 0, 1613, 0, 1, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002137ULL }, // Inst #3723 = RDSEED32r |
| 43434 | { 3722, 1, 1, 0, 1612, 0, 1, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x63800020b7ULL }, // Inst #3722 = RDSEED16r |
| 43435 | { 3721, 1, 1, 0, 822, 0, 1, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380022036ULL }, // Inst #3721 = RDRAND64r |
| 43436 | { 3720, 1, 1, 0, 822, 0, 1, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002136ULL }, // Inst #3720 = RDRAND32r |
| 43437 | { 3719, 1, 1, 0, 1611, 0, 1, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x63800020b6ULL }, // Inst #3719 = RDRAND16r |
| 43438 | { 3718, 0, 0, 0, 8, 1, 2, 1, X86ImpOpBase + 441, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207dULL }, // Inst #3718 = RDPRU |
| 43439 | { 3717, 0, 0, 0, 821, 1, 2, 1, X86ImpOpBase + 447, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1980002001ULL }, // Inst #3717 = RDPMC |
| 43440 | { 3716, 0, 0, 0, 1610, 1, 2, 1, X86ImpOpBase + 441, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000206eULL }, // Inst #3716 = RDPKRUr |
| 43441 | { 3715, 1, 1, 0, 1609, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380003037ULL }, // Inst #3715 = RDPID64 |
| 43442 | { 3714, 1, 1, 0, 8, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380003037ULL }, // Inst #3714 = RDPID32 |
| 43443 | { 3713, 2, 1, 0, 8, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b60197830ULL }, // Inst #3713 = RDMSRri_EVEX |
| 43444 | { 3712, 2, 1, 0, 8, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b20197830ULL }, // Inst #3712 = RDMSRri |
| 43445 | { 3711, 0, 0, 0, 8, 3, 0, 1, X86ImpOpBase + 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80003846ULL }, // Inst #3711 = RDMSRLIST |
| 43446 | { 3710, 0, 0, 0, 721, 1, 2, 1, X86ImpOpBase + 441, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1900002001ULL }, // Inst #3710 = RDMSR |
| 43447 | { 3709, 1, 1, 0, 8, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023031ULL }, // Inst #3709 = RDGSBASE64 |
| 43448 | { 3708, 1, 1, 0, 8, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003031ULL }, // Inst #3708 = RDGSBASE |
| 43449 | { 3707, 1, 1, 0, 8, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023030ULL }, // Inst #3707 = RDFSBASE64 |
| 43450 | { 3706, 1, 1, 0, 8, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003030ULL }, // Inst #3706 = RDFSBASE |
| 43451 | { 3705, 3, 1, 0, 293, 1, 1, 467, X86ImpOpBase + 31, 0, 0x10e060050033ULL }, // Inst #3705 = RCR8ri_ND |
| 43452 | { 3704, 3, 1, 0, 293, 1, 1, 170, X86ImpOpBase + 31, 0, 0xc006060050033ULL }, // Inst #3704 = RCR8ri_EVEX |
| 43453 | { 3703, 3, 1, 0, 1166, 1, 1, 170, X86ImpOpBase + 31, 0, 0x6000040033ULL }, // Inst #3703 = RCR8ri |
| 43454 | { 3702, 2, 1, 0, 757, 2, 1, 947, X86ImpOpBase + 438, 0, 0x10e960010033ULL }, // Inst #3702 = RCR8rCL_ND |
| 43455 | { 3701, 2, 1, 0, 757, 2, 1, 1049, X86ImpOpBase + 438, 0, 0xc006960010033ULL }, // Inst #3701 = RCR8rCL_EVEX |
| 43456 | { 3700, 2, 1, 0, 879, 2, 1, 1049, X86ImpOpBase + 438, 0, 0x6900000033ULL }, // Inst #3700 = RCR8rCL |
| 43457 | { 3699, 2, 1, 0, 293, 1, 1, 947, X86ImpOpBase + 31, 0, 0x10e860010033ULL }, // Inst #3699 = RCR8r1_ND |
| 43458 | { 3698, 2, 1, 0, 293, 1, 1, 1049, X86ImpOpBase + 31, 0, 0xc006860010033ULL }, // Inst #3698 = RCR8r1_EVEX |
| 43459 | { 3697, 2, 1, 0, 752, 1, 1, 1049, X86ImpOpBase + 31, 0, 0x6800000033ULL }, // Inst #3697 = RCR8r1 |
| 43460 | { 3696, 7, 1, 0, 606, 1, 1, 447, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e060050023ULL }, // Inst #3696 = RCR8mi_ND |
| 43461 | { 3695, 6, 0, 0, 605, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050023ULL }, // Inst #3695 = RCR8mi_EVEX |
| 43462 | { 3694, 6, 0, 0, 1606, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040023ULL }, // Inst #3694 = RCR8mi |
| 43463 | { 3693, 6, 1, 0, 608, 2, 1, 941, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad), 0x10e960010023ULL }, // Inst #3693 = RCR8mCL_ND |
| 43464 | { 3692, 5, 0, 0, 607, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010023ULL }, // Inst #3692 = RCR8mCL_EVEX |
| 43465 | { 3691, 5, 0, 0, 1608, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000023ULL }, // Inst #3691 = RCR8mCL |
| 43466 | { 3690, 6, 1, 0, 606, 1, 1, 941, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e860010023ULL }, // Inst #3690 = RCR8m1_ND |
| 43467 | { 3689, 5, 0, 0, 605, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010023ULL }, // Inst #3689 = RCR8m1_EVEX |
| 43468 | { 3688, 5, 0, 0, 1604, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000023ULL }, // Inst #3688 = RCR8m1 |
| 43469 | { 3687, 3, 1, 0, 293, 1, 1, 427, X86ImpOpBase + 31, 0, 0x10e0e0070033ULL }, // Inst #3687 = RCR64ri_ND |
| 43470 | { 3686, 3, 1, 0, 293, 1, 1, 164, X86ImpOpBase + 31, 0, 0xc0060e0070033ULL }, // Inst #3686 = RCR64ri_EVEX |
| 43471 | { 3685, 3, 1, 0, 753, 1, 1, 164, X86ImpOpBase + 31, 0, 0x6080060033ULL }, // Inst #3685 = RCR64ri |
| 43472 | { 3684, 2, 1, 0, 877, 2, 1, 575, X86ImpOpBase + 438, 0, 0x10e9e0030033ULL }, // Inst #3684 = RCR64rCL_ND |
| 43473 | { 3683, 2, 1, 0, 877, 2, 1, 322, X86ImpOpBase + 438, 0, 0xc0069e0030033ULL }, // Inst #3683 = RCR64rCL_EVEX |
| 43474 | { 3682, 2, 1, 0, 1169, 2, 1, 322, X86ImpOpBase + 438, 0, 0x6980020033ULL }, // Inst #3682 = RCR64rCL |
| 43475 | { 3681, 2, 1, 0, 293, 1, 1, 575, X86ImpOpBase + 31, 0, 0x10e8e0030033ULL }, // Inst #3681 = RCR64r1_ND |
| 43476 | { 3680, 2, 1, 0, 293, 1, 1, 322, X86ImpOpBase + 31, 0, 0xc0068e0030033ULL }, // Inst #3680 = RCR64r1_EVEX |
| 43477 | { 3679, 2, 1, 0, 752, 1, 1, 322, X86ImpOpBase + 31, 0, 0x6880020033ULL }, // Inst #3679 = RCR64r1 |
| 43478 | { 3678, 7, 1, 0, 606, 1, 1, 413, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070023ULL }, // Inst #3678 = RCR64mi_ND |
| 43479 | { 3677, 6, 0, 0, 605, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070023ULL }, // Inst #3677 = RCR64mi_EVEX |
| 43480 | { 3676, 6, 0, 0, 1023, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060023ULL }, // Inst #3676 = RCR64mi |
| 43481 | { 3675, 6, 1, 0, 608, 2, 1, 243, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030023ULL }, // Inst #3675 = RCR64mCL_ND |
| 43482 | { 3674, 5, 0, 0, 607, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030023ULL }, // Inst #3674 = RCR64mCL_EVEX |
| 43483 | { 3673, 5, 0, 0, 1026, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020023ULL }, // Inst #3673 = RCR64mCL |
| 43484 | { 3672, 6, 1, 0, 606, 1, 1, 243, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030023ULL }, // Inst #3672 = RCR64m1_ND |
| 43485 | { 3671, 5, 0, 0, 605, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030023ULL }, // Inst #3671 = RCR64m1_EVEX |
| 43486 | { 3670, 5, 0, 0, 1022, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020023ULL }, // Inst #3670 = RCR64m1 |
| 43487 | { 3669, 3, 1, 0, 293, 1, 1, 396, X86ImpOpBase + 31, 0, 0x10e0e0050033ULL }, // Inst #3669 = RCR32ri_ND |
| 43488 | { 3668, 3, 1, 0, 293, 1, 1, 158, X86ImpOpBase + 31, 0, 0xc0060e0050033ULL }, // Inst #3668 = RCR32ri_EVEX |
| 43489 | { 3667, 3, 1, 0, 753, 1, 1, 158, X86ImpOpBase + 31, 0, 0x6080040133ULL }, // Inst #3667 = RCR32ri |
| 43490 | { 3666, 2, 1, 0, 877, 2, 1, 573, X86ImpOpBase + 438, 0, 0x10e9e0010033ULL }, // Inst #3666 = RCR32rCL_ND |
| 43491 | { 3665, 2, 1, 0, 877, 2, 1, 320, X86ImpOpBase + 438, 0, 0xc0069e0010033ULL }, // Inst #3665 = RCR32rCL_EVEX |
| 43492 | { 3664, 2, 1, 0, 1169, 2, 1, 320, X86ImpOpBase + 438, 0, 0x6980000133ULL }, // Inst #3664 = RCR32rCL |
| 43493 | { 3663, 2, 1, 0, 293, 1, 1, 573, X86ImpOpBase + 31, 0, 0x10e8e0010033ULL }, // Inst #3663 = RCR32r1_ND |
| 43494 | { 3662, 2, 1, 0, 293, 1, 1, 320, X86ImpOpBase + 31, 0, 0xc0068e0010033ULL }, // Inst #3662 = RCR32r1_EVEX |
| 43495 | { 3661, 2, 1, 0, 752, 1, 1, 320, X86ImpOpBase + 31, 0, 0x6880000133ULL }, // Inst #3661 = RCR32r1 |
| 43496 | { 3660, 7, 1, 0, 606, 1, 1, 382, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050023ULL }, // Inst #3660 = RCR32mi_ND |
| 43497 | { 3659, 6, 0, 0, 605, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050023ULL }, // Inst #3659 = RCR32mi_EVEX |
| 43498 | { 3658, 6, 0, 0, 1023, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040123ULL }, // Inst #3658 = RCR32mi |
| 43499 | { 3657, 6, 1, 0, 608, 2, 1, 237, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010023ULL }, // Inst #3657 = RCR32mCL_ND |
| 43500 | { 3656, 5, 0, 0, 607, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010023ULL }, // Inst #3656 = RCR32mCL_EVEX |
| 43501 | { 3655, 5, 0, 0, 1026, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000123ULL }, // Inst #3655 = RCR32mCL |
| 43502 | { 3654, 6, 1, 0, 606, 1, 1, 237, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010023ULL }, // Inst #3654 = RCR32m1_ND |
| 43503 | { 3653, 5, 0, 0, 605, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010023ULL }, // Inst #3653 = RCR32m1_EVEX |
| 43504 | { 3652, 5, 0, 0, 1022, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000123ULL }, // Inst #3652 = RCR32m1 |
| 43505 | { 3651, 3, 1, 0, 293, 1, 1, 362, X86ImpOpBase + 31, 0, 0x10e0e0050833ULL }, // Inst #3651 = RCR16ri_ND |
| 43506 | { 3650, 3, 1, 0, 293, 1, 1, 152, X86ImpOpBase + 31, 0, 0xc0060e0050833ULL }, // Inst #3650 = RCR16ri_EVEX |
| 43507 | { 3649, 3, 1, 0, 1168, 1, 1, 152, X86ImpOpBase + 31, 0, 0x60800400b3ULL }, // Inst #3649 = RCR16ri |
| 43508 | { 3648, 2, 1, 0, 877, 2, 1, 569, X86ImpOpBase + 438, 0, 0x10e9e0010833ULL }, // Inst #3648 = RCR16rCL_ND |
| 43509 | { 3647, 2, 1, 0, 877, 2, 1, 595, X86ImpOpBase + 438, 0, 0xc0069e0010833ULL }, // Inst #3647 = RCR16rCL_EVEX |
| 43510 | { 3646, 2, 1, 0, 1025, 2, 1, 595, X86ImpOpBase + 438, 0, 0x69800000b3ULL }, // Inst #3646 = RCR16rCL |
| 43511 | { 3645, 2, 1, 0, 293, 1, 1, 569, X86ImpOpBase + 31, 0, 0x10e8e0010833ULL }, // Inst #3645 = RCR16r1_ND |
| 43512 | { 3644, 2, 1, 0, 293, 1, 1, 595, X86ImpOpBase + 31, 0, 0xc0068e0010833ULL }, // Inst #3644 = RCR16r1_EVEX |
| 43513 | { 3643, 2, 1, 0, 752, 1, 1, 595, X86ImpOpBase + 31, 0, 0x68800000b3ULL }, // Inst #3643 = RCR16r1 |
| 43514 | { 3642, 7, 1, 0, 606, 1, 1, 342, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050823ULL }, // Inst #3642 = RCR16mi_ND |
| 43515 | { 3641, 6, 0, 0, 605, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050823ULL }, // Inst #3641 = RCR16mi_EVEX |
| 43516 | { 3640, 6, 0, 0, 1023, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a3ULL }, // Inst #3640 = RCR16mi |
| 43517 | { 3639, 6, 1, 0, 608, 2, 1, 589, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010823ULL }, // Inst #3639 = RCR16mCL_ND |
| 43518 | { 3638, 5, 0, 0, 607, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010823ULL }, // Inst #3638 = RCR16mCL_EVEX |
| 43519 | { 3637, 5, 0, 0, 1026, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a3ULL }, // Inst #3637 = RCR16mCL |
| 43520 | { 3636, 6, 1, 0, 606, 1, 1, 589, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010823ULL }, // Inst #3636 = RCR16m1_ND |
| 43521 | { 3635, 5, 0, 0, 605, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010823ULL }, // Inst #3635 = RCR16m1_EVEX |
| 43522 | { 3634, 5, 0, 0, 1022, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a3ULL }, // Inst #3634 = RCR16m1 |
| 43523 | { 3633, 3, 1, 0, 299, 0, 0, 494, X86ImpOpBase + 0, 0, 0x2988003029ULL }, // Inst #3633 = RCPSSr_Int |
| 43524 | { 3632, 2, 1, 0, 299, 0, 0, 1008, X86ImpOpBase + 0, 0, 0x2988003029ULL }, // Inst #3632 = RCPSSr |
| 43525 | { 3631, 7, 1, 0, 298, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2988003019ULL }, // Inst #3631 = RCPSSm_Int |
| 43526 | { 3630, 6, 1, 0, 297, 0, 0, 1002, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2988003019ULL }, // Inst #3630 = RCPSSm |
| 43527 | { 3629, 2, 1, 0, 296, 0, 0, 557, X86ImpOpBase + 0, 0, 0x2988002029ULL }, // Inst #3629 = RCPPSr |
| 43528 | { 3628, 6, 1, 0, 295, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2988002019ULL }, // Inst #3628 = RCPPSm |
| 43529 | { 3627, 3, 1, 0, 293, 1, 1, 467, X86ImpOpBase + 31, 0, 0x10e060050032ULL }, // Inst #3627 = RCL8ri_ND |
| 43530 | { 3626, 3, 1, 0, 293, 1, 1, 170, X86ImpOpBase + 31, 0, 0xc006060050032ULL }, // Inst #3626 = RCL8ri_EVEX |
| 43531 | { 3625, 3, 1, 0, 754, 1, 1, 170, X86ImpOpBase + 31, 0, 0x6000040032ULL }, // Inst #3625 = RCL8ri |
| 43532 | { 3624, 2, 1, 0, 757, 2, 1, 947, X86ImpOpBase + 438, 0, 0x10e960010032ULL }, // Inst #3624 = RCL8rCL_ND |
| 43533 | { 3623, 2, 1, 0, 757, 2, 1, 1049, X86ImpOpBase + 438, 0, 0xc006960010032ULL }, // Inst #3623 = RCL8rCL_EVEX |
| 43534 | { 3622, 2, 1, 0, 878, 2, 1, 1049, X86ImpOpBase + 438, 0, 0x6900000032ULL }, // Inst #3622 = RCL8rCL |
| 43535 | { 3621, 2, 1, 0, 293, 1, 1, 947, X86ImpOpBase + 31, 0, 0x10e860010032ULL }, // Inst #3621 = RCL8r1_ND |
| 43536 | { 3620, 2, 1, 0, 293, 1, 1, 1049, X86ImpOpBase + 31, 0, 0xc006860010032ULL }, // Inst #3620 = RCL8r1_EVEX |
| 43537 | { 3619, 2, 1, 0, 752, 1, 1, 1049, X86ImpOpBase + 31, 0, 0x6800000032ULL }, // Inst #3619 = RCL8r1 |
| 43538 | { 3618, 7, 1, 0, 606, 1, 1, 447, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e060050022ULL }, // Inst #3618 = RCL8mi_ND |
| 43539 | { 3617, 6, 0, 0, 605, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050022ULL }, // Inst #3617 = RCL8mi_EVEX |
| 43540 | { 3616, 6, 0, 0, 1605, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040022ULL }, // Inst #3616 = RCL8mi |
| 43541 | { 3615, 6, 1, 0, 876, 2, 1, 941, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad), 0x10e960010022ULL }, // Inst #3615 = RCL8mCL_ND |
| 43542 | { 3614, 5, 0, 0, 875, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010022ULL }, // Inst #3614 = RCL8mCL_EVEX |
| 43543 | { 3613, 5, 0, 0, 1607, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000022ULL }, // Inst #3613 = RCL8mCL |
| 43544 | { 3612, 6, 1, 0, 606, 1, 1, 941, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e860010022ULL }, // Inst #3612 = RCL8m1_ND |
| 43545 | { 3611, 5, 0, 0, 605, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010022ULL }, // Inst #3611 = RCL8m1_EVEX |
| 43546 | { 3610, 5, 0, 0, 1604, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000022ULL }, // Inst #3610 = RCL8m1 |
| 43547 | { 3609, 3, 1, 0, 293, 1, 1, 427, X86ImpOpBase + 31, 0, 0x10e0e0070032ULL }, // Inst #3609 = RCL64ri_ND |
| 43548 | { 3608, 3, 1, 0, 293, 1, 1, 164, X86ImpOpBase + 31, 0, 0xc0060e0070032ULL }, // Inst #3608 = RCL64ri_EVEX |
| 43549 | { 3607, 3, 1, 0, 1171, 1, 1, 164, X86ImpOpBase + 31, 0, 0x6080060032ULL }, // Inst #3607 = RCL64ri |
| 43550 | { 3606, 2, 1, 0, 877, 2, 1, 575, X86ImpOpBase + 438, 0, 0x10e9e0030032ULL }, // Inst #3606 = RCL64rCL_ND |
| 43551 | { 3605, 2, 1, 0, 877, 2, 1, 322, X86ImpOpBase + 438, 0, 0xc0069e0030032ULL }, // Inst #3605 = RCL64rCL_EVEX |
| 43552 | { 3604, 2, 1, 0, 1027, 2, 1, 322, X86ImpOpBase + 438, 0, 0x6980020032ULL }, // Inst #3604 = RCL64rCL |
| 43553 | { 3603, 2, 1, 0, 293, 1, 1, 575, X86ImpOpBase + 31, 0, 0x10e8e0030032ULL }, // Inst #3603 = RCL64r1_ND |
| 43554 | { 3602, 2, 1, 0, 293, 1, 1, 322, X86ImpOpBase + 31, 0, 0xc0068e0030032ULL }, // Inst #3602 = RCL64r1_EVEX |
| 43555 | { 3601, 2, 1, 0, 752, 1, 1, 322, X86ImpOpBase + 31, 0, 0x6880020032ULL }, // Inst #3601 = RCL64r1 |
| 43556 | { 3600, 7, 1, 0, 606, 1, 1, 413, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070022ULL }, // Inst #3600 = RCL64mi_ND |
| 43557 | { 3599, 6, 0, 0, 605, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070022ULL }, // Inst #3599 = RCL64mi_EVEX |
| 43558 | { 3598, 6, 0, 0, 1024, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060022ULL }, // Inst #3598 = RCL64mi |
| 43559 | { 3597, 6, 1, 0, 876, 2, 1, 243, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030022ULL }, // Inst #3597 = RCL64mCL_ND |
| 43560 | { 3596, 5, 0, 0, 875, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030022ULL }, // Inst #3596 = RCL64mCL_EVEX |
| 43561 | { 3595, 5, 0, 0, 1028, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020022ULL }, // Inst #3595 = RCL64mCL |
| 43562 | { 3594, 6, 1, 0, 606, 1, 1, 243, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030022ULL }, // Inst #3594 = RCL64m1_ND |
| 43563 | { 3593, 5, 0, 0, 605, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030022ULL }, // Inst #3593 = RCL64m1_EVEX |
| 43564 | { 3592, 5, 0, 0, 1022, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020022ULL }, // Inst #3592 = RCL64m1 |
| 43565 | { 3591, 3, 1, 0, 293, 1, 1, 396, X86ImpOpBase + 31, 0, 0x10e0e0050032ULL }, // Inst #3591 = RCL32ri_ND |
| 43566 | { 3590, 3, 1, 0, 293, 1, 1, 158, X86ImpOpBase + 31, 0, 0xc0060e0050032ULL }, // Inst #3590 = RCL32ri_EVEX |
| 43567 | { 3589, 3, 1, 0, 1171, 1, 1, 158, X86ImpOpBase + 31, 0, 0x6080040132ULL }, // Inst #3589 = RCL32ri |
| 43568 | { 3588, 2, 1, 0, 877, 2, 1, 573, X86ImpOpBase + 438, 0, 0x10e9e0010032ULL }, // Inst #3588 = RCL32rCL_ND |
| 43569 | { 3587, 2, 1, 0, 877, 2, 1, 320, X86ImpOpBase + 438, 0, 0xc0069e0010032ULL }, // Inst #3587 = RCL32rCL_EVEX |
| 43570 | { 3586, 2, 1, 0, 1027, 2, 1, 320, X86ImpOpBase + 438, 0, 0x6980000132ULL }, // Inst #3586 = RCL32rCL |
| 43571 | { 3585, 2, 1, 0, 293, 1, 1, 573, X86ImpOpBase + 31, 0, 0x10e8e0010032ULL }, // Inst #3585 = RCL32r1_ND |
| 43572 | { 3584, 2, 1, 0, 293, 1, 1, 320, X86ImpOpBase + 31, 0, 0xc0068e0010032ULL }, // Inst #3584 = RCL32r1_EVEX |
| 43573 | { 3583, 2, 1, 0, 752, 1, 1, 320, X86ImpOpBase + 31, 0, 0x6880000132ULL }, // Inst #3583 = RCL32r1 |
| 43574 | { 3582, 7, 1, 0, 606, 1, 1, 382, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050022ULL }, // Inst #3582 = RCL32mi_ND |
| 43575 | { 3581, 6, 0, 0, 605, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050022ULL }, // Inst #3581 = RCL32mi_EVEX |
| 43576 | { 3580, 6, 0, 0, 1024, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040122ULL }, // Inst #3580 = RCL32mi |
| 43577 | { 3579, 6, 1, 0, 876, 2, 1, 237, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010022ULL }, // Inst #3579 = RCL32mCL_ND |
| 43578 | { 3578, 5, 0, 0, 875, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010022ULL }, // Inst #3578 = RCL32mCL_EVEX |
| 43579 | { 3577, 5, 0, 0, 1028, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000122ULL }, // Inst #3577 = RCL32mCL |
| 43580 | { 3576, 6, 1, 0, 606, 1, 1, 237, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010022ULL }, // Inst #3576 = RCL32m1_ND |
| 43581 | { 3575, 5, 0, 0, 605, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010022ULL }, // Inst #3575 = RCL32m1_EVEX |
| 43582 | { 3574, 5, 0, 0, 1022, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000122ULL }, // Inst #3574 = RCL32m1 |
| 43583 | { 3573, 3, 1, 0, 293, 1, 1, 362, X86ImpOpBase + 31, 0, 0x10e0e0050832ULL }, // Inst #3573 = RCL16ri_ND |
| 43584 | { 3572, 3, 1, 0, 293, 1, 1, 152, X86ImpOpBase + 31, 0, 0xc0060e0050832ULL }, // Inst #3572 = RCL16ri_EVEX |
| 43585 | { 3571, 3, 1, 0, 1170, 1, 1, 152, X86ImpOpBase + 31, 0, 0x60800400b2ULL }, // Inst #3571 = RCL16ri |
| 43586 | { 3570, 2, 1, 0, 877, 2, 1, 569, X86ImpOpBase + 438, 0, 0x10e9e0010832ULL }, // Inst #3570 = RCL16rCL_ND |
| 43587 | { 3569, 2, 1, 0, 877, 2, 1, 595, X86ImpOpBase + 438, 0, 0xc0069e0010832ULL }, // Inst #3569 = RCL16rCL_EVEX |
| 43588 | { 3568, 2, 1, 0, 1167, 2, 1, 595, X86ImpOpBase + 438, 0, 0x69800000b2ULL }, // Inst #3568 = RCL16rCL |
| 43589 | { 3567, 2, 1, 0, 293, 1, 1, 569, X86ImpOpBase + 31, 0, 0x10e8e0010832ULL }, // Inst #3567 = RCL16r1_ND |
| 43590 | { 3566, 2, 1, 0, 293, 1, 1, 595, X86ImpOpBase + 31, 0, 0xc0068e0010832ULL }, // Inst #3566 = RCL16r1_EVEX |
| 43591 | { 3565, 2, 1, 0, 752, 1, 1, 595, X86ImpOpBase + 31, 0, 0x68800000b2ULL }, // Inst #3565 = RCL16r1 |
| 43592 | { 3564, 7, 1, 0, 606, 1, 1, 342, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050822ULL }, // Inst #3564 = RCL16mi_ND |
| 43593 | { 3563, 6, 0, 0, 605, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050822ULL }, // Inst #3563 = RCL16mi_EVEX |
| 43594 | { 3562, 6, 0, 0, 1024, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a2ULL }, // Inst #3562 = RCL16mi |
| 43595 | { 3561, 6, 1, 0, 876, 2, 1, 589, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010822ULL }, // Inst #3561 = RCL16mCL_ND |
| 43596 | { 3560, 5, 0, 0, 875, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010822ULL }, // Inst #3560 = RCL16mCL_EVEX |
| 43597 | { 3559, 5, 0, 0, 1028, 2, 1, 232, X86ImpOpBase + 438, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a2ULL }, // Inst #3559 = RCL16mCL |
| 43598 | { 3558, 6, 1, 0, 606, 1, 1, 589, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010822ULL }, // Inst #3558 = RCL16m1_ND |
| 43599 | { 3557, 5, 0, 0, 605, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010822ULL }, // Inst #3557 = RCL16m1_EVEX |
| 43600 | { 3556, 5, 0, 0, 1022, 1, 1, 232, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a2ULL }, // Inst #3556 = RCL16m1 |
| 43601 | { 3555, 3, 1, 0, 810, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7798002829ULL }, // Inst #3555 = PXORrr |
| 43602 | { 3554, 7, 1, 0, 252, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7798002819ULL }, // Inst #3554 = PXORrm |
| 43603 | { 3553, 0, 0, 0, 8, 3, 2, 1, X86ImpOpBase + 433, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000387fULL }, // Inst #3553 = PVALIDATE64 |
| 43604 | { 3552, 0, 0, 0, 8, 3, 2, 1, X86ImpOpBase + 428, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000387fULL }, // Inst #3552 = PVALIDATE32 |
| 43605 | { 3551, 0, 0, 0, 641, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb00000101ULL }, // Inst #3551 = PUSHSS32 |
| 43606 | { 3550, 0, 0, 0, 641, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb00000081ULL }, // Inst #3550 = PUSHSS16 |
| 43607 | { 3549, 1, 0, 0, 141, 1, 1, 203, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayStore), 0x4002800020002ULL }, // Inst #3549 = PUSHP64r |
| 43608 | { 3548, 0, 0, 0, 760, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400002101ULL }, // Inst #3548 = PUSHGS64 |
| 43609 | { 3547, 0, 0, 0, 1545, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400002101ULL }, // Inst #3547 = PUSHGS32 |
| 43610 | { 3546, 0, 0, 0, 1545, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400002081ULL }, // Inst #3546 = PUSHGS16 |
| 43611 | { 3545, 0, 0, 0, 750, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000002101ULL }, // Inst #3545 = PUSHFS64 |
| 43612 | { 3544, 0, 0, 0, 1545, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000002101ULL }, // Inst #3544 = PUSHFS32 |
| 43613 | { 3543, 0, 0, 0, 1545, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000002081ULL }, // Inst #3543 = PUSHFS16 |
| 43614 | { 3542, 0, 0, 0, 767, 3, 1, 1, X86ImpOpBase + 424, 0|(1ULL<<MCID::MayStore), 0x4e00000101ULL }, // Inst #3542 = PUSHF64 |
| 43615 | { 3541, 0, 0, 0, 683, 3, 1, 1, X86ImpOpBase + 420, 0|(1ULL<<MCID::MayStore), 0x4e00000101ULL }, // Inst #3541 = PUSHF32 |
| 43616 | { 3540, 0, 0, 0, 917, 3, 1, 1, X86ImpOpBase + 420, 0|(1ULL<<MCID::MayStore), 0x4e00000081ULL }, // Inst #3540 = PUSHF16 |
| 43617 | { 3539, 0, 0, 0, 641, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300000101ULL }, // Inst #3539 = PUSHES32 |
| 43618 | { 3538, 0, 0, 0, 641, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300000081ULL }, // Inst #3538 = PUSHES16 |
| 43619 | { 3537, 0, 0, 0, 641, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf00000101ULL }, // Inst #3537 = PUSHDS32 |
| 43620 | { 3536, 0, 0, 0, 641, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf00000081ULL }, // Inst #3536 = PUSHDS16 |
| 43621 | { 3535, 0, 0, 0, 641, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x700000101ULL }, // Inst #3535 = PUSHCS32 |
| 43622 | { 3534, 0, 0, 0, 641, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x700000081ULL }, // Inst #3534 = PUSHCS16 |
| 43623 | { 3533, 0, 0, 0, 679, 8, 1, 1, X86ImpOpBase + 411, 0|(1ULL<<MCID::MayStore), 0x3000000101ULL }, // Inst #3533 = PUSHA32 |
| 43624 | { 3532, 0, 0, 0, 679, 8, 1, 1, X86ImpOpBase + 411, 0|(1ULL<<MCID::MayStore), 0x3000000081ULL }, // Inst #3532 = PUSHA16 |
| 43625 | { 3531, 1, 0, 0, 1603, 1, 1, 203, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayStore), 0x7f80000136ULL }, // Inst #3531 = PUSH64rmr |
| 43626 | { 3530, 5, 0, 0, 639, 1, 1, 232, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000126ULL }, // Inst #3530 = PUSH64rmm |
| 43627 | { 3529, 1, 0, 0, 1602, 1, 1, 203, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayStore), 0x2800000102ULL }, // Inst #3529 = PUSH64r |
| 43628 | { 3528, 1, 0, 0, 857, 1, 1, 1, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayStore), 0x3500040101ULL }, // Inst #3528 = PUSH64i8 |
| 43629 | { 3527, 1, 0, 0, 620, 1, 1, 1, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayStore), 0x3400200101ULL }, // Inst #3527 = PUSH64i32 |
| 43630 | { 3526, 1, 0, 0, 758, 1, 1, 202, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayStore), 0x7f80000136ULL }, // Inst #3526 = PUSH32rmr |
| 43631 | { 3525, 5, 0, 0, 916, 1, 1, 232, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000126ULL }, // Inst #3525 = PUSH32rmm |
| 43632 | { 3524, 1, 0, 0, 857, 1, 1, 202, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayStore), 0x2800000102ULL }, // Inst #3524 = PUSH32r |
| 43633 | { 3523, 1, 0, 0, 620, 1, 1, 1, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayStore), 0x3500040101ULL }, // Inst #3523 = PUSH32i8 |
| 43634 | { 3522, 1, 0, 0, 620, 1, 1, 1, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayStore), 0x3400180101ULL }, // Inst #3522 = PUSH32i |
| 43635 | { 3521, 2, 0, 0, 141, 1, 1, 575, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayStore), 0x10ffe0030036ULL }, // Inst #3521 = PUSH2P |
| 43636 | { 3520, 2, 0, 0, 141, 1, 1, 575, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayStore), 0x10ffe0010036ULL }, // Inst #3520 = PUSH2 |
| 43637 | { 3519, 1, 0, 0, 758, 1, 1, 599, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayStore), 0x7f800000b6ULL }, // Inst #3519 = PUSH16rmr |
| 43638 | { 3518, 5, 0, 0, 916, 1, 1, 232, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f800000a6ULL }, // Inst #3518 = PUSH16rmm |
| 43639 | { 3517, 1, 0, 0, 857, 1, 1, 599, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayStore), 0x2800000082ULL }, // Inst #3517 = PUSH16r |
| 43640 | { 3516, 1, 0, 0, 620, 1, 1, 1, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayStore), 0x3500040081ULL }, // Inst #3516 = PUSH16i8 |
| 43641 | { 3515, 1, 0, 0, 620, 1, 1, 1, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayStore), 0x3400100081ULL }, // Inst #3515 = PUSH16i |
| 43642 | { 3514, 3, 1, 0, 251, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3098002829ULL }, // Inst #3514 = PUNPCKLWDrr |
| 43643 | { 3513, 7, 1, 0, 250, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3098002819ULL }, // Inst #3513 = PUNPCKLWDrm |
| 43644 | { 3512, 3, 1, 0, 251, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3618002829ULL }, // Inst #3512 = PUNPCKLQDQrr |
| 43645 | { 3511, 7, 1, 0, 250, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3618002819ULL }, // Inst #3511 = PUNPCKLQDQrm |
| 43646 | { 3510, 3, 1, 0, 251, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3118002829ULL }, // Inst #3510 = PUNPCKLDQrr |
| 43647 | { 3509, 7, 1, 0, 250, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3118002819ULL }, // Inst #3509 = PUNPCKLDQrm |
| 43648 | { 3508, 3, 1, 0, 251, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3018002829ULL }, // Inst #3508 = PUNPCKLBWrr |
| 43649 | { 3507, 7, 1, 0, 250, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3018002819ULL }, // Inst #3507 = PUNPCKLBWrm |
| 43650 | { 3506, 3, 1, 0, 251, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3498002829ULL }, // Inst #3506 = PUNPCKHWDrr |
| 43651 | { 3505, 7, 1, 0, 250, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3498002819ULL }, // Inst #3505 = PUNPCKHWDrm |
| 43652 | { 3504, 3, 1, 0, 251, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3698002829ULL }, // Inst #3504 = PUNPCKHQDQrr |
| 43653 | { 3503, 7, 1, 0, 250, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3698002819ULL }, // Inst #3503 = PUNPCKHQDQrm |
| 43654 | { 3502, 3, 1, 0, 251, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3518002829ULL }, // Inst #3502 = PUNPCKHDQrr |
| 43655 | { 3501, 7, 1, 0, 250, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3518002819ULL }, // Inst #3501 = PUNPCKHDQrm |
| 43656 | { 3500, 3, 1, 0, 251, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3418002829ULL }, // Inst #3500 = PUNPCKHBWrr |
| 43657 | { 3499, 7, 1, 0, 250, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3418002819ULL }, // Inst #3499 = PUNPCKHBWrm |
| 43658 | { 3498, 1, 0, 0, 1601, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003034ULL }, // Inst #3498 = PTWRITEr |
| 43659 | { 3497, 5, 0, 0, 1599, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003024ULL }, // Inst #3497 = PTWRITEm |
| 43660 | { 3496, 1, 0, 0, 1600, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023034ULL }, // Inst #3496 = PTWRITE64r |
| 43661 | { 3495, 5, 0, 0, 1599, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023024ULL }, // Inst #3495 = PTWRITE64m |
| 43662 | { 3494, 4, 1, 0, 8, 0, 0, 1448, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3494 = PTTRANSPOSEDV |
| 43663 | { 3493, 2, 0, 0, 8, 0, 0, 21, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3493 = PTTRANSPOSED |
| 43664 | { 3492, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3492 = PTTMMULTF32PSV |
| 43665 | { 3491, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3491 = PTTMMULTF32PS |
| 43666 | { 3490, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3490 = PTTDPFP16PSV |
| 43667 | { 3489, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3489 = PTTDPFP16PS |
| 43668 | { 3488, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3488 = PTTDPBF16PSV |
| 43669 | { 3487, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3487 = PTTDPBF16PS |
| 43670 | { 3486, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3486 = PTTCMMRLFP16PSV |
| 43671 | { 3485, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3485 = PTTCMMRLFP16PS |
| 43672 | { 3484, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3484 = PTTCMMIMFP16PSV |
| 43673 | { 3483, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3483 = PTTCMMIMFP16PS |
| 43674 | { 3482, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3482 = PTMMULTF32PSV |
| 43675 | { 3481, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3481 = PTMMULTF32PS |
| 43676 | { 3480, 1, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3480 = PTILEZERO |
| 43677 | { 3479, 6, 0, 0, 8, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3479 = PTILESTORED |
| 43678 | { 3478, 5, 1, 0, 8, 0, 0, 1463, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3478 = PTILEMOVROWrriV |
| 43679 | { 3477, 3, 1, 0, 8, 0, 0, 1460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3477 = PTILEMOVROWrri |
| 43680 | { 3476, 5, 1, 0, 8, 0, 0, 1455, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3476 = PTILEMOVROWrreV |
| 43681 | { 3475, 3, 1, 0, 8, 0, 0, 1452, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3475 = PTILEMOVROWrre |
| 43682 | { 3474, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3474 = PTILELOADDT1 |
| 43683 | { 3473, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3473 = PTILELOADDRST1 |
| 43684 | { 3472, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3472 = PTILELOADDRS |
| 43685 | { 3471, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3471 = PTILELOADD |
| 43686 | { 3470, 2, 0, 0, 288, 0, 1, 557, X86ImpOpBase + 0, 0, 0xb98004829ULL }, // Inst #3470 = PTESTrr |
| 43687 | { 3469, 6, 0, 0, 287, 0, 1, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb98004819ULL }, // Inst #3469 = PTESTrm |
| 43688 | { 3468, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3468 = PTDPHF8PSV |
| 43689 | { 3467, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3467 = PTDPHF8PS |
| 43690 | { 3466, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3466 = PTDPHBF8PSV |
| 43691 | { 3465, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3465 = PTDPHBF8PS |
| 43692 | { 3464, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3464 = PTDPFP16PS |
| 43693 | { 3463, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3463 = PTDPBUUD |
| 43694 | { 3462, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3462 = PTDPBUSD |
| 43695 | { 3461, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3461 = PTDPBSUD |
| 43696 | { 3460, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3460 = PTDPBSSD |
| 43697 | { 3459, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3459 = PTDPBHF8PSV |
| 43698 | { 3458, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3458 = PTDPBHF8PS |
| 43699 | { 3457, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3457 = PTDPBF8PSV |
| 43700 | { 3456, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3456 = PTDPBF8PS |
| 43701 | { 3455, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3455 = PTDPBF16PS |
| 43702 | { 3454, 5, 1, 0, 8, 0, 0, 1463, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3454 = PTCVTROWPS2PHLrriV |
| 43703 | { 3453, 3, 1, 0, 8, 0, 0, 1460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3453 = PTCVTROWPS2PHLrri |
| 43704 | { 3452, 5, 1, 0, 8, 0, 0, 1455, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3452 = PTCVTROWPS2PHLrreV |
| 43705 | { 3451, 3, 1, 0, 8, 0, 0, 1452, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3451 = PTCVTROWPS2PHLrre |
| 43706 | { 3450, 5, 1, 0, 8, 0, 0, 1463, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3450 = PTCVTROWPS2PHHrriV |
| 43707 | { 3449, 3, 1, 0, 8, 0, 0, 1460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3449 = PTCVTROWPS2PHHrri |
| 43708 | { 3448, 5, 1, 0, 8, 0, 0, 1455, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3448 = PTCVTROWPS2PHHrreV |
| 43709 | { 3447, 3, 1, 0, 8, 0, 0, 1452, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3447 = PTCVTROWPS2PHHrre |
| 43710 | { 3446, 5, 1, 0, 8, 0, 0, 1463, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3446 = PTCVTROWPS2BF16LrriV |
| 43711 | { 3445, 3, 1, 0, 8, 0, 0, 1460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3445 = PTCVTROWPS2BF16Lrri |
| 43712 | { 3444, 5, 1, 0, 8, 0, 0, 1455, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3444 = PTCVTROWPS2BF16LrreV |
| 43713 | { 3443, 3, 1, 0, 8, 0, 0, 1452, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3443 = PTCVTROWPS2BF16Lrre |
| 43714 | { 3442, 5, 1, 0, 8, 0, 0, 1463, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3442 = PTCVTROWPS2BF16HrriV |
| 43715 | { 3441, 3, 1, 0, 8, 0, 0, 1460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3441 = PTCVTROWPS2BF16Hrri |
| 43716 | { 3440, 5, 1, 0, 8, 0, 0, 1455, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3440 = PTCVTROWPS2BF16HrreV |
| 43717 | { 3439, 3, 1, 0, 8, 0, 0, 1452, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3439 = PTCVTROWPS2BF16Hrre |
| 43718 | { 3438, 5, 1, 0, 8, 0, 0, 1463, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3438 = PTCVTROWD2PSrriV |
| 43719 | { 3437, 3, 1, 0, 8, 0, 0, 1460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3437 = PTCVTROWD2PSrri |
| 43720 | { 3436, 5, 1, 0, 8, 0, 0, 1455, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3436 = PTCVTROWD2PSrreV |
| 43721 | { 3435, 3, 1, 0, 8, 0, 0, 1452, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3435 = PTCVTROWD2PSrre |
| 43722 | { 3434, 4, 1, 0, 8, 0, 0, 1448, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3434 = PTCONJTFP16V |
| 43723 | { 3433, 2, 0, 0, 8, 0, 0, 21, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3433 = PTCONJTFP16 |
| 43724 | { 3432, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3432 = PTCONJTCMMIMFP16PSV |
| 43725 | { 3431, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3431 = PTCONJTCMMIMFP16PS |
| 43726 | { 3430, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3430 = PTCMMRLFP16PSV |
| 43727 | { 3429, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3429 = PTCMMRLFP16PS |
| 43728 | { 3428, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3428 = PTCMMIMFP16PSV |
| 43729 | { 3427, 3, 0, 0, 8, 0, 0, 548, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3427 = PTCMMIMFP16PS |
| 43730 | { 3426, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3426 = PT2RPNTLVWZ1T1 |
| 43731 | { 3425, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3425 = PT2RPNTLVWZ1RST1 |
| 43732 | { 3424, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3424 = PT2RPNTLVWZ1RS |
| 43733 | { 3423, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3423 = PT2RPNTLVWZ1 |
| 43734 | { 3422, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3422 = PT2RPNTLVWZ0T1 |
| 43735 | { 3421, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3421 = PT2RPNTLVWZ0RST1 |
| 43736 | { 3420, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3420 = PT2RPNTLVWZ0RS |
| 43737 | { 3419, 6, 0, 0, 8, 0, 0, 187, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3419 = PT2RPNTLVWZ0 |
| 43738 | { 3418, 2, 1, 0, 184, 0, 0, 1276, X86ImpOpBase + 0, 0, 0x5d8000e029ULL }, // Inst #3418 = PSWAPDrr |
| 43739 | { 3417, 6, 1, 0, 202, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5d8000e019ULL }, // Inst #3417 = PSWAPDrm |
| 43740 | { 3416, 3, 1, 0, 811, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7c98002829ULL }, // Inst #3416 = PSUBWrr |
| 43741 | { 3415, 7, 1, 0, 1216, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7c98002819ULL }, // Inst #3415 = PSUBWrm |
| 43742 | { 3414, 3, 1, 0, 1205, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6c98002829ULL }, // Inst #3414 = PSUBUSWrr |
| 43743 | { 3413, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6c98002819ULL }, // Inst #3413 = PSUBUSWrm |
| 43744 | { 3412, 3, 1, 0, 1205, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6c18002829ULL }, // Inst #3412 = PSUBUSBrr |
| 43745 | { 3411, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6c18002819ULL }, // Inst #3411 = PSUBUSBrm |
| 43746 | { 3410, 3, 1, 0, 1205, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7498002829ULL }, // Inst #3410 = PSUBSWrr |
| 43747 | { 3409, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7498002819ULL }, // Inst #3409 = PSUBSWrm |
| 43748 | { 3408, 3, 1, 0, 1205, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7418002829ULL }, // Inst #3408 = PSUBSBrr |
| 43749 | { 3407, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7418002819ULL }, // Inst #3407 = PSUBSBrm |
| 43750 | { 3406, 3, 1, 0, 812, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7d98002829ULL }, // Inst #3406 = PSUBQrr |
| 43751 | { 3405, 7, 1, 0, 659, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7d98002819ULL }, // Inst #3405 = PSUBQrm |
| 43752 | { 3404, 3, 1, 0, 811, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7d18002829ULL }, // Inst #3404 = PSUBDrr |
| 43753 | { 3403, 7, 1, 0, 1216, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7d18002819ULL }, // Inst #3403 = PSUBDrm |
| 43754 | { 3402, 3, 1, 0, 811, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7c18002829ULL }, // Inst #3402 = PSUBBrr |
| 43755 | { 3401, 7, 1, 0, 1216, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7c18002819ULL }, // Inst #3401 = PSUBBrm |
| 43756 | { 3400, 3, 1, 0, 1085, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6898002829ULL }, // Inst #3400 = PSRLWrr |
| 43757 | { 3399, 7, 1, 0, 285, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6898002819ULL }, // Inst #3399 = PSRLWrm |
| 43758 | { 3398, 3, 1, 0, 284, 0, 0, 1445, X86ImpOpBase + 0, 0, 0x3898042832ULL }, // Inst #3398 = PSRLWri |
| 43759 | { 3397, 3, 1, 0, 1085, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6998002829ULL }, // Inst #3397 = PSRLQrr |
| 43760 | { 3396, 7, 1, 0, 285, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6998002819ULL }, // Inst #3396 = PSRLQrm |
| 43761 | { 3395, 3, 1, 0, 284, 0, 0, 1445, X86ImpOpBase + 0, 0, 0x3998042832ULL }, // Inst #3395 = PSRLQri |
| 43762 | { 3394, 3, 1, 0, 1085, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6918002829ULL }, // Inst #3394 = PSRLDrr |
| 43763 | { 3393, 7, 1, 0, 285, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6918002819ULL }, // Inst #3393 = PSRLDrm |
| 43764 | { 3392, 3, 1, 0, 284, 0, 0, 1445, X86ImpOpBase + 0, 0, 0x3918042832ULL }, // Inst #3392 = PSRLDri |
| 43765 | { 3391, 3, 1, 0, 1089, 0, 0, 1445, X86ImpOpBase + 0, 0, 0x3998042833ULL }, // Inst #3391 = PSRLDQri |
| 43766 | { 3390, 3, 1, 0, 1085, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7098002829ULL }, // Inst #3390 = PSRAWrr |
| 43767 | { 3389, 7, 1, 0, 285, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7098002819ULL }, // Inst #3389 = PSRAWrm |
| 43768 | { 3388, 3, 1, 0, 284, 0, 0, 1445, X86ImpOpBase + 0, 0, 0x3898042834ULL }, // Inst #3388 = PSRAWri |
| 43769 | { 3387, 3, 1, 0, 1085, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7118002829ULL }, // Inst #3387 = PSRADrr |
| 43770 | { 3386, 7, 1, 0, 285, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7118002819ULL }, // Inst #3386 = PSRADrm |
| 43771 | { 3385, 3, 1, 0, 284, 0, 0, 1445, X86ImpOpBase + 0, 0, 0x3918042834ULL }, // Inst #3385 = PSRADri |
| 43772 | { 3384, 0, 0, 0, 8, 1, 2, 1, X86ImpOpBase + 408, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000307fULL }, // Inst #3384 = PSMASH |
| 43773 | { 3383, 3, 1, 0, 1085, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7898002829ULL }, // Inst #3383 = PSLLWrr |
| 43774 | { 3382, 7, 1, 0, 285, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7898002819ULL }, // Inst #3382 = PSLLWrm |
| 43775 | { 3381, 3, 1, 0, 284, 0, 0, 1445, X86ImpOpBase + 0, 0, 0x3898042836ULL }, // Inst #3381 = PSLLWri |
| 43776 | { 3380, 3, 1, 0, 1085, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7998002829ULL }, // Inst #3380 = PSLLQrr |
| 43777 | { 3379, 7, 1, 0, 285, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7998002819ULL }, // Inst #3379 = PSLLQrm |
| 43778 | { 3378, 3, 1, 0, 284, 0, 0, 1445, X86ImpOpBase + 0, 0, 0x3998042836ULL }, // Inst #3378 = PSLLQri |
| 43779 | { 3377, 3, 1, 0, 1085, 0, 0, 494, X86ImpOpBase + 0, 0, 0x7918002829ULL }, // Inst #3377 = PSLLDrr |
| 43780 | { 3376, 7, 1, 0, 285, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7918002819ULL }, // Inst #3376 = PSLLDrm |
| 43781 | { 3375, 3, 1, 0, 284, 0, 0, 1445, X86ImpOpBase + 0, 0, 0x3918042836ULL }, // Inst #3375 = PSLLDri |
| 43782 | { 3374, 3, 1, 0, 1089, 0, 0, 1445, X86ImpOpBase + 0, 0, 0x3998042837ULL }, // Inst #3374 = PSLLDQri |
| 43783 | { 3373, 3, 1, 0, 1034, 0, 0, 494, X86ImpOpBase + 0, 0, 0x498004829ULL }, // Inst #3373 = PSIGNWrr |
| 43784 | { 3372, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x498004819ULL }, // Inst #3372 = PSIGNWrm |
| 43785 | { 3371, 3, 1, 0, 1034, 0, 0, 494, X86ImpOpBase + 0, 0, 0x518004829ULL }, // Inst #3371 = PSIGNDrr |
| 43786 | { 3370, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x518004819ULL }, // Inst #3370 = PSIGNDrm |
| 43787 | { 3369, 3, 1, 0, 1034, 0, 0, 494, X86ImpOpBase + 0, 0, 0x418004829ULL }, // Inst #3369 = PSIGNBrr |
| 43788 | { 3368, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x418004819ULL }, // Inst #3368 = PSIGNBrm |
| 43789 | { 3367, 3, 1, 0, 251, 0, 0, 566, X86ImpOpBase + 0, 0, 0x3818043829ULL }, // Inst #3367 = PSHUFLWri |
| 43790 | { 3366, 7, 1, 0, 1671, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3818043819ULL }, // Inst #3366 = PSHUFLWmi |
| 43791 | { 3365, 3, 1, 0, 251, 0, 0, 566, X86ImpOpBase + 0, 0, 0x3818043029ULL }, // Inst #3365 = PSHUFHWri |
| 43792 | { 3364, 7, 1, 0, 1671, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3818043019ULL }, // Inst #3364 = PSHUFHWmi |
| 43793 | { 3363, 3, 1, 0, 251, 0, 0, 566, X86ImpOpBase + 0, 0, 0x3818042829ULL }, // Inst #3363 = PSHUFDri |
| 43794 | { 3362, 7, 1, 0, 1671, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3818042819ULL }, // Inst #3362 = PSHUFDmi |
| 43795 | { 3361, 3, 1, 0, 283, 0, 0, 494, X86ImpOpBase + 0, 0, 0x18004829ULL }, // Inst #3361 = PSHUFBrr |
| 43796 | { 3360, 7, 1, 0, 282, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18004819ULL }, // Inst #3360 = PSHUFBrm |
| 43797 | { 3359, 3, 1, 0, 281, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7b18002829ULL }, // Inst #3359 = PSADBWrr |
| 43798 | { 3358, 7, 1, 0, 280, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7b18002819ULL }, // Inst #3358 = PSADBWrm |
| 43799 | { 3357, 2, 1, 0, 8, 1, 3, 575, X86ImpOpBase + 215, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #3357 = PROBED_ALLOCA_64 |
| 43800 | { 3356, 2, 1, 0, 8, 1, 3, 573, X86ImpOpBase + 211, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #3356 = PROBED_ALLOCA_32 |
| 43801 | { 3355, 5, 0, 0, 72, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680002022ULL }, // Inst #3355 = PREFETCHWT1 |
| 43802 | { 3354, 5, 0, 0, 72, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680002021ULL }, // Inst #3354 = PREFETCHW |
| 43803 | { 3353, 5, 0, 0, 1597, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002023ULL }, // Inst #3353 = PREFETCHT2 |
| 43804 | { 3352, 5, 0, 0, 1597, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002022ULL }, // Inst #3352 = PREFETCHT1 |
| 43805 | { 3351, 5, 0, 0, 1597, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002021ULL }, // Inst #3351 = PREFETCHT0 |
| 43806 | { 3350, 5, 0, 0, 72, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xc00002024ULL }, // Inst #3350 = PREFETCHRST2 |
| 43807 | { 3349, 5, 0, 0, 1598, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002020ULL }, // Inst #3349 = PREFETCHNTA |
| 43808 | { 3348, 5, 0, 0, 1596, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002026ULL }, // Inst #3348 = PREFETCHIT1 |
| 43809 | { 3347, 5, 0, 0, 1596, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002027ULL }, // Inst #3347 = PREFETCHIT0 |
| 43810 | { 3346, 5, 0, 0, 72, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680002020ULL }, // Inst #3346 = PREFETCH |
| 43811 | { 3345, 3, 1, 0, 183, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7598002829ULL }, // Inst #3345 = PORrr |
| 43812 | { 3344, 7, 1, 0, 252, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7598002819ULL }, // Inst #3344 = PORrm |
| 43813 | { 3343, 0, 0, 0, 711, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb80000101ULL }, // Inst #3343 = POPSS32 |
| 43814 | { 3342, 0, 0, 0, 711, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb80000081ULL }, // Inst #3342 = POPSS16 |
| 43815 | { 3341, 1, 1, 0, 72, 1, 1, 203, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayLoad), 0x4002c00020002ULL }, // Inst #3341 = POPP64r |
| 43816 | { 3340, 0, 0, 0, 704, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480002101ULL }, // Inst #3340 = POPGS64 |
| 43817 | { 3339, 0, 0, 0, 704, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480002101ULL }, // Inst #3339 = POPGS32 |
| 43818 | { 3338, 0, 0, 0, 704, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480002081ULL }, // Inst #3338 = POPGS16 |
| 43819 | { 3337, 0, 0, 0, 704, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080002101ULL }, // Inst #3337 = POPFS64 |
| 43820 | { 3336, 0, 0, 0, 704, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080002101ULL }, // Inst #3336 = POPFS32 |
| 43821 | { 3335, 0, 0, 0, 704, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080002081ULL }, // Inst #3335 = POPFS16 |
| 43822 | { 3334, 0, 0, 0, 908, 1, 3, 1, X86ImpOpBase + 37, 0|(1ULL<<MCID::MayLoad), 0x4e80000101ULL }, // Inst #3334 = POPF64 |
| 43823 | { 3333, 0, 0, 0, 703, 1, 3, 1, X86ImpOpBase + 33, 0|(1ULL<<MCID::MayLoad), 0x4e80000101ULL }, // Inst #3333 = POPF32 |
| 43824 | { 3332, 0, 0, 0, 707, 1, 3, 1, X86ImpOpBase + 33, 0|(1ULL<<MCID::MayLoad), 0x4e80000081ULL }, // Inst #3332 = POPF16 |
| 43825 | { 3331, 0, 0, 0, 704, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380000101ULL }, // Inst #3331 = POPES32 |
| 43826 | { 3330, 0, 0, 0, 704, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380000081ULL }, // Inst #3330 = POPES16 |
| 43827 | { 3329, 0, 0, 0, 704, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf80000101ULL }, // Inst #3329 = POPDS32 |
| 43828 | { 3328, 0, 0, 0, 704, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf80000081ULL }, // Inst #3328 = POPDS16 |
| 43829 | { 3327, 2, 1, 0, 279, 0, 0, 575, X86ImpOpBase + 0, 0, 0x10004460030029ULL }, // Inst #3327 = POPCNT64rr_NF |
| 43830 | { 3326, 2, 1, 0, 279, 0, 1, 575, X86ImpOpBase + 0, 0, 0xc004460030029ULL }, // Inst #3326 = POPCNT64rr_EVEX |
| 43831 | { 3325, 2, 1, 0, 279, 0, 1, 575, X86ImpOpBase + 0, 0, 0x5c00023029ULL }, // Inst #3325 = POPCNT64rr |
| 43832 | { 3324, 6, 1, 0, 278, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10004460030019ULL }, // Inst #3324 = POPCNT64rm_NF |
| 43833 | { 3323, 6, 1, 0, 278, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc004460030019ULL }, // Inst #3323 = POPCNT64rm_EVEX |
| 43834 | { 3322, 6, 1, 0, 278, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5c00023019ULL }, // Inst #3322 = POPCNT64rm |
| 43835 | { 3321, 2, 1, 0, 279, 0, 0, 573, X86ImpOpBase + 0, 0, 0x10004460010029ULL }, // Inst #3321 = POPCNT32rr_NF |
| 43836 | { 3320, 2, 1, 0, 279, 0, 1, 573, X86ImpOpBase + 0, 0, 0xc004460010029ULL }, // Inst #3320 = POPCNT32rr_EVEX |
| 43837 | { 3319, 2, 1, 0, 279, 0, 1, 573, X86ImpOpBase + 0, 0, 0x5c00003129ULL }, // Inst #3319 = POPCNT32rr |
| 43838 | { 3318, 6, 1, 0, 278, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10004460010019ULL }, // Inst #3318 = POPCNT32rm_NF |
| 43839 | { 3317, 6, 1, 0, 278, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc004460010019ULL }, // Inst #3317 = POPCNT32rm_EVEX |
| 43840 | { 3316, 6, 1, 0, 278, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5c00003119ULL }, // Inst #3316 = POPCNT32rm |
| 43841 | { 3315, 2, 1, 0, 279, 0, 0, 569, X86ImpOpBase + 0, 0, 0x10004460010829ULL }, // Inst #3315 = POPCNT16rr_NF |
| 43842 | { 3314, 2, 1, 0, 279, 0, 1, 569, X86ImpOpBase + 0, 0, 0xc004460010829ULL }, // Inst #3314 = POPCNT16rr_EVEX |
| 43843 | { 3313, 2, 1, 0, 1019, 0, 1, 569, X86ImpOpBase + 0, 0, 0x5c000030a9ULL }, // Inst #3313 = POPCNT16rr |
| 43844 | { 3312, 6, 1, 0, 278, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10004460010819ULL }, // Inst #3312 = POPCNT16rm_NF |
| 43845 | { 3311, 6, 1, 0, 278, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc004460010819ULL }, // Inst #3311 = POPCNT16rm_EVEX |
| 43846 | { 3310, 6, 1, 0, 278, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5c00003099ULL }, // Inst #3310 = POPCNT16rm |
| 43847 | { 3309, 0, 0, 0, 682, 1, 8, 1, X86ImpOpBase + 399, 0|(1ULL<<MCID::MayLoad), 0x3080000101ULL }, // Inst #3309 = POPA32 |
| 43848 | { 3308, 0, 0, 0, 682, 1, 8, 1, X86ImpOpBase + 399, 0|(1ULL<<MCID::MayLoad), 0x3080000081ULL }, // Inst #3308 = POPA16 |
| 43849 | { 3307, 1, 1, 0, 619, 1, 1, 203, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayLoad), 0x4780000130ULL }, // Inst #3307 = POP64rmr |
| 43850 | { 3306, 5, 0, 0, 652, 1, 1, 232, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4780000120ULL }, // Inst #3306 = POP64rmm |
| 43851 | { 3305, 1, 1, 0, 854, 1, 1, 203, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayLoad), 0x2c00000102ULL }, // Inst #3305 = POP64r |
| 43852 | { 3304, 1, 1, 0, 1445, 1, 1, 202, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayLoad), 0x4780000130ULL }, // Inst #3304 = POP32rmr |
| 43853 | { 3303, 5, 0, 0, 652, 1, 1, 232, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4780000120ULL }, // Inst #3303 = POP32rmm |
| 43854 | { 3302, 1, 1, 0, 1446, 1, 1, 202, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayLoad), 0x2c00000102ULL }, // Inst #3302 = POP32r |
| 43855 | { 3301, 2, 2, 0, 72, 1, 1, 575, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayLoad), 0x10c7e0030030ULL }, // Inst #3301 = POP2P |
| 43856 | { 3300, 2, 2, 0, 72, 1, 1, 575, X86ImpOpBase + 397, 0|(1ULL<<MCID::MayLoad), 0x10c7e0010030ULL }, // Inst #3300 = POP2 |
| 43857 | { 3299, 1, 1, 0, 1445, 1, 1, 599, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayLoad), 0x47800000b0ULL }, // Inst #3299 = POP16rmr |
| 43858 | { 3298, 5, 0, 0, 915, 1, 1, 232, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x47800000a0ULL }, // Inst #3298 = POP16rmm |
| 43859 | { 3297, 1, 1, 0, 638, 1, 1, 599, X86ImpOpBase + 27, 0|(1ULL<<MCID::MayLoad), 0x2c00000082ULL }, // Inst #3297 = POP16r |
| 43860 | { 3296, 3, 1, 0, 1677, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7a18002829ULL }, // Inst #3296 = PMULUDQrr |
| 43861 | { 3295, 7, 1, 0, 1675, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a18002819ULL }, // Inst #3295 = PMULUDQrm |
| 43862 | { 3294, 3, 1, 0, 149, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6a98002829ULL }, // Inst #3294 = PMULLWrr |
| 43863 | { 3293, 7, 1, 0, 148, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6a98002819ULL }, // Inst #3293 = PMULLWrm |
| 43864 | { 3292, 3, 1, 0, 276, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x2018004829ULL }, // Inst #3292 = PMULLDrr |
| 43865 | { 3291, 7, 1, 0, 275, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2018004819ULL }, // Inst #3291 = PMULLDrm |
| 43866 | { 3290, 3, 1, 0, 149, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7298002829ULL }, // Inst #3290 = PMULHWrr |
| 43867 | { 3289, 7, 1, 0, 148, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7298002819ULL }, // Inst #3289 = PMULHWrm |
| 43868 | { 3288, 3, 1, 0, 149, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7218002829ULL }, // Inst #3288 = PMULHUWrr |
| 43869 | { 3287, 7, 1, 0, 148, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7218002819ULL }, // Inst #3287 = PMULHUWrm |
| 43870 | { 3286, 3, 1, 0, 211, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x5b8000e029ULL }, // Inst #3286 = PMULHRWrr |
| 43871 | { 3285, 7, 1, 0, 210, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5b8000e019ULL }, // Inst #3285 = PMULHRWrm |
| 43872 | { 3284, 3, 1, 0, 149, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x598004829ULL }, // Inst #3284 = PMULHRSWrr |
| 43873 | { 3283, 7, 1, 0, 148, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x598004819ULL }, // Inst #3283 = PMULHRSWrm |
| 43874 | { 3282, 3, 1, 0, 149, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1418004829ULL }, // Inst #3282 = PMULDQrr |
| 43875 | { 3281, 7, 1, 0, 148, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1418004819ULL }, // Inst #3281 = PMULDQrm |
| 43876 | { 3280, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1a18004829ULL }, // Inst #3280 = PMOVZXWQrr |
| 43877 | { 3279, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a18004819ULL }, // Inst #3279 = PMOVZXWQrm |
| 43878 | { 3278, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1998004829ULL }, // Inst #3278 = PMOVZXWDrr |
| 43879 | { 3277, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1998004819ULL }, // Inst #3277 = PMOVZXWDrm |
| 43880 | { 3276, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1a98004829ULL }, // Inst #3276 = PMOVZXDQrr |
| 43881 | { 3275, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1a98004819ULL }, // Inst #3275 = PMOVZXDQrm |
| 43882 | { 3274, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1818004829ULL }, // Inst #3274 = PMOVZXBWrr |
| 43883 | { 3273, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1818004819ULL }, // Inst #3273 = PMOVZXBWrm |
| 43884 | { 3272, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1918004829ULL }, // Inst #3272 = PMOVZXBQrr |
| 43885 | { 3271, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1918004819ULL }, // Inst #3271 = PMOVZXBQrm |
| 43886 | { 3270, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1898004829ULL }, // Inst #3270 = PMOVZXBDrr |
| 43887 | { 3269, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1898004819ULL }, // Inst #3269 = PMOVZXBDrm |
| 43888 | { 3268, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1218004829ULL }, // Inst #3268 = PMOVSXWQrr |
| 43889 | { 3267, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1218004819ULL }, // Inst #3267 = PMOVSXWQrm |
| 43890 | { 3266, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1198004829ULL }, // Inst #3266 = PMOVSXWDrr |
| 43891 | { 3265, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1198004819ULL }, // Inst #3265 = PMOVSXWDrm |
| 43892 | { 3264, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1298004829ULL }, // Inst #3264 = PMOVSXDQrr |
| 43893 | { 3263, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1298004819ULL }, // Inst #3263 = PMOVSXDQrm |
| 43894 | { 3262, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1018004829ULL }, // Inst #3262 = PMOVSXBWrr |
| 43895 | { 3261, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1018004819ULL }, // Inst #3261 = PMOVSXBWrm |
| 43896 | { 3260, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1118004829ULL }, // Inst #3260 = PMOVSXBQrr |
| 43897 | { 3259, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1118004819ULL }, // Inst #3259 = PMOVSXBQrm |
| 43898 | { 3258, 2, 1, 0, 1122, 0, 0, 557, X86ImpOpBase + 0, 0, 0x1098004829ULL }, // Inst #3258 = PMOVSXBDrr |
| 43899 | { 3257, 6, 1, 0, 846, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1098004819ULL }, // Inst #3257 = PMOVSXBDrm |
| 43900 | { 3256, 2, 1, 0, 273, 0, 0, 1025, X86ImpOpBase + 0, 0, 0x6b98002829ULL }, // Inst #3256 = PMOVMSKBrr |
| 43901 | { 3255, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1d18004829ULL }, // Inst #3255 = PMINUWrr |
| 43902 | { 3254, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1d18004819ULL }, // Inst #3254 = PMINUWrm |
| 43903 | { 3253, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1d98004829ULL }, // Inst #3253 = PMINUDrr |
| 43904 | { 3252, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1d98004819ULL }, // Inst #3252 = PMINUDrm |
| 43905 | { 3251, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6d18002829ULL }, // Inst #3251 = PMINUBrr |
| 43906 | { 3250, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6d18002819ULL }, // Inst #3250 = PMINUBrm |
| 43907 | { 3249, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7518002829ULL }, // Inst #3249 = PMINSWrr |
| 43908 | { 3248, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7518002819ULL }, // Inst #3248 = PMINSWrm |
| 43909 | { 3247, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1c98004829ULL }, // Inst #3247 = PMINSDrr |
| 43910 | { 3246, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1c98004819ULL }, // Inst #3246 = PMINSDrm |
| 43911 | { 3245, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1c18004829ULL }, // Inst #3245 = PMINSBrr |
| 43912 | { 3244, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1c18004819ULL }, // Inst #3244 = PMINSBrm |
| 43913 | { 3243, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f18004829ULL }, // Inst #3243 = PMAXUWrr |
| 43914 | { 3242, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f18004819ULL }, // Inst #3242 = PMAXUWrm |
| 43915 | { 3241, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1f98004829ULL }, // Inst #3241 = PMAXUDrr |
| 43916 | { 3240, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1f98004819ULL }, // Inst #3240 = PMAXUDrm |
| 43917 | { 3239, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6f18002829ULL }, // Inst #3239 = PMAXUBrr |
| 43918 | { 3238, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6f18002819ULL }, // Inst #3238 = PMAXUBrm |
| 43919 | { 3237, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7718002829ULL }, // Inst #3237 = PMAXSWrr |
| 43920 | { 3236, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7718002819ULL }, // Inst #3236 = PMAXSWrm |
| 43921 | { 3235, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1e98004829ULL }, // Inst #3235 = PMAXSDrr |
| 43922 | { 3234, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e98004819ULL }, // Inst #3234 = PMAXSDrm |
| 43923 | { 3233, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1e18004829ULL }, // Inst #3233 = PMAXSBrr |
| 43924 | { 3232, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1e18004819ULL }, // Inst #3232 = PMAXSBrm |
| 43925 | { 3231, 3, 1, 0, 149, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7a98002829ULL }, // Inst #3231 = PMADDWDrr |
| 43926 | { 3230, 7, 1, 0, 148, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a98002819ULL }, // Inst #3230 = PMADDWDrm |
| 43927 | { 3229, 3, 1, 0, 149, 0, 0, 494, X86ImpOpBase + 0, 0, 0x218004829ULL }, // Inst #3229 = PMADDUBSWrr |
| 43928 | { 3228, 7, 1, 0, 148, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x218004819ULL }, // Inst #3228 = PMADDUBSWrm |
| 43929 | { 3227, 4, 1, 0, 209, 0, 0, 1437, X86ImpOpBase + 0, 0, 0x6218042829ULL }, // Inst #3227 = PINSRWrri |
| 43930 | { 3226, 8, 1, 0, 208, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6218042819ULL }, // Inst #3226 = PINSRWrmi |
| 43931 | { 3225, 4, 1, 0, 209, 0, 0, 1441, X86ImpOpBase + 0, 0, 0x1118066829ULL }, // Inst #3225 = PINSRQrri |
| 43932 | { 3224, 8, 1, 0, 208, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1118066819ULL }, // Inst #3224 = PINSRQrmi |
| 43933 | { 3223, 4, 1, 0, 209, 0, 0, 1437, X86ImpOpBase + 0, 0, 0x1118046829ULL }, // Inst #3223 = PINSRDrri |
| 43934 | { 3222, 8, 1, 0, 208, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1118046819ULL }, // Inst #3222 = PINSRDrmi |
| 43935 | { 3221, 4, 1, 0, 209, 0, 0, 1437, X86ImpOpBase + 0, 0, 0x1018046829ULL }, // Inst #3221 = PINSRBrri |
| 43936 | { 3220, 8, 1, 0, 208, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1018046819ULL }, // Inst #3220 = PINSRBrmi |
| 43937 | { 3219, 2, 1, 0, 93, 0, 0, 1276, X86ImpOpBase + 0, 0, 0x60000e029ULL }, // Inst #3219 = PI2FWrr |
| 43938 | { 3218, 6, 1, 0, 272, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x60000e019ULL }, // Inst #3218 = PI2FWrm |
| 43939 | { 3217, 2, 1, 0, 93, 0, 0, 1276, X86ImpOpBase + 0, 0, 0x68000e029ULL }, // Inst #3217 = PI2FDrr |
| 43940 | { 3216, 6, 1, 0, 272, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x68000e019ULL }, // Inst #3216 = PI2FDrm |
| 43941 | { 3215, 3, 1, 0, 1191, 0, 0, 494, X86ImpOpBase + 0, 0, 0x298004829ULL }, // Inst #3215 = PHSUBWrr |
| 43942 | { 3214, 7, 1, 0, 1192, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x298004819ULL }, // Inst #3214 = PHSUBWrm |
| 43943 | { 3213, 3, 1, 0, 1213, 0, 0, 494, X86ImpOpBase + 0, 0, 0x398004829ULL }, // Inst #3213 = PHSUBSWrr |
| 43944 | { 3212, 7, 1, 0, 1221, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x398004819ULL }, // Inst #3212 = PHSUBSWrm |
| 43945 | { 3211, 3, 1, 0, 654, 0, 0, 494, X86ImpOpBase + 0, 0, 0x318004829ULL }, // Inst #3211 = PHSUBDrr |
| 43946 | { 3210, 7, 1, 0, 663, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x318004819ULL }, // Inst #3210 = PHSUBDrm |
| 43947 | { 3209, 2, 1, 0, 271, 0, 0, 557, X86ImpOpBase + 0, 0, 0x2098004829ULL }, // Inst #3209 = PHMINPOSUWrr |
| 43948 | { 3208, 6, 1, 0, 270, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2098004819ULL }, // Inst #3208 = PHMINPOSUWrm |
| 43949 | { 3207, 3, 1, 0, 1191, 0, 0, 494, X86ImpOpBase + 0, 0, 0x98004829ULL }, // Inst #3207 = PHADDWrr |
| 43950 | { 3206, 7, 1, 0, 1192, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98004819ULL }, // Inst #3206 = PHADDWrm |
| 43951 | { 3205, 3, 1, 0, 1213, 0, 0, 494, X86ImpOpBase + 0, 0, 0x198004829ULL }, // Inst #3205 = PHADDSWrr |
| 43952 | { 3204, 7, 1, 0, 1221, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x198004819ULL }, // Inst #3204 = PHADDSWrm |
| 43953 | { 3203, 3, 1, 0, 654, 0, 0, 494, X86ImpOpBase + 0, 0, 0x118004829ULL }, // Inst #3203 = PHADDDrr |
| 43954 | { 3202, 7, 1, 0, 663, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x118004819ULL }, // Inst #3202 = PHADDDrm |
| 43955 | { 3201, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x4d0000e029ULL }, // Inst #3201 = PFSUBrr |
| 43956 | { 3200, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4d0000e019ULL }, // Inst #3200 = PFSUBrm |
| 43957 | { 3199, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x550000e029ULL }, // Inst #3199 = PFSUBRrr |
| 43958 | { 3198, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x550000e019ULL }, // Inst #3198 = PFSUBRrm |
| 43959 | { 3197, 2, 1, 0, 35, 0, 0, 1276, X86ImpOpBase + 0, 0, 0x4b8000e029ULL }, // Inst #3197 = PFRSQRTrr |
| 43960 | { 3196, 6, 1, 0, 34, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4b8000e019ULL }, // Inst #3196 = PFRSQRTrm |
| 43961 | { 3195, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x538000e029ULL }, // Inst #3195 = PFRSQIT1rr |
| 43962 | { 3194, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x538000e019ULL }, // Inst #3194 = PFRSQIT1rm |
| 43963 | { 3193, 2, 1, 0, 35, 0, 0, 1276, X86ImpOpBase + 0, 0, 0x4b0000e029ULL }, // Inst #3193 = PFRCPrr |
| 43964 | { 3192, 6, 1, 0, 34, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4b0000e019ULL }, // Inst #3192 = PFRCPrm |
| 43965 | { 3191, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x5b0000e029ULL }, // Inst #3191 = PFRCPIT2rr |
| 43966 | { 3190, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5b0000e019ULL }, // Inst #3190 = PFRCPIT2rm |
| 43967 | { 3189, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x530000e029ULL }, // Inst #3189 = PFRCPIT1rr |
| 43968 | { 3188, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x530000e019ULL }, // Inst #3188 = PFRCPIT1rm |
| 43969 | { 3187, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x470000e029ULL }, // Inst #3187 = PFPNACCrr |
| 43970 | { 3186, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x470000e019ULL }, // Inst #3186 = PFPNACCrm |
| 43971 | { 3185, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x450000e029ULL }, // Inst #3185 = PFNACCrr |
| 43972 | { 3184, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x450000e019ULL }, // Inst #3184 = PFNACCrm |
| 43973 | { 3183, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x5a0000e029ULL }, // Inst #3183 = PFMULrr |
| 43974 | { 3182, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5a0000e019ULL }, // Inst #3182 = PFMULrm |
| 43975 | { 3181, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x4a0000e029ULL }, // Inst #3181 = PFMINrr |
| 43976 | { 3180, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4a0000e019ULL }, // Inst #3180 = PFMINrm |
| 43977 | { 3179, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x520000e029ULL }, // Inst #3179 = PFMAXrr |
| 43978 | { 3178, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x520000e019ULL }, // Inst #3178 = PFMAXrm |
| 43979 | { 3177, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x500000e029ULL }, // Inst #3177 = PFCMPGTrr |
| 43980 | { 3176, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x500000e019ULL }, // Inst #3176 = PFCMPGTrm |
| 43981 | { 3175, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x480000e029ULL }, // Inst #3175 = PFCMPGErr |
| 43982 | { 3174, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x480000e019ULL }, // Inst #3174 = PFCMPGErm |
| 43983 | { 3173, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x580000e029ULL }, // Inst #3173 = PFCMPEQrr |
| 43984 | { 3172, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x580000e019ULL }, // Inst #3172 = PFCMPEQrm |
| 43985 | { 3171, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x4f0000e029ULL }, // Inst #3171 = PFADDrr |
| 43986 | { 3170, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4f0000e019ULL }, // Inst #3170 = PFADDrm |
| 43987 | { 3169, 3, 1, 0, 35, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x570000e029ULL }, // Inst #3169 = PFACCrr |
| 43988 | { 3168, 7, 1, 0, 34, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x570000e019ULL }, // Inst #3168 = PFACCrm |
| 43989 | { 3167, 2, 1, 0, 99, 0, 0, 1276, X86ImpOpBase + 0, 0, 0xe0000e029ULL }, // Inst #3167 = PF2IWrr |
| 43990 | { 3166, 6, 1, 0, 267, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe0000e019ULL }, // Inst #3166 = PF2IWrm |
| 43991 | { 3165, 2, 1, 0, 99, 0, 0, 1276, X86ImpOpBase + 0, 0, 0xe8000e029ULL }, // Inst #3165 = PF2IDrr |
| 43992 | { 3164, 6, 1, 0, 267, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe8000e019ULL }, // Inst #3164 = PF2IDrm |
| 43993 | { 3163, 3, 1, 0, 664, 0, 0, 1059, X86ImpOpBase + 0, 0, 0xa98046828ULL }, // Inst #3163 = PEXTRWrri_REV |
| 43994 | { 3162, 3, 1, 0, 664, 0, 0, 1059, X86ImpOpBase + 0, 0, 0x6298042829ULL }, // Inst #3162 = PEXTRWrri |
| 43995 | { 3161, 7, 0, 0, 142, 0, 0, 1052, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa98046818ULL }, // Inst #3161 = PEXTRWmri |
| 43996 | { 3160, 3, 1, 0, 143, 0, 0, 1434, X86ImpOpBase + 0, 0, 0xb18066828ULL }, // Inst #3160 = PEXTRQrri |
| 43997 | { 3159, 7, 0, 0, 766, 0, 0, 1052, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xb18066818ULL }, // Inst #3159 = PEXTRQmri |
| 43998 | { 3158, 3, 1, 0, 143, 0, 0, 1059, X86ImpOpBase + 0, 0, 0xb18046828ULL }, // Inst #3158 = PEXTRDrri |
| 43999 | { 3157, 7, 0, 0, 766, 0, 0, 1052, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xb18046818ULL }, // Inst #3157 = PEXTRDmri |
| 44000 | { 3156, 3, 1, 0, 143, 0, 0, 1059, X86ImpOpBase + 0, 0, 0xa18046828ULL }, // Inst #3156 = PEXTRBrri |
| 44001 | { 3155, 7, 0, 0, 142, 0, 0, 1052, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xa18046818ULL }, // Inst #3155 = PEXTRBmri |
| 44002 | { 3154, 3, 1, 0, 862, 0, 0, 444, X86ImpOpBase + 0, 0, 0xfae0025029ULL }, // Inst #3154 = PEXT64rr_EVEX |
| 44003 | { 3153, 3, 1, 0, 1011, 0, 0, 444, X86ImpOpBase + 0, 0, 0xfaa0025029ULL }, // Inst #3153 = PEXT64rr |
| 44004 | { 3152, 7, 1, 0, 845, 0, 0, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfae0025019ULL }, // Inst #3152 = PEXT64rm_EVEX |
| 44005 | { 3151, 7, 1, 0, 1595, 0, 0, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfaa0025019ULL }, // Inst #3151 = PEXT64rm |
| 44006 | { 3150, 3, 1, 0, 862, 0, 0, 226, X86ImpOpBase + 0, 0, 0xfae0005029ULL }, // Inst #3150 = PEXT32rr_EVEX |
| 44007 | { 3149, 3, 1, 0, 1011, 0, 0, 226, X86ImpOpBase + 0, 0, 0xfaa0005029ULL }, // Inst #3149 = PEXT32rr |
| 44008 | { 3148, 7, 1, 0, 845, 0, 0, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfae0005019ULL }, // Inst #3148 = PEXT32rm_EVEX |
| 44009 | { 3147, 7, 1, 0, 1595, 0, 0, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfaa0005019ULL }, // Inst #3147 = PEXT32rm |
| 44010 | { 3146, 3, 1, 0, 862, 0, 0, 444, X86ImpOpBase + 0, 0, 0xfae0025829ULL }, // Inst #3146 = PDEP64rr_EVEX |
| 44011 | { 3145, 3, 1, 0, 1011, 0, 0, 444, X86ImpOpBase + 0, 0, 0xfaa0025829ULL }, // Inst #3145 = PDEP64rr |
| 44012 | { 3144, 7, 1, 0, 845, 0, 0, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfae0025819ULL }, // Inst #3144 = PDEP64rm_EVEX |
| 44013 | { 3143, 7, 1, 0, 1595, 0, 0, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfaa0025819ULL }, // Inst #3143 = PDEP64rm |
| 44014 | { 3142, 3, 1, 0, 862, 0, 0, 226, X86ImpOpBase + 0, 0, 0xfae0005829ULL }, // Inst #3142 = PDEP32rr_EVEX |
| 44015 | { 3141, 3, 1, 0, 1011, 0, 0, 226, X86ImpOpBase + 0, 0, 0xfaa0005829ULL }, // Inst #3141 = PDEP32rr |
| 44016 | { 3140, 7, 1, 0, 845, 0, 0, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfae0005819ULL }, // Inst #3140 = PDEP32rm_EVEX |
| 44017 | { 3139, 7, 1, 0, 1595, 0, 0, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xfaa0005819ULL }, // Inst #3139 = PDEP32rm |
| 44018 | { 3138, 0, 0, 0, 8, 4, 5, 1, X86ImpOpBase + 388, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002045ULL }, // Inst #3138 = PCONFIG |
| 44019 | { 3137, 3, 0, 0, 266, 0, 2, 566, X86ImpOpBase + 386, 0, 0x3118046829ULL }, // Inst #3137 = PCMPISTRMrri |
| 44020 | { 3136, 7, 0, 0, 265, 0, 2, 559, X86ImpOpBase + 386, 0|(1ULL<<MCID::MayLoad), 0x3118046819ULL }, // Inst #3136 = PCMPISTRMrmi |
| 44021 | { 3135, 3, 0, 0, 264, 0, 2, 566, X86ImpOpBase + 384, 0, 0x3198046829ULL }, // Inst #3135 = PCMPISTRIrri |
| 44022 | { 3134, 7, 0, 0, 263, 0, 2, 559, X86ImpOpBase + 384, 0|(1ULL<<MCID::MayLoad), 0x3198046819ULL }, // Inst #3134 = PCMPISTRIrmi |
| 44023 | { 3133, 3, 1, 0, 1224, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3298002829ULL }, // Inst #3133 = PCMPGTWrr |
| 44024 | { 3132, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3298002819ULL }, // Inst #3132 = PCMPGTWrm |
| 44025 | { 3131, 3, 1, 0, 911, 0, 0, 494, X86ImpOpBase + 0, 0, 0x1b98004829ULL }, // Inst #3131 = PCMPGTQrr |
| 44026 | { 3130, 7, 1, 0, 913, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1b98004819ULL }, // Inst #3130 = PCMPGTQrm |
| 44027 | { 3129, 3, 1, 0, 1224, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3318002829ULL }, // Inst #3129 = PCMPGTDrr |
| 44028 | { 3128, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3318002819ULL }, // Inst #3128 = PCMPGTDrm |
| 44029 | { 3127, 3, 1, 0, 1224, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3218002829ULL }, // Inst #3127 = PCMPGTBrr |
| 44030 | { 3126, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3218002819ULL }, // Inst #3126 = PCMPGTBrm |
| 44031 | { 3125, 3, 0, 0, 262, 2, 2, 566, X86ImpOpBase + 380, 0, 0x3018046829ULL }, // Inst #3125 = PCMPESTRMrri |
| 44032 | { 3124, 7, 0, 0, 261, 2, 2, 559, X86ImpOpBase + 380, 0|(1ULL<<MCID::MayLoad), 0x3018046819ULL }, // Inst #3124 = PCMPESTRMrmi |
| 44033 | { 3123, 3, 0, 0, 260, 2, 2, 566, X86ImpOpBase + 376, 0, 0x3098046829ULL }, // Inst #3123 = PCMPESTRIrri |
| 44034 | { 3122, 7, 0, 0, 259, 2, 2, 559, X86ImpOpBase + 376, 0|(1ULL<<MCID::MayLoad), 0x3098046819ULL }, // Inst #3122 = PCMPESTRIrmi |
| 44035 | { 3121, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x3a98002829ULL }, // Inst #3121 = PCMPEQWrr |
| 44036 | { 3120, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3a98002819ULL }, // Inst #3120 = PCMPEQWrm |
| 44037 | { 3119, 3, 1, 0, 910, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1498004829ULL }, // Inst #3119 = PCMPEQQrr |
| 44038 | { 3118, 7, 1, 0, 912, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1498004819ULL }, // Inst #3118 = PCMPEQQrm |
| 44039 | { 3117, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x3b18002829ULL }, // Inst #3117 = PCMPEQDrr |
| 44040 | { 3116, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3b18002819ULL }, // Inst #3116 = PCMPEQDrm |
| 44041 | { 3115, 3, 1, 0, 144, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x3a18002829ULL }, // Inst #3115 = PCMPEQBrr |
| 44042 | { 3114, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3a18002819ULL }, // Inst #3114 = PCMPEQBrm |
| 44043 | { 3113, 4, 1, 0, 258, 0, 0, 585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x2218046829ULL }, // Inst #3113 = PCLMULQDQrri |
| 44044 | { 3112, 8, 1, 0, 257, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2218046819ULL }, // Inst #3112 = PCLMULQDQrmi |
| 44045 | { 3111, 0, 0, 0, 8, 2, 2, 1, X86ImpOpBase + 372, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002047ULL }, // Inst #3111 = PBNDKB |
| 44046 | { 3110, 4, 1, 0, 256, 0, 0, 585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x718046829ULL }, // Inst #3110 = PBLENDWrri |
| 44047 | { 3109, 8, 1, 0, 255, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x718046819ULL }, // Inst #3109 = PBLENDWrmi |
| 44048 | { 3108, 3, 1, 0, 254, 1, 0, 494, X86ImpOpBase + 111, 0, 0x818004829ULL }, // Inst #3108 = PBLENDVBrr0 |
| 44049 | { 3107, 7, 1, 0, 253, 1, 0, 487, X86ImpOpBase + 111, 0|(1ULL<<MCID::MayLoad), 0x818004819ULL }, // Inst #3107 = PBLENDVBrm0 |
| 44050 | { 3106, 3, 1, 0, 1034, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7198002829ULL }, // Inst #3106 = PAVGWrr |
| 44051 | { 3105, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7198002819ULL }, // Inst #3105 = PAVGWrm |
| 44052 | { 3104, 3, 1, 0, 3, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x5f8000e029ULL }, // Inst #3104 = PAVGUSBrr |
| 44053 | { 3103, 7, 1, 0, 203, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5f8000e019ULL }, // Inst #3103 = PAVGUSBrm |
| 44054 | { 3102, 3, 1, 0, 1034, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7018002829ULL }, // Inst #3102 = PAVGBrr |
| 44055 | { 3101, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7018002819ULL }, // Inst #3101 = PAVGBrm |
| 44056 | { 3100, 0, 0, 0, 693, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4800001001ULL }, // Inst #3100 = PAUSE |
| 44057 | { 3099, 3, 1, 0, 183, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6d98002829ULL }, // Inst #3099 = PANDrr |
| 44058 | { 3098, 7, 1, 0, 252, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6d98002819ULL }, // Inst #3098 = PANDrm |
| 44059 | { 3097, 3, 1, 0, 1196, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6f98002829ULL }, // Inst #3097 = PANDNrr |
| 44060 | { 3096, 7, 1, 0, 252, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6f98002819ULL }, // Inst #3096 = PANDNrm |
| 44061 | { 3095, 4, 1, 0, 1594, 0, 0, 585, X86ImpOpBase + 0, 0, 0x798046829ULL }, // Inst #3095 = PALIGNRrri |
| 44062 | { 3094, 8, 1, 0, 1593, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x798046819ULL }, // Inst #3094 = PALIGNRrmi |
| 44063 | { 3093, 3, 1, 0, 1209, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7e98002829ULL }, // Inst #3093 = PADDWrr |
| 44064 | { 3092, 7, 1, 0, 1216, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e98002819ULL }, // Inst #3092 = PADDWrm |
| 44065 | { 3091, 3, 1, 0, 1034, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6e98002829ULL }, // Inst #3091 = PADDUSWrr |
| 44066 | { 3090, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6e98002819ULL }, // Inst #3090 = PADDUSWrm |
| 44067 | { 3089, 3, 1, 0, 1034, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6e18002829ULL }, // Inst #3089 = PADDUSBrr |
| 44068 | { 3088, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6e18002819ULL }, // Inst #3088 = PADDUSBrm |
| 44069 | { 3087, 3, 1, 0, 1034, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7698002829ULL }, // Inst #3087 = PADDSWrr |
| 44070 | { 3086, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7698002819ULL }, // Inst #3086 = PADDSWrm |
| 44071 | { 3085, 3, 1, 0, 1034, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7618002829ULL }, // Inst #3085 = PADDSBrr |
| 44072 | { 3084, 7, 1, 0, 150, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7618002819ULL }, // Inst #3084 = PADDSBrm |
| 44073 | { 3083, 3, 1, 0, 648, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6a18002829ULL }, // Inst #3083 = PADDQrr |
| 44074 | { 3082, 7, 1, 0, 659, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6a18002819ULL }, // Inst #3082 = PADDQrm |
| 44075 | { 3081, 3, 1, 0, 1209, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7f18002829ULL }, // Inst #3081 = PADDDrr |
| 44076 | { 3080, 7, 1, 0, 1216, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7f18002819ULL }, // Inst #3080 = PADDDrm |
| 44077 | { 3079, 3, 1, 0, 1209, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7e18002829ULL }, // Inst #3079 = PADDBrr |
| 44078 | { 3078, 7, 1, 0, 1216, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e18002819ULL }, // Inst #3078 = PADDBrm |
| 44079 | { 3077, 3, 1, 0, 1592, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3398002829ULL }, // Inst #3077 = PACKUSWBrr |
| 44080 | { 3076, 7, 1, 0, 1591, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3398002819ULL }, // Inst #3076 = PACKUSWBrm |
| 44081 | { 3075, 3, 1, 0, 1592, 0, 0, 494, X86ImpOpBase + 0, 0, 0x1598004829ULL }, // Inst #3075 = PACKUSDWrr |
| 44082 | { 3074, 7, 1, 0, 1591, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1598004819ULL }, // Inst #3074 = PACKUSDWrm |
| 44083 | { 3073, 3, 1, 0, 1592, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3198002829ULL }, // Inst #3073 = PACKSSWBrr |
| 44084 | { 3072, 7, 1, 0, 1591, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3198002819ULL }, // Inst #3072 = PACKSSWBrm |
| 44085 | { 3071, 3, 1, 0, 1592, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3598002829ULL }, // Inst #3071 = PACKSSDWrr |
| 44086 | { 3070, 7, 1, 0, 1591, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3598002819ULL }, // Inst #3070 = PACKSSDWrm |
| 44087 | { 3069, 2, 1, 0, 1034, 0, 0, 557, X86ImpOpBase + 0, 0, 0xe98004829ULL }, // Inst #3069 = PABSWrr |
| 44088 | { 3068, 6, 1, 0, 249, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe98004819ULL }, // Inst #3068 = PABSWrm |
| 44089 | { 3067, 2, 1, 0, 1034, 0, 0, 557, X86ImpOpBase + 0, 0, 0xf18004829ULL }, // Inst #3067 = PABSDrr |
| 44090 | { 3066, 6, 1, 0, 249, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf18004819ULL }, // Inst #3066 = PABSDrm |
| 44091 | { 3065, 2, 1, 0, 1034, 0, 0, 557, X86ImpOpBase + 0, 0, 0xe18004829ULL }, // Inst #3065 = PABSBrr |
| 44092 | { 3064, 6, 1, 0, 249, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe18004819ULL }, // Inst #3064 = PABSBrm |
| 44093 | { 3063, 2, 0, 0, 719, 3, 1, 1246, X86ImpOpBase + 368, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000084ULL }, // Inst #3063 = OUTSW |
| 44094 | { 3062, 2, 0, 0, 1590, 3, 1, 1246, X86ImpOpBase + 368, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000104ULL }, // Inst #3062 = OUTSL |
| 44095 | { 3061, 2, 0, 0, 1589, 3, 1, 1246, X86ImpOpBase + 368, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3700000004ULL }, // Inst #3061 = OUTSB |
| 44096 | { 3060, 0, 0, 0, 715, 2, 0, 1, X86ImpOpBase + 282, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7700000001ULL }, // Inst #3060 = OUT8rr |
| 44097 | { 3059, 1, 0, 0, 718, 1, 0, 1, X86ImpOpBase + 281, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7300040001ULL }, // Inst #3059 = OUT8ir |
| 44098 | { 3058, 0, 0, 0, 1588, 2, 0, 1, X86ImpOpBase + 279, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7780000101ULL }, // Inst #3058 = OUT32rr |
| 44099 | { 3057, 1, 0, 0, 1587, 1, 0, 1, X86ImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7380040101ULL }, // Inst #3057 = OUT32ir |
| 44100 | { 3056, 0, 0, 0, 1586, 2, 0, 1, X86ImpOpBase + 277, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7780000081ULL }, // Inst #3056 = OUT16rr |
| 44101 | { 3055, 1, 0, 0, 1585, 1, 0, 1, X86ImpOpBase + 276, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7380040081ULL }, // Inst #3055 = OUT16ir |
| 44102 | { 3054, 3, 1, 0, 44, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x2b08002029ULL }, // Inst #3054 = ORPSrr |
| 44103 | { 3053, 7, 1, 0, 43, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2b08002019ULL }, // Inst #3053 = ORPSrm |
| 44104 | { 3052, 3, 1, 0, 44, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x2b10002829ULL }, // Inst #3052 = ORPDrr |
| 44105 | { 3051, 7, 1, 0, 43, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2b10002819ULL }, // Inst #3051 = ORPDrm |
| 44106 | { 3050, 3, 1, 0, 1462, 0, 1, 173, X86ImpOpBase + 0, 0, 0x500000029ULL }, // Inst #3050 = OR8rr_REV |
| 44107 | { 3049, 3, 1, 0, 1, 0, 0, 173, X86ImpOpBase + 0, 0, 0x10000560010029ULL }, // Inst #3049 = OR8rr_NF_REV |
| 44108 | { 3048, 3, 1, 0, 1, 0, 0, 484, X86ImpOpBase + 0, 0, 0x10108560010029ULL }, // Inst #3048 = OR8rr_NF_ND_REV |
| 44109 | { 3047, 3, 1, 0, 1, 0, 0, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10108460010028ULL }, // Inst #3047 = OR8rr_NF_ND |
| 44110 | { 3046, 3, 1, 0, 1, 0, 0, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10000460010028ULL }, // Inst #3046 = OR8rr_NF |
| 44111 | { 3045, 3, 1, 0, 1, 0, 1, 484, X86ImpOpBase + 0, 0, 0x108560010029ULL }, // Inst #3045 = OR8rr_ND_REV |
| 44112 | { 3044, 3, 1, 0, 1, 0, 1, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x108460010028ULL }, // Inst #3044 = OR8rr_ND |
| 44113 | { 3043, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0, 0xc000560010029ULL }, // Inst #3043 = OR8rr_EVEX_REV |
| 44114 | { 3042, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc000460010028ULL }, // Inst #3042 = OR8rr_EVEX |
| 44115 | { 3041, 3, 1, 0, 1462, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x400000028ULL }, // Inst #3041 = OR8rr |
| 44116 | { 3040, 7, 1, 0, 25, 0, 0, 477, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10108560010019ULL }, // Inst #3040 = OR8rm_NF_ND |
| 44117 | { 3039, 7, 1, 0, 25, 0, 0, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10000560010019ULL }, // Inst #3039 = OR8rm_NF |
| 44118 | { 3038, 7, 1, 0, 25, 0, 1, 477, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108560010019ULL }, // Inst #3038 = OR8rm_ND |
| 44119 | { 3037, 7, 1, 0, 25, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc000560010019ULL }, // Inst #3037 = OR8rm_EVEX |
| 44120 | { 3036, 7, 1, 0, 1450, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x500000019ULL }, // Inst #3036 = OR8rm |
| 44121 | { 3035, 3, 1, 0, 1, 0, 0, 467, X86ImpOpBase + 0, 0, 0x1010c060050031ULL }, // Inst #3035 = OR8ri_NF_ND |
| 44122 | { 3034, 3, 1, 0, 1, 0, 0, 170, X86ImpOpBase + 0, 0, 0x10004060050031ULL }, // Inst #3034 = OR8ri_NF |
| 44123 | { 3033, 3, 1, 0, 1, 0, 1, 467, X86ImpOpBase + 0, 0, 0x10c060050031ULL }, // Inst #3033 = OR8ri_ND |
| 44124 | { 3032, 3, 1, 0, 1, 0, 1, 170, X86ImpOpBase + 0, 0, 0xc004060050031ULL }, // Inst #3032 = OR8ri_EVEX |
| 44125 | { 3031, 3, 1, 0, 1462, 0, 1, 170, X86ImpOpBase + 0, 0, 0x4100040031ULL }, // Inst #3031 = OR8ri8 |
| 44126 | { 3030, 3, 1, 0, 1462, 0, 1, 170, X86ImpOpBase + 0, 0, 0x4000040031ULL }, // Inst #3030 = OR8ri |
| 44127 | { 3029, 7, 1, 0, 932, 0, 0, 460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10108460010018ULL }, // Inst #3029 = OR8mr_NF_ND |
| 44128 | { 3028, 6, 0, 0, 934, 0, 0, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10000460010018ULL }, // Inst #3028 = OR8mr_NF |
| 44129 | { 3027, 7, 1, 0, 932, 0, 1, 460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108460010018ULL }, // Inst #3027 = OR8mr_ND |
| 44130 | { 3026, 6, 0, 0, 933, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000460010018ULL }, // Inst #3026 = OR8mr_EVEX |
| 44131 | { 3025, 6, 0, 0, 1459, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400000018ULL }, // Inst #3025 = OR8mr |
| 44132 | { 3024, 7, 1, 0, 932, 0, 0, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c060050021ULL }, // Inst #3024 = OR8mi_NF_ND |
| 44133 | { 3023, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10004060050021ULL }, // Inst #3023 = OR8mi_NF |
| 44134 | { 3022, 7, 1, 0, 932, 0, 1, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c060050021ULL }, // Inst #3022 = OR8mi_ND |
| 44135 | { 3021, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050021ULL }, // Inst #3021 = OR8mi_EVEX |
| 44136 | { 3020, 6, 0, 0, 1456, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040021ULL }, // Inst #3020 = OR8mi8 |
| 44137 | { 3019, 6, 0, 0, 1456, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040021ULL }, // Inst #3019 = OR8mi |
| 44138 | { 3018, 1, 0, 0, 1463, 1, 2, 1, X86ImpOpBase + 75, 0, 0x600040001ULL }, // Inst #3018 = OR8i8 |
| 44139 | { 3017, 3, 1, 0, 1462, 0, 1, 167, X86ImpOpBase + 0, 0, 0x580020029ULL }, // Inst #3017 = OR64rr_REV |
| 44140 | { 3016, 3, 1, 0, 1, 0, 0, 167, X86ImpOpBase + 0, 0, 0x100005e0030029ULL }, // Inst #3016 = OR64rr_NF_REV |
| 44141 | { 3015, 3, 1, 0, 1, 0, 0, 444, X86ImpOpBase + 0, 0, 0x101085e0030029ULL }, // Inst #3015 = OR64rr_NF_ND_REV |
| 44142 | { 3014, 3, 1, 0, 1, 0, 0, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x101084e0030028ULL }, // Inst #3014 = OR64rr_NF_ND |
| 44143 | { 3013, 3, 1, 0, 1, 0, 0, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100004e0030028ULL }, // Inst #3013 = OR64rr_NF |
| 44144 | { 3012, 3, 1, 0, 1, 0, 1, 444, X86ImpOpBase + 0, 0, 0x1085e0030029ULL }, // Inst #3012 = OR64rr_ND_REV |
| 44145 | { 3011, 3, 1, 0, 1, 0, 1, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1084e0030028ULL }, // Inst #3011 = OR64rr_ND |
| 44146 | { 3010, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0, 0xc0005e0030029ULL }, // Inst #3010 = OR64rr_EVEX_REV |
| 44147 | { 3009, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0004e0030028ULL }, // Inst #3009 = OR64rr_EVEX |
| 44148 | { 3008, 3, 1, 0, 1462, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x480020028ULL }, // Inst #3008 = OR64rr |
| 44149 | { 3007, 7, 1, 0, 25, 0, 0, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101085e0030019ULL }, // Inst #3007 = OR64rm_NF_ND |
| 44150 | { 3006, 7, 1, 0, 25, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100005e0030019ULL }, // Inst #3006 = OR64rm_NF |
| 44151 | { 3005, 7, 1, 0, 25, 0, 1, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1085e0030019ULL }, // Inst #3005 = OR64rm_ND |
| 44152 | { 3004, 7, 1, 0, 25, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0005e0030019ULL }, // Inst #3004 = OR64rm_EVEX |
| 44153 | { 3003, 7, 1, 0, 1469, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x580020019ULL }, // Inst #3003 = OR64rm |
| 44154 | { 3002, 3, 1, 0, 1, 0, 0, 427, X86ImpOpBase + 0, 0, 0x1010c1e0070031ULL }, // Inst #3002 = OR64ri8_NF_ND |
| 44155 | { 3001, 3, 1, 0, 1, 0, 0, 164, X86ImpOpBase + 0, 0, 0x100041e0070031ULL }, // Inst #3001 = OR64ri8_NF |
| 44156 | { 3000, 3, 1, 0, 1, 0, 1, 427, X86ImpOpBase + 0, 0, 0x10c1e0070031ULL }, // Inst #3000 = OR64ri8_ND |
| 44157 | { 2999, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0, 0xc0041e0070031ULL }, // Inst #2999 = OR64ri8_EVEX |
| 44158 | { 2998, 3, 1, 0, 1462, 0, 1, 164, X86ImpOpBase + 0, 0, 0x4180060031ULL }, // Inst #2998 = OR64ri8 |
| 44159 | { 2997, 3, 1, 0, 1, 0, 0, 427, X86ImpOpBase + 0, 0, 0x1010c0e0230031ULL }, // Inst #2997 = OR64ri32_NF_ND |
| 44160 | { 2996, 3, 1, 0, 1, 0, 0, 164, X86ImpOpBase + 0, 0, 0x100040e0230031ULL }, // Inst #2996 = OR64ri32_NF |
| 44161 | { 2995, 3, 1, 0, 1, 0, 1, 427, X86ImpOpBase + 0, 0, 0x10c0e0230031ULL }, // Inst #2995 = OR64ri32_ND |
| 44162 | { 2994, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0, 0xc0040e0230031ULL }, // Inst #2994 = OR64ri32_EVEX |
| 44163 | { 2993, 3, 1, 0, 1462, 0, 1, 164, X86ImpOpBase + 0, 0, 0x4080220031ULL }, // Inst #2993 = OR64ri32 |
| 44164 | { 2992, 7, 1, 0, 932, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101084e0030018ULL }, // Inst #2992 = OR64mr_NF_ND |
| 44165 | { 2991, 6, 0, 0, 934, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100004e0030018ULL }, // Inst #2991 = OR64mr_NF |
| 44166 | { 2990, 7, 1, 0, 932, 0, 1, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1084e0030018ULL }, // Inst #2990 = OR64mr_ND |
| 44167 | { 2989, 6, 0, 0, 933, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0004e0030018ULL }, // Inst #2989 = OR64mr_EVEX |
| 44168 | { 2988, 6, 0, 0, 933, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480020018ULL }, // Inst #2988 = OR64mr |
| 44169 | { 2987, 7, 1, 0, 932, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0070021ULL }, // Inst #2987 = OR64mi8_NF_ND |
| 44170 | { 2986, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0070021ULL }, // Inst #2986 = OR64mi8_NF |
| 44171 | { 2985, 7, 1, 0, 932, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070021ULL }, // Inst #2985 = OR64mi8_ND |
| 44172 | { 2984, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070021ULL }, // Inst #2984 = OR64mi8_EVEX |
| 44173 | { 2983, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060021ULL }, // Inst #2983 = OR64mi8 |
| 44174 | { 2982, 7, 1, 0, 932, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0230021ULL }, // Inst #2982 = OR64mi32_NF_ND |
| 44175 | { 2981, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0230021ULL }, // Inst #2981 = OR64mi32_NF |
| 44176 | { 2980, 7, 1, 0, 932, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230021ULL }, // Inst #2980 = OR64mi32_ND |
| 44177 | { 2979, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230021ULL }, // Inst #2979 = OR64mi32_EVEX |
| 44178 | { 2978, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220021ULL }, // Inst #2978 = OR64mi32 |
| 44179 | { 2977, 1, 0, 0, 1463, 1, 2, 1, X86ImpOpBase + 72, 0, 0x680220001ULL }, // Inst #2977 = OR64i32 |
| 44180 | { 2976, 3, 1, 0, 1462, 0, 1, 161, X86ImpOpBase + 0, 0, 0x580000129ULL }, // Inst #2976 = OR32rr_REV |
| 44181 | { 2975, 3, 1, 0, 1, 0, 0, 161, X86ImpOpBase + 0, 0, 0x100005e0010029ULL }, // Inst #2975 = OR32rr_NF_REV |
| 44182 | { 2974, 3, 1, 0, 1, 0, 0, 226, X86ImpOpBase + 0, 0, 0x101085e0010029ULL }, // Inst #2974 = OR32rr_NF_ND_REV |
| 44183 | { 2973, 3, 1, 0, 1, 0, 0, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x101084e0010028ULL }, // Inst #2973 = OR32rr_NF_ND |
| 44184 | { 2972, 3, 1, 0, 1, 0, 0, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100004e0010028ULL }, // Inst #2972 = OR32rr_NF |
| 44185 | { 2971, 3, 1, 0, 1, 0, 1, 226, X86ImpOpBase + 0, 0, 0x1085e0010029ULL }, // Inst #2971 = OR32rr_ND_REV |
| 44186 | { 2970, 3, 1, 0, 1, 0, 1, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1084e0010028ULL }, // Inst #2970 = OR32rr_ND |
| 44187 | { 2969, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0, 0xc0005e0010029ULL }, // Inst #2969 = OR32rr_EVEX_REV |
| 44188 | { 2968, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0004e0010028ULL }, // Inst #2968 = OR32rr_EVEX |
| 44189 | { 2967, 3, 1, 0, 1462, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x480000128ULL }, // Inst #2967 = OR32rr |
| 44190 | { 2966, 7, 1, 0, 25, 0, 0, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101085e0010019ULL }, // Inst #2966 = OR32rm_NF_ND |
| 44191 | { 2965, 7, 1, 0, 25, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100005e0010019ULL }, // Inst #2965 = OR32rm_NF |
| 44192 | { 2964, 7, 1, 0, 25, 0, 1, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1085e0010019ULL }, // Inst #2964 = OR32rm_ND |
| 44193 | { 2963, 7, 1, 0, 25, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0005e0010019ULL }, // Inst #2963 = OR32rm_EVEX |
| 44194 | { 2962, 7, 1, 0, 1450, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x580000119ULL }, // Inst #2962 = OR32rm |
| 44195 | { 2961, 3, 1, 0, 1, 0, 0, 396, X86ImpOpBase + 0, 0, 0x1010c0e0190031ULL }, // Inst #2961 = OR32ri_NF_ND |
| 44196 | { 2960, 3, 1, 0, 1, 0, 0, 158, X86ImpOpBase + 0, 0, 0x100040e0190031ULL }, // Inst #2960 = OR32ri_NF |
| 44197 | { 2959, 3, 1, 0, 1, 0, 1, 396, X86ImpOpBase + 0, 0, 0x10c0e0190031ULL }, // Inst #2959 = OR32ri_ND |
| 44198 | { 2958, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0, 0xc0040e0190031ULL }, // Inst #2958 = OR32ri_EVEX |
| 44199 | { 2957, 3, 1, 0, 1, 0, 0, 396, X86ImpOpBase + 0, 0, 0x1010c1e0050031ULL }, // Inst #2957 = OR32ri8_NF_ND |
| 44200 | { 2956, 3, 1, 0, 1, 0, 0, 158, X86ImpOpBase + 0, 0, 0x100041e0050031ULL }, // Inst #2956 = OR32ri8_NF |
| 44201 | { 2955, 3, 1, 0, 1, 0, 1, 396, X86ImpOpBase + 0, 0, 0x10c1e0050031ULL }, // Inst #2955 = OR32ri8_ND |
| 44202 | { 2954, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0, 0xc0041e0050031ULL }, // Inst #2954 = OR32ri8_EVEX |
| 44203 | { 2953, 3, 1, 0, 1462, 0, 1, 158, X86ImpOpBase + 0, 0, 0x4180040131ULL }, // Inst #2953 = OR32ri8 |
| 44204 | { 2952, 3, 1, 0, 1462, 0, 1, 158, X86ImpOpBase + 0, 0, 0x4080180131ULL }, // Inst #2952 = OR32ri |
| 44205 | { 2951, 7, 1, 0, 932, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101084e0010018ULL }, // Inst #2951 = OR32mr_NF_ND |
| 44206 | { 2950, 6, 0, 0, 934, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100004e0010018ULL }, // Inst #2950 = OR32mr_NF |
| 44207 | { 2949, 7, 1, 0, 932, 0, 1, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1084e0010018ULL }, // Inst #2949 = OR32mr_ND |
| 44208 | { 2948, 6, 0, 0, 933, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0004e0010018ULL }, // Inst #2948 = OR32mr_EVEX |
| 44209 | { 2947, 6, 0, 0, 933, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480000118ULL }, // Inst #2947 = OR32mr |
| 44210 | { 2946, 7, 1, 0, 932, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0190021ULL }, // Inst #2946 = OR32mi_NF_ND |
| 44211 | { 2945, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0190021ULL }, // Inst #2945 = OR32mi_NF |
| 44212 | { 2944, 7, 1, 0, 932, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190021ULL }, // Inst #2944 = OR32mi_ND |
| 44213 | { 2943, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190021ULL }, // Inst #2943 = OR32mi_EVEX |
| 44214 | { 2942, 7, 1, 0, 932, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050021ULL }, // Inst #2942 = OR32mi8_NF_ND |
| 44215 | { 2941, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050021ULL }, // Inst #2941 = OR32mi8_NF |
| 44216 | { 2940, 7, 1, 0, 932, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050021ULL }, // Inst #2940 = OR32mi8_ND |
| 44217 | { 2939, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050021ULL }, // Inst #2939 = OR32mi8_EVEX |
| 44218 | { 2938, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4182040121ULL }, // Inst #2938 = OR32mi8Locked |
| 44219 | { 2937, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040121ULL }, // Inst #2937 = OR32mi8 |
| 44220 | { 2936, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180121ULL }, // Inst #2936 = OR32mi |
| 44221 | { 2935, 1, 0, 0, 1463, 1, 2, 1, X86ImpOpBase + 69, 0, 0x680180101ULL }, // Inst #2935 = OR32i32 |
| 44222 | { 2934, 3, 1, 0, 1462, 0, 1, 155, X86ImpOpBase + 0, 0, 0x5800000a9ULL }, // Inst #2934 = OR16rr_REV |
| 44223 | { 2933, 3, 1, 0, 1, 0, 0, 155, X86ImpOpBase + 0, 0, 0x100005e0010829ULL }, // Inst #2933 = OR16rr_NF_REV |
| 44224 | { 2932, 3, 1, 0, 1, 0, 0, 379, X86ImpOpBase + 0, 0, 0x101085e0010829ULL }, // Inst #2932 = OR16rr_NF_ND_REV |
| 44225 | { 2931, 3, 1, 0, 1, 0, 0, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x101084e0010828ULL }, // Inst #2931 = OR16rr_NF_ND |
| 44226 | { 2930, 3, 1, 0, 1, 0, 0, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100004e0010828ULL }, // Inst #2930 = OR16rr_NF |
| 44227 | { 2929, 3, 1, 0, 1, 0, 1, 379, X86ImpOpBase + 0, 0, 0x1085e0010829ULL }, // Inst #2929 = OR16rr_ND_REV |
| 44228 | { 2928, 3, 1, 0, 1, 0, 1, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1084e0010828ULL }, // Inst #2928 = OR16rr_ND |
| 44229 | { 2927, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0, 0xc0005e0010829ULL }, // Inst #2927 = OR16rr_EVEX_REV |
| 44230 | { 2926, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0004e0010828ULL }, // Inst #2926 = OR16rr_EVEX |
| 44231 | { 2925, 3, 1, 0, 1462, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x4800000a8ULL }, // Inst #2925 = OR16rr |
| 44232 | { 2924, 7, 1, 0, 25, 0, 0, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101085e0010819ULL }, // Inst #2924 = OR16rm_NF_ND |
| 44233 | { 2923, 7, 1, 0, 25, 0, 0, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100005e0010819ULL }, // Inst #2923 = OR16rm_NF |
| 44234 | { 2922, 7, 1, 0, 25, 0, 1, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1085e0010819ULL }, // Inst #2922 = OR16rm_ND |
| 44235 | { 2921, 7, 1, 0, 25, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0005e0010819ULL }, // Inst #2921 = OR16rm_EVEX |
| 44236 | { 2920, 7, 1, 0, 1450, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x580000099ULL }, // Inst #2920 = OR16rm |
| 44237 | { 2919, 3, 1, 0, 1, 0, 0, 362, X86ImpOpBase + 0, 0, 0x1010c0e0110831ULL }, // Inst #2919 = OR16ri_NF_ND |
| 44238 | { 2918, 3, 1, 0, 1, 0, 0, 152, X86ImpOpBase + 0, 0, 0x100040e0110831ULL }, // Inst #2918 = OR16ri_NF |
| 44239 | { 2917, 3, 1, 0, 1, 0, 1, 362, X86ImpOpBase + 0, 0, 0x10c0e0110831ULL }, // Inst #2917 = OR16ri_ND |
| 44240 | { 2916, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0, 0xc0040e0110831ULL }, // Inst #2916 = OR16ri_EVEX |
| 44241 | { 2915, 3, 1, 0, 1, 0, 0, 362, X86ImpOpBase + 0, 0, 0x1010c1e0050831ULL }, // Inst #2915 = OR16ri8_NF_ND |
| 44242 | { 2914, 3, 1, 0, 1, 0, 0, 152, X86ImpOpBase + 0, 0, 0x100041e0050831ULL }, // Inst #2914 = OR16ri8_NF |
| 44243 | { 2913, 3, 1, 0, 1, 0, 1, 362, X86ImpOpBase + 0, 0, 0x10c1e0050831ULL }, // Inst #2913 = OR16ri8_ND |
| 44244 | { 2912, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0, 0xc0041e0050831ULL }, // Inst #2912 = OR16ri8_EVEX |
| 44245 | { 2911, 3, 1, 0, 1462, 0, 1, 152, X86ImpOpBase + 0, 0, 0x41800400b1ULL }, // Inst #2911 = OR16ri8 |
| 44246 | { 2910, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0, 0x40801000b1ULL }, // Inst #2910 = OR16ri |
| 44247 | { 2909, 7, 1, 0, 932, 0, 0, 355, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101084e0010818ULL }, // Inst #2909 = OR16mr_NF_ND |
| 44248 | { 2908, 6, 0, 0, 934, 0, 0, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100004e0010818ULL }, // Inst #2908 = OR16mr_NF |
| 44249 | { 2907, 7, 1, 0, 932, 0, 1, 355, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1084e0010818ULL }, // Inst #2907 = OR16mr_ND |
| 44250 | { 2906, 6, 0, 0, 933, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0004e0010818ULL }, // Inst #2906 = OR16mr_EVEX |
| 44251 | { 2905, 6, 0, 0, 933, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480000098ULL }, // Inst #2905 = OR16mr |
| 44252 | { 2904, 7, 1, 0, 932, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0110821ULL }, // Inst #2904 = OR16mi_NF_ND |
| 44253 | { 2903, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0110821ULL }, // Inst #2903 = OR16mi_NF |
| 44254 | { 2902, 7, 1, 0, 932, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110821ULL }, // Inst #2902 = OR16mi_ND |
| 44255 | { 2901, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110821ULL }, // Inst #2901 = OR16mi_EVEX |
| 44256 | { 2900, 7, 1, 0, 932, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050821ULL }, // Inst #2900 = OR16mi8_NF_ND |
| 44257 | { 2899, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050821ULL }, // Inst #2899 = OR16mi8_NF |
| 44258 | { 2898, 7, 1, 0, 932, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050821ULL }, // Inst #2898 = OR16mi8_ND |
| 44259 | { 2897, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050821ULL }, // Inst #2897 = OR16mi8_EVEX |
| 44260 | { 2896, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a1ULL }, // Inst #2896 = OR16mi8 |
| 44261 | { 2895, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a1ULL }, // Inst #2895 = OR16mi |
| 44262 | { 2894, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 46, 0, 0x680100081ULL }, // Inst #2894 = OR16i16 |
| 44263 | { 2893, 2, 1, 0, 1, 0, 0, 947, X86ImpOpBase + 0, 0, 0x10fb60010032ULL }, // Inst #2893 = NOT8r_ND |
| 44264 | { 2892, 2, 1, 0, 1, 0, 0, 1049, X86ImpOpBase + 0, 0, 0xc007b60010032ULL }, // Inst #2892 = NOT8r_EVEX |
| 44265 | { 2891, 2, 1, 0, 1, 0, 0, 1049, X86ImpOpBase + 0, 0, 0x7b00000032ULL }, // Inst #2891 = NOT8r |
| 44266 | { 2890, 6, 1, 0, 927, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10fb60010022ULL }, // Inst #2890 = NOT8m_ND |
| 44267 | { 2889, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007b60010022ULL }, // Inst #2889 = NOT8m_EVEX |
| 44268 | { 2888, 5, 0, 0, 1457, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b00000022ULL }, // Inst #2888 = NOT8m |
| 44269 | { 2887, 2, 1, 0, 1, 0, 0, 575, X86ImpOpBase + 0, 0, 0x10fbe0030032ULL }, // Inst #2887 = NOT64r_ND |
| 44270 | { 2886, 2, 1, 0, 1, 0, 0, 322, X86ImpOpBase + 0, 0, 0xc007be0030032ULL }, // Inst #2886 = NOT64r_EVEX |
| 44271 | { 2885, 2, 1, 0, 1, 0, 0, 322, X86ImpOpBase + 0, 0, 0x7b80020032ULL }, // Inst #2885 = NOT64r |
| 44272 | { 2884, 6, 1, 0, 927, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10fbe0030022ULL }, // Inst #2884 = NOT64m_ND |
| 44273 | { 2883, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0030022ULL }, // Inst #2883 = NOT64m_EVEX |
| 44274 | { 2882, 5, 0, 0, 1202, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b80020022ULL }, // Inst #2882 = NOT64m |
| 44275 | { 2881, 2, 1, 0, 1, 0, 0, 573, X86ImpOpBase + 0, 0, 0x10fbe0010032ULL }, // Inst #2881 = NOT32r_ND |
| 44276 | { 2880, 2, 1, 0, 1, 0, 0, 320, X86ImpOpBase + 0, 0, 0xc007be0010032ULL }, // Inst #2880 = NOT32r_EVEX |
| 44277 | { 2879, 2, 1, 0, 1, 0, 0, 320, X86ImpOpBase + 0, 0, 0x7b80000132ULL }, // Inst #2879 = NOT32r |
| 44278 | { 2878, 6, 1, 0, 927, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10fbe0010022ULL }, // Inst #2878 = NOT32m_ND |
| 44279 | { 2877, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0010022ULL }, // Inst #2877 = NOT32m_EVEX |
| 44280 | { 2876, 5, 0, 0, 1202, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b80000122ULL }, // Inst #2876 = NOT32m |
| 44281 | { 2875, 2, 1, 0, 1, 0, 0, 569, X86ImpOpBase + 0, 0, 0x10fbe0010832ULL }, // Inst #2875 = NOT16r_ND |
| 44282 | { 2874, 2, 1, 0, 1, 0, 0, 595, X86ImpOpBase + 0, 0, 0xc007be0010832ULL }, // Inst #2874 = NOT16r_EVEX |
| 44283 | { 2873, 2, 1, 0, 1, 0, 0, 595, X86ImpOpBase + 0, 0, 0x7b800000b2ULL }, // Inst #2873 = NOT16r |
| 44284 | { 2872, 6, 1, 0, 927, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10fbe0010822ULL }, // Inst #2872 = NOT16m_ND |
| 44285 | { 2871, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0010822ULL }, // Inst #2871 = NOT16m_EVEX |
| 44286 | { 2870, 5, 0, 0, 1202, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b800000a2ULL }, // Inst #2870 = NOT16m |
| 44287 | { 2869, 1, 0, 0, 31, 0, 0, 599, X86ImpOpBase + 0, 0, 0xf800020afULL }, // Inst #2869 = NOOPWr |
| 44288 | { 2868, 5, 0, 0, 31, 0, 0, 232, X86ImpOpBase + 0, 0, 0xf8000209fULL }, // Inst #2868 = NOOPW |
| 44289 | { 2867, 1, 0, 0, 31, 0, 0, 203, X86ImpOpBase + 0, 0, 0xf8002202fULL }, // Inst #2867 = NOOPQr |
| 44290 | { 2866, 5, 0, 0, 31, 0, 0, 232, X86ImpOpBase + 0, 0, 0xf8002201fULL }, // Inst #2866 = NOOPQ |
| 44291 | { 2865, 1, 0, 0, 31, 0, 0, 202, X86ImpOpBase + 0, 0, 0xf8000212fULL }, // Inst #2865 = NOOPLr |
| 44292 | { 2864, 5, 0, 0, 31, 0, 0, 232, X86ImpOpBase + 0, 0, 0xf8000211fULL }, // Inst #2864 = NOOPL |
| 44293 | { 2863, 0, 0, 0, 31, 0, 0, 1, X86ImpOpBase + 0, 0, 0x4800000001ULL }, // Inst #2863 = NOOP |
| 44294 | { 2862, 2, 1, 0, 1, 0, 0, 947, X86ImpOpBase + 0, 0, 0x1010fb60010033ULL }, // Inst #2862 = NEG8r_NF_ND |
| 44295 | { 2861, 2, 1, 0, 1, 0, 0, 1049, X86ImpOpBase + 0, 0, 0x10007b60010033ULL }, // Inst #2861 = NEG8r_NF |
| 44296 | { 2860, 2, 1, 0, 1, 0, 1, 947, X86ImpOpBase + 0, 0, 0x10fb60010033ULL }, // Inst #2860 = NEG8r_ND |
| 44297 | { 2859, 2, 1, 0, 1, 0, 1, 1049, X86ImpOpBase + 0, 0, 0xc007b60010033ULL }, // Inst #2859 = NEG8r_EVEX |
| 44298 | { 2858, 2, 1, 0, 1, 0, 1, 1049, X86ImpOpBase + 0, 0, 0x7b00000033ULL }, // Inst #2858 = NEG8r |
| 44299 | { 2857, 6, 1, 0, 927, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010fb60010023ULL }, // Inst #2857 = NEG8m_NF_ND |
| 44300 | { 2856, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007b60010023ULL }, // Inst #2856 = NEG8m_NF |
| 44301 | { 2855, 6, 1, 0, 927, 0, 1, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10fb60010023ULL }, // Inst #2855 = NEG8m_ND |
| 44302 | { 2854, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007b60010023ULL }, // Inst #2854 = NEG8m_EVEX |
| 44303 | { 2853, 5, 0, 0, 1457, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b00000023ULL }, // Inst #2853 = NEG8m |
| 44304 | { 2852, 2, 1, 0, 1, 0, 0, 575, X86ImpOpBase + 0, 0, 0x1010fbe0030033ULL }, // Inst #2852 = NEG64r_NF_ND |
| 44305 | { 2851, 2, 1, 0, 1, 0, 0, 322, X86ImpOpBase + 0, 0, 0x10007be0030033ULL }, // Inst #2851 = NEG64r_NF |
| 44306 | { 2850, 2, 1, 0, 1, 0, 1, 575, X86ImpOpBase + 0, 0, 0x10fbe0030033ULL }, // Inst #2850 = NEG64r_ND |
| 44307 | { 2849, 2, 1, 0, 1, 0, 1, 322, X86ImpOpBase + 0, 0, 0xc007be0030033ULL }, // Inst #2849 = NEG64r_EVEX |
| 44308 | { 2848, 2, 1, 0, 1, 0, 1, 322, X86ImpOpBase + 0, 0, 0x7b80020033ULL }, // Inst #2848 = NEG64r |
| 44309 | { 2847, 6, 1, 0, 927, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010fbe0030023ULL }, // Inst #2847 = NEG64m_NF_ND |
| 44310 | { 2846, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007be0030023ULL }, // Inst #2846 = NEG64m_NF |
| 44311 | { 2845, 6, 1, 0, 927, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10fbe0030023ULL }, // Inst #2845 = NEG64m_ND |
| 44312 | { 2844, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0030023ULL }, // Inst #2844 = NEG64m_EVEX |
| 44313 | { 2843, 5, 0, 0, 1202, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b80020023ULL }, // Inst #2843 = NEG64m |
| 44314 | { 2842, 2, 1, 0, 1, 0, 0, 573, X86ImpOpBase + 0, 0, 0x1010fbe0010033ULL }, // Inst #2842 = NEG32r_NF_ND |
| 44315 | { 2841, 2, 1, 0, 1, 0, 0, 320, X86ImpOpBase + 0, 0, 0x10007be0010033ULL }, // Inst #2841 = NEG32r_NF |
| 44316 | { 2840, 2, 1, 0, 1, 0, 1, 573, X86ImpOpBase + 0, 0, 0x10fbe0010033ULL }, // Inst #2840 = NEG32r_ND |
| 44317 | { 2839, 2, 1, 0, 1, 0, 1, 320, X86ImpOpBase + 0, 0, 0xc007be0010033ULL }, // Inst #2839 = NEG32r_EVEX |
| 44318 | { 2838, 2, 1, 0, 1, 0, 1, 320, X86ImpOpBase + 0, 0, 0x7b80000133ULL }, // Inst #2838 = NEG32r |
| 44319 | { 2837, 6, 1, 0, 927, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010fbe0010023ULL }, // Inst #2837 = NEG32m_NF_ND |
| 44320 | { 2836, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007be0010023ULL }, // Inst #2836 = NEG32m_NF |
| 44321 | { 2835, 6, 1, 0, 927, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10fbe0010023ULL }, // Inst #2835 = NEG32m_ND |
| 44322 | { 2834, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0010023ULL }, // Inst #2834 = NEG32m_EVEX |
| 44323 | { 2833, 5, 0, 0, 1202, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b80000123ULL }, // Inst #2833 = NEG32m |
| 44324 | { 2832, 2, 1, 0, 1, 0, 0, 569, X86ImpOpBase + 0, 0, 0x1010fbe0010833ULL }, // Inst #2832 = NEG16r_NF_ND |
| 44325 | { 2831, 2, 1, 0, 1, 0, 0, 595, X86ImpOpBase + 0, 0, 0x10007be0010833ULL }, // Inst #2831 = NEG16r_NF |
| 44326 | { 2830, 2, 1, 0, 1, 0, 1, 569, X86ImpOpBase + 0, 0, 0x10fbe0010833ULL }, // Inst #2830 = NEG16r_ND |
| 44327 | { 2829, 2, 1, 0, 1, 0, 1, 595, X86ImpOpBase + 0, 0, 0xc007be0010833ULL }, // Inst #2829 = NEG16r_EVEX |
| 44328 | { 2828, 2, 1, 0, 1, 0, 1, 595, X86ImpOpBase + 0, 0, 0x7b800000b3ULL }, // Inst #2828 = NEG16r |
| 44329 | { 2827, 6, 1, 0, 927, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010fbe0010823ULL }, // Inst #2827 = NEG16m_NF_ND |
| 44330 | { 2826, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007be0010823ULL }, // Inst #2826 = NEG16m_NF |
| 44331 | { 2825, 6, 1, 0, 927, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10fbe0010823ULL }, // Inst #2825 = NEG16m_ND |
| 44332 | { 2824, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0010823ULL }, // Inst #2824 = NEG16m_EVEX |
| 44333 | { 2823, 5, 0, 0, 1202, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b800000a3ULL }, // Inst #2823 = NEG16m |
| 44334 | { 2822, 0, 0, 0, 710, 2, 0, 1, X86ImpOpBase + 366, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80002049ULL }, // Inst #2822 = MWAITrr |
| 44335 | { 2821, 0, 0, 0, 8, 3, 0, 1, X86ImpOpBase + 16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207bULL }, // Inst #2821 = MWAITXrrr |
| 44336 | { 2820, 1, 0, 0, 1584, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000031ULL }, // Inst #2820 = MUL_FrST0 |
| 44337 | { 2819, 7, 1, 0, 248, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2819 = MUL_FpI32m80 |
| 44338 | { 2818, 7, 1, 0, 248, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2818 = MUL_FpI32m64 |
| 44339 | { 2817, 7, 1, 0, 248, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2817 = MUL_FpI32m32 |
| 44340 | { 2816, 7, 1, 0, 248, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2816 = MUL_FpI16m80 |
| 44341 | { 2815, 7, 1, 0, 248, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2815 = MUL_FpI16m64 |
| 44342 | { 2814, 7, 1, 0, 248, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2814 = MUL_FpI16m32 |
| 44343 | { 2813, 7, 1, 0, 248, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2813 = MUL_Fp80m64 |
| 44344 | { 2812, 7, 1, 0, 248, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2812 = MUL_Fp80m32 |
| 44345 | { 2811, 3, 1, 0, 0, 1, 1, 538, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #2811 = MUL_Fp80 |
| 44346 | { 2810, 7, 1, 0, 248, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2810 = MUL_Fp64m32 |
| 44347 | { 2809, 7, 1, 0, 248, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2809 = MUL_Fp64m |
| 44348 | { 2808, 3, 1, 0, 0, 1, 1, 528, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #2808 = MUL_Fp64 |
| 44349 | { 2807, 7, 1, 0, 248, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2807 = MUL_Fp32m |
| 44350 | { 2806, 3, 1, 0, 0, 1, 1, 518, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #2806 = MUL_Fp32 |
| 44351 | { 2805, 1, 0, 0, 870, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000031ULL }, // Inst #2805 = MUL_FST0r |
| 44352 | { 2804, 1, 0, 0, 1584, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000031ULL }, // Inst #2804 = MUL_FPrST0 |
| 44353 | { 2803, 5, 0, 0, 801, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000021ULL }, // Inst #2803 = MUL_FI32m |
| 44354 | { 2802, 5, 0, 0, 801, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000021ULL }, // Inst #2802 = MUL_FI16m |
| 44355 | { 2801, 5, 0, 0, 799, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000021ULL }, // Inst #2801 = MUL_F64m |
| 44356 | { 2800, 5, 0, 0, 799, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000021ULL }, // Inst #2800 = MUL_F32m |
| 44357 | { 2799, 3, 2, 0, 247, 1, 0, 444, X86ImpOpBase + 365, 0, 0xfb60025829ULL }, // Inst #2799 = MULX64rr_EVEX |
| 44358 | { 2798, 3, 2, 0, 247, 1, 0, 444, X86ImpOpBase + 365, 0, 0xfb20025829ULL }, // Inst #2798 = MULX64rr |
| 44359 | { 2797, 7, 2, 0, 246, 1, 0, 437, X86ImpOpBase + 365, 0|(1ULL<<MCID::MayLoad), 0xfb60025819ULL }, // Inst #2797 = MULX64rm_EVEX |
| 44360 | { 2796, 7, 2, 0, 246, 1, 0, 437, X86ImpOpBase + 365, 0|(1ULL<<MCID::MayLoad), 0xfb20025819ULL }, // Inst #2796 = MULX64rm |
| 44361 | { 2795, 2, 1, 0, 245, 1, 0, 575, X86ImpOpBase + 365, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20000ULL }, // Inst #2795 = MULX64Hrr |
| 44362 | { 2794, 6, 1, 0, 244, 1, 0, 243, X86ImpOpBase + 365, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20000ULL }, // Inst #2794 = MULX64Hrm |
| 44363 | { 2793, 3, 2, 0, 243, 1, 0, 226, X86ImpOpBase + 364, 0, 0xfb60005829ULL }, // Inst #2793 = MULX32rr_EVEX |
| 44364 | { 2792, 3, 2, 0, 243, 1, 0, 226, X86ImpOpBase + 364, 0, 0xfb20005829ULL }, // Inst #2792 = MULX32rr |
| 44365 | { 2791, 7, 2, 0, 242, 1, 0, 406, X86ImpOpBase + 364, 0|(1ULL<<MCID::MayLoad), 0xfb60005819ULL }, // Inst #2791 = MULX32rm_EVEX |
| 44366 | { 2790, 7, 2, 0, 242, 1, 0, 406, X86ImpOpBase + 364, 0|(1ULL<<MCID::MayLoad), 0xfb20005819ULL }, // Inst #2790 = MULX32rm |
| 44367 | { 2789, 2, 1, 0, 241, 1, 0, 573, X86ImpOpBase + 364, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2789 = MULX32Hrr |
| 44368 | { 2788, 6, 1, 0, 240, 1, 0, 237, X86ImpOpBase + 364, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2788 = MULX32Hrm |
| 44369 | { 2787, 3, 1, 0, 239, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2c88003029ULL }, // Inst #2787 = MULSSrr_Int |
| 44370 | { 2786, 3, 1, 0, 239, 1, 0, 514, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c88003029ULL }, // Inst #2786 = MULSSrr |
| 44371 | { 2785, 7, 1, 0, 238, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c88003019ULL }, // Inst #2785 = MULSSrm_Int |
| 44372 | { 2784, 7, 1, 0, 238, 1, 0, 507, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c88003019ULL }, // Inst #2784 = MULSSrm |
| 44373 | { 2783, 3, 1, 0, 237, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2c90003829ULL }, // Inst #2783 = MULSDrr_Int |
| 44374 | { 2782, 3, 1, 0, 237, 1, 0, 504, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c90003829ULL }, // Inst #2782 = MULSDrr |
| 44375 | { 2781, 7, 1, 0, 236, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c90003819ULL }, // Inst #2781 = MULSDrm_Int |
| 44376 | { 2780, 7, 1, 0, 236, 1, 0, 497, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c90003819ULL }, // Inst #2780 = MULSDrm |
| 44377 | { 2779, 3, 1, 0, 235, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c88002029ULL }, // Inst #2779 = MULPSrr |
| 44378 | { 2778, 7, 1, 0, 234, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c88002019ULL }, // Inst #2778 = MULPSrm |
| 44379 | { 2777, 3, 1, 0, 233, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c90002829ULL }, // Inst #2777 = MULPDrr |
| 44380 | { 2776, 7, 1, 0, 232, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c90002819ULL }, // Inst #2776 = MULPDrm |
| 44381 | { 2775, 1, 0, 0, 180, 1, 2, 1051, X86ImpOpBase + 273, 0, 0x10007b60010034ULL }, // Inst #2775 = MUL8r_NF |
| 44382 | { 2774, 1, 0, 0, 180, 1, 3, 1051, X86ImpOpBase + 269, 0, 0xc007b60010034ULL }, // Inst #2774 = MUL8r_EVEX |
| 44383 | { 2773, 1, 0, 0, 180, 1, 3, 1051, X86ImpOpBase + 269, 0, 0x7b00000034ULL }, // Inst #2773 = MUL8r |
| 44384 | { 2772, 5, 0, 0, 179, 1, 2, 232, X86ImpOpBase + 273, 0|(1ULL<<MCID::MayLoad), 0x10007b60010024ULL }, // Inst #2772 = MUL8m_NF |
| 44385 | { 2771, 5, 0, 0, 179, 1, 3, 232, X86ImpOpBase + 269, 0|(1ULL<<MCID::MayLoad), 0xc007b60010024ULL }, // Inst #2771 = MUL8m_EVEX |
| 44386 | { 2770, 5, 0, 0, 179, 1, 3, 232, X86ImpOpBase + 269, 0|(1ULL<<MCID::MayLoad), 0x7b00000024ULL }, // Inst #2770 = MUL8m |
| 44387 | { 2769, 1, 0, 0, 174, 1, 2, 203, X86ImpOpBase + 169, 0, 0x10007be0030034ULL }, // Inst #2769 = MUL64r_NF |
| 44388 | { 2768, 1, 0, 0, 174, 1, 3, 203, X86ImpOpBase + 265, 0, 0xc007be0030034ULL }, // Inst #2768 = MUL64r_EVEX |
| 44389 | { 2767, 1, 0, 0, 174, 1, 3, 203, X86ImpOpBase + 265, 0, 0x7b80020034ULL }, // Inst #2767 = MUL64r |
| 44390 | { 2766, 5, 0, 0, 173, 1, 2, 232, X86ImpOpBase + 169, 0|(1ULL<<MCID::MayLoad), 0x10007be0030024ULL }, // Inst #2766 = MUL64m_NF |
| 44391 | { 2765, 5, 0, 0, 173, 1, 3, 232, X86ImpOpBase + 265, 0|(1ULL<<MCID::MayLoad), 0xc007be0030024ULL }, // Inst #2765 = MUL64m_EVEX |
| 44392 | { 2764, 5, 0, 0, 173, 1, 3, 232, X86ImpOpBase + 265, 0|(1ULL<<MCID::MayLoad), 0x7b80020024ULL }, // Inst #2764 = MUL64m |
| 44393 | { 2763, 1, 0, 0, 168, 1, 2, 202, X86ImpOpBase + 116, 0, 0x10007be0010034ULL }, // Inst #2763 = MUL32r_NF |
| 44394 | { 2762, 1, 0, 0, 168, 1, 3, 202, X86ImpOpBase + 261, 0, 0xc007be0010034ULL }, // Inst #2762 = MUL32r_EVEX |
| 44395 | { 2761, 1, 0, 0, 168, 1, 3, 202, X86ImpOpBase + 261, 0, 0x7b80000134ULL }, // Inst #2761 = MUL32r |
| 44396 | { 2760, 5, 0, 0, 167, 1, 2, 232, X86ImpOpBase + 116, 0|(1ULL<<MCID::MayLoad), 0x10007be0010024ULL }, // Inst #2760 = MUL32m_NF |
| 44397 | { 2759, 5, 0, 0, 167, 1, 3, 232, X86ImpOpBase + 261, 0|(1ULL<<MCID::MayLoad), 0xc007be0010024ULL }, // Inst #2759 = MUL32m_EVEX |
| 44398 | { 2758, 5, 0, 0, 167, 1, 3, 232, X86ImpOpBase + 261, 0|(1ULL<<MCID::MayLoad), 0x7b80000124ULL }, // Inst #2758 = MUL32m |
| 44399 | { 2757, 1, 0, 0, 162, 1, 2, 599, X86ImpOpBase + 172, 0, 0x10007be0010834ULL }, // Inst #2757 = MUL16r_NF |
| 44400 | { 2756, 1, 0, 0, 162, 1, 3, 599, X86ImpOpBase + 257, 0, 0xc007be0010834ULL }, // Inst #2756 = MUL16r_EVEX |
| 44401 | { 2755, 1, 0, 0, 162, 1, 3, 599, X86ImpOpBase + 257, 0, 0x7b800000b4ULL }, // Inst #2755 = MUL16r |
| 44402 | { 2754, 5, 0, 0, 161, 1, 2, 232, X86ImpOpBase + 172, 0|(1ULL<<MCID::MayLoad), 0x10007be0010824ULL }, // Inst #2754 = MUL16m_NF |
| 44403 | { 2753, 5, 0, 0, 161, 1, 3, 232, X86ImpOpBase + 257, 0|(1ULL<<MCID::MayLoad), 0xc007be0010824ULL }, // Inst #2753 = MUL16m_EVEX |
| 44404 | { 2752, 5, 0, 0, 161, 1, 3, 232, X86ImpOpBase + 257, 0|(1ULL<<MCID::MayLoad), 0x7b800000a4ULL }, // Inst #2752 = MUL16m |
| 44405 | { 2751, 4, 1, 0, 231, 0, 0, 585, X86ImpOpBase + 0, 0, 0x2118046829ULL }, // Inst #2751 = MPSADBWrri |
| 44406 | { 2750, 8, 1, 0, 230, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2118046819ULL }, // Inst #2750 = MPSADBWrmi |
| 44407 | { 2749, 2, 1, 0, 1554, 0, 0, 1432, X86ImpOpBase + 0, 0, 0x5b00022029ULL }, // Inst #2749 = MOVZX64rr8 |
| 44408 | { 2748, 2, 1, 0, 613, 0, 0, 1217, X86ImpOpBase + 0, 0, 0x5b80022029ULL }, // Inst #2748 = MOVZX64rr16 |
| 44409 | { 2747, 6, 1, 0, 72, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5b00022019ULL }, // Inst #2747 = MOVZX64rm8 |
| 44410 | { 2746, 6, 1, 0, 72, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5b80022019ULL }, // Inst #2746 = MOVZX64rm16 |
| 44411 | { 2745, 2, 1, 0, 1555, 0, 0, 1428, X86ImpOpBase + 0, 0, 0x5b00002129ULL }, // Inst #2745 = MOVZX32rr8_NOREX |
| 44412 | { 2744, 2, 1, 0, 1554, 0, 0, 1426, X86ImpOpBase + 0, 0, 0x5b00002129ULL }, // Inst #2744 = MOVZX32rr8 |
| 44413 | { 2743, 2, 1, 0, 613, 0, 0, 1215, X86ImpOpBase + 0, 0, 0x5b80002129ULL }, // Inst #2743 = MOVZX32rr16 |
| 44414 | { 2742, 6, 1, 0, 72, 0, 0, 1420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5b00002119ULL }, // Inst #2742 = MOVZX32rm8_NOREX |
| 44415 | { 2741, 6, 1, 0, 72, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5b00002119ULL }, // Inst #2741 = MOVZX32rm8 |
| 44416 | { 2740, 6, 1, 0, 72, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5b80002119ULL }, // Inst #2740 = MOVZX32rm16 |
| 44417 | { 2739, 2, 1, 0, 645, 0, 0, 1418, X86ImpOpBase + 0, 0, 0x5b000020a9ULL }, // Inst #2739 = MOVZX16rr8 |
| 44418 | { 2738, 2, 1, 0, 1009, 0, 0, 569, X86ImpOpBase + 0, 0, 0x5b800020a9ULL }, // Inst #2738 = MOVZX16rr16 |
| 44419 | { 2737, 6, 1, 0, 1449, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5b00002099ULL }, // Inst #2737 = MOVZX16rm8 |
| 44420 | { 2736, 6, 1, 0, 1005, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5b80002099ULL }, // Inst #2736 = MOVZX16rm16 |
| 44421 | { 2735, 2, 1, 0, 183, 0, 0, 557, X86ImpOpBase + 0, 0, 0x3f18003029ULL }, // Inst #2735 = MOVZPQILo2PQIrr |
| 44422 | { 2734, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x888002028ULL }, // Inst #2734 = MOVUPSrr_REV |
| 44423 | { 2733, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x808002029ULL }, // Inst #2733 = MOVUPSrr |
| 44424 | { 2732, 6, 1, 0, 658, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808002019ULL }, // Inst #2732 = MOVUPSrm |
| 44425 | { 2731, 6, 0, 0, 647, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x888002018ULL }, // Inst #2731 = MOVUPSmr |
| 44426 | { 2730, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x890002828ULL }, // Inst #2730 = MOVUPDrr_REV |
| 44427 | { 2729, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x810002829ULL }, // Inst #2729 = MOVUPDrr |
| 44428 | { 2728, 6, 1, 0, 658, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810002819ULL }, // Inst #2728 = MOVUPDrm |
| 44429 | { 2727, 6, 0, 0, 647, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x890002818ULL }, // Inst #2727 = MOVUPDmr |
| 44430 | { 2726, 2, 1, 0, 1582, 0, 0, 1432, X86ImpOpBase + 0, 0, 0x5f00022029ULL }, // Inst #2726 = MOVSX64rr8 |
| 44431 | { 2725, 2, 1, 0, 604, 0, 0, 1430, X86ImpOpBase + 0, 0, 0x3180020029ULL }, // Inst #2725 = MOVSX64rr32 |
| 44432 | { 2724, 2, 1, 0, 1582, 0, 0, 1217, X86ImpOpBase + 0, 0, 0x5f80022029ULL }, // Inst #2724 = MOVSX64rr16 |
| 44433 | { 2723, 6, 1, 0, 1578, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5f00022019ULL }, // Inst #2723 = MOVSX64rm8 |
| 44434 | { 2722, 6, 1, 0, 1578, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3180020019ULL }, // Inst #2722 = MOVSX64rm32 |
| 44435 | { 2721, 6, 1, 0, 1578, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5f80022019ULL }, // Inst #2721 = MOVSX64rm16 |
| 44436 | { 2720, 2, 1, 0, 1583, 0, 0, 1428, X86ImpOpBase + 0, 0, 0x5f00002129ULL }, // Inst #2720 = MOVSX32rr8_NOREX |
| 44437 | { 2719, 2, 1, 0, 1582, 0, 0, 1426, X86ImpOpBase + 0, 0, 0x5f00002129ULL }, // Inst #2719 = MOVSX32rr8 |
| 44438 | { 2718, 2, 1, 0, 1049, 0, 0, 573, X86ImpOpBase + 0, 0, 0x3180000129ULL }, // Inst #2718 = MOVSX32rr32 |
| 44439 | { 2717, 2, 1, 0, 1582, 0, 0, 1215, X86ImpOpBase + 0, 0, 0x5f80002129ULL }, // Inst #2717 = MOVSX32rr16 |
| 44440 | { 2716, 6, 1, 0, 1579, 0, 0, 1420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5f00002119ULL }, // Inst #2716 = MOVSX32rm8_NOREX |
| 44441 | { 2715, 6, 1, 0, 1578, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5f00002119ULL }, // Inst #2715 = MOVSX32rm8 |
| 44442 | { 2714, 6, 1, 0, 1578, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3180000119ULL }, // Inst #2714 = MOVSX32rm32 |
| 44443 | { 2713, 6, 1, 0, 1578, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5f80002119ULL }, // Inst #2713 = MOVSX32rm16 |
| 44444 | { 2712, 2, 1, 0, 1581, 0, 0, 1418, X86ImpOpBase + 0, 0, 0x5f000020a9ULL }, // Inst #2712 = MOVSX16rr8 |
| 44445 | { 2711, 2, 1, 0, 1580, 0, 0, 1416, X86ImpOpBase + 0, 0, 0x31800000a9ULL }, // Inst #2711 = MOVSX16rr32 |
| 44446 | { 2710, 2, 1, 0, 1580, 0, 0, 569, X86ImpOpBase + 0, 0, 0x5f800020a9ULL }, // Inst #2710 = MOVSX16rr16 |
| 44447 | { 2709, 6, 1, 0, 655, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5f00002099ULL }, // Inst #2709 = MOVSX16rm8 |
| 44448 | { 2708, 6, 1, 0, 1577, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3180000099ULL }, // Inst #2708 = MOVSX16rm32 |
| 44449 | { 2707, 6, 1, 0, 1577, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5f80002099ULL }, // Inst #2707 = MOVSX16rm16 |
| 44450 | { 2706, 3, 0, 0, 651, 3, 2, 967, X86ImpOpBase + 359, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5280000086ULL }, // Inst #2706 = MOVSW |
| 44451 | { 2705, 3, 1, 0, 636, 0, 0, 494, X86ImpOpBase + 0, 0, 0x880003028ULL }, // Inst #2705 = MOVSSrr_REV |
| 44452 | { 2704, 3, 1, 0, 636, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x808003029ULL }, // Inst #2704 = MOVSSrr |
| 44453 | { 2703, 6, 1, 0, 772, 0, 0, 1002, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808003019ULL }, // Inst #2703 = MOVSSrm_alt |
| 44454 | { 2702, 6, 1, 0, 772, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808003019ULL }, // Inst #2702 = MOVSSrm |
| 44455 | { 2701, 6, 0, 0, 223, 0, 0, 1410, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x888003018ULL }, // Inst #2701 = MOVSSmr |
| 44456 | { 2700, 2, 1, 0, 195, 0, 0, 1047, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x3f18002828ULL }, // Inst #2700 = MOVSS2DIrr |
| 44457 | { 2699, 3, 0, 0, 651, 3, 2, 967, X86ImpOpBase + 359, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5280020006ULL }, // Inst #2699 = MOVSQ |
| 44458 | { 2698, 2, 1, 0, 1482, 0, 0, 557, X86ImpOpBase + 0, 0, 0x908003029ULL }, // Inst #2698 = MOVSLDUPrr |
| 44459 | { 2697, 6, 1, 0, 771, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x908003019ULL }, // Inst #2697 = MOVSLDUPrm |
| 44460 | { 2696, 3, 0, 0, 651, 3, 2, 967, X86ImpOpBase + 359, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5280000106ULL }, // Inst #2696 = MOVSL |
| 44461 | { 2695, 2, 1, 0, 1482, 0, 0, 557, X86ImpOpBase + 0, 0, 0xb08003029ULL }, // Inst #2695 = MOVSHDUPrr |
| 44462 | { 2694, 6, 1, 0, 771, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb08003019ULL }, // Inst #2694 = MOVSHDUPrm |
| 44463 | { 2693, 2, 1, 0, 195, 0, 0, 1019, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x3f18022828ULL }, // Inst #2693 = MOVSDto64rr |
| 44464 | { 2692, 3, 1, 0, 1576, 0, 0, 494, X86ImpOpBase + 0, 0, 0x880003828ULL }, // Inst #2692 = MOVSDrr_REV |
| 44465 | { 2691, 3, 1, 0, 1576, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x810003829ULL }, // Inst #2691 = MOVSDrr |
| 44466 | { 2690, 6, 1, 0, 772, 0, 0, 994, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810003819ULL }, // Inst #2690 = MOVSDrm_alt |
| 44467 | { 2689, 6, 1, 0, 772, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810003819ULL }, // Inst #2689 = MOVSDrm |
| 44468 | { 2688, 6, 0, 0, 223, 0, 0, 1404, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x890003818ULL }, // Inst #2688 = MOVSDmr |
| 44469 | { 2687, 3, 0, 0, 1575, 3, 2, 967, X86ImpOpBase + 359, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5200000006ULL }, // Inst #2687 = MOVSB |
| 44470 | { 2686, 6, 1, 0, 72, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4560010019ULL }, // Inst #2686 = MOVRS8rm_EVEX |
| 44471 | { 2685, 6, 1, 0, 72, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4500004019ULL }, // Inst #2685 = MOVRS8rm |
| 44472 | { 2684, 6, 1, 0, 72, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x45e0030019ULL }, // Inst #2684 = MOVRS64rm_EVEX |
| 44473 | { 2683, 6, 1, 0, 72, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4580024019ULL }, // Inst #2683 = MOVRS64rm |
| 44474 | { 2682, 6, 1, 0, 72, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x45e0010019ULL }, // Inst #2682 = MOVRS32rm_EVEX |
| 44475 | { 2681, 6, 1, 0, 72, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4580004119ULL }, // Inst #2681 = MOVRS32rm |
| 44476 | { 2680, 6, 1, 0, 72, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x45e0010819ULL }, // Inst #2680 = MOVRS16rm_EVEX |
| 44477 | { 2679, 6, 1, 0, 72, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4580004099ULL }, // Inst #2679 = MOVRS16rm |
| 44478 | { 2678, 6, 1, 0, 770, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3f18003019ULL }, // Inst #2678 = MOVQI2PQIrm |
| 44479 | { 2677, 2, 1, 0, 195, 0, 0, 1021, X86ImpOpBase + 0, 0, 0x3f18022828ULL }, // Inst #2677 = MOVPQIto64rr |
| 44480 | { 2676, 6, 0, 0, 194, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x3f18022818ULL }, // Inst #2676 = MOVPQIto64mr |
| 44481 | { 2675, 2, 1, 0, 183, 0, 0, 557, X86ImpOpBase + 0, 0, 0x6b00002828ULL }, // Inst #2675 = MOVPQI2QIrr |
| 44482 | { 2674, 6, 0, 0, 194, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6b18002818ULL }, // Inst #2674 = MOVPQI2QImr |
| 44483 | { 2673, 2, 1, 0, 195, 0, 0, 1025, X86ImpOpBase + 0, 0, 0x3f18002828ULL }, // Inst #2673 = MOVPDI2DIrr |
| 44484 | { 2672, 6, 0, 0, 194, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x3f18002818ULL }, // Inst #2672 = MOVPDI2DImr |
| 44485 | { 2671, 2, 1, 0, 4, 2, 0, 204, X86ImpOpBase + 112, 0|(1ULL<<MCID::NotDuplicable), 0x7400180000ULL }, // Inst #2671 = MOVPC32r |
| 44486 | { 2670, 6, 0, 0, 228, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x1580003018ULL }, // Inst #2670 = MOVNTSS |
| 44487 | { 2669, 6, 0, 0, 228, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x1580003818ULL }, // Inst #2669 = MOVNTSD |
| 44488 | { 2668, 6, 0, 0, 227, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x1588002018ULL }, // Inst #2668 = MOVNTPSmr |
| 44489 | { 2667, 6, 0, 0, 227, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x1590002818ULL }, // Inst #2667 = MOVNTPDmr |
| 44490 | { 2666, 6, 0, 0, 1574, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6180002018ULL }, // Inst #2666 = MOVNTImr |
| 44491 | { 2665, 6, 0, 0, 226, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6180022018ULL }, // Inst #2665 = MOVNTI_64mr |
| 44492 | { 2664, 6, 0, 0, 1573, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x7398002818ULL }, // Inst #2664 = MOVNTDQmr |
| 44493 | { 2663, 6, 1, 0, 225, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1518004819ULL }, // Inst #2663 = MOVNTDQArm |
| 44494 | { 2662, 2, 1, 0, 224, 0, 0, 1025, X86ImpOpBase + 0, 0, 0x2808002029ULL }, // Inst #2662 = MOVMSKPSrr |
| 44495 | { 2661, 2, 1, 0, 224, 0, 0, 1025, X86ImpOpBase + 0, 0, 0x2810002829ULL }, // Inst #2661 = MOVMSKPDrr |
| 44496 | { 2660, 7, 1, 0, 1571, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x908002019ULL }, // Inst #2660 = MOVLPSrm |
| 44497 | { 2659, 6, 0, 0, 223, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x988002018ULL }, // Inst #2659 = MOVLPSmr |
| 44498 | { 2658, 7, 1, 0, 1571, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x910002819ULL }, // Inst #2658 = MOVLPDrm |
| 44499 | { 2657, 6, 0, 0, 223, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x990002818ULL }, // Inst #2657 = MOVLPDmr |
| 44500 | { 2656, 3, 1, 0, 1417, 0, 0, 494, X86ImpOpBase + 0, 0, 0xb08002029ULL }, // Inst #2656 = MOVLHPSrr |
| 44501 | { 2655, 7, 1, 0, 818, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb08002019ULL }, // Inst #2655 = MOVHPSrm |
| 44502 | { 2654, 6, 0, 0, 1029, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xb88002018ULL }, // Inst #2654 = MOVHPSmr |
| 44503 | { 2653, 7, 1, 0, 818, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xb10002819ULL }, // Inst #2653 = MOVHPDrm |
| 44504 | { 2652, 6, 0, 0, 1029, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xb90002818ULL }, // Inst #2652 = MOVHPDmr |
| 44505 | { 2651, 3, 1, 0, 1417, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x908002029ULL }, // Inst #2651 = MOVHLPSrr |
| 44506 | { 2650, 2, 1, 0, 198, 0, 0, 557, X86ImpOpBase + 0, 0, 0x3f98003028ULL }, // Inst #2650 = MOVDQUrr_REV |
| 44507 | { 2649, 2, 1, 0, 198, 0, 0, 557, X86ImpOpBase + 0, 0, 0x3798003029ULL }, // Inst #2649 = MOVDQUrr |
| 44508 | { 2648, 6, 1, 0, 657, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x3798003019ULL }, // Inst #2648 = MOVDQUrm |
| 44509 | { 2647, 6, 0, 0, 646, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x3f98003018ULL }, // Inst #2647 = MOVDQUmr |
| 44510 | { 2646, 2, 1, 0, 198, 0, 0, 557, X86ImpOpBase + 0, 0, 0x3f98002828ULL }, // Inst #2646 = MOVDQArr_REV |
| 44511 | { 2645, 2, 1, 0, 1185, 0, 0, 557, X86ImpOpBase + 0, 0, 0x3798002829ULL }, // Inst #2645 = MOVDQArr |
| 44512 | { 2644, 6, 1, 0, 186, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x3798002819ULL }, // Inst #2644 = MOVDQArm |
| 44513 | { 2643, 6, 0, 0, 193, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x3f98002818ULL }, // Inst #2643 = MOVDQAmr |
| 44514 | { 2642, 6, 0, 0, 141, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7ce0030018ULL }, // Inst #2642 = MOVDIRI64_EVEX |
| 44515 | { 2641, 6, 0, 0, 1570, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c80024018ULL }, // Inst #2641 = MOVDIRI64 |
| 44516 | { 2640, 6, 0, 0, 141, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7ce0010018ULL }, // Inst #2640 = MOVDIRI32_EVEX |
| 44517 | { 2639, 6, 0, 0, 1569, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c80004018ULL }, // Inst #2639 = MOVDIRI32 |
| 44518 | { 2638, 6, 0, 0, 141, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60010e19ULL }, // Inst #2638 = MOVDIR64B64_EVEX |
| 44519 | { 2637, 6, 0, 0, 1568, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00004e19ULL }, // Inst #2637 = MOVDIR64B64 |
| 44520 | { 2636, 6, 0, 0, 141, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60010c19ULL }, // Inst #2636 = MOVDIR64B32_EVEX |
| 44521 | { 2635, 6, 0, 0, 1568, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00004c19ULL }, // Inst #2635 = MOVDIR64B32 |
| 44522 | { 2634, 6, 0, 0, 1568, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00004a19ULL }, // Inst #2634 = MOVDIR64B16 |
| 44523 | { 2633, 2, 1, 0, 197, 0, 0, 1034, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x3718002829ULL }, // Inst #2633 = MOVDI2SSrr |
| 44524 | { 2632, 2, 1, 0, 197, 0, 0, 1402, X86ImpOpBase + 0, 0, 0x3718002829ULL }, // Inst #2632 = MOVDI2PDIrr |
| 44525 | { 2631, 6, 1, 0, 770, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3718002819ULL }, // Inst #2631 = MOVDI2PDIrm |
| 44526 | { 2630, 2, 1, 0, 1417, 0, 0, 557, X86ImpOpBase + 0, 0, 0x910003829ULL }, // Inst #2630 = MOVDDUPrr |
| 44527 | { 2629, 6, 1, 0, 771, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x910003819ULL }, // Inst #2629 = MOVDDUPrm |
| 44528 | { 2628, 2, 1, 0, 1, 0, 0, 575, X86ImpOpBase + 0, 0, 0x3060030029ULL }, // Inst #2628 = MOVBE64rr_REV |
| 44529 | { 2627, 2, 1, 0, 1, 0, 0, 575, X86ImpOpBase + 0, 0, 0x30e0030028ULL }, // Inst #2627 = MOVBE64rr |
| 44530 | { 2626, 6, 1, 0, 850, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3060030019ULL }, // Inst #2626 = MOVBE64rm_EVEX |
| 44531 | { 2625, 6, 1, 0, 1567, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7800024019ULL }, // Inst #2625 = MOVBE64rm |
| 44532 | { 2624, 6, 0, 0, 855, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x30e0030018ULL }, // Inst #2624 = MOVBE64mr_EVEX |
| 44533 | { 2623, 6, 0, 0, 1007, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x7880024018ULL }, // Inst #2623 = MOVBE64mr |
| 44534 | { 2622, 2, 1, 0, 1, 0, 0, 573, X86ImpOpBase + 0, 0, 0x3060010029ULL }, // Inst #2622 = MOVBE32rr_REV |
| 44535 | { 2621, 2, 1, 0, 1, 0, 0, 573, X86ImpOpBase + 0, 0, 0x30e0010028ULL }, // Inst #2621 = MOVBE32rr |
| 44536 | { 2620, 6, 1, 0, 850, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3060010019ULL }, // Inst #2620 = MOVBE32rm_EVEX |
| 44537 | { 2619, 6, 1, 0, 1564, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7800004119ULL }, // Inst #2619 = MOVBE32rm |
| 44538 | { 2618, 6, 0, 0, 855, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x30e0010018ULL }, // Inst #2618 = MOVBE32mr_EVEX |
| 44539 | { 2617, 6, 0, 0, 1547, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x7880004118ULL }, // Inst #2617 = MOVBE32mr |
| 44540 | { 2616, 2, 1, 0, 1, 0, 0, 569, X86ImpOpBase + 0, 0, 0x3060010829ULL }, // Inst #2616 = MOVBE16rr_REV |
| 44541 | { 2615, 2, 1, 0, 1, 0, 0, 569, X86ImpOpBase + 0, 0, 0x30e0010828ULL }, // Inst #2615 = MOVBE16rr |
| 44542 | { 2614, 6, 1, 0, 850, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3060010819ULL }, // Inst #2614 = MOVBE16rm_EVEX |
| 44543 | { 2613, 6, 1, 0, 1006, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7800004099ULL }, // Inst #2613 = MOVBE16rm |
| 44544 | { 2612, 6, 0, 0, 905, 0, 0, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x30e0010818ULL }, // Inst #2612 = MOVBE16mr_EVEX |
| 44545 | { 2611, 6, 0, 0, 856, 0, 0, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x7880004098ULL }, // Inst #2611 = MOVBE16mr |
| 44546 | { 2610, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x1488002028ULL }, // Inst #2610 = MOVAPSrr_REV |
| 44547 | { 2609, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x1408002029ULL }, // Inst #2609 = MOVAPSrr |
| 44548 | { 2608, 6, 1, 0, 14, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1408002019ULL }, // Inst #2608 = MOVAPSrm |
| 44549 | { 2607, 6, 0, 0, 13, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x1488002018ULL }, // Inst #2607 = MOVAPSmr |
| 44550 | { 2606, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x1490002828ULL }, // Inst #2606 = MOVAPDrr_REV |
| 44551 | { 2605, 2, 1, 0, 221, 0, 0, 557, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x1410002829ULL }, // Inst #2605 = MOVAPDrr |
| 44552 | { 2604, 6, 1, 0, 14, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1410002819ULL }, // Inst #2604 = MOVAPDrm |
| 44553 | { 2603, 6, 0, 0, 13, 0, 0, 1396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x1490002818ULL }, // Inst #2603 = MOVAPDmr |
| 44554 | { 2602, 2, 1, 0, 1843, 0, 0, 947, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4500000029ULL }, // Inst #2602 = MOV8rr_REV |
| 44555 | { 2601, 2, 1, 0, 1845, 0, 0, 1394, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4400000028ULL }, // Inst #2601 = MOV8rr_NOREX |
| 44556 | { 2600, 2, 1, 0, 1843, 0, 0, 947, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4400000028ULL }, // Inst #2600 = MOV8rr |
| 44557 | { 2599, 6, 1, 0, 1448, 0, 0, 1388, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4500000019ULL }, // Inst #2599 = MOV8rm_NOREX |
| 44558 | { 2598, 6, 1, 0, 1444, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4500000019ULL }, // Inst #2598 = MOV8rm |
| 44559 | { 2597, 2, 1, 0, 1843, 0, 0, 939, X86ImpOpBase + 0, 0, 0x6300040030ULL }, // Inst #2597 = MOV8ri_alt |
| 44560 | { 2596, 2, 1, 0, 1843, 0, 0, 939, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5800040002ULL }, // Inst #2596 = MOV8ri |
| 44561 | { 2595, 2, 0, 0, 1553, 1, 0, 1338, X86ImpOpBase + 281, 0|(1ULL<<MCID::MayStore), 0x5100240603ULL }, // Inst #2595 = MOV8o64a |
| 44562 | { 2594, 2, 0, 0, 1553, 1, 0, 1338, X86ImpOpBase + 281, 0|(1ULL<<MCID::MayStore), 0x5100180403ULL }, // Inst #2594 = MOV8o32a |
| 44563 | { 2593, 2, 0, 0, 1553, 1, 0, 1338, X86ImpOpBase + 281, 0|(1ULL<<MCID::MayStore), 0x5100100203ULL }, // Inst #2593 = MOV8o16a |
| 44564 | { 2592, 6, 0, 0, 1563, 0, 0, 1382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4400000018ULL }, // Inst #2592 = MOV8mr_NOREX |
| 44565 | { 2591, 6, 0, 0, 1562, 0, 0, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4400000018ULL }, // Inst #2591 = MOV8mr |
| 44566 | { 2590, 6, 0, 0, 1562, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6300040020ULL }, // Inst #2590 = MOV8mi |
| 44567 | { 2589, 2, 0, 0, 1561, 0, 1, 1338, X86ImpOpBase + 281, 0|(1ULL<<MCID::MayLoad), 0x5000240603ULL }, // Inst #2589 = MOV8ao64 |
| 44568 | { 2588, 2, 0, 0, 1561, 0, 1, 1338, X86ImpOpBase + 281, 0|(1ULL<<MCID::MayLoad), 0x5000180403ULL }, // Inst #2588 = MOV8ao32 |
| 44569 | { 2587, 2, 0, 0, 1561, 0, 1, 1338, X86ImpOpBase + 281, 0|(1ULL<<MCID::MayLoad), 0x5000100203ULL }, // Inst #2587 = MOV8ao16 |
| 44570 | { 2586, 2, 1, 0, 197, 0, 0, 1036, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x3718022829ULL }, // Inst #2586 = MOV64toSDrr |
| 44571 | { 2585, 2, 1, 0, 197, 0, 0, 1380, X86ImpOpBase + 0, 0, 0x3718022829ULL }, // Inst #2585 = MOV64toPQIrr |
| 44572 | { 2584, 6, 1, 0, 770, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3718022819ULL }, // Inst #2584 = MOV64toPQIrm |
| 44573 | { 2583, 2, 1, 0, 756, 0, 0, 1378, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700020029ULL }, // Inst #2583 = MOV64sr |
| 44574 | { 2582, 2, 1, 0, 1548, 0, 0, 1376, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600020028ULL }, // Inst #2582 = MOV64rs |
| 44575 | { 2581, 2, 1, 0, 1453, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4580020029ULL }, // Inst #2581 = MOV64rr_REV |
| 44576 | { 2580, 2, 1, 0, 1453, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4480020028ULL }, // Inst #2580 = MOV64rr |
| 44577 | { 2579, 6, 1, 0, 72, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580020019ULL }, // Inst #2579 = MOV64rm |
| 44578 | { 2578, 2, 1, 0, 1010, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x6380220030ULL }, // Inst #2578 = MOV64ri32 |
| 44579 | { 2577, 2, 1, 0, 1843, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable), 0x5c00260002ULL }, // Inst #2577 = MOV64ri |
| 44580 | { 2576, 2, 1, 0, 1560, 0, 0, 1374, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1080002028ULL }, // Inst #2576 = MOV64rd |
| 44581 | { 2575, 2, 1, 0, 1559, 0, 0, 1372, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1000002028ULL }, // Inst #2575 = MOV64rc |
| 44582 | { 2574, 2, 0, 0, 1553, 1, 0, 1338, X86ImpOpBase + 123, 0|(1ULL<<MCID::MayStore), 0x5180260603ULL }, // Inst #2574 = MOV64o64a |
| 44583 | { 2573, 2, 0, 0, 1558, 1, 0, 1338, X86ImpOpBase + 123, 0|(1ULL<<MCID::MayStore), 0x51801a0403ULL }, // Inst #2573 = MOV64o32a |
| 44584 | { 2572, 6, 0, 0, 141, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4480020018ULL }, // Inst #2572 = MOV64mr |
| 44585 | { 2571, 6, 0, 0, 141, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6380220020ULL }, // Inst #2571 = MOV64mi32 |
| 44586 | { 2570, 2, 1, 0, 1557, 0, 0, 1370, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1180002029ULL }, // Inst #2570 = MOV64dr |
| 44587 | { 2569, 2, 1, 0, 8, 0, 0, 1368, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1100002029ULL }, // Inst #2569 = MOV64cr |
| 44588 | { 2568, 2, 0, 0, 1552, 0, 1, 1338, X86ImpOpBase + 123, 0|(1ULL<<MCID::MayLoad), 0x5080260603ULL }, // Inst #2568 = MOV64ao64 |
| 44589 | { 2567, 2, 0, 0, 1556, 0, 1, 1338, X86ImpOpBase + 123, 0|(1ULL<<MCID::MayLoad), 0x50801a0403ULL }, // Inst #2567 = MOV64ao32 |
| 44590 | { 2566, 2, 1, 0, 1496, 0, 0, 1366, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000129ULL }, // Inst #2566 = MOV32sr |
| 44591 | { 2565, 2, 1, 0, 1548, 0, 0, 1364, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000128ULL }, // Inst #2565 = MOV32rs |
| 44592 | { 2564, 2, 1, 0, 1048, 0, 0, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4580000129ULL }, // Inst #2564 = MOV32rr_REV |
| 44593 | { 2563, 2, 1, 0, 1048, 0, 0, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4480000128ULL }, // Inst #2563 = MOV32rr |
| 44594 | { 2562, 6, 1, 0, 72, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580000119ULL }, // Inst #2562 = MOV32rm |
| 44595 | { 2561, 2, 1, 0, 1844, 0, 0, 204, X86ImpOpBase + 0, 0, 0x6380180130ULL }, // Inst #2561 = MOV32ri_alt |
| 44596 | { 2560, 2, 1, 0, 1844, 0, 0, 204, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5c00180102ULL }, // Inst #2560 = MOV32ri |
| 44597 | { 2559, 2, 1, 0, 8, 0, 0, 1362, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1080002028ULL }, // Inst #2559 = MOV32rd |
| 44598 | { 2558, 2, 1, 0, 8, 0, 0, 1360, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1000002028ULL }, // Inst #2558 = MOV32rc |
| 44599 | { 2557, 2, 0, 0, 1553, 1, 0, 1338, X86ImpOpBase + 41, 0|(1ULL<<MCID::MayStore), 0x5180240703ULL }, // Inst #2557 = MOV32o64a |
| 44600 | { 2556, 2, 0, 0, 1553, 1, 0, 1338, X86ImpOpBase + 41, 0|(1ULL<<MCID::MayStore), 0x5180180503ULL }, // Inst #2556 = MOV32o32a |
| 44601 | { 2555, 2, 0, 0, 1553, 1, 0, 1338, X86ImpOpBase + 41, 0|(1ULL<<MCID::MayStore), 0x5180100303ULL }, // Inst #2555 = MOV32o16a |
| 44602 | { 2554, 6, 0, 0, 141, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4480000118ULL }, // Inst #2554 = MOV32mr |
| 44603 | { 2553, 6, 0, 0, 141, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x6380180120ULL }, // Inst #2553 = MOV32mi |
| 44604 | { 2552, 2, 1, 0, 8, 0, 0, 1358, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1180002029ULL }, // Inst #2552 = MOV32dr |
| 44605 | { 2551, 2, 1, 0, 8, 0, 0, 1356, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1100002029ULL }, // Inst #2551 = MOV32cr |
| 44606 | { 2550, 2, 0, 0, 1551, 0, 1, 1338, X86ImpOpBase + 41, 0|(1ULL<<MCID::MayLoad), 0x5080240703ULL }, // Inst #2550 = MOV32ao64 |
| 44607 | { 2549, 2, 0, 0, 1551, 0, 1, 1338, X86ImpOpBase + 41, 0|(1ULL<<MCID::MayLoad), 0x5080180503ULL }, // Inst #2549 = MOV32ao32 |
| 44608 | { 2548, 2, 0, 0, 1551, 0, 1, 1338, X86ImpOpBase + 41, 0|(1ULL<<MCID::MayLoad), 0x5080100303ULL }, // Inst #2548 = MOV32ao16 |
| 44609 | { 2547, 2, 1, 0, 1496, 0, 0, 1354, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x47000000a9ULL }, // Inst #2547 = MOV16sr |
| 44610 | { 2546, 6, 1, 0, 773, 0, 0, 1348, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000019ULL }, // Inst #2546 = MOV16sm |
| 44611 | { 2545, 2, 1, 0, 1548, 0, 0, 1346, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x46000000a8ULL }, // Inst #2545 = MOV16rs |
| 44612 | { 2544, 2, 1, 0, 1843, 0, 0, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x45800000a9ULL }, // Inst #2544 = MOV16rr_REV |
| 44613 | { 2543, 2, 1, 0, 1843, 0, 0, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x44800000a8ULL }, // Inst #2543 = MOV16rr |
| 44614 | { 2542, 6, 1, 0, 914, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580000099ULL }, // Inst #2542 = MOV16rm |
| 44615 | { 2541, 2, 1, 0, 1843, 0, 0, 597, X86ImpOpBase + 0, 0, 0x63801000b0ULL }, // Inst #2541 = MOV16ri_alt |
| 44616 | { 2540, 2, 1, 0, 1843, 0, 0, 597, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5c00100082ULL }, // Inst #2540 = MOV16ri |
| 44617 | { 2539, 2, 0, 0, 1487, 1, 0, 1338, X86ImpOpBase + 276, 0|(1ULL<<MCID::MayStore), 0x5180240683ULL }, // Inst #2539 = MOV16o64a |
| 44618 | { 2538, 2, 0, 0, 1487, 1, 0, 1338, X86ImpOpBase + 276, 0|(1ULL<<MCID::MayStore), 0x5180180483ULL }, // Inst #2538 = MOV16o32a |
| 44619 | { 2537, 2, 0, 0, 1487, 1, 0, 1338, X86ImpOpBase + 276, 0|(1ULL<<MCID::MayStore), 0x5180100283ULL }, // Inst #2537 = MOV16o16a |
| 44620 | { 2536, 6, 0, 0, 1546, 0, 0, 1340, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000018ULL }, // Inst #2536 = MOV16ms |
| 44621 | { 2535, 6, 0, 0, 141, 0, 0, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4480000098ULL }, // Inst #2535 = MOV16mr |
| 44622 | { 2534, 6, 0, 0, 141, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x63801000a0ULL }, // Inst #2534 = MOV16mi |
| 44623 | { 2533, 2, 0, 0, 1544, 0, 1, 1338, X86ImpOpBase + 276, 0|(1ULL<<MCID::MayLoad), 0x5080240683ULL }, // Inst #2533 = MOV16ao64 |
| 44624 | { 2532, 2, 0, 0, 1544, 0, 1, 1338, X86ImpOpBase + 276, 0|(1ULL<<MCID::MayLoad), 0x5080180483ULL }, // Inst #2532 = MOV16ao32 |
| 44625 | { 2531, 2, 0, 0, 1544, 0, 1, 1338, X86ImpOpBase + 276, 0|(1ULL<<MCID::MayLoad), 0x5080100283ULL }, // Inst #2531 = MOV16ao16 |
| 44626 | { 2530, 0, 0, 0, 8, 2, 3, 1, X86ImpOpBase + 354, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5304002040ULL }, // Inst #2530 = MONTMUL |
| 44627 | { 2529, 0, 0, 0, 8, 3, 0, 1, X86ImpOpBase + 351, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207aULL }, // Inst #2529 = MONITORX64rrr |
| 44628 | { 2528, 0, 0, 0, 8, 3, 0, 1, X86ImpOpBase + 348, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207aULL }, // Inst #2528 = MONITORX32rrr |
| 44629 | { 2527, 0, 0, 0, 708, 3, 0, 1, X86ImpOpBase + 351, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002048ULL }, // Inst #2527 = MONITOR64rrr |
| 44630 | { 2526, 0, 0, 0, 708, 3, 0, 1, X86ImpOpBase + 348, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002048ULL }, // Inst #2526 = MONITOR32rrr |
| 44631 | { 2525, 3, 1, 0, 1195, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7780002029ULL }, // Inst #2525 = MMX_PXORrr |
| 44632 | { 2524, 7, 1, 0, 204, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7780002019ULL }, // Inst #2524 = MMX_PXORrm |
| 44633 | { 2523, 3, 1, 0, 184, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3080002029ULL }, // Inst #2523 = MMX_PUNPCKLWDrr |
| 44634 | { 2522, 7, 1, 0, 202, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3080002019ULL }, // Inst #2522 = MMX_PUNPCKLWDrm |
| 44635 | { 2521, 3, 1, 0, 184, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3100002029ULL }, // Inst #2521 = MMX_PUNPCKLDQrr |
| 44636 | { 2520, 7, 1, 0, 202, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3100002019ULL }, // Inst #2520 = MMX_PUNPCKLDQrm |
| 44637 | { 2519, 3, 1, 0, 184, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3000002029ULL }, // Inst #2519 = MMX_PUNPCKLBWrr |
| 44638 | { 2518, 7, 1, 0, 202, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3000002019ULL }, // Inst #2518 = MMX_PUNPCKLBWrm |
| 44639 | { 2517, 3, 1, 0, 184, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3480002029ULL }, // Inst #2517 = MMX_PUNPCKHWDrr |
| 44640 | { 2516, 7, 1, 0, 202, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3480002019ULL }, // Inst #2516 = MMX_PUNPCKHWDrm |
| 44641 | { 2515, 3, 1, 0, 184, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3500002029ULL }, // Inst #2515 = MMX_PUNPCKHDQrr |
| 44642 | { 2514, 7, 1, 0, 202, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3500002019ULL }, // Inst #2514 = MMX_PUNPCKHDQrm |
| 44643 | { 2513, 3, 1, 0, 184, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3400002029ULL }, // Inst #2513 = MMX_PUNPCKHBWrr |
| 44644 | { 2512, 7, 1, 0, 202, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3400002019ULL }, // Inst #2512 = MMX_PUNPCKHBWrm |
| 44645 | { 2511, 3, 1, 0, 1197, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7c80002029ULL }, // Inst #2511 = MMX_PSUBWrr |
| 44646 | { 2510, 7, 1, 0, 1541, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7c80002019ULL }, // Inst #2510 = MMX_PSUBWrm |
| 44647 | { 2509, 3, 1, 0, 1204, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x6c80002029ULL }, // Inst #2509 = MMX_PSUBUSWrr |
| 44648 | { 2508, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6c80002019ULL }, // Inst #2508 = MMX_PSUBUSWrm |
| 44649 | { 2507, 3, 1, 0, 1204, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x6c00002029ULL }, // Inst #2507 = MMX_PSUBUSBrr |
| 44650 | { 2506, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6c00002019ULL }, // Inst #2506 = MMX_PSUBUSBrm |
| 44651 | { 2505, 3, 1, 0, 1204, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7480002029ULL }, // Inst #2505 = MMX_PSUBSWrr |
| 44652 | { 2504, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7480002019ULL }, // Inst #2504 = MMX_PSUBSWrm |
| 44653 | { 2503, 3, 1, 0, 1204, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7400002029ULL }, // Inst #2503 = MMX_PSUBSBrr |
| 44654 | { 2502, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7400002019ULL }, // Inst #2502 = MMX_PSUBSBrm |
| 44655 | { 2501, 3, 1, 0, 1198, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7d80002029ULL }, // Inst #2501 = MMX_PSUBQrr |
| 44656 | { 2500, 7, 1, 0, 656, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7d80002019ULL }, // Inst #2500 = MMX_PSUBQrm |
| 44657 | { 2499, 3, 1, 0, 1197, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7d00002029ULL }, // Inst #2499 = MMX_PSUBDrr |
| 44658 | { 2498, 7, 1, 0, 1541, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7d00002019ULL }, // Inst #2498 = MMX_PSUBDrm |
| 44659 | { 2497, 3, 1, 0, 1197, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7c00002029ULL }, // Inst #2497 = MMX_PSUBBrr |
| 44660 | { 2496, 7, 1, 0, 1541, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7c00002019ULL }, // Inst #2496 = MMX_PSUBBrm |
| 44661 | { 2495, 3, 1, 0, 220, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x6880002029ULL }, // Inst #2495 = MMX_PSRLWrr |
| 44662 | { 2494, 7, 1, 0, 219, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6880002019ULL }, // Inst #2494 = MMX_PSRLWrm |
| 44663 | { 2493, 3, 1, 0, 218, 0, 0, 1335, X86ImpOpBase + 0, 0, 0x3880042032ULL }, // Inst #2493 = MMX_PSRLWri |
| 44664 | { 2492, 3, 1, 0, 220, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x6980002029ULL }, // Inst #2492 = MMX_PSRLQrr |
| 44665 | { 2491, 7, 1, 0, 219, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6980002019ULL }, // Inst #2491 = MMX_PSRLQrm |
| 44666 | { 2490, 3, 1, 0, 218, 0, 0, 1335, X86ImpOpBase + 0, 0, 0x3980042032ULL }, // Inst #2490 = MMX_PSRLQri |
| 44667 | { 2489, 3, 1, 0, 220, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x6900002029ULL }, // Inst #2489 = MMX_PSRLDrr |
| 44668 | { 2488, 7, 1, 0, 219, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6900002019ULL }, // Inst #2488 = MMX_PSRLDrm |
| 44669 | { 2487, 3, 1, 0, 218, 0, 0, 1335, X86ImpOpBase + 0, 0, 0x3900042032ULL }, // Inst #2487 = MMX_PSRLDri |
| 44670 | { 2486, 3, 1, 0, 220, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7080002029ULL }, // Inst #2486 = MMX_PSRAWrr |
| 44671 | { 2485, 7, 1, 0, 219, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7080002019ULL }, // Inst #2485 = MMX_PSRAWrm |
| 44672 | { 2484, 3, 1, 0, 218, 0, 0, 1335, X86ImpOpBase + 0, 0, 0x3880042034ULL }, // Inst #2484 = MMX_PSRAWri |
| 44673 | { 2483, 3, 1, 0, 220, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7100002029ULL }, // Inst #2483 = MMX_PSRADrr |
| 44674 | { 2482, 7, 1, 0, 219, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7100002019ULL }, // Inst #2482 = MMX_PSRADrm |
| 44675 | { 2481, 3, 1, 0, 218, 0, 0, 1335, X86ImpOpBase + 0, 0, 0x3900042034ULL }, // Inst #2481 = MMX_PSRADri |
| 44676 | { 2480, 3, 1, 0, 220, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7880002029ULL }, // Inst #2480 = MMX_PSLLWrr |
| 44677 | { 2479, 7, 1, 0, 219, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7880002019ULL }, // Inst #2479 = MMX_PSLLWrm |
| 44678 | { 2478, 3, 1, 0, 218, 0, 0, 1335, X86ImpOpBase + 0, 0, 0x3880042036ULL }, // Inst #2478 = MMX_PSLLWri |
| 44679 | { 2477, 3, 1, 0, 220, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7980002029ULL }, // Inst #2477 = MMX_PSLLQrr |
| 44680 | { 2476, 7, 1, 0, 219, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7980002019ULL }, // Inst #2476 = MMX_PSLLQrm |
| 44681 | { 2475, 3, 1, 0, 218, 0, 0, 1335, X86ImpOpBase + 0, 0, 0x3980042036ULL }, // Inst #2475 = MMX_PSLLQri |
| 44682 | { 2474, 3, 1, 0, 220, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x7900002029ULL }, // Inst #2474 = MMX_PSLLDrr |
| 44683 | { 2473, 7, 1, 0, 219, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7900002019ULL }, // Inst #2473 = MMX_PSLLDrm |
| 44684 | { 2472, 3, 1, 0, 218, 0, 0, 1335, X86ImpOpBase + 0, 0, 0x3900042036ULL }, // Inst #2472 = MMX_PSLLDri |
| 44685 | { 2471, 3, 1, 0, 743, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x498004029ULL }, // Inst #2471 = MMX_PSIGNWrr |
| 44686 | { 2470, 7, 1, 0, 776, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x498004019ULL }, // Inst #2470 = MMX_PSIGNWrm |
| 44687 | { 2469, 3, 1, 0, 743, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x518004029ULL }, // Inst #2469 = MMX_PSIGNDrr |
| 44688 | { 2468, 7, 1, 0, 776, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x518004019ULL }, // Inst #2468 = MMX_PSIGNDrm |
| 44689 | { 2467, 3, 1, 0, 743, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x418004029ULL }, // Inst #2467 = MMX_PSIGNBrr |
| 44690 | { 2466, 7, 1, 0, 776, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x418004019ULL }, // Inst #2466 = MMX_PSIGNBrm |
| 44691 | { 2465, 3, 1, 0, 184, 0, 0, 1332, X86ImpOpBase + 0, 0, 0x3800042029ULL }, // Inst #2465 = MMX_PSHUFWri |
| 44692 | { 2464, 7, 1, 0, 217, 0, 0, 1325, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3800042019ULL }, // Inst #2464 = MMX_PSHUFWmi |
| 44693 | { 2463, 3, 1, 0, 216, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x18004029ULL }, // Inst #2463 = MMX_PSHUFBrr |
| 44694 | { 2462, 7, 1, 0, 215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x18004019ULL }, // Inst #2462 = MMX_PSHUFBrm |
| 44695 | { 2461, 3, 1, 0, 214, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7b00002029ULL }, // Inst #2461 = MMX_PSADBWrr |
| 44696 | { 2460, 7, 1, 0, 213, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7b00002019ULL }, // Inst #2460 = MMX_PSADBWrm |
| 44697 | { 2459, 3, 1, 0, 205, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7580002029ULL }, // Inst #2459 = MMX_PORrr |
| 44698 | { 2458, 7, 1, 0, 204, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7580002019ULL }, // Inst #2458 = MMX_PORrm |
| 44699 | { 2457, 3, 1, 0, 211, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7a00002029ULL }, // Inst #2457 = MMX_PMULUDQrr |
| 44700 | { 2456, 7, 1, 0, 210, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a00002019ULL }, // Inst #2456 = MMX_PMULUDQrm |
| 44701 | { 2455, 3, 1, 0, 211, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6a80002029ULL }, // Inst #2455 = MMX_PMULLWrr |
| 44702 | { 2454, 7, 1, 0, 210, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6a80002019ULL }, // Inst #2454 = MMX_PMULLWrm |
| 44703 | { 2453, 3, 1, 0, 211, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7280002029ULL }, // Inst #2453 = MMX_PMULHWrr |
| 44704 | { 2452, 7, 1, 0, 210, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7280002019ULL }, // Inst #2452 = MMX_PMULHWrm |
| 44705 | { 2451, 3, 1, 0, 211, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7200002029ULL }, // Inst #2451 = MMX_PMULHUWrr |
| 44706 | { 2450, 7, 1, 0, 210, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7200002019ULL }, // Inst #2450 = MMX_PMULHUWrm |
| 44707 | { 2449, 3, 1, 0, 211, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x598004029ULL }, // Inst #2449 = MMX_PMULHRSWrr |
| 44708 | { 2448, 7, 1, 0, 210, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x598004019ULL }, // Inst #2448 = MMX_PMULHRSWrm |
| 44709 | { 2447, 2, 1, 0, 212, 0, 0, 1286, X86ImpOpBase + 0, 0, 0x6b80002029ULL }, // Inst #2447 = MMX_PMOVMSKBrr |
| 44710 | { 2446, 3, 1, 0, 1206, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6d00002029ULL }, // Inst #2446 = MMX_PMINUBrr |
| 44711 | { 2445, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6d00002019ULL }, // Inst #2445 = MMX_PMINUBrm |
| 44712 | { 2444, 3, 1, 0, 1206, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7500002029ULL }, // Inst #2444 = MMX_PMINSWrr |
| 44713 | { 2443, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7500002019ULL }, // Inst #2443 = MMX_PMINSWrm |
| 44714 | { 2442, 3, 1, 0, 1206, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6f00002029ULL }, // Inst #2442 = MMX_PMAXUBrr |
| 44715 | { 2441, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6f00002019ULL }, // Inst #2441 = MMX_PMAXUBrm |
| 44716 | { 2440, 3, 1, 0, 1206, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7700002029ULL }, // Inst #2440 = MMX_PMAXSWrr |
| 44717 | { 2439, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7700002019ULL }, // Inst #2439 = MMX_PMAXSWrm |
| 44718 | { 2438, 3, 1, 0, 211, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7a80002029ULL }, // Inst #2438 = MMX_PMADDWDrr |
| 44719 | { 2437, 7, 1, 0, 210, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7a80002019ULL }, // Inst #2437 = MMX_PMADDWDrm |
| 44720 | { 2436, 3, 1, 0, 211, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x218004029ULL }, // Inst #2436 = MMX_PMADDUBSWrr |
| 44721 | { 2435, 7, 1, 0, 210, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x218004019ULL }, // Inst #2435 = MMX_PMADDUBSWrm |
| 44722 | { 2434, 4, 1, 0, 1540, 0, 0, 1321, X86ImpOpBase + 0, 0, 0x6200042029ULL }, // Inst #2434 = MMX_PINSRWrri |
| 44723 | { 2433, 8, 1, 0, 1542, 0, 0, 1306, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6200042019ULL }, // Inst #2433 = MMX_PINSRWrmi |
| 44724 | { 2432, 3, 1, 0, 667, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x298004029ULL }, // Inst #2432 = MMX_PHSUBWrr |
| 44725 | { 2431, 7, 1, 0, 676, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x298004019ULL }, // Inst #2431 = MMX_PHSUBWrm |
| 44726 | { 2430, 3, 1, 0, 1212, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x398004029ULL }, // Inst #2430 = MMX_PHSUBSWrr |
| 44727 | { 2429, 7, 1, 0, 1220, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x398004019ULL }, // Inst #2429 = MMX_PHSUBSWrm |
| 44728 | { 2428, 3, 1, 0, 207, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x318004029ULL }, // Inst #2428 = MMX_PHSUBDrr |
| 44729 | { 2427, 7, 1, 0, 206, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x318004019ULL }, // Inst #2427 = MMX_PHSUBDrm |
| 44730 | { 2426, 3, 1, 0, 667, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x98004029ULL }, // Inst #2426 = MMX_PHADDWrr |
| 44731 | { 2425, 7, 1, 0, 676, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x98004019ULL }, // Inst #2425 = MMX_PHADDWrm |
| 44732 | { 2424, 3, 1, 0, 1212, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x198004029ULL }, // Inst #2424 = MMX_PHADDSWrr |
| 44733 | { 2423, 7, 1, 0, 1220, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x198004019ULL }, // Inst #2423 = MMX_PHADDSWrm |
| 44734 | { 2422, 3, 1, 0, 207, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x118004029ULL }, // Inst #2422 = MMX_PHADDDrr |
| 44735 | { 2421, 7, 1, 0, 206, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x118004019ULL }, // Inst #2421 = MMX_PHADDDrm |
| 44736 | { 2420, 3, 1, 0, 1504, 0, 0, 1318, X86ImpOpBase + 0, 0, 0x6280042029ULL }, // Inst #2420 = MMX_PEXTRWrri |
| 44737 | { 2419, 3, 1, 0, 1207, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3280002029ULL }, // Inst #2419 = MMX_PCMPGTWrr |
| 44738 | { 2418, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3280002019ULL }, // Inst #2418 = MMX_PCMPGTWrm |
| 44739 | { 2417, 3, 1, 0, 1207, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3300002029ULL }, // Inst #2417 = MMX_PCMPGTDrr |
| 44740 | { 2416, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3300002019ULL }, // Inst #2416 = MMX_PCMPGTDrm |
| 44741 | { 2415, 3, 1, 0, 1207, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3200002029ULL }, // Inst #2415 = MMX_PCMPGTBrr |
| 44742 | { 2414, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3200002019ULL }, // Inst #2414 = MMX_PCMPGTBrm |
| 44743 | { 2413, 3, 1, 0, 1206, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3a80002029ULL }, // Inst #2413 = MMX_PCMPEQWrr |
| 44744 | { 2412, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3a80002019ULL }, // Inst #2412 = MMX_PCMPEQWrm |
| 44745 | { 2411, 3, 1, 0, 1206, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3b00002029ULL }, // Inst #2411 = MMX_PCMPEQDrr |
| 44746 | { 2410, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3b00002019ULL }, // Inst #2410 = MMX_PCMPEQDrm |
| 44747 | { 2409, 3, 1, 0, 1206, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3a00002029ULL }, // Inst #2409 = MMX_PCMPEQBrr |
| 44748 | { 2408, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3a00002019ULL }, // Inst #2408 = MMX_PCMPEQBrm |
| 44749 | { 2407, 3, 1, 0, 1035, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7180002029ULL }, // Inst #2407 = MMX_PAVGWrr |
| 44750 | { 2406, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7180002019ULL }, // Inst #2406 = MMX_PAVGWrm |
| 44751 | { 2405, 3, 1, 0, 1035, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7000002029ULL }, // Inst #2405 = MMX_PAVGBrr |
| 44752 | { 2404, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7000002019ULL }, // Inst #2404 = MMX_PAVGBrm |
| 44753 | { 2403, 3, 1, 0, 205, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6d80002029ULL }, // Inst #2403 = MMX_PANDrr |
| 44754 | { 2402, 7, 1, 0, 204, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6d80002019ULL }, // Inst #2402 = MMX_PANDrm |
| 44755 | { 2401, 3, 1, 0, 1195, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x6f80002029ULL }, // Inst #2401 = MMX_PANDNrr |
| 44756 | { 2400, 7, 1, 0, 204, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6f80002019ULL }, // Inst #2400 = MMX_PANDNrm |
| 44757 | { 2399, 4, 1, 0, 744, 0, 0, 1314, X86ImpOpBase + 0, 0, 0x798046029ULL }, // Inst #2399 = MMX_PALIGNRrri |
| 44758 | { 2398, 8, 1, 0, 775, 0, 0, 1306, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x798046019ULL }, // Inst #2398 = MMX_PALIGNRrmi |
| 44759 | { 2397, 3, 1, 0, 1505, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7e80002029ULL }, // Inst #2397 = MMX_PADDWrr |
| 44760 | { 2396, 7, 1, 0, 1541, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e80002019ULL }, // Inst #2396 = MMX_PADDWrm |
| 44761 | { 2395, 3, 1, 0, 1035, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6e80002029ULL }, // Inst #2395 = MMX_PADDUSWrr |
| 44762 | { 2394, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6e80002019ULL }, // Inst #2394 = MMX_PADDUSWrm |
| 44763 | { 2393, 3, 1, 0, 1035, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6e00002029ULL }, // Inst #2393 = MMX_PADDUSBrr |
| 44764 | { 2392, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6e00002019ULL }, // Inst #2392 = MMX_PADDUSBrm |
| 44765 | { 2391, 3, 1, 0, 1035, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7680002029ULL }, // Inst #2391 = MMX_PADDSWrr |
| 44766 | { 2390, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7680002019ULL }, // Inst #2390 = MMX_PADDSWrm |
| 44767 | { 2389, 3, 1, 0, 1035, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7600002029ULL }, // Inst #2389 = MMX_PADDSBrr |
| 44768 | { 2388, 7, 1, 0, 1215, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7600002019ULL }, // Inst #2388 = MMX_PADDSBrm |
| 44769 | { 2387, 3, 1, 0, 644, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6a00002029ULL }, // Inst #2387 = MMX_PADDQrr |
| 44770 | { 2386, 7, 1, 0, 656, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6a00002019ULL }, // Inst #2386 = MMX_PADDQrm |
| 44771 | { 2385, 3, 1, 0, 1505, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7f00002029ULL }, // Inst #2385 = MMX_PADDDrr |
| 44772 | { 2384, 7, 1, 0, 1541, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7f00002019ULL }, // Inst #2384 = MMX_PADDDrm |
| 44773 | { 2383, 3, 1, 0, 1505, 0, 0, 1303, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x7e00002029ULL }, // Inst #2383 = MMX_PADDBrr |
| 44774 | { 2382, 7, 1, 0, 1541, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7e00002019ULL }, // Inst #2382 = MMX_PADDBrm |
| 44775 | { 2381, 3, 1, 0, 865, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3380002029ULL }, // Inst #2381 = MMX_PACKUSWBrr |
| 44776 | { 2380, 7, 1, 0, 859, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3380002019ULL }, // Inst #2380 = MMX_PACKUSWBrm |
| 44777 | { 2379, 3, 1, 0, 1539, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3180002029ULL }, // Inst #2379 = MMX_PACKSSWBrr |
| 44778 | { 2378, 7, 1, 0, 1538, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3180002019ULL }, // Inst #2378 = MMX_PACKSSWBrm |
| 44779 | { 2377, 3, 1, 0, 1539, 0, 0, 1303, X86ImpOpBase + 0, 0, 0x3580002029ULL }, // Inst #2377 = MMX_PACKSSDWrr |
| 44780 | { 2376, 7, 1, 0, 1538, 0, 0, 1296, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3580002019ULL }, // Inst #2376 = MMX_PACKSSDWrm |
| 44781 | { 2375, 2, 1, 0, 743, 0, 0, 1276, X86ImpOpBase + 0, 0, 0xe98004029ULL }, // Inst #2375 = MMX_PABSWrr |
| 44782 | { 2374, 6, 1, 0, 774, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe98004019ULL }, // Inst #2374 = MMX_PABSWrm |
| 44783 | { 2373, 2, 1, 0, 743, 0, 0, 1276, X86ImpOpBase + 0, 0, 0xf18004029ULL }, // Inst #2373 = MMX_PABSDrr |
| 44784 | { 2372, 6, 1, 0, 774, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf18004019ULL }, // Inst #2372 = MMX_PABSDrm |
| 44785 | { 2371, 2, 1, 0, 743, 0, 0, 1276, X86ImpOpBase + 0, 0, 0xe18004029ULL }, // Inst #2371 = MMX_PABSBrr |
| 44786 | { 2370, 6, 1, 0, 774, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xe18004019ULL }, // Inst #2370 = MMX_PABSBrm |
| 44787 | { 2369, 2, 1, 0, 200, 0, 0, 1276, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Bitcast), 0x3f80002028ULL }, // Inst #2369 = MMX_MOVQ64rr_REV |
| 44788 | { 2368, 2, 1, 0, 200, 0, 0, 1276, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Bitcast), 0x3780002029ULL }, // Inst #2368 = MMX_MOVQ64rr |
| 44789 | { 2367, 6, 1, 0, 1535, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x3780002019ULL }, // Inst #2367 = MMX_MOVQ64rm |
| 44790 | { 2366, 6, 0, 0, 194, 0, 0, 1278, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x3f80002018ULL }, // Inst #2366 = MMX_MOVQ64mr |
| 44791 | { 2365, 2, 1, 0, 1030, 0, 0, 1294, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00043029ULL }, // Inst #2365 = MMX_MOVQ2FR64rr |
| 44792 | { 2364, 2, 1, 0, 1186, 0, 0, 1271, X86ImpOpBase + 0, 0, 0x6b00043029ULL }, // Inst #2364 = MMX_MOVQ2DQrr |
| 44793 | { 2363, 6, 0, 0, 199, 0, 0, 1278, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7380002018ULL }, // Inst #2363 = MMX_MOVNTQmr |
| 44794 | { 2362, 2, 1, 0, 1537, 0, 0, 1292, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00043829ULL }, // Inst #2362 = MMX_MOVFR642Qrr |
| 44795 | { 2361, 2, 1, 0, 749, 0, 0, 1269, X86ImpOpBase + 0, 0, 0x6b00043829ULL }, // Inst #2361 = MMX_MOVDQ2Qrr |
| 44796 | { 2360, 2, 1, 0, 1031, 0, 0, 1290, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x3700022029ULL }, // Inst #2360 = MMX_MOVD64to64rr |
| 44797 | { 2359, 6, 1, 0, 1536, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3700022019ULL }, // Inst #2359 = MMX_MOVD64to64rm |
| 44798 | { 2358, 2, 1, 0, 1031, 0, 0, 1288, X86ImpOpBase + 0, 0, 0x3700002029ULL }, // Inst #2358 = MMX_MOVD64rr |
| 44799 | { 2357, 6, 1, 0, 1535, 0, 0, 1263, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3700002019ULL }, // Inst #2357 = MMX_MOVD64rm |
| 44800 | { 2356, 6, 0, 0, 1534, 0, 0, 1278, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3f00002018ULL }, // Inst #2356 = MMX_MOVD64mr |
| 44801 | { 2355, 2, 1, 0, 195, 0, 0, 1286, X86ImpOpBase + 0, 0, 0x3f00002028ULL }, // Inst #2355 = MMX_MOVD64grr |
| 44802 | { 2354, 2, 1, 0, 195, 0, 0, 1284, X86ImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x3f00022028ULL }, // Inst #2354 = MMX_MOVD64from64rr |
| 44803 | { 2353, 6, 0, 0, 194, 0, 0, 1278, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x3f00022018ULL }, // Inst #2353 = MMX_MOVD64from64mr |
| 44804 | { 2352, 2, 0, 0, 940, 1, 0, 1276, X86ImpOpBase + 331, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80002029ULL }, // Inst #2352 = MMX_MASKMOVQ64 |
| 44805 | { 2351, 2, 0, 0, 940, 1, 0, 1276, X86ImpOpBase + 330, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80002029ULL }, // Inst #2351 = MMX_MASKMOVQ |
| 44806 | { 2350, 0, 0, 0, 146, 0, 16, 1, X86ImpOpBase + 332, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3b80002001ULL }, // Inst #2350 = MMX_EMMS |
| 44807 | { 2349, 2, 1, 0, 618, 1, 0, 1269, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1608002029ULL }, // Inst #2349 = MMX_CVTTPS2PIrr |
| 44808 | { 2348, 6, 1, 0, 623, 1, 0, 1263, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1608002019ULL }, // Inst #2348 = MMX_CVTTPS2PIrm |
| 44809 | { 2347, 2, 1, 0, 1182, 1, 0, 1269, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1610002829ULL }, // Inst #2347 = MMX_CVTTPD2PIrr |
| 44810 | { 2346, 6, 1, 0, 1037, 1, 0, 1263, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1610002819ULL }, // Inst #2346 = MMX_CVTTPD2PIrm |
| 44811 | { 2345, 2, 1, 0, 1668, 1, 0, 1269, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1688002029ULL }, // Inst #2345 = MMX_CVTPS2PIrr |
| 44812 | { 2344, 6, 1, 0, 623, 1, 0, 1263, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1688002019ULL }, // Inst #2344 = MMX_CVTPS2PIrm |
| 44813 | { 2343, 3, 1, 0, 616, 1, 0, 1273, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1508002029ULL }, // Inst #2343 = MMX_CVTPI2PSrr |
| 44814 | { 2342, 7, 1, 0, 617, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1508002019ULL }, // Inst #2342 = MMX_CVTPI2PSrm |
| 44815 | { 2341, 2, 1, 0, 975, 0, 0, 1271, X86ImpOpBase + 0, 0, 0x1510002829ULL }, // Inst #2341 = MMX_CVTPI2PDrr |
| 44816 | { 2340, 6, 1, 0, 1038, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1510002819ULL }, // Inst #2340 = MMX_CVTPI2PDrm |
| 44817 | { 2339, 2, 1, 0, 976, 1, 0, 1269, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1690002829ULL }, // Inst #2339 = MMX_CVTPD2PIrr |
| 44818 | { 2338, 6, 1, 0, 1037, 1, 0, 1263, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1690002819ULL }, // Inst #2338 = MMX_CVTPD2PIrm |
| 44819 | { 2337, 3, 1, 0, 1113, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e88003029ULL }, // Inst #2337 = MINSSrr_Int |
| 44820 | { 2336, 3, 1, 0, 83, 1, 0, 514, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e88003029ULL }, // Inst #2336 = MINSSrr |
| 44821 | { 2335, 7, 1, 0, 82, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e88003019ULL }, // Inst #2335 = MINSSrm_Int |
| 44822 | { 2334, 7, 1, 0, 82, 1, 0, 507, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e88003019ULL }, // Inst #2334 = MINSSrm |
| 44823 | { 2333, 3, 1, 0, 1112, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e90003829ULL }, // Inst #2333 = MINSDrr_Int |
| 44824 | { 2332, 3, 1, 0, 81, 1, 0, 504, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e90003829ULL }, // Inst #2332 = MINSDrr |
| 44825 | { 2331, 7, 1, 0, 80, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e90003819ULL }, // Inst #2331 = MINSDrm_Int |
| 44826 | { 2330, 7, 1, 0, 80, 1, 0, 497, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e90003819ULL }, // Inst #2330 = MINSDrm |
| 44827 | { 2329, 3, 1, 0, 79, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e88002029ULL }, // Inst #2329 = MINPSrr |
| 44828 | { 2328, 7, 1, 0, 78, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e88002019ULL }, // Inst #2328 = MINPSrm |
| 44829 | { 2327, 3, 1, 0, 77, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e90002829ULL }, // Inst #2327 = MINPDrr |
| 44830 | { 2326, 7, 1, 0, 76, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e90002819ULL }, // Inst #2326 = MINPDrm |
| 44831 | { 2325, 3, 1, 0, 83, 1, 0, 514, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2e88003029ULL }, // Inst #2325 = MINCSSrr |
| 44832 | { 2324, 7, 1, 0, 82, 1, 0, 507, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e88003019ULL }, // Inst #2324 = MINCSSrm |
| 44833 | { 2323, 3, 1, 0, 81, 1, 0, 504, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2e90003829ULL }, // Inst #2323 = MINCSDrr |
| 44834 | { 2322, 7, 1, 0, 80, 1, 0, 497, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e90003819ULL }, // Inst #2322 = MINCSDrm |
| 44835 | { 2321, 3, 1, 0, 79, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2e88002029ULL }, // Inst #2321 = MINCPSrr |
| 44836 | { 2320, 7, 1, 0, 78, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e88002019ULL }, // Inst #2320 = MINCPSrm |
| 44837 | { 2319, 3, 1, 0, 77, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2e90002829ULL }, // Inst #2319 = MINCPDrr |
| 44838 | { 2318, 7, 1, 0, 76, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e90002819ULL }, // Inst #2318 = MINCPDrm |
| 44839 | { 2317, 0, 0, 0, 1480, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000203eULL }, // Inst #2317 = MFENCE |
| 44840 | { 2316, 3, 1, 0, 1113, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f88003029ULL }, // Inst #2316 = MAXSSrr_Int |
| 44841 | { 2315, 3, 1, 0, 83, 1, 0, 514, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f88003029ULL }, // Inst #2315 = MAXSSrr |
| 44842 | { 2314, 7, 1, 0, 82, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f88003019ULL }, // Inst #2314 = MAXSSrm_Int |
| 44843 | { 2313, 7, 1, 0, 82, 1, 0, 507, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f88003019ULL }, // Inst #2313 = MAXSSrm |
| 44844 | { 2312, 3, 1, 0, 1112, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f90003829ULL }, // Inst #2312 = MAXSDrr_Int |
| 44845 | { 2311, 3, 1, 0, 81, 1, 0, 504, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f90003829ULL }, // Inst #2311 = MAXSDrr |
| 44846 | { 2310, 7, 1, 0, 80, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f90003819ULL }, // Inst #2310 = MAXSDrm_Int |
| 44847 | { 2309, 7, 1, 0, 80, 1, 0, 497, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f90003819ULL }, // Inst #2309 = MAXSDrm |
| 44848 | { 2308, 3, 1, 0, 79, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f88002029ULL }, // Inst #2308 = MAXPSrr |
| 44849 | { 2307, 7, 1, 0, 78, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f88002019ULL }, // Inst #2307 = MAXPSrm |
| 44850 | { 2306, 3, 1, 0, 77, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f90002829ULL }, // Inst #2306 = MAXPDrr |
| 44851 | { 2305, 7, 1, 0, 76, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f90002819ULL }, // Inst #2305 = MAXPDrm |
| 44852 | { 2304, 3, 1, 0, 83, 1, 0, 514, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2f88003029ULL }, // Inst #2304 = MAXCSSrr |
| 44853 | { 2303, 7, 1, 0, 82, 1, 0, 507, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f88003019ULL }, // Inst #2303 = MAXCSSrm |
| 44854 | { 2302, 3, 1, 0, 81, 1, 0, 504, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2f90003829ULL }, // Inst #2302 = MAXCSDrr |
| 44855 | { 2301, 7, 1, 0, 80, 1, 0, 497, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f90003819ULL }, // Inst #2301 = MAXCSDrm |
| 44856 | { 2300, 3, 1, 0, 79, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2f88002029ULL }, // Inst #2300 = MAXCPSrr |
| 44857 | { 2299, 7, 1, 0, 78, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f88002019ULL }, // Inst #2299 = MAXCPSrm |
| 44858 | { 2298, 3, 1, 0, 77, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2f90002829ULL }, // Inst #2298 = MAXCPDrr |
| 44859 | { 2297, 7, 1, 0, 76, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f90002819ULL }, // Inst #2297 = MAXCPDrm |
| 44860 | { 2296, 6, 0, 0, 13, 0, 0, 1257, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2296 = MASKPAIR16STORE |
| 44861 | { 2295, 6, 1, 0, 14, 0, 0, 1251, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2295 = MASKPAIR16LOAD |
| 44862 | { 2294, 2, 0, 0, 941, 1, 0, 557, X86ImpOpBase + 331, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b98002829ULL }, // Inst #2294 = MASKMOVDQU64 |
| 44863 | { 2293, 2, 0, 0, 941, 1, 0, 557, X86ImpOpBase + 330, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b98002829ULL }, // Inst #2293 = MASKMOVDQU |
| 44864 | { 2292, 2, 1, 0, 192, 0, 0, 575, X86ImpOpBase + 0, 0, 0x10007ae0030029ULL }, // Inst #2292 = LZCNT64rr_NF |
| 44865 | { 2291, 2, 1, 0, 192, 0, 1, 575, X86ImpOpBase + 0, 0, 0xc007ae0030029ULL }, // Inst #2291 = LZCNT64rr_EVEX |
| 44866 | { 2290, 2, 1, 0, 192, 0, 1, 575, X86ImpOpBase + 0, 0, 0x5e80023029ULL }, // Inst #2290 = LZCNT64rr |
| 44867 | { 2289, 6, 1, 0, 191, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10007ae0030019ULL }, // Inst #2289 = LZCNT64rm_NF |
| 44868 | { 2288, 6, 1, 0, 191, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc007ae0030019ULL }, // Inst #2288 = LZCNT64rm_EVEX |
| 44869 | { 2287, 6, 1, 0, 191, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e80023019ULL }, // Inst #2287 = LZCNT64rm |
| 44870 | { 2286, 2, 1, 0, 192, 0, 0, 573, X86ImpOpBase + 0, 0, 0x10007ae0010029ULL }, // Inst #2286 = LZCNT32rr_NF |
| 44871 | { 2285, 2, 1, 0, 192, 0, 1, 573, X86ImpOpBase + 0, 0, 0xc007ae0010029ULL }, // Inst #2285 = LZCNT32rr_EVEX |
| 44872 | { 2284, 2, 1, 0, 192, 0, 1, 573, X86ImpOpBase + 0, 0, 0x5e80003129ULL }, // Inst #2284 = LZCNT32rr |
| 44873 | { 2283, 6, 1, 0, 191, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10007ae0010019ULL }, // Inst #2283 = LZCNT32rm_NF |
| 44874 | { 2282, 6, 1, 0, 191, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc007ae0010019ULL }, // Inst #2282 = LZCNT32rm_EVEX |
| 44875 | { 2281, 6, 1, 0, 191, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e80003119ULL }, // Inst #2281 = LZCNT32rm |
| 44876 | { 2280, 2, 1, 0, 192, 0, 0, 569, X86ImpOpBase + 0, 0, 0x10007ae0010829ULL }, // Inst #2280 = LZCNT16rr_NF |
| 44877 | { 2279, 2, 1, 0, 192, 0, 1, 569, X86ImpOpBase + 0, 0, 0xc007ae0010829ULL }, // Inst #2279 = LZCNT16rr_EVEX |
| 44878 | { 2278, 2, 1, 0, 1020, 0, 1, 569, X86ImpOpBase + 0, 0, 0x5e800030a9ULL }, // Inst #2278 = LZCNT16rr |
| 44879 | { 2277, 6, 1, 0, 191, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10007ae0010819ULL }, // Inst #2277 = LZCNT16rm_NF |
| 44880 | { 2276, 6, 1, 0, 191, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc007ae0010819ULL }, // Inst #2276 = LZCNT16rm_EVEX |
| 44881 | { 2275, 6, 1, 0, 191, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e80003099ULL }, // Inst #2275 = LZCNT16rm |
| 44882 | { 2274, 7, 1, 0, 1156, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6002002019ULL }, // Inst #2274 = LXADD8 |
| 44883 | { 2273, 7, 1, 0, 1156, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082022019ULL }, // Inst #2273 = LXADD64 |
| 44884 | { 2272, 7, 1, 0, 1156, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082002119ULL }, // Inst #2272 = LXADD32 |
| 44885 | { 2271, 7, 1, 0, 1156, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082002099ULL }, // Inst #2271 = LXADD16 |
| 44886 | { 2270, 3, 0, 0, 8, 0, 0, 1248, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x89401ac031ULL }, // Inst #2270 = LWPVAL64rri |
| 44887 | { 2269, 7, 0, 0, 8, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x89401ac021ULL }, // Inst #2269 = LWPVAL64rmi |
| 44888 | { 2268, 3, 0, 0, 8, 0, 0, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x894018c031ULL }, // Inst #2268 = LWPVAL32rri |
| 44889 | { 2267, 7, 0, 0, 8, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x894018c021ULL }, // Inst #2267 = LWPVAL32rmi |
| 44890 | { 2266, 3, 0, 0, 8, 0, 1, 1248, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x89401ac030ULL }, // Inst #2266 = LWPINS64rri |
| 44891 | { 2265, 7, 0, 0, 8, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x89401ac020ULL }, // Inst #2265 = LWPINS64rmi |
| 44892 | { 2264, 3, 0, 0, 8, 0, 1, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x894018c030ULL }, // Inst #2264 = LWPINS32rri |
| 44893 | { 2263, 7, 0, 0, 8, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x894018c020ULL }, // Inst #2263 = LWPINS32rmi |
| 44894 | { 2262, 1, 0, 0, 8, 0, 0, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2033ULL }, // Inst #2262 = LTRr |
| 44895 | { 2261, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2023ULL }, // Inst #2261 = LTRm |
| 44896 | { 2260, 6, 1, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900022019ULL }, // Inst #2260 = LSS64rm |
| 44897 | { 2259, 6, 1, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900002119ULL }, // Inst #2259 = LSS32rm |
| 44898 | { 2258, 6, 1, 0, 8, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900002099ULL }, // Inst #2258 = LSS16rm |
| 44899 | { 2257, 2, 1, 0, 1155, 0, 1, 1217, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x180022029ULL }, // Inst #2257 = LSL64rr |
| 44900 | { 2256, 6, 1, 0, 869, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x180022019ULL }, // Inst #2256 = LSL64rm |
| 44901 | { 2255, 2, 1, 0, 1155, 0, 1, 1215, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x180002129ULL }, // Inst #2255 = LSL32rr |
| 44902 | { 2254, 6, 1, 0, 869, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x180002119ULL }, // Inst #2254 = LSL32rm |
| 44903 | { 2253, 2, 1, 0, 1155, 0, 1, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1800020a9ULL }, // Inst #2253 = LSL16rr |
| 44904 | { 2252, 6, 1, 0, 869, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x180002099ULL }, // Inst #2252 = LSL16rm |
| 44905 | { 2251, 1, 0, 0, 820, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501d20001ULL }, // Inst #2251 = LRETI64 |
| 44906 | { 2250, 1, 0, 0, 820, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501d00101ULL }, // Inst #2250 = LRETI32 |
| 44907 | { 2249, 1, 0, 0, 820, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501d00081ULL }, // Inst #2249 = LRETI16 |
| 44908 | { 2248, 0, 0, 0, 907, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c20001ULL }, // Inst #2248 = LRET64 |
| 44909 | { 2247, 0, 0, 0, 929, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c00101ULL }, // Inst #2247 = LRET32 |
| 44910 | { 2246, 0, 0, 0, 929, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c00081ULL }, // Inst #2246 = LRET16 |
| 44911 | { 2245, 1, 0, 0, 692, 0, 0, 600, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7000080001ULL }, // Inst #2245 = LOOPNE |
| 44912 | { 2244, 1, 0, 0, 678, 0, 0, 600, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7080080001ULL }, // Inst #2244 = LOOPE |
| 44913 | { 2243, 1, 0, 0, 696, 0, 0, 600, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7100080001ULL }, // Inst #2243 = LOOP |
| 44914 | { 2242, 2, 0, 0, 640, 2, 2, 1246, X86ImpOpBase + 326, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680000084ULL }, // Inst #2242 = LODSW |
| 44915 | { 2241, 2, 0, 0, 777, 2, 2, 1246, X86ImpOpBase + 322, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680020004ULL }, // Inst #2241 = LODSQ |
| 44916 | { 2240, 2, 0, 0, 777, 2, 2, 1246, X86ImpOpBase + 318, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680000104ULL }, // Inst #2240 = LODSL |
| 44917 | { 2239, 2, 0, 0, 640, 2, 2, 1246, X86ImpOpBase + 314, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5600000004ULL }, // Inst #2239 = LODSB |
| 44918 | { 2238, 6, 0, 0, 24, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1802000018ULL }, // Inst #2238 = LOCK_XOR8mr |
| 44919 | { 2237, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4002040026ULL }, // Inst #2237 = LOCK_XOR8mi |
| 44920 | { 2236, 6, 0, 0, 24, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1882020018ULL }, // Inst #2236 = LOCK_XOR64mr |
| 44921 | { 2235, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182060026ULL }, // Inst #2235 = LOCK_XOR64mi8 |
| 44922 | { 2234, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082220026ULL }, // Inst #2234 = LOCK_XOR64mi32 |
| 44923 | { 2233, 6, 0, 0, 24, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1882000118ULL }, // Inst #2233 = LOCK_XOR32mr |
| 44924 | { 2232, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182040126ULL }, // Inst #2232 = LOCK_XOR32mi8 |
| 44925 | { 2231, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082180126ULL }, // Inst #2231 = LOCK_XOR32mi |
| 44926 | { 2230, 6, 0, 0, 24, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1882000098ULL }, // Inst #2230 = LOCK_XOR16mr |
| 44927 | { 2229, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41820400a6ULL }, // Inst #2229 = LOCK_XOR16mi8 |
| 44928 | { 2228, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40821000a6ULL }, // Inst #2228 = LOCK_XOR16mi |
| 44929 | { 2227, 6, 0, 0, 24, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1402000018ULL }, // Inst #2227 = LOCK_SUB8mr |
| 44930 | { 2226, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4002040025ULL }, // Inst #2226 = LOCK_SUB8mi |
| 44931 | { 2225, 6, 0, 0, 24, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1482020018ULL }, // Inst #2225 = LOCK_SUB64mr |
| 44932 | { 2224, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182060025ULL }, // Inst #2224 = LOCK_SUB64mi8 |
| 44933 | { 2223, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082220025ULL }, // Inst #2223 = LOCK_SUB64mi32 |
| 44934 | { 2222, 6, 0, 0, 24, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1482000118ULL }, // Inst #2222 = LOCK_SUB32mr |
| 44935 | { 2221, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182040125ULL }, // Inst #2221 = LOCK_SUB32mi8 |
| 44936 | { 2220, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082180125ULL }, // Inst #2220 = LOCK_SUB32mi |
| 44937 | { 2219, 6, 0, 0, 24, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1482000098ULL }, // Inst #2219 = LOCK_SUB16mr |
| 44938 | { 2218, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41820400a5ULL }, // Inst #2218 = LOCK_SUB16mi8 |
| 44939 | { 2217, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40821000a5ULL }, // Inst #2217 = LOCK_SUB16mi |
| 44940 | { 2216, 0, 0, 0, 17, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x780000000aULL }, // Inst #2216 = LOCK_PREFIX |
| 44941 | { 2215, 6, 0, 0, 24, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x402000018ULL }, // Inst #2215 = LOCK_OR8mr |
| 44942 | { 2214, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4002040021ULL }, // Inst #2214 = LOCK_OR8mi |
| 44943 | { 2213, 6, 0, 0, 24, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x482020018ULL }, // Inst #2213 = LOCK_OR64mr |
| 44944 | { 2212, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182060021ULL }, // Inst #2212 = LOCK_OR64mi8 |
| 44945 | { 2211, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082220021ULL }, // Inst #2211 = LOCK_OR64mi32 |
| 44946 | { 2210, 6, 0, 0, 24, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x482000118ULL }, // Inst #2210 = LOCK_OR32mr |
| 44947 | { 2209, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182040121ULL }, // Inst #2209 = LOCK_OR32mi8 |
| 44948 | { 2208, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082180121ULL }, // Inst #2208 = LOCK_OR32mi |
| 44949 | { 2207, 6, 0, 0, 24, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x482000098ULL }, // Inst #2207 = LOCK_OR16mr |
| 44950 | { 2206, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41820400a1ULL }, // Inst #2206 = LOCK_OR16mi8 |
| 44951 | { 2205, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40821000a1ULL }, // Inst #2205 = LOCK_OR16mi |
| 44952 | { 2204, 5, 0, 0, 24, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f02000020ULL }, // Inst #2204 = LOCK_INC8m |
| 44953 | { 2203, 5, 0, 0, 24, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f82020020ULL }, // Inst #2203 = LOCK_INC64m |
| 44954 | { 2202, 5, 0, 0, 24, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f82000120ULL }, // Inst #2202 = LOCK_INC32m |
| 44955 | { 2201, 5, 0, 0, 24, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f820000a0ULL }, // Inst #2201 = LOCK_INC16m |
| 44956 | { 2200, 5, 0, 0, 24, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f02000021ULL }, // Inst #2200 = LOCK_DEC8m |
| 44957 | { 2199, 5, 0, 0, 24, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f82020021ULL }, // Inst #2199 = LOCK_DEC64m |
| 44958 | { 2198, 5, 0, 0, 24, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f82000121ULL }, // Inst #2198 = LOCK_DEC32m |
| 44959 | { 2197, 5, 0, 0, 24, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f820000a1ULL }, // Inst #2197 = LOCK_DEC16m |
| 44960 | { 2196, 6, 0, 0, 65, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5582022018ULL }, // Inst #2196 = LOCK_BTS_RM64rm |
| 44961 | { 2195, 6, 0, 0, 65, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5582002118ULL }, // Inst #2195 = LOCK_BTS_RM32rm |
| 44962 | { 2194, 6, 0, 0, 65, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5582002098ULL }, // Inst #2194 = LOCK_BTS_RM16rm |
| 44963 | { 2193, 6, 0, 0, 65, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02062025ULL }, // Inst #2193 = LOCK_BTS64m |
| 44964 | { 2192, 6, 0, 0, 65, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02042125ULL }, // Inst #2192 = LOCK_BTS32m |
| 44965 | { 2191, 6, 0, 0, 65, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d020420a5ULL }, // Inst #2191 = LOCK_BTS16m |
| 44966 | { 2190, 6, 0, 0, 65, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5982022018ULL }, // Inst #2190 = LOCK_BTR_RM64rm |
| 44967 | { 2189, 6, 0, 0, 65, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5982002118ULL }, // Inst #2189 = LOCK_BTR_RM32rm |
| 44968 | { 2188, 6, 0, 0, 65, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5982002098ULL }, // Inst #2188 = LOCK_BTR_RM16rm |
| 44969 | { 2187, 6, 0, 0, 65, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02062026ULL }, // Inst #2187 = LOCK_BTR64m |
| 44970 | { 2186, 6, 0, 0, 65, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02042126ULL }, // Inst #2186 = LOCK_BTR32m |
| 44971 | { 2185, 6, 0, 0, 65, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d020420a6ULL }, // Inst #2185 = LOCK_BTR16m |
| 44972 | { 2184, 6, 0, 0, 65, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d82022018ULL }, // Inst #2184 = LOCK_BTC_RM64rm |
| 44973 | { 2183, 6, 0, 0, 65, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d82002118ULL }, // Inst #2183 = LOCK_BTC_RM32rm |
| 44974 | { 2182, 6, 0, 0, 65, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d82002098ULL }, // Inst #2182 = LOCK_BTC_RM16rm |
| 44975 | { 2181, 6, 0, 0, 65, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02062027ULL }, // Inst #2181 = LOCK_BTC64m |
| 44976 | { 2180, 6, 0, 0, 65, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02042127ULL }, // Inst #2180 = LOCK_BTC32m |
| 44977 | { 2179, 6, 0, 0, 65, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d020420a7ULL }, // Inst #2179 = LOCK_BTC16m |
| 44978 | { 2178, 6, 0, 0, 24, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1002000018ULL }, // Inst #2178 = LOCK_AND8mr |
| 44979 | { 2177, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4002040024ULL }, // Inst #2177 = LOCK_AND8mi |
| 44980 | { 2176, 6, 0, 0, 24, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1082020018ULL }, // Inst #2176 = LOCK_AND64mr |
| 44981 | { 2175, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182060024ULL }, // Inst #2175 = LOCK_AND64mi8 |
| 44982 | { 2174, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082220024ULL }, // Inst #2174 = LOCK_AND64mi32 |
| 44983 | { 2173, 6, 0, 0, 24, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1082000118ULL }, // Inst #2173 = LOCK_AND32mr |
| 44984 | { 2172, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182040124ULL }, // Inst #2172 = LOCK_AND32mi8 |
| 44985 | { 2171, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082180124ULL }, // Inst #2171 = LOCK_AND32mi |
| 44986 | { 2170, 6, 0, 0, 24, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1082000098ULL }, // Inst #2170 = LOCK_AND16mr |
| 44987 | { 2169, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41820400a4ULL }, // Inst #2169 = LOCK_AND16mi8 |
| 44988 | { 2168, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40821000a4ULL }, // Inst #2168 = LOCK_AND16mi |
| 44989 | { 2167, 6, 0, 0, 24, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2000018ULL }, // Inst #2167 = LOCK_ADD8mr |
| 44990 | { 2166, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4002040020ULL }, // Inst #2166 = LOCK_ADD8mi |
| 44991 | { 2165, 6, 0, 0, 24, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x82020018ULL }, // Inst #2165 = LOCK_ADD64mr |
| 44992 | { 2164, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182060020ULL }, // Inst #2164 = LOCK_ADD64mi8 |
| 44993 | { 2163, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082220020ULL }, // Inst #2163 = LOCK_ADD64mi32 |
| 44994 | { 2162, 6, 0, 0, 24, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x82000118ULL }, // Inst #2162 = LOCK_ADD32mr |
| 44995 | { 2161, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182040120ULL }, // Inst #2161 = LOCK_ADD32mi8 |
| 44996 | { 2160, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082180120ULL }, // Inst #2160 = LOCK_ADD32mi |
| 44997 | { 2159, 6, 0, 0, 24, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x82000098ULL }, // Inst #2159 = LOCK_ADD16mr |
| 44998 | { 2158, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41820400a0ULL }, // Inst #2158 = LOCK_ADD16mi8 |
| 44999 | { 2157, 6, 0, 0, 24, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40821000a0ULL }, // Inst #2157 = LOCK_ADD16mi |
| 45000 | { 2156, 2, 0, 0, 8, 2, 1, 557, X86ImpOpBase + 311, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00005029ULL }, // Inst #2156 = LOADIWKEY |
| 45001 | { 2155, 1, 0, 0, 1533, 0, 0, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002036ULL }, // Inst #2155 = LMSW16r |
| 45002 | { 2154, 5, 0, 0, 1532, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80002026ULL }, // Inst #2154 = LMSW16m |
| 45003 | { 2153, 1, 0, 0, 8, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x94002a030ULL }, // Inst #2153 = LLWPCB64 |
| 45004 | { 2152, 1, 0, 0, 8, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x94000a030ULL }, // Inst #2152 = LLWPCB |
| 45005 | { 2151, 1, 0, 0, 1531, 0, 0, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2032ULL }, // Inst #2151 = LLDT16r |
| 45006 | { 2150, 5, 0, 0, 1530, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2022ULL }, // Inst #2150 = LLDT16m |
| 45007 | { 2149, 1, 0, 0, 8, 0, 0, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3836ULL }, // Inst #2149 = LKGS16r |
| 45008 | { 2148, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3826ULL }, // Inst #2148 = LKGS16m |
| 45009 | { 2147, 5, 0, 0, 1529, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002023ULL }, // Inst #2147 = LIDT64m |
| 45010 | { 2146, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002123ULL }, // Inst #2146 = LIDT32m |
| 45011 | { 2145, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800020a3ULL }, // Inst #2145 = LIDT16m |
| 45012 | { 2144, 6, 1, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80022019ULL }, // Inst #2144 = LGS64rm |
| 45013 | { 2143, 6, 1, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80002119ULL }, // Inst #2143 = LGS32rm |
| 45014 | { 2142, 6, 1, 0, 8, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80002099ULL }, // Inst #2142 = LGS16rm |
| 45015 | { 2141, 5, 0, 0, 1528, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002022ULL }, // Inst #2141 = LGDT64m |
| 45016 | { 2140, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002122ULL }, // Inst #2140 = LGDT32m |
| 45017 | { 2139, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800020a2ULL }, // Inst #2139 = LGDT16m |
| 45018 | { 2138, 6, 1, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00022019ULL }, // Inst #2138 = LFS64rm |
| 45019 | { 2137, 6, 1, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00002119ULL }, // Inst #2137 = LFS32rm |
| 45020 | { 2136, 6, 1, 0, 8, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00002099ULL }, // Inst #2136 = LFS16rm |
| 45021 | { 2135, 0, 0, 0, 635, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000203dULL }, // Inst #2135 = LFENCE |
| 45022 | { 2134, 6, 1, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6200000119ULL }, // Inst #2134 = LES32rm |
| 45023 | { 2133, 6, 1, 0, 8, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6200000099ULL }, // Inst #2133 = LES16rm |
| 45024 | { 2132, 0, 0, 0, 637, 2, 2, 1, X86ImpOpBase + 307, 0|(1ULL<<MCID::MayLoad), 0x6480000001ULL }, // Inst #2132 = LEAVE64 |
| 45025 | { 2131, 0, 0, 0, 1527, 2, 2, 1, X86ImpOpBase + 303, 0|(1ULL<<MCID::MayLoad), 0x6480000001ULL }, // Inst #2131 = LEAVE |
| 45026 | { 2130, 6, 1, 0, 1013, 0, 0, 1240, X86ImpOpBase + 0, 0|(1ULL<<MCID::Rematerializable), 0x4680020019ULL }, // Inst #2130 = LEA64r |
| 45027 | { 2129, 6, 1, 0, 9, 0, 0, 1234, X86ImpOpBase + 0, 0, 0x4680000099ULL }, // Inst #2129 = LEA64_8r |
| 45028 | { 2128, 6, 1, 0, 1013, 0, 0, 1228, X86ImpOpBase + 0, 0, 0x4680000119ULL }, // Inst #2128 = LEA64_32r |
| 45029 | { 2127, 6, 1, 0, 9, 0, 0, 1222, X86ImpOpBase + 0, 0, 0x4680000099ULL }, // Inst #2127 = LEA64_16r |
| 45030 | { 2126, 6, 1, 0, 1013, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::Rematerializable), 0x4680000119ULL }, // Inst #2126 = LEA32r |
| 45031 | { 2125, 6, 1, 0, 1014, 0, 0, 589, X86ImpOpBase + 0, 0, 0x4680000099ULL }, // Inst #2125 = LEA16r |
| 45032 | { 2124, 1, 0, 0, 603, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000030ULL }, // Inst #2124 = LD_Frr |
| 45033 | { 2123, 6, 1, 0, 72, 1, 1, 1096, X86ImpOpBase + 79, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2123 = LD_Fp80m |
| 45034 | { 2122, 6, 1, 0, 72, 1, 1, 1096, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2122 = LD_Fp64m80 |
| 45035 | { 2121, 6, 1, 0, 72, 1, 1, 1090, X86ImpOpBase + 79, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2121 = LD_Fp64m |
| 45036 | { 2120, 6, 1, 0, 72, 1, 1, 1096, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2120 = LD_Fp32m80 |
| 45037 | { 2119, 6, 1, 0, 72, 1, 1, 1090, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2119 = LD_Fp32m64 |
| 45038 | { 2118, 6, 1, 0, 72, 1, 1, 1084, X86ImpOpBase + 79, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2118 = LD_Fp32m |
| 45039 | { 2117, 1, 1, 0, 2, 1, 1, 1221, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2117 = LD_Fp180 |
| 45040 | { 2116, 1, 1, 0, 2, 1, 1, 1220, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2116 = LD_Fp164 |
| 45041 | { 2115, 1, 1, 0, 2, 1, 1, 1219, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2115 = LD_Fp132 |
| 45042 | { 2114, 1, 1, 0, 2, 1, 1, 1221, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2114 = LD_Fp080 |
| 45043 | { 2113, 1, 1, 0, 2, 1, 1, 1220, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2113 = LD_Fp064 |
| 45044 | { 2112, 1, 1, 0, 2, 1, 1, 1219, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2112 = LD_Fp032 |
| 45045 | { 2111, 5, 0, 0, 662, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000025ULL }, // Inst #2111 = LD_F80m |
| 45046 | { 2110, 5, 0, 0, 792, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000020ULL }, // Inst #2110 = LD_F64m |
| 45047 | { 2109, 5, 0, 0, 792, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000020ULL }, // Inst #2109 = LD_F32m |
| 45048 | { 2108, 0, 0, 0, 189, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000068ULL }, // Inst #2108 = LD_F1 |
| 45049 | { 2107, 0, 0, 0, 188, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000006eULL }, // Inst #2107 = LD_F0 |
| 45050 | { 2106, 5, 0, 0, 8, 0, 8, 232, X86ImpOpBase + 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x24e0004020ULL }, // Inst #2106 = LDTILECFG_EVEX |
| 45051 | { 2105, 5, 0, 0, 8, 0, 8, 232, X86ImpOpBase + 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x24a0004020ULL }, // Inst #2105 = LDTILECFG |
| 45052 | { 2104, 6, 1, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6280000119ULL }, // Inst #2104 = LDS32rm |
| 45053 | { 2103, 6, 1, 0, 8, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6280000099ULL }, // Inst #2103 = LDS16rm |
| 45054 | { 2102, 5, 0, 0, 187, 0, 1, 232, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002022ULL }, // Inst #2102 = LDMXCSR |
| 45055 | { 2101, 6, 1, 0, 650, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7810003819ULL }, // Inst #2101 = LDDQUrm |
| 45056 | { 2100, 5, 0, 0, 1201, 4, 3, 232, X86ImpOpBase + 147, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x6382002021ULL }, // Inst #2100 = LCMPXCHG8B |
| 45057 | { 2099, 6, 0, 0, 1015, 1, 2, 454, X86ImpOpBase + 75, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5802002018ULL }, // Inst #2099 = LCMPXCHG8 |
| 45058 | { 2098, 6, 0, 0, 1199, 1, 2, 211, X86ImpOpBase + 72, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882022018ULL }, // Inst #2098 = LCMPXCHG64 |
| 45059 | { 2097, 6, 0, 0, 1199, 1, 2, 324, X86ImpOpBase + 69, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882002118ULL }, // Inst #2097 = LCMPXCHG32 |
| 45060 | { 2096, 5, 0, 0, 1016, 4, 3, 232, X86ImpOpBase + 140, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6382022021ULL }, // Inst #2096 = LCMPXCHG16B |
| 45061 | { 2095, 6, 0, 0, 1199, 1, 2, 349, X86ImpOpBase + 46, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882002098ULL }, // Inst #2095 = LCMPXCHG16 |
| 45062 | { 2094, 2, 1, 0, 868, 0, 1, 1217, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100022029ULL }, // Inst #2094 = LAR64rr |
| 45063 | { 2093, 6, 1, 0, 1526, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100022019ULL }, // Inst #2093 = LAR64rm |
| 45064 | { 2092, 2, 1, 0, 868, 0, 1, 1215, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100002129ULL }, // Inst #2092 = LAR32rr |
| 45065 | { 2091, 6, 1, 0, 1525, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100002119ULL }, // Inst #2091 = LAR32rm |
| 45066 | { 2090, 2, 1, 0, 1524, 0, 1, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1000020a9ULL }, // Inst #2090 = LAR16rr |
| 45067 | { 2089, 6, 1, 0, 1523, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100002099ULL }, // Inst #2089 = LAR16rm |
| 45068 | { 2088, 0, 0, 0, 918, 1, 1, 1, X86ImpOpBase + 301, 0, 0x4f80000001ULL }, // Inst #2088 = LAHF |
| 45069 | { 2087, 3, 1, 0, 1797, 0, 0, 1119, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a3a0002029ULL }, // Inst #2087 = KXORWkk |
| 45070 | { 2086, 3, 1, 0, 1797, 0, 0, 1116, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a3a0022029ULL }, // Inst #2086 = KXORQkk |
| 45071 | { 2085, 3, 1, 0, 1797, 0, 0, 1113, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a3a0022829ULL }, // Inst #2085 = KXORDkk |
| 45072 | { 2084, 3, 1, 0, 1797, 0, 0, 1110, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a3a0002829ULL }, // Inst #2084 = KXORBkk |
| 45073 | { 2083, 3, 1, 0, 1797, 0, 0, 1119, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a320002029ULL }, // Inst #2083 = KXNORWkk |
| 45074 | { 2082, 3, 1, 0, 1797, 0, 0, 1116, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a320022029ULL }, // Inst #2082 = KXNORQkk |
| 45075 | { 2081, 3, 1, 0, 1797, 0, 0, 1113, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a320022829ULL }, // Inst #2081 = KXNORDkk |
| 45076 | { 2080, 3, 1, 0, 1797, 0, 0, 1110, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a320002829ULL }, // Inst #2080 = KXNORBkk |
| 45077 | { 2079, 3, 1, 0, 1061, 0, 0, 1212, X86ImpOpBase + 0, 0, 0x1a5a0002029ULL }, // Inst #2079 = KUNPCKWDkk |
| 45078 | { 2078, 3, 1, 0, 1061, 0, 0, 1209, X86ImpOpBase + 0, 0, 0x1a5a0022029ULL }, // Inst #2078 = KUNPCKDQkk |
| 45079 | { 2077, 3, 1, 0, 1061, 0, 0, 1206, X86ImpOpBase + 0, 0, 0x1a5a0002829ULL }, // Inst #2077 = KUNPCKBWkk |
| 45080 | { 2076, 2, 0, 0, 1242, 0, 1, 1176, X86ImpOpBase + 0, 0, 0x4ca0002029ULL }, // Inst #2076 = KTESTWkk |
| 45081 | { 2075, 2, 0, 0, 1242, 0, 1, 1158, X86ImpOpBase + 0, 0, 0x4ca0022029ULL }, // Inst #2075 = KTESTQkk |
| 45082 | { 2074, 2, 0, 0, 1242, 0, 1, 1140, X86ImpOpBase + 0, 0, 0x4ca0022829ULL }, // Inst #2074 = KTESTDkk |
| 45083 | { 2073, 2, 0, 0, 1242, 0, 1, 1122, X86ImpOpBase + 0, 0, 0x4ca0002829ULL }, // Inst #2073 = KTESTBkk |
| 45084 | { 2072, 3, 1, 0, 1246, 0, 0, 1203, X86ImpOpBase + 0, 0, 0x1820066829ULL }, // Inst #2072 = KSHIFTRWki |
| 45085 | { 2071, 3, 1, 0, 1246, 0, 0, 1200, X86ImpOpBase + 0, 0, 0x18a0066829ULL }, // Inst #2071 = KSHIFTRQki |
| 45086 | { 2070, 3, 1, 0, 1246, 0, 0, 1197, X86ImpOpBase + 0, 0, 0x18a0046829ULL }, // Inst #2070 = KSHIFTRDki |
| 45087 | { 2069, 3, 1, 0, 1246, 0, 0, 1194, X86ImpOpBase + 0, 0, 0x1820046829ULL }, // Inst #2069 = KSHIFTRBki |
| 45088 | { 2068, 3, 1, 0, 1246, 0, 0, 1203, X86ImpOpBase + 0, 0, 0x1920066829ULL }, // Inst #2068 = KSHIFTLWki |
| 45089 | { 2067, 3, 1, 0, 1246, 0, 0, 1200, X86ImpOpBase + 0, 0, 0x19a0066829ULL }, // Inst #2067 = KSHIFTLQki |
| 45090 | { 2066, 3, 1, 0, 1246, 0, 0, 1197, X86ImpOpBase + 0, 0, 0x19a0046829ULL }, // Inst #2066 = KSHIFTLDki |
| 45091 | { 2065, 3, 1, 0, 1246, 0, 0, 1194, X86ImpOpBase + 0, 0, 0x1920046829ULL }, // Inst #2065 = KSHIFTLBki |
| 45092 | { 2064, 3, 1, 0, 1797, 0, 0, 1119, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a2a0002029ULL }, // Inst #2064 = KORWkk |
| 45093 | { 2063, 2, 0, 0, 1242, 0, 1, 1176, X86ImpOpBase + 0, 0, 0x4c20002029ULL }, // Inst #2063 = KORTESTWkk |
| 45094 | { 2062, 2, 0, 0, 1242, 0, 1, 1158, X86ImpOpBase + 0, 0, 0x4c20022029ULL }, // Inst #2062 = KORTESTQkk |
| 45095 | { 2061, 2, 0, 0, 1242, 0, 1, 1140, X86ImpOpBase + 0, 0, 0x4c20022829ULL }, // Inst #2061 = KORTESTDkk |
| 45096 | { 2060, 2, 0, 0, 1242, 0, 1, 1122, X86ImpOpBase + 0, 0, 0x4c20002829ULL }, // Inst #2060 = KORTESTBkk |
| 45097 | { 2059, 3, 1, 0, 1797, 0, 0, 1116, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a2a0022029ULL }, // Inst #2059 = KORQkk |
| 45098 | { 2058, 3, 1, 0, 1797, 0, 0, 1113, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a2a0022829ULL }, // Inst #2058 = KORDkk |
| 45099 | { 2057, 3, 1, 0, 1797, 0, 0, 1110, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a2a0002829ULL }, // Inst #2057 = KORBkk |
| 45100 | { 2056, 2, 1, 0, 1797, 0, 0, 1176, X86ImpOpBase + 0, 0, 0x2220002029ULL }, // Inst #2056 = KNOTWkk |
| 45101 | { 2055, 2, 1, 0, 1797, 0, 0, 1158, X86ImpOpBase + 0, 0, 0x2220022029ULL }, // Inst #2055 = KNOTQkk |
| 45102 | { 2054, 2, 1, 0, 1797, 0, 0, 1140, X86ImpOpBase + 0, 0, 0x2220022829ULL }, // Inst #2054 = KNOTDkk |
| 45103 | { 2053, 2, 1, 0, 1797, 0, 0, 1122, X86ImpOpBase + 0, 0, 0x2220002829ULL }, // Inst #2053 = KNOTBkk |
| 45104 | { 2052, 2, 1, 0, 1241, 0, 0, 1192, X86ImpOpBase + 0, 0, 0xa049e0002029ULL }, // Inst #2052 = KMOVWrk_EVEX |
| 45105 | { 2051, 2, 1, 0, 1060, 0, 0, 1192, X86ImpOpBase + 0, 0, 0x49a0002029ULL }, // Inst #2051 = KMOVWrk |
| 45106 | { 2050, 6, 0, 0, 1239, 0, 0, 1186, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x48e0002018ULL }, // Inst #2050 = KMOVWmk_EVEX |
| 45107 | { 2049, 6, 0, 0, 1062, 0, 0, 1186, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x48a0002018ULL }, // Inst #2049 = KMOVWmk |
| 45108 | { 2048, 2, 1, 0, 1231, 0, 0, 1184, X86ImpOpBase + 0, 0, 0xa04960002029ULL }, // Inst #2048 = KMOVWkr_EVEX |
| 45109 | { 2047, 2, 1, 0, 1718, 0, 0, 1184, X86ImpOpBase + 0, 0, 0x4920002029ULL }, // Inst #2047 = KMOVWkr |
| 45110 | { 2046, 6, 1, 0, 1311, 0, 0, 1178, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4860002019ULL }, // Inst #2046 = KMOVWkm_EVEX |
| 45111 | { 2045, 6, 1, 0, 1802, 0, 0, 1178, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4820002019ULL }, // Inst #2045 = KMOVWkm |
| 45112 | { 2044, 2, 1, 0, 1229, 0, 0, 1176, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xca04860002029ULL }, // Inst #2044 = KMOVWkk_EVEX |
| 45113 | { 2043, 2, 1, 0, 1228, 0, 0, 1176, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4820002029ULL }, // Inst #2043 = KMOVWkk |
| 45114 | { 2042, 2, 1, 0, 1241, 0, 0, 1174, X86ImpOpBase + 0, 0, 0xa049e0023829ULL }, // Inst #2042 = KMOVQrk_EVEX |
| 45115 | { 2041, 2, 1, 0, 1060, 0, 0, 1174, X86ImpOpBase + 0, 0, 0x49a0023829ULL }, // Inst #2041 = KMOVQrk |
| 45116 | { 2040, 6, 0, 0, 1239, 0, 0, 1168, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x48e0022018ULL }, // Inst #2040 = KMOVQmk_EVEX |
| 45117 | { 2039, 6, 0, 0, 1062, 0, 0, 1168, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x48a0022018ULL }, // Inst #2039 = KMOVQmk |
| 45118 | { 2038, 2, 1, 0, 1231, 0, 0, 1166, X86ImpOpBase + 0, 0, 0xa04960023829ULL }, // Inst #2038 = KMOVQkr_EVEX |
| 45119 | { 2037, 2, 1, 0, 1063, 0, 0, 1166, X86ImpOpBase + 0, 0, 0x4920023829ULL }, // Inst #2037 = KMOVQkr |
| 45120 | { 2036, 6, 1, 0, 1311, 0, 0, 1160, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4860022019ULL }, // Inst #2036 = KMOVQkm_EVEX |
| 45121 | { 2035, 6, 1, 0, 1802, 0, 0, 1160, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4820022019ULL }, // Inst #2035 = KMOVQkm |
| 45122 | { 2034, 2, 1, 0, 1229, 0, 0, 1158, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xca04860022029ULL }, // Inst #2034 = KMOVQkk_EVEX |
| 45123 | { 2033, 2, 1, 0, 1228, 0, 0, 1158, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4820022029ULL }, // Inst #2033 = KMOVQkk |
| 45124 | { 2032, 2, 1, 0, 1241, 0, 0, 1156, X86ImpOpBase + 0, 0, 0xa049e0003829ULL }, // Inst #2032 = KMOVDrk_EVEX |
| 45125 | { 2031, 2, 1, 0, 1060, 0, 0, 1156, X86ImpOpBase + 0, 0, 0x49a0003829ULL }, // Inst #2031 = KMOVDrk |
| 45126 | { 2030, 6, 0, 0, 1239, 0, 0, 1150, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x48e0022818ULL }, // Inst #2030 = KMOVDmk_EVEX |
| 45127 | { 2029, 6, 0, 0, 1062, 0, 0, 1150, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x48a0022818ULL }, // Inst #2029 = KMOVDmk |
| 45128 | { 2028, 2, 1, 0, 1231, 0, 0, 1148, X86ImpOpBase + 0, 0, 0xa04960003829ULL }, // Inst #2028 = KMOVDkr_EVEX |
| 45129 | { 2027, 2, 1, 0, 1718, 0, 0, 1148, X86ImpOpBase + 0, 0, 0x4920003829ULL }, // Inst #2027 = KMOVDkr |
| 45130 | { 2026, 6, 1, 0, 1311, 0, 0, 1142, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4860022819ULL }, // Inst #2026 = KMOVDkm_EVEX |
| 45131 | { 2025, 6, 1, 0, 1802, 0, 0, 1142, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4820022819ULL }, // Inst #2025 = KMOVDkm |
| 45132 | { 2024, 2, 1, 0, 1229, 0, 0, 1140, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xca04860022829ULL }, // Inst #2024 = KMOVDkk_EVEX |
| 45133 | { 2023, 2, 1, 0, 1228, 0, 0, 1140, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4820022829ULL }, // Inst #2023 = KMOVDkk |
| 45134 | { 2022, 2, 1, 0, 1241, 0, 0, 1138, X86ImpOpBase + 0, 0, 0xa049e0002829ULL }, // Inst #2022 = KMOVBrk_EVEX |
| 45135 | { 2021, 2, 1, 0, 1060, 0, 0, 1138, X86ImpOpBase + 0, 0, 0x49a0002829ULL }, // Inst #2021 = KMOVBrk |
| 45136 | { 2020, 6, 0, 0, 1239, 0, 0, 1132, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x48e0002818ULL }, // Inst #2020 = KMOVBmk_EVEX |
| 45137 | { 2019, 6, 0, 0, 1803, 0, 0, 1132, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x48a0002818ULL }, // Inst #2019 = KMOVBmk |
| 45138 | { 2018, 2, 1, 0, 1231, 0, 0, 1130, X86ImpOpBase + 0, 0, 0xa04960002829ULL }, // Inst #2018 = KMOVBkr_EVEX |
| 45139 | { 2017, 2, 1, 0, 1718, 0, 0, 1130, X86ImpOpBase + 0, 0, 0x4920002829ULL }, // Inst #2017 = KMOVBkr |
| 45140 | { 2016, 6, 1, 0, 1311, 0, 0, 1124, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4860002819ULL }, // Inst #2016 = KMOVBkm_EVEX |
| 45141 | { 2015, 6, 1, 0, 1802, 0, 0, 1124, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4820002819ULL }, // Inst #2015 = KMOVBkm |
| 45142 | { 2014, 2, 1, 0, 1229, 0, 0, 1122, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0xca04860002829ULL }, // Inst #2014 = KMOVBkk_EVEX |
| 45143 | { 2013, 2, 1, 0, 1228, 0, 0, 1122, X86ImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x4820002829ULL }, // Inst #2013 = KMOVBkk |
| 45144 | { 2012, 2, 0, 0, 0, 0, 3, 206, X86ImpOpBase + 108, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2012 = KCFI_CHECK |
| 45145 | { 2011, 3, 1, 0, 1797, 0, 0, 1119, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a0a0002029ULL }, // Inst #2011 = KANDWkk |
| 45146 | { 2010, 3, 1, 0, 1797, 0, 0, 1116, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a0a0022029ULL }, // Inst #2010 = KANDQkk |
| 45147 | { 2009, 3, 1, 0, 1797, 0, 0, 1119, X86ImpOpBase + 0, 0, 0x1a120002029ULL }, // Inst #2009 = KANDNWkk |
| 45148 | { 2008, 3, 1, 0, 1797, 0, 0, 1116, X86ImpOpBase + 0, 0, 0x1a120022029ULL }, // Inst #2008 = KANDNQkk |
| 45149 | { 2007, 3, 1, 0, 1797, 0, 0, 1113, X86ImpOpBase + 0, 0, 0x1a120022829ULL }, // Inst #2007 = KANDNDkk |
| 45150 | { 2006, 3, 1, 0, 1227, 0, 0, 1110, X86ImpOpBase + 0, 0, 0x1a120002829ULL }, // Inst #2006 = KANDNBkk |
| 45151 | { 2005, 3, 1, 0, 1797, 0, 0, 1113, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a0a0022829ULL }, // Inst #2005 = KANDDkk |
| 45152 | { 2004, 3, 1, 0, 1797, 0, 0, 1110, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a0a0002829ULL }, // Inst #2004 = KANDBkk |
| 45153 | { 2003, 3, 1, 0, 1059, 0, 0, 1119, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a520002029ULL }, // Inst #2003 = KADDWkk |
| 45154 | { 2002, 3, 1, 0, 1059, 0, 0, 1116, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a520022029ULL }, // Inst #2002 = KADDQkk |
| 45155 | { 2001, 3, 1, 0, 1059, 0, 0, 1113, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a520022829ULL }, // Inst #2001 = KADDDkk |
| 45156 | { 2000, 3, 1, 0, 1059, 0, 0, 1110, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1a520002829ULL }, // Inst #2000 = KADDBkk |
| 45157 | { 1999, 1, 0, 0, 1494, 1, 0, 600, X86ImpOpBase + 300, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080601ULL }, // Inst #1999 = JRCXZ |
| 45158 | { 1998, 1, 0, 0, 1522, 0, 0, 600, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x74801c0101ULL }, // Inst #1998 = JMP_4 |
| 45159 | { 1997, 1, 0, 0, 1454, 0, 0, 600, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7480140081ULL }, // Inst #1997 = JMP_2 |
| 45160 | { 1996, 1, 0, 0, 1522, 0, 0, 600, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7580080001ULL }, // Inst #1996 = JMP_1 |
| 45161 | { 1995, 1, 0, 0, 6, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4005080240001ULL }, // Inst #1995 = JMPABS64i |
| 45162 | { 1994, 1, 0, 0, 1521, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80020034ULL }, // Inst #1994 = JMP64r_REX |
| 45163 | { 1993, 1, 0, 0, 837, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x2007f80000034ULL }, // Inst #1993 = JMP64r_NT |
| 45164 | { 1992, 1, 0, 0, 837, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f80000034ULL }, // Inst #1992 = JMP64r |
| 45165 | { 1991, 5, 0, 0, 848, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80020024ULL }, // Inst #1991 = JMP64m_REX |
| 45166 | { 1990, 5, 0, 0, 1438, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x2007f80000024ULL }, // Inst #1990 = JMP64m_NT |
| 45167 | { 1989, 5, 0, 0, 1438, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f80000024ULL }, // Inst #1989 = JMP64m |
| 45168 | { 1988, 1, 0, 0, 837, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x2007f80000134ULL }, // Inst #1988 = JMP32r_NT |
| 45169 | { 1987, 1, 0, 0, 837, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f80000134ULL }, // Inst #1987 = JMP32r |
| 45170 | { 1986, 5, 0, 0, 1438, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x2007f80000124ULL }, // Inst #1986 = JMP32m_NT |
| 45171 | { 1985, 5, 0, 0, 1438, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f80000124ULL }, // Inst #1985 = JMP32m |
| 45172 | { 1984, 1, 0, 0, 837, 0, 0, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x2007f800000b4ULL }, // Inst #1984 = JMP16r_NT |
| 45173 | { 1983, 1, 0, 0, 837, 0, 0, 599, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f800000b4ULL }, // Inst #1983 = JMP16r |
| 45174 | { 1982, 5, 0, 0, 1438, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x2007f800000a4ULL }, // Inst #1982 = JMP16m_NT |
| 45175 | { 1981, 5, 0, 0, 1438, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f800000a4ULL }, // Inst #1981 = JMP16m |
| 45176 | { 1980, 1, 0, 0, 1494, 1, 0, 600, X86ImpOpBase + 299, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080401ULL }, // Inst #1980 = JECXZ |
| 45177 | { 1979, 1, 0, 0, 661, 1, 0, 600, X86ImpOpBase + 298, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080201ULL }, // Inst #1979 = JCXZ |
| 45178 | { 1978, 2, 0, 0, 4, 1, 0, 1108, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40001c2109ULL }, // Inst #1978 = JCC_4 |
| 45179 | { 1977, 2, 0, 0, 4, 1, 0, 1108, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4000142089ULL }, // Inst #1977 = JCC_2 |
| 45180 | { 1976, 2, 0, 0, 4, 1, 0, 1108, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3800080009ULL }, // Inst #1976 = JCC_1 |
| 45181 | { 1975, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1975 = Int_eh_sjlj_setup_dispatch |
| 45182 | { 1974, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1974 = IST_Fp64m80 |
| 45183 | { 1973, 6, 0, 0, 141, 1, 1, 1072, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1973 = IST_Fp64m64 |
| 45184 | { 1972, 6, 0, 0, 141, 1, 1, 1066, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1972 = IST_Fp64m32 |
| 45185 | { 1971, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1971 = IST_Fp32m80 |
| 45186 | { 1970, 6, 0, 0, 141, 1, 1, 1072, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1970 = IST_Fp32m64 |
| 45187 | { 1969, 6, 0, 0, 141, 1, 1, 1066, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1969 = IST_Fp32m32 |
| 45188 | { 1968, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1968 = IST_Fp16m80 |
| 45189 | { 1967, 6, 0, 0, 141, 1, 1, 1072, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1967 = IST_Fp16m64 |
| 45190 | { 1966, 6, 0, 0, 141, 1, 1, 1066, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1966 = IST_Fp16m32 |
| 45191 | { 1965, 5, 0, 0, 675, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000027ULL }, // Inst #1965 = IST_FP64m |
| 45192 | { 1964, 5, 0, 0, 675, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000023ULL }, // Inst #1964 = IST_FP32m |
| 45193 | { 1963, 5, 0, 0, 675, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000023ULL }, // Inst #1963 = IST_FP16m |
| 45194 | { 1962, 5, 0, 0, 675, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000022ULL }, // Inst #1962 = IST_F32m |
| 45195 | { 1961, 5, 0, 0, 675, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000022ULL }, // Inst #1961 = IST_F16m |
| 45196 | { 1960, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1960 = ISTT_Fp64m80 |
| 45197 | { 1959, 6, 0, 0, 141, 1, 1, 1072, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1959 = ISTT_Fp64m64 |
| 45198 | { 1958, 6, 0, 0, 141, 1, 1, 1066, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1958 = ISTT_Fp64m32 |
| 45199 | { 1957, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1957 = ISTT_Fp32m80 |
| 45200 | { 1956, 6, 0, 0, 141, 1, 1, 1072, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1956 = ISTT_Fp32m64 |
| 45201 | { 1955, 6, 0, 0, 141, 1, 1, 1066, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1955 = ISTT_Fp32m32 |
| 45202 | { 1954, 6, 0, 0, 141, 1, 1, 1078, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1954 = ISTT_Fp16m80 |
| 45203 | { 1953, 6, 0, 0, 141, 1, 1, 1072, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1953 = ISTT_Fp16m64 |
| 45204 | { 1952, 6, 0, 0, 141, 1, 1, 1066, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1952 = ISTT_Fp16m32 |
| 45205 | { 1951, 5, 0, 0, 761, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000021ULL }, // Inst #1951 = ISTT_FP64m |
| 45206 | { 1950, 5, 0, 0, 761, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000021ULL }, // Inst #1950 = ISTT_FP32m |
| 45207 | { 1949, 5, 0, 0, 761, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000021ULL }, // Inst #1949 = ISTT_FP16m |
| 45208 | { 1948, 0, 0, 0, 930, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c20001ULL }, // Inst #1948 = IRET64 |
| 45209 | { 1947, 0, 0, 0, 930, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c00101ULL }, // Inst #1947 = IRET32 |
| 45210 | { 1946, 0, 0, 0, 930, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c00081ULL }, // Inst #1946 = IRET16 |
| 45211 | { 1945, 1, 0, 0, 622, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x1c00000ULL }, // Inst #1945 = IRET |
| 45212 | { 1944, 6, 0, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x78e0011019ULL }, // Inst #1944 = INVVPID64_EVEX |
| 45213 | { 1943, 6, 0, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080004819ULL }, // Inst #1943 = INVVPID64 |
| 45214 | { 1942, 6, 0, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080004819ULL }, // Inst #1942 = INVVPID32 |
| 45215 | { 1941, 6, 0, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7960011019ULL }, // Inst #1941 = INVPCID64_EVEX |
| 45216 | { 1940, 6, 0, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4100004819ULL }, // Inst #1940 = INVPCID64 |
| 45217 | { 1939, 6, 0, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4100004819ULL }, // Inst #1939 = INVPCID32 |
| 45218 | { 1938, 0, 0, 0, 8, 2, 0, 1, X86ImpOpBase + 296, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207eULL }, // Inst #1938 = INVLPGB64 |
| 45219 | { 1937, 0, 0, 0, 8, 2, 0, 1, X86ImpOpBase + 294, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207eULL }, // Inst #1937 = INVLPGB32 |
| 45220 | { 1936, 0, 0, 0, 717, 2, 0, 1, X86ImpOpBase + 292, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205fULL }, // Inst #1936 = INVLPGA64 |
| 45221 | { 1935, 0, 0, 0, 717, 2, 0, 1, X86ImpOpBase + 290, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205fULL }, // Inst #1935 = INVLPGA32 |
| 45222 | { 1934, 5, 0, 0, 1520, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002027ULL }, // Inst #1934 = INVLPG |
| 45223 | { 1933, 6, 0, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7860011019ULL }, // Inst #1933 = INVEPT64_EVEX |
| 45224 | { 1932, 6, 0, 0, 8, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000004819ULL }, // Inst #1932 = INVEPT64 |
| 45225 | { 1931, 6, 0, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000004819ULL }, // Inst #1931 = INVEPT32 |
| 45226 | { 1930, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x400002001ULL }, // Inst #1930 = INVD |
| 45227 | { 1929, 0, 0, 0, 669, 1, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6700000001ULL }, // Inst #1929 = INTO |
| 45228 | { 1928, 0, 0, 0, 728, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6600000001ULL }, // Inst #1928 = INT3 |
| 45229 | { 1927, 1, 0, 0, 727, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6680040001ULL }, // Inst #1927 = INT |
| 45230 | { 1926, 1, 0, 0, 713, 3, 1, 1102, X86ImpOpBase + 286, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3680000085ULL }, // Inst #1926 = INSW |
| 45231 | { 1925, 1, 0, 0, 1519, 3, 1, 1102, X86ImpOpBase + 286, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3680000105ULL }, // Inst #1925 = INSL |
| 45232 | { 1924, 5, 1, 0, 988, 0, 0, 1103, X86ImpOpBase + 0, 0, 0x3c18043829ULL }, // Inst #1924 = INSERTQI |
| 45233 | { 1923, 3, 1, 0, 1033, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3c98003829ULL }, // Inst #1923 = INSERTQ |
| 45234 | { 1922, 4, 1, 0, 1417, 0, 0, 585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1088046829ULL }, // Inst #1922 = INSERTPSrri |
| 45235 | { 1921, 8, 1, 0, 1426, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1088046819ULL }, // Inst #1921 = INSERTPSrmi |
| 45236 | { 1920, 1, 0, 0, 1518, 3, 1, 1102, X86ImpOpBase + 286, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3600000005ULL }, // Inst #1920 = INSB |
| 45237 | { 1919, 1, 0, 0, 8, 1, 1, 203, X86ImpOpBase + 284, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023035ULL }, // Inst #1919 = INCSSPQ |
| 45238 | { 1918, 1, 0, 0, 8, 1, 1, 202, X86ImpOpBase + 284, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003035ULL }, // Inst #1918 = INCSSPD |
| 45239 | { 1917, 2, 1, 0, 1, 0, 0, 947, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ff60010030ULL }, // Inst #1917 = INC8r_NF_ND |
| 45240 | { 1916, 2, 1, 0, 1, 0, 0, 1049, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007f60010030ULL }, // Inst #1916 = INC8r_NF |
| 45241 | { 1915, 2, 1, 0, 1, 0, 1, 947, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ff60010030ULL }, // Inst #1915 = INC8r_ND |
| 45242 | { 1914, 2, 1, 0, 1, 0, 1, 1049, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007f60010030ULL }, // Inst #1914 = INC8r_EVEX |
| 45243 | { 1913, 2, 1, 0, 1, 0, 1, 1049, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f00000030ULL }, // Inst #1913 = INC8r |
| 45244 | { 1912, 6, 1, 0, 927, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010ff60010020ULL }, // Inst #1912 = INC8m_NF_ND |
| 45245 | { 1911, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007f60010020ULL }, // Inst #1911 = INC8m_NF |
| 45246 | { 1910, 6, 1, 0, 927, 0, 1, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10ff60010020ULL }, // Inst #1910 = INC8m_ND |
| 45247 | { 1909, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007f60010020ULL }, // Inst #1909 = INC8m_EVEX |
| 45248 | { 1908, 5, 0, 0, 1457, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f00000020ULL }, // Inst #1908 = INC8m |
| 45249 | { 1907, 2, 1, 0, 1, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0030030ULL }, // Inst #1907 = INC64r_NF_ND |
| 45250 | { 1906, 2, 1, 0, 1, 0, 0, 322, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0030030ULL }, // Inst #1906 = INC64r_NF |
| 45251 | { 1905, 2, 1, 0, 1, 0, 1, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0030030ULL }, // Inst #1905 = INC64r_ND |
| 45252 | { 1904, 2, 1, 0, 1, 0, 1, 322, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0030030ULL }, // Inst #1904 = INC64r_EVEX |
| 45253 | { 1903, 2, 1, 0, 1452, 0, 1, 322, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80020030ULL }, // Inst #1903 = INC64r |
| 45254 | { 1902, 6, 1, 0, 927, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0030020ULL }, // Inst #1902 = INC64m_NF_ND |
| 45255 | { 1901, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0030020ULL }, // Inst #1901 = INC64m_NF |
| 45256 | { 1900, 6, 1, 0, 927, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10ffe0030020ULL }, // Inst #1900 = INC64m_ND |
| 45257 | { 1899, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0030020ULL }, // Inst #1899 = INC64m_EVEX |
| 45258 | { 1898, 5, 0, 0, 1202, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80020020ULL }, // Inst #1898 = INC64m |
| 45259 | { 1897, 2, 1, 0, 1517, 0, 1, 320, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x2000000102ULL }, // Inst #1897 = INC32r_alt |
| 45260 | { 1896, 2, 1, 0, 1, 0, 0, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0010030ULL }, // Inst #1896 = INC32r_NF_ND |
| 45261 | { 1895, 2, 1, 0, 1, 0, 0, 320, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0010030ULL }, // Inst #1895 = INC32r_NF |
| 45262 | { 1894, 2, 1, 0, 1, 0, 1, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0010030ULL }, // Inst #1894 = INC32r_ND |
| 45263 | { 1893, 2, 1, 0, 1, 0, 1, 320, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0010030ULL }, // Inst #1893 = INC32r_EVEX |
| 45264 | { 1892, 2, 1, 0, 1, 0, 1, 320, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000130ULL }, // Inst #1892 = INC32r |
| 45265 | { 1891, 6, 1, 0, 927, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0010020ULL }, // Inst #1891 = INC32m_NF_ND |
| 45266 | { 1890, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0010020ULL }, // Inst #1890 = INC32m_NF |
| 45267 | { 1889, 6, 1, 0, 927, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10ffe0010020ULL }, // Inst #1889 = INC32m_ND |
| 45268 | { 1888, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0010020ULL }, // Inst #1888 = INC32m_EVEX |
| 45269 | { 1887, 5, 0, 0, 1202, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000120ULL }, // Inst #1887 = INC32m |
| 45270 | { 1886, 2, 1, 0, 1516, 0, 1, 595, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x2000000082ULL }, // Inst #1886 = INC16r_alt |
| 45271 | { 1885, 2, 1, 0, 1, 0, 0, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0010830ULL }, // Inst #1885 = INC16r_NF_ND |
| 45272 | { 1884, 2, 1, 0, 1, 0, 0, 595, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0010830ULL }, // Inst #1884 = INC16r_NF |
| 45273 | { 1883, 2, 1, 0, 1, 0, 1, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0010830ULL }, // Inst #1883 = INC16r_ND |
| 45274 | { 1882, 2, 1, 0, 1, 0, 1, 595, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0010830ULL }, // Inst #1882 = INC16r_EVEX |
| 45275 | { 1881, 2, 1, 0, 1, 0, 1, 595, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f800000b0ULL }, // Inst #1881 = INC16r |
| 45276 | { 1880, 6, 1, 0, 927, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0010820ULL }, // Inst #1880 = INC16m_NF_ND |
| 45277 | { 1879, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0010820ULL }, // Inst #1879 = INC16m_NF |
| 45278 | { 1878, 6, 1, 0, 927, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10ffe0010820ULL }, // Inst #1878 = INC16m_ND |
| 45279 | { 1877, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0010820ULL }, // Inst #1877 = INC16m_EVEX |
| 45280 | { 1876, 5, 0, 0, 1202, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f800000a0ULL }, // Inst #1876 = INC16m |
| 45281 | { 1875, 0, 0, 0, 724, 1, 1, 1, X86ImpOpBase + 282, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7600000001ULL }, // Inst #1875 = IN8rr |
| 45282 | { 1874, 1, 0, 0, 723, 0, 1, 1, X86ImpOpBase + 281, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7200040001ULL }, // Inst #1874 = IN8ri |
| 45283 | { 1873, 0, 0, 0, 1515, 1, 1, 1, X86ImpOpBase + 279, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7680000101ULL }, // Inst #1873 = IN32rr |
| 45284 | { 1872, 1, 0, 0, 1514, 0, 1, 1, X86ImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7280040101ULL }, // Inst #1872 = IN32ri |
| 45285 | { 1871, 0, 0, 0, 1513, 1, 1, 1, X86ImpOpBase + 277, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7680000081ULL }, // Inst #1871 = IN16rr |
| 45286 | { 1870, 1, 0, 0, 1512, 0, 1, 1, X86ImpOpBase + 276, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7280040081ULL }, // Inst #1870 = IN16ri |
| 45287 | { 1869, 3, 1, 0, 178, 0, 1, 427, X86ImpOpBase + 0, 0, 0x1035e0070029ULL }, // Inst #1869 = IMULZU64rri8 |
| 45288 | { 1868, 3, 1, 0, 178, 0, 1, 427, X86ImpOpBase + 0, 0, 0x1034e0230029ULL }, // Inst #1868 = IMULZU64rri32 |
| 45289 | { 1867, 7, 1, 0, 176, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1035e0070019ULL }, // Inst #1867 = IMULZU64rmi8 |
| 45290 | { 1866, 7, 1, 0, 176, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1034e0230019ULL }, // Inst #1866 = IMULZU64rmi32 |
| 45291 | { 1865, 3, 1, 0, 172, 0, 1, 396, X86ImpOpBase + 0, 0, 0x1035e0050029ULL }, // Inst #1865 = IMULZU32rri8 |
| 45292 | { 1864, 3, 1, 0, 172, 0, 1, 396, X86ImpOpBase + 0, 0, 0x1034e0190029ULL }, // Inst #1864 = IMULZU32rri |
| 45293 | { 1863, 7, 1, 0, 170, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1035e0050019ULL }, // Inst #1863 = IMULZU32rmi8 |
| 45294 | { 1862, 7, 1, 0, 170, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1034e0190019ULL }, // Inst #1862 = IMULZU32rmi |
| 45295 | { 1861, 3, 1, 0, 166, 0, 1, 362, X86ImpOpBase + 0, 0, 0x1035e0050829ULL }, // Inst #1861 = IMULZU16rri8 |
| 45296 | { 1860, 3, 1, 0, 166, 0, 1, 362, X86ImpOpBase + 0, 0, 0x1034e0110829ULL }, // Inst #1860 = IMULZU16rri |
| 45297 | { 1859, 7, 1, 0, 164, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1035e0050819ULL }, // Inst #1859 = IMULZU16rmi8 |
| 45298 | { 1858, 7, 1, 0, 164, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1034e0110819ULL }, // Inst #1858 = IMULZU16rmi |
| 45299 | { 1857, 1, 0, 0, 180, 1, 2, 1051, X86ImpOpBase + 273, 0, 0x10007b60010035ULL }, // Inst #1857 = IMUL8r_NF |
| 45300 | { 1856, 1, 0, 0, 180, 1, 3, 1051, X86ImpOpBase + 269, 0, 0xc007b60010035ULL }, // Inst #1856 = IMUL8r_EVEX |
| 45301 | { 1855, 1, 0, 0, 180, 1, 3, 1051, X86ImpOpBase + 269, 0, 0x7b00000035ULL }, // Inst #1855 = IMUL8r |
| 45302 | { 1854, 5, 0, 0, 179, 1, 2, 232, X86ImpOpBase + 273, 0|(1ULL<<MCID::MayLoad), 0x10007b60010025ULL }, // Inst #1854 = IMUL8m_NF |
| 45303 | { 1853, 5, 0, 0, 179, 1, 3, 232, X86ImpOpBase + 269, 0|(1ULL<<MCID::MayLoad), 0xc007b60010025ULL }, // Inst #1853 = IMUL8m_EVEX |
| 45304 | { 1852, 5, 0, 0, 179, 1, 3, 232, X86ImpOpBase + 269, 0|(1ULL<<MCID::MayLoad), 0x7b00000025ULL }, // Inst #1852 = IMUL8m |
| 45305 | { 1851, 3, 1, 0, 178, 0, 0, 427, X86ImpOpBase + 0, 0, 0x100035e0070029ULL }, // Inst #1851 = IMUL64rri8_NF |
| 45306 | { 1850, 3, 1, 0, 178, 0, 1, 427, X86ImpOpBase + 0, 0, 0xc0035e0070029ULL }, // Inst #1850 = IMUL64rri8_EVEX |
| 45307 | { 1849, 3, 1, 0, 178, 0, 1, 427, X86ImpOpBase + 0, 0, 0x3580060029ULL }, // Inst #1849 = IMUL64rri8 |
| 45308 | { 1848, 3, 1, 0, 178, 0, 0, 427, X86ImpOpBase + 0, 0, 0x100034e0230029ULL }, // Inst #1848 = IMUL64rri32_NF |
| 45309 | { 1847, 3, 1, 0, 178, 0, 1, 427, X86ImpOpBase + 0, 0, 0xc0034e0230029ULL }, // Inst #1847 = IMUL64rri32_EVEX |
| 45310 | { 1846, 3, 1, 0, 178, 0, 1, 427, X86ImpOpBase + 0, 0, 0x3480220029ULL }, // Inst #1846 = IMUL64rri32 |
| 45311 | { 1845, 3, 1, 0, 177, 0, 0, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1010d7e0030029ULL }, // Inst #1845 = IMUL64rr_NF_ND |
| 45312 | { 1844, 3, 1, 0, 177, 0, 0, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100057e0030029ULL }, // Inst #1844 = IMUL64rr_NF |
| 45313 | { 1843, 3, 1, 0, 177, 0, 1, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10d7e0030029ULL }, // Inst #1843 = IMUL64rr_ND |
| 45314 | { 1842, 3, 1, 0, 177, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0057e0030029ULL }, // Inst #1842 = IMUL64rr_EVEX |
| 45315 | { 1841, 3, 1, 0, 177, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x5780022029ULL }, // Inst #1841 = IMUL64rr |
| 45316 | { 1840, 7, 1, 0, 176, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100035e0070019ULL }, // Inst #1840 = IMUL64rmi8_NF |
| 45317 | { 1839, 7, 1, 0, 176, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0035e0070019ULL }, // Inst #1839 = IMUL64rmi8_EVEX |
| 45318 | { 1838, 7, 1, 0, 176, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3580060019ULL }, // Inst #1838 = IMUL64rmi8 |
| 45319 | { 1837, 7, 1, 0, 176, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100034e0230019ULL }, // Inst #1837 = IMUL64rmi32_NF |
| 45320 | { 1836, 7, 1, 0, 176, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0034e0230019ULL }, // Inst #1836 = IMUL64rmi32_EVEX |
| 45321 | { 1835, 7, 1, 0, 176, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3480220019ULL }, // Inst #1835 = IMUL64rmi32 |
| 45322 | { 1834, 7, 1, 0, 175, 0, 0, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010d7e0030019ULL }, // Inst #1834 = IMUL64rm_NF_ND |
| 45323 | { 1833, 7, 1, 0, 175, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100057e0030019ULL }, // Inst #1833 = IMUL64rm_NF |
| 45324 | { 1832, 7, 1, 0, 175, 0, 1, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10d7e0030019ULL }, // Inst #1832 = IMUL64rm_ND |
| 45325 | { 1831, 7, 1, 0, 175, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0057e0030019ULL }, // Inst #1831 = IMUL64rm_EVEX |
| 45326 | { 1830, 7, 1, 0, 175, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5780022019ULL }, // Inst #1830 = IMUL64rm |
| 45327 | { 1829, 1, 0, 0, 174, 1, 2, 203, X86ImpOpBase + 169, 0, 0x10007be0030035ULL }, // Inst #1829 = IMUL64r_NF |
| 45328 | { 1828, 1, 0, 0, 174, 1, 3, 203, X86ImpOpBase + 265, 0, 0xc007be0030035ULL }, // Inst #1828 = IMUL64r_EVEX |
| 45329 | { 1827, 1, 0, 0, 174, 1, 3, 203, X86ImpOpBase + 265, 0, 0x7b80020035ULL }, // Inst #1827 = IMUL64r |
| 45330 | { 1826, 5, 0, 0, 173, 1, 2, 232, X86ImpOpBase + 169, 0|(1ULL<<MCID::MayLoad), 0x10007be0030025ULL }, // Inst #1826 = IMUL64m_NF |
| 45331 | { 1825, 5, 0, 0, 173, 1, 3, 232, X86ImpOpBase + 265, 0|(1ULL<<MCID::MayLoad), 0xc007be0030025ULL }, // Inst #1825 = IMUL64m_EVEX |
| 45332 | { 1824, 5, 0, 0, 173, 1, 3, 232, X86ImpOpBase + 265, 0|(1ULL<<MCID::MayLoad), 0x7b80020025ULL }, // Inst #1824 = IMUL64m |
| 45333 | { 1823, 3, 1, 0, 172, 0, 0, 396, X86ImpOpBase + 0, 0, 0x100034e0190029ULL }, // Inst #1823 = IMUL32rri_NF |
| 45334 | { 1822, 3, 1, 0, 172, 0, 1, 396, X86ImpOpBase + 0, 0, 0xc0034e0190029ULL }, // Inst #1822 = IMUL32rri_EVEX |
| 45335 | { 1821, 3, 1, 0, 172, 0, 0, 396, X86ImpOpBase + 0, 0, 0x100035e0050029ULL }, // Inst #1821 = IMUL32rri8_NF |
| 45336 | { 1820, 3, 1, 0, 172, 0, 1, 396, X86ImpOpBase + 0, 0, 0xc0035e0050029ULL }, // Inst #1820 = IMUL32rri8_EVEX |
| 45337 | { 1819, 3, 1, 0, 172, 0, 1, 396, X86ImpOpBase + 0, 0, 0x3580040129ULL }, // Inst #1819 = IMUL32rri8 |
| 45338 | { 1818, 3, 1, 0, 172, 0, 1, 396, X86ImpOpBase + 0, 0, 0x3480180129ULL }, // Inst #1818 = IMUL32rri |
| 45339 | { 1817, 3, 1, 0, 171, 0, 0, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1010d7e0010029ULL }, // Inst #1817 = IMUL32rr_NF_ND |
| 45340 | { 1816, 3, 1, 0, 171, 0, 0, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100057e0010029ULL }, // Inst #1816 = IMUL32rr_NF |
| 45341 | { 1815, 3, 1, 0, 171, 0, 1, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10d7e0010029ULL }, // Inst #1815 = IMUL32rr_ND |
| 45342 | { 1814, 3, 1, 0, 171, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0057e0010029ULL }, // Inst #1814 = IMUL32rr_EVEX |
| 45343 | { 1813, 3, 1, 0, 171, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x5780002129ULL }, // Inst #1813 = IMUL32rr |
| 45344 | { 1812, 7, 1, 0, 170, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100034e0190019ULL }, // Inst #1812 = IMUL32rmi_NF |
| 45345 | { 1811, 7, 1, 0, 170, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0034e0190019ULL }, // Inst #1811 = IMUL32rmi_EVEX |
| 45346 | { 1810, 7, 1, 0, 170, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100035e0050019ULL }, // Inst #1810 = IMUL32rmi8_NF |
| 45347 | { 1809, 7, 1, 0, 170, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0035e0050019ULL }, // Inst #1809 = IMUL32rmi8_EVEX |
| 45348 | { 1808, 7, 1, 0, 170, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3580040119ULL }, // Inst #1808 = IMUL32rmi8 |
| 45349 | { 1807, 7, 1, 0, 170, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3480180119ULL }, // Inst #1807 = IMUL32rmi |
| 45350 | { 1806, 7, 1, 0, 169, 0, 0, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010d7e0010019ULL }, // Inst #1806 = IMUL32rm_NF_ND |
| 45351 | { 1805, 7, 1, 0, 169, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100057e0010019ULL }, // Inst #1805 = IMUL32rm_NF |
| 45352 | { 1804, 7, 1, 0, 169, 0, 1, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10d7e0010019ULL }, // Inst #1804 = IMUL32rm_ND |
| 45353 | { 1803, 7, 1, 0, 169, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0057e0010019ULL }, // Inst #1803 = IMUL32rm_EVEX |
| 45354 | { 1802, 7, 1, 0, 169, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5780002119ULL }, // Inst #1802 = IMUL32rm |
| 45355 | { 1801, 1, 0, 0, 168, 1, 2, 202, X86ImpOpBase + 116, 0, 0x10007be0010035ULL }, // Inst #1801 = IMUL32r_NF |
| 45356 | { 1800, 1, 0, 0, 168, 1, 3, 202, X86ImpOpBase + 261, 0, 0xc007be0010035ULL }, // Inst #1800 = IMUL32r_EVEX |
| 45357 | { 1799, 1, 0, 0, 168, 1, 3, 202, X86ImpOpBase + 261, 0, 0x7b80000135ULL }, // Inst #1799 = IMUL32r |
| 45358 | { 1798, 5, 0, 0, 167, 1, 2, 232, X86ImpOpBase + 116, 0|(1ULL<<MCID::MayLoad), 0x10007be0010025ULL }, // Inst #1798 = IMUL32m_NF |
| 45359 | { 1797, 5, 0, 0, 167, 1, 3, 232, X86ImpOpBase + 261, 0|(1ULL<<MCID::MayLoad), 0xc007be0010025ULL }, // Inst #1797 = IMUL32m_EVEX |
| 45360 | { 1796, 5, 0, 0, 167, 1, 3, 232, X86ImpOpBase + 261, 0|(1ULL<<MCID::MayLoad), 0x7b80000125ULL }, // Inst #1796 = IMUL32m |
| 45361 | { 1795, 3, 1, 0, 166, 0, 0, 362, X86ImpOpBase + 0, 0, 0x100034e0110829ULL }, // Inst #1795 = IMUL16rri_NF |
| 45362 | { 1794, 3, 1, 0, 166, 0, 1, 362, X86ImpOpBase + 0, 0, 0xc0034e0110829ULL }, // Inst #1794 = IMUL16rri_EVEX |
| 45363 | { 1793, 3, 1, 0, 166, 0, 0, 362, X86ImpOpBase + 0, 0, 0x100035e0050829ULL }, // Inst #1793 = IMUL16rri8_NF |
| 45364 | { 1792, 3, 1, 0, 166, 0, 1, 362, X86ImpOpBase + 0, 0, 0xc0035e0050829ULL }, // Inst #1792 = IMUL16rri8_EVEX |
| 45365 | { 1791, 3, 1, 0, 166, 0, 1, 362, X86ImpOpBase + 0, 0, 0x35800400a9ULL }, // Inst #1791 = IMUL16rri8 |
| 45366 | { 1790, 3, 1, 0, 166, 0, 1, 362, X86ImpOpBase + 0, 0, 0x34801000a9ULL }, // Inst #1790 = IMUL16rri |
| 45367 | { 1789, 3, 1, 0, 165, 0, 0, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1010d7e0010829ULL }, // Inst #1789 = IMUL16rr_NF_ND |
| 45368 | { 1788, 3, 1, 0, 165, 0, 0, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100057e0010829ULL }, // Inst #1788 = IMUL16rr_NF |
| 45369 | { 1787, 3, 1, 0, 165, 0, 1, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10d7e0010829ULL }, // Inst #1787 = IMUL16rr_ND |
| 45370 | { 1786, 3, 1, 0, 165, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0057e0010829ULL }, // Inst #1786 = IMUL16rr_EVEX |
| 45371 | { 1785, 3, 1, 0, 165, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x57800020a9ULL }, // Inst #1785 = IMUL16rr |
| 45372 | { 1784, 7, 1, 0, 164, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100034e0110819ULL }, // Inst #1784 = IMUL16rmi_NF |
| 45373 | { 1783, 7, 1, 0, 164, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0034e0110819ULL }, // Inst #1783 = IMUL16rmi_EVEX |
| 45374 | { 1782, 7, 1, 0, 164, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100035e0050819ULL }, // Inst #1782 = IMUL16rmi8_NF |
| 45375 | { 1781, 7, 1, 0, 164, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0035e0050819ULL }, // Inst #1781 = IMUL16rmi8_EVEX |
| 45376 | { 1780, 7, 1, 0, 164, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3580040099ULL }, // Inst #1780 = IMUL16rmi8 |
| 45377 | { 1779, 7, 1, 0, 164, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3480100099ULL }, // Inst #1779 = IMUL16rmi |
| 45378 | { 1778, 7, 1, 0, 163, 0, 0, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010d7e0010819ULL }, // Inst #1778 = IMUL16rm_NF_ND |
| 45379 | { 1777, 7, 1, 0, 163, 0, 0, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100057e0010819ULL }, // Inst #1777 = IMUL16rm_NF |
| 45380 | { 1776, 7, 1, 0, 163, 0, 1, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10d7e0010819ULL }, // Inst #1776 = IMUL16rm_ND |
| 45381 | { 1775, 7, 1, 0, 163, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0057e0010819ULL }, // Inst #1775 = IMUL16rm_EVEX |
| 45382 | { 1774, 7, 1, 0, 163, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5780002099ULL }, // Inst #1774 = IMUL16rm |
| 45383 | { 1773, 1, 0, 0, 162, 1, 2, 599, X86ImpOpBase + 172, 0, 0x10007be0010835ULL }, // Inst #1773 = IMUL16r_NF |
| 45384 | { 1772, 1, 0, 0, 162, 1, 3, 599, X86ImpOpBase + 257, 0, 0xc007be0010835ULL }, // Inst #1772 = IMUL16r_EVEX |
| 45385 | { 1771, 1, 0, 0, 162, 1, 3, 599, X86ImpOpBase + 257, 0, 0x7b800000b5ULL }, // Inst #1771 = IMUL16r |
| 45386 | { 1770, 5, 0, 0, 161, 1, 2, 232, X86ImpOpBase + 172, 0|(1ULL<<MCID::MayLoad), 0x10007be0010825ULL }, // Inst #1770 = IMUL16m_NF |
| 45387 | { 1769, 5, 0, 0, 161, 1, 3, 232, X86ImpOpBase + 257, 0|(1ULL<<MCID::MayLoad), 0xc007be0010825ULL }, // Inst #1769 = IMUL16m_EVEX |
| 45388 | { 1768, 5, 0, 0, 161, 1, 3, 232, X86ImpOpBase + 257, 0|(1ULL<<MCID::MayLoad), 0x7b800000a5ULL }, // Inst #1768 = IMUL16m |
| 45389 | { 1767, 6, 1, 0, 72, 1, 1, 1096, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1767 = ILD_Fp64m80 |
| 45390 | { 1766, 6, 1, 0, 72, 1, 1, 1090, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1766 = ILD_Fp64m64 |
| 45391 | { 1765, 6, 1, 0, 72, 1, 1, 1084, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1765 = ILD_Fp64m32 |
| 45392 | { 1764, 6, 1, 0, 72, 1, 1, 1096, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1764 = ILD_Fp32m80 |
| 45393 | { 1763, 6, 1, 0, 72, 1, 1, 1090, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1763 = ILD_Fp32m64 |
| 45394 | { 1762, 6, 1, 0, 72, 1, 1, 1084, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1762 = ILD_Fp32m32 |
| 45395 | { 1761, 6, 1, 0, 72, 1, 1, 1096, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1761 = ILD_Fp16m80 |
| 45396 | { 1760, 6, 1, 0, 72, 1, 1, 1090, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1760 = ILD_Fp16m64 |
| 45397 | { 1759, 6, 1, 0, 72, 1, 1, 1084, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1759 = ILD_Fp16m32 |
| 45398 | { 1758, 5, 0, 0, 624, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000025ULL }, // Inst #1758 = ILD_F64m |
| 45399 | { 1757, 5, 0, 0, 624, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000020ULL }, // Inst #1757 = ILD_F32m |
| 45400 | { 1756, 5, 0, 0, 624, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000020ULL }, // Inst #1756 = ILD_F16m |
| 45401 | { 1755, 1, 0, 0, 160, 1, 2, 1051, X86ImpOpBase + 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007b60010037ULL }, // Inst #1755 = IDIV8r_NF |
| 45402 | { 1754, 1, 0, 0, 160, 1, 3, 1051, X86ImpOpBase + 204, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007b60010037ULL }, // Inst #1754 = IDIV8r_EVEX |
| 45403 | { 1753, 1, 0, 0, 160, 1, 3, 1051, X86ImpOpBase + 204, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000037ULL }, // Inst #1753 = IDIV8r |
| 45404 | { 1752, 5, 0, 0, 159, 1, 2, 232, X86ImpOpBase + 208, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007b60010027ULL }, // Inst #1752 = IDIV8m_NF |
| 45405 | { 1751, 5, 0, 0, 159, 1, 3, 232, X86ImpOpBase + 204, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007b60010027ULL }, // Inst #1751 = IDIV8m_EVEX |
| 45406 | { 1750, 5, 0, 0, 159, 1, 3, 232, X86ImpOpBase + 204, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000027ULL }, // Inst #1750 = IDIV8m |
| 45407 | { 1749, 1, 0, 0, 158, 2, 2, 203, X86ImpOpBase + 200, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0030037ULL }, // Inst #1749 = IDIV64r_NF |
| 45408 | { 1748, 1, 0, 0, 158, 2, 3, 203, X86ImpOpBase + 195, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0030037ULL }, // Inst #1748 = IDIV64r_EVEX |
| 45409 | { 1747, 1, 0, 0, 158, 2, 3, 203, X86ImpOpBase + 195, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020037ULL }, // Inst #1747 = IDIV64r |
| 45410 | { 1746, 5, 0, 0, 157, 2, 2, 232, X86ImpOpBase + 200, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0030027ULL }, // Inst #1746 = IDIV64m_NF |
| 45411 | { 1745, 5, 0, 0, 157, 2, 3, 232, X86ImpOpBase + 195, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0030027ULL }, // Inst #1745 = IDIV64m_EVEX |
| 45412 | { 1744, 5, 0, 0, 157, 2, 3, 232, X86ImpOpBase + 195, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020027ULL }, // Inst #1744 = IDIV64m |
| 45413 | { 1743, 1, 0, 0, 156, 2, 2, 202, X86ImpOpBase + 191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010037ULL }, // Inst #1743 = IDIV32r_NF |
| 45414 | { 1742, 1, 0, 0, 156, 2, 3, 202, X86ImpOpBase + 186, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010037ULL }, // Inst #1742 = IDIV32r_EVEX |
| 45415 | { 1741, 1, 0, 0, 156, 2, 3, 202, X86ImpOpBase + 186, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000137ULL }, // Inst #1741 = IDIV32r |
| 45416 | { 1740, 5, 0, 0, 155, 2, 2, 232, X86ImpOpBase + 191, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010027ULL }, // Inst #1740 = IDIV32m_NF |
| 45417 | { 1739, 5, 0, 0, 155, 2, 3, 232, X86ImpOpBase + 186, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010027ULL }, // Inst #1739 = IDIV32m_EVEX |
| 45418 | { 1738, 5, 0, 0, 155, 2, 3, 232, X86ImpOpBase + 186, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000127ULL }, // Inst #1738 = IDIV32m |
| 45419 | { 1737, 1, 0, 0, 154, 2, 2, 599, X86ImpOpBase + 182, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010837ULL }, // Inst #1737 = IDIV16r_NF |
| 45420 | { 1736, 1, 0, 0, 154, 2, 3, 599, X86ImpOpBase + 177, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010837ULL }, // Inst #1736 = IDIV16r_EVEX |
| 45421 | { 1735, 1, 0, 0, 154, 2, 3, 599, X86ImpOpBase + 177, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b800000b7ULL }, // Inst #1735 = IDIV16r |
| 45422 | { 1734, 5, 0, 0, 153, 2, 2, 232, X86ImpOpBase + 182, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010827ULL }, // Inst #1734 = IDIV16m_NF |
| 45423 | { 1733, 5, 0, 0, 153, 2, 3, 232, X86ImpOpBase + 177, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010827ULL }, // Inst #1733 = IDIV16m_EVEX |
| 45424 | { 1732, 5, 0, 0, 153, 2, 3, 232, X86ImpOpBase + 177, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b800000a7ULL }, // Inst #1732 = IDIV16m |
| 45425 | { 1731, 3, 1, 0, 152, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x3e88003829ULL }, // Inst #1731 = HSUBPSrr |
| 45426 | { 1730, 7, 1, 0, 151, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3e88003819ULL }, // Inst #1730 = HSUBPSrm |
| 45427 | { 1729, 3, 1, 0, 152, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x3e90002829ULL }, // Inst #1729 = HSUBPDrr |
| 45428 | { 1728, 7, 1, 0, 151, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3e90002819ULL }, // Inst #1728 = HSUBPDrm |
| 45429 | { 1727, 1, 0, 0, 8, 1, 0, 1, X86ImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7800047040ULL }, // Inst #1727 = HRESET |
| 45430 | { 1726, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7a00000001ULL }, // Inst #1726 = HLT |
| 45431 | { 1725, 3, 1, 0, 152, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x3e08003829ULL }, // Inst #1725 = HADDPSrr |
| 45432 | { 1724, 7, 1, 0, 151, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3e08003819ULL }, // Inst #1724 = HADDPSrm |
| 45433 | { 1723, 3, 1, 0, 152, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x3e10002829ULL }, // Inst #1723 = HADDPDrr |
| 45434 | { 1722, 7, 1, 0, 151, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3e10002819ULL }, // Inst #1722 = HADDPDrm |
| 45435 | { 1721, 0, 0, 0, 31, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x328000000aULL }, // Inst #1721 = GS_PREFIX |
| 45436 | { 1720, 3, 1, 0, 1667, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x6798004829ULL }, // Inst #1720 = GF2P8MULBrr |
| 45437 | { 1719, 7, 1, 0, 1661, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6798004819ULL }, // Inst #1719 = GF2P8MULBrm |
| 45438 | { 1718, 4, 1, 0, 1666, 0, 0, 585, X86ImpOpBase + 0, 0, 0x6718046829ULL }, // Inst #1718 = GF2P8AFFINEQBrri |
| 45439 | { 1717, 8, 1, 0, 1660, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6718046819ULL }, // Inst #1717 = GF2P8AFFINEQBrmi |
| 45440 | { 1716, 4, 1, 0, 1666, 0, 0, 585, X86ImpOpBase + 0, 0, 0x6798046829ULL }, // Inst #1716 = GF2P8AFFINEINVQBrri |
| 45441 | { 1715, 8, 1, 0, 1660, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6798046819ULL }, // Inst #1715 = GF2P8AFFINEINVQBrmi |
| 45442 | { 1714, 0, 0, 0, 8, 4, 3, 1, X86ImpOpBase + 250, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1b80002001ULL }, // Inst #1714 = GETSEC |
| 45443 | { 1713, 0, 0, 0, 732, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000079ULL }, // Inst #1713 = FYL2XP1 |
| 45444 | { 1712, 0, 0, 0, 731, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000071ULL }, // Inst #1712 = FYL2X |
| 45445 | { 1711, 0, 0, 0, 827, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000074ULL }, // Inst #1711 = FXTRACT |
| 45446 | { 1710, 5, 0, 0, 729, 2, 0, 232, X86ImpOpBase + 239, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700022020ULL }, // Inst #1710 = FXSAVE64 |
| 45447 | { 1709, 5, 0, 0, 729, 2, 0, 232, X86ImpOpBase + 239, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002020ULL }, // Inst #1709 = FXSAVE |
| 45448 | { 1708, 5, 0, 0, 891, 0, 2, 232, X86ImpOpBase + 239, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700022021ULL }, // Inst #1708 = FXRSTOR64 |
| 45449 | { 1707, 5, 0, 0, 730, 0, 2, 232, X86ImpOpBase + 239, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002021ULL }, // Inst #1707 = FXRSTOR |
| 45450 | { 1706, 0, 0, 0, 31, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x320000000aULL }, // Inst #1706 = FS_PREFIX |
| 45451 | { 1705, 5, 0, 0, 892, 2, 2, 232, X86ImpOpBase + 246, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000026ULL }, // Inst #1705 = FSTENVm |
| 45452 | { 1704, 0, 0, 0, 734, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007bULL }, // Inst #1704 = FSINCOS |
| 45453 | { 1703, 0, 0, 0, 734, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007eULL }, // Inst #1703 = FSIN |
| 45454 | { 1702, 0, 0, 0, 720, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007dULL }, // Inst #1702 = FSCALE |
| 45455 | { 1701, 5, 0, 0, 825, 2, 2, 232, X86ImpOpBase + 246, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000026ULL }, // Inst #1701 = FSAVEm |
| 45456 | { 1700, 5, 0, 0, 826, 0, 2, 232, X86ImpOpBase + 239, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000024ULL }, // Inst #1700 = FRSTORm |
| 45457 | { 1699, 0, 0, 0, 709, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007cULL }, // Inst #1699 = FRNDINT |
| 45458 | { 1698, 0, 0, 0, 733, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000072ULL }, // Inst #1698 = FPTAN |
| 45459 | { 1697, 0, 0, 0, 716, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000075ULL }, // Inst #1697 = FPREM1 |
| 45460 | { 1696, 0, 0, 0, 712, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000078ULL }, // Inst #1696 = FPREM |
| 45461 | { 1695, 0, 0, 0, 735, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000073ULL }, // Inst #1695 = FPATAN |
| 45462 | { 1694, 6, 0, 0, 0, 0, 1, 1078, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1694 = FP80_TO_INT64_IN_MEM |
| 45463 | { 1693, 6, 0, 0, 0, 0, 1, 1078, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1693 = FP80_TO_INT32_IN_MEM |
| 45464 | { 1692, 6, 0, 0, 0, 0, 1, 1078, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1692 = FP80_TO_INT16_IN_MEM |
| 45465 | { 1691, 3, 1, 0, 0, 0, 1, 538, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1691 = FP80_ADDr |
| 45466 | { 1690, 7, 1, 0, 0, 0, 1, 541, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1690 = FP80_ADDm32 |
| 45467 | { 1689, 6, 0, 0, 0, 0, 1, 1072, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1689 = FP64_TO_INT64_IN_MEM |
| 45468 | { 1688, 6, 0, 0, 0, 0, 1, 1072, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1688 = FP64_TO_INT32_IN_MEM |
| 45469 | { 1687, 6, 0, 0, 0, 0, 1, 1072, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1687 = FP64_TO_INT16_IN_MEM |
| 45470 | { 1686, 6, 0, 0, 0, 0, 1, 1066, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1686 = FP32_TO_INT64_IN_MEM |
| 45471 | { 1685, 6, 0, 0, 0, 0, 1, 1066, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1685 = FP32_TO_INT32_IN_MEM |
| 45472 | { 1684, 6, 0, 0, 0, 0, 1, 1066, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1684 = FP32_TO_INT16_IN_MEM |
| 45473 | { 1683, 5, 0, 0, 782, 1, 1, 232, X86ImpOpBase + 244, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000027ULL }, // Inst #1683 = FNSTSWm |
| 45474 | { 1682, 0, 0, 0, 748, 1, 2, 1, X86ImpOpBase + 241, 0, 0x6f80000060ULL }, // Inst #1682 = FNSTSW16r |
| 45475 | { 1681, 5, 0, 0, 681, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000027ULL }, // Inst #1681 = FNSTCW16m |
| 45476 | { 1680, 0, 0, 0, 740, 0, 1, 1, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000050ULL }, // Inst #1680 = FNOP |
| 45477 | { 1679, 0, 0, 0, 714, 0, 2, 1, X86ImpOpBase + 239, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000063ULL }, // Inst #1679 = FNINIT |
| 45478 | { 1678, 0, 0, 0, 702, 0, 1, 1, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000062ULL }, // Inst #1678 = FNCLEX |
| 45479 | { 1677, 0, 0, 0, 147, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000006bULL }, // Inst #1677 = FLDPI |
| 45480 | { 1676, 0, 0, 0, 147, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000006dULL }, // Inst #1676 = FLDLN2 |
| 45481 | { 1675, 0, 0, 0, 147, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000006cULL }, // Inst #1675 = FLDLG2 |
| 45482 | { 1674, 0, 0, 0, 147, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000069ULL }, // Inst #1674 = FLDL2T |
| 45483 | { 1673, 0, 0, 0, 147, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000006aULL }, // Inst #1673 = FLDL2E |
| 45484 | { 1672, 5, 0, 0, 890, 0, 2, 232, X86ImpOpBase + 239, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000024ULL }, // Inst #1672 = FLDENVm |
| 45485 | { 1671, 5, 0, 0, 665, 0, 2, 232, X86ImpOpBase + 239, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000025ULL }, // Inst #1671 = FLDCW16m |
| 45486 | { 1670, 0, 0, 0, 838, 0, 1, 1, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000077ULL }, // Inst #1670 = FINCSTP |
| 45487 | { 1669, 5, 0, 0, 798, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000023ULL }, // Inst #1669 = FICOMP32m |
| 45488 | { 1668, 5, 0, 0, 798, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000023ULL }, // Inst #1668 = FICOMP16m |
| 45489 | { 1667, 5, 0, 0, 798, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000022ULL }, // Inst #1667 = FICOM32m |
| 45490 | { 1666, 5, 0, 0, 798, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000022ULL }, // Inst #1666 = FICOM16m |
| 45491 | { 1665, 1, 0, 0, 824, 0, 1, 517, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000030ULL }, // Inst #1665 = FFREEP |
| 45492 | { 1664, 1, 0, 0, 824, 0, 1, 517, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000030ULL }, // Inst #1664 = FFREE |
| 45493 | { 1663, 0, 0, 0, 146, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x700002001ULL }, // Inst #1663 = FEMMS |
| 45494 | { 1662, 0, 0, 0, 739, 0, 1, 1, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000076ULL }, // Inst #1662 = FDECSTP |
| 45495 | { 1661, 0, 0, 0, 734, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007fULL }, // Inst #1661 = FCOS |
| 45496 | { 1660, 0, 0, 0, 614, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000059ULL }, // Inst #1660 = FCOMPP |
| 45497 | { 1659, 5, 0, 0, 906, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000023ULL }, // Inst #1659 = FCOMP64m |
| 45498 | { 1658, 5, 0, 0, 906, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000023ULL }, // Inst #1658 = FCOMP32m |
| 45499 | { 1657, 5, 0, 0, 906, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000022ULL }, // Inst #1657 = FCOM64m |
| 45500 | { 1656, 5, 0, 0, 906, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000022ULL }, // Inst #1656 = FCOM32m |
| 45501 | { 1655, 5, 0, 0, 832, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000026ULL }, // Inst #1655 = FBSTPm |
| 45502 | { 1654, 5, 0, 0, 823, 0, 1, 232, X86ImpOpBase + 52, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000024ULL }, // Inst #1654 = FBLDm |
| 45503 | { 1653, 5, 0, 0, 781, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80020025ULL }, // Inst #1653 = FARJMP64m |
| 45504 | { 1652, 5, 0, 0, 6, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80000125ULL }, // Inst #1652 = FARJMP32m |
| 45505 | { 1651, 2, 0, 0, 4, 0, 0, 21, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7500180108ULL }, // Inst #1651 = FARJMP32i |
| 45506 | { 1650, 5, 0, 0, 6, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f800000a5ULL }, // Inst #1650 = FARJMP16m |
| 45507 | { 1649, 2, 0, 0, 4, 0, 0, 21, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7500100088ULL }, // Inst #1649 = FARJMP16i |
| 45508 | { 1648, 5, 0, 0, 791, 2, 0, 232, X86ImpOpBase + 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80020023ULL }, // Inst #1648 = FARCALL64m |
| 45509 | { 1647, 5, 0, 0, 6, 2, 0, 232, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80000123ULL }, // Inst #1647 = FARCALL32m |
| 45510 | { 1646, 2, 0, 0, 4, 2, 0, 21, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x4d00180108ULL }, // Inst #1646 = FARCALL32i |
| 45511 | { 1645, 5, 0, 0, 6, 2, 0, 232, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f800000a3ULL }, // Inst #1645 = FARCALL16m |
| 45512 | { 1644, 2, 0, 0, 4, 2, 0, 21, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x4d00100088ULL }, // Inst #1644 = FARCALL16i |
| 45513 | { 1643, 0, 0, 0, 725, 1, 1, 1, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000070ULL }, // Inst #1643 = F2XM1 |
| 45514 | { 1642, 4, 1, 0, 987, 0, 0, 1062, X86ImpOpBase + 0, 0, 0x3c1804282fULL }, // Inst #1642 = EXTRQI |
| 45515 | { 1641, 3, 1, 0, 1032, 0, 0, 494, X86ImpOpBase + 0, 0, 0x3c98002829ULL }, // Inst #1641 = EXTRQ |
| 45516 | { 1640, 3, 1, 0, 751, 0, 0, 1059, X86ImpOpBase + 0, 0, 0xb88046828ULL }, // Inst #1640 = EXTRACTPSrri |
| 45517 | { 1639, 7, 0, 0, 764, 0, 0, 1052, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0xb88046818ULL }, // Inst #1639 = EXTRACTPSmri |
| 45518 | { 1638, 0, 0, 0, 31, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x130000000aULL }, // Inst #1638 = ES_PREFIX |
| 45519 | { 1637, 0, 0, 0, 8, 0, 2, 1, X86ImpOpBase + 237, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000304aULL }, // Inst #1637 = ERETU |
| 45520 | { 1636, 0, 0, 0, 8, 0, 2, 1, X86ImpOpBase + 237, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000384aULL }, // Inst #1636 = ERETS |
| 45521 | { 1635, 2, 0, 0, 706, 0, 0, 21, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6400100007ULL }, // Inst #1635 = ENTER |
| 45522 | { 1634, 6, 0, 0, 141, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60011619ULL }, // Inst #1634 = ENQCMDS64_EVEX |
| 45523 | { 1633, 6, 0, 0, 1751, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005619ULL }, // Inst #1633 = ENQCMDS64 |
| 45524 | { 1632, 6, 0, 0, 141, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60011419ULL }, // Inst #1632 = ENQCMDS32_EVEX |
| 45525 | { 1631, 6, 0, 0, 1751, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005419ULL }, // Inst #1631 = ENQCMDS32 |
| 45526 | { 1630, 6, 0, 0, 1751, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005219ULL }, // Inst #1630 = ENQCMDS16 |
| 45527 | { 1629, 6, 0, 0, 141, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60011e19ULL }, // Inst #1629 = ENQCMD64_EVEX |
| 45528 | { 1628, 6, 0, 0, 1751, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005e19ULL }, // Inst #1628 = ENQCMD64 |
| 45529 | { 1627, 6, 0, 0, 141, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60011c19ULL }, // Inst #1627 = ENQCMD32_EVEX |
| 45530 | { 1626, 6, 0, 0, 1751, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005c19ULL }, // Inst #1626 = ENQCMD32 |
| 45531 | { 1625, 6, 0, 0, 1751, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005a19ULL }, // Inst #1625 = ENQCMD16 |
| 45532 | { 1624, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf0000307aULL }, // Inst #1624 = ENDBR64 |
| 45533 | { 1623, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf0000307bULL }, // Inst #1623 = ENDBR32 |
| 45534 | { 1622, 2, 1, 0, 8, 2, 8, 573, X86ImpOpBase + 227, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d80005029ULL }, // Inst #1622 = ENCODEKEY256 |
| 45535 | { 1621, 2, 1, 0, 8, 1, 7, 573, X86ImpOpBase + 219, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d00005029ULL }, // Inst #1621 = ENCODEKEY128 |
| 45536 | { 1620, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002040ULL }, // Inst #1620 = ENCLV |
| 45537 | { 1619, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002057ULL }, // Inst #1619 = ENCLU |
| 45538 | { 1618, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000204fULL }, // Inst #1618 = ENCLS |
| 45539 | { 1617, 1, 0, 0, 8, 0, 0, 600, X86ImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1617 = EH_SjLj_Setup |
| 45540 | { 1616, 6, 1, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1616 = EH_SjLj_SetJmp64 |
| 45541 | { 1615, 6, 1, 0, 8, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1615 = EH_SjLj_SetJmp32 |
| 45542 | { 1614, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1614 = EH_SjLj_LongJmp64 |
| 45543 | { 1613, 5, 0, 0, 8, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1613 = EH_SjLj_LongJmp32 |
| 45544 | { 1612, 1, 0, 0, 8, 0, 0, 203, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x6180000001ULL }, // Inst #1612 = EH_RETURN64 |
| 45545 | { 1611, 1, 0, 0, 8, 0, 0, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x6180000001ULL }, // Inst #1611 = EH_RETURN |
| 45546 | { 1610, 1, 0, 0, 8, 1, 3, 203, X86ImpOpBase + 215, 0, 0x0ULL }, // Inst #1610 = DYN_ALLOCA_64 |
| 45547 | { 1609, 1, 0, 0, 8, 1, 3, 202, X86ImpOpBase + 211, 0, 0x0ULL }, // Inst #1609 = DYN_ALLOCA_32 |
| 45548 | { 1608, 0, 0, 0, 31, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1f0000000aULL }, // Inst #1608 = DS_PREFIX |
| 45549 | { 1607, 4, 1, 0, 140, 1, 0, 585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2008046829ULL }, // Inst #1607 = DPPSrri |
| 45550 | { 1606, 8, 1, 0, 139, 1, 0, 577, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2008046819ULL }, // Inst #1606 = DPPSrmi |
| 45551 | { 1605, 4, 1, 0, 138, 1, 0, 585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2090046829ULL }, // Inst #1605 = DPPDrri |
| 45552 | { 1604, 8, 1, 0, 137, 1, 0, 577, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2090046819ULL }, // Inst #1604 = DPPDrmi |
| 45553 | { 1603, 1, 0, 0, 1502, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000037ULL }, // Inst #1603 = DIV_FrST0 |
| 45554 | { 1602, 7, 1, 0, 132, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1602 = DIV_FpI32m80 |
| 45555 | { 1601, 7, 1, 0, 132, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1601 = DIV_FpI32m64 |
| 45556 | { 1600, 7, 1, 0, 132, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1600 = DIV_FpI32m32 |
| 45557 | { 1599, 7, 1, 0, 132, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1599 = DIV_FpI16m80 |
| 45558 | { 1598, 7, 1, 0, 132, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1598 = DIV_FpI16m64 |
| 45559 | { 1597, 7, 1, 0, 132, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1597 = DIV_FpI16m32 |
| 45560 | { 1596, 7, 1, 0, 132, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1596 = DIV_Fp80m64 |
| 45561 | { 1595, 7, 1, 0, 132, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1595 = DIV_Fp80m32 |
| 45562 | { 1594, 3, 1, 0, 0, 1, 1, 538, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #1594 = DIV_Fp80 |
| 45563 | { 1593, 7, 1, 0, 132, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1593 = DIV_Fp64m32 |
| 45564 | { 1592, 7, 1, 0, 132, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1592 = DIV_Fp64m |
| 45565 | { 1591, 3, 1, 0, 0, 1, 1, 528, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #1591 = DIV_Fp64 |
| 45566 | { 1590, 7, 1, 0, 132, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1590 = DIV_Fp32m |
| 45567 | { 1589, 3, 1, 0, 0, 1, 1, 518, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #1589 = DIV_Fp32 |
| 45568 | { 1588, 1, 0, 0, 882, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000036ULL }, // Inst #1588 = DIV_FST0r |
| 45569 | { 1587, 1, 0, 0, 1502, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000037ULL }, // Inst #1587 = DIV_FPrST0 |
| 45570 | { 1586, 5, 0, 0, 803, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000026ULL }, // Inst #1586 = DIV_FI32m |
| 45571 | { 1585, 5, 0, 0, 803, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000026ULL }, // Inst #1585 = DIV_FI16m |
| 45572 | { 1584, 5, 0, 0, 802, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000026ULL }, // Inst #1584 = DIV_F64m |
| 45573 | { 1583, 5, 0, 0, 802, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000026ULL }, // Inst #1583 = DIV_F32m |
| 45574 | { 1582, 3, 1, 0, 133, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f08003029ULL }, // Inst #1582 = DIVSSrr_Int |
| 45575 | { 1581, 3, 1, 0, 133, 1, 0, 514, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f08003029ULL }, // Inst #1581 = DIVSSrr |
| 45576 | { 1580, 7, 1, 0, 136, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f08003019ULL }, // Inst #1580 = DIVSSrm_Int |
| 45577 | { 1579, 7, 1, 0, 136, 1, 0, 507, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f08003019ULL }, // Inst #1579 = DIVSSrm |
| 45578 | { 1578, 3, 1, 0, 135, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f10003829ULL }, // Inst #1578 = DIVSDrr_Int |
| 45579 | { 1577, 3, 1, 0, 135, 1, 0, 504, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f10003829ULL }, // Inst #1577 = DIVSDrr |
| 45580 | { 1576, 7, 1, 0, 1501, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f10003819ULL }, // Inst #1576 = DIVSDrm_Int |
| 45581 | { 1575, 7, 1, 0, 1747, 1, 0, 497, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f10003819ULL }, // Inst #1575 = DIVSDrm |
| 45582 | { 1574, 1, 0, 0, 1500, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000036ULL }, // Inst #1574 = DIVR_FrST0 |
| 45583 | { 1573, 7, 1, 0, 132, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1573 = DIVR_FpI32m80 |
| 45584 | { 1572, 7, 1, 0, 132, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1572 = DIVR_FpI32m64 |
| 45585 | { 1571, 7, 1, 0, 132, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1571 = DIVR_FpI32m32 |
| 45586 | { 1570, 7, 1, 0, 132, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1570 = DIVR_FpI16m80 |
| 45587 | { 1569, 7, 1, 0, 132, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1569 = DIVR_FpI16m64 |
| 45588 | { 1568, 7, 1, 0, 132, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1568 = DIVR_FpI16m32 |
| 45589 | { 1567, 7, 1, 0, 132, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1567 = DIVR_Fp80m64 |
| 45590 | { 1566, 7, 1, 0, 132, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1566 = DIVR_Fp80m32 |
| 45591 | { 1565, 7, 1, 0, 132, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1565 = DIVR_Fp64m32 |
| 45592 | { 1564, 7, 1, 0, 132, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1564 = DIVR_Fp64m |
| 45593 | { 1563, 7, 1, 0, 132, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1563 = DIVR_Fp32m |
| 45594 | { 1562, 1, 0, 0, 885, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000037ULL }, // Inst #1562 = DIVR_FST0r |
| 45595 | { 1561, 1, 0, 0, 1500, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000036ULL }, // Inst #1561 = DIVR_FPrST0 |
| 45596 | { 1560, 5, 0, 0, 884, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000027ULL }, // Inst #1560 = DIVR_FI32m |
| 45597 | { 1559, 5, 0, 0, 884, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000027ULL }, // Inst #1559 = DIVR_FI16m |
| 45598 | { 1558, 5, 0, 0, 883, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000027ULL }, // Inst #1558 = DIVR_F64m |
| 45599 | { 1557, 5, 0, 0, 883, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000027ULL }, // Inst #1557 = DIVR_F32m |
| 45600 | { 1556, 3, 1, 0, 131, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f08002029ULL }, // Inst #1556 = DIVPSrr |
| 45601 | { 1555, 7, 1, 0, 130, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f08002019ULL }, // Inst #1555 = DIVPSrm |
| 45602 | { 1554, 3, 1, 0, 129, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f10002829ULL }, // Inst #1554 = DIVPDrr |
| 45603 | { 1553, 7, 1, 0, 128, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f10002819ULL }, // Inst #1553 = DIVPDrm |
| 45604 | { 1552, 1, 0, 0, 127, 1, 2, 1051, X86ImpOpBase + 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007b60010036ULL }, // Inst #1552 = DIV8r_NF |
| 45605 | { 1551, 1, 0, 0, 127, 1, 3, 1051, X86ImpOpBase + 204, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007b60010036ULL }, // Inst #1551 = DIV8r_EVEX |
| 45606 | { 1550, 1, 0, 0, 127, 1, 3, 1051, X86ImpOpBase + 204, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000036ULL }, // Inst #1550 = DIV8r |
| 45607 | { 1549, 5, 0, 0, 126, 1, 2, 232, X86ImpOpBase + 208, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007b60010026ULL }, // Inst #1549 = DIV8m_NF |
| 45608 | { 1548, 5, 0, 0, 126, 1, 3, 232, X86ImpOpBase + 204, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007b60010026ULL }, // Inst #1548 = DIV8m_EVEX |
| 45609 | { 1547, 5, 0, 0, 126, 1, 3, 232, X86ImpOpBase + 204, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000026ULL }, // Inst #1547 = DIV8m |
| 45610 | { 1546, 1, 0, 0, 125, 2, 2, 203, X86ImpOpBase + 200, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0030036ULL }, // Inst #1546 = DIV64r_NF |
| 45611 | { 1545, 1, 0, 0, 125, 2, 3, 203, X86ImpOpBase + 195, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0030036ULL }, // Inst #1545 = DIV64r_EVEX |
| 45612 | { 1544, 1, 0, 0, 125, 2, 3, 203, X86ImpOpBase + 195, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020036ULL }, // Inst #1544 = DIV64r |
| 45613 | { 1543, 5, 0, 0, 124, 2, 2, 232, X86ImpOpBase + 200, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0030026ULL }, // Inst #1543 = DIV64m_NF |
| 45614 | { 1542, 5, 0, 0, 124, 2, 3, 232, X86ImpOpBase + 195, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0030026ULL }, // Inst #1542 = DIV64m_EVEX |
| 45615 | { 1541, 5, 0, 0, 124, 2, 3, 232, X86ImpOpBase + 195, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020026ULL }, // Inst #1541 = DIV64m |
| 45616 | { 1540, 1, 0, 0, 123, 2, 2, 202, X86ImpOpBase + 191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010036ULL }, // Inst #1540 = DIV32r_NF |
| 45617 | { 1539, 1, 0, 0, 123, 2, 3, 202, X86ImpOpBase + 186, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010036ULL }, // Inst #1539 = DIV32r_EVEX |
| 45618 | { 1538, 1, 0, 0, 123, 2, 3, 202, X86ImpOpBase + 186, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000136ULL }, // Inst #1538 = DIV32r |
| 45619 | { 1537, 5, 0, 0, 122, 2, 2, 232, X86ImpOpBase + 191, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010026ULL }, // Inst #1537 = DIV32m_NF |
| 45620 | { 1536, 5, 0, 0, 122, 2, 3, 232, X86ImpOpBase + 186, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010026ULL }, // Inst #1536 = DIV32m_EVEX |
| 45621 | { 1535, 5, 0, 0, 122, 2, 3, 232, X86ImpOpBase + 186, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000126ULL }, // Inst #1535 = DIV32m |
| 45622 | { 1534, 1, 0, 0, 121, 2, 2, 599, X86ImpOpBase + 182, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010836ULL }, // Inst #1534 = DIV16r_NF |
| 45623 | { 1533, 1, 0, 0, 121, 2, 3, 599, X86ImpOpBase + 177, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010836ULL }, // Inst #1533 = DIV16r_EVEX |
| 45624 | { 1532, 1, 0, 0, 121, 2, 3, 599, X86ImpOpBase + 177, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b800000b6ULL }, // Inst #1532 = DIV16r |
| 45625 | { 1531, 5, 0, 0, 120, 2, 2, 232, X86ImpOpBase + 182, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010826ULL }, // Inst #1531 = DIV16m_NF |
| 45626 | { 1530, 5, 0, 0, 120, 2, 3, 232, X86ImpOpBase + 177, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010826ULL }, // Inst #1530 = DIV16m_EVEX |
| 45627 | { 1529, 5, 0, 0, 120, 2, 3, 232, X86ImpOpBase + 177, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b800000a6ULL }, // Inst #1529 = DIV16m |
| 45628 | { 1528, 2, 1, 0, 1, 0, 0, 947, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ff60010031ULL }, // Inst #1528 = DEC8r_NF_ND |
| 45629 | { 1527, 2, 1, 0, 1, 0, 0, 1049, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007f60010031ULL }, // Inst #1527 = DEC8r_NF |
| 45630 | { 1526, 2, 1, 0, 1, 0, 1, 947, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ff60010031ULL }, // Inst #1526 = DEC8r_ND |
| 45631 | { 1525, 2, 1, 0, 1, 0, 1, 1049, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007f60010031ULL }, // Inst #1525 = DEC8r_EVEX |
| 45632 | { 1524, 2, 1, 0, 1, 0, 1, 1049, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f00000031ULL }, // Inst #1524 = DEC8r |
| 45633 | { 1523, 6, 1, 0, 927, 0, 0, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010ff60010021ULL }, // Inst #1523 = DEC8m_NF_ND |
| 45634 | { 1522, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007f60010021ULL }, // Inst #1522 = DEC8m_NF |
| 45635 | { 1521, 6, 1, 0, 927, 0, 1, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10ff60010021ULL }, // Inst #1521 = DEC8m_ND |
| 45636 | { 1520, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007f60010021ULL }, // Inst #1520 = DEC8m_EVEX |
| 45637 | { 1519, 5, 0, 0, 1457, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f00000021ULL }, // Inst #1519 = DEC8m |
| 45638 | { 1518, 2, 1, 0, 1, 0, 0, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0030031ULL }, // Inst #1518 = DEC64r_NF_ND |
| 45639 | { 1517, 2, 1, 0, 1, 0, 0, 322, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0030031ULL }, // Inst #1517 = DEC64r_NF |
| 45640 | { 1516, 2, 1, 0, 1, 0, 1, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0030031ULL }, // Inst #1516 = DEC64r_ND |
| 45641 | { 1515, 2, 1, 0, 1, 0, 1, 322, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0030031ULL }, // Inst #1515 = DEC64r_EVEX |
| 45642 | { 1514, 2, 1, 0, 1452, 0, 1, 322, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80020031ULL }, // Inst #1514 = DEC64r |
| 45643 | { 1513, 6, 1, 0, 927, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0030021ULL }, // Inst #1513 = DEC64m_NF_ND |
| 45644 | { 1512, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0030021ULL }, // Inst #1512 = DEC64m_NF |
| 45645 | { 1511, 6, 1, 0, 927, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10ffe0030021ULL }, // Inst #1511 = DEC64m_ND |
| 45646 | { 1510, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0030021ULL }, // Inst #1510 = DEC64m_EVEX |
| 45647 | { 1509, 5, 0, 0, 1202, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80020021ULL }, // Inst #1509 = DEC64m |
| 45648 | { 1508, 2, 1, 0, 1499, 0, 1, 320, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x2400000102ULL }, // Inst #1508 = DEC32r_alt |
| 45649 | { 1507, 2, 1, 0, 1, 0, 0, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0010031ULL }, // Inst #1507 = DEC32r_NF_ND |
| 45650 | { 1506, 2, 1, 0, 1, 0, 0, 320, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0010031ULL }, // Inst #1506 = DEC32r_NF |
| 45651 | { 1505, 2, 1, 0, 1, 0, 1, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0010031ULL }, // Inst #1505 = DEC32r_ND |
| 45652 | { 1504, 2, 1, 0, 1, 0, 1, 320, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0010031ULL }, // Inst #1504 = DEC32r_EVEX |
| 45653 | { 1503, 2, 1, 0, 1, 0, 1, 320, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000131ULL }, // Inst #1503 = DEC32r |
| 45654 | { 1502, 6, 1, 0, 927, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0010021ULL }, // Inst #1502 = DEC32m_NF_ND |
| 45655 | { 1501, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0010021ULL }, // Inst #1501 = DEC32m_NF |
| 45656 | { 1500, 6, 1, 0, 927, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10ffe0010021ULL }, // Inst #1500 = DEC32m_ND |
| 45657 | { 1499, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0010021ULL }, // Inst #1499 = DEC32m_EVEX |
| 45658 | { 1498, 5, 0, 0, 1202, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000121ULL }, // Inst #1498 = DEC32m |
| 45659 | { 1497, 2, 1, 0, 1497, 0, 1, 595, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x2400000082ULL }, // Inst #1497 = DEC16r_alt |
| 45660 | { 1496, 2, 1, 0, 1, 0, 0, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0010831ULL }, // Inst #1496 = DEC16r_NF_ND |
| 45661 | { 1495, 2, 1, 0, 1, 0, 0, 595, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0010831ULL }, // Inst #1495 = DEC16r_NF |
| 45662 | { 1494, 2, 1, 0, 1, 0, 1, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0010831ULL }, // Inst #1494 = DEC16r_ND |
| 45663 | { 1493, 2, 1, 0, 1, 0, 1, 595, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0010831ULL }, // Inst #1493 = DEC16r_EVEX |
| 45664 | { 1492, 2, 1, 0, 1, 0, 1, 595, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f800000b1ULL }, // Inst #1492 = DEC16r |
| 45665 | { 1491, 6, 1, 0, 927, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0010821ULL }, // Inst #1491 = DEC16m_NF_ND |
| 45666 | { 1490, 5, 0, 0, 926, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0010821ULL }, // Inst #1490 = DEC16m_NF |
| 45667 | { 1489, 6, 1, 0, 927, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10ffe0010821ULL }, // Inst #1489 = DEC16m_ND |
| 45668 | { 1488, 5, 0, 0, 926, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0010821ULL }, // Inst #1488 = DEC16m_EVEX |
| 45669 | { 1487, 5, 0, 0, 1202, 0, 1, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f800000a1ULL }, // Inst #1487 = DEC16m |
| 45670 | { 1486, 0, 0, 0, 31, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x330000000aULL }, // Inst #1486 = DATA16_PREFIX |
| 45671 | { 1485, 0, 0, 0, 697, 2, 2, 1, X86ImpOpBase + 65, 0, 0x1780000001ULL }, // Inst #1485 = DAS |
| 45672 | { 1484, 0, 0, 0, 695, 2, 2, 1, X86ImpOpBase + 65, 0, 0x1380000001ULL }, // Inst #1484 = DAA |
| 45673 | { 1483, 0, 0, 0, 1481, 1, 1, 1, X86ImpOpBase + 175, 0, 0x4c00000101ULL }, // Inst #1483 = CWDE |
| 45674 | { 1482, 0, 0, 0, 747, 1, 2, 1, X86ImpOpBase + 172, 0, 0x4c80000081ULL }, // Inst #1482 = CWD |
| 45675 | { 1481, 2, 1, 0, 978, 1, 0, 1025, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1608003029ULL }, // Inst #1481 = CVTTSS2SIrr_Int |
| 45676 | { 1480, 2, 1, 0, 977, 1, 0, 1047, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1608003029ULL }, // Inst #1480 = CVTTSS2SIrr |
| 45677 | { 1479, 6, 1, 0, 1665, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1608003019ULL }, // Inst #1479 = CVTTSS2SIrm_Int |
| 45678 | { 1478, 6, 1, 0, 1665, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1608003019ULL }, // Inst #1478 = CVTTSS2SIrm |
| 45679 | { 1477, 2, 1, 0, 632, 1, 0, 1021, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1608023029ULL }, // Inst #1477 = CVTTSS2SI64rr_Int |
| 45680 | { 1476, 2, 1, 0, 631, 1, 0, 1045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1608023029ULL }, // Inst #1476 = CVTTSS2SI64rr |
| 45681 | { 1475, 6, 1, 0, 1664, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1608023019ULL }, // Inst #1475 = CVTTSS2SI64rm_Int |
| 45682 | { 1474, 6, 1, 0, 633, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1608023019ULL }, // Inst #1474 = CVTTSS2SI64rm |
| 45683 | { 1473, 2, 1, 0, 983, 1, 0, 1025, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1610003829ULL }, // Inst #1473 = CVTTSD2SIrr_Int |
| 45684 | { 1472, 2, 1, 0, 982, 1, 0, 1023, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1610003829ULL }, // Inst #1472 = CVTTSD2SIrr |
| 45685 | { 1471, 6, 1, 0, 1489, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1610003819ULL }, // Inst #1471 = CVTTSD2SIrm_Int |
| 45686 | { 1470, 6, 1, 0, 1489, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1610003819ULL }, // Inst #1470 = CVTTSD2SIrm |
| 45687 | { 1469, 2, 1, 0, 983, 1, 0, 1021, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1610023829ULL }, // Inst #1469 = CVTTSD2SI64rr_Int |
| 45688 | { 1468, 2, 1, 0, 982, 1, 0, 1019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1610023829ULL }, // Inst #1468 = CVTTSD2SI64rr |
| 45689 | { 1467, 6, 1, 0, 985, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1610023819ULL }, // Inst #1467 = CVTTSD2SI64rm_Int |
| 45690 | { 1466, 6, 1, 0, 985, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1610023819ULL }, // Inst #1466 = CVTTSD2SI64rm |
| 45691 | { 1465, 2, 1, 0, 1004, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d80003029ULL }, // Inst #1465 = CVTTPS2DQrr |
| 45692 | { 1464, 6, 1, 0, 1361, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d80003019ULL }, // Inst #1464 = CVTTPS2DQrm |
| 45693 | { 1463, 2, 1, 0, 971, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x7310002829ULL }, // Inst #1463 = CVTTPD2DQrr |
| 45694 | { 1462, 6, 1, 0, 1381, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7310002819ULL }, // Inst #1462 = CVTTPD2DQrm |
| 45695 | { 1461, 2, 1, 0, 978, 1, 0, 1025, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1688003029ULL }, // Inst #1461 = CVTSS2SIrr_Int |
| 45696 | { 1460, 2, 1, 0, 977, 1, 0, 1047, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1688003029ULL }, // Inst #1460 = CVTSS2SIrr |
| 45697 | { 1459, 6, 1, 0, 1665, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1688003019ULL }, // Inst #1459 = CVTSS2SIrm_Int |
| 45698 | { 1458, 6, 1, 0, 1665, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1688003019ULL }, // Inst #1458 = CVTSS2SIrm |
| 45699 | { 1457, 2, 1, 0, 632, 1, 0, 1021, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1688023029ULL }, // Inst #1457 = CVTSS2SI64rr_Int |
| 45700 | { 1456, 2, 1, 0, 631, 1, 0, 1045, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1688023029ULL }, // Inst #1456 = CVTSS2SI64rr |
| 45701 | { 1455, 6, 1, 0, 1664, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1688023019ULL }, // Inst #1455 = CVTSS2SI64rm_Int |
| 45702 | { 1454, 6, 1, 0, 633, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1688023019ULL }, // Inst #1454 = CVTSS2SI64rm |
| 45703 | { 1453, 3, 1, 0, 1276, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d08003029ULL }, // Inst #1453 = CVTSS2SDrr_Int |
| 45704 | { 1452, 2, 1, 0, 1276, 1, 0, 1043, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d08003029ULL }, // Inst #1452 = CVTSS2SDrr |
| 45705 | { 1451, 7, 1, 0, 1363, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d08003019ULL }, // Inst #1451 = CVTSS2SDrm_Int |
| 45706 | { 1450, 6, 1, 0, 1363, 1, 0, 994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d08003019ULL }, // Inst #1450 = CVTSS2SDrm |
| 45707 | { 1449, 3, 1, 0, 628, 1, 0, 1038, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1508023029ULL }, // Inst #1449 = CVTSI642SSrr_Int |
| 45708 | { 1448, 2, 1, 0, 627, 1, 0, 1041, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1508023029ULL }, // Inst #1448 = CVTSI642SSrr |
| 45709 | { 1447, 7, 1, 0, 630, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1508023019ULL }, // Inst #1447 = CVTSI642SSrm_Int |
| 45710 | { 1446, 6, 1, 0, 629, 1, 0, 1002, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1508023019ULL }, // Inst #1446 = CVTSI642SSrm |
| 45711 | { 1445, 3, 1, 0, 981, 1, 0, 1038, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1510023829ULL }, // Inst #1445 = CVTSI642SDrr_Int |
| 45712 | { 1444, 2, 1, 0, 980, 1, 0, 1036, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1510023829ULL }, // Inst #1444 = CVTSI642SDrr |
| 45713 | { 1443, 7, 1, 0, 626, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1510023819ULL }, // Inst #1443 = CVTSI642SDrm_Int |
| 45714 | { 1442, 6, 1, 0, 625, 1, 0, 994, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1510023819ULL }, // Inst #1442 = CVTSI642SDrm |
| 45715 | { 1441, 3, 1, 0, 1745, 1, 0, 1031, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1508003029ULL }, // Inst #1441 = CVTSI2SSrr_Int |
| 45716 | { 1440, 2, 1, 0, 1183, 1, 0, 1034, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1508003029ULL }, // Inst #1440 = CVTSI2SSrr |
| 45717 | { 1439, 7, 1, 0, 112, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1508003019ULL }, // Inst #1439 = CVTSI2SSrm_Int |
| 45718 | { 1438, 6, 1, 0, 111, 1, 0, 1002, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1508003019ULL }, // Inst #1438 = CVTSI2SSrm |
| 45719 | { 1437, 3, 1, 0, 981, 0, 0, 1031, X86ImpOpBase + 0, 0, 0x1510003829ULL }, // Inst #1437 = CVTSI2SDrr_Int |
| 45720 | { 1436, 2, 1, 0, 980, 0, 0, 1029, X86ImpOpBase + 0, 0, 0x1510003829ULL }, // Inst #1436 = CVTSI2SDrr |
| 45721 | { 1435, 7, 1, 0, 108, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1510003819ULL }, // Inst #1435 = CVTSI2SDrm_Int |
| 45722 | { 1434, 6, 1, 0, 107, 0, 0, 994, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1510003819ULL }, // Inst #1434 = CVTSI2SDrm |
| 45723 | { 1433, 3, 1, 0, 106, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d08003829ULL }, // Inst #1433 = CVTSD2SSrr_Int |
| 45724 | { 1432, 2, 1, 0, 106, 1, 0, 1027, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d08003829ULL }, // Inst #1432 = CVTSD2SSrr |
| 45725 | { 1431, 7, 1, 0, 105, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d08003819ULL }, // Inst #1431 = CVTSD2SSrm_Int |
| 45726 | { 1430, 6, 1, 0, 105, 1, 0, 1002, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d08003819ULL }, // Inst #1430 = CVTSD2SSrm |
| 45727 | { 1429, 2, 1, 0, 983, 1, 0, 1025, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1690003829ULL }, // Inst #1429 = CVTSD2SIrr_Int |
| 45728 | { 1428, 2, 1, 0, 982, 1, 0, 1023, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1690003829ULL }, // Inst #1428 = CVTSD2SIrr |
| 45729 | { 1427, 6, 1, 0, 1489, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1690003819ULL }, // Inst #1427 = CVTSD2SIrm_Int |
| 45730 | { 1426, 6, 1, 0, 1489, 1, 0, 237, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1690003819ULL }, // Inst #1426 = CVTSD2SIrm |
| 45731 | { 1425, 2, 1, 0, 983, 1, 0, 1021, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1690023829ULL }, // Inst #1425 = CVTSD2SI64rr_Int |
| 45732 | { 1424, 2, 1, 0, 982, 1, 0, 1019, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x1690023829ULL }, // Inst #1424 = CVTSD2SI64rr |
| 45733 | { 1423, 6, 1, 0, 985, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1690023819ULL }, // Inst #1423 = CVTSD2SI64rm_Int |
| 45734 | { 1422, 6, 1, 0, 985, 1, 0, 243, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1690023819ULL }, // Inst #1422 = CVTSD2SI64rm |
| 45735 | { 1421, 2, 1, 0, 1271, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d00002029ULL }, // Inst #1421 = CVTPS2PDrr |
| 45736 | { 1420, 6, 1, 0, 1346, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d00002019ULL }, // Inst #1420 = CVTPS2PDrm |
| 45737 | { 1419, 2, 1, 0, 1004, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d90002829ULL }, // Inst #1419 = CVTPS2DQrr |
| 45738 | { 1418, 6, 1, 0, 1361, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d90002819ULL }, // Inst #1418 = CVTPS2DQrm |
| 45739 | { 1417, 2, 1, 0, 97, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d10002829ULL }, // Inst #1417 = CVTPD2PSrr |
| 45740 | { 1416, 6, 1, 0, 96, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d10002819ULL }, // Inst #1416 = CVTPD2PSrm |
| 45741 | { 1415, 2, 1, 0, 971, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x7300003829ULL }, // Inst #1415 = CVTPD2DQrr |
| 45742 | { 1414, 6, 1, 0, 1381, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7300003819ULL }, // Inst #1414 = CVTPD2DQrm |
| 45743 | { 1413, 2, 1, 0, 1002, 1, 0, 557, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d88002029ULL }, // Inst #1413 = CVTDQ2PSrr |
| 45744 | { 1412, 6, 1, 0, 1358, 1, 0, 551, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d88002019ULL }, // Inst #1412 = CVTDQ2PSrm |
| 45745 | { 1411, 2, 1, 0, 969, 0, 0, 557, X86ImpOpBase + 0, 0, 0x7300003029ULL }, // Inst #1411 = CVTDQ2PDrr |
| 45746 | { 1410, 6, 1, 0, 1380, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7300003019ULL }, // Inst #1410 = CVTDQ2PDrm |
| 45747 | { 1409, 4, 0, 0, 1, 1, 1, 703, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x20004260010028ULL }, // Inst #1409 = CTEST8rr |
| 45748 | { 1408, 4, 0, 0, 1, 1, 1, 691, X86ImpOpBase + 31, 0, 0x20007b60050030ULL }, // Inst #1408 = CTEST8ri |
| 45749 | { 1407, 8, 0, 0, 25, 1, 1, 683, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20004260010018ULL }, // Inst #1407 = CTEST8mr |
| 45750 | { 1406, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20007b60050020ULL }, // Inst #1406 = CTEST8mi |
| 45751 | { 1405, 4, 0, 0, 1, 1, 1, 679, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x200042e0030028ULL }, // Inst #1405 = CTEST64rr |
| 45752 | { 1404, 4, 0, 0, 1, 1, 1, 667, X86ImpOpBase + 31, 0, 0x20007be0230030ULL }, // Inst #1404 = CTEST64ri32 |
| 45753 | { 1403, 8, 0, 0, 25, 1, 1, 659, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x200042e0030018ULL }, // Inst #1403 = CTEST64mr |
| 45754 | { 1402, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20007be0230020ULL }, // Inst #1402 = CTEST64mi32 |
| 45755 | { 1401, 4, 0, 0, 1, 1, 1, 655, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x200042e0010028ULL }, // Inst #1401 = CTEST32rr |
| 45756 | { 1400, 4, 0, 0, 1, 1, 1, 643, X86ImpOpBase + 31, 0, 0x20007be0190030ULL }, // Inst #1400 = CTEST32ri |
| 45757 | { 1399, 8, 0, 0, 25, 1, 1, 635, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x200042e0010018ULL }, // Inst #1399 = CTEST32mr |
| 45758 | { 1398, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20007be0190020ULL }, // Inst #1398 = CTEST32mi |
| 45759 | { 1397, 4, 0, 0, 1, 1, 1, 631, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x200042e0010828ULL }, // Inst #1397 = CTEST16rr |
| 45760 | { 1396, 4, 0, 0, 1, 1, 1, 619, X86ImpOpBase + 31, 0, 0x20007be0110830ULL }, // Inst #1396 = CTEST16ri |
| 45761 | { 1395, 8, 0, 0, 25, 1, 1, 611, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x200042e0010818ULL }, // Inst #1395 = CTEST16mr |
| 45762 | { 1394, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20007be0110820ULL }, // Inst #1394 = CTEST16mi |
| 45763 | { 1393, 0, 0, 0, 31, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x170000000aULL }, // Inst #1393 = CS_PREFIX |
| 45764 | { 1392, 3, 1, 0, 89, 0, 0, 1016, X86ImpOpBase + 0, 0, 0x7860030029ULL }, // Inst #1392 = CRC32r64r8_EVEX |
| 45765 | { 1391, 3, 1, 0, 89, 0, 0, 1016, X86ImpOpBase + 0, 0, 0x7800025829ULL }, // Inst #1391 = CRC32r64r8 |
| 45766 | { 1390, 3, 1, 0, 89, 0, 0, 167, X86ImpOpBase + 0, 0, 0x78e0030029ULL }, // Inst #1390 = CRC32r64r64_EVEX |
| 45767 | { 1389, 3, 1, 0, 1162, 0, 0, 167, X86ImpOpBase + 0, 0, 0x7880025829ULL }, // Inst #1389 = CRC32r64r64 |
| 45768 | { 1388, 7, 1, 0, 88, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7860030019ULL }, // Inst #1388 = CRC32r64m8_EVEX |
| 45769 | { 1387, 7, 1, 0, 88, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7800025819ULL }, // Inst #1387 = CRC32r64m8 |
| 45770 | { 1386, 7, 1, 0, 88, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78e0030019ULL }, // Inst #1386 = CRC32r64m64_EVEX |
| 45771 | { 1385, 7, 1, 0, 88, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7880025819ULL }, // Inst #1385 = CRC32r64m64 |
| 45772 | { 1384, 3, 1, 0, 89, 0, 0, 1013, X86ImpOpBase + 0, 0, 0x7860010029ULL }, // Inst #1384 = CRC32r32r8_EVEX |
| 45773 | { 1383, 3, 1, 0, 89, 0, 0, 1013, X86ImpOpBase + 0, 0, 0x7800005829ULL }, // Inst #1383 = CRC32r32r8 |
| 45774 | { 1382, 3, 1, 0, 89, 0, 0, 161, X86ImpOpBase + 0, 0, 0x78e0010029ULL }, // Inst #1382 = CRC32r32r32_EVEX |
| 45775 | { 1381, 3, 1, 0, 1161, 0, 0, 161, X86ImpOpBase + 0, 0, 0x7880005929ULL }, // Inst #1381 = CRC32r32r32 |
| 45776 | { 1380, 3, 1, 0, 89, 0, 0, 1010, X86ImpOpBase + 0, 0, 0x78e0010829ULL }, // Inst #1380 = CRC32r32r16_EVEX |
| 45777 | { 1379, 3, 1, 0, 1160, 0, 0, 1010, X86ImpOpBase + 0, 0, 0x78800058a9ULL }, // Inst #1379 = CRC32r32r16 |
| 45778 | { 1378, 7, 1, 0, 88, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7860010019ULL }, // Inst #1378 = CRC32r32m8_EVEX |
| 45779 | { 1377, 7, 1, 0, 88, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7800005819ULL }, // Inst #1377 = CRC32r32m8 |
| 45780 | { 1376, 7, 1, 0, 88, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78e0010019ULL }, // Inst #1376 = CRC32r32m32_EVEX |
| 45781 | { 1375, 7, 1, 0, 88, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7880005919ULL }, // Inst #1375 = CRC32r32m32 |
| 45782 | { 1374, 7, 1, 0, 88, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x78e0010819ULL }, // Inst #1374 = CRC32r32m16_EVEX |
| 45783 | { 1373, 7, 1, 0, 88, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7880005899ULL }, // Inst #1373 = CRC32r32m16 |
| 45784 | { 1372, 0, 0, 0, 742, 1, 2, 1, X86ImpOpBase + 169, 0, 0x4c80020001ULL }, // Inst #1372 = CQO |
| 45785 | { 1371, 0, 0, 0, 726, 2, 4, 1, X86ImpOpBase + 163, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5100002001ULL }, // Inst #1371 = CPUID |
| 45786 | { 1370, 2, 0, 0, 87, 1, 1, 334, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1370 = COM_Fpr80 |
| 45787 | { 1369, 2, 0, 0, 87, 1, 1, 332, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1369 = COM_Fpr64 |
| 45788 | { 1368, 2, 0, 0, 87, 1, 1, 330, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1368 = COM_Fpr32 |
| 45789 | { 1367, 2, 0, 0, 87, 1, 2, 334, X86ImpOpBase + 160, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1367 = COM_FpIr80 |
| 45790 | { 1366, 2, 0, 0, 87, 1, 2, 332, X86ImpOpBase + 160, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1366 = COM_FpIr64 |
| 45791 | { 1365, 2, 0, 0, 87, 1, 2, 330, X86ImpOpBase + 160, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1365 = COM_FpIr32 |
| 45792 | { 1364, 1, 0, 0, 737, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000032ULL }, // Inst #1364 = COM_FST0r |
| 45793 | { 1363, 1, 0, 0, 755, 2, 2, 517, X86ImpOpBase + 156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000036ULL }, // Inst #1363 = COM_FIr |
| 45794 | { 1362, 1, 0, 0, 755, 2, 2, 517, X86ImpOpBase + 156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000036ULL }, // Inst #1362 = COM_FIPr |
| 45795 | { 1361, 1, 0, 0, 737, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000033ULL }, // Inst #1361 = COMP_FST0r |
| 45796 | { 1360, 2, 0, 0, 746, 1, 1, 557, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1788002029ULL }, // Inst #1360 = COMISSrr_Int |
| 45797 | { 1359, 2, 0, 0, 746, 1, 1, 1008, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1788002029ULL }, // Inst #1359 = COMISSrr |
| 45798 | { 1358, 6, 0, 0, 786, 1, 1, 551, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1788002019ULL }, // Inst #1358 = COMISSrm_Int |
| 45799 | { 1357, 6, 0, 0, 786, 1, 1, 1002, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1788002019ULL }, // Inst #1357 = COMISSrm |
| 45800 | { 1356, 2, 0, 0, 746, 1, 1, 557, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1790002829ULL }, // Inst #1356 = COMISDrr_Int |
| 45801 | { 1355, 2, 0, 0, 746, 1, 1, 1000, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayRaiseFPException), 0x1790002829ULL }, // Inst #1355 = COMISDrr |
| 45802 | { 1354, 6, 0, 0, 786, 1, 1, 551, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1790002819ULL }, // Inst #1354 = COMISDrm_Int |
| 45803 | { 1353, 6, 0, 0, 786, 1, 1, 994, X86ImpOpBase + 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1790002819ULL }, // Inst #1353 = COMISDrm |
| 45804 | { 1352, 2, 1, 0, 687, 1, 2, 947, X86ImpOpBase + 75, 0, 0x5800002028ULL }, // Inst #1352 = CMPXCHG8rr |
| 45805 | { 1351, 6, 0, 0, 668, 1, 2, 454, X86ImpOpBase + 75, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5800002018ULL }, // Inst #1351 = CMPXCHG8rm |
| 45806 | { 1350, 5, 0, 0, 694, 4, 3, 232, X86ImpOpBase + 147, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6380002021ULL }, // Inst #1350 = CMPXCHG8B |
| 45807 | { 1349, 2, 1, 0, 1200, 1, 2, 575, X86ImpOpBase + 72, 0, 0x5880022028ULL }, // Inst #1349 = CMPXCHG64rr |
| 45808 | { 1348, 6, 0, 0, 691, 1, 2, 211, X86ImpOpBase + 72, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5880022018ULL }, // Inst #1348 = CMPXCHG64rm |
| 45809 | { 1347, 2, 1, 0, 1200, 1, 2, 573, X86ImpOpBase + 69, 0, 0x5880002128ULL }, // Inst #1347 = CMPXCHG32rr |
| 45810 | { 1346, 6, 0, 0, 691, 1, 2, 324, X86ImpOpBase + 69, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5880002118ULL }, // Inst #1346 = CMPXCHG32rm |
| 45811 | { 1345, 2, 1, 0, 1200, 1, 2, 569, X86ImpOpBase + 46, 0, 0x58800020a8ULL }, // Inst #1345 = CMPXCHG16rr |
| 45812 | { 1344, 6, 0, 0, 691, 1, 2, 349, X86ImpOpBase + 46, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5880002098ULL }, // Inst #1344 = CMPXCHG16rm |
| 45813 | { 1343, 5, 0, 0, 700, 4, 3, 232, X86ImpOpBase + 140, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6380022021ULL }, // Inst #1343 = CMPXCHG16B |
| 45814 | { 1342, 3, 0, 0, 787, 3, 3, 967, X86ImpOpBase + 134, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380000086ULL }, // Inst #1342 = CMPSW |
| 45815 | { 1341, 4, 1, 0, 1113, 1, 0, 585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6108043029ULL }, // Inst #1341 = CMPSSrri_Int |
| 45816 | { 1340, 4, 1, 0, 1113, 1, 0, 990, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x6108043029ULL }, // Inst #1340 = CMPSSrri |
| 45817 | { 1339, 8, 1, 0, 1663, 1, 0, 577, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6108043019ULL }, // Inst #1339 = CMPSSrmi_Int |
| 45818 | { 1338, 8, 1, 0, 1663, 1, 0, 982, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6108043019ULL }, // Inst #1338 = CMPSSrmi |
| 45819 | { 1337, 3, 0, 0, 787, 3, 3, 967, X86ImpOpBase + 134, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380020006ULL }, // Inst #1337 = CMPSQ |
| 45820 | { 1336, 3, 0, 0, 787, 3, 3, 967, X86ImpOpBase + 134, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380000106ULL }, // Inst #1336 = CMPSL |
| 45821 | { 1335, 4, 1, 0, 1112, 1, 0, 585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6110043829ULL }, // Inst #1335 = CMPSDrri_Int |
| 45822 | { 1334, 4, 1, 0, 1112, 1, 0, 978, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x6110043829ULL }, // Inst #1334 = CMPSDrri |
| 45823 | { 1333, 8, 1, 0, 1662, 1, 0, 577, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6110043819ULL }, // Inst #1333 = CMPSDrmi_Int |
| 45824 | { 1332, 8, 1, 0, 1662, 1, 0, 970, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6110043819ULL }, // Inst #1332 = CMPSDrmi |
| 45825 | { 1331, 3, 0, 0, 787, 3, 3, 967, X86ImpOpBase + 134, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5300000006ULL }, // Inst #1331 = CMPSB |
| 45826 | { 1330, 4, 1, 0, 1111, 1, 0, 585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x6108042029ULL }, // Inst #1330 = CMPPSrri |
| 45827 | { 1329, 8, 1, 0, 1659, 1, 0, 577, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6108042019ULL }, // Inst #1329 = CMPPSrmi |
| 45828 | { 1328, 4, 1, 0, 1110, 1, 0, 585, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x6110042829ULL }, // Inst #1328 = CMPPDrri |
| 45829 | { 1327, 8, 1, 0, 1658, 1, 0, 577, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6110042819ULL }, // Inst #1327 = CMPPDrmi |
| 45830 | { 1326, 9, 1, 0, 75, 0, 1, 958, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xf060024814ULL }, // Inst #1326 = CMPCCXADDmr64_EVEX |
| 45831 | { 1325, 9, 1, 0, 75, 0, 1, 958, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xf020024814ULL }, // Inst #1325 = CMPCCXADDmr64 |
| 45832 | { 1324, 9, 1, 0, 75, 0, 1, 949, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xf060004814ULL }, // Inst #1324 = CMPCCXADDmr32_EVEX |
| 45833 | { 1323, 9, 1, 0, 75, 0, 1, 949, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xf020004814ULL }, // Inst #1323 = CMPCCXADDmr32 |
| 45834 | { 1322, 2, 0, 0, 1051, 0, 1, 947, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1d00000029ULL }, // Inst #1322 = CMP8rr_REV |
| 45835 | { 1321, 2, 0, 0, 1051, 0, 1, 947, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1c00000028ULL }, // Inst #1321 = CMP8rr |
| 45836 | { 1320, 6, 0, 0, 1450, 0, 1, 941, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d00000019ULL }, // Inst #1320 = CMP8rm |
| 45837 | { 1319, 2, 0, 0, 1, 0, 1, 939, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x4100040037ULL }, // Inst #1319 = CMP8ri8 |
| 45838 | { 1318, 2, 0, 0, 1, 0, 1, 939, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x4000040037ULL }, // Inst #1318 = CMP8ri |
| 45839 | { 1317, 6, 0, 0, 1451, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c00000018ULL }, // Inst #1317 = CMP8mr |
| 45840 | { 1316, 6, 0, 0, 1443, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4100040027ULL }, // Inst #1316 = CMP8mi8 |
| 45841 | { 1315, 6, 0, 0, 1443, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4000040027ULL }, // Inst #1315 = CMP8mi |
| 45842 | { 1314, 1, 0, 0, 1, 1, 1, 1, X86ImpOpBase + 132, 0|(1ULL<<MCID::Compare), 0x1e00040001ULL }, // Inst #1314 = CMP8i8 |
| 45843 | { 1313, 2, 0, 0, 1051, 0, 1, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1d80020029ULL }, // Inst #1313 = CMP64rr_REV |
| 45844 | { 1312, 2, 0, 0, 1051, 0, 1, 575, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1c80020028ULL }, // Inst #1312 = CMP64rr |
| 45845 | { 1311, 6, 0, 0, 1450, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80020019ULL }, // Inst #1311 = CMP64rm |
| 45846 | { 1310, 2, 0, 0, 1, 0, 1, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x4180060037ULL }, // Inst #1310 = CMP64ri8 |
| 45847 | { 1309, 2, 0, 0, 1, 0, 1, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x4080220037ULL }, // Inst #1309 = CMP64ri32 |
| 45848 | { 1308, 6, 0, 0, 1451, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80020018ULL }, // Inst #1308 = CMP64mr |
| 45849 | { 1307, 6, 0, 0, 1443, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4180060027ULL }, // Inst #1307 = CMP64mi8 |
| 45850 | { 1306, 6, 0, 0, 1447, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4080220027ULL }, // Inst #1306 = CMP64mi32 |
| 45851 | { 1305, 1, 0, 0, 1, 1, 1, 1, X86ImpOpBase + 130, 0|(1ULL<<MCID::Compare), 0x1e80220001ULL }, // Inst #1305 = CMP64i32 |
| 45852 | { 1304, 2, 0, 0, 1051, 0, 1, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1d80000129ULL }, // Inst #1304 = CMP32rr_REV |
| 45853 | { 1303, 2, 0, 0, 1051, 0, 1, 573, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1c80000128ULL }, // Inst #1303 = CMP32rr |
| 45854 | { 1302, 6, 0, 0, 1450, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80000119ULL }, // Inst #1302 = CMP32rm |
| 45855 | { 1301, 2, 0, 0, 1, 0, 1, 204, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x4180040137ULL }, // Inst #1301 = CMP32ri8 |
| 45856 | { 1300, 2, 0, 0, 1, 0, 1, 204, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x4080180137ULL }, // Inst #1300 = CMP32ri |
| 45857 | { 1299, 6, 0, 0, 1451, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80000118ULL }, // Inst #1299 = CMP32mr |
| 45858 | { 1298, 6, 0, 0, 1443, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4180040127ULL }, // Inst #1298 = CMP32mi8 |
| 45859 | { 1297, 6, 0, 0, 1443, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4080180127ULL }, // Inst #1297 = CMP32mi |
| 45860 | { 1296, 1, 0, 0, 1, 1, 1, 1, X86ImpOpBase + 128, 0|(1ULL<<MCID::Compare), 0x1e80180101ULL }, // Inst #1296 = CMP32i32 |
| 45861 | { 1295, 2, 0, 0, 1051, 0, 1, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1d800000a9ULL }, // Inst #1295 = CMP16rr_REV |
| 45862 | { 1294, 2, 0, 0, 1051, 0, 1, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x1c800000a8ULL }, // Inst #1294 = CMP16rr |
| 45863 | { 1293, 6, 0, 0, 1450, 0, 1, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80000099ULL }, // Inst #1293 = CMP16rm |
| 45864 | { 1292, 2, 0, 0, 1, 0, 1, 597, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x41800400b7ULL }, // Inst #1292 = CMP16ri8 |
| 45865 | { 1291, 2, 0, 0, 1, 0, 1, 597, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x40801000b7ULL }, // Inst #1291 = CMP16ri |
| 45866 | { 1290, 6, 0, 0, 1451, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80000098ULL }, // Inst #1290 = CMP16mr |
| 45867 | { 1289, 6, 0, 0, 1443, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x41800400a7ULL }, // Inst #1289 = CMP16mi8 |
| 45868 | { 1288, 6, 0, 0, 1443, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x40801000a7ULL }, // Inst #1288 = CMP16mi |
| 45869 | { 1287, 1, 0, 0, 1, 1, 1, 1, X86ImpOpBase + 126, 0|(1ULL<<MCID::Compare), 0x1e80100081ULL }, // Inst #1287 = CMP16i16 |
| 45870 | { 1286, 4, 1, 0, 0, 1, 0, 935, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1286 = CMOV_VR64 |
| 45871 | { 1285, 4, 1, 0, 0, 1, 0, 931, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1285 = CMOV_VR512 |
| 45872 | { 1284, 4, 1, 0, 0, 1, 0, 927, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1284 = CMOV_VR256X |
| 45873 | { 1283, 4, 1, 0, 0, 1, 0, 923, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1283 = CMOV_VR256 |
| 45874 | { 1282, 4, 1, 0, 0, 1, 0, 919, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1282 = CMOV_VR128X |
| 45875 | { 1281, 4, 1, 0, 0, 1, 0, 915, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1281 = CMOV_VR128 |
| 45876 | { 1280, 4, 1, 0, 0, 1, 0, 911, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1280 = CMOV_VK8 |
| 45877 | { 1279, 4, 1, 0, 0, 1, 0, 907, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1279 = CMOV_VK64 |
| 45878 | { 1278, 4, 1, 0, 0, 1, 0, 903, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1278 = CMOV_VK4 |
| 45879 | { 1277, 4, 1, 0, 0, 1, 0, 899, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1277 = CMOV_VK32 |
| 45880 | { 1276, 4, 1, 0, 0, 1, 0, 895, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1276 = CMOV_VK2 |
| 45881 | { 1275, 4, 1, 0, 0, 1, 0, 891, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1275 = CMOV_VK16 |
| 45882 | { 1274, 4, 1, 0, 0, 1, 0, 887, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1274 = CMOV_VK1 |
| 45883 | { 1273, 4, 1, 0, 0, 1, 0, 883, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1273 = CMOV_RFP80 |
| 45884 | { 1272, 4, 1, 0, 0, 1, 0, 879, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1272 = CMOV_RFP64 |
| 45885 | { 1271, 4, 1, 0, 0, 1, 0, 875, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1271 = CMOV_RFP32 |
| 45886 | { 1270, 4, 1, 0, 0, 1, 0, 871, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1270 = CMOV_GR8 |
| 45887 | { 1269, 4, 1, 0, 0, 1, 0, 867, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1269 = CMOV_GR32 |
| 45888 | { 1268, 4, 1, 0, 0, 1, 0, 863, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1268 = CMOV_GR16 |
| 45889 | { 1267, 4, 1, 0, 0, 1, 0, 859, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1267 = CMOV_FR64X |
| 45890 | { 1266, 4, 1, 0, 0, 1, 0, 855, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1266 = CMOV_FR64 |
| 45891 | { 1265, 4, 1, 0, 0, 1, 0, 851, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1265 = CMOV_FR32X |
| 45892 | { 1264, 4, 1, 0, 0, 1, 0, 847, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1264 = CMOV_FR32 |
| 45893 | { 1263, 4, 1, 0, 0, 1, 0, 843, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1263 = CMOV_FR16X |
| 45894 | { 1262, 4, 1, 0, 0, 1, 0, 839, X86ImpOpBase + 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1262 = CMOV_FR16 |
| 45895 | { 1261, 3, 1, 0, 73, 1, 1, 836, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1261 = CMOVP_Fp80 |
| 45896 | { 1260, 3, 1, 0, 73, 1, 1, 833, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1260 = CMOVP_Fp64 |
| 45897 | { 1259, 3, 1, 0, 73, 1, 1, 830, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1259 = CMOVP_Fp32 |
| 45898 | { 1258, 1, 0, 0, 73, 0, 1, 517, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000033ULL }, // Inst #1258 = CMOVP_F |
| 45899 | { 1257, 3, 1, 0, 73, 1, 1, 836, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1257 = CMOVNP_Fp80 |
| 45900 | { 1256, 3, 1, 0, 73, 1, 1, 833, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1256 = CMOVNP_Fp64 |
| 45901 | { 1255, 3, 1, 0, 73, 1, 1, 830, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1255 = CMOVNP_Fp32 |
| 45902 | { 1254, 1, 0, 0, 73, 0, 1, 517, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000033ULL }, // Inst #1254 = CMOVNP_F |
| 45903 | { 1253, 3, 1, 0, 73, 1, 1, 836, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1253 = CMOVNE_Fp80 |
| 45904 | { 1252, 3, 1, 0, 73, 1, 1, 833, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1252 = CMOVNE_Fp64 |
| 45905 | { 1251, 3, 1, 0, 73, 1, 1, 830, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1251 = CMOVNE_Fp32 |
| 45906 | { 1250, 1, 0, 0, 73, 0, 1, 517, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000031ULL }, // Inst #1250 = CMOVNE_F |
| 45907 | { 1249, 3, 1, 0, 73, 1, 1, 836, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1249 = CMOVNB_Fp80 |
| 45908 | { 1248, 3, 1, 0, 73, 1, 1, 833, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1248 = CMOVNB_Fp64 |
| 45909 | { 1247, 3, 1, 0, 73, 1, 1, 830, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1247 = CMOVNB_Fp32 |
| 45910 | { 1246, 1, 0, 0, 73, 0, 1, 517, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000030ULL }, // Inst #1246 = CMOVNB_F |
| 45911 | { 1245, 3, 1, 0, 73, 1, 1, 836, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1245 = CMOVNBE_Fp80 |
| 45912 | { 1244, 3, 1, 0, 73, 1, 1, 833, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1244 = CMOVNBE_Fp64 |
| 45913 | { 1243, 3, 1, 0, 73, 1, 1, 830, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1243 = CMOVNBE_Fp32 |
| 45914 | { 1242, 1, 0, 0, 73, 0, 1, 517, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000032ULL }, // Inst #1242 = CMOVNBE_F |
| 45915 | { 1241, 3, 1, 0, 73, 1, 1, 836, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1241 = CMOVE_Fp80 |
| 45916 | { 1240, 3, 1, 0, 73, 1, 1, 833, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1240 = CMOVE_Fp64 |
| 45917 | { 1239, 3, 1, 0, 73, 1, 1, 830, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1239 = CMOVE_Fp32 |
| 45918 | { 1238, 1, 0, 0, 73, 0, 1, 517, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000031ULL }, // Inst #1238 = CMOVE_F |
| 45919 | { 1237, 3, 1, 0, 73, 1, 1, 836, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1237 = CMOVB_Fp80 |
| 45920 | { 1236, 3, 1, 0, 73, 1, 1, 833, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1236 = CMOVB_Fp64 |
| 45921 | { 1235, 3, 1, 0, 73, 1, 1, 830, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1235 = CMOVB_Fp32 |
| 45922 | { 1234, 1, 0, 0, 73, 0, 1, 517, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000030ULL }, // Inst #1234 = CMOVB_F |
| 45923 | { 1233, 3, 1, 0, 73, 1, 1, 836, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1233 = CMOVBE_Fp80 |
| 45924 | { 1232, 3, 1, 0, 73, 1, 1, 833, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1232 = CMOVBE_Fp64 |
| 45925 | { 1231, 3, 1, 0, 73, 1, 1, 830, X86ImpOpBase + 124, 0, 0x1800000ULL }, // Inst #1231 = CMOVBE_Fp32 |
| 45926 | { 1230, 1, 0, 0, 73, 0, 1, 517, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000032ULL }, // Inst #1230 = CMOVBE_F |
| 45927 | { 1229, 4, 1, 0, 71, 1, 0, 790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10a06003002cULL }, // Inst #1229 = CMOV64rr_ND |
| 45928 | { 1228, 4, 1, 0, 814, 1, 0, 826, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x200002202cULL }, // Inst #1228 = CMOV64rr |
| 45929 | { 1227, 8, 1, 0, 70, 1, 0, 779, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10a06003001cULL }, // Inst #1227 = CMOV64rm_ND |
| 45930 | { 1226, 8, 1, 0, 815, 1, 0, 818, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x200002201cULL }, // Inst #1226 = CMOV64rm |
| 45931 | { 1225, 4, 1, 0, 71, 1, 0, 761, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10a06001002cULL }, // Inst #1225 = CMOV32rr_ND |
| 45932 | { 1224, 4, 1, 0, 814, 1, 0, 814, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x200000212cULL }, // Inst #1224 = CMOV32rr |
| 45933 | { 1223, 8, 1, 0, 70, 1, 0, 750, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10a06001001cULL }, // Inst #1223 = CMOV32rm_ND |
| 45934 | { 1222, 8, 1, 0, 815, 1, 0, 806, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x200000211cULL }, // Inst #1222 = CMOV32rm |
| 45935 | { 1221, 4, 1, 0, 71, 1, 0, 732, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10a06001082cULL }, // Inst #1221 = CMOV16rr_ND |
| 45936 | { 1220, 4, 1, 0, 814, 1, 0, 802, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x20000020acULL }, // Inst #1220 = CMOV16rr |
| 45937 | { 1219, 8, 1, 0, 70, 1, 0, 721, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10a06001081cULL }, // Inst #1219 = CMOV16rm_ND |
| 45938 | { 1218, 8, 1, 0, 815, 1, 0, 794, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x200000209cULL }, // Inst #1218 = CMOV16rm |
| 45939 | { 1217, 0, 0, 0, 1, 1, 1, 1, X86ImpOpBase + 31, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7a80000001ULL }, // Inst #1217 = CMC |
| 45940 | { 1216, 0, 0, 0, 72, 1, 0, 1, X86ImpOpBase + 123, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207cULL }, // Inst #1216 = CLZERO64r |
| 45941 | { 1215, 0, 0, 0, 72, 1, 0, 1, X86ImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207cULL }, // Inst #1215 = CLZERO32r |
| 45942 | { 1214, 5, 0, 0, 1488, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002826ULL }, // Inst #1214 = CLWB |
| 45943 | { 1213, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8000306eULL }, // Inst #1213 = CLUI |
| 45944 | { 1212, 0, 0, 0, 1486, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300002001ULL }, // Inst #1212 = CLTS |
| 45945 | { 1211, 5, 0, 0, 8, 0, 1, 232, X86ImpOpBase + 122, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003026ULL }, // Inst #1211 = CLRSSBSY |
| 45946 | { 1210, 0, 0, 0, 759, 1, 1, 1, X86ImpOpBase + 31, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d00000001ULL }, // Inst #1210 = CLI |
| 45947 | { 1209, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205dULL }, // Inst #1209 = CLGI |
| 45948 | { 1208, 5, 0, 0, 768, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002827ULL }, // Inst #1208 = CLFLUSHOPT |
| 45949 | { 1207, 5, 0, 0, 1485, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002027ULL }, // Inst #1207 = CLFLUSH |
| 45950 | { 1206, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::EHScopeReturn)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1206 = CLEANUPRET |
| 45951 | { 1205, 5, 0, 0, 866, 0, 0, 232, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xe00002020ULL }, // Inst #1205 = CLDEMOTE |
| 45952 | { 1204, 0, 0, 0, 649, 0, 1, 1, X86ImpOpBase + 121, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7e00000001ULL }, // Inst #1204 = CLD |
| 45953 | { 1203, 0, 0, 0, 806, 1, 1, 1, X86ImpOpBase + 31, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00000001ULL }, // Inst #1203 = CLC |
| 45954 | { 1202, 0, 0, 0, 1208, 0, 1, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000204aULL }, // Inst #1202 = CLAC |
| 45955 | { 1201, 2, 1, 0, 939, 0, 1, 334, X86ImpOpBase + 52, 0, 0xc00000ULL }, // Inst #1201 = CHS_Fp80 |
| 45956 | { 1200, 2, 1, 0, 939, 0, 1, 332, X86ImpOpBase + 52, 0, 0xc00000ULL }, // Inst #1200 = CHS_Fp64 |
| 45957 | { 1199, 2, 1, 0, 939, 0, 1, 330, X86ImpOpBase + 52, 0, 0xc00000ULL }, // Inst #1199 = CHS_Fp32 |
| 45958 | { 1198, 0, 0, 0, 939, 0, 1, 1, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000060ULL }, // Inst #1198 = CHS_F |
| 45959 | { 1197, 3, 1, 0, 71, 1, 0, 787, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x206003002cULL }, // Inst #1197 = CFCMOV64rr_REV |
| 45960 | { 1196, 4, 1, 0, 71, 1, 0, 790, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1010a06003002cULL }, // Inst #1196 = CFCMOV64rr_ND |
| 45961 | { 1195, 3, 1, 0, 71, 1, 0, 787, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10002060030012ULL }, // Inst #1195 = CFCMOV64rr |
| 45962 | { 1194, 8, 1, 0, 70, 1, 0, 779, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010a06003001cULL }, // Inst #1194 = CFCMOV64rm_ND |
| 45963 | { 1193, 7, 1, 0, 70, 1, 0, 772, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x206003001cULL }, // Inst #1193 = CFCMOV64rm |
| 45964 | { 1192, 7, 0, 0, 69, 1, 0, 765, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x10002060030013ULL }, // Inst #1192 = CFCMOV64mr |
| 45965 | { 1191, 3, 1, 0, 71, 1, 0, 758, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x206001002cULL }, // Inst #1191 = CFCMOV32rr_REV |
| 45966 | { 1190, 4, 1, 0, 71, 1, 0, 761, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1010a06001002cULL }, // Inst #1190 = CFCMOV32rr_ND |
| 45967 | { 1189, 3, 1, 0, 71, 1, 0, 758, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10002060010012ULL }, // Inst #1189 = CFCMOV32rr |
| 45968 | { 1188, 8, 1, 0, 70, 1, 0, 750, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010a06001001cULL }, // Inst #1188 = CFCMOV32rm_ND |
| 45969 | { 1187, 7, 1, 0, 70, 1, 0, 743, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x206001001cULL }, // Inst #1187 = CFCMOV32rm |
| 45970 | { 1186, 7, 0, 0, 69, 1, 0, 736, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x10002060010013ULL }, // Inst #1186 = CFCMOV32mr |
| 45971 | { 1185, 3, 1, 0, 71, 1, 0, 729, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x206001082cULL }, // Inst #1185 = CFCMOV16rr_REV |
| 45972 | { 1184, 4, 1, 0, 71, 1, 0, 732, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1010a06001082cULL }, // Inst #1184 = CFCMOV16rr_ND |
| 45973 | { 1183, 3, 1, 0, 71, 1, 0, 729, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10002060010812ULL }, // Inst #1183 = CFCMOV16rr |
| 45974 | { 1182, 8, 1, 0, 70, 1, 0, 721, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010a06001081cULL }, // Inst #1182 = CFCMOV16rm_ND |
| 45975 | { 1181, 7, 1, 0, 70, 1, 0, 714, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x206001081cULL }, // Inst #1181 = CFCMOV16rm |
| 45976 | { 1180, 7, 0, 0, 69, 1, 0, 707, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x10002060010813ULL }, // Inst #1180 = CFCMOV16mr |
| 45977 | { 1179, 0, 0, 0, 1481, 1, 1, 1, X86ImpOpBase + 119, 0, 0x4c00020001ULL }, // Inst #1179 = CDQE |
| 45978 | { 1178, 0, 0, 0, 742, 1, 2, 1, X86ImpOpBase + 116, 0, 0x4c80000101ULL }, // Inst #1178 = CDQ |
| 45979 | { 1177, 4, 0, 0, 1, 1, 1, 703, X86ImpOpBase + 31, 0, 0x20001d60010029ULL }, // Inst #1177 = CCMP8rr_REV |
| 45980 | { 1176, 4, 0, 0, 1, 1, 1, 703, X86ImpOpBase + 31, 0, 0x20001c60010028ULL }, // Inst #1176 = CCMP8rr |
| 45981 | { 1175, 8, 0, 0, 25, 1, 1, 695, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20001d60010019ULL }, // Inst #1175 = CCMP8rm |
| 45982 | { 1174, 4, 0, 0, 1, 1, 1, 691, X86ImpOpBase + 31, 0, 0x20004060050037ULL }, // Inst #1174 = CCMP8ri |
| 45983 | { 1173, 8, 0, 0, 25, 1, 1, 683, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20001c60010018ULL }, // Inst #1173 = CCMP8mr |
| 45984 | { 1172, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20004060050027ULL }, // Inst #1172 = CCMP8mi |
| 45985 | { 1171, 4, 0, 0, 1, 1, 1, 679, X86ImpOpBase + 31, 0, 0x20001de0030029ULL }, // Inst #1171 = CCMP64rr_REV |
| 45986 | { 1170, 4, 0, 0, 1, 1, 1, 679, X86ImpOpBase + 31, 0, 0x20001ce0030028ULL }, // Inst #1170 = CCMP64rr |
| 45987 | { 1169, 8, 0, 0, 25, 1, 1, 671, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20001de0030019ULL }, // Inst #1169 = CCMP64rm |
| 45988 | { 1168, 4, 0, 0, 1, 1, 1, 667, X86ImpOpBase + 31, 0, 0x200041e0070037ULL }, // Inst #1168 = CCMP64ri8 |
| 45989 | { 1167, 4, 0, 0, 1, 1, 1, 667, X86ImpOpBase + 31, 0, 0x200040e0230037ULL }, // Inst #1167 = CCMP64ri32 |
| 45990 | { 1166, 8, 0, 0, 25, 1, 1, 659, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20001ce0030018ULL }, // Inst #1166 = CCMP64mr |
| 45991 | { 1165, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x200041e0070027ULL }, // Inst #1165 = CCMP64mi8 |
| 45992 | { 1164, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x200040e0230027ULL }, // Inst #1164 = CCMP64mi32 |
| 45993 | { 1163, 4, 0, 0, 1, 1, 1, 655, X86ImpOpBase + 31, 0, 0x20001de0010029ULL }, // Inst #1163 = CCMP32rr_REV |
| 45994 | { 1162, 4, 0, 0, 1, 1, 1, 655, X86ImpOpBase + 31, 0, 0x20001ce0010028ULL }, // Inst #1162 = CCMP32rr |
| 45995 | { 1161, 8, 0, 0, 25, 1, 1, 647, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20001de0010019ULL }, // Inst #1161 = CCMP32rm |
| 45996 | { 1160, 4, 0, 0, 1, 1, 1, 643, X86ImpOpBase + 31, 0, 0x200041e0050037ULL }, // Inst #1160 = CCMP32ri8 |
| 45997 | { 1159, 4, 0, 0, 1, 1, 1, 643, X86ImpOpBase + 31, 0, 0x200040e0190037ULL }, // Inst #1159 = CCMP32ri |
| 45998 | { 1158, 8, 0, 0, 25, 1, 1, 635, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20001ce0010018ULL }, // Inst #1158 = CCMP32mr |
| 45999 | { 1157, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x200041e0050027ULL }, // Inst #1157 = CCMP32mi8 |
| 46000 | { 1156, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x200040e0190027ULL }, // Inst #1156 = CCMP32mi |
| 46001 | { 1155, 4, 0, 0, 1, 1, 1, 631, X86ImpOpBase + 31, 0, 0x20001de0010829ULL }, // Inst #1155 = CCMP16rr_REV |
| 46002 | { 1154, 4, 0, 0, 1, 1, 1, 631, X86ImpOpBase + 31, 0, 0x20001ce0010828ULL }, // Inst #1154 = CCMP16rr |
| 46003 | { 1153, 8, 0, 0, 25, 1, 1, 623, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20001de0010819ULL }, // Inst #1153 = CCMP16rm |
| 46004 | { 1152, 4, 0, 0, 1, 1, 1, 619, X86ImpOpBase + 31, 0, 0x200041e0050837ULL }, // Inst #1152 = CCMP16ri8 |
| 46005 | { 1151, 4, 0, 0, 1, 1, 1, 619, X86ImpOpBase + 31, 0, 0x200040e0110837ULL }, // Inst #1151 = CCMP16ri |
| 46006 | { 1150, 8, 0, 0, 25, 1, 1, 611, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x20001ce0010818ULL }, // Inst #1150 = CCMP16mr |
| 46007 | { 1149, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x200041e0050827ULL }, // Inst #1149 = CCMP16mi8 |
| 46008 | { 1148, 8, 0, 0, 48, 1, 1, 603, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x200040e0110827ULL }, // Inst #1148 = CCMP16mi |
| 46009 | { 1147, 0, 0, 0, 660, 1, 1, 1, X86ImpOpBase + 114, 0, 0x4c00000081ULL }, // Inst #1147 = CBW |
| 46010 | { 1146, 2, 0, 0, 8, 0, 0, 601, X86ImpOpBase + 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::EHScopeReturn)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1146 = CATCHRET |
| 46011 | { 1145, 1, 0, 0, 4, 2, 0, 600, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call), 0x74001c0101ULL }, // Inst #1145 = CALLpcrel32 |
| 46012 | { 1144, 1, 0, 0, 4, 2, 0, 600, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call), 0x7400140081ULL }, // Inst #1144 = CALLpcrel16 |
| 46013 | { 1143, 1, 0, 0, 1479, 2, 0, 203, X86ImpOpBase + 1, 0|(1ULL<<MCID::Call), 0x2007f80000032ULL }, // Inst #1143 = CALL64r_NT |
| 46014 | { 1142, 1, 0, 0, 1479, 2, 0, 203, X86ImpOpBase + 1, 0|(1ULL<<MCID::Call), 0x7f80000032ULL }, // Inst #1142 = CALL64r |
| 46015 | { 1141, 1, 0, 0, 762, 2, 0, 600, X86ImpOpBase + 1, 0|(1ULL<<MCID::Call), 0x74001c0101ULL }, // Inst #1141 = CALL64pcrel32 |
| 46016 | { 1140, 5, 0, 0, 1478, 2, 0, 232, X86ImpOpBase + 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x2007f80000022ULL }, // Inst #1140 = CALL64m_NT |
| 46017 | { 1139, 5, 0, 0, 1478, 2, 0, 232, X86ImpOpBase + 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f80000022ULL }, // Inst #1139 = CALL64m |
| 46018 | { 1138, 1, 0, 0, 928, 2, 0, 202, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call), 0x2007f80000132ULL }, // Inst #1138 = CALL32r_NT |
| 46019 | { 1137, 1, 0, 0, 928, 2, 0, 202, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call), 0x7f80000132ULL }, // Inst #1137 = CALL32r |
| 46020 | { 1136, 5, 0, 0, 785, 2, 0, 232, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x2007f80000122ULL }, // Inst #1136 = CALL32m_NT |
| 46021 | { 1135, 5, 0, 0, 785, 2, 0, 232, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f80000122ULL }, // Inst #1135 = CALL32m |
| 46022 | { 1134, 1, 0, 0, 928, 2, 0, 599, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call), 0x2007f800000b2ULL }, // Inst #1134 = CALL16r_NT |
| 46023 | { 1133, 1, 0, 0, 928, 2, 0, 599, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call), 0x7f800000b2ULL }, // Inst #1133 = CALL16r |
| 46024 | { 1132, 5, 0, 0, 785, 2, 0, 232, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x2007f800000a2ULL }, // Inst #1132 = CALL16m_NT |
| 46025 | { 1131, 5, 0, 0, 785, 2, 0, 232, X86ImpOpBase + 112, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f800000a2ULL }, // Inst #1131 = CALL16m |
| 46026 | { 1130, 3, 1, 0, 68, 0, 0, 444, X86ImpOpBase + 0, 0, 0x10007ae002402aULL }, // Inst #1130 = BZHI64rr_NF |
| 46027 | { 1129, 3, 1, 0, 68, 0, 1, 444, X86ImpOpBase + 0, 0, 0x7ae002402aULL }, // Inst #1129 = BZHI64rr_EVEX |
| 46028 | { 1128, 3, 1, 0, 68, 0, 1, 444, X86ImpOpBase + 0, 0, 0x7aa002402aULL }, // Inst #1128 = BZHI64rr |
| 46029 | { 1127, 7, 1, 0, 67, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10007ae002401aULL }, // Inst #1127 = BZHI64rm_NF |
| 46030 | { 1126, 7, 1, 0, 67, 0, 1, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ae002401aULL }, // Inst #1126 = BZHI64rm_EVEX |
| 46031 | { 1125, 7, 1, 0, 67, 0, 1, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa002401aULL }, // Inst #1125 = BZHI64rm |
| 46032 | { 1124, 3, 1, 0, 68, 0, 0, 226, X86ImpOpBase + 0, 0, 0x10007ae000402aULL }, // Inst #1124 = BZHI32rr_NF |
| 46033 | { 1123, 3, 1, 0, 68, 0, 1, 226, X86ImpOpBase + 0, 0, 0x7ae000402aULL }, // Inst #1123 = BZHI32rr_EVEX |
| 46034 | { 1122, 3, 1, 0, 68, 0, 1, 226, X86ImpOpBase + 0, 0, 0x7aa000402aULL }, // Inst #1122 = BZHI32rr |
| 46035 | { 1121, 7, 1, 0, 67, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10007ae000401aULL }, // Inst #1121 = BZHI32rm_NF |
| 46036 | { 1120, 7, 1, 0, 67, 0, 1, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ae000401aULL }, // Inst #1120 = BZHI32rm_EVEX |
| 46037 | { 1119, 7, 1, 0, 67, 0, 1, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7aa000401aULL }, // Inst #1119 = BZHI32rm |
| 46038 | { 1118, 3, 1, 0, 1476, 0, 1, 167, X86ImpOpBase + 0, 0, 0x5580022028ULL }, // Inst #1118 = BTS64rr |
| 46039 | { 1117, 3, 1, 0, 66, 0, 1, 164, X86ImpOpBase + 0, 0, 0x5d00062035ULL }, // Inst #1117 = BTS64ri8 |
| 46040 | { 1116, 6, 0, 0, 1477, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580022018ULL }, // Inst #1116 = BTS64mr |
| 46041 | { 1115, 6, 0, 0, 64, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00062025ULL }, // Inst #1115 = BTS64mi8 |
| 46042 | { 1114, 3, 1, 0, 66, 0, 1, 161, X86ImpOpBase + 0, 0, 0x5580002128ULL }, // Inst #1114 = BTS32rr |
| 46043 | { 1113, 3, 1, 0, 66, 0, 1, 158, X86ImpOpBase + 0, 0, 0x5d00042135ULL }, // Inst #1113 = BTS32ri8 |
| 46044 | { 1112, 6, 0, 0, 65, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580002118ULL }, // Inst #1112 = BTS32mr |
| 46045 | { 1111, 6, 0, 0, 64, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00042125ULL }, // Inst #1111 = BTS32mi8 |
| 46046 | { 1110, 3, 1, 0, 66, 0, 1, 155, X86ImpOpBase + 0, 0, 0x55800020a8ULL }, // Inst #1110 = BTS16rr |
| 46047 | { 1109, 3, 1, 0, 66, 0, 1, 152, X86ImpOpBase + 0, 0, 0x5d000420b5ULL }, // Inst #1109 = BTS16ri8 |
| 46048 | { 1108, 6, 0, 0, 65, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580002098ULL }, // Inst #1108 = BTS16mr |
| 46049 | { 1107, 6, 0, 0, 64, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d000420a5ULL }, // Inst #1107 = BTS16mi8 |
| 46050 | { 1106, 3, 1, 0, 1476, 0, 1, 167, X86ImpOpBase + 0, 0, 0x5980022028ULL }, // Inst #1106 = BTR64rr |
| 46051 | { 1105, 3, 1, 0, 66, 0, 1, 164, X86ImpOpBase + 0, 0, 0x5d00062036ULL }, // Inst #1105 = BTR64ri8 |
| 46052 | { 1104, 6, 0, 0, 1477, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980022018ULL }, // Inst #1104 = BTR64mr |
| 46053 | { 1103, 6, 0, 0, 64, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00062026ULL }, // Inst #1103 = BTR64mi8 |
| 46054 | { 1102, 3, 1, 0, 66, 0, 1, 161, X86ImpOpBase + 0, 0, 0x5980002128ULL }, // Inst #1102 = BTR32rr |
| 46055 | { 1101, 3, 1, 0, 66, 0, 1, 158, X86ImpOpBase + 0, 0, 0x5d00042136ULL }, // Inst #1101 = BTR32ri8 |
| 46056 | { 1100, 6, 0, 0, 65, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980002118ULL }, // Inst #1100 = BTR32mr |
| 46057 | { 1099, 6, 0, 0, 64, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00042126ULL }, // Inst #1099 = BTR32mi8 |
| 46058 | { 1098, 3, 1, 0, 66, 0, 1, 155, X86ImpOpBase + 0, 0, 0x59800020a8ULL }, // Inst #1098 = BTR16rr |
| 46059 | { 1097, 3, 1, 0, 66, 0, 1, 152, X86ImpOpBase + 0, 0, 0x5d000420b6ULL }, // Inst #1097 = BTR16ri8 |
| 46060 | { 1096, 6, 0, 0, 65, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980002098ULL }, // Inst #1096 = BTR16mr |
| 46061 | { 1095, 6, 0, 0, 64, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d000420a6ULL }, // Inst #1095 = BTR16mi8 |
| 46062 | { 1094, 3, 1, 0, 1476, 0, 1, 167, X86ImpOpBase + 0, 0, 0x5d80022028ULL }, // Inst #1094 = BTC64rr |
| 46063 | { 1093, 3, 1, 0, 66, 0, 1, 164, X86ImpOpBase + 0, 0, 0x5d00062037ULL }, // Inst #1093 = BTC64ri8 |
| 46064 | { 1092, 6, 0, 0, 1477, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80022018ULL }, // Inst #1092 = BTC64mr |
| 46065 | { 1091, 6, 0, 0, 64, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00062027ULL }, // Inst #1091 = BTC64mi8 |
| 46066 | { 1090, 3, 1, 0, 66, 0, 1, 161, X86ImpOpBase + 0, 0, 0x5d80002128ULL }, // Inst #1090 = BTC32rr |
| 46067 | { 1089, 3, 1, 0, 66, 0, 1, 158, X86ImpOpBase + 0, 0, 0x5d00042137ULL }, // Inst #1089 = BTC32ri8 |
| 46068 | { 1088, 6, 0, 0, 65, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80002118ULL }, // Inst #1088 = BTC32mr |
| 46069 | { 1087, 6, 0, 0, 64, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00042127ULL }, // Inst #1087 = BTC32mi8 |
| 46070 | { 1086, 3, 1, 0, 66, 0, 1, 155, X86ImpOpBase + 0, 0, 0x5d800020a8ULL }, // Inst #1086 = BTC16rr |
| 46071 | { 1085, 3, 1, 0, 66, 0, 1, 152, X86ImpOpBase + 0, 0, 0x5d000420b7ULL }, // Inst #1085 = BTC16ri8 |
| 46072 | { 1084, 6, 0, 0, 65, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80002098ULL }, // Inst #1084 = BTC16mr |
| 46073 | { 1083, 6, 0, 0, 64, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d000420a7ULL }, // Inst #1083 = BTC16mi8 |
| 46074 | { 1082, 2, 0, 0, 1475, 0, 1, 575, X86ImpOpBase + 0, 0, 0x5180022028ULL }, // Inst #1082 = BT64rr |
| 46075 | { 1081, 2, 0, 0, 63, 0, 1, 206, X86ImpOpBase + 0, 0, 0x5d00062034ULL }, // Inst #1081 = BT64ri8 |
| 46076 | { 1080, 6, 0, 0, 1474, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5180022018ULL }, // Inst #1080 = BT64mr |
| 46077 | { 1079, 6, 0, 0, 61, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5d00062024ULL }, // Inst #1079 = BT64mi8 |
| 46078 | { 1078, 2, 0, 0, 63, 0, 1, 573, X86ImpOpBase + 0, 0, 0x5180002128ULL }, // Inst #1078 = BT32rr |
| 46079 | { 1077, 2, 0, 0, 63, 0, 1, 204, X86ImpOpBase + 0, 0, 0x5d00042134ULL }, // Inst #1077 = BT32ri8 |
| 46080 | { 1076, 6, 0, 0, 62, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5180002118ULL }, // Inst #1076 = BT32mr |
| 46081 | { 1075, 6, 0, 0, 61, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5d00042124ULL }, // Inst #1075 = BT32mi8 |
| 46082 | { 1074, 2, 0, 0, 63, 0, 1, 569, X86ImpOpBase + 0, 0, 0x51800020a8ULL }, // Inst #1074 = BT16rr |
| 46083 | { 1073, 2, 0, 0, 63, 0, 1, 597, X86ImpOpBase + 0, 0, 0x5d000420b4ULL }, // Inst #1073 = BT16ri8 |
| 46084 | { 1072, 6, 0, 0, 62, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5180002098ULL }, // Inst #1072 = BT16mr |
| 46085 | { 1071, 6, 0, 0, 61, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5d000420a4ULL }, // Inst #1071 = BT16mi8 |
| 46086 | { 1070, 2, 1, 0, 60, 0, 0, 322, X86ImpOpBase + 0, 0, 0x6400022002ULL }, // Inst #1070 = BSWAP64r |
| 46087 | { 1069, 2, 1, 0, 59, 0, 0, 320, X86ImpOpBase + 0, 0, 0x6400002102ULL }, // Inst #1069 = BSWAP32r |
| 46088 | { 1068, 2, 1, 0, 59, 0, 0, 595, X86ImpOpBase + 0, 0, 0x6400002082ULL }, // Inst #1068 = BSWAP16r_BAD |
| 46089 | { 1067, 3, 1, 0, 58, 0, 1, 167, X86ImpOpBase + 0, 0, 0x5e80022029ULL }, // Inst #1067 = BSR64rr |
| 46090 | { 1066, 7, 1, 0, 57, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e80022019ULL }, // Inst #1066 = BSR64rm |
| 46091 | { 1065, 3, 1, 0, 58, 0, 1, 161, X86ImpOpBase + 0, 0, 0x5e80002129ULL }, // Inst #1065 = BSR32rr |
| 46092 | { 1064, 7, 1, 0, 57, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e80002119ULL }, // Inst #1064 = BSR32rm |
| 46093 | { 1063, 3, 1, 0, 58, 0, 1, 155, X86ImpOpBase + 0, 0, 0x5e800020a9ULL }, // Inst #1063 = BSR16rr |
| 46094 | { 1062, 7, 1, 0, 57, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e80002099ULL }, // Inst #1062 = BSR16rm |
| 46095 | { 1061, 3, 1, 0, 56, 0, 1, 167, X86ImpOpBase + 0, 0, 0x5e00022029ULL }, // Inst #1061 = BSF64rr |
| 46096 | { 1060, 7, 1, 0, 55, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e00022019ULL }, // Inst #1060 = BSF64rm |
| 46097 | { 1059, 3, 1, 0, 56, 0, 1, 161, X86ImpOpBase + 0, 0, 0x5e00002129ULL }, // Inst #1059 = BSF32rr |
| 46098 | { 1058, 7, 1, 0, 55, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e00002119ULL }, // Inst #1058 = BSF32rm |
| 46099 | { 1057, 3, 1, 0, 56, 0, 1, 155, X86ImpOpBase + 0, 0, 0x5e000020a9ULL }, // Inst #1057 = BSF16rr |
| 46100 | { 1056, 7, 1, 0, 55, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x5e00002099ULL }, // Inst #1056 = BSF16rm |
| 46101 | { 1055, 6, 1, 0, 689, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3100000119ULL }, // Inst #1055 = BOUNDS32rm |
| 46102 | { 1054, 6, 1, 0, 689, 0, 0, 589, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3100000099ULL }, // Inst #1054 = BOUNDS16rm |
| 46103 | { 1053, 2, 1, 0, 54, 0, 0, 575, X86ImpOpBase + 0, 0, 0x1000f9e0024031ULL }, // Inst #1053 = BLSR64rr_NF |
| 46104 | { 1052, 2, 1, 0, 54, 0, 1, 575, X86ImpOpBase + 0, 0, 0xf9e0024031ULL }, // Inst #1052 = BLSR64rr_EVEX |
| 46105 | { 1051, 2, 1, 0, 54, 0, 1, 575, X86ImpOpBase + 0, 0, 0xf9a0024031ULL }, // Inst #1051 = BLSR64rr |
| 46106 | { 1050, 6, 1, 0, 53, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0024021ULL }, // Inst #1050 = BLSR64rm_NF |
| 46107 | { 1049, 6, 1, 0, 53, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9e0024021ULL }, // Inst #1049 = BLSR64rm_EVEX |
| 46108 | { 1048, 6, 1, 0, 53, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9a0024021ULL }, // Inst #1048 = BLSR64rm |
| 46109 | { 1047, 2, 1, 0, 54, 0, 0, 573, X86ImpOpBase + 0, 0, 0x1000f9e0004031ULL }, // Inst #1047 = BLSR32rr_NF |
| 46110 | { 1046, 2, 1, 0, 54, 0, 1, 573, X86ImpOpBase + 0, 0, 0xf9e0004031ULL }, // Inst #1046 = BLSR32rr_EVEX |
| 46111 | { 1045, 2, 1, 0, 54, 0, 1, 573, X86ImpOpBase + 0, 0, 0xf9a0004031ULL }, // Inst #1045 = BLSR32rr |
| 46112 | { 1044, 6, 1, 0, 53, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0004021ULL }, // Inst #1044 = BLSR32rm_NF |
| 46113 | { 1043, 6, 1, 0, 53, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9e0004021ULL }, // Inst #1043 = BLSR32rm_EVEX |
| 46114 | { 1042, 6, 1, 0, 53, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9a0004021ULL }, // Inst #1042 = BLSR32rm |
| 46115 | { 1041, 2, 1, 0, 54, 0, 0, 575, X86ImpOpBase + 0, 0, 0x1000f9e0024032ULL }, // Inst #1041 = BLSMSK64rr_NF |
| 46116 | { 1040, 2, 1, 0, 54, 0, 1, 575, X86ImpOpBase + 0, 0, 0xf9e0024032ULL }, // Inst #1040 = BLSMSK64rr_EVEX |
| 46117 | { 1039, 2, 1, 0, 54, 0, 1, 575, X86ImpOpBase + 0, 0, 0xf9a0024032ULL }, // Inst #1039 = BLSMSK64rr |
| 46118 | { 1038, 6, 1, 0, 53, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0024022ULL }, // Inst #1038 = BLSMSK64rm_NF |
| 46119 | { 1037, 6, 1, 0, 53, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9e0024022ULL }, // Inst #1037 = BLSMSK64rm_EVEX |
| 46120 | { 1036, 6, 1, 0, 53, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9a0024022ULL }, // Inst #1036 = BLSMSK64rm |
| 46121 | { 1035, 2, 1, 0, 54, 0, 0, 573, X86ImpOpBase + 0, 0, 0x1000f9e0004032ULL }, // Inst #1035 = BLSMSK32rr_NF |
| 46122 | { 1034, 2, 1, 0, 54, 0, 1, 573, X86ImpOpBase + 0, 0, 0xf9e0004032ULL }, // Inst #1034 = BLSMSK32rr_EVEX |
| 46123 | { 1033, 2, 1, 0, 54, 0, 1, 573, X86ImpOpBase + 0, 0, 0xf9a0004032ULL }, // Inst #1033 = BLSMSK32rr |
| 46124 | { 1032, 6, 1, 0, 53, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0004022ULL }, // Inst #1032 = BLSMSK32rm_NF |
| 46125 | { 1031, 6, 1, 0, 53, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9e0004022ULL }, // Inst #1031 = BLSMSK32rm_EVEX |
| 46126 | { 1030, 6, 1, 0, 53, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9a0004022ULL }, // Inst #1030 = BLSMSK32rm |
| 46127 | { 1029, 2, 1, 0, 1157, 0, 1, 575, X86ImpOpBase + 0, 0, 0x80c002a036ULL }, // Inst #1029 = BLSIC64rr |
| 46128 | { 1028, 6, 1, 0, 1158, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c002a026ULL }, // Inst #1028 = BLSIC64rm |
| 46129 | { 1027, 2, 1, 0, 1157, 0, 1, 573, X86ImpOpBase + 0, 0, 0x80c000a036ULL }, // Inst #1027 = BLSIC32rr |
| 46130 | { 1026, 6, 1, 0, 1158, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c000a026ULL }, // Inst #1026 = BLSIC32rm |
| 46131 | { 1025, 2, 1, 0, 54, 0, 0, 575, X86ImpOpBase + 0, 0, 0x1000f9e0024033ULL }, // Inst #1025 = BLSI64rr_NF |
| 46132 | { 1024, 2, 1, 0, 54, 0, 1, 575, X86ImpOpBase + 0, 0, 0xf9e0024033ULL }, // Inst #1024 = BLSI64rr_EVEX |
| 46133 | { 1023, 2, 1, 0, 54, 0, 1, 575, X86ImpOpBase + 0, 0, 0xf9a0024033ULL }, // Inst #1023 = BLSI64rr |
| 46134 | { 1022, 6, 1, 0, 53, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0024023ULL }, // Inst #1022 = BLSI64rm_NF |
| 46135 | { 1021, 6, 1, 0, 53, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9e0024023ULL }, // Inst #1021 = BLSI64rm_EVEX |
| 46136 | { 1020, 6, 1, 0, 53, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9a0024023ULL }, // Inst #1020 = BLSI64rm |
| 46137 | { 1019, 2, 1, 0, 54, 0, 0, 573, X86ImpOpBase + 0, 0, 0x1000f9e0004033ULL }, // Inst #1019 = BLSI32rr_NF |
| 46138 | { 1018, 2, 1, 0, 54, 0, 1, 573, X86ImpOpBase + 0, 0, 0xf9e0004033ULL }, // Inst #1018 = BLSI32rr_EVEX |
| 46139 | { 1017, 2, 1, 0, 54, 0, 1, 573, X86ImpOpBase + 0, 0, 0xf9a0004033ULL }, // Inst #1017 = BLSI32rr |
| 46140 | { 1016, 6, 1, 0, 53, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0004023ULL }, // Inst #1016 = BLSI32rm_NF |
| 46141 | { 1015, 6, 1, 0, 53, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9e0004023ULL }, // Inst #1015 = BLSI32rm_EVEX |
| 46142 | { 1014, 6, 1, 0, 53, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf9a0004023ULL }, // Inst #1014 = BLSI32rm |
| 46143 | { 1013, 2, 1, 0, 1157, 0, 1, 575, X86ImpOpBase + 0, 0, 0x80c002a032ULL }, // Inst #1013 = BLSFILL64rr |
| 46144 | { 1012, 6, 1, 0, 1158, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c002a022ULL }, // Inst #1012 = BLSFILL64rm |
| 46145 | { 1011, 2, 1, 0, 1157, 0, 1, 573, X86ImpOpBase + 0, 0, 0x80c000a032ULL }, // Inst #1011 = BLSFILL32rr |
| 46146 | { 1010, 6, 1, 0, 1158, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c000a022ULL }, // Inst #1010 = BLSFILL32rm |
| 46147 | { 1009, 3, 1, 0, 52, 1, 0, 494, X86ImpOpBase + 111, 0, 0xa08004829ULL }, // Inst #1009 = BLENDVPSrr0 |
| 46148 | { 1008, 7, 1, 0, 51, 1, 0, 487, X86ImpOpBase + 111, 0|(1ULL<<MCID::MayLoad), 0xa08004819ULL }, // Inst #1008 = BLENDVPSrm0 |
| 46149 | { 1007, 3, 1, 0, 52, 1, 0, 494, X86ImpOpBase + 111, 0, 0xa90004829ULL }, // Inst #1007 = BLENDVPDrr0 |
| 46150 | { 1006, 7, 1, 0, 51, 1, 0, 487, X86ImpOpBase + 111, 0|(1ULL<<MCID::MayLoad), 0xa90004819ULL }, // Inst #1006 = BLENDVPDrm0 |
| 46151 | { 1005, 4, 1, 0, 50, 0, 0, 585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x608046829ULL }, // Inst #1005 = BLENDPSrri |
| 46152 | { 1004, 8, 1, 0, 49, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x608046819ULL }, // Inst #1004 = BLENDPSrmi |
| 46153 | { 1003, 4, 1, 0, 50, 0, 0, 585, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x690046829ULL }, // Inst #1003 = BLENDPDrri |
| 46154 | { 1002, 8, 1, 0, 49, 0, 0, 577, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x690046819ULL }, // Inst #1002 = BLENDPDrmi |
| 46155 | { 1001, 2, 1, 0, 1157, 0, 1, 575, X86ImpOpBase + 0, 0, 0x80c002a033ULL }, // Inst #1001 = BLCS64rr |
| 46156 | { 1000, 6, 1, 0, 1158, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c002a023ULL }, // Inst #1000 = BLCS64rm |
| 46157 | { 999, 2, 1, 0, 1157, 0, 1, 573, X86ImpOpBase + 0, 0, 0x80c000a033ULL }, // Inst #999 = BLCS32rr |
| 46158 | { 998, 6, 1, 0, 1158, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c000a023ULL }, // Inst #998 = BLCS32rm |
| 46159 | { 997, 2, 1, 0, 1157, 0, 1, 575, X86ImpOpBase + 0, 0, 0x814002a031ULL }, // Inst #997 = BLCMSK64rr |
| 46160 | { 996, 6, 1, 0, 1158, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x814002a021ULL }, // Inst #996 = BLCMSK64rm |
| 46161 | { 995, 2, 1, 0, 1157, 0, 1, 573, X86ImpOpBase + 0, 0, 0x814000a031ULL }, // Inst #995 = BLCMSK32rr |
| 46162 | { 994, 6, 1, 0, 1158, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x814000a021ULL }, // Inst #994 = BLCMSK32rm |
| 46163 | { 993, 2, 1, 0, 1157, 0, 1, 575, X86ImpOpBase + 0, 0, 0x80c002a035ULL }, // Inst #993 = BLCIC64rr |
| 46164 | { 992, 6, 1, 0, 1158, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c002a025ULL }, // Inst #992 = BLCIC64rm |
| 46165 | { 991, 2, 1, 0, 1157, 0, 1, 573, X86ImpOpBase + 0, 0, 0x80c000a035ULL }, // Inst #991 = BLCIC32rr |
| 46166 | { 990, 6, 1, 0, 1158, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c000a025ULL }, // Inst #990 = BLCIC32rm |
| 46167 | { 989, 2, 1, 0, 1157, 0, 1, 575, X86ImpOpBase + 0, 0, 0x814002a036ULL }, // Inst #989 = BLCI64rr |
| 46168 | { 988, 6, 1, 0, 1158, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x814002a026ULL }, // Inst #988 = BLCI64rm |
| 46169 | { 987, 2, 1, 0, 1157, 0, 1, 573, X86ImpOpBase + 0, 0, 0x814000a036ULL }, // Inst #987 = BLCI32rr |
| 46170 | { 986, 6, 1, 0, 1158, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x814000a026ULL }, // Inst #986 = BLCI32rm |
| 46171 | { 985, 2, 1, 0, 1157, 0, 1, 575, X86ImpOpBase + 0, 0, 0x80c002a031ULL }, // Inst #985 = BLCFILL64rr |
| 46172 | { 984, 6, 1, 0, 1158, 0, 1, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c002a021ULL }, // Inst #984 = BLCFILL64rm |
| 46173 | { 983, 2, 1, 0, 1157, 0, 1, 573, X86ImpOpBase + 0, 0, 0x80c000a031ULL }, // Inst #983 = BLCFILL32rr |
| 46174 | { 982, 6, 1, 0, 1158, 0, 1, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80c000a021ULL }, // Inst #982 = BLCFILL32rm |
| 46175 | { 981, 3, 1, 0, 1164, 0, 1, 427, X86ImpOpBase + 0, 0, 0x84022c029ULL }, // Inst #981 = BEXTRI64ri |
| 46176 | { 980, 7, 1, 0, 1165, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84022c019ULL }, // Inst #980 = BEXTRI64mi |
| 46177 | { 979, 3, 1, 0, 1164, 0, 1, 396, X86ImpOpBase + 0, 0, 0x84018c029ULL }, // Inst #979 = BEXTRI32ri |
| 46178 | { 978, 7, 1, 0, 1165, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84018c019ULL }, // Inst #978 = BEXTRI32mi |
| 46179 | { 977, 3, 1, 0, 46, 0, 0, 444, X86ImpOpBase + 0, 0, 0x10007be002402aULL }, // Inst #977 = BEXTR64rr_NF |
| 46180 | { 976, 3, 1, 0, 46, 0, 1, 444, X86ImpOpBase + 0, 0, 0x7be002402aULL }, // Inst #976 = BEXTR64rr_EVEX |
| 46181 | { 975, 3, 1, 0, 46, 0, 1, 444, X86ImpOpBase + 0, 0, 0x7ba002402aULL }, // Inst #975 = BEXTR64rr |
| 46182 | { 974, 7, 1, 0, 45, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10007be002401aULL }, // Inst #974 = BEXTR64rm_NF |
| 46183 | { 973, 7, 1, 0, 45, 0, 1, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7be002401aULL }, // Inst #973 = BEXTR64rm_EVEX |
| 46184 | { 972, 7, 1, 0, 45, 0, 1, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ba002401aULL }, // Inst #972 = BEXTR64rm |
| 46185 | { 971, 3, 1, 0, 46, 0, 0, 226, X86ImpOpBase + 0, 0, 0x10007be000402aULL }, // Inst #971 = BEXTR32rr_NF |
| 46186 | { 970, 3, 1, 0, 46, 0, 1, 226, X86ImpOpBase + 0, 0, 0x7be000402aULL }, // Inst #970 = BEXTR32rr_EVEX |
| 46187 | { 969, 3, 1, 0, 46, 0, 1, 226, X86ImpOpBase + 0, 0, 0x7ba000402aULL }, // Inst #969 = BEXTR32rr |
| 46188 | { 968, 7, 1, 0, 45, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10007be000401aULL }, // Inst #968 = BEXTR32rm_NF |
| 46189 | { 967, 7, 1, 0, 45, 0, 1, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7be000401aULL }, // Inst #967 = BEXTR32rm_EVEX |
| 46190 | { 966, 7, 1, 0, 45, 0, 1, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x7ba000401aULL }, // Inst #966 = BEXTR32rm |
| 46191 | { 965, 6, 0, 0, 18, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60031018ULL }, // Inst #965 = AXOR64mr_EVEX |
| 46192 | { 964, 6, 0, 0, 1437, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00025018ULL }, // Inst #964 = AXOR64mr |
| 46193 | { 963, 6, 0, 0, 18, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60011018ULL }, // Inst #963 = AXOR32mr_EVEX |
| 46194 | { 962, 6, 0, 0, 18, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00005018ULL }, // Inst #962 = AXOR32mr |
| 46195 | { 961, 2, 0, 0, 0, 0, 3, 571, X86ImpOpBase + 108, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #961 = ASAN_CHECK_MEMACCESS |
| 46196 | { 960, 2, 1, 0, 701, 0, 0, 569, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3180000028ULL }, // Inst #960 = ARPL16rr |
| 46197 | { 959, 6, 0, 0, 701, 0, 0, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3180000018ULL }, // Inst #959 = ARPL16mr |
| 46198 | { 958, 6, 0, 0, 18, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60031818ULL }, // Inst #958 = AOR64mr_EVEX |
| 46199 | { 957, 6, 0, 0, 1437, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00025818ULL }, // Inst #957 = AOR64mr |
| 46200 | { 956, 6, 0, 0, 18, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60011818ULL }, // Inst #956 = AOR32mr_EVEX |
| 46201 | { 955, 6, 0, 0, 18, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00005818ULL }, // Inst #955 = AOR32mr |
| 46202 | { 954, 3, 1, 0, 44, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x2a08002029ULL }, // Inst #954 = ANDPSrr |
| 46203 | { 953, 7, 1, 0, 43, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2a08002019ULL }, // Inst #953 = ANDPSrm |
| 46204 | { 952, 3, 1, 0, 44, 0, 0, 494, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x2a10002829ULL }, // Inst #952 = ANDPDrr |
| 46205 | { 951, 7, 1, 0, 43, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2a10002819ULL }, // Inst #951 = ANDPDrm |
| 46206 | { 950, 3, 1, 0, 1194, 0, 0, 494, X86ImpOpBase + 0, 0, 0x2a88002029ULL }, // Inst #950 = ANDNPSrr |
| 46207 | { 949, 7, 1, 0, 43, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2a88002019ULL }, // Inst #949 = ANDNPSrm |
| 46208 | { 948, 3, 1, 0, 1194, 0, 0, 494, X86ImpOpBase + 0, 0, 0x2a90002829ULL }, // Inst #948 = ANDNPDrr |
| 46209 | { 947, 7, 1, 0, 43, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2a90002819ULL }, // Inst #947 = ANDNPDrm |
| 46210 | { 946, 3, 1, 0, 839, 0, 0, 444, X86ImpOpBase + 0, 0, 0x1000f960024029ULL }, // Inst #946 = ANDN64rr_NF |
| 46211 | { 945, 3, 1, 0, 839, 0, 1, 444, X86ImpOpBase + 0, 0, 0xf960024029ULL }, // Inst #945 = ANDN64rr_EVEX |
| 46212 | { 944, 3, 1, 0, 1473, 0, 1, 444, X86ImpOpBase + 0, 0, 0xf920024029ULL }, // Inst #944 = ANDN64rr |
| 46213 | { 943, 7, 1, 0, 849, 0, 0, 437, X86ImpOpBase + 0, 0, 0x1000f960024019ULL }, // Inst #943 = ANDN64rm_NF |
| 46214 | { 942, 7, 1, 0, 849, 0, 1, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf960024019ULL }, // Inst #942 = ANDN64rm_EVEX |
| 46215 | { 941, 7, 1, 0, 1472, 0, 1, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf920024019ULL }, // Inst #941 = ANDN64rm |
| 46216 | { 940, 3, 1, 0, 839, 0, 0, 226, X86ImpOpBase + 0, 0, 0x1000f960004029ULL }, // Inst #940 = ANDN32rr_NF |
| 46217 | { 939, 3, 1, 0, 839, 0, 1, 226, X86ImpOpBase + 0, 0, 0xf960004029ULL }, // Inst #939 = ANDN32rr_EVEX |
| 46218 | { 938, 3, 1, 0, 1473, 0, 1, 226, X86ImpOpBase + 0, 0, 0xf920004029ULL }, // Inst #938 = ANDN32rr |
| 46219 | { 937, 7, 1, 0, 849, 0, 0, 406, X86ImpOpBase + 0, 0, 0x1000f960004019ULL }, // Inst #937 = ANDN32rm_NF |
| 46220 | { 936, 7, 1, 0, 849, 0, 1, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf960004019ULL }, // Inst #936 = ANDN32rm_EVEX |
| 46221 | { 935, 7, 1, 0, 1472, 0, 1, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xf920004019ULL }, // Inst #935 = ANDN32rm |
| 46222 | { 934, 3, 1, 0, 1462, 0, 1, 173, X86ImpOpBase + 0, 0, 0x1100000029ULL }, // Inst #934 = AND8rr_REV |
| 46223 | { 933, 3, 1, 0, 1, 0, 0, 173, X86ImpOpBase + 0, 0, 0x10001160010029ULL }, // Inst #933 = AND8rr_NF_REV |
| 46224 | { 932, 3, 1, 0, 1, 0, 0, 484, X86ImpOpBase + 0, 0, 0x10109160010029ULL }, // Inst #932 = AND8rr_NF_ND_REV |
| 46225 | { 931, 3, 1, 0, 1, 0, 0, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10109060010028ULL }, // Inst #931 = AND8rr_NF_ND |
| 46226 | { 930, 3, 1, 0, 1, 0, 0, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10001060010028ULL }, // Inst #930 = AND8rr_NF |
| 46227 | { 929, 3, 1, 0, 1, 0, 1, 484, X86ImpOpBase + 0, 0, 0x109160010029ULL }, // Inst #929 = AND8rr_ND_REV |
| 46228 | { 928, 3, 1, 0, 1, 0, 1, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x109060010028ULL }, // Inst #928 = AND8rr_ND |
| 46229 | { 927, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0, 0xc001160010029ULL }, // Inst #927 = AND8rr_EVEX_REV |
| 46230 | { 926, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc001060010028ULL }, // Inst #926 = AND8rr_EVEX |
| 46231 | { 925, 3, 1, 0, 1462, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1000000028ULL }, // Inst #925 = AND8rr |
| 46232 | { 924, 7, 1, 0, 25, 0, 0, 477, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10109160010019ULL }, // Inst #924 = AND8rm_NF_ND |
| 46233 | { 923, 7, 1, 0, 25, 0, 0, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10001160010019ULL }, // Inst #923 = AND8rm_NF |
| 46234 | { 922, 7, 1, 0, 25, 0, 1, 477, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x109160010019ULL }, // Inst #922 = AND8rm_ND |
| 46235 | { 921, 7, 1, 0, 25, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc001160010019ULL }, // Inst #921 = AND8rm_EVEX |
| 46236 | { 920, 7, 1, 0, 1450, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1100000019ULL }, // Inst #920 = AND8rm |
| 46237 | { 919, 3, 1, 0, 1, 0, 0, 467, X86ImpOpBase + 0, 0, 0x1010c060050034ULL }, // Inst #919 = AND8ri_NF_ND |
| 46238 | { 918, 3, 1, 0, 1, 0, 0, 170, X86ImpOpBase + 0, 0, 0x10004060050034ULL }, // Inst #918 = AND8ri_NF |
| 46239 | { 917, 3, 1, 0, 1, 0, 1, 467, X86ImpOpBase + 0, 0, 0x10c060050034ULL }, // Inst #917 = AND8ri_ND |
| 46240 | { 916, 3, 1, 0, 1, 0, 1, 170, X86ImpOpBase + 0, 0, 0xc004060050034ULL }, // Inst #916 = AND8ri_EVEX |
| 46241 | { 915, 3, 1, 0, 1462, 0, 1, 170, X86ImpOpBase + 0, 0, 0x4100040034ULL }, // Inst #915 = AND8ri8 |
| 46242 | { 914, 3, 1, 0, 1462, 0, 1, 170, X86ImpOpBase + 0, 0, 0x4000040034ULL }, // Inst #914 = AND8ri |
| 46243 | { 913, 7, 1, 0, 932, 0, 0, 460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10109060010018ULL }, // Inst #913 = AND8mr_NF_ND |
| 46244 | { 912, 6, 0, 0, 934, 0, 0, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001060010018ULL }, // Inst #912 = AND8mr_NF |
| 46245 | { 911, 7, 1, 0, 932, 0, 1, 460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x109060010018ULL }, // Inst #911 = AND8mr_ND |
| 46246 | { 910, 6, 0, 0, 933, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001060010018ULL }, // Inst #910 = AND8mr_EVEX |
| 46247 | { 909, 6, 0, 0, 1459, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1000000018ULL }, // Inst #909 = AND8mr |
| 46248 | { 908, 7, 1, 0, 932, 0, 0, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c060050024ULL }, // Inst #908 = AND8mi_NF_ND |
| 46249 | { 907, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10004060050024ULL }, // Inst #907 = AND8mi_NF |
| 46250 | { 906, 7, 1, 0, 932, 0, 1, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c060050024ULL }, // Inst #906 = AND8mi_ND |
| 46251 | { 905, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050024ULL }, // Inst #905 = AND8mi_EVEX |
| 46252 | { 904, 6, 0, 0, 1456, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040024ULL }, // Inst #904 = AND8mi8 |
| 46253 | { 903, 6, 0, 0, 1456, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040024ULL }, // Inst #903 = AND8mi |
| 46254 | { 902, 1, 0, 0, 1463, 1, 2, 1, X86ImpOpBase + 75, 0, 0x1200040001ULL }, // Inst #902 = AND8i8 |
| 46255 | { 901, 3, 1, 0, 1462, 0, 1, 167, X86ImpOpBase + 0, 0, 0x1180020029ULL }, // Inst #901 = AND64rr_REV |
| 46256 | { 900, 3, 1, 0, 1, 0, 0, 167, X86ImpOpBase + 0, 0, 0x100011e0030029ULL }, // Inst #900 = AND64rr_NF_REV |
| 46257 | { 899, 3, 1, 0, 1, 0, 0, 444, X86ImpOpBase + 0, 0, 0x101091e0030029ULL }, // Inst #899 = AND64rr_NF_ND_REV |
| 46258 | { 898, 3, 1, 0, 1, 0, 0, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x101090e0030028ULL }, // Inst #898 = AND64rr_NF_ND |
| 46259 | { 897, 3, 1, 0, 1, 0, 0, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100010e0030028ULL }, // Inst #897 = AND64rr_NF |
| 46260 | { 896, 3, 1, 0, 1, 0, 1, 444, X86ImpOpBase + 0, 0, 0x1091e0030029ULL }, // Inst #896 = AND64rr_ND_REV |
| 46261 | { 895, 3, 1, 0, 1, 0, 1, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1090e0030028ULL }, // Inst #895 = AND64rr_ND |
| 46262 | { 894, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0, 0xc0011e0030029ULL }, // Inst #894 = AND64rr_EVEX_REV |
| 46263 | { 893, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0010e0030028ULL }, // Inst #893 = AND64rr_EVEX |
| 46264 | { 892, 3, 1, 0, 1462, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1080020028ULL }, // Inst #892 = AND64rr |
| 46265 | { 891, 7, 1, 0, 25, 0, 0, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101091e0030019ULL }, // Inst #891 = AND64rm_NF_ND |
| 46266 | { 890, 7, 1, 0, 25, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100011e0030019ULL }, // Inst #890 = AND64rm_NF |
| 46267 | { 889, 7, 1, 0, 25, 0, 1, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1091e0030019ULL }, // Inst #889 = AND64rm_ND |
| 46268 | { 888, 7, 1, 0, 25, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0011e0030019ULL }, // Inst #888 = AND64rm_EVEX |
| 46269 | { 887, 7, 1, 0, 1470, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1180020019ULL }, // Inst #887 = AND64rm |
| 46270 | { 886, 3, 1, 0, 1, 0, 0, 427, X86ImpOpBase + 0, 0, 0x1010c1e0070034ULL }, // Inst #886 = AND64ri8_NF_ND |
| 46271 | { 885, 3, 1, 0, 1, 0, 0, 164, X86ImpOpBase + 0, 0, 0x100041e0070034ULL }, // Inst #885 = AND64ri8_NF |
| 46272 | { 884, 3, 1, 0, 1, 0, 1, 427, X86ImpOpBase + 0, 0, 0x10c1e0070034ULL }, // Inst #884 = AND64ri8_ND |
| 46273 | { 883, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0, 0xc0041e0070034ULL }, // Inst #883 = AND64ri8_EVEX |
| 46274 | { 882, 3, 1, 0, 1462, 0, 1, 164, X86ImpOpBase + 0, 0, 0x4180060034ULL }, // Inst #882 = AND64ri8 |
| 46275 | { 881, 3, 1, 0, 1, 0, 0, 427, X86ImpOpBase + 0, 0, 0x1010c0e0230034ULL }, // Inst #881 = AND64ri32_NF_ND |
| 46276 | { 880, 3, 1, 0, 1, 0, 0, 164, X86ImpOpBase + 0, 0, 0x100040e0230034ULL }, // Inst #880 = AND64ri32_NF |
| 46277 | { 879, 3, 1, 0, 1, 0, 1, 427, X86ImpOpBase + 0, 0, 0x10c0e0230034ULL }, // Inst #879 = AND64ri32_ND |
| 46278 | { 878, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0, 0xc0040e0230034ULL }, // Inst #878 = AND64ri32_EVEX |
| 46279 | { 877, 3, 1, 0, 1462, 0, 1, 164, X86ImpOpBase + 0, 0, 0x4080220034ULL }, // Inst #877 = AND64ri32 |
| 46280 | { 876, 7, 1, 0, 932, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101090e0030018ULL }, // Inst #876 = AND64mr_NF_ND |
| 46281 | { 875, 6, 0, 0, 934, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100010e0030018ULL }, // Inst #875 = AND64mr_NF |
| 46282 | { 874, 7, 1, 0, 932, 0, 1, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1090e0030018ULL }, // Inst #874 = AND64mr_ND |
| 46283 | { 873, 6, 0, 0, 933, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0010e0030018ULL }, // Inst #873 = AND64mr_EVEX |
| 46284 | { 872, 6, 0, 0, 933, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080020018ULL }, // Inst #872 = AND64mr |
| 46285 | { 871, 7, 1, 0, 932, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0070024ULL }, // Inst #871 = AND64mi8_NF_ND |
| 46286 | { 870, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0070024ULL }, // Inst #870 = AND64mi8_NF |
| 46287 | { 869, 7, 1, 0, 932, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070024ULL }, // Inst #869 = AND64mi8_ND |
| 46288 | { 868, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070024ULL }, // Inst #868 = AND64mi8_EVEX |
| 46289 | { 867, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060024ULL }, // Inst #867 = AND64mi8 |
| 46290 | { 866, 7, 1, 0, 932, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0230024ULL }, // Inst #866 = AND64mi32_NF_ND |
| 46291 | { 865, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0230024ULL }, // Inst #865 = AND64mi32_NF |
| 46292 | { 864, 7, 1, 0, 932, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230024ULL }, // Inst #864 = AND64mi32_ND |
| 46293 | { 863, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230024ULL }, // Inst #863 = AND64mi32_EVEX |
| 46294 | { 862, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220024ULL }, // Inst #862 = AND64mi32 |
| 46295 | { 861, 1, 0, 0, 1463, 1, 2, 1, X86ImpOpBase + 72, 0, 0x1280220001ULL }, // Inst #861 = AND64i32 |
| 46296 | { 860, 3, 1, 0, 1462, 0, 1, 161, X86ImpOpBase + 0, 0, 0x1180000129ULL }, // Inst #860 = AND32rr_REV |
| 46297 | { 859, 3, 1, 0, 1, 0, 0, 161, X86ImpOpBase + 0, 0, 0x100011e0010029ULL }, // Inst #859 = AND32rr_NF_REV |
| 46298 | { 858, 3, 1, 0, 1, 0, 0, 226, X86ImpOpBase + 0, 0, 0x101091e0010029ULL }, // Inst #858 = AND32rr_NF_ND_REV |
| 46299 | { 857, 3, 1, 0, 1, 0, 0, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x101090e0010028ULL }, // Inst #857 = AND32rr_NF_ND |
| 46300 | { 856, 3, 1, 0, 1, 0, 0, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100010e0010028ULL }, // Inst #856 = AND32rr_NF |
| 46301 | { 855, 3, 1, 0, 1, 0, 1, 226, X86ImpOpBase + 0, 0, 0x1091e0010029ULL }, // Inst #855 = AND32rr_ND_REV |
| 46302 | { 854, 3, 1, 0, 1, 0, 1, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1090e0010028ULL }, // Inst #854 = AND32rr_ND |
| 46303 | { 853, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0, 0xc0011e0010029ULL }, // Inst #853 = AND32rr_EVEX_REV |
| 46304 | { 852, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0010e0010028ULL }, // Inst #852 = AND32rr_EVEX |
| 46305 | { 851, 3, 1, 0, 1462, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1080000128ULL }, // Inst #851 = AND32rr |
| 46306 | { 850, 7, 1, 0, 25, 0, 0, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101091e0010019ULL }, // Inst #850 = AND32rm_NF_ND |
| 46307 | { 849, 7, 1, 0, 25, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100011e0010019ULL }, // Inst #849 = AND32rm_NF |
| 46308 | { 848, 7, 1, 0, 25, 0, 1, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1091e0010019ULL }, // Inst #848 = AND32rm_ND |
| 46309 | { 847, 7, 1, 0, 25, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0011e0010019ULL }, // Inst #847 = AND32rm_EVEX |
| 46310 | { 846, 7, 1, 0, 1450, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1180000119ULL }, // Inst #846 = AND32rm |
| 46311 | { 845, 3, 1, 0, 1, 0, 0, 396, X86ImpOpBase + 0, 0, 0x1010c0e0190034ULL }, // Inst #845 = AND32ri_NF_ND |
| 46312 | { 844, 3, 1, 0, 1, 0, 0, 158, X86ImpOpBase + 0, 0, 0x100040e0190034ULL }, // Inst #844 = AND32ri_NF |
| 46313 | { 843, 3, 1, 0, 1, 0, 1, 396, X86ImpOpBase + 0, 0, 0x10c0e0190034ULL }, // Inst #843 = AND32ri_ND |
| 46314 | { 842, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0, 0xc0040e0190034ULL }, // Inst #842 = AND32ri_EVEX |
| 46315 | { 841, 3, 1, 0, 1, 0, 0, 396, X86ImpOpBase + 0, 0, 0x1010c1e0050034ULL }, // Inst #841 = AND32ri8_NF_ND |
| 46316 | { 840, 3, 1, 0, 1, 0, 0, 158, X86ImpOpBase + 0, 0, 0x100041e0050034ULL }, // Inst #840 = AND32ri8_NF |
| 46317 | { 839, 3, 1, 0, 1, 0, 1, 396, X86ImpOpBase + 0, 0, 0x10c1e0050034ULL }, // Inst #839 = AND32ri8_ND |
| 46318 | { 838, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0, 0xc0041e0050034ULL }, // Inst #838 = AND32ri8_EVEX |
| 46319 | { 837, 3, 1, 0, 1462, 0, 1, 158, X86ImpOpBase + 0, 0, 0x4180040134ULL }, // Inst #837 = AND32ri8 |
| 46320 | { 836, 3, 1, 0, 1462, 0, 1, 158, X86ImpOpBase + 0, 0, 0x4080180134ULL }, // Inst #836 = AND32ri |
| 46321 | { 835, 7, 1, 0, 932, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101090e0010018ULL }, // Inst #835 = AND32mr_NF_ND |
| 46322 | { 834, 6, 0, 0, 934, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100010e0010018ULL }, // Inst #834 = AND32mr_NF |
| 46323 | { 833, 7, 1, 0, 932, 0, 1, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1090e0010018ULL }, // Inst #833 = AND32mr_ND |
| 46324 | { 832, 6, 0, 0, 933, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0010e0010018ULL }, // Inst #832 = AND32mr_EVEX |
| 46325 | { 831, 6, 0, 0, 933, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080000118ULL }, // Inst #831 = AND32mr |
| 46326 | { 830, 7, 1, 0, 932, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0190024ULL }, // Inst #830 = AND32mi_NF_ND |
| 46327 | { 829, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0190024ULL }, // Inst #829 = AND32mi_NF |
| 46328 | { 828, 7, 1, 0, 932, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190024ULL }, // Inst #828 = AND32mi_ND |
| 46329 | { 827, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190024ULL }, // Inst #827 = AND32mi_EVEX |
| 46330 | { 826, 7, 1, 0, 932, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050024ULL }, // Inst #826 = AND32mi8_NF_ND |
| 46331 | { 825, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050024ULL }, // Inst #825 = AND32mi8_NF |
| 46332 | { 824, 7, 1, 0, 932, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050024ULL }, // Inst #824 = AND32mi8_ND |
| 46333 | { 823, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050024ULL }, // Inst #823 = AND32mi8_EVEX |
| 46334 | { 822, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040124ULL }, // Inst #822 = AND32mi8 |
| 46335 | { 821, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180124ULL }, // Inst #821 = AND32mi |
| 46336 | { 820, 1, 0, 0, 1463, 1, 2, 1, X86ImpOpBase + 69, 0, 0x1280180101ULL }, // Inst #820 = AND32i32 |
| 46337 | { 819, 3, 1, 0, 1462, 0, 1, 155, X86ImpOpBase + 0, 0, 0x11800000a9ULL }, // Inst #819 = AND16rr_REV |
| 46338 | { 818, 3, 1, 0, 1, 0, 0, 155, X86ImpOpBase + 0, 0, 0x100011e0010829ULL }, // Inst #818 = AND16rr_NF_REV |
| 46339 | { 817, 3, 1, 0, 1, 0, 0, 379, X86ImpOpBase + 0, 0, 0x101091e0010829ULL }, // Inst #817 = AND16rr_NF_ND_REV |
| 46340 | { 816, 3, 1, 0, 1, 0, 0, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x101090e0010828ULL }, // Inst #816 = AND16rr_NF_ND |
| 46341 | { 815, 3, 1, 0, 1, 0, 0, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x100010e0010828ULL }, // Inst #815 = AND16rr_NF |
| 46342 | { 814, 3, 1, 0, 1, 0, 1, 379, X86ImpOpBase + 0, 0, 0x1091e0010829ULL }, // Inst #814 = AND16rr_ND_REV |
| 46343 | { 813, 3, 1, 0, 1, 0, 1, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x1090e0010828ULL }, // Inst #813 = AND16rr_ND |
| 46344 | { 812, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0, 0xc0011e0010829ULL }, // Inst #812 = AND16rr_EVEX_REV |
| 46345 | { 811, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0xc0010e0010828ULL }, // Inst #811 = AND16rr_EVEX |
| 46346 | { 810, 3, 1, 0, 1462, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x10800000a8ULL }, // Inst #810 = AND16rr |
| 46347 | { 809, 7, 1, 0, 25, 0, 0, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101091e0010819ULL }, // Inst #809 = AND16rm_NF_ND |
| 46348 | { 808, 7, 1, 0, 25, 0, 0, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100011e0010819ULL }, // Inst #808 = AND16rm_NF |
| 46349 | { 807, 7, 1, 0, 25, 0, 1, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1091e0010819ULL }, // Inst #807 = AND16rm_ND |
| 46350 | { 806, 7, 1, 0, 25, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0011e0010819ULL }, // Inst #806 = AND16rm_EVEX |
| 46351 | { 805, 7, 1, 0, 1450, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1180000099ULL }, // Inst #805 = AND16rm |
| 46352 | { 804, 3, 1, 0, 1, 0, 0, 362, X86ImpOpBase + 0, 0, 0x1010c0e0110834ULL }, // Inst #804 = AND16ri_NF_ND |
| 46353 | { 803, 3, 1, 0, 1, 0, 0, 152, X86ImpOpBase + 0, 0, 0x100040e0110834ULL }, // Inst #803 = AND16ri_NF |
| 46354 | { 802, 3, 1, 0, 1, 0, 1, 362, X86ImpOpBase + 0, 0, 0x10c0e0110834ULL }, // Inst #802 = AND16ri_ND |
| 46355 | { 801, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0, 0xc0040e0110834ULL }, // Inst #801 = AND16ri_EVEX |
| 46356 | { 800, 3, 1, 0, 1, 0, 0, 362, X86ImpOpBase + 0, 0, 0x1010c1e0050834ULL }, // Inst #800 = AND16ri8_NF_ND |
| 46357 | { 799, 3, 1, 0, 1, 0, 0, 152, X86ImpOpBase + 0, 0, 0x100041e0050834ULL }, // Inst #799 = AND16ri8_NF |
| 46358 | { 798, 3, 1, 0, 1, 0, 1, 362, X86ImpOpBase + 0, 0, 0x10c1e0050834ULL }, // Inst #798 = AND16ri8_ND |
| 46359 | { 797, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0, 0xc0041e0050834ULL }, // Inst #797 = AND16ri8_EVEX |
| 46360 | { 796, 3, 1, 0, 1462, 0, 1, 152, X86ImpOpBase + 0, 0, 0x41800400b4ULL }, // Inst #796 = AND16ri8 |
| 46361 | { 795, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0, 0x40801000b4ULL }, // Inst #795 = AND16ri |
| 46362 | { 794, 7, 1, 0, 932, 0, 0, 355, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101090e0010818ULL }, // Inst #794 = AND16mr_NF_ND |
| 46363 | { 793, 6, 0, 0, 934, 0, 0, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100010e0010818ULL }, // Inst #793 = AND16mr_NF |
| 46364 | { 792, 7, 1, 0, 932, 0, 1, 355, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1090e0010818ULL }, // Inst #792 = AND16mr_ND |
| 46365 | { 791, 6, 0, 0, 933, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0010e0010818ULL }, // Inst #791 = AND16mr_EVEX |
| 46366 | { 790, 6, 0, 0, 933, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080000098ULL }, // Inst #790 = AND16mr |
| 46367 | { 789, 7, 1, 0, 932, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0110824ULL }, // Inst #789 = AND16mi_NF_ND |
| 46368 | { 788, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0110824ULL }, // Inst #788 = AND16mi_NF |
| 46369 | { 787, 7, 1, 0, 932, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110824ULL }, // Inst #787 = AND16mi_ND |
| 46370 | { 786, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110824ULL }, // Inst #786 = AND16mi_EVEX |
| 46371 | { 785, 7, 1, 0, 932, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050824ULL }, // Inst #785 = AND16mi8_NF_ND |
| 46372 | { 784, 6, 0, 0, 931, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050824ULL }, // Inst #784 = AND16mi8_NF |
| 46373 | { 783, 7, 1, 0, 932, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050824ULL }, // Inst #783 = AND16mi8_ND |
| 46374 | { 782, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050824ULL }, // Inst #782 = AND16mi8_EVEX |
| 46375 | { 781, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a4ULL }, // Inst #781 = AND16mi8 |
| 46376 | { 780, 6, 0, 0, 931, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a4ULL }, // Inst #780 = AND16mi |
| 46377 | { 779, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 46, 0, 0x1280100081ULL }, // Inst #779 = AND16i16 |
| 46378 | { 778, 3, 1, 0, 42, 0, 0, 566, X86ImpOpBase + 0, 0, 0x6f98046829ULL }, // Inst #778 = AESKEYGENASSIST128rr |
| 46379 | { 777, 7, 1, 0, 41, 0, 0, 559, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6f98046819ULL }, // Inst #777 = AESKEYGENASSIST128rm |
| 46380 | { 776, 2, 1, 0, 40, 0, 0, 557, X86ImpOpBase + 0, 0, 0x6d98004829ULL }, // Inst #776 = AESIMCrr |
| 46381 | { 775, 6, 1, 0, 39, 0, 0, 551, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6d98004819ULL }, // Inst #775 = AESIMCrm |
| 46382 | { 774, 3, 1, 0, 38, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6e18004829ULL }, // Inst #774 = AESENCrr |
| 46383 | { 773, 7, 1, 0, 37, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6e18004819ULL }, // Inst #773 = AESENCrm |
| 46384 | { 772, 5, 0, 0, 8, 8, 9, 232, X86ImpOpBase + 91, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00005022ULL }, // Inst #772 = AESENCWIDE256KL |
| 46385 | { 771, 5, 0, 0, 8, 8, 9, 232, X86ImpOpBase + 91, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00005020ULL }, // Inst #771 = AESENCWIDE128KL |
| 46386 | { 770, 3, 1, 0, 38, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6e98004829ULL }, // Inst #770 = AESENCLASTrr |
| 46387 | { 769, 7, 1, 0, 37, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6e98004819ULL }, // Inst #769 = AESENCLASTrm |
| 46388 | { 768, 7, 1, 0, 8, 0, 1, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00005019ULL }, // Inst #768 = AESENC256KL |
| 46389 | { 767, 7, 1, 0, 8, 0, 1, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00005019ULL }, // Inst #767 = AESENC128KL |
| 46390 | { 766, 3, 1, 0, 38, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6f18004829ULL }, // Inst #766 = AESDECrr |
| 46391 | { 765, 7, 1, 0, 37, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6f18004819ULL }, // Inst #765 = AESDECrm |
| 46392 | { 764, 5, 0, 0, 8, 8, 9, 232, X86ImpOpBase + 91, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00005023ULL }, // Inst #764 = AESDECWIDE256KL |
| 46393 | { 763, 5, 0, 0, 8, 8, 9, 232, X86ImpOpBase + 91, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00005021ULL }, // Inst #763 = AESDECWIDE128KL |
| 46394 | { 762, 3, 1, 0, 38, 0, 0, 494, X86ImpOpBase + 0, 0, 0x6f98004829ULL }, // Inst #762 = AESDECLASTrr |
| 46395 | { 761, 7, 1, 0, 37, 0, 0, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x6f98004819ULL }, // Inst #761 = AESDECLASTrm |
| 46396 | { 760, 7, 1, 0, 8, 0, 1, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80005019ULL }, // Inst #760 = AESDEC256KL |
| 46397 | { 759, 7, 1, 0, 8, 0, 1, 487, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80005019ULL }, // Inst #759 = AESDEC128KL |
| 46398 | { 758, 3, 1, 0, 11, 1, 1, 444, X86ImpOpBase + 31, 0, 0x10b360031029ULL }, // Inst #758 = ADOX64rr_ND |
| 46399 | { 757, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0x3360031029ULL }, // Inst #757 = ADOX64rr_EVEX |
| 46400 | { 756, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0x7b00025029ULL }, // Inst #756 = ADOX64rr |
| 46401 | { 755, 7, 1, 0, 23, 1, 1, 437, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10b360031019ULL }, // Inst #755 = ADOX64rm_ND |
| 46402 | { 754, 7, 1, 0, 23, 1, 1, 430, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x3360031019ULL }, // Inst #754 = ADOX64rm_EVEX |
| 46403 | { 753, 7, 1, 0, 1441, 1, 1, 430, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x7b00025019ULL }, // Inst #753 = ADOX64rm |
| 46404 | { 752, 3, 1, 0, 11, 1, 1, 226, X86ImpOpBase + 31, 0, 0x10b360011029ULL }, // Inst #752 = ADOX32rr_ND |
| 46405 | { 751, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0x3360011029ULL }, // Inst #751 = ADOX32rr_EVEX |
| 46406 | { 750, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0x7b00005029ULL }, // Inst #750 = ADOX32rr |
| 46407 | { 749, 7, 1, 0, 23, 1, 1, 406, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10b360011019ULL }, // Inst #749 = ADOX32rm_ND |
| 46408 | { 748, 7, 1, 0, 23, 1, 1, 399, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x3360011019ULL }, // Inst #748 = ADOX32rm_EVEX |
| 46409 | { 747, 7, 1, 0, 1441, 1, 1, 399, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x7b00005019ULL }, // Inst #747 = ADOX32rm |
| 46410 | { 746, 2, 0, 0, 1, 2, 3, 21, X86ImpOpBase + 86, 0, 0x0ULL }, // Inst #746 = ADJCALLSTACKUP64 |
| 46411 | { 745, 2, 0, 0, 1, 2, 3, 21, X86ImpOpBase + 81, 0, 0x0ULL }, // Inst #745 = ADJCALLSTACKUP32 |
| 46412 | { 744, 3, 0, 0, 1, 2, 3, 548, X86ImpOpBase + 86, 0, 0x0ULL }, // Inst #744 = ADJCALLSTACKDOWN64 |
| 46413 | { 743, 3, 0, 0, 1, 2, 3, 548, X86ImpOpBase + 81, 0, 0x0ULL }, // Inst #743 = ADJCALLSTACKDOWN32 |
| 46414 | { 742, 1, 0, 0, 1717, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000030ULL }, // Inst #742 = ADD_FrST0 |
| 46415 | { 741, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #741 = ADD_FpI32m80 |
| 46416 | { 740, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #740 = ADD_FpI32m64 |
| 46417 | { 739, 7, 1, 0, 36, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #739 = ADD_FpI32m32 |
| 46418 | { 738, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #738 = ADD_FpI16m80 |
| 46419 | { 737, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #737 = ADD_FpI16m64 |
| 46420 | { 736, 7, 1, 0, 36, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #736 = ADD_FpI16m32 |
| 46421 | { 735, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #735 = ADD_Fp80m64 |
| 46422 | { 734, 7, 1, 0, 36, 1, 1, 541, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #734 = ADD_Fp80m32 |
| 46423 | { 733, 3, 1, 0, 0, 1, 1, 538, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #733 = ADD_Fp80 |
| 46424 | { 732, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #732 = ADD_Fp64m32 |
| 46425 | { 731, 7, 1, 0, 36, 1, 1, 531, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #731 = ADD_Fp64m |
| 46426 | { 730, 3, 1, 0, 0, 1, 1, 528, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #730 = ADD_Fp64 |
| 46427 | { 729, 7, 1, 0, 36, 1, 1, 521, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #729 = ADD_Fp32m |
| 46428 | { 728, 3, 1, 0, 0, 1, 1, 518, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #728 = ADD_Fp32 |
| 46429 | { 727, 1, 0, 0, 1211, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000030ULL }, // Inst #727 = ADD_FST0r |
| 46430 | { 726, 1, 0, 0, 1717, 1, 1, 517, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000030ULL }, // Inst #726 = ADD_FPrST0 |
| 46431 | { 725, 5, 0, 0, 800, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000020ULL }, // Inst #725 = ADD_FI32m |
| 46432 | { 724, 5, 0, 0, 800, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000020ULL }, // Inst #724 = ADD_FI16m |
| 46433 | { 723, 5, 0, 0, 796, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000020ULL }, // Inst #723 = ADD_F64m |
| 46434 | { 722, 5, 0, 0, 796, 1, 1, 232, X86ImpOpBase + 79, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000020ULL }, // Inst #722 = ADD_F32m |
| 46435 | { 721, 3, 1, 0, 1697, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6808003829ULL }, // Inst #721 = ADDSUBPSrr |
| 46436 | { 720, 7, 1, 0, 1696, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6808003819ULL }, // Inst #720 = ADDSUBPSrm |
| 46437 | { 719, 3, 1, 0, 28, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x6810002829ULL }, // Inst #719 = ADDSUBPDrr |
| 46438 | { 718, 7, 1, 0, 27, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6810002819ULL }, // Inst #718 = ADDSUBPDrm |
| 46439 | { 717, 3, 1, 0, 1461, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2c08003029ULL }, // Inst #717 = ADDSSrr_Int |
| 46440 | { 716, 3, 1, 0, 1461, 1, 0, 514, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c08003029ULL }, // Inst #716 = ADDSSrr |
| 46441 | { 715, 7, 1, 0, 34, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c08003019ULL }, // Inst #715 = ADDSSrm_Int |
| 46442 | { 714, 7, 1, 0, 34, 1, 0, 507, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c08003019ULL }, // Inst #714 = ADDSSrm |
| 46443 | { 713, 3, 1, 0, 33, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException), 0x2c10003829ULL }, // Inst #713 = ADDSDrr_Int |
| 46444 | { 712, 3, 1, 0, 33, 1, 0, 504, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c10003829ULL }, // Inst #712 = ADDSDrr |
| 46445 | { 711, 7, 1, 0, 32, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c10003819ULL }, // Inst #711 = ADDSDrm_Int |
| 46446 | { 710, 7, 1, 0, 32, 1, 0, 497, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c10003819ULL }, // Inst #710 = ADDSDrm |
| 46447 | { 709, 0, 0, 0, 31, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x338000000aULL }, // Inst #709 = ADDR32_PREFIX |
| 46448 | { 708, 0, 0, 0, 31, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x338000000aULL }, // Inst #708 = ADDR16_PREFIX |
| 46449 | { 707, 3, 1, 0, 1697, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c08002029ULL }, // Inst #707 = ADDPSrr |
| 46450 | { 706, 7, 1, 0, 1696, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c08002019ULL }, // Inst #706 = ADDPSrm |
| 46451 | { 705, 3, 1, 0, 28, 1, 0, 494, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c10002829ULL }, // Inst #705 = ADDPDrr |
| 46452 | { 704, 7, 1, 0, 27, 1, 0, 487, X86ImpOpBase + 78, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c10002819ULL }, // Inst #704 = ADDPDrm |
| 46453 | { 703, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0, 0x100000029ULL }, // Inst #703 = ADD8rr_REV |
| 46454 | { 702, 3, 1, 0, 1, 0, 0, 173, X86ImpOpBase + 0, 0, 0x10000160010029ULL }, // Inst #702 = ADD8rr_NF_REV |
| 46455 | { 701, 3, 1, 0, 1, 0, 0, 484, X86ImpOpBase + 0, 0, 0x10108160010029ULL }, // Inst #701 = ADD8rr_NF_ND_REV |
| 46456 | { 700, 3, 1, 0, 1, 0, 0, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x10108060010028ULL }, // Inst #700 = ADD8rr_NF_ND |
| 46457 | { 699, 3, 1, 0, 1, 0, 0, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x10000060010028ULL }, // Inst #699 = ADD8rr_NF |
| 46458 | { 698, 3, 1, 0, 1, 0, 1, 484, X86ImpOpBase + 0, 0, 0x108160010029ULL }, // Inst #698 = ADD8rr_ND_REV |
| 46459 | { 697, 3, 1, 0, 1, 0, 1, 484, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x108060010028ULL }, // Inst #697 = ADD8rr_ND |
| 46460 | { 696, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0, 0xc000160010029ULL }, // Inst #696 = ADD8rr_EVEX_REV |
| 46461 | { 695, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0xc000060010028ULL }, // Inst #695 = ADD8rr_EVEX |
| 46462 | { 694, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #694 = ADD8rr |
| 46463 | { 693, 7, 1, 0, 25, 0, 0, 477, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10108160010019ULL }, // Inst #693 = ADD8rm_NF_ND |
| 46464 | { 692, 7, 1, 0, 25, 0, 0, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10000160010019ULL }, // Inst #692 = ADD8rm_NF |
| 46465 | { 691, 7, 1, 0, 25, 0, 1, 477, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108160010019ULL }, // Inst #691 = ADD8rm_ND |
| 46466 | { 690, 7, 1, 0, 25, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc000160010019ULL }, // Inst #690 = ADD8rm_EVEX |
| 46467 | { 689, 7, 1, 0, 1450, 0, 1, 470, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100000019ULL }, // Inst #689 = ADD8rm |
| 46468 | { 688, 3, 1, 0, 1, 0, 0, 467, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c060050030ULL }, // Inst #688 = ADD8ri_NF_ND |
| 46469 | { 687, 3, 1, 0, 1, 0, 0, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10004060050030ULL }, // Inst #687 = ADD8ri_NF |
| 46470 | { 686, 3, 1, 0, 1, 0, 1, 467, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c060050030ULL }, // Inst #686 = ADD8ri_ND |
| 46471 | { 685, 3, 1, 0, 1, 0, 1, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc004060050030ULL }, // Inst #685 = ADD8ri_EVEX |
| 46472 | { 684, 3, 1, 0, 1, 0, 1, 170, X86ImpOpBase + 0, 0, 0x4100040030ULL }, // Inst #684 = ADD8ri8 |
| 46473 | { 683, 3, 1, 0, 1, 0, 1, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4000040030ULL }, // Inst #683 = ADD8ri |
| 46474 | { 682, 7, 1, 0, 920, 0, 0, 460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10108060010018ULL }, // Inst #682 = ADD8mr_NF_ND |
| 46475 | { 681, 6, 0, 0, 922, 0, 0, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10000060010018ULL }, // Inst #681 = ADD8mr_NF |
| 46476 | { 680, 7, 1, 0, 920, 0, 1, 460, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108060010018ULL }, // Inst #680 = ADD8mr_ND |
| 46477 | { 679, 6, 0, 0, 921, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000060010018ULL }, // Inst #679 = ADD8mr_EVEX |
| 46478 | { 678, 6, 0, 0, 1458, 0, 1, 454, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x18ULL }, // Inst #678 = ADD8mr |
| 46479 | { 677, 7, 1, 0, 920, 0, 0, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c060050020ULL }, // Inst #677 = ADD8mi_NF_ND |
| 46480 | { 676, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10004060050020ULL }, // Inst #676 = ADD8mi_NF |
| 46481 | { 675, 7, 1, 0, 920, 0, 1, 447, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c060050020ULL }, // Inst #675 = ADD8mi_ND |
| 46482 | { 674, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050020ULL }, // Inst #674 = ADD8mi_EVEX |
| 46483 | { 673, 6, 0, 0, 1455, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040020ULL }, // Inst #673 = ADD8mi8 |
| 46484 | { 672, 6, 0, 0, 1455, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040020ULL }, // Inst #672 = ADD8mi |
| 46485 | { 671, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 75, 0, 0x200040001ULL }, // Inst #671 = ADD8i8 |
| 46486 | { 670, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0, 0x180020029ULL }, // Inst #670 = ADD64rr_REV |
| 46487 | { 669, 3, 1, 0, 1, 0, 0, 167, X86ImpOpBase + 0, 0, 0x100001e0030029ULL }, // Inst #669 = ADD64rr_NF_REV |
| 46488 | { 668, 3, 1, 0, 1, 0, 0, 444, X86ImpOpBase + 0, 0, 0x101081e0030029ULL }, // Inst #668 = ADD64rr_NF_ND_REV |
| 46489 | { 667, 3, 1, 0, 1, 0, 0, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x101080e0030028ULL }, // Inst #667 = ADD64rr_NF_ND |
| 46490 | { 666, 3, 1, 0, 1, 0, 0, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x100000e0030028ULL }, // Inst #666 = ADD64rr_NF |
| 46491 | { 665, 3, 1, 0, 1, 0, 1, 444, X86ImpOpBase + 0, 0, 0x1081e0030029ULL }, // Inst #665 = ADD64rr_ND_REV |
| 46492 | { 664, 3, 1, 0, 1, 0, 1, 444, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x1080e0030028ULL }, // Inst #664 = ADD64rr_ND |
| 46493 | { 663, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0, 0xc0001e0030029ULL }, // Inst #663 = ADD64rr_EVEX_REV |
| 46494 | { 662, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0xc0000e0030028ULL }, // Inst #662 = ADD64rr_EVEX |
| 46495 | { 661, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x80020028ULL }, // Inst #661 = ADD64rr |
| 46496 | { 660, 7, 1, 0, 25, 0, 0, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101081e0030019ULL }, // Inst #660 = ADD64rm_NF_ND |
| 46497 | { 659, 7, 1, 0, 25, 0, 0, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100001e0030019ULL }, // Inst #659 = ADD64rm_NF |
| 46498 | { 658, 7, 1, 0, 25, 0, 1, 437, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1081e0030019ULL }, // Inst #658 = ADD64rm_ND |
| 46499 | { 657, 7, 1, 0, 25, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0001e0030019ULL }, // Inst #657 = ADD64rm_EVEX |
| 46500 | { 656, 7, 1, 0, 1450, 0, 1, 430, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x180020019ULL }, // Inst #656 = ADD64rm |
| 46501 | { 655, 3, 1, 0, 1, 0, 0, 427, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0070030ULL }, // Inst #655 = ADD64ri8_NF_ND |
| 46502 | { 654, 3, 1, 0, 1, 0, 0, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0070030ULL }, // Inst #654 = ADD64ri8_NF |
| 46503 | { 653, 3, 1, 0, 1, 0, 1, 427, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0070030ULL }, // Inst #653 = ADD64ri8_ND |
| 46504 | { 652, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0070030ULL }, // Inst #652 = ADD64ri8_EVEX |
| 46505 | { 651, 3, 1, 0, 1452, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180060030ULL }, // Inst #651 = ADD64ri8 |
| 46506 | { 650, 3, 1, 0, 1, 0, 0, 427, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0230030ULL }, // Inst #650 = ADD64ri32_NF_ND |
| 46507 | { 649, 3, 1, 0, 1, 0, 0, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0230030ULL }, // Inst #649 = ADD64ri32_NF |
| 46508 | { 648, 3, 1, 0, 1, 0, 1, 427, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0230030ULL }, // Inst #648 = ADD64ri32_ND |
| 46509 | { 647, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0230030ULL }, // Inst #647 = ADD64ri32_EVEX |
| 46510 | { 646, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4080220030ULL }, // Inst #646 = ADD64ri32 |
| 46511 | { 645, 7, 1, 0, 920, 0, 0, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101080e0030018ULL }, // Inst #645 = ADD64mr_NF_ND |
| 46512 | { 644, 6, 0, 0, 922, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100000e0030018ULL }, // Inst #644 = ADD64mr_NF |
| 46513 | { 643, 7, 1, 0, 920, 0, 1, 420, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1080e0030018ULL }, // Inst #643 = ADD64mr_ND |
| 46514 | { 642, 6, 0, 0, 921, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0000e0030018ULL }, // Inst #642 = ADD64mr_EVEX |
| 46515 | { 641, 6, 0, 0, 921, 0, 1, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80020018ULL }, // Inst #641 = ADD64mr |
| 46516 | { 640, 7, 1, 0, 920, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0070020ULL }, // Inst #640 = ADD64mi8_NF_ND |
| 46517 | { 639, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0070020ULL }, // Inst #639 = ADD64mi8_NF |
| 46518 | { 638, 7, 1, 0, 920, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070020ULL }, // Inst #638 = ADD64mi8_ND |
| 46519 | { 637, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070020ULL }, // Inst #637 = ADD64mi8_EVEX |
| 46520 | { 636, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060020ULL }, // Inst #636 = ADD64mi8 |
| 46521 | { 635, 7, 1, 0, 920, 0, 0, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0230020ULL }, // Inst #635 = ADD64mi32_NF_ND |
| 46522 | { 634, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0230020ULL }, // Inst #634 = ADD64mi32_NF |
| 46523 | { 633, 7, 1, 0, 920, 0, 1, 413, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230020ULL }, // Inst #633 = ADD64mi32_ND |
| 46524 | { 632, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230020ULL }, // Inst #632 = ADD64mi32_EVEX |
| 46525 | { 631, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220020ULL }, // Inst #631 = ADD64mi32 |
| 46526 | { 630, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 72, 0, 0x280220001ULL }, // Inst #630 = ADD64i32 |
| 46527 | { 629, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0, 0x180000129ULL }, // Inst #629 = ADD32rr_REV |
| 46528 | { 628, 3, 1, 0, 1, 0, 0, 161, X86ImpOpBase + 0, 0, 0x100001e0010029ULL }, // Inst #628 = ADD32rr_NF_REV |
| 46529 | { 627, 3, 1, 0, 1, 0, 0, 226, X86ImpOpBase + 0, 0, 0x101081e0010029ULL }, // Inst #627 = ADD32rr_NF_ND_REV |
| 46530 | { 626, 3, 1, 0, 1, 0, 0, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x101080e0010028ULL }, // Inst #626 = ADD32rr_NF_ND |
| 46531 | { 625, 3, 1, 0, 1, 0, 0, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x100000e0010028ULL }, // Inst #625 = ADD32rr_NF |
| 46532 | { 624, 3, 1, 0, 1, 0, 1, 226, X86ImpOpBase + 0, 0, 0x1081e0010029ULL }, // Inst #624 = ADD32rr_ND_REV |
| 46533 | { 623, 3, 1, 0, 1, 0, 1, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x1080e0010028ULL }, // Inst #623 = ADD32rr_ND |
| 46534 | { 622, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0, 0xc0001e0010029ULL }, // Inst #622 = ADD32rr_EVEX_REV |
| 46535 | { 621, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0xc0000e0010028ULL }, // Inst #621 = ADD32rr_EVEX |
| 46536 | { 620, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x80000128ULL }, // Inst #620 = ADD32rr |
| 46537 | { 619, 7, 1, 0, 25, 0, 0, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101081e0010019ULL }, // Inst #619 = ADD32rm_NF_ND |
| 46538 | { 618, 7, 1, 0, 25, 0, 0, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100001e0010019ULL }, // Inst #618 = ADD32rm_NF |
| 46539 | { 617, 7, 1, 0, 25, 0, 1, 406, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1081e0010019ULL }, // Inst #617 = ADD32rm_ND |
| 46540 | { 616, 7, 1, 0, 25, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0001e0010019ULL }, // Inst #616 = ADD32rm_EVEX |
| 46541 | { 615, 7, 1, 0, 1450, 0, 1, 399, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x180000119ULL }, // Inst #615 = ADD32rm |
| 46542 | { 614, 3, 1, 0, 1, 0, 0, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0190030ULL }, // Inst #614 = ADD32ri_NF_ND |
| 46543 | { 613, 3, 1, 0, 1, 0, 0, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0190030ULL }, // Inst #613 = ADD32ri_NF |
| 46544 | { 612, 3, 1, 0, 1, 0, 1, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0190030ULL }, // Inst #612 = ADD32ri_ND |
| 46545 | { 611, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0190030ULL }, // Inst #611 = ADD32ri_EVEX |
| 46546 | { 610, 3, 1, 0, 1, 0, 0, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0050030ULL }, // Inst #610 = ADD32ri8_NF_ND |
| 46547 | { 609, 3, 1, 0, 1, 0, 0, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0050030ULL }, // Inst #609 = ADD32ri8_NF |
| 46548 | { 608, 3, 1, 0, 1, 0, 1, 396, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0050030ULL }, // Inst #608 = ADD32ri8_ND |
| 46549 | { 607, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0050030ULL }, // Inst #607 = ADD32ri8_EVEX |
| 46550 | { 606, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180040130ULL }, // Inst #606 = ADD32ri8 |
| 46551 | { 605, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4080180130ULL }, // Inst #605 = ADD32ri |
| 46552 | { 604, 7, 1, 0, 920, 0, 0, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101080e0010018ULL }, // Inst #604 = ADD32mr_NF_ND |
| 46553 | { 603, 6, 0, 0, 922, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100000e0010018ULL }, // Inst #603 = ADD32mr_NF |
| 46554 | { 602, 7, 1, 0, 920, 0, 1, 389, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1080e0010018ULL }, // Inst #602 = ADD32mr_ND |
| 46555 | { 601, 6, 0, 0, 921, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0000e0010018ULL }, // Inst #601 = ADD32mr_EVEX |
| 46556 | { 600, 6, 0, 0, 921, 0, 1, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80000118ULL }, // Inst #600 = ADD32mr |
| 46557 | { 599, 7, 1, 0, 920, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0190020ULL }, // Inst #599 = ADD32mi_NF_ND |
| 46558 | { 598, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0190020ULL }, // Inst #598 = ADD32mi_NF |
| 46559 | { 597, 7, 1, 0, 920, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190020ULL }, // Inst #597 = ADD32mi_ND |
| 46560 | { 596, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190020ULL }, // Inst #596 = ADD32mi_EVEX |
| 46561 | { 595, 7, 1, 0, 920, 0, 0, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050020ULL }, // Inst #595 = ADD32mi8_NF_ND |
| 46562 | { 594, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050020ULL }, // Inst #594 = ADD32mi8_NF |
| 46563 | { 593, 7, 1, 0, 920, 0, 1, 382, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050020ULL }, // Inst #593 = ADD32mi8_ND |
| 46564 | { 592, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050020ULL }, // Inst #592 = ADD32mi8_EVEX |
| 46565 | { 591, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040120ULL }, // Inst #591 = ADD32mi8 |
| 46566 | { 590, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180120ULL }, // Inst #590 = ADD32mi |
| 46567 | { 589, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 69, 0, 0x280180101ULL }, // Inst #589 = ADD32i32 |
| 46568 | { 588, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0, 0x1800000a9ULL }, // Inst #588 = ADD16rr_REV |
| 46569 | { 587, 3, 1, 0, 1, 0, 0, 155, X86ImpOpBase + 0, 0, 0x100001e0010829ULL }, // Inst #587 = ADD16rr_NF_REV |
| 46570 | { 586, 3, 1, 0, 1, 0, 0, 379, X86ImpOpBase + 0, 0, 0x101081e0010829ULL }, // Inst #586 = ADD16rr_NF_ND_REV |
| 46571 | { 585, 3, 1, 0, 1, 0, 0, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x101080e0010828ULL }, // Inst #585 = ADD16rr_NF_ND |
| 46572 | { 584, 3, 1, 0, 1, 0, 0, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x100000e0010828ULL }, // Inst #584 = ADD16rr_NF |
| 46573 | { 583, 3, 1, 0, 1, 0, 1, 379, X86ImpOpBase + 0, 0, 0x1081e0010829ULL }, // Inst #583 = ADD16rr_ND_REV |
| 46574 | { 582, 3, 1, 0, 1, 0, 1, 379, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x1080e0010828ULL }, // Inst #582 = ADD16rr_ND |
| 46575 | { 581, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0, 0xc0001e0010829ULL }, // Inst #581 = ADD16rr_EVEX_REV |
| 46576 | { 580, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0xc0000e0010828ULL }, // Inst #580 = ADD16rr_EVEX |
| 46577 | { 579, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x800000a8ULL }, // Inst #579 = ADD16rr |
| 46578 | { 578, 7, 1, 0, 25, 0, 0, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101081e0010819ULL }, // Inst #578 = ADD16rm_NF_ND |
| 46579 | { 577, 7, 1, 0, 25, 0, 0, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100001e0010819ULL }, // Inst #577 = ADD16rm_NF |
| 46580 | { 576, 7, 1, 0, 25, 0, 1, 372, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1081e0010819ULL }, // Inst #576 = ADD16rm_ND |
| 46581 | { 575, 7, 1, 0, 25, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0xc0001e0010819ULL }, // Inst #575 = ADD16rm_EVEX |
| 46582 | { 574, 7, 1, 0, 1450, 0, 1, 365, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x180000099ULL }, // Inst #574 = ADD16rm |
| 46583 | { 573, 3, 1, 0, 1, 0, 0, 362, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0110830ULL }, // Inst #573 = ADD16ri_NF_ND |
| 46584 | { 572, 3, 1, 0, 1, 0, 0, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0110830ULL }, // Inst #572 = ADD16ri_NF |
| 46585 | { 571, 3, 1, 0, 1, 0, 1, 362, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0110830ULL }, // Inst #571 = ADD16ri_ND |
| 46586 | { 570, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0110830ULL }, // Inst #570 = ADD16ri_EVEX |
| 46587 | { 569, 3, 1, 0, 1, 0, 0, 362, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0050830ULL }, // Inst #569 = ADD16ri8_NF_ND |
| 46588 | { 568, 3, 1, 0, 1, 0, 0, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0050830ULL }, // Inst #568 = ADD16ri8_NF |
| 46589 | { 567, 3, 1, 0, 1, 0, 1, 362, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0050830ULL }, // Inst #567 = ADD16ri8_ND |
| 46590 | { 566, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0050830ULL }, // Inst #566 = ADD16ri8_EVEX |
| 46591 | { 565, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x41800400b0ULL }, // Inst #565 = ADD16ri8 |
| 46592 | { 564, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x40801000b0ULL }, // Inst #564 = ADD16ri |
| 46593 | { 563, 7, 1, 0, 920, 0, 0, 355, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101080e0010818ULL }, // Inst #563 = ADD16mr_NF_ND |
| 46594 | { 562, 6, 0, 0, 922, 0, 0, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100000e0010818ULL }, // Inst #562 = ADD16mr_NF |
| 46595 | { 561, 7, 1, 0, 920, 0, 1, 355, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1080e0010818ULL }, // Inst #561 = ADD16mr_ND |
| 46596 | { 560, 6, 0, 0, 921, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0000e0010818ULL }, // Inst #560 = ADD16mr_EVEX |
| 46597 | { 559, 6, 0, 0, 921, 0, 1, 349, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80000098ULL }, // Inst #559 = ADD16mr |
| 46598 | { 558, 7, 1, 0, 920, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0110820ULL }, // Inst #558 = ADD16mi_NF_ND |
| 46599 | { 557, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0110820ULL }, // Inst #557 = ADD16mi_NF |
| 46600 | { 556, 7, 1, 0, 920, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110820ULL }, // Inst #556 = ADD16mi_ND |
| 46601 | { 555, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110820ULL }, // Inst #555 = ADD16mi_EVEX |
| 46602 | { 554, 7, 1, 0, 920, 0, 0, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050820ULL }, // Inst #554 = ADD16mi8_NF_ND |
| 46603 | { 553, 6, 0, 0, 919, 0, 0, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050820ULL }, // Inst #553 = ADD16mi8_NF |
| 46604 | { 552, 7, 1, 0, 920, 0, 1, 342, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050820ULL }, // Inst #552 = ADD16mi8_ND |
| 46605 | { 551, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050820ULL }, // Inst #551 = ADD16mi8_EVEX |
| 46606 | { 550, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a0ULL }, // Inst #550 = ADD16mi8 |
| 46607 | { 549, 6, 0, 0, 919, 0, 1, 336, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a0ULL }, // Inst #549 = ADD16mi |
| 46608 | { 548, 1, 0, 0, 1008, 1, 2, 1, X86ImpOpBase + 46, 0, 0x280100081ULL }, // Inst #548 = ADD16i16 |
| 46609 | { 547, 3, 1, 0, 11, 1, 1, 444, X86ImpOpBase + 31, 0, 0x10b360030829ULL }, // Inst #547 = ADCX64rr_ND |
| 46610 | { 546, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0x3360030829ULL }, // Inst #546 = ADCX64rr_EVEX |
| 46611 | { 545, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0x7b00024829ULL }, // Inst #545 = ADCX64rr |
| 46612 | { 544, 7, 1, 0, 23, 1, 1, 437, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10b360030819ULL }, // Inst #544 = ADCX64rm_ND |
| 46613 | { 543, 7, 1, 0, 23, 1, 1, 430, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x3360030819ULL }, // Inst #543 = ADCX64rm_EVEX |
| 46614 | { 542, 7, 1, 0, 1441, 1, 1, 430, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x7b00024819ULL }, // Inst #542 = ADCX64rm |
| 46615 | { 541, 3, 1, 0, 11, 1, 1, 226, X86ImpOpBase + 31, 0, 0x10b360010829ULL }, // Inst #541 = ADCX32rr_ND |
| 46616 | { 540, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0x3360010829ULL }, // Inst #540 = ADCX32rr_EVEX |
| 46617 | { 539, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0x7b00004829ULL }, // Inst #539 = ADCX32rr |
| 46618 | { 538, 7, 1, 0, 23, 1, 1, 406, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10b360010819ULL }, // Inst #538 = ADCX32rm_ND |
| 46619 | { 537, 7, 1, 0, 23, 1, 1, 399, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x3360010819ULL }, // Inst #537 = ADCX32rm_EVEX |
| 46620 | { 536, 7, 1, 0, 1441, 1, 1, 399, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x7b00004819ULL }, // Inst #536 = ADCX32rm |
| 46621 | { 535, 3, 1, 0, 11, 1, 1, 173, X86ImpOpBase + 31, 0, 0x900000029ULL }, // Inst #535 = ADC8rr_REV |
| 46622 | { 534, 3, 1, 0, 11, 1, 1, 484, X86ImpOpBase + 31, 0, 0x108960010029ULL }, // Inst #534 = ADC8rr_ND_REV |
| 46623 | { 533, 3, 1, 0, 11, 1, 1, 484, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x108860010028ULL }, // Inst #533 = ADC8rr_ND |
| 46624 | { 532, 3, 1, 0, 11, 1, 1, 173, X86ImpOpBase + 31, 0, 0xc000960010029ULL }, // Inst #532 = ADC8rr_EVEX_REV |
| 46625 | { 531, 3, 1, 0, 11, 1, 1, 173, X86ImpOpBase + 31, 0, 0xc000860010028ULL }, // Inst #531 = ADC8rr_EVEX |
| 46626 | { 530, 3, 1, 0, 11, 1, 1, 173, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x800000028ULL }, // Inst #530 = ADC8rr |
| 46627 | { 529, 7, 1, 0, 23, 1, 1, 477, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x108960010019ULL }, // Inst #529 = ADC8rm_ND |
| 46628 | { 528, 7, 1, 0, 23, 1, 1, 470, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xc000960010019ULL }, // Inst #528 = ADC8rm_EVEX |
| 46629 | { 527, 7, 1, 0, 1441, 1, 1, 470, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x900000019ULL }, // Inst #527 = ADC8rm |
| 46630 | { 526, 3, 1, 0, 11, 1, 1, 467, X86ImpOpBase + 31, 0, 0x10c060050032ULL }, // Inst #526 = ADC8ri_ND |
| 46631 | { 525, 3, 1, 0, 11, 1, 1, 170, X86ImpOpBase + 31, 0, 0xc004060050032ULL }, // Inst #525 = ADC8ri_EVEX |
| 46632 | { 524, 3, 1, 0, 11, 1, 1, 170, X86ImpOpBase + 31, 0, 0x4100040032ULL }, // Inst #524 = ADC8ri8 |
| 46633 | { 523, 3, 1, 0, 11, 1, 1, 170, X86ImpOpBase + 31, 0, 0x4000040032ULL }, // Inst #523 = ADC8ri |
| 46634 | { 522, 7, 1, 0, 924, 1, 1, 460, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x108860010018ULL }, // Inst #522 = ADC8mr_ND |
| 46635 | { 521, 6, 0, 0, 925, 1, 1, 454, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000860010018ULL }, // Inst #521 = ADC8mr_EVEX |
| 46636 | { 520, 6, 0, 0, 1012, 1, 1, 454, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x800000018ULL }, // Inst #520 = ADC8mr |
| 46637 | { 519, 7, 1, 0, 924, 1, 1, 447, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c060050022ULL }, // Inst #519 = ADC8mi_ND |
| 46638 | { 518, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050022ULL }, // Inst #518 = ADC8mi_EVEX |
| 46639 | { 517, 6, 0, 0, 1442, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040022ULL }, // Inst #517 = ADC8mi8 |
| 46640 | { 516, 6, 0, 0, 1442, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040022ULL }, // Inst #516 = ADC8mi |
| 46641 | { 515, 1, 0, 0, 904, 2, 2, 1, X86ImpOpBase + 65, 0, 0xa00040001ULL }, // Inst #515 = ADC8i8 |
| 46642 | { 514, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0x980020029ULL }, // Inst #514 = ADC64rr_REV |
| 46643 | { 513, 3, 1, 0, 11, 1, 1, 444, X86ImpOpBase + 31, 0, 0x1089e0030029ULL }, // Inst #513 = ADC64rr_ND_REV |
| 46644 | { 512, 3, 1, 0, 11, 1, 1, 444, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x1088e0030028ULL }, // Inst #512 = ADC64rr_ND |
| 46645 | { 511, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0xc0009e0030029ULL }, // Inst #511 = ADC64rr_EVEX_REV |
| 46646 | { 510, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0, 0xc0008e0030028ULL }, // Inst #510 = ADC64rr_EVEX |
| 46647 | { 509, 3, 1, 0, 11, 1, 1, 167, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x880020028ULL }, // Inst #509 = ADC64rr |
| 46648 | { 508, 7, 1, 0, 23, 1, 1, 437, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x1089e0030019ULL }, // Inst #508 = ADC64rm_ND |
| 46649 | { 507, 7, 1, 0, 23, 1, 1, 430, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xc0009e0030019ULL }, // Inst #507 = ADC64rm_EVEX |
| 46650 | { 506, 7, 1, 0, 1441, 1, 1, 430, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x980020019ULL }, // Inst #506 = ADC64rm |
| 46651 | { 505, 3, 1, 0, 11, 1, 1, 427, X86ImpOpBase + 31, 0, 0x10c1e0070032ULL }, // Inst #505 = ADC64ri8_ND |
| 46652 | { 504, 3, 1, 0, 11, 1, 1, 164, X86ImpOpBase + 31, 0, 0xc0041e0070032ULL }, // Inst #504 = ADC64ri8_EVEX |
| 46653 | { 503, 3, 1, 0, 903, 1, 1, 164, X86ImpOpBase + 31, 0, 0x4180060032ULL }, // Inst #503 = ADC64ri8 |
| 46654 | { 502, 3, 1, 0, 11, 1, 1, 427, X86ImpOpBase + 31, 0, 0x10c0e0230032ULL }, // Inst #502 = ADC64ri32_ND |
| 46655 | { 501, 3, 1, 0, 11, 1, 1, 164, X86ImpOpBase + 31, 0, 0xc0040e0230032ULL }, // Inst #501 = ADC64ri32_EVEX |
| 46656 | { 500, 3, 1, 0, 1159, 1, 1, 164, X86ImpOpBase + 31, 0, 0x4080220032ULL }, // Inst #500 = ADC64ri32 |
| 46657 | { 499, 7, 1, 0, 924, 1, 1, 420, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x1088e0030018ULL }, // Inst #499 = ADC64mr_ND |
| 46658 | { 498, 6, 0, 0, 925, 1, 1, 211, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0008e0030018ULL }, // Inst #498 = ADC64mr_EVEX |
| 46659 | { 497, 6, 0, 0, 795, 1, 1, 211, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880020018ULL }, // Inst #497 = ADC64mr |
| 46660 | { 496, 7, 1, 0, 924, 1, 1, 413, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070022ULL }, // Inst #496 = ADC64mi8_ND |
| 46661 | { 495, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070022ULL }, // Inst #495 = ADC64mi8_EVEX |
| 46662 | { 494, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060022ULL }, // Inst #494 = ADC64mi8 |
| 46663 | { 493, 7, 1, 0, 924, 1, 1, 413, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230022ULL }, // Inst #493 = ADC64mi32_ND |
| 46664 | { 492, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230022ULL }, // Inst #492 = ADC64mi32_EVEX |
| 46665 | { 491, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220022ULL }, // Inst #491 = ADC64mi32 |
| 46666 | { 490, 1, 0, 0, 904, 2, 2, 1, X86ImpOpBase + 61, 0, 0xa80220001ULL }, // Inst #490 = ADC64i32 |
| 46667 | { 489, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0x980000129ULL }, // Inst #489 = ADC32rr_REV |
| 46668 | { 488, 3, 1, 0, 11, 1, 1, 226, X86ImpOpBase + 31, 0, 0x1089e0010029ULL }, // Inst #488 = ADC32rr_ND_REV |
| 46669 | { 487, 3, 1, 0, 11, 1, 1, 226, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x1088e0010028ULL }, // Inst #487 = ADC32rr_ND |
| 46670 | { 486, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0xc0009e0010029ULL }, // Inst #486 = ADC32rr_EVEX_REV |
| 46671 | { 485, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0, 0xc0008e0010028ULL }, // Inst #485 = ADC32rr_EVEX |
| 46672 | { 484, 3, 1, 0, 11, 1, 1, 161, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x880000128ULL }, // Inst #484 = ADC32rr |
| 46673 | { 483, 7, 1, 0, 23, 1, 1, 406, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x1089e0010019ULL }, // Inst #483 = ADC32rm_ND |
| 46674 | { 482, 7, 1, 0, 23, 1, 1, 399, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xc0009e0010019ULL }, // Inst #482 = ADC32rm_EVEX |
| 46675 | { 481, 7, 1, 0, 1441, 1, 1, 399, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x980000119ULL }, // Inst #481 = ADC32rm |
| 46676 | { 480, 3, 1, 0, 11, 1, 1, 396, X86ImpOpBase + 31, 0, 0x10c0e0190032ULL }, // Inst #480 = ADC32ri_ND |
| 46677 | { 479, 3, 1, 0, 11, 1, 1, 158, X86ImpOpBase + 31, 0, 0xc0040e0190032ULL }, // Inst #479 = ADC32ri_EVEX |
| 46678 | { 478, 3, 1, 0, 11, 1, 1, 396, X86ImpOpBase + 31, 0, 0x10c1e0050032ULL }, // Inst #478 = ADC32ri8_ND |
| 46679 | { 477, 3, 1, 0, 11, 1, 1, 158, X86ImpOpBase + 31, 0, 0xc0041e0050032ULL }, // Inst #477 = ADC32ri8_EVEX |
| 46680 | { 476, 3, 1, 0, 903, 1, 1, 158, X86ImpOpBase + 31, 0, 0x4180040132ULL }, // Inst #476 = ADC32ri8 |
| 46681 | { 475, 3, 1, 0, 11, 1, 1, 158, X86ImpOpBase + 31, 0, 0x4080180132ULL }, // Inst #475 = ADC32ri |
| 46682 | { 474, 7, 1, 0, 924, 1, 1, 389, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x1088e0010018ULL }, // Inst #474 = ADC32mr_ND |
| 46683 | { 473, 6, 0, 0, 925, 1, 1, 324, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0008e0010018ULL }, // Inst #473 = ADC32mr_EVEX |
| 46684 | { 472, 6, 0, 0, 795, 1, 1, 324, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880000118ULL }, // Inst #472 = ADC32mr |
| 46685 | { 471, 7, 1, 0, 924, 1, 1, 382, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190022ULL }, // Inst #471 = ADC32mi_ND |
| 46686 | { 470, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190022ULL }, // Inst #470 = ADC32mi_EVEX |
| 46687 | { 469, 7, 1, 0, 924, 1, 1, 382, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050022ULL }, // Inst #469 = ADC32mi8_ND |
| 46688 | { 468, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050022ULL }, // Inst #468 = ADC32mi8_EVEX |
| 46689 | { 467, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040122ULL }, // Inst #467 = ADC32mi8 |
| 46690 | { 466, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180122ULL }, // Inst #466 = ADC32mi |
| 46691 | { 465, 1, 0, 0, 904, 2, 2, 1, X86ImpOpBase + 57, 0, 0xa80180101ULL }, // Inst #465 = ADC32i32 |
| 46692 | { 464, 3, 1, 0, 11, 1, 1, 155, X86ImpOpBase + 31, 0, 0x9800000a9ULL }, // Inst #464 = ADC16rr_REV |
| 46693 | { 463, 3, 1, 0, 11, 1, 1, 379, X86ImpOpBase + 31, 0, 0x1089e0010829ULL }, // Inst #463 = ADC16rr_ND_REV |
| 46694 | { 462, 3, 1, 0, 11, 1, 1, 379, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x1088e0010828ULL }, // Inst #462 = ADC16rr_ND |
| 46695 | { 461, 3, 1, 0, 11, 1, 1, 155, X86ImpOpBase + 31, 0, 0xc0009e0010829ULL }, // Inst #461 = ADC16rr_EVEX_REV |
| 46696 | { 460, 3, 1, 0, 11, 1, 1, 155, X86ImpOpBase + 31, 0, 0xc0008e0010828ULL }, // Inst #460 = ADC16rr_EVEX |
| 46697 | { 459, 3, 1, 0, 11, 1, 1, 155, X86ImpOpBase + 31, 0|(1ULL<<MCID::Commutable), 0x8800000a8ULL }, // Inst #459 = ADC16rr |
| 46698 | { 458, 7, 1, 0, 23, 1, 1, 372, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x1089e0010819ULL }, // Inst #458 = ADC16rm_ND |
| 46699 | { 457, 7, 1, 0, 23, 1, 1, 365, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0xc0009e0010819ULL }, // Inst #457 = ADC16rm_EVEX |
| 46700 | { 456, 7, 1, 0, 1441, 1, 1, 365, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x980000099ULL }, // Inst #456 = ADC16rm |
| 46701 | { 455, 3, 1, 0, 11, 1, 1, 362, X86ImpOpBase + 31, 0, 0x10c0e0110832ULL }, // Inst #455 = ADC16ri_ND |
| 46702 | { 454, 3, 1, 0, 11, 1, 1, 152, X86ImpOpBase + 31, 0, 0xc0040e0110832ULL }, // Inst #454 = ADC16ri_EVEX |
| 46703 | { 453, 3, 1, 0, 11, 1, 1, 362, X86ImpOpBase + 31, 0, 0x10c1e0050832ULL }, // Inst #453 = ADC16ri8_ND |
| 46704 | { 452, 3, 1, 0, 11, 1, 1, 152, X86ImpOpBase + 31, 0, 0xc0041e0050832ULL }, // Inst #452 = ADC16ri8_EVEX |
| 46705 | { 451, 3, 1, 0, 903, 1, 1, 152, X86ImpOpBase + 31, 0, 0x41800400b2ULL }, // Inst #451 = ADC16ri8 |
| 46706 | { 450, 3, 1, 0, 11, 1, 1, 152, X86ImpOpBase + 31, 0, 0x40801000b2ULL }, // Inst #450 = ADC16ri |
| 46707 | { 449, 7, 1, 0, 924, 1, 1, 355, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x1088e0010818ULL }, // Inst #449 = ADC16mr_ND |
| 46708 | { 448, 6, 0, 0, 925, 1, 1, 349, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0008e0010818ULL }, // Inst #448 = ADC16mr_EVEX |
| 46709 | { 447, 6, 0, 0, 795, 1, 1, 349, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880000098ULL }, // Inst #447 = ADC16mr |
| 46710 | { 446, 7, 1, 0, 924, 1, 1, 342, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110822ULL }, // Inst #446 = ADC16mi_ND |
| 46711 | { 445, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110822ULL }, // Inst #445 = ADC16mi_EVEX |
| 46712 | { 444, 7, 1, 0, 924, 1, 1, 342, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050822ULL }, // Inst #444 = ADC16mi8_ND |
| 46713 | { 443, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050822ULL }, // Inst #443 = ADC16mi8_EVEX |
| 46714 | { 442, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a2ULL }, // Inst #442 = ADC16mi8 |
| 46715 | { 441, 6, 0, 0, 923, 1, 1, 336, X86ImpOpBase + 31, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a2ULL }, // Inst #441 = ADC16mi |
| 46716 | { 440, 1, 0, 0, 904, 2, 2, 1, X86ImpOpBase + 53, 0, 0xa80100081ULL }, // Inst #440 = ADC16i16 |
| 46717 | { 439, 2, 1, 0, 19, 0, 1, 334, X86ImpOpBase + 52, 0, 0xc00000ULL }, // Inst #439 = ABS_Fp80 |
| 46718 | { 438, 2, 1, 0, 19, 0, 1, 332, X86ImpOpBase + 52, 0, 0xc00000ULL }, // Inst #438 = ABS_Fp64 |
| 46719 | { 437, 2, 1, 0, 19, 0, 1, 330, X86ImpOpBase + 52, 0, 0xc00000ULL }, // Inst #437 = ABS_Fp32 |
| 46720 | { 436, 0, 0, 0, 19, 0, 1, 1, X86ImpOpBase + 52, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000061ULL }, // Inst #436 = ABS_F |
| 46721 | { 435, 0, 0, 0, 690, 2, 2, 1, X86ImpOpBase + 42, 0, 0x1f80000001ULL }, // Inst #435 = AAS |
| 46722 | { 434, 6, 0, 0, 18, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60030818ULL }, // Inst #434 = AAND64mr_EVEX |
| 46723 | { 433, 6, 0, 0, 1437, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00024818ULL }, // Inst #433 = AAND64mr |
| 46724 | { 432, 6, 0, 0, 18, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60010818ULL }, // Inst #432 = AAND32mr_EVEX |
| 46725 | { 431, 6, 0, 0, 18, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00004818ULL }, // Inst #431 = AAND32mr |
| 46726 | { 430, 1, 0, 0, 698, 1, 2, 1, X86ImpOpBase + 49, 0, 0x6a00040001ULL }, // Inst #430 = AAM8i8 |
| 46727 | { 429, 6, 0, 0, 18, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60030018ULL }, // Inst #429 = AADD64mr_EVEX |
| 46728 | { 428, 6, 0, 0, 1437, 0, 0, 211, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00024018ULL }, // Inst #428 = AADD64mr |
| 46729 | { 427, 6, 0, 0, 18, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60010018ULL }, // Inst #427 = AADD32mr_EVEX |
| 46730 | { 426, 6, 0, 0, 18, 0, 0, 324, X86ImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00004018ULL }, // Inst #426 = AADD32mr |
| 46731 | { 425, 1, 0, 0, 677, 1, 2, 1, X86ImpOpBase + 46, 0, 0x6a80040001ULL }, // Inst #425 = AAD8i8 |
| 46732 | { 424, 0, 0, 0, 690, 2, 2, 1, X86ImpOpBase + 42, 0, 0x1b80000001ULL }, // Inst #424 = AAA |
| 46733 | { 423, 2, 1, 0, 1, 0, 1, 322, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #423 = XOR64_FP |
| 46734 | { 422, 2, 1, 0, 1, 0, 1, 320, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #422 = XOR32_FP |
| 46735 | { 421, 0, 0, 0, 8, 0, 1, 1, X86ImpOpBase + 41, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #421 = XABORT_DEF |
| 46736 | { 420, 1, 0, 0, 10, 1, 3, 203, X86ImpOpBase + 37, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #420 = WRFLAGS64 |
| 46737 | { 419, 1, 0, 0, 10, 1, 3, 202, X86ImpOpBase + 33, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #419 = WRFLAGS32 |
| 46738 | { 418, 1, 1, 0, 2, 0, 0, 198, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #418 = V_SETALLONES |
| 46739 | { 417, 1, 1, 0, 2, 0, 0, 198, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #417 = V_SET0 |
| 46740 | { 416, 6, 1, 0, 1325, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #416 = VMOVUPSZ256rm_NOVLX |
| 46741 | { 415, 6, 0, 0, 15, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #415 = VMOVUPSZ256mr_NOVLX |
| 46742 | { 414, 6, 1, 0, 1302, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #414 = VMOVUPSZ128rm_NOVLX |
| 46743 | { 413, 6, 0, 0, 13, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #413 = VMOVUPSZ128mr_NOVLX |
| 46744 | { 412, 6, 1, 0, 1325, 0, 0, 314, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #412 = VMOVAPSZ256rm_NOVLX |
| 46745 | { 411, 6, 0, 0, 15, 0, 0, 308, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #411 = VMOVAPSZ256mr_NOVLX |
| 46746 | { 410, 6, 1, 0, 1302, 0, 0, 302, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #410 = VMOVAPSZ128rm_NOVLX |
| 46747 | { 409, 6, 0, 0, 13, 0, 0, 296, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #409 = VMOVAPSZ128mr_NOVLX |
| 46748 | { 408, 3, 1, 0, 12, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #408 = SHRDROT64ri |
| 46749 | { 407, 3, 1, 0, 12, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #407 = SHRDROT32ri |
| 46750 | { 406, 3, 1, 0, 12, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #406 = SHLDROT64ri |
| 46751 | { 405, 3, 1, 0, 12, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #405 = SHLDROT32ri |
| 46752 | { 404, 1, 1, 0, 11, 1, 1, 203, X86ImpOpBase + 31, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #404 = SETB_C64r |
| 46753 | { 403, 1, 1, 0, 11, 1, 1, 202, X86ImpOpBase + 31, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #403 = SETB_C32r |
| 46754 | { 402, 1, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #402 = SEH_UnwindVersion |
| 46755 | { 401, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #401 = SEH_UnwindV2Start |
| 46756 | { 400, 1, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #400 = SEH_StackAlloc |
| 46757 | { 399, 1, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #399 = SEH_StackAlign |
| 46758 | { 398, 2, 0, 0, 8, 0, 0, 21, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #398 = SEH_SetFrame |
| 46759 | { 397, 2, 0, 0, 8, 0, 0, 21, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #397 = SEH_SaveXMM |
| 46760 | { 396, 2, 0, 0, 8, 0, 0, 21, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #396 = SEH_SaveReg |
| 46761 | { 395, 1, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #395 = SEH_PushReg |
| 46762 | { 394, 1, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #394 = SEH_PushFrame |
| 46763 | { 393, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #393 = SEH_EndPrologue |
| 46764 | { 392, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #392 = SEH_EndEpilogue |
| 46765 | { 391, 0, 0, 0, 8, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #391 = SEH_BeginEpilogue |
| 46766 | { 390, 1, 1, 0, 10, 1, 1, 203, X86ImpOpBase + 29, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #390 = RDFLAGS64 |
| 46767 | { 389, 1, 1, 0, 10, 1, 1, 202, X86ImpOpBase + 27, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #389 = RDFLAGS32 |
| 46768 | { 388, 3, 1, 0, 8, 0, 0, 293, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #388 = PTILEZEROV |
| 46769 | { 387, 8, 0, 0, 8, 0, 0, 285, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #387 = PTILESTOREDV |
| 46770 | { 386, 6, 0, 0, 8, 0, 0, 279, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #386 = PTILEPAIRSTORE |
| 46771 | { 385, 6, 1, 0, 8, 0, 0, 273, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #385 = PTILEPAIRLOAD |
| 46772 | { 384, 8, 1, 0, 8, 0, 0, 265, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #384 = PTILELOADDV |
| 46773 | { 383, 8, 1, 0, 8, 0, 0, 265, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #383 = PTILELOADDT1V |
| 46774 | { 382, 8, 1, 0, 8, 0, 0, 265, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #382 = PTILELOADDRSV |
| 46775 | { 381, 8, 1, 0, 8, 0, 0, 265, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #381 = PTILELOADDRST1V |
| 46776 | { 380, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #380 = PTDPFP16PSV |
| 46777 | { 379, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #379 = PTDPBUUDV |
| 46778 | { 378, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #378 = PTDPBUSDV |
| 46779 | { 377, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #377 = PTDPBSUDV |
| 46780 | { 376, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #376 = PTDPBSSDV |
| 46781 | { 375, 7, 1, 0, 8, 0, 0, 258, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #375 = PTDPBF16PSV |
| 46782 | { 374, 9, 1, 0, 8, 0, 0, 249, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #374 = PT2RPNTLVWZ1V |
| 46783 | { 373, 9, 1, 0, 8, 0, 0, 249, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #373 = PT2RPNTLVWZ1T1V |
| 46784 | { 372, 9, 1, 0, 8, 0, 0, 249, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #372 = PT2RPNTLVWZ1RSV |
| 46785 | { 371, 9, 1, 0, 8, 0, 0, 249, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #371 = PT2RPNTLVWZ1RST1V |
| 46786 | { 370, 9, 1, 0, 8, 0, 0, 249, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #370 = PT2RPNTLVWZ0V |
| 46787 | { 369, 9, 1, 0, 8, 0, 0, 249, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #369 = PT2RPNTLVWZ0T1V |
| 46788 | { 368, 9, 1, 0, 8, 0, 0, 249, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #368 = PT2RPNTLVWZ0RSV |
| 46789 | { 367, 9, 1, 0, 8, 0, 0, 249, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #367 = PT2RPNTLVWZ0RST1V |
| 46790 | { 366, 6, 1, 0, 9, 0, 0, 243, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #366 = PLEA64r |
| 46791 | { 365, 6, 1, 0, 9, 0, 0, 237, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #365 = PLEA32r |
| 46792 | { 364, 5, 0, 0, 8, 0, 8, 232, X86ImpOpBase + 19, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #364 = PLDTILECFGV |
| 46793 | { 363, 3, 1, 0, 8, 2, 1, 229, X86ImpOpBase + 16, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #363 = MWAITX_SAVE_RBX |
| 46794 | { 362, 3, 0, 0, 8, 0, 0, 226, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #362 = MWAITX |
| 46795 | { 361, 2, 1, 0, 1, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #361 = MOV64ImmSExti8 |
| 46796 | { 360, 2, 1, 0, 7, 0, 0, 206, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #360 = MOV32ri64 |
| 46797 | { 359, 1, 1, 0, 1, 0, 1, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #359 = MOV32r_1 |
| 46798 | { 358, 1, 1, 0, 1, 0, 1, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #358 = MOV32r1 |
| 46799 | { 357, 1, 1, 0, 2, 0, 1, 202, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #357 = MOV32r0 |
| 46800 | { 356, 2, 1, 0, 1, 0, 0, 204, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #356 = MOV32ImmSExti8 |
| 46801 | { 355, 0, 0, 0, 6, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #355 = MORESTACK_RET_RESTORE_R10 |
| 46802 | { 354, 0, 0, 0, 6, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #354 = MORESTACK_RET |
| 46803 | { 353, 1, 1, 0, 2, 0, 0, 225, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #353 = MMX_SET0 |
| 46804 | { 352, 8, 1, 0, 5, 3, 4, 217, X86ImpOpBase + 9, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #352 = LCMPXCHG16B_SAVE_RBX |
| 46805 | { 351, 6, 0, 0, 5, 3, 3, 211, X86ImpOpBase + 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #351 = LCMPXCHG16B_NO_RBX |
| 46806 | { 350, 1, 1, 0, 1230, 0, 0, 210, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #350 = KSET1W |
| 46807 | { 349, 1, 1, 0, 1230, 0, 0, 209, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #349 = KSET1Q |
| 46808 | { 348, 1, 1, 0, 1230, 0, 0, 208, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #348 = KSET1D |
| 46809 | { 347, 1, 1, 0, 1230, 0, 0, 210, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #347 = KSET0W |
| 46810 | { 346, 1, 1, 0, 1230, 0, 0, 209, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #346 = KSET0Q |
| 46811 | { 345, 1, 1, 0, 1230, 0, 0, 208, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #345 = KSET0D |
| 46812 | { 344, 2, 0, 0, 4, 2, 0, 206, X86ImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #344 = INDIRECT_THUNK_TCRETURN64 |
| 46813 | { 343, 2, 0, 0, 4, 2, 0, 204, X86ImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #343 = INDIRECT_THUNK_TCRETURN32 |
| 46814 | { 342, 1, 0, 0, 4, 2, 0, 203, X86ImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #342 = INDIRECT_THUNK_CALL64 |
| 46815 | { 341, 1, 0, 0, 4, 2, 0, 202, X86ImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #341 = INDIRECT_THUNK_CALL32 |
| 46816 | { 340, 2, 0, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #340 = G_FIST |
| 46817 | { 339, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #339 = G_FILD |
| 46818 | { 338, 1, 1, 0, 2, 0, 0, 201, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #338 = FsFLD0SS |
| 46819 | { 337, 1, 1, 0, 2, 0, 0, 200, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #337 = FsFLD0SH |
| 46820 | { 336, 1, 1, 0, 2, 0, 0, 199, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #336 = FsFLD0SD |
| 46821 | { 335, 1, 1, 0, 2, 0, 0, 198, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #335 = FsFLD0F128 |
| 46822 | { 334, 2, 0, 0, 763, 2, 0, 196, X86ImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // Inst #334 = CALL64r_RVMARKER |
| 46823 | { 333, 1, 0, 0, 763, 2, 0, 195, X86ImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // Inst #333 = CALL64r_ImpCall |
| 46824 | { 332, 2, 0, 0, 4, 2, 0, 193, X86ImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // Inst #332 = CALL64pcrel32_RVMARKER |
| 46825 | { 331, 6, 0, 0, 784, 2, 0, 187, X86ImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #331 = CALL64m_RVMARKER |
| 46826 | { 330, 1, 1, 0, 2, 0, 0, 176, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #330 = AVX_SET0 |
| 46827 | { 329, 1, 1, 0, 2, 0, 0, 186, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #329 = AVX512_FsFLD0SS |
| 46828 | { 328, 1, 1, 0, 2, 0, 0, 185, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #328 = AVX512_FsFLD0SH |
| 46829 | { 327, 1, 1, 0, 2, 0, 0, 184, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #327 = AVX512_FsFLD0SD |
| 46830 | { 326, 1, 1, 0, 2, 0, 0, 177, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #326 = AVX512_FsFLD0F128 |
| 46831 | { 325, 2, 1, 0, 3, 0, 0, 182, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #325 = AVX512_512_SEXT_MASK_64 |
| 46832 | { 324, 2, 1, 0, 3, 0, 0, 180, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #324 = AVX512_512_SEXT_MASK_32 |
| 46833 | { 323, 1, 1, 0, 2, 0, 0, 179, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #323 = AVX512_512_SETALLONES |
| 46834 | { 322, 1, 1, 0, 2, 0, 0, 179, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #322 = AVX512_512_SET0 |
| 46835 | { 321, 1, 1, 0, 2, 0, 0, 178, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #321 = AVX512_256_SET0 |
| 46836 | { 320, 1, 1, 0, 2, 0, 0, 177, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #320 = AVX512_128_SET0 |
| 46837 | { 319, 1, 1, 0, 2, 0, 0, 176, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #319 = AVX2_SETALLONES |
| 46838 | { 318, 1, 1, 0, 2, 0, 0, 176, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #318 = AVX1_SETALLONES |
| 46839 | { 317, 3, 1, 0, 1, 0, 1, 173, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #317 = ADD8rr_DB |
| 46840 | { 316, 3, 1, 0, 1, 0, 1, 170, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #316 = ADD8ri_DB |
| 46841 | { 315, 3, 1, 0, 1, 0, 1, 167, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #315 = ADD64rr_DB |
| 46842 | { 314, 3, 1, 0, 1, 0, 1, 164, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #314 = ADD64ri32_DB |
| 46843 | { 313, 3, 1, 0, 1, 0, 1, 161, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #313 = ADD32rr_DB |
| 46844 | { 312, 3, 1, 0, 1, 0, 1, 158, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #312 = ADD32ri_DB |
| 46845 | { 311, 3, 1, 0, 1, 0, 1, 155, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #311 = ADD16rr_DB |
| 46846 | { 310, 3, 1, 0, 1, 0, 1, 152, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #310 = ADD16ri_DB |
| 46847 | { 309, 4, 1, 0, 0, 0, 0, 148, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #309 = G_UBFX |
| 46848 | { 308, 4, 1, 0, 0, 0, 0, 148, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #308 = G_SBFX |
| 46849 | { 307, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #307 = G_VECREDUCE_UMIN |
| 46850 | { 306, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #306 = G_VECREDUCE_UMAX |
| 46851 | { 305, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #305 = G_VECREDUCE_SMIN |
| 46852 | { 304, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #304 = G_VECREDUCE_SMAX |
| 46853 | { 303, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #303 = G_VECREDUCE_XOR |
| 46854 | { 302, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #302 = G_VECREDUCE_OR |
| 46855 | { 301, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #301 = G_VECREDUCE_AND |
| 46856 | { 300, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #300 = G_VECREDUCE_MUL |
| 46857 | { 299, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #299 = G_VECREDUCE_ADD |
| 46858 | { 298, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #298 = G_VECREDUCE_FMINIMUM |
| 46859 | { 297, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #297 = G_VECREDUCE_FMAXIMUM |
| 46860 | { 296, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #296 = G_VECREDUCE_FMIN |
| 46861 | { 295, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #295 = G_VECREDUCE_FMAX |
| 46862 | { 294, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #294 = G_VECREDUCE_FMUL |
| 46863 | { 293, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #293 = G_VECREDUCE_FADD |
| 46864 | { 292, 3, 1, 0, 0, 0, 0, 131, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #292 = G_VECREDUCE_SEQ_FMUL |
| 46865 | { 291, 3, 1, 0, 0, 0, 0, 131, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #291 = G_VECREDUCE_SEQ_FADD |
| 46866 | { 290, 1, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #290 = G_UBSANTRAP |
| 46867 | { 289, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #289 = G_DEBUGTRAP |
| 46868 | { 288, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #288 = G_TRAP |
| 46869 | { 287, 3, 0, 0, 0, 0, 0, 58, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #287 = G_BZERO |
| 46870 | { 286, 4, 0, 0, 0, 0, 0, 144, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #286 = G_MEMSET |
| 46871 | { 285, 4, 0, 0, 0, 0, 0, 144, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #285 = G_MEMMOVE |
| 46872 | { 284, 3, 0, 0, 0, 0, 0, 131, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #284 = G_MEMCPY_INLINE |
| 46873 | { 283, 4, 0, 0, 0, 0, 0, 144, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #283 = G_MEMCPY |
| 46874 | { 282, 2, 0, 0, 0, 0, 0, 142, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #282 = G_WRITE_REGISTER |
| 46875 | { 281, 2, 1, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #281 = G_READ_REGISTER |
| 46876 | { 280, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #280 = G_STRICT_FLDEXP |
| 46877 | { 279, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #279 = G_STRICT_FSQRT |
| 46878 | { 278, 4, 1, 0, 0, 0, 0, 46, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #278 = G_STRICT_FMA |
| 46879 | { 277, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #277 = G_STRICT_FREM |
| 46880 | { 276, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #276 = G_STRICT_FDIV |
| 46881 | { 275, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #275 = G_STRICT_FMUL |
| 46882 | { 274, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #274 = G_STRICT_FSUB |
| 46883 | { 273, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #273 = G_STRICT_FADD |
| 46884 | { 272, 1, 0, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #272 = G_STACKRESTORE |
| 46885 | { 271, 1, 1, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #271 = G_STACKSAVE |
| 46886 | { 270, 3, 1, 0, 0, 0, 0, 69, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #270 = G_DYN_STACKALLOC |
| 46887 | { 269, 2, 1, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #269 = G_JUMP_TABLE |
| 46888 | { 268, 2, 1, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #268 = G_BLOCK_ADDR |
| 46889 | { 267, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #267 = G_ADDRSPACE_CAST |
| 46890 | { 266, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #266 = G_FNEARBYINT |
| 46891 | { 265, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #265 = G_FRINT |
| 46892 | { 264, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #264 = G_FFLOOR |
| 46893 | { 263, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #263 = G_FSQRT |
| 46894 | { 262, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #262 = G_FTANH |
| 46895 | { 261, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #261 = G_FSINH |
| 46896 | { 260, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #260 = G_FCOSH |
| 46897 | { 259, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #259 = G_FATAN2 |
| 46898 | { 258, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #258 = G_FATAN |
| 46899 | { 257, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #257 = G_FASIN |
| 46900 | { 256, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #256 = G_FACOS |
| 46901 | { 255, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #255 = G_FTAN |
| 46902 | { 254, 3, 2, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #254 = G_FSINCOS |
| 46903 | { 253, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #253 = G_FSIN |
| 46904 | { 252, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #252 = G_FCOS |
| 46905 | { 251, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #251 = G_FCEIL |
| 46906 | { 250, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #250 = G_BITREVERSE |
| 46907 | { 249, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #249 = G_BSWAP |
| 46908 | { 248, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #248 = G_CTPOP |
| 46909 | { 247, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #247 = G_CTLZ_ZERO_UNDEF |
| 46910 | { 246, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #246 = G_CTLZ |
| 46911 | { 245, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #245 = G_CTTZ_ZERO_UNDEF |
| 46912 | { 244, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #244 = G_CTTZ |
| 46913 | { 243, 4, 1, 0, 0, 0, 0, 138, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #243 = G_VECTOR_COMPRESS |
| 46914 | { 242, 2, 1, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #242 = G_STEP_VECTOR |
| 46915 | { 241, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #241 = G_SPLAT_VECTOR |
| 46916 | { 240, 4, 1, 0, 0, 0, 0, 134, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #240 = G_SHUFFLE_VECTOR |
| 46917 | { 239, 3, 1, 0, 0, 0, 0, 131, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #239 = G_EXTRACT_VECTOR_ELT |
| 46918 | { 238, 4, 1, 0, 0, 0, 0, 127, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #238 = G_INSERT_VECTOR_ELT |
| 46919 | { 237, 3, 1, 0, 0, 0, 0, 58, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #237 = G_EXTRACT_SUBVECTOR |
| 46920 | { 236, 4, 1, 0, 0, 0, 0, 63, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #236 = G_INSERT_SUBVECTOR |
| 46921 | { 235, 2, 1, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #235 = G_VSCALE |
| 46922 | { 234, 3, 0, 0, 0, 0, 0, 124, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #234 = G_BRJT |
| 46923 | { 233, 1, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #233 = G_BR |
| 46924 | { 232, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #232 = G_LLROUND |
| 46925 | { 231, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #231 = G_LROUND |
| 46926 | { 230, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #230 = G_ABS |
| 46927 | { 229, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #229 = G_UMAX |
| 46928 | { 228, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #228 = G_UMIN |
| 46929 | { 227, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #227 = G_SMAX |
| 46930 | { 226, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #226 = G_SMIN |
| 46931 | { 225, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #225 = G_PTRMASK |
| 46932 | { 224, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #224 = G_PTR_ADD |
| 46933 | { 223, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #223 = G_RESET_FPMODE |
| 46934 | { 222, 1, 0, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #222 = G_SET_FPMODE |
| 46935 | { 221, 1, 1, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #221 = G_GET_FPMODE |
| 46936 | { 220, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #220 = G_RESET_FPENV |
| 46937 | { 219, 1, 0, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #219 = G_SET_FPENV |
| 46938 | { 218, 1, 1, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #218 = G_GET_FPENV |
| 46939 | { 217, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #217 = G_FMAXIMUMNUM |
| 46940 | { 216, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #216 = G_FMINIMUMNUM |
| 46941 | { 215, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #215 = G_FMAXIMUM |
| 46942 | { 214, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #214 = G_FMINIMUM |
| 46943 | { 213, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #213 = G_FMAXNUM_IEEE |
| 46944 | { 212, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #212 = G_FMINNUM_IEEE |
| 46945 | { 211, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #211 = G_FMAXNUM |
| 46946 | { 210, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #210 = G_FMINNUM |
| 46947 | { 209, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #209 = G_FCANONICALIZE |
| 46948 | { 208, 3, 1, 0, 0, 0, 0, 98, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #208 = G_IS_FPCLASS |
| 46949 | { 207, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #207 = G_FCOPYSIGN |
| 46950 | { 206, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #206 = G_FABS |
| 46951 | { 205, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #205 = G_FPTOUI_SAT |
| 46952 | { 204, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #204 = G_FPTOSI_SAT |
| 46953 | { 203, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #203 = G_UITOFP |
| 46954 | { 202, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #202 = G_SITOFP |
| 46955 | { 201, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #201 = G_FPTOUI |
| 46956 | { 200, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #200 = G_FPTOSI |
| 46957 | { 199, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #199 = G_FPTRUNC |
| 46958 | { 198, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #198 = G_FPEXT |
| 46959 | { 197, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #197 = G_FNEG |
| 46960 | { 196, 3, 2, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #196 = G_FFREXP |
| 46961 | { 195, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #195 = G_FLDEXP |
| 46962 | { 194, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #194 = G_FLOG10 |
| 46963 | { 193, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #193 = G_FLOG2 |
| 46964 | { 192, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #192 = G_FLOG |
| 46965 | { 191, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #191 = G_FEXP10 |
| 46966 | { 190, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #190 = G_FEXP2 |
| 46967 | { 189, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #189 = G_FEXP |
| 46968 | { 188, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #188 = G_FPOWI |
| 46969 | { 187, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #187 = G_FPOW |
| 46970 | { 186, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #186 = G_FREM |
| 46971 | { 185, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #185 = G_FDIV |
| 46972 | { 184, 4, 1, 0, 0, 0, 0, 46, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #184 = G_FMAD |
| 46973 | { 183, 4, 1, 0, 0, 0, 0, 46, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #183 = G_FMA |
| 46974 | { 182, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #182 = G_FMUL |
| 46975 | { 181, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #181 = G_FSUB |
| 46976 | { 180, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #180 = G_FADD |
| 46977 | { 179, 4, 1, 0, 0, 0, 0, 120, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #179 = G_UDIVFIXSAT |
| 46978 | { 178, 4, 1, 0, 0, 0, 0, 120, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #178 = G_SDIVFIXSAT |
| 46979 | { 177, 4, 1, 0, 0, 0, 0, 120, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #177 = G_UDIVFIX |
| 46980 | { 176, 4, 1, 0, 0, 0, 0, 120, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #176 = G_SDIVFIX |
| 46981 | { 175, 4, 1, 0, 0, 0, 0, 120, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #175 = G_UMULFIXSAT |
| 46982 | { 174, 4, 1, 0, 0, 0, 0, 120, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #174 = G_SMULFIXSAT |
| 46983 | { 173, 4, 1, 0, 0, 0, 0, 120, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #173 = G_UMULFIX |
| 46984 | { 172, 4, 1, 0, 0, 0, 0, 120, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #172 = G_SMULFIX |
| 46985 | { 171, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #171 = G_SSHLSAT |
| 46986 | { 170, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #170 = G_USHLSAT |
| 46987 | { 169, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #169 = G_SSUBSAT |
| 46988 | { 168, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #168 = G_USUBSAT |
| 46989 | { 167, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #167 = G_SADDSAT |
| 46990 | { 166, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #166 = G_UADDSAT |
| 46991 | { 165, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #165 = G_SMULH |
| 46992 | { 164, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #164 = G_UMULH |
| 46993 | { 163, 4, 2, 0, 0, 0, 0, 87, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #163 = G_SMULO |
| 46994 | { 162, 4, 2, 0, 0, 0, 0, 87, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #162 = G_UMULO |
| 46995 | { 161, 5, 2, 0, 0, 0, 0, 115, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #161 = G_SSUBE |
| 46996 | { 160, 4, 2, 0, 0, 0, 0, 87, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #160 = G_SSUBO |
| 46997 | { 159, 5, 2, 0, 0, 0, 0, 115, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #159 = G_SADDE |
| 46998 | { 158, 4, 2, 0, 0, 0, 0, 87, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #158 = G_SADDO |
| 46999 | { 157, 5, 2, 0, 0, 0, 0, 115, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #157 = G_USUBE |
| 47000 | { 156, 4, 2, 0, 0, 0, 0, 87, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #156 = G_USUBO |
| 47001 | { 155, 5, 2, 0, 0, 0, 0, 115, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #155 = G_UADDE |
| 47002 | { 154, 4, 2, 0, 0, 0, 0, 87, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #154 = G_UADDO |
| 47003 | { 153, 4, 1, 0, 0, 0, 0, 87, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #153 = G_SELECT |
| 47004 | { 152, 3, 1, 0, 0, 0, 0, 112, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #152 = G_UCMP |
| 47005 | { 151, 3, 1, 0, 0, 0, 0, 112, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #151 = G_SCMP |
| 47006 | { 150, 4, 1, 0, 0, 0, 0, 108, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #150 = G_FCMP |
| 47007 | { 149, 4, 1, 0, 0, 0, 0, 108, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #149 = G_ICMP |
| 47008 | { 148, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #148 = G_ROTL |
| 47009 | { 147, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #147 = G_ROTR |
| 47010 | { 146, 4, 1, 0, 0, 0, 0, 104, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #146 = G_FSHR |
| 47011 | { 145, 4, 1, 0, 0, 0, 0, 104, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #145 = G_FSHL |
| 47012 | { 144, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #144 = G_ASHR |
| 47013 | { 143, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #143 = G_LSHR |
| 47014 | { 142, 3, 1, 0, 0, 0, 0, 101, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #142 = G_SHL |
| 47015 | { 141, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #141 = G_ZEXT |
| 47016 | { 140, 3, 1, 0, 0, 0, 0, 40, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #140 = G_SEXT_INREG |
| 47017 | { 139, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #139 = G_SEXT |
| 47018 | { 138, 3, 1, 0, 0, 0, 0, 98, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #138 = G_VAARG |
| 47019 | { 137, 1, 0, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #137 = G_VASTART |
| 47020 | { 136, 2, 1, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #136 = G_FCONSTANT |
| 47021 | { 135, 2, 1, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #135 = G_CONSTANT |
| 47022 | { 134, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #134 = G_TRUNC |
| 47023 | { 133, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #133 = G_ANYEXT |
| 47024 | { 132, 1, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #132 = G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
| 47025 | { 131, 1, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #131 = G_INTRINSIC_CONVERGENT |
| 47026 | { 130, 1, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #130 = G_INTRINSIC_W_SIDE_EFFECTS |
| 47027 | { 129, 1, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #129 = G_INTRINSIC |
| 47028 | { 128, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #128 = G_INVOKE_REGION_START |
| 47029 | { 127, 1, 0, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #127 = G_BRINDIRECT |
| 47030 | { 126, 2, 0, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #126 = G_BRCOND |
| 47031 | { 125, 4, 0, 0, 0, 0, 0, 94, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #125 = G_PREFETCH |
| 47032 | { 124, 2, 0, 0, 0, 0, 0, 21, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #124 = G_FENCE |
| 47033 | { 123, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #123 = G_ATOMICRMW_USUB_SAT |
| 47034 | { 122, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #122 = G_ATOMICRMW_USUB_COND |
| 47035 | { 121, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #121 = G_ATOMICRMW_UDEC_WRAP |
| 47036 | { 120, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #120 = G_ATOMICRMW_UINC_WRAP |
| 47037 | { 119, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #119 = G_ATOMICRMW_FMINIMUM |
| 47038 | { 118, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #118 = G_ATOMICRMW_FMAXIMUM |
| 47039 | { 117, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #117 = G_ATOMICRMW_FMIN |
| 47040 | { 116, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #116 = G_ATOMICRMW_FMAX |
| 47041 | { 115, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #115 = G_ATOMICRMW_FSUB |
| 47042 | { 114, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #114 = G_ATOMICRMW_FADD |
| 47043 | { 113, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #113 = G_ATOMICRMW_UMIN |
| 47044 | { 112, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #112 = G_ATOMICRMW_UMAX |
| 47045 | { 111, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #111 = G_ATOMICRMW_MIN |
| 47046 | { 110, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #110 = G_ATOMICRMW_MAX |
| 47047 | { 109, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #109 = G_ATOMICRMW_XOR |
| 47048 | { 108, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #108 = G_ATOMICRMW_OR |
| 47049 | { 107, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #107 = G_ATOMICRMW_NAND |
| 47050 | { 106, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #106 = G_ATOMICRMW_AND |
| 47051 | { 105, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #105 = G_ATOMICRMW_SUB |
| 47052 | { 104, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #104 = G_ATOMICRMW_ADD |
| 47053 | { 103, 3, 1, 0, 0, 0, 0, 91, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #103 = G_ATOMICRMW_XCHG |
| 47054 | { 102, 4, 1, 0, 0, 0, 0, 87, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #102 = G_ATOMIC_CMPXCHG |
| 47055 | { 101, 5, 2, 0, 0, 0, 0, 82, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #101 = G_ATOMIC_CMPXCHG_WITH_SUCCESS |
| 47056 | { 100, 5, 1, 0, 0, 0, 0, 77, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #100 = G_INDEXED_STORE |
| 47057 | { 99, 2, 0, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #99 = G_STORE |
| 47058 | { 98, 5, 2, 0, 0, 0, 0, 72, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #98 = G_INDEXED_ZEXTLOAD |
| 47059 | { 97, 5, 2, 0, 0, 0, 0, 72, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #97 = G_INDEXED_SEXTLOAD |
| 47060 | { 96, 5, 2, 0, 0, 0, 0, 72, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #96 = G_INDEXED_LOAD |
| 47061 | { 95, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #95 = G_ZEXTLOAD |
| 47062 | { 94, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #94 = G_SEXTLOAD |
| 47063 | { 93, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #93 = G_LOAD |
| 47064 | { 92, 1, 1, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #92 = G_READSTEADYCOUNTER |
| 47065 | { 91, 1, 1, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #91 = G_READCYCLECOUNTER |
| 47066 | { 90, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #90 = G_INTRINSIC_ROUNDEVEN |
| 47067 | { 89, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #89 = G_INTRINSIC_LLRINT |
| 47068 | { 88, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #88 = G_INTRINSIC_LRINT |
| 47069 | { 87, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #87 = G_INTRINSIC_ROUND |
| 47070 | { 86, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #86 = G_INTRINSIC_TRUNC |
| 47071 | { 85, 3, 1, 0, 0, 0, 0, 69, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #85 = G_INTRINSIC_FPTRUNC_ROUND |
| 47072 | { 84, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #84 = G_CONSTANT_FOLD_BARRIER |
| 47073 | { 83, 2, 1, 0, 0, 0, 0, 67, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #83 = G_FREEZE |
| 47074 | { 82, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #82 = G_BITCAST |
| 47075 | { 81, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #81 = G_INTTOPTR |
| 47076 | { 80, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #80 = G_PTRTOINT |
| 47077 | { 79, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #79 = G_CONCAT_VECTORS |
| 47078 | { 78, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #78 = G_BUILD_VECTOR_TRUNC |
| 47079 | { 77, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #77 = G_BUILD_VECTOR |
| 47080 | { 76, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #76 = G_MERGE_VALUES |
| 47081 | { 75, 4, 1, 0, 0, 0, 0, 63, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #75 = G_INSERT |
| 47082 | { 74, 2, 1, 0, 0, 0, 0, 61, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #74 = G_UNMERGE_VALUES |
| 47083 | { 73, 3, 1, 0, 0, 0, 0, 58, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #73 = G_EXTRACT |
| 47084 | { 72, 2, 1, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #72 = G_CONSTANT_POOL |
| 47085 | { 71, 5, 1, 0, 0, 0, 0, 53, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #71 = G_PTRAUTH_GLOBAL_VALUE |
| 47086 | { 70, 2, 1, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #70 = G_GLOBAL_VALUE |
| 47087 | { 69, 2, 1, 0, 0, 0, 0, 51, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #69 = G_FRAME_INDEX |
| 47088 | { 68, 1, 1, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #68 = G_PHI |
| 47089 | { 67, 1, 1, 0, 0, 0, 0, 50, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #67 = G_IMPLICIT_DEF |
| 47090 | { 66, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #66 = G_ABDU |
| 47091 | { 65, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #65 = G_ABDS |
| 47092 | { 64, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #64 = G_XOR |
| 47093 | { 63, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #63 = G_OR |
| 47094 | { 62, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #62 = G_AND |
| 47095 | { 61, 4, 2, 0, 0, 0, 0, 46, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #61 = G_UDIVREM |
| 47096 | { 60, 4, 2, 0, 0, 0, 0, 46, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #60 = G_SDIVREM |
| 47097 | { 59, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #59 = G_UREM |
| 47098 | { 58, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #58 = G_SREM |
| 47099 | { 57, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #57 = G_UDIV |
| 47100 | { 56, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #56 = G_SDIV |
| 47101 | { 55, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #55 = G_MUL |
| 47102 | { 54, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #54 = G_SUB |
| 47103 | { 53, 3, 1, 0, 0, 0, 0, 43, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #53 = G_ADD |
| 47104 | { 52, 3, 1, 0, 0, 0, 0, 40, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #52 = G_ASSERT_ALIGN |
| 47105 | { 51, 3, 1, 0, 0, 0, 0, 40, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #51 = G_ASSERT_ZEXT |
| 47106 | { 50, 3, 1, 0, 0, 0, 0, 40, X86ImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #50 = G_ASSERT_SEXT |
| 47107 | { 49, 1, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #49 = CONVERGENCECTRL_GLUE |
| 47108 | { 48, 2, 1, 0, 0, 0, 0, 13, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #48 = CONVERGENCECTRL_LOOP |
| 47109 | { 47, 1, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #47 = CONVERGENCECTRL_ANCHOR |
| 47110 | { 46, 1, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #46 = CONVERGENCECTRL_ENTRY |
| 47111 | { 45, 1, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #45 = JUMP_TABLE_DEBUG_INFO |
| 47112 | { 44, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #44 = MEMBARRIER |
| 47113 | { 43, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #43 = FAKE_USE |
| 47114 | { 42, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #42 = ICALL_BRANCH_FUNNEL |
| 47115 | { 41, 3, 0, 0, 0, 0, 0, 37, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #41 = PATCHABLE_TYPED_EVENT_CALL |
| 47116 | { 40, 2, 0, 0, 0, 0, 0, 35, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #40 = PATCHABLE_EVENT_CALL |
| 47117 | { 39, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #39 = PATCHABLE_TAIL_CALL |
| 47118 | { 38, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #38 = PATCHABLE_FUNCTION_EXIT |
| 47119 | { 37, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #37 = PATCHABLE_RET |
| 47120 | { 36, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #36 = PATCHABLE_FUNCTION_ENTER |
| 47121 | { 35, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #35 = PATCHABLE_OP |
| 47122 | { 34, 1, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #34 = FAULTING_OP |
| 47123 | { 33, 2, 0, 0, 0, 0, 0, 33, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #33 = LOCAL_ESCAPE |
| 47124 | { 32, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #32 = STATEPOINT |
| 47125 | { 31, 3, 1, 0, 0, 0, 0, 30, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #31 = PREALLOCATED_ARG |
| 47126 | { 30, 1, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #30 = PREALLOCATED_SETUP |
| 47127 | { 29, 1, 1, 0, 0, 0, 0, 29, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #29 = LOAD_STACK_GUARD |
| 47128 | { 28, 6, 1, 0, 0, 0, 0, 23, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #28 = PATCHPOINT |
| 47129 | { 27, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #27 = FENTRY_CALL |
| 47130 | { 26, 2, 0, 0, 0, 0, 0, 21, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #26 = STACKMAP |
| 47131 | { 25, 2, 1, 0, 0, 0, 0, 19, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #25 = ARITH_FENCE |
| 47132 | { 24, 4, 0, 0, 0, 0, 0, 15, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #24 = PSEUDO_PROBE |
| 47133 | { 23, 1, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #23 = LIFETIME_END |
| 47134 | { 22, 1, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #22 = LIFETIME_START |
| 47135 | { 21, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #21 = BUNDLE |
| 47136 | { 20, 2, 1, 0, 601, 0, 0, 13, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #20 = COPY |
| 47137 | { 19, 2, 1, 0, 0, 0, 0, 13, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #19 = REG_SEQUENCE |
| 47138 | { 18, 1, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #18 = DBG_LABEL |
| 47139 | { 17, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #17 = DBG_PHI |
| 47140 | { 16, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #16 = DBG_INSTR_REF |
| 47141 | { 15, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #15 = DBG_VALUE_LIST |
| 47142 | { 14, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #14 = DBG_VALUE |
| 47143 | { 13, 3, 1, 0, 0, 0, 0, 2, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #13 = COPY_TO_REGCLASS |
| 47144 | { 12, 4, 1, 0, 0, 0, 0, 9, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #12 = SUBREG_TO_REG |
| 47145 | { 11, 1, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #11 = INIT_UNDEF |
| 47146 | { 10, 1, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #10 = IMPLICIT_DEF |
| 47147 | { 9, 4, 1, 0, 0, 0, 0, 5, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #9 = INSERT_SUBREG |
| 47148 | { 8, 3, 1, 0, 0, 0, 0, 2, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #8 = EXTRACT_SUBREG |
| 47149 | { 7, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #7 = KILL |
| 47150 | { 6, 1, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #6 = ANNOTATION_LABEL |
| 47151 | { 5, 1, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #5 = GC_LABEL |
| 47152 | { 4, 1, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #4 = EH_LABEL |
| 47153 | { 3, 1, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #3 = CFI_INSTRUCTION |
| 47154 | { 2, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2 = INLINEASM_BR |
| 47155 | { 1, 0, 0, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #1 = INLINEASM |
| 47156 | { 0, 1, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #0 = PHI |
| 47157 | }, { |
| 47158 | /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47159 | /* 1 */ |
| 47160 | /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47161 | /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47162 | /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47163 | /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47164 | /* 13 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47165 | /* 15 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47166 | /* 19 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, |
| 47167 | /* 21 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47168 | /* 23 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47169 | /* 29 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
| 47170 | /* 30 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47171 | /* 33 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47172 | /* 35 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47173 | /* 37 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47174 | /* 40 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 47175 | /* 43 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 47176 | /* 46 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 47177 | /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 47178 | /* 51 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47179 | /* 53 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47180 | /* 58 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 47181 | /* 61 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 47182 | /* 63 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 47183 | /* 67 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 47184 | /* 69 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47185 | /* 72 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47186 | /* 77 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47187 | /* 82 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 47188 | /* 87 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 47189 | /* 91 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 47190 | /* 94 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47191 | /* 98 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47192 | /* 101 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 47193 | /* 104 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 47194 | /* 108 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 47195 | /* 112 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 47196 | /* 115 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 47197 | /* 120 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 47198 | /* 124 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 47199 | /* 127 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
| 47200 | /* 131 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
| 47201 | /* 134 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47202 | /* 138 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 47203 | /* 142 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 47204 | /* 144 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 47205 | /* 148 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 47206 | /* 152 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47207 | /* 155 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47208 | /* 158 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47209 | /* 161 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47210 | /* 164 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47211 | /* 167 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47212 | /* 170 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47213 | /* 173 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47214 | /* 176 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47215 | /* 177 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47216 | /* 178 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47217 | /* 179 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47218 | /* 180 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47219 | /* 182 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47220 | /* 184 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47221 | /* 185 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47222 | /* 186 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47223 | /* 187 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47224 | /* 193 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, |
| 47225 | /* 195 */ { X86::GR64_ARegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47226 | /* 196 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47227 | /* 198 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47228 | /* 199 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47229 | /* 200 */ { X86::FR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47230 | /* 201 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47231 | /* 202 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47232 | /* 203 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47233 | /* 204 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47234 | /* 206 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47235 | /* 208 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47236 | /* 209 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47237 | /* 210 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47238 | /* 211 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47239 | /* 217 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 47240 | /* 225 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47241 | /* 226 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47242 | /* 229 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 47243 | /* 232 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47244 | /* 237 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47245 | /* 243 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47246 | /* 249 */ { X86::TILEPAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47247 | /* 258 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47248 | /* 265 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47249 | /* 273 */ { X86::TILEPAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47250 | /* 279 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::TILEPAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47251 | /* 285 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47252 | /* 293 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47253 | /* 296 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47254 | /* 302 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47255 | /* 308 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47256 | /* 314 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47257 | /* 320 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 47258 | /* 322 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 47259 | /* 324 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47260 | /* 330 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47261 | /* 332 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47262 | /* 334 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47263 | /* 336 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47264 | /* 342 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47265 | /* 349 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47266 | /* 355 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47267 | /* 362 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47268 | /* 365 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47269 | /* 372 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47270 | /* 379 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47271 | /* 382 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47272 | /* 389 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47273 | /* 396 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47274 | /* 399 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47275 | /* 406 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47276 | /* 413 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47277 | /* 420 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47278 | /* 427 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47279 | /* 430 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47280 | /* 437 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47281 | /* 444 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47282 | /* 447 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47283 | /* 454 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47284 | /* 460 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47285 | /* 467 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47286 | /* 470 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47287 | /* 477 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47288 | /* 484 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47289 | /* 487 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47290 | /* 494 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47291 | /* 497 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47292 | /* 504 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47293 | /* 507 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47294 | /* 514 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47295 | /* 517 */ { X86::RSTRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47296 | /* 518 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47297 | /* 521 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47298 | /* 528 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47299 | /* 531 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47300 | /* 538 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47301 | /* 541 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47302 | /* 548 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47303 | /* 551 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47304 | /* 557 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47305 | /* 559 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47306 | /* 566 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47307 | /* 569 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47308 | /* 571 */ { X86::GR64PLTSafeRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47309 | /* 573 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47310 | /* 575 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47311 | /* 577 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47312 | /* 585 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47313 | /* 589 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47314 | /* 595 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 47315 | /* 597 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47316 | /* 599 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47317 | /* 600 */ { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, |
| 47318 | /* 601 */ { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, |
| 47319 | /* 603 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47320 | /* 611 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47321 | /* 619 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47322 | /* 623 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47323 | /* 631 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47324 | /* 635 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47325 | /* 643 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47326 | /* 647 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47327 | /* 655 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47328 | /* 659 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47329 | /* 667 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47330 | /* 671 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47331 | /* 679 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47332 | /* 683 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47333 | /* 691 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47334 | /* 695 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47335 | /* 703 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47336 | /* 707 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47337 | /* 714 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47338 | /* 721 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47339 | /* 729 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47340 | /* 732 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47341 | /* 736 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47342 | /* 743 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47343 | /* 750 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47344 | /* 758 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47345 | /* 761 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47346 | /* 765 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47347 | /* 772 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47348 | /* 779 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47349 | /* 787 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47350 | /* 790 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47351 | /* 794 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47352 | /* 802 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47353 | /* 806 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47354 | /* 814 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47355 | /* 818 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47356 | /* 826 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47357 | /* 830 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47358 | /* 833 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47359 | /* 836 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47360 | /* 839 */ { X86::FR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47361 | /* 843 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47362 | /* 847 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47363 | /* 851 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47364 | /* 855 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47365 | /* 859 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47366 | /* 863 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47367 | /* 867 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47368 | /* 871 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47369 | /* 875 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47370 | /* 879 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47371 | /* 883 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47372 | /* 887 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47373 | /* 891 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47374 | /* 895 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47375 | /* 899 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47376 | /* 903 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47377 | /* 907 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47378 | /* 911 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47379 | /* 915 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47380 | /* 919 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47381 | /* 923 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47382 | /* 927 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47383 | /* 931 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47384 | /* 935 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47385 | /* 939 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47386 | /* 941 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47387 | /* 947 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47388 | /* 949 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47389 | /* 958 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47390 | /* 967 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47391 | /* 970 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47392 | /* 978 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47393 | /* 982 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47394 | /* 990 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47395 | /* 994 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47396 | /* 1000 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47397 | /* 1002 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47398 | /* 1008 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47399 | /* 1010 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47400 | /* 1013 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47401 | /* 1016 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47402 | /* 1019 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47403 | /* 1021 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47404 | /* 1023 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47405 | /* 1025 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47406 | /* 1027 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47407 | /* 1029 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47408 | /* 1031 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47409 | /* 1034 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47410 | /* 1036 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47411 | /* 1038 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47412 | /* 1041 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47413 | /* 1043 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47414 | /* 1045 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47415 | /* 1047 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47416 | /* 1049 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 47417 | /* 1051 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47418 | /* 1052 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47419 | /* 1059 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47420 | /* 1062 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47421 | /* 1066 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47422 | /* 1072 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47423 | /* 1078 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47424 | /* 1084 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47425 | /* 1090 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47426 | /* 1096 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47427 | /* 1102 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
| 47428 | /* 1103 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47429 | /* 1108 */ { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47430 | /* 1110 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47431 | /* 1113 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47432 | /* 1116 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47433 | /* 1119 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47434 | /* 1122 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47435 | /* 1124 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47436 | /* 1130 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47437 | /* 1132 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47438 | /* 1138 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47439 | /* 1140 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47440 | /* 1142 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47441 | /* 1148 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47442 | /* 1150 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47443 | /* 1156 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47444 | /* 1158 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47445 | /* 1160 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47446 | /* 1166 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47447 | /* 1168 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47448 | /* 1174 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47449 | /* 1176 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47450 | /* 1178 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47451 | /* 1184 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47452 | /* 1186 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47453 | /* 1192 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47454 | /* 1194 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47455 | /* 1197 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47456 | /* 1200 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47457 | /* 1203 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47458 | /* 1206 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47459 | /* 1209 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47460 | /* 1212 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47461 | /* 1215 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47462 | /* 1217 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47463 | /* 1219 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47464 | /* 1220 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47465 | /* 1221 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47466 | /* 1222 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::GR64_NOSPRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47467 | /* 1228 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::GR64_NOSPRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47468 | /* 1234 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::GR64_NOSPRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47469 | /* 1240 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::GR64_NOSPRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 47470 | /* 1246 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47471 | /* 1248 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47472 | /* 1251 */ { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47473 | /* 1257 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47474 | /* 1263 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47475 | /* 1269 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47476 | /* 1271 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47477 | /* 1273 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47478 | /* 1276 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47479 | /* 1278 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47480 | /* 1284 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47481 | /* 1286 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47482 | /* 1288 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47483 | /* 1290 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47484 | /* 1292 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47485 | /* 1294 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47486 | /* 1296 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47487 | /* 1303 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47488 | /* 1306 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47489 | /* 1314 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47490 | /* 1318 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47491 | /* 1321 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47492 | /* 1325 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47493 | /* 1332 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47494 | /* 1335 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47495 | /* 1338 */ { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47496 | /* 1340 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47497 | /* 1346 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47498 | /* 1348 */ { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47499 | /* 1354 */ { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47500 | /* 1356 */ { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47501 | /* 1358 */ { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47502 | /* 1360 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47503 | /* 1362 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47504 | /* 1364 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47505 | /* 1366 */ { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47506 | /* 1368 */ { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47507 | /* 1370 */ { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47508 | /* 1372 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47509 | /* 1374 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47510 | /* 1376 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47511 | /* 1378 */ { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47512 | /* 1380 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47513 | /* 1382 */ { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47514 | /* 1388 */ { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47515 | /* 1394 */ { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47516 | /* 1396 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47517 | /* 1402 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47518 | /* 1404 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47519 | /* 1410 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47520 | /* 1416 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47521 | /* 1418 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47522 | /* 1420 */ { X86::GR32_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47523 | /* 1426 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47524 | /* 1428 */ { X86::GR32_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47525 | /* 1430 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47526 | /* 1432 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47527 | /* 1434 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47528 | /* 1437 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47529 | /* 1441 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47530 | /* 1445 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47531 | /* 1448 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47532 | /* 1452 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47533 | /* 1455 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47534 | /* 1460 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47535 | /* 1463 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47536 | /* 1468 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47537 | /* 1475 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47538 | /* 1478 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47539 | /* 1485 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47540 | /* 1488 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47541 | /* 1494 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 47542 | /* 1496 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47543 | /* 1503 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47544 | /* 1511 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47545 | /* 1515 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47546 | /* 1522 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47547 | /* 1530 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47548 | /* 1534 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47549 | /* 1541 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47550 | /* 1549 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47551 | /* 1553 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47552 | /* 1557 */ { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47553 | /* 1559 */ { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47554 | /* 1564 */ { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
| 47555 | /* 1565 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47556 | /* 1569 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47557 | /* 1571 */ { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47558 | /* 1574 */ { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47559 | /* 1580 */ { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47560 | /* 1582 */ { X86::GR64_ARegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47561 | /* 1584 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47562 | /* 1587 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47563 | /* 1590 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47564 | /* 1596 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47565 | /* 1602 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47566 | /* 1603 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47567 | /* 1611 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47568 | /* 1620 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47569 | /* 1628 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47570 | /* 1637 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47571 | /* 1646 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47572 | /* 1655 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47573 | /* 1662 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47574 | /* 1671 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47575 | /* 1679 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47576 | /* 1682 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47577 | /* 1687 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47578 | /* 1691 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47579 | /* 1698 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47580 | /* 1707 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47581 | /* 1715 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47582 | /* 1718 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47583 | /* 1723 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47584 | /* 1727 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47585 | /* 1734 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47586 | /* 1743 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47587 | /* 1751 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47588 | /* 1754 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47589 | /* 1759 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47590 | /* 1763 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47591 | /* 1770 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47592 | /* 1773 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47593 | /* 1782 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47594 | /* 1790 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47595 | /* 1795 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47596 | /* 1799 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47597 | /* 1808 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47598 | /* 1816 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47599 | /* 1821 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47600 | /* 1825 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47601 | /* 1834 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47602 | /* 1842 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47603 | /* 1846 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47604 | /* 1852 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47605 | /* 1857 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47606 | /* 1862 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47607 | /* 1866 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47608 | /* 1873 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47609 | /* 1876 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47610 | /* 1882 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47611 | /* 1887 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47612 | /* 1896 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47613 | /* 1904 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47614 | /* 1909 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47615 | /* 1913 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47616 | /* 1922 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47617 | /* 1930 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47618 | /* 1935 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47619 | /* 1939 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47620 | /* 1947 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47621 | /* 1953 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47622 | /* 1958 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47623 | /* 1963 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47624 | /* 1967 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47625 | /* 1974 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47626 | /* 1982 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47627 | /* 1985 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47628 | /* 1989 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47629 | /* 1995 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47630 | /* 2000 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47631 | /* 2005 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47632 | /* 2009 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47633 | /* 2016 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47634 | /* 2019 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47635 | /* 2026 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47636 | /* 2029 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47637 | /* 2036 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47638 | /* 2039 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47639 | /* 2046 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47640 | /* 2049 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47641 | /* 2057 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47642 | /* 2067 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47643 | /* 2076 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47644 | /* 2082 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47645 | /* 2087 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47646 | /* 2095 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47647 | /* 2105 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47648 | /* 2114 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47649 | /* 2120 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47650 | /* 2125 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47651 | /* 2133 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47652 | /* 2143 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47653 | /* 2152 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47654 | /* 2158 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47655 | /* 2163 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47656 | /* 2173 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47657 | /* 2182 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47658 | /* 2188 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47659 | /* 2193 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47660 | /* 2203 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47661 | /* 2212 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47662 | /* 2218 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47663 | /* 2223 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47664 | /* 2233 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47665 | /* 2242 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47666 | /* 2248 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47667 | /* 2253 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47668 | /* 2259 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47669 | /* 2267 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47670 | /* 2275 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47671 | /* 2283 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47672 | /* 2287 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47673 | /* 2295 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47674 | /* 2299 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47675 | /* 2307 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47676 | /* 2314 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47677 | /* 2316 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47678 | /* 2320 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47679 | /* 2323 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47680 | /* 2329 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47681 | /* 2337 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47682 | /* 2344 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47683 | /* 2346 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47684 | /* 2350 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47685 | /* 2353 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47686 | /* 2361 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47687 | /* 2368 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47688 | /* 2376 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47689 | /* 2383 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47690 | /* 2391 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47691 | /* 2398 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47692 | /* 2400 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47693 | /* 2404 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47694 | /* 2407 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47695 | /* 2409 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47696 | /* 2413 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47697 | /* 2416 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47698 | /* 2420 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47699 | /* 2423 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47700 | /* 2431 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47701 | /* 2440 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47702 | /* 2444 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47703 | /* 2449 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47704 | /* 2457 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47705 | /* 2466 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47706 | /* 2470 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47707 | /* 2475 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47708 | /* 2483 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47709 | /* 2492 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47710 | /* 2496 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47711 | /* 2501 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47712 | /* 2509 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47713 | /* 2518 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47714 | /* 2522 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47715 | /* 2527 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47716 | /* 2535 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47717 | /* 2544 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47718 | /* 2548 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47719 | /* 2553 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47720 | /* 2561 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47721 | /* 2570 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47722 | /* 2574 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47723 | /* 2579 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47724 | /* 2587 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47725 | /* 2596 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47726 | /* 2600 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47727 | /* 2605 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47728 | /* 2613 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47729 | /* 2622 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47730 | /* 2626 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47731 | /* 2631 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47732 | /* 2639 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47733 | /* 2648 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47734 | /* 2652 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47735 | /* 2657 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47736 | /* 2665 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47737 | /* 2673 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47738 | /* 2682 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47739 | /* 2686 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47740 | /* 2690 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47741 | /* 2695 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47742 | /* 2703 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47743 | /* 2711 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47744 | /* 2715 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47745 | /* 2723 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47746 | /* 2727 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47747 | /* 2735 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47748 | /* 2741 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47749 | /* 2743 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47750 | /* 2749 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47751 | /* 2751 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47752 | /* 2757 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47753 | /* 2759 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47754 | /* 2766 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47755 | /* 2770 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47756 | /* 2773 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47757 | /* 2780 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47758 | /* 2782 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47759 | /* 2786 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47760 | /* 2789 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47761 | /* 2795 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47762 | /* 2802 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47763 | /* 2804 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47764 | /* 2808 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47765 | /* 2811 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47766 | /* 2818 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47767 | /* 2825 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47768 | /* 2829 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47769 | /* 2832 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47770 | /* 2839 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47771 | /* 2843 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47772 | /* 2846 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47773 | /* 2855 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47774 | /* 2863 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47775 | /* 2868 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47776 | /* 2872 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47777 | /* 2881 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47778 | /* 2889 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47779 | /* 2894 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47780 | /* 2898 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47781 | /* 2907 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47782 | /* 2915 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47783 | /* 2920 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47784 | /* 2924 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47785 | /* 2932 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47786 | /* 2939 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47787 | /* 2943 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47788 | /* 2946 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47789 | /* 2954 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47790 | /* 2961 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47791 | /* 2965 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47792 | /* 2968 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47793 | /* 2976 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47794 | /* 2983 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47795 | /* 2987 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47796 | /* 2990 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47797 | /* 2997 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47798 | /* 3006 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47799 | /* 3014 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47800 | /* 3017 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47801 | /* 3022 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47802 | /* 3026 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47803 | /* 3033 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47804 | /* 3042 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47805 | /* 3050 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47806 | /* 3053 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47807 | /* 3058 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47808 | /* 3062 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47809 | /* 3070 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47810 | /* 3077 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47811 | /* 3079 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47812 | /* 3083 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47813 | /* 3086 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47814 | /* 3088 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47815 | /* 3092 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47816 | /* 3095 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47817 | /* 3097 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47818 | /* 3100 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47819 | /* 3105 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47820 | /* 3109 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47821 | /* 3113 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47822 | /* 3116 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47823 | /* 3118 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47824 | /* 3121 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47825 | /* 3126 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47826 | /* 3130 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47827 | /* 3134 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47828 | /* 3137 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47829 | /* 3141 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47830 | /* 3144 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47831 | /* 3146 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47832 | /* 3150 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47833 | /* 3153 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47834 | /* 3158 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47835 | /* 3162 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47836 | /* 3166 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47837 | /* 3169 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47838 | /* 3171 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47839 | /* 3174 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47840 | /* 3179 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47841 | /* 3183 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47842 | /* 3187 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47843 | /* 3190 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47844 | /* 3195 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47845 | /* 3199 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47846 | /* 3207 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47847 | /* 3214 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47848 | /* 3218 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47849 | /* 3221 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47850 | /* 3229 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47851 | /* 3236 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47852 | /* 3240 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47853 | /* 3243 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47854 | /* 3246 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47855 | /* 3251 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47856 | /* 3255 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47857 | /* 3259 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47858 | /* 3262 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47859 | /* 3267 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47860 | /* 3271 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47861 | /* 3274 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47862 | /* 3279 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47863 | /* 3283 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47864 | /* 3290 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47865 | /* 3293 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47866 | /* 3300 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47867 | /* 3308 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47868 | /* 3311 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47869 | /* 3316 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47870 | /* 3320 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47871 | /* 3327 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47872 | /* 3335 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47873 | /* 3338 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47874 | /* 3343 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47875 | /* 3347 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47876 | /* 3354 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47877 | /* 3362 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47878 | /* 3365 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47879 | /* 3370 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47880 | /* 3374 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47881 | /* 3379 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47882 | /* 3383 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47883 | /* 3386 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47884 | /* 3388 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47885 | /* 3390 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47886 | /* 3393 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47887 | /* 3395 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47888 | /* 3397 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47889 | /* 3400 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47890 | /* 3403 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47891 | /* 3406 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47892 | /* 3409 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47893 | /* 3412 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47894 | /* 3415 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47895 | /* 3418 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47896 | /* 3421 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47897 | /* 3424 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47898 | /* 3427 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47899 | /* 3431 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47900 | /* 3434 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47901 | /* 3437 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47902 | /* 3440 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47903 | /* 3443 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47904 | /* 3447 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47905 | /* 3450 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47906 | /* 3453 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47907 | /* 3456 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47908 | /* 3459 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47909 | /* 3462 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47910 | /* 3465 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47911 | /* 3468 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47912 | /* 3471 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47913 | /* 3473 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47914 | /* 3475 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47915 | /* 3477 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47916 | /* 3479 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47917 | /* 3489 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47918 | /* 3498 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47919 | /* 3504 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47920 | /* 3509 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47921 | /* 3519 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47922 | /* 3528 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47923 | /* 3534 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47924 | /* 3539 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47925 | /* 3549 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47926 | /* 3558 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47927 | /* 3564 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47928 | /* 3569 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47929 | /* 3573 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47930 | /* 3581 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47931 | /* 3585 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47932 | /* 3589 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47933 | /* 3597 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47934 | /* 3602 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47935 | /* 3606 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47936 | /* 3614 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47937 | /* 3617 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47938 | /* 3622 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47939 | /* 3626 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47940 | /* 3634 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47941 | /* 3639 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47942 | /* 3643 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47943 | /* 3651 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47944 | /* 3656 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47945 | /* 3660 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47946 | /* 3668 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47947 | /* 3673 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47948 | /* 3677 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47949 | /* 3682 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47950 | /* 3686 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47951 | /* 3689 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47952 | /* 3697 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47953 | /* 3706 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47954 | /* 3710 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47955 | /* 3715 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47956 | /* 3723 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47957 | /* 3732 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47958 | /* 3736 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47959 | /* 3741 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47960 | /* 3749 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47961 | /* 3758 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47962 | /* 3762 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47963 | /* 3767 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47964 | /* 3773 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47965 | /* 3778 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47966 | /* 3787 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47967 | /* 3792 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47968 | /* 3798 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47969 | /* 3803 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47970 | /* 3810 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47971 | /* 3818 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47972 | /* 3821 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47973 | /* 3825 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47974 | /* 3832 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47975 | /* 3840 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47976 | /* 3843 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47977 | /* 3847 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47978 | /* 3854 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47979 | /* 3862 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47980 | /* 3865 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47981 | /* 3869 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47982 | /* 3874 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47983 | /* 3878 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47984 | /* 3886 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47985 | /* 3890 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47986 | /* 3895 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47987 | /* 3899 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47988 | /* 3908 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47989 | /* 3913 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47990 | /* 3922 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47991 | /* 3927 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47992 | /* 3936 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47993 | /* 3941 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47994 | /* 3951 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 47995 | /* 3957 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47996 | /* 3965 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 47997 | /* 3969 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 47998 | /* 3974 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 47999 | /* 3982 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48000 | /* 3986 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48001 | /* 3994 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48002 | /* 3998 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 48003 | /* 4003 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 48004 | /* 4008 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48005 | /* 4016 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48006 | /* 4020 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48007 | /* 4028 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48008 | /* 4032 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 48009 | /* 4037 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48010 | /* 4045 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48011 | /* 4049 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 48012 | /* 4054 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48013 | /* 4062 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48014 | /* 4066 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48015 | /* 4074 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48016 | /* 4082 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48017 | /* 4090 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48018 | /* 4098 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48019 | /* 4102 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48020 | /* 4110 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48021 | /* 4118 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48022 | /* 4122 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48023 | /* 4129 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48024 | /* 4137 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48025 | /* 4140 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48026 | /* 4144 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48027 | /* 4151 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48028 | /* 4159 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48029 | /* 4162 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48030 | /* 4166 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48031 | /* 4173 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48032 | /* 4181 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48033 | /* 4184 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48034 | /* 4188 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48035 | /* 4195 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48036 | /* 4203 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48037 | /* 4206 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48038 | /* 4210 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48039 | /* 4217 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48040 | /* 4225 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48041 | /* 4228 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48042 | /* 4232 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48043 | /* 4235 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48044 | /* 4239 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48045 | /* 4242 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48046 | /* 4246 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48047 | /* 4249 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48048 | /* 4253 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48049 | /* 4256 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48050 | /* 4260 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48051 | /* 4267 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48052 | /* 4275 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48053 | /* 4278 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48054 | /* 4282 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 48055 | /* 4291 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48056 | /* 4300 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48057 | /* 4309 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48058 | /* 4318 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 48059 | /* 4327 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 48060 | /* 4336 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48061 | /* 4345 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48062 | /* 4354 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48063 | /* 4363 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48064 | /* 4369 */ { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48065 | /* 4375 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48066 | /* 4381 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48067 | /* 4390 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48068 | /* 4399 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 48069 | /* 4408 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48070 | /* 4417 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48071 | /* 4426 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48072 | /* 4433 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48073 | /* 4442 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48074 | /* 4450 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48075 | /* 4455 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48076 | /* 4459 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48077 | /* 4466 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48078 | /* 4475 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48079 | /* 4483 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48080 | /* 4486 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48081 | /* 4491 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48082 | /* 4495 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48083 | /* 4502 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48084 | /* 4511 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48085 | /* 4519 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48086 | /* 4522 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48087 | /* 4527 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48088 | /* 4531 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48089 | /* 4540 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48090 | /* 4548 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48091 | /* 4553 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48092 | /* 4557 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48093 | /* 4566 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48094 | /* 4574 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48095 | /* 4579 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48096 | /* 4583 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48097 | /* 4592 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48098 | /* 4600 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48099 | /* 4605 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48100 | /* 4609 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48101 | /* 4618 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48102 | /* 4626 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48103 | /* 4635 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48104 | /* 4643 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48105 | /* 4648 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48106 | /* 4652 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48107 | /* 4661 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48108 | /* 4669 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48109 | /* 4674 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48110 | /* 4678 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48111 | /* 4687 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48112 | /* 4692 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48113 | /* 4702 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48114 | /* 4711 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48115 | /* 4717 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48116 | /* 4722 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48117 | /* 4732 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48118 | /* 4741 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48119 | /* 4747 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48120 | /* 4752 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48121 | /* 4762 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48122 | /* 4771 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48123 | /* 4777 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48124 | /* 4782 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48125 | /* 4786 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48126 | /* 4790 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48127 | /* 4796 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48128 | /* 4801 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48129 | /* 4805 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48130 | /* 4811 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48131 | /* 4816 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48132 | /* 4820 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48133 | /* 4826 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48134 | /* 4831 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48135 | /* 4837 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48136 | /* 4842 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48137 | /* 4848 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48138 | /* 4853 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48139 | /* 4859 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48140 | /* 4864 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48141 | /* 4871 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48142 | /* 4878 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48143 | /* 4886 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48144 | /* 4894 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48145 | /* 4902 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48146 | /* 4904 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48147 | /* 4906 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48148 | /* 4912 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48149 | /* 4914 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48150 | /* 4916 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48151 | /* 4923 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48152 | /* 4930 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48153 | /* 4937 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48154 | /* 4944 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48155 | /* 4948 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48156 | /* 4951 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48157 | /* 4958 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48158 | /* 4962 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48159 | /* 4965 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48160 | /* 4972 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48161 | /* 4980 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48162 | /* 4987 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48163 | /* 4991 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48164 | /* 4994 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48165 | /* 4996 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48166 | /* 5002 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48167 | /* 5009 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48168 | /* 5017 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48169 | /* 5024 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48170 | /* 5030 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48171 | /* 5036 */ { X86::VK4PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48172 | /* 5043 */ { X86::VK4PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48173 | /* 5046 */ { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48174 | /* 5053 */ { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48175 | /* 5056 */ { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48176 | /* 5063 */ { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48177 | /* 5066 */ { X86::VK2PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48178 | /* 5073 */ { X86::VK2PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48179 | /* 5076 */ { X86::VK4PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48180 | /* 5083 */ { X86::VK4PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48181 | /* 5086 */ { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48182 | /* 5093 */ { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48183 | /* 5096 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48184 | /* 5100 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48185 | /* 5103 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48186 | /* 5107 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48187 | /* 5110 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48188 | /* 5114 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48189 | /* 5117 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48190 | /* 5119 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48191 | /* 5123 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48192 | /* 5126 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48193 | /* 5128 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48194 | /* 5132 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48195 | /* 5135 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48196 | /* 5139 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48197 | /* 5142 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48198 | /* 5146 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48199 | /* 5149 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48200 | /* 5153 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48201 | /* 5156 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48202 | /* 5158 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48203 | /* 5160 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48204 | /* 5162 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48205 | /* 5164 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48206 | /* 5166 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48207 | /* 5168 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48208 | /* 5172 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48209 | /* 5175 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48210 | /* 5177 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48211 | /* 5181 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48212 | /* 5184 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48213 | /* 5186 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48214 | /* 5190 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48215 | /* 5193 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48216 | /* 5197 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48217 | /* 5200 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48218 | /* 5204 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48219 | /* 5207 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48220 | /* 5211 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48221 | /* 5214 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48222 | /* 5218 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48223 | /* 5221 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48224 | /* 5229 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48225 | /* 5238 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48226 | /* 5242 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48227 | /* 5247 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48228 | /* 5255 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48229 | /* 5264 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48230 | /* 5268 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48231 | /* 5273 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48232 | /* 5281 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48233 | /* 5290 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48234 | /* 5294 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48235 | /* 5299 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48236 | /* 5306 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48237 | /* 5314 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48238 | /* 5317 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48239 | /* 5321 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48240 | /* 5328 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48241 | /* 5336 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48242 | /* 5339 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48243 | /* 5343 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48244 | /* 5350 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48245 | /* 5358 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48246 | /* 5361 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48247 | /* 5365 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48248 | /* 5372 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48249 | /* 5380 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48250 | /* 5383 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48251 | /* 5387 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48252 | /* 5394 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48253 | /* 5402 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48254 | /* 5405 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48255 | /* 5409 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48256 | /* 5416 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48257 | /* 5424 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48258 | /* 5427 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48259 | /* 5431 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48260 | /* 5438 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48261 | /* 5446 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48262 | /* 5449 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48263 | /* 5453 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48264 | /* 5460 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48265 | /* 5468 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48266 | /* 5471 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48267 | /* 5475 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48268 | /* 5482 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48269 | /* 5490 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48270 | /* 5493 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48271 | /* 5497 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48272 | /* 5504 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48273 | /* 5512 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48274 | /* 5515 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48275 | /* 5519 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48276 | /* 5526 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48277 | /* 5534 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48278 | /* 5537 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48279 | /* 5541 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48280 | /* 5548 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 48281 | /* 5556 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48282 | /* 5559 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48283 | /* 5563 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48284 | /* 5572 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48285 | /* 5581 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48286 | /* 5586 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48287 | /* 5595 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48288 | /* 5604 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48289 | /* 5609 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48290 | /* 5616 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48291 | /* 5619 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48292 | /* 5622 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48293 | /* 5626 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48294 | /* 5630 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48295 | /* 5634 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48296 | /* 5638 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48297 | /* 5640 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48298 | /* 5642 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48299 | /* 5644 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48300 | /* 5646 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48301 | /* 5648 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48302 | /* 5650 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48303 | /* 5654 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48304 | /* 5657 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48305 | /* 5659 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48306 | /* 5661 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48307 | /* 5663 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48308 | /* 5665 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48309 | /* 5667 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48310 | /* 5669 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48311 | /* 5671 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48312 | /* 5673 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48313 | /* 5675 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48314 | /* 5677 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48315 | /* 5679 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48316 | /* 5681 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48317 | /* 5688 */ { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48318 | /* 5696 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48319 | /* 5704 */ { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48320 | /* 5712 */ { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48321 | /* 5720 */ { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48322 | /* 5728 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48323 | /* 5736 */ { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48324 | /* 5744 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48325 | /* 5752 */ { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48326 | /* 5760 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48327 | /* 5768 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48328 | /* 5771 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48329 | /* 5774 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48330 | /* 5779 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48331 | /* 5783 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48332 | /* 5786 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48333 | /* 5791 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48334 | /* 5795 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48335 | /* 5800 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48336 | /* 5804 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48337 | /* 5809 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48338 | /* 5813 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48339 | /* 5818 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48340 | /* 5822 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48341 | /* 5827 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48342 | /* 5831 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48343 | /* 5834 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48344 | /* 5837 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48345 | /* 5841 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48346 | /* 5850 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 48347 | /* 5855 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 48348 | /* 5859 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 48349 | /* 5863 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 48350 | /* 5867 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 48351 | /* 5871 */ { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 48352 | }, { |
| 48353 | /* 0 */ |
| 48354 | /* 0 */ X86::EFLAGS, |
| 48355 | /* 1 */ X86::RSP, X86::SSP, |
| 48356 | /* 3 */ X86::RAX, X86::RCX, X86::RDX, X86::RAX, X86::RDX, X86::EFLAGS, |
| 48357 | /* 9 */ X86::RAX, X86::RCX, X86::RDX, X86::RAX, X86::RDX, X86::RBX, X86::EFLAGS, |
| 48358 | /* 16 */ X86::ECX, X86::EAX, X86::EBX, |
| 48359 | /* 19 */ X86::TMM0, X86::TMM1, X86::TMM2, X86::TMM3, X86::TMM4, X86::TMM5, X86::TMM6, X86::TMM7, |
| 48360 | /* 27 */ X86::ESP, X86::ESP, |
| 48361 | /* 29 */ X86::RSP, X86::ESP, |
| 48362 | /* 31 */ X86::EFLAGS, X86::EFLAGS, |
| 48363 | /* 33 */ X86::ESP, X86::ESP, X86::EFLAGS, X86::DF, |
| 48364 | /* 37 */ X86::RSP, X86::RSP, X86::EFLAGS, X86::DF, |
| 48365 | /* 41 */ X86::EAX, |
| 48366 | /* 42 */ X86::AL, X86::EFLAGS, X86::AX, X86::EFLAGS, |
| 48367 | /* 46 */ X86::AX, X86::AX, X86::EFLAGS, |
| 48368 | /* 49 */ X86::AL, X86::AX, X86::EFLAGS, |
| 48369 | /* 52 */ X86::FPSW, |
| 48370 | /* 53 */ X86::AX, X86::EFLAGS, X86::AX, X86::EFLAGS, |
| 48371 | /* 57 */ X86::EAX, X86::EFLAGS, X86::EAX, X86::EFLAGS, |
| 48372 | /* 61 */ X86::RAX, X86::EFLAGS, X86::RAX, X86::EFLAGS, |
| 48373 | /* 65 */ X86::AL, X86::EFLAGS, X86::AL, X86::EFLAGS, |
| 48374 | /* 69 */ X86::EAX, X86::EAX, X86::EFLAGS, |
| 48375 | /* 72 */ X86::RAX, X86::RAX, X86::EFLAGS, |
| 48376 | /* 75 */ X86::AL, X86::AL, X86::EFLAGS, |
| 48377 | /* 78 */ X86::MXCSR, |
| 48378 | /* 79 */ X86::FPCW, X86::FPSW, |
| 48379 | /* 81 */ X86::ESP, X86::SSP, X86::ESP, X86::EFLAGS, X86::SSP, |
| 48380 | /* 86 */ X86::RSP, X86::SSP, X86::RSP, X86::EFLAGS, X86::SSP, |
| 48381 | /* 91 */ X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::EFLAGS, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, |
| 48382 | /* 108 */ X86::R10, X86::R11, X86::EFLAGS, |
| 48383 | /* 111 */ X86::XMM0, |
| 48384 | /* 112 */ X86::ESP, X86::SSP, |
| 48385 | /* 114 */ X86::AL, X86::AX, |
| 48386 | /* 116 */ X86::EAX, X86::EAX, X86::EDX, |
| 48387 | /* 119 */ X86::EAX, X86::RAX, |
| 48388 | /* 121 */ X86::DF, |
| 48389 | /* 122 */ X86::SSP, |
| 48390 | /* 123 */ X86::RAX, |
| 48391 | /* 124 */ X86::EFLAGS, X86::FPSW, |
| 48392 | /* 126 */ X86::AX, X86::EFLAGS, |
| 48393 | /* 128 */ X86::EAX, X86::EFLAGS, |
| 48394 | /* 130 */ X86::RAX, X86::EFLAGS, |
| 48395 | /* 132 */ X86::AL, X86::EFLAGS, |
| 48396 | /* 134 */ X86::EDI, X86::ESI, X86::DF, X86::EDI, X86::ESI, X86::EFLAGS, |
| 48397 | /* 140 */ X86::RAX, X86::RBX, X86::RCX, X86::RDX, X86::RAX, X86::RDX, X86::EFLAGS, |
| 48398 | /* 147 */ X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EAX, X86::EDX, X86::EFLAGS, |
| 48399 | /* 154 */ X86::MXCSR, X86::EFLAGS, |
| 48400 | /* 156 */ X86::ST0, X86::FPCW, X86::EFLAGS, X86::FPSW, |
| 48401 | /* 160 */ X86::FPCW, X86::EFLAGS, X86::FPSW, |
| 48402 | /* 163 */ X86::EAX, X86::ECX, X86::EAX, X86::EBX, X86::ECX, X86::EDX, |
| 48403 | /* 169 */ X86::RAX, X86::RAX, X86::RDX, |
| 48404 | /* 172 */ X86::AX, X86::AX, X86::DX, |
| 48405 | /* 175 */ X86::AX, X86::EAX, |
| 48406 | /* 177 */ X86::AX, X86::DX, X86::AX, X86::DX, X86::EFLAGS, |
| 48407 | /* 182 */ X86::AX, X86::DX, X86::AX, X86::DX, |
| 48408 | /* 186 */ X86::EAX, X86::EDX, X86::EAX, X86::EDX, X86::EFLAGS, |
| 48409 | /* 191 */ X86::EAX, X86::EDX, X86::EAX, X86::EDX, |
| 48410 | /* 195 */ X86::RAX, X86::RDX, X86::RAX, X86::RDX, X86::EFLAGS, |
| 48411 | /* 200 */ X86::RAX, X86::RDX, X86::RAX, X86::RDX, |
| 48412 | /* 204 */ X86::AX, X86::AL, X86::AH, X86::EFLAGS, |
| 48413 | /* 208 */ X86::AX, X86::AL, X86::AH, |
| 48414 | /* 211 */ X86::ESP, X86::EAX, X86::ESP, X86::EFLAGS, |
| 48415 | /* 215 */ X86::RSP, X86::RAX, X86::RSP, X86::EFLAGS, |
| 48416 | /* 219 */ X86::XMM0, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM4, X86::XMM5, X86::XMM6, X86::EFLAGS, |
| 48417 | /* 227 */ X86::XMM0, X86::XMM1, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::EFLAGS, |
| 48418 | /* 237 */ X86::RSP, X86::EFLAGS, |
| 48419 | /* 239 */ X86::FPSW, X86::FPCW, |
| 48420 | /* 241 */ X86::FPSW, X86::AX, X86::FPSW, |
| 48421 | /* 244 */ X86::FPSW, X86::FPSW, |
| 48422 | /* 246 */ X86::FPSW, X86::FPCW, X86::FPSW, X86::FPCW, |
| 48423 | /* 250 */ X86::RAX, X86::RBX, X86::RCX, X86::RDX, X86::RAX, X86::RBX, X86::RCX, |
| 48424 | /* 257 */ X86::AX, X86::AX, X86::DX, X86::EFLAGS, |
| 48425 | /* 261 */ X86::EAX, X86::EAX, X86::EDX, X86::EFLAGS, |
| 48426 | /* 265 */ X86::RAX, X86::RAX, X86::RDX, X86::EFLAGS, |
| 48427 | /* 269 */ X86::AL, X86::AL, X86::EFLAGS, X86::AX, |
| 48428 | /* 273 */ X86::AL, X86::AL, X86::AX, |
| 48429 | /* 276 */ X86::AX, |
| 48430 | /* 277 */ X86::DX, X86::AX, |
| 48431 | /* 279 */ X86::DX, X86::EAX, |
| 48432 | /* 281 */ X86::AL, |
| 48433 | /* 282 */ X86::DX, X86::AL, |
| 48434 | /* 284 */ X86::SSP, X86::SSP, |
| 48435 | /* 286 */ X86::DX, X86::EDI, X86::DF, X86::EDI, |
| 48436 | /* 290 */ X86::EAX, X86::ECX, |
| 48437 | /* 292 */ X86::RAX, X86::ECX, |
| 48438 | /* 294 */ X86::EAX, X86::EDX, |
| 48439 | /* 296 */ X86::RAX, X86::EDX, |
| 48440 | /* 298 */ X86::CX, |
| 48441 | /* 299 */ X86::ECX, |
| 48442 | /* 300 */ X86::RCX, |
| 48443 | /* 301 */ X86::EFLAGS, X86::AH, |
| 48444 | /* 303 */ X86::EBP, X86::ESP, X86::EBP, X86::ESP, |
| 48445 | /* 307 */ X86::RBP, X86::RSP, X86::RBP, X86::RSP, |
| 48446 | /* 311 */ X86::XMM0, X86::EAX, X86::EFLAGS, |
| 48447 | /* 314 */ X86::ESI, X86::DF, X86::AL, X86::ESI, |
| 48448 | /* 318 */ X86::ESI, X86::DF, X86::EAX, X86::ESI, |
| 48449 | /* 322 */ X86::ESI, X86::DF, X86::RAX, X86::ESI, |
| 48450 | /* 326 */ X86::ESI, X86::DF, X86::AX, X86::ESI, |
| 48451 | /* 330 */ X86::EDI, |
| 48452 | /* 331 */ X86::RDI, |
| 48453 | /* 332 */ X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, |
| 48454 | /* 348 */ X86::EAX, X86::ECX, X86::EDX, |
| 48455 | /* 351 */ X86::RAX, X86::ECX, X86::EDX, |
| 48456 | /* 354 */ X86::RAX, X86::RSI, X86::RAX, X86::RDX, X86::RSI, |
| 48457 | /* 359 */ X86::EDI, X86::ESI, X86::DF, X86::EDI, X86::ESI, |
| 48458 | /* 364 */ X86::EDX, |
| 48459 | /* 365 */ X86::RDX, |
| 48460 | /* 366 */ X86::ECX, X86::EAX, |
| 48461 | /* 368 */ X86::DX, X86::ESI, X86::DF, X86::ESI, |
| 48462 | /* 372 */ X86::RBX, X86::RCX, X86::RAX, X86::EFLAGS, |
| 48463 | /* 376 */ X86::EAX, X86::EDX, X86::ECX, X86::EFLAGS, |
| 48464 | /* 380 */ X86::EAX, X86::EDX, X86::XMM0, X86::EFLAGS, |
| 48465 | /* 384 */ X86::ECX, X86::EFLAGS, |
| 48466 | /* 386 */ X86::XMM0, X86::EFLAGS, |
| 48467 | /* 388 */ X86::RAX, X86::RBX, X86::RCX, X86::RDX, X86::RAX, X86::RBX, X86::RCX, X86::RDX, X86::EFLAGS, |
| 48468 | /* 397 */ X86::RSP, X86::RSP, |
| 48469 | /* 399 */ X86::ESP, X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, |
| 48470 | /* 408 */ X86::RAX, X86::EAX, X86::EFLAGS, |
| 48471 | /* 411 */ X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, X86::ESP, |
| 48472 | /* 420 */ X86::ESP, X86::EFLAGS, X86::DF, X86::ESP, |
| 48473 | /* 424 */ X86::RSP, X86::EFLAGS, X86::DF, X86::RSP, |
| 48474 | /* 428 */ X86::EAX, X86::ECX, X86::EDX, X86::EAX, X86::EFLAGS, |
| 48475 | /* 433 */ X86::RAX, X86::RCX, X86::RDX, X86::EAX, X86::EFLAGS, |
| 48476 | /* 438 */ X86::CL, X86::EFLAGS, X86::EFLAGS, |
| 48477 | /* 441 */ X86::ECX, X86::EAX, X86::EDX, |
| 48478 | /* 444 */ X86::RSI, X86::RDI, X86::RCX, |
| 48479 | /* 447 */ X86::ECX, X86::RAX, X86::RDX, |
| 48480 | /* 450 */ X86::RAX, X86::RDX, |
| 48481 | /* 452 */ X86::RAX, X86::RCX, X86::RDX, |
| 48482 | /* 455 */ X86::ECX, X86::DF, X86::ECX, |
| 48483 | /* 458 */ X86::ECX, X86::EDI, X86::ESI, X86::ECX, X86::EDI, X86::ESI, |
| 48484 | /* 464 */ X86::RCX, X86::RDI, X86::RSI, X86::RCX, X86::RDI, X86::RSI, |
| 48485 | /* 470 */ X86::AL, X86::ECX, X86::EDI, X86::ECX, X86::EDI, |
| 48486 | /* 475 */ X86::AL, X86::RCX, X86::RDI, X86::RCX, X86::RDI, |
| 48487 | /* 480 */ X86::EAX, X86::ECX, X86::EDI, X86::ECX, X86::EDI, |
| 48488 | /* 485 */ X86::RAX, X86::RCX, X86::RDI, X86::RCX, X86::RDI, |
| 48489 | /* 490 */ X86::RAX, X86::RCX, X86::RDI, X86::ECX, X86::EDI, |
| 48490 | /* 495 */ X86::AX, X86::ECX, X86::EDI, X86::ECX, X86::EDI, |
| 48491 | /* 500 */ X86::AX, X86::RCX, X86::RDI, X86::RCX, X86::RDI, |
| 48492 | /* 505 */ X86::RAX, X86::RDX, X86::RAX, X86::RCX, X86::RDX, X86::EFLAGS, |
| 48493 | /* 511 */ X86::RAX, X86::RCX, X86::EAX, X86::EFLAGS, |
| 48494 | /* 515 */ X86::CL, X86::EFLAGS, |
| 48495 | /* 517 */ X86::CL, |
| 48496 | /* 518 */ X86::AH, X86::EFLAGS, |
| 48497 | /* 520 */ X86::EFLAGS, X86::AL, |
| 48498 | /* 522 */ X86::AL, X86::EDI, X86::DF, X86::EDI, X86::EFLAGS, |
| 48499 | /* 527 */ X86::EAX, X86::EDI, X86::DF, X86::EDI, X86::EFLAGS, |
| 48500 | /* 532 */ X86::RAX, X86::EDI, X86::DF, X86::EDI, X86::EFLAGS, |
| 48501 | /* 537 */ X86::AX, X86::EDI, X86::DF, X86::EDI, X86::EFLAGS, |
| 48502 | /* 542 */ X86::AL, X86::EDI, X86::DF, X86::EDI, |
| 48503 | /* 546 */ X86::EAX, X86::EDI, X86::DF, X86::EDI, |
| 48504 | /* 550 */ X86::RAX, X86::RDI, X86::DF, X86::RDI, |
| 48505 | /* 554 */ X86::AX, X86::EDI, X86::DF, X86::EDI, |
| 48506 | /* 558 */ X86::RSP, X86::EFLAGS, X86::SSP, |
| 48507 | /* 561 */ X86::ESP, X86::EFLAGS, X86::SSP, |
| 48508 | /* 564 */ X86::ESP, X86::SSP, X86::EAX, X86::ECX, X86::EFLAGS, X86::DF, |
| 48509 | /* 570 */ X86::RSP, X86::SSP, X86::RAX, X86::EFLAGS, X86::DF, |
| 48510 | /* 575 */ X86::ESP, X86::SSP, X86::EAX, X86::ECX, X86::EDX, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, X86::DF, |
| 48511 | /* 622 */ X86::RSP, X86::SSP, X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, X86::DF, |
| 48512 | /* 675 */ X86::RSP, X86::SSP, X86::EAX, X86::EFLAGS, |
| 48513 | /* 679 */ X86::EAX, X86::EDX, X86::EFLAGS, |
| 48514 | /* 682 */ X86::ST0, X86::FPCW, X86::FPSW, |
| 48515 | /* 685 */ X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15, |
| 48516 | /* 701 */ X86::AX, X86::AX, |
| 48517 | /* 703 */ X86::EAX, X86::EAX, |
| 48518 | /* 705 */ X86::RAX, X86::RAX, |
| 48519 | /* 707 */ X86::RBX, X86::RDX, X86::RSI, X86::RDI, X86::RSI, X86::RDI, |
| 48520 | /* 713 */ X86::ECX, X86::EDX, X86::EAX, |
| 48521 | /* 716 */ X86::AL, X86::EBX, X86::AL, |
| 48522 | /* 719 */ X86::EDX, X86::EAX, |
| 48523 | /* 721 */ X86::EDX, X86::EAX, X86::ECX, |
| 48524 | /* 724 */ X86::RAX, X86::RSI, X86::RDI, X86::RAX, X86::RSI, X86::RDI, |
| 48525 | /* 730 */ X86::RDX, X86::RDI, X86::RAX, X86::RDI, |
| 48526 | } |
| 48527 | }; |
| 48528 | |
| 48529 | |
| 48530 | #ifdef __GNUC__ |
| 48531 | #pragma GCC diagnostic push |
| 48532 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
| 48533 | #endif |
| 48534 | extern const char X86InstrNameData[] = { |
| 48535 | /* 0 */ "G_FLOG10\000" |
| 48536 | /* 9 */ "G_FEXP10\000" |
| 48537 | /* 18 */ "MORESTACK_RET_RESTORE_R10\000" |
| 48538 | /* 44 */ "LD_Fp080\000" |
| 48539 | /* 53 */ "LD_Fp180\000" |
| 48540 | /* 62 */ "CMOV_RFP80\000" |
| 48541 | /* 73 */ "SUB_FpI32m80\000" |
| 48542 | /* 86 */ "ADD_FpI32m80\000" |
| 48543 | /* 99 */ "MUL_FpI32m80\000" |
| 48544 | /* 112 */ "SUBR_FpI32m80\000" |
| 48545 | /* 126 */ "DIVR_FpI32m80\000" |
| 48546 | /* 140 */ "DIV_FpI32m80\000" |
| 48547 | /* 153 */ "ILD_Fp32m80\000" |
| 48548 | /* 165 */ "IST_Fp32m80\000" |
| 48549 | /* 177 */ "ISTT_Fp32m80\000" |
| 48550 | /* 190 */ "ILD_Fp64m80\000" |
| 48551 | /* 202 */ "IST_Fp64m80\000" |
| 48552 | /* 214 */ "ISTT_Fp64m80\000" |
| 48553 | /* 227 */ "SUB_FpI16m80\000" |
| 48554 | /* 240 */ "ADD_FpI16m80\000" |
| 48555 | /* 253 */ "MUL_FpI16m80\000" |
| 48556 | /* 266 */ "SUBR_FpI16m80\000" |
| 48557 | /* 280 */ "DIVR_FpI16m80\000" |
| 48558 | /* 294 */ "DIV_FpI16m80\000" |
| 48559 | /* 307 */ "ILD_Fp16m80\000" |
| 48560 | /* 319 */ "IST_Fp16m80\000" |
| 48561 | /* 331 */ "ISTT_Fp16m80\000" |
| 48562 | /* 344 */ "CMOVNB_Fp80\000" |
| 48563 | /* 356 */ "SUB_Fp80\000" |
| 48564 | /* 365 */ "CMOVB_Fp80\000" |
| 48565 | /* 376 */ "ADD_Fp80\000" |
| 48566 | /* 385 */ "CMOVNBE_Fp80\000" |
| 48567 | /* 398 */ "CMOVBE_Fp80\000" |
| 48568 | /* 410 */ "CMOVNE_Fp80\000" |
| 48569 | /* 422 */ "CMOVE_Fp80\000" |
| 48570 | /* 433 */ "MUL_Fp80\000" |
| 48571 | /* 442 */ "XAM_Fp80\000" |
| 48572 | /* 451 */ "CMOVNP_Fp80\000" |
| 48573 | /* 463 */ "CMOVP_Fp80\000" |
| 48574 | /* 474 */ "ABS_Fp80\000" |
| 48575 | /* 483 */ "CHS_Fp80\000" |
| 48576 | /* 492 */ "SQRT_Fp80\000" |
| 48577 | /* 502 */ "TST_Fp80\000" |
| 48578 | /* 511 */ "DIV_Fp80\000" |
| 48579 | /* 520 */ "UCOM_FpIr80\000" |
| 48580 | /* 532 */ "UCOM_Fpr80\000" |
| 48581 | /* 543 */ "LD_F0\000" |
| 48582 | /* 549 */ "AVX512_512_SET0\000" |
| 48583 | /* 565 */ "AVX512_256_SET0\000" |
| 48584 | /* 581 */ "AVX512_128_SET0\000" |
| 48585 | /* 597 */ "V_SET0\000" |
| 48586 | /* 604 */ "MMX_SET0\000" |
| 48587 | /* 613 */ "AVX_SET0\000" |
| 48588 | /* 622 */ "PREFETCHT0\000" |
| 48589 | /* 633 */ "PREFETCHIT0\000" |
| 48590 | /* 645 */ "SUB_FrST0\000" |
| 48591 | /* 655 */ "ADD_FrST0\000" |
| 48592 | /* 665 */ "MUL_FrST0\000" |
| 48593 | /* 675 */ "SUBR_FrST0\000" |
| 48594 | /* 686 */ "DIVR_FrST0\000" |
| 48595 | /* 697 */ "DIV_FrST0\000" |
| 48596 | /* 707 */ "SUB_FPrST0\000" |
| 48597 | /* 718 */ "ADD_FPrST0\000" |
| 48598 | /* 729 */ "MUL_FPrST0\000" |
| 48599 | /* 740 */ "SUBR_FPrST0\000" |
| 48600 | /* 752 */ "DIVR_FPrST0\000" |
| 48601 | /* 764 */ "DIV_FPrST0\000" |
| 48602 | /* 775 */ "PT2RPNTLVWZ0\000" |
| 48603 | /* 788 */ "PBLENDVBrm0\000" |
| 48604 | /* 800 */ "BLENDVPDrm0\000" |
| 48605 | /* 812 */ "BLENDVPSrm0\000" |
| 48606 | /* 824 */ "MOV32r0\000" |
| 48607 | /* 832 */ "PBLENDVBrr0\000" |
| 48608 | /* 844 */ "BLENDVPDrr0\000" |
| 48609 | /* 856 */ "BLENDVPSrr0\000" |
| 48610 | /* 868 */ "XSHA1\000" |
| 48611 | /* 874 */ "UBSAN_UD1\000" |
| 48612 | /* 884 */ "LD_F1\000" |
| 48613 | /* 890 */ "CMOV_VK1\000" |
| 48614 | /* 899 */ "FPREM1\000" |
| 48615 | /* 906 */ "F2XM1\000" |
| 48616 | /* 912 */ "FYL2XP1\000" |
| 48617 | /* 920 */ "PT2RPNTLVWZ0T1\000" |
| 48618 | /* 935 */ "PT2RPNTLVWZ1T1\000" |
| 48619 | /* 950 */ "PTILELOADDT1\000" |
| 48620 | /* 963 */ "PREFETCHT1\000" |
| 48621 | /* 974 */ "PREFETCHIT1\000" |
| 48622 | /* 986 */ "PT2RPNTLVWZ0RST1\000" |
| 48623 | /* 1003 */ "PT2RPNTLVWZ1RST1\000" |
| 48624 | /* 1020 */ "PTILELOADDRST1\000" |
| 48625 | /* 1035 */ "PREFETCHWT1\000" |
| 48626 | /* 1047 */ "PT2RPNTLVWZ1\000" |
| 48627 | /* 1060 */ "JCC_1\000" |
| 48628 | /* 1066 */ "JMP_1\000" |
| 48629 | /* 1072 */ "MOV32r_1\000" |
| 48630 | /* 1081 */ "RCL32m1\000" |
| 48631 | /* 1089 */ "SHL32m1\000" |
| 48632 | /* 1097 */ "ROL32m1\000" |
| 48633 | /* 1105 */ "SAR32m1\000" |
| 48634 | /* 1113 */ "RCR32m1\000" |
| 48635 | /* 1121 */ "SHR32m1\000" |
| 48636 | /* 1129 */ "ROR32m1\000" |
| 48637 | /* 1137 */ "RCL64m1\000" |
| 48638 | /* 1145 */ "SHL64m1\000" |
| 48639 | /* 1153 */ "ROL64m1\000" |
| 48640 | /* 1161 */ "SAR64m1\000" |
| 48641 | /* 1169 */ "RCR64m1\000" |
| 48642 | /* 1177 */ "SHR64m1\000" |
| 48643 | /* 1185 */ "ROR64m1\000" |
| 48644 | /* 1193 */ "RCL16m1\000" |
| 48645 | /* 1201 */ "SHL16m1\000" |
| 48646 | /* 1209 */ "ROL16m1\000" |
| 48647 | /* 1217 */ "SAR16m1\000" |
| 48648 | /* 1225 */ "RCR16m1\000" |
| 48649 | /* 1233 */ "SHR16m1\000" |
| 48650 | /* 1241 */ "ROR16m1\000" |
| 48651 | /* 1249 */ "RCL8m1\000" |
| 48652 | /* 1256 */ "SHL8m1\000" |
| 48653 | /* 1263 */ "ROL8m1\000" |
| 48654 | /* 1270 */ "SAR8m1\000" |
| 48655 | /* 1277 */ "RCR8m1\000" |
| 48656 | /* 1284 */ "SHR8m1\000" |
| 48657 | /* 1291 */ "ROR8m1\000" |
| 48658 | /* 1298 */ "RCL32r1\000" |
| 48659 | /* 1306 */ "SHL32r1\000" |
| 48660 | /* 1314 */ "ROL32r1\000" |
| 48661 | /* 1322 */ "SAR32r1\000" |
| 48662 | /* 1330 */ "RCR32r1\000" |
| 48663 | /* 1338 */ "SHR32r1\000" |
| 48664 | /* 1346 */ "ROR32r1\000" |
| 48665 | /* 1354 */ "MOV32r1\000" |
| 48666 | /* 1362 */ "RCL64r1\000" |
| 48667 | /* 1370 */ "SHL64r1\000" |
| 48668 | /* 1378 */ "ROL64r1\000" |
| 48669 | /* 1386 */ "SAR64r1\000" |
| 48670 | /* 1394 */ "RCR64r1\000" |
| 48671 | /* 1402 */ "SHR64r1\000" |
| 48672 | /* 1410 */ "ROR64r1\000" |
| 48673 | /* 1418 */ "RCL16r1\000" |
| 48674 | /* 1426 */ "SHL16r1\000" |
| 48675 | /* 1434 */ "ROL16r1\000" |
| 48676 | /* 1442 */ "SAR16r1\000" |
| 48677 | /* 1450 */ "RCR16r1\000" |
| 48678 | /* 1458 */ "SHR16r1\000" |
| 48679 | /* 1466 */ "ROR16r1\000" |
| 48680 | /* 1474 */ "RCL8r1\000" |
| 48681 | /* 1481 */ "SHL8r1\000" |
| 48682 | /* 1488 */ "ROL8r1\000" |
| 48683 | /* 1495 */ "SAR8r1\000" |
| 48684 | /* 1502 */ "RCR8r1\000" |
| 48685 | /* 1509 */ "SHR8r1\000" |
| 48686 | /* 1516 */ "ROR8r1\000" |
| 48687 | /* 1523 */ "CMOV_VR512\000" |
| 48688 | /* 1534 */ "LD_Fp032\000" |
| 48689 | /* 1543 */ "LD_Fp132\000" |
| 48690 | /* 1552 */ "INVLPGA32\000" |
| 48691 | /* 1562 */ "PUSHA32\000" |
| 48692 | /* 1570 */ "POPA32\000" |
| 48693 | /* 1577 */ "MOVDIR64B32\000" |
| 48694 | /* 1589 */ "INVLPGB32\000" |
| 48695 | /* 1599 */ "VMLOAD32\000" |
| 48696 | /* 1608 */ "LXADD32\000" |
| 48697 | /* 1616 */ "INVPCID32\000" |
| 48698 | /* 1626 */ "RDPID32\000" |
| 48699 | /* 1634 */ "INVVPID32\000" |
| 48700 | /* 1644 */ "ENQCMD32\000" |
| 48701 | /* 1653 */ "PVALIDATE32\000" |
| 48702 | /* 1665 */ "VMSAVE32\000" |
| 48703 | /* 1674 */ "PUSHF32\000" |
| 48704 | /* 1682 */ "POPF32\000" |
| 48705 | /* 1689 */ "LCMPXCHG32\000" |
| 48706 | /* 1700 */ "MOVDIRI32\000" |
| 48707 | /* 1710 */ "LRETI32\000" |
| 48708 | /* 1718 */ "CMOV_VK32\000" |
| 48709 | /* 1728 */ "INDIRECT_THUNK_CALL32\000" |
| 48710 | /* 1750 */ "INDIRECT_THUNK_TCRETURN32\000" |
| 48711 | /* 1776 */ "VMRUN32\000" |
| 48712 | /* 1784 */ "ADJCALLSTACKDOWN32\000" |
| 48713 | /* 1803 */ "CMOV_RFP32\000" |
| 48714 | /* 1814 */ "ADJCALLSTACKUP32\000" |
| 48715 | /* 1831 */ "ENDBR32\000" |
| 48716 | /* 1839 */ "CMOV_FR32\000" |
| 48717 | /* 1849 */ "CMOV_GR32\000" |
| 48718 | /* 1859 */ "UMONITOR32\000" |
| 48719 | /* 1870 */ "PUSHCS32\000" |
| 48720 | /* 1879 */ "PUSHDS32\000" |
| 48721 | /* 1888 */ "ENQCMDS32\000" |
| 48722 | /* 1898 */ "POPDS32\000" |
| 48723 | /* 1906 */ "PUSHES32\000" |
| 48724 | /* 1915 */ "POPES32\000" |
| 48725 | /* 1923 */ "PUSHFS32\000" |
| 48726 | /* 1932 */ "POPFS32\000" |
| 48727 | /* 1940 */ "RDFLAGS32\000" |
| 48728 | /* 1950 */ "WRFLAGS32\000" |
| 48729 | /* 1960 */ "PUSHGS32\000" |
| 48730 | /* 1969 */ "POPGS32\000" |
| 48731 | /* 1977 */ "PUSHSS32\000" |
| 48732 | /* 1986 */ "POPSS32\000" |
| 48733 | /* 1994 */ "IRET32\000" |
| 48734 | /* 2001 */ "LRET32\000" |
| 48735 | /* 2008 */ "INVEPT32\000" |
| 48736 | /* 2017 */ "VAARG_X32\000" |
| 48737 | /* 2027 */ "TLS_addrX32\000" |
| 48738 | /* 2039 */ "TLS_base_addrX32\000" |
| 48739 | /* 2056 */ "PROBED_ALLOCA_32\000" |
| 48740 | /* 2073 */ "SEG_ALLOCA_32\000" |
| 48741 | /* 2087 */ "DYN_ALLOCA_32\000" |
| 48742 | /* 2101 */ "REP_STOSB_32\000" |
| 48743 | /* 2114 */ "REP_MOVSB_32\000" |
| 48744 | /* 2127 */ "REP_STOSD_32\000" |
| 48745 | /* 2140 */ "REP_MOVSD_32\000" |
| 48746 | /* 2153 */ "AVX512_512_SEXT_MASK_32\000" |
| 48747 | /* 2177 */ "REP_STOSQ_32\000" |
| 48748 | /* 2190 */ "REP_MOVSQ_32\000" |
| 48749 | /* 2203 */ "REP_STOSW_32\000" |
| 48750 | /* 2216 */ "REP_MOVSW_32\000" |
| 48751 | /* 2229 */ "TLSCall_32\000" |
| 48752 | /* 2240 */ "TLS_desc32\000" |
| 48753 | /* 2251 */ "SBB32i32\000" |
| 48754 | /* 2260 */ "SUB32i32\000" |
| 48755 | /* 2269 */ "ADC32i32\000" |
| 48756 | /* 2278 */ "ADD32i32\000" |
| 48757 | /* 2287 */ "AND32i32\000" |
| 48758 | /* 2296 */ "CMP32i32\000" |
| 48759 | /* 2305 */ "XOR32i32\000" |
| 48760 | /* 2314 */ "TEST32i32\000" |
| 48761 | /* 2324 */ "SBB64i32\000" |
| 48762 | /* 2333 */ "SUB64i32\000" |
| 48763 | /* 2342 */ "ADC64i32\000" |
| 48764 | /* 2351 */ "ADD64i32\000" |
| 48765 | /* 2360 */ "AND64i32\000" |
| 48766 | /* 2369 */ "PUSH64i32\000" |
| 48767 | /* 2379 */ "CMP64i32\000" |
| 48768 | /* 2388 */ "XOR64i32\000" |
| 48769 | /* 2397 */ "TEST64i32\000" |
| 48770 | /* 2407 */ "SBB64mi32\000" |
| 48771 | /* 2417 */ "LOCK_SUB64mi32\000" |
| 48772 | /* 2432 */ "ADC64mi32\000" |
| 48773 | /* 2442 */ "LOCK_ADD64mi32\000" |
| 48774 | /* 2457 */ "LOCK_AND64mi32\000" |
| 48775 | /* 2472 */ "CCMP64mi32\000" |
| 48776 | /* 2483 */ "LOCK_XOR64mi32\000" |
| 48777 | /* 2498 */ "LOCK_OR64mi32\000" |
| 48778 | /* 2512 */ "CTEST64mi32\000" |
| 48779 | /* 2524 */ "MOV64mi32\000" |
| 48780 | /* 2534 */ "IMUL64rmi32\000" |
| 48781 | /* 2546 */ "IMULZU64rmi32\000" |
| 48782 | /* 2560 */ "SBB64ri32\000" |
| 48783 | /* 2570 */ "SUB64ri32\000" |
| 48784 | /* 2580 */ "ADC64ri32\000" |
| 48785 | /* 2590 */ "ADD64ri32\000" |
| 48786 | /* 2600 */ "AND64ri32\000" |
| 48787 | /* 2610 */ "CCMP64ri32\000" |
| 48788 | /* 2621 */ "XOR64ri32\000" |
| 48789 | /* 2631 */ "CTEST64ri32\000" |
| 48790 | /* 2643 */ "MOV64ri32\000" |
| 48791 | /* 2653 */ "IMUL64rri32\000" |
| 48792 | /* 2665 */ "IMULZU64rri32\000" |
| 48793 | /* 2679 */ "CALL64pcrel32\000" |
| 48794 | /* 2693 */ "CALLpcrel32\000" |
| 48795 | /* 2705 */ "ST_FpP80m32\000" |
| 48796 | /* 2717 */ "SUB_Fp80m32\000" |
| 48797 | /* 2729 */ "ADD_Fp80m32\000" |
| 48798 | /* 2741 */ "MUL_Fp80m32\000" |
| 48799 | /* 2753 */ "SUBR_Fp80m32\000" |
| 48800 | /* 2766 */ "DIVR_Fp80m32\000" |
| 48801 | /* 2779 */ "ST_Fp80m32\000" |
| 48802 | /* 2790 */ "DIV_Fp80m32\000" |
| 48803 | /* 2802 */ "SUB_FpI32m32\000" |
| 48804 | /* 2815 */ "ADD_FpI32m32\000" |
| 48805 | /* 2828 */ "MUL_FpI32m32\000" |
| 48806 | /* 2841 */ "SUBR_FpI32m32\000" |
| 48807 | /* 2855 */ "DIVR_FpI32m32\000" |
| 48808 | /* 2869 */ "DIV_FpI32m32\000" |
| 48809 | /* 2882 */ "ILD_Fp32m32\000" |
| 48810 | /* 2894 */ "IST_Fp32m32\000" |
| 48811 | /* 2906 */ "ISTT_Fp32m32\000" |
| 48812 | /* 2919 */ "CRC32r32m32\000" |
| 48813 | /* 2931 */ "ST_FpP64m32\000" |
| 48814 | /* 2943 */ "SUB_Fp64m32\000" |
| 48815 | /* 2955 */ "ADD_Fp64m32\000" |
| 48816 | /* 2967 */ "ILD_Fp64m32\000" |
| 48817 | /* 2979 */ "MUL_Fp64m32\000" |
| 48818 | /* 2991 */ "SUBR_Fp64m32\000" |
| 48819 | /* 3004 */ "DIVR_Fp64m32\000" |
| 48820 | /* 3017 */ "IST_Fp64m32\000" |
| 48821 | /* 3029 */ "ISTT_Fp64m32\000" |
| 48822 | /* 3042 */ "DIV_Fp64m32\000" |
| 48823 | /* 3054 */ "SUB_FpI16m32\000" |
| 48824 | /* 3067 */ "ADD_FpI16m32\000" |
| 48825 | /* 3080 */ "MUL_FpI16m32\000" |
| 48826 | /* 3093 */ "SUBR_FpI16m32\000" |
| 48827 | /* 3107 */ "DIVR_FpI16m32\000" |
| 48828 | /* 3121 */ "DIV_FpI16m32\000" |
| 48829 | /* 3134 */ "ILD_Fp16m32\000" |
| 48830 | /* 3146 */ "IST_Fp16m32\000" |
| 48831 | /* 3158 */ "ISTT_Fp16m32\000" |
| 48832 | /* 3171 */ "FP80_ADDm32\000" |
| 48833 | /* 3183 */ "MOVSX32rm32\000" |
| 48834 | /* 3195 */ "MOVSX64rm32\000" |
| 48835 | /* 3207 */ "MOVSX16rm32\000" |
| 48836 | /* 3219 */ "MOV32ao32\000" |
| 48837 | /* 3229 */ "MOV64ao32\000" |
| 48838 | /* 3239 */ "MOV16ao32\000" |
| 48839 | /* 3249 */ "MOV8ao32\000" |
| 48840 | /* 3258 */ "CMOVNB_Fp32\000" |
| 48841 | /* 3270 */ "SUB_Fp32\000" |
| 48842 | /* 3279 */ "CMOVB_Fp32\000" |
| 48843 | /* 3290 */ "ADD_Fp32\000" |
| 48844 | /* 3299 */ "CMOVNBE_Fp32\000" |
| 48845 | /* 3312 */ "CMOVBE_Fp32\000" |
| 48846 | /* 3324 */ "CMOVNE_Fp32\000" |
| 48847 | /* 3336 */ "CMOVE_Fp32\000" |
| 48848 | /* 3347 */ "MUL_Fp32\000" |
| 48849 | /* 3356 */ "XAM_Fp32\000" |
| 48850 | /* 3365 */ "CMOVNP_Fp32\000" |
| 48851 | /* 3377 */ "CMOVP_Fp32\000" |
| 48852 | /* 3388 */ "ABS_Fp32\000" |
| 48853 | /* 3397 */ "CHS_Fp32\000" |
| 48854 | /* 3406 */ "SQRT_Fp32\000" |
| 48855 | /* 3416 */ "TST_Fp32\000" |
| 48856 | /* 3425 */ "DIV_Fp32\000" |
| 48857 | /* 3434 */ "EH_SjLj_LongJmp32\000" |
| 48858 | /* 3452 */ "EH_SjLj_SetJmp32\000" |
| 48859 | /* 3469 */ "CRC32r32r32\000" |
| 48860 | /* 3481 */ "UCOM_FpIr32\000" |
| 48861 | /* 3493 */ "TLS_addr32\000" |
| 48862 | /* 3504 */ "TLS_base_addr32\000" |
| 48863 | /* 3520 */ "CMPCCXADDmr32\000" |
| 48864 | /* 3534 */ "UCOM_Fpr32\000" |
| 48865 | /* 3545 */ "MOVSX32rr32\000" |
| 48866 | /* 3557 */ "MOVSX64rr32\000" |
| 48867 | /* 3569 */ "MOVSX16rr32\000" |
| 48868 | /* 3581 */ "FLDLG2\000" |
| 48869 | /* 3588 */ "G_FLOG2\000" |
| 48870 | /* 3596 */ "PUSH2\000" |
| 48871 | /* 3602 */ "CMOV_VK2\000" |
| 48872 | /* 3611 */ "G_FATAN2\000" |
| 48873 | /* 3620 */ "FLDLN2\000" |
| 48874 | /* 3627 */ "POP2\000" |
| 48875 | /* 3632 */ "G_FEXP2\000" |
| 48876 | /* 3640 */ "PREFETCHT2\000" |
| 48877 | /* 3651 */ "PREFETCHRST2\000" |
| 48878 | /* 3664 */ "JCC_2\000" |
| 48879 | /* 3670 */ "XBEGIN_2\000" |
| 48880 | /* 3679 */ "JMP_2\000" |
| 48881 | /* 3685 */ "VMOVZPDILo2PDIZrr2\000" |
| 48882 | /* 3704 */ "VMOVZPWILo2PWIZrr2\000" |
| 48883 | /* 3723 */ "INT3\000" |
| 48884 | /* 3728 */ "LD_Fp064\000" |
| 48885 | /* 3737 */ "LD_Fp164\000" |
| 48886 | /* 3746 */ "INVLPGA64\000" |
| 48887 | /* 3756 */ "MOVDIR64B64\000" |
| 48888 | /* 3768 */ "LLWPCB64\000" |
| 48889 | /* 3777 */ "SLWPCB64\000" |
| 48890 | /* 3786 */ "INVLPGB64\000" |
| 48891 | /* 3796 */ "XSAVEC64\000" |
| 48892 | /* 3805 */ "VMLOAD64\000" |
| 48893 | /* 3814 */ "LXADD64\000" |
| 48894 | /* 3822 */ "INVPCID64\000" |
| 48895 | /* 3832 */ "RDPID64\000" |
| 48896 | /* 3840 */ "INVVPID64\000" |
| 48897 | /* 3850 */ "ENQCMD64\000" |
| 48898 | /* 3859 */ "RDFSBASE64\000" |
| 48899 | /* 3870 */ "WRFSBASE64\000" |
| 48900 | /* 3881 */ "RDGSBASE64\000" |
| 48901 | /* 3892 */ "WRGSBASE64\000" |
| 48902 | /* 3903 */ "PVALIDATE64\000" |
| 48903 | /* 3915 */ "LEAVE64\000" |
| 48904 | /* 3923 */ "VMSAVE64\000" |
| 48905 | /* 3932 */ "FXSAVE64\000" |
| 48906 | /* 3941 */ "PUSHF64\000" |
| 48907 | /* 3949 */ "POPF64\000" |
| 48908 | /* 3956 */ "LCMPXCHG64\000" |
| 48909 | /* 3967 */ "MOVDIRI64\000" |
| 48910 | /* 3977 */ "LRETI64\000" |
| 48911 | /* 3985 */ "CMOV_VK64\000" |
| 48912 | /* 3995 */ "INDIRECT_THUNK_CALL64\000" |
| 48913 | /* 4017 */ "INDIRECT_THUNK_TCRETURN64\000" |
| 48914 | /* 4043 */ "EH_RETURN64\000" |
| 48915 | /* 4055 */ "VMRUN64\000" |
| 48916 | /* 4063 */ "ADJCALLSTACKDOWN64\000" |
| 48917 | /* 4082 */ "CMOV_RFP64\000" |
| 48918 | /* 4093 */ "ADJCALLSTACKUP64\000" |
| 48919 | /* 4110 */ "MMX_MASKMOVQ64\000" |
| 48920 | /* 4125 */ "ENDBR64\000" |
| 48921 | /* 4133 */ "CMOV_FR64\000" |
| 48922 | /* 4143 */ "UMONITOR64\000" |
| 48923 | /* 4154 */ "FXRSTOR64\000" |
| 48924 | /* 4164 */ "CMOV_VR64\000" |
| 48925 | /* 4174 */ "ENQCMDS64\000" |
| 48926 | /* 4184 */ "XSAVES64\000" |
| 48927 | /* 4193 */ "PUSHFS64\000" |
| 48928 | /* 4202 */ "POPFS64\000" |
| 48929 | /* 4210 */ "RDFLAGS64\000" |
| 48930 | /* 4220 */ "WRFLAGS64\000" |
| 48931 | /* 4230 */ "PUSHGS64\000" |
| 48932 | /* 4239 */ "POPGS64\000" |
| 48933 | /* 4247 */ "XRSTORS64\000" |
| 48934 | /* 4257 */ "IRET64\000" |
| 48935 | /* 4264 */ "LRET64\000" |
| 48936 | /* 4271 */ "SYSRET64\000" |
| 48937 | /* 4280 */ "SYSEXIT64\000" |
| 48938 | /* 4290 */ "INVEPT64\000" |
| 48939 | /* 4299 */ "XSAVEOPT64\000" |
| 48940 | /* 4310 */ "VMASKMOVDQU64\000" |
| 48941 | /* 4324 */ "PROBED_ALLOCA_64\000" |
| 48942 | /* 4341 */ "SEG_ALLOCA_64\000" |
| 48943 | /* 4355 */ "DYN_ALLOCA_64\000" |
| 48944 | /* 4369 */ "REP_STOSB_64\000" |
| 48945 | /* 4382 */ "REP_MOVSB_64\000" |
| 48946 | /* 4395 */ "REP_STOSD_64\000" |
| 48947 | /* 4408 */ "REP_MOVSD_64\000" |
| 48948 | /* 4421 */ "VAARG_64\000" |
| 48949 | /* 4430 */ "AVX512_512_SEXT_MASK_64\000" |
| 48950 | /* 4454 */ "REP_STOSQ_64\000" |
| 48951 | /* 4467 */ "REP_MOVSQ_64\000" |
| 48952 | /* 4480 */ "REP_STOSW_64\000" |
| 48953 | /* 4493 */ "REP_MOVSW_64\000" |
| 48954 | /* 4506 */ "TLSCall_64\000" |
| 48955 | /* 4517 */ "TLS_desc64\000" |
| 48956 | /* 4528 */ "TAILJMPd64\000" |
| 48957 | /* 4539 */ "TCRETURNdi64\000" |
| 48958 | /* 4552 */ "TCRETURNmi64\000" |
| 48959 | /* 4565 */ "MOV32ri64\000" |
| 48960 | /* 4575 */ "TCRETURNri64\000" |
| 48961 | /* 4588 */ "ST_FpP80m64\000" |
| 48962 | /* 4600 */ "SUB_Fp80m64\000" |
| 48963 | /* 4612 */ "ADD_Fp80m64\000" |
| 48964 | /* 4624 */ "MUL_Fp80m64\000" |
| 48965 | /* 4636 */ "SUBR_Fp80m64\000" |
| 48966 | /* 4649 */ "DIVR_Fp80m64\000" |
| 48967 | /* 4662 */ "ST_Fp80m64\000" |
| 48968 | /* 4673 */ "DIV_Fp80m64\000" |
| 48969 | /* 4685 */ "SUB_FpI32m64\000" |
| 48970 | /* 4698 */ "ADD_FpI32m64\000" |
| 48971 | /* 4711 */ "MUL_FpI32m64\000" |
| 48972 | /* 4724 */ "SUBR_FpI32m64\000" |
| 48973 | /* 4738 */ "DIVR_FpI32m64\000" |
| 48974 | /* 4752 */ "DIV_FpI32m64\000" |
| 48975 | /* 4765 */ "ILD_Fp32m64\000" |
| 48976 | /* 4777 */ "IST_Fp32m64\000" |
| 48977 | /* 4789 */ "ISTT_Fp32m64\000" |
| 48978 | /* 4802 */ "ILD_Fp64m64\000" |
| 48979 | /* 4814 */ "IST_Fp64m64\000" |
| 48980 | /* 4826 */ "ISTT_Fp64m64\000" |
| 48981 | /* 4839 */ "CRC32r64m64\000" |
| 48982 | /* 4851 */ "SUB_FpI16m64\000" |
| 48983 | /* 4864 */ "ADD_FpI16m64\000" |
| 48984 | /* 4877 */ "MUL_FpI16m64\000" |
| 48985 | /* 4890 */ "SUBR_FpI16m64\000" |
| 48986 | /* 4904 */ "DIVR_FpI16m64\000" |
| 48987 | /* 4918 */ "DIV_FpI16m64\000" |
| 48988 | /* 4931 */ "ILD_Fp16m64\000" |
| 48989 | /* 4943 */ "IST_Fp16m64\000" |
| 48990 | /* 4955 */ "ISTT_Fp16m64\000" |
| 48991 | /* 4968 */ "TAILJMPm64\000" |
| 48992 | /* 4979 */ "MOV32ao64\000" |
| 48993 | /* 4989 */ "MOV64ao64\000" |
| 48994 | /* 4999 */ "MOV16ao64\000" |
| 48995 | /* 5009 */ "MOV8ao64\000" |
| 48996 | /* 5018 */ "CMOVNB_Fp64\000" |
| 48997 | /* 5030 */ "SUB_Fp64\000" |
| 48998 | /* 5039 */ "CMOVB_Fp64\000" |
| 48999 | /* 5050 */ "ADD_Fp64\000" |
| 49000 | /* 5059 */ "CMOVNBE_Fp64\000" |
| 49001 | /* 5072 */ "CMOVBE_Fp64\000" |
| 49002 | /* 5084 */ "CMOVNE_Fp64\000" |
| 49003 | /* 5096 */ "CMOVE_Fp64\000" |
| 49004 | /* 5107 */ "MUL_Fp64\000" |
| 49005 | /* 5116 */ "XAM_Fp64\000" |
| 49006 | /* 5125 */ "CMOVNP_Fp64\000" |
| 49007 | /* 5137 */ "CMOVP_Fp64\000" |
| 49008 | /* 5148 */ "ABS_Fp64\000" |
| 49009 | /* 5157 */ "CHS_Fp64\000" |
| 49010 | /* 5166 */ "SQRT_Fp64\000" |
| 49011 | /* 5176 */ "TST_Fp64\000" |
| 49012 | /* 5185 */ "DIV_Fp64\000" |
| 49013 | /* 5194 */ "EH_SjLj_LongJmp64\000" |
| 49014 | /* 5212 */ "EH_SjLj_SetJmp64\000" |
| 49015 | /* 5229 */ "CRC32r64r64\000" |
| 49016 | /* 5241 */ "UCOM_FpIr64\000" |
| 49017 | /* 5253 */ "TAILJMPr64\000" |
| 49018 | /* 5264 */ "TLS_addr64\000" |
| 49019 | /* 5275 */ "TLS_base_addr64\000" |
| 49020 | /* 5291 */ "CMPCCXADDmr64\000" |
| 49021 | /* 5305 */ "UCOM_Fpr64\000" |
| 49022 | /* 5316 */ "CMOV_VK4\000" |
| 49023 | /* 5325 */ "JCC_4\000" |
| 49024 | /* 5331 */ "XBEGIN_4\000" |
| 49025 | /* 5340 */ "JMP_4\000" |
| 49026 | /* 5346 */ "PUSHA16\000" |
| 49027 | /* 5354 */ "POPA16\000" |
| 49028 | /* 5361 */ "MOVDIR64B16\000" |
| 49029 | /* 5373 */ "LXADD16\000" |
| 49030 | /* 5381 */ "ENQCMD16\000" |
| 49031 | /* 5390 */ "PUSHF16\000" |
| 49032 | /* 5398 */ "POPF16\000" |
| 49033 | /* 5405 */ "LCMPXCHG16\000" |
| 49034 | /* 5416 */ "LRETI16\000" |
| 49035 | /* 5424 */ "CMOV_VK16\000" |
| 49036 | /* 5434 */ "PTCONJTFP16\000" |
| 49037 | /* 5446 */ "CMOV_FR16\000" |
| 49038 | /* 5456 */ "CMOV_GR16\000" |
| 49039 | /* 5466 */ "UMONITOR16\000" |
| 49040 | /* 5477 */ "PUSHCS16\000" |
| 49041 | /* 5486 */ "PUSHDS16\000" |
| 49042 | /* 5495 */ "ENQCMDS16\000" |
| 49043 | /* 5505 */ "POPDS16\000" |
| 49044 | /* 5513 */ "PUSHES16\000" |
| 49045 | /* 5522 */ "POPES16\000" |
| 49046 | /* 5530 */ "PUSHFS16\000" |
| 49047 | /* 5539 */ "POPFS16\000" |
| 49048 | /* 5547 */ "PUSHGS16\000" |
| 49049 | /* 5556 */ "POPGS16\000" |
| 49050 | /* 5564 */ "PUSHSS16\000" |
| 49051 | /* 5573 */ "POPSS16\000" |
| 49052 | /* 5581 */ "IRET16\000" |
| 49053 | /* 5588 */ "LRET16\000" |
| 49054 | /* 5595 */ "SBB16i16\000" |
| 49055 | /* 5604 */ "SUB16i16\000" |
| 49056 | /* 5613 */ "ADC16i16\000" |
| 49057 | /* 5622 */ "ADD16i16\000" |
| 49058 | /* 5631 */ "AND16i16\000" |
| 49059 | /* 5640 */ "CMP16i16\000" |
| 49060 | /* 5649 */ "XOR16i16\000" |
| 49061 | /* 5658 */ "TEST16i16\000" |
| 49062 | /* 5668 */ "CALLpcrel16\000" |
| 49063 | /* 5680 */ "CRC32r32m16\000" |
| 49064 | /* 5692 */ "MOVSX32rm16\000" |
| 49065 | /* 5704 */ "MOVZX32rm16\000" |
| 49066 | /* 5716 */ "MOVSX64rm16\000" |
| 49067 | /* 5728 */ "MOVZX64rm16\000" |
| 49068 | /* 5740 */ "MOVSX16rm16\000" |
| 49069 | /* 5752 */ "MOVZX16rm16\000" |
| 49070 | /* 5764 */ "MOV32ao16\000" |
| 49071 | /* 5774 */ "MOV16ao16\000" |
| 49072 | /* 5784 */ "MOV8ao16\000" |
| 49073 | /* 5793 */ "CRC32r32r16\000" |
| 49074 | /* 5805 */ "MOVSX32rr16\000" |
| 49075 | /* 5817 */ "MOVZX32rr16\000" |
| 49076 | /* 5829 */ "MOVSX64rr16\000" |
| 49077 | /* 5841 */ "MOVZX64rr16\000" |
| 49078 | /* 5853 */ "MOVSX16rr16\000" |
| 49079 | /* 5865 */ "MOVZX16rr16\000" |
| 49080 | /* 5877 */ "XSHA256\000" |
| 49081 | /* 5885 */ "CMOV_VR256\000" |
| 49082 | /* 5896 */ "ENCODEKEY256\000" |
| 49083 | /* 5909 */ "AVX512_FsFLD0F128\000" |
| 49084 | /* 5927 */ "CMOV_VR128\000" |
| 49085 | /* 5938 */ "ENCODEKEY128\000" |
| 49086 | /* 5951 */ "LXADD8\000" |
| 49087 | /* 5958 */ "LCMPXCHG8\000" |
| 49088 | /* 5968 */ "CMOV_VK8\000" |
| 49089 | /* 5977 */ "CMOV_GR8\000" |
| 49090 | /* 5986 */ "PUSH32i8\000" |
| 49091 | /* 5995 */ "PUSH64i8\000" |
| 49092 | /* 6004 */ "PUSH16i8\000" |
| 49093 | /* 6013 */ "SBB8i8\000" |
| 49094 | /* 6020 */ "SUB8i8\000" |
| 49095 | /* 6027 */ "ADC8i8\000" |
| 49096 | /* 6034 */ "AAD8i8\000" |
| 49097 | /* 6041 */ "ADD8i8\000" |
| 49098 | /* 6048 */ "AND8i8\000" |
| 49099 | /* 6055 */ "AAM8i8\000" |
| 49100 | /* 6062 */ "CMP8i8\000" |
| 49101 | /* 6069 */ "XOR8i8\000" |
| 49102 | /* 6076 */ "TEST8i8\000" |
| 49103 | /* 6084 */ "SBB32mi8\000" |
| 49104 | /* 6093 */ "LOCK_SUB32mi8\000" |
| 49105 | /* 6107 */ "ADC32mi8\000" |
| 49106 | /* 6116 */ "BTC32mi8\000" |
| 49107 | /* 6125 */ "LOCK_ADD32mi8\000" |
| 49108 | /* 6139 */ "LOCK_AND32mi8\000" |
| 49109 | /* 6153 */ "CCMP32mi8\000" |
| 49110 | /* 6163 */ "LOCK_XOR32mi8\000" |
| 49111 | /* 6177 */ "LOCK_OR32mi8\000" |
| 49112 | /* 6190 */ "BTR32mi8\000" |
| 49113 | /* 6199 */ "BTS32mi8\000" |
| 49114 | /* 6208 */ "BT32mi8\000" |
| 49115 | /* 6216 */ "SBB64mi8\000" |
| 49116 | /* 6225 */ "LOCK_SUB64mi8\000" |
| 49117 | /* 6239 */ "ADC64mi8\000" |
| 49118 | /* 6248 */ "BTC64mi8\000" |
| 49119 | /* 6257 */ "LOCK_ADD64mi8\000" |
| 49120 | /* 6271 */ "LOCK_AND64mi8\000" |
| 49121 | /* 6285 */ "CCMP64mi8\000" |
| 49122 | /* 6295 */ "LOCK_XOR64mi8\000" |
| 49123 | /* 6309 */ "LOCK_OR64mi8\000" |
| 49124 | /* 6322 */ "BTR64mi8\000" |
| 49125 | /* 6331 */ "BTS64mi8\000" |
| 49126 | /* 6340 */ "BT64mi8\000" |
| 49127 | /* 6348 */ "SBB16mi8\000" |
| 49128 | /* 6357 */ "LOCK_SUB16mi8\000" |
| 49129 | /* 6371 */ "ADC16mi8\000" |
| 49130 | /* 6380 */ "BTC16mi8\000" |
| 49131 | /* 6389 */ "LOCK_ADD16mi8\000" |
| 49132 | /* 6403 */ "LOCK_AND16mi8\000" |
| 49133 | /* 6417 */ "CCMP16mi8\000" |
| 49134 | /* 6427 */ "LOCK_XOR16mi8\000" |
| 49135 | /* 6441 */ "LOCK_OR16mi8\000" |
| 49136 | /* 6454 */ "BTR16mi8\000" |
| 49137 | /* 6463 */ "BTS16mi8\000" |
| 49138 | /* 6472 */ "BT16mi8\000" |
| 49139 | /* 6480 */ "SBB8mi8\000" |
| 49140 | /* 6488 */ "SUB8mi8\000" |
| 49141 | /* 6496 */ "ADC8mi8\000" |
| 49142 | /* 6504 */ "ADD8mi8\000" |
| 49143 | /* 6512 */ "AND8mi8\000" |
| 49144 | /* 6520 */ "CMP8mi8\000" |
| 49145 | /* 6528 */ "XOR8mi8\000" |
| 49146 | /* 6536 */ "IMUL32rmi8\000" |
| 49147 | /* 6547 */ "IMULZU32rmi8\000" |
| 49148 | /* 6560 */ "IMUL64rmi8\000" |
| 49149 | /* 6571 */ "IMULZU64rmi8\000" |
| 49150 | /* 6584 */ "IMUL16rmi8\000" |
| 49151 | /* 6595 */ "IMULZU16rmi8\000" |
| 49152 | /* 6608 */ "SBB32ri8\000" |
| 49153 | /* 6617 */ "SUB32ri8\000" |
| 49154 | /* 6626 */ "ADC32ri8\000" |
| 49155 | /* 6635 */ "BTC32ri8\000" |
| 49156 | /* 6644 */ "ADD32ri8\000" |
| 49157 | /* 6653 */ "AND32ri8\000" |
| 49158 | /* 6662 */ "CCMP32ri8\000" |
| 49159 | /* 6672 */ "XOR32ri8\000" |
| 49160 | /* 6681 */ "BTR32ri8\000" |
| 49161 | /* 6690 */ "BTS32ri8\000" |
| 49162 | /* 6699 */ "BT32ri8\000" |
| 49163 | /* 6707 */ "SBB64ri8\000" |
| 49164 | /* 6716 */ "SUB64ri8\000" |
| 49165 | /* 6725 */ "ADC64ri8\000" |
| 49166 | /* 6734 */ "BTC64ri8\000" |
| 49167 | /* 6743 */ "ADD64ri8\000" |
| 49168 | /* 6752 */ "AND64ri8\000" |
| 49169 | /* 6761 */ "CCMP64ri8\000" |
| 49170 | /* 6771 */ "XOR64ri8\000" |
| 49171 | /* 6780 */ "BTR64ri8\000" |
| 49172 | /* 6789 */ "BTS64ri8\000" |
| 49173 | /* 6798 */ "BT64ri8\000" |
| 49174 | /* 6806 */ "SBB16ri8\000" |
| 49175 | /* 6815 */ "SUB16ri8\000" |
| 49176 | /* 6824 */ "ADC16ri8\000" |
| 49177 | /* 6833 */ "BTC16ri8\000" |
| 49178 | /* 6842 */ "ADD16ri8\000" |
| 49179 | /* 6851 */ "AND16ri8\000" |
| 49180 | /* 6860 */ "CCMP16ri8\000" |
| 49181 | /* 6870 */ "XOR16ri8\000" |
| 49182 | /* 6879 */ "BTR16ri8\000" |
| 49183 | /* 6888 */ "BTS16ri8\000" |
| 49184 | /* 6897 */ "BT16ri8\000" |
| 49185 | /* 6905 */ "SBB8ri8\000" |
| 49186 | /* 6913 */ "SUB8ri8\000" |
| 49187 | /* 6921 */ "ADC8ri8\000" |
| 49188 | /* 6929 */ "ADD8ri8\000" |
| 49189 | /* 6937 */ "AND8ri8\000" |
| 49190 | /* 6945 */ "CMP8ri8\000" |
| 49191 | /* 6953 */ "XOR8ri8\000" |
| 49192 | /* 6961 */ "SHLD32mri8\000" |
| 49193 | /* 6972 */ "SHRD32mri8\000" |
| 49194 | /* 6983 */ "SHLD64mri8\000" |
| 49195 | /* 6994 */ "SHRD64mri8\000" |
| 49196 | /* 7005 */ "SHLD16mri8\000" |
| 49197 | /* 7016 */ "SHRD16mri8\000" |
| 49198 | /* 7027 */ "SHLD32rri8\000" |
| 49199 | /* 7038 */ "SHRD32rri8\000" |
| 49200 | /* 7049 */ "IMUL32rri8\000" |
| 49201 | /* 7060 */ "IMULZU32rri8\000" |
| 49202 | /* 7073 */ "SHLD64rri8\000" |
| 49203 | /* 7084 */ "SHRD64rri8\000" |
| 49204 | /* 7095 */ "IMUL64rri8\000" |
| 49205 | /* 7106 */ "IMULZU64rri8\000" |
| 49206 | /* 7119 */ "SHLD16rri8\000" |
| 49207 | /* 7130 */ "SHRD16rri8\000" |
| 49208 | /* 7141 */ "IMUL16rri8\000" |
| 49209 | /* 7152 */ "IMULZU16rri8\000" |
| 49210 | /* 7165 */ "MOV32ImmSExti8\000" |
| 49211 | /* 7180 */ "MOV64ImmSExti8\000" |
| 49212 | /* 7195 */ "CRC32r32m8\000" |
| 49213 | /* 7206 */ "CRC32r64m8\000" |
| 49214 | /* 7217 */ "MOVSX32rm8\000" |
| 49215 | /* 7228 */ "MOVZX32rm8\000" |
| 49216 | /* 7239 */ "MOVSX64rm8\000" |
| 49217 | /* 7250 */ "MOVZX64rm8\000" |
| 49218 | /* 7261 */ "MOVSX16rm8\000" |
| 49219 | /* 7272 */ "MOVZX16rm8\000" |
| 49220 | /* 7283 */ "CRC32r32r8\000" |
| 49221 | /* 7294 */ "CRC32r64r8\000" |
| 49222 | /* 7305 */ "MOVSX32rr8\000" |
| 49223 | /* 7316 */ "MOVZX32rr8\000" |
| 49224 | /* 7327 */ "MOVSX64rr8\000" |
| 49225 | /* 7338 */ "MOVZX64rr8\000" |
| 49226 | /* 7349 */ "MOVSX16rr8\000" |
| 49227 | /* 7360 */ "MOVZX16rr8\000" |
| 49228 | /* 7371 */ "AAA\000" |
| 49229 | /* 7375 */ "DAA\000" |
| 49230 | /* 7379 */ "G_FMA\000" |
| 49231 | /* 7385 */ "G_STRICT_FMA\000" |
| 49232 | /* 7398 */ "PREFETCHNTA\000" |
| 49233 | /* 7410 */ "LCMPXCHG16B\000" |
| 49234 | /* 7422 */ "LCMPXCHG8B\000" |
| 49235 | /* 7433 */ "XCRYPTECB\000" |
| 49236 | /* 7443 */ "LLWPCB\000" |
| 49237 | /* 7450 */ "SLWPCB\000" |
| 49238 | /* 7457 */ "ADD64ri32_DB\000" |
| 49239 | /* 7470 */ "ADD32ri_DB\000" |
| 49240 | /* 7481 */ "ADD16ri_DB\000" |
| 49241 | /* 7492 */ "ADD8ri_DB\000" |
| 49242 | /* 7502 */ "ADD32rr_DB\000" |
| 49243 | /* 7513 */ "ADD64rr_DB\000" |
| 49244 | /* 7524 */ "ADD16rr_DB\000" |
| 49245 | /* 7535 */ "ADD8rr_DB\000" |
| 49246 | /* 7545 */ "XCRYPTCFB\000" |
| 49247 | /* 7555 */ "XCRYPTOFB\000" |
| 49248 | /* 7565 */ "PBNDKB\000" |
| 49249 | /* 7572 */ "SCASB\000" |
| 49250 | /* 7578 */ "LODSB\000" |
| 49251 | /* 7584 */ "INSB\000" |
| 49252 | /* 7589 */ "STOSB\000" |
| 49253 | /* 7595 */ "CMPSB\000" |
| 49254 | /* 7601 */ "OUTSB\000" |
| 49255 | /* 7607 */ "MOVSB\000" |
| 49256 | /* 7613 */ "G_FSUB\000" |
| 49257 | /* 7620 */ "G_STRICT_FSUB\000" |
| 49258 | /* 7634 */ "G_ATOMICRMW_FSUB\000" |
| 49259 | /* 7651 */ "G_SUB\000" |
| 49260 | /* 7657 */ "G_ATOMICRMW_SUB\000" |
| 49261 | /* 7673 */ "CLWB\000" |
| 49262 | /* 7678 */ "CLAC\000" |
| 49263 | /* 7683 */ "STAC\000" |
| 49264 | /* 7688 */ "XCRYPTCBC\000" |
| 49265 | /* 7698 */ "TAILJMPd64_CC\000" |
| 49266 | /* 7712 */ "TAILJMPd_CC\000" |
| 49267 | /* 7724 */ "GETSEC\000" |
| 49268 | /* 7731 */ "XSAVEC\000" |
| 49269 | /* 7738 */ "G_INTRINSIC\000" |
| 49270 | /* 7750 */ "SALC\000" |
| 49271 | /* 7755 */ "CLC\000" |
| 49272 | /* 7759 */ "CMC\000" |
| 49273 | /* 7763 */ "RDPMC\000" |
| 49274 | /* 7769 */ "VMFUNC\000" |
| 49275 | /* 7776 */ "G_FPTRUNC\000" |
| 49276 | /* 7786 */ "G_INTRINSIC_TRUNC\000" |
| 49277 | /* 7804 */ "G_TRUNC\000" |
| 49278 | /* 7812 */ "G_BUILD_VECTOR_TRUNC\000" |
| 49279 | /* 7833 */ "TLBSYNC\000" |
| 49280 | /* 7841 */ "G_DYN_STACKALLOC\000" |
| 49281 | /* 7858 */ "RDTSC\000" |
| 49282 | /* 7864 */ "STC\000" |
| 49283 | /* 7868 */ "KSET0D\000" |
| 49284 | /* 7875 */ "KSET1D\000" |
| 49285 | /* 7882 */ "BSWAP16r_BAD\000" |
| 49286 | /* 7895 */ "G_FMAD\000" |
| 49287 | /* 7902 */ "MASKPAIR16LOAD\000" |
| 49288 | /* 7917 */ "PTILEPAIRLOAD\000" |
| 49289 | /* 7931 */ "G_INDEXED_SEXTLOAD\000" |
| 49290 | /* 7950 */ "G_SEXTLOAD\000" |
| 49291 | /* 7961 */ "G_INDEXED_ZEXTLOAD\000" |
| 49292 | /* 7980 */ "G_ZEXTLOAD\000" |
| 49293 | /* 7991 */ "G_INDEXED_LOAD\000" |
| 49294 | /* 8006 */ "G_LOAD\000" |
| 49295 | /* 8013 */ "G_VECREDUCE_FADD\000" |
| 49296 | /* 8030 */ "G_FADD\000" |
| 49297 | /* 8037 */ "G_VECREDUCE_SEQ_FADD\000" |
| 49298 | /* 8058 */ "G_STRICT_FADD\000" |
| 49299 | /* 8072 */ "G_ATOMICRMW_FADD\000" |
| 49300 | /* 8089 */ "PTILELOADD\000" |
| 49301 | /* 8100 */ "G_VECREDUCE_ADD\000" |
| 49302 | /* 8116 */ "G_ADD\000" |
| 49303 | /* 8122 */ "G_PTR_ADD\000" |
| 49304 | /* 8132 */ "G_ATOMICRMW_ADD\000" |
| 49305 | /* 8148 */ "PTILESTORED\000" |
| 49306 | /* 8160 */ "PTTRANSPOSED\000" |
| 49307 | /* 8173 */ "CPUID\000" |
| 49308 | /* 8179 */ "CLD\000" |
| 49309 | /* 8183 */ "G_FILD\000" |
| 49310 | /* 8190 */ "G_ATOMICRMW_NAND\000" |
| 49311 | /* 8207 */ "G_VECREDUCE_AND\000" |
| 49312 | /* 8223 */ "G_AND\000" |
| 49313 | /* 8229 */ "G_ATOMICRMW_AND\000" |
| 49314 | /* 8245 */ "XEND\000" |
| 49315 | /* 8250 */ "LIFETIME_END\000" |
| 49316 | /* 8263 */ "G_BRCOND\000" |
| 49317 | /* 8272 */ "G_ATOMICRMW_USUB_COND\000" |
| 49318 | /* 8294 */ "G_LLROUND\000" |
| 49319 | /* 8304 */ "G_LROUND\000" |
| 49320 | /* 8313 */ "G_INTRINSIC_ROUND\000" |
| 49321 | /* 8331 */ "G_INTRINSIC_FPTRUNC_ROUND\000" |
| 49322 | /* 8357 */ "RCL32m1_ND\000" |
| 49323 | /* 8368 */ "SHL32m1_ND\000" |
| 49324 | /* 8379 */ "ROL32m1_ND\000" |
| 49325 | /* 8390 */ "SAR32m1_ND\000" |
| 49326 | /* 8401 */ "RCR32m1_ND\000" |
| 49327 | /* 8412 */ "SHR32m1_ND\000" |
| 49328 | /* 8423 */ "ROR32m1_ND\000" |
| 49329 | /* 8434 */ "RCL64m1_ND\000" |
| 49330 | /* 8445 */ "SHL64m1_ND\000" |
| 49331 | /* 8456 */ "ROL64m1_ND\000" |
| 49332 | /* 8467 */ "SAR64m1_ND\000" |
| 49333 | /* 8478 */ "RCR64m1_ND\000" |
| 49334 | /* 8489 */ "SHR64m1_ND\000" |
| 49335 | /* 8500 */ "ROR64m1_ND\000" |
| 49336 | /* 8511 */ "RCL16m1_ND\000" |
| 49337 | /* 8522 */ "SHL16m1_ND\000" |
| 49338 | /* 8533 */ "ROL16m1_ND\000" |
| 49339 | /* 8544 */ "SAR16m1_ND\000" |
| 49340 | /* 8555 */ "RCR16m1_ND\000" |
| 49341 | /* 8566 */ "SHR16m1_ND\000" |
| 49342 | /* 8577 */ "ROR16m1_ND\000" |
| 49343 | /* 8588 */ "RCL8m1_ND\000" |
| 49344 | /* 8598 */ "SHL8m1_ND\000" |
| 49345 | /* 8608 */ "ROL8m1_ND\000" |
| 49346 | /* 8618 */ "SAR8m1_ND\000" |
| 49347 | /* 8628 */ "RCR8m1_ND\000" |
| 49348 | /* 8638 */ "SHR8m1_ND\000" |
| 49349 | /* 8648 */ "ROR8m1_ND\000" |
| 49350 | /* 8658 */ "RCL32r1_ND\000" |
| 49351 | /* 8669 */ "SHL32r1_ND\000" |
| 49352 | /* 8680 */ "ROL32r1_ND\000" |
| 49353 | /* 8691 */ "SAR32r1_ND\000" |
| 49354 | /* 8702 */ "RCR32r1_ND\000" |
| 49355 | /* 8713 */ "SHR32r1_ND\000" |
| 49356 | /* 8724 */ "ROR32r1_ND\000" |
| 49357 | /* 8735 */ "RCL64r1_ND\000" |
| 49358 | /* 8746 */ "SHL64r1_ND\000" |
| 49359 | /* 8757 */ "ROL64r1_ND\000" |
| 49360 | /* 8768 */ "SAR64r1_ND\000" |
| 49361 | /* 8779 */ "RCR64r1_ND\000" |
| 49362 | /* 8790 */ "SHR64r1_ND\000" |
| 49363 | /* 8801 */ "ROR64r1_ND\000" |
| 49364 | /* 8812 */ "RCL16r1_ND\000" |
| 49365 | /* 8823 */ "SHL16r1_ND\000" |
| 49366 | /* 8834 */ "ROL16r1_ND\000" |
| 49367 | /* 8845 */ "SAR16r1_ND\000" |
| 49368 | /* 8856 */ "RCR16r1_ND\000" |
| 49369 | /* 8867 */ "SHR16r1_ND\000" |
| 49370 | /* 8878 */ "ROR16r1_ND\000" |
| 49371 | /* 8889 */ "RCL8r1_ND\000" |
| 49372 | /* 8899 */ "SHL8r1_ND\000" |
| 49373 | /* 8909 */ "ROL8r1_ND\000" |
| 49374 | /* 8919 */ "SAR8r1_ND\000" |
| 49375 | /* 8929 */ "RCR8r1_ND\000" |
| 49376 | /* 8939 */ "SHR8r1_ND\000" |
| 49377 | /* 8949 */ "ROR8r1_ND\000" |
| 49378 | /* 8959 */ "SBB64mi32_ND\000" |
| 49379 | /* 8972 */ "SUB64mi32_ND\000" |
| 49380 | /* 8985 */ "ADC64mi32_ND\000" |
| 49381 | /* 8998 */ "ADD64mi32_ND\000" |
| 49382 | /* 9011 */ "AND64mi32_ND\000" |
| 49383 | /* 9024 */ "XOR64mi32_ND\000" |
| 49384 | /* 9037 */ "SBB64ri32_ND\000" |
| 49385 | /* 9050 */ "SUB64ri32_ND\000" |
| 49386 | /* 9063 */ "ADC64ri32_ND\000" |
| 49387 | /* 9076 */ "ADD64ri32_ND\000" |
| 49388 | /* 9089 */ "AND64ri32_ND\000" |
| 49389 | /* 9102 */ "XOR64ri32_ND\000" |
| 49390 | /* 9115 */ "SBB32mi8_ND\000" |
| 49391 | /* 9127 */ "SUB32mi8_ND\000" |
| 49392 | /* 9139 */ "ADC32mi8_ND\000" |
| 49393 | /* 9151 */ "ADD32mi8_ND\000" |
| 49394 | /* 9163 */ "AND32mi8_ND\000" |
| 49395 | /* 9175 */ "XOR32mi8_ND\000" |
| 49396 | /* 9187 */ "SBB64mi8_ND\000" |
| 49397 | /* 9199 */ "SUB64mi8_ND\000" |
| 49398 | /* 9211 */ "ADC64mi8_ND\000" |
| 49399 | /* 9223 */ "ADD64mi8_ND\000" |
| 49400 | /* 9235 */ "AND64mi8_ND\000" |
| 49401 | /* 9247 */ "XOR64mi8_ND\000" |
| 49402 | /* 9259 */ "SBB16mi8_ND\000" |
| 49403 | /* 9271 */ "SUB16mi8_ND\000" |
| 49404 | /* 9283 */ "ADC16mi8_ND\000" |
| 49405 | /* 9295 */ "ADD16mi8_ND\000" |
| 49406 | /* 9307 */ "AND16mi8_ND\000" |
| 49407 | /* 9319 */ "XOR16mi8_ND\000" |
| 49408 | /* 9331 */ "SBB32ri8_ND\000" |
| 49409 | /* 9343 */ "SUB32ri8_ND\000" |
| 49410 | /* 9355 */ "ADC32ri8_ND\000" |
| 49411 | /* 9367 */ "ADD32ri8_ND\000" |
| 49412 | /* 9379 */ "AND32ri8_ND\000" |
| 49413 | /* 9391 */ "XOR32ri8_ND\000" |
| 49414 | /* 9403 */ "SBB64ri8_ND\000" |
| 49415 | /* 9415 */ "SUB64ri8_ND\000" |
| 49416 | /* 9427 */ "ADC64ri8_ND\000" |
| 49417 | /* 9439 */ "ADD64ri8_ND\000" |
| 49418 | /* 9451 */ "AND64ri8_ND\000" |
| 49419 | /* 9463 */ "XOR64ri8_ND\000" |
| 49420 | /* 9475 */ "SBB16ri8_ND\000" |
| 49421 | /* 9487 */ "SUB16ri8_ND\000" |
| 49422 | /* 9499 */ "ADC16ri8_ND\000" |
| 49423 | /* 9511 */ "ADD16ri8_ND\000" |
| 49424 | /* 9523 */ "AND16ri8_ND\000" |
| 49425 | /* 9535 */ "XOR16ri8_ND\000" |
| 49426 | /* 9547 */ "SHLD32mri8_ND\000" |
| 49427 | /* 9561 */ "SHRD32mri8_ND\000" |
| 49428 | /* 9575 */ "SHLD64mri8_ND\000" |
| 49429 | /* 9589 */ "SHRD64mri8_ND\000" |
| 49430 | /* 9603 */ "SHLD16mri8_ND\000" |
| 49431 | /* 9617 */ "SHRD16mri8_ND\000" |
| 49432 | /* 9631 */ "SHLD32rri8_ND\000" |
| 49433 | /* 9645 */ "SHRD32rri8_ND\000" |
| 49434 | /* 9659 */ "SHLD64rri8_ND\000" |
| 49435 | /* 9673 */ "SHRD64rri8_ND\000" |
| 49436 | /* 9687 */ "SHLD16rri8_ND\000" |
| 49437 | /* 9701 */ "SHRD16rri8_ND\000" |
| 49438 | /* 9715 */ "SHL32m1_NF_ND\000" |
| 49439 | /* 9729 */ "ROL32m1_NF_ND\000" |
| 49440 | /* 9743 */ "SAR32m1_NF_ND\000" |
| 49441 | /* 9757 */ "SHR32m1_NF_ND\000" |
| 49442 | /* 9771 */ "ROR32m1_NF_ND\000" |
| 49443 | /* 9785 */ "SHL64m1_NF_ND\000" |
| 49444 | /* 9799 */ "ROL64m1_NF_ND\000" |
| 49445 | /* 9813 */ "SAR64m1_NF_ND\000" |
| 49446 | /* 9827 */ "SHR64m1_NF_ND\000" |
| 49447 | /* 9841 */ "ROR64m1_NF_ND\000" |
| 49448 | /* 9855 */ "SHL16m1_NF_ND\000" |
| 49449 | /* 9869 */ "ROL16m1_NF_ND\000" |
| 49450 | /* 9883 */ "SAR16m1_NF_ND\000" |
| 49451 | /* 9897 */ "SHR16m1_NF_ND\000" |
| 49452 | /* 9911 */ "ROR16m1_NF_ND\000" |
| 49453 | /* 9925 */ "SHL8m1_NF_ND\000" |
| 49454 | /* 9938 */ "ROL8m1_NF_ND\000" |
| 49455 | /* 9951 */ "SAR8m1_NF_ND\000" |
| 49456 | /* 9964 */ "SHR8m1_NF_ND\000" |
| 49457 | /* 9977 */ "ROR8m1_NF_ND\000" |
| 49458 | /* 9990 */ "SHL32r1_NF_ND\000" |
| 49459 | /* 10004 */ "ROL32r1_NF_ND\000" |
| 49460 | /* 10018 */ "SAR32r1_NF_ND\000" |
| 49461 | /* 10032 */ "SHR32r1_NF_ND\000" |
| 49462 | /* 10046 */ "ROR32r1_NF_ND\000" |
| 49463 | /* 10060 */ "SHL64r1_NF_ND\000" |
| 49464 | /* 10074 */ "ROL64r1_NF_ND\000" |
| 49465 | /* 10088 */ "SAR64r1_NF_ND\000" |
| 49466 | /* 10102 */ "SHR64r1_NF_ND\000" |
| 49467 | /* 10116 */ "ROR64r1_NF_ND\000" |
| 49468 | /* 10130 */ "SHL16r1_NF_ND\000" |
| 49469 | /* 10144 */ "ROL16r1_NF_ND\000" |
| 49470 | /* 10158 */ "SAR16r1_NF_ND\000" |
| 49471 | /* 10172 */ "SHR16r1_NF_ND\000" |
| 49472 | /* 10186 */ "ROR16r1_NF_ND\000" |
| 49473 | /* 10200 */ "SHL8r1_NF_ND\000" |
| 49474 | /* 10213 */ "ROL8r1_NF_ND\000" |
| 49475 | /* 10226 */ "SAR8r1_NF_ND\000" |
| 49476 | /* 10239 */ "SHR8r1_NF_ND\000" |
| 49477 | /* 10252 */ "ROR8r1_NF_ND\000" |
| 49478 | /* 10265 */ "SUB64mi32_NF_ND\000" |
| 49479 | /* 10281 */ "ADD64mi32_NF_ND\000" |
| 49480 | /* 10297 */ "AND64mi32_NF_ND\000" |
| 49481 | /* 10313 */ "XOR64mi32_NF_ND\000" |
| 49482 | /* 10329 */ "SUB64ri32_NF_ND\000" |
| 49483 | /* 10345 */ "ADD64ri32_NF_ND\000" |
| 49484 | /* 10361 */ "AND64ri32_NF_ND\000" |
| 49485 | /* 10377 */ "XOR64ri32_NF_ND\000" |
| 49486 | /* 10393 */ "SUB32mi8_NF_ND\000" |
| 49487 | /* 10408 */ "ADD32mi8_NF_ND\000" |
| 49488 | /* 10423 */ "AND32mi8_NF_ND\000" |
| 49489 | /* 10438 */ "XOR32mi8_NF_ND\000" |
| 49490 | /* 10453 */ "SUB64mi8_NF_ND\000" |
| 49491 | /* 10468 */ "ADD64mi8_NF_ND\000" |
| 49492 | /* 10483 */ "AND64mi8_NF_ND\000" |
| 49493 | /* 10498 */ "XOR64mi8_NF_ND\000" |
| 49494 | /* 10513 */ "SUB16mi8_NF_ND\000" |
| 49495 | /* 10528 */ "ADD16mi8_NF_ND\000" |
| 49496 | /* 10543 */ "AND16mi8_NF_ND\000" |
| 49497 | /* 10558 */ "XOR16mi8_NF_ND\000" |
| 49498 | /* 10573 */ "SUB32ri8_NF_ND\000" |
| 49499 | /* 10588 */ "ADD32ri8_NF_ND\000" |
| 49500 | /* 10603 */ "AND32ri8_NF_ND\000" |
| 49501 | /* 10618 */ "XOR32ri8_NF_ND\000" |
| 49502 | /* 10633 */ "SUB64ri8_NF_ND\000" |
| 49503 | /* 10648 */ "ADD64ri8_NF_ND\000" |
| 49504 | /* 10663 */ "AND64ri8_NF_ND\000" |
| 49505 | /* 10678 */ "XOR64ri8_NF_ND\000" |
| 49506 | /* 10693 */ "SUB16ri8_NF_ND\000" |
| 49507 | /* 10708 */ "ADD16ri8_NF_ND\000" |
| 49508 | /* 10723 */ "AND16ri8_NF_ND\000" |
| 49509 | /* 10738 */ "XOR16ri8_NF_ND\000" |
| 49510 | /* 10753 */ "SHLD32mri8_NF_ND\000" |
| 49511 | /* 10770 */ "SHRD32mri8_NF_ND\000" |
| 49512 | /* 10787 */ "SHLD64mri8_NF_ND\000" |
| 49513 | /* 10804 */ "SHRD64mri8_NF_ND\000" |
| 49514 | /* 10821 */ "SHLD16mri8_NF_ND\000" |
| 49515 | /* 10838 */ "SHRD16mri8_NF_ND\000" |
| 49516 | /* 10855 */ "SHLD32rri8_NF_ND\000" |
| 49517 | /* 10872 */ "SHRD32rri8_NF_ND\000" |
| 49518 | /* 10889 */ "SHLD64rri8_NF_ND\000" |
| 49519 | /* 10906 */ "SHRD64rri8_NF_ND\000" |
| 49520 | /* 10923 */ "SHLD16rri8_NF_ND\000" |
| 49521 | /* 10940 */ "SHRD16rri8_NF_ND\000" |
| 49522 | /* 10957 */ "SHL32mCL_NF_ND\000" |
| 49523 | /* 10972 */ "ROL32mCL_NF_ND\000" |
| 49524 | /* 10987 */ "SAR32mCL_NF_ND\000" |
| 49525 | /* 11002 */ "SHR32mCL_NF_ND\000" |
| 49526 | /* 11017 */ "ROR32mCL_NF_ND\000" |
| 49527 | /* 11032 */ "SHL64mCL_NF_ND\000" |
| 49528 | /* 11047 */ "ROL64mCL_NF_ND\000" |
| 49529 | /* 11062 */ "SAR64mCL_NF_ND\000" |
| 49530 | /* 11077 */ "SHR64mCL_NF_ND\000" |
| 49531 | /* 11092 */ "ROR64mCL_NF_ND\000" |
| 49532 | /* 11107 */ "SHL16mCL_NF_ND\000" |
| 49533 | /* 11122 */ "ROL16mCL_NF_ND\000" |
| 49534 | /* 11137 */ "SAR16mCL_NF_ND\000" |
| 49535 | /* 11152 */ "SHR16mCL_NF_ND\000" |
| 49536 | /* 11167 */ "ROR16mCL_NF_ND\000" |
| 49537 | /* 11182 */ "SHL8mCL_NF_ND\000" |
| 49538 | /* 11196 */ "ROL8mCL_NF_ND\000" |
| 49539 | /* 11210 */ "SAR8mCL_NF_ND\000" |
| 49540 | /* 11224 */ "SHR8mCL_NF_ND\000" |
| 49541 | /* 11238 */ "ROR8mCL_NF_ND\000" |
| 49542 | /* 11252 */ "SHL32rCL_NF_ND\000" |
| 49543 | /* 11267 */ "ROL32rCL_NF_ND\000" |
| 49544 | /* 11282 */ "SAR32rCL_NF_ND\000" |
| 49545 | /* 11297 */ "SHR32rCL_NF_ND\000" |
| 49546 | /* 11312 */ "ROR32rCL_NF_ND\000" |
| 49547 | /* 11327 */ "SHL64rCL_NF_ND\000" |
| 49548 | /* 11342 */ "ROL64rCL_NF_ND\000" |
| 49549 | /* 11357 */ "SAR64rCL_NF_ND\000" |
| 49550 | /* 11372 */ "SHR64rCL_NF_ND\000" |
| 49551 | /* 11387 */ "ROR64rCL_NF_ND\000" |
| 49552 | /* 11402 */ "SHL16rCL_NF_ND\000" |
| 49553 | /* 11417 */ "ROL16rCL_NF_ND\000" |
| 49554 | /* 11432 */ "SAR16rCL_NF_ND\000" |
| 49555 | /* 11447 */ "SHR16rCL_NF_ND\000" |
| 49556 | /* 11462 */ "ROR16rCL_NF_ND\000" |
| 49557 | /* 11477 */ "SHL8rCL_NF_ND\000" |
| 49558 | /* 11491 */ "ROL8rCL_NF_ND\000" |
| 49559 | /* 11505 */ "SAR8rCL_NF_ND\000" |
| 49560 | /* 11519 */ "SHR8rCL_NF_ND\000" |
| 49561 | /* 11533 */ "ROR8rCL_NF_ND\000" |
| 49562 | /* 11547 */ "SHLD32mrCL_NF_ND\000" |
| 49563 | /* 11564 */ "SHRD32mrCL_NF_ND\000" |
| 49564 | /* 11581 */ "SHLD64mrCL_NF_ND\000" |
| 49565 | /* 11598 */ "SHRD64mrCL_NF_ND\000" |
| 49566 | /* 11615 */ "SHLD16mrCL_NF_ND\000" |
| 49567 | /* 11632 */ "SHRD16mrCL_NF_ND\000" |
| 49568 | /* 11649 */ "SHLD32rrCL_NF_ND\000" |
| 49569 | /* 11666 */ "SHRD32rrCL_NF_ND\000" |
| 49570 | /* 11683 */ "SHLD64rrCL_NF_ND\000" |
| 49571 | /* 11700 */ "SHRD64rrCL_NF_ND\000" |
| 49572 | /* 11717 */ "SHLD16rrCL_NF_ND\000" |
| 49573 | /* 11734 */ "SHRD16rrCL_NF_ND\000" |
| 49574 | /* 11751 */ "SUB32mi_NF_ND\000" |
| 49575 | /* 11765 */ "ADD32mi_NF_ND\000" |
| 49576 | /* 11779 */ "AND32mi_NF_ND\000" |
| 49577 | /* 11793 */ "SHL32mi_NF_ND\000" |
| 49578 | /* 11807 */ "ROL32mi_NF_ND\000" |
| 49579 | /* 11821 */ "SAR32mi_NF_ND\000" |
| 49580 | /* 11835 */ "SHR32mi_NF_ND\000" |
| 49581 | /* 11849 */ "ROR32mi_NF_ND\000" |
| 49582 | /* 11863 */ "XOR32mi_NF_ND\000" |
| 49583 | /* 11877 */ "SHL64mi_NF_ND\000" |
| 49584 | /* 11891 */ "ROL64mi_NF_ND\000" |
| 49585 | /* 11905 */ "SAR64mi_NF_ND\000" |
| 49586 | /* 11919 */ "SHR64mi_NF_ND\000" |
| 49587 | /* 11933 */ "ROR64mi_NF_ND\000" |
| 49588 | /* 11947 */ "SUB16mi_NF_ND\000" |
| 49589 | /* 11961 */ "ADD16mi_NF_ND\000" |
| 49590 | /* 11975 */ "AND16mi_NF_ND\000" |
| 49591 | /* 11989 */ "SHL16mi_NF_ND\000" |
| 49592 | /* 12003 */ "ROL16mi_NF_ND\000" |
| 49593 | /* 12017 */ "SAR16mi_NF_ND\000" |
| 49594 | /* 12031 */ "SHR16mi_NF_ND\000" |
| 49595 | /* 12045 */ "ROR16mi_NF_ND\000" |
| 49596 | /* 12059 */ "XOR16mi_NF_ND\000" |
| 49597 | /* 12073 */ "SUB8mi_NF_ND\000" |
| 49598 | /* 12086 */ "ADD8mi_NF_ND\000" |
| 49599 | /* 12099 */ "AND8mi_NF_ND\000" |
| 49600 | /* 12112 */ "SHL8mi_NF_ND\000" |
| 49601 | /* 12125 */ "ROL8mi_NF_ND\000" |
| 49602 | /* 12138 */ "SAR8mi_NF_ND\000" |
| 49603 | /* 12151 */ "SHR8mi_NF_ND\000" |
| 49604 | /* 12164 */ "ROR8mi_NF_ND\000" |
| 49605 | /* 12177 */ "XOR8mi_NF_ND\000" |
| 49606 | /* 12190 */ "SUB32ri_NF_ND\000" |
| 49607 | /* 12204 */ "ADD32ri_NF_ND\000" |
| 49608 | /* 12218 */ "AND32ri_NF_ND\000" |
| 49609 | /* 12232 */ "SHL32ri_NF_ND\000" |
| 49610 | /* 12246 */ "ROL32ri_NF_ND\000" |
| 49611 | /* 12260 */ "SAR32ri_NF_ND\000" |
| 49612 | /* 12274 */ "SHR32ri_NF_ND\000" |
| 49613 | /* 12288 */ "ROR32ri_NF_ND\000" |
| 49614 | /* 12302 */ "XOR32ri_NF_ND\000" |
| 49615 | /* 12316 */ "SHL64ri_NF_ND\000" |
| 49616 | /* 12330 */ "ROL64ri_NF_ND\000" |
| 49617 | /* 12344 */ "SAR64ri_NF_ND\000" |
| 49618 | /* 12358 */ "SHR64ri_NF_ND\000" |
| 49619 | /* 12372 */ "ROR64ri_NF_ND\000" |
| 49620 | /* 12386 */ "SUB16ri_NF_ND\000" |
| 49621 | /* 12400 */ "ADD16ri_NF_ND\000" |
| 49622 | /* 12414 */ "AND16ri_NF_ND\000" |
| 49623 | /* 12428 */ "SHL16ri_NF_ND\000" |
| 49624 | /* 12442 */ "ROL16ri_NF_ND\000" |
| 49625 | /* 12456 */ "SAR16ri_NF_ND\000" |
| 49626 | /* 12470 */ "SHR16ri_NF_ND\000" |
| 49627 | /* 12484 */ "ROR16ri_NF_ND\000" |
| 49628 | /* 12498 */ "XOR16ri_NF_ND\000" |
| 49629 | /* 12512 */ "SUB8ri_NF_ND\000" |
| 49630 | /* 12525 */ "ADD8ri_NF_ND\000" |
| 49631 | /* 12538 */ "AND8ri_NF_ND\000" |
| 49632 | /* 12551 */ "SHL8ri_NF_ND\000" |
| 49633 | /* 12564 */ "ROL8ri_NF_ND\000" |
| 49634 | /* 12577 */ "SAR8ri_NF_ND\000" |
| 49635 | /* 12590 */ "SHR8ri_NF_ND\000" |
| 49636 | /* 12603 */ "ROR8ri_NF_ND\000" |
| 49637 | /* 12616 */ "XOR8ri_NF_ND\000" |
| 49638 | /* 12629 */ "DEC32m_NF_ND\000" |
| 49639 | /* 12642 */ "INC32m_NF_ND\000" |
| 49640 | /* 12655 */ "NEG32m_NF_ND\000" |
| 49641 | /* 12668 */ "DEC64m_NF_ND\000" |
| 49642 | /* 12681 */ "INC64m_NF_ND\000" |
| 49643 | /* 12694 */ "NEG64m_NF_ND\000" |
| 49644 | /* 12707 */ "DEC16m_NF_ND\000" |
| 49645 | /* 12720 */ "INC16m_NF_ND\000" |
| 49646 | /* 12733 */ "NEG16m_NF_ND\000" |
| 49647 | /* 12746 */ "DEC8m_NF_ND\000" |
| 49648 | /* 12758 */ "INC8m_NF_ND\000" |
| 49649 | /* 12770 */ "NEG8m_NF_ND\000" |
| 49650 | /* 12782 */ "SUB32rm_NF_ND\000" |
| 49651 | /* 12796 */ "ADD32rm_NF_ND\000" |
| 49652 | /* 12810 */ "AND32rm_NF_ND\000" |
| 49653 | /* 12824 */ "IMUL32rm_NF_ND\000" |
| 49654 | /* 12839 */ "XOR32rm_NF_ND\000" |
| 49655 | /* 12853 */ "SUB64rm_NF_ND\000" |
| 49656 | /* 12867 */ "ADD64rm_NF_ND\000" |
| 49657 | /* 12881 */ "AND64rm_NF_ND\000" |
| 49658 | /* 12895 */ "IMUL64rm_NF_ND\000" |
| 49659 | /* 12910 */ "XOR64rm_NF_ND\000" |
| 49660 | /* 12924 */ "SUB16rm_NF_ND\000" |
| 49661 | /* 12938 */ "ADD16rm_NF_ND\000" |
| 49662 | /* 12952 */ "AND16rm_NF_ND\000" |
| 49663 | /* 12966 */ "IMUL16rm_NF_ND\000" |
| 49664 | /* 12981 */ "XOR16rm_NF_ND\000" |
| 49665 | /* 12995 */ "SUB8rm_NF_ND\000" |
| 49666 | /* 13008 */ "ADD8rm_NF_ND\000" |
| 49667 | /* 13021 */ "AND8rm_NF_ND\000" |
| 49668 | /* 13034 */ "XOR8rm_NF_ND\000" |
| 49669 | /* 13047 */ "DEC32r_NF_ND\000" |
| 49670 | /* 13060 */ "INC32r_NF_ND\000" |
| 49671 | /* 13073 */ "NEG32r_NF_ND\000" |
| 49672 | /* 13086 */ "DEC64r_NF_ND\000" |
| 49673 | /* 13099 */ "INC64r_NF_ND\000" |
| 49674 | /* 13112 */ "NEG64r_NF_ND\000" |
| 49675 | /* 13125 */ "DEC16r_NF_ND\000" |
| 49676 | /* 13138 */ "INC16r_NF_ND\000" |
| 49677 | /* 13151 */ "NEG16r_NF_ND\000" |
| 49678 | /* 13164 */ "DEC8r_NF_ND\000" |
| 49679 | /* 13176 */ "INC8r_NF_ND\000" |
| 49680 | /* 13188 */ "NEG8r_NF_ND\000" |
| 49681 | /* 13200 */ "SUB32mr_NF_ND\000" |
| 49682 | /* 13214 */ "ADD32mr_NF_ND\000" |
| 49683 | /* 13228 */ "AND32mr_NF_ND\000" |
| 49684 | /* 13242 */ "XOR32mr_NF_ND\000" |
| 49685 | /* 13256 */ "SUB64mr_NF_ND\000" |
| 49686 | /* 13270 */ "ADD64mr_NF_ND\000" |
| 49687 | /* 13284 */ "AND64mr_NF_ND\000" |
| 49688 | /* 13298 */ "XOR64mr_NF_ND\000" |
| 49689 | /* 13312 */ "SUB16mr_NF_ND\000" |
| 49690 | /* 13326 */ "ADD16mr_NF_ND\000" |
| 49691 | /* 13340 */ "AND16mr_NF_ND\000" |
| 49692 | /* 13354 */ "XOR16mr_NF_ND\000" |
| 49693 | /* 13368 */ "SUB8mr_NF_ND\000" |
| 49694 | /* 13381 */ "ADD8mr_NF_ND\000" |
| 49695 | /* 13394 */ "AND8mr_NF_ND\000" |
| 49696 | /* 13407 */ "XOR8mr_NF_ND\000" |
| 49697 | /* 13420 */ "SUB32rr_NF_ND\000" |
| 49698 | /* 13434 */ "ADD32rr_NF_ND\000" |
| 49699 | /* 13448 */ "AND32rr_NF_ND\000" |
| 49700 | /* 13462 */ "IMUL32rr_NF_ND\000" |
| 49701 | /* 13477 */ "XOR32rr_NF_ND\000" |
| 49702 | /* 13491 */ "SUB64rr_NF_ND\000" |
| 49703 | /* 13505 */ "ADD64rr_NF_ND\000" |
| 49704 | /* 13519 */ "AND64rr_NF_ND\000" |
| 49705 | /* 13533 */ "IMUL64rr_NF_ND\000" |
| 49706 | /* 13548 */ "XOR64rr_NF_ND\000" |
| 49707 | /* 13562 */ "SUB16rr_NF_ND\000" |
| 49708 | /* 13576 */ "ADD16rr_NF_ND\000" |
| 49709 | /* 13590 */ "AND16rr_NF_ND\000" |
| 49710 | /* 13604 */ "IMUL16rr_NF_ND\000" |
| 49711 | /* 13619 */ "XOR16rr_NF_ND\000" |
| 49712 | /* 13633 */ "SUB8rr_NF_ND\000" |
| 49713 | /* 13646 */ "ADD8rr_NF_ND\000" |
| 49714 | /* 13659 */ "AND8rr_NF_ND\000" |
| 49715 | /* 13672 */ "XOR8rr_NF_ND\000" |
| 49716 | /* 13685 */ "RCL32mCL_ND\000" |
| 49717 | /* 13697 */ "SHL32mCL_ND\000" |
| 49718 | /* 13709 */ "ROL32mCL_ND\000" |
| 49719 | /* 13721 */ "SAR32mCL_ND\000" |
| 49720 | /* 13733 */ "RCR32mCL_ND\000" |
| 49721 | /* 13745 */ "SHR32mCL_ND\000" |
| 49722 | /* 13757 */ "ROR32mCL_ND\000" |
| 49723 | /* 13769 */ "RCL64mCL_ND\000" |
| 49724 | /* 13781 */ "SHL64mCL_ND\000" |
| 49725 | /* 13793 */ "ROL64mCL_ND\000" |
| 49726 | /* 13805 */ "SAR64mCL_ND\000" |
| 49727 | /* 13817 */ "RCR64mCL_ND\000" |
| 49728 | /* 13829 */ "SHR64mCL_ND\000" |
| 49729 | /* 13841 */ "ROR64mCL_ND\000" |
| 49730 | /* 13853 */ "RCL16mCL_ND\000" |
| 49731 | /* 13865 */ "SHL16mCL_ND\000" |
| 49732 | /* 13877 */ "ROL16mCL_ND\000" |
| 49733 | /* 13889 */ "SAR16mCL_ND\000" |
| 49734 | /* 13901 */ "RCR16mCL_ND\000" |
| 49735 | /* 13913 */ "SHR16mCL_ND\000" |
| 49736 | /* 13925 */ "ROR16mCL_ND\000" |
| 49737 | /* 13937 */ "RCL8mCL_ND\000" |
| 49738 | /* 13948 */ "SHL8mCL_ND\000" |
| 49739 | /* 13959 */ "ROL8mCL_ND\000" |
| 49740 | /* 13970 */ "SAR8mCL_ND\000" |
| 49741 | /* 13981 */ "RCR8mCL_ND\000" |
| 49742 | /* 13992 */ "SHR8mCL_ND\000" |
| 49743 | /* 14003 */ "ROR8mCL_ND\000" |
| 49744 | /* 14014 */ "RCL32rCL_ND\000" |
| 49745 | /* 14026 */ "SHL32rCL_ND\000" |
| 49746 | /* 14038 */ "ROL32rCL_ND\000" |
| 49747 | /* 14050 */ "SAR32rCL_ND\000" |
| 49748 | /* 14062 */ "RCR32rCL_ND\000" |
| 49749 | /* 14074 */ "SHR32rCL_ND\000" |
| 49750 | /* 14086 */ "ROR32rCL_ND\000" |
| 49751 | /* 14098 */ "RCL64rCL_ND\000" |
| 49752 | /* 14110 */ "SHL64rCL_ND\000" |
| 49753 | /* 14122 */ "ROL64rCL_ND\000" |
| 49754 | /* 14134 */ "SAR64rCL_ND\000" |
| 49755 | /* 14146 */ "RCR64rCL_ND\000" |
| 49756 | /* 14158 */ "SHR64rCL_ND\000" |
| 49757 | /* 14170 */ "ROR64rCL_ND\000" |
| 49758 | /* 14182 */ "RCL16rCL_ND\000" |
| 49759 | /* 14194 */ "SHL16rCL_ND\000" |
| 49760 | /* 14206 */ "ROL16rCL_ND\000" |
| 49761 | /* 14218 */ "SAR16rCL_ND\000" |
| 49762 | /* 14230 */ "RCR16rCL_ND\000" |
| 49763 | /* 14242 */ "SHR16rCL_ND\000" |
| 49764 | /* 14254 */ "ROR16rCL_ND\000" |
| 49765 | /* 14266 */ "RCL8rCL_ND\000" |
| 49766 | /* 14277 */ "SHL8rCL_ND\000" |
| 49767 | /* 14288 */ "ROL8rCL_ND\000" |
| 49768 | /* 14299 */ "SAR8rCL_ND\000" |
| 49769 | /* 14310 */ "RCR8rCL_ND\000" |
| 49770 | /* 14321 */ "SHR8rCL_ND\000" |
| 49771 | /* 14332 */ "ROR8rCL_ND\000" |
| 49772 | /* 14343 */ "SHLD32mrCL_ND\000" |
| 49773 | /* 14357 */ "SHRD32mrCL_ND\000" |
| 49774 | /* 14371 */ "SHLD64mrCL_ND\000" |
| 49775 | /* 14385 */ "SHRD64mrCL_ND\000" |
| 49776 | /* 14399 */ "SHLD16mrCL_ND\000" |
| 49777 | /* 14413 */ "SHRD16mrCL_ND\000" |
| 49778 | /* 14427 */ "SHLD32rrCL_ND\000" |
| 49779 | /* 14441 */ "SHRD32rrCL_ND\000" |
| 49780 | /* 14455 */ "SHLD64rrCL_ND\000" |
| 49781 | /* 14469 */ "SHRD64rrCL_ND\000" |
| 49782 | /* 14483 */ "SHLD16rrCL_ND\000" |
| 49783 | /* 14497 */ "SHRD16rrCL_ND\000" |
| 49784 | /* 14511 */ "SBB32mi_ND\000" |
| 49785 | /* 14522 */ "SUB32mi_ND\000" |
| 49786 | /* 14533 */ "ADC32mi_ND\000" |
| 49787 | /* 14544 */ "ADD32mi_ND\000" |
| 49788 | /* 14555 */ "AND32mi_ND\000" |
| 49789 | /* 14566 */ "RCL32mi_ND\000" |
| 49790 | /* 14577 */ "SHL32mi_ND\000" |
| 49791 | /* 14588 */ "ROL32mi_ND\000" |
| 49792 | /* 14599 */ "SAR32mi_ND\000" |
| 49793 | /* 14610 */ "RCR32mi_ND\000" |
| 49794 | /* 14621 */ "SHR32mi_ND\000" |
| 49795 | /* 14632 */ "ROR32mi_ND\000" |
| 49796 | /* 14643 */ "XOR32mi_ND\000" |
| 49797 | /* 14654 */ "RCL64mi_ND\000" |
| 49798 | /* 14665 */ "SHL64mi_ND\000" |
| 49799 | /* 14676 */ "ROL64mi_ND\000" |
| 49800 | /* 14687 */ "SAR64mi_ND\000" |
| 49801 | /* 14698 */ "RCR64mi_ND\000" |
| 49802 | /* 14709 */ "SHR64mi_ND\000" |
| 49803 | /* 14720 */ "ROR64mi_ND\000" |
| 49804 | /* 14731 */ "SBB16mi_ND\000" |
| 49805 | /* 14742 */ "SUB16mi_ND\000" |
| 49806 | /* 14753 */ "ADC16mi_ND\000" |
| 49807 | /* 14764 */ "ADD16mi_ND\000" |
| 49808 | /* 14775 */ "AND16mi_ND\000" |
| 49809 | /* 14786 */ "RCL16mi_ND\000" |
| 49810 | /* 14797 */ "SHL16mi_ND\000" |
| 49811 | /* 14808 */ "ROL16mi_ND\000" |
| 49812 | /* 14819 */ "SAR16mi_ND\000" |
| 49813 | /* 14830 */ "RCR16mi_ND\000" |
| 49814 | /* 14841 */ "SHR16mi_ND\000" |
| 49815 | /* 14852 */ "ROR16mi_ND\000" |
| 49816 | /* 14863 */ "XOR16mi_ND\000" |
| 49817 | /* 14874 */ "SBB8mi_ND\000" |
| 49818 | /* 14884 */ "SUB8mi_ND\000" |
| 49819 | /* 14894 */ "ADC8mi_ND\000" |
| 49820 | /* 14904 */ "ADD8mi_ND\000" |
| 49821 | /* 14914 */ "AND8mi_ND\000" |
| 49822 | /* 14924 */ "RCL8mi_ND\000" |
| 49823 | /* 14934 */ "SHL8mi_ND\000" |
| 49824 | /* 14944 */ "ROL8mi_ND\000" |
| 49825 | /* 14954 */ "SAR8mi_ND\000" |
| 49826 | /* 14964 */ "RCR8mi_ND\000" |
| 49827 | /* 14974 */ "SHR8mi_ND\000" |
| 49828 | /* 14984 */ "ROR8mi_ND\000" |
| 49829 | /* 14994 */ "XOR8mi_ND\000" |
| 49830 | /* 15004 */ "SBB32ri_ND\000" |
| 49831 | /* 15015 */ "SUB32ri_ND\000" |
| 49832 | /* 15026 */ "ADC32ri_ND\000" |
| 49833 | /* 15037 */ "ADD32ri_ND\000" |
| 49834 | /* 15048 */ "AND32ri_ND\000" |
| 49835 | /* 15059 */ "RCL32ri_ND\000" |
| 49836 | /* 15070 */ "SHL32ri_ND\000" |
| 49837 | /* 15081 */ "ROL32ri_ND\000" |
| 49838 | /* 15092 */ "SAR32ri_ND\000" |
| 49839 | /* 15103 */ "RCR32ri_ND\000" |
| 49840 | /* 15114 */ "SHR32ri_ND\000" |
| 49841 | /* 15125 */ "ROR32ri_ND\000" |
| 49842 | /* 15136 */ "XOR32ri_ND\000" |
| 49843 | /* 15147 */ "RCL64ri_ND\000" |
| 49844 | /* 15158 */ "SHL64ri_ND\000" |
| 49845 | /* 15169 */ "ROL64ri_ND\000" |
| 49846 | /* 15180 */ "SAR64ri_ND\000" |
| 49847 | /* 15191 */ "RCR64ri_ND\000" |
| 49848 | /* 15202 */ "SHR64ri_ND\000" |
| 49849 | /* 15213 */ "ROR64ri_ND\000" |
| 49850 | /* 15224 */ "SBB16ri_ND\000" |
| 49851 | /* 15235 */ "SUB16ri_ND\000" |
| 49852 | /* 15246 */ "ADC16ri_ND\000" |
| 49853 | /* 15257 */ "ADD16ri_ND\000" |
| 49854 | /* 15268 */ "AND16ri_ND\000" |
| 49855 | /* 15279 */ "RCL16ri_ND\000" |
| 49856 | /* 15290 */ "SHL16ri_ND\000" |
| 49857 | /* 15301 */ "ROL16ri_ND\000" |
| 49858 | /* 15312 */ "SAR16ri_ND\000" |
| 49859 | /* 15323 */ "RCR16ri_ND\000" |
| 49860 | /* 15334 */ "SHR16ri_ND\000" |
| 49861 | /* 15345 */ "ROR16ri_ND\000" |
| 49862 | /* 15356 */ "XOR16ri_ND\000" |
| 49863 | /* 15367 */ "SBB8ri_ND\000" |
| 49864 | /* 15377 */ "SUB8ri_ND\000" |
| 49865 | /* 15387 */ "ADC8ri_ND\000" |
| 49866 | /* 15397 */ "ADD8ri_ND\000" |
| 49867 | /* 15407 */ "AND8ri_ND\000" |
| 49868 | /* 15417 */ "RCL8ri_ND\000" |
| 49869 | /* 15427 */ "SHL8ri_ND\000" |
| 49870 | /* 15437 */ "ROL8ri_ND\000" |
| 49871 | /* 15447 */ "SAR8ri_ND\000" |
| 49872 | /* 15457 */ "RCR8ri_ND\000" |
| 49873 | /* 15467 */ "SHR8ri_ND\000" |
| 49874 | /* 15477 */ "ROR8ri_ND\000" |
| 49875 | /* 15487 */ "XOR8ri_ND\000" |
| 49876 | /* 15497 */ "DEC32m_ND\000" |
| 49877 | /* 15507 */ "INC32m_ND\000" |
| 49878 | /* 15517 */ "NEG32m_ND\000" |
| 49879 | /* 15527 */ "NOT32m_ND\000" |
| 49880 | /* 15537 */ "DEC64m_ND\000" |
| 49881 | /* 15547 */ "INC64m_ND\000" |
| 49882 | /* 15557 */ "NEG64m_ND\000" |
| 49883 | /* 15567 */ "NOT64m_ND\000" |
| 49884 | /* 15577 */ "DEC16m_ND\000" |
| 49885 | /* 15587 */ "INC16m_ND\000" |
| 49886 | /* 15597 */ "NEG16m_ND\000" |
| 49887 | /* 15607 */ "NOT16m_ND\000" |
| 49888 | /* 15617 */ "DEC8m_ND\000" |
| 49889 | /* 15626 */ "INC8m_ND\000" |
| 49890 | /* 15635 */ "NEG8m_ND\000" |
| 49891 | /* 15644 */ "NOT8m_ND\000" |
| 49892 | /* 15653 */ "SBB32rm_ND\000" |
| 49893 | /* 15664 */ "SUB32rm_ND\000" |
| 49894 | /* 15675 */ "ADC32rm_ND\000" |
| 49895 | /* 15686 */ "ADD32rm_ND\000" |
| 49896 | /* 15697 */ "AND32rm_ND\000" |
| 49897 | /* 15708 */ "IMUL32rm_ND\000" |
| 49898 | /* 15720 */ "XOR32rm_ND\000" |
| 49899 | /* 15731 */ "CFCMOV32rm_ND\000" |
| 49900 | /* 15745 */ "ADCX32rm_ND\000" |
| 49901 | /* 15757 */ "ADOX32rm_ND\000" |
| 49902 | /* 15769 */ "SBB64rm_ND\000" |
| 49903 | /* 15780 */ "SUB64rm_ND\000" |
| 49904 | /* 15791 */ "ADC64rm_ND\000" |
| 49905 | /* 15802 */ "ADD64rm_ND\000" |
| 49906 | /* 15813 */ "AND64rm_ND\000" |
| 49907 | /* 15824 */ "IMUL64rm_ND\000" |
| 49908 | /* 15836 */ "XOR64rm_ND\000" |
| 49909 | /* 15847 */ "CFCMOV64rm_ND\000" |
| 49910 | /* 15861 */ "ADCX64rm_ND\000" |
| 49911 | /* 15873 */ "ADOX64rm_ND\000" |
| 49912 | /* 15885 */ "SBB16rm_ND\000" |
| 49913 | /* 15896 */ "SUB16rm_ND\000" |
| 49914 | /* 15907 */ "ADC16rm_ND\000" |
| 49915 | /* 15918 */ "ADD16rm_ND\000" |
| 49916 | /* 15929 */ "AND16rm_ND\000" |
| 49917 | /* 15940 */ "IMUL16rm_ND\000" |
| 49918 | /* 15952 */ "XOR16rm_ND\000" |
| 49919 | /* 15963 */ "CFCMOV16rm_ND\000" |
| 49920 | /* 15977 */ "SBB8rm_ND\000" |
| 49921 | /* 15987 */ "SUB8rm_ND\000" |
| 49922 | /* 15997 */ "ADC8rm_ND\000" |
| 49923 | /* 16007 */ "ADD8rm_ND\000" |
| 49924 | /* 16017 */ "AND8rm_ND\000" |
| 49925 | /* 16027 */ "XOR8rm_ND\000" |
| 49926 | /* 16037 */ "DEC32r_ND\000" |
| 49927 | /* 16047 */ "INC32r_ND\000" |
| 49928 | /* 16057 */ "NEG32r_ND\000" |
| 49929 | /* 16067 */ "NOT32r_ND\000" |
| 49930 | /* 16077 */ "DEC64r_ND\000" |
| 49931 | /* 16087 */ "INC64r_ND\000" |
| 49932 | /* 16097 */ "NEG64r_ND\000" |
| 49933 | /* 16107 */ "NOT64r_ND\000" |
| 49934 | /* 16117 */ "DEC16r_ND\000" |
| 49935 | /* 16127 */ "INC16r_ND\000" |
| 49936 | /* 16137 */ "NEG16r_ND\000" |
| 49937 | /* 16147 */ "NOT16r_ND\000" |
| 49938 | /* 16157 */ "DEC8r_ND\000" |
| 49939 | /* 16166 */ "INC8r_ND\000" |
| 49940 | /* 16175 */ "NEG8r_ND\000" |
| 49941 | /* 16184 */ "NOT8r_ND\000" |
| 49942 | /* 16193 */ "SBB32mr_ND\000" |
| 49943 | /* 16204 */ "SUB32mr_ND\000" |
| 49944 | /* 16215 */ "ADC32mr_ND\000" |
| 49945 | /* 16226 */ "ADD32mr_ND\000" |
| 49946 | /* 16237 */ "AND32mr_ND\000" |
| 49947 | /* 16248 */ "XOR32mr_ND\000" |
| 49948 | /* 16259 */ "SBB64mr_ND\000" |
| 49949 | /* 16270 */ "SUB64mr_ND\000" |
| 49950 | /* 16281 */ "ADC64mr_ND\000" |
| 49951 | /* 16292 */ "ADD64mr_ND\000" |
| 49952 | /* 16303 */ "AND64mr_ND\000" |
| 49953 | /* 16314 */ "XOR64mr_ND\000" |
| 49954 | /* 16325 */ "SBB16mr_ND\000" |
| 49955 | /* 16336 */ "SUB16mr_ND\000" |
| 49956 | /* 16347 */ "ADC16mr_ND\000" |
| 49957 | /* 16358 */ "ADD16mr_ND\000" |
| 49958 | /* 16369 */ "AND16mr_ND\000" |
| 49959 | /* 16380 */ "XOR16mr_ND\000" |
| 49960 | /* 16391 */ "SBB8mr_ND\000" |
| 49961 | /* 16401 */ "SUB8mr_ND\000" |
| 49962 | /* 16411 */ "ADC8mr_ND\000" |
| 49963 | /* 16421 */ "ADD8mr_ND\000" |
| 49964 | /* 16431 */ "AND8mr_ND\000" |
| 49965 | /* 16441 */ "XOR8mr_ND\000" |
| 49966 | /* 16451 */ "SBB32rr_ND\000" |
| 49967 | /* 16462 */ "SUB32rr_ND\000" |
| 49968 | /* 16473 */ "ADC32rr_ND\000" |
| 49969 | /* 16484 */ "ADD32rr_ND\000" |
| 49970 | /* 16495 */ "AND32rr_ND\000" |
| 49971 | /* 16506 */ "IMUL32rr_ND\000" |
| 49972 | /* 16518 */ "XOR32rr_ND\000" |
| 49973 | /* 16529 */ "CFCMOV32rr_ND\000" |
| 49974 | /* 16543 */ "ADCX32rr_ND\000" |
| 49975 | /* 16555 */ "ADOX32rr_ND\000" |
| 49976 | /* 16567 */ "SBB64rr_ND\000" |
| 49977 | /* 16578 */ "SUB64rr_ND\000" |
| 49978 | /* 16589 */ "ADC64rr_ND\000" |
| 49979 | /* 16600 */ "ADD64rr_ND\000" |
| 49980 | /* 16611 */ "AND64rr_ND\000" |
| 49981 | /* 16622 */ "IMUL64rr_ND\000" |
| 49982 | /* 16634 */ "XOR64rr_ND\000" |
| 49983 | /* 16645 */ "CFCMOV64rr_ND\000" |
| 49984 | /* 16659 */ "ADCX64rr_ND\000" |
| 49985 | /* 16671 */ "ADOX64rr_ND\000" |
| 49986 | /* 16683 */ "SBB16rr_ND\000" |
| 49987 | /* 16694 */ "SUB16rr_ND\000" |
| 49988 | /* 16705 */ "ADC16rr_ND\000" |
| 49989 | /* 16716 */ "ADD16rr_ND\000" |
| 49990 | /* 16727 */ "AND16rr_ND\000" |
| 49991 | /* 16738 */ "IMUL16rr_ND\000" |
| 49992 | /* 16750 */ "XOR16rr_ND\000" |
| 49993 | /* 16761 */ "CFCMOV16rr_ND\000" |
| 49994 | /* 16775 */ "SBB8rr_ND\000" |
| 49995 | /* 16785 */ "SUB8rr_ND\000" |
| 49996 | /* 16795 */ "ADC8rr_ND\000" |
| 49997 | /* 16805 */ "ADD8rr_ND\000" |
| 49998 | /* 16815 */ "AND8rr_ND\000" |
| 49999 | /* 16825 */ "XOR8rr_ND\000" |
| 50000 | /* 16835 */ "INCSSPD\000" |
| 50001 | /* 16843 */ "RDSSPD\000" |
| 50002 | /* 16850 */ "LOAD_STACK_GUARD\000" |
| 50003 | /* 16867 */ "AVX512_FsFLD0SD\000" |
| 50004 | /* 16883 */ "PTDPBSSD\000" |
| 50005 | /* 16892 */ "WRSSD\000" |
| 50006 | /* 16898 */ "WRUSSD\000" |
| 50007 | /* 16905 */ "MOVNTSD\000" |
| 50008 | /* 16913 */ "PTDPBUSD\000" |
| 50009 | /* 16922 */ "STD\000" |
| 50010 | /* 16926 */ "PTDPBSUD\000" |
| 50011 | /* 16935 */ "PTDPBUUD\000" |
| 50012 | /* 16944 */ "WBINVD\000" |
| 50013 | /* 16951 */ "WBNOINVD\000" |
| 50014 | /* 16960 */ "CWD\000" |
| 50015 | /* 16964 */ "FLDL2E\000" |
| 50016 | /* 16971 */ "PSEUDO_PROBE\000" |
| 50017 | /* 16984 */ "G_SSUBE\000" |
| 50018 | /* 16992 */ "G_USUBE\000" |
| 50019 | /* 17000 */ "LFENCE\000" |
| 50020 | /* 17007 */ "MFENCE\000" |
| 50021 | /* 17014 */ "SFENCE\000" |
| 50022 | /* 17021 */ "G_FENCE\000" |
| 50023 | /* 17029 */ "ARITH_FENCE\000" |
| 50024 | /* 17041 */ "REG_SEQUENCE\000" |
| 50025 | /* 17054 */ "G_SADDE\000" |
| 50026 | /* 17062 */ "G_UADDE\000" |
| 50027 | /* 17070 */ "G_GET_FPMODE\000" |
| 50028 | /* 17083 */ "G_RESET_FPMODE\000" |
| 50029 | /* 17098 */ "G_SET_FPMODE\000" |
| 50030 | /* 17111 */ "CWDE\000" |
| 50031 | /* 17116 */ "G_FMINNUM_IEEE\000" |
| 50032 | /* 17131 */ "G_FMAXNUM_IEEE\000" |
| 50033 | /* 17146 */ "FFREE\000" |
| 50034 | /* 17152 */ "FSCALE\000" |
| 50035 | /* 17159 */ "G_VSCALE\000" |
| 50036 | /* 17168 */ "G_JUMP_TABLE\000" |
| 50037 | /* 17181 */ "BUNDLE\000" |
| 50038 | /* 17188 */ "VMRESUME\000" |
| 50039 | /* 17197 */ "G_MEMCPY_INLINE\000" |
| 50040 | /* 17213 */ "LOOPNE\000" |
| 50041 | /* 17220 */ "LOCAL_ESCAPE\000" |
| 50042 | /* 17233 */ "LOOPE\000" |
| 50043 | /* 17239 */ "CDQE\000" |
| 50044 | /* 17244 */ "MASKPAIR16STORE\000" |
| 50045 | /* 17260 */ "G_STACKRESTORE\000" |
| 50046 | /* 17275 */ "PTILEPAIRSTORE\000" |
| 50047 | /* 17290 */ "XSTORE\000" |
| 50048 | /* 17297 */ "G_INDEXED_STORE\000" |
| 50049 | /* 17313 */ "G_STORE\000" |
| 50050 | /* 17321 */ "RDFSBASE\000" |
| 50051 | /* 17330 */ "WRFSBASE\000" |
| 50052 | /* 17339 */ "RDGSBASE\000" |
| 50053 | /* 17348 */ "WRGSBASE\000" |
| 50054 | /* 17357 */ "TILERELEASE\000" |
| 50055 | /* 17369 */ "G_BITREVERSE\000" |
| 50056 | /* 17382 */ "TPAUSE\000" |
| 50057 | /* 17389 */ "FAKE_USE\000" |
| 50058 | /* 17398 */ "RMPUPDATE\000" |
| 50059 | /* 17408 */ "CLDEMOTE\000" |
| 50060 | /* 17417 */ "DBG_VALUE\000" |
| 50061 | /* 17427 */ "G_GLOBAL_VALUE\000" |
| 50062 | /* 17442 */ "G_PTRAUTH_GLOBAL_VALUE\000" |
| 50063 | /* 17465 */ "CONVERGENCECTRL_GLUE\000" |
| 50064 | /* 17486 */ "LEAVE\000" |
| 50065 | /* 17492 */ "G_STACKSAVE\000" |
| 50066 | /* 17504 */ "FXSAVE\000" |
| 50067 | /* 17511 */ "G_MEMMOVE\000" |
| 50068 | /* 17521 */ "G_FREEZE\000" |
| 50069 | /* 17530 */ "G_FCANONICALIZE\000" |
| 50070 | /* 17546 */ "SERIALIZE\000" |
| 50071 | /* 17556 */ "G_CTLZ_ZERO_UNDEF\000" |
| 50072 | /* 17574 */ "G_CTTZ_ZERO_UNDEF\000" |
| 50073 | /* 17592 */ "INIT_UNDEF\000" |
| 50074 | /* 17603 */ "G_IMPLICIT_DEF\000" |
| 50075 | /* 17618 */ "XABORT_DEF\000" |
| 50076 | /* 17629 */ "DBG_INSTR_REF\000" |
| 50077 | /* 17643 */ "VMXOFF\000" |
| 50078 | /* 17650 */ "LAHF\000" |
| 50079 | /* 17655 */ "SAHF\000" |
| 50080 | /* 17660 */ "SHL32m1_NF\000" |
| 50081 | /* 17671 */ "ROL32m1_NF\000" |
| 50082 | /* 17682 */ "SAR32m1_NF\000" |
| 50083 | /* 17693 */ "SHR32m1_NF\000" |
| 50084 | /* 17704 */ "ROR32m1_NF\000" |
| 50085 | /* 17715 */ "SHL64m1_NF\000" |
| 50086 | /* 17726 */ "ROL64m1_NF\000" |
| 50087 | /* 17737 */ "SAR64m1_NF\000" |
| 50088 | /* 17748 */ "SHR64m1_NF\000" |
| 50089 | /* 17759 */ "ROR64m1_NF\000" |
| 50090 | /* 17770 */ "SHL16m1_NF\000" |
| 50091 | /* 17781 */ "ROL16m1_NF\000" |
| 50092 | /* 17792 */ "SAR16m1_NF\000" |
| 50093 | /* 17803 */ "SHR16m1_NF\000" |
| 50094 | /* 17814 */ "ROR16m1_NF\000" |
| 50095 | /* 17825 */ "SHL8m1_NF\000" |
| 50096 | /* 17835 */ "ROL8m1_NF\000" |
| 50097 | /* 17845 */ "SAR8m1_NF\000" |
| 50098 | /* 17855 */ "SHR8m1_NF\000" |
| 50099 | /* 17865 */ "ROR8m1_NF\000" |
| 50100 | /* 17875 */ "SHL32r1_NF\000" |
| 50101 | /* 17886 */ "ROL32r1_NF\000" |
| 50102 | /* 17897 */ "SAR32r1_NF\000" |
| 50103 | /* 17908 */ "SHR32r1_NF\000" |
| 50104 | /* 17919 */ "ROR32r1_NF\000" |
| 50105 | /* 17930 */ "SHL64r1_NF\000" |
| 50106 | /* 17941 */ "ROL64r1_NF\000" |
| 50107 | /* 17952 */ "SAR64r1_NF\000" |
| 50108 | /* 17963 */ "SHR64r1_NF\000" |
| 50109 | /* 17974 */ "ROR64r1_NF\000" |
| 50110 | /* 17985 */ "SHL16r1_NF\000" |
| 50111 | /* 17996 */ "ROL16r1_NF\000" |
| 50112 | /* 18007 */ "SAR16r1_NF\000" |
| 50113 | /* 18018 */ "SHR16r1_NF\000" |
| 50114 | /* 18029 */ "ROR16r1_NF\000" |
| 50115 | /* 18040 */ "SHL8r1_NF\000" |
| 50116 | /* 18050 */ "ROL8r1_NF\000" |
| 50117 | /* 18060 */ "SAR8r1_NF\000" |
| 50118 | /* 18070 */ "SHR8r1_NF\000" |
| 50119 | /* 18080 */ "ROR8r1_NF\000" |
| 50120 | /* 18090 */ "SUB64mi32_NF\000" |
| 50121 | /* 18103 */ "ADD64mi32_NF\000" |
| 50122 | /* 18116 */ "AND64mi32_NF\000" |
| 50123 | /* 18129 */ "XOR64mi32_NF\000" |
| 50124 | /* 18142 */ "IMUL64rmi32_NF\000" |
| 50125 | /* 18157 */ "SUB64ri32_NF\000" |
| 50126 | /* 18170 */ "ADD64ri32_NF\000" |
| 50127 | /* 18183 */ "AND64ri32_NF\000" |
| 50128 | /* 18196 */ "XOR64ri32_NF\000" |
| 50129 | /* 18209 */ "IMUL64rri32_NF\000" |
| 50130 | /* 18224 */ "SUB32mi8_NF\000" |
| 50131 | /* 18236 */ "ADD32mi8_NF\000" |
| 50132 | /* 18248 */ "AND32mi8_NF\000" |
| 50133 | /* 18260 */ "XOR32mi8_NF\000" |
| 50134 | /* 18272 */ "SUB64mi8_NF\000" |
| 50135 | /* 18284 */ "ADD64mi8_NF\000" |
| 50136 | /* 18296 */ "AND64mi8_NF\000" |
| 50137 | /* 18308 */ "XOR64mi8_NF\000" |
| 50138 | /* 18320 */ "SUB16mi8_NF\000" |
| 50139 | /* 18332 */ "ADD16mi8_NF\000" |
| 50140 | /* 18344 */ "AND16mi8_NF\000" |
| 50141 | /* 18356 */ "XOR16mi8_NF\000" |
| 50142 | /* 18368 */ "IMUL32rmi8_NF\000" |
| 50143 | /* 18382 */ "IMUL64rmi8_NF\000" |
| 50144 | /* 18396 */ "IMUL16rmi8_NF\000" |
| 50145 | /* 18410 */ "SUB32ri8_NF\000" |
| 50146 | /* 18422 */ "ADD32ri8_NF\000" |
| 50147 | /* 18434 */ "AND32ri8_NF\000" |
| 50148 | /* 18446 */ "XOR32ri8_NF\000" |
| 50149 | /* 18458 */ "SUB64ri8_NF\000" |
| 50150 | /* 18470 */ "ADD64ri8_NF\000" |
| 50151 | /* 18482 */ "AND64ri8_NF\000" |
| 50152 | /* 18494 */ "XOR64ri8_NF\000" |
| 50153 | /* 18506 */ "SUB16ri8_NF\000" |
| 50154 | /* 18518 */ "ADD16ri8_NF\000" |
| 50155 | /* 18530 */ "AND16ri8_NF\000" |
| 50156 | /* 18542 */ "XOR16ri8_NF\000" |
| 50157 | /* 18554 */ "SHLD32mri8_NF\000" |
| 50158 | /* 18568 */ "SHRD32mri8_NF\000" |
| 50159 | /* 18582 */ "SHLD64mri8_NF\000" |
| 50160 | /* 18596 */ "SHRD64mri8_NF\000" |
| 50161 | /* 18610 */ "SHLD16mri8_NF\000" |
| 50162 | /* 18624 */ "SHRD16mri8_NF\000" |
| 50163 | /* 18638 */ "SHLD32rri8_NF\000" |
| 50164 | /* 18652 */ "SHRD32rri8_NF\000" |
| 50165 | /* 18666 */ "IMUL32rri8_NF\000" |
| 50166 | /* 18680 */ "SHLD64rri8_NF\000" |
| 50167 | /* 18694 */ "SHRD64rri8_NF\000" |
| 50168 | /* 18708 */ "IMUL64rri8_NF\000" |
| 50169 | /* 18722 */ "SHLD16rri8_NF\000" |
| 50170 | /* 18736 */ "SHRD16rri8_NF\000" |
| 50171 | /* 18750 */ "IMUL16rri8_NF\000" |
| 50172 | /* 18764 */ "SHL32mCL_NF\000" |
| 50173 | /* 18776 */ "ROL32mCL_NF\000" |
| 50174 | /* 18788 */ "SAR32mCL_NF\000" |
| 50175 | /* 18800 */ "SHR32mCL_NF\000" |
| 50176 | /* 18812 */ "ROR32mCL_NF\000" |
| 50177 | /* 18824 */ "SHL64mCL_NF\000" |
| 50178 | /* 18836 */ "ROL64mCL_NF\000" |
| 50179 | /* 18848 */ "SAR64mCL_NF\000" |
| 50180 | /* 18860 */ "SHR64mCL_NF\000" |
| 50181 | /* 18872 */ "ROR64mCL_NF\000" |
| 50182 | /* 18884 */ "SHL16mCL_NF\000" |
| 50183 | /* 18896 */ "ROL16mCL_NF\000" |
| 50184 | /* 18908 */ "SAR16mCL_NF\000" |
| 50185 | /* 18920 */ "SHR16mCL_NF\000" |
| 50186 | /* 18932 */ "ROR16mCL_NF\000" |
| 50187 | /* 18944 */ "SHL8mCL_NF\000" |
| 50188 | /* 18955 */ "ROL8mCL_NF\000" |
| 50189 | /* 18966 */ "SAR8mCL_NF\000" |
| 50190 | /* 18977 */ "SHR8mCL_NF\000" |
| 50191 | /* 18988 */ "ROR8mCL_NF\000" |
| 50192 | /* 18999 */ "SHL32rCL_NF\000" |
| 50193 | /* 19011 */ "ROL32rCL_NF\000" |
| 50194 | /* 19023 */ "SAR32rCL_NF\000" |
| 50195 | /* 19035 */ "SHR32rCL_NF\000" |
| 50196 | /* 19047 */ "ROR32rCL_NF\000" |
| 50197 | /* 19059 */ "SHL64rCL_NF\000" |
| 50198 | /* 19071 */ "ROL64rCL_NF\000" |
| 50199 | /* 19083 */ "SAR64rCL_NF\000" |
| 50200 | /* 19095 */ "SHR64rCL_NF\000" |
| 50201 | /* 19107 */ "ROR64rCL_NF\000" |
| 50202 | /* 19119 */ "SHL16rCL_NF\000" |
| 50203 | /* 19131 */ "ROL16rCL_NF\000" |
| 50204 | /* 19143 */ "SAR16rCL_NF\000" |
| 50205 | /* 19155 */ "SHR16rCL_NF\000" |
| 50206 | /* 19167 */ "ROR16rCL_NF\000" |
| 50207 | /* 19179 */ "SHL8rCL_NF\000" |
| 50208 | /* 19190 */ "ROL8rCL_NF\000" |
| 50209 | /* 19201 */ "SAR8rCL_NF\000" |
| 50210 | /* 19212 */ "SHR8rCL_NF\000" |
| 50211 | /* 19223 */ "ROR8rCL_NF\000" |
| 50212 | /* 19234 */ "SHLD32mrCL_NF\000" |
| 50213 | /* 19248 */ "SHRD32mrCL_NF\000" |
| 50214 | /* 19262 */ "SHLD64mrCL_NF\000" |
| 50215 | /* 19276 */ "SHRD64mrCL_NF\000" |
| 50216 | /* 19290 */ "SHLD16mrCL_NF\000" |
| 50217 | /* 19304 */ "SHRD16mrCL_NF\000" |
| 50218 | /* 19318 */ "SHLD32rrCL_NF\000" |
| 50219 | /* 19332 */ "SHRD32rrCL_NF\000" |
| 50220 | /* 19346 */ "SHLD64rrCL_NF\000" |
| 50221 | /* 19360 */ "SHRD64rrCL_NF\000" |
| 50222 | /* 19374 */ "SHLD16rrCL_NF\000" |
| 50223 | /* 19388 */ "SHRD16rrCL_NF\000" |
| 50224 | /* 19402 */ "SUB32mi_NF\000" |
| 50225 | /* 19413 */ "ADD32mi_NF\000" |
| 50226 | /* 19424 */ "AND32mi_NF\000" |
| 50227 | /* 19435 */ "SHL32mi_NF\000" |
| 50228 | /* 19446 */ "ROL32mi_NF\000" |
| 50229 | /* 19457 */ "SAR32mi_NF\000" |
| 50230 | /* 19468 */ "SHR32mi_NF\000" |
| 50231 | /* 19479 */ "ROR32mi_NF\000" |
| 50232 | /* 19490 */ "XOR32mi_NF\000" |
| 50233 | /* 19501 */ "SHL64mi_NF\000" |
| 50234 | /* 19512 */ "ROL64mi_NF\000" |
| 50235 | /* 19523 */ "SAR64mi_NF\000" |
| 50236 | /* 19534 */ "SHR64mi_NF\000" |
| 50237 | /* 19545 */ "ROR64mi_NF\000" |
| 50238 | /* 19556 */ "SUB16mi_NF\000" |
| 50239 | /* 19567 */ "ADD16mi_NF\000" |
| 50240 | /* 19578 */ "AND16mi_NF\000" |
| 50241 | /* 19589 */ "SHL16mi_NF\000" |
| 50242 | /* 19600 */ "ROL16mi_NF\000" |
| 50243 | /* 19611 */ "SAR16mi_NF\000" |
| 50244 | /* 19622 */ "SHR16mi_NF\000" |
| 50245 | /* 19633 */ "ROR16mi_NF\000" |
| 50246 | /* 19644 */ "XOR16mi_NF\000" |
| 50247 | /* 19655 */ "SUB8mi_NF\000" |
| 50248 | /* 19665 */ "ADD8mi_NF\000" |
| 50249 | /* 19675 */ "AND8mi_NF\000" |
| 50250 | /* 19685 */ "SHL8mi_NF\000" |
| 50251 | /* 19695 */ "ROL8mi_NF\000" |
| 50252 | /* 19705 */ "SAR8mi_NF\000" |
| 50253 | /* 19715 */ "SHR8mi_NF\000" |
| 50254 | /* 19725 */ "ROR8mi_NF\000" |
| 50255 | /* 19735 */ "XOR8mi_NF\000" |
| 50256 | /* 19745 */ "IMUL32rmi_NF\000" |
| 50257 | /* 19758 */ "IMUL16rmi_NF\000" |
| 50258 | /* 19771 */ "SUB32ri_NF\000" |
| 50259 | /* 19782 */ "ADD32ri_NF\000" |
| 50260 | /* 19793 */ "AND32ri_NF\000" |
| 50261 | /* 19804 */ "SHL32ri_NF\000" |
| 50262 | /* 19815 */ "ROL32ri_NF\000" |
| 50263 | /* 19826 */ "SAR32ri_NF\000" |
| 50264 | /* 19837 */ "SHR32ri_NF\000" |
| 50265 | /* 19848 */ "ROR32ri_NF\000" |
| 50266 | /* 19859 */ "XOR32ri_NF\000" |
| 50267 | /* 19870 */ "SHL64ri_NF\000" |
| 50268 | /* 19881 */ "ROL64ri_NF\000" |
| 50269 | /* 19892 */ "SAR64ri_NF\000" |
| 50270 | /* 19903 */ "SHR64ri_NF\000" |
| 50271 | /* 19914 */ "ROR64ri_NF\000" |
| 50272 | /* 19925 */ "SUB16ri_NF\000" |
| 50273 | /* 19936 */ "ADD16ri_NF\000" |
| 50274 | /* 19947 */ "AND16ri_NF\000" |
| 50275 | /* 19958 */ "SHL16ri_NF\000" |
| 50276 | /* 19969 */ "ROL16ri_NF\000" |
| 50277 | /* 19980 */ "SAR16ri_NF\000" |
| 50278 | /* 19991 */ "SHR16ri_NF\000" |
| 50279 | /* 20002 */ "ROR16ri_NF\000" |
| 50280 | /* 20013 */ "XOR16ri_NF\000" |
| 50281 | /* 20024 */ "SUB8ri_NF\000" |
| 50282 | /* 20034 */ "ADD8ri_NF\000" |
| 50283 | /* 20044 */ "AND8ri_NF\000" |
| 50284 | /* 20054 */ "SHL8ri_NF\000" |
| 50285 | /* 20064 */ "ROL8ri_NF\000" |
| 50286 | /* 20074 */ "SAR8ri_NF\000" |
| 50287 | /* 20084 */ "SHR8ri_NF\000" |
| 50288 | /* 20094 */ "ROR8ri_NF\000" |
| 50289 | /* 20104 */ "XOR8ri_NF\000" |
| 50290 | /* 20114 */ "IMUL32rri_NF\000" |
| 50291 | /* 20127 */ "IMUL16rri_NF\000" |
| 50292 | /* 20140 */ "DEC32m_NF\000" |
| 50293 | /* 20150 */ "INC32m_NF\000" |
| 50294 | /* 20160 */ "NEG32m_NF\000" |
| 50295 | /* 20170 */ "IMUL32m_NF\000" |
| 50296 | /* 20181 */ "IDIV32m_NF\000" |
| 50297 | /* 20192 */ "DEC64m_NF\000" |
| 50298 | /* 20202 */ "INC64m_NF\000" |
| 50299 | /* 20212 */ "NEG64m_NF\000" |
| 50300 | /* 20222 */ "IMUL64m_NF\000" |
| 50301 | /* 20233 */ "IDIV64m_NF\000" |
| 50302 | /* 20244 */ "DEC16m_NF\000" |
| 50303 | /* 20254 */ "INC16m_NF\000" |
| 50304 | /* 20264 */ "NEG16m_NF\000" |
| 50305 | /* 20274 */ "IMUL16m_NF\000" |
| 50306 | /* 20285 */ "IDIV16m_NF\000" |
| 50307 | /* 20296 */ "DEC8m_NF\000" |
| 50308 | /* 20305 */ "INC8m_NF\000" |
| 50309 | /* 20314 */ "NEG8m_NF\000" |
| 50310 | /* 20323 */ "IMUL8m_NF\000" |
| 50311 | /* 20333 */ "IDIV8m_NF\000" |
| 50312 | /* 20343 */ "SUB32rm_NF\000" |
| 50313 | /* 20354 */ "ADD32rm_NF\000" |
| 50314 | /* 20365 */ "AND32rm_NF\000" |
| 50315 | /* 20376 */ "BZHI32rm_NF\000" |
| 50316 | /* 20388 */ "BLSI32rm_NF\000" |
| 50317 | /* 20400 */ "BLSMSK32rm_NF\000" |
| 50318 | /* 20414 */ "IMUL32rm_NF\000" |
| 50319 | /* 20426 */ "ANDN32rm_NF\000" |
| 50320 | /* 20438 */ "XOR32rm_NF\000" |
| 50321 | /* 20449 */ "BLSR32rm_NF\000" |
| 50322 | /* 20461 */ "BEXTR32rm_NF\000" |
| 50323 | /* 20474 */ "POPCNT32rm_NF\000" |
| 50324 | /* 20488 */ "LZCNT32rm_NF\000" |
| 50325 | /* 20501 */ "TZCNT32rm_NF\000" |
| 50326 | /* 20514 */ "SUB64rm_NF\000" |
| 50327 | /* 20525 */ "ADD64rm_NF\000" |
| 50328 | /* 20536 */ "AND64rm_NF\000" |
| 50329 | /* 20547 */ "BZHI64rm_NF\000" |
| 50330 | /* 20559 */ "BLSI64rm_NF\000" |
| 50331 | /* 20571 */ "BLSMSK64rm_NF\000" |
| 50332 | /* 20585 */ "IMUL64rm_NF\000" |
| 50333 | /* 20597 */ "ANDN64rm_NF\000" |
| 50334 | /* 20609 */ "XOR64rm_NF\000" |
| 50335 | /* 20620 */ "BLSR64rm_NF\000" |
| 50336 | /* 20632 */ "BEXTR64rm_NF\000" |
| 50337 | /* 20645 */ "POPCNT64rm_NF\000" |
| 50338 | /* 20659 */ "LZCNT64rm_NF\000" |
| 50339 | /* 20672 */ "TZCNT64rm_NF\000" |
| 50340 | /* 20685 */ "SUB16rm_NF\000" |
| 50341 | /* 20696 */ "ADD16rm_NF\000" |
| 50342 | /* 20707 */ "AND16rm_NF\000" |
| 50343 | /* 20718 */ "IMUL16rm_NF\000" |
| 50344 | /* 20730 */ "XOR16rm_NF\000" |
| 50345 | /* 20741 */ "POPCNT16rm_NF\000" |
| 50346 | /* 20755 */ "LZCNT16rm_NF\000" |
| 50347 | /* 20768 */ "TZCNT16rm_NF\000" |
| 50348 | /* 20781 */ "SUB8rm_NF\000" |
| 50349 | /* 20791 */ "ADD8rm_NF\000" |
| 50350 | /* 20801 */ "AND8rm_NF\000" |
| 50351 | /* 20811 */ "XOR8rm_NF\000" |
| 50352 | /* 20821 */ "DEC32r_NF\000" |
| 50353 | /* 20831 */ "INC32r_NF\000" |
| 50354 | /* 20841 */ "NEG32r_NF\000" |
| 50355 | /* 20851 */ "IMUL32r_NF\000" |
| 50356 | /* 20862 */ "IDIV32r_NF\000" |
| 50357 | /* 20873 */ "DEC64r_NF\000" |
| 50358 | /* 20883 */ "INC64r_NF\000" |
| 50359 | /* 20893 */ "NEG64r_NF\000" |
| 50360 | /* 20903 */ "IMUL64r_NF\000" |
| 50361 | /* 20914 */ "IDIV64r_NF\000" |
| 50362 | /* 20925 */ "DEC16r_NF\000" |
| 50363 | /* 20935 */ "INC16r_NF\000" |
| 50364 | /* 20945 */ "NEG16r_NF\000" |
| 50365 | /* 20955 */ "IMUL16r_NF\000" |
| 50366 | /* 20966 */ "IDIV16r_NF\000" |
| 50367 | /* 20977 */ "DEC8r_NF\000" |
| 50368 | /* 20986 */ "INC8r_NF\000" |
| 50369 | /* 20995 */ "NEG8r_NF\000" |
| 50370 | /* 21004 */ "IMUL8r_NF\000" |
| 50371 | /* 21014 */ "IDIV8r_NF\000" |
| 50372 | /* 21024 */ "SUB32mr_NF\000" |
| 50373 | /* 21035 */ "ADD32mr_NF\000" |
| 50374 | /* 21046 */ "AND32mr_NF\000" |
| 50375 | /* 21057 */ "XOR32mr_NF\000" |
| 50376 | /* 21068 */ "SUB64mr_NF\000" |
| 50377 | /* 21079 */ "ADD64mr_NF\000" |
| 50378 | /* 21090 */ "AND64mr_NF\000" |
| 50379 | /* 21101 */ "XOR64mr_NF\000" |
| 50380 | /* 21112 */ "SUB16mr_NF\000" |
| 50381 | /* 21123 */ "ADD16mr_NF\000" |
| 50382 | /* 21134 */ "AND16mr_NF\000" |
| 50383 | /* 21145 */ "XOR16mr_NF\000" |
| 50384 | /* 21156 */ "SUB8mr_NF\000" |
| 50385 | /* 21166 */ "ADD8mr_NF\000" |
| 50386 | /* 21176 */ "AND8mr_NF\000" |
| 50387 | /* 21186 */ "XOR8mr_NF\000" |
| 50388 | /* 21196 */ "SUB32rr_NF\000" |
| 50389 | /* 21207 */ "ADD32rr_NF\000" |
| 50390 | /* 21218 */ "AND32rr_NF\000" |
| 50391 | /* 21229 */ "BZHI32rr_NF\000" |
| 50392 | /* 21241 */ "BLSI32rr_NF\000" |
| 50393 | /* 21253 */ "BLSMSK32rr_NF\000" |
| 50394 | /* 21267 */ "IMUL32rr_NF\000" |
| 50395 | /* 21279 */ "ANDN32rr_NF\000" |
| 50396 | /* 21291 */ "XOR32rr_NF\000" |
| 50397 | /* 21302 */ "BLSR32rr_NF\000" |
| 50398 | /* 21314 */ "BEXTR32rr_NF\000" |
| 50399 | /* 21327 */ "POPCNT32rr_NF\000" |
| 50400 | /* 21341 */ "LZCNT32rr_NF\000" |
| 50401 | /* 21354 */ "TZCNT32rr_NF\000" |
| 50402 | /* 21367 */ "SUB64rr_NF\000" |
| 50403 | /* 21378 */ "ADD64rr_NF\000" |
| 50404 | /* 21389 */ "AND64rr_NF\000" |
| 50405 | /* 21400 */ "BZHI64rr_NF\000" |
| 50406 | /* 21412 */ "BLSI64rr_NF\000" |
| 50407 | /* 21424 */ "BLSMSK64rr_NF\000" |
| 50408 | /* 21438 */ "IMUL64rr_NF\000" |
| 50409 | /* 21450 */ "ANDN64rr_NF\000" |
| 50410 | /* 21462 */ "XOR64rr_NF\000" |
| 50411 | /* 21473 */ "BLSR64rr_NF\000" |
| 50412 | /* 21485 */ "BEXTR64rr_NF\000" |
| 50413 | /* 21498 */ "POPCNT64rr_NF\000" |
| 50414 | /* 21512 */ "LZCNT64rr_NF\000" |
| 50415 | /* 21525 */ "TZCNT64rr_NF\000" |
| 50416 | /* 21538 */ "SUB16rr_NF\000" |
| 50417 | /* 21549 */ "ADD16rr_NF\000" |
| 50418 | /* 21560 */ "AND16rr_NF\000" |
| 50419 | /* 21571 */ "IMUL16rr_NF\000" |
| 50420 | /* 21583 */ "XOR16rr_NF\000" |
| 50421 | /* 21594 */ "POPCNT16rr_NF\000" |
| 50422 | /* 21608 */ "LZCNT16rr_NF\000" |
| 50423 | /* 21621 */ "TZCNT16rr_NF\000" |
| 50424 | /* 21634 */ "SUB8rr_NF\000" |
| 50425 | /* 21644 */ "ADD8rr_NF\000" |
| 50426 | /* 21654 */ "AND8rr_NF\000" |
| 50427 | /* 21664 */ "XOR8rr_NF\000" |
| 50428 | /* 21674 */ "CMOVNB_F\000" |
| 50429 | /* 21683 */ "CMOVB_F\000" |
| 50430 | /* 21691 */ "CMOVNBE_F\000" |
| 50431 | /* 21701 */ "CMOVBE_F\000" |
| 50432 | /* 21710 */ "CMOVNE_F\000" |
| 50433 | /* 21719 */ "CMOVE_F\000" |
| 50434 | /* 21727 */ "XCH_F\000" |
| 50435 | /* 21733 */ "XAM_F\000" |
| 50436 | /* 21739 */ "CMOVNP_F\000" |
| 50437 | /* 21748 */ "CMOVP_F\000" |
| 50438 | /* 21756 */ "ABS_F\000" |
| 50439 | /* 21762 */ "CHS_F\000" |
| 50440 | /* 21768 */ "SQRT_F\000" |
| 50441 | /* 21775 */ "TST_F\000" |
| 50442 | /* 21781 */ "G_FNEG\000" |
| 50443 | /* 21788 */ "EXTRACT_SUBREG\000" |
| 50444 | /* 21803 */ "INSERT_SUBREG\000" |
| 50445 | /* 21817 */ "G_SEXT_INREG\000" |
| 50446 | /* 21830 */ "SUBREG_TO_REG\000" |
| 50447 | /* 21844 */ "LDTILECFG\000" |
| 50448 | /* 21854 */ "STTILECFG\000" |
| 50449 | /* 21864 */ "G_ATOMIC_CMPXCHG\000" |
| 50450 | /* 21881 */ "G_ATOMICRMW_XCHG\000" |
| 50451 | /* 21898 */ "PCONFIG\000" |
| 50452 | /* 21906 */ "STACKALLOC_W_PROBING\000" |
| 50453 | /* 21927 */ "G_FLOG\000" |
| 50454 | /* 21934 */ "INVLPG\000" |
| 50455 | /* 21941 */ "G_VAARG\000" |
| 50456 | /* 21949 */ "PREALLOCATED_ARG\000" |
| 50457 | /* 21966 */ "VMLAUNCH\000" |
| 50458 | /* 21975 */ "G_PREFETCH\000" |
| 50459 | /* 21986 */ "G_SMULH\000" |
| 50460 | /* 21994 */ "G_UMULH\000" |
| 50461 | /* 22002 */ "G_FTANH\000" |
| 50462 | /* 22010 */ "G_FSINH\000" |
| 50463 | /* 22018 */ "AVX512_FsFLD0SH\000" |
| 50464 | /* 22034 */ "PSMASH\000" |
| 50465 | /* 22041 */ "G_FCOSH\000" |
| 50466 | /* 22049 */ "CLFLUSH\000" |
| 50467 | /* 22057 */ "CLGI\000" |
| 50468 | /* 22062 */ "STGI\000" |
| 50469 | /* 22067 */ "DBG_PHI\000" |
| 50470 | /* 22075 */ "CLI\000" |
| 50471 | /* 22079 */ "FLDPI\000" |
| 50472 | /* 22085 */ "SENDUIPI\000" |
| 50473 | /* 22094 */ "EXTRQI\000" |
| 50474 | /* 22101 */ "INSERTQI\000" |
| 50475 | /* 22110 */ "G_FPTOSI\000" |
| 50476 | /* 22119 */ "STI\000" |
| 50477 | /* 22123 */ "CLUI\000" |
| 50478 | /* 22128 */ "G_FPTOUI\000" |
| 50479 | /* 22137 */ "TESTUI\000" |
| 50480 | /* 22144 */ "G_FPOWI\000" |
| 50481 | /* 22152 */ "KCFI_CHECK\000" |
| 50482 | /* 22163 */ "XRESLDTRK\000" |
| 50483 | /* 22173 */ "XSUSLDTRK\000" |
| 50484 | /* 22183 */ "G_PTRMASK\000" |
| 50485 | /* 22193 */ "RCL32mCL\000" |
| 50486 | /* 22202 */ "SHL32mCL\000" |
| 50487 | /* 22211 */ "ROL32mCL\000" |
| 50488 | /* 22220 */ "SAR32mCL\000" |
| 50489 | /* 22229 */ "RCR32mCL\000" |
| 50490 | /* 22238 */ "SHR32mCL\000" |
| 50491 | /* 22247 */ "ROR32mCL\000" |
| 50492 | /* 22256 */ "RCL64mCL\000" |
| 50493 | /* 22265 */ "SHL64mCL\000" |
| 50494 | /* 22274 */ "ROL64mCL\000" |
| 50495 | /* 22283 */ "SAR64mCL\000" |
| 50496 | /* 22292 */ "RCR64mCL\000" |
| 50497 | /* 22301 */ "SHR64mCL\000" |
| 50498 | /* 22310 */ "ROR64mCL\000" |
| 50499 | /* 22319 */ "RCL16mCL\000" |
| 50500 | /* 22328 */ "SHL16mCL\000" |
| 50501 | /* 22337 */ "ROL16mCL\000" |
| 50502 | /* 22346 */ "SAR16mCL\000" |
| 50503 | /* 22355 */ "RCR16mCL\000" |
| 50504 | /* 22364 */ "SHR16mCL\000" |
| 50505 | /* 22373 */ "ROR16mCL\000" |
| 50506 | /* 22382 */ "RCL8mCL\000" |
| 50507 | /* 22390 */ "SHL8mCL\000" |
| 50508 | /* 22398 */ "ROL8mCL\000" |
| 50509 | /* 22406 */ "SAR8mCL\000" |
| 50510 | /* 22414 */ "RCR8mCL\000" |
| 50511 | /* 22422 */ "SHR8mCL\000" |
| 50512 | /* 22430 */ "ROR8mCL\000" |
| 50513 | /* 22438 */ "RCL32rCL\000" |
| 50514 | /* 22447 */ "SHL32rCL\000" |
| 50515 | /* 22456 */ "ROL32rCL\000" |
| 50516 | /* 22465 */ "SAR32rCL\000" |
| 50517 | /* 22474 */ "RCR32rCL\000" |
| 50518 | /* 22483 */ "SHR32rCL\000" |
| 50519 | /* 22492 */ "ROR32rCL\000" |
| 50520 | /* 22501 */ "RCL64rCL\000" |
| 50521 | /* 22510 */ "SHL64rCL\000" |
| 50522 | /* 22519 */ "ROL64rCL\000" |
| 50523 | /* 22528 */ "SAR64rCL\000" |
| 50524 | /* 22537 */ "RCR64rCL\000" |
| 50525 | /* 22546 */ "SHR64rCL\000" |
| 50526 | /* 22555 */ "ROR64rCL\000" |
| 50527 | /* 22564 */ "RCL16rCL\000" |
| 50528 | /* 22573 */ "SHL16rCL\000" |
| 50529 | /* 22582 */ "ROL16rCL\000" |
| 50530 | /* 22591 */ "SAR16rCL\000" |
| 50531 | /* 22600 */ "RCR16rCL\000" |
| 50532 | /* 22609 */ "SHR16rCL\000" |
| 50533 | /* 22618 */ "ROR16rCL\000" |
| 50534 | /* 22627 */ "RCL8rCL\000" |
| 50535 | /* 22635 */ "SHL8rCL\000" |
| 50536 | /* 22643 */ "ROL8rCL\000" |
| 50537 | /* 22651 */ "SAR8rCL\000" |
| 50538 | /* 22659 */ "RCR8rCL\000" |
| 50539 | /* 22667 */ "SHR8rCL\000" |
| 50540 | /* 22675 */ "ROR8rCL\000" |
| 50541 | /* 22683 */ "SHLD32mrCL\000" |
| 50542 | /* 22694 */ "SHRD32mrCL\000" |
| 50543 | /* 22705 */ "SHLD64mrCL\000" |
| 50544 | /* 22716 */ "SHRD64mrCL\000" |
| 50545 | /* 22727 */ "SHLD16mrCL\000" |
| 50546 | /* 22738 */ "SHRD16mrCL\000" |
| 50547 | /* 22749 */ "SHLD32rrCL\000" |
| 50548 | /* 22760 */ "SHRD32rrCL\000" |
| 50549 | /* 22771 */ "SHLD64rrCL\000" |
| 50550 | /* 22782 */ "SHRD64rrCL\000" |
| 50551 | /* 22793 */ "SHLD16rrCL\000" |
| 50552 | /* 22804 */ "SHRD16rrCL\000" |
| 50553 | /* 22815 */ "GC_LABEL\000" |
| 50554 | /* 22824 */ "DBG_LABEL\000" |
| 50555 | /* 22834 */ "EH_LABEL\000" |
| 50556 | /* 22843 */ "ANNOTATION_LABEL\000" |
| 50557 | /* 22860 */ "ICALL_BRANCH_FUNNEL\000" |
| 50558 | /* 22880 */ "G_FSHL\000" |
| 50559 | /* 22887 */ "G_SHL\000" |
| 50560 | /* 22893 */ "G_FCEIL\000" |
| 50561 | /* 22901 */ "AESDEC256KL\000" |
| 50562 | /* 22913 */ "AESENC256KL\000" |
| 50563 | /* 22925 */ "AESDECWIDE256KL\000" |
| 50564 | /* 22941 */ "AESENCWIDE256KL\000" |
| 50565 | /* 22957 */ "AESDEC128KL\000" |
| 50566 | /* 22969 */ "AESENC128KL\000" |
| 50567 | /* 22981 */ "AESDECWIDE128KL\000" |
| 50568 | /* 22997 */ "AESENCWIDE128KL\000" |
| 50569 | /* 23013 */ "TDCALL\000" |
| 50570 | /* 23020 */ "SEAMCALL\000" |
| 50571 | /* 23029 */ "VMMCALL\000" |
| 50572 | /* 23037 */ "VMCALL\000" |
| 50573 | /* 23044 */ "SYSCALL\000" |
| 50574 | /* 23052 */ "PATCHABLE_TAIL_CALL\000" |
| 50575 | /* 23072 */ "PATCHABLE_TYPED_EVENT_CALL\000" |
| 50576 | /* 23099 */ "PATCHABLE_EVENT_CALL\000" |
| 50577 | /* 23120 */ "FENTRY_CALL\000" |
| 50578 | /* 23132 */ "VZEROALL\000" |
| 50579 | /* 23141 */ "KILL\000" |
| 50580 | /* 23146 */ "G_CONSTANT_POOL\000" |
| 50581 | /* 23162 */ "NOOPL\000" |
| 50582 | /* 23168 */ "SCASL\000" |
| 50583 | /* 23174 */ "LODSL\000" |
| 50584 | /* 23180 */ "INSL\000" |
| 50585 | /* 23185 */ "STOSL\000" |
| 50586 | /* 23191 */ "CMPSL\000" |
| 50587 | /* 23197 */ "OUTSL\000" |
| 50588 | /* 23203 */ "MOVSL\000" |
| 50589 | /* 23209 */ "G_ROTL\000" |
| 50590 | /* 23216 */ "G_VECREDUCE_FMUL\000" |
| 50591 | /* 23233 */ "G_FMUL\000" |
| 50592 | /* 23240 */ "G_VECREDUCE_SEQ_FMUL\000" |
| 50593 | /* 23261 */ "G_STRICT_FMUL\000" |
| 50594 | /* 23275 */ "MONTMUL\000" |
| 50595 | /* 23283 */ "G_VECREDUCE_MUL\000" |
| 50596 | /* 23299 */ "G_MUL\000" |
| 50597 | /* 23305 */ "FP80_TO_INT32_IN_MEM\000" |
| 50598 | /* 23326 */ "FP32_TO_INT32_IN_MEM\000" |
| 50599 | /* 23347 */ "FP64_TO_INT32_IN_MEM\000" |
| 50600 | /* 23368 */ "FP80_TO_INT64_IN_MEM\000" |
| 50601 | /* 23389 */ "FP32_TO_INT64_IN_MEM\000" |
| 50602 | /* 23410 */ "FP64_TO_INT64_IN_MEM\000" |
| 50603 | /* 23431 */ "FP80_TO_INT16_IN_MEM\000" |
| 50604 | /* 23452 */ "FP32_TO_INT16_IN_MEM\000" |
| 50605 | /* 23473 */ "FP64_TO_INT16_IN_MEM\000" |
| 50606 | /* 23494 */ "G_FREM\000" |
| 50607 | /* 23501 */ "G_STRICT_FREM\000" |
| 50608 | /* 23515 */ "FPREM\000" |
| 50609 | /* 23521 */ "G_SREM\000" |
| 50610 | /* 23528 */ "G_UREM\000" |
| 50611 | /* 23535 */ "G_SDIVREM\000" |
| 50612 | /* 23545 */ "G_UDIVREM\000" |
| 50613 | /* 23555 */ "SEH_SaveXMM\000" |
| 50614 | /* 23567 */ "INLINEASM\000" |
| 50615 | /* 23577 */ "RSM\000" |
| 50616 | /* 23581 */ "G_VECREDUCE_FMINIMUM\000" |
| 50617 | /* 23602 */ "G_FMINIMUM\000" |
| 50618 | /* 23613 */ "G_ATOMICRMW_FMINIMUM\000" |
| 50619 | /* 23634 */ "G_VECREDUCE_FMAXIMUM\000" |
| 50620 | /* 23655 */ "G_FMAXIMUM\000" |
| 50621 | /* 23666 */ "G_ATOMICRMW_FMAXIMUM\000" |
| 50622 | /* 23687 */ "G_FMINIMUMNUM\000" |
| 50623 | /* 23701 */ "G_FMAXIMUMNUM\000" |
| 50624 | /* 23715 */ "G_FMINNUM\000" |
| 50625 | /* 23725 */ "G_FMAXNUM\000" |
| 50626 | /* 23735 */ "G_FATAN\000" |
| 50627 | /* 23743 */ "FPATAN\000" |
| 50628 | /* 23750 */ "G_FTAN\000" |
| 50629 | /* 23757 */ "FPTAN\000" |
| 50630 | /* 23763 */ "G_INTRINSIC_ROUNDEVEN\000" |
| 50631 | /* 23785 */ "G_ASSERT_ALIGN\000" |
| 50632 | /* 23800 */ "G_FCOPYSIGN\000" |
| 50633 | /* 23812 */ "XBEGIN\000" |
| 50634 | /* 23819 */ "G_VECREDUCE_FMIN\000" |
| 50635 | /* 23836 */ "G_ATOMICRMW_FMIN\000" |
| 50636 | /* 23853 */ "G_VECREDUCE_SMIN\000" |
| 50637 | /* 23870 */ "G_SMIN\000" |
| 50638 | /* 23877 */ "G_VECREDUCE_UMIN\000" |
| 50639 | /* 23894 */ "G_UMIN\000" |
| 50640 | /* 23901 */ "G_ATOMICRMW_UMIN\000" |
| 50641 | /* 23918 */ "G_ATOMICRMW_MIN\000" |
| 50642 | /* 23934 */ "G_FASIN\000" |
| 50643 | /* 23942 */ "G_FSIN\000" |
| 50644 | /* 23949 */ "CFI_INSTRUCTION\000" |
| 50645 | /* 23965 */ "VMXON\000" |
| 50646 | /* 23971 */ "EH_RETURN\000" |
| 50647 | /* 23981 */ "G_SSUBO\000" |
| 50648 | /* 23989 */ "G_USUBO\000" |
| 50649 | /* 23997 */ "G_SADDO\000" |
| 50650 | /* 24005 */ "G_UADDO\000" |
| 50651 | /* 24013 */ "JUMP_TABLE_DEBUG_INFO\000" |
| 50652 | /* 24035 */ "G_SMULO\000" |
| 50653 | /* 24043 */ "G_UMULO\000" |
| 50654 | /* 24051 */ "CQO\000" |
| 50655 | /* 24055 */ "G_BZERO\000" |
| 50656 | /* 24063 */ "PTILEZERO\000" |
| 50657 | /* 24073 */ "INTO\000" |
| 50658 | /* 24078 */ "PUSH2P\000" |
| 50659 | /* 24085 */ "POP2P\000" |
| 50660 | /* 24091 */ "STACKMAP\000" |
| 50661 | /* 24100 */ "G_DEBUGTRAP\000" |
| 50662 | /* 24112 */ "G_UBSANTRAP\000" |
| 50663 | /* 24124 */ "G_TRAP\000" |
| 50664 | /* 24131 */ "G_ATOMICRMW_UDEC_WRAP\000" |
| 50665 | /* 24153 */ "G_ATOMICRMW_UINC_WRAP\000" |
| 50666 | /* 24175 */ "G_BSWAP\000" |
| 50667 | /* 24183 */ "RDTSCP\000" |
| 50668 | /* 24190 */ "FFREEP\000" |
| 50669 | /* 24197 */ "G_SITOFP\000" |
| 50670 | /* 24206 */ "G_UITOFP\000" |
| 50671 | /* 24215 */ "XOR32_FP\000" |
| 50672 | /* 24224 */ "XOR64_FP\000" |
| 50673 | /* 24233 */ "G_FCMP\000" |
| 50674 | /* 24240 */ "G_ICMP\000" |
| 50675 | /* 24247 */ "G_SCMP\000" |
| 50676 | /* 24254 */ "G_UCMP\000" |
| 50677 | /* 24261 */ "FNOP\000" |
| 50678 | /* 24266 */ "CONVERGENCECTRL_LOOP\000" |
| 50679 | /* 24287 */ "NOOP\000" |
| 50680 | /* 24292 */ "G_CTPOP\000" |
| 50681 | /* 24300 */ "PATCHABLE_OP\000" |
| 50682 | /* 24313 */ "FAULTING_OP\000" |
| 50683 | /* 24325 */ "FCOMPP\000" |
| 50684 | /* 24332 */ "RSTORSSP\000" |
| 50685 | /* 24341 */ "SAVEPREVSSP\000" |
| 50686 | /* 24353 */ "FDECSTP\000" |
| 50687 | /* 24361 */ "FINCSTP\000" |
| 50688 | /* 24369 */ "PREALLOCATED_SETUP\000" |
| 50689 | /* 24388 */ "G_FLDEXP\000" |
| 50690 | /* 24397 */ "G_STRICT_FLDEXP\000" |
| 50691 | /* 24413 */ "G_FEXP\000" |
| 50692 | /* 24420 */ "G_FFREXP\000" |
| 50693 | /* 24429 */ "KSET0Q\000" |
| 50694 | /* 24436 */ "KSET1Q\000" |
| 50695 | /* 24443 */ "CDQ\000" |
| 50696 | /* 24447 */ "NOOPQ\000" |
| 50697 | /* 24453 */ "INCSSPQ\000" |
| 50698 | /* 24461 */ "RDSSPQ\000" |
| 50699 | /* 24468 */ "EXTRQ\000" |
| 50700 | /* 24474 */ "SCASQ\000" |
| 50701 | /* 24480 */ "LODSQ\000" |
| 50702 | /* 24486 */ "STOSQ\000" |
| 50703 | /* 24492 */ "CMPSQ\000" |
| 50704 | /* 24498 */ "WRSSQ\000" |
| 50705 | /* 24504 */ "WRUSSQ\000" |
| 50706 | /* 24511 */ "MOVSQ\000" |
| 50707 | /* 24517 */ "INSERTQ\000" |
| 50708 | /* 24525 */ "MMX_MASKMOVQ\000" |
| 50709 | /* 24538 */ "G_BR\000" |
| 50710 | /* 24543 */ "INLINEASM_BR\000" |
| 50711 | /* 24556 */ "G_BLOCK_ADDR\000" |
| 50712 | /* 24569 */ "MEMBARRIER\000" |
| 50713 | /* 24580 */ "G_CONSTANT_FOLD_BARRIER\000" |
| 50714 | /* 24604 */ "CALL64pcrel32_RVMARKER\000" |
| 50715 | /* 24627 */ "CALL64m_RVMARKER\000" |
| 50716 | /* 24644 */ "CALL64r_RVMARKER\000" |
| 50717 | /* 24661 */ "VZEROUPPER\000" |
| 50718 | /* 24672 */ "SYSENTER\000" |
| 50719 | /* 24681 */ "PATCHABLE_FUNCTION_ENTER\000" |
| 50720 | /* 24706 */ "G_READCYCLECOUNTER\000" |
| 50721 | /* 24725 */ "G_READSTEADYCOUNTER\000" |
| 50722 | /* 24745 */ "G_READ_REGISTER\000" |
| 50723 | /* 24761 */ "G_WRITE_REGISTER\000" |
| 50724 | /* 24778 */ "G_ASHR\000" |
| 50725 | /* 24785 */ "G_FSHR\000" |
| 50726 | /* 24792 */ "G_LSHR\000" |
| 50727 | /* 24799 */ "CONVERGENCECTRL_ANCHOR\000" |
| 50728 | /* 24822 */ "G_FFLOOR\000" |
| 50729 | /* 24831 */ "G_EXTRACT_SUBVECTOR\000" |
| 50730 | /* 24851 */ "G_INSERT_SUBVECTOR\000" |
| 50731 | /* 24870 */ "G_BUILD_VECTOR\000" |
| 50732 | /* 24885 */ "G_SHUFFLE_VECTOR\000" |
| 50733 | /* 24902 */ "G_STEP_VECTOR\000" |
| 50734 | /* 24916 */ "G_SPLAT_VECTOR\000" |
| 50735 | /* 24931 */ "FXRSTOR\000" |
| 50736 | /* 24939 */ "G_VECREDUCE_XOR\000" |
| 50737 | /* 24955 */ "G_XOR\000" |
| 50738 | /* 24961 */ "G_ATOMICRMW_XOR\000" |
| 50739 | /* 24977 */ "G_VECREDUCE_OR\000" |
| 50740 | /* 24992 */ "G_OR\000" |
| 50741 | /* 24997 */ "G_ATOMICRMW_OR\000" |
| 50742 | /* 25012 */ "VLDMXCSR\000" |
| 50743 | /* 25021 */ "VSTMXCSR\000" |
| 50744 | /* 25030 */ "RDMSR\000" |
| 50745 | /* 25036 */ "WRMSR\000" |
| 50746 | /* 25042 */ "XCRYPTCTR\000" |
| 50747 | /* 25052 */ "G_ROTR\000" |
| 50748 | /* 25059 */ "G_INTTOPTR\000" |
| 50749 | /* 25070 */ "AAS\000" |
| 50750 | /* 25074 */ "DAS\000" |
| 50751 | /* 25078 */ "G_FABS\000" |
| 50752 | /* 25085 */ "G_ABS\000" |
| 50753 | /* 25091 */ "G_ABDS\000" |
| 50754 | /* 25098 */ "AVX1_SETALLONES\000" |
| 50755 | /* 25114 */ "AVX512_512_SETALLONES\000" |
| 50756 | /* 25136 */ "AVX2_SETALLONES\000" |
| 50757 | /* 25152 */ "V_SETALLONES\000" |
| 50758 | /* 25165 */ "G_UNMERGE_VALUES\000" |
| 50759 | /* 25182 */ "G_MERGE_VALUES\000" |
| 50760 | /* 25197 */ "XSAVES\000" |
| 50761 | /* 25204 */ "VASTART_SAVE_XMM_REGS\000" |
| 50762 | /* 25226 */ "SWAPGS\000" |
| 50763 | /* 25233 */ "ENCLS\000" |
| 50764 | /* 25239 */ "FEMMS\000" |
| 50765 | /* 25245 */ "MMX_EMMS\000" |
| 50766 | /* 25254 */ "WRMSRNS\000" |
| 50767 | /* 25262 */ "G_FACOS\000" |
| 50768 | /* 25270 */ "G_FCOS\000" |
| 50769 | /* 25277 */ "G_FSINCOS\000" |
| 50770 | /* 25287 */ "PTMMULTF32PS\000" |
| 50771 | /* 25300 */ "PTTMMULTF32PS\000" |
| 50772 | /* 25314 */ "PTDPBF16PS\000" |
| 50773 | /* 25325 */ "PTTDPBF16PS\000" |
| 50774 | /* 25337 */ "PTCMMRLFP16PS\000" |
| 50775 | /* 25351 */ "PTTCMMRLFP16PS\000" |
| 50776 | /* 25366 */ "PTCONJTCMMIMFP16PS\000" |
| 50777 | /* 25385 */ "PTCMMIMFP16PS\000" |
| 50778 | /* 25399 */ "PTTCMMIMFP16PS\000" |
| 50779 | /* 25414 */ "PTDPFP16PS\000" |
| 50780 | /* 25425 */ "PTTDPFP16PS\000" |
| 50781 | /* 25437 */ "PTDPHBF8PS\000" |
| 50782 | /* 25448 */ "PTDPBF8PS\000" |
| 50783 | /* 25458 */ "PTDPBHF8PS\000" |
| 50784 | /* 25469 */ "PTDPHF8PS\000" |
| 50785 | /* 25479 */ "SEAMOPS\000" |
| 50786 | /* 25487 */ "PT2RPNTLVWZ0RS\000" |
| 50787 | /* 25502 */ "PT2RPNTLVWZ1RS\000" |
| 50788 | /* 25517 */ "PTILELOADDRS\000" |
| 50789 | /* 25530 */ "G_CONCAT_VECTORS\000" |
| 50790 | /* 25547 */ "XRSTORS\000" |
| 50791 | /* 25555 */ "AVX512_FsFLD0SS\000" |
| 50792 | /* 25571 */ "COPY_TO_REGCLASS\000" |
| 50793 | /* 25588 */ "G_IS_FPCLASS\000" |
| 50794 | /* 25601 */ "ASAN_CHECK_MEMACCESS\000" |
| 50795 | /* 25622 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\000" |
| 50796 | /* 25652 */ "G_VECTOR_COMPRESS\000" |
| 50797 | /* 25670 */ "MOVNTSS\000" |
| 50798 | /* 25678 */ "G_INTRINSIC_W_SIDE_EFFECTS\000" |
| 50799 | /* 25705 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\000" |
| 50800 | /* 25743 */ "ERETS\000" |
| 50801 | /* 25749 */ "CLTS\000" |
| 50802 | /* 25754 */ "FLDL2T\000" |
| 50803 | /* 25761 */ "XLAT\000" |
| 50804 | /* 25766 */ "G_SSUBSAT\000" |
| 50805 | /* 25776 */ "G_USUBSAT\000" |
| 50806 | /* 25786 */ "G_SADDSAT\000" |
| 50807 | /* 25796 */ "G_UADDSAT\000" |
| 50808 | /* 25806 */ "G_SSHLSAT\000" |
| 50809 | /* 25816 */ "G_USHLSAT\000" |
| 50810 | /* 25826 */ "G_SMULFIXSAT\000" |
| 50811 | /* 25839 */ "G_UMULFIXSAT\000" |
| 50812 | /* 25852 */ "G_SDIVFIXSAT\000" |
| 50813 | /* 25865 */ "G_UDIVFIXSAT\000" |
| 50814 | /* 25878 */ "G_ATOMICRMW_USUB_SAT\000" |
| 50815 | /* 25899 */ "G_FPTOSI_SAT\000" |
| 50816 | /* 25912 */ "G_FPTOUI_SAT\000" |
| 50817 | /* 25925 */ "G_EXTRACT\000" |
| 50818 | /* 25935 */ "FXTRACT\000" |
| 50819 | /* 25943 */ "G_SELECT\000" |
| 50820 | /* 25952 */ "G_BRINDIRECT\000" |
| 50821 | /* 25965 */ "CATCHRET\000" |
| 50822 | /* 25974 */ "UIRET\000" |
| 50823 | /* 25980 */ "SEAMRET\000" |
| 50824 | /* 25988 */ "CLEANUPRET\000" |
| 50825 | /* 25999 */ "SYSRET\000" |
| 50826 | /* 26006 */ "PATCHABLE_RET\000" |
| 50827 | /* 26020 */ "MORESTACK_RET\000" |
| 50828 | /* 26034 */ "HRESET\000" |
| 50829 | /* 26041 */ "G_MEMSET\000" |
| 50830 | /* 26050 */ "UMWAIT\000" |
| 50831 | /* 26057 */ "SKINIT\000" |
| 50832 | /* 26064 */ "FNINIT\000" |
| 50833 | /* 26071 */ "SYSEXIT\000" |
| 50834 | /* 26079 */ "PATCHABLE_FUNCTION_EXIT\000" |
| 50835 | /* 26103 */ "G_BRJT\000" |
| 50836 | /* 26110 */ "G_EXTRACT_VECTOR_ELT\000" |
| 50837 | /* 26131 */ "G_INSERT_VECTOR_ELT\000" |
| 50838 | /* 26151 */ "HLT\000" |
| 50839 | /* 26155 */ "G_FCONSTANT\000" |
| 50840 | /* 26167 */ "G_CONSTANT\000" |
| 50841 | /* 26178 */ "G_INTRINSIC_CONVERGENT\000" |
| 50842 | /* 26201 */ "FRNDINT\000" |
| 50843 | /* 26209 */ "STATEPOINT\000" |
| 50844 | /* 26220 */ "PATCHPOINT\000" |
| 50845 | /* 26231 */ "G_PTRTOINT\000" |
| 50846 | /* 26242 */ "G_FRINT\000" |
| 50847 | /* 26250 */ "G_INTRINSIC_LLRINT\000" |
| 50848 | /* 26269 */ "G_INTRINSIC_LRINT\000" |
| 50849 | /* 26287 */ "G_FNEARBYINT\000" |
| 50850 | /* 26300 */ "CALL32m_NT\000" |
| 50851 | /* 26311 */ "JMP32m_NT\000" |
| 50852 | /* 26321 */ "CALL64m_NT\000" |
| 50853 | /* 26332 */ "JMP64m_NT\000" |
| 50854 | /* 26342 */ "CALL16m_NT\000" |
| 50855 | /* 26353 */ "JMP16m_NT\000" |
| 50856 | /* 26363 */ "CALL32r_NT\000" |
| 50857 | /* 26374 */ "JMP32r_NT\000" |
| 50858 | /* 26384 */ "CALL64r_NT\000" |
| 50859 | /* 26395 */ "JMP64r_NT\000" |
| 50860 | /* 26405 */ "CALL16r_NT\000" |
| 50861 | /* 26416 */ "JMP16r_NT\000" |
| 50862 | /* 26426 */ "XSAVEOPT\000" |
| 50863 | /* 26435 */ "CLFLUSHOPT\000" |
| 50864 | /* 26446 */ "G_VASTART\000" |
| 50865 | /* 26456 */ "LIFETIME_START\000" |
| 50866 | /* 26471 */ "G_INVOKE_REGION_START\000" |
| 50867 | /* 26493 */ "G_INSERT\000" |
| 50868 | /* 26502 */ "XABORT\000" |
| 50869 | /* 26509 */ "G_FSQRT\000" |
| 50870 | /* 26517 */ "G_STRICT_FSQRT\000" |
| 50871 | /* 26532 */ "G_BITCAST\000" |
| 50872 | /* 26542 */ "G_ADDRSPACE_CAST\000" |
| 50873 | /* 26559 */ "XTEST\000" |
| 50874 | /* 26565 */ "G_FIST\000" |
| 50875 | /* 26572 */ "RDMSRLIST\000" |
| 50876 | /* 26582 */ "WRMSRLIST\000" |
| 50877 | /* 26592 */ "DBG_VALUE_LIST\000" |
| 50878 | /* 26607 */ "RMPADJUST\000" |
| 50879 | /* 26617 */ "G_FPEXT\000" |
| 50880 | /* 26625 */ "G_SEXT\000" |
| 50881 | /* 26632 */ "G_ASSERT_SEXT\000" |
| 50882 | /* 26646 */ "G_ANYEXT\000" |
| 50883 | /* 26655 */ "G_ZEXT\000" |
| 50884 | /* 26662 */ "G_ASSERT_ZEXT\000" |
| 50885 | /* 26676 */ "G_ABDU\000" |
| 50886 | /* 26683 */ "ENCLU\000" |
| 50887 | /* 26689 */ "VMASKMOVDQU\000" |
| 50888 | /* 26701 */ "RDPRU\000" |
| 50889 | /* 26707 */ "ERETU\000" |
| 50890 | /* 26713 */ "PT2RPNTLVWZ0V\000" |
| 50891 | /* 26727 */ "PT2RPNTLVWZ0T1V\000" |
| 50892 | /* 26743 */ "PT2RPNTLVWZ1T1V\000" |
| 50893 | /* 26759 */ "PTILELOADDT1V\000" |
| 50894 | /* 26773 */ "PT2RPNTLVWZ0RST1V\000" |
| 50895 | /* 26791 */ "PT2RPNTLVWZ1RST1V\000" |
| 50896 | /* 26809 */ "PTILELOADDRST1V\000" |
| 50897 | /* 26825 */ "PT2RPNTLVWZ1V\000" |
| 50898 | /* 26839 */ "PTCONJTFP16V\000" |
| 50899 | /* 26852 */ "XGETBV\000" |
| 50900 | /* 26859 */ "XSETBV\000" |
| 50901 | /* 26866 */ "PTILELOADDV\000" |
| 50902 | /* 26878 */ "PTILESTOREDV\000" |
| 50903 | /* 26891 */ "PTTRANSPOSEDV\000" |
| 50904 | /* 26905 */ "PTDPBSSDV\000" |
| 50905 | /* 26915 */ "PTDPBUSDV\000" |
| 50906 | /* 26925 */ "PTDPBSUDV\000" |
| 50907 | /* 26935 */ "PTDPBUUDV\000" |
| 50908 | /* 26945 */ "SUB32rr_NF_ND_REV\000" |
| 50909 | /* 26963 */ "ADD32rr_NF_ND_REV\000" |
| 50910 | /* 26981 */ "AND32rr_NF_ND_REV\000" |
| 50911 | /* 26999 */ "XOR32rr_NF_ND_REV\000" |
| 50912 | /* 27017 */ "SUB64rr_NF_ND_REV\000" |
| 50913 | /* 27035 */ "ADD64rr_NF_ND_REV\000" |
| 50914 | /* 27053 */ "AND64rr_NF_ND_REV\000" |
| 50915 | /* 27071 */ "XOR64rr_NF_ND_REV\000" |
| 50916 | /* 27089 */ "SUB16rr_NF_ND_REV\000" |
| 50917 | /* 27107 */ "ADD16rr_NF_ND_REV\000" |
| 50918 | /* 27125 */ "AND16rr_NF_ND_REV\000" |
| 50919 | /* 27143 */ "XOR16rr_NF_ND_REV\000" |
| 50920 | /* 27161 */ "SUB8rr_NF_ND_REV\000" |
| 50921 | /* 27178 */ "ADD8rr_NF_ND_REV\000" |
| 50922 | /* 27195 */ "AND8rr_NF_ND_REV\000" |
| 50923 | /* 27212 */ "XOR8rr_NF_ND_REV\000" |
| 50924 | /* 27229 */ "SBB32rr_ND_REV\000" |
| 50925 | /* 27244 */ "SUB32rr_ND_REV\000" |
| 50926 | /* 27259 */ "ADC32rr_ND_REV\000" |
| 50927 | /* 27274 */ "ADD32rr_ND_REV\000" |
| 50928 | /* 27289 */ "AND32rr_ND_REV\000" |
| 50929 | /* 27304 */ "XOR32rr_ND_REV\000" |
| 50930 | /* 27319 */ "SBB64rr_ND_REV\000" |
| 50931 | /* 27334 */ "SUB64rr_ND_REV\000" |
| 50932 | /* 27349 */ "ADC64rr_ND_REV\000" |
| 50933 | /* 27364 */ "ADD64rr_ND_REV\000" |
| 50934 | /* 27379 */ "AND64rr_ND_REV\000" |
| 50935 | /* 27394 */ "XOR64rr_ND_REV\000" |
| 50936 | /* 27409 */ "SBB16rr_ND_REV\000" |
| 50937 | /* 27424 */ "SUB16rr_ND_REV\000" |
| 50938 | /* 27439 */ "ADC16rr_ND_REV\000" |
| 50939 | /* 27454 */ "ADD16rr_ND_REV\000" |
| 50940 | /* 27469 */ "AND16rr_ND_REV\000" |
| 50941 | /* 27484 */ "XOR16rr_ND_REV\000" |
| 50942 | /* 27499 */ "SBB8rr_ND_REV\000" |
| 50943 | /* 27513 */ "SUB8rr_ND_REV\000" |
| 50944 | /* 27527 */ "ADC8rr_ND_REV\000" |
| 50945 | /* 27541 */ "ADD8rr_ND_REV\000" |
| 50946 | /* 27555 */ "AND8rr_ND_REV\000" |
| 50947 | /* 27569 */ "XOR8rr_ND_REV\000" |
| 50948 | /* 27583 */ "SUB32rr_NF_REV\000" |
| 50949 | /* 27598 */ "ADD32rr_NF_REV\000" |
| 50950 | /* 27613 */ "AND32rr_NF_REV\000" |
| 50951 | /* 27628 */ "XOR32rr_NF_REV\000" |
| 50952 | /* 27643 */ "SUB64rr_NF_REV\000" |
| 50953 | /* 27658 */ "ADD64rr_NF_REV\000" |
| 50954 | /* 27673 */ "AND64rr_NF_REV\000" |
| 50955 | /* 27688 */ "XOR64rr_NF_REV\000" |
| 50956 | /* 27703 */ "SUB16rr_NF_REV\000" |
| 50957 | /* 27718 */ "ADD16rr_NF_REV\000" |
| 50958 | /* 27733 */ "AND16rr_NF_REV\000" |
| 50959 | /* 27748 */ "XOR16rr_NF_REV\000" |
| 50960 | /* 27763 */ "SUB8rr_NF_REV\000" |
| 50961 | /* 27777 */ "ADD8rr_NF_REV\000" |
| 50962 | /* 27791 */ "AND8rr_NF_REV\000" |
| 50963 | /* 27805 */ "XOR8rr_NF_REV\000" |
| 50964 | /* 27819 */ "SBB32rr_EVEX_REV\000" |
| 50965 | /* 27836 */ "SUB32rr_EVEX_REV\000" |
| 50966 | /* 27853 */ "ADC32rr_EVEX_REV\000" |
| 50967 | /* 27870 */ "ADD32rr_EVEX_REV\000" |
| 50968 | /* 27887 */ "AND32rr_EVEX_REV\000" |
| 50969 | /* 27904 */ "XOR32rr_EVEX_REV\000" |
| 50970 | /* 27921 */ "SBB64rr_EVEX_REV\000" |
| 50971 | /* 27938 */ "SUB64rr_EVEX_REV\000" |
| 50972 | /* 27955 */ "ADC64rr_EVEX_REV\000" |
| 50973 | /* 27972 */ "ADD64rr_EVEX_REV\000" |
| 50974 | /* 27989 */ "AND64rr_EVEX_REV\000" |
| 50975 | /* 28006 */ "XOR64rr_EVEX_REV\000" |
| 50976 | /* 28023 */ "SBB16rr_EVEX_REV\000" |
| 50977 | /* 28040 */ "SUB16rr_EVEX_REV\000" |
| 50978 | /* 28057 */ "ADC16rr_EVEX_REV\000" |
| 50979 | /* 28074 */ "ADD16rr_EVEX_REV\000" |
| 50980 | /* 28091 */ "AND16rr_EVEX_REV\000" |
| 50981 | /* 28108 */ "XOR16rr_EVEX_REV\000" |
| 50982 | /* 28125 */ "SBB8rr_EVEX_REV\000" |
| 50983 | /* 28141 */ "SUB8rr_EVEX_REV\000" |
| 50984 | /* 28157 */ "ADC8rr_EVEX_REV\000" |
| 50985 | /* 28173 */ "ADD8rr_EVEX_REV\000" |
| 50986 | /* 28189 */ "AND8rr_EVEX_REV\000" |
| 50987 | /* 28205 */ "XOR8rr_EVEX_REV\000" |
| 50988 | /* 28221 */ "VPEXTRWrri_REV\000" |
| 50989 | /* 28236 */ "VPEXTRWZrri_REV\000" |
| 50990 | /* 28252 */ "VMOVDQA32Z256rrk_REV\000" |
| 50991 | /* 28273 */ "VMOVDQU32Z256rrk_REV\000" |
| 50992 | /* 28294 */ "VMOVDQA64Z256rrk_REV\000" |
| 50993 | /* 28315 */ "VMOVDQU64Z256rrk_REV\000" |
| 50994 | /* 28336 */ "VMOVDQU16Z256rrk_REV\000" |
| 50995 | /* 28357 */ "VMOVDQU8Z256rrk_REV\000" |
| 50996 | /* 28377 */ "VMOVAPDZ256rrk_REV\000" |
| 50997 | /* 28396 */ "VMOVUPDZ256rrk_REV\000" |
| 50998 | /* 28415 */ "VMOVAPSZ256rrk_REV\000" |
| 50999 | /* 28434 */ "VMOVUPSZ256rrk_REV\000" |
| 51000 | /* 28453 */ "VMOVDQA32Z128rrk_REV\000" |
| 51001 | /* 28474 */ "VMOVDQU32Z128rrk_REV\000" |
| 51002 | /* 28495 */ "VMOVDQA64Z128rrk_REV\000" |
| 51003 | /* 28516 */ "VMOVDQU64Z128rrk_REV\000" |
| 51004 | /* 28537 */ "VMOVDQU16Z128rrk_REV\000" |
| 51005 | /* 28558 */ "VMOVDQU8Z128rrk_REV\000" |
| 51006 | /* 28578 */ "VMOVAPDZ128rrk_REV\000" |
| 51007 | /* 28597 */ "VMOVUPDZ128rrk_REV\000" |
| 51008 | /* 28616 */ "VMOVAPSZ128rrk_REV\000" |
| 51009 | /* 28635 */ "VMOVUPSZ128rrk_REV\000" |
| 51010 | /* 28654 */ "VMOVDQA32Zrrk_REV\000" |
| 51011 | /* 28672 */ "VMOVDQU32Zrrk_REV\000" |
| 51012 | /* 28690 */ "VMOVDQA64Zrrk_REV\000" |
| 51013 | /* 28708 */ "VMOVDQU64Zrrk_REV\000" |
| 51014 | /* 28726 */ "VMOVDQU16Zrrk_REV\000" |
| 51015 | /* 28744 */ "VMOVDQU8Zrrk_REV\000" |
| 51016 | /* 28761 */ "VMOVAPDZrrk_REV\000" |
| 51017 | /* 28777 */ "VMOVUPDZrrk_REV\000" |
| 51018 | /* 28793 */ "VMOVSDZrrk_REV\000" |
| 51019 | /* 28808 */ "VMOVSHZrrk_REV\000" |
| 51020 | /* 28823 */ "VMOVAPSZrrk_REV\000" |
| 51021 | /* 28839 */ "VMOVUPSZrrk_REV\000" |
| 51022 | /* 28855 */ "VMOVSSZrrk_REV\000" |
| 51023 | /* 28870 */ "SBB32rr_REV\000" |
| 51024 | /* 28882 */ "SUB32rr_REV\000" |
| 51025 | /* 28894 */ "ADC32rr_REV\000" |
| 51026 | /* 28906 */ "ADD32rr_REV\000" |
| 51027 | /* 28918 */ "AND32rr_REV\000" |
| 51028 | /* 28930 */ "MOVBE32rr_REV\000" |
| 51029 | /* 28944 */ "CCMP32rr_REV\000" |
| 51030 | /* 28957 */ "XOR32rr_REV\000" |
| 51031 | /* 28969 */ "CFCMOV32rr_REV\000" |
| 51032 | /* 28984 */ "SBB64rr_REV\000" |
| 51033 | /* 28996 */ "SUB64rr_REV\000" |
| 51034 | /* 29008 */ "ADC64rr_REV\000" |
| 51035 | /* 29020 */ "ADD64rr_REV\000" |
| 51036 | /* 29032 */ "AND64rr_REV\000" |
| 51037 | /* 29044 */ "MOVBE64rr_REV\000" |
| 51038 | /* 29058 */ "CCMP64rr_REV\000" |
| 51039 | /* 29071 */ "MMX_MOVQ64rr_REV\000" |
| 51040 | /* 29088 */ "XOR64rr_REV\000" |
| 51041 | /* 29100 */ "CFCMOV64rr_REV\000" |
| 51042 | /* 29115 */ "VFMADDSUBPD4rr_REV\000" |
| 51043 | /* 29134 */ "VFMSUBPD4rr_REV\000" |
| 51044 | /* 29150 */ "VFNMSUBPD4rr_REV\000" |
| 51045 | /* 29167 */ "VFMSUBADDPD4rr_REV\000" |
| 51046 | /* 29186 */ "VFMADDPD4rr_REV\000" |
| 51047 | /* 29202 */ "VFNMADDPD4rr_REV\000" |
| 51048 | /* 29219 */ "VFMSUBSD4rr_REV\000" |
| 51049 | /* 29235 */ "VFNMSUBSD4rr_REV\000" |
| 51050 | /* 29252 */ "VFMADDSD4rr_REV\000" |
| 51051 | /* 29268 */ "VFNMADDSD4rr_REV\000" |
| 51052 | /* 29285 */ "VFMADDSUBPS4rr_REV\000" |
| 51053 | /* 29304 */ "VFMSUBPS4rr_REV\000" |
| 51054 | /* 29320 */ "VFNMSUBPS4rr_REV\000" |
| 51055 | /* 29337 */ "VFMSUBADDPS4rr_REV\000" |
| 51056 | /* 29356 */ "VFMADDPS4rr_REV\000" |
| 51057 | /* 29372 */ "VFNMADDPS4rr_REV\000" |
| 51058 | /* 29389 */ "VFMSUBSS4rr_REV\000" |
| 51059 | /* 29405 */ "VFNMSUBSS4rr_REV\000" |
| 51060 | /* 29422 */ "VFMADDSS4rr_REV\000" |
| 51061 | /* 29438 */ "VFNMADDSS4rr_REV\000" |
| 51062 | /* 29455 */ "SBB16rr_REV\000" |
| 51063 | /* 29467 */ "SUB16rr_REV\000" |
| 51064 | /* 29479 */ "ADC16rr_REV\000" |
| 51065 | /* 29491 */ "ADD16rr_REV\000" |
| 51066 | /* 29503 */ "AND16rr_REV\000" |
| 51067 | /* 29515 */ "MOVBE16rr_REV\000" |
| 51068 | /* 29529 */ "CCMP16rr_REV\000" |
| 51069 | /* 29542 */ "XOR16rr_REV\000" |
| 51070 | /* 29554 */ "CFCMOV16rr_REV\000" |
| 51071 | /* 29569 */ "VMOVDQA32Z256rr_REV\000" |
| 51072 | /* 29589 */ "VMOVDQU32Z256rr_REV\000" |
| 51073 | /* 29609 */ "VMOVDQA64Z256rr_REV\000" |
| 51074 | /* 29629 */ "VMOVDQU64Z256rr_REV\000" |
| 51075 | /* 29649 */ "VMOVDQU16Z256rr_REV\000" |
| 51076 | /* 29669 */ "VMOVDQU8Z256rr_REV\000" |
| 51077 | /* 29688 */ "VMOVAPDZ256rr_REV\000" |
| 51078 | /* 29706 */ "VMOVUPDZ256rr_REV\000" |
| 51079 | /* 29724 */ "VMOVAPSZ256rr_REV\000" |
| 51080 | /* 29742 */ "VMOVUPSZ256rr_REV\000" |
| 51081 | /* 29760 */ "VMOVDQA32Z128rr_REV\000" |
| 51082 | /* 29780 */ "VMOVDQU32Z128rr_REV\000" |
| 51083 | /* 29800 */ "VMOVDQA64Z128rr_REV\000" |
| 51084 | /* 29820 */ "VMOVDQU64Z128rr_REV\000" |
| 51085 | /* 29840 */ "VMOVDQU16Z128rr_REV\000" |
| 51086 | /* 29860 */ "VMOVDQU8Z128rr_REV\000" |
| 51087 | /* 29879 */ "VMOVAPDZ128rr_REV\000" |
| 51088 | /* 29897 */ "VMOVUPDZ128rr_REV\000" |
| 51089 | /* 29915 */ "VMOVAPSZ128rr_REV\000" |
| 51090 | /* 29933 */ "VMOVUPSZ128rr_REV\000" |
| 51091 | /* 29951 */ "SBB8rr_REV\000" |
| 51092 | /* 29962 */ "SUB8rr_REV\000" |
| 51093 | /* 29973 */ "ADC8rr_REV\000" |
| 51094 | /* 29984 */ "ADD8rr_REV\000" |
| 51095 | /* 29995 */ "AND8rr_REV\000" |
| 51096 | /* 30006 */ "CCMP8rr_REV\000" |
| 51097 | /* 30018 */ "XOR8rr_REV\000" |
| 51098 | /* 30029 */ "MOV8rr_REV\000" |
| 51099 | /* 30040 */ "VMOVDQArr_REV\000" |
| 51100 | /* 30054 */ "VPSHABrr_REV\000" |
| 51101 | /* 30067 */ "VPSHLBrr_REV\000" |
| 51102 | /* 30080 */ "VPROTBrr_REV\000" |
| 51103 | /* 30093 */ "VPSHADrr_REV\000" |
| 51104 | /* 30106 */ "VPSHLDrr_REV\000" |
| 51105 | /* 30119 */ "VPERMIL2PDrr_REV\000" |
| 51106 | /* 30136 */ "VMOVAPDrr_REV\000" |
| 51107 | /* 30150 */ "VMOVUPDrr_REV\000" |
| 51108 | /* 30164 */ "VMOVSDrr_REV\000" |
| 51109 | /* 30177 */ "VPROTDrr_REV\000" |
| 51110 | /* 30190 */ "VPSHAQrr_REV\000" |
| 51111 | /* 30203 */ "VPSHLQrr_REV\000" |
| 51112 | /* 30216 */ "VPROTQrr_REV\000" |
| 51113 | /* 30229 */ "VPERMIL2PSrr_REV\000" |
| 51114 | /* 30246 */ "VMOVAPSrr_REV\000" |
| 51115 | /* 30260 */ "VMOVUPSrr_REV\000" |
| 51116 | /* 30274 */ "VMOVSSrr_REV\000" |
| 51117 | /* 30287 */ "VMOVDQUrr_REV\000" |
| 51118 | /* 30301 */ "VPSHAWrr_REV\000" |
| 51119 | /* 30314 */ "VPSHLWrr_REV\000" |
| 51120 | /* 30327 */ "VPROTWrr_REV\000" |
| 51121 | /* 30340 */ "VFMADDSUBPD4Yrr_REV\000" |
| 51122 | /* 30360 */ "VFMSUBPD4Yrr_REV\000" |
| 51123 | /* 30377 */ "VFNMSUBPD4Yrr_REV\000" |
| 51124 | /* 30395 */ "VFMSUBADDPD4Yrr_REV\000" |
| 51125 | /* 30415 */ "VFMADDPD4Yrr_REV\000" |
| 51126 | /* 30432 */ "VFNMADDPD4Yrr_REV\000" |
| 51127 | /* 30450 */ "VFMADDSUBPS4Yrr_REV\000" |
| 51128 | /* 30470 */ "VFMSUBPS4Yrr_REV\000" |
| 51129 | /* 30487 */ "VFNMSUBPS4Yrr_REV\000" |
| 51130 | /* 30505 */ "VFMSUBADDPS4Yrr_REV\000" |
| 51131 | /* 30525 */ "VFMADDPS4Yrr_REV\000" |
| 51132 | /* 30542 */ "VFNMADDPS4Yrr_REV\000" |
| 51133 | /* 30560 */ "VMOVDQAYrr_REV\000" |
| 51134 | /* 30575 */ "VPERMIL2PDYrr_REV\000" |
| 51135 | /* 30593 */ "VMOVAPDYrr_REV\000" |
| 51136 | /* 30608 */ "VMOVUPDYrr_REV\000" |
| 51137 | /* 30623 */ "VPERMIL2PSYrr_REV\000" |
| 51138 | /* 30641 */ "VMOVAPSYrr_REV\000" |
| 51139 | /* 30656 */ "VMOVUPSYrr_REV\000" |
| 51140 | /* 30671 */ "VMOVDQUYrr_REV\000" |
| 51141 | /* 30686 */ "VMOVDQA32Zrr_REV\000" |
| 51142 | /* 30703 */ "VMOVDQU32Zrr_REV\000" |
| 51143 | /* 30720 */ "VMOVDQA64Zrr_REV\000" |
| 51144 | /* 30737 */ "VMOVDQU64Zrr_REV\000" |
| 51145 | /* 30754 */ "VMOVDQU16Zrr_REV\000" |
| 51146 | /* 30771 */ "VMOVDQU8Zrr_REV\000" |
| 51147 | /* 30787 */ "VMOVAPDZrr_REV\000" |
| 51148 | /* 30802 */ "VMOVUPDZrr_REV\000" |
| 51149 | /* 30817 */ "VMOVSDZrr_REV\000" |
| 51150 | /* 30831 */ "VMOVSHZrr_REV\000" |
| 51151 | /* 30845 */ "VMOVAPSZrr_REV\000" |
| 51152 | /* 30860 */ "VMOVUPSZrr_REV\000" |
| 51153 | /* 30875 */ "VMOVSSZrr_REV\000" |
| 51154 | /* 30889 */ "VPPERMrrr_REV\000" |
| 51155 | /* 30903 */ "VPCMOVrrr_REV\000" |
| 51156 | /* 30917 */ "VPCMOVYrrr_REV\000" |
| 51157 | /* 30932 */ "VFMSUBSD4rr_Int_REV\000" |
| 51158 | /* 30952 */ "VFNMSUBSD4rr_Int_REV\000" |
| 51159 | /* 30973 */ "VFMADDSD4rr_Int_REV\000" |
| 51160 | /* 30993 */ "VFNMADDSD4rr_Int_REV\000" |
| 51161 | /* 31014 */ "VFMSUBSS4rr_Int_REV\000" |
| 51162 | /* 31034 */ "VFNMSUBSS4rr_Int_REV\000" |
| 51163 | /* 31055 */ "VFMADDSS4rr_Int_REV\000" |
| 51164 | /* 31075 */ "VFNMADDSS4rr_Int_REV\000" |
| 51165 | /* 31096 */ "VMOVDQA32Z256rrkz_REV\000" |
| 51166 | /* 31118 */ "VMOVDQU32Z256rrkz_REV\000" |
| 51167 | /* 31140 */ "VMOVDQA64Z256rrkz_REV\000" |
| 51168 | /* 31162 */ "VMOVDQU64Z256rrkz_REV\000" |
| 51169 | /* 31184 */ "VMOVDQU16Z256rrkz_REV\000" |
| 51170 | /* 31206 */ "VMOVDQU8Z256rrkz_REV\000" |
| 51171 | /* 31227 */ "VMOVAPDZ256rrkz_REV\000" |
| 51172 | /* 31247 */ "VMOVUPDZ256rrkz_REV\000" |
| 51173 | /* 31267 */ "VMOVAPSZ256rrkz_REV\000" |
| 51174 | /* 31287 */ "VMOVUPSZ256rrkz_REV\000" |
| 51175 | /* 31307 */ "VMOVDQA32Z128rrkz_REV\000" |
| 51176 | /* 31329 */ "VMOVDQU32Z128rrkz_REV\000" |
| 51177 | /* 31351 */ "VMOVDQA64Z128rrkz_REV\000" |
| 51178 | /* 31373 */ "VMOVDQU64Z128rrkz_REV\000" |
| 51179 | /* 31395 */ "VMOVDQU16Z128rrkz_REV\000" |
| 51180 | /* 31417 */ "VMOVDQU8Z128rrkz_REV\000" |
| 51181 | /* 31438 */ "VMOVAPDZ128rrkz_REV\000" |
| 51182 | /* 31458 */ "VMOVUPDZ128rrkz_REV\000" |
| 51183 | /* 31478 */ "VMOVAPSZ128rrkz_REV\000" |
| 51184 | /* 31498 */ "VMOVUPSZ128rrkz_REV\000" |
| 51185 | /* 31518 */ "VMOVDQA32Zrrkz_REV\000" |
| 51186 | /* 31537 */ "VMOVDQU32Zrrkz_REV\000" |
| 51187 | /* 31556 */ "VMOVDQA64Zrrkz_REV\000" |
| 51188 | /* 31575 */ "VMOVDQU64Zrrkz_REV\000" |
| 51189 | /* 31594 */ "VMOVDQU16Zrrkz_REV\000" |
| 51190 | /* 31613 */ "VMOVDQU8Zrrkz_REV\000" |
| 51191 | /* 31631 */ "VMOVAPDZrrkz_REV\000" |
| 51192 | /* 31648 */ "VMOVUPDZrrkz_REV\000" |
| 51193 | /* 31665 */ "VMOVSDZrrkz_REV\000" |
| 51194 | /* 31681 */ "VMOVSHZrrkz_REV\000" |
| 51195 | /* 31697 */ "VMOVAPSZrrkz_REV\000" |
| 51196 | /* 31714 */ "VMOVUPSZrrkz_REV\000" |
| 51197 | /* 31731 */ "VMOVSSZrrkz_REV\000" |
| 51198 | /* 31747 */ "PLDTILECFGV\000" |
| 51199 | /* 31759 */ "G_FDIV\000" |
| 51200 | /* 31766 */ "G_STRICT_FDIV\000" |
| 51201 | /* 31780 */ "G_SDIV\000" |
| 51202 | /* 31787 */ "G_UDIV\000" |
| 51203 | /* 31794 */ "ENCLV\000" |
| 51204 | /* 31800 */ "G_GET_FPENV\000" |
| 51205 | /* 31812 */ "G_RESET_FPENV\000" |
| 51206 | /* 31826 */ "G_SET_FPENV\000" |
| 51207 | /* 31838 */ "PTILEZEROV\000" |
| 51208 | /* 31849 */ "PTMMULTF32PSV\000" |
| 51209 | /* 31863 */ "PTTMMULTF32PSV\000" |
| 51210 | /* 31878 */ "PTDPBF16PSV\000" |
| 51211 | /* 31890 */ "PTTDPBF16PSV\000" |
| 51212 | /* 31903 */ "PTCMMRLFP16PSV\000" |
| 51213 | /* 31918 */ "PTTCMMRLFP16PSV\000" |
| 51214 | /* 31934 */ "PTCONJTCMMIMFP16PSV\000" |
| 51215 | /* 31954 */ "PTCMMIMFP16PSV\000" |
| 51216 | /* 31969 */ "PTTCMMIMFP16PSV\000" |
| 51217 | /* 31985 */ "PTDPFP16PSV\000" |
| 51218 | /* 31997 */ "PTTDPFP16PSV\000" |
| 51219 | /* 32010 */ "PTDPHBF8PSV\000" |
| 51220 | /* 32022 */ "PTDPBF8PSV\000" |
| 51221 | /* 32033 */ "PTDPBHF8PSV\000" |
| 51222 | /* 32045 */ "PTDPHF8PSV\000" |
| 51223 | /* 32056 */ "PT2RPNTLVWZ0RSV\000" |
| 51224 | /* 32072 */ "PT2RPNTLVWZ1RSV\000" |
| 51225 | /* 32088 */ "PTILELOADDRSV\000" |
| 51226 | /* 32102 */ "PTCVTROWPS2BF16HrreV\000" |
| 51227 | /* 32123 */ "PTCVTROWPS2PHHrreV\000" |
| 51228 | /* 32142 */ "PTCVTROWPS2BF16LrreV\000" |
| 51229 | /* 32163 */ "PTCVTROWPS2PHLrreV\000" |
| 51230 | /* 32182 */ "PTCVTROWD2PSrreV\000" |
| 51231 | /* 32199 */ "PTILEMOVROWrreV\000" |
| 51232 | /* 32215 */ "PTCVTROWPS2BF16HrriV\000" |
| 51233 | /* 32236 */ "PTCVTROWPS2PHHrriV\000" |
| 51234 | /* 32255 */ "PTCVTROWPS2BF16LrriV\000" |
| 51235 | /* 32276 */ "PTCVTROWPS2PHLrriV\000" |
| 51236 | /* 32295 */ "PTCVTROWD2PSrriV\000" |
| 51237 | /* 32312 */ "PTILEMOVROWrriV\000" |
| 51238 | /* 32328 */ "KSET0W\000" |
| 51239 | /* 32335 */ "KSET1W\000" |
| 51240 | /* 32342 */ "CBW\000" |
| 51241 | /* 32346 */ "PREFETCHW\000" |
| 51242 | /* 32356 */ "G_FPOW\000" |
| 51243 | /* 32363 */ "NOOPW\000" |
| 51244 | /* 32369 */ "SCASW\000" |
| 51245 | /* 32375 */ "LODSW\000" |
| 51246 | /* 32381 */ "INSW\000" |
| 51247 | /* 32386 */ "STOSW\000" |
| 51248 | /* 32392 */ "CMPSW\000" |
| 51249 | /* 32398 */ "OUTSW\000" |
| 51250 | /* 32404 */ "MOVSW\000" |
| 51251 | /* 32410 */ "CMOV_FR32X\000" |
| 51252 | /* 32421 */ "FYL2X\000" |
| 51253 | /* 32427 */ "CMOV_FR64X\000" |
| 51254 | /* 32438 */ "CMOV_FR16X\000" |
| 51255 | /* 32449 */ "CMOV_VR256X\000" |
| 51256 | /* 32461 */ "CMOV_VR128X\000" |
| 51257 | /* 32473 */ "G_VECREDUCE_FMAX\000" |
| 51258 | /* 32490 */ "G_ATOMICRMW_FMAX\000" |
| 51259 | /* 32507 */ "G_VECREDUCE_SMAX\000" |
| 51260 | /* 32524 */ "G_SMAX\000" |
| 51261 | /* 32531 */ "G_VECREDUCE_UMAX\000" |
| 51262 | /* 32548 */ "G_UMAX\000" |
| 51263 | /* 32555 */ "G_ATOMICRMW_UMAX\000" |
| 51264 | /* 32572 */ "G_ATOMICRMW_MAX\000" |
| 51265 | /* 32588 */ "LCMPXCHG16B_SAVE_RBX\000" |
| 51266 | /* 32609 */ "MWAITX_SAVE_RBX\000" |
| 51267 | /* 32625 */ "LCMPXCHG16B_NO_RBX\000" |
| 51268 | /* 32644 */ "G_FRAME_INDEX\000" |
| 51269 | /* 32658 */ "FNCLEX\000" |
| 51270 | /* 32665 */ "MOVSX32rm8_NOREX\000" |
| 51271 | /* 32682 */ "MOVZX32rm8_NOREX\000" |
| 51272 | /* 32699 */ "MOVSX32rr8_NOREX\000" |
| 51273 | /* 32716 */ "MOVZX32rr8_NOREX\000" |
| 51274 | /* 32733 */ "MOV8rm_NOREX\000" |
| 51275 | /* 32746 */ "MOV8mr_NOREX\000" |
| 51276 | /* 32759 */ "XOR8rr_NOREX\000" |
| 51277 | /* 32772 */ "MOV8rr_NOREX\000" |
| 51278 | /* 32785 */ "TAILJMPm64_REX\000" |
| 51279 | /* 32800 */ "TAILJMPr64_REX\000" |
| 51280 | /* 32815 */ "JMP64m_REX\000" |
| 51281 | /* 32826 */ "JMP64r_REX\000" |
| 51282 | /* 32837 */ "T2RPNTLVWZ0_EVEX\000" |
| 51283 | /* 32854 */ "T2RPNTLVWZ0T1_EVEX\000" |
| 51284 | /* 32873 */ "T2RPNTLVWZ1T1_EVEX\000" |
| 51285 | /* 32892 */ "TILELOADDT1_EVEX\000" |
| 51286 | /* 32909 */ "T2RPNTLVWZ0RST1_EVEX\000" |
| 51287 | /* 32930 */ "T2RPNTLVWZ1RST1_EVEX\000" |
| 51288 | /* 32951 */ "TILELOADDRST1_EVEX\000" |
| 51289 | /* 32970 */ "T2RPNTLVWZ1_EVEX\000" |
| 51290 | /* 32987 */ "RCL32m1_EVEX\000" |
| 51291 | /* 33000 */ "SHL32m1_EVEX\000" |
| 51292 | /* 33013 */ "ROL32m1_EVEX\000" |
| 51293 | /* 33026 */ "SAR32m1_EVEX\000" |
| 51294 | /* 33039 */ "RCR32m1_EVEX\000" |
| 51295 | /* 33052 */ "SHR32m1_EVEX\000" |
| 51296 | /* 33065 */ "ROR32m1_EVEX\000" |
| 51297 | /* 33078 */ "RCL64m1_EVEX\000" |
| 51298 | /* 33091 */ "SHL64m1_EVEX\000" |
| 51299 | /* 33104 */ "ROL64m1_EVEX\000" |
| 51300 | /* 33117 */ "SAR64m1_EVEX\000" |
| 51301 | /* 33130 */ "RCR64m1_EVEX\000" |
| 51302 | /* 33143 */ "SHR64m1_EVEX\000" |
| 51303 | /* 33156 */ "ROR64m1_EVEX\000" |
| 51304 | /* 33169 */ "RCL16m1_EVEX\000" |
| 51305 | /* 33182 */ "SHL16m1_EVEX\000" |
| 51306 | /* 33195 */ "ROL16m1_EVEX\000" |
| 51307 | /* 33208 */ "SAR16m1_EVEX\000" |
| 51308 | /* 33221 */ "RCR16m1_EVEX\000" |
| 51309 | /* 33234 */ "SHR16m1_EVEX\000" |
| 51310 | /* 33247 */ "ROR16m1_EVEX\000" |
| 51311 | /* 33260 */ "RCL8m1_EVEX\000" |
| 51312 | /* 33272 */ "SHL8m1_EVEX\000" |
| 51313 | /* 33284 */ "ROL8m1_EVEX\000" |
| 51314 | /* 33296 */ "SAR8m1_EVEX\000" |
| 51315 | /* 33308 */ "RCR8m1_EVEX\000" |
| 51316 | /* 33320 */ "SHR8m1_EVEX\000" |
| 51317 | /* 33332 */ "ROR8m1_EVEX\000" |
| 51318 | /* 33344 */ "RCL32r1_EVEX\000" |
| 51319 | /* 33357 */ "SHL32r1_EVEX\000" |
| 51320 | /* 33370 */ "ROL32r1_EVEX\000" |
| 51321 | /* 33383 */ "SAR32r1_EVEX\000" |
| 51322 | /* 33396 */ "RCR32r1_EVEX\000" |
| 51323 | /* 33409 */ "SHR32r1_EVEX\000" |
| 51324 | /* 33422 */ "ROR32r1_EVEX\000" |
| 51325 | /* 33435 */ "RCL64r1_EVEX\000" |
| 51326 | /* 33448 */ "SHL64r1_EVEX\000" |
| 51327 | /* 33461 */ "ROL64r1_EVEX\000" |
| 51328 | /* 33474 */ "SAR64r1_EVEX\000" |
| 51329 | /* 33487 */ "RCR64r1_EVEX\000" |
| 51330 | /* 33500 */ "SHR64r1_EVEX\000" |
| 51331 | /* 33513 */ "ROR64r1_EVEX\000" |
| 51332 | /* 33526 */ "RCL16r1_EVEX\000" |
| 51333 | /* 33539 */ "SHL16r1_EVEX\000" |
| 51334 | /* 33552 */ "ROL16r1_EVEX\000" |
| 51335 | /* 33565 */ "SAR16r1_EVEX\000" |
| 51336 | /* 33578 */ "RCR16r1_EVEX\000" |
| 51337 | /* 33591 */ "SHR16r1_EVEX\000" |
| 51338 | /* 33604 */ "ROR16r1_EVEX\000" |
| 51339 | /* 33617 */ "RCL8r1_EVEX\000" |
| 51340 | /* 33629 */ "SHL8r1_EVEX\000" |
| 51341 | /* 33641 */ "ROL8r1_EVEX\000" |
| 51342 | /* 33653 */ "SAR8r1_EVEX\000" |
| 51343 | /* 33665 */ "RCR8r1_EVEX\000" |
| 51344 | /* 33677 */ "SHR8r1_EVEX\000" |
| 51345 | /* 33689 */ "ROR8r1_EVEX\000" |
| 51346 | /* 33701 */ "MOVDIR64B32_EVEX\000" |
| 51347 | /* 33718 */ "ENQCMD32_EVEX\000" |
| 51348 | /* 33732 */ "MOVDIRI32_EVEX\000" |
| 51349 | /* 33747 */ "ENQCMDS32_EVEX\000" |
| 51350 | /* 33762 */ "SBB64mi32_EVEX\000" |
| 51351 | /* 33777 */ "SUB64mi32_EVEX\000" |
| 51352 | /* 33792 */ "ADC64mi32_EVEX\000" |
| 51353 | /* 33807 */ "ADD64mi32_EVEX\000" |
| 51354 | /* 33822 */ "AND64mi32_EVEX\000" |
| 51355 | /* 33837 */ "XOR64mi32_EVEX\000" |
| 51356 | /* 33852 */ "IMUL64rmi32_EVEX\000" |
| 51357 | /* 33869 */ "SBB64ri32_EVEX\000" |
| 51358 | /* 33884 */ "SUB64ri32_EVEX\000" |
| 51359 | /* 33899 */ "ADC64ri32_EVEX\000" |
| 51360 | /* 33914 */ "ADD64ri32_EVEX\000" |
| 51361 | /* 33929 */ "AND64ri32_EVEX\000" |
| 51362 | /* 33944 */ "XOR64ri32_EVEX\000" |
| 51363 | /* 33959 */ "IMUL64rri32_EVEX\000" |
| 51364 | /* 33976 */ "CRC32r32m32_EVEX\000" |
| 51365 | /* 33993 */ "CRC32r32r32_EVEX\000" |
| 51366 | /* 34010 */ "CMPCCXADDmr32_EVEX\000" |
| 51367 | /* 34029 */ "MOVDIR64B64_EVEX\000" |
| 51368 | /* 34046 */ "INVPCID64_EVEX\000" |
| 51369 | /* 34061 */ "INVVPID64_EVEX\000" |
| 51370 | /* 34076 */ "ENQCMD64_EVEX\000" |
| 51371 | /* 34090 */ "MOVDIRI64_EVEX\000" |
| 51372 | /* 34105 */ "ENQCMDS64_EVEX\000" |
| 51373 | /* 34120 */ "INVEPT64_EVEX\000" |
| 51374 | /* 34134 */ "CRC32r64m64_EVEX\000" |
| 51375 | /* 34151 */ "CRC32r64r64_EVEX\000" |
| 51376 | /* 34168 */ "CMPCCXADDmr64_EVEX\000" |
| 51377 | /* 34187 */ "CRC32r32m16_EVEX\000" |
| 51378 | /* 34204 */ "CRC32r32r16_EVEX\000" |
| 51379 | /* 34221 */ "SBB32mi8_EVEX\000" |
| 51380 | /* 34235 */ "SUB32mi8_EVEX\000" |
| 51381 | /* 34249 */ "ADC32mi8_EVEX\000" |
| 51382 | /* 34263 */ "ADD32mi8_EVEX\000" |
| 51383 | /* 34277 */ "AND32mi8_EVEX\000" |
| 51384 | /* 34291 */ "XOR32mi8_EVEX\000" |
| 51385 | /* 34305 */ "SBB64mi8_EVEX\000" |
| 51386 | /* 34319 */ "SUB64mi8_EVEX\000" |
| 51387 | /* 34333 */ "ADC64mi8_EVEX\000" |
| 51388 | /* 34347 */ "ADD64mi8_EVEX\000" |
| 51389 | /* 34361 */ "AND64mi8_EVEX\000" |
| 51390 | /* 34375 */ "XOR64mi8_EVEX\000" |
| 51391 | /* 34389 */ "SBB16mi8_EVEX\000" |
| 51392 | /* 34403 */ "SUB16mi8_EVEX\000" |
| 51393 | /* 34417 */ "ADC16mi8_EVEX\000" |
| 51394 | /* 34431 */ "ADD16mi8_EVEX\000" |
| 51395 | /* 34445 */ "AND16mi8_EVEX\000" |
| 51396 | /* 34459 */ "XOR16mi8_EVEX\000" |
| 51397 | /* 34473 */ "IMUL32rmi8_EVEX\000" |
| 51398 | /* 34489 */ "IMUL64rmi8_EVEX\000" |
| 51399 | /* 34505 */ "IMUL16rmi8_EVEX\000" |
| 51400 | /* 34521 */ "SBB32ri8_EVEX\000" |
| 51401 | /* 34535 */ "SUB32ri8_EVEX\000" |
| 51402 | /* 34549 */ "ADC32ri8_EVEX\000" |
| 51403 | /* 34563 */ "ADD32ri8_EVEX\000" |
| 51404 | /* 34577 */ "AND32ri8_EVEX\000" |
| 51405 | /* 34591 */ "XOR32ri8_EVEX\000" |
| 51406 | /* 34605 */ "SBB64ri8_EVEX\000" |
| 51407 | /* 34619 */ "SUB64ri8_EVEX\000" |
| 51408 | /* 34633 */ "ADC64ri8_EVEX\000" |
| 51409 | /* 34647 */ "ADD64ri8_EVEX\000" |
| 51410 | /* 34661 */ "AND64ri8_EVEX\000" |
| 51411 | /* 34675 */ "XOR64ri8_EVEX\000" |
| 51412 | /* 34689 */ "SBB16ri8_EVEX\000" |
| 51413 | /* 34703 */ "SUB16ri8_EVEX\000" |
| 51414 | /* 34717 */ "ADC16ri8_EVEX\000" |
| 51415 | /* 34731 */ "ADD16ri8_EVEX\000" |
| 51416 | /* 34745 */ "AND16ri8_EVEX\000" |
| 51417 | /* 34759 */ "XOR16ri8_EVEX\000" |
| 51418 | /* 34773 */ "SHLD32mri8_EVEX\000" |
| 51419 | /* 34789 */ "SHRD32mri8_EVEX\000" |
| 51420 | /* 34805 */ "SHLD64mri8_EVEX\000" |
| 51421 | /* 34821 */ "SHRD64mri8_EVEX\000" |
| 51422 | /* 34837 */ "SHLD16mri8_EVEX\000" |
| 51423 | /* 34853 */ "SHRD16mri8_EVEX\000" |
| 51424 | /* 34869 */ "SHLD32rri8_EVEX\000" |
| 51425 | /* 34885 */ "SHRD32rri8_EVEX\000" |
| 51426 | /* 34901 */ "IMUL32rri8_EVEX\000" |
| 51427 | /* 34917 */ "SHLD64rri8_EVEX\000" |
| 51428 | /* 34933 */ "SHRD64rri8_EVEX\000" |
| 51429 | /* 34949 */ "IMUL64rri8_EVEX\000" |
| 51430 | /* 34965 */ "SHLD16rri8_EVEX\000" |
| 51431 | /* 34981 */ "SHRD16rri8_EVEX\000" |
| 51432 | /* 34997 */ "IMUL16rri8_EVEX\000" |
| 51433 | /* 35013 */ "CRC32r32m8_EVEX\000" |
| 51434 | /* 35029 */ "CRC32r64m8_EVEX\000" |
| 51435 | /* 35045 */ "CRC32r32r8_EVEX\000" |
| 51436 | /* 35061 */ "CRC32r64r8_EVEX\000" |
| 51437 | /* 35077 */ "TILELOADD_EVEX\000" |
| 51438 | /* 35092 */ "TILESTORED_EVEX\000" |
| 51439 | /* 35108 */ "WRSSD_EVEX\000" |
| 51440 | /* 35119 */ "WRUSSD_EVEX\000" |
| 51441 | /* 35131 */ "LDTILECFG_EVEX\000" |
| 51442 | /* 35146 */ "STTILECFG_EVEX\000" |
| 51443 | /* 35161 */ "RCL32mCL_EVEX\000" |
| 51444 | /* 35175 */ "SHL32mCL_EVEX\000" |
| 51445 | /* 35189 */ "ROL32mCL_EVEX\000" |
| 51446 | /* 35203 */ "SAR32mCL_EVEX\000" |
| 51447 | /* 35217 */ "RCR32mCL_EVEX\000" |
| 51448 | /* 35231 */ "SHR32mCL_EVEX\000" |
| 51449 | /* 35245 */ "ROR32mCL_EVEX\000" |
| 51450 | /* 35259 */ "RCL64mCL_EVEX\000" |
| 51451 | /* 35273 */ "SHL64mCL_EVEX\000" |
| 51452 | /* 35287 */ "ROL64mCL_EVEX\000" |
| 51453 | /* 35301 */ "SAR64mCL_EVEX\000" |
| 51454 | /* 35315 */ "RCR64mCL_EVEX\000" |
| 51455 | /* 35329 */ "SHR64mCL_EVEX\000" |
| 51456 | /* 35343 */ "ROR64mCL_EVEX\000" |
| 51457 | /* 35357 */ "RCL16mCL_EVEX\000" |
| 51458 | /* 35371 */ "SHL16mCL_EVEX\000" |
| 51459 | /* 35385 */ "ROL16mCL_EVEX\000" |
| 51460 | /* 35399 */ "SAR16mCL_EVEX\000" |
| 51461 | /* 35413 */ "RCR16mCL_EVEX\000" |
| 51462 | /* 35427 */ "SHR16mCL_EVEX\000" |
| 51463 | /* 35441 */ "ROR16mCL_EVEX\000" |
| 51464 | /* 35455 */ "RCL8mCL_EVEX\000" |
| 51465 | /* 35468 */ "SHL8mCL_EVEX\000" |
| 51466 | /* 35481 */ "ROL8mCL_EVEX\000" |
| 51467 | /* 35494 */ "SAR8mCL_EVEX\000" |
| 51468 | /* 35507 */ "RCR8mCL_EVEX\000" |
| 51469 | /* 35520 */ "SHR8mCL_EVEX\000" |
| 51470 | /* 35533 */ "ROR8mCL_EVEX\000" |
| 51471 | /* 35546 */ "RCL32rCL_EVEX\000" |
| 51472 | /* 35560 */ "SHL32rCL_EVEX\000" |
| 51473 | /* 35574 */ "ROL32rCL_EVEX\000" |
| 51474 | /* 35588 */ "SAR32rCL_EVEX\000" |
| 51475 | /* 35602 */ "RCR32rCL_EVEX\000" |
| 51476 | /* 35616 */ "SHR32rCL_EVEX\000" |
| 51477 | /* 35630 */ "ROR32rCL_EVEX\000" |
| 51478 | /* 35644 */ "RCL64rCL_EVEX\000" |
| 51479 | /* 35658 */ "SHL64rCL_EVEX\000" |
| 51480 | /* 35672 */ "ROL64rCL_EVEX\000" |
| 51481 | /* 35686 */ "SAR64rCL_EVEX\000" |
| 51482 | /* 35700 */ "RCR64rCL_EVEX\000" |
| 51483 | /* 35714 */ "SHR64rCL_EVEX\000" |
| 51484 | /* 35728 */ "ROR64rCL_EVEX\000" |
| 51485 | /* 35742 */ "RCL16rCL_EVEX\000" |
| 51486 | /* 35756 */ "SHL16rCL_EVEX\000" |
| 51487 | /* 35770 */ "ROL16rCL_EVEX\000" |
| 51488 | /* 35784 */ "SAR16rCL_EVEX\000" |
| 51489 | /* 35798 */ "RCR16rCL_EVEX\000" |
| 51490 | /* 35812 */ "SHR16rCL_EVEX\000" |
| 51491 | /* 35826 */ "ROR16rCL_EVEX\000" |
| 51492 | /* 35840 */ "RCL8rCL_EVEX\000" |
| 51493 | /* 35853 */ "SHL8rCL_EVEX\000" |
| 51494 | /* 35866 */ "ROL8rCL_EVEX\000" |
| 51495 | /* 35879 */ "SAR8rCL_EVEX\000" |
| 51496 | /* 35892 */ "RCR8rCL_EVEX\000" |
| 51497 | /* 35905 */ "SHR8rCL_EVEX\000" |
| 51498 | /* 35918 */ "ROR8rCL_EVEX\000" |
| 51499 | /* 35931 */ "SHLD32mrCL_EVEX\000" |
| 51500 | /* 35947 */ "SHRD32mrCL_EVEX\000" |
| 51501 | /* 35963 */ "SHLD64mrCL_EVEX\000" |
| 51502 | /* 35979 */ "SHRD64mrCL_EVEX\000" |
| 51503 | /* 35995 */ "SHLD16mrCL_EVEX\000" |
| 51504 | /* 36011 */ "SHRD16mrCL_EVEX\000" |
| 51505 | /* 36027 */ "SHLD32rrCL_EVEX\000" |
| 51506 | /* 36043 */ "SHRD32rrCL_EVEX\000" |
| 51507 | /* 36059 */ "SHLD64rrCL_EVEX\000" |
| 51508 | /* 36075 */ "SHRD64rrCL_EVEX\000" |
| 51509 | /* 36091 */ "SHLD16rrCL_EVEX\000" |
| 51510 | /* 36107 */ "SHRD16rrCL_EVEX\000" |
| 51511 | /* 36123 */ "WRSSQ_EVEX\000" |
| 51512 | /* 36134 */ "WRUSSQ_EVEX\000" |
| 51513 | /* 36146 */ "T2RPNTLVWZ0RS_EVEX\000" |
| 51514 | /* 36165 */ "T2RPNTLVWZ1RS_EVEX\000" |
| 51515 | /* 36184 */ "TILELOADDRS_EVEX\000" |
| 51516 | /* 36201 */ "SBB32mi_EVEX\000" |
| 51517 | /* 36214 */ "SUB32mi_EVEX\000" |
| 51518 | /* 36227 */ "ADC32mi_EVEX\000" |
| 51519 | /* 36240 */ "ADD32mi_EVEX\000" |
| 51520 | /* 36253 */ "AND32mi_EVEX\000" |
| 51521 | /* 36266 */ "RCL32mi_EVEX\000" |
| 51522 | /* 36279 */ "SHL32mi_EVEX\000" |
| 51523 | /* 36292 */ "ROL32mi_EVEX\000" |
| 51524 | /* 36305 */ "SAR32mi_EVEX\000" |
| 51525 | /* 36318 */ "RCR32mi_EVEX\000" |
| 51526 | /* 36331 */ "SHR32mi_EVEX\000" |
| 51527 | /* 36344 */ "ROR32mi_EVEX\000" |
| 51528 | /* 36357 */ "XOR32mi_EVEX\000" |
| 51529 | /* 36370 */ "RORX32mi_EVEX\000" |
| 51530 | /* 36384 */ "RCL64mi_EVEX\000" |
| 51531 | /* 36397 */ "SHL64mi_EVEX\000" |
| 51532 | /* 36410 */ "ROL64mi_EVEX\000" |
| 51533 | /* 36423 */ "SAR64mi_EVEX\000" |
| 51534 | /* 36436 */ "RCR64mi_EVEX\000" |
| 51535 | /* 36449 */ "SHR64mi_EVEX\000" |
| 51536 | /* 36462 */ "ROR64mi_EVEX\000" |
| 51537 | /* 36475 */ "RORX64mi_EVEX\000" |
| 51538 | /* 36489 */ "SBB16mi_EVEX\000" |
| 51539 | /* 36502 */ "SUB16mi_EVEX\000" |
| 51540 | /* 36515 */ "ADC16mi_EVEX\000" |
| 51541 | /* 36528 */ "ADD16mi_EVEX\000" |
| 51542 | /* 36541 */ "AND16mi_EVEX\000" |
| 51543 | /* 36554 */ "RCL16mi_EVEX\000" |
| 51544 | /* 36567 */ "SHL16mi_EVEX\000" |
| 51545 | /* 36580 */ "ROL16mi_EVEX\000" |
| 51546 | /* 36593 */ "SAR16mi_EVEX\000" |
| 51547 | /* 36606 */ "RCR16mi_EVEX\000" |
| 51548 | /* 36619 */ "SHR16mi_EVEX\000" |
| 51549 | /* 36632 */ "ROR16mi_EVEX\000" |
| 51550 | /* 36645 */ "XOR16mi_EVEX\000" |
| 51551 | /* 36658 */ "SBB8mi_EVEX\000" |
| 51552 | /* 36670 */ "SUB8mi_EVEX\000" |
| 51553 | /* 36682 */ "ADC8mi_EVEX\000" |
| 51554 | /* 36694 */ "ADD8mi_EVEX\000" |
| 51555 | /* 36706 */ "AND8mi_EVEX\000" |
| 51556 | /* 36718 */ "RCL8mi_EVEX\000" |
| 51557 | /* 36730 */ "SHL8mi_EVEX\000" |
| 51558 | /* 36742 */ "ROL8mi_EVEX\000" |
| 51559 | /* 36754 */ "SAR8mi_EVEX\000" |
| 51560 | /* 36766 */ "RCR8mi_EVEX\000" |
| 51561 | /* 36778 */ "SHR8mi_EVEX\000" |
| 51562 | /* 36790 */ "ROR8mi_EVEX\000" |
| 51563 | /* 36802 */ "XOR8mi_EVEX\000" |
| 51564 | /* 36814 */ "IMUL32rmi_EVEX\000" |
| 51565 | /* 36829 */ "IMUL16rmi_EVEX\000" |
| 51566 | /* 36844 */ "SBB32ri_EVEX\000" |
| 51567 | /* 36857 */ "SUB32ri_EVEX\000" |
| 51568 | /* 36870 */ "ADC32ri_EVEX\000" |
| 51569 | /* 36883 */ "ADD32ri_EVEX\000" |
| 51570 | /* 36896 */ "AND32ri_EVEX\000" |
| 51571 | /* 36909 */ "RCL32ri_EVEX\000" |
| 51572 | /* 36922 */ "SHL32ri_EVEX\000" |
| 51573 | /* 36935 */ "ROL32ri_EVEX\000" |
| 51574 | /* 36948 */ "SAR32ri_EVEX\000" |
| 51575 | /* 36961 */ "RCR32ri_EVEX\000" |
| 51576 | /* 36974 */ "SHR32ri_EVEX\000" |
| 51577 | /* 36987 */ "ROR32ri_EVEX\000" |
| 51578 | /* 37000 */ "XOR32ri_EVEX\000" |
| 51579 | /* 37013 */ "RORX32ri_EVEX\000" |
| 51580 | /* 37027 */ "RCL64ri_EVEX\000" |
| 51581 | /* 37040 */ "SHL64ri_EVEX\000" |
| 51582 | /* 37053 */ "ROL64ri_EVEX\000" |
| 51583 | /* 37066 */ "SAR64ri_EVEX\000" |
| 51584 | /* 37079 */ "RCR64ri_EVEX\000" |
| 51585 | /* 37092 */ "SHR64ri_EVEX\000" |
| 51586 | /* 37105 */ "ROR64ri_EVEX\000" |
| 51587 | /* 37118 */ "RORX64ri_EVEX\000" |
| 51588 | /* 37132 */ "SBB16ri_EVEX\000" |
| 51589 | /* 37145 */ "SUB16ri_EVEX\000" |
| 51590 | /* 37158 */ "ADC16ri_EVEX\000" |
| 51591 | /* 37171 */ "ADD16ri_EVEX\000" |
| 51592 | /* 37184 */ "AND16ri_EVEX\000" |
| 51593 | /* 37197 */ "RCL16ri_EVEX\000" |
| 51594 | /* 37210 */ "SHL16ri_EVEX\000" |
| 51595 | /* 37223 */ "ROL16ri_EVEX\000" |
| 51596 | /* 37236 */ "SAR16ri_EVEX\000" |
| 51597 | /* 37249 */ "RCR16ri_EVEX\000" |
| 51598 | /* 37262 */ "SHR16ri_EVEX\000" |
| 51599 | /* 37275 */ "ROR16ri_EVEX\000" |
| 51600 | /* 37288 */ "XOR16ri_EVEX\000" |
| 51601 | /* 37301 */ "SBB8ri_EVEX\000" |
| 51602 | /* 37313 */ "SUB8ri_EVEX\000" |
| 51603 | /* 37325 */ "ADC8ri_EVEX\000" |
| 51604 | /* 37337 */ "ADD8ri_EVEX\000" |
| 51605 | /* 37349 */ "AND8ri_EVEX\000" |
| 51606 | /* 37361 */ "RCL8ri_EVEX\000" |
| 51607 | /* 37373 */ "SHL8ri_EVEX\000" |
| 51608 | /* 37385 */ "ROL8ri_EVEX\000" |
| 51609 | /* 37397 */ "SAR8ri_EVEX\000" |
| 51610 | /* 37409 */ "RCR8ri_EVEX\000" |
| 51611 | /* 37421 */ "SHR8ri_EVEX\000" |
| 51612 | /* 37433 */ "ROR8ri_EVEX\000" |
| 51613 | /* 37445 */ "XOR8ri_EVEX\000" |
| 51614 | /* 37457 */ "URDMSRri_EVEX\000" |
| 51615 | /* 37471 */ "IMUL32rri_EVEX\000" |
| 51616 | /* 37486 */ "IMUL16rri_EVEX\000" |
| 51617 | /* 37501 */ "KMOVBkk_EVEX\000" |
| 51618 | /* 37514 */ "KMOVDkk_EVEX\000" |
| 51619 | /* 37527 */ "KMOVQkk_EVEX\000" |
| 51620 | /* 37540 */ "KMOVWkk_EVEX\000" |
| 51621 | /* 37553 */ "KMOVBmk_EVEX\000" |
| 51622 | /* 37566 */ "KMOVDmk_EVEX\000" |
| 51623 | /* 37579 */ "KMOVQmk_EVEX\000" |
| 51624 | /* 37592 */ "KMOVWmk_EVEX\000" |
| 51625 | /* 37605 */ "KMOVBrk_EVEX\000" |
| 51626 | /* 37618 */ "KMOVDrk_EVEX\000" |
| 51627 | /* 37631 */ "KMOVQrk_EVEX\000" |
| 51628 | /* 37644 */ "KMOVWrk_EVEX\000" |
| 51629 | /* 37657 */ "DEC32m_EVEX\000" |
| 51630 | /* 37669 */ "INC32m_EVEX\000" |
| 51631 | /* 37681 */ "NEG32m_EVEX\000" |
| 51632 | /* 37693 */ "IMUL32m_EVEX\000" |
| 51633 | /* 37706 */ "NOT32m_EVEX\000" |
| 51634 | /* 37718 */ "IDIV32m_EVEX\000" |
| 51635 | /* 37731 */ "DEC64m_EVEX\000" |
| 51636 | /* 37743 */ "INC64m_EVEX\000" |
| 51637 | /* 37755 */ "NEG64m_EVEX\000" |
| 51638 | /* 37767 */ "IMUL64m_EVEX\000" |
| 51639 | /* 37780 */ "NOT64m_EVEX\000" |
| 51640 | /* 37792 */ "IDIV64m_EVEX\000" |
| 51641 | /* 37805 */ "DEC16m_EVEX\000" |
| 51642 | /* 37817 */ "INC16m_EVEX\000" |
| 51643 | /* 37829 */ "NEG16m_EVEX\000" |
| 51644 | /* 37841 */ "IMUL16m_EVEX\000" |
| 51645 | /* 37854 */ "NOT16m_EVEX\000" |
| 51646 | /* 37866 */ "IDIV16m_EVEX\000" |
| 51647 | /* 37879 */ "DEC8m_EVEX\000" |
| 51648 | /* 37890 */ "INC8m_EVEX\000" |
| 51649 | /* 37901 */ "NEG8m_EVEX\000" |
| 51650 | /* 37912 */ "IMUL8m_EVEX\000" |
| 51651 | /* 37924 */ "NOT8m_EVEX\000" |
| 51652 | /* 37935 */ "IDIV8m_EVEX\000" |
| 51653 | /* 37947 */ "SETCCm_EVEX\000" |
| 51654 | /* 37959 */ "KMOVBkm_EVEX\000" |
| 51655 | /* 37972 */ "KMOVDkm_EVEX\000" |
| 51656 | /* 37985 */ "KMOVQkm_EVEX\000" |
| 51657 | /* 37998 */ "KMOVWkm_EVEX\000" |
| 51658 | /* 38011 */ "SBB32rm_EVEX\000" |
| 51659 | /* 38024 */ "SUB32rm_EVEX\000" |
| 51660 | /* 38037 */ "ADC32rm_EVEX\000" |
| 51661 | /* 38050 */ "ADD32rm_EVEX\000" |
| 51662 | /* 38063 */ "AND32rm_EVEX\000" |
| 51663 | /* 38076 */ "MOVBE32rm_EVEX\000" |
| 51664 | /* 38091 */ "BZHI32rm_EVEX\000" |
| 51665 | /* 38105 */ "BLSI32rm_EVEX\000" |
| 51666 | /* 38119 */ "BLSMSK32rm_EVEX\000" |
| 51667 | /* 38135 */ "IMUL32rm_EVEX\000" |
| 51668 | /* 38149 */ "ANDN32rm_EVEX\000" |
| 51669 | /* 38163 */ "PDEP32rm_EVEX\000" |
| 51670 | /* 38177 */ "XOR32rm_EVEX\000" |
| 51671 | /* 38190 */ "BLSR32rm_EVEX\000" |
| 51672 | /* 38204 */ "BEXTR32rm_EVEX\000" |
| 51673 | /* 38219 */ "MOVRS32rm_EVEX\000" |
| 51674 | /* 38234 */ "POPCNT32rm_EVEX\000" |
| 51675 | /* 38250 */ "LZCNT32rm_EVEX\000" |
| 51676 | /* 38265 */ "TZCNT32rm_EVEX\000" |
| 51677 | /* 38280 */ "PEXT32rm_EVEX\000" |
| 51678 | /* 38294 */ "ADCX32rm_EVEX\000" |
| 51679 | /* 38308 */ "SHLX32rm_EVEX\000" |
| 51680 | /* 38322 */ "MULX32rm_EVEX\000" |
| 51681 | /* 38336 */ "ADOX32rm_EVEX\000" |
| 51682 | /* 38350 */ "SARX32rm_EVEX\000" |
| 51683 | /* 38364 */ "SHRX32rm_EVEX\000" |
| 51684 | /* 38378 */ "SBB64rm_EVEX\000" |
| 51685 | /* 38391 */ "SUB64rm_EVEX\000" |
| 51686 | /* 38404 */ "ADC64rm_EVEX\000" |
| 51687 | /* 38417 */ "ADD64rm_EVEX\000" |
| 51688 | /* 38430 */ "AND64rm_EVEX\000" |
| 51689 | /* 38443 */ "MOVBE64rm_EVEX\000" |
| 51690 | /* 38458 */ "BZHI64rm_EVEX\000" |
| 51691 | /* 38472 */ "BLSI64rm_EVEX\000" |
| 51692 | /* 38486 */ "BLSMSK64rm_EVEX\000" |
| 51693 | /* 38502 */ "IMUL64rm_EVEX\000" |
| 51694 | /* 38516 */ "ANDN64rm_EVEX\000" |
| 51695 | /* 38530 */ "PDEP64rm_EVEX\000" |
| 51696 | /* 38544 */ "XOR64rm_EVEX\000" |
| 51697 | /* 38557 */ "BLSR64rm_EVEX\000" |
| 51698 | /* 38571 */ "BEXTR64rm_EVEX\000" |
| 51699 | /* 38586 */ "MOVRS64rm_EVEX\000" |
| 51700 | /* 38601 */ "POPCNT64rm_EVEX\000" |
| 51701 | /* 38617 */ "LZCNT64rm_EVEX\000" |
| 51702 | /* 38632 */ "TZCNT64rm_EVEX\000" |
| 51703 | /* 38647 */ "PEXT64rm_EVEX\000" |
| 51704 | /* 38661 */ "ADCX64rm_EVEX\000" |
| 51705 | /* 38675 */ "SHLX64rm_EVEX\000" |
| 51706 | /* 38689 */ "MULX64rm_EVEX\000" |
| 51707 | /* 38703 */ "ADOX64rm_EVEX\000" |
| 51708 | /* 38717 */ "SARX64rm_EVEX\000" |
| 51709 | /* 38731 */ "SHRX64rm_EVEX\000" |
| 51710 | /* 38745 */ "SBB16rm_EVEX\000" |
| 51711 | /* 38758 */ "SUB16rm_EVEX\000" |
| 51712 | /* 38771 */ "ADC16rm_EVEX\000" |
| 51713 | /* 38784 */ "ADD16rm_EVEX\000" |
| 51714 | /* 38797 */ "AND16rm_EVEX\000" |
| 51715 | /* 38810 */ "MOVBE16rm_EVEX\000" |
| 51716 | /* 38825 */ "IMUL16rm_EVEX\000" |
| 51717 | /* 38839 */ "XOR16rm_EVEX\000" |
| 51718 | /* 38852 */ "MOVRS16rm_EVEX\000" |
| 51719 | /* 38867 */ "POPCNT16rm_EVEX\000" |
| 51720 | /* 38883 */ "LZCNT16rm_EVEX\000" |
| 51721 | /* 38898 */ "TZCNT16rm_EVEX\000" |
| 51722 | /* 38913 */ "SBB8rm_EVEX\000" |
| 51723 | /* 38925 */ "SUB8rm_EVEX\000" |
| 51724 | /* 38937 */ "ADC8rm_EVEX\000" |
| 51725 | /* 38949 */ "ADD8rm_EVEX\000" |
| 51726 | /* 38961 */ "AND8rm_EVEX\000" |
| 51727 | /* 38973 */ "XOR8rm_EVEX\000" |
| 51728 | /* 38985 */ "MOVRS8rm_EVEX\000" |
| 51729 | /* 38999 */ "DEC32r_EVEX\000" |
| 51730 | /* 39011 */ "INC32r_EVEX\000" |
| 51731 | /* 39023 */ "NEG32r_EVEX\000" |
| 51732 | /* 39035 */ "IMUL32r_EVEX\000" |
| 51733 | /* 39048 */ "NOT32r_EVEX\000" |
| 51734 | /* 39060 */ "IDIV32r_EVEX\000" |
| 51735 | /* 39073 */ "DEC64r_EVEX\000" |
| 51736 | /* 39085 */ "INC64r_EVEX\000" |
| 51737 | /* 39097 */ "NEG64r_EVEX\000" |
| 51738 | /* 39109 */ "IMUL64r_EVEX\000" |
| 51739 | /* 39122 */ "NOT64r_EVEX\000" |
| 51740 | /* 39134 */ "IDIV64r_EVEX\000" |
| 51741 | /* 39147 */ "DEC16r_EVEX\000" |
| 51742 | /* 39159 */ "INC16r_EVEX\000" |
| 51743 | /* 39171 */ "NEG16r_EVEX\000" |
| 51744 | /* 39183 */ "IMUL16r_EVEX\000" |
| 51745 | /* 39196 */ "NOT16r_EVEX\000" |
| 51746 | /* 39208 */ "IDIV16r_EVEX\000" |
| 51747 | /* 39221 */ "DEC8r_EVEX\000" |
| 51748 | /* 39232 */ "INC8r_EVEX\000" |
| 51749 | /* 39243 */ "NEG8r_EVEX\000" |
| 51750 | /* 39254 */ "IMUL8r_EVEX\000" |
| 51751 | /* 39266 */ "NOT8r_EVEX\000" |
| 51752 | /* 39277 */ "IDIV8r_EVEX\000" |
| 51753 | /* 39289 */ "SETCCr_EVEX\000" |
| 51754 | /* 39301 */ "UWRMSRir_EVEX\000" |
| 51755 | /* 39315 */ "WRMSRNSir_EVEX\000" |
| 51756 | /* 39330 */ "KMOVBkr_EVEX\000" |
| 51757 | /* 39343 */ "KMOVDkr_EVEX\000" |
| 51758 | /* 39356 */ "KMOVQkr_EVEX\000" |
| 51759 | /* 39369 */ "KMOVWkr_EVEX\000" |
| 51760 | /* 39382 */ "SBB32mr_EVEX\000" |
| 51761 | /* 39395 */ "SUB32mr_EVEX\000" |
| 51762 | /* 39408 */ "ADC32mr_EVEX\000" |
| 51763 | /* 39421 */ "AADD32mr_EVEX\000" |
| 51764 | /* 39435 */ "AAND32mr_EVEX\000" |
| 51765 | /* 39449 */ "MOVBE32mr_EVEX\000" |
| 51766 | /* 39464 */ "AOR32mr_EVEX\000" |
| 51767 | /* 39477 */ "AXOR32mr_EVEX\000" |
| 51768 | /* 39491 */ "SBB64mr_EVEX\000" |
| 51769 | /* 39504 */ "SUB64mr_EVEX\000" |
| 51770 | /* 39517 */ "ADC64mr_EVEX\000" |
| 51771 | /* 39530 */ "AADD64mr_EVEX\000" |
| 51772 | /* 39544 */ "AAND64mr_EVEX\000" |
| 51773 | /* 39558 */ "MOVBE64mr_EVEX\000" |
| 51774 | /* 39573 */ "AOR64mr_EVEX\000" |
| 51775 | /* 39586 */ "AXOR64mr_EVEX\000" |
| 51776 | /* 39600 */ "SBB16mr_EVEX\000" |
| 51777 | /* 39613 */ "SUB16mr_EVEX\000" |
| 51778 | /* 39626 */ "ADC16mr_EVEX\000" |
| 51779 | /* 39639 */ "ADD16mr_EVEX\000" |
| 51780 | /* 39652 */ "AND16mr_EVEX\000" |
| 51781 | /* 39665 */ "MOVBE16mr_EVEX\000" |
| 51782 | /* 39680 */ "XOR16mr_EVEX\000" |
| 51783 | /* 39693 */ "SBB8mr_EVEX\000" |
| 51784 | /* 39705 */ "SUB8mr_EVEX\000" |
| 51785 | /* 39717 */ "ADC8mr_EVEX\000" |
| 51786 | /* 39729 */ "ADD8mr_EVEX\000" |
| 51787 | /* 39741 */ "AND8mr_EVEX\000" |
| 51788 | /* 39753 */ "XOR8mr_EVEX\000" |
| 51789 | /* 39765 */ "SBB32rr_EVEX\000" |
| 51790 | /* 39778 */ "SUB32rr_EVEX\000" |
| 51791 | /* 39791 */ "ADC32rr_EVEX\000" |
| 51792 | /* 39804 */ "ADD32rr_EVEX\000" |
| 51793 | /* 39817 */ "AND32rr_EVEX\000" |
| 51794 | /* 39830 */ "BZHI32rr_EVEX\000" |
| 51795 | /* 39844 */ "BLSI32rr_EVEX\000" |
| 51796 | /* 39858 */ "BLSMSK32rr_EVEX\000" |
| 51797 | /* 39874 */ "IMUL32rr_EVEX\000" |
| 51798 | /* 39888 */ "ANDN32rr_EVEX\000" |
| 51799 | /* 39902 */ "PDEP32rr_EVEX\000" |
| 51800 | /* 39916 */ "XOR32rr_EVEX\000" |
| 51801 | /* 39929 */ "BLSR32rr_EVEX\000" |
| 51802 | /* 39943 */ "BEXTR32rr_EVEX\000" |
| 51803 | /* 39958 */ "POPCNT32rr_EVEX\000" |
| 51804 | /* 39974 */ "LZCNT32rr_EVEX\000" |
| 51805 | /* 39989 */ "TZCNT32rr_EVEX\000" |
| 51806 | /* 40004 */ "PEXT32rr_EVEX\000" |
| 51807 | /* 40018 */ "ADCX32rr_EVEX\000" |
| 51808 | /* 40032 */ "SHLX32rr_EVEX\000" |
| 51809 | /* 40046 */ "MULX32rr_EVEX\000" |
| 51810 | /* 40060 */ "ADOX32rr_EVEX\000" |
| 51811 | /* 40074 */ "SARX32rr_EVEX\000" |
| 51812 | /* 40088 */ "SHRX32rr_EVEX\000" |
| 51813 | /* 40102 */ "SBB64rr_EVEX\000" |
| 51814 | /* 40115 */ "SUB64rr_EVEX\000" |
| 51815 | /* 40128 */ "ADC64rr_EVEX\000" |
| 51816 | /* 40141 */ "ADD64rr_EVEX\000" |
| 51817 | /* 40154 */ "AND64rr_EVEX\000" |
| 51818 | /* 40167 */ "BZHI64rr_EVEX\000" |
| 51819 | /* 40181 */ "BLSI64rr_EVEX\000" |
| 51820 | /* 40195 */ "BLSMSK64rr_EVEX\000" |
| 51821 | /* 40211 */ "IMUL64rr_EVEX\000" |
| 51822 | /* 40225 */ "ANDN64rr_EVEX\000" |
| 51823 | /* 40239 */ "PDEP64rr_EVEX\000" |
| 51824 | /* 40253 */ "XOR64rr_EVEX\000" |
| 51825 | /* 40266 */ "BLSR64rr_EVEX\000" |
| 51826 | /* 40280 */ "BEXTR64rr_EVEX\000" |
| 51827 | /* 40295 */ "POPCNT64rr_EVEX\000" |
| 51828 | /* 40311 */ "LZCNT64rr_EVEX\000" |
| 51829 | /* 40326 */ "TZCNT64rr_EVEX\000" |
| 51830 | /* 40341 */ "PEXT64rr_EVEX\000" |
| 51831 | /* 40355 */ "ADCX64rr_EVEX\000" |
| 51832 | /* 40369 */ "SHLX64rr_EVEX\000" |
| 51833 | /* 40383 */ "MULX64rr_EVEX\000" |
| 51834 | /* 40397 */ "ADOX64rr_EVEX\000" |
| 51835 | /* 40411 */ "SARX64rr_EVEX\000" |
| 51836 | /* 40425 */ "SHRX64rr_EVEX\000" |
| 51837 | /* 40439 */ "SBB16rr_EVEX\000" |
| 51838 | /* 40452 */ "SUB16rr_EVEX\000" |
| 51839 | /* 40465 */ "ADC16rr_EVEX\000" |
| 51840 | /* 40478 */ "ADD16rr_EVEX\000" |
| 51841 | /* 40491 */ "AND16rr_EVEX\000" |
| 51842 | /* 40504 */ "IMUL16rr_EVEX\000" |
| 51843 | /* 40518 */ "XOR16rr_EVEX\000" |
| 51844 | /* 40531 */ "POPCNT16rr_EVEX\000" |
| 51845 | /* 40547 */ "LZCNT16rr_EVEX\000" |
| 51846 | /* 40562 */ "TZCNT16rr_EVEX\000" |
| 51847 | /* 40577 */ "SBB8rr_EVEX\000" |
| 51848 | /* 40589 */ "SUB8rr_EVEX\000" |
| 51849 | /* 40601 */ "ADC8rr_EVEX\000" |
| 51850 | /* 40613 */ "ADD8rr_EVEX\000" |
| 51851 | /* 40625 */ "AND8rr_EVEX\000" |
| 51852 | /* 40637 */ "XOR8rr_EVEX\000" |
| 51853 | /* 40649 */ "URDMSRrr_EVEX\000" |
| 51854 | /* 40663 */ "UWRMSRrr_EVEX\000" |
| 51855 | /* 40677 */ "G_SBFX\000" |
| 51856 | /* 40684 */ "G_UBFX\000" |
| 51857 | /* 40691 */ "ADDR32_PREFIX\000" |
| 51858 | /* 40705 */ "REX64_PREFIX\000" |
| 51859 | /* 40718 */ "DATA16_PREFIX\000" |
| 51860 | /* 40732 */ "ADDR16_PREFIX\000" |
| 51861 | /* 40746 */ "REPNE_PREFIX\000" |
| 51862 | /* 40759 */ "XACQUIRE_PREFIX\000" |
| 51863 | /* 40775 */ "XRELEASE_PREFIX\000" |
| 51864 | /* 40791 */ "LOCK_PREFIX\000" |
| 51865 | /* 40803 */ "REP_PREFIX\000" |
| 51866 | /* 40814 */ "CS_PREFIX\000" |
| 51867 | /* 40824 */ "DS_PREFIX\000" |
| 51868 | /* 40834 */ "ES_PREFIX\000" |
| 51869 | /* 40844 */ "FS_PREFIX\000" |
| 51870 | /* 40854 */ "GS_PREFIX\000" |
| 51871 | /* 40864 */ "SS_PREFIX\000" |
| 51872 | /* 40874 */ "G_SMULFIX\000" |
| 51873 | /* 40884 */ "G_UMULFIX\000" |
| 51874 | /* 40894 */ "G_SDIVFIX\000" |
| 51875 | /* 40904 */ "G_UDIVFIX\000" |
| 51876 | /* 40914 */ "VMOVAPSZ256rm_NOVLX\000" |
| 51877 | /* 40934 */ "VMOVUPSZ256rm_NOVLX\000" |
| 51878 | /* 40954 */ "VMOVAPSZ128rm_NOVLX\000" |
| 51879 | /* 40974 */ "VMOVUPSZ128rm_NOVLX\000" |
| 51880 | /* 40994 */ "VMOVAPSZ256mr_NOVLX\000" |
| 51881 | /* 41014 */ "VMOVUPSZ256mr_NOVLX\000" |
| 51882 | /* 41034 */ "VMOVAPSZ128mr_NOVLX\000" |
| 51883 | /* 41054 */ "VMOVUPSZ128mr_NOVLX\000" |
| 51884 | /* 41074 */ "MWAITX\000" |
| 51885 | /* 41081 */ "LOADIWKEY\000" |
| 51886 | /* 41091 */ "G_MEMCPY\000" |
| 51887 | /* 41100 */ "COPY\000" |
| 51888 | /* 41105 */ "RMPQUERY\000" |
| 51889 | /* 41114 */ "CONVERGENCECTRL_ENTRY\000" |
| 51890 | /* 41136 */ "CLRSSBSY\000" |
| 51891 | /* 41145 */ "SETSSBSY\000" |
| 51892 | /* 41154 */ "G_CTLZ\000" |
| 51893 | /* 41161 */ "G_CTTZ\000" |
| 51894 | /* 41168 */ "JECXZ\000" |
| 51895 | /* 41174 */ "JCXZ\000" |
| 51896 | /* 41179 */ "JRCXZ\000" |
| 51897 | /* 41185 */ "MOV32o32a\000" |
| 51898 | /* 41195 */ "MOV64o32a\000" |
| 51899 | /* 41205 */ "MOV16o32a\000" |
| 51900 | /* 41215 */ "MOV8o32a\000" |
| 51901 | /* 41224 */ "MOV32o64a\000" |
| 51902 | /* 41234 */ "MOV64o64a\000" |
| 51903 | /* 41244 */ "MOV16o64a\000" |
| 51904 | /* 41254 */ "MOV8o64a\000" |
| 51905 | /* 41263 */ "MOV32o16a\000" |
| 51906 | /* 41273 */ "MOV16o16a\000" |
| 51907 | /* 41283 */ "MOV8o16a\000" |
| 51908 | /* 41292 */ "VREDUCEPDZrrib\000" |
| 51909 | /* 41307 */ "VRANGEPDZrrib\000" |
| 51910 | /* 41321 */ "VRNDSCALEPDZrrib\000" |
| 51911 | /* 41338 */ "VFIXUPIMMPDZrrib\000" |
| 51912 | /* 41355 */ "VCMPPDZrrib\000" |
| 51913 | /* 41367 */ "VGETMANTPDZrrib\000" |
| 51914 | /* 41383 */ "VMINMAXPDZrrib\000" |
| 51915 | /* 41398 */ "VREDUCESDZrrib\000" |
| 51916 | /* 41413 */ "VRANGESDZrrib\000" |
| 51917 | /* 41427 */ "VFIXUPIMMSDZrrib\000" |
| 51918 | /* 41444 */ "VGETMANTSDZrrib\000" |
| 51919 | /* 41460 */ "VREDUCEPHZrrib\000" |
| 51920 | /* 41475 */ "VRNDSCALEPHZrrib\000" |
| 51921 | /* 41492 */ "VCMPPHZrrib\000" |
| 51922 | /* 41504 */ "VGETMANTPHZrrib\000" |
| 51923 | /* 41520 */ "VMINMAXPHZrrib\000" |
| 51924 | /* 41535 */ "VREDUCESHZrrib\000" |
| 51925 | /* 41550 */ "VGETMANTSHZrrib\000" |
| 51926 | /* 41566 */ "VREDUCEPSZrrib\000" |
| 51927 | /* 41581 */ "VRANGEPSZrrib\000" |
| 51928 | /* 41595 */ "VRNDSCALEPSZrrib\000" |
| 51929 | /* 41612 */ "VFIXUPIMMPSZrrib\000" |
| 51930 | /* 41629 */ "VCMPPSZrrib\000" |
| 51931 | /* 41641 */ "VGETMANTPSZrrib\000" |
| 51932 | /* 41657 */ "VMINMAXPSZrrib\000" |
| 51933 | /* 41672 */ "VREDUCESSZrrib\000" |
| 51934 | /* 41687 */ "VRANGESSZrrib\000" |
| 51935 | /* 41701 */ "VFIXUPIMMSSZrrib\000" |
| 51936 | /* 41718 */ "VGETMANTSSZrrib\000" |
| 51937 | /* 41734 */ "VFMSUB231BF16Z256mb\000" |
| 51938 | /* 41754 */ "VFNMSUB231BF16Z256mb\000" |
| 51939 | /* 41775 */ "VFMADD231BF16Z256mb\000" |
| 51940 | /* 41795 */ "VFNMADD231BF16Z256mb\000" |
| 51941 | /* 41816 */ "VFMSUB132BF16Z256mb\000" |
| 51942 | /* 41836 */ "VFNMSUB132BF16Z256mb\000" |
| 51943 | /* 41857 */ "VFMADD132BF16Z256mb\000" |
| 51944 | /* 41877 */ "VFNMADD132BF16Z256mb\000" |
| 51945 | /* 41898 */ "VFMSUB213BF16Z256mb\000" |
| 51946 | /* 41918 */ "VFNMSUB213BF16Z256mb\000" |
| 51947 | /* 41939 */ "VFMADD213BF16Z256mb\000" |
| 51948 | /* 41959 */ "VFNMADD213BF16Z256mb\000" |
| 51949 | /* 41980 */ "VRCPBF16Z256mb\000" |
| 51950 | /* 41995 */ "VGETEXPBF16Z256mb\000" |
| 51951 | /* 42013 */ "VRSQRTBF16Z256mb\000" |
| 51952 | /* 42030 */ "VSQRTBF16Z256mb\000" |
| 51953 | /* 42046 */ "VFMADDSUB231PDZ256mb\000" |
| 51954 | /* 42067 */ "VFMSUB231PDZ256mb\000" |
| 51955 | /* 42085 */ "VFNMSUB231PDZ256mb\000" |
| 51956 | /* 42104 */ "VFMSUBADD231PDZ256mb\000" |
| 51957 | /* 42125 */ "VFMADD231PDZ256mb\000" |
| 51958 | /* 42143 */ "VFNMADD231PDZ256mb\000" |
| 51959 | /* 42162 */ "VFMADDSUB132PDZ256mb\000" |
| 51960 | /* 42183 */ "VFMSUB132PDZ256mb\000" |
| 51961 | /* 42201 */ "VFNMSUB132PDZ256mb\000" |
| 51962 | /* 42220 */ "VFMSUBADD132PDZ256mb\000" |
| 51963 | /* 42241 */ "VFMADD132PDZ256mb\000" |
| 51964 | /* 42259 */ "VFNMADD132PDZ256mb\000" |
| 51965 | /* 42278 */ "VFMADDSUB213PDZ256mb\000" |
| 51966 | /* 42299 */ "VFMSUB213PDZ256mb\000" |
| 51967 | /* 42317 */ "VFNMSUB213PDZ256mb\000" |
| 51968 | /* 42336 */ "VFMSUBADD213PDZ256mb\000" |
| 51969 | /* 42357 */ "VFMADD213PDZ256mb\000" |
| 51970 | /* 42375 */ "VFNMADD213PDZ256mb\000" |
| 51971 | /* 42394 */ "VRCP14PDZ256mb\000" |
| 51972 | /* 42409 */ "VRSQRT14PDZ256mb\000" |
| 51973 | /* 42426 */ "VGETEXPPDZ256mb\000" |
| 51974 | /* 42442 */ "VSQRTPDZ256mb\000" |
| 51975 | /* 42456 */ "VPDPBSSDZ256mb\000" |
| 51976 | /* 42471 */ "VPDPWSSDZ256mb\000" |
| 51977 | /* 42486 */ "VPDPBUSDZ256mb\000" |
| 51978 | /* 42501 */ "VPDPWUSDZ256mb\000" |
| 51979 | /* 42516 */ "VPDPBSUDZ256mb\000" |
| 51980 | /* 42531 */ "VPDPWSUDZ256mb\000" |
| 51981 | /* 42546 */ "VPDPBUUDZ256mb\000" |
| 51982 | /* 42561 */ "VPDPWUUDZ256mb\000" |
| 51983 | /* 42576 */ "VPSHLDVDZ256mb\000" |
| 51984 | /* 42591 */ "VPSHRDVDZ256mb\000" |
| 51985 | /* 42606 */ "VFMADDSUB231PHZ256mb\000" |
| 51986 | /* 42627 */ "VFMSUB231PHZ256mb\000" |
| 51987 | /* 42645 */ "VFNMSUB231PHZ256mb\000" |
| 51988 | /* 42664 */ "VFMSUBADD231PHZ256mb\000" |
| 51989 | /* 42685 */ "VFMADD231PHZ256mb\000" |
| 51990 | /* 42703 */ "VFNMADD231PHZ256mb\000" |
| 51991 | /* 42722 */ "VFMADDSUB132PHZ256mb\000" |
| 51992 | /* 42743 */ "VFMSUB132PHZ256mb\000" |
| 51993 | /* 42761 */ "VFNMSUB132PHZ256mb\000" |
| 51994 | /* 42780 */ "VFMSUBADD132PHZ256mb\000" |
| 51995 | /* 42801 */ "VFMADD132PHZ256mb\000" |
| 51996 | /* 42819 */ "VFNMADD132PHZ256mb\000" |
| 51997 | /* 42838 */ "VFMADDSUB213PHZ256mb\000" |
| 51998 | /* 42859 */ "VFMSUB213PHZ256mb\000" |
| 51999 | /* 42877 */ "VFNMSUB213PHZ256mb\000" |
| 52000 | /* 42896 */ "VFMSUBADD213PHZ256mb\000" |
| 52001 | /* 42917 */ "VFMADD213PHZ256mb\000" |
| 52002 | /* 42935 */ "VFNMADD213PHZ256mb\000" |
| 52003 | /* 42954 */ "VFCMADDCPHZ256mb\000" |
| 52004 | /* 42971 */ "VFMADDCPHZ256mb\000" |
| 52005 | /* 42987 */ "VRCPPHZ256mb\000" |
| 52006 | /* 43000 */ "VGETEXPPHZ256mb\000" |
| 52007 | /* 43016 */ "VRSQRTPHZ256mb\000" |
| 52008 | /* 43031 */ "VSQRTPHZ256mb\000" |
| 52009 | /* 43045 */ "VPMADD52HUQZ256mb\000" |
| 52010 | /* 43063 */ "VPMADD52LUQZ256mb\000" |
| 52011 | /* 43081 */ "VPSHLDVQZ256mb\000" |
| 52012 | /* 43096 */ "VPSHRDVQZ256mb\000" |
| 52013 | /* 43111 */ "VPDPBSSDSZ256mb\000" |
| 52014 | /* 43127 */ "VPDPWSSDSZ256mb\000" |
| 52015 | /* 43143 */ "VPDPBUSDSZ256mb\000" |
| 52016 | /* 43159 */ "VPDPWUSDSZ256mb\000" |
| 52017 | /* 43175 */ "VPDPBSUDSZ256mb\000" |
| 52018 | /* 43191 */ "VPDPWSUDSZ256mb\000" |
| 52019 | /* 43207 */ "VPDPBUUDSZ256mb\000" |
| 52020 | /* 43223 */ "VPDPWUUDSZ256mb\000" |
| 52021 | /* 43239 */ "VFMADDSUB231PSZ256mb\000" |
| 52022 | /* 43260 */ "VFMSUB231PSZ256mb\000" |
| 52023 | /* 43278 */ "VFNMSUB231PSZ256mb\000" |
| 52024 | /* 43297 */ "VFMSUBADD231PSZ256mb\000" |
| 52025 | /* 43318 */ "VFMADD231PSZ256mb\000" |
| 52026 | /* 43336 */ "VFNMADD231PSZ256mb\000" |
| 52027 | /* 43355 */ "VFMADDSUB132PSZ256mb\000" |
| 52028 | /* 43376 */ "VFMSUB132PSZ256mb\000" |
| 52029 | /* 43394 */ "VFNMSUB132PSZ256mb\000" |
| 52030 | /* 43413 */ "VFMSUBADD132PSZ256mb\000" |
| 52031 | /* 43434 */ "VFMADD132PSZ256mb\000" |
| 52032 | /* 43452 */ "VFNMADD132PSZ256mb\000" |
| 52033 | /* 43471 */ "VFMADDSUB213PSZ256mb\000" |
| 52034 | /* 43492 */ "VFMSUB213PSZ256mb\000" |
| 52035 | /* 43510 */ "VFNMSUB213PSZ256mb\000" |
| 52036 | /* 43529 */ "VFMSUBADD213PSZ256mb\000" |
| 52037 | /* 43550 */ "VFMADD213PSZ256mb\000" |
| 52038 | /* 43568 */ "VFNMADD213PSZ256mb\000" |
| 52039 | /* 43587 */ "VRCP14PSZ256mb\000" |
| 52040 | /* 43602 */ "VRSQRT14PSZ256mb\000" |
| 52041 | /* 43619 */ "VDPBF16PSZ256mb\000" |
| 52042 | /* 43635 */ "VDPPHPSZ256mb\000" |
| 52043 | /* 43649 */ "VGETEXPPSZ256mb\000" |
| 52044 | /* 43665 */ "VSQRTPSZ256mb\000" |
| 52045 | /* 43679 */ "VFMSUB231BF16Z128mb\000" |
| 52046 | /* 43699 */ "VFNMSUB231BF16Z128mb\000" |
| 52047 | /* 43720 */ "VFMADD231BF16Z128mb\000" |
| 52048 | /* 43740 */ "VFNMADD231BF16Z128mb\000" |
| 52049 | /* 43761 */ "VFMSUB132BF16Z128mb\000" |
| 52050 | /* 43781 */ "VFNMSUB132BF16Z128mb\000" |
| 52051 | /* 43802 */ "VFMADD132BF16Z128mb\000" |
| 52052 | /* 43822 */ "VFNMADD132BF16Z128mb\000" |
| 52053 | /* 43843 */ "VFMSUB213BF16Z128mb\000" |
| 52054 | /* 43863 */ "VFNMSUB213BF16Z128mb\000" |
| 52055 | /* 43884 */ "VFMADD213BF16Z128mb\000" |
| 52056 | /* 43904 */ "VFNMADD213BF16Z128mb\000" |
| 52057 | /* 43925 */ "VRCPBF16Z128mb\000" |
| 52058 | /* 43940 */ "VGETEXPBF16Z128mb\000" |
| 52059 | /* 43958 */ "VRSQRTBF16Z128mb\000" |
| 52060 | /* 43975 */ "VSQRTBF16Z128mb\000" |
| 52061 | /* 43991 */ "VFMADDSUB231PDZ128mb\000" |
| 52062 | /* 44012 */ "VFMSUB231PDZ128mb\000" |
| 52063 | /* 44030 */ "VFNMSUB231PDZ128mb\000" |
| 52064 | /* 44049 */ "VFMSUBADD231PDZ128mb\000" |
| 52065 | /* 44070 */ "VFMADD231PDZ128mb\000" |
| 52066 | /* 44088 */ "VFNMADD231PDZ128mb\000" |
| 52067 | /* 44107 */ "VFMADDSUB132PDZ128mb\000" |
| 52068 | /* 44128 */ "VFMSUB132PDZ128mb\000" |
| 52069 | /* 44146 */ "VFNMSUB132PDZ128mb\000" |
| 52070 | /* 44165 */ "VFMSUBADD132PDZ128mb\000" |
| 52071 | /* 44186 */ "VFMADD132PDZ128mb\000" |
| 52072 | /* 44204 */ "VFNMADD132PDZ128mb\000" |
| 52073 | /* 44223 */ "VFMADDSUB213PDZ128mb\000" |
| 52074 | /* 44244 */ "VFMSUB213PDZ128mb\000" |
| 52075 | /* 44262 */ "VFNMSUB213PDZ128mb\000" |
| 52076 | /* 44281 */ "VFMSUBADD213PDZ128mb\000" |
| 52077 | /* 44302 */ "VFMADD213PDZ128mb\000" |
| 52078 | /* 44320 */ "VFNMADD213PDZ128mb\000" |
| 52079 | /* 44339 */ "VRCP14PDZ128mb\000" |
| 52080 | /* 44354 */ "VRSQRT14PDZ128mb\000" |
| 52081 | /* 44371 */ "VGETEXPPDZ128mb\000" |
| 52082 | /* 44387 */ "VSQRTPDZ128mb\000" |
| 52083 | /* 44401 */ "VPDPBSSDZ128mb\000" |
| 52084 | /* 44416 */ "VPDPWSSDZ128mb\000" |
| 52085 | /* 44431 */ "VPDPBUSDZ128mb\000" |
| 52086 | /* 44446 */ "VPDPWUSDZ128mb\000" |
| 52087 | /* 44461 */ "VPDPBSUDZ128mb\000" |
| 52088 | /* 44476 */ "VPDPWSUDZ128mb\000" |
| 52089 | /* 44491 */ "VPDPBUUDZ128mb\000" |
| 52090 | /* 44506 */ "VPDPWUUDZ128mb\000" |
| 52091 | /* 44521 */ "VPSHLDVDZ128mb\000" |
| 52092 | /* 44536 */ "VPSHRDVDZ128mb\000" |
| 52093 | /* 44551 */ "VFMADDSUB231PHZ128mb\000" |
| 52094 | /* 44572 */ "VFMSUB231PHZ128mb\000" |
| 52095 | /* 44590 */ "VFNMSUB231PHZ128mb\000" |
| 52096 | /* 44609 */ "VFMSUBADD231PHZ128mb\000" |
| 52097 | /* 44630 */ "VFMADD231PHZ128mb\000" |
| 52098 | /* 44648 */ "VFNMADD231PHZ128mb\000" |
| 52099 | /* 44667 */ "VFMADDSUB132PHZ128mb\000" |
| 52100 | /* 44688 */ "VFMSUB132PHZ128mb\000" |
| 52101 | /* 44706 */ "VFNMSUB132PHZ128mb\000" |
| 52102 | /* 44725 */ "VFMSUBADD132PHZ128mb\000" |
| 52103 | /* 44746 */ "VFMADD132PHZ128mb\000" |
| 52104 | /* 44764 */ "VFNMADD132PHZ128mb\000" |
| 52105 | /* 44783 */ "VFMADDSUB213PHZ128mb\000" |
| 52106 | /* 44804 */ "VFMSUB213PHZ128mb\000" |
| 52107 | /* 44822 */ "VFNMSUB213PHZ128mb\000" |
| 52108 | /* 44841 */ "VFMSUBADD213PHZ128mb\000" |
| 52109 | /* 44862 */ "VFMADD213PHZ128mb\000" |
| 52110 | /* 44880 */ "VFNMADD213PHZ128mb\000" |
| 52111 | /* 44899 */ "VFCMADDCPHZ128mb\000" |
| 52112 | /* 44916 */ "VFMADDCPHZ128mb\000" |
| 52113 | /* 44932 */ "VRCPPHZ128mb\000" |
| 52114 | /* 44945 */ "VGETEXPPHZ128mb\000" |
| 52115 | /* 44961 */ "VRSQRTPHZ128mb\000" |
| 52116 | /* 44976 */ "VSQRTPHZ128mb\000" |
| 52117 | /* 44990 */ "VPMADD52HUQZ128mb\000" |
| 52118 | /* 45008 */ "VPMADD52LUQZ128mb\000" |
| 52119 | /* 45026 */ "VPSHLDVQZ128mb\000" |
| 52120 | /* 45041 */ "VPSHRDVQZ128mb\000" |
| 52121 | /* 45056 */ "VPDPBSSDSZ128mb\000" |
| 52122 | /* 45072 */ "VPDPWSSDSZ128mb\000" |
| 52123 | /* 45088 */ "VPDPBUSDSZ128mb\000" |
| 52124 | /* 45104 */ "VPDPWUSDSZ128mb\000" |
| 52125 | /* 45120 */ "VPDPBSUDSZ128mb\000" |
| 52126 | /* 45136 */ "VPDPWSUDSZ128mb\000" |
| 52127 | /* 45152 */ "VPDPBUUDSZ128mb\000" |
| 52128 | /* 45168 */ "VPDPWUUDSZ128mb\000" |
| 52129 | /* 45184 */ "VFMADDSUB231PSZ128mb\000" |
| 52130 | /* 45205 */ "VFMSUB231PSZ128mb\000" |
| 52131 | /* 45223 */ "VFNMSUB231PSZ128mb\000" |
| 52132 | /* 45242 */ "VFMSUBADD231PSZ128mb\000" |
| 52133 | /* 45263 */ "VFMADD231PSZ128mb\000" |
| 52134 | /* 45281 */ "VFNMADD231PSZ128mb\000" |
| 52135 | /* 45300 */ "VFMADDSUB132PSZ128mb\000" |
| 52136 | /* 45321 */ "VFMSUB132PSZ128mb\000" |
| 52137 | /* 45339 */ "VFNMSUB132PSZ128mb\000" |
| 52138 | /* 45358 */ "VFMSUBADD132PSZ128mb\000" |
| 52139 | /* 45379 */ "VFMADD132PSZ128mb\000" |
| 52140 | /* 45397 */ "VFNMADD132PSZ128mb\000" |
| 52141 | /* 45416 */ "VFMADDSUB213PSZ128mb\000" |
| 52142 | /* 45437 */ "VFMSUB213PSZ128mb\000" |
| 52143 | /* 45455 */ "VFNMSUB213PSZ128mb\000" |
| 52144 | /* 45474 */ "VFMSUBADD213PSZ128mb\000" |
| 52145 | /* 45495 */ "VFMADD213PSZ128mb\000" |
| 52146 | /* 45513 */ "VFNMADD213PSZ128mb\000" |
| 52147 | /* 45532 */ "VRCP14PSZ128mb\000" |
| 52148 | /* 45547 */ "VRSQRT14PSZ128mb\000" |
| 52149 | /* 45564 */ "VDPBF16PSZ128mb\000" |
| 52150 | /* 45580 */ "VDPPHPSZ128mb\000" |
| 52151 | /* 45594 */ "VGETEXPPSZ128mb\000" |
| 52152 | /* 45610 */ "VSQRTPSZ128mb\000" |
| 52153 | /* 45624 */ "VFMSUB231BF16Zmb\000" |
| 52154 | /* 45641 */ "VFNMSUB231BF16Zmb\000" |
| 52155 | /* 45659 */ "VFMADD231BF16Zmb\000" |
| 52156 | /* 45676 */ "VFNMADD231BF16Zmb\000" |
| 52157 | /* 45694 */ "VFMSUB132BF16Zmb\000" |
| 52158 | /* 45711 */ "VFNMSUB132BF16Zmb\000" |
| 52159 | /* 45729 */ "VFMADD132BF16Zmb\000" |
| 52160 | /* 45746 */ "VFNMADD132BF16Zmb\000" |
| 52161 | /* 45764 */ "VFMSUB213BF16Zmb\000" |
| 52162 | /* 45781 */ "VFNMSUB213BF16Zmb\000" |
| 52163 | /* 45799 */ "VFMADD213BF16Zmb\000" |
| 52164 | /* 45816 */ "VFNMADD213BF16Zmb\000" |
| 52165 | /* 45834 */ "VRCPBF16Zmb\000" |
| 52166 | /* 45846 */ "VGETEXPBF16Zmb\000" |
| 52167 | /* 45861 */ "VRSQRTBF16Zmb\000" |
| 52168 | /* 45875 */ "VSQRTBF16Zmb\000" |
| 52169 | /* 45888 */ "VFMADDSUB231PDZmb\000" |
| 52170 | /* 45906 */ "VFMSUB231PDZmb\000" |
| 52171 | /* 45921 */ "VFNMSUB231PDZmb\000" |
| 52172 | /* 45937 */ "VFMSUBADD231PDZmb\000" |
| 52173 | /* 45955 */ "VFMADD231PDZmb\000" |
| 52174 | /* 45970 */ "VFNMADD231PDZmb\000" |
| 52175 | /* 45986 */ "VFMADDSUB132PDZmb\000" |
| 52176 | /* 46004 */ "VFMSUB132PDZmb\000" |
| 52177 | /* 46019 */ "VFNMSUB132PDZmb\000" |
| 52178 | /* 46035 */ "VFMSUBADD132PDZmb\000" |
| 52179 | /* 46053 */ "VFMADD132PDZmb\000" |
| 52180 | /* 46068 */ "VFNMADD132PDZmb\000" |
| 52181 | /* 46084 */ "VEXP2PDZmb\000" |
| 52182 | /* 46095 */ "VFMADDSUB213PDZmb\000" |
| 52183 | /* 46113 */ "VFMSUB213PDZmb\000" |
| 52184 | /* 46128 */ "VFNMSUB213PDZmb\000" |
| 52185 | /* 46144 */ "VFMSUBADD213PDZmb\000" |
| 52186 | /* 46162 */ "VFMADD213PDZmb\000" |
| 52187 | /* 46177 */ "VFNMADD213PDZmb\000" |
| 52188 | /* 46193 */ "VRCP14PDZmb\000" |
| 52189 | /* 46205 */ "VRSQRT14PDZmb\000" |
| 52190 | /* 46219 */ "VRCP28PDZmb\000" |
| 52191 | /* 46231 */ "VRSQRT28PDZmb\000" |
| 52192 | /* 46245 */ "VGETEXPPDZmb\000" |
| 52193 | /* 46258 */ "VSQRTPDZmb\000" |
| 52194 | /* 46269 */ "VPDPBSSDZmb\000" |
| 52195 | /* 46281 */ "VPDPWSSDZmb\000" |
| 52196 | /* 46293 */ "VPDPBUSDZmb\000" |
| 52197 | /* 46305 */ "VPDPWUSDZmb\000" |
| 52198 | /* 46317 */ "VPDPBSUDZmb\000" |
| 52199 | /* 46329 */ "VPDPWSUDZmb\000" |
| 52200 | /* 46341 */ "VPDPBUUDZmb\000" |
| 52201 | /* 46353 */ "VPDPWUUDZmb\000" |
| 52202 | /* 46365 */ "VPSHLDVDZmb\000" |
| 52203 | /* 46377 */ "VPSHRDVDZmb\000" |
| 52204 | /* 46389 */ "VFMADDSUB231PHZmb\000" |
| 52205 | /* 46407 */ "VFMSUB231PHZmb\000" |
| 52206 | /* 46422 */ "VFNMSUB231PHZmb\000" |
| 52207 | /* 46438 */ "VFMSUBADD231PHZmb\000" |
| 52208 | /* 46456 */ "VFMADD231PHZmb\000" |
| 52209 | /* 46471 */ "VFNMADD231PHZmb\000" |
| 52210 | /* 46487 */ "VFMADDSUB132PHZmb\000" |
| 52211 | /* 46505 */ "VFMSUB132PHZmb\000" |
| 52212 | /* 46520 */ "VFNMSUB132PHZmb\000" |
| 52213 | /* 46536 */ "VFMSUBADD132PHZmb\000" |
| 52214 | /* 46554 */ "VFMADD132PHZmb\000" |
| 52215 | /* 46569 */ "VFNMADD132PHZmb\000" |
| 52216 | /* 46585 */ "VFMADDSUB213PHZmb\000" |
| 52217 | /* 46603 */ "VFMSUB213PHZmb\000" |
| 52218 | /* 46618 */ "VFNMSUB213PHZmb\000" |
| 52219 | /* 46634 */ "VFMSUBADD213PHZmb\000" |
| 52220 | /* 46652 */ "VFMADD213PHZmb\000" |
| 52221 | /* 46667 */ "VFNMADD213PHZmb\000" |
| 52222 | /* 46683 */ "VFCMADDCPHZmb\000" |
| 52223 | /* 46697 */ "VFMADDCPHZmb\000" |
| 52224 | /* 46710 */ "VRCPPHZmb\000" |
| 52225 | /* 46720 */ "VGETEXPPHZmb\000" |
| 52226 | /* 46733 */ "VRSQRTPHZmb\000" |
| 52227 | /* 46745 */ "VSQRTPHZmb\000" |
| 52228 | /* 46756 */ "VPMADD52HUQZmb\000" |
| 52229 | /* 46771 */ "VPMADD52LUQZmb\000" |
| 52230 | /* 46786 */ "VPSHLDVQZmb\000" |
| 52231 | /* 46798 */ "VPSHRDVQZmb\000" |
| 52232 | /* 46810 */ "VPDPBSSDSZmb\000" |
| 52233 | /* 46823 */ "VPDPWSSDSZmb\000" |
| 52234 | /* 46836 */ "VPDPBUSDSZmb\000" |
| 52235 | /* 46849 */ "VPDPWUSDSZmb\000" |
| 52236 | /* 46862 */ "VPDPBSUDSZmb\000" |
| 52237 | /* 46875 */ "VPDPWSUDSZmb\000" |
| 52238 | /* 46888 */ "VPDPBUUDSZmb\000" |
| 52239 | /* 46901 */ "VPDPWUUDSZmb\000" |
| 52240 | /* 46914 */ "VFMADDSUB231PSZmb\000" |
| 52241 | /* 46932 */ "VFMSUB231PSZmb\000" |
| 52242 | /* 46947 */ "VFNMSUB231PSZmb\000" |
| 52243 | /* 46963 */ "VFMSUBADD231PSZmb\000" |
| 52244 | /* 46981 */ "VFMADD231PSZmb\000" |
| 52245 | /* 46996 */ "VFNMADD231PSZmb\000" |
| 52246 | /* 47012 */ "VFMADDSUB132PSZmb\000" |
| 52247 | /* 47030 */ "VFMSUB132PSZmb\000" |
| 52248 | /* 47045 */ "VFNMSUB132PSZmb\000" |
| 52249 | /* 47061 */ "VFMSUBADD132PSZmb\000" |
| 52250 | /* 47079 */ "VFMADD132PSZmb\000" |
| 52251 | /* 47094 */ "VFNMADD132PSZmb\000" |
| 52252 | /* 47110 */ "VEXP2PSZmb\000" |
| 52253 | /* 47121 */ "VFMADDSUB213PSZmb\000" |
| 52254 | /* 47139 */ "VFMSUB213PSZmb\000" |
| 52255 | /* 47154 */ "VFNMSUB213PSZmb\000" |
| 52256 | /* 47170 */ "VFMSUBADD213PSZmb\000" |
| 52257 | /* 47188 */ "VFMADD213PSZmb\000" |
| 52258 | /* 47203 */ "VFNMADD213PSZmb\000" |
| 52259 | /* 47219 */ "VRCP14PSZmb\000" |
| 52260 | /* 47231 */ "VRSQRT14PSZmb\000" |
| 52261 | /* 47245 */ "VDPBF16PSZmb\000" |
| 52262 | /* 47258 */ "VRCP28PSZmb\000" |
| 52263 | /* 47270 */ "VRSQRT28PSZmb\000" |
| 52264 | /* 47284 */ "VDPPHPSZmb\000" |
| 52265 | /* 47295 */ "VGETEXPPSZmb\000" |
| 52266 | /* 47308 */ "VSQRTPSZmb\000" |
| 52267 | /* 47319 */ "VCVTNE2PS2BF16Z256rmb\000" |
| 52268 | /* 47341 */ "VCVTNEPS2BF16Z256rmb\000" |
| 52269 | /* 47362 */ "VSUBBF16Z256rmb\000" |
| 52270 | /* 47378 */ "VADDBF16Z256rmb\000" |
| 52271 | /* 47394 */ "VSCALEFBF16Z256rmb\000" |
| 52272 | /* 47413 */ "VMULBF16Z256rmb\000" |
| 52273 | /* 47429 */ "VMINBF16Z256rmb\000" |
| 52274 | /* 47445 */ "VDIVBF16Z256rmb\000" |
| 52275 | /* 47461 */ "VMAXBF16Z256rmb\000" |
| 52276 | /* 47477 */ "VCVT2PH2BF8Z256rmb\000" |
| 52277 | /* 47496 */ "VCVTBIASPH2BF8Z256rmb\000" |
| 52278 | /* 47518 */ "VCVTPH2BF8Z256rmb\000" |
| 52279 | /* 47536 */ "VCVT2PH2HF8Z256rmb\000" |
| 52280 | /* 47555 */ "VCVTBIASPH2HF8Z256rmb\000" |
| 52281 | /* 47577 */ "VCVTPH2HF8Z256rmb\000" |
| 52282 | /* 47595 */ "VPMULTISHIFTQBZ256rmb\000" |
| 52283 | /* 47617 */ "VPERMI2DZ256rmb\000" |
| 52284 | /* 47633 */ "VPERMT2DZ256rmb\000" |
| 52285 | /* 47649 */ "VPSUBDZ256rmb\000" |
| 52286 | /* 47663 */ "VPADDDZ256rmb\000" |
| 52287 | /* 47677 */ "VPANDDZ256rmb\000" |
| 52288 | /* 47691 */ "VPMULLDZ256rmb\000" |
| 52289 | /* 47706 */ "VPBLENDMDZ256rmb\000" |
| 52290 | /* 47723 */ "VPTESTNMDZ256rmb\000" |
| 52291 | /* 47740 */ "VPERMDZ256rmb\000" |
| 52292 | /* 47754 */ "VPTESTMDZ256rmb\000" |
| 52293 | /* 47770 */ "VPANDNDZ256rmb\000" |
| 52294 | /* 47785 */ "VCVTPH2PDZ256rmb\000" |
| 52295 | /* 47802 */ "VPERMI2PDZ256rmb\000" |
| 52296 | /* 47819 */ "VCVTDQ2PDZ256rmb\000" |
| 52297 | /* 47836 */ "VCVTUDQ2PDZ256rmb\000" |
| 52298 | /* 47854 */ "VCVTQQ2PDZ256rmb\000" |
| 52299 | /* 47871 */ "VCVTUQQ2PDZ256rmb\000" |
| 52300 | /* 47889 */ "VCVTPS2PDZ256rmb\000" |
| 52301 | /* 47906 */ "VPERMT2PDZ256rmb\000" |
| 52302 | /* 47923 */ "VSUBPDZ256rmb\000" |
| 52303 | /* 47937 */ "VMINCPDZ256rmb\000" |
| 52304 | /* 47952 */ "VMAXCPDZ256rmb\000" |
| 52305 | /* 47967 */ "VADDPDZ256rmb\000" |
| 52306 | /* 47981 */ "VANDPDZ256rmb\000" |
| 52307 | /* 47995 */ "VSCALEFPDZ256rmb\000" |
| 52308 | /* 48012 */ "VUNPCKHPDZ256rmb\000" |
| 52309 | /* 48029 */ "VPERMILPDZ256rmb\000" |
| 52310 | /* 48046 */ "VUNPCKLPDZ256rmb\000" |
| 52311 | /* 48063 */ "VMULPDZ256rmb\000" |
| 52312 | /* 48077 */ "VBLENDMPDZ256rmb\000" |
| 52313 | /* 48094 */ "VPERMPDZ256rmb\000" |
| 52314 | /* 48109 */ "VANDNPDZ256rmb\000" |
| 52315 | /* 48124 */ "VMINPDZ256rmb\000" |
| 52316 | /* 48138 */ "VORPDZ256rmb\000" |
| 52317 | /* 48151 */ "VXORPDZ256rmb\000" |
| 52318 | /* 48165 */ "VDIVPDZ256rmb\000" |
| 52319 | /* 48179 */ "VMAXPDZ256rmb\000" |
| 52320 | /* 48193 */ "VPCMPEQDZ256rmb\000" |
| 52321 | /* 48209 */ "VPORDZ256rmb\000" |
| 52322 | /* 48222 */ "VPXORDZ256rmb\000" |
| 52323 | /* 48236 */ "VPABSDZ256rmb\000" |
| 52324 | /* 48250 */ "VPMINSDZ256rmb\000" |
| 52325 | /* 48265 */ "VPMAXSDZ256rmb\000" |
| 52326 | /* 48280 */ "VP2INTERSECTDZ256rmb\000" |
| 52327 | /* 48301 */ "VPCONFLICTDZ256rmb\000" |
| 52328 | /* 48320 */ "VPCMPGTDZ256rmb\000" |
| 52329 | /* 48336 */ "VPOPCNTDZ256rmb\000" |
| 52330 | /* 48352 */ "VPLZCNTDZ256rmb\000" |
| 52331 | /* 48368 */ "VPMINUDZ256rmb\000" |
| 52332 | /* 48383 */ "VPMAXUDZ256rmb\000" |
| 52333 | /* 48398 */ "VPSRAVDZ256rmb\000" |
| 52334 | /* 48413 */ "VPSLLVDZ256rmb\000" |
| 52335 | /* 48428 */ "VPROLVDZ256rmb\000" |
| 52336 | /* 48443 */ "VPSRLVDZ256rmb\000" |
| 52337 | /* 48458 */ "VPRORVDZ256rmb\000" |
| 52338 | /* 48473 */ "VCVTPD2PHZ256rmb\000" |
| 52339 | /* 48490 */ "VCVTDQ2PHZ256rmb\000" |
| 52340 | /* 48507 */ "VCVTUDQ2PHZ256rmb\000" |
| 52341 | /* 48525 */ "VCVTQQ2PHZ256rmb\000" |
| 52342 | /* 48542 */ "VCVTUQQ2PHZ256rmb\000" |
| 52343 | /* 48560 */ "VCVTW2PHZ256rmb\000" |
| 52344 | /* 48576 */ "VCVTUW2PHZ256rmb\000" |
| 52345 | /* 48593 */ "VSUBPHZ256rmb\000" |
| 52346 | /* 48607 */ "VFCMULCPHZ256rmb\000" |
| 52347 | /* 48624 */ "VFMULCPHZ256rmb\000" |
| 52348 | /* 48640 */ "VMINCPHZ256rmb\000" |
| 52349 | /* 48655 */ "VMAXCPHZ256rmb\000" |
| 52350 | /* 48670 */ "VADDPHZ256rmb\000" |
| 52351 | /* 48684 */ "VSCALEFPHZ256rmb\000" |
| 52352 | /* 48701 */ "VMULPHZ256rmb\000" |
| 52353 | /* 48715 */ "VMINPHZ256rmb\000" |
| 52354 | /* 48729 */ "VDIVPHZ256rmb\000" |
| 52355 | /* 48743 */ "VMAXPHZ256rmb\000" |
| 52356 | /* 48757 */ "VPERMI2QZ256rmb\000" |
| 52357 | /* 48773 */ "VPERMT2QZ256rmb\000" |
| 52358 | /* 48789 */ "VPSUBQZ256rmb\000" |
| 52359 | /* 48803 */ "VCVTTPD2DQZ256rmb\000" |
| 52360 | /* 48821 */ "VCVTPD2DQZ256rmb\000" |
| 52361 | /* 48838 */ "VCVTTPH2DQZ256rmb\000" |
| 52362 | /* 48856 */ "VCVTPH2DQZ256rmb\000" |
| 52363 | /* 48873 */ "VCVTTPS2DQZ256rmb\000" |
| 52364 | /* 48891 */ "VCVTPS2DQZ256rmb\000" |
| 52365 | /* 48908 */ "VPADDQZ256rmb\000" |
| 52366 | /* 48922 */ "VPUNPCKHDQZ256rmb\000" |
| 52367 | /* 48940 */ "VPUNPCKLDQZ256rmb\000" |
| 52368 | /* 48958 */ "VPMULDQZ256rmb\000" |
| 52369 | /* 48973 */ "VPANDQZ256rmb\000" |
| 52370 | /* 48987 */ "VPUNPCKHQDQZ256rmb\000" |
| 52371 | /* 49006 */ "VPUNPCKLQDQZ256rmb\000" |
| 52372 | /* 49025 */ "VCVTTPD2UDQZ256rmb\000" |
| 52373 | /* 49044 */ "VCVTPD2UDQZ256rmb\000" |
| 52374 | /* 49062 */ "VCVTTPH2UDQZ256rmb\000" |
| 52375 | /* 49081 */ "VCVTPH2UDQZ256rmb\000" |
| 52376 | /* 49099 */ "VCVTTPS2UDQZ256rmb\000" |
| 52377 | /* 49118 */ "VCVTPS2UDQZ256rmb\000" |
| 52378 | /* 49136 */ "VPMULUDQZ256rmb\000" |
| 52379 | /* 49152 */ "VPMULLQZ256rmb\000" |
| 52380 | /* 49167 */ "VPBLENDMQZ256rmb\000" |
| 52381 | /* 49184 */ "VPTESTNMQZ256rmb\000" |
| 52382 | /* 49201 */ "VPERMQZ256rmb\000" |
| 52383 | /* 49215 */ "VPTESTMQZ256rmb\000" |
| 52384 | /* 49231 */ "VPANDNQZ256rmb\000" |
| 52385 | /* 49246 */ "VCVTTPD2QQZ256rmb\000" |
| 52386 | /* 49264 */ "VCVTPD2QQZ256rmb\000" |
| 52387 | /* 49281 */ "VCVTTPH2QQZ256rmb\000" |
| 52388 | /* 49299 */ "VCVTPH2QQZ256rmb\000" |
| 52389 | /* 49316 */ "VCVTTPS2QQZ256rmb\000" |
| 52390 | /* 49334 */ "VCVTPS2QQZ256rmb\000" |
| 52391 | /* 49351 */ "VPCMPEQQZ256rmb\000" |
| 52392 | /* 49367 */ "VCVTTPD2UQQZ256rmb\000" |
| 52393 | /* 49386 */ "VCVTPD2UQQZ256rmb\000" |
| 52394 | /* 49404 */ "VCVTTPH2UQQZ256rmb\000" |
| 52395 | /* 49423 */ "VCVTPH2UQQZ256rmb\000" |
| 52396 | /* 49441 */ "VCVTTPS2UQQZ256rmb\000" |
| 52397 | /* 49460 */ "VCVTPS2UQQZ256rmb\000" |
| 52398 | /* 49478 */ "VPORQZ256rmb\000" |
| 52399 | /* 49491 */ "VPXORQZ256rmb\000" |
| 52400 | /* 49505 */ "VPABSQZ256rmb\000" |
| 52401 | /* 49519 */ "VPMINSQZ256rmb\000" |
| 52402 | /* 49534 */ "VPMAXSQZ256rmb\000" |
| 52403 | /* 49549 */ "VP2INTERSECTQZ256rmb\000" |
| 52404 | /* 49570 */ "VPCONFLICTQZ256rmb\000" |
| 52405 | /* 49589 */ "VPCMPGTQZ256rmb\000" |
| 52406 | /* 49605 */ "VPOPCNTQZ256rmb\000" |
| 52407 | /* 49621 */ "VPLZCNTQZ256rmb\000" |
| 52408 | /* 49637 */ "VPMINUQZ256rmb\000" |
| 52409 | /* 49652 */ "VPMAXUQZ256rmb\000" |
| 52410 | /* 49667 */ "VPSRAVQZ256rmb\000" |
| 52411 | /* 49682 */ "VPSLLVQZ256rmb\000" |
| 52412 | /* 49697 */ "VPROLVQZ256rmb\000" |
| 52413 | /* 49712 */ "VPSRLVQZ256rmb\000" |
| 52414 | /* 49727 */ "VPRORVQZ256rmb\000" |
| 52415 | /* 49742 */ "VCVT2PH2BF8SZ256rmb\000" |
| 52416 | /* 49762 */ "VCVTBIASPH2BF8SZ256rmb\000" |
| 52417 | /* 49785 */ "VCVTPH2BF8SZ256rmb\000" |
| 52418 | /* 49804 */ "VCVT2PH2HF8SZ256rmb\000" |
| 52419 | /* 49824 */ "VCVTBIASPH2HF8SZ256rmb\000" |
| 52420 | /* 49847 */ "VCVTPH2HF8SZ256rmb\000" |
| 52421 | /* 49866 */ "VCVTTBF162IBSZ256rmb\000" |
| 52422 | /* 49887 */ "VCVTBF162IBSZ256rmb\000" |
| 52423 | /* 49907 */ "VCVTTPH2IBSZ256rmb\000" |
| 52424 | /* 49926 */ "VCVTPH2IBSZ256rmb\000" |
| 52425 | /* 49944 */ "VCVTTPS2IBSZ256rmb\000" |
| 52426 | /* 49963 */ "VCVTPS2IBSZ256rmb\000" |
| 52427 | /* 49981 */ "VCVTTBF162IUBSZ256rmb\000" |
| 52428 | /* 50003 */ "VCVTBF162IUBSZ256rmb\000" |
| 52429 | /* 50024 */ "VCVTTPH2IUBSZ256rmb\000" |
| 52430 | /* 50044 */ "VCVTPH2IUBSZ256rmb\000" |
| 52431 | /* 50063 */ "VCVTTPS2IUBSZ256rmb\000" |
| 52432 | /* 50083 */ "VCVTPS2IUBSZ256rmb\000" |
| 52433 | /* 50102 */ "VCVTPD2PSZ256rmb\000" |
| 52434 | /* 50119 */ "VPERMI2PSZ256rmb\000" |
| 52435 | /* 50136 */ "VCVTDQ2PSZ256rmb\000" |
| 52436 | /* 50153 */ "VCVTUDQ2PSZ256rmb\000" |
| 52437 | /* 50171 */ "VCVTQQ2PSZ256rmb\000" |
| 52438 | /* 50188 */ "VCVTUQQ2PSZ256rmb\000" |
| 52439 | /* 50206 */ "VPERMT2PSZ256rmb\000" |
| 52440 | /* 50223 */ "VSUBPSZ256rmb\000" |
| 52441 | /* 50237 */ "VMINCPSZ256rmb\000" |
| 52442 | /* 50252 */ "VMAXCPSZ256rmb\000" |
| 52443 | /* 50267 */ "VADDPSZ256rmb\000" |
| 52444 | /* 50281 */ "VANDPSZ256rmb\000" |
| 52445 | /* 50295 */ "VSCALEFPSZ256rmb\000" |
| 52446 | /* 50312 */ "VUNPCKHPSZ256rmb\000" |
| 52447 | /* 50329 */ "VPERMILPSZ256rmb\000" |
| 52448 | /* 50346 */ "VUNPCKLPSZ256rmb\000" |
| 52449 | /* 50363 */ "VMULPSZ256rmb\000" |
| 52450 | /* 50377 */ "VBLENDMPSZ256rmb\000" |
| 52451 | /* 50394 */ "VPERMPSZ256rmb\000" |
| 52452 | /* 50409 */ "VANDNPSZ256rmb\000" |
| 52453 | /* 50424 */ "VMINPSZ256rmb\000" |
| 52454 | /* 50438 */ "VORPSZ256rmb\000" |
| 52455 | /* 50451 */ "VXORPSZ256rmb\000" |
| 52456 | /* 50465 */ "VDIVPSZ256rmb\000" |
| 52457 | /* 50479 */ "VMAXPSZ256rmb\000" |
| 52458 | /* 50493 */ "VCVTTPD2DQSZ256rmb\000" |
| 52459 | /* 50512 */ "VCVTTPS2DQSZ256rmb\000" |
| 52460 | /* 50531 */ "VCVTTPD2UDQSZ256rmb\000" |
| 52461 | /* 50551 */ "VCVTTPS2UDQSZ256rmb\000" |
| 52462 | /* 50571 */ "VCVTTPD2QQSZ256rmb\000" |
| 52463 | /* 50590 */ "VCVTTPS2QQSZ256rmb\000" |
| 52464 | /* 50609 */ "VCVTTPD2UQQSZ256rmb\000" |
| 52465 | /* 50629 */ "VCVTTPS2UQQSZ256rmb\000" |
| 52466 | /* 50649 */ "VCVTTPH2WZ256rmb\000" |
| 52467 | /* 50666 */ "VCVTPH2WZ256rmb\000" |
| 52468 | /* 50682 */ "VPACKSSDWZ256rmb\000" |
| 52469 | /* 50699 */ "VPACKUSDWZ256rmb\000" |
| 52470 | /* 50716 */ "VCVTTPH2UWZ256rmb\000" |
| 52471 | /* 50734 */ "VCVTPH2UWZ256rmb\000" |
| 52472 | /* 50751 */ "VCVT2PS2PHXZ256rmb\000" |
| 52473 | /* 50770 */ "VCVTPS2PHXZ256rmb\000" |
| 52474 | /* 50788 */ "VCVTPH2PSXZ256rmb\000" |
| 52475 | /* 50806 */ "VCVTNE2PS2BF16Z128rmb\000" |
| 52476 | /* 50828 */ "VCVTNEPS2BF16Z128rmb\000" |
| 52477 | /* 50849 */ "VSUBBF16Z128rmb\000" |
| 52478 | /* 50865 */ "VADDBF16Z128rmb\000" |
| 52479 | /* 50881 */ "VSCALEFBF16Z128rmb\000" |
| 52480 | /* 50900 */ "VMULBF16Z128rmb\000" |
| 52481 | /* 50916 */ "VMINBF16Z128rmb\000" |
| 52482 | /* 50932 */ "VDIVBF16Z128rmb\000" |
| 52483 | /* 50948 */ "VMAXBF16Z128rmb\000" |
| 52484 | /* 50964 */ "VCVT2PH2BF8Z128rmb\000" |
| 52485 | /* 50983 */ "VCVTBIASPH2BF8Z128rmb\000" |
| 52486 | /* 51005 */ "VCVTPH2BF8Z128rmb\000" |
| 52487 | /* 51023 */ "VCVT2PH2HF8Z128rmb\000" |
| 52488 | /* 51042 */ "VCVTBIASPH2HF8Z128rmb\000" |
| 52489 | /* 51064 */ "VCVTPH2HF8Z128rmb\000" |
| 52490 | /* 51082 */ "VPMULTISHIFTQBZ128rmb\000" |
| 52491 | /* 51104 */ "VPERMI2DZ128rmb\000" |
| 52492 | /* 51120 */ "VPERMT2DZ128rmb\000" |
| 52493 | /* 51136 */ "VPSUBDZ128rmb\000" |
| 52494 | /* 51150 */ "VPADDDZ128rmb\000" |
| 52495 | /* 51164 */ "VPANDDZ128rmb\000" |
| 52496 | /* 51178 */ "VPMULLDZ128rmb\000" |
| 52497 | /* 51193 */ "VPBLENDMDZ128rmb\000" |
| 52498 | /* 51210 */ "VPTESTNMDZ128rmb\000" |
| 52499 | /* 51227 */ "VPTESTMDZ128rmb\000" |
| 52500 | /* 51243 */ "VPANDNDZ128rmb\000" |
| 52501 | /* 51258 */ "VCVTPH2PDZ128rmb\000" |
| 52502 | /* 51275 */ "VPERMI2PDZ128rmb\000" |
| 52503 | /* 51292 */ "VCVTDQ2PDZ128rmb\000" |
| 52504 | /* 51309 */ "VCVTUDQ2PDZ128rmb\000" |
| 52505 | /* 51327 */ "VCVTQQ2PDZ128rmb\000" |
| 52506 | /* 51344 */ "VCVTUQQ2PDZ128rmb\000" |
| 52507 | /* 51362 */ "VCVTPS2PDZ128rmb\000" |
| 52508 | /* 51379 */ "VPERMT2PDZ128rmb\000" |
| 52509 | /* 51396 */ "VSUBPDZ128rmb\000" |
| 52510 | /* 51410 */ "VMINCPDZ128rmb\000" |
| 52511 | /* 51425 */ "VMAXCPDZ128rmb\000" |
| 52512 | /* 51440 */ "VADDPDZ128rmb\000" |
| 52513 | /* 51454 */ "VANDPDZ128rmb\000" |
| 52514 | /* 51468 */ "VSCALEFPDZ128rmb\000" |
| 52515 | /* 51485 */ "VUNPCKHPDZ128rmb\000" |
| 52516 | /* 51502 */ "VPERMILPDZ128rmb\000" |
| 52517 | /* 51519 */ "VUNPCKLPDZ128rmb\000" |
| 52518 | /* 51536 */ "VMULPDZ128rmb\000" |
| 52519 | /* 51550 */ "VBLENDMPDZ128rmb\000" |
| 52520 | /* 51567 */ "VANDNPDZ128rmb\000" |
| 52521 | /* 51582 */ "VMINPDZ128rmb\000" |
| 52522 | /* 51596 */ "VORPDZ128rmb\000" |
| 52523 | /* 51609 */ "VXORPDZ128rmb\000" |
| 52524 | /* 51623 */ "VDIVPDZ128rmb\000" |
| 52525 | /* 51637 */ "VMAXPDZ128rmb\000" |
| 52526 | /* 51651 */ "VPCMPEQDZ128rmb\000" |
| 52527 | /* 51667 */ "VPORDZ128rmb\000" |
| 52528 | /* 51680 */ "VPXORDZ128rmb\000" |
| 52529 | /* 51694 */ "VPABSDZ128rmb\000" |
| 52530 | /* 51708 */ "VPMINSDZ128rmb\000" |
| 52531 | /* 51723 */ "VPMAXSDZ128rmb\000" |
| 52532 | /* 51738 */ "VP2INTERSECTDZ128rmb\000" |
| 52533 | /* 51759 */ "VPCONFLICTDZ128rmb\000" |
| 52534 | /* 51778 */ "VPCMPGTDZ128rmb\000" |
| 52535 | /* 51794 */ "VPOPCNTDZ128rmb\000" |
| 52536 | /* 51810 */ "VPLZCNTDZ128rmb\000" |
| 52537 | /* 51826 */ "VPMINUDZ128rmb\000" |
| 52538 | /* 51841 */ "VPMAXUDZ128rmb\000" |
| 52539 | /* 51856 */ "VPSRAVDZ128rmb\000" |
| 52540 | /* 51871 */ "VPSLLVDZ128rmb\000" |
| 52541 | /* 51886 */ "VPROLVDZ128rmb\000" |
| 52542 | /* 51901 */ "VPSRLVDZ128rmb\000" |
| 52543 | /* 51916 */ "VPRORVDZ128rmb\000" |
| 52544 | /* 51931 */ "VCVTPD2PHZ128rmb\000" |
| 52545 | /* 51948 */ "VCVTDQ2PHZ128rmb\000" |
| 52546 | /* 51965 */ "VCVTUDQ2PHZ128rmb\000" |
| 52547 | /* 51983 */ "VCVTQQ2PHZ128rmb\000" |
| 52548 | /* 52000 */ "VCVTUQQ2PHZ128rmb\000" |
| 52549 | /* 52018 */ "VCVTW2PHZ128rmb\000" |
| 52550 | /* 52034 */ "VCVTUW2PHZ128rmb\000" |
| 52551 | /* 52051 */ "VSUBPHZ128rmb\000" |
| 52552 | /* 52065 */ "VFCMULCPHZ128rmb\000" |
| 52553 | /* 52082 */ "VFMULCPHZ128rmb\000" |
| 52554 | /* 52098 */ "VMINCPHZ128rmb\000" |
| 52555 | /* 52113 */ "VMAXCPHZ128rmb\000" |
| 52556 | /* 52128 */ "VADDPHZ128rmb\000" |
| 52557 | /* 52142 */ "VSCALEFPHZ128rmb\000" |
| 52558 | /* 52159 */ "VMULPHZ128rmb\000" |
| 52559 | /* 52173 */ "VMINPHZ128rmb\000" |
| 52560 | /* 52187 */ "VDIVPHZ128rmb\000" |
| 52561 | /* 52201 */ "VMAXPHZ128rmb\000" |
| 52562 | /* 52215 */ "VPERMI2QZ128rmb\000" |
| 52563 | /* 52231 */ "VPERMT2QZ128rmb\000" |
| 52564 | /* 52247 */ "VPSUBQZ128rmb\000" |
| 52565 | /* 52261 */ "VCVTTPD2DQZ128rmb\000" |
| 52566 | /* 52279 */ "VCVTPD2DQZ128rmb\000" |
| 52567 | /* 52296 */ "VCVTTPH2DQZ128rmb\000" |
| 52568 | /* 52314 */ "VCVTPH2DQZ128rmb\000" |
| 52569 | /* 52331 */ "VCVTTPS2DQZ128rmb\000" |
| 52570 | /* 52349 */ "VCVTPS2DQZ128rmb\000" |
| 52571 | /* 52366 */ "VPADDQZ128rmb\000" |
| 52572 | /* 52380 */ "VPUNPCKHDQZ128rmb\000" |
| 52573 | /* 52398 */ "VPUNPCKLDQZ128rmb\000" |
| 52574 | /* 52416 */ "VPMULDQZ128rmb\000" |
| 52575 | /* 52431 */ "VPANDQZ128rmb\000" |
| 52576 | /* 52445 */ "VPUNPCKHQDQZ128rmb\000" |
| 52577 | /* 52464 */ "VPUNPCKLQDQZ128rmb\000" |
| 52578 | /* 52483 */ "VCVTTPD2UDQZ128rmb\000" |
| 52579 | /* 52502 */ "VCVTPD2UDQZ128rmb\000" |
| 52580 | /* 52520 */ "VCVTTPH2UDQZ128rmb\000" |
| 52581 | /* 52539 */ "VCVTPH2UDQZ128rmb\000" |
| 52582 | /* 52557 */ "VCVTTPS2UDQZ128rmb\000" |
| 52583 | /* 52576 */ "VCVTPS2UDQZ128rmb\000" |
| 52584 | /* 52594 */ "VPMULUDQZ128rmb\000" |
| 52585 | /* 52610 */ "VPMULLQZ128rmb\000" |
| 52586 | /* 52625 */ "VPBLENDMQZ128rmb\000" |
| 52587 | /* 52642 */ "VPTESTNMQZ128rmb\000" |
| 52588 | /* 52659 */ "VPTESTMQZ128rmb\000" |
| 52589 | /* 52675 */ "VPANDNQZ128rmb\000" |
| 52590 | /* 52690 */ "VCVTTPD2QQZ128rmb\000" |
| 52591 | /* 52708 */ "VCVTPD2QQZ128rmb\000" |
| 52592 | /* 52725 */ "VCVTTPH2QQZ128rmb\000" |
| 52593 | /* 52743 */ "VCVTPH2QQZ128rmb\000" |
| 52594 | /* 52760 */ "VCVTTPS2QQZ128rmb\000" |
| 52595 | /* 52778 */ "VCVTPS2QQZ128rmb\000" |
| 52596 | /* 52795 */ "VPCMPEQQZ128rmb\000" |
| 52597 | /* 52811 */ "VCVTTPD2UQQZ128rmb\000" |
| 52598 | /* 52830 */ "VCVTPD2UQQZ128rmb\000" |
| 52599 | /* 52848 */ "VCVTTPH2UQQZ128rmb\000" |
| 52600 | /* 52867 */ "VCVTPH2UQQZ128rmb\000" |
| 52601 | /* 52885 */ "VCVTTPS2UQQZ128rmb\000" |
| 52602 | /* 52904 */ "VCVTPS2UQQZ128rmb\000" |
| 52603 | /* 52922 */ "VPORQZ128rmb\000" |
| 52604 | /* 52935 */ "VPXORQZ128rmb\000" |
| 52605 | /* 52949 */ "VPABSQZ128rmb\000" |
| 52606 | /* 52963 */ "VPMINSQZ128rmb\000" |
| 52607 | /* 52978 */ "VPMAXSQZ128rmb\000" |
| 52608 | /* 52993 */ "VP2INTERSECTQZ128rmb\000" |
| 52609 | /* 53014 */ "VPCONFLICTQZ128rmb\000" |
| 52610 | /* 53033 */ "VPCMPGTQZ128rmb\000" |
| 52611 | /* 53049 */ "VPOPCNTQZ128rmb\000" |
| 52612 | /* 53065 */ "VPLZCNTQZ128rmb\000" |
| 52613 | /* 53081 */ "VPMINUQZ128rmb\000" |
| 52614 | /* 53096 */ "VPMAXUQZ128rmb\000" |
| 52615 | /* 53111 */ "VPSRAVQZ128rmb\000" |
| 52616 | /* 53126 */ "VPSLLVQZ128rmb\000" |
| 52617 | /* 53141 */ "VPROLVQZ128rmb\000" |
| 52618 | /* 53156 */ "VPSRLVQZ128rmb\000" |
| 52619 | /* 53171 */ "VPRORVQZ128rmb\000" |
| 52620 | /* 53186 */ "VCVT2PH2BF8SZ128rmb\000" |
| 52621 | /* 53206 */ "VCVTBIASPH2BF8SZ128rmb\000" |
| 52622 | /* 53229 */ "VCVTPH2BF8SZ128rmb\000" |
| 52623 | /* 53248 */ "VCVT2PH2HF8SZ128rmb\000" |
| 52624 | /* 53268 */ "VCVTBIASPH2HF8SZ128rmb\000" |
| 52625 | /* 53291 */ "VCVTPH2HF8SZ128rmb\000" |
| 52626 | /* 53310 */ "VCVTTBF162IBSZ128rmb\000" |
| 52627 | /* 53331 */ "VCVTBF162IBSZ128rmb\000" |
| 52628 | /* 53351 */ "VCVTTPH2IBSZ128rmb\000" |
| 52629 | /* 53370 */ "VCVTPH2IBSZ128rmb\000" |
| 52630 | /* 53388 */ "VCVTTPS2IBSZ128rmb\000" |
| 52631 | /* 53407 */ "VCVTPS2IBSZ128rmb\000" |
| 52632 | /* 53425 */ "VCVTTBF162IUBSZ128rmb\000" |
| 52633 | /* 53447 */ "VCVTBF162IUBSZ128rmb\000" |
| 52634 | /* 53468 */ "VCVTTPH2IUBSZ128rmb\000" |
| 52635 | /* 53488 */ "VCVTPH2IUBSZ128rmb\000" |
| 52636 | /* 53507 */ "VCVTTPS2IUBSZ128rmb\000" |
| 52637 | /* 53527 */ "VCVTPS2IUBSZ128rmb\000" |
| 52638 | /* 53546 */ "VCVTPD2PSZ128rmb\000" |
| 52639 | /* 53563 */ "VPERMI2PSZ128rmb\000" |
| 52640 | /* 53580 */ "VCVTDQ2PSZ128rmb\000" |
| 52641 | /* 53597 */ "VCVTUDQ2PSZ128rmb\000" |
| 52642 | /* 53615 */ "VCVTQQ2PSZ128rmb\000" |
| 52643 | /* 53632 */ "VCVTUQQ2PSZ128rmb\000" |
| 52644 | /* 53650 */ "VPERMT2PSZ128rmb\000" |
| 52645 | /* 53667 */ "VSUBPSZ128rmb\000" |
| 52646 | /* 53681 */ "VMINCPSZ128rmb\000" |
| 52647 | /* 53696 */ "VMAXCPSZ128rmb\000" |
| 52648 | /* 53711 */ "VADDPSZ128rmb\000" |
| 52649 | /* 53725 */ "VANDPSZ128rmb\000" |
| 52650 | /* 53739 */ "VSCALEFPSZ128rmb\000" |
| 52651 | /* 53756 */ "VUNPCKHPSZ128rmb\000" |
| 52652 | /* 53773 */ "VPERMILPSZ128rmb\000" |
| 52653 | /* 53790 */ "VUNPCKLPSZ128rmb\000" |
| 52654 | /* 53807 */ "VMULPSZ128rmb\000" |
| 52655 | /* 53821 */ "VBLENDMPSZ128rmb\000" |
| 52656 | /* 53838 */ "VANDNPSZ128rmb\000" |
| 52657 | /* 53853 */ "VMINPSZ128rmb\000" |
| 52658 | /* 53867 */ "VORPSZ128rmb\000" |
| 52659 | /* 53880 */ "VXORPSZ128rmb\000" |
| 52660 | /* 53894 */ "VDIVPSZ128rmb\000" |
| 52661 | /* 53908 */ "VMAXPSZ128rmb\000" |
| 52662 | /* 53922 */ "VCVTTPD2DQSZ128rmb\000" |
| 52663 | /* 53941 */ "VCVTTPS2DQSZ128rmb\000" |
| 52664 | /* 53960 */ "VCVTTPD2UDQSZ128rmb\000" |
| 52665 | /* 53980 */ "VCVTTPS2UDQSZ128rmb\000" |
| 52666 | /* 54000 */ "VCVTTPD2QQSZ128rmb\000" |
| 52667 | /* 54019 */ "VCVTTPS2QQSZ128rmb\000" |
| 52668 | /* 54038 */ "VCVTTPD2UQQSZ128rmb\000" |
| 52669 | /* 54058 */ "VCVTTPS2UQQSZ128rmb\000" |
| 52670 | /* 54078 */ "VCVTTPH2WZ128rmb\000" |
| 52671 | /* 54095 */ "VCVTPH2WZ128rmb\000" |
| 52672 | /* 54111 */ "VPACKSSDWZ128rmb\000" |
| 52673 | /* 54128 */ "VPACKUSDWZ128rmb\000" |
| 52674 | /* 54145 */ "VCVTTPH2UWZ128rmb\000" |
| 52675 | /* 54163 */ "VCVTPH2UWZ128rmb\000" |
| 52676 | /* 54180 */ "VCVT2PS2PHXZ128rmb\000" |
| 52677 | /* 54199 */ "VCVTPS2PHXZ128rmb\000" |
| 52678 | /* 54217 */ "VCVTPH2PSXZ128rmb\000" |
| 52679 | /* 54235 */ "VCVTNE2PS2BF16Zrmb\000" |
| 52680 | /* 54254 */ "VCVTNEPS2BF16Zrmb\000" |
| 52681 | /* 54272 */ "VSUBBF16Zrmb\000" |
| 52682 | /* 54285 */ "VADDBF16Zrmb\000" |
| 52683 | /* 54298 */ "VSCALEFBF16Zrmb\000" |
| 52684 | /* 54314 */ "VMULBF16Zrmb\000" |
| 52685 | /* 54327 */ "VMINBF16Zrmb\000" |
| 52686 | /* 54340 */ "VDIVBF16Zrmb\000" |
| 52687 | /* 54353 */ "VMAXBF16Zrmb\000" |
| 52688 | /* 54366 */ "VCVT2PH2BF8Zrmb\000" |
| 52689 | /* 54382 */ "VCVTBIASPH2BF8Zrmb\000" |
| 52690 | /* 54401 */ "VCVTPH2BF8Zrmb\000" |
| 52691 | /* 54416 */ "VCVT2PH2HF8Zrmb\000" |
| 52692 | /* 54432 */ "VCVTBIASPH2HF8Zrmb\000" |
| 52693 | /* 54451 */ "VCVTPH2HF8Zrmb\000" |
| 52694 | /* 54466 */ "VPMULTISHIFTQBZrmb\000" |
| 52695 | /* 54485 */ "VPERMI2DZrmb\000" |
| 52696 | /* 54498 */ "VPERMT2DZrmb\000" |
| 52697 | /* 54511 */ "VPSUBDZrmb\000" |
| 52698 | /* 54522 */ "VPADDDZrmb\000" |
| 52699 | /* 54533 */ "VPANDDZrmb\000" |
| 52700 | /* 54544 */ "VPMULLDZrmb\000" |
| 52701 | /* 54556 */ "VPBLENDMDZrmb\000" |
| 52702 | /* 54570 */ "VPTESTNMDZrmb\000" |
| 52703 | /* 54584 */ "VPERMDZrmb\000" |
| 52704 | /* 54595 */ "VPTESTMDZrmb\000" |
| 52705 | /* 54608 */ "VPANDNDZrmb\000" |
| 52706 | /* 54620 */ "VCVTPH2PDZrmb\000" |
| 52707 | /* 54634 */ "VPERMI2PDZrmb\000" |
| 52708 | /* 54648 */ "VCVTDQ2PDZrmb\000" |
| 52709 | /* 54662 */ "VCVTUDQ2PDZrmb\000" |
| 52710 | /* 54677 */ "VCVTQQ2PDZrmb\000" |
| 52711 | /* 54691 */ "VCVTUQQ2PDZrmb\000" |
| 52712 | /* 54706 */ "VCVTPS2PDZrmb\000" |
| 52713 | /* 54720 */ "VPERMT2PDZrmb\000" |
| 52714 | /* 54734 */ "VSUBPDZrmb\000" |
| 52715 | /* 54745 */ "VMINCPDZrmb\000" |
| 52716 | /* 54757 */ "VMAXCPDZrmb\000" |
| 52717 | /* 54769 */ "VADDPDZrmb\000" |
| 52718 | /* 54780 */ "VANDPDZrmb\000" |
| 52719 | /* 54791 */ "VSCALEFPDZrmb\000" |
| 52720 | /* 54805 */ "VUNPCKHPDZrmb\000" |
| 52721 | /* 54819 */ "VPERMILPDZrmb\000" |
| 52722 | /* 54833 */ "VUNPCKLPDZrmb\000" |
| 52723 | /* 54847 */ "VMULPDZrmb\000" |
| 52724 | /* 54858 */ "VBLENDMPDZrmb\000" |
| 52725 | /* 54872 */ "VPERMPDZrmb\000" |
| 52726 | /* 54884 */ "VANDNPDZrmb\000" |
| 52727 | /* 54896 */ "VMINPDZrmb\000" |
| 52728 | /* 54907 */ "VORPDZrmb\000" |
| 52729 | /* 54917 */ "VXORPDZrmb\000" |
| 52730 | /* 54928 */ "VDIVPDZrmb\000" |
| 52731 | /* 54939 */ "VMAXPDZrmb\000" |
| 52732 | /* 54950 */ "VPCMPEQDZrmb\000" |
| 52733 | /* 54963 */ "VPORDZrmb\000" |
| 52734 | /* 54973 */ "VPXORDZrmb\000" |
| 52735 | /* 54984 */ "VPABSDZrmb\000" |
| 52736 | /* 54995 */ "VPMINSDZrmb\000" |
| 52737 | /* 55007 */ "VPMAXSDZrmb\000" |
| 52738 | /* 55019 */ "VP2INTERSECTDZrmb\000" |
| 52739 | /* 55037 */ "VPCONFLICTDZrmb\000" |
| 52740 | /* 55053 */ "VPCMPGTDZrmb\000" |
| 52741 | /* 55066 */ "VPOPCNTDZrmb\000" |
| 52742 | /* 55079 */ "VPLZCNTDZrmb\000" |
| 52743 | /* 55092 */ "VPMINUDZrmb\000" |
| 52744 | /* 55104 */ "VPMAXUDZrmb\000" |
| 52745 | /* 55116 */ "VPSRAVDZrmb\000" |
| 52746 | /* 55128 */ "VPSLLVDZrmb\000" |
| 52747 | /* 55140 */ "VPROLVDZrmb\000" |
| 52748 | /* 55152 */ "VPSRLVDZrmb\000" |
| 52749 | /* 55164 */ "VPRORVDZrmb\000" |
| 52750 | /* 55176 */ "VCVTPD2PHZrmb\000" |
| 52751 | /* 55190 */ "VCVTDQ2PHZrmb\000" |
| 52752 | /* 55204 */ "VCVTUDQ2PHZrmb\000" |
| 52753 | /* 55219 */ "VCVTQQ2PHZrmb\000" |
| 52754 | /* 55233 */ "VCVTUQQ2PHZrmb\000" |
| 52755 | /* 55248 */ "VCVTW2PHZrmb\000" |
| 52756 | /* 55261 */ "VCVTUW2PHZrmb\000" |
| 52757 | /* 55275 */ "VSUBPHZrmb\000" |
| 52758 | /* 55286 */ "VFCMULCPHZrmb\000" |
| 52759 | /* 55300 */ "VFMULCPHZrmb\000" |
| 52760 | /* 55313 */ "VMINCPHZrmb\000" |
| 52761 | /* 55325 */ "VMAXCPHZrmb\000" |
| 52762 | /* 55337 */ "VADDPHZrmb\000" |
| 52763 | /* 55348 */ "VSCALEFPHZrmb\000" |
| 52764 | /* 55362 */ "VMULPHZrmb\000" |
| 52765 | /* 55373 */ "VMINPHZrmb\000" |
| 52766 | /* 55384 */ "VDIVPHZrmb\000" |
| 52767 | /* 55395 */ "VMAXPHZrmb\000" |
| 52768 | /* 55406 */ "VPERMI2QZrmb\000" |
| 52769 | /* 55419 */ "VPERMT2QZrmb\000" |
| 52770 | /* 55432 */ "VPSUBQZrmb\000" |
| 52771 | /* 55443 */ "VCVTTPD2DQZrmb\000" |
| 52772 | /* 55458 */ "VCVTPD2DQZrmb\000" |
| 52773 | /* 55472 */ "VCVTTPH2DQZrmb\000" |
| 52774 | /* 55487 */ "VCVTPH2DQZrmb\000" |
| 52775 | /* 55501 */ "VCVTTPS2DQZrmb\000" |
| 52776 | /* 55516 */ "VCVTPS2DQZrmb\000" |
| 52777 | /* 55530 */ "VPADDQZrmb\000" |
| 52778 | /* 55541 */ "VPUNPCKHDQZrmb\000" |
| 52779 | /* 55556 */ "VPUNPCKLDQZrmb\000" |
| 52780 | /* 55571 */ "VPMULDQZrmb\000" |
| 52781 | /* 55583 */ "VPANDQZrmb\000" |
| 52782 | /* 55594 */ "VPUNPCKHQDQZrmb\000" |
| 52783 | /* 55610 */ "VPUNPCKLQDQZrmb\000" |
| 52784 | /* 55626 */ "VCVTTPD2UDQZrmb\000" |
| 52785 | /* 55642 */ "VCVTPD2UDQZrmb\000" |
| 52786 | /* 55657 */ "VCVTTPH2UDQZrmb\000" |
| 52787 | /* 55673 */ "VCVTPH2UDQZrmb\000" |
| 52788 | /* 55688 */ "VCVTTPS2UDQZrmb\000" |
| 52789 | /* 55704 */ "VCVTPS2UDQZrmb\000" |
| 52790 | /* 55719 */ "VPMULUDQZrmb\000" |
| 52791 | /* 55732 */ "VPMULLQZrmb\000" |
| 52792 | /* 55744 */ "VPBLENDMQZrmb\000" |
| 52793 | /* 55758 */ "VPTESTNMQZrmb\000" |
| 52794 | /* 55772 */ "VPERMQZrmb\000" |
| 52795 | /* 55783 */ "VPTESTMQZrmb\000" |
| 52796 | /* 55796 */ "VPANDNQZrmb\000" |
| 52797 | /* 55808 */ "VCVTTPD2QQZrmb\000" |
| 52798 | /* 55823 */ "VCVTPD2QQZrmb\000" |
| 52799 | /* 55837 */ "VCVTTPH2QQZrmb\000" |
| 52800 | /* 55852 */ "VCVTPH2QQZrmb\000" |
| 52801 | /* 55866 */ "VCVTTPS2QQZrmb\000" |
| 52802 | /* 55881 */ "VCVTPS2QQZrmb\000" |
| 52803 | /* 55895 */ "VPCMPEQQZrmb\000" |
| 52804 | /* 55908 */ "VCVTTPD2UQQZrmb\000" |
| 52805 | /* 55924 */ "VCVTPD2UQQZrmb\000" |
| 52806 | /* 55939 */ "VCVTTPH2UQQZrmb\000" |
| 52807 | /* 55955 */ "VCVTPH2UQQZrmb\000" |
| 52808 | /* 55970 */ "VCVTTPS2UQQZrmb\000" |
| 52809 | /* 55986 */ "VCVTPS2UQQZrmb\000" |
| 52810 | /* 56001 */ "VPORQZrmb\000" |
| 52811 | /* 56011 */ "VPXORQZrmb\000" |
| 52812 | /* 56022 */ "VPABSQZrmb\000" |
| 52813 | /* 56033 */ "VPMINSQZrmb\000" |
| 52814 | /* 56045 */ "VPMAXSQZrmb\000" |
| 52815 | /* 56057 */ "VP2INTERSECTQZrmb\000" |
| 52816 | /* 56075 */ "VPCONFLICTQZrmb\000" |
| 52817 | /* 56091 */ "VPCMPGTQZrmb\000" |
| 52818 | /* 56104 */ "VPOPCNTQZrmb\000" |
| 52819 | /* 56117 */ "VPLZCNTQZrmb\000" |
| 52820 | /* 56130 */ "VPMINUQZrmb\000" |
| 52821 | /* 56142 */ "VPMAXUQZrmb\000" |
| 52822 | /* 56154 */ "VPSRAVQZrmb\000" |
| 52823 | /* 56166 */ "VPSLLVQZrmb\000" |
| 52824 | /* 56178 */ "VPROLVQZrmb\000" |
| 52825 | /* 56190 */ "VPSRLVQZrmb\000" |
| 52826 | /* 56202 */ "VPRORVQZrmb\000" |
| 52827 | /* 56214 */ "VCVT2PH2BF8SZrmb\000" |
| 52828 | /* 56231 */ "VCVTBIASPH2BF8SZrmb\000" |
| 52829 | /* 56251 */ "VCVTPH2BF8SZrmb\000" |
| 52830 | /* 56267 */ "VCVT2PH2HF8SZrmb\000" |
| 52831 | /* 56284 */ "VCVTBIASPH2HF8SZrmb\000" |
| 52832 | /* 56304 */ "VCVTPH2HF8SZrmb\000" |
| 52833 | /* 56320 */ "VCVTTBF162IBSZrmb\000" |
| 52834 | /* 56338 */ "VCVTBF162IBSZrmb\000" |
| 52835 | /* 56355 */ "VCVTTPH2IBSZrmb\000" |
| 52836 | /* 56371 */ "VCVTPH2IBSZrmb\000" |
| 52837 | /* 56386 */ "VCVTTPS2IBSZrmb\000" |
| 52838 | /* 56402 */ "VCVTPS2IBSZrmb\000" |
| 52839 | /* 56417 */ "VCVTTBF162IUBSZrmb\000" |
| 52840 | /* 56436 */ "VCVTBF162IUBSZrmb\000" |
| 52841 | /* 56454 */ "VCVTTPH2IUBSZrmb\000" |
| 52842 | /* 56471 */ "VCVTPH2IUBSZrmb\000" |
| 52843 | /* 56487 */ "VCVTTPS2IUBSZrmb\000" |
| 52844 | /* 56504 */ "VCVTPS2IUBSZrmb\000" |
| 52845 | /* 56520 */ "VCVTPD2PSZrmb\000" |
| 52846 | /* 56534 */ "VPERMI2PSZrmb\000" |
| 52847 | /* 56548 */ "VCVTDQ2PSZrmb\000" |
| 52848 | /* 56562 */ "VCVTUDQ2PSZrmb\000" |
| 52849 | /* 56577 */ "VCVTQQ2PSZrmb\000" |
| 52850 | /* 56591 */ "VCVTUQQ2PSZrmb\000" |
| 52851 | /* 56606 */ "VPERMT2PSZrmb\000" |
| 52852 | /* 56620 */ "VSUBPSZrmb\000" |
| 52853 | /* 56631 */ "VMINCPSZrmb\000" |
| 52854 | /* 56643 */ "VMAXCPSZrmb\000" |
| 52855 | /* 56655 */ "VADDPSZrmb\000" |
| 52856 | /* 56666 */ "VANDPSZrmb\000" |
| 52857 | /* 56677 */ "VSCALEFPSZrmb\000" |
| 52858 | /* 56691 */ "VUNPCKHPSZrmb\000" |
| 52859 | /* 56705 */ "VPERMILPSZrmb\000" |
| 52860 | /* 56719 */ "VUNPCKLPSZrmb\000" |
| 52861 | /* 56733 */ "VMULPSZrmb\000" |
| 52862 | /* 56744 */ "VBLENDMPSZrmb\000" |
| 52863 | /* 56758 */ "VPERMPSZrmb\000" |
| 52864 | /* 56770 */ "VANDNPSZrmb\000" |
| 52865 | /* 56782 */ "VMINPSZrmb\000" |
| 52866 | /* 56793 */ "VORPSZrmb\000" |
| 52867 | /* 56803 */ "VXORPSZrmb\000" |
| 52868 | /* 56814 */ "VDIVPSZrmb\000" |
| 52869 | /* 56825 */ "VMAXPSZrmb\000" |
| 52870 | /* 56836 */ "VCVTTPD2DQSZrmb\000" |
| 52871 | /* 56852 */ "VCVTTPS2DQSZrmb\000" |
| 52872 | /* 56868 */ "VCVTTPD2UDQSZrmb\000" |
| 52873 | /* 56885 */ "VCVTTPS2UDQSZrmb\000" |
| 52874 | /* 56902 */ "VCVTTPD2QQSZrmb\000" |
| 52875 | /* 56918 */ "VCVTTPS2QQSZrmb\000" |
| 52876 | /* 56934 */ "VCVTTPD2UQQSZrmb\000" |
| 52877 | /* 56951 */ "VCVTTPS2UQQSZrmb\000" |
| 52878 | /* 56968 */ "VCVTTPH2WZrmb\000" |
| 52879 | /* 56982 */ "VCVTPH2WZrmb\000" |
| 52880 | /* 56995 */ "VPACKSSDWZrmb\000" |
| 52881 | /* 57009 */ "VPACKUSDWZrmb\000" |
| 52882 | /* 57023 */ "VCVTTPH2UWZrmb\000" |
| 52883 | /* 57038 */ "VCVTPH2UWZrmb\000" |
| 52884 | /* 57052 */ "VCVT2PS2PHXZrmb\000" |
| 52885 | /* 57068 */ "VCVTPS2PHXZrmb\000" |
| 52886 | /* 57083 */ "VCVTPH2PSXZrmb\000" |
| 52887 | /* 57098 */ "VFMADDSUB231PDZrb\000" |
| 52888 | /* 57116 */ "VFMSUB231PDZrb\000" |
| 52889 | /* 57131 */ "VFNMSUB231PDZrb\000" |
| 52890 | /* 57147 */ "VFMSUBADD231PDZrb\000" |
| 52891 | /* 57165 */ "VFMADD231PDZrb\000" |
| 52892 | /* 57180 */ "VFNMADD231PDZrb\000" |
| 52893 | /* 57196 */ "VFMADDSUB132PDZrb\000" |
| 52894 | /* 57214 */ "VFMSUB132PDZrb\000" |
| 52895 | /* 57229 */ "VFNMSUB132PDZrb\000" |
| 52896 | /* 57245 */ "VFMSUBADD132PDZrb\000" |
| 52897 | /* 57263 */ "VFMADD132PDZrb\000" |
| 52898 | /* 57278 */ "VFNMADD132PDZrb\000" |
| 52899 | /* 57294 */ "VEXP2PDZrb\000" |
| 52900 | /* 57305 */ "VFMADDSUB213PDZrb\000" |
| 52901 | /* 57323 */ "VFMSUB213PDZrb\000" |
| 52902 | /* 57338 */ "VFNMSUB213PDZrb\000" |
| 52903 | /* 57354 */ "VFMSUBADD213PDZrb\000" |
| 52904 | /* 57372 */ "VFMADD213PDZrb\000" |
| 52905 | /* 57387 */ "VFNMADD213PDZrb\000" |
| 52906 | /* 57403 */ "VRCP28PDZrb\000" |
| 52907 | /* 57415 */ "VRSQRT28PDZrb\000" |
| 52908 | /* 57429 */ "VGETEXPPDZrb\000" |
| 52909 | /* 57442 */ "VSQRTPDZrb\000" |
| 52910 | /* 57453 */ "VFMSUB231SDZrb\000" |
| 52911 | /* 57468 */ "VFNMSUB231SDZrb\000" |
| 52912 | /* 57484 */ "VFMADD231SDZrb\000" |
| 52913 | /* 57499 */ "VFNMADD231SDZrb\000" |
| 52914 | /* 57515 */ "VFMSUB132SDZrb\000" |
| 52915 | /* 57530 */ "VFNMSUB132SDZrb\000" |
| 52916 | /* 57546 */ "VFMADD132SDZrb\000" |
| 52917 | /* 57561 */ "VFNMADD132SDZrb\000" |
| 52918 | /* 57577 */ "VFMSUB213SDZrb\000" |
| 52919 | /* 57592 */ "VFNMSUB213SDZrb\000" |
| 52920 | /* 57608 */ "VFMADD213SDZrb\000" |
| 52921 | /* 57623 */ "VFNMADD213SDZrb\000" |
| 52922 | /* 57639 */ "VRCP28SDZrb\000" |
| 52923 | /* 57651 */ "VRSQRT28SDZrb\000" |
| 52924 | /* 57665 */ "VGETEXPSDZrb\000" |
| 52925 | /* 57678 */ "VFMADDSUB231PHZrb\000" |
| 52926 | /* 57696 */ "VFMSUB231PHZrb\000" |
| 52927 | /* 57711 */ "VFNMSUB231PHZrb\000" |
| 52928 | /* 57727 */ "VFMSUBADD231PHZrb\000" |
| 52929 | /* 57745 */ "VFMADD231PHZrb\000" |
| 52930 | /* 57760 */ "VFNMADD231PHZrb\000" |
| 52931 | /* 57776 */ "VFMADDSUB132PHZrb\000" |
| 52932 | /* 57794 */ "VFMSUB132PHZrb\000" |
| 52933 | /* 57809 */ "VFNMSUB132PHZrb\000" |
| 52934 | /* 57825 */ "VFMSUBADD132PHZrb\000" |
| 52935 | /* 57843 */ "VFMADD132PHZrb\000" |
| 52936 | /* 57858 */ "VFNMADD132PHZrb\000" |
| 52937 | /* 57874 */ "VFMADDSUB213PHZrb\000" |
| 52938 | /* 57892 */ "VFMSUB213PHZrb\000" |
| 52939 | /* 57907 */ "VFNMSUB213PHZrb\000" |
| 52940 | /* 57923 */ "VFMSUBADD213PHZrb\000" |
| 52941 | /* 57941 */ "VFMADD213PHZrb\000" |
| 52942 | /* 57956 */ "VFNMADD213PHZrb\000" |
| 52943 | /* 57972 */ "VFCMADDCPHZrb\000" |
| 52944 | /* 57986 */ "VFMADDCPHZrb\000" |
| 52945 | /* 57999 */ "VGETEXPPHZrb\000" |
| 52946 | /* 58012 */ "VSQRTPHZrb\000" |
| 52947 | /* 58023 */ "VFMSUB231SHZrb\000" |
| 52948 | /* 58038 */ "VFNMSUB231SHZrb\000" |
| 52949 | /* 58054 */ "VFMADD231SHZrb\000" |
| 52950 | /* 58069 */ "VFNMADD231SHZrb\000" |
| 52951 | /* 58085 */ "VFMSUB132SHZrb\000" |
| 52952 | /* 58100 */ "VFNMSUB132SHZrb\000" |
| 52953 | /* 58116 */ "VFMADD132SHZrb\000" |
| 52954 | /* 58131 */ "VFNMADD132SHZrb\000" |
| 52955 | /* 58147 */ "VFMSUB213SHZrb\000" |
| 52956 | /* 58162 */ "VFNMSUB213SHZrb\000" |
| 52957 | /* 58178 */ "VFMADD213SHZrb\000" |
| 52958 | /* 58193 */ "VFNMADD213SHZrb\000" |
| 52959 | /* 58209 */ "VFCMADDCSHZrb\000" |
| 52960 | /* 58223 */ "VFMADDCSHZrb\000" |
| 52961 | /* 58236 */ "VGETEXPSHZrb\000" |
| 52962 | /* 58249 */ "VFMADDSUB231PSZrb\000" |
| 52963 | /* 58267 */ "VFMSUB231PSZrb\000" |
| 52964 | /* 58282 */ "VFNMSUB231PSZrb\000" |
| 52965 | /* 58298 */ "VFMSUBADD231PSZrb\000" |
| 52966 | /* 58316 */ "VFMADD231PSZrb\000" |
| 52967 | /* 58331 */ "VFNMADD231PSZrb\000" |
| 52968 | /* 58347 */ "VFMADDSUB132PSZrb\000" |
| 52969 | /* 58365 */ "VFMSUB132PSZrb\000" |
| 52970 | /* 58380 */ "VFNMSUB132PSZrb\000" |
| 52971 | /* 58396 */ "VFMSUBADD132PSZrb\000" |
| 52972 | /* 58414 */ "VFMADD132PSZrb\000" |
| 52973 | /* 58429 */ "VFNMADD132PSZrb\000" |
| 52974 | /* 58445 */ "VEXP2PSZrb\000" |
| 52975 | /* 58456 */ "VFMADDSUB213PSZrb\000" |
| 52976 | /* 58474 */ "VFMSUB213PSZrb\000" |
| 52977 | /* 58489 */ "VFNMSUB213PSZrb\000" |
| 52978 | /* 58505 */ "VFMSUBADD213PSZrb\000" |
| 52979 | /* 58523 */ "VFMADD213PSZrb\000" |
| 52980 | /* 58538 */ "VFNMADD213PSZrb\000" |
| 52981 | /* 58554 */ "VRCP28PSZrb\000" |
| 52982 | /* 58566 */ "VRSQRT28PSZrb\000" |
| 52983 | /* 58580 */ "VGETEXPPSZrb\000" |
| 52984 | /* 58593 */ "VSQRTPSZrb\000" |
| 52985 | /* 58604 */ "VFMSUB231SSZrb\000" |
| 52986 | /* 58619 */ "VFNMSUB231SSZrb\000" |
| 52987 | /* 58635 */ "VFMADD231SSZrb\000" |
| 52988 | /* 58650 */ "VFNMADD231SSZrb\000" |
| 52989 | /* 58666 */ "VFMSUB132SSZrb\000" |
| 52990 | /* 58681 */ "VFNMSUB132SSZrb\000" |
| 52991 | /* 58697 */ "VFMADD132SSZrb\000" |
| 52992 | /* 58712 */ "VFNMADD132SSZrb\000" |
| 52993 | /* 58728 */ "VFMSUB213SSZrb\000" |
| 52994 | /* 58743 */ "VFNMSUB213SSZrb\000" |
| 52995 | /* 58759 */ "VFMADD213SSZrb\000" |
| 52996 | /* 58774 */ "VFNMADD213SSZrb\000" |
| 52997 | /* 58790 */ "VRCP28SSZrb\000" |
| 52998 | /* 58802 */ "VRSQRT28SSZrb\000" |
| 52999 | /* 58816 */ "VGETEXPSSZrb\000" |
| 53000 | /* 58829 */ "VCVTTPD2DQSZ256rrb\000" |
| 53001 | /* 58848 */ "VCVTTPD2UDQSZ256rrb\000" |
| 53002 | /* 58868 */ "VCVTTPD2QQSZ256rrb\000" |
| 53003 | /* 58887 */ "VCVTTPS2QQSZ256rrb\000" |
| 53004 | /* 58906 */ "VCVTTPD2UQQSZ256rrb\000" |
| 53005 | /* 58926 */ "VCVTTPS2UQQSZ256rrb\000" |
| 53006 | /* 58946 */ "VCVTPH2PDZrrb\000" |
| 53007 | /* 58960 */ "VCVTQQ2PDZrrb\000" |
| 53008 | /* 58974 */ "VCVTUQQ2PDZrrb\000" |
| 53009 | /* 58989 */ "VCVTPS2PDZrrb\000" |
| 53010 | /* 59003 */ "VSUBPDZrrb\000" |
| 53011 | /* 59014 */ "VADDPDZrrb\000" |
| 53012 | /* 59025 */ "VSCALEFPDZrrb\000" |
| 53013 | /* 59039 */ "VMULPDZrrb\000" |
| 53014 | /* 59050 */ "VMINPDZrrb\000" |
| 53015 | /* 59061 */ "VDIVPDZrrb\000" |
| 53016 | /* 59072 */ "VMAXPDZrrb\000" |
| 53017 | /* 59083 */ "VUCOMISDZrrb\000" |
| 53018 | /* 59096 */ "VCOMISDZrrb\000" |
| 53019 | /* 59108 */ "VCVTPD2PHZrrb\000" |
| 53020 | /* 59122 */ "VCVTDQ2PHZrrb\000" |
| 53021 | /* 59136 */ "VCVTUDQ2PHZrrb\000" |
| 53022 | /* 59151 */ "VCVTQQ2PHZrrb\000" |
| 53023 | /* 59165 */ "VCVTUQQ2PHZrrb\000" |
| 53024 | /* 59180 */ "VCVTPS2PHZrrb\000" |
| 53025 | /* 59194 */ "VCVTW2PHZrrb\000" |
| 53026 | /* 59207 */ "VCVTUW2PHZrrb\000" |
| 53027 | /* 59221 */ "VSUBPHZrrb\000" |
| 53028 | /* 59232 */ "VFCMULCPHZrrb\000" |
| 53029 | /* 59246 */ "VFMULCPHZrrb\000" |
| 53030 | /* 59259 */ "VADDPHZrrb\000" |
| 53031 | /* 59270 */ "VSCALEFPHZrrb\000" |
| 53032 | /* 59284 */ "VMULPHZrrb\000" |
| 53033 | /* 59295 */ "VMINPHZrrb\000" |
| 53034 | /* 59306 */ "VDIVPHZrrb\000" |
| 53035 | /* 59317 */ "VMAXPHZrrb\000" |
| 53036 | /* 59328 */ "VFCMULCSHZrrb\000" |
| 53037 | /* 59342 */ "VFMULCSHZrrb\000" |
| 53038 | /* 59355 */ "VUCOMISHZrrb\000" |
| 53039 | /* 59368 */ "VCOMISHZrrb\000" |
| 53040 | /* 59380 */ "VCVTTPD2DQZrrb\000" |
| 53041 | /* 59395 */ "VCVTPD2DQZrrb\000" |
| 53042 | /* 59409 */ "VCVTTPH2DQZrrb\000" |
| 53043 | /* 59424 */ "VCVTPH2DQZrrb\000" |
| 53044 | /* 59438 */ "VCVTTPS2DQZrrb\000" |
| 53045 | /* 59453 */ "VCVTPS2DQZrrb\000" |
| 53046 | /* 59467 */ "VCVTTPD2UDQZrrb\000" |
| 53047 | /* 59483 */ "VCVTPD2UDQZrrb\000" |
| 53048 | /* 59498 */ "VCVTTPH2UDQZrrb\000" |
| 53049 | /* 59514 */ "VCVTPH2UDQZrrb\000" |
| 53050 | /* 59529 */ "VCVTTPS2UDQZrrb\000" |
| 53051 | /* 59545 */ "VCVTPS2UDQZrrb\000" |
| 53052 | /* 59560 */ "VCVTTPD2QQZrrb\000" |
| 53053 | /* 59575 */ "VCVTPD2QQZrrb\000" |
| 53054 | /* 59589 */ "VCVTTPH2QQZrrb\000" |
| 53055 | /* 59604 */ "VCVTPH2QQZrrb\000" |
| 53056 | /* 59618 */ "VCVTTPS2QQZrrb\000" |
| 53057 | /* 59633 */ "VCVTPS2QQZrrb\000" |
| 53058 | /* 59647 */ "VCVTTPD2UQQZrrb\000" |
| 53059 | /* 59663 */ "VCVTPD2UQQZrrb\000" |
| 53060 | /* 59678 */ "VCVTTPH2UQQZrrb\000" |
| 53061 | /* 59694 */ "VCVTPH2UQQZrrb\000" |
| 53062 | /* 59709 */ "VCVTTPS2UQQZrrb\000" |
| 53063 | /* 59725 */ "VCVTPS2UQQZrrb\000" |
| 53064 | /* 59740 */ "VCVTTPH2IBSZrrb\000" |
| 53065 | /* 59756 */ "VCVTPH2IBSZrrb\000" |
| 53066 | /* 59771 */ "VCVTTPS2IBSZrrb\000" |
| 53067 | /* 59787 */ "VCVTPS2IBSZrrb\000" |
| 53068 | /* 59802 */ "VCVTTPH2IUBSZrrb\000" |
| 53069 | /* 59819 */ "VCVTPH2IUBSZrrb\000" |
| 53070 | /* 59835 */ "VCVTTPS2IUBSZrrb\000" |
| 53071 | /* 59852 */ "VCVTPS2IUBSZrrb\000" |
| 53072 | /* 59868 */ "VCVTPD2PSZrrb\000" |
| 53073 | /* 59882 */ "VCVTPH2PSZrrb\000" |
| 53074 | /* 59896 */ "VCVTDQ2PSZrrb\000" |
| 53075 | /* 59910 */ "VCVTUDQ2PSZrrb\000" |
| 53076 | /* 59925 */ "VCVTQQ2PSZrrb\000" |
| 53077 | /* 59939 */ "VCVTUQQ2PSZrrb\000" |
| 53078 | /* 59954 */ "VSUBPSZrrb\000" |
| 53079 | /* 59965 */ "VADDPSZrrb\000" |
| 53080 | /* 59976 */ "VSCALEFPSZrrb\000" |
| 53081 | /* 59990 */ "VMULPSZrrb\000" |
| 53082 | /* 60001 */ "VMINPSZrrb\000" |
| 53083 | /* 60012 */ "VDIVPSZrrb\000" |
| 53084 | /* 60023 */ "VMAXPSZrrb\000" |
| 53085 | /* 60034 */ "VCVTTPD2DQSZrrb\000" |
| 53086 | /* 60050 */ "VCVTTPS2DQSZrrb\000" |
| 53087 | /* 60066 */ "VCVTTPD2UDQSZrrb\000" |
| 53088 | /* 60083 */ "VCVTTPS2UDQSZrrb\000" |
| 53089 | /* 60100 */ "VCVTTPD2QQSZrrb\000" |
| 53090 | /* 60116 */ "VCVTTPS2QQSZrrb\000" |
| 53091 | /* 60132 */ "VCVTTPD2UQQSZrrb\000" |
| 53092 | /* 60149 */ "VCVTTPS2UQQSZrrb\000" |
| 53093 | /* 60166 */ "VUCOMISSZrrb\000" |
| 53094 | /* 60179 */ "VCOMISSZrrb\000" |
| 53095 | /* 60191 */ "VCVTTPH2WZrrb\000" |
| 53096 | /* 60205 */ "VCVTPH2WZrrb\000" |
| 53097 | /* 60218 */ "VCVTTPH2UWZrrb\000" |
| 53098 | /* 60233 */ "VCVTPH2UWZrrb\000" |
| 53099 | /* 60247 */ "VCVT2PS2PHXZrrb\000" |
| 53100 | /* 60263 */ "VCVTPS2PHXZrrb\000" |
| 53101 | /* 60278 */ "VCVTPH2PSXZrrb\000" |
| 53102 | /* 60293 */ "TCRETURNdi64cc\000" |
| 53103 | /* 60308 */ "TCRETURNdicc\000" |
| 53104 | /* 60321 */ "SEH_StackAlloc\000" |
| 53105 | /* 60336 */ "MOV32rc\000" |
| 53106 | /* 60344 */ "MOV64rc\000" |
| 53107 | /* 60352 */ "TAILJMPd\000" |
| 53108 | /* 60361 */ "OR32mi8Locked\000" |
| 53109 | /* 60375 */ "MOV32rd\000" |
| 53110 | /* 60383 */ "MOV64rd\000" |
| 53111 | /* 60391 */ "SEH_PushFrame\000" |
| 53112 | /* 60405 */ "SEH_SetFrame\000" |
| 53113 | /* 60418 */ "PTCVTROWPS2BF16Hrre\000" |
| 53114 | /* 60438 */ "PTCVTROWPS2PHHrre\000" |
| 53115 | /* 60456 */ "PTCVTROWPS2BF16Lrre\000" |
| 53116 | /* 60476 */ "PTCVTROWPS2PHLrre\000" |
| 53117 | /* 60494 */ "PTCVTROWD2PSrre\000" |
| 53118 | /* 60510 */ "PTILEMOVROWrre\000" |
| 53119 | /* 60525 */ "SEH_EndEpilogue\000" |
| 53120 | /* 60541 */ "SEH_BeginEpilogue\000" |
| 53121 | /* 60559 */ "SEH_EndPrologue\000" |
| 53122 | /* 60575 */ "SEH_SaveReg\000" |
| 53123 | /* 60587 */ "SEH_PushReg\000" |
| 53124 | /* 60599 */ "Int_eh_sjlj_setup_dispatch\000" |
| 53125 | /* 60626 */ "PUSH32i\000" |
| 53126 | /* 60634 */ "FARCALL32i\000" |
| 53127 | /* 60645 */ "FARJMP32i\000" |
| 53128 | /* 60655 */ "JMPABS64i\000" |
| 53129 | /* 60665 */ "PUSH16i\000" |
| 53130 | /* 60673 */ "FARCALL16i\000" |
| 53131 | /* 60684 */ "FARJMP16i\000" |
| 53132 | /* 60694 */ "VFPCLASSBF16Z256mbi\000" |
| 53133 | /* 60714 */ "VPSRADZ256mbi\000" |
| 53134 | /* 60728 */ "VPSHUFDZ256mbi\000" |
| 53135 | /* 60743 */ "VPSLLDZ256mbi\000" |
| 53136 | /* 60757 */ "VPROLDZ256mbi\000" |
| 53137 | /* 60771 */ "VPSRLDZ256mbi\000" |
| 53138 | /* 60785 */ "VPERMILPDZ256mbi\000" |
| 53139 | /* 60802 */ "VPERMPDZ256mbi\000" |
| 53140 | /* 60817 */ "VFPCLASSPDZ256mbi\000" |
| 53141 | /* 60835 */ "VPRORDZ256mbi\000" |
| 53142 | /* 60849 */ "VFPCLASSPHZ256mbi\000" |
| 53143 | /* 60867 */ "VPSRAQZ256mbi\000" |
| 53144 | /* 60881 */ "VPSLLQZ256mbi\000" |
| 53145 | /* 60895 */ "VPROLQZ256mbi\000" |
| 53146 | /* 60909 */ "VPSRLQZ256mbi\000" |
| 53147 | /* 60923 */ "VPERMQZ256mbi\000" |
| 53148 | /* 60937 */ "VPRORQZ256mbi\000" |
| 53149 | /* 60951 */ "VPERMILPSZ256mbi\000" |
| 53150 | /* 60968 */ "VFPCLASSPSZ256mbi\000" |
| 53151 | /* 60986 */ "VFPCLASSBF16Z128mbi\000" |
| 53152 | /* 61006 */ "VPSRADZ128mbi\000" |
| 53153 | /* 61020 */ "VPSHUFDZ128mbi\000" |
| 53154 | /* 61035 */ "VPSLLDZ128mbi\000" |
| 53155 | /* 61049 */ "VPROLDZ128mbi\000" |
| 53156 | /* 61063 */ "VPSRLDZ128mbi\000" |
| 53157 | /* 61077 */ "VPERMILPDZ128mbi\000" |
| 53158 | /* 61094 */ "VFPCLASSPDZ128mbi\000" |
| 53159 | /* 61112 */ "VPRORDZ128mbi\000" |
| 53160 | /* 61126 */ "VFPCLASSPHZ128mbi\000" |
| 53161 | /* 61144 */ "VPSRAQZ128mbi\000" |
| 53162 | /* 61158 */ "VPSLLQZ128mbi\000" |
| 53163 | /* 61172 */ "VPROLQZ128mbi\000" |
| 53164 | /* 61186 */ "VPSRLQZ128mbi\000" |
| 53165 | /* 61200 */ "VPRORQZ128mbi\000" |
| 53166 | /* 61214 */ "VPERMILPSZ128mbi\000" |
| 53167 | /* 61231 */ "VFPCLASSPSZ128mbi\000" |
| 53168 | /* 61249 */ "VFPCLASSBF16Zmbi\000" |
| 53169 | /* 61266 */ "VPSRADZmbi\000" |
| 53170 | /* 61277 */ "VPSHUFDZmbi\000" |
| 53171 | /* 61289 */ "VPSLLDZmbi\000" |
| 53172 | /* 61300 */ "VPROLDZmbi\000" |
| 53173 | /* 61311 */ "VPSRLDZmbi\000" |
| 53174 | /* 61322 */ "VPERMILPDZmbi\000" |
| 53175 | /* 61336 */ "VPERMPDZmbi\000" |
| 53176 | /* 61348 */ "VFPCLASSPDZmbi\000" |
| 53177 | /* 61363 */ "VPRORDZmbi\000" |
| 53178 | /* 61374 */ "VFPCLASSPHZmbi\000" |
| 53179 | /* 61389 */ "VPSRAQZmbi\000" |
| 53180 | /* 61400 */ "VPSLLQZmbi\000" |
| 53181 | /* 61411 */ "VPROLQZmbi\000" |
| 53182 | /* 61422 */ "VPSRLQZmbi\000" |
| 53183 | /* 61433 */ "VPERMQZmbi\000" |
| 53184 | /* 61444 */ "VPRORQZmbi\000" |
| 53185 | /* 61455 */ "VPERMILPSZmbi\000" |
| 53186 | /* 61469 */ "VFPCLASSPSZmbi\000" |
| 53187 | /* 61484 */ "VSHUFF64X2Z256rmbi\000" |
| 53188 | /* 61503 */ "VSHUFI64X2Z256rmbi\000" |
| 53189 | /* 61522 */ "VSHUFF32X4Z256rmbi\000" |
| 53190 | /* 61541 */ "VSHUFI32X4Z256rmbi\000" |
| 53191 | /* 61560 */ "VREDUCEBF16Z256rmbi\000" |
| 53192 | /* 61580 */ "VRNDSCALEBF16Z256rmbi\000" |
| 53193 | /* 61602 */ "VCMPBF16Z256rmbi\000" |
| 53194 | /* 61619 */ "VGETMANTBF16Z256rmbi\000" |
| 53195 | /* 61640 */ "VMINMAXBF16Z256rmbi\000" |
| 53196 | /* 61660 */ "VGF2P8AFFINEQBZ256rmbi\000" |
| 53197 | /* 61683 */ "VGF2P8AFFINEINVQBZ256rmbi\000" |
| 53198 | /* 61709 */ "VPSHLDDZ256rmbi\000" |
| 53199 | /* 61725 */ "VPSHRDDZ256rmbi\000" |
| 53200 | /* 61741 */ "VPTERNLOGDZ256rmbi\000" |
| 53201 | /* 61760 */ "VALIGNDZ256rmbi\000" |
| 53202 | /* 61776 */ "VREDUCEPDZ256rmbi\000" |
| 53203 | /* 61794 */ "VRANGEPDZ256rmbi\000" |
| 53204 | /* 61811 */ "VRNDSCALEPDZ256rmbi\000" |
| 53205 | /* 61831 */ "VSHUFPDZ256rmbi\000" |
| 53206 | /* 61847 */ "VPCMPDZ256rmbi\000" |
| 53207 | /* 61862 */ "VFIXUPIMMPDZ256rmbi\000" |
| 53208 | /* 61882 */ "VCMPPDZ256rmbi\000" |
| 53209 | /* 61897 */ "VGETMANTPDZ256rmbi\000" |
| 53210 | /* 61916 */ "VMINMAXPDZ256rmbi\000" |
| 53211 | /* 61934 */ "VPCMPUDZ256rmbi\000" |
| 53212 | /* 61950 */ "VREDUCEPHZ256rmbi\000" |
| 53213 | /* 61968 */ "VRNDSCALEPHZ256rmbi\000" |
| 53214 | /* 61988 */ "VCMPPHZ256rmbi\000" |
| 53215 | /* 62003 */ "VGETMANTPHZ256rmbi\000" |
| 53216 | /* 62022 */ "VMINMAXPHZ256rmbi\000" |
| 53217 | /* 62040 */ "VPSHLDQZ256rmbi\000" |
| 53218 | /* 62056 */ "VPSHRDQZ256rmbi\000" |
| 53219 | /* 62072 */ "VPTERNLOGQZ256rmbi\000" |
| 53220 | /* 62091 */ "VALIGNQZ256rmbi\000" |
| 53221 | /* 62107 */ "VPCMPQZ256rmbi\000" |
| 53222 | /* 62122 */ "VPCMPUQZ256rmbi\000" |
| 53223 | /* 62138 */ "VREDUCEPSZ256rmbi\000" |
| 53224 | /* 62156 */ "VRANGEPSZ256rmbi\000" |
| 53225 | /* 62173 */ "VRNDSCALEPSZ256rmbi\000" |
| 53226 | /* 62193 */ "VSHUFPSZ256rmbi\000" |
| 53227 | /* 62209 */ "VFIXUPIMMPSZ256rmbi\000" |
| 53228 | /* 62229 */ "VCMPPSZ256rmbi\000" |
| 53229 | /* 62244 */ "VGETMANTPSZ256rmbi\000" |
| 53230 | /* 62263 */ "VMINMAXPSZ256rmbi\000" |
| 53231 | /* 62281 */ "VREDUCEBF16Z128rmbi\000" |
| 53232 | /* 62301 */ "VRNDSCALEBF16Z128rmbi\000" |
| 53233 | /* 62323 */ "VCMPBF16Z128rmbi\000" |
| 53234 | /* 62340 */ "VGETMANTBF16Z128rmbi\000" |
| 53235 | /* 62361 */ "VMINMAXBF16Z128rmbi\000" |
| 53236 | /* 62381 */ "VGF2P8AFFINEQBZ128rmbi\000" |
| 53237 | /* 62404 */ "VGF2P8AFFINEINVQBZ128rmbi\000" |
| 53238 | /* 62430 */ "VPSHLDDZ128rmbi\000" |
| 53239 | /* 62446 */ "VPSHRDDZ128rmbi\000" |
| 53240 | /* 62462 */ "VPTERNLOGDZ128rmbi\000" |
| 53241 | /* 62481 */ "VALIGNDZ128rmbi\000" |
| 53242 | /* 62497 */ "VREDUCEPDZ128rmbi\000" |
| 53243 | /* 62515 */ "VRANGEPDZ128rmbi\000" |
| 53244 | /* 62532 */ "VRNDSCALEPDZ128rmbi\000" |
| 53245 | /* 62552 */ "VSHUFPDZ128rmbi\000" |
| 53246 | /* 62568 */ "VPCMPDZ128rmbi\000" |
| 53247 | /* 62583 */ "VFIXUPIMMPDZ128rmbi\000" |
| 53248 | /* 62603 */ "VCMPPDZ128rmbi\000" |
| 53249 | /* 62618 */ "VGETMANTPDZ128rmbi\000" |
| 53250 | /* 62637 */ "VMINMAXPDZ128rmbi\000" |
| 53251 | /* 62655 */ "VPCMPUDZ128rmbi\000" |
| 53252 | /* 62671 */ "VREDUCEPHZ128rmbi\000" |
| 53253 | /* 62689 */ "VRNDSCALEPHZ128rmbi\000" |
| 53254 | /* 62709 */ "VCMPPHZ128rmbi\000" |
| 53255 | /* 62724 */ "VGETMANTPHZ128rmbi\000" |
| 53256 | /* 62743 */ "VMINMAXPHZ128rmbi\000" |
| 53257 | /* 62761 */ "VPSHLDQZ128rmbi\000" |
| 53258 | /* 62777 */ "VPSHRDQZ128rmbi\000" |
| 53259 | /* 62793 */ "VPTERNLOGQZ128rmbi\000" |
| 53260 | /* 62812 */ "VALIGNQZ128rmbi\000" |
| 53261 | /* 62828 */ "VPCMPQZ128rmbi\000" |
| 53262 | /* 62843 */ "VPCMPUQZ128rmbi\000" |
| 53263 | /* 62859 */ "VREDUCEPSZ128rmbi\000" |
| 53264 | /* 62877 */ "VRANGEPSZ128rmbi\000" |
| 53265 | /* 62894 */ "VRNDSCALEPSZ128rmbi\000" |
| 53266 | /* 62914 */ "VSHUFPSZ128rmbi\000" |
| 53267 | /* 62930 */ "VFIXUPIMMPSZ128rmbi\000" |
| 53268 | /* 62950 */ "VCMPPSZ128rmbi\000" |
| 53269 | /* 62965 */ "VGETMANTPSZ128rmbi\000" |
| 53270 | /* 62984 */ "VMINMAXPSZ128rmbi\000" |
| 53271 | /* 63002 */ "VSHUFF64X2Zrmbi\000" |
| 53272 | /* 63018 */ "VSHUFI64X2Zrmbi\000" |
| 53273 | /* 63034 */ "VSHUFF32X4Zrmbi\000" |
| 53274 | /* 63050 */ "VSHUFI32X4Zrmbi\000" |
| 53275 | /* 63066 */ "VREDUCEBF16Zrmbi\000" |
| 53276 | /* 63083 */ "VRNDSCALEBF16Zrmbi\000" |
| 53277 | /* 63102 */ "VCMPBF16Zrmbi\000" |
| 53278 | /* 63116 */ "VGETMANTBF16Zrmbi\000" |
| 53279 | /* 63134 */ "VMINMAXBF16Zrmbi\000" |
| 53280 | /* 63151 */ "VGF2P8AFFINEQBZrmbi\000" |
| 53281 | /* 63171 */ "VGF2P8AFFINEINVQBZrmbi\000" |
| 53282 | /* 63194 */ "VPSHLDDZrmbi\000" |
| 53283 | /* 63207 */ "VPSHRDDZrmbi\000" |
| 53284 | /* 63220 */ "VPTERNLOGDZrmbi\000" |
| 53285 | /* 63236 */ "VALIGNDZrmbi\000" |
| 53286 | /* 63249 */ "VREDUCEPDZrmbi\000" |
| 53287 | /* 63264 */ "VRANGEPDZrmbi\000" |
| 53288 | /* 63278 */ "VRNDSCALEPDZrmbi\000" |
| 53289 | /* 63295 */ "VSHUFPDZrmbi\000" |
| 53290 | /* 63308 */ "VPCMPDZrmbi\000" |
| 53291 | /* 63320 */ "VFIXUPIMMPDZrmbi\000" |
| 53292 | /* 63337 */ "VCMPPDZrmbi\000" |
| 53293 | /* 63349 */ "VGETMANTPDZrmbi\000" |
| 53294 | /* 63365 */ "VMINMAXPDZrmbi\000" |
| 53295 | /* 63380 */ "VPCMPUDZrmbi\000" |
| 53296 | /* 63393 */ "VREDUCEPHZrmbi\000" |
| 53297 | /* 63408 */ "VRNDSCALEPHZrmbi\000" |
| 53298 | /* 63425 */ "VCMPPHZrmbi\000" |
| 53299 | /* 63437 */ "VGETMANTPHZrmbi\000" |
| 53300 | /* 63453 */ "VMINMAXPHZrmbi\000" |
| 53301 | /* 63468 */ "VPSHLDQZrmbi\000" |
| 53302 | /* 63481 */ "VPSHRDQZrmbi\000" |
| 53303 | /* 63494 */ "VPTERNLOGQZrmbi\000" |
| 53304 | /* 63510 */ "VALIGNQZrmbi\000" |
| 53305 | /* 63523 */ "VPCMPQZrmbi\000" |
| 53306 | /* 63535 */ "VPCMPUQZrmbi\000" |
| 53307 | /* 63548 */ "VREDUCEPSZrmbi\000" |
| 53308 | /* 63563 */ "VRANGEPSZrmbi\000" |
| 53309 | /* 63577 */ "VRNDSCALEPSZrmbi\000" |
| 53310 | /* 63594 */ "VSHUFPSZrmbi\000" |
| 53311 | /* 63607 */ "VFIXUPIMMPSZrmbi\000" |
| 53312 | /* 63624 */ "VCMPPSZrmbi\000" |
| 53313 | /* 63636 */ "VGETMANTPSZrmbi\000" |
| 53314 | /* 63652 */ "VMINMAXPSZrmbi\000" |
| 53315 | /* 63667 */ "TCRETURNdi\000" |
| 53316 | /* 63678 */ "KSHIFTLBki\000" |
| 53317 | /* 63689 */ "KSHIFTRBki\000" |
| 53318 | /* 63700 */ "KSHIFTLDki\000" |
| 53319 | /* 63711 */ "KSHIFTRDki\000" |
| 53320 | /* 63722 */ "KSHIFTLQki\000" |
| 53321 | /* 63733 */ "KSHIFTRQki\000" |
| 53322 | /* 63744 */ "KSHIFTLWki\000" |
| 53323 | /* 63755 */ "KSHIFTRWki\000" |
| 53324 | /* 63766 */ "SBB32mi\000" |
| 53325 | /* 63774 */ "LOCK_SUB32mi\000" |
| 53326 | /* 63787 */ "ADC32mi\000" |
| 53327 | /* 63795 */ "LOCK_ADD32mi\000" |
| 53328 | /* 63808 */ "LOCK_AND32mi\000" |
| 53329 | /* 63821 */ "BEXTRI32mi\000" |
| 53330 | /* 63832 */ "RCL32mi\000" |
| 53331 | /* 63840 */ "SHL32mi\000" |
| 53332 | /* 63848 */ "ROL32mi\000" |
| 53333 | /* 63856 */ "CCMP32mi\000" |
| 53334 | /* 63865 */ "SAR32mi\000" |
| 53335 | /* 63873 */ "RCR32mi\000" |
| 53336 | /* 63881 */ "SHR32mi\000" |
| 53337 | /* 63889 */ "ROR32mi\000" |
| 53338 | /* 63897 */ "LOCK_XOR32mi\000" |
| 53339 | /* 63910 */ "LOCK_OR32mi\000" |
| 53340 | /* 63922 */ "CTEST32mi\000" |
| 53341 | /* 63932 */ "MOV32mi\000" |
| 53342 | /* 63940 */ "RORX32mi\000" |
| 53343 | /* 63949 */ "BEXTRI64mi\000" |
| 53344 | /* 63960 */ "RCL64mi\000" |
| 53345 | /* 63968 */ "SHL64mi\000" |
| 53346 | /* 63976 */ "ROL64mi\000" |
| 53347 | /* 63984 */ "SAR64mi\000" |
| 53348 | /* 63992 */ "RCR64mi\000" |
| 53349 | /* 64000 */ "SHR64mi\000" |
| 53350 | /* 64008 */ "ROR64mi\000" |
| 53351 | /* 64016 */ "RORX64mi\000" |
| 53352 | /* 64025 */ "SBB16mi\000" |
| 53353 | /* 64033 */ "LOCK_SUB16mi\000" |
| 53354 | /* 64046 */ "ADC16mi\000" |
| 53355 | /* 64054 */ "LOCK_ADD16mi\000" |
| 53356 | /* 64067 */ "LOCK_AND16mi\000" |
| 53357 | /* 64080 */ "RCL16mi\000" |
| 53358 | /* 64088 */ "SHL16mi\000" |
| 53359 | /* 64096 */ "ROL16mi\000" |
| 53360 | /* 64104 */ "CCMP16mi\000" |
| 53361 | /* 64113 */ "SAR16mi\000" |
| 53362 | /* 64121 */ "RCR16mi\000" |
| 53363 | /* 64129 */ "SHR16mi\000" |
| 53364 | /* 64137 */ "ROR16mi\000" |
| 53365 | /* 64145 */ "LOCK_XOR16mi\000" |
| 53366 | /* 64158 */ "LOCK_OR16mi\000" |
| 53367 | /* 64170 */ "CTEST16mi\000" |
| 53368 | /* 64180 */ "MOV16mi\000" |
| 53369 | /* 64188 */ "VFPCLASSBF16Z256mi\000" |
| 53370 | /* 64207 */ "VPSRADZ256mi\000" |
| 53371 | /* 64220 */ "VPSHUFDZ256mi\000" |
| 53372 | /* 64234 */ "VPSLLDZ256mi\000" |
| 53373 | /* 64247 */ "VPROLDZ256mi\000" |
| 53374 | /* 64260 */ "VPSRLDZ256mi\000" |
| 53375 | /* 64273 */ "VPERMILPDZ256mi\000" |
| 53376 | /* 64289 */ "VPERMPDZ256mi\000" |
| 53377 | /* 64303 */ "VFPCLASSPDZ256mi\000" |
| 53378 | /* 64320 */ "VPRORDZ256mi\000" |
| 53379 | /* 64333 */ "VFPCLASSPHZ256mi\000" |
| 53380 | /* 64350 */ "VPSRAQZ256mi\000" |
| 53381 | /* 64363 */ "VPSLLDQZ256mi\000" |
| 53382 | /* 64377 */ "VPSRLDQZ256mi\000" |
| 53383 | /* 64391 */ "VPSLLQZ256mi\000" |
| 53384 | /* 64404 */ "VPROLQZ256mi\000" |
| 53385 | /* 64417 */ "VPSRLQZ256mi\000" |
| 53386 | /* 64430 */ "VPERMQZ256mi\000" |
| 53387 | /* 64443 */ "VPRORQZ256mi\000" |
| 53388 | /* 64456 */ "VPERMILPSZ256mi\000" |
| 53389 | /* 64472 */ "VFPCLASSPSZ256mi\000" |
| 53390 | /* 64489 */ "VPSRAWZ256mi\000" |
| 53391 | /* 64502 */ "VPSHUFHWZ256mi\000" |
| 53392 | /* 64517 */ "VPSHUFLWZ256mi\000" |
| 53393 | /* 64532 */ "VPSLLWZ256mi\000" |
| 53394 | /* 64545 */ "VPSRLWZ256mi\000" |
| 53395 | /* 64558 */ "VFPCLASSBF16Z128mi\000" |
| 53396 | /* 64577 */ "VPSRADZ128mi\000" |
| 53397 | /* 64590 */ "VPSHUFDZ128mi\000" |
| 53398 | /* 64604 */ "VPSLLDZ128mi\000" |
| 53399 | /* 64617 */ "VPROLDZ128mi\000" |
| 53400 | /* 64630 */ "VPSRLDZ128mi\000" |
| 53401 | /* 64643 */ "VPERMILPDZ128mi\000" |
| 53402 | /* 64659 */ "VFPCLASSPDZ128mi\000" |
| 53403 | /* 64676 */ "VPRORDZ128mi\000" |
| 53404 | /* 64689 */ "VFPCLASSPHZ128mi\000" |
| 53405 | /* 64706 */ "VPSRAQZ128mi\000" |
| 53406 | /* 64719 */ "VPSLLDQZ128mi\000" |
| 53407 | /* 64733 */ "VPSRLDQZ128mi\000" |
| 53408 | /* 64747 */ "VPSLLQZ128mi\000" |
| 53409 | /* 64760 */ "VPROLQZ128mi\000" |
| 53410 | /* 64773 */ "VPSRLQZ128mi\000" |
| 53411 | /* 64786 */ "VPRORQZ128mi\000" |
| 53412 | /* 64799 */ "VPERMILPSZ128mi\000" |
| 53413 | /* 64815 */ "VFPCLASSPSZ128mi\000" |
| 53414 | /* 64832 */ "VPSRAWZ128mi\000" |
| 53415 | /* 64845 */ "VPSHUFHWZ128mi\000" |
| 53416 | /* 64860 */ "VPSHUFLWZ128mi\000" |
| 53417 | /* 64875 */ "VPSLLWZ128mi\000" |
| 53418 | /* 64888 */ "VPSRLWZ128mi\000" |
| 53419 | /* 64901 */ "SBB8mi\000" |
| 53420 | /* 64908 */ "LOCK_SUB8mi\000" |
| 53421 | /* 64920 */ "ADC8mi\000" |
| 53422 | /* 64927 */ "LOCK_ADD8mi\000" |
| 53423 | /* 64939 */ "LOCK_AND8mi\000" |
| 53424 | /* 64951 */ "RCL8mi\000" |
| 53425 | /* 64958 */ "SHL8mi\000" |
| 53426 | /* 64965 */ "ROL8mi\000" |
| 53427 | /* 64972 */ "CCMP8mi\000" |
| 53428 | /* 64980 */ "SAR8mi\000" |
| 53429 | /* 64987 */ "RCR8mi\000" |
| 53430 | /* 64994 */ "SHR8mi\000" |
| 53431 | /* 65001 */ "ROR8mi\000" |
| 53432 | /* 65008 */ "LOCK_XOR8mi\000" |
| 53433 | /* 65020 */ "LOCK_OR8mi\000" |
| 53434 | /* 65031 */ "CTEST8mi\000" |
| 53435 | /* 65040 */ "MOV8mi\000" |
| 53436 | /* 65047 */ "VPCOMBmi\000" |
| 53437 | /* 65056 */ "VPROTBmi\000" |
| 53438 | /* 65065 */ "VPCOMUBmi\000" |
| 53439 | /* 65075 */ "VPSHUFDmi\000" |
| 53440 | /* 65085 */ "VPCOMDmi\000" |
| 53441 | /* 65094 */ "VROUNDPDmi\000" |
| 53442 | /* 65105 */ "VPERMILPDmi\000" |
| 53443 | /* 65117 */ "VROUNDSDmi\000" |
| 53444 | /* 65128 */ "VPROTDmi\000" |
| 53445 | /* 65137 */ "VPCOMUDmi\000" |
| 53446 | /* 65147 */ "TCRETURNmi\000" |
| 53447 | /* 65158 */ "VPCOMQmi\000" |
| 53448 | /* 65167 */ "VPROTQmi\000" |
| 53449 | /* 65176 */ "VPCOMUQmi\000" |
| 53450 | /* 65186 */ "VROUNDPSmi\000" |
| 53451 | /* 65197 */ "VPERMILPSmi\000" |
| 53452 | /* 65209 */ "VROUNDSSmi\000" |
| 53453 | /* 65220 */ "MMX_PSHUFWmi\000" |
| 53454 | /* 65233 */ "VPSHUFHWmi\000" |
| 53455 | /* 65244 */ "VPSHUFLWmi\000" |
| 53456 | /* 65255 */ "VPCOMWmi\000" |
| 53457 | /* 65264 */ "VPROTWmi\000" |
| 53458 | /* 65273 */ "VPCOMUWmi\000" |
| 53459 | /* 65283 */ "VPSHUFDYmi\000" |
| 53460 | /* 65294 */ "VROUNDPDYmi\000" |
| 53461 | /* 65306 */ "VPERMILPDYmi\000" |
| 53462 | /* 65319 */ "VPERMPDYmi\000" |
| 53463 | /* 65330 */ "VPERMQYmi\000" |
| 53464 | /* 65340 */ "VROUNDPSYmi\000" |
| 53465 | /* 65352 */ "VPERMILPSYmi\000" |
| 53466 | /* 65365 */ "VPSHUFHWYmi\000" |
| 53467 | /* 65377 */ "VPSHUFLWYmi\000" |
| 53468 | /* 65389 */ "VFPCLASSBF16Zmi\000" |
| 53469 | /* 65405 */ "VPSRADZmi\000" |
| 53470 | /* 65415 */ "VPSHUFDZmi\000" |
| 53471 | /* 65426 */ "VPSLLDZmi\000" |
| 53472 | /* 65436 */ "VPROLDZmi\000" |
| 53473 | /* 65446 */ "VPSRLDZmi\000" |
| 53474 | /* 65456 */ "VPERMILPDZmi\000" |
| 53475 | /* 65469 */ "VPERMPDZmi\000" |
| 53476 | /* 65480 */ "VFPCLASSPDZmi\000" |
| 53477 | /* 65494 */ "VPRORDZmi\000" |
| 53478 | /* 65504 */ "VFPCLASSSDZmi\000" |
| 53479 | /* 65518 */ "VFPCLASSPHZmi\000" |
| 53480 | /* 65532 */ "VFPCLASSSHZmi\000" |
| 53481 | /* 65546 */ "VPSRAQZmi\000" |
| 53482 | /* 65556 */ "VPSLLDQZmi\000" |
| 53483 | /* 65567 */ "VPSRLDQZmi\000" |
| 53484 | /* 65578 */ "VPSLLQZmi\000" |
| 53485 | /* 65588 */ "VPROLQZmi\000" |
| 53486 | /* 65598 */ "VPSRLQZmi\000" |
| 53487 | /* 65608 */ "VPERMQZmi\000" |
| 53488 | /* 65618 */ "VPRORQZmi\000" |
| 53489 | /* 65628 */ "VPERMILPSZmi\000" |
| 53490 | /* 65641 */ "VFPCLASSPSZmi\000" |
| 53491 | /* 65655 */ "VFPCLASSSSZmi\000" |
| 53492 | /* 65669 */ "VPSRAWZmi\000" |
| 53493 | /* 65679 */ "VPSHUFHWZmi\000" |
| 53494 | /* 65691 */ "VPSHUFLWZmi\000" |
| 53495 | /* 65703 */ "VPSLLWZmi\000" |
| 53496 | /* 65713 */ "VPSRLWZmi\000" |
| 53497 | /* 65723 */ "LWPVAL32rmi\000" |
| 53498 | /* 65735 */ "IMUL32rmi\000" |
| 53499 | /* 65745 */ "LWPINS32rmi\000" |
| 53500 | /* 65757 */ "IMULZU32rmi\000" |
| 53501 | /* 65769 */ "VSM3RNDS2rmi\000" |
| 53502 | /* 65782 */ "LWPVAL64rmi\000" |
| 53503 | /* 65794 */ "LWPINS64rmi\000" |
| 53504 | /* 65806 */ "SHA1RNDS4rmi\000" |
| 53505 | /* 65819 */ "IMUL16rmi\000" |
| 53506 | /* 65829 */ "IMULZU16rmi\000" |
| 53507 | /* 65841 */ "VSHUFF64X2Z256rmi\000" |
| 53508 | /* 65859 */ "VINSERTF64X2Z256rmi\000" |
| 53509 | /* 65879 */ "VSHUFI64X2Z256rmi\000" |
| 53510 | /* 65897 */ "VINSERTI64X2Z256rmi\000" |
| 53511 | /* 65917 */ "VSHUFF32X4Z256rmi\000" |
| 53512 | /* 65935 */ "VINSERTF32X4Z256rmi\000" |
| 53513 | /* 65955 */ "VSHUFI32X4Z256rmi\000" |
| 53514 | /* 65973 */ "VINSERTI32X4Z256rmi\000" |
| 53515 | /* 65993 */ "VREDUCEBF16Z256rmi\000" |
| 53516 | /* 66012 */ "VRNDSCALEBF16Z256rmi\000" |
| 53517 | /* 66033 */ "VCMPBF16Z256rmi\000" |
| 53518 | /* 66049 */ "VGETMANTBF16Z256rmi\000" |
| 53519 | /* 66069 */ "VMINMAXBF16Z256rmi\000" |
| 53520 | /* 66088 */ "VPCMPBZ256rmi\000" |
| 53521 | /* 66102 */ "VGF2P8AFFINEQBZ256rmi\000" |
| 53522 | /* 66124 */ "VGF2P8AFFINEINVQBZ256rmi\000" |
| 53523 | /* 66149 */ "VPCMPUBZ256rmi\000" |
| 53524 | /* 66164 */ "VPSHLDDZ256rmi\000" |
| 53525 | /* 66179 */ "VPSHRDDZ256rmi\000" |
| 53526 | /* 66194 */ "VPTERNLOGDZ256rmi\000" |
| 53527 | /* 66212 */ "VALIGNDZ256rmi\000" |
| 53528 | /* 66227 */ "VREDUCEPDZ256rmi\000" |
| 53529 | /* 66244 */ "VRANGEPDZ256rmi\000" |
| 53530 | /* 66260 */ "VRNDSCALEPDZ256rmi\000" |
| 53531 | /* 66279 */ "VSHUFPDZ256rmi\000" |
| 53532 | /* 66294 */ "VPCMPDZ256rmi\000" |
| 53533 | /* 66308 */ "VFIXUPIMMPDZ256rmi\000" |
| 53534 | /* 66327 */ "VCMPPDZ256rmi\000" |
| 53535 | /* 66341 */ "VGETMANTPDZ256rmi\000" |
| 53536 | /* 66359 */ "VMINMAXPDZ256rmi\000" |
| 53537 | /* 66376 */ "VPCMPUDZ256rmi\000" |
| 53538 | /* 66391 */ "VREDUCEPHZ256rmi\000" |
| 53539 | /* 66408 */ "VRNDSCALEPHZ256rmi\000" |
| 53540 | /* 66427 */ "VCMPPHZ256rmi\000" |
| 53541 | /* 66441 */ "VGETMANTPHZ256rmi\000" |
| 53542 | /* 66459 */ "VMINMAXPHZ256rmi\000" |
| 53543 | /* 66476 */ "VPSHLDQZ256rmi\000" |
| 53544 | /* 66491 */ "VPCLMULQDQZ256rmi\000" |
| 53545 | /* 66509 */ "VPSHRDQZ256rmi\000" |
| 53546 | /* 66524 */ "VPTERNLOGQZ256rmi\000" |
| 53547 | /* 66542 */ "VALIGNQZ256rmi\000" |
| 53548 | /* 66557 */ "VPCMPQZ256rmi\000" |
| 53549 | /* 66571 */ "VPCMPUQZ256rmi\000" |
| 53550 | /* 66586 */ "VPALIGNRZ256rmi\000" |
| 53551 | /* 66602 */ "VREDUCEPSZ256rmi\000" |
| 53552 | /* 66619 */ "VRANGEPSZ256rmi\000" |
| 53553 | /* 66635 */ "VRNDSCALEPSZ256rmi\000" |
| 53554 | /* 66654 */ "VSHUFPSZ256rmi\000" |
| 53555 | /* 66669 */ "VFIXUPIMMPSZ256rmi\000" |
| 53556 | /* 66688 */ "VCMPPSZ256rmi\000" |
| 53557 | /* 66702 */ "VGETMANTPSZ256rmi\000" |
| 53558 | /* 66720 */ "VMINMAXPSZ256rmi\000" |
| 53559 | /* 66737 */ "VDBPSADBWZ256rmi\000" |
| 53560 | /* 66754 */ "VMPSADBWZ256rmi\000" |
| 53561 | /* 66770 */ "VPSHLDWZ256rmi\000" |
| 53562 | /* 66785 */ "VPSHRDWZ256rmi\000" |
| 53563 | /* 66800 */ "VPCMPWZ256rmi\000" |
| 53564 | /* 66814 */ "VPCMPUWZ256rmi\000" |
| 53565 | /* 66829 */ "VPERM2F128rmi\000" |
| 53566 | /* 66843 */ "VINSERTF128rmi\000" |
| 53567 | /* 66858 */ "VPERM2I128rmi\000" |
| 53568 | /* 66872 */ "VINSERTI128rmi\000" |
| 53569 | /* 66887 */ "VREDUCEBF16Z128rmi\000" |
| 53570 | /* 66906 */ "VRNDSCALEBF16Z128rmi\000" |
| 53571 | /* 66927 */ "VCMPBF16Z128rmi\000" |
| 53572 | /* 66943 */ "VGETMANTBF16Z128rmi\000" |
| 53573 | /* 66963 */ "VMINMAXBF16Z128rmi\000" |
| 53574 | /* 66982 */ "VPCMPBZ128rmi\000" |
| 53575 | /* 66996 */ "VGF2P8AFFINEQBZ128rmi\000" |
| 53576 | /* 67018 */ "VGF2P8AFFINEINVQBZ128rmi\000" |
| 53577 | /* 67043 */ "VPCMPUBZ128rmi\000" |
| 53578 | /* 67058 */ "VPSHLDDZ128rmi\000" |
| 53579 | /* 67073 */ "VPSHRDDZ128rmi\000" |
| 53580 | /* 67088 */ "VPTERNLOGDZ128rmi\000" |
| 53581 | /* 67106 */ "VALIGNDZ128rmi\000" |
| 53582 | /* 67121 */ "VREDUCEPDZ128rmi\000" |
| 53583 | /* 67138 */ "VRANGEPDZ128rmi\000" |
| 53584 | /* 67154 */ "VRNDSCALEPDZ128rmi\000" |
| 53585 | /* 67173 */ "VSHUFPDZ128rmi\000" |
| 53586 | /* 67188 */ "VPCMPDZ128rmi\000" |
| 53587 | /* 67202 */ "VFIXUPIMMPDZ128rmi\000" |
| 53588 | /* 67221 */ "VCMPPDZ128rmi\000" |
| 53589 | /* 67235 */ "VGETMANTPDZ128rmi\000" |
| 53590 | /* 67253 */ "VMINMAXPDZ128rmi\000" |
| 53591 | /* 67270 */ "VPCMPUDZ128rmi\000" |
| 53592 | /* 67285 */ "VREDUCEPHZ128rmi\000" |
| 53593 | /* 67302 */ "VRNDSCALEPHZ128rmi\000" |
| 53594 | /* 67321 */ "VCMPPHZ128rmi\000" |
| 53595 | /* 67335 */ "VGETMANTPHZ128rmi\000" |
| 53596 | /* 67353 */ "VMINMAXPHZ128rmi\000" |
| 53597 | /* 67370 */ "VPSHLDQZ128rmi\000" |
| 53598 | /* 67385 */ "VPCLMULQDQZ128rmi\000" |
| 53599 | /* 67403 */ "VPSHRDQZ128rmi\000" |
| 53600 | /* 67418 */ "VPTERNLOGQZ128rmi\000" |
| 53601 | /* 67436 */ "VALIGNQZ128rmi\000" |
| 53602 | /* 67451 */ "VPCMPQZ128rmi\000" |
| 53603 | /* 67465 */ "VPCMPUQZ128rmi\000" |
| 53604 | /* 67480 */ "VPALIGNRZ128rmi\000" |
| 53605 | /* 67496 */ "VREDUCEPSZ128rmi\000" |
| 53606 | /* 67513 */ "VRANGEPSZ128rmi\000" |
| 53607 | /* 67529 */ "VRNDSCALEPSZ128rmi\000" |
| 53608 | /* 67548 */ "VSHUFPSZ128rmi\000" |
| 53609 | /* 67563 */ "VFIXUPIMMPSZ128rmi\000" |
| 53610 | /* 67582 */ "VCMPPSZ128rmi\000" |
| 53611 | /* 67596 */ "VGETMANTPSZ128rmi\000" |
| 53612 | /* 67614 */ "VMINMAXPSZ128rmi\000" |
| 53613 | /* 67631 */ "VDBPSADBWZ128rmi\000" |
| 53614 | /* 67648 */ "VMPSADBWZ128rmi\000" |
| 53615 | /* 67664 */ "VPSHLDWZ128rmi\000" |
| 53616 | /* 67679 */ "VPSHRDWZ128rmi\000" |
| 53617 | /* 67694 */ "VPCMPWZ128rmi\000" |
| 53618 | /* 67708 */ "VPCMPUWZ128rmi\000" |
| 53619 | /* 67723 */ "VGF2P8AFFINEQBrmi\000" |
| 53620 | /* 67741 */ "VGF2P8AFFINEINVQBrmi\000" |
| 53621 | /* 67762 */ "VPINSRBrmi\000" |
| 53622 | /* 67773 */ "VPBLENDDrmi\000" |
| 53623 | /* 67785 */ "VBLENDPDrmi\000" |
| 53624 | /* 67797 */ "VSHUFPDrmi\000" |
| 53625 | /* 67808 */ "VDPPDrmi\000" |
| 53626 | /* 67817 */ "VCMPPDrmi\000" |
| 53627 | /* 67827 */ "VPINSRDrmi\000" |
| 53628 | /* 67838 */ "VCMPSDrmi\000" |
| 53629 | /* 67848 */ "VMINMAXSDrmi\000" |
| 53630 | /* 67861 */ "VMINMAXSHrmi\000" |
| 53631 | /* 67874 */ "VPCMPESTRIrmi\000" |
| 53632 | /* 67888 */ "VPCMPISTRIrmi\000" |
| 53633 | /* 67902 */ "VPCMPESTRMrmi\000" |
| 53634 | /* 67916 */ "VPCMPISTRMrmi\000" |
| 53635 | /* 67930 */ "VPCLMULQDQrmi\000" |
| 53636 | /* 67944 */ "VPINSRQrmi\000" |
| 53637 | /* 67955 */ "VPALIGNRrmi\000" |
| 53638 | /* 67967 */ "MMX_PALIGNRrmi\000" |
| 53639 | /* 67982 */ "VBLENDPSrmi\000" |
| 53640 | /* 67994 */ "VSHUFPSrmi\000" |
| 53641 | /* 68005 */ "VDPPSrmi\000" |
| 53642 | /* 68014 */ "VCMPPSrmi\000" |
| 53643 | /* 68024 */ "VINSERTPSrmi\000" |
| 53644 | /* 68037 */ "VCMPSSrmi\000" |
| 53645 | /* 68047 */ "VMINMAXSSrmi\000" |
| 53646 | /* 68060 */ "VMPSADBWrmi\000" |
| 53647 | /* 68072 */ "VPBLENDWrmi\000" |
| 53648 | /* 68084 */ "VPINSRWrmi\000" |
| 53649 | /* 68095 */ "MMX_PINSRWrmi\000" |
| 53650 | /* 68109 */ "VGF2P8AFFINEQBYrmi\000" |
| 53651 | /* 68128 */ "VGF2P8AFFINEINVQBYrmi\000" |
| 53652 | /* 68150 */ "VPBLENDDYrmi\000" |
| 53653 | /* 68163 */ "VBLENDPDYrmi\000" |
| 53654 | /* 68176 */ "VSHUFPDYrmi\000" |
| 53655 | /* 68188 */ "VCMPPDYrmi\000" |
| 53656 | /* 68199 */ "VPCLMULQDQYrmi\000" |
| 53657 | /* 68214 */ "VPALIGNRYrmi\000" |
| 53658 | /* 68227 */ "VBLENDPSYrmi\000" |
| 53659 | /* 68240 */ "VSHUFPSYrmi\000" |
| 53660 | /* 68252 */ "VDPPSYrmi\000" |
| 53661 | /* 68262 */ "VCMPPSYrmi\000" |
| 53662 | /* 68273 */ "VMPSADBWYrmi\000" |
| 53663 | /* 68286 */ "VPBLENDWYrmi\000" |
| 53664 | /* 68299 */ "VSHUFF64X2Zrmi\000" |
| 53665 | /* 68314 */ "VINSERTF64X2Zrmi\000" |
| 53666 | /* 68331 */ "VSHUFI64X2Zrmi\000" |
| 53667 | /* 68346 */ "VINSERTI64X2Zrmi\000" |
| 53668 | /* 68363 */ "VSHUFF32X4Zrmi\000" |
| 53669 | /* 68378 */ "VINSERTF32X4Zrmi\000" |
| 53670 | /* 68395 */ "VSHUFI32X4Zrmi\000" |
| 53671 | /* 68410 */ "VINSERTI32X4Zrmi\000" |
| 53672 | /* 68427 */ "VINSERTF64X4Zrmi\000" |
| 53673 | /* 68444 */ "VINSERTI64X4Zrmi\000" |
| 53674 | /* 68461 */ "VREDUCEBF16Zrmi\000" |
| 53675 | /* 68477 */ "VRNDSCALEBF16Zrmi\000" |
| 53676 | /* 68495 */ "VCMPBF16Zrmi\000" |
| 53677 | /* 68508 */ "VGETMANTBF16Zrmi\000" |
| 53678 | /* 68525 */ "VMINMAXBF16Zrmi\000" |
| 53679 | /* 68541 */ "VINSERTF32X8Zrmi\000" |
| 53680 | /* 68558 */ "VINSERTI32X8Zrmi\000" |
| 53681 | /* 68575 */ "VPCMPBZrmi\000" |
| 53682 | /* 68586 */ "VGF2P8AFFINEQBZrmi\000" |
| 53683 | /* 68605 */ "VGF2P8AFFINEINVQBZrmi\000" |
| 53684 | /* 68627 */ "VPINSRBZrmi\000" |
| 53685 | /* 68639 */ "VPCMPUBZrmi\000" |
| 53686 | /* 68651 */ "VPSHLDDZrmi\000" |
| 53687 | /* 68663 */ "VPSHRDDZrmi\000" |
| 53688 | /* 68675 */ "VPTERNLOGDZrmi\000" |
| 53689 | /* 68690 */ "VALIGNDZrmi\000" |
| 53690 | /* 68702 */ "VREDUCEPDZrmi\000" |
| 53691 | /* 68716 */ "VRANGEPDZrmi\000" |
| 53692 | /* 68729 */ "VRNDSCALEPDZrmi\000" |
| 53693 | /* 68745 */ "VSHUFPDZrmi\000" |
| 53694 | /* 68757 */ "VPCMPDZrmi\000" |
| 53695 | /* 68768 */ "VFIXUPIMMPDZrmi\000" |
| 53696 | /* 68784 */ "VCMPPDZrmi\000" |
| 53697 | /* 68795 */ "VGETMANTPDZrmi\000" |
| 53698 | /* 68810 */ "VMINMAXPDZrmi\000" |
| 53699 | /* 68824 */ "VPINSRDZrmi\000" |
| 53700 | /* 68836 */ "VREDUCESDZrmi\000" |
| 53701 | /* 68850 */ "VRANGESDZrmi\000" |
| 53702 | /* 68863 */ "VRNDSCALESDZrmi\000" |
| 53703 | /* 68879 */ "VFIXUPIMMSDZrmi\000" |
| 53704 | /* 68895 */ "VCMPSDZrmi\000" |
| 53705 | /* 68906 */ "VGETMANTSDZrmi\000" |
| 53706 | /* 68921 */ "VPCMPUDZrmi\000" |
| 53707 | /* 68933 */ "VREDUCEPHZrmi\000" |
| 53708 | /* 68947 */ "VRNDSCALEPHZrmi\000" |
| 53709 | /* 68963 */ "VCMPPHZrmi\000" |
| 53710 | /* 68974 */ "VGETMANTPHZrmi\000" |
| 53711 | /* 68989 */ "VMINMAXPHZrmi\000" |
| 53712 | /* 69003 */ "VREDUCESHZrmi\000" |
| 53713 | /* 69017 */ "VRNDSCALESHZrmi\000" |
| 53714 | /* 69033 */ "VCMPSHZrmi\000" |
| 53715 | /* 69044 */ "VGETMANTSHZrmi\000" |
| 53716 | /* 69059 */ "VPSHLDQZrmi\000" |
| 53717 | /* 69071 */ "VPCLMULQDQZrmi\000" |
| 53718 | /* 69086 */ "VPSHRDQZrmi\000" |
| 53719 | /* 69098 */ "VPTERNLOGQZrmi\000" |
| 53720 | /* 69113 */ "VALIGNQZrmi\000" |
| 53721 | /* 69125 */ "VPCMPQZrmi\000" |
| 53722 | /* 69136 */ "VPINSRQZrmi\000" |
| 53723 | /* 69148 */ "VPCMPUQZrmi\000" |
| 53724 | /* 69160 */ "VPALIGNRZrmi\000" |
| 53725 | /* 69173 */ "VREDUCEPSZrmi\000" |
| 53726 | /* 69187 */ "VRANGEPSZrmi\000" |
| 53727 | /* 69200 */ "VRNDSCALEPSZrmi\000" |
| 53728 | /* 69216 */ "VSHUFPSZrmi\000" |
| 53729 | /* 69228 */ "VFIXUPIMMPSZrmi\000" |
| 53730 | /* 69244 */ "VCMPPSZrmi\000" |
| 53731 | /* 69255 */ "VGETMANTPSZrmi\000" |
| 53732 | /* 69270 */ "VINSERTPSZrmi\000" |
| 53733 | /* 69284 */ "VMINMAXPSZrmi\000" |
| 53734 | /* 69298 */ "VREDUCESSZrmi\000" |
| 53735 | /* 69312 */ "VRANGESSZrmi\000" |
| 53736 | /* 69325 */ "VRNDSCALESSZrmi\000" |
| 53737 | /* 69341 */ "VFIXUPIMMSSZrmi\000" |
| 53738 | /* 69357 */ "VCMPSSZrmi\000" |
| 53739 | /* 69368 */ "VGETMANTSSZrmi\000" |
| 53740 | /* 69383 */ "VDBPSADBWZrmi\000" |
| 53741 | /* 69397 */ "VMPSADBWZrmi\000" |
| 53742 | /* 69410 */ "VPSHLDWZrmi\000" |
| 53743 | /* 69422 */ "VPSHRDWZrmi\000" |
| 53744 | /* 69434 */ "VPCMPWZrmi\000" |
| 53745 | /* 69445 */ "VPINSRWZrmi\000" |
| 53746 | /* 69457 */ "VPCMPUWZrmi\000" |
| 53747 | /* 69469 */ "SBB32ri\000" |
| 53748 | /* 69477 */ "SUB32ri\000" |
| 53749 | /* 69485 */ "ADC32ri\000" |
| 53750 | /* 69493 */ "ADD32ri\000" |
| 53751 | /* 69501 */ "AND32ri\000" |
| 53752 | /* 69509 */ "BEXTRI32ri\000" |
| 53753 | /* 69520 */ "RCL32ri\000" |
| 53754 | /* 69528 */ "SHL32ri\000" |
| 53755 | /* 69536 */ "ROL32ri\000" |
| 53756 | /* 69544 */ "IN32ri\000" |
| 53757 | /* 69551 */ "CCMP32ri\000" |
| 53758 | /* 69560 */ "SAR32ri\000" |
| 53759 | /* 69568 */ "RCR32ri\000" |
| 53760 | /* 69576 */ "SHR32ri\000" |
| 53761 | /* 69584 */ "ROR32ri\000" |
| 53762 | /* 69592 */ "XOR32ri\000" |
| 53763 | /* 69600 */ "SHLDROT32ri\000" |
| 53764 | /* 69612 */ "SHRDROT32ri\000" |
| 53765 | /* 69624 */ "CTEST32ri\000" |
| 53766 | /* 69634 */ "MOV32ri\000" |
| 53767 | /* 69642 */ "RORX32ri\000" |
| 53768 | /* 69651 */ "BEXTRI64ri\000" |
| 53769 | /* 69662 */ "RCL64ri\000" |
| 53770 | /* 69670 */ "SHL64ri\000" |
| 53771 | /* 69678 */ "ROL64ri\000" |
| 53772 | /* 69686 */ "SAR64ri\000" |
| 53773 | /* 69694 */ "RCR64ri\000" |
| 53774 | /* 69702 */ "SHR64ri\000" |
| 53775 | /* 69710 */ "ROR64ri\000" |
| 53776 | /* 69718 */ "SHLDROT64ri\000" |
| 53777 | /* 69730 */ "SHRDROT64ri\000" |
| 53778 | /* 69742 */ "MOV64ri\000" |
| 53779 | /* 69750 */ "RORX64ri\000" |
| 53780 | /* 69759 */ "SBB16ri\000" |
| 53781 | /* 69767 */ "SUB16ri\000" |
| 53782 | /* 69775 */ "ADC16ri\000" |
| 53783 | /* 69783 */ "ADD16ri\000" |
| 53784 | /* 69791 */ "AND16ri\000" |
| 53785 | /* 69799 */ "RCL16ri\000" |
| 53786 | /* 69807 */ "SHL16ri\000" |
| 53787 | /* 69815 */ "ROL16ri\000" |
| 53788 | /* 69823 */ "IN16ri\000" |
| 53789 | /* 69830 */ "CCMP16ri\000" |
| 53790 | /* 69839 */ "SAR16ri\000" |
| 53791 | /* 69847 */ "RCR16ri\000" |
| 53792 | /* 69855 */ "SHR16ri\000" |
| 53793 | /* 69863 */ "ROR16ri\000" |
| 53794 | /* 69871 */ "XOR16ri\000" |
| 53795 | /* 69879 */ "CTEST16ri\000" |
| 53796 | /* 69889 */ "MOV16ri\000" |
| 53797 | /* 69897 */ "VFPCLASSBF16Z256ri\000" |
| 53798 | /* 69916 */ "VPSRADZ256ri\000" |
| 53799 | /* 69929 */ "VPSHUFDZ256ri\000" |
| 53800 | /* 69943 */ "VPSLLDZ256ri\000" |
| 53801 | /* 69956 */ "VPROLDZ256ri\000" |
| 53802 | /* 69969 */ "VPSRLDZ256ri\000" |
| 53803 | /* 69982 */ "VPERMILPDZ256ri\000" |
| 53804 | /* 69998 */ "VPERMPDZ256ri\000" |
| 53805 | /* 70012 */ "VFPCLASSPDZ256ri\000" |
| 53806 | /* 70029 */ "VPRORDZ256ri\000" |
| 53807 | /* 70042 */ "VFPCLASSPHZ256ri\000" |
| 53808 | /* 70059 */ "VPSRAQZ256ri\000" |
| 53809 | /* 70072 */ "VPSLLDQZ256ri\000" |
| 53810 | /* 70086 */ "VPSRLDQZ256ri\000" |
| 53811 | /* 70100 */ "VPSLLQZ256ri\000" |
| 53812 | /* 70113 */ "VPROLQZ256ri\000" |
| 53813 | /* 70126 */ "VPSRLQZ256ri\000" |
| 53814 | /* 70139 */ "VPERMQZ256ri\000" |
| 53815 | /* 70152 */ "VPRORQZ256ri\000" |
| 53816 | /* 70165 */ "VPERMILPSZ256ri\000" |
| 53817 | /* 70181 */ "VFPCLASSPSZ256ri\000" |
| 53818 | /* 70198 */ "VPSRAWZ256ri\000" |
| 53819 | /* 70211 */ "VPSHUFHWZ256ri\000" |
| 53820 | /* 70226 */ "VPSHUFLWZ256ri\000" |
| 53821 | /* 70241 */ "VPSLLWZ256ri\000" |
| 53822 | /* 70254 */ "VPSRLWZ256ri\000" |
| 53823 | /* 70267 */ "VFPCLASSBF16Z128ri\000" |
| 53824 | /* 70286 */ "VPSRADZ128ri\000" |
| 53825 | /* 70299 */ "VPSHUFDZ128ri\000" |
| 53826 | /* 70313 */ "VPSLLDZ128ri\000" |
| 53827 | /* 70326 */ "VPROLDZ128ri\000" |
| 53828 | /* 70339 */ "VPSRLDZ128ri\000" |
| 53829 | /* 70352 */ "VPERMILPDZ128ri\000" |
| 53830 | /* 70368 */ "VFPCLASSPDZ128ri\000" |
| 53831 | /* 70385 */ "VPRORDZ128ri\000" |
| 53832 | /* 70398 */ "VFPCLASSPHZ128ri\000" |
| 53833 | /* 70415 */ "VPSRAQZ128ri\000" |
| 53834 | /* 70428 */ "VPSLLDQZ128ri\000" |
| 53835 | /* 70442 */ "VPSRLDQZ128ri\000" |
| 53836 | /* 70456 */ "VPSLLQZ128ri\000" |
| 53837 | /* 70469 */ "VPROLQZ128ri\000" |
| 53838 | /* 70482 */ "VPSRLQZ128ri\000" |
| 53839 | /* 70495 */ "VPRORQZ128ri\000" |
| 53840 | /* 70508 */ "VPERMILPSZ128ri\000" |
| 53841 | /* 70524 */ "VFPCLASSPSZ128ri\000" |
| 53842 | /* 70541 */ "VPSRAWZ128ri\000" |
| 53843 | /* 70554 */ "VPSHUFHWZ128ri\000" |
| 53844 | /* 70569 */ "VPSHUFLWZ128ri\000" |
| 53845 | /* 70584 */ "VPSLLWZ128ri\000" |
| 53846 | /* 70597 */ "VPSRLWZ128ri\000" |
| 53847 | /* 70610 */ "SBB8ri\000" |
| 53848 | /* 70617 */ "SUB8ri\000" |
| 53849 | /* 70624 */ "ADC8ri\000" |
| 53850 | /* 70631 */ "ADD8ri\000" |
| 53851 | /* 70638 */ "AND8ri\000" |
| 53852 | /* 70645 */ "RCL8ri\000" |
| 53853 | /* 70652 */ "SHL8ri\000" |
| 53854 | /* 70659 */ "ROL8ri\000" |
| 53855 | /* 70666 */ "IN8ri\000" |
| 53856 | /* 70672 */ "CCMP8ri\000" |
| 53857 | /* 70680 */ "SAR8ri\000" |
| 53858 | /* 70687 */ "RCR8ri\000" |
| 53859 | /* 70694 */ "SHR8ri\000" |
| 53860 | /* 70701 */ "ROR8ri\000" |
| 53861 | /* 70708 */ "XOR8ri\000" |
| 53862 | /* 70715 */ "CTEST8ri\000" |
| 53863 | /* 70724 */ "MOV8ri\000" |
| 53864 | /* 70731 */ "VPCOMBri\000" |
| 53865 | /* 70740 */ "VPROTBri\000" |
| 53866 | /* 70749 */ "VPCOMUBri\000" |
| 53867 | /* 70759 */ "VPSRADri\000" |
| 53868 | /* 70768 */ "MMX_PSRADri\000" |
| 53869 | /* 70780 */ "VPSHUFDri\000" |
| 53870 | /* 70790 */ "VPSLLDri\000" |
| 53871 | /* 70799 */ "MMX_PSLLDri\000" |
| 53872 | /* 70811 */ "VPSRLDri\000" |
| 53873 | /* 70820 */ "MMX_PSRLDri\000" |
| 53874 | /* 70832 */ "VPCOMDri\000" |
| 53875 | /* 70841 */ "VROUNDPDri\000" |
| 53876 | /* 70852 */ "VPERMILPDri\000" |
| 53877 | /* 70864 */ "VROUNDSDri\000" |
| 53878 | /* 70875 */ "VPROTDri\000" |
| 53879 | /* 70884 */ "VPCOMUDri\000" |
| 53880 | /* 70894 */ "TCRETURNri\000" |
| 53881 | /* 70905 */ "VPSLLDQri\000" |
| 53882 | /* 70915 */ "VPSRLDQri\000" |
| 53883 | /* 70925 */ "VPSLLQri\000" |
| 53884 | /* 70934 */ "MMX_PSLLQri\000" |
| 53885 | /* 70946 */ "VPSRLQri\000" |
| 53886 | /* 70955 */ "MMX_PSRLQri\000" |
| 53887 | /* 70967 */ "VPCOMQri\000" |
| 53888 | /* 70976 */ "VPROTQri\000" |
| 53889 | /* 70985 */ "VPCOMUQri\000" |
| 53890 | /* 70995 */ "URDMSRri\000" |
| 53891 | /* 71004 */ "VROUNDPSri\000" |
| 53892 | /* 71015 */ "VPERMILPSri\000" |
| 53893 | /* 71027 */ "VROUNDSSri\000" |
| 53894 | /* 71038 */ "VPSRAWri\000" |
| 53895 | /* 71047 */ "MMX_PSRAWri\000" |
| 53896 | /* 71059 */ "MMX_PSHUFWri\000" |
| 53897 | /* 71072 */ "VPSHUFHWri\000" |
| 53898 | /* 71083 */ "VPSHUFLWri\000" |
| 53899 | /* 71094 */ "VPSLLWri\000" |
| 53900 | /* 71103 */ "MMX_PSLLWri\000" |
| 53901 | /* 71115 */ "VPSRLWri\000" |
| 53902 | /* 71124 */ "MMX_PSRLWri\000" |
| 53903 | /* 71136 */ "VPCOMWri\000" |
| 53904 | /* 71145 */ "VPROTWri\000" |
| 53905 | /* 71154 */ "VPCOMUWri\000" |
| 53906 | /* 71164 */ "VPSRADYri\000" |
| 53907 | /* 71174 */ "VPSHUFDYri\000" |
| 53908 | /* 71185 */ "VPSLLDYri\000" |
| 53909 | /* 71195 */ "VPSRLDYri\000" |
| 53910 | /* 71205 */ "VROUNDPDYri\000" |
| 53911 | /* 71217 */ "VPERMILPDYri\000" |
| 53912 | /* 71230 */ "VPERMPDYri\000" |
| 53913 | /* 71241 */ "VPSLLDQYri\000" |
| 53914 | /* 71252 */ "VPSRLDQYri\000" |
| 53915 | /* 71263 */ "VPSLLQYri\000" |
| 53916 | /* 71273 */ "VPSRLQYri\000" |
| 53917 | /* 71283 */ "VPERMQYri\000" |
| 53918 | /* 71293 */ "VROUNDPSYri\000" |
| 53919 | /* 71305 */ "VPERMILPSYri\000" |
| 53920 | /* 71318 */ "VPSRAWYri\000" |
| 53921 | /* 71328 */ "VPSHUFHWYri\000" |
| 53922 | /* 71340 */ "VPSHUFLWYri\000" |
| 53923 | /* 71352 */ "VPSLLWYri\000" |
| 53924 | /* 71362 */ "VPSRLWYri\000" |
| 53925 | /* 71372 */ "VFPCLASSBF16Zri\000" |
| 53926 | /* 71388 */ "VPSRADZri\000" |
| 53927 | /* 71398 */ "VPSHUFDZri\000" |
| 53928 | /* 71409 */ "VPSLLDZri\000" |
| 53929 | /* 71419 */ "VPROLDZri\000" |
| 53930 | /* 71429 */ "VPSRLDZri\000" |
| 53931 | /* 71439 */ "VPERMILPDZri\000" |
| 53932 | /* 71452 */ "VPERMPDZri\000" |
| 53933 | /* 71463 */ "VFPCLASSPDZri\000" |
| 53934 | /* 71477 */ "VPRORDZri\000" |
| 53935 | /* 71487 */ "VFPCLASSSDZri\000" |
| 53936 | /* 71501 */ "VFPCLASSPHZri\000" |
| 53937 | /* 71515 */ "VFPCLASSSHZri\000" |
| 53938 | /* 71529 */ "VPSRAQZri\000" |
| 53939 | /* 71539 */ "VPSLLDQZri\000" |
| 53940 | /* 71550 */ "VPSRLDQZri\000" |
| 53941 | /* 71561 */ "VPSLLQZri\000" |
| 53942 | /* 71571 */ "VPROLQZri\000" |
| 53943 | /* 71581 */ "VPSRLQZri\000" |
| 53944 | /* 71591 */ "VPERMQZri\000" |
| 53945 | /* 71601 */ "VPRORQZri\000" |
| 53946 | /* 71611 */ "VPERMILPSZri\000" |
| 53947 | /* 71624 */ "VFPCLASSPSZri\000" |
| 53948 | /* 71638 */ "VFPCLASSSSZri\000" |
| 53949 | /* 71652 */ "VPSRAWZri\000" |
| 53950 | /* 71662 */ "VPSHUFHWZri\000" |
| 53951 | /* 71674 */ "VPSHUFLWZri\000" |
| 53952 | /* 71686 */ "VPSLLWZri\000" |
| 53953 | /* 71696 */ "VPSRLWZri\000" |
| 53954 | /* 71706 */ "VEXTRACTF64X2Z256mri\000" |
| 53955 | /* 71727 */ "VEXTRACTI64X2Z256mri\000" |
| 53956 | /* 71748 */ "VEXTRACTF32X4Z256mri\000" |
| 53957 | /* 71769 */ "VEXTRACTI32X4Z256mri\000" |
| 53958 | /* 71790 */ "VEXTRACTF128mri\000" |
| 53959 | /* 71806 */ "VEXTRACTI128mri\000" |
| 53960 | /* 71822 */ "VPEXTRBmri\000" |
| 53961 | /* 71833 */ "VPEXTRDmri\000" |
| 53962 | /* 71844 */ "VPEXTRQmri\000" |
| 53963 | /* 71855 */ "VEXTRACTPSmri\000" |
| 53964 | /* 71869 */ "VPEXTRWmri\000" |
| 53965 | /* 71880 */ "VEXTRACTF64X2Zmri\000" |
| 53966 | /* 71898 */ "VEXTRACTI64X2Zmri\000" |
| 53967 | /* 71916 */ "VEXTRACTF32X4Zmri\000" |
| 53968 | /* 71934 */ "VEXTRACTI32X4Zmri\000" |
| 53969 | /* 71952 */ "VEXTRACTF64X4Zmri\000" |
| 53970 | /* 71970 */ "VEXTRACTI64X4Zmri\000" |
| 53971 | /* 71988 */ "VEXTRACTF32X8Zmri\000" |
| 53972 | /* 72006 */ "VEXTRACTI32X8Zmri\000" |
| 53973 | /* 72024 */ "VPEXTRBZmri\000" |
| 53974 | /* 72036 */ "VPEXTRDZmri\000" |
| 53975 | /* 72048 */ "VPEXTRQZmri\000" |
| 53976 | /* 72060 */ "VEXTRACTPSZmri\000" |
| 53977 | /* 72075 */ "VPEXTRWZmri\000" |
| 53978 | /* 72087 */ "LWPVAL32rri\000" |
| 53979 | /* 72099 */ "IMUL32rri\000" |
| 53980 | /* 72109 */ "LWPINS32rri\000" |
| 53981 | /* 72121 */ "IMULZU32rri\000" |
| 53982 | /* 72133 */ "VSM3RNDS2rri\000" |
| 53983 | /* 72146 */ "LWPVAL64rri\000" |
| 53984 | /* 72158 */ "LWPINS64rri\000" |
| 53985 | /* 72170 */ "SHA1RNDS4rri\000" |
| 53986 | /* 72183 */ "IMUL16rri\000" |
| 53987 | /* 72193 */ "IMULZU16rri\000" |
| 53988 | /* 72205 */ "VSHUFF64X2Z256rri\000" |
| 53989 | /* 72223 */ "VEXTRACTF64X2Z256rri\000" |
| 53990 | /* 72244 */ "VINSERTF64X2Z256rri\000" |
| 53991 | /* 72264 */ "VSHUFI64X2Z256rri\000" |
| 53992 | /* 72282 */ "VEXTRACTI64X2Z256rri\000" |
| 53993 | /* 72303 */ "VINSERTI64X2Z256rri\000" |
| 53994 | /* 72323 */ "VSHUFF32X4Z256rri\000" |
| 53995 | /* 72341 */ "VEXTRACTF32X4Z256rri\000" |
| 53996 | /* 72362 */ "VINSERTF32X4Z256rri\000" |
| 53997 | /* 72382 */ "VSHUFI32X4Z256rri\000" |
| 53998 | /* 72400 */ "VEXTRACTI32X4Z256rri\000" |
| 53999 | /* 72421 */ "VINSERTI32X4Z256rri\000" |
| 54000 | /* 72441 */ "VREDUCEBF16Z256rri\000" |
| 54001 | /* 72460 */ "VRNDSCALEBF16Z256rri\000" |
| 54002 | /* 72481 */ "VCMPBF16Z256rri\000" |
| 54003 | /* 72497 */ "VGETMANTBF16Z256rri\000" |
| 54004 | /* 72517 */ "VMINMAXBF16Z256rri\000" |
| 54005 | /* 72536 */ "VPCMPBZ256rri\000" |
| 54006 | /* 72550 */ "VGF2P8AFFINEQBZ256rri\000" |
| 54007 | /* 72572 */ "VGF2P8AFFINEINVQBZ256rri\000" |
| 54008 | /* 72597 */ "VPCMPUBZ256rri\000" |
| 54009 | /* 72612 */ "VPSHLDDZ256rri\000" |
| 54010 | /* 72627 */ "VPSHRDDZ256rri\000" |
| 54011 | /* 72642 */ "VPTERNLOGDZ256rri\000" |
| 54012 | /* 72660 */ "VALIGNDZ256rri\000" |
| 54013 | /* 72675 */ "VREDUCEPDZ256rri\000" |
| 54014 | /* 72692 */ "VRANGEPDZ256rri\000" |
| 54015 | /* 72708 */ "VRNDSCALEPDZ256rri\000" |
| 54016 | /* 72727 */ "VSHUFPDZ256rri\000" |
| 54017 | /* 72742 */ "VPCMPDZ256rri\000" |
| 54018 | /* 72756 */ "VFIXUPIMMPDZ256rri\000" |
| 54019 | /* 72775 */ "VCMPPDZ256rri\000" |
| 54020 | /* 72789 */ "VGETMANTPDZ256rri\000" |
| 54021 | /* 72807 */ "VMINMAXPDZ256rri\000" |
| 54022 | /* 72824 */ "VPCMPUDZ256rri\000" |
| 54023 | /* 72839 */ "VREDUCEPHZ256rri\000" |
| 54024 | /* 72856 */ "VRNDSCALEPHZ256rri\000" |
| 54025 | /* 72875 */ "VCMPPHZ256rri\000" |
| 54026 | /* 72889 */ "VGETMANTPHZ256rri\000" |
| 54027 | /* 72907 */ "VMINMAXPHZ256rri\000" |
| 54028 | /* 72924 */ "VPSHLDQZ256rri\000" |
| 54029 | /* 72939 */ "VPCLMULQDQZ256rri\000" |
| 54030 | /* 72957 */ "VPSHRDQZ256rri\000" |
| 54031 | /* 72972 */ "VPTERNLOGQZ256rri\000" |
| 54032 | /* 72990 */ "VALIGNQZ256rri\000" |
| 54033 | /* 73005 */ "VPCMPQZ256rri\000" |
| 54034 | /* 73019 */ "VPCMPUQZ256rri\000" |
| 54035 | /* 73034 */ "VPALIGNRZ256rri\000" |
| 54036 | /* 73050 */ "VREDUCEPSZ256rri\000" |
| 54037 | /* 73067 */ "VRANGEPSZ256rri\000" |
| 54038 | /* 73083 */ "VRNDSCALEPSZ256rri\000" |
| 54039 | /* 73102 */ "VSHUFPSZ256rri\000" |
| 54040 | /* 73117 */ "VFIXUPIMMPSZ256rri\000" |
| 54041 | /* 73136 */ "VCMPPSZ256rri\000" |
| 54042 | /* 73150 */ "VGETMANTPSZ256rri\000" |
| 54043 | /* 73168 */ "VMINMAXPSZ256rri\000" |
| 54044 | /* 73185 */ "VDBPSADBWZ256rri\000" |
| 54045 | /* 73202 */ "VMPSADBWZ256rri\000" |
| 54046 | /* 73218 */ "VPSHLDWZ256rri\000" |
| 54047 | /* 73233 */ "VPSHRDWZ256rri\000" |
| 54048 | /* 73248 */ "VPCMPWZ256rri\000" |
| 54049 | /* 73262 */ "VPCMPUWZ256rri\000" |
| 54050 | /* 73277 */ "VPERM2F128rri\000" |
| 54051 | /* 73291 */ "VEXTRACTF128rri\000" |
| 54052 | /* 73307 */ "VINSERTF128rri\000" |
| 54053 | /* 73322 */ "VPERM2I128rri\000" |
| 54054 | /* 73336 */ "VEXTRACTI128rri\000" |
| 54055 | /* 73352 */ "VINSERTI128rri\000" |
| 54056 | /* 73367 */ "VREDUCEBF16Z128rri\000" |
| 54057 | /* 73386 */ "VRNDSCALEBF16Z128rri\000" |
| 54058 | /* 73407 */ "VCMPBF16Z128rri\000" |
| 54059 | /* 73423 */ "VGETMANTBF16Z128rri\000" |
| 54060 | /* 73443 */ "VMINMAXBF16Z128rri\000" |
| 54061 | /* 73462 */ "VPCMPBZ128rri\000" |
| 54062 | /* 73476 */ "VGF2P8AFFINEQBZ128rri\000" |
| 54063 | /* 73498 */ "VGF2P8AFFINEINVQBZ128rri\000" |
| 54064 | /* 73523 */ "VPCMPUBZ128rri\000" |
| 54065 | /* 73538 */ "VPSHLDDZ128rri\000" |
| 54066 | /* 73553 */ "VPSHRDDZ128rri\000" |
| 54067 | /* 73568 */ "VPTERNLOGDZ128rri\000" |
| 54068 | /* 73586 */ "VALIGNDZ128rri\000" |
| 54069 | /* 73601 */ "VREDUCEPDZ128rri\000" |
| 54070 | /* 73618 */ "VRANGEPDZ128rri\000" |
| 54071 | /* 73634 */ "VRNDSCALEPDZ128rri\000" |
| 54072 | /* 73653 */ "VSHUFPDZ128rri\000" |
| 54073 | /* 73668 */ "VPCMPDZ128rri\000" |
| 54074 | /* 73682 */ "VFIXUPIMMPDZ128rri\000" |
| 54075 | /* 73701 */ "VCMPPDZ128rri\000" |
| 54076 | /* 73715 */ "VGETMANTPDZ128rri\000" |
| 54077 | /* 73733 */ "VMINMAXPDZ128rri\000" |
| 54078 | /* 73750 */ "VPCMPUDZ128rri\000" |
| 54079 | /* 73765 */ "VREDUCEPHZ128rri\000" |
| 54080 | /* 73782 */ "VRNDSCALEPHZ128rri\000" |
| 54081 | /* 73801 */ "VCMPPHZ128rri\000" |
| 54082 | /* 73815 */ "VGETMANTPHZ128rri\000" |
| 54083 | /* 73833 */ "VMINMAXPHZ128rri\000" |
| 54084 | /* 73850 */ "VPSHLDQZ128rri\000" |
| 54085 | /* 73865 */ "VPCLMULQDQZ128rri\000" |
| 54086 | /* 73883 */ "VPSHRDQZ128rri\000" |
| 54087 | /* 73898 */ "VPTERNLOGQZ128rri\000" |
| 54088 | /* 73916 */ "VALIGNQZ128rri\000" |
| 54089 | /* 73931 */ "VPCMPQZ128rri\000" |
| 54090 | /* 73945 */ "VPCMPUQZ128rri\000" |
| 54091 | /* 73960 */ "VPALIGNRZ128rri\000" |
| 54092 | /* 73976 */ "VREDUCEPSZ128rri\000" |
| 54093 | /* 73993 */ "VRANGEPSZ128rri\000" |
| 54094 | /* 74009 */ "VRNDSCALEPSZ128rri\000" |
| 54095 | /* 74028 */ "VSHUFPSZ128rri\000" |
| 54096 | /* 74043 */ "VFIXUPIMMPSZ128rri\000" |
| 54097 | /* 74062 */ "VCMPPSZ128rri\000" |
| 54098 | /* 74076 */ "VGETMANTPSZ128rri\000" |
| 54099 | /* 74094 */ "VMINMAXPSZ128rri\000" |
| 54100 | /* 74111 */ "VDBPSADBWZ128rri\000" |
| 54101 | /* 74128 */ "VMPSADBWZ128rri\000" |
| 54102 | /* 74144 */ "VPSHLDWZ128rri\000" |
| 54103 | /* 74159 */ "VPSHRDWZ128rri\000" |
| 54104 | /* 74174 */ "VPCMPWZ128rri\000" |
| 54105 | /* 74188 */ "VPCMPUWZ128rri\000" |
| 54106 | /* 74203 */ "VGF2P8AFFINEQBrri\000" |
| 54107 | /* 74221 */ "VGF2P8AFFINEINVQBrri\000" |
| 54108 | /* 74242 */ "VPINSRBrri\000" |
| 54109 | /* 74253 */ "VPEXTRBrri\000" |
| 54110 | /* 74264 */ "VPBLENDDrri\000" |
| 54111 | /* 74276 */ "VBLENDPDrri\000" |
| 54112 | /* 74288 */ "VSHUFPDrri\000" |
| 54113 | /* 74299 */ "VDPPDrri\000" |
| 54114 | /* 74308 */ "VCMPPDrri\000" |
| 54115 | /* 74318 */ "VPINSRDrri\000" |
| 54116 | /* 74329 */ "VPEXTRDrri\000" |
| 54117 | /* 74340 */ "VCMPSDrri\000" |
| 54118 | /* 74350 */ "VMINMAXSDrri\000" |
| 54119 | /* 74363 */ "PTCVTROWPS2BF16Hrri\000" |
| 54120 | /* 74383 */ "PTCVTROWPS2PHHrri\000" |
| 54121 | /* 74401 */ "VMINMAXSHrri\000" |
| 54122 | /* 74414 */ "VPCMPESTRIrri\000" |
| 54123 | /* 74428 */ "VPCMPISTRIrri\000" |
| 54124 | /* 74442 */ "PTCVTROWPS2BF16Lrri\000" |
| 54125 | /* 74462 */ "PTCVTROWPS2PHLrri\000" |
| 54126 | /* 74480 */ "VPCMPESTRMrri\000" |
| 54127 | /* 74494 */ "VPCMPISTRMrri\000" |
| 54128 | /* 74508 */ "VPCLMULQDQrri\000" |
| 54129 | /* 74522 */ "VPINSRQrri\000" |
| 54130 | /* 74533 */ "VPEXTRQrri\000" |
| 54131 | /* 74544 */ "VPALIGNRrri\000" |
| 54132 | /* 74556 */ "MMX_PALIGNRrri\000" |
| 54133 | /* 74571 */ "PTCVTROWD2PSrri\000" |
| 54134 | /* 74587 */ "VBLENDPSrri\000" |
| 54135 | /* 74599 */ "VSHUFPSrri\000" |
| 54136 | /* 74610 */ "VDPPSrri\000" |
| 54137 | /* 74619 */ "VCMPPSrri\000" |
| 54138 | /* 74629 */ "VEXTRACTPSrri\000" |
| 54139 | /* 74643 */ "VINSERTPSrri\000" |
| 54140 | /* 74656 */ "VCMPSSrri\000" |
| 54141 | /* 74666 */ "VMINMAXSSrri\000" |
| 54142 | /* 74679 */ "VMPSADBWrri\000" |
| 54143 | /* 74691 */ "VPBLENDWrri\000" |
| 54144 | /* 74703 */ "PTILEMOVROWrri\000" |
| 54145 | /* 74718 */ "VPINSRWrri\000" |
| 54146 | /* 74729 */ "MMX_PINSRWrri\000" |
| 54147 | /* 74743 */ "VPEXTRWrri\000" |
| 54148 | /* 74754 */ "MMX_PEXTRWrri\000" |
| 54149 | /* 74768 */ "VGF2P8AFFINEQBYrri\000" |
| 54150 | /* 74787 */ "VGF2P8AFFINEINVQBYrri\000" |
| 54151 | /* 74809 */ "VPBLENDDYrri\000" |
| 54152 | /* 74822 */ "VBLENDPDYrri\000" |
| 54153 | /* 74835 */ "VSHUFPDYrri\000" |
| 54154 | /* 74847 */ "VCMPPDYrri\000" |
| 54155 | /* 74858 */ "VPCLMULQDQYrri\000" |
| 54156 | /* 74873 */ "VPALIGNRYrri\000" |
| 54157 | /* 74886 */ "VBLENDPSYrri\000" |
| 54158 | /* 74899 */ "VSHUFPSYrri\000" |
| 54159 | /* 74911 */ "VDPPSYrri\000" |
| 54160 | /* 74921 */ "VCMPPSYrri\000" |
| 54161 | /* 74932 */ "VMPSADBWYrri\000" |
| 54162 | /* 74945 */ "VPBLENDWYrri\000" |
| 54163 | /* 74958 */ "VSHUFF64X2Zrri\000" |
| 54164 | /* 74973 */ "VEXTRACTF64X2Zrri\000" |
| 54165 | /* 74991 */ "VINSERTF64X2Zrri\000" |
| 54166 | /* 75008 */ "VSHUFI64X2Zrri\000" |
| 54167 | /* 75023 */ "VEXTRACTI64X2Zrri\000" |
| 54168 | /* 75041 */ "VINSERTI64X2Zrri\000" |
| 54169 | /* 75058 */ "VSHUFF32X4Zrri\000" |
| 54170 | /* 75073 */ "VEXTRACTF32X4Zrri\000" |
| 54171 | /* 75091 */ "VINSERTF32X4Zrri\000" |
| 54172 | /* 75108 */ "VSHUFI32X4Zrri\000" |
| 54173 | /* 75123 */ "VEXTRACTI32X4Zrri\000" |
| 54174 | /* 75141 */ "VINSERTI32X4Zrri\000" |
| 54175 | /* 75158 */ "VEXTRACTF64X4Zrri\000" |
| 54176 | /* 75176 */ "VINSERTF64X4Zrri\000" |
| 54177 | /* 75193 */ "VEXTRACTI64X4Zrri\000" |
| 54178 | /* 75211 */ "VINSERTI64X4Zrri\000" |
| 54179 | /* 75228 */ "VREDUCEBF16Zrri\000" |
| 54180 | /* 75244 */ "VRNDSCALEBF16Zrri\000" |
| 54181 | /* 75262 */ "VCMPBF16Zrri\000" |
| 54182 | /* 75275 */ "VGETMANTBF16Zrri\000" |
| 54183 | /* 75292 */ "VMINMAXBF16Zrri\000" |
| 54184 | /* 75308 */ "VEXTRACTF32X8Zrri\000" |
| 54185 | /* 75326 */ "VINSERTF32X8Zrri\000" |
| 54186 | /* 75343 */ "VEXTRACTI32X8Zrri\000" |
| 54187 | /* 75361 */ "VINSERTI32X8Zrri\000" |
| 54188 | /* 75378 */ "VPCMPBZrri\000" |
| 54189 | /* 75389 */ "VGF2P8AFFINEQBZrri\000" |
| 54190 | /* 75408 */ "VGF2P8AFFINEINVQBZrri\000" |
| 54191 | /* 75430 */ "VPINSRBZrri\000" |
| 54192 | /* 75442 */ "VPEXTRBZrri\000" |
| 54193 | /* 75454 */ "VPCMPUBZrri\000" |
| 54194 | /* 75466 */ "VPSHLDDZrri\000" |
| 54195 | /* 75478 */ "VPSHRDDZrri\000" |
| 54196 | /* 75490 */ "VPTERNLOGDZrri\000" |
| 54197 | /* 75505 */ "VALIGNDZrri\000" |
| 54198 | /* 75517 */ "VREDUCEPDZrri\000" |
| 54199 | /* 75531 */ "VRANGEPDZrri\000" |
| 54200 | /* 75544 */ "VRNDSCALEPDZrri\000" |
| 54201 | /* 75560 */ "VSHUFPDZrri\000" |
| 54202 | /* 75572 */ "VPCMPDZrri\000" |
| 54203 | /* 75583 */ "VFIXUPIMMPDZrri\000" |
| 54204 | /* 75599 */ "VCMPPDZrri\000" |
| 54205 | /* 75610 */ "VGETMANTPDZrri\000" |
| 54206 | /* 75625 */ "VMINMAXPDZrri\000" |
| 54207 | /* 75639 */ "VPINSRDZrri\000" |
| 54208 | /* 75651 */ "VPEXTRDZrri\000" |
| 54209 | /* 75663 */ "VREDUCESDZrri\000" |
| 54210 | /* 75677 */ "VRANGESDZrri\000" |
| 54211 | /* 75690 */ "VRNDSCALESDZrri\000" |
| 54212 | /* 75706 */ "VFIXUPIMMSDZrri\000" |
| 54213 | /* 75722 */ "VCMPSDZrri\000" |
| 54214 | /* 75733 */ "VGETMANTSDZrri\000" |
| 54215 | /* 75748 */ "VPCMPUDZrri\000" |
| 54216 | /* 75760 */ "VREDUCEPHZrri\000" |
| 54217 | /* 75774 */ "VRNDSCALEPHZrri\000" |
| 54218 | /* 75790 */ "VCMPPHZrri\000" |
| 54219 | /* 75801 */ "VGETMANTPHZrri\000" |
| 54220 | /* 75816 */ "VMINMAXPHZrri\000" |
| 54221 | /* 75830 */ "VREDUCESHZrri\000" |
| 54222 | /* 75844 */ "VRNDSCALESHZrri\000" |
| 54223 | /* 75860 */ "VCMPSHZrri\000" |
| 54224 | /* 75871 */ "VGETMANTSHZrri\000" |
| 54225 | /* 75886 */ "VPSHLDQZrri\000" |
| 54226 | /* 75898 */ "VPCLMULQDQZrri\000" |
| 54227 | /* 75913 */ "VPSHRDQZrri\000" |
| 54228 | /* 75925 */ "VPTERNLOGQZrri\000" |
| 54229 | /* 75940 */ "VALIGNQZrri\000" |
| 54230 | /* 75952 */ "VPCMPQZrri\000" |
| 54231 | /* 75963 */ "VPINSRQZrri\000" |
| 54232 | /* 75975 */ "VPEXTRQZrri\000" |
| 54233 | /* 75987 */ "VPCMPUQZrri\000" |
| 54234 | /* 75999 */ "VPALIGNRZrri\000" |
| 54235 | /* 76012 */ "VREDUCEPSZrri\000" |
| 54236 | /* 76026 */ "VRANGEPSZrri\000" |
| 54237 | /* 76039 */ "VRNDSCALEPSZrri\000" |
| 54238 | /* 76055 */ "VSHUFPSZrri\000" |
| 54239 | /* 76067 */ "VFIXUPIMMPSZrri\000" |
| 54240 | /* 76083 */ "VCMPPSZrri\000" |
| 54241 | /* 76094 */ "VEXTRACTPSZrri\000" |
| 54242 | /* 76109 */ "VGETMANTPSZrri\000" |
| 54243 | /* 76124 */ "VINSERTPSZrri\000" |
| 54244 | /* 76138 */ "VMINMAXPSZrri\000" |
| 54245 | /* 76152 */ "VREDUCESSZrri\000" |
| 54246 | /* 76166 */ "VRANGESSZrri\000" |
| 54247 | /* 76179 */ "VRNDSCALESSZrri\000" |
| 54248 | /* 76195 */ "VFIXUPIMMSSZrri\000" |
| 54249 | /* 76211 */ "VCMPSSZrri\000" |
| 54250 | /* 76222 */ "VGETMANTSSZrri\000" |
| 54251 | /* 76237 */ "VDBPSADBWZrri\000" |
| 54252 | /* 76251 */ "VMPSADBWZrri\000" |
| 54253 | /* 76264 */ "VPSHLDWZrri\000" |
| 54254 | /* 76276 */ "VPSHRDWZrri\000" |
| 54255 | /* 76288 */ "VPCMPWZrri\000" |
| 54256 | /* 76299 */ "VPINSRWZrri\000" |
| 54257 | /* 76311 */ "VPEXTRWZrri\000" |
| 54258 | /* 76323 */ "VPCMPUWZrri\000" |
| 54259 | /* 76335 */ "VREDUCEPDZrribk\000" |
| 54260 | /* 76351 */ "VRANGEPDZrribk\000" |
| 54261 | /* 76366 */ "VRNDSCALEPDZrribk\000" |
| 54262 | /* 76384 */ "VFIXUPIMMPDZrribk\000" |
| 54263 | /* 76402 */ "VCMPPDZrribk\000" |
| 54264 | /* 76415 */ "VGETMANTPDZrribk\000" |
| 54265 | /* 76432 */ "VMINMAXPDZrribk\000" |
| 54266 | /* 76448 */ "VREDUCESDZrribk\000" |
| 54267 | /* 76464 */ "VRANGESDZrribk\000" |
| 54268 | /* 76479 */ "VFIXUPIMMSDZrribk\000" |
| 54269 | /* 76497 */ "VGETMANTSDZrribk\000" |
| 54270 | /* 76514 */ "VREDUCEPHZrribk\000" |
| 54271 | /* 76530 */ "VRNDSCALEPHZrribk\000" |
| 54272 | /* 76548 */ "VCMPPHZrribk\000" |
| 54273 | /* 76561 */ "VGETMANTPHZrribk\000" |
| 54274 | /* 76578 */ "VMINMAXPHZrribk\000" |
| 54275 | /* 76594 */ "VREDUCESHZrribk\000" |
| 54276 | /* 76610 */ "VGETMANTSHZrribk\000" |
| 54277 | /* 76627 */ "VREDUCEPSZrribk\000" |
| 54278 | /* 76643 */ "VRANGEPSZrribk\000" |
| 54279 | /* 76658 */ "VRNDSCALEPSZrribk\000" |
| 54280 | /* 76676 */ "VFIXUPIMMPSZrribk\000" |
| 54281 | /* 76694 */ "VCMPPSZrribk\000" |
| 54282 | /* 76707 */ "VGETMANTPSZrribk\000" |
| 54283 | /* 76724 */ "VMINMAXPSZrribk\000" |
| 54284 | /* 76740 */ "VREDUCESSZrribk\000" |
| 54285 | /* 76756 */ "VRANGESSZrribk\000" |
| 54286 | /* 76771 */ "VFIXUPIMMSSZrribk\000" |
| 54287 | /* 76789 */ "VGETMANTSSZrribk\000" |
| 54288 | /* 76806 */ "VFMSUB231BF16Z256mbk\000" |
| 54289 | /* 76827 */ "VFNMSUB231BF16Z256mbk\000" |
| 54290 | /* 76849 */ "VFMADD231BF16Z256mbk\000" |
| 54291 | /* 76870 */ "VFNMADD231BF16Z256mbk\000" |
| 54292 | /* 76892 */ "VFMSUB132BF16Z256mbk\000" |
| 54293 | /* 76913 */ "VFNMSUB132BF16Z256mbk\000" |
| 54294 | /* 76935 */ "VFMADD132BF16Z256mbk\000" |
| 54295 | /* 76956 */ "VFNMADD132BF16Z256mbk\000" |
| 54296 | /* 76978 */ "VFMSUB213BF16Z256mbk\000" |
| 54297 | /* 76999 */ "VFNMSUB213BF16Z256mbk\000" |
| 54298 | /* 77021 */ "VFMADD213BF16Z256mbk\000" |
| 54299 | /* 77042 */ "VFNMADD213BF16Z256mbk\000" |
| 54300 | /* 77064 */ "VRCPBF16Z256mbk\000" |
| 54301 | /* 77080 */ "VGETEXPBF16Z256mbk\000" |
| 54302 | /* 77099 */ "VRSQRTBF16Z256mbk\000" |
| 54303 | /* 77117 */ "VSQRTBF16Z256mbk\000" |
| 54304 | /* 77134 */ "VFMADDSUB231PDZ256mbk\000" |
| 54305 | /* 77156 */ "VFMSUB231PDZ256mbk\000" |
| 54306 | /* 77175 */ "VFNMSUB231PDZ256mbk\000" |
| 54307 | /* 77195 */ "VFMSUBADD231PDZ256mbk\000" |
| 54308 | /* 77217 */ "VFMADD231PDZ256mbk\000" |
| 54309 | /* 77236 */ "VFNMADD231PDZ256mbk\000" |
| 54310 | /* 77256 */ "VFMADDSUB132PDZ256mbk\000" |
| 54311 | /* 77278 */ "VFMSUB132PDZ256mbk\000" |
| 54312 | /* 77297 */ "VFNMSUB132PDZ256mbk\000" |
| 54313 | /* 77317 */ "VFMSUBADD132PDZ256mbk\000" |
| 54314 | /* 77339 */ "VFMADD132PDZ256mbk\000" |
| 54315 | /* 77358 */ "VFNMADD132PDZ256mbk\000" |
| 54316 | /* 77378 */ "VFMADDSUB213PDZ256mbk\000" |
| 54317 | /* 77400 */ "VFMSUB213PDZ256mbk\000" |
| 54318 | /* 77419 */ "VFNMSUB213PDZ256mbk\000" |
| 54319 | /* 77439 */ "VFMSUBADD213PDZ256mbk\000" |
| 54320 | /* 77461 */ "VFMADD213PDZ256mbk\000" |
| 54321 | /* 77480 */ "VFNMADD213PDZ256mbk\000" |
| 54322 | /* 77500 */ "VRCP14PDZ256mbk\000" |
| 54323 | /* 77516 */ "VRSQRT14PDZ256mbk\000" |
| 54324 | /* 77534 */ "VGETEXPPDZ256mbk\000" |
| 54325 | /* 77551 */ "VSQRTPDZ256mbk\000" |
| 54326 | /* 77566 */ "VPDPBSSDZ256mbk\000" |
| 54327 | /* 77582 */ "VPDPWSSDZ256mbk\000" |
| 54328 | /* 77598 */ "VPDPBUSDZ256mbk\000" |
| 54329 | /* 77614 */ "VPDPWUSDZ256mbk\000" |
| 54330 | /* 77630 */ "VPDPBSUDZ256mbk\000" |
| 54331 | /* 77646 */ "VPDPWSUDZ256mbk\000" |
| 54332 | /* 77662 */ "VPDPBUUDZ256mbk\000" |
| 54333 | /* 77678 */ "VPDPWUUDZ256mbk\000" |
| 54334 | /* 77694 */ "VPSHLDVDZ256mbk\000" |
| 54335 | /* 77710 */ "VPSHRDVDZ256mbk\000" |
| 54336 | /* 77726 */ "VFMADDSUB231PHZ256mbk\000" |
| 54337 | /* 77748 */ "VFMSUB231PHZ256mbk\000" |
| 54338 | /* 77767 */ "VFNMSUB231PHZ256mbk\000" |
| 54339 | /* 77787 */ "VFMSUBADD231PHZ256mbk\000" |
| 54340 | /* 77809 */ "VFMADD231PHZ256mbk\000" |
| 54341 | /* 77828 */ "VFNMADD231PHZ256mbk\000" |
| 54342 | /* 77848 */ "VFMADDSUB132PHZ256mbk\000" |
| 54343 | /* 77870 */ "VFMSUB132PHZ256mbk\000" |
| 54344 | /* 77889 */ "VFNMSUB132PHZ256mbk\000" |
| 54345 | /* 77909 */ "VFMSUBADD132PHZ256mbk\000" |
| 54346 | /* 77931 */ "VFMADD132PHZ256mbk\000" |
| 54347 | /* 77950 */ "VFNMADD132PHZ256mbk\000" |
| 54348 | /* 77970 */ "VFMADDSUB213PHZ256mbk\000" |
| 54349 | /* 77992 */ "VFMSUB213PHZ256mbk\000" |
| 54350 | /* 78011 */ "VFNMSUB213PHZ256mbk\000" |
| 54351 | /* 78031 */ "VFMSUBADD213PHZ256mbk\000" |
| 54352 | /* 78053 */ "VFMADD213PHZ256mbk\000" |
| 54353 | /* 78072 */ "VFNMADD213PHZ256mbk\000" |
| 54354 | /* 78092 */ "VFCMADDCPHZ256mbk\000" |
| 54355 | /* 78110 */ "VFMADDCPHZ256mbk\000" |
| 54356 | /* 78127 */ "VRCPPHZ256mbk\000" |
| 54357 | /* 78141 */ "VGETEXPPHZ256mbk\000" |
| 54358 | /* 78158 */ "VRSQRTPHZ256mbk\000" |
| 54359 | /* 78174 */ "VSQRTPHZ256mbk\000" |
| 54360 | /* 78189 */ "VPMADD52HUQZ256mbk\000" |
| 54361 | /* 78208 */ "VPMADD52LUQZ256mbk\000" |
| 54362 | /* 78227 */ "VPSHLDVQZ256mbk\000" |
| 54363 | /* 78243 */ "VPSHRDVQZ256mbk\000" |
| 54364 | /* 78259 */ "VPDPBSSDSZ256mbk\000" |
| 54365 | /* 78276 */ "VPDPWSSDSZ256mbk\000" |
| 54366 | /* 78293 */ "VPDPBUSDSZ256mbk\000" |
| 54367 | /* 78310 */ "VPDPWUSDSZ256mbk\000" |
| 54368 | /* 78327 */ "VPDPBSUDSZ256mbk\000" |
| 54369 | /* 78344 */ "VPDPWSUDSZ256mbk\000" |
| 54370 | /* 78361 */ "VPDPBUUDSZ256mbk\000" |
| 54371 | /* 78378 */ "VPDPWUUDSZ256mbk\000" |
| 54372 | /* 78395 */ "VFMADDSUB231PSZ256mbk\000" |
| 54373 | /* 78417 */ "VFMSUB231PSZ256mbk\000" |
| 54374 | /* 78436 */ "VFNMSUB231PSZ256mbk\000" |
| 54375 | /* 78456 */ "VFMSUBADD231PSZ256mbk\000" |
| 54376 | /* 78478 */ "VFMADD231PSZ256mbk\000" |
| 54377 | /* 78497 */ "VFNMADD231PSZ256mbk\000" |
| 54378 | /* 78517 */ "VFMADDSUB132PSZ256mbk\000" |
| 54379 | /* 78539 */ "VFMSUB132PSZ256mbk\000" |
| 54380 | /* 78558 */ "VFNMSUB132PSZ256mbk\000" |
| 54381 | /* 78578 */ "VFMSUBADD132PSZ256mbk\000" |
| 54382 | /* 78600 */ "VFMADD132PSZ256mbk\000" |
| 54383 | /* 78619 */ "VFNMADD132PSZ256mbk\000" |
| 54384 | /* 78639 */ "VFMADDSUB213PSZ256mbk\000" |
| 54385 | /* 78661 */ "VFMSUB213PSZ256mbk\000" |
| 54386 | /* 78680 */ "VFNMSUB213PSZ256mbk\000" |
| 54387 | /* 78700 */ "VFMSUBADD213PSZ256mbk\000" |
| 54388 | /* 78722 */ "VFMADD213PSZ256mbk\000" |
| 54389 | /* 78741 */ "VFNMADD213PSZ256mbk\000" |
| 54390 | /* 78761 */ "VRCP14PSZ256mbk\000" |
| 54391 | /* 78777 */ "VRSQRT14PSZ256mbk\000" |
| 54392 | /* 78795 */ "VDPBF16PSZ256mbk\000" |
| 54393 | /* 78812 */ "VDPPHPSZ256mbk\000" |
| 54394 | /* 78827 */ "VGETEXPPSZ256mbk\000" |
| 54395 | /* 78844 */ "VSQRTPSZ256mbk\000" |
| 54396 | /* 78859 */ "VFMSUB231BF16Z128mbk\000" |
| 54397 | /* 78880 */ "VFNMSUB231BF16Z128mbk\000" |
| 54398 | /* 78902 */ "VFMADD231BF16Z128mbk\000" |
| 54399 | /* 78923 */ "VFNMADD231BF16Z128mbk\000" |
| 54400 | /* 78945 */ "VFMSUB132BF16Z128mbk\000" |
| 54401 | /* 78966 */ "VFNMSUB132BF16Z128mbk\000" |
| 54402 | /* 78988 */ "VFMADD132BF16Z128mbk\000" |
| 54403 | /* 79009 */ "VFNMADD132BF16Z128mbk\000" |
| 54404 | /* 79031 */ "VFMSUB213BF16Z128mbk\000" |
| 54405 | /* 79052 */ "VFNMSUB213BF16Z128mbk\000" |
| 54406 | /* 79074 */ "VFMADD213BF16Z128mbk\000" |
| 54407 | /* 79095 */ "VFNMADD213BF16Z128mbk\000" |
| 54408 | /* 79117 */ "VRCPBF16Z128mbk\000" |
| 54409 | /* 79133 */ "VGETEXPBF16Z128mbk\000" |
| 54410 | /* 79152 */ "VRSQRTBF16Z128mbk\000" |
| 54411 | /* 79170 */ "VSQRTBF16Z128mbk\000" |
| 54412 | /* 79187 */ "VFMADDSUB231PDZ128mbk\000" |
| 54413 | /* 79209 */ "VFMSUB231PDZ128mbk\000" |
| 54414 | /* 79228 */ "VFNMSUB231PDZ128mbk\000" |
| 54415 | /* 79248 */ "VFMSUBADD231PDZ128mbk\000" |
| 54416 | /* 79270 */ "VFMADD231PDZ128mbk\000" |
| 54417 | /* 79289 */ "VFNMADD231PDZ128mbk\000" |
| 54418 | /* 79309 */ "VFMADDSUB132PDZ128mbk\000" |
| 54419 | /* 79331 */ "VFMSUB132PDZ128mbk\000" |
| 54420 | /* 79350 */ "VFNMSUB132PDZ128mbk\000" |
| 54421 | /* 79370 */ "VFMSUBADD132PDZ128mbk\000" |
| 54422 | /* 79392 */ "VFMADD132PDZ128mbk\000" |
| 54423 | /* 79411 */ "VFNMADD132PDZ128mbk\000" |
| 54424 | /* 79431 */ "VFMADDSUB213PDZ128mbk\000" |
| 54425 | /* 79453 */ "VFMSUB213PDZ128mbk\000" |
| 54426 | /* 79472 */ "VFNMSUB213PDZ128mbk\000" |
| 54427 | /* 79492 */ "VFMSUBADD213PDZ128mbk\000" |
| 54428 | /* 79514 */ "VFMADD213PDZ128mbk\000" |
| 54429 | /* 79533 */ "VFNMADD213PDZ128mbk\000" |
| 54430 | /* 79553 */ "VRCP14PDZ128mbk\000" |
| 54431 | /* 79569 */ "VRSQRT14PDZ128mbk\000" |
| 54432 | /* 79587 */ "VGETEXPPDZ128mbk\000" |
| 54433 | /* 79604 */ "VSQRTPDZ128mbk\000" |
| 54434 | /* 79619 */ "VPDPBSSDZ128mbk\000" |
| 54435 | /* 79635 */ "VPDPWSSDZ128mbk\000" |
| 54436 | /* 79651 */ "VPDPBUSDZ128mbk\000" |
| 54437 | /* 79667 */ "VPDPWUSDZ128mbk\000" |
| 54438 | /* 79683 */ "VPDPBSUDZ128mbk\000" |
| 54439 | /* 79699 */ "VPDPWSUDZ128mbk\000" |
| 54440 | /* 79715 */ "VPDPBUUDZ128mbk\000" |
| 54441 | /* 79731 */ "VPDPWUUDZ128mbk\000" |
| 54442 | /* 79747 */ "VPSHLDVDZ128mbk\000" |
| 54443 | /* 79763 */ "VPSHRDVDZ128mbk\000" |
| 54444 | /* 79779 */ "VFMADDSUB231PHZ128mbk\000" |
| 54445 | /* 79801 */ "VFMSUB231PHZ128mbk\000" |
| 54446 | /* 79820 */ "VFNMSUB231PHZ128mbk\000" |
| 54447 | /* 79840 */ "VFMSUBADD231PHZ128mbk\000" |
| 54448 | /* 79862 */ "VFMADD231PHZ128mbk\000" |
| 54449 | /* 79881 */ "VFNMADD231PHZ128mbk\000" |
| 54450 | /* 79901 */ "VFMADDSUB132PHZ128mbk\000" |
| 54451 | /* 79923 */ "VFMSUB132PHZ128mbk\000" |
| 54452 | /* 79942 */ "VFNMSUB132PHZ128mbk\000" |
| 54453 | /* 79962 */ "VFMSUBADD132PHZ128mbk\000" |
| 54454 | /* 79984 */ "VFMADD132PHZ128mbk\000" |
| 54455 | /* 80003 */ "VFNMADD132PHZ128mbk\000" |
| 54456 | /* 80023 */ "VFMADDSUB213PHZ128mbk\000" |
| 54457 | /* 80045 */ "VFMSUB213PHZ128mbk\000" |
| 54458 | /* 80064 */ "VFNMSUB213PHZ128mbk\000" |
| 54459 | /* 80084 */ "VFMSUBADD213PHZ128mbk\000" |
| 54460 | /* 80106 */ "VFMADD213PHZ128mbk\000" |
| 54461 | /* 80125 */ "VFNMADD213PHZ128mbk\000" |
| 54462 | /* 80145 */ "VFCMADDCPHZ128mbk\000" |
| 54463 | /* 80163 */ "VFMADDCPHZ128mbk\000" |
| 54464 | /* 80180 */ "VRCPPHZ128mbk\000" |
| 54465 | /* 80194 */ "VGETEXPPHZ128mbk\000" |
| 54466 | /* 80211 */ "VRSQRTPHZ128mbk\000" |
| 54467 | /* 80227 */ "VSQRTPHZ128mbk\000" |
| 54468 | /* 80242 */ "VPMADD52HUQZ128mbk\000" |
| 54469 | /* 80261 */ "VPMADD52LUQZ128mbk\000" |
| 54470 | /* 80280 */ "VPSHLDVQZ128mbk\000" |
| 54471 | /* 80296 */ "VPSHRDVQZ128mbk\000" |
| 54472 | /* 80312 */ "VPDPBSSDSZ128mbk\000" |
| 54473 | /* 80329 */ "VPDPWSSDSZ128mbk\000" |
| 54474 | /* 80346 */ "VPDPBUSDSZ128mbk\000" |
| 54475 | /* 80363 */ "VPDPWUSDSZ128mbk\000" |
| 54476 | /* 80380 */ "VPDPBSUDSZ128mbk\000" |
| 54477 | /* 80397 */ "VPDPWSUDSZ128mbk\000" |
| 54478 | /* 80414 */ "VPDPBUUDSZ128mbk\000" |
| 54479 | /* 80431 */ "VPDPWUUDSZ128mbk\000" |
| 54480 | /* 80448 */ "VFMADDSUB231PSZ128mbk\000" |
| 54481 | /* 80470 */ "VFMSUB231PSZ128mbk\000" |
| 54482 | /* 80489 */ "VFNMSUB231PSZ128mbk\000" |
| 54483 | /* 80509 */ "VFMSUBADD231PSZ128mbk\000" |
| 54484 | /* 80531 */ "VFMADD231PSZ128mbk\000" |
| 54485 | /* 80550 */ "VFNMADD231PSZ128mbk\000" |
| 54486 | /* 80570 */ "VFMADDSUB132PSZ128mbk\000" |
| 54487 | /* 80592 */ "VFMSUB132PSZ128mbk\000" |
| 54488 | /* 80611 */ "VFNMSUB132PSZ128mbk\000" |
| 54489 | /* 80631 */ "VFMSUBADD132PSZ128mbk\000" |
| 54490 | /* 80653 */ "VFMADD132PSZ128mbk\000" |
| 54491 | /* 80672 */ "VFNMADD132PSZ128mbk\000" |
| 54492 | /* 80692 */ "VFMADDSUB213PSZ128mbk\000" |
| 54493 | /* 80714 */ "VFMSUB213PSZ128mbk\000" |
| 54494 | /* 80733 */ "VFNMSUB213PSZ128mbk\000" |
| 54495 | /* 80753 */ "VFMSUBADD213PSZ128mbk\000" |
| 54496 | /* 80775 */ "VFMADD213PSZ128mbk\000" |
| 54497 | /* 80794 */ "VFNMADD213PSZ128mbk\000" |
| 54498 | /* 80814 */ "VRCP14PSZ128mbk\000" |
| 54499 | /* 80830 */ "VRSQRT14PSZ128mbk\000" |
| 54500 | /* 80848 */ "VDPBF16PSZ128mbk\000" |
| 54501 | /* 80865 */ "VDPPHPSZ128mbk\000" |
| 54502 | /* 80880 */ "VGETEXPPSZ128mbk\000" |
| 54503 | /* 80897 */ "VSQRTPSZ128mbk\000" |
| 54504 | /* 80912 */ "VFMSUB231BF16Zmbk\000" |
| 54505 | /* 80930 */ "VFNMSUB231BF16Zmbk\000" |
| 54506 | /* 80949 */ "VFMADD231BF16Zmbk\000" |
| 54507 | /* 80967 */ "VFNMADD231BF16Zmbk\000" |
| 54508 | /* 80986 */ "VFMSUB132BF16Zmbk\000" |
| 54509 | /* 81004 */ "VFNMSUB132BF16Zmbk\000" |
| 54510 | /* 81023 */ "VFMADD132BF16Zmbk\000" |
| 54511 | /* 81041 */ "VFNMADD132BF16Zmbk\000" |
| 54512 | /* 81060 */ "VFMSUB213BF16Zmbk\000" |
| 54513 | /* 81078 */ "VFNMSUB213BF16Zmbk\000" |
| 54514 | /* 81097 */ "VFMADD213BF16Zmbk\000" |
| 54515 | /* 81115 */ "VFNMADD213BF16Zmbk\000" |
| 54516 | /* 81134 */ "VRCPBF16Zmbk\000" |
| 54517 | /* 81147 */ "VGETEXPBF16Zmbk\000" |
| 54518 | /* 81163 */ "VRSQRTBF16Zmbk\000" |
| 54519 | /* 81178 */ "VSQRTBF16Zmbk\000" |
| 54520 | /* 81192 */ "VFMADDSUB231PDZmbk\000" |
| 54521 | /* 81211 */ "VFMSUB231PDZmbk\000" |
| 54522 | /* 81227 */ "VFNMSUB231PDZmbk\000" |
| 54523 | /* 81244 */ "VFMSUBADD231PDZmbk\000" |
| 54524 | /* 81263 */ "VFMADD231PDZmbk\000" |
| 54525 | /* 81279 */ "VFNMADD231PDZmbk\000" |
| 54526 | /* 81296 */ "VFMADDSUB132PDZmbk\000" |
| 54527 | /* 81315 */ "VFMSUB132PDZmbk\000" |
| 54528 | /* 81331 */ "VFNMSUB132PDZmbk\000" |
| 54529 | /* 81348 */ "VFMSUBADD132PDZmbk\000" |
| 54530 | /* 81367 */ "VFMADD132PDZmbk\000" |
| 54531 | /* 81383 */ "VFNMADD132PDZmbk\000" |
| 54532 | /* 81400 */ "VEXP2PDZmbk\000" |
| 54533 | /* 81412 */ "VFMADDSUB213PDZmbk\000" |
| 54534 | /* 81431 */ "VFMSUB213PDZmbk\000" |
| 54535 | /* 81447 */ "VFNMSUB213PDZmbk\000" |
| 54536 | /* 81464 */ "VFMSUBADD213PDZmbk\000" |
| 54537 | /* 81483 */ "VFMADD213PDZmbk\000" |
| 54538 | /* 81499 */ "VFNMADD213PDZmbk\000" |
| 54539 | /* 81516 */ "VRCP14PDZmbk\000" |
| 54540 | /* 81529 */ "VRSQRT14PDZmbk\000" |
| 54541 | /* 81544 */ "VRCP28PDZmbk\000" |
| 54542 | /* 81557 */ "VRSQRT28PDZmbk\000" |
| 54543 | /* 81572 */ "VGETEXPPDZmbk\000" |
| 54544 | /* 81586 */ "VSQRTPDZmbk\000" |
| 54545 | /* 81598 */ "VPDPBSSDZmbk\000" |
| 54546 | /* 81611 */ "VPDPWSSDZmbk\000" |
| 54547 | /* 81624 */ "VPDPBUSDZmbk\000" |
| 54548 | /* 81637 */ "VPDPWUSDZmbk\000" |
| 54549 | /* 81650 */ "VPDPBSUDZmbk\000" |
| 54550 | /* 81663 */ "VPDPWSUDZmbk\000" |
| 54551 | /* 81676 */ "VPDPBUUDZmbk\000" |
| 54552 | /* 81689 */ "VPDPWUUDZmbk\000" |
| 54553 | /* 81702 */ "VPSHLDVDZmbk\000" |
| 54554 | /* 81715 */ "VPSHRDVDZmbk\000" |
| 54555 | /* 81728 */ "VFMADDSUB231PHZmbk\000" |
| 54556 | /* 81747 */ "VFMSUB231PHZmbk\000" |
| 54557 | /* 81763 */ "VFNMSUB231PHZmbk\000" |
| 54558 | /* 81780 */ "VFMSUBADD231PHZmbk\000" |
| 54559 | /* 81799 */ "VFMADD231PHZmbk\000" |
| 54560 | /* 81815 */ "VFNMADD231PHZmbk\000" |
| 54561 | /* 81832 */ "VFMADDSUB132PHZmbk\000" |
| 54562 | /* 81851 */ "VFMSUB132PHZmbk\000" |
| 54563 | /* 81867 */ "VFNMSUB132PHZmbk\000" |
| 54564 | /* 81884 */ "VFMSUBADD132PHZmbk\000" |
| 54565 | /* 81903 */ "VFMADD132PHZmbk\000" |
| 54566 | /* 81919 */ "VFNMADD132PHZmbk\000" |
| 54567 | /* 81936 */ "VFMADDSUB213PHZmbk\000" |
| 54568 | /* 81955 */ "VFMSUB213PHZmbk\000" |
| 54569 | /* 81971 */ "VFNMSUB213PHZmbk\000" |
| 54570 | /* 81988 */ "VFMSUBADD213PHZmbk\000" |
| 54571 | /* 82007 */ "VFMADD213PHZmbk\000" |
| 54572 | /* 82023 */ "VFNMADD213PHZmbk\000" |
| 54573 | /* 82040 */ "VFCMADDCPHZmbk\000" |
| 54574 | /* 82055 */ "VFMADDCPHZmbk\000" |
| 54575 | /* 82069 */ "VRCPPHZmbk\000" |
| 54576 | /* 82080 */ "VGETEXPPHZmbk\000" |
| 54577 | /* 82094 */ "VRSQRTPHZmbk\000" |
| 54578 | /* 82107 */ "VSQRTPHZmbk\000" |
| 54579 | /* 82119 */ "VPMADD52HUQZmbk\000" |
| 54580 | /* 82135 */ "VPMADD52LUQZmbk\000" |
| 54581 | /* 82151 */ "VPSHLDVQZmbk\000" |
| 54582 | /* 82164 */ "VPSHRDVQZmbk\000" |
| 54583 | /* 82177 */ "VPDPBSSDSZmbk\000" |
| 54584 | /* 82191 */ "VPDPWSSDSZmbk\000" |
| 54585 | /* 82205 */ "VPDPBUSDSZmbk\000" |
| 54586 | /* 82219 */ "VPDPWUSDSZmbk\000" |
| 54587 | /* 82233 */ "VPDPBSUDSZmbk\000" |
| 54588 | /* 82247 */ "VPDPWSUDSZmbk\000" |
| 54589 | /* 82261 */ "VPDPBUUDSZmbk\000" |
| 54590 | /* 82275 */ "VPDPWUUDSZmbk\000" |
| 54591 | /* 82289 */ "VFMADDSUB231PSZmbk\000" |
| 54592 | /* 82308 */ "VFMSUB231PSZmbk\000" |
| 54593 | /* 82324 */ "VFNMSUB231PSZmbk\000" |
| 54594 | /* 82341 */ "VFMSUBADD231PSZmbk\000" |
| 54595 | /* 82360 */ "VFMADD231PSZmbk\000" |
| 54596 | /* 82376 */ "VFNMADD231PSZmbk\000" |
| 54597 | /* 82393 */ "VFMADDSUB132PSZmbk\000" |
| 54598 | /* 82412 */ "VFMSUB132PSZmbk\000" |
| 54599 | /* 82428 */ "VFNMSUB132PSZmbk\000" |
| 54600 | /* 82445 */ "VFMSUBADD132PSZmbk\000" |
| 54601 | /* 82464 */ "VFMADD132PSZmbk\000" |
| 54602 | /* 82480 */ "VFNMADD132PSZmbk\000" |
| 54603 | /* 82497 */ "VEXP2PSZmbk\000" |
| 54604 | /* 82509 */ "VFMADDSUB213PSZmbk\000" |
| 54605 | /* 82528 */ "VFMSUB213PSZmbk\000" |
| 54606 | /* 82544 */ "VFNMSUB213PSZmbk\000" |
| 54607 | /* 82561 */ "VFMSUBADD213PSZmbk\000" |
| 54608 | /* 82580 */ "VFMADD213PSZmbk\000" |
| 54609 | /* 82596 */ "VFNMADD213PSZmbk\000" |
| 54610 | /* 82613 */ "VRCP14PSZmbk\000" |
| 54611 | /* 82626 */ "VRSQRT14PSZmbk\000" |
| 54612 | /* 82641 */ "VDPBF16PSZmbk\000" |
| 54613 | /* 82655 */ "VRCP28PSZmbk\000" |
| 54614 | /* 82668 */ "VRSQRT28PSZmbk\000" |
| 54615 | /* 82683 */ "VDPPHPSZmbk\000" |
| 54616 | /* 82695 */ "VGETEXPPSZmbk\000" |
| 54617 | /* 82709 */ "VSQRTPSZmbk\000" |
| 54618 | /* 82721 */ "VCVTNE2PS2BF16Z256rmbk\000" |
| 54619 | /* 82744 */ "VCVTNEPS2BF16Z256rmbk\000" |
| 54620 | /* 82766 */ "VSUBBF16Z256rmbk\000" |
| 54621 | /* 82783 */ "VADDBF16Z256rmbk\000" |
| 54622 | /* 82800 */ "VSCALEFBF16Z256rmbk\000" |
| 54623 | /* 82820 */ "VMULBF16Z256rmbk\000" |
| 54624 | /* 82837 */ "VMINBF16Z256rmbk\000" |
| 54625 | /* 82854 */ "VDIVBF16Z256rmbk\000" |
| 54626 | /* 82871 */ "VMAXBF16Z256rmbk\000" |
| 54627 | /* 82888 */ "VCVT2PH2BF8Z256rmbk\000" |
| 54628 | /* 82908 */ "VCVTBIASPH2BF8Z256rmbk\000" |
| 54629 | /* 82931 */ "VCVTPH2BF8Z256rmbk\000" |
| 54630 | /* 82950 */ "VCVT2PH2HF8Z256rmbk\000" |
| 54631 | /* 82970 */ "VCVTBIASPH2HF8Z256rmbk\000" |
| 54632 | /* 82993 */ "VCVTPH2HF8Z256rmbk\000" |
| 54633 | /* 83012 */ "VPMULTISHIFTQBZ256rmbk\000" |
| 54634 | /* 83035 */ "VPERMI2DZ256rmbk\000" |
| 54635 | /* 83052 */ "VPERMT2DZ256rmbk\000" |
| 54636 | /* 83069 */ "VPSUBDZ256rmbk\000" |
| 54637 | /* 83084 */ "VPADDDZ256rmbk\000" |
| 54638 | /* 83099 */ "VPANDDZ256rmbk\000" |
| 54639 | /* 83114 */ "VPMULLDZ256rmbk\000" |
| 54640 | /* 83130 */ "VPBLENDMDZ256rmbk\000" |
| 54641 | /* 83148 */ "VPTESTNMDZ256rmbk\000" |
| 54642 | /* 83166 */ "VPERMDZ256rmbk\000" |
| 54643 | /* 83181 */ "VPTESTMDZ256rmbk\000" |
| 54644 | /* 83198 */ "VPANDNDZ256rmbk\000" |
| 54645 | /* 83214 */ "VCVTPH2PDZ256rmbk\000" |
| 54646 | /* 83232 */ "VPERMI2PDZ256rmbk\000" |
| 54647 | /* 83250 */ "VCVTDQ2PDZ256rmbk\000" |
| 54648 | /* 83268 */ "VCVTUDQ2PDZ256rmbk\000" |
| 54649 | /* 83287 */ "VCVTQQ2PDZ256rmbk\000" |
| 54650 | /* 83305 */ "VCVTUQQ2PDZ256rmbk\000" |
| 54651 | /* 83324 */ "VCVTPS2PDZ256rmbk\000" |
| 54652 | /* 83342 */ "VPERMT2PDZ256rmbk\000" |
| 54653 | /* 83360 */ "VSUBPDZ256rmbk\000" |
| 54654 | /* 83375 */ "VMINCPDZ256rmbk\000" |
| 54655 | /* 83391 */ "VMAXCPDZ256rmbk\000" |
| 54656 | /* 83407 */ "VADDPDZ256rmbk\000" |
| 54657 | /* 83422 */ "VANDPDZ256rmbk\000" |
| 54658 | /* 83437 */ "VSCALEFPDZ256rmbk\000" |
| 54659 | /* 83455 */ "VUNPCKHPDZ256rmbk\000" |
| 54660 | /* 83473 */ "VPERMILPDZ256rmbk\000" |
| 54661 | /* 83491 */ "VUNPCKLPDZ256rmbk\000" |
| 54662 | /* 83509 */ "VMULPDZ256rmbk\000" |
| 54663 | /* 83524 */ "VBLENDMPDZ256rmbk\000" |
| 54664 | /* 83542 */ "VPERMPDZ256rmbk\000" |
| 54665 | /* 83558 */ "VANDNPDZ256rmbk\000" |
| 54666 | /* 83574 */ "VMINPDZ256rmbk\000" |
| 54667 | /* 83589 */ "VORPDZ256rmbk\000" |
| 54668 | /* 83603 */ "VXORPDZ256rmbk\000" |
| 54669 | /* 83618 */ "VDIVPDZ256rmbk\000" |
| 54670 | /* 83633 */ "VMAXPDZ256rmbk\000" |
| 54671 | /* 83648 */ "VPCMPEQDZ256rmbk\000" |
| 54672 | /* 83665 */ "VPORDZ256rmbk\000" |
| 54673 | /* 83679 */ "VPXORDZ256rmbk\000" |
| 54674 | /* 83694 */ "VPABSDZ256rmbk\000" |
| 54675 | /* 83709 */ "VPMINSDZ256rmbk\000" |
| 54676 | /* 83725 */ "VPMAXSDZ256rmbk\000" |
| 54677 | /* 83741 */ "VPCONFLICTDZ256rmbk\000" |
| 54678 | /* 83761 */ "VPCMPGTDZ256rmbk\000" |
| 54679 | /* 83778 */ "VPOPCNTDZ256rmbk\000" |
| 54680 | /* 83795 */ "VPLZCNTDZ256rmbk\000" |
| 54681 | /* 83812 */ "VPMINUDZ256rmbk\000" |
| 54682 | /* 83828 */ "VPMAXUDZ256rmbk\000" |
| 54683 | /* 83844 */ "VPSRAVDZ256rmbk\000" |
| 54684 | /* 83860 */ "VPSLLVDZ256rmbk\000" |
| 54685 | /* 83876 */ "VPROLVDZ256rmbk\000" |
| 54686 | /* 83892 */ "VPSRLVDZ256rmbk\000" |
| 54687 | /* 83908 */ "VPRORVDZ256rmbk\000" |
| 54688 | /* 83924 */ "VCVTPD2PHZ256rmbk\000" |
| 54689 | /* 83942 */ "VCVTDQ2PHZ256rmbk\000" |
| 54690 | /* 83960 */ "VCVTUDQ2PHZ256rmbk\000" |
| 54691 | /* 83979 */ "VCVTQQ2PHZ256rmbk\000" |
| 54692 | /* 83997 */ "VCVTUQQ2PHZ256rmbk\000" |
| 54693 | /* 84016 */ "VCVTW2PHZ256rmbk\000" |
| 54694 | /* 84033 */ "VCVTUW2PHZ256rmbk\000" |
| 54695 | /* 84051 */ "VSUBPHZ256rmbk\000" |
| 54696 | /* 84066 */ "VFCMULCPHZ256rmbk\000" |
| 54697 | /* 84084 */ "VFMULCPHZ256rmbk\000" |
| 54698 | /* 84101 */ "VMINCPHZ256rmbk\000" |
| 54699 | /* 84117 */ "VMAXCPHZ256rmbk\000" |
| 54700 | /* 84133 */ "VADDPHZ256rmbk\000" |
| 54701 | /* 84148 */ "VSCALEFPHZ256rmbk\000" |
| 54702 | /* 84166 */ "VMULPHZ256rmbk\000" |
| 54703 | /* 84181 */ "VMINPHZ256rmbk\000" |
| 54704 | /* 84196 */ "VDIVPHZ256rmbk\000" |
| 54705 | /* 84211 */ "VMAXPHZ256rmbk\000" |
| 54706 | /* 84226 */ "VPERMI2QZ256rmbk\000" |
| 54707 | /* 84243 */ "VPERMT2QZ256rmbk\000" |
| 54708 | /* 84260 */ "VPSUBQZ256rmbk\000" |
| 54709 | /* 84275 */ "VCVTTPD2DQZ256rmbk\000" |
| 54710 | /* 84294 */ "VCVTPD2DQZ256rmbk\000" |
| 54711 | /* 84312 */ "VCVTTPH2DQZ256rmbk\000" |
| 54712 | /* 84331 */ "VCVTPH2DQZ256rmbk\000" |
| 54713 | /* 84349 */ "VCVTTPS2DQZ256rmbk\000" |
| 54714 | /* 84368 */ "VCVTPS2DQZ256rmbk\000" |
| 54715 | /* 84386 */ "VPADDQZ256rmbk\000" |
| 54716 | /* 84401 */ "VPUNPCKHDQZ256rmbk\000" |
| 54717 | /* 84420 */ "VPUNPCKLDQZ256rmbk\000" |
| 54718 | /* 84439 */ "VPMULDQZ256rmbk\000" |
| 54719 | /* 84455 */ "VPANDQZ256rmbk\000" |
| 54720 | /* 84470 */ "VPUNPCKHQDQZ256rmbk\000" |
| 54721 | /* 84490 */ "VPUNPCKLQDQZ256rmbk\000" |
| 54722 | /* 84510 */ "VCVTTPD2UDQZ256rmbk\000" |
| 54723 | /* 84530 */ "VCVTPD2UDQZ256rmbk\000" |
| 54724 | /* 84549 */ "VCVTTPH2UDQZ256rmbk\000" |
| 54725 | /* 84569 */ "VCVTPH2UDQZ256rmbk\000" |
| 54726 | /* 84588 */ "VCVTTPS2UDQZ256rmbk\000" |
| 54727 | /* 84608 */ "VCVTPS2UDQZ256rmbk\000" |
| 54728 | /* 84627 */ "VPMULUDQZ256rmbk\000" |
| 54729 | /* 84644 */ "VPMULLQZ256rmbk\000" |
| 54730 | /* 84660 */ "VPBLENDMQZ256rmbk\000" |
| 54731 | /* 84678 */ "VPTESTNMQZ256rmbk\000" |
| 54732 | /* 84696 */ "VPERMQZ256rmbk\000" |
| 54733 | /* 84711 */ "VPTESTMQZ256rmbk\000" |
| 54734 | /* 84728 */ "VPANDNQZ256rmbk\000" |
| 54735 | /* 84744 */ "VCVTTPD2QQZ256rmbk\000" |
| 54736 | /* 84763 */ "VCVTPD2QQZ256rmbk\000" |
| 54737 | /* 84781 */ "VCVTTPH2QQZ256rmbk\000" |
| 54738 | /* 84800 */ "VCVTPH2QQZ256rmbk\000" |
| 54739 | /* 84818 */ "VCVTTPS2QQZ256rmbk\000" |
| 54740 | /* 84837 */ "VCVTPS2QQZ256rmbk\000" |
| 54741 | /* 84855 */ "VPCMPEQQZ256rmbk\000" |
| 54742 | /* 84872 */ "VCVTTPD2UQQZ256rmbk\000" |
| 54743 | /* 84892 */ "VCVTPD2UQQZ256rmbk\000" |
| 54744 | /* 84911 */ "VCVTTPH2UQQZ256rmbk\000" |
| 54745 | /* 84931 */ "VCVTPH2UQQZ256rmbk\000" |
| 54746 | /* 84950 */ "VCVTTPS2UQQZ256rmbk\000" |
| 54747 | /* 84970 */ "VCVTPS2UQQZ256rmbk\000" |
| 54748 | /* 84989 */ "VPORQZ256rmbk\000" |
| 54749 | /* 85003 */ "VPXORQZ256rmbk\000" |
| 54750 | /* 85018 */ "VPABSQZ256rmbk\000" |
| 54751 | /* 85033 */ "VPMINSQZ256rmbk\000" |
| 54752 | /* 85049 */ "VPMAXSQZ256rmbk\000" |
| 54753 | /* 85065 */ "VPCONFLICTQZ256rmbk\000" |
| 54754 | /* 85085 */ "VPCMPGTQZ256rmbk\000" |
| 54755 | /* 85102 */ "VPOPCNTQZ256rmbk\000" |
| 54756 | /* 85119 */ "VPLZCNTQZ256rmbk\000" |
| 54757 | /* 85136 */ "VPMINUQZ256rmbk\000" |
| 54758 | /* 85152 */ "VPMAXUQZ256rmbk\000" |
| 54759 | /* 85168 */ "VPSRAVQZ256rmbk\000" |
| 54760 | /* 85184 */ "VPSLLVQZ256rmbk\000" |
| 54761 | /* 85200 */ "VPROLVQZ256rmbk\000" |
| 54762 | /* 85216 */ "VPSRLVQZ256rmbk\000" |
| 54763 | /* 85232 */ "VPRORVQZ256rmbk\000" |
| 54764 | /* 85248 */ "VCVT2PH2BF8SZ256rmbk\000" |
| 54765 | /* 85269 */ "VCVTBIASPH2BF8SZ256rmbk\000" |
| 54766 | /* 85293 */ "VCVTPH2BF8SZ256rmbk\000" |
| 54767 | /* 85313 */ "VCVT2PH2HF8SZ256rmbk\000" |
| 54768 | /* 85334 */ "VCVTBIASPH2HF8SZ256rmbk\000" |
| 54769 | /* 85358 */ "VCVTPH2HF8SZ256rmbk\000" |
| 54770 | /* 85378 */ "VCVTTBF162IBSZ256rmbk\000" |
| 54771 | /* 85400 */ "VCVTBF162IBSZ256rmbk\000" |
| 54772 | /* 85421 */ "VCVTTPH2IBSZ256rmbk\000" |
| 54773 | /* 85441 */ "VCVTPH2IBSZ256rmbk\000" |
| 54774 | /* 85460 */ "VCVTTPS2IBSZ256rmbk\000" |
| 54775 | /* 85480 */ "VCVTPS2IBSZ256rmbk\000" |
| 54776 | /* 85499 */ "VCVTTBF162IUBSZ256rmbk\000" |
| 54777 | /* 85522 */ "VCVTBF162IUBSZ256rmbk\000" |
| 54778 | /* 85544 */ "VCVTTPH2IUBSZ256rmbk\000" |
| 54779 | /* 85565 */ "VCVTPH2IUBSZ256rmbk\000" |
| 54780 | /* 85585 */ "VCVTTPS2IUBSZ256rmbk\000" |
| 54781 | /* 85606 */ "VCVTPS2IUBSZ256rmbk\000" |
| 54782 | /* 85626 */ "VCVTPD2PSZ256rmbk\000" |
| 54783 | /* 85644 */ "VPERMI2PSZ256rmbk\000" |
| 54784 | /* 85662 */ "VCVTDQ2PSZ256rmbk\000" |
| 54785 | /* 85680 */ "VCVTUDQ2PSZ256rmbk\000" |
| 54786 | /* 85699 */ "VCVTQQ2PSZ256rmbk\000" |
| 54787 | /* 85717 */ "VCVTUQQ2PSZ256rmbk\000" |
| 54788 | /* 85736 */ "VPERMT2PSZ256rmbk\000" |
| 54789 | /* 85754 */ "VSUBPSZ256rmbk\000" |
| 54790 | /* 85769 */ "VMINCPSZ256rmbk\000" |
| 54791 | /* 85785 */ "VMAXCPSZ256rmbk\000" |
| 54792 | /* 85801 */ "VADDPSZ256rmbk\000" |
| 54793 | /* 85816 */ "VANDPSZ256rmbk\000" |
| 54794 | /* 85831 */ "VSCALEFPSZ256rmbk\000" |
| 54795 | /* 85849 */ "VUNPCKHPSZ256rmbk\000" |
| 54796 | /* 85867 */ "VPERMILPSZ256rmbk\000" |
| 54797 | /* 85885 */ "VUNPCKLPSZ256rmbk\000" |
| 54798 | /* 85903 */ "VMULPSZ256rmbk\000" |
| 54799 | /* 85918 */ "VBLENDMPSZ256rmbk\000" |
| 54800 | /* 85936 */ "VPERMPSZ256rmbk\000" |
| 54801 | /* 85952 */ "VANDNPSZ256rmbk\000" |
| 54802 | /* 85968 */ "VMINPSZ256rmbk\000" |
| 54803 | /* 85983 */ "VORPSZ256rmbk\000" |
| 54804 | /* 85997 */ "VXORPSZ256rmbk\000" |
| 54805 | /* 86012 */ "VDIVPSZ256rmbk\000" |
| 54806 | /* 86027 */ "VMAXPSZ256rmbk\000" |
| 54807 | /* 86042 */ "VCVTTPD2DQSZ256rmbk\000" |
| 54808 | /* 86062 */ "VCVTTPS2DQSZ256rmbk\000" |
| 54809 | /* 86082 */ "VCVTTPD2UDQSZ256rmbk\000" |
| 54810 | /* 86103 */ "VCVTTPS2UDQSZ256rmbk\000" |
| 54811 | /* 86124 */ "VCVTTPD2QQSZ256rmbk\000" |
| 54812 | /* 86144 */ "VCVTTPS2QQSZ256rmbk\000" |
| 54813 | /* 86164 */ "VCVTTPD2UQQSZ256rmbk\000" |
| 54814 | /* 86185 */ "VCVTTPS2UQQSZ256rmbk\000" |
| 54815 | /* 86206 */ "VCVTTPH2WZ256rmbk\000" |
| 54816 | /* 86224 */ "VCVTPH2WZ256rmbk\000" |
| 54817 | /* 86241 */ "VPACKSSDWZ256rmbk\000" |
| 54818 | /* 86259 */ "VPACKUSDWZ256rmbk\000" |
| 54819 | /* 86277 */ "VCVTTPH2UWZ256rmbk\000" |
| 54820 | /* 86296 */ "VCVTPH2UWZ256rmbk\000" |
| 54821 | /* 86314 */ "VCVT2PS2PHXZ256rmbk\000" |
| 54822 | /* 86334 */ "VCVTPS2PHXZ256rmbk\000" |
| 54823 | /* 86353 */ "VCVTPH2PSXZ256rmbk\000" |
| 54824 | /* 86372 */ "VCVTNE2PS2BF16Z128rmbk\000" |
| 54825 | /* 86395 */ "VCVTNEPS2BF16Z128rmbk\000" |
| 54826 | /* 86417 */ "VSUBBF16Z128rmbk\000" |
| 54827 | /* 86434 */ "VADDBF16Z128rmbk\000" |
| 54828 | /* 86451 */ "VSCALEFBF16Z128rmbk\000" |
| 54829 | /* 86471 */ "VMULBF16Z128rmbk\000" |
| 54830 | /* 86488 */ "VMINBF16Z128rmbk\000" |
| 54831 | /* 86505 */ "VDIVBF16Z128rmbk\000" |
| 54832 | /* 86522 */ "VMAXBF16Z128rmbk\000" |
| 54833 | /* 86539 */ "VCVT2PH2BF8Z128rmbk\000" |
| 54834 | /* 86559 */ "VCVTBIASPH2BF8Z128rmbk\000" |
| 54835 | /* 86582 */ "VCVTPH2BF8Z128rmbk\000" |
| 54836 | /* 86601 */ "VCVT2PH2HF8Z128rmbk\000" |
| 54837 | /* 86621 */ "VCVTBIASPH2HF8Z128rmbk\000" |
| 54838 | /* 86644 */ "VCVTPH2HF8Z128rmbk\000" |
| 54839 | /* 86663 */ "VPMULTISHIFTQBZ128rmbk\000" |
| 54840 | /* 86686 */ "VPERMI2DZ128rmbk\000" |
| 54841 | /* 86703 */ "VPERMT2DZ128rmbk\000" |
| 54842 | /* 86720 */ "VPSUBDZ128rmbk\000" |
| 54843 | /* 86735 */ "VPADDDZ128rmbk\000" |
| 54844 | /* 86750 */ "VPANDDZ128rmbk\000" |
| 54845 | /* 86765 */ "VPMULLDZ128rmbk\000" |
| 54846 | /* 86781 */ "VPBLENDMDZ128rmbk\000" |
| 54847 | /* 86799 */ "VPTESTNMDZ128rmbk\000" |
| 54848 | /* 86817 */ "VPTESTMDZ128rmbk\000" |
| 54849 | /* 86834 */ "VPANDNDZ128rmbk\000" |
| 54850 | /* 86850 */ "VCVTPH2PDZ128rmbk\000" |
| 54851 | /* 86868 */ "VPERMI2PDZ128rmbk\000" |
| 54852 | /* 86886 */ "VCVTDQ2PDZ128rmbk\000" |
| 54853 | /* 86904 */ "VCVTUDQ2PDZ128rmbk\000" |
| 54854 | /* 86923 */ "VCVTQQ2PDZ128rmbk\000" |
| 54855 | /* 86941 */ "VCVTUQQ2PDZ128rmbk\000" |
| 54856 | /* 86960 */ "VCVTPS2PDZ128rmbk\000" |
| 54857 | /* 86978 */ "VPERMT2PDZ128rmbk\000" |
| 54858 | /* 86996 */ "VSUBPDZ128rmbk\000" |
| 54859 | /* 87011 */ "VMINCPDZ128rmbk\000" |
| 54860 | /* 87027 */ "VMAXCPDZ128rmbk\000" |
| 54861 | /* 87043 */ "VADDPDZ128rmbk\000" |
| 54862 | /* 87058 */ "VANDPDZ128rmbk\000" |
| 54863 | /* 87073 */ "VSCALEFPDZ128rmbk\000" |
| 54864 | /* 87091 */ "VUNPCKHPDZ128rmbk\000" |
| 54865 | /* 87109 */ "VPERMILPDZ128rmbk\000" |
| 54866 | /* 87127 */ "VUNPCKLPDZ128rmbk\000" |
| 54867 | /* 87145 */ "VMULPDZ128rmbk\000" |
| 54868 | /* 87160 */ "VBLENDMPDZ128rmbk\000" |
| 54869 | /* 87178 */ "VANDNPDZ128rmbk\000" |
| 54870 | /* 87194 */ "VMINPDZ128rmbk\000" |
| 54871 | /* 87209 */ "VORPDZ128rmbk\000" |
| 54872 | /* 87223 */ "VXORPDZ128rmbk\000" |
| 54873 | /* 87238 */ "VDIVPDZ128rmbk\000" |
| 54874 | /* 87253 */ "VMAXPDZ128rmbk\000" |
| 54875 | /* 87268 */ "VPCMPEQDZ128rmbk\000" |
| 54876 | /* 87285 */ "VPORDZ128rmbk\000" |
| 54877 | /* 87299 */ "VPXORDZ128rmbk\000" |
| 54878 | /* 87314 */ "VPABSDZ128rmbk\000" |
| 54879 | /* 87329 */ "VPMINSDZ128rmbk\000" |
| 54880 | /* 87345 */ "VPMAXSDZ128rmbk\000" |
| 54881 | /* 87361 */ "VPCONFLICTDZ128rmbk\000" |
| 54882 | /* 87381 */ "VPCMPGTDZ128rmbk\000" |
| 54883 | /* 87398 */ "VPOPCNTDZ128rmbk\000" |
| 54884 | /* 87415 */ "VPLZCNTDZ128rmbk\000" |
| 54885 | /* 87432 */ "VPMINUDZ128rmbk\000" |
| 54886 | /* 87448 */ "VPMAXUDZ128rmbk\000" |
| 54887 | /* 87464 */ "VPSRAVDZ128rmbk\000" |
| 54888 | /* 87480 */ "VPSLLVDZ128rmbk\000" |
| 54889 | /* 87496 */ "VPROLVDZ128rmbk\000" |
| 54890 | /* 87512 */ "VPSRLVDZ128rmbk\000" |
| 54891 | /* 87528 */ "VPRORVDZ128rmbk\000" |
| 54892 | /* 87544 */ "VCVTPD2PHZ128rmbk\000" |
| 54893 | /* 87562 */ "VCVTDQ2PHZ128rmbk\000" |
| 54894 | /* 87580 */ "VCVTUDQ2PHZ128rmbk\000" |
| 54895 | /* 87599 */ "VCVTQQ2PHZ128rmbk\000" |
| 54896 | /* 87617 */ "VCVTUQQ2PHZ128rmbk\000" |
| 54897 | /* 87636 */ "VCVTW2PHZ128rmbk\000" |
| 54898 | /* 87653 */ "VCVTUW2PHZ128rmbk\000" |
| 54899 | /* 87671 */ "VSUBPHZ128rmbk\000" |
| 54900 | /* 87686 */ "VFCMULCPHZ128rmbk\000" |
| 54901 | /* 87704 */ "VFMULCPHZ128rmbk\000" |
| 54902 | /* 87721 */ "VMINCPHZ128rmbk\000" |
| 54903 | /* 87737 */ "VMAXCPHZ128rmbk\000" |
| 54904 | /* 87753 */ "VADDPHZ128rmbk\000" |
| 54905 | /* 87768 */ "VSCALEFPHZ128rmbk\000" |
| 54906 | /* 87786 */ "VMULPHZ128rmbk\000" |
| 54907 | /* 87801 */ "VMINPHZ128rmbk\000" |
| 54908 | /* 87816 */ "VDIVPHZ128rmbk\000" |
| 54909 | /* 87831 */ "VMAXPHZ128rmbk\000" |
| 54910 | /* 87846 */ "VPERMI2QZ128rmbk\000" |
| 54911 | /* 87863 */ "VPERMT2QZ128rmbk\000" |
| 54912 | /* 87880 */ "VPSUBQZ128rmbk\000" |
| 54913 | /* 87895 */ "VCVTTPD2DQZ128rmbk\000" |
| 54914 | /* 87914 */ "VCVTPD2DQZ128rmbk\000" |
| 54915 | /* 87932 */ "VCVTTPH2DQZ128rmbk\000" |
| 54916 | /* 87951 */ "VCVTPH2DQZ128rmbk\000" |
| 54917 | /* 87969 */ "VCVTTPS2DQZ128rmbk\000" |
| 54918 | /* 87988 */ "VCVTPS2DQZ128rmbk\000" |
| 54919 | /* 88006 */ "VPADDQZ128rmbk\000" |
| 54920 | /* 88021 */ "VPUNPCKHDQZ128rmbk\000" |
| 54921 | /* 88040 */ "VPUNPCKLDQZ128rmbk\000" |
| 54922 | /* 88059 */ "VPMULDQZ128rmbk\000" |
| 54923 | /* 88075 */ "VPANDQZ128rmbk\000" |
| 54924 | /* 88090 */ "VPUNPCKHQDQZ128rmbk\000" |
| 54925 | /* 88110 */ "VPUNPCKLQDQZ128rmbk\000" |
| 54926 | /* 88130 */ "VCVTTPD2UDQZ128rmbk\000" |
| 54927 | /* 88150 */ "VCVTPD2UDQZ128rmbk\000" |
| 54928 | /* 88169 */ "VCVTTPH2UDQZ128rmbk\000" |
| 54929 | /* 88189 */ "VCVTPH2UDQZ128rmbk\000" |
| 54930 | /* 88208 */ "VCVTTPS2UDQZ128rmbk\000" |
| 54931 | /* 88228 */ "VCVTPS2UDQZ128rmbk\000" |
| 54932 | /* 88247 */ "VPMULUDQZ128rmbk\000" |
| 54933 | /* 88264 */ "VPMULLQZ128rmbk\000" |
| 54934 | /* 88280 */ "VPBLENDMQZ128rmbk\000" |
| 54935 | /* 88298 */ "VPTESTNMQZ128rmbk\000" |
| 54936 | /* 88316 */ "VPTESTMQZ128rmbk\000" |
| 54937 | /* 88333 */ "VPANDNQZ128rmbk\000" |
| 54938 | /* 88349 */ "VCVTTPD2QQZ128rmbk\000" |
| 54939 | /* 88368 */ "VCVTPD2QQZ128rmbk\000" |
| 54940 | /* 88386 */ "VCVTTPH2QQZ128rmbk\000" |
| 54941 | /* 88405 */ "VCVTPH2QQZ128rmbk\000" |
| 54942 | /* 88423 */ "VCVTTPS2QQZ128rmbk\000" |
| 54943 | /* 88442 */ "VCVTPS2QQZ128rmbk\000" |
| 54944 | /* 88460 */ "VPCMPEQQZ128rmbk\000" |
| 54945 | /* 88477 */ "VCVTTPD2UQQZ128rmbk\000" |
| 54946 | /* 88497 */ "VCVTPD2UQQZ128rmbk\000" |
| 54947 | /* 88516 */ "VCVTTPH2UQQZ128rmbk\000" |
| 54948 | /* 88536 */ "VCVTPH2UQQZ128rmbk\000" |
| 54949 | /* 88555 */ "VCVTTPS2UQQZ128rmbk\000" |
| 54950 | /* 88575 */ "VCVTPS2UQQZ128rmbk\000" |
| 54951 | /* 88594 */ "VPORQZ128rmbk\000" |
| 54952 | /* 88608 */ "VPXORQZ128rmbk\000" |
| 54953 | /* 88623 */ "VPABSQZ128rmbk\000" |
| 54954 | /* 88638 */ "VPMINSQZ128rmbk\000" |
| 54955 | /* 88654 */ "VPMAXSQZ128rmbk\000" |
| 54956 | /* 88670 */ "VPCONFLICTQZ128rmbk\000" |
| 54957 | /* 88690 */ "VPCMPGTQZ128rmbk\000" |
| 54958 | /* 88707 */ "VPOPCNTQZ128rmbk\000" |
| 54959 | /* 88724 */ "VPLZCNTQZ128rmbk\000" |
| 54960 | /* 88741 */ "VPMINUQZ128rmbk\000" |
| 54961 | /* 88757 */ "VPMAXUQZ128rmbk\000" |
| 54962 | /* 88773 */ "VPSRAVQZ128rmbk\000" |
| 54963 | /* 88789 */ "VPSLLVQZ128rmbk\000" |
| 54964 | /* 88805 */ "VPROLVQZ128rmbk\000" |
| 54965 | /* 88821 */ "VPSRLVQZ128rmbk\000" |
| 54966 | /* 88837 */ "VPRORVQZ128rmbk\000" |
| 54967 | /* 88853 */ "VCVT2PH2BF8SZ128rmbk\000" |
| 54968 | /* 88874 */ "VCVTBIASPH2BF8SZ128rmbk\000" |
| 54969 | /* 88898 */ "VCVTPH2BF8SZ128rmbk\000" |
| 54970 | /* 88918 */ "VCVT2PH2HF8SZ128rmbk\000" |
| 54971 | /* 88939 */ "VCVTBIASPH2HF8SZ128rmbk\000" |
| 54972 | /* 88963 */ "VCVTPH2HF8SZ128rmbk\000" |
| 54973 | /* 88983 */ "VCVTTBF162IBSZ128rmbk\000" |
| 54974 | /* 89005 */ "VCVTBF162IBSZ128rmbk\000" |
| 54975 | /* 89026 */ "VCVTTPH2IBSZ128rmbk\000" |
| 54976 | /* 89046 */ "VCVTPH2IBSZ128rmbk\000" |
| 54977 | /* 89065 */ "VCVTTPS2IBSZ128rmbk\000" |
| 54978 | /* 89085 */ "VCVTPS2IBSZ128rmbk\000" |
| 54979 | /* 89104 */ "VCVTTBF162IUBSZ128rmbk\000" |
| 54980 | /* 89127 */ "VCVTBF162IUBSZ128rmbk\000" |
| 54981 | /* 89149 */ "VCVTTPH2IUBSZ128rmbk\000" |
| 54982 | /* 89170 */ "VCVTPH2IUBSZ128rmbk\000" |
| 54983 | /* 89190 */ "VCVTTPS2IUBSZ128rmbk\000" |
| 54984 | /* 89211 */ "VCVTPS2IUBSZ128rmbk\000" |
| 54985 | /* 89231 */ "VCVTPD2PSZ128rmbk\000" |
| 54986 | /* 89249 */ "VPERMI2PSZ128rmbk\000" |
| 54987 | /* 89267 */ "VCVTDQ2PSZ128rmbk\000" |
| 54988 | /* 89285 */ "VCVTUDQ2PSZ128rmbk\000" |
| 54989 | /* 89304 */ "VCVTQQ2PSZ128rmbk\000" |
| 54990 | /* 89322 */ "VCVTUQQ2PSZ128rmbk\000" |
| 54991 | /* 89341 */ "VPERMT2PSZ128rmbk\000" |
| 54992 | /* 89359 */ "VSUBPSZ128rmbk\000" |
| 54993 | /* 89374 */ "VMINCPSZ128rmbk\000" |
| 54994 | /* 89390 */ "VMAXCPSZ128rmbk\000" |
| 54995 | /* 89406 */ "VADDPSZ128rmbk\000" |
| 54996 | /* 89421 */ "VANDPSZ128rmbk\000" |
| 54997 | /* 89436 */ "VSCALEFPSZ128rmbk\000" |
| 54998 | /* 89454 */ "VUNPCKHPSZ128rmbk\000" |
| 54999 | /* 89472 */ "VPERMILPSZ128rmbk\000" |
| 55000 | /* 89490 */ "VUNPCKLPSZ128rmbk\000" |
| 55001 | /* 89508 */ "VMULPSZ128rmbk\000" |
| 55002 | /* 89523 */ "VBLENDMPSZ128rmbk\000" |
| 55003 | /* 89541 */ "VANDNPSZ128rmbk\000" |
| 55004 | /* 89557 */ "VMINPSZ128rmbk\000" |
| 55005 | /* 89572 */ "VORPSZ128rmbk\000" |
| 55006 | /* 89586 */ "VXORPSZ128rmbk\000" |
| 55007 | /* 89601 */ "VDIVPSZ128rmbk\000" |
| 55008 | /* 89616 */ "VMAXPSZ128rmbk\000" |
| 55009 | /* 89631 */ "VCVTTPD2DQSZ128rmbk\000" |
| 55010 | /* 89651 */ "VCVTTPS2DQSZ128rmbk\000" |
| 55011 | /* 89671 */ "VCVTTPD2UDQSZ128rmbk\000" |
| 55012 | /* 89692 */ "VCVTTPS2UDQSZ128rmbk\000" |
| 55013 | /* 89713 */ "VCVTTPD2QQSZ128rmbk\000" |
| 55014 | /* 89733 */ "VCVTTPS2QQSZ128rmbk\000" |
| 55015 | /* 89753 */ "VCVTTPD2UQQSZ128rmbk\000" |
| 55016 | /* 89774 */ "VCVTTPS2UQQSZ128rmbk\000" |
| 55017 | /* 89795 */ "VCVTTPH2WZ128rmbk\000" |
| 55018 | /* 89813 */ "VCVTPH2WZ128rmbk\000" |
| 55019 | /* 89830 */ "VPACKSSDWZ128rmbk\000" |
| 55020 | /* 89848 */ "VPACKUSDWZ128rmbk\000" |
| 55021 | /* 89866 */ "VCVTTPH2UWZ128rmbk\000" |
| 55022 | /* 89885 */ "VCVTPH2UWZ128rmbk\000" |
| 55023 | /* 89903 */ "VCVT2PS2PHXZ128rmbk\000" |
| 55024 | /* 89923 */ "VCVTPS2PHXZ128rmbk\000" |
| 55025 | /* 89942 */ "VCVTPH2PSXZ128rmbk\000" |
| 55026 | /* 89961 */ "VCVTNE2PS2BF16Zrmbk\000" |
| 55027 | /* 89981 */ "VCVTNEPS2BF16Zrmbk\000" |
| 55028 | /* 90000 */ "VSUBBF16Zrmbk\000" |
| 55029 | /* 90014 */ "VADDBF16Zrmbk\000" |
| 55030 | /* 90028 */ "VSCALEFBF16Zrmbk\000" |
| 55031 | /* 90045 */ "VMULBF16Zrmbk\000" |
| 55032 | /* 90059 */ "VMINBF16Zrmbk\000" |
| 55033 | /* 90073 */ "VDIVBF16Zrmbk\000" |
| 55034 | /* 90087 */ "VMAXBF16Zrmbk\000" |
| 55035 | /* 90101 */ "VCVT2PH2BF8Zrmbk\000" |
| 55036 | /* 90118 */ "VCVTBIASPH2BF8Zrmbk\000" |
| 55037 | /* 90138 */ "VCVTPH2BF8Zrmbk\000" |
| 55038 | /* 90154 */ "VCVT2PH2HF8Zrmbk\000" |
| 55039 | /* 90171 */ "VCVTBIASPH2HF8Zrmbk\000" |
| 55040 | /* 90191 */ "VCVTPH2HF8Zrmbk\000" |
| 55041 | /* 90207 */ "VPMULTISHIFTQBZrmbk\000" |
| 55042 | /* 90227 */ "VPERMI2DZrmbk\000" |
| 55043 | /* 90241 */ "VPERMT2DZrmbk\000" |
| 55044 | /* 90255 */ "VPSUBDZrmbk\000" |
| 55045 | /* 90267 */ "VPADDDZrmbk\000" |
| 55046 | /* 90279 */ "VPANDDZrmbk\000" |
| 55047 | /* 90291 */ "VPMULLDZrmbk\000" |
| 55048 | /* 90304 */ "VPBLENDMDZrmbk\000" |
| 55049 | /* 90319 */ "VPTESTNMDZrmbk\000" |
| 55050 | /* 90334 */ "VPERMDZrmbk\000" |
| 55051 | /* 90346 */ "VPTESTMDZrmbk\000" |
| 55052 | /* 90360 */ "VPANDNDZrmbk\000" |
| 55053 | /* 90373 */ "VCVTPH2PDZrmbk\000" |
| 55054 | /* 90388 */ "VPERMI2PDZrmbk\000" |
| 55055 | /* 90403 */ "VCVTDQ2PDZrmbk\000" |
| 55056 | /* 90418 */ "VCVTUDQ2PDZrmbk\000" |
| 55057 | /* 90434 */ "VCVTQQ2PDZrmbk\000" |
| 55058 | /* 90449 */ "VCVTUQQ2PDZrmbk\000" |
| 55059 | /* 90465 */ "VCVTPS2PDZrmbk\000" |
| 55060 | /* 90480 */ "VPERMT2PDZrmbk\000" |
| 55061 | /* 90495 */ "VSUBPDZrmbk\000" |
| 55062 | /* 90507 */ "VMINCPDZrmbk\000" |
| 55063 | /* 90520 */ "VMAXCPDZrmbk\000" |
| 55064 | /* 90533 */ "VADDPDZrmbk\000" |
| 55065 | /* 90545 */ "VANDPDZrmbk\000" |
| 55066 | /* 90557 */ "VSCALEFPDZrmbk\000" |
| 55067 | /* 90572 */ "VUNPCKHPDZrmbk\000" |
| 55068 | /* 90587 */ "VPERMILPDZrmbk\000" |
| 55069 | /* 90602 */ "VUNPCKLPDZrmbk\000" |
| 55070 | /* 90617 */ "VMULPDZrmbk\000" |
| 55071 | /* 90629 */ "VBLENDMPDZrmbk\000" |
| 55072 | /* 90644 */ "VPERMPDZrmbk\000" |
| 55073 | /* 90657 */ "VANDNPDZrmbk\000" |
| 55074 | /* 90670 */ "VMINPDZrmbk\000" |
| 55075 | /* 90682 */ "VORPDZrmbk\000" |
| 55076 | /* 90693 */ "VXORPDZrmbk\000" |
| 55077 | /* 90705 */ "VDIVPDZrmbk\000" |
| 55078 | /* 90717 */ "VMAXPDZrmbk\000" |
| 55079 | /* 90729 */ "VPCMPEQDZrmbk\000" |
| 55080 | /* 90743 */ "VPORDZrmbk\000" |
| 55081 | /* 90754 */ "VPXORDZrmbk\000" |
| 55082 | /* 90766 */ "VPABSDZrmbk\000" |
| 55083 | /* 90778 */ "VPMINSDZrmbk\000" |
| 55084 | /* 90791 */ "VPMAXSDZrmbk\000" |
| 55085 | /* 90804 */ "VPCONFLICTDZrmbk\000" |
| 55086 | /* 90821 */ "VPCMPGTDZrmbk\000" |
| 55087 | /* 90835 */ "VPOPCNTDZrmbk\000" |
| 55088 | /* 90849 */ "VPLZCNTDZrmbk\000" |
| 55089 | /* 90863 */ "VPMINUDZrmbk\000" |
| 55090 | /* 90876 */ "VPMAXUDZrmbk\000" |
| 55091 | /* 90889 */ "VPSRAVDZrmbk\000" |
| 55092 | /* 90902 */ "VPSLLVDZrmbk\000" |
| 55093 | /* 90915 */ "VPROLVDZrmbk\000" |
| 55094 | /* 90928 */ "VPSRLVDZrmbk\000" |
| 55095 | /* 90941 */ "VPRORVDZrmbk\000" |
| 55096 | /* 90954 */ "VCVTPD2PHZrmbk\000" |
| 55097 | /* 90969 */ "VCVTDQ2PHZrmbk\000" |
| 55098 | /* 90984 */ "VCVTUDQ2PHZrmbk\000" |
| 55099 | /* 91000 */ "VCVTQQ2PHZrmbk\000" |
| 55100 | /* 91015 */ "VCVTUQQ2PHZrmbk\000" |
| 55101 | /* 91031 */ "VCVTW2PHZrmbk\000" |
| 55102 | /* 91045 */ "VCVTUW2PHZrmbk\000" |
| 55103 | /* 91060 */ "VSUBPHZrmbk\000" |
| 55104 | /* 91072 */ "VFCMULCPHZrmbk\000" |
| 55105 | /* 91087 */ "VFMULCPHZrmbk\000" |
| 55106 | /* 91101 */ "VMINCPHZrmbk\000" |
| 55107 | /* 91114 */ "VMAXCPHZrmbk\000" |
| 55108 | /* 91127 */ "VADDPHZrmbk\000" |
| 55109 | /* 91139 */ "VSCALEFPHZrmbk\000" |
| 55110 | /* 91154 */ "VMULPHZrmbk\000" |
| 55111 | /* 91166 */ "VMINPHZrmbk\000" |
| 55112 | /* 91178 */ "VDIVPHZrmbk\000" |
| 55113 | /* 91190 */ "VMAXPHZrmbk\000" |
| 55114 | /* 91202 */ "VPERMI2QZrmbk\000" |
| 55115 | /* 91216 */ "VPERMT2QZrmbk\000" |
| 55116 | /* 91230 */ "VPSUBQZrmbk\000" |
| 55117 | /* 91242 */ "VCVTTPD2DQZrmbk\000" |
| 55118 | /* 91258 */ "VCVTPD2DQZrmbk\000" |
| 55119 | /* 91273 */ "VCVTTPH2DQZrmbk\000" |
| 55120 | /* 91289 */ "VCVTPH2DQZrmbk\000" |
| 55121 | /* 91304 */ "VCVTTPS2DQZrmbk\000" |
| 55122 | /* 91320 */ "VCVTPS2DQZrmbk\000" |
| 55123 | /* 91335 */ "VPADDQZrmbk\000" |
| 55124 | /* 91347 */ "VPUNPCKHDQZrmbk\000" |
| 55125 | /* 91363 */ "VPUNPCKLDQZrmbk\000" |
| 55126 | /* 91379 */ "VPMULDQZrmbk\000" |
| 55127 | /* 91392 */ "VPANDQZrmbk\000" |
| 55128 | /* 91404 */ "VPUNPCKHQDQZrmbk\000" |
| 55129 | /* 91421 */ "VPUNPCKLQDQZrmbk\000" |
| 55130 | /* 91438 */ "VCVTTPD2UDQZrmbk\000" |
| 55131 | /* 91455 */ "VCVTPD2UDQZrmbk\000" |
| 55132 | /* 91471 */ "VCVTTPH2UDQZrmbk\000" |
| 55133 | /* 91488 */ "VCVTPH2UDQZrmbk\000" |
| 55134 | /* 91504 */ "VCVTTPS2UDQZrmbk\000" |
| 55135 | /* 91521 */ "VCVTPS2UDQZrmbk\000" |
| 55136 | /* 91537 */ "VPMULUDQZrmbk\000" |
| 55137 | /* 91551 */ "VPMULLQZrmbk\000" |
| 55138 | /* 91564 */ "VPBLENDMQZrmbk\000" |
| 55139 | /* 91579 */ "VPTESTNMQZrmbk\000" |
| 55140 | /* 91594 */ "VPERMQZrmbk\000" |
| 55141 | /* 91606 */ "VPTESTMQZrmbk\000" |
| 55142 | /* 91620 */ "VPANDNQZrmbk\000" |
| 55143 | /* 91633 */ "VCVTTPD2QQZrmbk\000" |
| 55144 | /* 91649 */ "VCVTPD2QQZrmbk\000" |
| 55145 | /* 91664 */ "VCVTTPH2QQZrmbk\000" |
| 55146 | /* 91680 */ "VCVTPH2QQZrmbk\000" |
| 55147 | /* 91695 */ "VCVTTPS2QQZrmbk\000" |
| 55148 | /* 91711 */ "VCVTPS2QQZrmbk\000" |
| 55149 | /* 91726 */ "VPCMPEQQZrmbk\000" |
| 55150 | /* 91740 */ "VCVTTPD2UQQZrmbk\000" |
| 55151 | /* 91757 */ "VCVTPD2UQQZrmbk\000" |
| 55152 | /* 91773 */ "VCVTTPH2UQQZrmbk\000" |
| 55153 | /* 91790 */ "VCVTPH2UQQZrmbk\000" |
| 55154 | /* 91806 */ "VCVTTPS2UQQZrmbk\000" |
| 55155 | /* 91823 */ "VCVTPS2UQQZrmbk\000" |
| 55156 | /* 91839 */ "VPORQZrmbk\000" |
| 55157 | /* 91850 */ "VPXORQZrmbk\000" |
| 55158 | /* 91862 */ "VPABSQZrmbk\000" |
| 55159 | /* 91874 */ "VPMINSQZrmbk\000" |
| 55160 | /* 91887 */ "VPMAXSQZrmbk\000" |
| 55161 | /* 91900 */ "VPCONFLICTQZrmbk\000" |
| 55162 | /* 91917 */ "VPCMPGTQZrmbk\000" |
| 55163 | /* 91931 */ "VPOPCNTQZrmbk\000" |
| 55164 | /* 91945 */ "VPLZCNTQZrmbk\000" |
| 55165 | /* 91959 */ "VPMINUQZrmbk\000" |
| 55166 | /* 91972 */ "VPMAXUQZrmbk\000" |
| 55167 | /* 91985 */ "VPSRAVQZrmbk\000" |
| 55168 | /* 91998 */ "VPSLLVQZrmbk\000" |
| 55169 | /* 92011 */ "VPROLVQZrmbk\000" |
| 55170 | /* 92024 */ "VPSRLVQZrmbk\000" |
| 55171 | /* 92037 */ "VPRORVQZrmbk\000" |
| 55172 | /* 92050 */ "VCVT2PH2BF8SZrmbk\000" |
| 55173 | /* 92068 */ "VCVTBIASPH2BF8SZrmbk\000" |
| 55174 | /* 92089 */ "VCVTPH2BF8SZrmbk\000" |
| 55175 | /* 92106 */ "VCVT2PH2HF8SZrmbk\000" |
| 55176 | /* 92124 */ "VCVTBIASPH2HF8SZrmbk\000" |
| 55177 | /* 92145 */ "VCVTPH2HF8SZrmbk\000" |
| 55178 | /* 92162 */ "VCVTTBF162IBSZrmbk\000" |
| 55179 | /* 92181 */ "VCVTBF162IBSZrmbk\000" |
| 55180 | /* 92199 */ "VCVTTPH2IBSZrmbk\000" |
| 55181 | /* 92216 */ "VCVTPH2IBSZrmbk\000" |
| 55182 | /* 92232 */ "VCVTTPS2IBSZrmbk\000" |
| 55183 | /* 92249 */ "VCVTPS2IBSZrmbk\000" |
| 55184 | /* 92265 */ "VCVTTBF162IUBSZrmbk\000" |
| 55185 | /* 92285 */ "VCVTBF162IUBSZrmbk\000" |
| 55186 | /* 92304 */ "VCVTTPH2IUBSZrmbk\000" |
| 55187 | /* 92322 */ "VCVTPH2IUBSZrmbk\000" |
| 55188 | /* 92339 */ "VCVTTPS2IUBSZrmbk\000" |
| 55189 | /* 92357 */ "VCVTPS2IUBSZrmbk\000" |
| 55190 | /* 92374 */ "VCVTPD2PSZrmbk\000" |
| 55191 | /* 92389 */ "VPERMI2PSZrmbk\000" |
| 55192 | /* 92404 */ "VCVTDQ2PSZrmbk\000" |
| 55193 | /* 92419 */ "VCVTUDQ2PSZrmbk\000" |
| 55194 | /* 92435 */ "VCVTQQ2PSZrmbk\000" |
| 55195 | /* 92450 */ "VCVTUQQ2PSZrmbk\000" |
| 55196 | /* 92466 */ "VPERMT2PSZrmbk\000" |
| 55197 | /* 92481 */ "VSUBPSZrmbk\000" |
| 55198 | /* 92493 */ "VMINCPSZrmbk\000" |
| 55199 | /* 92506 */ "VMAXCPSZrmbk\000" |
| 55200 | /* 92519 */ "VADDPSZrmbk\000" |
| 55201 | /* 92531 */ "VANDPSZrmbk\000" |
| 55202 | /* 92543 */ "VSCALEFPSZrmbk\000" |
| 55203 | /* 92558 */ "VUNPCKHPSZrmbk\000" |
| 55204 | /* 92573 */ "VPERMILPSZrmbk\000" |
| 55205 | /* 92588 */ "VUNPCKLPSZrmbk\000" |
| 55206 | /* 92603 */ "VMULPSZrmbk\000" |
| 55207 | /* 92615 */ "VBLENDMPSZrmbk\000" |
| 55208 | /* 92630 */ "VPERMPSZrmbk\000" |
| 55209 | /* 92643 */ "VANDNPSZrmbk\000" |
| 55210 | /* 92656 */ "VMINPSZrmbk\000" |
| 55211 | /* 92668 */ "VORPSZrmbk\000" |
| 55212 | /* 92679 */ "VXORPSZrmbk\000" |
| 55213 | /* 92691 */ "VDIVPSZrmbk\000" |
| 55214 | /* 92703 */ "VMAXPSZrmbk\000" |
| 55215 | /* 92715 */ "VCVTTPD2DQSZrmbk\000" |
| 55216 | /* 92732 */ "VCVTTPS2DQSZrmbk\000" |
| 55217 | /* 92749 */ "VCVTTPD2UDQSZrmbk\000" |
| 55218 | /* 92767 */ "VCVTTPS2UDQSZrmbk\000" |
| 55219 | /* 92785 */ "VCVTTPD2QQSZrmbk\000" |
| 55220 | /* 92802 */ "VCVTTPS2QQSZrmbk\000" |
| 55221 | /* 92819 */ "VCVTTPD2UQQSZrmbk\000" |
| 55222 | /* 92837 */ "VCVTTPS2UQQSZrmbk\000" |
| 55223 | /* 92855 */ "VCVTTPH2WZrmbk\000" |
| 55224 | /* 92870 */ "VCVTPH2WZrmbk\000" |
| 55225 | /* 92884 */ "VPACKSSDWZrmbk\000" |
| 55226 | /* 92899 */ "VPACKUSDWZrmbk\000" |
| 55227 | /* 92914 */ "VCVTTPH2UWZrmbk\000" |
| 55228 | /* 92930 */ "VCVTPH2UWZrmbk\000" |
| 55229 | /* 92945 */ "VCVT2PS2PHXZrmbk\000" |
| 55230 | /* 92962 */ "VCVTPS2PHXZrmbk\000" |
| 55231 | /* 92978 */ "VCVTPH2PSXZrmbk\000" |
| 55232 | /* 92994 */ "VFMADDSUB231PDZrbk\000" |
| 55233 | /* 93013 */ "VFMSUB231PDZrbk\000" |
| 55234 | /* 93029 */ "VFNMSUB231PDZrbk\000" |
| 55235 | /* 93046 */ "VFMSUBADD231PDZrbk\000" |
| 55236 | /* 93065 */ "VFMADD231PDZrbk\000" |
| 55237 | /* 93081 */ "VFNMADD231PDZrbk\000" |
| 55238 | /* 93098 */ "VFMADDSUB132PDZrbk\000" |
| 55239 | /* 93117 */ "VFMSUB132PDZrbk\000" |
| 55240 | /* 93133 */ "VFNMSUB132PDZrbk\000" |
| 55241 | /* 93150 */ "VFMSUBADD132PDZrbk\000" |
| 55242 | /* 93169 */ "VFMADD132PDZrbk\000" |
| 55243 | /* 93185 */ "VFNMADD132PDZrbk\000" |
| 55244 | /* 93202 */ "VEXP2PDZrbk\000" |
| 55245 | /* 93214 */ "VFMADDSUB213PDZrbk\000" |
| 55246 | /* 93233 */ "VFMSUB213PDZrbk\000" |
| 55247 | /* 93249 */ "VFNMSUB213PDZrbk\000" |
| 55248 | /* 93266 */ "VFMSUBADD213PDZrbk\000" |
| 55249 | /* 93285 */ "VFMADD213PDZrbk\000" |
| 55250 | /* 93301 */ "VFNMADD213PDZrbk\000" |
| 55251 | /* 93318 */ "VRCP28PDZrbk\000" |
| 55252 | /* 93331 */ "VRSQRT28PDZrbk\000" |
| 55253 | /* 93346 */ "VGETEXPPDZrbk\000" |
| 55254 | /* 93360 */ "VSQRTPDZrbk\000" |
| 55255 | /* 93372 */ "VRCP28SDZrbk\000" |
| 55256 | /* 93385 */ "VRSQRT28SDZrbk\000" |
| 55257 | /* 93400 */ "VGETEXPSDZrbk\000" |
| 55258 | /* 93414 */ "VFMADDSUB231PHZrbk\000" |
| 55259 | /* 93433 */ "VFMSUB231PHZrbk\000" |
| 55260 | /* 93449 */ "VFNMSUB231PHZrbk\000" |
| 55261 | /* 93466 */ "VFMSUBADD231PHZrbk\000" |
| 55262 | /* 93485 */ "VFMADD231PHZrbk\000" |
| 55263 | /* 93501 */ "VFNMADD231PHZrbk\000" |
| 55264 | /* 93518 */ "VFMADDSUB132PHZrbk\000" |
| 55265 | /* 93537 */ "VFMSUB132PHZrbk\000" |
| 55266 | /* 93553 */ "VFNMSUB132PHZrbk\000" |
| 55267 | /* 93570 */ "VFMSUBADD132PHZrbk\000" |
| 55268 | /* 93589 */ "VFMADD132PHZrbk\000" |
| 55269 | /* 93605 */ "VFNMADD132PHZrbk\000" |
| 55270 | /* 93622 */ "VFMADDSUB213PHZrbk\000" |
| 55271 | /* 93641 */ "VFMSUB213PHZrbk\000" |
| 55272 | /* 93657 */ "VFNMSUB213PHZrbk\000" |
| 55273 | /* 93674 */ "VFMSUBADD213PHZrbk\000" |
| 55274 | /* 93693 */ "VFMADD213PHZrbk\000" |
| 55275 | /* 93709 */ "VFNMADD213PHZrbk\000" |
| 55276 | /* 93726 */ "VFCMADDCPHZrbk\000" |
| 55277 | /* 93741 */ "VFMADDCPHZrbk\000" |
| 55278 | /* 93755 */ "VGETEXPPHZrbk\000" |
| 55279 | /* 93769 */ "VSQRTPHZrbk\000" |
| 55280 | /* 93781 */ "VFCMADDCSHZrbk\000" |
| 55281 | /* 93796 */ "VFMADDCSHZrbk\000" |
| 55282 | /* 93810 */ "VGETEXPSHZrbk\000" |
| 55283 | /* 93824 */ "VFMADDSUB231PSZrbk\000" |
| 55284 | /* 93843 */ "VFMSUB231PSZrbk\000" |
| 55285 | /* 93859 */ "VFNMSUB231PSZrbk\000" |
| 55286 | /* 93876 */ "VFMSUBADD231PSZrbk\000" |
| 55287 | /* 93895 */ "VFMADD231PSZrbk\000" |
| 55288 | /* 93911 */ "VFNMADD231PSZrbk\000" |
| 55289 | /* 93928 */ "VFMADDSUB132PSZrbk\000" |
| 55290 | /* 93947 */ "VFMSUB132PSZrbk\000" |
| 55291 | /* 93963 */ "VFNMSUB132PSZrbk\000" |
| 55292 | /* 93980 */ "VFMSUBADD132PSZrbk\000" |
| 55293 | /* 93999 */ "VFMADD132PSZrbk\000" |
| 55294 | /* 94015 */ "VFNMADD132PSZrbk\000" |
| 55295 | /* 94032 */ "VEXP2PSZrbk\000" |
| 55296 | /* 94044 */ "VFMADDSUB213PSZrbk\000" |
| 55297 | /* 94063 */ "VFMSUB213PSZrbk\000" |
| 55298 | /* 94079 */ "VFNMSUB213PSZrbk\000" |
| 55299 | /* 94096 */ "VFMSUBADD213PSZrbk\000" |
| 55300 | /* 94115 */ "VFMADD213PSZrbk\000" |
| 55301 | /* 94131 */ "VFNMADD213PSZrbk\000" |
| 55302 | /* 94148 */ "VRCP28PSZrbk\000" |
| 55303 | /* 94161 */ "VRSQRT28PSZrbk\000" |
| 55304 | /* 94176 */ "VGETEXPPSZrbk\000" |
| 55305 | /* 94190 */ "VSQRTPSZrbk\000" |
| 55306 | /* 94202 */ "VRCP28SSZrbk\000" |
| 55307 | /* 94215 */ "VRSQRT28SSZrbk\000" |
| 55308 | /* 94230 */ "VGETEXPSSZrbk\000" |
| 55309 | /* 94244 */ "VCVTTPD2DQSZ256rrbk\000" |
| 55310 | /* 94264 */ "VCVTTPD2UDQSZ256rrbk\000" |
| 55311 | /* 94285 */ "VCVTTPD2QQSZ256rrbk\000" |
| 55312 | /* 94305 */ "VCVTTPS2QQSZ256rrbk\000" |
| 55313 | /* 94325 */ "VCVTTPD2UQQSZ256rrbk\000" |
| 55314 | /* 94346 */ "VCVTTPS2UQQSZ256rrbk\000" |
| 55315 | /* 94367 */ "VCVTPH2PDZrrbk\000" |
| 55316 | /* 94382 */ "VCVTQQ2PDZrrbk\000" |
| 55317 | /* 94397 */ "VCVTUQQ2PDZrrbk\000" |
| 55318 | /* 94413 */ "VCVTPS2PDZrrbk\000" |
| 55319 | /* 94428 */ "VSUBPDZrrbk\000" |
| 55320 | /* 94440 */ "VADDPDZrrbk\000" |
| 55321 | /* 94452 */ "VSCALEFPDZrrbk\000" |
| 55322 | /* 94467 */ "VMULPDZrrbk\000" |
| 55323 | /* 94479 */ "VMINPDZrrbk\000" |
| 55324 | /* 94491 */ "VDIVPDZrrbk\000" |
| 55325 | /* 94503 */ "VMAXPDZrrbk\000" |
| 55326 | /* 94515 */ "VCVTPD2PHZrrbk\000" |
| 55327 | /* 94530 */ "VCVTDQ2PHZrrbk\000" |
| 55328 | /* 94545 */ "VCVTUDQ2PHZrrbk\000" |
| 55329 | /* 94561 */ "VCVTQQ2PHZrrbk\000" |
| 55330 | /* 94576 */ "VCVTUQQ2PHZrrbk\000" |
| 55331 | /* 94592 */ "VCVTPS2PHZrrbk\000" |
| 55332 | /* 94607 */ "VCVTW2PHZrrbk\000" |
| 55333 | /* 94621 */ "VCVTUW2PHZrrbk\000" |
| 55334 | /* 94636 */ "VSUBPHZrrbk\000" |
| 55335 | /* 94648 */ "VFCMULCPHZrrbk\000" |
| 55336 | /* 94663 */ "VFMULCPHZrrbk\000" |
| 55337 | /* 94677 */ "VADDPHZrrbk\000" |
| 55338 | /* 94689 */ "VSCALEFPHZrrbk\000" |
| 55339 | /* 94704 */ "VMULPHZrrbk\000" |
| 55340 | /* 94716 */ "VMINPHZrrbk\000" |
| 55341 | /* 94728 */ "VDIVPHZrrbk\000" |
| 55342 | /* 94740 */ "VMAXPHZrrbk\000" |
| 55343 | /* 94752 */ "VFCMULCSHZrrbk\000" |
| 55344 | /* 94767 */ "VFMULCSHZrrbk\000" |
| 55345 | /* 94781 */ "VCVTTPD2DQZrrbk\000" |
| 55346 | /* 94797 */ "VCVTPD2DQZrrbk\000" |
| 55347 | /* 94812 */ "VCVTTPH2DQZrrbk\000" |
| 55348 | /* 94828 */ "VCVTPH2DQZrrbk\000" |
| 55349 | /* 94843 */ "VCVTTPS2DQZrrbk\000" |
| 55350 | /* 94859 */ "VCVTPS2DQZrrbk\000" |
| 55351 | /* 94874 */ "VCVTTPD2UDQZrrbk\000" |
| 55352 | /* 94891 */ "VCVTPD2UDQZrrbk\000" |
| 55353 | /* 94907 */ "VCVTTPH2UDQZrrbk\000" |
| 55354 | /* 94924 */ "VCVTPH2UDQZrrbk\000" |
| 55355 | /* 94940 */ "VCVTTPS2UDQZrrbk\000" |
| 55356 | /* 94957 */ "VCVTPS2UDQZrrbk\000" |
| 55357 | /* 94973 */ "VCVTTPD2QQZrrbk\000" |
| 55358 | /* 94989 */ "VCVTPD2QQZrrbk\000" |
| 55359 | /* 95004 */ "VCVTTPH2QQZrrbk\000" |
| 55360 | /* 95020 */ "VCVTPH2QQZrrbk\000" |
| 55361 | /* 95035 */ "VCVTTPS2QQZrrbk\000" |
| 55362 | /* 95051 */ "VCVTPS2QQZrrbk\000" |
| 55363 | /* 95066 */ "VCVTTPD2UQQZrrbk\000" |
| 55364 | /* 95083 */ "VCVTPD2UQQZrrbk\000" |
| 55365 | /* 95099 */ "VCVTTPH2UQQZrrbk\000" |
| 55366 | /* 95116 */ "VCVTPH2UQQZrrbk\000" |
| 55367 | /* 95132 */ "VCVTTPS2UQQZrrbk\000" |
| 55368 | /* 95149 */ "VCVTPS2UQQZrrbk\000" |
| 55369 | /* 95165 */ "VCVTTPH2IBSZrrbk\000" |
| 55370 | /* 95182 */ "VCVTPH2IBSZrrbk\000" |
| 55371 | /* 95198 */ "VCVTTPS2IBSZrrbk\000" |
| 55372 | /* 95215 */ "VCVTPS2IBSZrrbk\000" |
| 55373 | /* 95231 */ "VCVTTPH2IUBSZrrbk\000" |
| 55374 | /* 95249 */ "VCVTPH2IUBSZrrbk\000" |
| 55375 | /* 95266 */ "VCVTTPS2IUBSZrrbk\000" |
| 55376 | /* 95284 */ "VCVTPS2IUBSZrrbk\000" |
| 55377 | /* 95301 */ "VCVTPD2PSZrrbk\000" |
| 55378 | /* 95316 */ "VCVTPH2PSZrrbk\000" |
| 55379 | /* 95331 */ "VCVTDQ2PSZrrbk\000" |
| 55380 | /* 95346 */ "VCVTUDQ2PSZrrbk\000" |
| 55381 | /* 95362 */ "VCVTQQ2PSZrrbk\000" |
| 55382 | /* 95377 */ "VCVTUQQ2PSZrrbk\000" |
| 55383 | /* 95393 */ "VSUBPSZrrbk\000" |
| 55384 | /* 95405 */ "VADDPSZrrbk\000" |
| 55385 | /* 95417 */ "VSCALEFPSZrrbk\000" |
| 55386 | /* 95432 */ "VMULPSZrrbk\000" |
| 55387 | /* 95444 */ "VMINPSZrrbk\000" |
| 55388 | /* 95456 */ "VDIVPSZrrbk\000" |
| 55389 | /* 95468 */ "VMAXPSZrrbk\000" |
| 55390 | /* 95480 */ "VCVTTPD2DQSZrrbk\000" |
| 55391 | /* 95497 */ "VCVTTPS2DQSZrrbk\000" |
| 55392 | /* 95514 */ "VCVTTPD2UDQSZrrbk\000" |
| 55393 | /* 95532 */ "VCVTTPS2UDQSZrrbk\000" |
| 55394 | /* 95550 */ "VCVTTPD2QQSZrrbk\000" |
| 55395 | /* 95567 */ "VCVTTPS2QQSZrrbk\000" |
| 55396 | /* 95584 */ "VCVTTPD2UQQSZrrbk\000" |
| 55397 | /* 95602 */ "VCVTTPS2UQQSZrrbk\000" |
| 55398 | /* 95620 */ "VCVTTPH2WZrrbk\000" |
| 55399 | /* 95635 */ "VCVTPH2WZrrbk\000" |
| 55400 | /* 95649 */ "VCVTTPH2UWZrrbk\000" |
| 55401 | /* 95665 */ "VCVTPH2UWZrrbk\000" |
| 55402 | /* 95680 */ "VCVT2PS2PHXZrrbk\000" |
| 55403 | /* 95697 */ "VCVTPS2PHXZrrbk\000" |
| 55404 | /* 95713 */ "VCVTPH2PSXZrrbk\000" |
| 55405 | /* 95729 */ "VFPCLASSBF16Z256mbik\000" |
| 55406 | /* 95750 */ "VPSRADZ256mbik\000" |
| 55407 | /* 95765 */ "VPSHUFDZ256mbik\000" |
| 55408 | /* 95781 */ "VPSLLDZ256mbik\000" |
| 55409 | /* 95796 */ "VPROLDZ256mbik\000" |
| 55410 | /* 95811 */ "VPSRLDZ256mbik\000" |
| 55411 | /* 95826 */ "VPERMILPDZ256mbik\000" |
| 55412 | /* 95844 */ "VPERMPDZ256mbik\000" |
| 55413 | /* 95860 */ "VFPCLASSPDZ256mbik\000" |
| 55414 | /* 95879 */ "VPRORDZ256mbik\000" |
| 55415 | /* 95894 */ "VFPCLASSPHZ256mbik\000" |
| 55416 | /* 95913 */ "VPSRAQZ256mbik\000" |
| 55417 | /* 95928 */ "VPSLLQZ256mbik\000" |
| 55418 | /* 95943 */ "VPROLQZ256mbik\000" |
| 55419 | /* 95958 */ "VPSRLQZ256mbik\000" |
| 55420 | /* 95973 */ "VPERMQZ256mbik\000" |
| 55421 | /* 95988 */ "VPRORQZ256mbik\000" |
| 55422 | /* 96003 */ "VPERMILPSZ256mbik\000" |
| 55423 | /* 96021 */ "VFPCLASSPSZ256mbik\000" |
| 55424 | /* 96040 */ "VFPCLASSBF16Z128mbik\000" |
| 55425 | /* 96061 */ "VPSRADZ128mbik\000" |
| 55426 | /* 96076 */ "VPSHUFDZ128mbik\000" |
| 55427 | /* 96092 */ "VPSLLDZ128mbik\000" |
| 55428 | /* 96107 */ "VPROLDZ128mbik\000" |
| 55429 | /* 96122 */ "VPSRLDZ128mbik\000" |
| 55430 | /* 96137 */ "VPERMILPDZ128mbik\000" |
| 55431 | /* 96155 */ "VFPCLASSPDZ128mbik\000" |
| 55432 | /* 96174 */ "VPRORDZ128mbik\000" |
| 55433 | /* 96189 */ "VFPCLASSPHZ128mbik\000" |
| 55434 | /* 96208 */ "VPSRAQZ128mbik\000" |
| 55435 | /* 96223 */ "VPSLLQZ128mbik\000" |
| 55436 | /* 96238 */ "VPROLQZ128mbik\000" |
| 55437 | /* 96253 */ "VPSRLQZ128mbik\000" |
| 55438 | /* 96268 */ "VPRORQZ128mbik\000" |
| 55439 | /* 96283 */ "VPERMILPSZ128mbik\000" |
| 55440 | /* 96301 */ "VFPCLASSPSZ128mbik\000" |
| 55441 | /* 96320 */ "VFPCLASSBF16Zmbik\000" |
| 55442 | /* 96338 */ "VPSRADZmbik\000" |
| 55443 | /* 96350 */ "VPSHUFDZmbik\000" |
| 55444 | /* 96363 */ "VPSLLDZmbik\000" |
| 55445 | /* 96375 */ "VPROLDZmbik\000" |
| 55446 | /* 96387 */ "VPSRLDZmbik\000" |
| 55447 | /* 96399 */ "VPERMILPDZmbik\000" |
| 55448 | /* 96414 */ "VPERMPDZmbik\000" |
| 55449 | /* 96427 */ "VFPCLASSPDZmbik\000" |
| 55450 | /* 96443 */ "VPRORDZmbik\000" |
| 55451 | /* 96455 */ "VFPCLASSPHZmbik\000" |
| 55452 | /* 96471 */ "VPSRAQZmbik\000" |
| 55453 | /* 96483 */ "VPSLLQZmbik\000" |
| 55454 | /* 96495 */ "VPROLQZmbik\000" |
| 55455 | /* 96507 */ "VPSRLQZmbik\000" |
| 55456 | /* 96519 */ "VPERMQZmbik\000" |
| 55457 | /* 96531 */ "VPRORQZmbik\000" |
| 55458 | /* 96543 */ "VPERMILPSZmbik\000" |
| 55459 | /* 96558 */ "VFPCLASSPSZmbik\000" |
| 55460 | /* 96574 */ "VSHUFF64X2Z256rmbik\000" |
| 55461 | /* 96594 */ "VSHUFI64X2Z256rmbik\000" |
| 55462 | /* 96614 */ "VSHUFF32X4Z256rmbik\000" |
| 55463 | /* 96634 */ "VSHUFI32X4Z256rmbik\000" |
| 55464 | /* 96654 */ "VREDUCEBF16Z256rmbik\000" |
| 55465 | /* 96675 */ "VRNDSCALEBF16Z256rmbik\000" |
| 55466 | /* 96698 */ "VCMPBF16Z256rmbik\000" |
| 55467 | /* 96716 */ "VGETMANTBF16Z256rmbik\000" |
| 55468 | /* 96738 */ "VMINMAXBF16Z256rmbik\000" |
| 55469 | /* 96759 */ "VGF2P8AFFINEQBZ256rmbik\000" |
| 55470 | /* 96783 */ "VGF2P8AFFINEINVQBZ256rmbik\000" |
| 55471 | /* 96810 */ "VPSHLDDZ256rmbik\000" |
| 55472 | /* 96827 */ "VPSHRDDZ256rmbik\000" |
| 55473 | /* 96844 */ "VPTERNLOGDZ256rmbik\000" |
| 55474 | /* 96864 */ "VALIGNDZ256rmbik\000" |
| 55475 | /* 96881 */ "VREDUCEPDZ256rmbik\000" |
| 55476 | /* 96900 */ "VRANGEPDZ256rmbik\000" |
| 55477 | /* 96918 */ "VRNDSCALEPDZ256rmbik\000" |
| 55478 | /* 96939 */ "VSHUFPDZ256rmbik\000" |
| 55479 | /* 96956 */ "VPCMPDZ256rmbik\000" |
| 55480 | /* 96972 */ "VFIXUPIMMPDZ256rmbik\000" |
| 55481 | /* 96993 */ "VCMPPDZ256rmbik\000" |
| 55482 | /* 97009 */ "VGETMANTPDZ256rmbik\000" |
| 55483 | /* 97029 */ "VMINMAXPDZ256rmbik\000" |
| 55484 | /* 97048 */ "VPCMPUDZ256rmbik\000" |
| 55485 | /* 97065 */ "VREDUCEPHZ256rmbik\000" |
| 55486 | /* 97084 */ "VRNDSCALEPHZ256rmbik\000" |
| 55487 | /* 97105 */ "VCMPPHZ256rmbik\000" |
| 55488 | /* 97121 */ "VGETMANTPHZ256rmbik\000" |
| 55489 | /* 97141 */ "VMINMAXPHZ256rmbik\000" |
| 55490 | /* 97160 */ "VPSHLDQZ256rmbik\000" |
| 55491 | /* 97177 */ "VPSHRDQZ256rmbik\000" |
| 55492 | /* 97194 */ "VPTERNLOGQZ256rmbik\000" |
| 55493 | /* 97214 */ "VALIGNQZ256rmbik\000" |
| 55494 | /* 97231 */ "VPCMPQZ256rmbik\000" |
| 55495 | /* 97247 */ "VPCMPUQZ256rmbik\000" |
| 55496 | /* 97264 */ "VREDUCEPSZ256rmbik\000" |
| 55497 | /* 97283 */ "VRANGEPSZ256rmbik\000" |
| 55498 | /* 97301 */ "VRNDSCALEPSZ256rmbik\000" |
| 55499 | /* 97322 */ "VSHUFPSZ256rmbik\000" |
| 55500 | /* 97339 */ "VFIXUPIMMPSZ256rmbik\000" |
| 55501 | /* 97360 */ "VCMPPSZ256rmbik\000" |
| 55502 | /* 97376 */ "VGETMANTPSZ256rmbik\000" |
| 55503 | /* 97396 */ "VMINMAXPSZ256rmbik\000" |
| 55504 | /* 97415 */ "VREDUCEBF16Z128rmbik\000" |
| 55505 | /* 97436 */ "VRNDSCALEBF16Z128rmbik\000" |
| 55506 | /* 97459 */ "VCMPBF16Z128rmbik\000" |
| 55507 | /* 97477 */ "VGETMANTBF16Z128rmbik\000" |
| 55508 | /* 97499 */ "VMINMAXBF16Z128rmbik\000" |
| 55509 | /* 97520 */ "VGF2P8AFFINEQBZ128rmbik\000" |
| 55510 | /* 97544 */ "VGF2P8AFFINEINVQBZ128rmbik\000" |
| 55511 | /* 97571 */ "VPSHLDDZ128rmbik\000" |
| 55512 | /* 97588 */ "VPSHRDDZ128rmbik\000" |
| 55513 | /* 97605 */ "VPTERNLOGDZ128rmbik\000" |
| 55514 | /* 97625 */ "VALIGNDZ128rmbik\000" |
| 55515 | /* 97642 */ "VREDUCEPDZ128rmbik\000" |
| 55516 | /* 97661 */ "VRANGEPDZ128rmbik\000" |
| 55517 | /* 97679 */ "VRNDSCALEPDZ128rmbik\000" |
| 55518 | /* 97700 */ "VSHUFPDZ128rmbik\000" |
| 55519 | /* 97717 */ "VPCMPDZ128rmbik\000" |
| 55520 | /* 97733 */ "VFIXUPIMMPDZ128rmbik\000" |
| 55521 | /* 97754 */ "VCMPPDZ128rmbik\000" |
| 55522 | /* 97770 */ "VGETMANTPDZ128rmbik\000" |
| 55523 | /* 97790 */ "VMINMAXPDZ128rmbik\000" |
| 55524 | /* 97809 */ "VPCMPUDZ128rmbik\000" |
| 55525 | /* 97826 */ "VREDUCEPHZ128rmbik\000" |
| 55526 | /* 97845 */ "VRNDSCALEPHZ128rmbik\000" |
| 55527 | /* 97866 */ "VCMPPHZ128rmbik\000" |
| 55528 | /* 97882 */ "VGETMANTPHZ128rmbik\000" |
| 55529 | /* 97902 */ "VMINMAXPHZ128rmbik\000" |
| 55530 | /* 97921 */ "VPSHLDQZ128rmbik\000" |
| 55531 | /* 97938 */ "VPSHRDQZ128rmbik\000" |
| 55532 | /* 97955 */ "VPTERNLOGQZ128rmbik\000" |
| 55533 | /* 97975 */ "VALIGNQZ128rmbik\000" |
| 55534 | /* 97992 */ "VPCMPQZ128rmbik\000" |
| 55535 | /* 98008 */ "VPCMPUQZ128rmbik\000" |
| 55536 | /* 98025 */ "VREDUCEPSZ128rmbik\000" |
| 55537 | /* 98044 */ "VRANGEPSZ128rmbik\000" |
| 55538 | /* 98062 */ "VRNDSCALEPSZ128rmbik\000" |
| 55539 | /* 98083 */ "VSHUFPSZ128rmbik\000" |
| 55540 | /* 98100 */ "VFIXUPIMMPSZ128rmbik\000" |
| 55541 | /* 98121 */ "VCMPPSZ128rmbik\000" |
| 55542 | /* 98137 */ "VGETMANTPSZ128rmbik\000" |
| 55543 | /* 98157 */ "VMINMAXPSZ128rmbik\000" |
| 55544 | /* 98176 */ "VSHUFF64X2Zrmbik\000" |
| 55545 | /* 98193 */ "VSHUFI64X2Zrmbik\000" |
| 55546 | /* 98210 */ "VSHUFF32X4Zrmbik\000" |
| 55547 | /* 98227 */ "VSHUFI32X4Zrmbik\000" |
| 55548 | /* 98244 */ "VREDUCEBF16Zrmbik\000" |
| 55549 | /* 98262 */ "VRNDSCALEBF16Zrmbik\000" |
| 55550 | /* 98282 */ "VCMPBF16Zrmbik\000" |
| 55551 | /* 98297 */ "VGETMANTBF16Zrmbik\000" |
| 55552 | /* 98316 */ "VMINMAXBF16Zrmbik\000" |
| 55553 | /* 98334 */ "VGF2P8AFFINEQBZrmbik\000" |
| 55554 | /* 98355 */ "VGF2P8AFFINEINVQBZrmbik\000" |
| 55555 | /* 98379 */ "VPSHLDDZrmbik\000" |
| 55556 | /* 98393 */ "VPSHRDDZrmbik\000" |
| 55557 | /* 98407 */ "VPTERNLOGDZrmbik\000" |
| 55558 | /* 98424 */ "VALIGNDZrmbik\000" |
| 55559 | /* 98438 */ "VREDUCEPDZrmbik\000" |
| 55560 | /* 98454 */ "VRANGEPDZrmbik\000" |
| 55561 | /* 98469 */ "VRNDSCALEPDZrmbik\000" |
| 55562 | /* 98487 */ "VSHUFPDZrmbik\000" |
| 55563 | /* 98501 */ "VPCMPDZrmbik\000" |
| 55564 | /* 98514 */ "VFIXUPIMMPDZrmbik\000" |
| 55565 | /* 98532 */ "VCMPPDZrmbik\000" |
| 55566 | /* 98545 */ "VGETMANTPDZrmbik\000" |
| 55567 | /* 98562 */ "VMINMAXPDZrmbik\000" |
| 55568 | /* 98578 */ "VPCMPUDZrmbik\000" |
| 55569 | /* 98592 */ "VREDUCEPHZrmbik\000" |
| 55570 | /* 98608 */ "VRNDSCALEPHZrmbik\000" |
| 55571 | /* 98626 */ "VCMPPHZrmbik\000" |
| 55572 | /* 98639 */ "VGETMANTPHZrmbik\000" |
| 55573 | /* 98656 */ "VMINMAXPHZrmbik\000" |
| 55574 | /* 98672 */ "VPSHLDQZrmbik\000" |
| 55575 | /* 98686 */ "VPSHRDQZrmbik\000" |
| 55576 | /* 98700 */ "VPTERNLOGQZrmbik\000" |
| 55577 | /* 98717 */ "VALIGNQZrmbik\000" |
| 55578 | /* 98731 */ "VPCMPQZrmbik\000" |
| 55579 | /* 98744 */ "VPCMPUQZrmbik\000" |
| 55580 | /* 98758 */ "VREDUCEPSZrmbik\000" |
| 55581 | /* 98774 */ "VRANGEPSZrmbik\000" |
| 55582 | /* 98789 */ "VRNDSCALEPSZrmbik\000" |
| 55583 | /* 98807 */ "VSHUFPSZrmbik\000" |
| 55584 | /* 98821 */ "VFIXUPIMMPSZrmbik\000" |
| 55585 | /* 98839 */ "VCMPPSZrmbik\000" |
| 55586 | /* 98852 */ "VGETMANTPSZrmbik\000" |
| 55587 | /* 98869 */ "VMINMAXPSZrmbik\000" |
| 55588 | /* 98885 */ "VFPCLASSBF16Z256mik\000" |
| 55589 | /* 98905 */ "VPSRADZ256mik\000" |
| 55590 | /* 98919 */ "VPSHUFDZ256mik\000" |
| 55591 | /* 98934 */ "VPSLLDZ256mik\000" |
| 55592 | /* 98948 */ "VPROLDZ256mik\000" |
| 55593 | /* 98962 */ "VPSRLDZ256mik\000" |
| 55594 | /* 98976 */ "VPERMILPDZ256mik\000" |
| 55595 | /* 98993 */ "VPERMPDZ256mik\000" |
| 55596 | /* 99008 */ "VFPCLASSPDZ256mik\000" |
| 55597 | /* 99026 */ "VPRORDZ256mik\000" |
| 55598 | /* 99040 */ "VFPCLASSPHZ256mik\000" |
| 55599 | /* 99058 */ "VPSRAQZ256mik\000" |
| 55600 | /* 99072 */ "VPSLLQZ256mik\000" |
| 55601 | /* 99086 */ "VPROLQZ256mik\000" |
| 55602 | /* 99100 */ "VPSRLQZ256mik\000" |
| 55603 | /* 99114 */ "VPERMQZ256mik\000" |
| 55604 | /* 99128 */ "VPRORQZ256mik\000" |
| 55605 | /* 99142 */ "VPERMILPSZ256mik\000" |
| 55606 | /* 99159 */ "VFPCLASSPSZ256mik\000" |
| 55607 | /* 99177 */ "VPSRAWZ256mik\000" |
| 55608 | /* 99191 */ "VPSHUFHWZ256mik\000" |
| 55609 | /* 99207 */ "VPSHUFLWZ256mik\000" |
| 55610 | /* 99223 */ "VPSLLWZ256mik\000" |
| 55611 | /* 99237 */ "VPSRLWZ256mik\000" |
| 55612 | /* 99251 */ "VFPCLASSBF16Z128mik\000" |
| 55613 | /* 99271 */ "VPSRADZ128mik\000" |
| 55614 | /* 99285 */ "VPSHUFDZ128mik\000" |
| 55615 | /* 99300 */ "VPSLLDZ128mik\000" |
| 55616 | /* 99314 */ "VPROLDZ128mik\000" |
| 55617 | /* 99328 */ "VPSRLDZ128mik\000" |
| 55618 | /* 99342 */ "VPERMILPDZ128mik\000" |
| 55619 | /* 99359 */ "VFPCLASSPDZ128mik\000" |
| 55620 | /* 99377 */ "VPRORDZ128mik\000" |
| 55621 | /* 99391 */ "VFPCLASSPHZ128mik\000" |
| 55622 | /* 99409 */ "VPSRAQZ128mik\000" |
| 55623 | /* 99423 */ "VPSLLQZ128mik\000" |
| 55624 | /* 99437 */ "VPROLQZ128mik\000" |
| 55625 | /* 99451 */ "VPSRLQZ128mik\000" |
| 55626 | /* 99465 */ "VPRORQZ128mik\000" |
| 55627 | /* 99479 */ "VPERMILPSZ128mik\000" |
| 55628 | /* 99496 */ "VFPCLASSPSZ128mik\000" |
| 55629 | /* 99514 */ "VPSRAWZ128mik\000" |
| 55630 | /* 99528 */ "VPSHUFHWZ128mik\000" |
| 55631 | /* 99544 */ "VPSHUFLWZ128mik\000" |
| 55632 | /* 99560 */ "VPSLLWZ128mik\000" |
| 55633 | /* 99574 */ "VPSRLWZ128mik\000" |
| 55634 | /* 99588 */ "VFPCLASSBF16Zmik\000" |
| 55635 | /* 99605 */ "VPSRADZmik\000" |
| 55636 | /* 99616 */ "VPSHUFDZmik\000" |
| 55637 | /* 99628 */ "VPSLLDZmik\000" |
| 55638 | /* 99639 */ "VPROLDZmik\000" |
| 55639 | /* 99650 */ "VPSRLDZmik\000" |
| 55640 | /* 99661 */ "VPERMILPDZmik\000" |
| 55641 | /* 99675 */ "VPERMPDZmik\000" |
| 55642 | /* 99687 */ "VFPCLASSPDZmik\000" |
| 55643 | /* 99702 */ "VPRORDZmik\000" |
| 55644 | /* 99713 */ "VFPCLASSSDZmik\000" |
| 55645 | /* 99728 */ "VFPCLASSPHZmik\000" |
| 55646 | /* 99743 */ "VFPCLASSSHZmik\000" |
| 55647 | /* 99758 */ "VPSRAQZmik\000" |
| 55648 | /* 99769 */ "VPSLLQZmik\000" |
| 55649 | /* 99780 */ "VPROLQZmik\000" |
| 55650 | /* 99791 */ "VPSRLQZmik\000" |
| 55651 | /* 99802 */ "VPERMQZmik\000" |
| 55652 | /* 99813 */ "VPRORQZmik\000" |
| 55653 | /* 99824 */ "VPERMILPSZmik\000" |
| 55654 | /* 99838 */ "VFPCLASSPSZmik\000" |
| 55655 | /* 99853 */ "VFPCLASSSSZmik\000" |
| 55656 | /* 99868 */ "VPSRAWZmik\000" |
| 55657 | /* 99879 */ "VPSHUFHWZmik\000" |
| 55658 | /* 99892 */ "VPSHUFLWZmik\000" |
| 55659 | /* 99905 */ "VPSLLWZmik\000" |
| 55660 | /* 99916 */ "VPSRLWZmik\000" |
| 55661 | /* 99927 */ "VSHUFF64X2Z256rmik\000" |
| 55662 | /* 99946 */ "VINSERTF64X2Z256rmik\000" |
| 55663 | /* 99967 */ "VSHUFI64X2Z256rmik\000" |
| 55664 | /* 99986 */ "VINSERTI64X2Z256rmik\000" |
| 55665 | /* 100007 */ "VSHUFF32X4Z256rmik\000" |
| 55666 | /* 100026 */ "VINSERTF32X4Z256rmik\000" |
| 55667 | /* 100047 */ "VSHUFI32X4Z256rmik\000" |
| 55668 | /* 100066 */ "VINSERTI32X4Z256rmik\000" |
| 55669 | /* 100087 */ "VREDUCEBF16Z256rmik\000" |
| 55670 | /* 100107 */ "VRNDSCALEBF16Z256rmik\000" |
| 55671 | /* 100129 */ "VCMPBF16Z256rmik\000" |
| 55672 | /* 100146 */ "VGETMANTBF16Z256rmik\000" |
| 55673 | /* 100167 */ "VMINMAXBF16Z256rmik\000" |
| 55674 | /* 100187 */ "VPCMPBZ256rmik\000" |
| 55675 | /* 100202 */ "VGF2P8AFFINEQBZ256rmik\000" |
| 55676 | /* 100225 */ "VGF2P8AFFINEINVQBZ256rmik\000" |
| 55677 | /* 100251 */ "VPCMPUBZ256rmik\000" |
| 55678 | /* 100267 */ "VPSHLDDZ256rmik\000" |
| 55679 | /* 100283 */ "VPSHRDDZ256rmik\000" |
| 55680 | /* 100299 */ "VPTERNLOGDZ256rmik\000" |
| 55681 | /* 100318 */ "VALIGNDZ256rmik\000" |
| 55682 | /* 100334 */ "VREDUCEPDZ256rmik\000" |
| 55683 | /* 100352 */ "VRANGEPDZ256rmik\000" |
| 55684 | /* 100369 */ "VRNDSCALEPDZ256rmik\000" |
| 55685 | /* 100389 */ "VSHUFPDZ256rmik\000" |
| 55686 | /* 100405 */ "VPCMPDZ256rmik\000" |
| 55687 | /* 100420 */ "VFIXUPIMMPDZ256rmik\000" |
| 55688 | /* 100440 */ "VCMPPDZ256rmik\000" |
| 55689 | /* 100455 */ "VGETMANTPDZ256rmik\000" |
| 55690 | /* 100474 */ "VMINMAXPDZ256rmik\000" |
| 55691 | /* 100492 */ "VPCMPUDZ256rmik\000" |
| 55692 | /* 100508 */ "VREDUCEPHZ256rmik\000" |
| 55693 | /* 100526 */ "VRNDSCALEPHZ256rmik\000" |
| 55694 | /* 100546 */ "VCMPPHZ256rmik\000" |
| 55695 | /* 100561 */ "VGETMANTPHZ256rmik\000" |
| 55696 | /* 100580 */ "VMINMAXPHZ256rmik\000" |
| 55697 | /* 100598 */ "VPSHLDQZ256rmik\000" |
| 55698 | /* 100614 */ "VPSHRDQZ256rmik\000" |
| 55699 | /* 100630 */ "VPTERNLOGQZ256rmik\000" |
| 55700 | /* 100649 */ "VALIGNQZ256rmik\000" |
| 55701 | /* 100665 */ "VPCMPQZ256rmik\000" |
| 55702 | /* 100680 */ "VPCMPUQZ256rmik\000" |
| 55703 | /* 100696 */ "VPALIGNRZ256rmik\000" |
| 55704 | /* 100713 */ "VREDUCEPSZ256rmik\000" |
| 55705 | /* 100731 */ "VRANGEPSZ256rmik\000" |
| 55706 | /* 100748 */ "VRNDSCALEPSZ256rmik\000" |
| 55707 | /* 100768 */ "VSHUFPSZ256rmik\000" |
| 55708 | /* 100784 */ "VFIXUPIMMPSZ256rmik\000" |
| 55709 | /* 100804 */ "VCMPPSZ256rmik\000" |
| 55710 | /* 100819 */ "VGETMANTPSZ256rmik\000" |
| 55711 | /* 100838 */ "VMINMAXPSZ256rmik\000" |
| 55712 | /* 100856 */ "VDBPSADBWZ256rmik\000" |
| 55713 | /* 100874 */ "VMPSADBWZ256rmik\000" |
| 55714 | /* 100891 */ "VPSHLDWZ256rmik\000" |
| 55715 | /* 100907 */ "VPSHRDWZ256rmik\000" |
| 55716 | /* 100923 */ "VPCMPWZ256rmik\000" |
| 55717 | /* 100938 */ "VPCMPUWZ256rmik\000" |
| 55718 | /* 100954 */ "VREDUCEBF16Z128rmik\000" |
| 55719 | /* 100974 */ "VRNDSCALEBF16Z128rmik\000" |
| 55720 | /* 100996 */ "VCMPBF16Z128rmik\000" |
| 55721 | /* 101013 */ "VGETMANTBF16Z128rmik\000" |
| 55722 | /* 101034 */ "VMINMAXBF16Z128rmik\000" |
| 55723 | /* 101054 */ "VPCMPBZ128rmik\000" |
| 55724 | /* 101069 */ "VGF2P8AFFINEQBZ128rmik\000" |
| 55725 | /* 101092 */ "VGF2P8AFFINEINVQBZ128rmik\000" |
| 55726 | /* 101118 */ "VPCMPUBZ128rmik\000" |
| 55727 | /* 101134 */ "VPSHLDDZ128rmik\000" |
| 55728 | /* 101150 */ "VPSHRDDZ128rmik\000" |
| 55729 | /* 101166 */ "VPTERNLOGDZ128rmik\000" |
| 55730 | /* 101185 */ "VALIGNDZ128rmik\000" |
| 55731 | /* 101201 */ "VREDUCEPDZ128rmik\000" |
| 55732 | /* 101219 */ "VRANGEPDZ128rmik\000" |
| 55733 | /* 101236 */ "VRNDSCALEPDZ128rmik\000" |
| 55734 | /* 101256 */ "VSHUFPDZ128rmik\000" |
| 55735 | /* 101272 */ "VPCMPDZ128rmik\000" |
| 55736 | /* 101287 */ "VFIXUPIMMPDZ128rmik\000" |
| 55737 | /* 101307 */ "VCMPPDZ128rmik\000" |
| 55738 | /* 101322 */ "VGETMANTPDZ128rmik\000" |
| 55739 | /* 101341 */ "VMINMAXPDZ128rmik\000" |
| 55740 | /* 101359 */ "VPCMPUDZ128rmik\000" |
| 55741 | /* 101375 */ "VREDUCEPHZ128rmik\000" |
| 55742 | /* 101393 */ "VRNDSCALEPHZ128rmik\000" |
| 55743 | /* 101413 */ "VCMPPHZ128rmik\000" |
| 55744 | /* 101428 */ "VGETMANTPHZ128rmik\000" |
| 55745 | /* 101447 */ "VMINMAXPHZ128rmik\000" |
| 55746 | /* 101465 */ "VPSHLDQZ128rmik\000" |
| 55747 | /* 101481 */ "VPSHRDQZ128rmik\000" |
| 55748 | /* 101497 */ "VPTERNLOGQZ128rmik\000" |
| 55749 | /* 101516 */ "VALIGNQZ128rmik\000" |
| 55750 | /* 101532 */ "VPCMPQZ128rmik\000" |
| 55751 | /* 101547 */ "VPCMPUQZ128rmik\000" |
| 55752 | /* 101563 */ "VPALIGNRZ128rmik\000" |
| 55753 | /* 101580 */ "VREDUCEPSZ128rmik\000" |
| 55754 | /* 101598 */ "VRANGEPSZ128rmik\000" |
| 55755 | /* 101615 */ "VRNDSCALEPSZ128rmik\000" |
| 55756 | /* 101635 */ "VSHUFPSZ128rmik\000" |
| 55757 | /* 101651 */ "VFIXUPIMMPSZ128rmik\000" |
| 55758 | /* 101671 */ "VCMPPSZ128rmik\000" |
| 55759 | /* 101686 */ "VGETMANTPSZ128rmik\000" |
| 55760 | /* 101705 */ "VMINMAXPSZ128rmik\000" |
| 55761 | /* 101723 */ "VDBPSADBWZ128rmik\000" |
| 55762 | /* 101741 */ "VMPSADBWZ128rmik\000" |
| 55763 | /* 101758 */ "VPSHLDWZ128rmik\000" |
| 55764 | /* 101774 */ "VPSHRDWZ128rmik\000" |
| 55765 | /* 101790 */ "VPCMPWZ128rmik\000" |
| 55766 | /* 101805 */ "VPCMPUWZ128rmik\000" |
| 55767 | /* 101821 */ "VSHUFF64X2Zrmik\000" |
| 55768 | /* 101837 */ "VINSERTF64X2Zrmik\000" |
| 55769 | /* 101855 */ "VSHUFI64X2Zrmik\000" |
| 55770 | /* 101871 */ "VINSERTI64X2Zrmik\000" |
| 55771 | /* 101889 */ "VSHUFF32X4Zrmik\000" |
| 55772 | /* 101905 */ "VINSERTF32X4Zrmik\000" |
| 55773 | /* 101923 */ "VSHUFI32X4Zrmik\000" |
| 55774 | /* 101939 */ "VINSERTI32X4Zrmik\000" |
| 55775 | /* 101957 */ "VINSERTF64X4Zrmik\000" |
| 55776 | /* 101975 */ "VINSERTI64X4Zrmik\000" |
| 55777 | /* 101993 */ "VREDUCEBF16Zrmik\000" |
| 55778 | /* 102010 */ "VRNDSCALEBF16Zrmik\000" |
| 55779 | /* 102029 */ "VCMPBF16Zrmik\000" |
| 55780 | /* 102043 */ "VGETMANTBF16Zrmik\000" |
| 55781 | /* 102061 */ "VMINMAXBF16Zrmik\000" |
| 55782 | /* 102078 */ "VINSERTF32X8Zrmik\000" |
| 55783 | /* 102096 */ "VINSERTI32X8Zrmik\000" |
| 55784 | /* 102114 */ "VPCMPBZrmik\000" |
| 55785 | /* 102126 */ "VGF2P8AFFINEQBZrmik\000" |
| 55786 | /* 102146 */ "VGF2P8AFFINEINVQBZrmik\000" |
| 55787 | /* 102169 */ "VPCMPUBZrmik\000" |
| 55788 | /* 102182 */ "VPSHLDDZrmik\000" |
| 55789 | /* 102195 */ "VPSHRDDZrmik\000" |
| 55790 | /* 102208 */ "VPTERNLOGDZrmik\000" |
| 55791 | /* 102224 */ "VALIGNDZrmik\000" |
| 55792 | /* 102237 */ "VREDUCEPDZrmik\000" |
| 55793 | /* 102252 */ "VRANGEPDZrmik\000" |
| 55794 | /* 102266 */ "VRNDSCALEPDZrmik\000" |
| 55795 | /* 102283 */ "VSHUFPDZrmik\000" |
| 55796 | /* 102296 */ "VPCMPDZrmik\000" |
| 55797 | /* 102308 */ "VFIXUPIMMPDZrmik\000" |
| 55798 | /* 102325 */ "VCMPPDZrmik\000" |
| 55799 | /* 102337 */ "VGETMANTPDZrmik\000" |
| 55800 | /* 102353 */ "VMINMAXPDZrmik\000" |
| 55801 | /* 102368 */ "VREDUCESDZrmik\000" |
| 55802 | /* 102383 */ "VRANGESDZrmik\000" |
| 55803 | /* 102397 */ "VFIXUPIMMSDZrmik\000" |
| 55804 | /* 102414 */ "VGETMANTSDZrmik\000" |
| 55805 | /* 102430 */ "VPCMPUDZrmik\000" |
| 55806 | /* 102443 */ "VREDUCEPHZrmik\000" |
| 55807 | /* 102458 */ "VRNDSCALEPHZrmik\000" |
| 55808 | /* 102475 */ "VCMPPHZrmik\000" |
| 55809 | /* 102487 */ "VGETMANTPHZrmik\000" |
| 55810 | /* 102503 */ "VMINMAXPHZrmik\000" |
| 55811 | /* 102518 */ "VREDUCESHZrmik\000" |
| 55812 | /* 102533 */ "VGETMANTSHZrmik\000" |
| 55813 | /* 102549 */ "VPSHLDQZrmik\000" |
| 55814 | /* 102562 */ "VPSHRDQZrmik\000" |
| 55815 | /* 102575 */ "VPTERNLOGQZrmik\000" |
| 55816 | /* 102591 */ "VALIGNQZrmik\000" |
| 55817 | /* 102604 */ "VPCMPQZrmik\000" |
| 55818 | /* 102616 */ "VPCMPUQZrmik\000" |
| 55819 | /* 102629 */ "VPALIGNRZrmik\000" |
| 55820 | /* 102643 */ "VREDUCEPSZrmik\000" |
| 55821 | /* 102658 */ "VRANGEPSZrmik\000" |
| 55822 | /* 102672 */ "VRNDSCALEPSZrmik\000" |
| 55823 | /* 102689 */ "VSHUFPSZrmik\000" |
| 55824 | /* 102702 */ "VFIXUPIMMPSZrmik\000" |
| 55825 | /* 102719 */ "VCMPPSZrmik\000" |
| 55826 | /* 102731 */ "VGETMANTPSZrmik\000" |
| 55827 | /* 102747 */ "VMINMAXPSZrmik\000" |
| 55828 | /* 102762 */ "VREDUCESSZrmik\000" |
| 55829 | /* 102777 */ "VRANGESSZrmik\000" |
| 55830 | /* 102791 */ "VFIXUPIMMSSZrmik\000" |
| 55831 | /* 102808 */ "VGETMANTSSZrmik\000" |
| 55832 | /* 102824 */ "VDBPSADBWZrmik\000" |
| 55833 | /* 102839 */ "VMPSADBWZrmik\000" |
| 55834 | /* 102853 */ "VPSHLDWZrmik\000" |
| 55835 | /* 102866 */ "VPSHRDWZrmik\000" |
| 55836 | /* 102879 */ "VPCMPWZrmik\000" |
| 55837 | /* 102891 */ "VPCMPUWZrmik\000" |
| 55838 | /* 102904 */ "VFPCLASSBF16Z256rik\000" |
| 55839 | /* 102924 */ "VPSRADZ256rik\000" |
| 55840 | /* 102938 */ "VPSHUFDZ256rik\000" |
| 55841 | /* 102953 */ "VPSLLDZ256rik\000" |
| 55842 | /* 102967 */ "VPROLDZ256rik\000" |
| 55843 | /* 102981 */ "VPSRLDZ256rik\000" |
| 55844 | /* 102995 */ "VPERMILPDZ256rik\000" |
| 55845 | /* 103012 */ "VPERMPDZ256rik\000" |
| 55846 | /* 103027 */ "VFPCLASSPDZ256rik\000" |
| 55847 | /* 103045 */ "VPRORDZ256rik\000" |
| 55848 | /* 103059 */ "VFPCLASSPHZ256rik\000" |
| 55849 | /* 103077 */ "VPSRAQZ256rik\000" |
| 55850 | /* 103091 */ "VPSLLQZ256rik\000" |
| 55851 | /* 103105 */ "VPROLQZ256rik\000" |
| 55852 | /* 103119 */ "VPSRLQZ256rik\000" |
| 55853 | /* 103133 */ "VPERMQZ256rik\000" |
| 55854 | /* 103147 */ "VPRORQZ256rik\000" |
| 55855 | /* 103161 */ "VPERMILPSZ256rik\000" |
| 55856 | /* 103178 */ "VFPCLASSPSZ256rik\000" |
| 55857 | /* 103196 */ "VPSRAWZ256rik\000" |
| 55858 | /* 103210 */ "VPSHUFHWZ256rik\000" |
| 55859 | /* 103226 */ "VPSHUFLWZ256rik\000" |
| 55860 | /* 103242 */ "VPSLLWZ256rik\000" |
| 55861 | /* 103256 */ "VPSRLWZ256rik\000" |
| 55862 | /* 103270 */ "VFPCLASSBF16Z128rik\000" |
| 55863 | /* 103290 */ "VPSRADZ128rik\000" |
| 55864 | /* 103304 */ "VPSHUFDZ128rik\000" |
| 55865 | /* 103319 */ "VPSLLDZ128rik\000" |
| 55866 | /* 103333 */ "VPROLDZ128rik\000" |
| 55867 | /* 103347 */ "VPSRLDZ128rik\000" |
| 55868 | /* 103361 */ "VPERMILPDZ128rik\000" |
| 55869 | /* 103378 */ "VFPCLASSPDZ128rik\000" |
| 55870 | /* 103396 */ "VPRORDZ128rik\000" |
| 55871 | /* 103410 */ "VFPCLASSPHZ128rik\000" |
| 55872 | /* 103428 */ "VPSRAQZ128rik\000" |
| 55873 | /* 103442 */ "VPSLLQZ128rik\000" |
| 55874 | /* 103456 */ "VPROLQZ128rik\000" |
| 55875 | /* 103470 */ "VPSRLQZ128rik\000" |
| 55876 | /* 103484 */ "VPRORQZ128rik\000" |
| 55877 | /* 103498 */ "VPERMILPSZ128rik\000" |
| 55878 | /* 103515 */ "VFPCLASSPSZ128rik\000" |
| 55879 | /* 103533 */ "VPSRAWZ128rik\000" |
| 55880 | /* 103547 */ "VPSHUFHWZ128rik\000" |
| 55881 | /* 103563 */ "VPSHUFLWZ128rik\000" |
| 55882 | /* 103579 */ "VPSLLWZ128rik\000" |
| 55883 | /* 103593 */ "VPSRLWZ128rik\000" |
| 55884 | /* 103607 */ "VFPCLASSBF16Zrik\000" |
| 55885 | /* 103624 */ "VPSRADZrik\000" |
| 55886 | /* 103635 */ "VPSHUFDZrik\000" |
| 55887 | /* 103647 */ "VPSLLDZrik\000" |
| 55888 | /* 103658 */ "VPROLDZrik\000" |
| 55889 | /* 103669 */ "VPSRLDZrik\000" |
| 55890 | /* 103680 */ "VPERMILPDZrik\000" |
| 55891 | /* 103694 */ "VPERMPDZrik\000" |
| 55892 | /* 103706 */ "VFPCLASSPDZrik\000" |
| 55893 | /* 103721 */ "VPRORDZrik\000" |
| 55894 | /* 103732 */ "VFPCLASSSDZrik\000" |
| 55895 | /* 103747 */ "VFPCLASSPHZrik\000" |
| 55896 | /* 103762 */ "VFPCLASSSHZrik\000" |
| 55897 | /* 103777 */ "VPSRAQZrik\000" |
| 55898 | /* 103788 */ "VPSLLQZrik\000" |
| 55899 | /* 103799 */ "VPROLQZrik\000" |
| 55900 | /* 103810 */ "VPSRLQZrik\000" |
| 55901 | /* 103821 */ "VPERMQZrik\000" |
| 55902 | /* 103832 */ "VPRORQZrik\000" |
| 55903 | /* 103843 */ "VPERMILPSZrik\000" |
| 55904 | /* 103857 */ "VFPCLASSPSZrik\000" |
| 55905 | /* 103872 */ "VFPCLASSSSZrik\000" |
| 55906 | /* 103887 */ "VPSRAWZrik\000" |
| 55907 | /* 103898 */ "VPSHUFHWZrik\000" |
| 55908 | /* 103911 */ "VPSHUFLWZrik\000" |
| 55909 | /* 103924 */ "VPSLLWZrik\000" |
| 55910 | /* 103935 */ "VPSRLWZrik\000" |
| 55911 | /* 103946 */ "VEXTRACTF64X2Z256mrik\000" |
| 55912 | /* 103968 */ "VEXTRACTI64X2Z256mrik\000" |
| 55913 | /* 103990 */ "VEXTRACTF32X4Z256mrik\000" |
| 55914 | /* 104012 */ "VEXTRACTI32X4Z256mrik\000" |
| 55915 | /* 104034 */ "VEXTRACTF64X2Zmrik\000" |
| 55916 | /* 104053 */ "VEXTRACTI64X2Zmrik\000" |
| 55917 | /* 104072 */ "VEXTRACTF32X4Zmrik\000" |
| 55918 | /* 104091 */ "VEXTRACTI32X4Zmrik\000" |
| 55919 | /* 104110 */ "VEXTRACTF64X4Zmrik\000" |
| 55920 | /* 104129 */ "VEXTRACTI64X4Zmrik\000" |
| 55921 | /* 104148 */ "VEXTRACTF32X8Zmrik\000" |
| 55922 | /* 104167 */ "VEXTRACTI32X8Zmrik\000" |
| 55923 | /* 104186 */ "VSHUFF64X2Z256rrik\000" |
| 55924 | /* 104205 */ "VEXTRACTF64X2Z256rrik\000" |
| 55925 | /* 104227 */ "VINSERTF64X2Z256rrik\000" |
| 55926 | /* 104248 */ "VSHUFI64X2Z256rrik\000" |
| 55927 | /* 104267 */ "VEXTRACTI64X2Z256rrik\000" |
| 55928 | /* 104289 */ "VINSERTI64X2Z256rrik\000" |
| 55929 | /* 104310 */ "VSHUFF32X4Z256rrik\000" |
| 55930 | /* 104329 */ "VEXTRACTF32X4Z256rrik\000" |
| 55931 | /* 104351 */ "VINSERTF32X4Z256rrik\000" |
| 55932 | /* 104372 */ "VSHUFI32X4Z256rrik\000" |
| 55933 | /* 104391 */ "VEXTRACTI32X4Z256rrik\000" |
| 55934 | /* 104413 */ "VINSERTI32X4Z256rrik\000" |
| 55935 | /* 104434 */ "VREDUCEBF16Z256rrik\000" |
| 55936 | /* 104454 */ "VRNDSCALEBF16Z256rrik\000" |
| 55937 | /* 104476 */ "VCMPBF16Z256rrik\000" |
| 55938 | /* 104493 */ "VGETMANTBF16Z256rrik\000" |
| 55939 | /* 104514 */ "VMINMAXBF16Z256rrik\000" |
| 55940 | /* 104534 */ "VPCMPBZ256rrik\000" |
| 55941 | /* 104549 */ "VGF2P8AFFINEQBZ256rrik\000" |
| 55942 | /* 104572 */ "VGF2P8AFFINEINVQBZ256rrik\000" |
| 55943 | /* 104598 */ "VPCMPUBZ256rrik\000" |
| 55944 | /* 104614 */ "VPSHLDDZ256rrik\000" |
| 55945 | /* 104630 */ "VPSHRDDZ256rrik\000" |
| 55946 | /* 104646 */ "VPTERNLOGDZ256rrik\000" |
| 55947 | /* 104665 */ "VALIGNDZ256rrik\000" |
| 55948 | /* 104681 */ "VREDUCEPDZ256rrik\000" |
| 55949 | /* 104699 */ "VRANGEPDZ256rrik\000" |
| 55950 | /* 104716 */ "VRNDSCALEPDZ256rrik\000" |
| 55951 | /* 104736 */ "VSHUFPDZ256rrik\000" |
| 55952 | /* 104752 */ "VPCMPDZ256rrik\000" |
| 55953 | /* 104767 */ "VFIXUPIMMPDZ256rrik\000" |
| 55954 | /* 104787 */ "VCMPPDZ256rrik\000" |
| 55955 | /* 104802 */ "VGETMANTPDZ256rrik\000" |
| 55956 | /* 104821 */ "VMINMAXPDZ256rrik\000" |
| 55957 | /* 104839 */ "VPCMPUDZ256rrik\000" |
| 55958 | /* 104855 */ "VREDUCEPHZ256rrik\000" |
| 55959 | /* 104873 */ "VRNDSCALEPHZ256rrik\000" |
| 55960 | /* 104893 */ "VCMPPHZ256rrik\000" |
| 55961 | /* 104908 */ "VGETMANTPHZ256rrik\000" |
| 55962 | /* 104927 */ "VMINMAXPHZ256rrik\000" |
| 55963 | /* 104945 */ "VPSHLDQZ256rrik\000" |
| 55964 | /* 104961 */ "VPSHRDQZ256rrik\000" |
| 55965 | /* 104977 */ "VPTERNLOGQZ256rrik\000" |
| 55966 | /* 104996 */ "VALIGNQZ256rrik\000" |
| 55967 | /* 105012 */ "VPCMPQZ256rrik\000" |
| 55968 | /* 105027 */ "VPCMPUQZ256rrik\000" |
| 55969 | /* 105043 */ "VPALIGNRZ256rrik\000" |
| 55970 | /* 105060 */ "VREDUCEPSZ256rrik\000" |
| 55971 | /* 105078 */ "VRANGEPSZ256rrik\000" |
| 55972 | /* 105095 */ "VRNDSCALEPSZ256rrik\000" |
| 55973 | /* 105115 */ "VSHUFPSZ256rrik\000" |
| 55974 | /* 105131 */ "VFIXUPIMMPSZ256rrik\000" |
| 55975 | /* 105151 */ "VCMPPSZ256rrik\000" |
| 55976 | /* 105166 */ "VGETMANTPSZ256rrik\000" |
| 55977 | /* 105185 */ "VMINMAXPSZ256rrik\000" |
| 55978 | /* 105203 */ "VDBPSADBWZ256rrik\000" |
| 55979 | /* 105221 */ "VMPSADBWZ256rrik\000" |
| 55980 | /* 105238 */ "VPSHLDWZ256rrik\000" |
| 55981 | /* 105254 */ "VPSHRDWZ256rrik\000" |
| 55982 | /* 105270 */ "VPCMPWZ256rrik\000" |
| 55983 | /* 105285 */ "VPCMPUWZ256rrik\000" |
| 55984 | /* 105301 */ "VREDUCEBF16Z128rrik\000" |
| 55985 | /* 105321 */ "VRNDSCALEBF16Z128rrik\000" |
| 55986 | /* 105343 */ "VCMPBF16Z128rrik\000" |
| 55987 | /* 105360 */ "VGETMANTBF16Z128rrik\000" |
| 55988 | /* 105381 */ "VMINMAXBF16Z128rrik\000" |
| 55989 | /* 105401 */ "VPCMPBZ128rrik\000" |
| 55990 | /* 105416 */ "VGF2P8AFFINEQBZ128rrik\000" |
| 55991 | /* 105439 */ "VGF2P8AFFINEINVQBZ128rrik\000" |
| 55992 | /* 105465 */ "VPCMPUBZ128rrik\000" |
| 55993 | /* 105481 */ "VPSHLDDZ128rrik\000" |
| 55994 | /* 105497 */ "VPSHRDDZ128rrik\000" |
| 55995 | /* 105513 */ "VPTERNLOGDZ128rrik\000" |
| 55996 | /* 105532 */ "VALIGNDZ128rrik\000" |
| 55997 | /* 105548 */ "VREDUCEPDZ128rrik\000" |
| 55998 | /* 105566 */ "VRANGEPDZ128rrik\000" |
| 55999 | /* 105583 */ "VRNDSCALEPDZ128rrik\000" |
| 56000 | /* 105603 */ "VSHUFPDZ128rrik\000" |
| 56001 | /* 105619 */ "VPCMPDZ128rrik\000" |
| 56002 | /* 105634 */ "VFIXUPIMMPDZ128rrik\000" |
| 56003 | /* 105654 */ "VCMPPDZ128rrik\000" |
| 56004 | /* 105669 */ "VGETMANTPDZ128rrik\000" |
| 56005 | /* 105688 */ "VMINMAXPDZ128rrik\000" |
| 56006 | /* 105706 */ "VPCMPUDZ128rrik\000" |
| 56007 | /* 105722 */ "VREDUCEPHZ128rrik\000" |
| 56008 | /* 105740 */ "VRNDSCALEPHZ128rrik\000" |
| 56009 | /* 105760 */ "VCMPPHZ128rrik\000" |
| 56010 | /* 105775 */ "VGETMANTPHZ128rrik\000" |
| 56011 | /* 105794 */ "VMINMAXPHZ128rrik\000" |
| 56012 | /* 105812 */ "VPSHLDQZ128rrik\000" |
| 56013 | /* 105828 */ "VPSHRDQZ128rrik\000" |
| 56014 | /* 105844 */ "VPTERNLOGQZ128rrik\000" |
| 56015 | /* 105863 */ "VALIGNQZ128rrik\000" |
| 56016 | /* 105879 */ "VPCMPQZ128rrik\000" |
| 56017 | /* 105894 */ "VPCMPUQZ128rrik\000" |
| 56018 | /* 105910 */ "VPALIGNRZ128rrik\000" |
| 56019 | /* 105927 */ "VREDUCEPSZ128rrik\000" |
| 56020 | /* 105945 */ "VRANGEPSZ128rrik\000" |
| 56021 | /* 105962 */ "VRNDSCALEPSZ128rrik\000" |
| 56022 | /* 105982 */ "VSHUFPSZ128rrik\000" |
| 56023 | /* 105998 */ "VFIXUPIMMPSZ128rrik\000" |
| 56024 | /* 106018 */ "VCMPPSZ128rrik\000" |
| 56025 | /* 106033 */ "VGETMANTPSZ128rrik\000" |
| 56026 | /* 106052 */ "VMINMAXPSZ128rrik\000" |
| 56027 | /* 106070 */ "VDBPSADBWZ128rrik\000" |
| 56028 | /* 106088 */ "VMPSADBWZ128rrik\000" |
| 56029 | /* 106105 */ "VPSHLDWZ128rrik\000" |
| 56030 | /* 106121 */ "VPSHRDWZ128rrik\000" |
| 56031 | /* 106137 */ "VPCMPWZ128rrik\000" |
| 56032 | /* 106152 */ "VPCMPUWZ128rrik\000" |
| 56033 | /* 106168 */ "VSHUFF64X2Zrrik\000" |
| 56034 | /* 106184 */ "VEXTRACTF64X2Zrrik\000" |
| 56035 | /* 106203 */ "VINSERTF64X2Zrrik\000" |
| 56036 | /* 106221 */ "VSHUFI64X2Zrrik\000" |
| 56037 | /* 106237 */ "VEXTRACTI64X2Zrrik\000" |
| 56038 | /* 106256 */ "VINSERTI64X2Zrrik\000" |
| 56039 | /* 106274 */ "VSHUFF32X4Zrrik\000" |
| 56040 | /* 106290 */ "VEXTRACTF32X4Zrrik\000" |
| 56041 | /* 106309 */ "VINSERTF32X4Zrrik\000" |
| 56042 | /* 106327 */ "VSHUFI32X4Zrrik\000" |
| 56043 | /* 106343 */ "VEXTRACTI32X4Zrrik\000" |
| 56044 | /* 106362 */ "VINSERTI32X4Zrrik\000" |
| 56045 | /* 106380 */ "VEXTRACTF64X4Zrrik\000" |
| 56046 | /* 106399 */ "VINSERTF64X4Zrrik\000" |
| 56047 | /* 106417 */ "VEXTRACTI64X4Zrrik\000" |
| 56048 | /* 106436 */ "VINSERTI64X4Zrrik\000" |
| 56049 | /* 106454 */ "VREDUCEBF16Zrrik\000" |
| 56050 | /* 106471 */ "VRNDSCALEBF16Zrrik\000" |
| 56051 | /* 106490 */ "VCMPBF16Zrrik\000" |
| 56052 | /* 106504 */ "VGETMANTBF16Zrrik\000" |
| 56053 | /* 106522 */ "VMINMAXBF16Zrrik\000" |
| 56054 | /* 106539 */ "VEXTRACTF32X8Zrrik\000" |
| 56055 | /* 106558 */ "VINSERTF32X8Zrrik\000" |
| 56056 | /* 106576 */ "VEXTRACTI32X8Zrrik\000" |
| 56057 | /* 106595 */ "VINSERTI32X8Zrrik\000" |
| 56058 | /* 106613 */ "VPCMPBZrrik\000" |
| 56059 | /* 106625 */ "VGF2P8AFFINEQBZrrik\000" |
| 56060 | /* 106645 */ "VGF2P8AFFINEINVQBZrrik\000" |
| 56061 | /* 106668 */ "VPCMPUBZrrik\000" |
| 56062 | /* 106681 */ "VPSHLDDZrrik\000" |
| 56063 | /* 106694 */ "VPSHRDDZrrik\000" |
| 56064 | /* 106707 */ "VPTERNLOGDZrrik\000" |
| 56065 | /* 106723 */ "VALIGNDZrrik\000" |
| 56066 | /* 106736 */ "VREDUCEPDZrrik\000" |
| 56067 | /* 106751 */ "VRANGEPDZrrik\000" |
| 56068 | /* 106765 */ "VRNDSCALEPDZrrik\000" |
| 56069 | /* 106782 */ "VSHUFPDZrrik\000" |
| 56070 | /* 106795 */ "VPCMPDZrrik\000" |
| 56071 | /* 106807 */ "VFIXUPIMMPDZrrik\000" |
| 56072 | /* 106824 */ "VCMPPDZrrik\000" |
| 56073 | /* 106836 */ "VGETMANTPDZrrik\000" |
| 56074 | /* 106852 */ "VMINMAXPDZrrik\000" |
| 56075 | /* 106867 */ "VREDUCESDZrrik\000" |
| 56076 | /* 106882 */ "VRANGESDZrrik\000" |
| 56077 | /* 106896 */ "VFIXUPIMMSDZrrik\000" |
| 56078 | /* 106913 */ "VGETMANTSDZrrik\000" |
| 56079 | /* 106929 */ "VPCMPUDZrrik\000" |
| 56080 | /* 106942 */ "VREDUCEPHZrrik\000" |
| 56081 | /* 106957 */ "VRNDSCALEPHZrrik\000" |
| 56082 | /* 106974 */ "VCMPPHZrrik\000" |
| 56083 | /* 106986 */ "VGETMANTPHZrrik\000" |
| 56084 | /* 107002 */ "VMINMAXPHZrrik\000" |
| 56085 | /* 107017 */ "VREDUCESHZrrik\000" |
| 56086 | /* 107032 */ "VGETMANTSHZrrik\000" |
| 56087 | /* 107048 */ "VPSHLDQZrrik\000" |
| 56088 | /* 107061 */ "VPSHRDQZrrik\000" |
| 56089 | /* 107074 */ "VPTERNLOGQZrrik\000" |
| 56090 | /* 107090 */ "VALIGNQZrrik\000" |
| 56091 | /* 107103 */ "VPCMPQZrrik\000" |
| 56092 | /* 107115 */ "VPCMPUQZrrik\000" |
| 56093 | /* 107128 */ "VPALIGNRZrrik\000" |
| 56094 | /* 107142 */ "VREDUCEPSZrrik\000" |
| 56095 | /* 107157 */ "VRANGEPSZrrik\000" |
| 56096 | /* 107171 */ "VRNDSCALEPSZrrik\000" |
| 56097 | /* 107188 */ "VSHUFPSZrrik\000" |
| 56098 | /* 107201 */ "VFIXUPIMMPSZrrik\000" |
| 56099 | /* 107218 */ "VCMPPSZrrik\000" |
| 56100 | /* 107230 */ "VGETMANTPSZrrik\000" |
| 56101 | /* 107246 */ "VMINMAXPSZrrik\000" |
| 56102 | /* 107261 */ "VREDUCESSZrrik\000" |
| 56103 | /* 107276 */ "VRANGESSZrrik\000" |
| 56104 | /* 107290 */ "VFIXUPIMMSSZrrik\000" |
| 56105 | /* 107307 */ "VGETMANTSSZrrik\000" |
| 56106 | /* 107323 */ "VDBPSADBWZrrik\000" |
| 56107 | /* 107338 */ "VMPSADBWZrrik\000" |
| 56108 | /* 107352 */ "VPSHLDWZrrik\000" |
| 56109 | /* 107365 */ "VPSHRDWZrrik\000" |
| 56110 | /* 107378 */ "VPCMPWZrrik\000" |
| 56111 | /* 107390 */ "VPCMPUWZrrik\000" |
| 56112 | /* 107403 */ "KADDBkk\000" |
| 56113 | /* 107411 */ "KANDBkk\000" |
| 56114 | /* 107419 */ "KANDNBkk\000" |
| 56115 | /* 107428 */ "KORBkk\000" |
| 56116 | /* 107435 */ "KXNORBkk\000" |
| 56117 | /* 107444 */ "KXORBkk\000" |
| 56118 | /* 107452 */ "KNOTBkk\000" |
| 56119 | /* 107460 */ "KTESTBkk\000" |
| 56120 | /* 107469 */ "KORTESTBkk\000" |
| 56121 | /* 107480 */ "KMOVBkk\000" |
| 56122 | /* 107488 */ "KADDDkk\000" |
| 56123 | /* 107496 */ "KANDDkk\000" |
| 56124 | /* 107504 */ "KANDNDkk\000" |
| 56125 | /* 107513 */ "KORDkk\000" |
| 56126 | /* 107520 */ "KXNORDkk\000" |
| 56127 | /* 107529 */ "KXORDkk\000" |
| 56128 | /* 107537 */ "KNOTDkk\000" |
| 56129 | /* 107545 */ "KTESTDkk\000" |
| 56130 | /* 107554 */ "KORTESTDkk\000" |
| 56131 | /* 107565 */ "KMOVDkk\000" |
| 56132 | /* 107573 */ "KUNPCKWDkk\000" |
| 56133 | /* 107584 */ "KADDQkk\000" |
| 56134 | /* 107592 */ "KUNPCKDQkk\000" |
| 56135 | /* 107603 */ "KANDQkk\000" |
| 56136 | /* 107611 */ "KANDNQkk\000" |
| 56137 | /* 107620 */ "KORQkk\000" |
| 56138 | /* 107627 */ "KXNORQkk\000" |
| 56139 | /* 107636 */ "KXORQkk\000" |
| 56140 | /* 107644 */ "KNOTQkk\000" |
| 56141 | /* 107652 */ "KTESTQkk\000" |
| 56142 | /* 107661 */ "KORTESTQkk\000" |
| 56143 | /* 107672 */ "KMOVQkk\000" |
| 56144 | /* 107680 */ "KUNPCKBWkk\000" |
| 56145 | /* 107691 */ "KADDWkk\000" |
| 56146 | /* 107699 */ "KANDWkk\000" |
| 56147 | /* 107707 */ "KANDNWkk\000" |
| 56148 | /* 107716 */ "KORWkk\000" |
| 56149 | /* 107723 */ "KXNORWkk\000" |
| 56150 | /* 107732 */ "KXORWkk\000" |
| 56151 | /* 107740 */ "KNOTWkk\000" |
| 56152 | /* 107748 */ "KTESTWkk\000" |
| 56153 | /* 107757 */ "KORTESTWkk\000" |
| 56154 | /* 107768 */ "KMOVWkk\000" |
| 56155 | /* 107776 */ "VFMSUB231BF16Z256mk\000" |
| 56156 | /* 107796 */ "VFNMSUB231BF16Z256mk\000" |
| 56157 | /* 107817 */ "VFMADD231BF16Z256mk\000" |
| 56158 | /* 107837 */ "VFNMADD231BF16Z256mk\000" |
| 56159 | /* 107858 */ "VFMSUB132BF16Z256mk\000" |
| 56160 | /* 107878 */ "VFNMSUB132BF16Z256mk\000" |
| 56161 | /* 107899 */ "VFMADD132BF16Z256mk\000" |
| 56162 | /* 107919 */ "VFNMADD132BF16Z256mk\000" |
| 56163 | /* 107940 */ "VFMSUB213BF16Z256mk\000" |
| 56164 | /* 107960 */ "VFNMSUB213BF16Z256mk\000" |
| 56165 | /* 107981 */ "VFMADD213BF16Z256mk\000" |
| 56166 | /* 108001 */ "VFNMADD213BF16Z256mk\000" |
| 56167 | /* 108022 */ "VRCPBF16Z256mk\000" |
| 56168 | /* 108037 */ "VGETEXPBF16Z256mk\000" |
| 56169 | /* 108055 */ "VRSQRTBF16Z256mk\000" |
| 56170 | /* 108072 */ "VSQRTBF16Z256mk\000" |
| 56171 | /* 108088 */ "VMOVRSBZ256mk\000" |
| 56172 | /* 108102 */ "VFMADDSUB231PDZ256mk\000" |
| 56173 | /* 108123 */ "VFMSUB231PDZ256mk\000" |
| 56174 | /* 108141 */ "VFNMSUB231PDZ256mk\000" |
| 56175 | /* 108160 */ "VFMSUBADD231PDZ256mk\000" |
| 56176 | /* 108181 */ "VFMADD231PDZ256mk\000" |
| 56177 | /* 108199 */ "VFNMADD231PDZ256mk\000" |
| 56178 | /* 108218 */ "VFMADDSUB132PDZ256mk\000" |
| 56179 | /* 108239 */ "VFMSUB132PDZ256mk\000" |
| 56180 | /* 108257 */ "VFNMSUB132PDZ256mk\000" |
| 56181 | /* 108276 */ "VFMSUBADD132PDZ256mk\000" |
| 56182 | /* 108297 */ "VFMADD132PDZ256mk\000" |
| 56183 | /* 108315 */ "VFNMADD132PDZ256mk\000" |
| 56184 | /* 108334 */ "VFMADDSUB213PDZ256mk\000" |
| 56185 | /* 108355 */ "VFMSUB213PDZ256mk\000" |
| 56186 | /* 108373 */ "VFNMSUB213PDZ256mk\000" |
| 56187 | /* 108392 */ "VFMSUBADD213PDZ256mk\000" |
| 56188 | /* 108413 */ "VFMADD213PDZ256mk\000" |
| 56189 | /* 108431 */ "VFNMADD213PDZ256mk\000" |
| 56190 | /* 108450 */ "VRCP14PDZ256mk\000" |
| 56191 | /* 108465 */ "VRSQRT14PDZ256mk\000" |
| 56192 | /* 108482 */ "VGETEXPPDZ256mk\000" |
| 56193 | /* 108498 */ "VSQRTPDZ256mk\000" |
| 56194 | /* 108512 */ "VMOVRSDZ256mk\000" |
| 56195 | /* 108526 */ "VPDPBSSDZ256mk\000" |
| 56196 | /* 108541 */ "VPDPWSSDZ256mk\000" |
| 56197 | /* 108556 */ "VPDPBUSDZ256mk\000" |
| 56198 | /* 108571 */ "VPDPWUSDZ256mk\000" |
| 56199 | /* 108586 */ "VPDPBSUDZ256mk\000" |
| 56200 | /* 108601 */ "VPDPWSUDZ256mk\000" |
| 56201 | /* 108616 */ "VPDPBUUDZ256mk\000" |
| 56202 | /* 108631 */ "VPDPWUUDZ256mk\000" |
| 56203 | /* 108646 */ "VPSHLDVDZ256mk\000" |
| 56204 | /* 108661 */ "VPSHRDVDZ256mk\000" |
| 56205 | /* 108676 */ "VFMADDSUB231PHZ256mk\000" |
| 56206 | /* 108697 */ "VFMSUB231PHZ256mk\000" |
| 56207 | /* 108715 */ "VFNMSUB231PHZ256mk\000" |
| 56208 | /* 108734 */ "VFMSUBADD231PHZ256mk\000" |
| 56209 | /* 108755 */ "VFMADD231PHZ256mk\000" |
| 56210 | /* 108773 */ "VFNMADD231PHZ256mk\000" |
| 56211 | /* 108792 */ "VFMADDSUB132PHZ256mk\000" |
| 56212 | /* 108813 */ "VFMSUB132PHZ256mk\000" |
| 56213 | /* 108831 */ "VFNMSUB132PHZ256mk\000" |
| 56214 | /* 108850 */ "VFMSUBADD132PHZ256mk\000" |
| 56215 | /* 108871 */ "VFMADD132PHZ256mk\000" |
| 56216 | /* 108889 */ "VFNMADD132PHZ256mk\000" |
| 56217 | /* 108908 */ "VFMADDSUB213PHZ256mk\000" |
| 56218 | /* 108929 */ "VFMSUB213PHZ256mk\000" |
| 56219 | /* 108947 */ "VFNMSUB213PHZ256mk\000" |
| 56220 | /* 108966 */ "VFMSUBADD213PHZ256mk\000" |
| 56221 | /* 108987 */ "VFMADD213PHZ256mk\000" |
| 56222 | /* 109005 */ "VFNMADD213PHZ256mk\000" |
| 56223 | /* 109024 */ "VFCMADDCPHZ256mk\000" |
| 56224 | /* 109041 */ "VFMADDCPHZ256mk\000" |
| 56225 | /* 109057 */ "VRCPPHZ256mk\000" |
| 56226 | /* 109070 */ "VGETEXPPHZ256mk\000" |
| 56227 | /* 109086 */ "VRSQRTPHZ256mk\000" |
| 56228 | /* 109101 */ "VSQRTPHZ256mk\000" |
| 56229 | /* 109115 */ "VMOVRSQZ256mk\000" |
| 56230 | /* 109129 */ "VPMADD52HUQZ256mk\000" |
| 56231 | /* 109147 */ "VPMADD52LUQZ256mk\000" |
| 56232 | /* 109165 */ "VPSHLDVQZ256mk\000" |
| 56233 | /* 109180 */ "VPSHRDVQZ256mk\000" |
| 56234 | /* 109195 */ "VPDPBSSDSZ256mk\000" |
| 56235 | /* 109211 */ "VPDPWSSDSZ256mk\000" |
| 56236 | /* 109227 */ "VPDPBUSDSZ256mk\000" |
| 56237 | /* 109243 */ "VPDPWUSDSZ256mk\000" |
| 56238 | /* 109259 */ "VPDPBSUDSZ256mk\000" |
| 56239 | /* 109275 */ "VPDPWSUDSZ256mk\000" |
| 56240 | /* 109291 */ "VPDPBUUDSZ256mk\000" |
| 56241 | /* 109307 */ "VPDPWUUDSZ256mk\000" |
| 56242 | /* 109323 */ "VFMADDSUB231PSZ256mk\000" |
| 56243 | /* 109344 */ "VFMSUB231PSZ256mk\000" |
| 56244 | /* 109362 */ "VFNMSUB231PSZ256mk\000" |
| 56245 | /* 109381 */ "VFMSUBADD231PSZ256mk\000" |
| 56246 | /* 109402 */ "VFMADD231PSZ256mk\000" |
| 56247 | /* 109420 */ "VFNMADD231PSZ256mk\000" |
| 56248 | /* 109439 */ "VFMADDSUB132PSZ256mk\000" |
| 56249 | /* 109460 */ "VFMSUB132PSZ256mk\000" |
| 56250 | /* 109478 */ "VFNMSUB132PSZ256mk\000" |
| 56251 | /* 109497 */ "VFMSUBADD132PSZ256mk\000" |
| 56252 | /* 109518 */ "VFMADD132PSZ256mk\000" |
| 56253 | /* 109536 */ "VFNMADD132PSZ256mk\000" |
| 56254 | /* 109555 */ "VFMADDSUB213PSZ256mk\000" |
| 56255 | /* 109576 */ "VFMSUB213PSZ256mk\000" |
| 56256 | /* 109594 */ "VFNMSUB213PSZ256mk\000" |
| 56257 | /* 109613 */ "VFMSUBADD213PSZ256mk\000" |
| 56258 | /* 109634 */ "VFMADD213PSZ256mk\000" |
| 56259 | /* 109652 */ "VFNMADD213PSZ256mk\000" |
| 56260 | /* 109671 */ "VRCP14PSZ256mk\000" |
| 56261 | /* 109686 */ "VRSQRT14PSZ256mk\000" |
| 56262 | /* 109703 */ "VDPBF16PSZ256mk\000" |
| 56263 | /* 109719 */ "VDPPHPSZ256mk\000" |
| 56264 | /* 109733 */ "VGETEXPPSZ256mk\000" |
| 56265 | /* 109749 */ "VSQRTPSZ256mk\000" |
| 56266 | /* 109763 */ "VMOVRSWZ256mk\000" |
| 56267 | /* 109777 */ "VPSHLDVWZ256mk\000" |
| 56268 | /* 109792 */ "VPSHRDVWZ256mk\000" |
| 56269 | /* 109807 */ "VFMSUB231BF16Z128mk\000" |
| 56270 | /* 109827 */ "VFNMSUB231BF16Z128mk\000" |
| 56271 | /* 109848 */ "VFMADD231BF16Z128mk\000" |
| 56272 | /* 109868 */ "VFNMADD231BF16Z128mk\000" |
| 56273 | /* 109889 */ "VFMSUB132BF16Z128mk\000" |
| 56274 | /* 109909 */ "VFNMSUB132BF16Z128mk\000" |
| 56275 | /* 109930 */ "VFMADD132BF16Z128mk\000" |
| 56276 | /* 109950 */ "VFNMADD132BF16Z128mk\000" |
| 56277 | /* 109971 */ "VFMSUB213BF16Z128mk\000" |
| 56278 | /* 109991 */ "VFNMSUB213BF16Z128mk\000" |
| 56279 | /* 110012 */ "VFMADD213BF16Z128mk\000" |
| 56280 | /* 110032 */ "VFNMADD213BF16Z128mk\000" |
| 56281 | /* 110053 */ "VRCPBF16Z128mk\000" |
| 56282 | /* 110068 */ "VGETEXPBF16Z128mk\000" |
| 56283 | /* 110086 */ "VRSQRTBF16Z128mk\000" |
| 56284 | /* 110103 */ "VSQRTBF16Z128mk\000" |
| 56285 | /* 110119 */ "VMOVRSBZ128mk\000" |
| 56286 | /* 110133 */ "VFMADDSUB231PDZ128mk\000" |
| 56287 | /* 110154 */ "VFMSUB231PDZ128mk\000" |
| 56288 | /* 110172 */ "VFNMSUB231PDZ128mk\000" |
| 56289 | /* 110191 */ "VFMSUBADD231PDZ128mk\000" |
| 56290 | /* 110212 */ "VFMADD231PDZ128mk\000" |
| 56291 | /* 110230 */ "VFNMADD231PDZ128mk\000" |
| 56292 | /* 110249 */ "VFMADDSUB132PDZ128mk\000" |
| 56293 | /* 110270 */ "VFMSUB132PDZ128mk\000" |
| 56294 | /* 110288 */ "VFNMSUB132PDZ128mk\000" |
| 56295 | /* 110307 */ "VFMSUBADD132PDZ128mk\000" |
| 56296 | /* 110328 */ "VFMADD132PDZ128mk\000" |
| 56297 | /* 110346 */ "VFNMADD132PDZ128mk\000" |
| 56298 | /* 110365 */ "VFMADDSUB213PDZ128mk\000" |
| 56299 | /* 110386 */ "VFMSUB213PDZ128mk\000" |
| 56300 | /* 110404 */ "VFNMSUB213PDZ128mk\000" |
| 56301 | /* 110423 */ "VFMSUBADD213PDZ128mk\000" |
| 56302 | /* 110444 */ "VFMADD213PDZ128mk\000" |
| 56303 | /* 110462 */ "VFNMADD213PDZ128mk\000" |
| 56304 | /* 110481 */ "VRCP14PDZ128mk\000" |
| 56305 | /* 110496 */ "VRSQRT14PDZ128mk\000" |
| 56306 | /* 110513 */ "VGETEXPPDZ128mk\000" |
| 56307 | /* 110529 */ "VSQRTPDZ128mk\000" |
| 56308 | /* 110543 */ "VMOVRSDZ128mk\000" |
| 56309 | /* 110557 */ "VPDPBSSDZ128mk\000" |
| 56310 | /* 110572 */ "VPDPWSSDZ128mk\000" |
| 56311 | /* 110587 */ "VPDPBUSDZ128mk\000" |
| 56312 | /* 110602 */ "VPDPWUSDZ128mk\000" |
| 56313 | /* 110617 */ "VPDPBSUDZ128mk\000" |
| 56314 | /* 110632 */ "VPDPWSUDZ128mk\000" |
| 56315 | /* 110647 */ "VPDPBUUDZ128mk\000" |
| 56316 | /* 110662 */ "VPDPWUUDZ128mk\000" |
| 56317 | /* 110677 */ "VPSHLDVDZ128mk\000" |
| 56318 | /* 110692 */ "VPSHRDVDZ128mk\000" |
| 56319 | /* 110707 */ "VFMADDSUB231PHZ128mk\000" |
| 56320 | /* 110728 */ "VFMSUB231PHZ128mk\000" |
| 56321 | /* 110746 */ "VFNMSUB231PHZ128mk\000" |
| 56322 | /* 110765 */ "VFMSUBADD231PHZ128mk\000" |
| 56323 | /* 110786 */ "VFMADD231PHZ128mk\000" |
| 56324 | /* 110804 */ "VFNMADD231PHZ128mk\000" |
| 56325 | /* 110823 */ "VFMADDSUB132PHZ128mk\000" |
| 56326 | /* 110844 */ "VFMSUB132PHZ128mk\000" |
| 56327 | /* 110862 */ "VFNMSUB132PHZ128mk\000" |
| 56328 | /* 110881 */ "VFMSUBADD132PHZ128mk\000" |
| 56329 | /* 110902 */ "VFMADD132PHZ128mk\000" |
| 56330 | /* 110920 */ "VFNMADD132PHZ128mk\000" |
| 56331 | /* 110939 */ "VFMADDSUB213PHZ128mk\000" |
| 56332 | /* 110960 */ "VFMSUB213PHZ128mk\000" |
| 56333 | /* 110978 */ "VFNMSUB213PHZ128mk\000" |
| 56334 | /* 110997 */ "VFMSUBADD213PHZ128mk\000" |
| 56335 | /* 111018 */ "VFMADD213PHZ128mk\000" |
| 56336 | /* 111036 */ "VFNMADD213PHZ128mk\000" |
| 56337 | /* 111055 */ "VFCMADDCPHZ128mk\000" |
| 56338 | /* 111072 */ "VFMADDCPHZ128mk\000" |
| 56339 | /* 111088 */ "VRCPPHZ128mk\000" |
| 56340 | /* 111101 */ "VGETEXPPHZ128mk\000" |
| 56341 | /* 111117 */ "VRSQRTPHZ128mk\000" |
| 56342 | /* 111132 */ "VSQRTPHZ128mk\000" |
| 56343 | /* 111146 */ "VMOVRSQZ128mk\000" |
| 56344 | /* 111160 */ "VPMADD52HUQZ128mk\000" |
| 56345 | /* 111178 */ "VPMADD52LUQZ128mk\000" |
| 56346 | /* 111196 */ "VPSHLDVQZ128mk\000" |
| 56347 | /* 111211 */ "VPSHRDVQZ128mk\000" |
| 56348 | /* 111226 */ "VPDPBSSDSZ128mk\000" |
| 56349 | /* 111242 */ "VPDPWSSDSZ128mk\000" |
| 56350 | /* 111258 */ "VPDPBUSDSZ128mk\000" |
| 56351 | /* 111274 */ "VPDPWUSDSZ128mk\000" |
| 56352 | /* 111290 */ "VPDPBSUDSZ128mk\000" |
| 56353 | /* 111306 */ "VPDPWSUDSZ128mk\000" |
| 56354 | /* 111322 */ "VPDPBUUDSZ128mk\000" |
| 56355 | /* 111338 */ "VPDPWUUDSZ128mk\000" |
| 56356 | /* 111354 */ "VFMADDSUB231PSZ128mk\000" |
| 56357 | /* 111375 */ "VFMSUB231PSZ128mk\000" |
| 56358 | /* 111393 */ "VFNMSUB231PSZ128mk\000" |
| 56359 | /* 111412 */ "VFMSUBADD231PSZ128mk\000" |
| 56360 | /* 111433 */ "VFMADD231PSZ128mk\000" |
| 56361 | /* 111451 */ "VFNMADD231PSZ128mk\000" |
| 56362 | /* 111470 */ "VFMADDSUB132PSZ128mk\000" |
| 56363 | /* 111491 */ "VFMSUB132PSZ128mk\000" |
| 56364 | /* 111509 */ "VFNMSUB132PSZ128mk\000" |
| 56365 | /* 111528 */ "VFMSUBADD132PSZ128mk\000" |
| 56366 | /* 111549 */ "VFMADD132PSZ128mk\000" |
| 56367 | /* 111567 */ "VFNMADD132PSZ128mk\000" |
| 56368 | /* 111586 */ "VFMADDSUB213PSZ128mk\000" |
| 56369 | /* 111607 */ "VFMSUB213PSZ128mk\000" |
| 56370 | /* 111625 */ "VFNMSUB213PSZ128mk\000" |
| 56371 | /* 111644 */ "VFMSUBADD213PSZ128mk\000" |
| 56372 | /* 111665 */ "VFMADD213PSZ128mk\000" |
| 56373 | /* 111683 */ "VFNMADD213PSZ128mk\000" |
| 56374 | /* 111702 */ "VRCP14PSZ128mk\000" |
| 56375 | /* 111717 */ "VRSQRT14PSZ128mk\000" |
| 56376 | /* 111734 */ "VDPBF16PSZ128mk\000" |
| 56377 | /* 111750 */ "VDPPHPSZ128mk\000" |
| 56378 | /* 111764 */ "VGETEXPPSZ128mk\000" |
| 56379 | /* 111780 */ "VSQRTPSZ128mk\000" |
| 56380 | /* 111794 */ "VMOVRSWZ128mk\000" |
| 56381 | /* 111808 */ "VPSHLDVWZ128mk\000" |
| 56382 | /* 111823 */ "VPSHRDVWZ128mk\000" |
| 56383 | /* 111838 */ "KMOVBmk\000" |
| 56384 | /* 111846 */ "KMOVDmk\000" |
| 56385 | /* 111854 */ "KMOVQmk\000" |
| 56386 | /* 111862 */ "KMOVWmk\000" |
| 56387 | /* 111870 */ "VFMSUB231BF16Zmk\000" |
| 56388 | /* 111887 */ "VFNMSUB231BF16Zmk\000" |
| 56389 | /* 111905 */ "VFMADD231BF16Zmk\000" |
| 56390 | /* 111922 */ "VFNMADD231BF16Zmk\000" |
| 56391 | /* 111940 */ "VFMSUB132BF16Zmk\000" |
| 56392 | /* 111957 */ "VFNMSUB132BF16Zmk\000" |
| 56393 | /* 111975 */ "VFMADD132BF16Zmk\000" |
| 56394 | /* 111992 */ "VFNMADD132BF16Zmk\000" |
| 56395 | /* 112010 */ "VFMSUB213BF16Zmk\000" |
| 56396 | /* 112027 */ "VFNMSUB213BF16Zmk\000" |
| 56397 | /* 112045 */ "VFMADD213BF16Zmk\000" |
| 56398 | /* 112062 */ "VFNMADD213BF16Zmk\000" |
| 56399 | /* 112080 */ "VRCPBF16Zmk\000" |
| 56400 | /* 112092 */ "VGETEXPBF16Zmk\000" |
| 56401 | /* 112107 */ "VRSQRTBF16Zmk\000" |
| 56402 | /* 112121 */ "VSQRTBF16Zmk\000" |
| 56403 | /* 112134 */ "VMOVRSBZmk\000" |
| 56404 | /* 112145 */ "VFMADDSUB231PDZmk\000" |
| 56405 | /* 112163 */ "VFMSUB231PDZmk\000" |
| 56406 | /* 112178 */ "VFNMSUB231PDZmk\000" |
| 56407 | /* 112194 */ "VFMSUBADD231PDZmk\000" |
| 56408 | /* 112212 */ "VFMADD231PDZmk\000" |
| 56409 | /* 112227 */ "VFNMADD231PDZmk\000" |
| 56410 | /* 112243 */ "VFMADDSUB132PDZmk\000" |
| 56411 | /* 112261 */ "VFMSUB132PDZmk\000" |
| 56412 | /* 112276 */ "VFNMSUB132PDZmk\000" |
| 56413 | /* 112292 */ "VFMSUBADD132PDZmk\000" |
| 56414 | /* 112310 */ "VFMADD132PDZmk\000" |
| 56415 | /* 112325 */ "VFNMADD132PDZmk\000" |
| 56416 | /* 112341 */ "VEXP2PDZmk\000" |
| 56417 | /* 112352 */ "VFMADDSUB213PDZmk\000" |
| 56418 | /* 112370 */ "VFMSUB213PDZmk\000" |
| 56419 | /* 112385 */ "VFNMSUB213PDZmk\000" |
| 56420 | /* 112401 */ "VFMSUBADD213PDZmk\000" |
| 56421 | /* 112419 */ "VFMADD213PDZmk\000" |
| 56422 | /* 112434 */ "VFNMADD213PDZmk\000" |
| 56423 | /* 112450 */ "VRCP14PDZmk\000" |
| 56424 | /* 112462 */ "VRSQRT14PDZmk\000" |
| 56425 | /* 112476 */ "VRCP28PDZmk\000" |
| 56426 | /* 112488 */ "VRSQRT28PDZmk\000" |
| 56427 | /* 112502 */ "VGETEXPPDZmk\000" |
| 56428 | /* 112515 */ "VSQRTPDZmk\000" |
| 56429 | /* 112526 */ "VRCP28SDZmk\000" |
| 56430 | /* 112538 */ "VRSQRT28SDZmk\000" |
| 56431 | /* 112552 */ "VGETEXPSDZmk\000" |
| 56432 | /* 112565 */ "VMOVRSDZmk\000" |
| 56433 | /* 112576 */ "VPDPBSSDZmk\000" |
| 56434 | /* 112588 */ "VPDPWSSDZmk\000" |
| 56435 | /* 112600 */ "VPDPBUSDZmk\000" |
| 56436 | /* 112612 */ "VPDPWUSDZmk\000" |
| 56437 | /* 112624 */ "VPDPBSUDZmk\000" |
| 56438 | /* 112636 */ "VPDPWSUDZmk\000" |
| 56439 | /* 112648 */ "VPDPBUUDZmk\000" |
| 56440 | /* 112660 */ "VPDPWUUDZmk\000" |
| 56441 | /* 112672 */ "VPSHLDVDZmk\000" |
| 56442 | /* 112684 */ "VPSHRDVDZmk\000" |
| 56443 | /* 112696 */ "VFMADDSUB231PHZmk\000" |
| 56444 | /* 112714 */ "VFMSUB231PHZmk\000" |
| 56445 | /* 112729 */ "VFNMSUB231PHZmk\000" |
| 56446 | /* 112745 */ "VFMSUBADD231PHZmk\000" |
| 56447 | /* 112763 */ "VFMADD231PHZmk\000" |
| 56448 | /* 112778 */ "VFNMADD231PHZmk\000" |
| 56449 | /* 112794 */ "VFMADDSUB132PHZmk\000" |
| 56450 | /* 112812 */ "VFMSUB132PHZmk\000" |
| 56451 | /* 112827 */ "VFNMSUB132PHZmk\000" |
| 56452 | /* 112843 */ "VFMSUBADD132PHZmk\000" |
| 56453 | /* 112861 */ "VFMADD132PHZmk\000" |
| 56454 | /* 112876 */ "VFNMADD132PHZmk\000" |
| 56455 | /* 112892 */ "VFMADDSUB213PHZmk\000" |
| 56456 | /* 112910 */ "VFMSUB213PHZmk\000" |
| 56457 | /* 112925 */ "VFNMSUB213PHZmk\000" |
| 56458 | /* 112941 */ "VFMSUBADD213PHZmk\000" |
| 56459 | /* 112959 */ "VFMADD213PHZmk\000" |
| 56460 | /* 112974 */ "VFNMADD213PHZmk\000" |
| 56461 | /* 112990 */ "VFCMADDCPHZmk\000" |
| 56462 | /* 113004 */ "VFMADDCPHZmk\000" |
| 56463 | /* 113017 */ "VRCPPHZmk\000" |
| 56464 | /* 113027 */ "VGETEXPPHZmk\000" |
| 56465 | /* 113040 */ "VRSQRTPHZmk\000" |
| 56466 | /* 113052 */ "VSQRTPHZmk\000" |
| 56467 | /* 113063 */ "VFCMADDCSHZmk\000" |
| 56468 | /* 113077 */ "VFMADDCSHZmk\000" |
| 56469 | /* 113090 */ "VGETEXPSHZmk\000" |
| 56470 | /* 113103 */ "VMOVRSQZmk\000" |
| 56471 | /* 113114 */ "VPMADD52HUQZmk\000" |
| 56472 | /* 113129 */ "VPMADD52LUQZmk\000" |
| 56473 | /* 113144 */ "VPSHLDVQZmk\000" |
| 56474 | /* 113156 */ "VPSHRDVQZmk\000" |
| 56475 | /* 113168 */ "VPDPBSSDSZmk\000" |
| 56476 | /* 113181 */ "VPDPWSSDSZmk\000" |
| 56477 | /* 113194 */ "VPDPBUSDSZmk\000" |
| 56478 | /* 113207 */ "VPDPWUSDSZmk\000" |
| 56479 | /* 113220 */ "VPDPBSUDSZmk\000" |
| 56480 | /* 113233 */ "VPDPWSUDSZmk\000" |
| 56481 | /* 113246 */ "VPDPBUUDSZmk\000" |
| 56482 | /* 113259 */ "VPDPWUUDSZmk\000" |
| 56483 | /* 113272 */ "VFMADDSUB231PSZmk\000" |
| 56484 | /* 113290 */ "VFMSUB231PSZmk\000" |
| 56485 | /* 113305 */ "VFNMSUB231PSZmk\000" |
| 56486 | /* 113321 */ "VFMSUBADD231PSZmk\000" |
| 56487 | /* 113339 */ "VFMADD231PSZmk\000" |
| 56488 | /* 113354 */ "VFNMADD231PSZmk\000" |
| 56489 | /* 113370 */ "VFMADDSUB132PSZmk\000" |
| 56490 | /* 113388 */ "VFMSUB132PSZmk\000" |
| 56491 | /* 113403 */ "VFNMSUB132PSZmk\000" |
| 56492 | /* 113419 */ "VFMSUBADD132PSZmk\000" |
| 56493 | /* 113437 */ "VFMADD132PSZmk\000" |
| 56494 | /* 113452 */ "VFNMADD132PSZmk\000" |
| 56495 | /* 113468 */ "VEXP2PSZmk\000" |
| 56496 | /* 113479 */ "VFMADDSUB213PSZmk\000" |
| 56497 | /* 113497 */ "VFMSUB213PSZmk\000" |
| 56498 | /* 113512 */ "VFNMSUB213PSZmk\000" |
| 56499 | /* 113528 */ "VFMSUBADD213PSZmk\000" |
| 56500 | /* 113546 */ "VFMADD213PSZmk\000" |
| 56501 | /* 113561 */ "VFNMADD213PSZmk\000" |
| 56502 | /* 113577 */ "VRCP14PSZmk\000" |
| 56503 | /* 113589 */ "VRSQRT14PSZmk\000" |
| 56504 | /* 113603 */ "VDPBF16PSZmk\000" |
| 56505 | /* 113616 */ "VRCP28PSZmk\000" |
| 56506 | /* 113628 */ "VRSQRT28PSZmk\000" |
| 56507 | /* 113642 */ "VDPPHPSZmk\000" |
| 56508 | /* 113653 */ "VGETEXPPSZmk\000" |
| 56509 | /* 113666 */ "VSQRTPSZmk\000" |
| 56510 | /* 113677 */ "VRCP28SSZmk\000" |
| 56511 | /* 113689 */ "VRSQRT28SSZmk\000" |
| 56512 | /* 113703 */ "VGETEXPSSZmk\000" |
| 56513 | /* 113716 */ "VMOVRSWZmk\000" |
| 56514 | /* 113727 */ "VPSHLDVWZmk\000" |
| 56515 | /* 113739 */ "VPSHRDVWZmk\000" |
| 56516 | /* 113751 */ "VMOVDQA32Z256rmk\000" |
| 56517 | /* 113768 */ "VMOVDQU32Z256rmk\000" |
| 56518 | /* 113785 */ "VBROADCASTF32X2Z256rmk\000" |
| 56519 | /* 113808 */ "VBROADCASTI32X2Z256rmk\000" |
| 56520 | /* 113831 */ "VBROADCASTF64X2Z256rmk\000" |
| 56521 | /* 113854 */ "VBROADCASTI64X2Z256rmk\000" |
| 56522 | /* 113877 */ "VMOVDQA64Z256rmk\000" |
| 56523 | /* 113894 */ "VMOVDQU64Z256rmk\000" |
| 56524 | /* 113911 */ "VBROADCASTF32X4Z256rmk\000" |
| 56525 | /* 113934 */ "VBROADCASTI32X4Z256rmk\000" |
| 56526 | /* 113957 */ "VCVTNE2PS2BF16Z256rmk\000" |
| 56527 | /* 113979 */ "VCVTNEPS2BF16Z256rmk\000" |
| 56528 | /* 114000 */ "VSUBBF16Z256rmk\000" |
| 56529 | /* 114016 */ "VADDBF16Z256rmk\000" |
| 56530 | /* 114032 */ "VSCALEFBF16Z256rmk\000" |
| 56531 | /* 114051 */ "VMULBF16Z256rmk\000" |
| 56532 | /* 114067 */ "VMINBF16Z256rmk\000" |
| 56533 | /* 114083 */ "VDIVBF16Z256rmk\000" |
| 56534 | /* 114099 */ "VMAXBF16Z256rmk\000" |
| 56535 | /* 114115 */ "VMOVDQU16Z256rmk\000" |
| 56536 | /* 114132 */ "VCVT2PH2BF8Z256rmk\000" |
| 56537 | /* 114151 */ "VCVTBIASPH2BF8Z256rmk\000" |
| 56538 | /* 114173 */ "VCVTPH2BF8Z256rmk\000" |
| 56539 | /* 114191 */ "VCVT2PH2HF8Z256rmk\000" |
| 56540 | /* 114210 */ "VCVTBIASPH2HF8Z256rmk\000" |
| 56541 | /* 114232 */ "VCVTPH2HF8Z256rmk\000" |
| 56542 | /* 114250 */ "VMOVDQU8Z256rmk\000" |
| 56543 | /* 114266 */ "VPERMI2BZ256rmk\000" |
| 56544 | /* 114282 */ "VPERMT2BZ256rmk\000" |
| 56545 | /* 114298 */ "VPSUBBZ256rmk\000" |
| 56546 | /* 114312 */ "VPADDBZ256rmk\000" |
| 56547 | /* 114326 */ "VPEXPANDBZ256rmk\000" |
| 56548 | /* 114343 */ "VPSHUFBZ256rmk\000" |
| 56549 | /* 114358 */ "VPAVGBZ256rmk\000" |
| 56550 | /* 114372 */ "VGF2P8MULBZ256rmk\000" |
| 56551 | /* 114390 */ "VPBLENDMBZ256rmk\000" |
| 56552 | /* 114407 */ "VPTESTNMBZ256rmk\000" |
| 56553 | /* 114424 */ "VPSHUFBITQMBZ256rmk\000" |
| 56554 | /* 114444 */ "VPERMBZ256rmk\000" |
| 56555 | /* 114458 */ "VPTESTMBZ256rmk\000" |
| 56556 | /* 114474 */ "VPCMPEQBZ256rmk\000" |
| 56557 | /* 114490 */ "VPMULTISHIFTQBZ256rmk\000" |
| 56558 | /* 114512 */ "VPABSBZ256rmk\000" |
| 56559 | /* 114526 */ "VPSUBSBZ256rmk\000" |
| 56560 | /* 114541 */ "VPADDSBZ256rmk\000" |
| 56561 | /* 114556 */ "VPMINSBZ256rmk\000" |
| 56562 | /* 114571 */ "VPSUBUSBZ256rmk\000" |
| 56563 | /* 114587 */ "VPADDUSBZ256rmk\000" |
| 56564 | /* 114603 */ "VPMAXSBZ256rmk\000" |
| 56565 | /* 114618 */ "VPCMPGTBZ256rmk\000" |
| 56566 | /* 114634 */ "VPOPCNTBZ256rmk\000" |
| 56567 | /* 114650 */ "VPBROADCASTBZ256rmk\000" |
| 56568 | /* 114670 */ "VPMINUBZ256rmk\000" |
| 56569 | /* 114685 */ "VPMAXUBZ256rmk\000" |
| 56570 | /* 114700 */ "VPACKSSWBZ256rmk\000" |
| 56571 | /* 114717 */ "VPACKUSWBZ256rmk\000" |
| 56572 | /* 114734 */ "VPERMI2DZ256rmk\000" |
| 56573 | /* 114750 */ "VPERMT2DZ256rmk\000" |
| 56574 | /* 114766 */ "VPSRADZ256rmk\000" |
| 56575 | /* 114780 */ "VPSUBDZ256rmk\000" |
| 56576 | /* 114794 */ "VPMOVSXBDZ256rmk\000" |
| 56577 | /* 114811 */ "VPMOVZXBDZ256rmk\000" |
| 56578 | /* 114828 */ "VPADDDZ256rmk\000" |
| 56579 | /* 114842 */ "VPANDDZ256rmk\000" |
| 56580 | /* 114856 */ "VPEXPANDDZ256rmk\000" |
| 56581 | /* 114873 */ "VPSLLDZ256rmk\000" |
| 56582 | /* 114887 */ "VPMULLDZ256rmk\000" |
| 56583 | /* 114902 */ "VPSRLDZ256rmk\000" |
| 56584 | /* 114916 */ "VPBLENDMDZ256rmk\000" |
| 56585 | /* 114933 */ "VPTESTNMDZ256rmk\000" |
| 56586 | /* 114950 */ "VPERMDZ256rmk\000" |
| 56587 | /* 114964 */ "VPTESTMDZ256rmk\000" |
| 56588 | /* 114980 */ "VPANDNDZ256rmk\000" |
| 56589 | /* 114995 */ "VCVTPH2PDZ256rmk\000" |
| 56590 | /* 115012 */ "VPERMI2PDZ256rmk\000" |
| 56591 | /* 115029 */ "VCVTDQ2PDZ256rmk\000" |
| 56592 | /* 115046 */ "VCVTUDQ2PDZ256rmk\000" |
| 56593 | /* 115064 */ "VCVTQQ2PDZ256rmk\000" |
| 56594 | /* 115081 */ "VCVTUQQ2PDZ256rmk\000" |
| 56595 | /* 115099 */ "VCVTPS2PDZ256rmk\000" |
| 56596 | /* 115116 */ "VPERMT2PDZ256rmk\000" |
| 56597 | /* 115133 */ "VMOVAPDZ256rmk\000" |
| 56598 | /* 115148 */ "VSUBPDZ256rmk\000" |
| 56599 | /* 115162 */ "VMINCPDZ256rmk\000" |
| 56600 | /* 115177 */ "VMAXCPDZ256rmk\000" |
| 56601 | /* 115192 */ "VADDPDZ256rmk\000" |
| 56602 | /* 115206 */ "VEXPANDPDZ256rmk\000" |
| 56603 | /* 115223 */ "VANDPDZ256rmk\000" |
| 56604 | /* 115237 */ "VSCALEFPDZ256rmk\000" |
| 56605 | /* 115254 */ "VUNPCKHPDZ256rmk\000" |
| 56606 | /* 115271 */ "VPERMILPDZ256rmk\000" |
| 56607 | /* 115288 */ "VUNPCKLPDZ256rmk\000" |
| 56608 | /* 115305 */ "VMULPDZ256rmk\000" |
| 56609 | /* 115319 */ "VBLENDMPDZ256rmk\000" |
| 56610 | /* 115336 */ "VPERMPDZ256rmk\000" |
| 56611 | /* 115351 */ "VANDNPDZ256rmk\000" |
| 56612 | /* 115366 */ "VMINPDZ256rmk\000" |
| 56613 | /* 115380 */ "VORPDZ256rmk\000" |
| 56614 | /* 115393 */ "VXORPDZ256rmk\000" |
| 56615 | /* 115407 */ "VMOVUPDZ256rmk\000" |
| 56616 | /* 115422 */ "VDIVPDZ256rmk\000" |
| 56617 | /* 115436 */ "VMAXPDZ256rmk\000" |
| 56618 | /* 115450 */ "VPCMPEQDZ256rmk\000" |
| 56619 | /* 115466 */ "VPORDZ256rmk\000" |
| 56620 | /* 115479 */ "VPXORDZ256rmk\000" |
| 56621 | /* 115493 */ "VPABSDZ256rmk\000" |
| 56622 | /* 115507 */ "VPMINSDZ256rmk\000" |
| 56623 | /* 115522 */ "VBROADCASTSDZ256rmk\000" |
| 56624 | /* 115542 */ "VPMAXSDZ256rmk\000" |
| 56625 | /* 115557 */ "VPCONFLICTDZ256rmk\000" |
| 56626 | /* 115576 */ "VPCMPGTDZ256rmk\000" |
| 56627 | /* 115592 */ "VPOPCNTDZ256rmk\000" |
| 56628 | /* 115608 */ "VPLZCNTDZ256rmk\000" |
| 56629 | /* 115624 */ "VPBROADCASTDZ256rmk\000" |
| 56630 | /* 115644 */ "VPMINUDZ256rmk\000" |
| 56631 | /* 115659 */ "VPMAXUDZ256rmk\000" |
| 56632 | /* 115674 */ "VPSRAVDZ256rmk\000" |
| 56633 | /* 115689 */ "VPSLLVDZ256rmk\000" |
| 56634 | /* 115704 */ "VPROLVDZ256rmk\000" |
| 56635 | /* 115719 */ "VPSRLVDZ256rmk\000" |
| 56636 | /* 115734 */ "VPRORVDZ256rmk\000" |
| 56637 | /* 115749 */ "VPMADDWDZ256rmk\000" |
| 56638 | /* 115765 */ "VPUNPCKHWDZ256rmk\000" |
| 56639 | /* 115783 */ "VPUNPCKLWDZ256rmk\000" |
| 56640 | /* 115801 */ "VPMOVSXWDZ256rmk\000" |
| 56641 | /* 115818 */ "VPMOVZXWDZ256rmk\000" |
| 56642 | /* 115835 */ "VCVTHF82PHZ256rmk\000" |
| 56643 | /* 115853 */ "VCVTPD2PHZ256rmk\000" |
| 56644 | /* 115870 */ "VCVTDQ2PHZ256rmk\000" |
| 56645 | /* 115887 */ "VCVTUDQ2PHZ256rmk\000" |
| 56646 | /* 115905 */ "VCVTQQ2PHZ256rmk\000" |
| 56647 | /* 115922 */ "VCVTUQQ2PHZ256rmk\000" |
| 56648 | /* 115940 */ "VCVTW2PHZ256rmk\000" |
| 56649 | /* 115956 */ "VCVTUW2PHZ256rmk\000" |
| 56650 | /* 115973 */ "VSUBPHZ256rmk\000" |
| 56651 | /* 115987 */ "VFCMULCPHZ256rmk\000" |
| 56652 | /* 116004 */ "VFMULCPHZ256rmk\000" |
| 56653 | /* 116020 */ "VMINCPHZ256rmk\000" |
| 56654 | /* 116035 */ "VMAXCPHZ256rmk\000" |
| 56655 | /* 116050 */ "VADDPHZ256rmk\000" |
| 56656 | /* 116064 */ "VSCALEFPHZ256rmk\000" |
| 56657 | /* 116081 */ "VMULPHZ256rmk\000" |
| 56658 | /* 116095 */ "VMINPHZ256rmk\000" |
| 56659 | /* 116109 */ "VDIVPHZ256rmk\000" |
| 56660 | /* 116123 */ "VMAXPHZ256rmk\000" |
| 56661 | /* 116137 */ "VMOVDDUPZ256rmk\000" |
| 56662 | /* 116153 */ "VMOVSHDUPZ256rmk\000" |
| 56663 | /* 116170 */ "VMOVSLDUPZ256rmk\000" |
| 56664 | /* 116187 */ "VPERMI2QZ256rmk\000" |
| 56665 | /* 116203 */ "VPERMT2QZ256rmk\000" |
| 56666 | /* 116219 */ "VPSRAQZ256rmk\000" |
| 56667 | /* 116233 */ "VPSUBQZ256rmk\000" |
| 56668 | /* 116247 */ "VPMOVSXBQZ256rmk\000" |
| 56669 | /* 116264 */ "VPMOVZXBQZ256rmk\000" |
| 56670 | /* 116281 */ "VCVTTPD2DQZ256rmk\000" |
| 56671 | /* 116299 */ "VCVTPD2DQZ256rmk\000" |
| 56672 | /* 116316 */ "VCVTTPH2DQZ256rmk\000" |
| 56673 | /* 116334 */ "VCVTPH2DQZ256rmk\000" |
| 56674 | /* 116351 */ "VCVTTPS2DQZ256rmk\000" |
| 56675 | /* 116369 */ "VCVTPS2DQZ256rmk\000" |
| 56676 | /* 116386 */ "VPADDQZ256rmk\000" |
| 56677 | /* 116400 */ "VPUNPCKHDQZ256rmk\000" |
| 56678 | /* 116418 */ "VPUNPCKLDQZ256rmk\000" |
| 56679 | /* 116436 */ "VPMULDQZ256rmk\000" |
| 56680 | /* 116451 */ "VPANDQZ256rmk\000" |
| 56681 | /* 116465 */ "VPEXPANDQZ256rmk\000" |
| 56682 | /* 116482 */ "VPUNPCKHQDQZ256rmk\000" |
| 56683 | /* 116501 */ "VPUNPCKLQDQZ256rmk\000" |
| 56684 | /* 116520 */ "VCVTTPD2UDQZ256rmk\000" |
| 56685 | /* 116539 */ "VCVTPD2UDQZ256rmk\000" |
| 56686 | /* 116557 */ "VCVTTPH2UDQZ256rmk\000" |
| 56687 | /* 116576 */ "VCVTPH2UDQZ256rmk\000" |
| 56688 | /* 116594 */ "VCVTTPS2UDQZ256rmk\000" |
| 56689 | /* 116613 */ "VCVTPS2UDQZ256rmk\000" |
| 56690 | /* 116631 */ "VPMULUDQZ256rmk\000" |
| 56691 | /* 116647 */ "VPMOVSXDQZ256rmk\000" |
| 56692 | /* 116664 */ "VPMOVZXDQZ256rmk\000" |
| 56693 | /* 116681 */ "VPSLLQZ256rmk\000" |
| 56694 | /* 116695 */ "VPMULLQZ256rmk\000" |
| 56695 | /* 116710 */ "VPSRLQZ256rmk\000" |
| 56696 | /* 116724 */ "VPBLENDMQZ256rmk\000" |
| 56697 | /* 116741 */ "VPTESTNMQZ256rmk\000" |
| 56698 | /* 116758 */ "VPERMQZ256rmk\000" |
| 56699 | /* 116772 */ "VPTESTMQZ256rmk\000" |
| 56700 | /* 116788 */ "VPANDNQZ256rmk\000" |
| 56701 | /* 116803 */ "VCVTTPD2QQZ256rmk\000" |
| 56702 | /* 116821 */ "VCVTPD2QQZ256rmk\000" |
| 56703 | /* 116838 */ "VCVTTPH2QQZ256rmk\000" |
| 56704 | /* 116856 */ "VCVTPH2QQZ256rmk\000" |
| 56705 | /* 116873 */ "VCVTTPS2QQZ256rmk\000" |
| 56706 | /* 116891 */ "VCVTPS2QQZ256rmk\000" |
| 56707 | /* 116908 */ "VPCMPEQQZ256rmk\000" |
| 56708 | /* 116924 */ "VCVTTPD2UQQZ256rmk\000" |
| 56709 | /* 116943 */ "VCVTPD2UQQZ256rmk\000" |
| 56710 | /* 116961 */ "VCVTTPH2UQQZ256rmk\000" |
| 56711 | /* 116980 */ "VCVTPH2UQQZ256rmk\000" |
| 56712 | /* 116998 */ "VCVTTPS2UQQZ256rmk\000" |
| 56713 | /* 117017 */ "VCVTPS2UQQZ256rmk\000" |
| 56714 | /* 117035 */ "VPORQZ256rmk\000" |
| 56715 | /* 117048 */ "VPXORQZ256rmk\000" |
| 56716 | /* 117062 */ "VPABSQZ256rmk\000" |
| 56717 | /* 117076 */ "VPMINSQZ256rmk\000" |
| 56718 | /* 117091 */ "VPMAXSQZ256rmk\000" |
| 56719 | /* 117106 */ "VPCONFLICTQZ256rmk\000" |
| 56720 | /* 117125 */ "VPCMPGTQZ256rmk\000" |
| 56721 | /* 117141 */ "VPOPCNTQZ256rmk\000" |
| 56722 | /* 117157 */ "VPLZCNTQZ256rmk\000" |
| 56723 | /* 117173 */ "VPBROADCASTQZ256rmk\000" |
| 56724 | /* 117193 */ "VPMINUQZ256rmk\000" |
| 56725 | /* 117208 */ "VPMAXUQZ256rmk\000" |
| 56726 | /* 117223 */ "VPSRAVQZ256rmk\000" |
| 56727 | /* 117238 */ "VPSLLVQZ256rmk\000" |
| 56728 | /* 117253 */ "VPROLVQZ256rmk\000" |
| 56729 | /* 117268 */ "VPSRLVQZ256rmk\000" |
| 56730 | /* 117283 */ "VPRORVQZ256rmk\000" |
| 56731 | /* 117298 */ "VPMOVSXWQZ256rmk\000" |
| 56732 | /* 117315 */ "VPMOVZXWQZ256rmk\000" |
| 56733 | /* 117332 */ "VCVT2PH2BF8SZ256rmk\000" |
| 56734 | /* 117352 */ "VCVTBIASPH2BF8SZ256rmk\000" |
| 56735 | /* 117375 */ "VCVTPH2BF8SZ256rmk\000" |
| 56736 | /* 117394 */ "VCVT2PH2HF8SZ256rmk\000" |
| 56737 | /* 117414 */ "VCVTBIASPH2HF8SZ256rmk\000" |
| 56738 | /* 117437 */ "VCVTPH2HF8SZ256rmk\000" |
| 56739 | /* 117456 */ "VCVTTBF162IBSZ256rmk\000" |
| 56740 | /* 117477 */ "VCVTBF162IBSZ256rmk\000" |
| 56741 | /* 117497 */ "VCVTTPH2IBSZ256rmk\000" |
| 56742 | /* 117516 */ "VCVTPH2IBSZ256rmk\000" |
| 56743 | /* 117534 */ "VCVTTPS2IBSZ256rmk\000" |
| 56744 | /* 117553 */ "VCVTPS2IBSZ256rmk\000" |
| 56745 | /* 117571 */ "VCVTTBF162IUBSZ256rmk\000" |
| 56746 | /* 117593 */ "VCVTBF162IUBSZ256rmk\000" |
| 56747 | /* 117614 */ "VCVTTPH2IUBSZ256rmk\000" |
| 56748 | /* 117634 */ "VCVTPH2IUBSZ256rmk\000" |
| 56749 | /* 117653 */ "VCVTTPS2IUBSZ256rmk\000" |
| 56750 | /* 117673 */ "VCVTPS2IUBSZ256rmk\000" |
| 56751 | /* 117692 */ "VCVTPD2PSZ256rmk\000" |
| 56752 | /* 117709 */ "VCVTPH2PSZ256rmk\000" |
| 56753 | /* 117726 */ "VPERMI2PSZ256rmk\000" |
| 56754 | /* 117743 */ "VCVTDQ2PSZ256rmk\000" |
| 56755 | /* 117760 */ "VCVTUDQ2PSZ256rmk\000" |
| 56756 | /* 117778 */ "VCVTQQ2PSZ256rmk\000" |
| 56757 | /* 117795 */ "VCVTUQQ2PSZ256rmk\000" |
| 56758 | /* 117813 */ "VPERMT2PSZ256rmk\000" |
| 56759 | /* 117830 */ "VMOVAPSZ256rmk\000" |
| 56760 | /* 117845 */ "VSUBPSZ256rmk\000" |
| 56761 | /* 117859 */ "VMINCPSZ256rmk\000" |
| 56762 | /* 117874 */ "VMAXCPSZ256rmk\000" |
| 56763 | /* 117889 */ "VADDPSZ256rmk\000" |
| 56764 | /* 117903 */ "VEXPANDPSZ256rmk\000" |
| 56765 | /* 117920 */ "VANDPSZ256rmk\000" |
| 56766 | /* 117934 */ "VSCALEFPSZ256rmk\000" |
| 56767 | /* 117951 */ "VUNPCKHPSZ256rmk\000" |
| 56768 | /* 117968 */ "VPERMILPSZ256rmk\000" |
| 56769 | /* 117985 */ "VUNPCKLPSZ256rmk\000" |
| 56770 | /* 118002 */ "VMULPSZ256rmk\000" |
| 56771 | /* 118016 */ "VBLENDMPSZ256rmk\000" |
| 56772 | /* 118033 */ "VPERMPSZ256rmk\000" |
| 56773 | /* 118048 */ "VANDNPSZ256rmk\000" |
| 56774 | /* 118063 */ "VMINPSZ256rmk\000" |
| 56775 | /* 118077 */ "VORPSZ256rmk\000" |
| 56776 | /* 118090 */ "VXORPSZ256rmk\000" |
| 56777 | /* 118104 */ "VMOVUPSZ256rmk\000" |
| 56778 | /* 118119 */ "VDIVPSZ256rmk\000" |
| 56779 | /* 118133 */ "VMAXPSZ256rmk\000" |
| 56780 | /* 118147 */ "VCVTTPD2DQSZ256rmk\000" |
| 56781 | /* 118166 */ "VCVTTPS2DQSZ256rmk\000" |
| 56782 | /* 118185 */ "VCVTTPD2UDQSZ256rmk\000" |
| 56783 | /* 118205 */ "VCVTTPS2UDQSZ256rmk\000" |
| 56784 | /* 118225 */ "VCVTTPD2QQSZ256rmk\000" |
| 56785 | /* 118244 */ "VCVTTPS2QQSZ256rmk\000" |
| 56786 | /* 118263 */ "VCVTTPD2UQQSZ256rmk\000" |
| 56787 | /* 118283 */ "VCVTTPS2UQQSZ256rmk\000" |
| 56788 | /* 118303 */ "VBROADCASTSSZ256rmk\000" |
| 56789 | /* 118323 */ "VCVTTPH2WZ256rmk\000" |
| 56790 | /* 118340 */ "VCVTPH2WZ256rmk\000" |
| 56791 | /* 118356 */ "VPERMI2WZ256rmk\000" |
| 56792 | /* 118372 */ "VPERMT2WZ256rmk\000" |
| 56793 | /* 118388 */ "VPSRAWZ256rmk\000" |
| 56794 | /* 118402 */ "VPUNPCKHBWZ256rmk\000" |
| 56795 | /* 118420 */ "VPUNPCKLBWZ256rmk\000" |
| 56796 | /* 118438 */ "VPSUBWZ256rmk\000" |
| 56797 | /* 118452 */ "VPMOVSXBWZ256rmk\000" |
| 56798 | /* 118469 */ "VPMOVZXBWZ256rmk\000" |
| 56799 | /* 118486 */ "VPADDWZ256rmk\000" |
| 56800 | /* 118500 */ "VPEXPANDWZ256rmk\000" |
| 56801 | /* 118517 */ "VPACKSSDWZ256rmk\000" |
| 56802 | /* 118534 */ "VPACKUSDWZ256rmk\000" |
| 56803 | /* 118551 */ "VPAVGWZ256rmk\000" |
| 56804 | /* 118565 */ "VPMULHWZ256rmk\000" |
| 56805 | /* 118580 */ "VPSLLWZ256rmk\000" |
| 56806 | /* 118594 */ "VPMULLWZ256rmk\000" |
| 56807 | /* 118609 */ "VPSRLWZ256rmk\000" |
| 56808 | /* 118623 */ "VPBLENDMWZ256rmk\000" |
| 56809 | /* 118640 */ "VPTESTNMWZ256rmk\000" |
| 56810 | /* 118657 */ "VPERMWZ256rmk\000" |
| 56811 | /* 118671 */ "VPTESTMWZ256rmk\000" |
| 56812 | /* 118687 */ "VPCMPEQWZ256rmk\000" |
| 56813 | /* 118703 */ "VPABSWZ256rmk\000" |
| 56814 | /* 118717 */ "VPMADDUBSWZ256rmk\000" |
| 56815 | /* 118735 */ "VPSUBSWZ256rmk\000" |
| 56816 | /* 118750 */ "VPADDSWZ256rmk\000" |
| 56817 | /* 118765 */ "VPMINSWZ256rmk\000" |
| 56818 | /* 118780 */ "VPMULHRSWZ256rmk\000" |
| 56819 | /* 118797 */ "VPSUBUSWZ256rmk\000" |
| 56820 | /* 118813 */ "VPADDUSWZ256rmk\000" |
| 56821 | /* 118829 */ "VPMAXSWZ256rmk\000" |
| 56822 | /* 118844 */ "VPCMPGTWZ256rmk\000" |
| 56823 | /* 118860 */ "VPOPCNTWZ256rmk\000" |
| 56824 | /* 118876 */ "VPBROADCASTWZ256rmk\000" |
| 56825 | /* 118896 */ "VCVTTPH2UWZ256rmk\000" |
| 56826 | /* 118914 */ "VCVTPH2UWZ256rmk\000" |
| 56827 | /* 118931 */ "VPMULHUWZ256rmk\000" |
| 56828 | /* 118947 */ "VPMINUWZ256rmk\000" |
| 56829 | /* 118962 */ "VPMAXUWZ256rmk\000" |
| 56830 | /* 118977 */ "VPSRAVWZ256rmk\000" |
| 56831 | /* 118992 */ "VPSLLVWZ256rmk\000" |
| 56832 | /* 119007 */ "VPSRLVWZ256rmk\000" |
| 56833 | /* 119022 */ "VCVT2PS2PHXZ256rmk\000" |
| 56834 | /* 119041 */ "VCVTPS2PHXZ256rmk\000" |
| 56835 | /* 119059 */ "VCVTPH2PSXZ256rmk\000" |
| 56836 | /* 119077 */ "VMOVDQA32Z128rmk\000" |
| 56837 | /* 119094 */ "VMOVDQU32Z128rmk\000" |
| 56838 | /* 119111 */ "VBROADCASTI32X2Z128rmk\000" |
| 56839 | /* 119134 */ "VMOVDQA64Z128rmk\000" |
| 56840 | /* 119151 */ "VMOVDQU64Z128rmk\000" |
| 56841 | /* 119168 */ "VCVTNE2PS2BF16Z128rmk\000" |
| 56842 | /* 119190 */ "VCVTNEPS2BF16Z128rmk\000" |
| 56843 | /* 119211 */ "VSUBBF16Z128rmk\000" |
| 56844 | /* 119227 */ "VADDBF16Z128rmk\000" |
| 56845 | /* 119243 */ "VSCALEFBF16Z128rmk\000" |
| 56846 | /* 119262 */ "VMULBF16Z128rmk\000" |
| 56847 | /* 119278 */ "VMINBF16Z128rmk\000" |
| 56848 | /* 119294 */ "VDIVBF16Z128rmk\000" |
| 56849 | /* 119310 */ "VMAXBF16Z128rmk\000" |
| 56850 | /* 119326 */ "VMOVDQU16Z128rmk\000" |
| 56851 | /* 119343 */ "VCVT2PH2BF8Z128rmk\000" |
| 56852 | /* 119362 */ "VCVTBIASPH2BF8Z128rmk\000" |
| 56853 | /* 119384 */ "VCVTPH2BF8Z128rmk\000" |
| 56854 | /* 119402 */ "VCVT2PH2HF8Z128rmk\000" |
| 56855 | /* 119421 */ "VCVTBIASPH2HF8Z128rmk\000" |
| 56856 | /* 119443 */ "VCVTPH2HF8Z128rmk\000" |
| 56857 | /* 119461 */ "VMOVDQU8Z128rmk\000" |
| 56858 | /* 119477 */ "VPERMI2BZ128rmk\000" |
| 56859 | /* 119493 */ "VPERMT2BZ128rmk\000" |
| 56860 | /* 119509 */ "VPSUBBZ128rmk\000" |
| 56861 | /* 119523 */ "VPADDBZ128rmk\000" |
| 56862 | /* 119537 */ "VPEXPANDBZ128rmk\000" |
| 56863 | /* 119554 */ "VPSHUFBZ128rmk\000" |
| 56864 | /* 119569 */ "VPAVGBZ128rmk\000" |
| 56865 | /* 119583 */ "VGF2P8MULBZ128rmk\000" |
| 56866 | /* 119601 */ "VPBLENDMBZ128rmk\000" |
| 56867 | /* 119618 */ "VPTESTNMBZ128rmk\000" |
| 56868 | /* 119635 */ "VPSHUFBITQMBZ128rmk\000" |
| 56869 | /* 119655 */ "VPERMBZ128rmk\000" |
| 56870 | /* 119669 */ "VPTESTMBZ128rmk\000" |
| 56871 | /* 119685 */ "VPCMPEQBZ128rmk\000" |
| 56872 | /* 119701 */ "VPMULTISHIFTQBZ128rmk\000" |
| 56873 | /* 119723 */ "VPABSBZ128rmk\000" |
| 56874 | /* 119737 */ "VPSUBSBZ128rmk\000" |
| 56875 | /* 119752 */ "VPADDSBZ128rmk\000" |
| 56876 | /* 119767 */ "VPMINSBZ128rmk\000" |
| 56877 | /* 119782 */ "VPSUBUSBZ128rmk\000" |
| 56878 | /* 119798 */ "VPADDUSBZ128rmk\000" |
| 56879 | /* 119814 */ "VPMAXSBZ128rmk\000" |
| 56880 | /* 119829 */ "VPCMPGTBZ128rmk\000" |
| 56881 | /* 119845 */ "VPOPCNTBZ128rmk\000" |
| 56882 | /* 119861 */ "VPBROADCASTBZ128rmk\000" |
| 56883 | /* 119881 */ "VPMINUBZ128rmk\000" |
| 56884 | /* 119896 */ "VPMAXUBZ128rmk\000" |
| 56885 | /* 119911 */ "VPACKSSWBZ128rmk\000" |
| 56886 | /* 119928 */ "VPACKUSWBZ128rmk\000" |
| 56887 | /* 119945 */ "VPERMI2DZ128rmk\000" |
| 56888 | /* 119961 */ "VPERMT2DZ128rmk\000" |
| 56889 | /* 119977 */ "VPSRADZ128rmk\000" |
| 56890 | /* 119991 */ "VPSUBDZ128rmk\000" |
| 56891 | /* 120005 */ "VPMOVSXBDZ128rmk\000" |
| 56892 | /* 120022 */ "VPMOVZXBDZ128rmk\000" |
| 56893 | /* 120039 */ "VPADDDZ128rmk\000" |
| 56894 | /* 120053 */ "VPANDDZ128rmk\000" |
| 56895 | /* 120067 */ "VPEXPANDDZ128rmk\000" |
| 56896 | /* 120084 */ "VPSLLDZ128rmk\000" |
| 56897 | /* 120098 */ "VPMULLDZ128rmk\000" |
| 56898 | /* 120113 */ "VPSRLDZ128rmk\000" |
| 56899 | /* 120127 */ "VPBLENDMDZ128rmk\000" |
| 56900 | /* 120144 */ "VPTESTNMDZ128rmk\000" |
| 56901 | /* 120161 */ "VPTESTMDZ128rmk\000" |
| 56902 | /* 120177 */ "VPANDNDZ128rmk\000" |
| 56903 | /* 120192 */ "VCVTPH2PDZ128rmk\000" |
| 56904 | /* 120209 */ "VPERMI2PDZ128rmk\000" |
| 56905 | /* 120226 */ "VCVTDQ2PDZ128rmk\000" |
| 56906 | /* 120243 */ "VCVTUDQ2PDZ128rmk\000" |
| 56907 | /* 120261 */ "VCVTQQ2PDZ128rmk\000" |
| 56908 | /* 120278 */ "VCVTUQQ2PDZ128rmk\000" |
| 56909 | /* 120296 */ "VCVTPS2PDZ128rmk\000" |
| 56910 | /* 120313 */ "VPERMT2PDZ128rmk\000" |
| 56911 | /* 120330 */ "VMOVAPDZ128rmk\000" |
| 56912 | /* 120345 */ "VSUBPDZ128rmk\000" |
| 56913 | /* 120359 */ "VMINCPDZ128rmk\000" |
| 56914 | /* 120374 */ "VMAXCPDZ128rmk\000" |
| 56915 | /* 120389 */ "VADDPDZ128rmk\000" |
| 56916 | /* 120403 */ "VEXPANDPDZ128rmk\000" |
| 56917 | /* 120420 */ "VANDPDZ128rmk\000" |
| 56918 | /* 120434 */ "VSCALEFPDZ128rmk\000" |
| 56919 | /* 120451 */ "VUNPCKHPDZ128rmk\000" |
| 56920 | /* 120468 */ "VPERMILPDZ128rmk\000" |
| 56921 | /* 120485 */ "VUNPCKLPDZ128rmk\000" |
| 56922 | /* 120502 */ "VMULPDZ128rmk\000" |
| 56923 | /* 120516 */ "VBLENDMPDZ128rmk\000" |
| 56924 | /* 120533 */ "VANDNPDZ128rmk\000" |
| 56925 | /* 120548 */ "VMINPDZ128rmk\000" |
| 56926 | /* 120562 */ "VORPDZ128rmk\000" |
| 56927 | /* 120575 */ "VXORPDZ128rmk\000" |
| 56928 | /* 120589 */ "VMOVUPDZ128rmk\000" |
| 56929 | /* 120604 */ "VDIVPDZ128rmk\000" |
| 56930 | /* 120618 */ "VMAXPDZ128rmk\000" |
| 56931 | /* 120632 */ "VPCMPEQDZ128rmk\000" |
| 56932 | /* 120648 */ "VPORDZ128rmk\000" |
| 56933 | /* 120661 */ "VPXORDZ128rmk\000" |
| 56934 | /* 120675 */ "VPABSDZ128rmk\000" |
| 56935 | /* 120689 */ "VPMINSDZ128rmk\000" |
| 56936 | /* 120704 */ "VPMAXSDZ128rmk\000" |
| 56937 | /* 120719 */ "VPCONFLICTDZ128rmk\000" |
| 56938 | /* 120738 */ "VPCMPGTDZ128rmk\000" |
| 56939 | /* 120754 */ "VPOPCNTDZ128rmk\000" |
| 56940 | /* 120770 */ "VPLZCNTDZ128rmk\000" |
| 56941 | /* 120786 */ "VPBROADCASTDZ128rmk\000" |
| 56942 | /* 120806 */ "VPMINUDZ128rmk\000" |
| 56943 | /* 120821 */ "VPMAXUDZ128rmk\000" |
| 56944 | /* 120836 */ "VPSRAVDZ128rmk\000" |
| 56945 | /* 120851 */ "VPSLLVDZ128rmk\000" |
| 56946 | /* 120866 */ "VPROLVDZ128rmk\000" |
| 56947 | /* 120881 */ "VPSRLVDZ128rmk\000" |
| 56948 | /* 120896 */ "VPRORVDZ128rmk\000" |
| 56949 | /* 120911 */ "VPMADDWDZ128rmk\000" |
| 56950 | /* 120927 */ "VPUNPCKHWDZ128rmk\000" |
| 56951 | /* 120945 */ "VPUNPCKLWDZ128rmk\000" |
| 56952 | /* 120963 */ "VPMOVSXWDZ128rmk\000" |
| 56953 | /* 120980 */ "VPMOVZXWDZ128rmk\000" |
| 56954 | /* 120997 */ "VCVTHF82PHZ128rmk\000" |
| 56955 | /* 121015 */ "VCVTPD2PHZ128rmk\000" |
| 56956 | /* 121032 */ "VCVTDQ2PHZ128rmk\000" |
| 56957 | /* 121049 */ "VCVTUDQ2PHZ128rmk\000" |
| 56958 | /* 121067 */ "VCVTQQ2PHZ128rmk\000" |
| 56959 | /* 121084 */ "VCVTUQQ2PHZ128rmk\000" |
| 56960 | /* 121102 */ "VCVTW2PHZ128rmk\000" |
| 56961 | /* 121118 */ "VCVTUW2PHZ128rmk\000" |
| 56962 | /* 121135 */ "VSUBPHZ128rmk\000" |
| 56963 | /* 121149 */ "VFCMULCPHZ128rmk\000" |
| 56964 | /* 121166 */ "VFMULCPHZ128rmk\000" |
| 56965 | /* 121182 */ "VMINCPHZ128rmk\000" |
| 56966 | /* 121197 */ "VMAXCPHZ128rmk\000" |
| 56967 | /* 121212 */ "VADDPHZ128rmk\000" |
| 56968 | /* 121226 */ "VSCALEFPHZ128rmk\000" |
| 56969 | /* 121243 */ "VMULPHZ128rmk\000" |
| 56970 | /* 121257 */ "VMINPHZ128rmk\000" |
| 56971 | /* 121271 */ "VDIVPHZ128rmk\000" |
| 56972 | /* 121285 */ "VMAXPHZ128rmk\000" |
| 56973 | /* 121299 */ "VMOVDDUPZ128rmk\000" |
| 56974 | /* 121315 */ "VMOVSHDUPZ128rmk\000" |
| 56975 | /* 121332 */ "VMOVSLDUPZ128rmk\000" |
| 56976 | /* 121349 */ "VPERMI2QZ128rmk\000" |
| 56977 | /* 121365 */ "VPERMT2QZ128rmk\000" |
| 56978 | /* 121381 */ "VPSRAQZ128rmk\000" |
| 56979 | /* 121395 */ "VPSUBQZ128rmk\000" |
| 56980 | /* 121409 */ "VPMOVSXBQZ128rmk\000" |
| 56981 | /* 121426 */ "VPMOVZXBQZ128rmk\000" |
| 56982 | /* 121443 */ "VCVTTPD2DQZ128rmk\000" |
| 56983 | /* 121461 */ "VCVTPD2DQZ128rmk\000" |
| 56984 | /* 121478 */ "VCVTTPH2DQZ128rmk\000" |
| 56985 | /* 121496 */ "VCVTPH2DQZ128rmk\000" |
| 56986 | /* 121513 */ "VCVTTPS2DQZ128rmk\000" |
| 56987 | /* 121531 */ "VCVTPS2DQZ128rmk\000" |
| 56988 | /* 121548 */ "VPADDQZ128rmk\000" |
| 56989 | /* 121562 */ "VPUNPCKHDQZ128rmk\000" |
| 56990 | /* 121580 */ "VPUNPCKLDQZ128rmk\000" |
| 56991 | /* 121598 */ "VPMULDQZ128rmk\000" |
| 56992 | /* 121613 */ "VPANDQZ128rmk\000" |
| 56993 | /* 121627 */ "VPEXPANDQZ128rmk\000" |
| 56994 | /* 121644 */ "VPUNPCKHQDQZ128rmk\000" |
| 56995 | /* 121663 */ "VPUNPCKLQDQZ128rmk\000" |
| 56996 | /* 121682 */ "VCVTTPD2UDQZ128rmk\000" |
| 56997 | /* 121701 */ "VCVTPD2UDQZ128rmk\000" |
| 56998 | /* 121719 */ "VCVTTPH2UDQZ128rmk\000" |
| 56999 | /* 121738 */ "VCVTPH2UDQZ128rmk\000" |
| 57000 | /* 121756 */ "VCVTTPS2UDQZ128rmk\000" |
| 57001 | /* 121775 */ "VCVTPS2UDQZ128rmk\000" |
| 57002 | /* 121793 */ "VPMULUDQZ128rmk\000" |
| 57003 | /* 121809 */ "VPMOVSXDQZ128rmk\000" |
| 57004 | /* 121826 */ "VPMOVZXDQZ128rmk\000" |
| 57005 | /* 121843 */ "VPSLLQZ128rmk\000" |
| 57006 | /* 121857 */ "VPMULLQZ128rmk\000" |
| 57007 | /* 121872 */ "VPSRLQZ128rmk\000" |
| 57008 | /* 121886 */ "VPBLENDMQZ128rmk\000" |
| 57009 | /* 121903 */ "VPTESTNMQZ128rmk\000" |
| 57010 | /* 121920 */ "VPTESTMQZ128rmk\000" |
| 57011 | /* 121936 */ "VPANDNQZ128rmk\000" |
| 57012 | /* 121951 */ "VCVTTPD2QQZ128rmk\000" |
| 57013 | /* 121969 */ "VCVTPD2QQZ128rmk\000" |
| 57014 | /* 121986 */ "VCVTTPH2QQZ128rmk\000" |
| 57015 | /* 122004 */ "VCVTPH2QQZ128rmk\000" |
| 57016 | /* 122021 */ "VCVTTPS2QQZ128rmk\000" |
| 57017 | /* 122039 */ "VCVTPS2QQZ128rmk\000" |
| 57018 | /* 122056 */ "VPCMPEQQZ128rmk\000" |
| 57019 | /* 122072 */ "VCVTTPD2UQQZ128rmk\000" |
| 57020 | /* 122091 */ "VCVTPD2UQQZ128rmk\000" |
| 57021 | /* 122109 */ "VCVTTPH2UQQZ128rmk\000" |
| 57022 | /* 122128 */ "VCVTPH2UQQZ128rmk\000" |
| 57023 | /* 122146 */ "VCVTTPS2UQQZ128rmk\000" |
| 57024 | /* 122165 */ "VCVTPS2UQQZ128rmk\000" |
| 57025 | /* 122183 */ "VPORQZ128rmk\000" |
| 57026 | /* 122196 */ "VPXORQZ128rmk\000" |
| 57027 | /* 122210 */ "VPABSQZ128rmk\000" |
| 57028 | /* 122224 */ "VPMINSQZ128rmk\000" |
| 57029 | /* 122239 */ "VPMAXSQZ128rmk\000" |
| 57030 | /* 122254 */ "VPCONFLICTQZ128rmk\000" |
| 57031 | /* 122273 */ "VPCMPGTQZ128rmk\000" |
| 57032 | /* 122289 */ "VPOPCNTQZ128rmk\000" |
| 57033 | /* 122305 */ "VPLZCNTQZ128rmk\000" |
| 57034 | /* 122321 */ "VPBROADCASTQZ128rmk\000" |
| 57035 | /* 122341 */ "VPMINUQZ128rmk\000" |
| 57036 | /* 122356 */ "VPMAXUQZ128rmk\000" |
| 57037 | /* 122371 */ "VPSRAVQZ128rmk\000" |
| 57038 | /* 122386 */ "VPSLLVQZ128rmk\000" |
| 57039 | /* 122401 */ "VPROLVQZ128rmk\000" |
| 57040 | /* 122416 */ "VPSRLVQZ128rmk\000" |
| 57041 | /* 122431 */ "VPRORVQZ128rmk\000" |
| 57042 | /* 122446 */ "VPMOVSXWQZ128rmk\000" |
| 57043 | /* 122463 */ "VPMOVZXWQZ128rmk\000" |
| 57044 | /* 122480 */ "VCVT2PH2BF8SZ128rmk\000" |
| 57045 | /* 122500 */ "VCVTBIASPH2BF8SZ128rmk\000" |
| 57046 | /* 122523 */ "VCVTPH2BF8SZ128rmk\000" |
| 57047 | /* 122542 */ "VCVT2PH2HF8SZ128rmk\000" |
| 57048 | /* 122562 */ "VCVTBIASPH2HF8SZ128rmk\000" |
| 57049 | /* 122585 */ "VCVTPH2HF8SZ128rmk\000" |
| 57050 | /* 122604 */ "VCVTTBF162IBSZ128rmk\000" |
| 57051 | /* 122625 */ "VCVTBF162IBSZ128rmk\000" |
| 57052 | /* 122645 */ "VCVTTPH2IBSZ128rmk\000" |
| 57053 | /* 122664 */ "VCVTPH2IBSZ128rmk\000" |
| 57054 | /* 122682 */ "VCVTTPS2IBSZ128rmk\000" |
| 57055 | /* 122701 */ "VCVTPS2IBSZ128rmk\000" |
| 57056 | /* 122719 */ "VCVTTBF162IUBSZ128rmk\000" |
| 57057 | /* 122741 */ "VCVTBF162IUBSZ128rmk\000" |
| 57058 | /* 122762 */ "VCVTTPH2IUBSZ128rmk\000" |
| 57059 | /* 122782 */ "VCVTPH2IUBSZ128rmk\000" |
| 57060 | /* 122801 */ "VCVTTPS2IUBSZ128rmk\000" |
| 57061 | /* 122821 */ "VCVTPS2IUBSZ128rmk\000" |
| 57062 | /* 122840 */ "VCVTPD2PSZ128rmk\000" |
| 57063 | /* 122857 */ "VCVTPH2PSZ128rmk\000" |
| 57064 | /* 122874 */ "VPERMI2PSZ128rmk\000" |
| 57065 | /* 122891 */ "VCVTDQ2PSZ128rmk\000" |
| 57066 | /* 122908 */ "VCVTUDQ2PSZ128rmk\000" |
| 57067 | /* 122926 */ "VCVTQQ2PSZ128rmk\000" |
| 57068 | /* 122943 */ "VCVTUQQ2PSZ128rmk\000" |
| 57069 | /* 122961 */ "VPERMT2PSZ128rmk\000" |
| 57070 | /* 122978 */ "VMOVAPSZ128rmk\000" |
| 57071 | /* 122993 */ "VSUBPSZ128rmk\000" |
| 57072 | /* 123007 */ "VMINCPSZ128rmk\000" |
| 57073 | /* 123022 */ "VMAXCPSZ128rmk\000" |
| 57074 | /* 123037 */ "VADDPSZ128rmk\000" |
| 57075 | /* 123051 */ "VEXPANDPSZ128rmk\000" |
| 57076 | /* 123068 */ "VANDPSZ128rmk\000" |
| 57077 | /* 123082 */ "VSCALEFPSZ128rmk\000" |
| 57078 | /* 123099 */ "VUNPCKHPSZ128rmk\000" |
| 57079 | /* 123116 */ "VPERMILPSZ128rmk\000" |
| 57080 | /* 123133 */ "VUNPCKLPSZ128rmk\000" |
| 57081 | /* 123150 */ "VMULPSZ128rmk\000" |
| 57082 | /* 123164 */ "VBLENDMPSZ128rmk\000" |
| 57083 | /* 123181 */ "VANDNPSZ128rmk\000" |
| 57084 | /* 123196 */ "VMINPSZ128rmk\000" |
| 57085 | /* 123210 */ "VORPSZ128rmk\000" |
| 57086 | /* 123223 */ "VXORPSZ128rmk\000" |
| 57087 | /* 123237 */ "VMOVUPSZ128rmk\000" |
| 57088 | /* 123252 */ "VDIVPSZ128rmk\000" |
| 57089 | /* 123266 */ "VMAXPSZ128rmk\000" |
| 57090 | /* 123280 */ "VCVTTPD2DQSZ128rmk\000" |
| 57091 | /* 123299 */ "VCVTTPS2DQSZ128rmk\000" |
| 57092 | /* 123318 */ "VCVTTPD2UDQSZ128rmk\000" |
| 57093 | /* 123338 */ "VCVTTPS2UDQSZ128rmk\000" |
| 57094 | /* 123358 */ "VCVTTPD2QQSZ128rmk\000" |
| 57095 | /* 123377 */ "VCVTTPS2QQSZ128rmk\000" |
| 57096 | /* 123396 */ "VCVTTPD2UQQSZ128rmk\000" |
| 57097 | /* 123416 */ "VCVTTPS2UQQSZ128rmk\000" |
| 57098 | /* 123436 */ "VBROADCASTSSZ128rmk\000" |
| 57099 | /* 123456 */ "VCVTTPH2WZ128rmk\000" |
| 57100 | /* 123473 */ "VCVTPH2WZ128rmk\000" |
| 57101 | /* 123489 */ "VPERMI2WZ128rmk\000" |
| 57102 | /* 123505 */ "VPERMT2WZ128rmk\000" |
| 57103 | /* 123521 */ "VPSRAWZ128rmk\000" |
| 57104 | /* 123535 */ "VPUNPCKHBWZ128rmk\000" |
| 57105 | /* 123553 */ "VPUNPCKLBWZ128rmk\000" |
| 57106 | /* 123571 */ "VPSUBWZ128rmk\000" |
| 57107 | /* 123585 */ "VPMOVSXBWZ128rmk\000" |
| 57108 | /* 123602 */ "VPMOVZXBWZ128rmk\000" |
| 57109 | /* 123619 */ "VPADDWZ128rmk\000" |
| 57110 | /* 123633 */ "VPEXPANDWZ128rmk\000" |
| 57111 | /* 123650 */ "VPACKSSDWZ128rmk\000" |
| 57112 | /* 123667 */ "VPACKUSDWZ128rmk\000" |
| 57113 | /* 123684 */ "VPAVGWZ128rmk\000" |
| 57114 | /* 123698 */ "VPMULHWZ128rmk\000" |
| 57115 | /* 123713 */ "VPSLLWZ128rmk\000" |
| 57116 | /* 123727 */ "VPMULLWZ128rmk\000" |
| 57117 | /* 123742 */ "VPSRLWZ128rmk\000" |
| 57118 | /* 123756 */ "VPBLENDMWZ128rmk\000" |
| 57119 | /* 123773 */ "VPTESTNMWZ128rmk\000" |
| 57120 | /* 123790 */ "VPERMWZ128rmk\000" |
| 57121 | /* 123804 */ "VPTESTMWZ128rmk\000" |
| 57122 | /* 123820 */ "VPCMPEQWZ128rmk\000" |
| 57123 | /* 123836 */ "VPABSWZ128rmk\000" |
| 57124 | /* 123850 */ "VPMADDUBSWZ128rmk\000" |
| 57125 | /* 123868 */ "VPSUBSWZ128rmk\000" |
| 57126 | /* 123883 */ "VPADDSWZ128rmk\000" |
| 57127 | /* 123898 */ "VPMINSWZ128rmk\000" |
| 57128 | /* 123913 */ "VPMULHRSWZ128rmk\000" |
| 57129 | /* 123930 */ "VPSUBUSWZ128rmk\000" |
| 57130 | /* 123946 */ "VPADDUSWZ128rmk\000" |
| 57131 | /* 123962 */ "VPMAXSWZ128rmk\000" |
| 57132 | /* 123977 */ "VPCMPGTWZ128rmk\000" |
| 57133 | /* 123993 */ "VPOPCNTWZ128rmk\000" |
| 57134 | /* 124009 */ "VPBROADCASTWZ128rmk\000" |
| 57135 | /* 124029 */ "VCVTTPH2UWZ128rmk\000" |
| 57136 | /* 124047 */ "VCVTPH2UWZ128rmk\000" |
| 57137 | /* 124064 */ "VPMULHUWZ128rmk\000" |
| 57138 | /* 124080 */ "VPMINUWZ128rmk\000" |
| 57139 | /* 124095 */ "VPMAXUWZ128rmk\000" |
| 57140 | /* 124110 */ "VPSRAVWZ128rmk\000" |
| 57141 | /* 124125 */ "VPSLLVWZ128rmk\000" |
| 57142 | /* 124140 */ "VPSRLVWZ128rmk\000" |
| 57143 | /* 124155 */ "VCVT2PS2PHXZ128rmk\000" |
| 57144 | /* 124174 */ "VCVTPS2PHXZ128rmk\000" |
| 57145 | /* 124192 */ "VCVTPH2PSXZ128rmk\000" |
| 57146 | /* 124210 */ "VP4DPWSSDrmk\000" |
| 57147 | /* 124223 */ "VP4DPWSSDSrmk\000" |
| 57148 | /* 124237 */ "V4FMADDPSrmk\000" |
| 57149 | /* 124250 */ "V4FNMADDPSrmk\000" |
| 57150 | /* 124264 */ "V4FMADDSSrmk\000" |
| 57151 | /* 124277 */ "V4FNMADDSSrmk\000" |
| 57152 | /* 124291 */ "VMOVDQA32Zrmk\000" |
| 57153 | /* 124305 */ "VMOVDQU32Zrmk\000" |
| 57154 | /* 124319 */ "VBROADCASTF32X2Zrmk\000" |
| 57155 | /* 124339 */ "VBROADCASTI32X2Zrmk\000" |
| 57156 | /* 124359 */ "VBROADCASTF64X2Zrmk\000" |
| 57157 | /* 124379 */ "VBROADCASTI64X2Zrmk\000" |
| 57158 | /* 124399 */ "VMOVDQA64Zrmk\000" |
| 57159 | /* 124413 */ "VMOVDQU64Zrmk\000" |
| 57160 | /* 124427 */ "VBROADCASTF32X4Zrmk\000" |
| 57161 | /* 124447 */ "VBROADCASTI32X4Zrmk\000" |
| 57162 | /* 124467 */ "VBROADCASTF64X4Zrmk\000" |
| 57163 | /* 124487 */ "VBROADCASTI64X4Zrmk\000" |
| 57164 | /* 124507 */ "VCVTNE2PS2BF16Zrmk\000" |
| 57165 | /* 124526 */ "VCVTNEPS2BF16Zrmk\000" |
| 57166 | /* 124544 */ "VSUBBF16Zrmk\000" |
| 57167 | /* 124557 */ "VADDBF16Zrmk\000" |
| 57168 | /* 124570 */ "VSCALEFBF16Zrmk\000" |
| 57169 | /* 124586 */ "VMULBF16Zrmk\000" |
| 57170 | /* 124599 */ "VMINBF16Zrmk\000" |
| 57171 | /* 124612 */ "VDIVBF16Zrmk\000" |
| 57172 | /* 124625 */ "VMAXBF16Zrmk\000" |
| 57173 | /* 124638 */ "VMOVDQU16Zrmk\000" |
| 57174 | /* 124652 */ "VCVT2PH2BF8Zrmk\000" |
| 57175 | /* 124668 */ "VCVTBIASPH2BF8Zrmk\000" |
| 57176 | /* 124687 */ "VCVTPH2BF8Zrmk\000" |
| 57177 | /* 124702 */ "VCVT2PH2HF8Zrmk\000" |
| 57178 | /* 124718 */ "VCVTBIASPH2HF8Zrmk\000" |
| 57179 | /* 124737 */ "VCVTPH2HF8Zrmk\000" |
| 57180 | /* 124752 */ "VMOVDQU8Zrmk\000" |
| 57181 | /* 124765 */ "VBROADCASTF32X8Zrmk\000" |
| 57182 | /* 124785 */ "VBROADCASTI32X8Zrmk\000" |
| 57183 | /* 124805 */ "VPERMI2BZrmk\000" |
| 57184 | /* 124818 */ "VPERMT2BZrmk\000" |
| 57185 | /* 124831 */ "VPSUBBZrmk\000" |
| 57186 | /* 124842 */ "VPADDBZrmk\000" |
| 57187 | /* 124853 */ "VPEXPANDBZrmk\000" |
| 57188 | /* 124867 */ "VPSHUFBZrmk\000" |
| 57189 | /* 124879 */ "VPAVGBZrmk\000" |
| 57190 | /* 124890 */ "VGF2P8MULBZrmk\000" |
| 57191 | /* 124905 */ "VPBLENDMBZrmk\000" |
| 57192 | /* 124919 */ "VPTESTNMBZrmk\000" |
| 57193 | /* 124933 */ "VPSHUFBITQMBZrmk\000" |
| 57194 | /* 124950 */ "VPERMBZrmk\000" |
| 57195 | /* 124961 */ "VPTESTMBZrmk\000" |
| 57196 | /* 124974 */ "VPCMPEQBZrmk\000" |
| 57197 | /* 124987 */ "VPMULTISHIFTQBZrmk\000" |
| 57198 | /* 125006 */ "VPABSBZrmk\000" |
| 57199 | /* 125017 */ "VPSUBSBZrmk\000" |
| 57200 | /* 125029 */ "VPADDSBZrmk\000" |
| 57201 | /* 125041 */ "VPMINSBZrmk\000" |
| 57202 | /* 125053 */ "VPSUBUSBZrmk\000" |
| 57203 | /* 125066 */ "VPADDUSBZrmk\000" |
| 57204 | /* 125079 */ "VPMAXSBZrmk\000" |
| 57205 | /* 125091 */ "VPCMPGTBZrmk\000" |
| 57206 | /* 125104 */ "VPOPCNTBZrmk\000" |
| 57207 | /* 125117 */ "VPBROADCASTBZrmk\000" |
| 57208 | /* 125134 */ "VPMINUBZrmk\000" |
| 57209 | /* 125146 */ "VPMAXUBZrmk\000" |
| 57210 | /* 125158 */ "VPACKSSWBZrmk\000" |
| 57211 | /* 125172 */ "VPACKUSWBZrmk\000" |
| 57212 | /* 125186 */ "VPERMI2DZrmk\000" |
| 57213 | /* 125199 */ "VPERMT2DZrmk\000" |
| 57214 | /* 125212 */ "VPSRADZrmk\000" |
| 57215 | /* 125223 */ "VPSUBDZrmk\000" |
| 57216 | /* 125234 */ "VPMOVSXBDZrmk\000" |
| 57217 | /* 125248 */ "VPMOVZXBDZrmk\000" |
| 57218 | /* 125262 */ "VPADDDZrmk\000" |
| 57219 | /* 125273 */ "VPANDDZrmk\000" |
| 57220 | /* 125284 */ "VPEXPANDDZrmk\000" |
| 57221 | /* 125298 */ "VPSLLDZrmk\000" |
| 57222 | /* 125309 */ "VPMULLDZrmk\000" |
| 57223 | /* 125321 */ "VPSRLDZrmk\000" |
| 57224 | /* 125332 */ "VPBLENDMDZrmk\000" |
| 57225 | /* 125346 */ "VPTESTNMDZrmk\000" |
| 57226 | /* 125360 */ "VPERMDZrmk\000" |
| 57227 | /* 125371 */ "VPTESTMDZrmk\000" |
| 57228 | /* 125384 */ "VPANDNDZrmk\000" |
| 57229 | /* 125396 */ "VCVTPH2PDZrmk\000" |
| 57230 | /* 125410 */ "VPERMI2PDZrmk\000" |
| 57231 | /* 125424 */ "VCVTDQ2PDZrmk\000" |
| 57232 | /* 125438 */ "VCVTUDQ2PDZrmk\000" |
| 57233 | /* 125453 */ "VCVTQQ2PDZrmk\000" |
| 57234 | /* 125467 */ "VCVTUQQ2PDZrmk\000" |
| 57235 | /* 125482 */ "VCVTPS2PDZrmk\000" |
| 57236 | /* 125496 */ "VPERMT2PDZrmk\000" |
| 57237 | /* 125510 */ "VMOVAPDZrmk\000" |
| 57238 | /* 125522 */ "VSUBPDZrmk\000" |
| 57239 | /* 125533 */ "VMINCPDZrmk\000" |
| 57240 | /* 125545 */ "VMAXCPDZrmk\000" |
| 57241 | /* 125557 */ "VADDPDZrmk\000" |
| 57242 | /* 125568 */ "VEXPANDPDZrmk\000" |
| 57243 | /* 125582 */ "VANDPDZrmk\000" |
| 57244 | /* 125593 */ "VSCALEFPDZrmk\000" |
| 57245 | /* 125607 */ "VUNPCKHPDZrmk\000" |
| 57246 | /* 125621 */ "VPERMILPDZrmk\000" |
| 57247 | /* 125635 */ "VUNPCKLPDZrmk\000" |
| 57248 | /* 125649 */ "VMULPDZrmk\000" |
| 57249 | /* 125660 */ "VBLENDMPDZrmk\000" |
| 57250 | /* 125674 */ "VPERMPDZrmk\000" |
| 57251 | /* 125686 */ "VANDNPDZrmk\000" |
| 57252 | /* 125698 */ "VMINPDZrmk\000" |
| 57253 | /* 125709 */ "VORPDZrmk\000" |
| 57254 | /* 125719 */ "VXORPDZrmk\000" |
| 57255 | /* 125730 */ "VMOVUPDZrmk\000" |
| 57256 | /* 125742 */ "VDIVPDZrmk\000" |
| 57257 | /* 125753 */ "VMAXPDZrmk\000" |
| 57258 | /* 125764 */ "VPCMPEQDZrmk\000" |
| 57259 | /* 125777 */ "VPORDZrmk\000" |
| 57260 | /* 125787 */ "VPXORDZrmk\000" |
| 57261 | /* 125798 */ "VRCP14SDZrmk\000" |
| 57262 | /* 125811 */ "VRSQRT14SDZrmk\000" |
| 57263 | /* 125826 */ "VPABSDZrmk\000" |
| 57264 | /* 125837 */ "VSCALEFSDZrmk\000" |
| 57265 | /* 125851 */ "VPMINSDZrmk\000" |
| 57266 | /* 125863 */ "VBROADCASTSDZrmk\000" |
| 57267 | /* 125880 */ "VMOVSDZrmk\000" |
| 57268 | /* 125891 */ "VPMAXSDZrmk\000" |
| 57269 | /* 125903 */ "VPCONFLICTDZrmk\000" |
| 57270 | /* 125919 */ "VPCMPGTDZrmk\000" |
| 57271 | /* 125932 */ "VPOPCNTDZrmk\000" |
| 57272 | /* 125945 */ "VPLZCNTDZrmk\000" |
| 57273 | /* 125958 */ "VPBROADCASTDZrmk\000" |
| 57274 | /* 125975 */ "VPMINUDZrmk\000" |
| 57275 | /* 125987 */ "VPMAXUDZrmk\000" |
| 57276 | /* 125999 */ "VPSRAVDZrmk\000" |
| 57277 | /* 126011 */ "VPSLLVDZrmk\000" |
| 57278 | /* 126023 */ "VPROLVDZrmk\000" |
| 57279 | /* 126035 */ "VPSRLVDZrmk\000" |
| 57280 | /* 126047 */ "VPRORVDZrmk\000" |
| 57281 | /* 126059 */ "VPMADDWDZrmk\000" |
| 57282 | /* 126072 */ "VPUNPCKHWDZrmk\000" |
| 57283 | /* 126087 */ "VPUNPCKLWDZrmk\000" |
| 57284 | /* 126102 */ "VPMOVSXWDZrmk\000" |
| 57285 | /* 126116 */ "VPMOVZXWDZrmk\000" |
| 57286 | /* 126130 */ "VCVTHF82PHZrmk\000" |
| 57287 | /* 126145 */ "VCVTPD2PHZrmk\000" |
| 57288 | /* 126159 */ "VCVTDQ2PHZrmk\000" |
| 57289 | /* 126173 */ "VCVTUDQ2PHZrmk\000" |
| 57290 | /* 126188 */ "VCVTQQ2PHZrmk\000" |
| 57291 | /* 126202 */ "VCVTUQQ2PHZrmk\000" |
| 57292 | /* 126217 */ "VCVTW2PHZrmk\000" |
| 57293 | /* 126230 */ "VCVTUW2PHZrmk\000" |
| 57294 | /* 126244 */ "VSUBPHZrmk\000" |
| 57295 | /* 126255 */ "VFCMULCPHZrmk\000" |
| 57296 | /* 126269 */ "VFMULCPHZrmk\000" |
| 57297 | /* 126282 */ "VMINCPHZrmk\000" |
| 57298 | /* 126294 */ "VMAXCPHZrmk\000" |
| 57299 | /* 126306 */ "VADDPHZrmk\000" |
| 57300 | /* 126317 */ "VSCALEFPHZrmk\000" |
| 57301 | /* 126331 */ "VMULPHZrmk\000" |
| 57302 | /* 126342 */ "VMINPHZrmk\000" |
| 57303 | /* 126353 */ "VDIVPHZrmk\000" |
| 57304 | /* 126364 */ "VMAXPHZrmk\000" |
| 57305 | /* 126375 */ "VFCMULCSHZrmk\000" |
| 57306 | /* 126389 */ "VFMULCSHZrmk\000" |
| 57307 | /* 126402 */ "VSCALEFSHZrmk\000" |
| 57308 | /* 126416 */ "VRCPSHZrmk\000" |
| 57309 | /* 126427 */ "VRSQRTSHZrmk\000" |
| 57310 | /* 126440 */ "VMOVSHZrmk\000" |
| 57311 | /* 126451 */ "VMOVDDUPZrmk\000" |
| 57312 | /* 126464 */ "VMOVSHDUPZrmk\000" |
| 57313 | /* 126478 */ "VMOVSLDUPZrmk\000" |
| 57314 | /* 126492 */ "VPERMI2QZrmk\000" |
| 57315 | /* 126505 */ "VPERMT2QZrmk\000" |
| 57316 | /* 126518 */ "VPSRAQZrmk\000" |
| 57317 | /* 126529 */ "VPSUBQZrmk\000" |
| 57318 | /* 126540 */ "VPMOVSXBQZrmk\000" |
| 57319 | /* 126554 */ "VPMOVZXBQZrmk\000" |
| 57320 | /* 126568 */ "VCVTTPD2DQZrmk\000" |
| 57321 | /* 126583 */ "VCVTPD2DQZrmk\000" |
| 57322 | /* 126597 */ "VCVTTPH2DQZrmk\000" |
| 57323 | /* 126612 */ "VCVTPH2DQZrmk\000" |
| 57324 | /* 126626 */ "VCVTTPS2DQZrmk\000" |
| 57325 | /* 126641 */ "VCVTPS2DQZrmk\000" |
| 57326 | /* 126655 */ "VPADDQZrmk\000" |
| 57327 | /* 126666 */ "VPUNPCKHDQZrmk\000" |
| 57328 | /* 126681 */ "VPUNPCKLDQZrmk\000" |
| 57329 | /* 126696 */ "VPMULDQZrmk\000" |
| 57330 | /* 126708 */ "VPANDQZrmk\000" |
| 57331 | /* 126719 */ "VPEXPANDQZrmk\000" |
| 57332 | /* 126733 */ "VPUNPCKHQDQZrmk\000" |
| 57333 | /* 126749 */ "VPUNPCKLQDQZrmk\000" |
| 57334 | /* 126765 */ "VCVTTPD2UDQZrmk\000" |
| 57335 | /* 126781 */ "VCVTPD2UDQZrmk\000" |
| 57336 | /* 126796 */ "VCVTTPH2UDQZrmk\000" |
| 57337 | /* 126812 */ "VCVTPH2UDQZrmk\000" |
| 57338 | /* 126827 */ "VCVTTPS2UDQZrmk\000" |
| 57339 | /* 126843 */ "VCVTPS2UDQZrmk\000" |
| 57340 | /* 126858 */ "VPMULUDQZrmk\000" |
| 57341 | /* 126871 */ "VPMOVSXDQZrmk\000" |
| 57342 | /* 126885 */ "VPMOVZXDQZrmk\000" |
| 57343 | /* 126899 */ "VPSLLQZrmk\000" |
| 57344 | /* 126910 */ "VPMULLQZrmk\000" |
| 57345 | /* 126922 */ "VPSRLQZrmk\000" |
| 57346 | /* 126933 */ "VPBLENDMQZrmk\000" |
| 57347 | /* 126947 */ "VPTESTNMQZrmk\000" |
| 57348 | /* 126961 */ "VPERMQZrmk\000" |
| 57349 | /* 126972 */ "VPTESTMQZrmk\000" |
| 57350 | /* 126985 */ "VPANDNQZrmk\000" |
| 57351 | /* 126997 */ "VCVTTPD2QQZrmk\000" |
| 57352 | /* 127012 */ "VCVTPD2QQZrmk\000" |
| 57353 | /* 127026 */ "VCVTTPH2QQZrmk\000" |
| 57354 | /* 127041 */ "VCVTPH2QQZrmk\000" |
| 57355 | /* 127055 */ "VCVTTPS2QQZrmk\000" |
| 57356 | /* 127070 */ "VCVTPS2QQZrmk\000" |
| 57357 | /* 127084 */ "VPCMPEQQZrmk\000" |
| 57358 | /* 127097 */ "VCVTTPD2UQQZrmk\000" |
| 57359 | /* 127113 */ "VCVTPD2UQQZrmk\000" |
| 57360 | /* 127128 */ "VCVTTPH2UQQZrmk\000" |
| 57361 | /* 127144 */ "VCVTPH2UQQZrmk\000" |
| 57362 | /* 127159 */ "VCVTTPS2UQQZrmk\000" |
| 57363 | /* 127175 */ "VCVTPS2UQQZrmk\000" |
| 57364 | /* 127190 */ "VPORQZrmk\000" |
| 57365 | /* 127200 */ "VPXORQZrmk\000" |
| 57366 | /* 127211 */ "VPABSQZrmk\000" |
| 57367 | /* 127222 */ "VPMINSQZrmk\000" |
| 57368 | /* 127234 */ "VPMAXSQZrmk\000" |
| 57369 | /* 127246 */ "VPCONFLICTQZrmk\000" |
| 57370 | /* 127262 */ "VPCMPGTQZrmk\000" |
| 57371 | /* 127275 */ "VPOPCNTQZrmk\000" |
| 57372 | /* 127288 */ "VPLZCNTQZrmk\000" |
| 57373 | /* 127301 */ "VPBROADCASTQZrmk\000" |
| 57374 | /* 127318 */ "VPMINUQZrmk\000" |
| 57375 | /* 127330 */ "VPMAXUQZrmk\000" |
| 57376 | /* 127342 */ "VPSRAVQZrmk\000" |
| 57377 | /* 127354 */ "VPSLLVQZrmk\000" |
| 57378 | /* 127366 */ "VPROLVQZrmk\000" |
| 57379 | /* 127378 */ "VPSRLVQZrmk\000" |
| 57380 | /* 127390 */ "VPRORVQZrmk\000" |
| 57381 | /* 127402 */ "VPMOVSXWQZrmk\000" |
| 57382 | /* 127416 */ "VPMOVZXWQZrmk\000" |
| 57383 | /* 127430 */ "VCVT2PH2BF8SZrmk\000" |
| 57384 | /* 127447 */ "VCVTBIASPH2BF8SZrmk\000" |
| 57385 | /* 127467 */ "VCVTPH2BF8SZrmk\000" |
| 57386 | /* 127483 */ "VCVT2PH2HF8SZrmk\000" |
| 57387 | /* 127500 */ "VCVTBIASPH2HF8SZrmk\000" |
| 57388 | /* 127520 */ "VCVTPH2HF8SZrmk\000" |
| 57389 | /* 127536 */ "VCVTTBF162IBSZrmk\000" |
| 57390 | /* 127554 */ "VCVTBF162IBSZrmk\000" |
| 57391 | /* 127571 */ "VCVTTPH2IBSZrmk\000" |
| 57392 | /* 127587 */ "VCVTPH2IBSZrmk\000" |
| 57393 | /* 127602 */ "VCVTTPS2IBSZrmk\000" |
| 57394 | /* 127618 */ "VCVTPS2IBSZrmk\000" |
| 57395 | /* 127633 */ "VCVTTBF162IUBSZrmk\000" |
| 57396 | /* 127652 */ "VCVTBF162IUBSZrmk\000" |
| 57397 | /* 127670 */ "VCVTTPH2IUBSZrmk\000" |
| 57398 | /* 127687 */ "VCVTPH2IUBSZrmk\000" |
| 57399 | /* 127703 */ "VCVTTPS2IUBSZrmk\000" |
| 57400 | /* 127720 */ "VCVTPS2IUBSZrmk\000" |
| 57401 | /* 127736 */ "VCVTPD2PSZrmk\000" |
| 57402 | /* 127750 */ "VCVTPH2PSZrmk\000" |
| 57403 | /* 127764 */ "VPERMI2PSZrmk\000" |
| 57404 | /* 127778 */ "VCVTDQ2PSZrmk\000" |
| 57405 | /* 127792 */ "VCVTUDQ2PSZrmk\000" |
| 57406 | /* 127807 */ "VCVTQQ2PSZrmk\000" |
| 57407 | /* 127821 */ "VCVTUQQ2PSZrmk\000" |
| 57408 | /* 127836 */ "VPERMT2PSZrmk\000" |
| 57409 | /* 127850 */ "VMOVAPSZrmk\000" |
| 57410 | /* 127862 */ "VSUBPSZrmk\000" |
| 57411 | /* 127873 */ "VMINCPSZrmk\000" |
| 57412 | /* 127885 */ "VMAXCPSZrmk\000" |
| 57413 | /* 127897 */ "VADDPSZrmk\000" |
| 57414 | /* 127908 */ "VEXPANDPSZrmk\000" |
| 57415 | /* 127922 */ "VANDPSZrmk\000" |
| 57416 | /* 127933 */ "VSCALEFPSZrmk\000" |
| 57417 | /* 127947 */ "VUNPCKHPSZrmk\000" |
| 57418 | /* 127961 */ "VPERMILPSZrmk\000" |
| 57419 | /* 127975 */ "VUNPCKLPSZrmk\000" |
| 57420 | /* 127989 */ "VMULPSZrmk\000" |
| 57421 | /* 128000 */ "VBLENDMPSZrmk\000" |
| 57422 | /* 128014 */ "VPERMPSZrmk\000" |
| 57423 | /* 128026 */ "VANDNPSZrmk\000" |
| 57424 | /* 128038 */ "VMINPSZrmk\000" |
| 57425 | /* 128049 */ "VORPSZrmk\000" |
| 57426 | /* 128059 */ "VXORPSZrmk\000" |
| 57427 | /* 128070 */ "VMOVUPSZrmk\000" |
| 57428 | /* 128082 */ "VDIVPSZrmk\000" |
| 57429 | /* 128093 */ "VMAXPSZrmk\000" |
| 57430 | /* 128104 */ "VCVTTPD2DQSZrmk\000" |
| 57431 | /* 128120 */ "VCVTTPS2DQSZrmk\000" |
| 57432 | /* 128136 */ "VCVTTPD2UDQSZrmk\000" |
| 57433 | /* 128153 */ "VCVTTPS2UDQSZrmk\000" |
| 57434 | /* 128170 */ "VCVTTPD2QQSZrmk\000" |
| 57435 | /* 128186 */ "VCVTTPS2QQSZrmk\000" |
| 57436 | /* 128202 */ "VCVTTPD2UQQSZrmk\000" |
| 57437 | /* 128219 */ "VCVTTPS2UQQSZrmk\000" |
| 57438 | /* 128236 */ "VRCP14SSZrmk\000" |
| 57439 | /* 128249 */ "VRSQRT14SSZrmk\000" |
| 57440 | /* 128264 */ "VSCALEFSSZrmk\000" |
| 57441 | /* 128278 */ "VBROADCASTSSZrmk\000" |
| 57442 | /* 128295 */ "VMOVSSZrmk\000" |
| 57443 | /* 128306 */ "VCVTTPH2WZrmk\000" |
| 57444 | /* 128320 */ "VCVTPH2WZrmk\000" |
| 57445 | /* 128333 */ "VPERMI2WZrmk\000" |
| 57446 | /* 128346 */ "VPERMT2WZrmk\000" |
| 57447 | /* 128359 */ "VPSRAWZrmk\000" |
| 57448 | /* 128370 */ "VPUNPCKHBWZrmk\000" |
| 57449 | /* 128385 */ "VPUNPCKLBWZrmk\000" |
| 57450 | /* 128400 */ "VPSUBWZrmk\000" |
| 57451 | /* 128411 */ "VPMOVSXBWZrmk\000" |
| 57452 | /* 128425 */ "VPMOVZXBWZrmk\000" |
| 57453 | /* 128439 */ "VPADDWZrmk\000" |
| 57454 | /* 128450 */ "VPEXPANDWZrmk\000" |
| 57455 | /* 128464 */ "VPACKSSDWZrmk\000" |
| 57456 | /* 128478 */ "VPACKUSDWZrmk\000" |
| 57457 | /* 128492 */ "VPAVGWZrmk\000" |
| 57458 | /* 128503 */ "VPMULHWZrmk\000" |
| 57459 | /* 128515 */ "VPSLLWZrmk\000" |
| 57460 | /* 128526 */ "VPMULLWZrmk\000" |
| 57461 | /* 128538 */ "VPSRLWZrmk\000" |
| 57462 | /* 128549 */ "VPBLENDMWZrmk\000" |
| 57463 | /* 128563 */ "VPTESTNMWZrmk\000" |
| 57464 | /* 128577 */ "VPERMWZrmk\000" |
| 57465 | /* 128588 */ "VPTESTMWZrmk\000" |
| 57466 | /* 128601 */ "VPCMPEQWZrmk\000" |
| 57467 | /* 128614 */ "VPABSWZrmk\000" |
| 57468 | /* 128625 */ "VPMADDUBSWZrmk\000" |
| 57469 | /* 128640 */ "VPSUBSWZrmk\000" |
| 57470 | /* 128652 */ "VPADDSWZrmk\000" |
| 57471 | /* 128664 */ "VPMINSWZrmk\000" |
| 57472 | /* 128676 */ "VPMULHRSWZrmk\000" |
| 57473 | /* 128690 */ "VPSUBUSWZrmk\000" |
| 57474 | /* 128703 */ "VPADDUSWZrmk\000" |
| 57475 | /* 128716 */ "VPMAXSWZrmk\000" |
| 57476 | /* 128728 */ "VPCMPGTWZrmk\000" |
| 57477 | /* 128741 */ "VPOPCNTWZrmk\000" |
| 57478 | /* 128754 */ "VPBROADCASTWZrmk\000" |
| 57479 | /* 128771 */ "VCVTTPH2UWZrmk\000" |
| 57480 | /* 128786 */ "VCVTPH2UWZrmk\000" |
| 57481 | /* 128800 */ "VPMULHUWZrmk\000" |
| 57482 | /* 128813 */ "VPMINUWZrmk\000" |
| 57483 | /* 128825 */ "VPMAXUWZrmk\000" |
| 57484 | /* 128837 */ "VPSRAVWZrmk\000" |
| 57485 | /* 128849 */ "VPSLLVWZrmk\000" |
| 57486 | /* 128861 */ "VPSRLVWZrmk\000" |
| 57487 | /* 128873 */ "VCVT2PS2PHXZrmk\000" |
| 57488 | /* 128889 */ "VCVTPS2PHXZrmk\000" |
| 57489 | /* 128904 */ "VCVTPH2PSXZrmk\000" |
| 57490 | /* 128919 */ "VFMSUB231BF16Z256rk\000" |
| 57491 | /* 128939 */ "VFNMSUB231BF16Z256rk\000" |
| 57492 | /* 128960 */ "VFMADD231BF16Z256rk\000" |
| 57493 | /* 128980 */ "VFNMADD231BF16Z256rk\000" |
| 57494 | /* 129001 */ "VFMSUB132BF16Z256rk\000" |
| 57495 | /* 129021 */ "VFNMSUB132BF16Z256rk\000" |
| 57496 | /* 129042 */ "VFMADD132BF16Z256rk\000" |
| 57497 | /* 129062 */ "VFNMADD132BF16Z256rk\000" |
| 57498 | /* 129083 */ "VFMSUB213BF16Z256rk\000" |
| 57499 | /* 129103 */ "VFNMSUB213BF16Z256rk\000" |
| 57500 | /* 129124 */ "VFMADD213BF16Z256rk\000" |
| 57501 | /* 129144 */ "VFNMADD213BF16Z256rk\000" |
| 57502 | /* 129165 */ "VRCPBF16Z256rk\000" |
| 57503 | /* 129180 */ "VGETEXPBF16Z256rk\000" |
| 57504 | /* 129198 */ "VRSQRTBF16Z256rk\000" |
| 57505 | /* 129215 */ "VSQRTBF16Z256rk\000" |
| 57506 | /* 129231 */ "VPMOVM2BZ256rk\000" |
| 57507 | /* 129246 */ "VPMOVM2DZ256rk\000" |
| 57508 | /* 129261 */ "VFMADDSUB231PDZ256rk\000" |
| 57509 | /* 129282 */ "VFMSUB231PDZ256rk\000" |
| 57510 | /* 129300 */ "VFNMSUB231PDZ256rk\000" |
| 57511 | /* 129319 */ "VFMSUBADD231PDZ256rk\000" |
| 57512 | /* 129340 */ "VFMADD231PDZ256rk\000" |
| 57513 | /* 129358 */ "VFNMADD231PDZ256rk\000" |
| 57514 | /* 129377 */ "VFMADDSUB132PDZ256rk\000" |
| 57515 | /* 129398 */ "VFMSUB132PDZ256rk\000" |
| 57516 | /* 129416 */ "VFNMSUB132PDZ256rk\000" |
| 57517 | /* 129435 */ "VFMSUBADD132PDZ256rk\000" |
| 57518 | /* 129456 */ "VFMADD132PDZ256rk\000" |
| 57519 | /* 129474 */ "VFNMADD132PDZ256rk\000" |
| 57520 | /* 129493 */ "VFMADDSUB213PDZ256rk\000" |
| 57521 | /* 129514 */ "VFMSUB213PDZ256rk\000" |
| 57522 | /* 129532 */ "VFNMSUB213PDZ256rk\000" |
| 57523 | /* 129551 */ "VFMSUBADD213PDZ256rk\000" |
| 57524 | /* 129572 */ "VFMADD213PDZ256rk\000" |
| 57525 | /* 129590 */ "VFNMADD213PDZ256rk\000" |
| 57526 | /* 129609 */ "VRCP14PDZ256rk\000" |
| 57527 | /* 129624 */ "VRSQRT14PDZ256rk\000" |
| 57528 | /* 129641 */ "VGETEXPPDZ256rk\000" |
| 57529 | /* 129657 */ "VSQRTPDZ256rk\000" |
| 57530 | /* 129671 */ "VPDPBSSDZ256rk\000" |
| 57531 | /* 129686 */ "VPDPWSSDZ256rk\000" |
| 57532 | /* 129701 */ "VPDPBUSDZ256rk\000" |
| 57533 | /* 129716 */ "VPDPWUSDZ256rk\000" |
| 57534 | /* 129731 */ "VPDPBSUDZ256rk\000" |
| 57535 | /* 129746 */ "VPDPWSUDZ256rk\000" |
| 57536 | /* 129761 */ "VPDPBUUDZ256rk\000" |
| 57537 | /* 129776 */ "VPDPWUUDZ256rk\000" |
| 57538 | /* 129791 */ "VPSHLDVDZ256rk\000" |
| 57539 | /* 129806 */ "VPSHRDVDZ256rk\000" |
| 57540 | /* 129821 */ "VFMADDSUB231PHZ256rk\000" |
| 57541 | /* 129842 */ "VFMSUB231PHZ256rk\000" |
| 57542 | /* 129860 */ "VFNMSUB231PHZ256rk\000" |
| 57543 | /* 129879 */ "VFMSUBADD231PHZ256rk\000" |
| 57544 | /* 129900 */ "VFMADD231PHZ256rk\000" |
| 57545 | /* 129918 */ "VFNMADD231PHZ256rk\000" |
| 57546 | /* 129937 */ "VFMADDSUB132PHZ256rk\000" |
| 57547 | /* 129958 */ "VFMSUB132PHZ256rk\000" |
| 57548 | /* 129976 */ "VFNMSUB132PHZ256rk\000" |
| 57549 | /* 129995 */ "VFMSUBADD132PHZ256rk\000" |
| 57550 | /* 130016 */ "VFMADD132PHZ256rk\000" |
| 57551 | /* 130034 */ "VFNMADD132PHZ256rk\000" |
| 57552 | /* 130053 */ "VFMADDSUB213PHZ256rk\000" |
| 57553 | /* 130074 */ "VFMSUB213PHZ256rk\000" |
| 57554 | /* 130092 */ "VFNMSUB213PHZ256rk\000" |
| 57555 | /* 130111 */ "VFMSUBADD213PHZ256rk\000" |
| 57556 | /* 130132 */ "VFMADD213PHZ256rk\000" |
| 57557 | /* 130150 */ "VFNMADD213PHZ256rk\000" |
| 57558 | /* 130169 */ "VFCMADDCPHZ256rk\000" |
| 57559 | /* 130186 */ "VFMADDCPHZ256rk\000" |
| 57560 | /* 130202 */ "VRCPPHZ256rk\000" |
| 57561 | /* 130215 */ "VGETEXPPHZ256rk\000" |
| 57562 | /* 130231 */ "VRSQRTPHZ256rk\000" |
| 57563 | /* 130246 */ "VSQRTPHZ256rk\000" |
| 57564 | /* 130260 */ "VPMOVM2QZ256rk\000" |
| 57565 | /* 130275 */ "VPMADD52HUQZ256rk\000" |
| 57566 | /* 130293 */ "VPMADD52LUQZ256rk\000" |
| 57567 | /* 130311 */ "VPSHLDVQZ256rk\000" |
| 57568 | /* 130326 */ "VPSHRDVQZ256rk\000" |
| 57569 | /* 130341 */ "VPDPBSSDSZ256rk\000" |
| 57570 | /* 130357 */ "VPDPWSSDSZ256rk\000" |
| 57571 | /* 130373 */ "VPDPBUSDSZ256rk\000" |
| 57572 | /* 130389 */ "VPDPWUSDSZ256rk\000" |
| 57573 | /* 130405 */ "VPDPBSUDSZ256rk\000" |
| 57574 | /* 130421 */ "VPDPWSUDSZ256rk\000" |
| 57575 | /* 130437 */ "VPDPBUUDSZ256rk\000" |
| 57576 | /* 130453 */ "VPDPWUUDSZ256rk\000" |
| 57577 | /* 130469 */ "VFMADDSUB231PSZ256rk\000" |
| 57578 | /* 130490 */ "VFMSUB231PSZ256rk\000" |
| 57579 | /* 130508 */ "VFNMSUB231PSZ256rk\000" |
| 57580 | /* 130527 */ "VFMSUBADD231PSZ256rk\000" |
| 57581 | /* 130548 */ "VFMADD231PSZ256rk\000" |
| 57582 | /* 130566 */ "VFNMADD231PSZ256rk\000" |
| 57583 | /* 130585 */ "VFMADDSUB132PSZ256rk\000" |
| 57584 | /* 130606 */ "VFMSUB132PSZ256rk\000" |
| 57585 | /* 130624 */ "VFNMSUB132PSZ256rk\000" |
| 57586 | /* 130643 */ "VFMSUBADD132PSZ256rk\000" |
| 57587 | /* 130664 */ "VFMADD132PSZ256rk\000" |
| 57588 | /* 130682 */ "VFNMADD132PSZ256rk\000" |
| 57589 | /* 130701 */ "VFMADDSUB213PSZ256rk\000" |
| 57590 | /* 130722 */ "VFMSUB213PSZ256rk\000" |
| 57591 | /* 130740 */ "VFNMSUB213PSZ256rk\000" |
| 57592 | /* 130759 */ "VFMSUBADD213PSZ256rk\000" |
| 57593 | /* 130780 */ "VFMADD213PSZ256rk\000" |
| 57594 | /* 130798 */ "VFNMADD213PSZ256rk\000" |
| 57595 | /* 130817 */ "VRCP14PSZ256rk\000" |
| 57596 | /* 130832 */ "VRSQRT14PSZ256rk\000" |
| 57597 | /* 130849 */ "VDPBF16PSZ256rk\000" |
| 57598 | /* 130865 */ "VDPPHPSZ256rk\000" |
| 57599 | /* 130879 */ "VGETEXPPSZ256rk\000" |
| 57600 | /* 130895 */ "VSQRTPSZ256rk\000" |
| 57601 | /* 130909 */ "VPMOVM2WZ256rk\000" |
| 57602 | /* 130924 */ "VPSHLDVWZ256rk\000" |
| 57603 | /* 130939 */ "VPSHRDVWZ256rk\000" |
| 57604 | /* 130954 */ "VFMSUB231BF16Z128rk\000" |
| 57605 | /* 130974 */ "VFNMSUB231BF16Z128rk\000" |
| 57606 | /* 130995 */ "VFMADD231BF16Z128rk\000" |
| 57607 | /* 131015 */ "VFNMADD231BF16Z128rk\000" |
| 57608 | /* 131036 */ "VFMSUB132BF16Z128rk\000" |
| 57609 | /* 131056 */ "VFNMSUB132BF16Z128rk\000" |
| 57610 | /* 131077 */ "VFMADD132BF16Z128rk\000" |
| 57611 | /* 131097 */ "VFNMADD132BF16Z128rk\000" |
| 57612 | /* 131118 */ "VFMSUB213BF16Z128rk\000" |
| 57613 | /* 131138 */ "VFNMSUB213BF16Z128rk\000" |
| 57614 | /* 131159 */ "VFMADD213BF16Z128rk\000" |
| 57615 | /* 131179 */ "VFNMADD213BF16Z128rk\000" |
| 57616 | /* 131200 */ "VRCPBF16Z128rk\000" |
| 57617 | /* 131215 */ "VGETEXPBF16Z128rk\000" |
| 57618 | /* 131233 */ "VRSQRTBF16Z128rk\000" |
| 57619 | /* 131250 */ "VSQRTBF16Z128rk\000" |
| 57620 | /* 131266 */ "VPMOVM2BZ128rk\000" |
| 57621 | /* 131281 */ "VPMOVM2DZ128rk\000" |
| 57622 | /* 131296 */ "VFMADDSUB231PDZ128rk\000" |
| 57623 | /* 131317 */ "VFMSUB231PDZ128rk\000" |
| 57624 | /* 131335 */ "VFNMSUB231PDZ128rk\000" |
| 57625 | /* 131354 */ "VFMSUBADD231PDZ128rk\000" |
| 57626 | /* 131375 */ "VFMADD231PDZ128rk\000" |
| 57627 | /* 131393 */ "VFNMADD231PDZ128rk\000" |
| 57628 | /* 131412 */ "VFMADDSUB132PDZ128rk\000" |
| 57629 | /* 131433 */ "VFMSUB132PDZ128rk\000" |
| 57630 | /* 131451 */ "VFNMSUB132PDZ128rk\000" |
| 57631 | /* 131470 */ "VFMSUBADD132PDZ128rk\000" |
| 57632 | /* 131491 */ "VFMADD132PDZ128rk\000" |
| 57633 | /* 131509 */ "VFNMADD132PDZ128rk\000" |
| 57634 | /* 131528 */ "VFMADDSUB213PDZ128rk\000" |
| 57635 | /* 131549 */ "VFMSUB213PDZ128rk\000" |
| 57636 | /* 131567 */ "VFNMSUB213PDZ128rk\000" |
| 57637 | /* 131586 */ "VFMSUBADD213PDZ128rk\000" |
| 57638 | /* 131607 */ "VFMADD213PDZ128rk\000" |
| 57639 | /* 131625 */ "VFNMADD213PDZ128rk\000" |
| 57640 | /* 131644 */ "VRCP14PDZ128rk\000" |
| 57641 | /* 131659 */ "VRSQRT14PDZ128rk\000" |
| 57642 | /* 131676 */ "VGETEXPPDZ128rk\000" |
| 57643 | /* 131692 */ "VSQRTPDZ128rk\000" |
| 57644 | /* 131706 */ "VPDPBSSDZ128rk\000" |
| 57645 | /* 131721 */ "VPDPWSSDZ128rk\000" |
| 57646 | /* 131736 */ "VPDPBUSDZ128rk\000" |
| 57647 | /* 131751 */ "VPDPWUSDZ128rk\000" |
| 57648 | /* 131766 */ "VPDPBSUDZ128rk\000" |
| 57649 | /* 131781 */ "VPDPWSUDZ128rk\000" |
| 57650 | /* 131796 */ "VPDPBUUDZ128rk\000" |
| 57651 | /* 131811 */ "VPDPWUUDZ128rk\000" |
| 57652 | /* 131826 */ "VPSHLDVDZ128rk\000" |
| 57653 | /* 131841 */ "VPSHRDVDZ128rk\000" |
| 57654 | /* 131856 */ "VFMADDSUB231PHZ128rk\000" |
| 57655 | /* 131877 */ "VFMSUB231PHZ128rk\000" |
| 57656 | /* 131895 */ "VFNMSUB231PHZ128rk\000" |
| 57657 | /* 131914 */ "VFMSUBADD231PHZ128rk\000" |
| 57658 | /* 131935 */ "VFMADD231PHZ128rk\000" |
| 57659 | /* 131953 */ "VFNMADD231PHZ128rk\000" |
| 57660 | /* 131972 */ "VFMADDSUB132PHZ128rk\000" |
| 57661 | /* 131993 */ "VFMSUB132PHZ128rk\000" |
| 57662 | /* 132011 */ "VFNMSUB132PHZ128rk\000" |
| 57663 | /* 132030 */ "VFMSUBADD132PHZ128rk\000" |
| 57664 | /* 132051 */ "VFMADD132PHZ128rk\000" |
| 57665 | /* 132069 */ "VFNMADD132PHZ128rk\000" |
| 57666 | /* 132088 */ "VFMADDSUB213PHZ128rk\000" |
| 57667 | /* 132109 */ "VFMSUB213PHZ128rk\000" |
| 57668 | /* 132127 */ "VFNMSUB213PHZ128rk\000" |
| 57669 | /* 132146 */ "VFMSUBADD213PHZ128rk\000" |
| 57670 | /* 132167 */ "VFMADD213PHZ128rk\000" |
| 57671 | /* 132185 */ "VFNMADD213PHZ128rk\000" |
| 57672 | /* 132204 */ "VFCMADDCPHZ128rk\000" |
| 57673 | /* 132221 */ "VFMADDCPHZ128rk\000" |
| 57674 | /* 132237 */ "VRCPPHZ128rk\000" |
| 57675 | /* 132250 */ "VGETEXPPHZ128rk\000" |
| 57676 | /* 132266 */ "VRSQRTPHZ128rk\000" |
| 57677 | /* 132281 */ "VSQRTPHZ128rk\000" |
| 57678 | /* 132295 */ "VPMOVM2QZ128rk\000" |
| 57679 | /* 132310 */ "VPMADD52HUQZ128rk\000" |
| 57680 | /* 132328 */ "VPMADD52LUQZ128rk\000" |
| 57681 | /* 132346 */ "VPSHLDVQZ128rk\000" |
| 57682 | /* 132361 */ "VPSHRDVQZ128rk\000" |
| 57683 | /* 132376 */ "VPDPBSSDSZ128rk\000" |
| 57684 | /* 132392 */ "VPDPWSSDSZ128rk\000" |
| 57685 | /* 132408 */ "VPDPBUSDSZ128rk\000" |
| 57686 | /* 132424 */ "VPDPWUSDSZ128rk\000" |
| 57687 | /* 132440 */ "VPDPBSUDSZ128rk\000" |
| 57688 | /* 132456 */ "VPDPWSUDSZ128rk\000" |
| 57689 | /* 132472 */ "VPDPBUUDSZ128rk\000" |
| 57690 | /* 132488 */ "VPDPWUUDSZ128rk\000" |
| 57691 | /* 132504 */ "VFMADDSUB231PSZ128rk\000" |
| 57692 | /* 132525 */ "VFMSUB231PSZ128rk\000" |
| 57693 | /* 132543 */ "VFNMSUB231PSZ128rk\000" |
| 57694 | /* 132562 */ "VFMSUBADD231PSZ128rk\000" |
| 57695 | /* 132583 */ "VFMADD231PSZ128rk\000" |
| 57696 | /* 132601 */ "VFNMADD231PSZ128rk\000" |
| 57697 | /* 132620 */ "VFMADDSUB132PSZ128rk\000" |
| 57698 | /* 132641 */ "VFMSUB132PSZ128rk\000" |
| 57699 | /* 132659 */ "VFNMSUB132PSZ128rk\000" |
| 57700 | /* 132678 */ "VFMSUBADD132PSZ128rk\000" |
| 57701 | /* 132699 */ "VFMADD132PSZ128rk\000" |
| 57702 | /* 132717 */ "VFNMADD132PSZ128rk\000" |
| 57703 | /* 132736 */ "VFMADDSUB213PSZ128rk\000" |
| 57704 | /* 132757 */ "VFMSUB213PSZ128rk\000" |
| 57705 | /* 132775 */ "VFNMSUB213PSZ128rk\000" |
| 57706 | /* 132794 */ "VFMSUBADD213PSZ128rk\000" |
| 57707 | /* 132815 */ "VFMADD213PSZ128rk\000" |
| 57708 | /* 132833 */ "VFNMADD213PSZ128rk\000" |
| 57709 | /* 132852 */ "VRCP14PSZ128rk\000" |
| 57710 | /* 132867 */ "VRSQRT14PSZ128rk\000" |
| 57711 | /* 132884 */ "VDPBF16PSZ128rk\000" |
| 57712 | /* 132900 */ "VDPPHPSZ128rk\000" |
| 57713 | /* 132914 */ "VGETEXPPSZ128rk\000" |
| 57714 | /* 132930 */ "VSQRTPSZ128rk\000" |
| 57715 | /* 132944 */ "VPMOVM2WZ128rk\000" |
| 57716 | /* 132959 */ "VPSHLDVWZ128rk\000" |
| 57717 | /* 132974 */ "VPSHRDVWZ128rk\000" |
| 57718 | /* 132989 */ "KMOVBrk\000" |
| 57719 | /* 132997 */ "KMOVDrk\000" |
| 57720 | /* 133005 */ "KMOVQrk\000" |
| 57721 | /* 133013 */ "KMOVWrk\000" |
| 57722 | /* 133021 */ "VFMSUB231BF16Zrk\000" |
| 57723 | /* 133038 */ "VFNMSUB231BF16Zrk\000" |
| 57724 | /* 133056 */ "VFMADD231BF16Zrk\000" |
| 57725 | /* 133073 */ "VFNMADD231BF16Zrk\000" |
| 57726 | /* 133091 */ "VFMSUB132BF16Zrk\000" |
| 57727 | /* 133108 */ "VFNMSUB132BF16Zrk\000" |
| 57728 | /* 133126 */ "VFMADD132BF16Zrk\000" |
| 57729 | /* 133143 */ "VFNMADD132BF16Zrk\000" |
| 57730 | /* 133161 */ "VFMSUB213BF16Zrk\000" |
| 57731 | /* 133178 */ "VFNMSUB213BF16Zrk\000" |
| 57732 | /* 133196 */ "VFMADD213BF16Zrk\000" |
| 57733 | /* 133213 */ "VFNMADD213BF16Zrk\000" |
| 57734 | /* 133231 */ "VRCPBF16Zrk\000" |
| 57735 | /* 133243 */ "VGETEXPBF16Zrk\000" |
| 57736 | /* 133258 */ "VRSQRTBF16Zrk\000" |
| 57737 | /* 133272 */ "VSQRTBF16Zrk\000" |
| 57738 | /* 133285 */ "VPMOVM2BZrk\000" |
| 57739 | /* 133297 */ "VPMOVM2DZrk\000" |
| 57740 | /* 133309 */ "VFMADDSUB231PDZrk\000" |
| 57741 | /* 133327 */ "VFMSUB231PDZrk\000" |
| 57742 | /* 133342 */ "VFNMSUB231PDZrk\000" |
| 57743 | /* 133358 */ "VFMSUBADD231PDZrk\000" |
| 57744 | /* 133376 */ "VFMADD231PDZrk\000" |
| 57745 | /* 133391 */ "VFNMADD231PDZrk\000" |
| 57746 | /* 133407 */ "VFMADDSUB132PDZrk\000" |
| 57747 | /* 133425 */ "VFMSUB132PDZrk\000" |
| 57748 | /* 133440 */ "VFNMSUB132PDZrk\000" |
| 57749 | /* 133456 */ "VFMSUBADD132PDZrk\000" |
| 57750 | /* 133474 */ "VFMADD132PDZrk\000" |
| 57751 | /* 133489 */ "VFNMADD132PDZrk\000" |
| 57752 | /* 133505 */ "VEXP2PDZrk\000" |
| 57753 | /* 133516 */ "VFMADDSUB213PDZrk\000" |
| 57754 | /* 133534 */ "VFMSUB213PDZrk\000" |
| 57755 | /* 133549 */ "VFNMSUB213PDZrk\000" |
| 57756 | /* 133565 */ "VFMSUBADD213PDZrk\000" |
| 57757 | /* 133583 */ "VFMADD213PDZrk\000" |
| 57758 | /* 133598 */ "VFNMADD213PDZrk\000" |
| 57759 | /* 133614 */ "VRCP14PDZrk\000" |
| 57760 | /* 133626 */ "VRSQRT14PDZrk\000" |
| 57761 | /* 133640 */ "VRCP28PDZrk\000" |
| 57762 | /* 133652 */ "VRSQRT28PDZrk\000" |
| 57763 | /* 133666 */ "VGETEXPPDZrk\000" |
| 57764 | /* 133679 */ "VSQRTPDZrk\000" |
| 57765 | /* 133690 */ "VRCP28SDZrk\000" |
| 57766 | /* 133702 */ "VRSQRT28SDZrk\000" |
| 57767 | /* 133716 */ "VGETEXPSDZrk\000" |
| 57768 | /* 133729 */ "VPDPBSSDZrk\000" |
| 57769 | /* 133741 */ "VPDPWSSDZrk\000" |
| 57770 | /* 133753 */ "VPDPBUSDZrk\000" |
| 57771 | /* 133765 */ "VPDPWUSDZrk\000" |
| 57772 | /* 133777 */ "VPDPBSUDZrk\000" |
| 57773 | /* 133789 */ "VPDPWSUDZrk\000" |
| 57774 | /* 133801 */ "VPDPBUUDZrk\000" |
| 57775 | /* 133813 */ "VPDPWUUDZrk\000" |
| 57776 | /* 133825 */ "VPSHLDVDZrk\000" |
| 57777 | /* 133837 */ "VPSHRDVDZrk\000" |
| 57778 | /* 133849 */ "VFMADDSUB231PHZrk\000" |
| 57779 | /* 133867 */ "VFMSUB231PHZrk\000" |
| 57780 | /* 133882 */ "VFNMSUB231PHZrk\000" |
| 57781 | /* 133898 */ "VFMSUBADD231PHZrk\000" |
| 57782 | /* 133916 */ "VFMADD231PHZrk\000" |
| 57783 | /* 133931 */ "VFNMADD231PHZrk\000" |
| 57784 | /* 133947 */ "VFMADDSUB132PHZrk\000" |
| 57785 | /* 133965 */ "VFMSUB132PHZrk\000" |
| 57786 | /* 133980 */ "VFNMSUB132PHZrk\000" |
| 57787 | /* 133996 */ "VFMSUBADD132PHZrk\000" |
| 57788 | /* 134014 */ "VFMADD132PHZrk\000" |
| 57789 | /* 134029 */ "VFNMADD132PHZrk\000" |
| 57790 | /* 134045 */ "VFMADDSUB213PHZrk\000" |
| 57791 | /* 134063 */ "VFMSUB213PHZrk\000" |
| 57792 | /* 134078 */ "VFNMSUB213PHZrk\000" |
| 57793 | /* 134094 */ "VFMSUBADD213PHZrk\000" |
| 57794 | /* 134112 */ "VFMADD213PHZrk\000" |
| 57795 | /* 134127 */ "VFNMADD213PHZrk\000" |
| 57796 | /* 134143 */ "VFCMADDCPHZrk\000" |
| 57797 | /* 134157 */ "VFMADDCPHZrk\000" |
| 57798 | /* 134170 */ "VRCPPHZrk\000" |
| 57799 | /* 134180 */ "VGETEXPPHZrk\000" |
| 57800 | /* 134193 */ "VRSQRTPHZrk\000" |
| 57801 | /* 134205 */ "VSQRTPHZrk\000" |
| 57802 | /* 134216 */ "VFCMADDCSHZrk\000" |
| 57803 | /* 134230 */ "VFMADDCSHZrk\000" |
| 57804 | /* 134243 */ "VGETEXPSHZrk\000" |
| 57805 | /* 134256 */ "VPMOVM2QZrk\000" |
| 57806 | /* 134268 */ "VPMADD52HUQZrk\000" |
| 57807 | /* 134283 */ "VPMADD52LUQZrk\000" |
| 57808 | /* 134298 */ "VPSHLDVQZrk\000" |
| 57809 | /* 134310 */ "VPSHRDVQZrk\000" |
| 57810 | /* 134322 */ "VPDPBSSDSZrk\000" |
| 57811 | /* 134335 */ "VPDPWSSDSZrk\000" |
| 57812 | /* 134348 */ "VPDPBUSDSZrk\000" |
| 57813 | /* 134361 */ "VPDPWUSDSZrk\000" |
| 57814 | /* 134374 */ "VPDPBSUDSZrk\000" |
| 57815 | /* 134387 */ "VPDPWSUDSZrk\000" |
| 57816 | /* 134400 */ "VPDPBUUDSZrk\000" |
| 57817 | /* 134413 */ "VPDPWUUDSZrk\000" |
| 57818 | /* 134426 */ "VFMADDSUB231PSZrk\000" |
| 57819 | /* 134444 */ "VFMSUB231PSZrk\000" |
| 57820 | /* 134459 */ "VFNMSUB231PSZrk\000" |
| 57821 | /* 134475 */ "VFMSUBADD231PSZrk\000" |
| 57822 | /* 134493 */ "VFMADD231PSZrk\000" |
| 57823 | /* 134508 */ "VFNMADD231PSZrk\000" |
| 57824 | /* 134524 */ "VFMADDSUB132PSZrk\000" |
| 57825 | /* 134542 */ "VFMSUB132PSZrk\000" |
| 57826 | /* 134557 */ "VFNMSUB132PSZrk\000" |
| 57827 | /* 134573 */ "VFMSUBADD132PSZrk\000" |
| 57828 | /* 134591 */ "VFMADD132PSZrk\000" |
| 57829 | /* 134606 */ "VFNMADD132PSZrk\000" |
| 57830 | /* 134622 */ "VEXP2PSZrk\000" |
| 57831 | /* 134633 */ "VFMADDSUB213PSZrk\000" |
| 57832 | /* 134651 */ "VFMSUB213PSZrk\000" |
| 57833 | /* 134666 */ "VFNMSUB213PSZrk\000" |
| 57834 | /* 134682 */ "VFMSUBADD213PSZrk\000" |
| 57835 | /* 134700 */ "VFMADD213PSZrk\000" |
| 57836 | /* 134715 */ "VFNMADD213PSZrk\000" |
| 57837 | /* 134731 */ "VRCP14PSZrk\000" |
| 57838 | /* 134743 */ "VRSQRT14PSZrk\000" |
| 57839 | /* 134757 */ "VDPBF16PSZrk\000" |
| 57840 | /* 134770 */ "VRCP28PSZrk\000" |
| 57841 | /* 134782 */ "VRSQRT28PSZrk\000" |
| 57842 | /* 134796 */ "VDPPHPSZrk\000" |
| 57843 | /* 134807 */ "VGETEXPPSZrk\000" |
| 57844 | /* 134820 */ "VSQRTPSZrk\000" |
| 57845 | /* 134831 */ "VRCP28SSZrk\000" |
| 57846 | /* 134843 */ "VRSQRT28SSZrk\000" |
| 57847 | /* 134857 */ "VGETEXPSSZrk\000" |
| 57848 | /* 134870 */ "VPMOVM2WZrk\000" |
| 57849 | /* 134882 */ "VPSHLDVWZrk\000" |
| 57850 | /* 134894 */ "VPSHRDVWZrk\000" |
| 57851 | /* 134906 */ "VMOVDQA32Z256mrk\000" |
| 57852 | /* 134923 */ "VMOVDQU32Z256mrk\000" |
| 57853 | /* 134940 */ "VMOVDQA64Z256mrk\000" |
| 57854 | /* 134957 */ "VMOVDQU64Z256mrk\000" |
| 57855 | /* 134974 */ "VMOVDQU16Z256mrk\000" |
| 57856 | /* 134991 */ "VMOVDQU8Z256mrk\000" |
| 57857 | /* 135007 */ "VPMOVUSDBZ256mrk\000" |
| 57858 | /* 135024 */ "VPMOVSDBZ256mrk\000" |
| 57859 | /* 135040 */ "VPMOVDBZ256mrk\000" |
| 57860 | /* 135055 */ "VPMOVUSQBZ256mrk\000" |
| 57861 | /* 135072 */ "VPMOVSQBZ256mrk\000" |
| 57862 | /* 135088 */ "VPMOVQBZ256mrk\000" |
| 57863 | /* 135103 */ "VPCOMPRESSBZ256mrk\000" |
| 57864 | /* 135122 */ "VPMOVUSWBZ256mrk\000" |
| 57865 | /* 135139 */ "VPMOVSWBZ256mrk\000" |
| 57866 | /* 135155 */ "VPMOVWBZ256mrk\000" |
| 57867 | /* 135170 */ "VMOVAPDZ256mrk\000" |
| 57868 | /* 135185 */ "VCOMPRESSPDZ256mrk\000" |
| 57869 | /* 135204 */ "VMOVUPDZ256mrk\000" |
| 57870 | /* 135219 */ "VPMOVUSQDZ256mrk\000" |
| 57871 | /* 135236 */ "VPMOVSQDZ256mrk\000" |
| 57872 | /* 135252 */ "VPMOVQDZ256mrk\000" |
| 57873 | /* 135267 */ "VPCOMPRESSDZ256mrk\000" |
| 57874 | /* 135286 */ "VCVTPS2PHZ256mrk\000" |
| 57875 | /* 135303 */ "VPCOMPRESSQZ256mrk\000" |
| 57876 | /* 135322 */ "VMOVAPSZ256mrk\000" |
| 57877 | /* 135337 */ "VCOMPRESSPSZ256mrk\000" |
| 57878 | /* 135356 */ "VMOVUPSZ256mrk\000" |
| 57879 | /* 135371 */ "VPMOVUSDWZ256mrk\000" |
| 57880 | /* 135388 */ "VPMOVSDWZ256mrk\000" |
| 57881 | /* 135404 */ "VPMOVDWZ256mrk\000" |
| 57882 | /* 135419 */ "VPMOVUSQWZ256mrk\000" |
| 57883 | /* 135436 */ "VPMOVSQWZ256mrk\000" |
| 57884 | /* 135452 */ "VPMOVQWZ256mrk\000" |
| 57885 | /* 135467 */ "VPCOMPRESSWZ256mrk\000" |
| 57886 | /* 135486 */ "VMOVDQA32Z128mrk\000" |
| 57887 | /* 135503 */ "VMOVDQU32Z128mrk\000" |
| 57888 | /* 135520 */ "VMOVDQA64Z128mrk\000" |
| 57889 | /* 135537 */ "VMOVDQU64Z128mrk\000" |
| 57890 | /* 135554 */ "VMOVDQU16Z128mrk\000" |
| 57891 | /* 135571 */ "VMOVDQU8Z128mrk\000" |
| 57892 | /* 135587 */ "VPMOVUSDBZ128mrk\000" |
| 57893 | /* 135604 */ "VPMOVSDBZ128mrk\000" |
| 57894 | /* 135620 */ "VPMOVDBZ128mrk\000" |
| 57895 | /* 135635 */ "VPMOVUSQBZ128mrk\000" |
| 57896 | /* 135652 */ "VPMOVSQBZ128mrk\000" |
| 57897 | /* 135668 */ "VPMOVQBZ128mrk\000" |
| 57898 | /* 135683 */ "VPCOMPRESSBZ128mrk\000" |
| 57899 | /* 135702 */ "VPMOVUSWBZ128mrk\000" |
| 57900 | /* 135719 */ "VPMOVSWBZ128mrk\000" |
| 57901 | /* 135735 */ "VPMOVWBZ128mrk\000" |
| 57902 | /* 135750 */ "VMOVAPDZ128mrk\000" |
| 57903 | /* 135765 */ "VCOMPRESSPDZ128mrk\000" |
| 57904 | /* 135784 */ "VMOVUPDZ128mrk\000" |
| 57905 | /* 135799 */ "VPMOVUSQDZ128mrk\000" |
| 57906 | /* 135816 */ "VPMOVSQDZ128mrk\000" |
| 57907 | /* 135832 */ "VPMOVQDZ128mrk\000" |
| 57908 | /* 135847 */ "VPCOMPRESSDZ128mrk\000" |
| 57909 | /* 135866 */ "VCVTPS2PHZ128mrk\000" |
| 57910 | /* 135883 */ "VPCOMPRESSQZ128mrk\000" |
| 57911 | /* 135902 */ "VMOVAPSZ128mrk\000" |
| 57912 | /* 135917 */ "VCOMPRESSPSZ128mrk\000" |
| 57913 | /* 135936 */ "VMOVUPSZ128mrk\000" |
| 57914 | /* 135951 */ "VPMOVUSDWZ128mrk\000" |
| 57915 | /* 135968 */ "VPMOVSDWZ128mrk\000" |
| 57916 | /* 135984 */ "VPMOVDWZ128mrk\000" |
| 57917 | /* 135999 */ "VPMOVUSQWZ128mrk\000" |
| 57918 | /* 136016 */ "VPMOVSQWZ128mrk\000" |
| 57919 | /* 136032 */ "VPMOVQWZ128mrk\000" |
| 57920 | /* 136047 */ "VPCOMPRESSWZ128mrk\000" |
| 57921 | /* 136066 */ "VMOVDQA32Zmrk\000" |
| 57922 | /* 136080 */ "VMOVDQU32Zmrk\000" |
| 57923 | /* 136094 */ "VMOVDQA64Zmrk\000" |
| 57924 | /* 136108 */ "VMOVDQU64Zmrk\000" |
| 57925 | /* 136122 */ "VMOVDQU16Zmrk\000" |
| 57926 | /* 136136 */ "VMOVDQU8Zmrk\000" |
| 57927 | /* 136149 */ "VPMOVUSDBZmrk\000" |
| 57928 | /* 136163 */ "VPMOVSDBZmrk\000" |
| 57929 | /* 136176 */ "VPMOVDBZmrk\000" |
| 57930 | /* 136188 */ "VPMOVUSQBZmrk\000" |
| 57931 | /* 136202 */ "VPMOVSQBZmrk\000" |
| 57932 | /* 136215 */ "VPMOVQBZmrk\000" |
| 57933 | /* 136227 */ "VPCOMPRESSBZmrk\000" |
| 57934 | /* 136243 */ "VPMOVUSWBZmrk\000" |
| 57935 | /* 136257 */ "VPMOVSWBZmrk\000" |
| 57936 | /* 136270 */ "VPMOVWBZmrk\000" |
| 57937 | /* 136282 */ "VMOVAPDZmrk\000" |
| 57938 | /* 136294 */ "VCOMPRESSPDZmrk\000" |
| 57939 | /* 136310 */ "VMOVUPDZmrk\000" |
| 57940 | /* 136322 */ "VPMOVUSQDZmrk\000" |
| 57941 | /* 136336 */ "VPMOVSQDZmrk\000" |
| 57942 | /* 136349 */ "VPMOVQDZmrk\000" |
| 57943 | /* 136361 */ "VPCOMPRESSDZmrk\000" |
| 57944 | /* 136377 */ "VMOVSDZmrk\000" |
| 57945 | /* 136388 */ "VCVTPS2PHZmrk\000" |
| 57946 | /* 136402 */ "VMOVSHZmrk\000" |
| 57947 | /* 136413 */ "VPCOMPRESSQZmrk\000" |
| 57948 | /* 136429 */ "VMOVAPSZmrk\000" |
| 57949 | /* 136441 */ "VCOMPRESSPSZmrk\000" |
| 57950 | /* 136457 */ "VMOVUPSZmrk\000" |
| 57951 | /* 136469 */ "VMOVSSZmrk\000" |
| 57952 | /* 136480 */ "VPMOVUSDWZmrk\000" |
| 57953 | /* 136494 */ "VPMOVSDWZmrk\000" |
| 57954 | /* 136507 */ "VPMOVDWZmrk\000" |
| 57955 | /* 136519 */ "VPMOVUSQWZmrk\000" |
| 57956 | /* 136533 */ "VPMOVSQWZmrk\000" |
| 57957 | /* 136546 */ "VPMOVQWZmrk\000" |
| 57958 | /* 136558 */ "VPCOMPRESSWZmrk\000" |
| 57959 | /* 136574 */ "VMOVDQA32Z256rrk\000" |
| 57960 | /* 136591 */ "VMOVDQU32Z256rrk\000" |
| 57961 | /* 136608 */ "VBROADCASTF32X2Z256rrk\000" |
| 57962 | /* 136631 */ "VBROADCASTI32X2Z256rrk\000" |
| 57963 | /* 136654 */ "VMOVDQA64Z256rrk\000" |
| 57964 | /* 136671 */ "VMOVDQU64Z256rrk\000" |
| 57965 | /* 136688 */ "VCVTNE2PS2BF16Z256rrk\000" |
| 57966 | /* 136710 */ "VCVTNEPS2BF16Z256rrk\000" |
| 57967 | /* 136731 */ "VSUBBF16Z256rrk\000" |
| 57968 | /* 136747 */ "VADDBF16Z256rrk\000" |
| 57969 | /* 136763 */ "VSCALEFBF16Z256rrk\000" |
| 57970 | /* 136782 */ "VMULBF16Z256rrk\000" |
| 57971 | /* 136798 */ "VMINBF16Z256rrk\000" |
| 57972 | /* 136814 */ "VDIVBF16Z256rrk\000" |
| 57973 | /* 136830 */ "VMAXBF16Z256rrk\000" |
| 57974 | /* 136846 */ "VMOVDQU16Z256rrk\000" |
| 57975 | /* 136863 */ "VCVT2PH2BF8Z256rrk\000" |
| 57976 | /* 136882 */ "VCVTBIASPH2BF8Z256rrk\000" |
| 57977 | /* 136904 */ "VCVTPH2BF8Z256rrk\000" |
| 57978 | /* 136922 */ "VCVT2PH2HF8Z256rrk\000" |
| 57979 | /* 136941 */ "VCVTBIASPH2HF8Z256rrk\000" |
| 57980 | /* 136963 */ "VCVTPH2HF8Z256rrk\000" |
| 57981 | /* 136981 */ "VMOVDQU8Z256rrk\000" |
| 57982 | /* 136997 */ "VPERMI2BZ256rrk\000" |
| 57983 | /* 137013 */ "VPERMT2BZ256rrk\000" |
| 57984 | /* 137029 */ "VPSUBBZ256rrk\000" |
| 57985 | /* 137043 */ "VPADDBZ256rrk\000" |
| 57986 | /* 137057 */ "VPEXPANDBZ256rrk\000" |
| 57987 | /* 137074 */ "VPMOVUSDBZ256rrk\000" |
| 57988 | /* 137091 */ "VPMOVSDBZ256rrk\000" |
| 57989 | /* 137107 */ "VPMOVDBZ256rrk\000" |
| 57990 | /* 137122 */ "VPSHUFBZ256rrk\000" |
| 57991 | /* 137137 */ "VPAVGBZ256rrk\000" |
| 57992 | /* 137151 */ "VGF2P8MULBZ256rrk\000" |
| 57993 | /* 137169 */ "VPBLENDMBZ256rrk\000" |
| 57994 | /* 137186 */ "VPTESTNMBZ256rrk\000" |
| 57995 | /* 137203 */ "VPSHUFBITQMBZ256rrk\000" |
| 57996 | /* 137223 */ "VPERMBZ256rrk\000" |
| 57997 | /* 137237 */ "VPTESTMBZ256rrk\000" |
| 57998 | /* 137253 */ "VPCMPEQBZ256rrk\000" |
| 57999 | /* 137269 */ "VPMOVUSQBZ256rrk\000" |
| 58000 | /* 137286 */ "VPMOVSQBZ256rrk\000" |
| 58001 | /* 137302 */ "VPMULTISHIFTQBZ256rrk\000" |
| 58002 | /* 137324 */ "VPMOVQBZ256rrk\000" |
| 58003 | /* 137339 */ "VPABSBZ256rrk\000" |
| 58004 | /* 137353 */ "VPSUBSBZ256rrk\000" |
| 58005 | /* 137368 */ "VPADDSBZ256rrk\000" |
| 58006 | /* 137383 */ "VPMINSBZ256rrk\000" |
| 58007 | /* 137398 */ "VPCOMPRESSBZ256rrk\000" |
| 58008 | /* 137417 */ "VPSUBUSBZ256rrk\000" |
| 58009 | /* 137433 */ "VPADDUSBZ256rrk\000" |
| 58010 | /* 137449 */ "VPMAXSBZ256rrk\000" |
| 58011 | /* 137464 */ "VPCMPGTBZ256rrk\000" |
| 58012 | /* 137480 */ "VPOPCNTBZ256rrk\000" |
| 58013 | /* 137496 */ "VPBROADCASTBZ256rrk\000" |
| 58014 | /* 137516 */ "VPMINUBZ256rrk\000" |
| 58015 | /* 137531 */ "VPMAXUBZ256rrk\000" |
| 58016 | /* 137546 */ "VPACKSSWBZ256rrk\000" |
| 58017 | /* 137563 */ "VPACKUSWBZ256rrk\000" |
| 58018 | /* 137580 */ "VPMOVUSWBZ256rrk\000" |
| 58019 | /* 137597 */ "VPMOVSWBZ256rrk\000" |
| 58020 | /* 137613 */ "VPMOVWBZ256rrk\000" |
| 58021 | /* 137628 */ "VPERMI2DZ256rrk\000" |
| 58022 | /* 137644 */ "VPERMT2DZ256rrk\000" |
| 58023 | /* 137660 */ "VPSRADZ256rrk\000" |
| 58024 | /* 137674 */ "VPSUBDZ256rrk\000" |
| 58025 | /* 137688 */ "VPMOVSXBDZ256rrk\000" |
| 58026 | /* 137705 */ "VPMOVZXBDZ256rrk\000" |
| 58027 | /* 137722 */ "VPADDDZ256rrk\000" |
| 58028 | /* 137736 */ "VPANDDZ256rrk\000" |
| 58029 | /* 137750 */ "VPEXPANDDZ256rrk\000" |
| 58030 | /* 137767 */ "VPSLLDZ256rrk\000" |
| 58031 | /* 137781 */ "VPMULLDZ256rrk\000" |
| 58032 | /* 137796 */ "VPSRLDZ256rrk\000" |
| 58033 | /* 137810 */ "VPBLENDMDZ256rrk\000" |
| 58034 | /* 137827 */ "VPTESTNMDZ256rrk\000" |
| 58035 | /* 137844 */ "VPERMDZ256rrk\000" |
| 58036 | /* 137858 */ "VPTESTMDZ256rrk\000" |
| 58037 | /* 137874 */ "VPANDNDZ256rrk\000" |
| 58038 | /* 137889 */ "VCVTPH2PDZ256rrk\000" |
| 58039 | /* 137906 */ "VPERMI2PDZ256rrk\000" |
| 58040 | /* 137923 */ "VCVTDQ2PDZ256rrk\000" |
| 58041 | /* 137940 */ "VCVTUDQ2PDZ256rrk\000" |
| 58042 | /* 137958 */ "VCVTQQ2PDZ256rrk\000" |
| 58043 | /* 137975 */ "VCVTUQQ2PDZ256rrk\000" |
| 58044 | /* 137993 */ "VCVTPS2PDZ256rrk\000" |
| 58045 | /* 138010 */ "VPERMT2PDZ256rrk\000" |
| 58046 | /* 138027 */ "VMOVAPDZ256rrk\000" |
| 58047 | /* 138042 */ "VSUBPDZ256rrk\000" |
| 58048 | /* 138056 */ "VMINCPDZ256rrk\000" |
| 58049 | /* 138071 */ "VMAXCPDZ256rrk\000" |
| 58050 | /* 138086 */ "VADDPDZ256rrk\000" |
| 58051 | /* 138100 */ "VEXPANDPDZ256rrk\000" |
| 58052 | /* 138117 */ "VANDPDZ256rrk\000" |
| 58053 | /* 138131 */ "VSCALEFPDZ256rrk\000" |
| 58054 | /* 138148 */ "VUNPCKHPDZ256rrk\000" |
| 58055 | /* 138165 */ "VPERMILPDZ256rrk\000" |
| 58056 | /* 138182 */ "VUNPCKLPDZ256rrk\000" |
| 58057 | /* 138199 */ "VMULPDZ256rrk\000" |
| 58058 | /* 138213 */ "VBLENDMPDZ256rrk\000" |
| 58059 | /* 138230 */ "VPERMPDZ256rrk\000" |
| 58060 | /* 138245 */ "VANDNPDZ256rrk\000" |
| 58061 | /* 138260 */ "VMINPDZ256rrk\000" |
| 58062 | /* 138274 */ "VORPDZ256rrk\000" |
| 58063 | /* 138287 */ "VXORPDZ256rrk\000" |
| 58064 | /* 138301 */ "VCOMPRESSPDZ256rrk\000" |
| 58065 | /* 138320 */ "VMOVUPDZ256rrk\000" |
| 58066 | /* 138335 */ "VDIVPDZ256rrk\000" |
| 58067 | /* 138349 */ "VMAXPDZ256rrk\000" |
| 58068 | /* 138363 */ "VPCMPEQDZ256rrk\000" |
| 58069 | /* 138379 */ "VPMOVUSQDZ256rrk\000" |
| 58070 | /* 138396 */ "VPMOVSQDZ256rrk\000" |
| 58071 | /* 138412 */ "VPMOVQDZ256rrk\000" |
| 58072 | /* 138427 */ "VPORDZ256rrk\000" |
| 58073 | /* 138440 */ "VPXORDZ256rrk\000" |
| 58074 | /* 138454 */ "VPABSDZ256rrk\000" |
| 58075 | /* 138468 */ "VPMINSDZ256rrk\000" |
| 58076 | /* 138483 */ "VPCOMPRESSDZ256rrk\000" |
| 58077 | /* 138502 */ "VBROADCASTSDZ256rrk\000" |
| 58078 | /* 138522 */ "VPMAXSDZ256rrk\000" |
| 58079 | /* 138537 */ "VPCONFLICTDZ256rrk\000" |
| 58080 | /* 138556 */ "VPCMPGTDZ256rrk\000" |
| 58081 | /* 138572 */ "VPOPCNTDZ256rrk\000" |
| 58082 | /* 138588 */ "VPLZCNTDZ256rrk\000" |
| 58083 | /* 138604 */ "VPBROADCASTDZ256rrk\000" |
| 58084 | /* 138624 */ "VPMINUDZ256rrk\000" |
| 58085 | /* 138639 */ "VPMAXUDZ256rrk\000" |
| 58086 | /* 138654 */ "VPSRAVDZ256rrk\000" |
| 58087 | /* 138669 */ "VPSLLVDZ256rrk\000" |
| 58088 | /* 138684 */ "VPROLVDZ256rrk\000" |
| 58089 | /* 138699 */ "VPSRLVDZ256rrk\000" |
| 58090 | /* 138714 */ "VPRORVDZ256rrk\000" |
| 58091 | /* 138729 */ "VPMADDWDZ256rrk\000" |
| 58092 | /* 138745 */ "VPUNPCKHWDZ256rrk\000" |
| 58093 | /* 138763 */ "VPUNPCKLWDZ256rrk\000" |
| 58094 | /* 138781 */ "VPMOVSXWDZ256rrk\000" |
| 58095 | /* 138798 */ "VPMOVZXWDZ256rrk\000" |
| 58096 | /* 138815 */ "VCVTHF82PHZ256rrk\000" |
| 58097 | /* 138833 */ "VCVTPD2PHZ256rrk\000" |
| 58098 | /* 138850 */ "VCVTDQ2PHZ256rrk\000" |
| 58099 | /* 138867 */ "VCVTUDQ2PHZ256rrk\000" |
| 58100 | /* 138885 */ "VCVTQQ2PHZ256rrk\000" |
| 58101 | /* 138902 */ "VCVTUQQ2PHZ256rrk\000" |
| 58102 | /* 138920 */ "VCVTPS2PHZ256rrk\000" |
| 58103 | /* 138937 */ "VCVTW2PHZ256rrk\000" |
| 58104 | /* 138953 */ "VCVTUW2PHZ256rrk\000" |
| 58105 | /* 138970 */ "VSUBPHZ256rrk\000" |
| 58106 | /* 138984 */ "VFCMULCPHZ256rrk\000" |
| 58107 | /* 139001 */ "VFMULCPHZ256rrk\000" |
| 58108 | /* 139017 */ "VMINCPHZ256rrk\000" |
| 58109 | /* 139032 */ "VMAXCPHZ256rrk\000" |
| 58110 | /* 139047 */ "VADDPHZ256rrk\000" |
| 58111 | /* 139061 */ "VSCALEFPHZ256rrk\000" |
| 58112 | /* 139078 */ "VMULPHZ256rrk\000" |
| 58113 | /* 139092 */ "VMINPHZ256rrk\000" |
| 58114 | /* 139106 */ "VDIVPHZ256rrk\000" |
| 58115 | /* 139120 */ "VMAXPHZ256rrk\000" |
| 58116 | /* 139134 */ "VMOVDDUPZ256rrk\000" |
| 58117 | /* 139150 */ "VMOVSHDUPZ256rrk\000" |
| 58118 | /* 139167 */ "VMOVSLDUPZ256rrk\000" |
| 58119 | /* 139184 */ "VPERMI2QZ256rrk\000" |
| 58120 | /* 139200 */ "VPERMT2QZ256rrk\000" |
| 58121 | /* 139216 */ "VPSRAQZ256rrk\000" |
| 58122 | /* 139230 */ "VPSUBQZ256rrk\000" |
| 58123 | /* 139244 */ "VPMOVSXBQZ256rrk\000" |
| 58124 | /* 139261 */ "VPMOVZXBQZ256rrk\000" |
| 58125 | /* 139278 */ "VCVTTPD2DQZ256rrk\000" |
| 58126 | /* 139296 */ "VCVTPD2DQZ256rrk\000" |
| 58127 | /* 139313 */ "VCVTTPH2DQZ256rrk\000" |
| 58128 | /* 139331 */ "VCVTPH2DQZ256rrk\000" |
| 58129 | /* 139348 */ "VCVTTPS2DQZ256rrk\000" |
| 58130 | /* 139366 */ "VCVTPS2DQZ256rrk\000" |
| 58131 | /* 139383 */ "VPADDQZ256rrk\000" |
| 58132 | /* 139397 */ "VPUNPCKHDQZ256rrk\000" |
| 58133 | /* 139415 */ "VPUNPCKLDQZ256rrk\000" |
| 58134 | /* 139433 */ "VPMULDQZ256rrk\000" |
| 58135 | /* 139448 */ "VPANDQZ256rrk\000" |
| 58136 | /* 139462 */ "VPEXPANDQZ256rrk\000" |
| 58137 | /* 139479 */ "VPUNPCKHQDQZ256rrk\000" |
| 58138 | /* 139498 */ "VPUNPCKLQDQZ256rrk\000" |
| 58139 | /* 139517 */ "VCVTTPD2UDQZ256rrk\000" |
| 58140 | /* 139536 */ "VCVTPD2UDQZ256rrk\000" |
| 58141 | /* 139554 */ "VCVTTPH2UDQZ256rrk\000" |
| 58142 | /* 139573 */ "VCVTPH2UDQZ256rrk\000" |
| 58143 | /* 139591 */ "VCVTTPS2UDQZ256rrk\000" |
| 58144 | /* 139610 */ "VCVTPS2UDQZ256rrk\000" |
| 58145 | /* 139628 */ "VPMULUDQZ256rrk\000" |
| 58146 | /* 139644 */ "VPMOVSXDQZ256rrk\000" |
| 58147 | /* 139661 */ "VPMOVZXDQZ256rrk\000" |
| 58148 | /* 139678 */ "VPSLLQZ256rrk\000" |
| 58149 | /* 139692 */ "VPMULLQZ256rrk\000" |
| 58150 | /* 139707 */ "VPSRLQZ256rrk\000" |
| 58151 | /* 139721 */ "VPBLENDMQZ256rrk\000" |
| 58152 | /* 139738 */ "VPTESTNMQZ256rrk\000" |
| 58153 | /* 139755 */ "VPERMQZ256rrk\000" |
| 58154 | /* 139769 */ "VPTESTMQZ256rrk\000" |
| 58155 | /* 139785 */ "VPANDNQZ256rrk\000" |
| 58156 | /* 139800 */ "VCVTTPD2QQZ256rrk\000" |
| 58157 | /* 139818 */ "VCVTPD2QQZ256rrk\000" |
| 58158 | /* 139835 */ "VCVTTPH2QQZ256rrk\000" |
| 58159 | /* 139853 */ "VCVTPH2QQZ256rrk\000" |
| 58160 | /* 139870 */ "VCVTTPS2QQZ256rrk\000" |
| 58161 | /* 139888 */ "VCVTPS2QQZ256rrk\000" |
| 58162 | /* 139905 */ "VPCMPEQQZ256rrk\000" |
| 58163 | /* 139921 */ "VCVTTPD2UQQZ256rrk\000" |
| 58164 | /* 139940 */ "VCVTPD2UQQZ256rrk\000" |
| 58165 | /* 139958 */ "VCVTTPH2UQQZ256rrk\000" |
| 58166 | /* 139977 */ "VCVTPH2UQQZ256rrk\000" |
| 58167 | /* 139995 */ "VCVTTPS2UQQZ256rrk\000" |
| 58168 | /* 140014 */ "VCVTPS2UQQZ256rrk\000" |
| 58169 | /* 140032 */ "VPORQZ256rrk\000" |
| 58170 | /* 140045 */ "VPXORQZ256rrk\000" |
| 58171 | /* 140059 */ "VPABSQZ256rrk\000" |
| 58172 | /* 140073 */ "VPMINSQZ256rrk\000" |
| 58173 | /* 140088 */ "VPCOMPRESSQZ256rrk\000" |
| 58174 | /* 140107 */ "VPMAXSQZ256rrk\000" |
| 58175 | /* 140122 */ "VPCONFLICTQZ256rrk\000" |
| 58176 | /* 140141 */ "VPCMPGTQZ256rrk\000" |
| 58177 | /* 140157 */ "VPOPCNTQZ256rrk\000" |
| 58178 | /* 140173 */ "VPLZCNTQZ256rrk\000" |
| 58179 | /* 140189 */ "VPBROADCASTQZ256rrk\000" |
| 58180 | /* 140209 */ "VPMINUQZ256rrk\000" |
| 58181 | /* 140224 */ "VPMAXUQZ256rrk\000" |
| 58182 | /* 140239 */ "VPSRAVQZ256rrk\000" |
| 58183 | /* 140254 */ "VPSLLVQZ256rrk\000" |
| 58184 | /* 140269 */ "VPROLVQZ256rrk\000" |
| 58185 | /* 140284 */ "VPSRLVQZ256rrk\000" |
| 58186 | /* 140299 */ "VPRORVQZ256rrk\000" |
| 58187 | /* 140314 */ "VPMOVSXWQZ256rrk\000" |
| 58188 | /* 140331 */ "VPMOVZXWQZ256rrk\000" |
| 58189 | /* 140348 */ "VCVT2PH2BF8SZ256rrk\000" |
| 58190 | /* 140368 */ "VCVTBIASPH2BF8SZ256rrk\000" |
| 58191 | /* 140391 */ "VCVTPH2BF8SZ256rrk\000" |
| 58192 | /* 140410 */ "VCVT2PH2HF8SZ256rrk\000" |
| 58193 | /* 140430 */ "VCVTBIASPH2HF8SZ256rrk\000" |
| 58194 | /* 140453 */ "VCVTPH2HF8SZ256rrk\000" |
| 58195 | /* 140472 */ "VCVTTBF162IBSZ256rrk\000" |
| 58196 | /* 140493 */ "VCVTBF162IBSZ256rrk\000" |
| 58197 | /* 140513 */ "VCVTTPH2IBSZ256rrk\000" |
| 58198 | /* 140532 */ "VCVTPH2IBSZ256rrk\000" |
| 58199 | /* 140550 */ "VCVTTPS2IBSZ256rrk\000" |
| 58200 | /* 140569 */ "VCVTPS2IBSZ256rrk\000" |
| 58201 | /* 140587 */ "VCVTTBF162IUBSZ256rrk\000" |
| 58202 | /* 140609 */ "VCVTBF162IUBSZ256rrk\000" |
| 58203 | /* 140630 */ "VCVTTPH2IUBSZ256rrk\000" |
| 58204 | /* 140650 */ "VCVTPH2IUBSZ256rrk\000" |
| 58205 | /* 140669 */ "VCVTTPS2IUBSZ256rrk\000" |
| 58206 | /* 140689 */ "VCVTPS2IUBSZ256rrk\000" |
| 58207 | /* 140708 */ "VCVTPD2PSZ256rrk\000" |
| 58208 | /* 140725 */ "VCVTPH2PSZ256rrk\000" |
| 58209 | /* 140742 */ "VPERMI2PSZ256rrk\000" |
| 58210 | /* 140759 */ "VCVTDQ2PSZ256rrk\000" |
| 58211 | /* 140776 */ "VCVTUDQ2PSZ256rrk\000" |
| 58212 | /* 140794 */ "VCVTQQ2PSZ256rrk\000" |
| 58213 | /* 140811 */ "VCVTUQQ2PSZ256rrk\000" |
| 58214 | /* 140829 */ "VPERMT2PSZ256rrk\000" |
| 58215 | /* 140846 */ "VMOVAPSZ256rrk\000" |
| 58216 | /* 140861 */ "VSUBPSZ256rrk\000" |
| 58217 | /* 140875 */ "VMINCPSZ256rrk\000" |
| 58218 | /* 140890 */ "VMAXCPSZ256rrk\000" |
| 58219 | /* 140905 */ "VADDPSZ256rrk\000" |
| 58220 | /* 140919 */ "VEXPANDPSZ256rrk\000" |
| 58221 | /* 140936 */ "VANDPSZ256rrk\000" |
| 58222 | /* 140950 */ "VSCALEFPSZ256rrk\000" |
| 58223 | /* 140967 */ "VUNPCKHPSZ256rrk\000" |
| 58224 | /* 140984 */ "VPERMILPSZ256rrk\000" |
| 58225 | /* 141001 */ "VUNPCKLPSZ256rrk\000" |
| 58226 | /* 141018 */ "VMULPSZ256rrk\000" |
| 58227 | /* 141032 */ "VBLENDMPSZ256rrk\000" |
| 58228 | /* 141049 */ "VPERMPSZ256rrk\000" |
| 58229 | /* 141064 */ "VANDNPSZ256rrk\000" |
| 58230 | /* 141079 */ "VMINPSZ256rrk\000" |
| 58231 | /* 141093 */ "VORPSZ256rrk\000" |
| 58232 | /* 141106 */ "VXORPSZ256rrk\000" |
| 58233 | /* 141120 */ "VCOMPRESSPSZ256rrk\000" |
| 58234 | /* 141139 */ "VMOVUPSZ256rrk\000" |
| 58235 | /* 141154 */ "VDIVPSZ256rrk\000" |
| 58236 | /* 141168 */ "VMAXPSZ256rrk\000" |
| 58237 | /* 141182 */ "VCVTTPD2DQSZ256rrk\000" |
| 58238 | /* 141201 */ "VCVTTPS2DQSZ256rrk\000" |
| 58239 | /* 141220 */ "VCVTTPD2UDQSZ256rrk\000" |
| 58240 | /* 141240 */ "VCVTTPS2UDQSZ256rrk\000" |
| 58241 | /* 141260 */ "VCVTTPD2QQSZ256rrk\000" |
| 58242 | /* 141279 */ "VCVTTPS2QQSZ256rrk\000" |
| 58243 | /* 141298 */ "VCVTTPD2UQQSZ256rrk\000" |
| 58244 | /* 141318 */ "VCVTTPS2UQQSZ256rrk\000" |
| 58245 | /* 141338 */ "VBROADCASTSSZ256rrk\000" |
| 58246 | /* 141358 */ "VCVTTPH2WZ256rrk\000" |
| 58247 | /* 141375 */ "VCVTPH2WZ256rrk\000" |
| 58248 | /* 141391 */ "VPERMI2WZ256rrk\000" |
| 58249 | /* 141407 */ "VPERMT2WZ256rrk\000" |
| 58250 | /* 141423 */ "VPSRAWZ256rrk\000" |
| 58251 | /* 141437 */ "VPUNPCKHBWZ256rrk\000" |
| 58252 | /* 141455 */ "VPUNPCKLBWZ256rrk\000" |
| 58253 | /* 141473 */ "VPSUBWZ256rrk\000" |
| 58254 | /* 141487 */ "VPMOVSXBWZ256rrk\000" |
| 58255 | /* 141504 */ "VPMOVZXBWZ256rrk\000" |
| 58256 | /* 141521 */ "VPADDWZ256rrk\000" |
| 58257 | /* 141535 */ "VPEXPANDWZ256rrk\000" |
| 58258 | /* 141552 */ "VPACKSSDWZ256rrk\000" |
| 58259 | /* 141569 */ "VPACKUSDWZ256rrk\000" |
| 58260 | /* 141586 */ "VPMOVUSDWZ256rrk\000" |
| 58261 | /* 141603 */ "VPMOVSDWZ256rrk\000" |
| 58262 | /* 141619 */ "VPMOVDWZ256rrk\000" |
| 58263 | /* 141634 */ "VPAVGWZ256rrk\000" |
| 58264 | /* 141648 */ "VPMULHWZ256rrk\000" |
| 58265 | /* 141663 */ "VPSLLWZ256rrk\000" |
| 58266 | /* 141677 */ "VPMULLWZ256rrk\000" |
| 58267 | /* 141692 */ "VPSRLWZ256rrk\000" |
| 58268 | /* 141706 */ "VPBLENDMWZ256rrk\000" |
| 58269 | /* 141723 */ "VPTESTNMWZ256rrk\000" |
| 58270 | /* 141740 */ "VPERMWZ256rrk\000" |
| 58271 | /* 141754 */ "VPTESTMWZ256rrk\000" |
| 58272 | /* 141770 */ "VPCMPEQWZ256rrk\000" |
| 58273 | /* 141786 */ "VPMOVUSQWZ256rrk\000" |
| 58274 | /* 141803 */ "VPMOVSQWZ256rrk\000" |
| 58275 | /* 141819 */ "VPMOVQWZ256rrk\000" |
| 58276 | /* 141834 */ "VPABSWZ256rrk\000" |
| 58277 | /* 141848 */ "VPMADDUBSWZ256rrk\000" |
| 58278 | /* 141866 */ "VPSUBSWZ256rrk\000" |
| 58279 | /* 141881 */ "VPADDSWZ256rrk\000" |
| 58280 | /* 141896 */ "VPMINSWZ256rrk\000" |
| 58281 | /* 141911 */ "VPMULHRSWZ256rrk\000" |
| 58282 | /* 141928 */ "VPCOMPRESSWZ256rrk\000" |
| 58283 | /* 141947 */ "VPSUBUSWZ256rrk\000" |
| 58284 | /* 141963 */ "VPADDUSWZ256rrk\000" |
| 58285 | /* 141979 */ "VPMAXSWZ256rrk\000" |
| 58286 | /* 141994 */ "VPCMPGTWZ256rrk\000" |
| 58287 | /* 142010 */ "VPOPCNTWZ256rrk\000" |
| 58288 | /* 142026 */ "VPBROADCASTWZ256rrk\000" |
| 58289 | /* 142046 */ "VCVTTPH2UWZ256rrk\000" |
| 58290 | /* 142064 */ "VCVTPH2UWZ256rrk\000" |
| 58291 | /* 142081 */ "VPMULHUWZ256rrk\000" |
| 58292 | /* 142097 */ "VPMINUWZ256rrk\000" |
| 58293 | /* 142112 */ "VPMAXUWZ256rrk\000" |
| 58294 | /* 142127 */ "VPSRAVWZ256rrk\000" |
| 58295 | /* 142142 */ "VPSLLVWZ256rrk\000" |
| 58296 | /* 142157 */ "VPSRLVWZ256rrk\000" |
| 58297 | /* 142172 */ "VCVT2PS2PHXZ256rrk\000" |
| 58298 | /* 142191 */ "VCVTPS2PHXZ256rrk\000" |
| 58299 | /* 142209 */ "VCVTPH2PSXZ256rrk\000" |
| 58300 | /* 142227 */ "VPBROADCASTBrZ256rrk\000" |
| 58301 | /* 142248 */ "VPBROADCASTDrZ256rrk\000" |
| 58302 | /* 142269 */ "VPBROADCASTQrZ256rrk\000" |
| 58303 | /* 142290 */ "VPBROADCASTWrZ256rrk\000" |
| 58304 | /* 142311 */ "VMOVDQA32Z128rrk\000" |
| 58305 | /* 142328 */ "VMOVDQU32Z128rrk\000" |
| 58306 | /* 142345 */ "VBROADCASTI32X2Z128rrk\000" |
| 58307 | /* 142368 */ "VMOVDQA64Z128rrk\000" |
| 58308 | /* 142385 */ "VMOVDQU64Z128rrk\000" |
| 58309 | /* 142402 */ "VCVTNE2PS2BF16Z128rrk\000" |
| 58310 | /* 142424 */ "VCVTNEPS2BF16Z128rrk\000" |
| 58311 | /* 142445 */ "VSUBBF16Z128rrk\000" |
| 58312 | /* 142461 */ "VADDBF16Z128rrk\000" |
| 58313 | /* 142477 */ "VSCALEFBF16Z128rrk\000" |
| 58314 | /* 142496 */ "VMULBF16Z128rrk\000" |
| 58315 | /* 142512 */ "VMINBF16Z128rrk\000" |
| 58316 | /* 142528 */ "VDIVBF16Z128rrk\000" |
| 58317 | /* 142544 */ "VMAXBF16Z128rrk\000" |
| 58318 | /* 142560 */ "VMOVDQU16Z128rrk\000" |
| 58319 | /* 142577 */ "VCVT2PH2BF8Z128rrk\000" |
| 58320 | /* 142596 */ "VCVTBIASPH2BF8Z128rrk\000" |
| 58321 | /* 142618 */ "VCVTPH2BF8Z128rrk\000" |
| 58322 | /* 142636 */ "VCVT2PH2HF8Z128rrk\000" |
| 58323 | /* 142655 */ "VCVTBIASPH2HF8Z128rrk\000" |
| 58324 | /* 142677 */ "VCVTPH2HF8Z128rrk\000" |
| 58325 | /* 142695 */ "VMOVDQU8Z128rrk\000" |
| 58326 | /* 142711 */ "VPERMI2BZ128rrk\000" |
| 58327 | /* 142727 */ "VPERMT2BZ128rrk\000" |
| 58328 | /* 142743 */ "VPSUBBZ128rrk\000" |
| 58329 | /* 142757 */ "VPADDBZ128rrk\000" |
| 58330 | /* 142771 */ "VPEXPANDBZ128rrk\000" |
| 58331 | /* 142788 */ "VPMOVUSDBZ128rrk\000" |
| 58332 | /* 142805 */ "VPMOVSDBZ128rrk\000" |
| 58333 | /* 142821 */ "VPMOVDBZ128rrk\000" |
| 58334 | /* 142836 */ "VPSHUFBZ128rrk\000" |
| 58335 | /* 142851 */ "VPAVGBZ128rrk\000" |
| 58336 | /* 142865 */ "VGF2P8MULBZ128rrk\000" |
| 58337 | /* 142883 */ "VPBLENDMBZ128rrk\000" |
| 58338 | /* 142900 */ "VPTESTNMBZ128rrk\000" |
| 58339 | /* 142917 */ "VPSHUFBITQMBZ128rrk\000" |
| 58340 | /* 142937 */ "VPERMBZ128rrk\000" |
| 58341 | /* 142951 */ "VPTESTMBZ128rrk\000" |
| 58342 | /* 142967 */ "VPCMPEQBZ128rrk\000" |
| 58343 | /* 142983 */ "VPMOVUSQBZ128rrk\000" |
| 58344 | /* 143000 */ "VPMOVSQBZ128rrk\000" |
| 58345 | /* 143016 */ "VPMULTISHIFTQBZ128rrk\000" |
| 58346 | /* 143038 */ "VPMOVQBZ128rrk\000" |
| 58347 | /* 143053 */ "VPABSBZ128rrk\000" |
| 58348 | /* 143067 */ "VPSUBSBZ128rrk\000" |
| 58349 | /* 143082 */ "VPADDSBZ128rrk\000" |
| 58350 | /* 143097 */ "VPMINSBZ128rrk\000" |
| 58351 | /* 143112 */ "VPCOMPRESSBZ128rrk\000" |
| 58352 | /* 143131 */ "VPSUBUSBZ128rrk\000" |
| 58353 | /* 143147 */ "VPADDUSBZ128rrk\000" |
| 58354 | /* 143163 */ "VPMAXSBZ128rrk\000" |
| 58355 | /* 143178 */ "VPCMPGTBZ128rrk\000" |
| 58356 | /* 143194 */ "VPOPCNTBZ128rrk\000" |
| 58357 | /* 143210 */ "VPBROADCASTBZ128rrk\000" |
| 58358 | /* 143230 */ "VPMINUBZ128rrk\000" |
| 58359 | /* 143245 */ "VPMAXUBZ128rrk\000" |
| 58360 | /* 143260 */ "VPACKSSWBZ128rrk\000" |
| 58361 | /* 143277 */ "VPACKUSWBZ128rrk\000" |
| 58362 | /* 143294 */ "VPMOVUSWBZ128rrk\000" |
| 58363 | /* 143311 */ "VPMOVSWBZ128rrk\000" |
| 58364 | /* 143327 */ "VPMOVWBZ128rrk\000" |
| 58365 | /* 143342 */ "VPERMI2DZ128rrk\000" |
| 58366 | /* 143358 */ "VPERMT2DZ128rrk\000" |
| 58367 | /* 143374 */ "VPSRADZ128rrk\000" |
| 58368 | /* 143388 */ "VPSUBDZ128rrk\000" |
| 58369 | /* 143402 */ "VPMOVSXBDZ128rrk\000" |
| 58370 | /* 143419 */ "VPMOVZXBDZ128rrk\000" |
| 58371 | /* 143436 */ "VPADDDZ128rrk\000" |
| 58372 | /* 143450 */ "VPANDDZ128rrk\000" |
| 58373 | /* 143464 */ "VPEXPANDDZ128rrk\000" |
| 58374 | /* 143481 */ "VPSLLDZ128rrk\000" |
| 58375 | /* 143495 */ "VPMULLDZ128rrk\000" |
| 58376 | /* 143510 */ "VPSRLDZ128rrk\000" |
| 58377 | /* 143524 */ "VPBLENDMDZ128rrk\000" |
| 58378 | /* 143541 */ "VPTESTNMDZ128rrk\000" |
| 58379 | /* 143558 */ "VPTESTMDZ128rrk\000" |
| 58380 | /* 143574 */ "VPANDNDZ128rrk\000" |
| 58381 | /* 143589 */ "VCVTPH2PDZ128rrk\000" |
| 58382 | /* 143606 */ "VPERMI2PDZ128rrk\000" |
| 58383 | /* 143623 */ "VCVTDQ2PDZ128rrk\000" |
| 58384 | /* 143640 */ "VCVTUDQ2PDZ128rrk\000" |
| 58385 | /* 143658 */ "VCVTQQ2PDZ128rrk\000" |
| 58386 | /* 143675 */ "VCVTUQQ2PDZ128rrk\000" |
| 58387 | /* 143693 */ "VCVTPS2PDZ128rrk\000" |
| 58388 | /* 143710 */ "VPERMT2PDZ128rrk\000" |
| 58389 | /* 143727 */ "VMOVAPDZ128rrk\000" |
| 58390 | /* 143742 */ "VSUBPDZ128rrk\000" |
| 58391 | /* 143756 */ "VMINCPDZ128rrk\000" |
| 58392 | /* 143771 */ "VMAXCPDZ128rrk\000" |
| 58393 | /* 143786 */ "VADDPDZ128rrk\000" |
| 58394 | /* 143800 */ "VEXPANDPDZ128rrk\000" |
| 58395 | /* 143817 */ "VANDPDZ128rrk\000" |
| 58396 | /* 143831 */ "VSCALEFPDZ128rrk\000" |
| 58397 | /* 143848 */ "VUNPCKHPDZ128rrk\000" |
| 58398 | /* 143865 */ "VPERMILPDZ128rrk\000" |
| 58399 | /* 143882 */ "VUNPCKLPDZ128rrk\000" |
| 58400 | /* 143899 */ "VMULPDZ128rrk\000" |
| 58401 | /* 143913 */ "VBLENDMPDZ128rrk\000" |
| 58402 | /* 143930 */ "VANDNPDZ128rrk\000" |
| 58403 | /* 143945 */ "VMINPDZ128rrk\000" |
| 58404 | /* 143959 */ "VORPDZ128rrk\000" |
| 58405 | /* 143972 */ "VXORPDZ128rrk\000" |
| 58406 | /* 143986 */ "VCOMPRESSPDZ128rrk\000" |
| 58407 | /* 144005 */ "VMOVUPDZ128rrk\000" |
| 58408 | /* 144020 */ "VDIVPDZ128rrk\000" |
| 58409 | /* 144034 */ "VMAXPDZ128rrk\000" |
| 58410 | /* 144048 */ "VPCMPEQDZ128rrk\000" |
| 58411 | /* 144064 */ "VPMOVUSQDZ128rrk\000" |
| 58412 | /* 144081 */ "VPMOVSQDZ128rrk\000" |
| 58413 | /* 144097 */ "VPMOVQDZ128rrk\000" |
| 58414 | /* 144112 */ "VPORDZ128rrk\000" |
| 58415 | /* 144125 */ "VPXORDZ128rrk\000" |
| 58416 | /* 144139 */ "VPABSDZ128rrk\000" |
| 58417 | /* 144153 */ "VPMINSDZ128rrk\000" |
| 58418 | /* 144168 */ "VPCOMPRESSDZ128rrk\000" |
| 58419 | /* 144187 */ "VPMAXSDZ128rrk\000" |
| 58420 | /* 144202 */ "VPCONFLICTDZ128rrk\000" |
| 58421 | /* 144221 */ "VPCMPGTDZ128rrk\000" |
| 58422 | /* 144237 */ "VPOPCNTDZ128rrk\000" |
| 58423 | /* 144253 */ "VPLZCNTDZ128rrk\000" |
| 58424 | /* 144269 */ "VPBROADCASTDZ128rrk\000" |
| 58425 | /* 144289 */ "VPMINUDZ128rrk\000" |
| 58426 | /* 144304 */ "VPMAXUDZ128rrk\000" |
| 58427 | /* 144319 */ "VPSRAVDZ128rrk\000" |
| 58428 | /* 144334 */ "VPSLLVDZ128rrk\000" |
| 58429 | /* 144349 */ "VPROLVDZ128rrk\000" |
| 58430 | /* 144364 */ "VPSRLVDZ128rrk\000" |
| 58431 | /* 144379 */ "VPRORVDZ128rrk\000" |
| 58432 | /* 144394 */ "VPMADDWDZ128rrk\000" |
| 58433 | /* 144410 */ "VPUNPCKHWDZ128rrk\000" |
| 58434 | /* 144428 */ "VPUNPCKLWDZ128rrk\000" |
| 58435 | /* 144446 */ "VPMOVSXWDZ128rrk\000" |
| 58436 | /* 144463 */ "VPMOVZXWDZ128rrk\000" |
| 58437 | /* 144480 */ "VCVTHF82PHZ128rrk\000" |
| 58438 | /* 144498 */ "VCVTPD2PHZ128rrk\000" |
| 58439 | /* 144515 */ "VCVTDQ2PHZ128rrk\000" |
| 58440 | /* 144532 */ "VCVTUDQ2PHZ128rrk\000" |
| 58441 | /* 144550 */ "VCVTQQ2PHZ128rrk\000" |
| 58442 | /* 144567 */ "VCVTUQQ2PHZ128rrk\000" |
| 58443 | /* 144585 */ "VCVTPS2PHZ128rrk\000" |
| 58444 | /* 144602 */ "VCVTW2PHZ128rrk\000" |
| 58445 | /* 144618 */ "VCVTUW2PHZ128rrk\000" |
| 58446 | /* 144635 */ "VSUBPHZ128rrk\000" |
| 58447 | /* 144649 */ "VFCMULCPHZ128rrk\000" |
| 58448 | /* 144666 */ "VFMULCPHZ128rrk\000" |
| 58449 | /* 144682 */ "VMINCPHZ128rrk\000" |
| 58450 | /* 144697 */ "VMAXCPHZ128rrk\000" |
| 58451 | /* 144712 */ "VADDPHZ128rrk\000" |
| 58452 | /* 144726 */ "VSCALEFPHZ128rrk\000" |
| 58453 | /* 144743 */ "VMULPHZ128rrk\000" |
| 58454 | /* 144757 */ "VMINPHZ128rrk\000" |
| 58455 | /* 144771 */ "VDIVPHZ128rrk\000" |
| 58456 | /* 144785 */ "VMAXPHZ128rrk\000" |
| 58457 | /* 144799 */ "VMOVDDUPZ128rrk\000" |
| 58458 | /* 144815 */ "VMOVSHDUPZ128rrk\000" |
| 58459 | /* 144832 */ "VMOVSLDUPZ128rrk\000" |
| 58460 | /* 144849 */ "VPERMI2QZ128rrk\000" |
| 58461 | /* 144865 */ "VPERMT2QZ128rrk\000" |
| 58462 | /* 144881 */ "VPSRAQZ128rrk\000" |
| 58463 | /* 144895 */ "VPSUBQZ128rrk\000" |
| 58464 | /* 144909 */ "VPMOVSXBQZ128rrk\000" |
| 58465 | /* 144926 */ "VPMOVZXBQZ128rrk\000" |
| 58466 | /* 144943 */ "VCVTTPD2DQZ128rrk\000" |
| 58467 | /* 144961 */ "VCVTPD2DQZ128rrk\000" |
| 58468 | /* 144978 */ "VCVTTPH2DQZ128rrk\000" |
| 58469 | /* 144996 */ "VCVTPH2DQZ128rrk\000" |
| 58470 | /* 145013 */ "VCVTTPS2DQZ128rrk\000" |
| 58471 | /* 145031 */ "VCVTPS2DQZ128rrk\000" |
| 58472 | /* 145048 */ "VPADDQZ128rrk\000" |
| 58473 | /* 145062 */ "VPUNPCKHDQZ128rrk\000" |
| 58474 | /* 145080 */ "VPUNPCKLDQZ128rrk\000" |
| 58475 | /* 145098 */ "VPMULDQZ128rrk\000" |
| 58476 | /* 145113 */ "VPANDQZ128rrk\000" |
| 58477 | /* 145127 */ "VPEXPANDQZ128rrk\000" |
| 58478 | /* 145144 */ "VPUNPCKHQDQZ128rrk\000" |
| 58479 | /* 145163 */ "VPUNPCKLQDQZ128rrk\000" |
| 58480 | /* 145182 */ "VCVTTPD2UDQZ128rrk\000" |
| 58481 | /* 145201 */ "VCVTPD2UDQZ128rrk\000" |
| 58482 | /* 145219 */ "VCVTTPH2UDQZ128rrk\000" |
| 58483 | /* 145238 */ "VCVTPH2UDQZ128rrk\000" |
| 58484 | /* 145256 */ "VCVTTPS2UDQZ128rrk\000" |
| 58485 | /* 145275 */ "VCVTPS2UDQZ128rrk\000" |
| 58486 | /* 145293 */ "VPMULUDQZ128rrk\000" |
| 58487 | /* 145309 */ "VPMOVSXDQZ128rrk\000" |
| 58488 | /* 145326 */ "VPMOVZXDQZ128rrk\000" |
| 58489 | /* 145343 */ "VPSLLQZ128rrk\000" |
| 58490 | /* 145357 */ "VPMULLQZ128rrk\000" |
| 58491 | /* 145372 */ "VPSRLQZ128rrk\000" |
| 58492 | /* 145386 */ "VPBLENDMQZ128rrk\000" |
| 58493 | /* 145403 */ "VPTESTNMQZ128rrk\000" |
| 58494 | /* 145420 */ "VPTESTMQZ128rrk\000" |
| 58495 | /* 145436 */ "VPANDNQZ128rrk\000" |
| 58496 | /* 145451 */ "VCVTTPD2QQZ128rrk\000" |
| 58497 | /* 145469 */ "VCVTPD2QQZ128rrk\000" |
| 58498 | /* 145486 */ "VCVTTPH2QQZ128rrk\000" |
| 58499 | /* 145504 */ "VCVTPH2QQZ128rrk\000" |
| 58500 | /* 145521 */ "VCVTTPS2QQZ128rrk\000" |
| 58501 | /* 145539 */ "VCVTPS2QQZ128rrk\000" |
| 58502 | /* 145556 */ "VPCMPEQQZ128rrk\000" |
| 58503 | /* 145572 */ "VCVTTPD2UQQZ128rrk\000" |
| 58504 | /* 145591 */ "VCVTPD2UQQZ128rrk\000" |
| 58505 | /* 145609 */ "VCVTTPH2UQQZ128rrk\000" |
| 58506 | /* 145628 */ "VCVTPH2UQQZ128rrk\000" |
| 58507 | /* 145646 */ "VCVTTPS2UQQZ128rrk\000" |
| 58508 | /* 145665 */ "VCVTPS2UQQZ128rrk\000" |
| 58509 | /* 145683 */ "VPORQZ128rrk\000" |
| 58510 | /* 145696 */ "VPXORQZ128rrk\000" |
| 58511 | /* 145710 */ "VPABSQZ128rrk\000" |
| 58512 | /* 145724 */ "VPMINSQZ128rrk\000" |
| 58513 | /* 145739 */ "VPCOMPRESSQZ128rrk\000" |
| 58514 | /* 145758 */ "VPMAXSQZ128rrk\000" |
| 58515 | /* 145773 */ "VPCONFLICTQZ128rrk\000" |
| 58516 | /* 145792 */ "VPCMPGTQZ128rrk\000" |
| 58517 | /* 145808 */ "VPOPCNTQZ128rrk\000" |
| 58518 | /* 145824 */ "VPLZCNTQZ128rrk\000" |
| 58519 | /* 145840 */ "VPBROADCASTQZ128rrk\000" |
| 58520 | /* 145860 */ "VPMINUQZ128rrk\000" |
| 58521 | /* 145875 */ "VPMAXUQZ128rrk\000" |
| 58522 | /* 145890 */ "VPSRAVQZ128rrk\000" |
| 58523 | /* 145905 */ "VPSLLVQZ128rrk\000" |
| 58524 | /* 145920 */ "VPROLVQZ128rrk\000" |
| 58525 | /* 145935 */ "VPSRLVQZ128rrk\000" |
| 58526 | /* 145950 */ "VPRORVQZ128rrk\000" |
| 58527 | /* 145965 */ "VPMOVSXWQZ128rrk\000" |
| 58528 | /* 145982 */ "VPMOVZXWQZ128rrk\000" |
| 58529 | /* 145999 */ "VCVT2PH2BF8SZ128rrk\000" |
| 58530 | /* 146019 */ "VCVTBIASPH2BF8SZ128rrk\000" |
| 58531 | /* 146042 */ "VCVTPH2BF8SZ128rrk\000" |
| 58532 | /* 146061 */ "VCVT2PH2HF8SZ128rrk\000" |
| 58533 | /* 146081 */ "VCVTBIASPH2HF8SZ128rrk\000" |
| 58534 | /* 146104 */ "VCVTPH2HF8SZ128rrk\000" |
| 58535 | /* 146123 */ "VCVTTBF162IBSZ128rrk\000" |
| 58536 | /* 146144 */ "VCVTBF162IBSZ128rrk\000" |
| 58537 | /* 146164 */ "VCVTTPH2IBSZ128rrk\000" |
| 58538 | /* 146183 */ "VCVTPH2IBSZ128rrk\000" |
| 58539 | /* 146201 */ "VCVTTPS2IBSZ128rrk\000" |
| 58540 | /* 146220 */ "VCVTPS2IBSZ128rrk\000" |
| 58541 | /* 146238 */ "VCVTTBF162IUBSZ128rrk\000" |
| 58542 | /* 146260 */ "VCVTBF162IUBSZ128rrk\000" |
| 58543 | /* 146281 */ "VCVTTPH2IUBSZ128rrk\000" |
| 58544 | /* 146301 */ "VCVTPH2IUBSZ128rrk\000" |
| 58545 | /* 146320 */ "VCVTTPS2IUBSZ128rrk\000" |
| 58546 | /* 146340 */ "VCVTPS2IUBSZ128rrk\000" |
| 58547 | /* 146359 */ "VCVTPD2PSZ128rrk\000" |
| 58548 | /* 146376 */ "VCVTPH2PSZ128rrk\000" |
| 58549 | /* 146393 */ "VPERMI2PSZ128rrk\000" |
| 58550 | /* 146410 */ "VCVTDQ2PSZ128rrk\000" |
| 58551 | /* 146427 */ "VCVTUDQ2PSZ128rrk\000" |
| 58552 | /* 146445 */ "VCVTQQ2PSZ128rrk\000" |
| 58553 | /* 146462 */ "VCVTUQQ2PSZ128rrk\000" |
| 58554 | /* 146480 */ "VPERMT2PSZ128rrk\000" |
| 58555 | /* 146497 */ "VMOVAPSZ128rrk\000" |
| 58556 | /* 146512 */ "VSUBPSZ128rrk\000" |
| 58557 | /* 146526 */ "VMINCPSZ128rrk\000" |
| 58558 | /* 146541 */ "VMAXCPSZ128rrk\000" |
| 58559 | /* 146556 */ "VADDPSZ128rrk\000" |
| 58560 | /* 146570 */ "VEXPANDPSZ128rrk\000" |
| 58561 | /* 146587 */ "VANDPSZ128rrk\000" |
| 58562 | /* 146601 */ "VSCALEFPSZ128rrk\000" |
| 58563 | /* 146618 */ "VUNPCKHPSZ128rrk\000" |
| 58564 | /* 146635 */ "VPERMILPSZ128rrk\000" |
| 58565 | /* 146652 */ "VUNPCKLPSZ128rrk\000" |
| 58566 | /* 146669 */ "VMULPSZ128rrk\000" |
| 58567 | /* 146683 */ "VBLENDMPSZ128rrk\000" |
| 58568 | /* 146700 */ "VANDNPSZ128rrk\000" |
| 58569 | /* 146715 */ "VMINPSZ128rrk\000" |
| 58570 | /* 146729 */ "VORPSZ128rrk\000" |
| 58571 | /* 146742 */ "VXORPSZ128rrk\000" |
| 58572 | /* 146756 */ "VCOMPRESSPSZ128rrk\000" |
| 58573 | /* 146775 */ "VMOVUPSZ128rrk\000" |
| 58574 | /* 146790 */ "VDIVPSZ128rrk\000" |
| 58575 | /* 146804 */ "VMAXPSZ128rrk\000" |
| 58576 | /* 146818 */ "VCVTTPD2DQSZ128rrk\000" |
| 58577 | /* 146837 */ "VCVTTPS2DQSZ128rrk\000" |
| 58578 | /* 146856 */ "VCVTTPD2UDQSZ128rrk\000" |
| 58579 | /* 146876 */ "VCVTTPS2UDQSZ128rrk\000" |
| 58580 | /* 146896 */ "VCVTTPD2QQSZ128rrk\000" |
| 58581 | /* 146915 */ "VCVTTPS2QQSZ128rrk\000" |
| 58582 | /* 146934 */ "VCVTTPD2UQQSZ128rrk\000" |
| 58583 | /* 146954 */ "VCVTTPS2UQQSZ128rrk\000" |
| 58584 | /* 146974 */ "VBROADCASTSSZ128rrk\000" |
| 58585 | /* 146994 */ "VCVTTPH2WZ128rrk\000" |
| 58586 | /* 147011 */ "VCVTPH2WZ128rrk\000" |
| 58587 | /* 147027 */ "VPERMI2WZ128rrk\000" |
| 58588 | /* 147043 */ "VPERMT2WZ128rrk\000" |
| 58589 | /* 147059 */ "VPSRAWZ128rrk\000" |
| 58590 | /* 147073 */ "VPUNPCKHBWZ128rrk\000" |
| 58591 | /* 147091 */ "VPUNPCKLBWZ128rrk\000" |
| 58592 | /* 147109 */ "VPSUBWZ128rrk\000" |
| 58593 | /* 147123 */ "VPMOVSXBWZ128rrk\000" |
| 58594 | /* 147140 */ "VPMOVZXBWZ128rrk\000" |
| 58595 | /* 147157 */ "VPADDWZ128rrk\000" |
| 58596 | /* 147171 */ "VPEXPANDWZ128rrk\000" |
| 58597 | /* 147188 */ "VPACKSSDWZ128rrk\000" |
| 58598 | /* 147205 */ "VPACKUSDWZ128rrk\000" |
| 58599 | /* 147222 */ "VPMOVUSDWZ128rrk\000" |
| 58600 | /* 147239 */ "VPMOVSDWZ128rrk\000" |
| 58601 | /* 147255 */ "VPMOVDWZ128rrk\000" |
| 58602 | /* 147270 */ "VPAVGWZ128rrk\000" |
| 58603 | /* 147284 */ "VPMULHWZ128rrk\000" |
| 58604 | /* 147299 */ "VPSLLWZ128rrk\000" |
| 58605 | /* 147313 */ "VPMULLWZ128rrk\000" |
| 58606 | /* 147328 */ "VPSRLWZ128rrk\000" |
| 58607 | /* 147342 */ "VPBLENDMWZ128rrk\000" |
| 58608 | /* 147359 */ "VPTESTNMWZ128rrk\000" |
| 58609 | /* 147376 */ "VPERMWZ128rrk\000" |
| 58610 | /* 147390 */ "VPTESTMWZ128rrk\000" |
| 58611 | /* 147406 */ "VPCMPEQWZ128rrk\000" |
| 58612 | /* 147422 */ "VPMOVUSQWZ128rrk\000" |
| 58613 | /* 147439 */ "VPMOVSQWZ128rrk\000" |
| 58614 | /* 147455 */ "VPMOVQWZ128rrk\000" |
| 58615 | /* 147470 */ "VPABSWZ128rrk\000" |
| 58616 | /* 147484 */ "VPMADDUBSWZ128rrk\000" |
| 58617 | /* 147502 */ "VPSUBSWZ128rrk\000" |
| 58618 | /* 147517 */ "VPADDSWZ128rrk\000" |
| 58619 | /* 147532 */ "VPMINSWZ128rrk\000" |
| 58620 | /* 147547 */ "VPMULHRSWZ128rrk\000" |
| 58621 | /* 147564 */ "VPCOMPRESSWZ128rrk\000" |
| 58622 | /* 147583 */ "VPSUBUSWZ128rrk\000" |
| 58623 | /* 147599 */ "VPADDUSWZ128rrk\000" |
| 58624 | /* 147615 */ "VPMAXSWZ128rrk\000" |
| 58625 | /* 147630 */ "VPCMPGTWZ128rrk\000" |
| 58626 | /* 147646 */ "VPOPCNTWZ128rrk\000" |
| 58627 | /* 147662 */ "VPBROADCASTWZ128rrk\000" |
| 58628 | /* 147682 */ "VCVTTPH2UWZ128rrk\000" |
| 58629 | /* 147700 */ "VCVTPH2UWZ128rrk\000" |
| 58630 | /* 147717 */ "VPMULHUWZ128rrk\000" |
| 58631 | /* 147733 */ "VPMINUWZ128rrk\000" |
| 58632 | /* 147748 */ "VPMAXUWZ128rrk\000" |
| 58633 | /* 147763 */ "VPSRAVWZ128rrk\000" |
| 58634 | /* 147778 */ "VPSLLVWZ128rrk\000" |
| 58635 | /* 147793 */ "VPSRLVWZ128rrk\000" |
| 58636 | /* 147808 */ "VCVT2PS2PHXZ128rrk\000" |
| 58637 | /* 147827 */ "VCVTPS2PHXZ128rrk\000" |
| 58638 | /* 147845 */ "VCVTPH2PSXZ128rrk\000" |
| 58639 | /* 147863 */ "VPBROADCASTBrZ128rrk\000" |
| 58640 | /* 147884 */ "VPBROADCASTDrZ128rrk\000" |
| 58641 | /* 147905 */ "VPBROADCASTQrZ128rrk\000" |
| 58642 | /* 147926 */ "VPBROADCASTWrZ128rrk\000" |
| 58643 | /* 147947 */ "VMOVDQA32Zrrk\000" |
| 58644 | /* 147961 */ "VMOVDQU32Zrrk\000" |
| 58645 | /* 147975 */ "VBROADCASTF32X2Zrrk\000" |
| 58646 | /* 147995 */ "VBROADCASTI32X2Zrrk\000" |
| 58647 | /* 148015 */ "VMOVDQA64Zrrk\000" |
| 58648 | /* 148029 */ "VMOVDQU64Zrrk\000" |
| 58649 | /* 148043 */ "VCVTNE2PS2BF16Zrrk\000" |
| 58650 | /* 148062 */ "VCVTNEPS2BF16Zrrk\000" |
| 58651 | /* 148080 */ "VSUBBF16Zrrk\000" |
| 58652 | /* 148093 */ "VADDBF16Zrrk\000" |
| 58653 | /* 148106 */ "VSCALEFBF16Zrrk\000" |
| 58654 | /* 148122 */ "VMULBF16Zrrk\000" |
| 58655 | /* 148135 */ "VMINBF16Zrrk\000" |
| 58656 | /* 148148 */ "VDIVBF16Zrrk\000" |
| 58657 | /* 148161 */ "VMAXBF16Zrrk\000" |
| 58658 | /* 148174 */ "VMOVDQU16Zrrk\000" |
| 58659 | /* 148188 */ "VCVT2PH2BF8Zrrk\000" |
| 58660 | /* 148204 */ "VCVTBIASPH2BF8Zrrk\000" |
| 58661 | /* 148223 */ "VCVTPH2BF8Zrrk\000" |
| 58662 | /* 148238 */ "VCVT2PH2HF8Zrrk\000" |
| 58663 | /* 148254 */ "VCVTBIASPH2HF8Zrrk\000" |
| 58664 | /* 148273 */ "VCVTPH2HF8Zrrk\000" |
| 58665 | /* 148288 */ "VMOVDQU8Zrrk\000" |
| 58666 | /* 148301 */ "VPERMI2BZrrk\000" |
| 58667 | /* 148314 */ "VPERMT2BZrrk\000" |
| 58668 | /* 148327 */ "VPSUBBZrrk\000" |
| 58669 | /* 148338 */ "VPADDBZrrk\000" |
| 58670 | /* 148349 */ "VPEXPANDBZrrk\000" |
| 58671 | /* 148363 */ "VPMOVUSDBZrrk\000" |
| 58672 | /* 148377 */ "VPMOVSDBZrrk\000" |
| 58673 | /* 148390 */ "VPMOVDBZrrk\000" |
| 58674 | /* 148402 */ "VPSHUFBZrrk\000" |
| 58675 | /* 148414 */ "VPAVGBZrrk\000" |
| 58676 | /* 148425 */ "VGF2P8MULBZrrk\000" |
| 58677 | /* 148440 */ "VPBLENDMBZrrk\000" |
| 58678 | /* 148454 */ "VPTESTNMBZrrk\000" |
| 58679 | /* 148468 */ "VPSHUFBITQMBZrrk\000" |
| 58680 | /* 148485 */ "VPERMBZrrk\000" |
| 58681 | /* 148496 */ "VPTESTMBZrrk\000" |
| 58682 | /* 148509 */ "VPCMPEQBZrrk\000" |
| 58683 | /* 148522 */ "VPMOVUSQBZrrk\000" |
| 58684 | /* 148536 */ "VPMOVSQBZrrk\000" |
| 58685 | /* 148549 */ "VPMULTISHIFTQBZrrk\000" |
| 58686 | /* 148568 */ "VPMOVQBZrrk\000" |
| 58687 | /* 148580 */ "VPABSBZrrk\000" |
| 58688 | /* 148591 */ "VPSUBSBZrrk\000" |
| 58689 | /* 148603 */ "VPADDSBZrrk\000" |
| 58690 | /* 148615 */ "VPMINSBZrrk\000" |
| 58691 | /* 148627 */ "VPCOMPRESSBZrrk\000" |
| 58692 | /* 148643 */ "VPSUBUSBZrrk\000" |
| 58693 | /* 148656 */ "VPADDUSBZrrk\000" |
| 58694 | /* 148669 */ "VPMAXSBZrrk\000" |
| 58695 | /* 148681 */ "VPCMPGTBZrrk\000" |
| 58696 | /* 148694 */ "VPOPCNTBZrrk\000" |
| 58697 | /* 148707 */ "VPBROADCASTBZrrk\000" |
| 58698 | /* 148724 */ "VPMINUBZrrk\000" |
| 58699 | /* 148736 */ "VPMAXUBZrrk\000" |
| 58700 | /* 148748 */ "VPACKSSWBZrrk\000" |
| 58701 | /* 148762 */ "VPACKUSWBZrrk\000" |
| 58702 | /* 148776 */ "VPMOVUSWBZrrk\000" |
| 58703 | /* 148790 */ "VPMOVSWBZrrk\000" |
| 58704 | /* 148803 */ "VPMOVWBZrrk\000" |
| 58705 | /* 148815 */ "VPERMI2DZrrk\000" |
| 58706 | /* 148828 */ "VPERMT2DZrrk\000" |
| 58707 | /* 148841 */ "VPSRADZrrk\000" |
| 58708 | /* 148852 */ "VPSUBDZrrk\000" |
| 58709 | /* 148863 */ "VPMOVSXBDZrrk\000" |
| 58710 | /* 148877 */ "VPMOVZXBDZrrk\000" |
| 58711 | /* 148891 */ "VPADDDZrrk\000" |
| 58712 | /* 148902 */ "VPANDDZrrk\000" |
| 58713 | /* 148913 */ "VPEXPANDDZrrk\000" |
| 58714 | /* 148927 */ "VPSLLDZrrk\000" |
| 58715 | /* 148938 */ "VPMULLDZrrk\000" |
| 58716 | /* 148950 */ "VPSRLDZrrk\000" |
| 58717 | /* 148961 */ "VPBLENDMDZrrk\000" |
| 58718 | /* 148975 */ "VPTESTNMDZrrk\000" |
| 58719 | /* 148989 */ "VPERMDZrrk\000" |
| 58720 | /* 149000 */ "VPTESTMDZrrk\000" |
| 58721 | /* 149013 */ "VPANDNDZrrk\000" |
| 58722 | /* 149025 */ "VCVTPH2PDZrrk\000" |
| 58723 | /* 149039 */ "VPERMI2PDZrrk\000" |
| 58724 | /* 149053 */ "VCVTDQ2PDZrrk\000" |
| 58725 | /* 149067 */ "VCVTUDQ2PDZrrk\000" |
| 58726 | /* 149082 */ "VCVTQQ2PDZrrk\000" |
| 58727 | /* 149096 */ "VCVTUQQ2PDZrrk\000" |
| 58728 | /* 149111 */ "VCVTPS2PDZrrk\000" |
| 58729 | /* 149125 */ "VPERMT2PDZrrk\000" |
| 58730 | /* 149139 */ "VMOVAPDZrrk\000" |
| 58731 | /* 149151 */ "VSUBPDZrrk\000" |
| 58732 | /* 149162 */ "VMINCPDZrrk\000" |
| 58733 | /* 149174 */ "VMAXCPDZrrk\000" |
| 58734 | /* 149186 */ "VADDPDZrrk\000" |
| 58735 | /* 149197 */ "VEXPANDPDZrrk\000" |
| 58736 | /* 149211 */ "VANDPDZrrk\000" |
| 58737 | /* 149222 */ "VSCALEFPDZrrk\000" |
| 58738 | /* 149236 */ "VUNPCKHPDZrrk\000" |
| 58739 | /* 149250 */ "VPERMILPDZrrk\000" |
| 58740 | /* 149264 */ "VUNPCKLPDZrrk\000" |
| 58741 | /* 149278 */ "VMULPDZrrk\000" |
| 58742 | /* 149289 */ "VBLENDMPDZrrk\000" |
| 58743 | /* 149303 */ "VPERMPDZrrk\000" |
| 58744 | /* 149315 */ "VANDNPDZrrk\000" |
| 58745 | /* 149327 */ "VMINPDZrrk\000" |
| 58746 | /* 149338 */ "VORPDZrrk\000" |
| 58747 | /* 149348 */ "VXORPDZrrk\000" |
| 58748 | /* 149359 */ "VCOMPRESSPDZrrk\000" |
| 58749 | /* 149375 */ "VMOVUPDZrrk\000" |
| 58750 | /* 149387 */ "VDIVPDZrrk\000" |
| 58751 | /* 149398 */ "VMAXPDZrrk\000" |
| 58752 | /* 149409 */ "VPCMPEQDZrrk\000" |
| 58753 | /* 149422 */ "VPMOVUSQDZrrk\000" |
| 58754 | /* 149436 */ "VPMOVSQDZrrk\000" |
| 58755 | /* 149449 */ "VPMOVQDZrrk\000" |
| 58756 | /* 149461 */ "VPORDZrrk\000" |
| 58757 | /* 149471 */ "VPXORDZrrk\000" |
| 58758 | /* 149482 */ "VRCP14SDZrrk\000" |
| 58759 | /* 149495 */ "VRSQRT14SDZrrk\000" |
| 58760 | /* 149510 */ "VPABSDZrrk\000" |
| 58761 | /* 149521 */ "VSCALEFSDZrrk\000" |
| 58762 | /* 149535 */ "VPMINSDZrrk\000" |
| 58763 | /* 149547 */ "VPCOMPRESSDZrrk\000" |
| 58764 | /* 149563 */ "VBROADCASTSDZrrk\000" |
| 58765 | /* 149580 */ "VMOVSDZrrk\000" |
| 58766 | /* 149591 */ "VPMAXSDZrrk\000" |
| 58767 | /* 149603 */ "VPCONFLICTDZrrk\000" |
| 58768 | /* 149619 */ "VPCMPGTDZrrk\000" |
| 58769 | /* 149632 */ "VPOPCNTDZrrk\000" |
| 58770 | /* 149645 */ "VPLZCNTDZrrk\000" |
| 58771 | /* 149658 */ "VPBROADCASTDZrrk\000" |
| 58772 | /* 149675 */ "VPMINUDZrrk\000" |
| 58773 | /* 149687 */ "VPMAXUDZrrk\000" |
| 58774 | /* 149699 */ "VPSRAVDZrrk\000" |
| 58775 | /* 149711 */ "VPSLLVDZrrk\000" |
| 58776 | /* 149723 */ "VPROLVDZrrk\000" |
| 58777 | /* 149735 */ "VPSRLVDZrrk\000" |
| 58778 | /* 149747 */ "VPRORVDZrrk\000" |
| 58779 | /* 149759 */ "VPMADDWDZrrk\000" |
| 58780 | /* 149772 */ "VPUNPCKHWDZrrk\000" |
| 58781 | /* 149787 */ "VPUNPCKLWDZrrk\000" |
| 58782 | /* 149802 */ "VPMOVSXWDZrrk\000" |
| 58783 | /* 149816 */ "VPMOVZXWDZrrk\000" |
| 58784 | /* 149830 */ "VCVTHF82PHZrrk\000" |
| 58785 | /* 149845 */ "VCVTPD2PHZrrk\000" |
| 58786 | /* 149859 */ "VCVTDQ2PHZrrk\000" |
| 58787 | /* 149873 */ "VCVTUDQ2PHZrrk\000" |
| 58788 | /* 149888 */ "VCVTQQ2PHZrrk\000" |
| 58789 | /* 149902 */ "VCVTUQQ2PHZrrk\000" |
| 58790 | /* 149917 */ "VCVTPS2PHZrrk\000" |
| 58791 | /* 149931 */ "VCVTW2PHZrrk\000" |
| 58792 | /* 149944 */ "VCVTUW2PHZrrk\000" |
| 58793 | /* 149958 */ "VSUBPHZrrk\000" |
| 58794 | /* 149969 */ "VFCMULCPHZrrk\000" |
| 58795 | /* 149983 */ "VFMULCPHZrrk\000" |
| 58796 | /* 149996 */ "VMINCPHZrrk\000" |
| 58797 | /* 150008 */ "VMAXCPHZrrk\000" |
| 58798 | /* 150020 */ "VADDPHZrrk\000" |
| 58799 | /* 150031 */ "VSCALEFPHZrrk\000" |
| 58800 | /* 150045 */ "VMULPHZrrk\000" |
| 58801 | /* 150056 */ "VMINPHZrrk\000" |
| 58802 | /* 150067 */ "VDIVPHZrrk\000" |
| 58803 | /* 150078 */ "VMAXPHZrrk\000" |
| 58804 | /* 150089 */ "VFCMULCSHZrrk\000" |
| 58805 | /* 150103 */ "VFMULCSHZrrk\000" |
| 58806 | /* 150116 */ "VSCALEFSHZrrk\000" |
| 58807 | /* 150130 */ "VRCPSHZrrk\000" |
| 58808 | /* 150141 */ "VRSQRTSHZrrk\000" |
| 58809 | /* 150154 */ "VMOVSHZrrk\000" |
| 58810 | /* 150165 */ "VMOVDDUPZrrk\000" |
| 58811 | /* 150178 */ "VMOVSHDUPZrrk\000" |
| 58812 | /* 150192 */ "VMOVSLDUPZrrk\000" |
| 58813 | /* 150206 */ "VPERMI2QZrrk\000" |
| 58814 | /* 150219 */ "VPERMT2QZrrk\000" |
| 58815 | /* 150232 */ "VPSRAQZrrk\000" |
| 58816 | /* 150243 */ "VPSUBQZrrk\000" |
| 58817 | /* 150254 */ "VPMOVSXBQZrrk\000" |
| 58818 | /* 150268 */ "VPMOVZXBQZrrk\000" |
| 58819 | /* 150282 */ "VCVTTPD2DQZrrk\000" |
| 58820 | /* 150297 */ "VCVTPD2DQZrrk\000" |
| 58821 | /* 150311 */ "VCVTTPH2DQZrrk\000" |
| 58822 | /* 150326 */ "VCVTPH2DQZrrk\000" |
| 58823 | /* 150340 */ "VCVTTPS2DQZrrk\000" |
| 58824 | /* 150355 */ "VCVTPS2DQZrrk\000" |
| 58825 | /* 150369 */ "VPADDQZrrk\000" |
| 58826 | /* 150380 */ "VPUNPCKHDQZrrk\000" |
| 58827 | /* 150395 */ "VPUNPCKLDQZrrk\000" |
| 58828 | /* 150410 */ "VPMULDQZrrk\000" |
| 58829 | /* 150422 */ "VPANDQZrrk\000" |
| 58830 | /* 150433 */ "VPEXPANDQZrrk\000" |
| 58831 | /* 150447 */ "VPUNPCKHQDQZrrk\000" |
| 58832 | /* 150463 */ "VPUNPCKLQDQZrrk\000" |
| 58833 | /* 150479 */ "VCVTTPD2UDQZrrk\000" |
| 58834 | /* 150495 */ "VCVTPD2UDQZrrk\000" |
| 58835 | /* 150510 */ "VCVTTPH2UDQZrrk\000" |
| 58836 | /* 150526 */ "VCVTPH2UDQZrrk\000" |
| 58837 | /* 150541 */ "VCVTTPS2UDQZrrk\000" |
| 58838 | /* 150557 */ "VCVTPS2UDQZrrk\000" |
| 58839 | /* 150572 */ "VPMULUDQZrrk\000" |
| 58840 | /* 150585 */ "VPMOVSXDQZrrk\000" |
| 58841 | /* 150599 */ "VPMOVZXDQZrrk\000" |
| 58842 | /* 150613 */ "VPSLLQZrrk\000" |
| 58843 | /* 150624 */ "VPMULLQZrrk\000" |
| 58844 | /* 150636 */ "VPSRLQZrrk\000" |
| 58845 | /* 150647 */ "VPBLENDMQZrrk\000" |
| 58846 | /* 150661 */ "VPTESTNMQZrrk\000" |
| 58847 | /* 150675 */ "VPERMQZrrk\000" |
| 58848 | /* 150686 */ "VPTESTMQZrrk\000" |
| 58849 | /* 150699 */ "VPANDNQZrrk\000" |
| 58850 | /* 150711 */ "VCVTTPD2QQZrrk\000" |
| 58851 | /* 150726 */ "VCVTPD2QQZrrk\000" |
| 58852 | /* 150740 */ "VCVTTPH2QQZrrk\000" |
| 58853 | /* 150755 */ "VCVTPH2QQZrrk\000" |
| 58854 | /* 150769 */ "VCVTTPS2QQZrrk\000" |
| 58855 | /* 150784 */ "VCVTPS2QQZrrk\000" |
| 58856 | /* 150798 */ "VPCMPEQQZrrk\000" |
| 58857 | /* 150811 */ "VCVTTPD2UQQZrrk\000" |
| 58858 | /* 150827 */ "VCVTPD2UQQZrrk\000" |
| 58859 | /* 150842 */ "VCVTTPH2UQQZrrk\000" |
| 58860 | /* 150858 */ "VCVTPH2UQQZrrk\000" |
| 58861 | /* 150873 */ "VCVTTPS2UQQZrrk\000" |
| 58862 | /* 150889 */ "VCVTPS2UQQZrrk\000" |
| 58863 | /* 150904 */ "VPORQZrrk\000" |
| 58864 | /* 150914 */ "VPXORQZrrk\000" |
| 58865 | /* 150925 */ "VPABSQZrrk\000" |
| 58866 | /* 150936 */ "VPMINSQZrrk\000" |
| 58867 | /* 150948 */ "VPCOMPRESSQZrrk\000" |
| 58868 | /* 150964 */ "VPMAXSQZrrk\000" |
| 58869 | /* 150976 */ "VPCONFLICTQZrrk\000" |
| 58870 | /* 150992 */ "VPCMPGTQZrrk\000" |
| 58871 | /* 151005 */ "VPOPCNTQZrrk\000" |
| 58872 | /* 151018 */ "VPLZCNTQZrrk\000" |
| 58873 | /* 151031 */ "VPBROADCASTQZrrk\000" |
| 58874 | /* 151048 */ "VPMINUQZrrk\000" |
| 58875 | /* 151060 */ "VPMAXUQZrrk\000" |
| 58876 | /* 151072 */ "VPSRAVQZrrk\000" |
| 58877 | /* 151084 */ "VPSLLVQZrrk\000" |
| 58878 | /* 151096 */ "VPROLVQZrrk\000" |
| 58879 | /* 151108 */ "VPSRLVQZrrk\000" |
| 58880 | /* 151120 */ "VPRORVQZrrk\000" |
| 58881 | /* 151132 */ "VPMOVSXWQZrrk\000" |
| 58882 | /* 151146 */ "VPMOVZXWQZrrk\000" |
| 58883 | /* 151160 */ "VCVT2PH2BF8SZrrk\000" |
| 58884 | /* 151177 */ "VCVTBIASPH2BF8SZrrk\000" |
| 58885 | /* 151197 */ "VCVTPH2BF8SZrrk\000" |
| 58886 | /* 151213 */ "VCVT2PH2HF8SZrrk\000" |
| 58887 | /* 151230 */ "VCVTBIASPH2HF8SZrrk\000" |
| 58888 | /* 151250 */ "VCVTPH2HF8SZrrk\000" |
| 58889 | /* 151266 */ "VCVTTBF162IBSZrrk\000" |
| 58890 | /* 151284 */ "VCVTBF162IBSZrrk\000" |
| 58891 | /* 151301 */ "VCVTTPH2IBSZrrk\000" |
| 58892 | /* 151317 */ "VCVTPH2IBSZrrk\000" |
| 58893 | /* 151332 */ "VCVTTPS2IBSZrrk\000" |
| 58894 | /* 151348 */ "VCVTPS2IBSZrrk\000" |
| 58895 | /* 151363 */ "VCVTTBF162IUBSZrrk\000" |
| 58896 | /* 151382 */ "VCVTBF162IUBSZrrk\000" |
| 58897 | /* 151400 */ "VCVTTPH2IUBSZrrk\000" |
| 58898 | /* 151417 */ "VCVTPH2IUBSZrrk\000" |
| 58899 | /* 151433 */ "VCVTTPS2IUBSZrrk\000" |
| 58900 | /* 151450 */ "VCVTPS2IUBSZrrk\000" |
| 58901 | /* 151466 */ "VCVTPD2PSZrrk\000" |
| 58902 | /* 151480 */ "VCVTPH2PSZrrk\000" |
| 58903 | /* 151494 */ "VPERMI2PSZrrk\000" |
| 58904 | /* 151508 */ "VCVTDQ2PSZrrk\000" |
| 58905 | /* 151522 */ "VCVTUDQ2PSZrrk\000" |
| 58906 | /* 151537 */ "VCVTQQ2PSZrrk\000" |
| 58907 | /* 151551 */ "VCVTUQQ2PSZrrk\000" |
| 58908 | /* 151566 */ "VPERMT2PSZrrk\000" |
| 58909 | /* 151580 */ "VMOVAPSZrrk\000" |
| 58910 | /* 151592 */ "VSUBPSZrrk\000" |
| 58911 | /* 151603 */ "VMINCPSZrrk\000" |
| 58912 | /* 151615 */ "VMAXCPSZrrk\000" |
| 58913 | /* 151627 */ "VADDPSZrrk\000" |
| 58914 | /* 151638 */ "VEXPANDPSZrrk\000" |
| 58915 | /* 151652 */ "VANDPSZrrk\000" |
| 58916 | /* 151663 */ "VSCALEFPSZrrk\000" |
| 58917 | /* 151677 */ "VUNPCKHPSZrrk\000" |
| 58918 | /* 151691 */ "VPERMILPSZrrk\000" |
| 58919 | /* 151705 */ "VUNPCKLPSZrrk\000" |
| 58920 | /* 151719 */ "VMULPSZrrk\000" |
| 58921 | /* 151730 */ "VBLENDMPSZrrk\000" |
| 58922 | /* 151744 */ "VPERMPSZrrk\000" |
| 58923 | /* 151756 */ "VANDNPSZrrk\000" |
| 58924 | /* 151768 */ "VMINPSZrrk\000" |
| 58925 | /* 151779 */ "VORPSZrrk\000" |
| 58926 | /* 151789 */ "VXORPSZrrk\000" |
| 58927 | /* 151800 */ "VCOMPRESSPSZrrk\000" |
| 58928 | /* 151816 */ "VMOVUPSZrrk\000" |
| 58929 | /* 151828 */ "VDIVPSZrrk\000" |
| 58930 | /* 151839 */ "VMAXPSZrrk\000" |
| 58931 | /* 151850 */ "VCVTTPD2DQSZrrk\000" |
| 58932 | /* 151866 */ "VCVTTPS2DQSZrrk\000" |
| 58933 | /* 151882 */ "VCVTTPD2UDQSZrrk\000" |
| 58934 | /* 151899 */ "VCVTTPS2UDQSZrrk\000" |
| 58935 | /* 151916 */ "VCVTTPD2QQSZrrk\000" |
| 58936 | /* 151932 */ "VCVTTPS2QQSZrrk\000" |
| 58937 | /* 151948 */ "VCVTTPD2UQQSZrrk\000" |
| 58938 | /* 151965 */ "VCVTTPS2UQQSZrrk\000" |
| 58939 | /* 151982 */ "VRCP14SSZrrk\000" |
| 58940 | /* 151995 */ "VRSQRT14SSZrrk\000" |
| 58941 | /* 152010 */ "VSCALEFSSZrrk\000" |
| 58942 | /* 152024 */ "VBROADCASTSSZrrk\000" |
| 58943 | /* 152041 */ "VMOVSSZrrk\000" |
| 58944 | /* 152052 */ "VCVTTPH2WZrrk\000" |
| 58945 | /* 152066 */ "VCVTPH2WZrrk\000" |
| 58946 | /* 152079 */ "VPERMI2WZrrk\000" |
| 58947 | /* 152092 */ "VPERMT2WZrrk\000" |
| 58948 | /* 152105 */ "VPSRAWZrrk\000" |
| 58949 | /* 152116 */ "VPUNPCKHBWZrrk\000" |
| 58950 | /* 152131 */ "VPUNPCKLBWZrrk\000" |
| 58951 | /* 152146 */ "VPSUBWZrrk\000" |
| 58952 | /* 152157 */ "VPMOVSXBWZrrk\000" |
| 58953 | /* 152171 */ "VPMOVZXBWZrrk\000" |
| 58954 | /* 152185 */ "VPADDWZrrk\000" |
| 58955 | /* 152196 */ "VPEXPANDWZrrk\000" |
| 58956 | /* 152210 */ "VPACKSSDWZrrk\000" |
| 58957 | /* 152224 */ "VPACKUSDWZrrk\000" |
| 58958 | /* 152238 */ "VPMOVUSDWZrrk\000" |
| 58959 | /* 152252 */ "VPMOVSDWZrrk\000" |
| 58960 | /* 152265 */ "VPMOVDWZrrk\000" |
| 58961 | /* 152277 */ "VPAVGWZrrk\000" |
| 58962 | /* 152288 */ "VPMULHWZrrk\000" |
| 58963 | /* 152300 */ "VPSLLWZrrk\000" |
| 58964 | /* 152311 */ "VPMULLWZrrk\000" |
| 58965 | /* 152323 */ "VPSRLWZrrk\000" |
| 58966 | /* 152334 */ "VPBLENDMWZrrk\000" |
| 58967 | /* 152348 */ "VPTESTNMWZrrk\000" |
| 58968 | /* 152362 */ "VPERMWZrrk\000" |
| 58969 | /* 152373 */ "VPTESTMWZrrk\000" |
| 58970 | /* 152386 */ "VPCMPEQWZrrk\000" |
| 58971 | /* 152399 */ "VPMOVUSQWZrrk\000" |
| 58972 | /* 152413 */ "VPMOVSQWZrrk\000" |
| 58973 | /* 152426 */ "VPMOVQWZrrk\000" |
| 58974 | /* 152438 */ "VPABSWZrrk\000" |
| 58975 | /* 152449 */ "VPMADDUBSWZrrk\000" |
| 58976 | /* 152464 */ "VPSUBSWZrrk\000" |
| 58977 | /* 152476 */ "VPADDSWZrrk\000" |
| 58978 | /* 152488 */ "VPMINSWZrrk\000" |
| 58979 | /* 152500 */ "VPMULHRSWZrrk\000" |
| 58980 | /* 152514 */ "VPCOMPRESSWZrrk\000" |
| 58981 | /* 152530 */ "VPSUBUSWZrrk\000" |
| 58982 | /* 152543 */ "VPADDUSWZrrk\000" |
| 58983 | /* 152556 */ "VPMAXSWZrrk\000" |
| 58984 | /* 152568 */ "VPCMPGTWZrrk\000" |
| 58985 | /* 152581 */ "VPOPCNTWZrrk\000" |
| 58986 | /* 152594 */ "VPBROADCASTWZrrk\000" |
| 58987 | /* 152611 */ "VCVTTPH2UWZrrk\000" |
| 58988 | /* 152626 */ "VCVTPH2UWZrrk\000" |
| 58989 | /* 152640 */ "VPMULHUWZrrk\000" |
| 58990 | /* 152653 */ "VPMINUWZrrk\000" |
| 58991 | /* 152665 */ "VPMAXUWZrrk\000" |
| 58992 | /* 152677 */ "VPSRAVWZrrk\000" |
| 58993 | /* 152689 */ "VPSLLVWZrrk\000" |
| 58994 | /* 152701 */ "VPSRLVWZrrk\000" |
| 58995 | /* 152713 */ "VCVT2PS2PHXZrrk\000" |
| 58996 | /* 152729 */ "VCVTPS2PHXZrrk\000" |
| 58997 | /* 152744 */ "VCVTPH2PSXZrrk\000" |
| 58998 | /* 152759 */ "VPBROADCASTBrZrrk\000" |
| 58999 | /* 152777 */ "VPBROADCASTDrZrrk\000" |
| 59000 | /* 152795 */ "VPBROADCASTQrZrrk\000" |
| 59001 | /* 152813 */ "VPBROADCASTWrZrrk\000" |
| 59002 | /* 152831 */ "TCRETURNri64_ImpCall\000" |
| 59003 | /* 152852 */ "CALL64r_ImpCall\000" |
| 59004 | /* 152868 */ "LD_F80m\000" |
| 59005 | /* 152876 */ "ST_FP80m\000" |
| 59006 | /* 152885 */ "ST_FpP80m\000" |
| 59007 | /* 152895 */ "LD_Fp80m\000" |
| 59008 | /* 152904 */ "LOCK_DEC32m\000" |
| 59009 | /* 152916 */ "LOCK_INC32m\000" |
| 59010 | /* 152928 */ "LOCK_BTC32m\000" |
| 59011 | /* 152940 */ "SUB_F32m\000" |
| 59012 | /* 152949 */ "ADD_F32m\000" |
| 59013 | /* 152958 */ "ILD_F32m\000" |
| 59014 | /* 152967 */ "MUL_F32m\000" |
| 59015 | /* 152976 */ "SUBR_F32m\000" |
| 59016 | /* 152986 */ "DIVR_F32m\000" |
| 59017 | /* 152996 */ "IST_F32m\000" |
| 59018 | /* 153005 */ "DIV_F32m\000" |
| 59019 | /* 153014 */ "NEG32m\000" |
| 59020 | /* 153021 */ "SUB_FI32m\000" |
| 59021 | /* 153031 */ "ADD_FI32m\000" |
| 59022 | /* 153041 */ "MUL_FI32m\000" |
| 59023 | /* 153051 */ "SUBR_FI32m\000" |
| 59024 | /* 153062 */ "DIVR_FI32m\000" |
| 59025 | /* 153073 */ "DIV_FI32m\000" |
| 59026 | /* 153083 */ "FARCALL32m\000" |
| 59027 | /* 153094 */ "IMUL32m\000" |
| 59028 | /* 153102 */ "FCOM32m\000" |
| 59029 | /* 153110 */ "FICOM32m\000" |
| 59030 | /* 153119 */ "IST_FP32m\000" |
| 59031 | /* 153129 */ "ISTT_FP32m\000" |
| 59032 | /* 153140 */ "FARJMP32m\000" |
| 59033 | /* 153150 */ "FCOMP32m\000" |
| 59034 | /* 153159 */ "FICOMP32m\000" |
| 59035 | /* 153169 */ "ST_FpP32m\000" |
| 59036 | /* 153179 */ "LOCK_BTR32m\000" |
| 59037 | /* 153191 */ "LOCK_BTS32m\000" |
| 59038 | /* 153203 */ "LGDT32m\000" |
| 59039 | /* 153211 */ "SGDT32m\000" |
| 59040 | /* 153219 */ "LIDT32m\000" |
| 59041 | /* 153227 */ "SIDT32m\000" |
| 59042 | /* 153235 */ "NOT32m\000" |
| 59043 | /* 153242 */ "IDIV32m\000" |
| 59044 | /* 153250 */ "SUB_Fp32m\000" |
| 59045 | /* 153260 */ "ADD_Fp32m\000" |
| 59046 | /* 153270 */ "LD_Fp32m\000" |
| 59047 | /* 153279 */ "MUL_Fp32m\000" |
| 59048 | /* 153289 */ "SUBR_Fp32m\000" |
| 59049 | /* 153300 */ "DIVR_Fp32m\000" |
| 59050 | /* 153311 */ "ST_Fp32m\000" |
| 59051 | /* 153320 */ "DIV_Fp32m\000" |
| 59052 | /* 153330 */ "LOCK_DEC64m\000" |
| 59053 | /* 153342 */ "LOCK_INC64m\000" |
| 59054 | /* 153354 */ "LOCK_BTC64m\000" |
| 59055 | /* 153366 */ "PTWRITE64m\000" |
| 59056 | /* 153377 */ "SUB_F64m\000" |
| 59057 | /* 153386 */ "ADD_F64m\000" |
| 59058 | /* 153395 */ "ILD_F64m\000" |
| 59059 | /* 153404 */ "MUL_F64m\000" |
| 59060 | /* 153413 */ "SUBR_F64m\000" |
| 59061 | /* 153423 */ "DIVR_F64m\000" |
| 59062 | /* 153433 */ "ST_F64m\000" |
| 59063 | /* 153441 */ "DIV_F64m\000" |
| 59064 | /* 153450 */ "NEG64m\000" |
| 59065 | /* 153457 */ "FARCALL64m\000" |
| 59066 | /* 153468 */ "IMUL64m\000" |
| 59067 | /* 153476 */ "FCOM64m\000" |
| 59068 | /* 153484 */ "IST_FP64m\000" |
| 59069 | /* 153494 */ "ISTT_FP64m\000" |
| 59070 | /* 153505 */ "FARJMP64m\000" |
| 59071 | /* 153515 */ "FCOMP64m\000" |
| 59072 | /* 153524 */ "ST_FpP64m\000" |
| 59073 | /* 153534 */ "LOCK_BTR64m\000" |
| 59074 | /* 153546 */ "LOCK_BTS64m\000" |
| 59075 | /* 153558 */ "LGDT64m\000" |
| 59076 | /* 153566 */ "SGDT64m\000" |
| 59077 | /* 153574 */ "LIDT64m\000" |
| 59078 | /* 153582 */ "SIDT64m\000" |
| 59079 | /* 153590 */ "NOT64m\000" |
| 59080 | /* 153597 */ "IDIV64m\000" |
| 59081 | /* 153605 */ "SUB_Fp64m\000" |
| 59082 | /* 153615 */ "ADD_Fp64m\000" |
| 59083 | /* 153625 */ "LD_Fp64m\000" |
| 59084 | /* 153634 */ "MUL_Fp64m\000" |
| 59085 | /* 153644 */ "SUBR_Fp64m\000" |
| 59086 | /* 153655 */ "DIVR_Fp64m\000" |
| 59087 | /* 153666 */ "ST_Fp64m\000" |
| 59088 | /* 153675 */ "DIV_Fp64m\000" |
| 59089 | /* 153685 */ "LOCK_DEC16m\000" |
| 59090 | /* 153697 */ "LOCK_INC16m\000" |
| 59091 | /* 153709 */ "LOCK_BTC16m\000" |
| 59092 | /* 153721 */ "ILD_F16m\000" |
| 59093 | /* 153730 */ "IST_F16m\000" |
| 59094 | /* 153739 */ "NEG16m\000" |
| 59095 | /* 153746 */ "SUB_FI16m\000" |
| 59096 | /* 153756 */ "ADD_FI16m\000" |
| 59097 | /* 153766 */ "MUL_FI16m\000" |
| 59098 | /* 153776 */ "SUBR_FI16m\000" |
| 59099 | /* 153787 */ "DIVR_FI16m\000" |
| 59100 | /* 153798 */ "DIV_FI16m\000" |
| 59101 | /* 153808 */ "FARCALL16m\000" |
| 59102 | /* 153819 */ "IMUL16m\000" |
| 59103 | /* 153827 */ "FICOM16m\000" |
| 59104 | /* 153836 */ "IST_FP16m\000" |
| 59105 | /* 153846 */ "ISTT_FP16m\000" |
| 59106 | /* 153857 */ "FARJMP16m\000" |
| 59107 | /* 153867 */ "FICOMP16m\000" |
| 59108 | /* 153877 */ "LOCK_BTR16m\000" |
| 59109 | /* 153889 */ "LKGS16m\000" |
| 59110 | /* 153897 */ "LOCK_BTS16m\000" |
| 59111 | /* 153909 */ "LGDT16m\000" |
| 59112 | /* 153917 */ "SGDT16m\000" |
| 59113 | /* 153925 */ "LIDT16m\000" |
| 59114 | /* 153933 */ "SIDT16m\000" |
| 59115 | /* 153941 */ "LLDT16m\000" |
| 59116 | /* 153949 */ "SLDT16m\000" |
| 59117 | /* 153957 */ "NOT16m\000" |
| 59118 | /* 153964 */ "IDIV16m\000" |
| 59119 | /* 153972 */ "FLDCW16m\000" |
| 59120 | /* 153981 */ "FNSTCW16m\000" |
| 59121 | /* 153991 */ "LMSW16m\000" |
| 59122 | /* 153999 */ "SMSW16m\000" |
| 59123 | /* 154007 */ "VFMSUB231BF16Z256m\000" |
| 59124 | /* 154026 */ "VFNMSUB231BF16Z256m\000" |
| 59125 | /* 154046 */ "VFMADD231BF16Z256m\000" |
| 59126 | /* 154065 */ "VFNMADD231BF16Z256m\000" |
| 59127 | /* 154085 */ "VFMSUB132BF16Z256m\000" |
| 59128 | /* 154104 */ "VFNMSUB132BF16Z256m\000" |
| 59129 | /* 154124 */ "VFMADD132BF16Z256m\000" |
| 59130 | /* 154143 */ "VFNMADD132BF16Z256m\000" |
| 59131 | /* 154163 */ "VFMSUB213BF16Z256m\000" |
| 59132 | /* 154182 */ "VFNMSUB213BF16Z256m\000" |
| 59133 | /* 154202 */ "VFMADD213BF16Z256m\000" |
| 59134 | /* 154221 */ "VFNMADD213BF16Z256m\000" |
| 59135 | /* 154241 */ "VRCPBF16Z256m\000" |
| 59136 | /* 154255 */ "VGETEXPBF16Z256m\000" |
| 59137 | /* 154272 */ "VRSQRTBF16Z256m\000" |
| 59138 | /* 154288 */ "VSQRTBF16Z256m\000" |
| 59139 | /* 154303 */ "VMOVRSBZ256m\000" |
| 59140 | /* 154316 */ "VFMADDSUB231PDZ256m\000" |
| 59141 | /* 154336 */ "VFMSUB231PDZ256m\000" |
| 59142 | /* 154353 */ "VFNMSUB231PDZ256m\000" |
| 59143 | /* 154371 */ "VFMSUBADD231PDZ256m\000" |
| 59144 | /* 154391 */ "VFMADD231PDZ256m\000" |
| 59145 | /* 154408 */ "VFNMADD231PDZ256m\000" |
| 59146 | /* 154426 */ "VFMADDSUB132PDZ256m\000" |
| 59147 | /* 154446 */ "VFMSUB132PDZ256m\000" |
| 59148 | /* 154463 */ "VFNMSUB132PDZ256m\000" |
| 59149 | /* 154481 */ "VFMSUBADD132PDZ256m\000" |
| 59150 | /* 154501 */ "VFMADD132PDZ256m\000" |
| 59151 | /* 154518 */ "VFNMADD132PDZ256m\000" |
| 59152 | /* 154536 */ "VFMADDSUB213PDZ256m\000" |
| 59153 | /* 154556 */ "VFMSUB213PDZ256m\000" |
| 59154 | /* 154573 */ "VFNMSUB213PDZ256m\000" |
| 59155 | /* 154591 */ "VFMSUBADD213PDZ256m\000" |
| 59156 | /* 154611 */ "VFMADD213PDZ256m\000" |
| 59157 | /* 154628 */ "VFNMADD213PDZ256m\000" |
| 59158 | /* 154646 */ "VRCP14PDZ256m\000" |
| 59159 | /* 154660 */ "VRSQRT14PDZ256m\000" |
| 59160 | /* 154676 */ "VGETEXPPDZ256m\000" |
| 59161 | /* 154691 */ "VSQRTPDZ256m\000" |
| 59162 | /* 154704 */ "VMOVRSDZ256m\000" |
| 59163 | /* 154717 */ "VPDPBSSDZ256m\000" |
| 59164 | /* 154731 */ "VPDPWSSDZ256m\000" |
| 59165 | /* 154745 */ "VPDPBUSDZ256m\000" |
| 59166 | /* 154759 */ "VPDPWUSDZ256m\000" |
| 59167 | /* 154773 */ "VPDPBSUDZ256m\000" |
| 59168 | /* 154787 */ "VPDPWSUDZ256m\000" |
| 59169 | /* 154801 */ "VPDPBUUDZ256m\000" |
| 59170 | /* 154815 */ "VPDPWUUDZ256m\000" |
| 59171 | /* 154829 */ "VPSHLDVDZ256m\000" |
| 59172 | /* 154843 */ "VPSHRDVDZ256m\000" |
| 59173 | /* 154857 */ "VFMADDSUB231PHZ256m\000" |
| 59174 | /* 154877 */ "VFMSUB231PHZ256m\000" |
| 59175 | /* 154894 */ "VFNMSUB231PHZ256m\000" |
| 59176 | /* 154912 */ "VFMSUBADD231PHZ256m\000" |
| 59177 | /* 154932 */ "VFMADD231PHZ256m\000" |
| 59178 | /* 154949 */ "VFNMADD231PHZ256m\000" |
| 59179 | /* 154967 */ "VFMADDSUB132PHZ256m\000" |
| 59180 | /* 154987 */ "VFMSUB132PHZ256m\000" |
| 59181 | /* 155004 */ "VFNMSUB132PHZ256m\000" |
| 59182 | /* 155022 */ "VFMSUBADD132PHZ256m\000" |
| 59183 | /* 155042 */ "VFMADD132PHZ256m\000" |
| 59184 | /* 155059 */ "VFNMADD132PHZ256m\000" |
| 59185 | /* 155077 */ "VFMADDSUB213PHZ256m\000" |
| 59186 | /* 155097 */ "VFMSUB213PHZ256m\000" |
| 59187 | /* 155114 */ "VFNMSUB213PHZ256m\000" |
| 59188 | /* 155132 */ "VFMSUBADD213PHZ256m\000" |
| 59189 | /* 155152 */ "VFMADD213PHZ256m\000" |
| 59190 | /* 155169 */ "VFNMADD213PHZ256m\000" |
| 59191 | /* 155187 */ "VFCMADDCPHZ256m\000" |
| 59192 | /* 155203 */ "VFMADDCPHZ256m\000" |
| 59193 | /* 155218 */ "VRCPPHZ256m\000" |
| 59194 | /* 155230 */ "VGETEXPPHZ256m\000" |
| 59195 | /* 155245 */ "VRSQRTPHZ256m\000" |
| 59196 | /* 155259 */ "VSQRTPHZ256m\000" |
| 59197 | /* 155272 */ "VMOVRSQZ256m\000" |
| 59198 | /* 155285 */ "VPMADD52HUQZ256m\000" |
| 59199 | /* 155302 */ "VPMADD52LUQZ256m\000" |
| 59200 | /* 155319 */ "VPSHLDVQZ256m\000" |
| 59201 | /* 155333 */ "VPSHRDVQZ256m\000" |
| 59202 | /* 155347 */ "VPDPBSSDSZ256m\000" |
| 59203 | /* 155362 */ "VPDPWSSDSZ256m\000" |
| 59204 | /* 155377 */ "VPDPBUSDSZ256m\000" |
| 59205 | /* 155392 */ "VPDPWUSDSZ256m\000" |
| 59206 | /* 155407 */ "VPDPBSUDSZ256m\000" |
| 59207 | /* 155422 */ "VPDPWSUDSZ256m\000" |
| 59208 | /* 155437 */ "VPDPBUUDSZ256m\000" |
| 59209 | /* 155452 */ "VPDPWUUDSZ256m\000" |
| 59210 | /* 155467 */ "VFMADDSUB231PSZ256m\000" |
| 59211 | /* 155487 */ "VFMSUB231PSZ256m\000" |
| 59212 | /* 155504 */ "VFNMSUB231PSZ256m\000" |
| 59213 | /* 155522 */ "VFMSUBADD231PSZ256m\000" |
| 59214 | /* 155542 */ "VFMADD231PSZ256m\000" |
| 59215 | /* 155559 */ "VFNMADD231PSZ256m\000" |
| 59216 | /* 155577 */ "VFMADDSUB132PSZ256m\000" |
| 59217 | /* 155597 */ "VFMSUB132PSZ256m\000" |
| 59218 | /* 155614 */ "VFNMSUB132PSZ256m\000" |
| 59219 | /* 155632 */ "VFMSUBADD132PSZ256m\000" |
| 59220 | /* 155652 */ "VFMADD132PSZ256m\000" |
| 59221 | /* 155669 */ "VFNMADD132PSZ256m\000" |
| 59222 | /* 155687 */ "VFMADDSUB213PSZ256m\000" |
| 59223 | /* 155707 */ "VFMSUB213PSZ256m\000" |
| 59224 | /* 155724 */ "VFNMSUB213PSZ256m\000" |
| 59225 | /* 155742 */ "VFMSUBADD213PSZ256m\000" |
| 59226 | /* 155762 */ "VFMADD213PSZ256m\000" |
| 59227 | /* 155779 */ "VFNMADD213PSZ256m\000" |
| 59228 | /* 155797 */ "VRCP14PSZ256m\000" |
| 59229 | /* 155811 */ "VRSQRT14PSZ256m\000" |
| 59230 | /* 155827 */ "VDPBF16PSZ256m\000" |
| 59231 | /* 155842 */ "VDPPHPSZ256m\000" |
| 59232 | /* 155855 */ "VGETEXPPSZ256m\000" |
| 59233 | /* 155870 */ "VSQRTPSZ256m\000" |
| 59234 | /* 155883 */ "VMOVRSWZ256m\000" |
| 59235 | /* 155896 */ "VPSHLDVWZ256m\000" |
| 59236 | /* 155910 */ "VPSHRDVWZ256m\000" |
| 59237 | /* 155924 */ "VFMSUB231BF16Z128m\000" |
| 59238 | /* 155943 */ "VFNMSUB231BF16Z128m\000" |
| 59239 | /* 155963 */ "VFMADD231BF16Z128m\000" |
| 59240 | /* 155982 */ "VFNMADD231BF16Z128m\000" |
| 59241 | /* 156002 */ "VFMSUB132BF16Z128m\000" |
| 59242 | /* 156021 */ "VFNMSUB132BF16Z128m\000" |
| 59243 | /* 156041 */ "VFMADD132BF16Z128m\000" |
| 59244 | /* 156060 */ "VFNMADD132BF16Z128m\000" |
| 59245 | /* 156080 */ "VFMSUB213BF16Z128m\000" |
| 59246 | /* 156099 */ "VFNMSUB213BF16Z128m\000" |
| 59247 | /* 156119 */ "VFMADD213BF16Z128m\000" |
| 59248 | /* 156138 */ "VFNMADD213BF16Z128m\000" |
| 59249 | /* 156158 */ "VRCPBF16Z128m\000" |
| 59250 | /* 156172 */ "VGETEXPBF16Z128m\000" |
| 59251 | /* 156189 */ "VRSQRTBF16Z128m\000" |
| 59252 | /* 156205 */ "VSQRTBF16Z128m\000" |
| 59253 | /* 156220 */ "VMOVRSBZ128m\000" |
| 59254 | /* 156233 */ "VFMADDSUB231PDZ128m\000" |
| 59255 | /* 156253 */ "VFMSUB231PDZ128m\000" |
| 59256 | /* 156270 */ "VFNMSUB231PDZ128m\000" |
| 59257 | /* 156288 */ "VFMSUBADD231PDZ128m\000" |
| 59258 | /* 156308 */ "VFMADD231PDZ128m\000" |
| 59259 | /* 156325 */ "VFNMADD231PDZ128m\000" |
| 59260 | /* 156343 */ "VFMADDSUB132PDZ128m\000" |
| 59261 | /* 156363 */ "VFMSUB132PDZ128m\000" |
| 59262 | /* 156380 */ "VFNMSUB132PDZ128m\000" |
| 59263 | /* 156398 */ "VFMSUBADD132PDZ128m\000" |
| 59264 | /* 156418 */ "VFMADD132PDZ128m\000" |
| 59265 | /* 156435 */ "VFNMADD132PDZ128m\000" |
| 59266 | /* 156453 */ "VFMADDSUB213PDZ128m\000" |
| 59267 | /* 156473 */ "VFMSUB213PDZ128m\000" |
| 59268 | /* 156490 */ "VFNMSUB213PDZ128m\000" |
| 59269 | /* 156508 */ "VFMSUBADD213PDZ128m\000" |
| 59270 | /* 156528 */ "VFMADD213PDZ128m\000" |
| 59271 | /* 156545 */ "VFNMADD213PDZ128m\000" |
| 59272 | /* 156563 */ "VRCP14PDZ128m\000" |
| 59273 | /* 156577 */ "VRSQRT14PDZ128m\000" |
| 59274 | /* 156593 */ "VGETEXPPDZ128m\000" |
| 59275 | /* 156608 */ "VSQRTPDZ128m\000" |
| 59276 | /* 156621 */ "VMOVRSDZ128m\000" |
| 59277 | /* 156634 */ "VPDPBSSDZ128m\000" |
| 59278 | /* 156648 */ "VPDPWSSDZ128m\000" |
| 59279 | /* 156662 */ "VPDPBUSDZ128m\000" |
| 59280 | /* 156676 */ "VPDPWUSDZ128m\000" |
| 59281 | /* 156690 */ "VPDPBSUDZ128m\000" |
| 59282 | /* 156704 */ "VPDPWSUDZ128m\000" |
| 59283 | /* 156718 */ "VPDPBUUDZ128m\000" |
| 59284 | /* 156732 */ "VPDPWUUDZ128m\000" |
| 59285 | /* 156746 */ "VPSHLDVDZ128m\000" |
| 59286 | /* 156760 */ "VPSHRDVDZ128m\000" |
| 59287 | /* 156774 */ "VFMADDSUB231PHZ128m\000" |
| 59288 | /* 156794 */ "VFMSUB231PHZ128m\000" |
| 59289 | /* 156811 */ "VFNMSUB231PHZ128m\000" |
| 59290 | /* 156829 */ "VFMSUBADD231PHZ128m\000" |
| 59291 | /* 156849 */ "VFMADD231PHZ128m\000" |
| 59292 | /* 156866 */ "VFNMADD231PHZ128m\000" |
| 59293 | /* 156884 */ "VFMADDSUB132PHZ128m\000" |
| 59294 | /* 156904 */ "VFMSUB132PHZ128m\000" |
| 59295 | /* 156921 */ "VFNMSUB132PHZ128m\000" |
| 59296 | /* 156939 */ "VFMSUBADD132PHZ128m\000" |
| 59297 | /* 156959 */ "VFMADD132PHZ128m\000" |
| 59298 | /* 156976 */ "VFNMADD132PHZ128m\000" |
| 59299 | /* 156994 */ "VFMADDSUB213PHZ128m\000" |
| 59300 | /* 157014 */ "VFMSUB213PHZ128m\000" |
| 59301 | /* 157031 */ "VFNMSUB213PHZ128m\000" |
| 59302 | /* 157049 */ "VFMSUBADD213PHZ128m\000" |
| 59303 | /* 157069 */ "VFMADD213PHZ128m\000" |
| 59304 | /* 157086 */ "VFNMADD213PHZ128m\000" |
| 59305 | /* 157104 */ "VFCMADDCPHZ128m\000" |
| 59306 | /* 157120 */ "VFMADDCPHZ128m\000" |
| 59307 | /* 157135 */ "VRCPPHZ128m\000" |
| 59308 | /* 157147 */ "VGETEXPPHZ128m\000" |
| 59309 | /* 157162 */ "VRSQRTPHZ128m\000" |
| 59310 | /* 157176 */ "VSQRTPHZ128m\000" |
| 59311 | /* 157189 */ "VMOVRSQZ128m\000" |
| 59312 | /* 157202 */ "VPMADD52HUQZ128m\000" |
| 59313 | /* 157219 */ "VPMADD52LUQZ128m\000" |
| 59314 | /* 157236 */ "VPSHLDVQZ128m\000" |
| 59315 | /* 157250 */ "VPSHRDVQZ128m\000" |
| 59316 | /* 157264 */ "VPDPBSSDSZ128m\000" |
| 59317 | /* 157279 */ "VPDPWSSDSZ128m\000" |
| 59318 | /* 157294 */ "VPDPBUSDSZ128m\000" |
| 59319 | /* 157309 */ "VPDPWUSDSZ128m\000" |
| 59320 | /* 157324 */ "VPDPBSUDSZ128m\000" |
| 59321 | /* 157339 */ "VPDPWSUDSZ128m\000" |
| 59322 | /* 157354 */ "VPDPBUUDSZ128m\000" |
| 59323 | /* 157369 */ "VPDPWUUDSZ128m\000" |
| 59324 | /* 157384 */ "VFMADDSUB231PSZ128m\000" |
| 59325 | /* 157404 */ "VFMSUB231PSZ128m\000" |
| 59326 | /* 157421 */ "VFNMSUB231PSZ128m\000" |
| 59327 | /* 157439 */ "VFMSUBADD231PSZ128m\000" |
| 59328 | /* 157459 */ "VFMADD231PSZ128m\000" |
| 59329 | /* 157476 */ "VFNMADD231PSZ128m\000" |
| 59330 | /* 157494 */ "VFMADDSUB132PSZ128m\000" |
| 59331 | /* 157514 */ "VFMSUB132PSZ128m\000" |
| 59332 | /* 157531 */ "VFNMSUB132PSZ128m\000" |
| 59333 | /* 157549 */ "VFMSUBADD132PSZ128m\000" |
| 59334 | /* 157569 */ "VFMADD132PSZ128m\000" |
| 59335 | /* 157586 */ "VFNMADD132PSZ128m\000" |
| 59336 | /* 157604 */ "VFMADDSUB213PSZ128m\000" |
| 59337 | /* 157624 */ "VFMSUB213PSZ128m\000" |
| 59338 | /* 157641 */ "VFNMSUB213PSZ128m\000" |
| 59339 | /* 157659 */ "VFMSUBADD213PSZ128m\000" |
| 59340 | /* 157679 */ "VFMADD213PSZ128m\000" |
| 59341 | /* 157696 */ "VFNMADD213PSZ128m\000" |
| 59342 | /* 157714 */ "VRCP14PSZ128m\000" |
| 59343 | /* 157728 */ "VRSQRT14PSZ128m\000" |
| 59344 | /* 157744 */ "VDPBF16PSZ128m\000" |
| 59345 | /* 157759 */ "VDPPHPSZ128m\000" |
| 59346 | /* 157772 */ "VGETEXPPSZ128m\000" |
| 59347 | /* 157787 */ "VSQRTPSZ128m\000" |
| 59348 | /* 157800 */ "VMOVRSWZ128m\000" |
| 59349 | /* 157813 */ "VPSHLDVWZ128m\000" |
| 59350 | /* 157827 */ "VPSHRDVWZ128m\000" |
| 59351 | /* 157841 */ "LOCK_DEC8m\000" |
| 59352 | /* 157852 */ "LOCK_INC8m\000" |
| 59353 | /* 157863 */ "NEG8m\000" |
| 59354 | /* 157869 */ "IMUL8m\000" |
| 59355 | /* 157876 */ "NOT8m\000" |
| 59356 | /* 157882 */ "IDIV8m\000" |
| 59357 | /* 157889 */ "SETCCm\000" |
| 59358 | /* 157896 */ "SETZUCCm\000" |
| 59359 | /* 157905 */ "FBLDm\000" |
| 59360 | /* 157911 */ "VMPTRLDm\000" |
| 59361 | /* 157920 */ "VFMADDSUB231PDm\000" |
| 59362 | /* 157936 */ "VFMSUB231PDm\000" |
| 59363 | /* 157949 */ "VFNMSUB231PDm\000" |
| 59364 | /* 157963 */ "VFMSUBADD231PDm\000" |
| 59365 | /* 157979 */ "VFMADD231PDm\000" |
| 59366 | /* 157992 */ "VFNMADD231PDm\000" |
| 59367 | /* 158006 */ "VFMADDSUB132PDm\000" |
| 59368 | /* 158022 */ "VFMSUB132PDm\000" |
| 59369 | /* 158035 */ "VFNMSUB132PDm\000" |
| 59370 | /* 158049 */ "VFMSUBADD132PDm\000" |
| 59371 | /* 158065 */ "VFMADD132PDm\000" |
| 59372 | /* 158078 */ "VFNMADD132PDm\000" |
| 59373 | /* 158092 */ "VFMADDSUB213PDm\000" |
| 59374 | /* 158108 */ "VFMSUB213PDm\000" |
| 59375 | /* 158121 */ "VFNMSUB213PDm\000" |
| 59376 | /* 158135 */ "VFMSUBADD213PDm\000" |
| 59377 | /* 158151 */ "VFMADD213PDm\000" |
| 59378 | /* 158164 */ "VFNMADD213PDm\000" |
| 59379 | /* 158178 */ "VGATHERPF0DPDm\000" |
| 59380 | /* 158193 */ "VSCATTERPF0DPDm\000" |
| 59381 | /* 158209 */ "VGATHERPF1DPDm\000" |
| 59382 | /* 158224 */ "VSCATTERPF1DPDm\000" |
| 59383 | /* 158240 */ "VGATHERPF0QPDm\000" |
| 59384 | /* 158255 */ "VSCATTERPF0QPDm\000" |
| 59385 | /* 158271 */ "VGATHERPF1QPDm\000" |
| 59386 | /* 158286 */ "VSCATTERPF1QPDm\000" |
| 59387 | /* 158302 */ "VSQRTPDm\000" |
| 59388 | /* 158311 */ "VFMSUB231SDm\000" |
| 59389 | /* 158324 */ "VFNMSUB231SDm\000" |
| 59390 | /* 158338 */ "VFMADD231SDm\000" |
| 59391 | /* 158351 */ "VFNMADD231SDm\000" |
| 59392 | /* 158365 */ "VFMSUB132SDm\000" |
| 59393 | /* 158378 */ "VFNMSUB132SDm\000" |
| 59394 | /* 158392 */ "VFMADD132SDm\000" |
| 59395 | /* 158405 */ "VFNMADD132SDm\000" |
| 59396 | /* 158419 */ "VFMSUB213SDm\000" |
| 59397 | /* 158432 */ "VFNMSUB213SDm\000" |
| 59398 | /* 158446 */ "VFMADD213SDm\000" |
| 59399 | /* 158459 */ "VFNMADD213SDm\000" |
| 59400 | /* 158473 */ "VSQRTSDm\000" |
| 59401 | /* 158482 */ "PTWRITEm\000" |
| 59402 | /* 158491 */ "FSAVEm\000" |
| 59403 | /* 158498 */ "UD1Lm\000" |
| 59404 | /* 158504 */ "TAILJMPm\000" |
| 59405 | /* 158513 */ "FBSTPm\000" |
| 59406 | /* 158520 */ "UD1Qm\000" |
| 59407 | /* 158526 */ "VMCLEARm\000" |
| 59408 | /* 158535 */ "FRSTORm\000" |
| 59409 | /* 158543 */ "VERRm\000" |
| 59410 | /* 158549 */ "LTRm\000" |
| 59411 | /* 158554 */ "STRm\000" |
| 59412 | /* 158559 */ "VFMADDSUB231PSm\000" |
| 59413 | /* 158575 */ "VFMSUB231PSm\000" |
| 59414 | /* 158588 */ "VFNMSUB231PSm\000" |
| 59415 | /* 158602 */ "VFMSUBADD231PSm\000" |
| 59416 | /* 158618 */ "VFMADD231PSm\000" |
| 59417 | /* 158631 */ "VFNMADD231PSm\000" |
| 59418 | /* 158645 */ "VFMADDSUB132PSm\000" |
| 59419 | /* 158661 */ "VFMSUB132PSm\000" |
| 59420 | /* 158674 */ "VFNMSUB132PSm\000" |
| 59421 | /* 158688 */ "VFMSUBADD132PSm\000" |
| 59422 | /* 158704 */ "VFMADD132PSm\000" |
| 59423 | /* 158717 */ "VFNMADD132PSm\000" |
| 59424 | /* 158731 */ "VFMADDSUB213PSm\000" |
| 59425 | /* 158747 */ "VFMSUB213PSm\000" |
| 59426 | /* 158760 */ "VFNMSUB213PSm\000" |
| 59427 | /* 158774 */ "VFMSUBADD213PSm\000" |
| 59428 | /* 158790 */ "VFMADD213PSm\000" |
| 59429 | /* 158803 */ "VFNMADD213PSm\000" |
| 59430 | /* 158817 */ "VGATHERPF0DPSm\000" |
| 59431 | /* 158832 */ "VSCATTERPF0DPSm\000" |
| 59432 | /* 158848 */ "VGATHERPF1DPSm\000" |
| 59433 | /* 158863 */ "VSCATTERPF1DPSm\000" |
| 59434 | /* 158879 */ "VRCPPSm\000" |
| 59435 | /* 158887 */ "VGATHERPF0QPSm\000" |
| 59436 | /* 158902 */ "VSCATTERPF0QPSm\000" |
| 59437 | /* 158918 */ "VGATHERPF1QPSm\000" |
| 59438 | /* 158933 */ "VSCATTERPF1QPSm\000" |
| 59439 | /* 158949 */ "VRSQRTPSm\000" |
| 59440 | /* 158959 */ "VSQRTPSm\000" |
| 59441 | /* 158968 */ "VFMSUB231SSm\000" |
| 59442 | /* 158981 */ "VFNMSUB231SSm\000" |
| 59443 | /* 158995 */ "VFMADD231SSm\000" |
| 59444 | /* 159008 */ "VFNMADD231SSm\000" |
| 59445 | /* 159022 */ "VFMSUB132SSm\000" |
| 59446 | /* 159035 */ "VFNMSUB132SSm\000" |
| 59447 | /* 159049 */ "VFMADD132SSm\000" |
| 59448 | /* 159062 */ "VFNMADD132SSm\000" |
| 59449 | /* 159076 */ "VFMSUB213SSm\000" |
| 59450 | /* 159089 */ "VFNMSUB213SSm\000" |
| 59451 | /* 159103 */ "VFMADD213SSm\000" |
| 59452 | /* 159116 */ "VFNMADD213SSm\000" |
| 59453 | /* 159130 */ "VRCPSSm\000" |
| 59454 | /* 159138 */ "VRSQRTSSm\000" |
| 59455 | /* 159148 */ "VSQRTSSm\000" |
| 59456 | /* 159157 */ "VMPTRSTm\000" |
| 59457 | /* 159166 */ "FLDENVm\000" |
| 59458 | /* 159174 */ "FSTENVm\000" |
| 59459 | /* 159182 */ "UD1Wm\000" |
| 59460 | /* 159188 */ "VERWm\000" |
| 59461 | /* 159194 */ "FNSTSWm\000" |
| 59462 | /* 159202 */ "VFMADDSUB231PDYm\000" |
| 59463 | /* 159219 */ "VFMSUB231PDYm\000" |
| 59464 | /* 159233 */ "VFNMSUB231PDYm\000" |
| 59465 | /* 159248 */ "VFMSUBADD231PDYm\000" |
| 59466 | /* 159265 */ "VFMADD231PDYm\000" |
| 59467 | /* 159279 */ "VFNMADD231PDYm\000" |
| 59468 | /* 159294 */ "VFMADDSUB132PDYm\000" |
| 59469 | /* 159311 */ "VFMSUB132PDYm\000" |
| 59470 | /* 159325 */ "VFNMSUB132PDYm\000" |
| 59471 | /* 159340 */ "VFMSUBADD132PDYm\000" |
| 59472 | /* 159357 */ "VFMADD132PDYm\000" |
| 59473 | /* 159371 */ "VFNMADD132PDYm\000" |
| 59474 | /* 159386 */ "VFMADDSUB213PDYm\000" |
| 59475 | /* 159403 */ "VFMSUB213PDYm\000" |
| 59476 | /* 159417 */ "VFNMSUB213PDYm\000" |
| 59477 | /* 159432 */ "VFMSUBADD213PDYm\000" |
| 59478 | /* 159449 */ "VFMADD213PDYm\000" |
| 59479 | /* 159463 */ "VFNMADD213PDYm\000" |
| 59480 | /* 159478 */ "VSQRTPDYm\000" |
| 59481 | /* 159488 */ "VFMADDSUB231PSYm\000" |
| 59482 | /* 159505 */ "VFMSUB231PSYm\000" |
| 59483 | /* 159519 */ "VFNMSUB231PSYm\000" |
| 59484 | /* 159534 */ "VFMSUBADD231PSYm\000" |
| 59485 | /* 159551 */ "VFMADD231PSYm\000" |
| 59486 | /* 159565 */ "VFNMADD231PSYm\000" |
| 59487 | /* 159580 */ "VFMADDSUB132PSYm\000" |
| 59488 | /* 159597 */ "VFMSUB132PSYm\000" |
| 59489 | /* 159611 */ "VFNMSUB132PSYm\000" |
| 59490 | /* 159626 */ "VFMSUBADD132PSYm\000" |
| 59491 | /* 159643 */ "VFMADD132PSYm\000" |
| 59492 | /* 159657 */ "VFNMADD132PSYm\000" |
| 59493 | /* 159672 */ "VFMADDSUB213PSYm\000" |
| 59494 | /* 159689 */ "VFMSUB213PSYm\000" |
| 59495 | /* 159703 */ "VFNMSUB213PSYm\000" |
| 59496 | /* 159718 */ "VFMSUBADD213PSYm\000" |
| 59497 | /* 159735 */ "VFMADD213PSYm\000" |
| 59498 | /* 159749 */ "VFNMADD213PSYm\000" |
| 59499 | /* 159764 */ "VRCPPSYm\000" |
| 59500 | /* 159773 */ "VRSQRTPSYm\000" |
| 59501 | /* 159784 */ "VSQRTPSYm\000" |
| 59502 | /* 159794 */ "VFMSUB231BF16Zm\000" |
| 59503 | /* 159810 */ "VFNMSUB231BF16Zm\000" |
| 59504 | /* 159827 */ "VFMADD231BF16Zm\000" |
| 59505 | /* 159843 */ "VFNMADD231BF16Zm\000" |
| 59506 | /* 159860 */ "VFMSUB132BF16Zm\000" |
| 59507 | /* 159876 */ "VFNMSUB132BF16Zm\000" |
| 59508 | /* 159893 */ "VFMADD132BF16Zm\000" |
| 59509 | /* 159909 */ "VFNMADD132BF16Zm\000" |
| 59510 | /* 159926 */ "VFMSUB213BF16Zm\000" |
| 59511 | /* 159942 */ "VFNMSUB213BF16Zm\000" |
| 59512 | /* 159959 */ "VFMADD213BF16Zm\000" |
| 59513 | /* 159975 */ "VFNMADD213BF16Zm\000" |
| 59514 | /* 159992 */ "VRCPBF16Zm\000" |
| 59515 | /* 160003 */ "VGETEXPBF16Zm\000" |
| 59516 | /* 160017 */ "VRSQRTBF16Zm\000" |
| 59517 | /* 160030 */ "VSQRTBF16Zm\000" |
| 59518 | /* 160042 */ "VMOVRSBZm\000" |
| 59519 | /* 160052 */ "VFMADDSUB231PDZm\000" |
| 59520 | /* 160069 */ "VFMSUB231PDZm\000" |
| 59521 | /* 160083 */ "VFNMSUB231PDZm\000" |
| 59522 | /* 160098 */ "VFMSUBADD231PDZm\000" |
| 59523 | /* 160115 */ "VFMADD231PDZm\000" |
| 59524 | /* 160129 */ "VFNMADD231PDZm\000" |
| 59525 | /* 160144 */ "VFMADDSUB132PDZm\000" |
| 59526 | /* 160161 */ "VFMSUB132PDZm\000" |
| 59527 | /* 160175 */ "VFNMSUB132PDZm\000" |
| 59528 | /* 160190 */ "VFMSUBADD132PDZm\000" |
| 59529 | /* 160207 */ "VFMADD132PDZm\000" |
| 59530 | /* 160221 */ "VFNMADD132PDZm\000" |
| 59531 | /* 160236 */ "VEXP2PDZm\000" |
| 59532 | /* 160246 */ "VFMADDSUB213PDZm\000" |
| 59533 | /* 160263 */ "VFMSUB213PDZm\000" |
| 59534 | /* 160277 */ "VFNMSUB213PDZm\000" |
| 59535 | /* 160292 */ "VFMSUBADD213PDZm\000" |
| 59536 | /* 160309 */ "VFMADD213PDZm\000" |
| 59537 | /* 160323 */ "VFNMADD213PDZm\000" |
| 59538 | /* 160338 */ "VRCP14PDZm\000" |
| 59539 | /* 160349 */ "VRSQRT14PDZm\000" |
| 59540 | /* 160362 */ "VRCP28PDZm\000" |
| 59541 | /* 160373 */ "VRSQRT28PDZm\000" |
| 59542 | /* 160386 */ "VGETEXPPDZm\000" |
| 59543 | /* 160398 */ "VSQRTPDZm\000" |
| 59544 | /* 160408 */ "VFMSUB231SDZm\000" |
| 59545 | /* 160422 */ "VFNMSUB231SDZm\000" |
| 59546 | /* 160437 */ "VFMADD231SDZm\000" |
| 59547 | /* 160451 */ "VFNMADD231SDZm\000" |
| 59548 | /* 160466 */ "VFMSUB132SDZm\000" |
| 59549 | /* 160480 */ "VFNMSUB132SDZm\000" |
| 59550 | /* 160495 */ "VFMADD132SDZm\000" |
| 59551 | /* 160509 */ "VFNMADD132SDZm\000" |
| 59552 | /* 160524 */ "VFMSUB213SDZm\000" |
| 59553 | /* 160538 */ "VFNMSUB213SDZm\000" |
| 59554 | /* 160553 */ "VFMADD213SDZm\000" |
| 59555 | /* 160567 */ "VFNMADD213SDZm\000" |
| 59556 | /* 160582 */ "VRCP28SDZm\000" |
| 59557 | /* 160593 */ "VRSQRT28SDZm\000" |
| 59558 | /* 160606 */ "VGETEXPSDZm\000" |
| 59559 | /* 160618 */ "VMOVRSDZm\000" |
| 59560 | /* 160628 */ "VPDPBSSDZm\000" |
| 59561 | /* 160639 */ "VPDPWSSDZm\000" |
| 59562 | /* 160650 */ "VSQRTSDZm\000" |
| 59563 | /* 160660 */ "VPDPBUSDZm\000" |
| 59564 | /* 160671 */ "VPDPWUSDZm\000" |
| 59565 | /* 160682 */ "VPDPBSUDZm\000" |
| 59566 | /* 160693 */ "VPDPWSUDZm\000" |
| 59567 | /* 160704 */ "VPDPBUUDZm\000" |
| 59568 | /* 160715 */ "VPDPWUUDZm\000" |
| 59569 | /* 160726 */ "VPSHLDVDZm\000" |
| 59570 | /* 160737 */ "VPSHRDVDZm\000" |
| 59571 | /* 160748 */ "VFMADDSUB231PHZm\000" |
| 59572 | /* 160765 */ "VFMSUB231PHZm\000" |
| 59573 | /* 160779 */ "VFNMSUB231PHZm\000" |
| 59574 | /* 160794 */ "VFMSUBADD231PHZm\000" |
| 59575 | /* 160811 */ "VFMADD231PHZm\000" |
| 59576 | /* 160825 */ "VFNMADD231PHZm\000" |
| 59577 | /* 160840 */ "VFMADDSUB132PHZm\000" |
| 59578 | /* 160857 */ "VFMSUB132PHZm\000" |
| 59579 | /* 160871 */ "VFNMSUB132PHZm\000" |
| 59580 | /* 160886 */ "VFMSUBADD132PHZm\000" |
| 59581 | /* 160903 */ "VFMADD132PHZm\000" |
| 59582 | /* 160917 */ "VFNMADD132PHZm\000" |
| 59583 | /* 160932 */ "VFMADDSUB213PHZm\000" |
| 59584 | /* 160949 */ "VFMSUB213PHZm\000" |
| 59585 | /* 160963 */ "VFNMSUB213PHZm\000" |
| 59586 | /* 160978 */ "VFMSUBADD213PHZm\000" |
| 59587 | /* 160995 */ "VFMADD213PHZm\000" |
| 59588 | /* 161009 */ "VFNMADD213PHZm\000" |
| 59589 | /* 161024 */ "VFCMADDCPHZm\000" |
| 59590 | /* 161037 */ "VFMADDCPHZm\000" |
| 59591 | /* 161049 */ "VRCPPHZm\000" |
| 59592 | /* 161058 */ "VGETEXPPHZm\000" |
| 59593 | /* 161070 */ "VRSQRTPHZm\000" |
| 59594 | /* 161081 */ "VSQRTPHZm\000" |
| 59595 | /* 161091 */ "VFMSUB231SHZm\000" |
| 59596 | /* 161105 */ "VFNMSUB231SHZm\000" |
| 59597 | /* 161120 */ "VFMADD231SHZm\000" |
| 59598 | /* 161134 */ "VFNMADD231SHZm\000" |
| 59599 | /* 161149 */ "VFMSUB132SHZm\000" |
| 59600 | /* 161163 */ "VFNMSUB132SHZm\000" |
| 59601 | /* 161178 */ "VFMADD132SHZm\000" |
| 59602 | /* 161192 */ "VFNMADD132SHZm\000" |
| 59603 | /* 161207 */ "VFMSUB213SHZm\000" |
| 59604 | /* 161221 */ "VFNMSUB213SHZm\000" |
| 59605 | /* 161236 */ "VFMADD213SHZm\000" |
| 59606 | /* 161250 */ "VFNMADD213SHZm\000" |
| 59607 | /* 161265 */ "VFCMADDCSHZm\000" |
| 59608 | /* 161278 */ "VFMADDCSHZm\000" |
| 59609 | /* 161290 */ "VGETEXPSHZm\000" |
| 59610 | /* 161302 */ "VSQRTSHZm\000" |
| 59611 | /* 161312 */ "VMOVRSQZm\000" |
| 59612 | /* 161322 */ "VPMADD52HUQZm\000" |
| 59613 | /* 161336 */ "VPMADD52LUQZm\000" |
| 59614 | /* 161350 */ "VPSHLDVQZm\000" |
| 59615 | /* 161361 */ "VPSHRDVQZm\000" |
| 59616 | /* 161372 */ "VPDPBSSDSZm\000" |
| 59617 | /* 161384 */ "VPDPWSSDSZm\000" |
| 59618 | /* 161396 */ "VPDPBUSDSZm\000" |
| 59619 | /* 161408 */ "VPDPWUSDSZm\000" |
| 59620 | /* 161420 */ "VPDPBSUDSZm\000" |
| 59621 | /* 161432 */ "VPDPWSUDSZm\000" |
| 59622 | /* 161444 */ "VPDPBUUDSZm\000" |
| 59623 | /* 161456 */ "VPDPWUUDSZm\000" |
| 59624 | /* 161468 */ "VFMADDSUB231PSZm\000" |
| 59625 | /* 161485 */ "VFMSUB231PSZm\000" |
| 59626 | /* 161499 */ "VFNMSUB231PSZm\000" |
| 59627 | /* 161514 */ "VFMSUBADD231PSZm\000" |
| 59628 | /* 161531 */ "VFMADD231PSZm\000" |
| 59629 | /* 161545 */ "VFNMADD231PSZm\000" |
| 59630 | /* 161560 */ "VFMADDSUB132PSZm\000" |
| 59631 | /* 161577 */ "VFMSUB132PSZm\000" |
| 59632 | /* 161591 */ "VFNMSUB132PSZm\000" |
| 59633 | /* 161606 */ "VFMSUBADD132PSZm\000" |
| 59634 | /* 161623 */ "VFMADD132PSZm\000" |
| 59635 | /* 161637 */ "VFNMADD132PSZm\000" |
| 59636 | /* 161652 */ "VEXP2PSZm\000" |
| 59637 | /* 161662 */ "VFMADDSUB213PSZm\000" |
| 59638 | /* 161679 */ "VFMSUB213PSZm\000" |
| 59639 | /* 161693 */ "VFNMSUB213PSZm\000" |
| 59640 | /* 161708 */ "VFMSUBADD213PSZm\000" |
| 59641 | /* 161725 */ "VFMADD213PSZm\000" |
| 59642 | /* 161739 */ "VFNMADD213PSZm\000" |
| 59643 | /* 161754 */ "VRCP14PSZm\000" |
| 59644 | /* 161765 */ "VRSQRT14PSZm\000" |
| 59645 | /* 161778 */ "VDPBF16PSZm\000" |
| 59646 | /* 161790 */ "VRCP28PSZm\000" |
| 59647 | /* 161801 */ "VRSQRT28PSZm\000" |
| 59648 | /* 161814 */ "VDPPHPSZm\000" |
| 59649 | /* 161824 */ "VGETEXPPSZm\000" |
| 59650 | /* 161836 */ "VSQRTPSZm\000" |
| 59651 | /* 161846 */ "VFMSUB231SSZm\000" |
| 59652 | /* 161860 */ "VFNMSUB231SSZm\000" |
| 59653 | /* 161875 */ "VFMADD231SSZm\000" |
| 59654 | /* 161889 */ "VFNMADD231SSZm\000" |
| 59655 | /* 161904 */ "VFMSUB132SSZm\000" |
| 59656 | /* 161918 */ "VFNMSUB132SSZm\000" |
| 59657 | /* 161933 */ "VFMADD132SSZm\000" |
| 59658 | /* 161947 */ "VFNMADD132SSZm\000" |
| 59659 | /* 161962 */ "VFMSUB213SSZm\000" |
| 59660 | /* 161976 */ "VFNMSUB213SSZm\000" |
| 59661 | /* 161991 */ "VFMADD213SSZm\000" |
| 59662 | /* 162005 */ "VFNMADD213SSZm\000" |
| 59663 | /* 162020 */ "VRCP28SSZm\000" |
| 59664 | /* 162031 */ "VRSQRT28SSZm\000" |
| 59665 | /* 162044 */ "VGETEXPSSZm\000" |
| 59666 | /* 162056 */ "VSQRTSSZm\000" |
| 59667 | /* 162066 */ "VMOVRSWZm\000" |
| 59668 | /* 162076 */ "VPSHLDVWZm\000" |
| 59669 | /* 162087 */ "VPSHRDVWZm\000" |
| 59670 | /* 162098 */ "KMOVBkm\000" |
| 59671 | /* 162106 */ "KMOVDkm\000" |
| 59672 | /* 162114 */ "KMOVQkm\000" |
| 59673 | /* 162122 */ "KMOVWkm\000" |
| 59674 | /* 162130 */ "PUSH32rmm\000" |
| 59675 | /* 162140 */ "POP32rmm\000" |
| 59676 | /* 162149 */ "PUSH64rmm\000" |
| 59677 | /* 162159 */ "POP64rmm\000" |
| 59678 | /* 162168 */ "PUSH16rmm\000" |
| 59679 | /* 162178 */ "POP16rmm\000" |
| 59680 | /* 162187 */ "SHA1MSG1rm\000" |
| 59681 | /* 162198 */ "VSM3MSG1rm\000" |
| 59682 | /* 162209 */ "SHA256MSG1rm\000" |
| 59683 | /* 162222 */ "PFRCPIT1rm\000" |
| 59684 | /* 162233 */ "PFRSQIT1rm\000" |
| 59685 | /* 162244 */ "SBB32rm\000" |
| 59686 | /* 162252 */ "SUB32rm\000" |
| 59687 | /* 162260 */ "ADC32rm\000" |
| 59688 | /* 162268 */ "BLCIC32rm\000" |
| 59689 | /* 162278 */ "BLSIC32rm\000" |
| 59690 | /* 162288 */ "T1MSKC32rm\000" |
| 59691 | /* 162299 */ "XADD32rm\000" |
| 59692 | /* 162308 */ "AND32rm\000" |
| 59693 | /* 162316 */ "MOVBE32rm\000" |
| 59694 | /* 162326 */ "VMWRITE32rm\000" |
| 59695 | /* 162338 */ "BSF32rm\000" |
| 59696 | /* 162346 */ "CMPXCHG32rm\000" |
| 59697 | /* 162358 */ "BLCI32rm\000" |
| 59698 | /* 162367 */ "BZHI32rm\000" |
| 59699 | /* 162376 */ "BLSI32rm\000" |
| 59700 | /* 162385 */ "BLCMSK32rm\000" |
| 59701 | /* 162396 */ "BLSMSK32rm\000" |
| 59702 | /* 162407 */ "TZMSK32rm\000" |
| 59703 | /* 162417 */ "BLCFILL32rm\000" |
| 59704 | /* 162429 */ "BLSFILL32rm\000" |
| 59705 | /* 162441 */ "LSL32rm\000" |
| 59706 | /* 162449 */ "IMUL32rm\000" |
| 59707 | /* 162458 */ "LOCK_BTC_RM32rm\000" |
| 59708 | /* 162474 */ "LOCK_BTR_RM32rm\000" |
| 59709 | /* 162490 */ "LOCK_BTS_RM32rm\000" |
| 59710 | /* 162506 */ "ANDN32rm\000" |
| 59711 | /* 162515 */ "PDEP32rm\000" |
| 59712 | /* 162524 */ "CCMP32rm\000" |
| 59713 | /* 162533 */ "LAR32rm\000" |
| 59714 | /* 162541 */ "XOR32rm\000" |
| 59715 | /* 162549 */ "BSR32rm\000" |
| 59716 | /* 162557 */ "BLSR32rm\000" |
| 59717 | /* 162566 */ "BEXTR32rm\000" |
| 59718 | /* 162576 */ "BLCS32rm\000" |
| 59719 | /* 162585 */ "LDS32rm\000" |
| 59720 | /* 162593 */ "BOUNDS32rm\000" |
| 59721 | /* 162604 */ "LES32rm\000" |
| 59722 | /* 162612 */ "LFS32rm\000" |
| 59723 | /* 162620 */ "LGS32rm\000" |
| 59724 | /* 162628 */ "MOVRS32rm\000" |
| 59725 | /* 162638 */ "LSS32rm\000" |
| 59726 | /* 162646 */ "POPCNT32rm\000" |
| 59727 | /* 162657 */ "LZCNT32rm\000" |
| 59728 | /* 162667 */ "TZCNT32rm\000" |
| 59729 | /* 162677 */ "PEXT32rm\000" |
| 59730 | /* 162686 */ "CFCMOV32rm\000" |
| 59731 | /* 162697 */ "ADCX32rm\000" |
| 59732 | /* 162706 */ "SHLX32rm\000" |
| 59733 | /* 162715 */ "MULX32rm\000" |
| 59734 | /* 162724 */ "ADOX32rm\000" |
| 59735 | /* 162733 */ "SARX32rm\000" |
| 59736 | /* 162742 */ "SHRX32rm\000" |
| 59737 | /* 162751 */ "SHA1MSG2rm\000" |
| 59738 | /* 162762 */ "VSM3MSG2rm\000" |
| 59739 | /* 162773 */ "SHA256MSG2rm\000" |
| 59740 | /* 162786 */ "SHA256RNDS2rm\000" |
| 59741 | /* 162800 */ "PFRCPIT2rm\000" |
| 59742 | /* 162811 */ "SBB64rm\000" |
| 59743 | /* 162819 */ "SUB64rm\000" |
| 59744 | /* 162827 */ "ADC64rm\000" |
| 59745 | /* 162835 */ "BLCIC64rm\000" |
| 59746 | /* 162845 */ "BLSIC64rm\000" |
| 59747 | /* 162855 */ "T1MSKC64rm\000" |
| 59748 | /* 162866 */ "XADD64rm\000" |
| 59749 | /* 162875 */ "AND64rm\000" |
| 59750 | /* 162883 */ "MMX_MOVD64rm\000" |
| 59751 | /* 162896 */ "MOVBE64rm\000" |
| 59752 | /* 162906 */ "VMWRITE64rm\000" |
| 59753 | /* 162918 */ "BSF64rm\000" |
| 59754 | /* 162926 */ "CMPXCHG64rm\000" |
| 59755 | /* 162938 */ "BLCI64rm\000" |
| 59756 | /* 162947 */ "BZHI64rm\000" |
| 59757 | /* 162956 */ "VCVTTSD2SI64rm\000" |
| 59758 | /* 162971 */ "VCVTSD2SI64rm\000" |
| 59759 | /* 162985 */ "VCVTTSS2SI64rm\000" |
| 59760 | /* 163000 */ "VCVTSS2SI64rm\000" |
| 59761 | /* 163014 */ "BLSI64rm\000" |
| 59762 | /* 163023 */ "BLCMSK64rm\000" |
| 59763 | /* 163034 */ "BLSMSK64rm\000" |
| 59764 | /* 163045 */ "TZMSK64rm\000" |
| 59765 | /* 163055 */ "BLCFILL64rm\000" |
| 59766 | /* 163067 */ "BLSFILL64rm\000" |
| 59767 | /* 163079 */ "LSL64rm\000" |
| 59768 | /* 163087 */ "IMUL64rm\000" |
| 59769 | /* 163096 */ "LOCK_BTC_RM64rm\000" |
| 59770 | /* 163112 */ "LOCK_BTR_RM64rm\000" |
| 59771 | /* 163128 */ "LOCK_BTS_RM64rm\000" |
| 59772 | /* 163144 */ "ANDN64rm\000" |
| 59773 | /* 163153 */ "PDEP64rm\000" |
| 59774 | /* 163162 */ "CCMP64rm\000" |
| 59775 | /* 163171 */ "MMX_MOVQ64rm\000" |
| 59776 | /* 163184 */ "LAR64rm\000" |
| 59777 | /* 163192 */ "XOR64rm\000" |
| 59778 | /* 163200 */ "BSR64rm\000" |
| 59779 | /* 163208 */ "BLSR64rm\000" |
| 59780 | /* 163217 */ "BEXTR64rm\000" |
| 59781 | /* 163227 */ "BLCS64rm\000" |
| 59782 | /* 163236 */ "LFS64rm\000" |
| 59783 | /* 163244 */ "LGS64rm\000" |
| 59784 | /* 163252 */ "MOVRS64rm\000" |
| 59785 | /* 163262 */ "LSS64rm\000" |
| 59786 | /* 163270 */ "POPCNT64rm\000" |
| 59787 | /* 163281 */ "LZCNT64rm\000" |
| 59788 | /* 163291 */ "TZCNT64rm\000" |
| 59789 | /* 163301 */ "PEXT64rm\000" |
| 59790 | /* 163310 */ "CFCMOV64rm\000" |
| 59791 | /* 163321 */ "ADCX64rm\000" |
| 59792 | /* 163330 */ "SHLX64rm\000" |
| 59793 | /* 163339 */ "MULX64rm\000" |
| 59794 | /* 163348 */ "ADOX64rm\000" |
| 59795 | /* 163357 */ "SARX64rm\000" |
| 59796 | /* 163366 */ "SHRX64rm\000" |
| 59797 | /* 163375 */ "MMX_MOVD64to64rm\000" |
| 59798 | /* 163392 */ "VFMADDSUBPD4rm\000" |
| 59799 | /* 163407 */ "VFMSUBPD4rm\000" |
| 59800 | /* 163419 */ "VFNMSUBPD4rm\000" |
| 59801 | /* 163432 */ "VFMSUBADDPD4rm\000" |
| 59802 | /* 163447 */ "VFMADDPD4rm\000" |
| 59803 | /* 163459 */ "VFNMADDPD4rm\000" |
| 59804 | /* 163472 */ "VFMSUBSD4rm\000" |
| 59805 | /* 163484 */ "VFNMSUBSD4rm\000" |
| 59806 | /* 163497 */ "VFMADDSD4rm\000" |
| 59807 | /* 163509 */ "VFNMADDSD4rm\000" |
| 59808 | /* 163522 */ "VSM4RNDS4rm\000" |
| 59809 | /* 163534 */ "VFMADDSUBPS4rm\000" |
| 59810 | /* 163549 */ "VFMSUBPS4rm\000" |
| 59811 | /* 163561 */ "VFNMSUBPS4rm\000" |
| 59812 | /* 163574 */ "VFMSUBADDPS4rm\000" |
| 59813 | /* 163589 */ "VFMADDPS4rm\000" |
| 59814 | /* 163601 */ "VFNMADDPS4rm\000" |
| 59815 | /* 163614 */ "VFMSUBSS4rm\000" |
| 59816 | /* 163626 */ "VFNMSUBSS4rm\000" |
| 59817 | /* 163639 */ "VFMADDSS4rm\000" |
| 59818 | /* 163651 */ "VFNMADDSS4rm\000" |
| 59819 | /* 163664 */ "VSM4KEY4rm\000" |
| 59820 | /* 163675 */ "SBB16rm\000" |
| 59821 | /* 163683 */ "SUB16rm\000" |
| 59822 | /* 163691 */ "ADC16rm\000" |
| 59823 | /* 163699 */ "XADD16rm\000" |
| 59824 | /* 163708 */ "AND16rm\000" |
| 59825 | /* 163716 */ "MOVBE16rm\000" |
| 59826 | /* 163726 */ "VCVTNEPS2BF16rm\000" |
| 59827 | /* 163742 */ "BSF16rm\000" |
| 59828 | /* 163750 */ "CMPXCHG16rm\000" |
| 59829 | /* 163762 */ "LSL16rm\000" |
| 59830 | /* 163770 */ "IMUL16rm\000" |
| 59831 | /* 163779 */ "LOCK_BTC_RM16rm\000" |
| 59832 | /* 163795 */ "LOCK_BTR_RM16rm\000" |
| 59833 | /* 163811 */ "LOCK_BTS_RM16rm\000" |
| 59834 | /* 163827 */ "CCMP16rm\000" |
| 59835 | /* 163836 */ "LAR16rm\000" |
| 59836 | /* 163844 */ "XOR16rm\000" |
| 59837 | /* 163852 */ "BSR16rm\000" |
| 59838 | /* 163860 */ "LDS16rm\000" |
| 59839 | /* 163868 */ "BOUNDS16rm\000" |
| 59840 | /* 163879 */ "LES16rm\000" |
| 59841 | /* 163887 */ "LFS16rm\000" |
| 59842 | /* 163895 */ "LGS16rm\000" |
| 59843 | /* 163903 */ "MOVRS16rm\000" |
| 59844 | /* 163913 */ "LSS16rm\000" |
| 59845 | /* 163921 */ "POPCNT16rm\000" |
| 59846 | /* 163932 */ "LZCNT16rm\000" |
| 59847 | /* 163942 */ "TZCNT16rm\000" |
| 59848 | /* 163952 */ "CFCMOV16rm\000" |
| 59849 | /* 163963 */ "VMOVDQA32Z256rm\000" |
| 59850 | /* 163979 */ "VMOVDQU32Z256rm\000" |
| 59851 | /* 163995 */ "VBROADCASTF32X2Z256rm\000" |
| 59852 | /* 164017 */ "VBROADCASTI32X2Z256rm\000" |
| 59853 | /* 164039 */ "VBROADCASTF64X2Z256rm\000" |
| 59854 | /* 164061 */ "VBROADCASTI64X2Z256rm\000" |
| 59855 | /* 164083 */ "VMOVDQA64Z256rm\000" |
| 59856 | /* 164099 */ "VMOVDQU64Z256rm\000" |
| 59857 | /* 164115 */ "VSM4RNDS4Z256rm\000" |
| 59858 | /* 164131 */ "VBROADCASTF32X4Z256rm\000" |
| 59859 | /* 164153 */ "VBROADCASTI32X4Z256rm\000" |
| 59860 | /* 164175 */ "VSM4KEY4Z256rm\000" |
| 59861 | /* 164190 */ "VCVTNE2PS2BF16Z256rm\000" |
| 59862 | /* 164211 */ "VCVTNEPS2BF16Z256rm\000" |
| 59863 | /* 164231 */ "VSUBBF16Z256rm\000" |
| 59864 | /* 164246 */ "VADDBF16Z256rm\000" |
| 59865 | /* 164261 */ "VSCALEFBF16Z256rm\000" |
| 59866 | /* 164279 */ "VMULBF16Z256rm\000" |
| 59867 | /* 164294 */ "VMINBF16Z256rm\000" |
| 59868 | /* 164309 */ "VDIVBF16Z256rm\000" |
| 59869 | /* 164324 */ "VMAXBF16Z256rm\000" |
| 59870 | /* 164339 */ "VMOVDQU16Z256rm\000" |
| 59871 | /* 164355 */ "VCVT2PH2BF8Z256rm\000" |
| 59872 | /* 164373 */ "VCVTBIASPH2BF8Z256rm\000" |
| 59873 | /* 164394 */ "VCVTPH2BF8Z256rm\000" |
| 59874 | /* 164411 */ "VCVT2PH2HF8Z256rm\000" |
| 59875 | /* 164429 */ "VCVTBIASPH2HF8Z256rm\000" |
| 59876 | /* 164450 */ "VCVTPH2HF8Z256rm\000" |
| 59877 | /* 164467 */ "VMOVDQU8Z256rm\000" |
| 59878 | /* 164482 */ "VMOVNTDQAZ256rm\000" |
| 59879 | /* 164498 */ "VPERMI2BZ256rm\000" |
| 59880 | /* 164513 */ "VPERMT2BZ256rm\000" |
| 59881 | /* 164528 */ "VPSUBBZ256rm\000" |
| 59882 | /* 164541 */ "VPADDBZ256rm\000" |
| 59883 | /* 164554 */ "VPEXPANDBZ256rm\000" |
| 59884 | /* 164570 */ "VPSHUFBZ256rm\000" |
| 59885 | /* 164584 */ "VPAVGBZ256rm\000" |
| 59886 | /* 164597 */ "VGF2P8MULBZ256rm\000" |
| 59887 | /* 164614 */ "VPBLENDMBZ256rm\000" |
| 59888 | /* 164630 */ "VPTESTNMBZ256rm\000" |
| 59889 | /* 164646 */ "VPSHUFBITQMBZ256rm\000" |
| 59890 | /* 164665 */ "VPERMBZ256rm\000" |
| 59891 | /* 164678 */ "VPTESTMBZ256rm\000" |
| 59892 | /* 164693 */ "VPCMPEQBZ256rm\000" |
| 59893 | /* 164708 */ "VPMULTISHIFTQBZ256rm\000" |
| 59894 | /* 164729 */ "VPABSBZ256rm\000" |
| 59895 | /* 164742 */ "VPSUBSBZ256rm\000" |
| 59896 | /* 164756 */ "VPADDSBZ256rm\000" |
| 59897 | /* 164770 */ "VPMINSBZ256rm\000" |
| 59898 | /* 164784 */ "VPSUBUSBZ256rm\000" |
| 59899 | /* 164799 */ "VPADDUSBZ256rm\000" |
| 59900 | /* 164814 */ "VPMAXSBZ256rm\000" |
| 59901 | /* 164828 */ "VPCMPGTBZ256rm\000" |
| 59902 | /* 164843 */ "VPOPCNTBZ256rm\000" |
| 59903 | /* 164858 */ "VPBROADCASTBZ256rm\000" |
| 59904 | /* 164877 */ "VPMINUBZ256rm\000" |
| 59905 | /* 164891 */ "VPMAXUBZ256rm\000" |
| 59906 | /* 164905 */ "VPACKSSWBZ256rm\000" |
| 59907 | /* 164921 */ "VPACKUSWBZ256rm\000" |
| 59908 | /* 164937 */ "VAESDECZ256rm\000" |
| 59909 | /* 164951 */ "VAESENCZ256rm\000" |
| 59910 | /* 164965 */ "VPERMI2DZ256rm\000" |
| 59911 | /* 164980 */ "VPERMT2DZ256rm\000" |
| 59912 | /* 164995 */ "VPSRADZ256rm\000" |
| 59913 | /* 165008 */ "VPSUBDZ256rm\000" |
| 59914 | /* 165021 */ "VPMOVSXBDZ256rm\000" |
| 59915 | /* 165037 */ "VPMOVZXBDZ256rm\000" |
| 59916 | /* 165053 */ "VPADDDZ256rm\000" |
| 59917 | /* 165066 */ "VPANDDZ256rm\000" |
| 59918 | /* 165079 */ "VPEXPANDDZ256rm\000" |
| 59919 | /* 165095 */ "VPGATHERDDZ256rm\000" |
| 59920 | /* 165112 */ "VPSLLDZ256rm\000" |
| 59921 | /* 165125 */ "VPMULLDZ256rm\000" |
| 59922 | /* 165139 */ "VPSRLDZ256rm\000" |
| 59923 | /* 165152 */ "VPBLENDMDZ256rm\000" |
| 59924 | /* 165168 */ "VPTESTNMDZ256rm\000" |
| 59925 | /* 165184 */ "VPERMDZ256rm\000" |
| 59926 | /* 165197 */ "VPTESTMDZ256rm\000" |
| 59927 | /* 165212 */ "VPANDNDZ256rm\000" |
| 59928 | /* 165226 */ "VCVTPH2PDZ256rm\000" |
| 59929 | /* 165242 */ "VPERMI2PDZ256rm\000" |
| 59930 | /* 165258 */ "VCVTDQ2PDZ256rm\000" |
| 59931 | /* 165274 */ "VCVTUDQ2PDZ256rm\000" |
| 59932 | /* 165291 */ "VCVTQQ2PDZ256rm\000" |
| 59933 | /* 165307 */ "VCVTUQQ2PDZ256rm\000" |
| 59934 | /* 165324 */ "VCVTPS2PDZ256rm\000" |
| 59935 | /* 165340 */ "VPERMT2PDZ256rm\000" |
| 59936 | /* 165356 */ "VMOVAPDZ256rm\000" |
| 59937 | /* 165370 */ "VSUBPDZ256rm\000" |
| 59938 | /* 165383 */ "VMINCPDZ256rm\000" |
| 59939 | /* 165397 */ "VMAXCPDZ256rm\000" |
| 59940 | /* 165411 */ "VADDPDZ256rm\000" |
| 59941 | /* 165424 */ "VEXPANDPDZ256rm\000" |
| 59942 | /* 165440 */ "VANDPDZ256rm\000" |
| 59943 | /* 165453 */ "VGATHERDPDZ256rm\000" |
| 59944 | /* 165470 */ "VSCALEFPDZ256rm\000" |
| 59945 | /* 165486 */ "VUNPCKHPDZ256rm\000" |
| 59946 | /* 165502 */ "VPERMILPDZ256rm\000" |
| 59947 | /* 165518 */ "VUNPCKLPDZ256rm\000" |
| 59948 | /* 165534 */ "VMULPDZ256rm\000" |
| 59949 | /* 165547 */ "VBLENDMPDZ256rm\000" |
| 59950 | /* 165563 */ "VPERMPDZ256rm\000" |
| 59951 | /* 165577 */ "VANDNPDZ256rm\000" |
| 59952 | /* 165591 */ "VMINPDZ256rm\000" |
| 59953 | /* 165604 */ "VGATHERQPDZ256rm\000" |
| 59954 | /* 165621 */ "VORPDZ256rm\000" |
| 59955 | /* 165633 */ "VXORPDZ256rm\000" |
| 59956 | /* 165646 */ "VMOVUPDZ256rm\000" |
| 59957 | /* 165660 */ "VDIVPDZ256rm\000" |
| 59958 | /* 165673 */ "VMAXPDZ256rm\000" |
| 59959 | /* 165686 */ "VPCMPEQDZ256rm\000" |
| 59960 | /* 165701 */ "VPGATHERQDZ256rm\000" |
| 59961 | /* 165718 */ "VPORDZ256rm\000" |
| 59962 | /* 165730 */ "VPXORDZ256rm\000" |
| 59963 | /* 165743 */ "VPABSDZ256rm\000" |
| 59964 | /* 165756 */ "VPMINSDZ256rm\000" |
| 59965 | /* 165770 */ "VBROADCASTSDZ256rm\000" |
| 59966 | /* 165789 */ "VPMAXSDZ256rm\000" |
| 59967 | /* 165803 */ "VP2INTERSECTDZ256rm\000" |
| 59968 | /* 165823 */ "VPCONFLICTDZ256rm\000" |
| 59969 | /* 165841 */ "VPCMPGTDZ256rm\000" |
| 59970 | /* 165856 */ "VPOPCNTDZ256rm\000" |
| 59971 | /* 165871 */ "VPLZCNTDZ256rm\000" |
| 59972 | /* 165886 */ "VPBROADCASTDZ256rm\000" |
| 59973 | /* 165905 */ "VPMINUDZ256rm\000" |
| 59974 | /* 165919 */ "VPMAXUDZ256rm\000" |
| 59975 | /* 165933 */ "VPSRAVDZ256rm\000" |
| 59976 | /* 165947 */ "VPSLLVDZ256rm\000" |
| 59977 | /* 165961 */ "VPROLVDZ256rm\000" |
| 59978 | /* 165975 */ "VPSRLVDZ256rm\000" |
| 59979 | /* 165989 */ "VPRORVDZ256rm\000" |
| 59980 | /* 166003 */ "VPMADDWDZ256rm\000" |
| 59981 | /* 166018 */ "VPUNPCKHWDZ256rm\000" |
| 59982 | /* 166035 */ "VPUNPCKLWDZ256rm\000" |
| 59983 | /* 166052 */ "VPMOVSXWDZ256rm\000" |
| 59984 | /* 166068 */ "VPMOVZXWDZ256rm\000" |
| 59985 | /* 166084 */ "VCVTHF82PHZ256rm\000" |
| 59986 | /* 166101 */ "VCVTPD2PHZ256rm\000" |
| 59987 | /* 166117 */ "VCVTDQ2PHZ256rm\000" |
| 59988 | /* 166133 */ "VCVTUDQ2PHZ256rm\000" |
| 59989 | /* 166150 */ "VCVTQQ2PHZ256rm\000" |
| 59990 | /* 166166 */ "VCVTUQQ2PHZ256rm\000" |
| 59991 | /* 166183 */ "VCVTW2PHZ256rm\000" |
| 59992 | /* 166198 */ "VCVTUW2PHZ256rm\000" |
| 59993 | /* 166214 */ "VSUBPHZ256rm\000" |
| 59994 | /* 166227 */ "VFCMULCPHZ256rm\000" |
| 59995 | /* 166243 */ "VFMULCPHZ256rm\000" |
| 59996 | /* 166258 */ "VMINCPHZ256rm\000" |
| 59997 | /* 166272 */ "VMAXCPHZ256rm\000" |
| 59998 | /* 166286 */ "VADDPHZ256rm\000" |
| 59999 | /* 166299 */ "VSCALEFPHZ256rm\000" |
| 60000 | /* 166315 */ "VMULPHZ256rm\000" |
| 60001 | /* 166328 */ "VMINPHZ256rm\000" |
| 60002 | /* 166341 */ "VDIVPHZ256rm\000" |
| 60003 | /* 166354 */ "VMAXPHZ256rm\000" |
| 60004 | /* 166367 */ "VMOVDDUPZ256rm\000" |
| 60005 | /* 166382 */ "VMOVSHDUPZ256rm\000" |
| 60006 | /* 166398 */ "VMOVSLDUPZ256rm\000" |
| 60007 | /* 166414 */ "VPERMI2QZ256rm\000" |
| 60008 | /* 166429 */ "VPERMT2QZ256rm\000" |
| 60009 | /* 166444 */ "VPSRAQZ256rm\000" |
| 60010 | /* 166457 */ "VPSUBQZ256rm\000" |
| 60011 | /* 166470 */ "VPMOVSXBQZ256rm\000" |
| 60012 | /* 166486 */ "VPMOVZXBQZ256rm\000" |
| 60013 | /* 166502 */ "VCVTTPD2DQZ256rm\000" |
| 60014 | /* 166519 */ "VCVTPD2DQZ256rm\000" |
| 60015 | /* 166535 */ "VCVTTPH2DQZ256rm\000" |
| 60016 | /* 166552 */ "VCVTPH2DQZ256rm\000" |
| 60017 | /* 166568 */ "VCVTTPS2DQZ256rm\000" |
| 60018 | /* 166585 */ "VCVTPS2DQZ256rm\000" |
| 60019 | /* 166601 */ "VPADDQZ256rm\000" |
| 60020 | /* 166614 */ "VPUNPCKHDQZ256rm\000" |
| 60021 | /* 166631 */ "VPUNPCKLDQZ256rm\000" |
| 60022 | /* 166648 */ "VPMULDQZ256rm\000" |
| 60023 | /* 166662 */ "VPANDQZ256rm\000" |
| 60024 | /* 166675 */ "VPEXPANDQZ256rm\000" |
| 60025 | /* 166691 */ "VPUNPCKHQDQZ256rm\000" |
| 60026 | /* 166709 */ "VPUNPCKLQDQZ256rm\000" |
| 60027 | /* 166727 */ "VPGATHERDQZ256rm\000" |
| 60028 | /* 166744 */ "VCVTTPD2UDQZ256rm\000" |
| 60029 | /* 166762 */ "VCVTPD2UDQZ256rm\000" |
| 60030 | /* 166779 */ "VCVTTPH2UDQZ256rm\000" |
| 60031 | /* 166797 */ "VCVTPH2UDQZ256rm\000" |
| 60032 | /* 166814 */ "VCVTTPS2UDQZ256rm\000" |
| 60033 | /* 166832 */ "VCVTPS2UDQZ256rm\000" |
| 60034 | /* 166849 */ "VPMULUDQZ256rm\000" |
| 60035 | /* 166864 */ "VPMOVSXDQZ256rm\000" |
| 60036 | /* 166880 */ "VPMOVZXDQZ256rm\000" |
| 60037 | /* 166896 */ "VPSLLQZ256rm\000" |
| 60038 | /* 166909 */ "VPMULLQZ256rm\000" |
| 60039 | /* 166923 */ "VPSRLQZ256rm\000" |
| 60040 | /* 166936 */ "VPBLENDMQZ256rm\000" |
| 60041 | /* 166952 */ "VPTESTNMQZ256rm\000" |
| 60042 | /* 166968 */ "VPERMQZ256rm\000" |
| 60043 | /* 166981 */ "VPTESTMQZ256rm\000" |
| 60044 | /* 166996 */ "VPANDNQZ256rm\000" |
| 60045 | /* 167010 */ "VCVTTPD2QQZ256rm\000" |
| 60046 | /* 167027 */ "VCVTPD2QQZ256rm\000" |
| 60047 | /* 167043 */ "VCVTTPH2QQZ256rm\000" |
| 60048 | /* 167060 */ "VCVTPH2QQZ256rm\000" |
| 60049 | /* 167076 */ "VCVTTPS2QQZ256rm\000" |
| 60050 | /* 167093 */ "VCVTPS2QQZ256rm\000" |
| 60051 | /* 167109 */ "VPCMPEQQZ256rm\000" |
| 60052 | /* 167124 */ "VPGATHERQQZ256rm\000" |
| 60053 | /* 167141 */ "VCVTTPD2UQQZ256rm\000" |
| 60054 | /* 167159 */ "VCVTPD2UQQZ256rm\000" |
| 60055 | /* 167176 */ "VCVTTPH2UQQZ256rm\000" |
| 60056 | /* 167194 */ "VCVTPH2UQQZ256rm\000" |
| 60057 | /* 167211 */ "VCVTTPS2UQQZ256rm\000" |
| 60058 | /* 167229 */ "VCVTPS2UQQZ256rm\000" |
| 60059 | /* 167246 */ "VPORQZ256rm\000" |
| 60060 | /* 167258 */ "VPXORQZ256rm\000" |
| 60061 | /* 167271 */ "VPABSQZ256rm\000" |
| 60062 | /* 167284 */ "VPMINSQZ256rm\000" |
| 60063 | /* 167298 */ "VPMAXSQZ256rm\000" |
| 60064 | /* 167312 */ "VP2INTERSECTQZ256rm\000" |
| 60065 | /* 167332 */ "VPCONFLICTQZ256rm\000" |
| 60066 | /* 167350 */ "VPCMPGTQZ256rm\000" |
| 60067 | /* 167365 */ "VPOPCNTQZ256rm\000" |
| 60068 | /* 167380 */ "VPLZCNTQZ256rm\000" |
| 60069 | /* 167395 */ "VPBROADCASTQZ256rm\000" |
| 60070 | /* 167414 */ "VPMINUQZ256rm\000" |
| 60071 | /* 167428 */ "VPMAXUQZ256rm\000" |
| 60072 | /* 167442 */ "VPSRAVQZ256rm\000" |
| 60073 | /* 167456 */ "VPSLLVQZ256rm\000" |
| 60074 | /* 167470 */ "VPROLVQZ256rm\000" |
| 60075 | /* 167484 */ "VPSRLVQZ256rm\000" |
| 60076 | /* 167498 */ "VPRORVQZ256rm\000" |
| 60077 | /* 167512 */ "VPMOVSXWQZ256rm\000" |
| 60078 | /* 167528 */ "VPMOVZXWQZ256rm\000" |
| 60079 | /* 167544 */ "VCVT2PH2BF8SZ256rm\000" |
| 60080 | /* 167563 */ "VCVTBIASPH2BF8SZ256rm\000" |
| 60081 | /* 167585 */ "VCVTPH2BF8SZ256rm\000" |
| 60082 | /* 167603 */ "VCVT2PH2HF8SZ256rm\000" |
| 60083 | /* 167622 */ "VCVTBIASPH2HF8SZ256rm\000" |
| 60084 | /* 167644 */ "VCVTPH2HF8SZ256rm\000" |
| 60085 | /* 167662 */ "VCVTTBF162IBSZ256rm\000" |
| 60086 | /* 167682 */ "VCVTBF162IBSZ256rm\000" |
| 60087 | /* 167701 */ "VCVTTPH2IBSZ256rm\000" |
| 60088 | /* 167719 */ "VCVTPH2IBSZ256rm\000" |
| 60089 | /* 167736 */ "VCVTTPS2IBSZ256rm\000" |
| 60090 | /* 167754 */ "VCVTPS2IBSZ256rm\000" |
| 60091 | /* 167771 */ "VCVTTBF162IUBSZ256rm\000" |
| 60092 | /* 167792 */ "VCVTBF162IUBSZ256rm\000" |
| 60093 | /* 167812 */ "VCVTTPH2IUBSZ256rm\000" |
| 60094 | /* 167831 */ "VCVTPH2IUBSZ256rm\000" |
| 60095 | /* 167849 */ "VCVTTPS2IUBSZ256rm\000" |
| 60096 | /* 167868 */ "VCVTPS2IUBSZ256rm\000" |
| 60097 | /* 167886 */ "VCVTPD2PSZ256rm\000" |
| 60098 | /* 167902 */ "VCVTPH2PSZ256rm\000" |
| 60099 | /* 167918 */ "VPERMI2PSZ256rm\000" |
| 60100 | /* 167934 */ "VCVTDQ2PSZ256rm\000" |
| 60101 | /* 167950 */ "VCVTUDQ2PSZ256rm\000" |
| 60102 | /* 167967 */ "VCVTQQ2PSZ256rm\000" |
| 60103 | /* 167983 */ "VCVTUQQ2PSZ256rm\000" |
| 60104 | /* 168000 */ "VPERMT2PSZ256rm\000" |
| 60105 | /* 168016 */ "VMOVAPSZ256rm\000" |
| 60106 | /* 168030 */ "VSUBPSZ256rm\000" |
| 60107 | /* 168043 */ "VMINCPSZ256rm\000" |
| 60108 | /* 168057 */ "VMAXCPSZ256rm\000" |
| 60109 | /* 168071 */ "VADDPSZ256rm\000" |
| 60110 | /* 168084 */ "VEXPANDPSZ256rm\000" |
| 60111 | /* 168100 */ "VANDPSZ256rm\000" |
| 60112 | /* 168113 */ "VGATHERDPSZ256rm\000" |
| 60113 | /* 168130 */ "VSCALEFPSZ256rm\000" |
| 60114 | /* 168146 */ "VUNPCKHPSZ256rm\000" |
| 60115 | /* 168162 */ "VPERMILPSZ256rm\000" |
| 60116 | /* 168178 */ "VUNPCKLPSZ256rm\000" |
| 60117 | /* 168194 */ "VMULPSZ256rm\000" |
| 60118 | /* 168207 */ "VBLENDMPSZ256rm\000" |
| 60119 | /* 168223 */ "VPERMPSZ256rm\000" |
| 60120 | /* 168237 */ "VANDNPSZ256rm\000" |
| 60121 | /* 168251 */ "VMINPSZ256rm\000" |
| 60122 | /* 168264 */ "VGATHERQPSZ256rm\000" |
| 60123 | /* 168281 */ "VORPSZ256rm\000" |
| 60124 | /* 168293 */ "VXORPSZ256rm\000" |
| 60125 | /* 168306 */ "VMOVUPSZ256rm\000" |
| 60126 | /* 168320 */ "VDIVPSZ256rm\000" |
| 60127 | /* 168333 */ "VMAXPSZ256rm\000" |
| 60128 | /* 168346 */ "VCVTTPD2DQSZ256rm\000" |
| 60129 | /* 168364 */ "VCVTTPS2DQSZ256rm\000" |
| 60130 | /* 168382 */ "VCVTTPD2UDQSZ256rm\000" |
| 60131 | /* 168401 */ "VCVTTPS2UDQSZ256rm\000" |
| 60132 | /* 168420 */ "VCVTTPD2QQSZ256rm\000" |
| 60133 | /* 168438 */ "VCVTTPS2QQSZ256rm\000" |
| 60134 | /* 168456 */ "VCVTTPD2UQQSZ256rm\000" |
| 60135 | /* 168475 */ "VCVTTPS2UQQSZ256rm\000" |
| 60136 | /* 168494 */ "VBROADCASTSSZ256rm\000" |
| 60137 | /* 168513 */ "VAESDECLASTZ256rm\000" |
| 60138 | /* 168531 */ "VAESENCLASTZ256rm\000" |
| 60139 | /* 168549 */ "VCVTTPH2WZ256rm\000" |
| 60140 | /* 168565 */ "VCVTPH2WZ256rm\000" |
| 60141 | /* 168580 */ "VPERMI2WZ256rm\000" |
| 60142 | /* 168595 */ "VPERMT2WZ256rm\000" |
| 60143 | /* 168610 */ "VPSRAWZ256rm\000" |
| 60144 | /* 168623 */ "VPSADBWZ256rm\000" |
| 60145 | /* 168637 */ "VPUNPCKHBWZ256rm\000" |
| 60146 | /* 168654 */ "VPUNPCKLBWZ256rm\000" |
| 60147 | /* 168671 */ "VPSUBWZ256rm\000" |
| 60148 | /* 168684 */ "VPMOVSXBWZ256rm\000" |
| 60149 | /* 168700 */ "VPMOVZXBWZ256rm\000" |
| 60150 | /* 168716 */ "VPADDWZ256rm\000" |
| 60151 | /* 168729 */ "VPEXPANDWZ256rm\000" |
| 60152 | /* 168745 */ "VPACKSSDWZ256rm\000" |
| 60153 | /* 168761 */ "VPACKUSDWZ256rm\000" |
| 60154 | /* 168777 */ "VPAVGWZ256rm\000" |
| 60155 | /* 168790 */ "VPMULHWZ256rm\000" |
| 60156 | /* 168804 */ "VPSLLWZ256rm\000" |
| 60157 | /* 168817 */ "VPMULLWZ256rm\000" |
| 60158 | /* 168831 */ "VPSRLWZ256rm\000" |
| 60159 | /* 168844 */ "VPBLENDMWZ256rm\000" |
| 60160 | /* 168860 */ "VPTESTNMWZ256rm\000" |
| 60161 | /* 168876 */ "VPERMWZ256rm\000" |
| 60162 | /* 168889 */ "VPTESTMWZ256rm\000" |
| 60163 | /* 168904 */ "VPCMPEQWZ256rm\000" |
| 60164 | /* 168919 */ "VPABSWZ256rm\000" |
| 60165 | /* 168932 */ "VPMADDUBSWZ256rm\000" |
| 60166 | /* 168949 */ "VPSUBSWZ256rm\000" |
| 60167 | /* 168963 */ "VPADDSWZ256rm\000" |
| 60168 | /* 168977 */ "VPMINSWZ256rm\000" |
| 60169 | /* 168991 */ "VPMULHRSWZ256rm\000" |
| 60170 | /* 169007 */ "VPSUBUSWZ256rm\000" |
| 60171 | /* 169022 */ "VPADDUSWZ256rm\000" |
| 60172 | /* 169037 */ "VPMAXSWZ256rm\000" |
| 60173 | /* 169051 */ "VPCMPGTWZ256rm\000" |
| 60174 | /* 169066 */ "VPOPCNTWZ256rm\000" |
| 60175 | /* 169081 */ "VPBROADCASTWZ256rm\000" |
| 60176 | /* 169100 */ "VCVTTPH2UWZ256rm\000" |
| 60177 | /* 169117 */ "VCVTPH2UWZ256rm\000" |
| 60178 | /* 169133 */ "VPMULHUWZ256rm\000" |
| 60179 | /* 169148 */ "VPMINUWZ256rm\000" |
| 60180 | /* 169162 */ "VPMAXUWZ256rm\000" |
| 60181 | /* 169176 */ "VPSRAVWZ256rm\000" |
| 60182 | /* 169190 */ "VPSLLVWZ256rm\000" |
| 60183 | /* 169204 */ "VPSRLVWZ256rm\000" |
| 60184 | /* 169218 */ "VCVT2PS2PHXZ256rm\000" |
| 60185 | /* 169236 */ "VCVTPS2PHXZ256rm\000" |
| 60186 | /* 169253 */ "VCVTPH2PSXZ256rm\000" |
| 60187 | /* 169270 */ "VBROADCASTF128rm\000" |
| 60188 | /* 169287 */ "VBROADCASTI128rm\000" |
| 60189 | /* 169304 */ "VAESKEYGENASSIST128rm\000" |
| 60190 | /* 169326 */ "VMOVDQA32Z128rm\000" |
| 60191 | /* 169342 */ "VMOVDQU32Z128rm\000" |
| 60192 | /* 169358 */ "VBROADCASTI32X2Z128rm\000" |
| 60193 | /* 169380 */ "VMOVDQA64Z128rm\000" |
| 60194 | /* 169396 */ "VMOVDQU64Z128rm\000" |
| 60195 | /* 169412 */ "VSM4RNDS4Z128rm\000" |
| 60196 | /* 169428 */ "VSM4KEY4Z128rm\000" |
| 60197 | /* 169443 */ "VCVTNE2PS2BF16Z128rm\000" |
| 60198 | /* 169464 */ "VCVTNEPS2BF16Z128rm\000" |
| 60199 | /* 169484 */ "VSUBBF16Z128rm\000" |
| 60200 | /* 169499 */ "VADDBF16Z128rm\000" |
| 60201 | /* 169514 */ "VSCALEFBF16Z128rm\000" |
| 60202 | /* 169532 */ "VMULBF16Z128rm\000" |
| 60203 | /* 169547 */ "VMINBF16Z128rm\000" |
| 60204 | /* 169562 */ "VDIVBF16Z128rm\000" |
| 60205 | /* 169577 */ "VMAXBF16Z128rm\000" |
| 60206 | /* 169592 */ "VMOVDQU16Z128rm\000" |
| 60207 | /* 169608 */ "VCVT2PH2BF8Z128rm\000" |
| 60208 | /* 169626 */ "VCVTBIASPH2BF8Z128rm\000" |
| 60209 | /* 169647 */ "VCVTPH2BF8Z128rm\000" |
| 60210 | /* 169664 */ "VCVT2PH2HF8Z128rm\000" |
| 60211 | /* 169682 */ "VCVTBIASPH2HF8Z128rm\000" |
| 60212 | /* 169703 */ "VCVTPH2HF8Z128rm\000" |
| 60213 | /* 169720 */ "VMOVDQU8Z128rm\000" |
| 60214 | /* 169735 */ "VMOVNTDQAZ128rm\000" |
| 60215 | /* 169751 */ "VPERMI2BZ128rm\000" |
| 60216 | /* 169766 */ "VPERMT2BZ128rm\000" |
| 60217 | /* 169781 */ "VPSUBBZ128rm\000" |
| 60218 | /* 169794 */ "VPADDBZ128rm\000" |
| 60219 | /* 169807 */ "VPEXPANDBZ128rm\000" |
| 60220 | /* 169823 */ "VPSHUFBZ128rm\000" |
| 60221 | /* 169837 */ "VPAVGBZ128rm\000" |
| 60222 | /* 169850 */ "VGF2P8MULBZ128rm\000" |
| 60223 | /* 169867 */ "VPBLENDMBZ128rm\000" |
| 60224 | /* 169883 */ "VPTESTNMBZ128rm\000" |
| 60225 | /* 169899 */ "VPSHUFBITQMBZ128rm\000" |
| 60226 | /* 169918 */ "VPERMBZ128rm\000" |
| 60227 | /* 169931 */ "VPTESTMBZ128rm\000" |
| 60228 | /* 169946 */ "VPCMPEQBZ128rm\000" |
| 60229 | /* 169961 */ "VPMULTISHIFTQBZ128rm\000" |
| 60230 | /* 169982 */ "VPABSBZ128rm\000" |
| 60231 | /* 169995 */ "VPSUBSBZ128rm\000" |
| 60232 | /* 170009 */ "VPADDSBZ128rm\000" |
| 60233 | /* 170023 */ "VPMINSBZ128rm\000" |
| 60234 | /* 170037 */ "VPSUBUSBZ128rm\000" |
| 60235 | /* 170052 */ "VPADDUSBZ128rm\000" |
| 60236 | /* 170067 */ "VPMAXSBZ128rm\000" |
| 60237 | /* 170081 */ "VPCMPGTBZ128rm\000" |
| 60238 | /* 170096 */ "VPOPCNTBZ128rm\000" |
| 60239 | /* 170111 */ "VPBROADCASTBZ128rm\000" |
| 60240 | /* 170130 */ "VPMINUBZ128rm\000" |
| 60241 | /* 170144 */ "VPMAXUBZ128rm\000" |
| 60242 | /* 170158 */ "VPACKSSWBZ128rm\000" |
| 60243 | /* 170174 */ "VPACKUSWBZ128rm\000" |
| 60244 | /* 170190 */ "VAESDECZ128rm\000" |
| 60245 | /* 170204 */ "VAESENCZ128rm\000" |
| 60246 | /* 170218 */ "VPERMI2DZ128rm\000" |
| 60247 | /* 170233 */ "VPERMT2DZ128rm\000" |
| 60248 | /* 170248 */ "VPSRADZ128rm\000" |
| 60249 | /* 170261 */ "VPSUBDZ128rm\000" |
| 60250 | /* 170274 */ "VPMOVSXBDZ128rm\000" |
| 60251 | /* 170290 */ "VPMOVZXBDZ128rm\000" |
| 60252 | /* 170306 */ "VPADDDZ128rm\000" |
| 60253 | /* 170319 */ "VPANDDZ128rm\000" |
| 60254 | /* 170332 */ "VPEXPANDDZ128rm\000" |
| 60255 | /* 170348 */ "VPGATHERDDZ128rm\000" |
| 60256 | /* 170365 */ "VPSLLDZ128rm\000" |
| 60257 | /* 170378 */ "VPMULLDZ128rm\000" |
| 60258 | /* 170392 */ "VPSRLDZ128rm\000" |
| 60259 | /* 170405 */ "VPBLENDMDZ128rm\000" |
| 60260 | /* 170421 */ "VPTESTNMDZ128rm\000" |
| 60261 | /* 170437 */ "VPTESTMDZ128rm\000" |
| 60262 | /* 170452 */ "VPANDNDZ128rm\000" |
| 60263 | /* 170466 */ "VCVTPH2PDZ128rm\000" |
| 60264 | /* 170482 */ "VPERMI2PDZ128rm\000" |
| 60265 | /* 170498 */ "VCVTDQ2PDZ128rm\000" |
| 60266 | /* 170514 */ "VCVTUDQ2PDZ128rm\000" |
| 60267 | /* 170531 */ "VCVTQQ2PDZ128rm\000" |
| 60268 | /* 170547 */ "VCVTUQQ2PDZ128rm\000" |
| 60269 | /* 170564 */ "VCVTPS2PDZ128rm\000" |
| 60270 | /* 170580 */ "VPERMT2PDZ128rm\000" |
| 60271 | /* 170596 */ "VMOVAPDZ128rm\000" |
| 60272 | /* 170610 */ "VSUBPDZ128rm\000" |
| 60273 | /* 170623 */ "VMINCPDZ128rm\000" |
| 60274 | /* 170637 */ "VMAXCPDZ128rm\000" |
| 60275 | /* 170651 */ "VADDPDZ128rm\000" |
| 60276 | /* 170664 */ "VEXPANDPDZ128rm\000" |
| 60277 | /* 170680 */ "VANDPDZ128rm\000" |
| 60278 | /* 170693 */ "VGATHERDPDZ128rm\000" |
| 60279 | /* 170710 */ "VSCALEFPDZ128rm\000" |
| 60280 | /* 170726 */ "VUNPCKHPDZ128rm\000" |
| 60281 | /* 170742 */ "VMOVHPDZ128rm\000" |
| 60282 | /* 170756 */ "VPERMILPDZ128rm\000" |
| 60283 | /* 170772 */ "VUNPCKLPDZ128rm\000" |
| 60284 | /* 170788 */ "VMULPDZ128rm\000" |
| 60285 | /* 170801 */ "VMOVLPDZ128rm\000" |
| 60286 | /* 170815 */ "VBLENDMPDZ128rm\000" |
| 60287 | /* 170831 */ "VANDNPDZ128rm\000" |
| 60288 | /* 170845 */ "VMINPDZ128rm\000" |
| 60289 | /* 170858 */ "VGATHERQPDZ128rm\000" |
| 60290 | /* 170875 */ "VORPDZ128rm\000" |
| 60291 | /* 170887 */ "VXORPDZ128rm\000" |
| 60292 | /* 170900 */ "VMOVUPDZ128rm\000" |
| 60293 | /* 170914 */ "VDIVPDZ128rm\000" |
| 60294 | /* 170927 */ "VMAXPDZ128rm\000" |
| 60295 | /* 170940 */ "VPCMPEQDZ128rm\000" |
| 60296 | /* 170955 */ "VPGATHERQDZ128rm\000" |
| 60297 | /* 170972 */ "VPORDZ128rm\000" |
| 60298 | /* 170984 */ "VPXORDZ128rm\000" |
| 60299 | /* 170997 */ "VPABSDZ128rm\000" |
| 60300 | /* 171010 */ "VPMINSDZ128rm\000" |
| 60301 | /* 171024 */ "VPMAXSDZ128rm\000" |
| 60302 | /* 171038 */ "VP2INTERSECTDZ128rm\000" |
| 60303 | /* 171058 */ "VPCONFLICTDZ128rm\000" |
| 60304 | /* 171076 */ "VPCMPGTDZ128rm\000" |
| 60305 | /* 171091 */ "VPOPCNTDZ128rm\000" |
| 60306 | /* 171106 */ "VPLZCNTDZ128rm\000" |
| 60307 | /* 171121 */ "VPBROADCASTDZ128rm\000" |
| 60308 | /* 171140 */ "VPMINUDZ128rm\000" |
| 60309 | /* 171154 */ "VPMAXUDZ128rm\000" |
| 60310 | /* 171168 */ "VPSRAVDZ128rm\000" |
| 60311 | /* 171182 */ "VPSLLVDZ128rm\000" |
| 60312 | /* 171196 */ "VPROLVDZ128rm\000" |
| 60313 | /* 171210 */ "VPSRLVDZ128rm\000" |
| 60314 | /* 171224 */ "VPRORVDZ128rm\000" |
| 60315 | /* 171238 */ "VPMADDWDZ128rm\000" |
| 60316 | /* 171253 */ "VPUNPCKHWDZ128rm\000" |
| 60317 | /* 171270 */ "VPUNPCKLWDZ128rm\000" |
| 60318 | /* 171287 */ "VPMOVSXWDZ128rm\000" |
| 60319 | /* 171303 */ "VPMOVZXWDZ128rm\000" |
| 60320 | /* 171319 */ "VCVTHF82PHZ128rm\000" |
| 60321 | /* 171336 */ "VCVTPD2PHZ128rm\000" |
| 60322 | /* 171352 */ "VCVTDQ2PHZ128rm\000" |
| 60323 | /* 171368 */ "VCVTUDQ2PHZ128rm\000" |
| 60324 | /* 171385 */ "VCVTQQ2PHZ128rm\000" |
| 60325 | /* 171401 */ "VCVTUQQ2PHZ128rm\000" |
| 60326 | /* 171418 */ "VCVTW2PHZ128rm\000" |
| 60327 | /* 171433 */ "VCVTUW2PHZ128rm\000" |
| 60328 | /* 171449 */ "VSUBPHZ128rm\000" |
| 60329 | /* 171462 */ "VFCMULCPHZ128rm\000" |
| 60330 | /* 171478 */ "VFMULCPHZ128rm\000" |
| 60331 | /* 171493 */ "VMINCPHZ128rm\000" |
| 60332 | /* 171507 */ "VMAXCPHZ128rm\000" |
| 60333 | /* 171521 */ "VADDPHZ128rm\000" |
| 60334 | /* 171534 */ "VSCALEFPHZ128rm\000" |
| 60335 | /* 171550 */ "VMULPHZ128rm\000" |
| 60336 | /* 171563 */ "VMINPHZ128rm\000" |
| 60337 | /* 171576 */ "VDIVPHZ128rm\000" |
| 60338 | /* 171589 */ "VMAXPHZ128rm\000" |
| 60339 | /* 171602 */ "VMOVDDUPZ128rm\000" |
| 60340 | /* 171617 */ "VMOVSHDUPZ128rm\000" |
| 60341 | /* 171633 */ "VMOVSLDUPZ128rm\000" |
| 60342 | /* 171649 */ "VPERMI2QZ128rm\000" |
| 60343 | /* 171664 */ "VPERMT2QZ128rm\000" |
| 60344 | /* 171679 */ "VPSRAQZ128rm\000" |
| 60345 | /* 171692 */ "VPSUBQZ128rm\000" |
| 60346 | /* 171705 */ "VPMOVSXBQZ128rm\000" |
| 60347 | /* 171721 */ "VPMOVZXBQZ128rm\000" |
| 60348 | /* 171737 */ "VCVTTPD2DQZ128rm\000" |
| 60349 | /* 171754 */ "VCVTPD2DQZ128rm\000" |
| 60350 | /* 171770 */ "VCVTTPH2DQZ128rm\000" |
| 60351 | /* 171787 */ "VCVTPH2DQZ128rm\000" |
| 60352 | /* 171803 */ "VCVTTPS2DQZ128rm\000" |
| 60353 | /* 171820 */ "VCVTPS2DQZ128rm\000" |
| 60354 | /* 171836 */ "VPADDQZ128rm\000" |
| 60355 | /* 171849 */ "VPUNPCKHDQZ128rm\000" |
| 60356 | /* 171866 */ "VPUNPCKLDQZ128rm\000" |
| 60357 | /* 171883 */ "VPMULDQZ128rm\000" |
| 60358 | /* 171897 */ "VPANDQZ128rm\000" |
| 60359 | /* 171910 */ "VPEXPANDQZ128rm\000" |
| 60360 | /* 171926 */ "VPUNPCKHQDQZ128rm\000" |
| 60361 | /* 171944 */ "VPUNPCKLQDQZ128rm\000" |
| 60362 | /* 171962 */ "VPGATHERDQZ128rm\000" |
| 60363 | /* 171979 */ "VCVTTPD2UDQZ128rm\000" |
| 60364 | /* 171997 */ "VCVTPD2UDQZ128rm\000" |
| 60365 | /* 172014 */ "VCVTTPH2UDQZ128rm\000" |
| 60366 | /* 172032 */ "VCVTPH2UDQZ128rm\000" |
| 60367 | /* 172049 */ "VCVTTPS2UDQZ128rm\000" |
| 60368 | /* 172067 */ "VCVTPS2UDQZ128rm\000" |
| 60369 | /* 172084 */ "VPMULUDQZ128rm\000" |
| 60370 | /* 172099 */ "VPMOVSXDQZ128rm\000" |
| 60371 | /* 172115 */ "VPMOVZXDQZ128rm\000" |
| 60372 | /* 172131 */ "VPSLLQZ128rm\000" |
| 60373 | /* 172144 */ "VPMULLQZ128rm\000" |
| 60374 | /* 172158 */ "VPSRLQZ128rm\000" |
| 60375 | /* 172171 */ "VPBLENDMQZ128rm\000" |
| 60376 | /* 172187 */ "VPTESTNMQZ128rm\000" |
| 60377 | /* 172203 */ "VPTESTMQZ128rm\000" |
| 60378 | /* 172218 */ "VPANDNQZ128rm\000" |
| 60379 | /* 172232 */ "VCVTTPD2QQZ128rm\000" |
| 60380 | /* 172249 */ "VCVTPD2QQZ128rm\000" |
| 60381 | /* 172265 */ "VCVTTPH2QQZ128rm\000" |
| 60382 | /* 172282 */ "VCVTPH2QQZ128rm\000" |
| 60383 | /* 172298 */ "VCVTTPS2QQZ128rm\000" |
| 60384 | /* 172315 */ "VCVTPS2QQZ128rm\000" |
| 60385 | /* 172331 */ "VPCMPEQQZ128rm\000" |
| 60386 | /* 172346 */ "VPGATHERQQZ128rm\000" |
| 60387 | /* 172363 */ "VCVTTPD2UQQZ128rm\000" |
| 60388 | /* 172381 */ "VCVTPD2UQQZ128rm\000" |
| 60389 | /* 172398 */ "VCVTTPH2UQQZ128rm\000" |
| 60390 | /* 172416 */ "VCVTPH2UQQZ128rm\000" |
| 60391 | /* 172433 */ "VCVTTPS2UQQZ128rm\000" |
| 60392 | /* 172451 */ "VCVTPS2UQQZ128rm\000" |
| 60393 | /* 172468 */ "VPORQZ128rm\000" |
| 60394 | /* 172480 */ "VPXORQZ128rm\000" |
| 60395 | /* 172493 */ "VPABSQZ128rm\000" |
| 60396 | /* 172506 */ "VPMINSQZ128rm\000" |
| 60397 | /* 172520 */ "VPMAXSQZ128rm\000" |
| 60398 | /* 172534 */ "VP2INTERSECTQZ128rm\000" |
| 60399 | /* 172554 */ "VPCONFLICTQZ128rm\000" |
| 60400 | /* 172572 */ "VPCMPGTQZ128rm\000" |
| 60401 | /* 172587 */ "VPOPCNTQZ128rm\000" |
| 60402 | /* 172602 */ "VPLZCNTQZ128rm\000" |
| 60403 | /* 172617 */ "VPBROADCASTQZ128rm\000" |
| 60404 | /* 172636 */ "VPMINUQZ128rm\000" |
| 60405 | /* 172650 */ "VPMAXUQZ128rm\000" |
| 60406 | /* 172664 */ "VPSRAVQZ128rm\000" |
| 60407 | /* 172678 */ "VPSLLVQZ128rm\000" |
| 60408 | /* 172692 */ "VPROLVQZ128rm\000" |
| 60409 | /* 172706 */ "VPSRLVQZ128rm\000" |
| 60410 | /* 172720 */ "VPRORVQZ128rm\000" |
| 60411 | /* 172734 */ "VPMOVSXWQZ128rm\000" |
| 60412 | /* 172750 */ "VPMOVZXWQZ128rm\000" |
| 60413 | /* 172766 */ "VCVT2PH2BF8SZ128rm\000" |
| 60414 | /* 172785 */ "VCVTBIASPH2BF8SZ128rm\000" |
| 60415 | /* 172807 */ "VCVTPH2BF8SZ128rm\000" |
| 60416 | /* 172825 */ "VCVT2PH2HF8SZ128rm\000" |
| 60417 | /* 172844 */ "VCVTBIASPH2HF8SZ128rm\000" |
| 60418 | /* 172866 */ "VCVTPH2HF8SZ128rm\000" |
| 60419 | /* 172884 */ "VCVTTBF162IBSZ128rm\000" |
| 60420 | /* 172904 */ "VCVTBF162IBSZ128rm\000" |
| 60421 | /* 172923 */ "VCVTTPH2IBSZ128rm\000" |
| 60422 | /* 172941 */ "VCVTPH2IBSZ128rm\000" |
| 60423 | /* 172958 */ "VCVTTPS2IBSZ128rm\000" |
| 60424 | /* 172976 */ "VCVTPS2IBSZ128rm\000" |
| 60425 | /* 172993 */ "VCVTTBF162IUBSZ128rm\000" |
| 60426 | /* 173014 */ "VCVTBF162IUBSZ128rm\000" |
| 60427 | /* 173034 */ "VCVTTPH2IUBSZ128rm\000" |
| 60428 | /* 173053 */ "VCVTPH2IUBSZ128rm\000" |
| 60429 | /* 173071 */ "VCVTTPS2IUBSZ128rm\000" |
| 60430 | /* 173090 */ "VCVTPS2IUBSZ128rm\000" |
| 60431 | /* 173108 */ "VCVTPD2PSZ128rm\000" |
| 60432 | /* 173124 */ "VCVTPH2PSZ128rm\000" |
| 60433 | /* 173140 */ "VPERMI2PSZ128rm\000" |
| 60434 | /* 173156 */ "VCVTDQ2PSZ128rm\000" |
| 60435 | /* 173172 */ "VCVTUDQ2PSZ128rm\000" |
| 60436 | /* 173189 */ "VCVTQQ2PSZ128rm\000" |
| 60437 | /* 173205 */ "VCVTUQQ2PSZ128rm\000" |
| 60438 | /* 173222 */ "VPERMT2PSZ128rm\000" |
| 60439 | /* 173238 */ "VMOVAPSZ128rm\000" |
| 60440 | /* 173252 */ "VSUBPSZ128rm\000" |
| 60441 | /* 173265 */ "VMINCPSZ128rm\000" |
| 60442 | /* 173279 */ "VMAXCPSZ128rm\000" |
| 60443 | /* 173293 */ "VADDPSZ128rm\000" |
| 60444 | /* 173306 */ "VEXPANDPSZ128rm\000" |
| 60445 | /* 173322 */ "VANDPSZ128rm\000" |
| 60446 | /* 173335 */ "VGATHERDPSZ128rm\000" |
| 60447 | /* 173352 */ "VSCALEFPSZ128rm\000" |
| 60448 | /* 173368 */ "VUNPCKHPSZ128rm\000" |
| 60449 | /* 173384 */ "VMOVHPSZ128rm\000" |
| 60450 | /* 173398 */ "VPERMILPSZ128rm\000" |
| 60451 | /* 173414 */ "VUNPCKLPSZ128rm\000" |
| 60452 | /* 173430 */ "VMULPSZ128rm\000" |
| 60453 | /* 173443 */ "VMOVLPSZ128rm\000" |
| 60454 | /* 173457 */ "VBLENDMPSZ128rm\000" |
| 60455 | /* 173473 */ "VANDNPSZ128rm\000" |
| 60456 | /* 173487 */ "VMINPSZ128rm\000" |
| 60457 | /* 173500 */ "VGATHERQPSZ128rm\000" |
| 60458 | /* 173517 */ "VORPSZ128rm\000" |
| 60459 | /* 173529 */ "VXORPSZ128rm\000" |
| 60460 | /* 173542 */ "VMOVUPSZ128rm\000" |
| 60461 | /* 173556 */ "VDIVPSZ128rm\000" |
| 60462 | /* 173569 */ "VMAXPSZ128rm\000" |
| 60463 | /* 173582 */ "VCVTTPD2DQSZ128rm\000" |
| 60464 | /* 173600 */ "VCVTTPS2DQSZ128rm\000" |
| 60465 | /* 173618 */ "VCVTTPD2UDQSZ128rm\000" |
| 60466 | /* 173637 */ "VCVTTPS2UDQSZ128rm\000" |
| 60467 | /* 173656 */ "VCVTTPD2QQSZ128rm\000" |
| 60468 | /* 173674 */ "VCVTTPS2QQSZ128rm\000" |
| 60469 | /* 173692 */ "VCVTTPD2UQQSZ128rm\000" |
| 60470 | /* 173711 */ "VCVTTPS2UQQSZ128rm\000" |
| 60471 | /* 173730 */ "VBROADCASTSSZ128rm\000" |
| 60472 | /* 173749 */ "VAESDECLASTZ128rm\000" |
| 60473 | /* 173767 */ "VAESENCLASTZ128rm\000" |
| 60474 | /* 173785 */ "VCVTTPH2WZ128rm\000" |
| 60475 | /* 173801 */ "VCVTPH2WZ128rm\000" |
| 60476 | /* 173816 */ "VPERMI2WZ128rm\000" |
| 60477 | /* 173831 */ "VPERMT2WZ128rm\000" |
| 60478 | /* 173846 */ "VPSRAWZ128rm\000" |
| 60479 | /* 173859 */ "VPSADBWZ128rm\000" |
| 60480 | /* 173873 */ "VPUNPCKHBWZ128rm\000" |
| 60481 | /* 173890 */ "VPUNPCKLBWZ128rm\000" |
| 60482 | /* 173907 */ "VPSUBWZ128rm\000" |
| 60483 | /* 173920 */ "VPMOVSXBWZ128rm\000" |
| 60484 | /* 173936 */ "VPMOVZXBWZ128rm\000" |
| 60485 | /* 173952 */ "VPADDWZ128rm\000" |
| 60486 | /* 173965 */ "VPEXPANDWZ128rm\000" |
| 60487 | /* 173981 */ "VPACKSSDWZ128rm\000" |
| 60488 | /* 173997 */ "VPACKUSDWZ128rm\000" |
| 60489 | /* 174013 */ "VPAVGWZ128rm\000" |
| 60490 | /* 174026 */ "VPMULHWZ128rm\000" |
| 60491 | /* 174040 */ "VPSLLWZ128rm\000" |
| 60492 | /* 174053 */ "VPMULLWZ128rm\000" |
| 60493 | /* 174067 */ "VPSRLWZ128rm\000" |
| 60494 | /* 174080 */ "VPBLENDMWZ128rm\000" |
| 60495 | /* 174096 */ "VPTESTNMWZ128rm\000" |
| 60496 | /* 174112 */ "VPERMWZ128rm\000" |
| 60497 | /* 174125 */ "VPTESTMWZ128rm\000" |
| 60498 | /* 174140 */ "VPCMPEQWZ128rm\000" |
| 60499 | /* 174155 */ "VPABSWZ128rm\000" |
| 60500 | /* 174168 */ "VPMADDUBSWZ128rm\000" |
| 60501 | /* 174185 */ "VPSUBSWZ128rm\000" |
| 60502 | /* 174199 */ "VPADDSWZ128rm\000" |
| 60503 | /* 174213 */ "VPMINSWZ128rm\000" |
| 60504 | /* 174227 */ "VPMULHRSWZ128rm\000" |
| 60505 | /* 174243 */ "VPSUBUSWZ128rm\000" |
| 60506 | /* 174258 */ "VPADDUSWZ128rm\000" |
| 60507 | /* 174273 */ "VPMAXSWZ128rm\000" |
| 60508 | /* 174287 */ "VPCMPGTWZ128rm\000" |
| 60509 | /* 174302 */ "VPOPCNTWZ128rm\000" |
| 60510 | /* 174317 */ "VPBROADCASTWZ128rm\000" |
| 60511 | /* 174336 */ "VCVTTPH2UWZ128rm\000" |
| 60512 | /* 174353 */ "VCVTPH2UWZ128rm\000" |
| 60513 | /* 174369 */ "VPMULHUWZ128rm\000" |
| 60514 | /* 174384 */ "VPMINUWZ128rm\000" |
| 60515 | /* 174398 */ "VPMAXUWZ128rm\000" |
| 60516 | /* 174412 */ "VPSRAVWZ128rm\000" |
| 60517 | /* 174426 */ "VPSLLVWZ128rm\000" |
| 60518 | /* 174440 */ "VPSRLVWZ128rm\000" |
| 60519 | /* 174454 */ "VCVT2PS2PHXZ128rm\000" |
| 60520 | /* 174472 */ "VCVTPS2PHXZ128rm\000" |
| 60521 | /* 174489 */ "VCVTPH2PSXZ128rm\000" |
| 60522 | /* 174506 */ "SBB8rm\000" |
| 60523 | /* 174513 */ "SUB8rm\000" |
| 60524 | /* 174520 */ "ADC8rm\000" |
| 60525 | /* 174527 */ "XADD8rm\000" |
| 60526 | /* 174535 */ "AND8rm\000" |
| 60527 | /* 174542 */ "CMPXCHG8rm\000" |
| 60528 | /* 174553 */ "CCMP8rm\000" |
| 60529 | /* 174561 */ "XOR8rm\000" |
| 60530 | /* 174568 */ "MOVRS8rm\000" |
| 60531 | /* 174577 */ "MOV8rm\000" |
| 60532 | /* 174584 */ "VMOVNTDQArm\000" |
| 60533 | /* 174596 */ "VMOVDQArm\000" |
| 60534 | /* 174606 */ "VPSHABrm\000" |
| 60535 | /* 174615 */ "VPSUBBrm\000" |
| 60536 | /* 174624 */ "MMX_PSUBBrm\000" |
| 60537 | /* 174636 */ "VPADDBrm\000" |
| 60538 | /* 174645 */ "MMX_PADDBrm\000" |
| 60539 | /* 174657 */ "VPSHUFBrm\000" |
| 60540 | /* 174667 */ "MMX_PSHUFBrm\000" |
| 60541 | /* 174680 */ "VPAVGBrm\000" |
| 60542 | /* 174689 */ "MMX_PAVGBrm\000" |
| 60543 | /* 174701 */ "VPSHLBrm\000" |
| 60544 | /* 174710 */ "VGF2P8MULBrm\000" |
| 60545 | /* 174723 */ "VPSIGNBrm\000" |
| 60546 | /* 174733 */ "MMX_PSIGNBrm\000" |
| 60547 | /* 174746 */ "VPCMPEQBrm\000" |
| 60548 | /* 174757 */ "MMX_PCMPEQBrm\000" |
| 60549 | /* 174771 */ "VPABSBrm\000" |
| 60550 | /* 174780 */ "MMX_PABSBrm\000" |
| 60551 | /* 174792 */ "VPSUBSBrm\000" |
| 60552 | /* 174802 */ "MMX_PSUBSBrm\000" |
| 60553 | /* 174815 */ "VPADDSBrm\000" |
| 60554 | /* 174825 */ "MMX_PADDSBrm\000" |
| 60555 | /* 174838 */ "VPMINSBrm\000" |
| 60556 | /* 174848 */ "VPSUBUSBrm\000" |
| 60557 | /* 174859 */ "MMX_PSUBUSBrm\000" |
| 60558 | /* 174873 */ "VPADDUSBrm\000" |
| 60559 | /* 174884 */ "MMX_PADDUSBrm\000" |
| 60560 | /* 174898 */ "PAVGUSBrm\000" |
| 60561 | /* 174908 */ "VPMAXSBrm\000" |
| 60562 | /* 174918 */ "VPCMPGTBrm\000" |
| 60563 | /* 174929 */ "MMX_PCMPGTBrm\000" |
| 60564 | /* 174943 */ "VPROTBrm\000" |
| 60565 | /* 174952 */ "VPBROADCASTBrm\000" |
| 60566 | /* 174967 */ "VPMINUBrm\000" |
| 60567 | /* 174977 */ "MMX_PMINUBrm\000" |
| 60568 | /* 174990 */ "PFSUBrm\000" |
| 60569 | /* 174998 */ "VPMAXUBrm\000" |
| 60570 | /* 175008 */ "MMX_PMAXUBrm\000" |
| 60571 | /* 175021 */ "VPACKSSWBrm\000" |
| 60572 | /* 175033 */ "MMX_PACKSSWBrm\000" |
| 60573 | /* 175048 */ "VPACKUSWBrm\000" |
| 60574 | /* 175060 */ "MMX_PACKUSWBrm\000" |
| 60575 | /* 175075 */ "PFACCrm\000" |
| 60576 | /* 175083 */ "PFNACCrm\000" |
| 60577 | /* 175092 */ "PFPNACCrm\000" |
| 60578 | /* 175102 */ "VAESDECrm\000" |
| 60579 | /* 175112 */ "VAESIMCrm\000" |
| 60580 | /* 175122 */ "VAESENCrm\000" |
| 60581 | /* 175132 */ "VPSHADrm\000" |
| 60582 | /* 175141 */ "VPSRADrm\000" |
| 60583 | /* 175150 */ "MMX_PSRADrm\000" |
| 60584 | /* 175162 */ "VPHADDBDrm\000" |
| 60585 | /* 175173 */ "VPHADDUBDrm\000" |
| 60586 | /* 175185 */ "VPHSUBDrm\000" |
| 60587 | /* 175195 */ "MMX_PHSUBDrm\000" |
| 60588 | /* 175208 */ "VPSUBDrm\000" |
| 60589 | /* 175217 */ "MMX_PSUBDrm\000" |
| 60590 | /* 175229 */ "VPMOVSXBDrm\000" |
| 60591 | /* 175241 */ "VPMOVZXBDrm\000" |
| 60592 | /* 175253 */ "PFADDrm\000" |
| 60593 | /* 175261 */ "VPHADDDrm\000" |
| 60594 | /* 175271 */ "MMX_PHADDDrm\000" |
| 60595 | /* 175284 */ "VPADDDrm\000" |
| 60596 | /* 175293 */ "MMX_PADDDrm\000" |
| 60597 | /* 175305 */ "VPGATHERDDrm\000" |
| 60598 | /* 175318 */ "VPMACSDDrm\000" |
| 60599 | /* 175329 */ "VPMACSSDDrm\000" |
| 60600 | /* 175341 */ "PI2FDrm\000" |
| 60601 | /* 175349 */ "PF2IDrm\000" |
| 60602 | /* 175357 */ "VPSHLDrm\000" |
| 60603 | /* 175366 */ "VPSLLDrm\000" |
| 60604 | /* 175375 */ "MMX_PSLLDrm\000" |
| 60605 | /* 175387 */ "VPMULLDrm\000" |
| 60606 | /* 175397 */ "VPSRLDrm\000" |
| 60607 | /* 175406 */ "MMX_PSRLDrm\000" |
| 60608 | /* 175418 */ "VPANDrm\000" |
| 60609 | /* 175426 */ "MMX_PANDrm\000" |
| 60610 | /* 175437 */ "VPSIGNDrm\000" |
| 60611 | /* 175447 */ "MMX_PSIGNDrm\000" |
| 60612 | /* 175460 */ "MMX_CVTPI2PDrm\000" |
| 60613 | /* 175475 */ "VPERMIL2PDrm\000" |
| 60614 | /* 175488 */ "VCVTDQ2PDrm\000" |
| 60615 | /* 175500 */ "VCVTPS2PDrm\000" |
| 60616 | /* 175512 */ "VMOVAPDrm\000" |
| 60617 | /* 175522 */ "PSWAPDrm\000" |
| 60618 | /* 175531 */ "VADDSUBPDrm\000" |
| 60619 | /* 175543 */ "VHSUBPDrm\000" |
| 60620 | /* 175553 */ "VSUBPDrm\000" |
| 60621 | /* 175562 */ "VMINCPDrm\000" |
| 60622 | /* 175572 */ "VMAXCPDrm\000" |
| 60623 | /* 175582 */ "VHADDPDrm\000" |
| 60624 | /* 175592 */ "VADDPDrm\000" |
| 60625 | /* 175601 */ "VANDPDrm\000" |
| 60626 | /* 175610 */ "VGATHERDPDrm\000" |
| 60627 | /* 175623 */ "VUNPCKHPDrm\000" |
| 60628 | /* 175635 */ "VMOVHPDrm\000" |
| 60629 | /* 175645 */ "VPERMILPDrm\000" |
| 60630 | /* 175657 */ "VUNPCKLPDrm\000" |
| 60631 | /* 175669 */ "VMULPDrm\000" |
| 60632 | /* 175678 */ "VMOVLPDrm\000" |
| 60633 | /* 175688 */ "VANDNPDrm\000" |
| 60634 | /* 175698 */ "VMINPDrm\000" |
| 60635 | /* 175707 */ "VGATHERQPDrm\000" |
| 60636 | /* 175720 */ "VORPDrm\000" |
| 60637 | /* 175728 */ "VXORPDrm\000" |
| 60638 | /* 175737 */ "VTESTPDrm\000" |
| 60639 | /* 175747 */ "VMOVUPDrm\000" |
| 60640 | /* 175757 */ "VDIVPDrm\000" |
| 60641 | /* 175766 */ "VMASKMOVPDrm\000" |
| 60642 | /* 175779 */ "VMAXPDrm\000" |
| 60643 | /* 175788 */ "VFRCZPDrm\000" |
| 60644 | /* 175798 */ "VPCMPEQDrm\000" |
| 60645 | /* 175809 */ "MMX_PCMPEQDrm\000" |
| 60646 | /* 175823 */ "VPGATHERQDrm\000" |
| 60647 | /* 175836 */ "VCVTSI642SDrm\000" |
| 60648 | /* 175850 */ "VCVTSI2SDrm\000" |
| 60649 | /* 175862 */ "VCVTSS2SDrm\000" |
| 60650 | /* 175874 */ "VPABSDrm\000" |
| 60651 | /* 175883 */ "MMX_PABSDrm\000" |
| 60652 | /* 175895 */ "VSUBSDrm\000" |
| 60653 | /* 175904 */ "VMINCSDrm\000" |
| 60654 | /* 175914 */ "VMAXCSDrm\000" |
| 60655 | /* 175924 */ "VADDSDrm\000" |
| 60656 | /* 175933 */ "VUCOMISDrm\000" |
| 60657 | /* 175944 */ "VCOMISDrm\000" |
| 60658 | /* 175954 */ "VMULSDrm\000" |
| 60659 | /* 175963 */ "VPMINSDrm\000" |
| 60660 | /* 175973 */ "VMINSDrm\000" |
| 60661 | /* 175982 */ "VPDPBSSDrm\000" |
| 60662 | /* 175993 */ "VP4DPWSSDrm\000" |
| 60663 | /* 176005 */ "VPDPWSSDrm\000" |
| 60664 | /* 176016 */ "VPDPBUSDrm\000" |
| 60665 | /* 176027 */ "VPDPWUSDrm\000" |
| 60666 | /* 176038 */ "VDIVSDrm\000" |
| 60667 | /* 176047 */ "VMOVSDrm\000" |
| 60668 | /* 176056 */ "VPMAXSDrm\000" |
| 60669 | /* 176066 */ "VMAXSDrm\000" |
| 60670 | /* 176075 */ "VFRCZSDrm\000" |
| 60671 | /* 176085 */ "VPCMPGTDrm\000" |
| 60672 | /* 176096 */ "MMX_PCMPGTDrm\000" |
| 60673 | /* 176110 */ "VPROTDrm\000" |
| 60674 | /* 176119 */ "VPBROADCASTDrm\000" |
| 60675 | /* 176134 */ "VPMINUDrm\000" |
| 60676 | /* 176144 */ "VPDPBSUDrm\000" |
| 60677 | /* 176155 */ "VPDPWSUDrm\000" |
| 60678 | /* 176166 */ "VPDPBUUDrm\000" |
| 60679 | /* 176177 */ "VPDPWUUDrm\000" |
| 60680 | /* 176188 */ "VPMAXUDrm\000" |
| 60681 | /* 176198 */ "VPSRAVDrm\000" |
| 60682 | /* 176208 */ "VPSLLVDrm\000" |
| 60683 | /* 176218 */ "VPSRLVDrm\000" |
| 60684 | /* 176228 */ "VPMASKMOVDrm\000" |
| 60685 | /* 176241 */ "VPHSUBWDrm\000" |
| 60686 | /* 176252 */ "VPHADDWDrm\000" |
| 60687 | /* 176263 */ "VPMADDWDrm\000" |
| 60688 | /* 176274 */ "MMX_PMADDWDrm\000" |
| 60689 | /* 176288 */ "VPUNPCKHWDrm\000" |
| 60690 | /* 176301 */ "MMX_PUNPCKHWDrm\000" |
| 60691 | /* 176317 */ "VPUNPCKLWDrm\000" |
| 60692 | /* 176330 */ "MMX_PUNPCKLWDrm\000" |
| 60693 | /* 176346 */ "VPMACSWDrm\000" |
| 60694 | /* 176357 */ "VPMADCSWDrm\000" |
| 60695 | /* 176369 */ "VPMACSSWDrm\000" |
| 60696 | /* 176381 */ "VPMADCSSWDrm\000" |
| 60697 | /* 176394 */ "VPHADDUWDrm\000" |
| 60698 | /* 176406 */ "VPMOVSXWDrm\000" |
| 60699 | /* 176418 */ "VPMOVZXWDrm\000" |
| 60700 | /* 176430 */ "PFCMPGErm\000" |
| 60701 | /* 176440 */ "SHA1NEXTErm\000" |
| 60702 | /* 176452 */ "MULX32Hrm\000" |
| 60703 | /* 176462 */ "MULX64Hrm\000" |
| 60704 | /* 176472 */ "VPMACSDQHrm\000" |
| 60705 | /* 176484 */ "VPMACSSDQHrm\000" |
| 60706 | /* 176497 */ "VMOVDI2PDIrm\000" |
| 60707 | /* 176510 */ "MMX_CVTTPD2PIrm\000" |
| 60708 | /* 176526 */ "MMX_CVTPD2PIrm\000" |
| 60709 | /* 176541 */ "MMX_CVTTPS2PIrm\000" |
| 60710 | /* 176557 */ "MMX_CVTPS2PIrm\000" |
| 60711 | /* 176572 */ "VMOVQI2PQIrm\000" |
| 60712 | /* 176585 */ "VMOV64toPQIrm\000" |
| 60713 | /* 176599 */ "VCVTTSD2SIrm\000" |
| 60714 | /* 176612 */ "VCVTSD2SIrm\000" |
| 60715 | /* 176624 */ "VCVTTSS2SIrm\000" |
| 60716 | /* 176637 */ "VCVTSS2SIrm\000" |
| 60717 | /* 176649 */ "VPMACSDQLrm\000" |
| 60718 | /* 176661 */ "VPMACSSDQLrm\000" |
| 60719 | /* 176674 */ "PFMULrm\000" |
| 60720 | /* 176682 */ "VPANDNrm\000" |
| 60721 | /* 176691 */ "MMX_PANDNrm\000" |
| 60722 | /* 176703 */ "PFMINrm\000" |
| 60723 | /* 176711 */ "PFRCPrm\000" |
| 60724 | /* 176719 */ "VMOVDDUPrm\000" |
| 60725 | /* 176730 */ "VMOVSHDUPrm\000" |
| 60726 | /* 176742 */ "VMOVSLDUPrm\000" |
| 60727 | /* 176754 */ "VPSHAQrm\000" |
| 60728 | /* 176763 */ "VPHADDBQrm\000" |
| 60729 | /* 176774 */ "VPHADDUBQrm\000" |
| 60730 | /* 176786 */ "VPSUBQrm\000" |
| 60731 | /* 176795 */ "MMX_PSUBQrm\000" |
| 60732 | /* 176807 */ "VPMOVSXBQrm\000" |
| 60733 | /* 176819 */ "VPMOVZXBQrm\000" |
| 60734 | /* 176831 */ "VCVTTPD2DQrm\000" |
| 60735 | /* 176844 */ "VCVTPD2DQrm\000" |
| 60736 | /* 176856 */ "VCVTTPS2DQrm\000" |
| 60737 | /* 176869 */ "VCVTPS2DQrm\000" |
| 60738 | /* 176881 */ "VPHSUBDQrm\000" |
| 60739 | /* 176892 */ "VPADDQrm\000" |
| 60740 | /* 176901 */ "MMX_PADDQrm\000" |
| 60741 | /* 176913 */ "VPHADDDQrm\000" |
| 60742 | /* 176924 */ "VPUNPCKHDQrm\000" |
| 60743 | /* 176937 */ "MMX_PUNPCKHDQrm\000" |
| 60744 | /* 176953 */ "VPUNPCKLDQrm\000" |
| 60745 | /* 176966 */ "MMX_PUNPCKLDQrm\000" |
| 60746 | /* 176982 */ "VPMULDQrm\000" |
| 60747 | /* 176992 */ "VPUNPCKHQDQrm\000" |
| 60748 | /* 177006 */ "VPUNPCKLQDQrm\000" |
| 60749 | /* 177020 */ "VPGATHERDQrm\000" |
| 60750 | /* 177033 */ "VPHADDUDQrm\000" |
| 60751 | /* 177045 */ "VPMULUDQrm\000" |
| 60752 | /* 177056 */ "MMX_PMULUDQrm\000" |
| 60753 | /* 177070 */ "VPMOVSXDQrm\000" |
| 60754 | /* 177082 */ "VPMOVZXDQrm\000" |
| 60755 | /* 177094 */ "PFCMPEQrm\000" |
| 60756 | /* 177104 */ "VPSHLQrm\000" |
| 60757 | /* 177113 */ "VPSLLQrm\000" |
| 60758 | /* 177122 */ "MMX_PSLLQrm\000" |
| 60759 | /* 177134 */ "VPSRLQrm\000" |
| 60760 | /* 177143 */ "MMX_PSRLQrm\000" |
| 60761 | /* 177155 */ "VPCMPEQQrm\000" |
| 60762 | /* 177166 */ "VPGATHERQQrm\000" |
| 60763 | /* 177179 */ "VPCMPGTQrm\000" |
| 60764 | /* 177190 */ "VPROTQrm\000" |
| 60765 | /* 177199 */ "VPBROADCASTQrm\000" |
| 60766 | /* 177214 */ "VPMADD52HUQrm\000" |
| 60767 | /* 177228 */ "VPMADD52LUQrm\000" |
| 60768 | /* 177242 */ "VPSLLVQrm\000" |
| 60769 | /* 177252 */ "VPSRLVQrm\000" |
| 60770 | /* 177262 */ "VPMASKMOVQrm\000" |
| 60771 | /* 177275 */ "VPHADDWQrm\000" |
| 60772 | /* 177286 */ "VPHADDUWQrm\000" |
| 60773 | /* 177298 */ "VPMOVSXWQrm\000" |
| 60774 | /* 177310 */ "VPMOVZXWQrm\000" |
| 60775 | /* 177322 */ "PFSUBRrm\000" |
| 60776 | /* 177331 */ "VPORrm\000" |
| 60777 | /* 177338 */ "MMX_PORrm\000" |
| 60778 | /* 177348 */ "VPXORrm\000" |
| 60779 | /* 177356 */ "MMX_PXORrm\000" |
| 60780 | /* 177367 */ "VCVTTSD2SI64Srm\000" |
| 60781 | /* 177383 */ "VCVTTSS2SI64Srm\000" |
| 60782 | /* 177399 */ "VCVTTSD2USI64Srm\000" |
| 60783 | /* 177416 */ "VCVTTSS2USI64Srm\000" |
| 60784 | /* 177433 */ "VPDPBSSDSrm\000" |
| 60785 | /* 177445 */ "VP4DPWSSDSrm\000" |
| 60786 | /* 177458 */ "VPDPWSSDSrm\000" |
| 60787 | /* 177470 */ "VPDPBUSDSrm\000" |
| 60788 | /* 177482 */ "VPDPWUSDSrm\000" |
| 60789 | /* 177494 */ "VPDPBSUDSrm\000" |
| 60790 | /* 177506 */ "VPDPWSUDSrm\000" |
| 60791 | /* 177518 */ "VPDPBUUDSrm\000" |
| 60792 | /* 177530 */ "VPDPWUUDSrm\000" |
| 60793 | /* 177542 */ "VCVTTSD2SISrm\000" |
| 60794 | /* 177556 */ "VCVTTSS2SISrm\000" |
| 60795 | /* 177570 */ "VCVTTSD2USISrm\000" |
| 60796 | /* 177585 */ "VCVTTSS2USISrm\000" |
| 60797 | /* 177600 */ "VCVTNEEBF162PSrm\000" |
| 60798 | /* 177617 */ "VBCSTNEBF162PSrm\000" |
| 60799 | /* 177634 */ "VCVTNEOBF162PSrm\000" |
| 60800 | /* 177651 */ "VCVTPD2PSrm\000" |
| 60801 | /* 177663 */ "VCVTNEEPH2PSrm\000" |
| 60802 | /* 177678 */ "VCVTNEOPH2PSrm\000" |
| 60803 | /* 177693 */ "VCVTPH2PSrm\000" |
| 60804 | /* 177705 */ "VBCSTNESH2PSrm\000" |
| 60805 | /* 177720 */ "MMX_CVTPI2PSrm\000" |
| 60806 | /* 177735 */ "VPERMIL2PSrm\000" |
| 60807 | /* 177748 */ "VCVTDQ2PSrm\000" |
| 60808 | /* 177760 */ "VMOVAPSrm\000" |
| 60809 | /* 177770 */ "VADDSUBPSrm\000" |
| 60810 | /* 177782 */ "VHSUBPSrm\000" |
| 60811 | /* 177792 */ "VSUBPSrm\000" |
| 60812 | /* 177801 */ "VMINCPSrm\000" |
| 60813 | /* 177811 */ "VMAXCPSrm\000" |
| 60814 | /* 177821 */ "VHADDPSrm\000" |
| 60815 | /* 177831 */ "V4FMADDPSrm\000" |
| 60816 | /* 177843 */ "V4FNMADDPSrm\000" |
| 60817 | /* 177856 */ "VADDPSrm\000" |
| 60818 | /* 177865 */ "VANDPSrm\000" |
| 60819 | /* 177874 */ "VGATHERDPSrm\000" |
| 60820 | /* 177887 */ "VUNPCKHPSrm\000" |
| 60821 | /* 177899 */ "VMOVHPSrm\000" |
| 60822 | /* 177909 */ "VPERMILPSrm\000" |
| 60823 | /* 177921 */ "VUNPCKLPSrm\000" |
| 60824 | /* 177933 */ "VMULPSrm\000" |
| 60825 | /* 177942 */ "VMOVLPSrm\000" |
| 60826 | /* 177952 */ "VANDNPSrm\000" |
| 60827 | /* 177962 */ "VMINPSrm\000" |
| 60828 | /* 177971 */ "VGATHERQPSrm\000" |
| 60829 | /* 177984 */ "VORPSrm\000" |
| 60830 | /* 177992 */ "VXORPSrm\000" |
| 60831 | /* 178001 */ "VTESTPSrm\000" |
| 60832 | /* 178011 */ "VMOVUPSrm\000" |
| 60833 | /* 178021 */ "VDIVPSrm\000" |
| 60834 | /* 178030 */ "VMASKMOVPSrm\000" |
| 60835 | /* 178043 */ "VMAXPSrm\000" |
| 60836 | /* 178052 */ "VFRCZPSrm\000" |
| 60837 | /* 178062 */ "VCVTSI642SSrm\000" |
| 60838 | /* 178076 */ "VCVTSD2SSrm\000" |
| 60839 | /* 178088 */ "VCVTSI2SSrm\000" |
| 60840 | /* 178100 */ "VSUBSSrm\000" |
| 60841 | /* 178109 */ "VMINCSSrm\000" |
| 60842 | /* 178119 */ "VMAXCSSrm\000" |
| 60843 | /* 178129 */ "V4FMADDSSrm\000" |
| 60844 | /* 178141 */ "V4FNMADDSSrm\000" |
| 60845 | /* 178154 */ "VADDSSrm\000" |
| 60846 | /* 178163 */ "VUCOMISSrm\000" |
| 60847 | /* 178174 */ "VCOMISSrm\000" |
| 60848 | /* 178184 */ "VMULSSrm\000" |
| 60849 | /* 178193 */ "VMINSSrm\000" |
| 60850 | /* 178202 */ "VBROADCASTSSrm\000" |
| 60851 | /* 178217 */ "VDIVSSrm\000" |
| 60852 | /* 178226 */ "VMOVSSrm\000" |
| 60853 | /* 178235 */ "VMAXSSrm\000" |
| 60854 | /* 178244 */ "VFRCZSSrm\000" |
| 60855 | /* 178254 */ "PFCMPGTrm\000" |
| 60856 | /* 178264 */ "PFRSQRTrm\000" |
| 60857 | /* 178274 */ "VAESDECLASTrm\000" |
| 60858 | /* 178288 */ "VAESENCLASTrm\000" |
| 60859 | /* 178302 */ "VPTESTrm\000" |
| 60860 | /* 178311 */ "VLDDQUrm\000" |
| 60861 | /* 178320 */ "VMOVDQUrm\000" |
| 60862 | /* 178330 */ "VPSHAWrm\000" |
| 60863 | /* 178339 */ "VPSRAWrm\000" |
| 60864 | /* 178348 */ "MMX_PSRAWrm\000" |
| 60865 | /* 178360 */ "VPHSUBBWrm\000" |
| 60866 | /* 178371 */ "VPSADBWrm\000" |
| 60867 | /* 178381 */ "MMX_PSADBWrm\000" |
| 60868 | /* 178394 */ "VPHADDBWrm\000" |
| 60869 | /* 178405 */ "VPUNPCKHBWrm\000" |
| 60870 | /* 178418 */ "MMX_PUNPCKHBWrm\000" |
| 60871 | /* 178434 */ "VPUNPCKLBWrm\000" |
| 60872 | /* 178447 */ "MMX_PUNPCKLBWrm\000" |
| 60873 | /* 178463 */ "VPHADDUBWrm\000" |
| 60874 | /* 178475 */ "VPHSUBWrm\000" |
| 60875 | /* 178485 */ "MMX_PHSUBWrm\000" |
| 60876 | /* 178498 */ "VPSUBWrm\000" |
| 60877 | /* 178507 */ "MMX_PSUBWrm\000" |
| 60878 | /* 178519 */ "VPMOVSXBWrm\000" |
| 60879 | /* 178531 */ "VPMOVZXBWrm\000" |
| 60880 | /* 178543 */ "VPHADDWrm\000" |
| 60881 | /* 178553 */ "MMX_PHADDWrm\000" |
| 60882 | /* 178566 */ "VPADDWrm\000" |
| 60883 | /* 178575 */ "MMX_PADDWrm\000" |
| 60884 | /* 178587 */ "VPACKSSDWrm\000" |
| 60885 | /* 178599 */ "MMX_PACKSSDWrm\000" |
| 60886 | /* 178614 */ "VPACKUSDWrm\000" |
| 60887 | /* 178626 */ "PI2FWrm\000" |
| 60888 | /* 178634 */ "VPAVGWrm\000" |
| 60889 | /* 178643 */ "MMX_PAVGWrm\000" |
| 60890 | /* 178655 */ "VPMULHWrm\000" |
| 60891 | /* 178665 */ "MMX_PMULHWrm\000" |
| 60892 | /* 178678 */ "PF2IWrm\000" |
| 60893 | /* 178686 */ "VPSHLWrm\000" |
| 60894 | /* 178695 */ "VPSLLWrm\000" |
| 60895 | /* 178704 */ "MMX_PSLLWrm\000" |
| 60896 | /* 178716 */ "VPMULLWrm\000" |
| 60897 | /* 178726 */ "MMX_PMULLWrm\000" |
| 60898 | /* 178739 */ "VPSRLWrm\000" |
| 60899 | /* 178748 */ "MMX_PSRLWrm\000" |
| 60900 | /* 178760 */ "VPSIGNWrm\000" |
| 60901 | /* 178770 */ "MMX_PSIGNWrm\000" |
| 60902 | /* 178783 */ "VPCMPEQWrm\000" |
| 60903 | /* 178794 */ "MMX_PCMPEQWrm\000" |
| 60904 | /* 178808 */ "PMULHRWrm\000" |
| 60905 | /* 178818 */ "VPABSWrm\000" |
| 60906 | /* 178827 */ "MMX_PABSWrm\000" |
| 60907 | /* 178839 */ "VPMADDUBSWrm\000" |
| 60908 | /* 178852 */ "MMX_PMADDUBSWrm\000" |
| 60909 | /* 178868 */ "VPHSUBSWrm\000" |
| 60910 | /* 178879 */ "MMX_PHSUBSWrm\000" |
| 60911 | /* 178893 */ "VPSUBSWrm\000" |
| 60912 | /* 178903 */ "MMX_PSUBSWrm\000" |
| 60913 | /* 178916 */ "VPHADDSWrm\000" |
| 60914 | /* 178927 */ "MMX_PHADDSWrm\000" |
| 60915 | /* 178941 */ "VPADDSWrm\000" |
| 60916 | /* 178951 */ "MMX_PADDSWrm\000" |
| 60917 | /* 178964 */ "VPMINSWrm\000" |
| 60918 | /* 178974 */ "MMX_PMINSWrm\000" |
| 60919 | /* 178987 */ "VPMULHRSWrm\000" |
| 60920 | /* 178999 */ "MMX_PMULHRSWrm\000" |
| 60921 | /* 179014 */ "VPSUBUSWrm\000" |
| 60922 | /* 179025 */ "MMX_PSUBUSWrm\000" |
| 60923 | /* 179039 */ "VPADDUSWrm\000" |
| 60924 | /* 179050 */ "MMX_PADDUSWrm\000" |
| 60925 | /* 179064 */ "VPMAXSWrm\000" |
| 60926 | /* 179074 */ "MMX_PMAXSWrm\000" |
| 60927 | /* 179087 */ "VPCMPGTWrm\000" |
| 60928 | /* 179098 */ "MMX_PCMPGTWrm\000" |
| 60929 | /* 179112 */ "VPROTWrm\000" |
| 60930 | /* 179121 */ "VPBROADCASTWrm\000" |
| 60931 | /* 179136 */ "VPMULHUWrm\000" |
| 60932 | /* 179147 */ "MMX_PMULHUWrm\000" |
| 60933 | /* 179161 */ "VPMINUWrm\000" |
| 60934 | /* 179171 */ "VPHMINPOSUWrm\000" |
| 60935 | /* 179185 */ "VPMAXUWrm\000" |
| 60936 | /* 179195 */ "VMOVWrm\000" |
| 60937 | /* 179203 */ "VPMACSWWrm\000" |
| 60938 | /* 179214 */ "VPMACSSWWrm\000" |
| 60939 | /* 179226 */ "PFMAXrm\000" |
| 60940 | /* 179234 */ "VFMADDSUBPD4Yrm\000" |
| 60941 | /* 179250 */ "VFMSUBPD4Yrm\000" |
| 60942 | /* 179263 */ "VFNMSUBPD4Yrm\000" |
| 60943 | /* 179277 */ "VFMSUBADDPD4Yrm\000" |
| 60944 | /* 179293 */ "VFMADDPD4Yrm\000" |
| 60945 | /* 179306 */ "VFNMADDPD4Yrm\000" |
| 60946 | /* 179320 */ "VSM4RNDS4Yrm\000" |
| 60947 | /* 179333 */ "VFMADDSUBPS4Yrm\000" |
| 60948 | /* 179349 */ "VFMSUBPS4Yrm\000" |
| 60949 | /* 179362 */ "VFNMSUBPS4Yrm\000" |
| 60950 | /* 179376 */ "VFMSUBADDPS4Yrm\000" |
| 60951 | /* 179392 */ "VFMADDPS4Yrm\000" |
| 60952 | /* 179405 */ "VFNMADDPS4Yrm\000" |
| 60953 | /* 179419 */ "VSM4KEY4Yrm\000" |
| 60954 | /* 179431 */ "VCVTNEPS2BF16Yrm\000" |
| 60955 | /* 179448 */ "VMOVNTDQAYrm\000" |
| 60956 | /* 179461 */ "VMOVDQAYrm\000" |
| 60957 | /* 179472 */ "VPSUBBYrm\000" |
| 60958 | /* 179482 */ "VPADDBYrm\000" |
| 60959 | /* 179492 */ "VPSHUFBYrm\000" |
| 60960 | /* 179503 */ "VPAVGBYrm\000" |
| 60961 | /* 179513 */ "VGF2P8MULBYrm\000" |
| 60962 | /* 179527 */ "VPSIGNBYrm\000" |
| 60963 | /* 179538 */ "VPCMPEQBYrm\000" |
| 60964 | /* 179550 */ "VPABSBYrm\000" |
| 60965 | /* 179560 */ "VPSUBSBYrm\000" |
| 60966 | /* 179571 */ "VPADDSBYrm\000" |
| 60967 | /* 179582 */ "VPMINSBYrm\000" |
| 60968 | /* 179593 */ "VPSUBUSBYrm\000" |
| 60969 | /* 179605 */ "VPADDUSBYrm\000" |
| 60970 | /* 179617 */ "VPMAXSBYrm\000" |
| 60971 | /* 179628 */ "VPCMPGTBYrm\000" |
| 60972 | /* 179640 */ "VPBROADCASTBYrm\000" |
| 60973 | /* 179656 */ "VPMINUBYrm\000" |
| 60974 | /* 179667 */ "VPMAXUBYrm\000" |
| 60975 | /* 179678 */ "VPACKSSWBYrm\000" |
| 60976 | /* 179691 */ "VPACKUSWBYrm\000" |
| 60977 | /* 179704 */ "VAESDECYrm\000" |
| 60978 | /* 179715 */ "VAESENCYrm\000" |
| 60979 | /* 179726 */ "VPSRADYrm\000" |
| 60980 | /* 179736 */ "VPHSUBDYrm\000" |
| 60981 | /* 179747 */ "VPSUBDYrm\000" |
| 60982 | /* 179757 */ "VPMOVSXBDYrm\000" |
| 60983 | /* 179770 */ "VPMOVZXBDYrm\000" |
| 60984 | /* 179783 */ "VPHADDDYrm\000" |
| 60985 | /* 179794 */ "VPADDDYrm\000" |
| 60986 | /* 179804 */ "VPGATHERDDYrm\000" |
| 60987 | /* 179818 */ "VPSLLDYrm\000" |
| 60988 | /* 179828 */ "VPMULLDYrm\000" |
| 60989 | /* 179839 */ "VPSRLDYrm\000" |
| 60990 | /* 179849 */ "VPERMDYrm\000" |
| 60991 | /* 179859 */ "VPANDYrm\000" |
| 60992 | /* 179868 */ "VPSIGNDYrm\000" |
| 60993 | /* 179879 */ "VPERMIL2PDYrm\000" |
| 60994 | /* 179893 */ "VCVTDQ2PDYrm\000" |
| 60995 | /* 179906 */ "VCVTPS2PDYrm\000" |
| 60996 | /* 179919 */ "VMOVAPDYrm\000" |
| 60997 | /* 179930 */ "VADDSUBPDYrm\000" |
| 60998 | /* 179943 */ "VHSUBPDYrm\000" |
| 60999 | /* 179954 */ "VSUBPDYrm\000" |
| 61000 | /* 179964 */ "VMINCPDYrm\000" |
| 61001 | /* 179975 */ "VMAXCPDYrm\000" |
| 61002 | /* 179986 */ "VHADDPDYrm\000" |
| 61003 | /* 179997 */ "VADDPDYrm\000" |
| 61004 | /* 180007 */ "VANDPDYrm\000" |
| 61005 | /* 180017 */ "VGATHERDPDYrm\000" |
| 61006 | /* 180031 */ "VUNPCKHPDYrm\000" |
| 61007 | /* 180044 */ "VPERMILPDYrm\000" |
| 61008 | /* 180057 */ "VUNPCKLPDYrm\000" |
| 61009 | /* 180070 */ "VMULPDYrm\000" |
| 61010 | /* 180080 */ "VANDNPDYrm\000" |
| 61011 | /* 180091 */ "VMINPDYrm\000" |
| 61012 | /* 180101 */ "VGATHERQPDYrm\000" |
| 61013 | /* 180115 */ "VORPDYrm\000" |
| 61014 | /* 180124 */ "VXORPDYrm\000" |
| 61015 | /* 180134 */ "VTESTPDYrm\000" |
| 61016 | /* 180145 */ "VMOVUPDYrm\000" |
| 61017 | /* 180156 */ "VDIVPDYrm\000" |
| 61018 | /* 180166 */ "VMASKMOVPDYrm\000" |
| 61019 | /* 180180 */ "VMAXPDYrm\000" |
| 61020 | /* 180190 */ "VFRCZPDYrm\000" |
| 61021 | /* 180201 */ "VPCMPEQDYrm\000" |
| 61022 | /* 180213 */ "VPGATHERQDYrm\000" |
| 61023 | /* 180227 */ "VPABSDYrm\000" |
| 61024 | /* 180237 */ "VPMINSDYrm\000" |
| 61025 | /* 180248 */ "VPDPBSSDYrm\000" |
| 61026 | /* 180260 */ "VPDPWSSDYrm\000" |
| 61027 | /* 180272 */ "VBROADCASTSDYrm\000" |
| 61028 | /* 180288 */ "VPDPBUSDYrm\000" |
| 61029 | /* 180300 */ "VPDPWUSDYrm\000" |
| 61030 | /* 180312 */ "VPMAXSDYrm\000" |
| 61031 | /* 180323 */ "VPCMPGTDYrm\000" |
| 61032 | /* 180335 */ "VPBROADCASTDYrm\000" |
| 61033 | /* 180351 */ "VPMINUDYrm\000" |
| 61034 | /* 180362 */ "VPDPBSUDYrm\000" |
| 61035 | /* 180374 */ "VPDPWSUDYrm\000" |
| 61036 | /* 180386 */ "VPDPBUUDYrm\000" |
| 61037 | /* 180398 */ "VPDPWUUDYrm\000" |
| 61038 | /* 180410 */ "VPMAXUDYrm\000" |
| 61039 | /* 180421 */ "VPSRAVDYrm\000" |
| 61040 | /* 180432 */ "VPSLLVDYrm\000" |
| 61041 | /* 180443 */ "VPSRLVDYrm\000" |
| 61042 | /* 180454 */ "VPMASKMOVDYrm\000" |
| 61043 | /* 180468 */ "VPMADDWDYrm\000" |
| 61044 | /* 180480 */ "VPUNPCKHWDYrm\000" |
| 61045 | /* 180494 */ "VPUNPCKLWDYrm\000" |
| 61046 | /* 180508 */ "VPMOVSXWDYrm\000" |
| 61047 | /* 180521 */ "VPMOVZXWDYrm\000" |
| 61048 | /* 180534 */ "VPANDNYrm\000" |
| 61049 | /* 180544 */ "VMOVDDUPYrm\000" |
| 61050 | /* 180556 */ "VMOVSHDUPYrm\000" |
| 61051 | /* 180569 */ "VMOVSLDUPYrm\000" |
| 61052 | /* 180582 */ "VPSUBQYrm\000" |
| 61053 | /* 180592 */ "VPMOVSXBQYrm\000" |
| 61054 | /* 180605 */ "VPMOVZXBQYrm\000" |
| 61055 | /* 180618 */ "VCVTTPD2DQYrm\000" |
| 61056 | /* 180632 */ "VCVTPD2DQYrm\000" |
| 61057 | /* 180645 */ "VCVTTPS2DQYrm\000" |
| 61058 | /* 180659 */ "VCVTPS2DQYrm\000" |
| 61059 | /* 180672 */ "VPADDQYrm\000" |
| 61060 | /* 180682 */ "VPUNPCKHDQYrm\000" |
| 61061 | /* 180696 */ "VPUNPCKLDQYrm\000" |
| 61062 | /* 180710 */ "VPMULDQYrm\000" |
| 61063 | /* 180721 */ "VPUNPCKHQDQYrm\000" |
| 61064 | /* 180736 */ "VPUNPCKLQDQYrm\000" |
| 61065 | /* 180751 */ "VPGATHERDQYrm\000" |
| 61066 | /* 180765 */ "VPMULUDQYrm\000" |
| 61067 | /* 180777 */ "VPMOVSXDQYrm\000" |
| 61068 | /* 180790 */ "VPMOVZXDQYrm\000" |
| 61069 | /* 180803 */ "VPSLLQYrm\000" |
| 61070 | /* 180813 */ "VPSRLQYrm\000" |
| 61071 | /* 180823 */ "VPCMPEQQYrm\000" |
| 61072 | /* 180835 */ "VPGATHERQQYrm\000" |
| 61073 | /* 180849 */ "VPCMPGTQYrm\000" |
| 61074 | /* 180861 */ "VPBROADCASTQYrm\000" |
| 61075 | /* 180877 */ "VPMADD52HUQYrm\000" |
| 61076 | /* 180892 */ "VPMADD52LUQYrm\000" |
| 61077 | /* 180907 */ "VPSLLVQYrm\000" |
| 61078 | /* 180918 */ "VPSRLVQYrm\000" |
| 61079 | /* 180929 */ "VPMASKMOVQYrm\000" |
| 61080 | /* 180943 */ "VPMOVSXWQYrm\000" |
| 61081 | /* 180956 */ "VPMOVZXWQYrm\000" |
| 61082 | /* 180969 */ "VPORYrm\000" |
| 61083 | /* 180977 */ "VPXORYrm\000" |
| 61084 | /* 180986 */ "VPDPBSSDSYrm\000" |
| 61085 | /* 180999 */ "VPDPWSSDSYrm\000" |
| 61086 | /* 181012 */ "VPDPBUSDSYrm\000" |
| 61087 | /* 181025 */ "VPDPWUSDSYrm\000" |
| 61088 | /* 181038 */ "VPDPBSUDSYrm\000" |
| 61089 | /* 181051 */ "VPDPWSUDSYrm\000" |
| 61090 | /* 181064 */ "VPDPBUUDSYrm\000" |
| 61091 | /* 181077 */ "VPDPWUUDSYrm\000" |
| 61092 | /* 181090 */ "VCVTNEEBF162PSYrm\000" |
| 61093 | /* 181108 */ "VBCSTNEBF162PSYrm\000" |
| 61094 | /* 181126 */ "VCVTNEOBF162PSYrm\000" |
| 61095 | /* 181144 */ "VCVTPD2PSYrm\000" |
| 61096 | /* 181157 */ "VCVTNEEPH2PSYrm\000" |
| 61097 | /* 181173 */ "VCVTNEOPH2PSYrm\000" |
| 61098 | /* 181189 */ "VCVTPH2PSYrm\000" |
| 61099 | /* 181202 */ "VBCSTNESH2PSYrm\000" |
| 61100 | /* 181218 */ "VPERMIL2PSYrm\000" |
| 61101 | /* 181232 */ "VCVTDQ2PSYrm\000" |
| 61102 | /* 181245 */ "VMOVAPSYrm\000" |
| 61103 | /* 181256 */ "VADDSUBPSYrm\000" |
| 61104 | /* 181269 */ "VHSUBPSYrm\000" |
| 61105 | /* 181280 */ "VSUBPSYrm\000" |
| 61106 | /* 181290 */ "VMINCPSYrm\000" |
| 61107 | /* 181301 */ "VMAXCPSYrm\000" |
| 61108 | /* 181312 */ "VHADDPSYrm\000" |
| 61109 | /* 181323 */ "VADDPSYrm\000" |
| 61110 | /* 181333 */ "VANDPSYrm\000" |
| 61111 | /* 181343 */ "VGATHERDPSYrm\000" |
| 61112 | /* 181357 */ "VUNPCKHPSYrm\000" |
| 61113 | /* 181370 */ "VPERMILPSYrm\000" |
| 61114 | /* 181383 */ "VUNPCKLPSYrm\000" |
| 61115 | /* 181396 */ "VMULPSYrm\000" |
| 61116 | /* 181406 */ "VPERMPSYrm\000" |
| 61117 | /* 181417 */ "VANDNPSYrm\000" |
| 61118 | /* 181428 */ "VMINPSYrm\000" |
| 61119 | /* 181438 */ "VGATHERQPSYrm\000" |
| 61120 | /* 181452 */ "VORPSYrm\000" |
| 61121 | /* 181461 */ "VXORPSYrm\000" |
| 61122 | /* 181471 */ "VTESTPSYrm\000" |
| 61123 | /* 181482 */ "VMOVUPSYrm\000" |
| 61124 | /* 181493 */ "VDIVPSYrm\000" |
| 61125 | /* 181503 */ "VMASKMOVPSYrm\000" |
| 61126 | /* 181517 */ "VMAXPSYrm\000" |
| 61127 | /* 181527 */ "VFRCZPSYrm\000" |
| 61128 | /* 181538 */ "VBROADCASTSSYrm\000" |
| 61129 | /* 181554 */ "VAESDECLASTYrm\000" |
| 61130 | /* 181569 */ "VAESENCLASTYrm\000" |
| 61131 | /* 181584 */ "VPTESTYrm\000" |
| 61132 | /* 181594 */ "VLDDQUYrm\000" |
| 61133 | /* 181604 */ "VMOVDQUYrm\000" |
| 61134 | /* 181615 */ "VPSRAWYrm\000" |
| 61135 | /* 181625 */ "VPSADBWYrm\000" |
| 61136 | /* 181636 */ "VPUNPCKHBWYrm\000" |
| 61137 | /* 181650 */ "VPUNPCKLBWYrm\000" |
| 61138 | /* 181664 */ "VPHSUBWYrm\000" |
| 61139 | /* 181675 */ "VPSUBWYrm\000" |
| 61140 | /* 181685 */ "VPMOVSXBWYrm\000" |
| 61141 | /* 181698 */ "VPMOVZXBWYrm\000" |
| 61142 | /* 181711 */ "VPHADDWYrm\000" |
| 61143 | /* 181722 */ "VPADDWYrm\000" |
| 61144 | /* 181732 */ "VPACKSSDWYrm\000" |
| 61145 | /* 181745 */ "VPACKUSDWYrm\000" |
| 61146 | /* 181758 */ "VPAVGWYrm\000" |
| 61147 | /* 181768 */ "VPMULHWYrm\000" |
| 61148 | /* 181779 */ "VPSLLWYrm\000" |
| 61149 | /* 181789 */ "VPMULLWYrm\000" |
| 61150 | /* 181800 */ "VPSRLWYrm\000" |
| 61151 | /* 181810 */ "VPSIGNWYrm\000" |
| 61152 | /* 181821 */ "VPCMPEQWYrm\000" |
| 61153 | /* 181833 */ "VPABSWYrm\000" |
| 61154 | /* 181843 */ "VPMADDUBSWYrm\000" |
| 61155 | /* 181857 */ "VPHSUBSWYrm\000" |
| 61156 | /* 181869 */ "VPSUBSWYrm\000" |
| 61157 | /* 181880 */ "VPHADDSWYrm\000" |
| 61158 | /* 181892 */ "VPADDSWYrm\000" |
| 61159 | /* 181903 */ "VPMINSWYrm\000" |
| 61160 | /* 181914 */ "VPMULHRSWYrm\000" |
| 61161 | /* 181927 */ "VPSUBUSWYrm\000" |
| 61162 | /* 181939 */ "VPADDUSWYrm\000" |
| 61163 | /* 181951 */ "VPMAXSWYrm\000" |
| 61164 | /* 181962 */ "VPCMPGTWYrm\000" |
| 61165 | /* 181974 */ "VPBROADCASTWYrm\000" |
| 61166 | /* 181990 */ "VPMULHUWYrm\000" |
| 61167 | /* 182002 */ "VPMINUWYrm\000" |
| 61168 | /* 182013 */ "VPMAXUWYrm\000" |
| 61169 | /* 182024 */ "VMOVDQA32Zrm\000" |
| 61170 | /* 182037 */ "VMOVDQU32Zrm\000" |
| 61171 | /* 182050 */ "VBROADCASTF32X2Zrm\000" |
| 61172 | /* 182069 */ "VBROADCASTI32X2Zrm\000" |
| 61173 | /* 182088 */ "VBROADCASTF64X2Zrm\000" |
| 61174 | /* 182107 */ "VBROADCASTI64X2Zrm\000" |
| 61175 | /* 182126 */ "VMOVDQA64Zrm\000" |
| 61176 | /* 182139 */ "VCVTTSD2SI64Zrm\000" |
| 61177 | /* 182155 */ "VCVTSD2SI64Zrm\000" |
| 61178 | /* 182170 */ "VCVTTSH2SI64Zrm\000" |
| 61179 | /* 182186 */ "VCVTTSS2SI64Zrm\000" |
| 61180 | /* 182202 */ "VCVTSS2SI64Zrm\000" |
| 61181 | /* 182217 */ "VCVTTSD2USI64Zrm\000" |
| 61182 | /* 182234 */ "VCVTTSH2USI64Zrm\000" |
| 61183 | /* 182251 */ "VCVTTSS2USI64Zrm\000" |
| 61184 | /* 182268 */ "VMOVDQU64Zrm\000" |
| 61185 | /* 182281 */ "VSM4RNDS4Zrm\000" |
| 61186 | /* 182294 */ "VBROADCASTF32X4Zrm\000" |
| 61187 | /* 182313 */ "VBROADCASTI32X4Zrm\000" |
| 61188 | /* 182332 */ "VBROADCASTF64X4Zrm\000" |
| 61189 | /* 182351 */ "VBROADCASTI64X4Zrm\000" |
| 61190 | /* 182370 */ "VSM4KEY4Zrm\000" |
| 61191 | /* 182382 */ "VCVTNE2PS2BF16Zrm\000" |
| 61192 | /* 182400 */ "VCVTNEPS2BF16Zrm\000" |
| 61193 | /* 182417 */ "VSUBBF16Zrm\000" |
| 61194 | /* 182429 */ "VADDBF16Zrm\000" |
| 61195 | /* 182441 */ "VSCALEFBF16Zrm\000" |
| 61196 | /* 182456 */ "VMULBF16Zrm\000" |
| 61197 | /* 182468 */ "VMINBF16Zrm\000" |
| 61198 | /* 182480 */ "VCOMISBF16Zrm\000" |
| 61199 | /* 182494 */ "VDIVBF16Zrm\000" |
| 61200 | /* 182506 */ "VMAXBF16Zrm\000" |
| 61201 | /* 182518 */ "VMOVDQU16Zrm\000" |
| 61202 | /* 182531 */ "VCVT2PH2BF8Zrm\000" |
| 61203 | /* 182546 */ "VCVTBIASPH2BF8Zrm\000" |
| 61204 | /* 182564 */ "VCVTPH2BF8Zrm\000" |
| 61205 | /* 182578 */ "VCVT2PH2HF8Zrm\000" |
| 61206 | /* 182593 */ "VCVTBIASPH2HF8Zrm\000" |
| 61207 | /* 182611 */ "VCVTPH2HF8Zrm\000" |
| 61208 | /* 182625 */ "VMOVDQU8Zrm\000" |
| 61209 | /* 182637 */ "VBROADCASTF32X8Zrm\000" |
| 61210 | /* 182656 */ "VBROADCASTI32X8Zrm\000" |
| 61211 | /* 182675 */ "VMOVNTDQAZrm\000" |
| 61212 | /* 182688 */ "VPERMI2BZrm\000" |
| 61213 | /* 182700 */ "VPERMT2BZrm\000" |
| 61214 | /* 182712 */ "VPSUBBZrm\000" |
| 61215 | /* 182722 */ "VPADDBZrm\000" |
| 61216 | /* 182732 */ "VPEXPANDBZrm\000" |
| 61217 | /* 182745 */ "VPSHUFBZrm\000" |
| 61218 | /* 182756 */ "VPAVGBZrm\000" |
| 61219 | /* 182766 */ "VGF2P8MULBZrm\000" |
| 61220 | /* 182780 */ "VPBLENDMBZrm\000" |
| 61221 | /* 182793 */ "VPTESTNMBZrm\000" |
| 61222 | /* 182806 */ "VPSHUFBITQMBZrm\000" |
| 61223 | /* 182822 */ "VPERMBZrm\000" |
| 61224 | /* 182832 */ "VPTESTMBZrm\000" |
| 61225 | /* 182844 */ "VPCMPEQBZrm\000" |
| 61226 | /* 182856 */ "VPMULTISHIFTQBZrm\000" |
| 61227 | /* 182874 */ "VPABSBZrm\000" |
| 61228 | /* 182884 */ "VPSUBSBZrm\000" |
| 61229 | /* 182895 */ "VPADDSBZrm\000" |
| 61230 | /* 182906 */ "VPMINSBZrm\000" |
| 61231 | /* 182917 */ "VPSUBUSBZrm\000" |
| 61232 | /* 182929 */ "VPADDUSBZrm\000" |
| 61233 | /* 182941 */ "VPMAXSBZrm\000" |
| 61234 | /* 182952 */ "VPCMPGTBZrm\000" |
| 61235 | /* 182964 */ "VPOPCNTBZrm\000" |
| 61236 | /* 182976 */ "VPBROADCASTBZrm\000" |
| 61237 | /* 182992 */ "VPMINUBZrm\000" |
| 61238 | /* 183003 */ "VPMAXUBZrm\000" |
| 61239 | /* 183014 */ "VPACKSSWBZrm\000" |
| 61240 | /* 183027 */ "VPACKUSWBZrm\000" |
| 61241 | /* 183040 */ "VAESDECZrm\000" |
| 61242 | /* 183051 */ "VAESENCZrm\000" |
| 61243 | /* 183062 */ "VPERMI2DZrm\000" |
| 61244 | /* 183074 */ "VPERMT2DZrm\000" |
| 61245 | /* 183086 */ "VPSRADZrm\000" |
| 61246 | /* 183096 */ "VPSUBDZrm\000" |
| 61247 | /* 183106 */ "VPMOVSXBDZrm\000" |
| 61248 | /* 183119 */ "VPMOVZXBDZrm\000" |
| 61249 | /* 183132 */ "VPADDDZrm\000" |
| 61250 | /* 183142 */ "VPANDDZrm\000" |
| 61251 | /* 183152 */ "VPEXPANDDZrm\000" |
| 61252 | /* 183165 */ "VPGATHERDDZrm\000" |
| 61253 | /* 183179 */ "VPSLLDZrm\000" |
| 61254 | /* 183189 */ "VPMULLDZrm\000" |
| 61255 | /* 183200 */ "VPSRLDZrm\000" |
| 61256 | /* 183210 */ "VPBLENDMDZrm\000" |
| 61257 | /* 183223 */ "VPTESTNMDZrm\000" |
| 61258 | /* 183236 */ "VPERMDZrm\000" |
| 61259 | /* 183246 */ "VPTESTMDZrm\000" |
| 61260 | /* 183258 */ "VPANDNDZrm\000" |
| 61261 | /* 183269 */ "VCVTPH2PDZrm\000" |
| 61262 | /* 183282 */ "VPERMI2PDZrm\000" |
| 61263 | /* 183295 */ "VCVTDQ2PDZrm\000" |
| 61264 | /* 183308 */ "VCVTUDQ2PDZrm\000" |
| 61265 | /* 183322 */ "VCVTQQ2PDZrm\000" |
| 61266 | /* 183335 */ "VCVTUQQ2PDZrm\000" |
| 61267 | /* 183349 */ "VCVTPS2PDZrm\000" |
| 61268 | /* 183362 */ "VPERMT2PDZrm\000" |
| 61269 | /* 183375 */ "VMOVAPDZrm\000" |
| 61270 | /* 183386 */ "VSUBPDZrm\000" |
| 61271 | /* 183396 */ "VMINCPDZrm\000" |
| 61272 | /* 183407 */ "VMAXCPDZrm\000" |
| 61273 | /* 183418 */ "VADDPDZrm\000" |
| 61274 | /* 183428 */ "VEXPANDPDZrm\000" |
| 61275 | /* 183441 */ "VANDPDZrm\000" |
| 61276 | /* 183451 */ "VGATHERDPDZrm\000" |
| 61277 | /* 183465 */ "VSCALEFPDZrm\000" |
| 61278 | /* 183478 */ "VUNPCKHPDZrm\000" |
| 61279 | /* 183491 */ "VPERMILPDZrm\000" |
| 61280 | /* 183504 */ "VUNPCKLPDZrm\000" |
| 61281 | /* 183517 */ "VMULPDZrm\000" |
| 61282 | /* 183527 */ "VBLENDMPDZrm\000" |
| 61283 | /* 183540 */ "VPERMPDZrm\000" |
| 61284 | /* 183551 */ "VANDNPDZrm\000" |
| 61285 | /* 183562 */ "VMINPDZrm\000" |
| 61286 | /* 183572 */ "VGATHERQPDZrm\000" |
| 61287 | /* 183586 */ "VORPDZrm\000" |
| 61288 | /* 183595 */ "VXORPDZrm\000" |
| 61289 | /* 183605 */ "VMOVUPDZrm\000" |
| 61290 | /* 183616 */ "VDIVPDZrm\000" |
| 61291 | /* 183626 */ "VMAXPDZrm\000" |
| 61292 | /* 183636 */ "VPCMPEQDZrm\000" |
| 61293 | /* 183648 */ "VPGATHERQDZrm\000" |
| 61294 | /* 183662 */ "VPORDZrm\000" |
| 61295 | /* 183671 */ "VPXORDZrm\000" |
| 61296 | /* 183681 */ "VCVTSI642SDZrm\000" |
| 61297 | /* 183696 */ "VCVTUSI642SDZrm\000" |
| 61298 | /* 183712 */ "VCVTSH2SDZrm\000" |
| 61299 | /* 183725 */ "VCVTSI2SDZrm\000" |
| 61300 | /* 183738 */ "VCVTUSI2SDZrm\000" |
| 61301 | /* 183752 */ "VCVTSS2SDZrm\000" |
| 61302 | /* 183765 */ "VRCP14SDZrm\000" |
| 61303 | /* 183777 */ "VRSQRT14SDZrm\000" |
| 61304 | /* 183791 */ "VPABSDZrm\000" |
| 61305 | /* 183801 */ "VSUBSDZrm\000" |
| 61306 | /* 183811 */ "VMINCSDZrm\000" |
| 61307 | /* 183822 */ "VMAXCSDZrm\000" |
| 61308 | /* 183833 */ "VADDSDZrm\000" |
| 61309 | /* 183843 */ "VSCALEFSDZrm\000" |
| 61310 | /* 183856 */ "VUCOMISDZrm\000" |
| 61311 | /* 183868 */ "VCOMISDZrm\000" |
| 61312 | /* 183879 */ "VMULSDZrm\000" |
| 61313 | /* 183889 */ "VPMINSDZrm\000" |
| 61314 | /* 183900 */ "VMINSDZrm\000" |
| 61315 | /* 183910 */ "VBROADCASTSDZrm\000" |
| 61316 | /* 183926 */ "VDIVSDZrm\000" |
| 61317 | /* 183936 */ "VMOVSDZrm\000" |
| 61318 | /* 183946 */ "VPMAXSDZrm\000" |
| 61319 | /* 183957 */ "VMAXSDZrm\000" |
| 61320 | /* 183967 */ "VUCOMXSDZrm\000" |
| 61321 | /* 183979 */ "VP2INTERSECTDZrm\000" |
| 61322 | /* 183996 */ "VPCONFLICTDZrm\000" |
| 61323 | /* 184011 */ "VPCMPGTDZrm\000" |
| 61324 | /* 184023 */ "VPOPCNTDZrm\000" |
| 61325 | /* 184035 */ "VPLZCNTDZrm\000" |
| 61326 | /* 184047 */ "VPBROADCASTDZrm\000" |
| 61327 | /* 184063 */ "VPMINUDZrm\000" |
| 61328 | /* 184074 */ "VPMAXUDZrm\000" |
| 61329 | /* 184085 */ "VPSRAVDZrm\000" |
| 61330 | /* 184096 */ "VPSLLVDZrm\000" |
| 61331 | /* 184107 */ "VPROLVDZrm\000" |
| 61332 | /* 184118 */ "VPSRLVDZrm\000" |
| 61333 | /* 184129 */ "VPRORVDZrm\000" |
| 61334 | /* 184140 */ "VPMADDWDZrm\000" |
| 61335 | /* 184152 */ "VPUNPCKHWDZrm\000" |
| 61336 | /* 184166 */ "VPUNPCKLWDZrm\000" |
| 61337 | /* 184180 */ "VPMOVSXWDZrm\000" |
| 61338 | /* 184193 */ "VPMOVZXWDZrm\000" |
| 61339 | /* 184206 */ "VCVTHF82PHZrm\000" |
| 61340 | /* 184220 */ "VCVTPD2PHZrm\000" |
| 61341 | /* 184233 */ "VCVTDQ2PHZrm\000" |
| 61342 | /* 184246 */ "VCVTUDQ2PHZrm\000" |
| 61343 | /* 184260 */ "VCVTQQ2PHZrm\000" |
| 61344 | /* 184273 */ "VCVTUQQ2PHZrm\000" |
| 61345 | /* 184287 */ "VCVTW2PHZrm\000" |
| 61346 | /* 184299 */ "VCVTUW2PHZrm\000" |
| 61347 | /* 184312 */ "VSUBPHZrm\000" |
| 61348 | /* 184322 */ "VFCMULCPHZrm\000" |
| 61349 | /* 184335 */ "VFMULCPHZrm\000" |
| 61350 | /* 184347 */ "VMINCPHZrm\000" |
| 61351 | /* 184358 */ "VMAXCPHZrm\000" |
| 61352 | /* 184369 */ "VADDPHZrm\000" |
| 61353 | /* 184379 */ "VSCALEFPHZrm\000" |
| 61354 | /* 184392 */ "VMULPHZrm\000" |
| 61355 | /* 184402 */ "VMINPHZrm\000" |
| 61356 | /* 184412 */ "VDIVPHZrm\000" |
| 61357 | /* 184422 */ "VMAXPHZrm\000" |
| 61358 | /* 184432 */ "VCVTSI642SHZrm\000" |
| 61359 | /* 184447 */ "VCVTUSI642SHZrm\000" |
| 61360 | /* 184463 */ "VCVTSD2SHZrm\000" |
| 61361 | /* 184476 */ "VCVTSI2SHZrm\000" |
| 61362 | /* 184489 */ "VCVTUSI2SHZrm\000" |
| 61363 | /* 184503 */ "VCVTSS2SHZrm\000" |
| 61364 | /* 184516 */ "VSUBSHZrm\000" |
| 61365 | /* 184526 */ "VFCMULCSHZrm\000" |
| 61366 | /* 184539 */ "VFMULCSHZrm\000" |
| 61367 | /* 184551 */ "VMINCSHZrm\000" |
| 61368 | /* 184562 */ "VMAXCSHZrm\000" |
| 61369 | /* 184573 */ "VADDSHZrm\000" |
| 61370 | /* 184583 */ "VSCALEFSHZrm\000" |
| 61371 | /* 184596 */ "VUCOMISHZrm\000" |
| 61372 | /* 184608 */ "VCOMISHZrm\000" |
| 61373 | /* 184619 */ "VMULSHZrm\000" |
| 61374 | /* 184629 */ "VMINSHZrm\000" |
| 61375 | /* 184639 */ "VRCPSHZrm\000" |
| 61376 | /* 184649 */ "VRSQRTSHZrm\000" |
| 61377 | /* 184661 */ "VDIVSHZrm\000" |
| 61378 | /* 184671 */ "VMOVSHZrm\000" |
| 61379 | /* 184681 */ "VMAXSHZrm\000" |
| 61380 | /* 184691 */ "VUCOMXSHZrm\000" |
| 61381 | /* 184703 */ "VMOVDI2PDIZrm\000" |
| 61382 | /* 184717 */ "VMOVZPDILo2PDIZrm\000" |
| 61383 | /* 184735 */ "VMOVQI2PQIZrm\000" |
| 61384 | /* 184749 */ "VMOV64toPQIZrm\000" |
| 61385 | /* 184764 */ "VCVTTSD2SIZrm\000" |
| 61386 | /* 184778 */ "VCVTSD2SIZrm\000" |
| 61387 | /* 184791 */ "VCVTTSH2SIZrm\000" |
| 61388 | /* 184805 */ "VCVTTSS2SIZrm\000" |
| 61389 | /* 184819 */ "VCVTSS2SIZrm\000" |
| 61390 | /* 184832 */ "VCVTTSD2USIZrm\000" |
| 61391 | /* 184847 */ "VCVTTSH2USIZrm\000" |
| 61392 | /* 184862 */ "VCVTTSS2USIZrm\000" |
| 61393 | /* 184877 */ "VMOVZPWILo2PWIZrm\000" |
| 61394 | /* 184895 */ "VMOVDDUPZrm\000" |
| 61395 | /* 184907 */ "VMOVSHDUPZrm\000" |
| 61396 | /* 184920 */ "VMOVSLDUPZrm\000" |
| 61397 | /* 184933 */ "VPERMI2QZrm\000" |
| 61398 | /* 184945 */ "VPERMT2QZrm\000" |
| 61399 | /* 184957 */ "VPSRAQZrm\000" |
| 61400 | /* 184967 */ "VPSUBQZrm\000" |
| 61401 | /* 184977 */ "VPMOVSXBQZrm\000" |
| 61402 | /* 184990 */ "VPMOVZXBQZrm\000" |
| 61403 | /* 185003 */ "VCVTTPD2DQZrm\000" |
| 61404 | /* 185017 */ "VCVTPD2DQZrm\000" |
| 61405 | /* 185030 */ "VCVTTPH2DQZrm\000" |
| 61406 | /* 185044 */ "VCVTPH2DQZrm\000" |
| 61407 | /* 185057 */ "VCVTTPS2DQZrm\000" |
| 61408 | /* 185071 */ "VCVTPS2DQZrm\000" |
| 61409 | /* 185084 */ "VPADDQZrm\000" |
| 61410 | /* 185094 */ "VPUNPCKHDQZrm\000" |
| 61411 | /* 185108 */ "VPUNPCKLDQZrm\000" |
| 61412 | /* 185122 */ "VPMULDQZrm\000" |
| 61413 | /* 185133 */ "VPANDQZrm\000" |
| 61414 | /* 185143 */ "VPEXPANDQZrm\000" |
| 61415 | /* 185156 */ "VPUNPCKHQDQZrm\000" |
| 61416 | /* 185171 */ "VPUNPCKLQDQZrm\000" |
| 61417 | /* 185186 */ "VPGATHERDQZrm\000" |
| 61418 | /* 185200 */ "VCVTTPD2UDQZrm\000" |
| 61419 | /* 185215 */ "VCVTPD2UDQZrm\000" |
| 61420 | /* 185229 */ "VCVTTPH2UDQZrm\000" |
| 61421 | /* 185244 */ "VCVTPH2UDQZrm\000" |
| 61422 | /* 185258 */ "VCVTTPS2UDQZrm\000" |
| 61423 | /* 185273 */ "VCVTPS2UDQZrm\000" |
| 61424 | /* 185287 */ "VPMULUDQZrm\000" |
| 61425 | /* 185299 */ "VPMOVSXDQZrm\000" |
| 61426 | /* 185312 */ "VPMOVZXDQZrm\000" |
| 61427 | /* 185325 */ "VPSLLQZrm\000" |
| 61428 | /* 185335 */ "VPMULLQZrm\000" |
| 61429 | /* 185346 */ "VPSRLQZrm\000" |
| 61430 | /* 185356 */ "VPBLENDMQZrm\000" |
| 61431 | /* 185369 */ "VPTESTNMQZrm\000" |
| 61432 | /* 185382 */ "VPERMQZrm\000" |
| 61433 | /* 185392 */ "VPTESTMQZrm\000" |
| 61434 | /* 185404 */ "VPANDNQZrm\000" |
| 61435 | /* 185415 */ "VCVTTPD2QQZrm\000" |
| 61436 | /* 185429 */ "VCVTPD2QQZrm\000" |
| 61437 | /* 185442 */ "VCVTTPH2QQZrm\000" |
| 61438 | /* 185456 */ "VCVTPH2QQZrm\000" |
| 61439 | /* 185469 */ "VCVTTPS2QQZrm\000" |
| 61440 | /* 185483 */ "VCVTPS2QQZrm\000" |
| 61441 | /* 185496 */ "VPCMPEQQZrm\000" |
| 61442 | /* 185508 */ "VPGATHERQQZrm\000" |
| 61443 | /* 185522 */ "VCVTTPD2UQQZrm\000" |
| 61444 | /* 185537 */ "VCVTPD2UQQZrm\000" |
| 61445 | /* 185551 */ "VCVTTPH2UQQZrm\000" |
| 61446 | /* 185566 */ "VCVTPH2UQQZrm\000" |
| 61447 | /* 185580 */ "VCVTTPS2UQQZrm\000" |
| 61448 | /* 185595 */ "VCVTPS2UQQZrm\000" |
| 61449 | /* 185609 */ "VPORQZrm\000" |
| 61450 | /* 185618 */ "VPXORQZrm\000" |
| 61451 | /* 185628 */ "VPABSQZrm\000" |
| 61452 | /* 185638 */ "VPMINSQZrm\000" |
| 61453 | /* 185649 */ "VPMAXSQZrm\000" |
| 61454 | /* 185660 */ "VP2INTERSECTQZrm\000" |
| 61455 | /* 185677 */ "VPCONFLICTQZrm\000" |
| 61456 | /* 185692 */ "VPCMPGTQZrm\000" |
| 61457 | /* 185704 */ "VPOPCNTQZrm\000" |
| 61458 | /* 185716 */ "VPLZCNTQZrm\000" |
| 61459 | /* 185728 */ "VPBROADCASTQZrm\000" |
| 61460 | /* 185744 */ "VPMINUQZrm\000" |
| 61461 | /* 185755 */ "VPMAXUQZrm\000" |
| 61462 | /* 185766 */ "VPSRAVQZrm\000" |
| 61463 | /* 185777 */ "VPSLLVQZrm\000" |
| 61464 | /* 185788 */ "VPROLVQZrm\000" |
| 61465 | /* 185799 */ "VPSRLVQZrm\000" |
| 61466 | /* 185810 */ "VPRORVQZrm\000" |
| 61467 | /* 185821 */ "VPMOVSXWQZrm\000" |
| 61468 | /* 185834 */ "VPMOVZXWQZrm\000" |
| 61469 | /* 185847 */ "VCVT2PH2BF8SZrm\000" |
| 61470 | /* 185863 */ "VCVTBIASPH2BF8SZrm\000" |
| 61471 | /* 185882 */ "VCVTPH2BF8SZrm\000" |
| 61472 | /* 185897 */ "VCVT2PH2HF8SZrm\000" |
| 61473 | /* 185913 */ "VCVTBIASPH2HF8SZrm\000" |
| 61474 | /* 185932 */ "VCVTPH2HF8SZrm\000" |
| 61475 | /* 185947 */ "VCVTTBF162IBSZrm\000" |
| 61476 | /* 185964 */ "VCVTBF162IBSZrm\000" |
| 61477 | /* 185980 */ "VCVTTPH2IBSZrm\000" |
| 61478 | /* 185995 */ "VCVTPH2IBSZrm\000" |
| 61479 | /* 186009 */ "VCVTTPS2IBSZrm\000" |
| 61480 | /* 186024 */ "VCVTPS2IBSZrm\000" |
| 61481 | /* 186038 */ "VCVTTBF162IUBSZrm\000" |
| 61482 | /* 186056 */ "VCVTBF162IUBSZrm\000" |
| 61483 | /* 186073 */ "VCVTTPH2IUBSZrm\000" |
| 61484 | /* 186089 */ "VCVTPH2IUBSZrm\000" |
| 61485 | /* 186104 */ "VCVTTPS2IUBSZrm\000" |
| 61486 | /* 186120 */ "VCVTPS2IUBSZrm\000" |
| 61487 | /* 186135 */ "VCVTPD2PSZrm\000" |
| 61488 | /* 186148 */ "VCVTPH2PSZrm\000" |
| 61489 | /* 186161 */ "VPERMI2PSZrm\000" |
| 61490 | /* 186174 */ "VCVTDQ2PSZrm\000" |
| 61491 | /* 186187 */ "VCVTUDQ2PSZrm\000" |
| 61492 | /* 186201 */ "VCVTQQ2PSZrm\000" |
| 61493 | /* 186214 */ "VCVTUQQ2PSZrm\000" |
| 61494 | /* 186228 */ "VPERMT2PSZrm\000" |
| 61495 | /* 186241 */ "VMOVAPSZrm\000" |
| 61496 | /* 186252 */ "VSUBPSZrm\000" |
| 61497 | /* 186262 */ "VMINCPSZrm\000" |
| 61498 | /* 186273 */ "VMAXCPSZrm\000" |
| 61499 | /* 186284 */ "VADDPSZrm\000" |
| 61500 | /* 186294 */ "VEXPANDPSZrm\000" |
| 61501 | /* 186307 */ "VANDPSZrm\000" |
| 61502 | /* 186317 */ "VGATHERDPSZrm\000" |
| 61503 | /* 186331 */ "VSCALEFPSZrm\000" |
| 61504 | /* 186344 */ "VUNPCKHPSZrm\000" |
| 61505 | /* 186357 */ "VPERMILPSZrm\000" |
| 61506 | /* 186370 */ "VUNPCKLPSZrm\000" |
| 61507 | /* 186383 */ "VMULPSZrm\000" |
| 61508 | /* 186393 */ "VBLENDMPSZrm\000" |
| 61509 | /* 186406 */ "VPERMPSZrm\000" |
| 61510 | /* 186417 */ "VANDNPSZrm\000" |
| 61511 | /* 186428 */ "VMINPSZrm\000" |
| 61512 | /* 186438 */ "VGATHERQPSZrm\000" |
| 61513 | /* 186452 */ "VORPSZrm\000" |
| 61514 | /* 186461 */ "VXORPSZrm\000" |
| 61515 | /* 186471 */ "VMOVUPSZrm\000" |
| 61516 | /* 186482 */ "VDIVPSZrm\000" |
| 61517 | /* 186492 */ "VMAXPSZrm\000" |
| 61518 | /* 186502 */ "VCVTTPD2DQSZrm\000" |
| 61519 | /* 186517 */ "VCVTTPS2DQSZrm\000" |
| 61520 | /* 186532 */ "VCVTTPD2UDQSZrm\000" |
| 61521 | /* 186548 */ "VCVTTPS2UDQSZrm\000" |
| 61522 | /* 186564 */ "VCVTTPD2QQSZrm\000" |
| 61523 | /* 186579 */ "VCVTTPS2QQSZrm\000" |
| 61524 | /* 186594 */ "VCVTTPD2UQQSZrm\000" |
| 61525 | /* 186610 */ "VCVTTPS2UQQSZrm\000" |
| 61526 | /* 186626 */ "VCVTSI642SSZrm\000" |
| 61527 | /* 186641 */ "VCVTUSI642SSZrm\000" |
| 61528 | /* 186657 */ "VCVTSD2SSZrm\000" |
| 61529 | /* 186670 */ "VCVTSH2SSZrm\000" |
| 61530 | /* 186683 */ "VCVTSI2SSZrm\000" |
| 61531 | /* 186696 */ "VCVTUSI2SSZrm\000" |
| 61532 | /* 186710 */ "VRCP14SSZrm\000" |
| 61533 | /* 186722 */ "VRSQRT14SSZrm\000" |
| 61534 | /* 186736 */ "VSUBSSZrm\000" |
| 61535 | /* 186746 */ "VMINCSSZrm\000" |
| 61536 | /* 186757 */ "VMAXCSSZrm\000" |
| 61537 | /* 186768 */ "VADDSSZrm\000" |
| 61538 | /* 186778 */ "VSCALEFSSZrm\000" |
| 61539 | /* 186791 */ "VUCOMISSZrm\000" |
| 61540 | /* 186803 */ "VCOMISSZrm\000" |
| 61541 | /* 186814 */ "VMULSSZrm\000" |
| 61542 | /* 186824 */ "VMINSSZrm\000" |
| 61543 | /* 186834 */ "VBROADCASTSSZrm\000" |
| 61544 | /* 186850 */ "VDIVSSZrm\000" |
| 61545 | /* 186860 */ "VMOVSSZrm\000" |
| 61546 | /* 186870 */ "VMAXSSZrm\000" |
| 61547 | /* 186880 */ "VUCOMXSSZrm\000" |
| 61548 | /* 186892 */ "VAESDECLASTZrm\000" |
| 61549 | /* 186907 */ "VAESENCLASTZrm\000" |
| 61550 | /* 186922 */ "VCVTTPH2WZrm\000" |
| 61551 | /* 186935 */ "VCVTPH2WZrm\000" |
| 61552 | /* 186947 */ "VPERMI2WZrm\000" |
| 61553 | /* 186959 */ "VPERMT2WZrm\000" |
| 61554 | /* 186971 */ "VPSRAWZrm\000" |
| 61555 | /* 186981 */ "VPSADBWZrm\000" |
| 61556 | /* 186992 */ "VPUNPCKHBWZrm\000" |
| 61557 | /* 187006 */ "VPUNPCKLBWZrm\000" |
| 61558 | /* 187020 */ "VPSUBWZrm\000" |
| 61559 | /* 187030 */ "VPMOVSXBWZrm\000" |
| 61560 | /* 187043 */ "VPMOVZXBWZrm\000" |
| 61561 | /* 187056 */ "VPADDWZrm\000" |
| 61562 | /* 187066 */ "VPEXPANDWZrm\000" |
| 61563 | /* 187079 */ "VPACKSSDWZrm\000" |
| 61564 | /* 187092 */ "VPACKUSDWZrm\000" |
| 61565 | /* 187105 */ "VPAVGWZrm\000" |
| 61566 | /* 187115 */ "VPMULHWZrm\000" |
| 61567 | /* 187126 */ "VPSLLWZrm\000" |
| 61568 | /* 187136 */ "VPMULLWZrm\000" |
| 61569 | /* 187147 */ "VPSRLWZrm\000" |
| 61570 | /* 187157 */ "VPBLENDMWZrm\000" |
| 61571 | /* 187170 */ "VPTESTNMWZrm\000" |
| 61572 | /* 187183 */ "VPERMWZrm\000" |
| 61573 | /* 187193 */ "VPTESTMWZrm\000" |
| 61574 | /* 187205 */ "VPCMPEQWZrm\000" |
| 61575 | /* 187217 */ "VPABSWZrm\000" |
| 61576 | /* 187227 */ "VPMADDUBSWZrm\000" |
| 61577 | /* 187241 */ "VPSUBSWZrm\000" |
| 61578 | /* 187252 */ "VPADDSWZrm\000" |
| 61579 | /* 187263 */ "VPMINSWZrm\000" |
| 61580 | /* 187274 */ "VPMULHRSWZrm\000" |
| 61581 | /* 187287 */ "VPSUBUSWZrm\000" |
| 61582 | /* 187299 */ "VPADDUSWZrm\000" |
| 61583 | /* 187311 */ "VPMAXSWZrm\000" |
| 61584 | /* 187322 */ "VPCMPGTWZrm\000" |
| 61585 | /* 187334 */ "VPOPCNTWZrm\000" |
| 61586 | /* 187346 */ "VPBROADCASTWZrm\000" |
| 61587 | /* 187362 */ "VCVTTPH2UWZrm\000" |
| 61588 | /* 187376 */ "VCVTPH2UWZrm\000" |
| 61589 | /* 187389 */ "VPMULHUWZrm\000" |
| 61590 | /* 187401 */ "VPMINUWZrm\000" |
| 61591 | /* 187412 */ "VPMAXUWZrm\000" |
| 61592 | /* 187423 */ "VPSRAVWZrm\000" |
| 61593 | /* 187434 */ "VPSLLVWZrm\000" |
| 61594 | /* 187445 */ "VPSRLVWZrm\000" |
| 61595 | /* 187456 */ "VCVT2PS2PHXZrm\000" |
| 61596 | /* 187471 */ "VCVTPS2PHXZrm\000" |
| 61597 | /* 187485 */ "VCVTPH2PSXZrm\000" |
| 61598 | /* 187499 */ "VPPERMrrm\000" |
| 61599 | /* 187509 */ "VPCMOVrrm\000" |
| 61600 | /* 187519 */ "VPCMOVYrrm\000" |
| 61601 | /* 187530 */ "MOV16sm\000" |
| 61602 | /* 187538 */ "SEH_StackAlign\000" |
| 61603 | /* 187553 */ "SEH_UnwindVersion\000" |
| 61604 | /* 187571 */ "EH_SjLj_Setup\000" |
| 61605 | /* 187585 */ "SUB_FST0r\000" |
| 61606 | /* 187595 */ "ADD_FST0r\000" |
| 61607 | /* 187605 */ "MUL_FST0r\000" |
| 61608 | /* 187615 */ "COM_FST0r\000" |
| 61609 | /* 187625 */ "COMP_FST0r\000" |
| 61610 | /* 187636 */ "SUBR_FST0r\000" |
| 61611 | /* 187647 */ "DIVR_FST0r\000" |
| 61612 | /* 187658 */ "DIV_FST0r\000" |
| 61613 | /* 187668 */ "PLEA32r\000" |
| 61614 | /* 187676 */ "DEC32r\000" |
| 61615 | /* 187683 */ "INC32r\000" |
| 61616 | /* 187690 */ "MOVPC32r\000" |
| 61617 | /* 187699 */ "SETB_C32r\000" |
| 61618 | /* 187709 */ "RDSEED32r\000" |
| 61619 | /* 187719 */ "RDRAND32r\000" |
| 61620 | /* 187729 */ "NEG32r\000" |
| 61621 | /* 187736 */ "PUSH32r\000" |
| 61622 | /* 187744 */ "CALL32r\000" |
| 61623 | /* 187752 */ "IMUL32r\000" |
| 61624 | /* 187760 */ "CLZERO32r\000" |
| 61625 | /* 187770 */ "BSWAP32r\000" |
| 61626 | /* 187779 */ "JMP32r\000" |
| 61627 | /* 187786 */ "POP32r\000" |
| 61628 | /* 187793 */ "STR32r\000" |
| 61629 | /* 187800 */ "SLDT32r\000" |
| 61630 | /* 187808 */ "NOT32r\000" |
| 61631 | /* 187815 */ "IDIV32r\000" |
| 61632 | /* 187823 */ "SMSW32r\000" |
| 61633 | /* 187831 */ "LEA64_32r\000" |
| 61634 | /* 187841 */ "PLEA64r\000" |
| 61635 | /* 187849 */ "DEC64r\000" |
| 61636 | /* 187856 */ "INC64r\000" |
| 61637 | /* 187863 */ "SETB_C64r\000" |
| 61638 | /* 187873 */ "RDSEED64r\000" |
| 61639 | /* 187883 */ "RDRAND64r\000" |
| 61640 | /* 187893 */ "PTWRITE64r\000" |
| 61641 | /* 187904 */ "NEG64r\000" |
| 61642 | /* 187911 */ "PUSH64r\000" |
| 61643 | /* 187919 */ "CALL64r\000" |
| 61644 | /* 187927 */ "IMUL64r\000" |
| 61645 | /* 187935 */ "CLZERO64r\000" |
| 61646 | /* 187945 */ "BSWAP64r\000" |
| 61647 | /* 187954 */ "PUSHP64r\000" |
| 61648 | /* 187963 */ "JMP64r\000" |
| 61649 | /* 187970 */ "POP64r\000" |
| 61650 | /* 187977 */ "POPP64r\000" |
| 61651 | /* 187985 */ "STR64r\000" |
| 61652 | /* 187992 */ "SLDT64r\000" |
| 61653 | /* 188000 */ "NOT64r\000" |
| 61654 | /* 188007 */ "IDIV64r\000" |
| 61655 | /* 188015 */ "SMSW64r\000" |
| 61656 | /* 188023 */ "LEA16r\000" |
| 61657 | /* 188030 */ "DEC16r\000" |
| 61658 | /* 188037 */ "INC16r\000" |
| 61659 | /* 188044 */ "RDSEED16r\000" |
| 61660 | /* 188054 */ "RDRAND16r\000" |
| 61661 | /* 188064 */ "NEG16r\000" |
| 61662 | /* 188071 */ "PUSH16r\000" |
| 61663 | /* 188079 */ "CALL16r\000" |
| 61664 | /* 188087 */ "IMUL16r\000" |
| 61665 | /* 188095 */ "JMP16r\000" |
| 61666 | /* 188102 */ "POP16r\000" |
| 61667 | /* 188109 */ "STR16r\000" |
| 61668 | /* 188116 */ "LKGS16r\000" |
| 61669 | /* 188124 */ "LLDT16r\000" |
| 61670 | /* 188132 */ "SLDT16r\000" |
| 61671 | /* 188140 */ "NOT16r\000" |
| 61672 | /* 188147 */ "IDIV16r\000" |
| 61673 | /* 188155 */ "LMSW16r\000" |
| 61674 | /* 188163 */ "SMSW16r\000" |
| 61675 | /* 188171 */ "FNSTSW16r\000" |
| 61676 | /* 188181 */ "LEA64_16r\000" |
| 61677 | /* 188191 */ "VFMSUB231BF16Z256r\000" |
| 61678 | /* 188210 */ "VFNMSUB231BF16Z256r\000" |
| 61679 | /* 188230 */ "VFMADD231BF16Z256r\000" |
| 61680 | /* 188249 */ "VFNMADD231BF16Z256r\000" |
| 61681 | /* 188269 */ "VFMSUB132BF16Z256r\000" |
| 61682 | /* 188288 */ "VFNMSUB132BF16Z256r\000" |
| 61683 | /* 188308 */ "VFMADD132BF16Z256r\000" |
| 61684 | /* 188327 */ "VFNMADD132BF16Z256r\000" |
| 61685 | /* 188347 */ "VFMSUB213BF16Z256r\000" |
| 61686 | /* 188366 */ "VFNMSUB213BF16Z256r\000" |
| 61687 | /* 188386 */ "VFMADD213BF16Z256r\000" |
| 61688 | /* 188405 */ "VFNMADD213BF16Z256r\000" |
| 61689 | /* 188425 */ "VRCPBF16Z256r\000" |
| 61690 | /* 188439 */ "VGETEXPBF16Z256r\000" |
| 61691 | /* 188456 */ "VRSQRTBF16Z256r\000" |
| 61692 | /* 188472 */ "VSQRTBF16Z256r\000" |
| 61693 | /* 188487 */ "VFMADDSUB231PDZ256r\000" |
| 61694 | /* 188507 */ "VFMSUB231PDZ256r\000" |
| 61695 | /* 188524 */ "VFNMSUB231PDZ256r\000" |
| 61696 | /* 188542 */ "VFMSUBADD231PDZ256r\000" |
| 61697 | /* 188562 */ "VFMADD231PDZ256r\000" |
| 61698 | /* 188579 */ "VFNMADD231PDZ256r\000" |
| 61699 | /* 188597 */ "VFMADDSUB132PDZ256r\000" |
| 61700 | /* 188617 */ "VFMSUB132PDZ256r\000" |
| 61701 | /* 188634 */ "VFNMSUB132PDZ256r\000" |
| 61702 | /* 188652 */ "VFMSUBADD132PDZ256r\000" |
| 61703 | /* 188672 */ "VFMADD132PDZ256r\000" |
| 61704 | /* 188689 */ "VFNMADD132PDZ256r\000" |
| 61705 | /* 188707 */ "VFMADDSUB213PDZ256r\000" |
| 61706 | /* 188727 */ "VFMSUB213PDZ256r\000" |
| 61707 | /* 188744 */ "VFNMSUB213PDZ256r\000" |
| 61708 | /* 188762 */ "VFMSUBADD213PDZ256r\000" |
| 61709 | /* 188782 */ "VFMADD213PDZ256r\000" |
| 61710 | /* 188799 */ "VFNMADD213PDZ256r\000" |
| 61711 | /* 188817 */ "VRCP14PDZ256r\000" |
| 61712 | /* 188831 */ "VRSQRT14PDZ256r\000" |
| 61713 | /* 188847 */ "VGETEXPPDZ256r\000" |
| 61714 | /* 188862 */ "VSQRTPDZ256r\000" |
| 61715 | /* 188875 */ "VPDPBSSDZ256r\000" |
| 61716 | /* 188889 */ "VPDPWSSDZ256r\000" |
| 61717 | /* 188903 */ "VPDPBUSDZ256r\000" |
| 61718 | /* 188917 */ "VPDPWUSDZ256r\000" |
| 61719 | /* 188931 */ "VPDPBSUDZ256r\000" |
| 61720 | /* 188945 */ "VPDPWSUDZ256r\000" |
| 61721 | /* 188959 */ "VPDPBUUDZ256r\000" |
| 61722 | /* 188973 */ "VPDPWUUDZ256r\000" |
| 61723 | /* 188987 */ "VPSHLDVDZ256r\000" |
| 61724 | /* 189001 */ "VPSHRDVDZ256r\000" |
| 61725 | /* 189015 */ "VFMADDSUB231PHZ256r\000" |
| 61726 | /* 189035 */ "VFMSUB231PHZ256r\000" |
| 61727 | /* 189052 */ "VFNMSUB231PHZ256r\000" |
| 61728 | /* 189070 */ "VFMSUBADD231PHZ256r\000" |
| 61729 | /* 189090 */ "VFMADD231PHZ256r\000" |
| 61730 | /* 189107 */ "VFNMADD231PHZ256r\000" |
| 61731 | /* 189125 */ "VFMADDSUB132PHZ256r\000" |
| 61732 | /* 189145 */ "VFMSUB132PHZ256r\000" |
| 61733 | /* 189162 */ "VFNMSUB132PHZ256r\000" |
| 61734 | /* 189180 */ "VFMSUBADD132PHZ256r\000" |
| 61735 | /* 189200 */ "VFMADD132PHZ256r\000" |
| 61736 | /* 189217 */ "VFNMADD132PHZ256r\000" |
| 61737 | /* 189235 */ "VFMADDSUB213PHZ256r\000" |
| 61738 | /* 189255 */ "VFMSUB213PHZ256r\000" |
| 61739 | /* 189272 */ "VFNMSUB213PHZ256r\000" |
| 61740 | /* 189290 */ "VFMSUBADD213PHZ256r\000" |
| 61741 | /* 189310 */ "VFMADD213PHZ256r\000" |
| 61742 | /* 189327 */ "VFNMADD213PHZ256r\000" |
| 61743 | /* 189345 */ "VFCMADDCPHZ256r\000" |
| 61744 | /* 189361 */ "VFMADDCPHZ256r\000" |
| 61745 | /* 189376 */ "VRCPPHZ256r\000" |
| 61746 | /* 189388 */ "VGETEXPPHZ256r\000" |
| 61747 | /* 189403 */ "VRSQRTPHZ256r\000" |
| 61748 | /* 189417 */ "VSQRTPHZ256r\000" |
| 61749 | /* 189430 */ "VPMADD52HUQZ256r\000" |
| 61750 | /* 189447 */ "VPMADD52LUQZ256r\000" |
| 61751 | /* 189464 */ "VPSHLDVQZ256r\000" |
| 61752 | /* 189478 */ "VPSHRDVQZ256r\000" |
| 61753 | /* 189492 */ "VPDPBSSDSZ256r\000" |
| 61754 | /* 189507 */ "VPDPWSSDSZ256r\000" |
| 61755 | /* 189522 */ "VPDPBUSDSZ256r\000" |
| 61756 | /* 189537 */ "VPDPWUSDSZ256r\000" |
| 61757 | /* 189552 */ "VPDPBSUDSZ256r\000" |
| 61758 | /* 189567 */ "VPDPWSUDSZ256r\000" |
| 61759 | /* 189582 */ "VPDPBUUDSZ256r\000" |
| 61760 | /* 189597 */ "VPDPWUUDSZ256r\000" |
| 61761 | /* 189612 */ "VFMADDSUB231PSZ256r\000" |
| 61762 | /* 189632 */ "VFMSUB231PSZ256r\000" |
| 61763 | /* 189649 */ "VFNMSUB231PSZ256r\000" |
| 61764 | /* 189667 */ "VFMSUBADD231PSZ256r\000" |
| 61765 | /* 189687 */ "VFMADD231PSZ256r\000" |
| 61766 | /* 189704 */ "VFNMADD231PSZ256r\000" |
| 61767 | /* 189722 */ "VFMADDSUB132PSZ256r\000" |
| 61768 | /* 189742 */ "VFMSUB132PSZ256r\000" |
| 61769 | /* 189759 */ "VFNMSUB132PSZ256r\000" |
| 61770 | /* 189777 */ "VFMSUBADD132PSZ256r\000" |
| 61771 | /* 189797 */ "VFMADD132PSZ256r\000" |
| 61772 | /* 189814 */ "VFNMADD132PSZ256r\000" |
| 61773 | /* 189832 */ "VFMADDSUB213PSZ256r\000" |
| 61774 | /* 189852 */ "VFMSUB213PSZ256r\000" |
| 61775 | /* 189869 */ "VFNMSUB213PSZ256r\000" |
| 61776 | /* 189887 */ "VFMSUBADD213PSZ256r\000" |
| 61777 | /* 189907 */ "VFMADD213PSZ256r\000" |
| 61778 | /* 189924 */ "VFNMADD213PSZ256r\000" |
| 61779 | /* 189942 */ "VRCP14PSZ256r\000" |
| 61780 | /* 189956 */ "VRSQRT14PSZ256r\000" |
| 61781 | /* 189972 */ "VDPBF16PSZ256r\000" |
| 61782 | /* 189987 */ "VDPPHPSZ256r\000" |
| 61783 | /* 190000 */ "VGETEXPPSZ256r\000" |
| 61784 | /* 190015 */ "VSQRTPSZ256r\000" |
| 61785 | /* 190028 */ "VPSHLDVWZ256r\000" |
| 61786 | /* 190042 */ "VPSHRDVWZ256r\000" |
| 61787 | /* 190056 */ "VFMSUB231BF16Z128r\000" |
| 61788 | /* 190075 */ "VFNMSUB231BF16Z128r\000" |
| 61789 | /* 190095 */ "VFMADD231BF16Z128r\000" |
| 61790 | /* 190114 */ "VFNMADD231BF16Z128r\000" |
| 61791 | /* 190134 */ "VFMSUB132BF16Z128r\000" |
| 61792 | /* 190153 */ "VFNMSUB132BF16Z128r\000" |
| 61793 | /* 190173 */ "VFMADD132BF16Z128r\000" |
| 61794 | /* 190192 */ "VFNMADD132BF16Z128r\000" |
| 61795 | /* 190212 */ "VFMSUB213BF16Z128r\000" |
| 61796 | /* 190231 */ "VFNMSUB213BF16Z128r\000" |
| 61797 | /* 190251 */ "VFMADD213BF16Z128r\000" |
| 61798 | /* 190270 */ "VFNMADD213BF16Z128r\000" |
| 61799 | /* 190290 */ "VRCPBF16Z128r\000" |
| 61800 | /* 190304 */ "VGETEXPBF16Z128r\000" |
| 61801 | /* 190321 */ "VRSQRTBF16Z128r\000" |
| 61802 | /* 190337 */ "VSQRTBF16Z128r\000" |
| 61803 | /* 190352 */ "VFMADDSUB231PDZ128r\000" |
| 61804 | /* 190372 */ "VFMSUB231PDZ128r\000" |
| 61805 | /* 190389 */ "VFNMSUB231PDZ128r\000" |
| 61806 | /* 190407 */ "VFMSUBADD231PDZ128r\000" |
| 61807 | /* 190427 */ "VFMADD231PDZ128r\000" |
| 61808 | /* 190444 */ "VFNMADD231PDZ128r\000" |
| 61809 | /* 190462 */ "VFMADDSUB132PDZ128r\000" |
| 61810 | /* 190482 */ "VFMSUB132PDZ128r\000" |
| 61811 | /* 190499 */ "VFNMSUB132PDZ128r\000" |
| 61812 | /* 190517 */ "VFMSUBADD132PDZ128r\000" |
| 61813 | /* 190537 */ "VFMADD132PDZ128r\000" |
| 61814 | /* 190554 */ "VFNMADD132PDZ128r\000" |
| 61815 | /* 190572 */ "VFMADDSUB213PDZ128r\000" |
| 61816 | /* 190592 */ "VFMSUB213PDZ128r\000" |
| 61817 | /* 190609 */ "VFNMSUB213PDZ128r\000" |
| 61818 | /* 190627 */ "VFMSUBADD213PDZ128r\000" |
| 61819 | /* 190647 */ "VFMADD213PDZ128r\000" |
| 61820 | /* 190664 */ "VFNMADD213PDZ128r\000" |
| 61821 | /* 190682 */ "VRCP14PDZ128r\000" |
| 61822 | /* 190696 */ "VRSQRT14PDZ128r\000" |
| 61823 | /* 190712 */ "VGETEXPPDZ128r\000" |
| 61824 | /* 190727 */ "VSQRTPDZ128r\000" |
| 61825 | /* 190740 */ "VPDPBSSDZ128r\000" |
| 61826 | /* 190754 */ "VPDPWSSDZ128r\000" |
| 61827 | /* 190768 */ "VPDPBUSDZ128r\000" |
| 61828 | /* 190782 */ "VPDPWUSDZ128r\000" |
| 61829 | /* 190796 */ "VPDPBSUDZ128r\000" |
| 61830 | /* 190810 */ "VPDPWSUDZ128r\000" |
| 61831 | /* 190824 */ "VPDPBUUDZ128r\000" |
| 61832 | /* 190838 */ "VPDPWUUDZ128r\000" |
| 61833 | /* 190852 */ "VPSHLDVDZ128r\000" |
| 61834 | /* 190866 */ "VPSHRDVDZ128r\000" |
| 61835 | /* 190880 */ "VFMADDSUB231PHZ128r\000" |
| 61836 | /* 190900 */ "VFMSUB231PHZ128r\000" |
| 61837 | /* 190917 */ "VFNMSUB231PHZ128r\000" |
| 61838 | /* 190935 */ "VFMSUBADD231PHZ128r\000" |
| 61839 | /* 190955 */ "VFMADD231PHZ128r\000" |
| 61840 | /* 190972 */ "VFNMADD231PHZ128r\000" |
| 61841 | /* 190990 */ "VFMADDSUB132PHZ128r\000" |
| 61842 | /* 191010 */ "VFMSUB132PHZ128r\000" |
| 61843 | /* 191027 */ "VFNMSUB132PHZ128r\000" |
| 61844 | /* 191045 */ "VFMSUBADD132PHZ128r\000" |
| 61845 | /* 191065 */ "VFMADD132PHZ128r\000" |
| 61846 | /* 191082 */ "VFNMADD132PHZ128r\000" |
| 61847 | /* 191100 */ "VFMADDSUB213PHZ128r\000" |
| 61848 | /* 191120 */ "VFMSUB213PHZ128r\000" |
| 61849 | /* 191137 */ "VFNMSUB213PHZ128r\000" |
| 61850 | /* 191155 */ "VFMSUBADD213PHZ128r\000" |
| 61851 | /* 191175 */ "VFMADD213PHZ128r\000" |
| 61852 | /* 191192 */ "VFNMADD213PHZ128r\000" |
| 61853 | /* 191210 */ "VFCMADDCPHZ128r\000" |
| 61854 | /* 191226 */ "VFMADDCPHZ128r\000" |
| 61855 | /* 191241 */ "VRCPPHZ128r\000" |
| 61856 | /* 191253 */ "VGETEXPPHZ128r\000" |
| 61857 | /* 191268 */ "VRSQRTPHZ128r\000" |
| 61858 | /* 191282 */ "VSQRTPHZ128r\000" |
| 61859 | /* 191295 */ "VPMADD52HUQZ128r\000" |
| 61860 | /* 191312 */ "VPMADD52LUQZ128r\000" |
| 61861 | /* 191329 */ "VPSHLDVQZ128r\000" |
| 61862 | /* 191343 */ "VPSHRDVQZ128r\000" |
| 61863 | /* 191357 */ "VPDPBSSDSZ128r\000" |
| 61864 | /* 191372 */ "VPDPWSSDSZ128r\000" |
| 61865 | /* 191387 */ "VPDPBUSDSZ128r\000" |
| 61866 | /* 191402 */ "VPDPWUSDSZ128r\000" |
| 61867 | /* 191417 */ "VPDPBSUDSZ128r\000" |
| 61868 | /* 191432 */ "VPDPWSUDSZ128r\000" |
| 61869 | /* 191447 */ "VPDPBUUDSZ128r\000" |
| 61870 | /* 191462 */ "VPDPWUUDSZ128r\000" |
| 61871 | /* 191477 */ "VFMADDSUB231PSZ128r\000" |
| 61872 | /* 191497 */ "VFMSUB231PSZ128r\000" |
| 61873 | /* 191514 */ "VFNMSUB231PSZ128r\000" |
| 61874 | /* 191532 */ "VFMSUBADD231PSZ128r\000" |
| 61875 | /* 191552 */ "VFMADD231PSZ128r\000" |
| 61876 | /* 191569 */ "VFNMADD231PSZ128r\000" |
| 61877 | /* 191587 */ "VFMADDSUB132PSZ128r\000" |
| 61878 | /* 191607 */ "VFMSUB132PSZ128r\000" |
| 61879 | /* 191624 */ "VFNMSUB132PSZ128r\000" |
| 61880 | /* 191642 */ "VFMSUBADD132PSZ128r\000" |
| 61881 | /* 191662 */ "VFMADD132PSZ128r\000" |
| 61882 | /* 191679 */ "VFNMADD132PSZ128r\000" |
| 61883 | /* 191697 */ "VFMADDSUB213PSZ128r\000" |
| 61884 | /* 191717 */ "VFMSUB213PSZ128r\000" |
| 61885 | /* 191734 */ "VFNMSUB213PSZ128r\000" |
| 61886 | /* 191752 */ "VFMSUBADD213PSZ128r\000" |
| 61887 | /* 191772 */ "VFMADD213PSZ128r\000" |
| 61888 | /* 191789 */ "VFNMADD213PSZ128r\000" |
| 61889 | /* 191807 */ "VRCP14PSZ128r\000" |
| 61890 | /* 191821 */ "VRSQRT14PSZ128r\000" |
| 61891 | /* 191837 */ "VDPBF16PSZ128r\000" |
| 61892 | /* 191852 */ "VDPPHPSZ128r\000" |
| 61893 | /* 191865 */ "VGETEXPPSZ128r\000" |
| 61894 | /* 191880 */ "VSQRTPSZ128r\000" |
| 61895 | /* 191893 */ "VPSHLDVWZ128r\000" |
| 61896 | /* 191907 */ "VPSHRDVWZ128r\000" |
| 61897 | /* 191921 */ "DEC8r\000" |
| 61898 | /* 191927 */ "INC8r\000" |
| 61899 | /* 191933 */ "NEG8r\000" |
| 61900 | /* 191939 */ "IMUL8r\000" |
| 61901 | /* 191946 */ "NOT8r\000" |
| 61902 | /* 191952 */ "IDIV8r\000" |
| 61903 | /* 191959 */ "LEA64_8r\000" |
| 61904 | /* 191968 */ "SETCCr\000" |
| 61905 | /* 191975 */ "SETZUCCr\000" |
| 61906 | /* 191984 */ "FP80_ADDr\000" |
| 61907 | /* 191994 */ "VFMADDSUB231PDr\000" |
| 61908 | /* 192010 */ "VFMSUB231PDr\000" |
| 61909 | /* 192023 */ "VFNMSUB231PDr\000" |
| 61910 | /* 192037 */ "VFMSUBADD231PDr\000" |
| 61911 | /* 192053 */ "VFMADD231PDr\000" |
| 61912 | /* 192066 */ "VFNMADD231PDr\000" |
| 61913 | /* 192080 */ "VFMADDSUB132PDr\000" |
| 61914 | /* 192096 */ "VFMSUB132PDr\000" |
| 61915 | /* 192109 */ "VFNMSUB132PDr\000" |
| 61916 | /* 192123 */ "VFMSUBADD132PDr\000" |
| 61917 | /* 192139 */ "VFMADD132PDr\000" |
| 61918 | /* 192152 */ "VFNMADD132PDr\000" |
| 61919 | /* 192166 */ "VFMADDSUB213PDr\000" |
| 61920 | /* 192182 */ "VFMSUB213PDr\000" |
| 61921 | /* 192195 */ "VFNMSUB213PDr\000" |
| 61922 | /* 192209 */ "VFMSUBADD213PDr\000" |
| 61923 | /* 192225 */ "VFMADD213PDr\000" |
| 61924 | /* 192238 */ "VFNMADD213PDr\000" |
| 61925 | /* 192252 */ "VSQRTPDr\000" |
| 61926 | /* 192261 */ "VFMSUB231SDr\000" |
| 61927 | /* 192274 */ "VFNMSUB231SDr\000" |
| 61928 | /* 192288 */ "VFMADD231SDr\000" |
| 61929 | /* 192301 */ "VFNMADD231SDr\000" |
| 61930 | /* 192315 */ "VFMSUB132SDr\000" |
| 61931 | /* 192328 */ "VFNMSUB132SDr\000" |
| 61932 | /* 192342 */ "VFMADD132SDr\000" |
| 61933 | /* 192355 */ "VFNMADD132SDr\000" |
| 61934 | /* 192369 */ "VFMSUB213SDr\000" |
| 61935 | /* 192382 */ "VFNMSUB213SDr\000" |
| 61936 | /* 192396 */ "VFMADD213SDr\000" |
| 61937 | /* 192409 */ "VFNMADD213SDr\000" |
| 61938 | /* 192423 */ "VSQRTSDr\000" |
| 61939 | /* 192432 */ "PTWRITEr\000" |
| 61940 | /* 192441 */ "UCOM_Fr\000" |
| 61941 | /* 192449 */ "UCOM_FIr\000" |
| 61942 | /* 192458 */ "UD1Lr\000" |
| 61943 | /* 192464 */ "NOOPLr\000" |
| 61944 | /* 192471 */ "UCOM_FPr\000" |
| 61945 | /* 192480 */ "UCOM_FIPr\000" |
| 61946 | /* 192490 */ "TAILJMPr\000" |
| 61947 | /* 192499 */ "UCOM_FPPr\000" |
| 61948 | /* 192509 */ "UD1Qr\000" |
| 61949 | /* 192515 */ "NOOPQr\000" |
| 61950 | /* 192522 */ "VERRr\000" |
| 61951 | /* 192528 */ "LTRr\000" |
| 61952 | /* 192533 */ "VFMADDSUB231PSr\000" |
| 61953 | /* 192549 */ "VFMSUB231PSr\000" |
| 61954 | /* 192562 */ "VFNMSUB231PSr\000" |
| 61955 | /* 192576 */ "VFMSUBADD231PSr\000" |
| 61956 | /* 192592 */ "VFMADD231PSr\000" |
| 61957 | /* 192605 */ "VFNMADD231PSr\000" |
| 61958 | /* 192619 */ "VFMADDSUB132PSr\000" |
| 61959 | /* 192635 */ "VFMSUB132PSr\000" |
| 61960 | /* 192648 */ "VFNMSUB132PSr\000" |
| 61961 | /* 192662 */ "VFMSUBADD132PSr\000" |
| 61962 | /* 192678 */ "VFMADD132PSr\000" |
| 61963 | /* 192691 */ "VFNMADD132PSr\000" |
| 61964 | /* 192705 */ "VFMADDSUB213PSr\000" |
| 61965 | /* 192721 */ "VFMSUB213PSr\000" |
| 61966 | /* 192734 */ "VFNMSUB213PSr\000" |
| 61967 | /* 192748 */ "VFMSUBADD213PSr\000" |
| 61968 | /* 192764 */ "VFMADD213PSr\000" |
| 61969 | /* 192777 */ "VFNMADD213PSr\000" |
| 61970 | /* 192791 */ "VRCPPSr\000" |
| 61971 | /* 192799 */ "VRSQRTPSr\000" |
| 61972 | /* 192809 */ "VSQRTPSr\000" |
| 61973 | /* 192818 */ "VFMSUB231SSr\000" |
| 61974 | /* 192831 */ "VFNMSUB231SSr\000" |
| 61975 | /* 192845 */ "VFMADD231SSr\000" |
| 61976 | /* 192858 */ "VFNMADD231SSr\000" |
| 61977 | /* 192872 */ "VFMSUB132SSr\000" |
| 61978 | /* 192885 */ "VFNMSUB132SSr\000" |
| 61979 | /* 192899 */ "VFMADD132SSr\000" |
| 61980 | /* 192912 */ "VFNMADD132SSr\000" |
| 61981 | /* 192926 */ "VFMSUB213SSr\000" |
| 61982 | /* 192939 */ "VFNMSUB213SSr\000" |
| 61983 | /* 192953 */ "VFMADD213SSr\000" |
| 61984 | /* 192966 */ "VFNMADD213SSr\000" |
| 61985 | /* 192980 */ "VRCPSSr\000" |
| 61986 | /* 192988 */ "VRSQRTSSr\000" |
| 61987 | /* 192998 */ "VSQRTSSr\000" |
| 61988 | /* 193007 */ "RDPKRUr\000" |
| 61989 | /* 193015 */ "WRPKRUr\000" |
| 61990 | /* 193023 */ "UD1Wr\000" |
| 61991 | /* 193029 */ "NOOPWr\000" |
| 61992 | /* 193036 */ "VERWr\000" |
| 61993 | /* 193042 */ "VFMADDSUB231PDYr\000" |
| 61994 | /* 193059 */ "VFMSUB231PDYr\000" |
| 61995 | /* 193073 */ "VFNMSUB231PDYr\000" |
| 61996 | /* 193088 */ "VFMSUBADD231PDYr\000" |
| 61997 | /* 193105 */ "VFMADD231PDYr\000" |
| 61998 | /* 193119 */ "VFNMADD231PDYr\000" |
| 61999 | /* 193134 */ "VFMADDSUB132PDYr\000" |
| 62000 | /* 193151 */ "VFMSUB132PDYr\000" |
| 62001 | /* 193165 */ "VFNMSUB132PDYr\000" |
| 62002 | /* 193180 */ "VFMSUBADD132PDYr\000" |
| 62003 | /* 193197 */ "VFMADD132PDYr\000" |
| 62004 | /* 193211 */ "VFNMADD132PDYr\000" |
| 62005 | /* 193226 */ "VFMADDSUB213PDYr\000" |
| 62006 | /* 193243 */ "VFMSUB213PDYr\000" |
| 62007 | /* 193257 */ "VFNMSUB213PDYr\000" |
| 62008 | /* 193272 */ "VFMSUBADD213PDYr\000" |
| 62009 | /* 193289 */ "VFMADD213PDYr\000" |
| 62010 | /* 193303 */ "VFNMADD213PDYr\000" |
| 62011 | /* 193318 */ "VSQRTPDYr\000" |
| 62012 | /* 193328 */ "VFMADDSUB231PSYr\000" |
| 62013 | /* 193345 */ "VFMSUB231PSYr\000" |
| 62014 | /* 193359 */ "VFNMSUB231PSYr\000" |
| 62015 | /* 193374 */ "VFMSUBADD231PSYr\000" |
| 62016 | /* 193391 */ "VFMADD231PSYr\000" |
| 62017 | /* 193405 */ "VFNMADD231PSYr\000" |
| 62018 | /* 193420 */ "VFMADDSUB132PSYr\000" |
| 62019 | /* 193437 */ "VFMSUB132PSYr\000" |
| 62020 | /* 193451 */ "VFNMSUB132PSYr\000" |
| 62021 | /* 193466 */ "VFMSUBADD132PSYr\000" |
| 62022 | /* 193483 */ "VFMADD132PSYr\000" |
| 62023 | /* 193497 */ "VFNMADD132PSYr\000" |
| 62024 | /* 193512 */ "VFMADDSUB213PSYr\000" |
| 62025 | /* 193529 */ "VFMSUB213PSYr\000" |
| 62026 | /* 193543 */ "VFNMSUB213PSYr\000" |
| 62027 | /* 193558 */ "VFMSUBADD213PSYr\000" |
| 62028 | /* 193575 */ "VFMADD213PSYr\000" |
| 62029 | /* 193589 */ "VFNMADD213PSYr\000" |
| 62030 | /* 193604 */ "VRCPPSYr\000" |
| 62031 | /* 193613 */ "VRSQRTPSYr\000" |
| 62032 | /* 193624 */ "VSQRTPSYr\000" |
| 62033 | /* 193634 */ "VFMSUB231BF16Zr\000" |
| 62034 | /* 193650 */ "VFNMSUB231BF16Zr\000" |
| 62035 | /* 193667 */ "VFMADD231BF16Zr\000" |
| 62036 | /* 193683 */ "VFNMADD231BF16Zr\000" |
| 62037 | /* 193700 */ "VFMSUB132BF16Zr\000" |
| 62038 | /* 193716 */ "VFNMSUB132BF16Zr\000" |
| 62039 | /* 193733 */ "VFMADD132BF16Zr\000" |
| 62040 | /* 193749 */ "VFNMADD132BF16Zr\000" |
| 62041 | /* 193766 */ "VFMSUB213BF16Zr\000" |
| 62042 | /* 193782 */ "VFNMSUB213BF16Zr\000" |
| 62043 | /* 193799 */ "VFMADD213BF16Zr\000" |
| 62044 | /* 193815 */ "VFNMADD213BF16Zr\000" |
| 62045 | /* 193832 */ "VRCPBF16Zr\000" |
| 62046 | /* 193843 */ "VGETEXPBF16Zr\000" |
| 62047 | /* 193857 */ "VRSQRTBF16Zr\000" |
| 62048 | /* 193870 */ "VSQRTBF16Zr\000" |
| 62049 | /* 193882 */ "VFMADDSUB231PDZr\000" |
| 62050 | /* 193899 */ "VFMSUB231PDZr\000" |
| 62051 | /* 193913 */ "VFNMSUB231PDZr\000" |
| 62052 | /* 193928 */ "VFMSUBADD231PDZr\000" |
| 62053 | /* 193945 */ "VFMADD231PDZr\000" |
| 62054 | /* 193959 */ "VFNMADD231PDZr\000" |
| 62055 | /* 193974 */ "VFMADDSUB132PDZr\000" |
| 62056 | /* 193991 */ "VFMSUB132PDZr\000" |
| 62057 | /* 194005 */ "VFNMSUB132PDZr\000" |
| 62058 | /* 194020 */ "VFMSUBADD132PDZr\000" |
| 62059 | /* 194037 */ "VFMADD132PDZr\000" |
| 62060 | /* 194051 */ "VFNMADD132PDZr\000" |
| 62061 | /* 194066 */ "VEXP2PDZr\000" |
| 62062 | /* 194076 */ "VFMADDSUB213PDZr\000" |
| 62063 | /* 194093 */ "VFMSUB213PDZr\000" |
| 62064 | /* 194107 */ "VFNMSUB213PDZr\000" |
| 62065 | /* 194122 */ "VFMSUBADD213PDZr\000" |
| 62066 | /* 194139 */ "VFMADD213PDZr\000" |
| 62067 | /* 194153 */ "VFNMADD213PDZr\000" |
| 62068 | /* 194168 */ "VRCP14PDZr\000" |
| 62069 | /* 194179 */ "VRSQRT14PDZr\000" |
| 62070 | /* 194192 */ "VRCP28PDZr\000" |
| 62071 | /* 194203 */ "VRSQRT28PDZr\000" |
| 62072 | /* 194216 */ "VGETEXPPDZr\000" |
| 62073 | /* 194228 */ "VSQRTPDZr\000" |
| 62074 | /* 194238 */ "VFMSUB231SDZr\000" |
| 62075 | /* 194252 */ "VFNMSUB231SDZr\000" |
| 62076 | /* 194267 */ "VFMADD231SDZr\000" |
| 62077 | /* 194281 */ "VFNMADD231SDZr\000" |
| 62078 | /* 194296 */ "VFMSUB132SDZr\000" |
| 62079 | /* 194310 */ "VFNMSUB132SDZr\000" |
| 62080 | /* 194325 */ "VFMADD132SDZr\000" |
| 62081 | /* 194339 */ "VFNMADD132SDZr\000" |
| 62082 | /* 194354 */ "VFMSUB213SDZr\000" |
| 62083 | /* 194368 */ "VFNMSUB213SDZr\000" |
| 62084 | /* 194383 */ "VFMADD213SDZr\000" |
| 62085 | /* 194397 */ "VFNMADD213SDZr\000" |
| 62086 | /* 194412 */ "VRCP28SDZr\000" |
| 62087 | /* 194423 */ "VRSQRT28SDZr\000" |
| 62088 | /* 194436 */ "VGETEXPSDZr\000" |
| 62089 | /* 194448 */ "VPDPBSSDZr\000" |
| 62090 | /* 194459 */ "VPDPWSSDZr\000" |
| 62091 | /* 194470 */ "VSQRTSDZr\000" |
| 62092 | /* 194480 */ "VPDPBUSDZr\000" |
| 62093 | /* 194491 */ "VPDPWUSDZr\000" |
| 62094 | /* 194502 */ "VPDPBSUDZr\000" |
| 62095 | /* 194513 */ "VPDPWSUDZr\000" |
| 62096 | /* 194524 */ "VPDPBUUDZr\000" |
| 62097 | /* 194535 */ "VPDPWUUDZr\000" |
| 62098 | /* 194546 */ "VPSHLDVDZr\000" |
| 62099 | /* 194557 */ "VPSHRDVDZr\000" |
| 62100 | /* 194568 */ "VFMADDSUB231PHZr\000" |
| 62101 | /* 194585 */ "VFMSUB231PHZr\000" |
| 62102 | /* 194599 */ "VFNMSUB231PHZr\000" |
| 62103 | /* 194614 */ "VFMSUBADD231PHZr\000" |
| 62104 | /* 194631 */ "VFMADD231PHZr\000" |
| 62105 | /* 194645 */ "VFNMADD231PHZr\000" |
| 62106 | /* 194660 */ "VFMADDSUB132PHZr\000" |
| 62107 | /* 194677 */ "VFMSUB132PHZr\000" |
| 62108 | /* 194691 */ "VFNMSUB132PHZr\000" |
| 62109 | /* 194706 */ "VFMSUBADD132PHZr\000" |
| 62110 | /* 194723 */ "VFMADD132PHZr\000" |
| 62111 | /* 194737 */ "VFNMADD132PHZr\000" |
| 62112 | /* 194752 */ "VFMADDSUB213PHZr\000" |
| 62113 | /* 194769 */ "VFMSUB213PHZr\000" |
| 62114 | /* 194783 */ "VFNMSUB213PHZr\000" |
| 62115 | /* 194798 */ "VFMSUBADD213PHZr\000" |
| 62116 | /* 194815 */ "VFMADD213PHZr\000" |
| 62117 | /* 194829 */ "VFNMADD213PHZr\000" |
| 62118 | /* 194844 */ "VFCMADDCPHZr\000" |
| 62119 | /* 194857 */ "VFMADDCPHZr\000" |
| 62120 | /* 194869 */ "VRCPPHZr\000" |
| 62121 | /* 194878 */ "VGETEXPPHZr\000" |
| 62122 | /* 194890 */ "VRSQRTPHZr\000" |
| 62123 | /* 194901 */ "VSQRTPHZr\000" |
| 62124 | /* 194911 */ "VFMSUB231SHZr\000" |
| 62125 | /* 194925 */ "VFNMSUB231SHZr\000" |
| 62126 | /* 194940 */ "VFMADD231SHZr\000" |
| 62127 | /* 194954 */ "VFNMADD231SHZr\000" |
| 62128 | /* 194969 */ "VFMSUB132SHZr\000" |
| 62129 | /* 194983 */ "VFNMSUB132SHZr\000" |
| 62130 | /* 194998 */ "VFMADD132SHZr\000" |
| 62131 | /* 195012 */ "VFNMADD132SHZr\000" |
| 62132 | /* 195027 */ "VFMSUB213SHZr\000" |
| 62133 | /* 195041 */ "VFNMSUB213SHZr\000" |
| 62134 | /* 195056 */ "VFMADD213SHZr\000" |
| 62135 | /* 195070 */ "VFNMADD213SHZr\000" |
| 62136 | /* 195085 */ "VFCMADDCSHZr\000" |
| 62137 | /* 195098 */ "VFMADDCSHZr\000" |
| 62138 | /* 195110 */ "VGETEXPSHZr\000" |
| 62139 | /* 195122 */ "VSQRTSHZr\000" |
| 62140 | /* 195132 */ "VPMADD52HUQZr\000" |
| 62141 | /* 195146 */ "VPMADD52LUQZr\000" |
| 62142 | /* 195160 */ "VPSHLDVQZr\000" |
| 62143 | /* 195171 */ "VPSHRDVQZr\000" |
| 62144 | /* 195182 */ "VPDPBSSDSZr\000" |
| 62145 | /* 195194 */ "VPDPWSSDSZr\000" |
| 62146 | /* 195206 */ "VPDPBUSDSZr\000" |
| 62147 | /* 195218 */ "VPDPWUSDSZr\000" |
| 62148 | /* 195230 */ "VPDPBSUDSZr\000" |
| 62149 | /* 195242 */ "VPDPWSUDSZr\000" |
| 62150 | /* 195254 */ "VPDPBUUDSZr\000" |
| 62151 | /* 195266 */ "VPDPWUUDSZr\000" |
| 62152 | /* 195278 */ "VFMADDSUB231PSZr\000" |
| 62153 | /* 195295 */ "VFMSUB231PSZr\000" |
| 62154 | /* 195309 */ "VFNMSUB231PSZr\000" |
| 62155 | /* 195324 */ "VFMSUBADD231PSZr\000" |
| 62156 | /* 195341 */ "VFMADD231PSZr\000" |
| 62157 | /* 195355 */ "VFNMADD231PSZr\000" |
| 62158 | /* 195370 */ "VFMADDSUB132PSZr\000" |
| 62159 | /* 195387 */ "VFMSUB132PSZr\000" |
| 62160 | /* 195401 */ "VFNMSUB132PSZr\000" |
| 62161 | /* 195416 */ "VFMSUBADD132PSZr\000" |
| 62162 | /* 195433 */ "VFMADD132PSZr\000" |
| 62163 | /* 195447 */ "VFNMADD132PSZr\000" |
| 62164 | /* 195462 */ "VEXP2PSZr\000" |
| 62165 | /* 195472 */ "VFMADDSUB213PSZr\000" |
| 62166 | /* 195489 */ "VFMSUB213PSZr\000" |
| 62167 | /* 195503 */ "VFNMSUB213PSZr\000" |
| 62168 | /* 195518 */ "VFMSUBADD213PSZr\000" |
| 62169 | /* 195535 */ "VFMADD213PSZr\000" |
| 62170 | /* 195549 */ "VFNMADD213PSZr\000" |
| 62171 | /* 195564 */ "VRCP14PSZr\000" |
| 62172 | /* 195575 */ "VRSQRT14PSZr\000" |
| 62173 | /* 195588 */ "VDPBF16PSZr\000" |
| 62174 | /* 195600 */ "VRCP28PSZr\000" |
| 62175 | /* 195611 */ "VRSQRT28PSZr\000" |
| 62176 | /* 195624 */ "VDPPHPSZr\000" |
| 62177 | /* 195634 */ "VGETEXPPSZr\000" |
| 62178 | /* 195646 */ "VSQRTPSZr\000" |
| 62179 | /* 195656 */ "VFMSUB231SSZr\000" |
| 62180 | /* 195670 */ "VFNMSUB231SSZr\000" |
| 62181 | /* 195685 */ "VFMADD231SSZr\000" |
| 62182 | /* 195699 */ "VFNMADD231SSZr\000" |
| 62183 | /* 195714 */ "VFMSUB132SSZr\000" |
| 62184 | /* 195728 */ "VFNMSUB132SSZr\000" |
| 62185 | /* 195743 */ "VFMADD132SSZr\000" |
| 62186 | /* 195757 */ "VFNMADD132SSZr\000" |
| 62187 | /* 195772 */ "VFMSUB213SSZr\000" |
| 62188 | /* 195786 */ "VFNMSUB213SSZr\000" |
| 62189 | /* 195801 */ "VFMADD213SSZr\000" |
| 62190 | /* 195815 */ "VFNMADD213SSZr\000" |
| 62191 | /* 195830 */ "VRCP28SSZr\000" |
| 62192 | /* 195841 */ "VRSQRT28SSZr\000" |
| 62193 | /* 195854 */ "VGETEXPSSZr\000" |
| 62194 | /* 195866 */ "VSQRTSSZr\000" |
| 62195 | /* 195876 */ "VPSHLDVWZr\000" |
| 62196 | /* 195887 */ "VPSHRDVWZr\000" |
| 62197 | /* 195898 */ "XCHG32ar\000" |
| 62198 | /* 195907 */ "XCHG64ar\000" |
| 62199 | /* 195916 */ "XCHG16ar\000" |
| 62200 | /* 195925 */ "MOV32cr\000" |
| 62201 | /* 195933 */ "MOV64cr\000" |
| 62202 | /* 195941 */ "MOV32dr\000" |
| 62203 | /* 195949 */ "MOV64dr\000" |
| 62204 | /* 195957 */ "OUT32ir\000" |
| 62205 | /* 195965 */ "OUT16ir\000" |
| 62206 | /* 195973 */ "OUT8ir\000" |
| 62207 | /* 195980 */ "UWRMSRir\000" |
| 62208 | /* 195989 */ "WRMSRNSir\000" |
| 62209 | /* 195999 */ "VPMOVB2MZ256kr\000" |
| 62210 | /* 196014 */ "VPMOVD2MZ256kr\000" |
| 62211 | /* 196029 */ "VPMOVQ2MZ256kr\000" |
| 62212 | /* 196044 */ "VPMOVW2MZ256kr\000" |
| 62213 | /* 196059 */ "VPMOVB2MZ128kr\000" |
| 62214 | /* 196074 */ "VPMOVD2MZ128kr\000" |
| 62215 | /* 196089 */ "VPMOVQ2MZ128kr\000" |
| 62216 | /* 196104 */ "VPMOVW2MZ128kr\000" |
| 62217 | /* 196119 */ "KMOVBkr\000" |
| 62218 | /* 196127 */ "KMOVDkr\000" |
| 62219 | /* 196135 */ "KMOVQkr\000" |
| 62220 | /* 196143 */ "KMOVWkr\000" |
| 62221 | /* 196151 */ "VPMOVB2MZkr\000" |
| 62222 | /* 196163 */ "VPMOVD2MZkr\000" |
| 62223 | /* 196175 */ "VPMOVQ2MZkr\000" |
| 62224 | /* 196187 */ "VPMOVW2MZkr\000" |
| 62225 | /* 196199 */ "SBB32mr\000" |
| 62226 | /* 196207 */ "LOCK_SUB32mr\000" |
| 62227 | /* 196220 */ "ADC32mr\000" |
| 62228 | /* 196228 */ "BTC32mr\000" |
| 62229 | /* 196236 */ "VMREAD32mr\000" |
| 62230 | /* 196247 */ "AADD32mr\000" |
| 62231 | /* 196256 */ "LOCK_ADD32mr\000" |
| 62232 | /* 196269 */ "AAND32mr\000" |
| 62233 | /* 196278 */ "LOCK_AND32mr\000" |
| 62234 | /* 196291 */ "MOVBE32mr\000" |
| 62235 | /* 196301 */ "CCMP32mr\000" |
| 62236 | /* 196310 */ "AOR32mr\000" |
| 62237 | /* 196318 */ "AXOR32mr\000" |
| 62238 | /* 196327 */ "LOCK_XOR32mr\000" |
| 62239 | /* 196340 */ "LOCK_OR32mr\000" |
| 62240 | /* 196352 */ "BTR32mr\000" |
| 62241 | /* 196360 */ "BTS32mr\000" |
| 62242 | /* 196368 */ "BT32mr\000" |
| 62243 | /* 196375 */ "CTEST32mr\000" |
| 62244 | /* 196385 */ "CFCMOV32mr\000" |
| 62245 | /* 196396 */ "SBB64mr\000" |
| 62246 | /* 196404 */ "LOCK_SUB64mr\000" |
| 62247 | /* 196417 */ "ADC64mr\000" |
| 62248 | /* 196425 */ "BTC64mr\000" |
| 62249 | /* 196433 */ "VMREAD64mr\000" |
| 62250 | /* 196444 */ "AADD64mr\000" |
| 62251 | /* 196453 */ "LOCK_ADD64mr\000" |
| 62252 | /* 196466 */ "AAND64mr\000" |
| 62253 | /* 196475 */ "LOCK_AND64mr\000" |
| 62254 | /* 196488 */ "MMX_MOVD64mr\000" |
| 62255 | /* 196501 */ "MOVBE64mr\000" |
| 62256 | /* 196511 */ "CCMP64mr\000" |
| 62257 | /* 196520 */ "MMX_MOVQ64mr\000" |
| 62258 | /* 196533 */ "AOR64mr\000" |
| 62259 | /* 196541 */ "AXOR64mr\000" |
| 62260 | /* 196550 */ "LOCK_XOR64mr\000" |
| 62261 | /* 196563 */ "LOCK_OR64mr\000" |
| 62262 | /* 196575 */ "BTR64mr\000" |
| 62263 | /* 196583 */ "BTS64mr\000" |
| 62264 | /* 196591 */ "BT64mr\000" |
| 62265 | /* 196598 */ "CTEST64mr\000" |
| 62266 | /* 196608 */ "CFCMOV64mr\000" |
| 62267 | /* 196619 */ "MOVNTI_64mr\000" |
| 62268 | /* 196631 */ "MMX_MOVD64from64mr\000" |
| 62269 | /* 196650 */ "VMOVPQIto64mr\000" |
| 62270 | /* 196664 */ "VFMADDSUBPD4mr\000" |
| 62271 | /* 196679 */ "VFMSUBPD4mr\000" |
| 62272 | /* 196691 */ "VFNMSUBPD4mr\000" |
| 62273 | /* 196704 */ "VFMSUBADDPD4mr\000" |
| 62274 | /* 196719 */ "VFMADDPD4mr\000" |
| 62275 | /* 196731 */ "VFNMADDPD4mr\000" |
| 62276 | /* 196744 */ "VFMSUBSD4mr\000" |
| 62277 | /* 196756 */ "VFNMSUBSD4mr\000" |
| 62278 | /* 196769 */ "VFMADDSD4mr\000" |
| 62279 | /* 196781 */ "VFNMADDSD4mr\000" |
| 62280 | /* 196794 */ "VFMADDSUBPS4mr\000" |
| 62281 | /* 196809 */ "VFMSUBPS4mr\000" |
| 62282 | /* 196821 */ "VFNMSUBPS4mr\000" |
| 62283 | /* 196834 */ "VFMSUBADDPS4mr\000" |
| 62284 | /* 196849 */ "VFMADDPS4mr\000" |
| 62285 | /* 196861 */ "VFNMADDPS4mr\000" |
| 62286 | /* 196874 */ "VFMSUBSS4mr\000" |
| 62287 | /* 196886 */ "VFNMSUBSS4mr\000" |
| 62288 | /* 196899 */ "VFMADDSS4mr\000" |
| 62289 | /* 196911 */ "VFNMADDSS4mr\000" |
| 62290 | /* 196924 */ "SBB16mr\000" |
| 62291 | /* 196932 */ "LOCK_SUB16mr\000" |
| 62292 | /* 196945 */ "ADC16mr\000" |
| 62293 | /* 196953 */ "BTC16mr\000" |
| 62294 | /* 196961 */ "LOCK_ADD16mr\000" |
| 62295 | /* 196974 */ "LOCK_AND16mr\000" |
| 62296 | /* 196987 */ "MOVBE16mr\000" |
| 62297 | /* 196997 */ "ARPL16mr\000" |
| 62298 | /* 197006 */ "CCMP16mr\000" |
| 62299 | /* 197015 */ "LOCK_XOR16mr\000" |
| 62300 | /* 197028 */ "LOCK_OR16mr\000" |
| 62301 | /* 197040 */ "BTR16mr\000" |
| 62302 | /* 197048 */ "BTS16mr\000" |
| 62303 | /* 197056 */ "BT16mr\000" |
| 62304 | /* 197063 */ "CTEST16mr\000" |
| 62305 | /* 197073 */ "CFCMOV16mr\000" |
| 62306 | /* 197084 */ "VMOVDQA32Z256mr\000" |
| 62307 | /* 197100 */ "VMOVDQU32Z256mr\000" |
| 62308 | /* 197116 */ "VMOVDQA64Z256mr\000" |
| 62309 | /* 197132 */ "VMOVDQU64Z256mr\000" |
| 62310 | /* 197148 */ "VMOVDQU16Z256mr\000" |
| 62311 | /* 197164 */ "VMOVDQU8Z256mr\000" |
| 62312 | /* 197179 */ "VPMOVUSDBZ256mr\000" |
| 62313 | /* 197195 */ "VPMOVSDBZ256mr\000" |
| 62314 | /* 197210 */ "VPMOVDBZ256mr\000" |
| 62315 | /* 197224 */ "VPMOVUSQBZ256mr\000" |
| 62316 | /* 197240 */ "VPMOVSQBZ256mr\000" |
| 62317 | /* 197255 */ "VPMOVQBZ256mr\000" |
| 62318 | /* 197269 */ "VPCOMPRESSBZ256mr\000" |
| 62319 | /* 197287 */ "VPMOVUSWBZ256mr\000" |
| 62320 | /* 197303 */ "VPMOVSWBZ256mr\000" |
| 62321 | /* 197318 */ "VPMOVWBZ256mr\000" |
| 62322 | /* 197332 */ "VPSCATTERDDZ256mr\000" |
| 62323 | /* 197350 */ "VMOVAPDZ256mr\000" |
| 62324 | /* 197364 */ "VSCATTERDPDZ256mr\000" |
| 62325 | /* 197382 */ "VSCATTERQPDZ256mr\000" |
| 62326 | /* 197400 */ "VCOMPRESSPDZ256mr\000" |
| 62327 | /* 197418 */ "VMOVNTPDZ256mr\000" |
| 62328 | /* 197433 */ "VMOVUPDZ256mr\000" |
| 62329 | /* 197447 */ "VPSCATTERQDZ256mr\000" |
| 62330 | /* 197465 */ "VPMOVUSQDZ256mr\000" |
| 62331 | /* 197481 */ "VPMOVSQDZ256mr\000" |
| 62332 | /* 197496 */ "VPMOVQDZ256mr\000" |
| 62333 | /* 197510 */ "VPCOMPRESSDZ256mr\000" |
| 62334 | /* 197528 */ "VCVTPS2PHZ256mr\000" |
| 62335 | /* 197544 */ "VPSCATTERDQZ256mr\000" |
| 62336 | /* 197562 */ "VMOVNTDQZ256mr\000" |
| 62337 | /* 197577 */ "VPSCATTERQQZ256mr\000" |
| 62338 | /* 197595 */ "VPCOMPRESSQZ256mr\000" |
| 62339 | /* 197613 */ "VMOVAPSZ256mr\000" |
| 62340 | /* 197627 */ "VSCATTERDPSZ256mr\000" |
| 62341 | /* 197645 */ "VSCATTERQPSZ256mr\000" |
| 62342 | /* 197663 */ "VCOMPRESSPSZ256mr\000" |
| 62343 | /* 197681 */ "VMOVNTPSZ256mr\000" |
| 62344 | /* 197696 */ "VMOVUPSZ256mr\000" |
| 62345 | /* 197710 */ "VPMOVUSDWZ256mr\000" |
| 62346 | /* 197726 */ "VPMOVSDWZ256mr\000" |
| 62347 | /* 197741 */ "VPMOVDWZ256mr\000" |
| 62348 | /* 197755 */ "VPMOVUSQWZ256mr\000" |
| 62349 | /* 197771 */ "VPMOVSQWZ256mr\000" |
| 62350 | /* 197786 */ "VPMOVQWZ256mr\000" |
| 62351 | /* 197800 */ "VPCOMPRESSWZ256mr\000" |
| 62352 | /* 197818 */ "VMOVDQA32Z128mr\000" |
| 62353 | /* 197834 */ "VMOVDQU32Z128mr\000" |
| 62354 | /* 197850 */ "VMOVDQA64Z128mr\000" |
| 62355 | /* 197866 */ "VMOVDQU64Z128mr\000" |
| 62356 | /* 197882 */ "VMOVDQU16Z128mr\000" |
| 62357 | /* 197898 */ "VMOVDQU8Z128mr\000" |
| 62358 | /* 197913 */ "VPMOVUSDBZ128mr\000" |
| 62359 | /* 197929 */ "VPMOVSDBZ128mr\000" |
| 62360 | /* 197944 */ "VPMOVDBZ128mr\000" |
| 62361 | /* 197958 */ "VPMOVUSQBZ128mr\000" |
| 62362 | /* 197974 */ "VPMOVSQBZ128mr\000" |
| 62363 | /* 197989 */ "VPMOVQBZ128mr\000" |
| 62364 | /* 198003 */ "VPCOMPRESSBZ128mr\000" |
| 62365 | /* 198021 */ "VPMOVUSWBZ128mr\000" |
| 62366 | /* 198037 */ "VPMOVSWBZ128mr\000" |
| 62367 | /* 198052 */ "VPMOVWBZ128mr\000" |
| 62368 | /* 198066 */ "VPSCATTERDDZ128mr\000" |
| 62369 | /* 198084 */ "VMOVAPDZ128mr\000" |
| 62370 | /* 198098 */ "VSCATTERDPDZ128mr\000" |
| 62371 | /* 198116 */ "VMOVHPDZ128mr\000" |
| 62372 | /* 198130 */ "VMOVLPDZ128mr\000" |
| 62373 | /* 198144 */ "VSCATTERQPDZ128mr\000" |
| 62374 | /* 198162 */ "VCOMPRESSPDZ128mr\000" |
| 62375 | /* 198180 */ "VMOVNTPDZ128mr\000" |
| 62376 | /* 198195 */ "VMOVUPDZ128mr\000" |
| 62377 | /* 198209 */ "VPSCATTERQDZ128mr\000" |
| 62378 | /* 198227 */ "VPMOVUSQDZ128mr\000" |
| 62379 | /* 198243 */ "VPMOVSQDZ128mr\000" |
| 62380 | /* 198258 */ "VPMOVQDZ128mr\000" |
| 62381 | /* 198272 */ "VPCOMPRESSDZ128mr\000" |
| 62382 | /* 198290 */ "VCVTPS2PHZ128mr\000" |
| 62383 | /* 198306 */ "VPSCATTERDQZ128mr\000" |
| 62384 | /* 198324 */ "VMOVNTDQZ128mr\000" |
| 62385 | /* 198339 */ "VPSCATTERQQZ128mr\000" |
| 62386 | /* 198357 */ "VPCOMPRESSQZ128mr\000" |
| 62387 | /* 198375 */ "VMOVAPSZ128mr\000" |
| 62388 | /* 198389 */ "VSCATTERDPSZ128mr\000" |
| 62389 | /* 198407 */ "VMOVHPSZ128mr\000" |
| 62390 | /* 198421 */ "VMOVLPSZ128mr\000" |
| 62391 | /* 198435 */ "VSCATTERQPSZ128mr\000" |
| 62392 | /* 198453 */ "VCOMPRESSPSZ128mr\000" |
| 62393 | /* 198471 */ "VMOVNTPSZ128mr\000" |
| 62394 | /* 198486 */ "VMOVUPSZ128mr\000" |
| 62395 | /* 198500 */ "VPMOVUSDWZ128mr\000" |
| 62396 | /* 198516 */ "VPMOVSDWZ128mr\000" |
| 62397 | /* 198531 */ "VPMOVDWZ128mr\000" |
| 62398 | /* 198545 */ "VPMOVUSQWZ128mr\000" |
| 62399 | /* 198561 */ "VPMOVSQWZ128mr\000" |
| 62400 | /* 198576 */ "VPMOVQWZ128mr\000" |
| 62401 | /* 198590 */ "VPCOMPRESSWZ128mr\000" |
| 62402 | /* 198608 */ "SBB8mr\000" |
| 62403 | /* 198615 */ "LOCK_SUB8mr\000" |
| 62404 | /* 198627 */ "ADC8mr\000" |
| 62405 | /* 198634 */ "LOCK_ADD8mr\000" |
| 62406 | /* 198646 */ "LOCK_AND8mr\000" |
| 62407 | /* 198658 */ "CCMP8mr\000" |
| 62408 | /* 198666 */ "LOCK_XOR8mr\000" |
| 62409 | /* 198678 */ "LOCK_OR8mr\000" |
| 62410 | /* 198689 */ "CTEST8mr\000" |
| 62411 | /* 198698 */ "MOV8mr\000" |
| 62412 | /* 198705 */ "VMOVDQAmr\000" |
| 62413 | /* 198715 */ "VPSHABmr\000" |
| 62414 | /* 198724 */ "VPSHLBmr\000" |
| 62415 | /* 198733 */ "VPROTBmr\000" |
| 62416 | /* 198742 */ "VPSHADmr\000" |
| 62417 | /* 198751 */ "VPSHLDmr\000" |
| 62418 | /* 198760 */ "VPERMIL2PDmr\000" |
| 62419 | /* 198773 */ "VMOVAPDmr\000" |
| 62420 | /* 198783 */ "VMOVHPDmr\000" |
| 62421 | /* 198793 */ "VMOVLPDmr\000" |
| 62422 | /* 198803 */ "VMOVNTPDmr\000" |
| 62423 | /* 198814 */ "VMOVUPDmr\000" |
| 62424 | /* 198824 */ "VMASKMOVPDmr\000" |
| 62425 | /* 198837 */ "VMOVSDmr\000" |
| 62426 | /* 198846 */ "VPROTDmr\000" |
| 62427 | /* 198855 */ "VPMASKMOVDmr\000" |
| 62428 | /* 198868 */ "VCVTPS2PHmr\000" |
| 62429 | /* 198880 */ "VMOVPDI2DImr\000" |
| 62430 | /* 198893 */ "VMOVPQI2QImr\000" |
| 62431 | /* 198906 */ "MOVNTImr\000" |
| 62432 | /* 198915 */ "VPSHAQmr\000" |
| 62433 | /* 198924 */ "VMOVNTDQmr\000" |
| 62434 | /* 198935 */ "VPSHLQmr\000" |
| 62435 | /* 198944 */ "MMX_MOVNTQmr\000" |
| 62436 | /* 198957 */ "VPROTQmr\000" |
| 62437 | /* 198966 */ "VPMASKMOVQmr\000" |
| 62438 | /* 198979 */ "VPERMIL2PSmr\000" |
| 62439 | /* 198992 */ "VMOVAPSmr\000" |
| 62440 | /* 199002 */ "VMOVHPSmr\000" |
| 62441 | /* 199012 */ "VMOVLPSmr\000" |
| 62442 | /* 199022 */ "VMOVNTPSmr\000" |
| 62443 | /* 199033 */ "VMOVUPSmr\000" |
| 62444 | /* 199043 */ "VMASKMOVPSmr\000" |
| 62445 | /* 199056 */ "VMOVSSmr\000" |
| 62446 | /* 199065 */ "VMOVDQUmr\000" |
| 62447 | /* 199075 */ "VPSHAWmr\000" |
| 62448 | /* 199084 */ "VPSHLWmr\000" |
| 62449 | /* 199093 */ "VPROTWmr\000" |
| 62450 | /* 199102 */ "VMOVWmr\000" |
| 62451 | /* 199110 */ "VFMADDSUBPD4Ymr\000" |
| 62452 | /* 199126 */ "VFMSUBPD4Ymr\000" |
| 62453 | /* 199139 */ "VFNMSUBPD4Ymr\000" |
| 62454 | /* 199153 */ "VFMSUBADDPD4Ymr\000" |
| 62455 | /* 199169 */ "VFMADDPD4Ymr\000" |
| 62456 | /* 199182 */ "VFNMADDPD4Ymr\000" |
| 62457 | /* 199196 */ "VFMADDSUBPS4Ymr\000" |
| 62458 | /* 199212 */ "VFMSUBPS4Ymr\000" |
| 62459 | /* 199225 */ "VFNMSUBPS4Ymr\000" |
| 62460 | /* 199239 */ "VFMSUBADDPS4Ymr\000" |
| 62461 | /* 199255 */ "VFMADDPS4Ymr\000" |
| 62462 | /* 199268 */ "VFNMADDPS4Ymr\000" |
| 62463 | /* 199282 */ "VMOVDQAYmr\000" |
| 62464 | /* 199293 */ "VPERMIL2PDYmr\000" |
| 62465 | /* 199307 */ "VMOVAPDYmr\000" |
| 62466 | /* 199318 */ "VMOVNTPDYmr\000" |
| 62467 | /* 199330 */ "VMOVUPDYmr\000" |
| 62468 | /* 199341 */ "VMASKMOVPDYmr\000" |
| 62469 | /* 199355 */ "VPMASKMOVDYmr\000" |
| 62470 | /* 199369 */ "VCVTPS2PHYmr\000" |
| 62471 | /* 199382 */ "VMOVNTDQYmr\000" |
| 62472 | /* 199394 */ "VPMASKMOVQYmr\000" |
| 62473 | /* 199408 */ "VPERMIL2PSYmr\000" |
| 62474 | /* 199422 */ "VMOVAPSYmr\000" |
| 62475 | /* 199433 */ "VMOVNTPSYmr\000" |
| 62476 | /* 199445 */ "VMOVUPSYmr\000" |
| 62477 | /* 199456 */ "VMASKMOVPSYmr\000" |
| 62478 | /* 199470 */ "VMOVDQUYmr\000" |
| 62479 | /* 199481 */ "VMOVDQA32Zmr\000" |
| 62480 | /* 199494 */ "VMOVDQU32Zmr\000" |
| 62481 | /* 199507 */ "VMOVDQA64Zmr\000" |
| 62482 | /* 199520 */ "VMOVDQU64Zmr\000" |
| 62483 | /* 199533 */ "VMOVPQIto64Zmr\000" |
| 62484 | /* 199548 */ "VMOVDQU16Zmr\000" |
| 62485 | /* 199561 */ "VMOVDQU8Zmr\000" |
| 62486 | /* 199573 */ "VPMOVUSDBZmr\000" |
| 62487 | /* 199586 */ "VPMOVSDBZmr\000" |
| 62488 | /* 199598 */ "VPMOVDBZmr\000" |
| 62489 | /* 199609 */ "VPMOVUSQBZmr\000" |
| 62490 | /* 199622 */ "VPMOVSQBZmr\000" |
| 62491 | /* 199634 */ "VPMOVQBZmr\000" |
| 62492 | /* 199645 */ "VPCOMPRESSBZmr\000" |
| 62493 | /* 199660 */ "VPMOVUSWBZmr\000" |
| 62494 | /* 199673 */ "VPMOVSWBZmr\000" |
| 62495 | /* 199685 */ "VPMOVWBZmr\000" |
| 62496 | /* 199696 */ "VPSCATTERDDZmr\000" |
| 62497 | /* 199711 */ "VMOVAPDZmr\000" |
| 62498 | /* 199722 */ "VSCATTERDPDZmr\000" |
| 62499 | /* 199737 */ "VSCATTERQPDZmr\000" |
| 62500 | /* 199752 */ "VCOMPRESSPDZmr\000" |
| 62501 | /* 199767 */ "VMOVNTPDZmr\000" |
| 62502 | /* 199779 */ "VMOVUPDZmr\000" |
| 62503 | /* 199790 */ "VPSCATTERQDZmr\000" |
| 62504 | /* 199805 */ "VPMOVUSQDZmr\000" |
| 62505 | /* 199818 */ "VPMOVSQDZmr\000" |
| 62506 | /* 199830 */ "VPMOVQDZmr\000" |
| 62507 | /* 199841 */ "VPCOMPRESSDZmr\000" |
| 62508 | /* 199856 */ "VMOVSDZmr\000" |
| 62509 | /* 199866 */ "VCVTPS2PHZmr\000" |
| 62510 | /* 199879 */ "VMOVSHZmr\000" |
| 62511 | /* 199889 */ "VMOVPDI2DIZmr\000" |
| 62512 | /* 199903 */ "VMOVZPDILo2PDIZmr\000" |
| 62513 | /* 199921 */ "VMOVPQI2QIZmr\000" |
| 62514 | /* 199935 */ "VMOVZPWILo2PWIZmr\000" |
| 62515 | /* 199953 */ "VPSCATTERDQZmr\000" |
| 62516 | /* 199968 */ "VMOVNTDQZmr\000" |
| 62517 | /* 199980 */ "VPSCATTERQQZmr\000" |
| 62518 | /* 199995 */ "VPCOMPRESSQZmr\000" |
| 62519 | /* 200010 */ "VMOVAPSZmr\000" |
| 62520 | /* 200021 */ "VSCATTERDPSZmr\000" |
| 62521 | /* 200036 */ "VSCATTERQPSZmr\000" |
| 62522 | /* 200051 */ "VCOMPRESSPSZmr\000" |
| 62523 | /* 200066 */ "VMOVNTPSZmr\000" |
| 62524 | /* 200078 */ "VMOVUPSZmr\000" |
| 62525 | /* 200089 */ "VMOVSSZmr\000" |
| 62526 | /* 200099 */ "VPMOVUSDWZmr\000" |
| 62527 | /* 200112 */ "VPMOVSDWZmr\000" |
| 62528 | /* 200124 */ "VPMOVDWZmr\000" |
| 62529 | /* 200135 */ "VPMOVUSQWZmr\000" |
| 62530 | /* 200148 */ "VPMOVSQWZmr\000" |
| 62531 | /* 200160 */ "VPMOVQWZmr\000" |
| 62532 | /* 200171 */ "VPCOMPRESSWZmr\000" |
| 62533 | /* 200186 */ "PUSH32rmr\000" |
| 62534 | /* 200196 */ "POP32rmr\000" |
| 62535 | /* 200205 */ "PUSH64rmr\000" |
| 62536 | /* 200215 */ "POP64rmr\000" |
| 62537 | /* 200224 */ "PUSH16rmr\000" |
| 62538 | /* 200234 */ "POP16rmr\000" |
| 62539 | /* 200243 */ "VPBLENDVBrmr\000" |
| 62540 | /* 200256 */ "VBLENDVPDrmr\000" |
| 62541 | /* 200269 */ "VPPERMrmr\000" |
| 62542 | /* 200279 */ "VBLENDVPSrmr\000" |
| 62543 | /* 200292 */ "VPCMOVrmr\000" |
| 62544 | /* 200302 */ "VPBLENDVBYrmr\000" |
| 62545 | /* 200316 */ "VBLENDVPDYrmr\000" |
| 62546 | /* 200330 */ "VBLENDVPSYrmr\000" |
| 62547 | /* 200344 */ "VPCMOVYrmr\000" |
| 62548 | /* 200355 */ "SHA1MSG1rr\000" |
| 62549 | /* 200366 */ "VSHA512MSG1rr\000" |
| 62550 | /* 200380 */ "VSM3MSG1rr\000" |
| 62551 | /* 200391 */ "SHA256MSG1rr\000" |
| 62552 | /* 200404 */ "PFRCPIT1rr\000" |
| 62553 | /* 200415 */ "PFRSQIT1rr\000" |
| 62554 | /* 200426 */ "SBB32rr\000" |
| 62555 | /* 200434 */ "SUB32rr\000" |
| 62556 | /* 200442 */ "ADC32rr\000" |
| 62557 | /* 200450 */ "BLCIC32rr\000" |
| 62558 | /* 200460 */ "BLSIC32rr\000" |
| 62559 | /* 200470 */ "T1MSKC32rr\000" |
| 62560 | /* 200481 */ "BTC32rr\000" |
| 62561 | /* 200489 */ "VMREAD32rr\000" |
| 62562 | /* 200500 */ "XADD32rr\000" |
| 62563 | /* 200509 */ "AND32rr\000" |
| 62564 | /* 200517 */ "MOVBE32rr\000" |
| 62565 | /* 200527 */ "VMWRITE32rr\000" |
| 62566 | /* 200539 */ "BSF32rr\000" |
| 62567 | /* 200547 */ "CMPXCHG32rr\000" |
| 62568 | /* 200559 */ "BLCI32rr\000" |
| 62569 | /* 200568 */ "BZHI32rr\000" |
| 62570 | /* 200577 */ "BLSI32rr\000" |
| 62571 | /* 200586 */ "BLCMSK32rr\000" |
| 62572 | /* 200597 */ "BLSMSK32rr\000" |
| 62573 | /* 200608 */ "TZMSK32rr\000" |
| 62574 | /* 200618 */ "BLCFILL32rr\000" |
| 62575 | /* 200630 */ "BLSFILL32rr\000" |
| 62576 | /* 200642 */ "LSL32rr\000" |
| 62577 | /* 200650 */ "IMUL32rr\000" |
| 62578 | /* 200659 */ "ANDN32rr\000" |
| 62579 | /* 200668 */ "IN32rr\000" |
| 62580 | /* 200675 */ "PDEP32rr\000" |
| 62581 | /* 200684 */ "CCMP32rr\000" |
| 62582 | /* 200693 */ "LAR32rr\000" |
| 62583 | /* 200701 */ "XOR32rr\000" |
| 62584 | /* 200709 */ "BSR32rr\000" |
| 62585 | /* 200717 */ "BLSR32rr\000" |
| 62586 | /* 200726 */ "BTR32rr\000" |
| 62587 | /* 200734 */ "BEXTR32rr\000" |
| 62588 | /* 200744 */ "BLCS32rr\000" |
| 62589 | /* 200753 */ "BTS32rr\000" |
| 62590 | /* 200761 */ "BT32rr\000" |
| 62591 | /* 200768 */ "POPCNT32rr\000" |
| 62592 | /* 200779 */ "LZCNT32rr\000" |
| 62593 | /* 200789 */ "TZCNT32rr\000" |
| 62594 | /* 200799 */ "CTEST32rr\000" |
| 62595 | /* 200809 */ "OUT32rr\000" |
| 62596 | /* 200817 */ "PEXT32rr\000" |
| 62597 | /* 200826 */ "CFCMOV32rr\000" |
| 62598 | /* 200837 */ "ADCX32rr\000" |
| 62599 | /* 200846 */ "SHLX32rr\000" |
| 62600 | /* 200855 */ "MULX32rr\000" |
| 62601 | /* 200864 */ "ADOX32rr\000" |
| 62602 | /* 200873 */ "SARX32rr\000" |
| 62603 | /* 200882 */ "SHRX32rr\000" |
| 62604 | /* 200891 */ "SHA1MSG2rr\000" |
| 62605 | /* 200902 */ "VSHA512MSG2rr\000" |
| 62606 | /* 200916 */ "VSM3MSG2rr\000" |
| 62607 | /* 200927 */ "SHA256MSG2rr\000" |
| 62608 | /* 200940 */ "VSHA512RNDS2rr\000" |
| 62609 | /* 200955 */ "SHA256RNDS2rr\000" |
| 62610 | /* 200969 */ "PFRCPIT2rr\000" |
| 62611 | /* 200980 */ "SBB64rr\000" |
| 62612 | /* 200988 */ "SUB64rr\000" |
| 62613 | /* 200996 */ "ADC64rr\000" |
| 62614 | /* 201004 */ "BLCIC64rr\000" |
| 62615 | /* 201014 */ "BLSIC64rr\000" |
| 62616 | /* 201024 */ "T1MSKC64rr\000" |
| 62617 | /* 201035 */ "BTC64rr\000" |
| 62618 | /* 201043 */ "VMREAD64rr\000" |
| 62619 | /* 201054 */ "XADD64rr\000" |
| 62620 | /* 201063 */ "AND64rr\000" |
| 62621 | /* 201071 */ "MMX_MOVD64rr\000" |
| 62622 | /* 201084 */ "MOVBE64rr\000" |
| 62623 | /* 201094 */ "VMWRITE64rr\000" |
| 62624 | /* 201106 */ "BSF64rr\000" |
| 62625 | /* 201114 */ "CMPXCHG64rr\000" |
| 62626 | /* 201126 */ "BLCI64rr\000" |
| 62627 | /* 201135 */ "BZHI64rr\000" |
| 62628 | /* 201144 */ "VCVTTSD2SI64rr\000" |
| 62629 | /* 201159 */ "VCVTSD2SI64rr\000" |
| 62630 | /* 201173 */ "VCVTTSS2SI64rr\000" |
| 62631 | /* 201188 */ "VCVTSS2SI64rr\000" |
| 62632 | /* 201202 */ "BLSI64rr\000" |
| 62633 | /* 201211 */ "BLCMSK64rr\000" |
| 62634 | /* 201222 */ "BLSMSK64rr\000" |
| 62635 | /* 201233 */ "TZMSK64rr\000" |
| 62636 | /* 201243 */ "BLCFILL64rr\000" |
| 62637 | /* 201255 */ "BLSFILL64rr\000" |
| 62638 | /* 201267 */ "LSL64rr\000" |
| 62639 | /* 201275 */ "IMUL64rr\000" |
| 62640 | /* 201284 */ "ANDN64rr\000" |
| 62641 | /* 201293 */ "PDEP64rr\000" |
| 62642 | /* 201302 */ "CCMP64rr\000" |
| 62643 | /* 201311 */ "MMX_MOVQ64rr\000" |
| 62644 | /* 201324 */ "LAR64rr\000" |
| 62645 | /* 201332 */ "MMX_MOVQ2FR64rr\000" |
| 62646 | /* 201348 */ "XOR64rr\000" |
| 62647 | /* 201356 */ "BSR64rr\000" |
| 62648 | /* 201364 */ "BLSR64rr\000" |
| 62649 | /* 201373 */ "BTR64rr\000" |
| 62650 | /* 201381 */ "BEXTR64rr\000" |
| 62651 | /* 201391 */ "BLCS64rr\000" |
| 62652 | /* 201400 */ "BTS64rr\000" |
| 62653 | /* 201408 */ "BT64rr\000" |
| 62654 | /* 201415 */ "POPCNT64rr\000" |
| 62655 | /* 201426 */ "LZCNT64rr\000" |
| 62656 | /* 201436 */ "TZCNT64rr\000" |
| 62657 | /* 201446 */ "CTEST64rr\000" |
| 62658 | /* 201456 */ "PEXT64rr\000" |
| 62659 | /* 201465 */ "CFCMOV64rr\000" |
| 62660 | /* 201476 */ "VMOVSHtoW64rr\000" |
| 62661 | /* 201490 */ "ADCX64rr\000" |
| 62662 | /* 201499 */ "SHLX64rr\000" |
| 62663 | /* 201508 */ "MULX64rr\000" |
| 62664 | /* 201517 */ "ADOX64rr\000" |
| 62665 | /* 201526 */ "SARX64rr\000" |
| 62666 | /* 201535 */ "SHRX64rr\000" |
| 62667 | /* 201544 */ "MMX_MOVD64from64rr\000" |
| 62668 | /* 201563 */ "MMX_MOVD64to64rr\000" |
| 62669 | /* 201580 */ "VMOVSDto64rr\000" |
| 62670 | /* 201593 */ "VMOVPQIto64rr\000" |
| 62671 | /* 201607 */ "VFMADDSUBPD4rr\000" |
| 62672 | /* 201622 */ "VFMSUBPD4rr\000" |
| 62673 | /* 201634 */ "VFNMSUBPD4rr\000" |
| 62674 | /* 201647 */ "VFMSUBADDPD4rr\000" |
| 62675 | /* 201662 */ "VFMADDPD4rr\000" |
| 62676 | /* 201674 */ "VFNMADDPD4rr\000" |
| 62677 | /* 201687 */ "VFMSUBSD4rr\000" |
| 62678 | /* 201699 */ "VFNMSUBSD4rr\000" |
| 62679 | /* 201712 */ "VFMADDSD4rr\000" |
| 62680 | /* 201724 */ "VFNMADDSD4rr\000" |
| 62681 | /* 201737 */ "VSM4RNDS4rr\000" |
| 62682 | /* 201749 */ "VFMADDSUBPS4rr\000" |
| 62683 | /* 201764 */ "VFMSUBPS4rr\000" |
| 62684 | /* 201776 */ "VFNMSUBPS4rr\000" |
| 62685 | /* 201789 */ "VFMSUBADDPS4rr\000" |
| 62686 | /* 201804 */ "VFMADDPS4rr\000" |
| 62687 | /* 201816 */ "VFNMADDPS4rr\000" |
| 62688 | /* 201829 */ "VFMSUBSS4rr\000" |
| 62689 | /* 201841 */ "VFNMSUBSS4rr\000" |
| 62690 | /* 201854 */ "VFMADDSS4rr\000" |
| 62691 | /* 201866 */ "VFNMADDSS4rr\000" |
| 62692 | /* 201879 */ "VSM4KEY4rr\000" |
| 62693 | /* 201890 */ "SBB16rr\000" |
| 62694 | /* 201898 */ "SUB16rr\000" |
| 62695 | /* 201906 */ "ADC16rr\000" |
| 62696 | /* 201914 */ "BTC16rr\000" |
| 62697 | /* 201922 */ "XADD16rr\000" |
| 62698 | /* 201931 */ "AND16rr\000" |
| 62699 | /* 201939 */ "MOVBE16rr\000" |
| 62700 | /* 201949 */ "VCVTNEPS2BF16rr\000" |
| 62701 | /* 201965 */ "BSF16rr\000" |
| 62702 | /* 201973 */ "CMPXCHG16rr\000" |
| 62703 | /* 201985 */ "ARPL16rr\000" |
| 62704 | /* 201994 */ "LSL16rr\000" |
| 62705 | /* 202002 */ "IMUL16rr\000" |
| 62706 | /* 202011 */ "IN16rr\000" |
| 62707 | /* 202018 */ "CCMP16rr\000" |
| 62708 | /* 202027 */ "LAR16rr\000" |
| 62709 | /* 202035 */ "XOR16rr\000" |
| 62710 | /* 202043 */ "BSR16rr\000" |
| 62711 | /* 202051 */ "BTR16rr\000" |
| 62712 | /* 202059 */ "BTS16rr\000" |
| 62713 | /* 202067 */ "BT16rr\000" |
| 62714 | /* 202074 */ "POPCNT16rr\000" |
| 62715 | /* 202085 */ "LZCNT16rr\000" |
| 62716 | /* 202095 */ "TZCNT16rr\000" |
| 62717 | /* 202105 */ "CTEST16rr\000" |
| 62718 | /* 202115 */ "OUT16rr\000" |
| 62719 | /* 202123 */ "CFCMOV16rr\000" |
| 62720 | /* 202134 */ "VMOVDQA32Z256rr\000" |
| 62721 | /* 202150 */ "VMOVDQU32Z256rr\000" |
| 62722 | /* 202166 */ "VBROADCASTF32X2Z256rr\000" |
| 62723 | /* 202188 */ "VBROADCASTI32X2Z256rr\000" |
| 62724 | /* 202210 */ "VMOVDQA64Z256rr\000" |
| 62725 | /* 202226 */ "VMOVDQU64Z256rr\000" |
| 62726 | /* 202242 */ "VSM4RNDS4Z256rr\000" |
| 62727 | /* 202258 */ "VSM4KEY4Z256rr\000" |
| 62728 | /* 202273 */ "VCVTNE2PS2BF16Z256rr\000" |
| 62729 | /* 202294 */ "VCVTNEPS2BF16Z256rr\000" |
| 62730 | /* 202314 */ "VSUBBF16Z256rr\000" |
| 62731 | /* 202329 */ "VADDBF16Z256rr\000" |
| 62732 | /* 202344 */ "VSCALEFBF16Z256rr\000" |
| 62733 | /* 202362 */ "VMULBF16Z256rr\000" |
| 62734 | /* 202377 */ "VMINBF16Z256rr\000" |
| 62735 | /* 202392 */ "VDIVBF16Z256rr\000" |
| 62736 | /* 202407 */ "VMAXBF16Z256rr\000" |
| 62737 | /* 202422 */ "VMOVDQU16Z256rr\000" |
| 62738 | /* 202438 */ "VCVT2PH2BF8Z256rr\000" |
| 62739 | /* 202456 */ "VCVTBIASPH2BF8Z256rr\000" |
| 62740 | /* 202477 */ "VCVTPH2BF8Z256rr\000" |
| 62741 | /* 202494 */ "VCVT2PH2HF8Z256rr\000" |
| 62742 | /* 202512 */ "VCVTBIASPH2HF8Z256rr\000" |
| 62743 | /* 202533 */ "VCVTPH2HF8Z256rr\000" |
| 62744 | /* 202550 */ "VMOVDQU8Z256rr\000" |
| 62745 | /* 202565 */ "VPERMI2BZ256rr\000" |
| 62746 | /* 202580 */ "VPERMT2BZ256rr\000" |
| 62747 | /* 202595 */ "VPSUBBZ256rr\000" |
| 62748 | /* 202608 */ "VPADDBZ256rr\000" |
| 62749 | /* 202621 */ "VPEXPANDBZ256rr\000" |
| 62750 | /* 202637 */ "VPMOVUSDBZ256rr\000" |
| 62751 | /* 202653 */ "VPMOVSDBZ256rr\000" |
| 62752 | /* 202668 */ "VPMOVDBZ256rr\000" |
| 62753 | /* 202682 */ "VPSHUFBZ256rr\000" |
| 62754 | /* 202696 */ "VPAVGBZ256rr\000" |
| 62755 | /* 202709 */ "VGF2P8MULBZ256rr\000" |
| 62756 | /* 202726 */ "VPBLENDMBZ256rr\000" |
| 62757 | /* 202742 */ "VPTESTNMBZ256rr\000" |
| 62758 | /* 202758 */ "VPSHUFBITQMBZ256rr\000" |
| 62759 | /* 202777 */ "VPERMBZ256rr\000" |
| 62760 | /* 202790 */ "VPTESTMBZ256rr\000" |
| 62761 | /* 202805 */ "VPCMPEQBZ256rr\000" |
| 62762 | /* 202820 */ "VPMOVUSQBZ256rr\000" |
| 62763 | /* 202836 */ "VPMOVSQBZ256rr\000" |
| 62764 | /* 202851 */ "VPMULTISHIFTQBZ256rr\000" |
| 62765 | /* 202872 */ "VPMOVQBZ256rr\000" |
| 62766 | /* 202886 */ "VPABSBZ256rr\000" |
| 62767 | /* 202899 */ "VPSUBSBZ256rr\000" |
| 62768 | /* 202913 */ "VPADDSBZ256rr\000" |
| 62769 | /* 202927 */ "VPMINSBZ256rr\000" |
| 62770 | /* 202941 */ "VPCOMPRESSBZ256rr\000" |
| 62771 | /* 202959 */ "VPSUBUSBZ256rr\000" |
| 62772 | /* 202974 */ "VPADDUSBZ256rr\000" |
| 62773 | /* 202989 */ "VPMAXSBZ256rr\000" |
| 62774 | /* 203003 */ "VPCMPGTBZ256rr\000" |
| 62775 | /* 203018 */ "VPOPCNTBZ256rr\000" |
| 62776 | /* 203033 */ "VPBROADCASTBZ256rr\000" |
| 62777 | /* 203052 */ "VPMINUBZ256rr\000" |
| 62778 | /* 203066 */ "VPMAXUBZ256rr\000" |
| 62779 | /* 203080 */ "VPACKSSWBZ256rr\000" |
| 62780 | /* 203096 */ "VPACKUSWBZ256rr\000" |
| 62781 | /* 203112 */ "VPMOVUSWBZ256rr\000" |
| 62782 | /* 203128 */ "VPMOVSWBZ256rr\000" |
| 62783 | /* 203143 */ "VPMOVWBZ256rr\000" |
| 62784 | /* 203157 */ "VAESDECZ256rr\000" |
| 62785 | /* 203171 */ "VAESENCZ256rr\000" |
| 62786 | /* 203185 */ "VPERMI2DZ256rr\000" |
| 62787 | /* 203200 */ "VPERMT2DZ256rr\000" |
| 62788 | /* 203215 */ "VPBROADCASTMW2DZ256rr\000" |
| 62789 | /* 203237 */ "VPSRADZ256rr\000" |
| 62790 | /* 203250 */ "VPSUBDZ256rr\000" |
| 62791 | /* 203263 */ "VPMOVSXBDZ256rr\000" |
| 62792 | /* 203279 */ "VPMOVZXBDZ256rr\000" |
| 62793 | /* 203295 */ "VPADDDZ256rr\000" |
| 62794 | /* 203308 */ "VPANDDZ256rr\000" |
| 62795 | /* 203321 */ "VPEXPANDDZ256rr\000" |
| 62796 | /* 203337 */ "VPSLLDZ256rr\000" |
| 62797 | /* 203350 */ "VPMULLDZ256rr\000" |
| 62798 | /* 203364 */ "VPSRLDZ256rr\000" |
| 62799 | /* 203377 */ "VPBLENDMDZ256rr\000" |
| 62800 | /* 203393 */ "VPTESTNMDZ256rr\000" |
| 62801 | /* 203409 */ "VPERMDZ256rr\000" |
| 62802 | /* 203422 */ "VPTESTMDZ256rr\000" |
| 62803 | /* 203437 */ "VPANDNDZ256rr\000" |
| 62804 | /* 203451 */ "VCVTPH2PDZ256rr\000" |
| 62805 | /* 203467 */ "VPERMI2PDZ256rr\000" |
| 62806 | /* 203483 */ "VCVTDQ2PDZ256rr\000" |
| 62807 | /* 203499 */ "VCVTUDQ2PDZ256rr\000" |
| 62808 | /* 203516 */ "VCVTQQ2PDZ256rr\000" |
| 62809 | /* 203532 */ "VCVTUQQ2PDZ256rr\000" |
| 62810 | /* 203549 */ "VCVTPS2PDZ256rr\000" |
| 62811 | /* 203565 */ "VPERMT2PDZ256rr\000" |
| 62812 | /* 203581 */ "VMOVAPDZ256rr\000" |
| 62813 | /* 203595 */ "VSUBPDZ256rr\000" |
| 62814 | /* 203608 */ "VMINCPDZ256rr\000" |
| 62815 | /* 203622 */ "VMAXCPDZ256rr\000" |
| 62816 | /* 203636 */ "VADDPDZ256rr\000" |
| 62817 | /* 203649 */ "VEXPANDPDZ256rr\000" |
| 62818 | /* 203665 */ "VANDPDZ256rr\000" |
| 62819 | /* 203678 */ "VSCALEFPDZ256rr\000" |
| 62820 | /* 203694 */ "VUNPCKHPDZ256rr\000" |
| 62821 | /* 203710 */ "VPERMILPDZ256rr\000" |
| 62822 | /* 203726 */ "VUNPCKLPDZ256rr\000" |
| 62823 | /* 203742 */ "VMULPDZ256rr\000" |
| 62824 | /* 203755 */ "VBLENDMPDZ256rr\000" |
| 62825 | /* 203771 */ "VPERMPDZ256rr\000" |
| 62826 | /* 203785 */ "VANDNPDZ256rr\000" |
| 62827 | /* 203799 */ "VMINPDZ256rr\000" |
| 62828 | /* 203812 */ "VORPDZ256rr\000" |
| 62829 | /* 203824 */ "VXORPDZ256rr\000" |
| 62830 | /* 203837 */ "VCOMPRESSPDZ256rr\000" |
| 62831 | /* 203855 */ "VMOVUPDZ256rr\000" |
| 62832 | /* 203869 */ "VDIVPDZ256rr\000" |
| 62833 | /* 203882 */ "VMAXPDZ256rr\000" |
| 62834 | /* 203895 */ "VPCMPEQDZ256rr\000" |
| 62835 | /* 203910 */ "VPMOVUSQDZ256rr\000" |
| 62836 | /* 203926 */ "VPMOVSQDZ256rr\000" |
| 62837 | /* 203941 */ "VPMOVQDZ256rr\000" |
| 62838 | /* 203955 */ "VPORDZ256rr\000" |
| 62839 | /* 203967 */ "VPXORDZ256rr\000" |
| 62840 | /* 203980 */ "VPABSDZ256rr\000" |
| 62841 | /* 203993 */ "VPMINSDZ256rr\000" |
| 62842 | /* 204007 */ "VPCOMPRESSDZ256rr\000" |
| 62843 | /* 204025 */ "VBROADCASTSDZ256rr\000" |
| 62844 | /* 204044 */ "VPMAXSDZ256rr\000" |
| 62845 | /* 204058 */ "VP2INTERSECTDZ256rr\000" |
| 62846 | /* 204078 */ "VPCONFLICTDZ256rr\000" |
| 62847 | /* 204096 */ "VPCMPGTDZ256rr\000" |
| 62848 | /* 204111 */ "VPOPCNTDZ256rr\000" |
| 62849 | /* 204126 */ "VPLZCNTDZ256rr\000" |
| 62850 | /* 204141 */ "VPBROADCASTDZ256rr\000" |
| 62851 | /* 204160 */ "VPMINUDZ256rr\000" |
| 62852 | /* 204174 */ "VPMAXUDZ256rr\000" |
| 62853 | /* 204188 */ "VPSRAVDZ256rr\000" |
| 62854 | /* 204202 */ "VPSLLVDZ256rr\000" |
| 62855 | /* 204216 */ "VPROLVDZ256rr\000" |
| 62856 | /* 204230 */ "VPSRLVDZ256rr\000" |
| 62857 | /* 204244 */ "VPRORVDZ256rr\000" |
| 62858 | /* 204258 */ "VPMADDWDZ256rr\000" |
| 62859 | /* 204273 */ "VPUNPCKHWDZ256rr\000" |
| 62860 | /* 204290 */ "VPUNPCKLWDZ256rr\000" |
| 62861 | /* 204307 */ "VPMOVSXWDZ256rr\000" |
| 62862 | /* 204323 */ "VPMOVZXWDZ256rr\000" |
| 62863 | /* 204339 */ "VCVTHF82PHZ256rr\000" |
| 62864 | /* 204356 */ "VCVTPD2PHZ256rr\000" |
| 62865 | /* 204372 */ "VCVTDQ2PHZ256rr\000" |
| 62866 | /* 204388 */ "VCVTUDQ2PHZ256rr\000" |
| 62867 | /* 204405 */ "VCVTQQ2PHZ256rr\000" |
| 62868 | /* 204421 */ "VCVTUQQ2PHZ256rr\000" |
| 62869 | /* 204438 */ "VCVTPS2PHZ256rr\000" |
| 62870 | /* 204454 */ "VCVTW2PHZ256rr\000" |
| 62871 | /* 204469 */ "VCVTUW2PHZ256rr\000" |
| 62872 | /* 204485 */ "VSUBPHZ256rr\000" |
| 62873 | /* 204498 */ "VFCMULCPHZ256rr\000" |
| 62874 | /* 204514 */ "VFMULCPHZ256rr\000" |
| 62875 | /* 204529 */ "VMINCPHZ256rr\000" |
| 62876 | /* 204543 */ "VMAXCPHZ256rr\000" |
| 62877 | /* 204557 */ "VADDPHZ256rr\000" |
| 62878 | /* 204570 */ "VSCALEFPHZ256rr\000" |
| 62879 | /* 204586 */ "VMULPHZ256rr\000" |
| 62880 | /* 204599 */ "VMINPHZ256rr\000" |
| 62881 | /* 204612 */ "VDIVPHZ256rr\000" |
| 62882 | /* 204625 */ "VMAXPHZ256rr\000" |
| 62883 | /* 204638 */ "VMOVDDUPZ256rr\000" |
| 62884 | /* 204653 */ "VMOVSHDUPZ256rr\000" |
| 62885 | /* 204669 */ "VMOVSLDUPZ256rr\000" |
| 62886 | /* 204685 */ "VPBROADCASTMB2QZ256rr\000" |
| 62887 | /* 204707 */ "VPERMI2QZ256rr\000" |
| 62888 | /* 204722 */ "VPERMT2QZ256rr\000" |
| 62889 | /* 204737 */ "VPSRAQZ256rr\000" |
| 62890 | /* 204750 */ "VPSUBQZ256rr\000" |
| 62891 | /* 204763 */ "VPMOVSXBQZ256rr\000" |
| 62892 | /* 204779 */ "VPMOVZXBQZ256rr\000" |
| 62893 | /* 204795 */ "VCVTTPD2DQZ256rr\000" |
| 62894 | /* 204812 */ "VCVTPD2DQZ256rr\000" |
| 62895 | /* 204828 */ "VCVTTPH2DQZ256rr\000" |
| 62896 | /* 204845 */ "VCVTPH2DQZ256rr\000" |
| 62897 | /* 204861 */ "VCVTTPS2DQZ256rr\000" |
| 62898 | /* 204878 */ "VCVTPS2DQZ256rr\000" |
| 62899 | /* 204894 */ "VPADDQZ256rr\000" |
| 62900 | /* 204907 */ "VPUNPCKHDQZ256rr\000" |
| 62901 | /* 204924 */ "VPUNPCKLDQZ256rr\000" |
| 62902 | /* 204941 */ "VPMULDQZ256rr\000" |
| 62903 | /* 204955 */ "VPANDQZ256rr\000" |
| 62904 | /* 204968 */ "VPEXPANDQZ256rr\000" |
| 62905 | /* 204984 */ "VPUNPCKHQDQZ256rr\000" |
| 62906 | /* 205002 */ "VPUNPCKLQDQZ256rr\000" |
| 62907 | /* 205020 */ "VCVTTPD2UDQZ256rr\000" |
| 62908 | /* 205038 */ "VCVTPD2UDQZ256rr\000" |
| 62909 | /* 205055 */ "VCVTTPH2UDQZ256rr\000" |
| 62910 | /* 205073 */ "VCVTPH2UDQZ256rr\000" |
| 62911 | /* 205090 */ "VCVTTPS2UDQZ256rr\000" |
| 62912 | /* 205108 */ "VCVTPS2UDQZ256rr\000" |
| 62913 | /* 205125 */ "VPMULUDQZ256rr\000" |
| 62914 | /* 205140 */ "VPMOVSXDQZ256rr\000" |
| 62915 | /* 205156 */ "VPMOVZXDQZ256rr\000" |
| 62916 | /* 205172 */ "VPSLLQZ256rr\000" |
| 62917 | /* 205185 */ "VPMULLQZ256rr\000" |
| 62918 | /* 205199 */ "VPSRLQZ256rr\000" |
| 62919 | /* 205212 */ "VPBLENDMQZ256rr\000" |
| 62920 | /* 205228 */ "VPTESTNMQZ256rr\000" |
| 62921 | /* 205244 */ "VPERMQZ256rr\000" |
| 62922 | /* 205257 */ "VPTESTMQZ256rr\000" |
| 62923 | /* 205272 */ "VPANDNQZ256rr\000" |
| 62924 | /* 205286 */ "VCVTTPD2QQZ256rr\000" |
| 62925 | /* 205303 */ "VCVTPD2QQZ256rr\000" |
| 62926 | /* 205319 */ "VCVTTPH2QQZ256rr\000" |
| 62927 | /* 205336 */ "VCVTPH2QQZ256rr\000" |
| 62928 | /* 205352 */ "VCVTTPS2QQZ256rr\000" |
| 62929 | /* 205369 */ "VCVTPS2QQZ256rr\000" |
| 62930 | /* 205385 */ "VPCMPEQQZ256rr\000" |
| 62931 | /* 205400 */ "VCVTTPD2UQQZ256rr\000" |
| 62932 | /* 205418 */ "VCVTPD2UQQZ256rr\000" |
| 62933 | /* 205435 */ "VCVTTPH2UQQZ256rr\000" |
| 62934 | /* 205453 */ "VCVTPH2UQQZ256rr\000" |
| 62935 | /* 205470 */ "VCVTTPS2UQQZ256rr\000" |
| 62936 | /* 205488 */ "VCVTPS2UQQZ256rr\000" |
| 62937 | /* 205505 */ "VPORQZ256rr\000" |
| 62938 | /* 205517 */ "VPXORQZ256rr\000" |
| 62939 | /* 205530 */ "VPABSQZ256rr\000" |
| 62940 | /* 205543 */ "VPMINSQZ256rr\000" |
| 62941 | /* 205557 */ "VPCOMPRESSQZ256rr\000" |
| 62942 | /* 205575 */ "VPMAXSQZ256rr\000" |
| 62943 | /* 205589 */ "VP2INTERSECTQZ256rr\000" |
| 62944 | /* 205609 */ "VPCONFLICTQZ256rr\000" |
| 62945 | /* 205627 */ "VPCMPGTQZ256rr\000" |
| 62946 | /* 205642 */ "VPOPCNTQZ256rr\000" |
| 62947 | /* 205657 */ "VPLZCNTQZ256rr\000" |
| 62948 | /* 205672 */ "VPBROADCASTQZ256rr\000" |
| 62949 | /* 205691 */ "VPMINUQZ256rr\000" |
| 62950 | /* 205705 */ "VPMAXUQZ256rr\000" |
| 62951 | /* 205719 */ "VPSRAVQZ256rr\000" |
| 62952 | /* 205733 */ "VPSLLVQZ256rr\000" |
| 62953 | /* 205747 */ "VPROLVQZ256rr\000" |
| 62954 | /* 205761 */ "VPSRLVQZ256rr\000" |
| 62955 | /* 205775 */ "VPRORVQZ256rr\000" |
| 62956 | /* 205789 */ "VPMOVSXWQZ256rr\000" |
| 62957 | /* 205805 */ "VPMOVZXWQZ256rr\000" |
| 62958 | /* 205821 */ "VCVT2PH2BF8SZ256rr\000" |
| 62959 | /* 205840 */ "VCVTBIASPH2BF8SZ256rr\000" |
| 62960 | /* 205862 */ "VCVTPH2BF8SZ256rr\000" |
| 62961 | /* 205880 */ "VCVT2PH2HF8SZ256rr\000" |
| 62962 | /* 205899 */ "VCVTBIASPH2HF8SZ256rr\000" |
| 62963 | /* 205921 */ "VCVTPH2HF8SZ256rr\000" |
| 62964 | /* 205939 */ "VCVTTBF162IBSZ256rr\000" |
| 62965 | /* 205959 */ "VCVTBF162IBSZ256rr\000" |
| 62966 | /* 205978 */ "VCVTTPH2IBSZ256rr\000" |
| 62967 | /* 205996 */ "VCVTPH2IBSZ256rr\000" |
| 62968 | /* 206013 */ "VCVTTPS2IBSZ256rr\000" |
| 62969 | /* 206031 */ "VCVTPS2IBSZ256rr\000" |
| 62970 | /* 206048 */ "VCVTTBF162IUBSZ256rr\000" |
| 62971 | /* 206069 */ "VCVTBF162IUBSZ256rr\000" |
| 62972 | /* 206089 */ "VCVTTPH2IUBSZ256rr\000" |
| 62973 | /* 206108 */ "VCVTPH2IUBSZ256rr\000" |
| 62974 | /* 206126 */ "VCVTTPS2IUBSZ256rr\000" |
| 62975 | /* 206145 */ "VCVTPS2IUBSZ256rr\000" |
| 62976 | /* 206163 */ "VCVTPD2PSZ256rr\000" |
| 62977 | /* 206179 */ "VCVTPH2PSZ256rr\000" |
| 62978 | /* 206195 */ "VPERMI2PSZ256rr\000" |
| 62979 | /* 206211 */ "VCVTDQ2PSZ256rr\000" |
| 62980 | /* 206227 */ "VCVTUDQ2PSZ256rr\000" |
| 62981 | /* 206244 */ "VCVTQQ2PSZ256rr\000" |
| 62982 | /* 206260 */ "VCVTUQQ2PSZ256rr\000" |
| 62983 | /* 206277 */ "VPERMT2PSZ256rr\000" |
| 62984 | /* 206293 */ "VMOVAPSZ256rr\000" |
| 62985 | /* 206307 */ "VSUBPSZ256rr\000" |
| 62986 | /* 206320 */ "VMINCPSZ256rr\000" |
| 62987 | /* 206334 */ "VMAXCPSZ256rr\000" |
| 62988 | /* 206348 */ "VADDPSZ256rr\000" |
| 62989 | /* 206361 */ "VEXPANDPSZ256rr\000" |
| 62990 | /* 206377 */ "VANDPSZ256rr\000" |
| 62991 | /* 206390 */ "VSCALEFPSZ256rr\000" |
| 62992 | /* 206406 */ "VUNPCKHPSZ256rr\000" |
| 62993 | /* 206422 */ "VPERMILPSZ256rr\000" |
| 62994 | /* 206438 */ "VUNPCKLPSZ256rr\000" |
| 62995 | /* 206454 */ "VMULPSZ256rr\000" |
| 62996 | /* 206467 */ "VBLENDMPSZ256rr\000" |
| 62997 | /* 206483 */ "VPERMPSZ256rr\000" |
| 62998 | /* 206497 */ "VANDNPSZ256rr\000" |
| 62999 | /* 206511 */ "VMINPSZ256rr\000" |
| 63000 | /* 206524 */ "VORPSZ256rr\000" |
| 63001 | /* 206536 */ "VXORPSZ256rr\000" |
| 63002 | /* 206549 */ "VCOMPRESSPSZ256rr\000" |
| 63003 | /* 206567 */ "VMOVUPSZ256rr\000" |
| 63004 | /* 206581 */ "VDIVPSZ256rr\000" |
| 63005 | /* 206594 */ "VMAXPSZ256rr\000" |
| 63006 | /* 206607 */ "VCVTTPD2DQSZ256rr\000" |
| 63007 | /* 206625 */ "VCVTTPS2DQSZ256rr\000" |
| 63008 | /* 206643 */ "VCVTTPD2UDQSZ256rr\000" |
| 63009 | /* 206662 */ "VCVTTPS2UDQSZ256rr\000" |
| 63010 | /* 206681 */ "VCVTTPD2QQSZ256rr\000" |
| 63011 | /* 206699 */ "VCVTTPS2QQSZ256rr\000" |
| 63012 | /* 206717 */ "VCVTTPD2UQQSZ256rr\000" |
| 63013 | /* 206736 */ "VCVTTPS2UQQSZ256rr\000" |
| 63014 | /* 206755 */ "VBROADCASTSSZ256rr\000" |
| 63015 | /* 206774 */ "VAESDECLASTZ256rr\000" |
| 63016 | /* 206792 */ "VAESENCLASTZ256rr\000" |
| 63017 | /* 206810 */ "VCVTTPH2WZ256rr\000" |
| 63018 | /* 206826 */ "VCVTPH2WZ256rr\000" |
| 63019 | /* 206841 */ "VPERMI2WZ256rr\000" |
| 63020 | /* 206856 */ "VPERMT2WZ256rr\000" |
| 63021 | /* 206871 */ "VPSRAWZ256rr\000" |
| 63022 | /* 206884 */ "VPSADBWZ256rr\000" |
| 63023 | /* 206898 */ "VPUNPCKHBWZ256rr\000" |
| 63024 | /* 206915 */ "VPUNPCKLBWZ256rr\000" |
| 63025 | /* 206932 */ "VPSUBWZ256rr\000" |
| 63026 | /* 206945 */ "VPMOVSXBWZ256rr\000" |
| 63027 | /* 206961 */ "VPMOVZXBWZ256rr\000" |
| 63028 | /* 206977 */ "VPADDWZ256rr\000" |
| 63029 | /* 206990 */ "VPEXPANDWZ256rr\000" |
| 63030 | /* 207006 */ "VPACKSSDWZ256rr\000" |
| 63031 | /* 207022 */ "VPACKUSDWZ256rr\000" |
| 63032 | /* 207038 */ "VPMOVUSDWZ256rr\000" |
| 63033 | /* 207054 */ "VPMOVSDWZ256rr\000" |
| 63034 | /* 207069 */ "VPMOVDWZ256rr\000" |
| 63035 | /* 207083 */ "VPAVGWZ256rr\000" |
| 63036 | /* 207096 */ "VPMULHWZ256rr\000" |
| 63037 | /* 207110 */ "VPSLLWZ256rr\000" |
| 63038 | /* 207123 */ "VPMULLWZ256rr\000" |
| 63039 | /* 207137 */ "VPSRLWZ256rr\000" |
| 63040 | /* 207150 */ "VPBLENDMWZ256rr\000" |
| 63041 | /* 207166 */ "VPTESTNMWZ256rr\000" |
| 63042 | /* 207182 */ "VPERMWZ256rr\000" |
| 63043 | /* 207195 */ "VPTESTMWZ256rr\000" |
| 63044 | /* 207210 */ "VPCMPEQWZ256rr\000" |
| 63045 | /* 207225 */ "VPMOVUSQWZ256rr\000" |
| 63046 | /* 207241 */ "VPMOVSQWZ256rr\000" |
| 63047 | /* 207256 */ "VPMOVQWZ256rr\000" |
| 63048 | /* 207270 */ "VPABSWZ256rr\000" |
| 63049 | /* 207283 */ "VPMADDUBSWZ256rr\000" |
| 63050 | /* 207300 */ "VPSUBSWZ256rr\000" |
| 63051 | /* 207314 */ "VPADDSWZ256rr\000" |
| 63052 | /* 207328 */ "VPMINSWZ256rr\000" |
| 63053 | /* 207342 */ "VPMULHRSWZ256rr\000" |
| 63054 | /* 207358 */ "VPCOMPRESSWZ256rr\000" |
| 63055 | /* 207376 */ "VPSUBUSWZ256rr\000" |
| 63056 | /* 207391 */ "VPADDUSWZ256rr\000" |
| 63057 | /* 207406 */ "VPMAXSWZ256rr\000" |
| 63058 | /* 207420 */ "VPCMPGTWZ256rr\000" |
| 63059 | /* 207435 */ "VPOPCNTWZ256rr\000" |
| 63060 | /* 207450 */ "VPBROADCASTWZ256rr\000" |
| 63061 | /* 207469 */ "VCVTTPH2UWZ256rr\000" |
| 63062 | /* 207486 */ "VCVTPH2UWZ256rr\000" |
| 63063 | /* 207502 */ "VPMULHUWZ256rr\000" |
| 63064 | /* 207517 */ "VPMINUWZ256rr\000" |
| 63065 | /* 207531 */ "VPMAXUWZ256rr\000" |
| 63066 | /* 207545 */ "VPSRAVWZ256rr\000" |
| 63067 | /* 207559 */ "VPSLLVWZ256rr\000" |
| 63068 | /* 207573 */ "VPSRLVWZ256rr\000" |
| 63069 | /* 207587 */ "VCVT2PS2PHXZ256rr\000" |
| 63070 | /* 207605 */ "VCVTPS2PHXZ256rr\000" |
| 63071 | /* 207622 */ "VCVTPH2PSXZ256rr\000" |
| 63072 | /* 207639 */ "VPBROADCASTBrZ256rr\000" |
| 63073 | /* 207659 */ "VPBROADCASTDrZ256rr\000" |
| 63074 | /* 207679 */ "VPBROADCASTQrZ256rr\000" |
| 63075 | /* 207699 */ "VPBROADCASTWrZ256rr\000" |
| 63076 | /* 207719 */ "VAESKEYGENASSIST128rr\000" |
| 63077 | /* 207741 */ "VMOVDQA32Z128rr\000" |
| 63078 | /* 207757 */ "VMOVDQU32Z128rr\000" |
| 63079 | /* 207773 */ "VBROADCASTI32X2Z128rr\000" |
| 63080 | /* 207795 */ "VMOVDQA64Z128rr\000" |
| 63081 | /* 207811 */ "VMOVDQU64Z128rr\000" |
| 63082 | /* 207827 */ "VSM4RNDS4Z128rr\000" |
| 63083 | /* 207843 */ "VSM4KEY4Z128rr\000" |
| 63084 | /* 207858 */ "VCVTNE2PS2BF16Z128rr\000" |
| 63085 | /* 207879 */ "VCVTNEPS2BF16Z128rr\000" |
| 63086 | /* 207899 */ "VSUBBF16Z128rr\000" |
| 63087 | /* 207914 */ "VADDBF16Z128rr\000" |
| 63088 | /* 207929 */ "VSCALEFBF16Z128rr\000" |
| 63089 | /* 207947 */ "VMULBF16Z128rr\000" |
| 63090 | /* 207962 */ "VMINBF16Z128rr\000" |
| 63091 | /* 207977 */ "VDIVBF16Z128rr\000" |
| 63092 | /* 207992 */ "VMAXBF16Z128rr\000" |
| 63093 | /* 208007 */ "VMOVDQU16Z128rr\000" |
| 63094 | /* 208023 */ "VCVT2PH2BF8Z128rr\000" |
| 63095 | /* 208041 */ "VCVTBIASPH2BF8Z128rr\000" |
| 63096 | /* 208062 */ "VCVTPH2BF8Z128rr\000" |
| 63097 | /* 208079 */ "VCVT2PH2HF8Z128rr\000" |
| 63098 | /* 208097 */ "VCVTBIASPH2HF8Z128rr\000" |
| 63099 | /* 208118 */ "VCVTPH2HF8Z128rr\000" |
| 63100 | /* 208135 */ "VMOVDQU8Z128rr\000" |
| 63101 | /* 208150 */ "VPERMI2BZ128rr\000" |
| 63102 | /* 208165 */ "VPERMT2BZ128rr\000" |
| 63103 | /* 208180 */ "VPSUBBZ128rr\000" |
| 63104 | /* 208193 */ "VPADDBZ128rr\000" |
| 63105 | /* 208206 */ "VPEXPANDBZ128rr\000" |
| 63106 | /* 208222 */ "VPMOVUSDBZ128rr\000" |
| 63107 | /* 208238 */ "VPMOVSDBZ128rr\000" |
| 63108 | /* 208253 */ "VPMOVDBZ128rr\000" |
| 63109 | /* 208267 */ "VPSHUFBZ128rr\000" |
| 63110 | /* 208281 */ "VPAVGBZ128rr\000" |
| 63111 | /* 208294 */ "VGF2P8MULBZ128rr\000" |
| 63112 | /* 208311 */ "VPBLENDMBZ128rr\000" |
| 63113 | /* 208327 */ "VPTESTNMBZ128rr\000" |
| 63114 | /* 208343 */ "VPSHUFBITQMBZ128rr\000" |
| 63115 | /* 208362 */ "VPERMBZ128rr\000" |
| 63116 | /* 208375 */ "VPTESTMBZ128rr\000" |
| 63117 | /* 208390 */ "VPCMPEQBZ128rr\000" |
| 63118 | /* 208405 */ "VPMOVUSQBZ128rr\000" |
| 63119 | /* 208421 */ "VPMOVSQBZ128rr\000" |
| 63120 | /* 208436 */ "VPMULTISHIFTQBZ128rr\000" |
| 63121 | /* 208457 */ "VPMOVQBZ128rr\000" |
| 63122 | /* 208471 */ "VPABSBZ128rr\000" |
| 63123 | /* 208484 */ "VPSUBSBZ128rr\000" |
| 63124 | /* 208498 */ "VPADDSBZ128rr\000" |
| 63125 | /* 208512 */ "VPMINSBZ128rr\000" |
| 63126 | /* 208526 */ "VPCOMPRESSBZ128rr\000" |
| 63127 | /* 208544 */ "VPSUBUSBZ128rr\000" |
| 63128 | /* 208559 */ "VPADDUSBZ128rr\000" |
| 63129 | /* 208574 */ "VPMAXSBZ128rr\000" |
| 63130 | /* 208588 */ "VPCMPGTBZ128rr\000" |
| 63131 | /* 208603 */ "VPOPCNTBZ128rr\000" |
| 63132 | /* 208618 */ "VPBROADCASTBZ128rr\000" |
| 63133 | /* 208637 */ "VPMINUBZ128rr\000" |
| 63134 | /* 208651 */ "VPMAXUBZ128rr\000" |
| 63135 | /* 208665 */ "VPACKSSWBZ128rr\000" |
| 63136 | /* 208681 */ "VPACKUSWBZ128rr\000" |
| 63137 | /* 208697 */ "VPMOVUSWBZ128rr\000" |
| 63138 | /* 208713 */ "VPMOVSWBZ128rr\000" |
| 63139 | /* 208728 */ "VPMOVWBZ128rr\000" |
| 63140 | /* 208742 */ "VAESDECZ128rr\000" |
| 63141 | /* 208756 */ "VAESENCZ128rr\000" |
| 63142 | /* 208770 */ "VPERMI2DZ128rr\000" |
| 63143 | /* 208785 */ "VPERMT2DZ128rr\000" |
| 63144 | /* 208800 */ "VPBROADCASTMW2DZ128rr\000" |
| 63145 | /* 208822 */ "VPSRADZ128rr\000" |
| 63146 | /* 208835 */ "VPSUBDZ128rr\000" |
| 63147 | /* 208848 */ "VPMOVSXBDZ128rr\000" |
| 63148 | /* 208864 */ "VPMOVZXBDZ128rr\000" |
| 63149 | /* 208880 */ "VPADDDZ128rr\000" |
| 63150 | /* 208893 */ "VPANDDZ128rr\000" |
| 63151 | /* 208906 */ "VPEXPANDDZ128rr\000" |
| 63152 | /* 208922 */ "VPSLLDZ128rr\000" |
| 63153 | /* 208935 */ "VPMULLDZ128rr\000" |
| 63154 | /* 208949 */ "VPSRLDZ128rr\000" |
| 63155 | /* 208962 */ "VPBLENDMDZ128rr\000" |
| 63156 | /* 208978 */ "VPTESTNMDZ128rr\000" |
| 63157 | /* 208994 */ "VPTESTMDZ128rr\000" |
| 63158 | /* 209009 */ "VPANDNDZ128rr\000" |
| 63159 | /* 209023 */ "VCVTPH2PDZ128rr\000" |
| 63160 | /* 209039 */ "VPERMI2PDZ128rr\000" |
| 63161 | /* 209055 */ "VCVTDQ2PDZ128rr\000" |
| 63162 | /* 209071 */ "VCVTUDQ2PDZ128rr\000" |
| 63163 | /* 209088 */ "VCVTQQ2PDZ128rr\000" |
| 63164 | /* 209104 */ "VCVTUQQ2PDZ128rr\000" |
| 63165 | /* 209121 */ "VCVTPS2PDZ128rr\000" |
| 63166 | /* 209137 */ "VPERMT2PDZ128rr\000" |
| 63167 | /* 209153 */ "VMOVAPDZ128rr\000" |
| 63168 | /* 209167 */ "VSUBPDZ128rr\000" |
| 63169 | /* 209180 */ "VMINCPDZ128rr\000" |
| 63170 | /* 209194 */ "VMAXCPDZ128rr\000" |
| 63171 | /* 209208 */ "VADDPDZ128rr\000" |
| 63172 | /* 209221 */ "VEXPANDPDZ128rr\000" |
| 63173 | /* 209237 */ "VANDPDZ128rr\000" |
| 63174 | /* 209250 */ "VSCALEFPDZ128rr\000" |
| 63175 | /* 209266 */ "VUNPCKHPDZ128rr\000" |
| 63176 | /* 209282 */ "VPERMILPDZ128rr\000" |
| 63177 | /* 209298 */ "VUNPCKLPDZ128rr\000" |
| 63178 | /* 209314 */ "VMULPDZ128rr\000" |
| 63179 | /* 209327 */ "VBLENDMPDZ128rr\000" |
| 63180 | /* 209343 */ "VANDNPDZ128rr\000" |
| 63181 | /* 209357 */ "VMINPDZ128rr\000" |
| 63182 | /* 209370 */ "VORPDZ128rr\000" |
| 63183 | /* 209382 */ "VXORPDZ128rr\000" |
| 63184 | /* 209395 */ "VCOMPRESSPDZ128rr\000" |
| 63185 | /* 209413 */ "VMOVUPDZ128rr\000" |
| 63186 | /* 209427 */ "VDIVPDZ128rr\000" |
| 63187 | /* 209440 */ "VMAXPDZ128rr\000" |
| 63188 | /* 209453 */ "VPCMPEQDZ128rr\000" |
| 63189 | /* 209468 */ "VPMOVUSQDZ128rr\000" |
| 63190 | /* 209484 */ "VPMOVSQDZ128rr\000" |
| 63191 | /* 209499 */ "VPMOVQDZ128rr\000" |
| 63192 | /* 209513 */ "VPORDZ128rr\000" |
| 63193 | /* 209525 */ "VPXORDZ128rr\000" |
| 63194 | /* 209538 */ "VPABSDZ128rr\000" |
| 63195 | /* 209551 */ "VPMINSDZ128rr\000" |
| 63196 | /* 209565 */ "VPCOMPRESSDZ128rr\000" |
| 63197 | /* 209583 */ "VPMAXSDZ128rr\000" |
| 63198 | /* 209597 */ "VP2INTERSECTDZ128rr\000" |
| 63199 | /* 209617 */ "VPCONFLICTDZ128rr\000" |
| 63200 | /* 209635 */ "VPCMPGTDZ128rr\000" |
| 63201 | /* 209650 */ "VPOPCNTDZ128rr\000" |
| 63202 | /* 209665 */ "VPLZCNTDZ128rr\000" |
| 63203 | /* 209680 */ "VPBROADCASTDZ128rr\000" |
| 63204 | /* 209699 */ "VPMINUDZ128rr\000" |
| 63205 | /* 209713 */ "VPMAXUDZ128rr\000" |
| 63206 | /* 209727 */ "VPSRAVDZ128rr\000" |
| 63207 | /* 209741 */ "VPSLLVDZ128rr\000" |
| 63208 | /* 209755 */ "VPROLVDZ128rr\000" |
| 63209 | /* 209769 */ "VPSRLVDZ128rr\000" |
| 63210 | /* 209783 */ "VPRORVDZ128rr\000" |
| 63211 | /* 209797 */ "VPMADDWDZ128rr\000" |
| 63212 | /* 209812 */ "VPUNPCKHWDZ128rr\000" |
| 63213 | /* 209829 */ "VPUNPCKLWDZ128rr\000" |
| 63214 | /* 209846 */ "VPMOVSXWDZ128rr\000" |
| 63215 | /* 209862 */ "VPMOVZXWDZ128rr\000" |
| 63216 | /* 209878 */ "VCVTHF82PHZ128rr\000" |
| 63217 | /* 209895 */ "VCVTPD2PHZ128rr\000" |
| 63218 | /* 209911 */ "VCVTDQ2PHZ128rr\000" |
| 63219 | /* 209927 */ "VCVTUDQ2PHZ128rr\000" |
| 63220 | /* 209944 */ "VCVTQQ2PHZ128rr\000" |
| 63221 | /* 209960 */ "VCVTUQQ2PHZ128rr\000" |
| 63222 | /* 209977 */ "VCVTPS2PHZ128rr\000" |
| 63223 | /* 209993 */ "VCVTW2PHZ128rr\000" |
| 63224 | /* 210008 */ "VCVTUW2PHZ128rr\000" |
| 63225 | /* 210024 */ "VSUBPHZ128rr\000" |
| 63226 | /* 210037 */ "VFCMULCPHZ128rr\000" |
| 63227 | /* 210053 */ "VFMULCPHZ128rr\000" |
| 63228 | /* 210068 */ "VMINCPHZ128rr\000" |
| 63229 | /* 210082 */ "VMAXCPHZ128rr\000" |
| 63230 | /* 210096 */ "VADDPHZ128rr\000" |
| 63231 | /* 210109 */ "VSCALEFPHZ128rr\000" |
| 63232 | /* 210125 */ "VMULPHZ128rr\000" |
| 63233 | /* 210138 */ "VMINPHZ128rr\000" |
| 63234 | /* 210151 */ "VDIVPHZ128rr\000" |
| 63235 | /* 210164 */ "VMAXPHZ128rr\000" |
| 63236 | /* 210177 */ "VMOVDDUPZ128rr\000" |
| 63237 | /* 210192 */ "VMOVSHDUPZ128rr\000" |
| 63238 | /* 210208 */ "VMOVSLDUPZ128rr\000" |
| 63239 | /* 210224 */ "VPBROADCASTMB2QZ128rr\000" |
| 63240 | /* 210246 */ "VPERMI2QZ128rr\000" |
| 63241 | /* 210261 */ "VPERMT2QZ128rr\000" |
| 63242 | /* 210276 */ "VPSRAQZ128rr\000" |
| 63243 | /* 210289 */ "VPSUBQZ128rr\000" |
| 63244 | /* 210302 */ "VPMOVSXBQZ128rr\000" |
| 63245 | /* 210318 */ "VPMOVZXBQZ128rr\000" |
| 63246 | /* 210334 */ "VCVTTPD2DQZ128rr\000" |
| 63247 | /* 210351 */ "VCVTPD2DQZ128rr\000" |
| 63248 | /* 210367 */ "VCVTTPH2DQZ128rr\000" |
| 63249 | /* 210384 */ "VCVTPH2DQZ128rr\000" |
| 63250 | /* 210400 */ "VCVTTPS2DQZ128rr\000" |
| 63251 | /* 210417 */ "VCVTPS2DQZ128rr\000" |
| 63252 | /* 210433 */ "VPADDQZ128rr\000" |
| 63253 | /* 210446 */ "VPUNPCKHDQZ128rr\000" |
| 63254 | /* 210463 */ "VPUNPCKLDQZ128rr\000" |
| 63255 | /* 210480 */ "VPMULDQZ128rr\000" |
| 63256 | /* 210494 */ "VPANDQZ128rr\000" |
| 63257 | /* 210507 */ "VPEXPANDQZ128rr\000" |
| 63258 | /* 210523 */ "VPUNPCKHQDQZ128rr\000" |
| 63259 | /* 210541 */ "VPUNPCKLQDQZ128rr\000" |
| 63260 | /* 210559 */ "VCVTTPD2UDQZ128rr\000" |
| 63261 | /* 210577 */ "VCVTPD2UDQZ128rr\000" |
| 63262 | /* 210594 */ "VCVTTPH2UDQZ128rr\000" |
| 63263 | /* 210612 */ "VCVTPH2UDQZ128rr\000" |
| 63264 | /* 210629 */ "VCVTTPS2UDQZ128rr\000" |
| 63265 | /* 210647 */ "VCVTPS2UDQZ128rr\000" |
| 63266 | /* 210664 */ "VPMULUDQZ128rr\000" |
| 63267 | /* 210679 */ "VPMOVSXDQZ128rr\000" |
| 63268 | /* 210695 */ "VPMOVZXDQZ128rr\000" |
| 63269 | /* 210711 */ "VPSLLQZ128rr\000" |
| 63270 | /* 210724 */ "VPMULLQZ128rr\000" |
| 63271 | /* 210738 */ "VPSRLQZ128rr\000" |
| 63272 | /* 210751 */ "VPBLENDMQZ128rr\000" |
| 63273 | /* 210767 */ "VPTESTNMQZ128rr\000" |
| 63274 | /* 210783 */ "VPTESTMQZ128rr\000" |
| 63275 | /* 210798 */ "VPANDNQZ128rr\000" |
| 63276 | /* 210812 */ "VCVTTPD2QQZ128rr\000" |
| 63277 | /* 210829 */ "VCVTPD2QQZ128rr\000" |
| 63278 | /* 210845 */ "VCVTTPH2QQZ128rr\000" |
| 63279 | /* 210862 */ "VCVTPH2QQZ128rr\000" |
| 63280 | /* 210878 */ "VCVTTPS2QQZ128rr\000" |
| 63281 | /* 210895 */ "VCVTPS2QQZ128rr\000" |
| 63282 | /* 210911 */ "VPCMPEQQZ128rr\000" |
| 63283 | /* 210926 */ "VCVTTPD2UQQZ128rr\000" |
| 63284 | /* 210944 */ "VCVTPD2UQQZ128rr\000" |
| 63285 | /* 210961 */ "VCVTTPH2UQQZ128rr\000" |
| 63286 | /* 210979 */ "VCVTPH2UQQZ128rr\000" |
| 63287 | /* 210996 */ "VCVTTPS2UQQZ128rr\000" |
| 63288 | /* 211014 */ "VCVTPS2UQQZ128rr\000" |
| 63289 | /* 211031 */ "VPORQZ128rr\000" |
| 63290 | /* 211043 */ "VPXORQZ128rr\000" |
| 63291 | /* 211056 */ "VPABSQZ128rr\000" |
| 63292 | /* 211069 */ "VPMINSQZ128rr\000" |
| 63293 | /* 211083 */ "VPCOMPRESSQZ128rr\000" |
| 63294 | /* 211101 */ "VPMAXSQZ128rr\000" |
| 63295 | /* 211115 */ "VP2INTERSECTQZ128rr\000" |
| 63296 | /* 211135 */ "VPCONFLICTQZ128rr\000" |
| 63297 | /* 211153 */ "VPCMPGTQZ128rr\000" |
| 63298 | /* 211168 */ "VPOPCNTQZ128rr\000" |
| 63299 | /* 211183 */ "VPLZCNTQZ128rr\000" |
| 63300 | /* 211198 */ "VPBROADCASTQZ128rr\000" |
| 63301 | /* 211217 */ "VPMINUQZ128rr\000" |
| 63302 | /* 211231 */ "VPMAXUQZ128rr\000" |
| 63303 | /* 211245 */ "VPSRAVQZ128rr\000" |
| 63304 | /* 211259 */ "VPSLLVQZ128rr\000" |
| 63305 | /* 211273 */ "VPROLVQZ128rr\000" |
| 63306 | /* 211287 */ "VPSRLVQZ128rr\000" |
| 63307 | /* 211301 */ "VPRORVQZ128rr\000" |
| 63308 | /* 211315 */ "VPMOVSXWQZ128rr\000" |
| 63309 | /* 211331 */ "VPMOVZXWQZ128rr\000" |
| 63310 | /* 211347 */ "VCVT2PH2BF8SZ128rr\000" |
| 63311 | /* 211366 */ "VCVTBIASPH2BF8SZ128rr\000" |
| 63312 | /* 211388 */ "VCVTPH2BF8SZ128rr\000" |
| 63313 | /* 211406 */ "VCVT2PH2HF8SZ128rr\000" |
| 63314 | /* 211425 */ "VCVTBIASPH2HF8SZ128rr\000" |
| 63315 | /* 211447 */ "VCVTPH2HF8SZ128rr\000" |
| 63316 | /* 211465 */ "VCVTTBF162IBSZ128rr\000" |
| 63317 | /* 211485 */ "VCVTBF162IBSZ128rr\000" |
| 63318 | /* 211504 */ "VCVTTPH2IBSZ128rr\000" |
| 63319 | /* 211522 */ "VCVTPH2IBSZ128rr\000" |
| 63320 | /* 211539 */ "VCVTTPS2IBSZ128rr\000" |
| 63321 | /* 211557 */ "VCVTPS2IBSZ128rr\000" |
| 63322 | /* 211574 */ "VCVTTBF162IUBSZ128rr\000" |
| 63323 | /* 211595 */ "VCVTBF162IUBSZ128rr\000" |
| 63324 | /* 211615 */ "VCVTTPH2IUBSZ128rr\000" |
| 63325 | /* 211634 */ "VCVTPH2IUBSZ128rr\000" |
| 63326 | /* 211652 */ "VCVTTPS2IUBSZ128rr\000" |
| 63327 | /* 211671 */ "VCVTPS2IUBSZ128rr\000" |
| 63328 | /* 211689 */ "VCVTPD2PSZ128rr\000" |
| 63329 | /* 211705 */ "VCVTPH2PSZ128rr\000" |
| 63330 | /* 211721 */ "VPERMI2PSZ128rr\000" |
| 63331 | /* 211737 */ "VCVTDQ2PSZ128rr\000" |
| 63332 | /* 211753 */ "VCVTUDQ2PSZ128rr\000" |
| 63333 | /* 211770 */ "VCVTQQ2PSZ128rr\000" |
| 63334 | /* 211786 */ "VCVTUQQ2PSZ128rr\000" |
| 63335 | /* 211803 */ "VPERMT2PSZ128rr\000" |
| 63336 | /* 211819 */ "VMOVAPSZ128rr\000" |
| 63337 | /* 211833 */ "VSUBPSZ128rr\000" |
| 63338 | /* 211846 */ "VMINCPSZ128rr\000" |
| 63339 | /* 211860 */ "VMAXCPSZ128rr\000" |
| 63340 | /* 211874 */ "VADDPSZ128rr\000" |
| 63341 | /* 211887 */ "VEXPANDPSZ128rr\000" |
| 63342 | /* 211903 */ "VANDPSZ128rr\000" |
| 63343 | /* 211916 */ "VSCALEFPSZ128rr\000" |
| 63344 | /* 211932 */ "VUNPCKHPSZ128rr\000" |
| 63345 | /* 211948 */ "VPERMILPSZ128rr\000" |
| 63346 | /* 211964 */ "VUNPCKLPSZ128rr\000" |
| 63347 | /* 211980 */ "VMULPSZ128rr\000" |
| 63348 | /* 211993 */ "VBLENDMPSZ128rr\000" |
| 63349 | /* 212009 */ "VANDNPSZ128rr\000" |
| 63350 | /* 212023 */ "VMINPSZ128rr\000" |
| 63351 | /* 212036 */ "VORPSZ128rr\000" |
| 63352 | /* 212048 */ "VXORPSZ128rr\000" |
| 63353 | /* 212061 */ "VCOMPRESSPSZ128rr\000" |
| 63354 | /* 212079 */ "VMOVUPSZ128rr\000" |
| 63355 | /* 212093 */ "VDIVPSZ128rr\000" |
| 63356 | /* 212106 */ "VMAXPSZ128rr\000" |
| 63357 | /* 212119 */ "VCVTTPD2DQSZ128rr\000" |
| 63358 | /* 212137 */ "VCVTTPS2DQSZ128rr\000" |
| 63359 | /* 212155 */ "VCVTTPD2UDQSZ128rr\000" |
| 63360 | /* 212174 */ "VCVTTPS2UDQSZ128rr\000" |
| 63361 | /* 212193 */ "VCVTTPD2QQSZ128rr\000" |
| 63362 | /* 212211 */ "VCVTTPS2QQSZ128rr\000" |
| 63363 | /* 212229 */ "VCVTTPD2UQQSZ128rr\000" |
| 63364 | /* 212248 */ "VCVTTPS2UQQSZ128rr\000" |
| 63365 | /* 212267 */ "VBROADCASTSSZ128rr\000" |
| 63366 | /* 212286 */ "VAESDECLASTZ128rr\000" |
| 63367 | /* 212304 */ "VAESENCLASTZ128rr\000" |
| 63368 | /* 212322 */ "VCVTTPH2WZ128rr\000" |
| 63369 | /* 212338 */ "VCVTPH2WZ128rr\000" |
| 63370 | /* 212353 */ "VPERMI2WZ128rr\000" |
| 63371 | /* 212368 */ "VPERMT2WZ128rr\000" |
| 63372 | /* 212383 */ "VPSRAWZ128rr\000" |
| 63373 | /* 212396 */ "VPSADBWZ128rr\000" |
| 63374 | /* 212410 */ "VPUNPCKHBWZ128rr\000" |
| 63375 | /* 212427 */ "VPUNPCKLBWZ128rr\000" |
| 63376 | /* 212444 */ "VPSUBWZ128rr\000" |
| 63377 | /* 212457 */ "VPMOVSXBWZ128rr\000" |
| 63378 | /* 212473 */ "VPMOVZXBWZ128rr\000" |
| 63379 | /* 212489 */ "VPADDWZ128rr\000" |
| 63380 | /* 212502 */ "VPEXPANDWZ128rr\000" |
| 63381 | /* 212518 */ "VPACKSSDWZ128rr\000" |
| 63382 | /* 212534 */ "VPACKUSDWZ128rr\000" |
| 63383 | /* 212550 */ "VPMOVUSDWZ128rr\000" |
| 63384 | /* 212566 */ "VPMOVSDWZ128rr\000" |
| 63385 | /* 212581 */ "VPMOVDWZ128rr\000" |
| 63386 | /* 212595 */ "VPAVGWZ128rr\000" |
| 63387 | /* 212608 */ "VPMULHWZ128rr\000" |
| 63388 | /* 212622 */ "VPSLLWZ128rr\000" |
| 63389 | /* 212635 */ "VPMULLWZ128rr\000" |
| 63390 | /* 212649 */ "VPSRLWZ128rr\000" |
| 63391 | /* 212662 */ "VPBLENDMWZ128rr\000" |
| 63392 | /* 212678 */ "VPTESTNMWZ128rr\000" |
| 63393 | /* 212694 */ "VPERMWZ128rr\000" |
| 63394 | /* 212707 */ "VPTESTMWZ128rr\000" |
| 63395 | /* 212722 */ "VPCMPEQWZ128rr\000" |
| 63396 | /* 212737 */ "VPMOVUSQWZ128rr\000" |
| 63397 | /* 212753 */ "VPMOVSQWZ128rr\000" |
| 63398 | /* 212768 */ "VPMOVQWZ128rr\000" |
| 63399 | /* 212782 */ "VPABSWZ128rr\000" |
| 63400 | /* 212795 */ "VPMADDUBSWZ128rr\000" |
| 63401 | /* 212812 */ "VPSUBSWZ128rr\000" |
| 63402 | /* 212826 */ "VPADDSWZ128rr\000" |
| 63403 | /* 212840 */ "VPMINSWZ128rr\000" |
| 63404 | /* 212854 */ "VPMULHRSWZ128rr\000" |
| 63405 | /* 212870 */ "VPCOMPRESSWZ128rr\000" |
| 63406 | /* 212888 */ "VPSUBUSWZ128rr\000" |
| 63407 | /* 212903 */ "VPADDUSWZ128rr\000" |
| 63408 | /* 212918 */ "VPMAXSWZ128rr\000" |
| 63409 | /* 212932 */ "VPCMPGTWZ128rr\000" |
| 63410 | /* 212947 */ "VPOPCNTWZ128rr\000" |
| 63411 | /* 212962 */ "VPBROADCASTWZ128rr\000" |
| 63412 | /* 212981 */ "VCVTTPH2UWZ128rr\000" |
| 63413 | /* 212998 */ "VCVTPH2UWZ128rr\000" |
| 63414 | /* 213014 */ "VPMULHUWZ128rr\000" |
| 63415 | /* 213029 */ "VPMINUWZ128rr\000" |
| 63416 | /* 213043 */ "VPMAXUWZ128rr\000" |
| 63417 | /* 213057 */ "VPSRAVWZ128rr\000" |
| 63418 | /* 213071 */ "VPSLLVWZ128rr\000" |
| 63419 | /* 213085 */ "VPSRLVWZ128rr\000" |
| 63420 | /* 213099 */ "VCVT2PS2PHXZ128rr\000" |
| 63421 | /* 213117 */ "VCVTPS2PHXZ128rr\000" |
| 63422 | /* 213134 */ "VCVTPH2PSXZ128rr\000" |
| 63423 | /* 213151 */ "VPBROADCASTBrZ128rr\000" |
| 63424 | /* 213171 */ "VPBROADCASTDrZ128rr\000" |
| 63425 | /* 213191 */ "VPBROADCASTQrZ128rr\000" |
| 63426 | /* 213211 */ "VPBROADCASTWrZ128rr\000" |
| 63427 | /* 213231 */ "SBB8rr\000" |
| 63428 | /* 213238 */ "SUB8rr\000" |
| 63429 | /* 213245 */ "ADC8rr\000" |
| 63430 | /* 213252 */ "XADD8rr\000" |
| 63431 | /* 213260 */ "AND8rr\000" |
| 63432 | /* 213267 */ "CMPXCHG8rr\000" |
| 63433 | /* 213278 */ "IN8rr\000" |
| 63434 | /* 213284 */ "CCMP8rr\000" |
| 63435 | /* 213292 */ "XOR8rr\000" |
| 63436 | /* 213299 */ "CTEST8rr\000" |
| 63437 | /* 213308 */ "OUT8rr\000" |
| 63438 | /* 213315 */ "MOV8rr\000" |
| 63439 | /* 213322 */ "VMOVDQArr\000" |
| 63440 | /* 213332 */ "VPSHABrr\000" |
| 63441 | /* 213341 */ "VPSUBBrr\000" |
| 63442 | /* 213350 */ "MMX_PSUBBrr\000" |
| 63443 | /* 213362 */ "VPADDBrr\000" |
| 63444 | /* 213371 */ "MMX_PADDBrr\000" |
| 63445 | /* 213383 */ "VPSHUFBrr\000" |
| 63446 | /* 213393 */ "MMX_PSHUFBrr\000" |
| 63447 | /* 213406 */ "VPAVGBrr\000" |
| 63448 | /* 213415 */ "MMX_PAVGBrr\000" |
| 63449 | /* 213427 */ "VPMOVMSKBrr\000" |
| 63450 | /* 213439 */ "MMX_PMOVMSKBrr\000" |
| 63451 | /* 213454 */ "VPSHLBrr\000" |
| 63452 | /* 213463 */ "VGF2P8MULBrr\000" |
| 63453 | /* 213476 */ "VPSIGNBrr\000" |
| 63454 | /* 213486 */ "MMX_PSIGNBrr\000" |
| 63455 | /* 213499 */ "VPCMPEQBrr\000" |
| 63456 | /* 213510 */ "MMX_PCMPEQBrr\000" |
| 63457 | /* 213524 */ "VPABSBrr\000" |
| 63458 | /* 213533 */ "MMX_PABSBrr\000" |
| 63459 | /* 213545 */ "VPSUBSBrr\000" |
| 63460 | /* 213555 */ "MMX_PSUBSBrr\000" |
| 63461 | /* 213568 */ "VPADDSBrr\000" |
| 63462 | /* 213578 */ "MMX_PADDSBrr\000" |
| 63463 | /* 213591 */ "VPMINSBrr\000" |
| 63464 | /* 213601 */ "VPSUBUSBrr\000" |
| 63465 | /* 213612 */ "MMX_PSUBUSBrr\000" |
| 63466 | /* 213626 */ "VPADDUSBrr\000" |
| 63467 | /* 213637 */ "MMX_PADDUSBrr\000" |
| 63468 | /* 213651 */ "PAVGUSBrr\000" |
| 63469 | /* 213661 */ "VPMAXSBrr\000" |
| 63470 | /* 213671 */ "VPCMPGTBrr\000" |
| 63471 | /* 213682 */ "MMX_PCMPGTBrr\000" |
| 63472 | /* 213696 */ "VPROTBrr\000" |
| 63473 | /* 213705 */ "VPBROADCASTBrr\000" |
| 63474 | /* 213720 */ "VPMINUBrr\000" |
| 63475 | /* 213730 */ "MMX_PMINUBrr\000" |
| 63476 | /* 213743 */ "PFSUBrr\000" |
| 63477 | /* 213751 */ "VPMAXUBrr\000" |
| 63478 | /* 213761 */ "MMX_PMAXUBrr\000" |
| 63479 | /* 213774 */ "VPACKSSWBrr\000" |
| 63480 | /* 213786 */ "MMX_PACKSSWBrr\000" |
| 63481 | /* 213801 */ "VPACKUSWBrr\000" |
| 63482 | /* 213813 */ "MMX_PACKUSWBrr\000" |
| 63483 | /* 213828 */ "PFACCrr\000" |
| 63484 | /* 213836 */ "PFNACCrr\000" |
| 63485 | /* 213845 */ "PFPNACCrr\000" |
| 63486 | /* 213855 */ "VAESDECrr\000" |
| 63487 | /* 213865 */ "VAESIMCrr\000" |
| 63488 | /* 213875 */ "VAESENCrr\000" |
| 63489 | /* 213885 */ "VPSHADrr\000" |
| 63490 | /* 213894 */ "VPSRADrr\000" |
| 63491 | /* 213903 */ "MMX_PSRADrr\000" |
| 63492 | /* 213915 */ "VPHADDBDrr\000" |
| 63493 | /* 213926 */ "VPHADDUBDrr\000" |
| 63494 | /* 213938 */ "VPHSUBDrr\000" |
| 63495 | /* 213948 */ "MMX_PHSUBDrr\000" |
| 63496 | /* 213961 */ "VPSUBDrr\000" |
| 63497 | /* 213970 */ "MMX_PSUBDrr\000" |
| 63498 | /* 213982 */ "VPMOVSXBDrr\000" |
| 63499 | /* 213994 */ "VPMOVZXBDrr\000" |
| 63500 | /* 214006 */ "PFADDrr\000" |
| 63501 | /* 214014 */ "VPHADDDrr\000" |
| 63502 | /* 214024 */ "MMX_PHADDDrr\000" |
| 63503 | /* 214037 */ "VPADDDrr\000" |
| 63504 | /* 214046 */ "MMX_PADDDrr\000" |
| 63505 | /* 214058 */ "VPMACSDDrr\000" |
| 63506 | /* 214069 */ "VPMACSSDDrr\000" |
| 63507 | /* 214081 */ "PI2FDrr\000" |
| 63508 | /* 214089 */ "PF2IDrr\000" |
| 63509 | /* 214097 */ "VPSHLDrr\000" |
| 63510 | /* 214106 */ "VPSLLDrr\000" |
| 63511 | /* 214115 */ "MMX_PSLLDrr\000" |
| 63512 | /* 214127 */ "VPMULLDrr\000" |
| 63513 | /* 214137 */ "VPSRLDrr\000" |
| 63514 | /* 214146 */ "MMX_PSRLDrr\000" |
| 63515 | /* 214158 */ "VPANDrr\000" |
| 63516 | /* 214166 */ "MMX_PANDrr\000" |
| 63517 | /* 214177 */ "VPSIGNDrr\000" |
| 63518 | /* 214187 */ "MMX_PSIGNDrr\000" |
| 63519 | /* 214200 */ "MMX_CVTPI2PDrr\000" |
| 63520 | /* 214215 */ "VPERMIL2PDrr\000" |
| 63521 | /* 214228 */ "VCVTDQ2PDrr\000" |
| 63522 | /* 214240 */ "VCVTPS2PDrr\000" |
| 63523 | /* 214252 */ "VMOVAPDrr\000" |
| 63524 | /* 214262 */ "PSWAPDrr\000" |
| 63525 | /* 214271 */ "VADDSUBPDrr\000" |
| 63526 | /* 214283 */ "VHSUBPDrr\000" |
| 63527 | /* 214293 */ "VSUBPDrr\000" |
| 63528 | /* 214302 */ "VMINCPDrr\000" |
| 63529 | /* 214312 */ "VMAXCPDrr\000" |
| 63530 | /* 214322 */ "VHADDPDrr\000" |
| 63531 | /* 214332 */ "VADDPDrr\000" |
| 63532 | /* 214341 */ "VANDPDrr\000" |
| 63533 | /* 214350 */ "VUNPCKHPDrr\000" |
| 63534 | /* 214362 */ "VMOVMSKPDrr\000" |
| 63535 | /* 214374 */ "VPERMILPDrr\000" |
| 63536 | /* 214386 */ "VUNPCKLPDrr\000" |
| 63537 | /* 214398 */ "VMULPDrr\000" |
| 63538 | /* 214407 */ "VANDNPDrr\000" |
| 63539 | /* 214417 */ "VMINPDrr\000" |
| 63540 | /* 214426 */ "VORPDrr\000" |
| 63541 | /* 214434 */ "VXORPDrr\000" |
| 63542 | /* 214443 */ "VTESTPDrr\000" |
| 63543 | /* 214453 */ "VMOVUPDrr\000" |
| 63544 | /* 214463 */ "VDIVPDrr\000" |
| 63545 | /* 214472 */ "VMAXPDrr\000" |
| 63546 | /* 214481 */ "VFRCZPDrr\000" |
| 63547 | /* 214491 */ "VPCMPEQDrr\000" |
| 63548 | /* 214502 */ "MMX_PCMPEQDrr\000" |
| 63549 | /* 214516 */ "VCVTSI642SDrr\000" |
| 63550 | /* 214530 */ "VCVTSI2SDrr\000" |
| 63551 | /* 214542 */ "VCVTSS2SDrr\000" |
| 63552 | /* 214554 */ "VPABSDrr\000" |
| 63553 | /* 214563 */ "MMX_PABSDrr\000" |
| 63554 | /* 214575 */ "VSUBSDrr\000" |
| 63555 | /* 214584 */ "VMINCSDrr\000" |
| 63556 | /* 214594 */ "VMAXCSDrr\000" |
| 63557 | /* 214604 */ "VADDSDrr\000" |
| 63558 | /* 214613 */ "VUCOMISDrr\000" |
| 63559 | /* 214624 */ "VCOMISDrr\000" |
| 63560 | /* 214634 */ "VMULSDrr\000" |
| 63561 | /* 214643 */ "VPMINSDrr\000" |
| 63562 | /* 214653 */ "VMINSDrr\000" |
| 63563 | /* 214662 */ "VPDPBSSDrr\000" |
| 63564 | /* 214673 */ "VPDPWSSDrr\000" |
| 63565 | /* 214684 */ "VPDPBUSDrr\000" |
| 63566 | /* 214695 */ "VPDPWUSDrr\000" |
| 63567 | /* 214706 */ "VDIVSDrr\000" |
| 63568 | /* 214715 */ "VMOVSDrr\000" |
| 63569 | /* 214724 */ "VPMAXSDrr\000" |
| 63570 | /* 214734 */ "VMAXSDrr\000" |
| 63571 | /* 214743 */ "VFRCZSDrr\000" |
| 63572 | /* 214753 */ "VMOV64toSDrr\000" |
| 63573 | /* 214766 */ "VPCMPGTDrr\000" |
| 63574 | /* 214777 */ "MMX_PCMPGTDrr\000" |
| 63575 | /* 214791 */ "VPROTDrr\000" |
| 63576 | /* 214800 */ "VPBROADCASTDrr\000" |
| 63577 | /* 214815 */ "VPMINUDrr\000" |
| 63578 | /* 214825 */ "VPDPBSUDrr\000" |
| 63579 | /* 214836 */ "VPDPWSUDrr\000" |
| 63580 | /* 214847 */ "VPDPBUUDrr\000" |
| 63581 | /* 214858 */ "VPDPWUUDrr\000" |
| 63582 | /* 214869 */ "VPMAXUDrr\000" |
| 63583 | /* 214879 */ "VPSRAVDrr\000" |
| 63584 | /* 214889 */ "VPSLLVDrr\000" |
| 63585 | /* 214899 */ "VPSRLVDrr\000" |
| 63586 | /* 214909 */ "VPHSUBWDrr\000" |
| 63587 | /* 214920 */ "VPHADDWDrr\000" |
| 63588 | /* 214931 */ "VPMADDWDrr\000" |
| 63589 | /* 214942 */ "MMX_PMADDWDrr\000" |
| 63590 | /* 214956 */ "VPUNPCKHWDrr\000" |
| 63591 | /* 214969 */ "MMX_PUNPCKHWDrr\000" |
| 63592 | /* 214985 */ "VPUNPCKLWDrr\000" |
| 63593 | /* 214998 */ "MMX_PUNPCKLWDrr\000" |
| 63594 | /* 215014 */ "VPMACSWDrr\000" |
| 63595 | /* 215025 */ "VPMADCSWDrr\000" |
| 63596 | /* 215037 */ "VPMACSSWDrr\000" |
| 63597 | /* 215049 */ "VPMADCSSWDrr\000" |
| 63598 | /* 215062 */ "VPHADDUWDrr\000" |
| 63599 | /* 215074 */ "VPMOVSXWDrr\000" |
| 63600 | /* 215086 */ "VPMOVZXWDrr\000" |
| 63601 | /* 215098 */ "PFCMPGErr\000" |
| 63602 | /* 215108 */ "SHA1NEXTErr\000" |
| 63603 | /* 215120 */ "LD_Frr\000" |
| 63604 | /* 215127 */ "ST_Frr\000" |
| 63605 | /* 215134 */ "MULX32Hrr\000" |
| 63606 | /* 215144 */ "MULX64Hrr\000" |
| 63607 | /* 215154 */ "VCVTPS2PHrr\000" |
| 63608 | /* 215166 */ "VPMACSDQHrr\000" |
| 63609 | /* 215178 */ "VPMACSSDQHrr\000" |
| 63610 | /* 215191 */ "VMOVW2SHrr\000" |
| 63611 | /* 215202 */ "VMOVW64toSHrr\000" |
| 63612 | /* 215216 */ "VMOVPDI2DIrr\000" |
| 63613 | /* 215229 */ "VMOVSS2DIrr\000" |
| 63614 | /* 215241 */ "VMOVDI2PDIrr\000" |
| 63615 | /* 215254 */ "MMX_CVTTPD2PIrr\000" |
| 63616 | /* 215270 */ "MMX_CVTPD2PIrr\000" |
| 63617 | /* 215285 */ "MMX_CVTTPS2PIrr\000" |
| 63618 | /* 215301 */ "MMX_CVTPS2PIrr\000" |
| 63619 | /* 215316 */ "VMOVPQI2QIrr\000" |
| 63620 | /* 215329 */ "VMOVZPQILo2PQIrr\000" |
| 63621 | /* 215346 */ "VMOV64toPQIrr\000" |
| 63622 | /* 215360 */ "VCVTTSD2SIrr\000" |
| 63623 | /* 215373 */ "VCVTSD2SIrr\000" |
| 63624 | /* 215385 */ "VCVTTSS2SIrr\000" |
| 63625 | /* 215398 */ "VCVTSS2SIrr\000" |
| 63626 | /* 215410 */ "VPMACSDQLrr\000" |
| 63627 | /* 215422 */ "VPMACSSDQLrr\000" |
| 63628 | /* 215435 */ "PFMULrr\000" |
| 63629 | /* 215443 */ "VPANDNrr\000" |
| 63630 | /* 215452 */ "MMX_PANDNrr\000" |
| 63631 | /* 215464 */ "PFMINrr\000" |
| 63632 | /* 215472 */ "PFRCPrr\000" |
| 63633 | /* 215480 */ "ST_FPrr\000" |
| 63634 | /* 215488 */ "VMOVDDUPrr\000" |
| 63635 | /* 215499 */ "VMOVSHDUPrr\000" |
| 63636 | /* 215511 */ "VMOVSLDUPrr\000" |
| 63637 | /* 215523 */ "MMX_MOVFR642Qrr\000" |
| 63638 | /* 215539 */ "MMX_MOVDQ2Qrr\000" |
| 63639 | /* 215553 */ "VPSHAQrr\000" |
| 63640 | /* 215562 */ "VPHADDBQrr\000" |
| 63641 | /* 215573 */ "VPHADDUBQrr\000" |
| 63642 | /* 215585 */ "VPSUBQrr\000" |
| 63643 | /* 215594 */ "MMX_PSUBQrr\000" |
| 63644 | /* 215606 */ "VPMOVSXBQrr\000" |
| 63645 | /* 215618 */ "VPMOVZXBQrr\000" |
| 63646 | /* 215630 */ "VCVTTPD2DQrr\000" |
| 63647 | /* 215643 */ "VCVTPD2DQrr\000" |
| 63648 | /* 215655 */ "MMX_MOVQ2DQrr\000" |
| 63649 | /* 215669 */ "VCVTTPS2DQrr\000" |
| 63650 | /* 215682 */ "VCVTPS2DQrr\000" |
| 63651 | /* 215694 */ "VPHSUBDQrr\000" |
| 63652 | /* 215705 */ "VPADDQrr\000" |
| 63653 | /* 215714 */ "MMX_PADDQrr\000" |
| 63654 | /* 215726 */ "VPHADDDQrr\000" |
| 63655 | /* 215737 */ "VPUNPCKHDQrr\000" |
| 63656 | /* 215750 */ "MMX_PUNPCKHDQrr\000" |
| 63657 | /* 215766 */ "VPUNPCKLDQrr\000" |
| 63658 | /* 215779 */ "MMX_PUNPCKLDQrr\000" |
| 63659 | /* 215795 */ "VPMULDQrr\000" |
| 63660 | /* 215805 */ "VPUNPCKHQDQrr\000" |
| 63661 | /* 215819 */ "VPUNPCKLQDQrr\000" |
| 63662 | /* 215833 */ "VPHADDUDQrr\000" |
| 63663 | /* 215845 */ "VPMULUDQrr\000" |
| 63664 | /* 215856 */ "MMX_PMULUDQrr\000" |
| 63665 | /* 215870 */ "VPMOVSXDQrr\000" |
| 63666 | /* 215882 */ "VPMOVZXDQrr\000" |
| 63667 | /* 215894 */ "PFCMPEQrr\000" |
| 63668 | /* 215904 */ "VPSHLQrr\000" |
| 63669 | /* 215913 */ "VPSLLQrr\000" |
| 63670 | /* 215922 */ "MMX_PSLLQrr\000" |
| 63671 | /* 215934 */ "VPSRLQrr\000" |
| 63672 | /* 215943 */ "MMX_PSRLQrr\000" |
| 63673 | /* 215955 */ "VPCMPEQQrr\000" |
| 63674 | /* 215966 */ "VPCMPGTQrr\000" |
| 63675 | /* 215977 */ "VPROTQrr\000" |
| 63676 | /* 215986 */ "VPBROADCASTQrr\000" |
| 63677 | /* 216001 */ "VPMADD52HUQrr\000" |
| 63678 | /* 216015 */ "VPMADD52LUQrr\000" |
| 63679 | /* 216029 */ "VPSLLVQrr\000" |
| 63680 | /* 216039 */ "VPSRLVQrr\000" |
| 63681 | /* 216049 */ "VPHADDWQrr\000" |
| 63682 | /* 216060 */ "VPHADDUWQrr\000" |
| 63683 | /* 216072 */ "VPMOVSXWQrr\000" |
| 63684 | /* 216084 */ "VPMOVZXWQrr\000" |
| 63685 | /* 216096 */ "PFSUBRrr\000" |
| 63686 | /* 216105 */ "VPORrr\000" |
| 63687 | /* 216112 */ "MMX_PORrr\000" |
| 63688 | /* 216122 */ "VPXORrr\000" |
| 63689 | /* 216130 */ "MMX_PXORrr\000" |
| 63690 | /* 216141 */ "URDMSRrr\000" |
| 63691 | /* 216150 */ "UWRMSRrr\000" |
| 63692 | /* 216159 */ "VCVTTSD2SI64Srr\000" |
| 63693 | /* 216175 */ "VCVTTSS2SI64Srr\000" |
| 63694 | /* 216191 */ "VCVTTSD2USI64Srr\000" |
| 63695 | /* 216208 */ "VCVTTSS2USI64Srr\000" |
| 63696 | /* 216225 */ "VPDPBSSDSrr\000" |
| 63697 | /* 216237 */ "VPDPWSSDSrr\000" |
| 63698 | /* 216249 */ "VPDPBUSDSrr\000" |
| 63699 | /* 216261 */ "VPDPWUSDSrr\000" |
| 63700 | /* 216273 */ "VPDPBSUDSrr\000" |
| 63701 | /* 216285 */ "VPDPWSUDSrr\000" |
| 63702 | /* 216297 */ "VPDPBUUDSrr\000" |
| 63703 | /* 216309 */ "VPDPWUUDSrr\000" |
| 63704 | /* 216321 */ "VCVTTSD2SISrr\000" |
| 63705 | /* 216335 */ "VCVTTSS2SISrr\000" |
| 63706 | /* 216349 */ "VCVTTSD2USISrr\000" |
| 63707 | /* 216364 */ "VCVTTSS2USISrr\000" |
| 63708 | /* 216379 */ "VCVTPD2PSrr\000" |
| 63709 | /* 216391 */ "VCVTPH2PSrr\000" |
| 63710 | /* 216403 */ "MMX_CVTPI2PSrr\000" |
| 63711 | /* 216418 */ "VPERMIL2PSrr\000" |
| 63712 | /* 216431 */ "VCVTDQ2PSrr\000" |
| 63713 | /* 216443 */ "VMOVAPSrr\000" |
| 63714 | /* 216453 */ "VADDSUBPSrr\000" |
| 63715 | /* 216465 */ "VHSUBPSrr\000" |
| 63716 | /* 216475 */ "VSUBPSrr\000" |
| 63717 | /* 216484 */ "VMINCPSrr\000" |
| 63718 | /* 216494 */ "VMAXCPSrr\000" |
| 63719 | /* 216504 */ "VHADDPSrr\000" |
| 63720 | /* 216514 */ "VADDPSrr\000" |
| 63721 | /* 216523 */ "VANDPSrr\000" |
| 63722 | /* 216532 */ "VUNPCKHPSrr\000" |
| 63723 | /* 216544 */ "VMOVLHPSrr\000" |
| 63724 | /* 216555 */ "VMOVMSKPSrr\000" |
| 63725 | /* 216567 */ "VMOVHLPSrr\000" |
| 63726 | /* 216578 */ "VPERMILPSrr\000" |
| 63727 | /* 216590 */ "VUNPCKLPSrr\000" |
| 63728 | /* 216602 */ "VMULPSrr\000" |
| 63729 | /* 216611 */ "VANDNPSrr\000" |
| 63730 | /* 216621 */ "VMINPSrr\000" |
| 63731 | /* 216630 */ "VORPSrr\000" |
| 63732 | /* 216638 */ "VXORPSrr\000" |
| 63733 | /* 216647 */ "VTESTPSrr\000" |
| 63734 | /* 216657 */ "VMOVUPSrr\000" |
| 63735 | /* 216667 */ "VDIVPSrr\000" |
| 63736 | /* 216676 */ "VMAXPSrr\000" |
| 63737 | /* 216685 */ "VFRCZPSrr\000" |
| 63738 | /* 216695 */ "VCVTSI642SSrr\000" |
| 63739 | /* 216709 */ "VCVTSD2SSrr\000" |
| 63740 | /* 216721 */ "VMOVDI2SSrr\000" |
| 63741 | /* 216733 */ "VCVTSI2SSrr\000" |
| 63742 | /* 216745 */ "VSUBSSrr\000" |
| 63743 | /* 216754 */ "VMINCSSrr\000" |
| 63744 | /* 216764 */ "VMAXCSSrr\000" |
| 63745 | /* 216774 */ "VADDSSrr\000" |
| 63746 | /* 216783 */ "VUCOMISSrr\000" |
| 63747 | /* 216794 */ "VCOMISSrr\000" |
| 63748 | /* 216804 */ "VMULSSrr\000" |
| 63749 | /* 216813 */ "VMINSSrr\000" |
| 63750 | /* 216822 */ "VBROADCASTSSrr\000" |
| 63751 | /* 216837 */ "VDIVSSrr\000" |
| 63752 | /* 216846 */ "VMOVSSrr\000" |
| 63753 | /* 216855 */ "VMAXSSrr\000" |
| 63754 | /* 216864 */ "VFRCZSSrr\000" |
| 63755 | /* 216874 */ "PFCMPGTrr\000" |
| 63756 | /* 216884 */ "MWAITrr\000" |
| 63757 | /* 216892 */ "PFRSQRTrr\000" |
| 63758 | /* 216902 */ "VAESDECLASTrr\000" |
| 63759 | /* 216916 */ "VAESENCLASTrr\000" |
| 63760 | /* 216930 */ "VPTESTrr\000" |
| 63761 | /* 216939 */ "VMOVDQUrr\000" |
| 63762 | /* 216949 */ "VMOVSH2Wrr\000" |
| 63763 | /* 216960 */ "VPSHAWrr\000" |
| 63764 | /* 216969 */ "VPSRAWrr\000" |
| 63765 | /* 216978 */ "MMX_PSRAWrr\000" |
| 63766 | /* 216990 */ "VPHSUBBWrr\000" |
| 63767 | /* 217001 */ "VPSADBWrr\000" |
| 63768 | /* 217011 */ "MMX_PSADBWrr\000" |
| 63769 | /* 217024 */ "VPHADDBWrr\000" |
| 63770 | /* 217035 */ "VPUNPCKHBWrr\000" |
| 63771 | /* 217048 */ "MMX_PUNPCKHBWrr\000" |
| 63772 | /* 217064 */ "VPUNPCKLBWrr\000" |
| 63773 | /* 217077 */ "MMX_PUNPCKLBWrr\000" |
| 63774 | /* 217093 */ "VPHADDUBWrr\000" |
| 63775 | /* 217105 */ "VPHSUBWrr\000" |
| 63776 | /* 217115 */ "MMX_PHSUBWrr\000" |
| 63777 | /* 217128 */ "VPSUBWrr\000" |
| 63778 | /* 217137 */ "MMX_PSUBWrr\000" |
| 63779 | /* 217149 */ "VPMOVSXBWrr\000" |
| 63780 | /* 217161 */ "VPMOVZXBWrr\000" |
| 63781 | /* 217173 */ "VPHADDWrr\000" |
| 63782 | /* 217183 */ "MMX_PHADDWrr\000" |
| 63783 | /* 217196 */ "VPADDWrr\000" |
| 63784 | /* 217205 */ "MMX_PADDWrr\000" |
| 63785 | /* 217217 */ "VPACKSSDWrr\000" |
| 63786 | /* 217229 */ "MMX_PACKSSDWrr\000" |
| 63787 | /* 217244 */ "VPACKUSDWrr\000" |
| 63788 | /* 217256 */ "PI2FWrr\000" |
| 63789 | /* 217264 */ "VPAVGWrr\000" |
| 63790 | /* 217273 */ "MMX_PAVGWrr\000" |
| 63791 | /* 217285 */ "VPMULHWrr\000" |
| 63792 | /* 217295 */ "MMX_PMULHWrr\000" |
| 63793 | /* 217308 */ "PF2IWrr\000" |
| 63794 | /* 217316 */ "VPSHLWrr\000" |
| 63795 | /* 217325 */ "VPSLLWrr\000" |
| 63796 | /* 217334 */ "MMX_PSLLWrr\000" |
| 63797 | /* 217346 */ "VPMULLWrr\000" |
| 63798 | /* 217356 */ "MMX_PMULLWrr\000" |
| 63799 | /* 217369 */ "VPSRLWrr\000" |
| 63800 | /* 217378 */ "MMX_PSRLWrr\000" |
| 63801 | /* 217390 */ "VPSIGNWrr\000" |
| 63802 | /* 217400 */ "MMX_PSIGNWrr\000" |
| 63803 | /* 217413 */ "VPCMPEQWrr\000" |
| 63804 | /* 217424 */ "MMX_PCMPEQWrr\000" |
| 63805 | /* 217438 */ "PMULHRWrr\000" |
| 63806 | /* 217448 */ "VPABSWrr\000" |
| 63807 | /* 217457 */ "MMX_PABSWrr\000" |
| 63808 | /* 217469 */ "VPMADDUBSWrr\000" |
| 63809 | /* 217482 */ "MMX_PMADDUBSWrr\000" |
| 63810 | /* 217498 */ "VPHSUBSWrr\000" |
| 63811 | /* 217509 */ "MMX_PHSUBSWrr\000" |
| 63812 | /* 217523 */ "VPSUBSWrr\000" |
| 63813 | /* 217533 */ "MMX_PSUBSWrr\000" |
| 63814 | /* 217546 */ "VPHADDSWrr\000" |
| 63815 | /* 217557 */ "MMX_PHADDSWrr\000" |
| 63816 | /* 217571 */ "VPADDSWrr\000" |
| 63817 | /* 217581 */ "MMX_PADDSWrr\000" |
| 63818 | /* 217594 */ "VPMINSWrr\000" |
| 63819 | /* 217604 */ "MMX_PMINSWrr\000" |
| 63820 | /* 217617 */ "VPMULHRSWrr\000" |
| 63821 | /* 217629 */ "MMX_PMULHRSWrr\000" |
| 63822 | /* 217644 */ "VPSUBUSWrr\000" |
| 63823 | /* 217655 */ "MMX_PSUBUSWrr\000" |
| 63824 | /* 217669 */ "VPADDUSWrr\000" |
| 63825 | /* 217680 */ "MMX_PADDUSWrr\000" |
| 63826 | /* 217694 */ "VPMAXSWrr\000" |
| 63827 | /* 217704 */ "MMX_PMAXSWrr\000" |
| 63828 | /* 217717 */ "VPCMPGTWrr\000" |
| 63829 | /* 217728 */ "MMX_PCMPGTWrr\000" |
| 63830 | /* 217742 */ "VPROTWrr\000" |
| 63831 | /* 217751 */ "VPBROADCASTWrr\000" |
| 63832 | /* 217766 */ "VPMULHUWrr\000" |
| 63833 | /* 217777 */ "MMX_PMULHUWrr\000" |
| 63834 | /* 217791 */ "VPMINUWrr\000" |
| 63835 | /* 217801 */ "VPHMINPOSUWrr\000" |
| 63836 | /* 217815 */ "VPMAXUWrr\000" |
| 63837 | /* 217825 */ "VPMACSWWrr\000" |
| 63838 | /* 217836 */ "VPMACSSWWrr\000" |
| 63839 | /* 217848 */ "PFMAXrr\000" |
| 63840 | /* 217856 */ "VFMADDSUBPD4Yrr\000" |
| 63841 | /* 217872 */ "VFMSUBPD4Yrr\000" |
| 63842 | /* 217885 */ "VFNMSUBPD4Yrr\000" |
| 63843 | /* 217899 */ "VFMSUBADDPD4Yrr\000" |
| 63844 | /* 217915 */ "VFMADDPD4Yrr\000" |
| 63845 | /* 217928 */ "VFNMADDPD4Yrr\000" |
| 63846 | /* 217942 */ "VSM4RNDS4Yrr\000" |
| 63847 | /* 217955 */ "VFMADDSUBPS4Yrr\000" |
| 63848 | /* 217971 */ "VFMSUBPS4Yrr\000" |
| 63849 | /* 217984 */ "VFNMSUBPS4Yrr\000" |
| 63850 | /* 217998 */ "VFMSUBADDPS4Yrr\000" |
| 63851 | /* 218014 */ "VFMADDPS4Yrr\000" |
| 63852 | /* 218027 */ "VFNMADDPS4Yrr\000" |
| 63853 | /* 218041 */ "VSM4KEY4Yrr\000" |
| 63854 | /* 218053 */ "VCVTNEPS2BF16Yrr\000" |
| 63855 | /* 218070 */ "VMOVDQAYrr\000" |
| 63856 | /* 218081 */ "VPSUBBYrr\000" |
| 63857 | /* 218091 */ "VPADDBYrr\000" |
| 63858 | /* 218101 */ "VPSHUFBYrr\000" |
| 63859 | /* 218112 */ "VPAVGBYrr\000" |
| 63860 | /* 218122 */ "VPMOVMSKBYrr\000" |
| 63861 | /* 218135 */ "VGF2P8MULBYrr\000" |
| 63862 | /* 218149 */ "VPSIGNBYrr\000" |
| 63863 | /* 218160 */ "VPCMPEQBYrr\000" |
| 63864 | /* 218172 */ "VPABSBYrr\000" |
| 63865 | /* 218182 */ "VPSUBSBYrr\000" |
| 63866 | /* 218193 */ "VPADDSBYrr\000" |
| 63867 | /* 218204 */ "VPMINSBYrr\000" |
| 63868 | /* 218215 */ "VPSUBUSBYrr\000" |
| 63869 | /* 218227 */ "VPADDUSBYrr\000" |
| 63870 | /* 218239 */ "VPMAXSBYrr\000" |
| 63871 | /* 218250 */ "VPCMPGTBYrr\000" |
| 63872 | /* 218262 */ "VPBROADCASTBYrr\000" |
| 63873 | /* 218278 */ "VPMINUBYrr\000" |
| 63874 | /* 218289 */ "VPMAXUBYrr\000" |
| 63875 | /* 218300 */ "VPACKSSWBYrr\000" |
| 63876 | /* 218313 */ "VPACKUSWBYrr\000" |
| 63877 | /* 218326 */ "VAESDECYrr\000" |
| 63878 | /* 218337 */ "VAESENCYrr\000" |
| 63879 | /* 218348 */ "VPSRADYrr\000" |
| 63880 | /* 218358 */ "VPHSUBDYrr\000" |
| 63881 | /* 218369 */ "VPSUBDYrr\000" |
| 63882 | /* 218379 */ "VPMOVSXBDYrr\000" |
| 63883 | /* 218392 */ "VPMOVZXBDYrr\000" |
| 63884 | /* 218405 */ "VPHADDDYrr\000" |
| 63885 | /* 218416 */ "VPADDDYrr\000" |
| 63886 | /* 218426 */ "VPSLLDYrr\000" |
| 63887 | /* 218436 */ "VPMULLDYrr\000" |
| 63888 | /* 218447 */ "VPSRLDYrr\000" |
| 63889 | /* 218457 */ "VPERMDYrr\000" |
| 63890 | /* 218467 */ "VPANDYrr\000" |
| 63891 | /* 218476 */ "VPSIGNDYrr\000" |
| 63892 | /* 218487 */ "VPERMIL2PDYrr\000" |
| 63893 | /* 218501 */ "VCVTDQ2PDYrr\000" |
| 63894 | /* 218514 */ "VCVTPS2PDYrr\000" |
| 63895 | /* 218527 */ "VMOVAPDYrr\000" |
| 63896 | /* 218538 */ "VADDSUBPDYrr\000" |
| 63897 | /* 218551 */ "VHSUBPDYrr\000" |
| 63898 | /* 218562 */ "VSUBPDYrr\000" |
| 63899 | /* 218572 */ "VMINCPDYrr\000" |
| 63900 | /* 218583 */ "VMAXCPDYrr\000" |
| 63901 | /* 218594 */ "VHADDPDYrr\000" |
| 63902 | /* 218605 */ "VADDPDYrr\000" |
| 63903 | /* 218615 */ "VANDPDYrr\000" |
| 63904 | /* 218625 */ "VUNPCKHPDYrr\000" |
| 63905 | /* 218638 */ "VMOVMSKPDYrr\000" |
| 63906 | /* 218651 */ "VPERMILPDYrr\000" |
| 63907 | /* 218664 */ "VUNPCKLPDYrr\000" |
| 63908 | /* 218677 */ "VMULPDYrr\000" |
| 63909 | /* 218687 */ "VANDNPDYrr\000" |
| 63910 | /* 218698 */ "VMINPDYrr\000" |
| 63911 | /* 218708 */ "VORPDYrr\000" |
| 63912 | /* 218717 */ "VXORPDYrr\000" |
| 63913 | /* 218727 */ "VTESTPDYrr\000" |
| 63914 | /* 218738 */ "VMOVUPDYrr\000" |
| 63915 | /* 218749 */ "VDIVPDYrr\000" |
| 63916 | /* 218759 */ "VMAXPDYrr\000" |
| 63917 | /* 218769 */ "VFRCZPDYrr\000" |
| 63918 | /* 218780 */ "VPCMPEQDYrr\000" |
| 63919 | /* 218792 */ "VPABSDYrr\000" |
| 63920 | /* 218802 */ "VPMINSDYrr\000" |
| 63921 | /* 218813 */ "VPDPBSSDYrr\000" |
| 63922 | /* 218825 */ "VPDPWSSDYrr\000" |
| 63923 | /* 218837 */ "VBROADCASTSDYrr\000" |
| 63924 | /* 218853 */ "VPDPBUSDYrr\000" |
| 63925 | /* 218865 */ "VPDPWUSDYrr\000" |
| 63926 | /* 218877 */ "VPMAXSDYrr\000" |
| 63927 | /* 218888 */ "VPCMPGTDYrr\000" |
| 63928 | /* 218900 */ "VPBROADCASTDYrr\000" |
| 63929 | /* 218916 */ "VPMINUDYrr\000" |
| 63930 | /* 218927 */ "VPDPBSUDYrr\000" |
| 63931 | /* 218939 */ "VPDPWSUDYrr\000" |
| 63932 | /* 218951 */ "VPDPBUUDYrr\000" |
| 63933 | /* 218963 */ "VPDPWUUDYrr\000" |
| 63934 | /* 218975 */ "VPMAXUDYrr\000" |
| 63935 | /* 218986 */ "VPSRAVDYrr\000" |
| 63936 | /* 218997 */ "VPSLLVDYrr\000" |
| 63937 | /* 219008 */ "VPSRLVDYrr\000" |
| 63938 | /* 219019 */ "VPMADDWDYrr\000" |
| 63939 | /* 219031 */ "VPUNPCKHWDYrr\000" |
| 63940 | /* 219045 */ "VPUNPCKLWDYrr\000" |
| 63941 | /* 219059 */ "VPMOVSXWDYrr\000" |
| 63942 | /* 219072 */ "VPMOVZXWDYrr\000" |
| 63943 | /* 219085 */ "VCVTPS2PHYrr\000" |
| 63944 | /* 219098 */ "VPANDNYrr\000" |
| 63945 | /* 219108 */ "VMOVDDUPYrr\000" |
| 63946 | /* 219120 */ "VMOVSHDUPYrr\000" |
| 63947 | /* 219133 */ "VMOVSLDUPYrr\000" |
| 63948 | /* 219146 */ "VPSUBQYrr\000" |
| 63949 | /* 219156 */ "VPMOVSXBQYrr\000" |
| 63950 | /* 219169 */ "VPMOVZXBQYrr\000" |
| 63951 | /* 219182 */ "VCVTTPD2DQYrr\000" |
| 63952 | /* 219196 */ "VCVTPD2DQYrr\000" |
| 63953 | /* 219209 */ "VCVTTPS2DQYrr\000" |
| 63954 | /* 219223 */ "VCVTPS2DQYrr\000" |
| 63955 | /* 219236 */ "VPADDQYrr\000" |
| 63956 | /* 219246 */ "VPUNPCKHDQYrr\000" |
| 63957 | /* 219260 */ "VPUNPCKLDQYrr\000" |
| 63958 | /* 219274 */ "VPMULDQYrr\000" |
| 63959 | /* 219285 */ "VPUNPCKHQDQYrr\000" |
| 63960 | /* 219300 */ "VPUNPCKLQDQYrr\000" |
| 63961 | /* 219315 */ "VPMULUDQYrr\000" |
| 63962 | /* 219327 */ "VPMOVSXDQYrr\000" |
| 63963 | /* 219340 */ "VPMOVZXDQYrr\000" |
| 63964 | /* 219353 */ "VPSLLQYrr\000" |
| 63965 | /* 219363 */ "VPSRLQYrr\000" |
| 63966 | /* 219373 */ "VPCMPEQQYrr\000" |
| 63967 | /* 219385 */ "VPCMPGTQYrr\000" |
| 63968 | /* 219397 */ "VPBROADCASTQYrr\000" |
| 63969 | /* 219413 */ "VPMADD52HUQYrr\000" |
| 63970 | /* 219428 */ "VPMADD52LUQYrr\000" |
| 63971 | /* 219443 */ "VPSLLVQYrr\000" |
| 63972 | /* 219454 */ "VPSRLVQYrr\000" |
| 63973 | /* 219465 */ "VPMOVSXWQYrr\000" |
| 63974 | /* 219478 */ "VPMOVZXWQYrr\000" |
| 63975 | /* 219491 */ "VPORYrr\000" |
| 63976 | /* 219499 */ "VPXORYrr\000" |
| 63977 | /* 219508 */ "VPDPBSSDSYrr\000" |
| 63978 | /* 219521 */ "VPDPWSSDSYrr\000" |
| 63979 | /* 219534 */ "VPDPBUSDSYrr\000" |
| 63980 | /* 219547 */ "VPDPWUSDSYrr\000" |
| 63981 | /* 219560 */ "VPDPBSUDSYrr\000" |
| 63982 | /* 219573 */ "VPDPWSUDSYrr\000" |
| 63983 | /* 219586 */ "VPDPBUUDSYrr\000" |
| 63984 | /* 219599 */ "VPDPWUUDSYrr\000" |
| 63985 | /* 219612 */ "VCVTPD2PSYrr\000" |
| 63986 | /* 219625 */ "VCVTPH2PSYrr\000" |
| 63987 | /* 219638 */ "VPERMIL2PSYrr\000" |
| 63988 | /* 219652 */ "VCVTDQ2PSYrr\000" |
| 63989 | /* 219665 */ "VMOVAPSYrr\000" |
| 63990 | /* 219676 */ "VADDSUBPSYrr\000" |
| 63991 | /* 219689 */ "VHSUBPSYrr\000" |
| 63992 | /* 219700 */ "VSUBPSYrr\000" |
| 63993 | /* 219710 */ "VMINCPSYrr\000" |
| 63994 | /* 219721 */ "VMAXCPSYrr\000" |
| 63995 | /* 219732 */ "VHADDPSYrr\000" |
| 63996 | /* 219743 */ "VADDPSYrr\000" |
| 63997 | /* 219753 */ "VANDPSYrr\000" |
| 63998 | /* 219763 */ "VUNPCKHPSYrr\000" |
| 63999 | /* 219776 */ "VMOVMSKPSYrr\000" |
| 64000 | /* 219789 */ "VPERMILPSYrr\000" |
| 64001 | /* 219802 */ "VUNPCKLPSYrr\000" |
| 64002 | /* 219815 */ "VMULPSYrr\000" |
| 64003 | /* 219825 */ "VPERMPSYrr\000" |
| 64004 | /* 219836 */ "VANDNPSYrr\000" |
| 64005 | /* 219847 */ "VMINPSYrr\000" |
| 64006 | /* 219857 */ "VORPSYrr\000" |
| 64007 | /* 219866 */ "VXORPSYrr\000" |
| 64008 | /* 219876 */ "VTESTPSYrr\000" |
| 64009 | /* 219887 */ "VMOVUPSYrr\000" |
| 64010 | /* 219898 */ "VDIVPSYrr\000" |
| 64011 | /* 219908 */ "VMAXPSYrr\000" |
| 64012 | /* 219918 */ "VFRCZPSYrr\000" |
| 64013 | /* 219929 */ "VBROADCASTSSYrr\000" |
| 64014 | /* 219945 */ "VAESDECLASTYrr\000" |
| 64015 | /* 219960 */ "VAESENCLASTYrr\000" |
| 64016 | /* 219975 */ "VPTESTYrr\000" |
| 64017 | /* 219985 */ "VMOVDQUYrr\000" |
| 64018 | /* 219996 */ "VPSRAWYrr\000" |
| 64019 | /* 220006 */ "VPSADBWYrr\000" |
| 64020 | /* 220017 */ "VPUNPCKHBWYrr\000" |
| 64021 | /* 220031 */ "VPUNPCKLBWYrr\000" |
| 64022 | /* 220045 */ "VPHSUBWYrr\000" |
| 64023 | /* 220056 */ "VPSUBWYrr\000" |
| 64024 | /* 220066 */ "VPMOVSXBWYrr\000" |
| 64025 | /* 220079 */ "VPMOVZXBWYrr\000" |
| 64026 | /* 220092 */ "VPHADDWYrr\000" |
| 64027 | /* 220103 */ "VPADDWYrr\000" |
| 64028 | /* 220113 */ "VPACKSSDWYrr\000" |
| 64029 | /* 220126 */ "VPACKUSDWYrr\000" |
| 64030 | /* 220139 */ "VPAVGWYrr\000" |
| 64031 | /* 220149 */ "VPMULHWYrr\000" |
| 64032 | /* 220160 */ "VPSLLWYrr\000" |
| 64033 | /* 220170 */ "VPMULLWYrr\000" |
| 64034 | /* 220181 */ "VPSRLWYrr\000" |
| 64035 | /* 220191 */ "VPSIGNWYrr\000" |
| 64036 | /* 220202 */ "VPCMPEQWYrr\000" |
| 64037 | /* 220214 */ "VPABSWYrr\000" |
| 64038 | /* 220224 */ "VPMADDUBSWYrr\000" |
| 64039 | /* 220238 */ "VPHSUBSWYrr\000" |
| 64040 | /* 220250 */ "VPSUBSWYrr\000" |
| 64041 | /* 220261 */ "VPHADDSWYrr\000" |
| 64042 | /* 220273 */ "VPADDSWYrr\000" |
| 64043 | /* 220284 */ "VPMINSWYrr\000" |
| 64044 | /* 220295 */ "VPMULHRSWYrr\000" |
| 64045 | /* 220308 */ "VPSUBUSWYrr\000" |
| 64046 | /* 220320 */ "VPADDUSWYrr\000" |
| 64047 | /* 220332 */ "VPMAXSWYrr\000" |
| 64048 | /* 220343 */ "VPCMPGTWYrr\000" |
| 64049 | /* 220355 */ "VPBROADCASTWYrr\000" |
| 64050 | /* 220371 */ "VPMULHUWYrr\000" |
| 64051 | /* 220383 */ "VPMINUWYrr\000" |
| 64052 | /* 220394 */ "VPMAXUWYrr\000" |
| 64053 | /* 220405 */ "VMOVDQA32Zrr\000" |
| 64054 | /* 220418 */ "VMOVDQU32Zrr\000" |
| 64055 | /* 220431 */ "VBROADCASTF32X2Zrr\000" |
| 64056 | /* 220450 */ "VBROADCASTI32X2Zrr\000" |
| 64057 | /* 220469 */ "VMOVDQA64Zrr\000" |
| 64058 | /* 220482 */ "VCVTTSD2SI64Zrr\000" |
| 64059 | /* 220498 */ "VCVTSD2SI64Zrr\000" |
| 64060 | /* 220513 */ "VCVTTSH2SI64Zrr\000" |
| 64061 | /* 220529 */ "VCVTTSS2SI64Zrr\000" |
| 64062 | /* 220545 */ "VCVTSS2SI64Zrr\000" |
| 64063 | /* 220560 */ "VCVTTSD2USI64Zrr\000" |
| 64064 | /* 220577 */ "VCVTTSH2USI64Zrr\000" |
| 64065 | /* 220594 */ "VCVTTSS2USI64Zrr\000" |
| 64066 | /* 220611 */ "VMOVDQU64Zrr\000" |
| 64067 | /* 220624 */ "VMOVSDto64Zrr\000" |
| 64068 | /* 220638 */ "VMOVPQIto64Zrr\000" |
| 64069 | /* 220653 */ "VSM4RNDS4Zrr\000" |
| 64070 | /* 220666 */ "VSM4KEY4Zrr\000" |
| 64071 | /* 220678 */ "VCVTNE2PS2BF16Zrr\000" |
| 64072 | /* 220696 */ "VCVTNEPS2BF16Zrr\000" |
| 64073 | /* 220713 */ "VSUBBF16Zrr\000" |
| 64074 | /* 220725 */ "VADDBF16Zrr\000" |
| 64075 | /* 220737 */ "VSCALEFBF16Zrr\000" |
| 64076 | /* 220752 */ "VMULBF16Zrr\000" |
| 64077 | /* 220764 */ "VMINBF16Zrr\000" |
| 64078 | /* 220776 */ "VCOMISBF16Zrr\000" |
| 64079 | /* 220790 */ "VDIVBF16Zrr\000" |
| 64080 | /* 220802 */ "VMAXBF16Zrr\000" |
| 64081 | /* 220814 */ "VMOVDQU16Zrr\000" |
| 64082 | /* 220827 */ "VCVT2PH2BF8Zrr\000" |
| 64083 | /* 220842 */ "VCVTBIASPH2BF8Zrr\000" |
| 64084 | /* 220860 */ "VCVTPH2BF8Zrr\000" |
| 64085 | /* 220874 */ "VCVT2PH2HF8Zrr\000" |
| 64086 | /* 220889 */ "VCVTBIASPH2HF8Zrr\000" |
| 64087 | /* 220907 */ "VCVTPH2HF8Zrr\000" |
| 64088 | /* 220921 */ "VMOVDQU8Zrr\000" |
| 64089 | /* 220933 */ "VPERMI2BZrr\000" |
| 64090 | /* 220945 */ "VPERMT2BZrr\000" |
| 64091 | /* 220957 */ "VPSUBBZrr\000" |
| 64092 | /* 220967 */ "VPADDBZrr\000" |
| 64093 | /* 220977 */ "VPEXPANDBZrr\000" |
| 64094 | /* 220990 */ "VPMOVUSDBZrr\000" |
| 64095 | /* 221003 */ "VPMOVSDBZrr\000" |
| 64096 | /* 221015 */ "VPMOVDBZrr\000" |
| 64097 | /* 221026 */ "VPSHUFBZrr\000" |
| 64098 | /* 221037 */ "VPAVGBZrr\000" |
| 64099 | /* 221047 */ "VGF2P8MULBZrr\000" |
| 64100 | /* 221061 */ "VPBLENDMBZrr\000" |
| 64101 | /* 221074 */ "VPTESTNMBZrr\000" |
| 64102 | /* 221087 */ "VPSHUFBITQMBZrr\000" |
| 64103 | /* 221103 */ "VPERMBZrr\000" |
| 64104 | /* 221113 */ "VPTESTMBZrr\000" |
| 64105 | /* 221125 */ "VPCMPEQBZrr\000" |
| 64106 | /* 221137 */ "VPMOVUSQBZrr\000" |
| 64107 | /* 221150 */ "VPMOVSQBZrr\000" |
| 64108 | /* 221162 */ "VPMULTISHIFTQBZrr\000" |
| 64109 | /* 221180 */ "VPMOVQBZrr\000" |
| 64110 | /* 221191 */ "VPABSBZrr\000" |
| 64111 | /* 221201 */ "VPSUBSBZrr\000" |
| 64112 | /* 221212 */ "VPADDSBZrr\000" |
| 64113 | /* 221223 */ "VPMINSBZrr\000" |
| 64114 | /* 221234 */ "VPCOMPRESSBZrr\000" |
| 64115 | /* 221249 */ "VPSUBUSBZrr\000" |
| 64116 | /* 221261 */ "VPADDUSBZrr\000" |
| 64117 | /* 221273 */ "VPMAXSBZrr\000" |
| 64118 | /* 221284 */ "VPCMPGTBZrr\000" |
| 64119 | /* 221296 */ "VPOPCNTBZrr\000" |
| 64120 | /* 221308 */ "VPBROADCASTBZrr\000" |
| 64121 | /* 221324 */ "VPMINUBZrr\000" |
| 64122 | /* 221335 */ "VPMAXUBZrr\000" |
| 64123 | /* 221346 */ "VPACKSSWBZrr\000" |
| 64124 | /* 221359 */ "VPACKUSWBZrr\000" |
| 64125 | /* 221372 */ "VPMOVUSWBZrr\000" |
| 64126 | /* 221385 */ "VPMOVSWBZrr\000" |
| 64127 | /* 221397 */ "VPMOVWBZrr\000" |
| 64128 | /* 221408 */ "VAESDECZrr\000" |
| 64129 | /* 221419 */ "VAESENCZrr\000" |
| 64130 | /* 221430 */ "VPERMI2DZrr\000" |
| 64131 | /* 221442 */ "VPERMT2DZrr\000" |
| 64132 | /* 221454 */ "VPBROADCASTMW2DZrr\000" |
| 64133 | /* 221473 */ "VPSRADZrr\000" |
| 64134 | /* 221483 */ "VPSUBDZrr\000" |
| 64135 | /* 221493 */ "VPMOVSXBDZrr\000" |
| 64136 | /* 221506 */ "VPMOVZXBDZrr\000" |
| 64137 | /* 221519 */ "VPADDDZrr\000" |
| 64138 | /* 221529 */ "VPANDDZrr\000" |
| 64139 | /* 221539 */ "VPEXPANDDZrr\000" |
| 64140 | /* 221552 */ "VPSLLDZrr\000" |
| 64141 | /* 221562 */ "VPMULLDZrr\000" |
| 64142 | /* 221573 */ "VPSRLDZrr\000" |
| 64143 | /* 221583 */ "VPBLENDMDZrr\000" |
| 64144 | /* 221596 */ "VPTESTNMDZrr\000" |
| 64145 | /* 221609 */ "VPERMDZrr\000" |
| 64146 | /* 221619 */ "VPTESTMDZrr\000" |
| 64147 | /* 221631 */ "VPANDNDZrr\000" |
| 64148 | /* 221642 */ "VCVTPH2PDZrr\000" |
| 64149 | /* 221655 */ "VPERMI2PDZrr\000" |
| 64150 | /* 221668 */ "VCVTDQ2PDZrr\000" |
| 64151 | /* 221681 */ "VCVTUDQ2PDZrr\000" |
| 64152 | /* 221695 */ "VCVTQQ2PDZrr\000" |
| 64153 | /* 221708 */ "VCVTUQQ2PDZrr\000" |
| 64154 | /* 221722 */ "VCVTPS2PDZrr\000" |
| 64155 | /* 221735 */ "VPERMT2PDZrr\000" |
| 64156 | /* 221748 */ "VMOVAPDZrr\000" |
| 64157 | /* 221759 */ "VSUBPDZrr\000" |
| 64158 | /* 221769 */ "VMINCPDZrr\000" |
| 64159 | /* 221780 */ "VMAXCPDZrr\000" |
| 64160 | /* 221791 */ "VADDPDZrr\000" |
| 64161 | /* 221801 */ "VEXPANDPDZrr\000" |
| 64162 | /* 221814 */ "VANDPDZrr\000" |
| 64163 | /* 221824 */ "VSCALEFPDZrr\000" |
| 64164 | /* 221837 */ "VUNPCKHPDZrr\000" |
| 64165 | /* 221850 */ "VPERMILPDZrr\000" |
| 64166 | /* 221863 */ "VUNPCKLPDZrr\000" |
| 64167 | /* 221876 */ "VMULPDZrr\000" |
| 64168 | /* 221886 */ "VBLENDMPDZrr\000" |
| 64169 | /* 221899 */ "VPERMPDZrr\000" |
| 64170 | /* 221910 */ "VANDNPDZrr\000" |
| 64171 | /* 221921 */ "VMINPDZrr\000" |
| 64172 | /* 221931 */ "VORPDZrr\000" |
| 64173 | /* 221940 */ "VXORPDZrr\000" |
| 64174 | /* 221950 */ "VCOMPRESSPDZrr\000" |
| 64175 | /* 221965 */ "VMOVUPDZrr\000" |
| 64176 | /* 221976 */ "VDIVPDZrr\000" |
| 64177 | /* 221986 */ "VMAXPDZrr\000" |
| 64178 | /* 221996 */ "VPCMPEQDZrr\000" |
| 64179 | /* 222008 */ "VPMOVUSQDZrr\000" |
| 64180 | /* 222021 */ "VPMOVSQDZrr\000" |
| 64181 | /* 222033 */ "VPMOVQDZrr\000" |
| 64182 | /* 222044 */ "VPORDZrr\000" |
| 64183 | /* 222053 */ "VPXORDZrr\000" |
| 64184 | /* 222063 */ "VCVTSI642SDZrr\000" |
| 64185 | /* 222078 */ "VCVTUSI642SDZrr\000" |
| 64186 | /* 222094 */ "VCVTSH2SDZrr\000" |
| 64187 | /* 222107 */ "VCVTSI2SDZrr\000" |
| 64188 | /* 222120 */ "VCVTUSI2SDZrr\000" |
| 64189 | /* 222134 */ "VCVTSS2SDZrr\000" |
| 64190 | /* 222147 */ "VRCP14SDZrr\000" |
| 64191 | /* 222159 */ "VRSQRT14SDZrr\000" |
| 64192 | /* 222173 */ "VPABSDZrr\000" |
| 64193 | /* 222183 */ "VSUBSDZrr\000" |
| 64194 | /* 222193 */ "VMINCSDZrr\000" |
| 64195 | /* 222204 */ "VMAXCSDZrr\000" |
| 64196 | /* 222215 */ "VADDSDZrr\000" |
| 64197 | /* 222225 */ "VSCALEFSDZrr\000" |
| 64198 | /* 222238 */ "VUCOMISDZrr\000" |
| 64199 | /* 222250 */ "VCOMISDZrr\000" |
| 64200 | /* 222261 */ "VMULSDZrr\000" |
| 64201 | /* 222271 */ "VPMINSDZrr\000" |
| 64202 | /* 222282 */ "VMINSDZrr\000" |
| 64203 | /* 222292 */ "VPCOMPRESSDZrr\000" |
| 64204 | /* 222307 */ "VBROADCASTSDZrr\000" |
| 64205 | /* 222323 */ "VDIVSDZrr\000" |
| 64206 | /* 222333 */ "VMOVSDZrr\000" |
| 64207 | /* 222343 */ "VPMAXSDZrr\000" |
| 64208 | /* 222354 */ "VMAXSDZrr\000" |
| 64209 | /* 222364 */ "VUCOMXSDZrr\000" |
| 64210 | /* 222376 */ "VMOV64toSDZrr\000" |
| 64211 | /* 222390 */ "VP2INTERSECTDZrr\000" |
| 64212 | /* 222407 */ "VPCONFLICTDZrr\000" |
| 64213 | /* 222422 */ "VPCMPGTDZrr\000" |
| 64214 | /* 222434 */ "VPOPCNTDZrr\000" |
| 64215 | /* 222446 */ "VPLZCNTDZrr\000" |
| 64216 | /* 222458 */ "VPBROADCASTDZrr\000" |
| 64217 | /* 222474 */ "VPMINUDZrr\000" |
| 64218 | /* 222485 */ "VPMAXUDZrr\000" |
| 64219 | /* 222496 */ "VPSRAVDZrr\000" |
| 64220 | /* 222507 */ "VPSLLVDZrr\000" |
| 64221 | /* 222518 */ "VPROLVDZrr\000" |
| 64222 | /* 222529 */ "VPSRLVDZrr\000" |
| 64223 | /* 222540 */ "VPRORVDZrr\000" |
| 64224 | /* 222551 */ "VPMADDWDZrr\000" |
| 64225 | /* 222563 */ "VPUNPCKHWDZrr\000" |
| 64226 | /* 222577 */ "VPUNPCKLWDZrr\000" |
| 64227 | /* 222591 */ "VPMOVSXWDZrr\000" |
| 64228 | /* 222604 */ "VPMOVZXWDZrr\000" |
| 64229 | /* 222617 */ "VCVTHF82PHZrr\000" |
| 64230 | /* 222631 */ "VCVTPD2PHZrr\000" |
| 64231 | /* 222644 */ "VCVTDQ2PHZrr\000" |
| 64232 | /* 222657 */ "VCVTUDQ2PHZrr\000" |
| 64233 | /* 222671 */ "VCVTQQ2PHZrr\000" |
| 64234 | /* 222684 */ "VCVTUQQ2PHZrr\000" |
| 64235 | /* 222698 */ "VCVTPS2PHZrr\000" |
| 64236 | /* 222711 */ "VCVTW2PHZrr\000" |
| 64237 | /* 222723 */ "VCVTUW2PHZrr\000" |
| 64238 | /* 222736 */ "VSUBPHZrr\000" |
| 64239 | /* 222746 */ "VFCMULCPHZrr\000" |
| 64240 | /* 222759 */ "VFMULCPHZrr\000" |
| 64241 | /* 222771 */ "VMINCPHZrr\000" |
| 64242 | /* 222782 */ "VMAXCPHZrr\000" |
| 64243 | /* 222793 */ "VADDPHZrr\000" |
| 64244 | /* 222803 */ "VSCALEFPHZrr\000" |
| 64245 | /* 222816 */ "VMULPHZrr\000" |
| 64246 | /* 222826 */ "VMINPHZrr\000" |
| 64247 | /* 222836 */ "VDIVPHZrr\000" |
| 64248 | /* 222846 */ "VMAXPHZrr\000" |
| 64249 | /* 222856 */ "VCVTSI642SHZrr\000" |
| 64250 | /* 222871 */ "VCVTUSI642SHZrr\000" |
| 64251 | /* 222887 */ "VCVTSD2SHZrr\000" |
| 64252 | /* 222900 */ "VCVTSI2SHZrr\000" |
| 64253 | /* 222913 */ "VCVTUSI2SHZrr\000" |
| 64254 | /* 222927 */ "VCVTSS2SHZrr\000" |
| 64255 | /* 222940 */ "VSUBSHZrr\000" |
| 64256 | /* 222950 */ "VFCMULCSHZrr\000" |
| 64257 | /* 222963 */ "VFMULCSHZrr\000" |
| 64258 | /* 222975 */ "VMINCSHZrr\000" |
| 64259 | /* 222986 */ "VMAXCSHZrr\000" |
| 64260 | /* 222997 */ "VADDSHZrr\000" |
| 64261 | /* 223007 */ "VSCALEFSHZrr\000" |
| 64262 | /* 223020 */ "VUCOMISHZrr\000" |
| 64263 | /* 223032 */ "VCOMISHZrr\000" |
| 64264 | /* 223043 */ "VMULSHZrr\000" |
| 64265 | /* 223053 */ "VMINSHZrr\000" |
| 64266 | /* 223063 */ "VRCPSHZrr\000" |
| 64267 | /* 223073 */ "VRSQRTSHZrr\000" |
| 64268 | /* 223085 */ "VDIVSHZrr\000" |
| 64269 | /* 223095 */ "VMOVSHZrr\000" |
| 64270 | /* 223105 */ "VMAXSHZrr\000" |
| 64271 | /* 223115 */ "VUCOMXSHZrr\000" |
| 64272 | /* 223127 */ "VMOVPDI2DIZrr\000" |
| 64273 | /* 223141 */ "VMOVSS2DIZrr\000" |
| 64274 | /* 223154 */ "VMOVDI2PDIZrr\000" |
| 64275 | /* 223168 */ "VMOVZPDILo2PDIZrr\000" |
| 64276 | /* 223186 */ "VMOVPQI2QIZrr\000" |
| 64277 | /* 223200 */ "VMOVZPQILo2PQIZrr\000" |
| 64278 | /* 223218 */ "VMOV64toPQIZrr\000" |
| 64279 | /* 223233 */ "VCVTTSD2SIZrr\000" |
| 64280 | /* 223247 */ "VCVTSD2SIZrr\000" |
| 64281 | /* 223260 */ "VCVTTSH2SIZrr\000" |
| 64282 | /* 223274 */ "VCVTTSS2SIZrr\000" |
| 64283 | /* 223288 */ "VCVTSS2SIZrr\000" |
| 64284 | /* 223301 */ "VCVTTSD2USIZrr\000" |
| 64285 | /* 223316 */ "VCVTTSH2USIZrr\000" |
| 64286 | /* 223331 */ "VCVTTSS2USIZrr\000" |
| 64287 | /* 223346 */ "VMOVZPWILo2PWIZrr\000" |
| 64288 | /* 223364 */ "VMOVDDUPZrr\000" |
| 64289 | /* 223376 */ "VMOVSHDUPZrr\000" |
| 64290 | /* 223389 */ "VMOVSLDUPZrr\000" |
| 64291 | /* 223402 */ "VPBROADCASTMB2QZrr\000" |
| 64292 | /* 223421 */ "VPERMI2QZrr\000" |
| 64293 | /* 223433 */ "VPERMT2QZrr\000" |
| 64294 | /* 223445 */ "VPSRAQZrr\000" |
| 64295 | /* 223455 */ "VPSUBQZrr\000" |
| 64296 | /* 223465 */ "VPMOVSXBQZrr\000" |
| 64297 | /* 223478 */ "VPMOVZXBQZrr\000" |
| 64298 | /* 223491 */ "VCVTTPD2DQZrr\000" |
| 64299 | /* 223505 */ "VCVTPD2DQZrr\000" |
| 64300 | /* 223518 */ "VCVTTPH2DQZrr\000" |
| 64301 | /* 223532 */ "VCVTPH2DQZrr\000" |
| 64302 | /* 223545 */ "VCVTTPS2DQZrr\000" |
| 64303 | /* 223559 */ "VCVTPS2DQZrr\000" |
| 64304 | /* 223572 */ "VPADDQZrr\000" |
| 64305 | /* 223582 */ "VPUNPCKHDQZrr\000" |
| 64306 | /* 223596 */ "VPUNPCKLDQZrr\000" |
| 64307 | /* 223610 */ "VPMULDQZrr\000" |
| 64308 | /* 223621 */ "VPANDQZrr\000" |
| 64309 | /* 223631 */ "VPEXPANDQZrr\000" |
| 64310 | /* 223644 */ "VPUNPCKHQDQZrr\000" |
| 64311 | /* 223659 */ "VPUNPCKLQDQZrr\000" |
| 64312 | /* 223674 */ "VCVTTPD2UDQZrr\000" |
| 64313 | /* 223689 */ "VCVTPD2UDQZrr\000" |
| 64314 | /* 223703 */ "VCVTTPH2UDQZrr\000" |
| 64315 | /* 223718 */ "VCVTPH2UDQZrr\000" |
| 64316 | /* 223732 */ "VCVTTPS2UDQZrr\000" |
| 64317 | /* 223747 */ "VCVTPS2UDQZrr\000" |
| 64318 | /* 223761 */ "VPMULUDQZrr\000" |
| 64319 | /* 223773 */ "VPMOVSXDQZrr\000" |
| 64320 | /* 223786 */ "VPMOVZXDQZrr\000" |
| 64321 | /* 223799 */ "VPSLLQZrr\000" |
| 64322 | /* 223809 */ "VPMULLQZrr\000" |
| 64323 | /* 223820 */ "VPSRLQZrr\000" |
| 64324 | /* 223830 */ "VPBLENDMQZrr\000" |
| 64325 | /* 223843 */ "VPTESTNMQZrr\000" |
| 64326 | /* 223856 */ "VPERMQZrr\000" |
| 64327 | /* 223866 */ "VPTESTMQZrr\000" |
| 64328 | /* 223878 */ "VPANDNQZrr\000" |
| 64329 | /* 223889 */ "VCVTTPD2QQZrr\000" |
| 64330 | /* 223903 */ "VCVTPD2QQZrr\000" |
| 64331 | /* 223916 */ "VCVTTPH2QQZrr\000" |
| 64332 | /* 223930 */ "VCVTPH2QQZrr\000" |
| 64333 | /* 223943 */ "VCVTTPS2QQZrr\000" |
| 64334 | /* 223957 */ "VCVTPS2QQZrr\000" |
| 64335 | /* 223970 */ "VPCMPEQQZrr\000" |
| 64336 | /* 223982 */ "VCVTTPD2UQQZrr\000" |
| 64337 | /* 223997 */ "VCVTPD2UQQZrr\000" |
| 64338 | /* 224011 */ "VCVTTPH2UQQZrr\000" |
| 64339 | /* 224026 */ "VCVTPH2UQQZrr\000" |
| 64340 | /* 224040 */ "VCVTTPS2UQQZrr\000" |
| 64341 | /* 224055 */ "VCVTPS2UQQZrr\000" |
| 64342 | /* 224069 */ "VPORQZrr\000" |
| 64343 | /* 224078 */ "VPXORQZrr\000" |
| 64344 | /* 224088 */ "VPABSQZrr\000" |
| 64345 | /* 224098 */ "VPMINSQZrr\000" |
| 64346 | /* 224109 */ "VPCOMPRESSQZrr\000" |
| 64347 | /* 224124 */ "VPMAXSQZrr\000" |
| 64348 | /* 224135 */ "VP2INTERSECTQZrr\000" |
| 64349 | /* 224152 */ "VPCONFLICTQZrr\000" |
| 64350 | /* 224167 */ "VPCMPGTQZrr\000" |
| 64351 | /* 224179 */ "VPOPCNTQZrr\000" |
| 64352 | /* 224191 */ "VPLZCNTQZrr\000" |
| 64353 | /* 224203 */ "VPBROADCASTQZrr\000" |
| 64354 | /* 224219 */ "VPMINUQZrr\000" |
| 64355 | /* 224230 */ "VPMAXUQZrr\000" |
| 64356 | /* 224241 */ "VPSRAVQZrr\000" |
| 64357 | /* 224252 */ "VPSLLVQZrr\000" |
| 64358 | /* 224263 */ "VPROLVQZrr\000" |
| 64359 | /* 224274 */ "VPSRLVQZrr\000" |
| 64360 | /* 224285 */ "VPRORVQZrr\000" |
| 64361 | /* 224296 */ "VPMOVSXWQZrr\000" |
| 64362 | /* 224309 */ "VPMOVZXWQZrr\000" |
| 64363 | /* 224322 */ "VCVT2PH2BF8SZrr\000" |
| 64364 | /* 224338 */ "VCVTBIASPH2BF8SZrr\000" |
| 64365 | /* 224357 */ "VCVTPH2BF8SZrr\000" |
| 64366 | /* 224372 */ "VCVT2PH2HF8SZrr\000" |
| 64367 | /* 224388 */ "VCVTBIASPH2HF8SZrr\000" |
| 64368 | /* 224407 */ "VCVTPH2HF8SZrr\000" |
| 64369 | /* 224422 */ "VCVTTBF162IBSZrr\000" |
| 64370 | /* 224439 */ "VCVTBF162IBSZrr\000" |
| 64371 | /* 224455 */ "VCVTTPH2IBSZrr\000" |
| 64372 | /* 224470 */ "VCVTPH2IBSZrr\000" |
| 64373 | /* 224484 */ "VCVTTPS2IBSZrr\000" |
| 64374 | /* 224499 */ "VCVTPS2IBSZrr\000" |
| 64375 | /* 224513 */ "VCVTTBF162IUBSZrr\000" |
| 64376 | /* 224531 */ "VCVTBF162IUBSZrr\000" |
| 64377 | /* 224548 */ "VCVTTPH2IUBSZrr\000" |
| 64378 | /* 224564 */ "VCVTPH2IUBSZrr\000" |
| 64379 | /* 224579 */ "VCVTTPS2IUBSZrr\000" |
| 64380 | /* 224595 */ "VCVTPS2IUBSZrr\000" |
| 64381 | /* 224610 */ "VCVTPD2PSZrr\000" |
| 64382 | /* 224623 */ "VCVTPH2PSZrr\000" |
| 64383 | /* 224636 */ "VPERMI2PSZrr\000" |
| 64384 | /* 224649 */ "VCVTDQ2PSZrr\000" |
| 64385 | /* 224662 */ "VCVTUDQ2PSZrr\000" |
| 64386 | /* 224676 */ "VCVTQQ2PSZrr\000" |
| 64387 | /* 224689 */ "VCVTUQQ2PSZrr\000" |
| 64388 | /* 224703 */ "VPERMT2PSZrr\000" |
| 64389 | /* 224716 */ "VMOVAPSZrr\000" |
| 64390 | /* 224727 */ "VSUBPSZrr\000" |
| 64391 | /* 224737 */ "VMINCPSZrr\000" |
| 64392 | /* 224748 */ "VMAXCPSZrr\000" |
| 64393 | /* 224759 */ "VADDPSZrr\000" |
| 64394 | /* 224769 */ "VEXPANDPSZrr\000" |
| 64395 | /* 224782 */ "VANDPSZrr\000" |
| 64396 | /* 224792 */ "VSCALEFPSZrr\000" |
| 64397 | /* 224805 */ "VUNPCKHPSZrr\000" |
| 64398 | /* 224818 */ "VMOVLHPSZrr\000" |
| 64399 | /* 224830 */ "VMOVHLPSZrr\000" |
| 64400 | /* 224842 */ "VPERMILPSZrr\000" |
| 64401 | /* 224855 */ "VUNPCKLPSZrr\000" |
| 64402 | /* 224868 */ "VMULPSZrr\000" |
| 64403 | /* 224878 */ "VBLENDMPSZrr\000" |
| 64404 | /* 224891 */ "VPERMPSZrr\000" |
| 64405 | /* 224902 */ "VANDNPSZrr\000" |
| 64406 | /* 224913 */ "VMINPSZrr\000" |
| 64407 | /* 224923 */ "VORPSZrr\000" |
| 64408 | /* 224932 */ "VXORPSZrr\000" |
| 64409 | /* 224942 */ "VCOMPRESSPSZrr\000" |
| 64410 | /* 224957 */ "VMOVUPSZrr\000" |
| 64411 | /* 224968 */ "VDIVPSZrr\000" |
| 64412 | /* 224978 */ "VMAXPSZrr\000" |
| 64413 | /* 224988 */ "VCVTTPD2DQSZrr\000" |
| 64414 | /* 225003 */ "VCVTTPS2DQSZrr\000" |
| 64415 | /* 225018 */ "VCVTTPD2UDQSZrr\000" |
| 64416 | /* 225034 */ "VCVTTPS2UDQSZrr\000" |
| 64417 | /* 225050 */ "VCVTTPD2QQSZrr\000" |
| 64418 | /* 225065 */ "VCVTTPS2QQSZrr\000" |
| 64419 | /* 225080 */ "VCVTTPD2UQQSZrr\000" |
| 64420 | /* 225096 */ "VCVTTPS2UQQSZrr\000" |
| 64421 | /* 225112 */ "VCVTSI642SSZrr\000" |
| 64422 | /* 225127 */ "VCVTUSI642SSZrr\000" |
| 64423 | /* 225143 */ "VCVTSD2SSZrr\000" |
| 64424 | /* 225156 */ "VCVTSH2SSZrr\000" |
| 64425 | /* 225169 */ "VMOVDI2SSZrr\000" |
| 64426 | /* 225182 */ "VCVTSI2SSZrr\000" |
| 64427 | /* 225195 */ "VCVTUSI2SSZrr\000" |
| 64428 | /* 225209 */ "VRCP14SSZrr\000" |
| 64429 | /* 225221 */ "VRSQRT14SSZrr\000" |
| 64430 | /* 225235 */ "VSUBSSZrr\000" |
| 64431 | /* 225245 */ "VMINCSSZrr\000" |
| 64432 | /* 225256 */ "VMAXCSSZrr\000" |
| 64433 | /* 225267 */ "VADDSSZrr\000" |
| 64434 | /* 225277 */ "VSCALEFSSZrr\000" |
| 64435 | /* 225290 */ "VUCOMISSZrr\000" |
| 64436 | /* 225302 */ "VCOMISSZrr\000" |
| 64437 | /* 225313 */ "VMULSSZrr\000" |
| 64438 | /* 225323 */ "VMINSSZrr\000" |
| 64439 | /* 225333 */ "VBROADCASTSSZrr\000" |
| 64440 | /* 225349 */ "VDIVSSZrr\000" |
| 64441 | /* 225359 */ "VMOVSSZrr\000" |
| 64442 | /* 225369 */ "VMAXSSZrr\000" |
| 64443 | /* 225379 */ "VUCOMXSSZrr\000" |
| 64444 | /* 225391 */ "VAESDECLASTZrr\000" |
| 64445 | /* 225406 */ "VAESENCLASTZrr\000" |
| 64446 | /* 225421 */ "VCVTTPH2WZrr\000" |
| 64447 | /* 225434 */ "VCVTPH2WZrr\000" |
| 64448 | /* 225446 */ "VPERMI2WZrr\000" |
| 64449 | /* 225458 */ "VPERMT2WZrr\000" |
| 64450 | /* 225470 */ "VPSRAWZrr\000" |
| 64451 | /* 225480 */ "VPSADBWZrr\000" |
| 64452 | /* 225491 */ "VPUNPCKHBWZrr\000" |
| 64453 | /* 225505 */ "VPUNPCKLBWZrr\000" |
| 64454 | /* 225519 */ "VPSUBWZrr\000" |
| 64455 | /* 225529 */ "VPMOVSXBWZrr\000" |
| 64456 | /* 225542 */ "VPMOVZXBWZrr\000" |
| 64457 | /* 225555 */ "VPADDWZrr\000" |
| 64458 | /* 225565 */ "VPEXPANDWZrr\000" |
| 64459 | /* 225578 */ "VPACKSSDWZrr\000" |
| 64460 | /* 225591 */ "VPACKUSDWZrr\000" |
| 64461 | /* 225604 */ "VPMOVUSDWZrr\000" |
| 64462 | /* 225617 */ "VPMOVSDWZrr\000" |
| 64463 | /* 225629 */ "VPMOVDWZrr\000" |
| 64464 | /* 225640 */ "VPAVGWZrr\000" |
| 64465 | /* 225650 */ "VPMULHWZrr\000" |
| 64466 | /* 225661 */ "VPSLLWZrr\000" |
| 64467 | /* 225671 */ "VPMULLWZrr\000" |
| 64468 | /* 225682 */ "VPSRLWZrr\000" |
| 64469 | /* 225692 */ "VPBLENDMWZrr\000" |
| 64470 | /* 225705 */ "VPTESTNMWZrr\000" |
| 64471 | /* 225718 */ "VPERMWZrr\000" |
| 64472 | /* 225728 */ "VPTESTMWZrr\000" |
| 64473 | /* 225740 */ "VPCMPEQWZrr\000" |
| 64474 | /* 225752 */ "VPMOVUSQWZrr\000" |
| 64475 | /* 225765 */ "VPMOVSQWZrr\000" |
| 64476 | /* 225777 */ "VPMOVQWZrr\000" |
| 64477 | /* 225788 */ "VPABSWZrr\000" |
| 64478 | /* 225798 */ "VPMADDUBSWZrr\000" |
| 64479 | /* 225812 */ "VPSUBSWZrr\000" |
| 64480 | /* 225823 */ "VPADDSWZrr\000" |
| 64481 | /* 225834 */ "VPMINSWZrr\000" |
| 64482 | /* 225845 */ "VPMULHRSWZrr\000" |
| 64483 | /* 225858 */ "VPCOMPRESSWZrr\000" |
| 64484 | /* 225873 */ "VPSUBUSWZrr\000" |
| 64485 | /* 225885 */ "VPADDUSWZrr\000" |
| 64486 | /* 225897 */ "VPMAXSWZrr\000" |
| 64487 | /* 225908 */ "VPCMPGTWZrr\000" |
| 64488 | /* 225920 */ "VPOPCNTWZrr\000" |
| 64489 | /* 225932 */ "VPBROADCASTWZrr\000" |
| 64490 | /* 225948 */ "VCVTTPH2UWZrr\000" |
| 64491 | /* 225962 */ "VCVTPH2UWZrr\000" |
| 64492 | /* 225975 */ "VPMULHUWZrr\000" |
| 64493 | /* 225987 */ "VPMINUWZrr\000" |
| 64494 | /* 225998 */ "VPMAXUWZrr\000" |
| 64495 | /* 226009 */ "VPSRAVWZrr\000" |
| 64496 | /* 226020 */ "VPSLLVWZrr\000" |
| 64497 | /* 226031 */ "VPSRLVWZrr\000" |
| 64498 | /* 226042 */ "VCVT2PS2PHXZrr\000" |
| 64499 | /* 226057 */ "VCVTPS2PHXZrr\000" |
| 64500 | /* 226071 */ "VCVTPH2PSXZrr\000" |
| 64501 | /* 226085 */ "VPBROADCASTBrZrr\000" |
| 64502 | /* 226102 */ "VPBROADCASTDrZrr\000" |
| 64503 | /* 226119 */ "VPBROADCASTQrZrr\000" |
| 64504 | /* 226136 */ "VPBROADCASTWrZrr\000" |
| 64505 | /* 226153 */ "MMX_MOVD64grr\000" |
| 64506 | /* 226167 */ "MONITOR32rrr\000" |
| 64507 | /* 226180 */ "MONITORX32rrr\000" |
| 64508 | /* 226194 */ "MONITOR64rrr\000" |
| 64509 | /* 226207 */ "MONITORX64rrr\000" |
| 64510 | /* 226221 */ "VPBLENDVBrrr\000" |
| 64511 | /* 226234 */ "VBLENDVPDrrr\000" |
| 64512 | /* 226247 */ "VPPERMrrr\000" |
| 64513 | /* 226257 */ "VBLENDVPSrrr\000" |
| 64514 | /* 226270 */ "VPCMOVrrr\000" |
| 64515 | /* 226280 */ "MWAITXrrr\000" |
| 64516 | /* 226290 */ "VPBLENDVBYrrr\000" |
| 64517 | /* 226304 */ "VBLENDVPDYrrr\000" |
| 64518 | /* 226318 */ "VBLENDVPSYrrr\000" |
| 64519 | /* 226332 */ "VPCMOVYrrr\000" |
| 64520 | /* 226343 */ "MOV32sr\000" |
| 64521 | /* 226351 */ "MOV64sr\000" |
| 64522 | /* 226359 */ "MOV16sr\000" |
| 64523 | /* 226367 */ "MOV16ms\000" |
| 64524 | /* 226375 */ "MOV32rs\000" |
| 64525 | /* 226383 */ "MOV64rs\000" |
| 64526 | /* 226391 */ "MOV16rs\000" |
| 64527 | /* 226399 */ "MOV32ri_alt\000" |
| 64528 | /* 226411 */ "MOV16ri_alt\000" |
| 64529 | /* 226423 */ "MOV8ri_alt\000" |
| 64530 | /* 226434 */ "VMOVSDrm_alt\000" |
| 64531 | /* 226447 */ "VMOVSSrm_alt\000" |
| 64532 | /* 226460 */ "VMOVSDZrm_alt\000" |
| 64533 | /* 226474 */ "VMOVSHZrm_alt\000" |
| 64534 | /* 226488 */ "VMOVSSZrm_alt\000" |
| 64535 | /* 226502 */ "DEC32r_alt\000" |
| 64536 | /* 226513 */ "INC32r_alt\000" |
| 64537 | /* 226524 */ "DEC16r_alt\000" |
| 64538 | /* 226535 */ "INC16r_alt\000" |
| 64539 | /* 226546 */ "VMINMAXSDrrib_Int\000" |
| 64540 | /* 226564 */ "VMINMAXSHrrib_Int\000" |
| 64541 | /* 226582 */ "VMINMAXSSrrib_Int\000" |
| 64542 | /* 226600 */ "VRNDSCALESDZrrib_Int\000" |
| 64543 | /* 226621 */ "VCMPSDZrrib_Int\000" |
| 64544 | /* 226637 */ "VRNDSCALESHZrrib_Int\000" |
| 64545 | /* 226658 */ "VCMPSHZrrib_Int\000" |
| 64546 | /* 226674 */ "VRNDSCALESSZrrib_Int\000" |
| 64547 | /* 226695 */ "VCMPSSZrrib_Int\000" |
| 64548 | /* 226711 */ "VFMSUB231SDZrb_Int\000" |
| 64549 | /* 226730 */ "VFNMSUB231SDZrb_Int\000" |
| 64550 | /* 226750 */ "VFMADD231SDZrb_Int\000" |
| 64551 | /* 226769 */ "VFNMADD231SDZrb_Int\000" |
| 64552 | /* 226789 */ "VFMSUB132SDZrb_Int\000" |
| 64553 | /* 226808 */ "VFNMSUB132SDZrb_Int\000" |
| 64554 | /* 226828 */ "VFMADD132SDZrb_Int\000" |
| 64555 | /* 226847 */ "VFNMADD132SDZrb_Int\000" |
| 64556 | /* 226867 */ "VFMSUB213SDZrb_Int\000" |
| 64557 | /* 226886 */ "VFNMSUB213SDZrb_Int\000" |
| 64558 | /* 226906 */ "VFMADD213SDZrb_Int\000" |
| 64559 | /* 226925 */ "VFNMADD213SDZrb_Int\000" |
| 64560 | /* 226945 */ "VSQRTSDZrb_Int\000" |
| 64561 | /* 226960 */ "VFMSUB231SHZrb_Int\000" |
| 64562 | /* 226979 */ "VFNMSUB231SHZrb_Int\000" |
| 64563 | /* 226999 */ "VFMADD231SHZrb_Int\000" |
| 64564 | /* 227018 */ "VFNMADD231SHZrb_Int\000" |
| 64565 | /* 227038 */ "VFMSUB132SHZrb_Int\000" |
| 64566 | /* 227057 */ "VFNMSUB132SHZrb_Int\000" |
| 64567 | /* 227077 */ "VFMADD132SHZrb_Int\000" |
| 64568 | /* 227096 */ "VFNMADD132SHZrb_Int\000" |
| 64569 | /* 227116 */ "VFMSUB213SHZrb_Int\000" |
| 64570 | /* 227135 */ "VFNMSUB213SHZrb_Int\000" |
| 64571 | /* 227155 */ "VFMADD213SHZrb_Int\000" |
| 64572 | /* 227174 */ "VFNMADD213SHZrb_Int\000" |
| 64573 | /* 227194 */ "VSQRTSHZrb_Int\000" |
| 64574 | /* 227209 */ "VFMSUB231SSZrb_Int\000" |
| 64575 | /* 227228 */ "VFNMSUB231SSZrb_Int\000" |
| 64576 | /* 227248 */ "VFMADD231SSZrb_Int\000" |
| 64577 | /* 227267 */ "VFNMADD231SSZrb_Int\000" |
| 64578 | /* 227287 */ "VFMSUB132SSZrb_Int\000" |
| 64579 | /* 227306 */ "VFNMSUB132SSZrb_Int\000" |
| 64580 | /* 227326 */ "VFMADD132SSZrb_Int\000" |
| 64581 | /* 227345 */ "VFNMADD132SSZrb_Int\000" |
| 64582 | /* 227365 */ "VFMSUB213SSZrb_Int\000" |
| 64583 | /* 227384 */ "VFNMSUB213SSZrb_Int\000" |
| 64584 | /* 227404 */ "VFMADD213SSZrb_Int\000" |
| 64585 | /* 227423 */ "VFNMADD213SSZrb_Int\000" |
| 64586 | /* 227443 */ "VSQRTSSZrb_Int\000" |
| 64587 | /* 227458 */ "VCVTTSD2SI64Srrb_Int\000" |
| 64588 | /* 227479 */ "VCVTTSS2SI64Srrb_Int\000" |
| 64589 | /* 227500 */ "VCVTTSD2USI64Srrb_Int\000" |
| 64590 | /* 227522 */ "VCVTTSS2USI64Srrb_Int\000" |
| 64591 | /* 227544 */ "VCVTTSD2SISrrb_Int\000" |
| 64592 | /* 227563 */ "VCVTTSS2SISrrb_Int\000" |
| 64593 | /* 227582 */ "VCVTTSD2USISrrb_Int\000" |
| 64594 | /* 227602 */ "VCVTTSS2USISrrb_Int\000" |
| 64595 | /* 227622 */ "VCVTTSD2SI64Zrrb_Int\000" |
| 64596 | /* 227643 */ "VCVTSD2SI64Zrrb_Int\000" |
| 64597 | /* 227663 */ "VCVTTSH2SI64Zrrb_Int\000" |
| 64598 | /* 227684 */ "VCVTSH2SI64Zrrb_Int\000" |
| 64599 | /* 227704 */ "VCVTTSS2SI64Zrrb_Int\000" |
| 64600 | /* 227725 */ "VCVTSS2SI64Zrrb_Int\000" |
| 64601 | /* 227745 */ "VCVTTSD2USI64Zrrb_Int\000" |
| 64602 | /* 227767 */ "VCVTSD2USI64Zrrb_Int\000" |
| 64603 | /* 227788 */ "VCVTTSH2USI64Zrrb_Int\000" |
| 64604 | /* 227810 */ "VCVTSH2USI64Zrrb_Int\000" |
| 64605 | /* 227831 */ "VCVTTSS2USI64Zrrb_Int\000" |
| 64606 | /* 227853 */ "VCVTSS2USI64Zrrb_Int\000" |
| 64607 | /* 227874 */ "VCVTSI642SDZrrb_Int\000" |
| 64608 | /* 227894 */ "VCVTUSI642SDZrrb_Int\000" |
| 64609 | /* 227915 */ "VCVTSH2SDZrrb_Int\000" |
| 64610 | /* 227933 */ "VCVTSS2SDZrrb_Int\000" |
| 64611 | /* 227951 */ "VSUBSDZrrb_Int\000" |
| 64612 | /* 227966 */ "VADDSDZrrb_Int\000" |
| 64613 | /* 227981 */ "VSCALEFSDZrrb_Int\000" |
| 64614 | /* 227999 */ "VMULSDZrrb_Int\000" |
| 64615 | /* 228014 */ "VMINSDZrrb_Int\000" |
| 64616 | /* 228029 */ "VDIVSDZrrb_Int\000" |
| 64617 | /* 228044 */ "VMAXSDZrrb_Int\000" |
| 64618 | /* 228059 */ "VUCOMXSDZrrb_Int\000" |
| 64619 | /* 228076 */ "VCOMXSDZrrb_Int\000" |
| 64620 | /* 228092 */ "VCVTSI642SHZrrb_Int\000" |
| 64621 | /* 228112 */ "VCVTUSI642SHZrrb_Int\000" |
| 64622 | /* 228133 */ "VCVTSD2SHZrrb_Int\000" |
| 64623 | /* 228151 */ "VCVTSI2SHZrrb_Int\000" |
| 64624 | /* 228169 */ "VCVTUSI2SHZrrb_Int\000" |
| 64625 | /* 228188 */ "VCVTSS2SHZrrb_Int\000" |
| 64626 | /* 228206 */ "VSUBSHZrrb_Int\000" |
| 64627 | /* 228221 */ "VADDSHZrrb_Int\000" |
| 64628 | /* 228236 */ "VSCALEFSHZrrb_Int\000" |
| 64629 | /* 228254 */ "VMULSHZrrb_Int\000" |
| 64630 | /* 228269 */ "VMINSHZrrb_Int\000" |
| 64631 | /* 228284 */ "VDIVSHZrrb_Int\000" |
| 64632 | /* 228299 */ "VMAXSHZrrb_Int\000" |
| 64633 | /* 228314 */ "VUCOMXSHZrrb_Int\000" |
| 64634 | /* 228331 */ "VCOMXSHZrrb_Int\000" |
| 64635 | /* 228347 */ "VCVTTSD2SIZrrb_Int\000" |
| 64636 | /* 228366 */ "VCVTSD2SIZrrb_Int\000" |
| 64637 | /* 228384 */ "VCVTTSH2SIZrrb_Int\000" |
| 64638 | /* 228403 */ "VCVTSH2SIZrrb_Int\000" |
| 64639 | /* 228421 */ "VCVTTSS2SIZrrb_Int\000" |
| 64640 | /* 228440 */ "VCVTSS2SIZrrb_Int\000" |
| 64641 | /* 228458 */ "VCVTTSD2USIZrrb_Int\000" |
| 64642 | /* 228478 */ "VCVTSD2USIZrrb_Int\000" |
| 64643 | /* 228497 */ "VCVTTSH2USIZrrb_Int\000" |
| 64644 | /* 228517 */ "VCVTSH2USIZrrb_Int\000" |
| 64645 | /* 228536 */ "VCVTTSS2USIZrrb_Int\000" |
| 64646 | /* 228556 */ "VCVTSS2USIZrrb_Int\000" |
| 64647 | /* 228575 */ "VCVTSI642SSZrrb_Int\000" |
| 64648 | /* 228595 */ "VCVTUSI642SSZrrb_Int\000" |
| 64649 | /* 228616 */ "VCVTSD2SSZrrb_Int\000" |
| 64650 | /* 228634 */ "VCVTSH2SSZrrb_Int\000" |
| 64651 | /* 228652 */ "VCVTSI2SSZrrb_Int\000" |
| 64652 | /* 228670 */ "VCVTUSI2SSZrrb_Int\000" |
| 64653 | /* 228689 */ "VSUBSSZrrb_Int\000" |
| 64654 | /* 228704 */ "VADDSSZrrb_Int\000" |
| 64655 | /* 228719 */ "VSCALEFSSZrrb_Int\000" |
| 64656 | /* 228737 */ "VMULSSZrrb_Int\000" |
| 64657 | /* 228752 */ "VMINSSZrrb_Int\000" |
| 64658 | /* 228767 */ "VDIVSSZrrb_Int\000" |
| 64659 | /* 228782 */ "VMAXSSZrrb_Int\000" |
| 64660 | /* 228797 */ "VUCOMXSSZrrb_Int\000" |
| 64661 | /* 228814 */ "VCOMXSSZrrb_Int\000" |
| 64662 | /* 228830 */ "VROUNDSDmi_Int\000" |
| 64663 | /* 228845 */ "VROUNDSSmi_Int\000" |
| 64664 | /* 228860 */ "VCMPSDrmi_Int\000" |
| 64665 | /* 228874 */ "VMINMAXSDrmi_Int\000" |
| 64666 | /* 228891 */ "VMINMAXSHrmi_Int\000" |
| 64667 | /* 228908 */ "VCMPSSrmi_Int\000" |
| 64668 | /* 228922 */ "VMINMAXSSrmi_Int\000" |
| 64669 | /* 228939 */ "VRNDSCALESDZrmi_Int\000" |
| 64670 | /* 228959 */ "VCMPSDZrmi_Int\000" |
| 64671 | /* 228974 */ "VRNDSCALESHZrmi_Int\000" |
| 64672 | /* 228994 */ "VCMPSHZrmi_Int\000" |
| 64673 | /* 229009 */ "VRNDSCALESSZrmi_Int\000" |
| 64674 | /* 229029 */ "VCMPSSZrmi_Int\000" |
| 64675 | /* 229044 */ "VROUNDSDri_Int\000" |
| 64676 | /* 229059 */ "VROUNDSSri_Int\000" |
| 64677 | /* 229074 */ "VCMPSDrri_Int\000" |
| 64678 | /* 229088 */ "VMINMAXSDrri_Int\000" |
| 64679 | /* 229105 */ "VMINMAXSHrri_Int\000" |
| 64680 | /* 229122 */ "VCMPSSrri_Int\000" |
| 64681 | /* 229136 */ "VMINMAXSSrri_Int\000" |
| 64682 | /* 229153 */ "VRNDSCALESDZrri_Int\000" |
| 64683 | /* 229173 */ "VCMPSDZrri_Int\000" |
| 64684 | /* 229188 */ "VRNDSCALESHZrri_Int\000" |
| 64685 | /* 229208 */ "VCMPSHZrri_Int\000" |
| 64686 | /* 229223 */ "VRNDSCALESSZrri_Int\000" |
| 64687 | /* 229243 */ "VCMPSSZrri_Int\000" |
| 64688 | /* 229258 */ "VMINMAXSDrribk_Int\000" |
| 64689 | /* 229277 */ "VMINMAXSHrribk_Int\000" |
| 64690 | /* 229296 */ "VMINMAXSSrribk_Int\000" |
| 64691 | /* 229315 */ "VRNDSCALESDZrribk_Int\000" |
| 64692 | /* 229337 */ "VCMPSDZrribk_Int\000" |
| 64693 | /* 229354 */ "VRNDSCALESHZrribk_Int\000" |
| 64694 | /* 229376 */ "VCMPSHZrribk_Int\000" |
| 64695 | /* 229393 */ "VRNDSCALESSZrribk_Int\000" |
| 64696 | /* 229415 */ "VCMPSSZrribk_Int\000" |
| 64697 | /* 229432 */ "VFMSUB231SDZrbk_Int\000" |
| 64698 | /* 229452 */ "VFNMSUB231SDZrbk_Int\000" |
| 64699 | /* 229473 */ "VFMADD231SDZrbk_Int\000" |
| 64700 | /* 229493 */ "VFNMADD231SDZrbk_Int\000" |
| 64701 | /* 229514 */ "VFMSUB132SDZrbk_Int\000" |
| 64702 | /* 229534 */ "VFNMSUB132SDZrbk_Int\000" |
| 64703 | /* 229555 */ "VFMADD132SDZrbk_Int\000" |
| 64704 | /* 229575 */ "VFNMADD132SDZrbk_Int\000" |
| 64705 | /* 229596 */ "VFMSUB213SDZrbk_Int\000" |
| 64706 | /* 229616 */ "VFNMSUB213SDZrbk_Int\000" |
| 64707 | /* 229637 */ "VFMADD213SDZrbk_Int\000" |
| 64708 | /* 229657 */ "VFNMADD213SDZrbk_Int\000" |
| 64709 | /* 229678 */ "VSQRTSDZrbk_Int\000" |
| 64710 | /* 229694 */ "VFMSUB231SHZrbk_Int\000" |
| 64711 | /* 229714 */ "VFNMSUB231SHZrbk_Int\000" |
| 64712 | /* 229735 */ "VFMADD231SHZrbk_Int\000" |
| 64713 | /* 229755 */ "VFNMADD231SHZrbk_Int\000" |
| 64714 | /* 229776 */ "VFMSUB132SHZrbk_Int\000" |
| 64715 | /* 229796 */ "VFNMSUB132SHZrbk_Int\000" |
| 64716 | /* 229817 */ "VFMADD132SHZrbk_Int\000" |
| 64717 | /* 229837 */ "VFNMADD132SHZrbk_Int\000" |
| 64718 | /* 229858 */ "VFMSUB213SHZrbk_Int\000" |
| 64719 | /* 229878 */ "VFNMSUB213SHZrbk_Int\000" |
| 64720 | /* 229899 */ "VFMADD213SHZrbk_Int\000" |
| 64721 | /* 229919 */ "VFNMADD213SHZrbk_Int\000" |
| 64722 | /* 229940 */ "VSQRTSHZrbk_Int\000" |
| 64723 | /* 229956 */ "VFMSUB231SSZrbk_Int\000" |
| 64724 | /* 229976 */ "VFNMSUB231SSZrbk_Int\000" |
| 64725 | /* 229997 */ "VFMADD231SSZrbk_Int\000" |
| 64726 | /* 230017 */ "VFNMADD231SSZrbk_Int\000" |
| 64727 | /* 230038 */ "VFMSUB132SSZrbk_Int\000" |
| 64728 | /* 230058 */ "VFNMSUB132SSZrbk_Int\000" |
| 64729 | /* 230079 */ "VFMADD132SSZrbk_Int\000" |
| 64730 | /* 230099 */ "VFNMADD132SSZrbk_Int\000" |
| 64731 | /* 230120 */ "VFMSUB213SSZrbk_Int\000" |
| 64732 | /* 230140 */ "VFNMSUB213SSZrbk_Int\000" |
| 64733 | /* 230161 */ "VFMADD213SSZrbk_Int\000" |
| 64734 | /* 230181 */ "VFNMADD213SSZrbk_Int\000" |
| 64735 | /* 230202 */ "VSQRTSSZrbk_Int\000" |
| 64736 | /* 230218 */ "VCVTSH2SDZrrbk_Int\000" |
| 64737 | /* 230237 */ "VCVTSS2SDZrrbk_Int\000" |
| 64738 | /* 230256 */ "VSUBSDZrrbk_Int\000" |
| 64739 | /* 230272 */ "VADDSDZrrbk_Int\000" |
| 64740 | /* 230288 */ "VSCALEFSDZrrbk_Int\000" |
| 64741 | /* 230307 */ "VMULSDZrrbk_Int\000" |
| 64742 | /* 230323 */ "VMINSDZrrbk_Int\000" |
| 64743 | /* 230339 */ "VDIVSDZrrbk_Int\000" |
| 64744 | /* 230355 */ "VMAXSDZrrbk_Int\000" |
| 64745 | /* 230371 */ "VCVTSD2SHZrrbk_Int\000" |
| 64746 | /* 230390 */ "VCVTSS2SHZrrbk_Int\000" |
| 64747 | /* 230409 */ "VSUBSHZrrbk_Int\000" |
| 64748 | /* 230425 */ "VADDSHZrrbk_Int\000" |
| 64749 | /* 230441 */ "VSCALEFSHZrrbk_Int\000" |
| 64750 | /* 230460 */ "VMULSHZrrbk_Int\000" |
| 64751 | /* 230476 */ "VMINSHZrrbk_Int\000" |
| 64752 | /* 230492 */ "VDIVSHZrrbk_Int\000" |
| 64753 | /* 230508 */ "VMAXSHZrrbk_Int\000" |
| 64754 | /* 230524 */ "VCVTSD2SSZrrbk_Int\000" |
| 64755 | /* 230543 */ "VCVTSH2SSZrrbk_Int\000" |
| 64756 | /* 230562 */ "VSUBSSZrrbk_Int\000" |
| 64757 | /* 230578 */ "VADDSSZrrbk_Int\000" |
| 64758 | /* 230594 */ "VSCALEFSSZrrbk_Int\000" |
| 64759 | /* 230613 */ "VMULSSZrrbk_Int\000" |
| 64760 | /* 230629 */ "VMINSSZrrbk_Int\000" |
| 64761 | /* 230645 */ "VDIVSSZrrbk_Int\000" |
| 64762 | /* 230661 */ "VMAXSSZrrbk_Int\000" |
| 64763 | /* 230677 */ "VMINMAXSDrmik_Int\000" |
| 64764 | /* 230695 */ "VMINMAXSHrmik_Int\000" |
| 64765 | /* 230713 */ "VMINMAXSSrmik_Int\000" |
| 64766 | /* 230731 */ "VRNDSCALESDZrmik_Int\000" |
| 64767 | /* 230752 */ "VCMPSDZrmik_Int\000" |
| 64768 | /* 230768 */ "VRNDSCALESHZrmik_Int\000" |
| 64769 | /* 230789 */ "VCMPSHZrmik_Int\000" |
| 64770 | /* 230805 */ "VRNDSCALESSZrmik_Int\000" |
| 64771 | /* 230826 */ "VCMPSSZrmik_Int\000" |
| 64772 | /* 230842 */ "VMINMAXSDrrik_Int\000" |
| 64773 | /* 230860 */ "VMINMAXSHrrik_Int\000" |
| 64774 | /* 230878 */ "VMINMAXSSrrik_Int\000" |
| 64775 | /* 230896 */ "VRNDSCALESDZrrik_Int\000" |
| 64776 | /* 230917 */ "VCMPSDZrrik_Int\000" |
| 64777 | /* 230933 */ "VRNDSCALESHZrrik_Int\000" |
| 64778 | /* 230954 */ "VCMPSHZrrik_Int\000" |
| 64779 | /* 230970 */ "VRNDSCALESSZrrik_Int\000" |
| 64780 | /* 230991 */ "VCMPSSZrrik_Int\000" |
| 64781 | /* 231007 */ "VFMSUB231SDZmk_Int\000" |
| 64782 | /* 231026 */ "VFNMSUB231SDZmk_Int\000" |
| 64783 | /* 231046 */ "VFMADD231SDZmk_Int\000" |
| 64784 | /* 231065 */ "VFNMADD231SDZmk_Int\000" |
| 64785 | /* 231085 */ "VFMSUB132SDZmk_Int\000" |
| 64786 | /* 231104 */ "VFNMSUB132SDZmk_Int\000" |
| 64787 | /* 231124 */ "VFMADD132SDZmk_Int\000" |
| 64788 | /* 231143 */ "VFNMADD132SDZmk_Int\000" |
| 64789 | /* 231163 */ "VFMSUB213SDZmk_Int\000" |
| 64790 | /* 231182 */ "VFNMSUB213SDZmk_Int\000" |
| 64791 | /* 231202 */ "VFMADD213SDZmk_Int\000" |
| 64792 | /* 231221 */ "VFNMADD213SDZmk_Int\000" |
| 64793 | /* 231241 */ "VSQRTSDZmk_Int\000" |
| 64794 | /* 231256 */ "VFMSUB231SHZmk_Int\000" |
| 64795 | /* 231275 */ "VFNMSUB231SHZmk_Int\000" |
| 64796 | /* 231295 */ "VFMADD231SHZmk_Int\000" |
| 64797 | /* 231314 */ "VFNMADD231SHZmk_Int\000" |
| 64798 | /* 231334 */ "VFMSUB132SHZmk_Int\000" |
| 64799 | /* 231353 */ "VFNMSUB132SHZmk_Int\000" |
| 64800 | /* 231373 */ "VFMADD132SHZmk_Int\000" |
| 64801 | /* 231392 */ "VFNMADD132SHZmk_Int\000" |
| 64802 | /* 231412 */ "VFMSUB213SHZmk_Int\000" |
| 64803 | /* 231431 */ "VFNMSUB213SHZmk_Int\000" |
| 64804 | /* 231451 */ "VFMADD213SHZmk_Int\000" |
| 64805 | /* 231470 */ "VFNMADD213SHZmk_Int\000" |
| 64806 | /* 231490 */ "VSQRTSHZmk_Int\000" |
| 64807 | /* 231505 */ "VFMSUB231SSZmk_Int\000" |
| 64808 | /* 231524 */ "VFNMSUB231SSZmk_Int\000" |
| 64809 | /* 231544 */ "VFMADD231SSZmk_Int\000" |
| 64810 | /* 231563 */ "VFNMADD231SSZmk_Int\000" |
| 64811 | /* 231583 */ "VFMSUB132SSZmk_Int\000" |
| 64812 | /* 231602 */ "VFNMSUB132SSZmk_Int\000" |
| 64813 | /* 231622 */ "VFMADD132SSZmk_Int\000" |
| 64814 | /* 231641 */ "VFNMADD132SSZmk_Int\000" |
| 64815 | /* 231661 */ "VFMSUB213SSZmk_Int\000" |
| 64816 | /* 231680 */ "VFNMSUB213SSZmk_Int\000" |
| 64817 | /* 231700 */ "VFMADD213SSZmk_Int\000" |
| 64818 | /* 231719 */ "VFNMADD213SSZmk_Int\000" |
| 64819 | /* 231739 */ "VSQRTSSZmk_Int\000" |
| 64820 | /* 231754 */ "VCVTSH2SDZrmk_Int\000" |
| 64821 | /* 231772 */ "VCVTSS2SDZrmk_Int\000" |
| 64822 | /* 231790 */ "VSUBSDZrmk_Int\000" |
| 64823 | /* 231805 */ "VADDSDZrmk_Int\000" |
| 64824 | /* 231820 */ "VMULSDZrmk_Int\000" |
| 64825 | /* 231835 */ "VMINSDZrmk_Int\000" |
| 64826 | /* 231850 */ "VDIVSDZrmk_Int\000" |
| 64827 | /* 231865 */ "VMAXSDZrmk_Int\000" |
| 64828 | /* 231880 */ "VCVTSD2SHZrmk_Int\000" |
| 64829 | /* 231898 */ "VCVTSS2SHZrmk_Int\000" |
| 64830 | /* 231916 */ "VSUBSHZrmk_Int\000" |
| 64831 | /* 231931 */ "VADDSHZrmk_Int\000" |
| 64832 | /* 231946 */ "VMULSHZrmk_Int\000" |
| 64833 | /* 231961 */ "VMINSHZrmk_Int\000" |
| 64834 | /* 231976 */ "VDIVSHZrmk_Int\000" |
| 64835 | /* 231991 */ "VMAXSHZrmk_Int\000" |
| 64836 | /* 232006 */ "VCVTSD2SSZrmk_Int\000" |
| 64837 | /* 232024 */ "VCVTSH2SSZrmk_Int\000" |
| 64838 | /* 232042 */ "VSUBSSZrmk_Int\000" |
| 64839 | /* 232057 */ "VADDSSZrmk_Int\000" |
| 64840 | /* 232072 */ "VMULSSZrmk_Int\000" |
| 64841 | /* 232087 */ "VMINSSZrmk_Int\000" |
| 64842 | /* 232102 */ "VDIVSSZrmk_Int\000" |
| 64843 | /* 232117 */ "VMAXSSZrmk_Int\000" |
| 64844 | /* 232132 */ "VFMSUB231SDZrk_Int\000" |
| 64845 | /* 232151 */ "VFNMSUB231SDZrk_Int\000" |
| 64846 | /* 232171 */ "VFMADD231SDZrk_Int\000" |
| 64847 | /* 232190 */ "VFNMADD231SDZrk_Int\000" |
| 64848 | /* 232210 */ "VFMSUB132SDZrk_Int\000" |
| 64849 | /* 232229 */ "VFNMSUB132SDZrk_Int\000" |
| 64850 | /* 232249 */ "VFMADD132SDZrk_Int\000" |
| 64851 | /* 232268 */ "VFNMADD132SDZrk_Int\000" |
| 64852 | /* 232288 */ "VFMSUB213SDZrk_Int\000" |
| 64853 | /* 232307 */ "VFNMSUB213SDZrk_Int\000" |
| 64854 | /* 232327 */ "VFMADD213SDZrk_Int\000" |
| 64855 | /* 232346 */ "VFNMADD213SDZrk_Int\000" |
| 64856 | /* 232366 */ "VSQRTSDZrk_Int\000" |
| 64857 | /* 232381 */ "VFMSUB231SHZrk_Int\000" |
| 64858 | /* 232400 */ "VFNMSUB231SHZrk_Int\000" |
| 64859 | /* 232420 */ "VFMADD231SHZrk_Int\000" |
| 64860 | /* 232439 */ "VFNMADD231SHZrk_Int\000" |
| 64861 | /* 232459 */ "VFMSUB132SHZrk_Int\000" |
| 64862 | /* 232478 */ "VFNMSUB132SHZrk_Int\000" |
| 64863 | /* 232498 */ "VFMADD132SHZrk_Int\000" |
| 64864 | /* 232517 */ "VFNMADD132SHZrk_Int\000" |
| 64865 | /* 232537 */ "VFMSUB213SHZrk_Int\000" |
| 64866 | /* 232556 */ "VFNMSUB213SHZrk_Int\000" |
| 64867 | /* 232576 */ "VFMADD213SHZrk_Int\000" |
| 64868 | /* 232595 */ "VFNMADD213SHZrk_Int\000" |
| 64869 | /* 232615 */ "VSQRTSHZrk_Int\000" |
| 64870 | /* 232630 */ "VFMSUB231SSZrk_Int\000" |
| 64871 | /* 232649 */ "VFNMSUB231SSZrk_Int\000" |
| 64872 | /* 232669 */ "VFMADD231SSZrk_Int\000" |
| 64873 | /* 232688 */ "VFNMADD231SSZrk_Int\000" |
| 64874 | /* 232708 */ "VFMSUB132SSZrk_Int\000" |
| 64875 | /* 232727 */ "VFNMSUB132SSZrk_Int\000" |
| 64876 | /* 232747 */ "VFMADD132SSZrk_Int\000" |
| 64877 | /* 232766 */ "VFNMADD132SSZrk_Int\000" |
| 64878 | /* 232786 */ "VFMSUB213SSZrk_Int\000" |
| 64879 | /* 232805 */ "VFNMSUB213SSZrk_Int\000" |
| 64880 | /* 232825 */ "VFMADD213SSZrk_Int\000" |
| 64881 | /* 232844 */ "VFNMADD213SSZrk_Int\000" |
| 64882 | /* 232864 */ "VSQRTSSZrk_Int\000" |
| 64883 | /* 232879 */ "VCVTSH2SDZrrk_Int\000" |
| 64884 | /* 232897 */ "VCVTSS2SDZrrk_Int\000" |
| 64885 | /* 232915 */ "VSUBSDZrrk_Int\000" |
| 64886 | /* 232930 */ "VADDSDZrrk_Int\000" |
| 64887 | /* 232945 */ "VMULSDZrrk_Int\000" |
| 64888 | /* 232960 */ "VMINSDZrrk_Int\000" |
| 64889 | /* 232975 */ "VDIVSDZrrk_Int\000" |
| 64890 | /* 232990 */ "VMAXSDZrrk_Int\000" |
| 64891 | /* 233005 */ "VCVTSD2SHZrrk_Int\000" |
| 64892 | /* 233023 */ "VCVTSS2SHZrrk_Int\000" |
| 64893 | /* 233041 */ "VSUBSHZrrk_Int\000" |
| 64894 | /* 233056 */ "VADDSHZrrk_Int\000" |
| 64895 | /* 233071 */ "VMULSHZrrk_Int\000" |
| 64896 | /* 233086 */ "VMINSHZrrk_Int\000" |
| 64897 | /* 233101 */ "VDIVSHZrrk_Int\000" |
| 64898 | /* 233116 */ "VMAXSHZrrk_Int\000" |
| 64899 | /* 233131 */ "VCVTSD2SSZrrk_Int\000" |
| 64900 | /* 233149 */ "VCVTSH2SSZrrk_Int\000" |
| 64901 | /* 233167 */ "VSUBSSZrrk_Int\000" |
| 64902 | /* 233182 */ "VADDSSZrrk_Int\000" |
| 64903 | /* 233197 */ "VMULSSZrrk_Int\000" |
| 64904 | /* 233212 */ "VMINSSZrrk_Int\000" |
| 64905 | /* 233227 */ "VDIVSSZrrk_Int\000" |
| 64906 | /* 233242 */ "VMAXSSZrrk_Int\000" |
| 64907 | /* 233257 */ "VFMSUB231SDm_Int\000" |
| 64908 | /* 233274 */ "VFNMSUB231SDm_Int\000" |
| 64909 | /* 233292 */ "VFMADD231SDm_Int\000" |
| 64910 | /* 233309 */ "VFNMADD231SDm_Int\000" |
| 64911 | /* 233327 */ "VFMSUB132SDm_Int\000" |
| 64912 | /* 233344 */ "VFNMSUB132SDm_Int\000" |
| 64913 | /* 233362 */ "VFMADD132SDm_Int\000" |
| 64914 | /* 233379 */ "VFNMADD132SDm_Int\000" |
| 64915 | /* 233397 */ "VFMSUB213SDm_Int\000" |
| 64916 | /* 233414 */ "VFNMSUB213SDm_Int\000" |
| 64917 | /* 233432 */ "VFMADD213SDm_Int\000" |
| 64918 | /* 233449 */ "VFNMADD213SDm_Int\000" |
| 64919 | /* 233467 */ "VSQRTSDm_Int\000" |
| 64920 | /* 233480 */ "VFMSUB231SSm_Int\000" |
| 64921 | /* 233497 */ "VFNMSUB231SSm_Int\000" |
| 64922 | /* 233515 */ "VFMADD231SSm_Int\000" |
| 64923 | /* 233532 */ "VFNMADD231SSm_Int\000" |
| 64924 | /* 233550 */ "VFMSUB132SSm_Int\000" |
| 64925 | /* 233567 */ "VFNMSUB132SSm_Int\000" |
| 64926 | /* 233585 */ "VFMADD132SSm_Int\000" |
| 64927 | /* 233602 */ "VFNMADD132SSm_Int\000" |
| 64928 | /* 233620 */ "VFMSUB213SSm_Int\000" |
| 64929 | /* 233637 */ "VFNMSUB213SSm_Int\000" |
| 64930 | /* 233655 */ "VFMADD213SSm_Int\000" |
| 64931 | /* 233672 */ "VFNMADD213SSm_Int\000" |
| 64932 | /* 233690 */ "VRCPSSm_Int\000" |
| 64933 | /* 233702 */ "VRSQRTSSm_Int\000" |
| 64934 | /* 233716 */ "VSQRTSSm_Int\000" |
| 64935 | /* 233729 */ "VFMSUB231SDZm_Int\000" |
| 64936 | /* 233747 */ "VFNMSUB231SDZm_Int\000" |
| 64937 | /* 233766 */ "VFMADD231SDZm_Int\000" |
| 64938 | /* 233784 */ "VFNMADD231SDZm_Int\000" |
| 64939 | /* 233803 */ "VFMSUB132SDZm_Int\000" |
| 64940 | /* 233821 */ "VFNMSUB132SDZm_Int\000" |
| 64941 | /* 233840 */ "VFMADD132SDZm_Int\000" |
| 64942 | /* 233858 */ "VFNMADD132SDZm_Int\000" |
| 64943 | /* 233877 */ "VFMSUB213SDZm_Int\000" |
| 64944 | /* 233895 */ "VFNMSUB213SDZm_Int\000" |
| 64945 | /* 233914 */ "VFMADD213SDZm_Int\000" |
| 64946 | /* 233932 */ "VFNMADD213SDZm_Int\000" |
| 64947 | /* 233951 */ "VSQRTSDZm_Int\000" |
| 64948 | /* 233965 */ "VFMSUB231SHZm_Int\000" |
| 64949 | /* 233983 */ "VFNMSUB231SHZm_Int\000" |
| 64950 | /* 234002 */ "VFMADD231SHZm_Int\000" |
| 64951 | /* 234020 */ "VFNMADD231SHZm_Int\000" |
| 64952 | /* 234039 */ "VFMSUB132SHZm_Int\000" |
| 64953 | /* 234057 */ "VFNMSUB132SHZm_Int\000" |
| 64954 | /* 234076 */ "VFMADD132SHZm_Int\000" |
| 64955 | /* 234094 */ "VFNMADD132SHZm_Int\000" |
| 64956 | /* 234113 */ "VFMSUB213SHZm_Int\000" |
| 64957 | /* 234131 */ "VFNMSUB213SHZm_Int\000" |
| 64958 | /* 234150 */ "VFMADD213SHZm_Int\000" |
| 64959 | /* 234168 */ "VFNMADD213SHZm_Int\000" |
| 64960 | /* 234187 */ "VSQRTSHZm_Int\000" |
| 64961 | /* 234201 */ "VFMSUB231SSZm_Int\000" |
| 64962 | /* 234219 */ "VFNMSUB231SSZm_Int\000" |
| 64963 | /* 234238 */ "VFMADD231SSZm_Int\000" |
| 64964 | /* 234256 */ "VFNMADD231SSZm_Int\000" |
| 64965 | /* 234275 */ "VFMSUB132SSZm_Int\000" |
| 64966 | /* 234293 */ "VFNMSUB132SSZm_Int\000" |
| 64967 | /* 234312 */ "VFMADD132SSZm_Int\000" |
| 64968 | /* 234330 */ "VFNMADD132SSZm_Int\000" |
| 64969 | /* 234349 */ "VFMSUB213SSZm_Int\000" |
| 64970 | /* 234367 */ "VFNMSUB213SSZm_Int\000" |
| 64971 | /* 234386 */ "VFMADD213SSZm_Int\000" |
| 64972 | /* 234404 */ "VFNMADD213SSZm_Int\000" |
| 64973 | /* 234423 */ "VSQRTSSZm_Int\000" |
| 64974 | /* 234437 */ "VCVTTSD2SI64rm_Int\000" |
| 64975 | /* 234456 */ "VCVTSD2SI64rm_Int\000" |
| 64976 | /* 234474 */ "VCVTTSS2SI64rm_Int\000" |
| 64977 | /* 234493 */ "VCVTSS2SI64rm_Int\000" |
| 64978 | /* 234511 */ "VFMSUBSD4rm_Int\000" |
| 64979 | /* 234527 */ "VFNMSUBSD4rm_Int\000" |
| 64980 | /* 234544 */ "VFMADDSD4rm_Int\000" |
| 64981 | /* 234560 */ "VFNMADDSD4rm_Int\000" |
| 64982 | /* 234577 */ "VFMSUBSS4rm_Int\000" |
| 64983 | /* 234593 */ "VFNMSUBSS4rm_Int\000" |
| 64984 | /* 234610 */ "VFMADDSS4rm_Int\000" |
| 64985 | /* 234626 */ "VFNMADDSS4rm_Int\000" |
| 64986 | /* 234643 */ "VCVTSI642SDrm_Int\000" |
| 64987 | /* 234661 */ "VCVTSI2SDrm_Int\000" |
| 64988 | /* 234677 */ "VCVTSS2SDrm_Int\000" |
| 64989 | /* 234693 */ "VSUBSDrm_Int\000" |
| 64990 | /* 234706 */ "VADDSDrm_Int\000" |
| 64991 | /* 234719 */ "VUCOMISDrm_Int\000" |
| 64992 | /* 234734 */ "VCOMISDrm_Int\000" |
| 64993 | /* 234748 */ "VMULSDrm_Int\000" |
| 64994 | /* 234761 */ "VMINSDrm_Int\000" |
| 64995 | /* 234774 */ "VDIVSDrm_Int\000" |
| 64996 | /* 234787 */ "VMAXSDrm_Int\000" |
| 64997 | /* 234800 */ "VCVTTSD2SIrm_Int\000" |
| 64998 | /* 234817 */ "VCVTSD2SIrm_Int\000" |
| 64999 | /* 234833 */ "VCVTTSS2SIrm_Int\000" |
| 65000 | /* 234850 */ "VCVTSS2SIrm_Int\000" |
| 65001 | /* 234866 */ "VCVTTSD2SI64Srm_Int\000" |
| 65002 | /* 234886 */ "VCVTTSS2SI64Srm_Int\000" |
| 65003 | /* 234906 */ "VCVTTSD2USI64Srm_Int\000" |
| 65004 | /* 234927 */ "VCVTTSS2USI64Srm_Int\000" |
| 65005 | /* 234948 */ "VCVTTSD2SISrm_Int\000" |
| 65006 | /* 234966 */ "VCVTTSS2SISrm_Int\000" |
| 65007 | /* 234984 */ "VCVTTSD2USISrm_Int\000" |
| 65008 | /* 235003 */ "VCVTTSS2USISrm_Int\000" |
| 65009 | /* 235022 */ "VCVTSI642SSrm_Int\000" |
| 65010 | /* 235040 */ "VCVTSD2SSrm_Int\000" |
| 65011 | /* 235056 */ "VCVTSI2SSrm_Int\000" |
| 65012 | /* 235072 */ "VSUBSSrm_Int\000" |
| 65013 | /* 235085 */ "VADDSSrm_Int\000" |
| 65014 | /* 235098 */ "VUCOMISSrm_Int\000" |
| 65015 | /* 235113 */ "VCOMISSrm_Int\000" |
| 65016 | /* 235127 */ "VMULSSrm_Int\000" |
| 65017 | /* 235140 */ "VMINSSrm_Int\000" |
| 65018 | /* 235153 */ "VDIVSSrm_Int\000" |
| 65019 | /* 235166 */ "VMAXSSrm_Int\000" |
| 65020 | /* 235179 */ "VCVTTSD2SI64Zrm_Int\000" |
| 65021 | /* 235199 */ "VCVTSD2SI64Zrm_Int\000" |
| 65022 | /* 235218 */ "VCVTTSH2SI64Zrm_Int\000" |
| 65023 | /* 235238 */ "VCVTSH2SI64Zrm_Int\000" |
| 65024 | /* 235257 */ "VCVTTSS2SI64Zrm_Int\000" |
| 65025 | /* 235277 */ "VCVTSS2SI64Zrm_Int\000" |
| 65026 | /* 235296 */ "VCVTTSD2USI64Zrm_Int\000" |
| 65027 | /* 235317 */ "VCVTSD2USI64Zrm_Int\000" |
| 65028 | /* 235337 */ "VCVTTSH2USI64Zrm_Int\000" |
| 65029 | /* 235358 */ "VCVTSH2USI64Zrm_Int\000" |
| 65030 | /* 235378 */ "VCVTTSS2USI64Zrm_Int\000" |
| 65031 | /* 235399 */ "VCVTSS2USI64Zrm_Int\000" |
| 65032 | /* 235419 */ "VCOMISBF16Zrm_Int\000" |
| 65033 | /* 235437 */ "VCVTSI642SDZrm_Int\000" |
| 65034 | /* 235456 */ "VCVTUSI642SDZrm_Int\000" |
| 65035 | /* 235476 */ "VCVTSH2SDZrm_Int\000" |
| 65036 | /* 235493 */ "VCVTSI2SDZrm_Int\000" |
| 65037 | /* 235510 */ "VCVTUSI2SDZrm_Int\000" |
| 65038 | /* 235528 */ "VCVTSS2SDZrm_Int\000" |
| 65039 | /* 235545 */ "VSUBSDZrm_Int\000" |
| 65040 | /* 235559 */ "VADDSDZrm_Int\000" |
| 65041 | /* 235573 */ "VUCOMISDZrm_Int\000" |
| 65042 | /* 235589 */ "VCOMISDZrm_Int\000" |
| 65043 | /* 235604 */ "VMULSDZrm_Int\000" |
| 65044 | /* 235618 */ "VMINSDZrm_Int\000" |
| 65045 | /* 235632 */ "VDIVSDZrm_Int\000" |
| 65046 | /* 235646 */ "VMAXSDZrm_Int\000" |
| 65047 | /* 235660 */ "VUCOMXSDZrm_Int\000" |
| 65048 | /* 235676 */ "VCOMXSDZrm_Int\000" |
| 65049 | /* 235691 */ "VCVTSI642SHZrm_Int\000" |
| 65050 | /* 235710 */ "VCVTUSI642SHZrm_Int\000" |
| 65051 | /* 235730 */ "VCVTSD2SHZrm_Int\000" |
| 65052 | /* 235747 */ "VCVTSI2SHZrm_Int\000" |
| 65053 | /* 235764 */ "VCVTUSI2SHZrm_Int\000" |
| 65054 | /* 235782 */ "VCVTSS2SHZrm_Int\000" |
| 65055 | /* 235799 */ "VSUBSHZrm_Int\000" |
| 65056 | /* 235813 */ "VADDSHZrm_Int\000" |
| 65057 | /* 235827 */ "VUCOMISHZrm_Int\000" |
| 65058 | /* 235843 */ "VCOMISHZrm_Int\000" |
| 65059 | /* 235858 */ "VMULSHZrm_Int\000" |
| 65060 | /* 235872 */ "VMINSHZrm_Int\000" |
| 65061 | /* 235886 */ "VDIVSHZrm_Int\000" |
| 65062 | /* 235900 */ "VMAXSHZrm_Int\000" |
| 65063 | /* 235914 */ "VUCOMXSHZrm_Int\000" |
| 65064 | /* 235930 */ "VCOMXSHZrm_Int\000" |
| 65065 | /* 235945 */ "VCVTTSD2SIZrm_Int\000" |
| 65066 | /* 235963 */ "VCVTSD2SIZrm_Int\000" |
| 65067 | /* 235980 */ "VCVTTSH2SIZrm_Int\000" |
| 65068 | /* 235998 */ "VCVTSH2SIZrm_Int\000" |
| 65069 | /* 236015 */ "VCVTTSS2SIZrm_Int\000" |
| 65070 | /* 236033 */ "VCVTSS2SIZrm_Int\000" |
| 65071 | /* 236050 */ "VCVTTSD2USIZrm_Int\000" |
| 65072 | /* 236069 */ "VCVTSD2USIZrm_Int\000" |
| 65073 | /* 236087 */ "VCVTTSH2USIZrm_Int\000" |
| 65074 | /* 236106 */ "VCVTSH2USIZrm_Int\000" |
| 65075 | /* 236124 */ "VCVTTSS2USIZrm_Int\000" |
| 65076 | /* 236143 */ "VCVTSS2USIZrm_Int\000" |
| 65077 | /* 236161 */ "VCVTSI642SSZrm_Int\000" |
| 65078 | /* 236180 */ "VCVTUSI642SSZrm_Int\000" |
| 65079 | /* 236200 */ "VCVTSD2SSZrm_Int\000" |
| 65080 | /* 236217 */ "VCVTSH2SSZrm_Int\000" |
| 65081 | /* 236234 */ "VCVTSI2SSZrm_Int\000" |
| 65082 | /* 236251 */ "VCVTUSI2SSZrm_Int\000" |
| 65083 | /* 236269 */ "VSUBSSZrm_Int\000" |
| 65084 | /* 236283 */ "VADDSSZrm_Int\000" |
| 65085 | /* 236297 */ "VUCOMISSZrm_Int\000" |
| 65086 | /* 236313 */ "VCOMISSZrm_Int\000" |
| 65087 | /* 236328 */ "VMULSSZrm_Int\000" |
| 65088 | /* 236342 */ "VMINSSZrm_Int\000" |
| 65089 | /* 236356 */ "VDIVSSZrm_Int\000" |
| 65090 | /* 236370 */ "VMAXSSZrm_Int\000" |
| 65091 | /* 236384 */ "VUCOMXSSZrm_Int\000" |
| 65092 | /* 236400 */ "VCOMXSSZrm_Int\000" |
| 65093 | /* 236415 */ "VFMSUB231SDr_Int\000" |
| 65094 | /* 236432 */ "VFNMSUB231SDr_Int\000" |
| 65095 | /* 236450 */ "VFMADD231SDr_Int\000" |
| 65096 | /* 236467 */ "VFNMADD231SDr_Int\000" |
| 65097 | /* 236485 */ "VFMSUB132SDr_Int\000" |
| 65098 | /* 236502 */ "VFNMSUB132SDr_Int\000" |
| 65099 | /* 236520 */ "VFMADD132SDr_Int\000" |
| 65100 | /* 236537 */ "VFNMADD132SDr_Int\000" |
| 65101 | /* 236555 */ "VFMSUB213SDr_Int\000" |
| 65102 | /* 236572 */ "VFNMSUB213SDr_Int\000" |
| 65103 | /* 236590 */ "VFMADD213SDr_Int\000" |
| 65104 | /* 236607 */ "VFNMADD213SDr_Int\000" |
| 65105 | /* 236625 */ "VSQRTSDr_Int\000" |
| 65106 | /* 236638 */ "VFMSUB231SSr_Int\000" |
| 65107 | /* 236655 */ "VFNMSUB231SSr_Int\000" |
| 65108 | /* 236673 */ "VFMADD231SSr_Int\000" |
| 65109 | /* 236690 */ "VFNMADD231SSr_Int\000" |
| 65110 | /* 236708 */ "VFMSUB132SSr_Int\000" |
| 65111 | /* 236725 */ "VFNMSUB132SSr_Int\000" |
| 65112 | /* 236743 */ "VFMADD132SSr_Int\000" |
| 65113 | /* 236760 */ "VFNMADD132SSr_Int\000" |
| 65114 | /* 236778 */ "VFMSUB213SSr_Int\000" |
| 65115 | /* 236795 */ "VFNMSUB213SSr_Int\000" |
| 65116 | /* 236813 */ "VFMADD213SSr_Int\000" |
| 65117 | /* 236830 */ "VFNMADD213SSr_Int\000" |
| 65118 | /* 236848 */ "VRCPSSr_Int\000" |
| 65119 | /* 236860 */ "VRSQRTSSr_Int\000" |
| 65120 | /* 236874 */ "VSQRTSSr_Int\000" |
| 65121 | /* 236887 */ "VFMSUB231SDZr_Int\000" |
| 65122 | /* 236905 */ "VFNMSUB231SDZr_Int\000" |
| 65123 | /* 236924 */ "VFMADD231SDZr_Int\000" |
| 65124 | /* 236942 */ "VFNMADD231SDZr_Int\000" |
| 65125 | /* 236961 */ "VFMSUB132SDZr_Int\000" |
| 65126 | /* 236979 */ "VFNMSUB132SDZr_Int\000" |
| 65127 | /* 236998 */ "VFMADD132SDZr_Int\000" |
| 65128 | /* 237016 */ "VFNMADD132SDZr_Int\000" |
| 65129 | /* 237035 */ "VFMSUB213SDZr_Int\000" |
| 65130 | /* 237053 */ "VFNMSUB213SDZr_Int\000" |
| 65131 | /* 237072 */ "VFMADD213SDZr_Int\000" |
| 65132 | /* 237090 */ "VFNMADD213SDZr_Int\000" |
| 65133 | /* 237109 */ "VSQRTSDZr_Int\000" |
| 65134 | /* 237123 */ "VFMSUB231SHZr_Int\000" |
| 65135 | /* 237141 */ "VFNMSUB231SHZr_Int\000" |
| 65136 | /* 237160 */ "VFMADD231SHZr_Int\000" |
| 65137 | /* 237178 */ "VFNMADD231SHZr_Int\000" |
| 65138 | /* 237197 */ "VFMSUB132SHZr_Int\000" |
| 65139 | /* 237215 */ "VFNMSUB132SHZr_Int\000" |
| 65140 | /* 237234 */ "VFMADD132SHZr_Int\000" |
| 65141 | /* 237252 */ "VFNMADD132SHZr_Int\000" |
| 65142 | /* 237271 */ "VFMSUB213SHZr_Int\000" |
| 65143 | /* 237289 */ "VFNMSUB213SHZr_Int\000" |
| 65144 | /* 237308 */ "VFMADD213SHZr_Int\000" |
| 65145 | /* 237326 */ "VFNMADD213SHZr_Int\000" |
| 65146 | /* 237345 */ "VSQRTSHZr_Int\000" |
| 65147 | /* 237359 */ "VFMSUB231SSZr_Int\000" |
| 65148 | /* 237377 */ "VFNMSUB231SSZr_Int\000" |
| 65149 | /* 237396 */ "VFMADD231SSZr_Int\000" |
| 65150 | /* 237414 */ "VFNMADD231SSZr_Int\000" |
| 65151 | /* 237433 */ "VFMSUB132SSZr_Int\000" |
| 65152 | /* 237451 */ "VFNMSUB132SSZr_Int\000" |
| 65153 | /* 237470 */ "VFMADD132SSZr_Int\000" |
| 65154 | /* 237488 */ "VFNMADD132SSZr_Int\000" |
| 65155 | /* 237507 */ "VFMSUB213SSZr_Int\000" |
| 65156 | /* 237525 */ "VFNMSUB213SSZr_Int\000" |
| 65157 | /* 237544 */ "VFMADD213SSZr_Int\000" |
| 65158 | /* 237562 */ "VFNMADD213SSZr_Int\000" |
| 65159 | /* 237581 */ "VSQRTSSZr_Int\000" |
| 65160 | /* 237595 */ "VFMSUBSD4mr_Int\000" |
| 65161 | /* 237611 */ "VFNMSUBSD4mr_Int\000" |
| 65162 | /* 237628 */ "VFMADDSD4mr_Int\000" |
| 65163 | /* 237644 */ "VFNMADDSD4mr_Int\000" |
| 65164 | /* 237661 */ "VFMSUBSS4mr_Int\000" |
| 65165 | /* 237677 */ "VFNMSUBSS4mr_Int\000" |
| 65166 | /* 237694 */ "VFMADDSS4mr_Int\000" |
| 65167 | /* 237710 */ "VFNMADDSS4mr_Int\000" |
| 65168 | /* 237727 */ "VCVTTSD2SI64rr_Int\000" |
| 65169 | /* 237746 */ "VCVTSD2SI64rr_Int\000" |
| 65170 | /* 237764 */ "VCVTTSS2SI64rr_Int\000" |
| 65171 | /* 237783 */ "VCVTSS2SI64rr_Int\000" |
| 65172 | /* 237801 */ "VFMSUBSD4rr_Int\000" |
| 65173 | /* 237817 */ "VFNMSUBSD4rr_Int\000" |
| 65174 | /* 237834 */ "VFMADDSD4rr_Int\000" |
| 65175 | /* 237850 */ "VFNMADDSD4rr_Int\000" |
| 65176 | /* 237867 */ "VFMSUBSS4rr_Int\000" |
| 65177 | /* 237883 */ "VFNMSUBSS4rr_Int\000" |
| 65178 | /* 237900 */ "VFMADDSS4rr_Int\000" |
| 65179 | /* 237916 */ "VFNMADDSS4rr_Int\000" |
| 65180 | /* 237933 */ "VCVTSI642SDrr_Int\000" |
| 65181 | /* 237951 */ "VCVTSI2SDrr_Int\000" |
| 65182 | /* 237967 */ "VCVTSS2SDrr_Int\000" |
| 65183 | /* 237983 */ "VSUBSDrr_Int\000" |
| 65184 | /* 237996 */ "VADDSDrr_Int\000" |
| 65185 | /* 238009 */ "VUCOMISDrr_Int\000" |
| 65186 | /* 238024 */ "VCOMISDrr_Int\000" |
| 65187 | /* 238038 */ "VMULSDrr_Int\000" |
| 65188 | /* 238051 */ "VMINSDrr_Int\000" |
| 65189 | /* 238064 */ "VDIVSDrr_Int\000" |
| 65190 | /* 238077 */ "VMAXSDrr_Int\000" |
| 65191 | /* 238090 */ "VCVTTSD2SIrr_Int\000" |
| 65192 | /* 238107 */ "VCVTSD2SIrr_Int\000" |
| 65193 | /* 238123 */ "VCVTTSS2SIrr_Int\000" |
| 65194 | /* 238140 */ "VCVTSS2SIrr_Int\000" |
| 65195 | /* 238156 */ "VCVTTSD2SI64Srr_Int\000" |
| 65196 | /* 238176 */ "VCVTTSS2SI64Srr_Int\000" |
| 65197 | /* 238196 */ "VCVTTSD2USI64Srr_Int\000" |
| 65198 | /* 238217 */ "VCVTTSS2USI64Srr_Int\000" |
| 65199 | /* 238238 */ "VCVTTSD2SISrr_Int\000" |
| 65200 | /* 238256 */ "VCVTTSS2SISrr_Int\000" |
| 65201 | /* 238274 */ "VCVTTSD2USISrr_Int\000" |
| 65202 | /* 238293 */ "VCVTTSS2USISrr_Int\000" |
| 65203 | /* 238312 */ "VCVTSI642SSrr_Int\000" |
| 65204 | /* 238330 */ "VCVTSD2SSrr_Int\000" |
| 65205 | /* 238346 */ "VCVTSI2SSrr_Int\000" |
| 65206 | /* 238362 */ "VSUBSSrr_Int\000" |
| 65207 | /* 238375 */ "VADDSSrr_Int\000" |
| 65208 | /* 238388 */ "VUCOMISSrr_Int\000" |
| 65209 | /* 238403 */ "VCOMISSrr_Int\000" |
| 65210 | /* 238417 */ "VMULSSrr_Int\000" |
| 65211 | /* 238430 */ "VMINSSrr_Int\000" |
| 65212 | /* 238443 */ "VDIVSSrr_Int\000" |
| 65213 | /* 238456 */ "VMAXSSrr_Int\000" |
| 65214 | /* 238469 */ "VCVTTSD2SI64Zrr_Int\000" |
| 65215 | /* 238489 */ "VCVTSD2SI64Zrr_Int\000" |
| 65216 | /* 238508 */ "VCVTTSH2SI64Zrr_Int\000" |
| 65217 | /* 238528 */ "VCVTSH2SI64Zrr_Int\000" |
| 65218 | /* 238547 */ "VCVTTSS2SI64Zrr_Int\000" |
| 65219 | /* 238567 */ "VCVTSS2SI64Zrr_Int\000" |
| 65220 | /* 238586 */ "VCVTTSD2USI64Zrr_Int\000" |
| 65221 | /* 238607 */ "VCVTSD2USI64Zrr_Int\000" |
| 65222 | /* 238627 */ "VCVTTSH2USI64Zrr_Int\000" |
| 65223 | /* 238648 */ "VCVTSH2USI64Zrr_Int\000" |
| 65224 | /* 238668 */ "VCVTTSS2USI64Zrr_Int\000" |
| 65225 | /* 238689 */ "VCVTSS2USI64Zrr_Int\000" |
| 65226 | /* 238709 */ "VCOMISBF16Zrr_Int\000" |
| 65227 | /* 238727 */ "VCVTSI642SDZrr_Int\000" |
| 65228 | /* 238746 */ "VCVTUSI642SDZrr_Int\000" |
| 65229 | /* 238766 */ "VCVTSH2SDZrr_Int\000" |
| 65230 | /* 238783 */ "VCVTSI2SDZrr_Int\000" |
| 65231 | /* 238800 */ "VCVTUSI2SDZrr_Int\000" |
| 65232 | /* 238818 */ "VCVTSS2SDZrr_Int\000" |
| 65233 | /* 238835 */ "VSUBSDZrr_Int\000" |
| 65234 | /* 238849 */ "VADDSDZrr_Int\000" |
| 65235 | /* 238863 */ "VUCOMISDZrr_Int\000" |
| 65236 | /* 238879 */ "VCOMISDZrr_Int\000" |
| 65237 | /* 238894 */ "VMULSDZrr_Int\000" |
| 65238 | /* 238908 */ "VMINSDZrr_Int\000" |
| 65239 | /* 238922 */ "VDIVSDZrr_Int\000" |
| 65240 | /* 238936 */ "VMAXSDZrr_Int\000" |
| 65241 | /* 238950 */ "VUCOMXSDZrr_Int\000" |
| 65242 | /* 238966 */ "VCOMXSDZrr_Int\000" |
| 65243 | /* 238981 */ "VCVTSI642SHZrr_Int\000" |
| 65244 | /* 239000 */ "VCVTUSI642SHZrr_Int\000" |
| 65245 | /* 239020 */ "VCVTSD2SHZrr_Int\000" |
| 65246 | /* 239037 */ "VCVTSI2SHZrr_Int\000" |
| 65247 | /* 239054 */ "VCVTUSI2SHZrr_Int\000" |
| 65248 | /* 239072 */ "VCVTSS2SHZrr_Int\000" |
| 65249 | /* 239089 */ "VSUBSHZrr_Int\000" |
| 65250 | /* 239103 */ "VADDSHZrr_Int\000" |
| 65251 | /* 239117 */ "VUCOMISHZrr_Int\000" |
| 65252 | /* 239133 */ "VCOMISHZrr_Int\000" |
| 65253 | /* 239148 */ "VMULSHZrr_Int\000" |
| 65254 | /* 239162 */ "VMINSHZrr_Int\000" |
| 65255 | /* 239176 */ "VDIVSHZrr_Int\000" |
| 65256 | /* 239190 */ "VMAXSHZrr_Int\000" |
| 65257 | /* 239204 */ "VUCOMXSHZrr_Int\000" |
| 65258 | /* 239220 */ "VCOMXSHZrr_Int\000" |
| 65259 | /* 239235 */ "VCVTTSD2SIZrr_Int\000" |
| 65260 | /* 239253 */ "VCVTSD2SIZrr_Int\000" |
| 65261 | /* 239270 */ "VCVTTSH2SIZrr_Int\000" |
| 65262 | /* 239288 */ "VCVTSH2SIZrr_Int\000" |
| 65263 | /* 239305 */ "VCVTTSS2SIZrr_Int\000" |
| 65264 | /* 239323 */ "VCVTSS2SIZrr_Int\000" |
| 65265 | /* 239340 */ "VCVTTSD2USIZrr_Int\000" |
| 65266 | /* 239359 */ "VCVTSD2USIZrr_Int\000" |
| 65267 | /* 239377 */ "VCVTTSH2USIZrr_Int\000" |
| 65268 | /* 239396 */ "VCVTSH2USIZrr_Int\000" |
| 65269 | /* 239414 */ "VCVTTSS2USIZrr_Int\000" |
| 65270 | /* 239433 */ "VCVTSS2USIZrr_Int\000" |
| 65271 | /* 239451 */ "VCVTSI642SSZrr_Int\000" |
| 65272 | /* 239470 */ "VCVTUSI642SSZrr_Int\000" |
| 65273 | /* 239490 */ "VCVTSD2SSZrr_Int\000" |
| 65274 | /* 239507 */ "VCVTSH2SSZrr_Int\000" |
| 65275 | /* 239524 */ "VCVTSI2SSZrr_Int\000" |
| 65276 | /* 239541 */ "VCVTUSI2SSZrr_Int\000" |
| 65277 | /* 239559 */ "VSUBSSZrr_Int\000" |
| 65278 | /* 239573 */ "VADDSSZrr_Int\000" |
| 65279 | /* 239587 */ "VUCOMISSZrr_Int\000" |
| 65280 | /* 239603 */ "VCOMISSZrr_Int\000" |
| 65281 | /* 239618 */ "VMULSSZrr_Int\000" |
| 65282 | /* 239632 */ "VMINSSZrr_Int\000" |
| 65283 | /* 239646 */ "VDIVSSZrr_Int\000" |
| 65284 | /* 239660 */ "VMAXSSZrr_Int\000" |
| 65285 | /* 239674 */ "VUCOMXSSZrr_Int\000" |
| 65286 | /* 239690 */ "VCOMXSSZrr_Int\000" |
| 65287 | /* 239705 */ "VMINMAXSDrribkz_Int\000" |
| 65288 | /* 239725 */ "VMINMAXSHrribkz_Int\000" |
| 65289 | /* 239745 */ "VMINMAXSSrribkz_Int\000" |
| 65290 | /* 239765 */ "VRNDSCALESDZrribkz_Int\000" |
| 65291 | /* 239788 */ "VRNDSCALESHZrribkz_Int\000" |
| 65292 | /* 239811 */ "VRNDSCALESSZrribkz_Int\000" |
| 65293 | /* 239834 */ "VFMSUB231SDZrbkz_Int\000" |
| 65294 | /* 239855 */ "VFNMSUB231SDZrbkz_Int\000" |
| 65295 | /* 239877 */ "VFMADD231SDZrbkz_Int\000" |
| 65296 | /* 239898 */ "VFNMADD231SDZrbkz_Int\000" |
| 65297 | /* 239920 */ "VFMSUB132SDZrbkz_Int\000" |
| 65298 | /* 239941 */ "VFNMSUB132SDZrbkz_Int\000" |
| 65299 | /* 239963 */ "VFMADD132SDZrbkz_Int\000" |
| 65300 | /* 239984 */ "VFNMADD132SDZrbkz_Int\000" |
| 65301 | /* 240006 */ "VFMSUB213SDZrbkz_Int\000" |
| 65302 | /* 240027 */ "VFNMSUB213SDZrbkz_Int\000" |
| 65303 | /* 240049 */ "VFMADD213SDZrbkz_Int\000" |
| 65304 | /* 240070 */ "VFNMADD213SDZrbkz_Int\000" |
| 65305 | /* 240092 */ "VSQRTSDZrbkz_Int\000" |
| 65306 | /* 240109 */ "VFMSUB231SHZrbkz_Int\000" |
| 65307 | /* 240130 */ "VFNMSUB231SHZrbkz_Int\000" |
| 65308 | /* 240152 */ "VFMADD231SHZrbkz_Int\000" |
| 65309 | /* 240173 */ "VFNMADD231SHZrbkz_Int\000" |
| 65310 | /* 240195 */ "VFMSUB132SHZrbkz_Int\000" |
| 65311 | /* 240216 */ "VFNMSUB132SHZrbkz_Int\000" |
| 65312 | /* 240238 */ "VFMADD132SHZrbkz_Int\000" |
| 65313 | /* 240259 */ "VFNMADD132SHZrbkz_Int\000" |
| 65314 | /* 240281 */ "VFMSUB213SHZrbkz_Int\000" |
| 65315 | /* 240302 */ "VFNMSUB213SHZrbkz_Int\000" |
| 65316 | /* 240324 */ "VFMADD213SHZrbkz_Int\000" |
| 65317 | /* 240345 */ "VFNMADD213SHZrbkz_Int\000" |
| 65318 | /* 240367 */ "VSQRTSHZrbkz_Int\000" |
| 65319 | /* 240384 */ "VFMSUB231SSZrbkz_Int\000" |
| 65320 | /* 240405 */ "VFNMSUB231SSZrbkz_Int\000" |
| 65321 | /* 240427 */ "VFMADD231SSZrbkz_Int\000" |
| 65322 | /* 240448 */ "VFNMADD231SSZrbkz_Int\000" |
| 65323 | /* 240470 */ "VFMSUB132SSZrbkz_Int\000" |
| 65324 | /* 240491 */ "VFNMSUB132SSZrbkz_Int\000" |
| 65325 | /* 240513 */ "VFMADD132SSZrbkz_Int\000" |
| 65326 | /* 240534 */ "VFNMADD132SSZrbkz_Int\000" |
| 65327 | /* 240556 */ "VFMSUB213SSZrbkz_Int\000" |
| 65328 | /* 240577 */ "VFNMSUB213SSZrbkz_Int\000" |
| 65329 | /* 240599 */ "VFMADD213SSZrbkz_Int\000" |
| 65330 | /* 240620 */ "VFNMADD213SSZrbkz_Int\000" |
| 65331 | /* 240642 */ "VSQRTSSZrbkz_Int\000" |
| 65332 | /* 240659 */ "VCVTSH2SDZrrbkz_Int\000" |
| 65333 | /* 240679 */ "VCVTSS2SDZrrbkz_Int\000" |
| 65334 | /* 240699 */ "VSUBSDZrrbkz_Int\000" |
| 65335 | /* 240716 */ "VADDSDZrrbkz_Int\000" |
| 65336 | /* 240733 */ "VSCALEFSDZrrbkz_Int\000" |
| 65337 | /* 240753 */ "VMULSDZrrbkz_Int\000" |
| 65338 | /* 240770 */ "VMINSDZrrbkz_Int\000" |
| 65339 | /* 240787 */ "VDIVSDZrrbkz_Int\000" |
| 65340 | /* 240804 */ "VMAXSDZrrbkz_Int\000" |
| 65341 | /* 240821 */ "VCVTSD2SHZrrbkz_Int\000" |
| 65342 | /* 240841 */ "VCVTSS2SHZrrbkz_Int\000" |
| 65343 | /* 240861 */ "VSUBSHZrrbkz_Int\000" |
| 65344 | /* 240878 */ "VADDSHZrrbkz_Int\000" |
| 65345 | /* 240895 */ "VSCALEFSHZrrbkz_Int\000" |
| 65346 | /* 240915 */ "VMULSHZrrbkz_Int\000" |
| 65347 | /* 240932 */ "VMINSHZrrbkz_Int\000" |
| 65348 | /* 240949 */ "VDIVSHZrrbkz_Int\000" |
| 65349 | /* 240966 */ "VMAXSHZrrbkz_Int\000" |
| 65350 | /* 240983 */ "VCVTSD2SSZrrbkz_Int\000" |
| 65351 | /* 241003 */ "VCVTSH2SSZrrbkz_Int\000" |
| 65352 | /* 241023 */ "VSUBSSZrrbkz_Int\000" |
| 65353 | /* 241040 */ "VADDSSZrrbkz_Int\000" |
| 65354 | /* 241057 */ "VSCALEFSSZrrbkz_Int\000" |
| 65355 | /* 241077 */ "VMULSSZrrbkz_Int\000" |
| 65356 | /* 241094 */ "VMINSSZrrbkz_Int\000" |
| 65357 | /* 241111 */ "VDIVSSZrrbkz_Int\000" |
| 65358 | /* 241128 */ "VMAXSSZrrbkz_Int\000" |
| 65359 | /* 241145 */ "VMINMAXSDrmikz_Int\000" |
| 65360 | /* 241164 */ "VMINMAXSHrmikz_Int\000" |
| 65361 | /* 241183 */ "VMINMAXSSrmikz_Int\000" |
| 65362 | /* 241202 */ "VRNDSCALESDZrmikz_Int\000" |
| 65363 | /* 241224 */ "VRNDSCALESHZrmikz_Int\000" |
| 65364 | /* 241246 */ "VRNDSCALESSZrmikz_Int\000" |
| 65365 | /* 241268 */ "VMINMAXSDrrikz_Int\000" |
| 65366 | /* 241287 */ "VMINMAXSHrrikz_Int\000" |
| 65367 | /* 241306 */ "VMINMAXSSrrikz_Int\000" |
| 65368 | /* 241325 */ "VRNDSCALESDZrrikz_Int\000" |
| 65369 | /* 241347 */ "VRNDSCALESHZrrikz_Int\000" |
| 65370 | /* 241369 */ "VRNDSCALESSZrrikz_Int\000" |
| 65371 | /* 241391 */ "VFMSUB231SDZmkz_Int\000" |
| 65372 | /* 241411 */ "VFNMSUB231SDZmkz_Int\000" |
| 65373 | /* 241432 */ "VFMADD231SDZmkz_Int\000" |
| 65374 | /* 241452 */ "VFNMADD231SDZmkz_Int\000" |
| 65375 | /* 241473 */ "VFMSUB132SDZmkz_Int\000" |
| 65376 | /* 241493 */ "VFNMSUB132SDZmkz_Int\000" |
| 65377 | /* 241514 */ "VFMADD132SDZmkz_Int\000" |
| 65378 | /* 241534 */ "VFNMADD132SDZmkz_Int\000" |
| 65379 | /* 241555 */ "VFMSUB213SDZmkz_Int\000" |
| 65380 | /* 241575 */ "VFNMSUB213SDZmkz_Int\000" |
| 65381 | /* 241596 */ "VFMADD213SDZmkz_Int\000" |
| 65382 | /* 241616 */ "VFNMADD213SDZmkz_Int\000" |
| 65383 | /* 241637 */ "VSQRTSDZmkz_Int\000" |
| 65384 | /* 241653 */ "VFMSUB231SHZmkz_Int\000" |
| 65385 | /* 241673 */ "VFNMSUB231SHZmkz_Int\000" |
| 65386 | /* 241694 */ "VFMADD231SHZmkz_Int\000" |
| 65387 | /* 241714 */ "VFNMADD231SHZmkz_Int\000" |
| 65388 | /* 241735 */ "VFMSUB132SHZmkz_Int\000" |
| 65389 | /* 241755 */ "VFNMSUB132SHZmkz_Int\000" |
| 65390 | /* 241776 */ "VFMADD132SHZmkz_Int\000" |
| 65391 | /* 241796 */ "VFNMADD132SHZmkz_Int\000" |
| 65392 | /* 241817 */ "VFMSUB213SHZmkz_Int\000" |
| 65393 | /* 241837 */ "VFNMSUB213SHZmkz_Int\000" |
| 65394 | /* 241858 */ "VFMADD213SHZmkz_Int\000" |
| 65395 | /* 241878 */ "VFNMADD213SHZmkz_Int\000" |
| 65396 | /* 241899 */ "VSQRTSHZmkz_Int\000" |
| 65397 | /* 241915 */ "VFMSUB231SSZmkz_Int\000" |
| 65398 | /* 241935 */ "VFNMSUB231SSZmkz_Int\000" |
| 65399 | /* 241956 */ "VFMADD231SSZmkz_Int\000" |
| 65400 | /* 241976 */ "VFNMADD231SSZmkz_Int\000" |
| 65401 | /* 241997 */ "VFMSUB132SSZmkz_Int\000" |
| 65402 | /* 242017 */ "VFNMSUB132SSZmkz_Int\000" |
| 65403 | /* 242038 */ "VFMADD132SSZmkz_Int\000" |
| 65404 | /* 242058 */ "VFNMADD132SSZmkz_Int\000" |
| 65405 | /* 242079 */ "VFMSUB213SSZmkz_Int\000" |
| 65406 | /* 242099 */ "VFNMSUB213SSZmkz_Int\000" |
| 65407 | /* 242120 */ "VFMADD213SSZmkz_Int\000" |
| 65408 | /* 242140 */ "VFNMADD213SSZmkz_Int\000" |
| 65409 | /* 242161 */ "VSQRTSSZmkz_Int\000" |
| 65410 | /* 242177 */ "VCVTSH2SDZrmkz_Int\000" |
| 65411 | /* 242196 */ "VCVTSS2SDZrmkz_Int\000" |
| 65412 | /* 242215 */ "VSUBSDZrmkz_Int\000" |
| 65413 | /* 242231 */ "VADDSDZrmkz_Int\000" |
| 65414 | /* 242247 */ "VMULSDZrmkz_Int\000" |
| 65415 | /* 242263 */ "VMINSDZrmkz_Int\000" |
| 65416 | /* 242279 */ "VDIVSDZrmkz_Int\000" |
| 65417 | /* 242295 */ "VMAXSDZrmkz_Int\000" |
| 65418 | /* 242311 */ "VCVTSD2SHZrmkz_Int\000" |
| 65419 | /* 242330 */ "VCVTSS2SHZrmkz_Int\000" |
| 65420 | /* 242349 */ "VSUBSHZrmkz_Int\000" |
| 65421 | /* 242365 */ "VADDSHZrmkz_Int\000" |
| 65422 | /* 242381 */ "VMULSHZrmkz_Int\000" |
| 65423 | /* 242397 */ "VMINSHZrmkz_Int\000" |
| 65424 | /* 242413 */ "VDIVSHZrmkz_Int\000" |
| 65425 | /* 242429 */ "VMAXSHZrmkz_Int\000" |
| 65426 | /* 242445 */ "VCVTSD2SSZrmkz_Int\000" |
| 65427 | /* 242464 */ "VCVTSH2SSZrmkz_Int\000" |
| 65428 | /* 242483 */ "VSUBSSZrmkz_Int\000" |
| 65429 | /* 242499 */ "VADDSSZrmkz_Int\000" |
| 65430 | /* 242515 */ "VMULSSZrmkz_Int\000" |
| 65431 | /* 242531 */ "VMINSSZrmkz_Int\000" |
| 65432 | /* 242547 */ "VDIVSSZrmkz_Int\000" |
| 65433 | /* 242563 */ "VMAXSSZrmkz_Int\000" |
| 65434 | /* 242579 */ "VFMSUB231SDZrkz_Int\000" |
| 65435 | /* 242599 */ "VFNMSUB231SDZrkz_Int\000" |
| 65436 | /* 242620 */ "VFMADD231SDZrkz_Int\000" |
| 65437 | /* 242640 */ "VFNMADD231SDZrkz_Int\000" |
| 65438 | /* 242661 */ "VFMSUB132SDZrkz_Int\000" |
| 65439 | /* 242681 */ "VFNMSUB132SDZrkz_Int\000" |
| 65440 | /* 242702 */ "VFMADD132SDZrkz_Int\000" |
| 65441 | /* 242722 */ "VFNMADD132SDZrkz_Int\000" |
| 65442 | /* 242743 */ "VFMSUB213SDZrkz_Int\000" |
| 65443 | /* 242763 */ "VFNMSUB213SDZrkz_Int\000" |
| 65444 | /* 242784 */ "VFMADD213SDZrkz_Int\000" |
| 65445 | /* 242804 */ "VFNMADD213SDZrkz_Int\000" |
| 65446 | /* 242825 */ "VSQRTSDZrkz_Int\000" |
| 65447 | /* 242841 */ "VFMSUB231SHZrkz_Int\000" |
| 65448 | /* 242861 */ "VFNMSUB231SHZrkz_Int\000" |
| 65449 | /* 242882 */ "VFMADD231SHZrkz_Int\000" |
| 65450 | /* 242902 */ "VFNMADD231SHZrkz_Int\000" |
| 65451 | /* 242923 */ "VFMSUB132SHZrkz_Int\000" |
| 65452 | /* 242943 */ "VFNMSUB132SHZrkz_Int\000" |
| 65453 | /* 242964 */ "VFMADD132SHZrkz_Int\000" |
| 65454 | /* 242984 */ "VFNMADD132SHZrkz_Int\000" |
| 65455 | /* 243005 */ "VFMSUB213SHZrkz_Int\000" |
| 65456 | /* 243025 */ "VFNMSUB213SHZrkz_Int\000" |
| 65457 | /* 243046 */ "VFMADD213SHZrkz_Int\000" |
| 65458 | /* 243066 */ "VFNMADD213SHZrkz_Int\000" |
| 65459 | /* 243087 */ "VSQRTSHZrkz_Int\000" |
| 65460 | /* 243103 */ "VFMSUB231SSZrkz_Int\000" |
| 65461 | /* 243123 */ "VFNMSUB231SSZrkz_Int\000" |
| 65462 | /* 243144 */ "VFMADD231SSZrkz_Int\000" |
| 65463 | /* 243164 */ "VFNMADD231SSZrkz_Int\000" |
| 65464 | /* 243185 */ "VFMSUB132SSZrkz_Int\000" |
| 65465 | /* 243205 */ "VFNMSUB132SSZrkz_Int\000" |
| 65466 | /* 243226 */ "VFMADD132SSZrkz_Int\000" |
| 65467 | /* 243246 */ "VFNMADD132SSZrkz_Int\000" |
| 65468 | /* 243267 */ "VFMSUB213SSZrkz_Int\000" |
| 65469 | /* 243287 */ "VFNMSUB213SSZrkz_Int\000" |
| 65470 | /* 243308 */ "VFMADD213SSZrkz_Int\000" |
| 65471 | /* 243328 */ "VFNMADD213SSZrkz_Int\000" |
| 65472 | /* 243349 */ "VSQRTSSZrkz_Int\000" |
| 65473 | /* 243365 */ "VCVTSH2SDZrrkz_Int\000" |
| 65474 | /* 243384 */ "VCVTSS2SDZrrkz_Int\000" |
| 65475 | /* 243403 */ "VSUBSDZrrkz_Int\000" |
| 65476 | /* 243419 */ "VADDSDZrrkz_Int\000" |
| 65477 | /* 243435 */ "VMULSDZrrkz_Int\000" |
| 65478 | /* 243451 */ "VMINSDZrrkz_Int\000" |
| 65479 | /* 243467 */ "VDIVSDZrrkz_Int\000" |
| 65480 | /* 243483 */ "VMAXSDZrrkz_Int\000" |
| 65481 | /* 243499 */ "VCVTSD2SHZrrkz_Int\000" |
| 65482 | /* 243518 */ "VCVTSS2SHZrrkz_Int\000" |
| 65483 | /* 243537 */ "VSUBSHZrrkz_Int\000" |
| 65484 | /* 243553 */ "VADDSHZrrkz_Int\000" |
| 65485 | /* 243569 */ "VMULSHZrrkz_Int\000" |
| 65486 | /* 243585 */ "VMINSHZrrkz_Int\000" |
| 65487 | /* 243601 */ "VDIVSHZrrkz_Int\000" |
| 65488 | /* 243617 */ "VMAXSHZrrkz_Int\000" |
| 65489 | /* 243633 */ "VCVTSD2SSZrrkz_Int\000" |
| 65490 | /* 243652 */ "VCVTSH2SSZrrkz_Int\000" |
| 65491 | /* 243671 */ "VSUBSSZrrkz_Int\000" |
| 65492 | /* 243687 */ "VADDSSZrrkz_Int\000" |
| 65493 | /* 243703 */ "VMULSSZrrkz_Int\000" |
| 65494 | /* 243719 */ "VMINSSZrrkz_Int\000" |
| 65495 | /* 243735 */ "VDIVSSZrrkz_Int\000" |
| 65496 | /* 243751 */ "VMAXSSZrrkz_Int\000" |
| 65497 | /* 243767 */ "SEH_UnwindV2Start\000" |
| 65498 | /* 243785 */ "VREDUCEPDZrribkz\000" |
| 65499 | /* 243802 */ "VRANGEPDZrribkz\000" |
| 65500 | /* 243818 */ "VRNDSCALEPDZrribkz\000" |
| 65501 | /* 243837 */ "VFIXUPIMMPDZrribkz\000" |
| 65502 | /* 243856 */ "VGETMANTPDZrribkz\000" |
| 65503 | /* 243874 */ "VMINMAXPDZrribkz\000" |
| 65504 | /* 243891 */ "VREDUCESDZrribkz\000" |
| 65505 | /* 243908 */ "VRANGESDZrribkz\000" |
| 65506 | /* 243924 */ "VFIXUPIMMSDZrribkz\000" |
| 65507 | /* 243943 */ "VGETMANTSDZrribkz\000" |
| 65508 | /* 243961 */ "VREDUCEPHZrribkz\000" |
| 65509 | /* 243978 */ "VRNDSCALEPHZrribkz\000" |
| 65510 | /* 243997 */ "VGETMANTPHZrribkz\000" |
| 65511 | /* 244015 */ "VMINMAXPHZrribkz\000" |
| 65512 | /* 244032 */ "VREDUCESHZrribkz\000" |
| 65513 | /* 244049 */ "VGETMANTSHZrribkz\000" |
| 65514 | /* 244067 */ "VREDUCEPSZrribkz\000" |
| 65515 | /* 244084 */ "VRANGEPSZrribkz\000" |
| 65516 | /* 244100 */ "VRNDSCALEPSZrribkz\000" |
| 65517 | /* 244119 */ "VFIXUPIMMPSZrribkz\000" |
| 65518 | /* 244138 */ "VGETMANTPSZrribkz\000" |
| 65519 | /* 244156 */ "VMINMAXPSZrribkz\000" |
| 65520 | /* 244173 */ "VREDUCESSZrribkz\000" |
| 65521 | /* 244190 */ "VRANGESSZrribkz\000" |
| 65522 | /* 244206 */ "VFIXUPIMMSSZrribkz\000" |
| 65523 | /* 244225 */ "VGETMANTSSZrribkz\000" |
| 65524 | /* 244243 */ "VFMSUB231BF16Z256mbkz\000" |
| 65525 | /* 244265 */ "VFNMSUB231BF16Z256mbkz\000" |
| 65526 | /* 244288 */ "VFMADD231BF16Z256mbkz\000" |
| 65527 | /* 244310 */ "VFNMADD231BF16Z256mbkz\000" |
| 65528 | /* 244333 */ "VFMSUB132BF16Z256mbkz\000" |
| 65529 | /* 244355 */ "VFNMSUB132BF16Z256mbkz\000" |
| 65530 | /* 244378 */ "VFMADD132BF16Z256mbkz\000" |
| 65531 | /* 244400 */ "VFNMADD132BF16Z256mbkz\000" |
| 65532 | /* 244423 */ "VFMSUB213BF16Z256mbkz\000" |
| 65533 | /* 244445 */ "VFNMSUB213BF16Z256mbkz\000" |
| 65534 | /* 244468 */ "VFMADD213BF16Z256mbkz\000" |
| 65535 | /* 244490 */ "VFNMADD213BF16Z256mbkz\000" |
| 65536 | /* 244513 */ "VRCPBF16Z256mbkz\000" |
| 65537 | /* 244530 */ "VGETEXPBF16Z256mbkz\000" |
| 65538 | /* 244550 */ "VRSQRTBF16Z256mbkz\000" |
| 65539 | /* 244569 */ "VSQRTBF16Z256mbkz\000" |
| 65540 | /* 244587 */ "VFMADDSUB231PDZ256mbkz\000" |
| 65541 | /* 244610 */ "VFMSUB231PDZ256mbkz\000" |
| 65542 | /* 244630 */ "VFNMSUB231PDZ256mbkz\000" |
| 65543 | /* 244651 */ "VFMSUBADD231PDZ256mbkz\000" |
| 65544 | /* 244674 */ "VFMADD231PDZ256mbkz\000" |
| 65545 | /* 244694 */ "VFNMADD231PDZ256mbkz\000" |
| 65546 | /* 244715 */ "VFMADDSUB132PDZ256mbkz\000" |
| 65547 | /* 244738 */ "VFMSUB132PDZ256mbkz\000" |
| 65548 | /* 244758 */ "VFNMSUB132PDZ256mbkz\000" |
| 65549 | /* 244779 */ "VFMSUBADD132PDZ256mbkz\000" |
| 65550 | /* 244802 */ "VFMADD132PDZ256mbkz\000" |
| 65551 | /* 244822 */ "VFNMADD132PDZ256mbkz\000" |
| 65552 | /* 244843 */ "VFMADDSUB213PDZ256mbkz\000" |
| 65553 | /* 244866 */ "VFMSUB213PDZ256mbkz\000" |
| 65554 | /* 244886 */ "VFNMSUB213PDZ256mbkz\000" |
| 65555 | /* 244907 */ "VFMSUBADD213PDZ256mbkz\000" |
| 65556 | /* 244930 */ "VFMADD213PDZ256mbkz\000" |
| 65557 | /* 244950 */ "VFNMADD213PDZ256mbkz\000" |
| 65558 | /* 244971 */ "VRCP14PDZ256mbkz\000" |
| 65559 | /* 244988 */ "VRSQRT14PDZ256mbkz\000" |
| 65560 | /* 245007 */ "VGETEXPPDZ256mbkz\000" |
| 65561 | /* 245025 */ "VSQRTPDZ256mbkz\000" |
| 65562 | /* 245041 */ "VPDPBSSDZ256mbkz\000" |
| 65563 | /* 245058 */ "VPDPWSSDZ256mbkz\000" |
| 65564 | /* 245075 */ "VPDPBUSDZ256mbkz\000" |
| 65565 | /* 245092 */ "VPDPWUSDZ256mbkz\000" |
| 65566 | /* 245109 */ "VPDPBSUDZ256mbkz\000" |
| 65567 | /* 245126 */ "VPDPWSUDZ256mbkz\000" |
| 65568 | /* 245143 */ "VPDPBUUDZ256mbkz\000" |
| 65569 | /* 245160 */ "VPDPWUUDZ256mbkz\000" |
| 65570 | /* 245177 */ "VPSHLDVDZ256mbkz\000" |
| 65571 | /* 245194 */ "VPSHRDVDZ256mbkz\000" |
| 65572 | /* 245211 */ "VFMADDSUB231PHZ256mbkz\000" |
| 65573 | /* 245234 */ "VFMSUB231PHZ256mbkz\000" |
| 65574 | /* 245254 */ "VFNMSUB231PHZ256mbkz\000" |
| 65575 | /* 245275 */ "VFMSUBADD231PHZ256mbkz\000" |
| 65576 | /* 245298 */ "VFMADD231PHZ256mbkz\000" |
| 65577 | /* 245318 */ "VFNMADD231PHZ256mbkz\000" |
| 65578 | /* 245339 */ "VFMADDSUB132PHZ256mbkz\000" |
| 65579 | /* 245362 */ "VFMSUB132PHZ256mbkz\000" |
| 65580 | /* 245382 */ "VFNMSUB132PHZ256mbkz\000" |
| 65581 | /* 245403 */ "VFMSUBADD132PHZ256mbkz\000" |
| 65582 | /* 245426 */ "VFMADD132PHZ256mbkz\000" |
| 65583 | /* 245446 */ "VFNMADD132PHZ256mbkz\000" |
| 65584 | /* 245467 */ "VFMADDSUB213PHZ256mbkz\000" |
| 65585 | /* 245490 */ "VFMSUB213PHZ256mbkz\000" |
| 65586 | /* 245510 */ "VFNMSUB213PHZ256mbkz\000" |
| 65587 | /* 245531 */ "VFMSUBADD213PHZ256mbkz\000" |
| 65588 | /* 245554 */ "VFMADD213PHZ256mbkz\000" |
| 65589 | /* 245574 */ "VFNMADD213PHZ256mbkz\000" |
| 65590 | /* 245595 */ "VFCMADDCPHZ256mbkz\000" |
| 65591 | /* 245614 */ "VFMADDCPHZ256mbkz\000" |
| 65592 | /* 245632 */ "VRCPPHZ256mbkz\000" |
| 65593 | /* 245647 */ "VGETEXPPHZ256mbkz\000" |
| 65594 | /* 245665 */ "VRSQRTPHZ256mbkz\000" |
| 65595 | /* 245682 */ "VSQRTPHZ256mbkz\000" |
| 65596 | /* 245698 */ "VPMADD52HUQZ256mbkz\000" |
| 65597 | /* 245718 */ "VPMADD52LUQZ256mbkz\000" |
| 65598 | /* 245738 */ "VPSHLDVQZ256mbkz\000" |
| 65599 | /* 245755 */ "VPSHRDVQZ256mbkz\000" |
| 65600 | /* 245772 */ "VPDPBSSDSZ256mbkz\000" |
| 65601 | /* 245790 */ "VPDPWSSDSZ256mbkz\000" |
| 65602 | /* 245808 */ "VPDPBUSDSZ256mbkz\000" |
| 65603 | /* 245826 */ "VPDPWUSDSZ256mbkz\000" |
| 65604 | /* 245844 */ "VPDPBSUDSZ256mbkz\000" |
| 65605 | /* 245862 */ "VPDPWSUDSZ256mbkz\000" |
| 65606 | /* 245880 */ "VPDPBUUDSZ256mbkz\000" |
| 65607 | /* 245898 */ "VPDPWUUDSZ256mbkz\000" |
| 65608 | /* 245916 */ "VFMADDSUB231PSZ256mbkz\000" |
| 65609 | /* 245939 */ "VFMSUB231PSZ256mbkz\000" |
| 65610 | /* 245959 */ "VFNMSUB231PSZ256mbkz\000" |
| 65611 | /* 245980 */ "VFMSUBADD231PSZ256mbkz\000" |
| 65612 | /* 246003 */ "VFMADD231PSZ256mbkz\000" |
| 65613 | /* 246023 */ "VFNMADD231PSZ256mbkz\000" |
| 65614 | /* 246044 */ "VFMADDSUB132PSZ256mbkz\000" |
| 65615 | /* 246067 */ "VFMSUB132PSZ256mbkz\000" |
| 65616 | /* 246087 */ "VFNMSUB132PSZ256mbkz\000" |
| 65617 | /* 246108 */ "VFMSUBADD132PSZ256mbkz\000" |
| 65618 | /* 246131 */ "VFMADD132PSZ256mbkz\000" |
| 65619 | /* 246151 */ "VFNMADD132PSZ256mbkz\000" |
| 65620 | /* 246172 */ "VFMADDSUB213PSZ256mbkz\000" |
| 65621 | /* 246195 */ "VFMSUB213PSZ256mbkz\000" |
| 65622 | /* 246215 */ "VFNMSUB213PSZ256mbkz\000" |
| 65623 | /* 246236 */ "VFMSUBADD213PSZ256mbkz\000" |
| 65624 | /* 246259 */ "VFMADD213PSZ256mbkz\000" |
| 65625 | /* 246279 */ "VFNMADD213PSZ256mbkz\000" |
| 65626 | /* 246300 */ "VRCP14PSZ256mbkz\000" |
| 65627 | /* 246317 */ "VRSQRT14PSZ256mbkz\000" |
| 65628 | /* 246336 */ "VDPBF16PSZ256mbkz\000" |
| 65629 | /* 246354 */ "VDPPHPSZ256mbkz\000" |
| 65630 | /* 246370 */ "VGETEXPPSZ256mbkz\000" |
| 65631 | /* 246388 */ "VSQRTPSZ256mbkz\000" |
| 65632 | /* 246404 */ "VFMSUB231BF16Z128mbkz\000" |
| 65633 | /* 246426 */ "VFNMSUB231BF16Z128mbkz\000" |
| 65634 | /* 246449 */ "VFMADD231BF16Z128mbkz\000" |
| 65635 | /* 246471 */ "VFNMADD231BF16Z128mbkz\000" |
| 65636 | /* 246494 */ "VFMSUB132BF16Z128mbkz\000" |
| 65637 | /* 246516 */ "VFNMSUB132BF16Z128mbkz\000" |
| 65638 | /* 246539 */ "VFMADD132BF16Z128mbkz\000" |
| 65639 | /* 246561 */ "VFNMADD132BF16Z128mbkz\000" |
| 65640 | /* 246584 */ "VFMSUB213BF16Z128mbkz\000" |
| 65641 | /* 246606 */ "VFNMSUB213BF16Z128mbkz\000" |
| 65642 | /* 246629 */ "VFMADD213BF16Z128mbkz\000" |
| 65643 | /* 246651 */ "VFNMADD213BF16Z128mbkz\000" |
| 65644 | /* 246674 */ "VRCPBF16Z128mbkz\000" |
| 65645 | /* 246691 */ "VGETEXPBF16Z128mbkz\000" |
| 65646 | /* 246711 */ "VRSQRTBF16Z128mbkz\000" |
| 65647 | /* 246730 */ "VSQRTBF16Z128mbkz\000" |
| 65648 | /* 246748 */ "VFMADDSUB231PDZ128mbkz\000" |
| 65649 | /* 246771 */ "VFMSUB231PDZ128mbkz\000" |
| 65650 | /* 246791 */ "VFNMSUB231PDZ128mbkz\000" |
| 65651 | /* 246812 */ "VFMSUBADD231PDZ128mbkz\000" |
| 65652 | /* 246835 */ "VFMADD231PDZ128mbkz\000" |
| 65653 | /* 246855 */ "VFNMADD231PDZ128mbkz\000" |
| 65654 | /* 246876 */ "VFMADDSUB132PDZ128mbkz\000" |
| 65655 | /* 246899 */ "VFMSUB132PDZ128mbkz\000" |
| 65656 | /* 246919 */ "VFNMSUB132PDZ128mbkz\000" |
| 65657 | /* 246940 */ "VFMSUBADD132PDZ128mbkz\000" |
| 65658 | /* 246963 */ "VFMADD132PDZ128mbkz\000" |
| 65659 | /* 246983 */ "VFNMADD132PDZ128mbkz\000" |
| 65660 | /* 247004 */ "VFMADDSUB213PDZ128mbkz\000" |
| 65661 | /* 247027 */ "VFMSUB213PDZ128mbkz\000" |
| 65662 | /* 247047 */ "VFNMSUB213PDZ128mbkz\000" |
| 65663 | /* 247068 */ "VFMSUBADD213PDZ128mbkz\000" |
| 65664 | /* 247091 */ "VFMADD213PDZ128mbkz\000" |
| 65665 | /* 247111 */ "VFNMADD213PDZ128mbkz\000" |
| 65666 | /* 247132 */ "VRCP14PDZ128mbkz\000" |
| 65667 | /* 247149 */ "VRSQRT14PDZ128mbkz\000" |
| 65668 | /* 247168 */ "VGETEXPPDZ128mbkz\000" |
| 65669 | /* 247186 */ "VSQRTPDZ128mbkz\000" |
| 65670 | /* 247202 */ "VPDPBSSDZ128mbkz\000" |
| 65671 | /* 247219 */ "VPDPWSSDZ128mbkz\000" |
| 65672 | /* 247236 */ "VPDPBUSDZ128mbkz\000" |
| 65673 | /* 247253 */ "VPDPWUSDZ128mbkz\000" |
| 65674 | /* 247270 */ "VPDPBSUDZ128mbkz\000" |
| 65675 | /* 247287 */ "VPDPWSUDZ128mbkz\000" |
| 65676 | /* 247304 */ "VPDPBUUDZ128mbkz\000" |
| 65677 | /* 247321 */ "VPDPWUUDZ128mbkz\000" |
| 65678 | /* 247338 */ "VPSHLDVDZ128mbkz\000" |
| 65679 | /* 247355 */ "VPSHRDVDZ128mbkz\000" |
| 65680 | /* 247372 */ "VFMADDSUB231PHZ128mbkz\000" |
| 65681 | /* 247395 */ "VFMSUB231PHZ128mbkz\000" |
| 65682 | /* 247415 */ "VFNMSUB231PHZ128mbkz\000" |
| 65683 | /* 247436 */ "VFMSUBADD231PHZ128mbkz\000" |
| 65684 | /* 247459 */ "VFMADD231PHZ128mbkz\000" |
| 65685 | /* 247479 */ "VFNMADD231PHZ128mbkz\000" |
| 65686 | /* 247500 */ "VFMADDSUB132PHZ128mbkz\000" |
| 65687 | /* 247523 */ "VFMSUB132PHZ128mbkz\000" |
| 65688 | /* 247543 */ "VFNMSUB132PHZ128mbkz\000" |
| 65689 | /* 247564 */ "VFMSUBADD132PHZ128mbkz\000" |
| 65690 | /* 247587 */ "VFMADD132PHZ128mbkz\000" |
| 65691 | /* 247607 */ "VFNMADD132PHZ128mbkz\000" |
| 65692 | /* 247628 */ "VFMADDSUB213PHZ128mbkz\000" |
| 65693 | /* 247651 */ "VFMSUB213PHZ128mbkz\000" |
| 65694 | /* 247671 */ "VFNMSUB213PHZ128mbkz\000" |
| 65695 | /* 247692 */ "VFMSUBADD213PHZ128mbkz\000" |
| 65696 | /* 247715 */ "VFMADD213PHZ128mbkz\000" |
| 65697 | /* 247735 */ "VFNMADD213PHZ128mbkz\000" |
| 65698 | /* 247756 */ "VFCMADDCPHZ128mbkz\000" |
| 65699 | /* 247775 */ "VFMADDCPHZ128mbkz\000" |
| 65700 | /* 247793 */ "VRCPPHZ128mbkz\000" |
| 65701 | /* 247808 */ "VGETEXPPHZ128mbkz\000" |
| 65702 | /* 247826 */ "VRSQRTPHZ128mbkz\000" |
| 65703 | /* 247843 */ "VSQRTPHZ128mbkz\000" |
| 65704 | /* 247859 */ "VPMADD52HUQZ128mbkz\000" |
| 65705 | /* 247879 */ "VPMADD52LUQZ128mbkz\000" |
| 65706 | /* 247899 */ "VPSHLDVQZ128mbkz\000" |
| 65707 | /* 247916 */ "VPSHRDVQZ128mbkz\000" |
| 65708 | /* 247933 */ "VPDPBSSDSZ128mbkz\000" |
| 65709 | /* 247951 */ "VPDPWSSDSZ128mbkz\000" |
| 65710 | /* 247969 */ "VPDPBUSDSZ128mbkz\000" |
| 65711 | /* 247987 */ "VPDPWUSDSZ128mbkz\000" |
| 65712 | /* 248005 */ "VPDPBSUDSZ128mbkz\000" |
| 65713 | /* 248023 */ "VPDPWSUDSZ128mbkz\000" |
| 65714 | /* 248041 */ "VPDPBUUDSZ128mbkz\000" |
| 65715 | /* 248059 */ "VPDPWUUDSZ128mbkz\000" |
| 65716 | /* 248077 */ "VFMADDSUB231PSZ128mbkz\000" |
| 65717 | /* 248100 */ "VFMSUB231PSZ128mbkz\000" |
| 65718 | /* 248120 */ "VFNMSUB231PSZ128mbkz\000" |
| 65719 | /* 248141 */ "VFMSUBADD231PSZ128mbkz\000" |
| 65720 | /* 248164 */ "VFMADD231PSZ128mbkz\000" |
| 65721 | /* 248184 */ "VFNMADD231PSZ128mbkz\000" |
| 65722 | /* 248205 */ "VFMADDSUB132PSZ128mbkz\000" |
| 65723 | /* 248228 */ "VFMSUB132PSZ128mbkz\000" |
| 65724 | /* 248248 */ "VFNMSUB132PSZ128mbkz\000" |
| 65725 | /* 248269 */ "VFMSUBADD132PSZ128mbkz\000" |
| 65726 | /* 248292 */ "VFMADD132PSZ128mbkz\000" |
| 65727 | /* 248312 */ "VFNMADD132PSZ128mbkz\000" |
| 65728 | /* 248333 */ "VFMADDSUB213PSZ128mbkz\000" |
| 65729 | /* 248356 */ "VFMSUB213PSZ128mbkz\000" |
| 65730 | /* 248376 */ "VFNMSUB213PSZ128mbkz\000" |
| 65731 | /* 248397 */ "VFMSUBADD213PSZ128mbkz\000" |
| 65732 | /* 248420 */ "VFMADD213PSZ128mbkz\000" |
| 65733 | /* 248440 */ "VFNMADD213PSZ128mbkz\000" |
| 65734 | /* 248461 */ "VRCP14PSZ128mbkz\000" |
| 65735 | /* 248478 */ "VRSQRT14PSZ128mbkz\000" |
| 65736 | /* 248497 */ "VDPBF16PSZ128mbkz\000" |
| 65737 | /* 248515 */ "VDPPHPSZ128mbkz\000" |
| 65738 | /* 248531 */ "VGETEXPPSZ128mbkz\000" |
| 65739 | /* 248549 */ "VSQRTPSZ128mbkz\000" |
| 65740 | /* 248565 */ "VFMSUB231BF16Zmbkz\000" |
| 65741 | /* 248584 */ "VFNMSUB231BF16Zmbkz\000" |
| 65742 | /* 248604 */ "VFMADD231BF16Zmbkz\000" |
| 65743 | /* 248623 */ "VFNMADD231BF16Zmbkz\000" |
| 65744 | /* 248643 */ "VFMSUB132BF16Zmbkz\000" |
| 65745 | /* 248662 */ "VFNMSUB132BF16Zmbkz\000" |
| 65746 | /* 248682 */ "VFMADD132BF16Zmbkz\000" |
| 65747 | /* 248701 */ "VFNMADD132BF16Zmbkz\000" |
| 65748 | /* 248721 */ "VFMSUB213BF16Zmbkz\000" |
| 65749 | /* 248740 */ "VFNMSUB213BF16Zmbkz\000" |
| 65750 | /* 248760 */ "VFMADD213BF16Zmbkz\000" |
| 65751 | /* 248779 */ "VFNMADD213BF16Zmbkz\000" |
| 65752 | /* 248799 */ "VRCPBF16Zmbkz\000" |
| 65753 | /* 248813 */ "VGETEXPBF16Zmbkz\000" |
| 65754 | /* 248830 */ "VRSQRTBF16Zmbkz\000" |
| 65755 | /* 248846 */ "VSQRTBF16Zmbkz\000" |
| 65756 | /* 248861 */ "VFMADDSUB231PDZmbkz\000" |
| 65757 | /* 248881 */ "VFMSUB231PDZmbkz\000" |
| 65758 | /* 248898 */ "VFNMSUB231PDZmbkz\000" |
| 65759 | /* 248916 */ "VFMSUBADD231PDZmbkz\000" |
| 65760 | /* 248936 */ "VFMADD231PDZmbkz\000" |
| 65761 | /* 248953 */ "VFNMADD231PDZmbkz\000" |
| 65762 | /* 248971 */ "VFMADDSUB132PDZmbkz\000" |
| 65763 | /* 248991 */ "VFMSUB132PDZmbkz\000" |
| 65764 | /* 249008 */ "VFNMSUB132PDZmbkz\000" |
| 65765 | /* 249026 */ "VFMSUBADD132PDZmbkz\000" |
| 65766 | /* 249046 */ "VFMADD132PDZmbkz\000" |
| 65767 | /* 249063 */ "VFNMADD132PDZmbkz\000" |
| 65768 | /* 249081 */ "VEXP2PDZmbkz\000" |
| 65769 | /* 249094 */ "VFMADDSUB213PDZmbkz\000" |
| 65770 | /* 249114 */ "VFMSUB213PDZmbkz\000" |
| 65771 | /* 249131 */ "VFNMSUB213PDZmbkz\000" |
| 65772 | /* 249149 */ "VFMSUBADD213PDZmbkz\000" |
| 65773 | /* 249169 */ "VFMADD213PDZmbkz\000" |
| 65774 | /* 249186 */ "VFNMADD213PDZmbkz\000" |
| 65775 | /* 249204 */ "VRCP14PDZmbkz\000" |
| 65776 | /* 249218 */ "VRSQRT14PDZmbkz\000" |
| 65777 | /* 249234 */ "VRCP28PDZmbkz\000" |
| 65778 | /* 249248 */ "VRSQRT28PDZmbkz\000" |
| 65779 | /* 249264 */ "VGETEXPPDZmbkz\000" |
| 65780 | /* 249279 */ "VSQRTPDZmbkz\000" |
| 65781 | /* 249292 */ "VPDPBSSDZmbkz\000" |
| 65782 | /* 249306 */ "VPDPWSSDZmbkz\000" |
| 65783 | /* 249320 */ "VPDPBUSDZmbkz\000" |
| 65784 | /* 249334 */ "VPDPWUSDZmbkz\000" |
| 65785 | /* 249348 */ "VPDPBSUDZmbkz\000" |
| 65786 | /* 249362 */ "VPDPWSUDZmbkz\000" |
| 65787 | /* 249376 */ "VPDPBUUDZmbkz\000" |
| 65788 | /* 249390 */ "VPDPWUUDZmbkz\000" |
| 65789 | /* 249404 */ "VPSHLDVDZmbkz\000" |
| 65790 | /* 249418 */ "VPSHRDVDZmbkz\000" |
| 65791 | /* 249432 */ "VFMADDSUB231PHZmbkz\000" |
| 65792 | /* 249452 */ "VFMSUB231PHZmbkz\000" |
| 65793 | /* 249469 */ "VFNMSUB231PHZmbkz\000" |
| 65794 | /* 249487 */ "VFMSUBADD231PHZmbkz\000" |
| 65795 | /* 249507 */ "VFMADD231PHZmbkz\000" |
| 65796 | /* 249524 */ "VFNMADD231PHZmbkz\000" |
| 65797 | /* 249542 */ "VFMADDSUB132PHZmbkz\000" |
| 65798 | /* 249562 */ "VFMSUB132PHZmbkz\000" |
| 65799 | /* 249579 */ "VFNMSUB132PHZmbkz\000" |
| 65800 | /* 249597 */ "VFMSUBADD132PHZmbkz\000" |
| 65801 | /* 249617 */ "VFMADD132PHZmbkz\000" |
| 65802 | /* 249634 */ "VFNMADD132PHZmbkz\000" |
| 65803 | /* 249652 */ "VFMADDSUB213PHZmbkz\000" |
| 65804 | /* 249672 */ "VFMSUB213PHZmbkz\000" |
| 65805 | /* 249689 */ "VFNMSUB213PHZmbkz\000" |
| 65806 | /* 249707 */ "VFMSUBADD213PHZmbkz\000" |
| 65807 | /* 249727 */ "VFMADD213PHZmbkz\000" |
| 65808 | /* 249744 */ "VFNMADD213PHZmbkz\000" |
| 65809 | /* 249762 */ "VFCMADDCPHZmbkz\000" |
| 65810 | /* 249778 */ "VFMADDCPHZmbkz\000" |
| 65811 | /* 249793 */ "VRCPPHZmbkz\000" |
| 65812 | /* 249805 */ "VGETEXPPHZmbkz\000" |
| 65813 | /* 249820 */ "VRSQRTPHZmbkz\000" |
| 65814 | /* 249834 */ "VSQRTPHZmbkz\000" |
| 65815 | /* 249847 */ "VPMADD52HUQZmbkz\000" |
| 65816 | /* 249864 */ "VPMADD52LUQZmbkz\000" |
| 65817 | /* 249881 */ "VPSHLDVQZmbkz\000" |
| 65818 | /* 249895 */ "VPSHRDVQZmbkz\000" |
| 65819 | /* 249909 */ "VPDPBSSDSZmbkz\000" |
| 65820 | /* 249924 */ "VPDPWSSDSZmbkz\000" |
| 65821 | /* 249939 */ "VPDPBUSDSZmbkz\000" |
| 65822 | /* 249954 */ "VPDPWUSDSZmbkz\000" |
| 65823 | /* 249969 */ "VPDPBSUDSZmbkz\000" |
| 65824 | /* 249984 */ "VPDPWSUDSZmbkz\000" |
| 65825 | /* 249999 */ "VPDPBUUDSZmbkz\000" |
| 65826 | /* 250014 */ "VPDPWUUDSZmbkz\000" |
| 65827 | /* 250029 */ "VFMADDSUB231PSZmbkz\000" |
| 65828 | /* 250049 */ "VFMSUB231PSZmbkz\000" |
| 65829 | /* 250066 */ "VFNMSUB231PSZmbkz\000" |
| 65830 | /* 250084 */ "VFMSUBADD231PSZmbkz\000" |
| 65831 | /* 250104 */ "VFMADD231PSZmbkz\000" |
| 65832 | /* 250121 */ "VFNMADD231PSZmbkz\000" |
| 65833 | /* 250139 */ "VFMADDSUB132PSZmbkz\000" |
| 65834 | /* 250159 */ "VFMSUB132PSZmbkz\000" |
| 65835 | /* 250176 */ "VFNMSUB132PSZmbkz\000" |
| 65836 | /* 250194 */ "VFMSUBADD132PSZmbkz\000" |
| 65837 | /* 250214 */ "VFMADD132PSZmbkz\000" |
| 65838 | /* 250231 */ "VFNMADD132PSZmbkz\000" |
| 65839 | /* 250249 */ "VEXP2PSZmbkz\000" |
| 65840 | /* 250262 */ "VFMADDSUB213PSZmbkz\000" |
| 65841 | /* 250282 */ "VFMSUB213PSZmbkz\000" |
| 65842 | /* 250299 */ "VFNMSUB213PSZmbkz\000" |
| 65843 | /* 250317 */ "VFMSUBADD213PSZmbkz\000" |
| 65844 | /* 250337 */ "VFMADD213PSZmbkz\000" |
| 65845 | /* 250354 */ "VFNMADD213PSZmbkz\000" |
| 65846 | /* 250372 */ "VRCP14PSZmbkz\000" |
| 65847 | /* 250386 */ "VRSQRT14PSZmbkz\000" |
| 65848 | /* 250402 */ "VDPBF16PSZmbkz\000" |
| 65849 | /* 250417 */ "VRCP28PSZmbkz\000" |
| 65850 | /* 250431 */ "VRSQRT28PSZmbkz\000" |
| 65851 | /* 250447 */ "VDPPHPSZmbkz\000" |
| 65852 | /* 250460 */ "VGETEXPPSZmbkz\000" |
| 65853 | /* 250475 */ "VSQRTPSZmbkz\000" |
| 65854 | /* 250488 */ "VCVTNE2PS2BF16Z256rmbkz\000" |
| 65855 | /* 250512 */ "VCVTNEPS2BF16Z256rmbkz\000" |
| 65856 | /* 250535 */ "VSUBBF16Z256rmbkz\000" |
| 65857 | /* 250553 */ "VADDBF16Z256rmbkz\000" |
| 65858 | /* 250571 */ "VSCALEFBF16Z256rmbkz\000" |
| 65859 | /* 250592 */ "VMULBF16Z256rmbkz\000" |
| 65860 | /* 250610 */ "VMINBF16Z256rmbkz\000" |
| 65861 | /* 250628 */ "VDIVBF16Z256rmbkz\000" |
| 65862 | /* 250646 */ "VMAXBF16Z256rmbkz\000" |
| 65863 | /* 250664 */ "VCVT2PH2BF8Z256rmbkz\000" |
| 65864 | /* 250685 */ "VCVTBIASPH2BF8Z256rmbkz\000" |
| 65865 | /* 250709 */ "VCVTPH2BF8Z256rmbkz\000" |
| 65866 | /* 250729 */ "VCVT2PH2HF8Z256rmbkz\000" |
| 65867 | /* 250750 */ "VCVTBIASPH2HF8Z256rmbkz\000" |
| 65868 | /* 250774 */ "VCVTPH2HF8Z256rmbkz\000" |
| 65869 | /* 250794 */ "VPMULTISHIFTQBZ256rmbkz\000" |
| 65870 | /* 250818 */ "VPERMI2DZ256rmbkz\000" |
| 65871 | /* 250836 */ "VPERMT2DZ256rmbkz\000" |
| 65872 | /* 250854 */ "VPSUBDZ256rmbkz\000" |
| 65873 | /* 250870 */ "VPADDDZ256rmbkz\000" |
| 65874 | /* 250886 */ "VPANDDZ256rmbkz\000" |
| 65875 | /* 250902 */ "VPMULLDZ256rmbkz\000" |
| 65876 | /* 250919 */ "VPBLENDMDZ256rmbkz\000" |
| 65877 | /* 250938 */ "VPERMDZ256rmbkz\000" |
| 65878 | /* 250954 */ "VPANDNDZ256rmbkz\000" |
| 65879 | /* 250971 */ "VCVTPH2PDZ256rmbkz\000" |
| 65880 | /* 250990 */ "VPERMI2PDZ256rmbkz\000" |
| 65881 | /* 251009 */ "VCVTDQ2PDZ256rmbkz\000" |
| 65882 | /* 251028 */ "VCVTUDQ2PDZ256rmbkz\000" |
| 65883 | /* 251048 */ "VCVTQQ2PDZ256rmbkz\000" |
| 65884 | /* 251067 */ "VCVTUQQ2PDZ256rmbkz\000" |
| 65885 | /* 251087 */ "VCVTPS2PDZ256rmbkz\000" |
| 65886 | /* 251106 */ "VPERMT2PDZ256rmbkz\000" |
| 65887 | /* 251125 */ "VSUBPDZ256rmbkz\000" |
| 65888 | /* 251141 */ "VMINCPDZ256rmbkz\000" |
| 65889 | /* 251158 */ "VMAXCPDZ256rmbkz\000" |
| 65890 | /* 251175 */ "VADDPDZ256rmbkz\000" |
| 65891 | /* 251191 */ "VANDPDZ256rmbkz\000" |
| 65892 | /* 251207 */ "VSCALEFPDZ256rmbkz\000" |
| 65893 | /* 251226 */ "VUNPCKHPDZ256rmbkz\000" |
| 65894 | /* 251245 */ "VPERMILPDZ256rmbkz\000" |
| 65895 | /* 251264 */ "VUNPCKLPDZ256rmbkz\000" |
| 65896 | /* 251283 */ "VMULPDZ256rmbkz\000" |
| 65897 | /* 251299 */ "VBLENDMPDZ256rmbkz\000" |
| 65898 | /* 251318 */ "VPERMPDZ256rmbkz\000" |
| 65899 | /* 251335 */ "VANDNPDZ256rmbkz\000" |
| 65900 | /* 251352 */ "VMINPDZ256rmbkz\000" |
| 65901 | /* 251368 */ "VORPDZ256rmbkz\000" |
| 65902 | /* 251383 */ "VXORPDZ256rmbkz\000" |
| 65903 | /* 251399 */ "VDIVPDZ256rmbkz\000" |
| 65904 | /* 251415 */ "VMAXPDZ256rmbkz\000" |
| 65905 | /* 251431 */ "VPORDZ256rmbkz\000" |
| 65906 | /* 251446 */ "VPXORDZ256rmbkz\000" |
| 65907 | /* 251462 */ "VPABSDZ256rmbkz\000" |
| 65908 | /* 251478 */ "VPMINSDZ256rmbkz\000" |
| 65909 | /* 251495 */ "VPMAXSDZ256rmbkz\000" |
| 65910 | /* 251512 */ "VPCONFLICTDZ256rmbkz\000" |
| 65911 | /* 251533 */ "VPOPCNTDZ256rmbkz\000" |
| 65912 | /* 251551 */ "VPLZCNTDZ256rmbkz\000" |
| 65913 | /* 251569 */ "VPMINUDZ256rmbkz\000" |
| 65914 | /* 251586 */ "VPMAXUDZ256rmbkz\000" |
| 65915 | /* 251603 */ "VPSRAVDZ256rmbkz\000" |
| 65916 | /* 251620 */ "VPSLLVDZ256rmbkz\000" |
| 65917 | /* 251637 */ "VPROLVDZ256rmbkz\000" |
| 65918 | /* 251654 */ "VPSRLVDZ256rmbkz\000" |
| 65919 | /* 251671 */ "VPRORVDZ256rmbkz\000" |
| 65920 | /* 251688 */ "VCVTPD2PHZ256rmbkz\000" |
| 65921 | /* 251707 */ "VCVTDQ2PHZ256rmbkz\000" |
| 65922 | /* 251726 */ "VCVTUDQ2PHZ256rmbkz\000" |
| 65923 | /* 251746 */ "VCVTQQ2PHZ256rmbkz\000" |
| 65924 | /* 251765 */ "VCVTUQQ2PHZ256rmbkz\000" |
| 65925 | /* 251785 */ "VCVTW2PHZ256rmbkz\000" |
| 65926 | /* 251803 */ "VCVTUW2PHZ256rmbkz\000" |
| 65927 | /* 251822 */ "VSUBPHZ256rmbkz\000" |
| 65928 | /* 251838 */ "VFCMULCPHZ256rmbkz\000" |
| 65929 | /* 251857 */ "VFMULCPHZ256rmbkz\000" |
| 65930 | /* 251875 */ "VMINCPHZ256rmbkz\000" |
| 65931 | /* 251892 */ "VMAXCPHZ256rmbkz\000" |
| 65932 | /* 251909 */ "VADDPHZ256rmbkz\000" |
| 65933 | /* 251925 */ "VSCALEFPHZ256rmbkz\000" |
| 65934 | /* 251944 */ "VMULPHZ256rmbkz\000" |
| 65935 | /* 251960 */ "VMINPHZ256rmbkz\000" |
| 65936 | /* 251976 */ "VDIVPHZ256rmbkz\000" |
| 65937 | /* 251992 */ "VMAXPHZ256rmbkz\000" |
| 65938 | /* 252008 */ "VPERMI2QZ256rmbkz\000" |
| 65939 | /* 252026 */ "VPERMT2QZ256rmbkz\000" |
| 65940 | /* 252044 */ "VPSUBQZ256rmbkz\000" |
| 65941 | /* 252060 */ "VCVTTPD2DQZ256rmbkz\000" |
| 65942 | /* 252080 */ "VCVTPD2DQZ256rmbkz\000" |
| 65943 | /* 252099 */ "VCVTTPH2DQZ256rmbkz\000" |
| 65944 | /* 252119 */ "VCVTPH2DQZ256rmbkz\000" |
| 65945 | /* 252138 */ "VCVTTPS2DQZ256rmbkz\000" |
| 65946 | /* 252158 */ "VCVTPS2DQZ256rmbkz\000" |
| 65947 | /* 252177 */ "VPADDQZ256rmbkz\000" |
| 65948 | /* 252193 */ "VPUNPCKHDQZ256rmbkz\000" |
| 65949 | /* 252213 */ "VPUNPCKLDQZ256rmbkz\000" |
| 65950 | /* 252233 */ "VPMULDQZ256rmbkz\000" |
| 65951 | /* 252250 */ "VPANDQZ256rmbkz\000" |
| 65952 | /* 252266 */ "VPUNPCKHQDQZ256rmbkz\000" |
| 65953 | /* 252287 */ "VPUNPCKLQDQZ256rmbkz\000" |
| 65954 | /* 252308 */ "VCVTTPD2UDQZ256rmbkz\000" |
| 65955 | /* 252329 */ "VCVTPD2UDQZ256rmbkz\000" |
| 65956 | /* 252349 */ "VCVTTPH2UDQZ256rmbkz\000" |
| 65957 | /* 252370 */ "VCVTPH2UDQZ256rmbkz\000" |
| 65958 | /* 252390 */ "VCVTTPS2UDQZ256rmbkz\000" |
| 65959 | /* 252411 */ "VCVTPS2UDQZ256rmbkz\000" |
| 65960 | /* 252431 */ "VPMULUDQZ256rmbkz\000" |
| 65961 | /* 252449 */ "VPMULLQZ256rmbkz\000" |
| 65962 | /* 252466 */ "VPBLENDMQZ256rmbkz\000" |
| 65963 | /* 252485 */ "VPERMQZ256rmbkz\000" |
| 65964 | /* 252501 */ "VPANDNQZ256rmbkz\000" |
| 65965 | /* 252518 */ "VCVTTPD2QQZ256rmbkz\000" |
| 65966 | /* 252538 */ "VCVTPD2QQZ256rmbkz\000" |
| 65967 | /* 252557 */ "VCVTTPH2QQZ256rmbkz\000" |
| 65968 | /* 252577 */ "VCVTPH2QQZ256rmbkz\000" |
| 65969 | /* 252596 */ "VCVTTPS2QQZ256rmbkz\000" |
| 65970 | /* 252616 */ "VCVTPS2QQZ256rmbkz\000" |
| 65971 | /* 252635 */ "VCVTTPD2UQQZ256rmbkz\000" |
| 65972 | /* 252656 */ "VCVTPD2UQQZ256rmbkz\000" |
| 65973 | /* 252676 */ "VCVTTPH2UQQZ256rmbkz\000" |
| 65974 | /* 252697 */ "VCVTPH2UQQZ256rmbkz\000" |
| 65975 | /* 252717 */ "VCVTTPS2UQQZ256rmbkz\000" |
| 65976 | /* 252738 */ "VCVTPS2UQQZ256rmbkz\000" |
| 65977 | /* 252758 */ "VPORQZ256rmbkz\000" |
| 65978 | /* 252773 */ "VPXORQZ256rmbkz\000" |
| 65979 | /* 252789 */ "VPABSQZ256rmbkz\000" |
| 65980 | /* 252805 */ "VPMINSQZ256rmbkz\000" |
| 65981 | /* 252822 */ "VPMAXSQZ256rmbkz\000" |
| 65982 | /* 252839 */ "VPCONFLICTQZ256rmbkz\000" |
| 65983 | /* 252860 */ "VPOPCNTQZ256rmbkz\000" |
| 65984 | /* 252878 */ "VPLZCNTQZ256rmbkz\000" |
| 65985 | /* 252896 */ "VPMINUQZ256rmbkz\000" |
| 65986 | /* 252913 */ "VPMAXUQZ256rmbkz\000" |
| 65987 | /* 252930 */ "VPSRAVQZ256rmbkz\000" |
| 65988 | /* 252947 */ "VPSLLVQZ256rmbkz\000" |
| 65989 | /* 252964 */ "VPROLVQZ256rmbkz\000" |
| 65990 | /* 252981 */ "VPSRLVQZ256rmbkz\000" |
| 65991 | /* 252998 */ "VPRORVQZ256rmbkz\000" |
| 65992 | /* 253015 */ "VCVT2PH2BF8SZ256rmbkz\000" |
| 65993 | /* 253037 */ "VCVTBIASPH2BF8SZ256rmbkz\000" |
| 65994 | /* 253062 */ "VCVTPH2BF8SZ256rmbkz\000" |
| 65995 | /* 253083 */ "VCVT2PH2HF8SZ256rmbkz\000" |
| 65996 | /* 253105 */ "VCVTBIASPH2HF8SZ256rmbkz\000" |
| 65997 | /* 253130 */ "VCVTPH2HF8SZ256rmbkz\000" |
| 65998 | /* 253151 */ "VCVTTBF162IBSZ256rmbkz\000" |
| 65999 | /* 253174 */ "VCVTBF162IBSZ256rmbkz\000" |
| 66000 | /* 253196 */ "VCVTTPH2IBSZ256rmbkz\000" |
| 66001 | /* 253217 */ "VCVTPH2IBSZ256rmbkz\000" |
| 66002 | /* 253237 */ "VCVTTPS2IBSZ256rmbkz\000" |
| 66003 | /* 253258 */ "VCVTPS2IBSZ256rmbkz\000" |
| 66004 | /* 253278 */ "VCVTTBF162IUBSZ256rmbkz\000" |
| 66005 | /* 253302 */ "VCVTBF162IUBSZ256rmbkz\000" |
| 66006 | /* 253325 */ "VCVTTPH2IUBSZ256rmbkz\000" |
| 66007 | /* 253347 */ "VCVTPH2IUBSZ256rmbkz\000" |
| 66008 | /* 253368 */ "VCVTTPS2IUBSZ256rmbkz\000" |
| 66009 | /* 253390 */ "VCVTPS2IUBSZ256rmbkz\000" |
| 66010 | /* 253411 */ "VCVTPD2PSZ256rmbkz\000" |
| 66011 | /* 253430 */ "VPERMI2PSZ256rmbkz\000" |
| 66012 | /* 253449 */ "VCVTDQ2PSZ256rmbkz\000" |
| 66013 | /* 253468 */ "VCVTUDQ2PSZ256rmbkz\000" |
| 66014 | /* 253488 */ "VCVTQQ2PSZ256rmbkz\000" |
| 66015 | /* 253507 */ "VCVTUQQ2PSZ256rmbkz\000" |
| 66016 | /* 253527 */ "VPERMT2PSZ256rmbkz\000" |
| 66017 | /* 253546 */ "VSUBPSZ256rmbkz\000" |
| 66018 | /* 253562 */ "VMINCPSZ256rmbkz\000" |
| 66019 | /* 253579 */ "VMAXCPSZ256rmbkz\000" |
| 66020 | /* 253596 */ "VADDPSZ256rmbkz\000" |
| 66021 | /* 253612 */ "VANDPSZ256rmbkz\000" |
| 66022 | /* 253628 */ "VSCALEFPSZ256rmbkz\000" |
| 66023 | /* 253647 */ "VUNPCKHPSZ256rmbkz\000" |
| 66024 | /* 253666 */ "VPERMILPSZ256rmbkz\000" |
| 66025 | /* 253685 */ "VUNPCKLPSZ256rmbkz\000" |
| 66026 | /* 253704 */ "VMULPSZ256rmbkz\000" |
| 66027 | /* 253720 */ "VBLENDMPSZ256rmbkz\000" |
| 66028 | /* 253739 */ "VPERMPSZ256rmbkz\000" |
| 66029 | /* 253756 */ "VANDNPSZ256rmbkz\000" |
| 66030 | /* 253773 */ "VMINPSZ256rmbkz\000" |
| 66031 | /* 253789 */ "VORPSZ256rmbkz\000" |
| 66032 | /* 253804 */ "VXORPSZ256rmbkz\000" |
| 66033 | /* 253820 */ "VDIVPSZ256rmbkz\000" |
| 66034 | /* 253836 */ "VMAXPSZ256rmbkz\000" |
| 66035 | /* 253852 */ "VCVTTPD2DQSZ256rmbkz\000" |
| 66036 | /* 253873 */ "VCVTTPS2DQSZ256rmbkz\000" |
| 66037 | /* 253894 */ "VCVTTPD2UDQSZ256rmbkz\000" |
| 66038 | /* 253916 */ "VCVTTPS2UDQSZ256rmbkz\000" |
| 66039 | /* 253938 */ "VCVTTPD2QQSZ256rmbkz\000" |
| 66040 | /* 253959 */ "VCVTTPS2QQSZ256rmbkz\000" |
| 66041 | /* 253980 */ "VCVTTPD2UQQSZ256rmbkz\000" |
| 66042 | /* 254002 */ "VCVTTPS2UQQSZ256rmbkz\000" |
| 66043 | /* 254024 */ "VCVTTPH2WZ256rmbkz\000" |
| 66044 | /* 254043 */ "VCVTPH2WZ256rmbkz\000" |
| 66045 | /* 254061 */ "VPACKSSDWZ256rmbkz\000" |
| 66046 | /* 254080 */ "VPACKUSDWZ256rmbkz\000" |
| 66047 | /* 254099 */ "VCVTTPH2UWZ256rmbkz\000" |
| 66048 | /* 254119 */ "VCVTPH2UWZ256rmbkz\000" |
| 66049 | /* 254138 */ "VCVT2PS2PHXZ256rmbkz\000" |
| 66050 | /* 254159 */ "VCVTPS2PHXZ256rmbkz\000" |
| 66051 | /* 254179 */ "VCVTPH2PSXZ256rmbkz\000" |
| 66052 | /* 254199 */ "VCVTNE2PS2BF16Z128rmbkz\000" |
| 66053 | /* 254223 */ "VCVTNEPS2BF16Z128rmbkz\000" |
| 66054 | /* 254246 */ "VSUBBF16Z128rmbkz\000" |
| 66055 | /* 254264 */ "VADDBF16Z128rmbkz\000" |
| 66056 | /* 254282 */ "VSCALEFBF16Z128rmbkz\000" |
| 66057 | /* 254303 */ "VMULBF16Z128rmbkz\000" |
| 66058 | /* 254321 */ "VMINBF16Z128rmbkz\000" |
| 66059 | /* 254339 */ "VDIVBF16Z128rmbkz\000" |
| 66060 | /* 254357 */ "VMAXBF16Z128rmbkz\000" |
| 66061 | /* 254375 */ "VCVT2PH2BF8Z128rmbkz\000" |
| 66062 | /* 254396 */ "VCVTBIASPH2BF8Z128rmbkz\000" |
| 66063 | /* 254420 */ "VCVTPH2BF8Z128rmbkz\000" |
| 66064 | /* 254440 */ "VCVT2PH2HF8Z128rmbkz\000" |
| 66065 | /* 254461 */ "VCVTBIASPH2HF8Z128rmbkz\000" |
| 66066 | /* 254485 */ "VCVTPH2HF8Z128rmbkz\000" |
| 66067 | /* 254505 */ "VPMULTISHIFTQBZ128rmbkz\000" |
| 66068 | /* 254529 */ "VPERMI2DZ128rmbkz\000" |
| 66069 | /* 254547 */ "VPERMT2DZ128rmbkz\000" |
| 66070 | /* 254565 */ "VPSUBDZ128rmbkz\000" |
| 66071 | /* 254581 */ "VPADDDZ128rmbkz\000" |
| 66072 | /* 254597 */ "VPANDDZ128rmbkz\000" |
| 66073 | /* 254613 */ "VPMULLDZ128rmbkz\000" |
| 66074 | /* 254630 */ "VPBLENDMDZ128rmbkz\000" |
| 66075 | /* 254649 */ "VPANDNDZ128rmbkz\000" |
| 66076 | /* 254666 */ "VCVTPH2PDZ128rmbkz\000" |
| 66077 | /* 254685 */ "VPERMI2PDZ128rmbkz\000" |
| 66078 | /* 254704 */ "VCVTDQ2PDZ128rmbkz\000" |
| 66079 | /* 254723 */ "VCVTUDQ2PDZ128rmbkz\000" |
| 66080 | /* 254743 */ "VCVTQQ2PDZ128rmbkz\000" |
| 66081 | /* 254762 */ "VCVTUQQ2PDZ128rmbkz\000" |
| 66082 | /* 254782 */ "VCVTPS2PDZ128rmbkz\000" |
| 66083 | /* 254801 */ "VPERMT2PDZ128rmbkz\000" |
| 66084 | /* 254820 */ "VSUBPDZ128rmbkz\000" |
| 66085 | /* 254836 */ "VMINCPDZ128rmbkz\000" |
| 66086 | /* 254853 */ "VMAXCPDZ128rmbkz\000" |
| 66087 | /* 254870 */ "VADDPDZ128rmbkz\000" |
| 66088 | /* 254886 */ "VANDPDZ128rmbkz\000" |
| 66089 | /* 254902 */ "VSCALEFPDZ128rmbkz\000" |
| 66090 | /* 254921 */ "VUNPCKHPDZ128rmbkz\000" |
| 66091 | /* 254940 */ "VPERMILPDZ128rmbkz\000" |
| 66092 | /* 254959 */ "VUNPCKLPDZ128rmbkz\000" |
| 66093 | /* 254978 */ "VMULPDZ128rmbkz\000" |
| 66094 | /* 254994 */ "VBLENDMPDZ128rmbkz\000" |
| 66095 | /* 255013 */ "VANDNPDZ128rmbkz\000" |
| 66096 | /* 255030 */ "VMINPDZ128rmbkz\000" |
| 66097 | /* 255046 */ "VORPDZ128rmbkz\000" |
| 66098 | /* 255061 */ "VXORPDZ128rmbkz\000" |
| 66099 | /* 255077 */ "VDIVPDZ128rmbkz\000" |
| 66100 | /* 255093 */ "VMAXPDZ128rmbkz\000" |
| 66101 | /* 255109 */ "VPORDZ128rmbkz\000" |
| 66102 | /* 255124 */ "VPXORDZ128rmbkz\000" |
| 66103 | /* 255140 */ "VPABSDZ128rmbkz\000" |
| 66104 | /* 255156 */ "VPMINSDZ128rmbkz\000" |
| 66105 | /* 255173 */ "VPMAXSDZ128rmbkz\000" |
| 66106 | /* 255190 */ "VPCONFLICTDZ128rmbkz\000" |
| 66107 | /* 255211 */ "VPOPCNTDZ128rmbkz\000" |
| 66108 | /* 255229 */ "VPLZCNTDZ128rmbkz\000" |
| 66109 | /* 255247 */ "VPMINUDZ128rmbkz\000" |
| 66110 | /* 255264 */ "VPMAXUDZ128rmbkz\000" |
| 66111 | /* 255281 */ "VPSRAVDZ128rmbkz\000" |
| 66112 | /* 255298 */ "VPSLLVDZ128rmbkz\000" |
| 66113 | /* 255315 */ "VPROLVDZ128rmbkz\000" |
| 66114 | /* 255332 */ "VPSRLVDZ128rmbkz\000" |
| 66115 | /* 255349 */ "VPRORVDZ128rmbkz\000" |
| 66116 | /* 255366 */ "VCVTPD2PHZ128rmbkz\000" |
| 66117 | /* 255385 */ "VCVTDQ2PHZ128rmbkz\000" |
| 66118 | /* 255404 */ "VCVTUDQ2PHZ128rmbkz\000" |
| 66119 | /* 255424 */ "VCVTQQ2PHZ128rmbkz\000" |
| 66120 | /* 255443 */ "VCVTUQQ2PHZ128rmbkz\000" |
| 66121 | /* 255463 */ "VCVTW2PHZ128rmbkz\000" |
| 66122 | /* 255481 */ "VCVTUW2PHZ128rmbkz\000" |
| 66123 | /* 255500 */ "VSUBPHZ128rmbkz\000" |
| 66124 | /* 255516 */ "VFCMULCPHZ128rmbkz\000" |
| 66125 | /* 255535 */ "VFMULCPHZ128rmbkz\000" |
| 66126 | /* 255553 */ "VMINCPHZ128rmbkz\000" |
| 66127 | /* 255570 */ "VMAXCPHZ128rmbkz\000" |
| 66128 | /* 255587 */ "VADDPHZ128rmbkz\000" |
| 66129 | /* 255603 */ "VSCALEFPHZ128rmbkz\000" |
| 66130 | /* 255622 */ "VMULPHZ128rmbkz\000" |
| 66131 | /* 255638 */ "VMINPHZ128rmbkz\000" |
| 66132 | /* 255654 */ "VDIVPHZ128rmbkz\000" |
| 66133 | /* 255670 */ "VMAXPHZ128rmbkz\000" |
| 66134 | /* 255686 */ "VPERMI2QZ128rmbkz\000" |
| 66135 | /* 255704 */ "VPERMT2QZ128rmbkz\000" |
| 66136 | /* 255722 */ "VPSUBQZ128rmbkz\000" |
| 66137 | /* 255738 */ "VCVTTPD2DQZ128rmbkz\000" |
| 66138 | /* 255758 */ "VCVTPD2DQZ128rmbkz\000" |
| 66139 | /* 255777 */ "VCVTTPH2DQZ128rmbkz\000" |
| 66140 | /* 255797 */ "VCVTPH2DQZ128rmbkz\000" |
| 66141 | /* 255816 */ "VCVTTPS2DQZ128rmbkz\000" |
| 66142 | /* 255836 */ "VCVTPS2DQZ128rmbkz\000" |
| 66143 | /* 255855 */ "VPADDQZ128rmbkz\000" |
| 66144 | /* 255871 */ "VPUNPCKHDQZ128rmbkz\000" |
| 66145 | /* 255891 */ "VPUNPCKLDQZ128rmbkz\000" |
| 66146 | /* 255911 */ "VPMULDQZ128rmbkz\000" |
| 66147 | /* 255928 */ "VPANDQZ128rmbkz\000" |
| 66148 | /* 255944 */ "VPUNPCKHQDQZ128rmbkz\000" |
| 66149 | /* 255965 */ "VPUNPCKLQDQZ128rmbkz\000" |
| 66150 | /* 255986 */ "VCVTTPD2UDQZ128rmbkz\000" |
| 66151 | /* 256007 */ "VCVTPD2UDQZ128rmbkz\000" |
| 66152 | /* 256027 */ "VCVTTPH2UDQZ128rmbkz\000" |
| 66153 | /* 256048 */ "VCVTPH2UDQZ128rmbkz\000" |
| 66154 | /* 256068 */ "VCVTTPS2UDQZ128rmbkz\000" |
| 66155 | /* 256089 */ "VCVTPS2UDQZ128rmbkz\000" |
| 66156 | /* 256109 */ "VPMULUDQZ128rmbkz\000" |
| 66157 | /* 256127 */ "VPMULLQZ128rmbkz\000" |
| 66158 | /* 256144 */ "VPBLENDMQZ128rmbkz\000" |
| 66159 | /* 256163 */ "VPANDNQZ128rmbkz\000" |
| 66160 | /* 256180 */ "VCVTTPD2QQZ128rmbkz\000" |
| 66161 | /* 256200 */ "VCVTPD2QQZ128rmbkz\000" |
| 66162 | /* 256219 */ "VCVTTPH2QQZ128rmbkz\000" |
| 66163 | /* 256239 */ "VCVTPH2QQZ128rmbkz\000" |
| 66164 | /* 256258 */ "VCVTTPS2QQZ128rmbkz\000" |
| 66165 | /* 256278 */ "VCVTPS2QQZ128rmbkz\000" |
| 66166 | /* 256297 */ "VCVTTPD2UQQZ128rmbkz\000" |
| 66167 | /* 256318 */ "VCVTPD2UQQZ128rmbkz\000" |
| 66168 | /* 256338 */ "VCVTTPH2UQQZ128rmbkz\000" |
| 66169 | /* 256359 */ "VCVTPH2UQQZ128rmbkz\000" |
| 66170 | /* 256379 */ "VCVTTPS2UQQZ128rmbkz\000" |
| 66171 | /* 256400 */ "VCVTPS2UQQZ128rmbkz\000" |
| 66172 | /* 256420 */ "VPORQZ128rmbkz\000" |
| 66173 | /* 256435 */ "VPXORQZ128rmbkz\000" |
| 66174 | /* 256451 */ "VPABSQZ128rmbkz\000" |
| 66175 | /* 256467 */ "VPMINSQZ128rmbkz\000" |
| 66176 | /* 256484 */ "VPMAXSQZ128rmbkz\000" |
| 66177 | /* 256501 */ "VPCONFLICTQZ128rmbkz\000" |
| 66178 | /* 256522 */ "VPOPCNTQZ128rmbkz\000" |
| 66179 | /* 256540 */ "VPLZCNTQZ128rmbkz\000" |
| 66180 | /* 256558 */ "VPMINUQZ128rmbkz\000" |
| 66181 | /* 256575 */ "VPMAXUQZ128rmbkz\000" |
| 66182 | /* 256592 */ "VPSRAVQZ128rmbkz\000" |
| 66183 | /* 256609 */ "VPSLLVQZ128rmbkz\000" |
| 66184 | /* 256626 */ "VPROLVQZ128rmbkz\000" |
| 66185 | /* 256643 */ "VPSRLVQZ128rmbkz\000" |
| 66186 | /* 256660 */ "VPRORVQZ128rmbkz\000" |
| 66187 | /* 256677 */ "VCVT2PH2BF8SZ128rmbkz\000" |
| 66188 | /* 256699 */ "VCVTBIASPH2BF8SZ128rmbkz\000" |
| 66189 | /* 256724 */ "VCVTPH2BF8SZ128rmbkz\000" |
| 66190 | /* 256745 */ "VCVT2PH2HF8SZ128rmbkz\000" |
| 66191 | /* 256767 */ "VCVTBIASPH2HF8SZ128rmbkz\000" |
| 66192 | /* 256792 */ "VCVTPH2HF8SZ128rmbkz\000" |
| 66193 | /* 256813 */ "VCVTTBF162IBSZ128rmbkz\000" |
| 66194 | /* 256836 */ "VCVTBF162IBSZ128rmbkz\000" |
| 66195 | /* 256858 */ "VCVTTPH2IBSZ128rmbkz\000" |
| 66196 | /* 256879 */ "VCVTPH2IBSZ128rmbkz\000" |
| 66197 | /* 256899 */ "VCVTTPS2IBSZ128rmbkz\000" |
| 66198 | /* 256920 */ "VCVTPS2IBSZ128rmbkz\000" |
| 66199 | /* 256940 */ "VCVTTBF162IUBSZ128rmbkz\000" |
| 66200 | /* 256964 */ "VCVTBF162IUBSZ128rmbkz\000" |
| 66201 | /* 256987 */ "VCVTTPH2IUBSZ128rmbkz\000" |
| 66202 | /* 257009 */ "VCVTPH2IUBSZ128rmbkz\000" |
| 66203 | /* 257030 */ "VCVTTPS2IUBSZ128rmbkz\000" |
| 66204 | /* 257052 */ "VCVTPS2IUBSZ128rmbkz\000" |
| 66205 | /* 257073 */ "VCVTPD2PSZ128rmbkz\000" |
| 66206 | /* 257092 */ "VPERMI2PSZ128rmbkz\000" |
| 66207 | /* 257111 */ "VCVTDQ2PSZ128rmbkz\000" |
| 66208 | /* 257130 */ "VCVTUDQ2PSZ128rmbkz\000" |
| 66209 | /* 257150 */ "VCVTQQ2PSZ128rmbkz\000" |
| 66210 | /* 257169 */ "VCVTUQQ2PSZ128rmbkz\000" |
| 66211 | /* 257189 */ "VPERMT2PSZ128rmbkz\000" |
| 66212 | /* 257208 */ "VSUBPSZ128rmbkz\000" |
| 66213 | /* 257224 */ "VMINCPSZ128rmbkz\000" |
| 66214 | /* 257241 */ "VMAXCPSZ128rmbkz\000" |
| 66215 | /* 257258 */ "VADDPSZ128rmbkz\000" |
| 66216 | /* 257274 */ "VANDPSZ128rmbkz\000" |
| 66217 | /* 257290 */ "VSCALEFPSZ128rmbkz\000" |
| 66218 | /* 257309 */ "VUNPCKHPSZ128rmbkz\000" |
| 66219 | /* 257328 */ "VPERMILPSZ128rmbkz\000" |
| 66220 | /* 257347 */ "VUNPCKLPSZ128rmbkz\000" |
| 66221 | /* 257366 */ "VMULPSZ128rmbkz\000" |
| 66222 | /* 257382 */ "VBLENDMPSZ128rmbkz\000" |
| 66223 | /* 257401 */ "VANDNPSZ128rmbkz\000" |
| 66224 | /* 257418 */ "VMINPSZ128rmbkz\000" |
| 66225 | /* 257434 */ "VORPSZ128rmbkz\000" |
| 66226 | /* 257449 */ "VXORPSZ128rmbkz\000" |
| 66227 | /* 257465 */ "VDIVPSZ128rmbkz\000" |
| 66228 | /* 257481 */ "VMAXPSZ128rmbkz\000" |
| 66229 | /* 257497 */ "VCVTTPD2DQSZ128rmbkz\000" |
| 66230 | /* 257518 */ "VCVTTPS2DQSZ128rmbkz\000" |
| 66231 | /* 257539 */ "VCVTTPD2UDQSZ128rmbkz\000" |
| 66232 | /* 257561 */ "VCVTTPS2UDQSZ128rmbkz\000" |
| 66233 | /* 257583 */ "VCVTTPD2QQSZ128rmbkz\000" |
| 66234 | /* 257604 */ "VCVTTPS2QQSZ128rmbkz\000" |
| 66235 | /* 257625 */ "VCVTTPD2UQQSZ128rmbkz\000" |
| 66236 | /* 257647 */ "VCVTTPS2UQQSZ128rmbkz\000" |
| 66237 | /* 257669 */ "VCVTTPH2WZ128rmbkz\000" |
| 66238 | /* 257688 */ "VCVTPH2WZ128rmbkz\000" |
| 66239 | /* 257706 */ "VPACKSSDWZ128rmbkz\000" |
| 66240 | /* 257725 */ "VPACKUSDWZ128rmbkz\000" |
| 66241 | /* 257744 */ "VCVTTPH2UWZ128rmbkz\000" |
| 66242 | /* 257764 */ "VCVTPH2UWZ128rmbkz\000" |
| 66243 | /* 257783 */ "VCVT2PS2PHXZ128rmbkz\000" |
| 66244 | /* 257804 */ "VCVTPS2PHXZ128rmbkz\000" |
| 66245 | /* 257824 */ "VCVTPH2PSXZ128rmbkz\000" |
| 66246 | /* 257844 */ "VCVTNE2PS2BF16Zrmbkz\000" |
| 66247 | /* 257865 */ "VCVTNEPS2BF16Zrmbkz\000" |
| 66248 | /* 257885 */ "VSUBBF16Zrmbkz\000" |
| 66249 | /* 257900 */ "VADDBF16Zrmbkz\000" |
| 66250 | /* 257915 */ "VSCALEFBF16Zrmbkz\000" |
| 66251 | /* 257933 */ "VMULBF16Zrmbkz\000" |
| 66252 | /* 257948 */ "VMINBF16Zrmbkz\000" |
| 66253 | /* 257963 */ "VDIVBF16Zrmbkz\000" |
| 66254 | /* 257978 */ "VMAXBF16Zrmbkz\000" |
| 66255 | /* 257993 */ "VCVT2PH2BF8Zrmbkz\000" |
| 66256 | /* 258011 */ "VCVTBIASPH2BF8Zrmbkz\000" |
| 66257 | /* 258032 */ "VCVTPH2BF8Zrmbkz\000" |
| 66258 | /* 258049 */ "VCVT2PH2HF8Zrmbkz\000" |
| 66259 | /* 258067 */ "VCVTBIASPH2HF8Zrmbkz\000" |
| 66260 | /* 258088 */ "VCVTPH2HF8Zrmbkz\000" |
| 66261 | /* 258105 */ "VPMULTISHIFTQBZrmbkz\000" |
| 66262 | /* 258126 */ "VPERMI2DZrmbkz\000" |
| 66263 | /* 258141 */ "VPERMT2DZrmbkz\000" |
| 66264 | /* 258156 */ "VPSUBDZrmbkz\000" |
| 66265 | /* 258169 */ "VPADDDZrmbkz\000" |
| 66266 | /* 258182 */ "VPANDDZrmbkz\000" |
| 66267 | /* 258195 */ "VPMULLDZrmbkz\000" |
| 66268 | /* 258209 */ "VPBLENDMDZrmbkz\000" |
| 66269 | /* 258225 */ "VPERMDZrmbkz\000" |
| 66270 | /* 258238 */ "VPANDNDZrmbkz\000" |
| 66271 | /* 258252 */ "VCVTPH2PDZrmbkz\000" |
| 66272 | /* 258268 */ "VPERMI2PDZrmbkz\000" |
| 66273 | /* 258284 */ "VCVTDQ2PDZrmbkz\000" |
| 66274 | /* 258300 */ "VCVTUDQ2PDZrmbkz\000" |
| 66275 | /* 258317 */ "VCVTQQ2PDZrmbkz\000" |
| 66276 | /* 258333 */ "VCVTUQQ2PDZrmbkz\000" |
| 66277 | /* 258350 */ "VCVTPS2PDZrmbkz\000" |
| 66278 | /* 258366 */ "VPERMT2PDZrmbkz\000" |
| 66279 | /* 258382 */ "VSUBPDZrmbkz\000" |
| 66280 | /* 258395 */ "VMINCPDZrmbkz\000" |
| 66281 | /* 258409 */ "VMAXCPDZrmbkz\000" |
| 66282 | /* 258423 */ "VADDPDZrmbkz\000" |
| 66283 | /* 258436 */ "VANDPDZrmbkz\000" |
| 66284 | /* 258449 */ "VSCALEFPDZrmbkz\000" |
| 66285 | /* 258465 */ "VUNPCKHPDZrmbkz\000" |
| 66286 | /* 258481 */ "VPERMILPDZrmbkz\000" |
| 66287 | /* 258497 */ "VUNPCKLPDZrmbkz\000" |
| 66288 | /* 258513 */ "VMULPDZrmbkz\000" |
| 66289 | /* 258526 */ "VBLENDMPDZrmbkz\000" |
| 66290 | /* 258542 */ "VPERMPDZrmbkz\000" |
| 66291 | /* 258556 */ "VANDNPDZrmbkz\000" |
| 66292 | /* 258570 */ "VMINPDZrmbkz\000" |
| 66293 | /* 258583 */ "VORPDZrmbkz\000" |
| 66294 | /* 258595 */ "VXORPDZrmbkz\000" |
| 66295 | /* 258608 */ "VDIVPDZrmbkz\000" |
| 66296 | /* 258621 */ "VMAXPDZrmbkz\000" |
| 66297 | /* 258634 */ "VPORDZrmbkz\000" |
| 66298 | /* 258646 */ "VPXORDZrmbkz\000" |
| 66299 | /* 258659 */ "VPABSDZrmbkz\000" |
| 66300 | /* 258672 */ "VPMINSDZrmbkz\000" |
| 66301 | /* 258686 */ "VPMAXSDZrmbkz\000" |
| 66302 | /* 258700 */ "VPCONFLICTDZrmbkz\000" |
| 66303 | /* 258718 */ "VPOPCNTDZrmbkz\000" |
| 66304 | /* 258733 */ "VPLZCNTDZrmbkz\000" |
| 66305 | /* 258748 */ "VPMINUDZrmbkz\000" |
| 66306 | /* 258762 */ "VPMAXUDZrmbkz\000" |
| 66307 | /* 258776 */ "VPSRAVDZrmbkz\000" |
| 66308 | /* 258790 */ "VPSLLVDZrmbkz\000" |
| 66309 | /* 258804 */ "VPROLVDZrmbkz\000" |
| 66310 | /* 258818 */ "VPSRLVDZrmbkz\000" |
| 66311 | /* 258832 */ "VPRORVDZrmbkz\000" |
| 66312 | /* 258846 */ "VCVTPD2PHZrmbkz\000" |
| 66313 | /* 258862 */ "VCVTDQ2PHZrmbkz\000" |
| 66314 | /* 258878 */ "VCVTUDQ2PHZrmbkz\000" |
| 66315 | /* 258895 */ "VCVTQQ2PHZrmbkz\000" |
| 66316 | /* 258911 */ "VCVTUQQ2PHZrmbkz\000" |
| 66317 | /* 258928 */ "VCVTW2PHZrmbkz\000" |
| 66318 | /* 258943 */ "VCVTUW2PHZrmbkz\000" |
| 66319 | /* 258959 */ "VSUBPHZrmbkz\000" |
| 66320 | /* 258972 */ "VFCMULCPHZrmbkz\000" |
| 66321 | /* 258988 */ "VFMULCPHZrmbkz\000" |
| 66322 | /* 259003 */ "VMINCPHZrmbkz\000" |
| 66323 | /* 259017 */ "VMAXCPHZrmbkz\000" |
| 66324 | /* 259031 */ "VADDPHZrmbkz\000" |
| 66325 | /* 259044 */ "VSCALEFPHZrmbkz\000" |
| 66326 | /* 259060 */ "VMULPHZrmbkz\000" |
| 66327 | /* 259073 */ "VMINPHZrmbkz\000" |
| 66328 | /* 259086 */ "VDIVPHZrmbkz\000" |
| 66329 | /* 259099 */ "VMAXPHZrmbkz\000" |
| 66330 | /* 259112 */ "VPERMI2QZrmbkz\000" |
| 66331 | /* 259127 */ "VPERMT2QZrmbkz\000" |
| 66332 | /* 259142 */ "VPSUBQZrmbkz\000" |
| 66333 | /* 259155 */ "VCVTTPD2DQZrmbkz\000" |
| 66334 | /* 259172 */ "VCVTPD2DQZrmbkz\000" |
| 66335 | /* 259188 */ "VCVTTPH2DQZrmbkz\000" |
| 66336 | /* 259205 */ "VCVTPH2DQZrmbkz\000" |
| 66337 | /* 259221 */ "VCVTTPS2DQZrmbkz\000" |
| 66338 | /* 259238 */ "VCVTPS2DQZrmbkz\000" |
| 66339 | /* 259254 */ "VPADDQZrmbkz\000" |
| 66340 | /* 259267 */ "VPUNPCKHDQZrmbkz\000" |
| 66341 | /* 259284 */ "VPUNPCKLDQZrmbkz\000" |
| 66342 | /* 259301 */ "VPMULDQZrmbkz\000" |
| 66343 | /* 259315 */ "VPANDQZrmbkz\000" |
| 66344 | /* 259328 */ "VPUNPCKHQDQZrmbkz\000" |
| 66345 | /* 259346 */ "VPUNPCKLQDQZrmbkz\000" |
| 66346 | /* 259364 */ "VCVTTPD2UDQZrmbkz\000" |
| 66347 | /* 259382 */ "VCVTPD2UDQZrmbkz\000" |
| 66348 | /* 259399 */ "VCVTTPH2UDQZrmbkz\000" |
| 66349 | /* 259417 */ "VCVTPH2UDQZrmbkz\000" |
| 66350 | /* 259434 */ "VCVTTPS2UDQZrmbkz\000" |
| 66351 | /* 259452 */ "VCVTPS2UDQZrmbkz\000" |
| 66352 | /* 259469 */ "VPMULUDQZrmbkz\000" |
| 66353 | /* 259484 */ "VPMULLQZrmbkz\000" |
| 66354 | /* 259498 */ "VPBLENDMQZrmbkz\000" |
| 66355 | /* 259514 */ "VPERMQZrmbkz\000" |
| 66356 | /* 259527 */ "VPANDNQZrmbkz\000" |
| 66357 | /* 259541 */ "VCVTTPD2QQZrmbkz\000" |
| 66358 | /* 259558 */ "VCVTPD2QQZrmbkz\000" |
| 66359 | /* 259574 */ "VCVTTPH2QQZrmbkz\000" |
| 66360 | /* 259591 */ "VCVTPH2QQZrmbkz\000" |
| 66361 | /* 259607 */ "VCVTTPS2QQZrmbkz\000" |
| 66362 | /* 259624 */ "VCVTPS2QQZrmbkz\000" |
| 66363 | /* 259640 */ "VCVTTPD2UQQZrmbkz\000" |
| 66364 | /* 259658 */ "VCVTPD2UQQZrmbkz\000" |
| 66365 | /* 259675 */ "VCVTTPH2UQQZrmbkz\000" |
| 66366 | /* 259693 */ "VCVTPH2UQQZrmbkz\000" |
| 66367 | /* 259710 */ "VCVTTPS2UQQZrmbkz\000" |
| 66368 | /* 259728 */ "VCVTPS2UQQZrmbkz\000" |
| 66369 | /* 259745 */ "VPORQZrmbkz\000" |
| 66370 | /* 259757 */ "VPXORQZrmbkz\000" |
| 66371 | /* 259770 */ "VPABSQZrmbkz\000" |
| 66372 | /* 259783 */ "VPMINSQZrmbkz\000" |
| 66373 | /* 259797 */ "VPMAXSQZrmbkz\000" |
| 66374 | /* 259811 */ "VPCONFLICTQZrmbkz\000" |
| 66375 | /* 259829 */ "VPOPCNTQZrmbkz\000" |
| 66376 | /* 259844 */ "VPLZCNTQZrmbkz\000" |
| 66377 | /* 259859 */ "VPMINUQZrmbkz\000" |
| 66378 | /* 259873 */ "VPMAXUQZrmbkz\000" |
| 66379 | /* 259887 */ "VPSRAVQZrmbkz\000" |
| 66380 | /* 259901 */ "VPSLLVQZrmbkz\000" |
| 66381 | /* 259915 */ "VPROLVQZrmbkz\000" |
| 66382 | /* 259929 */ "VPSRLVQZrmbkz\000" |
| 66383 | /* 259943 */ "VPRORVQZrmbkz\000" |
| 66384 | /* 259957 */ "VCVT2PH2BF8SZrmbkz\000" |
| 66385 | /* 259976 */ "VCVTBIASPH2BF8SZrmbkz\000" |
| 66386 | /* 259998 */ "VCVTPH2BF8SZrmbkz\000" |
| 66387 | /* 260016 */ "VCVT2PH2HF8SZrmbkz\000" |
| 66388 | /* 260035 */ "VCVTBIASPH2HF8SZrmbkz\000" |
| 66389 | /* 260057 */ "VCVTPH2HF8SZrmbkz\000" |
| 66390 | /* 260075 */ "VCVTTBF162IBSZrmbkz\000" |
| 66391 | /* 260095 */ "VCVTBF162IBSZrmbkz\000" |
| 66392 | /* 260114 */ "VCVTTPH2IBSZrmbkz\000" |
| 66393 | /* 260132 */ "VCVTPH2IBSZrmbkz\000" |
| 66394 | /* 260149 */ "VCVTTPS2IBSZrmbkz\000" |
| 66395 | /* 260167 */ "VCVTPS2IBSZrmbkz\000" |
| 66396 | /* 260184 */ "VCVTTBF162IUBSZrmbkz\000" |
| 66397 | /* 260205 */ "VCVTBF162IUBSZrmbkz\000" |
| 66398 | /* 260225 */ "VCVTTPH2IUBSZrmbkz\000" |
| 66399 | /* 260244 */ "VCVTPH2IUBSZrmbkz\000" |
| 66400 | /* 260262 */ "VCVTTPS2IUBSZrmbkz\000" |
| 66401 | /* 260281 */ "VCVTPS2IUBSZrmbkz\000" |
| 66402 | /* 260299 */ "VCVTPD2PSZrmbkz\000" |
| 66403 | /* 260315 */ "VPERMI2PSZrmbkz\000" |
| 66404 | /* 260331 */ "VCVTDQ2PSZrmbkz\000" |
| 66405 | /* 260347 */ "VCVTUDQ2PSZrmbkz\000" |
| 66406 | /* 260364 */ "VCVTQQ2PSZrmbkz\000" |
| 66407 | /* 260380 */ "VCVTUQQ2PSZrmbkz\000" |
| 66408 | /* 260397 */ "VPERMT2PSZrmbkz\000" |
| 66409 | /* 260413 */ "VSUBPSZrmbkz\000" |
| 66410 | /* 260426 */ "VMINCPSZrmbkz\000" |
| 66411 | /* 260440 */ "VMAXCPSZrmbkz\000" |
| 66412 | /* 260454 */ "VADDPSZrmbkz\000" |
| 66413 | /* 260467 */ "VANDPSZrmbkz\000" |
| 66414 | /* 260480 */ "VSCALEFPSZrmbkz\000" |
| 66415 | /* 260496 */ "VUNPCKHPSZrmbkz\000" |
| 66416 | /* 260512 */ "VPERMILPSZrmbkz\000" |
| 66417 | /* 260528 */ "VUNPCKLPSZrmbkz\000" |
| 66418 | /* 260544 */ "VMULPSZrmbkz\000" |
| 66419 | /* 260557 */ "VBLENDMPSZrmbkz\000" |
| 66420 | /* 260573 */ "VPERMPSZrmbkz\000" |
| 66421 | /* 260587 */ "VANDNPSZrmbkz\000" |
| 66422 | /* 260601 */ "VMINPSZrmbkz\000" |
| 66423 | /* 260614 */ "VORPSZrmbkz\000" |
| 66424 | /* 260626 */ "VXORPSZrmbkz\000" |
| 66425 | /* 260639 */ "VDIVPSZrmbkz\000" |
| 66426 | /* 260652 */ "VMAXPSZrmbkz\000" |
| 66427 | /* 260665 */ "VCVTTPD2DQSZrmbkz\000" |
| 66428 | /* 260683 */ "VCVTTPS2DQSZrmbkz\000" |
| 66429 | /* 260701 */ "VCVTTPD2UDQSZrmbkz\000" |
| 66430 | /* 260720 */ "VCVTTPS2UDQSZrmbkz\000" |
| 66431 | /* 260739 */ "VCVTTPD2QQSZrmbkz\000" |
| 66432 | /* 260757 */ "VCVTTPS2QQSZrmbkz\000" |
| 66433 | /* 260775 */ "VCVTTPD2UQQSZrmbkz\000" |
| 66434 | /* 260794 */ "VCVTTPS2UQQSZrmbkz\000" |
| 66435 | /* 260813 */ "VCVTTPH2WZrmbkz\000" |
| 66436 | /* 260829 */ "VCVTPH2WZrmbkz\000" |
| 66437 | /* 260844 */ "VPACKSSDWZrmbkz\000" |
| 66438 | /* 260860 */ "VPACKUSDWZrmbkz\000" |
| 66439 | /* 260876 */ "VCVTTPH2UWZrmbkz\000" |
| 66440 | /* 260893 */ "VCVTPH2UWZrmbkz\000" |
| 66441 | /* 260909 */ "VCVT2PS2PHXZrmbkz\000" |
| 66442 | /* 260927 */ "VCVTPS2PHXZrmbkz\000" |
| 66443 | /* 260944 */ "VCVTPH2PSXZrmbkz\000" |
| 66444 | /* 260961 */ "VFMADDSUB231PDZrbkz\000" |
| 66445 | /* 260981 */ "VFMSUB231PDZrbkz\000" |
| 66446 | /* 260998 */ "VFNMSUB231PDZrbkz\000" |
| 66447 | /* 261016 */ "VFMSUBADD231PDZrbkz\000" |
| 66448 | /* 261036 */ "VFMADD231PDZrbkz\000" |
| 66449 | /* 261053 */ "VFNMADD231PDZrbkz\000" |
| 66450 | /* 261071 */ "VFMADDSUB132PDZrbkz\000" |
| 66451 | /* 261091 */ "VFMSUB132PDZrbkz\000" |
| 66452 | /* 261108 */ "VFNMSUB132PDZrbkz\000" |
| 66453 | /* 261126 */ "VFMSUBADD132PDZrbkz\000" |
| 66454 | /* 261146 */ "VFMADD132PDZrbkz\000" |
| 66455 | /* 261163 */ "VFNMADD132PDZrbkz\000" |
| 66456 | /* 261181 */ "VEXP2PDZrbkz\000" |
| 66457 | /* 261194 */ "VFMADDSUB213PDZrbkz\000" |
| 66458 | /* 261214 */ "VFMSUB213PDZrbkz\000" |
| 66459 | /* 261231 */ "VFNMSUB213PDZrbkz\000" |
| 66460 | /* 261249 */ "VFMSUBADD213PDZrbkz\000" |
| 66461 | /* 261269 */ "VFMADD213PDZrbkz\000" |
| 66462 | /* 261286 */ "VFNMADD213PDZrbkz\000" |
| 66463 | /* 261304 */ "VRCP28PDZrbkz\000" |
| 66464 | /* 261318 */ "VRSQRT28PDZrbkz\000" |
| 66465 | /* 261334 */ "VGETEXPPDZrbkz\000" |
| 66466 | /* 261349 */ "VSQRTPDZrbkz\000" |
| 66467 | /* 261362 */ "VRCP28SDZrbkz\000" |
| 66468 | /* 261376 */ "VRSQRT28SDZrbkz\000" |
| 66469 | /* 261392 */ "VGETEXPSDZrbkz\000" |
| 66470 | /* 261407 */ "VFMADDSUB231PHZrbkz\000" |
| 66471 | /* 261427 */ "VFMSUB231PHZrbkz\000" |
| 66472 | /* 261444 */ "VFNMSUB231PHZrbkz\000" |
| 66473 | /* 261462 */ "VFMSUBADD231PHZrbkz\000" |
| 66474 | /* 261482 */ "VFMADD231PHZrbkz\000" |
| 66475 | /* 261499 */ "VFNMADD231PHZrbkz\000" |
| 66476 | /* 261517 */ "VFMADDSUB132PHZrbkz\000" |
| 66477 | /* 261537 */ "VFMSUB132PHZrbkz\000" |
| 66478 | /* 261554 */ "VFNMSUB132PHZrbkz\000" |
| 66479 | /* 261572 */ "VFMSUBADD132PHZrbkz\000" |
| 66480 | /* 261592 */ "VFMADD132PHZrbkz\000" |
| 66481 | /* 261609 */ "VFNMADD132PHZrbkz\000" |
| 66482 | /* 261627 */ "VFMADDSUB213PHZrbkz\000" |
| 66483 | /* 261647 */ "VFMSUB213PHZrbkz\000" |
| 66484 | /* 261664 */ "VFNMSUB213PHZrbkz\000" |
| 66485 | /* 261682 */ "VFMSUBADD213PHZrbkz\000" |
| 66486 | /* 261702 */ "VFMADD213PHZrbkz\000" |
| 66487 | /* 261719 */ "VFNMADD213PHZrbkz\000" |
| 66488 | /* 261737 */ "VFCMADDCPHZrbkz\000" |
| 66489 | /* 261753 */ "VFMADDCPHZrbkz\000" |
| 66490 | /* 261768 */ "VGETEXPPHZrbkz\000" |
| 66491 | /* 261783 */ "VSQRTPHZrbkz\000" |
| 66492 | /* 261796 */ "VFCMADDCSHZrbkz\000" |
| 66493 | /* 261812 */ "VFMADDCSHZrbkz\000" |
| 66494 | /* 261827 */ "VGETEXPSHZrbkz\000" |
| 66495 | /* 261842 */ "VFMADDSUB231PSZrbkz\000" |
| 66496 | /* 261862 */ "VFMSUB231PSZrbkz\000" |
| 66497 | /* 261879 */ "VFNMSUB231PSZrbkz\000" |
| 66498 | /* 261897 */ "VFMSUBADD231PSZrbkz\000" |
| 66499 | /* 261917 */ "VFMADD231PSZrbkz\000" |
| 66500 | /* 261934 */ "VFNMADD231PSZrbkz\000" |
| 66501 | /* 261952 */ "VFMADDSUB132PSZrbkz\000" |
| 66502 | /* 261972 */ "VFMSUB132PSZrbkz\000" |
| 66503 | /* 261989 */ "VFNMSUB132PSZrbkz\000" |
| 66504 | /* 262007 */ "VFMSUBADD132PSZrbkz\000" |
| 66505 | /* 262027 */ "VFMADD132PSZrbkz\000" |
| 66506 | /* 262044 */ "VFNMADD132PSZrbkz\000" |
| 66507 | /* 262062 */ "VEXP2PSZrbkz\000" |
| 66508 | /* 262075 */ "VFMADDSUB213PSZrbkz\000" |
| 66509 | /* 262095 */ "VFMSUB213PSZrbkz\000" |
| 66510 | /* 262112 */ "VFNMSUB213PSZrbkz\000" |
| 66511 | /* 262130 */ "VFMSUBADD213PSZrbkz\000" |
| 66512 | /* 262150 */ "VFMADD213PSZrbkz\000" |
| 66513 | /* 262167 */ "VFNMADD213PSZrbkz\000" |
| 66514 | /* 262185 */ "VRCP28PSZrbkz\000" |
| 66515 | /* 262199 */ "VRSQRT28PSZrbkz\000" |
| 66516 | /* 262215 */ "VGETEXPPSZrbkz\000" |
| 66517 | /* 262230 */ "VSQRTPSZrbkz\000" |
| 66518 | /* 262243 */ "VRCP28SSZrbkz\000" |
| 66519 | /* 262257 */ "VRSQRT28SSZrbkz\000" |
| 66520 | /* 262273 */ "VGETEXPSSZrbkz\000" |
| 66521 | /* 262288 */ "VCVTTPD2DQSZ256rrbkz\000" |
| 66522 | /* 262309 */ "VCVTTPD2UDQSZ256rrbkz\000" |
| 66523 | /* 262331 */ "VCVTTPD2QQSZ256rrbkz\000" |
| 66524 | /* 262352 */ "VCVTTPS2QQSZ256rrbkz\000" |
| 66525 | /* 262373 */ "VCVTTPD2UQQSZ256rrbkz\000" |
| 66526 | /* 262395 */ "VCVTTPS2UQQSZ256rrbkz\000" |
| 66527 | /* 262417 */ "VCVTPH2PDZrrbkz\000" |
| 66528 | /* 262433 */ "VCVTQQ2PDZrrbkz\000" |
| 66529 | /* 262449 */ "VCVTUQQ2PDZrrbkz\000" |
| 66530 | /* 262466 */ "VCVTPS2PDZrrbkz\000" |
| 66531 | /* 262482 */ "VSUBPDZrrbkz\000" |
| 66532 | /* 262495 */ "VADDPDZrrbkz\000" |
| 66533 | /* 262508 */ "VSCALEFPDZrrbkz\000" |
| 66534 | /* 262524 */ "VMULPDZrrbkz\000" |
| 66535 | /* 262537 */ "VMINPDZrrbkz\000" |
| 66536 | /* 262550 */ "VDIVPDZrrbkz\000" |
| 66537 | /* 262563 */ "VMAXPDZrrbkz\000" |
| 66538 | /* 262576 */ "VCVTPD2PHZrrbkz\000" |
| 66539 | /* 262592 */ "VCVTDQ2PHZrrbkz\000" |
| 66540 | /* 262608 */ "VCVTUDQ2PHZrrbkz\000" |
| 66541 | /* 262625 */ "VCVTQQ2PHZrrbkz\000" |
| 66542 | /* 262641 */ "VCVTUQQ2PHZrrbkz\000" |
| 66543 | /* 262658 */ "VCVTPS2PHZrrbkz\000" |
| 66544 | /* 262674 */ "VCVTW2PHZrrbkz\000" |
| 66545 | /* 262689 */ "VCVTUW2PHZrrbkz\000" |
| 66546 | /* 262705 */ "VSUBPHZrrbkz\000" |
| 66547 | /* 262718 */ "VFCMULCPHZrrbkz\000" |
| 66548 | /* 262734 */ "VFMULCPHZrrbkz\000" |
| 66549 | /* 262749 */ "VADDPHZrrbkz\000" |
| 66550 | /* 262762 */ "VSCALEFPHZrrbkz\000" |
| 66551 | /* 262778 */ "VMULPHZrrbkz\000" |
| 66552 | /* 262791 */ "VMINPHZrrbkz\000" |
| 66553 | /* 262804 */ "VDIVPHZrrbkz\000" |
| 66554 | /* 262817 */ "VMAXPHZrrbkz\000" |
| 66555 | /* 262830 */ "VFCMULCSHZrrbkz\000" |
| 66556 | /* 262846 */ "VFMULCSHZrrbkz\000" |
| 66557 | /* 262861 */ "VCVTTPD2DQZrrbkz\000" |
| 66558 | /* 262878 */ "VCVTPD2DQZrrbkz\000" |
| 66559 | /* 262894 */ "VCVTTPH2DQZrrbkz\000" |
| 66560 | /* 262911 */ "VCVTPH2DQZrrbkz\000" |
| 66561 | /* 262927 */ "VCVTTPS2DQZrrbkz\000" |
| 66562 | /* 262944 */ "VCVTPS2DQZrrbkz\000" |
| 66563 | /* 262960 */ "VCVTTPD2UDQZrrbkz\000" |
| 66564 | /* 262978 */ "VCVTPD2UDQZrrbkz\000" |
| 66565 | /* 262995 */ "VCVTTPH2UDQZrrbkz\000" |
| 66566 | /* 263013 */ "VCVTPH2UDQZrrbkz\000" |
| 66567 | /* 263030 */ "VCVTTPS2UDQZrrbkz\000" |
| 66568 | /* 263048 */ "VCVTPS2UDQZrrbkz\000" |
| 66569 | /* 263065 */ "VCVTTPD2QQZrrbkz\000" |
| 66570 | /* 263082 */ "VCVTPD2QQZrrbkz\000" |
| 66571 | /* 263098 */ "VCVTTPH2QQZrrbkz\000" |
| 66572 | /* 263115 */ "VCVTPH2QQZrrbkz\000" |
| 66573 | /* 263131 */ "VCVTTPS2QQZrrbkz\000" |
| 66574 | /* 263148 */ "VCVTPS2QQZrrbkz\000" |
| 66575 | /* 263164 */ "VCVTTPD2UQQZrrbkz\000" |
| 66576 | /* 263182 */ "VCVTPD2UQQZrrbkz\000" |
| 66577 | /* 263199 */ "VCVTTPH2UQQZrrbkz\000" |
| 66578 | /* 263217 */ "VCVTPH2UQQZrrbkz\000" |
| 66579 | /* 263234 */ "VCVTTPS2UQQZrrbkz\000" |
| 66580 | /* 263252 */ "VCVTPS2UQQZrrbkz\000" |
| 66581 | /* 263269 */ "VCVTTPH2IBSZrrbkz\000" |
| 66582 | /* 263287 */ "VCVTPH2IBSZrrbkz\000" |
| 66583 | /* 263304 */ "VCVTTPS2IBSZrrbkz\000" |
| 66584 | /* 263322 */ "VCVTPS2IBSZrrbkz\000" |
| 66585 | /* 263339 */ "VCVTTPH2IUBSZrrbkz\000" |
| 66586 | /* 263358 */ "VCVTPH2IUBSZrrbkz\000" |
| 66587 | /* 263376 */ "VCVTTPS2IUBSZrrbkz\000" |
| 66588 | /* 263395 */ "VCVTPS2IUBSZrrbkz\000" |
| 66589 | /* 263413 */ "VCVTPD2PSZrrbkz\000" |
| 66590 | /* 263429 */ "VCVTPH2PSZrrbkz\000" |
| 66591 | /* 263445 */ "VCVTDQ2PSZrrbkz\000" |
| 66592 | /* 263461 */ "VCVTUDQ2PSZrrbkz\000" |
| 66593 | /* 263478 */ "VCVTQQ2PSZrrbkz\000" |
| 66594 | /* 263494 */ "VCVTUQQ2PSZrrbkz\000" |
| 66595 | /* 263511 */ "VSUBPSZrrbkz\000" |
| 66596 | /* 263524 */ "VADDPSZrrbkz\000" |
| 66597 | /* 263537 */ "VSCALEFPSZrrbkz\000" |
| 66598 | /* 263553 */ "VMULPSZrrbkz\000" |
| 66599 | /* 263566 */ "VMINPSZrrbkz\000" |
| 66600 | /* 263579 */ "VDIVPSZrrbkz\000" |
| 66601 | /* 263592 */ "VMAXPSZrrbkz\000" |
| 66602 | /* 263605 */ "VCVTTPD2DQSZrrbkz\000" |
| 66603 | /* 263623 */ "VCVTTPS2DQSZrrbkz\000" |
| 66604 | /* 263641 */ "VCVTTPD2UDQSZrrbkz\000" |
| 66605 | /* 263660 */ "VCVTTPS2UDQSZrrbkz\000" |
| 66606 | /* 263679 */ "VCVTTPD2QQSZrrbkz\000" |
| 66607 | /* 263697 */ "VCVTTPS2QQSZrrbkz\000" |
| 66608 | /* 263715 */ "VCVTTPD2UQQSZrrbkz\000" |
| 66609 | /* 263734 */ "VCVTTPS2UQQSZrrbkz\000" |
| 66610 | /* 263753 */ "VCVTTPH2WZrrbkz\000" |
| 66611 | /* 263769 */ "VCVTPH2WZrrbkz\000" |
| 66612 | /* 263784 */ "VCVTTPH2UWZrrbkz\000" |
| 66613 | /* 263801 */ "VCVTPH2UWZrrbkz\000" |
| 66614 | /* 263817 */ "VCVT2PS2PHXZrrbkz\000" |
| 66615 | /* 263835 */ "VCVTPS2PHXZrrbkz\000" |
| 66616 | /* 263852 */ "VCVTPH2PSXZrrbkz\000" |
| 66617 | /* 263869 */ "VPSRADZ256mbikz\000" |
| 66618 | /* 263885 */ "VPSHUFDZ256mbikz\000" |
| 66619 | /* 263902 */ "VPSLLDZ256mbikz\000" |
| 66620 | /* 263918 */ "VPROLDZ256mbikz\000" |
| 66621 | /* 263934 */ "VPSRLDZ256mbikz\000" |
| 66622 | /* 263950 */ "VPERMILPDZ256mbikz\000" |
| 66623 | /* 263969 */ "VPERMPDZ256mbikz\000" |
| 66624 | /* 263986 */ "VPRORDZ256mbikz\000" |
| 66625 | /* 264002 */ "VPSRAQZ256mbikz\000" |
| 66626 | /* 264018 */ "VPSLLQZ256mbikz\000" |
| 66627 | /* 264034 */ "VPROLQZ256mbikz\000" |
| 66628 | /* 264050 */ "VPSRLQZ256mbikz\000" |
| 66629 | /* 264066 */ "VPERMQZ256mbikz\000" |
| 66630 | /* 264082 */ "VPRORQZ256mbikz\000" |
| 66631 | /* 264098 */ "VPERMILPSZ256mbikz\000" |
| 66632 | /* 264117 */ "VPSRADZ128mbikz\000" |
| 66633 | /* 264133 */ "VPSHUFDZ128mbikz\000" |
| 66634 | /* 264150 */ "VPSLLDZ128mbikz\000" |
| 66635 | /* 264166 */ "VPROLDZ128mbikz\000" |
| 66636 | /* 264182 */ "VPSRLDZ128mbikz\000" |
| 66637 | /* 264198 */ "VPERMILPDZ128mbikz\000" |
| 66638 | /* 264217 */ "VPRORDZ128mbikz\000" |
| 66639 | /* 264233 */ "VPSRAQZ128mbikz\000" |
| 66640 | /* 264249 */ "VPSLLQZ128mbikz\000" |
| 66641 | /* 264265 */ "VPROLQZ128mbikz\000" |
| 66642 | /* 264281 */ "VPSRLQZ128mbikz\000" |
| 66643 | /* 264297 */ "VPRORQZ128mbikz\000" |
| 66644 | /* 264313 */ "VPERMILPSZ128mbikz\000" |
| 66645 | /* 264332 */ "VPSRADZmbikz\000" |
| 66646 | /* 264345 */ "VPSHUFDZmbikz\000" |
| 66647 | /* 264359 */ "VPSLLDZmbikz\000" |
| 66648 | /* 264372 */ "VPROLDZmbikz\000" |
| 66649 | /* 264385 */ "VPSRLDZmbikz\000" |
| 66650 | /* 264398 */ "VPERMILPDZmbikz\000" |
| 66651 | /* 264414 */ "VPERMPDZmbikz\000" |
| 66652 | /* 264428 */ "VPRORDZmbikz\000" |
| 66653 | /* 264441 */ "VPSRAQZmbikz\000" |
| 66654 | /* 264454 */ "VPSLLQZmbikz\000" |
| 66655 | /* 264467 */ "VPROLQZmbikz\000" |
| 66656 | /* 264480 */ "VPSRLQZmbikz\000" |
| 66657 | /* 264493 */ "VPERMQZmbikz\000" |
| 66658 | /* 264506 */ "VPRORQZmbikz\000" |
| 66659 | /* 264519 */ "VPERMILPSZmbikz\000" |
| 66660 | /* 264535 */ "VSHUFF64X2Z256rmbikz\000" |
| 66661 | /* 264556 */ "VSHUFI64X2Z256rmbikz\000" |
| 66662 | /* 264577 */ "VSHUFF32X4Z256rmbikz\000" |
| 66663 | /* 264598 */ "VSHUFI32X4Z256rmbikz\000" |
| 66664 | /* 264619 */ "VREDUCEBF16Z256rmbikz\000" |
| 66665 | /* 264641 */ "VRNDSCALEBF16Z256rmbikz\000" |
| 66666 | /* 264665 */ "VGETMANTBF16Z256rmbikz\000" |
| 66667 | /* 264688 */ "VMINMAXBF16Z256rmbikz\000" |
| 66668 | /* 264710 */ "VGF2P8AFFINEQBZ256rmbikz\000" |
| 66669 | /* 264735 */ "VGF2P8AFFINEINVQBZ256rmbikz\000" |
| 66670 | /* 264763 */ "VPSHLDDZ256rmbikz\000" |
| 66671 | /* 264781 */ "VPSHRDDZ256rmbikz\000" |
| 66672 | /* 264799 */ "VPTERNLOGDZ256rmbikz\000" |
| 66673 | /* 264820 */ "VALIGNDZ256rmbikz\000" |
| 66674 | /* 264838 */ "VREDUCEPDZ256rmbikz\000" |
| 66675 | /* 264858 */ "VRANGEPDZ256rmbikz\000" |
| 66676 | /* 264877 */ "VRNDSCALEPDZ256rmbikz\000" |
| 66677 | /* 264899 */ "VSHUFPDZ256rmbikz\000" |
| 66678 | /* 264917 */ "VFIXUPIMMPDZ256rmbikz\000" |
| 66679 | /* 264939 */ "VGETMANTPDZ256rmbikz\000" |
| 66680 | /* 264960 */ "VMINMAXPDZ256rmbikz\000" |
| 66681 | /* 264980 */ "VREDUCEPHZ256rmbikz\000" |
| 66682 | /* 265000 */ "VRNDSCALEPHZ256rmbikz\000" |
| 66683 | /* 265022 */ "VGETMANTPHZ256rmbikz\000" |
| 66684 | /* 265043 */ "VMINMAXPHZ256rmbikz\000" |
| 66685 | /* 265063 */ "VPSHLDQZ256rmbikz\000" |
| 66686 | /* 265081 */ "VPSHRDQZ256rmbikz\000" |
| 66687 | /* 265099 */ "VPTERNLOGQZ256rmbikz\000" |
| 66688 | /* 265120 */ "VALIGNQZ256rmbikz\000" |
| 66689 | /* 265138 */ "VREDUCEPSZ256rmbikz\000" |
| 66690 | /* 265158 */ "VRANGEPSZ256rmbikz\000" |
| 66691 | /* 265177 */ "VRNDSCALEPSZ256rmbikz\000" |
| 66692 | /* 265199 */ "VSHUFPSZ256rmbikz\000" |
| 66693 | /* 265217 */ "VFIXUPIMMPSZ256rmbikz\000" |
| 66694 | /* 265239 */ "VGETMANTPSZ256rmbikz\000" |
| 66695 | /* 265260 */ "VMINMAXPSZ256rmbikz\000" |
| 66696 | /* 265280 */ "VREDUCEBF16Z128rmbikz\000" |
| 66697 | /* 265302 */ "VRNDSCALEBF16Z128rmbikz\000" |
| 66698 | /* 265326 */ "VGETMANTBF16Z128rmbikz\000" |
| 66699 | /* 265349 */ "VMINMAXBF16Z128rmbikz\000" |
| 66700 | /* 265371 */ "VGF2P8AFFINEQBZ128rmbikz\000" |
| 66701 | /* 265396 */ "VGF2P8AFFINEINVQBZ128rmbikz\000" |
| 66702 | /* 265424 */ "VPSHLDDZ128rmbikz\000" |
| 66703 | /* 265442 */ "VPSHRDDZ128rmbikz\000" |
| 66704 | /* 265460 */ "VPTERNLOGDZ128rmbikz\000" |
| 66705 | /* 265481 */ "VALIGNDZ128rmbikz\000" |
| 66706 | /* 265499 */ "VREDUCEPDZ128rmbikz\000" |
| 66707 | /* 265519 */ "VRANGEPDZ128rmbikz\000" |
| 66708 | /* 265538 */ "VRNDSCALEPDZ128rmbikz\000" |
| 66709 | /* 265560 */ "VSHUFPDZ128rmbikz\000" |
| 66710 | /* 265578 */ "VFIXUPIMMPDZ128rmbikz\000" |
| 66711 | /* 265600 */ "VGETMANTPDZ128rmbikz\000" |
| 66712 | /* 265621 */ "VMINMAXPDZ128rmbikz\000" |
| 66713 | /* 265641 */ "VREDUCEPHZ128rmbikz\000" |
| 66714 | /* 265661 */ "VRNDSCALEPHZ128rmbikz\000" |
| 66715 | /* 265683 */ "VGETMANTPHZ128rmbikz\000" |
| 66716 | /* 265704 */ "VMINMAXPHZ128rmbikz\000" |
| 66717 | /* 265724 */ "VPSHLDQZ128rmbikz\000" |
| 66718 | /* 265742 */ "VPSHRDQZ128rmbikz\000" |
| 66719 | /* 265760 */ "VPTERNLOGQZ128rmbikz\000" |
| 66720 | /* 265781 */ "VALIGNQZ128rmbikz\000" |
| 66721 | /* 265799 */ "VREDUCEPSZ128rmbikz\000" |
| 66722 | /* 265819 */ "VRANGEPSZ128rmbikz\000" |
| 66723 | /* 265838 */ "VRNDSCALEPSZ128rmbikz\000" |
| 66724 | /* 265860 */ "VSHUFPSZ128rmbikz\000" |
| 66725 | /* 265878 */ "VFIXUPIMMPSZ128rmbikz\000" |
| 66726 | /* 265900 */ "VGETMANTPSZ128rmbikz\000" |
| 66727 | /* 265921 */ "VMINMAXPSZ128rmbikz\000" |
| 66728 | /* 265941 */ "VSHUFF64X2Zrmbikz\000" |
| 66729 | /* 265959 */ "VSHUFI64X2Zrmbikz\000" |
| 66730 | /* 265977 */ "VSHUFF32X4Zrmbikz\000" |
| 66731 | /* 265995 */ "VSHUFI32X4Zrmbikz\000" |
| 66732 | /* 266013 */ "VREDUCEBF16Zrmbikz\000" |
| 66733 | /* 266032 */ "VRNDSCALEBF16Zrmbikz\000" |
| 66734 | /* 266053 */ "VGETMANTBF16Zrmbikz\000" |
| 66735 | /* 266073 */ "VMINMAXBF16Zrmbikz\000" |
| 66736 | /* 266092 */ "VGF2P8AFFINEQBZrmbikz\000" |
| 66737 | /* 266114 */ "VGF2P8AFFINEINVQBZrmbikz\000" |
| 66738 | /* 266139 */ "VPSHLDDZrmbikz\000" |
| 66739 | /* 266154 */ "VPSHRDDZrmbikz\000" |
| 66740 | /* 266169 */ "VPTERNLOGDZrmbikz\000" |
| 66741 | /* 266187 */ "VALIGNDZrmbikz\000" |
| 66742 | /* 266202 */ "VREDUCEPDZrmbikz\000" |
| 66743 | /* 266219 */ "VRANGEPDZrmbikz\000" |
| 66744 | /* 266235 */ "VRNDSCALEPDZrmbikz\000" |
| 66745 | /* 266254 */ "VSHUFPDZrmbikz\000" |
| 66746 | /* 266269 */ "VFIXUPIMMPDZrmbikz\000" |
| 66747 | /* 266288 */ "VGETMANTPDZrmbikz\000" |
| 66748 | /* 266306 */ "VMINMAXPDZrmbikz\000" |
| 66749 | /* 266323 */ "VREDUCEPHZrmbikz\000" |
| 66750 | /* 266340 */ "VRNDSCALEPHZrmbikz\000" |
| 66751 | /* 266359 */ "VGETMANTPHZrmbikz\000" |
| 66752 | /* 266377 */ "VMINMAXPHZrmbikz\000" |
| 66753 | /* 266394 */ "VPSHLDQZrmbikz\000" |
| 66754 | /* 266409 */ "VPSHRDQZrmbikz\000" |
| 66755 | /* 266424 */ "VPTERNLOGQZrmbikz\000" |
| 66756 | /* 266442 */ "VALIGNQZrmbikz\000" |
| 66757 | /* 266457 */ "VREDUCEPSZrmbikz\000" |
| 66758 | /* 266474 */ "VRANGEPSZrmbikz\000" |
| 66759 | /* 266490 */ "VRNDSCALEPSZrmbikz\000" |
| 66760 | /* 266509 */ "VSHUFPSZrmbikz\000" |
| 66761 | /* 266524 */ "VFIXUPIMMPSZrmbikz\000" |
| 66762 | /* 266543 */ "VGETMANTPSZrmbikz\000" |
| 66763 | /* 266561 */ "VMINMAXPSZrmbikz\000" |
| 66764 | /* 266578 */ "VPSRADZ256mikz\000" |
| 66765 | /* 266593 */ "VPSHUFDZ256mikz\000" |
| 66766 | /* 266609 */ "VPSLLDZ256mikz\000" |
| 66767 | /* 266624 */ "VPROLDZ256mikz\000" |
| 66768 | /* 266639 */ "VPSRLDZ256mikz\000" |
| 66769 | /* 266654 */ "VPERMILPDZ256mikz\000" |
| 66770 | /* 266672 */ "VPERMPDZ256mikz\000" |
| 66771 | /* 266688 */ "VPRORDZ256mikz\000" |
| 66772 | /* 266703 */ "VPSRAQZ256mikz\000" |
| 66773 | /* 266718 */ "VPSLLQZ256mikz\000" |
| 66774 | /* 266733 */ "VPROLQZ256mikz\000" |
| 66775 | /* 266748 */ "VPSRLQZ256mikz\000" |
| 66776 | /* 266763 */ "VPERMQZ256mikz\000" |
| 66777 | /* 266778 */ "VPRORQZ256mikz\000" |
| 66778 | /* 266793 */ "VPERMILPSZ256mikz\000" |
| 66779 | /* 266811 */ "VPSRAWZ256mikz\000" |
| 66780 | /* 266826 */ "VPSHUFHWZ256mikz\000" |
| 66781 | /* 266843 */ "VPSHUFLWZ256mikz\000" |
| 66782 | /* 266860 */ "VPSLLWZ256mikz\000" |
| 66783 | /* 266875 */ "VPSRLWZ256mikz\000" |
| 66784 | /* 266890 */ "VPSRADZ128mikz\000" |
| 66785 | /* 266905 */ "VPSHUFDZ128mikz\000" |
| 66786 | /* 266921 */ "VPSLLDZ128mikz\000" |
| 66787 | /* 266936 */ "VPROLDZ128mikz\000" |
| 66788 | /* 266951 */ "VPSRLDZ128mikz\000" |
| 66789 | /* 266966 */ "VPERMILPDZ128mikz\000" |
| 66790 | /* 266984 */ "VPRORDZ128mikz\000" |
| 66791 | /* 266999 */ "VPSRAQZ128mikz\000" |
| 66792 | /* 267014 */ "VPSLLQZ128mikz\000" |
| 66793 | /* 267029 */ "VPROLQZ128mikz\000" |
| 66794 | /* 267044 */ "VPSRLQZ128mikz\000" |
| 66795 | /* 267059 */ "VPRORQZ128mikz\000" |
| 66796 | /* 267074 */ "VPERMILPSZ128mikz\000" |
| 66797 | /* 267092 */ "VPSRAWZ128mikz\000" |
| 66798 | /* 267107 */ "VPSHUFHWZ128mikz\000" |
| 66799 | /* 267124 */ "VPSHUFLWZ128mikz\000" |
| 66800 | /* 267141 */ "VPSLLWZ128mikz\000" |
| 66801 | /* 267156 */ "VPSRLWZ128mikz\000" |
| 66802 | /* 267171 */ "VPSRADZmikz\000" |
| 66803 | /* 267183 */ "VPSHUFDZmikz\000" |
| 66804 | /* 267196 */ "VPSLLDZmikz\000" |
| 66805 | /* 267208 */ "VPROLDZmikz\000" |
| 66806 | /* 267220 */ "VPSRLDZmikz\000" |
| 66807 | /* 267232 */ "VPERMILPDZmikz\000" |
| 66808 | /* 267247 */ "VPERMPDZmikz\000" |
| 66809 | /* 267260 */ "VPRORDZmikz\000" |
| 66810 | /* 267272 */ "VPSRAQZmikz\000" |
| 66811 | /* 267284 */ "VPSLLQZmikz\000" |
| 66812 | /* 267296 */ "VPROLQZmikz\000" |
| 66813 | /* 267308 */ "VPSRLQZmikz\000" |
| 66814 | /* 267320 */ "VPERMQZmikz\000" |
| 66815 | /* 267332 */ "VPRORQZmikz\000" |
| 66816 | /* 267344 */ "VPERMILPSZmikz\000" |
| 66817 | /* 267359 */ "VPSRAWZmikz\000" |
| 66818 | /* 267371 */ "VPSHUFHWZmikz\000" |
| 66819 | /* 267385 */ "VPSHUFLWZmikz\000" |
| 66820 | /* 267399 */ "VPSLLWZmikz\000" |
| 66821 | /* 267411 */ "VPSRLWZmikz\000" |
| 66822 | /* 267423 */ "VSHUFF64X2Z256rmikz\000" |
| 66823 | /* 267443 */ "VINSERTF64X2Z256rmikz\000" |
| 66824 | /* 267465 */ "VSHUFI64X2Z256rmikz\000" |
| 66825 | /* 267485 */ "VINSERTI64X2Z256rmikz\000" |
| 66826 | /* 267507 */ "VSHUFF32X4Z256rmikz\000" |
| 66827 | /* 267527 */ "VINSERTF32X4Z256rmikz\000" |
| 66828 | /* 267549 */ "VSHUFI32X4Z256rmikz\000" |
| 66829 | /* 267569 */ "VINSERTI32X4Z256rmikz\000" |
| 66830 | /* 267591 */ "VREDUCEBF16Z256rmikz\000" |
| 66831 | /* 267612 */ "VRNDSCALEBF16Z256rmikz\000" |
| 66832 | /* 267635 */ "VGETMANTBF16Z256rmikz\000" |
| 66833 | /* 267657 */ "VMINMAXBF16Z256rmikz\000" |
| 66834 | /* 267678 */ "VGF2P8AFFINEQBZ256rmikz\000" |
| 66835 | /* 267702 */ "VGF2P8AFFINEINVQBZ256rmikz\000" |
| 66836 | /* 267729 */ "VPSHLDDZ256rmikz\000" |
| 66837 | /* 267746 */ "VPSHRDDZ256rmikz\000" |
| 66838 | /* 267763 */ "VPTERNLOGDZ256rmikz\000" |
| 66839 | /* 267783 */ "VALIGNDZ256rmikz\000" |
| 66840 | /* 267800 */ "VREDUCEPDZ256rmikz\000" |
| 66841 | /* 267819 */ "VRANGEPDZ256rmikz\000" |
| 66842 | /* 267837 */ "VRNDSCALEPDZ256rmikz\000" |
| 66843 | /* 267858 */ "VSHUFPDZ256rmikz\000" |
| 66844 | /* 267875 */ "VFIXUPIMMPDZ256rmikz\000" |
| 66845 | /* 267896 */ "VGETMANTPDZ256rmikz\000" |
| 66846 | /* 267916 */ "VMINMAXPDZ256rmikz\000" |
| 66847 | /* 267935 */ "VREDUCEPHZ256rmikz\000" |
| 66848 | /* 267954 */ "VRNDSCALEPHZ256rmikz\000" |
| 66849 | /* 267975 */ "VGETMANTPHZ256rmikz\000" |
| 66850 | /* 267995 */ "VMINMAXPHZ256rmikz\000" |
| 66851 | /* 268014 */ "VPSHLDQZ256rmikz\000" |
| 66852 | /* 268031 */ "VPSHRDQZ256rmikz\000" |
| 66853 | /* 268048 */ "VPTERNLOGQZ256rmikz\000" |
| 66854 | /* 268068 */ "VALIGNQZ256rmikz\000" |
| 66855 | /* 268085 */ "VPALIGNRZ256rmikz\000" |
| 66856 | /* 268103 */ "VREDUCEPSZ256rmikz\000" |
| 66857 | /* 268122 */ "VRANGEPSZ256rmikz\000" |
| 66858 | /* 268140 */ "VRNDSCALEPSZ256rmikz\000" |
| 66859 | /* 268161 */ "VSHUFPSZ256rmikz\000" |
| 66860 | /* 268178 */ "VFIXUPIMMPSZ256rmikz\000" |
| 66861 | /* 268199 */ "VGETMANTPSZ256rmikz\000" |
| 66862 | /* 268219 */ "VMINMAXPSZ256rmikz\000" |
| 66863 | /* 268238 */ "VDBPSADBWZ256rmikz\000" |
| 66864 | /* 268257 */ "VMPSADBWZ256rmikz\000" |
| 66865 | /* 268275 */ "VPSHLDWZ256rmikz\000" |
| 66866 | /* 268292 */ "VPSHRDWZ256rmikz\000" |
| 66867 | /* 268309 */ "VREDUCEBF16Z128rmikz\000" |
| 66868 | /* 268330 */ "VRNDSCALEBF16Z128rmikz\000" |
| 66869 | /* 268353 */ "VGETMANTBF16Z128rmikz\000" |
| 66870 | /* 268375 */ "VMINMAXBF16Z128rmikz\000" |
| 66871 | /* 268396 */ "VGF2P8AFFINEQBZ128rmikz\000" |
| 66872 | /* 268420 */ "VGF2P8AFFINEINVQBZ128rmikz\000" |
| 66873 | /* 268447 */ "VPSHLDDZ128rmikz\000" |
| 66874 | /* 268464 */ "VPSHRDDZ128rmikz\000" |
| 66875 | /* 268481 */ "VPTERNLOGDZ128rmikz\000" |
| 66876 | /* 268501 */ "VALIGNDZ128rmikz\000" |
| 66877 | /* 268518 */ "VREDUCEPDZ128rmikz\000" |
| 66878 | /* 268537 */ "VRANGEPDZ128rmikz\000" |
| 66879 | /* 268555 */ "VRNDSCALEPDZ128rmikz\000" |
| 66880 | /* 268576 */ "VSHUFPDZ128rmikz\000" |
| 66881 | /* 268593 */ "VFIXUPIMMPDZ128rmikz\000" |
| 66882 | /* 268614 */ "VGETMANTPDZ128rmikz\000" |
| 66883 | /* 268634 */ "VMINMAXPDZ128rmikz\000" |
| 66884 | /* 268653 */ "VREDUCEPHZ128rmikz\000" |
| 66885 | /* 268672 */ "VRNDSCALEPHZ128rmikz\000" |
| 66886 | /* 268693 */ "VGETMANTPHZ128rmikz\000" |
| 66887 | /* 268713 */ "VMINMAXPHZ128rmikz\000" |
| 66888 | /* 268732 */ "VPSHLDQZ128rmikz\000" |
| 66889 | /* 268749 */ "VPSHRDQZ128rmikz\000" |
| 66890 | /* 268766 */ "VPTERNLOGQZ128rmikz\000" |
| 66891 | /* 268786 */ "VALIGNQZ128rmikz\000" |
| 66892 | /* 268803 */ "VPALIGNRZ128rmikz\000" |
| 66893 | /* 268821 */ "VREDUCEPSZ128rmikz\000" |
| 66894 | /* 268840 */ "VRANGEPSZ128rmikz\000" |
| 66895 | /* 268858 */ "VRNDSCALEPSZ128rmikz\000" |
| 66896 | /* 268879 */ "VSHUFPSZ128rmikz\000" |
| 66897 | /* 268896 */ "VFIXUPIMMPSZ128rmikz\000" |
| 66898 | /* 268917 */ "VGETMANTPSZ128rmikz\000" |
| 66899 | /* 268937 */ "VMINMAXPSZ128rmikz\000" |
| 66900 | /* 268956 */ "VDBPSADBWZ128rmikz\000" |
| 66901 | /* 268975 */ "VMPSADBWZ128rmikz\000" |
| 66902 | /* 268993 */ "VPSHLDWZ128rmikz\000" |
| 66903 | /* 269010 */ "VPSHRDWZ128rmikz\000" |
| 66904 | /* 269027 */ "VSHUFF64X2Zrmikz\000" |
| 66905 | /* 269044 */ "VINSERTF64X2Zrmikz\000" |
| 66906 | /* 269063 */ "VSHUFI64X2Zrmikz\000" |
| 66907 | /* 269080 */ "VINSERTI64X2Zrmikz\000" |
| 66908 | /* 269099 */ "VSHUFF32X4Zrmikz\000" |
| 66909 | /* 269116 */ "VINSERTF32X4Zrmikz\000" |
| 66910 | /* 269135 */ "VSHUFI32X4Zrmikz\000" |
| 66911 | /* 269152 */ "VINSERTI32X4Zrmikz\000" |
| 66912 | /* 269171 */ "VINSERTF64X4Zrmikz\000" |
| 66913 | /* 269190 */ "VINSERTI64X4Zrmikz\000" |
| 66914 | /* 269209 */ "VREDUCEBF16Zrmikz\000" |
| 66915 | /* 269227 */ "VRNDSCALEBF16Zrmikz\000" |
| 66916 | /* 269247 */ "VGETMANTBF16Zrmikz\000" |
| 66917 | /* 269266 */ "VMINMAXBF16Zrmikz\000" |
| 66918 | /* 269284 */ "VINSERTF32X8Zrmikz\000" |
| 66919 | /* 269303 */ "VINSERTI32X8Zrmikz\000" |
| 66920 | /* 269322 */ "VGF2P8AFFINEQBZrmikz\000" |
| 66921 | /* 269343 */ "VGF2P8AFFINEINVQBZrmikz\000" |
| 66922 | /* 269367 */ "VPSHLDDZrmikz\000" |
| 66923 | /* 269381 */ "VPSHRDDZrmikz\000" |
| 66924 | /* 269395 */ "VPTERNLOGDZrmikz\000" |
| 66925 | /* 269412 */ "VALIGNDZrmikz\000" |
| 66926 | /* 269426 */ "VREDUCEPDZrmikz\000" |
| 66927 | /* 269442 */ "VRANGEPDZrmikz\000" |
| 66928 | /* 269457 */ "VRNDSCALEPDZrmikz\000" |
| 66929 | /* 269475 */ "VSHUFPDZrmikz\000" |
| 66930 | /* 269489 */ "VFIXUPIMMPDZrmikz\000" |
| 66931 | /* 269507 */ "VGETMANTPDZrmikz\000" |
| 66932 | /* 269524 */ "VMINMAXPDZrmikz\000" |
| 66933 | /* 269540 */ "VREDUCESDZrmikz\000" |
| 66934 | /* 269556 */ "VRANGESDZrmikz\000" |
| 66935 | /* 269571 */ "VFIXUPIMMSDZrmikz\000" |
| 66936 | /* 269589 */ "VGETMANTSDZrmikz\000" |
| 66937 | /* 269606 */ "VREDUCEPHZrmikz\000" |
| 66938 | /* 269622 */ "VRNDSCALEPHZrmikz\000" |
| 66939 | /* 269640 */ "VGETMANTPHZrmikz\000" |
| 66940 | /* 269657 */ "VMINMAXPHZrmikz\000" |
| 66941 | /* 269673 */ "VREDUCESHZrmikz\000" |
| 66942 | /* 269689 */ "VGETMANTSHZrmikz\000" |
| 66943 | /* 269706 */ "VPSHLDQZrmikz\000" |
| 66944 | /* 269720 */ "VPSHRDQZrmikz\000" |
| 66945 | /* 269734 */ "VPTERNLOGQZrmikz\000" |
| 66946 | /* 269751 */ "VALIGNQZrmikz\000" |
| 66947 | /* 269765 */ "VPALIGNRZrmikz\000" |
| 66948 | /* 269780 */ "VREDUCEPSZrmikz\000" |
| 66949 | /* 269796 */ "VRANGEPSZrmikz\000" |
| 66950 | /* 269811 */ "VRNDSCALEPSZrmikz\000" |
| 66951 | /* 269829 */ "VSHUFPSZrmikz\000" |
| 66952 | /* 269843 */ "VFIXUPIMMPSZrmikz\000" |
| 66953 | /* 269861 */ "VGETMANTPSZrmikz\000" |
| 66954 | /* 269878 */ "VMINMAXPSZrmikz\000" |
| 66955 | /* 269894 */ "VREDUCESSZrmikz\000" |
| 66956 | /* 269910 */ "VRANGESSZrmikz\000" |
| 66957 | /* 269925 */ "VFIXUPIMMSSZrmikz\000" |
| 66958 | /* 269943 */ "VGETMANTSSZrmikz\000" |
| 66959 | /* 269960 */ "VDBPSADBWZrmikz\000" |
| 66960 | /* 269976 */ "VMPSADBWZrmikz\000" |
| 66961 | /* 269991 */ "VPSHLDWZrmikz\000" |
| 66962 | /* 270005 */ "VPSHRDWZrmikz\000" |
| 66963 | /* 270019 */ "VPSRADZ256rikz\000" |
| 66964 | /* 270034 */ "VPSHUFDZ256rikz\000" |
| 66965 | /* 270050 */ "VPSLLDZ256rikz\000" |
| 66966 | /* 270065 */ "VPROLDZ256rikz\000" |
| 66967 | /* 270080 */ "VPSRLDZ256rikz\000" |
| 66968 | /* 270095 */ "VPERMILPDZ256rikz\000" |
| 66969 | /* 270113 */ "VPERMPDZ256rikz\000" |
| 66970 | /* 270129 */ "VPRORDZ256rikz\000" |
| 66971 | /* 270144 */ "VPSRAQZ256rikz\000" |
| 66972 | /* 270159 */ "VPSLLQZ256rikz\000" |
| 66973 | /* 270174 */ "VPROLQZ256rikz\000" |
| 66974 | /* 270189 */ "VPSRLQZ256rikz\000" |
| 66975 | /* 270204 */ "VPERMQZ256rikz\000" |
| 66976 | /* 270219 */ "VPRORQZ256rikz\000" |
| 66977 | /* 270234 */ "VPERMILPSZ256rikz\000" |
| 66978 | /* 270252 */ "VPSRAWZ256rikz\000" |
| 66979 | /* 270267 */ "VPSHUFHWZ256rikz\000" |
| 66980 | /* 270284 */ "VPSHUFLWZ256rikz\000" |
| 66981 | /* 270301 */ "VPSLLWZ256rikz\000" |
| 66982 | /* 270316 */ "VPSRLWZ256rikz\000" |
| 66983 | /* 270331 */ "VPSRADZ128rikz\000" |
| 66984 | /* 270346 */ "VPSHUFDZ128rikz\000" |
| 66985 | /* 270362 */ "VPSLLDZ128rikz\000" |
| 66986 | /* 270377 */ "VPROLDZ128rikz\000" |
| 66987 | /* 270392 */ "VPSRLDZ128rikz\000" |
| 66988 | /* 270407 */ "VPERMILPDZ128rikz\000" |
| 66989 | /* 270425 */ "VPRORDZ128rikz\000" |
| 66990 | /* 270440 */ "VPSRAQZ128rikz\000" |
| 66991 | /* 270455 */ "VPSLLQZ128rikz\000" |
| 66992 | /* 270470 */ "VPROLQZ128rikz\000" |
| 66993 | /* 270485 */ "VPSRLQZ128rikz\000" |
| 66994 | /* 270500 */ "VPRORQZ128rikz\000" |
| 66995 | /* 270515 */ "VPERMILPSZ128rikz\000" |
| 66996 | /* 270533 */ "VPSRAWZ128rikz\000" |
| 66997 | /* 270548 */ "VPSHUFHWZ128rikz\000" |
| 66998 | /* 270565 */ "VPSHUFLWZ128rikz\000" |
| 66999 | /* 270582 */ "VPSLLWZ128rikz\000" |
| 67000 | /* 270597 */ "VPSRLWZ128rikz\000" |
| 67001 | /* 270612 */ "VPSRADZrikz\000" |
| 67002 | /* 270624 */ "VPSHUFDZrikz\000" |
| 67003 | /* 270637 */ "VPSLLDZrikz\000" |
| 67004 | /* 270649 */ "VPROLDZrikz\000" |
| 67005 | /* 270661 */ "VPSRLDZrikz\000" |
| 67006 | /* 270673 */ "VPERMILPDZrikz\000" |
| 67007 | /* 270688 */ "VPERMPDZrikz\000" |
| 67008 | /* 270701 */ "VPRORDZrikz\000" |
| 67009 | /* 270713 */ "VPSRAQZrikz\000" |
| 67010 | /* 270725 */ "VPSLLQZrikz\000" |
| 67011 | /* 270737 */ "VPROLQZrikz\000" |
| 67012 | /* 270749 */ "VPSRLQZrikz\000" |
| 67013 | /* 270761 */ "VPERMQZrikz\000" |
| 67014 | /* 270773 */ "VPRORQZrikz\000" |
| 67015 | /* 270785 */ "VPERMILPSZrikz\000" |
| 67016 | /* 270800 */ "VPSRAWZrikz\000" |
| 67017 | /* 270812 */ "VPSHUFHWZrikz\000" |
| 67018 | /* 270826 */ "VPSHUFLWZrikz\000" |
| 67019 | /* 270840 */ "VPSLLWZrikz\000" |
| 67020 | /* 270852 */ "VPSRLWZrikz\000" |
| 67021 | /* 270864 */ "VSHUFF64X2Z256rrikz\000" |
| 67022 | /* 270884 */ "VEXTRACTF64X2Z256rrikz\000" |
| 67023 | /* 270907 */ "VINSERTF64X2Z256rrikz\000" |
| 67024 | /* 270929 */ "VSHUFI64X2Z256rrikz\000" |
| 67025 | /* 270949 */ "VEXTRACTI64X2Z256rrikz\000" |
| 67026 | /* 270972 */ "VINSERTI64X2Z256rrikz\000" |
| 67027 | /* 270994 */ "VSHUFF32X4Z256rrikz\000" |
| 67028 | /* 271014 */ "VEXTRACTF32X4Z256rrikz\000" |
| 67029 | /* 271037 */ "VINSERTF32X4Z256rrikz\000" |
| 67030 | /* 271059 */ "VSHUFI32X4Z256rrikz\000" |
| 67031 | /* 271079 */ "VEXTRACTI32X4Z256rrikz\000" |
| 67032 | /* 271102 */ "VINSERTI32X4Z256rrikz\000" |
| 67033 | /* 271124 */ "VREDUCEBF16Z256rrikz\000" |
| 67034 | /* 271145 */ "VRNDSCALEBF16Z256rrikz\000" |
| 67035 | /* 271168 */ "VGETMANTBF16Z256rrikz\000" |
| 67036 | /* 271190 */ "VMINMAXBF16Z256rrikz\000" |
| 67037 | /* 271211 */ "VGF2P8AFFINEQBZ256rrikz\000" |
| 67038 | /* 271235 */ "VGF2P8AFFINEINVQBZ256rrikz\000" |
| 67039 | /* 271262 */ "VPSHLDDZ256rrikz\000" |
| 67040 | /* 271279 */ "VPSHRDDZ256rrikz\000" |
| 67041 | /* 271296 */ "VPTERNLOGDZ256rrikz\000" |
| 67042 | /* 271316 */ "VALIGNDZ256rrikz\000" |
| 67043 | /* 271333 */ "VREDUCEPDZ256rrikz\000" |
| 67044 | /* 271352 */ "VRANGEPDZ256rrikz\000" |
| 67045 | /* 271370 */ "VRNDSCALEPDZ256rrikz\000" |
| 67046 | /* 271391 */ "VSHUFPDZ256rrikz\000" |
| 67047 | /* 271408 */ "VFIXUPIMMPDZ256rrikz\000" |
| 67048 | /* 271429 */ "VGETMANTPDZ256rrikz\000" |
| 67049 | /* 271449 */ "VMINMAXPDZ256rrikz\000" |
| 67050 | /* 271468 */ "VREDUCEPHZ256rrikz\000" |
| 67051 | /* 271487 */ "VRNDSCALEPHZ256rrikz\000" |
| 67052 | /* 271508 */ "VGETMANTPHZ256rrikz\000" |
| 67053 | /* 271528 */ "VMINMAXPHZ256rrikz\000" |
| 67054 | /* 271547 */ "VPSHLDQZ256rrikz\000" |
| 67055 | /* 271564 */ "VPSHRDQZ256rrikz\000" |
| 67056 | /* 271581 */ "VPTERNLOGQZ256rrikz\000" |
| 67057 | /* 271601 */ "VALIGNQZ256rrikz\000" |
| 67058 | /* 271618 */ "VPALIGNRZ256rrikz\000" |
| 67059 | /* 271636 */ "VREDUCEPSZ256rrikz\000" |
| 67060 | /* 271655 */ "VRANGEPSZ256rrikz\000" |
| 67061 | /* 271673 */ "VRNDSCALEPSZ256rrikz\000" |
| 67062 | /* 271694 */ "VSHUFPSZ256rrikz\000" |
| 67063 | /* 271711 */ "VFIXUPIMMPSZ256rrikz\000" |
| 67064 | /* 271732 */ "VGETMANTPSZ256rrikz\000" |
| 67065 | /* 271752 */ "VMINMAXPSZ256rrikz\000" |
| 67066 | /* 271771 */ "VDBPSADBWZ256rrikz\000" |
| 67067 | /* 271790 */ "VMPSADBWZ256rrikz\000" |
| 67068 | /* 271808 */ "VPSHLDWZ256rrikz\000" |
| 67069 | /* 271825 */ "VPSHRDWZ256rrikz\000" |
| 67070 | /* 271842 */ "VREDUCEBF16Z128rrikz\000" |
| 67071 | /* 271863 */ "VRNDSCALEBF16Z128rrikz\000" |
| 67072 | /* 271886 */ "VGETMANTBF16Z128rrikz\000" |
| 67073 | /* 271908 */ "VMINMAXBF16Z128rrikz\000" |
| 67074 | /* 271929 */ "VGF2P8AFFINEQBZ128rrikz\000" |
| 67075 | /* 271953 */ "VGF2P8AFFINEINVQBZ128rrikz\000" |
| 67076 | /* 271980 */ "VPSHLDDZ128rrikz\000" |
| 67077 | /* 271997 */ "VPSHRDDZ128rrikz\000" |
| 67078 | /* 272014 */ "VPTERNLOGDZ128rrikz\000" |
| 67079 | /* 272034 */ "VALIGNDZ128rrikz\000" |
| 67080 | /* 272051 */ "VREDUCEPDZ128rrikz\000" |
| 67081 | /* 272070 */ "VRANGEPDZ128rrikz\000" |
| 67082 | /* 272088 */ "VRNDSCALEPDZ128rrikz\000" |
| 67083 | /* 272109 */ "VSHUFPDZ128rrikz\000" |
| 67084 | /* 272126 */ "VFIXUPIMMPDZ128rrikz\000" |
| 67085 | /* 272147 */ "VGETMANTPDZ128rrikz\000" |
| 67086 | /* 272167 */ "VMINMAXPDZ128rrikz\000" |
| 67087 | /* 272186 */ "VREDUCEPHZ128rrikz\000" |
| 67088 | /* 272205 */ "VRNDSCALEPHZ128rrikz\000" |
| 67089 | /* 272226 */ "VGETMANTPHZ128rrikz\000" |
| 67090 | /* 272246 */ "VMINMAXPHZ128rrikz\000" |
| 67091 | /* 272265 */ "VPSHLDQZ128rrikz\000" |
| 67092 | /* 272282 */ "VPSHRDQZ128rrikz\000" |
| 67093 | /* 272299 */ "VPTERNLOGQZ128rrikz\000" |
| 67094 | /* 272319 */ "VALIGNQZ128rrikz\000" |
| 67095 | /* 272336 */ "VPALIGNRZ128rrikz\000" |
| 67096 | /* 272354 */ "VREDUCEPSZ128rrikz\000" |
| 67097 | /* 272373 */ "VRANGEPSZ128rrikz\000" |
| 67098 | /* 272391 */ "VRNDSCALEPSZ128rrikz\000" |
| 67099 | /* 272412 */ "VSHUFPSZ128rrikz\000" |
| 67100 | /* 272429 */ "VFIXUPIMMPSZ128rrikz\000" |
| 67101 | /* 272450 */ "VGETMANTPSZ128rrikz\000" |
| 67102 | /* 272470 */ "VMINMAXPSZ128rrikz\000" |
| 67103 | /* 272489 */ "VDBPSADBWZ128rrikz\000" |
| 67104 | /* 272508 */ "VMPSADBWZ128rrikz\000" |
| 67105 | /* 272526 */ "VPSHLDWZ128rrikz\000" |
| 67106 | /* 272543 */ "VPSHRDWZ128rrikz\000" |
| 67107 | /* 272560 */ "VSHUFF64X2Zrrikz\000" |
| 67108 | /* 272577 */ "VEXTRACTF64X2Zrrikz\000" |
| 67109 | /* 272597 */ "VINSERTF64X2Zrrikz\000" |
| 67110 | /* 272616 */ "VSHUFI64X2Zrrikz\000" |
| 67111 | /* 272633 */ "VEXTRACTI64X2Zrrikz\000" |
| 67112 | /* 272653 */ "VINSERTI64X2Zrrikz\000" |
| 67113 | /* 272672 */ "VSHUFF32X4Zrrikz\000" |
| 67114 | /* 272689 */ "VEXTRACTF32X4Zrrikz\000" |
| 67115 | /* 272709 */ "VINSERTF32X4Zrrikz\000" |
| 67116 | /* 272728 */ "VSHUFI32X4Zrrikz\000" |
| 67117 | /* 272745 */ "VEXTRACTI32X4Zrrikz\000" |
| 67118 | /* 272765 */ "VINSERTI32X4Zrrikz\000" |
| 67119 | /* 272784 */ "VEXTRACTF64X4Zrrikz\000" |
| 67120 | /* 272804 */ "VINSERTF64X4Zrrikz\000" |
| 67121 | /* 272823 */ "VEXTRACTI64X4Zrrikz\000" |
| 67122 | /* 272843 */ "VINSERTI64X4Zrrikz\000" |
| 67123 | /* 272862 */ "VREDUCEBF16Zrrikz\000" |
| 67124 | /* 272880 */ "VRNDSCALEBF16Zrrikz\000" |
| 67125 | /* 272900 */ "VGETMANTBF16Zrrikz\000" |
| 67126 | /* 272919 */ "VMINMAXBF16Zrrikz\000" |
| 67127 | /* 272937 */ "VEXTRACTF32X8Zrrikz\000" |
| 67128 | /* 272957 */ "VINSERTF32X8Zrrikz\000" |
| 67129 | /* 272976 */ "VEXTRACTI32X8Zrrikz\000" |
| 67130 | /* 272996 */ "VINSERTI32X8Zrrikz\000" |
| 67131 | /* 273015 */ "VGF2P8AFFINEQBZrrikz\000" |
| 67132 | /* 273036 */ "VGF2P8AFFINEINVQBZrrikz\000" |
| 67133 | /* 273060 */ "VPSHLDDZrrikz\000" |
| 67134 | /* 273074 */ "VPSHRDDZrrikz\000" |
| 67135 | /* 273088 */ "VPTERNLOGDZrrikz\000" |
| 67136 | /* 273105 */ "VALIGNDZrrikz\000" |
| 67137 | /* 273119 */ "VREDUCEPDZrrikz\000" |
| 67138 | /* 273135 */ "VRANGEPDZrrikz\000" |
| 67139 | /* 273150 */ "VRNDSCALEPDZrrikz\000" |
| 67140 | /* 273168 */ "VSHUFPDZrrikz\000" |
| 67141 | /* 273182 */ "VFIXUPIMMPDZrrikz\000" |
| 67142 | /* 273200 */ "VGETMANTPDZrrikz\000" |
| 67143 | /* 273217 */ "VMINMAXPDZrrikz\000" |
| 67144 | /* 273233 */ "VREDUCESDZrrikz\000" |
| 67145 | /* 273249 */ "VRANGESDZrrikz\000" |
| 67146 | /* 273264 */ "VFIXUPIMMSDZrrikz\000" |
| 67147 | /* 273282 */ "VGETMANTSDZrrikz\000" |
| 67148 | /* 273299 */ "VREDUCEPHZrrikz\000" |
| 67149 | /* 273315 */ "VRNDSCALEPHZrrikz\000" |
| 67150 | /* 273333 */ "VGETMANTPHZrrikz\000" |
| 67151 | /* 273350 */ "VMINMAXPHZrrikz\000" |
| 67152 | /* 273366 */ "VREDUCESHZrrikz\000" |
| 67153 | /* 273382 */ "VGETMANTSHZrrikz\000" |
| 67154 | /* 273399 */ "VPSHLDQZrrikz\000" |
| 67155 | /* 273413 */ "VPSHRDQZrrikz\000" |
| 67156 | /* 273427 */ "VPTERNLOGQZrrikz\000" |
| 67157 | /* 273444 */ "VALIGNQZrrikz\000" |
| 67158 | /* 273458 */ "VPALIGNRZrrikz\000" |
| 67159 | /* 273473 */ "VREDUCEPSZrrikz\000" |
| 67160 | /* 273489 */ "VRANGEPSZrrikz\000" |
| 67161 | /* 273504 */ "VRNDSCALEPSZrrikz\000" |
| 67162 | /* 273522 */ "VSHUFPSZrrikz\000" |
| 67163 | /* 273536 */ "VFIXUPIMMPSZrrikz\000" |
| 67164 | /* 273554 */ "VGETMANTPSZrrikz\000" |
| 67165 | /* 273571 */ "VMINMAXPSZrrikz\000" |
| 67166 | /* 273587 */ "VREDUCESSZrrikz\000" |
| 67167 | /* 273603 */ "VRANGESSZrrikz\000" |
| 67168 | /* 273618 */ "VFIXUPIMMSSZrrikz\000" |
| 67169 | /* 273636 */ "VGETMANTSSZrrikz\000" |
| 67170 | /* 273653 */ "VDBPSADBWZrrikz\000" |
| 67171 | /* 273669 */ "VMPSADBWZrrikz\000" |
| 67172 | /* 273684 */ "VPSHLDWZrrikz\000" |
| 67173 | /* 273698 */ "VPSHRDWZrrikz\000" |
| 67174 | /* 273712 */ "VFMSUB231BF16Z256mkz\000" |
| 67175 | /* 273733 */ "VFNMSUB231BF16Z256mkz\000" |
| 67176 | /* 273755 */ "VFMADD231BF16Z256mkz\000" |
| 67177 | /* 273776 */ "VFNMADD231BF16Z256mkz\000" |
| 67178 | /* 273798 */ "VFMSUB132BF16Z256mkz\000" |
| 67179 | /* 273819 */ "VFNMSUB132BF16Z256mkz\000" |
| 67180 | /* 273841 */ "VFMADD132BF16Z256mkz\000" |
| 67181 | /* 273862 */ "VFNMADD132BF16Z256mkz\000" |
| 67182 | /* 273884 */ "VFMSUB213BF16Z256mkz\000" |
| 67183 | /* 273905 */ "VFNMSUB213BF16Z256mkz\000" |
| 67184 | /* 273927 */ "VFMADD213BF16Z256mkz\000" |
| 67185 | /* 273948 */ "VFNMADD213BF16Z256mkz\000" |
| 67186 | /* 273970 */ "VRCPBF16Z256mkz\000" |
| 67187 | /* 273986 */ "VGETEXPBF16Z256mkz\000" |
| 67188 | /* 274005 */ "VRSQRTBF16Z256mkz\000" |
| 67189 | /* 274023 */ "VSQRTBF16Z256mkz\000" |
| 67190 | /* 274040 */ "VMOVRSBZ256mkz\000" |
| 67191 | /* 274055 */ "VFMADDSUB231PDZ256mkz\000" |
| 67192 | /* 274077 */ "VFMSUB231PDZ256mkz\000" |
| 67193 | /* 274096 */ "VFNMSUB231PDZ256mkz\000" |
| 67194 | /* 274116 */ "VFMSUBADD231PDZ256mkz\000" |
| 67195 | /* 274138 */ "VFMADD231PDZ256mkz\000" |
| 67196 | /* 274157 */ "VFNMADD231PDZ256mkz\000" |
| 67197 | /* 274177 */ "VFMADDSUB132PDZ256mkz\000" |
| 67198 | /* 274199 */ "VFMSUB132PDZ256mkz\000" |
| 67199 | /* 274218 */ "VFNMSUB132PDZ256mkz\000" |
| 67200 | /* 274238 */ "VFMSUBADD132PDZ256mkz\000" |
| 67201 | /* 274260 */ "VFMADD132PDZ256mkz\000" |
| 67202 | /* 274279 */ "VFNMADD132PDZ256mkz\000" |
| 67203 | /* 274299 */ "VFMADDSUB213PDZ256mkz\000" |
| 67204 | /* 274321 */ "VFMSUB213PDZ256mkz\000" |
| 67205 | /* 274340 */ "VFNMSUB213PDZ256mkz\000" |
| 67206 | /* 274360 */ "VFMSUBADD213PDZ256mkz\000" |
| 67207 | /* 274382 */ "VFMADD213PDZ256mkz\000" |
| 67208 | /* 274401 */ "VFNMADD213PDZ256mkz\000" |
| 67209 | /* 274421 */ "VRCP14PDZ256mkz\000" |
| 67210 | /* 274437 */ "VRSQRT14PDZ256mkz\000" |
| 67211 | /* 274455 */ "VGETEXPPDZ256mkz\000" |
| 67212 | /* 274472 */ "VSQRTPDZ256mkz\000" |
| 67213 | /* 274487 */ "VMOVRSDZ256mkz\000" |
| 67214 | /* 274502 */ "VPDPBSSDZ256mkz\000" |
| 67215 | /* 274518 */ "VPDPWSSDZ256mkz\000" |
| 67216 | /* 274534 */ "VPDPBUSDZ256mkz\000" |
| 67217 | /* 274550 */ "VPDPWUSDZ256mkz\000" |
| 67218 | /* 274566 */ "VPDPBSUDZ256mkz\000" |
| 67219 | /* 274582 */ "VPDPWSUDZ256mkz\000" |
| 67220 | /* 274598 */ "VPDPBUUDZ256mkz\000" |
| 67221 | /* 274614 */ "VPDPWUUDZ256mkz\000" |
| 67222 | /* 274630 */ "VPSHLDVDZ256mkz\000" |
| 67223 | /* 274646 */ "VPSHRDVDZ256mkz\000" |
| 67224 | /* 274662 */ "VFMADDSUB231PHZ256mkz\000" |
| 67225 | /* 274684 */ "VFMSUB231PHZ256mkz\000" |
| 67226 | /* 274703 */ "VFNMSUB231PHZ256mkz\000" |
| 67227 | /* 274723 */ "VFMSUBADD231PHZ256mkz\000" |
| 67228 | /* 274745 */ "VFMADD231PHZ256mkz\000" |
| 67229 | /* 274764 */ "VFNMADD231PHZ256mkz\000" |
| 67230 | /* 274784 */ "VFMADDSUB132PHZ256mkz\000" |
| 67231 | /* 274806 */ "VFMSUB132PHZ256mkz\000" |
| 67232 | /* 274825 */ "VFNMSUB132PHZ256mkz\000" |
| 67233 | /* 274845 */ "VFMSUBADD132PHZ256mkz\000" |
| 67234 | /* 274867 */ "VFMADD132PHZ256mkz\000" |
| 67235 | /* 274886 */ "VFNMADD132PHZ256mkz\000" |
| 67236 | /* 274906 */ "VFMADDSUB213PHZ256mkz\000" |
| 67237 | /* 274928 */ "VFMSUB213PHZ256mkz\000" |
| 67238 | /* 274947 */ "VFNMSUB213PHZ256mkz\000" |
| 67239 | /* 274967 */ "VFMSUBADD213PHZ256mkz\000" |
| 67240 | /* 274989 */ "VFMADD213PHZ256mkz\000" |
| 67241 | /* 275008 */ "VFNMADD213PHZ256mkz\000" |
| 67242 | /* 275028 */ "VFCMADDCPHZ256mkz\000" |
| 67243 | /* 275046 */ "VFMADDCPHZ256mkz\000" |
| 67244 | /* 275063 */ "VRCPPHZ256mkz\000" |
| 67245 | /* 275077 */ "VGETEXPPHZ256mkz\000" |
| 67246 | /* 275094 */ "VRSQRTPHZ256mkz\000" |
| 67247 | /* 275110 */ "VSQRTPHZ256mkz\000" |
| 67248 | /* 275125 */ "VMOVRSQZ256mkz\000" |
| 67249 | /* 275140 */ "VPMADD52HUQZ256mkz\000" |
| 67250 | /* 275159 */ "VPMADD52LUQZ256mkz\000" |
| 67251 | /* 275178 */ "VPSHLDVQZ256mkz\000" |
| 67252 | /* 275194 */ "VPSHRDVQZ256mkz\000" |
| 67253 | /* 275210 */ "VPDPBSSDSZ256mkz\000" |
| 67254 | /* 275227 */ "VPDPWSSDSZ256mkz\000" |
| 67255 | /* 275244 */ "VPDPBUSDSZ256mkz\000" |
| 67256 | /* 275261 */ "VPDPWUSDSZ256mkz\000" |
| 67257 | /* 275278 */ "VPDPBSUDSZ256mkz\000" |
| 67258 | /* 275295 */ "VPDPWSUDSZ256mkz\000" |
| 67259 | /* 275312 */ "VPDPBUUDSZ256mkz\000" |
| 67260 | /* 275329 */ "VPDPWUUDSZ256mkz\000" |
| 67261 | /* 275346 */ "VFMADDSUB231PSZ256mkz\000" |
| 67262 | /* 275368 */ "VFMSUB231PSZ256mkz\000" |
| 67263 | /* 275387 */ "VFNMSUB231PSZ256mkz\000" |
| 67264 | /* 275407 */ "VFMSUBADD231PSZ256mkz\000" |
| 67265 | /* 275429 */ "VFMADD231PSZ256mkz\000" |
| 67266 | /* 275448 */ "VFNMADD231PSZ256mkz\000" |
| 67267 | /* 275468 */ "VFMADDSUB132PSZ256mkz\000" |
| 67268 | /* 275490 */ "VFMSUB132PSZ256mkz\000" |
| 67269 | /* 275509 */ "VFNMSUB132PSZ256mkz\000" |
| 67270 | /* 275529 */ "VFMSUBADD132PSZ256mkz\000" |
| 67271 | /* 275551 */ "VFMADD132PSZ256mkz\000" |
| 67272 | /* 275570 */ "VFNMADD132PSZ256mkz\000" |
| 67273 | /* 275590 */ "VFMADDSUB213PSZ256mkz\000" |
| 67274 | /* 275612 */ "VFMSUB213PSZ256mkz\000" |
| 67275 | /* 275631 */ "VFNMSUB213PSZ256mkz\000" |
| 67276 | /* 275651 */ "VFMSUBADD213PSZ256mkz\000" |
| 67277 | /* 275673 */ "VFMADD213PSZ256mkz\000" |
| 67278 | /* 275692 */ "VFNMADD213PSZ256mkz\000" |
| 67279 | /* 275712 */ "VRCP14PSZ256mkz\000" |
| 67280 | /* 275728 */ "VRSQRT14PSZ256mkz\000" |
| 67281 | /* 275746 */ "VDPBF16PSZ256mkz\000" |
| 67282 | /* 275763 */ "VDPPHPSZ256mkz\000" |
| 67283 | /* 275778 */ "VGETEXPPSZ256mkz\000" |
| 67284 | /* 275795 */ "VSQRTPSZ256mkz\000" |
| 67285 | /* 275810 */ "VMOVRSWZ256mkz\000" |
| 67286 | /* 275825 */ "VPSHLDVWZ256mkz\000" |
| 67287 | /* 275841 */ "VPSHRDVWZ256mkz\000" |
| 67288 | /* 275857 */ "VFMSUB231BF16Z128mkz\000" |
| 67289 | /* 275878 */ "VFNMSUB231BF16Z128mkz\000" |
| 67290 | /* 275900 */ "VFMADD231BF16Z128mkz\000" |
| 67291 | /* 275921 */ "VFNMADD231BF16Z128mkz\000" |
| 67292 | /* 275943 */ "VFMSUB132BF16Z128mkz\000" |
| 67293 | /* 275964 */ "VFNMSUB132BF16Z128mkz\000" |
| 67294 | /* 275986 */ "VFMADD132BF16Z128mkz\000" |
| 67295 | /* 276007 */ "VFNMADD132BF16Z128mkz\000" |
| 67296 | /* 276029 */ "VFMSUB213BF16Z128mkz\000" |
| 67297 | /* 276050 */ "VFNMSUB213BF16Z128mkz\000" |
| 67298 | /* 276072 */ "VFMADD213BF16Z128mkz\000" |
| 67299 | /* 276093 */ "VFNMADD213BF16Z128mkz\000" |
| 67300 | /* 276115 */ "VRCPBF16Z128mkz\000" |
| 67301 | /* 276131 */ "VGETEXPBF16Z128mkz\000" |
| 67302 | /* 276150 */ "VRSQRTBF16Z128mkz\000" |
| 67303 | /* 276168 */ "VSQRTBF16Z128mkz\000" |
| 67304 | /* 276185 */ "VMOVRSBZ128mkz\000" |
| 67305 | /* 276200 */ "VFMADDSUB231PDZ128mkz\000" |
| 67306 | /* 276222 */ "VFMSUB231PDZ128mkz\000" |
| 67307 | /* 276241 */ "VFNMSUB231PDZ128mkz\000" |
| 67308 | /* 276261 */ "VFMSUBADD231PDZ128mkz\000" |
| 67309 | /* 276283 */ "VFMADD231PDZ128mkz\000" |
| 67310 | /* 276302 */ "VFNMADD231PDZ128mkz\000" |
| 67311 | /* 276322 */ "VFMADDSUB132PDZ128mkz\000" |
| 67312 | /* 276344 */ "VFMSUB132PDZ128mkz\000" |
| 67313 | /* 276363 */ "VFNMSUB132PDZ128mkz\000" |
| 67314 | /* 276383 */ "VFMSUBADD132PDZ128mkz\000" |
| 67315 | /* 276405 */ "VFMADD132PDZ128mkz\000" |
| 67316 | /* 276424 */ "VFNMADD132PDZ128mkz\000" |
| 67317 | /* 276444 */ "VFMADDSUB213PDZ128mkz\000" |
| 67318 | /* 276466 */ "VFMSUB213PDZ128mkz\000" |
| 67319 | /* 276485 */ "VFNMSUB213PDZ128mkz\000" |
| 67320 | /* 276505 */ "VFMSUBADD213PDZ128mkz\000" |
| 67321 | /* 276527 */ "VFMADD213PDZ128mkz\000" |
| 67322 | /* 276546 */ "VFNMADD213PDZ128mkz\000" |
| 67323 | /* 276566 */ "VRCP14PDZ128mkz\000" |
| 67324 | /* 276582 */ "VRSQRT14PDZ128mkz\000" |
| 67325 | /* 276600 */ "VGETEXPPDZ128mkz\000" |
| 67326 | /* 276617 */ "VSQRTPDZ128mkz\000" |
| 67327 | /* 276632 */ "VMOVRSDZ128mkz\000" |
| 67328 | /* 276647 */ "VPDPBSSDZ128mkz\000" |
| 67329 | /* 276663 */ "VPDPWSSDZ128mkz\000" |
| 67330 | /* 276679 */ "VPDPBUSDZ128mkz\000" |
| 67331 | /* 276695 */ "VPDPWUSDZ128mkz\000" |
| 67332 | /* 276711 */ "VPDPBSUDZ128mkz\000" |
| 67333 | /* 276727 */ "VPDPWSUDZ128mkz\000" |
| 67334 | /* 276743 */ "VPDPBUUDZ128mkz\000" |
| 67335 | /* 276759 */ "VPDPWUUDZ128mkz\000" |
| 67336 | /* 276775 */ "VPSHLDVDZ128mkz\000" |
| 67337 | /* 276791 */ "VPSHRDVDZ128mkz\000" |
| 67338 | /* 276807 */ "VFMADDSUB231PHZ128mkz\000" |
| 67339 | /* 276829 */ "VFMSUB231PHZ128mkz\000" |
| 67340 | /* 276848 */ "VFNMSUB231PHZ128mkz\000" |
| 67341 | /* 276868 */ "VFMSUBADD231PHZ128mkz\000" |
| 67342 | /* 276890 */ "VFMADD231PHZ128mkz\000" |
| 67343 | /* 276909 */ "VFNMADD231PHZ128mkz\000" |
| 67344 | /* 276929 */ "VFMADDSUB132PHZ128mkz\000" |
| 67345 | /* 276951 */ "VFMSUB132PHZ128mkz\000" |
| 67346 | /* 276970 */ "VFNMSUB132PHZ128mkz\000" |
| 67347 | /* 276990 */ "VFMSUBADD132PHZ128mkz\000" |
| 67348 | /* 277012 */ "VFMADD132PHZ128mkz\000" |
| 67349 | /* 277031 */ "VFNMADD132PHZ128mkz\000" |
| 67350 | /* 277051 */ "VFMADDSUB213PHZ128mkz\000" |
| 67351 | /* 277073 */ "VFMSUB213PHZ128mkz\000" |
| 67352 | /* 277092 */ "VFNMSUB213PHZ128mkz\000" |
| 67353 | /* 277112 */ "VFMSUBADD213PHZ128mkz\000" |
| 67354 | /* 277134 */ "VFMADD213PHZ128mkz\000" |
| 67355 | /* 277153 */ "VFNMADD213PHZ128mkz\000" |
| 67356 | /* 277173 */ "VFCMADDCPHZ128mkz\000" |
| 67357 | /* 277191 */ "VFMADDCPHZ128mkz\000" |
| 67358 | /* 277208 */ "VRCPPHZ128mkz\000" |
| 67359 | /* 277222 */ "VGETEXPPHZ128mkz\000" |
| 67360 | /* 277239 */ "VRSQRTPHZ128mkz\000" |
| 67361 | /* 277255 */ "VSQRTPHZ128mkz\000" |
| 67362 | /* 277270 */ "VMOVRSQZ128mkz\000" |
| 67363 | /* 277285 */ "VPMADD52HUQZ128mkz\000" |
| 67364 | /* 277304 */ "VPMADD52LUQZ128mkz\000" |
| 67365 | /* 277323 */ "VPSHLDVQZ128mkz\000" |
| 67366 | /* 277339 */ "VPSHRDVQZ128mkz\000" |
| 67367 | /* 277355 */ "VPDPBSSDSZ128mkz\000" |
| 67368 | /* 277372 */ "VPDPWSSDSZ128mkz\000" |
| 67369 | /* 277389 */ "VPDPBUSDSZ128mkz\000" |
| 67370 | /* 277406 */ "VPDPWUSDSZ128mkz\000" |
| 67371 | /* 277423 */ "VPDPBSUDSZ128mkz\000" |
| 67372 | /* 277440 */ "VPDPWSUDSZ128mkz\000" |
| 67373 | /* 277457 */ "VPDPBUUDSZ128mkz\000" |
| 67374 | /* 277474 */ "VPDPWUUDSZ128mkz\000" |
| 67375 | /* 277491 */ "VFMADDSUB231PSZ128mkz\000" |
| 67376 | /* 277513 */ "VFMSUB231PSZ128mkz\000" |
| 67377 | /* 277532 */ "VFNMSUB231PSZ128mkz\000" |
| 67378 | /* 277552 */ "VFMSUBADD231PSZ128mkz\000" |
| 67379 | /* 277574 */ "VFMADD231PSZ128mkz\000" |
| 67380 | /* 277593 */ "VFNMADD231PSZ128mkz\000" |
| 67381 | /* 277613 */ "VFMADDSUB132PSZ128mkz\000" |
| 67382 | /* 277635 */ "VFMSUB132PSZ128mkz\000" |
| 67383 | /* 277654 */ "VFNMSUB132PSZ128mkz\000" |
| 67384 | /* 277674 */ "VFMSUBADD132PSZ128mkz\000" |
| 67385 | /* 277696 */ "VFMADD132PSZ128mkz\000" |
| 67386 | /* 277715 */ "VFNMADD132PSZ128mkz\000" |
| 67387 | /* 277735 */ "VFMADDSUB213PSZ128mkz\000" |
| 67388 | /* 277757 */ "VFMSUB213PSZ128mkz\000" |
| 67389 | /* 277776 */ "VFNMSUB213PSZ128mkz\000" |
| 67390 | /* 277796 */ "VFMSUBADD213PSZ128mkz\000" |
| 67391 | /* 277818 */ "VFMADD213PSZ128mkz\000" |
| 67392 | /* 277837 */ "VFNMADD213PSZ128mkz\000" |
| 67393 | /* 277857 */ "VRCP14PSZ128mkz\000" |
| 67394 | /* 277873 */ "VRSQRT14PSZ128mkz\000" |
| 67395 | /* 277891 */ "VDPBF16PSZ128mkz\000" |
| 67396 | /* 277908 */ "VDPPHPSZ128mkz\000" |
| 67397 | /* 277923 */ "VGETEXPPSZ128mkz\000" |
| 67398 | /* 277940 */ "VSQRTPSZ128mkz\000" |
| 67399 | /* 277955 */ "VMOVRSWZ128mkz\000" |
| 67400 | /* 277970 */ "VPSHLDVWZ128mkz\000" |
| 67401 | /* 277986 */ "VPSHRDVWZ128mkz\000" |
| 67402 | /* 278002 */ "VFMSUB231BF16Zmkz\000" |
| 67403 | /* 278020 */ "VFNMSUB231BF16Zmkz\000" |
| 67404 | /* 278039 */ "VFMADD231BF16Zmkz\000" |
| 67405 | /* 278057 */ "VFNMADD231BF16Zmkz\000" |
| 67406 | /* 278076 */ "VFMSUB132BF16Zmkz\000" |
| 67407 | /* 278094 */ "VFNMSUB132BF16Zmkz\000" |
| 67408 | /* 278113 */ "VFMADD132BF16Zmkz\000" |
| 67409 | /* 278131 */ "VFNMADD132BF16Zmkz\000" |
| 67410 | /* 278150 */ "VFMSUB213BF16Zmkz\000" |
| 67411 | /* 278168 */ "VFNMSUB213BF16Zmkz\000" |
| 67412 | /* 278187 */ "VFMADD213BF16Zmkz\000" |
| 67413 | /* 278205 */ "VFNMADD213BF16Zmkz\000" |
| 67414 | /* 278224 */ "VRCPBF16Zmkz\000" |
| 67415 | /* 278237 */ "VGETEXPBF16Zmkz\000" |
| 67416 | /* 278253 */ "VRSQRTBF16Zmkz\000" |
| 67417 | /* 278268 */ "VSQRTBF16Zmkz\000" |
| 67418 | /* 278282 */ "VMOVRSBZmkz\000" |
| 67419 | /* 278294 */ "VFMADDSUB231PDZmkz\000" |
| 67420 | /* 278313 */ "VFMSUB231PDZmkz\000" |
| 67421 | /* 278329 */ "VFNMSUB231PDZmkz\000" |
| 67422 | /* 278346 */ "VFMSUBADD231PDZmkz\000" |
| 67423 | /* 278365 */ "VFMADD231PDZmkz\000" |
| 67424 | /* 278381 */ "VFNMADD231PDZmkz\000" |
| 67425 | /* 278398 */ "VFMADDSUB132PDZmkz\000" |
| 67426 | /* 278417 */ "VFMSUB132PDZmkz\000" |
| 67427 | /* 278433 */ "VFNMSUB132PDZmkz\000" |
| 67428 | /* 278450 */ "VFMSUBADD132PDZmkz\000" |
| 67429 | /* 278469 */ "VFMADD132PDZmkz\000" |
| 67430 | /* 278485 */ "VFNMADD132PDZmkz\000" |
| 67431 | /* 278502 */ "VEXP2PDZmkz\000" |
| 67432 | /* 278514 */ "VFMADDSUB213PDZmkz\000" |
| 67433 | /* 278533 */ "VFMSUB213PDZmkz\000" |
| 67434 | /* 278549 */ "VFNMSUB213PDZmkz\000" |
| 67435 | /* 278566 */ "VFMSUBADD213PDZmkz\000" |
| 67436 | /* 278585 */ "VFMADD213PDZmkz\000" |
| 67437 | /* 278601 */ "VFNMADD213PDZmkz\000" |
| 67438 | /* 278618 */ "VRCP14PDZmkz\000" |
| 67439 | /* 278631 */ "VRSQRT14PDZmkz\000" |
| 67440 | /* 278646 */ "VRCP28PDZmkz\000" |
| 67441 | /* 278659 */ "VRSQRT28PDZmkz\000" |
| 67442 | /* 278674 */ "VGETEXPPDZmkz\000" |
| 67443 | /* 278688 */ "VSQRTPDZmkz\000" |
| 67444 | /* 278700 */ "VRCP28SDZmkz\000" |
| 67445 | /* 278713 */ "VRSQRT28SDZmkz\000" |
| 67446 | /* 278728 */ "VGETEXPSDZmkz\000" |
| 67447 | /* 278742 */ "VMOVRSDZmkz\000" |
| 67448 | /* 278754 */ "VPDPBSSDZmkz\000" |
| 67449 | /* 278767 */ "VPDPWSSDZmkz\000" |
| 67450 | /* 278780 */ "VPDPBUSDZmkz\000" |
| 67451 | /* 278793 */ "VPDPWUSDZmkz\000" |
| 67452 | /* 278806 */ "VPDPBSUDZmkz\000" |
| 67453 | /* 278819 */ "VPDPWSUDZmkz\000" |
| 67454 | /* 278832 */ "VPDPBUUDZmkz\000" |
| 67455 | /* 278845 */ "VPDPWUUDZmkz\000" |
| 67456 | /* 278858 */ "VPSHLDVDZmkz\000" |
| 67457 | /* 278871 */ "VPSHRDVDZmkz\000" |
| 67458 | /* 278884 */ "VFMADDSUB231PHZmkz\000" |
| 67459 | /* 278903 */ "VFMSUB231PHZmkz\000" |
| 67460 | /* 278919 */ "VFNMSUB231PHZmkz\000" |
| 67461 | /* 278936 */ "VFMSUBADD231PHZmkz\000" |
| 67462 | /* 278955 */ "VFMADD231PHZmkz\000" |
| 67463 | /* 278971 */ "VFNMADD231PHZmkz\000" |
| 67464 | /* 278988 */ "VFMADDSUB132PHZmkz\000" |
| 67465 | /* 279007 */ "VFMSUB132PHZmkz\000" |
| 67466 | /* 279023 */ "VFNMSUB132PHZmkz\000" |
| 67467 | /* 279040 */ "VFMSUBADD132PHZmkz\000" |
| 67468 | /* 279059 */ "VFMADD132PHZmkz\000" |
| 67469 | /* 279075 */ "VFNMADD132PHZmkz\000" |
| 67470 | /* 279092 */ "VFMADDSUB213PHZmkz\000" |
| 67471 | /* 279111 */ "VFMSUB213PHZmkz\000" |
| 67472 | /* 279127 */ "VFNMSUB213PHZmkz\000" |
| 67473 | /* 279144 */ "VFMSUBADD213PHZmkz\000" |
| 67474 | /* 279163 */ "VFMADD213PHZmkz\000" |
| 67475 | /* 279179 */ "VFNMADD213PHZmkz\000" |
| 67476 | /* 279196 */ "VFCMADDCPHZmkz\000" |
| 67477 | /* 279211 */ "VFMADDCPHZmkz\000" |
| 67478 | /* 279225 */ "VRCPPHZmkz\000" |
| 67479 | /* 279236 */ "VGETEXPPHZmkz\000" |
| 67480 | /* 279250 */ "VRSQRTPHZmkz\000" |
| 67481 | /* 279263 */ "VSQRTPHZmkz\000" |
| 67482 | /* 279275 */ "VFCMADDCSHZmkz\000" |
| 67483 | /* 279290 */ "VFMADDCSHZmkz\000" |
| 67484 | /* 279304 */ "VGETEXPSHZmkz\000" |
| 67485 | /* 279318 */ "VMOVRSQZmkz\000" |
| 67486 | /* 279330 */ "VPMADD52HUQZmkz\000" |
| 67487 | /* 279346 */ "VPMADD52LUQZmkz\000" |
| 67488 | /* 279362 */ "VPSHLDVQZmkz\000" |
| 67489 | /* 279375 */ "VPSHRDVQZmkz\000" |
| 67490 | /* 279388 */ "VPDPBSSDSZmkz\000" |
| 67491 | /* 279402 */ "VPDPWSSDSZmkz\000" |
| 67492 | /* 279416 */ "VPDPBUSDSZmkz\000" |
| 67493 | /* 279430 */ "VPDPWUSDSZmkz\000" |
| 67494 | /* 279444 */ "VPDPBSUDSZmkz\000" |
| 67495 | /* 279458 */ "VPDPWSUDSZmkz\000" |
| 67496 | /* 279472 */ "VPDPBUUDSZmkz\000" |
| 67497 | /* 279486 */ "VPDPWUUDSZmkz\000" |
| 67498 | /* 279500 */ "VFMADDSUB231PSZmkz\000" |
| 67499 | /* 279519 */ "VFMSUB231PSZmkz\000" |
| 67500 | /* 279535 */ "VFNMSUB231PSZmkz\000" |
| 67501 | /* 279552 */ "VFMSUBADD231PSZmkz\000" |
| 67502 | /* 279571 */ "VFMADD231PSZmkz\000" |
| 67503 | /* 279587 */ "VFNMADD231PSZmkz\000" |
| 67504 | /* 279604 */ "VFMADDSUB132PSZmkz\000" |
| 67505 | /* 279623 */ "VFMSUB132PSZmkz\000" |
| 67506 | /* 279639 */ "VFNMSUB132PSZmkz\000" |
| 67507 | /* 279656 */ "VFMSUBADD132PSZmkz\000" |
| 67508 | /* 279675 */ "VFMADD132PSZmkz\000" |
| 67509 | /* 279691 */ "VFNMADD132PSZmkz\000" |
| 67510 | /* 279708 */ "VEXP2PSZmkz\000" |
| 67511 | /* 279720 */ "VFMADDSUB213PSZmkz\000" |
| 67512 | /* 279739 */ "VFMSUB213PSZmkz\000" |
| 67513 | /* 279755 */ "VFNMSUB213PSZmkz\000" |
| 67514 | /* 279772 */ "VFMSUBADD213PSZmkz\000" |
| 67515 | /* 279791 */ "VFMADD213PSZmkz\000" |
| 67516 | /* 279807 */ "VFNMADD213PSZmkz\000" |
| 67517 | /* 279824 */ "VRCP14PSZmkz\000" |
| 67518 | /* 279837 */ "VRSQRT14PSZmkz\000" |
| 67519 | /* 279852 */ "VDPBF16PSZmkz\000" |
| 67520 | /* 279866 */ "VRCP28PSZmkz\000" |
| 67521 | /* 279879 */ "VRSQRT28PSZmkz\000" |
| 67522 | /* 279894 */ "VDPPHPSZmkz\000" |
| 67523 | /* 279906 */ "VGETEXPPSZmkz\000" |
| 67524 | /* 279920 */ "VSQRTPSZmkz\000" |
| 67525 | /* 279932 */ "VRCP28SSZmkz\000" |
| 67526 | /* 279945 */ "VRSQRT28SSZmkz\000" |
| 67527 | /* 279960 */ "VGETEXPSSZmkz\000" |
| 67528 | /* 279974 */ "VMOVRSWZmkz\000" |
| 67529 | /* 279986 */ "VPSHLDVWZmkz\000" |
| 67530 | /* 279999 */ "VPSHRDVWZmkz\000" |
| 67531 | /* 280012 */ "VMOVDQA32Z256rmkz\000" |
| 67532 | /* 280030 */ "VMOVDQU32Z256rmkz\000" |
| 67533 | /* 280048 */ "VBROADCASTF32X2Z256rmkz\000" |
| 67534 | /* 280072 */ "VBROADCASTI32X2Z256rmkz\000" |
| 67535 | /* 280096 */ "VBROADCASTF64X2Z256rmkz\000" |
| 67536 | /* 280120 */ "VBROADCASTI64X2Z256rmkz\000" |
| 67537 | /* 280144 */ "VMOVDQA64Z256rmkz\000" |
| 67538 | /* 280162 */ "VMOVDQU64Z256rmkz\000" |
| 67539 | /* 280180 */ "VBROADCASTF32X4Z256rmkz\000" |
| 67540 | /* 280204 */ "VBROADCASTI32X4Z256rmkz\000" |
| 67541 | /* 280228 */ "VCVTNE2PS2BF16Z256rmkz\000" |
| 67542 | /* 280251 */ "VCVTNEPS2BF16Z256rmkz\000" |
| 67543 | /* 280273 */ "VSUBBF16Z256rmkz\000" |
| 67544 | /* 280290 */ "VADDBF16Z256rmkz\000" |
| 67545 | /* 280307 */ "VSCALEFBF16Z256rmkz\000" |
| 67546 | /* 280327 */ "VMULBF16Z256rmkz\000" |
| 67547 | /* 280344 */ "VMINBF16Z256rmkz\000" |
| 67548 | /* 280361 */ "VDIVBF16Z256rmkz\000" |
| 67549 | /* 280378 */ "VMAXBF16Z256rmkz\000" |
| 67550 | /* 280395 */ "VMOVDQU16Z256rmkz\000" |
| 67551 | /* 280413 */ "VCVT2PH2BF8Z256rmkz\000" |
| 67552 | /* 280433 */ "VCVTBIASPH2BF8Z256rmkz\000" |
| 67553 | /* 280456 */ "VCVTPH2BF8Z256rmkz\000" |
| 67554 | /* 280475 */ "VCVT2PH2HF8Z256rmkz\000" |
| 67555 | /* 280495 */ "VCVTBIASPH2HF8Z256rmkz\000" |
| 67556 | /* 280518 */ "VCVTPH2HF8Z256rmkz\000" |
| 67557 | /* 280537 */ "VMOVDQU8Z256rmkz\000" |
| 67558 | /* 280554 */ "VPERMI2BZ256rmkz\000" |
| 67559 | /* 280571 */ "VPERMT2BZ256rmkz\000" |
| 67560 | /* 280588 */ "VPSUBBZ256rmkz\000" |
| 67561 | /* 280603 */ "VPADDBZ256rmkz\000" |
| 67562 | /* 280618 */ "VPEXPANDBZ256rmkz\000" |
| 67563 | /* 280636 */ "VPSHUFBZ256rmkz\000" |
| 67564 | /* 280652 */ "VPAVGBZ256rmkz\000" |
| 67565 | /* 280667 */ "VGF2P8MULBZ256rmkz\000" |
| 67566 | /* 280686 */ "VPBLENDMBZ256rmkz\000" |
| 67567 | /* 280704 */ "VPERMBZ256rmkz\000" |
| 67568 | /* 280719 */ "VPMULTISHIFTQBZ256rmkz\000" |
| 67569 | /* 280742 */ "VPABSBZ256rmkz\000" |
| 67570 | /* 280757 */ "VPSUBSBZ256rmkz\000" |
| 67571 | /* 280773 */ "VPADDSBZ256rmkz\000" |
| 67572 | /* 280789 */ "VPMINSBZ256rmkz\000" |
| 67573 | /* 280805 */ "VPSUBUSBZ256rmkz\000" |
| 67574 | /* 280822 */ "VPADDUSBZ256rmkz\000" |
| 67575 | /* 280839 */ "VPMAXSBZ256rmkz\000" |
| 67576 | /* 280855 */ "VPOPCNTBZ256rmkz\000" |
| 67577 | /* 280872 */ "VPBROADCASTBZ256rmkz\000" |
| 67578 | /* 280893 */ "VPMINUBZ256rmkz\000" |
| 67579 | /* 280909 */ "VPMAXUBZ256rmkz\000" |
| 67580 | /* 280925 */ "VPACKSSWBZ256rmkz\000" |
| 67581 | /* 280943 */ "VPACKUSWBZ256rmkz\000" |
| 67582 | /* 280961 */ "VPERMI2DZ256rmkz\000" |
| 67583 | /* 280978 */ "VPERMT2DZ256rmkz\000" |
| 67584 | /* 280995 */ "VPSRADZ256rmkz\000" |
| 67585 | /* 281010 */ "VPSUBDZ256rmkz\000" |
| 67586 | /* 281025 */ "VPMOVSXBDZ256rmkz\000" |
| 67587 | /* 281043 */ "VPMOVZXBDZ256rmkz\000" |
| 67588 | /* 281061 */ "VPADDDZ256rmkz\000" |
| 67589 | /* 281076 */ "VPANDDZ256rmkz\000" |
| 67590 | /* 281091 */ "VPEXPANDDZ256rmkz\000" |
| 67591 | /* 281109 */ "VPSLLDZ256rmkz\000" |
| 67592 | /* 281124 */ "VPMULLDZ256rmkz\000" |
| 67593 | /* 281140 */ "VPSRLDZ256rmkz\000" |
| 67594 | /* 281155 */ "VPBLENDMDZ256rmkz\000" |
| 67595 | /* 281173 */ "VPERMDZ256rmkz\000" |
| 67596 | /* 281188 */ "VPANDNDZ256rmkz\000" |
| 67597 | /* 281204 */ "VCVTPH2PDZ256rmkz\000" |
| 67598 | /* 281222 */ "VPERMI2PDZ256rmkz\000" |
| 67599 | /* 281240 */ "VCVTDQ2PDZ256rmkz\000" |
| 67600 | /* 281258 */ "VCVTUDQ2PDZ256rmkz\000" |
| 67601 | /* 281277 */ "VCVTQQ2PDZ256rmkz\000" |
| 67602 | /* 281295 */ "VCVTUQQ2PDZ256rmkz\000" |
| 67603 | /* 281314 */ "VCVTPS2PDZ256rmkz\000" |
| 67604 | /* 281332 */ "VPERMT2PDZ256rmkz\000" |
| 67605 | /* 281350 */ "VMOVAPDZ256rmkz\000" |
| 67606 | /* 281366 */ "VSUBPDZ256rmkz\000" |
| 67607 | /* 281381 */ "VMINCPDZ256rmkz\000" |
| 67608 | /* 281397 */ "VMAXCPDZ256rmkz\000" |
| 67609 | /* 281413 */ "VADDPDZ256rmkz\000" |
| 67610 | /* 281428 */ "VEXPANDPDZ256rmkz\000" |
| 67611 | /* 281446 */ "VANDPDZ256rmkz\000" |
| 67612 | /* 281461 */ "VSCALEFPDZ256rmkz\000" |
| 67613 | /* 281479 */ "VUNPCKHPDZ256rmkz\000" |
| 67614 | /* 281497 */ "VPERMILPDZ256rmkz\000" |
| 67615 | /* 281515 */ "VUNPCKLPDZ256rmkz\000" |
| 67616 | /* 281533 */ "VMULPDZ256rmkz\000" |
| 67617 | /* 281548 */ "VBLENDMPDZ256rmkz\000" |
| 67618 | /* 281566 */ "VPERMPDZ256rmkz\000" |
| 67619 | /* 281582 */ "VANDNPDZ256rmkz\000" |
| 67620 | /* 281598 */ "VMINPDZ256rmkz\000" |
| 67621 | /* 281613 */ "VORPDZ256rmkz\000" |
| 67622 | /* 281627 */ "VXORPDZ256rmkz\000" |
| 67623 | /* 281642 */ "VMOVUPDZ256rmkz\000" |
| 67624 | /* 281658 */ "VDIVPDZ256rmkz\000" |
| 67625 | /* 281673 */ "VMAXPDZ256rmkz\000" |
| 67626 | /* 281688 */ "VPORDZ256rmkz\000" |
| 67627 | /* 281702 */ "VPXORDZ256rmkz\000" |
| 67628 | /* 281717 */ "VPABSDZ256rmkz\000" |
| 67629 | /* 281732 */ "VPMINSDZ256rmkz\000" |
| 67630 | /* 281748 */ "VBROADCASTSDZ256rmkz\000" |
| 67631 | /* 281769 */ "VPMAXSDZ256rmkz\000" |
| 67632 | /* 281785 */ "VPCONFLICTDZ256rmkz\000" |
| 67633 | /* 281805 */ "VPOPCNTDZ256rmkz\000" |
| 67634 | /* 281822 */ "VPLZCNTDZ256rmkz\000" |
| 67635 | /* 281839 */ "VPBROADCASTDZ256rmkz\000" |
| 67636 | /* 281860 */ "VPMINUDZ256rmkz\000" |
| 67637 | /* 281876 */ "VPMAXUDZ256rmkz\000" |
| 67638 | /* 281892 */ "VPSRAVDZ256rmkz\000" |
| 67639 | /* 281908 */ "VPSLLVDZ256rmkz\000" |
| 67640 | /* 281924 */ "VPROLVDZ256rmkz\000" |
| 67641 | /* 281940 */ "VPSRLVDZ256rmkz\000" |
| 67642 | /* 281956 */ "VPRORVDZ256rmkz\000" |
| 67643 | /* 281972 */ "VPMADDWDZ256rmkz\000" |
| 67644 | /* 281989 */ "VPUNPCKHWDZ256rmkz\000" |
| 67645 | /* 282008 */ "VPUNPCKLWDZ256rmkz\000" |
| 67646 | /* 282027 */ "VPMOVSXWDZ256rmkz\000" |
| 67647 | /* 282045 */ "VPMOVZXWDZ256rmkz\000" |
| 67648 | /* 282063 */ "VCVTHF82PHZ256rmkz\000" |
| 67649 | /* 282082 */ "VCVTPD2PHZ256rmkz\000" |
| 67650 | /* 282100 */ "VCVTDQ2PHZ256rmkz\000" |
| 67651 | /* 282118 */ "VCVTUDQ2PHZ256rmkz\000" |
| 67652 | /* 282137 */ "VCVTQQ2PHZ256rmkz\000" |
| 67653 | /* 282155 */ "VCVTUQQ2PHZ256rmkz\000" |
| 67654 | /* 282174 */ "VCVTW2PHZ256rmkz\000" |
| 67655 | /* 282191 */ "VCVTUW2PHZ256rmkz\000" |
| 67656 | /* 282209 */ "VSUBPHZ256rmkz\000" |
| 67657 | /* 282224 */ "VFCMULCPHZ256rmkz\000" |
| 67658 | /* 282242 */ "VFMULCPHZ256rmkz\000" |
| 67659 | /* 282259 */ "VMINCPHZ256rmkz\000" |
| 67660 | /* 282275 */ "VMAXCPHZ256rmkz\000" |
| 67661 | /* 282291 */ "VADDPHZ256rmkz\000" |
| 67662 | /* 282306 */ "VSCALEFPHZ256rmkz\000" |
| 67663 | /* 282324 */ "VMULPHZ256rmkz\000" |
| 67664 | /* 282339 */ "VMINPHZ256rmkz\000" |
| 67665 | /* 282354 */ "VDIVPHZ256rmkz\000" |
| 67666 | /* 282369 */ "VMAXPHZ256rmkz\000" |
| 67667 | /* 282384 */ "VMOVDDUPZ256rmkz\000" |
| 67668 | /* 282401 */ "VMOVSHDUPZ256rmkz\000" |
| 67669 | /* 282419 */ "VMOVSLDUPZ256rmkz\000" |
| 67670 | /* 282437 */ "VPERMI2QZ256rmkz\000" |
| 67671 | /* 282454 */ "VPERMT2QZ256rmkz\000" |
| 67672 | /* 282471 */ "VPSRAQZ256rmkz\000" |
| 67673 | /* 282486 */ "VPSUBQZ256rmkz\000" |
| 67674 | /* 282501 */ "VPMOVSXBQZ256rmkz\000" |
| 67675 | /* 282519 */ "VPMOVZXBQZ256rmkz\000" |
| 67676 | /* 282537 */ "VCVTTPD2DQZ256rmkz\000" |
| 67677 | /* 282556 */ "VCVTPD2DQZ256rmkz\000" |
| 67678 | /* 282574 */ "VCVTTPH2DQZ256rmkz\000" |
| 67679 | /* 282593 */ "VCVTPH2DQZ256rmkz\000" |
| 67680 | /* 282611 */ "VCVTTPS2DQZ256rmkz\000" |
| 67681 | /* 282630 */ "VCVTPS2DQZ256rmkz\000" |
| 67682 | /* 282648 */ "VPADDQZ256rmkz\000" |
| 67683 | /* 282663 */ "VPUNPCKHDQZ256rmkz\000" |
| 67684 | /* 282682 */ "VPUNPCKLDQZ256rmkz\000" |
| 67685 | /* 282701 */ "VPMULDQZ256rmkz\000" |
| 67686 | /* 282717 */ "VPANDQZ256rmkz\000" |
| 67687 | /* 282732 */ "VPEXPANDQZ256rmkz\000" |
| 67688 | /* 282750 */ "VPUNPCKHQDQZ256rmkz\000" |
| 67689 | /* 282770 */ "VPUNPCKLQDQZ256rmkz\000" |
| 67690 | /* 282790 */ "VCVTTPD2UDQZ256rmkz\000" |
| 67691 | /* 282810 */ "VCVTPD2UDQZ256rmkz\000" |
| 67692 | /* 282829 */ "VCVTTPH2UDQZ256rmkz\000" |
| 67693 | /* 282849 */ "VCVTPH2UDQZ256rmkz\000" |
| 67694 | /* 282868 */ "VCVTTPS2UDQZ256rmkz\000" |
| 67695 | /* 282888 */ "VCVTPS2UDQZ256rmkz\000" |
| 67696 | /* 282907 */ "VPMULUDQZ256rmkz\000" |
| 67697 | /* 282924 */ "VPMOVSXDQZ256rmkz\000" |
| 67698 | /* 282942 */ "VPMOVZXDQZ256rmkz\000" |
| 67699 | /* 282960 */ "VPSLLQZ256rmkz\000" |
| 67700 | /* 282975 */ "VPMULLQZ256rmkz\000" |
| 67701 | /* 282991 */ "VPSRLQZ256rmkz\000" |
| 67702 | /* 283006 */ "VPBLENDMQZ256rmkz\000" |
| 67703 | /* 283024 */ "VPERMQZ256rmkz\000" |
| 67704 | /* 283039 */ "VPANDNQZ256rmkz\000" |
| 67705 | /* 283055 */ "VCVTTPD2QQZ256rmkz\000" |
| 67706 | /* 283074 */ "VCVTPD2QQZ256rmkz\000" |
| 67707 | /* 283092 */ "VCVTTPH2QQZ256rmkz\000" |
| 67708 | /* 283111 */ "VCVTPH2QQZ256rmkz\000" |
| 67709 | /* 283129 */ "VCVTTPS2QQZ256rmkz\000" |
| 67710 | /* 283148 */ "VCVTPS2QQZ256rmkz\000" |
| 67711 | /* 283166 */ "VCVTTPD2UQQZ256rmkz\000" |
| 67712 | /* 283186 */ "VCVTPD2UQQZ256rmkz\000" |
| 67713 | /* 283205 */ "VCVTTPH2UQQZ256rmkz\000" |
| 67714 | /* 283225 */ "VCVTPH2UQQZ256rmkz\000" |
| 67715 | /* 283244 */ "VCVTTPS2UQQZ256rmkz\000" |
| 67716 | /* 283264 */ "VCVTPS2UQQZ256rmkz\000" |
| 67717 | /* 283283 */ "VPORQZ256rmkz\000" |
| 67718 | /* 283297 */ "VPXORQZ256rmkz\000" |
| 67719 | /* 283312 */ "VPABSQZ256rmkz\000" |
| 67720 | /* 283327 */ "VPMINSQZ256rmkz\000" |
| 67721 | /* 283343 */ "VPMAXSQZ256rmkz\000" |
| 67722 | /* 283359 */ "VPCONFLICTQZ256rmkz\000" |
| 67723 | /* 283379 */ "VPOPCNTQZ256rmkz\000" |
| 67724 | /* 283396 */ "VPLZCNTQZ256rmkz\000" |
| 67725 | /* 283413 */ "VPBROADCASTQZ256rmkz\000" |
| 67726 | /* 283434 */ "VPMINUQZ256rmkz\000" |
| 67727 | /* 283450 */ "VPMAXUQZ256rmkz\000" |
| 67728 | /* 283466 */ "VPSRAVQZ256rmkz\000" |
| 67729 | /* 283482 */ "VPSLLVQZ256rmkz\000" |
| 67730 | /* 283498 */ "VPROLVQZ256rmkz\000" |
| 67731 | /* 283514 */ "VPSRLVQZ256rmkz\000" |
| 67732 | /* 283530 */ "VPRORVQZ256rmkz\000" |
| 67733 | /* 283546 */ "VPMOVSXWQZ256rmkz\000" |
| 67734 | /* 283564 */ "VPMOVZXWQZ256rmkz\000" |
| 67735 | /* 283582 */ "VCVT2PH2BF8SZ256rmkz\000" |
| 67736 | /* 283603 */ "VCVTBIASPH2BF8SZ256rmkz\000" |
| 67737 | /* 283627 */ "VCVTPH2BF8SZ256rmkz\000" |
| 67738 | /* 283647 */ "VCVT2PH2HF8SZ256rmkz\000" |
| 67739 | /* 283668 */ "VCVTBIASPH2HF8SZ256rmkz\000" |
| 67740 | /* 283692 */ "VCVTPH2HF8SZ256rmkz\000" |
| 67741 | /* 283712 */ "VCVTTBF162IBSZ256rmkz\000" |
| 67742 | /* 283734 */ "VCVTBF162IBSZ256rmkz\000" |
| 67743 | /* 283755 */ "VCVTTPH2IBSZ256rmkz\000" |
| 67744 | /* 283775 */ "VCVTPH2IBSZ256rmkz\000" |
| 67745 | /* 283794 */ "VCVTTPS2IBSZ256rmkz\000" |
| 67746 | /* 283814 */ "VCVTPS2IBSZ256rmkz\000" |
| 67747 | /* 283833 */ "VCVTTBF162IUBSZ256rmkz\000" |
| 67748 | /* 283856 */ "VCVTBF162IUBSZ256rmkz\000" |
| 67749 | /* 283878 */ "VCVTTPH2IUBSZ256rmkz\000" |
| 67750 | /* 283899 */ "VCVTPH2IUBSZ256rmkz\000" |
| 67751 | /* 283919 */ "VCVTTPS2IUBSZ256rmkz\000" |
| 67752 | /* 283940 */ "VCVTPS2IUBSZ256rmkz\000" |
| 67753 | /* 283960 */ "VCVTPD2PSZ256rmkz\000" |
| 67754 | /* 283978 */ "VCVTPH2PSZ256rmkz\000" |
| 67755 | /* 283996 */ "VPERMI2PSZ256rmkz\000" |
| 67756 | /* 284014 */ "VCVTDQ2PSZ256rmkz\000" |
| 67757 | /* 284032 */ "VCVTUDQ2PSZ256rmkz\000" |
| 67758 | /* 284051 */ "VCVTQQ2PSZ256rmkz\000" |
| 67759 | /* 284069 */ "VCVTUQQ2PSZ256rmkz\000" |
| 67760 | /* 284088 */ "VPERMT2PSZ256rmkz\000" |
| 67761 | /* 284106 */ "VMOVAPSZ256rmkz\000" |
| 67762 | /* 284122 */ "VSUBPSZ256rmkz\000" |
| 67763 | /* 284137 */ "VMINCPSZ256rmkz\000" |
| 67764 | /* 284153 */ "VMAXCPSZ256rmkz\000" |
| 67765 | /* 284169 */ "VADDPSZ256rmkz\000" |
| 67766 | /* 284184 */ "VEXPANDPSZ256rmkz\000" |
| 67767 | /* 284202 */ "VANDPSZ256rmkz\000" |
| 67768 | /* 284217 */ "VSCALEFPSZ256rmkz\000" |
| 67769 | /* 284235 */ "VUNPCKHPSZ256rmkz\000" |
| 67770 | /* 284253 */ "VPERMILPSZ256rmkz\000" |
| 67771 | /* 284271 */ "VUNPCKLPSZ256rmkz\000" |
| 67772 | /* 284289 */ "VMULPSZ256rmkz\000" |
| 67773 | /* 284304 */ "VBLENDMPSZ256rmkz\000" |
| 67774 | /* 284322 */ "VPERMPSZ256rmkz\000" |
| 67775 | /* 284338 */ "VANDNPSZ256rmkz\000" |
| 67776 | /* 284354 */ "VMINPSZ256rmkz\000" |
| 67777 | /* 284369 */ "VORPSZ256rmkz\000" |
| 67778 | /* 284383 */ "VXORPSZ256rmkz\000" |
| 67779 | /* 284398 */ "VMOVUPSZ256rmkz\000" |
| 67780 | /* 284414 */ "VDIVPSZ256rmkz\000" |
| 67781 | /* 284429 */ "VMAXPSZ256rmkz\000" |
| 67782 | /* 284444 */ "VCVTTPD2DQSZ256rmkz\000" |
| 67783 | /* 284464 */ "VCVTTPS2DQSZ256rmkz\000" |
| 67784 | /* 284484 */ "VCVTTPD2UDQSZ256rmkz\000" |
| 67785 | /* 284505 */ "VCVTTPS2UDQSZ256rmkz\000" |
| 67786 | /* 284526 */ "VCVTTPD2QQSZ256rmkz\000" |
| 67787 | /* 284546 */ "VCVTTPS2QQSZ256rmkz\000" |
| 67788 | /* 284566 */ "VCVTTPD2UQQSZ256rmkz\000" |
| 67789 | /* 284587 */ "VCVTTPS2UQQSZ256rmkz\000" |
| 67790 | /* 284608 */ "VBROADCASTSSZ256rmkz\000" |
| 67791 | /* 284629 */ "VCVTTPH2WZ256rmkz\000" |
| 67792 | /* 284647 */ "VCVTPH2WZ256rmkz\000" |
| 67793 | /* 284664 */ "VPERMI2WZ256rmkz\000" |
| 67794 | /* 284681 */ "VPERMT2WZ256rmkz\000" |
| 67795 | /* 284698 */ "VPSRAWZ256rmkz\000" |
| 67796 | /* 284713 */ "VPUNPCKHBWZ256rmkz\000" |
| 67797 | /* 284732 */ "VPUNPCKLBWZ256rmkz\000" |
| 67798 | /* 284751 */ "VPSUBWZ256rmkz\000" |
| 67799 | /* 284766 */ "VPMOVSXBWZ256rmkz\000" |
| 67800 | /* 284784 */ "VPMOVZXBWZ256rmkz\000" |
| 67801 | /* 284802 */ "VPADDWZ256rmkz\000" |
| 67802 | /* 284817 */ "VPEXPANDWZ256rmkz\000" |
| 67803 | /* 284835 */ "VPACKSSDWZ256rmkz\000" |
| 67804 | /* 284853 */ "VPACKUSDWZ256rmkz\000" |
| 67805 | /* 284871 */ "VPAVGWZ256rmkz\000" |
| 67806 | /* 284886 */ "VPMULHWZ256rmkz\000" |
| 67807 | /* 284902 */ "VPSLLWZ256rmkz\000" |
| 67808 | /* 284917 */ "VPMULLWZ256rmkz\000" |
| 67809 | /* 284933 */ "VPSRLWZ256rmkz\000" |
| 67810 | /* 284948 */ "VPBLENDMWZ256rmkz\000" |
| 67811 | /* 284966 */ "VPERMWZ256rmkz\000" |
| 67812 | /* 284981 */ "VPABSWZ256rmkz\000" |
| 67813 | /* 284996 */ "VPMADDUBSWZ256rmkz\000" |
| 67814 | /* 285015 */ "VPSUBSWZ256rmkz\000" |
| 67815 | /* 285031 */ "VPADDSWZ256rmkz\000" |
| 67816 | /* 285047 */ "VPMINSWZ256rmkz\000" |
| 67817 | /* 285063 */ "VPMULHRSWZ256rmkz\000" |
| 67818 | /* 285081 */ "VPSUBUSWZ256rmkz\000" |
| 67819 | /* 285098 */ "VPADDUSWZ256rmkz\000" |
| 67820 | /* 285115 */ "VPMAXSWZ256rmkz\000" |
| 67821 | /* 285131 */ "VPOPCNTWZ256rmkz\000" |
| 67822 | /* 285148 */ "VPBROADCASTWZ256rmkz\000" |
| 67823 | /* 285169 */ "VCVTTPH2UWZ256rmkz\000" |
| 67824 | /* 285188 */ "VCVTPH2UWZ256rmkz\000" |
| 67825 | /* 285206 */ "VPMULHUWZ256rmkz\000" |
| 67826 | /* 285223 */ "VPMINUWZ256rmkz\000" |
| 67827 | /* 285239 */ "VPMAXUWZ256rmkz\000" |
| 67828 | /* 285255 */ "VPSRAVWZ256rmkz\000" |
| 67829 | /* 285271 */ "VPSLLVWZ256rmkz\000" |
| 67830 | /* 285287 */ "VPSRLVWZ256rmkz\000" |
| 67831 | /* 285303 */ "VCVT2PS2PHXZ256rmkz\000" |
| 67832 | /* 285323 */ "VCVTPS2PHXZ256rmkz\000" |
| 67833 | /* 285342 */ "VCVTPH2PSXZ256rmkz\000" |
| 67834 | /* 285361 */ "VMOVDQA32Z128rmkz\000" |
| 67835 | /* 285379 */ "VMOVDQU32Z128rmkz\000" |
| 67836 | /* 285397 */ "VBROADCASTI32X2Z128rmkz\000" |
| 67837 | /* 285421 */ "VMOVDQA64Z128rmkz\000" |
| 67838 | /* 285439 */ "VMOVDQU64Z128rmkz\000" |
| 67839 | /* 285457 */ "VCVTNE2PS2BF16Z128rmkz\000" |
| 67840 | /* 285480 */ "VCVTNEPS2BF16Z128rmkz\000" |
| 67841 | /* 285502 */ "VSUBBF16Z128rmkz\000" |
| 67842 | /* 285519 */ "VADDBF16Z128rmkz\000" |
| 67843 | /* 285536 */ "VSCALEFBF16Z128rmkz\000" |
| 67844 | /* 285556 */ "VMULBF16Z128rmkz\000" |
| 67845 | /* 285573 */ "VMINBF16Z128rmkz\000" |
| 67846 | /* 285590 */ "VDIVBF16Z128rmkz\000" |
| 67847 | /* 285607 */ "VMAXBF16Z128rmkz\000" |
| 67848 | /* 285624 */ "VMOVDQU16Z128rmkz\000" |
| 67849 | /* 285642 */ "VCVT2PH2BF8Z128rmkz\000" |
| 67850 | /* 285662 */ "VCVTBIASPH2BF8Z128rmkz\000" |
| 67851 | /* 285685 */ "VCVTPH2BF8Z128rmkz\000" |
| 67852 | /* 285704 */ "VCVT2PH2HF8Z128rmkz\000" |
| 67853 | /* 285724 */ "VCVTBIASPH2HF8Z128rmkz\000" |
| 67854 | /* 285747 */ "VCVTPH2HF8Z128rmkz\000" |
| 67855 | /* 285766 */ "VMOVDQU8Z128rmkz\000" |
| 67856 | /* 285783 */ "VPERMI2BZ128rmkz\000" |
| 67857 | /* 285800 */ "VPERMT2BZ128rmkz\000" |
| 67858 | /* 285817 */ "VPSUBBZ128rmkz\000" |
| 67859 | /* 285832 */ "VPADDBZ128rmkz\000" |
| 67860 | /* 285847 */ "VPEXPANDBZ128rmkz\000" |
| 67861 | /* 285865 */ "VPSHUFBZ128rmkz\000" |
| 67862 | /* 285881 */ "VPAVGBZ128rmkz\000" |
| 67863 | /* 285896 */ "VGF2P8MULBZ128rmkz\000" |
| 67864 | /* 285915 */ "VPBLENDMBZ128rmkz\000" |
| 67865 | /* 285933 */ "VPERMBZ128rmkz\000" |
| 67866 | /* 285948 */ "VPMULTISHIFTQBZ128rmkz\000" |
| 67867 | /* 285971 */ "VPABSBZ128rmkz\000" |
| 67868 | /* 285986 */ "VPSUBSBZ128rmkz\000" |
| 67869 | /* 286002 */ "VPADDSBZ128rmkz\000" |
| 67870 | /* 286018 */ "VPMINSBZ128rmkz\000" |
| 67871 | /* 286034 */ "VPSUBUSBZ128rmkz\000" |
| 67872 | /* 286051 */ "VPADDUSBZ128rmkz\000" |
| 67873 | /* 286068 */ "VPMAXSBZ128rmkz\000" |
| 67874 | /* 286084 */ "VPOPCNTBZ128rmkz\000" |
| 67875 | /* 286101 */ "VPBROADCASTBZ128rmkz\000" |
| 67876 | /* 286122 */ "VPMINUBZ128rmkz\000" |
| 67877 | /* 286138 */ "VPMAXUBZ128rmkz\000" |
| 67878 | /* 286154 */ "VPACKSSWBZ128rmkz\000" |
| 67879 | /* 286172 */ "VPACKUSWBZ128rmkz\000" |
| 67880 | /* 286190 */ "VPERMI2DZ128rmkz\000" |
| 67881 | /* 286207 */ "VPERMT2DZ128rmkz\000" |
| 67882 | /* 286224 */ "VPSRADZ128rmkz\000" |
| 67883 | /* 286239 */ "VPSUBDZ128rmkz\000" |
| 67884 | /* 286254 */ "VPMOVSXBDZ128rmkz\000" |
| 67885 | /* 286272 */ "VPMOVZXBDZ128rmkz\000" |
| 67886 | /* 286290 */ "VPADDDZ128rmkz\000" |
| 67887 | /* 286305 */ "VPANDDZ128rmkz\000" |
| 67888 | /* 286320 */ "VPEXPANDDZ128rmkz\000" |
| 67889 | /* 286338 */ "VPSLLDZ128rmkz\000" |
| 67890 | /* 286353 */ "VPMULLDZ128rmkz\000" |
| 67891 | /* 286369 */ "VPSRLDZ128rmkz\000" |
| 67892 | /* 286384 */ "VPBLENDMDZ128rmkz\000" |
| 67893 | /* 286402 */ "VPANDNDZ128rmkz\000" |
| 67894 | /* 286418 */ "VCVTPH2PDZ128rmkz\000" |
| 67895 | /* 286436 */ "VPERMI2PDZ128rmkz\000" |
| 67896 | /* 286454 */ "VCVTDQ2PDZ128rmkz\000" |
| 67897 | /* 286472 */ "VCVTUDQ2PDZ128rmkz\000" |
| 67898 | /* 286491 */ "VCVTQQ2PDZ128rmkz\000" |
| 67899 | /* 286509 */ "VCVTUQQ2PDZ128rmkz\000" |
| 67900 | /* 286528 */ "VCVTPS2PDZ128rmkz\000" |
| 67901 | /* 286546 */ "VPERMT2PDZ128rmkz\000" |
| 67902 | /* 286564 */ "VMOVAPDZ128rmkz\000" |
| 67903 | /* 286580 */ "VSUBPDZ128rmkz\000" |
| 67904 | /* 286595 */ "VMINCPDZ128rmkz\000" |
| 67905 | /* 286611 */ "VMAXCPDZ128rmkz\000" |
| 67906 | /* 286627 */ "VADDPDZ128rmkz\000" |
| 67907 | /* 286642 */ "VEXPANDPDZ128rmkz\000" |
| 67908 | /* 286660 */ "VANDPDZ128rmkz\000" |
| 67909 | /* 286675 */ "VSCALEFPDZ128rmkz\000" |
| 67910 | /* 286693 */ "VUNPCKHPDZ128rmkz\000" |
| 67911 | /* 286711 */ "VPERMILPDZ128rmkz\000" |
| 67912 | /* 286729 */ "VUNPCKLPDZ128rmkz\000" |
| 67913 | /* 286747 */ "VMULPDZ128rmkz\000" |
| 67914 | /* 286762 */ "VBLENDMPDZ128rmkz\000" |
| 67915 | /* 286780 */ "VANDNPDZ128rmkz\000" |
| 67916 | /* 286796 */ "VMINPDZ128rmkz\000" |
| 67917 | /* 286811 */ "VORPDZ128rmkz\000" |
| 67918 | /* 286825 */ "VXORPDZ128rmkz\000" |
| 67919 | /* 286840 */ "VMOVUPDZ128rmkz\000" |
| 67920 | /* 286856 */ "VDIVPDZ128rmkz\000" |
| 67921 | /* 286871 */ "VMAXPDZ128rmkz\000" |
| 67922 | /* 286886 */ "VPORDZ128rmkz\000" |
| 67923 | /* 286900 */ "VPXORDZ128rmkz\000" |
| 67924 | /* 286915 */ "VPABSDZ128rmkz\000" |
| 67925 | /* 286930 */ "VPMINSDZ128rmkz\000" |
| 67926 | /* 286946 */ "VPMAXSDZ128rmkz\000" |
| 67927 | /* 286962 */ "VPCONFLICTDZ128rmkz\000" |
| 67928 | /* 286982 */ "VPOPCNTDZ128rmkz\000" |
| 67929 | /* 286999 */ "VPLZCNTDZ128rmkz\000" |
| 67930 | /* 287016 */ "VPBROADCASTDZ128rmkz\000" |
| 67931 | /* 287037 */ "VPMINUDZ128rmkz\000" |
| 67932 | /* 287053 */ "VPMAXUDZ128rmkz\000" |
| 67933 | /* 287069 */ "VPSRAVDZ128rmkz\000" |
| 67934 | /* 287085 */ "VPSLLVDZ128rmkz\000" |
| 67935 | /* 287101 */ "VPROLVDZ128rmkz\000" |
| 67936 | /* 287117 */ "VPSRLVDZ128rmkz\000" |
| 67937 | /* 287133 */ "VPRORVDZ128rmkz\000" |
| 67938 | /* 287149 */ "VPMADDWDZ128rmkz\000" |
| 67939 | /* 287166 */ "VPUNPCKHWDZ128rmkz\000" |
| 67940 | /* 287185 */ "VPUNPCKLWDZ128rmkz\000" |
| 67941 | /* 287204 */ "VPMOVSXWDZ128rmkz\000" |
| 67942 | /* 287222 */ "VPMOVZXWDZ128rmkz\000" |
| 67943 | /* 287240 */ "VCVTHF82PHZ128rmkz\000" |
| 67944 | /* 287259 */ "VCVTPD2PHZ128rmkz\000" |
| 67945 | /* 287277 */ "VCVTDQ2PHZ128rmkz\000" |
| 67946 | /* 287295 */ "VCVTUDQ2PHZ128rmkz\000" |
| 67947 | /* 287314 */ "VCVTQQ2PHZ128rmkz\000" |
| 67948 | /* 287332 */ "VCVTUQQ2PHZ128rmkz\000" |
| 67949 | /* 287351 */ "VCVTW2PHZ128rmkz\000" |
| 67950 | /* 287368 */ "VCVTUW2PHZ128rmkz\000" |
| 67951 | /* 287386 */ "VSUBPHZ128rmkz\000" |
| 67952 | /* 287401 */ "VFCMULCPHZ128rmkz\000" |
| 67953 | /* 287419 */ "VFMULCPHZ128rmkz\000" |
| 67954 | /* 287436 */ "VMINCPHZ128rmkz\000" |
| 67955 | /* 287452 */ "VMAXCPHZ128rmkz\000" |
| 67956 | /* 287468 */ "VADDPHZ128rmkz\000" |
| 67957 | /* 287483 */ "VSCALEFPHZ128rmkz\000" |
| 67958 | /* 287501 */ "VMULPHZ128rmkz\000" |
| 67959 | /* 287516 */ "VMINPHZ128rmkz\000" |
| 67960 | /* 287531 */ "VDIVPHZ128rmkz\000" |
| 67961 | /* 287546 */ "VMAXPHZ128rmkz\000" |
| 67962 | /* 287561 */ "VMOVDDUPZ128rmkz\000" |
| 67963 | /* 287578 */ "VMOVSHDUPZ128rmkz\000" |
| 67964 | /* 287596 */ "VMOVSLDUPZ128rmkz\000" |
| 67965 | /* 287614 */ "VPERMI2QZ128rmkz\000" |
| 67966 | /* 287631 */ "VPERMT2QZ128rmkz\000" |
| 67967 | /* 287648 */ "VPSRAQZ128rmkz\000" |
| 67968 | /* 287663 */ "VPSUBQZ128rmkz\000" |
| 67969 | /* 287678 */ "VPMOVSXBQZ128rmkz\000" |
| 67970 | /* 287696 */ "VPMOVZXBQZ128rmkz\000" |
| 67971 | /* 287714 */ "VCVTTPD2DQZ128rmkz\000" |
| 67972 | /* 287733 */ "VCVTPD2DQZ128rmkz\000" |
| 67973 | /* 287751 */ "VCVTTPH2DQZ128rmkz\000" |
| 67974 | /* 287770 */ "VCVTPH2DQZ128rmkz\000" |
| 67975 | /* 287788 */ "VCVTTPS2DQZ128rmkz\000" |
| 67976 | /* 287807 */ "VCVTPS2DQZ128rmkz\000" |
| 67977 | /* 287825 */ "VPADDQZ128rmkz\000" |
| 67978 | /* 287840 */ "VPUNPCKHDQZ128rmkz\000" |
| 67979 | /* 287859 */ "VPUNPCKLDQZ128rmkz\000" |
| 67980 | /* 287878 */ "VPMULDQZ128rmkz\000" |
| 67981 | /* 287894 */ "VPANDQZ128rmkz\000" |
| 67982 | /* 287909 */ "VPEXPANDQZ128rmkz\000" |
| 67983 | /* 287927 */ "VPUNPCKHQDQZ128rmkz\000" |
| 67984 | /* 287947 */ "VPUNPCKLQDQZ128rmkz\000" |
| 67985 | /* 287967 */ "VCVTTPD2UDQZ128rmkz\000" |
| 67986 | /* 287987 */ "VCVTPD2UDQZ128rmkz\000" |
| 67987 | /* 288006 */ "VCVTTPH2UDQZ128rmkz\000" |
| 67988 | /* 288026 */ "VCVTPH2UDQZ128rmkz\000" |
| 67989 | /* 288045 */ "VCVTTPS2UDQZ128rmkz\000" |
| 67990 | /* 288065 */ "VCVTPS2UDQZ128rmkz\000" |
| 67991 | /* 288084 */ "VPMULUDQZ128rmkz\000" |
| 67992 | /* 288101 */ "VPMOVSXDQZ128rmkz\000" |
| 67993 | /* 288119 */ "VPMOVZXDQZ128rmkz\000" |
| 67994 | /* 288137 */ "VPSLLQZ128rmkz\000" |
| 67995 | /* 288152 */ "VPMULLQZ128rmkz\000" |
| 67996 | /* 288168 */ "VPSRLQZ128rmkz\000" |
| 67997 | /* 288183 */ "VPBLENDMQZ128rmkz\000" |
| 67998 | /* 288201 */ "VPANDNQZ128rmkz\000" |
| 67999 | /* 288217 */ "VCVTTPD2QQZ128rmkz\000" |
| 68000 | /* 288236 */ "VCVTPD2QQZ128rmkz\000" |
| 68001 | /* 288254 */ "VCVTTPH2QQZ128rmkz\000" |
| 68002 | /* 288273 */ "VCVTPH2QQZ128rmkz\000" |
| 68003 | /* 288291 */ "VCVTTPS2QQZ128rmkz\000" |
| 68004 | /* 288310 */ "VCVTPS2QQZ128rmkz\000" |
| 68005 | /* 288328 */ "VCVTTPD2UQQZ128rmkz\000" |
| 68006 | /* 288348 */ "VCVTPD2UQQZ128rmkz\000" |
| 68007 | /* 288367 */ "VCVTTPH2UQQZ128rmkz\000" |
| 68008 | /* 288387 */ "VCVTPH2UQQZ128rmkz\000" |
| 68009 | /* 288406 */ "VCVTTPS2UQQZ128rmkz\000" |
| 68010 | /* 288426 */ "VCVTPS2UQQZ128rmkz\000" |
| 68011 | /* 288445 */ "VPORQZ128rmkz\000" |
| 68012 | /* 288459 */ "VPXORQZ128rmkz\000" |
| 68013 | /* 288474 */ "VPABSQZ128rmkz\000" |
| 68014 | /* 288489 */ "VPMINSQZ128rmkz\000" |
| 68015 | /* 288505 */ "VPMAXSQZ128rmkz\000" |
| 68016 | /* 288521 */ "VPCONFLICTQZ128rmkz\000" |
| 68017 | /* 288541 */ "VPOPCNTQZ128rmkz\000" |
| 68018 | /* 288558 */ "VPLZCNTQZ128rmkz\000" |
| 68019 | /* 288575 */ "VPBROADCASTQZ128rmkz\000" |
| 68020 | /* 288596 */ "VPMINUQZ128rmkz\000" |
| 68021 | /* 288612 */ "VPMAXUQZ128rmkz\000" |
| 68022 | /* 288628 */ "VPSRAVQZ128rmkz\000" |
| 68023 | /* 288644 */ "VPSLLVQZ128rmkz\000" |
| 68024 | /* 288660 */ "VPROLVQZ128rmkz\000" |
| 68025 | /* 288676 */ "VPSRLVQZ128rmkz\000" |
| 68026 | /* 288692 */ "VPRORVQZ128rmkz\000" |
| 68027 | /* 288708 */ "VPMOVSXWQZ128rmkz\000" |
| 68028 | /* 288726 */ "VPMOVZXWQZ128rmkz\000" |
| 68029 | /* 288744 */ "VCVT2PH2BF8SZ128rmkz\000" |
| 68030 | /* 288765 */ "VCVTBIASPH2BF8SZ128rmkz\000" |
| 68031 | /* 288789 */ "VCVTPH2BF8SZ128rmkz\000" |
| 68032 | /* 288809 */ "VCVT2PH2HF8SZ128rmkz\000" |
| 68033 | /* 288830 */ "VCVTBIASPH2HF8SZ128rmkz\000" |
| 68034 | /* 288854 */ "VCVTPH2HF8SZ128rmkz\000" |
| 68035 | /* 288874 */ "VCVTTBF162IBSZ128rmkz\000" |
| 68036 | /* 288896 */ "VCVTBF162IBSZ128rmkz\000" |
| 68037 | /* 288917 */ "VCVTTPH2IBSZ128rmkz\000" |
| 68038 | /* 288937 */ "VCVTPH2IBSZ128rmkz\000" |
| 68039 | /* 288956 */ "VCVTTPS2IBSZ128rmkz\000" |
| 68040 | /* 288976 */ "VCVTPS2IBSZ128rmkz\000" |
| 68041 | /* 288995 */ "VCVTTBF162IUBSZ128rmkz\000" |
| 68042 | /* 289018 */ "VCVTBF162IUBSZ128rmkz\000" |
| 68043 | /* 289040 */ "VCVTTPH2IUBSZ128rmkz\000" |
| 68044 | /* 289061 */ "VCVTPH2IUBSZ128rmkz\000" |
| 68045 | /* 289081 */ "VCVTTPS2IUBSZ128rmkz\000" |
| 68046 | /* 289102 */ "VCVTPS2IUBSZ128rmkz\000" |
| 68047 | /* 289122 */ "VCVTPD2PSZ128rmkz\000" |
| 68048 | /* 289140 */ "VCVTPH2PSZ128rmkz\000" |
| 68049 | /* 289158 */ "VPERMI2PSZ128rmkz\000" |
| 68050 | /* 289176 */ "VCVTDQ2PSZ128rmkz\000" |
| 68051 | /* 289194 */ "VCVTUDQ2PSZ128rmkz\000" |
| 68052 | /* 289213 */ "VCVTQQ2PSZ128rmkz\000" |
| 68053 | /* 289231 */ "VCVTUQQ2PSZ128rmkz\000" |
| 68054 | /* 289250 */ "VPERMT2PSZ128rmkz\000" |
| 68055 | /* 289268 */ "VMOVAPSZ128rmkz\000" |
| 68056 | /* 289284 */ "VSUBPSZ128rmkz\000" |
| 68057 | /* 289299 */ "VMINCPSZ128rmkz\000" |
| 68058 | /* 289315 */ "VMAXCPSZ128rmkz\000" |
| 68059 | /* 289331 */ "VADDPSZ128rmkz\000" |
| 68060 | /* 289346 */ "VEXPANDPSZ128rmkz\000" |
| 68061 | /* 289364 */ "VANDPSZ128rmkz\000" |
| 68062 | /* 289379 */ "VSCALEFPSZ128rmkz\000" |
| 68063 | /* 289397 */ "VUNPCKHPSZ128rmkz\000" |
| 68064 | /* 289415 */ "VPERMILPSZ128rmkz\000" |
| 68065 | /* 289433 */ "VUNPCKLPSZ128rmkz\000" |
| 68066 | /* 289451 */ "VMULPSZ128rmkz\000" |
| 68067 | /* 289466 */ "VBLENDMPSZ128rmkz\000" |
| 68068 | /* 289484 */ "VANDNPSZ128rmkz\000" |
| 68069 | /* 289500 */ "VMINPSZ128rmkz\000" |
| 68070 | /* 289515 */ "VORPSZ128rmkz\000" |
| 68071 | /* 289529 */ "VXORPSZ128rmkz\000" |
| 68072 | /* 289544 */ "VMOVUPSZ128rmkz\000" |
| 68073 | /* 289560 */ "VDIVPSZ128rmkz\000" |
| 68074 | /* 289575 */ "VMAXPSZ128rmkz\000" |
| 68075 | /* 289590 */ "VCVTTPD2DQSZ128rmkz\000" |
| 68076 | /* 289610 */ "VCVTTPS2DQSZ128rmkz\000" |
| 68077 | /* 289630 */ "VCVTTPD2UDQSZ128rmkz\000" |
| 68078 | /* 289651 */ "VCVTTPS2UDQSZ128rmkz\000" |
| 68079 | /* 289672 */ "VCVTTPD2QQSZ128rmkz\000" |
| 68080 | /* 289692 */ "VCVTTPS2QQSZ128rmkz\000" |
| 68081 | /* 289712 */ "VCVTTPD2UQQSZ128rmkz\000" |
| 68082 | /* 289733 */ "VCVTTPS2UQQSZ128rmkz\000" |
| 68083 | /* 289754 */ "VBROADCASTSSZ128rmkz\000" |
| 68084 | /* 289775 */ "VCVTTPH2WZ128rmkz\000" |
| 68085 | /* 289793 */ "VCVTPH2WZ128rmkz\000" |
| 68086 | /* 289810 */ "VPERMI2WZ128rmkz\000" |
| 68087 | /* 289827 */ "VPERMT2WZ128rmkz\000" |
| 68088 | /* 289844 */ "VPSRAWZ128rmkz\000" |
| 68089 | /* 289859 */ "VPUNPCKHBWZ128rmkz\000" |
| 68090 | /* 289878 */ "VPUNPCKLBWZ128rmkz\000" |
| 68091 | /* 289897 */ "VPSUBWZ128rmkz\000" |
| 68092 | /* 289912 */ "VPMOVSXBWZ128rmkz\000" |
| 68093 | /* 289930 */ "VPMOVZXBWZ128rmkz\000" |
| 68094 | /* 289948 */ "VPADDWZ128rmkz\000" |
| 68095 | /* 289963 */ "VPEXPANDWZ128rmkz\000" |
| 68096 | /* 289981 */ "VPACKSSDWZ128rmkz\000" |
| 68097 | /* 289999 */ "VPACKUSDWZ128rmkz\000" |
| 68098 | /* 290017 */ "VPAVGWZ128rmkz\000" |
| 68099 | /* 290032 */ "VPMULHWZ128rmkz\000" |
| 68100 | /* 290048 */ "VPSLLWZ128rmkz\000" |
| 68101 | /* 290063 */ "VPMULLWZ128rmkz\000" |
| 68102 | /* 290079 */ "VPSRLWZ128rmkz\000" |
| 68103 | /* 290094 */ "VPBLENDMWZ128rmkz\000" |
| 68104 | /* 290112 */ "VPERMWZ128rmkz\000" |
| 68105 | /* 290127 */ "VPABSWZ128rmkz\000" |
| 68106 | /* 290142 */ "VPMADDUBSWZ128rmkz\000" |
| 68107 | /* 290161 */ "VPSUBSWZ128rmkz\000" |
| 68108 | /* 290177 */ "VPADDSWZ128rmkz\000" |
| 68109 | /* 290193 */ "VPMINSWZ128rmkz\000" |
| 68110 | /* 290209 */ "VPMULHRSWZ128rmkz\000" |
| 68111 | /* 290227 */ "VPSUBUSWZ128rmkz\000" |
| 68112 | /* 290244 */ "VPADDUSWZ128rmkz\000" |
| 68113 | /* 290261 */ "VPMAXSWZ128rmkz\000" |
| 68114 | /* 290277 */ "VPOPCNTWZ128rmkz\000" |
| 68115 | /* 290294 */ "VPBROADCASTWZ128rmkz\000" |
| 68116 | /* 290315 */ "VCVTTPH2UWZ128rmkz\000" |
| 68117 | /* 290334 */ "VCVTPH2UWZ128rmkz\000" |
| 68118 | /* 290352 */ "VPMULHUWZ128rmkz\000" |
| 68119 | /* 290369 */ "VPMINUWZ128rmkz\000" |
| 68120 | /* 290385 */ "VPMAXUWZ128rmkz\000" |
| 68121 | /* 290401 */ "VPSRAVWZ128rmkz\000" |
| 68122 | /* 290417 */ "VPSLLVWZ128rmkz\000" |
| 68123 | /* 290433 */ "VPSRLVWZ128rmkz\000" |
| 68124 | /* 290449 */ "VCVT2PS2PHXZ128rmkz\000" |
| 68125 | /* 290469 */ "VCVTPS2PHXZ128rmkz\000" |
| 68126 | /* 290488 */ "VCVTPH2PSXZ128rmkz\000" |
| 68127 | /* 290507 */ "VP4DPWSSDrmkz\000" |
| 68128 | /* 290521 */ "VP4DPWSSDSrmkz\000" |
| 68129 | /* 290536 */ "V4FMADDPSrmkz\000" |
| 68130 | /* 290550 */ "V4FNMADDPSrmkz\000" |
| 68131 | /* 290565 */ "V4FMADDSSrmkz\000" |
| 68132 | /* 290579 */ "V4FNMADDSSrmkz\000" |
| 68133 | /* 290594 */ "VMOVDQA32Zrmkz\000" |
| 68134 | /* 290609 */ "VMOVDQU32Zrmkz\000" |
| 68135 | /* 290624 */ "VBROADCASTF32X2Zrmkz\000" |
| 68136 | /* 290645 */ "VBROADCASTI32X2Zrmkz\000" |
| 68137 | /* 290666 */ "VBROADCASTF64X2Zrmkz\000" |
| 68138 | /* 290687 */ "VBROADCASTI64X2Zrmkz\000" |
| 68139 | /* 290708 */ "VMOVDQA64Zrmkz\000" |
| 68140 | /* 290723 */ "VMOVDQU64Zrmkz\000" |
| 68141 | /* 290738 */ "VBROADCASTF32X4Zrmkz\000" |
| 68142 | /* 290759 */ "VBROADCASTI32X4Zrmkz\000" |
| 68143 | /* 290780 */ "VBROADCASTF64X4Zrmkz\000" |
| 68144 | /* 290801 */ "VBROADCASTI64X4Zrmkz\000" |
| 68145 | /* 290822 */ "VCVTNE2PS2BF16Zrmkz\000" |
| 68146 | /* 290842 */ "VCVTNEPS2BF16Zrmkz\000" |
| 68147 | /* 290861 */ "VSUBBF16Zrmkz\000" |
| 68148 | /* 290875 */ "VADDBF16Zrmkz\000" |
| 68149 | /* 290889 */ "VSCALEFBF16Zrmkz\000" |
| 68150 | /* 290906 */ "VMULBF16Zrmkz\000" |
| 68151 | /* 290920 */ "VMINBF16Zrmkz\000" |
| 68152 | /* 290934 */ "VDIVBF16Zrmkz\000" |
| 68153 | /* 290948 */ "VMAXBF16Zrmkz\000" |
| 68154 | /* 290962 */ "VMOVDQU16Zrmkz\000" |
| 68155 | /* 290977 */ "VCVT2PH2BF8Zrmkz\000" |
| 68156 | /* 290994 */ "VCVTBIASPH2BF8Zrmkz\000" |
| 68157 | /* 291014 */ "VCVTPH2BF8Zrmkz\000" |
| 68158 | /* 291030 */ "VCVT2PH2HF8Zrmkz\000" |
| 68159 | /* 291047 */ "VCVTBIASPH2HF8Zrmkz\000" |
| 68160 | /* 291067 */ "VCVTPH2HF8Zrmkz\000" |
| 68161 | /* 291083 */ "VMOVDQU8Zrmkz\000" |
| 68162 | /* 291097 */ "VBROADCASTF32X8Zrmkz\000" |
| 68163 | /* 291118 */ "VBROADCASTI32X8Zrmkz\000" |
| 68164 | /* 291139 */ "VPERMI2BZrmkz\000" |
| 68165 | /* 291153 */ "VPERMT2BZrmkz\000" |
| 68166 | /* 291167 */ "VPSUBBZrmkz\000" |
| 68167 | /* 291179 */ "VPADDBZrmkz\000" |
| 68168 | /* 291191 */ "VPEXPANDBZrmkz\000" |
| 68169 | /* 291206 */ "VPSHUFBZrmkz\000" |
| 68170 | /* 291219 */ "VPAVGBZrmkz\000" |
| 68171 | /* 291231 */ "VGF2P8MULBZrmkz\000" |
| 68172 | /* 291247 */ "VPBLENDMBZrmkz\000" |
| 68173 | /* 291262 */ "VPERMBZrmkz\000" |
| 68174 | /* 291274 */ "VPMULTISHIFTQBZrmkz\000" |
| 68175 | /* 291294 */ "VPABSBZrmkz\000" |
| 68176 | /* 291306 */ "VPSUBSBZrmkz\000" |
| 68177 | /* 291319 */ "VPADDSBZrmkz\000" |
| 68178 | /* 291332 */ "VPMINSBZrmkz\000" |
| 68179 | /* 291345 */ "VPSUBUSBZrmkz\000" |
| 68180 | /* 291359 */ "VPADDUSBZrmkz\000" |
| 68181 | /* 291373 */ "VPMAXSBZrmkz\000" |
| 68182 | /* 291386 */ "VPOPCNTBZrmkz\000" |
| 68183 | /* 291400 */ "VPBROADCASTBZrmkz\000" |
| 68184 | /* 291418 */ "VPMINUBZrmkz\000" |
| 68185 | /* 291431 */ "VPMAXUBZrmkz\000" |
| 68186 | /* 291444 */ "VPACKSSWBZrmkz\000" |
| 68187 | /* 291459 */ "VPACKUSWBZrmkz\000" |
| 68188 | /* 291474 */ "VPERMI2DZrmkz\000" |
| 68189 | /* 291488 */ "VPERMT2DZrmkz\000" |
| 68190 | /* 291502 */ "VPSRADZrmkz\000" |
| 68191 | /* 291514 */ "VPSUBDZrmkz\000" |
| 68192 | /* 291526 */ "VPMOVSXBDZrmkz\000" |
| 68193 | /* 291541 */ "VPMOVZXBDZrmkz\000" |
| 68194 | /* 291556 */ "VPADDDZrmkz\000" |
| 68195 | /* 291568 */ "VPANDDZrmkz\000" |
| 68196 | /* 291580 */ "VPEXPANDDZrmkz\000" |
| 68197 | /* 291595 */ "VPSLLDZrmkz\000" |
| 68198 | /* 291607 */ "VPMULLDZrmkz\000" |
| 68199 | /* 291620 */ "VPSRLDZrmkz\000" |
| 68200 | /* 291632 */ "VPBLENDMDZrmkz\000" |
| 68201 | /* 291647 */ "VPERMDZrmkz\000" |
| 68202 | /* 291659 */ "VPANDNDZrmkz\000" |
| 68203 | /* 291672 */ "VCVTPH2PDZrmkz\000" |
| 68204 | /* 291687 */ "VPERMI2PDZrmkz\000" |
| 68205 | /* 291702 */ "VCVTDQ2PDZrmkz\000" |
| 68206 | /* 291717 */ "VCVTUDQ2PDZrmkz\000" |
| 68207 | /* 291733 */ "VCVTQQ2PDZrmkz\000" |
| 68208 | /* 291748 */ "VCVTUQQ2PDZrmkz\000" |
| 68209 | /* 291764 */ "VCVTPS2PDZrmkz\000" |
| 68210 | /* 291779 */ "VPERMT2PDZrmkz\000" |
| 68211 | /* 291794 */ "VMOVAPDZrmkz\000" |
| 68212 | /* 291807 */ "VSUBPDZrmkz\000" |
| 68213 | /* 291819 */ "VMINCPDZrmkz\000" |
| 68214 | /* 291832 */ "VMAXCPDZrmkz\000" |
| 68215 | /* 291845 */ "VADDPDZrmkz\000" |
| 68216 | /* 291857 */ "VEXPANDPDZrmkz\000" |
| 68217 | /* 291872 */ "VANDPDZrmkz\000" |
| 68218 | /* 291884 */ "VSCALEFPDZrmkz\000" |
| 68219 | /* 291899 */ "VUNPCKHPDZrmkz\000" |
| 68220 | /* 291914 */ "VPERMILPDZrmkz\000" |
| 68221 | /* 291929 */ "VUNPCKLPDZrmkz\000" |
| 68222 | /* 291944 */ "VMULPDZrmkz\000" |
| 68223 | /* 291956 */ "VBLENDMPDZrmkz\000" |
| 68224 | /* 291971 */ "VPERMPDZrmkz\000" |
| 68225 | /* 291984 */ "VANDNPDZrmkz\000" |
| 68226 | /* 291997 */ "VMINPDZrmkz\000" |
| 68227 | /* 292009 */ "VORPDZrmkz\000" |
| 68228 | /* 292020 */ "VXORPDZrmkz\000" |
| 68229 | /* 292032 */ "VMOVUPDZrmkz\000" |
| 68230 | /* 292045 */ "VDIVPDZrmkz\000" |
| 68231 | /* 292057 */ "VMAXPDZrmkz\000" |
| 68232 | /* 292069 */ "VPORDZrmkz\000" |
| 68233 | /* 292080 */ "VPXORDZrmkz\000" |
| 68234 | /* 292092 */ "VRCP14SDZrmkz\000" |
| 68235 | /* 292106 */ "VRSQRT14SDZrmkz\000" |
| 68236 | /* 292122 */ "VPABSDZrmkz\000" |
| 68237 | /* 292134 */ "VSCALEFSDZrmkz\000" |
| 68238 | /* 292149 */ "VPMINSDZrmkz\000" |
| 68239 | /* 292162 */ "VBROADCASTSDZrmkz\000" |
| 68240 | /* 292180 */ "VMOVSDZrmkz\000" |
| 68241 | /* 292192 */ "VPMAXSDZrmkz\000" |
| 68242 | /* 292205 */ "VPCONFLICTDZrmkz\000" |
| 68243 | /* 292222 */ "VPOPCNTDZrmkz\000" |
| 68244 | /* 292236 */ "VPLZCNTDZrmkz\000" |
| 68245 | /* 292250 */ "VPBROADCASTDZrmkz\000" |
| 68246 | /* 292268 */ "VPMINUDZrmkz\000" |
| 68247 | /* 292281 */ "VPMAXUDZrmkz\000" |
| 68248 | /* 292294 */ "VPSRAVDZrmkz\000" |
| 68249 | /* 292307 */ "VPSLLVDZrmkz\000" |
| 68250 | /* 292320 */ "VPROLVDZrmkz\000" |
| 68251 | /* 292333 */ "VPSRLVDZrmkz\000" |
| 68252 | /* 292346 */ "VPRORVDZrmkz\000" |
| 68253 | /* 292359 */ "VPMADDWDZrmkz\000" |
| 68254 | /* 292373 */ "VPUNPCKHWDZrmkz\000" |
| 68255 | /* 292389 */ "VPUNPCKLWDZrmkz\000" |
| 68256 | /* 292405 */ "VPMOVSXWDZrmkz\000" |
| 68257 | /* 292420 */ "VPMOVZXWDZrmkz\000" |
| 68258 | /* 292435 */ "VCVTHF82PHZrmkz\000" |
| 68259 | /* 292451 */ "VCVTPD2PHZrmkz\000" |
| 68260 | /* 292466 */ "VCVTDQ2PHZrmkz\000" |
| 68261 | /* 292481 */ "VCVTUDQ2PHZrmkz\000" |
| 68262 | /* 292497 */ "VCVTQQ2PHZrmkz\000" |
| 68263 | /* 292512 */ "VCVTUQQ2PHZrmkz\000" |
| 68264 | /* 292528 */ "VCVTW2PHZrmkz\000" |
| 68265 | /* 292542 */ "VCVTUW2PHZrmkz\000" |
| 68266 | /* 292557 */ "VSUBPHZrmkz\000" |
| 68267 | /* 292569 */ "VFCMULCPHZrmkz\000" |
| 68268 | /* 292584 */ "VFMULCPHZrmkz\000" |
| 68269 | /* 292598 */ "VMINCPHZrmkz\000" |
| 68270 | /* 292611 */ "VMAXCPHZrmkz\000" |
| 68271 | /* 292624 */ "VADDPHZrmkz\000" |
| 68272 | /* 292636 */ "VSCALEFPHZrmkz\000" |
| 68273 | /* 292651 */ "VMULPHZrmkz\000" |
| 68274 | /* 292663 */ "VMINPHZrmkz\000" |
| 68275 | /* 292675 */ "VDIVPHZrmkz\000" |
| 68276 | /* 292687 */ "VMAXPHZrmkz\000" |
| 68277 | /* 292699 */ "VFCMULCSHZrmkz\000" |
| 68278 | /* 292714 */ "VFMULCSHZrmkz\000" |
| 68279 | /* 292728 */ "VSCALEFSHZrmkz\000" |
| 68280 | /* 292743 */ "VRCPSHZrmkz\000" |
| 68281 | /* 292755 */ "VRSQRTSHZrmkz\000" |
| 68282 | /* 292769 */ "VMOVSHZrmkz\000" |
| 68283 | /* 292781 */ "VMOVDDUPZrmkz\000" |
| 68284 | /* 292795 */ "VMOVSHDUPZrmkz\000" |
| 68285 | /* 292810 */ "VMOVSLDUPZrmkz\000" |
| 68286 | /* 292825 */ "VPERMI2QZrmkz\000" |
| 68287 | /* 292839 */ "VPERMT2QZrmkz\000" |
| 68288 | /* 292853 */ "VPSRAQZrmkz\000" |
| 68289 | /* 292865 */ "VPSUBQZrmkz\000" |
| 68290 | /* 292877 */ "VPMOVSXBQZrmkz\000" |
| 68291 | /* 292892 */ "VPMOVZXBQZrmkz\000" |
| 68292 | /* 292907 */ "VCVTTPD2DQZrmkz\000" |
| 68293 | /* 292923 */ "VCVTPD2DQZrmkz\000" |
| 68294 | /* 292938 */ "VCVTTPH2DQZrmkz\000" |
| 68295 | /* 292954 */ "VCVTPH2DQZrmkz\000" |
| 68296 | /* 292969 */ "VCVTTPS2DQZrmkz\000" |
| 68297 | /* 292985 */ "VCVTPS2DQZrmkz\000" |
| 68298 | /* 293000 */ "VPADDQZrmkz\000" |
| 68299 | /* 293012 */ "VPUNPCKHDQZrmkz\000" |
| 68300 | /* 293028 */ "VPUNPCKLDQZrmkz\000" |
| 68301 | /* 293044 */ "VPMULDQZrmkz\000" |
| 68302 | /* 293057 */ "VPANDQZrmkz\000" |
| 68303 | /* 293069 */ "VPEXPANDQZrmkz\000" |
| 68304 | /* 293084 */ "VPUNPCKHQDQZrmkz\000" |
| 68305 | /* 293101 */ "VPUNPCKLQDQZrmkz\000" |
| 68306 | /* 293118 */ "VCVTTPD2UDQZrmkz\000" |
| 68307 | /* 293135 */ "VCVTPD2UDQZrmkz\000" |
| 68308 | /* 293151 */ "VCVTTPH2UDQZrmkz\000" |
| 68309 | /* 293168 */ "VCVTPH2UDQZrmkz\000" |
| 68310 | /* 293184 */ "VCVTTPS2UDQZrmkz\000" |
| 68311 | /* 293201 */ "VCVTPS2UDQZrmkz\000" |
| 68312 | /* 293217 */ "VPMULUDQZrmkz\000" |
| 68313 | /* 293231 */ "VPMOVSXDQZrmkz\000" |
| 68314 | /* 293246 */ "VPMOVZXDQZrmkz\000" |
| 68315 | /* 293261 */ "VPSLLQZrmkz\000" |
| 68316 | /* 293273 */ "VPMULLQZrmkz\000" |
| 68317 | /* 293286 */ "VPSRLQZrmkz\000" |
| 68318 | /* 293298 */ "VPBLENDMQZrmkz\000" |
| 68319 | /* 293313 */ "VPERMQZrmkz\000" |
| 68320 | /* 293325 */ "VPANDNQZrmkz\000" |
| 68321 | /* 293338 */ "VCVTTPD2QQZrmkz\000" |
| 68322 | /* 293354 */ "VCVTPD2QQZrmkz\000" |
| 68323 | /* 293369 */ "VCVTTPH2QQZrmkz\000" |
| 68324 | /* 293385 */ "VCVTPH2QQZrmkz\000" |
| 68325 | /* 293400 */ "VCVTTPS2QQZrmkz\000" |
| 68326 | /* 293416 */ "VCVTPS2QQZrmkz\000" |
| 68327 | /* 293431 */ "VCVTTPD2UQQZrmkz\000" |
| 68328 | /* 293448 */ "VCVTPD2UQQZrmkz\000" |
| 68329 | /* 293464 */ "VCVTTPH2UQQZrmkz\000" |
| 68330 | /* 293481 */ "VCVTPH2UQQZrmkz\000" |
| 68331 | /* 293497 */ "VCVTTPS2UQQZrmkz\000" |
| 68332 | /* 293514 */ "VCVTPS2UQQZrmkz\000" |
| 68333 | /* 293530 */ "VPORQZrmkz\000" |
| 68334 | /* 293541 */ "VPXORQZrmkz\000" |
| 68335 | /* 293553 */ "VPABSQZrmkz\000" |
| 68336 | /* 293565 */ "VPMINSQZrmkz\000" |
| 68337 | /* 293578 */ "VPMAXSQZrmkz\000" |
| 68338 | /* 293591 */ "VPCONFLICTQZrmkz\000" |
| 68339 | /* 293608 */ "VPOPCNTQZrmkz\000" |
| 68340 | /* 293622 */ "VPLZCNTQZrmkz\000" |
| 68341 | /* 293636 */ "VPBROADCASTQZrmkz\000" |
| 68342 | /* 293654 */ "VPMINUQZrmkz\000" |
| 68343 | /* 293667 */ "VPMAXUQZrmkz\000" |
| 68344 | /* 293680 */ "VPSRAVQZrmkz\000" |
| 68345 | /* 293693 */ "VPSLLVQZrmkz\000" |
| 68346 | /* 293706 */ "VPROLVQZrmkz\000" |
| 68347 | /* 293719 */ "VPSRLVQZrmkz\000" |
| 68348 | /* 293732 */ "VPRORVQZrmkz\000" |
| 68349 | /* 293745 */ "VPMOVSXWQZrmkz\000" |
| 68350 | /* 293760 */ "VPMOVZXWQZrmkz\000" |
| 68351 | /* 293775 */ "VCVT2PH2BF8SZrmkz\000" |
| 68352 | /* 293793 */ "VCVTBIASPH2BF8SZrmkz\000" |
| 68353 | /* 293814 */ "VCVTPH2BF8SZrmkz\000" |
| 68354 | /* 293831 */ "VCVT2PH2HF8SZrmkz\000" |
| 68355 | /* 293849 */ "VCVTBIASPH2HF8SZrmkz\000" |
| 68356 | /* 293870 */ "VCVTPH2HF8SZrmkz\000" |
| 68357 | /* 293887 */ "VCVTTBF162IBSZrmkz\000" |
| 68358 | /* 293906 */ "VCVTBF162IBSZrmkz\000" |
| 68359 | /* 293924 */ "VCVTTPH2IBSZrmkz\000" |
| 68360 | /* 293941 */ "VCVTPH2IBSZrmkz\000" |
| 68361 | /* 293957 */ "VCVTTPS2IBSZrmkz\000" |
| 68362 | /* 293974 */ "VCVTPS2IBSZrmkz\000" |
| 68363 | /* 293990 */ "VCVTTBF162IUBSZrmkz\000" |
| 68364 | /* 294010 */ "VCVTBF162IUBSZrmkz\000" |
| 68365 | /* 294029 */ "VCVTTPH2IUBSZrmkz\000" |
| 68366 | /* 294047 */ "VCVTPH2IUBSZrmkz\000" |
| 68367 | /* 294064 */ "VCVTTPS2IUBSZrmkz\000" |
| 68368 | /* 294082 */ "VCVTPS2IUBSZrmkz\000" |
| 68369 | /* 294099 */ "VCVTPD2PSZrmkz\000" |
| 68370 | /* 294114 */ "VCVTPH2PSZrmkz\000" |
| 68371 | /* 294129 */ "VPERMI2PSZrmkz\000" |
| 68372 | /* 294144 */ "VCVTDQ2PSZrmkz\000" |
| 68373 | /* 294159 */ "VCVTUDQ2PSZrmkz\000" |
| 68374 | /* 294175 */ "VCVTQQ2PSZrmkz\000" |
| 68375 | /* 294190 */ "VCVTUQQ2PSZrmkz\000" |
| 68376 | /* 294206 */ "VPERMT2PSZrmkz\000" |
| 68377 | /* 294221 */ "VMOVAPSZrmkz\000" |
| 68378 | /* 294234 */ "VSUBPSZrmkz\000" |
| 68379 | /* 294246 */ "VMINCPSZrmkz\000" |
| 68380 | /* 294259 */ "VMAXCPSZrmkz\000" |
| 68381 | /* 294272 */ "VADDPSZrmkz\000" |
| 68382 | /* 294284 */ "VEXPANDPSZrmkz\000" |
| 68383 | /* 294299 */ "VANDPSZrmkz\000" |
| 68384 | /* 294311 */ "VSCALEFPSZrmkz\000" |
| 68385 | /* 294326 */ "VUNPCKHPSZrmkz\000" |
| 68386 | /* 294341 */ "VPERMILPSZrmkz\000" |
| 68387 | /* 294356 */ "VUNPCKLPSZrmkz\000" |
| 68388 | /* 294371 */ "VMULPSZrmkz\000" |
| 68389 | /* 294383 */ "VBLENDMPSZrmkz\000" |
| 68390 | /* 294398 */ "VPERMPSZrmkz\000" |
| 68391 | /* 294411 */ "VANDNPSZrmkz\000" |
| 68392 | /* 294424 */ "VMINPSZrmkz\000" |
| 68393 | /* 294436 */ "VORPSZrmkz\000" |
| 68394 | /* 294447 */ "VXORPSZrmkz\000" |
| 68395 | /* 294459 */ "VMOVUPSZrmkz\000" |
| 68396 | /* 294472 */ "VDIVPSZrmkz\000" |
| 68397 | /* 294484 */ "VMAXPSZrmkz\000" |
| 68398 | /* 294496 */ "VCVTTPD2DQSZrmkz\000" |
| 68399 | /* 294513 */ "VCVTTPS2DQSZrmkz\000" |
| 68400 | /* 294530 */ "VCVTTPD2UDQSZrmkz\000" |
| 68401 | /* 294548 */ "VCVTTPS2UDQSZrmkz\000" |
| 68402 | /* 294566 */ "VCVTTPD2QQSZrmkz\000" |
| 68403 | /* 294583 */ "VCVTTPS2QQSZrmkz\000" |
| 68404 | /* 294600 */ "VCVTTPD2UQQSZrmkz\000" |
| 68405 | /* 294618 */ "VCVTTPS2UQQSZrmkz\000" |
| 68406 | /* 294636 */ "VRCP14SSZrmkz\000" |
| 68407 | /* 294650 */ "VRSQRT14SSZrmkz\000" |
| 68408 | /* 294666 */ "VSCALEFSSZrmkz\000" |
| 68409 | /* 294681 */ "VBROADCASTSSZrmkz\000" |
| 68410 | /* 294699 */ "VMOVSSZrmkz\000" |
| 68411 | /* 294711 */ "VCVTTPH2WZrmkz\000" |
| 68412 | /* 294726 */ "VCVTPH2WZrmkz\000" |
| 68413 | /* 294740 */ "VPERMI2WZrmkz\000" |
| 68414 | /* 294754 */ "VPERMT2WZrmkz\000" |
| 68415 | /* 294768 */ "VPSRAWZrmkz\000" |
| 68416 | /* 294780 */ "VPUNPCKHBWZrmkz\000" |
| 68417 | /* 294796 */ "VPUNPCKLBWZrmkz\000" |
| 68418 | /* 294812 */ "VPSUBWZrmkz\000" |
| 68419 | /* 294824 */ "VPMOVSXBWZrmkz\000" |
| 68420 | /* 294839 */ "VPMOVZXBWZrmkz\000" |
| 68421 | /* 294854 */ "VPADDWZrmkz\000" |
| 68422 | /* 294866 */ "VPEXPANDWZrmkz\000" |
| 68423 | /* 294881 */ "VPACKSSDWZrmkz\000" |
| 68424 | /* 294896 */ "VPACKUSDWZrmkz\000" |
| 68425 | /* 294911 */ "VPAVGWZrmkz\000" |
| 68426 | /* 294923 */ "VPMULHWZrmkz\000" |
| 68427 | /* 294936 */ "VPSLLWZrmkz\000" |
| 68428 | /* 294948 */ "VPMULLWZrmkz\000" |
| 68429 | /* 294961 */ "VPSRLWZrmkz\000" |
| 68430 | /* 294973 */ "VPBLENDMWZrmkz\000" |
| 68431 | /* 294988 */ "VPERMWZrmkz\000" |
| 68432 | /* 295000 */ "VPABSWZrmkz\000" |
| 68433 | /* 295012 */ "VPMADDUBSWZrmkz\000" |
| 68434 | /* 295028 */ "VPSUBSWZrmkz\000" |
| 68435 | /* 295041 */ "VPADDSWZrmkz\000" |
| 68436 | /* 295054 */ "VPMINSWZrmkz\000" |
| 68437 | /* 295067 */ "VPMULHRSWZrmkz\000" |
| 68438 | /* 295082 */ "VPSUBUSWZrmkz\000" |
| 68439 | /* 295096 */ "VPADDUSWZrmkz\000" |
| 68440 | /* 295110 */ "VPMAXSWZrmkz\000" |
| 68441 | /* 295123 */ "VPOPCNTWZrmkz\000" |
| 68442 | /* 295137 */ "VPBROADCASTWZrmkz\000" |
| 68443 | /* 295155 */ "VCVTTPH2UWZrmkz\000" |
| 68444 | /* 295171 */ "VCVTPH2UWZrmkz\000" |
| 68445 | /* 295186 */ "VPMULHUWZrmkz\000" |
| 68446 | /* 295200 */ "VPMINUWZrmkz\000" |
| 68447 | /* 295213 */ "VPMAXUWZrmkz\000" |
| 68448 | /* 295226 */ "VPSRAVWZrmkz\000" |
| 68449 | /* 295239 */ "VPSLLVWZrmkz\000" |
| 68450 | /* 295252 */ "VPSRLVWZrmkz\000" |
| 68451 | /* 295265 */ "VCVT2PS2PHXZrmkz\000" |
| 68452 | /* 295282 */ "VCVTPS2PHXZrmkz\000" |
| 68453 | /* 295298 */ "VCVTPH2PSXZrmkz\000" |
| 68454 | /* 295314 */ "VFMSUB231BF16Z256rkz\000" |
| 68455 | /* 295335 */ "VFNMSUB231BF16Z256rkz\000" |
| 68456 | /* 295357 */ "VFMADD231BF16Z256rkz\000" |
| 68457 | /* 295378 */ "VFNMADD231BF16Z256rkz\000" |
| 68458 | /* 295400 */ "VFMSUB132BF16Z256rkz\000" |
| 68459 | /* 295421 */ "VFNMSUB132BF16Z256rkz\000" |
| 68460 | /* 295443 */ "VFMADD132BF16Z256rkz\000" |
| 68461 | /* 295464 */ "VFNMADD132BF16Z256rkz\000" |
| 68462 | /* 295486 */ "VFMSUB213BF16Z256rkz\000" |
| 68463 | /* 295507 */ "VFNMSUB213BF16Z256rkz\000" |
| 68464 | /* 295529 */ "VFMADD213BF16Z256rkz\000" |
| 68465 | /* 295550 */ "VFNMADD213BF16Z256rkz\000" |
| 68466 | /* 295572 */ "VRCPBF16Z256rkz\000" |
| 68467 | /* 295588 */ "VGETEXPBF16Z256rkz\000" |
| 68468 | /* 295607 */ "VRSQRTBF16Z256rkz\000" |
| 68469 | /* 295625 */ "VSQRTBF16Z256rkz\000" |
| 68470 | /* 295642 */ "VFMADDSUB231PDZ256rkz\000" |
| 68471 | /* 295664 */ "VFMSUB231PDZ256rkz\000" |
| 68472 | /* 295683 */ "VFNMSUB231PDZ256rkz\000" |
| 68473 | /* 295703 */ "VFMSUBADD231PDZ256rkz\000" |
| 68474 | /* 295725 */ "VFMADD231PDZ256rkz\000" |
| 68475 | /* 295744 */ "VFNMADD231PDZ256rkz\000" |
| 68476 | /* 295764 */ "VFMADDSUB132PDZ256rkz\000" |
| 68477 | /* 295786 */ "VFMSUB132PDZ256rkz\000" |
| 68478 | /* 295805 */ "VFNMSUB132PDZ256rkz\000" |
| 68479 | /* 295825 */ "VFMSUBADD132PDZ256rkz\000" |
| 68480 | /* 295847 */ "VFMADD132PDZ256rkz\000" |
| 68481 | /* 295866 */ "VFNMADD132PDZ256rkz\000" |
| 68482 | /* 295886 */ "VFMADDSUB213PDZ256rkz\000" |
| 68483 | /* 295908 */ "VFMSUB213PDZ256rkz\000" |
| 68484 | /* 295927 */ "VFNMSUB213PDZ256rkz\000" |
| 68485 | /* 295947 */ "VFMSUBADD213PDZ256rkz\000" |
| 68486 | /* 295969 */ "VFMADD213PDZ256rkz\000" |
| 68487 | /* 295988 */ "VFNMADD213PDZ256rkz\000" |
| 68488 | /* 296008 */ "VRCP14PDZ256rkz\000" |
| 68489 | /* 296024 */ "VRSQRT14PDZ256rkz\000" |
| 68490 | /* 296042 */ "VGETEXPPDZ256rkz\000" |
| 68491 | /* 296059 */ "VSQRTPDZ256rkz\000" |
| 68492 | /* 296074 */ "VPDPBSSDZ256rkz\000" |
| 68493 | /* 296090 */ "VPDPWSSDZ256rkz\000" |
| 68494 | /* 296106 */ "VPDPBUSDZ256rkz\000" |
| 68495 | /* 296122 */ "VPDPWUSDZ256rkz\000" |
| 68496 | /* 296138 */ "VPDPBSUDZ256rkz\000" |
| 68497 | /* 296154 */ "VPDPWSUDZ256rkz\000" |
| 68498 | /* 296170 */ "VPDPBUUDZ256rkz\000" |
| 68499 | /* 296186 */ "VPDPWUUDZ256rkz\000" |
| 68500 | /* 296202 */ "VPSHLDVDZ256rkz\000" |
| 68501 | /* 296218 */ "VPSHRDVDZ256rkz\000" |
| 68502 | /* 296234 */ "VFMADDSUB231PHZ256rkz\000" |
| 68503 | /* 296256 */ "VFMSUB231PHZ256rkz\000" |
| 68504 | /* 296275 */ "VFNMSUB231PHZ256rkz\000" |
| 68505 | /* 296295 */ "VFMSUBADD231PHZ256rkz\000" |
| 68506 | /* 296317 */ "VFMADD231PHZ256rkz\000" |
| 68507 | /* 296336 */ "VFNMADD231PHZ256rkz\000" |
| 68508 | /* 296356 */ "VFMADDSUB132PHZ256rkz\000" |
| 68509 | /* 296378 */ "VFMSUB132PHZ256rkz\000" |
| 68510 | /* 296397 */ "VFNMSUB132PHZ256rkz\000" |
| 68511 | /* 296417 */ "VFMSUBADD132PHZ256rkz\000" |
| 68512 | /* 296439 */ "VFMADD132PHZ256rkz\000" |
| 68513 | /* 296458 */ "VFNMADD132PHZ256rkz\000" |
| 68514 | /* 296478 */ "VFMADDSUB213PHZ256rkz\000" |
| 68515 | /* 296500 */ "VFMSUB213PHZ256rkz\000" |
| 68516 | /* 296519 */ "VFNMSUB213PHZ256rkz\000" |
| 68517 | /* 296539 */ "VFMSUBADD213PHZ256rkz\000" |
| 68518 | /* 296561 */ "VFMADD213PHZ256rkz\000" |
| 68519 | /* 296580 */ "VFNMADD213PHZ256rkz\000" |
| 68520 | /* 296600 */ "VFCMADDCPHZ256rkz\000" |
| 68521 | /* 296618 */ "VFMADDCPHZ256rkz\000" |
| 68522 | /* 296635 */ "VRCPPHZ256rkz\000" |
| 68523 | /* 296649 */ "VGETEXPPHZ256rkz\000" |
| 68524 | /* 296666 */ "VRSQRTPHZ256rkz\000" |
| 68525 | /* 296682 */ "VSQRTPHZ256rkz\000" |
| 68526 | /* 296697 */ "VPMADD52HUQZ256rkz\000" |
| 68527 | /* 296716 */ "VPMADD52LUQZ256rkz\000" |
| 68528 | /* 296735 */ "VPSHLDVQZ256rkz\000" |
| 68529 | /* 296751 */ "VPSHRDVQZ256rkz\000" |
| 68530 | /* 296767 */ "VPDPBSSDSZ256rkz\000" |
| 68531 | /* 296784 */ "VPDPWSSDSZ256rkz\000" |
| 68532 | /* 296801 */ "VPDPBUSDSZ256rkz\000" |
| 68533 | /* 296818 */ "VPDPWUSDSZ256rkz\000" |
| 68534 | /* 296835 */ "VPDPBSUDSZ256rkz\000" |
| 68535 | /* 296852 */ "VPDPWSUDSZ256rkz\000" |
| 68536 | /* 296869 */ "VPDPBUUDSZ256rkz\000" |
| 68537 | /* 296886 */ "VPDPWUUDSZ256rkz\000" |
| 68538 | /* 296903 */ "VFMADDSUB231PSZ256rkz\000" |
| 68539 | /* 296925 */ "VFMSUB231PSZ256rkz\000" |
| 68540 | /* 296944 */ "VFNMSUB231PSZ256rkz\000" |
| 68541 | /* 296964 */ "VFMSUBADD231PSZ256rkz\000" |
| 68542 | /* 296986 */ "VFMADD231PSZ256rkz\000" |
| 68543 | /* 297005 */ "VFNMADD231PSZ256rkz\000" |
| 68544 | /* 297025 */ "VFMADDSUB132PSZ256rkz\000" |
| 68545 | /* 297047 */ "VFMSUB132PSZ256rkz\000" |
| 68546 | /* 297066 */ "VFNMSUB132PSZ256rkz\000" |
| 68547 | /* 297086 */ "VFMSUBADD132PSZ256rkz\000" |
| 68548 | /* 297108 */ "VFMADD132PSZ256rkz\000" |
| 68549 | /* 297127 */ "VFNMADD132PSZ256rkz\000" |
| 68550 | /* 297147 */ "VFMADDSUB213PSZ256rkz\000" |
| 68551 | /* 297169 */ "VFMSUB213PSZ256rkz\000" |
| 68552 | /* 297188 */ "VFNMSUB213PSZ256rkz\000" |
| 68553 | /* 297208 */ "VFMSUBADD213PSZ256rkz\000" |
| 68554 | /* 297230 */ "VFMADD213PSZ256rkz\000" |
| 68555 | /* 297249 */ "VFNMADD213PSZ256rkz\000" |
| 68556 | /* 297269 */ "VRCP14PSZ256rkz\000" |
| 68557 | /* 297285 */ "VRSQRT14PSZ256rkz\000" |
| 68558 | /* 297303 */ "VDPBF16PSZ256rkz\000" |
| 68559 | /* 297320 */ "VDPPHPSZ256rkz\000" |
| 68560 | /* 297335 */ "VGETEXPPSZ256rkz\000" |
| 68561 | /* 297352 */ "VSQRTPSZ256rkz\000" |
| 68562 | /* 297367 */ "VPSHLDVWZ256rkz\000" |
| 68563 | /* 297383 */ "VPSHRDVWZ256rkz\000" |
| 68564 | /* 297399 */ "VFMSUB231BF16Z128rkz\000" |
| 68565 | /* 297420 */ "VFNMSUB231BF16Z128rkz\000" |
| 68566 | /* 297442 */ "VFMADD231BF16Z128rkz\000" |
| 68567 | /* 297463 */ "VFNMADD231BF16Z128rkz\000" |
| 68568 | /* 297485 */ "VFMSUB132BF16Z128rkz\000" |
| 68569 | /* 297506 */ "VFNMSUB132BF16Z128rkz\000" |
| 68570 | /* 297528 */ "VFMADD132BF16Z128rkz\000" |
| 68571 | /* 297549 */ "VFNMADD132BF16Z128rkz\000" |
| 68572 | /* 297571 */ "VFMSUB213BF16Z128rkz\000" |
| 68573 | /* 297592 */ "VFNMSUB213BF16Z128rkz\000" |
| 68574 | /* 297614 */ "VFMADD213BF16Z128rkz\000" |
| 68575 | /* 297635 */ "VFNMADD213BF16Z128rkz\000" |
| 68576 | /* 297657 */ "VRCPBF16Z128rkz\000" |
| 68577 | /* 297673 */ "VGETEXPBF16Z128rkz\000" |
| 68578 | /* 297692 */ "VRSQRTBF16Z128rkz\000" |
| 68579 | /* 297710 */ "VSQRTBF16Z128rkz\000" |
| 68580 | /* 297727 */ "VFMADDSUB231PDZ128rkz\000" |
| 68581 | /* 297749 */ "VFMSUB231PDZ128rkz\000" |
| 68582 | /* 297768 */ "VFNMSUB231PDZ128rkz\000" |
| 68583 | /* 297788 */ "VFMSUBADD231PDZ128rkz\000" |
| 68584 | /* 297810 */ "VFMADD231PDZ128rkz\000" |
| 68585 | /* 297829 */ "VFNMADD231PDZ128rkz\000" |
| 68586 | /* 297849 */ "VFMADDSUB132PDZ128rkz\000" |
| 68587 | /* 297871 */ "VFMSUB132PDZ128rkz\000" |
| 68588 | /* 297890 */ "VFNMSUB132PDZ128rkz\000" |
| 68589 | /* 297910 */ "VFMSUBADD132PDZ128rkz\000" |
| 68590 | /* 297932 */ "VFMADD132PDZ128rkz\000" |
| 68591 | /* 297951 */ "VFNMADD132PDZ128rkz\000" |
| 68592 | /* 297971 */ "VFMADDSUB213PDZ128rkz\000" |
| 68593 | /* 297993 */ "VFMSUB213PDZ128rkz\000" |
| 68594 | /* 298012 */ "VFNMSUB213PDZ128rkz\000" |
| 68595 | /* 298032 */ "VFMSUBADD213PDZ128rkz\000" |
| 68596 | /* 298054 */ "VFMADD213PDZ128rkz\000" |
| 68597 | /* 298073 */ "VFNMADD213PDZ128rkz\000" |
| 68598 | /* 298093 */ "VRCP14PDZ128rkz\000" |
| 68599 | /* 298109 */ "VRSQRT14PDZ128rkz\000" |
| 68600 | /* 298127 */ "VGETEXPPDZ128rkz\000" |
| 68601 | /* 298144 */ "VSQRTPDZ128rkz\000" |
| 68602 | /* 298159 */ "VPDPBSSDZ128rkz\000" |
| 68603 | /* 298175 */ "VPDPWSSDZ128rkz\000" |
| 68604 | /* 298191 */ "VPDPBUSDZ128rkz\000" |
| 68605 | /* 298207 */ "VPDPWUSDZ128rkz\000" |
| 68606 | /* 298223 */ "VPDPBSUDZ128rkz\000" |
| 68607 | /* 298239 */ "VPDPWSUDZ128rkz\000" |
| 68608 | /* 298255 */ "VPDPBUUDZ128rkz\000" |
| 68609 | /* 298271 */ "VPDPWUUDZ128rkz\000" |
| 68610 | /* 298287 */ "VPSHLDVDZ128rkz\000" |
| 68611 | /* 298303 */ "VPSHRDVDZ128rkz\000" |
| 68612 | /* 298319 */ "VFMADDSUB231PHZ128rkz\000" |
| 68613 | /* 298341 */ "VFMSUB231PHZ128rkz\000" |
| 68614 | /* 298360 */ "VFNMSUB231PHZ128rkz\000" |
| 68615 | /* 298380 */ "VFMSUBADD231PHZ128rkz\000" |
| 68616 | /* 298402 */ "VFMADD231PHZ128rkz\000" |
| 68617 | /* 298421 */ "VFNMADD231PHZ128rkz\000" |
| 68618 | /* 298441 */ "VFMADDSUB132PHZ128rkz\000" |
| 68619 | /* 298463 */ "VFMSUB132PHZ128rkz\000" |
| 68620 | /* 298482 */ "VFNMSUB132PHZ128rkz\000" |
| 68621 | /* 298502 */ "VFMSUBADD132PHZ128rkz\000" |
| 68622 | /* 298524 */ "VFMADD132PHZ128rkz\000" |
| 68623 | /* 298543 */ "VFNMADD132PHZ128rkz\000" |
| 68624 | /* 298563 */ "VFMADDSUB213PHZ128rkz\000" |
| 68625 | /* 298585 */ "VFMSUB213PHZ128rkz\000" |
| 68626 | /* 298604 */ "VFNMSUB213PHZ128rkz\000" |
| 68627 | /* 298624 */ "VFMSUBADD213PHZ128rkz\000" |
| 68628 | /* 298646 */ "VFMADD213PHZ128rkz\000" |
| 68629 | /* 298665 */ "VFNMADD213PHZ128rkz\000" |
| 68630 | /* 298685 */ "VFCMADDCPHZ128rkz\000" |
| 68631 | /* 298703 */ "VFMADDCPHZ128rkz\000" |
| 68632 | /* 298720 */ "VRCPPHZ128rkz\000" |
| 68633 | /* 298734 */ "VGETEXPPHZ128rkz\000" |
| 68634 | /* 298751 */ "VRSQRTPHZ128rkz\000" |
| 68635 | /* 298767 */ "VSQRTPHZ128rkz\000" |
| 68636 | /* 298782 */ "VPMADD52HUQZ128rkz\000" |
| 68637 | /* 298801 */ "VPMADD52LUQZ128rkz\000" |
| 68638 | /* 298820 */ "VPSHLDVQZ128rkz\000" |
| 68639 | /* 298836 */ "VPSHRDVQZ128rkz\000" |
| 68640 | /* 298852 */ "VPDPBSSDSZ128rkz\000" |
| 68641 | /* 298869 */ "VPDPWSSDSZ128rkz\000" |
| 68642 | /* 298886 */ "VPDPBUSDSZ128rkz\000" |
| 68643 | /* 298903 */ "VPDPWUSDSZ128rkz\000" |
| 68644 | /* 298920 */ "VPDPBSUDSZ128rkz\000" |
| 68645 | /* 298937 */ "VPDPWSUDSZ128rkz\000" |
| 68646 | /* 298954 */ "VPDPBUUDSZ128rkz\000" |
| 68647 | /* 298971 */ "VPDPWUUDSZ128rkz\000" |
| 68648 | /* 298988 */ "VFMADDSUB231PSZ128rkz\000" |
| 68649 | /* 299010 */ "VFMSUB231PSZ128rkz\000" |
| 68650 | /* 299029 */ "VFNMSUB231PSZ128rkz\000" |
| 68651 | /* 299049 */ "VFMSUBADD231PSZ128rkz\000" |
| 68652 | /* 299071 */ "VFMADD231PSZ128rkz\000" |
| 68653 | /* 299090 */ "VFNMADD231PSZ128rkz\000" |
| 68654 | /* 299110 */ "VFMADDSUB132PSZ128rkz\000" |
| 68655 | /* 299132 */ "VFMSUB132PSZ128rkz\000" |
| 68656 | /* 299151 */ "VFNMSUB132PSZ128rkz\000" |
| 68657 | /* 299171 */ "VFMSUBADD132PSZ128rkz\000" |
| 68658 | /* 299193 */ "VFMADD132PSZ128rkz\000" |
| 68659 | /* 299212 */ "VFNMADD132PSZ128rkz\000" |
| 68660 | /* 299232 */ "VFMADDSUB213PSZ128rkz\000" |
| 68661 | /* 299254 */ "VFMSUB213PSZ128rkz\000" |
| 68662 | /* 299273 */ "VFNMSUB213PSZ128rkz\000" |
| 68663 | /* 299293 */ "VFMSUBADD213PSZ128rkz\000" |
| 68664 | /* 299315 */ "VFMADD213PSZ128rkz\000" |
| 68665 | /* 299334 */ "VFNMADD213PSZ128rkz\000" |
| 68666 | /* 299354 */ "VRCP14PSZ128rkz\000" |
| 68667 | /* 299370 */ "VRSQRT14PSZ128rkz\000" |
| 68668 | /* 299388 */ "VDPBF16PSZ128rkz\000" |
| 68669 | /* 299405 */ "VDPPHPSZ128rkz\000" |
| 68670 | /* 299420 */ "VGETEXPPSZ128rkz\000" |
| 68671 | /* 299437 */ "VSQRTPSZ128rkz\000" |
| 68672 | /* 299452 */ "VPSHLDVWZ128rkz\000" |
| 68673 | /* 299468 */ "VPSHRDVWZ128rkz\000" |
| 68674 | /* 299484 */ "VFMSUB231BF16Zrkz\000" |
| 68675 | /* 299502 */ "VFNMSUB231BF16Zrkz\000" |
| 68676 | /* 299521 */ "VFMADD231BF16Zrkz\000" |
| 68677 | /* 299539 */ "VFNMADD231BF16Zrkz\000" |
| 68678 | /* 299558 */ "VFMSUB132BF16Zrkz\000" |
| 68679 | /* 299576 */ "VFNMSUB132BF16Zrkz\000" |
| 68680 | /* 299595 */ "VFMADD132BF16Zrkz\000" |
| 68681 | /* 299613 */ "VFNMADD132BF16Zrkz\000" |
| 68682 | /* 299632 */ "VFMSUB213BF16Zrkz\000" |
| 68683 | /* 299650 */ "VFNMSUB213BF16Zrkz\000" |
| 68684 | /* 299669 */ "VFMADD213BF16Zrkz\000" |
| 68685 | /* 299687 */ "VFNMADD213BF16Zrkz\000" |
| 68686 | /* 299706 */ "VRCPBF16Zrkz\000" |
| 68687 | /* 299719 */ "VGETEXPBF16Zrkz\000" |
| 68688 | /* 299735 */ "VRSQRTBF16Zrkz\000" |
| 68689 | /* 299750 */ "VSQRTBF16Zrkz\000" |
| 68690 | /* 299764 */ "VFMADDSUB231PDZrkz\000" |
| 68691 | /* 299783 */ "VFMSUB231PDZrkz\000" |
| 68692 | /* 299799 */ "VFNMSUB231PDZrkz\000" |
| 68693 | /* 299816 */ "VFMSUBADD231PDZrkz\000" |
| 68694 | /* 299835 */ "VFMADD231PDZrkz\000" |
| 68695 | /* 299851 */ "VFNMADD231PDZrkz\000" |
| 68696 | /* 299868 */ "VFMADDSUB132PDZrkz\000" |
| 68697 | /* 299887 */ "VFMSUB132PDZrkz\000" |
| 68698 | /* 299903 */ "VFNMSUB132PDZrkz\000" |
| 68699 | /* 299920 */ "VFMSUBADD132PDZrkz\000" |
| 68700 | /* 299939 */ "VFMADD132PDZrkz\000" |
| 68701 | /* 299955 */ "VFNMADD132PDZrkz\000" |
| 68702 | /* 299972 */ "VEXP2PDZrkz\000" |
| 68703 | /* 299984 */ "VFMADDSUB213PDZrkz\000" |
| 68704 | /* 300003 */ "VFMSUB213PDZrkz\000" |
| 68705 | /* 300019 */ "VFNMSUB213PDZrkz\000" |
| 68706 | /* 300036 */ "VFMSUBADD213PDZrkz\000" |
| 68707 | /* 300055 */ "VFMADD213PDZrkz\000" |
| 68708 | /* 300071 */ "VFNMADD213PDZrkz\000" |
| 68709 | /* 300088 */ "VRCP14PDZrkz\000" |
| 68710 | /* 300101 */ "VRSQRT14PDZrkz\000" |
| 68711 | /* 300116 */ "VRCP28PDZrkz\000" |
| 68712 | /* 300129 */ "VRSQRT28PDZrkz\000" |
| 68713 | /* 300144 */ "VGETEXPPDZrkz\000" |
| 68714 | /* 300158 */ "VSQRTPDZrkz\000" |
| 68715 | /* 300170 */ "VRCP28SDZrkz\000" |
| 68716 | /* 300183 */ "VRSQRT28SDZrkz\000" |
| 68717 | /* 300198 */ "VGETEXPSDZrkz\000" |
| 68718 | /* 300212 */ "VPDPBSSDZrkz\000" |
| 68719 | /* 300225 */ "VPDPWSSDZrkz\000" |
| 68720 | /* 300238 */ "VPDPBUSDZrkz\000" |
| 68721 | /* 300251 */ "VPDPWUSDZrkz\000" |
| 68722 | /* 300264 */ "VPDPBSUDZrkz\000" |
| 68723 | /* 300277 */ "VPDPWSUDZrkz\000" |
| 68724 | /* 300290 */ "VPDPBUUDZrkz\000" |
| 68725 | /* 300303 */ "VPDPWUUDZrkz\000" |
| 68726 | /* 300316 */ "VPSHLDVDZrkz\000" |
| 68727 | /* 300329 */ "VPSHRDVDZrkz\000" |
| 68728 | /* 300342 */ "VFMADDSUB231PHZrkz\000" |
| 68729 | /* 300361 */ "VFMSUB231PHZrkz\000" |
| 68730 | /* 300377 */ "VFNMSUB231PHZrkz\000" |
| 68731 | /* 300394 */ "VFMSUBADD231PHZrkz\000" |
| 68732 | /* 300413 */ "VFMADD231PHZrkz\000" |
| 68733 | /* 300429 */ "VFNMADD231PHZrkz\000" |
| 68734 | /* 300446 */ "VFMADDSUB132PHZrkz\000" |
| 68735 | /* 300465 */ "VFMSUB132PHZrkz\000" |
| 68736 | /* 300481 */ "VFNMSUB132PHZrkz\000" |
| 68737 | /* 300498 */ "VFMSUBADD132PHZrkz\000" |
| 68738 | /* 300517 */ "VFMADD132PHZrkz\000" |
| 68739 | /* 300533 */ "VFNMADD132PHZrkz\000" |
| 68740 | /* 300550 */ "VFMADDSUB213PHZrkz\000" |
| 68741 | /* 300569 */ "VFMSUB213PHZrkz\000" |
| 68742 | /* 300585 */ "VFNMSUB213PHZrkz\000" |
| 68743 | /* 300602 */ "VFMSUBADD213PHZrkz\000" |
| 68744 | /* 300621 */ "VFMADD213PHZrkz\000" |
| 68745 | /* 300637 */ "VFNMADD213PHZrkz\000" |
| 68746 | /* 300654 */ "VFCMADDCPHZrkz\000" |
| 68747 | /* 300669 */ "VFMADDCPHZrkz\000" |
| 68748 | /* 300683 */ "VRCPPHZrkz\000" |
| 68749 | /* 300694 */ "VGETEXPPHZrkz\000" |
| 68750 | /* 300708 */ "VRSQRTPHZrkz\000" |
| 68751 | /* 300721 */ "VSQRTPHZrkz\000" |
| 68752 | /* 300733 */ "VFCMADDCSHZrkz\000" |
| 68753 | /* 300748 */ "VFMADDCSHZrkz\000" |
| 68754 | /* 300762 */ "VGETEXPSHZrkz\000" |
| 68755 | /* 300776 */ "VPMADD52HUQZrkz\000" |
| 68756 | /* 300792 */ "VPMADD52LUQZrkz\000" |
| 68757 | /* 300808 */ "VPSHLDVQZrkz\000" |
| 68758 | /* 300821 */ "VPSHRDVQZrkz\000" |
| 68759 | /* 300834 */ "VPDPBSSDSZrkz\000" |
| 68760 | /* 300848 */ "VPDPWSSDSZrkz\000" |
| 68761 | /* 300862 */ "VPDPBUSDSZrkz\000" |
| 68762 | /* 300876 */ "VPDPWUSDSZrkz\000" |
| 68763 | /* 300890 */ "VPDPBSUDSZrkz\000" |
| 68764 | /* 300904 */ "VPDPWSUDSZrkz\000" |
| 68765 | /* 300918 */ "VPDPBUUDSZrkz\000" |
| 68766 | /* 300932 */ "VPDPWUUDSZrkz\000" |
| 68767 | /* 300946 */ "VFMADDSUB231PSZrkz\000" |
| 68768 | /* 300965 */ "VFMSUB231PSZrkz\000" |
| 68769 | /* 300981 */ "VFNMSUB231PSZrkz\000" |
| 68770 | /* 300998 */ "VFMSUBADD231PSZrkz\000" |
| 68771 | /* 301017 */ "VFMADD231PSZrkz\000" |
| 68772 | /* 301033 */ "VFNMADD231PSZrkz\000" |
| 68773 | /* 301050 */ "VFMADDSUB132PSZrkz\000" |
| 68774 | /* 301069 */ "VFMSUB132PSZrkz\000" |
| 68775 | /* 301085 */ "VFNMSUB132PSZrkz\000" |
| 68776 | /* 301102 */ "VFMSUBADD132PSZrkz\000" |
| 68777 | /* 301121 */ "VFMADD132PSZrkz\000" |
| 68778 | /* 301137 */ "VFNMADD132PSZrkz\000" |
| 68779 | /* 301154 */ "VEXP2PSZrkz\000" |
| 68780 | /* 301166 */ "VFMADDSUB213PSZrkz\000" |
| 68781 | /* 301185 */ "VFMSUB213PSZrkz\000" |
| 68782 | /* 301201 */ "VFNMSUB213PSZrkz\000" |
| 68783 | /* 301218 */ "VFMSUBADD213PSZrkz\000" |
| 68784 | /* 301237 */ "VFMADD213PSZrkz\000" |
| 68785 | /* 301253 */ "VFNMADD213PSZrkz\000" |
| 68786 | /* 301270 */ "VRCP14PSZrkz\000" |
| 68787 | /* 301283 */ "VRSQRT14PSZrkz\000" |
| 68788 | /* 301298 */ "VDPBF16PSZrkz\000" |
| 68789 | /* 301312 */ "VRCP28PSZrkz\000" |
| 68790 | /* 301325 */ "VRSQRT28PSZrkz\000" |
| 68791 | /* 301340 */ "VDPPHPSZrkz\000" |
| 68792 | /* 301352 */ "VGETEXPPSZrkz\000" |
| 68793 | /* 301366 */ "VSQRTPSZrkz\000" |
| 68794 | /* 301378 */ "VRCP28SSZrkz\000" |
| 68795 | /* 301391 */ "VRSQRT28SSZrkz\000" |
| 68796 | /* 301406 */ "VGETEXPSSZrkz\000" |
| 68797 | /* 301420 */ "VPSHLDVWZrkz\000" |
| 68798 | /* 301433 */ "VPSHRDVWZrkz\000" |
| 68799 | /* 301446 */ "VMOVDQA32Z256rrkz\000" |
| 68800 | /* 301464 */ "VMOVDQU32Z256rrkz\000" |
| 68801 | /* 301482 */ "VBROADCASTF32X2Z256rrkz\000" |
| 68802 | /* 301506 */ "VBROADCASTI32X2Z256rrkz\000" |
| 68803 | /* 301530 */ "VMOVDQA64Z256rrkz\000" |
| 68804 | /* 301548 */ "VMOVDQU64Z256rrkz\000" |
| 68805 | /* 301566 */ "VCVTNE2PS2BF16Z256rrkz\000" |
| 68806 | /* 301589 */ "VCVTNEPS2BF16Z256rrkz\000" |
| 68807 | /* 301611 */ "VSUBBF16Z256rrkz\000" |
| 68808 | /* 301628 */ "VADDBF16Z256rrkz\000" |
| 68809 | /* 301645 */ "VSCALEFBF16Z256rrkz\000" |
| 68810 | /* 301665 */ "VMULBF16Z256rrkz\000" |
| 68811 | /* 301682 */ "VMINBF16Z256rrkz\000" |
| 68812 | /* 301699 */ "VDIVBF16Z256rrkz\000" |
| 68813 | /* 301716 */ "VMAXBF16Z256rrkz\000" |
| 68814 | /* 301733 */ "VMOVDQU16Z256rrkz\000" |
| 68815 | /* 301751 */ "VCVT2PH2BF8Z256rrkz\000" |
| 68816 | /* 301771 */ "VCVTBIASPH2BF8Z256rrkz\000" |
| 68817 | /* 301794 */ "VCVTPH2BF8Z256rrkz\000" |
| 68818 | /* 301813 */ "VCVT2PH2HF8Z256rrkz\000" |
| 68819 | /* 301833 */ "VCVTBIASPH2HF8Z256rrkz\000" |
| 68820 | /* 301856 */ "VCVTPH2HF8Z256rrkz\000" |
| 68821 | /* 301875 */ "VMOVDQU8Z256rrkz\000" |
| 68822 | /* 301892 */ "VPERMI2BZ256rrkz\000" |
| 68823 | /* 301909 */ "VPERMT2BZ256rrkz\000" |
| 68824 | /* 301926 */ "VPSUBBZ256rrkz\000" |
| 68825 | /* 301941 */ "VPADDBZ256rrkz\000" |
| 68826 | /* 301956 */ "VPEXPANDBZ256rrkz\000" |
| 68827 | /* 301974 */ "VPMOVUSDBZ256rrkz\000" |
| 68828 | /* 301992 */ "VPMOVSDBZ256rrkz\000" |
| 68829 | /* 302009 */ "VPMOVDBZ256rrkz\000" |
| 68830 | /* 302025 */ "VPSHUFBZ256rrkz\000" |
| 68831 | /* 302041 */ "VPAVGBZ256rrkz\000" |
| 68832 | /* 302056 */ "VGF2P8MULBZ256rrkz\000" |
| 68833 | /* 302075 */ "VPBLENDMBZ256rrkz\000" |
| 68834 | /* 302093 */ "VPERMBZ256rrkz\000" |
| 68835 | /* 302108 */ "VPMOVUSQBZ256rrkz\000" |
| 68836 | /* 302126 */ "VPMOVSQBZ256rrkz\000" |
| 68837 | /* 302143 */ "VPMULTISHIFTQBZ256rrkz\000" |
| 68838 | /* 302166 */ "VPMOVQBZ256rrkz\000" |
| 68839 | /* 302182 */ "VPABSBZ256rrkz\000" |
| 68840 | /* 302197 */ "VPSUBSBZ256rrkz\000" |
| 68841 | /* 302213 */ "VPADDSBZ256rrkz\000" |
| 68842 | /* 302229 */ "VPMINSBZ256rrkz\000" |
| 68843 | /* 302245 */ "VPCOMPRESSBZ256rrkz\000" |
| 68844 | /* 302265 */ "VPSUBUSBZ256rrkz\000" |
| 68845 | /* 302282 */ "VPADDUSBZ256rrkz\000" |
| 68846 | /* 302299 */ "VPMAXSBZ256rrkz\000" |
| 68847 | /* 302315 */ "VPOPCNTBZ256rrkz\000" |
| 68848 | /* 302332 */ "VPBROADCASTBZ256rrkz\000" |
| 68849 | /* 302353 */ "VPMINUBZ256rrkz\000" |
| 68850 | /* 302369 */ "VPMAXUBZ256rrkz\000" |
| 68851 | /* 302385 */ "VPACKSSWBZ256rrkz\000" |
| 68852 | /* 302403 */ "VPACKUSWBZ256rrkz\000" |
| 68853 | /* 302421 */ "VPMOVUSWBZ256rrkz\000" |
| 68854 | /* 302439 */ "VPMOVSWBZ256rrkz\000" |
| 68855 | /* 302456 */ "VPMOVWBZ256rrkz\000" |
| 68856 | /* 302472 */ "VPERMI2DZ256rrkz\000" |
| 68857 | /* 302489 */ "VPERMT2DZ256rrkz\000" |
| 68858 | /* 302506 */ "VPSRADZ256rrkz\000" |
| 68859 | /* 302521 */ "VPSUBDZ256rrkz\000" |
| 68860 | /* 302536 */ "VPMOVSXBDZ256rrkz\000" |
| 68861 | /* 302554 */ "VPMOVZXBDZ256rrkz\000" |
| 68862 | /* 302572 */ "VPADDDZ256rrkz\000" |
| 68863 | /* 302587 */ "VPANDDZ256rrkz\000" |
| 68864 | /* 302602 */ "VPEXPANDDZ256rrkz\000" |
| 68865 | /* 302620 */ "VPSLLDZ256rrkz\000" |
| 68866 | /* 302635 */ "VPMULLDZ256rrkz\000" |
| 68867 | /* 302651 */ "VPSRLDZ256rrkz\000" |
| 68868 | /* 302666 */ "VPBLENDMDZ256rrkz\000" |
| 68869 | /* 302684 */ "VPERMDZ256rrkz\000" |
| 68870 | /* 302699 */ "VPANDNDZ256rrkz\000" |
| 68871 | /* 302715 */ "VCVTPH2PDZ256rrkz\000" |
| 68872 | /* 302733 */ "VPERMI2PDZ256rrkz\000" |
| 68873 | /* 302751 */ "VCVTDQ2PDZ256rrkz\000" |
| 68874 | /* 302769 */ "VCVTUDQ2PDZ256rrkz\000" |
| 68875 | /* 302788 */ "VCVTQQ2PDZ256rrkz\000" |
| 68876 | /* 302806 */ "VCVTUQQ2PDZ256rrkz\000" |
| 68877 | /* 302825 */ "VCVTPS2PDZ256rrkz\000" |
| 68878 | /* 302843 */ "VPERMT2PDZ256rrkz\000" |
| 68879 | /* 302861 */ "VMOVAPDZ256rrkz\000" |
| 68880 | /* 302877 */ "VSUBPDZ256rrkz\000" |
| 68881 | /* 302892 */ "VMINCPDZ256rrkz\000" |
| 68882 | /* 302908 */ "VMAXCPDZ256rrkz\000" |
| 68883 | /* 302924 */ "VADDPDZ256rrkz\000" |
| 68884 | /* 302939 */ "VEXPANDPDZ256rrkz\000" |
| 68885 | /* 302957 */ "VANDPDZ256rrkz\000" |
| 68886 | /* 302972 */ "VSCALEFPDZ256rrkz\000" |
| 68887 | /* 302990 */ "VUNPCKHPDZ256rrkz\000" |
| 68888 | /* 303008 */ "VPERMILPDZ256rrkz\000" |
| 68889 | /* 303026 */ "VUNPCKLPDZ256rrkz\000" |
| 68890 | /* 303044 */ "VMULPDZ256rrkz\000" |
| 68891 | /* 303059 */ "VBLENDMPDZ256rrkz\000" |
| 68892 | /* 303077 */ "VPERMPDZ256rrkz\000" |
| 68893 | /* 303093 */ "VANDNPDZ256rrkz\000" |
| 68894 | /* 303109 */ "VMINPDZ256rrkz\000" |
| 68895 | /* 303124 */ "VORPDZ256rrkz\000" |
| 68896 | /* 303138 */ "VXORPDZ256rrkz\000" |
| 68897 | /* 303153 */ "VCOMPRESSPDZ256rrkz\000" |
| 68898 | /* 303173 */ "VMOVUPDZ256rrkz\000" |
| 68899 | /* 303189 */ "VDIVPDZ256rrkz\000" |
| 68900 | /* 303204 */ "VMAXPDZ256rrkz\000" |
| 68901 | /* 303219 */ "VPMOVUSQDZ256rrkz\000" |
| 68902 | /* 303237 */ "VPMOVSQDZ256rrkz\000" |
| 68903 | /* 303254 */ "VPMOVQDZ256rrkz\000" |
| 68904 | /* 303270 */ "VPORDZ256rrkz\000" |
| 68905 | /* 303284 */ "VPXORDZ256rrkz\000" |
| 68906 | /* 303299 */ "VPABSDZ256rrkz\000" |
| 68907 | /* 303314 */ "VPMINSDZ256rrkz\000" |
| 68908 | /* 303330 */ "VPCOMPRESSDZ256rrkz\000" |
| 68909 | /* 303350 */ "VBROADCASTSDZ256rrkz\000" |
| 68910 | /* 303371 */ "VPMAXSDZ256rrkz\000" |
| 68911 | /* 303387 */ "VPCONFLICTDZ256rrkz\000" |
| 68912 | /* 303407 */ "VPOPCNTDZ256rrkz\000" |
| 68913 | /* 303424 */ "VPLZCNTDZ256rrkz\000" |
| 68914 | /* 303441 */ "VPBROADCASTDZ256rrkz\000" |
| 68915 | /* 303462 */ "VPMINUDZ256rrkz\000" |
| 68916 | /* 303478 */ "VPMAXUDZ256rrkz\000" |
| 68917 | /* 303494 */ "VPSRAVDZ256rrkz\000" |
| 68918 | /* 303510 */ "VPSLLVDZ256rrkz\000" |
| 68919 | /* 303526 */ "VPROLVDZ256rrkz\000" |
| 68920 | /* 303542 */ "VPSRLVDZ256rrkz\000" |
| 68921 | /* 303558 */ "VPRORVDZ256rrkz\000" |
| 68922 | /* 303574 */ "VPMADDWDZ256rrkz\000" |
| 68923 | /* 303591 */ "VPUNPCKHWDZ256rrkz\000" |
| 68924 | /* 303610 */ "VPUNPCKLWDZ256rrkz\000" |
| 68925 | /* 303629 */ "VPMOVSXWDZ256rrkz\000" |
| 68926 | /* 303647 */ "VPMOVZXWDZ256rrkz\000" |
| 68927 | /* 303665 */ "VCVTHF82PHZ256rrkz\000" |
| 68928 | /* 303684 */ "VCVTPD2PHZ256rrkz\000" |
| 68929 | /* 303702 */ "VCVTDQ2PHZ256rrkz\000" |
| 68930 | /* 303720 */ "VCVTUDQ2PHZ256rrkz\000" |
| 68931 | /* 303739 */ "VCVTQQ2PHZ256rrkz\000" |
| 68932 | /* 303757 */ "VCVTUQQ2PHZ256rrkz\000" |
| 68933 | /* 303776 */ "VCVTPS2PHZ256rrkz\000" |
| 68934 | /* 303794 */ "VCVTW2PHZ256rrkz\000" |
| 68935 | /* 303811 */ "VCVTUW2PHZ256rrkz\000" |
| 68936 | /* 303829 */ "VSUBPHZ256rrkz\000" |
| 68937 | /* 303844 */ "VFCMULCPHZ256rrkz\000" |
| 68938 | /* 303862 */ "VFMULCPHZ256rrkz\000" |
| 68939 | /* 303879 */ "VMINCPHZ256rrkz\000" |
| 68940 | /* 303895 */ "VMAXCPHZ256rrkz\000" |
| 68941 | /* 303911 */ "VADDPHZ256rrkz\000" |
| 68942 | /* 303926 */ "VSCALEFPHZ256rrkz\000" |
| 68943 | /* 303944 */ "VMULPHZ256rrkz\000" |
| 68944 | /* 303959 */ "VMINPHZ256rrkz\000" |
| 68945 | /* 303974 */ "VDIVPHZ256rrkz\000" |
| 68946 | /* 303989 */ "VMAXPHZ256rrkz\000" |
| 68947 | /* 304004 */ "VMOVDDUPZ256rrkz\000" |
| 68948 | /* 304021 */ "VMOVSHDUPZ256rrkz\000" |
| 68949 | /* 304039 */ "VMOVSLDUPZ256rrkz\000" |
| 68950 | /* 304057 */ "VPERMI2QZ256rrkz\000" |
| 68951 | /* 304074 */ "VPERMT2QZ256rrkz\000" |
| 68952 | /* 304091 */ "VPSRAQZ256rrkz\000" |
| 68953 | /* 304106 */ "VPSUBQZ256rrkz\000" |
| 68954 | /* 304121 */ "VPMOVSXBQZ256rrkz\000" |
| 68955 | /* 304139 */ "VPMOVZXBQZ256rrkz\000" |
| 68956 | /* 304157 */ "VCVTTPD2DQZ256rrkz\000" |
| 68957 | /* 304176 */ "VCVTPD2DQZ256rrkz\000" |
| 68958 | /* 304194 */ "VCVTTPH2DQZ256rrkz\000" |
| 68959 | /* 304213 */ "VCVTPH2DQZ256rrkz\000" |
| 68960 | /* 304231 */ "VCVTTPS2DQZ256rrkz\000" |
| 68961 | /* 304250 */ "VCVTPS2DQZ256rrkz\000" |
| 68962 | /* 304268 */ "VPADDQZ256rrkz\000" |
| 68963 | /* 304283 */ "VPUNPCKHDQZ256rrkz\000" |
| 68964 | /* 304302 */ "VPUNPCKLDQZ256rrkz\000" |
| 68965 | /* 304321 */ "VPMULDQZ256rrkz\000" |
| 68966 | /* 304337 */ "VPANDQZ256rrkz\000" |
| 68967 | /* 304352 */ "VPEXPANDQZ256rrkz\000" |
| 68968 | /* 304370 */ "VPUNPCKHQDQZ256rrkz\000" |
| 68969 | /* 304390 */ "VPUNPCKLQDQZ256rrkz\000" |
| 68970 | /* 304410 */ "VCVTTPD2UDQZ256rrkz\000" |
| 68971 | /* 304430 */ "VCVTPD2UDQZ256rrkz\000" |
| 68972 | /* 304449 */ "VCVTTPH2UDQZ256rrkz\000" |
| 68973 | /* 304469 */ "VCVTPH2UDQZ256rrkz\000" |
| 68974 | /* 304488 */ "VCVTTPS2UDQZ256rrkz\000" |
| 68975 | /* 304508 */ "VCVTPS2UDQZ256rrkz\000" |
| 68976 | /* 304527 */ "VPMULUDQZ256rrkz\000" |
| 68977 | /* 304544 */ "VPMOVSXDQZ256rrkz\000" |
| 68978 | /* 304562 */ "VPMOVZXDQZ256rrkz\000" |
| 68979 | /* 304580 */ "VPSLLQZ256rrkz\000" |
| 68980 | /* 304595 */ "VPMULLQZ256rrkz\000" |
| 68981 | /* 304611 */ "VPSRLQZ256rrkz\000" |
| 68982 | /* 304626 */ "VPBLENDMQZ256rrkz\000" |
| 68983 | /* 304644 */ "VPERMQZ256rrkz\000" |
| 68984 | /* 304659 */ "VPANDNQZ256rrkz\000" |
| 68985 | /* 304675 */ "VCVTTPD2QQZ256rrkz\000" |
| 68986 | /* 304694 */ "VCVTPD2QQZ256rrkz\000" |
| 68987 | /* 304712 */ "VCVTTPH2QQZ256rrkz\000" |
| 68988 | /* 304731 */ "VCVTPH2QQZ256rrkz\000" |
| 68989 | /* 304749 */ "VCVTTPS2QQZ256rrkz\000" |
| 68990 | /* 304768 */ "VCVTPS2QQZ256rrkz\000" |
| 68991 | /* 304786 */ "VCVTTPD2UQQZ256rrkz\000" |
| 68992 | /* 304806 */ "VCVTPD2UQQZ256rrkz\000" |
| 68993 | /* 304825 */ "VCVTTPH2UQQZ256rrkz\000" |
| 68994 | /* 304845 */ "VCVTPH2UQQZ256rrkz\000" |
| 68995 | /* 304864 */ "VCVTTPS2UQQZ256rrkz\000" |
| 68996 | /* 304884 */ "VCVTPS2UQQZ256rrkz\000" |
| 68997 | /* 304903 */ "VPORQZ256rrkz\000" |
| 68998 | /* 304917 */ "VPXORQZ256rrkz\000" |
| 68999 | /* 304932 */ "VPABSQZ256rrkz\000" |
| 69000 | /* 304947 */ "VPMINSQZ256rrkz\000" |
| 69001 | /* 304963 */ "VPCOMPRESSQZ256rrkz\000" |
| 69002 | /* 304983 */ "VPMAXSQZ256rrkz\000" |
| 69003 | /* 304999 */ "VPCONFLICTQZ256rrkz\000" |
| 69004 | /* 305019 */ "VPOPCNTQZ256rrkz\000" |
| 69005 | /* 305036 */ "VPLZCNTQZ256rrkz\000" |
| 69006 | /* 305053 */ "VPBROADCASTQZ256rrkz\000" |
| 69007 | /* 305074 */ "VPMINUQZ256rrkz\000" |
| 69008 | /* 305090 */ "VPMAXUQZ256rrkz\000" |
| 69009 | /* 305106 */ "VPSRAVQZ256rrkz\000" |
| 69010 | /* 305122 */ "VPSLLVQZ256rrkz\000" |
| 69011 | /* 305138 */ "VPROLVQZ256rrkz\000" |
| 69012 | /* 305154 */ "VPSRLVQZ256rrkz\000" |
| 69013 | /* 305170 */ "VPRORVQZ256rrkz\000" |
| 69014 | /* 305186 */ "VPMOVSXWQZ256rrkz\000" |
| 69015 | /* 305204 */ "VPMOVZXWQZ256rrkz\000" |
| 69016 | /* 305222 */ "VCVT2PH2BF8SZ256rrkz\000" |
| 69017 | /* 305243 */ "VCVTBIASPH2BF8SZ256rrkz\000" |
| 69018 | /* 305267 */ "VCVTPH2BF8SZ256rrkz\000" |
| 69019 | /* 305287 */ "VCVT2PH2HF8SZ256rrkz\000" |
| 69020 | /* 305308 */ "VCVTBIASPH2HF8SZ256rrkz\000" |
| 69021 | /* 305332 */ "VCVTPH2HF8SZ256rrkz\000" |
| 69022 | /* 305352 */ "VCVTTBF162IBSZ256rrkz\000" |
| 69023 | /* 305374 */ "VCVTBF162IBSZ256rrkz\000" |
| 69024 | /* 305395 */ "VCVTTPH2IBSZ256rrkz\000" |
| 69025 | /* 305415 */ "VCVTPH2IBSZ256rrkz\000" |
| 69026 | /* 305434 */ "VCVTTPS2IBSZ256rrkz\000" |
| 69027 | /* 305454 */ "VCVTPS2IBSZ256rrkz\000" |
| 69028 | /* 305473 */ "VCVTTBF162IUBSZ256rrkz\000" |
| 69029 | /* 305496 */ "VCVTBF162IUBSZ256rrkz\000" |
| 69030 | /* 305518 */ "VCVTTPH2IUBSZ256rrkz\000" |
| 69031 | /* 305539 */ "VCVTPH2IUBSZ256rrkz\000" |
| 69032 | /* 305559 */ "VCVTTPS2IUBSZ256rrkz\000" |
| 69033 | /* 305580 */ "VCVTPS2IUBSZ256rrkz\000" |
| 69034 | /* 305600 */ "VCVTPD2PSZ256rrkz\000" |
| 69035 | /* 305618 */ "VCVTPH2PSZ256rrkz\000" |
| 69036 | /* 305636 */ "VPERMI2PSZ256rrkz\000" |
| 69037 | /* 305654 */ "VCVTDQ2PSZ256rrkz\000" |
| 69038 | /* 305672 */ "VCVTUDQ2PSZ256rrkz\000" |
| 69039 | /* 305691 */ "VCVTQQ2PSZ256rrkz\000" |
| 69040 | /* 305709 */ "VCVTUQQ2PSZ256rrkz\000" |
| 69041 | /* 305728 */ "VPERMT2PSZ256rrkz\000" |
| 69042 | /* 305746 */ "VMOVAPSZ256rrkz\000" |
| 69043 | /* 305762 */ "VSUBPSZ256rrkz\000" |
| 69044 | /* 305777 */ "VMINCPSZ256rrkz\000" |
| 69045 | /* 305793 */ "VMAXCPSZ256rrkz\000" |
| 69046 | /* 305809 */ "VADDPSZ256rrkz\000" |
| 69047 | /* 305824 */ "VEXPANDPSZ256rrkz\000" |
| 69048 | /* 305842 */ "VANDPSZ256rrkz\000" |
| 69049 | /* 305857 */ "VSCALEFPSZ256rrkz\000" |
| 69050 | /* 305875 */ "VUNPCKHPSZ256rrkz\000" |
| 69051 | /* 305893 */ "VPERMILPSZ256rrkz\000" |
| 69052 | /* 305911 */ "VUNPCKLPSZ256rrkz\000" |
| 69053 | /* 305929 */ "VMULPSZ256rrkz\000" |
| 69054 | /* 305944 */ "VBLENDMPSZ256rrkz\000" |
| 69055 | /* 305962 */ "VPERMPSZ256rrkz\000" |
| 69056 | /* 305978 */ "VANDNPSZ256rrkz\000" |
| 69057 | /* 305994 */ "VMINPSZ256rrkz\000" |
| 69058 | /* 306009 */ "VORPSZ256rrkz\000" |
| 69059 | /* 306023 */ "VXORPSZ256rrkz\000" |
| 69060 | /* 306038 */ "VCOMPRESSPSZ256rrkz\000" |
| 69061 | /* 306058 */ "VMOVUPSZ256rrkz\000" |
| 69062 | /* 306074 */ "VDIVPSZ256rrkz\000" |
| 69063 | /* 306089 */ "VMAXPSZ256rrkz\000" |
| 69064 | /* 306104 */ "VCVTTPD2DQSZ256rrkz\000" |
| 69065 | /* 306124 */ "VCVTTPS2DQSZ256rrkz\000" |
| 69066 | /* 306144 */ "VCVTTPD2UDQSZ256rrkz\000" |
| 69067 | /* 306165 */ "VCVTTPS2UDQSZ256rrkz\000" |
| 69068 | /* 306186 */ "VCVTTPD2QQSZ256rrkz\000" |
| 69069 | /* 306206 */ "VCVTTPS2QQSZ256rrkz\000" |
| 69070 | /* 306226 */ "VCVTTPD2UQQSZ256rrkz\000" |
| 69071 | /* 306247 */ "VCVTTPS2UQQSZ256rrkz\000" |
| 69072 | /* 306268 */ "VBROADCASTSSZ256rrkz\000" |
| 69073 | /* 306289 */ "VCVTTPH2WZ256rrkz\000" |
| 69074 | /* 306307 */ "VCVTPH2WZ256rrkz\000" |
| 69075 | /* 306324 */ "VPERMI2WZ256rrkz\000" |
| 69076 | /* 306341 */ "VPERMT2WZ256rrkz\000" |
| 69077 | /* 306358 */ "VPSRAWZ256rrkz\000" |
| 69078 | /* 306373 */ "VPUNPCKHBWZ256rrkz\000" |
| 69079 | /* 306392 */ "VPUNPCKLBWZ256rrkz\000" |
| 69080 | /* 306411 */ "VPSUBWZ256rrkz\000" |
| 69081 | /* 306426 */ "VPMOVSXBWZ256rrkz\000" |
| 69082 | /* 306444 */ "VPMOVZXBWZ256rrkz\000" |
| 69083 | /* 306462 */ "VPADDWZ256rrkz\000" |
| 69084 | /* 306477 */ "VPEXPANDWZ256rrkz\000" |
| 69085 | /* 306495 */ "VPACKSSDWZ256rrkz\000" |
| 69086 | /* 306513 */ "VPACKUSDWZ256rrkz\000" |
| 69087 | /* 306531 */ "VPMOVUSDWZ256rrkz\000" |
| 69088 | /* 306549 */ "VPMOVSDWZ256rrkz\000" |
| 69089 | /* 306566 */ "VPMOVDWZ256rrkz\000" |
| 69090 | /* 306582 */ "VPAVGWZ256rrkz\000" |
| 69091 | /* 306597 */ "VPMULHWZ256rrkz\000" |
| 69092 | /* 306613 */ "VPSLLWZ256rrkz\000" |
| 69093 | /* 306628 */ "VPMULLWZ256rrkz\000" |
| 69094 | /* 306644 */ "VPSRLWZ256rrkz\000" |
| 69095 | /* 306659 */ "VPBLENDMWZ256rrkz\000" |
| 69096 | /* 306677 */ "VPERMWZ256rrkz\000" |
| 69097 | /* 306692 */ "VPMOVUSQWZ256rrkz\000" |
| 69098 | /* 306710 */ "VPMOVSQWZ256rrkz\000" |
| 69099 | /* 306727 */ "VPMOVQWZ256rrkz\000" |
| 69100 | /* 306743 */ "VPABSWZ256rrkz\000" |
| 69101 | /* 306758 */ "VPMADDUBSWZ256rrkz\000" |
| 69102 | /* 306777 */ "VPSUBSWZ256rrkz\000" |
| 69103 | /* 306793 */ "VPADDSWZ256rrkz\000" |
| 69104 | /* 306809 */ "VPMINSWZ256rrkz\000" |
| 69105 | /* 306825 */ "VPMULHRSWZ256rrkz\000" |
| 69106 | /* 306843 */ "VPCOMPRESSWZ256rrkz\000" |
| 69107 | /* 306863 */ "VPSUBUSWZ256rrkz\000" |
| 69108 | /* 306880 */ "VPADDUSWZ256rrkz\000" |
| 69109 | /* 306897 */ "VPMAXSWZ256rrkz\000" |
| 69110 | /* 306913 */ "VPOPCNTWZ256rrkz\000" |
| 69111 | /* 306930 */ "VPBROADCASTWZ256rrkz\000" |
| 69112 | /* 306951 */ "VCVTTPH2UWZ256rrkz\000" |
| 69113 | /* 306970 */ "VCVTPH2UWZ256rrkz\000" |
| 69114 | /* 306988 */ "VPMULHUWZ256rrkz\000" |
| 69115 | /* 307005 */ "VPMINUWZ256rrkz\000" |
| 69116 | /* 307021 */ "VPMAXUWZ256rrkz\000" |
| 69117 | /* 307037 */ "VPSRAVWZ256rrkz\000" |
| 69118 | /* 307053 */ "VPSLLVWZ256rrkz\000" |
| 69119 | /* 307069 */ "VPSRLVWZ256rrkz\000" |
| 69120 | /* 307085 */ "VCVT2PS2PHXZ256rrkz\000" |
| 69121 | /* 307105 */ "VCVTPS2PHXZ256rrkz\000" |
| 69122 | /* 307124 */ "VCVTPH2PSXZ256rrkz\000" |
| 69123 | /* 307143 */ "VPBROADCASTBrZ256rrkz\000" |
| 69124 | /* 307165 */ "VPBROADCASTDrZ256rrkz\000" |
| 69125 | /* 307187 */ "VPBROADCASTQrZ256rrkz\000" |
| 69126 | /* 307209 */ "VPBROADCASTWrZ256rrkz\000" |
| 69127 | /* 307231 */ "VMOVDQA32Z128rrkz\000" |
| 69128 | /* 307249 */ "VMOVDQU32Z128rrkz\000" |
| 69129 | /* 307267 */ "VBROADCASTI32X2Z128rrkz\000" |
| 69130 | /* 307291 */ "VMOVDQA64Z128rrkz\000" |
| 69131 | /* 307309 */ "VMOVDQU64Z128rrkz\000" |
| 69132 | /* 307327 */ "VCVTNE2PS2BF16Z128rrkz\000" |
| 69133 | /* 307350 */ "VCVTNEPS2BF16Z128rrkz\000" |
| 69134 | /* 307372 */ "VSUBBF16Z128rrkz\000" |
| 69135 | /* 307389 */ "VADDBF16Z128rrkz\000" |
| 69136 | /* 307406 */ "VSCALEFBF16Z128rrkz\000" |
| 69137 | /* 307426 */ "VMULBF16Z128rrkz\000" |
| 69138 | /* 307443 */ "VMINBF16Z128rrkz\000" |
| 69139 | /* 307460 */ "VDIVBF16Z128rrkz\000" |
| 69140 | /* 307477 */ "VMAXBF16Z128rrkz\000" |
| 69141 | /* 307494 */ "VMOVDQU16Z128rrkz\000" |
| 69142 | /* 307512 */ "VCVT2PH2BF8Z128rrkz\000" |
| 69143 | /* 307532 */ "VCVTBIASPH2BF8Z128rrkz\000" |
| 69144 | /* 307555 */ "VCVTPH2BF8Z128rrkz\000" |
| 69145 | /* 307574 */ "VCVT2PH2HF8Z128rrkz\000" |
| 69146 | /* 307594 */ "VCVTBIASPH2HF8Z128rrkz\000" |
| 69147 | /* 307617 */ "VCVTPH2HF8Z128rrkz\000" |
| 69148 | /* 307636 */ "VMOVDQU8Z128rrkz\000" |
| 69149 | /* 307653 */ "VPERMI2BZ128rrkz\000" |
| 69150 | /* 307670 */ "VPERMT2BZ128rrkz\000" |
| 69151 | /* 307687 */ "VPSUBBZ128rrkz\000" |
| 69152 | /* 307702 */ "VPADDBZ128rrkz\000" |
| 69153 | /* 307717 */ "VPEXPANDBZ128rrkz\000" |
| 69154 | /* 307735 */ "VPMOVUSDBZ128rrkz\000" |
| 69155 | /* 307753 */ "VPMOVSDBZ128rrkz\000" |
| 69156 | /* 307770 */ "VPMOVDBZ128rrkz\000" |
| 69157 | /* 307786 */ "VPSHUFBZ128rrkz\000" |
| 69158 | /* 307802 */ "VPAVGBZ128rrkz\000" |
| 69159 | /* 307817 */ "VGF2P8MULBZ128rrkz\000" |
| 69160 | /* 307836 */ "VPBLENDMBZ128rrkz\000" |
| 69161 | /* 307854 */ "VPERMBZ128rrkz\000" |
| 69162 | /* 307869 */ "VPMOVUSQBZ128rrkz\000" |
| 69163 | /* 307887 */ "VPMOVSQBZ128rrkz\000" |
| 69164 | /* 307904 */ "VPMULTISHIFTQBZ128rrkz\000" |
| 69165 | /* 307927 */ "VPMOVQBZ128rrkz\000" |
| 69166 | /* 307943 */ "VPABSBZ128rrkz\000" |
| 69167 | /* 307958 */ "VPSUBSBZ128rrkz\000" |
| 69168 | /* 307974 */ "VPADDSBZ128rrkz\000" |
| 69169 | /* 307990 */ "VPMINSBZ128rrkz\000" |
| 69170 | /* 308006 */ "VPCOMPRESSBZ128rrkz\000" |
| 69171 | /* 308026 */ "VPSUBUSBZ128rrkz\000" |
| 69172 | /* 308043 */ "VPADDUSBZ128rrkz\000" |
| 69173 | /* 308060 */ "VPMAXSBZ128rrkz\000" |
| 69174 | /* 308076 */ "VPOPCNTBZ128rrkz\000" |
| 69175 | /* 308093 */ "VPBROADCASTBZ128rrkz\000" |
| 69176 | /* 308114 */ "VPMINUBZ128rrkz\000" |
| 69177 | /* 308130 */ "VPMAXUBZ128rrkz\000" |
| 69178 | /* 308146 */ "VPACKSSWBZ128rrkz\000" |
| 69179 | /* 308164 */ "VPACKUSWBZ128rrkz\000" |
| 69180 | /* 308182 */ "VPMOVUSWBZ128rrkz\000" |
| 69181 | /* 308200 */ "VPMOVSWBZ128rrkz\000" |
| 69182 | /* 308217 */ "VPMOVWBZ128rrkz\000" |
| 69183 | /* 308233 */ "VPERMI2DZ128rrkz\000" |
| 69184 | /* 308250 */ "VPERMT2DZ128rrkz\000" |
| 69185 | /* 308267 */ "VPSRADZ128rrkz\000" |
| 69186 | /* 308282 */ "VPSUBDZ128rrkz\000" |
| 69187 | /* 308297 */ "VPMOVSXBDZ128rrkz\000" |
| 69188 | /* 308315 */ "VPMOVZXBDZ128rrkz\000" |
| 69189 | /* 308333 */ "VPADDDZ128rrkz\000" |
| 69190 | /* 308348 */ "VPANDDZ128rrkz\000" |
| 69191 | /* 308363 */ "VPEXPANDDZ128rrkz\000" |
| 69192 | /* 308381 */ "VPSLLDZ128rrkz\000" |
| 69193 | /* 308396 */ "VPMULLDZ128rrkz\000" |
| 69194 | /* 308412 */ "VPSRLDZ128rrkz\000" |
| 69195 | /* 308427 */ "VPBLENDMDZ128rrkz\000" |
| 69196 | /* 308445 */ "VPANDNDZ128rrkz\000" |
| 69197 | /* 308461 */ "VCVTPH2PDZ128rrkz\000" |
| 69198 | /* 308479 */ "VPERMI2PDZ128rrkz\000" |
| 69199 | /* 308497 */ "VCVTDQ2PDZ128rrkz\000" |
| 69200 | /* 308515 */ "VCVTUDQ2PDZ128rrkz\000" |
| 69201 | /* 308534 */ "VCVTQQ2PDZ128rrkz\000" |
| 69202 | /* 308552 */ "VCVTUQQ2PDZ128rrkz\000" |
| 69203 | /* 308571 */ "VCVTPS2PDZ128rrkz\000" |
| 69204 | /* 308589 */ "VPERMT2PDZ128rrkz\000" |
| 69205 | /* 308607 */ "VMOVAPDZ128rrkz\000" |
| 69206 | /* 308623 */ "VSUBPDZ128rrkz\000" |
| 69207 | /* 308638 */ "VMINCPDZ128rrkz\000" |
| 69208 | /* 308654 */ "VMAXCPDZ128rrkz\000" |
| 69209 | /* 308670 */ "VADDPDZ128rrkz\000" |
| 69210 | /* 308685 */ "VEXPANDPDZ128rrkz\000" |
| 69211 | /* 308703 */ "VANDPDZ128rrkz\000" |
| 69212 | /* 308718 */ "VSCALEFPDZ128rrkz\000" |
| 69213 | /* 308736 */ "VUNPCKHPDZ128rrkz\000" |
| 69214 | /* 308754 */ "VPERMILPDZ128rrkz\000" |
| 69215 | /* 308772 */ "VUNPCKLPDZ128rrkz\000" |
| 69216 | /* 308790 */ "VMULPDZ128rrkz\000" |
| 69217 | /* 308805 */ "VBLENDMPDZ128rrkz\000" |
| 69218 | /* 308823 */ "VANDNPDZ128rrkz\000" |
| 69219 | /* 308839 */ "VMINPDZ128rrkz\000" |
| 69220 | /* 308854 */ "VORPDZ128rrkz\000" |
| 69221 | /* 308868 */ "VXORPDZ128rrkz\000" |
| 69222 | /* 308883 */ "VCOMPRESSPDZ128rrkz\000" |
| 69223 | /* 308903 */ "VMOVUPDZ128rrkz\000" |
| 69224 | /* 308919 */ "VDIVPDZ128rrkz\000" |
| 69225 | /* 308934 */ "VMAXPDZ128rrkz\000" |
| 69226 | /* 308949 */ "VPMOVUSQDZ128rrkz\000" |
| 69227 | /* 308967 */ "VPMOVSQDZ128rrkz\000" |
| 69228 | /* 308984 */ "VPMOVQDZ128rrkz\000" |
| 69229 | /* 309000 */ "VPORDZ128rrkz\000" |
| 69230 | /* 309014 */ "VPXORDZ128rrkz\000" |
| 69231 | /* 309029 */ "VPABSDZ128rrkz\000" |
| 69232 | /* 309044 */ "VPMINSDZ128rrkz\000" |
| 69233 | /* 309060 */ "VPCOMPRESSDZ128rrkz\000" |
| 69234 | /* 309080 */ "VPMAXSDZ128rrkz\000" |
| 69235 | /* 309096 */ "VPCONFLICTDZ128rrkz\000" |
| 69236 | /* 309116 */ "VPOPCNTDZ128rrkz\000" |
| 69237 | /* 309133 */ "VPLZCNTDZ128rrkz\000" |
| 69238 | /* 309150 */ "VPBROADCASTDZ128rrkz\000" |
| 69239 | /* 309171 */ "VPMINUDZ128rrkz\000" |
| 69240 | /* 309187 */ "VPMAXUDZ128rrkz\000" |
| 69241 | /* 309203 */ "VPSRAVDZ128rrkz\000" |
| 69242 | /* 309219 */ "VPSLLVDZ128rrkz\000" |
| 69243 | /* 309235 */ "VPROLVDZ128rrkz\000" |
| 69244 | /* 309251 */ "VPSRLVDZ128rrkz\000" |
| 69245 | /* 309267 */ "VPRORVDZ128rrkz\000" |
| 69246 | /* 309283 */ "VPMADDWDZ128rrkz\000" |
| 69247 | /* 309300 */ "VPUNPCKHWDZ128rrkz\000" |
| 69248 | /* 309319 */ "VPUNPCKLWDZ128rrkz\000" |
| 69249 | /* 309338 */ "VPMOVSXWDZ128rrkz\000" |
| 69250 | /* 309356 */ "VPMOVZXWDZ128rrkz\000" |
| 69251 | /* 309374 */ "VCVTHF82PHZ128rrkz\000" |
| 69252 | /* 309393 */ "VCVTPD2PHZ128rrkz\000" |
| 69253 | /* 309411 */ "VCVTDQ2PHZ128rrkz\000" |
| 69254 | /* 309429 */ "VCVTUDQ2PHZ128rrkz\000" |
| 69255 | /* 309448 */ "VCVTQQ2PHZ128rrkz\000" |
| 69256 | /* 309466 */ "VCVTUQQ2PHZ128rrkz\000" |
| 69257 | /* 309485 */ "VCVTPS2PHZ128rrkz\000" |
| 69258 | /* 309503 */ "VCVTW2PHZ128rrkz\000" |
| 69259 | /* 309520 */ "VCVTUW2PHZ128rrkz\000" |
| 69260 | /* 309538 */ "VSUBPHZ128rrkz\000" |
| 69261 | /* 309553 */ "VFCMULCPHZ128rrkz\000" |
| 69262 | /* 309571 */ "VFMULCPHZ128rrkz\000" |
| 69263 | /* 309588 */ "VMINCPHZ128rrkz\000" |
| 69264 | /* 309604 */ "VMAXCPHZ128rrkz\000" |
| 69265 | /* 309620 */ "VADDPHZ128rrkz\000" |
| 69266 | /* 309635 */ "VSCALEFPHZ128rrkz\000" |
| 69267 | /* 309653 */ "VMULPHZ128rrkz\000" |
| 69268 | /* 309668 */ "VMINPHZ128rrkz\000" |
| 69269 | /* 309683 */ "VDIVPHZ128rrkz\000" |
| 69270 | /* 309698 */ "VMAXPHZ128rrkz\000" |
| 69271 | /* 309713 */ "VMOVDDUPZ128rrkz\000" |
| 69272 | /* 309730 */ "VMOVSHDUPZ128rrkz\000" |
| 69273 | /* 309748 */ "VMOVSLDUPZ128rrkz\000" |
| 69274 | /* 309766 */ "VPERMI2QZ128rrkz\000" |
| 69275 | /* 309783 */ "VPERMT2QZ128rrkz\000" |
| 69276 | /* 309800 */ "VPSRAQZ128rrkz\000" |
| 69277 | /* 309815 */ "VPSUBQZ128rrkz\000" |
| 69278 | /* 309830 */ "VPMOVSXBQZ128rrkz\000" |
| 69279 | /* 309848 */ "VPMOVZXBQZ128rrkz\000" |
| 69280 | /* 309866 */ "VCVTTPD2DQZ128rrkz\000" |
| 69281 | /* 309885 */ "VCVTPD2DQZ128rrkz\000" |
| 69282 | /* 309903 */ "VCVTTPH2DQZ128rrkz\000" |
| 69283 | /* 309922 */ "VCVTPH2DQZ128rrkz\000" |
| 69284 | /* 309940 */ "VCVTTPS2DQZ128rrkz\000" |
| 69285 | /* 309959 */ "VCVTPS2DQZ128rrkz\000" |
| 69286 | /* 309977 */ "VPADDQZ128rrkz\000" |
| 69287 | /* 309992 */ "VPUNPCKHDQZ128rrkz\000" |
| 69288 | /* 310011 */ "VPUNPCKLDQZ128rrkz\000" |
| 69289 | /* 310030 */ "VPMULDQZ128rrkz\000" |
| 69290 | /* 310046 */ "VPANDQZ128rrkz\000" |
| 69291 | /* 310061 */ "VPEXPANDQZ128rrkz\000" |
| 69292 | /* 310079 */ "VPUNPCKHQDQZ128rrkz\000" |
| 69293 | /* 310099 */ "VPUNPCKLQDQZ128rrkz\000" |
| 69294 | /* 310119 */ "VCVTTPD2UDQZ128rrkz\000" |
| 69295 | /* 310139 */ "VCVTPD2UDQZ128rrkz\000" |
| 69296 | /* 310158 */ "VCVTTPH2UDQZ128rrkz\000" |
| 69297 | /* 310178 */ "VCVTPH2UDQZ128rrkz\000" |
| 69298 | /* 310197 */ "VCVTTPS2UDQZ128rrkz\000" |
| 69299 | /* 310217 */ "VCVTPS2UDQZ128rrkz\000" |
| 69300 | /* 310236 */ "VPMULUDQZ128rrkz\000" |
| 69301 | /* 310253 */ "VPMOVSXDQZ128rrkz\000" |
| 69302 | /* 310271 */ "VPMOVZXDQZ128rrkz\000" |
| 69303 | /* 310289 */ "VPSLLQZ128rrkz\000" |
| 69304 | /* 310304 */ "VPMULLQZ128rrkz\000" |
| 69305 | /* 310320 */ "VPSRLQZ128rrkz\000" |
| 69306 | /* 310335 */ "VPBLENDMQZ128rrkz\000" |
| 69307 | /* 310353 */ "VPANDNQZ128rrkz\000" |
| 69308 | /* 310369 */ "VCVTTPD2QQZ128rrkz\000" |
| 69309 | /* 310388 */ "VCVTPD2QQZ128rrkz\000" |
| 69310 | /* 310406 */ "VCVTTPH2QQZ128rrkz\000" |
| 69311 | /* 310425 */ "VCVTPH2QQZ128rrkz\000" |
| 69312 | /* 310443 */ "VCVTTPS2QQZ128rrkz\000" |
| 69313 | /* 310462 */ "VCVTPS2QQZ128rrkz\000" |
| 69314 | /* 310480 */ "VCVTTPD2UQQZ128rrkz\000" |
| 69315 | /* 310500 */ "VCVTPD2UQQZ128rrkz\000" |
| 69316 | /* 310519 */ "VCVTTPH2UQQZ128rrkz\000" |
| 69317 | /* 310539 */ "VCVTPH2UQQZ128rrkz\000" |
| 69318 | /* 310558 */ "VCVTTPS2UQQZ128rrkz\000" |
| 69319 | /* 310578 */ "VCVTPS2UQQZ128rrkz\000" |
| 69320 | /* 310597 */ "VPORQZ128rrkz\000" |
| 69321 | /* 310611 */ "VPXORQZ128rrkz\000" |
| 69322 | /* 310626 */ "VPABSQZ128rrkz\000" |
| 69323 | /* 310641 */ "VPMINSQZ128rrkz\000" |
| 69324 | /* 310657 */ "VPCOMPRESSQZ128rrkz\000" |
| 69325 | /* 310677 */ "VPMAXSQZ128rrkz\000" |
| 69326 | /* 310693 */ "VPCONFLICTQZ128rrkz\000" |
| 69327 | /* 310713 */ "VPOPCNTQZ128rrkz\000" |
| 69328 | /* 310730 */ "VPLZCNTQZ128rrkz\000" |
| 69329 | /* 310747 */ "VPBROADCASTQZ128rrkz\000" |
| 69330 | /* 310768 */ "VPMINUQZ128rrkz\000" |
| 69331 | /* 310784 */ "VPMAXUQZ128rrkz\000" |
| 69332 | /* 310800 */ "VPSRAVQZ128rrkz\000" |
| 69333 | /* 310816 */ "VPSLLVQZ128rrkz\000" |
| 69334 | /* 310832 */ "VPROLVQZ128rrkz\000" |
| 69335 | /* 310848 */ "VPSRLVQZ128rrkz\000" |
| 69336 | /* 310864 */ "VPRORVQZ128rrkz\000" |
| 69337 | /* 310880 */ "VPMOVSXWQZ128rrkz\000" |
| 69338 | /* 310898 */ "VPMOVZXWQZ128rrkz\000" |
| 69339 | /* 310916 */ "VCVT2PH2BF8SZ128rrkz\000" |
| 69340 | /* 310937 */ "VCVTBIASPH2BF8SZ128rrkz\000" |
| 69341 | /* 310961 */ "VCVTPH2BF8SZ128rrkz\000" |
| 69342 | /* 310981 */ "VCVT2PH2HF8SZ128rrkz\000" |
| 69343 | /* 311002 */ "VCVTBIASPH2HF8SZ128rrkz\000" |
| 69344 | /* 311026 */ "VCVTPH2HF8SZ128rrkz\000" |
| 69345 | /* 311046 */ "VCVTTBF162IBSZ128rrkz\000" |
| 69346 | /* 311068 */ "VCVTBF162IBSZ128rrkz\000" |
| 69347 | /* 311089 */ "VCVTTPH2IBSZ128rrkz\000" |
| 69348 | /* 311109 */ "VCVTPH2IBSZ128rrkz\000" |
| 69349 | /* 311128 */ "VCVTTPS2IBSZ128rrkz\000" |
| 69350 | /* 311148 */ "VCVTPS2IBSZ128rrkz\000" |
| 69351 | /* 311167 */ "VCVTTBF162IUBSZ128rrkz\000" |
| 69352 | /* 311190 */ "VCVTBF162IUBSZ128rrkz\000" |
| 69353 | /* 311212 */ "VCVTTPH2IUBSZ128rrkz\000" |
| 69354 | /* 311233 */ "VCVTPH2IUBSZ128rrkz\000" |
| 69355 | /* 311253 */ "VCVTTPS2IUBSZ128rrkz\000" |
| 69356 | /* 311274 */ "VCVTPS2IUBSZ128rrkz\000" |
| 69357 | /* 311294 */ "VCVTPD2PSZ128rrkz\000" |
| 69358 | /* 311312 */ "VCVTPH2PSZ128rrkz\000" |
| 69359 | /* 311330 */ "VPERMI2PSZ128rrkz\000" |
| 69360 | /* 311348 */ "VCVTDQ2PSZ128rrkz\000" |
| 69361 | /* 311366 */ "VCVTUDQ2PSZ128rrkz\000" |
| 69362 | /* 311385 */ "VCVTQQ2PSZ128rrkz\000" |
| 69363 | /* 311403 */ "VCVTUQQ2PSZ128rrkz\000" |
| 69364 | /* 311422 */ "VPERMT2PSZ128rrkz\000" |
| 69365 | /* 311440 */ "VMOVAPSZ128rrkz\000" |
| 69366 | /* 311456 */ "VSUBPSZ128rrkz\000" |
| 69367 | /* 311471 */ "VMINCPSZ128rrkz\000" |
| 69368 | /* 311487 */ "VMAXCPSZ128rrkz\000" |
| 69369 | /* 311503 */ "VADDPSZ128rrkz\000" |
| 69370 | /* 311518 */ "VEXPANDPSZ128rrkz\000" |
| 69371 | /* 311536 */ "VANDPSZ128rrkz\000" |
| 69372 | /* 311551 */ "VSCALEFPSZ128rrkz\000" |
| 69373 | /* 311569 */ "VUNPCKHPSZ128rrkz\000" |
| 69374 | /* 311587 */ "VPERMILPSZ128rrkz\000" |
| 69375 | /* 311605 */ "VUNPCKLPSZ128rrkz\000" |
| 69376 | /* 311623 */ "VMULPSZ128rrkz\000" |
| 69377 | /* 311638 */ "VBLENDMPSZ128rrkz\000" |
| 69378 | /* 311656 */ "VANDNPSZ128rrkz\000" |
| 69379 | /* 311672 */ "VMINPSZ128rrkz\000" |
| 69380 | /* 311687 */ "VORPSZ128rrkz\000" |
| 69381 | /* 311701 */ "VXORPSZ128rrkz\000" |
| 69382 | /* 311716 */ "VCOMPRESSPSZ128rrkz\000" |
| 69383 | /* 311736 */ "VMOVUPSZ128rrkz\000" |
| 69384 | /* 311752 */ "VDIVPSZ128rrkz\000" |
| 69385 | /* 311767 */ "VMAXPSZ128rrkz\000" |
| 69386 | /* 311782 */ "VCVTTPD2DQSZ128rrkz\000" |
| 69387 | /* 311802 */ "VCVTTPS2DQSZ128rrkz\000" |
| 69388 | /* 311822 */ "VCVTTPD2UDQSZ128rrkz\000" |
| 69389 | /* 311843 */ "VCVTTPS2UDQSZ128rrkz\000" |
| 69390 | /* 311864 */ "VCVTTPD2QQSZ128rrkz\000" |
| 69391 | /* 311884 */ "VCVTTPS2QQSZ128rrkz\000" |
| 69392 | /* 311904 */ "VCVTTPD2UQQSZ128rrkz\000" |
| 69393 | /* 311925 */ "VCVTTPS2UQQSZ128rrkz\000" |
| 69394 | /* 311946 */ "VBROADCASTSSZ128rrkz\000" |
| 69395 | /* 311967 */ "VCVTTPH2WZ128rrkz\000" |
| 69396 | /* 311985 */ "VCVTPH2WZ128rrkz\000" |
| 69397 | /* 312002 */ "VPERMI2WZ128rrkz\000" |
| 69398 | /* 312019 */ "VPERMT2WZ128rrkz\000" |
| 69399 | /* 312036 */ "VPSRAWZ128rrkz\000" |
| 69400 | /* 312051 */ "VPUNPCKHBWZ128rrkz\000" |
| 69401 | /* 312070 */ "VPUNPCKLBWZ128rrkz\000" |
| 69402 | /* 312089 */ "VPSUBWZ128rrkz\000" |
| 69403 | /* 312104 */ "VPMOVSXBWZ128rrkz\000" |
| 69404 | /* 312122 */ "VPMOVZXBWZ128rrkz\000" |
| 69405 | /* 312140 */ "VPADDWZ128rrkz\000" |
| 69406 | /* 312155 */ "VPEXPANDWZ128rrkz\000" |
| 69407 | /* 312173 */ "VPACKSSDWZ128rrkz\000" |
| 69408 | /* 312191 */ "VPACKUSDWZ128rrkz\000" |
| 69409 | /* 312209 */ "VPMOVUSDWZ128rrkz\000" |
| 69410 | /* 312227 */ "VPMOVSDWZ128rrkz\000" |
| 69411 | /* 312244 */ "VPMOVDWZ128rrkz\000" |
| 69412 | /* 312260 */ "VPAVGWZ128rrkz\000" |
| 69413 | /* 312275 */ "VPMULHWZ128rrkz\000" |
| 69414 | /* 312291 */ "VPSLLWZ128rrkz\000" |
| 69415 | /* 312306 */ "VPMULLWZ128rrkz\000" |
| 69416 | /* 312322 */ "VPSRLWZ128rrkz\000" |
| 69417 | /* 312337 */ "VPBLENDMWZ128rrkz\000" |
| 69418 | /* 312355 */ "VPERMWZ128rrkz\000" |
| 69419 | /* 312370 */ "VPMOVUSQWZ128rrkz\000" |
| 69420 | /* 312388 */ "VPMOVSQWZ128rrkz\000" |
| 69421 | /* 312405 */ "VPMOVQWZ128rrkz\000" |
| 69422 | /* 312421 */ "VPABSWZ128rrkz\000" |
| 69423 | /* 312436 */ "VPMADDUBSWZ128rrkz\000" |
| 69424 | /* 312455 */ "VPSUBSWZ128rrkz\000" |
| 69425 | /* 312471 */ "VPADDSWZ128rrkz\000" |
| 69426 | /* 312487 */ "VPMINSWZ128rrkz\000" |
| 69427 | /* 312503 */ "VPMULHRSWZ128rrkz\000" |
| 69428 | /* 312521 */ "VPCOMPRESSWZ128rrkz\000" |
| 69429 | /* 312541 */ "VPSUBUSWZ128rrkz\000" |
| 69430 | /* 312558 */ "VPADDUSWZ128rrkz\000" |
| 69431 | /* 312575 */ "VPMAXSWZ128rrkz\000" |
| 69432 | /* 312591 */ "VPOPCNTWZ128rrkz\000" |
| 69433 | /* 312608 */ "VPBROADCASTWZ128rrkz\000" |
| 69434 | /* 312629 */ "VCVTTPH2UWZ128rrkz\000" |
| 69435 | /* 312648 */ "VCVTPH2UWZ128rrkz\000" |
| 69436 | /* 312666 */ "VPMULHUWZ128rrkz\000" |
| 69437 | /* 312683 */ "VPMINUWZ128rrkz\000" |
| 69438 | /* 312699 */ "VPMAXUWZ128rrkz\000" |
| 69439 | /* 312715 */ "VPSRAVWZ128rrkz\000" |
| 69440 | /* 312731 */ "VPSLLVWZ128rrkz\000" |
| 69441 | /* 312747 */ "VPSRLVWZ128rrkz\000" |
| 69442 | /* 312763 */ "VCVT2PS2PHXZ128rrkz\000" |
| 69443 | /* 312783 */ "VCVTPS2PHXZ128rrkz\000" |
| 69444 | /* 312802 */ "VCVTPH2PSXZ128rrkz\000" |
| 69445 | /* 312821 */ "VPBROADCASTBrZ128rrkz\000" |
| 69446 | /* 312843 */ "VPBROADCASTDrZ128rrkz\000" |
| 69447 | /* 312865 */ "VPBROADCASTQrZ128rrkz\000" |
| 69448 | /* 312887 */ "VPBROADCASTWrZ128rrkz\000" |
| 69449 | /* 312909 */ "VMOVDQA32Zrrkz\000" |
| 69450 | /* 312924 */ "VMOVDQU32Zrrkz\000" |
| 69451 | /* 312939 */ "VBROADCASTF32X2Zrrkz\000" |
| 69452 | /* 312960 */ "VBROADCASTI32X2Zrrkz\000" |
| 69453 | /* 312981 */ "VMOVDQA64Zrrkz\000" |
| 69454 | /* 312996 */ "VMOVDQU64Zrrkz\000" |
| 69455 | /* 313011 */ "VCVTNE2PS2BF16Zrrkz\000" |
| 69456 | /* 313031 */ "VCVTNEPS2BF16Zrrkz\000" |
| 69457 | /* 313050 */ "VSUBBF16Zrrkz\000" |
| 69458 | /* 313064 */ "VADDBF16Zrrkz\000" |
| 69459 | /* 313078 */ "VSCALEFBF16Zrrkz\000" |
| 69460 | /* 313095 */ "VMULBF16Zrrkz\000" |
| 69461 | /* 313109 */ "VMINBF16Zrrkz\000" |
| 69462 | /* 313123 */ "VDIVBF16Zrrkz\000" |
| 69463 | /* 313137 */ "VMAXBF16Zrrkz\000" |
| 69464 | /* 313151 */ "VMOVDQU16Zrrkz\000" |
| 69465 | /* 313166 */ "VCVT2PH2BF8Zrrkz\000" |
| 69466 | /* 313183 */ "VCVTBIASPH2BF8Zrrkz\000" |
| 69467 | /* 313203 */ "VCVTPH2BF8Zrrkz\000" |
| 69468 | /* 313219 */ "VCVT2PH2HF8Zrrkz\000" |
| 69469 | /* 313236 */ "VCVTBIASPH2HF8Zrrkz\000" |
| 69470 | /* 313256 */ "VCVTPH2HF8Zrrkz\000" |
| 69471 | /* 313272 */ "VMOVDQU8Zrrkz\000" |
| 69472 | /* 313286 */ "VPERMI2BZrrkz\000" |
| 69473 | /* 313300 */ "VPERMT2BZrrkz\000" |
| 69474 | /* 313314 */ "VPSUBBZrrkz\000" |
| 69475 | /* 313326 */ "VPADDBZrrkz\000" |
| 69476 | /* 313338 */ "VPEXPANDBZrrkz\000" |
| 69477 | /* 313353 */ "VPMOVUSDBZrrkz\000" |
| 69478 | /* 313368 */ "VPMOVSDBZrrkz\000" |
| 69479 | /* 313382 */ "VPMOVDBZrrkz\000" |
| 69480 | /* 313395 */ "VPSHUFBZrrkz\000" |
| 69481 | /* 313408 */ "VPAVGBZrrkz\000" |
| 69482 | /* 313420 */ "VGF2P8MULBZrrkz\000" |
| 69483 | /* 313436 */ "VPBLENDMBZrrkz\000" |
| 69484 | /* 313451 */ "VPERMBZrrkz\000" |
| 69485 | /* 313463 */ "VPMOVUSQBZrrkz\000" |
| 69486 | /* 313478 */ "VPMOVSQBZrrkz\000" |
| 69487 | /* 313492 */ "VPMULTISHIFTQBZrrkz\000" |
| 69488 | /* 313512 */ "VPMOVQBZrrkz\000" |
| 69489 | /* 313525 */ "VPABSBZrrkz\000" |
| 69490 | /* 313537 */ "VPSUBSBZrrkz\000" |
| 69491 | /* 313550 */ "VPADDSBZrrkz\000" |
| 69492 | /* 313563 */ "VPMINSBZrrkz\000" |
| 69493 | /* 313576 */ "VPCOMPRESSBZrrkz\000" |
| 69494 | /* 313593 */ "VPSUBUSBZrrkz\000" |
| 69495 | /* 313607 */ "VPADDUSBZrrkz\000" |
| 69496 | /* 313621 */ "VPMAXSBZrrkz\000" |
| 69497 | /* 313634 */ "VPOPCNTBZrrkz\000" |
| 69498 | /* 313648 */ "VPBROADCASTBZrrkz\000" |
| 69499 | /* 313666 */ "VPMINUBZrrkz\000" |
| 69500 | /* 313679 */ "VPMAXUBZrrkz\000" |
| 69501 | /* 313692 */ "VPACKSSWBZrrkz\000" |
| 69502 | /* 313707 */ "VPACKUSWBZrrkz\000" |
| 69503 | /* 313722 */ "VPMOVUSWBZrrkz\000" |
| 69504 | /* 313737 */ "VPMOVSWBZrrkz\000" |
| 69505 | /* 313751 */ "VPMOVWBZrrkz\000" |
| 69506 | /* 313764 */ "VPERMI2DZrrkz\000" |
| 69507 | /* 313778 */ "VPERMT2DZrrkz\000" |
| 69508 | /* 313792 */ "VPSRADZrrkz\000" |
| 69509 | /* 313804 */ "VPSUBDZrrkz\000" |
| 69510 | /* 313816 */ "VPMOVSXBDZrrkz\000" |
| 69511 | /* 313831 */ "VPMOVZXBDZrrkz\000" |
| 69512 | /* 313846 */ "VPADDDZrrkz\000" |
| 69513 | /* 313858 */ "VPANDDZrrkz\000" |
| 69514 | /* 313870 */ "VPEXPANDDZrrkz\000" |
| 69515 | /* 313885 */ "VPSLLDZrrkz\000" |
| 69516 | /* 313897 */ "VPMULLDZrrkz\000" |
| 69517 | /* 313910 */ "VPSRLDZrrkz\000" |
| 69518 | /* 313922 */ "VPBLENDMDZrrkz\000" |
| 69519 | /* 313937 */ "VPERMDZrrkz\000" |
| 69520 | /* 313949 */ "VPANDNDZrrkz\000" |
| 69521 | /* 313962 */ "VCVTPH2PDZrrkz\000" |
| 69522 | /* 313977 */ "VPERMI2PDZrrkz\000" |
| 69523 | /* 313992 */ "VCVTDQ2PDZrrkz\000" |
| 69524 | /* 314007 */ "VCVTUDQ2PDZrrkz\000" |
| 69525 | /* 314023 */ "VCVTQQ2PDZrrkz\000" |
| 69526 | /* 314038 */ "VCVTUQQ2PDZrrkz\000" |
| 69527 | /* 314054 */ "VCVTPS2PDZrrkz\000" |
| 69528 | /* 314069 */ "VPERMT2PDZrrkz\000" |
| 69529 | /* 314084 */ "VMOVAPDZrrkz\000" |
| 69530 | /* 314097 */ "VSUBPDZrrkz\000" |
| 69531 | /* 314109 */ "VMINCPDZrrkz\000" |
| 69532 | /* 314122 */ "VMAXCPDZrrkz\000" |
| 69533 | /* 314135 */ "VADDPDZrrkz\000" |
| 69534 | /* 314147 */ "VEXPANDPDZrrkz\000" |
| 69535 | /* 314162 */ "VANDPDZrrkz\000" |
| 69536 | /* 314174 */ "VSCALEFPDZrrkz\000" |
| 69537 | /* 314189 */ "VUNPCKHPDZrrkz\000" |
| 69538 | /* 314204 */ "VPERMILPDZrrkz\000" |
| 69539 | /* 314219 */ "VUNPCKLPDZrrkz\000" |
| 69540 | /* 314234 */ "VMULPDZrrkz\000" |
| 69541 | /* 314246 */ "VBLENDMPDZrrkz\000" |
| 69542 | /* 314261 */ "VPERMPDZrrkz\000" |
| 69543 | /* 314274 */ "VANDNPDZrrkz\000" |
| 69544 | /* 314287 */ "VMINPDZrrkz\000" |
| 69545 | /* 314299 */ "VORPDZrrkz\000" |
| 69546 | /* 314310 */ "VXORPDZrrkz\000" |
| 69547 | /* 314322 */ "VCOMPRESSPDZrrkz\000" |
| 69548 | /* 314339 */ "VMOVUPDZrrkz\000" |
| 69549 | /* 314352 */ "VDIVPDZrrkz\000" |
| 69550 | /* 314364 */ "VMAXPDZrrkz\000" |
| 69551 | /* 314376 */ "VPMOVUSQDZrrkz\000" |
| 69552 | /* 314391 */ "VPMOVSQDZrrkz\000" |
| 69553 | /* 314405 */ "VPMOVQDZrrkz\000" |
| 69554 | /* 314418 */ "VPORDZrrkz\000" |
| 69555 | /* 314429 */ "VPXORDZrrkz\000" |
| 69556 | /* 314441 */ "VRCP14SDZrrkz\000" |
| 69557 | /* 314455 */ "VRSQRT14SDZrrkz\000" |
| 69558 | /* 314471 */ "VPABSDZrrkz\000" |
| 69559 | /* 314483 */ "VSCALEFSDZrrkz\000" |
| 69560 | /* 314498 */ "VPMINSDZrrkz\000" |
| 69561 | /* 314511 */ "VPCOMPRESSDZrrkz\000" |
| 69562 | /* 314528 */ "VBROADCASTSDZrrkz\000" |
| 69563 | /* 314546 */ "VMOVSDZrrkz\000" |
| 69564 | /* 314558 */ "VPMAXSDZrrkz\000" |
| 69565 | /* 314571 */ "VPCONFLICTDZrrkz\000" |
| 69566 | /* 314588 */ "VPOPCNTDZrrkz\000" |
| 69567 | /* 314602 */ "VPLZCNTDZrrkz\000" |
| 69568 | /* 314616 */ "VPBROADCASTDZrrkz\000" |
| 69569 | /* 314634 */ "VPMINUDZrrkz\000" |
| 69570 | /* 314647 */ "VPMAXUDZrrkz\000" |
| 69571 | /* 314660 */ "VPSRAVDZrrkz\000" |
| 69572 | /* 314673 */ "VPSLLVDZrrkz\000" |
| 69573 | /* 314686 */ "VPROLVDZrrkz\000" |
| 69574 | /* 314699 */ "VPSRLVDZrrkz\000" |
| 69575 | /* 314712 */ "VPRORVDZrrkz\000" |
| 69576 | /* 314725 */ "VPMADDWDZrrkz\000" |
| 69577 | /* 314739 */ "VPUNPCKHWDZrrkz\000" |
| 69578 | /* 314755 */ "VPUNPCKLWDZrrkz\000" |
| 69579 | /* 314771 */ "VPMOVSXWDZrrkz\000" |
| 69580 | /* 314786 */ "VPMOVZXWDZrrkz\000" |
| 69581 | /* 314801 */ "VCVTHF82PHZrrkz\000" |
| 69582 | /* 314817 */ "VCVTPD2PHZrrkz\000" |
| 69583 | /* 314832 */ "VCVTDQ2PHZrrkz\000" |
| 69584 | /* 314847 */ "VCVTUDQ2PHZrrkz\000" |
| 69585 | /* 314863 */ "VCVTQQ2PHZrrkz\000" |
| 69586 | /* 314878 */ "VCVTUQQ2PHZrrkz\000" |
| 69587 | /* 314894 */ "VCVTPS2PHZrrkz\000" |
| 69588 | /* 314909 */ "VCVTW2PHZrrkz\000" |
| 69589 | /* 314923 */ "VCVTUW2PHZrrkz\000" |
| 69590 | /* 314938 */ "VSUBPHZrrkz\000" |
| 69591 | /* 314950 */ "VFCMULCPHZrrkz\000" |
| 69592 | /* 314965 */ "VFMULCPHZrrkz\000" |
| 69593 | /* 314979 */ "VMINCPHZrrkz\000" |
| 69594 | /* 314992 */ "VMAXCPHZrrkz\000" |
| 69595 | /* 315005 */ "VADDPHZrrkz\000" |
| 69596 | /* 315017 */ "VSCALEFPHZrrkz\000" |
| 69597 | /* 315032 */ "VMULPHZrrkz\000" |
| 69598 | /* 315044 */ "VMINPHZrrkz\000" |
| 69599 | /* 315056 */ "VDIVPHZrrkz\000" |
| 69600 | /* 315068 */ "VMAXPHZrrkz\000" |
| 69601 | /* 315080 */ "VFCMULCSHZrrkz\000" |
| 69602 | /* 315095 */ "VFMULCSHZrrkz\000" |
| 69603 | /* 315109 */ "VSCALEFSHZrrkz\000" |
| 69604 | /* 315124 */ "VRCPSHZrrkz\000" |
| 69605 | /* 315136 */ "VRSQRTSHZrrkz\000" |
| 69606 | /* 315150 */ "VMOVSHZrrkz\000" |
| 69607 | /* 315162 */ "VMOVDDUPZrrkz\000" |
| 69608 | /* 315176 */ "VMOVSHDUPZrrkz\000" |
| 69609 | /* 315191 */ "VMOVSLDUPZrrkz\000" |
| 69610 | /* 315206 */ "VPERMI2QZrrkz\000" |
| 69611 | /* 315220 */ "VPERMT2QZrrkz\000" |
| 69612 | /* 315234 */ "VPSRAQZrrkz\000" |
| 69613 | /* 315246 */ "VPSUBQZrrkz\000" |
| 69614 | /* 315258 */ "VPMOVSXBQZrrkz\000" |
| 69615 | /* 315273 */ "VPMOVZXBQZrrkz\000" |
| 69616 | /* 315288 */ "VCVTTPD2DQZrrkz\000" |
| 69617 | /* 315304 */ "VCVTPD2DQZrrkz\000" |
| 69618 | /* 315319 */ "VCVTTPH2DQZrrkz\000" |
| 69619 | /* 315335 */ "VCVTPH2DQZrrkz\000" |
| 69620 | /* 315350 */ "VCVTTPS2DQZrrkz\000" |
| 69621 | /* 315366 */ "VCVTPS2DQZrrkz\000" |
| 69622 | /* 315381 */ "VPADDQZrrkz\000" |
| 69623 | /* 315393 */ "VPUNPCKHDQZrrkz\000" |
| 69624 | /* 315409 */ "VPUNPCKLDQZrrkz\000" |
| 69625 | /* 315425 */ "VPMULDQZrrkz\000" |
| 69626 | /* 315438 */ "VPANDQZrrkz\000" |
| 69627 | /* 315450 */ "VPEXPANDQZrrkz\000" |
| 69628 | /* 315465 */ "VPUNPCKHQDQZrrkz\000" |
| 69629 | /* 315482 */ "VPUNPCKLQDQZrrkz\000" |
| 69630 | /* 315499 */ "VCVTTPD2UDQZrrkz\000" |
| 69631 | /* 315516 */ "VCVTPD2UDQZrrkz\000" |
| 69632 | /* 315532 */ "VCVTTPH2UDQZrrkz\000" |
| 69633 | /* 315549 */ "VCVTPH2UDQZrrkz\000" |
| 69634 | /* 315565 */ "VCVTTPS2UDQZrrkz\000" |
| 69635 | /* 315582 */ "VCVTPS2UDQZrrkz\000" |
| 69636 | /* 315598 */ "VPMULUDQZrrkz\000" |
| 69637 | /* 315612 */ "VPMOVSXDQZrrkz\000" |
| 69638 | /* 315627 */ "VPMOVZXDQZrrkz\000" |
| 69639 | /* 315642 */ "VPSLLQZrrkz\000" |
| 69640 | /* 315654 */ "VPMULLQZrrkz\000" |
| 69641 | /* 315667 */ "VPSRLQZrrkz\000" |
| 69642 | /* 315679 */ "VPBLENDMQZrrkz\000" |
| 69643 | /* 315694 */ "VPERMQZrrkz\000" |
| 69644 | /* 315706 */ "VPANDNQZrrkz\000" |
| 69645 | /* 315719 */ "VCVTTPD2QQZrrkz\000" |
| 69646 | /* 315735 */ "VCVTPD2QQZrrkz\000" |
| 69647 | /* 315750 */ "VCVTTPH2QQZrrkz\000" |
| 69648 | /* 315766 */ "VCVTPH2QQZrrkz\000" |
| 69649 | /* 315781 */ "VCVTTPS2QQZrrkz\000" |
| 69650 | /* 315797 */ "VCVTPS2QQZrrkz\000" |
| 69651 | /* 315812 */ "VCVTTPD2UQQZrrkz\000" |
| 69652 | /* 315829 */ "VCVTPD2UQQZrrkz\000" |
| 69653 | /* 315845 */ "VCVTTPH2UQQZrrkz\000" |
| 69654 | /* 315862 */ "VCVTPH2UQQZrrkz\000" |
| 69655 | /* 315878 */ "VCVTTPS2UQQZrrkz\000" |
| 69656 | /* 315895 */ "VCVTPS2UQQZrrkz\000" |
| 69657 | /* 315911 */ "VPORQZrrkz\000" |
| 69658 | /* 315922 */ "VPXORQZrrkz\000" |
| 69659 | /* 315934 */ "VPABSQZrrkz\000" |
| 69660 | /* 315946 */ "VPMINSQZrrkz\000" |
| 69661 | /* 315959 */ "VPCOMPRESSQZrrkz\000" |
| 69662 | /* 315976 */ "VPMAXSQZrrkz\000" |
| 69663 | /* 315989 */ "VPCONFLICTQZrrkz\000" |
| 69664 | /* 316006 */ "VPOPCNTQZrrkz\000" |
| 69665 | /* 316020 */ "VPLZCNTQZrrkz\000" |
| 69666 | /* 316034 */ "VPBROADCASTQZrrkz\000" |
| 69667 | /* 316052 */ "VPMINUQZrrkz\000" |
| 69668 | /* 316065 */ "VPMAXUQZrrkz\000" |
| 69669 | /* 316078 */ "VPSRAVQZrrkz\000" |
| 69670 | /* 316091 */ "VPSLLVQZrrkz\000" |
| 69671 | /* 316104 */ "VPROLVQZrrkz\000" |
| 69672 | /* 316117 */ "VPSRLVQZrrkz\000" |
| 69673 | /* 316130 */ "VPRORVQZrrkz\000" |
| 69674 | /* 316143 */ "VPMOVSXWQZrrkz\000" |
| 69675 | /* 316158 */ "VPMOVZXWQZrrkz\000" |
| 69676 | /* 316173 */ "VCVT2PH2BF8SZrrkz\000" |
| 69677 | /* 316191 */ "VCVTBIASPH2BF8SZrrkz\000" |
| 69678 | /* 316212 */ "VCVTPH2BF8SZrrkz\000" |
| 69679 | /* 316229 */ "VCVT2PH2HF8SZrrkz\000" |
| 69680 | /* 316247 */ "VCVTBIASPH2HF8SZrrkz\000" |
| 69681 | /* 316268 */ "VCVTPH2HF8SZrrkz\000" |
| 69682 | /* 316285 */ "VCVTTBF162IBSZrrkz\000" |
| 69683 | /* 316304 */ "VCVTBF162IBSZrrkz\000" |
| 69684 | /* 316322 */ "VCVTTPH2IBSZrrkz\000" |
| 69685 | /* 316339 */ "VCVTPH2IBSZrrkz\000" |
| 69686 | /* 316355 */ "VCVTTPS2IBSZrrkz\000" |
| 69687 | /* 316372 */ "VCVTPS2IBSZrrkz\000" |
| 69688 | /* 316388 */ "VCVTTBF162IUBSZrrkz\000" |
| 69689 | /* 316408 */ "VCVTBF162IUBSZrrkz\000" |
| 69690 | /* 316427 */ "VCVTTPH2IUBSZrrkz\000" |
| 69691 | /* 316445 */ "VCVTPH2IUBSZrrkz\000" |
| 69692 | /* 316462 */ "VCVTTPS2IUBSZrrkz\000" |
| 69693 | /* 316480 */ "VCVTPS2IUBSZrrkz\000" |
| 69694 | /* 316497 */ "VCVTPD2PSZrrkz\000" |
| 69695 | /* 316512 */ "VCVTPH2PSZrrkz\000" |
| 69696 | /* 316527 */ "VPERMI2PSZrrkz\000" |
| 69697 | /* 316542 */ "VCVTDQ2PSZrrkz\000" |
| 69698 | /* 316557 */ "VCVTUDQ2PSZrrkz\000" |
| 69699 | /* 316573 */ "VCVTQQ2PSZrrkz\000" |
| 69700 | /* 316588 */ "VCVTUQQ2PSZrrkz\000" |
| 69701 | /* 316604 */ "VPERMT2PSZrrkz\000" |
| 69702 | /* 316619 */ "VMOVAPSZrrkz\000" |
| 69703 | /* 316632 */ "VSUBPSZrrkz\000" |
| 69704 | /* 316644 */ "VMINCPSZrrkz\000" |
| 69705 | /* 316657 */ "VMAXCPSZrrkz\000" |
| 69706 | /* 316670 */ "VADDPSZrrkz\000" |
| 69707 | /* 316682 */ "VEXPANDPSZrrkz\000" |
| 69708 | /* 316697 */ "VANDPSZrrkz\000" |
| 69709 | /* 316709 */ "VSCALEFPSZrrkz\000" |
| 69710 | /* 316724 */ "VUNPCKHPSZrrkz\000" |
| 69711 | /* 316739 */ "VPERMILPSZrrkz\000" |
| 69712 | /* 316754 */ "VUNPCKLPSZrrkz\000" |
| 69713 | /* 316769 */ "VMULPSZrrkz\000" |
| 69714 | /* 316781 */ "VBLENDMPSZrrkz\000" |
| 69715 | /* 316796 */ "VPERMPSZrrkz\000" |
| 69716 | /* 316809 */ "VANDNPSZrrkz\000" |
| 69717 | /* 316822 */ "VMINPSZrrkz\000" |
| 69718 | /* 316834 */ "VORPSZrrkz\000" |
| 69719 | /* 316845 */ "VXORPSZrrkz\000" |
| 69720 | /* 316857 */ "VCOMPRESSPSZrrkz\000" |
| 69721 | /* 316874 */ "VMOVUPSZrrkz\000" |
| 69722 | /* 316887 */ "VDIVPSZrrkz\000" |
| 69723 | /* 316899 */ "VMAXPSZrrkz\000" |
| 69724 | /* 316911 */ "VCVTTPD2DQSZrrkz\000" |
| 69725 | /* 316928 */ "VCVTTPS2DQSZrrkz\000" |
| 69726 | /* 316945 */ "VCVTTPD2UDQSZrrkz\000" |
| 69727 | /* 316963 */ "VCVTTPS2UDQSZrrkz\000" |
| 69728 | /* 316981 */ "VCVTTPD2QQSZrrkz\000" |
| 69729 | /* 316998 */ "VCVTTPS2QQSZrrkz\000" |
| 69730 | /* 317015 */ "VCVTTPD2UQQSZrrkz\000" |
| 69731 | /* 317033 */ "VCVTTPS2UQQSZrrkz\000" |
| 69732 | /* 317051 */ "VRCP14SSZrrkz\000" |
| 69733 | /* 317065 */ "VRSQRT14SSZrrkz\000" |
| 69734 | /* 317081 */ "VSCALEFSSZrrkz\000" |
| 69735 | /* 317096 */ "VBROADCASTSSZrrkz\000" |
| 69736 | /* 317114 */ "VMOVSSZrrkz\000" |
| 69737 | /* 317126 */ "VCVTTPH2WZrrkz\000" |
| 69738 | /* 317141 */ "VCVTPH2WZrrkz\000" |
| 69739 | /* 317155 */ "VPERMI2WZrrkz\000" |
| 69740 | /* 317169 */ "VPERMT2WZrrkz\000" |
| 69741 | /* 317183 */ "VPSRAWZrrkz\000" |
| 69742 | /* 317195 */ "VPUNPCKHBWZrrkz\000" |
| 69743 | /* 317211 */ "VPUNPCKLBWZrrkz\000" |
| 69744 | /* 317227 */ "VPSUBWZrrkz\000" |
| 69745 | /* 317239 */ "VPMOVSXBWZrrkz\000" |
| 69746 | /* 317254 */ "VPMOVZXBWZrrkz\000" |
| 69747 | /* 317269 */ "VPADDWZrrkz\000" |
| 69748 | /* 317281 */ "VPEXPANDWZrrkz\000" |
| 69749 | /* 317296 */ "VPACKSSDWZrrkz\000" |
| 69750 | /* 317311 */ "VPACKUSDWZrrkz\000" |
| 69751 | /* 317326 */ "VPMOVUSDWZrrkz\000" |
| 69752 | /* 317341 */ "VPMOVSDWZrrkz\000" |
| 69753 | /* 317355 */ "VPMOVDWZrrkz\000" |
| 69754 | /* 317368 */ "VPAVGWZrrkz\000" |
| 69755 | /* 317380 */ "VPMULHWZrrkz\000" |
| 69756 | /* 317393 */ "VPSLLWZrrkz\000" |
| 69757 | /* 317405 */ "VPMULLWZrrkz\000" |
| 69758 | /* 317418 */ "VPSRLWZrrkz\000" |
| 69759 | /* 317430 */ "VPBLENDMWZrrkz\000" |
| 69760 | /* 317445 */ "VPERMWZrrkz\000" |
| 69761 | /* 317457 */ "VPMOVUSQWZrrkz\000" |
| 69762 | /* 317472 */ "VPMOVSQWZrrkz\000" |
| 69763 | /* 317486 */ "VPMOVQWZrrkz\000" |
| 69764 | /* 317499 */ "VPABSWZrrkz\000" |
| 69765 | /* 317511 */ "VPMADDUBSWZrrkz\000" |
| 69766 | /* 317527 */ "VPSUBSWZrrkz\000" |
| 69767 | /* 317540 */ "VPADDSWZrrkz\000" |
| 69768 | /* 317553 */ "VPMINSWZrrkz\000" |
| 69769 | /* 317566 */ "VPMULHRSWZrrkz\000" |
| 69770 | /* 317581 */ "VPCOMPRESSWZrrkz\000" |
| 69771 | /* 317598 */ "VPSUBUSWZrrkz\000" |
| 69772 | /* 317612 */ "VPADDUSWZrrkz\000" |
| 69773 | /* 317626 */ "VPMAXSWZrrkz\000" |
| 69774 | /* 317639 */ "VPOPCNTWZrrkz\000" |
| 69775 | /* 317653 */ "VPBROADCASTWZrrkz\000" |
| 69776 | /* 317671 */ "VCVTTPH2UWZrrkz\000" |
| 69777 | /* 317687 */ "VCVTPH2UWZrrkz\000" |
| 69778 | /* 317702 */ "VPMULHUWZrrkz\000" |
| 69779 | /* 317716 */ "VPMINUWZrrkz\000" |
| 69780 | /* 317729 */ "VPMAXUWZrrkz\000" |
| 69781 | /* 317742 */ "VPSRAVWZrrkz\000" |
| 69782 | /* 317755 */ "VPSLLVWZrrkz\000" |
| 69783 | /* 317768 */ "VPSRLVWZrrkz\000" |
| 69784 | /* 317781 */ "VCVT2PS2PHXZrrkz\000" |
| 69785 | /* 317798 */ "VCVTPS2PHXZrrkz\000" |
| 69786 | /* 317814 */ "VCVTPH2PSXZrrkz\000" |
| 69787 | /* 317830 */ "VPBROADCASTBrZrrkz\000" |
| 69788 | /* 317849 */ "VPBROADCASTDrZrrkz\000" |
| 69789 | /* 317868 */ "VPBROADCASTQrZrrkz\000" |
| 69790 | /* 317887 */ "VPBROADCASTWrZrrkz\000" |
| 69791 | }; |
| 69792 | #ifdef __GNUC__ |
| 69793 | #pragma GCC diagnostic pop |
| 69794 | #endif |
| 69795 | |
| 69796 | extern const unsigned X86InstrNameIndices[] = { |
| 69797 | 22071U, 23567U, 24543U, 23949U, 22834U, 22815U, 22843U, 23141U, |
| 69798 | 21788U, 21803U, 17605U, 17592U, 21830U, 25571U, 17417U, 26592U, |
| 69799 | 17629U, 22067U, 22824U, 17041U, 41100U, 17181U, 26456U, 8250U, |
| 69800 | 16971U, 17029U, 24091U, 23120U, 26220U, 16850U, 24369U, 21949U, |
| 69801 | 26209U, 17220U, 24313U, 24300U, 24681U, 26006U, 26079U, 23052U, |
| 69802 | 23099U, 23072U, 22860U, 17389U, 24569U, 24013U, 41114U, 24799U, |
| 69803 | 24266U, 17465U, 26632U, 26662U, 23785U, 8116U, 7651U, 23299U, |
| 69804 | 31780U, 31787U, 23521U, 23528U, 23535U, 23545U, 8223U, 24992U, |
| 69805 | 24955U, 25091U, 26676U, 17603U, 22069U, 32644U, 17427U, 17442U, |
| 69806 | 23146U, 25925U, 25165U, 26493U, 25182U, 24870U, 7812U, 25530U, |
| 69807 | 26231U, 25059U, 26532U, 17521U, 24580U, 8331U, 7786U, 8313U, |
| 69808 | 26269U, 26250U, 23763U, 24706U, 24725U, 8006U, 7950U, 7980U, |
| 69809 | 7991U, 7931U, 7961U, 17313U, 17297U, 25622U, 21864U, 21881U, |
| 69810 | 8132U, 7657U, 8229U, 8190U, 24997U, 24961U, 32572U, 23918U, |
| 69811 | 32555U, 23901U, 8072U, 7634U, 32490U, 23836U, 23666U, 23613U, |
| 69812 | 24153U, 24131U, 8272U, 25878U, 17021U, 21975U, 8263U, 25952U, |
| 69813 | 26471U, 7738U, 25678U, 26178U, 25705U, 26646U, 7804U, 26167U, |
| 69814 | 26155U, 26446U, 21941U, 26625U, 21817U, 26655U, 22887U, 24792U, |
| 69815 | 24778U, 22880U, 24785U, 25052U, 23209U, 24240U, 24233U, 24247U, |
| 69816 | 24254U, 25943U, 24005U, 17062U, 23989U, 16992U, 23997U, 17054U, |
| 69817 | 23981U, 16984U, 24043U, 24035U, 21994U, 21986U, 25796U, 25786U, |
| 69818 | 25776U, 25766U, 25816U, 25806U, 40874U, 40884U, 25826U, 25839U, |
| 69819 | 40894U, 40904U, 25852U, 25865U, 8030U, 7613U, 23233U, 7379U, |
| 69820 | 7895U, 31759U, 23494U, 32356U, 22144U, 24413U, 3632U, 9U, |
| 69821 | 21927U, 3588U, 0U, 24388U, 24420U, 21781U, 26617U, 7776U, |
| 69822 | 22110U, 22128U, 24197U, 24206U, 25899U, 25912U, 25078U, 23800U, |
| 69823 | 25588U, 17530U, 23715U, 23725U, 17116U, 17131U, 23602U, 23655U, |
| 69824 | 23687U, 23701U, 31800U, 31826U, 31812U, 17070U, 17098U, 17083U, |
| 69825 | 8122U, 22183U, 23870U, 32524U, 23894U, 32548U, 25085U, 8304U, |
| 69826 | 8294U, 24538U, 26103U, 17159U, 24851U, 24831U, 26131U, 26110U, |
| 69827 | 24885U, 24916U, 24902U, 25652U, 41161U, 17574U, 41154U, 17556U, |
| 69828 | 24292U, 24175U, 17369U, 22893U, 25270U, 23942U, 25277U, 23750U, |
| 69829 | 25262U, 23934U, 23735U, 3611U, 22041U, 22010U, 22002U, 26509U, |
| 69830 | 24822U, 26242U, 26287U, 26542U, 24556U, 17168U, 7841U, 17492U, |
| 69831 | 17260U, 8058U, 7620U, 23261U, 31766U, 23501U, 7385U, 26517U, |
| 69832 | 24397U, 24745U, 24761U, 41091U, 17197U, 17511U, 26041U, 24055U, |
| 69833 | 24124U, 24100U, 24112U, 8037U, 23240U, 8013U, 23216U, 32473U, |
| 69834 | 23819U, 23634U, 23581U, 8100U, 23283U, 8207U, 24977U, 24939U, |
| 69835 | 32507U, 23853U, 32531U, 23877U, 40677U, 40684U, 7481U, 7524U, |
| 69836 | 7470U, 7502U, 7457U, 7513U, 7492U, 7535U, 25098U, 25136U, |
| 69837 | 581U, 565U, 549U, 25114U, 2153U, 4430U, 5909U, 16867U, |
| 69838 | 22018U, 25555U, 613U, 24627U, 24604U, 152852U, 24644U, 5916U, |
| 69839 | 16874U, 22025U, 25562U, 8183U, 26565U, 1728U, 3995U, 1750U, |
| 69840 | 4017U, 7868U, 24429U, 32328U, 7875U, 24436U, 32335U, 32625U, |
| 69841 | 32588U, 604U, 26020U, 18U, 7165U, 824U, 1354U, 1072U, |
| 69842 | 4565U, 7180U, 41074U, 32609U, 31747U, 187668U, 187841U, 26773U, |
| 69843 | 32056U, 26727U, 26713U, 26791U, 32072U, 26743U, 26825U, 31878U, |
| 69844 | 26905U, 26925U, 26915U, 26935U, 31985U, 26809U, 32088U, 26759U, |
| 69845 | 26866U, 7917U, 17275U, 26878U, 31838U, 1940U, 4210U, 60541U, |
| 69846 | 60525U, 60559U, 60391U, 60587U, 60575U, 23555U, 60405U, 187538U, |
| 69847 | 60321U, 243767U, 187553U, 187699U, 187863U, 69600U, 69718U, 69612U, |
| 69848 | 69730U, 41034U, 40954U, 40994U, 40914U, 41054U, 40974U, 41014U, |
| 69849 | 40934U, 597U, 25152U, 1950U, 4220U, 17618U, 24215U, 24224U, |
| 69850 | 7371U, 6034U, 196247U, 39421U, 196444U, 39530U, 6055U, 196269U, |
| 69851 | 39435U, 196466U, 39544U, 25070U, 21756U, 3388U, 5148U, 474U, |
| 69852 | 5613U, 64046U, 6371U, 34417U, 9283U, 36515U, 14753U, 196945U, |
| 69853 | 39626U, 16347U, 69775U, 6824U, 34717U, 9499U, 37158U, 15246U, |
| 69854 | 163691U, 38771U, 15907U, 201906U, 40465U, 28057U, 16705U, 27439U, |
| 69855 | 29479U, 2269U, 63787U, 6107U, 34249U, 9139U, 36227U, 14533U, |
| 69856 | 196220U, 39408U, 16215U, 69485U, 6626U, 34549U, 9355U, 36870U, |
| 69857 | 15026U, 162260U, 38037U, 15675U, 200442U, 39791U, 27853U, 16473U, |
| 69858 | 27259U, 28894U, 2342U, 2432U, 33792U, 8985U, 6239U, 34333U, |
| 69859 | 9211U, 196417U, 39517U, 16281U, 2580U, 33899U, 9063U, 6725U, |
| 69860 | 34633U, 9427U, 162827U, 38404U, 15791U, 200996U, 40128U, 27955U, |
| 69861 | 16589U, 27349U, 29008U, 6027U, 64920U, 6496U, 36682U, 14894U, |
| 69862 | 198627U, 39717U, 16411U, 70624U, 6921U, 37325U, 15387U, 174520U, |
| 69863 | 38937U, 15997U, 213245U, 40601U, 28157U, 16795U, 27527U, 29973U, |
| 69864 | 162697U, 38294U, 15745U, 200837U, 40018U, 16543U, 163321U, 38661U, |
| 69865 | 15861U, 201490U, 40355U, 16659U, 5622U, 64059U, 6394U, 34431U, |
| 69866 | 9295U, 18332U, 10528U, 36528U, 14764U, 19567U, 11961U, 196966U, |
| 69867 | 39639U, 16358U, 21123U, 13326U, 69783U, 6842U, 34731U, 9511U, |
| 69868 | 18518U, 10708U, 37171U, 15257U, 19936U, 12400U, 163700U, 38784U, |
| 69869 | 15918U, 20696U, 12938U, 201923U, 40478U, 28074U, 16716U, 27454U, |
| 69870 | 21549U, 13576U, 27107U, 27718U, 29491U, 2278U, 63800U, 6130U, |
| 69871 | 34263U, 9151U, 18236U, 10408U, 36240U, 14544U, 19413U, 11765U, |
| 69872 | 196248U, 39422U, 16226U, 21035U, 13214U, 69493U, 6644U, 34563U, |
| 69873 | 9367U, 18422U, 10588U, 36883U, 15037U, 19782U, 12204U, 162300U, |
| 69874 | 38050U, 15686U, 20354U, 12796U, 200501U, 39804U, 27870U, 16484U, |
| 69875 | 27274U, 21207U, 13434U, 26963U, 27598U, 28906U, 2351U, 2447U, |
| 69876 | 33807U, 8998U, 18103U, 10281U, 6262U, 34347U, 9223U, 18284U, |
| 69877 | 10468U, 196445U, 39531U, 16292U, 21079U, 13270U, 2590U, 33914U, |
| 69878 | 9076U, 18170U, 10345U, 6743U, 34647U, 9439U, 18470U, 10648U, |
| 69879 | 162867U, 38417U, 15802U, 20525U, 12867U, 201055U, 40141U, 27972U, |
| 69880 | 16600U, 27364U, 21378U, 13505U, 27035U, 27658U, 29020U, 6041U, |
| 69881 | 64932U, 6504U, 36694U, 14904U, 19665U, 12086U, 198639U, 39729U, |
| 69882 | 16421U, 21166U, 13381U, 70631U, 6929U, 37337U, 15397U, 20034U, |
| 69883 | 12525U, 174528U, 38949U, 16007U, 20791U, 13008U, 213253U, 40613U, |
| 69884 | 28173U, 16805U, 27541U, 21644U, 13646U, 27178U, 27777U, 29984U, |
| 69885 | 175584U, 214324U, 177823U, 216506U, 40732U, 40691U, 175925U, 234707U, |
| 69886 | 214605U, 237997U, 178133U, 235086U, 216775U, 238376U, 175532U, 214272U, |
| 69887 | 177771U, 216454U, 152949U, 153386U, 153756U, 153031U, 718U, 187595U, |
| 69888 | 3290U, 153260U, 5050U, 153615U, 2955U, 376U, 2729U, 4612U, |
| 69889 | 3067U, 4864U, 240U, 2815U, 4698U, 86U, 655U, 1784U, |
| 69890 | 4063U, 1814U, 4093U, 162724U, 38336U, 15757U, 200864U, 40060U, |
| 69891 | 16555U, 163348U, 38703U, 15873U, 201517U, 40397U, 16671U, 22957U, |
| 69892 | 22901U, 178275U, 216903U, 22981U, 22925U, 175103U, 213856U, 22969U, |
| 69893 | 22913U, 178289U, 216917U, 22997U, 22941U, 175123U, 213876U, 175113U, |
| 69894 | 213866U, 169305U, 207720U, 5631U, 64072U, 6408U, 34445U, 9307U, |
| 69895 | 18344U, 10543U, 36541U, 14775U, 19578U, 11975U, 196979U, 39652U, |
| 69896 | 16369U, 21134U, 13340U, 69791U, 6851U, 34745U, 9523U, 18530U, |
| 69897 | 10723U, 37184U, 15268U, 19947U, 12414U, 163708U, 38797U, 15929U, |
| 69898 | 20707U, 12952U, 201931U, 40491U, 28091U, 16727U, 27469U, 21560U, |
| 69899 | 13590U, 27125U, 27733U, 29503U, 2287U, 63813U, 6144U, 34277U, |
| 69900 | 9163U, 18248U, 10423U, 36253U, 14555U, 19424U, 11779U, 196270U, |
| 69901 | 39436U, 16237U, 21046U, 13228U, 69501U, 6653U, 34577U, 9379U, |
| 69902 | 18434U, 10603U, 36896U, 15048U, 19793U, 12218U, 162308U, 38063U, |
| 69903 | 15697U, 20365U, 12810U, 200509U, 39817U, 27887U, 16495U, 27289U, |
| 69904 | 21218U, 13448U, 26981U, 27613U, 28918U, 2360U, 2462U, 33822U, |
| 69905 | 9011U, 18116U, 10297U, 6276U, 34361U, 9235U, 18296U, 10483U, |
| 69906 | 196467U, 39545U, 16303U, 21090U, 13284U, 2600U, 33929U, 9089U, |
| 69907 | 18183U, 10361U, 6752U, 34661U, 9451U, 18482U, 10663U, 162875U, |
| 69908 | 38430U, 15813U, 20536U, 12881U, 201063U, 40154U, 27989U, 16611U, |
| 69909 | 27379U, 21389U, 13519U, 27053U, 27673U, 29032U, 6048U, 64944U, |
| 69910 | 6512U, 36706U, 14914U, 19675U, 12099U, 198651U, 39741U, 16431U, |
| 69911 | 21176U, 13394U, 70638U, 6937U, 37349U, 15407U, 20044U, 12538U, |
| 69912 | 174535U, 38961U, 16017U, 20801U, 13021U, 213260U, 40625U, 28189U, |
| 69913 | 16815U, 27555U, 21654U, 13659U, 27195U, 27791U, 29995U, 162506U, |
| 69914 | 38149U, 20426U, 200659U, 39888U, 21279U, 163144U, 38516U, 20597U, |
| 69915 | 201284U, 40225U, 21450U, 175689U, 214408U, 177953U, 216612U, 175602U, |
| 69916 | 214342U, 177866U, 216524U, 196310U, 39464U, 196533U, 39573U, 196997U, |
| 69917 | 201985U, 25601U, 196318U, 39477U, 196541U, 39586U, 162566U, 38204U, |
| 69918 | 20461U, 200734U, 39943U, 21314U, 163217U, 38571U, 20632U, 201381U, |
| 69919 | 40280U, 21485U, 63821U, 69509U, 63949U, 69651U, 162417U, 200618U, |
| 69920 | 163055U, 201243U, 162358U, 200559U, 162938U, 201126U, 162268U, 200450U, |
| 69921 | 162835U, 201004U, 162385U, 200586U, 163023U, 201211U, 162576U, 200744U, |
| 69922 | 163227U, 201391U, 67786U, 74277U, 67983U, 74588U, 800U, 844U, |
| 69923 | 812U, 856U, 162429U, 200630U, 163067U, 201255U, 162376U, 38105U, |
| 69924 | 20388U, 200577U, 39844U, 21241U, 163014U, 38472U, 20559U, 201202U, |
| 69925 | 40181U, 21412U, 162278U, 200460U, 162845U, 201014U, 162396U, 38119U, |
| 69926 | 20400U, 200597U, 39858U, 21253U, 163034U, 38486U, 20571U, 201222U, |
| 69927 | 40195U, 21424U, 162557U, 38190U, 20449U, 200717U, 39929U, 21302U, |
| 69928 | 163208U, 38557U, 20620U, 201364U, 40266U, 21473U, 163868U, 162593U, |
| 69929 | 163742U, 201965U, 162338U, 200539U, 162918U, 201106U, 163852U, 202043U, |
| 69930 | 162549U, 200709U, 163200U, 201356U, 7882U, 187770U, 187945U, 6472U, |
| 69931 | 197056U, 6897U, 202067U, 6208U, 196368U, 6699U, 200761U, 6340U, |
| 69932 | 196591U, 6798U, 201408U, 6380U, 196953U, 6833U, 201914U, 6116U, |
| 69933 | 196228U, 6635U, 200481U, 6248U, 196425U, 6734U, 201035U, 6454U, |
| 69934 | 197040U, 6879U, 202051U, 6190U, 196352U, 6681U, 200726U, 6322U, |
| 69935 | 196575U, 6780U, 201373U, 6463U, 197048U, 6888U, 202059U, 6199U, |
| 69936 | 196360U, 6690U, 200753U, 6331U, 196583U, 6789U, 201400U, 162367U, |
| 69937 | 38091U, 20376U, 200568U, 39830U, 21229U, 162947U, 38458U, 20547U, |
| 69938 | 201135U, 40167U, 21400U, 153811U, 26342U, 188079U, 26405U, 153086U, |
| 69939 | 26300U, 187744U, 26363U, 153460U, 26321U, 2679U, 187919U, 26384U, |
| 69940 | 5668U, 2693U, 25965U, 32342U, 64104U, 6417U, 197006U, 69830U, |
| 69941 | 6860U, 163827U, 202018U, 29529U, 63856U, 6153U, 196301U, 69551U, |
| 69942 | 6662U, 162524U, 200684U, 28944U, 2472U, 6285U, 196511U, 2610U, |
| 69943 | 6761U, 163162U, 201302U, 29058U, 64972U, 198658U, 70672U, 174553U, |
| 69944 | 213284U, 30006U, 24443U, 17239U, 197073U, 163952U, 15963U, 202123U, |
| 69945 | 16761U, 29554U, 196385U, 162686U, 15731U, 200826U, 16529U, 28969U, |
| 69946 | 196608U, 163310U, 15847U, 201465U, 16645U, 29100U, 21762U, 3397U, |
| 69947 | 5157U, 483U, 7678U, 7755U, 8179U, 17408U, 25988U, 22049U, |
| 69948 | 26435U, 22057U, 22075U, 41136U, 25749U, 22123U, 7673U, 187760U, |
| 69949 | 187935U, 7759U, 163954U, 15965U, 202125U, 16763U, 162688U, 15733U, |
| 69950 | 200828U, 16531U, 163312U, 15849U, 201467U, 16647U, 21701U, 3312U, |
| 69951 | 5072U, 398U, 21683U, 3279U, 5039U, 365U, 21719U, 3336U, |
| 69952 | 5096U, 422U, 21691U, 3299U, 5059U, 385U, 21674U, 3258U, |
| 69953 | 5018U, 344U, 21710U, 3324U, 5084U, 410U, 21739U, 3365U, |
| 69954 | 5125U, 451U, 21748U, 3377U, 5137U, 463U, 5446U, 32438U, |
| 69955 | 1839U, 32410U, 4133U, 32427U, 5456U, 1849U, 5977U, 1803U, |
| 69956 | 4082U, 62U, 890U, 5424U, 3602U, 1718U, 5316U, 3985U, |
| 69957 | 5968U, 5927U, 32461U, 5885U, 32449U, 1523U, 4164U, 5640U, |
| 69958 | 64105U, 6418U, 197007U, 69831U, 6861U, 163828U, 202019U, 29530U, |
| 69959 | 2296U, 63857U, 6154U, 196302U, 69552U, 6663U, 162525U, 200685U, |
| 69960 | 28945U, 2379U, 2473U, 6286U, 196512U, 2611U, 6762U, 163163U, |
| 69961 | 201303U, 29059U, 6062U, 64973U, 6520U, 198659U, 70673U, 6945U, |
| 69962 | 174554U, 213285U, 30007U, 3520U, 34010U, 5291U, 34168U, 67818U, |
| 69963 | 74309U, 68015U, 74620U, 7595U, 67839U, 228861U, 74341U, 229075U, |
| 69964 | 23191U, 24492U, 68038U, 228909U, 74657U, 229123U, 32392U, 7411U, |
| 69965 | 163750U, 201973U, 162346U, 200547U, 162926U, 201114U, 7423U, 174542U, |
| 69966 | 213267U, 175935U, 234721U, 214615U, 238011U, 178165U, 235100U, 216785U, |
| 69967 | 238390U, 187625U, 192481U, 192450U, 187615U, 3482U, 5242U, 521U, |
| 69968 | 3535U, 5306U, 533U, 8173U, 24051U, 5680U, 34187U, 2919U, |
| 69969 | 33976U, 7195U, 35013U, 5793U, 34204U, 3469U, 33993U, 7283U, |
| 69970 | 35045U, 4839U, 34134U, 7206U, 35029U, 5229U, 34151U, 7294U, |
| 69971 | 35061U, 40814U, 64170U, 197063U, 69879U, 202105U, 63922U, 196375U, |
| 69972 | 69624U, 200799U, 2512U, 196598U, 2631U, 201446U, 65031U, 198689U, |
| 69973 | 70715U, 213299U, 175489U, 214229U, 177749U, 216432U, 176845U, 215644U, |
| 69974 | 177652U, 216380U, 176870U, 215683U, 175501U, 214241U, 162972U, 234457U, |
| 69975 | 201160U, 237747U, 176613U, 234818U, 215374U, 238108U, 178077U, 235041U, |
| 69976 | 216710U, 238331U, 175851U, 234662U, 214531U, 237952U, 178089U, 235057U, |
| 69977 | 216734U, 238347U, 175837U, 234644U, 214517U, 237934U, 178063U, 235023U, |
| 69978 | 216696U, 238313U, 175863U, 234678U, 214543U, 237968U, 163001U, 234494U, |
| 69979 | 201189U, 237784U, 176638U, 234851U, 215399U, 238141U, 176832U, 215631U, |
| 69980 | 176857U, 215670U, 162957U, 234438U, 201145U, 237728U, 176600U, 234801U, |
| 69981 | 215361U, 238091U, 162986U, 234475U, 201174U, 237765U, 176625U, 234834U, |
| 69982 | 215386U, 238124U, 16960U, 17111U, 7375U, 25074U, 40718U, 153690U, |
| 69983 | 37805U, 15577U, 20244U, 12707U, 188030U, 39147U, 16117U, 20925U, |
| 69984 | 13125U, 226524U, 152909U, 37657U, 15497U, 20140U, 12629U, 187676U, |
| 69985 | 38999U, 16037U, 20821U, 13047U, 226502U, 153335U, 37731U, 15537U, |
| 69986 | 20192U, 12668U, 187849U, 39073U, 16077U, 20873U, 13086U, 157846U, |
| 69987 | 37879U, 15617U, 20296U, 12746U, 191921U, 39221U, 16157U, 20977U, |
| 69988 | 13164U, 153965U, 37867U, 20286U, 188148U, 39209U, 20967U, 153243U, |
| 69989 | 37719U, 20182U, 187816U, 39061U, 20863U, 153598U, 37793U, 20234U, |
| 69990 | 188008U, 39135U, 20915U, 157883U, 37936U, 20334U, 191953U, 39278U, |
| 69991 | 21015U, 175758U, 214464U, 178022U, 216668U, 152986U, 153423U, 153787U, |
| 69992 | 153062U, 752U, 187647U, 153300U, 153655U, 3004U, 2766U, 4649U, |
| 69993 | 3107U, 4904U, 280U, 2855U, 4738U, 126U, 686U, 176039U, |
| 69994 | 234775U, 214707U, 238065U, 178218U, 235154U, 216838U, 238444U, 153005U, |
| 69995 | 153441U, 153798U, 153073U, 764U, 187658U, 3425U, 153320U, 5185U, |
| 69996 | 153675U, 3042U, 511U, 2790U, 4673U, 3121U, 4918U, 294U, |
| 69997 | 2869U, 4752U, 140U, 697U, 67809U, 74300U, 68006U, 74611U, |
| 69998 | 40824U, 2087U, 4355U, 23971U, 4043U, 3434U, 5194U, 3452U, |
| 69999 | 5212U, 187571U, 25233U, 26683U, 31794U, 5938U, 5896U, 1831U, |
| 70000 | 4125U, 5381U, 1644U, 33718U, 3850U, 34076U, 5495U, 1888U, |
| 70001 | 33747U, 4174U, 34105U, 24675U, 25743U, 26707U, 40834U, 71856U, |
| 70002 | 74630U, 24468U, 22094U, 906U, 60673U, 153808U, 60634U, 153083U, |
| 70003 | 153457U, 60684U, 153857U, 60645U, 153140U, 153505U, 157905U, 158513U, |
| 70004 | 153102U, 153476U, 153150U, 153515U, 24325U, 25272U, 24353U, 25239U, |
| 70005 | 17146U, 24190U, 153827U, 153110U, 153867U, 153159U, 24361U, 153972U, |
| 70006 | 159166U, 16964U, 25754U, 3581U, 3620U, 22079U, 32658U, 26064U, |
| 70007 | 24261U, 153981U, 188171U, 159194U, 23452U, 23326U, 23389U, 23473U, |
| 70008 | 23347U, 23410U, 3171U, 191984U, 23431U, 23305U, 23368U, 23743U, |
| 70009 | 23515U, 899U, 23757U, 26201U, 158535U, 158491U, 17152U, 23944U, |
| 70010 | 25279U, 159174U, 40844U, 24931U, 4154U, 17504U, 3932U, 25935U, |
| 70011 | 32421U, 912U, 7724U, 67742U, 74222U, 67724U, 74204U, 174711U, |
| 70012 | 213464U, 40854U, 175583U, 214323U, 177822U, 216505U, 26151U, 26034U, |
| 70013 | 175544U, 214284U, 177783U, 216466U, 153964U, 37866U, 20285U, 188147U, |
| 70014 | 39208U, 20966U, 153242U, 37718U, 20181U, 187815U, 39060U, 20862U, |
| 70015 | 153597U, 37792U, 20233U, 188007U, 39134U, 20914U, 157882U, 37935U, |
| 70016 | 20333U, 191952U, 39277U, 21014U, 153721U, 152958U, 153395U, 3134U, |
| 70017 | 4931U, 307U, 2882U, 4765U, 153U, 2967U, 4802U, 190U, |
| 70018 | 153819U, 37841U, 20274U, 188087U, 39183U, 20955U, 163770U, 38825U, |
| 70019 | 15940U, 20718U, 12966U, 65819U, 6584U, 34505U, 18396U, 36829U, |
| 70020 | 19758U, 202002U, 40504U, 16738U, 21571U, 13604U, 72183U, 7141U, |
| 70021 | 34997U, 18750U, 37486U, 20127U, 153094U, 37693U, 20170U, 187752U, |
| 70022 | 39035U, 20851U, 162449U, 38135U, 15708U, 20414U, 12824U, 65735U, |
| 70023 | 6536U, 34473U, 18368U, 36814U, 19745U, 200650U, 39874U, 16506U, |
| 70024 | 21267U, 13462U, 72099U, 7049U, 34901U, 18666U, 37471U, 20114U, |
| 70025 | 153468U, 37767U, 20222U, 187927U, 39109U, 20903U, 163087U, 38502U, |
| 70026 | 15824U, 20585U, 12895U, 2534U, 33852U, 18142U, 6560U, 34489U, |
| 70027 | 18382U, 201275U, 40211U, 16622U, 21438U, 13533U, 2653U, 33959U, |
| 70028 | 18209U, 7095U, 34949U, 18708U, 157869U, 37912U, 20323U, 191939U, |
| 70029 | 39254U, 21004U, 65829U, 6595U, 72193U, 7152U, 65757U, 6547U, |
| 70030 | 72121U, 7060U, 2546U, 6571U, 2665U, 7106U, 69823U, 202011U, |
| 70031 | 69544U, 200668U, 70666U, 213278U, 153702U, 37817U, 15587U, 20254U, |
| 70032 | 12720U, 188037U, 39159U, 16127U, 20935U, 13138U, 226535U, 152921U, |
| 70033 | 37669U, 15507U, 20150U, 12642U, 187683U, 39011U, 16047U, 20831U, |
| 70034 | 13060U, 226513U, 153347U, 37743U, 15547U, 20202U, 12681U, 187856U, |
| 70035 | 39085U, 16087U, 20883U, 13099U, 157857U, 37890U, 15626U, 20305U, |
| 70036 | 12758U, 191927U, 39232U, 16166U, 20986U, 13176U, 16835U, 24453U, |
| 70037 | 7584U, 68025U, 74644U, 24517U, 22101U, 23180U, 32381U, 26205U, |
| 70038 | 3723U, 24073U, 16946U, 2008U, 4290U, 34120U, 21934U, 1552U, |
| 70039 | 3746U, 1589U, 3786U, 1616U, 3822U, 34046U, 1634U, 3840U, |
| 70040 | 34061U, 25975U, 5581U, 1994U, 4257U, 153846U, 153129U, 153494U, |
| 70041 | 3158U, 4955U, 331U, 2906U, 4789U, 177U, 3029U, 4826U, |
| 70042 | 214U, 153730U, 152996U, 153836U, 153119U, 153484U, 3146U, 4943U, |
| 70043 | 319U, 2894U, 4777U, 165U, 3017U, 4814U, 202U, 60599U, |
| 70044 | 1060U, 3664U, 5325U, 41174U, 41168U, 153860U, 26353U, 188095U, |
| 70045 | 26416U, 153143U, 26311U, 187779U, 26374U, 153508U, 26332U, 32815U, |
| 70046 | 187963U, 26395U, 32826U, 60655U, 1066U, 3679U, 5340U, 41179U, |
| 70047 | 107403U, 107488U, 107584U, 107691U, 107411U, 107496U, 107419U, 107504U, |
| 70048 | 107611U, 107707U, 107603U, 107699U, 22152U, 107480U, 37501U, 162098U, |
| 70049 | 37959U, 196119U, 39330U, 111838U, 37553U, 132989U, 37605U, 107565U, |
| 70050 | 37514U, 162106U, 37972U, 196127U, 39343U, 111846U, 37566U, 132997U, |
| 70051 | 37618U, 107672U, 37527U, 162114U, 37985U, 196135U, 39356U, 111854U, |
| 70052 | 37579U, 133005U, 37631U, 107768U, 37540U, 162122U, 37998U, 196143U, |
| 70053 | 39369U, 111862U, 37592U, 133013U, 37644U, 107452U, 107537U, 107644U, |
| 70054 | 107740U, 107428U, 107513U, 107620U, 107469U, 107554U, 107661U, 107757U, |
| 70055 | 107716U, 63678U, 63700U, 63722U, 63744U, 63689U, 63711U, 63733U, |
| 70056 | 63755U, 107460U, 107545U, 107652U, 107748U, 107680U, 107592U, 107573U, |
| 70057 | 107435U, 107520U, 107627U, 107723U, 107444U, 107529U, 107636U, 107732U, |
| 70058 | 17650U, 163836U, 202027U, 162533U, 200693U, 163184U, 201324U, 5405U, |
| 70059 | 7410U, 1689U, 3956U, 5958U, 7422U, 178312U, 25013U, 163860U, |
| 70060 | 162585U, 21844U, 35131U, 543U, 884U, 152959U, 153396U, 152868U, |
| 70061 | 1534U, 3728U, 44U, 1543U, 3737U, 53U, 153270U, 4766U, |
| 70062 | 154U, 153625U, 191U, 152895U, 215120U, 188023U, 187669U, 188181U, |
| 70063 | 187831U, 191959U, 187842U, 17486U, 3915U, 163879U, 162604U, 17000U, |
| 70064 | 163887U, 162612U, 163236U, 153909U, 153203U, 153558U, 163895U, 162620U, |
| 70065 | 163244U, 153925U, 153219U, 153574U, 153889U, 188116U, 153941U, 188124U, |
| 70066 | 7443U, 3768U, 153991U, 188155U, 41081U, 64054U, 6389U, 196961U, |
| 70067 | 63795U, 6125U, 196256U, 2442U, 6257U, 196453U, 64927U, 198634U, |
| 70068 | 64067U, 6403U, 196974U, 63808U, 6139U, 196278U, 2457U, 6271U, |
| 70069 | 196475U, 64939U, 198646U, 153709U, 152928U, 153354U, 163779U, 162458U, |
| 70070 | 163096U, 153877U, 153179U, 153534U, 163795U, 162474U, 163112U, 153897U, |
| 70071 | 153191U, 153546U, 163811U, 162490U, 163128U, 153685U, 152904U, 153330U, |
| 70072 | 157841U, 153697U, 152916U, 153342U, 157852U, 64158U, 6441U, 197028U, |
| 70073 | 63910U, 6177U, 196340U, 2498U, 6309U, 196563U, 65020U, 198678U, |
| 70074 | 40791U, 64033U, 6357U, 196932U, 63774U, 6093U, 196207U, 2417U, |
| 70075 | 6225U, 196404U, 64908U, 198615U, 64145U, 6427U, 197015U, 63897U, |
| 70076 | 6163U, 196327U, 2483U, 6295U, 196550U, 65008U, 198666U, 7578U, |
| 70077 | 23174U, 24480U, 32375U, 24282U, 17233U, 17213U, 5588U, 2001U, |
| 70078 | 4264U, 5416U, 1710U, 3977U, 163762U, 201994U, 162441U, 200642U, |
| 70079 | 163079U, 201267U, 163913U, 162638U, 163262U, 158549U, 192528U, 65745U, |
| 70080 | 72109U, 65794U, 72158U, 65723U, 72087U, 65782U, 72146U, 5373U, |
| 70081 | 1608U, 3814U, 5951U, 163932U, 38883U, 20755U, 202085U, 40547U, |
| 70082 | 21608U, 162657U, 38250U, 20488U, 200779U, 39974U, 21341U, 163281U, |
| 70083 | 38617U, 20659U, 201426U, 40311U, 21512U, 26690U, 4311U, 7902U, |
| 70084 | 17244U, 175573U, 214313U, 177812U, 216495U, 175915U, 214595U, 178120U, |
| 70085 | 216765U, 175780U, 214473U, 178044U, 216677U, 176058U, 234788U, 214726U, |
| 70086 | 238078U, 178236U, 235167U, 216856U, 238457U, 17007U, 175563U, 214303U, |
| 70087 | 177802U, 216485U, 175905U, 214585U, 178110U, 216755U, 175699U, 214418U, |
| 70088 | 177963U, 216622U, 175965U, 234762U, 214645U, 238052U, 178194U, 235141U, |
| 70089 | 216814U, 238431U, 176526U, 215270U, 175460U, 214200U, 177720U, 216403U, |
| 70090 | 176557U, 215301U, 176510U, 215254U, 176541U, 215285U, 25245U, 24525U, |
| 70091 | 4110U, 196631U, 201544U, 226153U, 196488U, 162883U, 201071U, 163375U, |
| 70092 | 201563U, 215539U, 215523U, 198944U, 215655U, 201332U, 196520U, 163171U, |
| 70093 | 201311U, 29071U, 174780U, 213533U, 175883U, 214563U, 178827U, 217457U, |
| 70094 | 178599U, 217229U, 175033U, 213786U, 175060U, 213813U, 174645U, 213371U, |
| 70095 | 175293U, 214046U, 176901U, 215714U, 174825U, 213578U, 178951U, 217581U, |
| 70096 | 174884U, 213637U, 179050U, 217680U, 178575U, 217205U, 67967U, 74556U, |
| 70097 | 176691U, 215452U, 175426U, 214166U, 174689U, 213415U, 178643U, 217273U, |
| 70098 | 174757U, 213510U, 175809U, 214502U, 178794U, 217424U, 174929U, 213682U, |
| 70099 | 176096U, 214777U, 179098U, 217728U, 74754U, 175271U, 214024U, 178927U, |
| 70100 | 217557U, 178553U, 217183U, 175195U, 213948U, 178879U, 217509U, 178485U, |
| 70101 | 217115U, 68095U, 74729U, 178852U, 217482U, 176274U, 214942U, 179074U, |
| 70102 | 217704U, 175008U, 213761U, 178974U, 217604U, 174977U, 213730U, 213439U, |
| 70103 | 178999U, 217629U, 179147U, 217777U, 178665U, 217295U, 178726U, 217356U, |
| 70104 | 177056U, 215856U, 177338U, 216112U, 178381U, 217011U, 174667U, 213393U, |
| 70105 | 65220U, 71059U, 174733U, 213486U, 175447U, 214187U, 178770U, 217400U, |
| 70106 | 70799U, 175375U, 214115U, 70934U, 177122U, 215922U, 71103U, 178704U, |
| 70107 | 217334U, 70768U, 175150U, 213903U, 71047U, 178348U, 216978U, 70820U, |
| 70108 | 175406U, 214146U, 70955U, 177143U, 215943U, 71124U, 178748U, 217378U, |
| 70109 | 174624U, 213350U, 175217U, 213970U, 176795U, 215594U, 174802U, 213555U, |
| 70110 | 178903U, 217533U, 174859U, 213612U, 179025U, 217655U, 178507U, 217137U, |
| 70111 | 178418U, 217048U, 176937U, 215750U, 176301U, 214969U, 178447U, 217077U, |
| 70112 | 176966U, 215779U, 176330U, 214998U, 177356U, 216130U, 226167U, 226194U, |
| 70113 | 226180U, 226207U, 23275U, 5774U, 3239U, 4999U, 64180U, 197076U, |
| 70114 | 226367U, 41273U, 41205U, 41244U, 69889U, 226411U, 163955U, 202126U, |
| 70115 | 29557U, 226391U, 187530U, 226359U, 5764U, 3219U, 4979U, 195925U, |
| 70116 | 195941U, 63932U, 196388U, 41263U, 41185U, 41224U, 60336U, 60375U, |
| 70117 | 69634U, 226399U, 162689U, 200829U, 28972U, 226375U, 226343U, 3229U, |
| 70118 | 4989U, 195933U, 195949U, 2524U, 196611U, 41195U, 41234U, 60344U, |
| 70119 | 60383U, 69742U, 2643U, 163313U, 201468U, 29103U, 226383U, 226351U, |
| 70120 | 176586U, 215347U, 214754U, 5784U, 3249U, 5009U, 65040U, 198698U, |
| 70121 | 32746U, 41283U, 41215U, 41254U, 70724U, 226423U, 174577U, 32733U, |
| 70122 | 213315U, 32772U, 30029U, 198774U, 175513U, 214253U, 30137U, 198993U, |
| 70123 | 177761U, 216444U, 30247U, 196987U, 39665U, 163716U, 38810U, 201939U, |
| 70124 | 29515U, 196291U, 39449U, 162316U, 38076U, 200517U, 28930U, 196501U, |
| 70125 | 39558U, 162896U, 38443U, 201084U, 29044U, 176720U, 215489U, 176498U, |
| 70126 | 215242U, 216722U, 5361U, 1577U, 33701U, 3756U, 34029U, 1700U, |
| 70127 | 33732U, 3967U, 34090U, 198706U, 174597U, 213323U, 30041U, 199066U, |
| 70128 | 178321U, 216940U, 30288U, 216568U, 198784U, 175636U, 199003U, 177900U, |
| 70129 | 216545U, 198794U, 175679U, 199013U, 177943U, 214363U, 216556U, 174585U, |
| 70130 | 198925U, 196619U, 198906U, 198804U, 199023U, 16905U, 25670U, 187690U, |
| 70131 | 198881U, 215217U, 198894U, 215317U, 196651U, 201594U, 176573U, 163903U, |
| 70132 | 38852U, 162628U, 38219U, 163252U, 38586U, 174568U, 38985U, 7607U, |
| 70133 | 198838U, 176048U, 226435U, 214716U, 30165U, 201581U, 176731U, 215500U, |
| 70134 | 23203U, 176743U, 215512U, 24511U, 215230U, 199057U, 178227U, 226448U, |
| 70135 | 216847U, 30275U, 32404U, 5740U, 3207U, 7261U, 5853U, 3569U, |
| 70136 | 7349U, 5692U, 3183U, 7217U, 32665U, 5805U, 3545U, 7305U, |
| 70137 | 32699U, 5716U, 3195U, 7239U, 5829U, 3557U, 7327U, 198815U, |
| 70138 | 175748U, 214454U, 30151U, 199034U, 178012U, 216658U, 30261U, 215330U, |
| 70139 | 5752U, 7272U, 5865U, 7360U, 5704U, 7228U, 32682U, 5817U, |
| 70140 | 7316U, 32716U, 5728U, 7250U, 5841U, 7338U, 68061U, 74680U, |
| 70141 | 153820U, 37842U, 20275U, 188088U, 39184U, 20956U, 153095U, 37694U, |
| 70142 | 20171U, 187753U, 39036U, 20852U, 153469U, 37768U, 20223U, 187928U, |
| 70143 | 39110U, 20904U, 157870U, 37913U, 20324U, 191940U, 39255U, 21005U, |
| 70144 | 175670U, 214399U, 177934U, 216603U, 175955U, 234749U, 214635U, 238039U, |
| 70145 | 178185U, 235128U, 216805U, 238418U, 176452U, 215134U, 162715U, 38322U, |
| 70146 | 200855U, 40046U, 176462U, 215144U, 163339U, 38689U, 201508U, 40383U, |
| 70147 | 152967U, 153404U, 153766U, 153041U, 729U, 187605U, 3347U, 153279U, |
| 70148 | 5107U, 153634U, 2979U, 433U, 2741U, 4624U, 3080U, 4877U, |
| 70149 | 253U, 2828U, 4711U, 99U, 665U, 226280U, 216884U, 153739U, |
| 70150 | 37829U, 15597U, 20264U, 12733U, 188064U, 39171U, 16137U, 20945U, |
| 70151 | 13151U, 153014U, 37681U, 15517U, 20160U, 12655U, 187729U, 39023U, |
| 70152 | 16057U, 20841U, 13073U, 153450U, 37755U, 15557U, 20212U, 12694U, |
| 70153 | 187904U, 39097U, 16097U, 20893U, 13112U, 157863U, 37901U, 15635U, |
| 70154 | 20314U, 12770U, 191933U, 39243U, 16175U, 20995U, 13188U, 24287U, |
| 70155 | 23162U, 192464U, 24447U, 192515U, 32363U, 193029U, 153957U, 37854U, |
| 70156 | 15607U, 188140U, 39196U, 16147U, 153235U, 37706U, 15527U, 187808U, |
| 70157 | 39048U, 16067U, 153590U, 37780U, 15567U, 188000U, 39122U, 16107U, |
| 70158 | 157876U, 37924U, 15644U, 191946U, 39266U, 16184U, 5650U, 64138U, |
| 70159 | 6433U, 34460U, 9320U, 18357U, 10559U, 36633U, 14853U, 19634U, |
| 70160 | 12046U, 197021U, 39681U, 16381U, 21146U, 13355U, 69864U, 6871U, |
| 70161 | 34760U, 9536U, 18543U, 10739U, 37276U, 15346U, 20003U, 12485U, |
| 70162 | 163845U, 38840U, 15953U, 20731U, 12982U, 202036U, 40519U, 28109U, |
| 70163 | 16751U, 27485U, 21584U, 13620U, 27144U, 27749U, 29543U, 2306U, |
| 70164 | 63890U, 6169U, 60361U, 34292U, 9176U, 18261U, 10439U, 36345U, |
| 70165 | 14633U, 19480U, 11850U, 196311U, 39465U, 16249U, 21058U, 13243U, |
| 70166 | 69585U, 6673U, 34592U, 9392U, 18447U, 10619U, 36988U, 15126U, |
| 70167 | 19849U, 12289U, 162542U, 38178U, 15721U, 20439U, 12840U, 200702U, |
| 70168 | 39917U, 27905U, 16519U, 27305U, 21292U, 13478U, 27000U, 27629U, |
| 70169 | 28958U, 2389U, 2489U, 33838U, 9025U, 18130U, 10314U, 6301U, |
| 70170 | 34376U, 9248U, 18309U, 10499U, 196534U, 39574U, 16315U, 21102U, |
| 70171 | 13299U, 2622U, 33945U, 9103U, 18197U, 10378U, 6772U, 34676U, |
| 70172 | 9464U, 18495U, 10679U, 163193U, 38545U, 15837U, 20610U, 12911U, |
| 70173 | 201349U, 40254U, 28007U, 16635U, 27395U, 21463U, 13549U, 27072U, |
| 70174 | 27689U, 29089U, 6070U, 65002U, 6529U, 36791U, 14985U, 19726U, |
| 70175 | 12165U, 198672U, 39754U, 16442U, 21187U, 13408U, 70702U, 6954U, |
| 70176 | 37434U, 15478U, 20095U, 12604U, 174562U, 38974U, 16028U, 20812U, |
| 70177 | 13035U, 213293U, 40638U, 28206U, 16826U, 27570U, 21665U, 13673U, |
| 70178 | 27213U, 27806U, 30019U, 175721U, 214427U, 177985U, 216631U, 195965U, |
| 70179 | 202115U, 195957U, 200809U, 195973U, 213308U, 7601U, 23197U, 32398U, |
| 70180 | 174772U, 213525U, 175875U, 214555U, 178819U, 217449U, 178588U, 217218U, |
| 70181 | 175022U, 213775U, 178615U, 217245U, 175049U, 213802U, 174637U, 213363U, |
| 70182 | 175285U, 214038U, 176893U, 215706U, 174816U, 213569U, 178942U, 217572U, |
| 70183 | 174874U, 213627U, 179040U, 217670U, 178567U, 217197U, 67956U, 74545U, |
| 70184 | 176683U, 215444U, 175419U, 214159U, 17383U, 174681U, 213407U, 174898U, |
| 70185 | 213651U, 178635U, 217265U, 788U, 832U, 68073U, 74692U, 7565U, |
| 70186 | 67931U, 74509U, 174747U, 213500U, 175799U, 214492U, 177156U, 215956U, |
| 70187 | 178784U, 217414U, 67875U, 74415U, 67903U, 74481U, 174919U, 213672U, |
| 70188 | 176086U, 214767U, 177180U, 215967U, 179088U, 217718U, 67889U, 74429U, |
| 70189 | 67917U, 74495U, 21898U, 162515U, 38163U, 200675U, 39902U, 163153U, |
| 70190 | 38530U, 201293U, 40239U, 162677U, 38280U, 200817U, 40004U, 163301U, |
| 70191 | 38647U, 201456U, 40341U, 71823U, 74254U, 71834U, 74330U, 71845U, |
| 70192 | 74534U, 71870U, 74744U, 28222U, 175349U, 214089U, 178678U, 217308U, |
| 70193 | 175075U, 213828U, 175253U, 214006U, 177094U, 215894U, 176430U, 215098U, |
| 70194 | 178254U, 216874U, 179226U, 217848U, 176703U, 215464U, 176674U, 215435U, |
| 70195 | 175083U, 213836U, 175092U, 213845U, 162222U, 200404U, 162800U, 200969U, |
| 70196 | 176711U, 215472U, 162233U, 200415U, 178264U, 216892U, 177322U, 216096U, |
| 70197 | 174990U, 213743U, 175262U, 214015U, 178917U, 217547U, 178544U, 217174U, |
| 70198 | 179172U, 217802U, 175186U, 213939U, 178869U, 217499U, 178476U, 217106U, |
| 70199 | 175341U, 214081U, 178626U, 217256U, 67763U, 74243U, 67828U, 74319U, |
| 70200 | 67945U, 74523U, 68085U, 74719U, 178840U, 217470U, 176264U, 214932U, |
| 70201 | 174909U, 213662U, 176057U, 214725U, 179065U, 217695U, 174999U, 213752U, |
| 70202 | 176189U, 214870U, 179186U, 217816U, 174839U, 213592U, 175964U, 214644U, |
| 70203 | 178965U, 217595U, 174968U, 213721U, 176135U, 214816U, 179162U, 217792U, |
| 70204 | 213428U, 175230U, 213983U, 176808U, 215607U, 178520U, 217150U, 177071U, |
| 70205 | 215871U, 176407U, 215075U, 177299U, 216073U, 175242U, 213995U, 176820U, |
| 70206 | 215619U, 178532U, 217162U, 177083U, 215883U, 176419U, 215087U, 177311U, |
| 70207 | 216085U, 176983U, 215796U, 178988U, 217618U, 178808U, 217438U, 179137U, |
| 70208 | 217767U, 178656U, 217286U, 175388U, 214128U, 178717U, 217347U, 177046U, |
| 70209 | 215846U, 188102U, 162178U, 200234U, 3627U, 24085U, 187786U, 162140U, |
| 70210 | 200196U, 187970U, 162159U, 200215U, 5354U, 1570U, 163921U, 38867U, |
| 70211 | 20741U, 202074U, 40531U, 21594U, 162646U, 38234U, 20474U, 200768U, |
| 70212 | 39958U, 21327U, 163270U, 38601U, 20645U, 201415U, 40295U, 21498U, |
| 70213 | 5505U, 1898U, 5522U, 1915U, 5398U, 1682U, 3949U, 5539U, |
| 70214 | 1932U, 4202U, 5556U, 1969U, 4239U, 187977U, 5573U, 1986U, |
| 70215 | 177332U, 216106U, 21977U, 633U, 974U, 7398U, 3651U, 622U, |
| 70216 | 963U, 3640U, 32346U, 1035U, 2056U, 4324U, 178372U, 217002U, |
| 70217 | 174658U, 213384U, 65076U, 70781U, 65234U, 71073U, 65245U, 71084U, |
| 70218 | 174724U, 213477U, 175438U, 214178U, 178761U, 217391U, 70906U, 70791U, |
| 70219 | 175367U, 214107U, 70926U, 177114U, 215914U, 71095U, 178696U, 217326U, |
| 70220 | 22034U, 70760U, 175142U, 213895U, 71039U, 178340U, 216970U, 70916U, |
| 70221 | 70812U, 175398U, 214138U, 70947U, 177135U, 215935U, 71116U, 178740U, |
| 70222 | 217370U, 174616U, 213342U, 175209U, 213962U, 176787U, 215586U, 174793U, |
| 70223 | 213546U, 178894U, 217524U, 174849U, 213602U, 179015U, 217645U, 178499U, |
| 70224 | 217129U, 175522U, 214262U, 775U, 25487U, 986U, 920U, 1047U, |
| 70225 | 25502U, 1003U, 935U, 25385U, 31954U, 25337U, 31903U, 25366U, |
| 70226 | 31934U, 5434U, 26839U, 60494U, 32182U, 74571U, 32295U, 60418U, |
| 70227 | 32102U, 74363U, 32215U, 60456U, 32142U, 74442U, 32255U, 60438U, |
| 70228 | 32123U, 74383U, 32236U, 60476U, 32163U, 74462U, 32276U, 25314U, |
| 70229 | 25448U, 32022U, 25458U, 32033U, 16883U, 16926U, 16913U, 16935U, |
| 70230 | 25414U, 25437U, 32010U, 25469U, 32045U, 178303U, 216931U, 8089U, |
| 70231 | 25517U, 1020U, 950U, 60510U, 32199U, 74703U, 32312U, 8148U, |
| 70232 | 24063U, 25287U, 31849U, 25399U, 31969U, 25351U, 31918U, 25325U, |
| 70233 | 31890U, 25425U, 31997U, 25300U, 31863U, 8160U, 26891U, 153366U, |
| 70234 | 187893U, 158482U, 192432U, 178406U, 217036U, 176925U, 215738U, 176993U, |
| 70235 | 215806U, 176289U, 214957U, 178435U, 217065U, 176954U, 215767U, 177007U, |
| 70236 | 215820U, 176318U, 214986U, 60665U, 6004U, 188071U, 162168U, 200224U, |
| 70237 | 3596U, 24078U, 60626U, 5986U, 187736U, 162130U, 200186U, 2369U, |
| 70238 | 5995U, 187911U, 162149U, 200205U, 5346U, 1562U, 5477U, 1870U, |
| 70239 | 5486U, 1879U, 5513U, 1906U, 5390U, 1674U, 3941U, 5530U, |
| 70240 | 1923U, 4193U, 5547U, 1960U, 4230U, 187954U, 5564U, 1977U, |
| 70241 | 1653U, 3903U, 177349U, 216123U, 1193U, 33169U, 8511U, 22319U, |
| 70242 | 35357U, 13853U, 64080U, 36554U, 14786U, 1418U, 33526U, 8812U, |
| 70243 | 22564U, 35742U, 14182U, 69799U, 37197U, 15279U, 1081U, 32987U, |
| 70244 | 8357U, 22193U, 35161U, 13685U, 63832U, 36266U, 14566U, 1298U, |
| 70245 | 33344U, 8658U, 22438U, 35546U, 14014U, 69520U, 36909U, 15059U, |
| 70246 | 1137U, 33078U, 8434U, 22256U, 35259U, 13769U, 63960U, 36384U, |
| 70247 | 14654U, 1362U, 33435U, 8735U, 22501U, 35644U, 14098U, 69662U, |
| 70248 | 37027U, 15147U, 1249U, 33260U, 8588U, 22382U, 35455U, 13937U, |
| 70249 | 64951U, 36718U, 14924U, 1474U, 33617U, 8889U, 22627U, 35840U, |
| 70250 | 14266U, 70645U, 37361U, 15417U, 158880U, 192792U, 159131U, 233691U, |
| 70251 | 192981U, 236849U, 1225U, 33221U, 8555U, 22355U, 35413U, 13901U, |
| 70252 | 64121U, 36606U, 14830U, 1450U, 33578U, 8856U, 22600U, 35798U, |
| 70253 | 14230U, 69847U, 37249U, 15323U, 1113U, 33039U, 8401U, 22229U, |
| 70254 | 35217U, 13733U, 63873U, 36318U, 14610U, 1330U, 33396U, 8702U, |
| 70255 | 22474U, 35602U, 14062U, 69568U, 36961U, 15103U, 1169U, 33130U, |
| 70256 | 8478U, 22292U, 35315U, 13817U, 63992U, 36436U, 14698U, 1394U, |
| 70257 | 33487U, 8779U, 22537U, 35700U, 14146U, 69694U, 37079U, 15191U, |
| 70258 | 1277U, 33308U, 8628U, 22414U, 35507U, 13981U, 64987U, 36766U, |
| 70259 | 14964U, 1502U, 33665U, 8929U, 22659U, 35892U, 14310U, 70687U, |
| 70260 | 37409U, 15457U, 17321U, 3859U, 17339U, 3881U, 25030U, 26572U, |
| 70261 | 70996U, 37458U, 1626U, 3832U, 193007U, 7763U, 26701U, 188054U, |
| 70262 | 187719U, 187883U, 188044U, 187709U, 187873U, 16843U, 24461U, 7858U, |
| 70263 | 24183U, 40746U, 2114U, 4382U, 2140U, 4408U, 2190U, 4467U, |
| 70264 | 2216U, 4493U, 40803U, 2101U, 4369U, 2127U, 4395U, 2177U, |
| 70265 | 4454U, 2203U, 4480U, 25970U, 5582U, 1995U, 4258U, 5417U, |
| 70266 | 1711U, 3978U, 40705U, 26607U, 41105U, 17398U, 1209U, 33195U, |
| 70267 | 8533U, 17781U, 9869U, 22337U, 35385U, 13877U, 18896U, 11122U, |
| 70268 | 64096U, 36580U, 14808U, 19600U, 12003U, 1434U, 33552U, 8834U, |
| 70269 | 17996U, 10144U, 22582U, 35770U, 14206U, 19131U, 11417U, 69815U, |
| 70270 | 37223U, 15301U, 19969U, 12442U, 1097U, 33013U, 8379U, 17671U, |
| 70271 | 9729U, 22211U, 35189U, 13709U, 18776U, 10972U, 63848U, 36292U, |
| 70272 | 14588U, 19446U, 11807U, 1314U, 33370U, 8680U, 17886U, 10004U, |
| 70273 | 22456U, 35574U, 14038U, 19011U, 11267U, 69536U, 36935U, 15081U, |
| 70274 | 19815U, 12246U, 1153U, 33104U, 8456U, 17726U, 9799U, 22274U, |
| 70275 | 35287U, 13793U, 18836U, 11047U, 63976U, 36410U, 14676U, 19512U, |
| 70276 | 11891U, 1378U, 33461U, 8757U, 17941U, 10074U, 22519U, 35672U, |
| 70277 | 14122U, 19071U, 11342U, 69678U, 37053U, 15169U, 19881U, 12330U, |
| 70278 | 1263U, 33284U, 8608U, 17835U, 9938U, 22398U, 35481U, 13959U, |
| 70279 | 18955U, 11196U, 64965U, 36742U, 14944U, 19695U, 12125U, 1488U, |
| 70280 | 33641U, 8909U, 18050U, 10213U, 22643U, 35866U, 14288U, 19190U, |
| 70281 | 11491U, 70659U, 37385U, 15437U, 20064U, 12564U, 1241U, 33247U, |
| 70282 | 8577U, 17814U, 9911U, 22373U, 35441U, 13925U, 18932U, 11167U, |
| 70283 | 64137U, 36632U, 14852U, 19633U, 12045U, 1466U, 33604U, 8878U, |
| 70284 | 18029U, 10186U, 22618U, 35826U, 14254U, 19167U, 11462U, 69863U, |
| 70285 | 37275U, 15345U, 20002U, 12484U, 1129U, 33065U, 8423U, 17704U, |
| 70286 | 9771U, 22247U, 35245U, 13757U, 18812U, 11017U, 63889U, 36344U, |
| 70287 | 14632U, 19479U, 11849U, 1346U, 33422U, 8724U, 17919U, 10046U, |
| 70288 | 22492U, 35630U, 14086U, 19047U, 11312U, 69584U, 36987U, 15125U, |
| 70289 | 19848U, 12288U, 1185U, 33156U, 8500U, 17759U, 9841U, 22310U, |
| 70290 | 35343U, 13841U, 18872U, 11092U, 64008U, 36462U, 14720U, 19545U, |
| 70291 | 11933U, 1410U, 33513U, 8801U, 17974U, 10116U, 22555U, 35728U, |
| 70292 | 14170U, 19107U, 11387U, 69710U, 37105U, 15213U, 19914U, 12372U, |
| 70293 | 1291U, 33332U, 8648U, 17865U, 9977U, 22430U, 35533U, 14003U, |
| 70294 | 18988U, 11238U, 65001U, 36790U, 14984U, 19725U, 12164U, 1516U, |
| 70295 | 33689U, 8949U, 18080U, 10252U, 22675U, 35918U, 14332U, 19223U, |
| 70296 | 11533U, 70701U, 37433U, 15477U, 20094U, 12603U, 63940U, 36370U, |
| 70297 | 69642U, 37013U, 64016U, 36475U, 69750U, 37118U, 65095U, 70842U, |
| 70298 | 65187U, 71005U, 65118U, 228831U, 70865U, 229045U, 65210U, 228846U, |
| 70299 | 71028U, 229060U, 23577U, 158950U, 192800U, 159139U, 233703U, 192989U, |
| 70300 | 236861U, 24332U, 17655U, 7750U, 1217U, 33208U, 8544U, 17792U, |
| 70301 | 9883U, 22346U, 35399U, 13889U, 18908U, 11137U, 64113U, 36593U, |
| 70302 | 14819U, 19611U, 12017U, 1442U, 33565U, 8845U, 18007U, 10158U, |
| 70303 | 22591U, 35784U, 14218U, 19143U, 11432U, 69839U, 37236U, 15312U, |
| 70304 | 19980U, 12456U, 1105U, 33026U, 8390U, 17682U, 9743U, 22220U, |
| 70305 | 35203U, 13721U, 18788U, 10987U, 63865U, 36305U, 14599U, 19457U, |
| 70306 | 11821U, 1322U, 33383U, 8691U, 17897U, 10018U, 22465U, 35588U, |
| 70307 | 14050U, 19023U, 11282U, 69560U, 36948U, 15092U, 19826U, 12260U, |
| 70308 | 1161U, 33117U, 8467U, 17737U, 9813U, 22283U, 35301U, 13805U, |
| 70309 | 18848U, 11062U, 63984U, 36423U, 14687U, 19523U, 11905U, 1386U, |
| 70310 | 33474U, 8768U, 17952U, 10088U, 22528U, 35686U, 14134U, 19083U, |
| 70311 | 11357U, 69686U, 37066U, 15180U, 19892U, 12344U, 1270U, 33296U, |
| 70312 | 8618U, 17845U, 9951U, 22406U, 35494U, 13970U, 18966U, 11210U, |
| 70313 | 64980U, 36754U, 14954U, 19705U, 12138U, 1495U, 33653U, 8919U, |
| 70314 | 18060U, 10226U, 22651U, 35879U, 14299U, 19201U, 11505U, 70680U, |
| 70315 | 37397U, 15447U, 20074U, 12577U, 162733U, 38350U, 200873U, 40074U, |
| 70316 | 163357U, 38717U, 201526U, 40411U, 24341U, 5595U, 64025U, 6348U, |
| 70317 | 34389U, 9259U, 36489U, 14731U, 196924U, 39600U, 16325U, 69759U, |
| 70318 | 6806U, 34689U, 9475U, 37132U, 15224U, 163675U, 38745U, 15885U, |
| 70319 | 201890U, 40439U, 28023U, 16683U, 27409U, 29455U, 2251U, 63766U, |
| 70320 | 6084U, 34221U, 9115U, 36201U, 14511U, 196199U, 39382U, 16193U, |
| 70321 | 69469U, 6608U, 34521U, 9331U, 36844U, 15004U, 162244U, 38011U, |
| 70322 | 15653U, 200426U, 39765U, 27819U, 16451U, 27229U, 28870U, 2324U, |
| 70323 | 2407U, 33762U, 8959U, 6216U, 34305U, 9187U, 196396U, 39491U, |
| 70324 | 16259U, 2560U, 33869U, 9037U, 6707U, 34605U, 9403U, 162811U, |
| 70325 | 38378U, 15769U, 200980U, 40102U, 27921U, 16567U, 27319U, 28984U, |
| 70326 | 6013U, 64901U, 6480U, 36658U, 14874U, 198608U, 39693U, 16391U, |
| 70327 | 70610U, 6905U, 37301U, 15367U, 174506U, 38913U, 15977U, 213231U, |
| 70328 | 40577U, 28125U, 16775U, 27499U, 29951U, 7572U, 23168U, 24474U, |
| 70329 | 32369U, 23020U, 25479U, 25980U, 2073U, 4341U, 22085U, 17546U, |
| 70330 | 157889U, 37947U, 191968U, 39289U, 41145U, 157896U, 191975U, 17014U, |
| 70331 | 153917U, 153211U, 153566U, 162187U, 200355U, 162751U, 200891U, 176440U, |
| 70332 | 215108U, 65806U, 72170U, 162209U, 200391U, 162773U, 200927U, 162786U, |
| 70333 | 200955U, 1201U, 33182U, 8522U, 17770U, 9855U, 22328U, 35371U, |
| 70334 | 13865U, 18884U, 11107U, 64088U, 36567U, 14797U, 19589U, 11989U, |
| 70335 | 1426U, 33539U, 8823U, 17985U, 10130U, 22573U, 35756U, 14194U, |
| 70336 | 19119U, 11402U, 69807U, 37210U, 15290U, 19958U, 12428U, 1089U, |
| 70337 | 33000U, 8368U, 17660U, 9715U, 22202U, 35175U, 13697U, 18764U, |
| 70338 | 10957U, 63840U, 36279U, 14577U, 19435U, 11793U, 1306U, 33357U, |
| 70339 | 8669U, 17875U, 9990U, 22447U, 35560U, 14026U, 18999U, 11252U, |
| 70340 | 69528U, 36922U, 15070U, 19804U, 12232U, 1145U, 33091U, 8445U, |
| 70341 | 17715U, 9785U, 22265U, 35273U, 13781U, 18824U, 11032U, 63968U, |
| 70342 | 36397U, 14665U, 19501U, 11877U, 1370U, 33448U, 8746U, 17930U, |
| 70343 | 10060U, 22510U, 35658U, 14110U, 19059U, 11327U, 69670U, 37040U, |
| 70344 | 15158U, 19870U, 12316U, 1256U, 33272U, 8598U, 17825U, 9925U, |
| 70345 | 22390U, 35468U, 13948U, 18944U, 11182U, 64958U, 36730U, 14934U, |
| 70346 | 19685U, 12112U, 1481U, 33629U, 8899U, 18040U, 10200U, 22635U, |
| 70347 | 35853U, 14277U, 19179U, 11477U, 70652U, 37373U, 15427U, 20054U, |
| 70348 | 12551U, 22727U, 35995U, 14399U, 19290U, 11615U, 7005U, 34837U, |
| 70349 | 9603U, 18610U, 10821U, 22793U, 36091U, 14483U, 19374U, 11717U, |
| 70350 | 7119U, 34965U, 9687U, 18722U, 10923U, 22683U, 35931U, 14343U, |
| 70351 | 19234U, 11547U, 6961U, 34773U, 9547U, 18554U, 10753U, 22749U, |
| 70352 | 36027U, 14427U, 19318U, 11649U, 7027U, 34869U, 9631U, 18638U, |
| 70353 | 10855U, 22705U, 35963U, 14371U, 19262U, 11581U, 6983U, 34805U, |
| 70354 | 9575U, 18582U, 10787U, 22771U, 36059U, 14455U, 19346U, 11683U, |
| 70355 | 7073U, 34917U, 9659U, 18680U, 10889U, 162706U, 38308U, 200846U, |
| 70356 | 40032U, 163330U, 38675U, 201499U, 40369U, 1233U, 33234U, 8566U, |
| 70357 | 17803U, 9897U, 22364U, 35427U, 13913U, 18920U, 11152U, 64129U, |
| 70358 | 36619U, 14841U, 19622U, 12031U, 1458U, 33591U, 8867U, 18018U, |
| 70359 | 10172U, 22609U, 35812U, 14242U, 19155U, 11447U, 69855U, 37262U, |
| 70360 | 15334U, 19991U, 12470U, 1121U, 33052U, 8412U, 17693U, 9757U, |
| 70361 | 22238U, 35231U, 13745U, 18800U, 11002U, 63881U, 36331U, 14621U, |
| 70362 | 19468U, 11835U, 1338U, 33409U, 8713U, 17908U, 10032U, 22483U, |
| 70363 | 35616U, 14074U, 19035U, 11297U, 69576U, 36974U, 15114U, 19837U, |
| 70364 | 12274U, 1177U, 33143U, 8489U, 17748U, 9827U, 22301U, 35329U, |
| 70365 | 13829U, 18860U, 11077U, 64000U, 36449U, 14709U, 19534U, 11919U, |
| 70366 | 1402U, 33500U, 8790U, 17963U, 10102U, 22546U, 35714U, 14158U, |
| 70367 | 19095U, 11372U, 69702U, 37092U, 15202U, 19903U, 12358U, 1284U, |
| 70368 | 33320U, 8638U, 17855U, 9964U, 22422U, 35520U, 13992U, 18977U, |
| 70369 | 11224U, 64994U, 36778U, 14974U, 19715U, 12151U, 1509U, 33677U, |
| 70370 | 8939U, 18070U, 10239U, 22667U, 35905U, 14321U, 19212U, 11519U, |
| 70371 | 70694U, 37421U, 15467U, 20084U, 12590U, 22738U, 36011U, 14413U, |
| 70372 | 19304U, 11632U, 7016U, 34853U, 9617U, 18624U, 10838U, 22804U, |
| 70373 | 36107U, 14497U, 19388U, 11734U, 7130U, 34981U, 9701U, 18736U, |
| 70374 | 10940U, 22694U, 35947U, 14357U, 19248U, 11564U, 6972U, 34789U, |
| 70375 | 9561U, 18568U, 10770U, 22760U, 36043U, 14441U, 19332U, 11666U, |
| 70376 | 7038U, 34885U, 9645U, 18652U, 10872U, 22716U, 35979U, 14385U, |
| 70377 | 19276U, 11598U, 6994U, 34821U, 9589U, 18596U, 10804U, 22782U, |
| 70378 | 36075U, 14469U, 19360U, 11700U, 7084U, 34933U, 9673U, 18694U, |
| 70379 | 10906U, 162742U, 38364U, 200882U, 40088U, 163366U, 38731U, 201535U, |
| 70380 | 40425U, 67798U, 74289U, 67995U, 74600U, 153933U, 153227U, 153582U, |
| 70381 | 26057U, 153949U, 188132U, 187800U, 187992U, 7450U, 3777U, 153999U, |
| 70382 | 188163U, 187823U, 188015U, 158303U, 192253U, 158951U, 192801U, 158474U, |
| 70383 | 233468U, 192424U, 236626U, 159140U, 233704U, 192990U, 236862U, 21768U, |
| 70384 | 3406U, 5166U, 492U, 40864U, 7683U, 21906U, 7864U, 16922U, |
| 70385 | 22062U, 22119U, 25022U, 7589U, 23185U, 24486U, 32386U, 188109U, |
| 70386 | 187793U, 187985U, 158554U, 21854U, 35146U, 22139U, 152997U, 153433U, |
| 70387 | 153120U, 153485U, 152876U, 215480U, 153311U, 153666U, 3018U, 2779U, |
| 70388 | 4662U, 153169U, 153524U, 2931U, 152885U, 2705U, 4588U, 215127U, |
| 70389 | 5604U, 64038U, 6362U, 34403U, 9271U, 18320U, 10513U, 36502U, |
| 70390 | 14742U, 19556U, 11947U, 196937U, 39613U, 16336U, 21112U, 13312U, |
| 70391 | 69767U, 6815U, 34703U, 9487U, 18506U, 10693U, 37145U, 15235U, |
| 70392 | 19925U, 12386U, 163683U, 38758U, 15896U, 20685U, 12924U, 201898U, |
| 70393 | 40452U, 28040U, 16694U, 27424U, 21538U, 13562U, 27089U, 27703U, |
| 70394 | 29467U, 2260U, 63779U, 6098U, 34235U, 9127U, 18224U, 10393U, |
| 70395 | 36214U, 14522U, 19402U, 11751U, 196212U, 39395U, 16204U, 21024U, |
| 70396 | 13200U, 69477U, 6617U, 34535U, 9343U, 18410U, 10573U, 36857U, |
| 70397 | 15015U, 19771U, 12190U, 162252U, 38024U, 15664U, 20343U, 12782U, |
| 70398 | 200434U, 39778U, 27836U, 16462U, 27244U, 21196U, 13420U, 26945U, |
| 70399 | 27583U, 28882U, 2333U, 2422U, 33777U, 8972U, 18090U, 10265U, |
| 70400 | 6230U, 34319U, 9199U, 18272U, 10453U, 196409U, 39504U, 16270U, |
| 70401 | 21068U, 13256U, 2570U, 33884U, 9050U, 18157U, 10329U, 6716U, |
| 70402 | 34619U, 9415U, 18458U, 10633U, 162819U, 38391U, 15780U, 20514U, |
| 70403 | 12853U, 200988U, 40115U, 27938U, 16578U, 27334U, 21367U, 13491U, |
| 70404 | 27017U, 27643U, 28996U, 6020U, 64913U, 6488U, 36670U, 14884U, |
| 70405 | 19655U, 12073U, 198620U, 39705U, 16401U, 21156U, 13368U, 70617U, |
| 70406 | 6913U, 37313U, 15377U, 20024U, 12512U, 174513U, 38925U, 15987U, |
| 70407 | 20781U, 12995U, 213238U, 40589U, 28141U, 16785U, 27513U, 21634U, |
| 70408 | 13633U, 27161U, 27763U, 29962U, 175535U, 214275U, 177774U, 216457U, |
| 70409 | 152976U, 153413U, 153776U, 153051U, 740U, 187636U, 153289U, 153644U, |
| 70410 | 2991U, 2753U, 4636U, 3093U, 4890U, 266U, 2841U, 4724U, |
| 70411 | 112U, 675U, 175896U, 234694U, 214576U, 237984U, 178101U, 235073U, |
| 70412 | 216746U, 238363U, 152940U, 153377U, 153746U, 153021U, 707U, 187585U, |
| 70413 | 3270U, 153250U, 5030U, 153605U, 2943U, 356U, 2717U, 4600U, |
| 70414 | 3054U, 4851U, 227U, 2802U, 4685U, 73U, 645U, 25226U, |
| 70415 | 23044U, 24672U, 26071U, 4280U, 25999U, 4271U, 162288U, 200470U, |
| 70416 | 162855U, 201024U, 776U, 25488U, 987U, 32909U, 36146U, 921U, |
| 70417 | 32854U, 32837U, 1048U, 25503U, 1004U, 32930U, 36165U, 936U, |
| 70418 | 32873U, 32970U, 60352U, 4528U, 7698U, 7712U, 158504U, 4968U, |
| 70419 | 32785U, 192490U, 5253U, 32800U, 25372U, 25338U, 25367U, 5435U, |
| 70420 | 63667U, 4539U, 60293U, 60308U, 65147U, 4552U, 70894U, 4575U, |
| 70421 | 152831U, 60495U, 74572U, 60419U, 74364U, 60457U, 74443U, 60439U, |
| 70422 | 74384U, 60477U, 74463U, 23013U, 25315U, 25449U, 25459U, 16884U, |
| 70423 | 16927U, 16914U, 16936U, 25415U, 25438U, 25470U, 5658U, 64171U, |
| 70424 | 197064U, 69880U, 202106U, 2314U, 63923U, 196376U, 69625U, 200800U, |
| 70425 | 2397U, 2513U, 196599U, 2632U, 201447U, 6076U, 65032U, 198690U, |
| 70426 | 70716U, 213300U, 22137U, 8090U, 25518U, 1021U, 32951U, 36184U, |
| 70427 | 951U, 32892U, 35077U, 60511U, 74704U, 17357U, 8149U, 35092U, |
| 70428 | 24064U, 7833U, 2229U, 4506U, 3493U, 5264U, 2027U, 3504U, |
| 70429 | 5275U, 2039U, 2240U, 4517U, 25288U, 17382U, 24107U, 21775U, |
| 70430 | 3416U, 5176U, 502U, 25400U, 25352U, 25326U, 25426U, 25301U, |
| 70431 | 8161U, 163942U, 38898U, 20768U, 202095U, 40562U, 21621U, 162667U, |
| 70432 | 38265U, 20501U, 200789U, 39989U, 21354U, 163291U, 38632U, 20672U, |
| 70433 | 201436U, 40326U, 21525U, 162407U, 200608U, 163045U, 201233U, 874U, |
| 70434 | 175934U, 234720U, 214614U, 238010U, 178164U, 235099U, 216784U, 238389U, |
| 70435 | 192480U, 192449U, 192499U, 192471U, 3481U, 5241U, 520U, 3534U, |
| 70436 | 5305U, 532U, 192441U, 158498U, 192458U, 158520U, 192509U, 159182U, |
| 70437 | 193023U, 25974U, 5466U, 1859U, 4143U, 26050U, 175624U, 214351U, |
| 70438 | 177888U, 216533U, 175658U, 214387U, 177922U, 216591U, 70995U, 37457U, |
| 70439 | 216141U, 40649U, 195980U, 39301U, 216150U, 40663U, 177831U, 124237U, |
| 70440 | 290536U, 178129U, 124264U, 290565U, 177843U, 124250U, 290550U, 178141U, |
| 70441 | 124277U, 290579U, 4421U, 2017U, 169499U, 50865U, 86434U, 254264U, |
| 70442 | 119227U, 285519U, 207914U, 142461U, 307389U, 164246U, 47378U, 82783U, |
| 70443 | 250553U, 114016U, 280290U, 202329U, 136747U, 301628U, 182429U, 54285U, |
| 70444 | 90014U, 257900U, 124557U, 290875U, 220725U, 148093U, 313064U, 179997U, |
| 70445 | 218605U, 170651U, 51440U, 87043U, 254870U, 120389U, 286627U, 209208U, |
| 70446 | 143786U, 308670U, 165411U, 47967U, 83407U, 251175U, 115192U, 281413U, |
| 70447 | 203636U, 138086U, 302924U, 183418U, 54769U, 90533U, 258423U, 125557U, |
| 70448 | 291845U, 221791U, 59014U, 94440U, 262495U, 149186U, 314135U, 175592U, |
| 70449 | 214332U, 171521U, 52128U, 87753U, 255587U, 121212U, 287468U, 210096U, |
| 70450 | 144712U, 309620U, 166286U, 48670U, 84133U, 251909U, 116050U, 282291U, |
| 70451 | 204557U, 139047U, 303911U, 184369U, 55337U, 91127U, 259031U, 126306U, |
| 70452 | 292624U, 222793U, 59259U, 94677U, 262749U, 150020U, 315005U, 181323U, |
| 70453 | 219743U, 173293U, 53711U, 89406U, 257258U, 123037U, 289331U, 211874U, |
| 70454 | 146556U, 311503U, 168071U, 50267U, 85801U, 253596U, 117889U, 284169U, |
| 70455 | 206348U, 140905U, 305809U, 186284U, 56655U, 92519U, 260454U, 127897U, |
| 70456 | 294272U, 224759U, 59965U, 95405U, 263524U, 151627U, 316670U, 177856U, |
| 70457 | 216514U, 183833U, 235559U, 231805U, 242231U, 222215U, 238849U, 227966U, |
| 70458 | 230272U, 240716U, 232930U, 243419U, 175924U, 234706U, 214604U, 237996U, |
| 70459 | 184573U, 235813U, 231931U, 242365U, 222997U, 239103U, 228221U, 230425U, |
| 70460 | 240878U, 233056U, 243553U, 186768U, 236283U, 232057U, 242499U, 225267U, |
| 70461 | 239573U, 228704U, 230578U, 241040U, 233182U, 243687U, 178154U, 235085U, |
| 70462 | 216774U, 238375U, 179930U, 218538U, 175531U, 214271U, 181256U, 219676U, |
| 70463 | 177770U, 216453U, 181554U, 219945U, 173749U, 212286U, 168513U, 206774U, |
| 70464 | 186892U, 225391U, 178274U, 216902U, 179704U, 218326U, 170190U, 208742U, |
| 70465 | 164937U, 203157U, 183040U, 221408U, 175102U, 213855U, 181569U, 219960U, |
| 70466 | 173767U, 212304U, 168531U, 206792U, 186907U, 225406U, 178288U, 216916U, |
| 70467 | 179715U, 218337U, 170204U, 208756U, 164951U, 203171U, 183051U, 221419U, |
| 70468 | 175122U, 213875U, 175112U, 213865U, 169304U, 207719U, 62481U, 97625U, |
| 70469 | 265481U, 67106U, 101185U, 268501U, 73586U, 105532U, 272034U, 61760U, |
| 70470 | 96864U, 264820U, 66212U, 100318U, 267783U, 72660U, 104665U, 271316U, |
| 70471 | 63236U, 98424U, 266187U, 68690U, 102224U, 269412U, 75505U, 106723U, |
| 70472 | 273105U, 62812U, 97975U, 265781U, 67436U, 101516U, 268786U, 73916U, |
| 70473 | 105863U, 272319U, 62091U, 97214U, 265120U, 66542U, 100649U, 268068U, |
| 70474 | 72990U, 104996U, 271601U, 63510U, 98717U, 266442U, 69113U, 102591U, |
| 70475 | 269751U, 75940U, 107090U, 273444U, 180080U, 218687U, 170831U, 51567U, |
| 70476 | 87178U, 255013U, 120533U, 286780U, 209343U, 143930U, 308823U, 165577U, |
| 70477 | 48109U, 83558U, 251335U, 115351U, 281582U, 203785U, 138245U, 303093U, |
| 70478 | 183551U, 54884U, 90657U, 258556U, 125686U, 291984U, 221910U, 149315U, |
| 70479 | 314274U, 175688U, 214407U, 181417U, 219836U, 173473U, 53838U, 89541U, |
| 70480 | 257401U, 123181U, 289484U, 212009U, 146700U, 311656U, 168237U, 50409U, |
| 70481 | 85952U, 253756U, 118048U, 284338U, 206497U, 141064U, 305978U, 186417U, |
| 70482 | 56770U, 92643U, 260587U, 128026U, 294411U, 224902U, 151756U, 316809U, |
| 70483 | 177952U, 216611U, 180007U, 218615U, 170680U, 51454U, 87058U, 254886U, |
| 70484 | 120420U, 286660U, 209237U, 143817U, 308703U, 165440U, 47981U, 83422U, |
| 70485 | 251191U, 115223U, 281446U, 203665U, 138117U, 302957U, 183441U, 54780U, |
| 70486 | 90545U, 258436U, 125582U, 291872U, 221814U, 149211U, 314162U, 175601U, |
| 70487 | 214341U, 181333U, 219753U, 173322U, 53725U, 89421U, 257274U, 123068U, |
| 70488 | 289364U, 211903U, 146587U, 311536U, 168100U, 50281U, 85816U, 253612U, |
| 70489 | 117920U, 284202U, 206377U, 140936U, 305842U, 186307U, 56666U, 92531U, |
| 70490 | 260467U, 127922U, 294299U, 224782U, 151652U, 316697U, 177865U, 216523U, |
| 70491 | 25204U, 181108U, 177617U, 181202U, 177705U, 170815U, 51550U, 87160U, |
| 70492 | 254994U, 120516U, 286762U, 209327U, 143913U, 308805U, 165547U, 48077U, |
| 70493 | 83524U, 251299U, 115319U, 281548U, 203755U, 138213U, 303059U, 183527U, |
| 70494 | 54858U, 90629U, 258526U, 125660U, 291956U, 221886U, 149289U, 314246U, |
| 70495 | 173457U, 53821U, 89523U, 257382U, 123164U, 289466U, 211993U, 146683U, |
| 70496 | 311638U, 168207U, 50377U, 85918U, 253720U, 118016U, 284304U, 206467U, |
| 70497 | 141032U, 305944U, 186393U, 56744U, 92615U, 260557U, 128000U, 294383U, |
| 70498 | 224878U, 151730U, 316781U, 68163U, 74822U, 67785U, 74276U, 68227U, |
| 70499 | 74886U, 67982U, 74587U, 200316U, 226304U, 200256U, 226234U, 200330U, |
| 70500 | 226318U, 200279U, 226257U, 169270U, 163995U, 113785U, 280048U, 202166U, |
| 70501 | 136608U, 301482U, 182050U, 124319U, 290624U, 220431U, 147975U, 312939U, |
| 70502 | 164131U, 113911U, 280180U, 182294U, 124427U, 290738U, 182637U, 124765U, |
| 70503 | 291097U, 164039U, 113831U, 280096U, 182088U, 124359U, 290666U, 182332U, |
| 70504 | 124467U, 290780U, 169287U, 169358U, 119111U, 285397U, 207773U, 142345U, |
| 70505 | 307267U, 164017U, 113808U, 280072U, 202188U, 136631U, 301506U, 182069U, |
| 70506 | 124339U, 290645U, 220450U, 147995U, 312960U, 164153U, 113934U, 280204U, |
| 70507 | 182313U, 124447U, 290759U, 182656U, 124785U, 291118U, 164061U, 113854U, |
| 70508 | 280120U, 182107U, 124379U, 290687U, 182351U, 124487U, 290801U, 180272U, |
| 70509 | 218837U, 165770U, 115522U, 281748U, 204025U, 138502U, 303350U, 183910U, |
| 70510 | 125863U, 292162U, 222307U, 149563U, 314528U, 181538U, 219929U, 173730U, |
| 70511 | 123436U, 289754U, 212267U, 146974U, 311946U, 168494U, 118303U, 284608U, |
| 70512 | 206755U, 141338U, 306268U, 186834U, 128278U, 294681U, 225333U, 152024U, |
| 70513 | 317096U, 178202U, 216822U, 62323U, 97459U, 66927U, 100996U, 73407U, |
| 70514 | 105343U, 61602U, 96698U, 66033U, 100129U, 72481U, 104476U, 63102U, |
| 70515 | 98282U, 68495U, 102029U, 75262U, 106490U, 68188U, 74847U, 62603U, |
| 70516 | 97754U, 67221U, 101307U, 73701U, 105654U, 61882U, 96993U, 66327U, |
| 70517 | 100440U, 72775U, 104787U, 63337U, 98532U, 68784U, 102325U, 75599U, |
| 70518 | 41355U, 76402U, 106824U, 67817U, 74308U, 62709U, 97866U, 67321U, |
| 70519 | 101413U, 73801U, 105760U, 61988U, 97105U, 66427U, 100546U, 72875U, |
| 70520 | 104893U, 63425U, 98626U, 68963U, 102475U, 75790U, 41492U, 76548U, |
| 70521 | 106974U, 68262U, 74921U, 62950U, 98121U, 67582U, 101671U, 74062U, |
| 70522 | 106018U, 62229U, 97360U, 66688U, 100804U, 73136U, 105151U, 63624U, |
| 70523 | 98839U, 69244U, 102719U, 76083U, 41629U, 76694U, 107218U, 68014U, |
| 70524 | 74619U, 68895U, 228959U, 230752U, 75722U, 229173U, 226621U, 229337U, |
| 70525 | 230917U, 67838U, 228860U, 74340U, 229074U, 69033U, 228994U, 230789U, |
| 70526 | 75860U, 229208U, 226658U, 229376U, 230954U, 69357U, 229029U, 230826U, |
| 70527 | 76211U, 229243U, 226695U, 229415U, 230991U, 68037U, 228908U, 74656U, |
| 70528 | 229122U, 182480U, 235419U, 220776U, 238709U, 183868U, 235589U, 222250U, |
| 70529 | 238879U, 59096U, 175944U, 234734U, 214624U, 238024U, 184608U, 235843U, |
| 70530 | 223032U, 239133U, 59368U, 186803U, 236313U, 225302U, 239603U, 60179U, |
| 70531 | 178174U, 235113U, 216794U, 238403U, 198162U, 135765U, 209395U, 143986U, |
| 70532 | 308883U, 197400U, 135185U, 203837U, 138301U, 303153U, 199752U, 136294U, |
| 70533 | 221950U, 149359U, 314322U, 198453U, 135917U, 212061U, 146756U, 311716U, |
| 70534 | 197663U, 135337U, 206549U, 141120U, 306038U, 200051U, 136441U, 224942U, |
| 70535 | 151800U, 316857U, 235676U, 238966U, 228076U, 235930U, 239220U, 228331U, |
| 70536 | 236400U, 239690U, 228814U, 172766U, 53186U, 88853U, 256677U, 122480U, |
| 70537 | 288744U, 211347U, 145999U, 310916U, 167544U, 49742U, 85248U, 253015U, |
| 70538 | 117332U, 283582U, 205821U, 140348U, 305222U, 185847U, 56214U, 92050U, |
| 70539 | 259957U, 127430U, 293775U, 224322U, 151160U, 316173U, 169608U, 50964U, |
| 70540 | 86539U, 254375U, 119343U, 285642U, 208023U, 142577U, 307512U, 164355U, |
| 70541 | 47477U, 82888U, 250664U, 114132U, 280413U, 202438U, 136863U, 301751U, |
| 70542 | 182531U, 54366U, 90101U, 257993U, 124652U, 290977U, 220827U, 148188U, |
| 70543 | 313166U, 172825U, 53248U, 88918U, 256745U, 122542U, 288809U, 211406U, |
| 70544 | 146061U, 310981U, 167603U, 49804U, 85313U, 253083U, 117394U, 283647U, |
| 70545 | 205880U, 140410U, 305287U, 185897U, 56267U, 92106U, 260016U, 127483U, |
| 70546 | 293831U, 224372U, 151213U, 316229U, 169664U, 51023U, 86601U, 254440U, |
| 70547 | 119402U, 285704U, 208079U, 142636U, 307574U, 164411U, 47536U, 82950U, |
| 70548 | 250729U, 114191U, 280475U, 202494U, 136922U, 301813U, 182578U, 54416U, |
| 70549 | 90154U, 258049U, 124702U, 291030U, 220874U, 148238U, 313219U, 174454U, |
| 70550 | 54180U, 89903U, 257783U, 124155U, 290449U, 213099U, 147808U, 312763U, |
| 70551 | 169218U, 50751U, 86314U, 254138U, 119022U, 285303U, 207587U, 142172U, |
| 70552 | 307085U, 187456U, 57052U, 92945U, 260909U, 128873U, 295265U, 226042U, |
| 70553 | 60247U, 95680U, 263817U, 152713U, 317781U, 172904U, 53331U, 89005U, |
| 70554 | 256836U, 122625U, 288896U, 211485U, 146144U, 311068U, 167682U, 49887U, |
| 70555 | 85400U, 253174U, 117477U, 283734U, 205959U, 140493U, 305374U, 185964U, |
| 70556 | 56338U, 92181U, 260095U, 127554U, 293906U, 224439U, 151284U, 316304U, |
| 70557 | 173014U, 53447U, 89127U, 256964U, 122741U, 289018U, 211595U, 146260U, |
| 70558 | 311190U, 167792U, 50003U, 85522U, 253302U, 117593U, 283856U, 206069U, |
| 70559 | 140609U, 305496U, 186056U, 56436U, 92285U, 260205U, 127652U, 294010U, |
| 70560 | 224531U, 151382U, 316408U, 172785U, 53206U, 88874U, 256699U, 122500U, |
| 70561 | 288765U, 211366U, 146019U, 310937U, 167563U, 49762U, 85269U, 253037U, |
| 70562 | 117352U, 283603U, 205840U, 140368U, 305243U, 185863U, 56231U, 92068U, |
| 70563 | 259976U, 127447U, 293793U, 224338U, 151177U, 316191U, 169626U, 50983U, |
| 70564 | 86559U, 254396U, 119362U, 285662U, 208041U, 142596U, 307532U, 164373U, |
| 70565 | 47496U, 82908U, 250685U, 114151U, 280433U, 202456U, 136882U, 301771U, |
| 70566 | 182546U, 54382U, 90118U, 258011U, 124668U, 290994U, 220842U, 148204U, |
| 70567 | 313183U, 172844U, 53268U, 88939U, 256767U, 122562U, 288830U, 211425U, |
| 70568 | 146081U, 311002U, 167622U, 49824U, 85334U, 253105U, 117414U, 283668U, |
| 70569 | 205899U, 140430U, 305308U, 185913U, 56284U, 92124U, 260035U, 127500U, |
| 70570 | 293849U, 224388U, 151230U, 316247U, 169682U, 51042U, 86621U, 254461U, |
| 70571 | 119421U, 285724U, 208097U, 142655U, 307594U, 164429U, 47555U, 82970U, |
| 70572 | 250750U, 114210U, 280495U, 202512U, 136941U, 301833U, 182593U, 54432U, |
| 70573 | 90171U, 258067U, 124718U, 291047U, 220889U, 148254U, 313236U, 179893U, |
| 70574 | 218501U, 170498U, 51292U, 86886U, 254704U, 120226U, 286454U, 209055U, |
| 70575 | 143623U, 308497U, 165258U, 47819U, 83250U, 251009U, 115029U, 281240U, |
| 70576 | 203483U, 137923U, 302751U, 183295U, 54648U, 90403U, 258284U, 125424U, |
| 70577 | 291702U, 221668U, 149053U, 313992U, 175488U, 214228U, 171352U, 51948U, |
| 70578 | 87562U, 255385U, 121032U, 287277U, 209911U, 144515U, 309411U, 166117U, |
| 70579 | 48490U, 83942U, 251707U, 115870U, 282100U, 204372U, 138850U, 303702U, |
| 70580 | 184233U, 55190U, 90969U, 258862U, 126159U, 292466U, 222644U, 59122U, |
| 70581 | 94530U, 262592U, 149859U, 314832U, 181232U, 219652U, 173156U, 53580U, |
| 70582 | 89267U, 257111U, 122891U, 289176U, 211737U, 146410U, 311348U, 167934U, |
| 70583 | 50136U, 85662U, 253449U, 117743U, 284014U, 206211U, 140759U, 305654U, |
| 70584 | 186174U, 56548U, 92404U, 260331U, 127778U, 294144U, 224649U, 59896U, |
| 70585 | 95331U, 263445U, 151508U, 316542U, 177748U, 216431U, 171319U, 120997U, |
| 70586 | 287240U, 209878U, 144480U, 309374U, 166084U, 115835U, 282063U, 204339U, |
| 70587 | 138815U, 303665U, 184206U, 126130U, 292435U, 222617U, 149830U, 314801U, |
| 70588 | 169443U, 50806U, 86372U, 254199U, 119168U, 285457U, 207858U, 142402U, |
| 70589 | 307327U, 164190U, 47319U, 82721U, 250488U, 113957U, 280228U, 202273U, |
| 70590 | 136688U, 301566U, 182382U, 54235U, 89961U, 257844U, 124507U, 290822U, |
| 70591 | 220678U, 148043U, 313011U, 181090U, 177600U, 181157U, 177663U, 181126U, |
| 70592 | 177634U, 181173U, 177678U, 179431U, 218053U, 169464U, 50828U, 86395U, |
| 70593 | 254223U, 119190U, 285480U, 207879U, 142424U, 307350U, 164211U, 47341U, |
| 70594 | 82744U, 250512U, 113979U, 280251U, 202294U, 136710U, 301589U, 182400U, |
| 70595 | 54254U, 89981U, 257865U, 124526U, 290842U, 220696U, 148062U, 313031U, |
| 70596 | 163726U, 201949U, 180632U, 219196U, 171754U, 52279U, 87914U, 255758U, |
| 70597 | 121461U, 287733U, 210351U, 144961U, 309885U, 166519U, 48821U, 84294U, |
| 70598 | 252080U, 116299U, 282556U, 204812U, 139296U, 304176U, 185017U, 55458U, |
| 70599 | 91258U, 259172U, 126583U, 292923U, 223505U, 59395U, 94797U, 262878U, |
| 70600 | 150297U, 315304U, 176844U, 215643U, 171336U, 51931U, 87544U, 255366U, |
| 70601 | 121015U, 287259U, 209895U, 144498U, 309393U, 166101U, 48473U, 83924U, |
| 70602 | 251688U, 115853U, 282082U, 204356U, 138833U, 303684U, 184220U, 55176U, |
| 70603 | 90954U, 258846U, 126145U, 292451U, 222631U, 59108U, 94515U, 262576U, |
| 70604 | 149845U, 314817U, 181144U, 219612U, 173108U, 53546U, 89231U, 257073U, |
| 70605 | 122840U, 289122U, 211689U, 146359U, 311294U, 167886U, 50102U, 85626U, |
| 70606 | 253411U, 117692U, 283960U, 206163U, 140708U, 305600U, 186135U, 56520U, |
| 70607 | 92374U, 260299U, 127736U, 294099U, 224610U, 59868U, 95301U, 263413U, |
| 70608 | 151466U, 316497U, 177651U, 216379U, 172249U, 52708U, 88368U, 256200U, |
| 70609 | 121969U, 288236U, 210829U, 145469U, 310388U, 167027U, 49264U, 84763U, |
| 70610 | 252538U, 116821U, 283074U, 205303U, 139818U, 304694U, 185429U, 55823U, |
| 70611 | 91649U, 259558U, 127012U, 293354U, 223903U, 59575U, 94989U, 263082U, |
| 70612 | 150726U, 315735U, 171997U, 52502U, 88150U, 256007U, 121701U, 287987U, |
| 70613 | 210577U, 145201U, 310139U, 166762U, 49044U, 84530U, 252329U, 116539U, |
| 70614 | 282810U, 205038U, 139536U, 304430U, 185215U, 55642U, 91455U, 259382U, |
| 70615 | 126781U, 293135U, 223689U, 59483U, 94891U, 262978U, 150495U, 315516U, |
| 70616 | 172381U, 52830U, 88497U, 256318U, 122091U, 288348U, 210944U, 145591U, |
| 70617 | 310500U, 167159U, 49386U, 84892U, 252656U, 116943U, 283186U, 205418U, |
| 70618 | 139940U, 304806U, 185537U, 55924U, 91757U, 259658U, 127113U, 293448U, |
| 70619 | 223997U, 59663U, 95083U, 263182U, 150827U, 315829U, 172807U, 53229U, |
| 70620 | 88898U, 256724U, 122523U, 288789U, 211388U, 146042U, 310961U, 167585U, |
| 70621 | 49785U, 85293U, 253062U, 117375U, 283627U, 205862U, 140391U, 305267U, |
| 70622 | 185882U, 56251U, 92089U, 259998U, 127467U, 293814U, 224357U, 151197U, |
| 70623 | 316212U, 169647U, 51005U, 86582U, 254420U, 119384U, 285685U, 208062U, |
| 70624 | 142618U, 307555U, 164394U, 47518U, 82931U, 250709U, 114173U, 280456U, |
| 70625 | 202477U, 136904U, 301794U, 182564U, 54401U, 90138U, 258032U, 124687U, |
| 70626 | 291014U, 220860U, 148223U, 313203U, 171787U, 52314U, 87951U, 255797U, |
| 70627 | 121496U, 287770U, 210384U, 144996U, 309922U, 166552U, 48856U, 84331U, |
| 70628 | 252119U, 116334U, 282593U, 204845U, 139331U, 304213U, 185044U, 55487U, |
| 70629 | 91289U, 259205U, 126612U, 292954U, 223532U, 59424U, 94828U, 262911U, |
| 70630 | 150326U, 315335U, 172866U, 53291U, 88963U, 256792U, 122585U, 288854U, |
| 70631 | 211447U, 146104U, 311026U, 167644U, 49847U, 85358U, 253130U, 117437U, |
| 70632 | 283692U, 205921U, 140453U, 305332U, 185932U, 56304U, 92145U, 260057U, |
| 70633 | 127520U, 293870U, 224407U, 151250U, 316268U, 169703U, 51064U, 86644U, |
| 70634 | 254485U, 119443U, 285747U, 208118U, 142677U, 307617U, 164450U, 47577U, |
| 70635 | 82993U, 250774U, 114232U, 280518U, 202533U, 136963U, 301856U, 182611U, |
| 70636 | 54451U, 90191U, 258088U, 124737U, 291067U, 220907U, 148273U, 313256U, |
| 70637 | 172941U, 53370U, 89046U, 256879U, 122664U, 288937U, 211522U, 146183U, |
| 70638 | 311109U, 167719U, 49926U, 85441U, 253217U, 117516U, 283775U, 205996U, |
| 70639 | 140532U, 305415U, 185995U, 56371U, 92216U, 260132U, 127587U, 293941U, |
| 70640 | 224470U, 59756U, 95182U, 263287U, 151317U, 316339U, 173053U, 53488U, |
| 70641 | 89170U, 257009U, 122782U, 289061U, 211634U, 146301U, 311233U, 167831U, |
| 70642 | 50044U, 85565U, 253347U, 117634U, 283899U, 206108U, 140650U, 305539U, |
| 70643 | 186089U, 56471U, 92322U, 260244U, 127687U, 294047U, 224564U, 59819U, |
| 70644 | 95249U, 263358U, 151417U, 316445U, 170466U, 51258U, 86850U, 254666U, |
| 70645 | 120192U, 286418U, 209023U, 143589U, 308461U, 165226U, 47785U, 83214U, |
| 70646 | 250971U, 114995U, 281204U, 203451U, 137889U, 302715U, 183269U, 54620U, |
| 70647 | 90373U, 258252U, 125396U, 291672U, 221642U, 58946U, 94367U, 262417U, |
| 70648 | 149025U, 313962U, 174489U, 54217U, 89942U, 257824U, 124192U, 290488U, |
| 70649 | 213134U, 147845U, 312802U, 169253U, 50788U, 86353U, 254179U, 119059U, |
| 70650 | 285342U, 207622U, 142209U, 307124U, 187485U, 57083U, 92978U, 260944U, |
| 70651 | 128904U, 295298U, 226071U, 60278U, 95713U, 263852U, 152744U, 317814U, |
| 70652 | 181189U, 219625U, 173124U, 122857U, 289140U, 211705U, 146376U, 311312U, |
| 70653 | 167902U, 117709U, 283978U, 206179U, 140725U, 305618U, 186148U, 127750U, |
| 70654 | 294114U, 224623U, 59882U, 95316U, 263429U, 151480U, 316512U, 177693U, |
| 70655 | 216391U, 172282U, 52743U, 88405U, 256239U, 122004U, 288273U, 210862U, |
| 70656 | 145504U, 310425U, 167060U, 49299U, 84800U, 252577U, 116856U, 283111U, |
| 70657 | 205336U, 139853U, 304731U, 185456U, 55852U, 91680U, 259591U, 127041U, |
| 70658 | 293385U, 223930U, 59604U, 95020U, 263115U, 150755U, 315766U, 172032U, |
| 70659 | 52539U, 88189U, 256048U, 121738U, 288026U, 210612U, 145238U, 310178U, |
| 70660 | 166797U, 49081U, 84569U, 252370U, 116576U, 282849U, 205073U, 139573U, |
| 70661 | 304469U, 185244U, 55673U, 91488U, 259417U, 126812U, 293168U, 223718U, |
| 70662 | 59514U, 94924U, 263013U, 150526U, 315549U, 172416U, 52867U, 88536U, |
| 70663 | 256359U, 122128U, 288387U, 210979U, 145628U, 310539U, 167194U, 49423U, |
| 70664 | 84931U, 252697U, 116980U, 283225U, 205453U, 139977U, 304845U, 185566U, |
| 70665 | 55955U, 91790U, 259693U, 127144U, 293481U, 224026U, 59694U, 95116U, |
| 70666 | 263217U, 150858U, 315862U, 174353U, 54163U, 89885U, 257764U, 124047U, |
| 70667 | 290334U, 212998U, 147700U, 312648U, 169117U, 50734U, 86296U, 254119U, |
| 70668 | 118914U, 285188U, 207486U, 142064U, 306970U, 187376U, 57038U, 92930U, |
| 70669 | 260893U, 128786U, 295171U, 225962U, 60233U, 95665U, 263801U, 152626U, |
| 70670 | 317687U, 173801U, 54095U, 89813U, 257688U, 123473U, 289793U, 212338U, |
| 70671 | 147011U, 311985U, 168565U, 50666U, 86224U, 254043U, 118340U, 284647U, |
| 70672 | 206826U, 141375U, 306307U, 186935U, 56982U, 92870U, 260829U, 128320U, |
| 70673 | 294726U, 225434U, 60205U, 95635U, 263769U, 152066U, 317141U, 180659U, |
| 70674 | 219223U, 171820U, 52349U, 87988U, 255836U, 121531U, 287807U, 210417U, |
| 70675 | 145031U, 309959U, 166585U, 48891U, 84368U, 252158U, 116369U, 282630U, |
| 70676 | 204878U, 139366U, 304250U, 185071U, 55516U, 91320U, 259238U, 126641U, |
| 70677 | 292985U, 223559U, 59453U, 94859U, 262944U, 150355U, 315366U, 176869U, |
| 70678 | 215682U, 172976U, 53407U, 89085U, 256920U, 122701U, 288976U, 211557U, |
| 70679 | 146220U, 311148U, 167754U, 49963U, 85480U, 253258U, 117553U, 283814U, |
| 70680 | 206031U, 140569U, 305454U, 186024U, 56402U, 92249U, 260167U, 127618U, |
| 70681 | 293974U, 224499U, 59787U, 95215U, 263322U, 151348U, 316372U, 173090U, |
| 70682 | 53527U, 89211U, 257052U, 122821U, 289102U, 211671U, 146340U, 311274U, |
| 70683 | 167868U, 50083U, 85606U, 253390U, 117673U, 283940U, 206145U, 140689U, |
| 70684 | 305580U, 186120U, 56504U, 92357U, 260281U, 127720U, 294082U, 224595U, |
| 70685 | 59852U, 95284U, 263395U, 151450U, 316480U, 179906U, 218514U, 170564U, |
| 70686 | 51362U, 86960U, 254782U, 120296U, 286528U, 209121U, 143693U, 308571U, |
| 70687 | 165324U, 47889U, 83324U, 251087U, 115099U, 281314U, 203549U, 137993U, |
| 70688 | 302825U, 183349U, 54706U, 90465U, 258350U, 125482U, 291764U, 221722U, |
| 70689 | 58989U, 94413U, 262466U, 149111U, 314054U, 175500U, 214240U, 174472U, |
| 70690 | 54199U, 89923U, 257804U, 124174U, 290469U, 213117U, 147827U, 312783U, |
| 70691 | 169236U, 50770U, 86334U, 254159U, 119041U, 285323U, 207605U, 142191U, |
| 70692 | 307105U, 187471U, 57068U, 92962U, 260927U, 128889U, 295282U, 226057U, |
| 70693 | 60263U, 95697U, 263835U, 152729U, 317798U, 199369U, 219085U, 198290U, |
| 70694 | 135866U, 209977U, 144585U, 309485U, 197528U, 135286U, 204438U, 138920U, |
| 70695 | 303776U, 199866U, 136388U, 222698U, 59180U, 94592U, 262658U, 149917U, |
| 70696 | 314894U, 198868U, 215154U, 172315U, 52778U, 88442U, 256278U, 122039U, |
| 70697 | 288310U, 210895U, 145539U, 310462U, 167093U, 49334U, 84837U, 252616U, |
| 70698 | 116891U, 283148U, 205369U, 139888U, 304768U, 185483U, 55881U, 91711U, |
| 70699 | 259624U, 127070U, 293416U, 223957U, 59633U, 95051U, 263148U, 150784U, |
| 70700 | 315797U, 172067U, 52576U, 88228U, 256089U, 121775U, 288065U, 210647U, |
| 70701 | 145275U, 310217U, 166832U, 49118U, 84608U, 252411U, 116613U, 282888U, |
| 70702 | 205108U, 139610U, 304508U, 185273U, 55704U, 91521U, 259452U, 126843U, |
| 70703 | 293201U, 223747U, 59545U, 94957U, 263048U, 150557U, 315582U, 172451U, |
| 70704 | 52904U, 88575U, 256400U, 122165U, 288426U, 211014U, 145665U, 310578U, |
| 70705 | 167229U, 49460U, 84970U, 252738U, 117017U, 283264U, 205488U, 140014U, |
| 70706 | 304884U, 185595U, 55986U, 91823U, 259728U, 127175U, 293514U, 224055U, |
| 70707 | 59725U, 95149U, 263252U, 150889U, 315895U, 170531U, 51327U, 86923U, |
| 70708 | 254743U, 120261U, 286491U, 209088U, 143658U, 308534U, 165291U, 47854U, |
| 70709 | 83287U, 251048U, 115064U, 281277U, 203516U, 137958U, 302788U, 183322U, |
| 70710 | 54677U, 90434U, 258317U, 125453U, 291733U, 221695U, 58960U, 94382U, |
| 70711 | 262433U, 149082U, 314023U, 171385U, 51983U, 87599U, 255424U, 121067U, |
| 70712 | 287314U, 209944U, 144550U, 309448U, 166150U, 48525U, 83979U, 251746U, |
| 70713 | 115905U, 282137U, 204405U, 138885U, 303739U, 184260U, 55219U, 91000U, |
| 70714 | 258895U, 126188U, 292497U, 222671U, 59151U, 94561U, 262625U, 149888U, |
| 70715 | 314863U, 173189U, 53615U, 89304U, 257150U, 122926U, 289213U, 211770U, |
| 70716 | 146445U, 311385U, 167967U, 50171U, 85699U, 253488U, 117778U, 284051U, |
| 70717 | 206244U, 140794U, 305691U, 186201U, 56577U, 92435U, 260364U, 127807U, |
| 70718 | 294175U, 224676U, 59925U, 95362U, 263478U, 151537U, 316573U, 184463U, |
| 70719 | 235730U, 231880U, 242311U, 222887U, 239020U, 228133U, 230371U, 240821U, |
| 70720 | 233005U, 243499U, 182155U, 235199U, 220498U, 238489U, 227643U, 162971U, |
| 70721 | 234456U, 201159U, 237746U, 184778U, 235963U, 223247U, 239253U, 228366U, |
| 70722 | 176612U, 234817U, 215373U, 238107U, 186657U, 236200U, 232006U, 242445U, |
| 70723 | 225143U, 239490U, 228616U, 230524U, 240983U, 233131U, 243633U, 178076U, |
| 70724 | 235040U, 216709U, 238330U, 235317U, 238607U, 227767U, 236069U, 239359U, |
| 70725 | 228478U, 183712U, 235476U, 231754U, 242177U, 222094U, 238766U, 227915U, |
| 70726 | 230218U, 240659U, 232879U, 243365U, 235238U, 238528U, 227684U, 235998U, |
| 70727 | 239288U, 228403U, 186670U, 236217U, 232024U, 242464U, 225156U, 239507U, |
| 70728 | 228634U, 230543U, 241003U, 233149U, 243652U, 235358U, 238648U, 227810U, |
| 70729 | 236106U, 239396U, 228517U, 183725U, 235493U, 222107U, 238783U, 175850U, |
| 70730 | 234661U, 214530U, 237951U, 184476U, 235747U, 222900U, 239037U, 228151U, |
| 70731 | 186683U, 236234U, 225182U, 239524U, 228652U, 178088U, 235056U, 216733U, |
| 70732 | 238346U, 183681U, 235437U, 222063U, 238727U, 227874U, 175836U, 234643U, |
| 70733 | 214516U, 237933U, 184432U, 235691U, 222856U, 238981U, 228092U, 186626U, |
| 70734 | 236161U, 225112U, 239451U, 228575U, 178062U, 235022U, 216695U, 238312U, |
| 70735 | 183752U, 235528U, 231772U, 242196U, 222134U, 238818U, 227933U, 230237U, |
| 70736 | 240679U, 232897U, 243384U, 175862U, 234677U, 214542U, 237967U, 184503U, |
| 70737 | 235782U, 231898U, 242330U, 222927U, 239072U, 228188U, 230390U, 240841U, |
| 70738 | 233023U, 243518U, 182202U, 235277U, 220545U, 238567U, 227725U, 163000U, |
| 70739 | 234493U, 201188U, 237783U, 184819U, 236033U, 223288U, 239323U, 228440U, |
| 70740 | 176637U, 234850U, 215398U, 238140U, 235399U, 238689U, 227853U, 236143U, |
| 70741 | 239433U, 228556U, 172884U, 53310U, 88983U, 256813U, 122604U, 288874U, |
| 70742 | 211465U, 146123U, 311046U, 167662U, 49866U, 85378U, 253151U, 117456U, |
| 70743 | 283712U, 205939U, 140472U, 305352U, 185947U, 56320U, 92162U, 260075U, |
| 70744 | 127536U, 293887U, 224422U, 151266U, 316285U, 172993U, 53425U, 89104U, |
| 70745 | 256940U, 122719U, 288995U, 211574U, 146238U, 311167U, 167771U, 49981U, |
| 70746 | 85499U, 253278U, 117571U, 283833U, 206048U, 140587U, 305473U, 186038U, |
| 70747 | 56417U, 92265U, 260184U, 127633U, 293990U, 224513U, 151363U, 316388U, |
| 70748 | 173582U, 53922U, 89631U, 257497U, 123280U, 289590U, 212119U, 146818U, |
| 70749 | 311782U, 168346U, 50493U, 86042U, 253852U, 118147U, 284444U, 206607U, |
| 70750 | 58829U, 94244U, 262288U, 141182U, 306104U, 186502U, 56836U, 92715U, |
| 70751 | 260665U, 128104U, 294496U, 224988U, 60034U, 95480U, 263605U, 151850U, |
| 70752 | 316911U, 180618U, 219182U, 171737U, 52261U, 87895U, 255738U, 121443U, |
| 70753 | 287714U, 210334U, 144943U, 309866U, 166502U, 48803U, 84275U, 252060U, |
| 70754 | 116281U, 282537U, 204795U, 139278U, 304157U, 185003U, 55443U, 91242U, |
| 70755 | 259155U, 126568U, 292907U, 223491U, 59380U, 94781U, 262861U, 150282U, |
| 70756 | 315288U, 176831U, 215630U, 173656U, 54000U, 89713U, 257583U, 123358U, |
| 70757 | 289672U, 212193U, 146896U, 311864U, 168420U, 50571U, 86124U, 253938U, |
| 70758 | 118225U, 284526U, 206681U, 58868U, 94285U, 262331U, 141260U, 306186U, |
| 70759 | 186564U, 56902U, 92785U, 260739U, 128170U, 294566U, 225050U, 60100U, |
| 70760 | 95550U, 263679U, 151916U, 316981U, 172232U, 52690U, 88349U, 256180U, |
| 70761 | 121951U, 288217U, 210812U, 145451U, 310369U, 167010U, 49246U, 84744U, |
| 70762 | 252518U, 116803U, 283055U, 205286U, 139800U, 304675U, 185415U, 55808U, |
| 70763 | 91633U, 259541U, 126997U, 293338U, 223889U, 59560U, 94973U, 263065U, |
| 70764 | 150711U, 315719U, 173618U, 53960U, 89671U, 257539U, 123318U, 289630U, |
| 70765 | 212155U, 146856U, 311822U, 168382U, 50531U, 86082U, 253894U, 118185U, |
| 70766 | 284484U, 206643U, 58848U, 94264U, 262309U, 141220U, 306144U, 186532U, |
| 70767 | 56868U, 92749U, 260701U, 128136U, 294530U, 225018U, 60066U, 95514U, |
| 70768 | 263641U, 151882U, 316945U, 171979U, 52483U, 88130U, 255986U, 121682U, |
| 70769 | 287967U, 210559U, 145182U, 310119U, 166744U, 49025U, 84510U, 252308U, |
| 70770 | 116520U, 282790U, 205020U, 139517U, 304410U, 185200U, 55626U, 91438U, |
| 70771 | 259364U, 126765U, 293118U, 223674U, 59467U, 94874U, 262960U, 150479U, |
| 70772 | 315499U, 173692U, 54038U, 89753U, 257625U, 123396U, 289712U, 212229U, |
| 70773 | 146934U, 311904U, 168456U, 50609U, 86164U, 253980U, 118263U, 284566U, |
| 70774 | 206717U, 58906U, 94325U, 262373U, 141298U, 306226U, 186594U, 56934U, |
| 70775 | 92819U, 260775U, 128202U, 294600U, 225080U, 60132U, 95584U, 263715U, |
| 70776 | 151948U, 317015U, 172363U, 52811U, 88477U, 256297U, 122072U, 288328U, |
| 70777 | 210926U, 145572U, 310480U, 167141U, 49367U, 84872U, 252635U, 116924U, |
| 70778 | 283166U, 205400U, 139921U, 304786U, 185522U, 55908U, 91740U, 259640U, |
| 70779 | 127097U, 293431U, 223982U, 59647U, 95066U, 263164U, 150811U, 315812U, |
| 70780 | 171770U, 52296U, 87932U, 255777U, 121478U, 287751U, 210367U, 144978U, |
| 70781 | 309903U, 166535U, 48838U, 84312U, 252099U, 116316U, 282574U, 204828U, |
| 70782 | 139313U, 304194U, 185030U, 55472U, 91273U, 259188U, 126597U, 292938U, |
| 70783 | 223518U, 59409U, 94812U, 262894U, 150311U, 315319U, 172923U, 53351U, |
| 70784 | 89026U, 256858U, 122645U, 288917U, 211504U, 146164U, 311089U, 167701U, |
| 70785 | 49907U, 85421U, 253196U, 117497U, 283755U, 205978U, 140513U, 305395U, |
| 70786 | 185980U, 56355U, 92199U, 260114U, 127571U, 293924U, 224455U, 59740U, |
| 70787 | 95165U, 263269U, 151301U, 316322U, 173034U, 53468U, 89149U, 256987U, |
| 70788 | 122762U, 289040U, 211615U, 146281U, 311212U, 167812U, 50024U, 85544U, |
| 70789 | 253325U, 117614U, 283878U, 206089U, 140630U, 305518U, 186073U, 56454U, |
| 70790 | 92304U, 260225U, 127670U, 294029U, 224548U, 59802U, 95231U, 263339U, |
| 70791 | 151400U, 316427U, 172265U, 52725U, 88386U, 256219U, 121986U, 288254U, |
| 70792 | 210845U, 145486U, 310406U, 167043U, 49281U, 84781U, 252557U, 116838U, |
| 70793 | 283092U, 205319U, 139835U, 304712U, 185442U, 55837U, 91664U, 259574U, |
| 70794 | 127026U, 293369U, 223916U, 59589U, 95004U, 263098U, 150740U, 315750U, |
| 70795 | 172014U, 52520U, 88169U, 256027U, 121719U, 288006U, 210594U, 145219U, |
| 70796 | 310158U, 166779U, 49062U, 84549U, 252349U, 116557U, 282829U, 205055U, |
| 70797 | 139554U, 304449U, 185229U, 55657U, 91471U, 259399U, 126796U, 293151U, |
| 70798 | 223703U, 59498U, 94907U, 262995U, 150510U, 315532U, 172398U, 52848U, |
| 70799 | 88516U, 256338U, 122109U, 288367U, 210961U, 145609U, 310519U, 167176U, |
| 70800 | 49404U, 84911U, 252676U, 116961U, 283205U, 205435U, 139958U, 304825U, |
| 70801 | 185551U, 55939U, 91773U, 259675U, 127128U, 293464U, 224011U, 59678U, |
| 70802 | 95099U, 263199U, 150842U, 315845U, 174336U, 54145U, 89866U, 257744U, |
| 70803 | 124029U, 290315U, 212981U, 147682U, 312629U, 169100U, 50716U, 86277U, |
| 70804 | 254099U, 118896U, 285169U, 207469U, 142046U, 306951U, 187362U, 57023U, |
| 70805 | 92914U, 260876U, 128771U, 295155U, 225948U, 60218U, 95649U, 263784U, |
| 70806 | 152611U, 317671U, 173785U, 54078U, 89795U, 257669U, 123456U, 289775U, |
| 70807 | 212322U, 146994U, 311967U, 168549U, 50649U, 86206U, 254024U, 118323U, |
| 70808 | 284629U, 206810U, 141358U, 306289U, 186922U, 56968U, 92855U, 260813U, |
| 70809 | 128306U, 294711U, 225421U, 60191U, 95620U, 263753U, 152052U, 317126U, |
| 70810 | 173600U, 53941U, 89651U, 257518U, 123299U, 289610U, 212137U, 146837U, |
| 70811 | 311802U, 168364U, 50512U, 86062U, 253873U, 118166U, 284464U, 206625U, |
| 70812 | 141201U, 306124U, 186517U, 56852U, 92732U, 260683U, 128120U, 294513U, |
| 70813 | 225003U, 60050U, 95497U, 263623U, 151866U, 316928U, 180645U, 219209U, |
| 70814 | 171803U, 52331U, 87969U, 255816U, 121513U, 287788U, 210400U, 145013U, |
| 70815 | 309940U, 166568U, 48873U, 84349U, 252138U, 116351U, 282611U, 204861U, |
| 70816 | 139348U, 304231U, 185057U, 55501U, 91304U, 259221U, 126626U, 292969U, |
| 70817 | 223545U, 59438U, 94843U, 262927U, 150340U, 315350U, 176856U, 215669U, |
| 70818 | 172958U, 53388U, 89065U, 256899U, 122682U, 288956U, 211539U, 146201U, |
| 70819 | 311128U, 167736U, 49944U, 85460U, 253237U, 117534U, 283794U, 206013U, |
| 70820 | 140550U, 305434U, 186009U, 56386U, 92232U, 260149U, 127602U, 293957U, |
| 70821 | 224484U, 59771U, 95198U, 263304U, 151332U, 316355U, 173071U, 53507U, |
| 70822 | 89190U, 257030U, 122801U, 289081U, 211652U, 146320U, 311253U, 167849U, |
| 70823 | 50063U, 85585U, 253368U, 117653U, 283919U, 206126U, 140669U, 305559U, |
| 70824 | 186104U, 56487U, 92339U, 260262U, 127703U, 294064U, 224579U, 59835U, |
| 70825 | 95266U, 263376U, 151433U, 316462U, 173674U, 54019U, 89733U, 257604U, |
| 70826 | 123377U, 289692U, 212211U, 146915U, 311884U, 168438U, 50590U, 86144U, |
| 70827 | 253959U, 118244U, 284546U, 206699U, 58887U, 94305U, 262352U, 141279U, |
| 70828 | 306206U, 186579U, 56918U, 92802U, 260757U, 128186U, 294583U, 225065U, |
| 70829 | 60116U, 95567U, 263697U, 151932U, 316998U, 172298U, 52760U, 88423U, |
| 70830 | 256258U, 122021U, 288291U, 210878U, 145521U, 310443U, 167076U, 49316U, |
| 70831 | 84818U, 252596U, 116873U, 283129U, 205352U, 139870U, 304749U, 185469U, |
| 70832 | 55866U, 91695U, 259607U, 127055U, 293400U, 223943U, 59618U, 95035U, |
| 70833 | 263131U, 150769U, 315781U, 173637U, 53980U, 89692U, 257561U, 123338U, |
| 70834 | 289651U, 212174U, 146876U, 311843U, 168401U, 50551U, 86103U, 253916U, |
| 70835 | 118205U, 284505U, 206662U, 141240U, 306165U, 186548U, 56885U, 92767U, |
| 70836 | 260720U, 128153U, 294548U, 225034U, 60083U, 95532U, 263660U, 151899U, |
| 70837 | 316963U, 172049U, 52557U, 88208U, 256068U, 121756U, 288045U, 210629U, |
| 70838 | 145256U, 310197U, 166814U, 49099U, 84588U, 252390U, 116594U, 282868U, |
| 70839 | 205090U, 139591U, 304488U, 185258U, 55688U, 91504U, 259434U, 126827U, |
| 70840 | 293184U, 223732U, 59529U, 94940U, 263030U, 150541U, 315565U, 173711U, |
| 70841 | 54058U, 89774U, 257647U, 123416U, 289733U, 212248U, 146954U, 311925U, |
| 70842 | 168475U, 50629U, 86185U, 254002U, 118283U, 284587U, 206736U, 58926U, |
| 70843 | 94346U, 262395U, 141318U, 306247U, 186610U, 56951U, 92837U, 260794U, |
| 70844 | 128219U, 294618U, 225096U, 60149U, 95602U, 263734U, 151965U, 317033U, |
| 70845 | 172433U, 52885U, 88555U, 256379U, 122146U, 288406U, 210996U, 145646U, |
| 70846 | 310558U, 167211U, 49441U, 84950U, 252717U, 116998U, 283244U, 205470U, |
| 70847 | 139995U, 304864U, 185580U, 55970U, 91806U, 259710U, 127159U, 293497U, |
| 70848 | 224040U, 59709U, 95132U, 263234U, 150873U, 315878U, 177367U, 234866U, |
| 70849 | 216159U, 238156U, 227458U, 182139U, 235179U, 220482U, 238469U, 227622U, |
| 70850 | 162956U, 234437U, 201144U, 237727U, 177542U, 234948U, 216321U, 238238U, |
| 70851 | 227544U, 184764U, 235945U, 223233U, 239235U, 228347U, 176599U, 234800U, |
| 70852 | 215360U, 238090U, 177399U, 234906U, 216191U, 238196U, 227500U, 182217U, |
| 70853 | 235296U, 220560U, 238586U, 227745U, 177570U, 234984U, 216349U, 238274U, |
| 70854 | 227582U, 184832U, 236050U, 223301U, 239340U, 228458U, 182170U, 235218U, |
| 70855 | 220513U, 238508U, 227663U, 184791U, 235980U, 223260U, 239270U, 228384U, |
| 70856 | 182234U, 235337U, 220577U, 238627U, 227788U, 184847U, 236087U, 223316U, |
| 70857 | 239377U, 228497U, 177383U, 234886U, 216175U, 238176U, 227479U, 182186U, |
| 70858 | 235257U, 220529U, 238547U, 227704U, 162985U, 234474U, 201173U, 237764U, |
| 70859 | 177556U, 234966U, 216335U, 238256U, 227563U, 184805U, 236015U, 223274U, |
| 70860 | 239305U, 228421U, 176624U, 234833U, 215385U, 238123U, 177416U, 234927U, |
| 70861 | 216208U, 238217U, 227522U, 182251U, 235378U, 220594U, 238668U, 227831U, |
| 70862 | 177585U, 235003U, 216364U, 238293U, 227602U, 184862U, 236124U, 223331U, |
| 70863 | 239414U, 228536U, 170514U, 51309U, 86904U, 254723U, 120243U, 286472U, |
| 70864 | 209071U, 143640U, 308515U, 165274U, 47836U, 83268U, 251028U, 115046U, |
| 70865 | 281258U, 203499U, 137940U, 302769U, 183308U, 54662U, 90418U, 258300U, |
| 70866 | 125438U, 291717U, 221681U, 149067U, 314007U, 171368U, 51965U, 87580U, |
| 70867 | 255404U, 121049U, 287295U, 209927U, 144532U, 309429U, 166133U, 48507U, |
| 70868 | 83960U, 251726U, 115887U, 282118U, 204388U, 138867U, 303720U, 184246U, |
| 70869 | 55204U, 90984U, 258878U, 126173U, 292481U, 222657U, 59136U, 94545U, |
| 70870 | 262608U, 149873U, 314847U, 173172U, 53597U, 89285U, 257130U, 122908U, |
| 70871 | 289194U, 211753U, 146427U, 311366U, 167950U, 50153U, 85680U, 253468U, |
| 70872 | 117760U, 284032U, 206227U, 140776U, 305672U, 186187U, 56562U, 92419U, |
| 70873 | 260347U, 127792U, 294159U, 224662U, 59910U, 95346U, 263461U, 151522U, |
| 70874 | 316557U, 170547U, 51344U, 86941U, 254762U, 120278U, 286509U, 209104U, |
| 70875 | 143675U, 308552U, 165307U, 47871U, 83305U, 251067U, 115081U, 281295U, |
| 70876 | 203532U, 137975U, 302806U, 183335U, 54691U, 90449U, 258333U, 125467U, |
| 70877 | 291748U, 221708U, 58974U, 94397U, 262449U, 149096U, 314038U, 171401U, |
| 70878 | 52000U, 87617U, 255443U, 121084U, 287332U, 209960U, 144567U, 309466U, |
| 70879 | 166166U, 48542U, 83997U, 251765U, 115922U, 282155U, 204421U, 138902U, |
| 70880 | 303757U, 184273U, 55233U, 91015U, 258911U, 126202U, 292512U, 222684U, |
| 70881 | 59165U, 94576U, 262641U, 149902U, 314878U, 173205U, 53632U, 89322U, |
| 70882 | 257169U, 122943U, 289231U, 211786U, 146462U, 311403U, 167983U, 50188U, |
| 70883 | 85717U, 253507U, 117795U, 284069U, 206260U, 140811U, 305709U, 186214U, |
| 70884 | 56591U, 92450U, 260380U, 127821U, 294190U, 224689U, 59939U, 95377U, |
| 70885 | 263494U, 151551U, 316588U, 183738U, 235510U, 222120U, 238800U, 184489U, |
| 70886 | 235764U, 222913U, 239054U, 228169U, 186696U, 236251U, 225195U, 239541U, |
| 70887 | 228670U, 183696U, 235456U, 222078U, 238746U, 227894U, 184447U, 235710U, |
| 70888 | 222871U, 239000U, 228112U, 186641U, 236180U, 225127U, 239470U, 228595U, |
| 70889 | 171433U, 52034U, 87653U, 255481U, 121118U, 287368U, 210008U, 144618U, |
| 70890 | 309520U, 166198U, 48576U, 84033U, 251803U, 115956U, 282191U, 204469U, |
| 70891 | 138953U, 303811U, 184299U, 55261U, 91045U, 258943U, 126230U, 292542U, |
| 70892 | 222723U, 59207U, 94621U, 262689U, 149944U, 314923U, 171418U, 52018U, |
| 70893 | 87636U, 255463U, 121102U, 287351U, 209993U, 144602U, 309503U, 166183U, |
| 70894 | 48560U, 84016U, 251785U, 115940U, 282174U, 204454U, 138937U, 303794U, |
| 70895 | 184287U, 55248U, 91031U, 258928U, 126217U, 292528U, 222711U, 59194U, |
| 70896 | 94607U, 262674U, 149931U, 314909U, 67631U, 101723U, 268956U, 74111U, |
| 70897 | 106070U, 272489U, 66737U, 100856U, 268238U, 73185U, 105203U, 271771U, |
| 70898 | 69383U, 102824U, 269960U, 76237U, 107323U, 273653U, 169562U, 50932U, |
| 70899 | 86505U, 254339U, 119294U, 285590U, 207977U, 142528U, 307460U, 164309U, |
| 70900 | 47445U, 82854U, 250628U, 114083U, 280361U, 202392U, 136814U, 301699U, |
| 70901 | 182494U, 54340U, 90073U, 257963U, 124612U, 290934U, 220790U, 148148U, |
| 70902 | 313123U, 180156U, 218749U, 170914U, 51623U, 87238U, 255077U, 120604U, |
| 70903 | 286856U, 209427U, 144020U, 308919U, 165660U, 48165U, 83618U, 251399U, |
| 70904 | 115422U, 281658U, 203869U, 138335U, 303189U, 183616U, 54928U, 90705U, |
| 70905 | 258608U, 125742U, 292045U, 221976U, 59061U, 94491U, 262550U, 149387U, |
| 70906 | 314352U, 175757U, 214463U, 171576U, 52187U, 87816U, 255654U, 121271U, |
| 70907 | 287531U, 210151U, 144771U, 309683U, 166341U, 48729U, 84196U, 251976U, |
| 70908 | 116109U, 282354U, 204612U, 139106U, 303974U, 184412U, 55384U, 91178U, |
| 70909 | 259086U, 126353U, 292675U, 222836U, 59306U, 94728U, 262804U, 150067U, |
| 70910 | 315056U, 181493U, 219898U, 173556U, 53894U, 89601U, 257465U, 123252U, |
| 70911 | 289560U, 212093U, 146790U, 311752U, 168320U, 50465U, 86012U, 253820U, |
| 70912 | 118119U, 284414U, 206581U, 141154U, 306074U, 186482U, 56814U, 92691U, |
| 70913 | 260639U, 128082U, 294472U, 224968U, 60012U, 95456U, 263579U, 151828U, |
| 70914 | 316887U, 178021U, 216667U, 183926U, 235632U, 231850U, 242279U, 222323U, |
| 70915 | 238922U, 228029U, 230339U, 240787U, 232975U, 243467U, 176038U, 234774U, |
| 70916 | 214706U, 238064U, 184661U, 235886U, 231976U, 242413U, 223085U, 239176U, |
| 70917 | 228284U, 230492U, 240949U, 233101U, 243601U, 186850U, 236356U, 232102U, |
| 70918 | 242547U, 225349U, 239646U, 228767U, 230645U, 241111U, 233227U, 243735U, |
| 70919 | 178217U, 235153U, 216837U, 238443U, 157744U, 45564U, 80848U, 248497U, |
| 70920 | 111734U, 277891U, 191837U, 132884U, 299388U, 155827U, 43619U, 78795U, |
| 70921 | 246336U, 109703U, 275746U, 189972U, 130849U, 297303U, 161778U, 47245U, |
| 70922 | 82641U, 250402U, 113603U, 279852U, 195588U, 134757U, 301298U, 67808U, |
| 70923 | 74299U, 157759U, 45580U, 80865U, 248515U, 111750U, 277908U, 191852U, |
| 70924 | 132900U, 299405U, 155842U, 43635U, 78812U, 246354U, 109719U, 275763U, |
| 70925 | 189987U, 130865U, 297320U, 161814U, 47284U, 82683U, 250447U, 113642U, |
| 70926 | 279894U, 195624U, 134796U, 301340U, 68252U, 74911U, 68005U, 74610U, |
| 70927 | 158543U, 192522U, 159188U, 193036U, 160236U, 46084U, 81400U, 249081U, |
| 70928 | 112341U, 278502U, 194066U, 57294U, 93202U, 261181U, 133505U, 299972U, |
| 70929 | 161652U, 47110U, 82497U, 250249U, 113468U, 279708U, 195462U, 58445U, |
| 70930 | 94032U, 262062U, 134622U, 301154U, 170664U, 120403U, 286642U, 209221U, |
| 70931 | 143800U, 308685U, 165424U, 115206U, 281428U, 203649U, 138100U, 302939U, |
| 70932 | 183428U, 125568U, 291857U, 221801U, 149197U, 314147U, 173306U, 123051U, |
| 70933 | 289346U, 211887U, 146570U, 311518U, 168084U, 117903U, 284184U, 206361U, |
| 70934 | 140919U, 305824U, 186294U, 127908U, 294284U, 224769U, 151638U, 316682U, |
| 70935 | 71790U, 73291U, 71748U, 103990U, 72341U, 104329U, 271014U, 71916U, |
| 70936 | 104072U, 75073U, 106290U, 272689U, 71988U, 104148U, 75308U, 106539U, |
| 70937 | 272937U, 71706U, 103946U, 72223U, 104205U, 270884U, 71880U, 104034U, |
| 70938 | 74973U, 106184U, 272577U, 71952U, 104110U, 75158U, 106380U, 272784U, |
| 70939 | 71806U, 73336U, 71769U, 104012U, 72400U, 104391U, 271079U, 71934U, |
| 70940 | 104091U, 75123U, 106343U, 272745U, 72006U, 104167U, 75343U, 106576U, |
| 70941 | 272976U, 71727U, 103968U, 72282U, 104267U, 270949U, 71898U, 104053U, |
| 70942 | 75023U, 106237U, 272633U, 71970U, 104129U, 75193U, 106417U, 272823U, |
| 70943 | 72060U, 76094U, 71855U, 74629U, 157104U, 44899U, 80145U, 247756U, |
| 70944 | 111055U, 277173U, 191210U, 132204U, 298685U, 155187U, 42954U, 78092U, |
| 70945 | 245595U, 109024U, 275028U, 189345U, 130169U, 296600U, 161024U, 46683U, |
| 70946 | 82040U, 249762U, 112990U, 279196U, 194844U, 57972U, 93726U, 261737U, |
| 70947 | 134143U, 300654U, 161265U, 113063U, 279275U, 195085U, 58209U, 93781U, |
| 70948 | 261796U, 134216U, 300733U, 171462U, 52065U, 87686U, 255516U, 121149U, |
| 70949 | 287401U, 210037U, 144649U, 309553U, 166227U, 48607U, 84066U, 251838U, |
| 70950 | 115987U, 282224U, 204498U, 138984U, 303844U, 184322U, 55286U, 91072U, |
| 70951 | 258972U, 126255U, 292569U, 222746U, 59232U, 94648U, 262718U, 149969U, |
| 70952 | 314950U, 184526U, 126375U, 292699U, 222950U, 59328U, 94752U, 262830U, |
| 70953 | 150089U, 315080U, 62583U, 97733U, 265578U, 67202U, 101287U, 268593U, |
| 70954 | 73682U, 105634U, 272126U, 61862U, 96972U, 264917U, 66308U, 100420U, |
| 70955 | 267875U, 72756U, 104767U, 271408U, 63320U, 98514U, 266269U, 68768U, |
| 70956 | 102308U, 269489U, 75583U, 41338U, 76384U, 243837U, 106807U, 273182U, |
| 70957 | 62930U, 98100U, 265878U, 67563U, 101651U, 268896U, 74043U, 105998U, |
| 70958 | 272429U, 62209U, 97339U, 265217U, 66669U, 100784U, 268178U, 73117U, |
| 70959 | 105131U, 271711U, 63607U, 98821U, 266524U, 69228U, 102702U, 269843U, |
| 70960 | 76067U, 41612U, 76676U, 244119U, 107201U, 273536U, 68879U, 102397U, |
| 70961 | 269571U, 75706U, 41427U, 76479U, 243924U, 106896U, 273264U, 69341U, |
| 70962 | 102791U, 269925U, 76195U, 41701U, 76771U, 244206U, 107290U, 273618U, |
| 70963 | 156041U, 43802U, 78988U, 246539U, 109930U, 275986U, 190173U, 131077U, |
| 70964 | 297528U, 154124U, 41857U, 76935U, 244378U, 107899U, 273841U, 188308U, |
| 70965 | 129042U, 295443U, 159893U, 45729U, 81023U, 248682U, 111975U, 278113U, |
| 70966 | 193733U, 133126U, 299595U, 159357U, 193197U, 156418U, 44186U, 79392U, |
| 70967 | 246963U, 110328U, 276405U, 190537U, 131491U, 297932U, 154501U, 42241U, |
| 70968 | 77339U, 244802U, 108297U, 274260U, 188672U, 129456U, 295847U, 160207U, |
| 70969 | 46053U, 81367U, 249046U, 112310U, 278469U, 194037U, 57263U, 93169U, |
| 70970 | 261146U, 133474U, 299939U, 158065U, 192139U, 156959U, 44746U, 79984U, |
| 70971 | 247587U, 110902U, 277012U, 191065U, 132051U, 298524U, 155042U, 42801U, |
| 70972 | 77931U, 245426U, 108871U, 274867U, 189200U, 130016U, 296439U, 160903U, |
| 70973 | 46554U, 81903U, 249617U, 112861U, 279059U, 194723U, 57843U, 93589U, |
| 70974 | 261592U, 134014U, 300517U, 159643U, 193483U, 157569U, 45379U, 80653U, |
| 70975 | 248292U, 111549U, 277696U, 191662U, 132699U, 299193U, 155652U, 43434U, |
| 70976 | 78600U, 246131U, 109518U, 275551U, 189797U, 130664U, 297108U, 161623U, |
| 70977 | 47079U, 82464U, 250214U, 113437U, 279675U, 195433U, 58414U, 93999U, |
| 70978 | 262027U, 134591U, 301121U, 158704U, 192678U, 160495U, 233840U, 231124U, |
| 70979 | 241514U, 194325U, 236998U, 57546U, 226828U, 229555U, 239963U, 232249U, |
| 70980 | 242702U, 158392U, 233362U, 192342U, 236520U, 161178U, 234076U, 231373U, |
| 70981 | 241776U, 194998U, 237234U, 58116U, 227077U, 229817U, 240238U, 232498U, |
| 70982 | 242964U, 161933U, 234312U, 231622U, 242038U, 195743U, 237470U, 58697U, |
| 70983 | 227326U, 230079U, 240513U, 232747U, 243226U, 159049U, 233585U, 192899U, |
| 70984 | 236743U, 156119U, 43884U, 79074U, 246629U, 110012U, 276072U, 190251U, |
| 70985 | 131159U, 297614U, 154202U, 41939U, 77021U, 244468U, 107981U, 273927U, |
| 70986 | 188386U, 129124U, 295529U, 159959U, 45799U, 81097U, 248760U, 112045U, |
| 70987 | 278187U, 193799U, 133196U, 299669U, 159449U, 193289U, 156528U, 44302U, |
| 70988 | 79514U, 247091U, 110444U, 276527U, 190647U, 131607U, 298054U, 154611U, |
| 70989 | 42357U, 77461U, 244930U, 108413U, 274382U, 188782U, 129572U, 295969U, |
| 70990 | 160309U, 46162U, 81483U, 249169U, 112419U, 278585U, 194139U, 57372U, |
| 70991 | 93285U, 261269U, 133583U, 300055U, 158151U, 192225U, 157069U, 44862U, |
| 70992 | 80106U, 247715U, 111018U, 277134U, 191175U, 132167U, 298646U, 155152U, |
| 70993 | 42917U, 78053U, 245554U, 108987U, 274989U, 189310U, 130132U, 296561U, |
| 70994 | 160995U, 46652U, 82007U, 249727U, 112959U, 279163U, 194815U, 57941U, |
| 70995 | 93693U, 261702U, 134112U, 300621U, 159735U, 193575U, 157679U, 45495U, |
| 70996 | 80775U, 248420U, 111665U, 277818U, 191772U, 132815U, 299315U, 155762U, |
| 70997 | 43550U, 78722U, 246259U, 109634U, 275673U, 189907U, 130780U, 297230U, |
| 70998 | 161725U, 47188U, 82580U, 250337U, 113546U, 279791U, 195535U, 58523U, |
| 70999 | 94115U, 262150U, 134700U, 301237U, 158790U, 192764U, 160553U, 233914U, |
| 71000 | 231202U, 241596U, 194383U, 237072U, 57608U, 226906U, 229637U, 240049U, |
| 71001 | 232327U, 242784U, 158446U, 233432U, 192396U, 236590U, 161236U, 234150U, |
| 71002 | 231451U, 241858U, 195056U, 237308U, 58178U, 227155U, 229899U, 240324U, |
| 71003 | 232576U, 243046U, 161991U, 234386U, 231700U, 242120U, 195801U, 237544U, |
| 71004 | 58759U, 227404U, 230161U, 240599U, 232825U, 243308U, 159103U, 233655U, |
| 71005 | 192953U, 236813U, 155963U, 43720U, 78902U, 246449U, 109848U, 275900U, |
| 71006 | 190095U, 130995U, 297442U, 154046U, 41775U, 76849U, 244288U, 107817U, |
| 71007 | 273755U, 188230U, 128960U, 295357U, 159827U, 45659U, 80949U, 248604U, |
| 71008 | 111905U, 278039U, 193667U, 133056U, 299521U, 159265U, 193105U, 156308U, |
| 71009 | 44070U, 79270U, 246835U, 110212U, 276283U, 190427U, 131375U, 297810U, |
| 71010 | 154391U, 42125U, 77217U, 244674U, 108181U, 274138U, 188562U, 129340U, |
| 71011 | 295725U, 160115U, 45955U, 81263U, 248936U, 112212U, 278365U, 193945U, |
| 71012 | 57165U, 93065U, 261036U, 133376U, 299835U, 157979U, 192053U, 156849U, |
| 71013 | 44630U, 79862U, 247459U, 110786U, 276890U, 190955U, 131935U, 298402U, |
| 71014 | 154932U, 42685U, 77809U, 245298U, 108755U, 274745U, 189090U, 129900U, |
| 71015 | 296317U, 160811U, 46456U, 81799U, 249507U, 112763U, 278955U, 194631U, |
| 71016 | 57745U, 93485U, 261482U, 133916U, 300413U, 159551U, 193391U, 157459U, |
| 71017 | 45263U, 80531U, 248164U, 111433U, 277574U, 191552U, 132583U, 299071U, |
| 71018 | 155542U, 43318U, 78478U, 246003U, 109402U, 275429U, 189687U, 130548U, |
| 71019 | 296986U, 161531U, 46981U, 82360U, 250104U, 113339U, 279571U, 195341U, |
| 71020 | 58316U, 93895U, 261917U, 134493U, 301017U, 158618U, 192592U, 160437U, |
| 71021 | 233766U, 231046U, 241432U, 194267U, 236924U, 57484U, 226750U, 229473U, |
| 71022 | 239877U, 232171U, 242620U, 158338U, 233292U, 192288U, 236450U, 161120U, |
| 71023 | 234002U, 231295U, 241694U, 194940U, 237160U, 58054U, 226999U, 229735U, |
| 71024 | 240152U, 232420U, 242882U, 161875U, 234238U, 231544U, 241956U, 195685U, |
| 71025 | 237396U, 58635U, 227248U, 229997U, 240427U, 232669U, 243144U, 158995U, |
| 71026 | 233515U, 192845U, 236673U, 157120U, 44916U, 80163U, 247775U, 111072U, |
| 71027 | 277191U, 191226U, 132221U, 298703U, 155203U, 42971U, 78110U, 245614U, |
| 71028 | 109041U, 275046U, 189361U, 130186U, 296618U, 161037U, 46697U, 82055U, |
| 71029 | 249778U, 113004U, 279211U, 194857U, 57986U, 93741U, 261753U, 134157U, |
| 71030 | 300669U, 161278U, 113077U, 279290U, 195098U, 58223U, 93796U, 261812U, |
| 71031 | 134230U, 300748U, 199169U, 179293U, 217915U, 30415U, 196719U, 163447U, |
| 71032 | 201662U, 29186U, 199255U, 179392U, 218014U, 30525U, 196849U, 163589U, |
| 71033 | 201804U, 29356U, 196769U, 237628U, 163497U, 234544U, 201712U, 237834U, |
| 71034 | 30973U, 29252U, 196899U, 237694U, 163639U, 234610U, 201854U, 237900U, |
| 71035 | 31055U, 29422U, 159294U, 193134U, 156343U, 44107U, 79309U, 246876U, |
| 71036 | 110249U, 276322U, 190462U, 131412U, 297849U, 154426U, 42162U, 77256U, |
| 71037 | 244715U, 108218U, 274177U, 188597U, 129377U, 295764U, 160144U, 45986U, |
| 71038 | 81296U, 248971U, 112243U, 278398U, 193974U, 57196U, 93098U, 261071U, |
| 71039 | 133407U, 299868U, 158006U, 192080U, 156884U, 44667U, 79901U, 247500U, |
| 71040 | 110823U, 276929U, 190990U, 131972U, 298441U, 154967U, 42722U, 77848U, |
| 71041 | 245339U, 108792U, 274784U, 189125U, 129937U, 296356U, 160840U, 46487U, |
| 71042 | 81832U, 249542U, 112794U, 278988U, 194660U, 57776U, 93518U, 261517U, |
| 71043 | 133947U, 300446U, 159580U, 193420U, 157494U, 45300U, 80570U, 248205U, |
| 71044 | 111470U, 277613U, 191587U, 132620U, 299110U, 155577U, 43355U, 78517U, |
| 71045 | 246044U, 109439U, 275468U, 189722U, 130585U, 297025U, 161560U, 47012U, |
| 71046 | 82393U, 250139U, 113370U, 279604U, 195370U, 58347U, 93928U, 261952U, |
| 71047 | 134524U, 301050U, 158645U, 192619U, 159386U, 193226U, 156453U, 44223U, |
| 71048 | 79431U, 247004U, 110365U, 276444U, 190572U, 131528U, 297971U, 154536U, |
| 71049 | 42278U, 77378U, 244843U, 108334U, 274299U, 188707U, 129493U, 295886U, |
| 71050 | 160246U, 46095U, 81412U, 249094U, 112352U, 278514U, 194076U, 57305U, |
| 71051 | 93214U, 261194U, 133516U, 299984U, 158092U, 192166U, 156994U, 44783U, |
| 71052 | 80023U, 247628U, 110939U, 277051U, 191100U, 132088U, 298563U, 155077U, |
| 71053 | 42838U, 77970U, 245467U, 108908U, 274906U, 189235U, 130053U, 296478U, |
| 71054 | 160932U, 46585U, 81936U, 249652U, 112892U, 279092U, 194752U, 57874U, |
| 71055 | 93622U, 261627U, 134045U, 300550U, 159672U, 193512U, 157604U, 45416U, |
| 71056 | 80692U, 248333U, 111586U, 277735U, 191697U, 132736U, 299232U, 155687U, |
| 71057 | 43471U, 78639U, 246172U, 109555U, 275590U, 189832U, 130701U, 297147U, |
| 71058 | 161662U, 47121U, 82509U, 250262U, 113479U, 279720U, 195472U, 58456U, |
| 71059 | 94044U, 262075U, 134633U, 301166U, 158731U, 192705U, 159202U, 193042U, |
| 71060 | 156233U, 43991U, 79187U, 246748U, 110133U, 276200U, 190352U, 131296U, |
| 71061 | 297727U, 154316U, 42046U, 77134U, 244587U, 108102U, 274055U, 188487U, |
| 71062 | 129261U, 295642U, 160052U, 45888U, 81192U, 248861U, 112145U, 278294U, |
| 71063 | 193882U, 57098U, 92994U, 260961U, 133309U, 299764U, 157920U, 191994U, |
| 71064 | 156774U, 44551U, 79779U, 247372U, 110707U, 276807U, 190880U, 131856U, |
| 71065 | 298319U, 154857U, 42606U, 77726U, 245211U, 108676U, 274662U, 189015U, |
| 71066 | 129821U, 296234U, 160748U, 46389U, 81728U, 249432U, 112696U, 278884U, |
| 71067 | 194568U, 57678U, 93414U, 261407U, 133849U, 300342U, 159488U, 193328U, |
| 71068 | 157384U, 45184U, 80448U, 248077U, 111354U, 277491U, 191477U, 132504U, |
| 71069 | 298988U, 155467U, 43239U, 78395U, 245916U, 109323U, 275346U, 189612U, |
| 71070 | 130469U, 296903U, 161468U, 46914U, 82289U, 250029U, 113272U, 279500U, |
| 71071 | 195278U, 58249U, 93824U, 261842U, 134426U, 300946U, 158559U, 192533U, |
| 71072 | 199110U, 179234U, 217856U, 30340U, 196664U, 163392U, 201607U, 29115U, |
| 71073 | 199196U, 179333U, 217955U, 30450U, 196794U, 163534U, 201749U, 29285U, |
| 71074 | 156002U, 43761U, 78945U, 246494U, 109889U, 275943U, 190134U, 131036U, |
| 71075 | 297485U, 154085U, 41816U, 76892U, 244333U, 107858U, 273798U, 188269U, |
| 71076 | 129001U, 295400U, 159860U, 45694U, 80986U, 248643U, 111940U, 278076U, |
| 71077 | 193700U, 133091U, 299558U, 159311U, 193151U, 156363U, 44128U, 79331U, |
| 71078 | 246899U, 110270U, 276344U, 190482U, 131433U, 297871U, 154446U, 42183U, |
| 71079 | 77278U, 244738U, 108239U, 274199U, 188617U, 129398U, 295786U, 160161U, |
| 71080 | 46004U, 81315U, 248991U, 112261U, 278417U, 193991U, 57214U, 93117U, |
| 71081 | 261091U, 133425U, 299887U, 158022U, 192096U, 156904U, 44688U, 79923U, |
| 71082 | 247523U, 110844U, 276951U, 191010U, 131993U, 298463U, 154987U, 42743U, |
| 71083 | 77870U, 245362U, 108813U, 274806U, 189145U, 129958U, 296378U, 160857U, |
| 71084 | 46505U, 81851U, 249562U, 112812U, 279007U, 194677U, 57794U, 93537U, |
| 71085 | 261537U, 133965U, 300465U, 159597U, 193437U, 157514U, 45321U, 80592U, |
| 71086 | 248228U, 111491U, 277635U, 191607U, 132641U, 299132U, 155597U, 43376U, |
| 71087 | 78539U, 246067U, 109460U, 275490U, 189742U, 130606U, 297047U, 161577U, |
| 71088 | 47030U, 82412U, 250159U, 113388U, 279623U, 195387U, 58365U, 93947U, |
| 71089 | 261972U, 134542U, 301069U, 158661U, 192635U, 160466U, 233803U, 231085U, |
| 71090 | 241473U, 194296U, 236961U, 57515U, 226789U, 229514U, 239920U, 232210U, |
| 71091 | 242661U, 158365U, 233327U, 192315U, 236485U, 161149U, 234039U, 231334U, |
| 71092 | 241735U, 194969U, 237197U, 58085U, 227038U, 229776U, 240195U, 232459U, |
| 71093 | 242923U, 161904U, 234275U, 231583U, 241997U, 195714U, 237433U, 58666U, |
| 71094 | 227287U, 230038U, 240470U, 232708U, 243185U, 159022U, 233550U, 192872U, |
| 71095 | 236708U, 156080U, 43843U, 79031U, 246584U, 109971U, 276029U, 190212U, |
| 71096 | 131118U, 297571U, 154163U, 41898U, 76978U, 244423U, 107940U, 273884U, |
| 71097 | 188347U, 129083U, 295486U, 159926U, 45764U, 81060U, 248721U, 112010U, |
| 71098 | 278150U, 193766U, 133161U, 299632U, 159403U, 193243U, 156473U, 44244U, |
| 71099 | 79453U, 247027U, 110386U, 276466U, 190592U, 131549U, 297993U, 154556U, |
| 71100 | 42299U, 77400U, 244866U, 108355U, 274321U, 188727U, 129514U, 295908U, |
| 71101 | 160263U, 46113U, 81431U, 249114U, 112370U, 278533U, 194093U, 57323U, |
| 71102 | 93233U, 261214U, 133534U, 300003U, 158108U, 192182U, 157014U, 44804U, |
| 71103 | 80045U, 247651U, 110960U, 277073U, 191120U, 132109U, 298585U, 155097U, |
| 71104 | 42859U, 77992U, 245490U, 108929U, 274928U, 189255U, 130074U, 296500U, |
| 71105 | 160949U, 46603U, 81955U, 249672U, 112910U, 279111U, 194769U, 57892U, |
| 71106 | 93641U, 261647U, 134063U, 300569U, 159689U, 193529U, 157624U, 45437U, |
| 71107 | 80714U, 248356U, 111607U, 277757U, 191717U, 132757U, 299254U, 155707U, |
| 71108 | 43492U, 78661U, 246195U, 109576U, 275612U, 189852U, 130722U, 297169U, |
| 71109 | 161679U, 47139U, 82528U, 250282U, 113497U, 279739U, 195489U, 58474U, |
| 71110 | 94063U, 262095U, 134651U, 301185U, 158747U, 192721U, 160524U, 233877U, |
| 71111 | 231163U, 241555U, 194354U, 237035U, 57577U, 226867U, 229596U, 240006U, |
| 71112 | 232288U, 242743U, 158419U, 233397U, 192369U, 236555U, 161207U, 234113U, |
| 71113 | 231412U, 241817U, 195027U, 237271U, 58147U, 227116U, 229858U, 240281U, |
| 71114 | 232537U, 243005U, 161962U, 234349U, 231661U, 242079U, 195772U, 237507U, |
| 71115 | 58728U, 227365U, 230120U, 240556U, 232786U, 243267U, 159076U, 233620U, |
| 71116 | 192926U, 236778U, 155924U, 43679U, 78859U, 246404U, 109807U, 275857U, |
| 71117 | 190056U, 130954U, 297399U, 154007U, 41734U, 76806U, 244243U, 107776U, |
| 71118 | 273712U, 188191U, 128919U, 295314U, 159794U, 45624U, 80912U, 248565U, |
| 71119 | 111870U, 278002U, 193634U, 133021U, 299484U, 159219U, 193059U, 156253U, |
| 71120 | 44012U, 79209U, 246771U, 110154U, 276222U, 190372U, 131317U, 297749U, |
| 71121 | 154336U, 42067U, 77156U, 244610U, 108123U, 274077U, 188507U, 129282U, |
| 71122 | 295664U, 160069U, 45906U, 81211U, 248881U, 112163U, 278313U, 193899U, |
| 71123 | 57116U, 93013U, 260981U, 133327U, 299783U, 157936U, 192010U, 156794U, |
| 71124 | 44572U, 79801U, 247395U, 110728U, 276829U, 190900U, 131877U, 298341U, |
| 71125 | 154877U, 42627U, 77748U, 245234U, 108697U, 274684U, 189035U, 129842U, |
| 71126 | 296256U, 160765U, 46407U, 81747U, 249452U, 112714U, 278903U, 194585U, |
| 71127 | 57696U, 93433U, 261427U, 133867U, 300361U, 159505U, 193345U, 157404U, |
| 71128 | 45205U, 80470U, 248100U, 111375U, 277513U, 191497U, 132525U, 299010U, |
| 71129 | 155487U, 43260U, 78417U, 245939U, 109344U, 275368U, 189632U, 130490U, |
| 71130 | 296925U, 161485U, 46932U, 82308U, 250049U, 113290U, 279519U, 195295U, |
| 71131 | 58267U, 93843U, 261862U, 134444U, 300965U, 158575U, 192549U, 160408U, |
| 71132 | 233729U, 231007U, 241391U, 194238U, 236887U, 57453U, 226711U, 229432U, |
| 71133 | 239834U, 232132U, 242579U, 158311U, 233257U, 192261U, 236415U, 161091U, |
| 71134 | 233965U, 231256U, 241653U, 194911U, 237123U, 58023U, 226960U, 229694U, |
| 71135 | 240109U, 232381U, 242841U, 161846U, 234201U, 231505U, 241915U, 195656U, |
| 71136 | 237359U, 58604U, 227209U, 229956U, 240384U, 232630U, 243103U, 158968U, |
| 71137 | 233480U, 192818U, 236638U, 159340U, 193180U, 156398U, 44165U, 79370U, |
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| 71168 | 189070U, 129879U, 296295U, 160794U, 46438U, 81780U, 249487U, 112745U, |
| 71169 | 278936U, 194614U, 57727U, 93466U, 261462U, 133898U, 300394U, 159534U, |
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| 71171 | 132562U, 299049U, 155522U, 43297U, 78456U, 245980U, 109381U, 275407U, |
| 71172 | 189667U, 130527U, 296964U, 161514U, 46963U, 82341U, 250084U, 113321U, |
| 71173 | 279552U, 195324U, 58298U, 93876U, 261897U, 134475U, 300998U, 158602U, |
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| 71175 | 29167U, 199239U, 179376U, 217998U, 30505U, 196834U, 163574U, 201789U, |
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| 71185 | 156060U, 43822U, 79009U, 246561U, 109950U, 276007U, 190192U, 131097U, |
| 71186 | 297549U, 154143U, 41877U, 76956U, 244400U, 107919U, 273862U, 188327U, |
| 71187 | 129062U, 295464U, 159909U, 45746U, 81041U, 248701U, 111992U, 278131U, |
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| 71229 | 273776U, 188249U, 128980U, 295378U, 159843U, 45676U, 80967U, 248623U, |
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| 71235 | 44648U, 79881U, 247479U, 110804U, 276909U, 190972U, 131953U, 298421U, |
| 71236 | 154949U, 42703U, 77828U, 245318U, 108773U, 274764U, 189107U, 129918U, |
| 71237 | 296336U, 160825U, 46471U, 81815U, 249524U, 112778U, 278971U, 194645U, |
| 71238 | 57760U, 93501U, 261499U, 133931U, 300429U, 159565U, 193405U, 157476U, |
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| 71257 | 297890U, 154463U, 42201U, 77297U, 244758U, 108257U, 274218U, 188634U, |
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| 71259 | 194005U, 57229U, 93133U, 261108U, 133440U, 299903U, 158035U, 192109U, |
| 71260 | 156921U, 44706U, 79942U, 247543U, 110862U, 276970U, 191027U, 132011U, |
| 71261 | 298482U, 155004U, 42761U, 77889U, 245382U, 108831U, 274825U, 189162U, |
| 71262 | 129976U, 296397U, 160871U, 46520U, 81867U, 249579U, 112827U, 279023U, |
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| 71265 | 299151U, 155614U, 43394U, 78558U, 246087U, 109478U, 275509U, 189759U, |
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| 71271 | 229796U, 240216U, 232478U, 242943U, 161918U, 234293U, 231602U, 242017U, |
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| 71273 | 159035U, 233567U, 192885U, 236725U, 156099U, 43863U, 79052U, 246606U, |
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| 71275 | 244445U, 107960U, 273905U, 188366U, 129103U, 295507U, 159942U, 45781U, |
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| 71279 | 188744U, 129532U, 295927U, 160277U, 46128U, 81447U, 249131U, 112385U, |
| 71280 | 278549U, 194107U, 57338U, 93249U, 261231U, 133549U, 300019U, 158121U, |
| 71281 | 192195U, 157031U, 44822U, 80064U, 247671U, 110978U, 277092U, 191137U, |
| 71282 | 132127U, 298604U, 155114U, 42877U, 78011U, 245510U, 108947U, 274947U, |
| 71283 | 189272U, 130092U, 296519U, 160963U, 46618U, 81971U, 249689U, 112925U, |
| 71284 | 279127U, 194783U, 57907U, 93657U, 261664U, 134078U, 300585U, 159703U, |
| 71285 | 193543U, 157641U, 45455U, 80733U, 248376U, 111625U, 277776U, 191734U, |
| 71286 | 132775U, 299273U, 155724U, 43510U, 78680U, 246215U, 109594U, 275631U, |
| 71287 | 189869U, 130740U, 297188U, 161693U, 47154U, 82544U, 250299U, 113512U, |
| 71288 | 279755U, 195503U, 58489U, 94079U, 262112U, 134666U, 301201U, 158760U, |
| 71289 | 192734U, 160538U, 233895U, 231182U, 241575U, 194368U, 237053U, 57592U, |
| 71290 | 226886U, 229616U, 240027U, 232307U, 242763U, 158432U, 233414U, 192382U, |
| 71291 | 236572U, 161221U, 234131U, 231431U, 241837U, 195041U, 237289U, 58162U, |
| 71292 | 227135U, 229878U, 240302U, 232556U, 243025U, 161976U, 234367U, 231680U, |
| 71293 | 242099U, 195786U, 237525U, 58743U, 227384U, 230140U, 240577U, 232805U, |
| 71294 | 243287U, 159089U, 233637U, 192939U, 236795U, 155943U, 43699U, 78880U, |
| 71295 | 246426U, 109827U, 275878U, 190075U, 130974U, 297420U, 154026U, 41754U, |
| 71296 | 76827U, 244265U, 107796U, 273733U, 188210U, 128939U, 295335U, 159810U, |
| 71297 | 45641U, 80930U, 248584U, 111887U, 278020U, 193650U, 133038U, 299502U, |
| 71298 | 159233U, 193073U, 156270U, 44030U, 79228U, 246791U, 110172U, 276241U, |
| 71299 | 190389U, 131335U, 297768U, 154353U, 42085U, 77175U, 244630U, 108141U, |
| 71300 | 274096U, 188524U, 129300U, 295683U, 160083U, 45921U, 81227U, 248898U, |
| 71301 | 112178U, 278329U, 193913U, 57131U, 93029U, 260998U, 133342U, 299799U, |
| 71302 | 157949U, 192023U, 156811U, 44590U, 79820U, 247415U, 110746U, 276848U, |
| 71303 | 190917U, 131895U, 298360U, 154894U, 42645U, 77767U, 245254U, 108715U, |
| 71304 | 274703U, 189052U, 129860U, 296275U, 160779U, 46422U, 81763U, 249469U, |
| 71305 | 112729U, 278919U, 194599U, 57711U, 93449U, 261444U, 133882U, 300377U, |
| 71306 | 159519U, 193359U, 157421U, 45223U, 80489U, 248120U, 111393U, 277532U, |
| 71307 | 191514U, 132543U, 299029U, 155504U, 43278U, 78436U, 245959U, 109362U, |
| 71308 | 275387U, 189649U, 130508U, 296944U, 161499U, 46947U, 82324U, 250066U, |
| 71309 | 113305U, 279535U, 195309U, 58282U, 93859U, 261879U, 134459U, 300981U, |
| 71310 | 158588U, 192562U, 160422U, 233747U, 231026U, 241411U, 194252U, 236905U, |
| 71311 | 57468U, 226730U, 229452U, 239855U, 232151U, 242599U, 158324U, 233274U, |
| 71312 | 192274U, 236432U, 161105U, 233983U, 231275U, 241673U, 194925U, 237141U, |
| 71313 | 58038U, 226979U, 229714U, 240130U, 232400U, 242861U, 161860U, 234219U, |
| 71314 | 231524U, 241935U, 195670U, 237377U, 58619U, 227228U, 229976U, 240405U, |
| 71315 | 232649U, 243123U, 158981U, 233497U, 192831U, 236655U, 199139U, 179263U, |
| 71316 | 217885U, 30377U, 196691U, 163419U, 201634U, 29150U, 199225U, 179362U, |
| 71317 | 217984U, 30487U, 196821U, 163561U, 201776U, 29320U, 196756U, 237611U, |
| 71318 | 163484U, 234527U, 201699U, 237817U, 30952U, 29235U, 196886U, 237677U, |
| 71319 | 163626U, 234593U, 201841U, 237883U, 31034U, 29405U, 60986U, 96040U, |
| 71320 | 64558U, 99251U, 70267U, 103270U, 60694U, 95729U, 64188U, 98885U, |
| 71321 | 69897U, 102904U, 61249U, 96320U, 65389U, 99588U, 71372U, 103607U, |
| 71322 | 61094U, 96155U, 64659U, 99359U, 70368U, 103378U, 60817U, 95860U, |
| 71323 | 64303U, 99008U, 70012U, 103027U, 61348U, 96427U, 65480U, 99687U, |
| 71324 | 71463U, 103706U, 61126U, 96189U, 64689U, 99391U, 70398U, 103410U, |
| 71325 | 60849U, 95894U, 64333U, 99040U, 70042U, 103059U, 61374U, 96455U, |
| 71326 | 65518U, 99728U, 71501U, 103747U, 61231U, 96301U, 64815U, 99496U, |
| 71327 | 70524U, 103515U, 60968U, 96021U, 64472U, 99159U, 70181U, 103178U, |
| 71328 | 61469U, 96558U, 65641U, 99838U, 71624U, 103857U, 65504U, 99713U, |
| 71329 | 71487U, 103732U, 65532U, 99743U, 71515U, 103762U, 65655U, 99853U, |
| 71330 | 71638U, 103872U, 180190U, 218769U, 175788U, 214481U, 181527U, 219918U, |
| 71331 | 178052U, 216685U, 176075U, 214743U, 178244U, 216864U, 180017U, 170693U, |
| 71332 | 165453U, 183451U, 175610U, 181343U, 173335U, 168113U, 186317U, 177874U, |
| 71333 | 158178U, 158817U, 158240U, 158887U, 158209U, 158848U, 158271U, 158918U, |
| 71334 | 180101U, 170858U, 165604U, 183572U, 175707U, 181438U, 173500U, 168264U, |
| 71335 | 186438U, 177971U, 156172U, 43940U, 79133U, 246691U, 110068U, 276131U, |
| 71336 | 190304U, 131215U, 297673U, 154255U, 41995U, 77080U, 244530U, 108037U, |
| 71337 | 273986U, 188439U, 129180U, 295588U, 160003U, 45846U, 81147U, 248813U, |
| 71338 | 112092U, 278237U, 193843U, 133243U, 299719U, 156593U, 44371U, 79587U, |
| 71339 | 247168U, 110513U, 276600U, 190712U, 131676U, 298127U, 154676U, 42426U, |
| 71340 | 77534U, 245007U, 108482U, 274455U, 188847U, 129641U, 296042U, 160386U, |
| 71341 | 46245U, 81572U, 249264U, 112502U, 278674U, 194216U, 57429U, 93346U, |
| 71342 | 261334U, 133666U, 300144U, 157147U, 44945U, 80194U, 247808U, 111101U, |
| 71343 | 277222U, 191253U, 132250U, 298734U, 155230U, 43000U, 78141U, 245647U, |
| 71344 | 109070U, 275077U, 189388U, 130215U, 296649U, 161058U, 46720U, 82080U, |
| 71345 | 249805U, 113027U, 279236U, 194878U, 57999U, 93755U, 261768U, 134180U, |
| 71346 | 300694U, 157772U, 45594U, 80880U, 248531U, 111764U, 277923U, 191865U, |
| 71347 | 132914U, 299420U, 155855U, 43649U, 78827U, 246370U, 109733U, 275778U, |
| 71348 | 190000U, 130879U, 297335U, 161824U, 47295U, 82695U, 250460U, 113653U, |
| 71349 | 279906U, 195634U, 58580U, 94176U, 262215U, 134807U, 301352U, 160606U, |
| 71350 | 112552U, 278728U, 194436U, 57665U, 93400U, 261392U, 133716U, 300198U, |
| 71351 | 161290U, 113090U, 279304U, 195110U, 58236U, 93810U, 261827U, 134243U, |
| 71352 | 300762U, 162044U, 113703U, 279960U, 195854U, 58816U, 94230U, 262273U, |
| 71353 | 134857U, 301406U, 62340U, 97477U, 265326U, 66943U, 101013U, 268353U, |
| 71354 | 73423U, 105360U, 271886U, 61619U, 96716U, 264665U, 66049U, 100146U, |
| 71355 | 267635U, 72497U, 104493U, 271168U, 63116U, 98297U, 266053U, 68508U, |
| 71356 | 102043U, 269247U, 75275U, 106504U, 272900U, 62618U, 97770U, 265600U, |
| 71357 | 67235U, 101322U, 268614U, 73715U, 105669U, 272147U, 61897U, 97009U, |
| 71358 | 264939U, 66341U, 100455U, 267896U, 72789U, 104802U, 271429U, 63349U, |
| 71359 | 98545U, 266288U, 68795U, 102337U, 269507U, 75610U, 41367U, 76415U, |
| 71360 | 243856U, 106836U, 273200U, 62724U, 97882U, 265683U, 67335U, 101428U, |
| 71361 | 268693U, 73815U, 105775U, 272226U, 62003U, 97121U, 265022U, 66441U, |
| 71362 | 100561U, 267975U, 72889U, 104908U, 271508U, 63437U, 98639U, 266359U, |
| 71363 | 68974U, 102487U, 269640U, 75801U, 41504U, 76561U, 243997U, 106986U, |
| 71364 | 273333U, 62965U, 98137U, 265900U, 67596U, 101686U, 268917U, 74076U, |
| 71365 | 106033U, 272450U, 62244U, 97376U, 265239U, 66702U, 100819U, 268199U, |
| 71366 | 73150U, 105166U, 271732U, 63636U, 98852U, 266543U, 69255U, 102731U, |
| 71367 | 269861U, 76109U, 41641U, 76707U, 244138U, 107230U, 273554U, 68906U, |
| 71368 | 102414U, 269589U, 75733U, 41444U, 76497U, 243943U, 106913U, 273282U, |
| 71369 | 69044U, 102533U, 269689U, 75871U, 41550U, 76610U, 244049U, 107032U, |
| 71370 | 273382U, 69368U, 102808U, 269943U, 76222U, 41718U, 76789U, 244225U, |
| 71371 | 107307U, 273636U, 68128U, 74787U, 62404U, 97544U, 265396U, 67018U, |
| 71372 | 101092U, 268420U, 73498U, 105439U, 271953U, 61683U, 96783U, 264735U, |
| 71373 | 66124U, 100225U, 267702U, 72572U, 104572U, 271235U, 63171U, 98355U, |
| 71374 | 266114U, 68605U, 102146U, 269343U, 75408U, 106645U, 273036U, 67741U, |
| 71375 | 74221U, 68109U, 74768U, 62381U, 97520U, 265371U, 66996U, 101069U, |
| 71376 | 268396U, 73476U, 105416U, 271929U, 61660U, 96759U, 264710U, 66102U, |
| 71377 | 100202U, 267678U, 72550U, 104549U, 271211U, 63151U, 98334U, 266092U, |
| 71378 | 68586U, 102126U, 269322U, 75389U, 106625U, 273015U, 67723U, 74203U, |
| 71379 | 179513U, 218135U, 169850U, 119583U, 285896U, 208294U, 142865U, 307817U, |
| 71380 | 164597U, 114372U, 280667U, 202709U, 137151U, 302056U, 182766U, 124890U, |
| 71381 | 291231U, 221047U, 148425U, 313420U, 174710U, 213463U, 179986U, 218594U, |
| 71382 | 175582U, 214322U, 181312U, 219732U, 177821U, 216504U, 179943U, 218551U, |
| 71383 | 175543U, 214283U, 181269U, 219689U, 177782U, 216465U, 66843U, 73307U, |
| 71384 | 65935U, 100026U, 267527U, 72362U, 104351U, 271037U, 68378U, 101905U, |
| 71385 | 269116U, 75091U, 106309U, 272709U, 68541U, 102078U, 269284U, 75326U, |
| 71386 | 106558U, 272957U, 65859U, 99946U, 267443U, 72244U, 104227U, 270907U, |
| 71387 | 68314U, 101837U, 269044U, 74991U, 106203U, 272597U, 68427U, 101957U, |
| 71388 | 269171U, 75176U, 106399U, 272804U, 66872U, 73352U, 65973U, 100066U, |
| 71389 | 267569U, 72421U, 104413U, 271102U, 68410U, 101939U, 269152U, 75141U, |
| 71390 | 106362U, 272765U, 68558U, 102096U, 269303U, 75361U, 106595U, 272996U, |
| 71391 | 65897U, 99986U, 267485U, 72303U, 104289U, 270972U, 68346U, 101871U, |
| 71392 | 269080U, 75041U, 106256U, 272653U, 68444U, 101975U, 269190U, 75211U, |
| 71393 | 106436U, 272843U, 69270U, 76124U, 68024U, 74643U, 181594U, 178311U, |
| 71394 | 25012U, 26689U, 4310U, 199341U, 180166U, 198824U, 175766U, 199456U, |
| 71395 | 181503U, 199043U, 178030U, 169577U, 50948U, 86522U, 254357U, 119310U, |
| 71396 | 285607U, 207992U, 142544U, 307477U, 164324U, 47461U, 82871U, 250646U, |
| 71397 | 114099U, 280378U, 202407U, 136830U, 301716U, 182506U, 54353U, 90087U, |
| 71398 | 257978U, 124625U, 290948U, 220802U, 148161U, 313137U, 179975U, 218583U, |
| 71399 | 170637U, 51425U, 87027U, 254853U, 120374U, 286611U, 209194U, 143771U, |
| 71400 | 308654U, 165397U, 47952U, 83391U, 251158U, 115177U, 281397U, 203622U, |
| 71401 | 138071U, 302908U, 183407U, 54757U, 90520U, 258409U, 125545U, 291832U, |
| 71402 | 221780U, 149174U, 314122U, 175572U, 214312U, 171507U, 52113U, 87737U, |
| 71403 | 255570U, 121197U, 287452U, 210082U, 144697U, 309604U, 166272U, 48655U, |
| 71404 | 84117U, 251892U, 116035U, 282275U, 204543U, 139032U, 303895U, 184358U, |
| 71405 | 55325U, 91114U, 259017U, 126294U, 292611U, 222782U, 150008U, 314992U, |
| 71406 | 181301U, 219721U, 173279U, 53696U, 89390U, 257241U, 123022U, 289315U, |
| 71407 | 211860U, 146541U, 311487U, 168057U, 50252U, 85785U, 253579U, 117874U, |
| 71408 | 284153U, 206334U, 140890U, 305793U, 186273U, 56643U, 92506U, 260440U, |
| 71409 | 127885U, 294259U, 224748U, 151615U, 316657U, 177811U, 216494U, 183822U, |
| 71410 | 222204U, 175914U, 214594U, 184562U, 222986U, 186757U, 225256U, 178119U, |
| 71411 | 216764U, 180180U, 218759U, 170927U, 51637U, 87253U, 255093U, 120618U, |
| 71412 | 286871U, 209440U, 144034U, 308934U, 165673U, 48179U, 83633U, 251415U, |
| 71413 | 115436U, 281673U, 203882U, 138349U, 303204U, 183626U, 54939U, 90717U, |
| 71414 | 258621U, 125753U, 292057U, 221986U, 59072U, 94503U, 262563U, 149398U, |
| 71415 | 314364U, 175779U, 214472U, 171589U, 52201U, 87831U, 255670U, 121285U, |
| 71416 | 287546U, 210164U, 144785U, 309698U, 166354U, 48743U, 84211U, 251992U, |
| 71417 | 116123U, 282369U, 204625U, 139120U, 303989U, 184422U, 55395U, 91190U, |
| 71418 | 259099U, 126364U, 292687U, 222846U, 59317U, 94740U, 262817U, 150078U, |
| 71419 | 315068U, 181517U, 219908U, 173569U, 53908U, 89616U, 257481U, 123266U, |
| 71420 | 289575U, 212106U, 146804U, 311767U, 168333U, 50479U, 86027U, 253836U, |
| 71421 | 118133U, 284429U, 206594U, 141168U, 306089U, 186492U, 56825U, 92703U, |
| 71422 | 260652U, 128093U, 294484U, 224978U, 60023U, 95468U, 263592U, 151839U, |
| 71423 | 316899U, 178043U, 216676U, 183957U, 235646U, 231865U, 242295U, 222354U, |
| 71424 | 238936U, 228044U, 230355U, 240804U, 232990U, 243483U, 176066U, 234787U, |
| 71425 | 214734U, 238077U, 184681U, 235900U, 231991U, 242429U, 223105U, 239190U, |
| 71426 | 228299U, 230508U, 240966U, 233116U, 243617U, 186870U, 236370U, 232117U, |
| 71427 | 242563U, 225369U, 239660U, 228782U, 230661U, 241128U, 233242U, 243751U, |
| 71428 | 178235U, 235166U, 216855U, 238456U, 23037U, 158526U, 7769U, 169547U, |
| 71429 | 50916U, 86488U, 254321U, 119278U, 285573U, 207962U, 142512U, 307443U, |
| 71430 | 164294U, 47429U, 82837U, 250610U, 114067U, 280344U, 202377U, 136798U, |
| 71431 | 301682U, 182468U, 54327U, 90059U, 257948U, 124599U, 290920U, 220764U, |
| 71432 | 148135U, 313109U, 179964U, 218572U, 170623U, 51410U, 87011U, 254836U, |
| 71433 | 120359U, 286595U, 209180U, 143756U, 308638U, 165383U, 47937U, 83375U, |
| 71434 | 251141U, 115162U, 281381U, 203608U, 138056U, 302892U, 183396U, 54745U, |
| 71435 | 90507U, 258395U, 125533U, 291819U, 221769U, 149162U, 314109U, 175562U, |
| 71436 | 214302U, 171493U, 52098U, 87721U, 255553U, 121182U, 287436U, 210068U, |
| 71437 | 144682U, 309588U, 166258U, 48640U, 84101U, 251875U, 116020U, 282259U, |
| 71438 | 204529U, 139017U, 303879U, 184347U, 55313U, 91101U, 259003U, 126282U, |
| 71439 | 292598U, 222771U, 149996U, 314979U, 181290U, 219710U, 173265U, 53681U, |
| 71440 | 89374U, 257224U, 123007U, 289299U, 211846U, 146526U, 311471U, 168043U, |
| 71441 | 50237U, 85769U, 253562U, 117859U, 284137U, 206320U, 140875U, 305777U, |
| 71442 | 186262U, 56631U, 92493U, 260426U, 127873U, 294246U, 224737U, 151603U, |
| 71443 | 316644U, 177801U, 216484U, 183811U, 222193U, 175904U, 214584U, 184551U, |
| 71444 | 222975U, 186746U, 225245U, 178109U, 216754U, 62361U, 97499U, 265349U, |
| 71445 | 66963U, 101034U, 268375U, 73443U, 105381U, 271908U, 61640U, 96738U, |
| 71446 | 264688U, 66069U, 100167U, 267657U, 72517U, 104514U, 271190U, 63134U, |
| 71447 | 98316U, 266073U, 68525U, 102061U, 269266U, 75292U, 106522U, 272919U, |
| 71448 | 62637U, 97790U, 265621U, 67253U, 101341U, 268634U, 73733U, 105688U, |
| 71449 | 272167U, 61916U, 97029U, 264960U, 66359U, 100474U, 267916U, 72807U, |
| 71450 | 104821U, 271449U, 63365U, 98562U, 266306U, 68810U, 102353U, 269524U, |
| 71451 | 75625U, 41383U, 76432U, 243874U, 106852U, 273217U, 62743U, 97902U, |
| 71452 | 265704U, 67353U, 101447U, 268713U, 73833U, 105794U, 272246U, 62022U, |
| 71453 | 97141U, 265043U, 66459U, 100580U, 267995U, 72907U, 104927U, 271528U, |
| 71454 | 63453U, 98656U, 266377U, 68989U, 102503U, 269657U, 75816U, 41520U, |
| 71455 | 76578U, 244015U, 107002U, 273350U, 62984U, 98157U, 265921U, 67614U, |
| 71456 | 101705U, 268937U, 74094U, 106052U, 272470U, 62263U, 97396U, 265260U, |
| 71457 | 66720U, 100838U, 268219U, 73168U, 105185U, 271752U, 63652U, 98869U, |
| 71458 | 266561U, 69284U, 102747U, 269878U, 76138U, 41657U, 76724U, 244156U, |
| 71459 | 107246U, 273571U, 67848U, 228874U, 230677U, 241145U, 74350U, 229088U, |
| 71460 | 226546U, 229258U, 239705U, 230842U, 241268U, 67861U, 228891U, 230695U, |
| 71461 | 241164U, 74401U, 229105U, 226564U, 229277U, 239725U, 230860U, 241287U, |
| 71462 | 68047U, 228922U, 230713U, 241183U, 74666U, 229136U, 226582U, 229296U, |
| 71463 | 239745U, 230878U, 241306U, 180091U, 218698U, 170845U, 51582U, 87194U, |
| 71464 | 255030U, 120548U, 286796U, 209357U, 143945U, 308839U, 165591U, 48124U, |
| 71465 | 83574U, 251352U, 115366U, 281598U, 203799U, 138260U, 303109U, 183562U, |
| 71466 | 54896U, 90670U, 258570U, 125698U, 291997U, 221921U, 59050U, 94479U, |
| 71467 | 262537U, 149327U, 314287U, 175698U, 214417U, 171563U, 52173U, 87801U, |
| 71468 | 255638U, 121257U, 287516U, 210138U, 144757U, 309668U, 166328U, 48715U, |
| 71469 | 84181U, 251960U, 116095U, 282339U, 204599U, 139092U, 303959U, 184402U, |
| 71470 | 55373U, 91166U, 259073U, 126342U, 292663U, 222826U, 59295U, 94716U, |
| 71471 | 262791U, 150056U, 315044U, 181428U, 219847U, 173487U, 53853U, 89557U, |
| 71472 | 257418U, 123196U, 289500U, 212023U, 146715U, 311672U, 168251U, 50424U, |
| 71473 | 85968U, 253773U, 118063U, 284354U, 206511U, 141079U, 305994U, 186428U, |
| 71474 | 56782U, 92656U, 260601U, 128038U, 294424U, 224913U, 60001U, 95444U, |
| 71475 | 263566U, 151768U, 316822U, 177962U, 216621U, 183900U, 235618U, 231835U, |
| 71476 | 242263U, 222282U, 238908U, 228014U, 230323U, 240770U, 232960U, 243451U, |
| 71477 | 175973U, 234761U, 214653U, 238051U, 184629U, 235872U, 231961U, 242397U, |
| 71478 | 223053U, 239162U, 228269U, 230476U, 240932U, 233086U, 243585U, 186824U, |
| 71479 | 236342U, 232087U, 242531U, 225323U, 239632U, 228752U, 230629U, 241094U, |
| 71480 | 233212U, 243719U, 178193U, 235140U, 216813U, 238430U, 21966U, 1599U, |
| 71481 | 3805U, 23029U, 184749U, 223218U, 176585U, 215346U, 222376U, 214753U, |
| 71482 | 199307U, 179919U, 218527U, 30593U, 198084U, 135750U, 170596U, 120330U, |
| 71483 | 286564U, 209153U, 29879U, 143727U, 28578U, 308607U, 31438U, 197350U, |
| 71484 | 135170U, 165356U, 115133U, 281350U, 203581U, 29688U, 138027U, 28377U, |
| 71485 | 302861U, 31227U, 199711U, 136282U, 183375U, 125510U, 291794U, 221748U, |
| 71486 | 30787U, 149139U, 28761U, 314084U, 31631U, 198773U, 175512U, 214252U, |
| 71487 | 30136U, 199422U, 181245U, 219665U, 30641U, 198375U, 135902U, 173238U, |
| 71488 | 122978U, 289268U, 211819U, 29915U, 146497U, 28616U, 311440U, 31478U, |
| 71489 | 197613U, 135322U, 168016U, 117830U, 284106U, 206293U, 29724U, 140846U, |
| 71490 | 28415U, 305746U, 31267U, 200010U, 136429U, 186241U, 127850U, 294221U, |
| 71491 | 224716U, 30845U, 151580U, 28823U, 316619U, 31697U, 198992U, 177760U, |
| 71492 | 216443U, 30246U, 180544U, 219108U, 171602U, 121299U, 287561U, 210177U, |
| 71493 | 144799U, 309713U, 166367U, 116137U, 282384U, 204638U, 139134U, 304004U, |
| 71494 | 184895U, 126451U, 292781U, 223364U, 150165U, 315162U, 176719U, 215488U, |
| 71495 | 184703U, 223154U, 176497U, 215241U, 225169U, 216721U, 197818U, 135486U, |
| 71496 | 169326U, 119077U, 285361U, 207741U, 29760U, 142311U, 28453U, 307231U, |
| 71497 | 31307U, 197084U, 134906U, 163963U, 113751U, 280012U, 202134U, 29569U, |
| 71498 | 136574U, 28252U, 301446U, 31096U, 199481U, 136066U, 182024U, 124291U, |
| 71499 | 290594U, 220405U, 30686U, 147947U, 28654U, 312909U, 31518U, 197850U, |
| 71500 | 135520U, 169380U, 119134U, 285421U, 207795U, 29800U, 142368U, 28495U, |
| 71501 | 307291U, 31351U, 197116U, 134940U, 164083U, 113877U, 280144U, 202210U, |
| 71502 | 29609U, 136654U, 28294U, 301530U, 31140U, 199507U, 136094U, 182126U, |
| 71503 | 124399U, 290708U, 220469U, 30720U, 148015U, 28690U, 312981U, 31556U, |
| 71504 | 199282U, 179461U, 218070U, 30560U, 198705U, 174596U, 213322U, 30040U, |
| 71505 | 197882U, 135554U, 169592U, 119326U, 285624U, 208007U, 29840U, 142560U, |
| 71506 | 28537U, 307494U, 31395U, 197148U, 134974U, 164339U, 114115U, 280395U, |
| 71507 | 202422U, 29649U, 136846U, 28336U, 301733U, 31184U, 199548U, 136122U, |
| 71508 | 182518U, 124638U, 290962U, 220814U, 30754U, 148174U, 28726U, 313151U, |
| 71509 | 31594U, 197834U, 135503U, 169342U, 119094U, 285379U, 207757U, 29780U, |
| 71510 | 142328U, 28474U, 307249U, 31329U, 197100U, 134923U, 163979U, 113768U, |
| 71511 | 280030U, 202150U, 29589U, 136591U, 28273U, 301464U, 31118U, 199494U, |
| 71512 | 136080U, 182037U, 124305U, 290609U, 220418U, 30703U, 147961U, 28672U, |
| 71513 | 312924U, 31537U, 197866U, 135537U, 169396U, 119151U, 285439U, 207811U, |
| 71514 | 29820U, 142385U, 28516U, 307309U, 31373U, 197132U, 134957U, 164099U, |
| 71515 | 113894U, 280162U, 202226U, 29629U, 136671U, 28315U, 301548U, 31162U, |
| 71516 | 199520U, 136108U, 182268U, 124413U, 290723U, 220611U, 30737U, 148029U, |
| 71517 | 28708U, 312996U, 31575U, 197898U, 135571U, 169720U, 119461U, 285766U, |
| 71518 | 208135U, 29860U, 142695U, 28558U, 307636U, 31417U, 197164U, 134991U, |
| 71519 | 164467U, 114250U, 280537U, 202550U, 29669U, 136981U, 28357U, 301875U, |
| 71520 | 31206U, 199561U, 136136U, 182625U, 124752U, 291083U, 220921U, 30771U, |
| 71521 | 148288U, 28744U, 313272U, 31613U, 199470U, 181604U, 219985U, 30671U, |
| 71522 | 199065U, 178320U, 216939U, 30287U, 224830U, 216567U, 198116U, 170742U, |
| 71523 | 198783U, 175635U, 198407U, 173384U, 199002U, 177899U, 224818U, 216544U, |
| 71524 | 198130U, 170801U, 198793U, 175678U, 198421U, 173443U, 199012U, 177942U, |
| 71525 | 218638U, 214362U, 219776U, 216555U, 179448U, 169735U, 164482U, 182675U, |
| 71526 | 174584U, 199382U, 198324U, 197562U, 199968U, 198924U, 199318U, 198180U, |
| 71527 | 197418U, 199767U, 198803U, 199433U, 198471U, 197681U, 200066U, 199022U, |
| 71528 | 199889U, 223127U, 198880U, 215216U, 199921U, 223186U, 198893U, 215316U, |
| 71529 | 199533U, 220638U, 196650U, 201593U, 184735U, 176572U, 156220U, 110119U, |
| 71530 | 276185U, 154303U, 108088U, 274040U, 160042U, 112134U, 278282U, 156621U, |
| 71531 | 110543U, 276632U, 154704U, 108512U, 274487U, 160618U, 112565U, 278742U, |
| 71532 | 157189U, 111146U, 277270U, 155272U, 109115U, 275125U, 161312U, 113103U, |
| 71533 | 279318U, 157800U, 111794U, 277955U, 155883U, 109763U, 275810U, 162066U, |
| 71534 | 113716U, 279974U, 199856U, 136377U, 183936U, 226460U, 125880U, 292180U, |
| 71535 | 222333U, 30817U, 149580U, 28793U, 314546U, 31665U, 198837U, 176047U, |
| 71536 | 226434U, 214715U, 30164U, 220624U, 201580U, 216949U, 180556U, 219120U, |
| 71537 | 171617U, 121315U, 287578U, 210192U, 144815U, 309730U, 166382U, 116153U, |
| 71538 | 282401U, 204653U, 139150U, 304021U, 184907U, 126464U, 292795U, 223376U, |
| 71539 | 150178U, 315176U, 176730U, 215499U, 199879U, 136402U, 184671U, 226474U, |
| 71540 | 126440U, 292769U, 223095U, 30831U, 150154U, 28808U, 315150U, 31681U, |
| 71541 | 201476U, 180569U, 219133U, 171633U, 121332U, 287596U, 210208U, 144832U, |
| 71542 | 309748U, 166398U, 116170U, 282419U, 204669U, 139167U, 304039U, 184920U, |
| 71543 | 126478U, 292810U, 223389U, 150192U, 315191U, 176742U, 215511U, 223141U, |
| 71544 | 215229U, 200089U, 136469U, 186860U, 226488U, 128295U, 294699U, 225359U, |
| 71545 | 30875U, 152041U, 28855U, 317114U, 31731U, 199056U, 178226U, 226447U, |
| 71546 | 216846U, 30274U, 199330U, 180145U, 218738U, 30608U, 198195U, 135784U, |
| 71547 | 170900U, 120589U, 286840U, 209413U, 29897U, 144005U, 28597U, 308903U, |
| 71548 | 31458U, 197433U, 135204U, 165646U, 115407U, 281642U, 203855U, 29706U, |
| 71549 | 138320U, 28396U, 303173U, 31247U, 199779U, 136310U, 183605U, 125730U, |
| 71550 | 292032U, 221965U, 30802U, 149375U, 28777U, 314339U, 31648U, 198814U, |
| 71551 | 175747U, 214453U, 30150U, 199445U, 181482U, 219887U, 30656U, 198486U, |
| 71552 | 135936U, 173542U, 123237U, 289544U, 212079U, 29933U, 146775U, 28635U, |
| 71553 | 311736U, 31498U, 197696U, 135356U, 168306U, 118104U, 284398U, 206567U, |
| 71554 | 29742U, 141139U, 28434U, 306058U, 31287U, 200078U, 136457U, 186471U, |
| 71555 | 128070U, 294459U, 224957U, 30860U, 151816U, 28839U, 316874U, 31714U, |
| 71556 | 199033U, 178011U, 216657U, 30260U, 215191U, 215202U, 199102U, 179195U, |
| 71557 | 199903U, 184717U, 223168U, 3685U, 223200U, 215329U, 199935U, 184877U, |
| 71558 | 223346U, 3704U, 68273U, 74932U, 67648U, 101741U, 268975U, 74128U, |
| 71559 | 106088U, 272508U, 66754U, 100874U, 268257U, 73202U, 105221U, 271790U, |
| 71560 | 69397U, 102839U, 269976U, 76251U, 107338U, 273669U, 68060U, 74679U, |
| 71561 | 157911U, 159157U, 196236U, 200489U, 196433U, 201043U, 17188U, 1776U, |
| 71562 | 4055U, 1665U, 3923U, 169532U, 50900U, 86471U, 254303U, 119262U, |
| 71563 | 285556U, 207947U, 142496U, 307426U, 164279U, 47413U, 82820U, 250592U, |
| 71564 | 114051U, 280327U, 202362U, 136782U, 301665U, 182456U, 54314U, 90045U, |
| 71565 | 257933U, 124586U, 290906U, 220752U, 148122U, 313095U, 180070U, 218677U, |
| 71566 | 170788U, 51536U, 87145U, 254978U, 120502U, 286747U, 209314U, 143899U, |
| 71567 | 308790U, 165534U, 48063U, 83509U, 251283U, 115305U, 281533U, 203742U, |
| 71568 | 138199U, 303044U, 183517U, 54847U, 90617U, 258513U, 125649U, 291944U, |
| 71569 | 221876U, 59039U, 94467U, 262524U, 149278U, 314234U, 175669U, 214398U, |
| 71570 | 171550U, 52159U, 87786U, 255622U, 121243U, 287501U, 210125U, 144743U, |
| 71571 | 309653U, 166315U, 48701U, 84166U, 251944U, 116081U, 282324U, 204586U, |
| 71572 | 139078U, 303944U, 184392U, 55362U, 91154U, 259060U, 126331U, 292651U, |
| 71573 | 222816U, 59284U, 94704U, 262778U, 150045U, 315032U, 181396U, 219815U, |
| 71574 | 173430U, 53807U, 89508U, 257366U, 123150U, 289451U, 211980U, 146669U, |
| 71575 | 311623U, 168194U, 50363U, 85903U, 253704U, 118002U, 284289U, 206454U, |
| 71576 | 141018U, 305929U, 186383U, 56733U, 92603U, 260544U, 127989U, 294371U, |
| 71577 | 224868U, 59990U, 95432U, 263553U, 151719U, 316769U, 177933U, 216602U, |
| 71578 | 183879U, 235604U, 231820U, 242247U, 222261U, 238894U, 227999U, 230307U, |
| 71579 | 240753U, 232945U, 243435U, 175954U, 234748U, 214634U, 238038U, 184619U, |
| 71580 | 235858U, 231946U, 242381U, 223043U, 239148U, 228254U, 230460U, 240915U, |
| 71581 | 233071U, 243569U, 186814U, 236328U, 232072U, 242515U, 225313U, 239618U, |
| 71582 | 228737U, 230613U, 241077U, 233197U, 243703U, 178184U, 235127U, 216804U, |
| 71583 | 238417U, 162326U, 200527U, 162906U, 201094U, 17643U, 23965U, 180115U, |
| 71584 | 218708U, 170875U, 51596U, 87209U, 255046U, 120562U, 286811U, 209370U, |
| 71585 | 143959U, 308854U, 165621U, 48138U, 83589U, 251368U, 115380U, 281613U, |
| 71586 | 203812U, 138274U, 303124U, 183586U, 54907U, 90682U, 258583U, 125709U, |
| 71587 | 292009U, 221931U, 149338U, 314299U, 175720U, 214426U, 181452U, 219857U, |
| 71588 | 173517U, 53867U, 89572U, 257434U, 123210U, 289515U, 212036U, 146729U, |
| 71589 | 311687U, 168281U, 50438U, 85983U, 253789U, 118077U, 284369U, 206524U, |
| 71590 | 141093U, 306009U, 186452U, 56793U, 92668U, 260614U, 128049U, 294436U, |
| 71591 | 224923U, 151779U, 316834U, 177984U, 216630U, 171038U, 51738U, 209597U, |
| 71592 | 165803U, 48280U, 204058U, 183979U, 55019U, 222390U, 172534U, 52993U, |
| 71593 | 211115U, 167312U, 49549U, 205589U, 185660U, 56057U, 224135U, 177445U, |
| 71594 | 124223U, 290521U, 175993U, 124210U, 290507U, 179550U, 218172U, 169982U, |
| 71595 | 119723U, 285971U, 208471U, 143053U, 307943U, 164729U, 114512U, 280742U, |
| 71596 | 202886U, 137339U, 302182U, 182874U, 125006U, 291294U, 221191U, 148580U, |
| 71597 | 313525U, 174771U, 213524U, 180227U, 218792U, 170997U, 51694U, 87314U, |
| 71598 | 255140U, 120675U, 286915U, 209538U, 144139U, 309029U, 165743U, 48236U, |
| 71599 | 83694U, 251462U, 115493U, 281717U, 203980U, 138454U, 303299U, 183791U, |
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| 71601 | 175874U, 214554U, 172493U, 52949U, 88623U, 256451U, 122210U, 288474U, |
| 71602 | 211056U, 145710U, 310626U, 167271U, 49505U, 85018U, 252789U, 117062U, |
| 71603 | 283312U, 205530U, 140059U, 304932U, 185628U, 56022U, 91862U, 259770U, |
| 71604 | 127211U, 293553U, 224088U, 150925U, 315934U, 181833U, 220214U, 174155U, |
| 71605 | 123836U, 290127U, 212782U, 147470U, 312421U, 168919U, 118703U, 284981U, |
| 71606 | 207270U, 141834U, 306743U, 187217U, 128614U, 295000U, 225788U, 152438U, |
| 71607 | 317499U, 178818U, 217448U, 181732U, 220113U, 173981U, 54111U, 89830U, |
| 71608 | 257706U, 123650U, 289981U, 212518U, 147188U, 312173U, 168745U, 50682U, |
| 71609 | 86241U, 254061U, 118517U, 284835U, 207006U, 141552U, 306495U, 187079U, |
| 71610 | 56995U, 92884U, 260844U, 128464U, 294881U, 225578U, 152210U, 317296U, |
| 71611 | 178587U, 217217U, 179678U, 218300U, 170158U, 119911U, 286154U, 208665U, |
| 71612 | 143260U, 308146U, 164905U, 114700U, 280925U, 203080U, 137546U, 302385U, |
| 71613 | 183014U, 125158U, 291444U, 221346U, 148748U, 313692U, 175021U, 213774U, |
| 71614 | 181745U, 220126U, 173997U, 54128U, 89848U, 257725U, 123667U, 289999U, |
| 71615 | 212534U, 147205U, 312191U, 168761U, 50699U, 86259U, 254080U, 118534U, |
| 71616 | 284853U, 207022U, 141569U, 306513U, 187092U, 57009U, 92899U, 260860U, |
| 71617 | 128478U, 294896U, 225591U, 152224U, 317311U, 178614U, 217244U, 179691U, |
| 71618 | 218313U, 170174U, 119928U, 286172U, 208681U, 143277U, 308164U, 164921U, |
| 71619 | 114717U, 280943U, 203096U, 137563U, 302403U, 183027U, 125172U, 291459U, |
| 71620 | 221359U, 148762U, 313707U, 175048U, 213801U, 179482U, 218091U, 169794U, |
| 71621 | 119523U, 285832U, 208193U, 142757U, 307702U, 164541U, 114312U, 280603U, |
| 71622 | 202608U, 137043U, 301941U, 182722U, 124842U, 291179U, 220967U, 148338U, |
| 71623 | 313326U, 174636U, 213362U, 179794U, 218416U, 170306U, 51150U, 86735U, |
| 71624 | 254581U, 120039U, 286290U, 208880U, 143436U, 308333U, 165053U, 47663U, |
| 71625 | 83084U, 250870U, 114828U, 281061U, 203295U, 137722U, 302572U, 183132U, |
| 71626 | 54522U, 90267U, 258169U, 125262U, 291556U, 221519U, 148891U, 313846U, |
| 71627 | 175284U, 214037U, 180672U, 219236U, 171836U, 52366U, 88006U, 255855U, |
| 71628 | 121548U, 287825U, 210433U, 145048U, 309977U, 166601U, 48908U, 84386U, |
| 71629 | 252177U, 116386U, 282648U, 204894U, 139383U, 304268U, 185084U, 55530U, |
| 71630 | 91335U, 259254U, 126655U, 293000U, 223572U, 150369U, 315381U, 176892U, |
| 71631 | 215705U, 179571U, 218193U, 170009U, 119752U, 286002U, 208498U, 143082U, |
| 71632 | 307974U, 164756U, 114541U, 280773U, 202913U, 137368U, 302213U, 182895U, |
| 71633 | 125029U, 291319U, 221212U, 148603U, 313550U, 174815U, 213568U, 181892U, |
| 71634 | 220273U, 174199U, 123883U, 290177U, 212826U, 147517U, 312471U, 168963U, |
| 71635 | 118750U, 285031U, 207314U, 141881U, 306793U, 187252U, 128652U, 295041U, |
| 71636 | 225823U, 152476U, 317540U, 178941U, 217571U, 179605U, 218227U, 170052U, |
| 71637 | 119798U, 286051U, 208559U, 143147U, 308043U, 164799U, 114587U, 280822U, |
| 71638 | 202974U, 137433U, 302282U, 182929U, 125066U, 291359U, 221261U, 148656U, |
| 71639 | 313607U, 174873U, 213626U, 181939U, 220320U, 174258U, 123946U, 290244U, |
| 71640 | 212903U, 147599U, 312558U, 169022U, 118813U, 285098U, 207391U, 141963U, |
| 71641 | 306880U, 187299U, 128703U, 295096U, 225885U, 152543U, 317612U, 179039U, |
| 71642 | 217669U, 181722U, 220103U, 173952U, 123619U, 289948U, 212489U, 147157U, |
| 71643 | 312140U, 168716U, 118486U, 284802U, 206977U, 141521U, 306462U, 187056U, |
| 71644 | 128439U, 294854U, 225555U, 152185U, 317269U, 178566U, 217196U, 68214U, |
| 71645 | 74873U, 67480U, 101563U, 268803U, 73960U, 105910U, 272336U, 66586U, |
| 71646 | 100696U, 268085U, 73034U, 105043U, 271618U, 69160U, 102629U, 269765U, |
| 71647 | 75999U, 107128U, 273458U, 67955U, 74544U, 170319U, 51164U, 86750U, |
| 71648 | 254597U, 120053U, 286305U, 208893U, 143450U, 308348U, 165066U, 47677U, |
| 71649 | 83099U, 250886U, 114842U, 281076U, 203308U, 137736U, 302587U, 183142U, |
| 71650 | 54533U, 90279U, 258182U, 125273U, 291568U, 221529U, 148902U, 313858U, |
| 71651 | 170452U, 51243U, 86834U, 254649U, 120177U, 286402U, 209009U, 143574U, |
| 71652 | 308445U, 165212U, 47770U, 83198U, 250954U, 114980U, 281188U, 203437U, |
| 71653 | 137874U, 302699U, 183258U, 54608U, 90360U, 258238U, 125384U, 291659U, |
| 71654 | 221631U, 149013U, 313949U, 172218U, 52675U, 88333U, 256163U, 121936U, |
| 71655 | 288201U, 210798U, 145436U, 310353U, 166996U, 49231U, 84728U, 252501U, |
| 71656 | 116788U, 283039U, 205272U, 139785U, 304659U, 185404U, 55796U, 91620U, |
| 71657 | 259527U, 126985U, 293325U, 223878U, 150699U, 315706U, 180534U, 219098U, |
| 71658 | 176682U, 215443U, 171897U, 52431U, 88075U, 255928U, 121613U, 287894U, |
| 71659 | 210494U, 145113U, 310046U, 166662U, 48973U, 84455U, 252250U, 116451U, |
| 71660 | 282717U, 204955U, 139448U, 304337U, 185133U, 55583U, 91392U, 259315U, |
| 71661 | 126708U, 293057U, 223621U, 150422U, 315438U, 179859U, 218467U, 175418U, |
| 71662 | 214158U, 179503U, 218112U, 169837U, 119569U, 285881U, 208281U, 142851U, |
| 71663 | 307802U, 164584U, 114358U, 280652U, 202696U, 137137U, 302041U, 182756U, |
| 71664 | 124879U, 291219U, 221037U, 148414U, 313408U, 174680U, 213406U, 181758U, |
| 71665 | 220139U, 174013U, 123684U, 290017U, 212595U, 147270U, 312260U, 168777U, |
| 71666 | 118551U, 284871U, 207083U, 141634U, 306582U, 187105U, 128492U, 294911U, |
| 71667 | 225640U, 152277U, 317368U, 178634U, 217264U, 68150U, 74809U, 67773U, |
| 71668 | 74264U, 169867U, 119601U, 285915U, 208311U, 142883U, 307836U, 164614U, |
| 71669 | 114390U, 280686U, 202726U, 137169U, 302075U, 182780U, 124905U, 291247U, |
| 71670 | 221061U, 148440U, 313436U, 170405U, 51193U, 86781U, 254630U, 120127U, |
| 71671 | 286384U, 208962U, 143524U, 308427U, 165152U, 47706U, 83130U, 250919U, |
| 71672 | 114916U, 281155U, 203377U, 137810U, 302666U, 183210U, 54556U, 90304U, |
| 71673 | 258209U, 125332U, 291632U, 221583U, 148961U, 313922U, 172171U, 52625U, |
| 71674 | 88280U, 256144U, 121886U, 288183U, 210751U, 145386U, 310335U, 166936U, |
| 71675 | 49167U, 84660U, 252466U, 116724U, 283006U, 205212U, 139721U, 304626U, |
| 71676 | 185356U, 55744U, 91564U, 259498U, 126933U, 293298U, 223830U, 150647U, |
| 71677 | 315679U, 174080U, 123756U, 290094U, 212662U, 147342U, 312337U, 168844U, |
| 71678 | 118623U, 284948U, 207150U, 141706U, 306659U, 187157U, 128549U, 294973U, |
| 71679 | 225692U, 152334U, 317430U, 200302U, 226290U, 200243U, 226221U, 68286U, |
| 71680 | 74945U, 68072U, 74691U, 179640U, 218262U, 170111U, 119861U, 286101U, |
| 71681 | 208618U, 143210U, 308093U, 164858U, 114650U, 280872U, 203033U, 137496U, |
| 71682 | 302332U, 182976U, 125117U, 291400U, 221308U, 148707U, 313648U, 213151U, |
| 71683 | 147863U, 312821U, 207639U, 142227U, 307143U, 226085U, 152759U, 317830U, |
| 71684 | 174952U, 213705U, 180335U, 218900U, 171121U, 120786U, 287016U, 209680U, |
| 71685 | 144269U, 309150U, 165886U, 115624U, 281839U, 204141U, 138604U, 303441U, |
| 71686 | 184047U, 125958U, 292250U, 222458U, 149658U, 314616U, 213171U, 147884U, |
| 71687 | 312843U, 207659U, 142248U, 307165U, 226102U, 152777U, 317849U, 176119U, |
| 71688 | 214800U, 210224U, 204685U, 223402U, 208800U, 203215U, 221454U, 180861U, |
| 71689 | 219397U, 172617U, 122321U, 288575U, 211198U, 145840U, 310747U, 167395U, |
| 71690 | 117173U, 283413U, 205672U, 140189U, 305053U, 185728U, 127301U, 293636U, |
| 71691 | 224203U, 151031U, 316034U, 213191U, 147905U, 312865U, 207679U, 142269U, |
| 71692 | 307187U, 226119U, 152795U, 317868U, 177199U, 215986U, 181974U, 220355U, |
| 71693 | 174317U, 124009U, 290294U, 212962U, 147662U, 312608U, 169081U, 118876U, |
| 71694 | 285148U, 207450U, 142026U, 306930U, 187346U, 128754U, 295137U, 225932U, |
| 71695 | 152594U, 317653U, 213211U, 147926U, 312887U, 207699U, 142290U, 307209U, |
| 71696 | 226136U, 152813U, 317887U, 179121U, 217751U, 68199U, 74858U, 67385U, |
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| 71698 | 187519U, 226332U, 30917U, 200292U, 187509U, 226270U, 30903U, 66982U, |
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| 71700 | 102114U, 75378U, 106613U, 62568U, 97717U, 67188U, 101272U, 73668U, |
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| 71702 | 98501U, 68757U, 102296U, 75572U, 106795U, 179538U, 218160U, 169946U, |
| 71703 | 119685U, 208390U, 142967U, 164693U, 114474U, 202805U, 137253U, 182844U, |
| 71704 | 124974U, 221125U, 148509U, 174746U, 213499U, 180201U, 218780U, 170940U, |
| 71705 | 51651U, 87268U, 120632U, 209453U, 144048U, 165686U, 48193U, 83648U, |
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| 71718 | 122273U, 211153U, 145792U, 167350U, 49589U, 85085U, 117125U, 205627U, |
| 71719 | 140141U, 185692U, 56091U, 91917U, 127262U, 224167U, 150992U, 177179U, |
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| 71723 | 101532U, 73931U, 105879U, 62107U, 97231U, 66557U, 100665U, 73005U, |
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| 71726 | 102169U, 75454U, 106668U, 62655U, 97809U, 67270U, 101359U, 73750U, |
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| 71730 | 105027U, 63535U, 98744U, 69148U, 102616U, 75987U, 107115U, 67708U, |
| 71731 | 101805U, 74188U, 106152U, 66814U, 100938U, 73262U, 105285U, 69457U, |
| 71732 | 102891U, 76323U, 107390U, 67694U, 101790U, 74174U, 106137U, 66800U, |
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| 71736 | 148627U, 313576U, 198272U, 135847U, 209565U, 144168U, 309060U, 197510U, |
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| 71741 | 141928U, 306843U, 200171U, 136558U, 225858U, 152514U, 317581U, 65158U, |
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| 71744 | 286962U, 209617U, 144202U, 309096U, 165823U, 48301U, 83741U, 251512U, |
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| 71751 | 277355U, 191357U, 132376U, 298852U, 155347U, 43111U, 78259U, 245772U, |
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| 71753 | 249909U, 113168U, 279388U, 195182U, 134322U, 300834U, 177433U, 216225U, |
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| 71755 | 190740U, 131706U, 298159U, 154717U, 42456U, 77566U, 245041U, 108526U, |
| 71756 | 274502U, 188875U, 129671U, 296074U, 160628U, 46269U, 81598U, 249292U, |
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| 71759 | 132440U, 298920U, 155407U, 43175U, 78327U, 245844U, 109259U, 275278U, |
| 71760 | 189552U, 130405U, 296835U, 161420U, 46862U, 82233U, 249969U, 113220U, |
| 71761 | 279444U, 195230U, 134374U, 300890U, 177494U, 216273U, 180362U, 218927U, |
| 71762 | 156690U, 44461U, 79683U, 247270U, 110617U, 276711U, 190796U, 131766U, |
| 71763 | 298223U, 154773U, 42516U, 77630U, 245109U, 108586U, 274566U, 188931U, |
| 71764 | 129731U, 296138U, 160682U, 46317U, 81650U, 249348U, 112624U, 278806U, |
| 71765 | 194502U, 133777U, 300264U, 176144U, 214825U, 181012U, 219534U, 157294U, |
| 71766 | 45088U, 80346U, 247969U, 111258U, 277389U, 191387U, 132408U, 298886U, |
| 71767 | 155377U, 43143U, 78293U, 245808U, 109227U, 275244U, 189522U, 130373U, |
| 71768 | 296801U, 161396U, 46836U, 82205U, 249939U, 113194U, 279416U, 195206U, |
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| 71787 | 274518U, 188889U, 129686U, 296090U, 160639U, 46281U, 81611U, 249306U, |
| 71788 | 112588U, 278767U, 194459U, 133741U, 300225U, 176005U, 214673U, 181051U, |
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| 71790 | 132456U, 298937U, 155422U, 43191U, 78344U, 245862U, 109275U, 275295U, |
| 71791 | 189567U, 130421U, 296852U, 161432U, 46875U, 82247U, 249984U, 113233U, |
| 71792 | 279458U, 195242U, 134387U, 300904U, 177506U, 216285U, 180374U, 218939U, |
| 71793 | 156704U, 44476U, 79699U, 247287U, 110632U, 276727U, 190810U, 131781U, |
| 71794 | 298239U, 154787U, 42531U, 77646U, 245126U, 108601U, 274582U, 188945U, |
| 71795 | 129746U, 296154U, 160693U, 46329U, 81663U, 249362U, 112636U, 278819U, |
| 71796 | 194513U, 133789U, 300277U, 176155U, 214836U, 181025U, 219547U, 157309U, |
| 71797 | 45104U, 80363U, 247987U, 111274U, 277406U, 191402U, 132424U, 298903U, |
| 71798 | 155392U, 43159U, 78310U, 245826U, 109243U, 275261U, 189537U, 130389U, |
| 71799 | 296818U, 161408U, 46849U, 82219U, 249954U, 113207U, 279430U, 195218U, |
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| 71803 | 160671U, 46305U, 81637U, 249334U, 112612U, 278793U, 194491U, 133765U, |
| 71804 | 300251U, 176027U, 214695U, 181077U, 219599U, 157369U, 45168U, 80431U, |
| 71805 | 248059U, 111338U, 277474U, 191462U, 132488U, 298971U, 155452U, 43223U, |
| 71806 | 78378U, 245898U, 109307U, 275329U, 189597U, 130453U, 296886U, 161456U, |
| 71807 | 46901U, 82275U, 250014U, 113259U, 279486U, 195266U, 134413U, 300932U, |
| 71808 | 177530U, 216309U, 180398U, 218963U, 156732U, 44506U, 79731U, 247321U, |
| 71809 | 110662U, 276759U, 190838U, 131811U, 298271U, 154815U, 42561U, 77678U, |
| 71810 | 245160U, 108631U, 274614U, 188973U, 129776U, 296186U, 160715U, 46353U, |
| 71811 | 81689U, 249390U, 112660U, 278845U, 194535U, 133813U, 300303U, 176177U, |
| 71812 | 214858U, 66829U, 73277U, 66858U, 73322U, 169918U, 119655U, 285933U, |
| 71813 | 208362U, 142937U, 307854U, 164665U, 114444U, 280704U, 202777U, 137223U, |
| 71814 | 302093U, 182822U, 124950U, 291262U, 221103U, 148485U, 313451U, 179849U, |
| 71815 | 218457U, 165184U, 47740U, 83166U, 250938U, 114950U, 281173U, 203409U, |
| 71816 | 137844U, 302684U, 183236U, 54584U, 90334U, 258225U, 125360U, 291647U, |
| 71817 | 221609U, 148989U, 313937U, 169751U, 119477U, 285783U, 208150U, 142711U, |
| 71818 | 307653U, 164498U, 114266U, 280554U, 202565U, 136997U, 301892U, 182688U, |
| 71819 | 124805U, 291139U, 220933U, 148301U, 313286U, 170218U, 51104U, 86686U, |
| 71820 | 254529U, 119945U, 286190U, 208770U, 143342U, 308233U, 164965U, 47617U, |
| 71821 | 83035U, 250818U, 114734U, 280961U, 203185U, 137628U, 302472U, 183062U, |
| 71822 | 54485U, 90227U, 258126U, 125186U, 291474U, 221430U, 148815U, 313764U, |
| 71823 | 170482U, 51275U, 86868U, 254685U, 120209U, 286436U, 209039U, 143606U, |
| 71824 | 308479U, 165242U, 47802U, 83232U, 250990U, 115012U, 281222U, 203467U, |
| 71825 | 137906U, 302733U, 183282U, 54634U, 90388U, 258268U, 125410U, 291687U, |
| 71826 | 221655U, 149039U, 313977U, 173140U, 53563U, 89249U, 257092U, 122874U, |
| 71827 | 289158U, 211721U, 146393U, 311330U, 167918U, 50119U, 85644U, 253430U, |
| 71828 | 117726U, 283996U, 206195U, 140742U, 305636U, 186161U, 56534U, 92389U, |
| 71829 | 260315U, 127764U, 294129U, 224636U, 151494U, 316527U, 171649U, 52215U, |
| 71830 | 87846U, 255686U, 121349U, 287614U, 210246U, 144849U, 309766U, 166414U, |
| 71831 | 48757U, 84226U, 252008U, 116187U, 282437U, 204707U, 139184U, 304057U, |
| 71832 | 184933U, 55406U, 91202U, 259112U, 126492U, 292825U, 223421U, 150206U, |
| 71833 | 315206U, 173816U, 123489U, 289810U, 212353U, 147027U, 312002U, 168580U, |
| 71834 | 118356U, 284664U, 206841U, 141391U, 306324U, 186947U, 128333U, 294740U, |
| 71835 | 225446U, 152079U, 317155U, 199293U, 179879U, 218487U, 30575U, 198760U, |
| 71836 | 175475U, 214215U, 30119U, 199408U, 181218U, 219638U, 30623U, 198979U, |
| 71837 | 177735U, 216418U, 30229U, 65306U, 71217U, 180044U, 218651U, 61077U, |
| 71838 | 96137U, 264198U, 64643U, 99342U, 266966U, 70352U, 103361U, 270407U, |
| 71839 | 170756U, 51502U, 87109U, 254940U, 120468U, 286711U, 209282U, 143865U, |
| 71840 | 308754U, 60785U, 95826U, 263950U, 64273U, 98976U, 266654U, 69982U, |
| 71841 | 102995U, 270095U, 165502U, 48029U, 83473U, 251245U, 115271U, 281497U, |
| 71842 | 203710U, 138165U, 303008U, 61322U, 96399U, 264398U, 65456U, 99661U, |
| 71843 | 267232U, 71439U, 103680U, 270673U, 183491U, 54819U, 90587U, 258481U, |
| 71844 | 125621U, 291914U, 221850U, 149250U, 314204U, 65105U, 70852U, 175645U, |
| 71845 | 214374U, 65352U, 71305U, 181370U, 219789U, 61214U, 96283U, 264313U, |
| 71846 | 64799U, 99479U, 267074U, 70508U, 103498U, 270515U, 173398U, 53773U, |
| 71847 | 89472U, 257328U, 123116U, 289415U, 211948U, 146635U, 311587U, 60951U, |
| 71848 | 96003U, 264098U, 64456U, 99142U, 266793U, 70165U, 103161U, 270234U, |
| 71849 | 168162U, 50329U, 85867U, 253666U, 117968U, 284253U, 206422U, 140984U, |
| 71850 | 305893U, 61455U, 96543U, 264519U, 65628U, 99824U, 267344U, 71611U, |
| 71851 | 103843U, 270785U, 186357U, 56705U, 92573U, 260512U, 127961U, 294341U, |
| 71852 | 224842U, 151691U, 316739U, 65197U, 71015U, 177909U, 216578U, 65319U, |
| 71853 | 71230U, 60802U, 95844U, 263969U, 64289U, 98993U, 266672U, 69998U, |
| 71854 | 103012U, 270113U, 165563U, 48094U, 83542U, 251318U, 115336U, 281566U, |
| 71855 | 203771U, 138230U, 303077U, 61336U, 96414U, 264414U, 65469U, 99675U, |
| 71856 | 267247U, 71452U, 103694U, 270688U, 183540U, 54872U, 90644U, 258542U, |
| 71857 | 125674U, 291971U, 221899U, 149303U, 314261U, 181406U, 219825U, 168223U, |
| 71858 | 50394U, 85936U, 253739U, 118033U, 284322U, 206483U, 141049U, 305962U, |
| 71859 | 186406U, 56758U, 92630U, 260573U, 128014U, 294398U, 224891U, 151744U, |
| 71860 | 316796U, 65330U, 71283U, 60923U, 95973U, 264066U, 64430U, 99114U, |
| 71861 | 266763U, 70139U, 103133U, 270204U, 166968U, 49201U, 84696U, 252485U, |
| 71862 | 116758U, 283024U, 205244U, 139755U, 304644U, 61433U, 96519U, 264493U, |
| 71863 | 65608U, 99802U, 267320U, 71591U, 103821U, 270761U, 185382U, 55772U, |
| 71864 | 91594U, 259514U, 126961U, 293313U, 223856U, 150675U, 315694U, 169766U, |
| 71865 | 119493U, 285800U, 208165U, 142727U, 307670U, 164513U, 114282U, 280571U, |
| 71866 | 202580U, 137013U, 301909U, 182700U, 124818U, 291153U, 220945U, 148314U, |
| 71867 | 313300U, 170233U, 51120U, 86703U, 254547U, 119961U, 286207U, 208785U, |
| 71868 | 143358U, 308250U, 164980U, 47633U, 83052U, 250836U, 114750U, 280978U, |
| 71869 | 203200U, 137644U, 302489U, 183074U, 54498U, 90241U, 258141U, 125199U, |
| 71870 | 291488U, 221442U, 148828U, 313778U, 170580U, 51379U, 86978U, 254801U, |
| 71871 | 120313U, 286546U, 209137U, 143710U, 308589U, 165340U, 47906U, 83342U, |
| 71872 | 251106U, 115116U, 281332U, 203565U, 138010U, 302843U, 183362U, 54720U, |
| 71873 | 90480U, 258366U, 125496U, 291779U, 221735U, 149125U, 314069U, 173222U, |
| 71874 | 53650U, 89341U, 257189U, 122961U, 289250U, 211803U, 146480U, 311422U, |
| 71875 | 168000U, 50206U, 85736U, 253527U, 117813U, 284088U, 206277U, 140829U, |
| 71876 | 305728U, 186228U, 56606U, 92466U, 260397U, 127836U, 294206U, 224703U, |
| 71877 | 151566U, 316604U, 171664U, 52231U, 87863U, 255704U, 121365U, 287631U, |
| 71878 | 210261U, 144865U, 309783U, 166429U, 48773U, 84243U, 252026U, 116203U, |
| 71879 | 282454U, 204722U, 139200U, 304074U, 184945U, 55419U, 91216U, 259127U, |
| 71880 | 126505U, 292839U, 223433U, 150219U, 315220U, 173831U, 123505U, 289827U, |
| 71881 | 212368U, 147043U, 312019U, 168595U, 118372U, 284681U, 206856U, 141407U, |
| 71882 | 306341U, 186959U, 128346U, 294754U, 225458U, 152092U, 317169U, 174112U, |
| 71883 | 123790U, 290112U, 212694U, 147376U, 312355U, 168876U, 118657U, 284966U, |
| 71884 | 207182U, 141740U, 306677U, 187183U, 128577U, 294988U, 225718U, 152362U, |
| 71885 | 317445U, 169807U, 119537U, 285847U, 208206U, 142771U, 307717U, 164554U, |
| 71886 | 114326U, 280618U, 202621U, 137057U, 301956U, 182732U, 124853U, 291191U, |
| 71887 | 220977U, 148349U, 313338U, 170332U, 120067U, 286320U, 208906U, 143464U, |
| 71888 | 308363U, 165079U, 114856U, 281091U, 203321U, 137750U, 302602U, 183152U, |
| 71889 | 125284U, 291580U, 221539U, 148913U, 313870U, 171910U, 121627U, 287909U, |
| 71890 | 210507U, 145127U, 310061U, 166675U, 116465U, 282732U, 204968U, 139462U, |
| 71891 | 304352U, 185143U, 126719U, 293069U, 223631U, 150433U, 315450U, 173965U, |
| 71892 | 123633U, 289963U, 212502U, 147171U, 312155U, 168729U, 118500U, 284817U, |
| 71893 | 206990U, 141535U, 306477U, 187066U, 128450U, 294866U, 225565U, 152196U, |
| 71894 | 317281U, 72024U, 75442U, 71822U, 74253U, 72036U, 75651U, 71833U, |
| 71895 | 74329U, 72048U, 75975U, 71844U, 74533U, 72075U, 76311U, 28236U, |
| 71896 | 71869U, 74743U, 28221U, 179804U, 170348U, 165095U, 183165U, 175305U, |
| 71897 | 180751U, 171962U, 166727U, 185186U, 177020U, 180213U, 170955U, 165701U, |
| 71898 | 183648U, 175823U, 180835U, 172346U, 167124U, 185508U, 177166U, 175162U, |
| 71899 | 213915U, 176763U, 215562U, 178394U, 217024U, 176913U, 215726U, 179783U, |
| 71900 | 218405U, 175261U, 214014U, 181880U, 220261U, 178916U, 217546U, 175173U, |
| 71901 | 213926U, 176774U, 215573U, 178463U, 217093U, 177033U, 215833U, 176394U, |
| 71902 | 215062U, 177286U, 216060U, 176252U, 214920U, 177275U, 216049U, 181711U, |
| 71903 | 220092U, 178543U, 217173U, 179171U, 217801U, 178360U, 216990U, 176881U, |
| 71904 | 215694U, 179736U, 218358U, 175185U, 213938U, 181857U, 220238U, 178868U, |
| 71905 | 217498U, 176241U, 214909U, 181664U, 220045U, 178475U, 217105U, 68627U, |
| 71906 | 75430U, 67762U, 74242U, 68824U, 75639U, 67827U, 74318U, 69136U, |
| 71907 | 75963U, 67944U, 74522U, 69445U, 76299U, 68084U, 74718U, 171106U, |
| 71908 | 51810U, 87415U, 255229U, 120770U, 286999U, 209665U, 144253U, 309133U, |
| 71909 | 165871U, 48352U, 83795U, 251551U, 115608U, 281822U, 204126U, 138588U, |
| 71910 | 303424U, 184035U, 55079U, 90849U, 258733U, 125945U, 292236U, 222446U, |
| 71911 | 149645U, 314602U, 172602U, 53065U, 88724U, 256540U, 122305U, 288558U, |
| 71912 | 211183U, 145824U, 310730U, 167380U, 49621U, 85119U, 252878U, 117157U, |
| 71913 | 283396U, 205657U, 140173U, 305036U, 185716U, 56117U, 91945U, 259844U, |
| 71914 | 127288U, 293622U, 224191U, 151018U, 316020U, 175318U, 214058U, 176472U, |
| 71915 | 215166U, 176649U, 215410U, 175329U, 214069U, 176484U, 215178U, 176661U, |
| 71916 | 215422U, 176369U, 215037U, 179214U, 217836U, 176346U, 215014U, 179203U, |
| 71917 | 217825U, 176381U, 215049U, 176357U, 215025U, 180877U, 219413U, 157202U, |
| 71918 | 44990U, 80242U, 247859U, 111160U, 277285U, 191295U, 132310U, 298782U, |
| 71919 | 155285U, 43045U, 78189U, 245698U, 109129U, 275140U, 189430U, 130275U, |
| 71920 | 296697U, 161322U, 46756U, 82119U, 249847U, 113114U, 279330U, 195132U, |
| 71921 | 134268U, 300776U, 177214U, 216001U, 180892U, 219428U, 157219U, 45008U, |
| 71922 | 80261U, 247879U, 111178U, 277304U, 191312U, 132328U, 298801U, 155302U, |
| 71923 | 43063U, 78208U, 245718U, 109147U, 275159U, 189447U, 130293U, 296716U, |
| 71924 | 161336U, 46771U, 82135U, 249864U, 113129U, 279346U, 195146U, 134283U, |
| 71925 | 300792U, 177228U, 216015U, 181843U, 220224U, 174168U, 123850U, 290142U, |
| 71926 | 212795U, 147484U, 312436U, 168932U, 118717U, 284996U, 207283U, 141848U, |
| 71927 | 306758U, 187227U, 128625U, 295012U, 225798U, 152449U, 317511U, 178839U, |
| 71928 | 217469U, 180468U, 219019U, 171238U, 120911U, 287149U, 209797U, 144394U, |
| 71929 | 309283U, 166003U, 115749U, 281972U, 204258U, 138729U, 303574U, 184140U, |
| 71930 | 126059U, 292359U, 222551U, 149759U, 314725U, 176263U, 214931U, 199355U, |
| 71931 | 180454U, 198855U, 176228U, 199394U, 180929U, 198966U, 177262U, 179617U, |
| 71932 | 218239U, 170067U, 119814U, 286068U, 208574U, 143163U, 308060U, 164814U, |
| 71933 | 114603U, 280839U, 202989U, 137449U, 302299U, 182941U, 125079U, 291373U, |
| 71934 | 221273U, 148669U, 313621U, 174908U, 213661U, 180312U, 218877U, 171024U, |
| 71935 | 51723U, 87345U, 255173U, 120704U, 286946U, 209583U, 144187U, 309080U, |
| 71936 | 165789U, 48265U, 83725U, 251495U, 115542U, 281769U, 204044U, 138522U, |
| 71937 | 303371U, 183946U, 55007U, 90791U, 258686U, 125891U, 292192U, 222343U, |
| 71938 | 149591U, 314558U, 176056U, 214724U, 172520U, 52978U, 88654U, 256484U, |
| 71939 | 122239U, 288505U, 211101U, 145758U, 310677U, 167298U, 49534U, 85049U, |
| 71940 | 252822U, 117091U, 283343U, 205575U, 140107U, 304983U, 185649U, 56045U, |
| 71941 | 91887U, 259797U, 127234U, 293578U, 224124U, 150964U, 315976U, 181951U, |
| 71942 | 220332U, 174273U, 123962U, 290261U, 212918U, 147615U, 312575U, 169037U, |
| 71943 | 118829U, 285115U, 207406U, 141979U, 306897U, 187311U, 128716U, 295110U, |
| 71944 | 225897U, 152556U, 317626U, 179064U, 217694U, 179667U, 218289U, 170144U, |
| 71945 | 119896U, 286138U, 208651U, 143245U, 308130U, 164891U, 114685U, 280909U, |
| 71946 | 203066U, 137531U, 302369U, 183003U, 125146U, 291431U, 221335U, 148736U, |
| 71947 | 313679U, 174998U, 213751U, 180410U, 218975U, 171154U, 51841U, 87448U, |
| 71948 | 255264U, 120821U, 287053U, 209713U, 144304U, 309187U, 165919U, 48383U, |
| 71949 | 83828U, 251586U, 115659U, 281876U, 204174U, 138639U, 303478U, 184074U, |
| 71950 | 55104U, 90876U, 258762U, 125987U, 292281U, 222485U, 149687U, 314647U, |
| 71951 | 176188U, 214869U, 172650U, 53096U, 88757U, 256575U, 122356U, 288612U, |
| 71952 | 211231U, 145875U, 310784U, 167428U, 49652U, 85152U, 252913U, 117208U, |
| 71953 | 283450U, 205705U, 140224U, 305090U, 185755U, 56142U, 91972U, 259873U, |
| 71954 | 127330U, 293667U, 224230U, 151060U, 316065U, 182013U, 220394U, 174398U, |
| 71955 | 124095U, 290385U, 213043U, 147748U, 312699U, 169162U, 118962U, 285239U, |
| 71956 | 207531U, 142112U, 307021U, 187412U, 128825U, 295213U, 225998U, 152665U, |
| 71957 | 317729U, 179185U, 217815U, 179582U, 218204U, 170023U, 119767U, 286018U, |
| 71958 | 208512U, 143097U, 307990U, 164770U, 114556U, 280789U, 202927U, 137383U, |
| 71959 | 302229U, 182906U, 125041U, 291332U, 221223U, 148615U, 313563U, 174838U, |
| 71960 | 213591U, 180237U, 218802U, 171010U, 51708U, 87329U, 255156U, 120689U, |
| 71961 | 286930U, 209551U, 144153U, 309044U, 165756U, 48250U, 83709U, 251478U, |
| 71962 | 115507U, 281732U, 203993U, 138468U, 303314U, 183889U, 54995U, 90778U, |
| 71963 | 258672U, 125851U, 292149U, 222271U, 149535U, 314498U, 175963U, 214643U, |
| 71964 | 172506U, 52963U, 88638U, 256467U, 122224U, 288489U, 211069U, 145724U, |
| 71965 | 310641U, 167284U, 49519U, 85033U, 252805U, 117076U, 283327U, 205543U, |
| 71966 | 140073U, 304947U, 185638U, 56033U, 91874U, 259783U, 127222U, 293565U, |
| 71967 | 224098U, 150936U, 315946U, 181903U, 220284U, 174213U, 123898U, 290193U, |
| 71968 | 212840U, 147532U, 312487U, 168977U, 118765U, 285047U, 207328U, 141896U, |
| 71969 | 306809U, 187263U, 128664U, 295054U, 225834U, 152488U, 317553U, 178964U, |
| 71970 | 217594U, 179656U, 218278U, 170130U, 119881U, 286122U, 208637U, 143230U, |
| 71971 | 308114U, 164877U, 114670U, 280893U, 203052U, 137516U, 302353U, 182992U, |
| 71972 | 125134U, 291418U, 221324U, 148724U, 313666U, 174967U, 213720U, 180351U, |
| 71973 | 218916U, 171140U, 51826U, 87432U, 255247U, 120806U, 287037U, 209699U, |
| 71974 | 144289U, 309171U, 165905U, 48368U, 83812U, 251569U, 115644U, 281860U, |
| 71975 | 204160U, 138624U, 303462U, 184063U, 55092U, 90863U, 258748U, 125975U, |
| 71976 | 292268U, 222474U, 149675U, 314634U, 176134U, 214815U, 172636U, 53081U, |
| 71977 | 88741U, 256558U, 122341U, 288596U, 211217U, 145860U, 310768U, 167414U, |
| 71978 | 49637U, 85136U, 252896U, 117193U, 283434U, 205691U, 140209U, 305074U, |
| 71979 | 185744U, 56130U, 91959U, 259859U, 127318U, 293654U, 224219U, 151048U, |
| 71980 | 316052U, 182002U, 220383U, 174384U, 124080U, 290369U, 213029U, 147733U, |
| 71981 | 312683U, 169148U, 118947U, 285223U, 207517U, 142097U, 307005U, 187401U, |
| 71982 | 128813U, 295200U, 225987U, 152653U, 317716U, 179161U, 217791U, 196059U, |
| 71983 | 195999U, 196151U, 196074U, 196014U, 196163U, 197944U, 135620U, 208253U, |
| 71984 | 142821U, 307770U, 197210U, 135040U, 202668U, 137107U, 302009U, 199598U, |
| 71985 | 136176U, 221015U, 148390U, 313382U, 198531U, 135984U, 212581U, 147255U, |
| 71986 | 312244U, 197741U, 135404U, 207069U, 141619U, 306566U, 200124U, 136507U, |
| 71987 | 225629U, 152265U, 317355U, 131266U, 129231U, 133285U, 131281U, 129246U, |
| 71988 | 133297U, 132295U, 130260U, 134256U, 132944U, 130909U, 134870U, 218122U, |
| 71989 | 213427U, 196089U, 196029U, 196175U, 197989U, 135668U, 208457U, 143038U, |
| 71990 | 307927U, 197255U, 135088U, 202872U, 137324U, 302166U, 199634U, 136215U, |
| 71991 | 221180U, 148568U, 313512U, 198258U, 135832U, 209499U, 144097U, 308984U, |
| 71992 | 197496U, 135252U, 203941U, 138412U, 303254U, 199830U, 136349U, 222033U, |
| 71993 | 149449U, 314405U, 198576U, 136032U, 212768U, 147455U, 312405U, 197786U, |
| 71994 | 135452U, 207256U, 141819U, 306727U, 200160U, 136546U, 225777U, 152426U, |
| 71995 | 317486U, 197929U, 135604U, 208238U, 142805U, 307753U, 197195U, 135024U, |
| 71996 | 202653U, 137091U, 301992U, 199586U, 136163U, 221003U, 148377U, 313368U, |
| 71997 | 198516U, 135968U, 212566U, 147239U, 312227U, 197726U, 135388U, 207054U, |
| 71998 | 141603U, 306549U, 200112U, 136494U, 225617U, 152252U, 317341U, 197974U, |
| 71999 | 135652U, 208421U, 143000U, 307887U, 197240U, 135072U, 202836U, 137286U, |
| 72000 | 302126U, 199622U, 136202U, 221150U, 148536U, 313478U, 198243U, 135816U, |
| 72001 | 209484U, 144081U, 308967U, 197481U, 135236U, 203926U, 138396U, 303237U, |
| 72002 | 199818U, 136336U, 222021U, 149436U, 314391U, 198561U, 136016U, 212753U, |
| 72003 | 147439U, 312388U, 197771U, 135436U, 207241U, 141803U, 306710U, 200148U, |
| 72004 | 136533U, 225765U, 152413U, 317472U, 198037U, 135719U, 208713U, 143311U, |
| 72005 | 308200U, 197303U, 135139U, 203128U, 137597U, 302439U, 199673U, 136257U, |
| 72006 | 221385U, 148790U, 313737U, 179757U, 218379U, 170274U, 120005U, 286254U, |
| 72007 | 208848U, 143402U, 308297U, 165021U, 114794U, 281025U, 203263U, 137688U, |
| 72008 | 302536U, 183106U, 125234U, 291526U, 221493U, 148863U, 313816U, 175229U, |
| 72009 | 213982U, 180592U, 219156U, 171705U, 121409U, 287678U, 210302U, 144909U, |
| 72010 | 309830U, 166470U, 116247U, 282501U, 204763U, 139244U, 304121U, 184977U, |
| 72011 | 126540U, 292877U, 223465U, 150254U, 315258U, 176807U, 215606U, 181685U, |
| 72012 | 220066U, 173920U, 123585U, 289912U, 212457U, 147123U, 312104U, 168684U, |
| 72013 | 118452U, 284766U, 206945U, 141487U, 306426U, 187030U, 128411U, 294824U, |
| 72014 | 225529U, 152157U, 317239U, 178519U, 217149U, 180777U, 219327U, 172099U, |
| 72015 | 121809U, 288101U, 210679U, 145309U, 310253U, 166864U, 116647U, 282924U, |
| 72016 | 205140U, 139644U, 304544U, 185299U, 126871U, 293231U, 223773U, 150585U, |
| 72017 | 315612U, 177070U, 215870U, 180508U, 219059U, 171287U, 120963U, 287204U, |
| 72018 | 209846U, 144446U, 309338U, 166052U, 115801U, 282027U, 204307U, 138781U, |
| 72019 | 303629U, 184180U, 126102U, 292405U, 222591U, 149802U, 314771U, 176406U, |
| 72020 | 215074U, 180943U, 219465U, 172734U, 122446U, 288708U, 211315U, 145965U, |
| 72021 | 310880U, 167512U, 117298U, 283546U, 205789U, 140314U, 305186U, 185821U, |
| 72022 | 127402U, 293745U, 224296U, 151132U, 316143U, 177298U, 216072U, 197913U, |
| 72023 | 135587U, 208222U, 142788U, 307735U, 197179U, 135007U, 202637U, 137074U, |
| 72024 | 301974U, 199573U, 136149U, 220990U, 148363U, 313353U, 198500U, 135951U, |
| 72025 | 212550U, 147222U, 312209U, 197710U, 135371U, 207038U, 141586U, 306531U, |
| 72026 | 200099U, 136480U, 225604U, 152238U, 317326U, 197958U, 135635U, 208405U, |
| 72027 | 142983U, 307869U, 197224U, 135055U, 202820U, 137269U, 302108U, 199609U, |
| 72028 | 136188U, 221137U, 148522U, 313463U, 198227U, 135799U, 209468U, 144064U, |
| 72029 | 308949U, 197465U, 135219U, 203910U, 138379U, 303219U, 199805U, 136322U, |
| 72030 | 222008U, 149422U, 314376U, 198545U, 135999U, 212737U, 147422U, 312370U, |
| 72031 | 197755U, 135419U, 207225U, 141786U, 306692U, 200135U, 136519U, 225752U, |
| 72032 | 152399U, 317457U, 198021U, 135702U, 208697U, 143294U, 308182U, 197287U, |
| 72033 | 135122U, 203112U, 137580U, 302421U, 199660U, 136243U, 221372U, 148776U, |
| 72034 | 313722U, 196104U, 196044U, 196187U, 198052U, 135735U, 208728U, 143327U, |
| 72035 | 308217U, 197318U, 135155U, 203143U, 137613U, 302456U, 199685U, 136270U, |
| 72036 | 221397U, 148803U, 313751U, 179770U, 218392U, 170290U, 120022U, 286272U, |
| 72037 | 208864U, 143419U, 308315U, 165037U, 114811U, 281043U, 203279U, 137705U, |
| 72038 | 302554U, 183119U, 125248U, 291541U, 221506U, 148877U, 313831U, 175241U, |
| 72039 | 213994U, 180605U, 219169U, 171721U, 121426U, 287696U, 210318U, 144926U, |
| 72040 | 309848U, 166486U, 116264U, 282519U, 204779U, 139261U, 304139U, 184990U, |
| 72041 | 126554U, 292892U, 223478U, 150268U, 315273U, 176819U, 215618U, 181698U, |
| 72042 | 220079U, 173936U, 123602U, 289930U, 212473U, 147140U, 312122U, 168700U, |
| 72043 | 118469U, 284784U, 206961U, 141504U, 306444U, 187043U, 128425U, 294839U, |
| 72044 | 225542U, 152171U, 317254U, 178531U, 217161U, 180790U, 219340U, 172115U, |
| 72045 | 121826U, 288119U, 210695U, 145326U, 310271U, 166880U, 116664U, 282942U, |
| 72046 | 205156U, 139661U, 304562U, 185312U, 126885U, 293246U, 223786U, 150599U, |
| 72047 | 315627U, 177082U, 215882U, 180521U, 219072U, 171303U, 120980U, 287222U, |
| 72048 | 209862U, 144463U, 309356U, 166068U, 115818U, 282045U, 204323U, 138798U, |
| 72049 | 303647U, 184193U, 126116U, 292420U, 222604U, 149816U, 314786U, 176418U, |
| 72050 | 215086U, 180956U, 219478U, 172750U, 122463U, 288726U, 211331U, 145982U, |
| 72051 | 310898U, 167528U, 117315U, 283564U, 205805U, 140331U, 305204U, 185834U, |
| 72052 | 127416U, 293760U, 224309U, 151146U, 316158U, 177310U, 216084U, 180710U, |
| 72053 | 219274U, 171883U, 52416U, 88059U, 255911U, 121598U, 287878U, 210480U, |
| 72054 | 145098U, 310030U, 166648U, 48958U, 84439U, 252233U, 116436U, 282701U, |
| 72055 | 204941U, 139433U, 304321U, 185122U, 55571U, 91379U, 259301U, 126696U, |
| 72056 | 293044U, 223610U, 150410U, 315425U, 176982U, 215795U, 181914U, 220295U, |
| 72057 | 174227U, 123913U, 290209U, 212854U, 147547U, 312503U, 168991U, 118780U, |
| 72058 | 285063U, 207342U, 141911U, 306825U, 187274U, 128676U, 295067U, 225845U, |
| 72059 | 152500U, 317566U, 178987U, 217617U, 181990U, 220371U, 174369U, 124064U, |
| 72060 | 290352U, 213014U, 147717U, 312666U, 169133U, 118931U, 285206U, 207502U, |
| 72061 | 142081U, 306988U, 187389U, 128800U, 295186U, 225975U, 152640U, 317702U, |
| 72062 | 179136U, 217766U, 181768U, 220149U, 174026U, 123698U, 290032U, 212608U, |
| 72063 | 147284U, 312275U, 168790U, 118565U, 284886U, 207096U, 141648U, 306597U, |
| 72064 | 187115U, 128503U, 294923U, 225650U, 152288U, 317380U, 178655U, 217285U, |
| 72065 | 179828U, 218436U, 170378U, 51178U, 86765U, 254613U, 120098U, 286353U, |
| 72066 | 208935U, 143495U, 308396U, 165125U, 47691U, 83114U, 250902U, 114887U, |
| 72067 | 281124U, 203350U, 137781U, 302635U, 183189U, 54544U, 90291U, 258195U, |
| 72068 | 125309U, 291607U, 221562U, 148938U, 313897U, 175387U, 214127U, 172144U, |
| 72069 | 52610U, 88264U, 256127U, 121857U, 288152U, 210724U, 145357U, 310304U, |
| 72070 | 166909U, 49152U, 84644U, 252449U, 116695U, 282975U, 205185U, 139692U, |
| 72071 | 304595U, 185335U, 55732U, 91551U, 259484U, 126910U, 293273U, 223809U, |
| 72072 | 150624U, 315654U, 181789U, 220170U, 174053U, 123727U, 290063U, 212635U, |
| 72073 | 147313U, 312306U, 168817U, 118594U, 284917U, 207123U, 141677U, 306628U, |
| 72074 | 187136U, 128526U, 294948U, 225671U, 152311U, 317405U, 178716U, 217346U, |
| 72075 | 169961U, 51082U, 86663U, 254505U, 119701U, 285948U, 208436U, 143016U, |
| 72076 | 307904U, 164708U, 47595U, 83012U, 250794U, 114490U, 280719U, 202851U, |
| 72077 | 137302U, 302143U, 182856U, 54466U, 90207U, 258105U, 124987U, 291274U, |
| 72078 | 221162U, 148549U, 313492U, 180765U, 219315U, 172084U, 52594U, 88247U, |
| 72079 | 256109U, 121793U, 288084U, 210664U, 145293U, 310236U, 166849U, 49136U, |
| 72080 | 84627U, 252431U, 116631U, 282907U, 205125U, 139628U, 304527U, 185287U, |
| 72081 | 55719U, 91537U, 259469U, 126858U, 293217U, 223761U, 150572U, 315598U, |
| 72082 | 177045U, 215845U, 170096U, 119845U, 286084U, 208603U, 143194U, 308076U, |
| 72083 | 164843U, 114634U, 280855U, 203018U, 137480U, 302315U, 182964U, 125104U, |
| 72084 | 291386U, 221296U, 148694U, 313634U, 171091U, 51794U, 87398U, 255211U, |
| 72085 | 120754U, 286982U, 209650U, 144237U, 309116U, 165856U, 48336U, 83778U, |
| 72086 | 251533U, 115592U, 281805U, 204111U, 138572U, 303407U, 184023U, 55066U, |
| 72087 | 90835U, 258718U, 125932U, 292222U, 222434U, 149632U, 314588U, 172587U, |
| 72088 | 53049U, 88707U, 256522U, 122289U, 288541U, 211168U, 145808U, 310713U, |
| 72089 | 167365U, 49605U, 85102U, 252860U, 117141U, 283379U, 205642U, 140157U, |
| 72090 | 305019U, 185704U, 56104U, 91931U, 259829U, 127275U, 293608U, 224179U, |
| 72091 | 151005U, 316006U, 174302U, 123993U, 290277U, 212947U, 147646U, 312591U, |
| 72092 | 169066U, 118860U, 285131U, 207435U, 142010U, 306913U, 187334U, 128741U, |
| 72093 | 295123U, 225920U, 152581U, 317639U, 170972U, 51667U, 87285U, 255109U, |
| 72094 | 120648U, 286886U, 209513U, 144112U, 309000U, 165718U, 48209U, 83665U, |
| 72095 | 251431U, 115466U, 281688U, 203955U, 138427U, 303270U, 183662U, 54963U, |
| 72096 | 90743U, 258634U, 125777U, 292069U, 222044U, 149461U, 314418U, 172468U, |
| 72097 | 52922U, 88594U, 256420U, 122183U, 288445U, 211031U, 145683U, 310597U, |
| 72098 | 167246U, 49478U, 84989U, 252758U, 117035U, 283283U, 205505U, 140032U, |
| 72099 | 304903U, 185609U, 56001U, 91839U, 259745U, 127190U, 293530U, 224069U, |
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| 72102 | 70326U, 103333U, 270377U, 60757U, 95796U, 263918U, 64247U, 98948U, |
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| 72105 | 64760U, 99437U, 267029U, 70469U, 103456U, 270470U, 60895U, 95943U, |
| 72106 | 264034U, 64404U, 99086U, 266733U, 70113U, 103105U, 270174U, 61411U, |
| 72107 | 96495U, 264467U, 65588U, 99780U, 267296U, 71571U, 103799U, 270737U, |
| 72108 | 171196U, 51886U, 87496U, 255315U, 120866U, 287101U, 209755U, 144349U, |
| 72109 | 309235U, 165961U, 48428U, 83876U, 251637U, 115704U, 281924U, 204216U, |
| 72110 | 138684U, 303526U, 184107U, 55140U, 90915U, 258804U, 126023U, 292320U, |
| 72111 | 222518U, 149723U, 314686U, 172692U, 53141U, 88805U, 256626U, 122401U, |
| 72112 | 288660U, 211273U, 145920U, 310832U, 167470U, 49697U, 85200U, 252964U, |
| 72113 | 117253U, 283498U, 205747U, 140269U, 305138U, 185788U, 56178U, 92011U, |
| 72114 | 259915U, 127366U, 293706U, 224263U, 151096U, 316104U, 61112U, 96174U, |
| 72115 | 264217U, 64676U, 99377U, 266984U, 70385U, 103396U, 270425U, 60835U, |
| 72116 | 95879U, 263986U, 64320U, 99026U, 266688U, 70029U, 103045U, 270129U, |
| 72117 | 61363U, 96443U, 264428U, 65494U, 99702U, 267260U, 71477U, 103721U, |
| 72118 | 270701U, 61200U, 96268U, 264297U, 64786U, 99465U, 267059U, 70495U, |
| 72119 | 103484U, 270500U, 60937U, 95988U, 264082U, 64443U, 99128U, 266778U, |
| 72120 | 70152U, 103147U, 270219U, 61444U, 96531U, 264506U, 65618U, 99813U, |
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| 72123 | 251671U, 115734U, 281956U, 204244U, 138714U, 303558U, 184129U, 55164U, |
| 72124 | 90941U, 258832U, 126047U, 292346U, 222540U, 149747U, 314712U, 172720U, |
| 72125 | 53171U, 88837U, 256660U, 122431U, 288692U, 211301U, 145950U, 310864U, |
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| 72131 | 217742U, 30327U, 181625U, 220006U, 173859U, 212396U, 168623U, 206884U, |
| 72132 | 186981U, 225480U, 178371U, 217001U, 198066U, 197332U, 199696U, 198306U, |
| 72133 | 197544U, 199953U, 198209U, 197447U, 199790U, 198339U, 197577U, 199980U, |
| 72134 | 198715U, 174606U, 213332U, 30054U, 198742U, 175132U, 213885U, 30093U, |
| 72135 | 198915U, 176754U, 215553U, 30190U, 199075U, 178330U, 216960U, 30301U, |
| 72136 | 198724U, 174701U, 213454U, 30067U, 62430U, 97571U, 265424U, 67058U, |
| 72137 | 101134U, 268447U, 73538U, 105481U, 271980U, 61709U, 96810U, 264763U, |
| 72138 | 66164U, 100267U, 267729U, 72612U, 104614U, 271262U, 63194U, 98379U, |
| 72139 | 266139U, 68651U, 102182U, 269367U, 75466U, 106681U, 273060U, 62761U, |
| 72140 | 97921U, 265724U, 67370U, 101465U, 268732U, 73850U, 105812U, 272265U, |
| 72141 | 62040U, 97160U, 265063U, 66476U, 100598U, 268014U, 72924U, 104945U, |
| 72142 | 271547U, 63468U, 98672U, 266394U, 69059U, 102549U, 269706U, 75886U, |
| 72143 | 107048U, 273399U, 156746U, 44521U, 79747U, 247338U, 110677U, 276775U, |
| 72144 | 190852U, 131826U, 298287U, 154829U, 42576U, 77694U, 245177U, 108646U, |
| 72145 | 274630U, 188987U, 129791U, 296202U, 160726U, 46365U, 81702U, 249404U, |
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| 72172 | 269010U, 74159U, 106121U, 272543U, 66785U, 100907U, 268292U, 73233U, |
| 72173 | 105254U, 271825U, 69422U, 102866U, 270005U, 76276U, 107365U, 273698U, |
| 72174 | 169899U, 119635U, 208343U, 142917U, 164646U, 114424U, 202758U, 137203U, |
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| 72177 | 137122U, 302025U, 182745U, 124867U, 291206U, 221026U, 148402U, 313395U, |
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| 72180 | 64220U, 98919U, 266593U, 69929U, 102938U, 270034U, 61277U, 96350U, |
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| 72182 | 70780U, 65365U, 71328U, 64845U, 99528U, 267107U, 70554U, 103547U, |
| 72183 | 270548U, 64502U, 99191U, 266826U, 70211U, 103210U, 270267U, 65679U, |
| 72184 | 99879U, 267371U, 71662U, 103898U, 270812U, 65233U, 71072U, 65377U, |
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| 72192 | 208922U, 143481U, 308381U, 60743U, 95781U, 263902U, 64234U, 98934U, |
| 72193 | 266609U, 69943U, 102953U, 270050U, 165112U, 114873U, 281109U, 203337U, |
| 72194 | 137767U, 302620U, 61289U, 96363U, 264359U, 65426U, 99628U, 267196U, |
| 72195 | 71409U, 103647U, 270637U, 183179U, 125298U, 291595U, 221552U, 148927U, |
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| 72199 | 264018U, 64391U, 99072U, 266718U, 70100U, 103091U, 270159U, 166896U, |
| 72200 | 116681U, 282960U, 205172U, 139678U, 304580U, 61400U, 96483U, 264454U, |
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| 72202 | 293261U, 223799U, 150613U, 315642U, 70925U, 177113U, 215913U, 180432U, |
| 72203 | 218997U, 171182U, 51871U, 87480U, 255298U, 120851U, 287085U, 209741U, |
| 72204 | 144334U, 309219U, 165947U, 48413U, 83860U, 251620U, 115689U, 281908U, |
| 72205 | 204202U, 138669U, 303510U, 184096U, 55128U, 90902U, 258790U, 126011U, |
| 72206 | 292307U, 222507U, 149711U, 314673U, 176208U, 214889U, 180907U, 219443U, |
| 72207 | 172678U, 53126U, 88789U, 256609U, 122386U, 288644U, 211259U, 145905U, |
| 72208 | 310816U, 167456U, 49682U, 85184U, 252947U, 117238U, 283482U, 205733U, |
| 72209 | 140254U, 305122U, 185777U, 56166U, 91998U, 259901U, 127354U, 293693U, |
| 72210 | 224252U, 151084U, 316091U, 177242U, 216029U, 174426U, 124125U, 290417U, |
| 72211 | 213071U, 147778U, 312731U, 169190U, 118992U, 285271U, 207559U, 142142U, |
| 72212 | 307053U, 187434U, 128849U, 295239U, 226020U, 152689U, 317755U, 71352U, |
| 72213 | 181779U, 220160U, 64875U, 99560U, 267141U, 70584U, 103579U, 270582U, |
| 72214 | 174040U, 123713U, 290048U, 212622U, 147299U, 312291U, 64532U, 99223U, |
| 72215 | 266860U, 70241U, 103242U, 270301U, 168804U, 118580U, 284902U, 207110U, |
| 72216 | 141663U, 306613U, 65703U, 99905U, 267399U, 71686U, 103924U, 270840U, |
| 72217 | 187126U, 128515U, 294936U, 225661U, 152300U, 317393U, 71094U, 178695U, |
| 72218 | 217325U, 71164U, 179726U, 218348U, 61006U, 96061U, 264117U, 64577U, |
| 72219 | 99271U, 266890U, 70286U, 103290U, 270331U, 170248U, 119977U, 286224U, |
| 72220 | 208822U, 143374U, 308267U, 60714U, 95750U, 263869U, 64207U, 98905U, |
| 72221 | 266578U, 69916U, 102924U, 270019U, 164995U, 114766U, 280995U, 203237U, |
| 72222 | 137660U, 302506U, 61266U, 96338U, 264332U, 65405U, 99605U, 267171U, |
| 72223 | 71388U, 103624U, 270612U, 183086U, 125212U, 291502U, 221473U, 148841U, |
| 72224 | 313792U, 70759U, 175141U, 213894U, 61144U, 96208U, 264233U, 64706U, |
| 72225 | 99409U, 266999U, 70415U, 103428U, 270440U, 171679U, 121381U, 287648U, |
| 72226 | 210276U, 144881U, 309800U, 60867U, 95913U, 264002U, 64350U, 99058U, |
| 72227 | 266703U, 70059U, 103077U, 270144U, 166444U, 116219U, 282471U, 204737U, |
| 72228 | 139216U, 304091U, 61389U, 96471U, 264441U, 65546U, 99758U, 267272U, |
| 72229 | 71529U, 103777U, 270713U, 184957U, 126518U, 292853U, 223445U, 150232U, |
| 72230 | 315234U, 180421U, 218986U, 171168U, 51856U, 87464U, 255281U, 120836U, |
| 72231 | 287069U, 209727U, 144319U, 309203U, 165933U, 48398U, 83844U, 251603U, |
| 72232 | 115674U, 281892U, 204188U, 138654U, 303494U, 184085U, 55116U, 90889U, |
| 72233 | 258776U, 125999U, 292294U, 222496U, 149699U, 314660U, 176198U, 214879U, |
| 72234 | 172664U, 53111U, 88773U, 256592U, 122371U, 288628U, 211245U, 145890U, |
| 72235 | 310800U, 167442U, 49667U, 85168U, 252930U, 117223U, 283466U, 205719U, |
| 72236 | 140239U, 305106U, 185766U, 56154U, 91985U, 259887U, 127342U, 293680U, |
| 72237 | 224241U, 151072U, 316078U, 174412U, 124110U, 290401U, 213057U, 147763U, |
| 72238 | 312715U, 169176U, 118977U, 285255U, 207545U, 142127U, 307037U, 187423U, |
| 72239 | 128837U, 295226U, 226009U, 152677U, 317742U, 71318U, 181615U, 219996U, |
| 72240 | 64832U, 99514U, 267092U, 70541U, 103533U, 270533U, 173846U, 123521U, |
| 72241 | 289844U, 212383U, 147059U, 312036U, 64489U, 99177U, 266811U, 70198U, |
| 72242 | 103196U, 270252U, 168610U, 118388U, 284698U, 206871U, 141423U, 306358U, |
| 72243 | 65669U, 99868U, 267359U, 71652U, 103887U, 270800U, 186971U, 128359U, |
| 72244 | 294768U, 225470U, 152105U, 317183U, 71038U, 178339U, 216969U, 71252U, |
| 72245 | 64733U, 70442U, 64377U, 70086U, 65567U, 71550U, 70915U, 71195U, |
| 72246 | 179839U, 218447U, 61063U, 96122U, 264182U, 64630U, 99328U, 266951U, |
| 72247 | 70339U, 103347U, 270392U, 170392U, 120113U, 286369U, 208949U, 143510U, |
| 72248 | 308412U, 60771U, 95811U, 263934U, 64260U, 98962U, 266639U, 69969U, |
| 72249 | 102981U, 270080U, 165139U, 114902U, 281140U, 203364U, 137796U, 302651U, |
| 72250 | 61311U, 96387U, 264385U, 65446U, 99650U, 267220U, 71429U, 103669U, |
| 72251 | 270661U, 183200U, 125321U, 291620U, 221573U, 148950U, 313910U, 70811U, |
| 72252 | 175397U, 214137U, 71273U, 180813U, 219363U, 61186U, 96253U, 264281U, |
| 72253 | 64773U, 99451U, 267044U, 70482U, 103470U, 270485U, 172158U, 121872U, |
| 72254 | 288168U, 210738U, 145372U, 310320U, 60909U, 95958U, 264050U, 64417U, |
| 72255 | 99100U, 266748U, 70126U, 103119U, 270189U, 166923U, 116710U, 282991U, |
| 72256 | 205199U, 139707U, 304611U, 61422U, 96507U, 264480U, 65598U, 99791U, |
| 72257 | 267308U, 71581U, 103810U, 270749U, 185346U, 126922U, 293286U, 223820U, |
| 72258 | 150636U, 315667U, 70946U, 177134U, 215934U, 180443U, 219008U, 171210U, |
| 72259 | 51901U, 87512U, 255332U, 120881U, 287117U, 209769U, 144364U, 309251U, |
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| 72427 | 46205U, 81529U, 249218U, 112462U, 278631U, 194179U, 133626U, 300101U, |
| 72428 | 157728U, 45547U, 80830U, 248478U, 111717U, 277873U, 191821U, 132867U, |
| 72429 | 299370U, 155811U, 43602U, 78777U, 246317U, 109686U, 275728U, 189956U, |
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| 72432 | 314455U, 186722U, 128249U, 294650U, 225221U, 151995U, 317065U, 160373U, |
| 72433 | 46231U, 81557U, 249248U, 112488U, 278659U, 194203U, 57415U, 93331U, |
| 72434 | 261318U, 133652U, 300129U, 161801U, 47270U, 82668U, 250431U, 113628U, |
| 72435 | 279879U, 195611U, 58566U, 94161U, 262199U, 134782U, 301325U, 160593U, |
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| 72437 | 162031U, 113689U, 279945U, 195841U, 58802U, 94215U, 262257U, 134843U, |
| 72438 | 301391U, 156189U, 43958U, 79152U, 246711U, 110086U, 276150U, 190321U, |
| 72439 | 131233U, 297692U, 154272U, 42013U, 77099U, 244550U, 108055U, 274005U, |
| 72440 | 188456U, 129198U, 295607U, 160017U, 45861U, 81163U, 248830U, 112107U, |
| 72441 | 278253U, 193857U, 133258U, 299735U, 157162U, 44961U, 80211U, 247826U, |
| 72442 | 111117U, 277239U, 191268U, 132266U, 298751U, 155245U, 43016U, 78158U, |
| 72443 | 245665U, 109086U, 275094U, 189403U, 130231U, 296666U, 161070U, 46733U, |
| 72444 | 82094U, 249820U, 113040U, 279250U, 194890U, 134193U, 300708U, 159773U, |
| 72445 | 193613U, 158949U, 192799U, 184649U, 126427U, 292755U, 223073U, 150141U, |
| 72446 | 315136U, 159138U, 233702U, 192988U, 236860U, 169514U, 50881U, 86451U, |
| 72447 | 254282U, 119243U, 285536U, 207929U, 142477U, 307406U, 164261U, 47394U, |
| 72448 | 82800U, 250571U, 114032U, 280307U, 202344U, 136763U, 301645U, 182441U, |
| 72449 | 54298U, 90028U, 257915U, 124570U, 290889U, 220737U, 148106U, 313078U, |
| 72450 | 170710U, 51468U, 87073U, 254902U, 120434U, 286675U, 209250U, 143831U, |
| 72451 | 308718U, 165470U, 47995U, 83437U, 251207U, 115237U, 281461U, 203678U, |
| 72452 | 138131U, 302972U, 183465U, 54791U, 90557U, 258449U, 125593U, 291884U, |
| 72453 | 221824U, 59025U, 94452U, 262508U, 149222U, 314174U, 171534U, 52142U, |
| 72454 | 87768U, 255603U, 121226U, 287483U, 210109U, 144726U, 309635U, 166299U, |
| 72455 | 48684U, 84148U, 251925U, 116064U, 282306U, 204570U, 139061U, 303926U, |
| 72456 | 184379U, 55348U, 91139U, 259044U, 126317U, 292636U, 222803U, 59270U, |
| 72457 | 94689U, 262762U, 150031U, 315017U, 173352U, 53739U, 89436U, 257290U, |
| 72458 | 123082U, 289379U, 211916U, 146601U, 311551U, 168130U, 50295U, 85831U, |
| 72459 | 253628U, 117934U, 284217U, 206390U, 140950U, 305857U, 186331U, 56677U, |
| 72460 | 92543U, 260480U, 127933U, 294311U, 224792U, 59976U, 95417U, 263537U, |
| 72461 | 151663U, 316709U, 183843U, 125837U, 292134U, 222225U, 227981U, 230288U, |
| 72462 | 240733U, 149521U, 314483U, 184583U, 126402U, 292728U, 223007U, 228236U, |
| 72463 | 230441U, 240895U, 150116U, 315109U, 186778U, 128264U, 294666U, 225277U, |
| 72464 | 228719U, 230594U, 241057U, 152010U, 317081U, 198098U, 197364U, 199722U, |
| 72465 | 198389U, 197627U, 200021U, 158193U, 158832U, 158255U, 158902U, 158224U, |
| 72466 | 158863U, 158286U, 158933U, 198144U, 197382U, 199737U, 198435U, 197645U, |
| 72467 | 200036U, 200366U, 200902U, 200940U, 61522U, 96614U, 264577U, 65917U, |
| 72468 | 100007U, 267507U, 72323U, 104310U, 270994U, 63034U, 98210U, 265977U, |
| 72469 | 68363U, 101889U, 269099U, 75058U, 106274U, 272672U, 61484U, 96574U, |
| 72470 | 264535U, 65841U, 99927U, 267423U, 72205U, 104186U, 270864U, 63002U, |
| 72471 | 98176U, 265941U, 68299U, 101821U, 269027U, 74958U, 106168U, 272560U, |
| 72472 | 61541U, 96634U, 264598U, 65955U, 100047U, 267549U, 72382U, 104372U, |
| 72473 | 271059U, 63050U, 98227U, 265995U, 68395U, 101923U, 269135U, 75108U, |
| 72474 | 106327U, 272728U, 61503U, 96594U, 264556U, 65879U, 99967U, 267465U, |
| 72475 | 72264U, 104248U, 270929U, 63018U, 98193U, 265959U, 68331U, 101855U, |
| 72476 | 269063U, 75008U, 106221U, 272616U, 68176U, 74835U, 62552U, 97700U, |
| 72477 | 265560U, 67173U, 101256U, 268576U, 73653U, 105603U, 272109U, 61831U, |
| 72478 | 96939U, 264899U, 66279U, 100389U, 267858U, 72727U, 104736U, 271391U, |
| 72479 | 63295U, 98487U, 266254U, 68745U, 102283U, 269475U, 75560U, 106782U, |
| 72480 | 273168U, 67797U, 74288U, 68240U, 74899U, 62914U, 98083U, 265860U, |
| 72481 | 67548U, 101635U, 268879U, 74028U, 105982U, 272412U, 62193U, 97322U, |
| 72482 | 265199U, 66654U, 100768U, 268161U, 73102U, 105115U, 271694U, 63594U, |
| 72483 | 98807U, 266509U, 69216U, 102689U, 269829U, 76055U, 107188U, 273522U, |
| 72484 | 67994U, 74599U, 162198U, 200380U, 162762U, 200916U, 65769U, 72133U, |
| 72485 | 179419U, 218041U, 169428U, 207843U, 164175U, 202258U, 182370U, 220666U, |
| 72486 | 163664U, 201879U, 179320U, 217942U, 169412U, 207827U, 164115U, 202242U, |
| 72487 | 182281U, 220653U, 163522U, 201737U, 156205U, 43975U, 79170U, 246730U, |
| 72488 | 110103U, 276168U, 190337U, 131250U, 297710U, 154288U, 42030U, 77117U, |
| 72489 | 244569U, 108072U, 274023U, 188472U, 129215U, 295625U, 160030U, 45875U, |
| 72490 | 81178U, 248846U, 112121U, 278268U, 193870U, 133272U, 299750U, 159478U, |
| 72491 | 193318U, 156608U, 44387U, 79604U, 247186U, 110529U, 276617U, 190727U, |
| 72492 | 131692U, 298144U, 154691U, 42442U, 77551U, 245025U, 108498U, 274472U, |
| 72493 | 188862U, 129657U, 296059U, 160398U, 46258U, 81586U, 249279U, 112515U, |
| 72494 | 278688U, 194228U, 57442U, 93360U, 261349U, 133679U, 300158U, 158302U, |
| 72495 | 192252U, 157176U, 44976U, 80227U, 247843U, 111132U, 277255U, 191282U, |
| 72496 | 132281U, 298767U, 155259U, 43031U, 78174U, 245682U, 109101U, 275110U, |
| 72497 | 189417U, 130246U, 296682U, 161081U, 46745U, 82107U, 249834U, 113052U, |
| 72498 | 279263U, 194901U, 58012U, 93769U, 261783U, 134205U, 300721U, 159784U, |
| 72499 | 193624U, 157787U, 45610U, 80897U, 248549U, 111780U, 277940U, 191880U, |
| 72500 | 132930U, 299437U, 155870U, 43665U, 78844U, 246388U, 109749U, 275795U, |
| 72501 | 190015U, 130895U, 297352U, 161836U, 47308U, 82709U, 250475U, 113666U, |
| 72502 | 279920U, 195646U, 58593U, 94190U, 262230U, 134820U, 301366U, 158959U, |
| 72503 | 192809U, 160650U, 233951U, 231241U, 241637U, 194470U, 237109U, 226945U, |
| 72504 | 229678U, 240092U, 232366U, 242825U, 158473U, 233467U, 192423U, 236625U, |
| 72505 | 161302U, 234187U, 231490U, 241899U, 195122U, 237345U, 227194U, 229940U, |
| 72506 | 240367U, 232615U, 243087U, 162056U, 234423U, 231739U, 242161U, 195866U, |
| 72507 | 237581U, 227443U, 230202U, 240642U, 232864U, 243349U, 159148U, 233716U, |
| 72508 | 192998U, 236874U, 25021U, 169484U, 50849U, 86417U, 254246U, 119211U, |
| 72509 | 285502U, 207899U, 142445U, 307372U, 164231U, 47362U, 82766U, 250535U, |
| 72510 | 114000U, 280273U, 202314U, 136731U, 301611U, 182417U, 54272U, 90000U, |
| 72511 | 257885U, 124544U, 290861U, 220713U, 148080U, 313050U, 179954U, 218562U, |
| 72512 | 170610U, 51396U, 86996U, 254820U, 120345U, 286580U, 209167U, 143742U, |
| 72513 | 308623U, 165370U, 47923U, 83360U, 251125U, 115148U, 281366U, 203595U, |
| 72514 | 138042U, 302877U, 183386U, 54734U, 90495U, 258382U, 125522U, 291807U, |
| 72515 | 221759U, 59003U, 94428U, 262482U, 149151U, 314097U, 175553U, 214293U, |
| 72516 | 171449U, 52051U, 87671U, 255500U, 121135U, 287386U, 210024U, 144635U, |
| 72517 | 309538U, 166214U, 48593U, 84051U, 251822U, 115973U, 282209U, 204485U, |
| 72518 | 138970U, 303829U, 184312U, 55275U, 91060U, 258959U, 126244U, 292557U, |
| 72519 | 222736U, 59221U, 94636U, 262705U, 149958U, 314938U, 181280U, 219700U, |
| 72520 | 173252U, 53667U, 89359U, 257208U, 122993U, 289284U, 211833U, 146512U, |
| 72521 | 311456U, 168030U, 50223U, 85754U, 253546U, 117845U, 284122U, 206307U, |
| 72522 | 140861U, 305762U, 186252U, 56620U, 92481U, 260413U, 127862U, 294234U, |
| 72523 | 224727U, 59954U, 95393U, 263511U, 151592U, 316632U, 177792U, 216475U, |
| 72524 | 183801U, 235545U, 231790U, 242215U, 222183U, 238835U, 227951U, 230256U, |
| 72525 | 240699U, 232915U, 243403U, 175895U, 234693U, 214575U, 237983U, 184516U, |
| 72526 | 235799U, 231916U, 242349U, 222940U, 239089U, 228206U, 230409U, 240861U, |
| 72527 | 233041U, 243537U, 186736U, 236269U, 232042U, 242483U, 225235U, 239559U, |
| 72528 | 228689U, 230562U, 241023U, 233167U, 243671U, 178100U, 235072U, 216745U, |
| 72529 | 238362U, 180134U, 218727U, 175737U, 214443U, 181471U, 219876U, 178001U, |
| 72530 | 216647U, 183856U, 235573U, 222238U, 238863U, 59083U, 175933U, 234719U, |
| 72531 | 214613U, 238009U, 184596U, 235827U, 223020U, 239117U, 59355U, 186791U, |
| 72532 | 236297U, 225290U, 239587U, 60166U, 178163U, 235098U, 216783U, 238388U, |
| 72533 | 183967U, 235660U, 222364U, 238950U, 228059U, 184691U, 235914U, 223115U, |
| 72534 | 239204U, 228314U, 186880U, 236384U, 225379U, 239674U, 228797U, 180031U, |
| 72535 | 218625U, 170726U, 51485U, 87091U, 254921U, 120451U, 286693U, 209266U, |
| 72536 | 143848U, 308736U, 165486U, 48012U, 83455U, 251226U, 115254U, 281479U, |
| 72537 | 203694U, 138148U, 302990U, 183478U, 54805U, 90572U, 258465U, 125607U, |
| 72538 | 291899U, 221837U, 149236U, 314189U, 175623U, 214350U, 181357U, 219763U, |
| 72539 | 173368U, 53756U, 89454U, 257309U, 123099U, 289397U, 211932U, 146618U, |
| 72540 | 311569U, 168146U, 50312U, 85849U, 253647U, 117951U, 284235U, 206406U, |
| 72541 | 140967U, 305875U, 186344U, 56691U, 92558U, 260496U, 127947U, 294326U, |
| 72542 | 224805U, 151677U, 316724U, 177887U, 216532U, 180057U, 218664U, 170772U, |
| 72543 | 51519U, 87127U, 254959U, 120485U, 286729U, 209298U, 143882U, 308772U, |
| 72544 | 165518U, 48046U, 83491U, 251264U, 115288U, 281515U, 203726U, 138182U, |
| 72545 | 303026U, 183504U, 54833U, 90602U, 258497U, 125635U, 291929U, 221863U, |
| 72546 | 149264U, 314219U, 175657U, 214386U, 181383U, 219802U, 173414U, 53790U, |
| 72547 | 89490U, 257347U, 123133U, 289433U, 211964U, 146652U, 311605U, 168178U, |
| 72548 | 50346U, 85885U, 253685U, 117985U, 284271U, 206438U, 141001U, 305911U, |
| 72549 | 186370U, 56719U, 92588U, 260528U, 127975U, 294356U, 224855U, 151705U, |
| 72550 | 316754U, 177921U, 216590U, 180124U, 218717U, 170887U, 51609U, 87223U, |
| 72551 | 255061U, 120575U, 286825U, 209382U, 143972U, 308868U, 165633U, 48151U, |
| 72552 | 83603U, 251383U, 115393U, 281627U, 203824U, 138287U, 303138U, 183595U, |
| 72553 | 54917U, 90693U, 258595U, 125719U, 292020U, 221940U, 149348U, 314310U, |
| 72554 | 175728U, 214434U, 181461U, 219866U, 173529U, 53880U, 89586U, 257449U, |
| 72555 | 123223U, 289529U, 212048U, 146742U, 311701U, 168293U, 50451U, 85997U, |
| 72556 | 253804U, 118090U, 284383U, 206536U, 141106U, 306023U, 186461U, 56803U, |
| 72557 | 92679U, 260626U, 128059U, 294447U, 224932U, 151789U, 316845U, 177992U, |
| 72558 | 216638U, 23132U, 24661U, 26052U, 16944U, 16951U, 17330U, 3870U, |
| 72559 | 17348U, 3892U, 25036U, 26582U, 25254U, 195989U, 39315U, 193015U, |
| 72560 | 16892U, 35108U, 24498U, 36123U, 16898U, 35119U, 24504U, 36134U, |
| 72561 | 26502U, 40759U, 163699U, 201922U, 162299U, 200500U, 162866U, 201054U, |
| 72562 | 174527U, 213252U, 21733U, 3356U, 5116U, 442U, 23812U, 3670U, |
| 72563 | 5331U, 195916U, 163753U, 201976U, 195898U, 162349U, 200550U, 195907U, |
| 72564 | 162929U, 201117U, 174545U, 213270U, 21727U, 7688U, 7545U, 25042U, |
| 72565 | 7433U, 7555U, 8245U, 26852U, 25761U, 5649U, 64150U, 6432U, |
| 72566 | 34459U, 9319U, 18356U, 10558U, 36645U, 14863U, 19644U, 12059U, |
| 72567 | 197020U, 39680U, 16380U, 21145U, 13354U, 69871U, 6870U, 34759U, |
| 72568 | 9535U, 18542U, 10738U, 37288U, 15356U, 20013U, 12498U, 163844U, |
| 72569 | 38839U, 15952U, 20730U, 12981U, 202035U, 40518U, 28108U, 16750U, |
| 72570 | 27484U, 21583U, 13619U, 27143U, 27748U, 29542U, 2305U, 63902U, |
| 72571 | 6168U, 34291U, 9175U, 18260U, 10438U, 36357U, 14643U, 19490U, |
| 72572 | 11863U, 196319U, 39478U, 16248U, 21057U, 13242U, 69592U, 6672U, |
| 72573 | 34591U, 9391U, 18446U, 10618U, 37000U, 15136U, 19859U, 12302U, |
| 72574 | 162541U, 38177U, 15720U, 20438U, 12839U, 200701U, 39916U, 27904U, |
| 72575 | 16518U, 27304U, 21291U, 13477U, 26999U, 27628U, 28957U, 2388U, |
| 72576 | 2488U, 33837U, 9024U, 18129U, 10313U, 6300U, 34375U, 9247U, |
| 72577 | 18308U, 10498U, 196542U, 39587U, 16314U, 21101U, 13298U, 2621U, |
| 72578 | 33944U, 9102U, 18196U, 10377U, 6771U, 34675U, 9463U, 18494U, |
| 72579 | 10678U, 163192U, 38544U, 15836U, 20609U, 12910U, 201348U, 40253U, |
| 72580 | 28006U, 16634U, 27394U, 21462U, 13548U, 27071U, 27688U, 29088U, |
| 72581 | 6069U, 65013U, 6528U, 36802U, 14994U, 19735U, 12177U, 198671U, |
| 72582 | 39753U, 16441U, 21186U, 13407U, 70708U, 6953U, 37445U, 15487U, |
| 72583 | 20104U, 12616U, 174561U, 38973U, 16027U, 20811U, 13034U, 213292U, |
| 72584 | 40637U, 28205U, 16825U, 27569U, 21664U, 13672U, 27212U, 27805U, |
| 72585 | 32759U, 30018U, 175729U, 214435U, 177993U, 216639U, 40775U, 22163U, |
| 72586 | 24932U, 4155U, 25547U, 4247U, 17505U, 3933U, 7731U, 3796U, |
| 72587 | 26426U, 4299U, 25197U, 4184U, 26859U, 868U, 5877U, 17290U, |
| 72588 | 22173U, 26559U, |
| 72589 | }; |
| 72590 | |
| 72591 | static inline void InitX86MCInstrInfo(MCInstrInfo *II) { |
| 72592 | II->InitMCInstrInfo(X86Descs.Insts, X86InstrNameIndices, X86InstrNameData, nullptr, nullptr, 22330); |
| 72593 | } |
| 72594 | |
| 72595 | } // end namespace llvm |
| 72596 | #endif // GET_INSTRINFO_MC_DESC |
| 72597 | |
| 72598 | #ifdef GET_INSTRINFO_HEADER |
| 72599 | #undef GET_INSTRINFO_HEADER |
| 72600 | namespace llvm { |
| 72601 | struct X86GenInstrInfo : public TargetInstrInfo { |
| 72602 | explicit X86GenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u); |
| 72603 | ~X86GenInstrInfo() override = default; |
| 72604 | |
| 72605 | }; |
| 72606 | } // end namespace llvm |
| 72607 | #endif // GET_INSTRINFO_HEADER |
| 72608 | |
| 72609 | #ifdef GET_INSTRINFO_HELPER_DECLS |
| 72610 | #undef GET_INSTRINFO_HELPER_DECLS |
| 72611 | |
| 72612 | static bool isThreeOperandsLEA(const MachineInstr &MI); |
| 72613 | |
| 72614 | #endif // GET_INSTRINFO_HELPER_DECLS |
| 72615 | |
| 72616 | #ifdef GET_INSTRINFO_HELPERS |
| 72617 | #undef GET_INSTRINFO_HELPERS |
| 72618 | |
| 72619 | bool X86InstrInfo::isThreeOperandsLEA(const MachineInstr &MI) { |
| 72620 | switch(MI.getOpcode()) { |
| 72621 | case X86::LEA32r: |
| 72622 | case X86::LEA64r: |
| 72623 | case X86::LEA64_32r: |
| 72624 | case X86::LEA16r: |
| 72625 | return ( |
| 72626 | MI.getOperand(1).isReg() |
| 72627 | && MI.getOperand(1).getReg().isValid() |
| 72628 | && MI.getOperand(3).isReg() |
| 72629 | && MI.getOperand(3).getReg().isValid() |
| 72630 | && ( |
| 72631 | ( |
| 72632 | MI.getOperand(4).isImm() |
| 72633 | && MI.getOperand(4).getImm() != 0 |
| 72634 | ) |
| 72635 | || (MI.getOperand(4).isGlobal()) |
| 72636 | ) |
| 72637 | ); |
| 72638 | default: |
| 72639 | return false; |
| 72640 | } // end of switch-stmt |
| 72641 | } |
| 72642 | |
| 72643 | #endif // GET_INSTRINFO_HELPERS |
| 72644 | |
| 72645 | #ifdef GET_INSTRINFO_CTOR_DTOR |
| 72646 | #undef GET_INSTRINFO_CTOR_DTOR |
| 72647 | namespace llvm { |
| 72648 | extern const X86InstrTable X86Descs; |
| 72649 | extern const unsigned X86InstrNameIndices[]; |
| 72650 | extern const char X86InstrNameData[]; |
| 72651 | X86GenInstrInfo::X86GenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode) |
| 72652 | : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) { |
| 72653 | InitMCInstrInfo(X86Descs.Insts, X86InstrNameIndices, X86InstrNameData, nullptr, nullptr, 22330); |
| 72654 | } |
| 72655 | } // end namespace llvm |
| 72656 | #endif // GET_INSTRINFO_CTOR_DTOR |
| 72657 | |
| 72658 | #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM |
| 72659 | #undef GET_INSTRINFO_OPERAND_TYPES_ENUM |
| 72660 | namespace llvm::X86::OpTypes { |
| 72661 | enum OperandType { |
| 72662 | AVX512RC = 0, |
| 72663 | anymem = 1, |
| 72664 | brtarget = 2, |
| 72665 | brtarget8 = 3, |
| 72666 | brtarget16 = 4, |
| 72667 | brtarget32 = 5, |
| 72668 | ccode = 6, |
| 72669 | cflags = 7, |
| 72670 | dstidx8 = 8, |
| 72671 | dstidx16 = 9, |
| 72672 | dstidx32 = 10, |
| 72673 | dstidx64 = 11, |
| 72674 | f16mem = 12, |
| 72675 | f32imm = 13, |
| 72676 | f32mem = 14, |
| 72677 | f64imm = 15, |
| 72678 | f64mem = 16, |
| 72679 | f80mem = 17, |
| 72680 | f128mem = 18, |
| 72681 | f256mem = 19, |
| 72682 | f512mem = 20, |
| 72683 | i1imm = 21, |
| 72684 | i8imm = 22, |
| 72685 | i8imm_brtarget = 23, |
| 72686 | i8mem = 24, |
| 72687 | i8mem_NOREX = 25, |
| 72688 | i16i8imm = 26, |
| 72689 | i16imm = 27, |
| 72690 | i16imm_brtarget = 28, |
| 72691 | i16mem = 29, |
| 72692 | i16u8imm = 30, |
| 72693 | i32i8imm = 31, |
| 72694 | i32imm = 32, |
| 72695 | i32imm_brtarget = 33, |
| 72696 | i32mem = 34, |
| 72697 | i32mem_TC = 35, |
| 72698 | i32u8imm = 36, |
| 72699 | i64i8imm = 37, |
| 72700 | i64i32imm = 38, |
| 72701 | i64i32imm_brtarget = 39, |
| 72702 | i64imm = 40, |
| 72703 | i64mem = 41, |
| 72704 | i64mem_TC = 42, |
| 72705 | i64u8imm = 43, |
| 72706 | i128mem = 44, |
| 72707 | i256mem = 45, |
| 72708 | i512mem = 46, |
| 72709 | i512mem_GR16 = 47, |
| 72710 | i512mem_GR32 = 48, |
| 72711 | i512mem_GR64 = 49, |
| 72712 | lea64_8mem = 50, |
| 72713 | lea64_16mem = 51, |
| 72714 | lea64_32mem = 52, |
| 72715 | lea64mem = 53, |
| 72716 | offset16_8 = 54, |
| 72717 | offset16_16 = 55, |
| 72718 | offset16_32 = 56, |
| 72719 | offset32_8 = 57, |
| 72720 | offset32_16 = 58, |
| 72721 | offset32_32 = 59, |
| 72722 | offset32_64 = 60, |
| 72723 | offset64_8 = 61, |
| 72724 | offset64_16 = 62, |
| 72725 | offset64_32 = 63, |
| 72726 | offset64_64 = 64, |
| 72727 | opaquemem = 65, |
| 72728 | ptype0 = 66, |
| 72729 | ptype1 = 67, |
| 72730 | ptype2 = 68, |
| 72731 | ptype3 = 69, |
| 72732 | ptype4 = 70, |
| 72733 | ptype5 = 71, |
| 72734 | sdmem = 72, |
| 72735 | shmem = 73, |
| 72736 | sibmem = 74, |
| 72737 | srcidx8 = 75, |
| 72738 | srcidx16 = 76, |
| 72739 | srcidx32 = 77, |
| 72740 | srcidx64 = 78, |
| 72741 | ssmem = 79, |
| 72742 | type0 = 80, |
| 72743 | type1 = 81, |
| 72744 | type2 = 82, |
| 72745 | type3 = 83, |
| 72746 | type4 = 84, |
| 72747 | type5 = 85, |
| 72748 | u4imm = 86, |
| 72749 | u8imm = 87, |
| 72750 | untyped_imm_0 = 88, |
| 72751 | vx32mem = 89, |
| 72752 | vx32xmem = 90, |
| 72753 | vx64mem = 91, |
| 72754 | vx64xmem = 92, |
| 72755 | vy32mem = 93, |
| 72756 | vy32xmem = 94, |
| 72757 | vy64mem = 95, |
| 72758 | vy64xmem = 96, |
| 72759 | vz32mem = 97, |
| 72760 | vz64mem = 98, |
| 72761 | GR16orGR32orGR64 = 99, |
| 72762 | GR32orGR64 = 100, |
| 72763 | RSTi = 101, |
| 72764 | TILEPair = 102, |
| 72765 | VK1Pair = 103, |
| 72766 | VK2Pair = 104, |
| 72767 | VK4Pair = 105, |
| 72768 | VK8Pair = 106, |
| 72769 | VK16Pair = 107, |
| 72770 | CCR = 108, |
| 72771 | CONTROL_REG = 109, |
| 72772 | DEBUG_REG = 110, |
| 72773 | DFCCR = 111, |
| 72774 | FPCCR = 112, |
| 72775 | FR16 = 113, |
| 72776 | FR16X = 114, |
| 72777 | FR32 = 115, |
| 72778 | FR32X = 116, |
| 72779 | FR64 = 117, |
| 72780 | FR64X = 118, |
| 72781 | GR8 = 119, |
| 72782 | GR8_ABCD_H = 120, |
| 72783 | GR8_ABCD_L = 121, |
| 72784 | GR8_NOREX = 122, |
| 72785 | GR8_NOREX2 = 123, |
| 72786 | GR16 = 124, |
| 72787 | GR16_ABCD = 125, |
| 72788 | GR16_NOREX = 126, |
| 72789 | GR16_NOREX2 = 127, |
| 72790 | GR32 = 128, |
| 72791 | GR32_ABCD = 129, |
| 72792 | GR32_AD = 130, |
| 72793 | GR32_ArgRef = 131, |
| 72794 | GR32_BPSP = 132, |
| 72795 | GR32_BSI = 133, |
| 72796 | GR32_CB = 134, |
| 72797 | GR32_DC = 135, |
| 72798 | GR32_DIBP = 136, |
| 72799 | GR32_NOREX = 137, |
| 72800 | GR32_NOREX2 = 138, |
| 72801 | GR32_NOREX2_NOSP = 139, |
| 72802 | GR32_NOREX_NOSP = 140, |
| 72803 | GR32_NOSP = 141, |
| 72804 | GR32_SIDI = 142, |
| 72805 | GR32_TC = 143, |
| 72806 | GR64 = 144, |
| 72807 | GR64PLTSafe = 145, |
| 72808 | GR64_A = 146, |
| 72809 | GR64_ABCD = 147, |
| 72810 | GR64_AD = 148, |
| 72811 | GR64_ArgRef = 149, |
| 72812 | GR64_NOREX = 150, |
| 72813 | GR64_NOREX2 = 151, |
| 72814 | GR64_NOREX2_NOSP = 152, |
| 72815 | GR64_NOREX_NOSP = 153, |
| 72816 | GR64_NOSP = 154, |
| 72817 | GR64_TC = 155, |
| 72818 | GR64_TCW64 = 156, |
| 72819 | GRH8 = 157, |
| 72820 | GRH16 = 158, |
| 72821 | LOW32_ADDR_ACCESS = 159, |
| 72822 | LOW32_ADDR_ACCESS_RBP = 160, |
| 72823 | RFP32 = 161, |
| 72824 | RFP64 = 162, |
| 72825 | RFP80 = 163, |
| 72826 | RFP80_7 = 164, |
| 72827 | RST = 165, |
| 72828 | SEGMENT_REG = 166, |
| 72829 | TILE = 167, |
| 72830 | TILEPAIR = 168, |
| 72831 | VK1 = 169, |
| 72832 | VK1PAIR = 170, |
| 72833 | VK1WM = 171, |
| 72834 | VK2 = 172, |
| 72835 | VK2PAIR = 173, |
| 72836 | VK2WM = 174, |
| 72837 | VK4 = 175, |
| 72838 | VK4PAIR = 176, |
| 72839 | VK4WM = 177, |
| 72840 | VK8 = 178, |
| 72841 | VK8PAIR = 179, |
| 72842 | VK8WM = 180, |
| 72843 | VK16 = 181, |
| 72844 | VK16PAIR = 182, |
| 72845 | VK16WM = 183, |
| 72846 | VK32 = 184, |
| 72847 | VK32WM = 185, |
| 72848 | VK64 = 186, |
| 72849 | VK64WM = 187, |
| 72850 | VR64 = 188, |
| 72851 | VR128 = 189, |
| 72852 | VR128X = 190, |
| 72853 | VR256 = 191, |
| 72854 | VR256X = 192, |
| 72855 | VR512 = 193, |
| 72856 | VR512_0_15 = 194, |
| 72857 | OPERAND_TYPE_LIST_END |
| 72858 | }; |
| 72859 | } // end namespace llvm::X86::OpTypes |
| 72860 | #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM |
| 72861 | |
| 72862 | #ifdef GET_INSTRINFO_OPERAND_TYPE |
| 72863 | #undef GET_INSTRINFO_OPERAND_TYPE |
| 72864 | namespace llvm::X86 { |
| 72865 | LLVM_READONLY |
| 72866 | static int getOperandType(uint16_t Opcode, uint16_t OpIdx) { |
| 72867 | static constexpr uint32_t Offsets[] = { |
| 72868 | 0, // PHI |
| 72869 | 1, // INLINEASM |
| 72870 | 1, // INLINEASM_BR |
| 72871 | 1, // CFI_INSTRUCTION |
| 72872 | 2, // EH_LABEL |
| 72873 | 3, // GC_LABEL |
| 72874 | 4, // ANNOTATION_LABEL |
| 72875 | 5, // KILL |
| 72876 | 5, // EXTRACT_SUBREG |
| 72877 | 8, // INSERT_SUBREG |
| 72878 | 12, // IMPLICIT_DEF |
| 72879 | 13, // INIT_UNDEF |
| 72880 | 14, // SUBREG_TO_REG |
| 72881 | 18, // COPY_TO_REGCLASS |
| 72882 | 21, // DBG_VALUE |
| 72883 | 21, // DBG_VALUE_LIST |
| 72884 | 21, // DBG_INSTR_REF |
| 72885 | 21, // DBG_PHI |
| 72886 | 21, // DBG_LABEL |
| 72887 | 22, // REG_SEQUENCE |
| 72888 | 24, // COPY |
| 72889 | 26, // BUNDLE |
| 72890 | 26, // LIFETIME_START |
| 72891 | 27, // LIFETIME_END |
| 72892 | 28, // PSEUDO_PROBE |
| 72893 | 32, // ARITH_FENCE |
| 72894 | 34, // STACKMAP |
| 72895 | 36, // FENTRY_CALL |
| 72896 | 36, // PATCHPOINT |
| 72897 | 42, // LOAD_STACK_GUARD |
| 72898 | 43, // PREALLOCATED_SETUP |
| 72899 | 44, // PREALLOCATED_ARG |
| 72900 | 47, // STATEPOINT |
| 72901 | 47, // LOCAL_ESCAPE |
| 72902 | 49, // FAULTING_OP |
| 72903 | 50, // PATCHABLE_OP |
| 72904 | 50, // PATCHABLE_FUNCTION_ENTER |
| 72905 | 50, // PATCHABLE_RET |
| 72906 | 50, // PATCHABLE_FUNCTION_EXIT |
| 72907 | 50, // PATCHABLE_TAIL_CALL |
| 72908 | 50, // PATCHABLE_EVENT_CALL |
| 72909 | 52, // PATCHABLE_TYPED_EVENT_CALL |
| 72910 | 55, // ICALL_BRANCH_FUNNEL |
| 72911 | 55, // FAKE_USE |
| 72912 | 55, // MEMBARRIER |
| 72913 | 55, // JUMP_TABLE_DEBUG_INFO |
| 72914 | 56, // CONVERGENCECTRL_ENTRY |
| 72915 | 57, // CONVERGENCECTRL_ANCHOR |
| 72916 | 58, // CONVERGENCECTRL_LOOP |
| 72917 | 60, // CONVERGENCECTRL_GLUE |
| 72918 | 61, // G_ASSERT_SEXT |
| 72919 | 64, // G_ASSERT_ZEXT |
| 72920 | 67, // G_ASSERT_ALIGN |
| 72921 | 70, // G_ADD |
| 72922 | 73, // G_SUB |
| 72923 | 76, // G_MUL |
| 72924 | 79, // G_SDIV |
| 72925 | 82, // G_UDIV |
| 72926 | 85, // G_SREM |
| 72927 | 88, // G_UREM |
| 72928 | 91, // G_SDIVREM |
| 72929 | 95, // G_UDIVREM |
| 72930 | 99, // G_AND |
| 72931 | 102, // G_OR |
| 72932 | 105, // G_XOR |
| 72933 | 108, // G_ABDS |
| 72934 | 111, // G_ABDU |
| 72935 | 114, // G_IMPLICIT_DEF |
| 72936 | 115, // G_PHI |
| 72937 | 116, // G_FRAME_INDEX |
| 72938 | 118, // G_GLOBAL_VALUE |
| 72939 | 120, // G_PTRAUTH_GLOBAL_VALUE |
| 72940 | 125, // G_CONSTANT_POOL |
| 72941 | 127, // G_EXTRACT |
| 72942 | 130, // G_UNMERGE_VALUES |
| 72943 | 132, // G_INSERT |
| 72944 | 136, // G_MERGE_VALUES |
| 72945 | 138, // G_BUILD_VECTOR |
| 72946 | 140, // G_BUILD_VECTOR_TRUNC |
| 72947 | 142, // G_CONCAT_VECTORS |
| 72948 | 144, // G_PTRTOINT |
| 72949 | 146, // G_INTTOPTR |
| 72950 | 148, // G_BITCAST |
| 72951 | 150, // G_FREEZE |
| 72952 | 152, // G_CONSTANT_FOLD_BARRIER |
| 72953 | 154, // G_INTRINSIC_FPTRUNC_ROUND |
| 72954 | 157, // G_INTRINSIC_TRUNC |
| 72955 | 159, // G_INTRINSIC_ROUND |
| 72956 | 161, // G_INTRINSIC_LRINT |
| 72957 | 163, // G_INTRINSIC_LLRINT |
| 72958 | 165, // G_INTRINSIC_ROUNDEVEN |
| 72959 | 167, // G_READCYCLECOUNTER |
| 72960 | 168, // G_READSTEADYCOUNTER |
| 72961 | 169, // G_LOAD |
| 72962 | 171, // G_SEXTLOAD |
| 72963 | 173, // G_ZEXTLOAD |
| 72964 | 175, // G_INDEXED_LOAD |
| 72965 | 180, // G_INDEXED_SEXTLOAD |
| 72966 | 185, // G_INDEXED_ZEXTLOAD |
| 72967 | 190, // G_STORE |
| 72968 | 192, // G_INDEXED_STORE |
| 72969 | 197, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
| 72970 | 202, // G_ATOMIC_CMPXCHG |
| 72971 | 206, // G_ATOMICRMW_XCHG |
| 72972 | 209, // G_ATOMICRMW_ADD |
| 72973 | 212, // G_ATOMICRMW_SUB |
| 72974 | 215, // G_ATOMICRMW_AND |
| 72975 | 218, // G_ATOMICRMW_NAND |
| 72976 | 221, // G_ATOMICRMW_OR |
| 72977 | 224, // G_ATOMICRMW_XOR |
| 72978 | 227, // G_ATOMICRMW_MAX |
| 72979 | 230, // G_ATOMICRMW_MIN |
| 72980 | 233, // G_ATOMICRMW_UMAX |
| 72981 | 236, // G_ATOMICRMW_UMIN |
| 72982 | 239, // G_ATOMICRMW_FADD |
| 72983 | 242, // G_ATOMICRMW_FSUB |
| 72984 | 245, // G_ATOMICRMW_FMAX |
| 72985 | 248, // G_ATOMICRMW_FMIN |
| 72986 | 251, // G_ATOMICRMW_FMAXIMUM |
| 72987 | 254, // G_ATOMICRMW_FMINIMUM |
| 72988 | 257, // G_ATOMICRMW_UINC_WRAP |
| 72989 | 260, // G_ATOMICRMW_UDEC_WRAP |
| 72990 | 263, // G_ATOMICRMW_USUB_COND |
| 72991 | 266, // G_ATOMICRMW_USUB_SAT |
| 72992 | 269, // G_FENCE |
| 72993 | 271, // G_PREFETCH |
| 72994 | 275, // G_BRCOND |
| 72995 | 277, // G_BRINDIRECT |
| 72996 | 278, // G_INVOKE_REGION_START |
| 72997 | 278, // G_INTRINSIC |
| 72998 | 279, // G_INTRINSIC_W_SIDE_EFFECTS |
| 72999 | 280, // G_INTRINSIC_CONVERGENT |
| 73000 | 281, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
| 73001 | 282, // G_ANYEXT |
| 73002 | 284, // G_TRUNC |
| 73003 | 286, // G_CONSTANT |
| 73004 | 288, // G_FCONSTANT |
| 73005 | 290, // G_VASTART |
| 73006 | 291, // G_VAARG |
| 73007 | 294, // G_SEXT |
| 73008 | 296, // G_SEXT_INREG |
| 73009 | 299, // G_ZEXT |
| 73010 | 301, // G_SHL |
| 73011 | 304, // G_LSHR |
| 73012 | 307, // G_ASHR |
| 73013 | 310, // G_FSHL |
| 73014 | 314, // G_FSHR |
| 73015 | 318, // G_ROTR |
| 73016 | 321, // G_ROTL |
| 73017 | 324, // G_ICMP |
| 73018 | 328, // G_FCMP |
| 73019 | 332, // G_SCMP |
| 73020 | 335, // G_UCMP |
| 73021 | 338, // G_SELECT |
| 73022 | 342, // G_UADDO |
| 73023 | 346, // G_UADDE |
| 73024 | 351, // G_USUBO |
| 73025 | 355, // G_USUBE |
| 73026 | 360, // G_SADDO |
| 73027 | 364, // G_SADDE |
| 73028 | 369, // G_SSUBO |
| 73029 | 373, // G_SSUBE |
| 73030 | 378, // G_UMULO |
| 73031 | 382, // G_SMULO |
| 73032 | 386, // G_UMULH |
| 73033 | 389, // G_SMULH |
| 73034 | 392, // G_UADDSAT |
| 73035 | 395, // G_SADDSAT |
| 73036 | 398, // G_USUBSAT |
| 73037 | 401, // G_SSUBSAT |
| 73038 | 404, // G_USHLSAT |
| 73039 | 407, // G_SSHLSAT |
| 73040 | 410, // G_SMULFIX |
| 73041 | 414, // G_UMULFIX |
| 73042 | 418, // G_SMULFIXSAT |
| 73043 | 422, // G_UMULFIXSAT |
| 73044 | 426, // G_SDIVFIX |
| 73045 | 430, // G_UDIVFIX |
| 73046 | 434, // G_SDIVFIXSAT |
| 73047 | 438, // G_UDIVFIXSAT |
| 73048 | 442, // G_FADD |
| 73049 | 445, // G_FSUB |
| 73050 | 448, // G_FMUL |
| 73051 | 451, // G_FMA |
| 73052 | 455, // G_FMAD |
| 73053 | 459, // G_FDIV |
| 73054 | 462, // G_FREM |
| 73055 | 465, // G_FPOW |
| 73056 | 468, // G_FPOWI |
| 73057 | 471, // G_FEXP |
| 73058 | 473, // G_FEXP2 |
| 73059 | 475, // G_FEXP10 |
| 73060 | 477, // G_FLOG |
| 73061 | 479, // G_FLOG2 |
| 73062 | 481, // G_FLOG10 |
| 73063 | 483, // G_FLDEXP |
| 73064 | 486, // G_FFREXP |
| 73065 | 489, // G_FNEG |
| 73066 | 491, // G_FPEXT |
| 73067 | 493, // G_FPTRUNC |
| 73068 | 495, // G_FPTOSI |
| 73069 | 497, // G_FPTOUI |
| 73070 | 499, // G_SITOFP |
| 73071 | 501, // G_UITOFP |
| 73072 | 503, // G_FPTOSI_SAT |
| 73073 | 505, // G_FPTOUI_SAT |
| 73074 | 507, // G_FABS |
| 73075 | 509, // G_FCOPYSIGN |
| 73076 | 512, // G_IS_FPCLASS |
| 73077 | 515, // G_FCANONICALIZE |
| 73078 | 517, // G_FMINNUM |
| 73079 | 520, // G_FMAXNUM |
| 73080 | 523, // G_FMINNUM_IEEE |
| 73081 | 526, // G_FMAXNUM_IEEE |
| 73082 | 529, // G_FMINIMUM |
| 73083 | 532, // G_FMAXIMUM |
| 73084 | 535, // G_FMINIMUMNUM |
| 73085 | 538, // G_FMAXIMUMNUM |
| 73086 | 541, // G_GET_FPENV |
| 73087 | 542, // G_SET_FPENV |
| 73088 | 543, // G_RESET_FPENV |
| 73089 | 543, // G_GET_FPMODE |
| 73090 | 544, // G_SET_FPMODE |
| 73091 | 545, // G_RESET_FPMODE |
| 73092 | 545, // G_PTR_ADD |
| 73093 | 548, // G_PTRMASK |
| 73094 | 551, // G_SMIN |
| 73095 | 554, // G_SMAX |
| 73096 | 557, // G_UMIN |
| 73097 | 560, // G_UMAX |
| 73098 | 563, // G_ABS |
| 73099 | 565, // G_LROUND |
| 73100 | 567, // G_LLROUND |
| 73101 | 569, // G_BR |
| 73102 | 570, // G_BRJT |
| 73103 | 573, // G_VSCALE |
| 73104 | 575, // G_INSERT_SUBVECTOR |
| 73105 | 579, // G_EXTRACT_SUBVECTOR |
| 73106 | 582, // G_INSERT_VECTOR_ELT |
| 73107 | 586, // G_EXTRACT_VECTOR_ELT |
| 73108 | 589, // G_SHUFFLE_VECTOR |
| 73109 | 593, // G_SPLAT_VECTOR |
| 73110 | 595, // G_STEP_VECTOR |
| 73111 | 597, // G_VECTOR_COMPRESS |
| 73112 | 601, // G_CTTZ |
| 73113 | 603, // G_CTTZ_ZERO_UNDEF |
| 73114 | 605, // G_CTLZ |
| 73115 | 607, // G_CTLZ_ZERO_UNDEF |
| 73116 | 609, // G_CTPOP |
| 73117 | 611, // G_BSWAP |
| 73118 | 613, // G_BITREVERSE |
| 73119 | 615, // G_FCEIL |
| 73120 | 617, // G_FCOS |
| 73121 | 619, // G_FSIN |
| 73122 | 621, // G_FSINCOS |
| 73123 | 624, // G_FTAN |
| 73124 | 626, // G_FACOS |
| 73125 | 628, // G_FASIN |
| 73126 | 630, // G_FATAN |
| 73127 | 632, // G_FATAN2 |
| 73128 | 635, // G_FCOSH |
| 73129 | 637, // G_FSINH |
| 73130 | 639, // G_FTANH |
| 73131 | 641, // G_FSQRT |
| 73132 | 643, // G_FFLOOR |
| 73133 | 645, // G_FRINT |
| 73134 | 647, // G_FNEARBYINT |
| 73135 | 649, // G_ADDRSPACE_CAST |
| 73136 | 651, // G_BLOCK_ADDR |
| 73137 | 653, // G_JUMP_TABLE |
| 73138 | 655, // G_DYN_STACKALLOC |
| 73139 | 658, // G_STACKSAVE |
| 73140 | 659, // G_STACKRESTORE |
| 73141 | 660, // G_STRICT_FADD |
| 73142 | 663, // G_STRICT_FSUB |
| 73143 | 666, // G_STRICT_FMUL |
| 73144 | 669, // G_STRICT_FDIV |
| 73145 | 672, // G_STRICT_FREM |
| 73146 | 675, // G_STRICT_FMA |
| 73147 | 679, // G_STRICT_FSQRT |
| 73148 | 681, // G_STRICT_FLDEXP |
| 73149 | 684, // G_READ_REGISTER |
| 73150 | 686, // G_WRITE_REGISTER |
| 73151 | 688, // G_MEMCPY |
| 73152 | 692, // G_MEMCPY_INLINE |
| 73153 | 695, // G_MEMMOVE |
| 73154 | 699, // G_MEMSET |
| 73155 | 703, // G_BZERO |
| 73156 | 706, // G_TRAP |
| 73157 | 706, // G_DEBUGTRAP |
| 73158 | 706, // G_UBSANTRAP |
| 73159 | 707, // G_VECREDUCE_SEQ_FADD |
| 73160 | 710, // G_VECREDUCE_SEQ_FMUL |
| 73161 | 713, // G_VECREDUCE_FADD |
| 73162 | 715, // G_VECREDUCE_FMUL |
| 73163 | 717, // G_VECREDUCE_FMAX |
| 73164 | 719, // G_VECREDUCE_FMIN |
| 73165 | 721, // G_VECREDUCE_FMAXIMUM |
| 73166 | 723, // G_VECREDUCE_FMINIMUM |
| 73167 | 725, // G_VECREDUCE_ADD |
| 73168 | 727, // G_VECREDUCE_MUL |
| 73169 | 729, // G_VECREDUCE_AND |
| 73170 | 731, // G_VECREDUCE_OR |
| 73171 | 733, // G_VECREDUCE_XOR |
| 73172 | 735, // G_VECREDUCE_SMAX |
| 73173 | 737, // G_VECREDUCE_SMIN |
| 73174 | 739, // G_VECREDUCE_UMAX |
| 73175 | 741, // G_VECREDUCE_UMIN |
| 73176 | 743, // G_SBFX |
| 73177 | 747, // G_UBFX |
| 73178 | 751, // ADD16ri_DB |
| 73179 | 754, // ADD16rr_DB |
| 73180 | 757, // ADD32ri_DB |
| 73181 | 760, // ADD32rr_DB |
| 73182 | 763, // ADD64ri32_DB |
| 73183 | 766, // ADD64rr_DB |
| 73184 | 769, // ADD8ri_DB |
| 73185 | 772, // ADD8rr_DB |
| 73186 | 775, // AVX1_SETALLONES |
| 73187 | 776, // AVX2_SETALLONES |
| 73188 | 777, // AVX512_128_SET0 |
| 73189 | 778, // AVX512_256_SET0 |
| 73190 | 779, // AVX512_512_SET0 |
| 73191 | 780, // AVX512_512_SETALLONES |
| 73192 | 781, // AVX512_512_SEXT_MASK_32 |
| 73193 | 783, // AVX512_512_SEXT_MASK_64 |
| 73194 | 785, // AVX512_FsFLD0F128 |
| 73195 | 786, // AVX512_FsFLD0SD |
| 73196 | 787, // AVX512_FsFLD0SH |
| 73197 | 788, // AVX512_FsFLD0SS |
| 73198 | 789, // AVX_SET0 |
| 73199 | 790, // CALL64m_RVMARKER |
| 73200 | 792, // CALL64pcrel32_RVMARKER |
| 73201 | 794, // CALL64r_ImpCall |
| 73202 | 795, // CALL64r_RVMARKER |
| 73203 | 797, // FsFLD0F128 |
| 73204 | 798, // FsFLD0SD |
| 73205 | 799, // FsFLD0SH |
| 73206 | 800, // FsFLD0SS |
| 73207 | 801, // G_FILD |
| 73208 | 803, // G_FIST |
| 73209 | 805, // INDIRECT_THUNK_CALL32 |
| 73210 | 806, // INDIRECT_THUNK_CALL64 |
| 73211 | 807, // INDIRECT_THUNK_TCRETURN32 |
| 73212 | 809, // INDIRECT_THUNK_TCRETURN64 |
| 73213 | 811, // KSET0D |
| 73214 | 812, // KSET0Q |
| 73215 | 813, // KSET0W |
| 73216 | 814, // KSET1D |
| 73217 | 815, // KSET1Q |
| 73218 | 816, // KSET1W |
| 73219 | 817, // LCMPXCHG16B_NO_RBX |
| 73220 | 819, // LCMPXCHG16B_SAVE_RBX |
| 73221 | 823, // MMX_SET0 |
| 73222 | 824, // MORESTACK_RET |
| 73223 | 824, // MORESTACK_RET_RESTORE_R10 |
| 73224 | 824, // MOV32ImmSExti8 |
| 73225 | 826, // MOV32r0 |
| 73226 | 827, // MOV32r1 |
| 73227 | 828, // MOV32r_1 |
| 73228 | 829, // MOV32ri64 |
| 73229 | 831, // MOV64ImmSExti8 |
| 73230 | 833, // MWAITX |
| 73231 | 836, // MWAITX_SAVE_RBX |
| 73232 | 839, // PLDTILECFGV |
| 73233 | 840, // PLEA32r |
| 73234 | 842, // PLEA64r |
| 73235 | 844, // PT2RPNTLVWZ0RST1V |
| 73236 | 849, // PT2RPNTLVWZ0RSV |
| 73237 | 854, // PT2RPNTLVWZ0T1V |
| 73238 | 859, // PT2RPNTLVWZ0V |
| 73239 | 864, // PT2RPNTLVWZ1RST1V |
| 73240 | 869, // PT2RPNTLVWZ1RSV |
| 73241 | 874, // PT2RPNTLVWZ1T1V |
| 73242 | 879, // PT2RPNTLVWZ1V |
| 73243 | 884, // PTDPBF16PSV |
| 73244 | 891, // PTDPBSSDV |
| 73245 | 898, // PTDPBSUDV |
| 73246 | 905, // PTDPBUSDV |
| 73247 | 912, // PTDPBUUDV |
| 73248 | 919, // PTDPFP16PSV |
| 73249 | 926, // PTILELOADDRST1V |
| 73250 | 930, // PTILELOADDRSV |
| 73251 | 934, // PTILELOADDT1V |
| 73252 | 938, // PTILELOADDV |
| 73253 | 942, // PTILEPAIRLOAD |
| 73254 | 944, // PTILEPAIRSTORE |
| 73255 | 946, // PTILESTOREDV |
| 73256 | 950, // PTILEZEROV |
| 73257 | 953, // RDFLAGS32 |
| 73258 | 954, // RDFLAGS64 |
| 73259 | 955, // SEH_BeginEpilogue |
| 73260 | 955, // SEH_EndEpilogue |
| 73261 | 955, // SEH_EndPrologue |
| 73262 | 955, // SEH_PushFrame |
| 73263 | 956, // SEH_PushReg |
| 73264 | 957, // SEH_SaveReg |
| 73265 | 959, // SEH_SaveXMM |
| 73266 | 961, // SEH_SetFrame |
| 73267 | 963, // SEH_StackAlign |
| 73268 | 964, // SEH_StackAlloc |
| 73269 | 965, // SEH_UnwindV2Start |
| 73270 | 965, // SEH_UnwindVersion |
| 73271 | 966, // SETB_C32r |
| 73272 | 967, // SETB_C64r |
| 73273 | 968, // SHLDROT32ri |
| 73274 | 971, // SHLDROT64ri |
| 73275 | 974, // SHRDROT32ri |
| 73276 | 977, // SHRDROT64ri |
| 73277 | 980, // VMOVAPSZ128mr_NOVLX |
| 73278 | 982, // VMOVAPSZ128rm_NOVLX |
| 73279 | 984, // VMOVAPSZ256mr_NOVLX |
| 73280 | 986, // VMOVAPSZ256rm_NOVLX |
| 73281 | 988, // VMOVUPSZ128mr_NOVLX |
| 73282 | 990, // VMOVUPSZ128rm_NOVLX |
| 73283 | 992, // VMOVUPSZ256mr_NOVLX |
| 73284 | 994, // VMOVUPSZ256rm_NOVLX |
| 73285 | 996, // V_SET0 |
| 73286 | 997, // V_SETALLONES |
| 73287 | 998, // WRFLAGS32 |
| 73288 | 999, // WRFLAGS64 |
| 73289 | 1000, // XABORT_DEF |
| 73290 | 1000, // XOR32_FP |
| 73291 | 1002, // XOR64_FP |
| 73292 | 1004, // AAA |
| 73293 | 1004, // AAD8i8 |
| 73294 | 1005, // AADD32mr |
| 73295 | 1007, // AADD32mr_EVEX |
| 73296 | 1009, // AADD64mr |
| 73297 | 1011, // AADD64mr_EVEX |
| 73298 | 1013, // AAM8i8 |
| 73299 | 1014, // AAND32mr |
| 73300 | 1016, // AAND32mr_EVEX |
| 73301 | 1018, // AAND64mr |
| 73302 | 1020, // AAND64mr_EVEX |
| 73303 | 1022, // AAS |
| 73304 | 1022, // ABS_F |
| 73305 | 1022, // ABS_Fp32 |
| 73306 | 1024, // ABS_Fp64 |
| 73307 | 1026, // ABS_Fp80 |
| 73308 | 1028, // ADC16i16 |
| 73309 | 1029, // ADC16mi |
| 73310 | 1031, // ADC16mi8 |
| 73311 | 1033, // ADC16mi8_EVEX |
| 73312 | 1035, // ADC16mi8_ND |
| 73313 | 1038, // ADC16mi_EVEX |
| 73314 | 1040, // ADC16mi_ND |
| 73315 | 1043, // ADC16mr |
| 73316 | 1045, // ADC16mr_EVEX |
| 73317 | 1047, // ADC16mr_ND |
| 73318 | 1050, // ADC16ri |
| 73319 | 1053, // ADC16ri8 |
| 73320 | 1056, // ADC16ri8_EVEX |
| 73321 | 1059, // ADC16ri8_ND |
| 73322 | 1062, // ADC16ri_EVEX |
| 73323 | 1065, // ADC16ri_ND |
| 73324 | 1068, // ADC16rm |
| 73325 | 1071, // ADC16rm_EVEX |
| 73326 | 1074, // ADC16rm_ND |
| 73327 | 1077, // ADC16rr |
| 73328 | 1080, // ADC16rr_EVEX |
| 73329 | 1083, // ADC16rr_EVEX_REV |
| 73330 | 1086, // ADC16rr_ND |
| 73331 | 1089, // ADC16rr_ND_REV |
| 73332 | 1092, // ADC16rr_REV |
| 73333 | 1095, // ADC32i32 |
| 73334 | 1096, // ADC32mi |
| 73335 | 1098, // ADC32mi8 |
| 73336 | 1100, // ADC32mi8_EVEX |
| 73337 | 1102, // ADC32mi8_ND |
| 73338 | 1105, // ADC32mi_EVEX |
| 73339 | 1107, // ADC32mi_ND |
| 73340 | 1110, // ADC32mr |
| 73341 | 1112, // ADC32mr_EVEX |
| 73342 | 1114, // ADC32mr_ND |
| 73343 | 1117, // ADC32ri |
| 73344 | 1120, // ADC32ri8 |
| 73345 | 1123, // ADC32ri8_EVEX |
| 73346 | 1126, // ADC32ri8_ND |
| 73347 | 1129, // ADC32ri_EVEX |
| 73348 | 1132, // ADC32ri_ND |
| 73349 | 1135, // ADC32rm |
| 73350 | 1138, // ADC32rm_EVEX |
| 73351 | 1141, // ADC32rm_ND |
| 73352 | 1144, // ADC32rr |
| 73353 | 1147, // ADC32rr_EVEX |
| 73354 | 1150, // ADC32rr_EVEX_REV |
| 73355 | 1153, // ADC32rr_ND |
| 73356 | 1156, // ADC32rr_ND_REV |
| 73357 | 1159, // ADC32rr_REV |
| 73358 | 1162, // ADC64i32 |
| 73359 | 1163, // ADC64mi32 |
| 73360 | 1165, // ADC64mi32_EVEX |
| 73361 | 1167, // ADC64mi32_ND |
| 73362 | 1170, // ADC64mi8 |
| 73363 | 1172, // ADC64mi8_EVEX |
| 73364 | 1174, // ADC64mi8_ND |
| 73365 | 1177, // ADC64mr |
| 73366 | 1179, // ADC64mr_EVEX |
| 73367 | 1181, // ADC64mr_ND |
| 73368 | 1184, // ADC64ri32 |
| 73369 | 1187, // ADC64ri32_EVEX |
| 73370 | 1190, // ADC64ri32_ND |
| 73371 | 1193, // ADC64ri8 |
| 73372 | 1196, // ADC64ri8_EVEX |
| 73373 | 1199, // ADC64ri8_ND |
| 73374 | 1202, // ADC64rm |
| 73375 | 1205, // ADC64rm_EVEX |
| 73376 | 1208, // ADC64rm_ND |
| 73377 | 1211, // ADC64rr |
| 73378 | 1214, // ADC64rr_EVEX |
| 73379 | 1217, // ADC64rr_EVEX_REV |
| 73380 | 1220, // ADC64rr_ND |
| 73381 | 1223, // ADC64rr_ND_REV |
| 73382 | 1226, // ADC64rr_REV |
| 73383 | 1229, // ADC8i8 |
| 73384 | 1230, // ADC8mi |
| 73385 | 1232, // ADC8mi8 |
| 73386 | 1234, // ADC8mi_EVEX |
| 73387 | 1236, // ADC8mi_ND |
| 73388 | 1239, // ADC8mr |
| 73389 | 1241, // ADC8mr_EVEX |
| 73390 | 1243, // ADC8mr_ND |
| 73391 | 1246, // ADC8ri |
| 73392 | 1249, // ADC8ri8 |
| 73393 | 1252, // ADC8ri_EVEX |
| 73394 | 1255, // ADC8ri_ND |
| 73395 | 1258, // ADC8rm |
| 73396 | 1261, // ADC8rm_EVEX |
| 73397 | 1264, // ADC8rm_ND |
| 73398 | 1267, // ADC8rr |
| 73399 | 1270, // ADC8rr_EVEX |
| 73400 | 1273, // ADC8rr_EVEX_REV |
| 73401 | 1276, // ADC8rr_ND |
| 73402 | 1279, // ADC8rr_ND_REV |
| 73403 | 1282, // ADC8rr_REV |
| 73404 | 1285, // ADCX32rm |
| 73405 | 1288, // ADCX32rm_EVEX |
| 73406 | 1291, // ADCX32rm_ND |
| 73407 | 1294, // ADCX32rr |
| 73408 | 1297, // ADCX32rr_EVEX |
| 73409 | 1300, // ADCX32rr_ND |
| 73410 | 1303, // ADCX64rm |
| 73411 | 1306, // ADCX64rm_EVEX |
| 73412 | 1309, // ADCX64rm_ND |
| 73413 | 1312, // ADCX64rr |
| 73414 | 1315, // ADCX64rr_EVEX |
| 73415 | 1318, // ADCX64rr_ND |
| 73416 | 1321, // ADD16i16 |
| 73417 | 1322, // ADD16mi |
| 73418 | 1324, // ADD16mi8 |
| 73419 | 1326, // ADD16mi8_EVEX |
| 73420 | 1328, // ADD16mi8_ND |
| 73421 | 1331, // ADD16mi8_NF |
| 73422 | 1333, // ADD16mi8_NF_ND |
| 73423 | 1336, // ADD16mi_EVEX |
| 73424 | 1338, // ADD16mi_ND |
| 73425 | 1341, // ADD16mi_NF |
| 73426 | 1343, // ADD16mi_NF_ND |
| 73427 | 1346, // ADD16mr |
| 73428 | 1348, // ADD16mr_EVEX |
| 73429 | 1350, // ADD16mr_ND |
| 73430 | 1353, // ADD16mr_NF |
| 73431 | 1355, // ADD16mr_NF_ND |
| 73432 | 1358, // ADD16ri |
| 73433 | 1361, // ADD16ri8 |
| 73434 | 1364, // ADD16ri8_EVEX |
| 73435 | 1367, // ADD16ri8_ND |
| 73436 | 1370, // ADD16ri8_NF |
| 73437 | 1373, // ADD16ri8_NF_ND |
| 73438 | 1376, // ADD16ri_EVEX |
| 73439 | 1379, // ADD16ri_ND |
| 73440 | 1382, // ADD16ri_NF |
| 73441 | 1385, // ADD16ri_NF_ND |
| 73442 | 1388, // ADD16rm |
| 73443 | 1391, // ADD16rm_EVEX |
| 73444 | 1394, // ADD16rm_ND |
| 73445 | 1397, // ADD16rm_NF |
| 73446 | 1400, // ADD16rm_NF_ND |
| 73447 | 1403, // ADD16rr |
| 73448 | 1406, // ADD16rr_EVEX |
| 73449 | 1409, // ADD16rr_EVEX_REV |
| 73450 | 1412, // ADD16rr_ND |
| 73451 | 1415, // ADD16rr_ND_REV |
| 73452 | 1418, // ADD16rr_NF |
| 73453 | 1421, // ADD16rr_NF_ND |
| 73454 | 1424, // ADD16rr_NF_ND_REV |
| 73455 | 1427, // ADD16rr_NF_REV |
| 73456 | 1430, // ADD16rr_REV |
| 73457 | 1433, // ADD32i32 |
| 73458 | 1434, // ADD32mi |
| 73459 | 1436, // ADD32mi8 |
| 73460 | 1438, // ADD32mi8_EVEX |
| 73461 | 1440, // ADD32mi8_ND |
| 73462 | 1443, // ADD32mi8_NF |
| 73463 | 1445, // ADD32mi8_NF_ND |
| 73464 | 1448, // ADD32mi_EVEX |
| 73465 | 1450, // ADD32mi_ND |
| 73466 | 1453, // ADD32mi_NF |
| 73467 | 1455, // ADD32mi_NF_ND |
| 73468 | 1458, // ADD32mr |
| 73469 | 1460, // ADD32mr_EVEX |
| 73470 | 1462, // ADD32mr_ND |
| 73471 | 1465, // ADD32mr_NF |
| 73472 | 1467, // ADD32mr_NF_ND |
| 73473 | 1470, // ADD32ri |
| 73474 | 1473, // ADD32ri8 |
| 73475 | 1476, // ADD32ri8_EVEX |
| 73476 | 1479, // ADD32ri8_ND |
| 73477 | 1482, // ADD32ri8_NF |
| 73478 | 1485, // ADD32ri8_NF_ND |
| 73479 | 1488, // ADD32ri_EVEX |
| 73480 | 1491, // ADD32ri_ND |
| 73481 | 1494, // ADD32ri_NF |
| 73482 | 1497, // ADD32ri_NF_ND |
| 73483 | 1500, // ADD32rm |
| 73484 | 1503, // ADD32rm_EVEX |
| 73485 | 1506, // ADD32rm_ND |
| 73486 | 1509, // ADD32rm_NF |
| 73487 | 1512, // ADD32rm_NF_ND |
| 73488 | 1515, // ADD32rr |
| 73489 | 1518, // ADD32rr_EVEX |
| 73490 | 1521, // ADD32rr_EVEX_REV |
| 73491 | 1524, // ADD32rr_ND |
| 73492 | 1527, // ADD32rr_ND_REV |
| 73493 | 1530, // ADD32rr_NF |
| 73494 | 1533, // ADD32rr_NF_ND |
| 73495 | 1536, // ADD32rr_NF_ND_REV |
| 73496 | 1539, // ADD32rr_NF_REV |
| 73497 | 1542, // ADD32rr_REV |
| 73498 | 1545, // ADD64i32 |
| 73499 | 1546, // ADD64mi32 |
| 73500 | 1548, // ADD64mi32_EVEX |
| 73501 | 1550, // ADD64mi32_ND |
| 73502 | 1553, // ADD64mi32_NF |
| 73503 | 1555, // ADD64mi32_NF_ND |
| 73504 | 1558, // ADD64mi8 |
| 73505 | 1560, // ADD64mi8_EVEX |
| 73506 | 1562, // ADD64mi8_ND |
| 73507 | 1565, // ADD64mi8_NF |
| 73508 | 1567, // ADD64mi8_NF_ND |
| 73509 | 1570, // ADD64mr |
| 73510 | 1572, // ADD64mr_EVEX |
| 73511 | 1574, // ADD64mr_ND |
| 73512 | 1577, // ADD64mr_NF |
| 73513 | 1579, // ADD64mr_NF_ND |
| 73514 | 1582, // ADD64ri32 |
| 73515 | 1585, // ADD64ri32_EVEX |
| 73516 | 1588, // ADD64ri32_ND |
| 73517 | 1591, // ADD64ri32_NF |
| 73518 | 1594, // ADD64ri32_NF_ND |
| 73519 | 1597, // ADD64ri8 |
| 73520 | 1600, // ADD64ri8_EVEX |
| 73521 | 1603, // ADD64ri8_ND |
| 73522 | 1606, // ADD64ri8_NF |
| 73523 | 1609, // ADD64ri8_NF_ND |
| 73524 | 1612, // ADD64rm |
| 73525 | 1615, // ADD64rm_EVEX |
| 73526 | 1618, // ADD64rm_ND |
| 73527 | 1621, // ADD64rm_NF |
| 73528 | 1624, // ADD64rm_NF_ND |
| 73529 | 1627, // ADD64rr |
| 73530 | 1630, // ADD64rr_EVEX |
| 73531 | 1633, // ADD64rr_EVEX_REV |
| 73532 | 1636, // ADD64rr_ND |
| 73533 | 1639, // ADD64rr_ND_REV |
| 73534 | 1642, // ADD64rr_NF |
| 73535 | 1645, // ADD64rr_NF_ND |
| 73536 | 1648, // ADD64rr_NF_ND_REV |
| 73537 | 1651, // ADD64rr_NF_REV |
| 73538 | 1654, // ADD64rr_REV |
| 73539 | 1657, // ADD8i8 |
| 73540 | 1658, // ADD8mi |
| 73541 | 1660, // ADD8mi8 |
| 73542 | 1662, // ADD8mi_EVEX |
| 73543 | 1664, // ADD8mi_ND |
| 73544 | 1667, // ADD8mi_NF |
| 73545 | 1669, // ADD8mi_NF_ND |
| 73546 | 1672, // ADD8mr |
| 73547 | 1674, // ADD8mr_EVEX |
| 73548 | 1676, // ADD8mr_ND |
| 73549 | 1679, // ADD8mr_NF |
| 73550 | 1681, // ADD8mr_NF_ND |
| 73551 | 1684, // ADD8ri |
| 73552 | 1687, // ADD8ri8 |
| 73553 | 1690, // ADD8ri_EVEX |
| 73554 | 1693, // ADD8ri_ND |
| 73555 | 1696, // ADD8ri_NF |
| 73556 | 1699, // ADD8ri_NF_ND |
| 73557 | 1702, // ADD8rm |
| 73558 | 1705, // ADD8rm_EVEX |
| 73559 | 1708, // ADD8rm_ND |
| 73560 | 1711, // ADD8rm_NF |
| 73561 | 1714, // ADD8rm_NF_ND |
| 73562 | 1717, // ADD8rr |
| 73563 | 1720, // ADD8rr_EVEX |
| 73564 | 1723, // ADD8rr_EVEX_REV |
| 73565 | 1726, // ADD8rr_ND |
| 73566 | 1729, // ADD8rr_ND_REV |
| 73567 | 1732, // ADD8rr_NF |
| 73568 | 1735, // ADD8rr_NF_ND |
| 73569 | 1738, // ADD8rr_NF_ND_REV |
| 73570 | 1741, // ADD8rr_NF_REV |
| 73571 | 1744, // ADD8rr_REV |
| 73572 | 1747, // ADDPDrm |
| 73573 | 1750, // ADDPDrr |
| 73574 | 1753, // ADDPSrm |
| 73575 | 1756, // ADDPSrr |
| 73576 | 1759, // ADDR16_PREFIX |
| 73577 | 1759, // ADDR32_PREFIX |
| 73578 | 1759, // ADDSDrm |
| 73579 | 1762, // ADDSDrm_Int |
| 73580 | 1765, // ADDSDrr |
| 73581 | 1768, // ADDSDrr_Int |
| 73582 | 1771, // ADDSSrm |
| 73583 | 1774, // ADDSSrm_Int |
| 73584 | 1777, // ADDSSrr |
| 73585 | 1780, // ADDSSrr_Int |
| 73586 | 1783, // ADDSUBPDrm |
| 73587 | 1786, // ADDSUBPDrr |
| 73588 | 1789, // ADDSUBPSrm |
| 73589 | 1792, // ADDSUBPSrr |
| 73590 | 1795, // ADD_F32m |
| 73591 | 1796, // ADD_F64m |
| 73592 | 1797, // ADD_FI16m |
| 73593 | 1798, // ADD_FI32m |
| 73594 | 1799, // ADD_FPrST0 |
| 73595 | 1800, // ADD_FST0r |
| 73596 | 1801, // ADD_Fp32 |
| 73597 | 1804, // ADD_Fp32m |
| 73598 | 1807, // ADD_Fp64 |
| 73599 | 1810, // ADD_Fp64m |
| 73600 | 1813, // ADD_Fp64m32 |
| 73601 | 1816, // ADD_Fp80 |
| 73602 | 1819, // ADD_Fp80m32 |
| 73603 | 1822, // ADD_Fp80m64 |
| 73604 | 1825, // ADD_FpI16m32 |
| 73605 | 1828, // ADD_FpI16m64 |
| 73606 | 1831, // ADD_FpI16m80 |
| 73607 | 1834, // ADD_FpI32m32 |
| 73608 | 1837, // ADD_FpI32m64 |
| 73609 | 1840, // ADD_FpI32m80 |
| 73610 | 1843, // ADD_FrST0 |
| 73611 | 1844, // ADJCALLSTACKDOWN32 |
| 73612 | 1847, // ADJCALLSTACKDOWN64 |
| 73613 | 1850, // ADJCALLSTACKUP32 |
| 73614 | 1852, // ADJCALLSTACKUP64 |
| 73615 | 1854, // ADOX32rm |
| 73616 | 1857, // ADOX32rm_EVEX |
| 73617 | 1860, // ADOX32rm_ND |
| 73618 | 1863, // ADOX32rr |
| 73619 | 1866, // ADOX32rr_EVEX |
| 73620 | 1869, // ADOX32rr_ND |
| 73621 | 1872, // ADOX64rm |
| 73622 | 1875, // ADOX64rm_EVEX |
| 73623 | 1878, // ADOX64rm_ND |
| 73624 | 1881, // ADOX64rr |
| 73625 | 1884, // ADOX64rr_EVEX |
| 73626 | 1887, // ADOX64rr_ND |
| 73627 | 1890, // AESDEC128KL |
| 73628 | 1893, // AESDEC256KL |
| 73629 | 1896, // AESDECLASTrm |
| 73630 | 1899, // AESDECLASTrr |
| 73631 | 1902, // AESDECWIDE128KL |
| 73632 | 1903, // AESDECWIDE256KL |
| 73633 | 1904, // AESDECrm |
| 73634 | 1907, // AESDECrr |
| 73635 | 1910, // AESENC128KL |
| 73636 | 1913, // AESENC256KL |
| 73637 | 1916, // AESENCLASTrm |
| 73638 | 1919, // AESENCLASTrr |
| 73639 | 1922, // AESENCWIDE128KL |
| 73640 | 1923, // AESENCWIDE256KL |
| 73641 | 1924, // AESENCrm |
| 73642 | 1927, // AESENCrr |
| 73643 | 1930, // AESIMCrm |
| 73644 | 1932, // AESIMCrr |
| 73645 | 1934, // AESKEYGENASSIST128rm |
| 73646 | 1937, // AESKEYGENASSIST128rr |
| 73647 | 1940, // AND16i16 |
| 73648 | 1941, // AND16mi |
| 73649 | 1943, // AND16mi8 |
| 73650 | 1945, // AND16mi8_EVEX |
| 73651 | 1947, // AND16mi8_ND |
| 73652 | 1950, // AND16mi8_NF |
| 73653 | 1952, // AND16mi8_NF_ND |
| 73654 | 1955, // AND16mi_EVEX |
| 73655 | 1957, // AND16mi_ND |
| 73656 | 1960, // AND16mi_NF |
| 73657 | 1962, // AND16mi_NF_ND |
| 73658 | 1965, // AND16mr |
| 73659 | 1967, // AND16mr_EVEX |
| 73660 | 1969, // AND16mr_ND |
| 73661 | 1972, // AND16mr_NF |
| 73662 | 1974, // AND16mr_NF_ND |
| 73663 | 1977, // AND16ri |
| 73664 | 1980, // AND16ri8 |
| 73665 | 1983, // AND16ri8_EVEX |
| 73666 | 1986, // AND16ri8_ND |
| 73667 | 1989, // AND16ri8_NF |
| 73668 | 1992, // AND16ri8_NF_ND |
| 73669 | 1995, // AND16ri_EVEX |
| 73670 | 1998, // AND16ri_ND |
| 73671 | 2001, // AND16ri_NF |
| 73672 | 2004, // AND16ri_NF_ND |
| 73673 | 2007, // AND16rm |
| 73674 | 2010, // AND16rm_EVEX |
| 73675 | 2013, // AND16rm_ND |
| 73676 | 2016, // AND16rm_NF |
| 73677 | 2019, // AND16rm_NF_ND |
| 73678 | 2022, // AND16rr |
| 73679 | 2025, // AND16rr_EVEX |
| 73680 | 2028, // AND16rr_EVEX_REV |
| 73681 | 2031, // AND16rr_ND |
| 73682 | 2034, // AND16rr_ND_REV |
| 73683 | 2037, // AND16rr_NF |
| 73684 | 2040, // AND16rr_NF_ND |
| 73685 | 2043, // AND16rr_NF_ND_REV |
| 73686 | 2046, // AND16rr_NF_REV |
| 73687 | 2049, // AND16rr_REV |
| 73688 | 2052, // AND32i32 |
| 73689 | 2053, // AND32mi |
| 73690 | 2055, // AND32mi8 |
| 73691 | 2057, // AND32mi8_EVEX |
| 73692 | 2059, // AND32mi8_ND |
| 73693 | 2062, // AND32mi8_NF |
| 73694 | 2064, // AND32mi8_NF_ND |
| 73695 | 2067, // AND32mi_EVEX |
| 73696 | 2069, // AND32mi_ND |
| 73697 | 2072, // AND32mi_NF |
| 73698 | 2074, // AND32mi_NF_ND |
| 73699 | 2077, // AND32mr |
| 73700 | 2079, // AND32mr_EVEX |
| 73701 | 2081, // AND32mr_ND |
| 73702 | 2084, // AND32mr_NF |
| 73703 | 2086, // AND32mr_NF_ND |
| 73704 | 2089, // AND32ri |
| 73705 | 2092, // AND32ri8 |
| 73706 | 2095, // AND32ri8_EVEX |
| 73707 | 2098, // AND32ri8_ND |
| 73708 | 2101, // AND32ri8_NF |
| 73709 | 2104, // AND32ri8_NF_ND |
| 73710 | 2107, // AND32ri_EVEX |
| 73711 | 2110, // AND32ri_ND |
| 73712 | 2113, // AND32ri_NF |
| 73713 | 2116, // AND32ri_NF_ND |
| 73714 | 2119, // AND32rm |
| 73715 | 2122, // AND32rm_EVEX |
| 73716 | 2125, // AND32rm_ND |
| 73717 | 2128, // AND32rm_NF |
| 73718 | 2131, // AND32rm_NF_ND |
| 73719 | 2134, // AND32rr |
| 73720 | 2137, // AND32rr_EVEX |
| 73721 | 2140, // AND32rr_EVEX_REV |
| 73722 | 2143, // AND32rr_ND |
| 73723 | 2146, // AND32rr_ND_REV |
| 73724 | 2149, // AND32rr_NF |
| 73725 | 2152, // AND32rr_NF_ND |
| 73726 | 2155, // AND32rr_NF_ND_REV |
| 73727 | 2158, // AND32rr_NF_REV |
| 73728 | 2161, // AND32rr_REV |
| 73729 | 2164, // AND64i32 |
| 73730 | 2165, // AND64mi32 |
| 73731 | 2167, // AND64mi32_EVEX |
| 73732 | 2169, // AND64mi32_ND |
| 73733 | 2172, // AND64mi32_NF |
| 73734 | 2174, // AND64mi32_NF_ND |
| 73735 | 2177, // AND64mi8 |
| 73736 | 2179, // AND64mi8_EVEX |
| 73737 | 2181, // AND64mi8_ND |
| 73738 | 2184, // AND64mi8_NF |
| 73739 | 2186, // AND64mi8_NF_ND |
| 73740 | 2189, // AND64mr |
| 73741 | 2191, // AND64mr_EVEX |
| 73742 | 2193, // AND64mr_ND |
| 73743 | 2196, // AND64mr_NF |
| 73744 | 2198, // AND64mr_NF_ND |
| 73745 | 2201, // AND64ri32 |
| 73746 | 2204, // AND64ri32_EVEX |
| 73747 | 2207, // AND64ri32_ND |
| 73748 | 2210, // AND64ri32_NF |
| 73749 | 2213, // AND64ri32_NF_ND |
| 73750 | 2216, // AND64ri8 |
| 73751 | 2219, // AND64ri8_EVEX |
| 73752 | 2222, // AND64ri8_ND |
| 73753 | 2225, // AND64ri8_NF |
| 73754 | 2228, // AND64ri8_NF_ND |
| 73755 | 2231, // AND64rm |
| 73756 | 2234, // AND64rm_EVEX |
| 73757 | 2237, // AND64rm_ND |
| 73758 | 2240, // AND64rm_NF |
| 73759 | 2243, // AND64rm_NF_ND |
| 73760 | 2246, // AND64rr |
| 73761 | 2249, // AND64rr_EVEX |
| 73762 | 2252, // AND64rr_EVEX_REV |
| 73763 | 2255, // AND64rr_ND |
| 73764 | 2258, // AND64rr_ND_REV |
| 73765 | 2261, // AND64rr_NF |
| 73766 | 2264, // AND64rr_NF_ND |
| 73767 | 2267, // AND64rr_NF_ND_REV |
| 73768 | 2270, // AND64rr_NF_REV |
| 73769 | 2273, // AND64rr_REV |
| 73770 | 2276, // AND8i8 |
| 73771 | 2277, // AND8mi |
| 73772 | 2279, // AND8mi8 |
| 73773 | 2281, // AND8mi_EVEX |
| 73774 | 2283, // AND8mi_ND |
| 73775 | 2286, // AND8mi_NF |
| 73776 | 2288, // AND8mi_NF_ND |
| 73777 | 2291, // AND8mr |
| 73778 | 2293, // AND8mr_EVEX |
| 73779 | 2295, // AND8mr_ND |
| 73780 | 2298, // AND8mr_NF |
| 73781 | 2300, // AND8mr_NF_ND |
| 73782 | 2303, // AND8ri |
| 73783 | 2306, // AND8ri8 |
| 73784 | 2309, // AND8ri_EVEX |
| 73785 | 2312, // AND8ri_ND |
| 73786 | 2315, // AND8ri_NF |
| 73787 | 2318, // AND8ri_NF_ND |
| 73788 | 2321, // AND8rm |
| 73789 | 2324, // AND8rm_EVEX |
| 73790 | 2327, // AND8rm_ND |
| 73791 | 2330, // AND8rm_NF |
| 73792 | 2333, // AND8rm_NF_ND |
| 73793 | 2336, // AND8rr |
| 73794 | 2339, // AND8rr_EVEX |
| 73795 | 2342, // AND8rr_EVEX_REV |
| 73796 | 2345, // AND8rr_ND |
| 73797 | 2348, // AND8rr_ND_REV |
| 73798 | 2351, // AND8rr_NF |
| 73799 | 2354, // AND8rr_NF_ND |
| 73800 | 2357, // AND8rr_NF_ND_REV |
| 73801 | 2360, // AND8rr_NF_REV |
| 73802 | 2363, // AND8rr_REV |
| 73803 | 2366, // ANDN32rm |
| 73804 | 2369, // ANDN32rm_EVEX |
| 73805 | 2372, // ANDN32rm_NF |
| 73806 | 2375, // ANDN32rr |
| 73807 | 2378, // ANDN32rr_EVEX |
| 73808 | 2381, // ANDN32rr_NF |
| 73809 | 2384, // ANDN64rm |
| 73810 | 2387, // ANDN64rm_EVEX |
| 73811 | 2390, // ANDN64rm_NF |
| 73812 | 2393, // ANDN64rr |
| 73813 | 2396, // ANDN64rr_EVEX |
| 73814 | 2399, // ANDN64rr_NF |
| 73815 | 2402, // ANDNPDrm |
| 73816 | 2405, // ANDNPDrr |
| 73817 | 2408, // ANDNPSrm |
| 73818 | 2411, // ANDNPSrr |
| 73819 | 2414, // ANDPDrm |
| 73820 | 2417, // ANDPDrr |
| 73821 | 2420, // ANDPSrm |
| 73822 | 2423, // ANDPSrr |
| 73823 | 2426, // AOR32mr |
| 73824 | 2428, // AOR32mr_EVEX |
| 73825 | 2430, // AOR64mr |
| 73826 | 2432, // AOR64mr_EVEX |
| 73827 | 2434, // ARPL16mr |
| 73828 | 2436, // ARPL16rr |
| 73829 | 2438, // ASAN_CHECK_MEMACCESS |
| 73830 | 2440, // AXOR32mr |
| 73831 | 2442, // AXOR32mr_EVEX |
| 73832 | 2444, // AXOR64mr |
| 73833 | 2446, // AXOR64mr_EVEX |
| 73834 | 2448, // BEXTR32rm |
| 73835 | 2451, // BEXTR32rm_EVEX |
| 73836 | 2454, // BEXTR32rm_NF |
| 73837 | 2457, // BEXTR32rr |
| 73838 | 2460, // BEXTR32rr_EVEX |
| 73839 | 2463, // BEXTR32rr_NF |
| 73840 | 2466, // BEXTR64rm |
| 73841 | 2469, // BEXTR64rm_EVEX |
| 73842 | 2472, // BEXTR64rm_NF |
| 73843 | 2475, // BEXTR64rr |
| 73844 | 2478, // BEXTR64rr_EVEX |
| 73845 | 2481, // BEXTR64rr_NF |
| 73846 | 2484, // BEXTRI32mi |
| 73847 | 2487, // BEXTRI32ri |
| 73848 | 2490, // BEXTRI64mi |
| 73849 | 2493, // BEXTRI64ri |
| 73850 | 2496, // BLCFILL32rm |
| 73851 | 2498, // BLCFILL32rr |
| 73852 | 2500, // BLCFILL64rm |
| 73853 | 2502, // BLCFILL64rr |
| 73854 | 2504, // BLCI32rm |
| 73855 | 2506, // BLCI32rr |
| 73856 | 2508, // BLCI64rm |
| 73857 | 2510, // BLCI64rr |
| 73858 | 2512, // BLCIC32rm |
| 73859 | 2514, // BLCIC32rr |
| 73860 | 2516, // BLCIC64rm |
| 73861 | 2518, // BLCIC64rr |
| 73862 | 2520, // BLCMSK32rm |
| 73863 | 2522, // BLCMSK32rr |
| 73864 | 2524, // BLCMSK64rm |
| 73865 | 2526, // BLCMSK64rr |
| 73866 | 2528, // BLCS32rm |
| 73867 | 2530, // BLCS32rr |
| 73868 | 2532, // BLCS64rm |
| 73869 | 2534, // BLCS64rr |
| 73870 | 2536, // BLENDPDrmi |
| 73871 | 2540, // BLENDPDrri |
| 73872 | 2544, // BLENDPSrmi |
| 73873 | 2548, // BLENDPSrri |
| 73874 | 2552, // BLENDVPDrm0 |
| 73875 | 2555, // BLENDVPDrr0 |
| 73876 | 2558, // BLENDVPSrm0 |
| 73877 | 2561, // BLENDVPSrr0 |
| 73878 | 2564, // BLSFILL32rm |
| 73879 | 2566, // BLSFILL32rr |
| 73880 | 2568, // BLSFILL64rm |
| 73881 | 2570, // BLSFILL64rr |
| 73882 | 2572, // BLSI32rm |
| 73883 | 2574, // BLSI32rm_EVEX |
| 73884 | 2576, // BLSI32rm_NF |
| 73885 | 2578, // BLSI32rr |
| 73886 | 2580, // BLSI32rr_EVEX |
| 73887 | 2582, // BLSI32rr_NF |
| 73888 | 2584, // BLSI64rm |
| 73889 | 2586, // BLSI64rm_EVEX |
| 73890 | 2588, // BLSI64rm_NF |
| 73891 | 2590, // BLSI64rr |
| 73892 | 2592, // BLSI64rr_EVEX |
| 73893 | 2594, // BLSI64rr_NF |
| 73894 | 2596, // BLSIC32rm |
| 73895 | 2598, // BLSIC32rr |
| 73896 | 2600, // BLSIC64rm |
| 73897 | 2602, // BLSIC64rr |
| 73898 | 2604, // BLSMSK32rm |
| 73899 | 2606, // BLSMSK32rm_EVEX |
| 73900 | 2608, // BLSMSK32rm_NF |
| 73901 | 2610, // BLSMSK32rr |
| 73902 | 2612, // BLSMSK32rr_EVEX |
| 73903 | 2614, // BLSMSK32rr_NF |
| 73904 | 2616, // BLSMSK64rm |
| 73905 | 2618, // BLSMSK64rm_EVEX |
| 73906 | 2620, // BLSMSK64rm_NF |
| 73907 | 2622, // BLSMSK64rr |
| 73908 | 2624, // BLSMSK64rr_EVEX |
| 73909 | 2626, // BLSMSK64rr_NF |
| 73910 | 2628, // BLSR32rm |
| 73911 | 2630, // BLSR32rm_EVEX |
| 73912 | 2632, // BLSR32rm_NF |
| 73913 | 2634, // BLSR32rr |
| 73914 | 2636, // BLSR32rr_EVEX |
| 73915 | 2638, // BLSR32rr_NF |
| 73916 | 2640, // BLSR64rm |
| 73917 | 2642, // BLSR64rm_EVEX |
| 73918 | 2644, // BLSR64rm_NF |
| 73919 | 2646, // BLSR64rr |
| 73920 | 2648, // BLSR64rr_EVEX |
| 73921 | 2650, // BLSR64rr_NF |
| 73922 | 2652, // BOUNDS16rm |
| 73923 | 2654, // BOUNDS32rm |
| 73924 | 2656, // BSF16rm |
| 73925 | 2659, // BSF16rr |
| 73926 | 2662, // BSF32rm |
| 73927 | 2665, // BSF32rr |
| 73928 | 2668, // BSF64rm |
| 73929 | 2671, // BSF64rr |
| 73930 | 2674, // BSR16rm |
| 73931 | 2677, // BSR16rr |
| 73932 | 2680, // BSR32rm |
| 73933 | 2683, // BSR32rr |
| 73934 | 2686, // BSR64rm |
| 73935 | 2689, // BSR64rr |
| 73936 | 2692, // BSWAP16r_BAD |
| 73937 | 2694, // BSWAP32r |
| 73938 | 2696, // BSWAP64r |
| 73939 | 2698, // BT16mi8 |
| 73940 | 2700, // BT16mr |
| 73941 | 2702, // BT16ri8 |
| 73942 | 2704, // BT16rr |
| 73943 | 2706, // BT32mi8 |
| 73944 | 2708, // BT32mr |
| 73945 | 2710, // BT32ri8 |
| 73946 | 2712, // BT32rr |
| 73947 | 2714, // BT64mi8 |
| 73948 | 2716, // BT64mr |
| 73949 | 2718, // BT64ri8 |
| 73950 | 2720, // BT64rr |
| 73951 | 2722, // BTC16mi8 |
| 73952 | 2724, // BTC16mr |
| 73953 | 2726, // BTC16ri8 |
| 73954 | 2729, // BTC16rr |
| 73955 | 2732, // BTC32mi8 |
| 73956 | 2734, // BTC32mr |
| 73957 | 2736, // BTC32ri8 |
| 73958 | 2739, // BTC32rr |
| 73959 | 2742, // BTC64mi8 |
| 73960 | 2744, // BTC64mr |
| 73961 | 2746, // BTC64ri8 |
| 73962 | 2749, // BTC64rr |
| 73963 | 2752, // BTR16mi8 |
| 73964 | 2754, // BTR16mr |
| 73965 | 2756, // BTR16ri8 |
| 73966 | 2759, // BTR16rr |
| 73967 | 2762, // BTR32mi8 |
| 73968 | 2764, // BTR32mr |
| 73969 | 2766, // BTR32ri8 |
| 73970 | 2769, // BTR32rr |
| 73971 | 2772, // BTR64mi8 |
| 73972 | 2774, // BTR64mr |
| 73973 | 2776, // BTR64ri8 |
| 73974 | 2779, // BTR64rr |
| 73975 | 2782, // BTS16mi8 |
| 73976 | 2784, // BTS16mr |
| 73977 | 2786, // BTS16ri8 |
| 73978 | 2789, // BTS16rr |
| 73979 | 2792, // BTS32mi8 |
| 73980 | 2794, // BTS32mr |
| 73981 | 2796, // BTS32ri8 |
| 73982 | 2799, // BTS32rr |
| 73983 | 2802, // BTS64mi8 |
| 73984 | 2804, // BTS64mr |
| 73985 | 2806, // BTS64ri8 |
| 73986 | 2809, // BTS64rr |
| 73987 | 2812, // BZHI32rm |
| 73988 | 2815, // BZHI32rm_EVEX |
| 73989 | 2818, // BZHI32rm_NF |
| 73990 | 2821, // BZHI32rr |
| 73991 | 2824, // BZHI32rr_EVEX |
| 73992 | 2827, // BZHI32rr_NF |
| 73993 | 2830, // BZHI64rm |
| 73994 | 2833, // BZHI64rm_EVEX |
| 73995 | 2836, // BZHI64rm_NF |
| 73996 | 2839, // BZHI64rr |
| 73997 | 2842, // BZHI64rr_EVEX |
| 73998 | 2845, // BZHI64rr_NF |
| 73999 | 2848, // CALL16m |
| 74000 | 2849, // CALL16m_NT |
| 74001 | 2850, // CALL16r |
| 74002 | 2851, // CALL16r_NT |
| 74003 | 2852, // CALL32m |
| 74004 | 2853, // CALL32m_NT |
| 74005 | 2854, // CALL32r |
| 74006 | 2855, // CALL32r_NT |
| 74007 | 2856, // CALL64m |
| 74008 | 2857, // CALL64m_NT |
| 74009 | 2858, // CALL64pcrel32 |
| 74010 | 2859, // CALL64r |
| 74011 | 2860, // CALL64r_NT |
| 74012 | 2861, // CALLpcrel16 |
| 74013 | 2862, // CALLpcrel32 |
| 74014 | 2863, // CATCHRET |
| 74015 | 2865, // CBW |
| 74016 | 2865, // CCMP16mi |
| 74017 | 2869, // CCMP16mi8 |
| 74018 | 2873, // CCMP16mr |
| 74019 | 2877, // CCMP16ri |
| 74020 | 2881, // CCMP16ri8 |
| 74021 | 2885, // CCMP16rm |
| 74022 | 2889, // CCMP16rr |
| 74023 | 2893, // CCMP16rr_REV |
| 74024 | 2897, // CCMP32mi |
| 74025 | 2901, // CCMP32mi8 |
| 74026 | 2905, // CCMP32mr |
| 74027 | 2909, // CCMP32ri |
| 74028 | 2913, // CCMP32ri8 |
| 74029 | 2917, // CCMP32rm |
| 74030 | 2921, // CCMP32rr |
| 74031 | 2925, // CCMP32rr_REV |
| 74032 | 2929, // CCMP64mi32 |
| 74033 | 2933, // CCMP64mi8 |
| 74034 | 2937, // CCMP64mr |
| 74035 | 2941, // CCMP64ri32 |
| 74036 | 2945, // CCMP64ri8 |
| 74037 | 2949, // CCMP64rm |
| 74038 | 2953, // CCMP64rr |
| 74039 | 2957, // CCMP64rr_REV |
| 74040 | 2961, // CCMP8mi |
| 74041 | 2965, // CCMP8mr |
| 74042 | 2969, // CCMP8ri |
| 74043 | 2973, // CCMP8rm |
| 74044 | 2977, // CCMP8rr |
| 74045 | 2981, // CCMP8rr_REV |
| 74046 | 2985, // CDQ |
| 74047 | 2985, // CDQE |
| 74048 | 2985, // CFCMOV16mr |
| 74049 | 2988, // CFCMOV16rm |
| 74050 | 2991, // CFCMOV16rm_ND |
| 74051 | 2995, // CFCMOV16rr |
| 74052 | 2998, // CFCMOV16rr_ND |
| 74053 | 3002, // CFCMOV16rr_REV |
| 74054 | 3005, // CFCMOV32mr |
| 74055 | 3008, // CFCMOV32rm |
| 74056 | 3011, // CFCMOV32rm_ND |
| 74057 | 3015, // CFCMOV32rr |
| 74058 | 3018, // CFCMOV32rr_ND |
| 74059 | 3022, // CFCMOV32rr_REV |
| 74060 | 3025, // CFCMOV64mr |
| 74061 | 3028, // CFCMOV64rm |
| 74062 | 3031, // CFCMOV64rm_ND |
| 74063 | 3035, // CFCMOV64rr |
| 74064 | 3038, // CFCMOV64rr_ND |
| 74065 | 3042, // CFCMOV64rr_REV |
| 74066 | 3045, // CHS_F |
| 74067 | 3045, // CHS_Fp32 |
| 74068 | 3047, // CHS_Fp64 |
| 74069 | 3049, // CHS_Fp80 |
| 74070 | 3051, // CLAC |
| 74071 | 3051, // CLC |
| 74072 | 3051, // CLD |
| 74073 | 3051, // CLDEMOTE |
| 74074 | 3052, // CLEANUPRET |
| 74075 | 3052, // CLFLUSH |
| 74076 | 3053, // CLFLUSHOPT |
| 74077 | 3054, // CLGI |
| 74078 | 3054, // CLI |
| 74079 | 3054, // CLRSSBSY |
| 74080 | 3055, // CLTS |
| 74081 | 3055, // CLUI |
| 74082 | 3055, // CLWB |
| 74083 | 3056, // CLZERO32r |
| 74084 | 3056, // CLZERO64r |
| 74085 | 3056, // CMC |
| 74086 | 3056, // CMOV16rm |
| 74087 | 3060, // CMOV16rm_ND |
| 74088 | 3064, // CMOV16rr |
| 74089 | 3068, // CMOV16rr_ND |
| 74090 | 3072, // CMOV32rm |
| 74091 | 3076, // CMOV32rm_ND |
| 74092 | 3080, // CMOV32rr |
| 74093 | 3084, // CMOV32rr_ND |
| 74094 | 3088, // CMOV64rm |
| 74095 | 3092, // CMOV64rm_ND |
| 74096 | 3096, // CMOV64rr |
| 74097 | 3100, // CMOV64rr_ND |
| 74098 | 3104, // CMOVBE_F |
| 74099 | 3105, // CMOVBE_Fp32 |
| 74100 | 3108, // CMOVBE_Fp64 |
| 74101 | 3111, // CMOVBE_Fp80 |
| 74102 | 3114, // CMOVB_F |
| 74103 | 3115, // CMOVB_Fp32 |
| 74104 | 3118, // CMOVB_Fp64 |
| 74105 | 3121, // CMOVB_Fp80 |
| 74106 | 3124, // CMOVE_F |
| 74107 | 3125, // CMOVE_Fp32 |
| 74108 | 3128, // CMOVE_Fp64 |
| 74109 | 3131, // CMOVE_Fp80 |
| 74110 | 3134, // CMOVNBE_F |
| 74111 | 3135, // CMOVNBE_Fp32 |
| 74112 | 3138, // CMOVNBE_Fp64 |
| 74113 | 3141, // CMOVNBE_Fp80 |
| 74114 | 3144, // CMOVNB_F |
| 74115 | 3145, // CMOVNB_Fp32 |
| 74116 | 3148, // CMOVNB_Fp64 |
| 74117 | 3151, // CMOVNB_Fp80 |
| 74118 | 3154, // CMOVNE_F |
| 74119 | 3155, // CMOVNE_Fp32 |
| 74120 | 3158, // CMOVNE_Fp64 |
| 74121 | 3161, // CMOVNE_Fp80 |
| 74122 | 3164, // CMOVNP_F |
| 74123 | 3165, // CMOVNP_Fp32 |
| 74124 | 3168, // CMOVNP_Fp64 |
| 74125 | 3171, // CMOVNP_Fp80 |
| 74126 | 3174, // CMOVP_F |
| 74127 | 3175, // CMOVP_Fp32 |
| 74128 | 3178, // CMOVP_Fp64 |
| 74129 | 3181, // CMOVP_Fp80 |
| 74130 | 3184, // CMOV_FR16 |
| 74131 | 3188, // CMOV_FR16X |
| 74132 | 3192, // CMOV_FR32 |
| 74133 | 3196, // CMOV_FR32X |
| 74134 | 3200, // CMOV_FR64 |
| 74135 | 3204, // CMOV_FR64X |
| 74136 | 3208, // CMOV_GR16 |
| 74137 | 3212, // CMOV_GR32 |
| 74138 | 3216, // CMOV_GR8 |
| 74139 | 3220, // CMOV_RFP32 |
| 74140 | 3224, // CMOV_RFP64 |
| 74141 | 3228, // CMOV_RFP80 |
| 74142 | 3232, // CMOV_VK1 |
| 74143 | 3236, // CMOV_VK16 |
| 74144 | 3240, // CMOV_VK2 |
| 74145 | 3244, // CMOV_VK32 |
| 74146 | 3248, // CMOV_VK4 |
| 74147 | 3252, // CMOV_VK64 |
| 74148 | 3256, // CMOV_VK8 |
| 74149 | 3260, // CMOV_VR128 |
| 74150 | 3264, // CMOV_VR128X |
| 74151 | 3268, // CMOV_VR256 |
| 74152 | 3272, // CMOV_VR256X |
| 74153 | 3276, // CMOV_VR512 |
| 74154 | 3280, // CMOV_VR64 |
| 74155 | 3284, // CMP16i16 |
| 74156 | 3285, // CMP16mi |
| 74157 | 3287, // CMP16mi8 |
| 74158 | 3289, // CMP16mr |
| 74159 | 3291, // CMP16ri |
| 74160 | 3293, // CMP16ri8 |
| 74161 | 3295, // CMP16rm |
| 74162 | 3297, // CMP16rr |
| 74163 | 3299, // CMP16rr_REV |
| 74164 | 3301, // CMP32i32 |
| 74165 | 3302, // CMP32mi |
| 74166 | 3304, // CMP32mi8 |
| 74167 | 3306, // CMP32mr |
| 74168 | 3308, // CMP32ri |
| 74169 | 3310, // CMP32ri8 |
| 74170 | 3312, // CMP32rm |
| 74171 | 3314, // CMP32rr |
| 74172 | 3316, // CMP32rr_REV |
| 74173 | 3318, // CMP64i32 |
| 74174 | 3319, // CMP64mi32 |
| 74175 | 3321, // CMP64mi8 |
| 74176 | 3323, // CMP64mr |
| 74177 | 3325, // CMP64ri32 |
| 74178 | 3327, // CMP64ri8 |
| 74179 | 3329, // CMP64rm |
| 74180 | 3331, // CMP64rr |
| 74181 | 3333, // CMP64rr_REV |
| 74182 | 3335, // CMP8i8 |
| 74183 | 3336, // CMP8mi |
| 74184 | 3338, // CMP8mi8 |
| 74185 | 3340, // CMP8mr |
| 74186 | 3342, // CMP8ri |
| 74187 | 3344, // CMP8ri8 |
| 74188 | 3346, // CMP8rm |
| 74189 | 3348, // CMP8rr |
| 74190 | 3350, // CMP8rr_REV |
| 74191 | 3352, // CMPCCXADDmr32 |
| 74192 | 3357, // CMPCCXADDmr32_EVEX |
| 74193 | 3362, // CMPCCXADDmr64 |
| 74194 | 3367, // CMPCCXADDmr64_EVEX |
| 74195 | 3372, // CMPPDrmi |
| 74196 | 3376, // CMPPDrri |
| 74197 | 3380, // CMPPSrmi |
| 74198 | 3384, // CMPPSrri |
| 74199 | 3388, // CMPSB |
| 74200 | 3390, // CMPSDrmi |
| 74201 | 3394, // CMPSDrmi_Int |
| 74202 | 3398, // CMPSDrri |
| 74203 | 3402, // CMPSDrri_Int |
| 74204 | 3406, // CMPSL |
| 74205 | 3408, // CMPSQ |
| 74206 | 3410, // CMPSSrmi |
| 74207 | 3414, // CMPSSrmi_Int |
| 74208 | 3418, // CMPSSrri |
| 74209 | 3422, // CMPSSrri_Int |
| 74210 | 3426, // CMPSW |
| 74211 | 3428, // CMPXCHG16B |
| 74212 | 3429, // CMPXCHG16rm |
| 74213 | 3431, // CMPXCHG16rr |
| 74214 | 3433, // CMPXCHG32rm |
| 74215 | 3435, // CMPXCHG32rr |
| 74216 | 3437, // CMPXCHG64rm |
| 74217 | 3439, // CMPXCHG64rr |
| 74218 | 3441, // CMPXCHG8B |
| 74219 | 3442, // CMPXCHG8rm |
| 74220 | 3444, // CMPXCHG8rr |
| 74221 | 3446, // COMISDrm |
| 74222 | 3448, // COMISDrm_Int |
| 74223 | 3450, // COMISDrr |
| 74224 | 3452, // COMISDrr_Int |
| 74225 | 3454, // COMISSrm |
| 74226 | 3456, // COMISSrm_Int |
| 74227 | 3458, // COMISSrr |
| 74228 | 3460, // COMISSrr_Int |
| 74229 | 3462, // COMP_FST0r |
| 74230 | 3463, // COM_FIPr |
| 74231 | 3464, // COM_FIr |
| 74232 | 3465, // COM_FST0r |
| 74233 | 3466, // COM_FpIr32 |
| 74234 | 3468, // COM_FpIr64 |
| 74235 | 3470, // COM_FpIr80 |
| 74236 | 3472, // COM_Fpr32 |
| 74237 | 3474, // COM_Fpr64 |
| 74238 | 3476, // COM_Fpr80 |
| 74239 | 3478, // CPUID |
| 74240 | 3478, // CQO |
| 74241 | 3478, // CRC32r32m16 |
| 74242 | 3481, // CRC32r32m16_EVEX |
| 74243 | 3484, // CRC32r32m32 |
| 74244 | 3487, // CRC32r32m32_EVEX |
| 74245 | 3490, // CRC32r32m8 |
| 74246 | 3493, // CRC32r32m8_EVEX |
| 74247 | 3496, // CRC32r32r16 |
| 74248 | 3499, // CRC32r32r16_EVEX |
| 74249 | 3502, // CRC32r32r32 |
| 74250 | 3505, // CRC32r32r32_EVEX |
| 74251 | 3508, // CRC32r32r8 |
| 74252 | 3511, // CRC32r32r8_EVEX |
| 74253 | 3514, // CRC32r64m64 |
| 74254 | 3517, // CRC32r64m64_EVEX |
| 74255 | 3520, // CRC32r64m8 |
| 74256 | 3523, // CRC32r64m8_EVEX |
| 74257 | 3526, // CRC32r64r64 |
| 74258 | 3529, // CRC32r64r64_EVEX |
| 74259 | 3532, // CRC32r64r8 |
| 74260 | 3535, // CRC32r64r8_EVEX |
| 74261 | 3538, // CS_PREFIX |
| 74262 | 3538, // CTEST16mi |
| 74263 | 3542, // CTEST16mr |
| 74264 | 3546, // CTEST16ri |
| 74265 | 3550, // CTEST16rr |
| 74266 | 3554, // CTEST32mi |
| 74267 | 3558, // CTEST32mr |
| 74268 | 3562, // CTEST32ri |
| 74269 | 3566, // CTEST32rr |
| 74270 | 3570, // CTEST64mi32 |
| 74271 | 3574, // CTEST64mr |
| 74272 | 3578, // CTEST64ri32 |
| 74273 | 3582, // CTEST64rr |
| 74274 | 3586, // CTEST8mi |
| 74275 | 3590, // CTEST8mr |
| 74276 | 3594, // CTEST8ri |
| 74277 | 3598, // CTEST8rr |
| 74278 | 3602, // CVTDQ2PDrm |
| 74279 | 3604, // CVTDQ2PDrr |
| 74280 | 3606, // CVTDQ2PSrm |
| 74281 | 3608, // CVTDQ2PSrr |
| 74282 | 3610, // CVTPD2DQrm |
| 74283 | 3612, // CVTPD2DQrr |
| 74284 | 3614, // CVTPD2PSrm |
| 74285 | 3616, // CVTPD2PSrr |
| 74286 | 3618, // CVTPS2DQrm |
| 74287 | 3620, // CVTPS2DQrr |
| 74288 | 3622, // CVTPS2PDrm |
| 74289 | 3624, // CVTPS2PDrr |
| 74290 | 3626, // CVTSD2SI64rm |
| 74291 | 3628, // CVTSD2SI64rm_Int |
| 74292 | 3630, // CVTSD2SI64rr |
| 74293 | 3632, // CVTSD2SI64rr_Int |
| 74294 | 3634, // CVTSD2SIrm |
| 74295 | 3636, // CVTSD2SIrm_Int |
| 74296 | 3638, // CVTSD2SIrr |
| 74297 | 3640, // CVTSD2SIrr_Int |
| 74298 | 3642, // CVTSD2SSrm |
| 74299 | 3644, // CVTSD2SSrm_Int |
| 74300 | 3647, // CVTSD2SSrr |
| 74301 | 3649, // CVTSD2SSrr_Int |
| 74302 | 3652, // CVTSI2SDrm |
| 74303 | 3654, // CVTSI2SDrm_Int |
| 74304 | 3657, // CVTSI2SDrr |
| 74305 | 3659, // CVTSI2SDrr_Int |
| 74306 | 3662, // CVTSI2SSrm |
| 74307 | 3664, // CVTSI2SSrm_Int |
| 74308 | 3667, // CVTSI2SSrr |
| 74309 | 3669, // CVTSI2SSrr_Int |
| 74310 | 3672, // CVTSI642SDrm |
| 74311 | 3674, // CVTSI642SDrm_Int |
| 74312 | 3677, // CVTSI642SDrr |
| 74313 | 3679, // CVTSI642SDrr_Int |
| 74314 | 3682, // CVTSI642SSrm |
| 74315 | 3684, // CVTSI642SSrm_Int |
| 74316 | 3687, // CVTSI642SSrr |
| 74317 | 3689, // CVTSI642SSrr_Int |
| 74318 | 3692, // CVTSS2SDrm |
| 74319 | 3694, // CVTSS2SDrm_Int |
| 74320 | 3697, // CVTSS2SDrr |
| 74321 | 3699, // CVTSS2SDrr_Int |
| 74322 | 3702, // CVTSS2SI64rm |
| 74323 | 3704, // CVTSS2SI64rm_Int |
| 74324 | 3706, // CVTSS2SI64rr |
| 74325 | 3708, // CVTSS2SI64rr_Int |
| 74326 | 3710, // CVTSS2SIrm |
| 74327 | 3712, // CVTSS2SIrm_Int |
| 74328 | 3714, // CVTSS2SIrr |
| 74329 | 3716, // CVTSS2SIrr_Int |
| 74330 | 3718, // CVTTPD2DQrm |
| 74331 | 3720, // CVTTPD2DQrr |
| 74332 | 3722, // CVTTPS2DQrm |
| 74333 | 3724, // CVTTPS2DQrr |
| 74334 | 3726, // CVTTSD2SI64rm |
| 74335 | 3728, // CVTTSD2SI64rm_Int |
| 74336 | 3730, // CVTTSD2SI64rr |
| 74337 | 3732, // CVTTSD2SI64rr_Int |
| 74338 | 3734, // CVTTSD2SIrm |
| 74339 | 3736, // CVTTSD2SIrm_Int |
| 74340 | 3738, // CVTTSD2SIrr |
| 74341 | 3740, // CVTTSD2SIrr_Int |
| 74342 | 3742, // CVTTSS2SI64rm |
| 74343 | 3744, // CVTTSS2SI64rm_Int |
| 74344 | 3746, // CVTTSS2SI64rr |
| 74345 | 3748, // CVTTSS2SI64rr_Int |
| 74346 | 3750, // CVTTSS2SIrm |
| 74347 | 3752, // CVTTSS2SIrm_Int |
| 74348 | 3754, // CVTTSS2SIrr |
| 74349 | 3756, // CVTTSS2SIrr_Int |
| 74350 | 3758, // CWD |
| 74351 | 3758, // CWDE |
| 74352 | 3758, // DAA |
| 74353 | 3758, // DAS |
| 74354 | 3758, // DATA16_PREFIX |
| 74355 | 3758, // DEC16m |
| 74356 | 3759, // DEC16m_EVEX |
| 74357 | 3760, // DEC16m_ND |
| 74358 | 3762, // DEC16m_NF |
| 74359 | 3763, // DEC16m_NF_ND |
| 74360 | 3765, // DEC16r |
| 74361 | 3767, // DEC16r_EVEX |
| 74362 | 3769, // DEC16r_ND |
| 74363 | 3771, // DEC16r_NF |
| 74364 | 3773, // DEC16r_NF_ND |
| 74365 | 3775, // DEC16r_alt |
| 74366 | 3777, // DEC32m |
| 74367 | 3778, // DEC32m_EVEX |
| 74368 | 3779, // DEC32m_ND |
| 74369 | 3781, // DEC32m_NF |
| 74370 | 3782, // DEC32m_NF_ND |
| 74371 | 3784, // DEC32r |
| 74372 | 3786, // DEC32r_EVEX |
| 74373 | 3788, // DEC32r_ND |
| 74374 | 3790, // DEC32r_NF |
| 74375 | 3792, // DEC32r_NF_ND |
| 74376 | 3794, // DEC32r_alt |
| 74377 | 3796, // DEC64m |
| 74378 | 3797, // DEC64m_EVEX |
| 74379 | 3798, // DEC64m_ND |
| 74380 | 3800, // DEC64m_NF |
| 74381 | 3801, // DEC64m_NF_ND |
| 74382 | 3803, // DEC64r |
| 74383 | 3805, // DEC64r_EVEX |
| 74384 | 3807, // DEC64r_ND |
| 74385 | 3809, // DEC64r_NF |
| 74386 | 3811, // DEC64r_NF_ND |
| 74387 | 3813, // DEC8m |
| 74388 | 3814, // DEC8m_EVEX |
| 74389 | 3815, // DEC8m_ND |
| 74390 | 3817, // DEC8m_NF |
| 74391 | 3818, // DEC8m_NF_ND |
| 74392 | 3820, // DEC8r |
| 74393 | 3822, // DEC8r_EVEX |
| 74394 | 3824, // DEC8r_ND |
| 74395 | 3826, // DEC8r_NF |
| 74396 | 3828, // DEC8r_NF_ND |
| 74397 | 3830, // DIV16m |
| 74398 | 3831, // DIV16m_EVEX |
| 74399 | 3832, // DIV16m_NF |
| 74400 | 3833, // DIV16r |
| 74401 | 3834, // DIV16r_EVEX |
| 74402 | 3835, // DIV16r_NF |
| 74403 | 3836, // DIV32m |
| 74404 | 3837, // DIV32m_EVEX |
| 74405 | 3838, // DIV32m_NF |
| 74406 | 3839, // DIV32r |
| 74407 | 3840, // DIV32r_EVEX |
| 74408 | 3841, // DIV32r_NF |
| 74409 | 3842, // DIV64m |
| 74410 | 3843, // DIV64m_EVEX |
| 74411 | 3844, // DIV64m_NF |
| 74412 | 3845, // DIV64r |
| 74413 | 3846, // DIV64r_EVEX |
| 74414 | 3847, // DIV64r_NF |
| 74415 | 3848, // DIV8m |
| 74416 | 3849, // DIV8m_EVEX |
| 74417 | 3850, // DIV8m_NF |
| 74418 | 3851, // DIV8r |
| 74419 | 3852, // DIV8r_EVEX |
| 74420 | 3853, // DIV8r_NF |
| 74421 | 3854, // DIVPDrm |
| 74422 | 3857, // DIVPDrr |
| 74423 | 3860, // DIVPSrm |
| 74424 | 3863, // DIVPSrr |
| 74425 | 3866, // DIVR_F32m |
| 74426 | 3867, // DIVR_F64m |
| 74427 | 3868, // DIVR_FI16m |
| 74428 | 3869, // DIVR_FI32m |
| 74429 | 3870, // DIVR_FPrST0 |
| 74430 | 3871, // DIVR_FST0r |
| 74431 | 3872, // DIVR_Fp32m |
| 74432 | 3875, // DIVR_Fp64m |
| 74433 | 3878, // DIVR_Fp64m32 |
| 74434 | 3881, // DIVR_Fp80m32 |
| 74435 | 3884, // DIVR_Fp80m64 |
| 74436 | 3887, // DIVR_FpI16m32 |
| 74437 | 3890, // DIVR_FpI16m64 |
| 74438 | 3893, // DIVR_FpI16m80 |
| 74439 | 3896, // DIVR_FpI32m32 |
| 74440 | 3899, // DIVR_FpI32m64 |
| 74441 | 3902, // DIVR_FpI32m80 |
| 74442 | 3905, // DIVR_FrST0 |
| 74443 | 3906, // DIVSDrm |
| 74444 | 3909, // DIVSDrm_Int |
| 74445 | 3912, // DIVSDrr |
| 74446 | 3915, // DIVSDrr_Int |
| 74447 | 3918, // DIVSSrm |
| 74448 | 3921, // DIVSSrm_Int |
| 74449 | 3924, // DIVSSrr |
| 74450 | 3927, // DIVSSrr_Int |
| 74451 | 3930, // DIV_F32m |
| 74452 | 3931, // DIV_F64m |
| 74453 | 3932, // DIV_FI16m |
| 74454 | 3933, // DIV_FI32m |
| 74455 | 3934, // DIV_FPrST0 |
| 74456 | 3935, // DIV_FST0r |
| 74457 | 3936, // DIV_Fp32 |
| 74458 | 3939, // DIV_Fp32m |
| 74459 | 3942, // DIV_Fp64 |
| 74460 | 3945, // DIV_Fp64m |
| 74461 | 3948, // DIV_Fp64m32 |
| 74462 | 3951, // DIV_Fp80 |
| 74463 | 3954, // DIV_Fp80m32 |
| 74464 | 3957, // DIV_Fp80m64 |
| 74465 | 3960, // DIV_FpI16m32 |
| 74466 | 3963, // DIV_FpI16m64 |
| 74467 | 3966, // DIV_FpI16m80 |
| 74468 | 3969, // DIV_FpI32m32 |
| 74469 | 3972, // DIV_FpI32m64 |
| 74470 | 3975, // DIV_FpI32m80 |
| 74471 | 3978, // DIV_FrST0 |
| 74472 | 3979, // DPPDrmi |
| 74473 | 3983, // DPPDrri |
| 74474 | 3987, // DPPSrmi |
| 74475 | 3991, // DPPSrri |
| 74476 | 3995, // DS_PREFIX |
| 74477 | 3995, // DYN_ALLOCA_32 |
| 74478 | 3996, // DYN_ALLOCA_64 |
| 74479 | 3997, // EH_RETURN |
| 74480 | 3998, // EH_RETURN64 |
| 74481 | 3999, // EH_SjLj_LongJmp32 |
| 74482 | 4000, // EH_SjLj_LongJmp64 |
| 74483 | 4001, // EH_SjLj_SetJmp32 |
| 74484 | 4003, // EH_SjLj_SetJmp64 |
| 74485 | 4005, // EH_SjLj_Setup |
| 74486 | 4006, // ENCLS |
| 74487 | 4006, // ENCLU |
| 74488 | 4006, // ENCLV |
| 74489 | 4006, // ENCODEKEY128 |
| 74490 | 4008, // ENCODEKEY256 |
| 74491 | 4010, // ENDBR32 |
| 74492 | 4010, // ENDBR64 |
| 74493 | 4010, // ENQCMD16 |
| 74494 | 4012, // ENQCMD32 |
| 74495 | 4014, // ENQCMD32_EVEX |
| 74496 | 4016, // ENQCMD64 |
| 74497 | 4018, // ENQCMD64_EVEX |
| 74498 | 4020, // ENQCMDS16 |
| 74499 | 4022, // ENQCMDS32 |
| 74500 | 4024, // ENQCMDS32_EVEX |
| 74501 | 4026, // ENQCMDS64 |
| 74502 | 4028, // ENQCMDS64_EVEX |
| 74503 | 4030, // ENTER |
| 74504 | 4032, // ERETS |
| 74505 | 4032, // ERETU |
| 74506 | 4032, // ES_PREFIX |
| 74507 | 4032, // EXTRACTPSmri |
| 74508 | 4035, // EXTRACTPSrri |
| 74509 | 4038, // EXTRQ |
| 74510 | 4041, // EXTRQI |
| 74511 | 4045, // F2XM1 |
| 74512 | 4045, // FARCALL16i |
| 74513 | 4047, // FARCALL16m |
| 74514 | 4048, // FARCALL32i |
| 74515 | 4050, // FARCALL32m |
| 74516 | 4051, // FARCALL64m |
| 74517 | 4052, // FARJMP16i |
| 74518 | 4054, // FARJMP16m |
| 74519 | 4055, // FARJMP32i |
| 74520 | 4057, // FARJMP32m |
| 74521 | 4058, // FARJMP64m |
| 74522 | 4059, // FBLDm |
| 74523 | 4060, // FBSTPm |
| 74524 | 4061, // FCOM32m |
| 74525 | 4062, // FCOM64m |
| 74526 | 4063, // FCOMP32m |
| 74527 | 4064, // FCOMP64m |
| 74528 | 4065, // FCOMPP |
| 74529 | 4065, // FCOS |
| 74530 | 4065, // FDECSTP |
| 74531 | 4065, // FEMMS |
| 74532 | 4065, // FFREE |
| 74533 | 4066, // FFREEP |
| 74534 | 4067, // FICOM16m |
| 74535 | 4068, // FICOM32m |
| 74536 | 4069, // FICOMP16m |
| 74537 | 4070, // FICOMP32m |
| 74538 | 4071, // FINCSTP |
| 74539 | 4071, // FLDCW16m |
| 74540 | 4072, // FLDENVm |
| 74541 | 4073, // FLDL2E |
| 74542 | 4073, // FLDL2T |
| 74543 | 4073, // FLDLG2 |
| 74544 | 4073, // FLDLN2 |
| 74545 | 4073, // FLDPI |
| 74546 | 4073, // FNCLEX |
| 74547 | 4073, // FNINIT |
| 74548 | 4073, // FNOP |
| 74549 | 4073, // FNSTCW16m |
| 74550 | 4074, // FNSTSW16r |
| 74551 | 4074, // FNSTSWm |
| 74552 | 4075, // FP32_TO_INT16_IN_MEM |
| 74553 | 4077, // FP32_TO_INT32_IN_MEM |
| 74554 | 4079, // FP32_TO_INT64_IN_MEM |
| 74555 | 4081, // FP64_TO_INT16_IN_MEM |
| 74556 | 4083, // FP64_TO_INT32_IN_MEM |
| 74557 | 4085, // FP64_TO_INT64_IN_MEM |
| 74558 | 4087, // FP80_ADDm32 |
| 74559 | 4090, // FP80_ADDr |
| 74560 | 4093, // FP80_TO_INT16_IN_MEM |
| 74561 | 4095, // FP80_TO_INT32_IN_MEM |
| 74562 | 4097, // FP80_TO_INT64_IN_MEM |
| 74563 | 4099, // FPATAN |
| 74564 | 4099, // FPREM |
| 74565 | 4099, // FPREM1 |
| 74566 | 4099, // FPTAN |
| 74567 | 4099, // FRNDINT |
| 74568 | 4099, // FRSTORm |
| 74569 | 4100, // FSAVEm |
| 74570 | 4101, // FSCALE |
| 74571 | 4101, // FSIN |
| 74572 | 4101, // FSINCOS |
| 74573 | 4101, // FSTENVm |
| 74574 | 4102, // FS_PREFIX |
| 74575 | 4102, // FXRSTOR |
| 74576 | 4103, // FXRSTOR64 |
| 74577 | 4104, // FXSAVE |
| 74578 | 4105, // FXSAVE64 |
| 74579 | 4106, // FXTRACT |
| 74580 | 4106, // FYL2X |
| 74581 | 4106, // FYL2XP1 |
| 74582 | 4106, // GETSEC |
| 74583 | 4106, // GF2P8AFFINEINVQBrmi |
| 74584 | 4110, // GF2P8AFFINEINVQBrri |
| 74585 | 4114, // GF2P8AFFINEQBrmi |
| 74586 | 4118, // GF2P8AFFINEQBrri |
| 74587 | 4122, // GF2P8MULBrm |
| 74588 | 4125, // GF2P8MULBrr |
| 74589 | 4128, // GS_PREFIX |
| 74590 | 4128, // HADDPDrm |
| 74591 | 4131, // HADDPDrr |
| 74592 | 4134, // HADDPSrm |
| 74593 | 4137, // HADDPSrr |
| 74594 | 4140, // HLT |
| 74595 | 4140, // HRESET |
| 74596 | 4141, // HSUBPDrm |
| 74597 | 4144, // HSUBPDrr |
| 74598 | 4147, // HSUBPSrm |
| 74599 | 4150, // HSUBPSrr |
| 74600 | 4153, // IDIV16m |
| 74601 | 4154, // IDIV16m_EVEX |
| 74602 | 4155, // IDIV16m_NF |
| 74603 | 4156, // IDIV16r |
| 74604 | 4157, // IDIV16r_EVEX |
| 74605 | 4158, // IDIV16r_NF |
| 74606 | 4159, // IDIV32m |
| 74607 | 4160, // IDIV32m_EVEX |
| 74608 | 4161, // IDIV32m_NF |
| 74609 | 4162, // IDIV32r |
| 74610 | 4163, // IDIV32r_EVEX |
| 74611 | 4164, // IDIV32r_NF |
| 74612 | 4165, // IDIV64m |
| 74613 | 4166, // IDIV64m_EVEX |
| 74614 | 4167, // IDIV64m_NF |
| 74615 | 4168, // IDIV64r |
| 74616 | 4169, // IDIV64r_EVEX |
| 74617 | 4170, // IDIV64r_NF |
| 74618 | 4171, // IDIV8m |
| 74619 | 4172, // IDIV8m_EVEX |
| 74620 | 4173, // IDIV8m_NF |
| 74621 | 4174, // IDIV8r |
| 74622 | 4175, // IDIV8r_EVEX |
| 74623 | 4176, // IDIV8r_NF |
| 74624 | 4177, // ILD_F16m |
| 74625 | 4178, // ILD_F32m |
| 74626 | 4179, // ILD_F64m |
| 74627 | 4180, // ILD_Fp16m32 |
| 74628 | 4182, // ILD_Fp16m64 |
| 74629 | 4184, // ILD_Fp16m80 |
| 74630 | 4186, // ILD_Fp32m32 |
| 74631 | 4188, // ILD_Fp32m64 |
| 74632 | 4190, // ILD_Fp32m80 |
| 74633 | 4192, // ILD_Fp64m32 |
| 74634 | 4194, // ILD_Fp64m64 |
| 74635 | 4196, // ILD_Fp64m80 |
| 74636 | 4198, // IMUL16m |
| 74637 | 4199, // IMUL16m_EVEX |
| 74638 | 4200, // IMUL16m_NF |
| 74639 | 4201, // IMUL16r |
| 74640 | 4202, // IMUL16r_EVEX |
| 74641 | 4203, // IMUL16r_NF |
| 74642 | 4204, // IMUL16rm |
| 74643 | 4207, // IMUL16rm_EVEX |
| 74644 | 4210, // IMUL16rm_ND |
| 74645 | 4213, // IMUL16rm_NF |
| 74646 | 4216, // IMUL16rm_NF_ND |
| 74647 | 4219, // IMUL16rmi |
| 74648 | 4222, // IMUL16rmi8 |
| 74649 | 4225, // IMUL16rmi8_EVEX |
| 74650 | 4228, // IMUL16rmi8_NF |
| 74651 | 4231, // IMUL16rmi_EVEX |
| 74652 | 4234, // IMUL16rmi_NF |
| 74653 | 4237, // IMUL16rr |
| 74654 | 4240, // IMUL16rr_EVEX |
| 74655 | 4243, // IMUL16rr_ND |
| 74656 | 4246, // IMUL16rr_NF |
| 74657 | 4249, // IMUL16rr_NF_ND |
| 74658 | 4252, // IMUL16rri |
| 74659 | 4255, // IMUL16rri8 |
| 74660 | 4258, // IMUL16rri8_EVEX |
| 74661 | 4261, // IMUL16rri8_NF |
| 74662 | 4264, // IMUL16rri_EVEX |
| 74663 | 4267, // IMUL16rri_NF |
| 74664 | 4270, // IMUL32m |
| 74665 | 4271, // IMUL32m_EVEX |
| 74666 | 4272, // IMUL32m_NF |
| 74667 | 4273, // IMUL32r |
| 74668 | 4274, // IMUL32r_EVEX |
| 74669 | 4275, // IMUL32r_NF |
| 74670 | 4276, // IMUL32rm |
| 74671 | 4279, // IMUL32rm_EVEX |
| 74672 | 4282, // IMUL32rm_ND |
| 74673 | 4285, // IMUL32rm_NF |
| 74674 | 4288, // IMUL32rm_NF_ND |
| 74675 | 4291, // IMUL32rmi |
| 74676 | 4294, // IMUL32rmi8 |
| 74677 | 4297, // IMUL32rmi8_EVEX |
| 74678 | 4300, // IMUL32rmi8_NF |
| 74679 | 4303, // IMUL32rmi_EVEX |
| 74680 | 4306, // IMUL32rmi_NF |
| 74681 | 4309, // IMUL32rr |
| 74682 | 4312, // IMUL32rr_EVEX |
| 74683 | 4315, // IMUL32rr_ND |
| 74684 | 4318, // IMUL32rr_NF |
| 74685 | 4321, // IMUL32rr_NF_ND |
| 74686 | 4324, // IMUL32rri |
| 74687 | 4327, // IMUL32rri8 |
| 74688 | 4330, // IMUL32rri8_EVEX |
| 74689 | 4333, // IMUL32rri8_NF |
| 74690 | 4336, // IMUL32rri_EVEX |
| 74691 | 4339, // IMUL32rri_NF |
| 74692 | 4342, // IMUL64m |
| 74693 | 4343, // IMUL64m_EVEX |
| 74694 | 4344, // IMUL64m_NF |
| 74695 | 4345, // IMUL64r |
| 74696 | 4346, // IMUL64r_EVEX |
| 74697 | 4347, // IMUL64r_NF |
| 74698 | 4348, // IMUL64rm |
| 74699 | 4351, // IMUL64rm_EVEX |
| 74700 | 4354, // IMUL64rm_ND |
| 74701 | 4357, // IMUL64rm_NF |
| 74702 | 4360, // IMUL64rm_NF_ND |
| 74703 | 4363, // IMUL64rmi32 |
| 74704 | 4366, // IMUL64rmi32_EVEX |
| 74705 | 4369, // IMUL64rmi32_NF |
| 74706 | 4372, // IMUL64rmi8 |
| 74707 | 4375, // IMUL64rmi8_EVEX |
| 74708 | 4378, // IMUL64rmi8_NF |
| 74709 | 4381, // IMUL64rr |
| 74710 | 4384, // IMUL64rr_EVEX |
| 74711 | 4387, // IMUL64rr_ND |
| 74712 | 4390, // IMUL64rr_NF |
| 74713 | 4393, // IMUL64rr_NF_ND |
| 74714 | 4396, // IMUL64rri32 |
| 74715 | 4399, // IMUL64rri32_EVEX |
| 74716 | 4402, // IMUL64rri32_NF |
| 74717 | 4405, // IMUL64rri8 |
| 74718 | 4408, // IMUL64rri8_EVEX |
| 74719 | 4411, // IMUL64rri8_NF |
| 74720 | 4414, // IMUL8m |
| 74721 | 4415, // IMUL8m_EVEX |
| 74722 | 4416, // IMUL8m_NF |
| 74723 | 4417, // IMUL8r |
| 74724 | 4418, // IMUL8r_EVEX |
| 74725 | 4419, // IMUL8r_NF |
| 74726 | 4420, // IMULZU16rmi |
| 74727 | 4423, // IMULZU16rmi8 |
| 74728 | 4426, // IMULZU16rri |
| 74729 | 4429, // IMULZU16rri8 |
| 74730 | 4432, // IMULZU32rmi |
| 74731 | 4435, // IMULZU32rmi8 |
| 74732 | 4438, // IMULZU32rri |
| 74733 | 4441, // IMULZU32rri8 |
| 74734 | 4444, // IMULZU64rmi32 |
| 74735 | 4447, // IMULZU64rmi8 |
| 74736 | 4450, // IMULZU64rri32 |
| 74737 | 4453, // IMULZU64rri8 |
| 74738 | 4456, // IN16ri |
| 74739 | 4457, // IN16rr |
| 74740 | 4457, // IN32ri |
| 74741 | 4458, // IN32rr |
| 74742 | 4458, // IN8ri |
| 74743 | 4459, // IN8rr |
| 74744 | 4459, // INC16m |
| 74745 | 4460, // INC16m_EVEX |
| 74746 | 4461, // INC16m_ND |
| 74747 | 4463, // INC16m_NF |
| 74748 | 4464, // INC16m_NF_ND |
| 74749 | 4466, // INC16r |
| 74750 | 4468, // INC16r_EVEX |
| 74751 | 4470, // INC16r_ND |
| 74752 | 4472, // INC16r_NF |
| 74753 | 4474, // INC16r_NF_ND |
| 74754 | 4476, // INC16r_alt |
| 74755 | 4478, // INC32m |
| 74756 | 4479, // INC32m_EVEX |
| 74757 | 4480, // INC32m_ND |
| 74758 | 4482, // INC32m_NF |
| 74759 | 4483, // INC32m_NF_ND |
| 74760 | 4485, // INC32r |
| 74761 | 4487, // INC32r_EVEX |
| 74762 | 4489, // INC32r_ND |
| 74763 | 4491, // INC32r_NF |
| 74764 | 4493, // INC32r_NF_ND |
| 74765 | 4495, // INC32r_alt |
| 74766 | 4497, // INC64m |
| 74767 | 4498, // INC64m_EVEX |
| 74768 | 4499, // INC64m_ND |
| 74769 | 4501, // INC64m_NF |
| 74770 | 4502, // INC64m_NF_ND |
| 74771 | 4504, // INC64r |
| 74772 | 4506, // INC64r_EVEX |
| 74773 | 4508, // INC64r_ND |
| 74774 | 4510, // INC64r_NF |
| 74775 | 4512, // INC64r_NF_ND |
| 74776 | 4514, // INC8m |
| 74777 | 4515, // INC8m_EVEX |
| 74778 | 4516, // INC8m_ND |
| 74779 | 4518, // INC8m_NF |
| 74780 | 4519, // INC8m_NF_ND |
| 74781 | 4521, // INC8r |
| 74782 | 4523, // INC8r_EVEX |
| 74783 | 4525, // INC8r_ND |
| 74784 | 4527, // INC8r_NF |
| 74785 | 4529, // INC8r_NF_ND |
| 74786 | 4531, // INCSSPD |
| 74787 | 4532, // INCSSPQ |
| 74788 | 4533, // INSB |
| 74789 | 4534, // INSERTPSrmi |
| 74790 | 4538, // INSERTPSrri |
| 74791 | 4542, // INSERTQ |
| 74792 | 4545, // INSERTQI |
| 74793 | 4550, // INSL |
| 74794 | 4551, // INSW |
| 74795 | 4552, // INT |
| 74796 | 4553, // INT3 |
| 74797 | 4553, // INTO |
| 74798 | 4553, // INVD |
| 74799 | 4553, // INVEPT32 |
| 74800 | 4555, // INVEPT64 |
| 74801 | 4557, // INVEPT64_EVEX |
| 74802 | 4559, // INVLPG |
| 74803 | 4560, // INVLPGA32 |
| 74804 | 4560, // INVLPGA64 |
| 74805 | 4560, // INVLPGB32 |
| 74806 | 4560, // INVLPGB64 |
| 74807 | 4560, // INVPCID32 |
| 74808 | 4562, // INVPCID64 |
| 74809 | 4564, // INVPCID64_EVEX |
| 74810 | 4566, // INVVPID32 |
| 74811 | 4568, // INVVPID64 |
| 74812 | 4570, // INVVPID64_EVEX |
| 74813 | 4572, // IRET |
| 74814 | 4573, // IRET16 |
| 74815 | 4573, // IRET32 |
| 74816 | 4573, // IRET64 |
| 74817 | 4573, // ISTT_FP16m |
| 74818 | 4574, // ISTT_FP32m |
| 74819 | 4575, // ISTT_FP64m |
| 74820 | 4576, // ISTT_Fp16m32 |
| 74821 | 4578, // ISTT_Fp16m64 |
| 74822 | 4580, // ISTT_Fp16m80 |
| 74823 | 4582, // ISTT_Fp32m32 |
| 74824 | 4584, // ISTT_Fp32m64 |
| 74825 | 4586, // ISTT_Fp32m80 |
| 74826 | 4588, // ISTT_Fp64m32 |
| 74827 | 4590, // ISTT_Fp64m64 |
| 74828 | 4592, // ISTT_Fp64m80 |
| 74829 | 4594, // IST_F16m |
| 74830 | 4595, // IST_F32m |
| 74831 | 4596, // IST_FP16m |
| 74832 | 4597, // IST_FP32m |
| 74833 | 4598, // IST_FP64m |
| 74834 | 4599, // IST_Fp16m32 |
| 74835 | 4601, // IST_Fp16m64 |
| 74836 | 4603, // IST_Fp16m80 |
| 74837 | 4605, // IST_Fp32m32 |
| 74838 | 4607, // IST_Fp32m64 |
| 74839 | 4609, // IST_Fp32m80 |
| 74840 | 4611, // IST_Fp64m32 |
| 74841 | 4613, // IST_Fp64m64 |
| 74842 | 4615, // IST_Fp64m80 |
| 74843 | 4617, // Int_eh_sjlj_setup_dispatch |
| 74844 | 4617, // JCC_1 |
| 74845 | 4619, // JCC_2 |
| 74846 | 4621, // JCC_4 |
| 74847 | 4623, // JCXZ |
| 74848 | 4624, // JECXZ |
| 74849 | 4625, // JMP16m |
| 74850 | 4626, // JMP16m_NT |
| 74851 | 4627, // JMP16r |
| 74852 | 4628, // JMP16r_NT |
| 74853 | 4629, // JMP32m |
| 74854 | 4630, // JMP32m_NT |
| 74855 | 4631, // JMP32r |
| 74856 | 4632, // JMP32r_NT |
| 74857 | 4633, // JMP64m |
| 74858 | 4634, // JMP64m_NT |
| 74859 | 4635, // JMP64m_REX |
| 74860 | 4636, // JMP64r |
| 74861 | 4637, // JMP64r_NT |
| 74862 | 4638, // JMP64r_REX |
| 74863 | 4639, // JMPABS64i |
| 74864 | 4640, // JMP_1 |
| 74865 | 4641, // JMP_2 |
| 74866 | 4642, // JMP_4 |
| 74867 | 4643, // JRCXZ |
| 74868 | 4644, // KADDBkk |
| 74869 | 4647, // KADDDkk |
| 74870 | 4650, // KADDQkk |
| 74871 | 4653, // KADDWkk |
| 74872 | 4656, // KANDBkk |
| 74873 | 4659, // KANDDkk |
| 74874 | 4662, // KANDNBkk |
| 74875 | 4665, // KANDNDkk |
| 74876 | 4668, // KANDNQkk |
| 74877 | 4671, // KANDNWkk |
| 74878 | 4674, // KANDQkk |
| 74879 | 4677, // KANDWkk |
| 74880 | 4680, // KCFI_CHECK |
| 74881 | 4682, // KMOVBkk |
| 74882 | 4684, // KMOVBkk_EVEX |
| 74883 | 4686, // KMOVBkm |
| 74884 | 4688, // KMOVBkm_EVEX |
| 74885 | 4690, // KMOVBkr |
| 74886 | 4692, // KMOVBkr_EVEX |
| 74887 | 4694, // KMOVBmk |
| 74888 | 4696, // KMOVBmk_EVEX |
| 74889 | 4698, // KMOVBrk |
| 74890 | 4700, // KMOVBrk_EVEX |
| 74891 | 4702, // KMOVDkk |
| 74892 | 4704, // KMOVDkk_EVEX |
| 74893 | 4706, // KMOVDkm |
| 74894 | 4708, // KMOVDkm_EVEX |
| 74895 | 4710, // KMOVDkr |
| 74896 | 4712, // KMOVDkr_EVEX |
| 74897 | 4714, // KMOVDmk |
| 74898 | 4716, // KMOVDmk_EVEX |
| 74899 | 4718, // KMOVDrk |
| 74900 | 4720, // KMOVDrk_EVEX |
| 74901 | 4722, // KMOVQkk |
| 74902 | 4724, // KMOVQkk_EVEX |
| 74903 | 4726, // KMOVQkm |
| 74904 | 4728, // KMOVQkm_EVEX |
| 74905 | 4730, // KMOVQkr |
| 74906 | 4732, // KMOVQkr_EVEX |
| 74907 | 4734, // KMOVQmk |
| 74908 | 4736, // KMOVQmk_EVEX |
| 74909 | 4738, // KMOVQrk |
| 74910 | 4740, // KMOVQrk_EVEX |
| 74911 | 4742, // KMOVWkk |
| 74912 | 4744, // KMOVWkk_EVEX |
| 74913 | 4746, // KMOVWkm |
| 74914 | 4748, // KMOVWkm_EVEX |
| 74915 | 4750, // KMOVWkr |
| 74916 | 4752, // KMOVWkr_EVEX |
| 74917 | 4754, // KMOVWmk |
| 74918 | 4756, // KMOVWmk_EVEX |
| 74919 | 4758, // KMOVWrk |
| 74920 | 4760, // KMOVWrk_EVEX |
| 74921 | 4762, // KNOTBkk |
| 74922 | 4764, // KNOTDkk |
| 74923 | 4766, // KNOTQkk |
| 74924 | 4768, // KNOTWkk |
| 74925 | 4770, // KORBkk |
| 74926 | 4773, // KORDkk |
| 74927 | 4776, // KORQkk |
| 74928 | 4779, // KORTESTBkk |
| 74929 | 4781, // KORTESTDkk |
| 74930 | 4783, // KORTESTQkk |
| 74931 | 4785, // KORTESTWkk |
| 74932 | 4787, // KORWkk |
| 74933 | 4790, // KSHIFTLBki |
| 74934 | 4793, // KSHIFTLDki |
| 74935 | 4796, // KSHIFTLQki |
| 74936 | 4799, // KSHIFTLWki |
| 74937 | 4802, // KSHIFTRBki |
| 74938 | 4805, // KSHIFTRDki |
| 74939 | 4808, // KSHIFTRQki |
| 74940 | 4811, // KSHIFTRWki |
| 74941 | 4814, // KTESTBkk |
| 74942 | 4816, // KTESTDkk |
| 74943 | 4818, // KTESTQkk |
| 74944 | 4820, // KTESTWkk |
| 74945 | 4822, // KUNPCKBWkk |
| 74946 | 4825, // KUNPCKDQkk |
| 74947 | 4828, // KUNPCKWDkk |
| 74948 | 4831, // KXNORBkk |
| 74949 | 4834, // KXNORDkk |
| 74950 | 4837, // KXNORQkk |
| 74951 | 4840, // KXNORWkk |
| 74952 | 4843, // KXORBkk |
| 74953 | 4846, // KXORDkk |
| 74954 | 4849, // KXORQkk |
| 74955 | 4852, // KXORWkk |
| 74956 | 4855, // LAHF |
| 74957 | 4855, // LAR16rm |
| 74958 | 4857, // LAR16rr |
| 74959 | 4859, // LAR32rm |
| 74960 | 4861, // LAR32rr |
| 74961 | 4863, // LAR64rm |
| 74962 | 4865, // LAR64rr |
| 74963 | 4867, // LCMPXCHG16 |
| 74964 | 4869, // LCMPXCHG16B |
| 74965 | 4870, // LCMPXCHG32 |
| 74966 | 4872, // LCMPXCHG64 |
| 74967 | 4874, // LCMPXCHG8 |
| 74968 | 4876, // LCMPXCHG8B |
| 74969 | 4877, // LDDQUrm |
| 74970 | 4879, // LDMXCSR |
| 74971 | 4880, // LDS16rm |
| 74972 | 4882, // LDS32rm |
| 74973 | 4884, // LDTILECFG |
| 74974 | 4885, // LDTILECFG_EVEX |
| 74975 | 4886, // LD_F0 |
| 74976 | 4886, // LD_F1 |
| 74977 | 4886, // LD_F32m |
| 74978 | 4887, // LD_F64m |
| 74979 | 4888, // LD_F80m |
| 74980 | 4889, // LD_Fp032 |
| 74981 | 4890, // LD_Fp064 |
| 74982 | 4891, // LD_Fp080 |
| 74983 | 4892, // LD_Fp132 |
| 74984 | 4893, // LD_Fp164 |
| 74985 | 4894, // LD_Fp180 |
| 74986 | 4895, // LD_Fp32m |
| 74987 | 4897, // LD_Fp32m64 |
| 74988 | 4899, // LD_Fp32m80 |
| 74989 | 4901, // LD_Fp64m |
| 74990 | 4903, // LD_Fp64m80 |
| 74991 | 4905, // LD_Fp80m |
| 74992 | 4907, // LD_Frr |
| 74993 | 4908, // LEA16r |
| 74994 | 4910, // LEA32r |
| 74995 | 4912, // LEA64_16r |
| 74996 | 4914, // LEA64_32r |
| 74997 | 4916, // LEA64_8r |
| 74998 | 4918, // LEA64r |
| 74999 | 4920, // LEAVE |
| 75000 | 4920, // LEAVE64 |
| 75001 | 4920, // LES16rm |
| 75002 | 4922, // LES32rm |
| 75003 | 4924, // LFENCE |
| 75004 | 4924, // LFS16rm |
| 75005 | 4926, // LFS32rm |
| 75006 | 4928, // LFS64rm |
| 75007 | 4930, // LGDT16m |
| 75008 | 4931, // LGDT32m |
| 75009 | 4932, // LGDT64m |
| 75010 | 4933, // LGS16rm |
| 75011 | 4935, // LGS32rm |
| 75012 | 4937, // LGS64rm |
| 75013 | 4939, // LIDT16m |
| 75014 | 4940, // LIDT32m |
| 75015 | 4941, // LIDT64m |
| 75016 | 4942, // LKGS16m |
| 75017 | 4943, // LKGS16r |
| 75018 | 4944, // LLDT16m |
| 75019 | 4945, // LLDT16r |
| 75020 | 4946, // LLWPCB |
| 75021 | 4947, // LLWPCB64 |
| 75022 | 4948, // LMSW16m |
| 75023 | 4949, // LMSW16r |
| 75024 | 4950, // LOADIWKEY |
| 75025 | 4952, // LOCK_ADD16mi |
| 75026 | 4954, // LOCK_ADD16mi8 |
| 75027 | 4956, // LOCK_ADD16mr |
| 75028 | 4958, // LOCK_ADD32mi |
| 75029 | 4960, // LOCK_ADD32mi8 |
| 75030 | 4962, // LOCK_ADD32mr |
| 75031 | 4964, // LOCK_ADD64mi32 |
| 75032 | 4966, // LOCK_ADD64mi8 |
| 75033 | 4968, // LOCK_ADD64mr |
| 75034 | 4970, // LOCK_ADD8mi |
| 75035 | 4972, // LOCK_ADD8mr |
| 75036 | 4974, // LOCK_AND16mi |
| 75037 | 4976, // LOCK_AND16mi8 |
| 75038 | 4978, // LOCK_AND16mr |
| 75039 | 4980, // LOCK_AND32mi |
| 75040 | 4982, // LOCK_AND32mi8 |
| 75041 | 4984, // LOCK_AND32mr |
| 75042 | 4986, // LOCK_AND64mi32 |
| 75043 | 4988, // LOCK_AND64mi8 |
| 75044 | 4990, // LOCK_AND64mr |
| 75045 | 4992, // LOCK_AND8mi |
| 75046 | 4994, // LOCK_AND8mr |
| 75047 | 4996, // LOCK_BTC16m |
| 75048 | 4998, // LOCK_BTC32m |
| 75049 | 5000, // LOCK_BTC64m |
| 75050 | 5002, // LOCK_BTC_RM16rm |
| 75051 | 5004, // LOCK_BTC_RM32rm |
| 75052 | 5006, // LOCK_BTC_RM64rm |
| 75053 | 5008, // LOCK_BTR16m |
| 75054 | 5010, // LOCK_BTR32m |
| 75055 | 5012, // LOCK_BTR64m |
| 75056 | 5014, // LOCK_BTR_RM16rm |
| 75057 | 5016, // LOCK_BTR_RM32rm |
| 75058 | 5018, // LOCK_BTR_RM64rm |
| 75059 | 5020, // LOCK_BTS16m |
| 75060 | 5022, // LOCK_BTS32m |
| 75061 | 5024, // LOCK_BTS64m |
| 75062 | 5026, // LOCK_BTS_RM16rm |
| 75063 | 5028, // LOCK_BTS_RM32rm |
| 75064 | 5030, // LOCK_BTS_RM64rm |
| 75065 | 5032, // LOCK_DEC16m |
| 75066 | 5033, // LOCK_DEC32m |
| 75067 | 5034, // LOCK_DEC64m |
| 75068 | 5035, // LOCK_DEC8m |
| 75069 | 5036, // LOCK_INC16m |
| 75070 | 5037, // LOCK_INC32m |
| 75071 | 5038, // LOCK_INC64m |
| 75072 | 5039, // LOCK_INC8m |
| 75073 | 5040, // LOCK_OR16mi |
| 75074 | 5042, // LOCK_OR16mi8 |
| 75075 | 5044, // LOCK_OR16mr |
| 75076 | 5046, // LOCK_OR32mi |
| 75077 | 5048, // LOCK_OR32mi8 |
| 75078 | 5050, // LOCK_OR32mr |
| 75079 | 5052, // LOCK_OR64mi32 |
| 75080 | 5054, // LOCK_OR64mi8 |
| 75081 | 5056, // LOCK_OR64mr |
| 75082 | 5058, // LOCK_OR8mi |
| 75083 | 5060, // LOCK_OR8mr |
| 75084 | 5062, // LOCK_PREFIX |
| 75085 | 5062, // LOCK_SUB16mi |
| 75086 | 5064, // LOCK_SUB16mi8 |
| 75087 | 5066, // LOCK_SUB16mr |
| 75088 | 5068, // LOCK_SUB32mi |
| 75089 | 5070, // LOCK_SUB32mi8 |
| 75090 | 5072, // LOCK_SUB32mr |
| 75091 | 5074, // LOCK_SUB64mi32 |
| 75092 | 5076, // LOCK_SUB64mi8 |
| 75093 | 5078, // LOCK_SUB64mr |
| 75094 | 5080, // LOCK_SUB8mi |
| 75095 | 5082, // LOCK_SUB8mr |
| 75096 | 5084, // LOCK_XOR16mi |
| 75097 | 5086, // LOCK_XOR16mi8 |
| 75098 | 5088, // LOCK_XOR16mr |
| 75099 | 5090, // LOCK_XOR32mi |
| 75100 | 5092, // LOCK_XOR32mi8 |
| 75101 | 5094, // LOCK_XOR32mr |
| 75102 | 5096, // LOCK_XOR64mi32 |
| 75103 | 5098, // LOCK_XOR64mi8 |
| 75104 | 5100, // LOCK_XOR64mr |
| 75105 | 5102, // LOCK_XOR8mi |
| 75106 | 5104, // LOCK_XOR8mr |
| 75107 | 5106, // LODSB |
| 75108 | 5107, // LODSL |
| 75109 | 5108, // LODSQ |
| 75110 | 5109, // LODSW |
| 75111 | 5110, // LOOP |
| 75112 | 5111, // LOOPE |
| 75113 | 5112, // LOOPNE |
| 75114 | 5113, // LRET16 |
| 75115 | 5113, // LRET32 |
| 75116 | 5113, // LRET64 |
| 75117 | 5113, // LRETI16 |
| 75118 | 5114, // LRETI32 |
| 75119 | 5115, // LRETI64 |
| 75120 | 5116, // LSL16rm |
| 75121 | 5118, // LSL16rr |
| 75122 | 5120, // LSL32rm |
| 75123 | 5122, // LSL32rr |
| 75124 | 5124, // LSL64rm |
| 75125 | 5126, // LSL64rr |
| 75126 | 5128, // LSS16rm |
| 75127 | 5130, // LSS32rm |
| 75128 | 5132, // LSS64rm |
| 75129 | 5134, // LTRm |
| 75130 | 5135, // LTRr |
| 75131 | 5136, // LWPINS32rmi |
| 75132 | 5139, // LWPINS32rri |
| 75133 | 5142, // LWPINS64rmi |
| 75134 | 5145, // LWPINS64rri |
| 75135 | 5148, // LWPVAL32rmi |
| 75136 | 5151, // LWPVAL32rri |
| 75137 | 5154, // LWPVAL64rmi |
| 75138 | 5157, // LWPVAL64rri |
| 75139 | 5160, // LXADD16 |
| 75140 | 5163, // LXADD32 |
| 75141 | 5166, // LXADD64 |
| 75142 | 5169, // LXADD8 |
| 75143 | 5172, // LZCNT16rm |
| 75144 | 5174, // LZCNT16rm_EVEX |
| 75145 | 5176, // LZCNT16rm_NF |
| 75146 | 5178, // LZCNT16rr |
| 75147 | 5180, // LZCNT16rr_EVEX |
| 75148 | 5182, // LZCNT16rr_NF |
| 75149 | 5184, // LZCNT32rm |
| 75150 | 5186, // LZCNT32rm_EVEX |
| 75151 | 5188, // LZCNT32rm_NF |
| 75152 | 5190, // LZCNT32rr |
| 75153 | 5192, // LZCNT32rr_EVEX |
| 75154 | 5194, // LZCNT32rr_NF |
| 75155 | 5196, // LZCNT64rm |
| 75156 | 5198, // LZCNT64rm_EVEX |
| 75157 | 5200, // LZCNT64rm_NF |
| 75158 | 5202, // LZCNT64rr |
| 75159 | 5204, // LZCNT64rr_EVEX |
| 75160 | 5206, // LZCNT64rr_NF |
| 75161 | 5208, // MASKMOVDQU |
| 75162 | 5210, // MASKMOVDQU64 |
| 75163 | 5212, // MASKPAIR16LOAD |
| 75164 | 5214, // MASKPAIR16STORE |
| 75165 | 5216, // MAXCPDrm |
| 75166 | 5219, // MAXCPDrr |
| 75167 | 5222, // MAXCPSrm |
| 75168 | 5225, // MAXCPSrr |
| 75169 | 5228, // MAXCSDrm |
| 75170 | 5231, // MAXCSDrr |
| 75171 | 5234, // MAXCSSrm |
| 75172 | 5237, // MAXCSSrr |
| 75173 | 5240, // MAXPDrm |
| 75174 | 5243, // MAXPDrr |
| 75175 | 5246, // MAXPSrm |
| 75176 | 5249, // MAXPSrr |
| 75177 | 5252, // MAXSDrm |
| 75178 | 5255, // MAXSDrm_Int |
| 75179 | 5258, // MAXSDrr |
| 75180 | 5261, // MAXSDrr_Int |
| 75181 | 5264, // MAXSSrm |
| 75182 | 5267, // MAXSSrm_Int |
| 75183 | 5270, // MAXSSrr |
| 75184 | 5273, // MAXSSrr_Int |
| 75185 | 5276, // MFENCE |
| 75186 | 5276, // MINCPDrm |
| 75187 | 5279, // MINCPDrr |
| 75188 | 5282, // MINCPSrm |
| 75189 | 5285, // MINCPSrr |
| 75190 | 5288, // MINCSDrm |
| 75191 | 5291, // MINCSDrr |
| 75192 | 5294, // MINCSSrm |
| 75193 | 5297, // MINCSSrr |
| 75194 | 5300, // MINPDrm |
| 75195 | 5303, // MINPDrr |
| 75196 | 5306, // MINPSrm |
| 75197 | 5309, // MINPSrr |
| 75198 | 5312, // MINSDrm |
| 75199 | 5315, // MINSDrm_Int |
| 75200 | 5318, // MINSDrr |
| 75201 | 5321, // MINSDrr_Int |
| 75202 | 5324, // MINSSrm |
| 75203 | 5327, // MINSSrm_Int |
| 75204 | 5330, // MINSSrr |
| 75205 | 5333, // MINSSrr_Int |
| 75206 | 5336, // MMX_CVTPD2PIrm |
| 75207 | 5338, // MMX_CVTPD2PIrr |
| 75208 | 5340, // MMX_CVTPI2PDrm |
| 75209 | 5342, // MMX_CVTPI2PDrr |
| 75210 | 5344, // MMX_CVTPI2PSrm |
| 75211 | 5347, // MMX_CVTPI2PSrr |
| 75212 | 5350, // MMX_CVTPS2PIrm |
| 75213 | 5352, // MMX_CVTPS2PIrr |
| 75214 | 5354, // MMX_CVTTPD2PIrm |
| 75215 | 5356, // MMX_CVTTPD2PIrr |
| 75216 | 5358, // MMX_CVTTPS2PIrm |
| 75217 | 5360, // MMX_CVTTPS2PIrr |
| 75218 | 5362, // MMX_EMMS |
| 75219 | 5362, // MMX_MASKMOVQ |
| 75220 | 5364, // MMX_MASKMOVQ64 |
| 75221 | 5366, // MMX_MOVD64from64mr |
| 75222 | 5368, // MMX_MOVD64from64rr |
| 75223 | 5370, // MMX_MOVD64grr |
| 75224 | 5372, // MMX_MOVD64mr |
| 75225 | 5374, // MMX_MOVD64rm |
| 75226 | 5376, // MMX_MOVD64rr |
| 75227 | 5378, // MMX_MOVD64to64rm |
| 75228 | 5380, // MMX_MOVD64to64rr |
| 75229 | 5382, // MMX_MOVDQ2Qrr |
| 75230 | 5384, // MMX_MOVFR642Qrr |
| 75231 | 5386, // MMX_MOVNTQmr |
| 75232 | 5388, // MMX_MOVQ2DQrr |
| 75233 | 5390, // MMX_MOVQ2FR64rr |
| 75234 | 5392, // MMX_MOVQ64mr |
| 75235 | 5394, // MMX_MOVQ64rm |
| 75236 | 5396, // MMX_MOVQ64rr |
| 75237 | 5398, // MMX_MOVQ64rr_REV |
| 75238 | 5400, // MMX_PABSBrm |
| 75239 | 5402, // MMX_PABSBrr |
| 75240 | 5404, // MMX_PABSDrm |
| 75241 | 5406, // MMX_PABSDrr |
| 75242 | 5408, // MMX_PABSWrm |
| 75243 | 5410, // MMX_PABSWrr |
| 75244 | 5412, // MMX_PACKSSDWrm |
| 75245 | 5415, // MMX_PACKSSDWrr |
| 75246 | 5418, // MMX_PACKSSWBrm |
| 75247 | 5421, // MMX_PACKSSWBrr |
| 75248 | 5424, // MMX_PACKUSWBrm |
| 75249 | 5427, // MMX_PACKUSWBrr |
| 75250 | 5430, // MMX_PADDBrm |
| 75251 | 5433, // MMX_PADDBrr |
| 75252 | 5436, // MMX_PADDDrm |
| 75253 | 5439, // MMX_PADDDrr |
| 75254 | 5442, // MMX_PADDQrm |
| 75255 | 5445, // MMX_PADDQrr |
| 75256 | 5448, // MMX_PADDSBrm |
| 75257 | 5451, // MMX_PADDSBrr |
| 75258 | 5454, // MMX_PADDSWrm |
| 75259 | 5457, // MMX_PADDSWrr |
| 75260 | 5460, // MMX_PADDUSBrm |
| 75261 | 5463, // MMX_PADDUSBrr |
| 75262 | 5466, // MMX_PADDUSWrm |
| 75263 | 5469, // MMX_PADDUSWrr |
| 75264 | 5472, // MMX_PADDWrm |
| 75265 | 5475, // MMX_PADDWrr |
| 75266 | 5478, // MMX_PALIGNRrmi |
| 75267 | 5482, // MMX_PALIGNRrri |
| 75268 | 5486, // MMX_PANDNrm |
| 75269 | 5489, // MMX_PANDNrr |
| 75270 | 5492, // MMX_PANDrm |
| 75271 | 5495, // MMX_PANDrr |
| 75272 | 5498, // MMX_PAVGBrm |
| 75273 | 5501, // MMX_PAVGBrr |
| 75274 | 5504, // MMX_PAVGWrm |
| 75275 | 5507, // MMX_PAVGWrr |
| 75276 | 5510, // MMX_PCMPEQBrm |
| 75277 | 5513, // MMX_PCMPEQBrr |
| 75278 | 5516, // MMX_PCMPEQDrm |
| 75279 | 5519, // MMX_PCMPEQDrr |
| 75280 | 5522, // MMX_PCMPEQWrm |
| 75281 | 5525, // MMX_PCMPEQWrr |
| 75282 | 5528, // MMX_PCMPGTBrm |
| 75283 | 5531, // MMX_PCMPGTBrr |
| 75284 | 5534, // MMX_PCMPGTDrm |
| 75285 | 5537, // MMX_PCMPGTDrr |
| 75286 | 5540, // MMX_PCMPGTWrm |
| 75287 | 5543, // MMX_PCMPGTWrr |
| 75288 | 5546, // MMX_PEXTRWrri |
| 75289 | 5549, // MMX_PHADDDrm |
| 75290 | 5552, // MMX_PHADDDrr |
| 75291 | 5555, // MMX_PHADDSWrm |
| 75292 | 5558, // MMX_PHADDSWrr |
| 75293 | 5561, // MMX_PHADDWrm |
| 75294 | 5564, // MMX_PHADDWrr |
| 75295 | 5567, // MMX_PHSUBDrm |
| 75296 | 5570, // MMX_PHSUBDrr |
| 75297 | 5573, // MMX_PHSUBSWrm |
| 75298 | 5576, // MMX_PHSUBSWrr |
| 75299 | 5579, // MMX_PHSUBWrm |
| 75300 | 5582, // MMX_PHSUBWrr |
| 75301 | 5585, // MMX_PINSRWrmi |
| 75302 | 5589, // MMX_PINSRWrri |
| 75303 | 5593, // MMX_PMADDUBSWrm |
| 75304 | 5596, // MMX_PMADDUBSWrr |
| 75305 | 5599, // MMX_PMADDWDrm |
| 75306 | 5602, // MMX_PMADDWDrr |
| 75307 | 5605, // MMX_PMAXSWrm |
| 75308 | 5608, // MMX_PMAXSWrr |
| 75309 | 5611, // MMX_PMAXUBrm |
| 75310 | 5614, // MMX_PMAXUBrr |
| 75311 | 5617, // MMX_PMINSWrm |
| 75312 | 5620, // MMX_PMINSWrr |
| 75313 | 5623, // MMX_PMINUBrm |
| 75314 | 5626, // MMX_PMINUBrr |
| 75315 | 5629, // MMX_PMOVMSKBrr |
| 75316 | 5631, // MMX_PMULHRSWrm |
| 75317 | 5634, // MMX_PMULHRSWrr |
| 75318 | 5637, // MMX_PMULHUWrm |
| 75319 | 5640, // MMX_PMULHUWrr |
| 75320 | 5643, // MMX_PMULHWrm |
| 75321 | 5646, // MMX_PMULHWrr |
| 75322 | 5649, // MMX_PMULLWrm |
| 75323 | 5652, // MMX_PMULLWrr |
| 75324 | 5655, // MMX_PMULUDQrm |
| 75325 | 5658, // MMX_PMULUDQrr |
| 75326 | 5661, // MMX_PORrm |
| 75327 | 5664, // MMX_PORrr |
| 75328 | 5667, // MMX_PSADBWrm |
| 75329 | 5670, // MMX_PSADBWrr |
| 75330 | 5673, // MMX_PSHUFBrm |
| 75331 | 5676, // MMX_PSHUFBrr |
| 75332 | 5679, // MMX_PSHUFWmi |
| 75333 | 5682, // MMX_PSHUFWri |
| 75334 | 5685, // MMX_PSIGNBrm |
| 75335 | 5688, // MMX_PSIGNBrr |
| 75336 | 5691, // MMX_PSIGNDrm |
| 75337 | 5694, // MMX_PSIGNDrr |
| 75338 | 5697, // MMX_PSIGNWrm |
| 75339 | 5700, // MMX_PSIGNWrr |
| 75340 | 5703, // MMX_PSLLDri |
| 75341 | 5706, // MMX_PSLLDrm |
| 75342 | 5709, // MMX_PSLLDrr |
| 75343 | 5712, // MMX_PSLLQri |
| 75344 | 5715, // MMX_PSLLQrm |
| 75345 | 5718, // MMX_PSLLQrr |
| 75346 | 5721, // MMX_PSLLWri |
| 75347 | 5724, // MMX_PSLLWrm |
| 75348 | 5727, // MMX_PSLLWrr |
| 75349 | 5730, // MMX_PSRADri |
| 75350 | 5733, // MMX_PSRADrm |
| 75351 | 5736, // MMX_PSRADrr |
| 75352 | 5739, // MMX_PSRAWri |
| 75353 | 5742, // MMX_PSRAWrm |
| 75354 | 5745, // MMX_PSRAWrr |
| 75355 | 5748, // MMX_PSRLDri |
| 75356 | 5751, // MMX_PSRLDrm |
| 75357 | 5754, // MMX_PSRLDrr |
| 75358 | 5757, // MMX_PSRLQri |
| 75359 | 5760, // MMX_PSRLQrm |
| 75360 | 5763, // MMX_PSRLQrr |
| 75361 | 5766, // MMX_PSRLWri |
| 75362 | 5769, // MMX_PSRLWrm |
| 75363 | 5772, // MMX_PSRLWrr |
| 75364 | 5775, // MMX_PSUBBrm |
| 75365 | 5778, // MMX_PSUBBrr |
| 75366 | 5781, // MMX_PSUBDrm |
| 75367 | 5784, // MMX_PSUBDrr |
| 75368 | 5787, // MMX_PSUBQrm |
| 75369 | 5790, // MMX_PSUBQrr |
| 75370 | 5793, // MMX_PSUBSBrm |
| 75371 | 5796, // MMX_PSUBSBrr |
| 75372 | 5799, // MMX_PSUBSWrm |
| 75373 | 5802, // MMX_PSUBSWrr |
| 75374 | 5805, // MMX_PSUBUSBrm |
| 75375 | 5808, // MMX_PSUBUSBrr |
| 75376 | 5811, // MMX_PSUBUSWrm |
| 75377 | 5814, // MMX_PSUBUSWrr |
| 75378 | 5817, // MMX_PSUBWrm |
| 75379 | 5820, // MMX_PSUBWrr |
| 75380 | 5823, // MMX_PUNPCKHBWrm |
| 75381 | 5826, // MMX_PUNPCKHBWrr |
| 75382 | 5829, // MMX_PUNPCKHDQrm |
| 75383 | 5832, // MMX_PUNPCKHDQrr |
| 75384 | 5835, // MMX_PUNPCKHWDrm |
| 75385 | 5838, // MMX_PUNPCKHWDrr |
| 75386 | 5841, // MMX_PUNPCKLBWrm |
| 75387 | 5844, // MMX_PUNPCKLBWrr |
| 75388 | 5847, // MMX_PUNPCKLDQrm |
| 75389 | 5850, // MMX_PUNPCKLDQrr |
| 75390 | 5853, // MMX_PUNPCKLWDrm |
| 75391 | 5856, // MMX_PUNPCKLWDrr |
| 75392 | 5859, // MMX_PXORrm |
| 75393 | 5862, // MMX_PXORrr |
| 75394 | 5865, // MONITOR32rrr |
| 75395 | 5865, // MONITOR64rrr |
| 75396 | 5865, // MONITORX32rrr |
| 75397 | 5865, // MONITORX64rrr |
| 75398 | 5865, // MONTMUL |
| 75399 | 5865, // MOV16ao16 |
| 75400 | 5866, // MOV16ao32 |
| 75401 | 5867, // MOV16ao64 |
| 75402 | 5868, // MOV16mi |
| 75403 | 5870, // MOV16mr |
| 75404 | 5872, // MOV16ms |
| 75405 | 5874, // MOV16o16a |
| 75406 | 5875, // MOV16o32a |
| 75407 | 5876, // MOV16o64a |
| 75408 | 5877, // MOV16ri |
| 75409 | 5879, // MOV16ri_alt |
| 75410 | 5881, // MOV16rm |
| 75411 | 5883, // MOV16rr |
| 75412 | 5885, // MOV16rr_REV |
| 75413 | 5887, // MOV16rs |
| 75414 | 5889, // MOV16sm |
| 75415 | 5891, // MOV16sr |
| 75416 | 5893, // MOV32ao16 |
| 75417 | 5894, // MOV32ao32 |
| 75418 | 5895, // MOV32ao64 |
| 75419 | 5896, // MOV32cr |
| 75420 | 5898, // MOV32dr |
| 75421 | 5900, // MOV32mi |
| 75422 | 5902, // MOV32mr |
| 75423 | 5904, // MOV32o16a |
| 75424 | 5905, // MOV32o32a |
| 75425 | 5906, // MOV32o64a |
| 75426 | 5907, // MOV32rc |
| 75427 | 5909, // MOV32rd |
| 75428 | 5911, // MOV32ri |
| 75429 | 5913, // MOV32ri_alt |
| 75430 | 5915, // MOV32rm |
| 75431 | 5917, // MOV32rr |
| 75432 | 5919, // MOV32rr_REV |
| 75433 | 5921, // MOV32rs |
| 75434 | 5923, // MOV32sr |
| 75435 | 5925, // MOV64ao32 |
| 75436 | 5926, // MOV64ao64 |
| 75437 | 5927, // MOV64cr |
| 75438 | 5929, // MOV64dr |
| 75439 | 5931, // MOV64mi32 |
| 75440 | 5933, // MOV64mr |
| 75441 | 5935, // MOV64o32a |
| 75442 | 5936, // MOV64o64a |
| 75443 | 5937, // MOV64rc |
| 75444 | 5939, // MOV64rd |
| 75445 | 5941, // MOV64ri |
| 75446 | 5943, // MOV64ri32 |
| 75447 | 5945, // MOV64rm |
| 75448 | 5947, // MOV64rr |
| 75449 | 5949, // MOV64rr_REV |
| 75450 | 5951, // MOV64rs |
| 75451 | 5953, // MOV64sr |
| 75452 | 5955, // MOV64toPQIrm |
| 75453 | 5957, // MOV64toPQIrr |
| 75454 | 5959, // MOV64toSDrr |
| 75455 | 5961, // MOV8ao16 |
| 75456 | 5962, // MOV8ao32 |
| 75457 | 5963, // MOV8ao64 |
| 75458 | 5964, // MOV8mi |
| 75459 | 5966, // MOV8mr |
| 75460 | 5968, // MOV8mr_NOREX |
| 75461 | 5970, // MOV8o16a |
| 75462 | 5971, // MOV8o32a |
| 75463 | 5972, // MOV8o64a |
| 75464 | 5973, // MOV8ri |
| 75465 | 5975, // MOV8ri_alt |
| 75466 | 5977, // MOV8rm |
| 75467 | 5979, // MOV8rm_NOREX |
| 75468 | 5981, // MOV8rr |
| 75469 | 5983, // MOV8rr_NOREX |
| 75470 | 5985, // MOV8rr_REV |
| 75471 | 5987, // MOVAPDmr |
| 75472 | 5989, // MOVAPDrm |
| 75473 | 5991, // MOVAPDrr |
| 75474 | 5993, // MOVAPDrr_REV |
| 75475 | 5995, // MOVAPSmr |
| 75476 | 5997, // MOVAPSrm |
| 75477 | 5999, // MOVAPSrr |
| 75478 | 6001, // MOVAPSrr_REV |
| 75479 | 6003, // MOVBE16mr |
| 75480 | 6005, // MOVBE16mr_EVEX |
| 75481 | 6007, // MOVBE16rm |
| 75482 | 6009, // MOVBE16rm_EVEX |
| 75483 | 6011, // MOVBE16rr |
| 75484 | 6013, // MOVBE16rr_REV |
| 75485 | 6015, // MOVBE32mr |
| 75486 | 6017, // MOVBE32mr_EVEX |
| 75487 | 6019, // MOVBE32rm |
| 75488 | 6021, // MOVBE32rm_EVEX |
| 75489 | 6023, // MOVBE32rr |
| 75490 | 6025, // MOVBE32rr_REV |
| 75491 | 6027, // MOVBE64mr |
| 75492 | 6029, // MOVBE64mr_EVEX |
| 75493 | 6031, // MOVBE64rm |
| 75494 | 6033, // MOVBE64rm_EVEX |
| 75495 | 6035, // MOVBE64rr |
| 75496 | 6037, // MOVBE64rr_REV |
| 75497 | 6039, // MOVDDUPrm |
| 75498 | 6041, // MOVDDUPrr |
| 75499 | 6043, // MOVDI2PDIrm |
| 75500 | 6045, // MOVDI2PDIrr |
| 75501 | 6047, // MOVDI2SSrr |
| 75502 | 6049, // MOVDIR64B16 |
| 75503 | 6051, // MOVDIR64B32 |
| 75504 | 6053, // MOVDIR64B32_EVEX |
| 75505 | 6055, // MOVDIR64B64 |
| 75506 | 6057, // MOVDIR64B64_EVEX |
| 75507 | 6059, // MOVDIRI32 |
| 75508 | 6061, // MOVDIRI32_EVEX |
| 75509 | 6063, // MOVDIRI64 |
| 75510 | 6065, // MOVDIRI64_EVEX |
| 75511 | 6067, // MOVDQAmr |
| 75512 | 6069, // MOVDQArm |
| 75513 | 6071, // MOVDQArr |
| 75514 | 6073, // MOVDQArr_REV |
| 75515 | 6075, // MOVDQUmr |
| 75516 | 6077, // MOVDQUrm |
| 75517 | 6079, // MOVDQUrr |
| 75518 | 6081, // MOVDQUrr_REV |
| 75519 | 6083, // MOVHLPSrr |
| 75520 | 6086, // MOVHPDmr |
| 75521 | 6088, // MOVHPDrm |
| 75522 | 6091, // MOVHPSmr |
| 75523 | 6093, // MOVHPSrm |
| 75524 | 6096, // MOVLHPSrr |
| 75525 | 6099, // MOVLPDmr |
| 75526 | 6101, // MOVLPDrm |
| 75527 | 6104, // MOVLPSmr |
| 75528 | 6106, // MOVLPSrm |
| 75529 | 6109, // MOVMSKPDrr |
| 75530 | 6111, // MOVMSKPSrr |
| 75531 | 6113, // MOVNTDQArm |
| 75532 | 6115, // MOVNTDQmr |
| 75533 | 6117, // MOVNTI_64mr |
| 75534 | 6119, // MOVNTImr |
| 75535 | 6121, // MOVNTPDmr |
| 75536 | 6123, // MOVNTPSmr |
| 75537 | 6125, // MOVNTSD |
| 75538 | 6127, // MOVNTSS |
| 75539 | 6129, // MOVPC32r |
| 75540 | 6131, // MOVPDI2DImr |
| 75541 | 6133, // MOVPDI2DIrr |
| 75542 | 6135, // MOVPQI2QImr |
| 75543 | 6137, // MOVPQI2QIrr |
| 75544 | 6139, // MOVPQIto64mr |
| 75545 | 6141, // MOVPQIto64rr |
| 75546 | 6143, // MOVQI2PQIrm |
| 75547 | 6145, // MOVRS16rm |
| 75548 | 6147, // MOVRS16rm_EVEX |
| 75549 | 6149, // MOVRS32rm |
| 75550 | 6151, // MOVRS32rm_EVEX |
| 75551 | 6153, // MOVRS64rm |
| 75552 | 6155, // MOVRS64rm_EVEX |
| 75553 | 6157, // MOVRS8rm |
| 75554 | 6159, // MOVRS8rm_EVEX |
| 75555 | 6161, // MOVSB |
| 75556 | 6163, // MOVSDmr |
| 75557 | 6165, // MOVSDrm |
| 75558 | 6167, // MOVSDrm_alt |
| 75559 | 6169, // MOVSDrr |
| 75560 | 6172, // MOVSDrr_REV |
| 75561 | 6175, // MOVSDto64rr |
| 75562 | 6177, // MOVSHDUPrm |
| 75563 | 6179, // MOVSHDUPrr |
| 75564 | 6181, // MOVSL |
| 75565 | 6183, // MOVSLDUPrm |
| 75566 | 6185, // MOVSLDUPrr |
| 75567 | 6187, // MOVSQ |
| 75568 | 6189, // MOVSS2DIrr |
| 75569 | 6191, // MOVSSmr |
| 75570 | 6193, // MOVSSrm |
| 75571 | 6195, // MOVSSrm_alt |
| 75572 | 6197, // MOVSSrr |
| 75573 | 6200, // MOVSSrr_REV |
| 75574 | 6203, // MOVSW |
| 75575 | 6205, // MOVSX16rm16 |
| 75576 | 6207, // MOVSX16rm32 |
| 75577 | 6209, // MOVSX16rm8 |
| 75578 | 6211, // MOVSX16rr16 |
| 75579 | 6213, // MOVSX16rr32 |
| 75580 | 6215, // MOVSX16rr8 |
| 75581 | 6217, // MOVSX32rm16 |
| 75582 | 6219, // MOVSX32rm32 |
| 75583 | 6221, // MOVSX32rm8 |
| 75584 | 6223, // MOVSX32rm8_NOREX |
| 75585 | 6225, // MOVSX32rr16 |
| 75586 | 6227, // MOVSX32rr32 |
| 75587 | 6229, // MOVSX32rr8 |
| 75588 | 6231, // MOVSX32rr8_NOREX |
| 75589 | 6233, // MOVSX64rm16 |
| 75590 | 6235, // MOVSX64rm32 |
| 75591 | 6237, // MOVSX64rm8 |
| 75592 | 6239, // MOVSX64rr16 |
| 75593 | 6241, // MOVSX64rr32 |
| 75594 | 6243, // MOVSX64rr8 |
| 75595 | 6245, // MOVUPDmr |
| 75596 | 6247, // MOVUPDrm |
| 75597 | 6249, // MOVUPDrr |
| 75598 | 6251, // MOVUPDrr_REV |
| 75599 | 6253, // MOVUPSmr |
| 75600 | 6255, // MOVUPSrm |
| 75601 | 6257, // MOVUPSrr |
| 75602 | 6259, // MOVUPSrr_REV |
| 75603 | 6261, // MOVZPQILo2PQIrr |
| 75604 | 6263, // MOVZX16rm16 |
| 75605 | 6265, // MOVZX16rm8 |
| 75606 | 6267, // MOVZX16rr16 |
| 75607 | 6269, // MOVZX16rr8 |
| 75608 | 6271, // MOVZX32rm16 |
| 75609 | 6273, // MOVZX32rm8 |
| 75610 | 6275, // MOVZX32rm8_NOREX |
| 75611 | 6277, // MOVZX32rr16 |
| 75612 | 6279, // MOVZX32rr8 |
| 75613 | 6281, // MOVZX32rr8_NOREX |
| 75614 | 6283, // MOVZX64rm16 |
| 75615 | 6285, // MOVZX64rm8 |
| 75616 | 6287, // MOVZX64rr16 |
| 75617 | 6289, // MOVZX64rr8 |
| 75618 | 6291, // MPSADBWrmi |
| 75619 | 6295, // MPSADBWrri |
| 75620 | 6299, // MUL16m |
| 75621 | 6300, // MUL16m_EVEX |
| 75622 | 6301, // MUL16m_NF |
| 75623 | 6302, // MUL16r |
| 75624 | 6303, // MUL16r_EVEX |
| 75625 | 6304, // MUL16r_NF |
| 75626 | 6305, // MUL32m |
| 75627 | 6306, // MUL32m_EVEX |
| 75628 | 6307, // MUL32m_NF |
| 75629 | 6308, // MUL32r |
| 75630 | 6309, // MUL32r_EVEX |
| 75631 | 6310, // MUL32r_NF |
| 75632 | 6311, // MUL64m |
| 75633 | 6312, // MUL64m_EVEX |
| 75634 | 6313, // MUL64m_NF |
| 75635 | 6314, // MUL64r |
| 75636 | 6315, // MUL64r_EVEX |
| 75637 | 6316, // MUL64r_NF |
| 75638 | 6317, // MUL8m |
| 75639 | 6318, // MUL8m_EVEX |
| 75640 | 6319, // MUL8m_NF |
| 75641 | 6320, // MUL8r |
| 75642 | 6321, // MUL8r_EVEX |
| 75643 | 6322, // MUL8r_NF |
| 75644 | 6323, // MULPDrm |
| 75645 | 6326, // MULPDrr |
| 75646 | 6329, // MULPSrm |
| 75647 | 6332, // MULPSrr |
| 75648 | 6335, // MULSDrm |
| 75649 | 6338, // MULSDrm_Int |
| 75650 | 6341, // MULSDrr |
| 75651 | 6344, // MULSDrr_Int |
| 75652 | 6347, // MULSSrm |
| 75653 | 6350, // MULSSrm_Int |
| 75654 | 6353, // MULSSrr |
| 75655 | 6356, // MULSSrr_Int |
| 75656 | 6359, // MULX32Hrm |
| 75657 | 6361, // MULX32Hrr |
| 75658 | 6363, // MULX32rm |
| 75659 | 6366, // MULX32rm_EVEX |
| 75660 | 6369, // MULX32rr |
| 75661 | 6372, // MULX32rr_EVEX |
| 75662 | 6375, // MULX64Hrm |
| 75663 | 6377, // MULX64Hrr |
| 75664 | 6379, // MULX64rm |
| 75665 | 6382, // MULX64rm_EVEX |
| 75666 | 6385, // MULX64rr |
| 75667 | 6388, // MULX64rr_EVEX |
| 75668 | 6391, // MUL_F32m |
| 75669 | 6392, // MUL_F64m |
| 75670 | 6393, // MUL_FI16m |
| 75671 | 6394, // MUL_FI32m |
| 75672 | 6395, // MUL_FPrST0 |
| 75673 | 6396, // MUL_FST0r |
| 75674 | 6397, // MUL_Fp32 |
| 75675 | 6400, // MUL_Fp32m |
| 75676 | 6403, // MUL_Fp64 |
| 75677 | 6406, // MUL_Fp64m |
| 75678 | 6409, // MUL_Fp64m32 |
| 75679 | 6412, // MUL_Fp80 |
| 75680 | 6415, // MUL_Fp80m32 |
| 75681 | 6418, // MUL_Fp80m64 |
| 75682 | 6421, // MUL_FpI16m32 |
| 75683 | 6424, // MUL_FpI16m64 |
| 75684 | 6427, // MUL_FpI16m80 |
| 75685 | 6430, // MUL_FpI32m32 |
| 75686 | 6433, // MUL_FpI32m64 |
| 75687 | 6436, // MUL_FpI32m80 |
| 75688 | 6439, // MUL_FrST0 |
| 75689 | 6440, // MWAITXrrr |
| 75690 | 6440, // MWAITrr |
| 75691 | 6440, // NEG16m |
| 75692 | 6441, // NEG16m_EVEX |
| 75693 | 6442, // NEG16m_ND |
| 75694 | 6444, // NEG16m_NF |
| 75695 | 6445, // NEG16m_NF_ND |
| 75696 | 6447, // NEG16r |
| 75697 | 6449, // NEG16r_EVEX |
| 75698 | 6451, // NEG16r_ND |
| 75699 | 6453, // NEG16r_NF |
| 75700 | 6455, // NEG16r_NF_ND |
| 75701 | 6457, // NEG32m |
| 75702 | 6458, // NEG32m_EVEX |
| 75703 | 6459, // NEG32m_ND |
| 75704 | 6461, // NEG32m_NF |
| 75705 | 6462, // NEG32m_NF_ND |
| 75706 | 6464, // NEG32r |
| 75707 | 6466, // NEG32r_EVEX |
| 75708 | 6468, // NEG32r_ND |
| 75709 | 6470, // NEG32r_NF |
| 75710 | 6472, // NEG32r_NF_ND |
| 75711 | 6474, // NEG64m |
| 75712 | 6475, // NEG64m_EVEX |
| 75713 | 6476, // NEG64m_ND |
| 75714 | 6478, // NEG64m_NF |
| 75715 | 6479, // NEG64m_NF_ND |
| 75716 | 6481, // NEG64r |
| 75717 | 6483, // NEG64r_EVEX |
| 75718 | 6485, // NEG64r_ND |
| 75719 | 6487, // NEG64r_NF |
| 75720 | 6489, // NEG64r_NF_ND |
| 75721 | 6491, // NEG8m |
| 75722 | 6492, // NEG8m_EVEX |
| 75723 | 6493, // NEG8m_ND |
| 75724 | 6495, // NEG8m_NF |
| 75725 | 6496, // NEG8m_NF_ND |
| 75726 | 6498, // NEG8r |
| 75727 | 6500, // NEG8r_EVEX |
| 75728 | 6502, // NEG8r_ND |
| 75729 | 6504, // NEG8r_NF |
| 75730 | 6506, // NEG8r_NF_ND |
| 75731 | 6508, // NOOP |
| 75732 | 6508, // NOOPL |
| 75733 | 6509, // NOOPLr |
| 75734 | 6510, // NOOPQ |
| 75735 | 6511, // NOOPQr |
| 75736 | 6512, // NOOPW |
| 75737 | 6513, // NOOPWr |
| 75738 | 6514, // NOT16m |
| 75739 | 6515, // NOT16m_EVEX |
| 75740 | 6516, // NOT16m_ND |
| 75741 | 6518, // NOT16r |
| 75742 | 6520, // NOT16r_EVEX |
| 75743 | 6522, // NOT16r_ND |
| 75744 | 6524, // NOT32m |
| 75745 | 6525, // NOT32m_EVEX |
| 75746 | 6526, // NOT32m_ND |
| 75747 | 6528, // NOT32r |
| 75748 | 6530, // NOT32r_EVEX |
| 75749 | 6532, // NOT32r_ND |
| 75750 | 6534, // NOT64m |
| 75751 | 6535, // NOT64m_EVEX |
| 75752 | 6536, // NOT64m_ND |
| 75753 | 6538, // NOT64r |
| 75754 | 6540, // NOT64r_EVEX |
| 75755 | 6542, // NOT64r_ND |
| 75756 | 6544, // NOT8m |
| 75757 | 6545, // NOT8m_EVEX |
| 75758 | 6546, // NOT8m_ND |
| 75759 | 6548, // NOT8r |
| 75760 | 6550, // NOT8r_EVEX |
| 75761 | 6552, // NOT8r_ND |
| 75762 | 6554, // OR16i16 |
| 75763 | 6555, // OR16mi |
| 75764 | 6557, // OR16mi8 |
| 75765 | 6559, // OR16mi8_EVEX |
| 75766 | 6561, // OR16mi8_ND |
| 75767 | 6564, // OR16mi8_NF |
| 75768 | 6566, // OR16mi8_NF_ND |
| 75769 | 6569, // OR16mi_EVEX |
| 75770 | 6571, // OR16mi_ND |
| 75771 | 6574, // OR16mi_NF |
| 75772 | 6576, // OR16mi_NF_ND |
| 75773 | 6579, // OR16mr |
| 75774 | 6581, // OR16mr_EVEX |
| 75775 | 6583, // OR16mr_ND |
| 75776 | 6586, // OR16mr_NF |
| 75777 | 6588, // OR16mr_NF_ND |
| 75778 | 6591, // OR16ri |
| 75779 | 6594, // OR16ri8 |
| 75780 | 6597, // OR16ri8_EVEX |
| 75781 | 6600, // OR16ri8_ND |
| 75782 | 6603, // OR16ri8_NF |
| 75783 | 6606, // OR16ri8_NF_ND |
| 75784 | 6609, // OR16ri_EVEX |
| 75785 | 6612, // OR16ri_ND |
| 75786 | 6615, // OR16ri_NF |
| 75787 | 6618, // OR16ri_NF_ND |
| 75788 | 6621, // OR16rm |
| 75789 | 6624, // OR16rm_EVEX |
| 75790 | 6627, // OR16rm_ND |
| 75791 | 6630, // OR16rm_NF |
| 75792 | 6633, // OR16rm_NF_ND |
| 75793 | 6636, // OR16rr |
| 75794 | 6639, // OR16rr_EVEX |
| 75795 | 6642, // OR16rr_EVEX_REV |
| 75796 | 6645, // OR16rr_ND |
| 75797 | 6648, // OR16rr_ND_REV |
| 75798 | 6651, // OR16rr_NF |
| 75799 | 6654, // OR16rr_NF_ND |
| 75800 | 6657, // OR16rr_NF_ND_REV |
| 75801 | 6660, // OR16rr_NF_REV |
| 75802 | 6663, // OR16rr_REV |
| 75803 | 6666, // OR32i32 |
| 75804 | 6667, // OR32mi |
| 75805 | 6669, // OR32mi8 |
| 75806 | 6671, // OR32mi8Locked |
| 75807 | 6673, // OR32mi8_EVEX |
| 75808 | 6675, // OR32mi8_ND |
| 75809 | 6678, // OR32mi8_NF |
| 75810 | 6680, // OR32mi8_NF_ND |
| 75811 | 6683, // OR32mi_EVEX |
| 75812 | 6685, // OR32mi_ND |
| 75813 | 6688, // OR32mi_NF |
| 75814 | 6690, // OR32mi_NF_ND |
| 75815 | 6693, // OR32mr |
| 75816 | 6695, // OR32mr_EVEX |
| 75817 | 6697, // OR32mr_ND |
| 75818 | 6700, // OR32mr_NF |
| 75819 | 6702, // OR32mr_NF_ND |
| 75820 | 6705, // OR32ri |
| 75821 | 6708, // OR32ri8 |
| 75822 | 6711, // OR32ri8_EVEX |
| 75823 | 6714, // OR32ri8_ND |
| 75824 | 6717, // OR32ri8_NF |
| 75825 | 6720, // OR32ri8_NF_ND |
| 75826 | 6723, // OR32ri_EVEX |
| 75827 | 6726, // OR32ri_ND |
| 75828 | 6729, // OR32ri_NF |
| 75829 | 6732, // OR32ri_NF_ND |
| 75830 | 6735, // OR32rm |
| 75831 | 6738, // OR32rm_EVEX |
| 75832 | 6741, // OR32rm_ND |
| 75833 | 6744, // OR32rm_NF |
| 75834 | 6747, // OR32rm_NF_ND |
| 75835 | 6750, // OR32rr |
| 75836 | 6753, // OR32rr_EVEX |
| 75837 | 6756, // OR32rr_EVEX_REV |
| 75838 | 6759, // OR32rr_ND |
| 75839 | 6762, // OR32rr_ND_REV |
| 75840 | 6765, // OR32rr_NF |
| 75841 | 6768, // OR32rr_NF_ND |
| 75842 | 6771, // OR32rr_NF_ND_REV |
| 75843 | 6774, // OR32rr_NF_REV |
| 75844 | 6777, // OR32rr_REV |
| 75845 | 6780, // OR64i32 |
| 75846 | 6781, // OR64mi32 |
| 75847 | 6783, // OR64mi32_EVEX |
| 75848 | 6785, // OR64mi32_ND |
| 75849 | 6788, // OR64mi32_NF |
| 75850 | 6790, // OR64mi32_NF_ND |
| 75851 | 6793, // OR64mi8 |
| 75852 | 6795, // OR64mi8_EVEX |
| 75853 | 6797, // OR64mi8_ND |
| 75854 | 6800, // OR64mi8_NF |
| 75855 | 6802, // OR64mi8_NF_ND |
| 75856 | 6805, // OR64mr |
| 75857 | 6807, // OR64mr_EVEX |
| 75858 | 6809, // OR64mr_ND |
| 75859 | 6812, // OR64mr_NF |
| 75860 | 6814, // OR64mr_NF_ND |
| 75861 | 6817, // OR64ri32 |
| 75862 | 6820, // OR64ri32_EVEX |
| 75863 | 6823, // OR64ri32_ND |
| 75864 | 6826, // OR64ri32_NF |
| 75865 | 6829, // OR64ri32_NF_ND |
| 75866 | 6832, // OR64ri8 |
| 75867 | 6835, // OR64ri8_EVEX |
| 75868 | 6838, // OR64ri8_ND |
| 75869 | 6841, // OR64ri8_NF |
| 75870 | 6844, // OR64ri8_NF_ND |
| 75871 | 6847, // OR64rm |
| 75872 | 6850, // OR64rm_EVEX |
| 75873 | 6853, // OR64rm_ND |
| 75874 | 6856, // OR64rm_NF |
| 75875 | 6859, // OR64rm_NF_ND |
| 75876 | 6862, // OR64rr |
| 75877 | 6865, // OR64rr_EVEX |
| 75878 | 6868, // OR64rr_EVEX_REV |
| 75879 | 6871, // OR64rr_ND |
| 75880 | 6874, // OR64rr_ND_REV |
| 75881 | 6877, // OR64rr_NF |
| 75882 | 6880, // OR64rr_NF_ND |
| 75883 | 6883, // OR64rr_NF_ND_REV |
| 75884 | 6886, // OR64rr_NF_REV |
| 75885 | 6889, // OR64rr_REV |
| 75886 | 6892, // OR8i8 |
| 75887 | 6893, // OR8mi |
| 75888 | 6895, // OR8mi8 |
| 75889 | 6897, // OR8mi_EVEX |
| 75890 | 6899, // OR8mi_ND |
| 75891 | 6902, // OR8mi_NF |
| 75892 | 6904, // OR8mi_NF_ND |
| 75893 | 6907, // OR8mr |
| 75894 | 6909, // OR8mr_EVEX |
| 75895 | 6911, // OR8mr_ND |
| 75896 | 6914, // OR8mr_NF |
| 75897 | 6916, // OR8mr_NF_ND |
| 75898 | 6919, // OR8ri |
| 75899 | 6922, // OR8ri8 |
| 75900 | 6925, // OR8ri_EVEX |
| 75901 | 6928, // OR8ri_ND |
| 75902 | 6931, // OR8ri_NF |
| 75903 | 6934, // OR8ri_NF_ND |
| 75904 | 6937, // OR8rm |
| 75905 | 6940, // OR8rm_EVEX |
| 75906 | 6943, // OR8rm_ND |
| 75907 | 6946, // OR8rm_NF |
| 75908 | 6949, // OR8rm_NF_ND |
| 75909 | 6952, // OR8rr |
| 75910 | 6955, // OR8rr_EVEX |
| 75911 | 6958, // OR8rr_EVEX_REV |
| 75912 | 6961, // OR8rr_ND |
| 75913 | 6964, // OR8rr_ND_REV |
| 75914 | 6967, // OR8rr_NF |
| 75915 | 6970, // OR8rr_NF_ND |
| 75916 | 6973, // OR8rr_NF_ND_REV |
| 75917 | 6976, // OR8rr_NF_REV |
| 75918 | 6979, // OR8rr_REV |
| 75919 | 6982, // ORPDrm |
| 75920 | 6985, // ORPDrr |
| 75921 | 6988, // ORPSrm |
| 75922 | 6991, // ORPSrr |
| 75923 | 6994, // OUT16ir |
| 75924 | 6995, // OUT16rr |
| 75925 | 6995, // OUT32ir |
| 75926 | 6996, // OUT32rr |
| 75927 | 6996, // OUT8ir |
| 75928 | 6997, // OUT8rr |
| 75929 | 6997, // OUTSB |
| 75930 | 6998, // OUTSL |
| 75931 | 6999, // OUTSW |
| 75932 | 7000, // PABSBrm |
| 75933 | 7002, // PABSBrr |
| 75934 | 7004, // PABSDrm |
| 75935 | 7006, // PABSDrr |
| 75936 | 7008, // PABSWrm |
| 75937 | 7010, // PABSWrr |
| 75938 | 7012, // PACKSSDWrm |
| 75939 | 7015, // PACKSSDWrr |
| 75940 | 7018, // PACKSSWBrm |
| 75941 | 7021, // PACKSSWBrr |
| 75942 | 7024, // PACKUSDWrm |
| 75943 | 7027, // PACKUSDWrr |
| 75944 | 7030, // PACKUSWBrm |
| 75945 | 7033, // PACKUSWBrr |
| 75946 | 7036, // PADDBrm |
| 75947 | 7039, // PADDBrr |
| 75948 | 7042, // PADDDrm |
| 75949 | 7045, // PADDDrr |
| 75950 | 7048, // PADDQrm |
| 75951 | 7051, // PADDQrr |
| 75952 | 7054, // PADDSBrm |
| 75953 | 7057, // PADDSBrr |
| 75954 | 7060, // PADDSWrm |
| 75955 | 7063, // PADDSWrr |
| 75956 | 7066, // PADDUSBrm |
| 75957 | 7069, // PADDUSBrr |
| 75958 | 7072, // PADDUSWrm |
| 75959 | 7075, // PADDUSWrr |
| 75960 | 7078, // PADDWrm |
| 75961 | 7081, // PADDWrr |
| 75962 | 7084, // PALIGNRrmi |
| 75963 | 7088, // PALIGNRrri |
| 75964 | 7092, // PANDNrm |
| 75965 | 7095, // PANDNrr |
| 75966 | 7098, // PANDrm |
| 75967 | 7101, // PANDrr |
| 75968 | 7104, // PAUSE |
| 75969 | 7104, // PAVGBrm |
| 75970 | 7107, // PAVGBrr |
| 75971 | 7110, // PAVGUSBrm |
| 75972 | 7113, // PAVGUSBrr |
| 75973 | 7116, // PAVGWrm |
| 75974 | 7119, // PAVGWrr |
| 75975 | 7122, // PBLENDVBrm0 |
| 75976 | 7125, // PBLENDVBrr0 |
| 75977 | 7128, // PBLENDWrmi |
| 75978 | 7132, // PBLENDWrri |
| 75979 | 7136, // PBNDKB |
| 75980 | 7136, // PCLMULQDQrmi |
| 75981 | 7140, // PCLMULQDQrri |
| 75982 | 7144, // PCMPEQBrm |
| 75983 | 7147, // PCMPEQBrr |
| 75984 | 7150, // PCMPEQDrm |
| 75985 | 7153, // PCMPEQDrr |
| 75986 | 7156, // PCMPEQQrm |
| 75987 | 7159, // PCMPEQQrr |
| 75988 | 7162, // PCMPEQWrm |
| 75989 | 7165, // PCMPEQWrr |
| 75990 | 7168, // PCMPESTRIrmi |
| 75991 | 7171, // PCMPESTRIrri |
| 75992 | 7174, // PCMPESTRMrmi |
| 75993 | 7177, // PCMPESTRMrri |
| 75994 | 7180, // PCMPGTBrm |
| 75995 | 7183, // PCMPGTBrr |
| 75996 | 7186, // PCMPGTDrm |
| 75997 | 7189, // PCMPGTDrr |
| 75998 | 7192, // PCMPGTQrm |
| 75999 | 7195, // PCMPGTQrr |
| 76000 | 7198, // PCMPGTWrm |
| 76001 | 7201, // PCMPGTWrr |
| 76002 | 7204, // PCMPISTRIrmi |
| 76003 | 7207, // PCMPISTRIrri |
| 76004 | 7210, // PCMPISTRMrmi |
| 76005 | 7213, // PCMPISTRMrri |
| 76006 | 7216, // PCONFIG |
| 76007 | 7216, // PDEP32rm |
| 76008 | 7219, // PDEP32rm_EVEX |
| 76009 | 7222, // PDEP32rr |
| 76010 | 7225, // PDEP32rr_EVEX |
| 76011 | 7228, // PDEP64rm |
| 76012 | 7231, // PDEP64rm_EVEX |
| 76013 | 7234, // PDEP64rr |
| 76014 | 7237, // PDEP64rr_EVEX |
| 76015 | 7240, // PEXT32rm |
| 76016 | 7243, // PEXT32rm_EVEX |
| 76017 | 7246, // PEXT32rr |
| 76018 | 7249, // PEXT32rr_EVEX |
| 76019 | 7252, // PEXT64rm |
| 76020 | 7255, // PEXT64rm_EVEX |
| 76021 | 7258, // PEXT64rr |
| 76022 | 7261, // PEXT64rr_EVEX |
| 76023 | 7264, // PEXTRBmri |
| 76024 | 7267, // PEXTRBrri |
| 76025 | 7270, // PEXTRDmri |
| 76026 | 7273, // PEXTRDrri |
| 76027 | 7276, // PEXTRQmri |
| 76028 | 7279, // PEXTRQrri |
| 76029 | 7282, // PEXTRWmri |
| 76030 | 7285, // PEXTRWrri |
| 76031 | 7288, // PEXTRWrri_REV |
| 76032 | 7291, // PF2IDrm |
| 76033 | 7293, // PF2IDrr |
| 76034 | 7295, // PF2IWrm |
| 76035 | 7297, // PF2IWrr |
| 76036 | 7299, // PFACCrm |
| 76037 | 7302, // PFACCrr |
| 76038 | 7305, // PFADDrm |
| 76039 | 7308, // PFADDrr |
| 76040 | 7311, // PFCMPEQrm |
| 76041 | 7314, // PFCMPEQrr |
| 76042 | 7317, // PFCMPGErm |
| 76043 | 7320, // PFCMPGErr |
| 76044 | 7323, // PFCMPGTrm |
| 76045 | 7326, // PFCMPGTrr |
| 76046 | 7329, // PFMAXrm |
| 76047 | 7332, // PFMAXrr |
| 76048 | 7335, // PFMINrm |
| 76049 | 7338, // PFMINrr |
| 76050 | 7341, // PFMULrm |
| 76051 | 7344, // PFMULrr |
| 76052 | 7347, // PFNACCrm |
| 76053 | 7350, // PFNACCrr |
| 76054 | 7353, // PFPNACCrm |
| 76055 | 7356, // PFPNACCrr |
| 76056 | 7359, // PFRCPIT1rm |
| 76057 | 7362, // PFRCPIT1rr |
| 76058 | 7365, // PFRCPIT2rm |
| 76059 | 7368, // PFRCPIT2rr |
| 76060 | 7371, // PFRCPrm |
| 76061 | 7373, // PFRCPrr |
| 76062 | 7375, // PFRSQIT1rm |
| 76063 | 7378, // PFRSQIT1rr |
| 76064 | 7381, // PFRSQRTrm |
| 76065 | 7383, // PFRSQRTrr |
| 76066 | 7385, // PFSUBRrm |
| 76067 | 7388, // PFSUBRrr |
| 76068 | 7391, // PFSUBrm |
| 76069 | 7394, // PFSUBrr |
| 76070 | 7397, // PHADDDrm |
| 76071 | 7400, // PHADDDrr |
| 76072 | 7403, // PHADDSWrm |
| 76073 | 7406, // PHADDSWrr |
| 76074 | 7409, // PHADDWrm |
| 76075 | 7412, // PHADDWrr |
| 76076 | 7415, // PHMINPOSUWrm |
| 76077 | 7417, // PHMINPOSUWrr |
| 76078 | 7419, // PHSUBDrm |
| 76079 | 7422, // PHSUBDrr |
| 76080 | 7425, // PHSUBSWrm |
| 76081 | 7428, // PHSUBSWrr |
| 76082 | 7431, // PHSUBWrm |
| 76083 | 7434, // PHSUBWrr |
| 76084 | 7437, // PI2FDrm |
| 76085 | 7439, // PI2FDrr |
| 76086 | 7441, // PI2FWrm |
| 76087 | 7443, // PI2FWrr |
| 76088 | 7445, // PINSRBrmi |
| 76089 | 7449, // PINSRBrri |
| 76090 | 7453, // PINSRDrmi |
| 76091 | 7457, // PINSRDrri |
| 76092 | 7461, // PINSRQrmi |
| 76093 | 7465, // PINSRQrri |
| 76094 | 7469, // PINSRWrmi |
| 76095 | 7473, // PINSRWrri |
| 76096 | 7477, // PMADDUBSWrm |
| 76097 | 7480, // PMADDUBSWrr |
| 76098 | 7483, // PMADDWDrm |
| 76099 | 7486, // PMADDWDrr |
| 76100 | 7489, // PMAXSBrm |
| 76101 | 7492, // PMAXSBrr |
| 76102 | 7495, // PMAXSDrm |
| 76103 | 7498, // PMAXSDrr |
| 76104 | 7501, // PMAXSWrm |
| 76105 | 7504, // PMAXSWrr |
| 76106 | 7507, // PMAXUBrm |
| 76107 | 7510, // PMAXUBrr |
| 76108 | 7513, // PMAXUDrm |
| 76109 | 7516, // PMAXUDrr |
| 76110 | 7519, // PMAXUWrm |
| 76111 | 7522, // PMAXUWrr |
| 76112 | 7525, // PMINSBrm |
| 76113 | 7528, // PMINSBrr |
| 76114 | 7531, // PMINSDrm |
| 76115 | 7534, // PMINSDrr |
| 76116 | 7537, // PMINSWrm |
| 76117 | 7540, // PMINSWrr |
| 76118 | 7543, // PMINUBrm |
| 76119 | 7546, // PMINUBrr |
| 76120 | 7549, // PMINUDrm |
| 76121 | 7552, // PMINUDrr |
| 76122 | 7555, // PMINUWrm |
| 76123 | 7558, // PMINUWrr |
| 76124 | 7561, // PMOVMSKBrr |
| 76125 | 7563, // PMOVSXBDrm |
| 76126 | 7565, // PMOVSXBDrr |
| 76127 | 7567, // PMOVSXBQrm |
| 76128 | 7569, // PMOVSXBQrr |
| 76129 | 7571, // PMOVSXBWrm |
| 76130 | 7573, // PMOVSXBWrr |
| 76131 | 7575, // PMOVSXDQrm |
| 76132 | 7577, // PMOVSXDQrr |
| 76133 | 7579, // PMOVSXWDrm |
| 76134 | 7581, // PMOVSXWDrr |
| 76135 | 7583, // PMOVSXWQrm |
| 76136 | 7585, // PMOVSXWQrr |
| 76137 | 7587, // PMOVZXBDrm |
| 76138 | 7589, // PMOVZXBDrr |
| 76139 | 7591, // PMOVZXBQrm |
| 76140 | 7593, // PMOVZXBQrr |
| 76141 | 7595, // PMOVZXBWrm |
| 76142 | 7597, // PMOVZXBWrr |
| 76143 | 7599, // PMOVZXDQrm |
| 76144 | 7601, // PMOVZXDQrr |
| 76145 | 7603, // PMOVZXWDrm |
| 76146 | 7605, // PMOVZXWDrr |
| 76147 | 7607, // PMOVZXWQrm |
| 76148 | 7609, // PMOVZXWQrr |
| 76149 | 7611, // PMULDQrm |
| 76150 | 7614, // PMULDQrr |
| 76151 | 7617, // PMULHRSWrm |
| 76152 | 7620, // PMULHRSWrr |
| 76153 | 7623, // PMULHRWrm |
| 76154 | 7626, // PMULHRWrr |
| 76155 | 7629, // PMULHUWrm |
| 76156 | 7632, // PMULHUWrr |
| 76157 | 7635, // PMULHWrm |
| 76158 | 7638, // PMULHWrr |
| 76159 | 7641, // PMULLDrm |
| 76160 | 7644, // PMULLDrr |
| 76161 | 7647, // PMULLWrm |
| 76162 | 7650, // PMULLWrr |
| 76163 | 7653, // PMULUDQrm |
| 76164 | 7656, // PMULUDQrr |
| 76165 | 7659, // POP16r |
| 76166 | 7660, // POP16rmm |
| 76167 | 7661, // POP16rmr |
| 76168 | 7662, // POP2 |
| 76169 | 7664, // POP2P |
| 76170 | 7666, // POP32r |
| 76171 | 7667, // POP32rmm |
| 76172 | 7668, // POP32rmr |
| 76173 | 7669, // POP64r |
| 76174 | 7670, // POP64rmm |
| 76175 | 7671, // POP64rmr |
| 76176 | 7672, // POPA16 |
| 76177 | 7672, // POPA32 |
| 76178 | 7672, // POPCNT16rm |
| 76179 | 7674, // POPCNT16rm_EVEX |
| 76180 | 7676, // POPCNT16rm_NF |
| 76181 | 7678, // POPCNT16rr |
| 76182 | 7680, // POPCNT16rr_EVEX |
| 76183 | 7682, // POPCNT16rr_NF |
| 76184 | 7684, // POPCNT32rm |
| 76185 | 7686, // POPCNT32rm_EVEX |
| 76186 | 7688, // POPCNT32rm_NF |
| 76187 | 7690, // POPCNT32rr |
| 76188 | 7692, // POPCNT32rr_EVEX |
| 76189 | 7694, // POPCNT32rr_NF |
| 76190 | 7696, // POPCNT64rm |
| 76191 | 7698, // POPCNT64rm_EVEX |
| 76192 | 7700, // POPCNT64rm_NF |
| 76193 | 7702, // POPCNT64rr |
| 76194 | 7704, // POPCNT64rr_EVEX |
| 76195 | 7706, // POPCNT64rr_NF |
| 76196 | 7708, // POPDS16 |
| 76197 | 7708, // POPDS32 |
| 76198 | 7708, // POPES16 |
| 76199 | 7708, // POPES32 |
| 76200 | 7708, // POPF16 |
| 76201 | 7708, // POPF32 |
| 76202 | 7708, // POPF64 |
| 76203 | 7708, // POPFS16 |
| 76204 | 7708, // POPFS32 |
| 76205 | 7708, // POPFS64 |
| 76206 | 7708, // POPGS16 |
| 76207 | 7708, // POPGS32 |
| 76208 | 7708, // POPGS64 |
| 76209 | 7708, // POPP64r |
| 76210 | 7709, // POPSS16 |
| 76211 | 7709, // POPSS32 |
| 76212 | 7709, // PORrm |
| 76213 | 7712, // PORrr |
| 76214 | 7715, // PREFETCH |
| 76215 | 7716, // PREFETCHIT0 |
| 76216 | 7717, // PREFETCHIT1 |
| 76217 | 7718, // PREFETCHNTA |
| 76218 | 7719, // PREFETCHRST2 |
| 76219 | 7720, // PREFETCHT0 |
| 76220 | 7721, // PREFETCHT1 |
| 76221 | 7722, // PREFETCHT2 |
| 76222 | 7723, // PREFETCHW |
| 76223 | 7724, // PREFETCHWT1 |
| 76224 | 7725, // PROBED_ALLOCA_32 |
| 76225 | 7727, // PROBED_ALLOCA_64 |
| 76226 | 7729, // PSADBWrm |
| 76227 | 7732, // PSADBWrr |
| 76228 | 7735, // PSHUFBrm |
| 76229 | 7738, // PSHUFBrr |
| 76230 | 7741, // PSHUFDmi |
| 76231 | 7744, // PSHUFDri |
| 76232 | 7747, // PSHUFHWmi |
| 76233 | 7750, // PSHUFHWri |
| 76234 | 7753, // PSHUFLWmi |
| 76235 | 7756, // PSHUFLWri |
| 76236 | 7759, // PSIGNBrm |
| 76237 | 7762, // PSIGNBrr |
| 76238 | 7765, // PSIGNDrm |
| 76239 | 7768, // PSIGNDrr |
| 76240 | 7771, // PSIGNWrm |
| 76241 | 7774, // PSIGNWrr |
| 76242 | 7777, // PSLLDQri |
| 76243 | 7780, // PSLLDri |
| 76244 | 7783, // PSLLDrm |
| 76245 | 7786, // PSLLDrr |
| 76246 | 7789, // PSLLQri |
| 76247 | 7792, // PSLLQrm |
| 76248 | 7795, // PSLLQrr |
| 76249 | 7798, // PSLLWri |
| 76250 | 7801, // PSLLWrm |
| 76251 | 7804, // PSLLWrr |
| 76252 | 7807, // PSMASH |
| 76253 | 7807, // PSRADri |
| 76254 | 7810, // PSRADrm |
| 76255 | 7813, // PSRADrr |
| 76256 | 7816, // PSRAWri |
| 76257 | 7819, // PSRAWrm |
| 76258 | 7822, // PSRAWrr |
| 76259 | 7825, // PSRLDQri |
| 76260 | 7828, // PSRLDri |
| 76261 | 7831, // PSRLDrm |
| 76262 | 7834, // PSRLDrr |
| 76263 | 7837, // PSRLQri |
| 76264 | 7840, // PSRLQrm |
| 76265 | 7843, // PSRLQrr |
| 76266 | 7846, // PSRLWri |
| 76267 | 7849, // PSRLWrm |
| 76268 | 7852, // PSRLWrr |
| 76269 | 7855, // PSUBBrm |
| 76270 | 7858, // PSUBBrr |
| 76271 | 7861, // PSUBDrm |
| 76272 | 7864, // PSUBDrr |
| 76273 | 7867, // PSUBQrm |
| 76274 | 7870, // PSUBQrr |
| 76275 | 7873, // PSUBSBrm |
| 76276 | 7876, // PSUBSBrr |
| 76277 | 7879, // PSUBSWrm |
| 76278 | 7882, // PSUBSWrr |
| 76279 | 7885, // PSUBUSBrm |
| 76280 | 7888, // PSUBUSBrr |
| 76281 | 7891, // PSUBUSWrm |
| 76282 | 7894, // PSUBUSWrr |
| 76283 | 7897, // PSUBWrm |
| 76284 | 7900, // PSUBWrr |
| 76285 | 7903, // PSWAPDrm |
| 76286 | 7905, // PSWAPDrr |
| 76287 | 7907, // PT2RPNTLVWZ0 |
| 76288 | 7909, // PT2RPNTLVWZ0RS |
| 76289 | 7911, // PT2RPNTLVWZ0RST1 |
| 76290 | 7913, // PT2RPNTLVWZ0T1 |
| 76291 | 7915, // PT2RPNTLVWZ1 |
| 76292 | 7917, // PT2RPNTLVWZ1RS |
| 76293 | 7919, // PT2RPNTLVWZ1RST1 |
| 76294 | 7921, // PT2RPNTLVWZ1T1 |
| 76295 | 7923, // PTCMMIMFP16PS |
| 76296 | 7926, // PTCMMIMFP16PSV |
| 76297 | 7933, // PTCMMRLFP16PS |
| 76298 | 7936, // PTCMMRLFP16PSV |
| 76299 | 7943, // PTCONJTCMMIMFP16PS |
| 76300 | 7946, // PTCONJTCMMIMFP16PSV |
| 76301 | 7953, // PTCONJTFP16 |
| 76302 | 7955, // PTCONJTFP16V |
| 76303 | 7959, // PTCVTROWD2PSrre |
| 76304 | 7962, // PTCVTROWD2PSrreV |
| 76305 | 7967, // PTCVTROWD2PSrri |
| 76306 | 7970, // PTCVTROWD2PSrriV |
| 76307 | 7975, // PTCVTROWPS2BF16Hrre |
| 76308 | 7978, // PTCVTROWPS2BF16HrreV |
| 76309 | 7983, // PTCVTROWPS2BF16Hrri |
| 76310 | 7986, // PTCVTROWPS2BF16HrriV |
| 76311 | 7991, // PTCVTROWPS2BF16Lrre |
| 76312 | 7994, // PTCVTROWPS2BF16LrreV |
| 76313 | 7999, // PTCVTROWPS2BF16Lrri |
| 76314 | 8002, // PTCVTROWPS2BF16LrriV |
| 76315 | 8007, // PTCVTROWPS2PHHrre |
| 76316 | 8010, // PTCVTROWPS2PHHrreV |
| 76317 | 8015, // PTCVTROWPS2PHHrri |
| 76318 | 8018, // PTCVTROWPS2PHHrriV |
| 76319 | 8023, // PTCVTROWPS2PHLrre |
| 76320 | 8026, // PTCVTROWPS2PHLrreV |
| 76321 | 8031, // PTCVTROWPS2PHLrri |
| 76322 | 8034, // PTCVTROWPS2PHLrriV |
| 76323 | 8039, // PTDPBF16PS |
| 76324 | 8042, // PTDPBF8PS |
| 76325 | 8045, // PTDPBF8PSV |
| 76326 | 8052, // PTDPBHF8PS |
| 76327 | 8055, // PTDPBHF8PSV |
| 76328 | 8062, // PTDPBSSD |
| 76329 | 8065, // PTDPBSUD |
| 76330 | 8068, // PTDPBUSD |
| 76331 | 8071, // PTDPBUUD |
| 76332 | 8074, // PTDPFP16PS |
| 76333 | 8077, // PTDPHBF8PS |
| 76334 | 8080, // PTDPHBF8PSV |
| 76335 | 8087, // PTDPHF8PS |
| 76336 | 8090, // PTDPHF8PSV |
| 76337 | 8097, // PTESTrm |
| 76338 | 8099, // PTESTrr |
| 76339 | 8101, // PTILELOADD |
| 76340 | 8103, // PTILELOADDRS |
| 76341 | 8105, // PTILELOADDRST1 |
| 76342 | 8107, // PTILELOADDT1 |
| 76343 | 8109, // PTILEMOVROWrre |
| 76344 | 8112, // PTILEMOVROWrreV |
| 76345 | 8117, // PTILEMOVROWrri |
| 76346 | 8120, // PTILEMOVROWrriV |
| 76347 | 8125, // PTILESTORED |
| 76348 | 8127, // PTILEZERO |
| 76349 | 8128, // PTMMULTF32PS |
| 76350 | 8131, // PTMMULTF32PSV |
| 76351 | 8138, // PTTCMMIMFP16PS |
| 76352 | 8141, // PTTCMMIMFP16PSV |
| 76353 | 8148, // PTTCMMRLFP16PS |
| 76354 | 8151, // PTTCMMRLFP16PSV |
| 76355 | 8158, // PTTDPBF16PS |
| 76356 | 8161, // PTTDPBF16PSV |
| 76357 | 8168, // PTTDPFP16PS |
| 76358 | 8171, // PTTDPFP16PSV |
| 76359 | 8178, // PTTMMULTF32PS |
| 76360 | 8181, // PTTMMULTF32PSV |
| 76361 | 8188, // PTTRANSPOSED |
| 76362 | 8190, // PTTRANSPOSEDV |
| 76363 | 8194, // PTWRITE64m |
| 76364 | 8195, // PTWRITE64r |
| 76365 | 8196, // PTWRITEm |
| 76366 | 8197, // PTWRITEr |
| 76367 | 8198, // PUNPCKHBWrm |
| 76368 | 8201, // PUNPCKHBWrr |
| 76369 | 8204, // PUNPCKHDQrm |
| 76370 | 8207, // PUNPCKHDQrr |
| 76371 | 8210, // PUNPCKHQDQrm |
| 76372 | 8213, // PUNPCKHQDQrr |
| 76373 | 8216, // PUNPCKHWDrm |
| 76374 | 8219, // PUNPCKHWDrr |
| 76375 | 8222, // PUNPCKLBWrm |
| 76376 | 8225, // PUNPCKLBWrr |
| 76377 | 8228, // PUNPCKLDQrm |
| 76378 | 8231, // PUNPCKLDQrr |
| 76379 | 8234, // PUNPCKLQDQrm |
| 76380 | 8237, // PUNPCKLQDQrr |
| 76381 | 8240, // PUNPCKLWDrm |
| 76382 | 8243, // PUNPCKLWDrr |
| 76383 | 8246, // PUSH16i |
| 76384 | 8247, // PUSH16i8 |
| 76385 | 8248, // PUSH16r |
| 76386 | 8249, // PUSH16rmm |
| 76387 | 8250, // PUSH16rmr |
| 76388 | 8251, // PUSH2 |
| 76389 | 8253, // PUSH2P |
| 76390 | 8255, // PUSH32i |
| 76391 | 8256, // PUSH32i8 |
| 76392 | 8257, // PUSH32r |
| 76393 | 8258, // PUSH32rmm |
| 76394 | 8259, // PUSH32rmr |
| 76395 | 8260, // PUSH64i32 |
| 76396 | 8261, // PUSH64i8 |
| 76397 | 8262, // PUSH64r |
| 76398 | 8263, // PUSH64rmm |
| 76399 | 8264, // PUSH64rmr |
| 76400 | 8265, // PUSHA16 |
| 76401 | 8265, // PUSHA32 |
| 76402 | 8265, // PUSHCS16 |
| 76403 | 8265, // PUSHCS32 |
| 76404 | 8265, // PUSHDS16 |
| 76405 | 8265, // PUSHDS32 |
| 76406 | 8265, // PUSHES16 |
| 76407 | 8265, // PUSHES32 |
| 76408 | 8265, // PUSHF16 |
| 76409 | 8265, // PUSHF32 |
| 76410 | 8265, // PUSHF64 |
| 76411 | 8265, // PUSHFS16 |
| 76412 | 8265, // PUSHFS32 |
| 76413 | 8265, // PUSHFS64 |
| 76414 | 8265, // PUSHGS16 |
| 76415 | 8265, // PUSHGS32 |
| 76416 | 8265, // PUSHGS64 |
| 76417 | 8265, // PUSHP64r |
| 76418 | 8266, // PUSHSS16 |
| 76419 | 8266, // PUSHSS32 |
| 76420 | 8266, // PVALIDATE32 |
| 76421 | 8266, // PVALIDATE64 |
| 76422 | 8266, // PXORrm |
| 76423 | 8269, // PXORrr |
| 76424 | 8272, // RCL16m1 |
| 76425 | 8273, // RCL16m1_EVEX |
| 76426 | 8274, // RCL16m1_ND |
| 76427 | 8276, // RCL16mCL |
| 76428 | 8277, // RCL16mCL_EVEX |
| 76429 | 8278, // RCL16mCL_ND |
| 76430 | 8280, // RCL16mi |
| 76431 | 8282, // RCL16mi_EVEX |
| 76432 | 8284, // RCL16mi_ND |
| 76433 | 8287, // RCL16r1 |
| 76434 | 8289, // RCL16r1_EVEX |
| 76435 | 8291, // RCL16r1_ND |
| 76436 | 8293, // RCL16rCL |
| 76437 | 8295, // RCL16rCL_EVEX |
| 76438 | 8297, // RCL16rCL_ND |
| 76439 | 8299, // RCL16ri |
| 76440 | 8302, // RCL16ri_EVEX |
| 76441 | 8305, // RCL16ri_ND |
| 76442 | 8308, // RCL32m1 |
| 76443 | 8309, // RCL32m1_EVEX |
| 76444 | 8310, // RCL32m1_ND |
| 76445 | 8312, // RCL32mCL |
| 76446 | 8313, // RCL32mCL_EVEX |
| 76447 | 8314, // RCL32mCL_ND |
| 76448 | 8316, // RCL32mi |
| 76449 | 8318, // RCL32mi_EVEX |
| 76450 | 8320, // RCL32mi_ND |
| 76451 | 8323, // RCL32r1 |
| 76452 | 8325, // RCL32r1_EVEX |
| 76453 | 8327, // RCL32r1_ND |
| 76454 | 8329, // RCL32rCL |
| 76455 | 8331, // RCL32rCL_EVEX |
| 76456 | 8333, // RCL32rCL_ND |
| 76457 | 8335, // RCL32ri |
| 76458 | 8338, // RCL32ri_EVEX |
| 76459 | 8341, // RCL32ri_ND |
| 76460 | 8344, // RCL64m1 |
| 76461 | 8345, // RCL64m1_EVEX |
| 76462 | 8346, // RCL64m1_ND |
| 76463 | 8348, // RCL64mCL |
| 76464 | 8349, // RCL64mCL_EVEX |
| 76465 | 8350, // RCL64mCL_ND |
| 76466 | 8352, // RCL64mi |
| 76467 | 8354, // RCL64mi_EVEX |
| 76468 | 8356, // RCL64mi_ND |
| 76469 | 8359, // RCL64r1 |
| 76470 | 8361, // RCL64r1_EVEX |
| 76471 | 8363, // RCL64r1_ND |
| 76472 | 8365, // RCL64rCL |
| 76473 | 8367, // RCL64rCL_EVEX |
| 76474 | 8369, // RCL64rCL_ND |
| 76475 | 8371, // RCL64ri |
| 76476 | 8374, // RCL64ri_EVEX |
| 76477 | 8377, // RCL64ri_ND |
| 76478 | 8380, // RCL8m1 |
| 76479 | 8381, // RCL8m1_EVEX |
| 76480 | 8382, // RCL8m1_ND |
| 76481 | 8384, // RCL8mCL |
| 76482 | 8385, // RCL8mCL_EVEX |
| 76483 | 8386, // RCL8mCL_ND |
| 76484 | 8388, // RCL8mi |
| 76485 | 8390, // RCL8mi_EVEX |
| 76486 | 8392, // RCL8mi_ND |
| 76487 | 8395, // RCL8r1 |
| 76488 | 8397, // RCL8r1_EVEX |
| 76489 | 8399, // RCL8r1_ND |
| 76490 | 8401, // RCL8rCL |
| 76491 | 8403, // RCL8rCL_EVEX |
| 76492 | 8405, // RCL8rCL_ND |
| 76493 | 8407, // RCL8ri |
| 76494 | 8410, // RCL8ri_EVEX |
| 76495 | 8413, // RCL8ri_ND |
| 76496 | 8416, // RCPPSm |
| 76497 | 8418, // RCPPSr |
| 76498 | 8420, // RCPSSm |
| 76499 | 8422, // RCPSSm_Int |
| 76500 | 8425, // RCPSSr |
| 76501 | 8427, // RCPSSr_Int |
| 76502 | 8430, // RCR16m1 |
| 76503 | 8431, // RCR16m1_EVEX |
| 76504 | 8432, // RCR16m1_ND |
| 76505 | 8434, // RCR16mCL |
| 76506 | 8435, // RCR16mCL_EVEX |
| 76507 | 8436, // RCR16mCL_ND |
| 76508 | 8438, // RCR16mi |
| 76509 | 8440, // RCR16mi_EVEX |
| 76510 | 8442, // RCR16mi_ND |
| 76511 | 8445, // RCR16r1 |
| 76512 | 8447, // RCR16r1_EVEX |
| 76513 | 8449, // RCR16r1_ND |
| 76514 | 8451, // RCR16rCL |
| 76515 | 8453, // RCR16rCL_EVEX |
| 76516 | 8455, // RCR16rCL_ND |
| 76517 | 8457, // RCR16ri |
| 76518 | 8460, // RCR16ri_EVEX |
| 76519 | 8463, // RCR16ri_ND |
| 76520 | 8466, // RCR32m1 |
| 76521 | 8467, // RCR32m1_EVEX |
| 76522 | 8468, // RCR32m1_ND |
| 76523 | 8470, // RCR32mCL |
| 76524 | 8471, // RCR32mCL_EVEX |
| 76525 | 8472, // RCR32mCL_ND |
| 76526 | 8474, // RCR32mi |
| 76527 | 8476, // RCR32mi_EVEX |
| 76528 | 8478, // RCR32mi_ND |
| 76529 | 8481, // RCR32r1 |
| 76530 | 8483, // RCR32r1_EVEX |
| 76531 | 8485, // RCR32r1_ND |
| 76532 | 8487, // RCR32rCL |
| 76533 | 8489, // RCR32rCL_EVEX |
| 76534 | 8491, // RCR32rCL_ND |
| 76535 | 8493, // RCR32ri |
| 76536 | 8496, // RCR32ri_EVEX |
| 76537 | 8499, // RCR32ri_ND |
| 76538 | 8502, // RCR64m1 |
| 76539 | 8503, // RCR64m1_EVEX |
| 76540 | 8504, // RCR64m1_ND |
| 76541 | 8506, // RCR64mCL |
| 76542 | 8507, // RCR64mCL_EVEX |
| 76543 | 8508, // RCR64mCL_ND |
| 76544 | 8510, // RCR64mi |
| 76545 | 8512, // RCR64mi_EVEX |
| 76546 | 8514, // RCR64mi_ND |
| 76547 | 8517, // RCR64r1 |
| 76548 | 8519, // RCR64r1_EVEX |
| 76549 | 8521, // RCR64r1_ND |
| 76550 | 8523, // RCR64rCL |
| 76551 | 8525, // RCR64rCL_EVEX |
| 76552 | 8527, // RCR64rCL_ND |
| 76553 | 8529, // RCR64ri |
| 76554 | 8532, // RCR64ri_EVEX |
| 76555 | 8535, // RCR64ri_ND |
| 76556 | 8538, // RCR8m1 |
| 76557 | 8539, // RCR8m1_EVEX |
| 76558 | 8540, // RCR8m1_ND |
| 76559 | 8542, // RCR8mCL |
| 76560 | 8543, // RCR8mCL_EVEX |
| 76561 | 8544, // RCR8mCL_ND |
| 76562 | 8546, // RCR8mi |
| 76563 | 8548, // RCR8mi_EVEX |
| 76564 | 8550, // RCR8mi_ND |
| 76565 | 8553, // RCR8r1 |
| 76566 | 8555, // RCR8r1_EVEX |
| 76567 | 8557, // RCR8r1_ND |
| 76568 | 8559, // RCR8rCL |
| 76569 | 8561, // RCR8rCL_EVEX |
| 76570 | 8563, // RCR8rCL_ND |
| 76571 | 8565, // RCR8ri |
| 76572 | 8568, // RCR8ri_EVEX |
| 76573 | 8571, // RCR8ri_ND |
| 76574 | 8574, // RDFSBASE |
| 76575 | 8575, // RDFSBASE64 |
| 76576 | 8576, // RDGSBASE |
| 76577 | 8577, // RDGSBASE64 |
| 76578 | 8578, // RDMSR |
| 76579 | 8578, // RDMSRLIST |
| 76580 | 8578, // RDMSRri |
| 76581 | 8580, // RDMSRri_EVEX |
| 76582 | 8582, // RDPID32 |
| 76583 | 8583, // RDPID64 |
| 76584 | 8584, // RDPKRUr |
| 76585 | 8584, // RDPMC |
| 76586 | 8584, // RDPRU |
| 76587 | 8584, // RDRAND16r |
| 76588 | 8585, // RDRAND32r |
| 76589 | 8586, // RDRAND64r |
| 76590 | 8587, // RDSEED16r |
| 76591 | 8588, // RDSEED32r |
| 76592 | 8589, // RDSEED64r |
| 76593 | 8590, // RDSSPD |
| 76594 | 8592, // RDSSPQ |
| 76595 | 8594, // RDTSC |
| 76596 | 8594, // RDTSCP |
| 76597 | 8594, // REPNE_PREFIX |
| 76598 | 8594, // REP_MOVSB_32 |
| 76599 | 8594, // REP_MOVSB_64 |
| 76600 | 8594, // REP_MOVSD_32 |
| 76601 | 8594, // REP_MOVSD_64 |
| 76602 | 8594, // REP_MOVSQ_32 |
| 76603 | 8594, // REP_MOVSQ_64 |
| 76604 | 8594, // REP_MOVSW_32 |
| 76605 | 8594, // REP_MOVSW_64 |
| 76606 | 8594, // REP_PREFIX |
| 76607 | 8594, // REP_STOSB_32 |
| 76608 | 8594, // REP_STOSB_64 |
| 76609 | 8594, // REP_STOSD_32 |
| 76610 | 8594, // REP_STOSD_64 |
| 76611 | 8594, // REP_STOSQ_32 |
| 76612 | 8594, // REP_STOSQ_64 |
| 76613 | 8594, // REP_STOSW_32 |
| 76614 | 8594, // REP_STOSW_64 |
| 76615 | 8594, // RET |
| 76616 | 8595, // RET16 |
| 76617 | 8595, // RET32 |
| 76618 | 8595, // RET64 |
| 76619 | 8595, // RETI16 |
| 76620 | 8596, // RETI32 |
| 76621 | 8597, // RETI64 |
| 76622 | 8598, // REX64_PREFIX |
| 76623 | 8598, // RMPADJUST |
| 76624 | 8598, // RMPQUERY |
| 76625 | 8598, // RMPUPDATE |
| 76626 | 8598, // ROL16m1 |
| 76627 | 8599, // ROL16m1_EVEX |
| 76628 | 8600, // ROL16m1_ND |
| 76629 | 8602, // ROL16m1_NF |
| 76630 | 8603, // ROL16m1_NF_ND |
| 76631 | 8605, // ROL16mCL |
| 76632 | 8606, // ROL16mCL_EVEX |
| 76633 | 8607, // ROL16mCL_ND |
| 76634 | 8609, // ROL16mCL_NF |
| 76635 | 8610, // ROL16mCL_NF_ND |
| 76636 | 8612, // ROL16mi |
| 76637 | 8614, // ROL16mi_EVEX |
| 76638 | 8616, // ROL16mi_ND |
| 76639 | 8619, // ROL16mi_NF |
| 76640 | 8621, // ROL16mi_NF_ND |
| 76641 | 8624, // ROL16r1 |
| 76642 | 8626, // ROL16r1_EVEX |
| 76643 | 8628, // ROL16r1_ND |
| 76644 | 8630, // ROL16r1_NF |
| 76645 | 8632, // ROL16r1_NF_ND |
| 76646 | 8634, // ROL16rCL |
| 76647 | 8636, // ROL16rCL_EVEX |
| 76648 | 8638, // ROL16rCL_ND |
| 76649 | 8640, // ROL16rCL_NF |
| 76650 | 8642, // ROL16rCL_NF_ND |
| 76651 | 8644, // ROL16ri |
| 76652 | 8647, // ROL16ri_EVEX |
| 76653 | 8650, // ROL16ri_ND |
| 76654 | 8653, // ROL16ri_NF |
| 76655 | 8656, // ROL16ri_NF_ND |
| 76656 | 8659, // ROL32m1 |
| 76657 | 8660, // ROL32m1_EVEX |
| 76658 | 8661, // ROL32m1_ND |
| 76659 | 8663, // ROL32m1_NF |
| 76660 | 8664, // ROL32m1_NF_ND |
| 76661 | 8666, // ROL32mCL |
| 76662 | 8667, // ROL32mCL_EVEX |
| 76663 | 8668, // ROL32mCL_ND |
| 76664 | 8670, // ROL32mCL_NF |
| 76665 | 8671, // ROL32mCL_NF_ND |
| 76666 | 8673, // ROL32mi |
| 76667 | 8675, // ROL32mi_EVEX |
| 76668 | 8677, // ROL32mi_ND |
| 76669 | 8680, // ROL32mi_NF |
| 76670 | 8682, // ROL32mi_NF_ND |
| 76671 | 8685, // ROL32r1 |
| 76672 | 8687, // ROL32r1_EVEX |
| 76673 | 8689, // ROL32r1_ND |
| 76674 | 8691, // ROL32r1_NF |
| 76675 | 8693, // ROL32r1_NF_ND |
| 76676 | 8695, // ROL32rCL |
| 76677 | 8697, // ROL32rCL_EVEX |
| 76678 | 8699, // ROL32rCL_ND |
| 76679 | 8701, // ROL32rCL_NF |
| 76680 | 8703, // ROL32rCL_NF_ND |
| 76681 | 8705, // ROL32ri |
| 76682 | 8708, // ROL32ri_EVEX |
| 76683 | 8711, // ROL32ri_ND |
| 76684 | 8714, // ROL32ri_NF |
| 76685 | 8717, // ROL32ri_NF_ND |
| 76686 | 8720, // ROL64m1 |
| 76687 | 8721, // ROL64m1_EVEX |
| 76688 | 8722, // ROL64m1_ND |
| 76689 | 8724, // ROL64m1_NF |
| 76690 | 8725, // ROL64m1_NF_ND |
| 76691 | 8727, // ROL64mCL |
| 76692 | 8728, // ROL64mCL_EVEX |
| 76693 | 8729, // ROL64mCL_ND |
| 76694 | 8731, // ROL64mCL_NF |
| 76695 | 8732, // ROL64mCL_NF_ND |
| 76696 | 8734, // ROL64mi |
| 76697 | 8736, // ROL64mi_EVEX |
| 76698 | 8738, // ROL64mi_ND |
| 76699 | 8741, // ROL64mi_NF |
| 76700 | 8743, // ROL64mi_NF_ND |
| 76701 | 8746, // ROL64r1 |
| 76702 | 8748, // ROL64r1_EVEX |
| 76703 | 8750, // ROL64r1_ND |
| 76704 | 8752, // ROL64r1_NF |
| 76705 | 8754, // ROL64r1_NF_ND |
| 76706 | 8756, // ROL64rCL |
| 76707 | 8758, // ROL64rCL_EVEX |
| 76708 | 8760, // ROL64rCL_ND |
| 76709 | 8762, // ROL64rCL_NF |
| 76710 | 8764, // ROL64rCL_NF_ND |
| 76711 | 8766, // ROL64ri |
| 76712 | 8769, // ROL64ri_EVEX |
| 76713 | 8772, // ROL64ri_ND |
| 76714 | 8775, // ROL64ri_NF |
| 76715 | 8778, // ROL64ri_NF_ND |
| 76716 | 8781, // ROL8m1 |
| 76717 | 8782, // ROL8m1_EVEX |
| 76718 | 8783, // ROL8m1_ND |
| 76719 | 8785, // ROL8m1_NF |
| 76720 | 8786, // ROL8m1_NF_ND |
| 76721 | 8788, // ROL8mCL |
| 76722 | 8789, // ROL8mCL_EVEX |
| 76723 | 8790, // ROL8mCL_ND |
| 76724 | 8792, // ROL8mCL_NF |
| 76725 | 8793, // ROL8mCL_NF_ND |
| 76726 | 8795, // ROL8mi |
| 76727 | 8797, // ROL8mi_EVEX |
| 76728 | 8799, // ROL8mi_ND |
| 76729 | 8802, // ROL8mi_NF |
| 76730 | 8804, // ROL8mi_NF_ND |
| 76731 | 8807, // ROL8r1 |
| 76732 | 8809, // ROL8r1_EVEX |
| 76733 | 8811, // ROL8r1_ND |
| 76734 | 8813, // ROL8r1_NF |
| 76735 | 8815, // ROL8r1_NF_ND |
| 76736 | 8817, // ROL8rCL |
| 76737 | 8819, // ROL8rCL_EVEX |
| 76738 | 8821, // ROL8rCL_ND |
| 76739 | 8823, // ROL8rCL_NF |
| 76740 | 8825, // ROL8rCL_NF_ND |
| 76741 | 8827, // ROL8ri |
| 76742 | 8830, // ROL8ri_EVEX |
| 76743 | 8833, // ROL8ri_ND |
| 76744 | 8836, // ROL8ri_NF |
| 76745 | 8839, // ROL8ri_NF_ND |
| 76746 | 8842, // ROR16m1 |
| 76747 | 8843, // ROR16m1_EVEX |
| 76748 | 8844, // ROR16m1_ND |
| 76749 | 8846, // ROR16m1_NF |
| 76750 | 8847, // ROR16m1_NF_ND |
| 76751 | 8849, // ROR16mCL |
| 76752 | 8850, // ROR16mCL_EVEX |
| 76753 | 8851, // ROR16mCL_ND |
| 76754 | 8853, // ROR16mCL_NF |
| 76755 | 8854, // ROR16mCL_NF_ND |
| 76756 | 8856, // ROR16mi |
| 76757 | 8858, // ROR16mi_EVEX |
| 76758 | 8860, // ROR16mi_ND |
| 76759 | 8863, // ROR16mi_NF |
| 76760 | 8865, // ROR16mi_NF_ND |
| 76761 | 8868, // ROR16r1 |
| 76762 | 8870, // ROR16r1_EVEX |
| 76763 | 8872, // ROR16r1_ND |
| 76764 | 8874, // ROR16r1_NF |
| 76765 | 8876, // ROR16r1_NF_ND |
| 76766 | 8878, // ROR16rCL |
| 76767 | 8880, // ROR16rCL_EVEX |
| 76768 | 8882, // ROR16rCL_ND |
| 76769 | 8884, // ROR16rCL_NF |
| 76770 | 8886, // ROR16rCL_NF_ND |
| 76771 | 8888, // ROR16ri |
| 76772 | 8891, // ROR16ri_EVEX |
| 76773 | 8894, // ROR16ri_ND |
| 76774 | 8897, // ROR16ri_NF |
| 76775 | 8900, // ROR16ri_NF_ND |
| 76776 | 8903, // ROR32m1 |
| 76777 | 8904, // ROR32m1_EVEX |
| 76778 | 8905, // ROR32m1_ND |
| 76779 | 8907, // ROR32m1_NF |
| 76780 | 8908, // ROR32m1_NF_ND |
| 76781 | 8910, // ROR32mCL |
| 76782 | 8911, // ROR32mCL_EVEX |
| 76783 | 8912, // ROR32mCL_ND |
| 76784 | 8914, // ROR32mCL_NF |
| 76785 | 8915, // ROR32mCL_NF_ND |
| 76786 | 8917, // ROR32mi |
| 76787 | 8919, // ROR32mi_EVEX |
| 76788 | 8921, // ROR32mi_ND |
| 76789 | 8924, // ROR32mi_NF |
| 76790 | 8926, // ROR32mi_NF_ND |
| 76791 | 8929, // ROR32r1 |
| 76792 | 8931, // ROR32r1_EVEX |
| 76793 | 8933, // ROR32r1_ND |
| 76794 | 8935, // ROR32r1_NF |
| 76795 | 8937, // ROR32r1_NF_ND |
| 76796 | 8939, // ROR32rCL |
| 76797 | 8941, // ROR32rCL_EVEX |
| 76798 | 8943, // ROR32rCL_ND |
| 76799 | 8945, // ROR32rCL_NF |
| 76800 | 8947, // ROR32rCL_NF_ND |
| 76801 | 8949, // ROR32ri |
| 76802 | 8952, // ROR32ri_EVEX |
| 76803 | 8955, // ROR32ri_ND |
| 76804 | 8958, // ROR32ri_NF |
| 76805 | 8961, // ROR32ri_NF_ND |
| 76806 | 8964, // ROR64m1 |
| 76807 | 8965, // ROR64m1_EVEX |
| 76808 | 8966, // ROR64m1_ND |
| 76809 | 8968, // ROR64m1_NF |
| 76810 | 8969, // ROR64m1_NF_ND |
| 76811 | 8971, // ROR64mCL |
| 76812 | 8972, // ROR64mCL_EVEX |
| 76813 | 8973, // ROR64mCL_ND |
| 76814 | 8975, // ROR64mCL_NF |
| 76815 | 8976, // ROR64mCL_NF_ND |
| 76816 | 8978, // ROR64mi |
| 76817 | 8980, // ROR64mi_EVEX |
| 76818 | 8982, // ROR64mi_ND |
| 76819 | 8985, // ROR64mi_NF |
| 76820 | 8987, // ROR64mi_NF_ND |
| 76821 | 8990, // ROR64r1 |
| 76822 | 8992, // ROR64r1_EVEX |
| 76823 | 8994, // ROR64r1_ND |
| 76824 | 8996, // ROR64r1_NF |
| 76825 | 8998, // ROR64r1_NF_ND |
| 76826 | 9000, // ROR64rCL |
| 76827 | 9002, // ROR64rCL_EVEX |
| 76828 | 9004, // ROR64rCL_ND |
| 76829 | 9006, // ROR64rCL_NF |
| 76830 | 9008, // ROR64rCL_NF_ND |
| 76831 | 9010, // ROR64ri |
| 76832 | 9013, // ROR64ri_EVEX |
| 76833 | 9016, // ROR64ri_ND |
| 76834 | 9019, // ROR64ri_NF |
| 76835 | 9022, // ROR64ri_NF_ND |
| 76836 | 9025, // ROR8m1 |
| 76837 | 9026, // ROR8m1_EVEX |
| 76838 | 9027, // ROR8m1_ND |
| 76839 | 9029, // ROR8m1_NF |
| 76840 | 9030, // ROR8m1_NF_ND |
| 76841 | 9032, // ROR8mCL |
| 76842 | 9033, // ROR8mCL_EVEX |
| 76843 | 9034, // ROR8mCL_ND |
| 76844 | 9036, // ROR8mCL_NF |
| 76845 | 9037, // ROR8mCL_NF_ND |
| 76846 | 9039, // ROR8mi |
| 76847 | 9041, // ROR8mi_EVEX |
| 76848 | 9043, // ROR8mi_ND |
| 76849 | 9046, // ROR8mi_NF |
| 76850 | 9048, // ROR8mi_NF_ND |
| 76851 | 9051, // ROR8r1 |
| 76852 | 9053, // ROR8r1_EVEX |
| 76853 | 9055, // ROR8r1_ND |
| 76854 | 9057, // ROR8r1_NF |
| 76855 | 9059, // ROR8r1_NF_ND |
| 76856 | 9061, // ROR8rCL |
| 76857 | 9063, // ROR8rCL_EVEX |
| 76858 | 9065, // ROR8rCL_ND |
| 76859 | 9067, // ROR8rCL_NF |
| 76860 | 9069, // ROR8rCL_NF_ND |
| 76861 | 9071, // ROR8ri |
| 76862 | 9074, // ROR8ri_EVEX |
| 76863 | 9077, // ROR8ri_ND |
| 76864 | 9080, // ROR8ri_NF |
| 76865 | 9083, // ROR8ri_NF_ND |
| 76866 | 9086, // RORX32mi |
| 76867 | 9089, // RORX32mi_EVEX |
| 76868 | 9092, // RORX32ri |
| 76869 | 9095, // RORX32ri_EVEX |
| 76870 | 9098, // RORX64mi |
| 76871 | 9101, // RORX64mi_EVEX |
| 76872 | 9104, // RORX64ri |
| 76873 | 9107, // RORX64ri_EVEX |
| 76874 | 9110, // ROUNDPDmi |
| 76875 | 9113, // ROUNDPDri |
| 76876 | 9116, // ROUNDPSmi |
| 76877 | 9119, // ROUNDPSri |
| 76878 | 9122, // ROUNDSDmi |
| 76879 | 9125, // ROUNDSDmi_Int |
| 76880 | 9129, // ROUNDSDri |
| 76881 | 9132, // ROUNDSDri_Int |
| 76882 | 9136, // ROUNDSSmi |
| 76883 | 9139, // ROUNDSSmi_Int |
| 76884 | 9143, // ROUNDSSri |
| 76885 | 9146, // ROUNDSSri_Int |
| 76886 | 9150, // RSM |
| 76887 | 9150, // RSQRTPSm |
| 76888 | 9152, // RSQRTPSr |
| 76889 | 9154, // RSQRTSSm |
| 76890 | 9156, // RSQRTSSm_Int |
| 76891 | 9159, // RSQRTSSr |
| 76892 | 9161, // RSQRTSSr_Int |
| 76893 | 9164, // RSTORSSP |
| 76894 | 9165, // SAHF |
| 76895 | 9165, // SALC |
| 76896 | 9165, // SAR16m1 |
| 76897 | 9166, // SAR16m1_EVEX |
| 76898 | 9167, // SAR16m1_ND |
| 76899 | 9169, // SAR16m1_NF |
| 76900 | 9170, // SAR16m1_NF_ND |
| 76901 | 9172, // SAR16mCL |
| 76902 | 9173, // SAR16mCL_EVEX |
| 76903 | 9174, // SAR16mCL_ND |
| 76904 | 9176, // SAR16mCL_NF |
| 76905 | 9177, // SAR16mCL_NF_ND |
| 76906 | 9179, // SAR16mi |
| 76907 | 9181, // SAR16mi_EVEX |
| 76908 | 9183, // SAR16mi_ND |
| 76909 | 9186, // SAR16mi_NF |
| 76910 | 9188, // SAR16mi_NF_ND |
| 76911 | 9191, // SAR16r1 |
| 76912 | 9193, // SAR16r1_EVEX |
| 76913 | 9195, // SAR16r1_ND |
| 76914 | 9197, // SAR16r1_NF |
| 76915 | 9199, // SAR16r1_NF_ND |
| 76916 | 9201, // SAR16rCL |
| 76917 | 9203, // SAR16rCL_EVEX |
| 76918 | 9205, // SAR16rCL_ND |
| 76919 | 9207, // SAR16rCL_NF |
| 76920 | 9209, // SAR16rCL_NF_ND |
| 76921 | 9211, // SAR16ri |
| 76922 | 9214, // SAR16ri_EVEX |
| 76923 | 9217, // SAR16ri_ND |
| 76924 | 9220, // SAR16ri_NF |
| 76925 | 9223, // SAR16ri_NF_ND |
| 76926 | 9226, // SAR32m1 |
| 76927 | 9227, // SAR32m1_EVEX |
| 76928 | 9228, // SAR32m1_ND |
| 76929 | 9230, // SAR32m1_NF |
| 76930 | 9231, // SAR32m1_NF_ND |
| 76931 | 9233, // SAR32mCL |
| 76932 | 9234, // SAR32mCL_EVEX |
| 76933 | 9235, // SAR32mCL_ND |
| 76934 | 9237, // SAR32mCL_NF |
| 76935 | 9238, // SAR32mCL_NF_ND |
| 76936 | 9240, // SAR32mi |
| 76937 | 9242, // SAR32mi_EVEX |
| 76938 | 9244, // SAR32mi_ND |
| 76939 | 9247, // SAR32mi_NF |
| 76940 | 9249, // SAR32mi_NF_ND |
| 76941 | 9252, // SAR32r1 |
| 76942 | 9254, // SAR32r1_EVEX |
| 76943 | 9256, // SAR32r1_ND |
| 76944 | 9258, // SAR32r1_NF |
| 76945 | 9260, // SAR32r1_NF_ND |
| 76946 | 9262, // SAR32rCL |
| 76947 | 9264, // SAR32rCL_EVEX |
| 76948 | 9266, // SAR32rCL_ND |
| 76949 | 9268, // SAR32rCL_NF |
| 76950 | 9270, // SAR32rCL_NF_ND |
| 76951 | 9272, // SAR32ri |
| 76952 | 9275, // SAR32ri_EVEX |
| 76953 | 9278, // SAR32ri_ND |
| 76954 | 9281, // SAR32ri_NF |
| 76955 | 9284, // SAR32ri_NF_ND |
| 76956 | 9287, // SAR64m1 |
| 76957 | 9288, // SAR64m1_EVEX |
| 76958 | 9289, // SAR64m1_ND |
| 76959 | 9291, // SAR64m1_NF |
| 76960 | 9292, // SAR64m1_NF_ND |
| 76961 | 9294, // SAR64mCL |
| 76962 | 9295, // SAR64mCL_EVEX |
| 76963 | 9296, // SAR64mCL_ND |
| 76964 | 9298, // SAR64mCL_NF |
| 76965 | 9299, // SAR64mCL_NF_ND |
| 76966 | 9301, // SAR64mi |
| 76967 | 9303, // SAR64mi_EVEX |
| 76968 | 9305, // SAR64mi_ND |
| 76969 | 9308, // SAR64mi_NF |
| 76970 | 9310, // SAR64mi_NF_ND |
| 76971 | 9313, // SAR64r1 |
| 76972 | 9315, // SAR64r1_EVEX |
| 76973 | 9317, // SAR64r1_ND |
| 76974 | 9319, // SAR64r1_NF |
| 76975 | 9321, // SAR64r1_NF_ND |
| 76976 | 9323, // SAR64rCL |
| 76977 | 9325, // SAR64rCL_EVEX |
| 76978 | 9327, // SAR64rCL_ND |
| 76979 | 9329, // SAR64rCL_NF |
| 76980 | 9331, // SAR64rCL_NF_ND |
| 76981 | 9333, // SAR64ri |
| 76982 | 9336, // SAR64ri_EVEX |
| 76983 | 9339, // SAR64ri_ND |
| 76984 | 9342, // SAR64ri_NF |
| 76985 | 9345, // SAR64ri_NF_ND |
| 76986 | 9348, // SAR8m1 |
| 76987 | 9349, // SAR8m1_EVEX |
| 76988 | 9350, // SAR8m1_ND |
| 76989 | 9352, // SAR8m1_NF |
| 76990 | 9353, // SAR8m1_NF_ND |
| 76991 | 9355, // SAR8mCL |
| 76992 | 9356, // SAR8mCL_EVEX |
| 76993 | 9357, // SAR8mCL_ND |
| 76994 | 9359, // SAR8mCL_NF |
| 76995 | 9360, // SAR8mCL_NF_ND |
| 76996 | 9362, // SAR8mi |
| 76997 | 9364, // SAR8mi_EVEX |
| 76998 | 9366, // SAR8mi_ND |
| 76999 | 9369, // SAR8mi_NF |
| 77000 | 9371, // SAR8mi_NF_ND |
| 77001 | 9374, // SAR8r1 |
| 77002 | 9376, // SAR8r1_EVEX |
| 77003 | 9378, // SAR8r1_ND |
| 77004 | 9380, // SAR8r1_NF |
| 77005 | 9382, // SAR8r1_NF_ND |
| 77006 | 9384, // SAR8rCL |
| 77007 | 9386, // SAR8rCL_EVEX |
| 77008 | 9388, // SAR8rCL_ND |
| 77009 | 9390, // SAR8rCL_NF |
| 77010 | 9392, // SAR8rCL_NF_ND |
| 77011 | 9394, // SAR8ri |
| 77012 | 9397, // SAR8ri_EVEX |
| 77013 | 9400, // SAR8ri_ND |
| 77014 | 9403, // SAR8ri_NF |
| 77015 | 9406, // SAR8ri_NF_ND |
| 77016 | 9409, // SARX32rm |
| 77017 | 9412, // SARX32rm_EVEX |
| 77018 | 9415, // SARX32rr |
| 77019 | 9418, // SARX32rr_EVEX |
| 77020 | 9421, // SARX64rm |
| 77021 | 9424, // SARX64rm_EVEX |
| 77022 | 9427, // SARX64rr |
| 77023 | 9430, // SARX64rr_EVEX |
| 77024 | 9433, // SAVEPREVSSP |
| 77025 | 9433, // SBB16i16 |
| 77026 | 9434, // SBB16mi |
| 77027 | 9436, // SBB16mi8 |
| 77028 | 9438, // SBB16mi8_EVEX |
| 77029 | 9440, // SBB16mi8_ND |
| 77030 | 9443, // SBB16mi_EVEX |
| 77031 | 9445, // SBB16mi_ND |
| 77032 | 9448, // SBB16mr |
| 77033 | 9450, // SBB16mr_EVEX |
| 77034 | 9452, // SBB16mr_ND |
| 77035 | 9455, // SBB16ri |
| 77036 | 9458, // SBB16ri8 |
| 77037 | 9461, // SBB16ri8_EVEX |
| 77038 | 9464, // SBB16ri8_ND |
| 77039 | 9467, // SBB16ri_EVEX |
| 77040 | 9470, // SBB16ri_ND |
| 77041 | 9473, // SBB16rm |
| 77042 | 9476, // SBB16rm_EVEX |
| 77043 | 9479, // SBB16rm_ND |
| 77044 | 9482, // SBB16rr |
| 77045 | 9485, // SBB16rr_EVEX |
| 77046 | 9488, // SBB16rr_EVEX_REV |
| 77047 | 9491, // SBB16rr_ND |
| 77048 | 9494, // SBB16rr_ND_REV |
| 77049 | 9497, // SBB16rr_REV |
| 77050 | 9500, // SBB32i32 |
| 77051 | 9501, // SBB32mi |
| 77052 | 9503, // SBB32mi8 |
| 77053 | 9505, // SBB32mi8_EVEX |
| 77054 | 9507, // SBB32mi8_ND |
| 77055 | 9510, // SBB32mi_EVEX |
| 77056 | 9512, // SBB32mi_ND |
| 77057 | 9515, // SBB32mr |
| 77058 | 9517, // SBB32mr_EVEX |
| 77059 | 9519, // SBB32mr_ND |
| 77060 | 9522, // SBB32ri |
| 77061 | 9525, // SBB32ri8 |
| 77062 | 9528, // SBB32ri8_EVEX |
| 77063 | 9531, // SBB32ri8_ND |
| 77064 | 9534, // SBB32ri_EVEX |
| 77065 | 9537, // SBB32ri_ND |
| 77066 | 9540, // SBB32rm |
| 77067 | 9543, // SBB32rm_EVEX |
| 77068 | 9546, // SBB32rm_ND |
| 77069 | 9549, // SBB32rr |
| 77070 | 9552, // SBB32rr_EVEX |
| 77071 | 9555, // SBB32rr_EVEX_REV |
| 77072 | 9558, // SBB32rr_ND |
| 77073 | 9561, // SBB32rr_ND_REV |
| 77074 | 9564, // SBB32rr_REV |
| 77075 | 9567, // SBB64i32 |
| 77076 | 9568, // SBB64mi32 |
| 77077 | 9570, // SBB64mi32_EVEX |
| 77078 | 9572, // SBB64mi32_ND |
| 77079 | 9575, // SBB64mi8 |
| 77080 | 9577, // SBB64mi8_EVEX |
| 77081 | 9579, // SBB64mi8_ND |
| 77082 | 9582, // SBB64mr |
| 77083 | 9584, // SBB64mr_EVEX |
| 77084 | 9586, // SBB64mr_ND |
| 77085 | 9589, // SBB64ri32 |
| 77086 | 9592, // SBB64ri32_EVEX |
| 77087 | 9595, // SBB64ri32_ND |
| 77088 | 9598, // SBB64ri8 |
| 77089 | 9601, // SBB64ri8_EVEX |
| 77090 | 9604, // SBB64ri8_ND |
| 77091 | 9607, // SBB64rm |
| 77092 | 9610, // SBB64rm_EVEX |
| 77093 | 9613, // SBB64rm_ND |
| 77094 | 9616, // SBB64rr |
| 77095 | 9619, // SBB64rr_EVEX |
| 77096 | 9622, // SBB64rr_EVEX_REV |
| 77097 | 9625, // SBB64rr_ND |
| 77098 | 9628, // SBB64rr_ND_REV |
| 77099 | 9631, // SBB64rr_REV |
| 77100 | 9634, // SBB8i8 |
| 77101 | 9635, // SBB8mi |
| 77102 | 9637, // SBB8mi8 |
| 77103 | 9639, // SBB8mi_EVEX |
| 77104 | 9641, // SBB8mi_ND |
| 77105 | 9644, // SBB8mr |
| 77106 | 9646, // SBB8mr_EVEX |
| 77107 | 9648, // SBB8mr_ND |
| 77108 | 9651, // SBB8ri |
| 77109 | 9654, // SBB8ri8 |
| 77110 | 9657, // SBB8ri_EVEX |
| 77111 | 9660, // SBB8ri_ND |
| 77112 | 9663, // SBB8rm |
| 77113 | 9666, // SBB8rm_EVEX |
| 77114 | 9669, // SBB8rm_ND |
| 77115 | 9672, // SBB8rr |
| 77116 | 9675, // SBB8rr_EVEX |
| 77117 | 9678, // SBB8rr_EVEX_REV |
| 77118 | 9681, // SBB8rr_ND |
| 77119 | 9684, // SBB8rr_ND_REV |
| 77120 | 9687, // SBB8rr_REV |
| 77121 | 9690, // SCASB |
| 77122 | 9691, // SCASL |
| 77123 | 9692, // SCASQ |
| 77124 | 9693, // SCASW |
| 77125 | 9694, // SEAMCALL |
| 77126 | 9694, // SEAMOPS |
| 77127 | 9694, // SEAMRET |
| 77128 | 9694, // SEG_ALLOCA_32 |
| 77129 | 9696, // SEG_ALLOCA_64 |
| 77130 | 9698, // SENDUIPI |
| 77131 | 9699, // SERIALIZE |
| 77132 | 9699, // SETCCm |
| 77133 | 9701, // SETCCm_EVEX |
| 77134 | 9703, // SETCCr |
| 77135 | 9705, // SETCCr_EVEX |
| 77136 | 9707, // SETSSBSY |
| 77137 | 9707, // SETZUCCm |
| 77138 | 9709, // SETZUCCr |
| 77139 | 9711, // SFENCE |
| 77140 | 9711, // SGDT16m |
| 77141 | 9712, // SGDT32m |
| 77142 | 9713, // SGDT64m |
| 77143 | 9714, // SHA1MSG1rm |
| 77144 | 9717, // SHA1MSG1rr |
| 77145 | 9720, // SHA1MSG2rm |
| 77146 | 9723, // SHA1MSG2rr |
| 77147 | 9726, // SHA1NEXTErm |
| 77148 | 9729, // SHA1NEXTErr |
| 77149 | 9732, // SHA1RNDS4rmi |
| 77150 | 9736, // SHA1RNDS4rri |
| 77151 | 9740, // SHA256MSG1rm |
| 77152 | 9743, // SHA256MSG1rr |
| 77153 | 9746, // SHA256MSG2rm |
| 77154 | 9749, // SHA256MSG2rr |
| 77155 | 9752, // SHA256RNDS2rm |
| 77156 | 9755, // SHA256RNDS2rr |
| 77157 | 9758, // SHL16m1 |
| 77158 | 9759, // SHL16m1_EVEX |
| 77159 | 9760, // SHL16m1_ND |
| 77160 | 9762, // SHL16m1_NF |
| 77161 | 9763, // SHL16m1_NF_ND |
| 77162 | 9765, // SHL16mCL |
| 77163 | 9766, // SHL16mCL_EVEX |
| 77164 | 9767, // SHL16mCL_ND |
| 77165 | 9769, // SHL16mCL_NF |
| 77166 | 9770, // SHL16mCL_NF_ND |
| 77167 | 9772, // SHL16mi |
| 77168 | 9774, // SHL16mi_EVEX |
| 77169 | 9776, // SHL16mi_ND |
| 77170 | 9779, // SHL16mi_NF |
| 77171 | 9781, // SHL16mi_NF_ND |
| 77172 | 9784, // SHL16r1 |
| 77173 | 9786, // SHL16r1_EVEX |
| 77174 | 9788, // SHL16r1_ND |
| 77175 | 9790, // SHL16r1_NF |
| 77176 | 9792, // SHL16r1_NF_ND |
| 77177 | 9794, // SHL16rCL |
| 77178 | 9796, // SHL16rCL_EVEX |
| 77179 | 9798, // SHL16rCL_ND |
| 77180 | 9800, // SHL16rCL_NF |
| 77181 | 9802, // SHL16rCL_NF_ND |
| 77182 | 9804, // SHL16ri |
| 77183 | 9807, // SHL16ri_EVEX |
| 77184 | 9810, // SHL16ri_ND |
| 77185 | 9813, // SHL16ri_NF |
| 77186 | 9816, // SHL16ri_NF_ND |
| 77187 | 9819, // SHL32m1 |
| 77188 | 9820, // SHL32m1_EVEX |
| 77189 | 9821, // SHL32m1_ND |
| 77190 | 9823, // SHL32m1_NF |
| 77191 | 9824, // SHL32m1_NF_ND |
| 77192 | 9826, // SHL32mCL |
| 77193 | 9827, // SHL32mCL_EVEX |
| 77194 | 9828, // SHL32mCL_ND |
| 77195 | 9830, // SHL32mCL_NF |
| 77196 | 9831, // SHL32mCL_NF_ND |
| 77197 | 9833, // SHL32mi |
| 77198 | 9835, // SHL32mi_EVEX |
| 77199 | 9837, // SHL32mi_ND |
| 77200 | 9840, // SHL32mi_NF |
| 77201 | 9842, // SHL32mi_NF_ND |
| 77202 | 9845, // SHL32r1 |
| 77203 | 9847, // SHL32r1_EVEX |
| 77204 | 9849, // SHL32r1_ND |
| 77205 | 9851, // SHL32r1_NF |
| 77206 | 9853, // SHL32r1_NF_ND |
| 77207 | 9855, // SHL32rCL |
| 77208 | 9857, // SHL32rCL_EVEX |
| 77209 | 9859, // SHL32rCL_ND |
| 77210 | 9861, // SHL32rCL_NF |
| 77211 | 9863, // SHL32rCL_NF_ND |
| 77212 | 9865, // SHL32ri |
| 77213 | 9868, // SHL32ri_EVEX |
| 77214 | 9871, // SHL32ri_ND |
| 77215 | 9874, // SHL32ri_NF |
| 77216 | 9877, // SHL32ri_NF_ND |
| 77217 | 9880, // SHL64m1 |
| 77218 | 9881, // SHL64m1_EVEX |
| 77219 | 9882, // SHL64m1_ND |
| 77220 | 9884, // SHL64m1_NF |
| 77221 | 9885, // SHL64m1_NF_ND |
| 77222 | 9887, // SHL64mCL |
| 77223 | 9888, // SHL64mCL_EVEX |
| 77224 | 9889, // SHL64mCL_ND |
| 77225 | 9891, // SHL64mCL_NF |
| 77226 | 9892, // SHL64mCL_NF_ND |
| 77227 | 9894, // SHL64mi |
| 77228 | 9896, // SHL64mi_EVEX |
| 77229 | 9898, // SHL64mi_ND |
| 77230 | 9901, // SHL64mi_NF |
| 77231 | 9903, // SHL64mi_NF_ND |
| 77232 | 9906, // SHL64r1 |
| 77233 | 9908, // SHL64r1_EVEX |
| 77234 | 9910, // SHL64r1_ND |
| 77235 | 9912, // SHL64r1_NF |
| 77236 | 9914, // SHL64r1_NF_ND |
| 77237 | 9916, // SHL64rCL |
| 77238 | 9918, // SHL64rCL_EVEX |
| 77239 | 9920, // SHL64rCL_ND |
| 77240 | 9922, // SHL64rCL_NF |
| 77241 | 9924, // SHL64rCL_NF_ND |
| 77242 | 9926, // SHL64ri |
| 77243 | 9929, // SHL64ri_EVEX |
| 77244 | 9932, // SHL64ri_ND |
| 77245 | 9935, // SHL64ri_NF |
| 77246 | 9938, // SHL64ri_NF_ND |
| 77247 | 9941, // SHL8m1 |
| 77248 | 9942, // SHL8m1_EVEX |
| 77249 | 9943, // SHL8m1_ND |
| 77250 | 9945, // SHL8m1_NF |
| 77251 | 9946, // SHL8m1_NF_ND |
| 77252 | 9948, // SHL8mCL |
| 77253 | 9949, // SHL8mCL_EVEX |
| 77254 | 9950, // SHL8mCL_ND |
| 77255 | 9952, // SHL8mCL_NF |
| 77256 | 9953, // SHL8mCL_NF_ND |
| 77257 | 9955, // SHL8mi |
| 77258 | 9957, // SHL8mi_EVEX |
| 77259 | 9959, // SHL8mi_ND |
| 77260 | 9962, // SHL8mi_NF |
| 77261 | 9964, // SHL8mi_NF_ND |
| 77262 | 9967, // SHL8r1 |
| 77263 | 9969, // SHL8r1_EVEX |
| 77264 | 9971, // SHL8r1_ND |
| 77265 | 9973, // SHL8r1_NF |
| 77266 | 9975, // SHL8r1_NF_ND |
| 77267 | 9977, // SHL8rCL |
| 77268 | 9979, // SHL8rCL_EVEX |
| 77269 | 9981, // SHL8rCL_ND |
| 77270 | 9983, // SHL8rCL_NF |
| 77271 | 9985, // SHL8rCL_NF_ND |
| 77272 | 9987, // SHL8ri |
| 77273 | 9990, // SHL8ri_EVEX |
| 77274 | 9993, // SHL8ri_ND |
| 77275 | 9996, // SHL8ri_NF |
| 77276 | 9999, // SHL8ri_NF_ND |
| 77277 | 10002, // SHLD16mrCL |
| 77278 | 10004, // SHLD16mrCL_EVEX |
| 77279 | 10006, // SHLD16mrCL_ND |
| 77280 | 10009, // SHLD16mrCL_NF |
| 77281 | 10011, // SHLD16mrCL_NF_ND |
| 77282 | 10014, // SHLD16mri8 |
| 77283 | 10017, // SHLD16mri8_EVEX |
| 77284 | 10020, // SHLD16mri8_ND |
| 77285 | 10024, // SHLD16mri8_NF |
| 77286 | 10027, // SHLD16mri8_NF_ND |
| 77287 | 10031, // SHLD16rrCL |
| 77288 | 10034, // SHLD16rrCL_EVEX |
| 77289 | 10037, // SHLD16rrCL_ND |
| 77290 | 10040, // SHLD16rrCL_NF |
| 77291 | 10043, // SHLD16rrCL_NF_ND |
| 77292 | 10046, // SHLD16rri8 |
| 77293 | 10050, // SHLD16rri8_EVEX |
| 77294 | 10054, // SHLD16rri8_ND |
| 77295 | 10058, // SHLD16rri8_NF |
| 77296 | 10062, // SHLD16rri8_NF_ND |
| 77297 | 10066, // SHLD32mrCL |
| 77298 | 10068, // SHLD32mrCL_EVEX |
| 77299 | 10070, // SHLD32mrCL_ND |
| 77300 | 10073, // SHLD32mrCL_NF |
| 77301 | 10075, // SHLD32mrCL_NF_ND |
| 77302 | 10078, // SHLD32mri8 |
| 77303 | 10081, // SHLD32mri8_EVEX |
| 77304 | 10084, // SHLD32mri8_ND |
| 77305 | 10088, // SHLD32mri8_NF |
| 77306 | 10091, // SHLD32mri8_NF_ND |
| 77307 | 10095, // SHLD32rrCL |
| 77308 | 10098, // SHLD32rrCL_EVEX |
| 77309 | 10101, // SHLD32rrCL_ND |
| 77310 | 10104, // SHLD32rrCL_NF |
| 77311 | 10107, // SHLD32rrCL_NF_ND |
| 77312 | 10110, // SHLD32rri8 |
| 77313 | 10114, // SHLD32rri8_EVEX |
| 77314 | 10118, // SHLD32rri8_ND |
| 77315 | 10122, // SHLD32rri8_NF |
| 77316 | 10126, // SHLD32rri8_NF_ND |
| 77317 | 10130, // SHLD64mrCL |
| 77318 | 10132, // SHLD64mrCL_EVEX |
| 77319 | 10134, // SHLD64mrCL_ND |
| 77320 | 10137, // SHLD64mrCL_NF |
| 77321 | 10139, // SHLD64mrCL_NF_ND |
| 77322 | 10142, // SHLD64mri8 |
| 77323 | 10145, // SHLD64mri8_EVEX |
| 77324 | 10148, // SHLD64mri8_ND |
| 77325 | 10152, // SHLD64mri8_NF |
| 77326 | 10155, // SHLD64mri8_NF_ND |
| 77327 | 10159, // SHLD64rrCL |
| 77328 | 10162, // SHLD64rrCL_EVEX |
| 77329 | 10165, // SHLD64rrCL_ND |
| 77330 | 10168, // SHLD64rrCL_NF |
| 77331 | 10171, // SHLD64rrCL_NF_ND |
| 77332 | 10174, // SHLD64rri8 |
| 77333 | 10178, // SHLD64rri8_EVEX |
| 77334 | 10182, // SHLD64rri8_ND |
| 77335 | 10186, // SHLD64rri8_NF |
| 77336 | 10190, // SHLD64rri8_NF_ND |
| 77337 | 10194, // SHLX32rm |
| 77338 | 10197, // SHLX32rm_EVEX |
| 77339 | 10200, // SHLX32rr |
| 77340 | 10203, // SHLX32rr_EVEX |
| 77341 | 10206, // SHLX64rm |
| 77342 | 10209, // SHLX64rm_EVEX |
| 77343 | 10212, // SHLX64rr |
| 77344 | 10215, // SHLX64rr_EVEX |
| 77345 | 10218, // SHR16m1 |
| 77346 | 10219, // SHR16m1_EVEX |
| 77347 | 10220, // SHR16m1_ND |
| 77348 | 10222, // SHR16m1_NF |
| 77349 | 10223, // SHR16m1_NF_ND |
| 77350 | 10225, // SHR16mCL |
| 77351 | 10226, // SHR16mCL_EVEX |
| 77352 | 10227, // SHR16mCL_ND |
| 77353 | 10229, // SHR16mCL_NF |
| 77354 | 10230, // SHR16mCL_NF_ND |
| 77355 | 10232, // SHR16mi |
| 77356 | 10234, // SHR16mi_EVEX |
| 77357 | 10236, // SHR16mi_ND |
| 77358 | 10239, // SHR16mi_NF |
| 77359 | 10241, // SHR16mi_NF_ND |
| 77360 | 10244, // SHR16r1 |
| 77361 | 10246, // SHR16r1_EVEX |
| 77362 | 10248, // SHR16r1_ND |
| 77363 | 10250, // SHR16r1_NF |
| 77364 | 10252, // SHR16r1_NF_ND |
| 77365 | 10254, // SHR16rCL |
| 77366 | 10256, // SHR16rCL_EVEX |
| 77367 | 10258, // SHR16rCL_ND |
| 77368 | 10260, // SHR16rCL_NF |
| 77369 | 10262, // SHR16rCL_NF_ND |
| 77370 | 10264, // SHR16ri |
| 77371 | 10267, // SHR16ri_EVEX |
| 77372 | 10270, // SHR16ri_ND |
| 77373 | 10273, // SHR16ri_NF |
| 77374 | 10276, // SHR16ri_NF_ND |
| 77375 | 10279, // SHR32m1 |
| 77376 | 10280, // SHR32m1_EVEX |
| 77377 | 10281, // SHR32m1_ND |
| 77378 | 10283, // SHR32m1_NF |
| 77379 | 10284, // SHR32m1_NF_ND |
| 77380 | 10286, // SHR32mCL |
| 77381 | 10287, // SHR32mCL_EVEX |
| 77382 | 10288, // SHR32mCL_ND |
| 77383 | 10290, // SHR32mCL_NF |
| 77384 | 10291, // SHR32mCL_NF_ND |
| 77385 | 10293, // SHR32mi |
| 77386 | 10295, // SHR32mi_EVEX |
| 77387 | 10297, // SHR32mi_ND |
| 77388 | 10300, // SHR32mi_NF |
| 77389 | 10302, // SHR32mi_NF_ND |
| 77390 | 10305, // SHR32r1 |
| 77391 | 10307, // SHR32r1_EVEX |
| 77392 | 10309, // SHR32r1_ND |
| 77393 | 10311, // SHR32r1_NF |
| 77394 | 10313, // SHR32r1_NF_ND |
| 77395 | 10315, // SHR32rCL |
| 77396 | 10317, // SHR32rCL_EVEX |
| 77397 | 10319, // SHR32rCL_ND |
| 77398 | 10321, // SHR32rCL_NF |
| 77399 | 10323, // SHR32rCL_NF_ND |
| 77400 | 10325, // SHR32ri |
| 77401 | 10328, // SHR32ri_EVEX |
| 77402 | 10331, // SHR32ri_ND |
| 77403 | 10334, // SHR32ri_NF |
| 77404 | 10337, // SHR32ri_NF_ND |
| 77405 | 10340, // SHR64m1 |
| 77406 | 10341, // SHR64m1_EVEX |
| 77407 | 10342, // SHR64m1_ND |
| 77408 | 10344, // SHR64m1_NF |
| 77409 | 10345, // SHR64m1_NF_ND |
| 77410 | 10347, // SHR64mCL |
| 77411 | 10348, // SHR64mCL_EVEX |
| 77412 | 10349, // SHR64mCL_ND |
| 77413 | 10351, // SHR64mCL_NF |
| 77414 | 10352, // SHR64mCL_NF_ND |
| 77415 | 10354, // SHR64mi |
| 77416 | 10356, // SHR64mi_EVEX |
| 77417 | 10358, // SHR64mi_ND |
| 77418 | 10361, // SHR64mi_NF |
| 77419 | 10363, // SHR64mi_NF_ND |
| 77420 | 10366, // SHR64r1 |
| 77421 | 10368, // SHR64r1_EVEX |
| 77422 | 10370, // SHR64r1_ND |
| 77423 | 10372, // SHR64r1_NF |
| 77424 | 10374, // SHR64r1_NF_ND |
| 77425 | 10376, // SHR64rCL |
| 77426 | 10378, // SHR64rCL_EVEX |
| 77427 | 10380, // SHR64rCL_ND |
| 77428 | 10382, // SHR64rCL_NF |
| 77429 | 10384, // SHR64rCL_NF_ND |
| 77430 | 10386, // SHR64ri |
| 77431 | 10389, // SHR64ri_EVEX |
| 77432 | 10392, // SHR64ri_ND |
| 77433 | 10395, // SHR64ri_NF |
| 77434 | 10398, // SHR64ri_NF_ND |
| 77435 | 10401, // SHR8m1 |
| 77436 | 10402, // SHR8m1_EVEX |
| 77437 | 10403, // SHR8m1_ND |
| 77438 | 10405, // SHR8m1_NF |
| 77439 | 10406, // SHR8m1_NF_ND |
| 77440 | 10408, // SHR8mCL |
| 77441 | 10409, // SHR8mCL_EVEX |
| 77442 | 10410, // SHR8mCL_ND |
| 77443 | 10412, // SHR8mCL_NF |
| 77444 | 10413, // SHR8mCL_NF_ND |
| 77445 | 10415, // SHR8mi |
| 77446 | 10417, // SHR8mi_EVEX |
| 77447 | 10419, // SHR8mi_ND |
| 77448 | 10422, // SHR8mi_NF |
| 77449 | 10424, // SHR8mi_NF_ND |
| 77450 | 10427, // SHR8r1 |
| 77451 | 10429, // SHR8r1_EVEX |
| 77452 | 10431, // SHR8r1_ND |
| 77453 | 10433, // SHR8r1_NF |
| 77454 | 10435, // SHR8r1_NF_ND |
| 77455 | 10437, // SHR8rCL |
| 77456 | 10439, // SHR8rCL_EVEX |
| 77457 | 10441, // SHR8rCL_ND |
| 77458 | 10443, // SHR8rCL_NF |
| 77459 | 10445, // SHR8rCL_NF_ND |
| 77460 | 10447, // SHR8ri |
| 77461 | 10450, // SHR8ri_EVEX |
| 77462 | 10453, // SHR8ri_ND |
| 77463 | 10456, // SHR8ri_NF |
| 77464 | 10459, // SHR8ri_NF_ND |
| 77465 | 10462, // SHRD16mrCL |
| 77466 | 10464, // SHRD16mrCL_EVEX |
| 77467 | 10466, // SHRD16mrCL_ND |
| 77468 | 10469, // SHRD16mrCL_NF |
| 77469 | 10471, // SHRD16mrCL_NF_ND |
| 77470 | 10474, // SHRD16mri8 |
| 77471 | 10477, // SHRD16mri8_EVEX |
| 77472 | 10480, // SHRD16mri8_ND |
| 77473 | 10484, // SHRD16mri8_NF |
| 77474 | 10487, // SHRD16mri8_NF_ND |
| 77475 | 10491, // SHRD16rrCL |
| 77476 | 10494, // SHRD16rrCL_EVEX |
| 77477 | 10497, // SHRD16rrCL_ND |
| 77478 | 10500, // SHRD16rrCL_NF |
| 77479 | 10503, // SHRD16rrCL_NF_ND |
| 77480 | 10506, // SHRD16rri8 |
| 77481 | 10510, // SHRD16rri8_EVEX |
| 77482 | 10514, // SHRD16rri8_ND |
| 77483 | 10518, // SHRD16rri8_NF |
| 77484 | 10522, // SHRD16rri8_NF_ND |
| 77485 | 10526, // SHRD32mrCL |
| 77486 | 10528, // SHRD32mrCL_EVEX |
| 77487 | 10530, // SHRD32mrCL_ND |
| 77488 | 10533, // SHRD32mrCL_NF |
| 77489 | 10535, // SHRD32mrCL_NF_ND |
| 77490 | 10538, // SHRD32mri8 |
| 77491 | 10541, // SHRD32mri8_EVEX |
| 77492 | 10544, // SHRD32mri8_ND |
| 77493 | 10548, // SHRD32mri8_NF |
| 77494 | 10551, // SHRD32mri8_NF_ND |
| 77495 | 10555, // SHRD32rrCL |
| 77496 | 10558, // SHRD32rrCL_EVEX |
| 77497 | 10561, // SHRD32rrCL_ND |
| 77498 | 10564, // SHRD32rrCL_NF |
| 77499 | 10567, // SHRD32rrCL_NF_ND |
| 77500 | 10570, // SHRD32rri8 |
| 77501 | 10574, // SHRD32rri8_EVEX |
| 77502 | 10578, // SHRD32rri8_ND |
| 77503 | 10582, // SHRD32rri8_NF |
| 77504 | 10586, // SHRD32rri8_NF_ND |
| 77505 | 10590, // SHRD64mrCL |
| 77506 | 10592, // SHRD64mrCL_EVEX |
| 77507 | 10594, // SHRD64mrCL_ND |
| 77508 | 10597, // SHRD64mrCL_NF |
| 77509 | 10599, // SHRD64mrCL_NF_ND |
| 77510 | 10602, // SHRD64mri8 |
| 77511 | 10605, // SHRD64mri8_EVEX |
| 77512 | 10608, // SHRD64mri8_ND |
| 77513 | 10612, // SHRD64mri8_NF |
| 77514 | 10615, // SHRD64mri8_NF_ND |
| 77515 | 10619, // SHRD64rrCL |
| 77516 | 10622, // SHRD64rrCL_EVEX |
| 77517 | 10625, // SHRD64rrCL_ND |
| 77518 | 10628, // SHRD64rrCL_NF |
| 77519 | 10631, // SHRD64rrCL_NF_ND |
| 77520 | 10634, // SHRD64rri8 |
| 77521 | 10638, // SHRD64rri8_EVEX |
| 77522 | 10642, // SHRD64rri8_ND |
| 77523 | 10646, // SHRD64rri8_NF |
| 77524 | 10650, // SHRD64rri8_NF_ND |
| 77525 | 10654, // SHRX32rm |
| 77526 | 10657, // SHRX32rm_EVEX |
| 77527 | 10660, // SHRX32rr |
| 77528 | 10663, // SHRX32rr_EVEX |
| 77529 | 10666, // SHRX64rm |
| 77530 | 10669, // SHRX64rm_EVEX |
| 77531 | 10672, // SHRX64rr |
| 77532 | 10675, // SHRX64rr_EVEX |
| 77533 | 10678, // SHUFPDrmi |
| 77534 | 10682, // SHUFPDrri |
| 77535 | 10686, // SHUFPSrmi |
| 77536 | 10690, // SHUFPSrri |
| 77537 | 10694, // SIDT16m |
| 77538 | 10695, // SIDT32m |
| 77539 | 10696, // SIDT64m |
| 77540 | 10697, // SKINIT |
| 77541 | 10697, // SLDT16m |
| 77542 | 10698, // SLDT16r |
| 77543 | 10699, // SLDT32r |
| 77544 | 10700, // SLDT64r |
| 77545 | 10701, // SLWPCB |
| 77546 | 10702, // SLWPCB64 |
| 77547 | 10703, // SMSW16m |
| 77548 | 10704, // SMSW16r |
| 77549 | 10705, // SMSW32r |
| 77550 | 10706, // SMSW64r |
| 77551 | 10707, // SQRTPDm |
| 77552 | 10709, // SQRTPDr |
| 77553 | 10711, // SQRTPSm |
| 77554 | 10713, // SQRTPSr |
| 77555 | 10715, // SQRTSDm |
| 77556 | 10717, // SQRTSDm_Int |
| 77557 | 10720, // SQRTSDr |
| 77558 | 10722, // SQRTSDr_Int |
| 77559 | 10725, // SQRTSSm |
| 77560 | 10727, // SQRTSSm_Int |
| 77561 | 10730, // SQRTSSr |
| 77562 | 10732, // SQRTSSr_Int |
| 77563 | 10735, // SQRT_F |
| 77564 | 10735, // SQRT_Fp32 |
| 77565 | 10737, // SQRT_Fp64 |
| 77566 | 10739, // SQRT_Fp80 |
| 77567 | 10741, // SS_PREFIX |
| 77568 | 10741, // STAC |
| 77569 | 10741, // STACKALLOC_W_PROBING |
| 77570 | 10742, // STC |
| 77571 | 10742, // STD |
| 77572 | 10742, // STGI |
| 77573 | 10742, // STI |
| 77574 | 10742, // STMXCSR |
| 77575 | 10743, // STOSB |
| 77576 | 10744, // STOSL |
| 77577 | 10745, // STOSQ |
| 77578 | 10746, // STOSW |
| 77579 | 10747, // STR16r |
| 77580 | 10748, // STR32r |
| 77581 | 10749, // STR64r |
| 77582 | 10750, // STRm |
| 77583 | 10751, // STTILECFG |
| 77584 | 10752, // STTILECFG_EVEX |
| 77585 | 10753, // STUI |
| 77586 | 10753, // ST_F32m |
| 77587 | 10754, // ST_F64m |
| 77588 | 10755, // ST_FP32m |
| 77589 | 10756, // ST_FP64m |
| 77590 | 10757, // ST_FP80m |
| 77591 | 10758, // ST_FPrr |
| 77592 | 10759, // ST_Fp32m |
| 77593 | 10761, // ST_Fp64m |
| 77594 | 10763, // ST_Fp64m32 |
| 77595 | 10765, // ST_Fp80m32 |
| 77596 | 10767, // ST_Fp80m64 |
| 77597 | 10769, // ST_FpP32m |
| 77598 | 10771, // ST_FpP64m |
| 77599 | 10773, // ST_FpP64m32 |
| 77600 | 10775, // ST_FpP80m |
| 77601 | 10777, // ST_FpP80m32 |
| 77602 | 10779, // ST_FpP80m64 |
| 77603 | 10781, // ST_Frr |
| 77604 | 10782, // SUB16i16 |
| 77605 | 10783, // SUB16mi |
| 77606 | 10785, // SUB16mi8 |
| 77607 | 10787, // SUB16mi8_EVEX |
| 77608 | 10789, // SUB16mi8_ND |
| 77609 | 10792, // SUB16mi8_NF |
| 77610 | 10794, // SUB16mi8_NF_ND |
| 77611 | 10797, // SUB16mi_EVEX |
| 77612 | 10799, // SUB16mi_ND |
| 77613 | 10802, // SUB16mi_NF |
| 77614 | 10804, // SUB16mi_NF_ND |
| 77615 | 10807, // SUB16mr |
| 77616 | 10809, // SUB16mr_EVEX |
| 77617 | 10811, // SUB16mr_ND |
| 77618 | 10814, // SUB16mr_NF |
| 77619 | 10816, // SUB16mr_NF_ND |
| 77620 | 10819, // SUB16ri |
| 77621 | 10822, // SUB16ri8 |
| 77622 | 10825, // SUB16ri8_EVEX |
| 77623 | 10828, // SUB16ri8_ND |
| 77624 | 10831, // SUB16ri8_NF |
| 77625 | 10834, // SUB16ri8_NF_ND |
| 77626 | 10837, // SUB16ri_EVEX |
| 77627 | 10840, // SUB16ri_ND |
| 77628 | 10843, // SUB16ri_NF |
| 77629 | 10846, // SUB16ri_NF_ND |
| 77630 | 10849, // SUB16rm |
| 77631 | 10852, // SUB16rm_EVEX |
| 77632 | 10855, // SUB16rm_ND |
| 77633 | 10858, // SUB16rm_NF |
| 77634 | 10861, // SUB16rm_NF_ND |
| 77635 | 10864, // SUB16rr |
| 77636 | 10867, // SUB16rr_EVEX |
| 77637 | 10870, // SUB16rr_EVEX_REV |
| 77638 | 10873, // SUB16rr_ND |
| 77639 | 10876, // SUB16rr_ND_REV |
| 77640 | 10879, // SUB16rr_NF |
| 77641 | 10882, // SUB16rr_NF_ND |
| 77642 | 10885, // SUB16rr_NF_ND_REV |
| 77643 | 10888, // SUB16rr_NF_REV |
| 77644 | 10891, // SUB16rr_REV |
| 77645 | 10894, // SUB32i32 |
| 77646 | 10895, // SUB32mi |
| 77647 | 10897, // SUB32mi8 |
| 77648 | 10899, // SUB32mi8_EVEX |
| 77649 | 10901, // SUB32mi8_ND |
| 77650 | 10904, // SUB32mi8_NF |
| 77651 | 10906, // SUB32mi8_NF_ND |
| 77652 | 10909, // SUB32mi_EVEX |
| 77653 | 10911, // SUB32mi_ND |
| 77654 | 10914, // SUB32mi_NF |
| 77655 | 10916, // SUB32mi_NF_ND |
| 77656 | 10919, // SUB32mr |
| 77657 | 10921, // SUB32mr_EVEX |
| 77658 | 10923, // SUB32mr_ND |
| 77659 | 10926, // SUB32mr_NF |
| 77660 | 10928, // SUB32mr_NF_ND |
| 77661 | 10931, // SUB32ri |
| 77662 | 10934, // SUB32ri8 |
| 77663 | 10937, // SUB32ri8_EVEX |
| 77664 | 10940, // SUB32ri8_ND |
| 77665 | 10943, // SUB32ri8_NF |
| 77666 | 10946, // SUB32ri8_NF_ND |
| 77667 | 10949, // SUB32ri_EVEX |
| 77668 | 10952, // SUB32ri_ND |
| 77669 | 10955, // SUB32ri_NF |
| 77670 | 10958, // SUB32ri_NF_ND |
| 77671 | 10961, // SUB32rm |
| 77672 | 10964, // SUB32rm_EVEX |
| 77673 | 10967, // SUB32rm_ND |
| 77674 | 10970, // SUB32rm_NF |
| 77675 | 10973, // SUB32rm_NF_ND |
| 77676 | 10976, // SUB32rr |
| 77677 | 10979, // SUB32rr_EVEX |
| 77678 | 10982, // SUB32rr_EVEX_REV |
| 77679 | 10985, // SUB32rr_ND |
| 77680 | 10988, // SUB32rr_ND_REV |
| 77681 | 10991, // SUB32rr_NF |
| 77682 | 10994, // SUB32rr_NF_ND |
| 77683 | 10997, // SUB32rr_NF_ND_REV |
| 77684 | 11000, // SUB32rr_NF_REV |
| 77685 | 11003, // SUB32rr_REV |
| 77686 | 11006, // SUB64i32 |
| 77687 | 11007, // SUB64mi32 |
| 77688 | 11009, // SUB64mi32_EVEX |
| 77689 | 11011, // SUB64mi32_ND |
| 77690 | 11014, // SUB64mi32_NF |
| 77691 | 11016, // SUB64mi32_NF_ND |
| 77692 | 11019, // SUB64mi8 |
| 77693 | 11021, // SUB64mi8_EVEX |
| 77694 | 11023, // SUB64mi8_ND |
| 77695 | 11026, // SUB64mi8_NF |
| 77696 | 11028, // SUB64mi8_NF_ND |
| 77697 | 11031, // SUB64mr |
| 77698 | 11033, // SUB64mr_EVEX |
| 77699 | 11035, // SUB64mr_ND |
| 77700 | 11038, // SUB64mr_NF |
| 77701 | 11040, // SUB64mr_NF_ND |
| 77702 | 11043, // SUB64ri32 |
| 77703 | 11046, // SUB64ri32_EVEX |
| 77704 | 11049, // SUB64ri32_ND |
| 77705 | 11052, // SUB64ri32_NF |
| 77706 | 11055, // SUB64ri32_NF_ND |
| 77707 | 11058, // SUB64ri8 |
| 77708 | 11061, // SUB64ri8_EVEX |
| 77709 | 11064, // SUB64ri8_ND |
| 77710 | 11067, // SUB64ri8_NF |
| 77711 | 11070, // SUB64ri8_NF_ND |
| 77712 | 11073, // SUB64rm |
| 77713 | 11076, // SUB64rm_EVEX |
| 77714 | 11079, // SUB64rm_ND |
| 77715 | 11082, // SUB64rm_NF |
| 77716 | 11085, // SUB64rm_NF_ND |
| 77717 | 11088, // SUB64rr |
| 77718 | 11091, // SUB64rr_EVEX |
| 77719 | 11094, // SUB64rr_EVEX_REV |
| 77720 | 11097, // SUB64rr_ND |
| 77721 | 11100, // SUB64rr_ND_REV |
| 77722 | 11103, // SUB64rr_NF |
| 77723 | 11106, // SUB64rr_NF_ND |
| 77724 | 11109, // SUB64rr_NF_ND_REV |
| 77725 | 11112, // SUB64rr_NF_REV |
| 77726 | 11115, // SUB64rr_REV |
| 77727 | 11118, // SUB8i8 |
| 77728 | 11119, // SUB8mi |
| 77729 | 11121, // SUB8mi8 |
| 77730 | 11123, // SUB8mi_EVEX |
| 77731 | 11125, // SUB8mi_ND |
| 77732 | 11128, // SUB8mi_NF |
| 77733 | 11130, // SUB8mi_NF_ND |
| 77734 | 11133, // SUB8mr |
| 77735 | 11135, // SUB8mr_EVEX |
| 77736 | 11137, // SUB8mr_ND |
| 77737 | 11140, // SUB8mr_NF |
| 77738 | 11142, // SUB8mr_NF_ND |
| 77739 | 11145, // SUB8ri |
| 77740 | 11148, // SUB8ri8 |
| 77741 | 11151, // SUB8ri_EVEX |
| 77742 | 11154, // SUB8ri_ND |
| 77743 | 11157, // SUB8ri_NF |
| 77744 | 11160, // SUB8ri_NF_ND |
| 77745 | 11163, // SUB8rm |
| 77746 | 11166, // SUB8rm_EVEX |
| 77747 | 11169, // SUB8rm_ND |
| 77748 | 11172, // SUB8rm_NF |
| 77749 | 11175, // SUB8rm_NF_ND |
| 77750 | 11178, // SUB8rr |
| 77751 | 11181, // SUB8rr_EVEX |
| 77752 | 11184, // SUB8rr_EVEX_REV |
| 77753 | 11187, // SUB8rr_ND |
| 77754 | 11190, // SUB8rr_ND_REV |
| 77755 | 11193, // SUB8rr_NF |
| 77756 | 11196, // SUB8rr_NF_ND |
| 77757 | 11199, // SUB8rr_NF_ND_REV |
| 77758 | 11202, // SUB8rr_NF_REV |
| 77759 | 11205, // SUB8rr_REV |
| 77760 | 11208, // SUBPDrm |
| 77761 | 11211, // SUBPDrr |
| 77762 | 11214, // SUBPSrm |
| 77763 | 11217, // SUBPSrr |
| 77764 | 11220, // SUBR_F32m |
| 77765 | 11221, // SUBR_F64m |
| 77766 | 11222, // SUBR_FI16m |
| 77767 | 11223, // SUBR_FI32m |
| 77768 | 11224, // SUBR_FPrST0 |
| 77769 | 11225, // SUBR_FST0r |
| 77770 | 11226, // SUBR_Fp32m |
| 77771 | 11229, // SUBR_Fp64m |
| 77772 | 11232, // SUBR_Fp64m32 |
| 77773 | 11235, // SUBR_Fp80m32 |
| 77774 | 11238, // SUBR_Fp80m64 |
| 77775 | 11241, // SUBR_FpI16m32 |
| 77776 | 11244, // SUBR_FpI16m64 |
| 77777 | 11247, // SUBR_FpI16m80 |
| 77778 | 11250, // SUBR_FpI32m32 |
| 77779 | 11253, // SUBR_FpI32m64 |
| 77780 | 11256, // SUBR_FpI32m80 |
| 77781 | 11259, // SUBR_FrST0 |
| 77782 | 11260, // SUBSDrm |
| 77783 | 11263, // SUBSDrm_Int |
| 77784 | 11266, // SUBSDrr |
| 77785 | 11269, // SUBSDrr_Int |
| 77786 | 11272, // SUBSSrm |
| 77787 | 11275, // SUBSSrm_Int |
| 77788 | 11278, // SUBSSrr |
| 77789 | 11281, // SUBSSrr_Int |
| 77790 | 11284, // SUB_F32m |
| 77791 | 11285, // SUB_F64m |
| 77792 | 11286, // SUB_FI16m |
| 77793 | 11287, // SUB_FI32m |
| 77794 | 11288, // SUB_FPrST0 |
| 77795 | 11289, // SUB_FST0r |
| 77796 | 11290, // SUB_Fp32 |
| 77797 | 11293, // SUB_Fp32m |
| 77798 | 11296, // SUB_Fp64 |
| 77799 | 11299, // SUB_Fp64m |
| 77800 | 11302, // SUB_Fp64m32 |
| 77801 | 11305, // SUB_Fp80 |
| 77802 | 11308, // SUB_Fp80m32 |
| 77803 | 11311, // SUB_Fp80m64 |
| 77804 | 11314, // SUB_FpI16m32 |
| 77805 | 11317, // SUB_FpI16m64 |
| 77806 | 11320, // SUB_FpI16m80 |
| 77807 | 11323, // SUB_FpI32m32 |
| 77808 | 11326, // SUB_FpI32m64 |
| 77809 | 11329, // SUB_FpI32m80 |
| 77810 | 11332, // SUB_FrST0 |
| 77811 | 11333, // SWAPGS |
| 77812 | 11333, // SYSCALL |
| 77813 | 11333, // SYSENTER |
| 77814 | 11333, // SYSEXIT |
| 77815 | 11333, // SYSEXIT64 |
| 77816 | 11333, // SYSRET |
| 77817 | 11333, // SYSRET64 |
| 77818 | 11333, // T1MSKC32rm |
| 77819 | 11335, // T1MSKC32rr |
| 77820 | 11337, // T1MSKC64rm |
| 77821 | 11339, // T1MSKC64rr |
| 77822 | 11341, // T2RPNTLVWZ0 |
| 77823 | 11343, // T2RPNTLVWZ0RS |
| 77824 | 11345, // T2RPNTLVWZ0RST1 |
| 77825 | 11347, // T2RPNTLVWZ0RST1_EVEX |
| 77826 | 11349, // T2RPNTLVWZ0RS_EVEX |
| 77827 | 11351, // T2RPNTLVWZ0T1 |
| 77828 | 11353, // T2RPNTLVWZ0T1_EVEX |
| 77829 | 11355, // T2RPNTLVWZ0_EVEX |
| 77830 | 11357, // T2RPNTLVWZ1 |
| 77831 | 11359, // T2RPNTLVWZ1RS |
| 77832 | 11361, // T2RPNTLVWZ1RST1 |
| 77833 | 11363, // T2RPNTLVWZ1RST1_EVEX |
| 77834 | 11365, // T2RPNTLVWZ1RS_EVEX |
| 77835 | 11367, // T2RPNTLVWZ1T1 |
| 77836 | 11369, // T2RPNTLVWZ1T1_EVEX |
| 77837 | 11371, // T2RPNTLVWZ1_EVEX |
| 77838 | 11373, // TAILJMPd |
| 77839 | 11374, // TAILJMPd64 |
| 77840 | 11375, // TAILJMPd64_CC |
| 77841 | 11377, // TAILJMPd_CC |
| 77842 | 11379, // TAILJMPm |
| 77843 | 11380, // TAILJMPm64 |
| 77844 | 11381, // TAILJMPm64_REX |
| 77845 | 11382, // TAILJMPr |
| 77846 | 11383, // TAILJMPr64 |
| 77847 | 11384, // TAILJMPr64_REX |
| 77848 | 11385, // TCMMIMFP16PS |
| 77849 | 11389, // TCMMRLFP16PS |
| 77850 | 11393, // TCONJTCMMIMFP16PS |
| 77851 | 11397, // TCONJTFP16 |
| 77852 | 11399, // TCRETURNdi |
| 77853 | 11401, // TCRETURNdi64 |
| 77854 | 11403, // TCRETURNdi64cc |
| 77855 | 11406, // TCRETURNdicc |
| 77856 | 11409, // TCRETURNmi |
| 77857 | 11411, // TCRETURNmi64 |
| 77858 | 11413, // TCRETURNri |
| 77859 | 11415, // TCRETURNri64 |
| 77860 | 11417, // TCRETURNri64_ImpCall |
| 77861 | 11419, // TCVTROWD2PSrre |
| 77862 | 11422, // TCVTROWD2PSrri |
| 77863 | 11425, // TCVTROWPS2BF16Hrre |
| 77864 | 11428, // TCVTROWPS2BF16Hrri |
| 77865 | 11431, // TCVTROWPS2BF16Lrre |
| 77866 | 11434, // TCVTROWPS2BF16Lrri |
| 77867 | 11437, // TCVTROWPS2PHHrre |
| 77868 | 11440, // TCVTROWPS2PHHrri |
| 77869 | 11443, // TCVTROWPS2PHLrre |
| 77870 | 11446, // TCVTROWPS2PHLrri |
| 77871 | 11449, // TDCALL |
| 77872 | 11449, // TDPBF16PS |
| 77873 | 11453, // TDPBF8PS |
| 77874 | 11457, // TDPBHF8PS |
| 77875 | 11461, // TDPBSSD |
| 77876 | 11465, // TDPBSUD |
| 77877 | 11469, // TDPBUSD |
| 77878 | 11473, // TDPBUUD |
| 77879 | 11477, // TDPFP16PS |
| 77880 | 11481, // TDPHBF8PS |
| 77881 | 11485, // TDPHF8PS |
| 77882 | 11489, // TEST16i16 |
| 77883 | 11490, // TEST16mi |
| 77884 | 11492, // TEST16mr |
| 77885 | 11494, // TEST16ri |
| 77886 | 11496, // TEST16rr |
| 77887 | 11498, // TEST32i32 |
| 77888 | 11499, // TEST32mi |
| 77889 | 11501, // TEST32mr |
| 77890 | 11503, // TEST32ri |
| 77891 | 11505, // TEST32rr |
| 77892 | 11507, // TEST64i32 |
| 77893 | 11508, // TEST64mi32 |
| 77894 | 11510, // TEST64mr |
| 77895 | 11512, // TEST64ri32 |
| 77896 | 11514, // TEST64rr |
| 77897 | 11516, // TEST8i8 |
| 77898 | 11517, // TEST8mi |
| 77899 | 11519, // TEST8mr |
| 77900 | 11521, // TEST8ri |
| 77901 | 11523, // TEST8rr |
| 77902 | 11525, // TESTUI |
| 77903 | 11525, // TILELOADD |
| 77904 | 11527, // TILELOADDRS |
| 77905 | 11529, // TILELOADDRST1 |
| 77906 | 11531, // TILELOADDRST1_EVEX |
| 77907 | 11533, // TILELOADDRS_EVEX |
| 77908 | 11535, // TILELOADDT1 |
| 77909 | 11537, // TILELOADDT1_EVEX |
| 77910 | 11539, // TILELOADD_EVEX |
| 77911 | 11541, // TILEMOVROWrre |
| 77912 | 11544, // TILEMOVROWrri |
| 77913 | 11547, // TILERELEASE |
| 77914 | 11547, // TILESTORED |
| 77915 | 11549, // TILESTORED_EVEX |
| 77916 | 11551, // TILEZERO |
| 77917 | 11552, // TLBSYNC |
| 77918 | 11552, // TLSCall_32 |
| 77919 | 11553, // TLSCall_64 |
| 77920 | 11554, // TLS_addr32 |
| 77921 | 11555, // TLS_addr64 |
| 77922 | 11556, // TLS_addrX32 |
| 77923 | 11557, // TLS_base_addr32 |
| 77924 | 11558, // TLS_base_addr64 |
| 77925 | 11559, // TLS_base_addrX32 |
| 77926 | 11560, // TLS_desc32 |
| 77927 | 11561, // TLS_desc64 |
| 77928 | 11562, // TMMULTF32PS |
| 77929 | 11566, // TPAUSE |
| 77930 | 11567, // TRAP |
| 77931 | 11567, // TST_F |
| 77932 | 11567, // TST_Fp32 |
| 77933 | 11568, // TST_Fp64 |
| 77934 | 11569, // TST_Fp80 |
| 77935 | 11570, // TTCMMIMFP16PS |
| 77936 | 11574, // TTCMMRLFP16PS |
| 77937 | 11578, // TTDPBF16PS |
| 77938 | 11582, // TTDPFP16PS |
| 77939 | 11586, // TTMMULTF32PS |
| 77940 | 11590, // TTRANSPOSED |
| 77941 | 11592, // TZCNT16rm |
| 77942 | 11594, // TZCNT16rm_EVEX |
| 77943 | 11596, // TZCNT16rm_NF |
| 77944 | 11598, // TZCNT16rr |
| 77945 | 11600, // TZCNT16rr_EVEX |
| 77946 | 11602, // TZCNT16rr_NF |
| 77947 | 11604, // TZCNT32rm |
| 77948 | 11606, // TZCNT32rm_EVEX |
| 77949 | 11608, // TZCNT32rm_NF |
| 77950 | 11610, // TZCNT32rr |
| 77951 | 11612, // TZCNT32rr_EVEX |
| 77952 | 11614, // TZCNT32rr_NF |
| 77953 | 11616, // TZCNT64rm |
| 77954 | 11618, // TZCNT64rm_EVEX |
| 77955 | 11620, // TZCNT64rm_NF |
| 77956 | 11622, // TZCNT64rr |
| 77957 | 11624, // TZCNT64rr_EVEX |
| 77958 | 11626, // TZCNT64rr_NF |
| 77959 | 11628, // TZMSK32rm |
| 77960 | 11630, // TZMSK32rr |
| 77961 | 11632, // TZMSK64rm |
| 77962 | 11634, // TZMSK64rr |
| 77963 | 11636, // UBSAN_UD1 |
| 77964 | 11637, // UCOMISDrm |
| 77965 | 11639, // UCOMISDrm_Int |
| 77966 | 11641, // UCOMISDrr |
| 77967 | 11643, // UCOMISDrr_Int |
| 77968 | 11645, // UCOMISSrm |
| 77969 | 11647, // UCOMISSrm_Int |
| 77970 | 11649, // UCOMISSrr |
| 77971 | 11651, // UCOMISSrr_Int |
| 77972 | 11653, // UCOM_FIPr |
| 77973 | 11654, // UCOM_FIr |
| 77974 | 11655, // UCOM_FPPr |
| 77975 | 11655, // UCOM_FPr |
| 77976 | 11656, // UCOM_FpIr32 |
| 77977 | 11658, // UCOM_FpIr64 |
| 77978 | 11660, // UCOM_FpIr80 |
| 77979 | 11662, // UCOM_Fpr32 |
| 77980 | 11664, // UCOM_Fpr64 |
| 77981 | 11666, // UCOM_Fpr80 |
| 77982 | 11668, // UCOM_Fr |
| 77983 | 11669, // UD1Lm |
| 77984 | 11671, // UD1Lr |
| 77985 | 11673, // UD1Qm |
| 77986 | 11675, // UD1Qr |
| 77987 | 11677, // UD1Wm |
| 77988 | 11679, // UD1Wr |
| 77989 | 11681, // UIRET |
| 77990 | 11681, // UMONITOR16 |
| 77991 | 11682, // UMONITOR32 |
| 77992 | 11683, // UMONITOR64 |
| 77993 | 11684, // UMWAIT |
| 77994 | 11685, // UNPCKHPDrm |
| 77995 | 11688, // UNPCKHPDrr |
| 77996 | 11691, // UNPCKHPSrm |
| 77997 | 11694, // UNPCKHPSrr |
| 77998 | 11697, // UNPCKLPDrm |
| 77999 | 11700, // UNPCKLPDrr |
| 78000 | 11703, // UNPCKLPSrm |
| 78001 | 11706, // UNPCKLPSrr |
| 78002 | 11709, // URDMSRri |
| 78003 | 11711, // URDMSRri_EVEX |
| 78004 | 11713, // URDMSRrr |
| 78005 | 11715, // URDMSRrr_EVEX |
| 78006 | 11717, // UWRMSRir |
| 78007 | 11719, // UWRMSRir_EVEX |
| 78008 | 11721, // UWRMSRrr |
| 78009 | 11723, // UWRMSRrr_EVEX |
| 78010 | 11725, // V4FMADDPSrm |
| 78011 | 11729, // V4FMADDPSrmk |
| 78012 | 11734, // V4FMADDPSrmkz |
| 78013 | 11739, // V4FMADDSSrm |
| 78014 | 11743, // V4FMADDSSrmk |
| 78015 | 11748, // V4FMADDSSrmkz |
| 78016 | 11753, // V4FNMADDPSrm |
| 78017 | 11757, // V4FNMADDPSrmk |
| 78018 | 11762, // V4FNMADDPSrmkz |
| 78019 | 11767, // V4FNMADDSSrm |
| 78020 | 11771, // V4FNMADDSSrmk |
| 78021 | 11776, // V4FNMADDSSrmkz |
| 78022 | 11781, // VAARG_64 |
| 78023 | 11786, // VAARG_X32 |
| 78024 | 11791, // VADDBF16Z128rm |
| 78025 | 11794, // VADDBF16Z128rmb |
| 78026 | 11797, // VADDBF16Z128rmbk |
| 78027 | 11802, // VADDBF16Z128rmbkz |
| 78028 | 11806, // VADDBF16Z128rmk |
| 78029 | 11811, // VADDBF16Z128rmkz |
| 78030 | 11815, // VADDBF16Z128rr |
| 78031 | 11818, // VADDBF16Z128rrk |
| 78032 | 11823, // VADDBF16Z128rrkz |
| 78033 | 11827, // VADDBF16Z256rm |
| 78034 | 11830, // VADDBF16Z256rmb |
| 78035 | 11833, // VADDBF16Z256rmbk |
| 78036 | 11838, // VADDBF16Z256rmbkz |
| 78037 | 11842, // VADDBF16Z256rmk |
| 78038 | 11847, // VADDBF16Z256rmkz |
| 78039 | 11851, // VADDBF16Z256rr |
| 78040 | 11854, // VADDBF16Z256rrk |
| 78041 | 11859, // VADDBF16Z256rrkz |
| 78042 | 11863, // VADDBF16Zrm |
| 78043 | 11866, // VADDBF16Zrmb |
| 78044 | 11869, // VADDBF16Zrmbk |
| 78045 | 11874, // VADDBF16Zrmbkz |
| 78046 | 11878, // VADDBF16Zrmk |
| 78047 | 11883, // VADDBF16Zrmkz |
| 78048 | 11887, // VADDBF16Zrr |
| 78049 | 11890, // VADDBF16Zrrk |
| 78050 | 11895, // VADDBF16Zrrkz |
| 78051 | 11899, // VADDPDYrm |
| 78052 | 11902, // VADDPDYrr |
| 78053 | 11905, // VADDPDZ128rm |
| 78054 | 11908, // VADDPDZ128rmb |
| 78055 | 11911, // VADDPDZ128rmbk |
| 78056 | 11916, // VADDPDZ128rmbkz |
| 78057 | 11920, // VADDPDZ128rmk |
| 78058 | 11925, // VADDPDZ128rmkz |
| 78059 | 11929, // VADDPDZ128rr |
| 78060 | 11932, // VADDPDZ128rrk |
| 78061 | 11937, // VADDPDZ128rrkz |
| 78062 | 11941, // VADDPDZ256rm |
| 78063 | 11944, // VADDPDZ256rmb |
| 78064 | 11947, // VADDPDZ256rmbk |
| 78065 | 11952, // VADDPDZ256rmbkz |
| 78066 | 11956, // VADDPDZ256rmk |
| 78067 | 11961, // VADDPDZ256rmkz |
| 78068 | 11965, // VADDPDZ256rr |
| 78069 | 11968, // VADDPDZ256rrk |
| 78070 | 11973, // VADDPDZ256rrkz |
| 78071 | 11977, // VADDPDZrm |
| 78072 | 11980, // VADDPDZrmb |
| 78073 | 11983, // VADDPDZrmbk |
| 78074 | 11988, // VADDPDZrmbkz |
| 78075 | 11992, // VADDPDZrmk |
| 78076 | 11997, // VADDPDZrmkz |
| 78077 | 12001, // VADDPDZrr |
| 78078 | 12004, // VADDPDZrrb |
| 78079 | 12008, // VADDPDZrrbk |
| 78080 | 12014, // VADDPDZrrbkz |
| 78081 | 12019, // VADDPDZrrk |
| 78082 | 12024, // VADDPDZrrkz |
| 78083 | 12028, // VADDPDrm |
| 78084 | 12031, // VADDPDrr |
| 78085 | 12034, // VADDPHZ128rm |
| 78086 | 12037, // VADDPHZ128rmb |
| 78087 | 12040, // VADDPHZ128rmbk |
| 78088 | 12045, // VADDPHZ128rmbkz |
| 78089 | 12049, // VADDPHZ128rmk |
| 78090 | 12054, // VADDPHZ128rmkz |
| 78091 | 12058, // VADDPHZ128rr |
| 78092 | 12061, // VADDPHZ128rrk |
| 78093 | 12066, // VADDPHZ128rrkz |
| 78094 | 12070, // VADDPHZ256rm |
| 78095 | 12073, // VADDPHZ256rmb |
| 78096 | 12076, // VADDPHZ256rmbk |
| 78097 | 12081, // VADDPHZ256rmbkz |
| 78098 | 12085, // VADDPHZ256rmk |
| 78099 | 12090, // VADDPHZ256rmkz |
| 78100 | 12094, // VADDPHZ256rr |
| 78101 | 12097, // VADDPHZ256rrk |
| 78102 | 12102, // VADDPHZ256rrkz |
| 78103 | 12106, // VADDPHZrm |
| 78104 | 12109, // VADDPHZrmb |
| 78105 | 12112, // VADDPHZrmbk |
| 78106 | 12117, // VADDPHZrmbkz |
| 78107 | 12121, // VADDPHZrmk |
| 78108 | 12126, // VADDPHZrmkz |
| 78109 | 12130, // VADDPHZrr |
| 78110 | 12133, // VADDPHZrrb |
| 78111 | 12137, // VADDPHZrrbk |
| 78112 | 12143, // VADDPHZrrbkz |
| 78113 | 12148, // VADDPHZrrk |
| 78114 | 12153, // VADDPHZrrkz |
| 78115 | 12157, // VADDPSYrm |
| 78116 | 12160, // VADDPSYrr |
| 78117 | 12163, // VADDPSZ128rm |
| 78118 | 12166, // VADDPSZ128rmb |
| 78119 | 12169, // VADDPSZ128rmbk |
| 78120 | 12174, // VADDPSZ128rmbkz |
| 78121 | 12178, // VADDPSZ128rmk |
| 78122 | 12183, // VADDPSZ128rmkz |
| 78123 | 12187, // VADDPSZ128rr |
| 78124 | 12190, // VADDPSZ128rrk |
| 78125 | 12195, // VADDPSZ128rrkz |
| 78126 | 12199, // VADDPSZ256rm |
| 78127 | 12202, // VADDPSZ256rmb |
| 78128 | 12205, // VADDPSZ256rmbk |
| 78129 | 12210, // VADDPSZ256rmbkz |
| 78130 | 12214, // VADDPSZ256rmk |
| 78131 | 12219, // VADDPSZ256rmkz |
| 78132 | 12223, // VADDPSZ256rr |
| 78133 | 12226, // VADDPSZ256rrk |
| 78134 | 12231, // VADDPSZ256rrkz |
| 78135 | 12235, // VADDPSZrm |
| 78136 | 12238, // VADDPSZrmb |
| 78137 | 12241, // VADDPSZrmbk |
| 78138 | 12246, // VADDPSZrmbkz |
| 78139 | 12250, // VADDPSZrmk |
| 78140 | 12255, // VADDPSZrmkz |
| 78141 | 12259, // VADDPSZrr |
| 78142 | 12262, // VADDPSZrrb |
| 78143 | 12266, // VADDPSZrrbk |
| 78144 | 12272, // VADDPSZrrbkz |
| 78145 | 12277, // VADDPSZrrk |
| 78146 | 12282, // VADDPSZrrkz |
| 78147 | 12286, // VADDPSrm |
| 78148 | 12289, // VADDPSrr |
| 78149 | 12292, // VADDSDZrm |
| 78150 | 12295, // VADDSDZrm_Int |
| 78151 | 12298, // VADDSDZrmk_Int |
| 78152 | 12303, // VADDSDZrmkz_Int |
| 78153 | 12307, // VADDSDZrr |
| 78154 | 12310, // VADDSDZrr_Int |
| 78155 | 12313, // VADDSDZrrb_Int |
| 78156 | 12317, // VADDSDZrrbk_Int |
| 78157 | 12323, // VADDSDZrrbkz_Int |
| 78158 | 12328, // VADDSDZrrk_Int |
| 78159 | 12333, // VADDSDZrrkz_Int |
| 78160 | 12337, // VADDSDrm |
| 78161 | 12340, // VADDSDrm_Int |
| 78162 | 12343, // VADDSDrr |
| 78163 | 12346, // VADDSDrr_Int |
| 78164 | 12349, // VADDSHZrm |
| 78165 | 12352, // VADDSHZrm_Int |
| 78166 | 12355, // VADDSHZrmk_Int |
| 78167 | 12360, // VADDSHZrmkz_Int |
| 78168 | 12364, // VADDSHZrr |
| 78169 | 12367, // VADDSHZrr_Int |
| 78170 | 12370, // VADDSHZrrb_Int |
| 78171 | 12374, // VADDSHZrrbk_Int |
| 78172 | 12380, // VADDSHZrrbkz_Int |
| 78173 | 12385, // VADDSHZrrk_Int |
| 78174 | 12390, // VADDSHZrrkz_Int |
| 78175 | 12394, // VADDSSZrm |
| 78176 | 12397, // VADDSSZrm_Int |
| 78177 | 12400, // VADDSSZrmk_Int |
| 78178 | 12405, // VADDSSZrmkz_Int |
| 78179 | 12409, // VADDSSZrr |
| 78180 | 12412, // VADDSSZrr_Int |
| 78181 | 12415, // VADDSSZrrb_Int |
| 78182 | 12419, // VADDSSZrrbk_Int |
| 78183 | 12425, // VADDSSZrrbkz_Int |
| 78184 | 12430, // VADDSSZrrk_Int |
| 78185 | 12435, // VADDSSZrrkz_Int |
| 78186 | 12439, // VADDSSrm |
| 78187 | 12442, // VADDSSrm_Int |
| 78188 | 12445, // VADDSSrr |
| 78189 | 12448, // VADDSSrr_Int |
| 78190 | 12451, // VADDSUBPDYrm |
| 78191 | 12454, // VADDSUBPDYrr |
| 78192 | 12457, // VADDSUBPDrm |
| 78193 | 12460, // VADDSUBPDrr |
| 78194 | 12463, // VADDSUBPSYrm |
| 78195 | 12466, // VADDSUBPSYrr |
| 78196 | 12469, // VADDSUBPSrm |
| 78197 | 12472, // VADDSUBPSrr |
| 78198 | 12475, // VAESDECLASTYrm |
| 78199 | 12478, // VAESDECLASTYrr |
| 78200 | 12481, // VAESDECLASTZ128rm |
| 78201 | 12484, // VAESDECLASTZ128rr |
| 78202 | 12487, // VAESDECLASTZ256rm |
| 78203 | 12490, // VAESDECLASTZ256rr |
| 78204 | 12493, // VAESDECLASTZrm |
| 78205 | 12496, // VAESDECLASTZrr |
| 78206 | 12499, // VAESDECLASTrm |
| 78207 | 12502, // VAESDECLASTrr |
| 78208 | 12505, // VAESDECYrm |
| 78209 | 12508, // VAESDECYrr |
| 78210 | 12511, // VAESDECZ128rm |
| 78211 | 12514, // VAESDECZ128rr |
| 78212 | 12517, // VAESDECZ256rm |
| 78213 | 12520, // VAESDECZ256rr |
| 78214 | 12523, // VAESDECZrm |
| 78215 | 12526, // VAESDECZrr |
| 78216 | 12529, // VAESDECrm |
| 78217 | 12532, // VAESDECrr |
| 78218 | 12535, // VAESENCLASTYrm |
| 78219 | 12538, // VAESENCLASTYrr |
| 78220 | 12541, // VAESENCLASTZ128rm |
| 78221 | 12544, // VAESENCLASTZ128rr |
| 78222 | 12547, // VAESENCLASTZ256rm |
| 78223 | 12550, // VAESENCLASTZ256rr |
| 78224 | 12553, // VAESENCLASTZrm |
| 78225 | 12556, // VAESENCLASTZrr |
| 78226 | 12559, // VAESENCLASTrm |
| 78227 | 12562, // VAESENCLASTrr |
| 78228 | 12565, // VAESENCYrm |
| 78229 | 12568, // VAESENCYrr |
| 78230 | 12571, // VAESENCZ128rm |
| 78231 | 12574, // VAESENCZ128rr |
| 78232 | 12577, // VAESENCZ256rm |
| 78233 | 12580, // VAESENCZ256rr |
| 78234 | 12583, // VAESENCZrm |
| 78235 | 12586, // VAESENCZrr |
| 78236 | 12589, // VAESENCrm |
| 78237 | 12592, // VAESENCrr |
| 78238 | 12595, // VAESIMCrm |
| 78239 | 12597, // VAESIMCrr |
| 78240 | 12599, // VAESKEYGENASSIST128rm |
| 78241 | 12602, // VAESKEYGENASSIST128rr |
| 78242 | 12605, // VALIGNDZ128rmbi |
| 78243 | 12609, // VALIGNDZ128rmbik |
| 78244 | 12615, // VALIGNDZ128rmbikz |
| 78245 | 12620, // VALIGNDZ128rmi |
| 78246 | 12624, // VALIGNDZ128rmik |
| 78247 | 12630, // VALIGNDZ128rmikz |
| 78248 | 12635, // VALIGNDZ128rri |
| 78249 | 12639, // VALIGNDZ128rrik |
| 78250 | 12645, // VALIGNDZ128rrikz |
| 78251 | 12650, // VALIGNDZ256rmbi |
| 78252 | 12654, // VALIGNDZ256rmbik |
| 78253 | 12660, // VALIGNDZ256rmbikz |
| 78254 | 12665, // VALIGNDZ256rmi |
| 78255 | 12669, // VALIGNDZ256rmik |
| 78256 | 12675, // VALIGNDZ256rmikz |
| 78257 | 12680, // VALIGNDZ256rri |
| 78258 | 12684, // VALIGNDZ256rrik |
| 78259 | 12690, // VALIGNDZ256rrikz |
| 78260 | 12695, // VALIGNDZrmbi |
| 78261 | 12699, // VALIGNDZrmbik |
| 78262 | 12705, // VALIGNDZrmbikz |
| 78263 | 12710, // VALIGNDZrmi |
| 78264 | 12714, // VALIGNDZrmik |
| 78265 | 12720, // VALIGNDZrmikz |
| 78266 | 12725, // VALIGNDZrri |
| 78267 | 12729, // VALIGNDZrrik |
| 78268 | 12735, // VALIGNDZrrikz |
| 78269 | 12740, // VALIGNQZ128rmbi |
| 78270 | 12744, // VALIGNQZ128rmbik |
| 78271 | 12750, // VALIGNQZ128rmbikz |
| 78272 | 12755, // VALIGNQZ128rmi |
| 78273 | 12759, // VALIGNQZ128rmik |
| 78274 | 12765, // VALIGNQZ128rmikz |
| 78275 | 12770, // VALIGNQZ128rri |
| 78276 | 12774, // VALIGNQZ128rrik |
| 78277 | 12780, // VALIGNQZ128rrikz |
| 78278 | 12785, // VALIGNQZ256rmbi |
| 78279 | 12789, // VALIGNQZ256rmbik |
| 78280 | 12795, // VALIGNQZ256rmbikz |
| 78281 | 12800, // VALIGNQZ256rmi |
| 78282 | 12804, // VALIGNQZ256rmik |
| 78283 | 12810, // VALIGNQZ256rmikz |
| 78284 | 12815, // VALIGNQZ256rri |
| 78285 | 12819, // VALIGNQZ256rrik |
| 78286 | 12825, // VALIGNQZ256rrikz |
| 78287 | 12830, // VALIGNQZrmbi |
| 78288 | 12834, // VALIGNQZrmbik |
| 78289 | 12840, // VALIGNQZrmbikz |
| 78290 | 12845, // VALIGNQZrmi |
| 78291 | 12849, // VALIGNQZrmik |
| 78292 | 12855, // VALIGNQZrmikz |
| 78293 | 12860, // VALIGNQZrri |
| 78294 | 12864, // VALIGNQZrrik |
| 78295 | 12870, // VALIGNQZrrikz |
| 78296 | 12875, // VANDNPDYrm |
| 78297 | 12878, // VANDNPDYrr |
| 78298 | 12881, // VANDNPDZ128rm |
| 78299 | 12884, // VANDNPDZ128rmb |
| 78300 | 12887, // VANDNPDZ128rmbk |
| 78301 | 12892, // VANDNPDZ128rmbkz |
| 78302 | 12896, // VANDNPDZ128rmk |
| 78303 | 12901, // VANDNPDZ128rmkz |
| 78304 | 12905, // VANDNPDZ128rr |
| 78305 | 12908, // VANDNPDZ128rrk |
| 78306 | 12913, // VANDNPDZ128rrkz |
| 78307 | 12917, // VANDNPDZ256rm |
| 78308 | 12920, // VANDNPDZ256rmb |
| 78309 | 12923, // VANDNPDZ256rmbk |
| 78310 | 12928, // VANDNPDZ256rmbkz |
| 78311 | 12932, // VANDNPDZ256rmk |
| 78312 | 12937, // VANDNPDZ256rmkz |
| 78313 | 12941, // VANDNPDZ256rr |
| 78314 | 12944, // VANDNPDZ256rrk |
| 78315 | 12949, // VANDNPDZ256rrkz |
| 78316 | 12953, // VANDNPDZrm |
| 78317 | 12956, // VANDNPDZrmb |
| 78318 | 12959, // VANDNPDZrmbk |
| 78319 | 12964, // VANDNPDZrmbkz |
| 78320 | 12968, // VANDNPDZrmk |
| 78321 | 12973, // VANDNPDZrmkz |
| 78322 | 12977, // VANDNPDZrr |
| 78323 | 12980, // VANDNPDZrrk |
| 78324 | 12985, // VANDNPDZrrkz |
| 78325 | 12989, // VANDNPDrm |
| 78326 | 12992, // VANDNPDrr |
| 78327 | 12995, // VANDNPSYrm |
| 78328 | 12998, // VANDNPSYrr |
| 78329 | 13001, // VANDNPSZ128rm |
| 78330 | 13004, // VANDNPSZ128rmb |
| 78331 | 13007, // VANDNPSZ128rmbk |
| 78332 | 13012, // VANDNPSZ128rmbkz |
| 78333 | 13016, // VANDNPSZ128rmk |
| 78334 | 13021, // VANDNPSZ128rmkz |
| 78335 | 13025, // VANDNPSZ128rr |
| 78336 | 13028, // VANDNPSZ128rrk |
| 78337 | 13033, // VANDNPSZ128rrkz |
| 78338 | 13037, // VANDNPSZ256rm |
| 78339 | 13040, // VANDNPSZ256rmb |
| 78340 | 13043, // VANDNPSZ256rmbk |
| 78341 | 13048, // VANDNPSZ256rmbkz |
| 78342 | 13052, // VANDNPSZ256rmk |
| 78343 | 13057, // VANDNPSZ256rmkz |
| 78344 | 13061, // VANDNPSZ256rr |
| 78345 | 13064, // VANDNPSZ256rrk |
| 78346 | 13069, // VANDNPSZ256rrkz |
| 78347 | 13073, // VANDNPSZrm |
| 78348 | 13076, // VANDNPSZrmb |
| 78349 | 13079, // VANDNPSZrmbk |
| 78350 | 13084, // VANDNPSZrmbkz |
| 78351 | 13088, // VANDNPSZrmk |
| 78352 | 13093, // VANDNPSZrmkz |
| 78353 | 13097, // VANDNPSZrr |
| 78354 | 13100, // VANDNPSZrrk |
| 78355 | 13105, // VANDNPSZrrkz |
| 78356 | 13109, // VANDNPSrm |
| 78357 | 13112, // VANDNPSrr |
| 78358 | 13115, // VANDPDYrm |
| 78359 | 13118, // VANDPDYrr |
| 78360 | 13121, // VANDPDZ128rm |
| 78361 | 13124, // VANDPDZ128rmb |
| 78362 | 13127, // VANDPDZ128rmbk |
| 78363 | 13132, // VANDPDZ128rmbkz |
| 78364 | 13136, // VANDPDZ128rmk |
| 78365 | 13141, // VANDPDZ128rmkz |
| 78366 | 13145, // VANDPDZ128rr |
| 78367 | 13148, // VANDPDZ128rrk |
| 78368 | 13153, // VANDPDZ128rrkz |
| 78369 | 13157, // VANDPDZ256rm |
| 78370 | 13160, // VANDPDZ256rmb |
| 78371 | 13163, // VANDPDZ256rmbk |
| 78372 | 13168, // VANDPDZ256rmbkz |
| 78373 | 13172, // VANDPDZ256rmk |
| 78374 | 13177, // VANDPDZ256rmkz |
| 78375 | 13181, // VANDPDZ256rr |
| 78376 | 13184, // VANDPDZ256rrk |
| 78377 | 13189, // VANDPDZ256rrkz |
| 78378 | 13193, // VANDPDZrm |
| 78379 | 13196, // VANDPDZrmb |
| 78380 | 13199, // VANDPDZrmbk |
| 78381 | 13204, // VANDPDZrmbkz |
| 78382 | 13208, // VANDPDZrmk |
| 78383 | 13213, // VANDPDZrmkz |
| 78384 | 13217, // VANDPDZrr |
| 78385 | 13220, // VANDPDZrrk |
| 78386 | 13225, // VANDPDZrrkz |
| 78387 | 13229, // VANDPDrm |
| 78388 | 13232, // VANDPDrr |
| 78389 | 13235, // VANDPSYrm |
| 78390 | 13238, // VANDPSYrr |
| 78391 | 13241, // VANDPSZ128rm |
| 78392 | 13244, // VANDPSZ128rmb |
| 78393 | 13247, // VANDPSZ128rmbk |
| 78394 | 13252, // VANDPSZ128rmbkz |
| 78395 | 13256, // VANDPSZ128rmk |
| 78396 | 13261, // VANDPSZ128rmkz |
| 78397 | 13265, // VANDPSZ128rr |
| 78398 | 13268, // VANDPSZ128rrk |
| 78399 | 13273, // VANDPSZ128rrkz |
| 78400 | 13277, // VANDPSZ256rm |
| 78401 | 13280, // VANDPSZ256rmb |
| 78402 | 13283, // VANDPSZ256rmbk |
| 78403 | 13288, // VANDPSZ256rmbkz |
| 78404 | 13292, // VANDPSZ256rmk |
| 78405 | 13297, // VANDPSZ256rmkz |
| 78406 | 13301, // VANDPSZ256rr |
| 78407 | 13304, // VANDPSZ256rrk |
| 78408 | 13309, // VANDPSZ256rrkz |
| 78409 | 13313, // VANDPSZrm |
| 78410 | 13316, // VANDPSZrmb |
| 78411 | 13319, // VANDPSZrmbk |
| 78412 | 13324, // VANDPSZrmbkz |
| 78413 | 13328, // VANDPSZrmk |
| 78414 | 13333, // VANDPSZrmkz |
| 78415 | 13337, // VANDPSZrr |
| 78416 | 13340, // VANDPSZrrk |
| 78417 | 13345, // VANDPSZrrkz |
| 78418 | 13349, // VANDPSrm |
| 78419 | 13352, // VANDPSrr |
| 78420 | 13355, // VASTART_SAVE_XMM_REGS |
| 78421 | 13357, // VBCSTNEBF162PSYrm |
| 78422 | 13359, // VBCSTNEBF162PSrm |
| 78423 | 13361, // VBCSTNESH2PSYrm |
| 78424 | 13363, // VBCSTNESH2PSrm |
| 78425 | 13365, // VBLENDMPDZ128rm |
| 78426 | 13368, // VBLENDMPDZ128rmb |
| 78427 | 13371, // VBLENDMPDZ128rmbk |
| 78428 | 13375, // VBLENDMPDZ128rmbkz |
| 78429 | 13379, // VBLENDMPDZ128rmk |
| 78430 | 13383, // VBLENDMPDZ128rmkz |
| 78431 | 13387, // VBLENDMPDZ128rr |
| 78432 | 13390, // VBLENDMPDZ128rrk |
| 78433 | 13394, // VBLENDMPDZ128rrkz |
| 78434 | 13398, // VBLENDMPDZ256rm |
| 78435 | 13401, // VBLENDMPDZ256rmb |
| 78436 | 13404, // VBLENDMPDZ256rmbk |
| 78437 | 13408, // VBLENDMPDZ256rmbkz |
| 78438 | 13412, // VBLENDMPDZ256rmk |
| 78439 | 13416, // VBLENDMPDZ256rmkz |
| 78440 | 13420, // VBLENDMPDZ256rr |
| 78441 | 13423, // VBLENDMPDZ256rrk |
| 78442 | 13427, // VBLENDMPDZ256rrkz |
| 78443 | 13431, // VBLENDMPDZrm |
| 78444 | 13434, // VBLENDMPDZrmb |
| 78445 | 13437, // VBLENDMPDZrmbk |
| 78446 | 13441, // VBLENDMPDZrmbkz |
| 78447 | 13445, // VBLENDMPDZrmk |
| 78448 | 13449, // VBLENDMPDZrmkz |
| 78449 | 13453, // VBLENDMPDZrr |
| 78450 | 13456, // VBLENDMPDZrrk |
| 78451 | 13460, // VBLENDMPDZrrkz |
| 78452 | 13464, // VBLENDMPSZ128rm |
| 78453 | 13467, // VBLENDMPSZ128rmb |
| 78454 | 13470, // VBLENDMPSZ128rmbk |
| 78455 | 13474, // VBLENDMPSZ128rmbkz |
| 78456 | 13478, // VBLENDMPSZ128rmk |
| 78457 | 13482, // VBLENDMPSZ128rmkz |
| 78458 | 13486, // VBLENDMPSZ128rr |
| 78459 | 13489, // VBLENDMPSZ128rrk |
| 78460 | 13493, // VBLENDMPSZ128rrkz |
| 78461 | 13497, // VBLENDMPSZ256rm |
| 78462 | 13500, // VBLENDMPSZ256rmb |
| 78463 | 13503, // VBLENDMPSZ256rmbk |
| 78464 | 13507, // VBLENDMPSZ256rmbkz |
| 78465 | 13511, // VBLENDMPSZ256rmk |
| 78466 | 13515, // VBLENDMPSZ256rmkz |
| 78467 | 13519, // VBLENDMPSZ256rr |
| 78468 | 13522, // VBLENDMPSZ256rrk |
| 78469 | 13526, // VBLENDMPSZ256rrkz |
| 78470 | 13530, // VBLENDMPSZrm |
| 78471 | 13533, // VBLENDMPSZrmb |
| 78472 | 13536, // VBLENDMPSZrmbk |
| 78473 | 13540, // VBLENDMPSZrmbkz |
| 78474 | 13544, // VBLENDMPSZrmk |
| 78475 | 13548, // VBLENDMPSZrmkz |
| 78476 | 13552, // VBLENDMPSZrr |
| 78477 | 13555, // VBLENDMPSZrrk |
| 78478 | 13559, // VBLENDMPSZrrkz |
| 78479 | 13563, // VBLENDPDYrmi |
| 78480 | 13567, // VBLENDPDYrri |
| 78481 | 13571, // VBLENDPDrmi |
| 78482 | 13575, // VBLENDPDrri |
| 78483 | 13579, // VBLENDPSYrmi |
| 78484 | 13583, // VBLENDPSYrri |
| 78485 | 13587, // VBLENDPSrmi |
| 78486 | 13591, // VBLENDPSrri |
| 78487 | 13595, // VBLENDVPDYrmr |
| 78488 | 13599, // VBLENDVPDYrrr |
| 78489 | 13603, // VBLENDVPDrmr |
| 78490 | 13607, // VBLENDVPDrrr |
| 78491 | 13611, // VBLENDVPSYrmr |
| 78492 | 13615, // VBLENDVPSYrrr |
| 78493 | 13619, // VBLENDVPSrmr |
| 78494 | 13623, // VBLENDVPSrrr |
| 78495 | 13627, // VBROADCASTF128rm |
| 78496 | 13629, // VBROADCASTF32X2Z256rm |
| 78497 | 13631, // VBROADCASTF32X2Z256rmk |
| 78498 | 13635, // VBROADCASTF32X2Z256rmkz |
| 78499 | 13638, // VBROADCASTF32X2Z256rr |
| 78500 | 13640, // VBROADCASTF32X2Z256rrk |
| 78501 | 13644, // VBROADCASTF32X2Z256rrkz |
| 78502 | 13647, // VBROADCASTF32X2Zrm |
| 78503 | 13649, // VBROADCASTF32X2Zrmk |
| 78504 | 13653, // VBROADCASTF32X2Zrmkz |
| 78505 | 13656, // VBROADCASTF32X2Zrr |
| 78506 | 13658, // VBROADCASTF32X2Zrrk |
| 78507 | 13662, // VBROADCASTF32X2Zrrkz |
| 78508 | 13665, // VBROADCASTF32X4Z256rm |
| 78509 | 13667, // VBROADCASTF32X4Z256rmk |
| 78510 | 13671, // VBROADCASTF32X4Z256rmkz |
| 78511 | 13674, // VBROADCASTF32X4Zrm |
| 78512 | 13676, // VBROADCASTF32X4Zrmk |
| 78513 | 13680, // VBROADCASTF32X4Zrmkz |
| 78514 | 13683, // VBROADCASTF32X8Zrm |
| 78515 | 13685, // VBROADCASTF32X8Zrmk |
| 78516 | 13689, // VBROADCASTF32X8Zrmkz |
| 78517 | 13692, // VBROADCASTF64X2Z256rm |
| 78518 | 13694, // VBROADCASTF64X2Z256rmk |
| 78519 | 13698, // VBROADCASTF64X2Z256rmkz |
| 78520 | 13701, // VBROADCASTF64X2Zrm |
| 78521 | 13703, // VBROADCASTF64X2Zrmk |
| 78522 | 13707, // VBROADCASTF64X2Zrmkz |
| 78523 | 13710, // VBROADCASTF64X4Zrm |
| 78524 | 13712, // VBROADCASTF64X4Zrmk |
| 78525 | 13716, // VBROADCASTF64X4Zrmkz |
| 78526 | 13719, // VBROADCASTI128rm |
| 78527 | 13721, // VBROADCASTI32X2Z128rm |
| 78528 | 13723, // VBROADCASTI32X2Z128rmk |
| 78529 | 13727, // VBROADCASTI32X2Z128rmkz |
| 78530 | 13730, // VBROADCASTI32X2Z128rr |
| 78531 | 13732, // VBROADCASTI32X2Z128rrk |
| 78532 | 13736, // VBROADCASTI32X2Z128rrkz |
| 78533 | 13739, // VBROADCASTI32X2Z256rm |
| 78534 | 13741, // VBROADCASTI32X2Z256rmk |
| 78535 | 13745, // VBROADCASTI32X2Z256rmkz |
| 78536 | 13748, // VBROADCASTI32X2Z256rr |
| 78537 | 13750, // VBROADCASTI32X2Z256rrk |
| 78538 | 13754, // VBROADCASTI32X2Z256rrkz |
| 78539 | 13757, // VBROADCASTI32X2Zrm |
| 78540 | 13759, // VBROADCASTI32X2Zrmk |
| 78541 | 13763, // VBROADCASTI32X2Zrmkz |
| 78542 | 13766, // VBROADCASTI32X2Zrr |
| 78543 | 13768, // VBROADCASTI32X2Zrrk |
| 78544 | 13772, // VBROADCASTI32X2Zrrkz |
| 78545 | 13775, // VBROADCASTI32X4Z256rm |
| 78546 | 13777, // VBROADCASTI32X4Z256rmk |
| 78547 | 13781, // VBROADCASTI32X4Z256rmkz |
| 78548 | 13784, // VBROADCASTI32X4Zrm |
| 78549 | 13786, // VBROADCASTI32X4Zrmk |
| 78550 | 13790, // VBROADCASTI32X4Zrmkz |
| 78551 | 13793, // VBROADCASTI32X8Zrm |
| 78552 | 13795, // VBROADCASTI32X8Zrmk |
| 78553 | 13799, // VBROADCASTI32X8Zrmkz |
| 78554 | 13802, // VBROADCASTI64X2Z256rm |
| 78555 | 13804, // VBROADCASTI64X2Z256rmk |
| 78556 | 13808, // VBROADCASTI64X2Z256rmkz |
| 78557 | 13811, // VBROADCASTI64X2Zrm |
| 78558 | 13813, // VBROADCASTI64X2Zrmk |
| 78559 | 13817, // VBROADCASTI64X2Zrmkz |
| 78560 | 13820, // VBROADCASTI64X4Zrm |
| 78561 | 13822, // VBROADCASTI64X4Zrmk |
| 78562 | 13826, // VBROADCASTI64X4Zrmkz |
| 78563 | 13829, // VBROADCASTSDYrm |
| 78564 | 13831, // VBROADCASTSDYrr |
| 78565 | 13833, // VBROADCASTSDZ256rm |
| 78566 | 13835, // VBROADCASTSDZ256rmk |
| 78567 | 13839, // VBROADCASTSDZ256rmkz |
| 78568 | 13842, // VBROADCASTSDZ256rr |
| 78569 | 13844, // VBROADCASTSDZ256rrk |
| 78570 | 13848, // VBROADCASTSDZ256rrkz |
| 78571 | 13851, // VBROADCASTSDZrm |
| 78572 | 13853, // VBROADCASTSDZrmk |
| 78573 | 13857, // VBROADCASTSDZrmkz |
| 78574 | 13860, // VBROADCASTSDZrr |
| 78575 | 13862, // VBROADCASTSDZrrk |
| 78576 | 13866, // VBROADCASTSDZrrkz |
| 78577 | 13869, // VBROADCASTSSYrm |
| 78578 | 13871, // VBROADCASTSSYrr |
| 78579 | 13873, // VBROADCASTSSZ128rm |
| 78580 | 13875, // VBROADCASTSSZ128rmk |
| 78581 | 13879, // VBROADCASTSSZ128rmkz |
| 78582 | 13882, // VBROADCASTSSZ128rr |
| 78583 | 13884, // VBROADCASTSSZ128rrk |
| 78584 | 13888, // VBROADCASTSSZ128rrkz |
| 78585 | 13891, // VBROADCASTSSZ256rm |
| 78586 | 13893, // VBROADCASTSSZ256rmk |
| 78587 | 13897, // VBROADCASTSSZ256rmkz |
| 78588 | 13900, // VBROADCASTSSZ256rr |
| 78589 | 13902, // VBROADCASTSSZ256rrk |
| 78590 | 13906, // VBROADCASTSSZ256rrkz |
| 78591 | 13909, // VBROADCASTSSZrm |
| 78592 | 13911, // VBROADCASTSSZrmk |
| 78593 | 13915, // VBROADCASTSSZrmkz |
| 78594 | 13918, // VBROADCASTSSZrr |
| 78595 | 13920, // VBROADCASTSSZrrk |
| 78596 | 13924, // VBROADCASTSSZrrkz |
| 78597 | 13927, // VBROADCASTSSrm |
| 78598 | 13929, // VBROADCASTSSrr |
| 78599 | 13931, // VCMPBF16Z128rmbi |
| 78600 | 13935, // VCMPBF16Z128rmbik |
| 78601 | 13940, // VCMPBF16Z128rmi |
| 78602 | 13944, // VCMPBF16Z128rmik |
| 78603 | 13949, // VCMPBF16Z128rri |
| 78604 | 13953, // VCMPBF16Z128rrik |
| 78605 | 13958, // VCMPBF16Z256rmbi |
| 78606 | 13962, // VCMPBF16Z256rmbik |
| 78607 | 13967, // VCMPBF16Z256rmi |
| 78608 | 13971, // VCMPBF16Z256rmik |
| 78609 | 13976, // VCMPBF16Z256rri |
| 78610 | 13980, // VCMPBF16Z256rrik |
| 78611 | 13985, // VCMPBF16Zrmbi |
| 78612 | 13989, // VCMPBF16Zrmbik |
| 78613 | 13994, // VCMPBF16Zrmi |
| 78614 | 13998, // VCMPBF16Zrmik |
| 78615 | 14003, // VCMPBF16Zrri |
| 78616 | 14007, // VCMPBF16Zrrik |
| 78617 | 14012, // VCMPPDYrmi |
| 78618 | 14016, // VCMPPDYrri |
| 78619 | 14020, // VCMPPDZ128rmbi |
| 78620 | 14024, // VCMPPDZ128rmbik |
| 78621 | 14029, // VCMPPDZ128rmi |
| 78622 | 14033, // VCMPPDZ128rmik |
| 78623 | 14038, // VCMPPDZ128rri |
| 78624 | 14042, // VCMPPDZ128rrik |
| 78625 | 14047, // VCMPPDZ256rmbi |
| 78626 | 14051, // VCMPPDZ256rmbik |
| 78627 | 14056, // VCMPPDZ256rmi |
| 78628 | 14060, // VCMPPDZ256rmik |
| 78629 | 14065, // VCMPPDZ256rri |
| 78630 | 14069, // VCMPPDZ256rrik |
| 78631 | 14074, // VCMPPDZrmbi |
| 78632 | 14078, // VCMPPDZrmbik |
| 78633 | 14083, // VCMPPDZrmi |
| 78634 | 14087, // VCMPPDZrmik |
| 78635 | 14092, // VCMPPDZrri |
| 78636 | 14096, // VCMPPDZrrib |
| 78637 | 14100, // VCMPPDZrribk |
| 78638 | 14105, // VCMPPDZrrik |
| 78639 | 14110, // VCMPPDrmi |
| 78640 | 14114, // VCMPPDrri |
| 78641 | 14118, // VCMPPHZ128rmbi |
| 78642 | 14122, // VCMPPHZ128rmbik |
| 78643 | 14127, // VCMPPHZ128rmi |
| 78644 | 14131, // VCMPPHZ128rmik |
| 78645 | 14136, // VCMPPHZ128rri |
| 78646 | 14140, // VCMPPHZ128rrik |
| 78647 | 14145, // VCMPPHZ256rmbi |
| 78648 | 14149, // VCMPPHZ256rmbik |
| 78649 | 14154, // VCMPPHZ256rmi |
| 78650 | 14158, // VCMPPHZ256rmik |
| 78651 | 14163, // VCMPPHZ256rri |
| 78652 | 14167, // VCMPPHZ256rrik |
| 78653 | 14172, // VCMPPHZrmbi |
| 78654 | 14176, // VCMPPHZrmbik |
| 78655 | 14181, // VCMPPHZrmi |
| 78656 | 14185, // VCMPPHZrmik |
| 78657 | 14190, // VCMPPHZrri |
| 78658 | 14194, // VCMPPHZrrib |
| 78659 | 14198, // VCMPPHZrribk |
| 78660 | 14203, // VCMPPHZrrik |
| 78661 | 14208, // VCMPPSYrmi |
| 78662 | 14212, // VCMPPSYrri |
| 78663 | 14216, // VCMPPSZ128rmbi |
| 78664 | 14220, // VCMPPSZ128rmbik |
| 78665 | 14225, // VCMPPSZ128rmi |
| 78666 | 14229, // VCMPPSZ128rmik |
| 78667 | 14234, // VCMPPSZ128rri |
| 78668 | 14238, // VCMPPSZ128rrik |
| 78669 | 14243, // VCMPPSZ256rmbi |
| 78670 | 14247, // VCMPPSZ256rmbik |
| 78671 | 14252, // VCMPPSZ256rmi |
| 78672 | 14256, // VCMPPSZ256rmik |
| 78673 | 14261, // VCMPPSZ256rri |
| 78674 | 14265, // VCMPPSZ256rrik |
| 78675 | 14270, // VCMPPSZrmbi |
| 78676 | 14274, // VCMPPSZrmbik |
| 78677 | 14279, // VCMPPSZrmi |
| 78678 | 14283, // VCMPPSZrmik |
| 78679 | 14288, // VCMPPSZrri |
| 78680 | 14292, // VCMPPSZrrib |
| 78681 | 14296, // VCMPPSZrribk |
| 78682 | 14301, // VCMPPSZrrik |
| 78683 | 14306, // VCMPPSrmi |
| 78684 | 14310, // VCMPPSrri |
| 78685 | 14314, // VCMPSDZrmi |
| 78686 | 14318, // VCMPSDZrmi_Int |
| 78687 | 14322, // VCMPSDZrmik_Int |
| 78688 | 14327, // VCMPSDZrri |
| 78689 | 14331, // VCMPSDZrri_Int |
| 78690 | 14335, // VCMPSDZrrib_Int |
| 78691 | 14339, // VCMPSDZrribk_Int |
| 78692 | 14344, // VCMPSDZrrik_Int |
| 78693 | 14349, // VCMPSDrmi |
| 78694 | 14353, // VCMPSDrmi_Int |
| 78695 | 14357, // VCMPSDrri |
| 78696 | 14361, // VCMPSDrri_Int |
| 78697 | 14365, // VCMPSHZrmi |
| 78698 | 14369, // VCMPSHZrmi_Int |
| 78699 | 14373, // VCMPSHZrmik_Int |
| 78700 | 14378, // VCMPSHZrri |
| 78701 | 14382, // VCMPSHZrri_Int |
| 78702 | 14386, // VCMPSHZrrib_Int |
| 78703 | 14390, // VCMPSHZrribk_Int |
| 78704 | 14395, // VCMPSHZrrik_Int |
| 78705 | 14400, // VCMPSSZrmi |
| 78706 | 14404, // VCMPSSZrmi_Int |
| 78707 | 14408, // VCMPSSZrmik_Int |
| 78708 | 14413, // VCMPSSZrri |
| 78709 | 14417, // VCMPSSZrri_Int |
| 78710 | 14421, // VCMPSSZrrib_Int |
| 78711 | 14425, // VCMPSSZrribk_Int |
| 78712 | 14430, // VCMPSSZrrik_Int |
| 78713 | 14435, // VCMPSSrmi |
| 78714 | 14439, // VCMPSSrmi_Int |
| 78715 | 14443, // VCMPSSrri |
| 78716 | 14447, // VCMPSSrri_Int |
| 78717 | 14451, // VCOMISBF16Zrm |
| 78718 | 14453, // VCOMISBF16Zrm_Int |
| 78719 | 14455, // VCOMISBF16Zrr |
| 78720 | 14457, // VCOMISBF16Zrr_Int |
| 78721 | 14459, // VCOMISDZrm |
| 78722 | 14461, // VCOMISDZrm_Int |
| 78723 | 14463, // VCOMISDZrr |
| 78724 | 14465, // VCOMISDZrr_Int |
| 78725 | 14467, // VCOMISDZrrb |
| 78726 | 14469, // VCOMISDrm |
| 78727 | 14471, // VCOMISDrm_Int |
| 78728 | 14473, // VCOMISDrr |
| 78729 | 14475, // VCOMISDrr_Int |
| 78730 | 14477, // VCOMISHZrm |
| 78731 | 14479, // VCOMISHZrm_Int |
| 78732 | 14481, // VCOMISHZrr |
| 78733 | 14483, // VCOMISHZrr_Int |
| 78734 | 14485, // VCOMISHZrrb |
| 78735 | 14487, // VCOMISSZrm |
| 78736 | 14489, // VCOMISSZrm_Int |
| 78737 | 14491, // VCOMISSZrr |
| 78738 | 14493, // VCOMISSZrr_Int |
| 78739 | 14495, // VCOMISSZrrb |
| 78740 | 14497, // VCOMISSrm |
| 78741 | 14499, // VCOMISSrm_Int |
| 78742 | 14501, // VCOMISSrr |
| 78743 | 14503, // VCOMISSrr_Int |
| 78744 | 14505, // VCOMPRESSPDZ128mr |
| 78745 | 14507, // VCOMPRESSPDZ128mrk |
| 78746 | 14510, // VCOMPRESSPDZ128rr |
| 78747 | 14512, // VCOMPRESSPDZ128rrk |
| 78748 | 14516, // VCOMPRESSPDZ128rrkz |
| 78749 | 14519, // VCOMPRESSPDZ256mr |
| 78750 | 14521, // VCOMPRESSPDZ256mrk |
| 78751 | 14524, // VCOMPRESSPDZ256rr |
| 78752 | 14526, // VCOMPRESSPDZ256rrk |
| 78753 | 14530, // VCOMPRESSPDZ256rrkz |
| 78754 | 14533, // VCOMPRESSPDZmr |
| 78755 | 14535, // VCOMPRESSPDZmrk |
| 78756 | 14538, // VCOMPRESSPDZrr |
| 78757 | 14540, // VCOMPRESSPDZrrk |
| 78758 | 14544, // VCOMPRESSPDZrrkz |
| 78759 | 14547, // VCOMPRESSPSZ128mr |
| 78760 | 14549, // VCOMPRESSPSZ128mrk |
| 78761 | 14552, // VCOMPRESSPSZ128rr |
| 78762 | 14554, // VCOMPRESSPSZ128rrk |
| 78763 | 14558, // VCOMPRESSPSZ128rrkz |
| 78764 | 14561, // VCOMPRESSPSZ256mr |
| 78765 | 14563, // VCOMPRESSPSZ256mrk |
| 78766 | 14566, // VCOMPRESSPSZ256rr |
| 78767 | 14568, // VCOMPRESSPSZ256rrk |
| 78768 | 14572, // VCOMPRESSPSZ256rrkz |
| 78769 | 14575, // VCOMPRESSPSZmr |
| 78770 | 14577, // VCOMPRESSPSZmrk |
| 78771 | 14580, // VCOMPRESSPSZrr |
| 78772 | 14582, // VCOMPRESSPSZrrk |
| 78773 | 14586, // VCOMPRESSPSZrrkz |
| 78774 | 14589, // VCOMXSDZrm_Int |
| 78775 | 14591, // VCOMXSDZrr_Int |
| 78776 | 14593, // VCOMXSDZrrb_Int |
| 78777 | 14595, // VCOMXSHZrm_Int |
| 78778 | 14597, // VCOMXSHZrr_Int |
| 78779 | 14599, // VCOMXSHZrrb_Int |
| 78780 | 14601, // VCOMXSSZrm_Int |
| 78781 | 14603, // VCOMXSSZrr_Int |
| 78782 | 14605, // VCOMXSSZrrb_Int |
| 78783 | 14607, // VCVT2PH2BF8SZ128rm |
| 78784 | 14610, // VCVT2PH2BF8SZ128rmb |
| 78785 | 14613, // VCVT2PH2BF8SZ128rmbk |
| 78786 | 14618, // VCVT2PH2BF8SZ128rmbkz |
| 78787 | 14622, // VCVT2PH2BF8SZ128rmk |
| 78788 | 14627, // VCVT2PH2BF8SZ128rmkz |
| 78789 | 14631, // VCVT2PH2BF8SZ128rr |
| 78790 | 14634, // VCVT2PH2BF8SZ128rrk |
| 78791 | 14639, // VCVT2PH2BF8SZ128rrkz |
| 78792 | 14643, // VCVT2PH2BF8SZ256rm |
| 78793 | 14646, // VCVT2PH2BF8SZ256rmb |
| 78794 | 14649, // VCVT2PH2BF8SZ256rmbk |
| 78795 | 14654, // VCVT2PH2BF8SZ256rmbkz |
| 78796 | 14658, // VCVT2PH2BF8SZ256rmk |
| 78797 | 14663, // VCVT2PH2BF8SZ256rmkz |
| 78798 | 14667, // VCVT2PH2BF8SZ256rr |
| 78799 | 14670, // VCVT2PH2BF8SZ256rrk |
| 78800 | 14675, // VCVT2PH2BF8SZ256rrkz |
| 78801 | 14679, // VCVT2PH2BF8SZrm |
| 78802 | 14682, // VCVT2PH2BF8SZrmb |
| 78803 | 14685, // VCVT2PH2BF8SZrmbk |
| 78804 | 14690, // VCVT2PH2BF8SZrmbkz |
| 78805 | 14694, // VCVT2PH2BF8SZrmk |
| 78806 | 14699, // VCVT2PH2BF8SZrmkz |
| 78807 | 14703, // VCVT2PH2BF8SZrr |
| 78808 | 14706, // VCVT2PH2BF8SZrrk |
| 78809 | 14711, // VCVT2PH2BF8SZrrkz |
| 78810 | 14715, // VCVT2PH2BF8Z128rm |
| 78811 | 14718, // VCVT2PH2BF8Z128rmb |
| 78812 | 14721, // VCVT2PH2BF8Z128rmbk |
| 78813 | 14726, // VCVT2PH2BF8Z128rmbkz |
| 78814 | 14730, // VCVT2PH2BF8Z128rmk |
| 78815 | 14735, // VCVT2PH2BF8Z128rmkz |
| 78816 | 14739, // VCVT2PH2BF8Z128rr |
| 78817 | 14742, // VCVT2PH2BF8Z128rrk |
| 78818 | 14747, // VCVT2PH2BF8Z128rrkz |
| 78819 | 14751, // VCVT2PH2BF8Z256rm |
| 78820 | 14754, // VCVT2PH2BF8Z256rmb |
| 78821 | 14757, // VCVT2PH2BF8Z256rmbk |
| 78822 | 14762, // VCVT2PH2BF8Z256rmbkz |
| 78823 | 14766, // VCVT2PH2BF8Z256rmk |
| 78824 | 14771, // VCVT2PH2BF8Z256rmkz |
| 78825 | 14775, // VCVT2PH2BF8Z256rr |
| 78826 | 14778, // VCVT2PH2BF8Z256rrk |
| 78827 | 14783, // VCVT2PH2BF8Z256rrkz |
| 78828 | 14787, // VCVT2PH2BF8Zrm |
| 78829 | 14790, // VCVT2PH2BF8Zrmb |
| 78830 | 14793, // VCVT2PH2BF8Zrmbk |
| 78831 | 14798, // VCVT2PH2BF8Zrmbkz |
| 78832 | 14802, // VCVT2PH2BF8Zrmk |
| 78833 | 14807, // VCVT2PH2BF8Zrmkz |
| 78834 | 14811, // VCVT2PH2BF8Zrr |
| 78835 | 14814, // VCVT2PH2BF8Zrrk |
| 78836 | 14819, // VCVT2PH2BF8Zrrkz |
| 78837 | 14823, // VCVT2PH2HF8SZ128rm |
| 78838 | 14826, // VCVT2PH2HF8SZ128rmb |
| 78839 | 14829, // VCVT2PH2HF8SZ128rmbk |
| 78840 | 14834, // VCVT2PH2HF8SZ128rmbkz |
| 78841 | 14838, // VCVT2PH2HF8SZ128rmk |
| 78842 | 14843, // VCVT2PH2HF8SZ128rmkz |
| 78843 | 14847, // VCVT2PH2HF8SZ128rr |
| 78844 | 14850, // VCVT2PH2HF8SZ128rrk |
| 78845 | 14855, // VCVT2PH2HF8SZ128rrkz |
| 78846 | 14859, // VCVT2PH2HF8SZ256rm |
| 78847 | 14862, // VCVT2PH2HF8SZ256rmb |
| 78848 | 14865, // VCVT2PH2HF8SZ256rmbk |
| 78849 | 14870, // VCVT2PH2HF8SZ256rmbkz |
| 78850 | 14874, // VCVT2PH2HF8SZ256rmk |
| 78851 | 14879, // VCVT2PH2HF8SZ256rmkz |
| 78852 | 14883, // VCVT2PH2HF8SZ256rr |
| 78853 | 14886, // VCVT2PH2HF8SZ256rrk |
| 78854 | 14891, // VCVT2PH2HF8SZ256rrkz |
| 78855 | 14895, // VCVT2PH2HF8SZrm |
| 78856 | 14898, // VCVT2PH2HF8SZrmb |
| 78857 | 14901, // VCVT2PH2HF8SZrmbk |
| 78858 | 14906, // VCVT2PH2HF8SZrmbkz |
| 78859 | 14910, // VCVT2PH2HF8SZrmk |
| 78860 | 14915, // VCVT2PH2HF8SZrmkz |
| 78861 | 14919, // VCVT2PH2HF8SZrr |
| 78862 | 14922, // VCVT2PH2HF8SZrrk |
| 78863 | 14927, // VCVT2PH2HF8SZrrkz |
| 78864 | 14931, // VCVT2PH2HF8Z128rm |
| 78865 | 14934, // VCVT2PH2HF8Z128rmb |
| 78866 | 14937, // VCVT2PH2HF8Z128rmbk |
| 78867 | 14942, // VCVT2PH2HF8Z128rmbkz |
| 78868 | 14946, // VCVT2PH2HF8Z128rmk |
| 78869 | 14951, // VCVT2PH2HF8Z128rmkz |
| 78870 | 14955, // VCVT2PH2HF8Z128rr |
| 78871 | 14958, // VCVT2PH2HF8Z128rrk |
| 78872 | 14963, // VCVT2PH2HF8Z128rrkz |
| 78873 | 14967, // VCVT2PH2HF8Z256rm |
| 78874 | 14970, // VCVT2PH2HF8Z256rmb |
| 78875 | 14973, // VCVT2PH2HF8Z256rmbk |
| 78876 | 14978, // VCVT2PH2HF8Z256rmbkz |
| 78877 | 14982, // VCVT2PH2HF8Z256rmk |
| 78878 | 14987, // VCVT2PH2HF8Z256rmkz |
| 78879 | 14991, // VCVT2PH2HF8Z256rr |
| 78880 | 14994, // VCVT2PH2HF8Z256rrk |
| 78881 | 14999, // VCVT2PH2HF8Z256rrkz |
| 78882 | 15003, // VCVT2PH2HF8Zrm |
| 78883 | 15006, // VCVT2PH2HF8Zrmb |
| 78884 | 15009, // VCVT2PH2HF8Zrmbk |
| 78885 | 15014, // VCVT2PH2HF8Zrmbkz |
| 78886 | 15018, // VCVT2PH2HF8Zrmk |
| 78887 | 15023, // VCVT2PH2HF8Zrmkz |
| 78888 | 15027, // VCVT2PH2HF8Zrr |
| 78889 | 15030, // VCVT2PH2HF8Zrrk |
| 78890 | 15035, // VCVT2PH2HF8Zrrkz |
| 78891 | 15039, // VCVT2PS2PHXZ128rm |
| 78892 | 15042, // VCVT2PS2PHXZ128rmb |
| 78893 | 15045, // VCVT2PS2PHXZ128rmbk |
| 78894 | 15050, // VCVT2PS2PHXZ128rmbkz |
| 78895 | 15054, // VCVT2PS2PHXZ128rmk |
| 78896 | 15059, // VCVT2PS2PHXZ128rmkz |
| 78897 | 15063, // VCVT2PS2PHXZ128rr |
| 78898 | 15066, // VCVT2PS2PHXZ128rrk |
| 78899 | 15071, // VCVT2PS2PHXZ128rrkz |
| 78900 | 15075, // VCVT2PS2PHXZ256rm |
| 78901 | 15078, // VCVT2PS2PHXZ256rmb |
| 78902 | 15081, // VCVT2PS2PHXZ256rmbk |
| 78903 | 15086, // VCVT2PS2PHXZ256rmbkz |
| 78904 | 15090, // VCVT2PS2PHXZ256rmk |
| 78905 | 15095, // VCVT2PS2PHXZ256rmkz |
| 78906 | 15099, // VCVT2PS2PHXZ256rr |
| 78907 | 15102, // VCVT2PS2PHXZ256rrk |
| 78908 | 15107, // VCVT2PS2PHXZ256rrkz |
| 78909 | 15111, // VCVT2PS2PHXZrm |
| 78910 | 15114, // VCVT2PS2PHXZrmb |
| 78911 | 15117, // VCVT2PS2PHXZrmbk |
| 78912 | 15122, // VCVT2PS2PHXZrmbkz |
| 78913 | 15126, // VCVT2PS2PHXZrmk |
| 78914 | 15131, // VCVT2PS2PHXZrmkz |
| 78915 | 15135, // VCVT2PS2PHXZrr |
| 78916 | 15138, // VCVT2PS2PHXZrrb |
| 78917 | 15142, // VCVT2PS2PHXZrrbk |
| 78918 | 15148, // VCVT2PS2PHXZrrbkz |
| 78919 | 15153, // VCVT2PS2PHXZrrk |
| 78920 | 15158, // VCVT2PS2PHXZrrkz |
| 78921 | 15162, // VCVTBF162IBSZ128rm |
| 78922 | 15164, // VCVTBF162IBSZ128rmb |
| 78923 | 15166, // VCVTBF162IBSZ128rmbk |
| 78924 | 15170, // VCVTBF162IBSZ128rmbkz |
| 78925 | 15173, // VCVTBF162IBSZ128rmk |
| 78926 | 15177, // VCVTBF162IBSZ128rmkz |
| 78927 | 15180, // VCVTBF162IBSZ128rr |
| 78928 | 15182, // VCVTBF162IBSZ128rrk |
| 78929 | 15186, // VCVTBF162IBSZ128rrkz |
| 78930 | 15189, // VCVTBF162IBSZ256rm |
| 78931 | 15191, // VCVTBF162IBSZ256rmb |
| 78932 | 15193, // VCVTBF162IBSZ256rmbk |
| 78933 | 15197, // VCVTBF162IBSZ256rmbkz |
| 78934 | 15200, // VCVTBF162IBSZ256rmk |
| 78935 | 15204, // VCVTBF162IBSZ256rmkz |
| 78936 | 15207, // VCVTBF162IBSZ256rr |
| 78937 | 15209, // VCVTBF162IBSZ256rrk |
| 78938 | 15213, // VCVTBF162IBSZ256rrkz |
| 78939 | 15216, // VCVTBF162IBSZrm |
| 78940 | 15218, // VCVTBF162IBSZrmb |
| 78941 | 15220, // VCVTBF162IBSZrmbk |
| 78942 | 15224, // VCVTBF162IBSZrmbkz |
| 78943 | 15227, // VCVTBF162IBSZrmk |
| 78944 | 15231, // VCVTBF162IBSZrmkz |
| 78945 | 15234, // VCVTBF162IBSZrr |
| 78946 | 15236, // VCVTBF162IBSZrrk |
| 78947 | 15240, // VCVTBF162IBSZrrkz |
| 78948 | 15243, // VCVTBF162IUBSZ128rm |
| 78949 | 15245, // VCVTBF162IUBSZ128rmb |
| 78950 | 15247, // VCVTBF162IUBSZ128rmbk |
| 78951 | 15251, // VCVTBF162IUBSZ128rmbkz |
| 78952 | 15254, // VCVTBF162IUBSZ128rmk |
| 78953 | 15258, // VCVTBF162IUBSZ128rmkz |
| 78954 | 15261, // VCVTBF162IUBSZ128rr |
| 78955 | 15263, // VCVTBF162IUBSZ128rrk |
| 78956 | 15267, // VCVTBF162IUBSZ128rrkz |
| 78957 | 15270, // VCVTBF162IUBSZ256rm |
| 78958 | 15272, // VCVTBF162IUBSZ256rmb |
| 78959 | 15274, // VCVTBF162IUBSZ256rmbk |
| 78960 | 15278, // VCVTBF162IUBSZ256rmbkz |
| 78961 | 15281, // VCVTBF162IUBSZ256rmk |
| 78962 | 15285, // VCVTBF162IUBSZ256rmkz |
| 78963 | 15288, // VCVTBF162IUBSZ256rr |
| 78964 | 15290, // VCVTBF162IUBSZ256rrk |
| 78965 | 15294, // VCVTBF162IUBSZ256rrkz |
| 78966 | 15297, // VCVTBF162IUBSZrm |
| 78967 | 15299, // VCVTBF162IUBSZrmb |
| 78968 | 15301, // VCVTBF162IUBSZrmbk |
| 78969 | 15305, // VCVTBF162IUBSZrmbkz |
| 78970 | 15308, // VCVTBF162IUBSZrmk |
| 78971 | 15312, // VCVTBF162IUBSZrmkz |
| 78972 | 15315, // VCVTBF162IUBSZrr |
| 78973 | 15317, // VCVTBF162IUBSZrrk |
| 78974 | 15321, // VCVTBF162IUBSZrrkz |
| 78975 | 15324, // VCVTBIASPH2BF8SZ128rm |
| 78976 | 15327, // VCVTBIASPH2BF8SZ128rmb |
| 78977 | 15330, // VCVTBIASPH2BF8SZ128rmbk |
| 78978 | 15335, // VCVTBIASPH2BF8SZ128rmbkz |
| 78979 | 15339, // VCVTBIASPH2BF8SZ128rmk |
| 78980 | 15344, // VCVTBIASPH2BF8SZ128rmkz |
| 78981 | 15348, // VCVTBIASPH2BF8SZ128rr |
| 78982 | 15351, // VCVTBIASPH2BF8SZ128rrk |
| 78983 | 15356, // VCVTBIASPH2BF8SZ128rrkz |
| 78984 | 15360, // VCVTBIASPH2BF8SZ256rm |
| 78985 | 15363, // VCVTBIASPH2BF8SZ256rmb |
| 78986 | 15366, // VCVTBIASPH2BF8SZ256rmbk |
| 78987 | 15371, // VCVTBIASPH2BF8SZ256rmbkz |
| 78988 | 15375, // VCVTBIASPH2BF8SZ256rmk |
| 78989 | 15380, // VCVTBIASPH2BF8SZ256rmkz |
| 78990 | 15384, // VCVTBIASPH2BF8SZ256rr |
| 78991 | 15387, // VCVTBIASPH2BF8SZ256rrk |
| 78992 | 15392, // VCVTBIASPH2BF8SZ256rrkz |
| 78993 | 15396, // VCVTBIASPH2BF8SZrm |
| 78994 | 15399, // VCVTBIASPH2BF8SZrmb |
| 78995 | 15402, // VCVTBIASPH2BF8SZrmbk |
| 78996 | 15407, // VCVTBIASPH2BF8SZrmbkz |
| 78997 | 15411, // VCVTBIASPH2BF8SZrmk |
| 78998 | 15416, // VCVTBIASPH2BF8SZrmkz |
| 78999 | 15420, // VCVTBIASPH2BF8SZrr |
| 79000 | 15423, // VCVTBIASPH2BF8SZrrk |
| 79001 | 15428, // VCVTBIASPH2BF8SZrrkz |
| 79002 | 15432, // VCVTBIASPH2BF8Z128rm |
| 79003 | 15435, // VCVTBIASPH2BF8Z128rmb |
| 79004 | 15438, // VCVTBIASPH2BF8Z128rmbk |
| 79005 | 15443, // VCVTBIASPH2BF8Z128rmbkz |
| 79006 | 15447, // VCVTBIASPH2BF8Z128rmk |
| 79007 | 15452, // VCVTBIASPH2BF8Z128rmkz |
| 79008 | 15456, // VCVTBIASPH2BF8Z128rr |
| 79009 | 15459, // VCVTBIASPH2BF8Z128rrk |
| 79010 | 15464, // VCVTBIASPH2BF8Z128rrkz |
| 79011 | 15468, // VCVTBIASPH2BF8Z256rm |
| 79012 | 15471, // VCVTBIASPH2BF8Z256rmb |
| 79013 | 15474, // VCVTBIASPH2BF8Z256rmbk |
| 79014 | 15479, // VCVTBIASPH2BF8Z256rmbkz |
| 79015 | 15483, // VCVTBIASPH2BF8Z256rmk |
| 79016 | 15488, // VCVTBIASPH2BF8Z256rmkz |
| 79017 | 15492, // VCVTBIASPH2BF8Z256rr |
| 79018 | 15495, // VCVTBIASPH2BF8Z256rrk |
| 79019 | 15500, // VCVTBIASPH2BF8Z256rrkz |
| 79020 | 15504, // VCVTBIASPH2BF8Zrm |
| 79021 | 15507, // VCVTBIASPH2BF8Zrmb |
| 79022 | 15510, // VCVTBIASPH2BF8Zrmbk |
| 79023 | 15515, // VCVTBIASPH2BF8Zrmbkz |
| 79024 | 15519, // VCVTBIASPH2BF8Zrmk |
| 79025 | 15524, // VCVTBIASPH2BF8Zrmkz |
| 79026 | 15528, // VCVTBIASPH2BF8Zrr |
| 79027 | 15531, // VCVTBIASPH2BF8Zrrk |
| 79028 | 15536, // VCVTBIASPH2BF8Zrrkz |
| 79029 | 15540, // VCVTBIASPH2HF8SZ128rm |
| 79030 | 15543, // VCVTBIASPH2HF8SZ128rmb |
| 79031 | 15546, // VCVTBIASPH2HF8SZ128rmbk |
| 79032 | 15551, // VCVTBIASPH2HF8SZ128rmbkz |
| 79033 | 15555, // VCVTBIASPH2HF8SZ128rmk |
| 79034 | 15560, // VCVTBIASPH2HF8SZ128rmkz |
| 79035 | 15564, // VCVTBIASPH2HF8SZ128rr |
| 79036 | 15567, // VCVTBIASPH2HF8SZ128rrk |
| 79037 | 15572, // VCVTBIASPH2HF8SZ128rrkz |
| 79038 | 15576, // VCVTBIASPH2HF8SZ256rm |
| 79039 | 15579, // VCVTBIASPH2HF8SZ256rmb |
| 79040 | 15582, // VCVTBIASPH2HF8SZ256rmbk |
| 79041 | 15587, // VCVTBIASPH2HF8SZ256rmbkz |
| 79042 | 15591, // VCVTBIASPH2HF8SZ256rmk |
| 79043 | 15596, // VCVTBIASPH2HF8SZ256rmkz |
| 79044 | 15600, // VCVTBIASPH2HF8SZ256rr |
| 79045 | 15603, // VCVTBIASPH2HF8SZ256rrk |
| 79046 | 15608, // VCVTBIASPH2HF8SZ256rrkz |
| 79047 | 15612, // VCVTBIASPH2HF8SZrm |
| 79048 | 15615, // VCVTBIASPH2HF8SZrmb |
| 79049 | 15618, // VCVTBIASPH2HF8SZrmbk |
| 79050 | 15623, // VCVTBIASPH2HF8SZrmbkz |
| 79051 | 15627, // VCVTBIASPH2HF8SZrmk |
| 79052 | 15632, // VCVTBIASPH2HF8SZrmkz |
| 79053 | 15636, // VCVTBIASPH2HF8SZrr |
| 79054 | 15639, // VCVTBIASPH2HF8SZrrk |
| 79055 | 15644, // VCVTBIASPH2HF8SZrrkz |
| 79056 | 15648, // VCVTBIASPH2HF8Z128rm |
| 79057 | 15651, // VCVTBIASPH2HF8Z128rmb |
| 79058 | 15654, // VCVTBIASPH2HF8Z128rmbk |
| 79059 | 15659, // VCVTBIASPH2HF8Z128rmbkz |
| 79060 | 15663, // VCVTBIASPH2HF8Z128rmk |
| 79061 | 15668, // VCVTBIASPH2HF8Z128rmkz |
| 79062 | 15672, // VCVTBIASPH2HF8Z128rr |
| 79063 | 15675, // VCVTBIASPH2HF8Z128rrk |
| 79064 | 15680, // VCVTBIASPH2HF8Z128rrkz |
| 79065 | 15684, // VCVTBIASPH2HF8Z256rm |
| 79066 | 15687, // VCVTBIASPH2HF8Z256rmb |
| 79067 | 15690, // VCVTBIASPH2HF8Z256rmbk |
| 79068 | 15695, // VCVTBIASPH2HF8Z256rmbkz |
| 79069 | 15699, // VCVTBIASPH2HF8Z256rmk |
| 79070 | 15704, // VCVTBIASPH2HF8Z256rmkz |
| 79071 | 15708, // VCVTBIASPH2HF8Z256rr |
| 79072 | 15711, // VCVTBIASPH2HF8Z256rrk |
| 79073 | 15716, // VCVTBIASPH2HF8Z256rrkz |
| 79074 | 15720, // VCVTBIASPH2HF8Zrm |
| 79075 | 15723, // VCVTBIASPH2HF8Zrmb |
| 79076 | 15726, // VCVTBIASPH2HF8Zrmbk |
| 79077 | 15731, // VCVTBIASPH2HF8Zrmbkz |
| 79078 | 15735, // VCVTBIASPH2HF8Zrmk |
| 79079 | 15740, // VCVTBIASPH2HF8Zrmkz |
| 79080 | 15744, // VCVTBIASPH2HF8Zrr |
| 79081 | 15747, // VCVTBIASPH2HF8Zrrk |
| 79082 | 15752, // VCVTBIASPH2HF8Zrrkz |
| 79083 | 15756, // VCVTDQ2PDYrm |
| 79084 | 15758, // VCVTDQ2PDYrr |
| 79085 | 15760, // VCVTDQ2PDZ128rm |
| 79086 | 15762, // VCVTDQ2PDZ128rmb |
| 79087 | 15764, // VCVTDQ2PDZ128rmbk |
| 79088 | 15768, // VCVTDQ2PDZ128rmbkz |
| 79089 | 15771, // VCVTDQ2PDZ128rmk |
| 79090 | 15775, // VCVTDQ2PDZ128rmkz |
| 79091 | 15778, // VCVTDQ2PDZ128rr |
| 79092 | 15780, // VCVTDQ2PDZ128rrk |
| 79093 | 15784, // VCVTDQ2PDZ128rrkz |
| 79094 | 15787, // VCVTDQ2PDZ256rm |
| 79095 | 15789, // VCVTDQ2PDZ256rmb |
| 79096 | 15791, // VCVTDQ2PDZ256rmbk |
| 79097 | 15795, // VCVTDQ2PDZ256rmbkz |
| 79098 | 15798, // VCVTDQ2PDZ256rmk |
| 79099 | 15802, // VCVTDQ2PDZ256rmkz |
| 79100 | 15805, // VCVTDQ2PDZ256rr |
| 79101 | 15807, // VCVTDQ2PDZ256rrk |
| 79102 | 15811, // VCVTDQ2PDZ256rrkz |
| 79103 | 15814, // VCVTDQ2PDZrm |
| 79104 | 15816, // VCVTDQ2PDZrmb |
| 79105 | 15818, // VCVTDQ2PDZrmbk |
| 79106 | 15822, // VCVTDQ2PDZrmbkz |
| 79107 | 15825, // VCVTDQ2PDZrmk |
| 79108 | 15829, // VCVTDQ2PDZrmkz |
| 79109 | 15832, // VCVTDQ2PDZrr |
| 79110 | 15834, // VCVTDQ2PDZrrk |
| 79111 | 15838, // VCVTDQ2PDZrrkz |
| 79112 | 15841, // VCVTDQ2PDrm |
| 79113 | 15843, // VCVTDQ2PDrr |
| 79114 | 15845, // VCVTDQ2PHZ128rm |
| 79115 | 15847, // VCVTDQ2PHZ128rmb |
| 79116 | 15849, // VCVTDQ2PHZ128rmbk |
| 79117 | 15853, // VCVTDQ2PHZ128rmbkz |
| 79118 | 15856, // VCVTDQ2PHZ128rmk |
| 79119 | 15860, // VCVTDQ2PHZ128rmkz |
| 79120 | 15863, // VCVTDQ2PHZ128rr |
| 79121 | 15865, // VCVTDQ2PHZ128rrk |
| 79122 | 15869, // VCVTDQ2PHZ128rrkz |
| 79123 | 15872, // VCVTDQ2PHZ256rm |
| 79124 | 15874, // VCVTDQ2PHZ256rmb |
| 79125 | 15876, // VCVTDQ2PHZ256rmbk |
| 79126 | 15880, // VCVTDQ2PHZ256rmbkz |
| 79127 | 15883, // VCVTDQ2PHZ256rmk |
| 79128 | 15887, // VCVTDQ2PHZ256rmkz |
| 79129 | 15890, // VCVTDQ2PHZ256rr |
| 79130 | 15892, // VCVTDQ2PHZ256rrk |
| 79131 | 15896, // VCVTDQ2PHZ256rrkz |
| 79132 | 15899, // VCVTDQ2PHZrm |
| 79133 | 15901, // VCVTDQ2PHZrmb |
| 79134 | 15903, // VCVTDQ2PHZrmbk |
| 79135 | 15907, // VCVTDQ2PHZrmbkz |
| 79136 | 15910, // VCVTDQ2PHZrmk |
| 79137 | 15914, // VCVTDQ2PHZrmkz |
| 79138 | 15917, // VCVTDQ2PHZrr |
| 79139 | 15919, // VCVTDQ2PHZrrb |
| 79140 | 15922, // VCVTDQ2PHZrrbk |
| 79141 | 15927, // VCVTDQ2PHZrrbkz |
| 79142 | 15931, // VCVTDQ2PHZrrk |
| 79143 | 15935, // VCVTDQ2PHZrrkz |
| 79144 | 15938, // VCVTDQ2PSYrm |
| 79145 | 15940, // VCVTDQ2PSYrr |
| 79146 | 15942, // VCVTDQ2PSZ128rm |
| 79147 | 15944, // VCVTDQ2PSZ128rmb |
| 79148 | 15946, // VCVTDQ2PSZ128rmbk |
| 79149 | 15950, // VCVTDQ2PSZ128rmbkz |
| 79150 | 15953, // VCVTDQ2PSZ128rmk |
| 79151 | 15957, // VCVTDQ2PSZ128rmkz |
| 79152 | 15960, // VCVTDQ2PSZ128rr |
| 79153 | 15962, // VCVTDQ2PSZ128rrk |
| 79154 | 15966, // VCVTDQ2PSZ128rrkz |
| 79155 | 15969, // VCVTDQ2PSZ256rm |
| 79156 | 15971, // VCVTDQ2PSZ256rmb |
| 79157 | 15973, // VCVTDQ2PSZ256rmbk |
| 79158 | 15977, // VCVTDQ2PSZ256rmbkz |
| 79159 | 15980, // VCVTDQ2PSZ256rmk |
| 79160 | 15984, // VCVTDQ2PSZ256rmkz |
| 79161 | 15987, // VCVTDQ2PSZ256rr |
| 79162 | 15989, // VCVTDQ2PSZ256rrk |
| 79163 | 15993, // VCVTDQ2PSZ256rrkz |
| 79164 | 15996, // VCVTDQ2PSZrm |
| 79165 | 15998, // VCVTDQ2PSZrmb |
| 79166 | 16000, // VCVTDQ2PSZrmbk |
| 79167 | 16004, // VCVTDQ2PSZrmbkz |
| 79168 | 16007, // VCVTDQ2PSZrmk |
| 79169 | 16011, // VCVTDQ2PSZrmkz |
| 79170 | 16014, // VCVTDQ2PSZrr |
| 79171 | 16016, // VCVTDQ2PSZrrb |
| 79172 | 16019, // VCVTDQ2PSZrrbk |
| 79173 | 16024, // VCVTDQ2PSZrrbkz |
| 79174 | 16028, // VCVTDQ2PSZrrk |
| 79175 | 16032, // VCVTDQ2PSZrrkz |
| 79176 | 16035, // VCVTDQ2PSrm |
| 79177 | 16037, // VCVTDQ2PSrr |
| 79178 | 16039, // VCVTHF82PHZ128rm |
| 79179 | 16041, // VCVTHF82PHZ128rmk |
| 79180 | 16045, // VCVTHF82PHZ128rmkz |
| 79181 | 16048, // VCVTHF82PHZ128rr |
| 79182 | 16050, // VCVTHF82PHZ128rrk |
| 79183 | 16054, // VCVTHF82PHZ128rrkz |
| 79184 | 16057, // VCVTHF82PHZ256rm |
| 79185 | 16059, // VCVTHF82PHZ256rmk |
| 79186 | 16063, // VCVTHF82PHZ256rmkz |
| 79187 | 16066, // VCVTHF82PHZ256rr |
| 79188 | 16068, // VCVTHF82PHZ256rrk |
| 79189 | 16072, // VCVTHF82PHZ256rrkz |
| 79190 | 16075, // VCVTHF82PHZrm |
| 79191 | 16077, // VCVTHF82PHZrmk |
| 79192 | 16081, // VCVTHF82PHZrmkz |
| 79193 | 16084, // VCVTHF82PHZrr |
| 79194 | 16086, // VCVTHF82PHZrrk |
| 79195 | 16090, // VCVTHF82PHZrrkz |
| 79196 | 16093, // VCVTNE2PS2BF16Z128rm |
| 79197 | 16096, // VCVTNE2PS2BF16Z128rmb |
| 79198 | 16099, // VCVTNE2PS2BF16Z128rmbk |
| 79199 | 16104, // VCVTNE2PS2BF16Z128rmbkz |
| 79200 | 16108, // VCVTNE2PS2BF16Z128rmk |
| 79201 | 16113, // VCVTNE2PS2BF16Z128rmkz |
| 79202 | 16117, // VCVTNE2PS2BF16Z128rr |
| 79203 | 16120, // VCVTNE2PS2BF16Z128rrk |
| 79204 | 16125, // VCVTNE2PS2BF16Z128rrkz |
| 79205 | 16129, // VCVTNE2PS2BF16Z256rm |
| 79206 | 16132, // VCVTNE2PS2BF16Z256rmb |
| 79207 | 16135, // VCVTNE2PS2BF16Z256rmbk |
| 79208 | 16140, // VCVTNE2PS2BF16Z256rmbkz |
| 79209 | 16144, // VCVTNE2PS2BF16Z256rmk |
| 79210 | 16149, // VCVTNE2PS2BF16Z256rmkz |
| 79211 | 16153, // VCVTNE2PS2BF16Z256rr |
| 79212 | 16156, // VCVTNE2PS2BF16Z256rrk |
| 79213 | 16161, // VCVTNE2PS2BF16Z256rrkz |
| 79214 | 16165, // VCVTNE2PS2BF16Zrm |
| 79215 | 16168, // VCVTNE2PS2BF16Zrmb |
| 79216 | 16171, // VCVTNE2PS2BF16Zrmbk |
| 79217 | 16176, // VCVTNE2PS2BF16Zrmbkz |
| 79218 | 16180, // VCVTNE2PS2BF16Zrmk |
| 79219 | 16185, // VCVTNE2PS2BF16Zrmkz |
| 79220 | 16189, // VCVTNE2PS2BF16Zrr |
| 79221 | 16192, // VCVTNE2PS2BF16Zrrk |
| 79222 | 16197, // VCVTNE2PS2BF16Zrrkz |
| 79223 | 16201, // VCVTNEEBF162PSYrm |
| 79224 | 16203, // VCVTNEEBF162PSrm |
| 79225 | 16205, // VCVTNEEPH2PSYrm |
| 79226 | 16207, // VCVTNEEPH2PSrm |
| 79227 | 16209, // VCVTNEOBF162PSYrm |
| 79228 | 16211, // VCVTNEOBF162PSrm |
| 79229 | 16213, // VCVTNEOPH2PSYrm |
| 79230 | 16215, // VCVTNEOPH2PSrm |
| 79231 | 16217, // VCVTNEPS2BF16Yrm |
| 79232 | 16219, // VCVTNEPS2BF16Yrr |
| 79233 | 16221, // VCVTNEPS2BF16Z128rm |
| 79234 | 16223, // VCVTNEPS2BF16Z128rmb |
| 79235 | 16225, // VCVTNEPS2BF16Z128rmbk |
| 79236 | 16229, // VCVTNEPS2BF16Z128rmbkz |
| 79237 | 16232, // VCVTNEPS2BF16Z128rmk |
| 79238 | 16236, // VCVTNEPS2BF16Z128rmkz |
| 79239 | 16239, // VCVTNEPS2BF16Z128rr |
| 79240 | 16241, // VCVTNEPS2BF16Z128rrk |
| 79241 | 16245, // VCVTNEPS2BF16Z128rrkz |
| 79242 | 16248, // VCVTNEPS2BF16Z256rm |
| 79243 | 16250, // VCVTNEPS2BF16Z256rmb |
| 79244 | 16252, // VCVTNEPS2BF16Z256rmbk |
| 79245 | 16256, // VCVTNEPS2BF16Z256rmbkz |
| 79246 | 16259, // VCVTNEPS2BF16Z256rmk |
| 79247 | 16263, // VCVTNEPS2BF16Z256rmkz |
| 79248 | 16266, // VCVTNEPS2BF16Z256rr |
| 79249 | 16268, // VCVTNEPS2BF16Z256rrk |
| 79250 | 16272, // VCVTNEPS2BF16Z256rrkz |
| 79251 | 16275, // VCVTNEPS2BF16Zrm |
| 79252 | 16277, // VCVTNEPS2BF16Zrmb |
| 79253 | 16279, // VCVTNEPS2BF16Zrmbk |
| 79254 | 16283, // VCVTNEPS2BF16Zrmbkz |
| 79255 | 16286, // VCVTNEPS2BF16Zrmk |
| 79256 | 16290, // VCVTNEPS2BF16Zrmkz |
| 79257 | 16293, // VCVTNEPS2BF16Zrr |
| 79258 | 16295, // VCVTNEPS2BF16Zrrk |
| 79259 | 16299, // VCVTNEPS2BF16Zrrkz |
| 79260 | 16302, // VCVTNEPS2BF16rm |
| 79261 | 16304, // VCVTNEPS2BF16rr |
| 79262 | 16306, // VCVTPD2DQYrm |
| 79263 | 16308, // VCVTPD2DQYrr |
| 79264 | 16310, // VCVTPD2DQZ128rm |
| 79265 | 16312, // VCVTPD2DQZ128rmb |
| 79266 | 16314, // VCVTPD2DQZ128rmbk |
| 79267 | 16318, // VCVTPD2DQZ128rmbkz |
| 79268 | 16321, // VCVTPD2DQZ128rmk |
| 79269 | 16325, // VCVTPD2DQZ128rmkz |
| 79270 | 16328, // VCVTPD2DQZ128rr |
| 79271 | 16330, // VCVTPD2DQZ128rrk |
| 79272 | 16334, // VCVTPD2DQZ128rrkz |
| 79273 | 16337, // VCVTPD2DQZ256rm |
| 79274 | 16339, // VCVTPD2DQZ256rmb |
| 79275 | 16341, // VCVTPD2DQZ256rmbk |
| 79276 | 16345, // VCVTPD2DQZ256rmbkz |
| 79277 | 16348, // VCVTPD2DQZ256rmk |
| 79278 | 16352, // VCVTPD2DQZ256rmkz |
| 79279 | 16355, // VCVTPD2DQZ256rr |
| 79280 | 16357, // VCVTPD2DQZ256rrk |
| 79281 | 16361, // VCVTPD2DQZ256rrkz |
| 79282 | 16364, // VCVTPD2DQZrm |
| 79283 | 16366, // VCVTPD2DQZrmb |
| 79284 | 16368, // VCVTPD2DQZrmbk |
| 79285 | 16372, // VCVTPD2DQZrmbkz |
| 79286 | 16375, // VCVTPD2DQZrmk |
| 79287 | 16379, // VCVTPD2DQZrmkz |
| 79288 | 16382, // VCVTPD2DQZrr |
| 79289 | 16384, // VCVTPD2DQZrrb |
| 79290 | 16387, // VCVTPD2DQZrrbk |
| 79291 | 16392, // VCVTPD2DQZrrbkz |
| 79292 | 16396, // VCVTPD2DQZrrk |
| 79293 | 16400, // VCVTPD2DQZrrkz |
| 79294 | 16403, // VCVTPD2DQrm |
| 79295 | 16405, // VCVTPD2DQrr |
| 79296 | 16407, // VCVTPD2PHZ128rm |
| 79297 | 16409, // VCVTPD2PHZ128rmb |
| 79298 | 16411, // VCVTPD2PHZ128rmbk |
| 79299 | 16415, // VCVTPD2PHZ128rmbkz |
| 79300 | 16418, // VCVTPD2PHZ128rmk |
| 79301 | 16422, // VCVTPD2PHZ128rmkz |
| 79302 | 16425, // VCVTPD2PHZ128rr |
| 79303 | 16427, // VCVTPD2PHZ128rrk |
| 79304 | 16431, // VCVTPD2PHZ128rrkz |
| 79305 | 16434, // VCVTPD2PHZ256rm |
| 79306 | 16436, // VCVTPD2PHZ256rmb |
| 79307 | 16438, // VCVTPD2PHZ256rmbk |
| 79308 | 16442, // VCVTPD2PHZ256rmbkz |
| 79309 | 16445, // VCVTPD2PHZ256rmk |
| 79310 | 16449, // VCVTPD2PHZ256rmkz |
| 79311 | 16452, // VCVTPD2PHZ256rr |
| 79312 | 16454, // VCVTPD2PHZ256rrk |
| 79313 | 16458, // VCVTPD2PHZ256rrkz |
| 79314 | 16461, // VCVTPD2PHZrm |
| 79315 | 16463, // VCVTPD2PHZrmb |
| 79316 | 16465, // VCVTPD2PHZrmbk |
| 79317 | 16469, // VCVTPD2PHZrmbkz |
| 79318 | 16472, // VCVTPD2PHZrmk |
| 79319 | 16476, // VCVTPD2PHZrmkz |
| 79320 | 16479, // VCVTPD2PHZrr |
| 79321 | 16481, // VCVTPD2PHZrrb |
| 79322 | 16484, // VCVTPD2PHZrrbk |
| 79323 | 16489, // VCVTPD2PHZrrbkz |
| 79324 | 16493, // VCVTPD2PHZrrk |
| 79325 | 16497, // VCVTPD2PHZrrkz |
| 79326 | 16500, // VCVTPD2PSYrm |
| 79327 | 16502, // VCVTPD2PSYrr |
| 79328 | 16504, // VCVTPD2PSZ128rm |
| 79329 | 16506, // VCVTPD2PSZ128rmb |
| 79330 | 16508, // VCVTPD2PSZ128rmbk |
| 79331 | 16512, // VCVTPD2PSZ128rmbkz |
| 79332 | 16515, // VCVTPD2PSZ128rmk |
| 79333 | 16519, // VCVTPD2PSZ128rmkz |
| 79334 | 16522, // VCVTPD2PSZ128rr |
| 79335 | 16524, // VCVTPD2PSZ128rrk |
| 79336 | 16528, // VCVTPD2PSZ128rrkz |
| 79337 | 16531, // VCVTPD2PSZ256rm |
| 79338 | 16533, // VCVTPD2PSZ256rmb |
| 79339 | 16535, // VCVTPD2PSZ256rmbk |
| 79340 | 16539, // VCVTPD2PSZ256rmbkz |
| 79341 | 16542, // VCVTPD2PSZ256rmk |
| 79342 | 16546, // VCVTPD2PSZ256rmkz |
| 79343 | 16549, // VCVTPD2PSZ256rr |
| 79344 | 16551, // VCVTPD2PSZ256rrk |
| 79345 | 16555, // VCVTPD2PSZ256rrkz |
| 79346 | 16558, // VCVTPD2PSZrm |
| 79347 | 16560, // VCVTPD2PSZrmb |
| 79348 | 16562, // VCVTPD2PSZrmbk |
| 79349 | 16566, // VCVTPD2PSZrmbkz |
| 79350 | 16569, // VCVTPD2PSZrmk |
| 79351 | 16573, // VCVTPD2PSZrmkz |
| 79352 | 16576, // VCVTPD2PSZrr |
| 79353 | 16578, // VCVTPD2PSZrrb |
| 79354 | 16581, // VCVTPD2PSZrrbk |
| 79355 | 16586, // VCVTPD2PSZrrbkz |
| 79356 | 16590, // VCVTPD2PSZrrk |
| 79357 | 16594, // VCVTPD2PSZrrkz |
| 79358 | 16597, // VCVTPD2PSrm |
| 79359 | 16599, // VCVTPD2PSrr |
| 79360 | 16601, // VCVTPD2QQZ128rm |
| 79361 | 16603, // VCVTPD2QQZ128rmb |
| 79362 | 16605, // VCVTPD2QQZ128rmbk |
| 79363 | 16609, // VCVTPD2QQZ128rmbkz |
| 79364 | 16612, // VCVTPD2QQZ128rmk |
| 79365 | 16616, // VCVTPD2QQZ128rmkz |
| 79366 | 16619, // VCVTPD2QQZ128rr |
| 79367 | 16621, // VCVTPD2QQZ128rrk |
| 79368 | 16625, // VCVTPD2QQZ128rrkz |
| 79369 | 16628, // VCVTPD2QQZ256rm |
| 79370 | 16630, // VCVTPD2QQZ256rmb |
| 79371 | 16632, // VCVTPD2QQZ256rmbk |
| 79372 | 16636, // VCVTPD2QQZ256rmbkz |
| 79373 | 16639, // VCVTPD2QQZ256rmk |
| 79374 | 16643, // VCVTPD2QQZ256rmkz |
| 79375 | 16646, // VCVTPD2QQZ256rr |
| 79376 | 16648, // VCVTPD2QQZ256rrk |
| 79377 | 16652, // VCVTPD2QQZ256rrkz |
| 79378 | 16655, // VCVTPD2QQZrm |
| 79379 | 16657, // VCVTPD2QQZrmb |
| 79380 | 16659, // VCVTPD2QQZrmbk |
| 79381 | 16663, // VCVTPD2QQZrmbkz |
| 79382 | 16666, // VCVTPD2QQZrmk |
| 79383 | 16670, // VCVTPD2QQZrmkz |
| 79384 | 16673, // VCVTPD2QQZrr |
| 79385 | 16675, // VCVTPD2QQZrrb |
| 79386 | 16678, // VCVTPD2QQZrrbk |
| 79387 | 16683, // VCVTPD2QQZrrbkz |
| 79388 | 16687, // VCVTPD2QQZrrk |
| 79389 | 16691, // VCVTPD2QQZrrkz |
| 79390 | 16694, // VCVTPD2UDQZ128rm |
| 79391 | 16696, // VCVTPD2UDQZ128rmb |
| 79392 | 16698, // VCVTPD2UDQZ128rmbk |
| 79393 | 16702, // VCVTPD2UDQZ128rmbkz |
| 79394 | 16705, // VCVTPD2UDQZ128rmk |
| 79395 | 16709, // VCVTPD2UDQZ128rmkz |
| 79396 | 16712, // VCVTPD2UDQZ128rr |
| 79397 | 16714, // VCVTPD2UDQZ128rrk |
| 79398 | 16718, // VCVTPD2UDQZ128rrkz |
| 79399 | 16721, // VCVTPD2UDQZ256rm |
| 79400 | 16723, // VCVTPD2UDQZ256rmb |
| 79401 | 16725, // VCVTPD2UDQZ256rmbk |
| 79402 | 16729, // VCVTPD2UDQZ256rmbkz |
| 79403 | 16732, // VCVTPD2UDQZ256rmk |
| 79404 | 16736, // VCVTPD2UDQZ256rmkz |
| 79405 | 16739, // VCVTPD2UDQZ256rr |
| 79406 | 16741, // VCVTPD2UDQZ256rrk |
| 79407 | 16745, // VCVTPD2UDQZ256rrkz |
| 79408 | 16748, // VCVTPD2UDQZrm |
| 79409 | 16750, // VCVTPD2UDQZrmb |
| 79410 | 16752, // VCVTPD2UDQZrmbk |
| 79411 | 16756, // VCVTPD2UDQZrmbkz |
| 79412 | 16759, // VCVTPD2UDQZrmk |
| 79413 | 16763, // VCVTPD2UDQZrmkz |
| 79414 | 16766, // VCVTPD2UDQZrr |
| 79415 | 16768, // VCVTPD2UDQZrrb |
| 79416 | 16771, // VCVTPD2UDQZrrbk |
| 79417 | 16776, // VCVTPD2UDQZrrbkz |
| 79418 | 16780, // VCVTPD2UDQZrrk |
| 79419 | 16784, // VCVTPD2UDQZrrkz |
| 79420 | 16787, // VCVTPD2UQQZ128rm |
| 79421 | 16789, // VCVTPD2UQQZ128rmb |
| 79422 | 16791, // VCVTPD2UQQZ128rmbk |
| 79423 | 16795, // VCVTPD2UQQZ128rmbkz |
| 79424 | 16798, // VCVTPD2UQQZ128rmk |
| 79425 | 16802, // VCVTPD2UQQZ128rmkz |
| 79426 | 16805, // VCVTPD2UQQZ128rr |
| 79427 | 16807, // VCVTPD2UQQZ128rrk |
| 79428 | 16811, // VCVTPD2UQQZ128rrkz |
| 79429 | 16814, // VCVTPD2UQQZ256rm |
| 79430 | 16816, // VCVTPD2UQQZ256rmb |
| 79431 | 16818, // VCVTPD2UQQZ256rmbk |
| 79432 | 16822, // VCVTPD2UQQZ256rmbkz |
| 79433 | 16825, // VCVTPD2UQQZ256rmk |
| 79434 | 16829, // VCVTPD2UQQZ256rmkz |
| 79435 | 16832, // VCVTPD2UQQZ256rr |
| 79436 | 16834, // VCVTPD2UQQZ256rrk |
| 79437 | 16838, // VCVTPD2UQQZ256rrkz |
| 79438 | 16841, // VCVTPD2UQQZrm |
| 79439 | 16843, // VCVTPD2UQQZrmb |
| 79440 | 16845, // VCVTPD2UQQZrmbk |
| 79441 | 16849, // VCVTPD2UQQZrmbkz |
| 79442 | 16852, // VCVTPD2UQQZrmk |
| 79443 | 16856, // VCVTPD2UQQZrmkz |
| 79444 | 16859, // VCVTPD2UQQZrr |
| 79445 | 16861, // VCVTPD2UQQZrrb |
| 79446 | 16864, // VCVTPD2UQQZrrbk |
| 79447 | 16869, // VCVTPD2UQQZrrbkz |
| 79448 | 16873, // VCVTPD2UQQZrrk |
| 79449 | 16877, // VCVTPD2UQQZrrkz |
| 79450 | 16880, // VCVTPH2BF8SZ128rm |
| 79451 | 16882, // VCVTPH2BF8SZ128rmb |
| 79452 | 16884, // VCVTPH2BF8SZ128rmbk |
| 79453 | 16888, // VCVTPH2BF8SZ128rmbkz |
| 79454 | 16891, // VCVTPH2BF8SZ128rmk |
| 79455 | 16895, // VCVTPH2BF8SZ128rmkz |
| 79456 | 16898, // VCVTPH2BF8SZ128rr |
| 79457 | 16900, // VCVTPH2BF8SZ128rrk |
| 79458 | 16904, // VCVTPH2BF8SZ128rrkz |
| 79459 | 16907, // VCVTPH2BF8SZ256rm |
| 79460 | 16909, // VCVTPH2BF8SZ256rmb |
| 79461 | 16911, // VCVTPH2BF8SZ256rmbk |
| 79462 | 16915, // VCVTPH2BF8SZ256rmbkz |
| 79463 | 16918, // VCVTPH2BF8SZ256rmk |
| 79464 | 16922, // VCVTPH2BF8SZ256rmkz |
| 79465 | 16925, // VCVTPH2BF8SZ256rr |
| 79466 | 16927, // VCVTPH2BF8SZ256rrk |
| 79467 | 16931, // VCVTPH2BF8SZ256rrkz |
| 79468 | 16934, // VCVTPH2BF8SZrm |
| 79469 | 16936, // VCVTPH2BF8SZrmb |
| 79470 | 16938, // VCVTPH2BF8SZrmbk |
| 79471 | 16942, // VCVTPH2BF8SZrmbkz |
| 79472 | 16945, // VCVTPH2BF8SZrmk |
| 79473 | 16949, // VCVTPH2BF8SZrmkz |
| 79474 | 16952, // VCVTPH2BF8SZrr |
| 79475 | 16954, // VCVTPH2BF8SZrrk |
| 79476 | 16958, // VCVTPH2BF8SZrrkz |
| 79477 | 16961, // VCVTPH2BF8Z128rm |
| 79478 | 16963, // VCVTPH2BF8Z128rmb |
| 79479 | 16965, // VCVTPH2BF8Z128rmbk |
| 79480 | 16969, // VCVTPH2BF8Z128rmbkz |
| 79481 | 16972, // VCVTPH2BF8Z128rmk |
| 79482 | 16976, // VCVTPH2BF8Z128rmkz |
| 79483 | 16979, // VCVTPH2BF8Z128rr |
| 79484 | 16981, // VCVTPH2BF8Z128rrk |
| 79485 | 16985, // VCVTPH2BF8Z128rrkz |
| 79486 | 16988, // VCVTPH2BF8Z256rm |
| 79487 | 16990, // VCVTPH2BF8Z256rmb |
| 79488 | 16992, // VCVTPH2BF8Z256rmbk |
| 79489 | 16996, // VCVTPH2BF8Z256rmbkz |
| 79490 | 16999, // VCVTPH2BF8Z256rmk |
| 79491 | 17003, // VCVTPH2BF8Z256rmkz |
| 79492 | 17006, // VCVTPH2BF8Z256rr |
| 79493 | 17008, // VCVTPH2BF8Z256rrk |
| 79494 | 17012, // VCVTPH2BF8Z256rrkz |
| 79495 | 17015, // VCVTPH2BF8Zrm |
| 79496 | 17017, // VCVTPH2BF8Zrmb |
| 79497 | 17019, // VCVTPH2BF8Zrmbk |
| 79498 | 17023, // VCVTPH2BF8Zrmbkz |
| 79499 | 17026, // VCVTPH2BF8Zrmk |
| 79500 | 17030, // VCVTPH2BF8Zrmkz |
| 79501 | 17033, // VCVTPH2BF8Zrr |
| 79502 | 17035, // VCVTPH2BF8Zrrk |
| 79503 | 17039, // VCVTPH2BF8Zrrkz |
| 79504 | 17042, // VCVTPH2DQZ128rm |
| 79505 | 17044, // VCVTPH2DQZ128rmb |
| 79506 | 17046, // VCVTPH2DQZ128rmbk |
| 79507 | 17050, // VCVTPH2DQZ128rmbkz |
| 79508 | 17053, // VCVTPH2DQZ128rmk |
| 79509 | 17057, // VCVTPH2DQZ128rmkz |
| 79510 | 17060, // VCVTPH2DQZ128rr |
| 79511 | 17062, // VCVTPH2DQZ128rrk |
| 79512 | 17066, // VCVTPH2DQZ128rrkz |
| 79513 | 17069, // VCVTPH2DQZ256rm |
| 79514 | 17071, // VCVTPH2DQZ256rmb |
| 79515 | 17073, // VCVTPH2DQZ256rmbk |
| 79516 | 17077, // VCVTPH2DQZ256rmbkz |
| 79517 | 17080, // VCVTPH2DQZ256rmk |
| 79518 | 17084, // VCVTPH2DQZ256rmkz |
| 79519 | 17087, // VCVTPH2DQZ256rr |
| 79520 | 17089, // VCVTPH2DQZ256rrk |
| 79521 | 17093, // VCVTPH2DQZ256rrkz |
| 79522 | 17096, // VCVTPH2DQZrm |
| 79523 | 17098, // VCVTPH2DQZrmb |
| 79524 | 17100, // VCVTPH2DQZrmbk |
| 79525 | 17104, // VCVTPH2DQZrmbkz |
| 79526 | 17107, // VCVTPH2DQZrmk |
| 79527 | 17111, // VCVTPH2DQZrmkz |
| 79528 | 17114, // VCVTPH2DQZrr |
| 79529 | 17116, // VCVTPH2DQZrrb |
| 79530 | 17119, // VCVTPH2DQZrrbk |
| 79531 | 17124, // VCVTPH2DQZrrbkz |
| 79532 | 17128, // VCVTPH2DQZrrk |
| 79533 | 17132, // VCVTPH2DQZrrkz |
| 79534 | 17135, // VCVTPH2HF8SZ128rm |
| 79535 | 17137, // VCVTPH2HF8SZ128rmb |
| 79536 | 17139, // VCVTPH2HF8SZ128rmbk |
| 79537 | 17143, // VCVTPH2HF8SZ128rmbkz |
| 79538 | 17146, // VCVTPH2HF8SZ128rmk |
| 79539 | 17150, // VCVTPH2HF8SZ128rmkz |
| 79540 | 17153, // VCVTPH2HF8SZ128rr |
| 79541 | 17155, // VCVTPH2HF8SZ128rrk |
| 79542 | 17159, // VCVTPH2HF8SZ128rrkz |
| 79543 | 17162, // VCVTPH2HF8SZ256rm |
| 79544 | 17164, // VCVTPH2HF8SZ256rmb |
| 79545 | 17166, // VCVTPH2HF8SZ256rmbk |
| 79546 | 17170, // VCVTPH2HF8SZ256rmbkz |
| 79547 | 17173, // VCVTPH2HF8SZ256rmk |
| 79548 | 17177, // VCVTPH2HF8SZ256rmkz |
| 79549 | 17180, // VCVTPH2HF8SZ256rr |
| 79550 | 17182, // VCVTPH2HF8SZ256rrk |
| 79551 | 17186, // VCVTPH2HF8SZ256rrkz |
| 79552 | 17189, // VCVTPH2HF8SZrm |
| 79553 | 17191, // VCVTPH2HF8SZrmb |
| 79554 | 17193, // VCVTPH2HF8SZrmbk |
| 79555 | 17197, // VCVTPH2HF8SZrmbkz |
| 79556 | 17200, // VCVTPH2HF8SZrmk |
| 79557 | 17204, // VCVTPH2HF8SZrmkz |
| 79558 | 17207, // VCVTPH2HF8SZrr |
| 79559 | 17209, // VCVTPH2HF8SZrrk |
| 79560 | 17213, // VCVTPH2HF8SZrrkz |
| 79561 | 17216, // VCVTPH2HF8Z128rm |
| 79562 | 17218, // VCVTPH2HF8Z128rmb |
| 79563 | 17220, // VCVTPH2HF8Z128rmbk |
| 79564 | 17224, // VCVTPH2HF8Z128rmbkz |
| 79565 | 17227, // VCVTPH2HF8Z128rmk |
| 79566 | 17231, // VCVTPH2HF8Z128rmkz |
| 79567 | 17234, // VCVTPH2HF8Z128rr |
| 79568 | 17236, // VCVTPH2HF8Z128rrk |
| 79569 | 17240, // VCVTPH2HF8Z128rrkz |
| 79570 | 17243, // VCVTPH2HF8Z256rm |
| 79571 | 17245, // VCVTPH2HF8Z256rmb |
| 79572 | 17247, // VCVTPH2HF8Z256rmbk |
| 79573 | 17251, // VCVTPH2HF8Z256rmbkz |
| 79574 | 17254, // VCVTPH2HF8Z256rmk |
| 79575 | 17258, // VCVTPH2HF8Z256rmkz |
| 79576 | 17261, // VCVTPH2HF8Z256rr |
| 79577 | 17263, // VCVTPH2HF8Z256rrk |
| 79578 | 17267, // VCVTPH2HF8Z256rrkz |
| 79579 | 17270, // VCVTPH2HF8Zrm |
| 79580 | 17272, // VCVTPH2HF8Zrmb |
| 79581 | 17274, // VCVTPH2HF8Zrmbk |
| 79582 | 17278, // VCVTPH2HF8Zrmbkz |
| 79583 | 17281, // VCVTPH2HF8Zrmk |
| 79584 | 17285, // VCVTPH2HF8Zrmkz |
| 79585 | 17288, // VCVTPH2HF8Zrr |
| 79586 | 17290, // VCVTPH2HF8Zrrk |
| 79587 | 17294, // VCVTPH2HF8Zrrkz |
| 79588 | 17297, // VCVTPH2IBSZ128rm |
| 79589 | 17299, // VCVTPH2IBSZ128rmb |
| 79590 | 17301, // VCVTPH2IBSZ128rmbk |
| 79591 | 17305, // VCVTPH2IBSZ128rmbkz |
| 79592 | 17308, // VCVTPH2IBSZ128rmk |
| 79593 | 17312, // VCVTPH2IBSZ128rmkz |
| 79594 | 17315, // VCVTPH2IBSZ128rr |
| 79595 | 17317, // VCVTPH2IBSZ128rrk |
| 79596 | 17321, // VCVTPH2IBSZ128rrkz |
| 79597 | 17324, // VCVTPH2IBSZ256rm |
| 79598 | 17326, // VCVTPH2IBSZ256rmb |
| 79599 | 17328, // VCVTPH2IBSZ256rmbk |
| 79600 | 17332, // VCVTPH2IBSZ256rmbkz |
| 79601 | 17335, // VCVTPH2IBSZ256rmk |
| 79602 | 17339, // VCVTPH2IBSZ256rmkz |
| 79603 | 17342, // VCVTPH2IBSZ256rr |
| 79604 | 17344, // VCVTPH2IBSZ256rrk |
| 79605 | 17348, // VCVTPH2IBSZ256rrkz |
| 79606 | 17351, // VCVTPH2IBSZrm |
| 79607 | 17353, // VCVTPH2IBSZrmb |
| 79608 | 17355, // VCVTPH2IBSZrmbk |
| 79609 | 17359, // VCVTPH2IBSZrmbkz |
| 79610 | 17362, // VCVTPH2IBSZrmk |
| 79611 | 17366, // VCVTPH2IBSZrmkz |
| 79612 | 17369, // VCVTPH2IBSZrr |
| 79613 | 17371, // VCVTPH2IBSZrrb |
| 79614 | 17374, // VCVTPH2IBSZrrbk |
| 79615 | 17379, // VCVTPH2IBSZrrbkz |
| 79616 | 17383, // VCVTPH2IBSZrrk |
| 79617 | 17387, // VCVTPH2IBSZrrkz |
| 79618 | 17390, // VCVTPH2IUBSZ128rm |
| 79619 | 17392, // VCVTPH2IUBSZ128rmb |
| 79620 | 17394, // VCVTPH2IUBSZ128rmbk |
| 79621 | 17398, // VCVTPH2IUBSZ128rmbkz |
| 79622 | 17401, // VCVTPH2IUBSZ128rmk |
| 79623 | 17405, // VCVTPH2IUBSZ128rmkz |
| 79624 | 17408, // VCVTPH2IUBSZ128rr |
| 79625 | 17410, // VCVTPH2IUBSZ128rrk |
| 79626 | 17414, // VCVTPH2IUBSZ128rrkz |
| 79627 | 17417, // VCVTPH2IUBSZ256rm |
| 79628 | 17419, // VCVTPH2IUBSZ256rmb |
| 79629 | 17421, // VCVTPH2IUBSZ256rmbk |
| 79630 | 17425, // VCVTPH2IUBSZ256rmbkz |
| 79631 | 17428, // VCVTPH2IUBSZ256rmk |
| 79632 | 17432, // VCVTPH2IUBSZ256rmkz |
| 79633 | 17435, // VCVTPH2IUBSZ256rr |
| 79634 | 17437, // VCVTPH2IUBSZ256rrk |
| 79635 | 17441, // VCVTPH2IUBSZ256rrkz |
| 79636 | 17444, // VCVTPH2IUBSZrm |
| 79637 | 17446, // VCVTPH2IUBSZrmb |
| 79638 | 17448, // VCVTPH2IUBSZrmbk |
| 79639 | 17452, // VCVTPH2IUBSZrmbkz |
| 79640 | 17455, // VCVTPH2IUBSZrmk |
| 79641 | 17459, // VCVTPH2IUBSZrmkz |
| 79642 | 17462, // VCVTPH2IUBSZrr |
| 79643 | 17464, // VCVTPH2IUBSZrrb |
| 79644 | 17467, // VCVTPH2IUBSZrrbk |
| 79645 | 17472, // VCVTPH2IUBSZrrbkz |
| 79646 | 17476, // VCVTPH2IUBSZrrk |
| 79647 | 17480, // VCVTPH2IUBSZrrkz |
| 79648 | 17483, // VCVTPH2PDZ128rm |
| 79649 | 17485, // VCVTPH2PDZ128rmb |
| 79650 | 17487, // VCVTPH2PDZ128rmbk |
| 79651 | 17491, // VCVTPH2PDZ128rmbkz |
| 79652 | 17494, // VCVTPH2PDZ128rmk |
| 79653 | 17498, // VCVTPH2PDZ128rmkz |
| 79654 | 17501, // VCVTPH2PDZ128rr |
| 79655 | 17503, // VCVTPH2PDZ128rrk |
| 79656 | 17507, // VCVTPH2PDZ128rrkz |
| 79657 | 17510, // VCVTPH2PDZ256rm |
| 79658 | 17512, // VCVTPH2PDZ256rmb |
| 79659 | 17514, // VCVTPH2PDZ256rmbk |
| 79660 | 17518, // VCVTPH2PDZ256rmbkz |
| 79661 | 17521, // VCVTPH2PDZ256rmk |
| 79662 | 17525, // VCVTPH2PDZ256rmkz |
| 79663 | 17528, // VCVTPH2PDZ256rr |
| 79664 | 17530, // VCVTPH2PDZ256rrk |
| 79665 | 17534, // VCVTPH2PDZ256rrkz |
| 79666 | 17537, // VCVTPH2PDZrm |
| 79667 | 17539, // VCVTPH2PDZrmb |
| 79668 | 17541, // VCVTPH2PDZrmbk |
| 79669 | 17545, // VCVTPH2PDZrmbkz |
| 79670 | 17548, // VCVTPH2PDZrmk |
| 79671 | 17552, // VCVTPH2PDZrmkz |
| 79672 | 17555, // VCVTPH2PDZrr |
| 79673 | 17557, // VCVTPH2PDZrrb |
| 79674 | 17559, // VCVTPH2PDZrrbk |
| 79675 | 17563, // VCVTPH2PDZrrbkz |
| 79676 | 17566, // VCVTPH2PDZrrk |
| 79677 | 17570, // VCVTPH2PDZrrkz |
| 79678 | 17573, // VCVTPH2PSXZ128rm |
| 79679 | 17575, // VCVTPH2PSXZ128rmb |
| 79680 | 17577, // VCVTPH2PSXZ128rmbk |
| 79681 | 17581, // VCVTPH2PSXZ128rmbkz |
| 79682 | 17584, // VCVTPH2PSXZ128rmk |
| 79683 | 17588, // VCVTPH2PSXZ128rmkz |
| 79684 | 17591, // VCVTPH2PSXZ128rr |
| 79685 | 17593, // VCVTPH2PSXZ128rrk |
| 79686 | 17597, // VCVTPH2PSXZ128rrkz |
| 79687 | 17600, // VCVTPH2PSXZ256rm |
| 79688 | 17602, // VCVTPH2PSXZ256rmb |
| 79689 | 17604, // VCVTPH2PSXZ256rmbk |
| 79690 | 17608, // VCVTPH2PSXZ256rmbkz |
| 79691 | 17611, // VCVTPH2PSXZ256rmk |
| 79692 | 17615, // VCVTPH2PSXZ256rmkz |
| 79693 | 17618, // VCVTPH2PSXZ256rr |
| 79694 | 17620, // VCVTPH2PSXZ256rrk |
| 79695 | 17624, // VCVTPH2PSXZ256rrkz |
| 79696 | 17627, // VCVTPH2PSXZrm |
| 79697 | 17629, // VCVTPH2PSXZrmb |
| 79698 | 17631, // VCVTPH2PSXZrmbk |
| 79699 | 17635, // VCVTPH2PSXZrmbkz |
| 79700 | 17638, // VCVTPH2PSXZrmk |
| 79701 | 17642, // VCVTPH2PSXZrmkz |
| 79702 | 17645, // VCVTPH2PSXZrr |
| 79703 | 17647, // VCVTPH2PSXZrrb |
| 79704 | 17649, // VCVTPH2PSXZrrbk |
| 79705 | 17653, // VCVTPH2PSXZrrbkz |
| 79706 | 17656, // VCVTPH2PSXZrrk |
| 79707 | 17660, // VCVTPH2PSXZrrkz |
| 79708 | 17663, // VCVTPH2PSYrm |
| 79709 | 17665, // VCVTPH2PSYrr |
| 79710 | 17667, // VCVTPH2PSZ128rm |
| 79711 | 17669, // VCVTPH2PSZ128rmk |
| 79712 | 17673, // VCVTPH2PSZ128rmkz |
| 79713 | 17676, // VCVTPH2PSZ128rr |
| 79714 | 17678, // VCVTPH2PSZ128rrk |
| 79715 | 17682, // VCVTPH2PSZ128rrkz |
| 79716 | 17685, // VCVTPH2PSZ256rm |
| 79717 | 17687, // VCVTPH2PSZ256rmk |
| 79718 | 17691, // VCVTPH2PSZ256rmkz |
| 79719 | 17694, // VCVTPH2PSZ256rr |
| 79720 | 17696, // VCVTPH2PSZ256rrk |
| 79721 | 17700, // VCVTPH2PSZ256rrkz |
| 79722 | 17703, // VCVTPH2PSZrm |
| 79723 | 17705, // VCVTPH2PSZrmk |
| 79724 | 17709, // VCVTPH2PSZrmkz |
| 79725 | 17712, // VCVTPH2PSZrr |
| 79726 | 17714, // VCVTPH2PSZrrb |
| 79727 | 17716, // VCVTPH2PSZrrbk |
| 79728 | 17720, // VCVTPH2PSZrrbkz |
| 79729 | 17723, // VCVTPH2PSZrrk |
| 79730 | 17727, // VCVTPH2PSZrrkz |
| 79731 | 17730, // VCVTPH2PSrm |
| 79732 | 17732, // VCVTPH2PSrr |
| 79733 | 17734, // VCVTPH2QQZ128rm |
| 79734 | 17736, // VCVTPH2QQZ128rmb |
| 79735 | 17738, // VCVTPH2QQZ128rmbk |
| 79736 | 17742, // VCVTPH2QQZ128rmbkz |
| 79737 | 17745, // VCVTPH2QQZ128rmk |
| 79738 | 17749, // VCVTPH2QQZ128rmkz |
| 79739 | 17752, // VCVTPH2QQZ128rr |
| 79740 | 17754, // VCVTPH2QQZ128rrk |
| 79741 | 17758, // VCVTPH2QQZ128rrkz |
| 79742 | 17761, // VCVTPH2QQZ256rm |
| 79743 | 17763, // VCVTPH2QQZ256rmb |
| 79744 | 17765, // VCVTPH2QQZ256rmbk |
| 79745 | 17769, // VCVTPH2QQZ256rmbkz |
| 79746 | 17772, // VCVTPH2QQZ256rmk |
| 79747 | 17776, // VCVTPH2QQZ256rmkz |
| 79748 | 17779, // VCVTPH2QQZ256rr |
| 79749 | 17781, // VCVTPH2QQZ256rrk |
| 79750 | 17785, // VCVTPH2QQZ256rrkz |
| 79751 | 17788, // VCVTPH2QQZrm |
| 79752 | 17790, // VCVTPH2QQZrmb |
| 79753 | 17792, // VCVTPH2QQZrmbk |
| 79754 | 17796, // VCVTPH2QQZrmbkz |
| 79755 | 17799, // VCVTPH2QQZrmk |
| 79756 | 17803, // VCVTPH2QQZrmkz |
| 79757 | 17806, // VCVTPH2QQZrr |
| 79758 | 17808, // VCVTPH2QQZrrb |
| 79759 | 17811, // VCVTPH2QQZrrbk |
| 79760 | 17816, // VCVTPH2QQZrrbkz |
| 79761 | 17820, // VCVTPH2QQZrrk |
| 79762 | 17824, // VCVTPH2QQZrrkz |
| 79763 | 17827, // VCVTPH2UDQZ128rm |
| 79764 | 17829, // VCVTPH2UDQZ128rmb |
| 79765 | 17831, // VCVTPH2UDQZ128rmbk |
| 79766 | 17835, // VCVTPH2UDQZ128rmbkz |
| 79767 | 17838, // VCVTPH2UDQZ128rmk |
| 79768 | 17842, // VCVTPH2UDQZ128rmkz |
| 79769 | 17845, // VCVTPH2UDQZ128rr |
| 79770 | 17847, // VCVTPH2UDQZ128rrk |
| 79771 | 17851, // VCVTPH2UDQZ128rrkz |
| 79772 | 17854, // VCVTPH2UDQZ256rm |
| 79773 | 17856, // VCVTPH2UDQZ256rmb |
| 79774 | 17858, // VCVTPH2UDQZ256rmbk |
| 79775 | 17862, // VCVTPH2UDQZ256rmbkz |
| 79776 | 17865, // VCVTPH2UDQZ256rmk |
| 79777 | 17869, // VCVTPH2UDQZ256rmkz |
| 79778 | 17872, // VCVTPH2UDQZ256rr |
| 79779 | 17874, // VCVTPH2UDQZ256rrk |
| 79780 | 17878, // VCVTPH2UDQZ256rrkz |
| 79781 | 17881, // VCVTPH2UDQZrm |
| 79782 | 17883, // VCVTPH2UDQZrmb |
| 79783 | 17885, // VCVTPH2UDQZrmbk |
| 79784 | 17889, // VCVTPH2UDQZrmbkz |
| 79785 | 17892, // VCVTPH2UDQZrmk |
| 79786 | 17896, // VCVTPH2UDQZrmkz |
| 79787 | 17899, // VCVTPH2UDQZrr |
| 79788 | 17901, // VCVTPH2UDQZrrb |
| 79789 | 17904, // VCVTPH2UDQZrrbk |
| 79790 | 17909, // VCVTPH2UDQZrrbkz |
| 79791 | 17913, // VCVTPH2UDQZrrk |
| 79792 | 17917, // VCVTPH2UDQZrrkz |
| 79793 | 17920, // VCVTPH2UQQZ128rm |
| 79794 | 17922, // VCVTPH2UQQZ128rmb |
| 79795 | 17924, // VCVTPH2UQQZ128rmbk |
| 79796 | 17928, // VCVTPH2UQQZ128rmbkz |
| 79797 | 17931, // VCVTPH2UQQZ128rmk |
| 79798 | 17935, // VCVTPH2UQQZ128rmkz |
| 79799 | 17938, // VCVTPH2UQQZ128rr |
| 79800 | 17940, // VCVTPH2UQQZ128rrk |
| 79801 | 17944, // VCVTPH2UQQZ128rrkz |
| 79802 | 17947, // VCVTPH2UQQZ256rm |
| 79803 | 17949, // VCVTPH2UQQZ256rmb |
| 79804 | 17951, // VCVTPH2UQQZ256rmbk |
| 79805 | 17955, // VCVTPH2UQQZ256rmbkz |
| 79806 | 17958, // VCVTPH2UQQZ256rmk |
| 79807 | 17962, // VCVTPH2UQQZ256rmkz |
| 79808 | 17965, // VCVTPH2UQQZ256rr |
| 79809 | 17967, // VCVTPH2UQQZ256rrk |
| 79810 | 17971, // VCVTPH2UQQZ256rrkz |
| 79811 | 17974, // VCVTPH2UQQZrm |
| 79812 | 17976, // VCVTPH2UQQZrmb |
| 79813 | 17978, // VCVTPH2UQQZrmbk |
| 79814 | 17982, // VCVTPH2UQQZrmbkz |
| 79815 | 17985, // VCVTPH2UQQZrmk |
| 79816 | 17989, // VCVTPH2UQQZrmkz |
| 79817 | 17992, // VCVTPH2UQQZrr |
| 79818 | 17994, // VCVTPH2UQQZrrb |
| 79819 | 17997, // VCVTPH2UQQZrrbk |
| 79820 | 18002, // VCVTPH2UQQZrrbkz |
| 79821 | 18006, // VCVTPH2UQQZrrk |
| 79822 | 18010, // VCVTPH2UQQZrrkz |
| 79823 | 18013, // VCVTPH2UWZ128rm |
| 79824 | 18015, // VCVTPH2UWZ128rmb |
| 79825 | 18017, // VCVTPH2UWZ128rmbk |
| 79826 | 18021, // VCVTPH2UWZ128rmbkz |
| 79827 | 18024, // VCVTPH2UWZ128rmk |
| 79828 | 18028, // VCVTPH2UWZ128rmkz |
| 79829 | 18031, // VCVTPH2UWZ128rr |
| 79830 | 18033, // VCVTPH2UWZ128rrk |
| 79831 | 18037, // VCVTPH2UWZ128rrkz |
| 79832 | 18040, // VCVTPH2UWZ256rm |
| 79833 | 18042, // VCVTPH2UWZ256rmb |
| 79834 | 18044, // VCVTPH2UWZ256rmbk |
| 79835 | 18048, // VCVTPH2UWZ256rmbkz |
| 79836 | 18051, // VCVTPH2UWZ256rmk |
| 79837 | 18055, // VCVTPH2UWZ256rmkz |
| 79838 | 18058, // VCVTPH2UWZ256rr |
| 79839 | 18060, // VCVTPH2UWZ256rrk |
| 79840 | 18064, // VCVTPH2UWZ256rrkz |
| 79841 | 18067, // VCVTPH2UWZrm |
| 79842 | 18069, // VCVTPH2UWZrmb |
| 79843 | 18071, // VCVTPH2UWZrmbk |
| 79844 | 18075, // VCVTPH2UWZrmbkz |
| 79845 | 18078, // VCVTPH2UWZrmk |
| 79846 | 18082, // VCVTPH2UWZrmkz |
| 79847 | 18085, // VCVTPH2UWZrr |
| 79848 | 18087, // VCVTPH2UWZrrb |
| 79849 | 18090, // VCVTPH2UWZrrbk |
| 79850 | 18095, // VCVTPH2UWZrrbkz |
| 79851 | 18099, // VCVTPH2UWZrrk |
| 79852 | 18103, // VCVTPH2UWZrrkz |
| 79853 | 18106, // VCVTPH2WZ128rm |
| 79854 | 18108, // VCVTPH2WZ128rmb |
| 79855 | 18110, // VCVTPH2WZ128rmbk |
| 79856 | 18114, // VCVTPH2WZ128rmbkz |
| 79857 | 18117, // VCVTPH2WZ128rmk |
| 79858 | 18121, // VCVTPH2WZ128rmkz |
| 79859 | 18124, // VCVTPH2WZ128rr |
| 79860 | 18126, // VCVTPH2WZ128rrk |
| 79861 | 18130, // VCVTPH2WZ128rrkz |
| 79862 | 18133, // VCVTPH2WZ256rm |
| 79863 | 18135, // VCVTPH2WZ256rmb |
| 79864 | 18137, // VCVTPH2WZ256rmbk |
| 79865 | 18141, // VCVTPH2WZ256rmbkz |
| 79866 | 18144, // VCVTPH2WZ256rmk |
| 79867 | 18148, // VCVTPH2WZ256rmkz |
| 79868 | 18151, // VCVTPH2WZ256rr |
| 79869 | 18153, // VCVTPH2WZ256rrk |
| 79870 | 18157, // VCVTPH2WZ256rrkz |
| 79871 | 18160, // VCVTPH2WZrm |
| 79872 | 18162, // VCVTPH2WZrmb |
| 79873 | 18164, // VCVTPH2WZrmbk |
| 79874 | 18168, // VCVTPH2WZrmbkz |
| 79875 | 18171, // VCVTPH2WZrmk |
| 79876 | 18175, // VCVTPH2WZrmkz |
| 79877 | 18178, // VCVTPH2WZrr |
| 79878 | 18180, // VCVTPH2WZrrb |
| 79879 | 18183, // VCVTPH2WZrrbk |
| 79880 | 18188, // VCVTPH2WZrrbkz |
| 79881 | 18192, // VCVTPH2WZrrk |
| 79882 | 18196, // VCVTPH2WZrrkz |
| 79883 | 18199, // VCVTPS2DQYrm |
| 79884 | 18201, // VCVTPS2DQYrr |
| 79885 | 18203, // VCVTPS2DQZ128rm |
| 79886 | 18205, // VCVTPS2DQZ128rmb |
| 79887 | 18207, // VCVTPS2DQZ128rmbk |
| 79888 | 18211, // VCVTPS2DQZ128rmbkz |
| 79889 | 18214, // VCVTPS2DQZ128rmk |
| 79890 | 18218, // VCVTPS2DQZ128rmkz |
| 79891 | 18221, // VCVTPS2DQZ128rr |
| 79892 | 18223, // VCVTPS2DQZ128rrk |
| 79893 | 18227, // VCVTPS2DQZ128rrkz |
| 79894 | 18230, // VCVTPS2DQZ256rm |
| 79895 | 18232, // VCVTPS2DQZ256rmb |
| 79896 | 18234, // VCVTPS2DQZ256rmbk |
| 79897 | 18238, // VCVTPS2DQZ256rmbkz |
| 79898 | 18241, // VCVTPS2DQZ256rmk |
| 79899 | 18245, // VCVTPS2DQZ256rmkz |
| 79900 | 18248, // VCVTPS2DQZ256rr |
| 79901 | 18250, // VCVTPS2DQZ256rrk |
| 79902 | 18254, // VCVTPS2DQZ256rrkz |
| 79903 | 18257, // VCVTPS2DQZrm |
| 79904 | 18259, // VCVTPS2DQZrmb |
| 79905 | 18261, // VCVTPS2DQZrmbk |
| 79906 | 18265, // VCVTPS2DQZrmbkz |
| 79907 | 18268, // VCVTPS2DQZrmk |
| 79908 | 18272, // VCVTPS2DQZrmkz |
| 79909 | 18275, // VCVTPS2DQZrr |
| 79910 | 18277, // VCVTPS2DQZrrb |
| 79911 | 18280, // VCVTPS2DQZrrbk |
| 79912 | 18285, // VCVTPS2DQZrrbkz |
| 79913 | 18289, // VCVTPS2DQZrrk |
| 79914 | 18293, // VCVTPS2DQZrrkz |
| 79915 | 18296, // VCVTPS2DQrm |
| 79916 | 18298, // VCVTPS2DQrr |
| 79917 | 18300, // VCVTPS2IBSZ128rm |
| 79918 | 18302, // VCVTPS2IBSZ128rmb |
| 79919 | 18304, // VCVTPS2IBSZ128rmbk |
| 79920 | 18308, // VCVTPS2IBSZ128rmbkz |
| 79921 | 18311, // VCVTPS2IBSZ128rmk |
| 79922 | 18315, // VCVTPS2IBSZ128rmkz |
| 79923 | 18318, // VCVTPS2IBSZ128rr |
| 79924 | 18320, // VCVTPS2IBSZ128rrk |
| 79925 | 18324, // VCVTPS2IBSZ128rrkz |
| 79926 | 18327, // VCVTPS2IBSZ256rm |
| 79927 | 18329, // VCVTPS2IBSZ256rmb |
| 79928 | 18331, // VCVTPS2IBSZ256rmbk |
| 79929 | 18335, // VCVTPS2IBSZ256rmbkz |
| 79930 | 18338, // VCVTPS2IBSZ256rmk |
| 79931 | 18342, // VCVTPS2IBSZ256rmkz |
| 79932 | 18345, // VCVTPS2IBSZ256rr |
| 79933 | 18347, // VCVTPS2IBSZ256rrk |
| 79934 | 18351, // VCVTPS2IBSZ256rrkz |
| 79935 | 18354, // VCVTPS2IBSZrm |
| 79936 | 18356, // VCVTPS2IBSZrmb |
| 79937 | 18358, // VCVTPS2IBSZrmbk |
| 79938 | 18362, // VCVTPS2IBSZrmbkz |
| 79939 | 18365, // VCVTPS2IBSZrmk |
| 79940 | 18369, // VCVTPS2IBSZrmkz |
| 79941 | 18372, // VCVTPS2IBSZrr |
| 79942 | 18374, // VCVTPS2IBSZrrb |
| 79943 | 18377, // VCVTPS2IBSZrrbk |
| 79944 | 18382, // VCVTPS2IBSZrrbkz |
| 79945 | 18386, // VCVTPS2IBSZrrk |
| 79946 | 18390, // VCVTPS2IBSZrrkz |
| 79947 | 18393, // VCVTPS2IUBSZ128rm |
| 79948 | 18395, // VCVTPS2IUBSZ128rmb |
| 79949 | 18397, // VCVTPS2IUBSZ128rmbk |
| 79950 | 18401, // VCVTPS2IUBSZ128rmbkz |
| 79951 | 18404, // VCVTPS2IUBSZ128rmk |
| 79952 | 18408, // VCVTPS2IUBSZ128rmkz |
| 79953 | 18411, // VCVTPS2IUBSZ128rr |
| 79954 | 18413, // VCVTPS2IUBSZ128rrk |
| 79955 | 18417, // VCVTPS2IUBSZ128rrkz |
| 79956 | 18420, // VCVTPS2IUBSZ256rm |
| 79957 | 18422, // VCVTPS2IUBSZ256rmb |
| 79958 | 18424, // VCVTPS2IUBSZ256rmbk |
| 79959 | 18428, // VCVTPS2IUBSZ256rmbkz |
| 79960 | 18431, // VCVTPS2IUBSZ256rmk |
| 79961 | 18435, // VCVTPS2IUBSZ256rmkz |
| 79962 | 18438, // VCVTPS2IUBSZ256rr |
| 79963 | 18440, // VCVTPS2IUBSZ256rrk |
| 79964 | 18444, // VCVTPS2IUBSZ256rrkz |
| 79965 | 18447, // VCVTPS2IUBSZrm |
| 79966 | 18449, // VCVTPS2IUBSZrmb |
| 79967 | 18451, // VCVTPS2IUBSZrmbk |
| 79968 | 18455, // VCVTPS2IUBSZrmbkz |
| 79969 | 18458, // VCVTPS2IUBSZrmk |
| 79970 | 18462, // VCVTPS2IUBSZrmkz |
| 79971 | 18465, // VCVTPS2IUBSZrr |
| 79972 | 18467, // VCVTPS2IUBSZrrb |
| 79973 | 18470, // VCVTPS2IUBSZrrbk |
| 79974 | 18475, // VCVTPS2IUBSZrrbkz |
| 79975 | 18479, // VCVTPS2IUBSZrrk |
| 79976 | 18483, // VCVTPS2IUBSZrrkz |
| 79977 | 18486, // VCVTPS2PDYrm |
| 79978 | 18488, // VCVTPS2PDYrr |
| 79979 | 18490, // VCVTPS2PDZ128rm |
| 79980 | 18492, // VCVTPS2PDZ128rmb |
| 79981 | 18494, // VCVTPS2PDZ128rmbk |
| 79982 | 18498, // VCVTPS2PDZ128rmbkz |
| 79983 | 18501, // VCVTPS2PDZ128rmk |
| 79984 | 18505, // VCVTPS2PDZ128rmkz |
| 79985 | 18508, // VCVTPS2PDZ128rr |
| 79986 | 18510, // VCVTPS2PDZ128rrk |
| 79987 | 18514, // VCVTPS2PDZ128rrkz |
| 79988 | 18517, // VCVTPS2PDZ256rm |
| 79989 | 18519, // VCVTPS2PDZ256rmb |
| 79990 | 18521, // VCVTPS2PDZ256rmbk |
| 79991 | 18525, // VCVTPS2PDZ256rmbkz |
| 79992 | 18528, // VCVTPS2PDZ256rmk |
| 79993 | 18532, // VCVTPS2PDZ256rmkz |
| 79994 | 18535, // VCVTPS2PDZ256rr |
| 79995 | 18537, // VCVTPS2PDZ256rrk |
| 79996 | 18541, // VCVTPS2PDZ256rrkz |
| 79997 | 18544, // VCVTPS2PDZrm |
| 79998 | 18546, // VCVTPS2PDZrmb |
| 79999 | 18548, // VCVTPS2PDZrmbk |
| 80000 | 18552, // VCVTPS2PDZrmbkz |
| 80001 | 18555, // VCVTPS2PDZrmk |
| 80002 | 18559, // VCVTPS2PDZrmkz |
| 80003 | 18562, // VCVTPS2PDZrr |
| 80004 | 18564, // VCVTPS2PDZrrb |
| 80005 | 18566, // VCVTPS2PDZrrbk |
| 80006 | 18570, // VCVTPS2PDZrrbkz |
| 80007 | 18573, // VCVTPS2PDZrrk |
| 80008 | 18577, // VCVTPS2PDZrrkz |
| 80009 | 18580, // VCVTPS2PDrm |
| 80010 | 18582, // VCVTPS2PDrr |
| 80011 | 18584, // VCVTPS2PHXZ128rm |
| 80012 | 18586, // VCVTPS2PHXZ128rmb |
| 80013 | 18588, // VCVTPS2PHXZ128rmbk |
| 80014 | 18592, // VCVTPS2PHXZ128rmbkz |
| 80015 | 18595, // VCVTPS2PHXZ128rmk |
| 80016 | 18599, // VCVTPS2PHXZ128rmkz |
| 80017 | 18602, // VCVTPS2PHXZ128rr |
| 80018 | 18604, // VCVTPS2PHXZ128rrk |
| 80019 | 18608, // VCVTPS2PHXZ128rrkz |
| 80020 | 18611, // VCVTPS2PHXZ256rm |
| 80021 | 18613, // VCVTPS2PHXZ256rmb |
| 80022 | 18615, // VCVTPS2PHXZ256rmbk |
| 80023 | 18619, // VCVTPS2PHXZ256rmbkz |
| 80024 | 18622, // VCVTPS2PHXZ256rmk |
| 80025 | 18626, // VCVTPS2PHXZ256rmkz |
| 80026 | 18629, // VCVTPS2PHXZ256rr |
| 80027 | 18631, // VCVTPS2PHXZ256rrk |
| 80028 | 18635, // VCVTPS2PHXZ256rrkz |
| 80029 | 18638, // VCVTPS2PHXZrm |
| 80030 | 18640, // VCVTPS2PHXZrmb |
| 80031 | 18642, // VCVTPS2PHXZrmbk |
| 80032 | 18646, // VCVTPS2PHXZrmbkz |
| 80033 | 18649, // VCVTPS2PHXZrmk |
| 80034 | 18653, // VCVTPS2PHXZrmkz |
| 80035 | 18656, // VCVTPS2PHXZrr |
| 80036 | 18658, // VCVTPS2PHXZrrb |
| 80037 | 18661, // VCVTPS2PHXZrrbk |
| 80038 | 18666, // VCVTPS2PHXZrrbkz |
| 80039 | 18670, // VCVTPS2PHXZrrk |
| 80040 | 18674, // VCVTPS2PHXZrrkz |
| 80041 | 18677, // VCVTPS2PHYmr |
| 80042 | 18680, // VCVTPS2PHYrr |
| 80043 | 18683, // VCVTPS2PHZ128mr |
| 80044 | 18686, // VCVTPS2PHZ128mrk |
| 80045 | 18690, // VCVTPS2PHZ128rr |
| 80046 | 18693, // VCVTPS2PHZ128rrk |
| 80047 | 18698, // VCVTPS2PHZ128rrkz |
| 80048 | 18702, // VCVTPS2PHZ256mr |
| 80049 | 18705, // VCVTPS2PHZ256mrk |
| 80050 | 18709, // VCVTPS2PHZ256rr |
| 80051 | 18712, // VCVTPS2PHZ256rrk |
| 80052 | 18717, // VCVTPS2PHZ256rrkz |
| 80053 | 18721, // VCVTPS2PHZmr |
| 80054 | 18724, // VCVTPS2PHZmrk |
| 80055 | 18728, // VCVTPS2PHZrr |
| 80056 | 18731, // VCVTPS2PHZrrb |
| 80057 | 18734, // VCVTPS2PHZrrbk |
| 80058 | 18739, // VCVTPS2PHZrrbkz |
| 80059 | 18743, // VCVTPS2PHZrrk |
| 80060 | 18748, // VCVTPS2PHZrrkz |
| 80061 | 18752, // VCVTPS2PHmr |
| 80062 | 18755, // VCVTPS2PHrr |
| 80063 | 18758, // VCVTPS2QQZ128rm |
| 80064 | 18760, // VCVTPS2QQZ128rmb |
| 80065 | 18762, // VCVTPS2QQZ128rmbk |
| 80066 | 18766, // VCVTPS2QQZ128rmbkz |
| 80067 | 18769, // VCVTPS2QQZ128rmk |
| 80068 | 18773, // VCVTPS2QQZ128rmkz |
| 80069 | 18776, // VCVTPS2QQZ128rr |
| 80070 | 18778, // VCVTPS2QQZ128rrk |
| 80071 | 18782, // VCVTPS2QQZ128rrkz |
| 80072 | 18785, // VCVTPS2QQZ256rm |
| 80073 | 18787, // VCVTPS2QQZ256rmb |
| 80074 | 18789, // VCVTPS2QQZ256rmbk |
| 80075 | 18793, // VCVTPS2QQZ256rmbkz |
| 80076 | 18796, // VCVTPS2QQZ256rmk |
| 80077 | 18800, // VCVTPS2QQZ256rmkz |
| 80078 | 18803, // VCVTPS2QQZ256rr |
| 80079 | 18805, // VCVTPS2QQZ256rrk |
| 80080 | 18809, // VCVTPS2QQZ256rrkz |
| 80081 | 18812, // VCVTPS2QQZrm |
| 80082 | 18814, // VCVTPS2QQZrmb |
| 80083 | 18816, // VCVTPS2QQZrmbk |
| 80084 | 18820, // VCVTPS2QQZrmbkz |
| 80085 | 18823, // VCVTPS2QQZrmk |
| 80086 | 18827, // VCVTPS2QQZrmkz |
| 80087 | 18830, // VCVTPS2QQZrr |
| 80088 | 18832, // VCVTPS2QQZrrb |
| 80089 | 18835, // VCVTPS2QQZrrbk |
| 80090 | 18840, // VCVTPS2QQZrrbkz |
| 80091 | 18844, // VCVTPS2QQZrrk |
| 80092 | 18848, // VCVTPS2QQZrrkz |
| 80093 | 18851, // VCVTPS2UDQZ128rm |
| 80094 | 18853, // VCVTPS2UDQZ128rmb |
| 80095 | 18855, // VCVTPS2UDQZ128rmbk |
| 80096 | 18859, // VCVTPS2UDQZ128rmbkz |
| 80097 | 18862, // VCVTPS2UDQZ128rmk |
| 80098 | 18866, // VCVTPS2UDQZ128rmkz |
| 80099 | 18869, // VCVTPS2UDQZ128rr |
| 80100 | 18871, // VCVTPS2UDQZ128rrk |
| 80101 | 18875, // VCVTPS2UDQZ128rrkz |
| 80102 | 18878, // VCVTPS2UDQZ256rm |
| 80103 | 18880, // VCVTPS2UDQZ256rmb |
| 80104 | 18882, // VCVTPS2UDQZ256rmbk |
| 80105 | 18886, // VCVTPS2UDQZ256rmbkz |
| 80106 | 18889, // VCVTPS2UDQZ256rmk |
| 80107 | 18893, // VCVTPS2UDQZ256rmkz |
| 80108 | 18896, // VCVTPS2UDQZ256rr |
| 80109 | 18898, // VCVTPS2UDQZ256rrk |
| 80110 | 18902, // VCVTPS2UDQZ256rrkz |
| 80111 | 18905, // VCVTPS2UDQZrm |
| 80112 | 18907, // VCVTPS2UDQZrmb |
| 80113 | 18909, // VCVTPS2UDQZrmbk |
| 80114 | 18913, // VCVTPS2UDQZrmbkz |
| 80115 | 18916, // VCVTPS2UDQZrmk |
| 80116 | 18920, // VCVTPS2UDQZrmkz |
| 80117 | 18923, // VCVTPS2UDQZrr |
| 80118 | 18925, // VCVTPS2UDQZrrb |
| 80119 | 18928, // VCVTPS2UDQZrrbk |
| 80120 | 18933, // VCVTPS2UDQZrrbkz |
| 80121 | 18937, // VCVTPS2UDQZrrk |
| 80122 | 18941, // VCVTPS2UDQZrrkz |
| 80123 | 18944, // VCVTPS2UQQZ128rm |
| 80124 | 18946, // VCVTPS2UQQZ128rmb |
| 80125 | 18948, // VCVTPS2UQQZ128rmbk |
| 80126 | 18952, // VCVTPS2UQQZ128rmbkz |
| 80127 | 18955, // VCVTPS2UQQZ128rmk |
| 80128 | 18959, // VCVTPS2UQQZ128rmkz |
| 80129 | 18962, // VCVTPS2UQQZ128rr |
| 80130 | 18964, // VCVTPS2UQQZ128rrk |
| 80131 | 18968, // VCVTPS2UQQZ128rrkz |
| 80132 | 18971, // VCVTPS2UQQZ256rm |
| 80133 | 18973, // VCVTPS2UQQZ256rmb |
| 80134 | 18975, // VCVTPS2UQQZ256rmbk |
| 80135 | 18979, // VCVTPS2UQQZ256rmbkz |
| 80136 | 18982, // VCVTPS2UQQZ256rmk |
| 80137 | 18986, // VCVTPS2UQQZ256rmkz |
| 80138 | 18989, // VCVTPS2UQQZ256rr |
| 80139 | 18991, // VCVTPS2UQQZ256rrk |
| 80140 | 18995, // VCVTPS2UQQZ256rrkz |
| 80141 | 18998, // VCVTPS2UQQZrm |
| 80142 | 19000, // VCVTPS2UQQZrmb |
| 80143 | 19002, // VCVTPS2UQQZrmbk |
| 80144 | 19006, // VCVTPS2UQQZrmbkz |
| 80145 | 19009, // VCVTPS2UQQZrmk |
| 80146 | 19013, // VCVTPS2UQQZrmkz |
| 80147 | 19016, // VCVTPS2UQQZrr |
| 80148 | 19018, // VCVTPS2UQQZrrb |
| 80149 | 19021, // VCVTPS2UQQZrrbk |
| 80150 | 19026, // VCVTPS2UQQZrrbkz |
| 80151 | 19030, // VCVTPS2UQQZrrk |
| 80152 | 19034, // VCVTPS2UQQZrrkz |
| 80153 | 19037, // VCVTQQ2PDZ128rm |
| 80154 | 19039, // VCVTQQ2PDZ128rmb |
| 80155 | 19041, // VCVTQQ2PDZ128rmbk |
| 80156 | 19045, // VCVTQQ2PDZ128rmbkz |
| 80157 | 19048, // VCVTQQ2PDZ128rmk |
| 80158 | 19052, // VCVTQQ2PDZ128rmkz |
| 80159 | 19055, // VCVTQQ2PDZ128rr |
| 80160 | 19057, // VCVTQQ2PDZ128rrk |
| 80161 | 19061, // VCVTQQ2PDZ128rrkz |
| 80162 | 19064, // VCVTQQ2PDZ256rm |
| 80163 | 19066, // VCVTQQ2PDZ256rmb |
| 80164 | 19068, // VCVTQQ2PDZ256rmbk |
| 80165 | 19072, // VCVTQQ2PDZ256rmbkz |
| 80166 | 19075, // VCVTQQ2PDZ256rmk |
| 80167 | 19079, // VCVTQQ2PDZ256rmkz |
| 80168 | 19082, // VCVTQQ2PDZ256rr |
| 80169 | 19084, // VCVTQQ2PDZ256rrk |
| 80170 | 19088, // VCVTQQ2PDZ256rrkz |
| 80171 | 19091, // VCVTQQ2PDZrm |
| 80172 | 19093, // VCVTQQ2PDZrmb |
| 80173 | 19095, // VCVTQQ2PDZrmbk |
| 80174 | 19099, // VCVTQQ2PDZrmbkz |
| 80175 | 19102, // VCVTQQ2PDZrmk |
| 80176 | 19106, // VCVTQQ2PDZrmkz |
| 80177 | 19109, // VCVTQQ2PDZrr |
| 80178 | 19111, // VCVTQQ2PDZrrb |
| 80179 | 19114, // VCVTQQ2PDZrrbk |
| 80180 | 19119, // VCVTQQ2PDZrrbkz |
| 80181 | 19123, // VCVTQQ2PDZrrk |
| 80182 | 19127, // VCVTQQ2PDZrrkz |
| 80183 | 19130, // VCVTQQ2PHZ128rm |
| 80184 | 19132, // VCVTQQ2PHZ128rmb |
| 80185 | 19134, // VCVTQQ2PHZ128rmbk |
| 80186 | 19138, // VCVTQQ2PHZ128rmbkz |
| 80187 | 19141, // VCVTQQ2PHZ128rmk |
| 80188 | 19145, // VCVTQQ2PHZ128rmkz |
| 80189 | 19148, // VCVTQQ2PHZ128rr |
| 80190 | 19150, // VCVTQQ2PHZ128rrk |
| 80191 | 19154, // VCVTQQ2PHZ128rrkz |
| 80192 | 19157, // VCVTQQ2PHZ256rm |
| 80193 | 19159, // VCVTQQ2PHZ256rmb |
| 80194 | 19161, // VCVTQQ2PHZ256rmbk |
| 80195 | 19165, // VCVTQQ2PHZ256rmbkz |
| 80196 | 19168, // VCVTQQ2PHZ256rmk |
| 80197 | 19172, // VCVTQQ2PHZ256rmkz |
| 80198 | 19175, // VCVTQQ2PHZ256rr |
| 80199 | 19177, // VCVTQQ2PHZ256rrk |
| 80200 | 19181, // VCVTQQ2PHZ256rrkz |
| 80201 | 19184, // VCVTQQ2PHZrm |
| 80202 | 19186, // VCVTQQ2PHZrmb |
| 80203 | 19188, // VCVTQQ2PHZrmbk |
| 80204 | 19192, // VCVTQQ2PHZrmbkz |
| 80205 | 19195, // VCVTQQ2PHZrmk |
| 80206 | 19199, // VCVTQQ2PHZrmkz |
| 80207 | 19202, // VCVTQQ2PHZrr |
| 80208 | 19204, // VCVTQQ2PHZrrb |
| 80209 | 19207, // VCVTQQ2PHZrrbk |
| 80210 | 19212, // VCVTQQ2PHZrrbkz |
| 80211 | 19216, // VCVTQQ2PHZrrk |
| 80212 | 19220, // VCVTQQ2PHZrrkz |
| 80213 | 19223, // VCVTQQ2PSZ128rm |
| 80214 | 19225, // VCVTQQ2PSZ128rmb |
| 80215 | 19227, // VCVTQQ2PSZ128rmbk |
| 80216 | 19231, // VCVTQQ2PSZ128rmbkz |
| 80217 | 19234, // VCVTQQ2PSZ128rmk |
| 80218 | 19238, // VCVTQQ2PSZ128rmkz |
| 80219 | 19241, // VCVTQQ2PSZ128rr |
| 80220 | 19243, // VCVTQQ2PSZ128rrk |
| 80221 | 19247, // VCVTQQ2PSZ128rrkz |
| 80222 | 19250, // VCVTQQ2PSZ256rm |
| 80223 | 19252, // VCVTQQ2PSZ256rmb |
| 80224 | 19254, // VCVTQQ2PSZ256rmbk |
| 80225 | 19258, // VCVTQQ2PSZ256rmbkz |
| 80226 | 19261, // VCVTQQ2PSZ256rmk |
| 80227 | 19265, // VCVTQQ2PSZ256rmkz |
| 80228 | 19268, // VCVTQQ2PSZ256rr |
| 80229 | 19270, // VCVTQQ2PSZ256rrk |
| 80230 | 19274, // VCVTQQ2PSZ256rrkz |
| 80231 | 19277, // VCVTQQ2PSZrm |
| 80232 | 19279, // VCVTQQ2PSZrmb |
| 80233 | 19281, // VCVTQQ2PSZrmbk |
| 80234 | 19285, // VCVTQQ2PSZrmbkz |
| 80235 | 19288, // VCVTQQ2PSZrmk |
| 80236 | 19292, // VCVTQQ2PSZrmkz |
| 80237 | 19295, // VCVTQQ2PSZrr |
| 80238 | 19297, // VCVTQQ2PSZrrb |
| 80239 | 19300, // VCVTQQ2PSZrrbk |
| 80240 | 19305, // VCVTQQ2PSZrrbkz |
| 80241 | 19309, // VCVTQQ2PSZrrk |
| 80242 | 19313, // VCVTQQ2PSZrrkz |
| 80243 | 19316, // VCVTSD2SHZrm |
| 80244 | 19319, // VCVTSD2SHZrm_Int |
| 80245 | 19322, // VCVTSD2SHZrmk_Int |
| 80246 | 19327, // VCVTSD2SHZrmkz_Int |
| 80247 | 19331, // VCVTSD2SHZrr |
| 80248 | 19334, // VCVTSD2SHZrr_Int |
| 80249 | 19337, // VCVTSD2SHZrrb_Int |
| 80250 | 19341, // VCVTSD2SHZrrbk_Int |
| 80251 | 19347, // VCVTSD2SHZrrbkz_Int |
| 80252 | 19352, // VCVTSD2SHZrrk_Int |
| 80253 | 19357, // VCVTSD2SHZrrkz_Int |
| 80254 | 19361, // VCVTSD2SI64Zrm |
| 80255 | 19363, // VCVTSD2SI64Zrm_Int |
| 80256 | 19365, // VCVTSD2SI64Zrr |
| 80257 | 19367, // VCVTSD2SI64Zrr_Int |
| 80258 | 19369, // VCVTSD2SI64Zrrb_Int |
| 80259 | 19372, // VCVTSD2SI64rm |
| 80260 | 19374, // VCVTSD2SI64rm_Int |
| 80261 | 19376, // VCVTSD2SI64rr |
| 80262 | 19378, // VCVTSD2SI64rr_Int |
| 80263 | 19380, // VCVTSD2SIZrm |
| 80264 | 19382, // VCVTSD2SIZrm_Int |
| 80265 | 19384, // VCVTSD2SIZrr |
| 80266 | 19386, // VCVTSD2SIZrr_Int |
| 80267 | 19388, // VCVTSD2SIZrrb_Int |
| 80268 | 19391, // VCVTSD2SIrm |
| 80269 | 19393, // VCVTSD2SIrm_Int |
| 80270 | 19395, // VCVTSD2SIrr |
| 80271 | 19397, // VCVTSD2SIrr_Int |
| 80272 | 19399, // VCVTSD2SSZrm |
| 80273 | 19402, // VCVTSD2SSZrm_Int |
| 80274 | 19405, // VCVTSD2SSZrmk_Int |
| 80275 | 19410, // VCVTSD2SSZrmkz_Int |
| 80276 | 19414, // VCVTSD2SSZrr |
| 80277 | 19417, // VCVTSD2SSZrr_Int |
| 80278 | 19420, // VCVTSD2SSZrrb_Int |
| 80279 | 19424, // VCVTSD2SSZrrbk_Int |
| 80280 | 19430, // VCVTSD2SSZrrbkz_Int |
| 80281 | 19435, // VCVTSD2SSZrrk_Int |
| 80282 | 19440, // VCVTSD2SSZrrkz_Int |
| 80283 | 19444, // VCVTSD2SSrm |
| 80284 | 19447, // VCVTSD2SSrm_Int |
| 80285 | 19450, // VCVTSD2SSrr |
| 80286 | 19453, // VCVTSD2SSrr_Int |
| 80287 | 19456, // VCVTSD2USI64Zrm_Int |
| 80288 | 19458, // VCVTSD2USI64Zrr_Int |
| 80289 | 19460, // VCVTSD2USI64Zrrb_Int |
| 80290 | 19463, // VCVTSD2USIZrm_Int |
| 80291 | 19465, // VCVTSD2USIZrr_Int |
| 80292 | 19467, // VCVTSD2USIZrrb_Int |
| 80293 | 19470, // VCVTSH2SDZrm |
| 80294 | 19473, // VCVTSH2SDZrm_Int |
| 80295 | 19476, // VCVTSH2SDZrmk_Int |
| 80296 | 19481, // VCVTSH2SDZrmkz_Int |
| 80297 | 19485, // VCVTSH2SDZrr |
| 80298 | 19488, // VCVTSH2SDZrr_Int |
| 80299 | 19491, // VCVTSH2SDZrrb_Int |
| 80300 | 19494, // VCVTSH2SDZrrbk_Int |
| 80301 | 19499, // VCVTSH2SDZrrbkz_Int |
| 80302 | 19503, // VCVTSH2SDZrrk_Int |
| 80303 | 19508, // VCVTSH2SDZrrkz_Int |
| 80304 | 19512, // VCVTSH2SI64Zrm_Int |
| 80305 | 19514, // VCVTSH2SI64Zrr_Int |
| 80306 | 19516, // VCVTSH2SI64Zrrb_Int |
| 80307 | 19519, // VCVTSH2SIZrm_Int |
| 80308 | 19521, // VCVTSH2SIZrr_Int |
| 80309 | 19523, // VCVTSH2SIZrrb_Int |
| 80310 | 19526, // VCVTSH2SSZrm |
| 80311 | 19529, // VCVTSH2SSZrm_Int |
| 80312 | 19532, // VCVTSH2SSZrmk_Int |
| 80313 | 19537, // VCVTSH2SSZrmkz_Int |
| 80314 | 19541, // VCVTSH2SSZrr |
| 80315 | 19544, // VCVTSH2SSZrr_Int |
| 80316 | 19547, // VCVTSH2SSZrrb_Int |
| 80317 | 19550, // VCVTSH2SSZrrbk_Int |
| 80318 | 19555, // VCVTSH2SSZrrbkz_Int |
| 80319 | 19559, // VCVTSH2SSZrrk_Int |
| 80320 | 19564, // VCVTSH2SSZrrkz_Int |
| 80321 | 19568, // VCVTSH2USI64Zrm_Int |
| 80322 | 19570, // VCVTSH2USI64Zrr_Int |
| 80323 | 19572, // VCVTSH2USI64Zrrb_Int |
| 80324 | 19575, // VCVTSH2USIZrm_Int |
| 80325 | 19577, // VCVTSH2USIZrr_Int |
| 80326 | 19579, // VCVTSH2USIZrrb_Int |
| 80327 | 19582, // VCVTSI2SDZrm |
| 80328 | 19585, // VCVTSI2SDZrm_Int |
| 80329 | 19588, // VCVTSI2SDZrr |
| 80330 | 19591, // VCVTSI2SDZrr_Int |
| 80331 | 19594, // VCVTSI2SDrm |
| 80332 | 19597, // VCVTSI2SDrm_Int |
| 80333 | 19600, // VCVTSI2SDrr |
| 80334 | 19603, // VCVTSI2SDrr_Int |
| 80335 | 19606, // VCVTSI2SHZrm |
| 80336 | 19609, // VCVTSI2SHZrm_Int |
| 80337 | 19612, // VCVTSI2SHZrr |
| 80338 | 19615, // VCVTSI2SHZrr_Int |
| 80339 | 19618, // VCVTSI2SHZrrb_Int |
| 80340 | 19622, // VCVTSI2SSZrm |
| 80341 | 19625, // VCVTSI2SSZrm_Int |
| 80342 | 19628, // VCVTSI2SSZrr |
| 80343 | 19631, // VCVTSI2SSZrr_Int |
| 80344 | 19634, // VCVTSI2SSZrrb_Int |
| 80345 | 19638, // VCVTSI2SSrm |
| 80346 | 19641, // VCVTSI2SSrm_Int |
| 80347 | 19644, // VCVTSI2SSrr |
| 80348 | 19647, // VCVTSI2SSrr_Int |
| 80349 | 19650, // VCVTSI642SDZrm |
| 80350 | 19653, // VCVTSI642SDZrm_Int |
| 80351 | 19656, // VCVTSI642SDZrr |
| 80352 | 19659, // VCVTSI642SDZrr_Int |
| 80353 | 19662, // VCVTSI642SDZrrb_Int |
| 80354 | 19666, // VCVTSI642SDrm |
| 80355 | 19669, // VCVTSI642SDrm_Int |
| 80356 | 19672, // VCVTSI642SDrr |
| 80357 | 19675, // VCVTSI642SDrr_Int |
| 80358 | 19678, // VCVTSI642SHZrm |
| 80359 | 19681, // VCVTSI642SHZrm_Int |
| 80360 | 19684, // VCVTSI642SHZrr |
| 80361 | 19687, // VCVTSI642SHZrr_Int |
| 80362 | 19690, // VCVTSI642SHZrrb_Int |
| 80363 | 19694, // VCVTSI642SSZrm |
| 80364 | 19697, // VCVTSI642SSZrm_Int |
| 80365 | 19700, // VCVTSI642SSZrr |
| 80366 | 19703, // VCVTSI642SSZrr_Int |
| 80367 | 19706, // VCVTSI642SSZrrb_Int |
| 80368 | 19710, // VCVTSI642SSrm |
| 80369 | 19713, // VCVTSI642SSrm_Int |
| 80370 | 19716, // VCVTSI642SSrr |
| 80371 | 19719, // VCVTSI642SSrr_Int |
| 80372 | 19722, // VCVTSS2SDZrm |
| 80373 | 19725, // VCVTSS2SDZrm_Int |
| 80374 | 19728, // VCVTSS2SDZrmk_Int |
| 80375 | 19733, // VCVTSS2SDZrmkz_Int |
| 80376 | 19737, // VCVTSS2SDZrr |
| 80377 | 19740, // VCVTSS2SDZrr_Int |
| 80378 | 19743, // VCVTSS2SDZrrb_Int |
| 80379 | 19746, // VCVTSS2SDZrrbk_Int |
| 80380 | 19751, // VCVTSS2SDZrrbkz_Int |
| 80381 | 19755, // VCVTSS2SDZrrk_Int |
| 80382 | 19760, // VCVTSS2SDZrrkz_Int |
| 80383 | 19764, // VCVTSS2SDrm |
| 80384 | 19767, // VCVTSS2SDrm_Int |
| 80385 | 19770, // VCVTSS2SDrr |
| 80386 | 19773, // VCVTSS2SDrr_Int |
| 80387 | 19776, // VCVTSS2SHZrm |
| 80388 | 19779, // VCVTSS2SHZrm_Int |
| 80389 | 19782, // VCVTSS2SHZrmk_Int |
| 80390 | 19787, // VCVTSS2SHZrmkz_Int |
| 80391 | 19791, // VCVTSS2SHZrr |
| 80392 | 19794, // VCVTSS2SHZrr_Int |
| 80393 | 19797, // VCVTSS2SHZrrb_Int |
| 80394 | 19801, // VCVTSS2SHZrrbk_Int |
| 80395 | 19807, // VCVTSS2SHZrrbkz_Int |
| 80396 | 19812, // VCVTSS2SHZrrk_Int |
| 80397 | 19817, // VCVTSS2SHZrrkz_Int |
| 80398 | 19821, // VCVTSS2SI64Zrm |
| 80399 | 19823, // VCVTSS2SI64Zrm_Int |
| 80400 | 19825, // VCVTSS2SI64Zrr |
| 80401 | 19827, // VCVTSS2SI64Zrr_Int |
| 80402 | 19829, // VCVTSS2SI64Zrrb_Int |
| 80403 | 19832, // VCVTSS2SI64rm |
| 80404 | 19834, // VCVTSS2SI64rm_Int |
| 80405 | 19836, // VCVTSS2SI64rr |
| 80406 | 19838, // VCVTSS2SI64rr_Int |
| 80407 | 19840, // VCVTSS2SIZrm |
| 80408 | 19842, // VCVTSS2SIZrm_Int |
| 80409 | 19844, // VCVTSS2SIZrr |
| 80410 | 19846, // VCVTSS2SIZrr_Int |
| 80411 | 19848, // VCVTSS2SIZrrb_Int |
| 80412 | 19851, // VCVTSS2SIrm |
| 80413 | 19853, // VCVTSS2SIrm_Int |
| 80414 | 19855, // VCVTSS2SIrr |
| 80415 | 19857, // VCVTSS2SIrr_Int |
| 80416 | 19859, // VCVTSS2USI64Zrm_Int |
| 80417 | 19861, // VCVTSS2USI64Zrr_Int |
| 80418 | 19863, // VCVTSS2USI64Zrrb_Int |
| 80419 | 19866, // VCVTSS2USIZrm_Int |
| 80420 | 19868, // VCVTSS2USIZrr_Int |
| 80421 | 19870, // VCVTSS2USIZrrb_Int |
| 80422 | 19873, // VCVTTBF162IBSZ128rm |
| 80423 | 19875, // VCVTTBF162IBSZ128rmb |
| 80424 | 19877, // VCVTTBF162IBSZ128rmbk |
| 80425 | 19881, // VCVTTBF162IBSZ128rmbkz |
| 80426 | 19884, // VCVTTBF162IBSZ128rmk |
| 80427 | 19888, // VCVTTBF162IBSZ128rmkz |
| 80428 | 19891, // VCVTTBF162IBSZ128rr |
| 80429 | 19893, // VCVTTBF162IBSZ128rrk |
| 80430 | 19897, // VCVTTBF162IBSZ128rrkz |
| 80431 | 19900, // VCVTTBF162IBSZ256rm |
| 80432 | 19902, // VCVTTBF162IBSZ256rmb |
| 80433 | 19904, // VCVTTBF162IBSZ256rmbk |
| 80434 | 19908, // VCVTTBF162IBSZ256rmbkz |
| 80435 | 19911, // VCVTTBF162IBSZ256rmk |
| 80436 | 19915, // VCVTTBF162IBSZ256rmkz |
| 80437 | 19918, // VCVTTBF162IBSZ256rr |
| 80438 | 19920, // VCVTTBF162IBSZ256rrk |
| 80439 | 19924, // VCVTTBF162IBSZ256rrkz |
| 80440 | 19927, // VCVTTBF162IBSZrm |
| 80441 | 19929, // VCVTTBF162IBSZrmb |
| 80442 | 19931, // VCVTTBF162IBSZrmbk |
| 80443 | 19935, // VCVTTBF162IBSZrmbkz |
| 80444 | 19938, // VCVTTBF162IBSZrmk |
| 80445 | 19942, // VCVTTBF162IBSZrmkz |
| 80446 | 19945, // VCVTTBF162IBSZrr |
| 80447 | 19947, // VCVTTBF162IBSZrrk |
| 80448 | 19951, // VCVTTBF162IBSZrrkz |
| 80449 | 19954, // VCVTTBF162IUBSZ128rm |
| 80450 | 19956, // VCVTTBF162IUBSZ128rmb |
| 80451 | 19958, // VCVTTBF162IUBSZ128rmbk |
| 80452 | 19962, // VCVTTBF162IUBSZ128rmbkz |
| 80453 | 19965, // VCVTTBF162IUBSZ128rmk |
| 80454 | 19969, // VCVTTBF162IUBSZ128rmkz |
| 80455 | 19972, // VCVTTBF162IUBSZ128rr |
| 80456 | 19974, // VCVTTBF162IUBSZ128rrk |
| 80457 | 19978, // VCVTTBF162IUBSZ128rrkz |
| 80458 | 19981, // VCVTTBF162IUBSZ256rm |
| 80459 | 19983, // VCVTTBF162IUBSZ256rmb |
| 80460 | 19985, // VCVTTBF162IUBSZ256rmbk |
| 80461 | 19989, // VCVTTBF162IUBSZ256rmbkz |
| 80462 | 19992, // VCVTTBF162IUBSZ256rmk |
| 80463 | 19996, // VCVTTBF162IUBSZ256rmkz |
| 80464 | 19999, // VCVTTBF162IUBSZ256rr |
| 80465 | 20001, // VCVTTBF162IUBSZ256rrk |
| 80466 | 20005, // VCVTTBF162IUBSZ256rrkz |
| 80467 | 20008, // VCVTTBF162IUBSZrm |
| 80468 | 20010, // VCVTTBF162IUBSZrmb |
| 80469 | 20012, // VCVTTBF162IUBSZrmbk |
| 80470 | 20016, // VCVTTBF162IUBSZrmbkz |
| 80471 | 20019, // VCVTTBF162IUBSZrmk |
| 80472 | 20023, // VCVTTBF162IUBSZrmkz |
| 80473 | 20026, // VCVTTBF162IUBSZrr |
| 80474 | 20028, // VCVTTBF162IUBSZrrk |
| 80475 | 20032, // VCVTTBF162IUBSZrrkz |
| 80476 | 20035, // VCVTTPD2DQSZ128rm |
| 80477 | 20037, // VCVTTPD2DQSZ128rmb |
| 80478 | 20039, // VCVTTPD2DQSZ128rmbk |
| 80479 | 20043, // VCVTTPD2DQSZ128rmbkz |
| 80480 | 20046, // VCVTTPD2DQSZ128rmk |
| 80481 | 20050, // VCVTTPD2DQSZ128rmkz |
| 80482 | 20053, // VCVTTPD2DQSZ128rr |
| 80483 | 20055, // VCVTTPD2DQSZ128rrk |
| 80484 | 20059, // VCVTTPD2DQSZ128rrkz |
| 80485 | 20062, // VCVTTPD2DQSZ256rm |
| 80486 | 20064, // VCVTTPD2DQSZ256rmb |
| 80487 | 20066, // VCVTTPD2DQSZ256rmbk |
| 80488 | 20070, // VCVTTPD2DQSZ256rmbkz |
| 80489 | 20073, // VCVTTPD2DQSZ256rmk |
| 80490 | 20077, // VCVTTPD2DQSZ256rmkz |
| 80491 | 20080, // VCVTTPD2DQSZ256rr |
| 80492 | 20082, // VCVTTPD2DQSZ256rrb |
| 80493 | 20084, // VCVTTPD2DQSZ256rrbk |
| 80494 | 20088, // VCVTTPD2DQSZ256rrbkz |
| 80495 | 20091, // VCVTTPD2DQSZ256rrk |
| 80496 | 20095, // VCVTTPD2DQSZ256rrkz |
| 80497 | 20098, // VCVTTPD2DQSZrm |
| 80498 | 20100, // VCVTTPD2DQSZrmb |
| 80499 | 20102, // VCVTTPD2DQSZrmbk |
| 80500 | 20106, // VCVTTPD2DQSZrmbkz |
| 80501 | 20109, // VCVTTPD2DQSZrmk |
| 80502 | 20113, // VCVTTPD2DQSZrmkz |
| 80503 | 20116, // VCVTTPD2DQSZrr |
| 80504 | 20118, // VCVTTPD2DQSZrrb |
| 80505 | 20120, // VCVTTPD2DQSZrrbk |
| 80506 | 20124, // VCVTTPD2DQSZrrbkz |
| 80507 | 20127, // VCVTTPD2DQSZrrk |
| 80508 | 20131, // VCVTTPD2DQSZrrkz |
| 80509 | 20134, // VCVTTPD2DQYrm |
| 80510 | 20136, // VCVTTPD2DQYrr |
| 80511 | 20138, // VCVTTPD2DQZ128rm |
| 80512 | 20140, // VCVTTPD2DQZ128rmb |
| 80513 | 20142, // VCVTTPD2DQZ128rmbk |
| 80514 | 20146, // VCVTTPD2DQZ128rmbkz |
| 80515 | 20149, // VCVTTPD2DQZ128rmk |
| 80516 | 20153, // VCVTTPD2DQZ128rmkz |
| 80517 | 20156, // VCVTTPD2DQZ128rr |
| 80518 | 20158, // VCVTTPD2DQZ128rrk |
| 80519 | 20162, // VCVTTPD2DQZ128rrkz |
| 80520 | 20165, // VCVTTPD2DQZ256rm |
| 80521 | 20167, // VCVTTPD2DQZ256rmb |
| 80522 | 20169, // VCVTTPD2DQZ256rmbk |
| 80523 | 20173, // VCVTTPD2DQZ256rmbkz |
| 80524 | 20176, // VCVTTPD2DQZ256rmk |
| 80525 | 20180, // VCVTTPD2DQZ256rmkz |
| 80526 | 20183, // VCVTTPD2DQZ256rr |
| 80527 | 20185, // VCVTTPD2DQZ256rrk |
| 80528 | 20189, // VCVTTPD2DQZ256rrkz |
| 80529 | 20192, // VCVTTPD2DQZrm |
| 80530 | 20194, // VCVTTPD2DQZrmb |
| 80531 | 20196, // VCVTTPD2DQZrmbk |
| 80532 | 20200, // VCVTTPD2DQZrmbkz |
| 80533 | 20203, // VCVTTPD2DQZrmk |
| 80534 | 20207, // VCVTTPD2DQZrmkz |
| 80535 | 20210, // VCVTTPD2DQZrr |
| 80536 | 20212, // VCVTTPD2DQZrrb |
| 80537 | 20214, // VCVTTPD2DQZrrbk |
| 80538 | 20218, // VCVTTPD2DQZrrbkz |
| 80539 | 20221, // VCVTTPD2DQZrrk |
| 80540 | 20225, // VCVTTPD2DQZrrkz |
| 80541 | 20228, // VCVTTPD2DQrm |
| 80542 | 20230, // VCVTTPD2DQrr |
| 80543 | 20232, // VCVTTPD2QQSZ128rm |
| 80544 | 20234, // VCVTTPD2QQSZ128rmb |
| 80545 | 20236, // VCVTTPD2QQSZ128rmbk |
| 80546 | 20240, // VCVTTPD2QQSZ128rmbkz |
| 80547 | 20243, // VCVTTPD2QQSZ128rmk |
| 80548 | 20247, // VCVTTPD2QQSZ128rmkz |
| 80549 | 20250, // VCVTTPD2QQSZ128rr |
| 80550 | 20252, // VCVTTPD2QQSZ128rrk |
| 80551 | 20256, // VCVTTPD2QQSZ128rrkz |
| 80552 | 20259, // VCVTTPD2QQSZ256rm |
| 80553 | 20261, // VCVTTPD2QQSZ256rmb |
| 80554 | 20263, // VCVTTPD2QQSZ256rmbk |
| 80555 | 20267, // VCVTTPD2QQSZ256rmbkz |
| 80556 | 20270, // VCVTTPD2QQSZ256rmk |
| 80557 | 20274, // VCVTTPD2QQSZ256rmkz |
| 80558 | 20277, // VCVTTPD2QQSZ256rr |
| 80559 | 20279, // VCVTTPD2QQSZ256rrb |
| 80560 | 20281, // VCVTTPD2QQSZ256rrbk |
| 80561 | 20285, // VCVTTPD2QQSZ256rrbkz |
| 80562 | 20288, // VCVTTPD2QQSZ256rrk |
| 80563 | 20292, // VCVTTPD2QQSZ256rrkz |
| 80564 | 20295, // VCVTTPD2QQSZrm |
| 80565 | 20297, // VCVTTPD2QQSZrmb |
| 80566 | 20299, // VCVTTPD2QQSZrmbk |
| 80567 | 20303, // VCVTTPD2QQSZrmbkz |
| 80568 | 20306, // VCVTTPD2QQSZrmk |
| 80569 | 20310, // VCVTTPD2QQSZrmkz |
| 80570 | 20313, // VCVTTPD2QQSZrr |
| 80571 | 20315, // VCVTTPD2QQSZrrb |
| 80572 | 20317, // VCVTTPD2QQSZrrbk |
| 80573 | 20321, // VCVTTPD2QQSZrrbkz |
| 80574 | 20324, // VCVTTPD2QQSZrrk |
| 80575 | 20328, // VCVTTPD2QQSZrrkz |
| 80576 | 20331, // VCVTTPD2QQZ128rm |
| 80577 | 20333, // VCVTTPD2QQZ128rmb |
| 80578 | 20335, // VCVTTPD2QQZ128rmbk |
| 80579 | 20339, // VCVTTPD2QQZ128rmbkz |
| 80580 | 20342, // VCVTTPD2QQZ128rmk |
| 80581 | 20346, // VCVTTPD2QQZ128rmkz |
| 80582 | 20349, // VCVTTPD2QQZ128rr |
| 80583 | 20351, // VCVTTPD2QQZ128rrk |
| 80584 | 20355, // VCVTTPD2QQZ128rrkz |
| 80585 | 20358, // VCVTTPD2QQZ256rm |
| 80586 | 20360, // VCVTTPD2QQZ256rmb |
| 80587 | 20362, // VCVTTPD2QQZ256rmbk |
| 80588 | 20366, // VCVTTPD2QQZ256rmbkz |
| 80589 | 20369, // VCVTTPD2QQZ256rmk |
| 80590 | 20373, // VCVTTPD2QQZ256rmkz |
| 80591 | 20376, // VCVTTPD2QQZ256rr |
| 80592 | 20378, // VCVTTPD2QQZ256rrk |
| 80593 | 20382, // VCVTTPD2QQZ256rrkz |
| 80594 | 20385, // VCVTTPD2QQZrm |
| 80595 | 20387, // VCVTTPD2QQZrmb |
| 80596 | 20389, // VCVTTPD2QQZrmbk |
| 80597 | 20393, // VCVTTPD2QQZrmbkz |
| 80598 | 20396, // VCVTTPD2QQZrmk |
| 80599 | 20400, // VCVTTPD2QQZrmkz |
| 80600 | 20403, // VCVTTPD2QQZrr |
| 80601 | 20405, // VCVTTPD2QQZrrb |
| 80602 | 20407, // VCVTTPD2QQZrrbk |
| 80603 | 20411, // VCVTTPD2QQZrrbkz |
| 80604 | 20414, // VCVTTPD2QQZrrk |
| 80605 | 20418, // VCVTTPD2QQZrrkz |
| 80606 | 20421, // VCVTTPD2UDQSZ128rm |
| 80607 | 20423, // VCVTTPD2UDQSZ128rmb |
| 80608 | 20425, // VCVTTPD2UDQSZ128rmbk |
| 80609 | 20429, // VCVTTPD2UDQSZ128rmbkz |
| 80610 | 20432, // VCVTTPD2UDQSZ128rmk |
| 80611 | 20436, // VCVTTPD2UDQSZ128rmkz |
| 80612 | 20439, // VCVTTPD2UDQSZ128rr |
| 80613 | 20441, // VCVTTPD2UDQSZ128rrk |
| 80614 | 20445, // VCVTTPD2UDQSZ128rrkz |
| 80615 | 20448, // VCVTTPD2UDQSZ256rm |
| 80616 | 20450, // VCVTTPD2UDQSZ256rmb |
| 80617 | 20452, // VCVTTPD2UDQSZ256rmbk |
| 80618 | 20456, // VCVTTPD2UDQSZ256rmbkz |
| 80619 | 20459, // VCVTTPD2UDQSZ256rmk |
| 80620 | 20463, // VCVTTPD2UDQSZ256rmkz |
| 80621 | 20466, // VCVTTPD2UDQSZ256rr |
| 80622 | 20468, // VCVTTPD2UDQSZ256rrb |
| 80623 | 20470, // VCVTTPD2UDQSZ256rrbk |
| 80624 | 20474, // VCVTTPD2UDQSZ256rrbkz |
| 80625 | 20477, // VCVTTPD2UDQSZ256rrk |
| 80626 | 20481, // VCVTTPD2UDQSZ256rrkz |
| 80627 | 20484, // VCVTTPD2UDQSZrm |
| 80628 | 20486, // VCVTTPD2UDQSZrmb |
| 80629 | 20488, // VCVTTPD2UDQSZrmbk |
| 80630 | 20492, // VCVTTPD2UDQSZrmbkz |
| 80631 | 20495, // VCVTTPD2UDQSZrmk |
| 80632 | 20499, // VCVTTPD2UDQSZrmkz |
| 80633 | 20502, // VCVTTPD2UDQSZrr |
| 80634 | 20504, // VCVTTPD2UDQSZrrb |
| 80635 | 20506, // VCVTTPD2UDQSZrrbk |
| 80636 | 20510, // VCVTTPD2UDQSZrrbkz |
| 80637 | 20513, // VCVTTPD2UDQSZrrk |
| 80638 | 20517, // VCVTTPD2UDQSZrrkz |
| 80639 | 20520, // VCVTTPD2UDQZ128rm |
| 80640 | 20522, // VCVTTPD2UDQZ128rmb |
| 80641 | 20524, // VCVTTPD2UDQZ128rmbk |
| 80642 | 20528, // VCVTTPD2UDQZ128rmbkz |
| 80643 | 20531, // VCVTTPD2UDQZ128rmk |
| 80644 | 20535, // VCVTTPD2UDQZ128rmkz |
| 80645 | 20538, // VCVTTPD2UDQZ128rr |
| 80646 | 20540, // VCVTTPD2UDQZ128rrk |
| 80647 | 20544, // VCVTTPD2UDQZ128rrkz |
| 80648 | 20547, // VCVTTPD2UDQZ256rm |
| 80649 | 20549, // VCVTTPD2UDQZ256rmb |
| 80650 | 20551, // VCVTTPD2UDQZ256rmbk |
| 80651 | 20555, // VCVTTPD2UDQZ256rmbkz |
| 80652 | 20558, // VCVTTPD2UDQZ256rmk |
| 80653 | 20562, // VCVTTPD2UDQZ256rmkz |
| 80654 | 20565, // VCVTTPD2UDQZ256rr |
| 80655 | 20567, // VCVTTPD2UDQZ256rrk |
| 80656 | 20571, // VCVTTPD2UDQZ256rrkz |
| 80657 | 20574, // VCVTTPD2UDQZrm |
| 80658 | 20576, // VCVTTPD2UDQZrmb |
| 80659 | 20578, // VCVTTPD2UDQZrmbk |
| 80660 | 20582, // VCVTTPD2UDQZrmbkz |
| 80661 | 20585, // VCVTTPD2UDQZrmk |
| 80662 | 20589, // VCVTTPD2UDQZrmkz |
| 80663 | 20592, // VCVTTPD2UDQZrr |
| 80664 | 20594, // VCVTTPD2UDQZrrb |
| 80665 | 20596, // VCVTTPD2UDQZrrbk |
| 80666 | 20600, // VCVTTPD2UDQZrrbkz |
| 80667 | 20603, // VCVTTPD2UDQZrrk |
| 80668 | 20607, // VCVTTPD2UDQZrrkz |
| 80669 | 20610, // VCVTTPD2UQQSZ128rm |
| 80670 | 20612, // VCVTTPD2UQQSZ128rmb |
| 80671 | 20614, // VCVTTPD2UQQSZ128rmbk |
| 80672 | 20618, // VCVTTPD2UQQSZ128rmbkz |
| 80673 | 20621, // VCVTTPD2UQQSZ128rmk |
| 80674 | 20625, // VCVTTPD2UQQSZ128rmkz |
| 80675 | 20628, // VCVTTPD2UQQSZ128rr |
| 80676 | 20630, // VCVTTPD2UQQSZ128rrk |
| 80677 | 20634, // VCVTTPD2UQQSZ128rrkz |
| 80678 | 20637, // VCVTTPD2UQQSZ256rm |
| 80679 | 20639, // VCVTTPD2UQQSZ256rmb |
| 80680 | 20641, // VCVTTPD2UQQSZ256rmbk |
| 80681 | 20645, // VCVTTPD2UQQSZ256rmbkz |
| 80682 | 20648, // VCVTTPD2UQQSZ256rmk |
| 80683 | 20652, // VCVTTPD2UQQSZ256rmkz |
| 80684 | 20655, // VCVTTPD2UQQSZ256rr |
| 80685 | 20657, // VCVTTPD2UQQSZ256rrb |
| 80686 | 20659, // VCVTTPD2UQQSZ256rrbk |
| 80687 | 20663, // VCVTTPD2UQQSZ256rrbkz |
| 80688 | 20666, // VCVTTPD2UQQSZ256rrk |
| 80689 | 20670, // VCVTTPD2UQQSZ256rrkz |
| 80690 | 20673, // VCVTTPD2UQQSZrm |
| 80691 | 20675, // VCVTTPD2UQQSZrmb |
| 80692 | 20677, // VCVTTPD2UQQSZrmbk |
| 80693 | 20681, // VCVTTPD2UQQSZrmbkz |
| 80694 | 20684, // VCVTTPD2UQQSZrmk |
| 80695 | 20688, // VCVTTPD2UQQSZrmkz |
| 80696 | 20691, // VCVTTPD2UQQSZrr |
| 80697 | 20693, // VCVTTPD2UQQSZrrb |
| 80698 | 20695, // VCVTTPD2UQQSZrrbk |
| 80699 | 20699, // VCVTTPD2UQQSZrrbkz |
| 80700 | 20702, // VCVTTPD2UQQSZrrk |
| 80701 | 20706, // VCVTTPD2UQQSZrrkz |
| 80702 | 20709, // VCVTTPD2UQQZ128rm |
| 80703 | 20711, // VCVTTPD2UQQZ128rmb |
| 80704 | 20713, // VCVTTPD2UQQZ128rmbk |
| 80705 | 20717, // VCVTTPD2UQQZ128rmbkz |
| 80706 | 20720, // VCVTTPD2UQQZ128rmk |
| 80707 | 20724, // VCVTTPD2UQQZ128rmkz |
| 80708 | 20727, // VCVTTPD2UQQZ128rr |
| 80709 | 20729, // VCVTTPD2UQQZ128rrk |
| 80710 | 20733, // VCVTTPD2UQQZ128rrkz |
| 80711 | 20736, // VCVTTPD2UQQZ256rm |
| 80712 | 20738, // VCVTTPD2UQQZ256rmb |
| 80713 | 20740, // VCVTTPD2UQQZ256rmbk |
| 80714 | 20744, // VCVTTPD2UQQZ256rmbkz |
| 80715 | 20747, // VCVTTPD2UQQZ256rmk |
| 80716 | 20751, // VCVTTPD2UQQZ256rmkz |
| 80717 | 20754, // VCVTTPD2UQQZ256rr |
| 80718 | 20756, // VCVTTPD2UQQZ256rrk |
| 80719 | 20760, // VCVTTPD2UQQZ256rrkz |
| 80720 | 20763, // VCVTTPD2UQQZrm |
| 80721 | 20765, // VCVTTPD2UQQZrmb |
| 80722 | 20767, // VCVTTPD2UQQZrmbk |
| 80723 | 20771, // VCVTTPD2UQQZrmbkz |
| 80724 | 20774, // VCVTTPD2UQQZrmk |
| 80725 | 20778, // VCVTTPD2UQQZrmkz |
| 80726 | 20781, // VCVTTPD2UQQZrr |
| 80727 | 20783, // VCVTTPD2UQQZrrb |
| 80728 | 20785, // VCVTTPD2UQQZrrbk |
| 80729 | 20789, // VCVTTPD2UQQZrrbkz |
| 80730 | 20792, // VCVTTPD2UQQZrrk |
| 80731 | 20796, // VCVTTPD2UQQZrrkz |
| 80732 | 20799, // VCVTTPH2DQZ128rm |
| 80733 | 20801, // VCVTTPH2DQZ128rmb |
| 80734 | 20803, // VCVTTPH2DQZ128rmbk |
| 80735 | 20807, // VCVTTPH2DQZ128rmbkz |
| 80736 | 20810, // VCVTTPH2DQZ128rmk |
| 80737 | 20814, // VCVTTPH2DQZ128rmkz |
| 80738 | 20817, // VCVTTPH2DQZ128rr |
| 80739 | 20819, // VCVTTPH2DQZ128rrk |
| 80740 | 20823, // VCVTTPH2DQZ128rrkz |
| 80741 | 20826, // VCVTTPH2DQZ256rm |
| 80742 | 20828, // VCVTTPH2DQZ256rmb |
| 80743 | 20830, // VCVTTPH2DQZ256rmbk |
| 80744 | 20834, // VCVTTPH2DQZ256rmbkz |
| 80745 | 20837, // VCVTTPH2DQZ256rmk |
| 80746 | 20841, // VCVTTPH2DQZ256rmkz |
| 80747 | 20844, // VCVTTPH2DQZ256rr |
| 80748 | 20846, // VCVTTPH2DQZ256rrk |
| 80749 | 20850, // VCVTTPH2DQZ256rrkz |
| 80750 | 20853, // VCVTTPH2DQZrm |
| 80751 | 20855, // VCVTTPH2DQZrmb |
| 80752 | 20857, // VCVTTPH2DQZrmbk |
| 80753 | 20861, // VCVTTPH2DQZrmbkz |
| 80754 | 20864, // VCVTTPH2DQZrmk |
| 80755 | 20868, // VCVTTPH2DQZrmkz |
| 80756 | 20871, // VCVTTPH2DQZrr |
| 80757 | 20873, // VCVTTPH2DQZrrb |
| 80758 | 20875, // VCVTTPH2DQZrrbk |
| 80759 | 20879, // VCVTTPH2DQZrrbkz |
| 80760 | 20882, // VCVTTPH2DQZrrk |
| 80761 | 20886, // VCVTTPH2DQZrrkz |
| 80762 | 20889, // VCVTTPH2IBSZ128rm |
| 80763 | 20891, // VCVTTPH2IBSZ128rmb |
| 80764 | 20893, // VCVTTPH2IBSZ128rmbk |
| 80765 | 20897, // VCVTTPH2IBSZ128rmbkz |
| 80766 | 20900, // VCVTTPH2IBSZ128rmk |
| 80767 | 20904, // VCVTTPH2IBSZ128rmkz |
| 80768 | 20907, // VCVTTPH2IBSZ128rr |
| 80769 | 20909, // VCVTTPH2IBSZ128rrk |
| 80770 | 20913, // VCVTTPH2IBSZ128rrkz |
| 80771 | 20916, // VCVTTPH2IBSZ256rm |
| 80772 | 20918, // VCVTTPH2IBSZ256rmb |
| 80773 | 20920, // VCVTTPH2IBSZ256rmbk |
| 80774 | 20924, // VCVTTPH2IBSZ256rmbkz |
| 80775 | 20927, // VCVTTPH2IBSZ256rmk |
| 80776 | 20931, // VCVTTPH2IBSZ256rmkz |
| 80777 | 20934, // VCVTTPH2IBSZ256rr |
| 80778 | 20936, // VCVTTPH2IBSZ256rrk |
| 80779 | 20940, // VCVTTPH2IBSZ256rrkz |
| 80780 | 20943, // VCVTTPH2IBSZrm |
| 80781 | 20945, // VCVTTPH2IBSZrmb |
| 80782 | 20947, // VCVTTPH2IBSZrmbk |
| 80783 | 20951, // VCVTTPH2IBSZrmbkz |
| 80784 | 20954, // VCVTTPH2IBSZrmk |
| 80785 | 20958, // VCVTTPH2IBSZrmkz |
| 80786 | 20961, // VCVTTPH2IBSZrr |
| 80787 | 20963, // VCVTTPH2IBSZrrb |
| 80788 | 20965, // VCVTTPH2IBSZrrbk |
| 80789 | 20969, // VCVTTPH2IBSZrrbkz |
| 80790 | 20972, // VCVTTPH2IBSZrrk |
| 80791 | 20976, // VCVTTPH2IBSZrrkz |
| 80792 | 20979, // VCVTTPH2IUBSZ128rm |
| 80793 | 20981, // VCVTTPH2IUBSZ128rmb |
| 80794 | 20983, // VCVTTPH2IUBSZ128rmbk |
| 80795 | 20987, // VCVTTPH2IUBSZ128rmbkz |
| 80796 | 20990, // VCVTTPH2IUBSZ128rmk |
| 80797 | 20994, // VCVTTPH2IUBSZ128rmkz |
| 80798 | 20997, // VCVTTPH2IUBSZ128rr |
| 80799 | 20999, // VCVTTPH2IUBSZ128rrk |
| 80800 | 21003, // VCVTTPH2IUBSZ128rrkz |
| 80801 | 21006, // VCVTTPH2IUBSZ256rm |
| 80802 | 21008, // VCVTTPH2IUBSZ256rmb |
| 80803 | 21010, // VCVTTPH2IUBSZ256rmbk |
| 80804 | 21014, // VCVTTPH2IUBSZ256rmbkz |
| 80805 | 21017, // VCVTTPH2IUBSZ256rmk |
| 80806 | 21021, // VCVTTPH2IUBSZ256rmkz |
| 80807 | 21024, // VCVTTPH2IUBSZ256rr |
| 80808 | 21026, // VCVTTPH2IUBSZ256rrk |
| 80809 | 21030, // VCVTTPH2IUBSZ256rrkz |
| 80810 | 21033, // VCVTTPH2IUBSZrm |
| 80811 | 21035, // VCVTTPH2IUBSZrmb |
| 80812 | 21037, // VCVTTPH2IUBSZrmbk |
| 80813 | 21041, // VCVTTPH2IUBSZrmbkz |
| 80814 | 21044, // VCVTTPH2IUBSZrmk |
| 80815 | 21048, // VCVTTPH2IUBSZrmkz |
| 80816 | 21051, // VCVTTPH2IUBSZrr |
| 80817 | 21053, // VCVTTPH2IUBSZrrb |
| 80818 | 21055, // VCVTTPH2IUBSZrrbk |
| 80819 | 21059, // VCVTTPH2IUBSZrrbkz |
| 80820 | 21062, // VCVTTPH2IUBSZrrk |
| 80821 | 21066, // VCVTTPH2IUBSZrrkz |
| 80822 | 21069, // VCVTTPH2QQZ128rm |
| 80823 | 21071, // VCVTTPH2QQZ128rmb |
| 80824 | 21073, // VCVTTPH2QQZ128rmbk |
| 80825 | 21077, // VCVTTPH2QQZ128rmbkz |
| 80826 | 21080, // VCVTTPH2QQZ128rmk |
| 80827 | 21084, // VCVTTPH2QQZ128rmkz |
| 80828 | 21087, // VCVTTPH2QQZ128rr |
| 80829 | 21089, // VCVTTPH2QQZ128rrk |
| 80830 | 21093, // VCVTTPH2QQZ128rrkz |
| 80831 | 21096, // VCVTTPH2QQZ256rm |
| 80832 | 21098, // VCVTTPH2QQZ256rmb |
| 80833 | 21100, // VCVTTPH2QQZ256rmbk |
| 80834 | 21104, // VCVTTPH2QQZ256rmbkz |
| 80835 | 21107, // VCVTTPH2QQZ256rmk |
| 80836 | 21111, // VCVTTPH2QQZ256rmkz |
| 80837 | 21114, // VCVTTPH2QQZ256rr |
| 80838 | 21116, // VCVTTPH2QQZ256rrk |
| 80839 | 21120, // VCVTTPH2QQZ256rrkz |
| 80840 | 21123, // VCVTTPH2QQZrm |
| 80841 | 21125, // VCVTTPH2QQZrmb |
| 80842 | 21127, // VCVTTPH2QQZrmbk |
| 80843 | 21131, // VCVTTPH2QQZrmbkz |
| 80844 | 21134, // VCVTTPH2QQZrmk |
| 80845 | 21138, // VCVTTPH2QQZrmkz |
| 80846 | 21141, // VCVTTPH2QQZrr |
| 80847 | 21143, // VCVTTPH2QQZrrb |
| 80848 | 21145, // VCVTTPH2QQZrrbk |
| 80849 | 21149, // VCVTTPH2QQZrrbkz |
| 80850 | 21152, // VCVTTPH2QQZrrk |
| 80851 | 21156, // VCVTTPH2QQZrrkz |
| 80852 | 21159, // VCVTTPH2UDQZ128rm |
| 80853 | 21161, // VCVTTPH2UDQZ128rmb |
| 80854 | 21163, // VCVTTPH2UDQZ128rmbk |
| 80855 | 21167, // VCVTTPH2UDQZ128rmbkz |
| 80856 | 21170, // VCVTTPH2UDQZ128rmk |
| 80857 | 21174, // VCVTTPH2UDQZ128rmkz |
| 80858 | 21177, // VCVTTPH2UDQZ128rr |
| 80859 | 21179, // VCVTTPH2UDQZ128rrk |
| 80860 | 21183, // VCVTTPH2UDQZ128rrkz |
| 80861 | 21186, // VCVTTPH2UDQZ256rm |
| 80862 | 21188, // VCVTTPH2UDQZ256rmb |
| 80863 | 21190, // VCVTTPH2UDQZ256rmbk |
| 80864 | 21194, // VCVTTPH2UDQZ256rmbkz |
| 80865 | 21197, // VCVTTPH2UDQZ256rmk |
| 80866 | 21201, // VCVTTPH2UDQZ256rmkz |
| 80867 | 21204, // VCVTTPH2UDQZ256rr |
| 80868 | 21206, // VCVTTPH2UDQZ256rrk |
| 80869 | 21210, // VCVTTPH2UDQZ256rrkz |
| 80870 | 21213, // VCVTTPH2UDQZrm |
| 80871 | 21215, // VCVTTPH2UDQZrmb |
| 80872 | 21217, // VCVTTPH2UDQZrmbk |
| 80873 | 21221, // VCVTTPH2UDQZrmbkz |
| 80874 | 21224, // VCVTTPH2UDQZrmk |
| 80875 | 21228, // VCVTTPH2UDQZrmkz |
| 80876 | 21231, // VCVTTPH2UDQZrr |
| 80877 | 21233, // VCVTTPH2UDQZrrb |
| 80878 | 21235, // VCVTTPH2UDQZrrbk |
| 80879 | 21239, // VCVTTPH2UDQZrrbkz |
| 80880 | 21242, // VCVTTPH2UDQZrrk |
| 80881 | 21246, // VCVTTPH2UDQZrrkz |
| 80882 | 21249, // VCVTTPH2UQQZ128rm |
| 80883 | 21251, // VCVTTPH2UQQZ128rmb |
| 80884 | 21253, // VCVTTPH2UQQZ128rmbk |
| 80885 | 21257, // VCVTTPH2UQQZ128rmbkz |
| 80886 | 21260, // VCVTTPH2UQQZ128rmk |
| 80887 | 21264, // VCVTTPH2UQQZ128rmkz |
| 80888 | 21267, // VCVTTPH2UQQZ128rr |
| 80889 | 21269, // VCVTTPH2UQQZ128rrk |
| 80890 | 21273, // VCVTTPH2UQQZ128rrkz |
| 80891 | 21276, // VCVTTPH2UQQZ256rm |
| 80892 | 21278, // VCVTTPH2UQQZ256rmb |
| 80893 | 21280, // VCVTTPH2UQQZ256rmbk |
| 80894 | 21284, // VCVTTPH2UQQZ256rmbkz |
| 80895 | 21287, // VCVTTPH2UQQZ256rmk |
| 80896 | 21291, // VCVTTPH2UQQZ256rmkz |
| 80897 | 21294, // VCVTTPH2UQQZ256rr |
| 80898 | 21296, // VCVTTPH2UQQZ256rrk |
| 80899 | 21300, // VCVTTPH2UQQZ256rrkz |
| 80900 | 21303, // VCVTTPH2UQQZrm |
| 80901 | 21305, // VCVTTPH2UQQZrmb |
| 80902 | 21307, // VCVTTPH2UQQZrmbk |
| 80903 | 21311, // VCVTTPH2UQQZrmbkz |
| 80904 | 21314, // VCVTTPH2UQQZrmk |
| 80905 | 21318, // VCVTTPH2UQQZrmkz |
| 80906 | 21321, // VCVTTPH2UQQZrr |
| 80907 | 21323, // VCVTTPH2UQQZrrb |
| 80908 | 21325, // VCVTTPH2UQQZrrbk |
| 80909 | 21329, // VCVTTPH2UQQZrrbkz |
| 80910 | 21332, // VCVTTPH2UQQZrrk |
| 80911 | 21336, // VCVTTPH2UQQZrrkz |
| 80912 | 21339, // VCVTTPH2UWZ128rm |
| 80913 | 21341, // VCVTTPH2UWZ128rmb |
| 80914 | 21343, // VCVTTPH2UWZ128rmbk |
| 80915 | 21347, // VCVTTPH2UWZ128rmbkz |
| 80916 | 21350, // VCVTTPH2UWZ128rmk |
| 80917 | 21354, // VCVTTPH2UWZ128rmkz |
| 80918 | 21357, // VCVTTPH2UWZ128rr |
| 80919 | 21359, // VCVTTPH2UWZ128rrk |
| 80920 | 21363, // VCVTTPH2UWZ128rrkz |
| 80921 | 21366, // VCVTTPH2UWZ256rm |
| 80922 | 21368, // VCVTTPH2UWZ256rmb |
| 80923 | 21370, // VCVTTPH2UWZ256rmbk |
| 80924 | 21374, // VCVTTPH2UWZ256rmbkz |
| 80925 | 21377, // VCVTTPH2UWZ256rmk |
| 80926 | 21381, // VCVTTPH2UWZ256rmkz |
| 80927 | 21384, // VCVTTPH2UWZ256rr |
| 80928 | 21386, // VCVTTPH2UWZ256rrk |
| 80929 | 21390, // VCVTTPH2UWZ256rrkz |
| 80930 | 21393, // VCVTTPH2UWZrm |
| 80931 | 21395, // VCVTTPH2UWZrmb |
| 80932 | 21397, // VCVTTPH2UWZrmbk |
| 80933 | 21401, // VCVTTPH2UWZrmbkz |
| 80934 | 21404, // VCVTTPH2UWZrmk |
| 80935 | 21408, // VCVTTPH2UWZrmkz |
| 80936 | 21411, // VCVTTPH2UWZrr |
| 80937 | 21413, // VCVTTPH2UWZrrb |
| 80938 | 21415, // VCVTTPH2UWZrrbk |
| 80939 | 21419, // VCVTTPH2UWZrrbkz |
| 80940 | 21422, // VCVTTPH2UWZrrk |
| 80941 | 21426, // VCVTTPH2UWZrrkz |
| 80942 | 21429, // VCVTTPH2WZ128rm |
| 80943 | 21431, // VCVTTPH2WZ128rmb |
| 80944 | 21433, // VCVTTPH2WZ128rmbk |
| 80945 | 21437, // VCVTTPH2WZ128rmbkz |
| 80946 | 21440, // VCVTTPH2WZ128rmk |
| 80947 | 21444, // VCVTTPH2WZ128rmkz |
| 80948 | 21447, // VCVTTPH2WZ128rr |
| 80949 | 21449, // VCVTTPH2WZ128rrk |
| 80950 | 21453, // VCVTTPH2WZ128rrkz |
| 80951 | 21456, // VCVTTPH2WZ256rm |
| 80952 | 21458, // VCVTTPH2WZ256rmb |
| 80953 | 21460, // VCVTTPH2WZ256rmbk |
| 80954 | 21464, // VCVTTPH2WZ256rmbkz |
| 80955 | 21467, // VCVTTPH2WZ256rmk |
| 80956 | 21471, // VCVTTPH2WZ256rmkz |
| 80957 | 21474, // VCVTTPH2WZ256rr |
| 80958 | 21476, // VCVTTPH2WZ256rrk |
| 80959 | 21480, // VCVTTPH2WZ256rrkz |
| 80960 | 21483, // VCVTTPH2WZrm |
| 80961 | 21485, // VCVTTPH2WZrmb |
| 80962 | 21487, // VCVTTPH2WZrmbk |
| 80963 | 21491, // VCVTTPH2WZrmbkz |
| 80964 | 21494, // VCVTTPH2WZrmk |
| 80965 | 21498, // VCVTTPH2WZrmkz |
| 80966 | 21501, // VCVTTPH2WZrr |
| 80967 | 21503, // VCVTTPH2WZrrb |
| 80968 | 21505, // VCVTTPH2WZrrbk |
| 80969 | 21509, // VCVTTPH2WZrrbkz |
| 80970 | 21512, // VCVTTPH2WZrrk |
| 80971 | 21516, // VCVTTPH2WZrrkz |
| 80972 | 21519, // VCVTTPS2DQSZ128rm |
| 80973 | 21521, // VCVTTPS2DQSZ128rmb |
| 80974 | 21523, // VCVTTPS2DQSZ128rmbk |
| 80975 | 21527, // VCVTTPS2DQSZ128rmbkz |
| 80976 | 21530, // VCVTTPS2DQSZ128rmk |
| 80977 | 21534, // VCVTTPS2DQSZ128rmkz |
| 80978 | 21537, // VCVTTPS2DQSZ128rr |
| 80979 | 21539, // VCVTTPS2DQSZ128rrk |
| 80980 | 21543, // VCVTTPS2DQSZ128rrkz |
| 80981 | 21546, // VCVTTPS2DQSZ256rm |
| 80982 | 21548, // VCVTTPS2DQSZ256rmb |
| 80983 | 21550, // VCVTTPS2DQSZ256rmbk |
| 80984 | 21554, // VCVTTPS2DQSZ256rmbkz |
| 80985 | 21557, // VCVTTPS2DQSZ256rmk |
| 80986 | 21561, // VCVTTPS2DQSZ256rmkz |
| 80987 | 21564, // VCVTTPS2DQSZ256rr |
| 80988 | 21566, // VCVTTPS2DQSZ256rrk |
| 80989 | 21570, // VCVTTPS2DQSZ256rrkz |
| 80990 | 21573, // VCVTTPS2DQSZrm |
| 80991 | 21575, // VCVTTPS2DQSZrmb |
| 80992 | 21577, // VCVTTPS2DQSZrmbk |
| 80993 | 21581, // VCVTTPS2DQSZrmbkz |
| 80994 | 21584, // VCVTTPS2DQSZrmk |
| 80995 | 21588, // VCVTTPS2DQSZrmkz |
| 80996 | 21591, // VCVTTPS2DQSZrr |
| 80997 | 21593, // VCVTTPS2DQSZrrb |
| 80998 | 21595, // VCVTTPS2DQSZrrbk |
| 80999 | 21599, // VCVTTPS2DQSZrrbkz |
| 81000 | 21602, // VCVTTPS2DQSZrrk |
| 81001 | 21606, // VCVTTPS2DQSZrrkz |
| 81002 | 21609, // VCVTTPS2DQYrm |
| 81003 | 21611, // VCVTTPS2DQYrr |
| 81004 | 21613, // VCVTTPS2DQZ128rm |
| 81005 | 21615, // VCVTTPS2DQZ128rmb |
| 81006 | 21617, // VCVTTPS2DQZ128rmbk |
| 81007 | 21621, // VCVTTPS2DQZ128rmbkz |
| 81008 | 21624, // VCVTTPS2DQZ128rmk |
| 81009 | 21628, // VCVTTPS2DQZ128rmkz |
| 81010 | 21631, // VCVTTPS2DQZ128rr |
| 81011 | 21633, // VCVTTPS2DQZ128rrk |
| 81012 | 21637, // VCVTTPS2DQZ128rrkz |
| 81013 | 21640, // VCVTTPS2DQZ256rm |
| 81014 | 21642, // VCVTTPS2DQZ256rmb |
| 81015 | 21644, // VCVTTPS2DQZ256rmbk |
| 81016 | 21648, // VCVTTPS2DQZ256rmbkz |
| 81017 | 21651, // VCVTTPS2DQZ256rmk |
| 81018 | 21655, // VCVTTPS2DQZ256rmkz |
| 81019 | 21658, // VCVTTPS2DQZ256rr |
| 81020 | 21660, // VCVTTPS2DQZ256rrk |
| 81021 | 21664, // VCVTTPS2DQZ256rrkz |
| 81022 | 21667, // VCVTTPS2DQZrm |
| 81023 | 21669, // VCVTTPS2DQZrmb |
| 81024 | 21671, // VCVTTPS2DQZrmbk |
| 81025 | 21675, // VCVTTPS2DQZrmbkz |
| 81026 | 21678, // VCVTTPS2DQZrmk |
| 81027 | 21682, // VCVTTPS2DQZrmkz |
| 81028 | 21685, // VCVTTPS2DQZrr |
| 81029 | 21687, // VCVTTPS2DQZrrb |
| 81030 | 21689, // VCVTTPS2DQZrrbk |
| 81031 | 21693, // VCVTTPS2DQZrrbkz |
| 81032 | 21696, // VCVTTPS2DQZrrk |
| 81033 | 21700, // VCVTTPS2DQZrrkz |
| 81034 | 21703, // VCVTTPS2DQrm |
| 81035 | 21705, // VCVTTPS2DQrr |
| 81036 | 21707, // VCVTTPS2IBSZ128rm |
| 81037 | 21709, // VCVTTPS2IBSZ128rmb |
| 81038 | 21711, // VCVTTPS2IBSZ128rmbk |
| 81039 | 21715, // VCVTTPS2IBSZ128rmbkz |
| 81040 | 21718, // VCVTTPS2IBSZ128rmk |
| 81041 | 21722, // VCVTTPS2IBSZ128rmkz |
| 81042 | 21725, // VCVTTPS2IBSZ128rr |
| 81043 | 21727, // VCVTTPS2IBSZ128rrk |
| 81044 | 21731, // VCVTTPS2IBSZ128rrkz |
| 81045 | 21734, // VCVTTPS2IBSZ256rm |
| 81046 | 21736, // VCVTTPS2IBSZ256rmb |
| 81047 | 21738, // VCVTTPS2IBSZ256rmbk |
| 81048 | 21742, // VCVTTPS2IBSZ256rmbkz |
| 81049 | 21745, // VCVTTPS2IBSZ256rmk |
| 81050 | 21749, // VCVTTPS2IBSZ256rmkz |
| 81051 | 21752, // VCVTTPS2IBSZ256rr |
| 81052 | 21754, // VCVTTPS2IBSZ256rrk |
| 81053 | 21758, // VCVTTPS2IBSZ256rrkz |
| 81054 | 21761, // VCVTTPS2IBSZrm |
| 81055 | 21763, // VCVTTPS2IBSZrmb |
| 81056 | 21765, // VCVTTPS2IBSZrmbk |
| 81057 | 21769, // VCVTTPS2IBSZrmbkz |
| 81058 | 21772, // VCVTTPS2IBSZrmk |
| 81059 | 21776, // VCVTTPS2IBSZrmkz |
| 81060 | 21779, // VCVTTPS2IBSZrr |
| 81061 | 21781, // VCVTTPS2IBSZrrb |
| 81062 | 21783, // VCVTTPS2IBSZrrbk |
| 81063 | 21787, // VCVTTPS2IBSZrrbkz |
| 81064 | 21790, // VCVTTPS2IBSZrrk |
| 81065 | 21794, // VCVTTPS2IBSZrrkz |
| 81066 | 21797, // VCVTTPS2IUBSZ128rm |
| 81067 | 21799, // VCVTTPS2IUBSZ128rmb |
| 81068 | 21801, // VCVTTPS2IUBSZ128rmbk |
| 81069 | 21805, // VCVTTPS2IUBSZ128rmbkz |
| 81070 | 21808, // VCVTTPS2IUBSZ128rmk |
| 81071 | 21812, // VCVTTPS2IUBSZ128rmkz |
| 81072 | 21815, // VCVTTPS2IUBSZ128rr |
| 81073 | 21817, // VCVTTPS2IUBSZ128rrk |
| 81074 | 21821, // VCVTTPS2IUBSZ128rrkz |
| 81075 | 21824, // VCVTTPS2IUBSZ256rm |
| 81076 | 21826, // VCVTTPS2IUBSZ256rmb |
| 81077 | 21828, // VCVTTPS2IUBSZ256rmbk |
| 81078 | 21832, // VCVTTPS2IUBSZ256rmbkz |
| 81079 | 21835, // VCVTTPS2IUBSZ256rmk |
| 81080 | 21839, // VCVTTPS2IUBSZ256rmkz |
| 81081 | 21842, // VCVTTPS2IUBSZ256rr |
| 81082 | 21844, // VCVTTPS2IUBSZ256rrk |
| 81083 | 21848, // VCVTTPS2IUBSZ256rrkz |
| 81084 | 21851, // VCVTTPS2IUBSZrm |
| 81085 | 21853, // VCVTTPS2IUBSZrmb |
| 81086 | 21855, // VCVTTPS2IUBSZrmbk |
| 81087 | 21859, // VCVTTPS2IUBSZrmbkz |
| 81088 | 21862, // VCVTTPS2IUBSZrmk |
| 81089 | 21866, // VCVTTPS2IUBSZrmkz |
| 81090 | 21869, // VCVTTPS2IUBSZrr |
| 81091 | 21871, // VCVTTPS2IUBSZrrb |
| 81092 | 21873, // VCVTTPS2IUBSZrrbk |
| 81093 | 21877, // VCVTTPS2IUBSZrrbkz |
| 81094 | 21880, // VCVTTPS2IUBSZrrk |
| 81095 | 21884, // VCVTTPS2IUBSZrrkz |
| 81096 | 21887, // VCVTTPS2QQSZ128rm |
| 81097 | 21889, // VCVTTPS2QQSZ128rmb |
| 81098 | 21891, // VCVTTPS2QQSZ128rmbk |
| 81099 | 21895, // VCVTTPS2QQSZ128rmbkz |
| 81100 | 21898, // VCVTTPS2QQSZ128rmk |
| 81101 | 21902, // VCVTTPS2QQSZ128rmkz |
| 81102 | 21905, // VCVTTPS2QQSZ128rr |
| 81103 | 21907, // VCVTTPS2QQSZ128rrk |
| 81104 | 21911, // VCVTTPS2QQSZ128rrkz |
| 81105 | 21914, // VCVTTPS2QQSZ256rm |
| 81106 | 21916, // VCVTTPS2QQSZ256rmb |
| 81107 | 21918, // VCVTTPS2QQSZ256rmbk |
| 81108 | 21922, // VCVTTPS2QQSZ256rmbkz |
| 81109 | 21925, // VCVTTPS2QQSZ256rmk |
| 81110 | 21929, // VCVTTPS2QQSZ256rmkz |
| 81111 | 21932, // VCVTTPS2QQSZ256rr |
| 81112 | 21934, // VCVTTPS2QQSZ256rrb |
| 81113 | 21936, // VCVTTPS2QQSZ256rrbk |
| 81114 | 21940, // VCVTTPS2QQSZ256rrbkz |
| 81115 | 21943, // VCVTTPS2QQSZ256rrk |
| 81116 | 21947, // VCVTTPS2QQSZ256rrkz |
| 81117 | 21950, // VCVTTPS2QQSZrm |
| 81118 | 21952, // VCVTTPS2QQSZrmb |
| 81119 | 21954, // VCVTTPS2QQSZrmbk |
| 81120 | 21958, // VCVTTPS2QQSZrmbkz |
| 81121 | 21961, // VCVTTPS2QQSZrmk |
| 81122 | 21965, // VCVTTPS2QQSZrmkz |
| 81123 | 21968, // VCVTTPS2QQSZrr |
| 81124 | 21970, // VCVTTPS2QQSZrrb |
| 81125 | 21972, // VCVTTPS2QQSZrrbk |
| 81126 | 21976, // VCVTTPS2QQSZrrbkz |
| 81127 | 21979, // VCVTTPS2QQSZrrk |
| 81128 | 21983, // VCVTTPS2QQSZrrkz |
| 81129 | 21986, // VCVTTPS2QQZ128rm |
| 81130 | 21988, // VCVTTPS2QQZ128rmb |
| 81131 | 21990, // VCVTTPS2QQZ128rmbk |
| 81132 | 21994, // VCVTTPS2QQZ128rmbkz |
| 81133 | 21997, // VCVTTPS2QQZ128rmk |
| 81134 | 22001, // VCVTTPS2QQZ128rmkz |
| 81135 | 22004, // VCVTTPS2QQZ128rr |
| 81136 | 22006, // VCVTTPS2QQZ128rrk |
| 81137 | 22010, // VCVTTPS2QQZ128rrkz |
| 81138 | 22013, // VCVTTPS2QQZ256rm |
| 81139 | 22015, // VCVTTPS2QQZ256rmb |
| 81140 | 22017, // VCVTTPS2QQZ256rmbk |
| 81141 | 22021, // VCVTTPS2QQZ256rmbkz |
| 81142 | 22024, // VCVTTPS2QQZ256rmk |
| 81143 | 22028, // VCVTTPS2QQZ256rmkz |
| 81144 | 22031, // VCVTTPS2QQZ256rr |
| 81145 | 22033, // VCVTTPS2QQZ256rrk |
| 81146 | 22037, // VCVTTPS2QQZ256rrkz |
| 81147 | 22040, // VCVTTPS2QQZrm |
| 81148 | 22042, // VCVTTPS2QQZrmb |
| 81149 | 22044, // VCVTTPS2QQZrmbk |
| 81150 | 22048, // VCVTTPS2QQZrmbkz |
| 81151 | 22051, // VCVTTPS2QQZrmk |
| 81152 | 22055, // VCVTTPS2QQZrmkz |
| 81153 | 22058, // VCVTTPS2QQZrr |
| 81154 | 22060, // VCVTTPS2QQZrrb |
| 81155 | 22062, // VCVTTPS2QQZrrbk |
| 81156 | 22066, // VCVTTPS2QQZrrbkz |
| 81157 | 22069, // VCVTTPS2QQZrrk |
| 81158 | 22073, // VCVTTPS2QQZrrkz |
| 81159 | 22076, // VCVTTPS2UDQSZ128rm |
| 81160 | 22078, // VCVTTPS2UDQSZ128rmb |
| 81161 | 22080, // VCVTTPS2UDQSZ128rmbk |
| 81162 | 22084, // VCVTTPS2UDQSZ128rmbkz |
| 81163 | 22087, // VCVTTPS2UDQSZ128rmk |
| 81164 | 22091, // VCVTTPS2UDQSZ128rmkz |
| 81165 | 22094, // VCVTTPS2UDQSZ128rr |
| 81166 | 22096, // VCVTTPS2UDQSZ128rrk |
| 81167 | 22100, // VCVTTPS2UDQSZ128rrkz |
| 81168 | 22103, // VCVTTPS2UDQSZ256rm |
| 81169 | 22105, // VCVTTPS2UDQSZ256rmb |
| 81170 | 22107, // VCVTTPS2UDQSZ256rmbk |
| 81171 | 22111, // VCVTTPS2UDQSZ256rmbkz |
| 81172 | 22114, // VCVTTPS2UDQSZ256rmk |
| 81173 | 22118, // VCVTTPS2UDQSZ256rmkz |
| 81174 | 22121, // VCVTTPS2UDQSZ256rr |
| 81175 | 22123, // VCVTTPS2UDQSZ256rrk |
| 81176 | 22127, // VCVTTPS2UDQSZ256rrkz |
| 81177 | 22130, // VCVTTPS2UDQSZrm |
| 81178 | 22132, // VCVTTPS2UDQSZrmb |
| 81179 | 22134, // VCVTTPS2UDQSZrmbk |
| 81180 | 22138, // VCVTTPS2UDQSZrmbkz |
| 81181 | 22141, // VCVTTPS2UDQSZrmk |
| 81182 | 22145, // VCVTTPS2UDQSZrmkz |
| 81183 | 22148, // VCVTTPS2UDQSZrr |
| 81184 | 22150, // VCVTTPS2UDQSZrrb |
| 81185 | 22152, // VCVTTPS2UDQSZrrbk |
| 81186 | 22156, // VCVTTPS2UDQSZrrbkz |
| 81187 | 22159, // VCVTTPS2UDQSZrrk |
| 81188 | 22163, // VCVTTPS2UDQSZrrkz |
| 81189 | 22166, // VCVTTPS2UDQZ128rm |
| 81190 | 22168, // VCVTTPS2UDQZ128rmb |
| 81191 | 22170, // VCVTTPS2UDQZ128rmbk |
| 81192 | 22174, // VCVTTPS2UDQZ128rmbkz |
| 81193 | 22177, // VCVTTPS2UDQZ128rmk |
| 81194 | 22181, // VCVTTPS2UDQZ128rmkz |
| 81195 | 22184, // VCVTTPS2UDQZ128rr |
| 81196 | 22186, // VCVTTPS2UDQZ128rrk |
| 81197 | 22190, // VCVTTPS2UDQZ128rrkz |
| 81198 | 22193, // VCVTTPS2UDQZ256rm |
| 81199 | 22195, // VCVTTPS2UDQZ256rmb |
| 81200 | 22197, // VCVTTPS2UDQZ256rmbk |
| 81201 | 22201, // VCVTTPS2UDQZ256rmbkz |
| 81202 | 22204, // VCVTTPS2UDQZ256rmk |
| 81203 | 22208, // VCVTTPS2UDQZ256rmkz |
| 81204 | 22211, // VCVTTPS2UDQZ256rr |
| 81205 | 22213, // VCVTTPS2UDQZ256rrk |
| 81206 | 22217, // VCVTTPS2UDQZ256rrkz |
| 81207 | 22220, // VCVTTPS2UDQZrm |
| 81208 | 22222, // VCVTTPS2UDQZrmb |
| 81209 | 22224, // VCVTTPS2UDQZrmbk |
| 81210 | 22228, // VCVTTPS2UDQZrmbkz |
| 81211 | 22231, // VCVTTPS2UDQZrmk |
| 81212 | 22235, // VCVTTPS2UDQZrmkz |
| 81213 | 22238, // VCVTTPS2UDQZrr |
| 81214 | 22240, // VCVTTPS2UDQZrrb |
| 81215 | 22242, // VCVTTPS2UDQZrrbk |
| 81216 | 22246, // VCVTTPS2UDQZrrbkz |
| 81217 | 22249, // VCVTTPS2UDQZrrk |
| 81218 | 22253, // VCVTTPS2UDQZrrkz |
| 81219 | 22256, // VCVTTPS2UQQSZ128rm |
| 81220 | 22258, // VCVTTPS2UQQSZ128rmb |
| 81221 | 22260, // VCVTTPS2UQQSZ128rmbk |
| 81222 | 22264, // VCVTTPS2UQQSZ128rmbkz |
| 81223 | 22267, // VCVTTPS2UQQSZ128rmk |
| 81224 | 22271, // VCVTTPS2UQQSZ128rmkz |
| 81225 | 22274, // VCVTTPS2UQQSZ128rr |
| 81226 | 22276, // VCVTTPS2UQQSZ128rrk |
| 81227 | 22280, // VCVTTPS2UQQSZ128rrkz |
| 81228 | 22283, // VCVTTPS2UQQSZ256rm |
| 81229 | 22285, // VCVTTPS2UQQSZ256rmb |
| 81230 | 22287, // VCVTTPS2UQQSZ256rmbk |
| 81231 | 22291, // VCVTTPS2UQQSZ256rmbkz |
| 81232 | 22294, // VCVTTPS2UQQSZ256rmk |
| 81233 | 22298, // VCVTTPS2UQQSZ256rmkz |
| 81234 | 22301, // VCVTTPS2UQQSZ256rr |
| 81235 | 22303, // VCVTTPS2UQQSZ256rrb |
| 81236 | 22305, // VCVTTPS2UQQSZ256rrbk |
| 81237 | 22309, // VCVTTPS2UQQSZ256rrbkz |
| 81238 | 22312, // VCVTTPS2UQQSZ256rrk |
| 81239 | 22316, // VCVTTPS2UQQSZ256rrkz |
| 81240 | 22319, // VCVTTPS2UQQSZrm |
| 81241 | 22321, // VCVTTPS2UQQSZrmb |
| 81242 | 22323, // VCVTTPS2UQQSZrmbk |
| 81243 | 22327, // VCVTTPS2UQQSZrmbkz |
| 81244 | 22330, // VCVTTPS2UQQSZrmk |
| 81245 | 22334, // VCVTTPS2UQQSZrmkz |
| 81246 | 22337, // VCVTTPS2UQQSZrr |
| 81247 | 22339, // VCVTTPS2UQQSZrrb |
| 81248 | 22341, // VCVTTPS2UQQSZrrbk |
| 81249 | 22345, // VCVTTPS2UQQSZrrbkz |
| 81250 | 22348, // VCVTTPS2UQQSZrrk |
| 81251 | 22352, // VCVTTPS2UQQSZrrkz |
| 81252 | 22355, // VCVTTPS2UQQZ128rm |
| 81253 | 22357, // VCVTTPS2UQQZ128rmb |
| 81254 | 22359, // VCVTTPS2UQQZ128rmbk |
| 81255 | 22363, // VCVTTPS2UQQZ128rmbkz |
| 81256 | 22366, // VCVTTPS2UQQZ128rmk |
| 81257 | 22370, // VCVTTPS2UQQZ128rmkz |
| 81258 | 22373, // VCVTTPS2UQQZ128rr |
| 81259 | 22375, // VCVTTPS2UQQZ128rrk |
| 81260 | 22379, // VCVTTPS2UQQZ128rrkz |
| 81261 | 22382, // VCVTTPS2UQQZ256rm |
| 81262 | 22384, // VCVTTPS2UQQZ256rmb |
| 81263 | 22386, // VCVTTPS2UQQZ256rmbk |
| 81264 | 22390, // VCVTTPS2UQQZ256rmbkz |
| 81265 | 22393, // VCVTTPS2UQQZ256rmk |
| 81266 | 22397, // VCVTTPS2UQQZ256rmkz |
| 81267 | 22400, // VCVTTPS2UQQZ256rr |
| 81268 | 22402, // VCVTTPS2UQQZ256rrk |
| 81269 | 22406, // VCVTTPS2UQQZ256rrkz |
| 81270 | 22409, // VCVTTPS2UQQZrm |
| 81271 | 22411, // VCVTTPS2UQQZrmb |
| 81272 | 22413, // VCVTTPS2UQQZrmbk |
| 81273 | 22417, // VCVTTPS2UQQZrmbkz |
| 81274 | 22420, // VCVTTPS2UQQZrmk |
| 81275 | 22424, // VCVTTPS2UQQZrmkz |
| 81276 | 22427, // VCVTTPS2UQQZrr |
| 81277 | 22429, // VCVTTPS2UQQZrrb |
| 81278 | 22431, // VCVTTPS2UQQZrrbk |
| 81279 | 22435, // VCVTTPS2UQQZrrbkz |
| 81280 | 22438, // VCVTTPS2UQQZrrk |
| 81281 | 22442, // VCVTTPS2UQQZrrkz |
| 81282 | 22445, // VCVTTSD2SI64Srm |
| 81283 | 22447, // VCVTTSD2SI64Srm_Int |
| 81284 | 22449, // VCVTTSD2SI64Srr |
| 81285 | 22451, // VCVTTSD2SI64Srr_Int |
| 81286 | 22453, // VCVTTSD2SI64Srrb_Int |
| 81287 | 22455, // VCVTTSD2SI64Zrm |
| 81288 | 22457, // VCVTTSD2SI64Zrm_Int |
| 81289 | 22459, // VCVTTSD2SI64Zrr |
| 81290 | 22461, // VCVTTSD2SI64Zrr_Int |
| 81291 | 22463, // VCVTTSD2SI64Zrrb_Int |
| 81292 | 22465, // VCVTTSD2SI64rm |
| 81293 | 22467, // VCVTTSD2SI64rm_Int |
| 81294 | 22469, // VCVTTSD2SI64rr |
| 81295 | 22471, // VCVTTSD2SI64rr_Int |
| 81296 | 22473, // VCVTTSD2SISrm |
| 81297 | 22475, // VCVTTSD2SISrm_Int |
| 81298 | 22477, // VCVTTSD2SISrr |
| 81299 | 22479, // VCVTTSD2SISrr_Int |
| 81300 | 22481, // VCVTTSD2SISrrb_Int |
| 81301 | 22483, // VCVTTSD2SIZrm |
| 81302 | 22485, // VCVTTSD2SIZrm_Int |
| 81303 | 22487, // VCVTTSD2SIZrr |
| 81304 | 22489, // VCVTTSD2SIZrr_Int |
| 81305 | 22491, // VCVTTSD2SIZrrb_Int |
| 81306 | 22493, // VCVTTSD2SIrm |
| 81307 | 22495, // VCVTTSD2SIrm_Int |
| 81308 | 22497, // VCVTTSD2SIrr |
| 81309 | 22499, // VCVTTSD2SIrr_Int |
| 81310 | 22501, // VCVTTSD2USI64Srm |
| 81311 | 22503, // VCVTTSD2USI64Srm_Int |
| 81312 | 22505, // VCVTTSD2USI64Srr |
| 81313 | 22507, // VCVTTSD2USI64Srr_Int |
| 81314 | 22509, // VCVTTSD2USI64Srrb_Int |
| 81315 | 22511, // VCVTTSD2USI64Zrm |
| 81316 | 22513, // VCVTTSD2USI64Zrm_Int |
| 81317 | 22515, // VCVTTSD2USI64Zrr |
| 81318 | 22517, // VCVTTSD2USI64Zrr_Int |
| 81319 | 22519, // VCVTTSD2USI64Zrrb_Int |
| 81320 | 22521, // VCVTTSD2USISrm |
| 81321 | 22523, // VCVTTSD2USISrm_Int |
| 81322 | 22525, // VCVTTSD2USISrr |
| 81323 | 22527, // VCVTTSD2USISrr_Int |
| 81324 | 22529, // VCVTTSD2USISrrb_Int |
| 81325 | 22531, // VCVTTSD2USIZrm |
| 81326 | 22533, // VCVTTSD2USIZrm_Int |
| 81327 | 22535, // VCVTTSD2USIZrr |
| 81328 | 22537, // VCVTTSD2USIZrr_Int |
| 81329 | 22539, // VCVTTSD2USIZrrb_Int |
| 81330 | 22541, // VCVTTSH2SI64Zrm |
| 81331 | 22543, // VCVTTSH2SI64Zrm_Int |
| 81332 | 22545, // VCVTTSH2SI64Zrr |
| 81333 | 22547, // VCVTTSH2SI64Zrr_Int |
| 81334 | 22549, // VCVTTSH2SI64Zrrb_Int |
| 81335 | 22551, // VCVTTSH2SIZrm |
| 81336 | 22553, // VCVTTSH2SIZrm_Int |
| 81337 | 22555, // VCVTTSH2SIZrr |
| 81338 | 22557, // VCVTTSH2SIZrr_Int |
| 81339 | 22559, // VCVTTSH2SIZrrb_Int |
| 81340 | 22561, // VCVTTSH2USI64Zrm |
| 81341 | 22563, // VCVTTSH2USI64Zrm_Int |
| 81342 | 22565, // VCVTTSH2USI64Zrr |
| 81343 | 22567, // VCVTTSH2USI64Zrr_Int |
| 81344 | 22569, // VCVTTSH2USI64Zrrb_Int |
| 81345 | 22571, // VCVTTSH2USIZrm |
| 81346 | 22573, // VCVTTSH2USIZrm_Int |
| 81347 | 22575, // VCVTTSH2USIZrr |
| 81348 | 22577, // VCVTTSH2USIZrr_Int |
| 81349 | 22579, // VCVTTSH2USIZrrb_Int |
| 81350 | 22581, // VCVTTSS2SI64Srm |
| 81351 | 22583, // VCVTTSS2SI64Srm_Int |
| 81352 | 22585, // VCVTTSS2SI64Srr |
| 81353 | 22587, // VCVTTSS2SI64Srr_Int |
| 81354 | 22589, // VCVTTSS2SI64Srrb_Int |
| 81355 | 22591, // VCVTTSS2SI64Zrm |
| 81356 | 22593, // VCVTTSS2SI64Zrm_Int |
| 81357 | 22595, // VCVTTSS2SI64Zrr |
| 81358 | 22597, // VCVTTSS2SI64Zrr_Int |
| 81359 | 22599, // VCVTTSS2SI64Zrrb_Int |
| 81360 | 22601, // VCVTTSS2SI64rm |
| 81361 | 22603, // VCVTTSS2SI64rm_Int |
| 81362 | 22605, // VCVTTSS2SI64rr |
| 81363 | 22607, // VCVTTSS2SI64rr_Int |
| 81364 | 22609, // VCVTTSS2SISrm |
| 81365 | 22611, // VCVTTSS2SISrm_Int |
| 81366 | 22613, // VCVTTSS2SISrr |
| 81367 | 22615, // VCVTTSS2SISrr_Int |
| 81368 | 22617, // VCVTTSS2SISrrb_Int |
| 81369 | 22619, // VCVTTSS2SIZrm |
| 81370 | 22621, // VCVTTSS2SIZrm_Int |
| 81371 | 22623, // VCVTTSS2SIZrr |
| 81372 | 22625, // VCVTTSS2SIZrr_Int |
| 81373 | 22627, // VCVTTSS2SIZrrb_Int |
| 81374 | 22629, // VCVTTSS2SIrm |
| 81375 | 22631, // VCVTTSS2SIrm_Int |
| 81376 | 22633, // VCVTTSS2SIrr |
| 81377 | 22635, // VCVTTSS2SIrr_Int |
| 81378 | 22637, // VCVTTSS2USI64Srm |
| 81379 | 22639, // VCVTTSS2USI64Srm_Int |
| 81380 | 22641, // VCVTTSS2USI64Srr |
| 81381 | 22643, // VCVTTSS2USI64Srr_Int |
| 81382 | 22645, // VCVTTSS2USI64Srrb_Int |
| 81383 | 22647, // VCVTTSS2USI64Zrm |
| 81384 | 22649, // VCVTTSS2USI64Zrm_Int |
| 81385 | 22651, // VCVTTSS2USI64Zrr |
| 81386 | 22653, // VCVTTSS2USI64Zrr_Int |
| 81387 | 22655, // VCVTTSS2USI64Zrrb_Int |
| 81388 | 22657, // VCVTTSS2USISrm |
| 81389 | 22659, // VCVTTSS2USISrm_Int |
| 81390 | 22661, // VCVTTSS2USISrr |
| 81391 | 22663, // VCVTTSS2USISrr_Int |
| 81392 | 22665, // VCVTTSS2USISrrb_Int |
| 81393 | 22667, // VCVTTSS2USIZrm |
| 81394 | 22669, // VCVTTSS2USIZrm_Int |
| 81395 | 22671, // VCVTTSS2USIZrr |
| 81396 | 22673, // VCVTTSS2USIZrr_Int |
| 81397 | 22675, // VCVTTSS2USIZrrb_Int |
| 81398 | 22677, // VCVTUDQ2PDZ128rm |
| 81399 | 22679, // VCVTUDQ2PDZ128rmb |
| 81400 | 22681, // VCVTUDQ2PDZ128rmbk |
| 81401 | 22685, // VCVTUDQ2PDZ128rmbkz |
| 81402 | 22688, // VCVTUDQ2PDZ128rmk |
| 81403 | 22692, // VCVTUDQ2PDZ128rmkz |
| 81404 | 22695, // VCVTUDQ2PDZ128rr |
| 81405 | 22697, // VCVTUDQ2PDZ128rrk |
| 81406 | 22701, // VCVTUDQ2PDZ128rrkz |
| 81407 | 22704, // VCVTUDQ2PDZ256rm |
| 81408 | 22706, // VCVTUDQ2PDZ256rmb |
| 81409 | 22708, // VCVTUDQ2PDZ256rmbk |
| 81410 | 22712, // VCVTUDQ2PDZ256rmbkz |
| 81411 | 22715, // VCVTUDQ2PDZ256rmk |
| 81412 | 22719, // VCVTUDQ2PDZ256rmkz |
| 81413 | 22722, // VCVTUDQ2PDZ256rr |
| 81414 | 22724, // VCVTUDQ2PDZ256rrk |
| 81415 | 22728, // VCVTUDQ2PDZ256rrkz |
| 81416 | 22731, // VCVTUDQ2PDZrm |
| 81417 | 22733, // VCVTUDQ2PDZrmb |
| 81418 | 22735, // VCVTUDQ2PDZrmbk |
| 81419 | 22739, // VCVTUDQ2PDZrmbkz |
| 81420 | 22742, // VCVTUDQ2PDZrmk |
| 81421 | 22746, // VCVTUDQ2PDZrmkz |
| 81422 | 22749, // VCVTUDQ2PDZrr |
| 81423 | 22751, // VCVTUDQ2PDZrrk |
| 81424 | 22755, // VCVTUDQ2PDZrrkz |
| 81425 | 22758, // VCVTUDQ2PHZ128rm |
| 81426 | 22760, // VCVTUDQ2PHZ128rmb |
| 81427 | 22762, // VCVTUDQ2PHZ128rmbk |
| 81428 | 22766, // VCVTUDQ2PHZ128rmbkz |
| 81429 | 22769, // VCVTUDQ2PHZ128rmk |
| 81430 | 22773, // VCVTUDQ2PHZ128rmkz |
| 81431 | 22776, // VCVTUDQ2PHZ128rr |
| 81432 | 22778, // VCVTUDQ2PHZ128rrk |
| 81433 | 22782, // VCVTUDQ2PHZ128rrkz |
| 81434 | 22785, // VCVTUDQ2PHZ256rm |
| 81435 | 22787, // VCVTUDQ2PHZ256rmb |
| 81436 | 22789, // VCVTUDQ2PHZ256rmbk |
| 81437 | 22793, // VCVTUDQ2PHZ256rmbkz |
| 81438 | 22796, // VCVTUDQ2PHZ256rmk |
| 81439 | 22800, // VCVTUDQ2PHZ256rmkz |
| 81440 | 22803, // VCVTUDQ2PHZ256rr |
| 81441 | 22805, // VCVTUDQ2PHZ256rrk |
| 81442 | 22809, // VCVTUDQ2PHZ256rrkz |
| 81443 | 22812, // VCVTUDQ2PHZrm |
| 81444 | 22814, // VCVTUDQ2PHZrmb |
| 81445 | 22816, // VCVTUDQ2PHZrmbk |
| 81446 | 22820, // VCVTUDQ2PHZrmbkz |
| 81447 | 22823, // VCVTUDQ2PHZrmk |
| 81448 | 22827, // VCVTUDQ2PHZrmkz |
| 81449 | 22830, // VCVTUDQ2PHZrr |
| 81450 | 22832, // VCVTUDQ2PHZrrb |
| 81451 | 22835, // VCVTUDQ2PHZrrbk |
| 81452 | 22840, // VCVTUDQ2PHZrrbkz |
| 81453 | 22844, // VCVTUDQ2PHZrrk |
| 81454 | 22848, // VCVTUDQ2PHZrrkz |
| 81455 | 22851, // VCVTUDQ2PSZ128rm |
| 81456 | 22853, // VCVTUDQ2PSZ128rmb |
| 81457 | 22855, // VCVTUDQ2PSZ128rmbk |
| 81458 | 22859, // VCVTUDQ2PSZ128rmbkz |
| 81459 | 22862, // VCVTUDQ2PSZ128rmk |
| 81460 | 22866, // VCVTUDQ2PSZ128rmkz |
| 81461 | 22869, // VCVTUDQ2PSZ128rr |
| 81462 | 22871, // VCVTUDQ2PSZ128rrk |
| 81463 | 22875, // VCVTUDQ2PSZ128rrkz |
| 81464 | 22878, // VCVTUDQ2PSZ256rm |
| 81465 | 22880, // VCVTUDQ2PSZ256rmb |
| 81466 | 22882, // VCVTUDQ2PSZ256rmbk |
| 81467 | 22886, // VCVTUDQ2PSZ256rmbkz |
| 81468 | 22889, // VCVTUDQ2PSZ256rmk |
| 81469 | 22893, // VCVTUDQ2PSZ256rmkz |
| 81470 | 22896, // VCVTUDQ2PSZ256rr |
| 81471 | 22898, // VCVTUDQ2PSZ256rrk |
| 81472 | 22902, // VCVTUDQ2PSZ256rrkz |
| 81473 | 22905, // VCVTUDQ2PSZrm |
| 81474 | 22907, // VCVTUDQ2PSZrmb |
| 81475 | 22909, // VCVTUDQ2PSZrmbk |
| 81476 | 22913, // VCVTUDQ2PSZrmbkz |
| 81477 | 22916, // VCVTUDQ2PSZrmk |
| 81478 | 22920, // VCVTUDQ2PSZrmkz |
| 81479 | 22923, // VCVTUDQ2PSZrr |
| 81480 | 22925, // VCVTUDQ2PSZrrb |
| 81481 | 22928, // VCVTUDQ2PSZrrbk |
| 81482 | 22933, // VCVTUDQ2PSZrrbkz |
| 81483 | 22937, // VCVTUDQ2PSZrrk |
| 81484 | 22941, // VCVTUDQ2PSZrrkz |
| 81485 | 22944, // VCVTUQQ2PDZ128rm |
| 81486 | 22946, // VCVTUQQ2PDZ128rmb |
| 81487 | 22948, // VCVTUQQ2PDZ128rmbk |
| 81488 | 22952, // VCVTUQQ2PDZ128rmbkz |
| 81489 | 22955, // VCVTUQQ2PDZ128rmk |
| 81490 | 22959, // VCVTUQQ2PDZ128rmkz |
| 81491 | 22962, // VCVTUQQ2PDZ128rr |
| 81492 | 22964, // VCVTUQQ2PDZ128rrk |
| 81493 | 22968, // VCVTUQQ2PDZ128rrkz |
| 81494 | 22971, // VCVTUQQ2PDZ256rm |
| 81495 | 22973, // VCVTUQQ2PDZ256rmb |
| 81496 | 22975, // VCVTUQQ2PDZ256rmbk |
| 81497 | 22979, // VCVTUQQ2PDZ256rmbkz |
| 81498 | 22982, // VCVTUQQ2PDZ256rmk |
| 81499 | 22986, // VCVTUQQ2PDZ256rmkz |
| 81500 | 22989, // VCVTUQQ2PDZ256rr |
| 81501 | 22991, // VCVTUQQ2PDZ256rrk |
| 81502 | 22995, // VCVTUQQ2PDZ256rrkz |
| 81503 | 22998, // VCVTUQQ2PDZrm |
| 81504 | 23000, // VCVTUQQ2PDZrmb |
| 81505 | 23002, // VCVTUQQ2PDZrmbk |
| 81506 | 23006, // VCVTUQQ2PDZrmbkz |
| 81507 | 23009, // VCVTUQQ2PDZrmk |
| 81508 | 23013, // VCVTUQQ2PDZrmkz |
| 81509 | 23016, // VCVTUQQ2PDZrr |
| 81510 | 23018, // VCVTUQQ2PDZrrb |
| 81511 | 23021, // VCVTUQQ2PDZrrbk |
| 81512 | 23026, // VCVTUQQ2PDZrrbkz |
| 81513 | 23030, // VCVTUQQ2PDZrrk |
| 81514 | 23034, // VCVTUQQ2PDZrrkz |
| 81515 | 23037, // VCVTUQQ2PHZ128rm |
| 81516 | 23039, // VCVTUQQ2PHZ128rmb |
| 81517 | 23041, // VCVTUQQ2PHZ128rmbk |
| 81518 | 23045, // VCVTUQQ2PHZ128rmbkz |
| 81519 | 23048, // VCVTUQQ2PHZ128rmk |
| 81520 | 23052, // VCVTUQQ2PHZ128rmkz |
| 81521 | 23055, // VCVTUQQ2PHZ128rr |
| 81522 | 23057, // VCVTUQQ2PHZ128rrk |
| 81523 | 23061, // VCVTUQQ2PHZ128rrkz |
| 81524 | 23064, // VCVTUQQ2PHZ256rm |
| 81525 | 23066, // VCVTUQQ2PHZ256rmb |
| 81526 | 23068, // VCVTUQQ2PHZ256rmbk |
| 81527 | 23072, // VCVTUQQ2PHZ256rmbkz |
| 81528 | 23075, // VCVTUQQ2PHZ256rmk |
| 81529 | 23079, // VCVTUQQ2PHZ256rmkz |
| 81530 | 23082, // VCVTUQQ2PHZ256rr |
| 81531 | 23084, // VCVTUQQ2PHZ256rrk |
| 81532 | 23088, // VCVTUQQ2PHZ256rrkz |
| 81533 | 23091, // VCVTUQQ2PHZrm |
| 81534 | 23093, // VCVTUQQ2PHZrmb |
| 81535 | 23095, // VCVTUQQ2PHZrmbk |
| 81536 | 23099, // VCVTUQQ2PHZrmbkz |
| 81537 | 23102, // VCVTUQQ2PHZrmk |
| 81538 | 23106, // VCVTUQQ2PHZrmkz |
| 81539 | 23109, // VCVTUQQ2PHZrr |
| 81540 | 23111, // VCVTUQQ2PHZrrb |
| 81541 | 23114, // VCVTUQQ2PHZrrbk |
| 81542 | 23119, // VCVTUQQ2PHZrrbkz |
| 81543 | 23123, // VCVTUQQ2PHZrrk |
| 81544 | 23127, // VCVTUQQ2PHZrrkz |
| 81545 | 23130, // VCVTUQQ2PSZ128rm |
| 81546 | 23132, // VCVTUQQ2PSZ128rmb |
| 81547 | 23134, // VCVTUQQ2PSZ128rmbk |
| 81548 | 23138, // VCVTUQQ2PSZ128rmbkz |
| 81549 | 23141, // VCVTUQQ2PSZ128rmk |
| 81550 | 23145, // VCVTUQQ2PSZ128rmkz |
| 81551 | 23148, // VCVTUQQ2PSZ128rr |
| 81552 | 23150, // VCVTUQQ2PSZ128rrk |
| 81553 | 23154, // VCVTUQQ2PSZ128rrkz |
| 81554 | 23157, // VCVTUQQ2PSZ256rm |
| 81555 | 23159, // VCVTUQQ2PSZ256rmb |
| 81556 | 23161, // VCVTUQQ2PSZ256rmbk |
| 81557 | 23165, // VCVTUQQ2PSZ256rmbkz |
| 81558 | 23168, // VCVTUQQ2PSZ256rmk |
| 81559 | 23172, // VCVTUQQ2PSZ256rmkz |
| 81560 | 23175, // VCVTUQQ2PSZ256rr |
| 81561 | 23177, // VCVTUQQ2PSZ256rrk |
| 81562 | 23181, // VCVTUQQ2PSZ256rrkz |
| 81563 | 23184, // VCVTUQQ2PSZrm |
| 81564 | 23186, // VCVTUQQ2PSZrmb |
| 81565 | 23188, // VCVTUQQ2PSZrmbk |
| 81566 | 23192, // VCVTUQQ2PSZrmbkz |
| 81567 | 23195, // VCVTUQQ2PSZrmk |
| 81568 | 23199, // VCVTUQQ2PSZrmkz |
| 81569 | 23202, // VCVTUQQ2PSZrr |
| 81570 | 23204, // VCVTUQQ2PSZrrb |
| 81571 | 23207, // VCVTUQQ2PSZrrbk |
| 81572 | 23212, // VCVTUQQ2PSZrrbkz |
| 81573 | 23216, // VCVTUQQ2PSZrrk |
| 81574 | 23220, // VCVTUQQ2PSZrrkz |
| 81575 | 23223, // VCVTUSI2SDZrm |
| 81576 | 23226, // VCVTUSI2SDZrm_Int |
| 81577 | 23229, // VCVTUSI2SDZrr |
| 81578 | 23232, // VCVTUSI2SDZrr_Int |
| 81579 | 23235, // VCVTUSI2SHZrm |
| 81580 | 23238, // VCVTUSI2SHZrm_Int |
| 81581 | 23241, // VCVTUSI2SHZrr |
| 81582 | 23244, // VCVTUSI2SHZrr_Int |
| 81583 | 23247, // VCVTUSI2SHZrrb_Int |
| 81584 | 23251, // VCVTUSI2SSZrm |
| 81585 | 23254, // VCVTUSI2SSZrm_Int |
| 81586 | 23257, // VCVTUSI2SSZrr |
| 81587 | 23260, // VCVTUSI2SSZrr_Int |
| 81588 | 23263, // VCVTUSI2SSZrrb_Int |
| 81589 | 23267, // VCVTUSI642SDZrm |
| 81590 | 23270, // VCVTUSI642SDZrm_Int |
| 81591 | 23273, // VCVTUSI642SDZrr |
| 81592 | 23276, // VCVTUSI642SDZrr_Int |
| 81593 | 23279, // VCVTUSI642SDZrrb_Int |
| 81594 | 23283, // VCVTUSI642SHZrm |
| 81595 | 23286, // VCVTUSI642SHZrm_Int |
| 81596 | 23289, // VCVTUSI642SHZrr |
| 81597 | 23292, // VCVTUSI642SHZrr_Int |
| 81598 | 23295, // VCVTUSI642SHZrrb_Int |
| 81599 | 23299, // VCVTUSI642SSZrm |
| 81600 | 23302, // VCVTUSI642SSZrm_Int |
| 81601 | 23305, // VCVTUSI642SSZrr |
| 81602 | 23308, // VCVTUSI642SSZrr_Int |
| 81603 | 23311, // VCVTUSI642SSZrrb_Int |
| 81604 | 23315, // VCVTUW2PHZ128rm |
| 81605 | 23317, // VCVTUW2PHZ128rmb |
| 81606 | 23319, // VCVTUW2PHZ128rmbk |
| 81607 | 23323, // VCVTUW2PHZ128rmbkz |
| 81608 | 23326, // VCVTUW2PHZ128rmk |
| 81609 | 23330, // VCVTUW2PHZ128rmkz |
| 81610 | 23333, // VCVTUW2PHZ128rr |
| 81611 | 23335, // VCVTUW2PHZ128rrk |
| 81612 | 23339, // VCVTUW2PHZ128rrkz |
| 81613 | 23342, // VCVTUW2PHZ256rm |
| 81614 | 23344, // VCVTUW2PHZ256rmb |
| 81615 | 23346, // VCVTUW2PHZ256rmbk |
| 81616 | 23350, // VCVTUW2PHZ256rmbkz |
| 81617 | 23353, // VCVTUW2PHZ256rmk |
| 81618 | 23357, // VCVTUW2PHZ256rmkz |
| 81619 | 23360, // VCVTUW2PHZ256rr |
| 81620 | 23362, // VCVTUW2PHZ256rrk |
| 81621 | 23366, // VCVTUW2PHZ256rrkz |
| 81622 | 23369, // VCVTUW2PHZrm |
| 81623 | 23371, // VCVTUW2PHZrmb |
| 81624 | 23373, // VCVTUW2PHZrmbk |
| 81625 | 23377, // VCVTUW2PHZrmbkz |
| 81626 | 23380, // VCVTUW2PHZrmk |
| 81627 | 23384, // VCVTUW2PHZrmkz |
| 81628 | 23387, // VCVTUW2PHZrr |
| 81629 | 23389, // VCVTUW2PHZrrb |
| 81630 | 23392, // VCVTUW2PHZrrbk |
| 81631 | 23397, // VCVTUW2PHZrrbkz |
| 81632 | 23401, // VCVTUW2PHZrrk |
| 81633 | 23405, // VCVTUW2PHZrrkz |
| 81634 | 23408, // VCVTW2PHZ128rm |
| 81635 | 23410, // VCVTW2PHZ128rmb |
| 81636 | 23412, // VCVTW2PHZ128rmbk |
| 81637 | 23416, // VCVTW2PHZ128rmbkz |
| 81638 | 23419, // VCVTW2PHZ128rmk |
| 81639 | 23423, // VCVTW2PHZ128rmkz |
| 81640 | 23426, // VCVTW2PHZ128rr |
| 81641 | 23428, // VCVTW2PHZ128rrk |
| 81642 | 23432, // VCVTW2PHZ128rrkz |
| 81643 | 23435, // VCVTW2PHZ256rm |
| 81644 | 23437, // VCVTW2PHZ256rmb |
| 81645 | 23439, // VCVTW2PHZ256rmbk |
| 81646 | 23443, // VCVTW2PHZ256rmbkz |
| 81647 | 23446, // VCVTW2PHZ256rmk |
| 81648 | 23450, // VCVTW2PHZ256rmkz |
| 81649 | 23453, // VCVTW2PHZ256rr |
| 81650 | 23455, // VCVTW2PHZ256rrk |
| 81651 | 23459, // VCVTW2PHZ256rrkz |
| 81652 | 23462, // VCVTW2PHZrm |
| 81653 | 23464, // VCVTW2PHZrmb |
| 81654 | 23466, // VCVTW2PHZrmbk |
| 81655 | 23470, // VCVTW2PHZrmbkz |
| 81656 | 23473, // VCVTW2PHZrmk |
| 81657 | 23477, // VCVTW2PHZrmkz |
| 81658 | 23480, // VCVTW2PHZrr |
| 81659 | 23482, // VCVTW2PHZrrb |
| 81660 | 23485, // VCVTW2PHZrrbk |
| 81661 | 23490, // VCVTW2PHZrrbkz |
| 81662 | 23494, // VCVTW2PHZrrk |
| 81663 | 23498, // VCVTW2PHZrrkz |
| 81664 | 23501, // VDBPSADBWZ128rmi |
| 81665 | 23505, // VDBPSADBWZ128rmik |
| 81666 | 23511, // VDBPSADBWZ128rmikz |
| 81667 | 23516, // VDBPSADBWZ128rri |
| 81668 | 23520, // VDBPSADBWZ128rrik |
| 81669 | 23526, // VDBPSADBWZ128rrikz |
| 81670 | 23531, // VDBPSADBWZ256rmi |
| 81671 | 23535, // VDBPSADBWZ256rmik |
| 81672 | 23541, // VDBPSADBWZ256rmikz |
| 81673 | 23546, // VDBPSADBWZ256rri |
| 81674 | 23550, // VDBPSADBWZ256rrik |
| 81675 | 23556, // VDBPSADBWZ256rrikz |
| 81676 | 23561, // VDBPSADBWZrmi |
| 81677 | 23565, // VDBPSADBWZrmik |
| 81678 | 23571, // VDBPSADBWZrmikz |
| 81679 | 23576, // VDBPSADBWZrri |
| 81680 | 23580, // VDBPSADBWZrrik |
| 81681 | 23586, // VDBPSADBWZrrikz |
| 81682 | 23591, // VDIVBF16Z128rm |
| 81683 | 23594, // VDIVBF16Z128rmb |
| 81684 | 23597, // VDIVBF16Z128rmbk |
| 81685 | 23602, // VDIVBF16Z128rmbkz |
| 81686 | 23606, // VDIVBF16Z128rmk |
| 81687 | 23611, // VDIVBF16Z128rmkz |
| 81688 | 23615, // VDIVBF16Z128rr |
| 81689 | 23618, // VDIVBF16Z128rrk |
| 81690 | 23623, // VDIVBF16Z128rrkz |
| 81691 | 23627, // VDIVBF16Z256rm |
| 81692 | 23630, // VDIVBF16Z256rmb |
| 81693 | 23633, // VDIVBF16Z256rmbk |
| 81694 | 23638, // VDIVBF16Z256rmbkz |
| 81695 | 23642, // VDIVBF16Z256rmk |
| 81696 | 23647, // VDIVBF16Z256rmkz |
| 81697 | 23651, // VDIVBF16Z256rr |
| 81698 | 23654, // VDIVBF16Z256rrk |
| 81699 | 23659, // VDIVBF16Z256rrkz |
| 81700 | 23663, // VDIVBF16Zrm |
| 81701 | 23666, // VDIVBF16Zrmb |
| 81702 | 23669, // VDIVBF16Zrmbk |
| 81703 | 23674, // VDIVBF16Zrmbkz |
| 81704 | 23678, // VDIVBF16Zrmk |
| 81705 | 23683, // VDIVBF16Zrmkz |
| 81706 | 23687, // VDIVBF16Zrr |
| 81707 | 23690, // VDIVBF16Zrrk |
| 81708 | 23695, // VDIVBF16Zrrkz |
| 81709 | 23699, // VDIVPDYrm |
| 81710 | 23702, // VDIVPDYrr |
| 81711 | 23705, // VDIVPDZ128rm |
| 81712 | 23708, // VDIVPDZ128rmb |
| 81713 | 23711, // VDIVPDZ128rmbk |
| 81714 | 23716, // VDIVPDZ128rmbkz |
| 81715 | 23720, // VDIVPDZ128rmk |
| 81716 | 23725, // VDIVPDZ128rmkz |
| 81717 | 23729, // VDIVPDZ128rr |
| 81718 | 23732, // VDIVPDZ128rrk |
| 81719 | 23737, // VDIVPDZ128rrkz |
| 81720 | 23741, // VDIVPDZ256rm |
| 81721 | 23744, // VDIVPDZ256rmb |
| 81722 | 23747, // VDIVPDZ256rmbk |
| 81723 | 23752, // VDIVPDZ256rmbkz |
| 81724 | 23756, // VDIVPDZ256rmk |
| 81725 | 23761, // VDIVPDZ256rmkz |
| 81726 | 23765, // VDIVPDZ256rr |
| 81727 | 23768, // VDIVPDZ256rrk |
| 81728 | 23773, // VDIVPDZ256rrkz |
| 81729 | 23777, // VDIVPDZrm |
| 81730 | 23780, // VDIVPDZrmb |
| 81731 | 23783, // VDIVPDZrmbk |
| 81732 | 23788, // VDIVPDZrmbkz |
| 81733 | 23792, // VDIVPDZrmk |
| 81734 | 23797, // VDIVPDZrmkz |
| 81735 | 23801, // VDIVPDZrr |
| 81736 | 23804, // VDIVPDZrrb |
| 81737 | 23808, // VDIVPDZrrbk |
| 81738 | 23814, // VDIVPDZrrbkz |
| 81739 | 23819, // VDIVPDZrrk |
| 81740 | 23824, // VDIVPDZrrkz |
| 81741 | 23828, // VDIVPDrm |
| 81742 | 23831, // VDIVPDrr |
| 81743 | 23834, // VDIVPHZ128rm |
| 81744 | 23837, // VDIVPHZ128rmb |
| 81745 | 23840, // VDIVPHZ128rmbk |
| 81746 | 23845, // VDIVPHZ128rmbkz |
| 81747 | 23849, // VDIVPHZ128rmk |
| 81748 | 23854, // VDIVPHZ128rmkz |
| 81749 | 23858, // VDIVPHZ128rr |
| 81750 | 23861, // VDIVPHZ128rrk |
| 81751 | 23866, // VDIVPHZ128rrkz |
| 81752 | 23870, // VDIVPHZ256rm |
| 81753 | 23873, // VDIVPHZ256rmb |
| 81754 | 23876, // VDIVPHZ256rmbk |
| 81755 | 23881, // VDIVPHZ256rmbkz |
| 81756 | 23885, // VDIVPHZ256rmk |
| 81757 | 23890, // VDIVPHZ256rmkz |
| 81758 | 23894, // VDIVPHZ256rr |
| 81759 | 23897, // VDIVPHZ256rrk |
| 81760 | 23902, // VDIVPHZ256rrkz |
| 81761 | 23906, // VDIVPHZrm |
| 81762 | 23909, // VDIVPHZrmb |
| 81763 | 23912, // VDIVPHZrmbk |
| 81764 | 23917, // VDIVPHZrmbkz |
| 81765 | 23921, // VDIVPHZrmk |
| 81766 | 23926, // VDIVPHZrmkz |
| 81767 | 23930, // VDIVPHZrr |
| 81768 | 23933, // VDIVPHZrrb |
| 81769 | 23937, // VDIVPHZrrbk |
| 81770 | 23943, // VDIVPHZrrbkz |
| 81771 | 23948, // VDIVPHZrrk |
| 81772 | 23953, // VDIVPHZrrkz |
| 81773 | 23957, // VDIVPSYrm |
| 81774 | 23960, // VDIVPSYrr |
| 81775 | 23963, // VDIVPSZ128rm |
| 81776 | 23966, // VDIVPSZ128rmb |
| 81777 | 23969, // VDIVPSZ128rmbk |
| 81778 | 23974, // VDIVPSZ128rmbkz |
| 81779 | 23978, // VDIVPSZ128rmk |
| 81780 | 23983, // VDIVPSZ128rmkz |
| 81781 | 23987, // VDIVPSZ128rr |
| 81782 | 23990, // VDIVPSZ128rrk |
| 81783 | 23995, // VDIVPSZ128rrkz |
| 81784 | 23999, // VDIVPSZ256rm |
| 81785 | 24002, // VDIVPSZ256rmb |
| 81786 | 24005, // VDIVPSZ256rmbk |
| 81787 | 24010, // VDIVPSZ256rmbkz |
| 81788 | 24014, // VDIVPSZ256rmk |
| 81789 | 24019, // VDIVPSZ256rmkz |
| 81790 | 24023, // VDIVPSZ256rr |
| 81791 | 24026, // VDIVPSZ256rrk |
| 81792 | 24031, // VDIVPSZ256rrkz |
| 81793 | 24035, // VDIVPSZrm |
| 81794 | 24038, // VDIVPSZrmb |
| 81795 | 24041, // VDIVPSZrmbk |
| 81796 | 24046, // VDIVPSZrmbkz |
| 81797 | 24050, // VDIVPSZrmk |
| 81798 | 24055, // VDIVPSZrmkz |
| 81799 | 24059, // VDIVPSZrr |
| 81800 | 24062, // VDIVPSZrrb |
| 81801 | 24066, // VDIVPSZrrbk |
| 81802 | 24072, // VDIVPSZrrbkz |
| 81803 | 24077, // VDIVPSZrrk |
| 81804 | 24082, // VDIVPSZrrkz |
| 81805 | 24086, // VDIVPSrm |
| 81806 | 24089, // VDIVPSrr |
| 81807 | 24092, // VDIVSDZrm |
| 81808 | 24095, // VDIVSDZrm_Int |
| 81809 | 24098, // VDIVSDZrmk_Int |
| 81810 | 24103, // VDIVSDZrmkz_Int |
| 81811 | 24107, // VDIVSDZrr |
| 81812 | 24110, // VDIVSDZrr_Int |
| 81813 | 24113, // VDIVSDZrrb_Int |
| 81814 | 24117, // VDIVSDZrrbk_Int |
| 81815 | 24123, // VDIVSDZrrbkz_Int |
| 81816 | 24128, // VDIVSDZrrk_Int |
| 81817 | 24133, // VDIVSDZrrkz_Int |
| 81818 | 24137, // VDIVSDrm |
| 81819 | 24140, // VDIVSDrm_Int |
| 81820 | 24143, // VDIVSDrr |
| 81821 | 24146, // VDIVSDrr_Int |
| 81822 | 24149, // VDIVSHZrm |
| 81823 | 24152, // VDIVSHZrm_Int |
| 81824 | 24155, // VDIVSHZrmk_Int |
| 81825 | 24160, // VDIVSHZrmkz_Int |
| 81826 | 24164, // VDIVSHZrr |
| 81827 | 24167, // VDIVSHZrr_Int |
| 81828 | 24170, // VDIVSHZrrb_Int |
| 81829 | 24174, // VDIVSHZrrbk_Int |
| 81830 | 24180, // VDIVSHZrrbkz_Int |
| 81831 | 24185, // VDIVSHZrrk_Int |
| 81832 | 24190, // VDIVSHZrrkz_Int |
| 81833 | 24194, // VDIVSSZrm |
| 81834 | 24197, // VDIVSSZrm_Int |
| 81835 | 24200, // VDIVSSZrmk_Int |
| 81836 | 24205, // VDIVSSZrmkz_Int |
| 81837 | 24209, // VDIVSSZrr |
| 81838 | 24212, // VDIVSSZrr_Int |
| 81839 | 24215, // VDIVSSZrrb_Int |
| 81840 | 24219, // VDIVSSZrrbk_Int |
| 81841 | 24225, // VDIVSSZrrbkz_Int |
| 81842 | 24230, // VDIVSSZrrk_Int |
| 81843 | 24235, // VDIVSSZrrkz_Int |
| 81844 | 24239, // VDIVSSrm |
| 81845 | 24242, // VDIVSSrm_Int |
| 81846 | 24245, // VDIVSSrr |
| 81847 | 24248, // VDIVSSrr_Int |
| 81848 | 24251, // VDPBF16PSZ128m |
| 81849 | 24255, // VDPBF16PSZ128mb |
| 81850 | 24259, // VDPBF16PSZ128mbk |
| 81851 | 24264, // VDPBF16PSZ128mbkz |
| 81852 | 24269, // VDPBF16PSZ128mk |
| 81853 | 24274, // VDPBF16PSZ128mkz |
| 81854 | 24279, // VDPBF16PSZ128r |
| 81855 | 24283, // VDPBF16PSZ128rk |
| 81856 | 24288, // VDPBF16PSZ128rkz |
| 81857 | 24293, // VDPBF16PSZ256m |
| 81858 | 24297, // VDPBF16PSZ256mb |
| 81859 | 24301, // VDPBF16PSZ256mbk |
| 81860 | 24306, // VDPBF16PSZ256mbkz |
| 81861 | 24311, // VDPBF16PSZ256mk |
| 81862 | 24316, // VDPBF16PSZ256mkz |
| 81863 | 24321, // VDPBF16PSZ256r |
| 81864 | 24325, // VDPBF16PSZ256rk |
| 81865 | 24330, // VDPBF16PSZ256rkz |
| 81866 | 24335, // VDPBF16PSZm |
| 81867 | 24339, // VDPBF16PSZmb |
| 81868 | 24343, // VDPBF16PSZmbk |
| 81869 | 24348, // VDPBF16PSZmbkz |
| 81870 | 24353, // VDPBF16PSZmk |
| 81871 | 24358, // VDPBF16PSZmkz |
| 81872 | 24363, // VDPBF16PSZr |
| 81873 | 24367, // VDPBF16PSZrk |
| 81874 | 24372, // VDPBF16PSZrkz |
| 81875 | 24377, // VDPPDrmi |
| 81876 | 24381, // VDPPDrri |
| 81877 | 24385, // VDPPHPSZ128m |
| 81878 | 24389, // VDPPHPSZ128mb |
| 81879 | 24393, // VDPPHPSZ128mbk |
| 81880 | 24398, // VDPPHPSZ128mbkz |
| 81881 | 24403, // VDPPHPSZ128mk |
| 81882 | 24408, // VDPPHPSZ128mkz |
| 81883 | 24413, // VDPPHPSZ128r |
| 81884 | 24417, // VDPPHPSZ128rk |
| 81885 | 24422, // VDPPHPSZ128rkz |
| 81886 | 24427, // VDPPHPSZ256m |
| 81887 | 24431, // VDPPHPSZ256mb |
| 81888 | 24435, // VDPPHPSZ256mbk |
| 81889 | 24440, // VDPPHPSZ256mbkz |
| 81890 | 24445, // VDPPHPSZ256mk |
| 81891 | 24450, // VDPPHPSZ256mkz |
| 81892 | 24455, // VDPPHPSZ256r |
| 81893 | 24459, // VDPPHPSZ256rk |
| 81894 | 24464, // VDPPHPSZ256rkz |
| 81895 | 24469, // VDPPHPSZm |
| 81896 | 24473, // VDPPHPSZmb |
| 81897 | 24477, // VDPPHPSZmbk |
| 81898 | 24482, // VDPPHPSZmbkz |
| 81899 | 24487, // VDPPHPSZmk |
| 81900 | 24492, // VDPPHPSZmkz |
| 81901 | 24497, // VDPPHPSZr |
| 81902 | 24501, // VDPPHPSZrk |
| 81903 | 24506, // VDPPHPSZrkz |
| 81904 | 24511, // VDPPSYrmi |
| 81905 | 24515, // VDPPSYrri |
| 81906 | 24519, // VDPPSrmi |
| 81907 | 24523, // VDPPSrri |
| 81908 | 24527, // VERRm |
| 81909 | 24528, // VERRr |
| 81910 | 24529, // VERWm |
| 81911 | 24530, // VERWr |
| 81912 | 24531, // VEXP2PDZm |
| 81913 | 24533, // VEXP2PDZmb |
| 81914 | 24535, // VEXP2PDZmbk |
| 81915 | 24539, // VEXP2PDZmbkz |
| 81916 | 24542, // VEXP2PDZmk |
| 81917 | 24546, // VEXP2PDZmkz |
| 81918 | 24549, // VEXP2PDZr |
| 81919 | 24551, // VEXP2PDZrb |
| 81920 | 24553, // VEXP2PDZrbk |
| 81921 | 24557, // VEXP2PDZrbkz |
| 81922 | 24560, // VEXP2PDZrk |
| 81923 | 24564, // VEXP2PDZrkz |
| 81924 | 24567, // VEXP2PSZm |
| 81925 | 24569, // VEXP2PSZmb |
| 81926 | 24571, // VEXP2PSZmbk |
| 81927 | 24575, // VEXP2PSZmbkz |
| 81928 | 24578, // VEXP2PSZmk |
| 81929 | 24582, // VEXP2PSZmkz |
| 81930 | 24585, // VEXP2PSZr |
| 81931 | 24587, // VEXP2PSZrb |
| 81932 | 24589, // VEXP2PSZrbk |
| 81933 | 24593, // VEXP2PSZrbkz |
| 81934 | 24596, // VEXP2PSZrk |
| 81935 | 24600, // VEXP2PSZrkz |
| 81936 | 24603, // VEXPANDPDZ128rm |
| 81937 | 24605, // VEXPANDPDZ128rmk |
| 81938 | 24609, // VEXPANDPDZ128rmkz |
| 81939 | 24612, // VEXPANDPDZ128rr |
| 81940 | 24614, // VEXPANDPDZ128rrk |
| 81941 | 24618, // VEXPANDPDZ128rrkz |
| 81942 | 24621, // VEXPANDPDZ256rm |
| 81943 | 24623, // VEXPANDPDZ256rmk |
| 81944 | 24627, // VEXPANDPDZ256rmkz |
| 81945 | 24630, // VEXPANDPDZ256rr |
| 81946 | 24632, // VEXPANDPDZ256rrk |
| 81947 | 24636, // VEXPANDPDZ256rrkz |
| 81948 | 24639, // VEXPANDPDZrm |
| 81949 | 24641, // VEXPANDPDZrmk |
| 81950 | 24645, // VEXPANDPDZrmkz |
| 81951 | 24648, // VEXPANDPDZrr |
| 81952 | 24650, // VEXPANDPDZrrk |
| 81953 | 24654, // VEXPANDPDZrrkz |
| 81954 | 24657, // VEXPANDPSZ128rm |
| 81955 | 24659, // VEXPANDPSZ128rmk |
| 81956 | 24663, // VEXPANDPSZ128rmkz |
| 81957 | 24666, // VEXPANDPSZ128rr |
| 81958 | 24668, // VEXPANDPSZ128rrk |
| 81959 | 24672, // VEXPANDPSZ128rrkz |
| 81960 | 24675, // VEXPANDPSZ256rm |
| 81961 | 24677, // VEXPANDPSZ256rmk |
| 81962 | 24681, // VEXPANDPSZ256rmkz |
| 81963 | 24684, // VEXPANDPSZ256rr |
| 81964 | 24686, // VEXPANDPSZ256rrk |
| 81965 | 24690, // VEXPANDPSZ256rrkz |
| 81966 | 24693, // VEXPANDPSZrm |
| 81967 | 24695, // VEXPANDPSZrmk |
| 81968 | 24699, // VEXPANDPSZrmkz |
| 81969 | 24702, // VEXPANDPSZrr |
| 81970 | 24704, // VEXPANDPSZrrk |
| 81971 | 24708, // VEXPANDPSZrrkz |
| 81972 | 24711, // VEXTRACTF128mri |
| 81973 | 24714, // VEXTRACTF128rri |
| 81974 | 24717, // VEXTRACTF32X4Z256mri |
| 81975 | 24720, // VEXTRACTF32X4Z256mrik |
| 81976 | 24724, // VEXTRACTF32X4Z256rri |
| 81977 | 24727, // VEXTRACTF32X4Z256rrik |
| 81978 | 24732, // VEXTRACTF32X4Z256rrikz |
| 81979 | 24736, // VEXTRACTF32X4Zmri |
| 81980 | 24739, // VEXTRACTF32X4Zmrik |
| 81981 | 24743, // VEXTRACTF32X4Zrri |
| 81982 | 24746, // VEXTRACTF32X4Zrrik |
| 81983 | 24751, // VEXTRACTF32X4Zrrikz |
| 81984 | 24755, // VEXTRACTF32X8Zmri |
| 81985 | 24758, // VEXTRACTF32X8Zmrik |
| 81986 | 24762, // VEXTRACTF32X8Zrri |
| 81987 | 24765, // VEXTRACTF32X8Zrrik |
| 81988 | 24770, // VEXTRACTF32X8Zrrikz |
| 81989 | 24774, // VEXTRACTF64X2Z256mri |
| 81990 | 24777, // VEXTRACTF64X2Z256mrik |
| 81991 | 24781, // VEXTRACTF64X2Z256rri |
| 81992 | 24784, // VEXTRACTF64X2Z256rrik |
| 81993 | 24789, // VEXTRACTF64X2Z256rrikz |
| 81994 | 24793, // VEXTRACTF64X2Zmri |
| 81995 | 24796, // VEXTRACTF64X2Zmrik |
| 81996 | 24800, // VEXTRACTF64X2Zrri |
| 81997 | 24803, // VEXTRACTF64X2Zrrik |
| 81998 | 24808, // VEXTRACTF64X2Zrrikz |
| 81999 | 24812, // VEXTRACTF64X4Zmri |
| 82000 | 24815, // VEXTRACTF64X4Zmrik |
| 82001 | 24819, // VEXTRACTF64X4Zrri |
| 82002 | 24822, // VEXTRACTF64X4Zrrik |
| 82003 | 24827, // VEXTRACTF64X4Zrrikz |
| 82004 | 24831, // VEXTRACTI128mri |
| 82005 | 24834, // VEXTRACTI128rri |
| 82006 | 24837, // VEXTRACTI32X4Z256mri |
| 82007 | 24840, // VEXTRACTI32X4Z256mrik |
| 82008 | 24844, // VEXTRACTI32X4Z256rri |
| 82009 | 24847, // VEXTRACTI32X4Z256rrik |
| 82010 | 24852, // VEXTRACTI32X4Z256rrikz |
| 82011 | 24856, // VEXTRACTI32X4Zmri |
| 82012 | 24859, // VEXTRACTI32X4Zmrik |
| 82013 | 24863, // VEXTRACTI32X4Zrri |
| 82014 | 24866, // VEXTRACTI32X4Zrrik |
| 82015 | 24871, // VEXTRACTI32X4Zrrikz |
| 82016 | 24875, // VEXTRACTI32X8Zmri |
| 82017 | 24878, // VEXTRACTI32X8Zmrik |
| 82018 | 24882, // VEXTRACTI32X8Zrri |
| 82019 | 24885, // VEXTRACTI32X8Zrrik |
| 82020 | 24890, // VEXTRACTI32X8Zrrikz |
| 82021 | 24894, // VEXTRACTI64X2Z256mri |
| 82022 | 24897, // VEXTRACTI64X2Z256mrik |
| 82023 | 24901, // VEXTRACTI64X2Z256rri |
| 82024 | 24904, // VEXTRACTI64X2Z256rrik |
| 82025 | 24909, // VEXTRACTI64X2Z256rrikz |
| 82026 | 24913, // VEXTRACTI64X2Zmri |
| 82027 | 24916, // VEXTRACTI64X2Zmrik |
| 82028 | 24920, // VEXTRACTI64X2Zrri |
| 82029 | 24923, // VEXTRACTI64X2Zrrik |
| 82030 | 24928, // VEXTRACTI64X2Zrrikz |
| 82031 | 24932, // VEXTRACTI64X4Zmri |
| 82032 | 24935, // VEXTRACTI64X4Zmrik |
| 82033 | 24939, // VEXTRACTI64X4Zrri |
| 82034 | 24942, // VEXTRACTI64X4Zrrik |
| 82035 | 24947, // VEXTRACTI64X4Zrrikz |
| 82036 | 24951, // VEXTRACTPSZmri |
| 82037 | 24954, // VEXTRACTPSZrri |
| 82038 | 24957, // VEXTRACTPSmri |
| 82039 | 24960, // VEXTRACTPSrri |
| 82040 | 24963, // VFCMADDCPHZ128m |
| 82041 | 24967, // VFCMADDCPHZ128mb |
| 82042 | 24971, // VFCMADDCPHZ128mbk |
| 82043 | 24976, // VFCMADDCPHZ128mbkz |
| 82044 | 24981, // VFCMADDCPHZ128mk |
| 82045 | 24986, // VFCMADDCPHZ128mkz |
| 82046 | 24991, // VFCMADDCPHZ128r |
| 82047 | 24995, // VFCMADDCPHZ128rk |
| 82048 | 25000, // VFCMADDCPHZ128rkz |
| 82049 | 25005, // VFCMADDCPHZ256m |
| 82050 | 25009, // VFCMADDCPHZ256mb |
| 82051 | 25013, // VFCMADDCPHZ256mbk |
| 82052 | 25018, // VFCMADDCPHZ256mbkz |
| 82053 | 25023, // VFCMADDCPHZ256mk |
| 82054 | 25028, // VFCMADDCPHZ256mkz |
| 82055 | 25033, // VFCMADDCPHZ256r |
| 82056 | 25037, // VFCMADDCPHZ256rk |
| 82057 | 25042, // VFCMADDCPHZ256rkz |
| 82058 | 25047, // VFCMADDCPHZm |
| 82059 | 25051, // VFCMADDCPHZmb |
| 82060 | 25055, // VFCMADDCPHZmbk |
| 82061 | 25060, // VFCMADDCPHZmbkz |
| 82062 | 25065, // VFCMADDCPHZmk |
| 82063 | 25070, // VFCMADDCPHZmkz |
| 82064 | 25075, // VFCMADDCPHZr |
| 82065 | 25079, // VFCMADDCPHZrb |
| 82066 | 25084, // VFCMADDCPHZrbk |
| 82067 | 25090, // VFCMADDCPHZrbkz |
| 82068 | 25096, // VFCMADDCPHZrk |
| 82069 | 25101, // VFCMADDCPHZrkz |
| 82070 | 25106, // VFCMADDCSHZm |
| 82071 | 25110, // VFCMADDCSHZmk |
| 82072 | 25115, // VFCMADDCSHZmkz |
| 82073 | 25120, // VFCMADDCSHZr |
| 82074 | 25124, // VFCMADDCSHZrb |
| 82075 | 25129, // VFCMADDCSHZrbk |
| 82076 | 25135, // VFCMADDCSHZrbkz |
| 82077 | 25141, // VFCMADDCSHZrk |
| 82078 | 25146, // VFCMADDCSHZrkz |
| 82079 | 25151, // VFCMULCPHZ128rm |
| 82080 | 25154, // VFCMULCPHZ128rmb |
| 82081 | 25157, // VFCMULCPHZ128rmbk |
| 82082 | 25162, // VFCMULCPHZ128rmbkz |
| 82083 | 25166, // VFCMULCPHZ128rmk |
| 82084 | 25171, // VFCMULCPHZ128rmkz |
| 82085 | 25175, // VFCMULCPHZ128rr |
| 82086 | 25178, // VFCMULCPHZ128rrk |
| 82087 | 25183, // VFCMULCPHZ128rrkz |
| 82088 | 25187, // VFCMULCPHZ256rm |
| 82089 | 25190, // VFCMULCPHZ256rmb |
| 82090 | 25193, // VFCMULCPHZ256rmbk |
| 82091 | 25198, // VFCMULCPHZ256rmbkz |
| 82092 | 25202, // VFCMULCPHZ256rmk |
| 82093 | 25207, // VFCMULCPHZ256rmkz |
| 82094 | 25211, // VFCMULCPHZ256rr |
| 82095 | 25214, // VFCMULCPHZ256rrk |
| 82096 | 25219, // VFCMULCPHZ256rrkz |
| 82097 | 25223, // VFCMULCPHZrm |
| 82098 | 25226, // VFCMULCPHZrmb |
| 82099 | 25229, // VFCMULCPHZrmbk |
| 82100 | 25234, // VFCMULCPHZrmbkz |
| 82101 | 25238, // VFCMULCPHZrmk |
| 82102 | 25243, // VFCMULCPHZrmkz |
| 82103 | 25247, // VFCMULCPHZrr |
| 82104 | 25250, // VFCMULCPHZrrb |
| 82105 | 25254, // VFCMULCPHZrrbk |
| 82106 | 25260, // VFCMULCPHZrrbkz |
| 82107 | 25265, // VFCMULCPHZrrk |
| 82108 | 25270, // VFCMULCPHZrrkz |
| 82109 | 25274, // VFCMULCSHZrm |
| 82110 | 25277, // VFCMULCSHZrmk |
| 82111 | 25282, // VFCMULCSHZrmkz |
| 82112 | 25286, // VFCMULCSHZrr |
| 82113 | 25289, // VFCMULCSHZrrb |
| 82114 | 25293, // VFCMULCSHZrrbk |
| 82115 | 25299, // VFCMULCSHZrrbkz |
| 82116 | 25304, // VFCMULCSHZrrk |
| 82117 | 25309, // VFCMULCSHZrrkz |
| 82118 | 25313, // VFIXUPIMMPDZ128rmbi |
| 82119 | 25318, // VFIXUPIMMPDZ128rmbik |
| 82120 | 25324, // VFIXUPIMMPDZ128rmbikz |
| 82121 | 25330, // VFIXUPIMMPDZ128rmi |
| 82122 | 25335, // VFIXUPIMMPDZ128rmik |
| 82123 | 25341, // VFIXUPIMMPDZ128rmikz |
| 82124 | 25347, // VFIXUPIMMPDZ128rri |
| 82125 | 25352, // VFIXUPIMMPDZ128rrik |
| 82126 | 25358, // VFIXUPIMMPDZ128rrikz |
| 82127 | 25364, // VFIXUPIMMPDZ256rmbi |
| 82128 | 25369, // VFIXUPIMMPDZ256rmbik |
| 82129 | 25375, // VFIXUPIMMPDZ256rmbikz |
| 82130 | 25381, // VFIXUPIMMPDZ256rmi |
| 82131 | 25386, // VFIXUPIMMPDZ256rmik |
| 82132 | 25392, // VFIXUPIMMPDZ256rmikz |
| 82133 | 25398, // VFIXUPIMMPDZ256rri |
| 82134 | 25403, // VFIXUPIMMPDZ256rrik |
| 82135 | 25409, // VFIXUPIMMPDZ256rrikz |
| 82136 | 25415, // VFIXUPIMMPDZrmbi |
| 82137 | 25420, // VFIXUPIMMPDZrmbik |
| 82138 | 25426, // VFIXUPIMMPDZrmbikz |
| 82139 | 25432, // VFIXUPIMMPDZrmi |
| 82140 | 25437, // VFIXUPIMMPDZrmik |
| 82141 | 25443, // VFIXUPIMMPDZrmikz |
| 82142 | 25449, // VFIXUPIMMPDZrri |
| 82143 | 25454, // VFIXUPIMMPDZrrib |
| 82144 | 25459, // VFIXUPIMMPDZrribk |
| 82145 | 25465, // VFIXUPIMMPDZrribkz |
| 82146 | 25471, // VFIXUPIMMPDZrrik |
| 82147 | 25477, // VFIXUPIMMPDZrrikz |
| 82148 | 25483, // VFIXUPIMMPSZ128rmbi |
| 82149 | 25488, // VFIXUPIMMPSZ128rmbik |
| 82150 | 25494, // VFIXUPIMMPSZ128rmbikz |
| 82151 | 25500, // VFIXUPIMMPSZ128rmi |
| 82152 | 25505, // VFIXUPIMMPSZ128rmik |
| 82153 | 25511, // VFIXUPIMMPSZ128rmikz |
| 82154 | 25517, // VFIXUPIMMPSZ128rri |
| 82155 | 25522, // VFIXUPIMMPSZ128rrik |
| 82156 | 25528, // VFIXUPIMMPSZ128rrikz |
| 82157 | 25534, // VFIXUPIMMPSZ256rmbi |
| 82158 | 25539, // VFIXUPIMMPSZ256rmbik |
| 82159 | 25545, // VFIXUPIMMPSZ256rmbikz |
| 82160 | 25551, // VFIXUPIMMPSZ256rmi |
| 82161 | 25556, // VFIXUPIMMPSZ256rmik |
| 82162 | 25562, // VFIXUPIMMPSZ256rmikz |
| 82163 | 25568, // VFIXUPIMMPSZ256rri |
| 82164 | 25573, // VFIXUPIMMPSZ256rrik |
| 82165 | 25579, // VFIXUPIMMPSZ256rrikz |
| 82166 | 25585, // VFIXUPIMMPSZrmbi |
| 82167 | 25590, // VFIXUPIMMPSZrmbik |
| 82168 | 25596, // VFIXUPIMMPSZrmbikz |
| 82169 | 25602, // VFIXUPIMMPSZrmi |
| 82170 | 25607, // VFIXUPIMMPSZrmik |
| 82171 | 25613, // VFIXUPIMMPSZrmikz |
| 82172 | 25619, // VFIXUPIMMPSZrri |
| 82173 | 25624, // VFIXUPIMMPSZrrib |
| 82174 | 25629, // VFIXUPIMMPSZrribk |
| 82175 | 25635, // VFIXUPIMMPSZrribkz |
| 82176 | 25641, // VFIXUPIMMPSZrrik |
| 82177 | 25647, // VFIXUPIMMPSZrrikz |
| 82178 | 25653, // VFIXUPIMMSDZrmi |
| 82179 | 25658, // VFIXUPIMMSDZrmik |
| 82180 | 25664, // VFIXUPIMMSDZrmikz |
| 82181 | 25670, // VFIXUPIMMSDZrri |
| 82182 | 25675, // VFIXUPIMMSDZrrib |
| 82183 | 25680, // VFIXUPIMMSDZrribk |
| 82184 | 25686, // VFIXUPIMMSDZrribkz |
| 82185 | 25692, // VFIXUPIMMSDZrrik |
| 82186 | 25698, // VFIXUPIMMSDZrrikz |
| 82187 | 25704, // VFIXUPIMMSSZrmi |
| 82188 | 25709, // VFIXUPIMMSSZrmik |
| 82189 | 25715, // VFIXUPIMMSSZrmikz |
| 82190 | 25721, // VFIXUPIMMSSZrri |
| 82191 | 25726, // VFIXUPIMMSSZrrib |
| 82192 | 25731, // VFIXUPIMMSSZrribk |
| 82193 | 25737, // VFIXUPIMMSSZrribkz |
| 82194 | 25743, // VFIXUPIMMSSZrrik |
| 82195 | 25749, // VFIXUPIMMSSZrrikz |
| 82196 | 25755, // VFMADD132BF16Z128m |
| 82197 | 25759, // VFMADD132BF16Z128mb |
| 82198 | 25763, // VFMADD132BF16Z128mbk |
| 82199 | 25768, // VFMADD132BF16Z128mbkz |
| 82200 | 25773, // VFMADD132BF16Z128mk |
| 82201 | 25778, // VFMADD132BF16Z128mkz |
| 82202 | 25783, // VFMADD132BF16Z128r |
| 82203 | 25787, // VFMADD132BF16Z128rk |
| 82204 | 25792, // VFMADD132BF16Z128rkz |
| 82205 | 25797, // VFMADD132BF16Z256m |
| 82206 | 25801, // VFMADD132BF16Z256mb |
| 82207 | 25805, // VFMADD132BF16Z256mbk |
| 82208 | 25810, // VFMADD132BF16Z256mbkz |
| 82209 | 25815, // VFMADD132BF16Z256mk |
| 82210 | 25820, // VFMADD132BF16Z256mkz |
| 82211 | 25825, // VFMADD132BF16Z256r |
| 82212 | 25829, // VFMADD132BF16Z256rk |
| 82213 | 25834, // VFMADD132BF16Z256rkz |
| 82214 | 25839, // VFMADD132BF16Zm |
| 82215 | 25843, // VFMADD132BF16Zmb |
| 82216 | 25847, // VFMADD132BF16Zmbk |
| 82217 | 25852, // VFMADD132BF16Zmbkz |
| 82218 | 25857, // VFMADD132BF16Zmk |
| 82219 | 25862, // VFMADD132BF16Zmkz |
| 82220 | 25867, // VFMADD132BF16Zr |
| 82221 | 25871, // VFMADD132BF16Zrk |
| 82222 | 25876, // VFMADD132BF16Zrkz |
| 82223 | 25881, // VFMADD132PDYm |
| 82224 | 25885, // VFMADD132PDYr |
| 82225 | 25889, // VFMADD132PDZ128m |
| 82226 | 25893, // VFMADD132PDZ128mb |
| 82227 | 25897, // VFMADD132PDZ128mbk |
| 82228 | 25902, // VFMADD132PDZ128mbkz |
| 82229 | 25907, // VFMADD132PDZ128mk |
| 82230 | 25912, // VFMADD132PDZ128mkz |
| 82231 | 25917, // VFMADD132PDZ128r |
| 82232 | 25921, // VFMADD132PDZ128rk |
| 82233 | 25926, // VFMADD132PDZ128rkz |
| 82234 | 25931, // VFMADD132PDZ256m |
| 82235 | 25935, // VFMADD132PDZ256mb |
| 82236 | 25939, // VFMADD132PDZ256mbk |
| 82237 | 25944, // VFMADD132PDZ256mbkz |
| 82238 | 25949, // VFMADD132PDZ256mk |
| 82239 | 25954, // VFMADD132PDZ256mkz |
| 82240 | 25959, // VFMADD132PDZ256r |
| 82241 | 25963, // VFMADD132PDZ256rk |
| 82242 | 25968, // VFMADD132PDZ256rkz |
| 82243 | 25973, // VFMADD132PDZm |
| 82244 | 25977, // VFMADD132PDZmb |
| 82245 | 25981, // VFMADD132PDZmbk |
| 82246 | 25986, // VFMADD132PDZmbkz |
| 82247 | 25991, // VFMADD132PDZmk |
| 82248 | 25996, // VFMADD132PDZmkz |
| 82249 | 26001, // VFMADD132PDZr |
| 82250 | 26005, // VFMADD132PDZrb |
| 82251 | 26010, // VFMADD132PDZrbk |
| 82252 | 26016, // VFMADD132PDZrbkz |
| 82253 | 26022, // VFMADD132PDZrk |
| 82254 | 26027, // VFMADD132PDZrkz |
| 82255 | 26032, // VFMADD132PDm |
| 82256 | 26036, // VFMADD132PDr |
| 82257 | 26040, // VFMADD132PHZ128m |
| 82258 | 26044, // VFMADD132PHZ128mb |
| 82259 | 26048, // VFMADD132PHZ128mbk |
| 82260 | 26053, // VFMADD132PHZ128mbkz |
| 82261 | 26058, // VFMADD132PHZ128mk |
| 82262 | 26063, // VFMADD132PHZ128mkz |
| 82263 | 26068, // VFMADD132PHZ128r |
| 82264 | 26072, // VFMADD132PHZ128rk |
| 82265 | 26077, // VFMADD132PHZ128rkz |
| 82266 | 26082, // VFMADD132PHZ256m |
| 82267 | 26086, // VFMADD132PHZ256mb |
| 82268 | 26090, // VFMADD132PHZ256mbk |
| 82269 | 26095, // VFMADD132PHZ256mbkz |
| 82270 | 26100, // VFMADD132PHZ256mk |
| 82271 | 26105, // VFMADD132PHZ256mkz |
| 82272 | 26110, // VFMADD132PHZ256r |
| 82273 | 26114, // VFMADD132PHZ256rk |
| 82274 | 26119, // VFMADD132PHZ256rkz |
| 82275 | 26124, // VFMADD132PHZm |
| 82276 | 26128, // VFMADD132PHZmb |
| 82277 | 26132, // VFMADD132PHZmbk |
| 82278 | 26137, // VFMADD132PHZmbkz |
| 82279 | 26142, // VFMADD132PHZmk |
| 82280 | 26147, // VFMADD132PHZmkz |
| 82281 | 26152, // VFMADD132PHZr |
| 82282 | 26156, // VFMADD132PHZrb |
| 82283 | 26161, // VFMADD132PHZrbk |
| 82284 | 26167, // VFMADD132PHZrbkz |
| 82285 | 26173, // VFMADD132PHZrk |
| 82286 | 26178, // VFMADD132PHZrkz |
| 82287 | 26183, // VFMADD132PSYm |
| 82288 | 26187, // VFMADD132PSYr |
| 82289 | 26191, // VFMADD132PSZ128m |
| 82290 | 26195, // VFMADD132PSZ128mb |
| 82291 | 26199, // VFMADD132PSZ128mbk |
| 82292 | 26204, // VFMADD132PSZ128mbkz |
| 82293 | 26209, // VFMADD132PSZ128mk |
| 82294 | 26214, // VFMADD132PSZ128mkz |
| 82295 | 26219, // VFMADD132PSZ128r |
| 82296 | 26223, // VFMADD132PSZ128rk |
| 82297 | 26228, // VFMADD132PSZ128rkz |
| 82298 | 26233, // VFMADD132PSZ256m |
| 82299 | 26237, // VFMADD132PSZ256mb |
| 82300 | 26241, // VFMADD132PSZ256mbk |
| 82301 | 26246, // VFMADD132PSZ256mbkz |
| 82302 | 26251, // VFMADD132PSZ256mk |
| 82303 | 26256, // VFMADD132PSZ256mkz |
| 82304 | 26261, // VFMADD132PSZ256r |
| 82305 | 26265, // VFMADD132PSZ256rk |
| 82306 | 26270, // VFMADD132PSZ256rkz |
| 82307 | 26275, // VFMADD132PSZm |
| 82308 | 26279, // VFMADD132PSZmb |
| 82309 | 26283, // VFMADD132PSZmbk |
| 82310 | 26288, // VFMADD132PSZmbkz |
| 82311 | 26293, // VFMADD132PSZmk |
| 82312 | 26298, // VFMADD132PSZmkz |
| 82313 | 26303, // VFMADD132PSZr |
| 82314 | 26307, // VFMADD132PSZrb |
| 82315 | 26312, // VFMADD132PSZrbk |
| 82316 | 26318, // VFMADD132PSZrbkz |
| 82317 | 26324, // VFMADD132PSZrk |
| 82318 | 26329, // VFMADD132PSZrkz |
| 82319 | 26334, // VFMADD132PSm |
| 82320 | 26338, // VFMADD132PSr |
| 82321 | 26342, // VFMADD132SDZm |
| 82322 | 26346, // VFMADD132SDZm_Int |
| 82323 | 26350, // VFMADD132SDZmk_Int |
| 82324 | 26355, // VFMADD132SDZmkz_Int |
| 82325 | 26360, // VFMADD132SDZr |
| 82326 | 26364, // VFMADD132SDZr_Int |
| 82327 | 26368, // VFMADD132SDZrb |
| 82328 | 26373, // VFMADD132SDZrb_Int |
| 82329 | 26378, // VFMADD132SDZrbk_Int |
| 82330 | 26384, // VFMADD132SDZrbkz_Int |
| 82331 | 26390, // VFMADD132SDZrk_Int |
| 82332 | 26395, // VFMADD132SDZrkz_Int |
| 82333 | 26400, // VFMADD132SDm |
| 82334 | 26404, // VFMADD132SDm_Int |
| 82335 | 26408, // VFMADD132SDr |
| 82336 | 26412, // VFMADD132SDr_Int |
| 82337 | 26416, // VFMADD132SHZm |
| 82338 | 26420, // VFMADD132SHZm_Int |
| 82339 | 26424, // VFMADD132SHZmk_Int |
| 82340 | 26429, // VFMADD132SHZmkz_Int |
| 82341 | 26434, // VFMADD132SHZr |
| 82342 | 26438, // VFMADD132SHZr_Int |
| 82343 | 26442, // VFMADD132SHZrb |
| 82344 | 26447, // VFMADD132SHZrb_Int |
| 82345 | 26452, // VFMADD132SHZrbk_Int |
| 82346 | 26458, // VFMADD132SHZrbkz_Int |
| 82347 | 26464, // VFMADD132SHZrk_Int |
| 82348 | 26469, // VFMADD132SHZrkz_Int |
| 82349 | 26474, // VFMADD132SSZm |
| 82350 | 26478, // VFMADD132SSZm_Int |
| 82351 | 26482, // VFMADD132SSZmk_Int |
| 82352 | 26487, // VFMADD132SSZmkz_Int |
| 82353 | 26492, // VFMADD132SSZr |
| 82354 | 26496, // VFMADD132SSZr_Int |
| 82355 | 26500, // VFMADD132SSZrb |
| 82356 | 26505, // VFMADD132SSZrb_Int |
| 82357 | 26510, // VFMADD132SSZrbk_Int |
| 82358 | 26516, // VFMADD132SSZrbkz_Int |
| 82359 | 26522, // VFMADD132SSZrk_Int |
| 82360 | 26527, // VFMADD132SSZrkz_Int |
| 82361 | 26532, // VFMADD132SSm |
| 82362 | 26536, // VFMADD132SSm_Int |
| 82363 | 26540, // VFMADD132SSr |
| 82364 | 26544, // VFMADD132SSr_Int |
| 82365 | 26548, // VFMADD213BF16Z128m |
| 82366 | 26552, // VFMADD213BF16Z128mb |
| 82367 | 26556, // VFMADD213BF16Z128mbk |
| 82368 | 26561, // VFMADD213BF16Z128mbkz |
| 82369 | 26566, // VFMADD213BF16Z128mk |
| 82370 | 26571, // VFMADD213BF16Z128mkz |
| 82371 | 26576, // VFMADD213BF16Z128r |
| 82372 | 26580, // VFMADD213BF16Z128rk |
| 82373 | 26585, // VFMADD213BF16Z128rkz |
| 82374 | 26590, // VFMADD213BF16Z256m |
| 82375 | 26594, // VFMADD213BF16Z256mb |
| 82376 | 26598, // VFMADD213BF16Z256mbk |
| 82377 | 26603, // VFMADD213BF16Z256mbkz |
| 82378 | 26608, // VFMADD213BF16Z256mk |
| 82379 | 26613, // VFMADD213BF16Z256mkz |
| 82380 | 26618, // VFMADD213BF16Z256r |
| 82381 | 26622, // VFMADD213BF16Z256rk |
| 82382 | 26627, // VFMADD213BF16Z256rkz |
| 82383 | 26632, // VFMADD213BF16Zm |
| 82384 | 26636, // VFMADD213BF16Zmb |
| 82385 | 26640, // VFMADD213BF16Zmbk |
| 82386 | 26645, // VFMADD213BF16Zmbkz |
| 82387 | 26650, // VFMADD213BF16Zmk |
| 82388 | 26655, // VFMADD213BF16Zmkz |
| 82389 | 26660, // VFMADD213BF16Zr |
| 82390 | 26664, // VFMADD213BF16Zrk |
| 82391 | 26669, // VFMADD213BF16Zrkz |
| 82392 | 26674, // VFMADD213PDYm |
| 82393 | 26678, // VFMADD213PDYr |
| 82394 | 26682, // VFMADD213PDZ128m |
| 82395 | 26686, // VFMADD213PDZ128mb |
| 82396 | 26690, // VFMADD213PDZ128mbk |
| 82397 | 26695, // VFMADD213PDZ128mbkz |
| 82398 | 26700, // VFMADD213PDZ128mk |
| 82399 | 26705, // VFMADD213PDZ128mkz |
| 82400 | 26710, // VFMADD213PDZ128r |
| 82401 | 26714, // VFMADD213PDZ128rk |
| 82402 | 26719, // VFMADD213PDZ128rkz |
| 82403 | 26724, // VFMADD213PDZ256m |
| 82404 | 26728, // VFMADD213PDZ256mb |
| 82405 | 26732, // VFMADD213PDZ256mbk |
| 82406 | 26737, // VFMADD213PDZ256mbkz |
| 82407 | 26742, // VFMADD213PDZ256mk |
| 82408 | 26747, // VFMADD213PDZ256mkz |
| 82409 | 26752, // VFMADD213PDZ256r |
| 82410 | 26756, // VFMADD213PDZ256rk |
| 82411 | 26761, // VFMADD213PDZ256rkz |
| 82412 | 26766, // VFMADD213PDZm |
| 82413 | 26770, // VFMADD213PDZmb |
| 82414 | 26774, // VFMADD213PDZmbk |
| 82415 | 26779, // VFMADD213PDZmbkz |
| 82416 | 26784, // VFMADD213PDZmk |
| 82417 | 26789, // VFMADD213PDZmkz |
| 82418 | 26794, // VFMADD213PDZr |
| 82419 | 26798, // VFMADD213PDZrb |
| 82420 | 26803, // VFMADD213PDZrbk |
| 82421 | 26809, // VFMADD213PDZrbkz |
| 82422 | 26815, // VFMADD213PDZrk |
| 82423 | 26820, // VFMADD213PDZrkz |
| 82424 | 26825, // VFMADD213PDm |
| 82425 | 26829, // VFMADD213PDr |
| 82426 | 26833, // VFMADD213PHZ128m |
| 82427 | 26837, // VFMADD213PHZ128mb |
| 82428 | 26841, // VFMADD213PHZ128mbk |
| 82429 | 26846, // VFMADD213PHZ128mbkz |
| 82430 | 26851, // VFMADD213PHZ128mk |
| 82431 | 26856, // VFMADD213PHZ128mkz |
| 82432 | 26861, // VFMADD213PHZ128r |
| 82433 | 26865, // VFMADD213PHZ128rk |
| 82434 | 26870, // VFMADD213PHZ128rkz |
| 82435 | 26875, // VFMADD213PHZ256m |
| 82436 | 26879, // VFMADD213PHZ256mb |
| 82437 | 26883, // VFMADD213PHZ256mbk |
| 82438 | 26888, // VFMADD213PHZ256mbkz |
| 82439 | 26893, // VFMADD213PHZ256mk |
| 82440 | 26898, // VFMADD213PHZ256mkz |
| 82441 | 26903, // VFMADD213PHZ256r |
| 82442 | 26907, // VFMADD213PHZ256rk |
| 82443 | 26912, // VFMADD213PHZ256rkz |
| 82444 | 26917, // VFMADD213PHZm |
| 82445 | 26921, // VFMADD213PHZmb |
| 82446 | 26925, // VFMADD213PHZmbk |
| 82447 | 26930, // VFMADD213PHZmbkz |
| 82448 | 26935, // VFMADD213PHZmk |
| 82449 | 26940, // VFMADD213PHZmkz |
| 82450 | 26945, // VFMADD213PHZr |
| 82451 | 26949, // VFMADD213PHZrb |
| 82452 | 26954, // VFMADD213PHZrbk |
| 82453 | 26960, // VFMADD213PHZrbkz |
| 82454 | 26966, // VFMADD213PHZrk |
| 82455 | 26971, // VFMADD213PHZrkz |
| 82456 | 26976, // VFMADD213PSYm |
| 82457 | 26980, // VFMADD213PSYr |
| 82458 | 26984, // VFMADD213PSZ128m |
| 82459 | 26988, // VFMADD213PSZ128mb |
| 82460 | 26992, // VFMADD213PSZ128mbk |
| 82461 | 26997, // VFMADD213PSZ128mbkz |
| 82462 | 27002, // VFMADD213PSZ128mk |
| 82463 | 27007, // VFMADD213PSZ128mkz |
| 82464 | 27012, // VFMADD213PSZ128r |
| 82465 | 27016, // VFMADD213PSZ128rk |
| 82466 | 27021, // VFMADD213PSZ128rkz |
| 82467 | 27026, // VFMADD213PSZ256m |
| 82468 | 27030, // VFMADD213PSZ256mb |
| 82469 | 27034, // VFMADD213PSZ256mbk |
| 82470 | 27039, // VFMADD213PSZ256mbkz |
| 82471 | 27044, // VFMADD213PSZ256mk |
| 82472 | 27049, // VFMADD213PSZ256mkz |
| 82473 | 27054, // VFMADD213PSZ256r |
| 82474 | 27058, // VFMADD213PSZ256rk |
| 82475 | 27063, // VFMADD213PSZ256rkz |
| 82476 | 27068, // VFMADD213PSZm |
| 82477 | 27072, // VFMADD213PSZmb |
| 82478 | 27076, // VFMADD213PSZmbk |
| 82479 | 27081, // VFMADD213PSZmbkz |
| 82480 | 27086, // VFMADD213PSZmk |
| 82481 | 27091, // VFMADD213PSZmkz |
| 82482 | 27096, // VFMADD213PSZr |
| 82483 | 27100, // VFMADD213PSZrb |
| 82484 | 27105, // VFMADD213PSZrbk |
| 82485 | 27111, // VFMADD213PSZrbkz |
| 82486 | 27117, // VFMADD213PSZrk |
| 82487 | 27122, // VFMADD213PSZrkz |
| 82488 | 27127, // VFMADD213PSm |
| 82489 | 27131, // VFMADD213PSr |
| 82490 | 27135, // VFMADD213SDZm |
| 82491 | 27139, // VFMADD213SDZm_Int |
| 82492 | 27143, // VFMADD213SDZmk_Int |
| 82493 | 27148, // VFMADD213SDZmkz_Int |
| 82494 | 27153, // VFMADD213SDZr |
| 82495 | 27157, // VFMADD213SDZr_Int |
| 82496 | 27161, // VFMADD213SDZrb |
| 82497 | 27166, // VFMADD213SDZrb_Int |
| 82498 | 27171, // VFMADD213SDZrbk_Int |
| 82499 | 27177, // VFMADD213SDZrbkz_Int |
| 82500 | 27183, // VFMADD213SDZrk_Int |
| 82501 | 27188, // VFMADD213SDZrkz_Int |
| 82502 | 27193, // VFMADD213SDm |
| 82503 | 27197, // VFMADD213SDm_Int |
| 82504 | 27201, // VFMADD213SDr |
| 82505 | 27205, // VFMADD213SDr_Int |
| 82506 | 27209, // VFMADD213SHZm |
| 82507 | 27213, // VFMADD213SHZm_Int |
| 82508 | 27217, // VFMADD213SHZmk_Int |
| 82509 | 27222, // VFMADD213SHZmkz_Int |
| 82510 | 27227, // VFMADD213SHZr |
| 82511 | 27231, // VFMADD213SHZr_Int |
| 82512 | 27235, // VFMADD213SHZrb |
| 82513 | 27240, // VFMADD213SHZrb_Int |
| 82514 | 27245, // VFMADD213SHZrbk_Int |
| 82515 | 27251, // VFMADD213SHZrbkz_Int |
| 82516 | 27257, // VFMADD213SHZrk_Int |
| 82517 | 27262, // VFMADD213SHZrkz_Int |
| 82518 | 27267, // VFMADD213SSZm |
| 82519 | 27271, // VFMADD213SSZm_Int |
| 82520 | 27275, // VFMADD213SSZmk_Int |
| 82521 | 27280, // VFMADD213SSZmkz_Int |
| 82522 | 27285, // VFMADD213SSZr |
| 82523 | 27289, // VFMADD213SSZr_Int |
| 82524 | 27293, // VFMADD213SSZrb |
| 82525 | 27298, // VFMADD213SSZrb_Int |
| 82526 | 27303, // VFMADD213SSZrbk_Int |
| 82527 | 27309, // VFMADD213SSZrbkz_Int |
| 82528 | 27315, // VFMADD213SSZrk_Int |
| 82529 | 27320, // VFMADD213SSZrkz_Int |
| 82530 | 27325, // VFMADD213SSm |
| 82531 | 27329, // VFMADD213SSm_Int |
| 82532 | 27333, // VFMADD213SSr |
| 82533 | 27337, // VFMADD213SSr_Int |
| 82534 | 27341, // VFMADD231BF16Z128m |
| 82535 | 27345, // VFMADD231BF16Z128mb |
| 82536 | 27349, // VFMADD231BF16Z128mbk |
| 82537 | 27354, // VFMADD231BF16Z128mbkz |
| 82538 | 27359, // VFMADD231BF16Z128mk |
| 82539 | 27364, // VFMADD231BF16Z128mkz |
| 82540 | 27369, // VFMADD231BF16Z128r |
| 82541 | 27373, // VFMADD231BF16Z128rk |
| 82542 | 27378, // VFMADD231BF16Z128rkz |
| 82543 | 27383, // VFMADD231BF16Z256m |
| 82544 | 27387, // VFMADD231BF16Z256mb |
| 82545 | 27391, // VFMADD231BF16Z256mbk |
| 82546 | 27396, // VFMADD231BF16Z256mbkz |
| 82547 | 27401, // VFMADD231BF16Z256mk |
| 82548 | 27406, // VFMADD231BF16Z256mkz |
| 82549 | 27411, // VFMADD231BF16Z256r |
| 82550 | 27415, // VFMADD231BF16Z256rk |
| 82551 | 27420, // VFMADD231BF16Z256rkz |
| 82552 | 27425, // VFMADD231BF16Zm |
| 82553 | 27429, // VFMADD231BF16Zmb |
| 82554 | 27433, // VFMADD231BF16Zmbk |
| 82555 | 27438, // VFMADD231BF16Zmbkz |
| 82556 | 27443, // VFMADD231BF16Zmk |
| 82557 | 27448, // VFMADD231BF16Zmkz |
| 82558 | 27453, // VFMADD231BF16Zr |
| 82559 | 27457, // VFMADD231BF16Zrk |
| 82560 | 27462, // VFMADD231BF16Zrkz |
| 82561 | 27467, // VFMADD231PDYm |
| 82562 | 27471, // VFMADD231PDYr |
| 82563 | 27475, // VFMADD231PDZ128m |
| 82564 | 27479, // VFMADD231PDZ128mb |
| 82565 | 27483, // VFMADD231PDZ128mbk |
| 82566 | 27488, // VFMADD231PDZ128mbkz |
| 82567 | 27493, // VFMADD231PDZ128mk |
| 82568 | 27498, // VFMADD231PDZ128mkz |
| 82569 | 27503, // VFMADD231PDZ128r |
| 82570 | 27507, // VFMADD231PDZ128rk |
| 82571 | 27512, // VFMADD231PDZ128rkz |
| 82572 | 27517, // VFMADD231PDZ256m |
| 82573 | 27521, // VFMADD231PDZ256mb |
| 82574 | 27525, // VFMADD231PDZ256mbk |
| 82575 | 27530, // VFMADD231PDZ256mbkz |
| 82576 | 27535, // VFMADD231PDZ256mk |
| 82577 | 27540, // VFMADD231PDZ256mkz |
| 82578 | 27545, // VFMADD231PDZ256r |
| 82579 | 27549, // VFMADD231PDZ256rk |
| 82580 | 27554, // VFMADD231PDZ256rkz |
| 82581 | 27559, // VFMADD231PDZm |
| 82582 | 27563, // VFMADD231PDZmb |
| 82583 | 27567, // VFMADD231PDZmbk |
| 82584 | 27572, // VFMADD231PDZmbkz |
| 82585 | 27577, // VFMADD231PDZmk |
| 82586 | 27582, // VFMADD231PDZmkz |
| 82587 | 27587, // VFMADD231PDZr |
| 82588 | 27591, // VFMADD231PDZrb |
| 82589 | 27596, // VFMADD231PDZrbk |
| 82590 | 27602, // VFMADD231PDZrbkz |
| 82591 | 27608, // VFMADD231PDZrk |
| 82592 | 27613, // VFMADD231PDZrkz |
| 82593 | 27618, // VFMADD231PDm |
| 82594 | 27622, // VFMADD231PDr |
| 82595 | 27626, // VFMADD231PHZ128m |
| 82596 | 27630, // VFMADD231PHZ128mb |
| 82597 | 27634, // VFMADD231PHZ128mbk |
| 82598 | 27639, // VFMADD231PHZ128mbkz |
| 82599 | 27644, // VFMADD231PHZ128mk |
| 82600 | 27649, // VFMADD231PHZ128mkz |
| 82601 | 27654, // VFMADD231PHZ128r |
| 82602 | 27658, // VFMADD231PHZ128rk |
| 82603 | 27663, // VFMADD231PHZ128rkz |
| 82604 | 27668, // VFMADD231PHZ256m |
| 82605 | 27672, // VFMADD231PHZ256mb |
| 82606 | 27676, // VFMADD231PHZ256mbk |
| 82607 | 27681, // VFMADD231PHZ256mbkz |
| 82608 | 27686, // VFMADD231PHZ256mk |
| 82609 | 27691, // VFMADD231PHZ256mkz |
| 82610 | 27696, // VFMADD231PHZ256r |
| 82611 | 27700, // VFMADD231PHZ256rk |
| 82612 | 27705, // VFMADD231PHZ256rkz |
| 82613 | 27710, // VFMADD231PHZm |
| 82614 | 27714, // VFMADD231PHZmb |
| 82615 | 27718, // VFMADD231PHZmbk |
| 82616 | 27723, // VFMADD231PHZmbkz |
| 82617 | 27728, // VFMADD231PHZmk |
| 82618 | 27733, // VFMADD231PHZmkz |
| 82619 | 27738, // VFMADD231PHZr |
| 82620 | 27742, // VFMADD231PHZrb |
| 82621 | 27747, // VFMADD231PHZrbk |
| 82622 | 27753, // VFMADD231PHZrbkz |
| 82623 | 27759, // VFMADD231PHZrk |
| 82624 | 27764, // VFMADD231PHZrkz |
| 82625 | 27769, // VFMADD231PSYm |
| 82626 | 27773, // VFMADD231PSYr |
| 82627 | 27777, // VFMADD231PSZ128m |
| 82628 | 27781, // VFMADD231PSZ128mb |
| 82629 | 27785, // VFMADD231PSZ128mbk |
| 82630 | 27790, // VFMADD231PSZ128mbkz |
| 82631 | 27795, // VFMADD231PSZ128mk |
| 82632 | 27800, // VFMADD231PSZ128mkz |
| 82633 | 27805, // VFMADD231PSZ128r |
| 82634 | 27809, // VFMADD231PSZ128rk |
| 82635 | 27814, // VFMADD231PSZ128rkz |
| 82636 | 27819, // VFMADD231PSZ256m |
| 82637 | 27823, // VFMADD231PSZ256mb |
| 82638 | 27827, // VFMADD231PSZ256mbk |
| 82639 | 27832, // VFMADD231PSZ256mbkz |
| 82640 | 27837, // VFMADD231PSZ256mk |
| 82641 | 27842, // VFMADD231PSZ256mkz |
| 82642 | 27847, // VFMADD231PSZ256r |
| 82643 | 27851, // VFMADD231PSZ256rk |
| 82644 | 27856, // VFMADD231PSZ256rkz |
| 82645 | 27861, // VFMADD231PSZm |
| 82646 | 27865, // VFMADD231PSZmb |
| 82647 | 27869, // VFMADD231PSZmbk |
| 82648 | 27874, // VFMADD231PSZmbkz |
| 82649 | 27879, // VFMADD231PSZmk |
| 82650 | 27884, // VFMADD231PSZmkz |
| 82651 | 27889, // VFMADD231PSZr |
| 82652 | 27893, // VFMADD231PSZrb |
| 82653 | 27898, // VFMADD231PSZrbk |
| 82654 | 27904, // VFMADD231PSZrbkz |
| 82655 | 27910, // VFMADD231PSZrk |
| 82656 | 27915, // VFMADD231PSZrkz |
| 82657 | 27920, // VFMADD231PSm |
| 82658 | 27924, // VFMADD231PSr |
| 82659 | 27928, // VFMADD231SDZm |
| 82660 | 27932, // VFMADD231SDZm_Int |
| 82661 | 27936, // VFMADD231SDZmk_Int |
| 82662 | 27941, // VFMADD231SDZmkz_Int |
| 82663 | 27946, // VFMADD231SDZr |
| 82664 | 27950, // VFMADD231SDZr_Int |
| 82665 | 27954, // VFMADD231SDZrb |
| 82666 | 27959, // VFMADD231SDZrb_Int |
| 82667 | 27964, // VFMADD231SDZrbk_Int |
| 82668 | 27970, // VFMADD231SDZrbkz_Int |
| 82669 | 27976, // VFMADD231SDZrk_Int |
| 82670 | 27981, // VFMADD231SDZrkz_Int |
| 82671 | 27986, // VFMADD231SDm |
| 82672 | 27990, // VFMADD231SDm_Int |
| 82673 | 27994, // VFMADD231SDr |
| 82674 | 27998, // VFMADD231SDr_Int |
| 82675 | 28002, // VFMADD231SHZm |
| 82676 | 28006, // VFMADD231SHZm_Int |
| 82677 | 28010, // VFMADD231SHZmk_Int |
| 82678 | 28015, // VFMADD231SHZmkz_Int |
| 82679 | 28020, // VFMADD231SHZr |
| 82680 | 28024, // VFMADD231SHZr_Int |
| 82681 | 28028, // VFMADD231SHZrb |
| 82682 | 28033, // VFMADD231SHZrb_Int |
| 82683 | 28038, // VFMADD231SHZrbk_Int |
| 82684 | 28044, // VFMADD231SHZrbkz_Int |
| 82685 | 28050, // VFMADD231SHZrk_Int |
| 82686 | 28055, // VFMADD231SHZrkz_Int |
| 82687 | 28060, // VFMADD231SSZm |
| 82688 | 28064, // VFMADD231SSZm_Int |
| 82689 | 28068, // VFMADD231SSZmk_Int |
| 82690 | 28073, // VFMADD231SSZmkz_Int |
| 82691 | 28078, // VFMADD231SSZr |
| 82692 | 28082, // VFMADD231SSZr_Int |
| 82693 | 28086, // VFMADD231SSZrb |
| 82694 | 28091, // VFMADD231SSZrb_Int |
| 82695 | 28096, // VFMADD231SSZrbk_Int |
| 82696 | 28102, // VFMADD231SSZrbkz_Int |
| 82697 | 28108, // VFMADD231SSZrk_Int |
| 82698 | 28113, // VFMADD231SSZrkz_Int |
| 82699 | 28118, // VFMADD231SSm |
| 82700 | 28122, // VFMADD231SSm_Int |
| 82701 | 28126, // VFMADD231SSr |
| 82702 | 28130, // VFMADD231SSr_Int |
| 82703 | 28134, // VFMADDCPHZ128m |
| 82704 | 28138, // VFMADDCPHZ128mb |
| 82705 | 28142, // VFMADDCPHZ128mbk |
| 82706 | 28147, // VFMADDCPHZ128mbkz |
| 82707 | 28152, // VFMADDCPHZ128mk |
| 82708 | 28157, // VFMADDCPHZ128mkz |
| 82709 | 28162, // VFMADDCPHZ128r |
| 82710 | 28166, // VFMADDCPHZ128rk |
| 82711 | 28171, // VFMADDCPHZ128rkz |
| 82712 | 28176, // VFMADDCPHZ256m |
| 82713 | 28180, // VFMADDCPHZ256mb |
| 82714 | 28184, // VFMADDCPHZ256mbk |
| 82715 | 28189, // VFMADDCPHZ256mbkz |
| 82716 | 28194, // VFMADDCPHZ256mk |
| 82717 | 28199, // VFMADDCPHZ256mkz |
| 82718 | 28204, // VFMADDCPHZ256r |
| 82719 | 28208, // VFMADDCPHZ256rk |
| 82720 | 28213, // VFMADDCPHZ256rkz |
| 82721 | 28218, // VFMADDCPHZm |
| 82722 | 28222, // VFMADDCPHZmb |
| 82723 | 28226, // VFMADDCPHZmbk |
| 82724 | 28231, // VFMADDCPHZmbkz |
| 82725 | 28236, // VFMADDCPHZmk |
| 82726 | 28241, // VFMADDCPHZmkz |
| 82727 | 28246, // VFMADDCPHZr |
| 82728 | 28250, // VFMADDCPHZrb |
| 82729 | 28255, // VFMADDCPHZrbk |
| 82730 | 28261, // VFMADDCPHZrbkz |
| 82731 | 28267, // VFMADDCPHZrk |
| 82732 | 28272, // VFMADDCPHZrkz |
| 82733 | 28277, // VFMADDCSHZm |
| 82734 | 28281, // VFMADDCSHZmk |
| 82735 | 28286, // VFMADDCSHZmkz |
| 82736 | 28291, // VFMADDCSHZr |
| 82737 | 28295, // VFMADDCSHZrb |
| 82738 | 28300, // VFMADDCSHZrbk |
| 82739 | 28306, // VFMADDCSHZrbkz |
| 82740 | 28312, // VFMADDCSHZrk |
| 82741 | 28317, // VFMADDCSHZrkz |
| 82742 | 28322, // VFMADDPD4Ymr |
| 82743 | 28326, // VFMADDPD4Yrm |
| 82744 | 28330, // VFMADDPD4Yrr |
| 82745 | 28334, // VFMADDPD4Yrr_REV |
| 82746 | 28338, // VFMADDPD4mr |
| 82747 | 28342, // VFMADDPD4rm |
| 82748 | 28346, // VFMADDPD4rr |
| 82749 | 28350, // VFMADDPD4rr_REV |
| 82750 | 28354, // VFMADDPS4Ymr |
| 82751 | 28358, // VFMADDPS4Yrm |
| 82752 | 28362, // VFMADDPS4Yrr |
| 82753 | 28366, // VFMADDPS4Yrr_REV |
| 82754 | 28370, // VFMADDPS4mr |
| 82755 | 28374, // VFMADDPS4rm |
| 82756 | 28378, // VFMADDPS4rr |
| 82757 | 28382, // VFMADDPS4rr_REV |
| 82758 | 28386, // VFMADDSD4mr |
| 82759 | 28390, // VFMADDSD4mr_Int |
| 82760 | 28394, // VFMADDSD4rm |
| 82761 | 28398, // VFMADDSD4rm_Int |
| 82762 | 28402, // VFMADDSD4rr |
| 82763 | 28406, // VFMADDSD4rr_Int |
| 82764 | 28410, // VFMADDSD4rr_Int_REV |
| 82765 | 28414, // VFMADDSD4rr_REV |
| 82766 | 28418, // VFMADDSS4mr |
| 82767 | 28422, // VFMADDSS4mr_Int |
| 82768 | 28426, // VFMADDSS4rm |
| 82769 | 28430, // VFMADDSS4rm_Int |
| 82770 | 28434, // VFMADDSS4rr |
| 82771 | 28438, // VFMADDSS4rr_Int |
| 82772 | 28442, // VFMADDSS4rr_Int_REV |
| 82773 | 28446, // VFMADDSS4rr_REV |
| 82774 | 28450, // VFMADDSUB132PDYm |
| 82775 | 28454, // VFMADDSUB132PDYr |
| 82776 | 28458, // VFMADDSUB132PDZ128m |
| 82777 | 28462, // VFMADDSUB132PDZ128mb |
| 82778 | 28466, // VFMADDSUB132PDZ128mbk |
| 82779 | 28471, // VFMADDSUB132PDZ128mbkz |
| 82780 | 28476, // VFMADDSUB132PDZ128mk |
| 82781 | 28481, // VFMADDSUB132PDZ128mkz |
| 82782 | 28486, // VFMADDSUB132PDZ128r |
| 82783 | 28490, // VFMADDSUB132PDZ128rk |
| 82784 | 28495, // VFMADDSUB132PDZ128rkz |
| 82785 | 28500, // VFMADDSUB132PDZ256m |
| 82786 | 28504, // VFMADDSUB132PDZ256mb |
| 82787 | 28508, // VFMADDSUB132PDZ256mbk |
| 82788 | 28513, // VFMADDSUB132PDZ256mbkz |
| 82789 | 28518, // VFMADDSUB132PDZ256mk |
| 82790 | 28523, // VFMADDSUB132PDZ256mkz |
| 82791 | 28528, // VFMADDSUB132PDZ256r |
| 82792 | 28532, // VFMADDSUB132PDZ256rk |
| 82793 | 28537, // VFMADDSUB132PDZ256rkz |
| 82794 | 28542, // VFMADDSUB132PDZm |
| 82795 | 28546, // VFMADDSUB132PDZmb |
| 82796 | 28550, // VFMADDSUB132PDZmbk |
| 82797 | 28555, // VFMADDSUB132PDZmbkz |
| 82798 | 28560, // VFMADDSUB132PDZmk |
| 82799 | 28565, // VFMADDSUB132PDZmkz |
| 82800 | 28570, // VFMADDSUB132PDZr |
| 82801 | 28574, // VFMADDSUB132PDZrb |
| 82802 | 28579, // VFMADDSUB132PDZrbk |
| 82803 | 28585, // VFMADDSUB132PDZrbkz |
| 82804 | 28591, // VFMADDSUB132PDZrk |
| 82805 | 28596, // VFMADDSUB132PDZrkz |
| 82806 | 28601, // VFMADDSUB132PDm |
| 82807 | 28605, // VFMADDSUB132PDr |
| 82808 | 28609, // VFMADDSUB132PHZ128m |
| 82809 | 28613, // VFMADDSUB132PHZ128mb |
| 82810 | 28617, // VFMADDSUB132PHZ128mbk |
| 82811 | 28622, // VFMADDSUB132PHZ128mbkz |
| 82812 | 28627, // VFMADDSUB132PHZ128mk |
| 82813 | 28632, // VFMADDSUB132PHZ128mkz |
| 82814 | 28637, // VFMADDSUB132PHZ128r |
| 82815 | 28641, // VFMADDSUB132PHZ128rk |
| 82816 | 28646, // VFMADDSUB132PHZ128rkz |
| 82817 | 28651, // VFMADDSUB132PHZ256m |
| 82818 | 28655, // VFMADDSUB132PHZ256mb |
| 82819 | 28659, // VFMADDSUB132PHZ256mbk |
| 82820 | 28664, // VFMADDSUB132PHZ256mbkz |
| 82821 | 28669, // VFMADDSUB132PHZ256mk |
| 82822 | 28674, // VFMADDSUB132PHZ256mkz |
| 82823 | 28679, // VFMADDSUB132PHZ256r |
| 82824 | 28683, // VFMADDSUB132PHZ256rk |
| 82825 | 28688, // VFMADDSUB132PHZ256rkz |
| 82826 | 28693, // VFMADDSUB132PHZm |
| 82827 | 28697, // VFMADDSUB132PHZmb |
| 82828 | 28701, // VFMADDSUB132PHZmbk |
| 82829 | 28706, // VFMADDSUB132PHZmbkz |
| 82830 | 28711, // VFMADDSUB132PHZmk |
| 82831 | 28716, // VFMADDSUB132PHZmkz |
| 82832 | 28721, // VFMADDSUB132PHZr |
| 82833 | 28725, // VFMADDSUB132PHZrb |
| 82834 | 28730, // VFMADDSUB132PHZrbk |
| 82835 | 28736, // VFMADDSUB132PHZrbkz |
| 82836 | 28742, // VFMADDSUB132PHZrk |
| 82837 | 28747, // VFMADDSUB132PHZrkz |
| 82838 | 28752, // VFMADDSUB132PSYm |
| 82839 | 28756, // VFMADDSUB132PSYr |
| 82840 | 28760, // VFMADDSUB132PSZ128m |
| 82841 | 28764, // VFMADDSUB132PSZ128mb |
| 82842 | 28768, // VFMADDSUB132PSZ128mbk |
| 82843 | 28773, // VFMADDSUB132PSZ128mbkz |
| 82844 | 28778, // VFMADDSUB132PSZ128mk |
| 82845 | 28783, // VFMADDSUB132PSZ128mkz |
| 82846 | 28788, // VFMADDSUB132PSZ128r |
| 82847 | 28792, // VFMADDSUB132PSZ128rk |
| 82848 | 28797, // VFMADDSUB132PSZ128rkz |
| 82849 | 28802, // VFMADDSUB132PSZ256m |
| 82850 | 28806, // VFMADDSUB132PSZ256mb |
| 82851 | 28810, // VFMADDSUB132PSZ256mbk |
| 82852 | 28815, // VFMADDSUB132PSZ256mbkz |
| 82853 | 28820, // VFMADDSUB132PSZ256mk |
| 82854 | 28825, // VFMADDSUB132PSZ256mkz |
| 82855 | 28830, // VFMADDSUB132PSZ256r |
| 82856 | 28834, // VFMADDSUB132PSZ256rk |
| 82857 | 28839, // VFMADDSUB132PSZ256rkz |
| 82858 | 28844, // VFMADDSUB132PSZm |
| 82859 | 28848, // VFMADDSUB132PSZmb |
| 82860 | 28852, // VFMADDSUB132PSZmbk |
| 82861 | 28857, // VFMADDSUB132PSZmbkz |
| 82862 | 28862, // VFMADDSUB132PSZmk |
| 82863 | 28867, // VFMADDSUB132PSZmkz |
| 82864 | 28872, // VFMADDSUB132PSZr |
| 82865 | 28876, // VFMADDSUB132PSZrb |
| 82866 | 28881, // VFMADDSUB132PSZrbk |
| 82867 | 28887, // VFMADDSUB132PSZrbkz |
| 82868 | 28893, // VFMADDSUB132PSZrk |
| 82869 | 28898, // VFMADDSUB132PSZrkz |
| 82870 | 28903, // VFMADDSUB132PSm |
| 82871 | 28907, // VFMADDSUB132PSr |
| 82872 | 28911, // VFMADDSUB213PDYm |
| 82873 | 28915, // VFMADDSUB213PDYr |
| 82874 | 28919, // VFMADDSUB213PDZ128m |
| 82875 | 28923, // VFMADDSUB213PDZ128mb |
| 82876 | 28927, // VFMADDSUB213PDZ128mbk |
| 82877 | 28932, // VFMADDSUB213PDZ128mbkz |
| 82878 | 28937, // VFMADDSUB213PDZ128mk |
| 82879 | 28942, // VFMADDSUB213PDZ128mkz |
| 82880 | 28947, // VFMADDSUB213PDZ128r |
| 82881 | 28951, // VFMADDSUB213PDZ128rk |
| 82882 | 28956, // VFMADDSUB213PDZ128rkz |
| 82883 | 28961, // VFMADDSUB213PDZ256m |
| 82884 | 28965, // VFMADDSUB213PDZ256mb |
| 82885 | 28969, // VFMADDSUB213PDZ256mbk |
| 82886 | 28974, // VFMADDSUB213PDZ256mbkz |
| 82887 | 28979, // VFMADDSUB213PDZ256mk |
| 82888 | 28984, // VFMADDSUB213PDZ256mkz |
| 82889 | 28989, // VFMADDSUB213PDZ256r |
| 82890 | 28993, // VFMADDSUB213PDZ256rk |
| 82891 | 28998, // VFMADDSUB213PDZ256rkz |
| 82892 | 29003, // VFMADDSUB213PDZm |
| 82893 | 29007, // VFMADDSUB213PDZmb |
| 82894 | 29011, // VFMADDSUB213PDZmbk |
| 82895 | 29016, // VFMADDSUB213PDZmbkz |
| 82896 | 29021, // VFMADDSUB213PDZmk |
| 82897 | 29026, // VFMADDSUB213PDZmkz |
| 82898 | 29031, // VFMADDSUB213PDZr |
| 82899 | 29035, // VFMADDSUB213PDZrb |
| 82900 | 29040, // VFMADDSUB213PDZrbk |
| 82901 | 29046, // VFMADDSUB213PDZrbkz |
| 82902 | 29052, // VFMADDSUB213PDZrk |
| 82903 | 29057, // VFMADDSUB213PDZrkz |
| 82904 | 29062, // VFMADDSUB213PDm |
| 82905 | 29066, // VFMADDSUB213PDr |
| 82906 | 29070, // VFMADDSUB213PHZ128m |
| 82907 | 29074, // VFMADDSUB213PHZ128mb |
| 82908 | 29078, // VFMADDSUB213PHZ128mbk |
| 82909 | 29083, // VFMADDSUB213PHZ128mbkz |
| 82910 | 29088, // VFMADDSUB213PHZ128mk |
| 82911 | 29093, // VFMADDSUB213PHZ128mkz |
| 82912 | 29098, // VFMADDSUB213PHZ128r |
| 82913 | 29102, // VFMADDSUB213PHZ128rk |
| 82914 | 29107, // VFMADDSUB213PHZ128rkz |
| 82915 | 29112, // VFMADDSUB213PHZ256m |
| 82916 | 29116, // VFMADDSUB213PHZ256mb |
| 82917 | 29120, // VFMADDSUB213PHZ256mbk |
| 82918 | 29125, // VFMADDSUB213PHZ256mbkz |
| 82919 | 29130, // VFMADDSUB213PHZ256mk |
| 82920 | 29135, // VFMADDSUB213PHZ256mkz |
| 82921 | 29140, // VFMADDSUB213PHZ256r |
| 82922 | 29144, // VFMADDSUB213PHZ256rk |
| 82923 | 29149, // VFMADDSUB213PHZ256rkz |
| 82924 | 29154, // VFMADDSUB213PHZm |
| 82925 | 29158, // VFMADDSUB213PHZmb |
| 82926 | 29162, // VFMADDSUB213PHZmbk |
| 82927 | 29167, // VFMADDSUB213PHZmbkz |
| 82928 | 29172, // VFMADDSUB213PHZmk |
| 82929 | 29177, // VFMADDSUB213PHZmkz |
| 82930 | 29182, // VFMADDSUB213PHZr |
| 82931 | 29186, // VFMADDSUB213PHZrb |
| 82932 | 29191, // VFMADDSUB213PHZrbk |
| 82933 | 29197, // VFMADDSUB213PHZrbkz |
| 82934 | 29203, // VFMADDSUB213PHZrk |
| 82935 | 29208, // VFMADDSUB213PHZrkz |
| 82936 | 29213, // VFMADDSUB213PSYm |
| 82937 | 29217, // VFMADDSUB213PSYr |
| 82938 | 29221, // VFMADDSUB213PSZ128m |
| 82939 | 29225, // VFMADDSUB213PSZ128mb |
| 82940 | 29229, // VFMADDSUB213PSZ128mbk |
| 82941 | 29234, // VFMADDSUB213PSZ128mbkz |
| 82942 | 29239, // VFMADDSUB213PSZ128mk |
| 82943 | 29244, // VFMADDSUB213PSZ128mkz |
| 82944 | 29249, // VFMADDSUB213PSZ128r |
| 82945 | 29253, // VFMADDSUB213PSZ128rk |
| 82946 | 29258, // VFMADDSUB213PSZ128rkz |
| 82947 | 29263, // VFMADDSUB213PSZ256m |
| 82948 | 29267, // VFMADDSUB213PSZ256mb |
| 82949 | 29271, // VFMADDSUB213PSZ256mbk |
| 82950 | 29276, // VFMADDSUB213PSZ256mbkz |
| 82951 | 29281, // VFMADDSUB213PSZ256mk |
| 82952 | 29286, // VFMADDSUB213PSZ256mkz |
| 82953 | 29291, // VFMADDSUB213PSZ256r |
| 82954 | 29295, // VFMADDSUB213PSZ256rk |
| 82955 | 29300, // VFMADDSUB213PSZ256rkz |
| 82956 | 29305, // VFMADDSUB213PSZm |
| 82957 | 29309, // VFMADDSUB213PSZmb |
| 82958 | 29313, // VFMADDSUB213PSZmbk |
| 82959 | 29318, // VFMADDSUB213PSZmbkz |
| 82960 | 29323, // VFMADDSUB213PSZmk |
| 82961 | 29328, // VFMADDSUB213PSZmkz |
| 82962 | 29333, // VFMADDSUB213PSZr |
| 82963 | 29337, // VFMADDSUB213PSZrb |
| 82964 | 29342, // VFMADDSUB213PSZrbk |
| 82965 | 29348, // VFMADDSUB213PSZrbkz |
| 82966 | 29354, // VFMADDSUB213PSZrk |
| 82967 | 29359, // VFMADDSUB213PSZrkz |
| 82968 | 29364, // VFMADDSUB213PSm |
| 82969 | 29368, // VFMADDSUB213PSr |
| 82970 | 29372, // VFMADDSUB231PDYm |
| 82971 | 29376, // VFMADDSUB231PDYr |
| 82972 | 29380, // VFMADDSUB231PDZ128m |
| 82973 | 29384, // VFMADDSUB231PDZ128mb |
| 82974 | 29388, // VFMADDSUB231PDZ128mbk |
| 82975 | 29393, // VFMADDSUB231PDZ128mbkz |
| 82976 | 29398, // VFMADDSUB231PDZ128mk |
| 82977 | 29403, // VFMADDSUB231PDZ128mkz |
| 82978 | 29408, // VFMADDSUB231PDZ128r |
| 82979 | 29412, // VFMADDSUB231PDZ128rk |
| 82980 | 29417, // VFMADDSUB231PDZ128rkz |
| 82981 | 29422, // VFMADDSUB231PDZ256m |
| 82982 | 29426, // VFMADDSUB231PDZ256mb |
| 82983 | 29430, // VFMADDSUB231PDZ256mbk |
| 82984 | 29435, // VFMADDSUB231PDZ256mbkz |
| 82985 | 29440, // VFMADDSUB231PDZ256mk |
| 82986 | 29445, // VFMADDSUB231PDZ256mkz |
| 82987 | 29450, // VFMADDSUB231PDZ256r |
| 82988 | 29454, // VFMADDSUB231PDZ256rk |
| 82989 | 29459, // VFMADDSUB231PDZ256rkz |
| 82990 | 29464, // VFMADDSUB231PDZm |
| 82991 | 29468, // VFMADDSUB231PDZmb |
| 82992 | 29472, // VFMADDSUB231PDZmbk |
| 82993 | 29477, // VFMADDSUB231PDZmbkz |
| 82994 | 29482, // VFMADDSUB231PDZmk |
| 82995 | 29487, // VFMADDSUB231PDZmkz |
| 82996 | 29492, // VFMADDSUB231PDZr |
| 82997 | 29496, // VFMADDSUB231PDZrb |
| 82998 | 29501, // VFMADDSUB231PDZrbk |
| 82999 | 29507, // VFMADDSUB231PDZrbkz |
| 83000 | 29513, // VFMADDSUB231PDZrk |
| 83001 | 29518, // VFMADDSUB231PDZrkz |
| 83002 | 29523, // VFMADDSUB231PDm |
| 83003 | 29527, // VFMADDSUB231PDr |
| 83004 | 29531, // VFMADDSUB231PHZ128m |
| 83005 | 29535, // VFMADDSUB231PHZ128mb |
| 83006 | 29539, // VFMADDSUB231PHZ128mbk |
| 83007 | 29544, // VFMADDSUB231PHZ128mbkz |
| 83008 | 29549, // VFMADDSUB231PHZ128mk |
| 83009 | 29554, // VFMADDSUB231PHZ128mkz |
| 83010 | 29559, // VFMADDSUB231PHZ128r |
| 83011 | 29563, // VFMADDSUB231PHZ128rk |
| 83012 | 29568, // VFMADDSUB231PHZ128rkz |
| 83013 | 29573, // VFMADDSUB231PHZ256m |
| 83014 | 29577, // VFMADDSUB231PHZ256mb |
| 83015 | 29581, // VFMADDSUB231PHZ256mbk |
| 83016 | 29586, // VFMADDSUB231PHZ256mbkz |
| 83017 | 29591, // VFMADDSUB231PHZ256mk |
| 83018 | 29596, // VFMADDSUB231PHZ256mkz |
| 83019 | 29601, // VFMADDSUB231PHZ256r |
| 83020 | 29605, // VFMADDSUB231PHZ256rk |
| 83021 | 29610, // VFMADDSUB231PHZ256rkz |
| 83022 | 29615, // VFMADDSUB231PHZm |
| 83023 | 29619, // VFMADDSUB231PHZmb |
| 83024 | 29623, // VFMADDSUB231PHZmbk |
| 83025 | 29628, // VFMADDSUB231PHZmbkz |
| 83026 | 29633, // VFMADDSUB231PHZmk |
| 83027 | 29638, // VFMADDSUB231PHZmkz |
| 83028 | 29643, // VFMADDSUB231PHZr |
| 83029 | 29647, // VFMADDSUB231PHZrb |
| 83030 | 29652, // VFMADDSUB231PHZrbk |
| 83031 | 29658, // VFMADDSUB231PHZrbkz |
| 83032 | 29664, // VFMADDSUB231PHZrk |
| 83033 | 29669, // VFMADDSUB231PHZrkz |
| 83034 | 29674, // VFMADDSUB231PSYm |
| 83035 | 29678, // VFMADDSUB231PSYr |
| 83036 | 29682, // VFMADDSUB231PSZ128m |
| 83037 | 29686, // VFMADDSUB231PSZ128mb |
| 83038 | 29690, // VFMADDSUB231PSZ128mbk |
| 83039 | 29695, // VFMADDSUB231PSZ128mbkz |
| 83040 | 29700, // VFMADDSUB231PSZ128mk |
| 83041 | 29705, // VFMADDSUB231PSZ128mkz |
| 83042 | 29710, // VFMADDSUB231PSZ128r |
| 83043 | 29714, // VFMADDSUB231PSZ128rk |
| 83044 | 29719, // VFMADDSUB231PSZ128rkz |
| 83045 | 29724, // VFMADDSUB231PSZ256m |
| 83046 | 29728, // VFMADDSUB231PSZ256mb |
| 83047 | 29732, // VFMADDSUB231PSZ256mbk |
| 83048 | 29737, // VFMADDSUB231PSZ256mbkz |
| 83049 | 29742, // VFMADDSUB231PSZ256mk |
| 83050 | 29747, // VFMADDSUB231PSZ256mkz |
| 83051 | 29752, // VFMADDSUB231PSZ256r |
| 83052 | 29756, // VFMADDSUB231PSZ256rk |
| 83053 | 29761, // VFMADDSUB231PSZ256rkz |
| 83054 | 29766, // VFMADDSUB231PSZm |
| 83055 | 29770, // VFMADDSUB231PSZmb |
| 83056 | 29774, // VFMADDSUB231PSZmbk |
| 83057 | 29779, // VFMADDSUB231PSZmbkz |
| 83058 | 29784, // VFMADDSUB231PSZmk |
| 83059 | 29789, // VFMADDSUB231PSZmkz |
| 83060 | 29794, // VFMADDSUB231PSZr |
| 83061 | 29798, // VFMADDSUB231PSZrb |
| 83062 | 29803, // VFMADDSUB231PSZrbk |
| 83063 | 29809, // VFMADDSUB231PSZrbkz |
| 83064 | 29815, // VFMADDSUB231PSZrk |
| 83065 | 29820, // VFMADDSUB231PSZrkz |
| 83066 | 29825, // VFMADDSUB231PSm |
| 83067 | 29829, // VFMADDSUB231PSr |
| 83068 | 29833, // VFMADDSUBPD4Ymr |
| 83069 | 29837, // VFMADDSUBPD4Yrm |
| 83070 | 29841, // VFMADDSUBPD4Yrr |
| 83071 | 29845, // VFMADDSUBPD4Yrr_REV |
| 83072 | 29849, // VFMADDSUBPD4mr |
| 83073 | 29853, // VFMADDSUBPD4rm |
| 83074 | 29857, // VFMADDSUBPD4rr |
| 83075 | 29861, // VFMADDSUBPD4rr_REV |
| 83076 | 29865, // VFMADDSUBPS4Ymr |
| 83077 | 29869, // VFMADDSUBPS4Yrm |
| 83078 | 29873, // VFMADDSUBPS4Yrr |
| 83079 | 29877, // VFMADDSUBPS4Yrr_REV |
| 83080 | 29881, // VFMADDSUBPS4mr |
| 83081 | 29885, // VFMADDSUBPS4rm |
| 83082 | 29889, // VFMADDSUBPS4rr |
| 83083 | 29893, // VFMADDSUBPS4rr_REV |
| 83084 | 29897, // VFMSUB132BF16Z128m |
| 83085 | 29901, // VFMSUB132BF16Z128mb |
| 83086 | 29905, // VFMSUB132BF16Z128mbk |
| 83087 | 29910, // VFMSUB132BF16Z128mbkz |
| 83088 | 29915, // VFMSUB132BF16Z128mk |
| 83089 | 29920, // VFMSUB132BF16Z128mkz |
| 83090 | 29925, // VFMSUB132BF16Z128r |
| 83091 | 29929, // VFMSUB132BF16Z128rk |
| 83092 | 29934, // VFMSUB132BF16Z128rkz |
| 83093 | 29939, // VFMSUB132BF16Z256m |
| 83094 | 29943, // VFMSUB132BF16Z256mb |
| 83095 | 29947, // VFMSUB132BF16Z256mbk |
| 83096 | 29952, // VFMSUB132BF16Z256mbkz |
| 83097 | 29957, // VFMSUB132BF16Z256mk |
| 83098 | 29962, // VFMSUB132BF16Z256mkz |
| 83099 | 29967, // VFMSUB132BF16Z256r |
| 83100 | 29971, // VFMSUB132BF16Z256rk |
| 83101 | 29976, // VFMSUB132BF16Z256rkz |
| 83102 | 29981, // VFMSUB132BF16Zm |
| 83103 | 29985, // VFMSUB132BF16Zmb |
| 83104 | 29989, // VFMSUB132BF16Zmbk |
| 83105 | 29994, // VFMSUB132BF16Zmbkz |
| 83106 | 29999, // VFMSUB132BF16Zmk |
| 83107 | 30004, // VFMSUB132BF16Zmkz |
| 83108 | 30009, // VFMSUB132BF16Zr |
| 83109 | 30013, // VFMSUB132BF16Zrk |
| 83110 | 30018, // VFMSUB132BF16Zrkz |
| 83111 | 30023, // VFMSUB132PDYm |
| 83112 | 30027, // VFMSUB132PDYr |
| 83113 | 30031, // VFMSUB132PDZ128m |
| 83114 | 30035, // VFMSUB132PDZ128mb |
| 83115 | 30039, // VFMSUB132PDZ128mbk |
| 83116 | 30044, // VFMSUB132PDZ128mbkz |
| 83117 | 30049, // VFMSUB132PDZ128mk |
| 83118 | 30054, // VFMSUB132PDZ128mkz |
| 83119 | 30059, // VFMSUB132PDZ128r |
| 83120 | 30063, // VFMSUB132PDZ128rk |
| 83121 | 30068, // VFMSUB132PDZ128rkz |
| 83122 | 30073, // VFMSUB132PDZ256m |
| 83123 | 30077, // VFMSUB132PDZ256mb |
| 83124 | 30081, // VFMSUB132PDZ256mbk |
| 83125 | 30086, // VFMSUB132PDZ256mbkz |
| 83126 | 30091, // VFMSUB132PDZ256mk |
| 83127 | 30096, // VFMSUB132PDZ256mkz |
| 83128 | 30101, // VFMSUB132PDZ256r |
| 83129 | 30105, // VFMSUB132PDZ256rk |
| 83130 | 30110, // VFMSUB132PDZ256rkz |
| 83131 | 30115, // VFMSUB132PDZm |
| 83132 | 30119, // VFMSUB132PDZmb |
| 83133 | 30123, // VFMSUB132PDZmbk |
| 83134 | 30128, // VFMSUB132PDZmbkz |
| 83135 | 30133, // VFMSUB132PDZmk |
| 83136 | 30138, // VFMSUB132PDZmkz |
| 83137 | 30143, // VFMSUB132PDZr |
| 83138 | 30147, // VFMSUB132PDZrb |
| 83139 | 30152, // VFMSUB132PDZrbk |
| 83140 | 30158, // VFMSUB132PDZrbkz |
| 83141 | 30164, // VFMSUB132PDZrk |
| 83142 | 30169, // VFMSUB132PDZrkz |
| 83143 | 30174, // VFMSUB132PDm |
| 83144 | 30178, // VFMSUB132PDr |
| 83145 | 30182, // VFMSUB132PHZ128m |
| 83146 | 30186, // VFMSUB132PHZ128mb |
| 83147 | 30190, // VFMSUB132PHZ128mbk |
| 83148 | 30195, // VFMSUB132PHZ128mbkz |
| 83149 | 30200, // VFMSUB132PHZ128mk |
| 83150 | 30205, // VFMSUB132PHZ128mkz |
| 83151 | 30210, // VFMSUB132PHZ128r |
| 83152 | 30214, // VFMSUB132PHZ128rk |
| 83153 | 30219, // VFMSUB132PHZ128rkz |
| 83154 | 30224, // VFMSUB132PHZ256m |
| 83155 | 30228, // VFMSUB132PHZ256mb |
| 83156 | 30232, // VFMSUB132PHZ256mbk |
| 83157 | 30237, // VFMSUB132PHZ256mbkz |
| 83158 | 30242, // VFMSUB132PHZ256mk |
| 83159 | 30247, // VFMSUB132PHZ256mkz |
| 83160 | 30252, // VFMSUB132PHZ256r |
| 83161 | 30256, // VFMSUB132PHZ256rk |
| 83162 | 30261, // VFMSUB132PHZ256rkz |
| 83163 | 30266, // VFMSUB132PHZm |
| 83164 | 30270, // VFMSUB132PHZmb |
| 83165 | 30274, // VFMSUB132PHZmbk |
| 83166 | 30279, // VFMSUB132PHZmbkz |
| 83167 | 30284, // VFMSUB132PHZmk |
| 83168 | 30289, // VFMSUB132PHZmkz |
| 83169 | 30294, // VFMSUB132PHZr |
| 83170 | 30298, // VFMSUB132PHZrb |
| 83171 | 30303, // VFMSUB132PHZrbk |
| 83172 | 30309, // VFMSUB132PHZrbkz |
| 83173 | 30315, // VFMSUB132PHZrk |
| 83174 | 30320, // VFMSUB132PHZrkz |
| 83175 | 30325, // VFMSUB132PSYm |
| 83176 | 30329, // VFMSUB132PSYr |
| 83177 | 30333, // VFMSUB132PSZ128m |
| 83178 | 30337, // VFMSUB132PSZ128mb |
| 83179 | 30341, // VFMSUB132PSZ128mbk |
| 83180 | 30346, // VFMSUB132PSZ128mbkz |
| 83181 | 30351, // VFMSUB132PSZ128mk |
| 83182 | 30356, // VFMSUB132PSZ128mkz |
| 83183 | 30361, // VFMSUB132PSZ128r |
| 83184 | 30365, // VFMSUB132PSZ128rk |
| 83185 | 30370, // VFMSUB132PSZ128rkz |
| 83186 | 30375, // VFMSUB132PSZ256m |
| 83187 | 30379, // VFMSUB132PSZ256mb |
| 83188 | 30383, // VFMSUB132PSZ256mbk |
| 83189 | 30388, // VFMSUB132PSZ256mbkz |
| 83190 | 30393, // VFMSUB132PSZ256mk |
| 83191 | 30398, // VFMSUB132PSZ256mkz |
| 83192 | 30403, // VFMSUB132PSZ256r |
| 83193 | 30407, // VFMSUB132PSZ256rk |
| 83194 | 30412, // VFMSUB132PSZ256rkz |
| 83195 | 30417, // VFMSUB132PSZm |
| 83196 | 30421, // VFMSUB132PSZmb |
| 83197 | 30425, // VFMSUB132PSZmbk |
| 83198 | 30430, // VFMSUB132PSZmbkz |
| 83199 | 30435, // VFMSUB132PSZmk |
| 83200 | 30440, // VFMSUB132PSZmkz |
| 83201 | 30445, // VFMSUB132PSZr |
| 83202 | 30449, // VFMSUB132PSZrb |
| 83203 | 30454, // VFMSUB132PSZrbk |
| 83204 | 30460, // VFMSUB132PSZrbkz |
| 83205 | 30466, // VFMSUB132PSZrk |
| 83206 | 30471, // VFMSUB132PSZrkz |
| 83207 | 30476, // VFMSUB132PSm |
| 83208 | 30480, // VFMSUB132PSr |
| 83209 | 30484, // VFMSUB132SDZm |
| 83210 | 30488, // VFMSUB132SDZm_Int |
| 83211 | 30492, // VFMSUB132SDZmk_Int |
| 83212 | 30497, // VFMSUB132SDZmkz_Int |
| 83213 | 30502, // VFMSUB132SDZr |
| 83214 | 30506, // VFMSUB132SDZr_Int |
| 83215 | 30510, // VFMSUB132SDZrb |
| 83216 | 30515, // VFMSUB132SDZrb_Int |
| 83217 | 30520, // VFMSUB132SDZrbk_Int |
| 83218 | 30526, // VFMSUB132SDZrbkz_Int |
| 83219 | 30532, // VFMSUB132SDZrk_Int |
| 83220 | 30537, // VFMSUB132SDZrkz_Int |
| 83221 | 30542, // VFMSUB132SDm |
| 83222 | 30546, // VFMSUB132SDm_Int |
| 83223 | 30550, // VFMSUB132SDr |
| 83224 | 30554, // VFMSUB132SDr_Int |
| 83225 | 30558, // VFMSUB132SHZm |
| 83226 | 30562, // VFMSUB132SHZm_Int |
| 83227 | 30566, // VFMSUB132SHZmk_Int |
| 83228 | 30571, // VFMSUB132SHZmkz_Int |
| 83229 | 30576, // VFMSUB132SHZr |
| 83230 | 30580, // VFMSUB132SHZr_Int |
| 83231 | 30584, // VFMSUB132SHZrb |
| 83232 | 30589, // VFMSUB132SHZrb_Int |
| 83233 | 30594, // VFMSUB132SHZrbk_Int |
| 83234 | 30600, // VFMSUB132SHZrbkz_Int |
| 83235 | 30606, // VFMSUB132SHZrk_Int |
| 83236 | 30611, // VFMSUB132SHZrkz_Int |
| 83237 | 30616, // VFMSUB132SSZm |
| 83238 | 30620, // VFMSUB132SSZm_Int |
| 83239 | 30624, // VFMSUB132SSZmk_Int |
| 83240 | 30629, // VFMSUB132SSZmkz_Int |
| 83241 | 30634, // VFMSUB132SSZr |
| 83242 | 30638, // VFMSUB132SSZr_Int |
| 83243 | 30642, // VFMSUB132SSZrb |
| 83244 | 30647, // VFMSUB132SSZrb_Int |
| 83245 | 30652, // VFMSUB132SSZrbk_Int |
| 83246 | 30658, // VFMSUB132SSZrbkz_Int |
| 83247 | 30664, // VFMSUB132SSZrk_Int |
| 83248 | 30669, // VFMSUB132SSZrkz_Int |
| 83249 | 30674, // VFMSUB132SSm |
| 83250 | 30678, // VFMSUB132SSm_Int |
| 83251 | 30682, // VFMSUB132SSr |
| 83252 | 30686, // VFMSUB132SSr_Int |
| 83253 | 30690, // VFMSUB213BF16Z128m |
| 83254 | 30694, // VFMSUB213BF16Z128mb |
| 83255 | 30698, // VFMSUB213BF16Z128mbk |
| 83256 | 30703, // VFMSUB213BF16Z128mbkz |
| 83257 | 30708, // VFMSUB213BF16Z128mk |
| 83258 | 30713, // VFMSUB213BF16Z128mkz |
| 83259 | 30718, // VFMSUB213BF16Z128r |
| 83260 | 30722, // VFMSUB213BF16Z128rk |
| 83261 | 30727, // VFMSUB213BF16Z128rkz |
| 83262 | 30732, // VFMSUB213BF16Z256m |
| 83263 | 30736, // VFMSUB213BF16Z256mb |
| 83264 | 30740, // VFMSUB213BF16Z256mbk |
| 83265 | 30745, // VFMSUB213BF16Z256mbkz |
| 83266 | 30750, // VFMSUB213BF16Z256mk |
| 83267 | 30755, // VFMSUB213BF16Z256mkz |
| 83268 | 30760, // VFMSUB213BF16Z256r |
| 83269 | 30764, // VFMSUB213BF16Z256rk |
| 83270 | 30769, // VFMSUB213BF16Z256rkz |
| 83271 | 30774, // VFMSUB213BF16Zm |
| 83272 | 30778, // VFMSUB213BF16Zmb |
| 83273 | 30782, // VFMSUB213BF16Zmbk |
| 83274 | 30787, // VFMSUB213BF16Zmbkz |
| 83275 | 30792, // VFMSUB213BF16Zmk |
| 83276 | 30797, // VFMSUB213BF16Zmkz |
| 83277 | 30802, // VFMSUB213BF16Zr |
| 83278 | 30806, // VFMSUB213BF16Zrk |
| 83279 | 30811, // VFMSUB213BF16Zrkz |
| 83280 | 30816, // VFMSUB213PDYm |
| 83281 | 30820, // VFMSUB213PDYr |
| 83282 | 30824, // VFMSUB213PDZ128m |
| 83283 | 30828, // VFMSUB213PDZ128mb |
| 83284 | 30832, // VFMSUB213PDZ128mbk |
| 83285 | 30837, // VFMSUB213PDZ128mbkz |
| 83286 | 30842, // VFMSUB213PDZ128mk |
| 83287 | 30847, // VFMSUB213PDZ128mkz |
| 83288 | 30852, // VFMSUB213PDZ128r |
| 83289 | 30856, // VFMSUB213PDZ128rk |
| 83290 | 30861, // VFMSUB213PDZ128rkz |
| 83291 | 30866, // VFMSUB213PDZ256m |
| 83292 | 30870, // VFMSUB213PDZ256mb |
| 83293 | 30874, // VFMSUB213PDZ256mbk |
| 83294 | 30879, // VFMSUB213PDZ256mbkz |
| 83295 | 30884, // VFMSUB213PDZ256mk |
| 83296 | 30889, // VFMSUB213PDZ256mkz |
| 83297 | 30894, // VFMSUB213PDZ256r |
| 83298 | 30898, // VFMSUB213PDZ256rk |
| 83299 | 30903, // VFMSUB213PDZ256rkz |
| 83300 | 30908, // VFMSUB213PDZm |
| 83301 | 30912, // VFMSUB213PDZmb |
| 83302 | 30916, // VFMSUB213PDZmbk |
| 83303 | 30921, // VFMSUB213PDZmbkz |
| 83304 | 30926, // VFMSUB213PDZmk |
| 83305 | 30931, // VFMSUB213PDZmkz |
| 83306 | 30936, // VFMSUB213PDZr |
| 83307 | 30940, // VFMSUB213PDZrb |
| 83308 | 30945, // VFMSUB213PDZrbk |
| 83309 | 30951, // VFMSUB213PDZrbkz |
| 83310 | 30957, // VFMSUB213PDZrk |
| 83311 | 30962, // VFMSUB213PDZrkz |
| 83312 | 30967, // VFMSUB213PDm |
| 83313 | 30971, // VFMSUB213PDr |
| 83314 | 30975, // VFMSUB213PHZ128m |
| 83315 | 30979, // VFMSUB213PHZ128mb |
| 83316 | 30983, // VFMSUB213PHZ128mbk |
| 83317 | 30988, // VFMSUB213PHZ128mbkz |
| 83318 | 30993, // VFMSUB213PHZ128mk |
| 83319 | 30998, // VFMSUB213PHZ128mkz |
| 83320 | 31003, // VFMSUB213PHZ128r |
| 83321 | 31007, // VFMSUB213PHZ128rk |
| 83322 | 31012, // VFMSUB213PHZ128rkz |
| 83323 | 31017, // VFMSUB213PHZ256m |
| 83324 | 31021, // VFMSUB213PHZ256mb |
| 83325 | 31025, // VFMSUB213PHZ256mbk |
| 83326 | 31030, // VFMSUB213PHZ256mbkz |
| 83327 | 31035, // VFMSUB213PHZ256mk |
| 83328 | 31040, // VFMSUB213PHZ256mkz |
| 83329 | 31045, // VFMSUB213PHZ256r |
| 83330 | 31049, // VFMSUB213PHZ256rk |
| 83331 | 31054, // VFMSUB213PHZ256rkz |
| 83332 | 31059, // VFMSUB213PHZm |
| 83333 | 31063, // VFMSUB213PHZmb |
| 83334 | 31067, // VFMSUB213PHZmbk |
| 83335 | 31072, // VFMSUB213PHZmbkz |
| 83336 | 31077, // VFMSUB213PHZmk |
| 83337 | 31082, // VFMSUB213PHZmkz |
| 83338 | 31087, // VFMSUB213PHZr |
| 83339 | 31091, // VFMSUB213PHZrb |
| 83340 | 31096, // VFMSUB213PHZrbk |
| 83341 | 31102, // VFMSUB213PHZrbkz |
| 83342 | 31108, // VFMSUB213PHZrk |
| 83343 | 31113, // VFMSUB213PHZrkz |
| 83344 | 31118, // VFMSUB213PSYm |
| 83345 | 31122, // VFMSUB213PSYr |
| 83346 | 31126, // VFMSUB213PSZ128m |
| 83347 | 31130, // VFMSUB213PSZ128mb |
| 83348 | 31134, // VFMSUB213PSZ128mbk |
| 83349 | 31139, // VFMSUB213PSZ128mbkz |
| 83350 | 31144, // VFMSUB213PSZ128mk |
| 83351 | 31149, // VFMSUB213PSZ128mkz |
| 83352 | 31154, // VFMSUB213PSZ128r |
| 83353 | 31158, // VFMSUB213PSZ128rk |
| 83354 | 31163, // VFMSUB213PSZ128rkz |
| 83355 | 31168, // VFMSUB213PSZ256m |
| 83356 | 31172, // VFMSUB213PSZ256mb |
| 83357 | 31176, // VFMSUB213PSZ256mbk |
| 83358 | 31181, // VFMSUB213PSZ256mbkz |
| 83359 | 31186, // VFMSUB213PSZ256mk |
| 83360 | 31191, // VFMSUB213PSZ256mkz |
| 83361 | 31196, // VFMSUB213PSZ256r |
| 83362 | 31200, // VFMSUB213PSZ256rk |
| 83363 | 31205, // VFMSUB213PSZ256rkz |
| 83364 | 31210, // VFMSUB213PSZm |
| 83365 | 31214, // VFMSUB213PSZmb |
| 83366 | 31218, // VFMSUB213PSZmbk |
| 83367 | 31223, // VFMSUB213PSZmbkz |
| 83368 | 31228, // VFMSUB213PSZmk |
| 83369 | 31233, // VFMSUB213PSZmkz |
| 83370 | 31238, // VFMSUB213PSZr |
| 83371 | 31242, // VFMSUB213PSZrb |
| 83372 | 31247, // VFMSUB213PSZrbk |
| 83373 | 31253, // VFMSUB213PSZrbkz |
| 83374 | 31259, // VFMSUB213PSZrk |
| 83375 | 31264, // VFMSUB213PSZrkz |
| 83376 | 31269, // VFMSUB213PSm |
| 83377 | 31273, // VFMSUB213PSr |
| 83378 | 31277, // VFMSUB213SDZm |
| 83379 | 31281, // VFMSUB213SDZm_Int |
| 83380 | 31285, // VFMSUB213SDZmk_Int |
| 83381 | 31290, // VFMSUB213SDZmkz_Int |
| 83382 | 31295, // VFMSUB213SDZr |
| 83383 | 31299, // VFMSUB213SDZr_Int |
| 83384 | 31303, // VFMSUB213SDZrb |
| 83385 | 31308, // VFMSUB213SDZrb_Int |
| 83386 | 31313, // VFMSUB213SDZrbk_Int |
| 83387 | 31319, // VFMSUB213SDZrbkz_Int |
| 83388 | 31325, // VFMSUB213SDZrk_Int |
| 83389 | 31330, // VFMSUB213SDZrkz_Int |
| 83390 | 31335, // VFMSUB213SDm |
| 83391 | 31339, // VFMSUB213SDm_Int |
| 83392 | 31343, // VFMSUB213SDr |
| 83393 | 31347, // VFMSUB213SDr_Int |
| 83394 | 31351, // VFMSUB213SHZm |
| 83395 | 31355, // VFMSUB213SHZm_Int |
| 83396 | 31359, // VFMSUB213SHZmk_Int |
| 83397 | 31364, // VFMSUB213SHZmkz_Int |
| 83398 | 31369, // VFMSUB213SHZr |
| 83399 | 31373, // VFMSUB213SHZr_Int |
| 83400 | 31377, // VFMSUB213SHZrb |
| 83401 | 31382, // VFMSUB213SHZrb_Int |
| 83402 | 31387, // VFMSUB213SHZrbk_Int |
| 83403 | 31393, // VFMSUB213SHZrbkz_Int |
| 83404 | 31399, // VFMSUB213SHZrk_Int |
| 83405 | 31404, // VFMSUB213SHZrkz_Int |
| 83406 | 31409, // VFMSUB213SSZm |
| 83407 | 31413, // VFMSUB213SSZm_Int |
| 83408 | 31417, // VFMSUB213SSZmk_Int |
| 83409 | 31422, // VFMSUB213SSZmkz_Int |
| 83410 | 31427, // VFMSUB213SSZr |
| 83411 | 31431, // VFMSUB213SSZr_Int |
| 83412 | 31435, // VFMSUB213SSZrb |
| 83413 | 31440, // VFMSUB213SSZrb_Int |
| 83414 | 31445, // VFMSUB213SSZrbk_Int |
| 83415 | 31451, // VFMSUB213SSZrbkz_Int |
| 83416 | 31457, // VFMSUB213SSZrk_Int |
| 83417 | 31462, // VFMSUB213SSZrkz_Int |
| 83418 | 31467, // VFMSUB213SSm |
| 83419 | 31471, // VFMSUB213SSm_Int |
| 83420 | 31475, // VFMSUB213SSr |
| 83421 | 31479, // VFMSUB213SSr_Int |
| 83422 | 31483, // VFMSUB231BF16Z128m |
| 83423 | 31487, // VFMSUB231BF16Z128mb |
| 83424 | 31491, // VFMSUB231BF16Z128mbk |
| 83425 | 31496, // VFMSUB231BF16Z128mbkz |
| 83426 | 31501, // VFMSUB231BF16Z128mk |
| 83427 | 31506, // VFMSUB231BF16Z128mkz |
| 83428 | 31511, // VFMSUB231BF16Z128r |
| 83429 | 31515, // VFMSUB231BF16Z128rk |
| 83430 | 31520, // VFMSUB231BF16Z128rkz |
| 83431 | 31525, // VFMSUB231BF16Z256m |
| 83432 | 31529, // VFMSUB231BF16Z256mb |
| 83433 | 31533, // VFMSUB231BF16Z256mbk |
| 83434 | 31538, // VFMSUB231BF16Z256mbkz |
| 83435 | 31543, // VFMSUB231BF16Z256mk |
| 83436 | 31548, // VFMSUB231BF16Z256mkz |
| 83437 | 31553, // VFMSUB231BF16Z256r |
| 83438 | 31557, // VFMSUB231BF16Z256rk |
| 83439 | 31562, // VFMSUB231BF16Z256rkz |
| 83440 | 31567, // VFMSUB231BF16Zm |
| 83441 | 31571, // VFMSUB231BF16Zmb |
| 83442 | 31575, // VFMSUB231BF16Zmbk |
| 83443 | 31580, // VFMSUB231BF16Zmbkz |
| 83444 | 31585, // VFMSUB231BF16Zmk |
| 83445 | 31590, // VFMSUB231BF16Zmkz |
| 83446 | 31595, // VFMSUB231BF16Zr |
| 83447 | 31599, // VFMSUB231BF16Zrk |
| 83448 | 31604, // VFMSUB231BF16Zrkz |
| 83449 | 31609, // VFMSUB231PDYm |
| 83450 | 31613, // VFMSUB231PDYr |
| 83451 | 31617, // VFMSUB231PDZ128m |
| 83452 | 31621, // VFMSUB231PDZ128mb |
| 83453 | 31625, // VFMSUB231PDZ128mbk |
| 83454 | 31630, // VFMSUB231PDZ128mbkz |
| 83455 | 31635, // VFMSUB231PDZ128mk |
| 83456 | 31640, // VFMSUB231PDZ128mkz |
| 83457 | 31645, // VFMSUB231PDZ128r |
| 83458 | 31649, // VFMSUB231PDZ128rk |
| 83459 | 31654, // VFMSUB231PDZ128rkz |
| 83460 | 31659, // VFMSUB231PDZ256m |
| 83461 | 31663, // VFMSUB231PDZ256mb |
| 83462 | 31667, // VFMSUB231PDZ256mbk |
| 83463 | 31672, // VFMSUB231PDZ256mbkz |
| 83464 | 31677, // VFMSUB231PDZ256mk |
| 83465 | 31682, // VFMSUB231PDZ256mkz |
| 83466 | 31687, // VFMSUB231PDZ256r |
| 83467 | 31691, // VFMSUB231PDZ256rk |
| 83468 | 31696, // VFMSUB231PDZ256rkz |
| 83469 | 31701, // VFMSUB231PDZm |
| 83470 | 31705, // VFMSUB231PDZmb |
| 83471 | 31709, // VFMSUB231PDZmbk |
| 83472 | 31714, // VFMSUB231PDZmbkz |
| 83473 | 31719, // VFMSUB231PDZmk |
| 83474 | 31724, // VFMSUB231PDZmkz |
| 83475 | 31729, // VFMSUB231PDZr |
| 83476 | 31733, // VFMSUB231PDZrb |
| 83477 | 31738, // VFMSUB231PDZrbk |
| 83478 | 31744, // VFMSUB231PDZrbkz |
| 83479 | 31750, // VFMSUB231PDZrk |
| 83480 | 31755, // VFMSUB231PDZrkz |
| 83481 | 31760, // VFMSUB231PDm |
| 83482 | 31764, // VFMSUB231PDr |
| 83483 | 31768, // VFMSUB231PHZ128m |
| 83484 | 31772, // VFMSUB231PHZ128mb |
| 83485 | 31776, // VFMSUB231PHZ128mbk |
| 83486 | 31781, // VFMSUB231PHZ128mbkz |
| 83487 | 31786, // VFMSUB231PHZ128mk |
| 83488 | 31791, // VFMSUB231PHZ128mkz |
| 83489 | 31796, // VFMSUB231PHZ128r |
| 83490 | 31800, // VFMSUB231PHZ128rk |
| 83491 | 31805, // VFMSUB231PHZ128rkz |
| 83492 | 31810, // VFMSUB231PHZ256m |
| 83493 | 31814, // VFMSUB231PHZ256mb |
| 83494 | 31818, // VFMSUB231PHZ256mbk |
| 83495 | 31823, // VFMSUB231PHZ256mbkz |
| 83496 | 31828, // VFMSUB231PHZ256mk |
| 83497 | 31833, // VFMSUB231PHZ256mkz |
| 83498 | 31838, // VFMSUB231PHZ256r |
| 83499 | 31842, // VFMSUB231PHZ256rk |
| 83500 | 31847, // VFMSUB231PHZ256rkz |
| 83501 | 31852, // VFMSUB231PHZm |
| 83502 | 31856, // VFMSUB231PHZmb |
| 83503 | 31860, // VFMSUB231PHZmbk |
| 83504 | 31865, // VFMSUB231PHZmbkz |
| 83505 | 31870, // VFMSUB231PHZmk |
| 83506 | 31875, // VFMSUB231PHZmkz |
| 83507 | 31880, // VFMSUB231PHZr |
| 83508 | 31884, // VFMSUB231PHZrb |
| 83509 | 31889, // VFMSUB231PHZrbk |
| 83510 | 31895, // VFMSUB231PHZrbkz |
| 83511 | 31901, // VFMSUB231PHZrk |
| 83512 | 31906, // VFMSUB231PHZrkz |
| 83513 | 31911, // VFMSUB231PSYm |
| 83514 | 31915, // VFMSUB231PSYr |
| 83515 | 31919, // VFMSUB231PSZ128m |
| 83516 | 31923, // VFMSUB231PSZ128mb |
| 83517 | 31927, // VFMSUB231PSZ128mbk |
| 83518 | 31932, // VFMSUB231PSZ128mbkz |
| 83519 | 31937, // VFMSUB231PSZ128mk |
| 83520 | 31942, // VFMSUB231PSZ128mkz |
| 83521 | 31947, // VFMSUB231PSZ128r |
| 83522 | 31951, // VFMSUB231PSZ128rk |
| 83523 | 31956, // VFMSUB231PSZ128rkz |
| 83524 | 31961, // VFMSUB231PSZ256m |
| 83525 | 31965, // VFMSUB231PSZ256mb |
| 83526 | 31969, // VFMSUB231PSZ256mbk |
| 83527 | 31974, // VFMSUB231PSZ256mbkz |
| 83528 | 31979, // VFMSUB231PSZ256mk |
| 83529 | 31984, // VFMSUB231PSZ256mkz |
| 83530 | 31989, // VFMSUB231PSZ256r |
| 83531 | 31993, // VFMSUB231PSZ256rk |
| 83532 | 31998, // VFMSUB231PSZ256rkz |
| 83533 | 32003, // VFMSUB231PSZm |
| 83534 | 32007, // VFMSUB231PSZmb |
| 83535 | 32011, // VFMSUB231PSZmbk |
| 83536 | 32016, // VFMSUB231PSZmbkz |
| 83537 | 32021, // VFMSUB231PSZmk |
| 83538 | 32026, // VFMSUB231PSZmkz |
| 83539 | 32031, // VFMSUB231PSZr |
| 83540 | 32035, // VFMSUB231PSZrb |
| 83541 | 32040, // VFMSUB231PSZrbk |
| 83542 | 32046, // VFMSUB231PSZrbkz |
| 83543 | 32052, // VFMSUB231PSZrk |
| 83544 | 32057, // VFMSUB231PSZrkz |
| 83545 | 32062, // VFMSUB231PSm |
| 83546 | 32066, // VFMSUB231PSr |
| 83547 | 32070, // VFMSUB231SDZm |
| 83548 | 32074, // VFMSUB231SDZm_Int |
| 83549 | 32078, // VFMSUB231SDZmk_Int |
| 83550 | 32083, // VFMSUB231SDZmkz_Int |
| 83551 | 32088, // VFMSUB231SDZr |
| 83552 | 32092, // VFMSUB231SDZr_Int |
| 83553 | 32096, // VFMSUB231SDZrb |
| 83554 | 32101, // VFMSUB231SDZrb_Int |
| 83555 | 32106, // VFMSUB231SDZrbk_Int |
| 83556 | 32112, // VFMSUB231SDZrbkz_Int |
| 83557 | 32118, // VFMSUB231SDZrk_Int |
| 83558 | 32123, // VFMSUB231SDZrkz_Int |
| 83559 | 32128, // VFMSUB231SDm |
| 83560 | 32132, // VFMSUB231SDm_Int |
| 83561 | 32136, // VFMSUB231SDr |
| 83562 | 32140, // VFMSUB231SDr_Int |
| 83563 | 32144, // VFMSUB231SHZm |
| 83564 | 32148, // VFMSUB231SHZm_Int |
| 83565 | 32152, // VFMSUB231SHZmk_Int |
| 83566 | 32157, // VFMSUB231SHZmkz_Int |
| 83567 | 32162, // VFMSUB231SHZr |
| 83568 | 32166, // VFMSUB231SHZr_Int |
| 83569 | 32170, // VFMSUB231SHZrb |
| 83570 | 32175, // VFMSUB231SHZrb_Int |
| 83571 | 32180, // VFMSUB231SHZrbk_Int |
| 83572 | 32186, // VFMSUB231SHZrbkz_Int |
| 83573 | 32192, // VFMSUB231SHZrk_Int |
| 83574 | 32197, // VFMSUB231SHZrkz_Int |
| 83575 | 32202, // VFMSUB231SSZm |
| 83576 | 32206, // VFMSUB231SSZm_Int |
| 83577 | 32210, // VFMSUB231SSZmk_Int |
| 83578 | 32215, // VFMSUB231SSZmkz_Int |
| 83579 | 32220, // VFMSUB231SSZr |
| 83580 | 32224, // VFMSUB231SSZr_Int |
| 83581 | 32228, // VFMSUB231SSZrb |
| 83582 | 32233, // VFMSUB231SSZrb_Int |
| 83583 | 32238, // VFMSUB231SSZrbk_Int |
| 83584 | 32244, // VFMSUB231SSZrbkz_Int |
| 83585 | 32250, // VFMSUB231SSZrk_Int |
| 83586 | 32255, // VFMSUB231SSZrkz_Int |
| 83587 | 32260, // VFMSUB231SSm |
| 83588 | 32264, // VFMSUB231SSm_Int |
| 83589 | 32268, // VFMSUB231SSr |
| 83590 | 32272, // VFMSUB231SSr_Int |
| 83591 | 32276, // VFMSUBADD132PDYm |
| 83592 | 32280, // VFMSUBADD132PDYr |
| 83593 | 32284, // VFMSUBADD132PDZ128m |
| 83594 | 32288, // VFMSUBADD132PDZ128mb |
| 83595 | 32292, // VFMSUBADD132PDZ128mbk |
| 83596 | 32297, // VFMSUBADD132PDZ128mbkz |
| 83597 | 32302, // VFMSUBADD132PDZ128mk |
| 83598 | 32307, // VFMSUBADD132PDZ128mkz |
| 83599 | 32312, // VFMSUBADD132PDZ128r |
| 83600 | 32316, // VFMSUBADD132PDZ128rk |
| 83601 | 32321, // VFMSUBADD132PDZ128rkz |
| 83602 | 32326, // VFMSUBADD132PDZ256m |
| 83603 | 32330, // VFMSUBADD132PDZ256mb |
| 83604 | 32334, // VFMSUBADD132PDZ256mbk |
| 83605 | 32339, // VFMSUBADD132PDZ256mbkz |
| 83606 | 32344, // VFMSUBADD132PDZ256mk |
| 83607 | 32349, // VFMSUBADD132PDZ256mkz |
| 83608 | 32354, // VFMSUBADD132PDZ256r |
| 83609 | 32358, // VFMSUBADD132PDZ256rk |
| 83610 | 32363, // VFMSUBADD132PDZ256rkz |
| 83611 | 32368, // VFMSUBADD132PDZm |
| 83612 | 32372, // VFMSUBADD132PDZmb |
| 83613 | 32376, // VFMSUBADD132PDZmbk |
| 83614 | 32381, // VFMSUBADD132PDZmbkz |
| 83615 | 32386, // VFMSUBADD132PDZmk |
| 83616 | 32391, // VFMSUBADD132PDZmkz |
| 83617 | 32396, // VFMSUBADD132PDZr |
| 83618 | 32400, // VFMSUBADD132PDZrb |
| 83619 | 32405, // VFMSUBADD132PDZrbk |
| 83620 | 32411, // VFMSUBADD132PDZrbkz |
| 83621 | 32417, // VFMSUBADD132PDZrk |
| 83622 | 32422, // VFMSUBADD132PDZrkz |
| 83623 | 32427, // VFMSUBADD132PDm |
| 83624 | 32431, // VFMSUBADD132PDr |
| 83625 | 32435, // VFMSUBADD132PHZ128m |
| 83626 | 32439, // VFMSUBADD132PHZ128mb |
| 83627 | 32443, // VFMSUBADD132PHZ128mbk |
| 83628 | 32448, // VFMSUBADD132PHZ128mbkz |
| 83629 | 32453, // VFMSUBADD132PHZ128mk |
| 83630 | 32458, // VFMSUBADD132PHZ128mkz |
| 83631 | 32463, // VFMSUBADD132PHZ128r |
| 83632 | 32467, // VFMSUBADD132PHZ128rk |
| 83633 | 32472, // VFMSUBADD132PHZ128rkz |
| 83634 | 32477, // VFMSUBADD132PHZ256m |
| 83635 | 32481, // VFMSUBADD132PHZ256mb |
| 83636 | 32485, // VFMSUBADD132PHZ256mbk |
| 83637 | 32490, // VFMSUBADD132PHZ256mbkz |
| 83638 | 32495, // VFMSUBADD132PHZ256mk |
| 83639 | 32500, // VFMSUBADD132PHZ256mkz |
| 83640 | 32505, // VFMSUBADD132PHZ256r |
| 83641 | 32509, // VFMSUBADD132PHZ256rk |
| 83642 | 32514, // VFMSUBADD132PHZ256rkz |
| 83643 | 32519, // VFMSUBADD132PHZm |
| 83644 | 32523, // VFMSUBADD132PHZmb |
| 83645 | 32527, // VFMSUBADD132PHZmbk |
| 83646 | 32532, // VFMSUBADD132PHZmbkz |
| 83647 | 32537, // VFMSUBADD132PHZmk |
| 83648 | 32542, // VFMSUBADD132PHZmkz |
| 83649 | 32547, // VFMSUBADD132PHZr |
| 83650 | 32551, // VFMSUBADD132PHZrb |
| 83651 | 32556, // VFMSUBADD132PHZrbk |
| 83652 | 32562, // VFMSUBADD132PHZrbkz |
| 83653 | 32568, // VFMSUBADD132PHZrk |
| 83654 | 32573, // VFMSUBADD132PHZrkz |
| 83655 | 32578, // VFMSUBADD132PSYm |
| 83656 | 32582, // VFMSUBADD132PSYr |
| 83657 | 32586, // VFMSUBADD132PSZ128m |
| 83658 | 32590, // VFMSUBADD132PSZ128mb |
| 83659 | 32594, // VFMSUBADD132PSZ128mbk |
| 83660 | 32599, // VFMSUBADD132PSZ128mbkz |
| 83661 | 32604, // VFMSUBADD132PSZ128mk |
| 83662 | 32609, // VFMSUBADD132PSZ128mkz |
| 83663 | 32614, // VFMSUBADD132PSZ128r |
| 83664 | 32618, // VFMSUBADD132PSZ128rk |
| 83665 | 32623, // VFMSUBADD132PSZ128rkz |
| 83666 | 32628, // VFMSUBADD132PSZ256m |
| 83667 | 32632, // VFMSUBADD132PSZ256mb |
| 83668 | 32636, // VFMSUBADD132PSZ256mbk |
| 83669 | 32641, // VFMSUBADD132PSZ256mbkz |
| 83670 | 32646, // VFMSUBADD132PSZ256mk |
| 83671 | 32651, // VFMSUBADD132PSZ256mkz |
| 83672 | 32656, // VFMSUBADD132PSZ256r |
| 83673 | 32660, // VFMSUBADD132PSZ256rk |
| 83674 | 32665, // VFMSUBADD132PSZ256rkz |
| 83675 | 32670, // VFMSUBADD132PSZm |
| 83676 | 32674, // VFMSUBADD132PSZmb |
| 83677 | 32678, // VFMSUBADD132PSZmbk |
| 83678 | 32683, // VFMSUBADD132PSZmbkz |
| 83679 | 32688, // VFMSUBADD132PSZmk |
| 83680 | 32693, // VFMSUBADD132PSZmkz |
| 83681 | 32698, // VFMSUBADD132PSZr |
| 83682 | 32702, // VFMSUBADD132PSZrb |
| 83683 | 32707, // VFMSUBADD132PSZrbk |
| 83684 | 32713, // VFMSUBADD132PSZrbkz |
| 83685 | 32719, // VFMSUBADD132PSZrk |
| 83686 | 32724, // VFMSUBADD132PSZrkz |
| 83687 | 32729, // VFMSUBADD132PSm |
| 83688 | 32733, // VFMSUBADD132PSr |
| 83689 | 32737, // VFMSUBADD213PDYm |
| 83690 | 32741, // VFMSUBADD213PDYr |
| 83691 | 32745, // VFMSUBADD213PDZ128m |
| 83692 | 32749, // VFMSUBADD213PDZ128mb |
| 83693 | 32753, // VFMSUBADD213PDZ128mbk |
| 83694 | 32758, // VFMSUBADD213PDZ128mbkz |
| 83695 | 32763, // VFMSUBADD213PDZ128mk |
| 83696 | 32768, // VFMSUBADD213PDZ128mkz |
| 83697 | 32773, // VFMSUBADD213PDZ128r |
| 83698 | 32777, // VFMSUBADD213PDZ128rk |
| 83699 | 32782, // VFMSUBADD213PDZ128rkz |
| 83700 | 32787, // VFMSUBADD213PDZ256m |
| 83701 | 32791, // VFMSUBADD213PDZ256mb |
| 83702 | 32795, // VFMSUBADD213PDZ256mbk |
| 83703 | 32800, // VFMSUBADD213PDZ256mbkz |
| 83704 | 32805, // VFMSUBADD213PDZ256mk |
| 83705 | 32810, // VFMSUBADD213PDZ256mkz |
| 83706 | 32815, // VFMSUBADD213PDZ256r |
| 83707 | 32819, // VFMSUBADD213PDZ256rk |
| 83708 | 32824, // VFMSUBADD213PDZ256rkz |
| 83709 | 32829, // VFMSUBADD213PDZm |
| 83710 | 32833, // VFMSUBADD213PDZmb |
| 83711 | 32837, // VFMSUBADD213PDZmbk |
| 83712 | 32842, // VFMSUBADD213PDZmbkz |
| 83713 | 32847, // VFMSUBADD213PDZmk |
| 83714 | 32852, // VFMSUBADD213PDZmkz |
| 83715 | 32857, // VFMSUBADD213PDZr |
| 83716 | 32861, // VFMSUBADD213PDZrb |
| 83717 | 32866, // VFMSUBADD213PDZrbk |
| 83718 | 32872, // VFMSUBADD213PDZrbkz |
| 83719 | 32878, // VFMSUBADD213PDZrk |
| 83720 | 32883, // VFMSUBADD213PDZrkz |
| 83721 | 32888, // VFMSUBADD213PDm |
| 83722 | 32892, // VFMSUBADD213PDr |
| 83723 | 32896, // VFMSUBADD213PHZ128m |
| 83724 | 32900, // VFMSUBADD213PHZ128mb |
| 83725 | 32904, // VFMSUBADD213PHZ128mbk |
| 83726 | 32909, // VFMSUBADD213PHZ128mbkz |
| 83727 | 32914, // VFMSUBADD213PHZ128mk |
| 83728 | 32919, // VFMSUBADD213PHZ128mkz |
| 83729 | 32924, // VFMSUBADD213PHZ128r |
| 83730 | 32928, // VFMSUBADD213PHZ128rk |
| 83731 | 32933, // VFMSUBADD213PHZ128rkz |
| 83732 | 32938, // VFMSUBADD213PHZ256m |
| 83733 | 32942, // VFMSUBADD213PHZ256mb |
| 83734 | 32946, // VFMSUBADD213PHZ256mbk |
| 83735 | 32951, // VFMSUBADD213PHZ256mbkz |
| 83736 | 32956, // VFMSUBADD213PHZ256mk |
| 83737 | 32961, // VFMSUBADD213PHZ256mkz |
| 83738 | 32966, // VFMSUBADD213PHZ256r |
| 83739 | 32970, // VFMSUBADD213PHZ256rk |
| 83740 | 32975, // VFMSUBADD213PHZ256rkz |
| 83741 | 32980, // VFMSUBADD213PHZm |
| 83742 | 32984, // VFMSUBADD213PHZmb |
| 83743 | 32988, // VFMSUBADD213PHZmbk |
| 83744 | 32993, // VFMSUBADD213PHZmbkz |
| 83745 | 32998, // VFMSUBADD213PHZmk |
| 83746 | 33003, // VFMSUBADD213PHZmkz |
| 83747 | 33008, // VFMSUBADD213PHZr |
| 83748 | 33012, // VFMSUBADD213PHZrb |
| 83749 | 33017, // VFMSUBADD213PHZrbk |
| 83750 | 33023, // VFMSUBADD213PHZrbkz |
| 83751 | 33029, // VFMSUBADD213PHZrk |
| 83752 | 33034, // VFMSUBADD213PHZrkz |
| 83753 | 33039, // VFMSUBADD213PSYm |
| 83754 | 33043, // VFMSUBADD213PSYr |
| 83755 | 33047, // VFMSUBADD213PSZ128m |
| 83756 | 33051, // VFMSUBADD213PSZ128mb |
| 83757 | 33055, // VFMSUBADD213PSZ128mbk |
| 83758 | 33060, // VFMSUBADD213PSZ128mbkz |
| 83759 | 33065, // VFMSUBADD213PSZ128mk |
| 83760 | 33070, // VFMSUBADD213PSZ128mkz |
| 83761 | 33075, // VFMSUBADD213PSZ128r |
| 83762 | 33079, // VFMSUBADD213PSZ128rk |
| 83763 | 33084, // VFMSUBADD213PSZ128rkz |
| 83764 | 33089, // VFMSUBADD213PSZ256m |
| 83765 | 33093, // VFMSUBADD213PSZ256mb |
| 83766 | 33097, // VFMSUBADD213PSZ256mbk |
| 83767 | 33102, // VFMSUBADD213PSZ256mbkz |
| 83768 | 33107, // VFMSUBADD213PSZ256mk |
| 83769 | 33112, // VFMSUBADD213PSZ256mkz |
| 83770 | 33117, // VFMSUBADD213PSZ256r |
| 83771 | 33121, // VFMSUBADD213PSZ256rk |
| 83772 | 33126, // VFMSUBADD213PSZ256rkz |
| 83773 | 33131, // VFMSUBADD213PSZm |
| 83774 | 33135, // VFMSUBADD213PSZmb |
| 83775 | 33139, // VFMSUBADD213PSZmbk |
| 83776 | 33144, // VFMSUBADD213PSZmbkz |
| 83777 | 33149, // VFMSUBADD213PSZmk |
| 83778 | 33154, // VFMSUBADD213PSZmkz |
| 83779 | 33159, // VFMSUBADD213PSZr |
| 83780 | 33163, // VFMSUBADD213PSZrb |
| 83781 | 33168, // VFMSUBADD213PSZrbk |
| 83782 | 33174, // VFMSUBADD213PSZrbkz |
| 83783 | 33180, // VFMSUBADD213PSZrk |
| 83784 | 33185, // VFMSUBADD213PSZrkz |
| 83785 | 33190, // VFMSUBADD213PSm |
| 83786 | 33194, // VFMSUBADD213PSr |
| 83787 | 33198, // VFMSUBADD231PDYm |
| 83788 | 33202, // VFMSUBADD231PDYr |
| 83789 | 33206, // VFMSUBADD231PDZ128m |
| 83790 | 33210, // VFMSUBADD231PDZ128mb |
| 83791 | 33214, // VFMSUBADD231PDZ128mbk |
| 83792 | 33219, // VFMSUBADD231PDZ128mbkz |
| 83793 | 33224, // VFMSUBADD231PDZ128mk |
| 83794 | 33229, // VFMSUBADD231PDZ128mkz |
| 83795 | 33234, // VFMSUBADD231PDZ128r |
| 83796 | 33238, // VFMSUBADD231PDZ128rk |
| 83797 | 33243, // VFMSUBADD231PDZ128rkz |
| 83798 | 33248, // VFMSUBADD231PDZ256m |
| 83799 | 33252, // VFMSUBADD231PDZ256mb |
| 83800 | 33256, // VFMSUBADD231PDZ256mbk |
| 83801 | 33261, // VFMSUBADD231PDZ256mbkz |
| 83802 | 33266, // VFMSUBADD231PDZ256mk |
| 83803 | 33271, // VFMSUBADD231PDZ256mkz |
| 83804 | 33276, // VFMSUBADD231PDZ256r |
| 83805 | 33280, // VFMSUBADD231PDZ256rk |
| 83806 | 33285, // VFMSUBADD231PDZ256rkz |
| 83807 | 33290, // VFMSUBADD231PDZm |
| 83808 | 33294, // VFMSUBADD231PDZmb |
| 83809 | 33298, // VFMSUBADD231PDZmbk |
| 83810 | 33303, // VFMSUBADD231PDZmbkz |
| 83811 | 33308, // VFMSUBADD231PDZmk |
| 83812 | 33313, // VFMSUBADD231PDZmkz |
| 83813 | 33318, // VFMSUBADD231PDZr |
| 83814 | 33322, // VFMSUBADD231PDZrb |
| 83815 | 33327, // VFMSUBADD231PDZrbk |
| 83816 | 33333, // VFMSUBADD231PDZrbkz |
| 83817 | 33339, // VFMSUBADD231PDZrk |
| 83818 | 33344, // VFMSUBADD231PDZrkz |
| 83819 | 33349, // VFMSUBADD231PDm |
| 83820 | 33353, // VFMSUBADD231PDr |
| 83821 | 33357, // VFMSUBADD231PHZ128m |
| 83822 | 33361, // VFMSUBADD231PHZ128mb |
| 83823 | 33365, // VFMSUBADD231PHZ128mbk |
| 83824 | 33370, // VFMSUBADD231PHZ128mbkz |
| 83825 | 33375, // VFMSUBADD231PHZ128mk |
| 83826 | 33380, // VFMSUBADD231PHZ128mkz |
| 83827 | 33385, // VFMSUBADD231PHZ128r |
| 83828 | 33389, // VFMSUBADD231PHZ128rk |
| 83829 | 33394, // VFMSUBADD231PHZ128rkz |
| 83830 | 33399, // VFMSUBADD231PHZ256m |
| 83831 | 33403, // VFMSUBADD231PHZ256mb |
| 83832 | 33407, // VFMSUBADD231PHZ256mbk |
| 83833 | 33412, // VFMSUBADD231PHZ256mbkz |
| 83834 | 33417, // VFMSUBADD231PHZ256mk |
| 83835 | 33422, // VFMSUBADD231PHZ256mkz |
| 83836 | 33427, // VFMSUBADD231PHZ256r |
| 83837 | 33431, // VFMSUBADD231PHZ256rk |
| 83838 | 33436, // VFMSUBADD231PHZ256rkz |
| 83839 | 33441, // VFMSUBADD231PHZm |
| 83840 | 33445, // VFMSUBADD231PHZmb |
| 83841 | 33449, // VFMSUBADD231PHZmbk |
| 83842 | 33454, // VFMSUBADD231PHZmbkz |
| 83843 | 33459, // VFMSUBADD231PHZmk |
| 83844 | 33464, // VFMSUBADD231PHZmkz |
| 83845 | 33469, // VFMSUBADD231PHZr |
| 83846 | 33473, // VFMSUBADD231PHZrb |
| 83847 | 33478, // VFMSUBADD231PHZrbk |
| 83848 | 33484, // VFMSUBADD231PHZrbkz |
| 83849 | 33490, // VFMSUBADD231PHZrk |
| 83850 | 33495, // VFMSUBADD231PHZrkz |
| 83851 | 33500, // VFMSUBADD231PSYm |
| 83852 | 33504, // VFMSUBADD231PSYr |
| 83853 | 33508, // VFMSUBADD231PSZ128m |
| 83854 | 33512, // VFMSUBADD231PSZ128mb |
| 83855 | 33516, // VFMSUBADD231PSZ128mbk |
| 83856 | 33521, // VFMSUBADD231PSZ128mbkz |
| 83857 | 33526, // VFMSUBADD231PSZ128mk |
| 83858 | 33531, // VFMSUBADD231PSZ128mkz |
| 83859 | 33536, // VFMSUBADD231PSZ128r |
| 83860 | 33540, // VFMSUBADD231PSZ128rk |
| 83861 | 33545, // VFMSUBADD231PSZ128rkz |
| 83862 | 33550, // VFMSUBADD231PSZ256m |
| 83863 | 33554, // VFMSUBADD231PSZ256mb |
| 83864 | 33558, // VFMSUBADD231PSZ256mbk |
| 83865 | 33563, // VFMSUBADD231PSZ256mbkz |
| 83866 | 33568, // VFMSUBADD231PSZ256mk |
| 83867 | 33573, // VFMSUBADD231PSZ256mkz |
| 83868 | 33578, // VFMSUBADD231PSZ256r |
| 83869 | 33582, // VFMSUBADD231PSZ256rk |
| 83870 | 33587, // VFMSUBADD231PSZ256rkz |
| 83871 | 33592, // VFMSUBADD231PSZm |
| 83872 | 33596, // VFMSUBADD231PSZmb |
| 83873 | 33600, // VFMSUBADD231PSZmbk |
| 83874 | 33605, // VFMSUBADD231PSZmbkz |
| 83875 | 33610, // VFMSUBADD231PSZmk |
| 83876 | 33615, // VFMSUBADD231PSZmkz |
| 83877 | 33620, // VFMSUBADD231PSZr |
| 83878 | 33624, // VFMSUBADD231PSZrb |
| 83879 | 33629, // VFMSUBADD231PSZrbk |
| 83880 | 33635, // VFMSUBADD231PSZrbkz |
| 83881 | 33641, // VFMSUBADD231PSZrk |
| 83882 | 33646, // VFMSUBADD231PSZrkz |
| 83883 | 33651, // VFMSUBADD231PSm |
| 83884 | 33655, // VFMSUBADD231PSr |
| 83885 | 33659, // VFMSUBADDPD4Ymr |
| 83886 | 33663, // VFMSUBADDPD4Yrm |
| 83887 | 33667, // VFMSUBADDPD4Yrr |
| 83888 | 33671, // VFMSUBADDPD4Yrr_REV |
| 83889 | 33675, // VFMSUBADDPD4mr |
| 83890 | 33679, // VFMSUBADDPD4rm |
| 83891 | 33683, // VFMSUBADDPD4rr |
| 83892 | 33687, // VFMSUBADDPD4rr_REV |
| 83893 | 33691, // VFMSUBADDPS4Ymr |
| 83894 | 33695, // VFMSUBADDPS4Yrm |
| 83895 | 33699, // VFMSUBADDPS4Yrr |
| 83896 | 33703, // VFMSUBADDPS4Yrr_REV |
| 83897 | 33707, // VFMSUBADDPS4mr |
| 83898 | 33711, // VFMSUBADDPS4rm |
| 83899 | 33715, // VFMSUBADDPS4rr |
| 83900 | 33719, // VFMSUBADDPS4rr_REV |
| 83901 | 33723, // VFMSUBPD4Ymr |
| 83902 | 33727, // VFMSUBPD4Yrm |
| 83903 | 33731, // VFMSUBPD4Yrr |
| 83904 | 33735, // VFMSUBPD4Yrr_REV |
| 83905 | 33739, // VFMSUBPD4mr |
| 83906 | 33743, // VFMSUBPD4rm |
| 83907 | 33747, // VFMSUBPD4rr |
| 83908 | 33751, // VFMSUBPD4rr_REV |
| 83909 | 33755, // VFMSUBPS4Ymr |
| 83910 | 33759, // VFMSUBPS4Yrm |
| 83911 | 33763, // VFMSUBPS4Yrr |
| 83912 | 33767, // VFMSUBPS4Yrr_REV |
| 83913 | 33771, // VFMSUBPS4mr |
| 83914 | 33775, // VFMSUBPS4rm |
| 83915 | 33779, // VFMSUBPS4rr |
| 83916 | 33783, // VFMSUBPS4rr_REV |
| 83917 | 33787, // VFMSUBSD4mr |
| 83918 | 33791, // VFMSUBSD4mr_Int |
| 83919 | 33795, // VFMSUBSD4rm |
| 83920 | 33799, // VFMSUBSD4rm_Int |
| 83921 | 33803, // VFMSUBSD4rr |
| 83922 | 33807, // VFMSUBSD4rr_Int |
| 83923 | 33811, // VFMSUBSD4rr_Int_REV |
| 83924 | 33815, // VFMSUBSD4rr_REV |
| 83925 | 33819, // VFMSUBSS4mr |
| 83926 | 33823, // VFMSUBSS4mr_Int |
| 83927 | 33827, // VFMSUBSS4rm |
| 83928 | 33831, // VFMSUBSS4rm_Int |
| 83929 | 33835, // VFMSUBSS4rr |
| 83930 | 33839, // VFMSUBSS4rr_Int |
| 83931 | 33843, // VFMSUBSS4rr_Int_REV |
| 83932 | 33847, // VFMSUBSS4rr_REV |
| 83933 | 33851, // VFMULCPHZ128rm |
| 83934 | 33854, // VFMULCPHZ128rmb |
| 83935 | 33857, // VFMULCPHZ128rmbk |
| 83936 | 33862, // VFMULCPHZ128rmbkz |
| 83937 | 33866, // VFMULCPHZ128rmk |
| 83938 | 33871, // VFMULCPHZ128rmkz |
| 83939 | 33875, // VFMULCPHZ128rr |
| 83940 | 33878, // VFMULCPHZ128rrk |
| 83941 | 33883, // VFMULCPHZ128rrkz |
| 83942 | 33887, // VFMULCPHZ256rm |
| 83943 | 33890, // VFMULCPHZ256rmb |
| 83944 | 33893, // VFMULCPHZ256rmbk |
| 83945 | 33898, // VFMULCPHZ256rmbkz |
| 83946 | 33902, // VFMULCPHZ256rmk |
| 83947 | 33907, // VFMULCPHZ256rmkz |
| 83948 | 33911, // VFMULCPHZ256rr |
| 83949 | 33914, // VFMULCPHZ256rrk |
| 83950 | 33919, // VFMULCPHZ256rrkz |
| 83951 | 33923, // VFMULCPHZrm |
| 83952 | 33926, // VFMULCPHZrmb |
| 83953 | 33929, // VFMULCPHZrmbk |
| 83954 | 33934, // VFMULCPHZrmbkz |
| 83955 | 33938, // VFMULCPHZrmk |
| 83956 | 33943, // VFMULCPHZrmkz |
| 83957 | 33947, // VFMULCPHZrr |
| 83958 | 33950, // VFMULCPHZrrb |
| 83959 | 33954, // VFMULCPHZrrbk |
| 83960 | 33960, // VFMULCPHZrrbkz |
| 83961 | 33965, // VFMULCPHZrrk |
| 83962 | 33970, // VFMULCPHZrrkz |
| 83963 | 33974, // VFMULCSHZrm |
| 83964 | 33977, // VFMULCSHZrmk |
| 83965 | 33982, // VFMULCSHZrmkz |
| 83966 | 33986, // VFMULCSHZrr |
| 83967 | 33989, // VFMULCSHZrrb |
| 83968 | 33993, // VFMULCSHZrrbk |
| 83969 | 33999, // VFMULCSHZrrbkz |
| 83970 | 34004, // VFMULCSHZrrk |
| 83971 | 34009, // VFMULCSHZrrkz |
| 83972 | 34013, // VFNMADD132BF16Z128m |
| 83973 | 34017, // VFNMADD132BF16Z128mb |
| 83974 | 34021, // VFNMADD132BF16Z128mbk |
| 83975 | 34026, // VFNMADD132BF16Z128mbkz |
| 83976 | 34031, // VFNMADD132BF16Z128mk |
| 83977 | 34036, // VFNMADD132BF16Z128mkz |
| 83978 | 34041, // VFNMADD132BF16Z128r |
| 83979 | 34045, // VFNMADD132BF16Z128rk |
| 83980 | 34050, // VFNMADD132BF16Z128rkz |
| 83981 | 34055, // VFNMADD132BF16Z256m |
| 83982 | 34059, // VFNMADD132BF16Z256mb |
| 83983 | 34063, // VFNMADD132BF16Z256mbk |
| 83984 | 34068, // VFNMADD132BF16Z256mbkz |
| 83985 | 34073, // VFNMADD132BF16Z256mk |
| 83986 | 34078, // VFNMADD132BF16Z256mkz |
| 83987 | 34083, // VFNMADD132BF16Z256r |
| 83988 | 34087, // VFNMADD132BF16Z256rk |
| 83989 | 34092, // VFNMADD132BF16Z256rkz |
| 83990 | 34097, // VFNMADD132BF16Zm |
| 83991 | 34101, // VFNMADD132BF16Zmb |
| 83992 | 34105, // VFNMADD132BF16Zmbk |
| 83993 | 34110, // VFNMADD132BF16Zmbkz |
| 83994 | 34115, // VFNMADD132BF16Zmk |
| 83995 | 34120, // VFNMADD132BF16Zmkz |
| 83996 | 34125, // VFNMADD132BF16Zr |
| 83997 | 34129, // VFNMADD132BF16Zrk |
| 83998 | 34134, // VFNMADD132BF16Zrkz |
| 83999 | 34139, // VFNMADD132PDYm |
| 84000 | 34143, // VFNMADD132PDYr |
| 84001 | 34147, // VFNMADD132PDZ128m |
| 84002 | 34151, // VFNMADD132PDZ128mb |
| 84003 | 34155, // VFNMADD132PDZ128mbk |
| 84004 | 34160, // VFNMADD132PDZ128mbkz |
| 84005 | 34165, // VFNMADD132PDZ128mk |
| 84006 | 34170, // VFNMADD132PDZ128mkz |
| 84007 | 34175, // VFNMADD132PDZ128r |
| 84008 | 34179, // VFNMADD132PDZ128rk |
| 84009 | 34184, // VFNMADD132PDZ128rkz |
| 84010 | 34189, // VFNMADD132PDZ256m |
| 84011 | 34193, // VFNMADD132PDZ256mb |
| 84012 | 34197, // VFNMADD132PDZ256mbk |
| 84013 | 34202, // VFNMADD132PDZ256mbkz |
| 84014 | 34207, // VFNMADD132PDZ256mk |
| 84015 | 34212, // VFNMADD132PDZ256mkz |
| 84016 | 34217, // VFNMADD132PDZ256r |
| 84017 | 34221, // VFNMADD132PDZ256rk |
| 84018 | 34226, // VFNMADD132PDZ256rkz |
| 84019 | 34231, // VFNMADD132PDZm |
| 84020 | 34235, // VFNMADD132PDZmb |
| 84021 | 34239, // VFNMADD132PDZmbk |
| 84022 | 34244, // VFNMADD132PDZmbkz |
| 84023 | 34249, // VFNMADD132PDZmk |
| 84024 | 34254, // VFNMADD132PDZmkz |
| 84025 | 34259, // VFNMADD132PDZr |
| 84026 | 34263, // VFNMADD132PDZrb |
| 84027 | 34268, // VFNMADD132PDZrbk |
| 84028 | 34274, // VFNMADD132PDZrbkz |
| 84029 | 34280, // VFNMADD132PDZrk |
| 84030 | 34285, // VFNMADD132PDZrkz |
| 84031 | 34290, // VFNMADD132PDm |
| 84032 | 34294, // VFNMADD132PDr |
| 84033 | 34298, // VFNMADD132PHZ128m |
| 84034 | 34302, // VFNMADD132PHZ128mb |
| 84035 | 34306, // VFNMADD132PHZ128mbk |
| 84036 | 34311, // VFNMADD132PHZ128mbkz |
| 84037 | 34316, // VFNMADD132PHZ128mk |
| 84038 | 34321, // VFNMADD132PHZ128mkz |
| 84039 | 34326, // VFNMADD132PHZ128r |
| 84040 | 34330, // VFNMADD132PHZ128rk |
| 84041 | 34335, // VFNMADD132PHZ128rkz |
| 84042 | 34340, // VFNMADD132PHZ256m |
| 84043 | 34344, // VFNMADD132PHZ256mb |
| 84044 | 34348, // VFNMADD132PHZ256mbk |
| 84045 | 34353, // VFNMADD132PHZ256mbkz |
| 84046 | 34358, // VFNMADD132PHZ256mk |
| 84047 | 34363, // VFNMADD132PHZ256mkz |
| 84048 | 34368, // VFNMADD132PHZ256r |
| 84049 | 34372, // VFNMADD132PHZ256rk |
| 84050 | 34377, // VFNMADD132PHZ256rkz |
| 84051 | 34382, // VFNMADD132PHZm |
| 84052 | 34386, // VFNMADD132PHZmb |
| 84053 | 34390, // VFNMADD132PHZmbk |
| 84054 | 34395, // VFNMADD132PHZmbkz |
| 84055 | 34400, // VFNMADD132PHZmk |
| 84056 | 34405, // VFNMADD132PHZmkz |
| 84057 | 34410, // VFNMADD132PHZr |
| 84058 | 34414, // VFNMADD132PHZrb |
| 84059 | 34419, // VFNMADD132PHZrbk |
| 84060 | 34425, // VFNMADD132PHZrbkz |
| 84061 | 34431, // VFNMADD132PHZrk |
| 84062 | 34436, // VFNMADD132PHZrkz |
| 84063 | 34441, // VFNMADD132PSYm |
| 84064 | 34445, // VFNMADD132PSYr |
| 84065 | 34449, // VFNMADD132PSZ128m |
| 84066 | 34453, // VFNMADD132PSZ128mb |
| 84067 | 34457, // VFNMADD132PSZ128mbk |
| 84068 | 34462, // VFNMADD132PSZ128mbkz |
| 84069 | 34467, // VFNMADD132PSZ128mk |
| 84070 | 34472, // VFNMADD132PSZ128mkz |
| 84071 | 34477, // VFNMADD132PSZ128r |
| 84072 | 34481, // VFNMADD132PSZ128rk |
| 84073 | 34486, // VFNMADD132PSZ128rkz |
| 84074 | 34491, // VFNMADD132PSZ256m |
| 84075 | 34495, // VFNMADD132PSZ256mb |
| 84076 | 34499, // VFNMADD132PSZ256mbk |
| 84077 | 34504, // VFNMADD132PSZ256mbkz |
| 84078 | 34509, // VFNMADD132PSZ256mk |
| 84079 | 34514, // VFNMADD132PSZ256mkz |
| 84080 | 34519, // VFNMADD132PSZ256r |
| 84081 | 34523, // VFNMADD132PSZ256rk |
| 84082 | 34528, // VFNMADD132PSZ256rkz |
| 84083 | 34533, // VFNMADD132PSZm |
| 84084 | 34537, // VFNMADD132PSZmb |
| 84085 | 34541, // VFNMADD132PSZmbk |
| 84086 | 34546, // VFNMADD132PSZmbkz |
| 84087 | 34551, // VFNMADD132PSZmk |
| 84088 | 34556, // VFNMADD132PSZmkz |
| 84089 | 34561, // VFNMADD132PSZr |
| 84090 | 34565, // VFNMADD132PSZrb |
| 84091 | 34570, // VFNMADD132PSZrbk |
| 84092 | 34576, // VFNMADD132PSZrbkz |
| 84093 | 34582, // VFNMADD132PSZrk |
| 84094 | 34587, // VFNMADD132PSZrkz |
| 84095 | 34592, // VFNMADD132PSm |
| 84096 | 34596, // VFNMADD132PSr |
| 84097 | 34600, // VFNMADD132SDZm |
| 84098 | 34604, // VFNMADD132SDZm_Int |
| 84099 | 34608, // VFNMADD132SDZmk_Int |
| 84100 | 34613, // VFNMADD132SDZmkz_Int |
| 84101 | 34618, // VFNMADD132SDZr |
| 84102 | 34622, // VFNMADD132SDZr_Int |
| 84103 | 34626, // VFNMADD132SDZrb |
| 84104 | 34631, // VFNMADD132SDZrb_Int |
| 84105 | 34636, // VFNMADD132SDZrbk_Int |
| 84106 | 34642, // VFNMADD132SDZrbkz_Int |
| 84107 | 34648, // VFNMADD132SDZrk_Int |
| 84108 | 34653, // VFNMADD132SDZrkz_Int |
| 84109 | 34658, // VFNMADD132SDm |
| 84110 | 34662, // VFNMADD132SDm_Int |
| 84111 | 34666, // VFNMADD132SDr |
| 84112 | 34670, // VFNMADD132SDr_Int |
| 84113 | 34674, // VFNMADD132SHZm |
| 84114 | 34678, // VFNMADD132SHZm_Int |
| 84115 | 34682, // VFNMADD132SHZmk_Int |
| 84116 | 34687, // VFNMADD132SHZmkz_Int |
| 84117 | 34692, // VFNMADD132SHZr |
| 84118 | 34696, // VFNMADD132SHZr_Int |
| 84119 | 34700, // VFNMADD132SHZrb |
| 84120 | 34705, // VFNMADD132SHZrb_Int |
| 84121 | 34710, // VFNMADD132SHZrbk_Int |
| 84122 | 34716, // VFNMADD132SHZrbkz_Int |
| 84123 | 34722, // VFNMADD132SHZrk_Int |
| 84124 | 34727, // VFNMADD132SHZrkz_Int |
| 84125 | 34732, // VFNMADD132SSZm |
| 84126 | 34736, // VFNMADD132SSZm_Int |
| 84127 | 34740, // VFNMADD132SSZmk_Int |
| 84128 | 34745, // VFNMADD132SSZmkz_Int |
| 84129 | 34750, // VFNMADD132SSZr |
| 84130 | 34754, // VFNMADD132SSZr_Int |
| 84131 | 34758, // VFNMADD132SSZrb |
| 84132 | 34763, // VFNMADD132SSZrb_Int |
| 84133 | 34768, // VFNMADD132SSZrbk_Int |
| 84134 | 34774, // VFNMADD132SSZrbkz_Int |
| 84135 | 34780, // VFNMADD132SSZrk_Int |
| 84136 | 34785, // VFNMADD132SSZrkz_Int |
| 84137 | 34790, // VFNMADD132SSm |
| 84138 | 34794, // VFNMADD132SSm_Int |
| 84139 | 34798, // VFNMADD132SSr |
| 84140 | 34802, // VFNMADD132SSr_Int |
| 84141 | 34806, // VFNMADD213BF16Z128m |
| 84142 | 34810, // VFNMADD213BF16Z128mb |
| 84143 | 34814, // VFNMADD213BF16Z128mbk |
| 84144 | 34819, // VFNMADD213BF16Z128mbkz |
| 84145 | 34824, // VFNMADD213BF16Z128mk |
| 84146 | 34829, // VFNMADD213BF16Z128mkz |
| 84147 | 34834, // VFNMADD213BF16Z128r |
| 84148 | 34838, // VFNMADD213BF16Z128rk |
| 84149 | 34843, // VFNMADD213BF16Z128rkz |
| 84150 | 34848, // VFNMADD213BF16Z256m |
| 84151 | 34852, // VFNMADD213BF16Z256mb |
| 84152 | 34856, // VFNMADD213BF16Z256mbk |
| 84153 | 34861, // VFNMADD213BF16Z256mbkz |
| 84154 | 34866, // VFNMADD213BF16Z256mk |
| 84155 | 34871, // VFNMADD213BF16Z256mkz |
| 84156 | 34876, // VFNMADD213BF16Z256r |
| 84157 | 34880, // VFNMADD213BF16Z256rk |
| 84158 | 34885, // VFNMADD213BF16Z256rkz |
| 84159 | 34890, // VFNMADD213BF16Zm |
| 84160 | 34894, // VFNMADD213BF16Zmb |
| 84161 | 34898, // VFNMADD213BF16Zmbk |
| 84162 | 34903, // VFNMADD213BF16Zmbkz |
| 84163 | 34908, // VFNMADD213BF16Zmk |
| 84164 | 34913, // VFNMADD213BF16Zmkz |
| 84165 | 34918, // VFNMADD213BF16Zr |
| 84166 | 34922, // VFNMADD213BF16Zrk |
| 84167 | 34927, // VFNMADD213BF16Zrkz |
| 84168 | 34932, // VFNMADD213PDYm |
| 84169 | 34936, // VFNMADD213PDYr |
| 84170 | 34940, // VFNMADD213PDZ128m |
| 84171 | 34944, // VFNMADD213PDZ128mb |
| 84172 | 34948, // VFNMADD213PDZ128mbk |
| 84173 | 34953, // VFNMADD213PDZ128mbkz |
| 84174 | 34958, // VFNMADD213PDZ128mk |
| 84175 | 34963, // VFNMADD213PDZ128mkz |
| 84176 | 34968, // VFNMADD213PDZ128r |
| 84177 | 34972, // VFNMADD213PDZ128rk |
| 84178 | 34977, // VFNMADD213PDZ128rkz |
| 84179 | 34982, // VFNMADD213PDZ256m |
| 84180 | 34986, // VFNMADD213PDZ256mb |
| 84181 | 34990, // VFNMADD213PDZ256mbk |
| 84182 | 34995, // VFNMADD213PDZ256mbkz |
| 84183 | 35000, // VFNMADD213PDZ256mk |
| 84184 | 35005, // VFNMADD213PDZ256mkz |
| 84185 | 35010, // VFNMADD213PDZ256r |
| 84186 | 35014, // VFNMADD213PDZ256rk |
| 84187 | 35019, // VFNMADD213PDZ256rkz |
| 84188 | 35024, // VFNMADD213PDZm |
| 84189 | 35028, // VFNMADD213PDZmb |
| 84190 | 35032, // VFNMADD213PDZmbk |
| 84191 | 35037, // VFNMADD213PDZmbkz |
| 84192 | 35042, // VFNMADD213PDZmk |
| 84193 | 35047, // VFNMADD213PDZmkz |
| 84194 | 35052, // VFNMADD213PDZr |
| 84195 | 35056, // VFNMADD213PDZrb |
| 84196 | 35061, // VFNMADD213PDZrbk |
| 84197 | 35067, // VFNMADD213PDZrbkz |
| 84198 | 35073, // VFNMADD213PDZrk |
| 84199 | 35078, // VFNMADD213PDZrkz |
| 84200 | 35083, // VFNMADD213PDm |
| 84201 | 35087, // VFNMADD213PDr |
| 84202 | 35091, // VFNMADD213PHZ128m |
| 84203 | 35095, // VFNMADD213PHZ128mb |
| 84204 | 35099, // VFNMADD213PHZ128mbk |
| 84205 | 35104, // VFNMADD213PHZ128mbkz |
| 84206 | 35109, // VFNMADD213PHZ128mk |
| 84207 | 35114, // VFNMADD213PHZ128mkz |
| 84208 | 35119, // VFNMADD213PHZ128r |
| 84209 | 35123, // VFNMADD213PHZ128rk |
| 84210 | 35128, // VFNMADD213PHZ128rkz |
| 84211 | 35133, // VFNMADD213PHZ256m |
| 84212 | 35137, // VFNMADD213PHZ256mb |
| 84213 | 35141, // VFNMADD213PHZ256mbk |
| 84214 | 35146, // VFNMADD213PHZ256mbkz |
| 84215 | 35151, // VFNMADD213PHZ256mk |
| 84216 | 35156, // VFNMADD213PHZ256mkz |
| 84217 | 35161, // VFNMADD213PHZ256r |
| 84218 | 35165, // VFNMADD213PHZ256rk |
| 84219 | 35170, // VFNMADD213PHZ256rkz |
| 84220 | 35175, // VFNMADD213PHZm |
| 84221 | 35179, // VFNMADD213PHZmb |
| 84222 | 35183, // VFNMADD213PHZmbk |
| 84223 | 35188, // VFNMADD213PHZmbkz |
| 84224 | 35193, // VFNMADD213PHZmk |
| 84225 | 35198, // VFNMADD213PHZmkz |
| 84226 | 35203, // VFNMADD213PHZr |
| 84227 | 35207, // VFNMADD213PHZrb |
| 84228 | 35212, // VFNMADD213PHZrbk |
| 84229 | 35218, // VFNMADD213PHZrbkz |
| 84230 | 35224, // VFNMADD213PHZrk |
| 84231 | 35229, // VFNMADD213PHZrkz |
| 84232 | 35234, // VFNMADD213PSYm |
| 84233 | 35238, // VFNMADD213PSYr |
| 84234 | 35242, // VFNMADD213PSZ128m |
| 84235 | 35246, // VFNMADD213PSZ128mb |
| 84236 | 35250, // VFNMADD213PSZ128mbk |
| 84237 | 35255, // VFNMADD213PSZ128mbkz |
| 84238 | 35260, // VFNMADD213PSZ128mk |
| 84239 | 35265, // VFNMADD213PSZ128mkz |
| 84240 | 35270, // VFNMADD213PSZ128r |
| 84241 | 35274, // VFNMADD213PSZ128rk |
| 84242 | 35279, // VFNMADD213PSZ128rkz |
| 84243 | 35284, // VFNMADD213PSZ256m |
| 84244 | 35288, // VFNMADD213PSZ256mb |
| 84245 | 35292, // VFNMADD213PSZ256mbk |
| 84246 | 35297, // VFNMADD213PSZ256mbkz |
| 84247 | 35302, // VFNMADD213PSZ256mk |
| 84248 | 35307, // VFNMADD213PSZ256mkz |
| 84249 | 35312, // VFNMADD213PSZ256r |
| 84250 | 35316, // VFNMADD213PSZ256rk |
| 84251 | 35321, // VFNMADD213PSZ256rkz |
| 84252 | 35326, // VFNMADD213PSZm |
| 84253 | 35330, // VFNMADD213PSZmb |
| 84254 | 35334, // VFNMADD213PSZmbk |
| 84255 | 35339, // VFNMADD213PSZmbkz |
| 84256 | 35344, // VFNMADD213PSZmk |
| 84257 | 35349, // VFNMADD213PSZmkz |
| 84258 | 35354, // VFNMADD213PSZr |
| 84259 | 35358, // VFNMADD213PSZrb |
| 84260 | 35363, // VFNMADD213PSZrbk |
| 84261 | 35369, // VFNMADD213PSZrbkz |
| 84262 | 35375, // VFNMADD213PSZrk |
| 84263 | 35380, // VFNMADD213PSZrkz |
| 84264 | 35385, // VFNMADD213PSm |
| 84265 | 35389, // VFNMADD213PSr |
| 84266 | 35393, // VFNMADD213SDZm |
| 84267 | 35397, // VFNMADD213SDZm_Int |
| 84268 | 35401, // VFNMADD213SDZmk_Int |
| 84269 | 35406, // VFNMADD213SDZmkz_Int |
| 84270 | 35411, // VFNMADD213SDZr |
| 84271 | 35415, // VFNMADD213SDZr_Int |
| 84272 | 35419, // VFNMADD213SDZrb |
| 84273 | 35424, // VFNMADD213SDZrb_Int |
| 84274 | 35429, // VFNMADD213SDZrbk_Int |
| 84275 | 35435, // VFNMADD213SDZrbkz_Int |
| 84276 | 35441, // VFNMADD213SDZrk_Int |
| 84277 | 35446, // VFNMADD213SDZrkz_Int |
| 84278 | 35451, // VFNMADD213SDm |
| 84279 | 35455, // VFNMADD213SDm_Int |
| 84280 | 35459, // VFNMADD213SDr |
| 84281 | 35463, // VFNMADD213SDr_Int |
| 84282 | 35467, // VFNMADD213SHZm |
| 84283 | 35471, // VFNMADD213SHZm_Int |
| 84284 | 35475, // VFNMADD213SHZmk_Int |
| 84285 | 35480, // VFNMADD213SHZmkz_Int |
| 84286 | 35485, // VFNMADD213SHZr |
| 84287 | 35489, // VFNMADD213SHZr_Int |
| 84288 | 35493, // VFNMADD213SHZrb |
| 84289 | 35498, // VFNMADD213SHZrb_Int |
| 84290 | 35503, // VFNMADD213SHZrbk_Int |
| 84291 | 35509, // VFNMADD213SHZrbkz_Int |
| 84292 | 35515, // VFNMADD213SHZrk_Int |
| 84293 | 35520, // VFNMADD213SHZrkz_Int |
| 84294 | 35525, // VFNMADD213SSZm |
| 84295 | 35529, // VFNMADD213SSZm_Int |
| 84296 | 35533, // VFNMADD213SSZmk_Int |
| 84297 | 35538, // VFNMADD213SSZmkz_Int |
| 84298 | 35543, // VFNMADD213SSZr |
| 84299 | 35547, // VFNMADD213SSZr_Int |
| 84300 | 35551, // VFNMADD213SSZrb |
| 84301 | 35556, // VFNMADD213SSZrb_Int |
| 84302 | 35561, // VFNMADD213SSZrbk_Int |
| 84303 | 35567, // VFNMADD213SSZrbkz_Int |
| 84304 | 35573, // VFNMADD213SSZrk_Int |
| 84305 | 35578, // VFNMADD213SSZrkz_Int |
| 84306 | 35583, // VFNMADD213SSm |
| 84307 | 35587, // VFNMADD213SSm_Int |
| 84308 | 35591, // VFNMADD213SSr |
| 84309 | 35595, // VFNMADD213SSr_Int |
| 84310 | 35599, // VFNMADD231BF16Z128m |
| 84311 | 35603, // VFNMADD231BF16Z128mb |
| 84312 | 35607, // VFNMADD231BF16Z128mbk |
| 84313 | 35612, // VFNMADD231BF16Z128mbkz |
| 84314 | 35617, // VFNMADD231BF16Z128mk |
| 84315 | 35622, // VFNMADD231BF16Z128mkz |
| 84316 | 35627, // VFNMADD231BF16Z128r |
| 84317 | 35631, // VFNMADD231BF16Z128rk |
| 84318 | 35636, // VFNMADD231BF16Z128rkz |
| 84319 | 35641, // VFNMADD231BF16Z256m |
| 84320 | 35645, // VFNMADD231BF16Z256mb |
| 84321 | 35649, // VFNMADD231BF16Z256mbk |
| 84322 | 35654, // VFNMADD231BF16Z256mbkz |
| 84323 | 35659, // VFNMADD231BF16Z256mk |
| 84324 | 35664, // VFNMADD231BF16Z256mkz |
| 84325 | 35669, // VFNMADD231BF16Z256r |
| 84326 | 35673, // VFNMADD231BF16Z256rk |
| 84327 | 35678, // VFNMADD231BF16Z256rkz |
| 84328 | 35683, // VFNMADD231BF16Zm |
| 84329 | 35687, // VFNMADD231BF16Zmb |
| 84330 | 35691, // VFNMADD231BF16Zmbk |
| 84331 | 35696, // VFNMADD231BF16Zmbkz |
| 84332 | 35701, // VFNMADD231BF16Zmk |
| 84333 | 35706, // VFNMADD231BF16Zmkz |
| 84334 | 35711, // VFNMADD231BF16Zr |
| 84335 | 35715, // VFNMADD231BF16Zrk |
| 84336 | 35720, // VFNMADD231BF16Zrkz |
| 84337 | 35725, // VFNMADD231PDYm |
| 84338 | 35729, // VFNMADD231PDYr |
| 84339 | 35733, // VFNMADD231PDZ128m |
| 84340 | 35737, // VFNMADD231PDZ128mb |
| 84341 | 35741, // VFNMADD231PDZ128mbk |
| 84342 | 35746, // VFNMADD231PDZ128mbkz |
| 84343 | 35751, // VFNMADD231PDZ128mk |
| 84344 | 35756, // VFNMADD231PDZ128mkz |
| 84345 | 35761, // VFNMADD231PDZ128r |
| 84346 | 35765, // VFNMADD231PDZ128rk |
| 84347 | 35770, // VFNMADD231PDZ128rkz |
| 84348 | 35775, // VFNMADD231PDZ256m |
| 84349 | 35779, // VFNMADD231PDZ256mb |
| 84350 | 35783, // VFNMADD231PDZ256mbk |
| 84351 | 35788, // VFNMADD231PDZ256mbkz |
| 84352 | 35793, // VFNMADD231PDZ256mk |
| 84353 | 35798, // VFNMADD231PDZ256mkz |
| 84354 | 35803, // VFNMADD231PDZ256r |
| 84355 | 35807, // VFNMADD231PDZ256rk |
| 84356 | 35812, // VFNMADD231PDZ256rkz |
| 84357 | 35817, // VFNMADD231PDZm |
| 84358 | 35821, // VFNMADD231PDZmb |
| 84359 | 35825, // VFNMADD231PDZmbk |
| 84360 | 35830, // VFNMADD231PDZmbkz |
| 84361 | 35835, // VFNMADD231PDZmk |
| 84362 | 35840, // VFNMADD231PDZmkz |
| 84363 | 35845, // VFNMADD231PDZr |
| 84364 | 35849, // VFNMADD231PDZrb |
| 84365 | 35854, // VFNMADD231PDZrbk |
| 84366 | 35860, // VFNMADD231PDZrbkz |
| 84367 | 35866, // VFNMADD231PDZrk |
| 84368 | 35871, // VFNMADD231PDZrkz |
| 84369 | 35876, // VFNMADD231PDm |
| 84370 | 35880, // VFNMADD231PDr |
| 84371 | 35884, // VFNMADD231PHZ128m |
| 84372 | 35888, // VFNMADD231PHZ128mb |
| 84373 | 35892, // VFNMADD231PHZ128mbk |
| 84374 | 35897, // VFNMADD231PHZ128mbkz |
| 84375 | 35902, // VFNMADD231PHZ128mk |
| 84376 | 35907, // VFNMADD231PHZ128mkz |
| 84377 | 35912, // VFNMADD231PHZ128r |
| 84378 | 35916, // VFNMADD231PHZ128rk |
| 84379 | 35921, // VFNMADD231PHZ128rkz |
| 84380 | 35926, // VFNMADD231PHZ256m |
| 84381 | 35930, // VFNMADD231PHZ256mb |
| 84382 | 35934, // VFNMADD231PHZ256mbk |
| 84383 | 35939, // VFNMADD231PHZ256mbkz |
| 84384 | 35944, // VFNMADD231PHZ256mk |
| 84385 | 35949, // VFNMADD231PHZ256mkz |
| 84386 | 35954, // VFNMADD231PHZ256r |
| 84387 | 35958, // VFNMADD231PHZ256rk |
| 84388 | 35963, // VFNMADD231PHZ256rkz |
| 84389 | 35968, // VFNMADD231PHZm |
| 84390 | 35972, // VFNMADD231PHZmb |
| 84391 | 35976, // VFNMADD231PHZmbk |
| 84392 | 35981, // VFNMADD231PHZmbkz |
| 84393 | 35986, // VFNMADD231PHZmk |
| 84394 | 35991, // VFNMADD231PHZmkz |
| 84395 | 35996, // VFNMADD231PHZr |
| 84396 | 36000, // VFNMADD231PHZrb |
| 84397 | 36005, // VFNMADD231PHZrbk |
| 84398 | 36011, // VFNMADD231PHZrbkz |
| 84399 | 36017, // VFNMADD231PHZrk |
| 84400 | 36022, // VFNMADD231PHZrkz |
| 84401 | 36027, // VFNMADD231PSYm |
| 84402 | 36031, // VFNMADD231PSYr |
| 84403 | 36035, // VFNMADD231PSZ128m |
| 84404 | 36039, // VFNMADD231PSZ128mb |
| 84405 | 36043, // VFNMADD231PSZ128mbk |
| 84406 | 36048, // VFNMADD231PSZ128mbkz |
| 84407 | 36053, // VFNMADD231PSZ128mk |
| 84408 | 36058, // VFNMADD231PSZ128mkz |
| 84409 | 36063, // VFNMADD231PSZ128r |
| 84410 | 36067, // VFNMADD231PSZ128rk |
| 84411 | 36072, // VFNMADD231PSZ128rkz |
| 84412 | 36077, // VFNMADD231PSZ256m |
| 84413 | 36081, // VFNMADD231PSZ256mb |
| 84414 | 36085, // VFNMADD231PSZ256mbk |
| 84415 | 36090, // VFNMADD231PSZ256mbkz |
| 84416 | 36095, // VFNMADD231PSZ256mk |
| 84417 | 36100, // VFNMADD231PSZ256mkz |
| 84418 | 36105, // VFNMADD231PSZ256r |
| 84419 | 36109, // VFNMADD231PSZ256rk |
| 84420 | 36114, // VFNMADD231PSZ256rkz |
| 84421 | 36119, // VFNMADD231PSZm |
| 84422 | 36123, // VFNMADD231PSZmb |
| 84423 | 36127, // VFNMADD231PSZmbk |
| 84424 | 36132, // VFNMADD231PSZmbkz |
| 84425 | 36137, // VFNMADD231PSZmk |
| 84426 | 36142, // VFNMADD231PSZmkz |
| 84427 | 36147, // VFNMADD231PSZr |
| 84428 | 36151, // VFNMADD231PSZrb |
| 84429 | 36156, // VFNMADD231PSZrbk |
| 84430 | 36162, // VFNMADD231PSZrbkz |
| 84431 | 36168, // VFNMADD231PSZrk |
| 84432 | 36173, // VFNMADD231PSZrkz |
| 84433 | 36178, // VFNMADD231PSm |
| 84434 | 36182, // VFNMADD231PSr |
| 84435 | 36186, // VFNMADD231SDZm |
| 84436 | 36190, // VFNMADD231SDZm_Int |
| 84437 | 36194, // VFNMADD231SDZmk_Int |
| 84438 | 36199, // VFNMADD231SDZmkz_Int |
| 84439 | 36204, // VFNMADD231SDZr |
| 84440 | 36208, // VFNMADD231SDZr_Int |
| 84441 | 36212, // VFNMADD231SDZrb |
| 84442 | 36217, // VFNMADD231SDZrb_Int |
| 84443 | 36222, // VFNMADD231SDZrbk_Int |
| 84444 | 36228, // VFNMADD231SDZrbkz_Int |
| 84445 | 36234, // VFNMADD231SDZrk_Int |
| 84446 | 36239, // VFNMADD231SDZrkz_Int |
| 84447 | 36244, // VFNMADD231SDm |
| 84448 | 36248, // VFNMADD231SDm_Int |
| 84449 | 36252, // VFNMADD231SDr |
| 84450 | 36256, // VFNMADD231SDr_Int |
| 84451 | 36260, // VFNMADD231SHZm |
| 84452 | 36264, // VFNMADD231SHZm_Int |
| 84453 | 36268, // VFNMADD231SHZmk_Int |
| 84454 | 36273, // VFNMADD231SHZmkz_Int |
| 84455 | 36278, // VFNMADD231SHZr |
| 84456 | 36282, // VFNMADD231SHZr_Int |
| 84457 | 36286, // VFNMADD231SHZrb |
| 84458 | 36291, // VFNMADD231SHZrb_Int |
| 84459 | 36296, // VFNMADD231SHZrbk_Int |
| 84460 | 36302, // VFNMADD231SHZrbkz_Int |
| 84461 | 36308, // VFNMADD231SHZrk_Int |
| 84462 | 36313, // VFNMADD231SHZrkz_Int |
| 84463 | 36318, // VFNMADD231SSZm |
| 84464 | 36322, // VFNMADD231SSZm_Int |
| 84465 | 36326, // VFNMADD231SSZmk_Int |
| 84466 | 36331, // VFNMADD231SSZmkz_Int |
| 84467 | 36336, // VFNMADD231SSZr |
| 84468 | 36340, // VFNMADD231SSZr_Int |
| 84469 | 36344, // VFNMADD231SSZrb |
| 84470 | 36349, // VFNMADD231SSZrb_Int |
| 84471 | 36354, // VFNMADD231SSZrbk_Int |
| 84472 | 36360, // VFNMADD231SSZrbkz_Int |
| 84473 | 36366, // VFNMADD231SSZrk_Int |
| 84474 | 36371, // VFNMADD231SSZrkz_Int |
| 84475 | 36376, // VFNMADD231SSm |
| 84476 | 36380, // VFNMADD231SSm_Int |
| 84477 | 36384, // VFNMADD231SSr |
| 84478 | 36388, // VFNMADD231SSr_Int |
| 84479 | 36392, // VFNMADDPD4Ymr |
| 84480 | 36396, // VFNMADDPD4Yrm |
| 84481 | 36400, // VFNMADDPD4Yrr |
| 84482 | 36404, // VFNMADDPD4Yrr_REV |
| 84483 | 36408, // VFNMADDPD4mr |
| 84484 | 36412, // VFNMADDPD4rm |
| 84485 | 36416, // VFNMADDPD4rr |
| 84486 | 36420, // VFNMADDPD4rr_REV |
| 84487 | 36424, // VFNMADDPS4Ymr |
| 84488 | 36428, // VFNMADDPS4Yrm |
| 84489 | 36432, // VFNMADDPS4Yrr |
| 84490 | 36436, // VFNMADDPS4Yrr_REV |
| 84491 | 36440, // VFNMADDPS4mr |
| 84492 | 36444, // VFNMADDPS4rm |
| 84493 | 36448, // VFNMADDPS4rr |
| 84494 | 36452, // VFNMADDPS4rr_REV |
| 84495 | 36456, // VFNMADDSD4mr |
| 84496 | 36460, // VFNMADDSD4mr_Int |
| 84497 | 36464, // VFNMADDSD4rm |
| 84498 | 36468, // VFNMADDSD4rm_Int |
| 84499 | 36472, // VFNMADDSD4rr |
| 84500 | 36476, // VFNMADDSD4rr_Int |
| 84501 | 36480, // VFNMADDSD4rr_Int_REV |
| 84502 | 36484, // VFNMADDSD4rr_REV |
| 84503 | 36488, // VFNMADDSS4mr |
| 84504 | 36492, // VFNMADDSS4mr_Int |
| 84505 | 36496, // VFNMADDSS4rm |
| 84506 | 36500, // VFNMADDSS4rm_Int |
| 84507 | 36504, // VFNMADDSS4rr |
| 84508 | 36508, // VFNMADDSS4rr_Int |
| 84509 | 36512, // VFNMADDSS4rr_Int_REV |
| 84510 | 36516, // VFNMADDSS4rr_REV |
| 84511 | 36520, // VFNMSUB132BF16Z128m |
| 84512 | 36524, // VFNMSUB132BF16Z128mb |
| 84513 | 36528, // VFNMSUB132BF16Z128mbk |
| 84514 | 36533, // VFNMSUB132BF16Z128mbkz |
| 84515 | 36538, // VFNMSUB132BF16Z128mk |
| 84516 | 36543, // VFNMSUB132BF16Z128mkz |
| 84517 | 36548, // VFNMSUB132BF16Z128r |
| 84518 | 36552, // VFNMSUB132BF16Z128rk |
| 84519 | 36557, // VFNMSUB132BF16Z128rkz |
| 84520 | 36562, // VFNMSUB132BF16Z256m |
| 84521 | 36566, // VFNMSUB132BF16Z256mb |
| 84522 | 36570, // VFNMSUB132BF16Z256mbk |
| 84523 | 36575, // VFNMSUB132BF16Z256mbkz |
| 84524 | 36580, // VFNMSUB132BF16Z256mk |
| 84525 | 36585, // VFNMSUB132BF16Z256mkz |
| 84526 | 36590, // VFNMSUB132BF16Z256r |
| 84527 | 36594, // VFNMSUB132BF16Z256rk |
| 84528 | 36599, // VFNMSUB132BF16Z256rkz |
| 84529 | 36604, // VFNMSUB132BF16Zm |
| 84530 | 36608, // VFNMSUB132BF16Zmb |
| 84531 | 36612, // VFNMSUB132BF16Zmbk |
| 84532 | 36617, // VFNMSUB132BF16Zmbkz |
| 84533 | 36622, // VFNMSUB132BF16Zmk |
| 84534 | 36627, // VFNMSUB132BF16Zmkz |
| 84535 | 36632, // VFNMSUB132BF16Zr |
| 84536 | 36636, // VFNMSUB132BF16Zrk |
| 84537 | 36641, // VFNMSUB132BF16Zrkz |
| 84538 | 36646, // VFNMSUB132PDYm |
| 84539 | 36650, // VFNMSUB132PDYr |
| 84540 | 36654, // VFNMSUB132PDZ128m |
| 84541 | 36658, // VFNMSUB132PDZ128mb |
| 84542 | 36662, // VFNMSUB132PDZ128mbk |
| 84543 | 36667, // VFNMSUB132PDZ128mbkz |
| 84544 | 36672, // VFNMSUB132PDZ128mk |
| 84545 | 36677, // VFNMSUB132PDZ128mkz |
| 84546 | 36682, // VFNMSUB132PDZ128r |
| 84547 | 36686, // VFNMSUB132PDZ128rk |
| 84548 | 36691, // VFNMSUB132PDZ128rkz |
| 84549 | 36696, // VFNMSUB132PDZ256m |
| 84550 | 36700, // VFNMSUB132PDZ256mb |
| 84551 | 36704, // VFNMSUB132PDZ256mbk |
| 84552 | 36709, // VFNMSUB132PDZ256mbkz |
| 84553 | 36714, // VFNMSUB132PDZ256mk |
| 84554 | 36719, // VFNMSUB132PDZ256mkz |
| 84555 | 36724, // VFNMSUB132PDZ256r |
| 84556 | 36728, // VFNMSUB132PDZ256rk |
| 84557 | 36733, // VFNMSUB132PDZ256rkz |
| 84558 | 36738, // VFNMSUB132PDZm |
| 84559 | 36742, // VFNMSUB132PDZmb |
| 84560 | 36746, // VFNMSUB132PDZmbk |
| 84561 | 36751, // VFNMSUB132PDZmbkz |
| 84562 | 36756, // VFNMSUB132PDZmk |
| 84563 | 36761, // VFNMSUB132PDZmkz |
| 84564 | 36766, // VFNMSUB132PDZr |
| 84565 | 36770, // VFNMSUB132PDZrb |
| 84566 | 36775, // VFNMSUB132PDZrbk |
| 84567 | 36781, // VFNMSUB132PDZrbkz |
| 84568 | 36787, // VFNMSUB132PDZrk |
| 84569 | 36792, // VFNMSUB132PDZrkz |
| 84570 | 36797, // VFNMSUB132PDm |
| 84571 | 36801, // VFNMSUB132PDr |
| 84572 | 36805, // VFNMSUB132PHZ128m |
| 84573 | 36809, // VFNMSUB132PHZ128mb |
| 84574 | 36813, // VFNMSUB132PHZ128mbk |
| 84575 | 36818, // VFNMSUB132PHZ128mbkz |
| 84576 | 36823, // VFNMSUB132PHZ128mk |
| 84577 | 36828, // VFNMSUB132PHZ128mkz |
| 84578 | 36833, // VFNMSUB132PHZ128r |
| 84579 | 36837, // VFNMSUB132PHZ128rk |
| 84580 | 36842, // VFNMSUB132PHZ128rkz |
| 84581 | 36847, // VFNMSUB132PHZ256m |
| 84582 | 36851, // VFNMSUB132PHZ256mb |
| 84583 | 36855, // VFNMSUB132PHZ256mbk |
| 84584 | 36860, // VFNMSUB132PHZ256mbkz |
| 84585 | 36865, // VFNMSUB132PHZ256mk |
| 84586 | 36870, // VFNMSUB132PHZ256mkz |
| 84587 | 36875, // VFNMSUB132PHZ256r |
| 84588 | 36879, // VFNMSUB132PHZ256rk |
| 84589 | 36884, // VFNMSUB132PHZ256rkz |
| 84590 | 36889, // VFNMSUB132PHZm |
| 84591 | 36893, // VFNMSUB132PHZmb |
| 84592 | 36897, // VFNMSUB132PHZmbk |
| 84593 | 36902, // VFNMSUB132PHZmbkz |
| 84594 | 36907, // VFNMSUB132PHZmk |
| 84595 | 36912, // VFNMSUB132PHZmkz |
| 84596 | 36917, // VFNMSUB132PHZr |
| 84597 | 36921, // VFNMSUB132PHZrb |
| 84598 | 36926, // VFNMSUB132PHZrbk |
| 84599 | 36932, // VFNMSUB132PHZrbkz |
| 84600 | 36938, // VFNMSUB132PHZrk |
| 84601 | 36943, // VFNMSUB132PHZrkz |
| 84602 | 36948, // VFNMSUB132PSYm |
| 84603 | 36952, // VFNMSUB132PSYr |
| 84604 | 36956, // VFNMSUB132PSZ128m |
| 84605 | 36960, // VFNMSUB132PSZ128mb |
| 84606 | 36964, // VFNMSUB132PSZ128mbk |
| 84607 | 36969, // VFNMSUB132PSZ128mbkz |
| 84608 | 36974, // VFNMSUB132PSZ128mk |
| 84609 | 36979, // VFNMSUB132PSZ128mkz |
| 84610 | 36984, // VFNMSUB132PSZ128r |
| 84611 | 36988, // VFNMSUB132PSZ128rk |
| 84612 | 36993, // VFNMSUB132PSZ128rkz |
| 84613 | 36998, // VFNMSUB132PSZ256m |
| 84614 | 37002, // VFNMSUB132PSZ256mb |
| 84615 | 37006, // VFNMSUB132PSZ256mbk |
| 84616 | 37011, // VFNMSUB132PSZ256mbkz |
| 84617 | 37016, // VFNMSUB132PSZ256mk |
| 84618 | 37021, // VFNMSUB132PSZ256mkz |
| 84619 | 37026, // VFNMSUB132PSZ256r |
| 84620 | 37030, // VFNMSUB132PSZ256rk |
| 84621 | 37035, // VFNMSUB132PSZ256rkz |
| 84622 | 37040, // VFNMSUB132PSZm |
| 84623 | 37044, // VFNMSUB132PSZmb |
| 84624 | 37048, // VFNMSUB132PSZmbk |
| 84625 | 37053, // VFNMSUB132PSZmbkz |
| 84626 | 37058, // VFNMSUB132PSZmk |
| 84627 | 37063, // VFNMSUB132PSZmkz |
| 84628 | 37068, // VFNMSUB132PSZr |
| 84629 | 37072, // VFNMSUB132PSZrb |
| 84630 | 37077, // VFNMSUB132PSZrbk |
| 84631 | 37083, // VFNMSUB132PSZrbkz |
| 84632 | 37089, // VFNMSUB132PSZrk |
| 84633 | 37094, // VFNMSUB132PSZrkz |
| 84634 | 37099, // VFNMSUB132PSm |
| 84635 | 37103, // VFNMSUB132PSr |
| 84636 | 37107, // VFNMSUB132SDZm |
| 84637 | 37111, // VFNMSUB132SDZm_Int |
| 84638 | 37115, // VFNMSUB132SDZmk_Int |
| 84639 | 37120, // VFNMSUB132SDZmkz_Int |
| 84640 | 37125, // VFNMSUB132SDZr |
| 84641 | 37129, // VFNMSUB132SDZr_Int |
| 84642 | 37133, // VFNMSUB132SDZrb |
| 84643 | 37138, // VFNMSUB132SDZrb_Int |
| 84644 | 37143, // VFNMSUB132SDZrbk_Int |
| 84645 | 37149, // VFNMSUB132SDZrbkz_Int |
| 84646 | 37155, // VFNMSUB132SDZrk_Int |
| 84647 | 37160, // VFNMSUB132SDZrkz_Int |
| 84648 | 37165, // VFNMSUB132SDm |
| 84649 | 37169, // VFNMSUB132SDm_Int |
| 84650 | 37173, // VFNMSUB132SDr |
| 84651 | 37177, // VFNMSUB132SDr_Int |
| 84652 | 37181, // VFNMSUB132SHZm |
| 84653 | 37185, // VFNMSUB132SHZm_Int |
| 84654 | 37189, // VFNMSUB132SHZmk_Int |
| 84655 | 37194, // VFNMSUB132SHZmkz_Int |
| 84656 | 37199, // VFNMSUB132SHZr |
| 84657 | 37203, // VFNMSUB132SHZr_Int |
| 84658 | 37207, // VFNMSUB132SHZrb |
| 84659 | 37212, // VFNMSUB132SHZrb_Int |
| 84660 | 37217, // VFNMSUB132SHZrbk_Int |
| 84661 | 37223, // VFNMSUB132SHZrbkz_Int |
| 84662 | 37229, // VFNMSUB132SHZrk_Int |
| 84663 | 37234, // VFNMSUB132SHZrkz_Int |
| 84664 | 37239, // VFNMSUB132SSZm |
| 84665 | 37243, // VFNMSUB132SSZm_Int |
| 84666 | 37247, // VFNMSUB132SSZmk_Int |
| 84667 | 37252, // VFNMSUB132SSZmkz_Int |
| 84668 | 37257, // VFNMSUB132SSZr |
| 84669 | 37261, // VFNMSUB132SSZr_Int |
| 84670 | 37265, // VFNMSUB132SSZrb |
| 84671 | 37270, // VFNMSUB132SSZrb_Int |
| 84672 | 37275, // VFNMSUB132SSZrbk_Int |
| 84673 | 37281, // VFNMSUB132SSZrbkz_Int |
| 84674 | 37287, // VFNMSUB132SSZrk_Int |
| 84675 | 37292, // VFNMSUB132SSZrkz_Int |
| 84676 | 37297, // VFNMSUB132SSm |
| 84677 | 37301, // VFNMSUB132SSm_Int |
| 84678 | 37305, // VFNMSUB132SSr |
| 84679 | 37309, // VFNMSUB132SSr_Int |
| 84680 | 37313, // VFNMSUB213BF16Z128m |
| 84681 | 37317, // VFNMSUB213BF16Z128mb |
| 84682 | 37321, // VFNMSUB213BF16Z128mbk |
| 84683 | 37326, // VFNMSUB213BF16Z128mbkz |
| 84684 | 37331, // VFNMSUB213BF16Z128mk |
| 84685 | 37336, // VFNMSUB213BF16Z128mkz |
| 84686 | 37341, // VFNMSUB213BF16Z128r |
| 84687 | 37345, // VFNMSUB213BF16Z128rk |
| 84688 | 37350, // VFNMSUB213BF16Z128rkz |
| 84689 | 37355, // VFNMSUB213BF16Z256m |
| 84690 | 37359, // VFNMSUB213BF16Z256mb |
| 84691 | 37363, // VFNMSUB213BF16Z256mbk |
| 84692 | 37368, // VFNMSUB213BF16Z256mbkz |
| 84693 | 37373, // VFNMSUB213BF16Z256mk |
| 84694 | 37378, // VFNMSUB213BF16Z256mkz |
| 84695 | 37383, // VFNMSUB213BF16Z256r |
| 84696 | 37387, // VFNMSUB213BF16Z256rk |
| 84697 | 37392, // VFNMSUB213BF16Z256rkz |
| 84698 | 37397, // VFNMSUB213BF16Zm |
| 84699 | 37401, // VFNMSUB213BF16Zmb |
| 84700 | 37405, // VFNMSUB213BF16Zmbk |
| 84701 | 37410, // VFNMSUB213BF16Zmbkz |
| 84702 | 37415, // VFNMSUB213BF16Zmk |
| 84703 | 37420, // VFNMSUB213BF16Zmkz |
| 84704 | 37425, // VFNMSUB213BF16Zr |
| 84705 | 37429, // VFNMSUB213BF16Zrk |
| 84706 | 37434, // VFNMSUB213BF16Zrkz |
| 84707 | 37439, // VFNMSUB213PDYm |
| 84708 | 37443, // VFNMSUB213PDYr |
| 84709 | 37447, // VFNMSUB213PDZ128m |
| 84710 | 37451, // VFNMSUB213PDZ128mb |
| 84711 | 37455, // VFNMSUB213PDZ128mbk |
| 84712 | 37460, // VFNMSUB213PDZ128mbkz |
| 84713 | 37465, // VFNMSUB213PDZ128mk |
| 84714 | 37470, // VFNMSUB213PDZ128mkz |
| 84715 | 37475, // VFNMSUB213PDZ128r |
| 84716 | 37479, // VFNMSUB213PDZ128rk |
| 84717 | 37484, // VFNMSUB213PDZ128rkz |
| 84718 | 37489, // VFNMSUB213PDZ256m |
| 84719 | 37493, // VFNMSUB213PDZ256mb |
| 84720 | 37497, // VFNMSUB213PDZ256mbk |
| 84721 | 37502, // VFNMSUB213PDZ256mbkz |
| 84722 | 37507, // VFNMSUB213PDZ256mk |
| 84723 | 37512, // VFNMSUB213PDZ256mkz |
| 84724 | 37517, // VFNMSUB213PDZ256r |
| 84725 | 37521, // VFNMSUB213PDZ256rk |
| 84726 | 37526, // VFNMSUB213PDZ256rkz |
| 84727 | 37531, // VFNMSUB213PDZm |
| 84728 | 37535, // VFNMSUB213PDZmb |
| 84729 | 37539, // VFNMSUB213PDZmbk |
| 84730 | 37544, // VFNMSUB213PDZmbkz |
| 84731 | 37549, // VFNMSUB213PDZmk |
| 84732 | 37554, // VFNMSUB213PDZmkz |
| 84733 | 37559, // VFNMSUB213PDZr |
| 84734 | 37563, // VFNMSUB213PDZrb |
| 84735 | 37568, // VFNMSUB213PDZrbk |
| 84736 | 37574, // VFNMSUB213PDZrbkz |
| 84737 | 37580, // VFNMSUB213PDZrk |
| 84738 | 37585, // VFNMSUB213PDZrkz |
| 84739 | 37590, // VFNMSUB213PDm |
| 84740 | 37594, // VFNMSUB213PDr |
| 84741 | 37598, // VFNMSUB213PHZ128m |
| 84742 | 37602, // VFNMSUB213PHZ128mb |
| 84743 | 37606, // VFNMSUB213PHZ128mbk |
| 84744 | 37611, // VFNMSUB213PHZ128mbkz |
| 84745 | 37616, // VFNMSUB213PHZ128mk |
| 84746 | 37621, // VFNMSUB213PHZ128mkz |
| 84747 | 37626, // VFNMSUB213PHZ128r |
| 84748 | 37630, // VFNMSUB213PHZ128rk |
| 84749 | 37635, // VFNMSUB213PHZ128rkz |
| 84750 | 37640, // VFNMSUB213PHZ256m |
| 84751 | 37644, // VFNMSUB213PHZ256mb |
| 84752 | 37648, // VFNMSUB213PHZ256mbk |
| 84753 | 37653, // VFNMSUB213PHZ256mbkz |
| 84754 | 37658, // VFNMSUB213PHZ256mk |
| 84755 | 37663, // VFNMSUB213PHZ256mkz |
| 84756 | 37668, // VFNMSUB213PHZ256r |
| 84757 | 37672, // VFNMSUB213PHZ256rk |
| 84758 | 37677, // VFNMSUB213PHZ256rkz |
| 84759 | 37682, // VFNMSUB213PHZm |
| 84760 | 37686, // VFNMSUB213PHZmb |
| 84761 | 37690, // VFNMSUB213PHZmbk |
| 84762 | 37695, // VFNMSUB213PHZmbkz |
| 84763 | 37700, // VFNMSUB213PHZmk |
| 84764 | 37705, // VFNMSUB213PHZmkz |
| 84765 | 37710, // VFNMSUB213PHZr |
| 84766 | 37714, // VFNMSUB213PHZrb |
| 84767 | 37719, // VFNMSUB213PHZrbk |
| 84768 | 37725, // VFNMSUB213PHZrbkz |
| 84769 | 37731, // VFNMSUB213PHZrk |
| 84770 | 37736, // VFNMSUB213PHZrkz |
| 84771 | 37741, // VFNMSUB213PSYm |
| 84772 | 37745, // VFNMSUB213PSYr |
| 84773 | 37749, // VFNMSUB213PSZ128m |
| 84774 | 37753, // VFNMSUB213PSZ128mb |
| 84775 | 37757, // VFNMSUB213PSZ128mbk |
| 84776 | 37762, // VFNMSUB213PSZ128mbkz |
| 84777 | 37767, // VFNMSUB213PSZ128mk |
| 84778 | 37772, // VFNMSUB213PSZ128mkz |
| 84779 | 37777, // VFNMSUB213PSZ128r |
| 84780 | 37781, // VFNMSUB213PSZ128rk |
| 84781 | 37786, // VFNMSUB213PSZ128rkz |
| 84782 | 37791, // VFNMSUB213PSZ256m |
| 84783 | 37795, // VFNMSUB213PSZ256mb |
| 84784 | 37799, // VFNMSUB213PSZ256mbk |
| 84785 | 37804, // VFNMSUB213PSZ256mbkz |
| 84786 | 37809, // VFNMSUB213PSZ256mk |
| 84787 | 37814, // VFNMSUB213PSZ256mkz |
| 84788 | 37819, // VFNMSUB213PSZ256r |
| 84789 | 37823, // VFNMSUB213PSZ256rk |
| 84790 | 37828, // VFNMSUB213PSZ256rkz |
| 84791 | 37833, // VFNMSUB213PSZm |
| 84792 | 37837, // VFNMSUB213PSZmb |
| 84793 | 37841, // VFNMSUB213PSZmbk |
| 84794 | 37846, // VFNMSUB213PSZmbkz |
| 84795 | 37851, // VFNMSUB213PSZmk |
| 84796 | 37856, // VFNMSUB213PSZmkz |
| 84797 | 37861, // VFNMSUB213PSZr |
| 84798 | 37865, // VFNMSUB213PSZrb |
| 84799 | 37870, // VFNMSUB213PSZrbk |
| 84800 | 37876, // VFNMSUB213PSZrbkz |
| 84801 | 37882, // VFNMSUB213PSZrk |
| 84802 | 37887, // VFNMSUB213PSZrkz |
| 84803 | 37892, // VFNMSUB213PSm |
| 84804 | 37896, // VFNMSUB213PSr |
| 84805 | 37900, // VFNMSUB213SDZm |
| 84806 | 37904, // VFNMSUB213SDZm_Int |
| 84807 | 37908, // VFNMSUB213SDZmk_Int |
| 84808 | 37913, // VFNMSUB213SDZmkz_Int |
| 84809 | 37918, // VFNMSUB213SDZr |
| 84810 | 37922, // VFNMSUB213SDZr_Int |
| 84811 | 37926, // VFNMSUB213SDZrb |
| 84812 | 37931, // VFNMSUB213SDZrb_Int |
| 84813 | 37936, // VFNMSUB213SDZrbk_Int |
| 84814 | 37942, // VFNMSUB213SDZrbkz_Int |
| 84815 | 37948, // VFNMSUB213SDZrk_Int |
| 84816 | 37953, // VFNMSUB213SDZrkz_Int |
| 84817 | 37958, // VFNMSUB213SDm |
| 84818 | 37962, // VFNMSUB213SDm_Int |
| 84819 | 37966, // VFNMSUB213SDr |
| 84820 | 37970, // VFNMSUB213SDr_Int |
| 84821 | 37974, // VFNMSUB213SHZm |
| 84822 | 37978, // VFNMSUB213SHZm_Int |
| 84823 | 37982, // VFNMSUB213SHZmk_Int |
| 84824 | 37987, // VFNMSUB213SHZmkz_Int |
| 84825 | 37992, // VFNMSUB213SHZr |
| 84826 | 37996, // VFNMSUB213SHZr_Int |
| 84827 | 38000, // VFNMSUB213SHZrb |
| 84828 | 38005, // VFNMSUB213SHZrb_Int |
| 84829 | 38010, // VFNMSUB213SHZrbk_Int |
| 84830 | 38016, // VFNMSUB213SHZrbkz_Int |
| 84831 | 38022, // VFNMSUB213SHZrk_Int |
| 84832 | 38027, // VFNMSUB213SHZrkz_Int |
| 84833 | 38032, // VFNMSUB213SSZm |
| 84834 | 38036, // VFNMSUB213SSZm_Int |
| 84835 | 38040, // VFNMSUB213SSZmk_Int |
| 84836 | 38045, // VFNMSUB213SSZmkz_Int |
| 84837 | 38050, // VFNMSUB213SSZr |
| 84838 | 38054, // VFNMSUB213SSZr_Int |
| 84839 | 38058, // VFNMSUB213SSZrb |
| 84840 | 38063, // VFNMSUB213SSZrb_Int |
| 84841 | 38068, // VFNMSUB213SSZrbk_Int |
| 84842 | 38074, // VFNMSUB213SSZrbkz_Int |
| 84843 | 38080, // VFNMSUB213SSZrk_Int |
| 84844 | 38085, // VFNMSUB213SSZrkz_Int |
| 84845 | 38090, // VFNMSUB213SSm |
| 84846 | 38094, // VFNMSUB213SSm_Int |
| 84847 | 38098, // VFNMSUB213SSr |
| 84848 | 38102, // VFNMSUB213SSr_Int |
| 84849 | 38106, // VFNMSUB231BF16Z128m |
| 84850 | 38110, // VFNMSUB231BF16Z128mb |
| 84851 | 38114, // VFNMSUB231BF16Z128mbk |
| 84852 | 38119, // VFNMSUB231BF16Z128mbkz |
| 84853 | 38124, // VFNMSUB231BF16Z128mk |
| 84854 | 38129, // VFNMSUB231BF16Z128mkz |
| 84855 | 38134, // VFNMSUB231BF16Z128r |
| 84856 | 38138, // VFNMSUB231BF16Z128rk |
| 84857 | 38143, // VFNMSUB231BF16Z128rkz |
| 84858 | 38148, // VFNMSUB231BF16Z256m |
| 84859 | 38152, // VFNMSUB231BF16Z256mb |
| 84860 | 38156, // VFNMSUB231BF16Z256mbk |
| 84861 | 38161, // VFNMSUB231BF16Z256mbkz |
| 84862 | 38166, // VFNMSUB231BF16Z256mk |
| 84863 | 38171, // VFNMSUB231BF16Z256mkz |
| 84864 | 38176, // VFNMSUB231BF16Z256r |
| 84865 | 38180, // VFNMSUB231BF16Z256rk |
| 84866 | 38185, // VFNMSUB231BF16Z256rkz |
| 84867 | 38190, // VFNMSUB231BF16Zm |
| 84868 | 38194, // VFNMSUB231BF16Zmb |
| 84869 | 38198, // VFNMSUB231BF16Zmbk |
| 84870 | 38203, // VFNMSUB231BF16Zmbkz |
| 84871 | 38208, // VFNMSUB231BF16Zmk |
| 84872 | 38213, // VFNMSUB231BF16Zmkz |
| 84873 | 38218, // VFNMSUB231BF16Zr |
| 84874 | 38222, // VFNMSUB231BF16Zrk |
| 84875 | 38227, // VFNMSUB231BF16Zrkz |
| 84876 | 38232, // VFNMSUB231PDYm |
| 84877 | 38236, // VFNMSUB231PDYr |
| 84878 | 38240, // VFNMSUB231PDZ128m |
| 84879 | 38244, // VFNMSUB231PDZ128mb |
| 84880 | 38248, // VFNMSUB231PDZ128mbk |
| 84881 | 38253, // VFNMSUB231PDZ128mbkz |
| 84882 | 38258, // VFNMSUB231PDZ128mk |
| 84883 | 38263, // VFNMSUB231PDZ128mkz |
| 84884 | 38268, // VFNMSUB231PDZ128r |
| 84885 | 38272, // VFNMSUB231PDZ128rk |
| 84886 | 38277, // VFNMSUB231PDZ128rkz |
| 84887 | 38282, // VFNMSUB231PDZ256m |
| 84888 | 38286, // VFNMSUB231PDZ256mb |
| 84889 | 38290, // VFNMSUB231PDZ256mbk |
| 84890 | 38295, // VFNMSUB231PDZ256mbkz |
| 84891 | 38300, // VFNMSUB231PDZ256mk |
| 84892 | 38305, // VFNMSUB231PDZ256mkz |
| 84893 | 38310, // VFNMSUB231PDZ256r |
| 84894 | 38314, // VFNMSUB231PDZ256rk |
| 84895 | 38319, // VFNMSUB231PDZ256rkz |
| 84896 | 38324, // VFNMSUB231PDZm |
| 84897 | 38328, // VFNMSUB231PDZmb |
| 84898 | 38332, // VFNMSUB231PDZmbk |
| 84899 | 38337, // VFNMSUB231PDZmbkz |
| 84900 | 38342, // VFNMSUB231PDZmk |
| 84901 | 38347, // VFNMSUB231PDZmkz |
| 84902 | 38352, // VFNMSUB231PDZr |
| 84903 | 38356, // VFNMSUB231PDZrb |
| 84904 | 38361, // VFNMSUB231PDZrbk |
| 84905 | 38367, // VFNMSUB231PDZrbkz |
| 84906 | 38373, // VFNMSUB231PDZrk |
| 84907 | 38378, // VFNMSUB231PDZrkz |
| 84908 | 38383, // VFNMSUB231PDm |
| 84909 | 38387, // VFNMSUB231PDr |
| 84910 | 38391, // VFNMSUB231PHZ128m |
| 84911 | 38395, // VFNMSUB231PHZ128mb |
| 84912 | 38399, // VFNMSUB231PHZ128mbk |
| 84913 | 38404, // VFNMSUB231PHZ128mbkz |
| 84914 | 38409, // VFNMSUB231PHZ128mk |
| 84915 | 38414, // VFNMSUB231PHZ128mkz |
| 84916 | 38419, // VFNMSUB231PHZ128r |
| 84917 | 38423, // VFNMSUB231PHZ128rk |
| 84918 | 38428, // VFNMSUB231PHZ128rkz |
| 84919 | 38433, // VFNMSUB231PHZ256m |
| 84920 | 38437, // VFNMSUB231PHZ256mb |
| 84921 | 38441, // VFNMSUB231PHZ256mbk |
| 84922 | 38446, // VFNMSUB231PHZ256mbkz |
| 84923 | 38451, // VFNMSUB231PHZ256mk |
| 84924 | 38456, // VFNMSUB231PHZ256mkz |
| 84925 | 38461, // VFNMSUB231PHZ256r |
| 84926 | 38465, // VFNMSUB231PHZ256rk |
| 84927 | 38470, // VFNMSUB231PHZ256rkz |
| 84928 | 38475, // VFNMSUB231PHZm |
| 84929 | 38479, // VFNMSUB231PHZmb |
| 84930 | 38483, // VFNMSUB231PHZmbk |
| 84931 | 38488, // VFNMSUB231PHZmbkz |
| 84932 | 38493, // VFNMSUB231PHZmk |
| 84933 | 38498, // VFNMSUB231PHZmkz |
| 84934 | 38503, // VFNMSUB231PHZr |
| 84935 | 38507, // VFNMSUB231PHZrb |
| 84936 | 38512, // VFNMSUB231PHZrbk |
| 84937 | 38518, // VFNMSUB231PHZrbkz |
| 84938 | 38524, // VFNMSUB231PHZrk |
| 84939 | 38529, // VFNMSUB231PHZrkz |
| 84940 | 38534, // VFNMSUB231PSYm |
| 84941 | 38538, // VFNMSUB231PSYr |
| 84942 | 38542, // VFNMSUB231PSZ128m |
| 84943 | 38546, // VFNMSUB231PSZ128mb |
| 84944 | 38550, // VFNMSUB231PSZ128mbk |
| 84945 | 38555, // VFNMSUB231PSZ128mbkz |
| 84946 | 38560, // VFNMSUB231PSZ128mk |
| 84947 | 38565, // VFNMSUB231PSZ128mkz |
| 84948 | 38570, // VFNMSUB231PSZ128r |
| 84949 | 38574, // VFNMSUB231PSZ128rk |
| 84950 | 38579, // VFNMSUB231PSZ128rkz |
| 84951 | 38584, // VFNMSUB231PSZ256m |
| 84952 | 38588, // VFNMSUB231PSZ256mb |
| 84953 | 38592, // VFNMSUB231PSZ256mbk |
| 84954 | 38597, // VFNMSUB231PSZ256mbkz |
| 84955 | 38602, // VFNMSUB231PSZ256mk |
| 84956 | 38607, // VFNMSUB231PSZ256mkz |
| 84957 | 38612, // VFNMSUB231PSZ256r |
| 84958 | 38616, // VFNMSUB231PSZ256rk |
| 84959 | 38621, // VFNMSUB231PSZ256rkz |
| 84960 | 38626, // VFNMSUB231PSZm |
| 84961 | 38630, // VFNMSUB231PSZmb |
| 84962 | 38634, // VFNMSUB231PSZmbk |
| 84963 | 38639, // VFNMSUB231PSZmbkz |
| 84964 | 38644, // VFNMSUB231PSZmk |
| 84965 | 38649, // VFNMSUB231PSZmkz |
| 84966 | 38654, // VFNMSUB231PSZr |
| 84967 | 38658, // VFNMSUB231PSZrb |
| 84968 | 38663, // VFNMSUB231PSZrbk |
| 84969 | 38669, // VFNMSUB231PSZrbkz |
| 84970 | 38675, // VFNMSUB231PSZrk |
| 84971 | 38680, // VFNMSUB231PSZrkz |
| 84972 | 38685, // VFNMSUB231PSm |
| 84973 | 38689, // VFNMSUB231PSr |
| 84974 | 38693, // VFNMSUB231SDZm |
| 84975 | 38697, // VFNMSUB231SDZm_Int |
| 84976 | 38701, // VFNMSUB231SDZmk_Int |
| 84977 | 38706, // VFNMSUB231SDZmkz_Int |
| 84978 | 38711, // VFNMSUB231SDZr |
| 84979 | 38715, // VFNMSUB231SDZr_Int |
| 84980 | 38719, // VFNMSUB231SDZrb |
| 84981 | 38724, // VFNMSUB231SDZrb_Int |
| 84982 | 38729, // VFNMSUB231SDZrbk_Int |
| 84983 | 38735, // VFNMSUB231SDZrbkz_Int |
| 84984 | 38741, // VFNMSUB231SDZrk_Int |
| 84985 | 38746, // VFNMSUB231SDZrkz_Int |
| 84986 | 38751, // VFNMSUB231SDm |
| 84987 | 38755, // VFNMSUB231SDm_Int |
| 84988 | 38759, // VFNMSUB231SDr |
| 84989 | 38763, // VFNMSUB231SDr_Int |
| 84990 | 38767, // VFNMSUB231SHZm |
| 84991 | 38771, // VFNMSUB231SHZm_Int |
| 84992 | 38775, // VFNMSUB231SHZmk_Int |
| 84993 | 38780, // VFNMSUB231SHZmkz_Int |
| 84994 | 38785, // VFNMSUB231SHZr |
| 84995 | 38789, // VFNMSUB231SHZr_Int |
| 84996 | 38793, // VFNMSUB231SHZrb |
| 84997 | 38798, // VFNMSUB231SHZrb_Int |
| 84998 | 38803, // VFNMSUB231SHZrbk_Int |
| 84999 | 38809, // VFNMSUB231SHZrbkz_Int |
| 85000 | 38815, // VFNMSUB231SHZrk_Int |
| 85001 | 38820, // VFNMSUB231SHZrkz_Int |
| 85002 | 38825, // VFNMSUB231SSZm |
| 85003 | 38829, // VFNMSUB231SSZm_Int |
| 85004 | 38833, // VFNMSUB231SSZmk_Int |
| 85005 | 38838, // VFNMSUB231SSZmkz_Int |
| 85006 | 38843, // VFNMSUB231SSZr |
| 85007 | 38847, // VFNMSUB231SSZr_Int |
| 85008 | 38851, // VFNMSUB231SSZrb |
| 85009 | 38856, // VFNMSUB231SSZrb_Int |
| 85010 | 38861, // VFNMSUB231SSZrbk_Int |
| 85011 | 38867, // VFNMSUB231SSZrbkz_Int |
| 85012 | 38873, // VFNMSUB231SSZrk_Int |
| 85013 | 38878, // VFNMSUB231SSZrkz_Int |
| 85014 | 38883, // VFNMSUB231SSm |
| 85015 | 38887, // VFNMSUB231SSm_Int |
| 85016 | 38891, // VFNMSUB231SSr |
| 85017 | 38895, // VFNMSUB231SSr_Int |
| 85018 | 38899, // VFNMSUBPD4Ymr |
| 85019 | 38903, // VFNMSUBPD4Yrm |
| 85020 | 38907, // VFNMSUBPD4Yrr |
| 85021 | 38911, // VFNMSUBPD4Yrr_REV |
| 85022 | 38915, // VFNMSUBPD4mr |
| 85023 | 38919, // VFNMSUBPD4rm |
| 85024 | 38923, // VFNMSUBPD4rr |
| 85025 | 38927, // VFNMSUBPD4rr_REV |
| 85026 | 38931, // VFNMSUBPS4Ymr |
| 85027 | 38935, // VFNMSUBPS4Yrm |
| 85028 | 38939, // VFNMSUBPS4Yrr |
| 85029 | 38943, // VFNMSUBPS4Yrr_REV |
| 85030 | 38947, // VFNMSUBPS4mr |
| 85031 | 38951, // VFNMSUBPS4rm |
| 85032 | 38955, // VFNMSUBPS4rr |
| 85033 | 38959, // VFNMSUBPS4rr_REV |
| 85034 | 38963, // VFNMSUBSD4mr |
| 85035 | 38967, // VFNMSUBSD4mr_Int |
| 85036 | 38971, // VFNMSUBSD4rm |
| 85037 | 38975, // VFNMSUBSD4rm_Int |
| 85038 | 38979, // VFNMSUBSD4rr |
| 85039 | 38983, // VFNMSUBSD4rr_Int |
| 85040 | 38987, // VFNMSUBSD4rr_Int_REV |
| 85041 | 38991, // VFNMSUBSD4rr_REV |
| 85042 | 38995, // VFNMSUBSS4mr |
| 85043 | 38999, // VFNMSUBSS4mr_Int |
| 85044 | 39003, // VFNMSUBSS4rm |
| 85045 | 39007, // VFNMSUBSS4rm_Int |
| 85046 | 39011, // VFNMSUBSS4rr |
| 85047 | 39015, // VFNMSUBSS4rr_Int |
| 85048 | 39019, // VFNMSUBSS4rr_Int_REV |
| 85049 | 39023, // VFNMSUBSS4rr_REV |
| 85050 | 39027, // VFPCLASSBF16Z128mbi |
| 85051 | 39030, // VFPCLASSBF16Z128mbik |
| 85052 | 39034, // VFPCLASSBF16Z128mi |
| 85053 | 39037, // VFPCLASSBF16Z128mik |
| 85054 | 39041, // VFPCLASSBF16Z128ri |
| 85055 | 39044, // VFPCLASSBF16Z128rik |
| 85056 | 39048, // VFPCLASSBF16Z256mbi |
| 85057 | 39051, // VFPCLASSBF16Z256mbik |
| 85058 | 39055, // VFPCLASSBF16Z256mi |
| 85059 | 39058, // VFPCLASSBF16Z256mik |
| 85060 | 39062, // VFPCLASSBF16Z256ri |
| 85061 | 39065, // VFPCLASSBF16Z256rik |
| 85062 | 39069, // VFPCLASSBF16Zmbi |
| 85063 | 39072, // VFPCLASSBF16Zmbik |
| 85064 | 39076, // VFPCLASSBF16Zmi |
| 85065 | 39079, // VFPCLASSBF16Zmik |
| 85066 | 39083, // VFPCLASSBF16Zri |
| 85067 | 39086, // VFPCLASSBF16Zrik |
| 85068 | 39090, // VFPCLASSPDZ128mbi |
| 85069 | 39093, // VFPCLASSPDZ128mbik |
| 85070 | 39097, // VFPCLASSPDZ128mi |
| 85071 | 39100, // VFPCLASSPDZ128mik |
| 85072 | 39104, // VFPCLASSPDZ128ri |
| 85073 | 39107, // VFPCLASSPDZ128rik |
| 85074 | 39111, // VFPCLASSPDZ256mbi |
| 85075 | 39114, // VFPCLASSPDZ256mbik |
| 85076 | 39118, // VFPCLASSPDZ256mi |
| 85077 | 39121, // VFPCLASSPDZ256mik |
| 85078 | 39125, // VFPCLASSPDZ256ri |
| 85079 | 39128, // VFPCLASSPDZ256rik |
| 85080 | 39132, // VFPCLASSPDZmbi |
| 85081 | 39135, // VFPCLASSPDZmbik |
| 85082 | 39139, // VFPCLASSPDZmi |
| 85083 | 39142, // VFPCLASSPDZmik |
| 85084 | 39146, // VFPCLASSPDZri |
| 85085 | 39149, // VFPCLASSPDZrik |
| 85086 | 39153, // VFPCLASSPHZ128mbi |
| 85087 | 39156, // VFPCLASSPHZ128mbik |
| 85088 | 39160, // VFPCLASSPHZ128mi |
| 85089 | 39163, // VFPCLASSPHZ128mik |
| 85090 | 39167, // VFPCLASSPHZ128ri |
| 85091 | 39170, // VFPCLASSPHZ128rik |
| 85092 | 39174, // VFPCLASSPHZ256mbi |
| 85093 | 39177, // VFPCLASSPHZ256mbik |
| 85094 | 39181, // VFPCLASSPHZ256mi |
| 85095 | 39184, // VFPCLASSPHZ256mik |
| 85096 | 39188, // VFPCLASSPHZ256ri |
| 85097 | 39191, // VFPCLASSPHZ256rik |
| 85098 | 39195, // VFPCLASSPHZmbi |
| 85099 | 39198, // VFPCLASSPHZmbik |
| 85100 | 39202, // VFPCLASSPHZmi |
| 85101 | 39205, // VFPCLASSPHZmik |
| 85102 | 39209, // VFPCLASSPHZri |
| 85103 | 39212, // VFPCLASSPHZrik |
| 85104 | 39216, // VFPCLASSPSZ128mbi |
| 85105 | 39219, // VFPCLASSPSZ128mbik |
| 85106 | 39223, // VFPCLASSPSZ128mi |
| 85107 | 39226, // VFPCLASSPSZ128mik |
| 85108 | 39230, // VFPCLASSPSZ128ri |
| 85109 | 39233, // VFPCLASSPSZ128rik |
| 85110 | 39237, // VFPCLASSPSZ256mbi |
| 85111 | 39240, // VFPCLASSPSZ256mbik |
| 85112 | 39244, // VFPCLASSPSZ256mi |
| 85113 | 39247, // VFPCLASSPSZ256mik |
| 85114 | 39251, // VFPCLASSPSZ256ri |
| 85115 | 39254, // VFPCLASSPSZ256rik |
| 85116 | 39258, // VFPCLASSPSZmbi |
| 85117 | 39261, // VFPCLASSPSZmbik |
| 85118 | 39265, // VFPCLASSPSZmi |
| 85119 | 39268, // VFPCLASSPSZmik |
| 85120 | 39272, // VFPCLASSPSZri |
| 85121 | 39275, // VFPCLASSPSZrik |
| 85122 | 39279, // VFPCLASSSDZmi |
| 85123 | 39282, // VFPCLASSSDZmik |
| 85124 | 39286, // VFPCLASSSDZri |
| 85125 | 39289, // VFPCLASSSDZrik |
| 85126 | 39293, // VFPCLASSSHZmi |
| 85127 | 39296, // VFPCLASSSHZmik |
| 85128 | 39300, // VFPCLASSSHZri |
| 85129 | 39303, // VFPCLASSSHZrik |
| 85130 | 39307, // VFPCLASSSSZmi |
| 85131 | 39310, // VFPCLASSSSZmik |
| 85132 | 39314, // VFPCLASSSSZri |
| 85133 | 39317, // VFPCLASSSSZrik |
| 85134 | 39321, // VFRCZPDYrm |
| 85135 | 39323, // VFRCZPDYrr |
| 85136 | 39325, // VFRCZPDrm |
| 85137 | 39327, // VFRCZPDrr |
| 85138 | 39329, // VFRCZPSYrm |
| 85139 | 39331, // VFRCZPSYrr |
| 85140 | 39333, // VFRCZPSrm |
| 85141 | 39335, // VFRCZPSrr |
| 85142 | 39337, // VFRCZSDrm |
| 85143 | 39339, // VFRCZSDrr |
| 85144 | 39341, // VFRCZSSrm |
| 85145 | 39343, // VFRCZSSrr |
| 85146 | 39345, // VGATHERDPDYrm |
| 85147 | 39350, // VGATHERDPDZ128rm |
| 85148 | 39355, // VGATHERDPDZ256rm |
| 85149 | 39360, // VGATHERDPDZrm |
| 85150 | 39365, // VGATHERDPDrm |
| 85151 | 39370, // VGATHERDPSYrm |
| 85152 | 39375, // VGATHERDPSZ128rm |
| 85153 | 39380, // VGATHERDPSZ256rm |
| 85154 | 39385, // VGATHERDPSZrm |
| 85155 | 39390, // VGATHERDPSrm |
| 85156 | 39395, // VGATHERPF0DPDm |
| 85157 | 39397, // VGATHERPF0DPSm |
| 85158 | 39399, // VGATHERPF0QPDm |
| 85159 | 39401, // VGATHERPF0QPSm |
| 85160 | 39403, // VGATHERPF1DPDm |
| 85161 | 39405, // VGATHERPF1DPSm |
| 85162 | 39407, // VGATHERPF1QPDm |
| 85163 | 39409, // VGATHERPF1QPSm |
| 85164 | 39411, // VGATHERQPDYrm |
| 85165 | 39416, // VGATHERQPDZ128rm |
| 85166 | 39421, // VGATHERQPDZ256rm |
| 85167 | 39426, // VGATHERQPDZrm |
| 85168 | 39431, // VGATHERQPDrm |
| 85169 | 39436, // VGATHERQPSYrm |
| 85170 | 39441, // VGATHERQPSZ128rm |
| 85171 | 39446, // VGATHERQPSZ256rm |
| 85172 | 39451, // VGATHERQPSZrm |
| 85173 | 39456, // VGATHERQPSrm |
| 85174 | 39461, // VGETEXPBF16Z128m |
| 85175 | 39463, // VGETEXPBF16Z128mb |
| 85176 | 39465, // VGETEXPBF16Z128mbk |
| 85177 | 39469, // VGETEXPBF16Z128mbkz |
| 85178 | 39472, // VGETEXPBF16Z128mk |
| 85179 | 39476, // VGETEXPBF16Z128mkz |
| 85180 | 39479, // VGETEXPBF16Z128r |
| 85181 | 39481, // VGETEXPBF16Z128rk |
| 85182 | 39485, // VGETEXPBF16Z128rkz |
| 85183 | 39488, // VGETEXPBF16Z256m |
| 85184 | 39490, // VGETEXPBF16Z256mb |
| 85185 | 39492, // VGETEXPBF16Z256mbk |
| 85186 | 39496, // VGETEXPBF16Z256mbkz |
| 85187 | 39499, // VGETEXPBF16Z256mk |
| 85188 | 39503, // VGETEXPBF16Z256mkz |
| 85189 | 39506, // VGETEXPBF16Z256r |
| 85190 | 39508, // VGETEXPBF16Z256rk |
| 85191 | 39512, // VGETEXPBF16Z256rkz |
| 85192 | 39515, // VGETEXPBF16Zm |
| 85193 | 39517, // VGETEXPBF16Zmb |
| 85194 | 39519, // VGETEXPBF16Zmbk |
| 85195 | 39523, // VGETEXPBF16Zmbkz |
| 85196 | 39526, // VGETEXPBF16Zmk |
| 85197 | 39530, // VGETEXPBF16Zmkz |
| 85198 | 39533, // VGETEXPBF16Zr |
| 85199 | 39535, // VGETEXPBF16Zrk |
| 85200 | 39539, // VGETEXPBF16Zrkz |
| 85201 | 39542, // VGETEXPPDZ128m |
| 85202 | 39544, // VGETEXPPDZ128mb |
| 85203 | 39546, // VGETEXPPDZ128mbk |
| 85204 | 39550, // VGETEXPPDZ128mbkz |
| 85205 | 39553, // VGETEXPPDZ128mk |
| 85206 | 39557, // VGETEXPPDZ128mkz |
| 85207 | 39560, // VGETEXPPDZ128r |
| 85208 | 39562, // VGETEXPPDZ128rk |
| 85209 | 39566, // VGETEXPPDZ128rkz |
| 85210 | 39569, // VGETEXPPDZ256m |
| 85211 | 39571, // VGETEXPPDZ256mb |
| 85212 | 39573, // VGETEXPPDZ256mbk |
| 85213 | 39577, // VGETEXPPDZ256mbkz |
| 85214 | 39580, // VGETEXPPDZ256mk |
| 85215 | 39584, // VGETEXPPDZ256mkz |
| 85216 | 39587, // VGETEXPPDZ256r |
| 85217 | 39589, // VGETEXPPDZ256rk |
| 85218 | 39593, // VGETEXPPDZ256rkz |
| 85219 | 39596, // VGETEXPPDZm |
| 85220 | 39598, // VGETEXPPDZmb |
| 85221 | 39600, // VGETEXPPDZmbk |
| 85222 | 39604, // VGETEXPPDZmbkz |
| 85223 | 39607, // VGETEXPPDZmk |
| 85224 | 39611, // VGETEXPPDZmkz |
| 85225 | 39614, // VGETEXPPDZr |
| 85226 | 39616, // VGETEXPPDZrb |
| 85227 | 39618, // VGETEXPPDZrbk |
| 85228 | 39622, // VGETEXPPDZrbkz |
| 85229 | 39625, // VGETEXPPDZrk |
| 85230 | 39629, // VGETEXPPDZrkz |
| 85231 | 39632, // VGETEXPPHZ128m |
| 85232 | 39634, // VGETEXPPHZ128mb |
| 85233 | 39636, // VGETEXPPHZ128mbk |
| 85234 | 39640, // VGETEXPPHZ128mbkz |
| 85235 | 39643, // VGETEXPPHZ128mk |
| 85236 | 39647, // VGETEXPPHZ128mkz |
| 85237 | 39650, // VGETEXPPHZ128r |
| 85238 | 39652, // VGETEXPPHZ128rk |
| 85239 | 39656, // VGETEXPPHZ128rkz |
| 85240 | 39659, // VGETEXPPHZ256m |
| 85241 | 39661, // VGETEXPPHZ256mb |
| 85242 | 39663, // VGETEXPPHZ256mbk |
| 85243 | 39667, // VGETEXPPHZ256mbkz |
| 85244 | 39670, // VGETEXPPHZ256mk |
| 85245 | 39674, // VGETEXPPHZ256mkz |
| 85246 | 39677, // VGETEXPPHZ256r |
| 85247 | 39679, // VGETEXPPHZ256rk |
| 85248 | 39683, // VGETEXPPHZ256rkz |
| 85249 | 39686, // VGETEXPPHZm |
| 85250 | 39688, // VGETEXPPHZmb |
| 85251 | 39690, // VGETEXPPHZmbk |
| 85252 | 39694, // VGETEXPPHZmbkz |
| 85253 | 39697, // VGETEXPPHZmk |
| 85254 | 39701, // VGETEXPPHZmkz |
| 85255 | 39704, // VGETEXPPHZr |
| 85256 | 39706, // VGETEXPPHZrb |
| 85257 | 39708, // VGETEXPPHZrbk |
| 85258 | 39712, // VGETEXPPHZrbkz |
| 85259 | 39715, // VGETEXPPHZrk |
| 85260 | 39719, // VGETEXPPHZrkz |
| 85261 | 39722, // VGETEXPPSZ128m |
| 85262 | 39724, // VGETEXPPSZ128mb |
| 85263 | 39726, // VGETEXPPSZ128mbk |
| 85264 | 39730, // VGETEXPPSZ128mbkz |
| 85265 | 39733, // VGETEXPPSZ128mk |
| 85266 | 39737, // VGETEXPPSZ128mkz |
| 85267 | 39740, // VGETEXPPSZ128r |
| 85268 | 39742, // VGETEXPPSZ128rk |
| 85269 | 39746, // VGETEXPPSZ128rkz |
| 85270 | 39749, // VGETEXPPSZ256m |
| 85271 | 39751, // VGETEXPPSZ256mb |
| 85272 | 39753, // VGETEXPPSZ256mbk |
| 85273 | 39757, // VGETEXPPSZ256mbkz |
| 85274 | 39760, // VGETEXPPSZ256mk |
| 85275 | 39764, // VGETEXPPSZ256mkz |
| 85276 | 39767, // VGETEXPPSZ256r |
| 85277 | 39769, // VGETEXPPSZ256rk |
| 85278 | 39773, // VGETEXPPSZ256rkz |
| 85279 | 39776, // VGETEXPPSZm |
| 85280 | 39778, // VGETEXPPSZmb |
| 85281 | 39780, // VGETEXPPSZmbk |
| 85282 | 39784, // VGETEXPPSZmbkz |
| 85283 | 39787, // VGETEXPPSZmk |
| 85284 | 39791, // VGETEXPPSZmkz |
| 85285 | 39794, // VGETEXPPSZr |
| 85286 | 39796, // VGETEXPPSZrb |
| 85287 | 39798, // VGETEXPPSZrbk |
| 85288 | 39802, // VGETEXPPSZrbkz |
| 85289 | 39805, // VGETEXPPSZrk |
| 85290 | 39809, // VGETEXPPSZrkz |
| 85291 | 39812, // VGETEXPSDZm |
| 85292 | 39815, // VGETEXPSDZmk |
| 85293 | 39820, // VGETEXPSDZmkz |
| 85294 | 39824, // VGETEXPSDZr |
| 85295 | 39827, // VGETEXPSDZrb |
| 85296 | 39830, // VGETEXPSDZrbk |
| 85297 | 39835, // VGETEXPSDZrbkz |
| 85298 | 39839, // VGETEXPSDZrk |
| 85299 | 39844, // VGETEXPSDZrkz |
| 85300 | 39848, // VGETEXPSHZm |
| 85301 | 39851, // VGETEXPSHZmk |
| 85302 | 39856, // VGETEXPSHZmkz |
| 85303 | 39860, // VGETEXPSHZr |
| 85304 | 39863, // VGETEXPSHZrb |
| 85305 | 39866, // VGETEXPSHZrbk |
| 85306 | 39871, // VGETEXPSHZrbkz |
| 85307 | 39875, // VGETEXPSHZrk |
| 85308 | 39880, // VGETEXPSHZrkz |
| 85309 | 39884, // VGETEXPSSZm |
| 85310 | 39887, // VGETEXPSSZmk |
| 85311 | 39892, // VGETEXPSSZmkz |
| 85312 | 39896, // VGETEXPSSZr |
| 85313 | 39899, // VGETEXPSSZrb |
| 85314 | 39902, // VGETEXPSSZrbk |
| 85315 | 39907, // VGETEXPSSZrbkz |
| 85316 | 39911, // VGETEXPSSZrk |
| 85317 | 39916, // VGETEXPSSZrkz |
| 85318 | 39920, // VGETMANTBF16Z128rmbi |
| 85319 | 39923, // VGETMANTBF16Z128rmbik |
| 85320 | 39928, // VGETMANTBF16Z128rmbikz |
| 85321 | 39932, // VGETMANTBF16Z128rmi |
| 85322 | 39935, // VGETMANTBF16Z128rmik |
| 85323 | 39940, // VGETMANTBF16Z128rmikz |
| 85324 | 39944, // VGETMANTBF16Z128rri |
| 85325 | 39947, // VGETMANTBF16Z128rrik |
| 85326 | 39952, // VGETMANTBF16Z128rrikz |
| 85327 | 39956, // VGETMANTBF16Z256rmbi |
| 85328 | 39959, // VGETMANTBF16Z256rmbik |
| 85329 | 39964, // VGETMANTBF16Z256rmbikz |
| 85330 | 39968, // VGETMANTBF16Z256rmi |
| 85331 | 39971, // VGETMANTBF16Z256rmik |
| 85332 | 39976, // VGETMANTBF16Z256rmikz |
| 85333 | 39980, // VGETMANTBF16Z256rri |
| 85334 | 39983, // VGETMANTBF16Z256rrik |
| 85335 | 39988, // VGETMANTBF16Z256rrikz |
| 85336 | 39992, // VGETMANTBF16Zrmbi |
| 85337 | 39995, // VGETMANTBF16Zrmbik |
| 85338 | 40000, // VGETMANTBF16Zrmbikz |
| 85339 | 40004, // VGETMANTBF16Zrmi |
| 85340 | 40007, // VGETMANTBF16Zrmik |
| 85341 | 40012, // VGETMANTBF16Zrmikz |
| 85342 | 40016, // VGETMANTBF16Zrri |
| 85343 | 40019, // VGETMANTBF16Zrrik |
| 85344 | 40024, // VGETMANTBF16Zrrikz |
| 85345 | 40028, // VGETMANTPDZ128rmbi |
| 85346 | 40031, // VGETMANTPDZ128rmbik |
| 85347 | 40036, // VGETMANTPDZ128rmbikz |
| 85348 | 40040, // VGETMANTPDZ128rmi |
| 85349 | 40043, // VGETMANTPDZ128rmik |
| 85350 | 40048, // VGETMANTPDZ128rmikz |
| 85351 | 40052, // VGETMANTPDZ128rri |
| 85352 | 40055, // VGETMANTPDZ128rrik |
| 85353 | 40060, // VGETMANTPDZ128rrikz |
| 85354 | 40064, // VGETMANTPDZ256rmbi |
| 85355 | 40067, // VGETMANTPDZ256rmbik |
| 85356 | 40072, // VGETMANTPDZ256rmbikz |
| 85357 | 40076, // VGETMANTPDZ256rmi |
| 85358 | 40079, // VGETMANTPDZ256rmik |
| 85359 | 40084, // VGETMANTPDZ256rmikz |
| 85360 | 40088, // VGETMANTPDZ256rri |
| 85361 | 40091, // VGETMANTPDZ256rrik |
| 85362 | 40096, // VGETMANTPDZ256rrikz |
| 85363 | 40100, // VGETMANTPDZrmbi |
| 85364 | 40103, // VGETMANTPDZrmbik |
| 85365 | 40108, // VGETMANTPDZrmbikz |
| 85366 | 40112, // VGETMANTPDZrmi |
| 85367 | 40115, // VGETMANTPDZrmik |
| 85368 | 40120, // VGETMANTPDZrmikz |
| 85369 | 40124, // VGETMANTPDZrri |
| 85370 | 40127, // VGETMANTPDZrrib |
| 85371 | 40130, // VGETMANTPDZrribk |
| 85372 | 40135, // VGETMANTPDZrribkz |
| 85373 | 40139, // VGETMANTPDZrrik |
| 85374 | 40144, // VGETMANTPDZrrikz |
| 85375 | 40148, // VGETMANTPHZ128rmbi |
| 85376 | 40151, // VGETMANTPHZ128rmbik |
| 85377 | 40156, // VGETMANTPHZ128rmbikz |
| 85378 | 40160, // VGETMANTPHZ128rmi |
| 85379 | 40163, // VGETMANTPHZ128rmik |
| 85380 | 40168, // VGETMANTPHZ128rmikz |
| 85381 | 40172, // VGETMANTPHZ128rri |
| 85382 | 40175, // VGETMANTPHZ128rrik |
| 85383 | 40180, // VGETMANTPHZ128rrikz |
| 85384 | 40184, // VGETMANTPHZ256rmbi |
| 85385 | 40187, // VGETMANTPHZ256rmbik |
| 85386 | 40192, // VGETMANTPHZ256rmbikz |
| 85387 | 40196, // VGETMANTPHZ256rmi |
| 85388 | 40199, // VGETMANTPHZ256rmik |
| 85389 | 40204, // VGETMANTPHZ256rmikz |
| 85390 | 40208, // VGETMANTPHZ256rri |
| 85391 | 40211, // VGETMANTPHZ256rrik |
| 85392 | 40216, // VGETMANTPHZ256rrikz |
| 85393 | 40220, // VGETMANTPHZrmbi |
| 85394 | 40223, // VGETMANTPHZrmbik |
| 85395 | 40228, // VGETMANTPHZrmbikz |
| 85396 | 40232, // VGETMANTPHZrmi |
| 85397 | 40235, // VGETMANTPHZrmik |
| 85398 | 40240, // VGETMANTPHZrmikz |
| 85399 | 40244, // VGETMANTPHZrri |
| 85400 | 40247, // VGETMANTPHZrrib |
| 85401 | 40250, // VGETMANTPHZrribk |
| 85402 | 40255, // VGETMANTPHZrribkz |
| 85403 | 40259, // VGETMANTPHZrrik |
| 85404 | 40264, // VGETMANTPHZrrikz |
| 85405 | 40268, // VGETMANTPSZ128rmbi |
| 85406 | 40271, // VGETMANTPSZ128rmbik |
| 85407 | 40276, // VGETMANTPSZ128rmbikz |
| 85408 | 40280, // VGETMANTPSZ128rmi |
| 85409 | 40283, // VGETMANTPSZ128rmik |
| 85410 | 40288, // VGETMANTPSZ128rmikz |
| 85411 | 40292, // VGETMANTPSZ128rri |
| 85412 | 40295, // VGETMANTPSZ128rrik |
| 85413 | 40300, // VGETMANTPSZ128rrikz |
| 85414 | 40304, // VGETMANTPSZ256rmbi |
| 85415 | 40307, // VGETMANTPSZ256rmbik |
| 85416 | 40312, // VGETMANTPSZ256rmbikz |
| 85417 | 40316, // VGETMANTPSZ256rmi |
| 85418 | 40319, // VGETMANTPSZ256rmik |
| 85419 | 40324, // VGETMANTPSZ256rmikz |
| 85420 | 40328, // VGETMANTPSZ256rri |
| 85421 | 40331, // VGETMANTPSZ256rrik |
| 85422 | 40336, // VGETMANTPSZ256rrikz |
| 85423 | 40340, // VGETMANTPSZrmbi |
| 85424 | 40343, // VGETMANTPSZrmbik |
| 85425 | 40348, // VGETMANTPSZrmbikz |
| 85426 | 40352, // VGETMANTPSZrmi |
| 85427 | 40355, // VGETMANTPSZrmik |
| 85428 | 40360, // VGETMANTPSZrmikz |
| 85429 | 40364, // VGETMANTPSZrri |
| 85430 | 40367, // VGETMANTPSZrrib |
| 85431 | 40370, // VGETMANTPSZrribk |
| 85432 | 40375, // VGETMANTPSZrribkz |
| 85433 | 40379, // VGETMANTPSZrrik |
| 85434 | 40384, // VGETMANTPSZrrikz |
| 85435 | 40388, // VGETMANTSDZrmi |
| 85436 | 40392, // VGETMANTSDZrmik |
| 85437 | 40398, // VGETMANTSDZrmikz |
| 85438 | 40403, // VGETMANTSDZrri |
| 85439 | 40407, // VGETMANTSDZrrib |
| 85440 | 40411, // VGETMANTSDZrribk |
| 85441 | 40417, // VGETMANTSDZrribkz |
| 85442 | 40422, // VGETMANTSDZrrik |
| 85443 | 40428, // VGETMANTSDZrrikz |
| 85444 | 40433, // VGETMANTSHZrmi |
| 85445 | 40437, // VGETMANTSHZrmik |
| 85446 | 40443, // VGETMANTSHZrmikz |
| 85447 | 40448, // VGETMANTSHZrri |
| 85448 | 40452, // VGETMANTSHZrrib |
| 85449 | 40456, // VGETMANTSHZrribk |
| 85450 | 40462, // VGETMANTSHZrribkz |
| 85451 | 40467, // VGETMANTSHZrrik |
| 85452 | 40473, // VGETMANTSHZrrikz |
| 85453 | 40478, // VGETMANTSSZrmi |
| 85454 | 40482, // VGETMANTSSZrmik |
| 85455 | 40488, // VGETMANTSSZrmikz |
| 85456 | 40493, // VGETMANTSSZrri |
| 85457 | 40497, // VGETMANTSSZrrib |
| 85458 | 40501, // VGETMANTSSZrribk |
| 85459 | 40507, // VGETMANTSSZrribkz |
| 85460 | 40512, // VGETMANTSSZrrik |
| 85461 | 40518, // VGETMANTSSZrrikz |
| 85462 | 40523, // VGF2P8AFFINEINVQBYrmi |
| 85463 | 40527, // VGF2P8AFFINEINVQBYrri |
| 85464 | 40531, // VGF2P8AFFINEINVQBZ128rmbi |
| 85465 | 40535, // VGF2P8AFFINEINVQBZ128rmbik |
| 85466 | 40541, // VGF2P8AFFINEINVQBZ128rmbikz |
| 85467 | 40546, // VGF2P8AFFINEINVQBZ128rmi |
| 85468 | 40550, // VGF2P8AFFINEINVQBZ128rmik |
| 85469 | 40556, // VGF2P8AFFINEINVQBZ128rmikz |
| 85470 | 40561, // VGF2P8AFFINEINVQBZ128rri |
| 85471 | 40565, // VGF2P8AFFINEINVQBZ128rrik |
| 85472 | 40571, // VGF2P8AFFINEINVQBZ128rrikz |
| 85473 | 40576, // VGF2P8AFFINEINVQBZ256rmbi |
| 85474 | 40580, // VGF2P8AFFINEINVQBZ256rmbik |
| 85475 | 40586, // VGF2P8AFFINEINVQBZ256rmbikz |
| 85476 | 40591, // VGF2P8AFFINEINVQBZ256rmi |
| 85477 | 40595, // VGF2P8AFFINEINVQBZ256rmik |
| 85478 | 40601, // VGF2P8AFFINEINVQBZ256rmikz |
| 85479 | 40606, // VGF2P8AFFINEINVQBZ256rri |
| 85480 | 40610, // VGF2P8AFFINEINVQBZ256rrik |
| 85481 | 40616, // VGF2P8AFFINEINVQBZ256rrikz |
| 85482 | 40621, // VGF2P8AFFINEINVQBZrmbi |
| 85483 | 40625, // VGF2P8AFFINEINVQBZrmbik |
| 85484 | 40631, // VGF2P8AFFINEINVQBZrmbikz |
| 85485 | 40636, // VGF2P8AFFINEINVQBZrmi |
| 85486 | 40640, // VGF2P8AFFINEINVQBZrmik |
| 85487 | 40646, // VGF2P8AFFINEINVQBZrmikz |
| 85488 | 40651, // VGF2P8AFFINEINVQBZrri |
| 85489 | 40655, // VGF2P8AFFINEINVQBZrrik |
| 85490 | 40661, // VGF2P8AFFINEINVQBZrrikz |
| 85491 | 40666, // VGF2P8AFFINEINVQBrmi |
| 85492 | 40670, // VGF2P8AFFINEINVQBrri |
| 85493 | 40674, // VGF2P8AFFINEQBYrmi |
| 85494 | 40678, // VGF2P8AFFINEQBYrri |
| 85495 | 40682, // VGF2P8AFFINEQBZ128rmbi |
| 85496 | 40686, // VGF2P8AFFINEQBZ128rmbik |
| 85497 | 40692, // VGF2P8AFFINEQBZ128rmbikz |
| 85498 | 40697, // VGF2P8AFFINEQBZ128rmi |
| 85499 | 40701, // VGF2P8AFFINEQBZ128rmik |
| 85500 | 40707, // VGF2P8AFFINEQBZ128rmikz |
| 85501 | 40712, // VGF2P8AFFINEQBZ128rri |
| 85502 | 40716, // VGF2P8AFFINEQBZ128rrik |
| 85503 | 40722, // VGF2P8AFFINEQBZ128rrikz |
| 85504 | 40727, // VGF2P8AFFINEQBZ256rmbi |
| 85505 | 40731, // VGF2P8AFFINEQBZ256rmbik |
| 85506 | 40737, // VGF2P8AFFINEQBZ256rmbikz |
| 85507 | 40742, // VGF2P8AFFINEQBZ256rmi |
| 85508 | 40746, // VGF2P8AFFINEQBZ256rmik |
| 85509 | 40752, // VGF2P8AFFINEQBZ256rmikz |
| 85510 | 40757, // VGF2P8AFFINEQBZ256rri |
| 85511 | 40761, // VGF2P8AFFINEQBZ256rrik |
| 85512 | 40767, // VGF2P8AFFINEQBZ256rrikz |
| 85513 | 40772, // VGF2P8AFFINEQBZrmbi |
| 85514 | 40776, // VGF2P8AFFINEQBZrmbik |
| 85515 | 40782, // VGF2P8AFFINEQBZrmbikz |
| 85516 | 40787, // VGF2P8AFFINEQBZrmi |
| 85517 | 40791, // VGF2P8AFFINEQBZrmik |
| 85518 | 40797, // VGF2P8AFFINEQBZrmikz |
| 85519 | 40802, // VGF2P8AFFINEQBZrri |
| 85520 | 40806, // VGF2P8AFFINEQBZrrik |
| 85521 | 40812, // VGF2P8AFFINEQBZrrikz |
| 85522 | 40817, // VGF2P8AFFINEQBrmi |
| 85523 | 40821, // VGF2P8AFFINEQBrri |
| 85524 | 40825, // VGF2P8MULBYrm |
| 85525 | 40828, // VGF2P8MULBYrr |
| 85526 | 40831, // VGF2P8MULBZ128rm |
| 85527 | 40834, // VGF2P8MULBZ128rmk |
| 85528 | 40839, // VGF2P8MULBZ128rmkz |
| 85529 | 40843, // VGF2P8MULBZ128rr |
| 85530 | 40846, // VGF2P8MULBZ128rrk |
| 85531 | 40851, // VGF2P8MULBZ128rrkz |
| 85532 | 40855, // VGF2P8MULBZ256rm |
| 85533 | 40858, // VGF2P8MULBZ256rmk |
| 85534 | 40863, // VGF2P8MULBZ256rmkz |
| 85535 | 40867, // VGF2P8MULBZ256rr |
| 85536 | 40870, // VGF2P8MULBZ256rrk |
| 85537 | 40875, // VGF2P8MULBZ256rrkz |
| 85538 | 40879, // VGF2P8MULBZrm |
| 85539 | 40882, // VGF2P8MULBZrmk |
| 85540 | 40887, // VGF2P8MULBZrmkz |
| 85541 | 40891, // VGF2P8MULBZrr |
| 85542 | 40894, // VGF2P8MULBZrrk |
| 85543 | 40899, // VGF2P8MULBZrrkz |
| 85544 | 40903, // VGF2P8MULBrm |
| 85545 | 40906, // VGF2P8MULBrr |
| 85546 | 40909, // VHADDPDYrm |
| 85547 | 40912, // VHADDPDYrr |
| 85548 | 40915, // VHADDPDrm |
| 85549 | 40918, // VHADDPDrr |
| 85550 | 40921, // VHADDPSYrm |
| 85551 | 40924, // VHADDPSYrr |
| 85552 | 40927, // VHADDPSrm |
| 85553 | 40930, // VHADDPSrr |
| 85554 | 40933, // VHSUBPDYrm |
| 85555 | 40936, // VHSUBPDYrr |
| 85556 | 40939, // VHSUBPDrm |
| 85557 | 40942, // VHSUBPDrr |
| 85558 | 40945, // VHSUBPSYrm |
| 85559 | 40948, // VHSUBPSYrr |
| 85560 | 40951, // VHSUBPSrm |
| 85561 | 40954, // VHSUBPSrr |
| 85562 | 40957, // VINSERTF128rmi |
| 85563 | 40961, // VINSERTF128rri |
| 85564 | 40965, // VINSERTF32X4Z256rmi |
| 85565 | 40969, // VINSERTF32X4Z256rmik |
| 85566 | 40975, // VINSERTF32X4Z256rmikz |
| 85567 | 40980, // VINSERTF32X4Z256rri |
| 85568 | 40984, // VINSERTF32X4Z256rrik |
| 85569 | 40990, // VINSERTF32X4Z256rrikz |
| 85570 | 40995, // VINSERTF32X4Zrmi |
| 85571 | 40999, // VINSERTF32X4Zrmik |
| 85572 | 41005, // VINSERTF32X4Zrmikz |
| 85573 | 41010, // VINSERTF32X4Zrri |
| 85574 | 41014, // VINSERTF32X4Zrrik |
| 85575 | 41020, // VINSERTF32X4Zrrikz |
| 85576 | 41025, // VINSERTF32X8Zrmi |
| 85577 | 41029, // VINSERTF32X8Zrmik |
| 85578 | 41035, // VINSERTF32X8Zrmikz |
| 85579 | 41040, // VINSERTF32X8Zrri |
| 85580 | 41044, // VINSERTF32X8Zrrik |
| 85581 | 41050, // VINSERTF32X8Zrrikz |
| 85582 | 41055, // VINSERTF64X2Z256rmi |
| 85583 | 41059, // VINSERTF64X2Z256rmik |
| 85584 | 41065, // VINSERTF64X2Z256rmikz |
| 85585 | 41070, // VINSERTF64X2Z256rri |
| 85586 | 41074, // VINSERTF64X2Z256rrik |
| 85587 | 41080, // VINSERTF64X2Z256rrikz |
| 85588 | 41085, // VINSERTF64X2Zrmi |
| 85589 | 41089, // VINSERTF64X2Zrmik |
| 85590 | 41095, // VINSERTF64X2Zrmikz |
| 85591 | 41100, // VINSERTF64X2Zrri |
| 85592 | 41104, // VINSERTF64X2Zrrik |
| 85593 | 41110, // VINSERTF64X2Zrrikz |
| 85594 | 41115, // VINSERTF64X4Zrmi |
| 85595 | 41119, // VINSERTF64X4Zrmik |
| 85596 | 41125, // VINSERTF64X4Zrmikz |
| 85597 | 41130, // VINSERTF64X4Zrri |
| 85598 | 41134, // VINSERTF64X4Zrrik |
| 85599 | 41140, // VINSERTF64X4Zrrikz |
| 85600 | 41145, // VINSERTI128rmi |
| 85601 | 41149, // VINSERTI128rri |
| 85602 | 41153, // VINSERTI32X4Z256rmi |
| 85603 | 41157, // VINSERTI32X4Z256rmik |
| 85604 | 41163, // VINSERTI32X4Z256rmikz |
| 85605 | 41168, // VINSERTI32X4Z256rri |
| 85606 | 41172, // VINSERTI32X4Z256rrik |
| 85607 | 41178, // VINSERTI32X4Z256rrikz |
| 85608 | 41183, // VINSERTI32X4Zrmi |
| 85609 | 41187, // VINSERTI32X4Zrmik |
| 85610 | 41193, // VINSERTI32X4Zrmikz |
| 85611 | 41198, // VINSERTI32X4Zrri |
| 85612 | 41202, // VINSERTI32X4Zrrik |
| 85613 | 41208, // VINSERTI32X4Zrrikz |
| 85614 | 41213, // VINSERTI32X8Zrmi |
| 85615 | 41217, // VINSERTI32X8Zrmik |
| 85616 | 41223, // VINSERTI32X8Zrmikz |
| 85617 | 41228, // VINSERTI32X8Zrri |
| 85618 | 41232, // VINSERTI32X8Zrrik |
| 85619 | 41238, // VINSERTI32X8Zrrikz |
| 85620 | 41243, // VINSERTI64X2Z256rmi |
| 85621 | 41247, // VINSERTI64X2Z256rmik |
| 85622 | 41253, // VINSERTI64X2Z256rmikz |
| 85623 | 41258, // VINSERTI64X2Z256rri |
| 85624 | 41262, // VINSERTI64X2Z256rrik |
| 85625 | 41268, // VINSERTI64X2Z256rrikz |
| 85626 | 41273, // VINSERTI64X2Zrmi |
| 85627 | 41277, // VINSERTI64X2Zrmik |
| 85628 | 41283, // VINSERTI64X2Zrmikz |
| 85629 | 41288, // VINSERTI64X2Zrri |
| 85630 | 41292, // VINSERTI64X2Zrrik |
| 85631 | 41298, // VINSERTI64X2Zrrikz |
| 85632 | 41303, // VINSERTI64X4Zrmi |
| 85633 | 41307, // VINSERTI64X4Zrmik |
| 85634 | 41313, // VINSERTI64X4Zrmikz |
| 85635 | 41318, // VINSERTI64X4Zrri |
| 85636 | 41322, // VINSERTI64X4Zrrik |
| 85637 | 41328, // VINSERTI64X4Zrrikz |
| 85638 | 41333, // VINSERTPSZrmi |
| 85639 | 41337, // VINSERTPSZrri |
| 85640 | 41341, // VINSERTPSrmi |
| 85641 | 41345, // VINSERTPSrri |
| 85642 | 41349, // VLDDQUYrm |
| 85643 | 41351, // VLDDQUrm |
| 85644 | 41353, // VLDMXCSR |
| 85645 | 41354, // VMASKMOVDQU |
| 85646 | 41356, // VMASKMOVDQU64 |
| 85647 | 41358, // VMASKMOVPDYmr |
| 85648 | 41361, // VMASKMOVPDYrm |
| 85649 | 41364, // VMASKMOVPDmr |
| 85650 | 41367, // VMASKMOVPDrm |
| 85651 | 41370, // VMASKMOVPSYmr |
| 85652 | 41373, // VMASKMOVPSYrm |
| 85653 | 41376, // VMASKMOVPSmr |
| 85654 | 41379, // VMASKMOVPSrm |
| 85655 | 41382, // VMAXBF16Z128rm |
| 85656 | 41385, // VMAXBF16Z128rmb |
| 85657 | 41388, // VMAXBF16Z128rmbk |
| 85658 | 41393, // VMAXBF16Z128rmbkz |
| 85659 | 41397, // VMAXBF16Z128rmk |
| 85660 | 41402, // VMAXBF16Z128rmkz |
| 85661 | 41406, // VMAXBF16Z128rr |
| 85662 | 41409, // VMAXBF16Z128rrk |
| 85663 | 41414, // VMAXBF16Z128rrkz |
| 85664 | 41418, // VMAXBF16Z256rm |
| 85665 | 41421, // VMAXBF16Z256rmb |
| 85666 | 41424, // VMAXBF16Z256rmbk |
| 85667 | 41429, // VMAXBF16Z256rmbkz |
| 85668 | 41433, // VMAXBF16Z256rmk |
| 85669 | 41438, // VMAXBF16Z256rmkz |
| 85670 | 41442, // VMAXBF16Z256rr |
| 85671 | 41445, // VMAXBF16Z256rrk |
| 85672 | 41450, // VMAXBF16Z256rrkz |
| 85673 | 41454, // VMAXBF16Zrm |
| 85674 | 41457, // VMAXBF16Zrmb |
| 85675 | 41460, // VMAXBF16Zrmbk |
| 85676 | 41465, // VMAXBF16Zrmbkz |
| 85677 | 41469, // VMAXBF16Zrmk |
| 85678 | 41474, // VMAXBF16Zrmkz |
| 85679 | 41478, // VMAXBF16Zrr |
| 85680 | 41481, // VMAXBF16Zrrk |
| 85681 | 41486, // VMAXBF16Zrrkz |
| 85682 | 41490, // VMAXCPDYrm |
| 85683 | 41493, // VMAXCPDYrr |
| 85684 | 41496, // VMAXCPDZ128rm |
| 85685 | 41499, // VMAXCPDZ128rmb |
| 85686 | 41502, // VMAXCPDZ128rmbk |
| 85687 | 41507, // VMAXCPDZ128rmbkz |
| 85688 | 41511, // VMAXCPDZ128rmk |
| 85689 | 41516, // VMAXCPDZ128rmkz |
| 85690 | 41520, // VMAXCPDZ128rr |
| 85691 | 41523, // VMAXCPDZ128rrk |
| 85692 | 41528, // VMAXCPDZ128rrkz |
| 85693 | 41532, // VMAXCPDZ256rm |
| 85694 | 41535, // VMAXCPDZ256rmb |
| 85695 | 41538, // VMAXCPDZ256rmbk |
| 85696 | 41543, // VMAXCPDZ256rmbkz |
| 85697 | 41547, // VMAXCPDZ256rmk |
| 85698 | 41552, // VMAXCPDZ256rmkz |
| 85699 | 41556, // VMAXCPDZ256rr |
| 85700 | 41559, // VMAXCPDZ256rrk |
| 85701 | 41564, // VMAXCPDZ256rrkz |
| 85702 | 41568, // VMAXCPDZrm |
| 85703 | 41571, // VMAXCPDZrmb |
| 85704 | 41574, // VMAXCPDZrmbk |
| 85705 | 41579, // VMAXCPDZrmbkz |
| 85706 | 41583, // VMAXCPDZrmk |
| 85707 | 41588, // VMAXCPDZrmkz |
| 85708 | 41592, // VMAXCPDZrr |
| 85709 | 41595, // VMAXCPDZrrk |
| 85710 | 41600, // VMAXCPDZrrkz |
| 85711 | 41604, // VMAXCPDrm |
| 85712 | 41607, // VMAXCPDrr |
| 85713 | 41610, // VMAXCPHZ128rm |
| 85714 | 41613, // VMAXCPHZ128rmb |
| 85715 | 41616, // VMAXCPHZ128rmbk |
| 85716 | 41621, // VMAXCPHZ128rmbkz |
| 85717 | 41625, // VMAXCPHZ128rmk |
| 85718 | 41630, // VMAXCPHZ128rmkz |
| 85719 | 41634, // VMAXCPHZ128rr |
| 85720 | 41637, // VMAXCPHZ128rrk |
| 85721 | 41642, // VMAXCPHZ128rrkz |
| 85722 | 41646, // VMAXCPHZ256rm |
| 85723 | 41649, // VMAXCPHZ256rmb |
| 85724 | 41652, // VMAXCPHZ256rmbk |
| 85725 | 41657, // VMAXCPHZ256rmbkz |
| 85726 | 41661, // VMAXCPHZ256rmk |
| 85727 | 41666, // VMAXCPHZ256rmkz |
| 85728 | 41670, // VMAXCPHZ256rr |
| 85729 | 41673, // VMAXCPHZ256rrk |
| 85730 | 41678, // VMAXCPHZ256rrkz |
| 85731 | 41682, // VMAXCPHZrm |
| 85732 | 41685, // VMAXCPHZrmb |
| 85733 | 41688, // VMAXCPHZrmbk |
| 85734 | 41693, // VMAXCPHZrmbkz |
| 85735 | 41697, // VMAXCPHZrmk |
| 85736 | 41702, // VMAXCPHZrmkz |
| 85737 | 41706, // VMAXCPHZrr |
| 85738 | 41709, // VMAXCPHZrrk |
| 85739 | 41714, // VMAXCPHZrrkz |
| 85740 | 41718, // VMAXCPSYrm |
| 85741 | 41721, // VMAXCPSYrr |
| 85742 | 41724, // VMAXCPSZ128rm |
| 85743 | 41727, // VMAXCPSZ128rmb |
| 85744 | 41730, // VMAXCPSZ128rmbk |
| 85745 | 41735, // VMAXCPSZ128rmbkz |
| 85746 | 41739, // VMAXCPSZ128rmk |
| 85747 | 41744, // VMAXCPSZ128rmkz |
| 85748 | 41748, // VMAXCPSZ128rr |
| 85749 | 41751, // VMAXCPSZ128rrk |
| 85750 | 41756, // VMAXCPSZ128rrkz |
| 85751 | 41760, // VMAXCPSZ256rm |
| 85752 | 41763, // VMAXCPSZ256rmb |
| 85753 | 41766, // VMAXCPSZ256rmbk |
| 85754 | 41771, // VMAXCPSZ256rmbkz |
| 85755 | 41775, // VMAXCPSZ256rmk |
| 85756 | 41780, // VMAXCPSZ256rmkz |
| 85757 | 41784, // VMAXCPSZ256rr |
| 85758 | 41787, // VMAXCPSZ256rrk |
| 85759 | 41792, // VMAXCPSZ256rrkz |
| 85760 | 41796, // VMAXCPSZrm |
| 85761 | 41799, // VMAXCPSZrmb |
| 85762 | 41802, // VMAXCPSZrmbk |
| 85763 | 41807, // VMAXCPSZrmbkz |
| 85764 | 41811, // VMAXCPSZrmk |
| 85765 | 41816, // VMAXCPSZrmkz |
| 85766 | 41820, // VMAXCPSZrr |
| 85767 | 41823, // VMAXCPSZrrk |
| 85768 | 41828, // VMAXCPSZrrkz |
| 85769 | 41832, // VMAXCPSrm |
| 85770 | 41835, // VMAXCPSrr |
| 85771 | 41838, // VMAXCSDZrm |
| 85772 | 41841, // VMAXCSDZrr |
| 85773 | 41844, // VMAXCSDrm |
| 85774 | 41847, // VMAXCSDrr |
| 85775 | 41850, // VMAXCSHZrm |
| 85776 | 41853, // VMAXCSHZrr |
| 85777 | 41856, // VMAXCSSZrm |
| 85778 | 41859, // VMAXCSSZrr |
| 85779 | 41862, // VMAXCSSrm |
| 85780 | 41865, // VMAXCSSrr |
| 85781 | 41868, // VMAXPDYrm |
| 85782 | 41871, // VMAXPDYrr |
| 85783 | 41874, // VMAXPDZ128rm |
| 85784 | 41877, // VMAXPDZ128rmb |
| 85785 | 41880, // VMAXPDZ128rmbk |
| 85786 | 41885, // VMAXPDZ128rmbkz |
| 85787 | 41889, // VMAXPDZ128rmk |
| 85788 | 41894, // VMAXPDZ128rmkz |
| 85789 | 41898, // VMAXPDZ128rr |
| 85790 | 41901, // VMAXPDZ128rrk |
| 85791 | 41906, // VMAXPDZ128rrkz |
| 85792 | 41910, // VMAXPDZ256rm |
| 85793 | 41913, // VMAXPDZ256rmb |
| 85794 | 41916, // VMAXPDZ256rmbk |
| 85795 | 41921, // VMAXPDZ256rmbkz |
| 85796 | 41925, // VMAXPDZ256rmk |
| 85797 | 41930, // VMAXPDZ256rmkz |
| 85798 | 41934, // VMAXPDZ256rr |
| 85799 | 41937, // VMAXPDZ256rrk |
| 85800 | 41942, // VMAXPDZ256rrkz |
| 85801 | 41946, // VMAXPDZrm |
| 85802 | 41949, // VMAXPDZrmb |
| 85803 | 41952, // VMAXPDZrmbk |
| 85804 | 41957, // VMAXPDZrmbkz |
| 85805 | 41961, // VMAXPDZrmk |
| 85806 | 41966, // VMAXPDZrmkz |
| 85807 | 41970, // VMAXPDZrr |
| 85808 | 41973, // VMAXPDZrrb |
| 85809 | 41976, // VMAXPDZrrbk |
| 85810 | 41981, // VMAXPDZrrbkz |
| 85811 | 41985, // VMAXPDZrrk |
| 85812 | 41990, // VMAXPDZrrkz |
| 85813 | 41994, // VMAXPDrm |
| 85814 | 41997, // VMAXPDrr |
| 85815 | 42000, // VMAXPHZ128rm |
| 85816 | 42003, // VMAXPHZ128rmb |
| 85817 | 42006, // VMAXPHZ128rmbk |
| 85818 | 42011, // VMAXPHZ128rmbkz |
| 85819 | 42015, // VMAXPHZ128rmk |
| 85820 | 42020, // VMAXPHZ128rmkz |
| 85821 | 42024, // VMAXPHZ128rr |
| 85822 | 42027, // VMAXPHZ128rrk |
| 85823 | 42032, // VMAXPHZ128rrkz |
| 85824 | 42036, // VMAXPHZ256rm |
| 85825 | 42039, // VMAXPHZ256rmb |
| 85826 | 42042, // VMAXPHZ256rmbk |
| 85827 | 42047, // VMAXPHZ256rmbkz |
| 85828 | 42051, // VMAXPHZ256rmk |
| 85829 | 42056, // VMAXPHZ256rmkz |
| 85830 | 42060, // VMAXPHZ256rr |
| 85831 | 42063, // VMAXPHZ256rrk |
| 85832 | 42068, // VMAXPHZ256rrkz |
| 85833 | 42072, // VMAXPHZrm |
| 85834 | 42075, // VMAXPHZrmb |
| 85835 | 42078, // VMAXPHZrmbk |
| 85836 | 42083, // VMAXPHZrmbkz |
| 85837 | 42087, // VMAXPHZrmk |
| 85838 | 42092, // VMAXPHZrmkz |
| 85839 | 42096, // VMAXPHZrr |
| 85840 | 42099, // VMAXPHZrrb |
| 85841 | 42102, // VMAXPHZrrbk |
| 85842 | 42107, // VMAXPHZrrbkz |
| 85843 | 42111, // VMAXPHZrrk |
| 85844 | 42116, // VMAXPHZrrkz |
| 85845 | 42120, // VMAXPSYrm |
| 85846 | 42123, // VMAXPSYrr |
| 85847 | 42126, // VMAXPSZ128rm |
| 85848 | 42129, // VMAXPSZ128rmb |
| 85849 | 42132, // VMAXPSZ128rmbk |
| 85850 | 42137, // VMAXPSZ128rmbkz |
| 85851 | 42141, // VMAXPSZ128rmk |
| 85852 | 42146, // VMAXPSZ128rmkz |
| 85853 | 42150, // VMAXPSZ128rr |
| 85854 | 42153, // VMAXPSZ128rrk |
| 85855 | 42158, // VMAXPSZ128rrkz |
| 85856 | 42162, // VMAXPSZ256rm |
| 85857 | 42165, // VMAXPSZ256rmb |
| 85858 | 42168, // VMAXPSZ256rmbk |
| 85859 | 42173, // VMAXPSZ256rmbkz |
| 85860 | 42177, // VMAXPSZ256rmk |
| 85861 | 42182, // VMAXPSZ256rmkz |
| 85862 | 42186, // VMAXPSZ256rr |
| 85863 | 42189, // VMAXPSZ256rrk |
| 85864 | 42194, // VMAXPSZ256rrkz |
| 85865 | 42198, // VMAXPSZrm |
| 85866 | 42201, // VMAXPSZrmb |
| 85867 | 42204, // VMAXPSZrmbk |
| 85868 | 42209, // VMAXPSZrmbkz |
| 85869 | 42213, // VMAXPSZrmk |
| 85870 | 42218, // VMAXPSZrmkz |
| 85871 | 42222, // VMAXPSZrr |
| 85872 | 42225, // VMAXPSZrrb |
| 85873 | 42228, // VMAXPSZrrbk |
| 85874 | 42233, // VMAXPSZrrbkz |
| 85875 | 42237, // VMAXPSZrrk |
| 85876 | 42242, // VMAXPSZrrkz |
| 85877 | 42246, // VMAXPSrm |
| 85878 | 42249, // VMAXPSrr |
| 85879 | 42252, // VMAXSDZrm |
| 85880 | 42255, // VMAXSDZrm_Int |
| 85881 | 42258, // VMAXSDZrmk_Int |
| 85882 | 42263, // VMAXSDZrmkz_Int |
| 85883 | 42267, // VMAXSDZrr |
| 85884 | 42270, // VMAXSDZrr_Int |
| 85885 | 42273, // VMAXSDZrrb_Int |
| 85886 | 42276, // VMAXSDZrrbk_Int |
| 85887 | 42281, // VMAXSDZrrbkz_Int |
| 85888 | 42285, // VMAXSDZrrk_Int |
| 85889 | 42290, // VMAXSDZrrkz_Int |
| 85890 | 42294, // VMAXSDrm |
| 85891 | 42297, // VMAXSDrm_Int |
| 85892 | 42300, // VMAXSDrr |
| 85893 | 42303, // VMAXSDrr_Int |
| 85894 | 42306, // VMAXSHZrm |
| 85895 | 42309, // VMAXSHZrm_Int |
| 85896 | 42312, // VMAXSHZrmk_Int |
| 85897 | 42317, // VMAXSHZrmkz_Int |
| 85898 | 42321, // VMAXSHZrr |
| 85899 | 42324, // VMAXSHZrr_Int |
| 85900 | 42327, // VMAXSHZrrb_Int |
| 85901 | 42330, // VMAXSHZrrbk_Int |
| 85902 | 42335, // VMAXSHZrrbkz_Int |
| 85903 | 42339, // VMAXSHZrrk_Int |
| 85904 | 42344, // VMAXSHZrrkz_Int |
| 85905 | 42348, // VMAXSSZrm |
| 85906 | 42351, // VMAXSSZrm_Int |
| 85907 | 42354, // VMAXSSZrmk_Int |
| 85908 | 42359, // VMAXSSZrmkz_Int |
| 85909 | 42363, // VMAXSSZrr |
| 85910 | 42366, // VMAXSSZrr_Int |
| 85911 | 42369, // VMAXSSZrrb_Int |
| 85912 | 42372, // VMAXSSZrrbk_Int |
| 85913 | 42377, // VMAXSSZrrbkz_Int |
| 85914 | 42381, // VMAXSSZrrk_Int |
| 85915 | 42386, // VMAXSSZrrkz_Int |
| 85916 | 42390, // VMAXSSrm |
| 85917 | 42393, // VMAXSSrm_Int |
| 85918 | 42396, // VMAXSSrr |
| 85919 | 42399, // VMAXSSrr_Int |
| 85920 | 42402, // VMCALL |
| 85921 | 42402, // VMCLEARm |
| 85922 | 42403, // VMFUNC |
| 85923 | 42403, // VMINBF16Z128rm |
| 85924 | 42406, // VMINBF16Z128rmb |
| 85925 | 42409, // VMINBF16Z128rmbk |
| 85926 | 42414, // VMINBF16Z128rmbkz |
| 85927 | 42418, // VMINBF16Z128rmk |
| 85928 | 42423, // VMINBF16Z128rmkz |
| 85929 | 42427, // VMINBF16Z128rr |
| 85930 | 42430, // VMINBF16Z128rrk |
| 85931 | 42435, // VMINBF16Z128rrkz |
| 85932 | 42439, // VMINBF16Z256rm |
| 85933 | 42442, // VMINBF16Z256rmb |
| 85934 | 42445, // VMINBF16Z256rmbk |
| 85935 | 42450, // VMINBF16Z256rmbkz |
| 85936 | 42454, // VMINBF16Z256rmk |
| 85937 | 42459, // VMINBF16Z256rmkz |
| 85938 | 42463, // VMINBF16Z256rr |
| 85939 | 42466, // VMINBF16Z256rrk |
| 85940 | 42471, // VMINBF16Z256rrkz |
| 85941 | 42475, // VMINBF16Zrm |
| 85942 | 42478, // VMINBF16Zrmb |
| 85943 | 42481, // VMINBF16Zrmbk |
| 85944 | 42486, // VMINBF16Zrmbkz |
| 85945 | 42490, // VMINBF16Zrmk |
| 85946 | 42495, // VMINBF16Zrmkz |
| 85947 | 42499, // VMINBF16Zrr |
| 85948 | 42502, // VMINBF16Zrrk |
| 85949 | 42507, // VMINBF16Zrrkz |
| 85950 | 42511, // VMINCPDYrm |
| 85951 | 42514, // VMINCPDYrr |
| 85952 | 42517, // VMINCPDZ128rm |
| 85953 | 42520, // VMINCPDZ128rmb |
| 85954 | 42523, // VMINCPDZ128rmbk |
| 85955 | 42528, // VMINCPDZ128rmbkz |
| 85956 | 42532, // VMINCPDZ128rmk |
| 85957 | 42537, // VMINCPDZ128rmkz |
| 85958 | 42541, // VMINCPDZ128rr |
| 85959 | 42544, // VMINCPDZ128rrk |
| 85960 | 42549, // VMINCPDZ128rrkz |
| 85961 | 42553, // VMINCPDZ256rm |
| 85962 | 42556, // VMINCPDZ256rmb |
| 85963 | 42559, // VMINCPDZ256rmbk |
| 85964 | 42564, // VMINCPDZ256rmbkz |
| 85965 | 42568, // VMINCPDZ256rmk |
| 85966 | 42573, // VMINCPDZ256rmkz |
| 85967 | 42577, // VMINCPDZ256rr |
| 85968 | 42580, // VMINCPDZ256rrk |
| 85969 | 42585, // VMINCPDZ256rrkz |
| 85970 | 42589, // VMINCPDZrm |
| 85971 | 42592, // VMINCPDZrmb |
| 85972 | 42595, // VMINCPDZrmbk |
| 85973 | 42600, // VMINCPDZrmbkz |
| 85974 | 42604, // VMINCPDZrmk |
| 85975 | 42609, // VMINCPDZrmkz |
| 85976 | 42613, // VMINCPDZrr |
| 85977 | 42616, // VMINCPDZrrk |
| 85978 | 42621, // VMINCPDZrrkz |
| 85979 | 42625, // VMINCPDrm |
| 85980 | 42628, // VMINCPDrr |
| 85981 | 42631, // VMINCPHZ128rm |
| 85982 | 42634, // VMINCPHZ128rmb |
| 85983 | 42637, // VMINCPHZ128rmbk |
| 85984 | 42642, // VMINCPHZ128rmbkz |
| 85985 | 42646, // VMINCPHZ128rmk |
| 85986 | 42651, // VMINCPHZ128rmkz |
| 85987 | 42655, // VMINCPHZ128rr |
| 85988 | 42658, // VMINCPHZ128rrk |
| 85989 | 42663, // VMINCPHZ128rrkz |
| 85990 | 42667, // VMINCPHZ256rm |
| 85991 | 42670, // VMINCPHZ256rmb |
| 85992 | 42673, // VMINCPHZ256rmbk |
| 85993 | 42678, // VMINCPHZ256rmbkz |
| 85994 | 42682, // VMINCPHZ256rmk |
| 85995 | 42687, // VMINCPHZ256rmkz |
| 85996 | 42691, // VMINCPHZ256rr |
| 85997 | 42694, // VMINCPHZ256rrk |
| 85998 | 42699, // VMINCPHZ256rrkz |
| 85999 | 42703, // VMINCPHZrm |
| 86000 | 42706, // VMINCPHZrmb |
| 86001 | 42709, // VMINCPHZrmbk |
| 86002 | 42714, // VMINCPHZrmbkz |
| 86003 | 42718, // VMINCPHZrmk |
| 86004 | 42723, // VMINCPHZrmkz |
| 86005 | 42727, // VMINCPHZrr |
| 86006 | 42730, // VMINCPHZrrk |
| 86007 | 42735, // VMINCPHZrrkz |
| 86008 | 42739, // VMINCPSYrm |
| 86009 | 42742, // VMINCPSYrr |
| 86010 | 42745, // VMINCPSZ128rm |
| 86011 | 42748, // VMINCPSZ128rmb |
| 86012 | 42751, // VMINCPSZ128rmbk |
| 86013 | 42756, // VMINCPSZ128rmbkz |
| 86014 | 42760, // VMINCPSZ128rmk |
| 86015 | 42765, // VMINCPSZ128rmkz |
| 86016 | 42769, // VMINCPSZ128rr |
| 86017 | 42772, // VMINCPSZ128rrk |
| 86018 | 42777, // VMINCPSZ128rrkz |
| 86019 | 42781, // VMINCPSZ256rm |
| 86020 | 42784, // VMINCPSZ256rmb |
| 86021 | 42787, // VMINCPSZ256rmbk |
| 86022 | 42792, // VMINCPSZ256rmbkz |
| 86023 | 42796, // VMINCPSZ256rmk |
| 86024 | 42801, // VMINCPSZ256rmkz |
| 86025 | 42805, // VMINCPSZ256rr |
| 86026 | 42808, // VMINCPSZ256rrk |
| 86027 | 42813, // VMINCPSZ256rrkz |
| 86028 | 42817, // VMINCPSZrm |
| 86029 | 42820, // VMINCPSZrmb |
| 86030 | 42823, // VMINCPSZrmbk |
| 86031 | 42828, // VMINCPSZrmbkz |
| 86032 | 42832, // VMINCPSZrmk |
| 86033 | 42837, // VMINCPSZrmkz |
| 86034 | 42841, // VMINCPSZrr |
| 86035 | 42844, // VMINCPSZrrk |
| 86036 | 42849, // VMINCPSZrrkz |
| 86037 | 42853, // VMINCPSrm |
| 86038 | 42856, // VMINCPSrr |
| 86039 | 42859, // VMINCSDZrm |
| 86040 | 42862, // VMINCSDZrr |
| 86041 | 42865, // VMINCSDrm |
| 86042 | 42868, // VMINCSDrr |
| 86043 | 42871, // VMINCSHZrm |
| 86044 | 42874, // VMINCSHZrr |
| 86045 | 42877, // VMINCSSZrm |
| 86046 | 42880, // VMINCSSZrr |
| 86047 | 42883, // VMINCSSrm |
| 86048 | 42886, // VMINCSSrr |
| 86049 | 42889, // VMINMAXBF16Z128rmbi |
| 86050 | 42893, // VMINMAXBF16Z128rmbik |
| 86051 | 42899, // VMINMAXBF16Z128rmbikz |
| 86052 | 42904, // VMINMAXBF16Z128rmi |
| 86053 | 42908, // VMINMAXBF16Z128rmik |
| 86054 | 42914, // VMINMAXBF16Z128rmikz |
| 86055 | 42919, // VMINMAXBF16Z128rri |
| 86056 | 42923, // VMINMAXBF16Z128rrik |
| 86057 | 42929, // VMINMAXBF16Z128rrikz |
| 86058 | 42934, // VMINMAXBF16Z256rmbi |
| 86059 | 42938, // VMINMAXBF16Z256rmbik |
| 86060 | 42944, // VMINMAXBF16Z256rmbikz |
| 86061 | 42949, // VMINMAXBF16Z256rmi |
| 86062 | 42953, // VMINMAXBF16Z256rmik |
| 86063 | 42959, // VMINMAXBF16Z256rmikz |
| 86064 | 42964, // VMINMAXBF16Z256rri |
| 86065 | 42968, // VMINMAXBF16Z256rrik |
| 86066 | 42974, // VMINMAXBF16Z256rrikz |
| 86067 | 42979, // VMINMAXBF16Zrmbi |
| 86068 | 42983, // VMINMAXBF16Zrmbik |
| 86069 | 42989, // VMINMAXBF16Zrmbikz |
| 86070 | 42994, // VMINMAXBF16Zrmi |
| 86071 | 42998, // VMINMAXBF16Zrmik |
| 86072 | 43004, // VMINMAXBF16Zrmikz |
| 86073 | 43009, // VMINMAXBF16Zrri |
| 86074 | 43013, // VMINMAXBF16Zrrik |
| 86075 | 43019, // VMINMAXBF16Zrrikz |
| 86076 | 43024, // VMINMAXPDZ128rmbi |
| 86077 | 43028, // VMINMAXPDZ128rmbik |
| 86078 | 43034, // VMINMAXPDZ128rmbikz |
| 86079 | 43039, // VMINMAXPDZ128rmi |
| 86080 | 43043, // VMINMAXPDZ128rmik |
| 86081 | 43049, // VMINMAXPDZ128rmikz |
| 86082 | 43054, // VMINMAXPDZ128rri |
| 86083 | 43058, // VMINMAXPDZ128rrik |
| 86084 | 43064, // VMINMAXPDZ128rrikz |
| 86085 | 43069, // VMINMAXPDZ256rmbi |
| 86086 | 43073, // VMINMAXPDZ256rmbik |
| 86087 | 43079, // VMINMAXPDZ256rmbikz |
| 86088 | 43084, // VMINMAXPDZ256rmi |
| 86089 | 43088, // VMINMAXPDZ256rmik |
| 86090 | 43094, // VMINMAXPDZ256rmikz |
| 86091 | 43099, // VMINMAXPDZ256rri |
| 86092 | 43103, // VMINMAXPDZ256rrik |
| 86093 | 43109, // VMINMAXPDZ256rrikz |
| 86094 | 43114, // VMINMAXPDZrmbi |
| 86095 | 43118, // VMINMAXPDZrmbik |
| 86096 | 43124, // VMINMAXPDZrmbikz |
| 86097 | 43129, // VMINMAXPDZrmi |
| 86098 | 43133, // VMINMAXPDZrmik |
| 86099 | 43139, // VMINMAXPDZrmikz |
| 86100 | 43144, // VMINMAXPDZrri |
| 86101 | 43148, // VMINMAXPDZrrib |
| 86102 | 43152, // VMINMAXPDZrribk |
| 86103 | 43158, // VMINMAXPDZrribkz |
| 86104 | 43163, // VMINMAXPDZrrik |
| 86105 | 43169, // VMINMAXPDZrrikz |
| 86106 | 43174, // VMINMAXPHZ128rmbi |
| 86107 | 43178, // VMINMAXPHZ128rmbik |
| 86108 | 43184, // VMINMAXPHZ128rmbikz |
| 86109 | 43189, // VMINMAXPHZ128rmi |
| 86110 | 43193, // VMINMAXPHZ128rmik |
| 86111 | 43199, // VMINMAXPHZ128rmikz |
| 86112 | 43204, // VMINMAXPHZ128rri |
| 86113 | 43208, // VMINMAXPHZ128rrik |
| 86114 | 43214, // VMINMAXPHZ128rrikz |
| 86115 | 43219, // VMINMAXPHZ256rmbi |
| 86116 | 43223, // VMINMAXPHZ256rmbik |
| 86117 | 43229, // VMINMAXPHZ256rmbikz |
| 86118 | 43234, // VMINMAXPHZ256rmi |
| 86119 | 43238, // VMINMAXPHZ256rmik |
| 86120 | 43244, // VMINMAXPHZ256rmikz |
| 86121 | 43249, // VMINMAXPHZ256rri |
| 86122 | 43253, // VMINMAXPHZ256rrik |
| 86123 | 43259, // VMINMAXPHZ256rrikz |
| 86124 | 43264, // VMINMAXPHZrmbi |
| 86125 | 43268, // VMINMAXPHZrmbik |
| 86126 | 43274, // VMINMAXPHZrmbikz |
| 86127 | 43279, // VMINMAXPHZrmi |
| 86128 | 43283, // VMINMAXPHZrmik |
| 86129 | 43289, // VMINMAXPHZrmikz |
| 86130 | 43294, // VMINMAXPHZrri |
| 86131 | 43298, // VMINMAXPHZrrib |
| 86132 | 43302, // VMINMAXPHZrribk |
| 86133 | 43308, // VMINMAXPHZrribkz |
| 86134 | 43313, // VMINMAXPHZrrik |
| 86135 | 43319, // VMINMAXPHZrrikz |
| 86136 | 43324, // VMINMAXPSZ128rmbi |
| 86137 | 43328, // VMINMAXPSZ128rmbik |
| 86138 | 43334, // VMINMAXPSZ128rmbikz |
| 86139 | 43339, // VMINMAXPSZ128rmi |
| 86140 | 43343, // VMINMAXPSZ128rmik |
| 86141 | 43349, // VMINMAXPSZ128rmikz |
| 86142 | 43354, // VMINMAXPSZ128rri |
| 86143 | 43358, // VMINMAXPSZ128rrik |
| 86144 | 43364, // VMINMAXPSZ128rrikz |
| 86145 | 43369, // VMINMAXPSZ256rmbi |
| 86146 | 43373, // VMINMAXPSZ256rmbik |
| 86147 | 43379, // VMINMAXPSZ256rmbikz |
| 86148 | 43384, // VMINMAXPSZ256rmi |
| 86149 | 43388, // VMINMAXPSZ256rmik |
| 86150 | 43394, // VMINMAXPSZ256rmikz |
| 86151 | 43399, // VMINMAXPSZ256rri |
| 86152 | 43403, // VMINMAXPSZ256rrik |
| 86153 | 43409, // VMINMAXPSZ256rrikz |
| 86154 | 43414, // VMINMAXPSZrmbi |
| 86155 | 43418, // VMINMAXPSZrmbik |
| 86156 | 43424, // VMINMAXPSZrmbikz |
| 86157 | 43429, // VMINMAXPSZrmi |
| 86158 | 43433, // VMINMAXPSZrmik |
| 86159 | 43439, // VMINMAXPSZrmikz |
| 86160 | 43444, // VMINMAXPSZrri |
| 86161 | 43448, // VMINMAXPSZrrib |
| 86162 | 43452, // VMINMAXPSZrribk |
| 86163 | 43458, // VMINMAXPSZrribkz |
| 86164 | 43463, // VMINMAXPSZrrik |
| 86165 | 43469, // VMINMAXPSZrrikz |
| 86166 | 43474, // VMINMAXSDrmi |
| 86167 | 43478, // VMINMAXSDrmi_Int |
| 86168 | 43482, // VMINMAXSDrmik_Int |
| 86169 | 43488, // VMINMAXSDrmikz_Int |
| 86170 | 43493, // VMINMAXSDrri |
| 86171 | 43497, // VMINMAXSDrri_Int |
| 86172 | 43501, // VMINMAXSDrrib_Int |
| 86173 | 43505, // VMINMAXSDrribk_Int |
| 86174 | 43511, // VMINMAXSDrribkz_Int |
| 86175 | 43516, // VMINMAXSDrrik_Int |
| 86176 | 43522, // VMINMAXSDrrikz_Int |
| 86177 | 43527, // VMINMAXSHrmi |
| 86178 | 43531, // VMINMAXSHrmi_Int |
| 86179 | 43535, // VMINMAXSHrmik_Int |
| 86180 | 43541, // VMINMAXSHrmikz_Int |
| 86181 | 43546, // VMINMAXSHrri |
| 86182 | 43550, // VMINMAXSHrri_Int |
| 86183 | 43554, // VMINMAXSHrrib_Int |
| 86184 | 43558, // VMINMAXSHrribk_Int |
| 86185 | 43564, // VMINMAXSHrribkz_Int |
| 86186 | 43569, // VMINMAXSHrrik_Int |
| 86187 | 43575, // VMINMAXSHrrikz_Int |
| 86188 | 43580, // VMINMAXSSrmi |
| 86189 | 43584, // VMINMAXSSrmi_Int |
| 86190 | 43588, // VMINMAXSSrmik_Int |
| 86191 | 43594, // VMINMAXSSrmikz_Int |
| 86192 | 43599, // VMINMAXSSrri |
| 86193 | 43603, // VMINMAXSSrri_Int |
| 86194 | 43607, // VMINMAXSSrrib_Int |
| 86195 | 43611, // VMINMAXSSrribk_Int |
| 86196 | 43617, // VMINMAXSSrribkz_Int |
| 86197 | 43622, // VMINMAXSSrrik_Int |
| 86198 | 43628, // VMINMAXSSrrikz_Int |
| 86199 | 43633, // VMINPDYrm |
| 86200 | 43636, // VMINPDYrr |
| 86201 | 43639, // VMINPDZ128rm |
| 86202 | 43642, // VMINPDZ128rmb |
| 86203 | 43645, // VMINPDZ128rmbk |
| 86204 | 43650, // VMINPDZ128rmbkz |
| 86205 | 43654, // VMINPDZ128rmk |
| 86206 | 43659, // VMINPDZ128rmkz |
| 86207 | 43663, // VMINPDZ128rr |
| 86208 | 43666, // VMINPDZ128rrk |
| 86209 | 43671, // VMINPDZ128rrkz |
| 86210 | 43675, // VMINPDZ256rm |
| 86211 | 43678, // VMINPDZ256rmb |
| 86212 | 43681, // VMINPDZ256rmbk |
| 86213 | 43686, // VMINPDZ256rmbkz |
| 86214 | 43690, // VMINPDZ256rmk |
| 86215 | 43695, // VMINPDZ256rmkz |
| 86216 | 43699, // VMINPDZ256rr |
| 86217 | 43702, // VMINPDZ256rrk |
| 86218 | 43707, // VMINPDZ256rrkz |
| 86219 | 43711, // VMINPDZrm |
| 86220 | 43714, // VMINPDZrmb |
| 86221 | 43717, // VMINPDZrmbk |
| 86222 | 43722, // VMINPDZrmbkz |
| 86223 | 43726, // VMINPDZrmk |
| 86224 | 43731, // VMINPDZrmkz |
| 86225 | 43735, // VMINPDZrr |
| 86226 | 43738, // VMINPDZrrb |
| 86227 | 43741, // VMINPDZrrbk |
| 86228 | 43746, // VMINPDZrrbkz |
| 86229 | 43750, // VMINPDZrrk |
| 86230 | 43755, // VMINPDZrrkz |
| 86231 | 43759, // VMINPDrm |
| 86232 | 43762, // VMINPDrr |
| 86233 | 43765, // VMINPHZ128rm |
| 86234 | 43768, // VMINPHZ128rmb |
| 86235 | 43771, // VMINPHZ128rmbk |
| 86236 | 43776, // VMINPHZ128rmbkz |
| 86237 | 43780, // VMINPHZ128rmk |
| 86238 | 43785, // VMINPHZ128rmkz |
| 86239 | 43789, // VMINPHZ128rr |
| 86240 | 43792, // VMINPHZ128rrk |
| 86241 | 43797, // VMINPHZ128rrkz |
| 86242 | 43801, // VMINPHZ256rm |
| 86243 | 43804, // VMINPHZ256rmb |
| 86244 | 43807, // VMINPHZ256rmbk |
| 86245 | 43812, // VMINPHZ256rmbkz |
| 86246 | 43816, // VMINPHZ256rmk |
| 86247 | 43821, // VMINPHZ256rmkz |
| 86248 | 43825, // VMINPHZ256rr |
| 86249 | 43828, // VMINPHZ256rrk |
| 86250 | 43833, // VMINPHZ256rrkz |
| 86251 | 43837, // VMINPHZrm |
| 86252 | 43840, // VMINPHZrmb |
| 86253 | 43843, // VMINPHZrmbk |
| 86254 | 43848, // VMINPHZrmbkz |
| 86255 | 43852, // VMINPHZrmk |
| 86256 | 43857, // VMINPHZrmkz |
| 86257 | 43861, // VMINPHZrr |
| 86258 | 43864, // VMINPHZrrb |
| 86259 | 43867, // VMINPHZrrbk |
| 86260 | 43872, // VMINPHZrrbkz |
| 86261 | 43876, // VMINPHZrrk |
| 86262 | 43881, // VMINPHZrrkz |
| 86263 | 43885, // VMINPSYrm |
| 86264 | 43888, // VMINPSYrr |
| 86265 | 43891, // VMINPSZ128rm |
| 86266 | 43894, // VMINPSZ128rmb |
| 86267 | 43897, // VMINPSZ128rmbk |
| 86268 | 43902, // VMINPSZ128rmbkz |
| 86269 | 43906, // VMINPSZ128rmk |
| 86270 | 43911, // VMINPSZ128rmkz |
| 86271 | 43915, // VMINPSZ128rr |
| 86272 | 43918, // VMINPSZ128rrk |
| 86273 | 43923, // VMINPSZ128rrkz |
| 86274 | 43927, // VMINPSZ256rm |
| 86275 | 43930, // VMINPSZ256rmb |
| 86276 | 43933, // VMINPSZ256rmbk |
| 86277 | 43938, // VMINPSZ256rmbkz |
| 86278 | 43942, // VMINPSZ256rmk |
| 86279 | 43947, // VMINPSZ256rmkz |
| 86280 | 43951, // VMINPSZ256rr |
| 86281 | 43954, // VMINPSZ256rrk |
| 86282 | 43959, // VMINPSZ256rrkz |
| 86283 | 43963, // VMINPSZrm |
| 86284 | 43966, // VMINPSZrmb |
| 86285 | 43969, // VMINPSZrmbk |
| 86286 | 43974, // VMINPSZrmbkz |
| 86287 | 43978, // VMINPSZrmk |
| 86288 | 43983, // VMINPSZrmkz |
| 86289 | 43987, // VMINPSZrr |
| 86290 | 43990, // VMINPSZrrb |
| 86291 | 43993, // VMINPSZrrbk |
| 86292 | 43998, // VMINPSZrrbkz |
| 86293 | 44002, // VMINPSZrrk |
| 86294 | 44007, // VMINPSZrrkz |
| 86295 | 44011, // VMINPSrm |
| 86296 | 44014, // VMINPSrr |
| 86297 | 44017, // VMINSDZrm |
| 86298 | 44020, // VMINSDZrm_Int |
| 86299 | 44023, // VMINSDZrmk_Int |
| 86300 | 44028, // VMINSDZrmkz_Int |
| 86301 | 44032, // VMINSDZrr |
| 86302 | 44035, // VMINSDZrr_Int |
| 86303 | 44038, // VMINSDZrrb_Int |
| 86304 | 44041, // VMINSDZrrbk_Int |
| 86305 | 44046, // VMINSDZrrbkz_Int |
| 86306 | 44050, // VMINSDZrrk_Int |
| 86307 | 44055, // VMINSDZrrkz_Int |
| 86308 | 44059, // VMINSDrm |
| 86309 | 44062, // VMINSDrm_Int |
| 86310 | 44065, // VMINSDrr |
| 86311 | 44068, // VMINSDrr_Int |
| 86312 | 44071, // VMINSHZrm |
| 86313 | 44074, // VMINSHZrm_Int |
| 86314 | 44077, // VMINSHZrmk_Int |
| 86315 | 44082, // VMINSHZrmkz_Int |
| 86316 | 44086, // VMINSHZrr |
| 86317 | 44089, // VMINSHZrr_Int |
| 86318 | 44092, // VMINSHZrrb_Int |
| 86319 | 44095, // VMINSHZrrbk_Int |
| 86320 | 44100, // VMINSHZrrbkz_Int |
| 86321 | 44104, // VMINSHZrrk_Int |
| 86322 | 44109, // VMINSHZrrkz_Int |
| 86323 | 44113, // VMINSSZrm |
| 86324 | 44116, // VMINSSZrm_Int |
| 86325 | 44119, // VMINSSZrmk_Int |
| 86326 | 44124, // VMINSSZrmkz_Int |
| 86327 | 44128, // VMINSSZrr |
| 86328 | 44131, // VMINSSZrr_Int |
| 86329 | 44134, // VMINSSZrrb_Int |
| 86330 | 44137, // VMINSSZrrbk_Int |
| 86331 | 44142, // VMINSSZrrbkz_Int |
| 86332 | 44146, // VMINSSZrrk_Int |
| 86333 | 44151, // VMINSSZrrkz_Int |
| 86334 | 44155, // VMINSSrm |
| 86335 | 44158, // VMINSSrm_Int |
| 86336 | 44161, // VMINSSrr |
| 86337 | 44164, // VMINSSrr_Int |
| 86338 | 44167, // VMLAUNCH |
| 86339 | 44167, // VMLOAD32 |
| 86340 | 44167, // VMLOAD64 |
| 86341 | 44167, // VMMCALL |
| 86342 | 44167, // VMOV64toPQIZrm |
| 86343 | 44169, // VMOV64toPQIZrr |
| 86344 | 44171, // VMOV64toPQIrm |
| 86345 | 44173, // VMOV64toPQIrr |
| 86346 | 44175, // VMOV64toSDZrr |
| 86347 | 44177, // VMOV64toSDrr |
| 86348 | 44179, // VMOVAPDYmr |
| 86349 | 44181, // VMOVAPDYrm |
| 86350 | 44183, // VMOVAPDYrr |
| 86351 | 44185, // VMOVAPDYrr_REV |
| 86352 | 44187, // VMOVAPDZ128mr |
| 86353 | 44189, // VMOVAPDZ128mrk |
| 86354 | 44192, // VMOVAPDZ128rm |
| 86355 | 44194, // VMOVAPDZ128rmk |
| 86356 | 44198, // VMOVAPDZ128rmkz |
| 86357 | 44201, // VMOVAPDZ128rr |
| 86358 | 44203, // VMOVAPDZ128rr_REV |
| 86359 | 44205, // VMOVAPDZ128rrk |
| 86360 | 44209, // VMOVAPDZ128rrk_REV |
| 86361 | 44212, // VMOVAPDZ128rrkz |
| 86362 | 44215, // VMOVAPDZ128rrkz_REV |
| 86363 | 44218, // VMOVAPDZ256mr |
| 86364 | 44220, // VMOVAPDZ256mrk |
| 86365 | 44223, // VMOVAPDZ256rm |
| 86366 | 44225, // VMOVAPDZ256rmk |
| 86367 | 44229, // VMOVAPDZ256rmkz |
| 86368 | 44232, // VMOVAPDZ256rr |
| 86369 | 44234, // VMOVAPDZ256rr_REV |
| 86370 | 44236, // VMOVAPDZ256rrk |
| 86371 | 44240, // VMOVAPDZ256rrk_REV |
| 86372 | 44243, // VMOVAPDZ256rrkz |
| 86373 | 44246, // VMOVAPDZ256rrkz_REV |
| 86374 | 44249, // VMOVAPDZmr |
| 86375 | 44251, // VMOVAPDZmrk |
| 86376 | 44254, // VMOVAPDZrm |
| 86377 | 44256, // VMOVAPDZrmk |
| 86378 | 44260, // VMOVAPDZrmkz |
| 86379 | 44263, // VMOVAPDZrr |
| 86380 | 44265, // VMOVAPDZrr_REV |
| 86381 | 44267, // VMOVAPDZrrk |
| 86382 | 44271, // VMOVAPDZrrk_REV |
| 86383 | 44274, // VMOVAPDZrrkz |
| 86384 | 44277, // VMOVAPDZrrkz_REV |
| 86385 | 44280, // VMOVAPDmr |
| 86386 | 44282, // VMOVAPDrm |
| 86387 | 44284, // VMOVAPDrr |
| 86388 | 44286, // VMOVAPDrr_REV |
| 86389 | 44288, // VMOVAPSYmr |
| 86390 | 44290, // VMOVAPSYrm |
| 86391 | 44292, // VMOVAPSYrr |
| 86392 | 44294, // VMOVAPSYrr_REV |
| 86393 | 44296, // VMOVAPSZ128mr |
| 86394 | 44298, // VMOVAPSZ128mrk |
| 86395 | 44301, // VMOVAPSZ128rm |
| 86396 | 44303, // VMOVAPSZ128rmk |
| 86397 | 44307, // VMOVAPSZ128rmkz |
| 86398 | 44310, // VMOVAPSZ128rr |
| 86399 | 44312, // VMOVAPSZ128rr_REV |
| 86400 | 44314, // VMOVAPSZ128rrk |
| 86401 | 44318, // VMOVAPSZ128rrk_REV |
| 86402 | 44321, // VMOVAPSZ128rrkz |
| 86403 | 44324, // VMOVAPSZ128rrkz_REV |
| 86404 | 44327, // VMOVAPSZ256mr |
| 86405 | 44329, // VMOVAPSZ256mrk |
| 86406 | 44332, // VMOVAPSZ256rm |
| 86407 | 44334, // VMOVAPSZ256rmk |
| 86408 | 44338, // VMOVAPSZ256rmkz |
| 86409 | 44341, // VMOVAPSZ256rr |
| 86410 | 44343, // VMOVAPSZ256rr_REV |
| 86411 | 44345, // VMOVAPSZ256rrk |
| 86412 | 44349, // VMOVAPSZ256rrk_REV |
| 86413 | 44352, // VMOVAPSZ256rrkz |
| 86414 | 44355, // VMOVAPSZ256rrkz_REV |
| 86415 | 44358, // VMOVAPSZmr |
| 86416 | 44360, // VMOVAPSZmrk |
| 86417 | 44363, // VMOVAPSZrm |
| 86418 | 44365, // VMOVAPSZrmk |
| 86419 | 44369, // VMOVAPSZrmkz |
| 86420 | 44372, // VMOVAPSZrr |
| 86421 | 44374, // VMOVAPSZrr_REV |
| 86422 | 44376, // VMOVAPSZrrk |
| 86423 | 44380, // VMOVAPSZrrk_REV |
| 86424 | 44383, // VMOVAPSZrrkz |
| 86425 | 44386, // VMOVAPSZrrkz_REV |
| 86426 | 44389, // VMOVAPSmr |
| 86427 | 44391, // VMOVAPSrm |
| 86428 | 44393, // VMOVAPSrr |
| 86429 | 44395, // VMOVAPSrr_REV |
| 86430 | 44397, // VMOVDDUPYrm |
| 86431 | 44399, // VMOVDDUPYrr |
| 86432 | 44401, // VMOVDDUPZ128rm |
| 86433 | 44403, // VMOVDDUPZ128rmk |
| 86434 | 44407, // VMOVDDUPZ128rmkz |
| 86435 | 44410, // VMOVDDUPZ128rr |
| 86436 | 44412, // VMOVDDUPZ128rrk |
| 86437 | 44416, // VMOVDDUPZ128rrkz |
| 86438 | 44419, // VMOVDDUPZ256rm |
| 86439 | 44421, // VMOVDDUPZ256rmk |
| 86440 | 44425, // VMOVDDUPZ256rmkz |
| 86441 | 44428, // VMOVDDUPZ256rr |
| 86442 | 44430, // VMOVDDUPZ256rrk |
| 86443 | 44434, // VMOVDDUPZ256rrkz |
| 86444 | 44437, // VMOVDDUPZrm |
| 86445 | 44439, // VMOVDDUPZrmk |
| 86446 | 44443, // VMOVDDUPZrmkz |
| 86447 | 44446, // VMOVDDUPZrr |
| 86448 | 44448, // VMOVDDUPZrrk |
| 86449 | 44452, // VMOVDDUPZrrkz |
| 86450 | 44455, // VMOVDDUPrm |
| 86451 | 44457, // VMOVDDUPrr |
| 86452 | 44459, // VMOVDI2PDIZrm |
| 86453 | 44461, // VMOVDI2PDIZrr |
| 86454 | 44463, // VMOVDI2PDIrm |
| 86455 | 44465, // VMOVDI2PDIrr |
| 86456 | 44467, // VMOVDI2SSZrr |
| 86457 | 44469, // VMOVDI2SSrr |
| 86458 | 44471, // VMOVDQA32Z128mr |
| 86459 | 44473, // VMOVDQA32Z128mrk |
| 86460 | 44476, // VMOVDQA32Z128rm |
| 86461 | 44478, // VMOVDQA32Z128rmk |
| 86462 | 44482, // VMOVDQA32Z128rmkz |
| 86463 | 44485, // VMOVDQA32Z128rr |
| 86464 | 44487, // VMOVDQA32Z128rr_REV |
| 86465 | 44489, // VMOVDQA32Z128rrk |
| 86466 | 44493, // VMOVDQA32Z128rrk_REV |
| 86467 | 44496, // VMOVDQA32Z128rrkz |
| 86468 | 44499, // VMOVDQA32Z128rrkz_REV |
| 86469 | 44502, // VMOVDQA32Z256mr |
| 86470 | 44504, // VMOVDQA32Z256mrk |
| 86471 | 44507, // VMOVDQA32Z256rm |
| 86472 | 44509, // VMOVDQA32Z256rmk |
| 86473 | 44513, // VMOVDQA32Z256rmkz |
| 86474 | 44516, // VMOVDQA32Z256rr |
| 86475 | 44518, // VMOVDQA32Z256rr_REV |
| 86476 | 44520, // VMOVDQA32Z256rrk |
| 86477 | 44524, // VMOVDQA32Z256rrk_REV |
| 86478 | 44527, // VMOVDQA32Z256rrkz |
| 86479 | 44530, // VMOVDQA32Z256rrkz_REV |
| 86480 | 44533, // VMOVDQA32Zmr |
| 86481 | 44535, // VMOVDQA32Zmrk |
| 86482 | 44538, // VMOVDQA32Zrm |
| 86483 | 44540, // VMOVDQA32Zrmk |
| 86484 | 44544, // VMOVDQA32Zrmkz |
| 86485 | 44547, // VMOVDQA32Zrr |
| 86486 | 44549, // VMOVDQA32Zrr_REV |
| 86487 | 44551, // VMOVDQA32Zrrk |
| 86488 | 44555, // VMOVDQA32Zrrk_REV |
| 86489 | 44558, // VMOVDQA32Zrrkz |
| 86490 | 44561, // VMOVDQA32Zrrkz_REV |
| 86491 | 44564, // VMOVDQA64Z128mr |
| 86492 | 44566, // VMOVDQA64Z128mrk |
| 86493 | 44569, // VMOVDQA64Z128rm |
| 86494 | 44571, // VMOVDQA64Z128rmk |
| 86495 | 44575, // VMOVDQA64Z128rmkz |
| 86496 | 44578, // VMOVDQA64Z128rr |
| 86497 | 44580, // VMOVDQA64Z128rr_REV |
| 86498 | 44582, // VMOVDQA64Z128rrk |
| 86499 | 44586, // VMOVDQA64Z128rrk_REV |
| 86500 | 44589, // VMOVDQA64Z128rrkz |
| 86501 | 44592, // VMOVDQA64Z128rrkz_REV |
| 86502 | 44595, // VMOVDQA64Z256mr |
| 86503 | 44597, // VMOVDQA64Z256mrk |
| 86504 | 44600, // VMOVDQA64Z256rm |
| 86505 | 44602, // VMOVDQA64Z256rmk |
| 86506 | 44606, // VMOVDQA64Z256rmkz |
| 86507 | 44609, // VMOVDQA64Z256rr |
| 86508 | 44611, // VMOVDQA64Z256rr_REV |
| 86509 | 44613, // VMOVDQA64Z256rrk |
| 86510 | 44617, // VMOVDQA64Z256rrk_REV |
| 86511 | 44620, // VMOVDQA64Z256rrkz |
| 86512 | 44623, // VMOVDQA64Z256rrkz_REV |
| 86513 | 44626, // VMOVDQA64Zmr |
| 86514 | 44628, // VMOVDQA64Zmrk |
| 86515 | 44631, // VMOVDQA64Zrm |
| 86516 | 44633, // VMOVDQA64Zrmk |
| 86517 | 44637, // VMOVDQA64Zrmkz |
| 86518 | 44640, // VMOVDQA64Zrr |
| 86519 | 44642, // VMOVDQA64Zrr_REV |
| 86520 | 44644, // VMOVDQA64Zrrk |
| 86521 | 44648, // VMOVDQA64Zrrk_REV |
| 86522 | 44651, // VMOVDQA64Zrrkz |
| 86523 | 44654, // VMOVDQA64Zrrkz_REV |
| 86524 | 44657, // VMOVDQAYmr |
| 86525 | 44659, // VMOVDQAYrm |
| 86526 | 44661, // VMOVDQAYrr |
| 86527 | 44663, // VMOVDQAYrr_REV |
| 86528 | 44665, // VMOVDQAmr |
| 86529 | 44667, // VMOVDQArm |
| 86530 | 44669, // VMOVDQArr |
| 86531 | 44671, // VMOVDQArr_REV |
| 86532 | 44673, // VMOVDQU16Z128mr |
| 86533 | 44675, // VMOVDQU16Z128mrk |
| 86534 | 44678, // VMOVDQU16Z128rm |
| 86535 | 44680, // VMOVDQU16Z128rmk |
| 86536 | 44684, // VMOVDQU16Z128rmkz |
| 86537 | 44687, // VMOVDQU16Z128rr |
| 86538 | 44689, // VMOVDQU16Z128rr_REV |
| 86539 | 44691, // VMOVDQU16Z128rrk |
| 86540 | 44695, // VMOVDQU16Z128rrk_REV |
| 86541 | 44698, // VMOVDQU16Z128rrkz |
| 86542 | 44701, // VMOVDQU16Z128rrkz_REV |
| 86543 | 44704, // VMOVDQU16Z256mr |
| 86544 | 44706, // VMOVDQU16Z256mrk |
| 86545 | 44709, // VMOVDQU16Z256rm |
| 86546 | 44711, // VMOVDQU16Z256rmk |
| 86547 | 44715, // VMOVDQU16Z256rmkz |
| 86548 | 44718, // VMOVDQU16Z256rr |
| 86549 | 44720, // VMOVDQU16Z256rr_REV |
| 86550 | 44722, // VMOVDQU16Z256rrk |
| 86551 | 44726, // VMOVDQU16Z256rrk_REV |
| 86552 | 44729, // VMOVDQU16Z256rrkz |
| 86553 | 44732, // VMOVDQU16Z256rrkz_REV |
| 86554 | 44735, // VMOVDQU16Zmr |
| 86555 | 44737, // VMOVDQU16Zmrk |
| 86556 | 44740, // VMOVDQU16Zrm |
| 86557 | 44742, // VMOVDQU16Zrmk |
| 86558 | 44746, // VMOVDQU16Zrmkz |
| 86559 | 44749, // VMOVDQU16Zrr |
| 86560 | 44751, // VMOVDQU16Zrr_REV |
| 86561 | 44753, // VMOVDQU16Zrrk |
| 86562 | 44757, // VMOVDQU16Zrrk_REV |
| 86563 | 44760, // VMOVDQU16Zrrkz |
| 86564 | 44763, // VMOVDQU16Zrrkz_REV |
| 86565 | 44766, // VMOVDQU32Z128mr |
| 86566 | 44768, // VMOVDQU32Z128mrk |
| 86567 | 44771, // VMOVDQU32Z128rm |
| 86568 | 44773, // VMOVDQU32Z128rmk |
| 86569 | 44777, // VMOVDQU32Z128rmkz |
| 86570 | 44780, // VMOVDQU32Z128rr |
| 86571 | 44782, // VMOVDQU32Z128rr_REV |
| 86572 | 44784, // VMOVDQU32Z128rrk |
| 86573 | 44788, // VMOVDQU32Z128rrk_REV |
| 86574 | 44791, // VMOVDQU32Z128rrkz |
| 86575 | 44794, // VMOVDQU32Z128rrkz_REV |
| 86576 | 44797, // VMOVDQU32Z256mr |
| 86577 | 44799, // VMOVDQU32Z256mrk |
| 86578 | 44802, // VMOVDQU32Z256rm |
| 86579 | 44804, // VMOVDQU32Z256rmk |
| 86580 | 44808, // VMOVDQU32Z256rmkz |
| 86581 | 44811, // VMOVDQU32Z256rr |
| 86582 | 44813, // VMOVDQU32Z256rr_REV |
| 86583 | 44815, // VMOVDQU32Z256rrk |
| 86584 | 44819, // VMOVDQU32Z256rrk_REV |
| 86585 | 44822, // VMOVDQU32Z256rrkz |
| 86586 | 44825, // VMOVDQU32Z256rrkz_REV |
| 86587 | 44828, // VMOVDQU32Zmr |
| 86588 | 44830, // VMOVDQU32Zmrk |
| 86589 | 44833, // VMOVDQU32Zrm |
| 86590 | 44835, // VMOVDQU32Zrmk |
| 86591 | 44839, // VMOVDQU32Zrmkz |
| 86592 | 44842, // VMOVDQU32Zrr |
| 86593 | 44844, // VMOVDQU32Zrr_REV |
| 86594 | 44846, // VMOVDQU32Zrrk |
| 86595 | 44850, // VMOVDQU32Zrrk_REV |
| 86596 | 44853, // VMOVDQU32Zrrkz |
| 86597 | 44856, // VMOVDQU32Zrrkz_REV |
| 86598 | 44859, // VMOVDQU64Z128mr |
| 86599 | 44861, // VMOVDQU64Z128mrk |
| 86600 | 44864, // VMOVDQU64Z128rm |
| 86601 | 44866, // VMOVDQU64Z128rmk |
| 86602 | 44870, // VMOVDQU64Z128rmkz |
| 86603 | 44873, // VMOVDQU64Z128rr |
| 86604 | 44875, // VMOVDQU64Z128rr_REV |
| 86605 | 44877, // VMOVDQU64Z128rrk |
| 86606 | 44881, // VMOVDQU64Z128rrk_REV |
| 86607 | 44884, // VMOVDQU64Z128rrkz |
| 86608 | 44887, // VMOVDQU64Z128rrkz_REV |
| 86609 | 44890, // VMOVDQU64Z256mr |
| 86610 | 44892, // VMOVDQU64Z256mrk |
| 86611 | 44895, // VMOVDQU64Z256rm |
| 86612 | 44897, // VMOVDQU64Z256rmk |
| 86613 | 44901, // VMOVDQU64Z256rmkz |
| 86614 | 44904, // VMOVDQU64Z256rr |
| 86615 | 44906, // VMOVDQU64Z256rr_REV |
| 86616 | 44908, // VMOVDQU64Z256rrk |
| 86617 | 44912, // VMOVDQU64Z256rrk_REV |
| 86618 | 44915, // VMOVDQU64Z256rrkz |
| 86619 | 44918, // VMOVDQU64Z256rrkz_REV |
| 86620 | 44921, // VMOVDQU64Zmr |
| 86621 | 44923, // VMOVDQU64Zmrk |
| 86622 | 44926, // VMOVDQU64Zrm |
| 86623 | 44928, // VMOVDQU64Zrmk |
| 86624 | 44932, // VMOVDQU64Zrmkz |
| 86625 | 44935, // VMOVDQU64Zrr |
| 86626 | 44937, // VMOVDQU64Zrr_REV |
| 86627 | 44939, // VMOVDQU64Zrrk |
| 86628 | 44943, // VMOVDQU64Zrrk_REV |
| 86629 | 44946, // VMOVDQU64Zrrkz |
| 86630 | 44949, // VMOVDQU64Zrrkz_REV |
| 86631 | 44952, // VMOVDQU8Z128mr |
| 86632 | 44954, // VMOVDQU8Z128mrk |
| 86633 | 44957, // VMOVDQU8Z128rm |
| 86634 | 44959, // VMOVDQU8Z128rmk |
| 86635 | 44963, // VMOVDQU8Z128rmkz |
| 86636 | 44966, // VMOVDQU8Z128rr |
| 86637 | 44968, // VMOVDQU8Z128rr_REV |
| 86638 | 44970, // VMOVDQU8Z128rrk |
| 86639 | 44974, // VMOVDQU8Z128rrk_REV |
| 86640 | 44977, // VMOVDQU8Z128rrkz |
| 86641 | 44980, // VMOVDQU8Z128rrkz_REV |
| 86642 | 44983, // VMOVDQU8Z256mr |
| 86643 | 44985, // VMOVDQU8Z256mrk |
| 86644 | 44988, // VMOVDQU8Z256rm |
| 86645 | 44990, // VMOVDQU8Z256rmk |
| 86646 | 44994, // VMOVDQU8Z256rmkz |
| 86647 | 44997, // VMOVDQU8Z256rr |
| 86648 | 44999, // VMOVDQU8Z256rr_REV |
| 86649 | 45001, // VMOVDQU8Z256rrk |
| 86650 | 45005, // VMOVDQU8Z256rrk_REV |
| 86651 | 45008, // VMOVDQU8Z256rrkz |
| 86652 | 45011, // VMOVDQU8Z256rrkz_REV |
| 86653 | 45014, // VMOVDQU8Zmr |
| 86654 | 45016, // VMOVDQU8Zmrk |
| 86655 | 45019, // VMOVDQU8Zrm |
| 86656 | 45021, // VMOVDQU8Zrmk |
| 86657 | 45025, // VMOVDQU8Zrmkz |
| 86658 | 45028, // VMOVDQU8Zrr |
| 86659 | 45030, // VMOVDQU8Zrr_REV |
| 86660 | 45032, // VMOVDQU8Zrrk |
| 86661 | 45036, // VMOVDQU8Zrrk_REV |
| 86662 | 45039, // VMOVDQU8Zrrkz |
| 86663 | 45042, // VMOVDQU8Zrrkz_REV |
| 86664 | 45045, // VMOVDQUYmr |
| 86665 | 45047, // VMOVDQUYrm |
| 86666 | 45049, // VMOVDQUYrr |
| 86667 | 45051, // VMOVDQUYrr_REV |
| 86668 | 45053, // VMOVDQUmr |
| 86669 | 45055, // VMOVDQUrm |
| 86670 | 45057, // VMOVDQUrr |
| 86671 | 45059, // VMOVDQUrr_REV |
| 86672 | 45061, // VMOVHLPSZrr |
| 86673 | 45064, // VMOVHLPSrr |
| 86674 | 45067, // VMOVHPDZ128mr |
| 86675 | 45069, // VMOVHPDZ128rm |
| 86676 | 45072, // VMOVHPDmr |
| 86677 | 45074, // VMOVHPDrm |
| 86678 | 45077, // VMOVHPSZ128mr |
| 86679 | 45079, // VMOVHPSZ128rm |
| 86680 | 45082, // VMOVHPSmr |
| 86681 | 45084, // VMOVHPSrm |
| 86682 | 45087, // VMOVLHPSZrr |
| 86683 | 45090, // VMOVLHPSrr |
| 86684 | 45093, // VMOVLPDZ128mr |
| 86685 | 45095, // VMOVLPDZ128rm |
| 86686 | 45098, // VMOVLPDmr |
| 86687 | 45100, // VMOVLPDrm |
| 86688 | 45103, // VMOVLPSZ128mr |
| 86689 | 45105, // VMOVLPSZ128rm |
| 86690 | 45108, // VMOVLPSmr |
| 86691 | 45110, // VMOVLPSrm |
| 86692 | 45113, // VMOVMSKPDYrr |
| 86693 | 45115, // VMOVMSKPDrr |
| 86694 | 45117, // VMOVMSKPSYrr |
| 86695 | 45119, // VMOVMSKPSrr |
| 86696 | 45121, // VMOVNTDQAYrm |
| 86697 | 45123, // VMOVNTDQAZ128rm |
| 86698 | 45125, // VMOVNTDQAZ256rm |
| 86699 | 45127, // VMOVNTDQAZrm |
| 86700 | 45129, // VMOVNTDQArm |
| 86701 | 45131, // VMOVNTDQYmr |
| 86702 | 45133, // VMOVNTDQZ128mr |
| 86703 | 45135, // VMOVNTDQZ256mr |
| 86704 | 45137, // VMOVNTDQZmr |
| 86705 | 45139, // VMOVNTDQmr |
| 86706 | 45141, // VMOVNTPDYmr |
| 86707 | 45143, // VMOVNTPDZ128mr |
| 86708 | 45145, // VMOVNTPDZ256mr |
| 86709 | 45147, // VMOVNTPDZmr |
| 86710 | 45149, // VMOVNTPDmr |
| 86711 | 45151, // VMOVNTPSYmr |
| 86712 | 45153, // VMOVNTPSZ128mr |
| 86713 | 45155, // VMOVNTPSZ256mr |
| 86714 | 45157, // VMOVNTPSZmr |
| 86715 | 45159, // VMOVNTPSmr |
| 86716 | 45161, // VMOVPDI2DIZmr |
| 86717 | 45163, // VMOVPDI2DIZrr |
| 86718 | 45165, // VMOVPDI2DImr |
| 86719 | 45167, // VMOVPDI2DIrr |
| 86720 | 45169, // VMOVPQI2QIZmr |
| 86721 | 45171, // VMOVPQI2QIZrr |
| 86722 | 45173, // VMOVPQI2QImr |
| 86723 | 45175, // VMOVPQI2QIrr |
| 86724 | 45177, // VMOVPQIto64Zmr |
| 86725 | 45179, // VMOVPQIto64Zrr |
| 86726 | 45181, // VMOVPQIto64mr |
| 86727 | 45183, // VMOVPQIto64rr |
| 86728 | 45185, // VMOVQI2PQIZrm |
| 86729 | 45187, // VMOVQI2PQIrm |
| 86730 | 45189, // VMOVRSBZ128m |
| 86731 | 45191, // VMOVRSBZ128mk |
| 86732 | 45195, // VMOVRSBZ128mkz |
| 86733 | 45198, // VMOVRSBZ256m |
| 86734 | 45200, // VMOVRSBZ256mk |
| 86735 | 45204, // VMOVRSBZ256mkz |
| 86736 | 45207, // VMOVRSBZm |
| 86737 | 45209, // VMOVRSBZmk |
| 86738 | 45213, // VMOVRSBZmkz |
| 86739 | 45216, // VMOVRSDZ128m |
| 86740 | 45218, // VMOVRSDZ128mk |
| 86741 | 45222, // VMOVRSDZ128mkz |
| 86742 | 45225, // VMOVRSDZ256m |
| 86743 | 45227, // VMOVRSDZ256mk |
| 86744 | 45231, // VMOVRSDZ256mkz |
| 86745 | 45234, // VMOVRSDZm |
| 86746 | 45236, // VMOVRSDZmk |
| 86747 | 45240, // VMOVRSDZmkz |
| 86748 | 45243, // VMOVRSQZ128m |
| 86749 | 45245, // VMOVRSQZ128mk |
| 86750 | 45249, // VMOVRSQZ128mkz |
| 86751 | 45252, // VMOVRSQZ256m |
| 86752 | 45254, // VMOVRSQZ256mk |
| 86753 | 45258, // VMOVRSQZ256mkz |
| 86754 | 45261, // VMOVRSQZm |
| 86755 | 45263, // VMOVRSQZmk |
| 86756 | 45267, // VMOVRSQZmkz |
| 86757 | 45270, // VMOVRSWZ128m |
| 86758 | 45272, // VMOVRSWZ128mk |
| 86759 | 45276, // VMOVRSWZ128mkz |
| 86760 | 45279, // VMOVRSWZ256m |
| 86761 | 45281, // VMOVRSWZ256mk |
| 86762 | 45285, // VMOVRSWZ256mkz |
| 86763 | 45288, // VMOVRSWZm |
| 86764 | 45290, // VMOVRSWZmk |
| 86765 | 45294, // VMOVRSWZmkz |
| 86766 | 45297, // VMOVSDZmr |
| 86767 | 45299, // VMOVSDZmrk |
| 86768 | 45302, // VMOVSDZrm |
| 86769 | 45304, // VMOVSDZrm_alt |
| 86770 | 45306, // VMOVSDZrmk |
| 86771 | 45310, // VMOVSDZrmkz |
| 86772 | 45313, // VMOVSDZrr |
| 86773 | 45316, // VMOVSDZrr_REV |
| 86774 | 45319, // VMOVSDZrrk |
| 86775 | 45324, // VMOVSDZrrk_REV |
| 86776 | 45329, // VMOVSDZrrkz |
| 86777 | 45333, // VMOVSDZrrkz_REV |
| 86778 | 45337, // VMOVSDmr |
| 86779 | 45339, // VMOVSDrm |
| 86780 | 45341, // VMOVSDrm_alt |
| 86781 | 45343, // VMOVSDrr |
| 86782 | 45346, // VMOVSDrr_REV |
| 86783 | 45349, // VMOVSDto64Zrr |
| 86784 | 45351, // VMOVSDto64rr |
| 86785 | 45353, // VMOVSH2Wrr |
| 86786 | 45355, // VMOVSHDUPYrm |
| 86787 | 45357, // VMOVSHDUPYrr |
| 86788 | 45359, // VMOVSHDUPZ128rm |
| 86789 | 45361, // VMOVSHDUPZ128rmk |
| 86790 | 45365, // VMOVSHDUPZ128rmkz |
| 86791 | 45368, // VMOVSHDUPZ128rr |
| 86792 | 45370, // VMOVSHDUPZ128rrk |
| 86793 | 45374, // VMOVSHDUPZ128rrkz |
| 86794 | 45377, // VMOVSHDUPZ256rm |
| 86795 | 45379, // VMOVSHDUPZ256rmk |
| 86796 | 45383, // VMOVSHDUPZ256rmkz |
| 86797 | 45386, // VMOVSHDUPZ256rr |
| 86798 | 45388, // VMOVSHDUPZ256rrk |
| 86799 | 45392, // VMOVSHDUPZ256rrkz |
| 86800 | 45395, // VMOVSHDUPZrm |
| 86801 | 45397, // VMOVSHDUPZrmk |
| 86802 | 45401, // VMOVSHDUPZrmkz |
| 86803 | 45404, // VMOVSHDUPZrr |
| 86804 | 45406, // VMOVSHDUPZrrk |
| 86805 | 45410, // VMOVSHDUPZrrkz |
| 86806 | 45413, // VMOVSHDUPrm |
| 86807 | 45415, // VMOVSHDUPrr |
| 86808 | 45417, // VMOVSHZmr |
| 86809 | 45419, // VMOVSHZmrk |
| 86810 | 45422, // VMOVSHZrm |
| 86811 | 45424, // VMOVSHZrm_alt |
| 86812 | 45426, // VMOVSHZrmk |
| 86813 | 45430, // VMOVSHZrmkz |
| 86814 | 45433, // VMOVSHZrr |
| 86815 | 45436, // VMOVSHZrr_REV |
| 86816 | 45439, // VMOVSHZrrk |
| 86817 | 45444, // VMOVSHZrrk_REV |
| 86818 | 45449, // VMOVSHZrrkz |
| 86819 | 45453, // VMOVSHZrrkz_REV |
| 86820 | 45457, // VMOVSHtoW64rr |
| 86821 | 45459, // VMOVSLDUPYrm |
| 86822 | 45461, // VMOVSLDUPYrr |
| 86823 | 45463, // VMOVSLDUPZ128rm |
| 86824 | 45465, // VMOVSLDUPZ128rmk |
| 86825 | 45469, // VMOVSLDUPZ128rmkz |
| 86826 | 45472, // VMOVSLDUPZ128rr |
| 86827 | 45474, // VMOVSLDUPZ128rrk |
| 86828 | 45478, // VMOVSLDUPZ128rrkz |
| 86829 | 45481, // VMOVSLDUPZ256rm |
| 86830 | 45483, // VMOVSLDUPZ256rmk |
| 86831 | 45487, // VMOVSLDUPZ256rmkz |
| 86832 | 45490, // VMOVSLDUPZ256rr |
| 86833 | 45492, // VMOVSLDUPZ256rrk |
| 86834 | 45496, // VMOVSLDUPZ256rrkz |
| 86835 | 45499, // VMOVSLDUPZrm |
| 86836 | 45501, // VMOVSLDUPZrmk |
| 86837 | 45505, // VMOVSLDUPZrmkz |
| 86838 | 45508, // VMOVSLDUPZrr |
| 86839 | 45510, // VMOVSLDUPZrrk |
| 86840 | 45514, // VMOVSLDUPZrrkz |
| 86841 | 45517, // VMOVSLDUPrm |
| 86842 | 45519, // VMOVSLDUPrr |
| 86843 | 45521, // VMOVSS2DIZrr |
| 86844 | 45523, // VMOVSS2DIrr |
| 86845 | 45525, // VMOVSSZmr |
| 86846 | 45527, // VMOVSSZmrk |
| 86847 | 45530, // VMOVSSZrm |
| 86848 | 45532, // VMOVSSZrm_alt |
| 86849 | 45534, // VMOVSSZrmk |
| 86850 | 45538, // VMOVSSZrmkz |
| 86851 | 45541, // VMOVSSZrr |
| 86852 | 45544, // VMOVSSZrr_REV |
| 86853 | 45547, // VMOVSSZrrk |
| 86854 | 45552, // VMOVSSZrrk_REV |
| 86855 | 45557, // VMOVSSZrrkz |
| 86856 | 45561, // VMOVSSZrrkz_REV |
| 86857 | 45565, // VMOVSSmr |
| 86858 | 45567, // VMOVSSrm |
| 86859 | 45569, // VMOVSSrm_alt |
| 86860 | 45571, // VMOVSSrr |
| 86861 | 45574, // VMOVSSrr_REV |
| 86862 | 45577, // VMOVUPDYmr |
| 86863 | 45579, // VMOVUPDYrm |
| 86864 | 45581, // VMOVUPDYrr |
| 86865 | 45583, // VMOVUPDYrr_REV |
| 86866 | 45585, // VMOVUPDZ128mr |
| 86867 | 45587, // VMOVUPDZ128mrk |
| 86868 | 45590, // VMOVUPDZ128rm |
| 86869 | 45592, // VMOVUPDZ128rmk |
| 86870 | 45596, // VMOVUPDZ128rmkz |
| 86871 | 45599, // VMOVUPDZ128rr |
| 86872 | 45601, // VMOVUPDZ128rr_REV |
| 86873 | 45603, // VMOVUPDZ128rrk |
| 86874 | 45607, // VMOVUPDZ128rrk_REV |
| 86875 | 45610, // VMOVUPDZ128rrkz |
| 86876 | 45613, // VMOVUPDZ128rrkz_REV |
| 86877 | 45616, // VMOVUPDZ256mr |
| 86878 | 45618, // VMOVUPDZ256mrk |
| 86879 | 45621, // VMOVUPDZ256rm |
| 86880 | 45623, // VMOVUPDZ256rmk |
| 86881 | 45627, // VMOVUPDZ256rmkz |
| 86882 | 45630, // VMOVUPDZ256rr |
| 86883 | 45632, // VMOVUPDZ256rr_REV |
| 86884 | 45634, // VMOVUPDZ256rrk |
| 86885 | 45638, // VMOVUPDZ256rrk_REV |
| 86886 | 45641, // VMOVUPDZ256rrkz |
| 86887 | 45644, // VMOVUPDZ256rrkz_REV |
| 86888 | 45647, // VMOVUPDZmr |
| 86889 | 45649, // VMOVUPDZmrk |
| 86890 | 45652, // VMOVUPDZrm |
| 86891 | 45654, // VMOVUPDZrmk |
| 86892 | 45658, // VMOVUPDZrmkz |
| 86893 | 45661, // VMOVUPDZrr |
| 86894 | 45663, // VMOVUPDZrr_REV |
| 86895 | 45665, // VMOVUPDZrrk |
| 86896 | 45669, // VMOVUPDZrrk_REV |
| 86897 | 45672, // VMOVUPDZrrkz |
| 86898 | 45675, // VMOVUPDZrrkz_REV |
| 86899 | 45678, // VMOVUPDmr |
| 86900 | 45680, // VMOVUPDrm |
| 86901 | 45682, // VMOVUPDrr |
| 86902 | 45684, // VMOVUPDrr_REV |
| 86903 | 45686, // VMOVUPSYmr |
| 86904 | 45688, // VMOVUPSYrm |
| 86905 | 45690, // VMOVUPSYrr |
| 86906 | 45692, // VMOVUPSYrr_REV |
| 86907 | 45694, // VMOVUPSZ128mr |
| 86908 | 45696, // VMOVUPSZ128mrk |
| 86909 | 45699, // VMOVUPSZ128rm |
| 86910 | 45701, // VMOVUPSZ128rmk |
| 86911 | 45705, // VMOVUPSZ128rmkz |
| 86912 | 45708, // VMOVUPSZ128rr |
| 86913 | 45710, // VMOVUPSZ128rr_REV |
| 86914 | 45712, // VMOVUPSZ128rrk |
| 86915 | 45716, // VMOVUPSZ128rrk_REV |
| 86916 | 45719, // VMOVUPSZ128rrkz |
| 86917 | 45722, // VMOVUPSZ128rrkz_REV |
| 86918 | 45725, // VMOVUPSZ256mr |
| 86919 | 45727, // VMOVUPSZ256mrk |
| 86920 | 45730, // VMOVUPSZ256rm |
| 86921 | 45732, // VMOVUPSZ256rmk |
| 86922 | 45736, // VMOVUPSZ256rmkz |
| 86923 | 45739, // VMOVUPSZ256rr |
| 86924 | 45741, // VMOVUPSZ256rr_REV |
| 86925 | 45743, // VMOVUPSZ256rrk |
| 86926 | 45747, // VMOVUPSZ256rrk_REV |
| 86927 | 45750, // VMOVUPSZ256rrkz |
| 86928 | 45753, // VMOVUPSZ256rrkz_REV |
| 86929 | 45756, // VMOVUPSZmr |
| 86930 | 45758, // VMOVUPSZmrk |
| 86931 | 45761, // VMOVUPSZrm |
| 86932 | 45763, // VMOVUPSZrmk |
| 86933 | 45767, // VMOVUPSZrmkz |
| 86934 | 45770, // VMOVUPSZrr |
| 86935 | 45772, // VMOVUPSZrr_REV |
| 86936 | 45774, // VMOVUPSZrrk |
| 86937 | 45778, // VMOVUPSZrrk_REV |
| 86938 | 45781, // VMOVUPSZrrkz |
| 86939 | 45784, // VMOVUPSZrrkz_REV |
| 86940 | 45787, // VMOVUPSmr |
| 86941 | 45789, // VMOVUPSrm |
| 86942 | 45791, // VMOVUPSrr |
| 86943 | 45793, // VMOVUPSrr_REV |
| 86944 | 45795, // VMOVW2SHrr |
| 86945 | 45797, // VMOVW64toSHrr |
| 86946 | 45799, // VMOVWmr |
| 86947 | 45801, // VMOVWrm |
| 86948 | 45803, // VMOVZPDILo2PDIZmr |
| 86949 | 45805, // VMOVZPDILo2PDIZrm |
| 86950 | 45807, // VMOVZPDILo2PDIZrr |
| 86951 | 45809, // VMOVZPDILo2PDIZrr2 |
| 86952 | 45811, // VMOVZPQILo2PQIZrr |
| 86953 | 45813, // VMOVZPQILo2PQIrr |
| 86954 | 45815, // VMOVZPWILo2PWIZmr |
| 86955 | 45817, // VMOVZPWILo2PWIZrm |
| 86956 | 45819, // VMOVZPWILo2PWIZrr |
| 86957 | 45821, // VMOVZPWILo2PWIZrr2 |
| 86958 | 45823, // VMPSADBWYrmi |
| 86959 | 45827, // VMPSADBWYrri |
| 86960 | 45831, // VMPSADBWZ128rmi |
| 86961 | 45835, // VMPSADBWZ128rmik |
| 86962 | 45841, // VMPSADBWZ128rmikz |
| 86963 | 45846, // VMPSADBWZ128rri |
| 86964 | 45850, // VMPSADBWZ128rrik |
| 86965 | 45856, // VMPSADBWZ128rrikz |
| 86966 | 45861, // VMPSADBWZ256rmi |
| 86967 | 45865, // VMPSADBWZ256rmik |
| 86968 | 45871, // VMPSADBWZ256rmikz |
| 86969 | 45876, // VMPSADBWZ256rri |
| 86970 | 45880, // VMPSADBWZ256rrik |
| 86971 | 45886, // VMPSADBWZ256rrikz |
| 86972 | 45891, // VMPSADBWZrmi |
| 86973 | 45895, // VMPSADBWZrmik |
| 86974 | 45901, // VMPSADBWZrmikz |
| 86975 | 45906, // VMPSADBWZrri |
| 86976 | 45910, // VMPSADBWZrrik |
| 86977 | 45916, // VMPSADBWZrrikz |
| 86978 | 45921, // VMPSADBWrmi |
| 86979 | 45925, // VMPSADBWrri |
| 86980 | 45929, // VMPTRLDm |
| 86981 | 45930, // VMPTRSTm |
| 86982 | 45931, // VMREAD32mr |
| 86983 | 45933, // VMREAD32rr |
| 86984 | 45935, // VMREAD64mr |
| 86985 | 45937, // VMREAD64rr |
| 86986 | 45939, // VMRESUME |
| 86987 | 45939, // VMRUN32 |
| 86988 | 45939, // VMRUN64 |
| 86989 | 45939, // VMSAVE32 |
| 86990 | 45939, // VMSAVE64 |
| 86991 | 45939, // VMULBF16Z128rm |
| 86992 | 45942, // VMULBF16Z128rmb |
| 86993 | 45945, // VMULBF16Z128rmbk |
| 86994 | 45950, // VMULBF16Z128rmbkz |
| 86995 | 45954, // VMULBF16Z128rmk |
| 86996 | 45959, // VMULBF16Z128rmkz |
| 86997 | 45963, // VMULBF16Z128rr |
| 86998 | 45966, // VMULBF16Z128rrk |
| 86999 | 45971, // VMULBF16Z128rrkz |
| 87000 | 45975, // VMULBF16Z256rm |
| 87001 | 45978, // VMULBF16Z256rmb |
| 87002 | 45981, // VMULBF16Z256rmbk |
| 87003 | 45986, // VMULBF16Z256rmbkz |
| 87004 | 45990, // VMULBF16Z256rmk |
| 87005 | 45995, // VMULBF16Z256rmkz |
| 87006 | 45999, // VMULBF16Z256rr |
| 87007 | 46002, // VMULBF16Z256rrk |
| 87008 | 46007, // VMULBF16Z256rrkz |
| 87009 | 46011, // VMULBF16Zrm |
| 87010 | 46014, // VMULBF16Zrmb |
| 87011 | 46017, // VMULBF16Zrmbk |
| 87012 | 46022, // VMULBF16Zrmbkz |
| 87013 | 46026, // VMULBF16Zrmk |
| 87014 | 46031, // VMULBF16Zrmkz |
| 87015 | 46035, // VMULBF16Zrr |
| 87016 | 46038, // VMULBF16Zrrk |
| 87017 | 46043, // VMULBF16Zrrkz |
| 87018 | 46047, // VMULPDYrm |
| 87019 | 46050, // VMULPDYrr |
| 87020 | 46053, // VMULPDZ128rm |
| 87021 | 46056, // VMULPDZ128rmb |
| 87022 | 46059, // VMULPDZ128rmbk |
| 87023 | 46064, // VMULPDZ128rmbkz |
| 87024 | 46068, // VMULPDZ128rmk |
| 87025 | 46073, // VMULPDZ128rmkz |
| 87026 | 46077, // VMULPDZ128rr |
| 87027 | 46080, // VMULPDZ128rrk |
| 87028 | 46085, // VMULPDZ128rrkz |
| 87029 | 46089, // VMULPDZ256rm |
| 87030 | 46092, // VMULPDZ256rmb |
| 87031 | 46095, // VMULPDZ256rmbk |
| 87032 | 46100, // VMULPDZ256rmbkz |
| 87033 | 46104, // VMULPDZ256rmk |
| 87034 | 46109, // VMULPDZ256rmkz |
| 87035 | 46113, // VMULPDZ256rr |
| 87036 | 46116, // VMULPDZ256rrk |
| 87037 | 46121, // VMULPDZ256rrkz |
| 87038 | 46125, // VMULPDZrm |
| 87039 | 46128, // VMULPDZrmb |
| 87040 | 46131, // VMULPDZrmbk |
| 87041 | 46136, // VMULPDZrmbkz |
| 87042 | 46140, // VMULPDZrmk |
| 87043 | 46145, // VMULPDZrmkz |
| 87044 | 46149, // VMULPDZrr |
| 87045 | 46152, // VMULPDZrrb |
| 87046 | 46156, // VMULPDZrrbk |
| 87047 | 46162, // VMULPDZrrbkz |
| 87048 | 46167, // VMULPDZrrk |
| 87049 | 46172, // VMULPDZrrkz |
| 87050 | 46176, // VMULPDrm |
| 87051 | 46179, // VMULPDrr |
| 87052 | 46182, // VMULPHZ128rm |
| 87053 | 46185, // VMULPHZ128rmb |
| 87054 | 46188, // VMULPHZ128rmbk |
| 87055 | 46193, // VMULPHZ128rmbkz |
| 87056 | 46197, // VMULPHZ128rmk |
| 87057 | 46202, // VMULPHZ128rmkz |
| 87058 | 46206, // VMULPHZ128rr |
| 87059 | 46209, // VMULPHZ128rrk |
| 87060 | 46214, // VMULPHZ128rrkz |
| 87061 | 46218, // VMULPHZ256rm |
| 87062 | 46221, // VMULPHZ256rmb |
| 87063 | 46224, // VMULPHZ256rmbk |
| 87064 | 46229, // VMULPHZ256rmbkz |
| 87065 | 46233, // VMULPHZ256rmk |
| 87066 | 46238, // VMULPHZ256rmkz |
| 87067 | 46242, // VMULPHZ256rr |
| 87068 | 46245, // VMULPHZ256rrk |
| 87069 | 46250, // VMULPHZ256rrkz |
| 87070 | 46254, // VMULPHZrm |
| 87071 | 46257, // VMULPHZrmb |
| 87072 | 46260, // VMULPHZrmbk |
| 87073 | 46265, // VMULPHZrmbkz |
| 87074 | 46269, // VMULPHZrmk |
| 87075 | 46274, // VMULPHZrmkz |
| 87076 | 46278, // VMULPHZrr |
| 87077 | 46281, // VMULPHZrrb |
| 87078 | 46285, // VMULPHZrrbk |
| 87079 | 46291, // VMULPHZrrbkz |
| 87080 | 46296, // VMULPHZrrk |
| 87081 | 46301, // VMULPHZrrkz |
| 87082 | 46305, // VMULPSYrm |
| 87083 | 46308, // VMULPSYrr |
| 87084 | 46311, // VMULPSZ128rm |
| 87085 | 46314, // VMULPSZ128rmb |
| 87086 | 46317, // VMULPSZ128rmbk |
| 87087 | 46322, // VMULPSZ128rmbkz |
| 87088 | 46326, // VMULPSZ128rmk |
| 87089 | 46331, // VMULPSZ128rmkz |
| 87090 | 46335, // VMULPSZ128rr |
| 87091 | 46338, // VMULPSZ128rrk |
| 87092 | 46343, // VMULPSZ128rrkz |
| 87093 | 46347, // VMULPSZ256rm |
| 87094 | 46350, // VMULPSZ256rmb |
| 87095 | 46353, // VMULPSZ256rmbk |
| 87096 | 46358, // VMULPSZ256rmbkz |
| 87097 | 46362, // VMULPSZ256rmk |
| 87098 | 46367, // VMULPSZ256rmkz |
| 87099 | 46371, // VMULPSZ256rr |
| 87100 | 46374, // VMULPSZ256rrk |
| 87101 | 46379, // VMULPSZ256rrkz |
| 87102 | 46383, // VMULPSZrm |
| 87103 | 46386, // VMULPSZrmb |
| 87104 | 46389, // VMULPSZrmbk |
| 87105 | 46394, // VMULPSZrmbkz |
| 87106 | 46398, // VMULPSZrmk |
| 87107 | 46403, // VMULPSZrmkz |
| 87108 | 46407, // VMULPSZrr |
| 87109 | 46410, // VMULPSZrrb |
| 87110 | 46414, // VMULPSZrrbk |
| 87111 | 46420, // VMULPSZrrbkz |
| 87112 | 46425, // VMULPSZrrk |
| 87113 | 46430, // VMULPSZrrkz |
| 87114 | 46434, // VMULPSrm |
| 87115 | 46437, // VMULPSrr |
| 87116 | 46440, // VMULSDZrm |
| 87117 | 46443, // VMULSDZrm_Int |
| 87118 | 46446, // VMULSDZrmk_Int |
| 87119 | 46451, // VMULSDZrmkz_Int |
| 87120 | 46455, // VMULSDZrr |
| 87121 | 46458, // VMULSDZrr_Int |
| 87122 | 46461, // VMULSDZrrb_Int |
| 87123 | 46465, // VMULSDZrrbk_Int |
| 87124 | 46471, // VMULSDZrrbkz_Int |
| 87125 | 46476, // VMULSDZrrk_Int |
| 87126 | 46481, // VMULSDZrrkz_Int |
| 87127 | 46485, // VMULSDrm |
| 87128 | 46488, // VMULSDrm_Int |
| 87129 | 46491, // VMULSDrr |
| 87130 | 46494, // VMULSDrr_Int |
| 87131 | 46497, // VMULSHZrm |
| 87132 | 46500, // VMULSHZrm_Int |
| 87133 | 46503, // VMULSHZrmk_Int |
| 87134 | 46508, // VMULSHZrmkz_Int |
| 87135 | 46512, // VMULSHZrr |
| 87136 | 46515, // VMULSHZrr_Int |
| 87137 | 46518, // VMULSHZrrb_Int |
| 87138 | 46522, // VMULSHZrrbk_Int |
| 87139 | 46528, // VMULSHZrrbkz_Int |
| 87140 | 46533, // VMULSHZrrk_Int |
| 87141 | 46538, // VMULSHZrrkz_Int |
| 87142 | 46542, // VMULSSZrm |
| 87143 | 46545, // VMULSSZrm_Int |
| 87144 | 46548, // VMULSSZrmk_Int |
| 87145 | 46553, // VMULSSZrmkz_Int |
| 87146 | 46557, // VMULSSZrr |
| 87147 | 46560, // VMULSSZrr_Int |
| 87148 | 46563, // VMULSSZrrb_Int |
| 87149 | 46567, // VMULSSZrrbk_Int |
| 87150 | 46573, // VMULSSZrrbkz_Int |
| 87151 | 46578, // VMULSSZrrk_Int |
| 87152 | 46583, // VMULSSZrrkz_Int |
| 87153 | 46587, // VMULSSrm |
| 87154 | 46590, // VMULSSrm_Int |
| 87155 | 46593, // VMULSSrr |
| 87156 | 46596, // VMULSSrr_Int |
| 87157 | 46599, // VMWRITE32rm |
| 87158 | 46601, // VMWRITE32rr |
| 87159 | 46603, // VMWRITE64rm |
| 87160 | 46605, // VMWRITE64rr |
| 87161 | 46607, // VMXOFF |
| 87162 | 46607, // VMXON |
| 87163 | 46608, // VORPDYrm |
| 87164 | 46611, // VORPDYrr |
| 87165 | 46614, // VORPDZ128rm |
| 87166 | 46617, // VORPDZ128rmb |
| 87167 | 46620, // VORPDZ128rmbk |
| 87168 | 46625, // VORPDZ128rmbkz |
| 87169 | 46629, // VORPDZ128rmk |
| 87170 | 46634, // VORPDZ128rmkz |
| 87171 | 46638, // VORPDZ128rr |
| 87172 | 46641, // VORPDZ128rrk |
| 87173 | 46646, // VORPDZ128rrkz |
| 87174 | 46650, // VORPDZ256rm |
| 87175 | 46653, // VORPDZ256rmb |
| 87176 | 46656, // VORPDZ256rmbk |
| 87177 | 46661, // VORPDZ256rmbkz |
| 87178 | 46665, // VORPDZ256rmk |
| 87179 | 46670, // VORPDZ256rmkz |
| 87180 | 46674, // VORPDZ256rr |
| 87181 | 46677, // VORPDZ256rrk |
| 87182 | 46682, // VORPDZ256rrkz |
| 87183 | 46686, // VORPDZrm |
| 87184 | 46689, // VORPDZrmb |
| 87185 | 46692, // VORPDZrmbk |
| 87186 | 46697, // VORPDZrmbkz |
| 87187 | 46701, // VORPDZrmk |
| 87188 | 46706, // VORPDZrmkz |
| 87189 | 46710, // VORPDZrr |
| 87190 | 46713, // VORPDZrrk |
| 87191 | 46718, // VORPDZrrkz |
| 87192 | 46722, // VORPDrm |
| 87193 | 46725, // VORPDrr |
| 87194 | 46728, // VORPSYrm |
| 87195 | 46731, // VORPSYrr |
| 87196 | 46734, // VORPSZ128rm |
| 87197 | 46737, // VORPSZ128rmb |
| 87198 | 46740, // VORPSZ128rmbk |
| 87199 | 46745, // VORPSZ128rmbkz |
| 87200 | 46749, // VORPSZ128rmk |
| 87201 | 46754, // VORPSZ128rmkz |
| 87202 | 46758, // VORPSZ128rr |
| 87203 | 46761, // VORPSZ128rrk |
| 87204 | 46766, // VORPSZ128rrkz |
| 87205 | 46770, // VORPSZ256rm |
| 87206 | 46773, // VORPSZ256rmb |
| 87207 | 46776, // VORPSZ256rmbk |
| 87208 | 46781, // VORPSZ256rmbkz |
| 87209 | 46785, // VORPSZ256rmk |
| 87210 | 46790, // VORPSZ256rmkz |
| 87211 | 46794, // VORPSZ256rr |
| 87212 | 46797, // VORPSZ256rrk |
| 87213 | 46802, // VORPSZ256rrkz |
| 87214 | 46806, // VORPSZrm |
| 87215 | 46809, // VORPSZrmb |
| 87216 | 46812, // VORPSZrmbk |
| 87217 | 46817, // VORPSZrmbkz |
| 87218 | 46821, // VORPSZrmk |
| 87219 | 46826, // VORPSZrmkz |
| 87220 | 46830, // VORPSZrr |
| 87221 | 46833, // VORPSZrrk |
| 87222 | 46838, // VORPSZrrkz |
| 87223 | 46842, // VORPSrm |
| 87224 | 46845, // VORPSrr |
| 87225 | 46848, // VP2INTERSECTDZ128rm |
| 87226 | 46851, // VP2INTERSECTDZ128rmb |
| 87227 | 46854, // VP2INTERSECTDZ128rr |
| 87228 | 46857, // VP2INTERSECTDZ256rm |
| 87229 | 46860, // VP2INTERSECTDZ256rmb |
| 87230 | 46863, // VP2INTERSECTDZ256rr |
| 87231 | 46866, // VP2INTERSECTDZrm |
| 87232 | 46869, // VP2INTERSECTDZrmb |
| 87233 | 46872, // VP2INTERSECTDZrr |
| 87234 | 46875, // VP2INTERSECTQZ128rm |
| 87235 | 46878, // VP2INTERSECTQZ128rmb |
| 87236 | 46881, // VP2INTERSECTQZ128rr |
| 87237 | 46884, // VP2INTERSECTQZ256rm |
| 87238 | 46887, // VP2INTERSECTQZ256rmb |
| 87239 | 46890, // VP2INTERSECTQZ256rr |
| 87240 | 46893, // VP2INTERSECTQZrm |
| 87241 | 46896, // VP2INTERSECTQZrmb |
| 87242 | 46899, // VP2INTERSECTQZrr |
| 87243 | 46902, // VP4DPWSSDSrm |
| 87244 | 46906, // VP4DPWSSDSrmk |
| 87245 | 46911, // VP4DPWSSDSrmkz |
| 87246 | 46916, // VP4DPWSSDrm |
| 87247 | 46920, // VP4DPWSSDrmk |
| 87248 | 46925, // VP4DPWSSDrmkz |
| 87249 | 46930, // VPABSBYrm |
| 87250 | 46932, // VPABSBYrr |
| 87251 | 46934, // VPABSBZ128rm |
| 87252 | 46936, // VPABSBZ128rmk |
| 87253 | 46940, // VPABSBZ128rmkz |
| 87254 | 46943, // VPABSBZ128rr |
| 87255 | 46945, // VPABSBZ128rrk |
| 87256 | 46949, // VPABSBZ128rrkz |
| 87257 | 46952, // VPABSBZ256rm |
| 87258 | 46954, // VPABSBZ256rmk |
| 87259 | 46958, // VPABSBZ256rmkz |
| 87260 | 46961, // VPABSBZ256rr |
| 87261 | 46963, // VPABSBZ256rrk |
| 87262 | 46967, // VPABSBZ256rrkz |
| 87263 | 46970, // VPABSBZrm |
| 87264 | 46972, // VPABSBZrmk |
| 87265 | 46976, // VPABSBZrmkz |
| 87266 | 46979, // VPABSBZrr |
| 87267 | 46981, // VPABSBZrrk |
| 87268 | 46985, // VPABSBZrrkz |
| 87269 | 46988, // VPABSBrm |
| 87270 | 46990, // VPABSBrr |
| 87271 | 46992, // VPABSDYrm |
| 87272 | 46994, // VPABSDYrr |
| 87273 | 46996, // VPABSDZ128rm |
| 87274 | 46998, // VPABSDZ128rmb |
| 87275 | 47000, // VPABSDZ128rmbk |
| 87276 | 47004, // VPABSDZ128rmbkz |
| 87277 | 47007, // VPABSDZ128rmk |
| 87278 | 47011, // VPABSDZ128rmkz |
| 87279 | 47014, // VPABSDZ128rr |
| 87280 | 47016, // VPABSDZ128rrk |
| 87281 | 47020, // VPABSDZ128rrkz |
| 87282 | 47023, // VPABSDZ256rm |
| 87283 | 47025, // VPABSDZ256rmb |
| 87284 | 47027, // VPABSDZ256rmbk |
| 87285 | 47031, // VPABSDZ256rmbkz |
| 87286 | 47034, // VPABSDZ256rmk |
| 87287 | 47038, // VPABSDZ256rmkz |
| 87288 | 47041, // VPABSDZ256rr |
| 87289 | 47043, // VPABSDZ256rrk |
| 87290 | 47047, // VPABSDZ256rrkz |
| 87291 | 47050, // VPABSDZrm |
| 87292 | 47052, // VPABSDZrmb |
| 87293 | 47054, // VPABSDZrmbk |
| 87294 | 47058, // VPABSDZrmbkz |
| 87295 | 47061, // VPABSDZrmk |
| 87296 | 47065, // VPABSDZrmkz |
| 87297 | 47068, // VPABSDZrr |
| 87298 | 47070, // VPABSDZrrk |
| 87299 | 47074, // VPABSDZrrkz |
| 87300 | 47077, // VPABSDrm |
| 87301 | 47079, // VPABSDrr |
| 87302 | 47081, // VPABSQZ128rm |
| 87303 | 47083, // VPABSQZ128rmb |
| 87304 | 47085, // VPABSQZ128rmbk |
| 87305 | 47089, // VPABSQZ128rmbkz |
| 87306 | 47092, // VPABSQZ128rmk |
| 87307 | 47096, // VPABSQZ128rmkz |
| 87308 | 47099, // VPABSQZ128rr |
| 87309 | 47101, // VPABSQZ128rrk |
| 87310 | 47105, // VPABSQZ128rrkz |
| 87311 | 47108, // VPABSQZ256rm |
| 87312 | 47110, // VPABSQZ256rmb |
| 87313 | 47112, // VPABSQZ256rmbk |
| 87314 | 47116, // VPABSQZ256rmbkz |
| 87315 | 47119, // VPABSQZ256rmk |
| 87316 | 47123, // VPABSQZ256rmkz |
| 87317 | 47126, // VPABSQZ256rr |
| 87318 | 47128, // VPABSQZ256rrk |
| 87319 | 47132, // VPABSQZ256rrkz |
| 87320 | 47135, // VPABSQZrm |
| 87321 | 47137, // VPABSQZrmb |
| 87322 | 47139, // VPABSQZrmbk |
| 87323 | 47143, // VPABSQZrmbkz |
| 87324 | 47146, // VPABSQZrmk |
| 87325 | 47150, // VPABSQZrmkz |
| 87326 | 47153, // VPABSQZrr |
| 87327 | 47155, // VPABSQZrrk |
| 87328 | 47159, // VPABSQZrrkz |
| 87329 | 47162, // VPABSWYrm |
| 87330 | 47164, // VPABSWYrr |
| 87331 | 47166, // VPABSWZ128rm |
| 87332 | 47168, // VPABSWZ128rmk |
| 87333 | 47172, // VPABSWZ128rmkz |
| 87334 | 47175, // VPABSWZ128rr |
| 87335 | 47177, // VPABSWZ128rrk |
| 87336 | 47181, // VPABSWZ128rrkz |
| 87337 | 47184, // VPABSWZ256rm |
| 87338 | 47186, // VPABSWZ256rmk |
| 87339 | 47190, // VPABSWZ256rmkz |
| 87340 | 47193, // VPABSWZ256rr |
| 87341 | 47195, // VPABSWZ256rrk |
| 87342 | 47199, // VPABSWZ256rrkz |
| 87343 | 47202, // VPABSWZrm |
| 87344 | 47204, // VPABSWZrmk |
| 87345 | 47208, // VPABSWZrmkz |
| 87346 | 47211, // VPABSWZrr |
| 87347 | 47213, // VPABSWZrrk |
| 87348 | 47217, // VPABSWZrrkz |
| 87349 | 47220, // VPABSWrm |
| 87350 | 47222, // VPABSWrr |
| 87351 | 47224, // VPACKSSDWYrm |
| 87352 | 47227, // VPACKSSDWYrr |
| 87353 | 47230, // VPACKSSDWZ128rm |
| 87354 | 47233, // VPACKSSDWZ128rmb |
| 87355 | 47236, // VPACKSSDWZ128rmbk |
| 87356 | 47241, // VPACKSSDWZ128rmbkz |
| 87357 | 47245, // VPACKSSDWZ128rmk |
| 87358 | 47250, // VPACKSSDWZ128rmkz |
| 87359 | 47254, // VPACKSSDWZ128rr |
| 87360 | 47257, // VPACKSSDWZ128rrk |
| 87361 | 47262, // VPACKSSDWZ128rrkz |
| 87362 | 47266, // VPACKSSDWZ256rm |
| 87363 | 47269, // VPACKSSDWZ256rmb |
| 87364 | 47272, // VPACKSSDWZ256rmbk |
| 87365 | 47277, // VPACKSSDWZ256rmbkz |
| 87366 | 47281, // VPACKSSDWZ256rmk |
| 87367 | 47286, // VPACKSSDWZ256rmkz |
| 87368 | 47290, // VPACKSSDWZ256rr |
| 87369 | 47293, // VPACKSSDWZ256rrk |
| 87370 | 47298, // VPACKSSDWZ256rrkz |
| 87371 | 47302, // VPACKSSDWZrm |
| 87372 | 47305, // VPACKSSDWZrmb |
| 87373 | 47308, // VPACKSSDWZrmbk |
| 87374 | 47313, // VPACKSSDWZrmbkz |
| 87375 | 47317, // VPACKSSDWZrmk |
| 87376 | 47322, // VPACKSSDWZrmkz |
| 87377 | 47326, // VPACKSSDWZrr |
| 87378 | 47329, // VPACKSSDWZrrk |
| 87379 | 47334, // VPACKSSDWZrrkz |
| 87380 | 47338, // VPACKSSDWrm |
| 87381 | 47341, // VPACKSSDWrr |
| 87382 | 47344, // VPACKSSWBYrm |
| 87383 | 47347, // VPACKSSWBYrr |
| 87384 | 47350, // VPACKSSWBZ128rm |
| 87385 | 47353, // VPACKSSWBZ128rmk |
| 87386 | 47358, // VPACKSSWBZ128rmkz |
| 87387 | 47362, // VPACKSSWBZ128rr |
| 87388 | 47365, // VPACKSSWBZ128rrk |
| 87389 | 47370, // VPACKSSWBZ128rrkz |
| 87390 | 47374, // VPACKSSWBZ256rm |
| 87391 | 47377, // VPACKSSWBZ256rmk |
| 87392 | 47382, // VPACKSSWBZ256rmkz |
| 87393 | 47386, // VPACKSSWBZ256rr |
| 87394 | 47389, // VPACKSSWBZ256rrk |
| 87395 | 47394, // VPACKSSWBZ256rrkz |
| 87396 | 47398, // VPACKSSWBZrm |
| 87397 | 47401, // VPACKSSWBZrmk |
| 87398 | 47406, // VPACKSSWBZrmkz |
| 87399 | 47410, // VPACKSSWBZrr |
| 87400 | 47413, // VPACKSSWBZrrk |
| 87401 | 47418, // VPACKSSWBZrrkz |
| 87402 | 47422, // VPACKSSWBrm |
| 87403 | 47425, // VPACKSSWBrr |
| 87404 | 47428, // VPACKUSDWYrm |
| 87405 | 47431, // VPACKUSDWYrr |
| 87406 | 47434, // VPACKUSDWZ128rm |
| 87407 | 47437, // VPACKUSDWZ128rmb |
| 87408 | 47440, // VPACKUSDWZ128rmbk |
| 87409 | 47445, // VPACKUSDWZ128rmbkz |
| 87410 | 47449, // VPACKUSDWZ128rmk |
| 87411 | 47454, // VPACKUSDWZ128rmkz |
| 87412 | 47458, // VPACKUSDWZ128rr |
| 87413 | 47461, // VPACKUSDWZ128rrk |
| 87414 | 47466, // VPACKUSDWZ128rrkz |
| 87415 | 47470, // VPACKUSDWZ256rm |
| 87416 | 47473, // VPACKUSDWZ256rmb |
| 87417 | 47476, // VPACKUSDWZ256rmbk |
| 87418 | 47481, // VPACKUSDWZ256rmbkz |
| 87419 | 47485, // VPACKUSDWZ256rmk |
| 87420 | 47490, // VPACKUSDWZ256rmkz |
| 87421 | 47494, // VPACKUSDWZ256rr |
| 87422 | 47497, // VPACKUSDWZ256rrk |
| 87423 | 47502, // VPACKUSDWZ256rrkz |
| 87424 | 47506, // VPACKUSDWZrm |
| 87425 | 47509, // VPACKUSDWZrmb |
| 87426 | 47512, // VPACKUSDWZrmbk |
| 87427 | 47517, // VPACKUSDWZrmbkz |
| 87428 | 47521, // VPACKUSDWZrmk |
| 87429 | 47526, // VPACKUSDWZrmkz |
| 87430 | 47530, // VPACKUSDWZrr |
| 87431 | 47533, // VPACKUSDWZrrk |
| 87432 | 47538, // VPACKUSDWZrrkz |
| 87433 | 47542, // VPACKUSDWrm |
| 87434 | 47545, // VPACKUSDWrr |
| 87435 | 47548, // VPACKUSWBYrm |
| 87436 | 47551, // VPACKUSWBYrr |
| 87437 | 47554, // VPACKUSWBZ128rm |
| 87438 | 47557, // VPACKUSWBZ128rmk |
| 87439 | 47562, // VPACKUSWBZ128rmkz |
| 87440 | 47566, // VPACKUSWBZ128rr |
| 87441 | 47569, // VPACKUSWBZ128rrk |
| 87442 | 47574, // VPACKUSWBZ128rrkz |
| 87443 | 47578, // VPACKUSWBZ256rm |
| 87444 | 47581, // VPACKUSWBZ256rmk |
| 87445 | 47586, // VPACKUSWBZ256rmkz |
| 87446 | 47590, // VPACKUSWBZ256rr |
| 87447 | 47593, // VPACKUSWBZ256rrk |
| 87448 | 47598, // VPACKUSWBZ256rrkz |
| 87449 | 47602, // VPACKUSWBZrm |
| 87450 | 47605, // VPACKUSWBZrmk |
| 87451 | 47610, // VPACKUSWBZrmkz |
| 87452 | 47614, // VPACKUSWBZrr |
| 87453 | 47617, // VPACKUSWBZrrk |
| 87454 | 47622, // VPACKUSWBZrrkz |
| 87455 | 47626, // VPACKUSWBrm |
| 87456 | 47629, // VPACKUSWBrr |
| 87457 | 47632, // VPADDBYrm |
| 87458 | 47635, // VPADDBYrr |
| 87459 | 47638, // VPADDBZ128rm |
| 87460 | 47641, // VPADDBZ128rmk |
| 87461 | 47646, // VPADDBZ128rmkz |
| 87462 | 47650, // VPADDBZ128rr |
| 87463 | 47653, // VPADDBZ128rrk |
| 87464 | 47658, // VPADDBZ128rrkz |
| 87465 | 47662, // VPADDBZ256rm |
| 87466 | 47665, // VPADDBZ256rmk |
| 87467 | 47670, // VPADDBZ256rmkz |
| 87468 | 47674, // VPADDBZ256rr |
| 87469 | 47677, // VPADDBZ256rrk |
| 87470 | 47682, // VPADDBZ256rrkz |
| 87471 | 47686, // VPADDBZrm |
| 87472 | 47689, // VPADDBZrmk |
| 87473 | 47694, // VPADDBZrmkz |
| 87474 | 47698, // VPADDBZrr |
| 87475 | 47701, // VPADDBZrrk |
| 87476 | 47706, // VPADDBZrrkz |
| 87477 | 47710, // VPADDBrm |
| 87478 | 47713, // VPADDBrr |
| 87479 | 47716, // VPADDDYrm |
| 87480 | 47719, // VPADDDYrr |
| 87481 | 47722, // VPADDDZ128rm |
| 87482 | 47725, // VPADDDZ128rmb |
| 87483 | 47728, // VPADDDZ128rmbk |
| 87484 | 47733, // VPADDDZ128rmbkz |
| 87485 | 47737, // VPADDDZ128rmk |
| 87486 | 47742, // VPADDDZ128rmkz |
| 87487 | 47746, // VPADDDZ128rr |
| 87488 | 47749, // VPADDDZ128rrk |
| 87489 | 47754, // VPADDDZ128rrkz |
| 87490 | 47758, // VPADDDZ256rm |
| 87491 | 47761, // VPADDDZ256rmb |
| 87492 | 47764, // VPADDDZ256rmbk |
| 87493 | 47769, // VPADDDZ256rmbkz |
| 87494 | 47773, // VPADDDZ256rmk |
| 87495 | 47778, // VPADDDZ256rmkz |
| 87496 | 47782, // VPADDDZ256rr |
| 87497 | 47785, // VPADDDZ256rrk |
| 87498 | 47790, // VPADDDZ256rrkz |
| 87499 | 47794, // VPADDDZrm |
| 87500 | 47797, // VPADDDZrmb |
| 87501 | 47800, // VPADDDZrmbk |
| 87502 | 47805, // VPADDDZrmbkz |
| 87503 | 47809, // VPADDDZrmk |
| 87504 | 47814, // VPADDDZrmkz |
| 87505 | 47818, // VPADDDZrr |
| 87506 | 47821, // VPADDDZrrk |
| 87507 | 47826, // VPADDDZrrkz |
| 87508 | 47830, // VPADDDrm |
| 87509 | 47833, // VPADDDrr |
| 87510 | 47836, // VPADDQYrm |
| 87511 | 47839, // VPADDQYrr |
| 87512 | 47842, // VPADDQZ128rm |
| 87513 | 47845, // VPADDQZ128rmb |
| 87514 | 47848, // VPADDQZ128rmbk |
| 87515 | 47853, // VPADDQZ128rmbkz |
| 87516 | 47857, // VPADDQZ128rmk |
| 87517 | 47862, // VPADDQZ128rmkz |
| 87518 | 47866, // VPADDQZ128rr |
| 87519 | 47869, // VPADDQZ128rrk |
| 87520 | 47874, // VPADDQZ128rrkz |
| 87521 | 47878, // VPADDQZ256rm |
| 87522 | 47881, // VPADDQZ256rmb |
| 87523 | 47884, // VPADDQZ256rmbk |
| 87524 | 47889, // VPADDQZ256rmbkz |
| 87525 | 47893, // VPADDQZ256rmk |
| 87526 | 47898, // VPADDQZ256rmkz |
| 87527 | 47902, // VPADDQZ256rr |
| 87528 | 47905, // VPADDQZ256rrk |
| 87529 | 47910, // VPADDQZ256rrkz |
| 87530 | 47914, // VPADDQZrm |
| 87531 | 47917, // VPADDQZrmb |
| 87532 | 47920, // VPADDQZrmbk |
| 87533 | 47925, // VPADDQZrmbkz |
| 87534 | 47929, // VPADDQZrmk |
| 87535 | 47934, // VPADDQZrmkz |
| 87536 | 47938, // VPADDQZrr |
| 87537 | 47941, // VPADDQZrrk |
| 87538 | 47946, // VPADDQZrrkz |
| 87539 | 47950, // VPADDQrm |
| 87540 | 47953, // VPADDQrr |
| 87541 | 47956, // VPADDSBYrm |
| 87542 | 47959, // VPADDSBYrr |
| 87543 | 47962, // VPADDSBZ128rm |
| 87544 | 47965, // VPADDSBZ128rmk |
| 87545 | 47970, // VPADDSBZ128rmkz |
| 87546 | 47974, // VPADDSBZ128rr |
| 87547 | 47977, // VPADDSBZ128rrk |
| 87548 | 47982, // VPADDSBZ128rrkz |
| 87549 | 47986, // VPADDSBZ256rm |
| 87550 | 47989, // VPADDSBZ256rmk |
| 87551 | 47994, // VPADDSBZ256rmkz |
| 87552 | 47998, // VPADDSBZ256rr |
| 87553 | 48001, // VPADDSBZ256rrk |
| 87554 | 48006, // VPADDSBZ256rrkz |
| 87555 | 48010, // VPADDSBZrm |
| 87556 | 48013, // VPADDSBZrmk |
| 87557 | 48018, // VPADDSBZrmkz |
| 87558 | 48022, // VPADDSBZrr |
| 87559 | 48025, // VPADDSBZrrk |
| 87560 | 48030, // VPADDSBZrrkz |
| 87561 | 48034, // VPADDSBrm |
| 87562 | 48037, // VPADDSBrr |
| 87563 | 48040, // VPADDSWYrm |
| 87564 | 48043, // VPADDSWYrr |
| 87565 | 48046, // VPADDSWZ128rm |
| 87566 | 48049, // VPADDSWZ128rmk |
| 87567 | 48054, // VPADDSWZ128rmkz |
| 87568 | 48058, // VPADDSWZ128rr |
| 87569 | 48061, // VPADDSWZ128rrk |
| 87570 | 48066, // VPADDSWZ128rrkz |
| 87571 | 48070, // VPADDSWZ256rm |
| 87572 | 48073, // VPADDSWZ256rmk |
| 87573 | 48078, // VPADDSWZ256rmkz |
| 87574 | 48082, // VPADDSWZ256rr |
| 87575 | 48085, // VPADDSWZ256rrk |
| 87576 | 48090, // VPADDSWZ256rrkz |
| 87577 | 48094, // VPADDSWZrm |
| 87578 | 48097, // VPADDSWZrmk |
| 87579 | 48102, // VPADDSWZrmkz |
| 87580 | 48106, // VPADDSWZrr |
| 87581 | 48109, // VPADDSWZrrk |
| 87582 | 48114, // VPADDSWZrrkz |
| 87583 | 48118, // VPADDSWrm |
| 87584 | 48121, // VPADDSWrr |
| 87585 | 48124, // VPADDUSBYrm |
| 87586 | 48127, // VPADDUSBYrr |
| 87587 | 48130, // VPADDUSBZ128rm |
| 87588 | 48133, // VPADDUSBZ128rmk |
| 87589 | 48138, // VPADDUSBZ128rmkz |
| 87590 | 48142, // VPADDUSBZ128rr |
| 87591 | 48145, // VPADDUSBZ128rrk |
| 87592 | 48150, // VPADDUSBZ128rrkz |
| 87593 | 48154, // VPADDUSBZ256rm |
| 87594 | 48157, // VPADDUSBZ256rmk |
| 87595 | 48162, // VPADDUSBZ256rmkz |
| 87596 | 48166, // VPADDUSBZ256rr |
| 87597 | 48169, // VPADDUSBZ256rrk |
| 87598 | 48174, // VPADDUSBZ256rrkz |
| 87599 | 48178, // VPADDUSBZrm |
| 87600 | 48181, // VPADDUSBZrmk |
| 87601 | 48186, // VPADDUSBZrmkz |
| 87602 | 48190, // VPADDUSBZrr |
| 87603 | 48193, // VPADDUSBZrrk |
| 87604 | 48198, // VPADDUSBZrrkz |
| 87605 | 48202, // VPADDUSBrm |
| 87606 | 48205, // VPADDUSBrr |
| 87607 | 48208, // VPADDUSWYrm |
| 87608 | 48211, // VPADDUSWYrr |
| 87609 | 48214, // VPADDUSWZ128rm |
| 87610 | 48217, // VPADDUSWZ128rmk |
| 87611 | 48222, // VPADDUSWZ128rmkz |
| 87612 | 48226, // VPADDUSWZ128rr |
| 87613 | 48229, // VPADDUSWZ128rrk |
| 87614 | 48234, // VPADDUSWZ128rrkz |
| 87615 | 48238, // VPADDUSWZ256rm |
| 87616 | 48241, // VPADDUSWZ256rmk |
| 87617 | 48246, // VPADDUSWZ256rmkz |
| 87618 | 48250, // VPADDUSWZ256rr |
| 87619 | 48253, // VPADDUSWZ256rrk |
| 87620 | 48258, // VPADDUSWZ256rrkz |
| 87621 | 48262, // VPADDUSWZrm |
| 87622 | 48265, // VPADDUSWZrmk |
| 87623 | 48270, // VPADDUSWZrmkz |
| 87624 | 48274, // VPADDUSWZrr |
| 87625 | 48277, // VPADDUSWZrrk |
| 87626 | 48282, // VPADDUSWZrrkz |
| 87627 | 48286, // VPADDUSWrm |
| 87628 | 48289, // VPADDUSWrr |
| 87629 | 48292, // VPADDWYrm |
| 87630 | 48295, // VPADDWYrr |
| 87631 | 48298, // VPADDWZ128rm |
| 87632 | 48301, // VPADDWZ128rmk |
| 87633 | 48306, // VPADDWZ128rmkz |
| 87634 | 48310, // VPADDWZ128rr |
| 87635 | 48313, // VPADDWZ128rrk |
| 87636 | 48318, // VPADDWZ128rrkz |
| 87637 | 48322, // VPADDWZ256rm |
| 87638 | 48325, // VPADDWZ256rmk |
| 87639 | 48330, // VPADDWZ256rmkz |
| 87640 | 48334, // VPADDWZ256rr |
| 87641 | 48337, // VPADDWZ256rrk |
| 87642 | 48342, // VPADDWZ256rrkz |
| 87643 | 48346, // VPADDWZrm |
| 87644 | 48349, // VPADDWZrmk |
| 87645 | 48354, // VPADDWZrmkz |
| 87646 | 48358, // VPADDWZrr |
| 87647 | 48361, // VPADDWZrrk |
| 87648 | 48366, // VPADDWZrrkz |
| 87649 | 48370, // VPADDWrm |
| 87650 | 48373, // VPADDWrr |
| 87651 | 48376, // VPALIGNRYrmi |
| 87652 | 48380, // VPALIGNRYrri |
| 87653 | 48384, // VPALIGNRZ128rmi |
| 87654 | 48388, // VPALIGNRZ128rmik |
| 87655 | 48394, // VPALIGNRZ128rmikz |
| 87656 | 48399, // VPALIGNRZ128rri |
| 87657 | 48403, // VPALIGNRZ128rrik |
| 87658 | 48409, // VPALIGNRZ128rrikz |
| 87659 | 48414, // VPALIGNRZ256rmi |
| 87660 | 48418, // VPALIGNRZ256rmik |
| 87661 | 48424, // VPALIGNRZ256rmikz |
| 87662 | 48429, // VPALIGNRZ256rri |
| 87663 | 48433, // VPALIGNRZ256rrik |
| 87664 | 48439, // VPALIGNRZ256rrikz |
| 87665 | 48444, // VPALIGNRZrmi |
| 87666 | 48448, // VPALIGNRZrmik |
| 87667 | 48454, // VPALIGNRZrmikz |
| 87668 | 48459, // VPALIGNRZrri |
| 87669 | 48463, // VPALIGNRZrrik |
| 87670 | 48469, // VPALIGNRZrrikz |
| 87671 | 48474, // VPALIGNRrmi |
| 87672 | 48478, // VPALIGNRrri |
| 87673 | 48482, // VPANDDZ128rm |
| 87674 | 48485, // VPANDDZ128rmb |
| 87675 | 48488, // VPANDDZ128rmbk |
| 87676 | 48493, // VPANDDZ128rmbkz |
| 87677 | 48497, // VPANDDZ128rmk |
| 87678 | 48502, // VPANDDZ128rmkz |
| 87679 | 48506, // VPANDDZ128rr |
| 87680 | 48509, // VPANDDZ128rrk |
| 87681 | 48514, // VPANDDZ128rrkz |
| 87682 | 48518, // VPANDDZ256rm |
| 87683 | 48521, // VPANDDZ256rmb |
| 87684 | 48524, // VPANDDZ256rmbk |
| 87685 | 48529, // VPANDDZ256rmbkz |
| 87686 | 48533, // VPANDDZ256rmk |
| 87687 | 48538, // VPANDDZ256rmkz |
| 87688 | 48542, // VPANDDZ256rr |
| 87689 | 48545, // VPANDDZ256rrk |
| 87690 | 48550, // VPANDDZ256rrkz |
| 87691 | 48554, // VPANDDZrm |
| 87692 | 48557, // VPANDDZrmb |
| 87693 | 48560, // VPANDDZrmbk |
| 87694 | 48565, // VPANDDZrmbkz |
| 87695 | 48569, // VPANDDZrmk |
| 87696 | 48574, // VPANDDZrmkz |
| 87697 | 48578, // VPANDDZrr |
| 87698 | 48581, // VPANDDZrrk |
| 87699 | 48586, // VPANDDZrrkz |
| 87700 | 48590, // VPANDNDZ128rm |
| 87701 | 48593, // VPANDNDZ128rmb |
| 87702 | 48596, // VPANDNDZ128rmbk |
| 87703 | 48601, // VPANDNDZ128rmbkz |
| 87704 | 48605, // VPANDNDZ128rmk |
| 87705 | 48610, // VPANDNDZ128rmkz |
| 87706 | 48614, // VPANDNDZ128rr |
| 87707 | 48617, // VPANDNDZ128rrk |
| 87708 | 48622, // VPANDNDZ128rrkz |
| 87709 | 48626, // VPANDNDZ256rm |
| 87710 | 48629, // VPANDNDZ256rmb |
| 87711 | 48632, // VPANDNDZ256rmbk |
| 87712 | 48637, // VPANDNDZ256rmbkz |
| 87713 | 48641, // VPANDNDZ256rmk |
| 87714 | 48646, // VPANDNDZ256rmkz |
| 87715 | 48650, // VPANDNDZ256rr |
| 87716 | 48653, // VPANDNDZ256rrk |
| 87717 | 48658, // VPANDNDZ256rrkz |
| 87718 | 48662, // VPANDNDZrm |
| 87719 | 48665, // VPANDNDZrmb |
| 87720 | 48668, // VPANDNDZrmbk |
| 87721 | 48673, // VPANDNDZrmbkz |
| 87722 | 48677, // VPANDNDZrmk |
| 87723 | 48682, // VPANDNDZrmkz |
| 87724 | 48686, // VPANDNDZrr |
| 87725 | 48689, // VPANDNDZrrk |
| 87726 | 48694, // VPANDNDZrrkz |
| 87727 | 48698, // VPANDNQZ128rm |
| 87728 | 48701, // VPANDNQZ128rmb |
| 87729 | 48704, // VPANDNQZ128rmbk |
| 87730 | 48709, // VPANDNQZ128rmbkz |
| 87731 | 48713, // VPANDNQZ128rmk |
| 87732 | 48718, // VPANDNQZ128rmkz |
| 87733 | 48722, // VPANDNQZ128rr |
| 87734 | 48725, // VPANDNQZ128rrk |
| 87735 | 48730, // VPANDNQZ128rrkz |
| 87736 | 48734, // VPANDNQZ256rm |
| 87737 | 48737, // VPANDNQZ256rmb |
| 87738 | 48740, // VPANDNQZ256rmbk |
| 87739 | 48745, // VPANDNQZ256rmbkz |
| 87740 | 48749, // VPANDNQZ256rmk |
| 87741 | 48754, // VPANDNQZ256rmkz |
| 87742 | 48758, // VPANDNQZ256rr |
| 87743 | 48761, // VPANDNQZ256rrk |
| 87744 | 48766, // VPANDNQZ256rrkz |
| 87745 | 48770, // VPANDNQZrm |
| 87746 | 48773, // VPANDNQZrmb |
| 87747 | 48776, // VPANDNQZrmbk |
| 87748 | 48781, // VPANDNQZrmbkz |
| 87749 | 48785, // VPANDNQZrmk |
| 87750 | 48790, // VPANDNQZrmkz |
| 87751 | 48794, // VPANDNQZrr |
| 87752 | 48797, // VPANDNQZrrk |
| 87753 | 48802, // VPANDNQZrrkz |
| 87754 | 48806, // VPANDNYrm |
| 87755 | 48809, // VPANDNYrr |
| 87756 | 48812, // VPANDNrm |
| 87757 | 48815, // VPANDNrr |
| 87758 | 48818, // VPANDQZ128rm |
| 87759 | 48821, // VPANDQZ128rmb |
| 87760 | 48824, // VPANDQZ128rmbk |
| 87761 | 48829, // VPANDQZ128rmbkz |
| 87762 | 48833, // VPANDQZ128rmk |
| 87763 | 48838, // VPANDQZ128rmkz |
| 87764 | 48842, // VPANDQZ128rr |
| 87765 | 48845, // VPANDQZ128rrk |
| 87766 | 48850, // VPANDQZ128rrkz |
| 87767 | 48854, // VPANDQZ256rm |
| 87768 | 48857, // VPANDQZ256rmb |
| 87769 | 48860, // VPANDQZ256rmbk |
| 87770 | 48865, // VPANDQZ256rmbkz |
| 87771 | 48869, // VPANDQZ256rmk |
| 87772 | 48874, // VPANDQZ256rmkz |
| 87773 | 48878, // VPANDQZ256rr |
| 87774 | 48881, // VPANDQZ256rrk |
| 87775 | 48886, // VPANDQZ256rrkz |
| 87776 | 48890, // VPANDQZrm |
| 87777 | 48893, // VPANDQZrmb |
| 87778 | 48896, // VPANDQZrmbk |
| 87779 | 48901, // VPANDQZrmbkz |
| 87780 | 48905, // VPANDQZrmk |
| 87781 | 48910, // VPANDQZrmkz |
| 87782 | 48914, // VPANDQZrr |
| 87783 | 48917, // VPANDQZrrk |
| 87784 | 48922, // VPANDQZrrkz |
| 87785 | 48926, // VPANDYrm |
| 87786 | 48929, // VPANDYrr |
| 87787 | 48932, // VPANDrm |
| 87788 | 48935, // VPANDrr |
| 87789 | 48938, // VPAVGBYrm |
| 87790 | 48941, // VPAVGBYrr |
| 87791 | 48944, // VPAVGBZ128rm |
| 87792 | 48947, // VPAVGBZ128rmk |
| 87793 | 48952, // VPAVGBZ128rmkz |
| 87794 | 48956, // VPAVGBZ128rr |
| 87795 | 48959, // VPAVGBZ128rrk |
| 87796 | 48964, // VPAVGBZ128rrkz |
| 87797 | 48968, // VPAVGBZ256rm |
| 87798 | 48971, // VPAVGBZ256rmk |
| 87799 | 48976, // VPAVGBZ256rmkz |
| 87800 | 48980, // VPAVGBZ256rr |
| 87801 | 48983, // VPAVGBZ256rrk |
| 87802 | 48988, // VPAVGBZ256rrkz |
| 87803 | 48992, // VPAVGBZrm |
| 87804 | 48995, // VPAVGBZrmk |
| 87805 | 49000, // VPAVGBZrmkz |
| 87806 | 49004, // VPAVGBZrr |
| 87807 | 49007, // VPAVGBZrrk |
| 87808 | 49012, // VPAVGBZrrkz |
| 87809 | 49016, // VPAVGBrm |
| 87810 | 49019, // VPAVGBrr |
| 87811 | 49022, // VPAVGWYrm |
| 87812 | 49025, // VPAVGWYrr |
| 87813 | 49028, // VPAVGWZ128rm |
| 87814 | 49031, // VPAVGWZ128rmk |
| 87815 | 49036, // VPAVGWZ128rmkz |
| 87816 | 49040, // VPAVGWZ128rr |
| 87817 | 49043, // VPAVGWZ128rrk |
| 87818 | 49048, // VPAVGWZ128rrkz |
| 87819 | 49052, // VPAVGWZ256rm |
| 87820 | 49055, // VPAVGWZ256rmk |
| 87821 | 49060, // VPAVGWZ256rmkz |
| 87822 | 49064, // VPAVGWZ256rr |
| 87823 | 49067, // VPAVGWZ256rrk |
| 87824 | 49072, // VPAVGWZ256rrkz |
| 87825 | 49076, // VPAVGWZrm |
| 87826 | 49079, // VPAVGWZrmk |
| 87827 | 49084, // VPAVGWZrmkz |
| 87828 | 49088, // VPAVGWZrr |
| 87829 | 49091, // VPAVGWZrrk |
| 87830 | 49096, // VPAVGWZrrkz |
| 87831 | 49100, // VPAVGWrm |
| 87832 | 49103, // VPAVGWrr |
| 87833 | 49106, // VPBLENDDYrmi |
| 87834 | 49110, // VPBLENDDYrri |
| 87835 | 49114, // VPBLENDDrmi |
| 87836 | 49118, // VPBLENDDrri |
| 87837 | 49122, // VPBLENDMBZ128rm |
| 87838 | 49125, // VPBLENDMBZ128rmk |
| 87839 | 49129, // VPBLENDMBZ128rmkz |
| 87840 | 49133, // VPBLENDMBZ128rr |
| 87841 | 49136, // VPBLENDMBZ128rrk |
| 87842 | 49140, // VPBLENDMBZ128rrkz |
| 87843 | 49144, // VPBLENDMBZ256rm |
| 87844 | 49147, // VPBLENDMBZ256rmk |
| 87845 | 49151, // VPBLENDMBZ256rmkz |
| 87846 | 49155, // VPBLENDMBZ256rr |
| 87847 | 49158, // VPBLENDMBZ256rrk |
| 87848 | 49162, // VPBLENDMBZ256rrkz |
| 87849 | 49166, // VPBLENDMBZrm |
| 87850 | 49169, // VPBLENDMBZrmk |
| 87851 | 49173, // VPBLENDMBZrmkz |
| 87852 | 49177, // VPBLENDMBZrr |
| 87853 | 49180, // VPBLENDMBZrrk |
| 87854 | 49184, // VPBLENDMBZrrkz |
| 87855 | 49188, // VPBLENDMDZ128rm |
| 87856 | 49191, // VPBLENDMDZ128rmb |
| 87857 | 49194, // VPBLENDMDZ128rmbk |
| 87858 | 49198, // VPBLENDMDZ128rmbkz |
| 87859 | 49202, // VPBLENDMDZ128rmk |
| 87860 | 49206, // VPBLENDMDZ128rmkz |
| 87861 | 49210, // VPBLENDMDZ128rr |
| 87862 | 49213, // VPBLENDMDZ128rrk |
| 87863 | 49217, // VPBLENDMDZ128rrkz |
| 87864 | 49221, // VPBLENDMDZ256rm |
| 87865 | 49224, // VPBLENDMDZ256rmb |
| 87866 | 49227, // VPBLENDMDZ256rmbk |
| 87867 | 49231, // VPBLENDMDZ256rmbkz |
| 87868 | 49235, // VPBLENDMDZ256rmk |
| 87869 | 49239, // VPBLENDMDZ256rmkz |
| 87870 | 49243, // VPBLENDMDZ256rr |
| 87871 | 49246, // VPBLENDMDZ256rrk |
| 87872 | 49250, // VPBLENDMDZ256rrkz |
| 87873 | 49254, // VPBLENDMDZrm |
| 87874 | 49257, // VPBLENDMDZrmb |
| 87875 | 49260, // VPBLENDMDZrmbk |
| 87876 | 49264, // VPBLENDMDZrmbkz |
| 87877 | 49268, // VPBLENDMDZrmk |
| 87878 | 49272, // VPBLENDMDZrmkz |
| 87879 | 49276, // VPBLENDMDZrr |
| 87880 | 49279, // VPBLENDMDZrrk |
| 87881 | 49283, // VPBLENDMDZrrkz |
| 87882 | 49287, // VPBLENDMQZ128rm |
| 87883 | 49290, // VPBLENDMQZ128rmb |
| 87884 | 49293, // VPBLENDMQZ128rmbk |
| 87885 | 49297, // VPBLENDMQZ128rmbkz |
| 87886 | 49301, // VPBLENDMQZ128rmk |
| 87887 | 49305, // VPBLENDMQZ128rmkz |
| 87888 | 49309, // VPBLENDMQZ128rr |
| 87889 | 49312, // VPBLENDMQZ128rrk |
| 87890 | 49316, // VPBLENDMQZ128rrkz |
| 87891 | 49320, // VPBLENDMQZ256rm |
| 87892 | 49323, // VPBLENDMQZ256rmb |
| 87893 | 49326, // VPBLENDMQZ256rmbk |
| 87894 | 49330, // VPBLENDMQZ256rmbkz |
| 87895 | 49334, // VPBLENDMQZ256rmk |
| 87896 | 49338, // VPBLENDMQZ256rmkz |
| 87897 | 49342, // VPBLENDMQZ256rr |
| 87898 | 49345, // VPBLENDMQZ256rrk |
| 87899 | 49349, // VPBLENDMQZ256rrkz |
| 87900 | 49353, // VPBLENDMQZrm |
| 87901 | 49356, // VPBLENDMQZrmb |
| 87902 | 49359, // VPBLENDMQZrmbk |
| 87903 | 49363, // VPBLENDMQZrmbkz |
| 87904 | 49367, // VPBLENDMQZrmk |
| 87905 | 49371, // VPBLENDMQZrmkz |
| 87906 | 49375, // VPBLENDMQZrr |
| 87907 | 49378, // VPBLENDMQZrrk |
| 87908 | 49382, // VPBLENDMQZrrkz |
| 87909 | 49386, // VPBLENDMWZ128rm |
| 87910 | 49389, // VPBLENDMWZ128rmk |
| 87911 | 49393, // VPBLENDMWZ128rmkz |
| 87912 | 49397, // VPBLENDMWZ128rr |
| 87913 | 49400, // VPBLENDMWZ128rrk |
| 87914 | 49404, // VPBLENDMWZ128rrkz |
| 87915 | 49408, // VPBLENDMWZ256rm |
| 87916 | 49411, // VPBLENDMWZ256rmk |
| 87917 | 49415, // VPBLENDMWZ256rmkz |
| 87918 | 49419, // VPBLENDMWZ256rr |
| 87919 | 49422, // VPBLENDMWZ256rrk |
| 87920 | 49426, // VPBLENDMWZ256rrkz |
| 87921 | 49430, // VPBLENDMWZrm |
| 87922 | 49433, // VPBLENDMWZrmk |
| 87923 | 49437, // VPBLENDMWZrmkz |
| 87924 | 49441, // VPBLENDMWZrr |
| 87925 | 49444, // VPBLENDMWZrrk |
| 87926 | 49448, // VPBLENDMWZrrkz |
| 87927 | 49452, // VPBLENDVBYrmr |
| 87928 | 49456, // VPBLENDVBYrrr |
| 87929 | 49460, // VPBLENDVBrmr |
| 87930 | 49464, // VPBLENDVBrrr |
| 87931 | 49468, // VPBLENDWYrmi |
| 87932 | 49472, // VPBLENDWYrri |
| 87933 | 49476, // VPBLENDWrmi |
| 87934 | 49480, // VPBLENDWrri |
| 87935 | 49484, // VPBROADCASTBYrm |
| 87936 | 49486, // VPBROADCASTBYrr |
| 87937 | 49488, // VPBROADCASTBZ128rm |
| 87938 | 49490, // VPBROADCASTBZ128rmk |
| 87939 | 49494, // VPBROADCASTBZ128rmkz |
| 87940 | 49497, // VPBROADCASTBZ128rr |
| 87941 | 49499, // VPBROADCASTBZ128rrk |
| 87942 | 49503, // VPBROADCASTBZ128rrkz |
| 87943 | 49506, // VPBROADCASTBZ256rm |
| 87944 | 49508, // VPBROADCASTBZ256rmk |
| 87945 | 49512, // VPBROADCASTBZ256rmkz |
| 87946 | 49515, // VPBROADCASTBZ256rr |
| 87947 | 49517, // VPBROADCASTBZ256rrk |
| 87948 | 49521, // VPBROADCASTBZ256rrkz |
| 87949 | 49524, // VPBROADCASTBZrm |
| 87950 | 49526, // VPBROADCASTBZrmk |
| 87951 | 49530, // VPBROADCASTBZrmkz |
| 87952 | 49533, // VPBROADCASTBZrr |
| 87953 | 49535, // VPBROADCASTBZrrk |
| 87954 | 49539, // VPBROADCASTBZrrkz |
| 87955 | 49542, // VPBROADCASTBrZ128rr |
| 87956 | 49544, // VPBROADCASTBrZ128rrk |
| 87957 | 49548, // VPBROADCASTBrZ128rrkz |
| 87958 | 49551, // VPBROADCASTBrZ256rr |
| 87959 | 49553, // VPBROADCASTBrZ256rrk |
| 87960 | 49557, // VPBROADCASTBrZ256rrkz |
| 87961 | 49560, // VPBROADCASTBrZrr |
| 87962 | 49562, // VPBROADCASTBrZrrk |
| 87963 | 49566, // VPBROADCASTBrZrrkz |
| 87964 | 49569, // VPBROADCASTBrm |
| 87965 | 49571, // VPBROADCASTBrr |
| 87966 | 49573, // VPBROADCASTDYrm |
| 87967 | 49575, // VPBROADCASTDYrr |
| 87968 | 49577, // VPBROADCASTDZ128rm |
| 87969 | 49579, // VPBROADCASTDZ128rmk |
| 87970 | 49583, // VPBROADCASTDZ128rmkz |
| 87971 | 49586, // VPBROADCASTDZ128rr |
| 87972 | 49588, // VPBROADCASTDZ128rrk |
| 87973 | 49592, // VPBROADCASTDZ128rrkz |
| 87974 | 49595, // VPBROADCASTDZ256rm |
| 87975 | 49597, // VPBROADCASTDZ256rmk |
| 87976 | 49601, // VPBROADCASTDZ256rmkz |
| 87977 | 49604, // VPBROADCASTDZ256rr |
| 87978 | 49606, // VPBROADCASTDZ256rrk |
| 87979 | 49610, // VPBROADCASTDZ256rrkz |
| 87980 | 49613, // VPBROADCASTDZrm |
| 87981 | 49615, // VPBROADCASTDZrmk |
| 87982 | 49619, // VPBROADCASTDZrmkz |
| 87983 | 49622, // VPBROADCASTDZrr |
| 87984 | 49624, // VPBROADCASTDZrrk |
| 87985 | 49628, // VPBROADCASTDZrrkz |
| 87986 | 49631, // VPBROADCASTDrZ128rr |
| 87987 | 49633, // VPBROADCASTDrZ128rrk |
| 87988 | 49637, // VPBROADCASTDrZ128rrkz |
| 87989 | 49640, // VPBROADCASTDrZ256rr |
| 87990 | 49642, // VPBROADCASTDrZ256rrk |
| 87991 | 49646, // VPBROADCASTDrZ256rrkz |
| 87992 | 49649, // VPBROADCASTDrZrr |
| 87993 | 49651, // VPBROADCASTDrZrrk |
| 87994 | 49655, // VPBROADCASTDrZrrkz |
| 87995 | 49658, // VPBROADCASTDrm |
| 87996 | 49660, // VPBROADCASTDrr |
| 87997 | 49662, // VPBROADCASTMB2QZ128rr |
| 87998 | 49664, // VPBROADCASTMB2QZ256rr |
| 87999 | 49666, // VPBROADCASTMB2QZrr |
| 88000 | 49668, // VPBROADCASTMW2DZ128rr |
| 88001 | 49670, // VPBROADCASTMW2DZ256rr |
| 88002 | 49672, // VPBROADCASTMW2DZrr |
| 88003 | 49674, // VPBROADCASTQYrm |
| 88004 | 49676, // VPBROADCASTQYrr |
| 88005 | 49678, // VPBROADCASTQZ128rm |
| 88006 | 49680, // VPBROADCASTQZ128rmk |
| 88007 | 49684, // VPBROADCASTQZ128rmkz |
| 88008 | 49687, // VPBROADCASTQZ128rr |
| 88009 | 49689, // VPBROADCASTQZ128rrk |
| 88010 | 49693, // VPBROADCASTQZ128rrkz |
| 88011 | 49696, // VPBROADCASTQZ256rm |
| 88012 | 49698, // VPBROADCASTQZ256rmk |
| 88013 | 49702, // VPBROADCASTQZ256rmkz |
| 88014 | 49705, // VPBROADCASTQZ256rr |
| 88015 | 49707, // VPBROADCASTQZ256rrk |
| 88016 | 49711, // VPBROADCASTQZ256rrkz |
| 88017 | 49714, // VPBROADCASTQZrm |
| 88018 | 49716, // VPBROADCASTQZrmk |
| 88019 | 49720, // VPBROADCASTQZrmkz |
| 88020 | 49723, // VPBROADCASTQZrr |
| 88021 | 49725, // VPBROADCASTQZrrk |
| 88022 | 49729, // VPBROADCASTQZrrkz |
| 88023 | 49732, // VPBROADCASTQrZ128rr |
| 88024 | 49734, // VPBROADCASTQrZ128rrk |
| 88025 | 49738, // VPBROADCASTQrZ128rrkz |
| 88026 | 49741, // VPBROADCASTQrZ256rr |
| 88027 | 49743, // VPBROADCASTQrZ256rrk |
| 88028 | 49747, // VPBROADCASTQrZ256rrkz |
| 88029 | 49750, // VPBROADCASTQrZrr |
| 88030 | 49752, // VPBROADCASTQrZrrk |
| 88031 | 49756, // VPBROADCASTQrZrrkz |
| 88032 | 49759, // VPBROADCASTQrm |
| 88033 | 49761, // VPBROADCASTQrr |
| 88034 | 49763, // VPBROADCASTWYrm |
| 88035 | 49765, // VPBROADCASTWYrr |
| 88036 | 49767, // VPBROADCASTWZ128rm |
| 88037 | 49769, // VPBROADCASTWZ128rmk |
| 88038 | 49773, // VPBROADCASTWZ128rmkz |
| 88039 | 49776, // VPBROADCASTWZ128rr |
| 88040 | 49778, // VPBROADCASTWZ128rrk |
| 88041 | 49782, // VPBROADCASTWZ128rrkz |
| 88042 | 49785, // VPBROADCASTWZ256rm |
| 88043 | 49787, // VPBROADCASTWZ256rmk |
| 88044 | 49791, // VPBROADCASTWZ256rmkz |
| 88045 | 49794, // VPBROADCASTWZ256rr |
| 88046 | 49796, // VPBROADCASTWZ256rrk |
| 88047 | 49800, // VPBROADCASTWZ256rrkz |
| 88048 | 49803, // VPBROADCASTWZrm |
| 88049 | 49805, // VPBROADCASTWZrmk |
| 88050 | 49809, // VPBROADCASTWZrmkz |
| 88051 | 49812, // VPBROADCASTWZrr |
| 88052 | 49814, // VPBROADCASTWZrrk |
| 88053 | 49818, // VPBROADCASTWZrrkz |
| 88054 | 49821, // VPBROADCASTWrZ128rr |
| 88055 | 49823, // VPBROADCASTWrZ128rrk |
| 88056 | 49827, // VPBROADCASTWrZ128rrkz |
| 88057 | 49830, // VPBROADCASTWrZ256rr |
| 88058 | 49832, // VPBROADCASTWrZ256rrk |
| 88059 | 49836, // VPBROADCASTWrZ256rrkz |
| 88060 | 49839, // VPBROADCASTWrZrr |
| 88061 | 49841, // VPBROADCASTWrZrrk |
| 88062 | 49845, // VPBROADCASTWrZrrkz |
| 88063 | 49848, // VPBROADCASTWrm |
| 88064 | 49850, // VPBROADCASTWrr |
| 88065 | 49852, // VPCLMULQDQYrmi |
| 88066 | 49856, // VPCLMULQDQYrri |
| 88067 | 49860, // VPCLMULQDQZ128rmi |
| 88068 | 49864, // VPCLMULQDQZ128rri |
| 88069 | 49868, // VPCLMULQDQZ256rmi |
| 88070 | 49872, // VPCLMULQDQZ256rri |
| 88071 | 49876, // VPCLMULQDQZrmi |
| 88072 | 49880, // VPCLMULQDQZrri |
| 88073 | 49884, // VPCLMULQDQrmi |
| 88074 | 49888, // VPCLMULQDQrri |
| 88075 | 49892, // VPCMOVYrmr |
| 88076 | 49896, // VPCMOVYrrm |
| 88077 | 49900, // VPCMOVYrrr |
| 88078 | 49904, // VPCMOVYrrr_REV |
| 88079 | 49908, // VPCMOVrmr |
| 88080 | 49912, // VPCMOVrrm |
| 88081 | 49916, // VPCMOVrrr |
| 88082 | 49920, // VPCMOVrrr_REV |
| 88083 | 49924, // VPCMPBZ128rmi |
| 88084 | 49928, // VPCMPBZ128rmik |
| 88085 | 49933, // VPCMPBZ128rri |
| 88086 | 49937, // VPCMPBZ128rrik |
| 88087 | 49942, // VPCMPBZ256rmi |
| 88088 | 49946, // VPCMPBZ256rmik |
| 88089 | 49951, // VPCMPBZ256rri |
| 88090 | 49955, // VPCMPBZ256rrik |
| 88091 | 49960, // VPCMPBZrmi |
| 88092 | 49964, // VPCMPBZrmik |
| 88093 | 49969, // VPCMPBZrri |
| 88094 | 49973, // VPCMPBZrrik |
| 88095 | 49978, // VPCMPDZ128rmbi |
| 88096 | 49982, // VPCMPDZ128rmbik |
| 88097 | 49987, // VPCMPDZ128rmi |
| 88098 | 49991, // VPCMPDZ128rmik |
| 88099 | 49996, // VPCMPDZ128rri |
| 88100 | 50000, // VPCMPDZ128rrik |
| 88101 | 50005, // VPCMPDZ256rmbi |
| 88102 | 50009, // VPCMPDZ256rmbik |
| 88103 | 50014, // VPCMPDZ256rmi |
| 88104 | 50018, // VPCMPDZ256rmik |
| 88105 | 50023, // VPCMPDZ256rri |
| 88106 | 50027, // VPCMPDZ256rrik |
| 88107 | 50032, // VPCMPDZrmbi |
| 88108 | 50036, // VPCMPDZrmbik |
| 88109 | 50041, // VPCMPDZrmi |
| 88110 | 50045, // VPCMPDZrmik |
| 88111 | 50050, // VPCMPDZrri |
| 88112 | 50054, // VPCMPDZrrik |
| 88113 | 50059, // VPCMPEQBYrm |
| 88114 | 50062, // VPCMPEQBYrr |
| 88115 | 50065, // VPCMPEQBZ128rm |
| 88116 | 50068, // VPCMPEQBZ128rmk |
| 88117 | 50072, // VPCMPEQBZ128rr |
| 88118 | 50075, // VPCMPEQBZ128rrk |
| 88119 | 50079, // VPCMPEQBZ256rm |
| 88120 | 50082, // VPCMPEQBZ256rmk |
| 88121 | 50086, // VPCMPEQBZ256rr |
| 88122 | 50089, // VPCMPEQBZ256rrk |
| 88123 | 50093, // VPCMPEQBZrm |
| 88124 | 50096, // VPCMPEQBZrmk |
| 88125 | 50100, // VPCMPEQBZrr |
| 88126 | 50103, // VPCMPEQBZrrk |
| 88127 | 50107, // VPCMPEQBrm |
| 88128 | 50110, // VPCMPEQBrr |
| 88129 | 50113, // VPCMPEQDYrm |
| 88130 | 50116, // VPCMPEQDYrr |
| 88131 | 50119, // VPCMPEQDZ128rm |
| 88132 | 50122, // VPCMPEQDZ128rmb |
| 88133 | 50125, // VPCMPEQDZ128rmbk |
| 88134 | 50129, // VPCMPEQDZ128rmk |
| 88135 | 50133, // VPCMPEQDZ128rr |
| 88136 | 50136, // VPCMPEQDZ128rrk |
| 88137 | 50140, // VPCMPEQDZ256rm |
| 88138 | 50143, // VPCMPEQDZ256rmb |
| 88139 | 50146, // VPCMPEQDZ256rmbk |
| 88140 | 50150, // VPCMPEQDZ256rmk |
| 88141 | 50154, // VPCMPEQDZ256rr |
| 88142 | 50157, // VPCMPEQDZ256rrk |
| 88143 | 50161, // VPCMPEQDZrm |
| 88144 | 50164, // VPCMPEQDZrmb |
| 88145 | 50167, // VPCMPEQDZrmbk |
| 88146 | 50171, // VPCMPEQDZrmk |
| 88147 | 50175, // VPCMPEQDZrr |
| 88148 | 50178, // VPCMPEQDZrrk |
| 88149 | 50182, // VPCMPEQDrm |
| 88150 | 50185, // VPCMPEQDrr |
| 88151 | 50188, // VPCMPEQQYrm |
| 88152 | 50191, // VPCMPEQQYrr |
| 88153 | 50194, // VPCMPEQQZ128rm |
| 88154 | 50197, // VPCMPEQQZ128rmb |
| 88155 | 50200, // VPCMPEQQZ128rmbk |
| 88156 | 50204, // VPCMPEQQZ128rmk |
| 88157 | 50208, // VPCMPEQQZ128rr |
| 88158 | 50211, // VPCMPEQQZ128rrk |
| 88159 | 50215, // VPCMPEQQZ256rm |
| 88160 | 50218, // VPCMPEQQZ256rmb |
| 88161 | 50221, // VPCMPEQQZ256rmbk |
| 88162 | 50225, // VPCMPEQQZ256rmk |
| 88163 | 50229, // VPCMPEQQZ256rr |
| 88164 | 50232, // VPCMPEQQZ256rrk |
| 88165 | 50236, // VPCMPEQQZrm |
| 88166 | 50239, // VPCMPEQQZrmb |
| 88167 | 50242, // VPCMPEQQZrmbk |
| 88168 | 50246, // VPCMPEQQZrmk |
| 88169 | 50250, // VPCMPEQQZrr |
| 88170 | 50253, // VPCMPEQQZrrk |
| 88171 | 50257, // VPCMPEQQrm |
| 88172 | 50260, // VPCMPEQQrr |
| 88173 | 50263, // VPCMPEQWYrm |
| 88174 | 50266, // VPCMPEQWYrr |
| 88175 | 50269, // VPCMPEQWZ128rm |
| 88176 | 50272, // VPCMPEQWZ128rmk |
| 88177 | 50276, // VPCMPEQWZ128rr |
| 88178 | 50279, // VPCMPEQWZ128rrk |
| 88179 | 50283, // VPCMPEQWZ256rm |
| 88180 | 50286, // VPCMPEQWZ256rmk |
| 88181 | 50290, // VPCMPEQWZ256rr |
| 88182 | 50293, // VPCMPEQWZ256rrk |
| 88183 | 50297, // VPCMPEQWZrm |
| 88184 | 50300, // VPCMPEQWZrmk |
| 88185 | 50304, // VPCMPEQWZrr |
| 88186 | 50307, // VPCMPEQWZrrk |
| 88187 | 50311, // VPCMPEQWrm |
| 88188 | 50314, // VPCMPEQWrr |
| 88189 | 50317, // VPCMPESTRIrmi |
| 88190 | 50320, // VPCMPESTRIrri |
| 88191 | 50323, // VPCMPESTRMrmi |
| 88192 | 50326, // VPCMPESTRMrri |
| 88193 | 50329, // VPCMPGTBYrm |
| 88194 | 50332, // VPCMPGTBYrr |
| 88195 | 50335, // VPCMPGTBZ128rm |
| 88196 | 50338, // VPCMPGTBZ128rmk |
| 88197 | 50342, // VPCMPGTBZ128rr |
| 88198 | 50345, // VPCMPGTBZ128rrk |
| 88199 | 50349, // VPCMPGTBZ256rm |
| 88200 | 50352, // VPCMPGTBZ256rmk |
| 88201 | 50356, // VPCMPGTBZ256rr |
| 88202 | 50359, // VPCMPGTBZ256rrk |
| 88203 | 50363, // VPCMPGTBZrm |
| 88204 | 50366, // VPCMPGTBZrmk |
| 88205 | 50370, // VPCMPGTBZrr |
| 88206 | 50373, // VPCMPGTBZrrk |
| 88207 | 50377, // VPCMPGTBrm |
| 88208 | 50380, // VPCMPGTBrr |
| 88209 | 50383, // VPCMPGTDYrm |
| 88210 | 50386, // VPCMPGTDYrr |
| 88211 | 50389, // VPCMPGTDZ128rm |
| 88212 | 50392, // VPCMPGTDZ128rmb |
| 88213 | 50395, // VPCMPGTDZ128rmbk |
| 88214 | 50399, // VPCMPGTDZ128rmk |
| 88215 | 50403, // VPCMPGTDZ128rr |
| 88216 | 50406, // VPCMPGTDZ128rrk |
| 88217 | 50410, // VPCMPGTDZ256rm |
| 88218 | 50413, // VPCMPGTDZ256rmb |
| 88219 | 50416, // VPCMPGTDZ256rmbk |
| 88220 | 50420, // VPCMPGTDZ256rmk |
| 88221 | 50424, // VPCMPGTDZ256rr |
| 88222 | 50427, // VPCMPGTDZ256rrk |
| 88223 | 50431, // VPCMPGTDZrm |
| 88224 | 50434, // VPCMPGTDZrmb |
| 88225 | 50437, // VPCMPGTDZrmbk |
| 88226 | 50441, // VPCMPGTDZrmk |
| 88227 | 50445, // VPCMPGTDZrr |
| 88228 | 50448, // VPCMPGTDZrrk |
| 88229 | 50452, // VPCMPGTDrm |
| 88230 | 50455, // VPCMPGTDrr |
| 88231 | 50458, // VPCMPGTQYrm |
| 88232 | 50461, // VPCMPGTQYrr |
| 88233 | 50464, // VPCMPGTQZ128rm |
| 88234 | 50467, // VPCMPGTQZ128rmb |
| 88235 | 50470, // VPCMPGTQZ128rmbk |
| 88236 | 50474, // VPCMPGTQZ128rmk |
| 88237 | 50478, // VPCMPGTQZ128rr |
| 88238 | 50481, // VPCMPGTQZ128rrk |
| 88239 | 50485, // VPCMPGTQZ256rm |
| 88240 | 50488, // VPCMPGTQZ256rmb |
| 88241 | 50491, // VPCMPGTQZ256rmbk |
| 88242 | 50495, // VPCMPGTQZ256rmk |
| 88243 | 50499, // VPCMPGTQZ256rr |
| 88244 | 50502, // VPCMPGTQZ256rrk |
| 88245 | 50506, // VPCMPGTQZrm |
| 88246 | 50509, // VPCMPGTQZrmb |
| 88247 | 50512, // VPCMPGTQZrmbk |
| 88248 | 50516, // VPCMPGTQZrmk |
| 88249 | 50520, // VPCMPGTQZrr |
| 88250 | 50523, // VPCMPGTQZrrk |
| 88251 | 50527, // VPCMPGTQrm |
| 88252 | 50530, // VPCMPGTQrr |
| 88253 | 50533, // VPCMPGTWYrm |
| 88254 | 50536, // VPCMPGTWYrr |
| 88255 | 50539, // VPCMPGTWZ128rm |
| 88256 | 50542, // VPCMPGTWZ128rmk |
| 88257 | 50546, // VPCMPGTWZ128rr |
| 88258 | 50549, // VPCMPGTWZ128rrk |
| 88259 | 50553, // VPCMPGTWZ256rm |
| 88260 | 50556, // VPCMPGTWZ256rmk |
| 88261 | 50560, // VPCMPGTWZ256rr |
| 88262 | 50563, // VPCMPGTWZ256rrk |
| 88263 | 50567, // VPCMPGTWZrm |
| 88264 | 50570, // VPCMPGTWZrmk |
| 88265 | 50574, // VPCMPGTWZrr |
| 88266 | 50577, // VPCMPGTWZrrk |
| 88267 | 50581, // VPCMPGTWrm |
| 88268 | 50584, // VPCMPGTWrr |
| 88269 | 50587, // VPCMPISTRIrmi |
| 88270 | 50590, // VPCMPISTRIrri |
| 88271 | 50593, // VPCMPISTRMrmi |
| 88272 | 50596, // VPCMPISTRMrri |
| 88273 | 50599, // VPCMPQZ128rmbi |
| 88274 | 50603, // VPCMPQZ128rmbik |
| 88275 | 50608, // VPCMPQZ128rmi |
| 88276 | 50612, // VPCMPQZ128rmik |
| 88277 | 50617, // VPCMPQZ128rri |
| 88278 | 50621, // VPCMPQZ128rrik |
| 88279 | 50626, // VPCMPQZ256rmbi |
| 88280 | 50630, // VPCMPQZ256rmbik |
| 88281 | 50635, // VPCMPQZ256rmi |
| 88282 | 50639, // VPCMPQZ256rmik |
| 88283 | 50644, // VPCMPQZ256rri |
| 88284 | 50648, // VPCMPQZ256rrik |
| 88285 | 50653, // VPCMPQZrmbi |
| 88286 | 50657, // VPCMPQZrmbik |
| 88287 | 50662, // VPCMPQZrmi |
| 88288 | 50666, // VPCMPQZrmik |
| 88289 | 50671, // VPCMPQZrri |
| 88290 | 50675, // VPCMPQZrrik |
| 88291 | 50680, // VPCMPUBZ128rmi |
| 88292 | 50684, // VPCMPUBZ128rmik |
| 88293 | 50689, // VPCMPUBZ128rri |
| 88294 | 50693, // VPCMPUBZ128rrik |
| 88295 | 50698, // VPCMPUBZ256rmi |
| 88296 | 50702, // VPCMPUBZ256rmik |
| 88297 | 50707, // VPCMPUBZ256rri |
| 88298 | 50711, // VPCMPUBZ256rrik |
| 88299 | 50716, // VPCMPUBZrmi |
| 88300 | 50720, // VPCMPUBZrmik |
| 88301 | 50725, // VPCMPUBZrri |
| 88302 | 50729, // VPCMPUBZrrik |
| 88303 | 50734, // VPCMPUDZ128rmbi |
| 88304 | 50738, // VPCMPUDZ128rmbik |
| 88305 | 50743, // VPCMPUDZ128rmi |
| 88306 | 50747, // VPCMPUDZ128rmik |
| 88307 | 50752, // VPCMPUDZ128rri |
| 88308 | 50756, // VPCMPUDZ128rrik |
| 88309 | 50761, // VPCMPUDZ256rmbi |
| 88310 | 50765, // VPCMPUDZ256rmbik |
| 88311 | 50770, // VPCMPUDZ256rmi |
| 88312 | 50774, // VPCMPUDZ256rmik |
| 88313 | 50779, // VPCMPUDZ256rri |
| 88314 | 50783, // VPCMPUDZ256rrik |
| 88315 | 50788, // VPCMPUDZrmbi |
| 88316 | 50792, // VPCMPUDZrmbik |
| 88317 | 50797, // VPCMPUDZrmi |
| 88318 | 50801, // VPCMPUDZrmik |
| 88319 | 50806, // VPCMPUDZrri |
| 88320 | 50810, // VPCMPUDZrrik |
| 88321 | 50815, // VPCMPUQZ128rmbi |
| 88322 | 50819, // VPCMPUQZ128rmbik |
| 88323 | 50824, // VPCMPUQZ128rmi |
| 88324 | 50828, // VPCMPUQZ128rmik |
| 88325 | 50833, // VPCMPUQZ128rri |
| 88326 | 50837, // VPCMPUQZ128rrik |
| 88327 | 50842, // VPCMPUQZ256rmbi |
| 88328 | 50846, // VPCMPUQZ256rmbik |
| 88329 | 50851, // VPCMPUQZ256rmi |
| 88330 | 50855, // VPCMPUQZ256rmik |
| 88331 | 50860, // VPCMPUQZ256rri |
| 88332 | 50864, // VPCMPUQZ256rrik |
| 88333 | 50869, // VPCMPUQZrmbi |
| 88334 | 50873, // VPCMPUQZrmbik |
| 88335 | 50878, // VPCMPUQZrmi |
| 88336 | 50882, // VPCMPUQZrmik |
| 88337 | 50887, // VPCMPUQZrri |
| 88338 | 50891, // VPCMPUQZrrik |
| 88339 | 50896, // VPCMPUWZ128rmi |
| 88340 | 50900, // VPCMPUWZ128rmik |
| 88341 | 50905, // VPCMPUWZ128rri |
| 88342 | 50909, // VPCMPUWZ128rrik |
| 88343 | 50914, // VPCMPUWZ256rmi |
| 88344 | 50918, // VPCMPUWZ256rmik |
| 88345 | 50923, // VPCMPUWZ256rri |
| 88346 | 50927, // VPCMPUWZ256rrik |
| 88347 | 50932, // VPCMPUWZrmi |
| 88348 | 50936, // VPCMPUWZrmik |
| 88349 | 50941, // VPCMPUWZrri |
| 88350 | 50945, // VPCMPUWZrrik |
| 88351 | 50950, // VPCMPWZ128rmi |
| 88352 | 50954, // VPCMPWZ128rmik |
| 88353 | 50959, // VPCMPWZ128rri |
| 88354 | 50963, // VPCMPWZ128rrik |
| 88355 | 50968, // VPCMPWZ256rmi |
| 88356 | 50972, // VPCMPWZ256rmik |
| 88357 | 50977, // VPCMPWZ256rri |
| 88358 | 50981, // VPCMPWZ256rrik |
| 88359 | 50986, // VPCMPWZrmi |
| 88360 | 50990, // VPCMPWZrmik |
| 88361 | 50995, // VPCMPWZrri |
| 88362 | 50999, // VPCMPWZrrik |
| 88363 | 51004, // VPCOMBmi |
| 88364 | 51008, // VPCOMBri |
| 88365 | 51012, // VPCOMDmi |
| 88366 | 51016, // VPCOMDri |
| 88367 | 51020, // VPCOMPRESSBZ128mr |
| 88368 | 51022, // VPCOMPRESSBZ128mrk |
| 88369 | 51025, // VPCOMPRESSBZ128rr |
| 88370 | 51027, // VPCOMPRESSBZ128rrk |
| 88371 | 51031, // VPCOMPRESSBZ128rrkz |
| 88372 | 51034, // VPCOMPRESSBZ256mr |
| 88373 | 51036, // VPCOMPRESSBZ256mrk |
| 88374 | 51039, // VPCOMPRESSBZ256rr |
| 88375 | 51041, // VPCOMPRESSBZ256rrk |
| 88376 | 51045, // VPCOMPRESSBZ256rrkz |
| 88377 | 51048, // VPCOMPRESSBZmr |
| 88378 | 51050, // VPCOMPRESSBZmrk |
| 88379 | 51053, // VPCOMPRESSBZrr |
| 88380 | 51055, // VPCOMPRESSBZrrk |
| 88381 | 51059, // VPCOMPRESSBZrrkz |
| 88382 | 51062, // VPCOMPRESSDZ128mr |
| 88383 | 51064, // VPCOMPRESSDZ128mrk |
| 88384 | 51067, // VPCOMPRESSDZ128rr |
| 88385 | 51069, // VPCOMPRESSDZ128rrk |
| 88386 | 51073, // VPCOMPRESSDZ128rrkz |
| 88387 | 51076, // VPCOMPRESSDZ256mr |
| 88388 | 51078, // VPCOMPRESSDZ256mrk |
| 88389 | 51081, // VPCOMPRESSDZ256rr |
| 88390 | 51083, // VPCOMPRESSDZ256rrk |
| 88391 | 51087, // VPCOMPRESSDZ256rrkz |
| 88392 | 51090, // VPCOMPRESSDZmr |
| 88393 | 51092, // VPCOMPRESSDZmrk |
| 88394 | 51095, // VPCOMPRESSDZrr |
| 88395 | 51097, // VPCOMPRESSDZrrk |
| 88396 | 51101, // VPCOMPRESSDZrrkz |
| 88397 | 51104, // VPCOMPRESSQZ128mr |
| 88398 | 51106, // VPCOMPRESSQZ128mrk |
| 88399 | 51109, // VPCOMPRESSQZ128rr |
| 88400 | 51111, // VPCOMPRESSQZ128rrk |
| 88401 | 51115, // VPCOMPRESSQZ128rrkz |
| 88402 | 51118, // VPCOMPRESSQZ256mr |
| 88403 | 51120, // VPCOMPRESSQZ256mrk |
| 88404 | 51123, // VPCOMPRESSQZ256rr |
| 88405 | 51125, // VPCOMPRESSQZ256rrk |
| 88406 | 51129, // VPCOMPRESSQZ256rrkz |
| 88407 | 51132, // VPCOMPRESSQZmr |
| 88408 | 51134, // VPCOMPRESSQZmrk |
| 88409 | 51137, // VPCOMPRESSQZrr |
| 88410 | 51139, // VPCOMPRESSQZrrk |
| 88411 | 51143, // VPCOMPRESSQZrrkz |
| 88412 | 51146, // VPCOMPRESSWZ128mr |
| 88413 | 51148, // VPCOMPRESSWZ128mrk |
| 88414 | 51151, // VPCOMPRESSWZ128rr |
| 88415 | 51153, // VPCOMPRESSWZ128rrk |
| 88416 | 51157, // VPCOMPRESSWZ128rrkz |
| 88417 | 51160, // VPCOMPRESSWZ256mr |
| 88418 | 51162, // VPCOMPRESSWZ256mrk |
| 88419 | 51165, // VPCOMPRESSWZ256rr |
| 88420 | 51167, // VPCOMPRESSWZ256rrk |
| 88421 | 51171, // VPCOMPRESSWZ256rrkz |
| 88422 | 51174, // VPCOMPRESSWZmr |
| 88423 | 51176, // VPCOMPRESSWZmrk |
| 88424 | 51179, // VPCOMPRESSWZrr |
| 88425 | 51181, // VPCOMPRESSWZrrk |
| 88426 | 51185, // VPCOMPRESSWZrrkz |
| 88427 | 51188, // VPCOMQmi |
| 88428 | 51192, // VPCOMQri |
| 88429 | 51196, // VPCOMUBmi |
| 88430 | 51200, // VPCOMUBri |
| 88431 | 51204, // VPCOMUDmi |
| 88432 | 51208, // VPCOMUDri |
| 88433 | 51212, // VPCOMUQmi |
| 88434 | 51216, // VPCOMUQri |
| 88435 | 51220, // VPCOMUWmi |
| 88436 | 51224, // VPCOMUWri |
| 88437 | 51228, // VPCOMWmi |
| 88438 | 51232, // VPCOMWri |
| 88439 | 51236, // VPCONFLICTDZ128rm |
| 88440 | 51238, // VPCONFLICTDZ128rmb |
| 88441 | 51240, // VPCONFLICTDZ128rmbk |
| 88442 | 51244, // VPCONFLICTDZ128rmbkz |
| 88443 | 51247, // VPCONFLICTDZ128rmk |
| 88444 | 51251, // VPCONFLICTDZ128rmkz |
| 88445 | 51254, // VPCONFLICTDZ128rr |
| 88446 | 51256, // VPCONFLICTDZ128rrk |
| 88447 | 51260, // VPCONFLICTDZ128rrkz |
| 88448 | 51263, // VPCONFLICTDZ256rm |
| 88449 | 51265, // VPCONFLICTDZ256rmb |
| 88450 | 51267, // VPCONFLICTDZ256rmbk |
| 88451 | 51271, // VPCONFLICTDZ256rmbkz |
| 88452 | 51274, // VPCONFLICTDZ256rmk |
| 88453 | 51278, // VPCONFLICTDZ256rmkz |
| 88454 | 51281, // VPCONFLICTDZ256rr |
| 88455 | 51283, // VPCONFLICTDZ256rrk |
| 88456 | 51287, // VPCONFLICTDZ256rrkz |
| 88457 | 51290, // VPCONFLICTDZrm |
| 88458 | 51292, // VPCONFLICTDZrmb |
| 88459 | 51294, // VPCONFLICTDZrmbk |
| 88460 | 51298, // VPCONFLICTDZrmbkz |
| 88461 | 51301, // VPCONFLICTDZrmk |
| 88462 | 51305, // VPCONFLICTDZrmkz |
| 88463 | 51308, // VPCONFLICTDZrr |
| 88464 | 51310, // VPCONFLICTDZrrk |
| 88465 | 51314, // VPCONFLICTDZrrkz |
| 88466 | 51317, // VPCONFLICTQZ128rm |
| 88467 | 51319, // VPCONFLICTQZ128rmb |
| 88468 | 51321, // VPCONFLICTQZ128rmbk |
| 88469 | 51325, // VPCONFLICTQZ128rmbkz |
| 88470 | 51328, // VPCONFLICTQZ128rmk |
| 88471 | 51332, // VPCONFLICTQZ128rmkz |
| 88472 | 51335, // VPCONFLICTQZ128rr |
| 88473 | 51337, // VPCONFLICTQZ128rrk |
| 88474 | 51341, // VPCONFLICTQZ128rrkz |
| 88475 | 51344, // VPCONFLICTQZ256rm |
| 88476 | 51346, // VPCONFLICTQZ256rmb |
| 88477 | 51348, // VPCONFLICTQZ256rmbk |
| 88478 | 51352, // VPCONFLICTQZ256rmbkz |
| 88479 | 51355, // VPCONFLICTQZ256rmk |
| 88480 | 51359, // VPCONFLICTQZ256rmkz |
| 88481 | 51362, // VPCONFLICTQZ256rr |
| 88482 | 51364, // VPCONFLICTQZ256rrk |
| 88483 | 51368, // VPCONFLICTQZ256rrkz |
| 88484 | 51371, // VPCONFLICTQZrm |
| 88485 | 51373, // VPCONFLICTQZrmb |
| 88486 | 51375, // VPCONFLICTQZrmbk |
| 88487 | 51379, // VPCONFLICTQZrmbkz |
| 88488 | 51382, // VPCONFLICTQZrmk |
| 88489 | 51386, // VPCONFLICTQZrmkz |
| 88490 | 51389, // VPCONFLICTQZrr |
| 88491 | 51391, // VPCONFLICTQZrrk |
| 88492 | 51395, // VPCONFLICTQZrrkz |
| 88493 | 51398, // VPDPBSSDSYrm |
| 88494 | 51402, // VPDPBSSDSYrr |
| 88495 | 51406, // VPDPBSSDSZ128m |
| 88496 | 51410, // VPDPBSSDSZ128mb |
| 88497 | 51414, // VPDPBSSDSZ128mbk |
| 88498 | 51419, // VPDPBSSDSZ128mbkz |
| 88499 | 51424, // VPDPBSSDSZ128mk |
| 88500 | 51429, // VPDPBSSDSZ128mkz |
| 88501 | 51434, // VPDPBSSDSZ128r |
| 88502 | 51438, // VPDPBSSDSZ128rk |
| 88503 | 51443, // VPDPBSSDSZ128rkz |
| 88504 | 51448, // VPDPBSSDSZ256m |
| 88505 | 51452, // VPDPBSSDSZ256mb |
| 88506 | 51456, // VPDPBSSDSZ256mbk |
| 88507 | 51461, // VPDPBSSDSZ256mbkz |
| 88508 | 51466, // VPDPBSSDSZ256mk |
| 88509 | 51471, // VPDPBSSDSZ256mkz |
| 88510 | 51476, // VPDPBSSDSZ256r |
| 88511 | 51480, // VPDPBSSDSZ256rk |
| 88512 | 51485, // VPDPBSSDSZ256rkz |
| 88513 | 51490, // VPDPBSSDSZm |
| 88514 | 51494, // VPDPBSSDSZmb |
| 88515 | 51498, // VPDPBSSDSZmbk |
| 88516 | 51503, // VPDPBSSDSZmbkz |
| 88517 | 51508, // VPDPBSSDSZmk |
| 88518 | 51513, // VPDPBSSDSZmkz |
| 88519 | 51518, // VPDPBSSDSZr |
| 88520 | 51522, // VPDPBSSDSZrk |
| 88521 | 51527, // VPDPBSSDSZrkz |
| 88522 | 51532, // VPDPBSSDSrm |
| 88523 | 51536, // VPDPBSSDSrr |
| 88524 | 51540, // VPDPBSSDYrm |
| 88525 | 51544, // VPDPBSSDYrr |
| 88526 | 51548, // VPDPBSSDZ128m |
| 88527 | 51552, // VPDPBSSDZ128mb |
| 88528 | 51556, // VPDPBSSDZ128mbk |
| 88529 | 51561, // VPDPBSSDZ128mbkz |
| 88530 | 51566, // VPDPBSSDZ128mk |
| 88531 | 51571, // VPDPBSSDZ128mkz |
| 88532 | 51576, // VPDPBSSDZ128r |
| 88533 | 51580, // VPDPBSSDZ128rk |
| 88534 | 51585, // VPDPBSSDZ128rkz |
| 88535 | 51590, // VPDPBSSDZ256m |
| 88536 | 51594, // VPDPBSSDZ256mb |
| 88537 | 51598, // VPDPBSSDZ256mbk |
| 88538 | 51603, // VPDPBSSDZ256mbkz |
| 88539 | 51608, // VPDPBSSDZ256mk |
| 88540 | 51613, // VPDPBSSDZ256mkz |
| 88541 | 51618, // VPDPBSSDZ256r |
| 88542 | 51622, // VPDPBSSDZ256rk |
| 88543 | 51627, // VPDPBSSDZ256rkz |
| 88544 | 51632, // VPDPBSSDZm |
| 88545 | 51636, // VPDPBSSDZmb |
| 88546 | 51640, // VPDPBSSDZmbk |
| 88547 | 51645, // VPDPBSSDZmbkz |
| 88548 | 51650, // VPDPBSSDZmk |
| 88549 | 51655, // VPDPBSSDZmkz |
| 88550 | 51660, // VPDPBSSDZr |
| 88551 | 51664, // VPDPBSSDZrk |
| 88552 | 51669, // VPDPBSSDZrkz |
| 88553 | 51674, // VPDPBSSDrm |
| 88554 | 51678, // VPDPBSSDrr |
| 88555 | 51682, // VPDPBSUDSYrm |
| 88556 | 51686, // VPDPBSUDSYrr |
| 88557 | 51690, // VPDPBSUDSZ128m |
| 88558 | 51694, // VPDPBSUDSZ128mb |
| 88559 | 51698, // VPDPBSUDSZ128mbk |
| 88560 | 51703, // VPDPBSUDSZ128mbkz |
| 88561 | 51708, // VPDPBSUDSZ128mk |
| 88562 | 51713, // VPDPBSUDSZ128mkz |
| 88563 | 51718, // VPDPBSUDSZ128r |
| 88564 | 51722, // VPDPBSUDSZ128rk |
| 88565 | 51727, // VPDPBSUDSZ128rkz |
| 88566 | 51732, // VPDPBSUDSZ256m |
| 88567 | 51736, // VPDPBSUDSZ256mb |
| 88568 | 51740, // VPDPBSUDSZ256mbk |
| 88569 | 51745, // VPDPBSUDSZ256mbkz |
| 88570 | 51750, // VPDPBSUDSZ256mk |
| 88571 | 51755, // VPDPBSUDSZ256mkz |
| 88572 | 51760, // VPDPBSUDSZ256r |
| 88573 | 51764, // VPDPBSUDSZ256rk |
| 88574 | 51769, // VPDPBSUDSZ256rkz |
| 88575 | 51774, // VPDPBSUDSZm |
| 88576 | 51778, // VPDPBSUDSZmb |
| 88577 | 51782, // VPDPBSUDSZmbk |
| 88578 | 51787, // VPDPBSUDSZmbkz |
| 88579 | 51792, // VPDPBSUDSZmk |
| 88580 | 51797, // VPDPBSUDSZmkz |
| 88581 | 51802, // VPDPBSUDSZr |
| 88582 | 51806, // VPDPBSUDSZrk |
| 88583 | 51811, // VPDPBSUDSZrkz |
| 88584 | 51816, // VPDPBSUDSrm |
| 88585 | 51820, // VPDPBSUDSrr |
| 88586 | 51824, // VPDPBSUDYrm |
| 88587 | 51828, // VPDPBSUDYrr |
| 88588 | 51832, // VPDPBSUDZ128m |
| 88589 | 51836, // VPDPBSUDZ128mb |
| 88590 | 51840, // VPDPBSUDZ128mbk |
| 88591 | 51845, // VPDPBSUDZ128mbkz |
| 88592 | 51850, // VPDPBSUDZ128mk |
| 88593 | 51855, // VPDPBSUDZ128mkz |
| 88594 | 51860, // VPDPBSUDZ128r |
| 88595 | 51864, // VPDPBSUDZ128rk |
| 88596 | 51869, // VPDPBSUDZ128rkz |
| 88597 | 51874, // VPDPBSUDZ256m |
| 88598 | 51878, // VPDPBSUDZ256mb |
| 88599 | 51882, // VPDPBSUDZ256mbk |
| 88600 | 51887, // VPDPBSUDZ256mbkz |
| 88601 | 51892, // VPDPBSUDZ256mk |
| 88602 | 51897, // VPDPBSUDZ256mkz |
| 88603 | 51902, // VPDPBSUDZ256r |
| 88604 | 51906, // VPDPBSUDZ256rk |
| 88605 | 51911, // VPDPBSUDZ256rkz |
| 88606 | 51916, // VPDPBSUDZm |
| 88607 | 51920, // VPDPBSUDZmb |
| 88608 | 51924, // VPDPBSUDZmbk |
| 88609 | 51929, // VPDPBSUDZmbkz |
| 88610 | 51934, // VPDPBSUDZmk |
| 88611 | 51939, // VPDPBSUDZmkz |
| 88612 | 51944, // VPDPBSUDZr |
| 88613 | 51948, // VPDPBSUDZrk |
| 88614 | 51953, // VPDPBSUDZrkz |
| 88615 | 51958, // VPDPBSUDrm |
| 88616 | 51962, // VPDPBSUDrr |
| 88617 | 51966, // VPDPBUSDSYrm |
| 88618 | 51970, // VPDPBUSDSYrr |
| 88619 | 51974, // VPDPBUSDSZ128m |
| 88620 | 51978, // VPDPBUSDSZ128mb |
| 88621 | 51982, // VPDPBUSDSZ128mbk |
| 88622 | 51987, // VPDPBUSDSZ128mbkz |
| 88623 | 51992, // VPDPBUSDSZ128mk |
| 88624 | 51997, // VPDPBUSDSZ128mkz |
| 88625 | 52002, // VPDPBUSDSZ128r |
| 88626 | 52006, // VPDPBUSDSZ128rk |
| 88627 | 52011, // VPDPBUSDSZ128rkz |
| 88628 | 52016, // VPDPBUSDSZ256m |
| 88629 | 52020, // VPDPBUSDSZ256mb |
| 88630 | 52024, // VPDPBUSDSZ256mbk |
| 88631 | 52029, // VPDPBUSDSZ256mbkz |
| 88632 | 52034, // VPDPBUSDSZ256mk |
| 88633 | 52039, // VPDPBUSDSZ256mkz |
| 88634 | 52044, // VPDPBUSDSZ256r |
| 88635 | 52048, // VPDPBUSDSZ256rk |
| 88636 | 52053, // VPDPBUSDSZ256rkz |
| 88637 | 52058, // VPDPBUSDSZm |
| 88638 | 52062, // VPDPBUSDSZmb |
| 88639 | 52066, // VPDPBUSDSZmbk |
| 88640 | 52071, // VPDPBUSDSZmbkz |
| 88641 | 52076, // VPDPBUSDSZmk |
| 88642 | 52081, // VPDPBUSDSZmkz |
| 88643 | 52086, // VPDPBUSDSZr |
| 88644 | 52090, // VPDPBUSDSZrk |
| 88645 | 52095, // VPDPBUSDSZrkz |
| 88646 | 52100, // VPDPBUSDSrm |
| 88647 | 52104, // VPDPBUSDSrr |
| 88648 | 52108, // VPDPBUSDYrm |
| 88649 | 52112, // VPDPBUSDYrr |
| 88650 | 52116, // VPDPBUSDZ128m |
| 88651 | 52120, // VPDPBUSDZ128mb |
| 88652 | 52124, // VPDPBUSDZ128mbk |
| 88653 | 52129, // VPDPBUSDZ128mbkz |
| 88654 | 52134, // VPDPBUSDZ128mk |
| 88655 | 52139, // VPDPBUSDZ128mkz |
| 88656 | 52144, // VPDPBUSDZ128r |
| 88657 | 52148, // VPDPBUSDZ128rk |
| 88658 | 52153, // VPDPBUSDZ128rkz |
| 88659 | 52158, // VPDPBUSDZ256m |
| 88660 | 52162, // VPDPBUSDZ256mb |
| 88661 | 52166, // VPDPBUSDZ256mbk |
| 88662 | 52171, // VPDPBUSDZ256mbkz |
| 88663 | 52176, // VPDPBUSDZ256mk |
| 88664 | 52181, // VPDPBUSDZ256mkz |
| 88665 | 52186, // VPDPBUSDZ256r |
| 88666 | 52190, // VPDPBUSDZ256rk |
| 88667 | 52195, // VPDPBUSDZ256rkz |
| 88668 | 52200, // VPDPBUSDZm |
| 88669 | 52204, // VPDPBUSDZmb |
| 88670 | 52208, // VPDPBUSDZmbk |
| 88671 | 52213, // VPDPBUSDZmbkz |
| 88672 | 52218, // VPDPBUSDZmk |
| 88673 | 52223, // VPDPBUSDZmkz |
| 88674 | 52228, // VPDPBUSDZr |
| 88675 | 52232, // VPDPBUSDZrk |
| 88676 | 52237, // VPDPBUSDZrkz |
| 88677 | 52242, // VPDPBUSDrm |
| 88678 | 52246, // VPDPBUSDrr |
| 88679 | 52250, // VPDPBUUDSYrm |
| 88680 | 52254, // VPDPBUUDSYrr |
| 88681 | 52258, // VPDPBUUDSZ128m |
| 88682 | 52262, // VPDPBUUDSZ128mb |
| 88683 | 52266, // VPDPBUUDSZ128mbk |
| 88684 | 52271, // VPDPBUUDSZ128mbkz |
| 88685 | 52276, // VPDPBUUDSZ128mk |
| 88686 | 52281, // VPDPBUUDSZ128mkz |
| 88687 | 52286, // VPDPBUUDSZ128r |
| 88688 | 52290, // VPDPBUUDSZ128rk |
| 88689 | 52295, // VPDPBUUDSZ128rkz |
| 88690 | 52300, // VPDPBUUDSZ256m |
| 88691 | 52304, // VPDPBUUDSZ256mb |
| 88692 | 52308, // VPDPBUUDSZ256mbk |
| 88693 | 52313, // VPDPBUUDSZ256mbkz |
| 88694 | 52318, // VPDPBUUDSZ256mk |
| 88695 | 52323, // VPDPBUUDSZ256mkz |
| 88696 | 52328, // VPDPBUUDSZ256r |
| 88697 | 52332, // VPDPBUUDSZ256rk |
| 88698 | 52337, // VPDPBUUDSZ256rkz |
| 88699 | 52342, // VPDPBUUDSZm |
| 88700 | 52346, // VPDPBUUDSZmb |
| 88701 | 52350, // VPDPBUUDSZmbk |
| 88702 | 52355, // VPDPBUUDSZmbkz |
| 88703 | 52360, // VPDPBUUDSZmk |
| 88704 | 52365, // VPDPBUUDSZmkz |
| 88705 | 52370, // VPDPBUUDSZr |
| 88706 | 52374, // VPDPBUUDSZrk |
| 88707 | 52379, // VPDPBUUDSZrkz |
| 88708 | 52384, // VPDPBUUDSrm |
| 88709 | 52388, // VPDPBUUDSrr |
| 88710 | 52392, // VPDPBUUDYrm |
| 88711 | 52396, // VPDPBUUDYrr |
| 88712 | 52400, // VPDPBUUDZ128m |
| 88713 | 52404, // VPDPBUUDZ128mb |
| 88714 | 52408, // VPDPBUUDZ128mbk |
| 88715 | 52413, // VPDPBUUDZ128mbkz |
| 88716 | 52418, // VPDPBUUDZ128mk |
| 88717 | 52423, // VPDPBUUDZ128mkz |
| 88718 | 52428, // VPDPBUUDZ128r |
| 88719 | 52432, // VPDPBUUDZ128rk |
| 88720 | 52437, // VPDPBUUDZ128rkz |
| 88721 | 52442, // VPDPBUUDZ256m |
| 88722 | 52446, // VPDPBUUDZ256mb |
| 88723 | 52450, // VPDPBUUDZ256mbk |
| 88724 | 52455, // VPDPBUUDZ256mbkz |
| 88725 | 52460, // VPDPBUUDZ256mk |
| 88726 | 52465, // VPDPBUUDZ256mkz |
| 88727 | 52470, // VPDPBUUDZ256r |
| 88728 | 52474, // VPDPBUUDZ256rk |
| 88729 | 52479, // VPDPBUUDZ256rkz |
| 88730 | 52484, // VPDPBUUDZm |
| 88731 | 52488, // VPDPBUUDZmb |
| 88732 | 52492, // VPDPBUUDZmbk |
| 88733 | 52497, // VPDPBUUDZmbkz |
| 88734 | 52502, // VPDPBUUDZmk |
| 88735 | 52507, // VPDPBUUDZmkz |
| 88736 | 52512, // VPDPBUUDZr |
| 88737 | 52516, // VPDPBUUDZrk |
| 88738 | 52521, // VPDPBUUDZrkz |
| 88739 | 52526, // VPDPBUUDrm |
| 88740 | 52530, // VPDPBUUDrr |
| 88741 | 52534, // VPDPWSSDSYrm |
| 88742 | 52538, // VPDPWSSDSYrr |
| 88743 | 52542, // VPDPWSSDSZ128m |
| 88744 | 52546, // VPDPWSSDSZ128mb |
| 88745 | 52550, // VPDPWSSDSZ128mbk |
| 88746 | 52555, // VPDPWSSDSZ128mbkz |
| 88747 | 52560, // VPDPWSSDSZ128mk |
| 88748 | 52565, // VPDPWSSDSZ128mkz |
| 88749 | 52570, // VPDPWSSDSZ128r |
| 88750 | 52574, // VPDPWSSDSZ128rk |
| 88751 | 52579, // VPDPWSSDSZ128rkz |
| 88752 | 52584, // VPDPWSSDSZ256m |
| 88753 | 52588, // VPDPWSSDSZ256mb |
| 88754 | 52592, // VPDPWSSDSZ256mbk |
| 88755 | 52597, // VPDPWSSDSZ256mbkz |
| 88756 | 52602, // VPDPWSSDSZ256mk |
| 88757 | 52607, // VPDPWSSDSZ256mkz |
| 88758 | 52612, // VPDPWSSDSZ256r |
| 88759 | 52616, // VPDPWSSDSZ256rk |
| 88760 | 52621, // VPDPWSSDSZ256rkz |
| 88761 | 52626, // VPDPWSSDSZm |
| 88762 | 52630, // VPDPWSSDSZmb |
| 88763 | 52634, // VPDPWSSDSZmbk |
| 88764 | 52639, // VPDPWSSDSZmbkz |
| 88765 | 52644, // VPDPWSSDSZmk |
| 88766 | 52649, // VPDPWSSDSZmkz |
| 88767 | 52654, // VPDPWSSDSZr |
| 88768 | 52658, // VPDPWSSDSZrk |
| 88769 | 52663, // VPDPWSSDSZrkz |
| 88770 | 52668, // VPDPWSSDSrm |
| 88771 | 52672, // VPDPWSSDSrr |
| 88772 | 52676, // VPDPWSSDYrm |
| 88773 | 52680, // VPDPWSSDYrr |
| 88774 | 52684, // VPDPWSSDZ128m |
| 88775 | 52688, // VPDPWSSDZ128mb |
| 88776 | 52692, // VPDPWSSDZ128mbk |
| 88777 | 52697, // VPDPWSSDZ128mbkz |
| 88778 | 52702, // VPDPWSSDZ128mk |
| 88779 | 52707, // VPDPWSSDZ128mkz |
| 88780 | 52712, // VPDPWSSDZ128r |
| 88781 | 52716, // VPDPWSSDZ128rk |
| 88782 | 52721, // VPDPWSSDZ128rkz |
| 88783 | 52726, // VPDPWSSDZ256m |
| 88784 | 52730, // VPDPWSSDZ256mb |
| 88785 | 52734, // VPDPWSSDZ256mbk |
| 88786 | 52739, // VPDPWSSDZ256mbkz |
| 88787 | 52744, // VPDPWSSDZ256mk |
| 88788 | 52749, // VPDPWSSDZ256mkz |
| 88789 | 52754, // VPDPWSSDZ256r |
| 88790 | 52758, // VPDPWSSDZ256rk |
| 88791 | 52763, // VPDPWSSDZ256rkz |
| 88792 | 52768, // VPDPWSSDZm |
| 88793 | 52772, // VPDPWSSDZmb |
| 88794 | 52776, // VPDPWSSDZmbk |
| 88795 | 52781, // VPDPWSSDZmbkz |
| 88796 | 52786, // VPDPWSSDZmk |
| 88797 | 52791, // VPDPWSSDZmkz |
| 88798 | 52796, // VPDPWSSDZr |
| 88799 | 52800, // VPDPWSSDZrk |
| 88800 | 52805, // VPDPWSSDZrkz |
| 88801 | 52810, // VPDPWSSDrm |
| 88802 | 52814, // VPDPWSSDrr |
| 88803 | 52818, // VPDPWSUDSYrm |
| 88804 | 52822, // VPDPWSUDSYrr |
| 88805 | 52826, // VPDPWSUDSZ128m |
| 88806 | 52830, // VPDPWSUDSZ128mb |
| 88807 | 52834, // VPDPWSUDSZ128mbk |
| 88808 | 52839, // VPDPWSUDSZ128mbkz |
| 88809 | 52844, // VPDPWSUDSZ128mk |
| 88810 | 52849, // VPDPWSUDSZ128mkz |
| 88811 | 52854, // VPDPWSUDSZ128r |
| 88812 | 52858, // VPDPWSUDSZ128rk |
| 88813 | 52863, // VPDPWSUDSZ128rkz |
| 88814 | 52868, // VPDPWSUDSZ256m |
| 88815 | 52872, // VPDPWSUDSZ256mb |
| 88816 | 52876, // VPDPWSUDSZ256mbk |
| 88817 | 52881, // VPDPWSUDSZ256mbkz |
| 88818 | 52886, // VPDPWSUDSZ256mk |
| 88819 | 52891, // VPDPWSUDSZ256mkz |
| 88820 | 52896, // VPDPWSUDSZ256r |
| 88821 | 52900, // VPDPWSUDSZ256rk |
| 88822 | 52905, // VPDPWSUDSZ256rkz |
| 88823 | 52910, // VPDPWSUDSZm |
| 88824 | 52914, // VPDPWSUDSZmb |
| 88825 | 52918, // VPDPWSUDSZmbk |
| 88826 | 52923, // VPDPWSUDSZmbkz |
| 88827 | 52928, // VPDPWSUDSZmk |
| 88828 | 52933, // VPDPWSUDSZmkz |
| 88829 | 52938, // VPDPWSUDSZr |
| 88830 | 52942, // VPDPWSUDSZrk |
| 88831 | 52947, // VPDPWSUDSZrkz |
| 88832 | 52952, // VPDPWSUDSrm |
| 88833 | 52956, // VPDPWSUDSrr |
| 88834 | 52960, // VPDPWSUDYrm |
| 88835 | 52964, // VPDPWSUDYrr |
| 88836 | 52968, // VPDPWSUDZ128m |
| 88837 | 52972, // VPDPWSUDZ128mb |
| 88838 | 52976, // VPDPWSUDZ128mbk |
| 88839 | 52981, // VPDPWSUDZ128mbkz |
| 88840 | 52986, // VPDPWSUDZ128mk |
| 88841 | 52991, // VPDPWSUDZ128mkz |
| 88842 | 52996, // VPDPWSUDZ128r |
| 88843 | 53000, // VPDPWSUDZ128rk |
| 88844 | 53005, // VPDPWSUDZ128rkz |
| 88845 | 53010, // VPDPWSUDZ256m |
| 88846 | 53014, // VPDPWSUDZ256mb |
| 88847 | 53018, // VPDPWSUDZ256mbk |
| 88848 | 53023, // VPDPWSUDZ256mbkz |
| 88849 | 53028, // VPDPWSUDZ256mk |
| 88850 | 53033, // VPDPWSUDZ256mkz |
| 88851 | 53038, // VPDPWSUDZ256r |
| 88852 | 53042, // VPDPWSUDZ256rk |
| 88853 | 53047, // VPDPWSUDZ256rkz |
| 88854 | 53052, // VPDPWSUDZm |
| 88855 | 53056, // VPDPWSUDZmb |
| 88856 | 53060, // VPDPWSUDZmbk |
| 88857 | 53065, // VPDPWSUDZmbkz |
| 88858 | 53070, // VPDPWSUDZmk |
| 88859 | 53075, // VPDPWSUDZmkz |
| 88860 | 53080, // VPDPWSUDZr |
| 88861 | 53084, // VPDPWSUDZrk |
| 88862 | 53089, // VPDPWSUDZrkz |
| 88863 | 53094, // VPDPWSUDrm |
| 88864 | 53098, // VPDPWSUDrr |
| 88865 | 53102, // VPDPWUSDSYrm |
| 88866 | 53106, // VPDPWUSDSYrr |
| 88867 | 53110, // VPDPWUSDSZ128m |
| 88868 | 53114, // VPDPWUSDSZ128mb |
| 88869 | 53118, // VPDPWUSDSZ128mbk |
| 88870 | 53123, // VPDPWUSDSZ128mbkz |
| 88871 | 53128, // VPDPWUSDSZ128mk |
| 88872 | 53133, // VPDPWUSDSZ128mkz |
| 88873 | 53138, // VPDPWUSDSZ128r |
| 88874 | 53142, // VPDPWUSDSZ128rk |
| 88875 | 53147, // VPDPWUSDSZ128rkz |
| 88876 | 53152, // VPDPWUSDSZ256m |
| 88877 | 53156, // VPDPWUSDSZ256mb |
| 88878 | 53160, // VPDPWUSDSZ256mbk |
| 88879 | 53165, // VPDPWUSDSZ256mbkz |
| 88880 | 53170, // VPDPWUSDSZ256mk |
| 88881 | 53175, // VPDPWUSDSZ256mkz |
| 88882 | 53180, // VPDPWUSDSZ256r |
| 88883 | 53184, // VPDPWUSDSZ256rk |
| 88884 | 53189, // VPDPWUSDSZ256rkz |
| 88885 | 53194, // VPDPWUSDSZm |
| 88886 | 53198, // VPDPWUSDSZmb |
| 88887 | 53202, // VPDPWUSDSZmbk |
| 88888 | 53207, // VPDPWUSDSZmbkz |
| 88889 | 53212, // VPDPWUSDSZmk |
| 88890 | 53217, // VPDPWUSDSZmkz |
| 88891 | 53222, // VPDPWUSDSZr |
| 88892 | 53226, // VPDPWUSDSZrk |
| 88893 | 53231, // VPDPWUSDSZrkz |
| 88894 | 53236, // VPDPWUSDSrm |
| 88895 | 53240, // VPDPWUSDSrr |
| 88896 | 53244, // VPDPWUSDYrm |
| 88897 | 53248, // VPDPWUSDYrr |
| 88898 | 53252, // VPDPWUSDZ128m |
| 88899 | 53256, // VPDPWUSDZ128mb |
| 88900 | 53260, // VPDPWUSDZ128mbk |
| 88901 | 53265, // VPDPWUSDZ128mbkz |
| 88902 | 53270, // VPDPWUSDZ128mk |
| 88903 | 53275, // VPDPWUSDZ128mkz |
| 88904 | 53280, // VPDPWUSDZ128r |
| 88905 | 53284, // VPDPWUSDZ128rk |
| 88906 | 53289, // VPDPWUSDZ128rkz |
| 88907 | 53294, // VPDPWUSDZ256m |
| 88908 | 53298, // VPDPWUSDZ256mb |
| 88909 | 53302, // VPDPWUSDZ256mbk |
| 88910 | 53307, // VPDPWUSDZ256mbkz |
| 88911 | 53312, // VPDPWUSDZ256mk |
| 88912 | 53317, // VPDPWUSDZ256mkz |
| 88913 | 53322, // VPDPWUSDZ256r |
| 88914 | 53326, // VPDPWUSDZ256rk |
| 88915 | 53331, // VPDPWUSDZ256rkz |
| 88916 | 53336, // VPDPWUSDZm |
| 88917 | 53340, // VPDPWUSDZmb |
| 88918 | 53344, // VPDPWUSDZmbk |
| 88919 | 53349, // VPDPWUSDZmbkz |
| 88920 | 53354, // VPDPWUSDZmk |
| 88921 | 53359, // VPDPWUSDZmkz |
| 88922 | 53364, // VPDPWUSDZr |
| 88923 | 53368, // VPDPWUSDZrk |
| 88924 | 53373, // VPDPWUSDZrkz |
| 88925 | 53378, // VPDPWUSDrm |
| 88926 | 53382, // VPDPWUSDrr |
| 88927 | 53386, // VPDPWUUDSYrm |
| 88928 | 53390, // VPDPWUUDSYrr |
| 88929 | 53394, // VPDPWUUDSZ128m |
| 88930 | 53398, // VPDPWUUDSZ128mb |
| 88931 | 53402, // VPDPWUUDSZ128mbk |
| 88932 | 53407, // VPDPWUUDSZ128mbkz |
| 88933 | 53412, // VPDPWUUDSZ128mk |
| 88934 | 53417, // VPDPWUUDSZ128mkz |
| 88935 | 53422, // VPDPWUUDSZ128r |
| 88936 | 53426, // VPDPWUUDSZ128rk |
| 88937 | 53431, // VPDPWUUDSZ128rkz |
| 88938 | 53436, // VPDPWUUDSZ256m |
| 88939 | 53440, // VPDPWUUDSZ256mb |
| 88940 | 53444, // VPDPWUUDSZ256mbk |
| 88941 | 53449, // VPDPWUUDSZ256mbkz |
| 88942 | 53454, // VPDPWUUDSZ256mk |
| 88943 | 53459, // VPDPWUUDSZ256mkz |
| 88944 | 53464, // VPDPWUUDSZ256r |
| 88945 | 53468, // VPDPWUUDSZ256rk |
| 88946 | 53473, // VPDPWUUDSZ256rkz |
| 88947 | 53478, // VPDPWUUDSZm |
| 88948 | 53482, // VPDPWUUDSZmb |
| 88949 | 53486, // VPDPWUUDSZmbk |
| 88950 | 53491, // VPDPWUUDSZmbkz |
| 88951 | 53496, // VPDPWUUDSZmk |
| 88952 | 53501, // VPDPWUUDSZmkz |
| 88953 | 53506, // VPDPWUUDSZr |
| 88954 | 53510, // VPDPWUUDSZrk |
| 88955 | 53515, // VPDPWUUDSZrkz |
| 88956 | 53520, // VPDPWUUDSrm |
| 88957 | 53524, // VPDPWUUDSrr |
| 88958 | 53528, // VPDPWUUDYrm |
| 88959 | 53532, // VPDPWUUDYrr |
| 88960 | 53536, // VPDPWUUDZ128m |
| 88961 | 53540, // VPDPWUUDZ128mb |
| 88962 | 53544, // VPDPWUUDZ128mbk |
| 88963 | 53549, // VPDPWUUDZ128mbkz |
| 88964 | 53554, // VPDPWUUDZ128mk |
| 88965 | 53559, // VPDPWUUDZ128mkz |
| 88966 | 53564, // VPDPWUUDZ128r |
| 88967 | 53568, // VPDPWUUDZ128rk |
| 88968 | 53573, // VPDPWUUDZ128rkz |
| 88969 | 53578, // VPDPWUUDZ256m |
| 88970 | 53582, // VPDPWUUDZ256mb |
| 88971 | 53586, // VPDPWUUDZ256mbk |
| 88972 | 53591, // VPDPWUUDZ256mbkz |
| 88973 | 53596, // VPDPWUUDZ256mk |
| 88974 | 53601, // VPDPWUUDZ256mkz |
| 88975 | 53606, // VPDPWUUDZ256r |
| 88976 | 53610, // VPDPWUUDZ256rk |
| 88977 | 53615, // VPDPWUUDZ256rkz |
| 88978 | 53620, // VPDPWUUDZm |
| 88979 | 53624, // VPDPWUUDZmb |
| 88980 | 53628, // VPDPWUUDZmbk |
| 88981 | 53633, // VPDPWUUDZmbkz |
| 88982 | 53638, // VPDPWUUDZmk |
| 88983 | 53643, // VPDPWUUDZmkz |
| 88984 | 53648, // VPDPWUUDZr |
| 88985 | 53652, // VPDPWUUDZrk |
| 88986 | 53657, // VPDPWUUDZrkz |
| 88987 | 53662, // VPDPWUUDrm |
| 88988 | 53666, // VPDPWUUDrr |
| 88989 | 53670, // VPERM2F128rmi |
| 88990 | 53674, // VPERM2F128rri |
| 88991 | 53678, // VPERM2I128rmi |
| 88992 | 53682, // VPERM2I128rri |
| 88993 | 53686, // VPERMBZ128rm |
| 88994 | 53689, // VPERMBZ128rmk |
| 88995 | 53694, // VPERMBZ128rmkz |
| 88996 | 53698, // VPERMBZ128rr |
| 88997 | 53701, // VPERMBZ128rrk |
| 88998 | 53706, // VPERMBZ128rrkz |
| 88999 | 53710, // VPERMBZ256rm |
| 89000 | 53713, // VPERMBZ256rmk |
| 89001 | 53718, // VPERMBZ256rmkz |
| 89002 | 53722, // VPERMBZ256rr |
| 89003 | 53725, // VPERMBZ256rrk |
| 89004 | 53730, // VPERMBZ256rrkz |
| 89005 | 53734, // VPERMBZrm |
| 89006 | 53737, // VPERMBZrmk |
| 89007 | 53742, // VPERMBZrmkz |
| 89008 | 53746, // VPERMBZrr |
| 89009 | 53749, // VPERMBZrrk |
| 89010 | 53754, // VPERMBZrrkz |
| 89011 | 53758, // VPERMDYrm |
| 89012 | 53761, // VPERMDYrr |
| 89013 | 53764, // VPERMDZ256rm |
| 89014 | 53767, // VPERMDZ256rmb |
| 89015 | 53770, // VPERMDZ256rmbk |
| 89016 | 53775, // VPERMDZ256rmbkz |
| 89017 | 53779, // VPERMDZ256rmk |
| 89018 | 53784, // VPERMDZ256rmkz |
| 89019 | 53788, // VPERMDZ256rr |
| 89020 | 53791, // VPERMDZ256rrk |
| 89021 | 53796, // VPERMDZ256rrkz |
| 89022 | 53800, // VPERMDZrm |
| 89023 | 53803, // VPERMDZrmb |
| 89024 | 53806, // VPERMDZrmbk |
| 89025 | 53811, // VPERMDZrmbkz |
| 89026 | 53815, // VPERMDZrmk |
| 89027 | 53820, // VPERMDZrmkz |
| 89028 | 53824, // VPERMDZrr |
| 89029 | 53827, // VPERMDZrrk |
| 89030 | 53832, // VPERMDZrrkz |
| 89031 | 53836, // VPERMI2BZ128rm |
| 89032 | 53840, // VPERMI2BZ128rmk |
| 89033 | 53845, // VPERMI2BZ128rmkz |
| 89034 | 53850, // VPERMI2BZ128rr |
| 89035 | 53854, // VPERMI2BZ128rrk |
| 89036 | 53859, // VPERMI2BZ128rrkz |
| 89037 | 53864, // VPERMI2BZ256rm |
| 89038 | 53868, // VPERMI2BZ256rmk |
| 89039 | 53873, // VPERMI2BZ256rmkz |
| 89040 | 53878, // VPERMI2BZ256rr |
| 89041 | 53882, // VPERMI2BZ256rrk |
| 89042 | 53887, // VPERMI2BZ256rrkz |
| 89043 | 53892, // VPERMI2BZrm |
| 89044 | 53896, // VPERMI2BZrmk |
| 89045 | 53901, // VPERMI2BZrmkz |
| 89046 | 53906, // VPERMI2BZrr |
| 89047 | 53910, // VPERMI2BZrrk |
| 89048 | 53915, // VPERMI2BZrrkz |
| 89049 | 53920, // VPERMI2DZ128rm |
| 89050 | 53924, // VPERMI2DZ128rmb |
| 89051 | 53928, // VPERMI2DZ128rmbk |
| 89052 | 53933, // VPERMI2DZ128rmbkz |
| 89053 | 53938, // VPERMI2DZ128rmk |
| 89054 | 53943, // VPERMI2DZ128rmkz |
| 89055 | 53948, // VPERMI2DZ128rr |
| 89056 | 53952, // VPERMI2DZ128rrk |
| 89057 | 53957, // VPERMI2DZ128rrkz |
| 89058 | 53962, // VPERMI2DZ256rm |
| 89059 | 53966, // VPERMI2DZ256rmb |
| 89060 | 53970, // VPERMI2DZ256rmbk |
| 89061 | 53975, // VPERMI2DZ256rmbkz |
| 89062 | 53980, // VPERMI2DZ256rmk |
| 89063 | 53985, // VPERMI2DZ256rmkz |
| 89064 | 53990, // VPERMI2DZ256rr |
| 89065 | 53994, // VPERMI2DZ256rrk |
| 89066 | 53999, // VPERMI2DZ256rrkz |
| 89067 | 54004, // VPERMI2DZrm |
| 89068 | 54008, // VPERMI2DZrmb |
| 89069 | 54012, // VPERMI2DZrmbk |
| 89070 | 54017, // VPERMI2DZrmbkz |
| 89071 | 54022, // VPERMI2DZrmk |
| 89072 | 54027, // VPERMI2DZrmkz |
| 89073 | 54032, // VPERMI2DZrr |
| 89074 | 54036, // VPERMI2DZrrk |
| 89075 | 54041, // VPERMI2DZrrkz |
| 89076 | 54046, // VPERMI2PDZ128rm |
| 89077 | 54050, // VPERMI2PDZ128rmb |
| 89078 | 54054, // VPERMI2PDZ128rmbk |
| 89079 | 54059, // VPERMI2PDZ128rmbkz |
| 89080 | 54064, // VPERMI2PDZ128rmk |
| 89081 | 54069, // VPERMI2PDZ128rmkz |
| 89082 | 54074, // VPERMI2PDZ128rr |
| 89083 | 54078, // VPERMI2PDZ128rrk |
| 89084 | 54083, // VPERMI2PDZ128rrkz |
| 89085 | 54088, // VPERMI2PDZ256rm |
| 89086 | 54092, // VPERMI2PDZ256rmb |
| 89087 | 54096, // VPERMI2PDZ256rmbk |
| 89088 | 54101, // VPERMI2PDZ256rmbkz |
| 89089 | 54106, // VPERMI2PDZ256rmk |
| 89090 | 54111, // VPERMI2PDZ256rmkz |
| 89091 | 54116, // VPERMI2PDZ256rr |
| 89092 | 54120, // VPERMI2PDZ256rrk |
| 89093 | 54125, // VPERMI2PDZ256rrkz |
| 89094 | 54130, // VPERMI2PDZrm |
| 89095 | 54134, // VPERMI2PDZrmb |
| 89096 | 54138, // VPERMI2PDZrmbk |
| 89097 | 54143, // VPERMI2PDZrmbkz |
| 89098 | 54148, // VPERMI2PDZrmk |
| 89099 | 54153, // VPERMI2PDZrmkz |
| 89100 | 54158, // VPERMI2PDZrr |
| 89101 | 54162, // VPERMI2PDZrrk |
| 89102 | 54167, // VPERMI2PDZrrkz |
| 89103 | 54172, // VPERMI2PSZ128rm |
| 89104 | 54176, // VPERMI2PSZ128rmb |
| 89105 | 54180, // VPERMI2PSZ128rmbk |
| 89106 | 54185, // VPERMI2PSZ128rmbkz |
| 89107 | 54190, // VPERMI2PSZ128rmk |
| 89108 | 54195, // VPERMI2PSZ128rmkz |
| 89109 | 54200, // VPERMI2PSZ128rr |
| 89110 | 54204, // VPERMI2PSZ128rrk |
| 89111 | 54209, // VPERMI2PSZ128rrkz |
| 89112 | 54214, // VPERMI2PSZ256rm |
| 89113 | 54218, // VPERMI2PSZ256rmb |
| 89114 | 54222, // VPERMI2PSZ256rmbk |
| 89115 | 54227, // VPERMI2PSZ256rmbkz |
| 89116 | 54232, // VPERMI2PSZ256rmk |
| 89117 | 54237, // VPERMI2PSZ256rmkz |
| 89118 | 54242, // VPERMI2PSZ256rr |
| 89119 | 54246, // VPERMI2PSZ256rrk |
| 89120 | 54251, // VPERMI2PSZ256rrkz |
| 89121 | 54256, // VPERMI2PSZrm |
| 89122 | 54260, // VPERMI2PSZrmb |
| 89123 | 54264, // VPERMI2PSZrmbk |
| 89124 | 54269, // VPERMI2PSZrmbkz |
| 89125 | 54274, // VPERMI2PSZrmk |
| 89126 | 54279, // VPERMI2PSZrmkz |
| 89127 | 54284, // VPERMI2PSZrr |
| 89128 | 54288, // VPERMI2PSZrrk |
| 89129 | 54293, // VPERMI2PSZrrkz |
| 89130 | 54298, // VPERMI2QZ128rm |
| 89131 | 54302, // VPERMI2QZ128rmb |
| 89132 | 54306, // VPERMI2QZ128rmbk |
| 89133 | 54311, // VPERMI2QZ128rmbkz |
| 89134 | 54316, // VPERMI2QZ128rmk |
| 89135 | 54321, // VPERMI2QZ128rmkz |
| 89136 | 54326, // VPERMI2QZ128rr |
| 89137 | 54330, // VPERMI2QZ128rrk |
| 89138 | 54335, // VPERMI2QZ128rrkz |
| 89139 | 54340, // VPERMI2QZ256rm |
| 89140 | 54344, // VPERMI2QZ256rmb |
| 89141 | 54348, // VPERMI2QZ256rmbk |
| 89142 | 54353, // VPERMI2QZ256rmbkz |
| 89143 | 54358, // VPERMI2QZ256rmk |
| 89144 | 54363, // VPERMI2QZ256rmkz |
| 89145 | 54368, // VPERMI2QZ256rr |
| 89146 | 54372, // VPERMI2QZ256rrk |
| 89147 | 54377, // VPERMI2QZ256rrkz |
| 89148 | 54382, // VPERMI2QZrm |
| 89149 | 54386, // VPERMI2QZrmb |
| 89150 | 54390, // VPERMI2QZrmbk |
| 89151 | 54395, // VPERMI2QZrmbkz |
| 89152 | 54400, // VPERMI2QZrmk |
| 89153 | 54405, // VPERMI2QZrmkz |
| 89154 | 54410, // VPERMI2QZrr |
| 89155 | 54414, // VPERMI2QZrrk |
| 89156 | 54419, // VPERMI2QZrrkz |
| 89157 | 54424, // VPERMI2WZ128rm |
| 89158 | 54428, // VPERMI2WZ128rmk |
| 89159 | 54433, // VPERMI2WZ128rmkz |
| 89160 | 54438, // VPERMI2WZ128rr |
| 89161 | 54442, // VPERMI2WZ128rrk |
| 89162 | 54447, // VPERMI2WZ128rrkz |
| 89163 | 54452, // VPERMI2WZ256rm |
| 89164 | 54456, // VPERMI2WZ256rmk |
| 89165 | 54461, // VPERMI2WZ256rmkz |
| 89166 | 54466, // VPERMI2WZ256rr |
| 89167 | 54470, // VPERMI2WZ256rrk |
| 89168 | 54475, // VPERMI2WZ256rrkz |
| 89169 | 54480, // VPERMI2WZrm |
| 89170 | 54484, // VPERMI2WZrmk |
| 89171 | 54489, // VPERMI2WZrmkz |
| 89172 | 54494, // VPERMI2WZrr |
| 89173 | 54498, // VPERMI2WZrrk |
| 89174 | 54503, // VPERMI2WZrrkz |
| 89175 | 54508, // VPERMIL2PDYmr |
| 89176 | 54513, // VPERMIL2PDYrm |
| 89177 | 54518, // VPERMIL2PDYrr |
| 89178 | 54523, // VPERMIL2PDYrr_REV |
| 89179 | 54528, // VPERMIL2PDmr |
| 89180 | 54533, // VPERMIL2PDrm |
| 89181 | 54538, // VPERMIL2PDrr |
| 89182 | 54543, // VPERMIL2PDrr_REV |
| 89183 | 54548, // VPERMIL2PSYmr |
| 89184 | 54553, // VPERMIL2PSYrm |
| 89185 | 54558, // VPERMIL2PSYrr |
| 89186 | 54563, // VPERMIL2PSYrr_REV |
| 89187 | 54568, // VPERMIL2PSmr |
| 89188 | 54573, // VPERMIL2PSrm |
| 89189 | 54578, // VPERMIL2PSrr |
| 89190 | 54583, // VPERMIL2PSrr_REV |
| 89191 | 54588, // VPERMILPDYmi |
| 89192 | 54591, // VPERMILPDYri |
| 89193 | 54594, // VPERMILPDYrm |
| 89194 | 54597, // VPERMILPDYrr |
| 89195 | 54600, // VPERMILPDZ128mbi |
| 89196 | 54603, // VPERMILPDZ128mbik |
| 89197 | 54608, // VPERMILPDZ128mbikz |
| 89198 | 54612, // VPERMILPDZ128mi |
| 89199 | 54615, // VPERMILPDZ128mik |
| 89200 | 54620, // VPERMILPDZ128mikz |
| 89201 | 54624, // VPERMILPDZ128ri |
| 89202 | 54627, // VPERMILPDZ128rik |
| 89203 | 54632, // VPERMILPDZ128rikz |
| 89204 | 54636, // VPERMILPDZ128rm |
| 89205 | 54639, // VPERMILPDZ128rmb |
| 89206 | 54642, // VPERMILPDZ128rmbk |
| 89207 | 54647, // VPERMILPDZ128rmbkz |
| 89208 | 54651, // VPERMILPDZ128rmk |
| 89209 | 54656, // VPERMILPDZ128rmkz |
| 89210 | 54660, // VPERMILPDZ128rr |
| 89211 | 54663, // VPERMILPDZ128rrk |
| 89212 | 54668, // VPERMILPDZ128rrkz |
| 89213 | 54672, // VPERMILPDZ256mbi |
| 89214 | 54675, // VPERMILPDZ256mbik |
| 89215 | 54680, // VPERMILPDZ256mbikz |
| 89216 | 54684, // VPERMILPDZ256mi |
| 89217 | 54687, // VPERMILPDZ256mik |
| 89218 | 54692, // VPERMILPDZ256mikz |
| 89219 | 54696, // VPERMILPDZ256ri |
| 89220 | 54699, // VPERMILPDZ256rik |
| 89221 | 54704, // VPERMILPDZ256rikz |
| 89222 | 54708, // VPERMILPDZ256rm |
| 89223 | 54711, // VPERMILPDZ256rmb |
| 89224 | 54714, // VPERMILPDZ256rmbk |
| 89225 | 54719, // VPERMILPDZ256rmbkz |
| 89226 | 54723, // VPERMILPDZ256rmk |
| 89227 | 54728, // VPERMILPDZ256rmkz |
| 89228 | 54732, // VPERMILPDZ256rr |
| 89229 | 54735, // VPERMILPDZ256rrk |
| 89230 | 54740, // VPERMILPDZ256rrkz |
| 89231 | 54744, // VPERMILPDZmbi |
| 89232 | 54747, // VPERMILPDZmbik |
| 89233 | 54752, // VPERMILPDZmbikz |
| 89234 | 54756, // VPERMILPDZmi |
| 89235 | 54759, // VPERMILPDZmik |
| 89236 | 54764, // VPERMILPDZmikz |
| 89237 | 54768, // VPERMILPDZri |
| 89238 | 54771, // VPERMILPDZrik |
| 89239 | 54776, // VPERMILPDZrikz |
| 89240 | 54780, // VPERMILPDZrm |
| 89241 | 54783, // VPERMILPDZrmb |
| 89242 | 54786, // VPERMILPDZrmbk |
| 89243 | 54791, // VPERMILPDZrmbkz |
| 89244 | 54795, // VPERMILPDZrmk |
| 89245 | 54800, // VPERMILPDZrmkz |
| 89246 | 54804, // VPERMILPDZrr |
| 89247 | 54807, // VPERMILPDZrrk |
| 89248 | 54812, // VPERMILPDZrrkz |
| 89249 | 54816, // VPERMILPDmi |
| 89250 | 54819, // VPERMILPDri |
| 89251 | 54822, // VPERMILPDrm |
| 89252 | 54825, // VPERMILPDrr |
| 89253 | 54828, // VPERMILPSYmi |
| 89254 | 54831, // VPERMILPSYri |
| 89255 | 54834, // VPERMILPSYrm |
| 89256 | 54837, // VPERMILPSYrr |
| 89257 | 54840, // VPERMILPSZ128mbi |
| 89258 | 54843, // VPERMILPSZ128mbik |
| 89259 | 54848, // VPERMILPSZ128mbikz |
| 89260 | 54852, // VPERMILPSZ128mi |
| 89261 | 54855, // VPERMILPSZ128mik |
| 89262 | 54860, // VPERMILPSZ128mikz |
| 89263 | 54864, // VPERMILPSZ128ri |
| 89264 | 54867, // VPERMILPSZ128rik |
| 89265 | 54872, // VPERMILPSZ128rikz |
| 89266 | 54876, // VPERMILPSZ128rm |
| 89267 | 54879, // VPERMILPSZ128rmb |
| 89268 | 54882, // VPERMILPSZ128rmbk |
| 89269 | 54887, // VPERMILPSZ128rmbkz |
| 89270 | 54891, // VPERMILPSZ128rmk |
| 89271 | 54896, // VPERMILPSZ128rmkz |
| 89272 | 54900, // VPERMILPSZ128rr |
| 89273 | 54903, // VPERMILPSZ128rrk |
| 89274 | 54908, // VPERMILPSZ128rrkz |
| 89275 | 54912, // VPERMILPSZ256mbi |
| 89276 | 54915, // VPERMILPSZ256mbik |
| 89277 | 54920, // VPERMILPSZ256mbikz |
| 89278 | 54924, // VPERMILPSZ256mi |
| 89279 | 54927, // VPERMILPSZ256mik |
| 89280 | 54932, // VPERMILPSZ256mikz |
| 89281 | 54936, // VPERMILPSZ256ri |
| 89282 | 54939, // VPERMILPSZ256rik |
| 89283 | 54944, // VPERMILPSZ256rikz |
| 89284 | 54948, // VPERMILPSZ256rm |
| 89285 | 54951, // VPERMILPSZ256rmb |
| 89286 | 54954, // VPERMILPSZ256rmbk |
| 89287 | 54959, // VPERMILPSZ256rmbkz |
| 89288 | 54963, // VPERMILPSZ256rmk |
| 89289 | 54968, // VPERMILPSZ256rmkz |
| 89290 | 54972, // VPERMILPSZ256rr |
| 89291 | 54975, // VPERMILPSZ256rrk |
| 89292 | 54980, // VPERMILPSZ256rrkz |
| 89293 | 54984, // VPERMILPSZmbi |
| 89294 | 54987, // VPERMILPSZmbik |
| 89295 | 54992, // VPERMILPSZmbikz |
| 89296 | 54996, // VPERMILPSZmi |
| 89297 | 54999, // VPERMILPSZmik |
| 89298 | 55004, // VPERMILPSZmikz |
| 89299 | 55008, // VPERMILPSZri |
| 89300 | 55011, // VPERMILPSZrik |
| 89301 | 55016, // VPERMILPSZrikz |
| 89302 | 55020, // VPERMILPSZrm |
| 89303 | 55023, // VPERMILPSZrmb |
| 89304 | 55026, // VPERMILPSZrmbk |
| 89305 | 55031, // VPERMILPSZrmbkz |
| 89306 | 55035, // VPERMILPSZrmk |
| 89307 | 55040, // VPERMILPSZrmkz |
| 89308 | 55044, // VPERMILPSZrr |
| 89309 | 55047, // VPERMILPSZrrk |
| 89310 | 55052, // VPERMILPSZrrkz |
| 89311 | 55056, // VPERMILPSmi |
| 89312 | 55059, // VPERMILPSri |
| 89313 | 55062, // VPERMILPSrm |
| 89314 | 55065, // VPERMILPSrr |
| 89315 | 55068, // VPERMPDYmi |
| 89316 | 55071, // VPERMPDYri |
| 89317 | 55074, // VPERMPDZ256mbi |
| 89318 | 55077, // VPERMPDZ256mbik |
| 89319 | 55082, // VPERMPDZ256mbikz |
| 89320 | 55086, // VPERMPDZ256mi |
| 89321 | 55089, // VPERMPDZ256mik |
| 89322 | 55094, // VPERMPDZ256mikz |
| 89323 | 55098, // VPERMPDZ256ri |
| 89324 | 55101, // VPERMPDZ256rik |
| 89325 | 55106, // VPERMPDZ256rikz |
| 89326 | 55110, // VPERMPDZ256rm |
| 89327 | 55113, // VPERMPDZ256rmb |
| 89328 | 55116, // VPERMPDZ256rmbk |
| 89329 | 55121, // VPERMPDZ256rmbkz |
| 89330 | 55125, // VPERMPDZ256rmk |
| 89331 | 55130, // VPERMPDZ256rmkz |
| 89332 | 55134, // VPERMPDZ256rr |
| 89333 | 55137, // VPERMPDZ256rrk |
| 89334 | 55142, // VPERMPDZ256rrkz |
| 89335 | 55146, // VPERMPDZmbi |
| 89336 | 55149, // VPERMPDZmbik |
| 89337 | 55154, // VPERMPDZmbikz |
| 89338 | 55158, // VPERMPDZmi |
| 89339 | 55161, // VPERMPDZmik |
| 89340 | 55166, // VPERMPDZmikz |
| 89341 | 55170, // VPERMPDZri |
| 89342 | 55173, // VPERMPDZrik |
| 89343 | 55178, // VPERMPDZrikz |
| 89344 | 55182, // VPERMPDZrm |
| 89345 | 55185, // VPERMPDZrmb |
| 89346 | 55188, // VPERMPDZrmbk |
| 89347 | 55193, // VPERMPDZrmbkz |
| 89348 | 55197, // VPERMPDZrmk |
| 89349 | 55202, // VPERMPDZrmkz |
| 89350 | 55206, // VPERMPDZrr |
| 89351 | 55209, // VPERMPDZrrk |
| 89352 | 55214, // VPERMPDZrrkz |
| 89353 | 55218, // VPERMPSYrm |
| 89354 | 55221, // VPERMPSYrr |
| 89355 | 55224, // VPERMPSZ256rm |
| 89356 | 55227, // VPERMPSZ256rmb |
| 89357 | 55230, // VPERMPSZ256rmbk |
| 89358 | 55235, // VPERMPSZ256rmbkz |
| 89359 | 55239, // VPERMPSZ256rmk |
| 89360 | 55244, // VPERMPSZ256rmkz |
| 89361 | 55248, // VPERMPSZ256rr |
| 89362 | 55251, // VPERMPSZ256rrk |
| 89363 | 55256, // VPERMPSZ256rrkz |
| 89364 | 55260, // VPERMPSZrm |
| 89365 | 55263, // VPERMPSZrmb |
| 89366 | 55266, // VPERMPSZrmbk |
| 89367 | 55271, // VPERMPSZrmbkz |
| 89368 | 55275, // VPERMPSZrmk |
| 89369 | 55280, // VPERMPSZrmkz |
| 89370 | 55284, // VPERMPSZrr |
| 89371 | 55287, // VPERMPSZrrk |
| 89372 | 55292, // VPERMPSZrrkz |
| 89373 | 55296, // VPERMQYmi |
| 89374 | 55299, // VPERMQYri |
| 89375 | 55302, // VPERMQZ256mbi |
| 89376 | 55305, // VPERMQZ256mbik |
| 89377 | 55310, // VPERMQZ256mbikz |
| 89378 | 55314, // VPERMQZ256mi |
| 89379 | 55317, // VPERMQZ256mik |
| 89380 | 55322, // VPERMQZ256mikz |
| 89381 | 55326, // VPERMQZ256ri |
| 89382 | 55329, // VPERMQZ256rik |
| 89383 | 55334, // VPERMQZ256rikz |
| 89384 | 55338, // VPERMQZ256rm |
| 89385 | 55341, // VPERMQZ256rmb |
| 89386 | 55344, // VPERMQZ256rmbk |
| 89387 | 55349, // VPERMQZ256rmbkz |
| 89388 | 55353, // VPERMQZ256rmk |
| 89389 | 55358, // VPERMQZ256rmkz |
| 89390 | 55362, // VPERMQZ256rr |
| 89391 | 55365, // VPERMQZ256rrk |
| 89392 | 55370, // VPERMQZ256rrkz |
| 89393 | 55374, // VPERMQZmbi |
| 89394 | 55377, // VPERMQZmbik |
| 89395 | 55382, // VPERMQZmbikz |
| 89396 | 55386, // VPERMQZmi |
| 89397 | 55389, // VPERMQZmik |
| 89398 | 55394, // VPERMQZmikz |
| 89399 | 55398, // VPERMQZri |
| 89400 | 55401, // VPERMQZrik |
| 89401 | 55406, // VPERMQZrikz |
| 89402 | 55410, // VPERMQZrm |
| 89403 | 55413, // VPERMQZrmb |
| 89404 | 55416, // VPERMQZrmbk |
| 89405 | 55421, // VPERMQZrmbkz |
| 89406 | 55425, // VPERMQZrmk |
| 89407 | 55430, // VPERMQZrmkz |
| 89408 | 55434, // VPERMQZrr |
| 89409 | 55437, // VPERMQZrrk |
| 89410 | 55442, // VPERMQZrrkz |
| 89411 | 55446, // VPERMT2BZ128rm |
| 89412 | 55450, // VPERMT2BZ128rmk |
| 89413 | 55455, // VPERMT2BZ128rmkz |
| 89414 | 55460, // VPERMT2BZ128rr |
| 89415 | 55464, // VPERMT2BZ128rrk |
| 89416 | 55469, // VPERMT2BZ128rrkz |
| 89417 | 55474, // VPERMT2BZ256rm |
| 89418 | 55478, // VPERMT2BZ256rmk |
| 89419 | 55483, // VPERMT2BZ256rmkz |
| 89420 | 55488, // VPERMT2BZ256rr |
| 89421 | 55492, // VPERMT2BZ256rrk |
| 89422 | 55497, // VPERMT2BZ256rrkz |
| 89423 | 55502, // VPERMT2BZrm |
| 89424 | 55506, // VPERMT2BZrmk |
| 89425 | 55511, // VPERMT2BZrmkz |
| 89426 | 55516, // VPERMT2BZrr |
| 89427 | 55520, // VPERMT2BZrrk |
| 89428 | 55525, // VPERMT2BZrrkz |
| 89429 | 55530, // VPERMT2DZ128rm |
| 89430 | 55534, // VPERMT2DZ128rmb |
| 89431 | 55538, // VPERMT2DZ128rmbk |
| 89432 | 55543, // VPERMT2DZ128rmbkz |
| 89433 | 55548, // VPERMT2DZ128rmk |
| 89434 | 55553, // VPERMT2DZ128rmkz |
| 89435 | 55558, // VPERMT2DZ128rr |
| 89436 | 55562, // VPERMT2DZ128rrk |
| 89437 | 55567, // VPERMT2DZ128rrkz |
| 89438 | 55572, // VPERMT2DZ256rm |
| 89439 | 55576, // VPERMT2DZ256rmb |
| 89440 | 55580, // VPERMT2DZ256rmbk |
| 89441 | 55585, // VPERMT2DZ256rmbkz |
| 89442 | 55590, // VPERMT2DZ256rmk |
| 89443 | 55595, // VPERMT2DZ256rmkz |
| 89444 | 55600, // VPERMT2DZ256rr |
| 89445 | 55604, // VPERMT2DZ256rrk |
| 89446 | 55609, // VPERMT2DZ256rrkz |
| 89447 | 55614, // VPERMT2DZrm |
| 89448 | 55618, // VPERMT2DZrmb |
| 89449 | 55622, // VPERMT2DZrmbk |
| 89450 | 55627, // VPERMT2DZrmbkz |
| 89451 | 55632, // VPERMT2DZrmk |
| 89452 | 55637, // VPERMT2DZrmkz |
| 89453 | 55642, // VPERMT2DZrr |
| 89454 | 55646, // VPERMT2DZrrk |
| 89455 | 55651, // VPERMT2DZrrkz |
| 89456 | 55656, // VPERMT2PDZ128rm |
| 89457 | 55660, // VPERMT2PDZ128rmb |
| 89458 | 55664, // VPERMT2PDZ128rmbk |
| 89459 | 55669, // VPERMT2PDZ128rmbkz |
| 89460 | 55674, // VPERMT2PDZ128rmk |
| 89461 | 55679, // VPERMT2PDZ128rmkz |
| 89462 | 55684, // VPERMT2PDZ128rr |
| 89463 | 55688, // VPERMT2PDZ128rrk |
| 89464 | 55693, // VPERMT2PDZ128rrkz |
| 89465 | 55698, // VPERMT2PDZ256rm |
| 89466 | 55702, // VPERMT2PDZ256rmb |
| 89467 | 55706, // VPERMT2PDZ256rmbk |
| 89468 | 55711, // VPERMT2PDZ256rmbkz |
| 89469 | 55716, // VPERMT2PDZ256rmk |
| 89470 | 55721, // VPERMT2PDZ256rmkz |
| 89471 | 55726, // VPERMT2PDZ256rr |
| 89472 | 55730, // VPERMT2PDZ256rrk |
| 89473 | 55735, // VPERMT2PDZ256rrkz |
| 89474 | 55740, // VPERMT2PDZrm |
| 89475 | 55744, // VPERMT2PDZrmb |
| 89476 | 55748, // VPERMT2PDZrmbk |
| 89477 | 55753, // VPERMT2PDZrmbkz |
| 89478 | 55758, // VPERMT2PDZrmk |
| 89479 | 55763, // VPERMT2PDZrmkz |
| 89480 | 55768, // VPERMT2PDZrr |
| 89481 | 55772, // VPERMT2PDZrrk |
| 89482 | 55777, // VPERMT2PDZrrkz |
| 89483 | 55782, // VPERMT2PSZ128rm |
| 89484 | 55786, // VPERMT2PSZ128rmb |
| 89485 | 55790, // VPERMT2PSZ128rmbk |
| 89486 | 55795, // VPERMT2PSZ128rmbkz |
| 89487 | 55800, // VPERMT2PSZ128rmk |
| 89488 | 55805, // VPERMT2PSZ128rmkz |
| 89489 | 55810, // VPERMT2PSZ128rr |
| 89490 | 55814, // VPERMT2PSZ128rrk |
| 89491 | 55819, // VPERMT2PSZ128rrkz |
| 89492 | 55824, // VPERMT2PSZ256rm |
| 89493 | 55828, // VPERMT2PSZ256rmb |
| 89494 | 55832, // VPERMT2PSZ256rmbk |
| 89495 | 55837, // VPERMT2PSZ256rmbkz |
| 89496 | 55842, // VPERMT2PSZ256rmk |
| 89497 | 55847, // VPERMT2PSZ256rmkz |
| 89498 | 55852, // VPERMT2PSZ256rr |
| 89499 | 55856, // VPERMT2PSZ256rrk |
| 89500 | 55861, // VPERMT2PSZ256rrkz |
| 89501 | 55866, // VPERMT2PSZrm |
| 89502 | 55870, // VPERMT2PSZrmb |
| 89503 | 55874, // VPERMT2PSZrmbk |
| 89504 | 55879, // VPERMT2PSZrmbkz |
| 89505 | 55884, // VPERMT2PSZrmk |
| 89506 | 55889, // VPERMT2PSZrmkz |
| 89507 | 55894, // VPERMT2PSZrr |
| 89508 | 55898, // VPERMT2PSZrrk |
| 89509 | 55903, // VPERMT2PSZrrkz |
| 89510 | 55908, // VPERMT2QZ128rm |
| 89511 | 55912, // VPERMT2QZ128rmb |
| 89512 | 55916, // VPERMT2QZ128rmbk |
| 89513 | 55921, // VPERMT2QZ128rmbkz |
| 89514 | 55926, // VPERMT2QZ128rmk |
| 89515 | 55931, // VPERMT2QZ128rmkz |
| 89516 | 55936, // VPERMT2QZ128rr |
| 89517 | 55940, // VPERMT2QZ128rrk |
| 89518 | 55945, // VPERMT2QZ128rrkz |
| 89519 | 55950, // VPERMT2QZ256rm |
| 89520 | 55954, // VPERMT2QZ256rmb |
| 89521 | 55958, // VPERMT2QZ256rmbk |
| 89522 | 55963, // VPERMT2QZ256rmbkz |
| 89523 | 55968, // VPERMT2QZ256rmk |
| 89524 | 55973, // VPERMT2QZ256rmkz |
| 89525 | 55978, // VPERMT2QZ256rr |
| 89526 | 55982, // VPERMT2QZ256rrk |
| 89527 | 55987, // VPERMT2QZ256rrkz |
| 89528 | 55992, // VPERMT2QZrm |
| 89529 | 55996, // VPERMT2QZrmb |
| 89530 | 56000, // VPERMT2QZrmbk |
| 89531 | 56005, // VPERMT2QZrmbkz |
| 89532 | 56010, // VPERMT2QZrmk |
| 89533 | 56015, // VPERMT2QZrmkz |
| 89534 | 56020, // VPERMT2QZrr |
| 89535 | 56024, // VPERMT2QZrrk |
| 89536 | 56029, // VPERMT2QZrrkz |
| 89537 | 56034, // VPERMT2WZ128rm |
| 89538 | 56038, // VPERMT2WZ128rmk |
| 89539 | 56043, // VPERMT2WZ128rmkz |
| 89540 | 56048, // VPERMT2WZ128rr |
| 89541 | 56052, // VPERMT2WZ128rrk |
| 89542 | 56057, // VPERMT2WZ128rrkz |
| 89543 | 56062, // VPERMT2WZ256rm |
| 89544 | 56066, // VPERMT2WZ256rmk |
| 89545 | 56071, // VPERMT2WZ256rmkz |
| 89546 | 56076, // VPERMT2WZ256rr |
| 89547 | 56080, // VPERMT2WZ256rrk |
| 89548 | 56085, // VPERMT2WZ256rrkz |
| 89549 | 56090, // VPERMT2WZrm |
| 89550 | 56094, // VPERMT2WZrmk |
| 89551 | 56099, // VPERMT2WZrmkz |
| 89552 | 56104, // VPERMT2WZrr |
| 89553 | 56108, // VPERMT2WZrrk |
| 89554 | 56113, // VPERMT2WZrrkz |
| 89555 | 56118, // VPERMWZ128rm |
| 89556 | 56121, // VPERMWZ128rmk |
| 89557 | 56126, // VPERMWZ128rmkz |
| 89558 | 56130, // VPERMWZ128rr |
| 89559 | 56133, // VPERMWZ128rrk |
| 89560 | 56138, // VPERMWZ128rrkz |
| 89561 | 56142, // VPERMWZ256rm |
| 89562 | 56145, // VPERMWZ256rmk |
| 89563 | 56150, // VPERMWZ256rmkz |
| 89564 | 56154, // VPERMWZ256rr |
| 89565 | 56157, // VPERMWZ256rrk |
| 89566 | 56162, // VPERMWZ256rrkz |
| 89567 | 56166, // VPERMWZrm |
| 89568 | 56169, // VPERMWZrmk |
| 89569 | 56174, // VPERMWZrmkz |
| 89570 | 56178, // VPERMWZrr |
| 89571 | 56181, // VPERMWZrrk |
| 89572 | 56186, // VPERMWZrrkz |
| 89573 | 56190, // VPEXPANDBZ128rm |
| 89574 | 56192, // VPEXPANDBZ128rmk |
| 89575 | 56196, // VPEXPANDBZ128rmkz |
| 89576 | 56199, // VPEXPANDBZ128rr |
| 89577 | 56201, // VPEXPANDBZ128rrk |
| 89578 | 56205, // VPEXPANDBZ128rrkz |
| 89579 | 56208, // VPEXPANDBZ256rm |
| 89580 | 56210, // VPEXPANDBZ256rmk |
| 89581 | 56214, // VPEXPANDBZ256rmkz |
| 89582 | 56217, // VPEXPANDBZ256rr |
| 89583 | 56219, // VPEXPANDBZ256rrk |
| 89584 | 56223, // VPEXPANDBZ256rrkz |
| 89585 | 56226, // VPEXPANDBZrm |
| 89586 | 56228, // VPEXPANDBZrmk |
| 89587 | 56232, // VPEXPANDBZrmkz |
| 89588 | 56235, // VPEXPANDBZrr |
| 89589 | 56237, // VPEXPANDBZrrk |
| 89590 | 56241, // VPEXPANDBZrrkz |
| 89591 | 56244, // VPEXPANDDZ128rm |
| 89592 | 56246, // VPEXPANDDZ128rmk |
| 89593 | 56250, // VPEXPANDDZ128rmkz |
| 89594 | 56253, // VPEXPANDDZ128rr |
| 89595 | 56255, // VPEXPANDDZ128rrk |
| 89596 | 56259, // VPEXPANDDZ128rrkz |
| 89597 | 56262, // VPEXPANDDZ256rm |
| 89598 | 56264, // VPEXPANDDZ256rmk |
| 89599 | 56268, // VPEXPANDDZ256rmkz |
| 89600 | 56271, // VPEXPANDDZ256rr |
| 89601 | 56273, // VPEXPANDDZ256rrk |
| 89602 | 56277, // VPEXPANDDZ256rrkz |
| 89603 | 56280, // VPEXPANDDZrm |
| 89604 | 56282, // VPEXPANDDZrmk |
| 89605 | 56286, // VPEXPANDDZrmkz |
| 89606 | 56289, // VPEXPANDDZrr |
| 89607 | 56291, // VPEXPANDDZrrk |
| 89608 | 56295, // VPEXPANDDZrrkz |
| 89609 | 56298, // VPEXPANDQZ128rm |
| 89610 | 56300, // VPEXPANDQZ128rmk |
| 89611 | 56304, // VPEXPANDQZ128rmkz |
| 89612 | 56307, // VPEXPANDQZ128rr |
| 89613 | 56309, // VPEXPANDQZ128rrk |
| 89614 | 56313, // VPEXPANDQZ128rrkz |
| 89615 | 56316, // VPEXPANDQZ256rm |
| 89616 | 56318, // VPEXPANDQZ256rmk |
| 89617 | 56322, // VPEXPANDQZ256rmkz |
| 89618 | 56325, // VPEXPANDQZ256rr |
| 89619 | 56327, // VPEXPANDQZ256rrk |
| 89620 | 56331, // VPEXPANDQZ256rrkz |
| 89621 | 56334, // VPEXPANDQZrm |
| 89622 | 56336, // VPEXPANDQZrmk |
| 89623 | 56340, // VPEXPANDQZrmkz |
| 89624 | 56343, // VPEXPANDQZrr |
| 89625 | 56345, // VPEXPANDQZrrk |
| 89626 | 56349, // VPEXPANDQZrrkz |
| 89627 | 56352, // VPEXPANDWZ128rm |
| 89628 | 56354, // VPEXPANDWZ128rmk |
| 89629 | 56358, // VPEXPANDWZ128rmkz |
| 89630 | 56361, // VPEXPANDWZ128rr |
| 89631 | 56363, // VPEXPANDWZ128rrk |
| 89632 | 56367, // VPEXPANDWZ128rrkz |
| 89633 | 56370, // VPEXPANDWZ256rm |
| 89634 | 56372, // VPEXPANDWZ256rmk |
| 89635 | 56376, // VPEXPANDWZ256rmkz |
| 89636 | 56379, // VPEXPANDWZ256rr |
| 89637 | 56381, // VPEXPANDWZ256rrk |
| 89638 | 56385, // VPEXPANDWZ256rrkz |
| 89639 | 56388, // VPEXPANDWZrm |
| 89640 | 56390, // VPEXPANDWZrmk |
| 89641 | 56394, // VPEXPANDWZrmkz |
| 89642 | 56397, // VPEXPANDWZrr |
| 89643 | 56399, // VPEXPANDWZrrk |
| 89644 | 56403, // VPEXPANDWZrrkz |
| 89645 | 56406, // VPEXTRBZmri |
| 89646 | 56409, // VPEXTRBZrri |
| 89647 | 56412, // VPEXTRBmri |
| 89648 | 56415, // VPEXTRBrri |
| 89649 | 56418, // VPEXTRDZmri |
| 89650 | 56421, // VPEXTRDZrri |
| 89651 | 56424, // VPEXTRDmri |
| 89652 | 56427, // VPEXTRDrri |
| 89653 | 56430, // VPEXTRQZmri |
| 89654 | 56433, // VPEXTRQZrri |
| 89655 | 56436, // VPEXTRQmri |
| 89656 | 56439, // VPEXTRQrri |
| 89657 | 56442, // VPEXTRWZmri |
| 89658 | 56445, // VPEXTRWZrri |
| 89659 | 56448, // VPEXTRWZrri_REV |
| 89660 | 56451, // VPEXTRWmri |
| 89661 | 56454, // VPEXTRWrri |
| 89662 | 56457, // VPEXTRWrri_REV |
| 89663 | 56460, // VPGATHERDDYrm |
| 89664 | 56465, // VPGATHERDDZ128rm |
| 89665 | 56470, // VPGATHERDDZ256rm |
| 89666 | 56475, // VPGATHERDDZrm |
| 89667 | 56480, // VPGATHERDDrm |
| 89668 | 56485, // VPGATHERDQYrm |
| 89669 | 56490, // VPGATHERDQZ128rm |
| 89670 | 56495, // VPGATHERDQZ256rm |
| 89671 | 56500, // VPGATHERDQZrm |
| 89672 | 56505, // VPGATHERDQrm |
| 89673 | 56510, // VPGATHERQDYrm |
| 89674 | 56515, // VPGATHERQDZ128rm |
| 89675 | 56520, // VPGATHERQDZ256rm |
| 89676 | 56525, // VPGATHERQDZrm |
| 89677 | 56530, // VPGATHERQDrm |
| 89678 | 56535, // VPGATHERQQYrm |
| 89679 | 56540, // VPGATHERQQZ128rm |
| 89680 | 56545, // VPGATHERQQZ256rm |
| 89681 | 56550, // VPGATHERQQZrm |
| 89682 | 56555, // VPGATHERQQrm |
| 89683 | 56560, // VPHADDBDrm |
| 89684 | 56562, // VPHADDBDrr |
| 89685 | 56564, // VPHADDBQrm |
| 89686 | 56566, // VPHADDBQrr |
| 89687 | 56568, // VPHADDBWrm |
| 89688 | 56570, // VPHADDBWrr |
| 89689 | 56572, // VPHADDDQrm |
| 89690 | 56574, // VPHADDDQrr |
| 89691 | 56576, // VPHADDDYrm |
| 89692 | 56579, // VPHADDDYrr |
| 89693 | 56582, // VPHADDDrm |
| 89694 | 56585, // VPHADDDrr |
| 89695 | 56588, // VPHADDSWYrm |
| 89696 | 56591, // VPHADDSWYrr |
| 89697 | 56594, // VPHADDSWrm |
| 89698 | 56597, // VPHADDSWrr |
| 89699 | 56600, // VPHADDUBDrm |
| 89700 | 56602, // VPHADDUBDrr |
| 89701 | 56604, // VPHADDUBQrm |
| 89702 | 56606, // VPHADDUBQrr |
| 89703 | 56608, // VPHADDUBWrm |
| 89704 | 56610, // VPHADDUBWrr |
| 89705 | 56612, // VPHADDUDQrm |
| 89706 | 56614, // VPHADDUDQrr |
| 89707 | 56616, // VPHADDUWDrm |
| 89708 | 56618, // VPHADDUWDrr |
| 89709 | 56620, // VPHADDUWQrm |
| 89710 | 56622, // VPHADDUWQrr |
| 89711 | 56624, // VPHADDWDrm |
| 89712 | 56626, // VPHADDWDrr |
| 89713 | 56628, // VPHADDWQrm |
| 89714 | 56630, // VPHADDWQrr |
| 89715 | 56632, // VPHADDWYrm |
| 89716 | 56635, // VPHADDWYrr |
| 89717 | 56638, // VPHADDWrm |
| 89718 | 56641, // VPHADDWrr |
| 89719 | 56644, // VPHMINPOSUWrm |
| 89720 | 56646, // VPHMINPOSUWrr |
| 89721 | 56648, // VPHSUBBWrm |
| 89722 | 56650, // VPHSUBBWrr |
| 89723 | 56652, // VPHSUBDQrm |
| 89724 | 56654, // VPHSUBDQrr |
| 89725 | 56656, // VPHSUBDYrm |
| 89726 | 56659, // VPHSUBDYrr |
| 89727 | 56662, // VPHSUBDrm |
| 89728 | 56665, // VPHSUBDrr |
| 89729 | 56668, // VPHSUBSWYrm |
| 89730 | 56671, // VPHSUBSWYrr |
| 89731 | 56674, // VPHSUBSWrm |
| 89732 | 56677, // VPHSUBSWrr |
| 89733 | 56680, // VPHSUBWDrm |
| 89734 | 56682, // VPHSUBWDrr |
| 89735 | 56684, // VPHSUBWYrm |
| 89736 | 56687, // VPHSUBWYrr |
| 89737 | 56690, // VPHSUBWrm |
| 89738 | 56693, // VPHSUBWrr |
| 89739 | 56696, // VPINSRBZrmi |
| 89740 | 56700, // VPINSRBZrri |
| 89741 | 56704, // VPINSRBrmi |
| 89742 | 56708, // VPINSRBrri |
| 89743 | 56712, // VPINSRDZrmi |
| 89744 | 56716, // VPINSRDZrri |
| 89745 | 56720, // VPINSRDrmi |
| 89746 | 56724, // VPINSRDrri |
| 89747 | 56728, // VPINSRQZrmi |
| 89748 | 56732, // VPINSRQZrri |
| 89749 | 56736, // VPINSRQrmi |
| 89750 | 56740, // VPINSRQrri |
| 89751 | 56744, // VPINSRWZrmi |
| 89752 | 56748, // VPINSRWZrri |
| 89753 | 56752, // VPINSRWrmi |
| 89754 | 56756, // VPINSRWrri |
| 89755 | 56760, // VPLZCNTDZ128rm |
| 89756 | 56762, // VPLZCNTDZ128rmb |
| 89757 | 56764, // VPLZCNTDZ128rmbk |
| 89758 | 56768, // VPLZCNTDZ128rmbkz |
| 89759 | 56771, // VPLZCNTDZ128rmk |
| 89760 | 56775, // VPLZCNTDZ128rmkz |
| 89761 | 56778, // VPLZCNTDZ128rr |
| 89762 | 56780, // VPLZCNTDZ128rrk |
| 89763 | 56784, // VPLZCNTDZ128rrkz |
| 89764 | 56787, // VPLZCNTDZ256rm |
| 89765 | 56789, // VPLZCNTDZ256rmb |
| 89766 | 56791, // VPLZCNTDZ256rmbk |
| 89767 | 56795, // VPLZCNTDZ256rmbkz |
| 89768 | 56798, // VPLZCNTDZ256rmk |
| 89769 | 56802, // VPLZCNTDZ256rmkz |
| 89770 | 56805, // VPLZCNTDZ256rr |
| 89771 | 56807, // VPLZCNTDZ256rrk |
| 89772 | 56811, // VPLZCNTDZ256rrkz |
| 89773 | 56814, // VPLZCNTDZrm |
| 89774 | 56816, // VPLZCNTDZrmb |
| 89775 | 56818, // VPLZCNTDZrmbk |
| 89776 | 56822, // VPLZCNTDZrmbkz |
| 89777 | 56825, // VPLZCNTDZrmk |
| 89778 | 56829, // VPLZCNTDZrmkz |
| 89779 | 56832, // VPLZCNTDZrr |
| 89780 | 56834, // VPLZCNTDZrrk |
| 89781 | 56838, // VPLZCNTDZrrkz |
| 89782 | 56841, // VPLZCNTQZ128rm |
| 89783 | 56843, // VPLZCNTQZ128rmb |
| 89784 | 56845, // VPLZCNTQZ128rmbk |
| 89785 | 56849, // VPLZCNTQZ128rmbkz |
| 89786 | 56852, // VPLZCNTQZ128rmk |
| 89787 | 56856, // VPLZCNTQZ128rmkz |
| 89788 | 56859, // VPLZCNTQZ128rr |
| 89789 | 56861, // VPLZCNTQZ128rrk |
| 89790 | 56865, // VPLZCNTQZ128rrkz |
| 89791 | 56868, // VPLZCNTQZ256rm |
| 89792 | 56870, // VPLZCNTQZ256rmb |
| 89793 | 56872, // VPLZCNTQZ256rmbk |
| 89794 | 56876, // VPLZCNTQZ256rmbkz |
| 89795 | 56879, // VPLZCNTQZ256rmk |
| 89796 | 56883, // VPLZCNTQZ256rmkz |
| 89797 | 56886, // VPLZCNTQZ256rr |
| 89798 | 56888, // VPLZCNTQZ256rrk |
| 89799 | 56892, // VPLZCNTQZ256rrkz |
| 89800 | 56895, // VPLZCNTQZrm |
| 89801 | 56897, // VPLZCNTQZrmb |
| 89802 | 56899, // VPLZCNTQZrmbk |
| 89803 | 56903, // VPLZCNTQZrmbkz |
| 89804 | 56906, // VPLZCNTQZrmk |
| 89805 | 56910, // VPLZCNTQZrmkz |
| 89806 | 56913, // VPLZCNTQZrr |
| 89807 | 56915, // VPLZCNTQZrrk |
| 89808 | 56919, // VPLZCNTQZrrkz |
| 89809 | 56922, // VPMACSDDrm |
| 89810 | 56926, // VPMACSDDrr |
| 89811 | 56930, // VPMACSDQHrm |
| 89812 | 56934, // VPMACSDQHrr |
| 89813 | 56938, // VPMACSDQLrm |
| 89814 | 56942, // VPMACSDQLrr |
| 89815 | 56946, // VPMACSSDDrm |
| 89816 | 56950, // VPMACSSDDrr |
| 89817 | 56954, // VPMACSSDQHrm |
| 89818 | 56958, // VPMACSSDQHrr |
| 89819 | 56962, // VPMACSSDQLrm |
| 89820 | 56966, // VPMACSSDQLrr |
| 89821 | 56970, // VPMACSSWDrm |
| 89822 | 56974, // VPMACSSWDrr |
| 89823 | 56978, // VPMACSSWWrm |
| 89824 | 56982, // VPMACSSWWrr |
| 89825 | 56986, // VPMACSWDrm |
| 89826 | 56990, // VPMACSWDrr |
| 89827 | 56994, // VPMACSWWrm |
| 89828 | 56998, // VPMACSWWrr |
| 89829 | 57002, // VPMADCSSWDrm |
| 89830 | 57006, // VPMADCSSWDrr |
| 89831 | 57010, // VPMADCSWDrm |
| 89832 | 57014, // VPMADCSWDrr |
| 89833 | 57018, // VPMADD52HUQYrm |
| 89834 | 57022, // VPMADD52HUQYrr |
| 89835 | 57026, // VPMADD52HUQZ128m |
| 89836 | 57030, // VPMADD52HUQZ128mb |
| 89837 | 57034, // VPMADD52HUQZ128mbk |
| 89838 | 57039, // VPMADD52HUQZ128mbkz |
| 89839 | 57044, // VPMADD52HUQZ128mk |
| 89840 | 57049, // VPMADD52HUQZ128mkz |
| 89841 | 57054, // VPMADD52HUQZ128r |
| 89842 | 57058, // VPMADD52HUQZ128rk |
| 89843 | 57063, // VPMADD52HUQZ128rkz |
| 89844 | 57068, // VPMADD52HUQZ256m |
| 89845 | 57072, // VPMADD52HUQZ256mb |
| 89846 | 57076, // VPMADD52HUQZ256mbk |
| 89847 | 57081, // VPMADD52HUQZ256mbkz |
| 89848 | 57086, // VPMADD52HUQZ256mk |
| 89849 | 57091, // VPMADD52HUQZ256mkz |
| 89850 | 57096, // VPMADD52HUQZ256r |
| 89851 | 57100, // VPMADD52HUQZ256rk |
| 89852 | 57105, // VPMADD52HUQZ256rkz |
| 89853 | 57110, // VPMADD52HUQZm |
| 89854 | 57114, // VPMADD52HUQZmb |
| 89855 | 57118, // VPMADD52HUQZmbk |
| 89856 | 57123, // VPMADD52HUQZmbkz |
| 89857 | 57128, // VPMADD52HUQZmk |
| 89858 | 57133, // VPMADD52HUQZmkz |
| 89859 | 57138, // VPMADD52HUQZr |
| 89860 | 57142, // VPMADD52HUQZrk |
| 89861 | 57147, // VPMADD52HUQZrkz |
| 89862 | 57152, // VPMADD52HUQrm |
| 89863 | 57156, // VPMADD52HUQrr |
| 89864 | 57160, // VPMADD52LUQYrm |
| 89865 | 57164, // VPMADD52LUQYrr |
| 89866 | 57168, // VPMADD52LUQZ128m |
| 89867 | 57172, // VPMADD52LUQZ128mb |
| 89868 | 57176, // VPMADD52LUQZ128mbk |
| 89869 | 57181, // VPMADD52LUQZ128mbkz |
| 89870 | 57186, // VPMADD52LUQZ128mk |
| 89871 | 57191, // VPMADD52LUQZ128mkz |
| 89872 | 57196, // VPMADD52LUQZ128r |
| 89873 | 57200, // VPMADD52LUQZ128rk |
| 89874 | 57205, // VPMADD52LUQZ128rkz |
| 89875 | 57210, // VPMADD52LUQZ256m |
| 89876 | 57214, // VPMADD52LUQZ256mb |
| 89877 | 57218, // VPMADD52LUQZ256mbk |
| 89878 | 57223, // VPMADD52LUQZ256mbkz |
| 89879 | 57228, // VPMADD52LUQZ256mk |
| 89880 | 57233, // VPMADD52LUQZ256mkz |
| 89881 | 57238, // VPMADD52LUQZ256r |
| 89882 | 57242, // VPMADD52LUQZ256rk |
| 89883 | 57247, // VPMADD52LUQZ256rkz |
| 89884 | 57252, // VPMADD52LUQZm |
| 89885 | 57256, // VPMADD52LUQZmb |
| 89886 | 57260, // VPMADD52LUQZmbk |
| 89887 | 57265, // VPMADD52LUQZmbkz |
| 89888 | 57270, // VPMADD52LUQZmk |
| 89889 | 57275, // VPMADD52LUQZmkz |
| 89890 | 57280, // VPMADD52LUQZr |
| 89891 | 57284, // VPMADD52LUQZrk |
| 89892 | 57289, // VPMADD52LUQZrkz |
| 89893 | 57294, // VPMADD52LUQrm |
| 89894 | 57298, // VPMADD52LUQrr |
| 89895 | 57302, // VPMADDUBSWYrm |
| 89896 | 57305, // VPMADDUBSWYrr |
| 89897 | 57308, // VPMADDUBSWZ128rm |
| 89898 | 57311, // VPMADDUBSWZ128rmk |
| 89899 | 57316, // VPMADDUBSWZ128rmkz |
| 89900 | 57320, // VPMADDUBSWZ128rr |
| 89901 | 57323, // VPMADDUBSWZ128rrk |
| 89902 | 57328, // VPMADDUBSWZ128rrkz |
| 89903 | 57332, // VPMADDUBSWZ256rm |
| 89904 | 57335, // VPMADDUBSWZ256rmk |
| 89905 | 57340, // VPMADDUBSWZ256rmkz |
| 89906 | 57344, // VPMADDUBSWZ256rr |
| 89907 | 57347, // VPMADDUBSWZ256rrk |
| 89908 | 57352, // VPMADDUBSWZ256rrkz |
| 89909 | 57356, // VPMADDUBSWZrm |
| 89910 | 57359, // VPMADDUBSWZrmk |
| 89911 | 57364, // VPMADDUBSWZrmkz |
| 89912 | 57368, // VPMADDUBSWZrr |
| 89913 | 57371, // VPMADDUBSWZrrk |
| 89914 | 57376, // VPMADDUBSWZrrkz |
| 89915 | 57380, // VPMADDUBSWrm |
| 89916 | 57383, // VPMADDUBSWrr |
| 89917 | 57386, // VPMADDWDYrm |
| 89918 | 57389, // VPMADDWDYrr |
| 89919 | 57392, // VPMADDWDZ128rm |
| 89920 | 57395, // VPMADDWDZ128rmk |
| 89921 | 57400, // VPMADDWDZ128rmkz |
| 89922 | 57404, // VPMADDWDZ128rr |
| 89923 | 57407, // VPMADDWDZ128rrk |
| 89924 | 57412, // VPMADDWDZ128rrkz |
| 89925 | 57416, // VPMADDWDZ256rm |
| 89926 | 57419, // VPMADDWDZ256rmk |
| 89927 | 57424, // VPMADDWDZ256rmkz |
| 89928 | 57428, // VPMADDWDZ256rr |
| 89929 | 57431, // VPMADDWDZ256rrk |
| 89930 | 57436, // VPMADDWDZ256rrkz |
| 89931 | 57440, // VPMADDWDZrm |
| 89932 | 57443, // VPMADDWDZrmk |
| 89933 | 57448, // VPMADDWDZrmkz |
| 89934 | 57452, // VPMADDWDZrr |
| 89935 | 57455, // VPMADDWDZrrk |
| 89936 | 57460, // VPMADDWDZrrkz |
| 89937 | 57464, // VPMADDWDrm |
| 89938 | 57467, // VPMADDWDrr |
| 89939 | 57470, // VPMASKMOVDYmr |
| 89940 | 57473, // VPMASKMOVDYrm |
| 89941 | 57476, // VPMASKMOVDmr |
| 89942 | 57479, // VPMASKMOVDrm |
| 89943 | 57482, // VPMASKMOVQYmr |
| 89944 | 57485, // VPMASKMOVQYrm |
| 89945 | 57488, // VPMASKMOVQmr |
| 89946 | 57491, // VPMASKMOVQrm |
| 89947 | 57494, // VPMAXSBYrm |
| 89948 | 57497, // VPMAXSBYrr |
| 89949 | 57500, // VPMAXSBZ128rm |
| 89950 | 57503, // VPMAXSBZ128rmk |
| 89951 | 57508, // VPMAXSBZ128rmkz |
| 89952 | 57512, // VPMAXSBZ128rr |
| 89953 | 57515, // VPMAXSBZ128rrk |
| 89954 | 57520, // VPMAXSBZ128rrkz |
| 89955 | 57524, // VPMAXSBZ256rm |
| 89956 | 57527, // VPMAXSBZ256rmk |
| 89957 | 57532, // VPMAXSBZ256rmkz |
| 89958 | 57536, // VPMAXSBZ256rr |
| 89959 | 57539, // VPMAXSBZ256rrk |
| 89960 | 57544, // VPMAXSBZ256rrkz |
| 89961 | 57548, // VPMAXSBZrm |
| 89962 | 57551, // VPMAXSBZrmk |
| 89963 | 57556, // VPMAXSBZrmkz |
| 89964 | 57560, // VPMAXSBZrr |
| 89965 | 57563, // VPMAXSBZrrk |
| 89966 | 57568, // VPMAXSBZrrkz |
| 89967 | 57572, // VPMAXSBrm |
| 89968 | 57575, // VPMAXSBrr |
| 89969 | 57578, // VPMAXSDYrm |
| 89970 | 57581, // VPMAXSDYrr |
| 89971 | 57584, // VPMAXSDZ128rm |
| 89972 | 57587, // VPMAXSDZ128rmb |
| 89973 | 57590, // VPMAXSDZ128rmbk |
| 89974 | 57595, // VPMAXSDZ128rmbkz |
| 89975 | 57599, // VPMAXSDZ128rmk |
| 89976 | 57604, // VPMAXSDZ128rmkz |
| 89977 | 57608, // VPMAXSDZ128rr |
| 89978 | 57611, // VPMAXSDZ128rrk |
| 89979 | 57616, // VPMAXSDZ128rrkz |
| 89980 | 57620, // VPMAXSDZ256rm |
| 89981 | 57623, // VPMAXSDZ256rmb |
| 89982 | 57626, // VPMAXSDZ256rmbk |
| 89983 | 57631, // VPMAXSDZ256rmbkz |
| 89984 | 57635, // VPMAXSDZ256rmk |
| 89985 | 57640, // VPMAXSDZ256rmkz |
| 89986 | 57644, // VPMAXSDZ256rr |
| 89987 | 57647, // VPMAXSDZ256rrk |
| 89988 | 57652, // VPMAXSDZ256rrkz |
| 89989 | 57656, // VPMAXSDZrm |
| 89990 | 57659, // VPMAXSDZrmb |
| 89991 | 57662, // VPMAXSDZrmbk |
| 89992 | 57667, // VPMAXSDZrmbkz |
| 89993 | 57671, // VPMAXSDZrmk |
| 89994 | 57676, // VPMAXSDZrmkz |
| 89995 | 57680, // VPMAXSDZrr |
| 89996 | 57683, // VPMAXSDZrrk |
| 89997 | 57688, // VPMAXSDZrrkz |
| 89998 | 57692, // VPMAXSDrm |
| 89999 | 57695, // VPMAXSDrr |
| 90000 | 57698, // VPMAXSQZ128rm |
| 90001 | 57701, // VPMAXSQZ128rmb |
| 90002 | 57704, // VPMAXSQZ128rmbk |
| 90003 | 57709, // VPMAXSQZ128rmbkz |
| 90004 | 57713, // VPMAXSQZ128rmk |
| 90005 | 57718, // VPMAXSQZ128rmkz |
| 90006 | 57722, // VPMAXSQZ128rr |
| 90007 | 57725, // VPMAXSQZ128rrk |
| 90008 | 57730, // VPMAXSQZ128rrkz |
| 90009 | 57734, // VPMAXSQZ256rm |
| 90010 | 57737, // VPMAXSQZ256rmb |
| 90011 | 57740, // VPMAXSQZ256rmbk |
| 90012 | 57745, // VPMAXSQZ256rmbkz |
| 90013 | 57749, // VPMAXSQZ256rmk |
| 90014 | 57754, // VPMAXSQZ256rmkz |
| 90015 | 57758, // VPMAXSQZ256rr |
| 90016 | 57761, // VPMAXSQZ256rrk |
| 90017 | 57766, // VPMAXSQZ256rrkz |
| 90018 | 57770, // VPMAXSQZrm |
| 90019 | 57773, // VPMAXSQZrmb |
| 90020 | 57776, // VPMAXSQZrmbk |
| 90021 | 57781, // VPMAXSQZrmbkz |
| 90022 | 57785, // VPMAXSQZrmk |
| 90023 | 57790, // VPMAXSQZrmkz |
| 90024 | 57794, // VPMAXSQZrr |
| 90025 | 57797, // VPMAXSQZrrk |
| 90026 | 57802, // VPMAXSQZrrkz |
| 90027 | 57806, // VPMAXSWYrm |
| 90028 | 57809, // VPMAXSWYrr |
| 90029 | 57812, // VPMAXSWZ128rm |
| 90030 | 57815, // VPMAXSWZ128rmk |
| 90031 | 57820, // VPMAXSWZ128rmkz |
| 90032 | 57824, // VPMAXSWZ128rr |
| 90033 | 57827, // VPMAXSWZ128rrk |
| 90034 | 57832, // VPMAXSWZ128rrkz |
| 90035 | 57836, // VPMAXSWZ256rm |
| 90036 | 57839, // VPMAXSWZ256rmk |
| 90037 | 57844, // VPMAXSWZ256rmkz |
| 90038 | 57848, // VPMAXSWZ256rr |
| 90039 | 57851, // VPMAXSWZ256rrk |
| 90040 | 57856, // VPMAXSWZ256rrkz |
| 90041 | 57860, // VPMAXSWZrm |
| 90042 | 57863, // VPMAXSWZrmk |
| 90043 | 57868, // VPMAXSWZrmkz |
| 90044 | 57872, // VPMAXSWZrr |
| 90045 | 57875, // VPMAXSWZrrk |
| 90046 | 57880, // VPMAXSWZrrkz |
| 90047 | 57884, // VPMAXSWrm |
| 90048 | 57887, // VPMAXSWrr |
| 90049 | 57890, // VPMAXUBYrm |
| 90050 | 57893, // VPMAXUBYrr |
| 90051 | 57896, // VPMAXUBZ128rm |
| 90052 | 57899, // VPMAXUBZ128rmk |
| 90053 | 57904, // VPMAXUBZ128rmkz |
| 90054 | 57908, // VPMAXUBZ128rr |
| 90055 | 57911, // VPMAXUBZ128rrk |
| 90056 | 57916, // VPMAXUBZ128rrkz |
| 90057 | 57920, // VPMAXUBZ256rm |
| 90058 | 57923, // VPMAXUBZ256rmk |
| 90059 | 57928, // VPMAXUBZ256rmkz |
| 90060 | 57932, // VPMAXUBZ256rr |
| 90061 | 57935, // VPMAXUBZ256rrk |
| 90062 | 57940, // VPMAXUBZ256rrkz |
| 90063 | 57944, // VPMAXUBZrm |
| 90064 | 57947, // VPMAXUBZrmk |
| 90065 | 57952, // VPMAXUBZrmkz |
| 90066 | 57956, // VPMAXUBZrr |
| 90067 | 57959, // VPMAXUBZrrk |
| 90068 | 57964, // VPMAXUBZrrkz |
| 90069 | 57968, // VPMAXUBrm |
| 90070 | 57971, // VPMAXUBrr |
| 90071 | 57974, // VPMAXUDYrm |
| 90072 | 57977, // VPMAXUDYrr |
| 90073 | 57980, // VPMAXUDZ128rm |
| 90074 | 57983, // VPMAXUDZ128rmb |
| 90075 | 57986, // VPMAXUDZ128rmbk |
| 90076 | 57991, // VPMAXUDZ128rmbkz |
| 90077 | 57995, // VPMAXUDZ128rmk |
| 90078 | 58000, // VPMAXUDZ128rmkz |
| 90079 | 58004, // VPMAXUDZ128rr |
| 90080 | 58007, // VPMAXUDZ128rrk |
| 90081 | 58012, // VPMAXUDZ128rrkz |
| 90082 | 58016, // VPMAXUDZ256rm |
| 90083 | 58019, // VPMAXUDZ256rmb |
| 90084 | 58022, // VPMAXUDZ256rmbk |
| 90085 | 58027, // VPMAXUDZ256rmbkz |
| 90086 | 58031, // VPMAXUDZ256rmk |
| 90087 | 58036, // VPMAXUDZ256rmkz |
| 90088 | 58040, // VPMAXUDZ256rr |
| 90089 | 58043, // VPMAXUDZ256rrk |
| 90090 | 58048, // VPMAXUDZ256rrkz |
| 90091 | 58052, // VPMAXUDZrm |
| 90092 | 58055, // VPMAXUDZrmb |
| 90093 | 58058, // VPMAXUDZrmbk |
| 90094 | 58063, // VPMAXUDZrmbkz |
| 90095 | 58067, // VPMAXUDZrmk |
| 90096 | 58072, // VPMAXUDZrmkz |
| 90097 | 58076, // VPMAXUDZrr |
| 90098 | 58079, // VPMAXUDZrrk |
| 90099 | 58084, // VPMAXUDZrrkz |
| 90100 | 58088, // VPMAXUDrm |
| 90101 | 58091, // VPMAXUDrr |
| 90102 | 58094, // VPMAXUQZ128rm |
| 90103 | 58097, // VPMAXUQZ128rmb |
| 90104 | 58100, // VPMAXUQZ128rmbk |
| 90105 | 58105, // VPMAXUQZ128rmbkz |
| 90106 | 58109, // VPMAXUQZ128rmk |
| 90107 | 58114, // VPMAXUQZ128rmkz |
| 90108 | 58118, // VPMAXUQZ128rr |
| 90109 | 58121, // VPMAXUQZ128rrk |
| 90110 | 58126, // VPMAXUQZ128rrkz |
| 90111 | 58130, // VPMAXUQZ256rm |
| 90112 | 58133, // VPMAXUQZ256rmb |
| 90113 | 58136, // VPMAXUQZ256rmbk |
| 90114 | 58141, // VPMAXUQZ256rmbkz |
| 90115 | 58145, // VPMAXUQZ256rmk |
| 90116 | 58150, // VPMAXUQZ256rmkz |
| 90117 | 58154, // VPMAXUQZ256rr |
| 90118 | 58157, // VPMAXUQZ256rrk |
| 90119 | 58162, // VPMAXUQZ256rrkz |
| 90120 | 58166, // VPMAXUQZrm |
| 90121 | 58169, // VPMAXUQZrmb |
| 90122 | 58172, // VPMAXUQZrmbk |
| 90123 | 58177, // VPMAXUQZrmbkz |
| 90124 | 58181, // VPMAXUQZrmk |
| 90125 | 58186, // VPMAXUQZrmkz |
| 90126 | 58190, // VPMAXUQZrr |
| 90127 | 58193, // VPMAXUQZrrk |
| 90128 | 58198, // VPMAXUQZrrkz |
| 90129 | 58202, // VPMAXUWYrm |
| 90130 | 58205, // VPMAXUWYrr |
| 90131 | 58208, // VPMAXUWZ128rm |
| 90132 | 58211, // VPMAXUWZ128rmk |
| 90133 | 58216, // VPMAXUWZ128rmkz |
| 90134 | 58220, // VPMAXUWZ128rr |
| 90135 | 58223, // VPMAXUWZ128rrk |
| 90136 | 58228, // VPMAXUWZ128rrkz |
| 90137 | 58232, // VPMAXUWZ256rm |
| 90138 | 58235, // VPMAXUWZ256rmk |
| 90139 | 58240, // VPMAXUWZ256rmkz |
| 90140 | 58244, // VPMAXUWZ256rr |
| 90141 | 58247, // VPMAXUWZ256rrk |
| 90142 | 58252, // VPMAXUWZ256rrkz |
| 90143 | 58256, // VPMAXUWZrm |
| 90144 | 58259, // VPMAXUWZrmk |
| 90145 | 58264, // VPMAXUWZrmkz |
| 90146 | 58268, // VPMAXUWZrr |
| 90147 | 58271, // VPMAXUWZrrk |
| 90148 | 58276, // VPMAXUWZrrkz |
| 90149 | 58280, // VPMAXUWrm |
| 90150 | 58283, // VPMAXUWrr |
| 90151 | 58286, // VPMINSBYrm |
| 90152 | 58289, // VPMINSBYrr |
| 90153 | 58292, // VPMINSBZ128rm |
| 90154 | 58295, // VPMINSBZ128rmk |
| 90155 | 58300, // VPMINSBZ128rmkz |
| 90156 | 58304, // VPMINSBZ128rr |
| 90157 | 58307, // VPMINSBZ128rrk |
| 90158 | 58312, // VPMINSBZ128rrkz |
| 90159 | 58316, // VPMINSBZ256rm |
| 90160 | 58319, // VPMINSBZ256rmk |
| 90161 | 58324, // VPMINSBZ256rmkz |
| 90162 | 58328, // VPMINSBZ256rr |
| 90163 | 58331, // VPMINSBZ256rrk |
| 90164 | 58336, // VPMINSBZ256rrkz |
| 90165 | 58340, // VPMINSBZrm |
| 90166 | 58343, // VPMINSBZrmk |
| 90167 | 58348, // VPMINSBZrmkz |
| 90168 | 58352, // VPMINSBZrr |
| 90169 | 58355, // VPMINSBZrrk |
| 90170 | 58360, // VPMINSBZrrkz |
| 90171 | 58364, // VPMINSBrm |
| 90172 | 58367, // VPMINSBrr |
| 90173 | 58370, // VPMINSDYrm |
| 90174 | 58373, // VPMINSDYrr |
| 90175 | 58376, // VPMINSDZ128rm |
| 90176 | 58379, // VPMINSDZ128rmb |
| 90177 | 58382, // VPMINSDZ128rmbk |
| 90178 | 58387, // VPMINSDZ128rmbkz |
| 90179 | 58391, // VPMINSDZ128rmk |
| 90180 | 58396, // VPMINSDZ128rmkz |
| 90181 | 58400, // VPMINSDZ128rr |
| 90182 | 58403, // VPMINSDZ128rrk |
| 90183 | 58408, // VPMINSDZ128rrkz |
| 90184 | 58412, // VPMINSDZ256rm |
| 90185 | 58415, // VPMINSDZ256rmb |
| 90186 | 58418, // VPMINSDZ256rmbk |
| 90187 | 58423, // VPMINSDZ256rmbkz |
| 90188 | 58427, // VPMINSDZ256rmk |
| 90189 | 58432, // VPMINSDZ256rmkz |
| 90190 | 58436, // VPMINSDZ256rr |
| 90191 | 58439, // VPMINSDZ256rrk |
| 90192 | 58444, // VPMINSDZ256rrkz |
| 90193 | 58448, // VPMINSDZrm |
| 90194 | 58451, // VPMINSDZrmb |
| 90195 | 58454, // VPMINSDZrmbk |
| 90196 | 58459, // VPMINSDZrmbkz |
| 90197 | 58463, // VPMINSDZrmk |
| 90198 | 58468, // VPMINSDZrmkz |
| 90199 | 58472, // VPMINSDZrr |
| 90200 | 58475, // VPMINSDZrrk |
| 90201 | 58480, // VPMINSDZrrkz |
| 90202 | 58484, // VPMINSDrm |
| 90203 | 58487, // VPMINSDrr |
| 90204 | 58490, // VPMINSQZ128rm |
| 90205 | 58493, // VPMINSQZ128rmb |
| 90206 | 58496, // VPMINSQZ128rmbk |
| 90207 | 58501, // VPMINSQZ128rmbkz |
| 90208 | 58505, // VPMINSQZ128rmk |
| 90209 | 58510, // VPMINSQZ128rmkz |
| 90210 | 58514, // VPMINSQZ128rr |
| 90211 | 58517, // VPMINSQZ128rrk |
| 90212 | 58522, // VPMINSQZ128rrkz |
| 90213 | 58526, // VPMINSQZ256rm |
| 90214 | 58529, // VPMINSQZ256rmb |
| 90215 | 58532, // VPMINSQZ256rmbk |
| 90216 | 58537, // VPMINSQZ256rmbkz |
| 90217 | 58541, // VPMINSQZ256rmk |
| 90218 | 58546, // VPMINSQZ256rmkz |
| 90219 | 58550, // VPMINSQZ256rr |
| 90220 | 58553, // VPMINSQZ256rrk |
| 90221 | 58558, // VPMINSQZ256rrkz |
| 90222 | 58562, // VPMINSQZrm |
| 90223 | 58565, // VPMINSQZrmb |
| 90224 | 58568, // VPMINSQZrmbk |
| 90225 | 58573, // VPMINSQZrmbkz |
| 90226 | 58577, // VPMINSQZrmk |
| 90227 | 58582, // VPMINSQZrmkz |
| 90228 | 58586, // VPMINSQZrr |
| 90229 | 58589, // VPMINSQZrrk |
| 90230 | 58594, // VPMINSQZrrkz |
| 90231 | 58598, // VPMINSWYrm |
| 90232 | 58601, // VPMINSWYrr |
| 90233 | 58604, // VPMINSWZ128rm |
| 90234 | 58607, // VPMINSWZ128rmk |
| 90235 | 58612, // VPMINSWZ128rmkz |
| 90236 | 58616, // VPMINSWZ128rr |
| 90237 | 58619, // VPMINSWZ128rrk |
| 90238 | 58624, // VPMINSWZ128rrkz |
| 90239 | 58628, // VPMINSWZ256rm |
| 90240 | 58631, // VPMINSWZ256rmk |
| 90241 | 58636, // VPMINSWZ256rmkz |
| 90242 | 58640, // VPMINSWZ256rr |
| 90243 | 58643, // VPMINSWZ256rrk |
| 90244 | 58648, // VPMINSWZ256rrkz |
| 90245 | 58652, // VPMINSWZrm |
| 90246 | 58655, // VPMINSWZrmk |
| 90247 | 58660, // VPMINSWZrmkz |
| 90248 | 58664, // VPMINSWZrr |
| 90249 | 58667, // VPMINSWZrrk |
| 90250 | 58672, // VPMINSWZrrkz |
| 90251 | 58676, // VPMINSWrm |
| 90252 | 58679, // VPMINSWrr |
| 90253 | 58682, // VPMINUBYrm |
| 90254 | 58685, // VPMINUBYrr |
| 90255 | 58688, // VPMINUBZ128rm |
| 90256 | 58691, // VPMINUBZ128rmk |
| 90257 | 58696, // VPMINUBZ128rmkz |
| 90258 | 58700, // VPMINUBZ128rr |
| 90259 | 58703, // VPMINUBZ128rrk |
| 90260 | 58708, // VPMINUBZ128rrkz |
| 90261 | 58712, // VPMINUBZ256rm |
| 90262 | 58715, // VPMINUBZ256rmk |
| 90263 | 58720, // VPMINUBZ256rmkz |
| 90264 | 58724, // VPMINUBZ256rr |
| 90265 | 58727, // VPMINUBZ256rrk |
| 90266 | 58732, // VPMINUBZ256rrkz |
| 90267 | 58736, // VPMINUBZrm |
| 90268 | 58739, // VPMINUBZrmk |
| 90269 | 58744, // VPMINUBZrmkz |
| 90270 | 58748, // VPMINUBZrr |
| 90271 | 58751, // VPMINUBZrrk |
| 90272 | 58756, // VPMINUBZrrkz |
| 90273 | 58760, // VPMINUBrm |
| 90274 | 58763, // VPMINUBrr |
| 90275 | 58766, // VPMINUDYrm |
| 90276 | 58769, // VPMINUDYrr |
| 90277 | 58772, // VPMINUDZ128rm |
| 90278 | 58775, // VPMINUDZ128rmb |
| 90279 | 58778, // VPMINUDZ128rmbk |
| 90280 | 58783, // VPMINUDZ128rmbkz |
| 90281 | 58787, // VPMINUDZ128rmk |
| 90282 | 58792, // VPMINUDZ128rmkz |
| 90283 | 58796, // VPMINUDZ128rr |
| 90284 | 58799, // VPMINUDZ128rrk |
| 90285 | 58804, // VPMINUDZ128rrkz |
| 90286 | 58808, // VPMINUDZ256rm |
| 90287 | 58811, // VPMINUDZ256rmb |
| 90288 | 58814, // VPMINUDZ256rmbk |
| 90289 | 58819, // VPMINUDZ256rmbkz |
| 90290 | 58823, // VPMINUDZ256rmk |
| 90291 | 58828, // VPMINUDZ256rmkz |
| 90292 | 58832, // VPMINUDZ256rr |
| 90293 | 58835, // VPMINUDZ256rrk |
| 90294 | 58840, // VPMINUDZ256rrkz |
| 90295 | 58844, // VPMINUDZrm |
| 90296 | 58847, // VPMINUDZrmb |
| 90297 | 58850, // VPMINUDZrmbk |
| 90298 | 58855, // VPMINUDZrmbkz |
| 90299 | 58859, // VPMINUDZrmk |
| 90300 | 58864, // VPMINUDZrmkz |
| 90301 | 58868, // VPMINUDZrr |
| 90302 | 58871, // VPMINUDZrrk |
| 90303 | 58876, // VPMINUDZrrkz |
| 90304 | 58880, // VPMINUDrm |
| 90305 | 58883, // VPMINUDrr |
| 90306 | 58886, // VPMINUQZ128rm |
| 90307 | 58889, // VPMINUQZ128rmb |
| 90308 | 58892, // VPMINUQZ128rmbk |
| 90309 | 58897, // VPMINUQZ128rmbkz |
| 90310 | 58901, // VPMINUQZ128rmk |
| 90311 | 58906, // VPMINUQZ128rmkz |
| 90312 | 58910, // VPMINUQZ128rr |
| 90313 | 58913, // VPMINUQZ128rrk |
| 90314 | 58918, // VPMINUQZ128rrkz |
| 90315 | 58922, // VPMINUQZ256rm |
| 90316 | 58925, // VPMINUQZ256rmb |
| 90317 | 58928, // VPMINUQZ256rmbk |
| 90318 | 58933, // VPMINUQZ256rmbkz |
| 90319 | 58937, // VPMINUQZ256rmk |
| 90320 | 58942, // VPMINUQZ256rmkz |
| 90321 | 58946, // VPMINUQZ256rr |
| 90322 | 58949, // VPMINUQZ256rrk |
| 90323 | 58954, // VPMINUQZ256rrkz |
| 90324 | 58958, // VPMINUQZrm |
| 90325 | 58961, // VPMINUQZrmb |
| 90326 | 58964, // VPMINUQZrmbk |
| 90327 | 58969, // VPMINUQZrmbkz |
| 90328 | 58973, // VPMINUQZrmk |
| 90329 | 58978, // VPMINUQZrmkz |
| 90330 | 58982, // VPMINUQZrr |
| 90331 | 58985, // VPMINUQZrrk |
| 90332 | 58990, // VPMINUQZrrkz |
| 90333 | 58994, // VPMINUWYrm |
| 90334 | 58997, // VPMINUWYrr |
| 90335 | 59000, // VPMINUWZ128rm |
| 90336 | 59003, // VPMINUWZ128rmk |
| 90337 | 59008, // VPMINUWZ128rmkz |
| 90338 | 59012, // VPMINUWZ128rr |
| 90339 | 59015, // VPMINUWZ128rrk |
| 90340 | 59020, // VPMINUWZ128rrkz |
| 90341 | 59024, // VPMINUWZ256rm |
| 90342 | 59027, // VPMINUWZ256rmk |
| 90343 | 59032, // VPMINUWZ256rmkz |
| 90344 | 59036, // VPMINUWZ256rr |
| 90345 | 59039, // VPMINUWZ256rrk |
| 90346 | 59044, // VPMINUWZ256rrkz |
| 90347 | 59048, // VPMINUWZrm |
| 90348 | 59051, // VPMINUWZrmk |
| 90349 | 59056, // VPMINUWZrmkz |
| 90350 | 59060, // VPMINUWZrr |
| 90351 | 59063, // VPMINUWZrrk |
| 90352 | 59068, // VPMINUWZrrkz |
| 90353 | 59072, // VPMINUWrm |
| 90354 | 59075, // VPMINUWrr |
| 90355 | 59078, // VPMOVB2MZ128kr |
| 90356 | 59080, // VPMOVB2MZ256kr |
| 90357 | 59082, // VPMOVB2MZkr |
| 90358 | 59084, // VPMOVD2MZ128kr |
| 90359 | 59086, // VPMOVD2MZ256kr |
| 90360 | 59088, // VPMOVD2MZkr |
| 90361 | 59090, // VPMOVDBZ128mr |
| 90362 | 59092, // VPMOVDBZ128mrk |
| 90363 | 59095, // VPMOVDBZ128rr |
| 90364 | 59097, // VPMOVDBZ128rrk |
| 90365 | 59101, // VPMOVDBZ128rrkz |
| 90366 | 59104, // VPMOVDBZ256mr |
| 90367 | 59106, // VPMOVDBZ256mrk |
| 90368 | 59109, // VPMOVDBZ256rr |
| 90369 | 59111, // VPMOVDBZ256rrk |
| 90370 | 59115, // VPMOVDBZ256rrkz |
| 90371 | 59118, // VPMOVDBZmr |
| 90372 | 59120, // VPMOVDBZmrk |
| 90373 | 59123, // VPMOVDBZrr |
| 90374 | 59125, // VPMOVDBZrrk |
| 90375 | 59129, // VPMOVDBZrrkz |
| 90376 | 59132, // VPMOVDWZ128mr |
| 90377 | 59134, // VPMOVDWZ128mrk |
| 90378 | 59137, // VPMOVDWZ128rr |
| 90379 | 59139, // VPMOVDWZ128rrk |
| 90380 | 59143, // VPMOVDWZ128rrkz |
| 90381 | 59146, // VPMOVDWZ256mr |
| 90382 | 59148, // VPMOVDWZ256mrk |
| 90383 | 59151, // VPMOVDWZ256rr |
| 90384 | 59153, // VPMOVDWZ256rrk |
| 90385 | 59157, // VPMOVDWZ256rrkz |
| 90386 | 59160, // VPMOVDWZmr |
| 90387 | 59162, // VPMOVDWZmrk |
| 90388 | 59165, // VPMOVDWZrr |
| 90389 | 59167, // VPMOVDWZrrk |
| 90390 | 59171, // VPMOVDWZrrkz |
| 90391 | 59174, // VPMOVM2BZ128rk |
| 90392 | 59176, // VPMOVM2BZ256rk |
| 90393 | 59178, // VPMOVM2BZrk |
| 90394 | 59180, // VPMOVM2DZ128rk |
| 90395 | 59182, // VPMOVM2DZ256rk |
| 90396 | 59184, // VPMOVM2DZrk |
| 90397 | 59186, // VPMOVM2QZ128rk |
| 90398 | 59188, // VPMOVM2QZ256rk |
| 90399 | 59190, // VPMOVM2QZrk |
| 90400 | 59192, // VPMOVM2WZ128rk |
| 90401 | 59194, // VPMOVM2WZ256rk |
| 90402 | 59196, // VPMOVM2WZrk |
| 90403 | 59198, // VPMOVMSKBYrr |
| 90404 | 59200, // VPMOVMSKBrr |
| 90405 | 59202, // VPMOVQ2MZ128kr |
| 90406 | 59204, // VPMOVQ2MZ256kr |
| 90407 | 59206, // VPMOVQ2MZkr |
| 90408 | 59208, // VPMOVQBZ128mr |
| 90409 | 59210, // VPMOVQBZ128mrk |
| 90410 | 59213, // VPMOVQBZ128rr |
| 90411 | 59215, // VPMOVQBZ128rrk |
| 90412 | 59219, // VPMOVQBZ128rrkz |
| 90413 | 59222, // VPMOVQBZ256mr |
| 90414 | 59224, // VPMOVQBZ256mrk |
| 90415 | 59227, // VPMOVQBZ256rr |
| 90416 | 59229, // VPMOVQBZ256rrk |
| 90417 | 59233, // VPMOVQBZ256rrkz |
| 90418 | 59236, // VPMOVQBZmr |
| 90419 | 59238, // VPMOVQBZmrk |
| 90420 | 59241, // VPMOVQBZrr |
| 90421 | 59243, // VPMOVQBZrrk |
| 90422 | 59247, // VPMOVQBZrrkz |
| 90423 | 59250, // VPMOVQDZ128mr |
| 90424 | 59252, // VPMOVQDZ128mrk |
| 90425 | 59255, // VPMOVQDZ128rr |
| 90426 | 59257, // VPMOVQDZ128rrk |
| 90427 | 59261, // VPMOVQDZ128rrkz |
| 90428 | 59264, // VPMOVQDZ256mr |
| 90429 | 59266, // VPMOVQDZ256mrk |
| 90430 | 59269, // VPMOVQDZ256rr |
| 90431 | 59271, // VPMOVQDZ256rrk |
| 90432 | 59275, // VPMOVQDZ256rrkz |
| 90433 | 59278, // VPMOVQDZmr |
| 90434 | 59280, // VPMOVQDZmrk |
| 90435 | 59283, // VPMOVQDZrr |
| 90436 | 59285, // VPMOVQDZrrk |
| 90437 | 59289, // VPMOVQDZrrkz |
| 90438 | 59292, // VPMOVQWZ128mr |
| 90439 | 59294, // VPMOVQWZ128mrk |
| 90440 | 59297, // VPMOVQWZ128rr |
| 90441 | 59299, // VPMOVQWZ128rrk |
| 90442 | 59303, // VPMOVQWZ128rrkz |
| 90443 | 59306, // VPMOVQWZ256mr |
| 90444 | 59308, // VPMOVQWZ256mrk |
| 90445 | 59311, // VPMOVQWZ256rr |
| 90446 | 59313, // VPMOVQWZ256rrk |
| 90447 | 59317, // VPMOVQWZ256rrkz |
| 90448 | 59320, // VPMOVQWZmr |
| 90449 | 59322, // VPMOVQWZmrk |
| 90450 | 59325, // VPMOVQWZrr |
| 90451 | 59327, // VPMOVQWZrrk |
| 90452 | 59331, // VPMOVQWZrrkz |
| 90453 | 59334, // VPMOVSDBZ128mr |
| 90454 | 59336, // VPMOVSDBZ128mrk |
| 90455 | 59339, // VPMOVSDBZ128rr |
| 90456 | 59341, // VPMOVSDBZ128rrk |
| 90457 | 59345, // VPMOVSDBZ128rrkz |
| 90458 | 59348, // VPMOVSDBZ256mr |
| 90459 | 59350, // VPMOVSDBZ256mrk |
| 90460 | 59353, // VPMOVSDBZ256rr |
| 90461 | 59355, // VPMOVSDBZ256rrk |
| 90462 | 59359, // VPMOVSDBZ256rrkz |
| 90463 | 59362, // VPMOVSDBZmr |
| 90464 | 59364, // VPMOVSDBZmrk |
| 90465 | 59367, // VPMOVSDBZrr |
| 90466 | 59369, // VPMOVSDBZrrk |
| 90467 | 59373, // VPMOVSDBZrrkz |
| 90468 | 59376, // VPMOVSDWZ128mr |
| 90469 | 59378, // VPMOVSDWZ128mrk |
| 90470 | 59381, // VPMOVSDWZ128rr |
| 90471 | 59383, // VPMOVSDWZ128rrk |
| 90472 | 59387, // VPMOVSDWZ128rrkz |
| 90473 | 59390, // VPMOVSDWZ256mr |
| 90474 | 59392, // VPMOVSDWZ256mrk |
| 90475 | 59395, // VPMOVSDWZ256rr |
| 90476 | 59397, // VPMOVSDWZ256rrk |
| 90477 | 59401, // VPMOVSDWZ256rrkz |
| 90478 | 59404, // VPMOVSDWZmr |
| 90479 | 59406, // VPMOVSDWZmrk |
| 90480 | 59409, // VPMOVSDWZrr |
| 90481 | 59411, // VPMOVSDWZrrk |
| 90482 | 59415, // VPMOVSDWZrrkz |
| 90483 | 59418, // VPMOVSQBZ128mr |
| 90484 | 59420, // VPMOVSQBZ128mrk |
| 90485 | 59423, // VPMOVSQBZ128rr |
| 90486 | 59425, // VPMOVSQBZ128rrk |
| 90487 | 59429, // VPMOVSQBZ128rrkz |
| 90488 | 59432, // VPMOVSQBZ256mr |
| 90489 | 59434, // VPMOVSQBZ256mrk |
| 90490 | 59437, // VPMOVSQBZ256rr |
| 90491 | 59439, // VPMOVSQBZ256rrk |
| 90492 | 59443, // VPMOVSQBZ256rrkz |
| 90493 | 59446, // VPMOVSQBZmr |
| 90494 | 59448, // VPMOVSQBZmrk |
| 90495 | 59451, // VPMOVSQBZrr |
| 90496 | 59453, // VPMOVSQBZrrk |
| 90497 | 59457, // VPMOVSQBZrrkz |
| 90498 | 59460, // VPMOVSQDZ128mr |
| 90499 | 59462, // VPMOVSQDZ128mrk |
| 90500 | 59465, // VPMOVSQDZ128rr |
| 90501 | 59467, // VPMOVSQDZ128rrk |
| 90502 | 59471, // VPMOVSQDZ128rrkz |
| 90503 | 59474, // VPMOVSQDZ256mr |
| 90504 | 59476, // VPMOVSQDZ256mrk |
| 90505 | 59479, // VPMOVSQDZ256rr |
| 90506 | 59481, // VPMOVSQDZ256rrk |
| 90507 | 59485, // VPMOVSQDZ256rrkz |
| 90508 | 59488, // VPMOVSQDZmr |
| 90509 | 59490, // VPMOVSQDZmrk |
| 90510 | 59493, // VPMOVSQDZrr |
| 90511 | 59495, // VPMOVSQDZrrk |
| 90512 | 59499, // VPMOVSQDZrrkz |
| 90513 | 59502, // VPMOVSQWZ128mr |
| 90514 | 59504, // VPMOVSQWZ128mrk |
| 90515 | 59507, // VPMOVSQWZ128rr |
| 90516 | 59509, // VPMOVSQWZ128rrk |
| 90517 | 59513, // VPMOVSQWZ128rrkz |
| 90518 | 59516, // VPMOVSQWZ256mr |
| 90519 | 59518, // VPMOVSQWZ256mrk |
| 90520 | 59521, // VPMOVSQWZ256rr |
| 90521 | 59523, // VPMOVSQWZ256rrk |
| 90522 | 59527, // VPMOVSQWZ256rrkz |
| 90523 | 59530, // VPMOVSQWZmr |
| 90524 | 59532, // VPMOVSQWZmrk |
| 90525 | 59535, // VPMOVSQWZrr |
| 90526 | 59537, // VPMOVSQWZrrk |
| 90527 | 59541, // VPMOVSQWZrrkz |
| 90528 | 59544, // VPMOVSWBZ128mr |
| 90529 | 59546, // VPMOVSWBZ128mrk |
| 90530 | 59549, // VPMOVSWBZ128rr |
| 90531 | 59551, // VPMOVSWBZ128rrk |
| 90532 | 59555, // VPMOVSWBZ128rrkz |
| 90533 | 59558, // VPMOVSWBZ256mr |
| 90534 | 59560, // VPMOVSWBZ256mrk |
| 90535 | 59563, // VPMOVSWBZ256rr |
| 90536 | 59565, // VPMOVSWBZ256rrk |
| 90537 | 59569, // VPMOVSWBZ256rrkz |
| 90538 | 59572, // VPMOVSWBZmr |
| 90539 | 59574, // VPMOVSWBZmrk |
| 90540 | 59577, // VPMOVSWBZrr |
| 90541 | 59579, // VPMOVSWBZrrk |
| 90542 | 59583, // VPMOVSWBZrrkz |
| 90543 | 59586, // VPMOVSXBDYrm |
| 90544 | 59588, // VPMOVSXBDYrr |
| 90545 | 59590, // VPMOVSXBDZ128rm |
| 90546 | 59592, // VPMOVSXBDZ128rmk |
| 90547 | 59596, // VPMOVSXBDZ128rmkz |
| 90548 | 59599, // VPMOVSXBDZ128rr |
| 90549 | 59601, // VPMOVSXBDZ128rrk |
| 90550 | 59605, // VPMOVSXBDZ128rrkz |
| 90551 | 59608, // VPMOVSXBDZ256rm |
| 90552 | 59610, // VPMOVSXBDZ256rmk |
| 90553 | 59614, // VPMOVSXBDZ256rmkz |
| 90554 | 59617, // VPMOVSXBDZ256rr |
| 90555 | 59619, // VPMOVSXBDZ256rrk |
| 90556 | 59623, // VPMOVSXBDZ256rrkz |
| 90557 | 59626, // VPMOVSXBDZrm |
| 90558 | 59628, // VPMOVSXBDZrmk |
| 90559 | 59632, // VPMOVSXBDZrmkz |
| 90560 | 59635, // VPMOVSXBDZrr |
| 90561 | 59637, // VPMOVSXBDZrrk |
| 90562 | 59641, // VPMOVSXBDZrrkz |
| 90563 | 59644, // VPMOVSXBDrm |
| 90564 | 59646, // VPMOVSXBDrr |
| 90565 | 59648, // VPMOVSXBQYrm |
| 90566 | 59650, // VPMOVSXBQYrr |
| 90567 | 59652, // VPMOVSXBQZ128rm |
| 90568 | 59654, // VPMOVSXBQZ128rmk |
| 90569 | 59658, // VPMOVSXBQZ128rmkz |
| 90570 | 59661, // VPMOVSXBQZ128rr |
| 90571 | 59663, // VPMOVSXBQZ128rrk |
| 90572 | 59667, // VPMOVSXBQZ128rrkz |
| 90573 | 59670, // VPMOVSXBQZ256rm |
| 90574 | 59672, // VPMOVSXBQZ256rmk |
| 90575 | 59676, // VPMOVSXBQZ256rmkz |
| 90576 | 59679, // VPMOVSXBQZ256rr |
| 90577 | 59681, // VPMOVSXBQZ256rrk |
| 90578 | 59685, // VPMOVSXBQZ256rrkz |
| 90579 | 59688, // VPMOVSXBQZrm |
| 90580 | 59690, // VPMOVSXBQZrmk |
| 90581 | 59694, // VPMOVSXBQZrmkz |
| 90582 | 59697, // VPMOVSXBQZrr |
| 90583 | 59699, // VPMOVSXBQZrrk |
| 90584 | 59703, // VPMOVSXBQZrrkz |
| 90585 | 59706, // VPMOVSXBQrm |
| 90586 | 59708, // VPMOVSXBQrr |
| 90587 | 59710, // VPMOVSXBWYrm |
| 90588 | 59712, // VPMOVSXBWYrr |
| 90589 | 59714, // VPMOVSXBWZ128rm |
| 90590 | 59716, // VPMOVSXBWZ128rmk |
| 90591 | 59720, // VPMOVSXBWZ128rmkz |
| 90592 | 59723, // VPMOVSXBWZ128rr |
| 90593 | 59725, // VPMOVSXBWZ128rrk |
| 90594 | 59729, // VPMOVSXBWZ128rrkz |
| 90595 | 59732, // VPMOVSXBWZ256rm |
| 90596 | 59734, // VPMOVSXBWZ256rmk |
| 90597 | 59738, // VPMOVSXBWZ256rmkz |
| 90598 | 59741, // VPMOVSXBWZ256rr |
| 90599 | 59743, // VPMOVSXBWZ256rrk |
| 90600 | 59747, // VPMOVSXBWZ256rrkz |
| 90601 | 59750, // VPMOVSXBWZrm |
| 90602 | 59752, // VPMOVSXBWZrmk |
| 90603 | 59756, // VPMOVSXBWZrmkz |
| 90604 | 59759, // VPMOVSXBWZrr |
| 90605 | 59761, // VPMOVSXBWZrrk |
| 90606 | 59765, // VPMOVSXBWZrrkz |
| 90607 | 59768, // VPMOVSXBWrm |
| 90608 | 59770, // VPMOVSXBWrr |
| 90609 | 59772, // VPMOVSXDQYrm |
| 90610 | 59774, // VPMOVSXDQYrr |
| 90611 | 59776, // VPMOVSXDQZ128rm |
| 90612 | 59778, // VPMOVSXDQZ128rmk |
| 90613 | 59782, // VPMOVSXDQZ128rmkz |
| 90614 | 59785, // VPMOVSXDQZ128rr |
| 90615 | 59787, // VPMOVSXDQZ128rrk |
| 90616 | 59791, // VPMOVSXDQZ128rrkz |
| 90617 | 59794, // VPMOVSXDQZ256rm |
| 90618 | 59796, // VPMOVSXDQZ256rmk |
| 90619 | 59800, // VPMOVSXDQZ256rmkz |
| 90620 | 59803, // VPMOVSXDQZ256rr |
| 90621 | 59805, // VPMOVSXDQZ256rrk |
| 90622 | 59809, // VPMOVSXDQZ256rrkz |
| 90623 | 59812, // VPMOVSXDQZrm |
| 90624 | 59814, // VPMOVSXDQZrmk |
| 90625 | 59818, // VPMOVSXDQZrmkz |
| 90626 | 59821, // VPMOVSXDQZrr |
| 90627 | 59823, // VPMOVSXDQZrrk |
| 90628 | 59827, // VPMOVSXDQZrrkz |
| 90629 | 59830, // VPMOVSXDQrm |
| 90630 | 59832, // VPMOVSXDQrr |
| 90631 | 59834, // VPMOVSXWDYrm |
| 90632 | 59836, // VPMOVSXWDYrr |
| 90633 | 59838, // VPMOVSXWDZ128rm |
| 90634 | 59840, // VPMOVSXWDZ128rmk |
| 90635 | 59844, // VPMOVSXWDZ128rmkz |
| 90636 | 59847, // VPMOVSXWDZ128rr |
| 90637 | 59849, // VPMOVSXWDZ128rrk |
| 90638 | 59853, // VPMOVSXWDZ128rrkz |
| 90639 | 59856, // VPMOVSXWDZ256rm |
| 90640 | 59858, // VPMOVSXWDZ256rmk |
| 90641 | 59862, // VPMOVSXWDZ256rmkz |
| 90642 | 59865, // VPMOVSXWDZ256rr |
| 90643 | 59867, // VPMOVSXWDZ256rrk |
| 90644 | 59871, // VPMOVSXWDZ256rrkz |
| 90645 | 59874, // VPMOVSXWDZrm |
| 90646 | 59876, // VPMOVSXWDZrmk |
| 90647 | 59880, // VPMOVSXWDZrmkz |
| 90648 | 59883, // VPMOVSXWDZrr |
| 90649 | 59885, // VPMOVSXWDZrrk |
| 90650 | 59889, // VPMOVSXWDZrrkz |
| 90651 | 59892, // VPMOVSXWDrm |
| 90652 | 59894, // VPMOVSXWDrr |
| 90653 | 59896, // VPMOVSXWQYrm |
| 90654 | 59898, // VPMOVSXWQYrr |
| 90655 | 59900, // VPMOVSXWQZ128rm |
| 90656 | 59902, // VPMOVSXWQZ128rmk |
| 90657 | 59906, // VPMOVSXWQZ128rmkz |
| 90658 | 59909, // VPMOVSXWQZ128rr |
| 90659 | 59911, // VPMOVSXWQZ128rrk |
| 90660 | 59915, // VPMOVSXWQZ128rrkz |
| 90661 | 59918, // VPMOVSXWQZ256rm |
| 90662 | 59920, // VPMOVSXWQZ256rmk |
| 90663 | 59924, // VPMOVSXWQZ256rmkz |
| 90664 | 59927, // VPMOVSXWQZ256rr |
| 90665 | 59929, // VPMOVSXWQZ256rrk |
| 90666 | 59933, // VPMOVSXWQZ256rrkz |
| 90667 | 59936, // VPMOVSXWQZrm |
| 90668 | 59938, // VPMOVSXWQZrmk |
| 90669 | 59942, // VPMOVSXWQZrmkz |
| 90670 | 59945, // VPMOVSXWQZrr |
| 90671 | 59947, // VPMOVSXWQZrrk |
| 90672 | 59951, // VPMOVSXWQZrrkz |
| 90673 | 59954, // VPMOVSXWQrm |
| 90674 | 59956, // VPMOVSXWQrr |
| 90675 | 59958, // VPMOVUSDBZ128mr |
| 90676 | 59960, // VPMOVUSDBZ128mrk |
| 90677 | 59963, // VPMOVUSDBZ128rr |
| 90678 | 59965, // VPMOVUSDBZ128rrk |
| 90679 | 59969, // VPMOVUSDBZ128rrkz |
| 90680 | 59972, // VPMOVUSDBZ256mr |
| 90681 | 59974, // VPMOVUSDBZ256mrk |
| 90682 | 59977, // VPMOVUSDBZ256rr |
| 90683 | 59979, // VPMOVUSDBZ256rrk |
| 90684 | 59983, // VPMOVUSDBZ256rrkz |
| 90685 | 59986, // VPMOVUSDBZmr |
| 90686 | 59988, // VPMOVUSDBZmrk |
| 90687 | 59991, // VPMOVUSDBZrr |
| 90688 | 59993, // VPMOVUSDBZrrk |
| 90689 | 59997, // VPMOVUSDBZrrkz |
| 90690 | 60000, // VPMOVUSDWZ128mr |
| 90691 | 60002, // VPMOVUSDWZ128mrk |
| 90692 | 60005, // VPMOVUSDWZ128rr |
| 90693 | 60007, // VPMOVUSDWZ128rrk |
| 90694 | 60011, // VPMOVUSDWZ128rrkz |
| 90695 | 60014, // VPMOVUSDWZ256mr |
| 90696 | 60016, // VPMOVUSDWZ256mrk |
| 90697 | 60019, // VPMOVUSDWZ256rr |
| 90698 | 60021, // VPMOVUSDWZ256rrk |
| 90699 | 60025, // VPMOVUSDWZ256rrkz |
| 90700 | 60028, // VPMOVUSDWZmr |
| 90701 | 60030, // VPMOVUSDWZmrk |
| 90702 | 60033, // VPMOVUSDWZrr |
| 90703 | 60035, // VPMOVUSDWZrrk |
| 90704 | 60039, // VPMOVUSDWZrrkz |
| 90705 | 60042, // VPMOVUSQBZ128mr |
| 90706 | 60044, // VPMOVUSQBZ128mrk |
| 90707 | 60047, // VPMOVUSQBZ128rr |
| 90708 | 60049, // VPMOVUSQBZ128rrk |
| 90709 | 60053, // VPMOVUSQBZ128rrkz |
| 90710 | 60056, // VPMOVUSQBZ256mr |
| 90711 | 60058, // VPMOVUSQBZ256mrk |
| 90712 | 60061, // VPMOVUSQBZ256rr |
| 90713 | 60063, // VPMOVUSQBZ256rrk |
| 90714 | 60067, // VPMOVUSQBZ256rrkz |
| 90715 | 60070, // VPMOVUSQBZmr |
| 90716 | 60072, // VPMOVUSQBZmrk |
| 90717 | 60075, // VPMOVUSQBZrr |
| 90718 | 60077, // VPMOVUSQBZrrk |
| 90719 | 60081, // VPMOVUSQBZrrkz |
| 90720 | 60084, // VPMOVUSQDZ128mr |
| 90721 | 60086, // VPMOVUSQDZ128mrk |
| 90722 | 60089, // VPMOVUSQDZ128rr |
| 90723 | 60091, // VPMOVUSQDZ128rrk |
| 90724 | 60095, // VPMOVUSQDZ128rrkz |
| 90725 | 60098, // VPMOVUSQDZ256mr |
| 90726 | 60100, // VPMOVUSQDZ256mrk |
| 90727 | 60103, // VPMOVUSQDZ256rr |
| 90728 | 60105, // VPMOVUSQDZ256rrk |
| 90729 | 60109, // VPMOVUSQDZ256rrkz |
| 90730 | 60112, // VPMOVUSQDZmr |
| 90731 | 60114, // VPMOVUSQDZmrk |
| 90732 | 60117, // VPMOVUSQDZrr |
| 90733 | 60119, // VPMOVUSQDZrrk |
| 90734 | 60123, // VPMOVUSQDZrrkz |
| 90735 | 60126, // VPMOVUSQWZ128mr |
| 90736 | 60128, // VPMOVUSQWZ128mrk |
| 90737 | 60131, // VPMOVUSQWZ128rr |
| 90738 | 60133, // VPMOVUSQWZ128rrk |
| 90739 | 60137, // VPMOVUSQWZ128rrkz |
| 90740 | 60140, // VPMOVUSQWZ256mr |
| 90741 | 60142, // VPMOVUSQWZ256mrk |
| 90742 | 60145, // VPMOVUSQWZ256rr |
| 90743 | 60147, // VPMOVUSQWZ256rrk |
| 90744 | 60151, // VPMOVUSQWZ256rrkz |
| 90745 | 60154, // VPMOVUSQWZmr |
| 90746 | 60156, // VPMOVUSQWZmrk |
| 90747 | 60159, // VPMOVUSQWZrr |
| 90748 | 60161, // VPMOVUSQWZrrk |
| 90749 | 60165, // VPMOVUSQWZrrkz |
| 90750 | 60168, // VPMOVUSWBZ128mr |
| 90751 | 60170, // VPMOVUSWBZ128mrk |
| 90752 | 60173, // VPMOVUSWBZ128rr |
| 90753 | 60175, // VPMOVUSWBZ128rrk |
| 90754 | 60179, // VPMOVUSWBZ128rrkz |
| 90755 | 60182, // VPMOVUSWBZ256mr |
| 90756 | 60184, // VPMOVUSWBZ256mrk |
| 90757 | 60187, // VPMOVUSWBZ256rr |
| 90758 | 60189, // VPMOVUSWBZ256rrk |
| 90759 | 60193, // VPMOVUSWBZ256rrkz |
| 90760 | 60196, // VPMOVUSWBZmr |
| 90761 | 60198, // VPMOVUSWBZmrk |
| 90762 | 60201, // VPMOVUSWBZrr |
| 90763 | 60203, // VPMOVUSWBZrrk |
| 90764 | 60207, // VPMOVUSWBZrrkz |
| 90765 | 60210, // VPMOVW2MZ128kr |
| 90766 | 60212, // VPMOVW2MZ256kr |
| 90767 | 60214, // VPMOVW2MZkr |
| 90768 | 60216, // VPMOVWBZ128mr |
| 90769 | 60218, // VPMOVWBZ128mrk |
| 90770 | 60221, // VPMOVWBZ128rr |
| 90771 | 60223, // VPMOVWBZ128rrk |
| 90772 | 60227, // VPMOVWBZ128rrkz |
| 90773 | 60230, // VPMOVWBZ256mr |
| 90774 | 60232, // VPMOVWBZ256mrk |
| 90775 | 60235, // VPMOVWBZ256rr |
| 90776 | 60237, // VPMOVWBZ256rrk |
| 90777 | 60241, // VPMOVWBZ256rrkz |
| 90778 | 60244, // VPMOVWBZmr |
| 90779 | 60246, // VPMOVWBZmrk |
| 90780 | 60249, // VPMOVWBZrr |
| 90781 | 60251, // VPMOVWBZrrk |
| 90782 | 60255, // VPMOVWBZrrkz |
| 90783 | 60258, // VPMOVZXBDYrm |
| 90784 | 60260, // VPMOVZXBDYrr |
| 90785 | 60262, // VPMOVZXBDZ128rm |
| 90786 | 60264, // VPMOVZXBDZ128rmk |
| 90787 | 60268, // VPMOVZXBDZ128rmkz |
| 90788 | 60271, // VPMOVZXBDZ128rr |
| 90789 | 60273, // VPMOVZXBDZ128rrk |
| 90790 | 60277, // VPMOVZXBDZ128rrkz |
| 90791 | 60280, // VPMOVZXBDZ256rm |
| 90792 | 60282, // VPMOVZXBDZ256rmk |
| 90793 | 60286, // VPMOVZXBDZ256rmkz |
| 90794 | 60289, // VPMOVZXBDZ256rr |
| 90795 | 60291, // VPMOVZXBDZ256rrk |
| 90796 | 60295, // VPMOVZXBDZ256rrkz |
| 90797 | 60298, // VPMOVZXBDZrm |
| 90798 | 60300, // VPMOVZXBDZrmk |
| 90799 | 60304, // VPMOVZXBDZrmkz |
| 90800 | 60307, // VPMOVZXBDZrr |
| 90801 | 60309, // VPMOVZXBDZrrk |
| 90802 | 60313, // VPMOVZXBDZrrkz |
| 90803 | 60316, // VPMOVZXBDrm |
| 90804 | 60318, // VPMOVZXBDrr |
| 90805 | 60320, // VPMOVZXBQYrm |
| 90806 | 60322, // VPMOVZXBQYrr |
| 90807 | 60324, // VPMOVZXBQZ128rm |
| 90808 | 60326, // VPMOVZXBQZ128rmk |
| 90809 | 60330, // VPMOVZXBQZ128rmkz |
| 90810 | 60333, // VPMOVZXBQZ128rr |
| 90811 | 60335, // VPMOVZXBQZ128rrk |
| 90812 | 60339, // VPMOVZXBQZ128rrkz |
| 90813 | 60342, // VPMOVZXBQZ256rm |
| 90814 | 60344, // VPMOVZXBQZ256rmk |
| 90815 | 60348, // VPMOVZXBQZ256rmkz |
| 90816 | 60351, // VPMOVZXBQZ256rr |
| 90817 | 60353, // VPMOVZXBQZ256rrk |
| 90818 | 60357, // VPMOVZXBQZ256rrkz |
| 90819 | 60360, // VPMOVZXBQZrm |
| 90820 | 60362, // VPMOVZXBQZrmk |
| 90821 | 60366, // VPMOVZXBQZrmkz |
| 90822 | 60369, // VPMOVZXBQZrr |
| 90823 | 60371, // VPMOVZXBQZrrk |
| 90824 | 60375, // VPMOVZXBQZrrkz |
| 90825 | 60378, // VPMOVZXBQrm |
| 90826 | 60380, // VPMOVZXBQrr |
| 90827 | 60382, // VPMOVZXBWYrm |
| 90828 | 60384, // VPMOVZXBWYrr |
| 90829 | 60386, // VPMOVZXBWZ128rm |
| 90830 | 60388, // VPMOVZXBWZ128rmk |
| 90831 | 60392, // VPMOVZXBWZ128rmkz |
| 90832 | 60395, // VPMOVZXBWZ128rr |
| 90833 | 60397, // VPMOVZXBWZ128rrk |
| 90834 | 60401, // VPMOVZXBWZ128rrkz |
| 90835 | 60404, // VPMOVZXBWZ256rm |
| 90836 | 60406, // VPMOVZXBWZ256rmk |
| 90837 | 60410, // VPMOVZXBWZ256rmkz |
| 90838 | 60413, // VPMOVZXBWZ256rr |
| 90839 | 60415, // VPMOVZXBWZ256rrk |
| 90840 | 60419, // VPMOVZXBWZ256rrkz |
| 90841 | 60422, // VPMOVZXBWZrm |
| 90842 | 60424, // VPMOVZXBWZrmk |
| 90843 | 60428, // VPMOVZXBWZrmkz |
| 90844 | 60431, // VPMOVZXBWZrr |
| 90845 | 60433, // VPMOVZXBWZrrk |
| 90846 | 60437, // VPMOVZXBWZrrkz |
| 90847 | 60440, // VPMOVZXBWrm |
| 90848 | 60442, // VPMOVZXBWrr |
| 90849 | 60444, // VPMOVZXDQYrm |
| 90850 | 60446, // VPMOVZXDQYrr |
| 90851 | 60448, // VPMOVZXDQZ128rm |
| 90852 | 60450, // VPMOVZXDQZ128rmk |
| 90853 | 60454, // VPMOVZXDQZ128rmkz |
| 90854 | 60457, // VPMOVZXDQZ128rr |
| 90855 | 60459, // VPMOVZXDQZ128rrk |
| 90856 | 60463, // VPMOVZXDQZ128rrkz |
| 90857 | 60466, // VPMOVZXDQZ256rm |
| 90858 | 60468, // VPMOVZXDQZ256rmk |
| 90859 | 60472, // VPMOVZXDQZ256rmkz |
| 90860 | 60475, // VPMOVZXDQZ256rr |
| 90861 | 60477, // VPMOVZXDQZ256rrk |
| 90862 | 60481, // VPMOVZXDQZ256rrkz |
| 90863 | 60484, // VPMOVZXDQZrm |
| 90864 | 60486, // VPMOVZXDQZrmk |
| 90865 | 60490, // VPMOVZXDQZrmkz |
| 90866 | 60493, // VPMOVZXDQZrr |
| 90867 | 60495, // VPMOVZXDQZrrk |
| 90868 | 60499, // VPMOVZXDQZrrkz |
| 90869 | 60502, // VPMOVZXDQrm |
| 90870 | 60504, // VPMOVZXDQrr |
| 90871 | 60506, // VPMOVZXWDYrm |
| 90872 | 60508, // VPMOVZXWDYrr |
| 90873 | 60510, // VPMOVZXWDZ128rm |
| 90874 | 60512, // VPMOVZXWDZ128rmk |
| 90875 | 60516, // VPMOVZXWDZ128rmkz |
| 90876 | 60519, // VPMOVZXWDZ128rr |
| 90877 | 60521, // VPMOVZXWDZ128rrk |
| 90878 | 60525, // VPMOVZXWDZ128rrkz |
| 90879 | 60528, // VPMOVZXWDZ256rm |
| 90880 | 60530, // VPMOVZXWDZ256rmk |
| 90881 | 60534, // VPMOVZXWDZ256rmkz |
| 90882 | 60537, // VPMOVZXWDZ256rr |
| 90883 | 60539, // VPMOVZXWDZ256rrk |
| 90884 | 60543, // VPMOVZXWDZ256rrkz |
| 90885 | 60546, // VPMOVZXWDZrm |
| 90886 | 60548, // VPMOVZXWDZrmk |
| 90887 | 60552, // VPMOVZXWDZrmkz |
| 90888 | 60555, // VPMOVZXWDZrr |
| 90889 | 60557, // VPMOVZXWDZrrk |
| 90890 | 60561, // VPMOVZXWDZrrkz |
| 90891 | 60564, // VPMOVZXWDrm |
| 90892 | 60566, // VPMOVZXWDrr |
| 90893 | 60568, // VPMOVZXWQYrm |
| 90894 | 60570, // VPMOVZXWQYrr |
| 90895 | 60572, // VPMOVZXWQZ128rm |
| 90896 | 60574, // VPMOVZXWQZ128rmk |
| 90897 | 60578, // VPMOVZXWQZ128rmkz |
| 90898 | 60581, // VPMOVZXWQZ128rr |
| 90899 | 60583, // VPMOVZXWQZ128rrk |
| 90900 | 60587, // VPMOVZXWQZ128rrkz |
| 90901 | 60590, // VPMOVZXWQZ256rm |
| 90902 | 60592, // VPMOVZXWQZ256rmk |
| 90903 | 60596, // VPMOVZXWQZ256rmkz |
| 90904 | 60599, // VPMOVZXWQZ256rr |
| 90905 | 60601, // VPMOVZXWQZ256rrk |
| 90906 | 60605, // VPMOVZXWQZ256rrkz |
| 90907 | 60608, // VPMOVZXWQZrm |
| 90908 | 60610, // VPMOVZXWQZrmk |
| 90909 | 60614, // VPMOVZXWQZrmkz |
| 90910 | 60617, // VPMOVZXWQZrr |
| 90911 | 60619, // VPMOVZXWQZrrk |
| 90912 | 60623, // VPMOVZXWQZrrkz |
| 90913 | 60626, // VPMOVZXWQrm |
| 90914 | 60628, // VPMOVZXWQrr |
| 90915 | 60630, // VPMULDQYrm |
| 90916 | 60633, // VPMULDQYrr |
| 90917 | 60636, // VPMULDQZ128rm |
| 90918 | 60639, // VPMULDQZ128rmb |
| 90919 | 60642, // VPMULDQZ128rmbk |
| 90920 | 60647, // VPMULDQZ128rmbkz |
| 90921 | 60651, // VPMULDQZ128rmk |
| 90922 | 60656, // VPMULDQZ128rmkz |
| 90923 | 60660, // VPMULDQZ128rr |
| 90924 | 60663, // VPMULDQZ128rrk |
| 90925 | 60668, // VPMULDQZ128rrkz |
| 90926 | 60672, // VPMULDQZ256rm |
| 90927 | 60675, // VPMULDQZ256rmb |
| 90928 | 60678, // VPMULDQZ256rmbk |
| 90929 | 60683, // VPMULDQZ256rmbkz |
| 90930 | 60687, // VPMULDQZ256rmk |
| 90931 | 60692, // VPMULDQZ256rmkz |
| 90932 | 60696, // VPMULDQZ256rr |
| 90933 | 60699, // VPMULDQZ256rrk |
| 90934 | 60704, // VPMULDQZ256rrkz |
| 90935 | 60708, // VPMULDQZrm |
| 90936 | 60711, // VPMULDQZrmb |
| 90937 | 60714, // VPMULDQZrmbk |
| 90938 | 60719, // VPMULDQZrmbkz |
| 90939 | 60723, // VPMULDQZrmk |
| 90940 | 60728, // VPMULDQZrmkz |
| 90941 | 60732, // VPMULDQZrr |
| 90942 | 60735, // VPMULDQZrrk |
| 90943 | 60740, // VPMULDQZrrkz |
| 90944 | 60744, // VPMULDQrm |
| 90945 | 60747, // VPMULDQrr |
| 90946 | 60750, // VPMULHRSWYrm |
| 90947 | 60753, // VPMULHRSWYrr |
| 90948 | 60756, // VPMULHRSWZ128rm |
| 90949 | 60759, // VPMULHRSWZ128rmk |
| 90950 | 60764, // VPMULHRSWZ128rmkz |
| 90951 | 60768, // VPMULHRSWZ128rr |
| 90952 | 60771, // VPMULHRSWZ128rrk |
| 90953 | 60776, // VPMULHRSWZ128rrkz |
| 90954 | 60780, // VPMULHRSWZ256rm |
| 90955 | 60783, // VPMULHRSWZ256rmk |
| 90956 | 60788, // VPMULHRSWZ256rmkz |
| 90957 | 60792, // VPMULHRSWZ256rr |
| 90958 | 60795, // VPMULHRSWZ256rrk |
| 90959 | 60800, // VPMULHRSWZ256rrkz |
| 90960 | 60804, // VPMULHRSWZrm |
| 90961 | 60807, // VPMULHRSWZrmk |
| 90962 | 60812, // VPMULHRSWZrmkz |
| 90963 | 60816, // VPMULHRSWZrr |
| 90964 | 60819, // VPMULHRSWZrrk |
| 90965 | 60824, // VPMULHRSWZrrkz |
| 90966 | 60828, // VPMULHRSWrm |
| 90967 | 60831, // VPMULHRSWrr |
| 90968 | 60834, // VPMULHUWYrm |
| 90969 | 60837, // VPMULHUWYrr |
| 90970 | 60840, // VPMULHUWZ128rm |
| 90971 | 60843, // VPMULHUWZ128rmk |
| 90972 | 60848, // VPMULHUWZ128rmkz |
| 90973 | 60852, // VPMULHUWZ128rr |
| 90974 | 60855, // VPMULHUWZ128rrk |
| 90975 | 60860, // VPMULHUWZ128rrkz |
| 90976 | 60864, // VPMULHUWZ256rm |
| 90977 | 60867, // VPMULHUWZ256rmk |
| 90978 | 60872, // VPMULHUWZ256rmkz |
| 90979 | 60876, // VPMULHUWZ256rr |
| 90980 | 60879, // VPMULHUWZ256rrk |
| 90981 | 60884, // VPMULHUWZ256rrkz |
| 90982 | 60888, // VPMULHUWZrm |
| 90983 | 60891, // VPMULHUWZrmk |
| 90984 | 60896, // VPMULHUWZrmkz |
| 90985 | 60900, // VPMULHUWZrr |
| 90986 | 60903, // VPMULHUWZrrk |
| 90987 | 60908, // VPMULHUWZrrkz |
| 90988 | 60912, // VPMULHUWrm |
| 90989 | 60915, // VPMULHUWrr |
| 90990 | 60918, // VPMULHWYrm |
| 90991 | 60921, // VPMULHWYrr |
| 90992 | 60924, // VPMULHWZ128rm |
| 90993 | 60927, // VPMULHWZ128rmk |
| 90994 | 60932, // VPMULHWZ128rmkz |
| 90995 | 60936, // VPMULHWZ128rr |
| 90996 | 60939, // VPMULHWZ128rrk |
| 90997 | 60944, // VPMULHWZ128rrkz |
| 90998 | 60948, // VPMULHWZ256rm |
| 90999 | 60951, // VPMULHWZ256rmk |
| 91000 | 60956, // VPMULHWZ256rmkz |
| 91001 | 60960, // VPMULHWZ256rr |
| 91002 | 60963, // VPMULHWZ256rrk |
| 91003 | 60968, // VPMULHWZ256rrkz |
| 91004 | 60972, // VPMULHWZrm |
| 91005 | 60975, // VPMULHWZrmk |
| 91006 | 60980, // VPMULHWZrmkz |
| 91007 | 60984, // VPMULHWZrr |
| 91008 | 60987, // VPMULHWZrrk |
| 91009 | 60992, // VPMULHWZrrkz |
| 91010 | 60996, // VPMULHWrm |
| 91011 | 60999, // VPMULHWrr |
| 91012 | 61002, // VPMULLDYrm |
| 91013 | 61005, // VPMULLDYrr |
| 91014 | 61008, // VPMULLDZ128rm |
| 91015 | 61011, // VPMULLDZ128rmb |
| 91016 | 61014, // VPMULLDZ128rmbk |
| 91017 | 61019, // VPMULLDZ128rmbkz |
| 91018 | 61023, // VPMULLDZ128rmk |
| 91019 | 61028, // VPMULLDZ128rmkz |
| 91020 | 61032, // VPMULLDZ128rr |
| 91021 | 61035, // VPMULLDZ128rrk |
| 91022 | 61040, // VPMULLDZ128rrkz |
| 91023 | 61044, // VPMULLDZ256rm |
| 91024 | 61047, // VPMULLDZ256rmb |
| 91025 | 61050, // VPMULLDZ256rmbk |
| 91026 | 61055, // VPMULLDZ256rmbkz |
| 91027 | 61059, // VPMULLDZ256rmk |
| 91028 | 61064, // VPMULLDZ256rmkz |
| 91029 | 61068, // VPMULLDZ256rr |
| 91030 | 61071, // VPMULLDZ256rrk |
| 91031 | 61076, // VPMULLDZ256rrkz |
| 91032 | 61080, // VPMULLDZrm |
| 91033 | 61083, // VPMULLDZrmb |
| 91034 | 61086, // VPMULLDZrmbk |
| 91035 | 61091, // VPMULLDZrmbkz |
| 91036 | 61095, // VPMULLDZrmk |
| 91037 | 61100, // VPMULLDZrmkz |
| 91038 | 61104, // VPMULLDZrr |
| 91039 | 61107, // VPMULLDZrrk |
| 91040 | 61112, // VPMULLDZrrkz |
| 91041 | 61116, // VPMULLDrm |
| 91042 | 61119, // VPMULLDrr |
| 91043 | 61122, // VPMULLQZ128rm |
| 91044 | 61125, // VPMULLQZ128rmb |
| 91045 | 61128, // VPMULLQZ128rmbk |
| 91046 | 61133, // VPMULLQZ128rmbkz |
| 91047 | 61137, // VPMULLQZ128rmk |
| 91048 | 61142, // VPMULLQZ128rmkz |
| 91049 | 61146, // VPMULLQZ128rr |
| 91050 | 61149, // VPMULLQZ128rrk |
| 91051 | 61154, // VPMULLQZ128rrkz |
| 91052 | 61158, // VPMULLQZ256rm |
| 91053 | 61161, // VPMULLQZ256rmb |
| 91054 | 61164, // VPMULLQZ256rmbk |
| 91055 | 61169, // VPMULLQZ256rmbkz |
| 91056 | 61173, // VPMULLQZ256rmk |
| 91057 | 61178, // VPMULLQZ256rmkz |
| 91058 | 61182, // VPMULLQZ256rr |
| 91059 | 61185, // VPMULLQZ256rrk |
| 91060 | 61190, // VPMULLQZ256rrkz |
| 91061 | 61194, // VPMULLQZrm |
| 91062 | 61197, // VPMULLQZrmb |
| 91063 | 61200, // VPMULLQZrmbk |
| 91064 | 61205, // VPMULLQZrmbkz |
| 91065 | 61209, // VPMULLQZrmk |
| 91066 | 61214, // VPMULLQZrmkz |
| 91067 | 61218, // VPMULLQZrr |
| 91068 | 61221, // VPMULLQZrrk |
| 91069 | 61226, // VPMULLQZrrkz |
| 91070 | 61230, // VPMULLWYrm |
| 91071 | 61233, // VPMULLWYrr |
| 91072 | 61236, // VPMULLWZ128rm |
| 91073 | 61239, // VPMULLWZ128rmk |
| 91074 | 61244, // VPMULLWZ128rmkz |
| 91075 | 61248, // VPMULLWZ128rr |
| 91076 | 61251, // VPMULLWZ128rrk |
| 91077 | 61256, // VPMULLWZ128rrkz |
| 91078 | 61260, // VPMULLWZ256rm |
| 91079 | 61263, // VPMULLWZ256rmk |
| 91080 | 61268, // VPMULLWZ256rmkz |
| 91081 | 61272, // VPMULLWZ256rr |
| 91082 | 61275, // VPMULLWZ256rrk |
| 91083 | 61280, // VPMULLWZ256rrkz |
| 91084 | 61284, // VPMULLWZrm |
| 91085 | 61287, // VPMULLWZrmk |
| 91086 | 61292, // VPMULLWZrmkz |
| 91087 | 61296, // VPMULLWZrr |
| 91088 | 61299, // VPMULLWZrrk |
| 91089 | 61304, // VPMULLWZrrkz |
| 91090 | 61308, // VPMULLWrm |
| 91091 | 61311, // VPMULLWrr |
| 91092 | 61314, // VPMULTISHIFTQBZ128rm |
| 91093 | 61317, // VPMULTISHIFTQBZ128rmb |
| 91094 | 61320, // VPMULTISHIFTQBZ128rmbk |
| 91095 | 61325, // VPMULTISHIFTQBZ128rmbkz |
| 91096 | 61329, // VPMULTISHIFTQBZ128rmk |
| 91097 | 61334, // VPMULTISHIFTQBZ128rmkz |
| 91098 | 61338, // VPMULTISHIFTQBZ128rr |
| 91099 | 61341, // VPMULTISHIFTQBZ128rrk |
| 91100 | 61346, // VPMULTISHIFTQBZ128rrkz |
| 91101 | 61350, // VPMULTISHIFTQBZ256rm |
| 91102 | 61353, // VPMULTISHIFTQBZ256rmb |
| 91103 | 61356, // VPMULTISHIFTQBZ256rmbk |
| 91104 | 61361, // VPMULTISHIFTQBZ256rmbkz |
| 91105 | 61365, // VPMULTISHIFTQBZ256rmk |
| 91106 | 61370, // VPMULTISHIFTQBZ256rmkz |
| 91107 | 61374, // VPMULTISHIFTQBZ256rr |
| 91108 | 61377, // VPMULTISHIFTQBZ256rrk |
| 91109 | 61382, // VPMULTISHIFTQBZ256rrkz |
| 91110 | 61386, // VPMULTISHIFTQBZrm |
| 91111 | 61389, // VPMULTISHIFTQBZrmb |
| 91112 | 61392, // VPMULTISHIFTQBZrmbk |
| 91113 | 61397, // VPMULTISHIFTQBZrmbkz |
| 91114 | 61401, // VPMULTISHIFTQBZrmk |
| 91115 | 61406, // VPMULTISHIFTQBZrmkz |
| 91116 | 61410, // VPMULTISHIFTQBZrr |
| 91117 | 61413, // VPMULTISHIFTQBZrrk |
| 91118 | 61418, // VPMULTISHIFTQBZrrkz |
| 91119 | 61422, // VPMULUDQYrm |
| 91120 | 61425, // VPMULUDQYrr |
| 91121 | 61428, // VPMULUDQZ128rm |
| 91122 | 61431, // VPMULUDQZ128rmb |
| 91123 | 61434, // VPMULUDQZ128rmbk |
| 91124 | 61439, // VPMULUDQZ128rmbkz |
| 91125 | 61443, // VPMULUDQZ128rmk |
| 91126 | 61448, // VPMULUDQZ128rmkz |
| 91127 | 61452, // VPMULUDQZ128rr |
| 91128 | 61455, // VPMULUDQZ128rrk |
| 91129 | 61460, // VPMULUDQZ128rrkz |
| 91130 | 61464, // VPMULUDQZ256rm |
| 91131 | 61467, // VPMULUDQZ256rmb |
| 91132 | 61470, // VPMULUDQZ256rmbk |
| 91133 | 61475, // VPMULUDQZ256rmbkz |
| 91134 | 61479, // VPMULUDQZ256rmk |
| 91135 | 61484, // VPMULUDQZ256rmkz |
| 91136 | 61488, // VPMULUDQZ256rr |
| 91137 | 61491, // VPMULUDQZ256rrk |
| 91138 | 61496, // VPMULUDQZ256rrkz |
| 91139 | 61500, // VPMULUDQZrm |
| 91140 | 61503, // VPMULUDQZrmb |
| 91141 | 61506, // VPMULUDQZrmbk |
| 91142 | 61511, // VPMULUDQZrmbkz |
| 91143 | 61515, // VPMULUDQZrmk |
| 91144 | 61520, // VPMULUDQZrmkz |
| 91145 | 61524, // VPMULUDQZrr |
| 91146 | 61527, // VPMULUDQZrrk |
| 91147 | 61532, // VPMULUDQZrrkz |
| 91148 | 61536, // VPMULUDQrm |
| 91149 | 61539, // VPMULUDQrr |
| 91150 | 61542, // VPOPCNTBZ128rm |
| 91151 | 61544, // VPOPCNTBZ128rmk |
| 91152 | 61548, // VPOPCNTBZ128rmkz |
| 91153 | 61551, // VPOPCNTBZ128rr |
| 91154 | 61553, // VPOPCNTBZ128rrk |
| 91155 | 61557, // VPOPCNTBZ128rrkz |
| 91156 | 61560, // VPOPCNTBZ256rm |
| 91157 | 61562, // VPOPCNTBZ256rmk |
| 91158 | 61566, // VPOPCNTBZ256rmkz |
| 91159 | 61569, // VPOPCNTBZ256rr |
| 91160 | 61571, // VPOPCNTBZ256rrk |
| 91161 | 61575, // VPOPCNTBZ256rrkz |
| 91162 | 61578, // VPOPCNTBZrm |
| 91163 | 61580, // VPOPCNTBZrmk |
| 91164 | 61584, // VPOPCNTBZrmkz |
| 91165 | 61587, // VPOPCNTBZrr |
| 91166 | 61589, // VPOPCNTBZrrk |
| 91167 | 61593, // VPOPCNTBZrrkz |
| 91168 | 61596, // VPOPCNTDZ128rm |
| 91169 | 61598, // VPOPCNTDZ128rmb |
| 91170 | 61600, // VPOPCNTDZ128rmbk |
| 91171 | 61604, // VPOPCNTDZ128rmbkz |
| 91172 | 61607, // VPOPCNTDZ128rmk |
| 91173 | 61611, // VPOPCNTDZ128rmkz |
| 91174 | 61614, // VPOPCNTDZ128rr |
| 91175 | 61616, // VPOPCNTDZ128rrk |
| 91176 | 61620, // VPOPCNTDZ128rrkz |
| 91177 | 61623, // VPOPCNTDZ256rm |
| 91178 | 61625, // VPOPCNTDZ256rmb |
| 91179 | 61627, // VPOPCNTDZ256rmbk |
| 91180 | 61631, // VPOPCNTDZ256rmbkz |
| 91181 | 61634, // VPOPCNTDZ256rmk |
| 91182 | 61638, // VPOPCNTDZ256rmkz |
| 91183 | 61641, // VPOPCNTDZ256rr |
| 91184 | 61643, // VPOPCNTDZ256rrk |
| 91185 | 61647, // VPOPCNTDZ256rrkz |
| 91186 | 61650, // VPOPCNTDZrm |
| 91187 | 61652, // VPOPCNTDZrmb |
| 91188 | 61654, // VPOPCNTDZrmbk |
| 91189 | 61658, // VPOPCNTDZrmbkz |
| 91190 | 61661, // VPOPCNTDZrmk |
| 91191 | 61665, // VPOPCNTDZrmkz |
| 91192 | 61668, // VPOPCNTDZrr |
| 91193 | 61670, // VPOPCNTDZrrk |
| 91194 | 61674, // VPOPCNTDZrrkz |
| 91195 | 61677, // VPOPCNTQZ128rm |
| 91196 | 61679, // VPOPCNTQZ128rmb |
| 91197 | 61681, // VPOPCNTQZ128rmbk |
| 91198 | 61685, // VPOPCNTQZ128rmbkz |
| 91199 | 61688, // VPOPCNTQZ128rmk |
| 91200 | 61692, // VPOPCNTQZ128rmkz |
| 91201 | 61695, // VPOPCNTQZ128rr |
| 91202 | 61697, // VPOPCNTQZ128rrk |
| 91203 | 61701, // VPOPCNTQZ128rrkz |
| 91204 | 61704, // VPOPCNTQZ256rm |
| 91205 | 61706, // VPOPCNTQZ256rmb |
| 91206 | 61708, // VPOPCNTQZ256rmbk |
| 91207 | 61712, // VPOPCNTQZ256rmbkz |
| 91208 | 61715, // VPOPCNTQZ256rmk |
| 91209 | 61719, // VPOPCNTQZ256rmkz |
| 91210 | 61722, // VPOPCNTQZ256rr |
| 91211 | 61724, // VPOPCNTQZ256rrk |
| 91212 | 61728, // VPOPCNTQZ256rrkz |
| 91213 | 61731, // VPOPCNTQZrm |
| 91214 | 61733, // VPOPCNTQZrmb |
| 91215 | 61735, // VPOPCNTQZrmbk |
| 91216 | 61739, // VPOPCNTQZrmbkz |
| 91217 | 61742, // VPOPCNTQZrmk |
| 91218 | 61746, // VPOPCNTQZrmkz |
| 91219 | 61749, // VPOPCNTQZrr |
| 91220 | 61751, // VPOPCNTQZrrk |
| 91221 | 61755, // VPOPCNTQZrrkz |
| 91222 | 61758, // VPOPCNTWZ128rm |
| 91223 | 61760, // VPOPCNTWZ128rmk |
| 91224 | 61764, // VPOPCNTWZ128rmkz |
| 91225 | 61767, // VPOPCNTWZ128rr |
| 91226 | 61769, // VPOPCNTWZ128rrk |
| 91227 | 61773, // VPOPCNTWZ128rrkz |
| 91228 | 61776, // VPOPCNTWZ256rm |
| 91229 | 61778, // VPOPCNTWZ256rmk |
| 91230 | 61782, // VPOPCNTWZ256rmkz |
| 91231 | 61785, // VPOPCNTWZ256rr |
| 91232 | 61787, // VPOPCNTWZ256rrk |
| 91233 | 61791, // VPOPCNTWZ256rrkz |
| 91234 | 61794, // VPOPCNTWZrm |
| 91235 | 61796, // VPOPCNTWZrmk |
| 91236 | 61800, // VPOPCNTWZrmkz |
| 91237 | 61803, // VPOPCNTWZrr |
| 91238 | 61805, // VPOPCNTWZrrk |
| 91239 | 61809, // VPOPCNTWZrrkz |
| 91240 | 61812, // VPORDZ128rm |
| 91241 | 61815, // VPORDZ128rmb |
| 91242 | 61818, // VPORDZ128rmbk |
| 91243 | 61823, // VPORDZ128rmbkz |
| 91244 | 61827, // VPORDZ128rmk |
| 91245 | 61832, // VPORDZ128rmkz |
| 91246 | 61836, // VPORDZ128rr |
| 91247 | 61839, // VPORDZ128rrk |
| 91248 | 61844, // VPORDZ128rrkz |
| 91249 | 61848, // VPORDZ256rm |
| 91250 | 61851, // VPORDZ256rmb |
| 91251 | 61854, // VPORDZ256rmbk |
| 91252 | 61859, // VPORDZ256rmbkz |
| 91253 | 61863, // VPORDZ256rmk |
| 91254 | 61868, // VPORDZ256rmkz |
| 91255 | 61872, // VPORDZ256rr |
| 91256 | 61875, // VPORDZ256rrk |
| 91257 | 61880, // VPORDZ256rrkz |
| 91258 | 61884, // VPORDZrm |
| 91259 | 61887, // VPORDZrmb |
| 91260 | 61890, // VPORDZrmbk |
| 91261 | 61895, // VPORDZrmbkz |
| 91262 | 61899, // VPORDZrmk |
| 91263 | 61904, // VPORDZrmkz |
| 91264 | 61908, // VPORDZrr |
| 91265 | 61911, // VPORDZrrk |
| 91266 | 61916, // VPORDZrrkz |
| 91267 | 61920, // VPORQZ128rm |
| 91268 | 61923, // VPORQZ128rmb |
| 91269 | 61926, // VPORQZ128rmbk |
| 91270 | 61931, // VPORQZ128rmbkz |
| 91271 | 61935, // VPORQZ128rmk |
| 91272 | 61940, // VPORQZ128rmkz |
| 91273 | 61944, // VPORQZ128rr |
| 91274 | 61947, // VPORQZ128rrk |
| 91275 | 61952, // VPORQZ128rrkz |
| 91276 | 61956, // VPORQZ256rm |
| 91277 | 61959, // VPORQZ256rmb |
| 91278 | 61962, // VPORQZ256rmbk |
| 91279 | 61967, // VPORQZ256rmbkz |
| 91280 | 61971, // VPORQZ256rmk |
| 91281 | 61976, // VPORQZ256rmkz |
| 91282 | 61980, // VPORQZ256rr |
| 91283 | 61983, // VPORQZ256rrk |
| 91284 | 61988, // VPORQZ256rrkz |
| 91285 | 61992, // VPORQZrm |
| 91286 | 61995, // VPORQZrmb |
| 91287 | 61998, // VPORQZrmbk |
| 91288 | 62003, // VPORQZrmbkz |
| 91289 | 62007, // VPORQZrmk |
| 91290 | 62012, // VPORQZrmkz |
| 91291 | 62016, // VPORQZrr |
| 91292 | 62019, // VPORQZrrk |
| 91293 | 62024, // VPORQZrrkz |
| 91294 | 62028, // VPORYrm |
| 91295 | 62031, // VPORYrr |
| 91296 | 62034, // VPORrm |
| 91297 | 62037, // VPORrr |
| 91298 | 62040, // VPPERMrmr |
| 91299 | 62044, // VPPERMrrm |
| 91300 | 62048, // VPPERMrrr |
| 91301 | 62052, // VPPERMrrr_REV |
| 91302 | 62056, // VPROLDZ128mbi |
| 91303 | 62059, // VPROLDZ128mbik |
| 91304 | 62064, // VPROLDZ128mbikz |
| 91305 | 62068, // VPROLDZ128mi |
| 91306 | 62071, // VPROLDZ128mik |
| 91307 | 62076, // VPROLDZ128mikz |
| 91308 | 62080, // VPROLDZ128ri |
| 91309 | 62083, // VPROLDZ128rik |
| 91310 | 62088, // VPROLDZ128rikz |
| 91311 | 62092, // VPROLDZ256mbi |
| 91312 | 62095, // VPROLDZ256mbik |
| 91313 | 62100, // VPROLDZ256mbikz |
| 91314 | 62104, // VPROLDZ256mi |
| 91315 | 62107, // VPROLDZ256mik |
| 91316 | 62112, // VPROLDZ256mikz |
| 91317 | 62116, // VPROLDZ256ri |
| 91318 | 62119, // VPROLDZ256rik |
| 91319 | 62124, // VPROLDZ256rikz |
| 91320 | 62128, // VPROLDZmbi |
| 91321 | 62131, // VPROLDZmbik |
| 91322 | 62136, // VPROLDZmbikz |
| 91323 | 62140, // VPROLDZmi |
| 91324 | 62143, // VPROLDZmik |
| 91325 | 62148, // VPROLDZmikz |
| 91326 | 62152, // VPROLDZri |
| 91327 | 62155, // VPROLDZrik |
| 91328 | 62160, // VPROLDZrikz |
| 91329 | 62164, // VPROLQZ128mbi |
| 91330 | 62167, // VPROLQZ128mbik |
| 91331 | 62172, // VPROLQZ128mbikz |
| 91332 | 62176, // VPROLQZ128mi |
| 91333 | 62179, // VPROLQZ128mik |
| 91334 | 62184, // VPROLQZ128mikz |
| 91335 | 62188, // VPROLQZ128ri |
| 91336 | 62191, // VPROLQZ128rik |
| 91337 | 62196, // VPROLQZ128rikz |
| 91338 | 62200, // VPROLQZ256mbi |
| 91339 | 62203, // VPROLQZ256mbik |
| 91340 | 62208, // VPROLQZ256mbikz |
| 91341 | 62212, // VPROLQZ256mi |
| 91342 | 62215, // VPROLQZ256mik |
| 91343 | 62220, // VPROLQZ256mikz |
| 91344 | 62224, // VPROLQZ256ri |
| 91345 | 62227, // VPROLQZ256rik |
| 91346 | 62232, // VPROLQZ256rikz |
| 91347 | 62236, // VPROLQZmbi |
| 91348 | 62239, // VPROLQZmbik |
| 91349 | 62244, // VPROLQZmbikz |
| 91350 | 62248, // VPROLQZmi |
| 91351 | 62251, // VPROLQZmik |
| 91352 | 62256, // VPROLQZmikz |
| 91353 | 62260, // VPROLQZri |
| 91354 | 62263, // VPROLQZrik |
| 91355 | 62268, // VPROLQZrikz |
| 91356 | 62272, // VPROLVDZ128rm |
| 91357 | 62275, // VPROLVDZ128rmb |
| 91358 | 62278, // VPROLVDZ128rmbk |
| 91359 | 62283, // VPROLVDZ128rmbkz |
| 91360 | 62287, // VPROLVDZ128rmk |
| 91361 | 62292, // VPROLVDZ128rmkz |
| 91362 | 62296, // VPROLVDZ128rr |
| 91363 | 62299, // VPROLVDZ128rrk |
| 91364 | 62304, // VPROLVDZ128rrkz |
| 91365 | 62308, // VPROLVDZ256rm |
| 91366 | 62311, // VPROLVDZ256rmb |
| 91367 | 62314, // VPROLVDZ256rmbk |
| 91368 | 62319, // VPROLVDZ256rmbkz |
| 91369 | 62323, // VPROLVDZ256rmk |
| 91370 | 62328, // VPROLVDZ256rmkz |
| 91371 | 62332, // VPROLVDZ256rr |
| 91372 | 62335, // VPROLVDZ256rrk |
| 91373 | 62340, // VPROLVDZ256rrkz |
| 91374 | 62344, // VPROLVDZrm |
| 91375 | 62347, // VPROLVDZrmb |
| 91376 | 62350, // VPROLVDZrmbk |
| 91377 | 62355, // VPROLVDZrmbkz |
| 91378 | 62359, // VPROLVDZrmk |
| 91379 | 62364, // VPROLVDZrmkz |
| 91380 | 62368, // VPROLVDZrr |
| 91381 | 62371, // VPROLVDZrrk |
| 91382 | 62376, // VPROLVDZrrkz |
| 91383 | 62380, // VPROLVQZ128rm |
| 91384 | 62383, // VPROLVQZ128rmb |
| 91385 | 62386, // VPROLVQZ128rmbk |
| 91386 | 62391, // VPROLVQZ128rmbkz |
| 91387 | 62395, // VPROLVQZ128rmk |
| 91388 | 62400, // VPROLVQZ128rmkz |
| 91389 | 62404, // VPROLVQZ128rr |
| 91390 | 62407, // VPROLVQZ128rrk |
| 91391 | 62412, // VPROLVQZ128rrkz |
| 91392 | 62416, // VPROLVQZ256rm |
| 91393 | 62419, // VPROLVQZ256rmb |
| 91394 | 62422, // VPROLVQZ256rmbk |
| 91395 | 62427, // VPROLVQZ256rmbkz |
| 91396 | 62431, // VPROLVQZ256rmk |
| 91397 | 62436, // VPROLVQZ256rmkz |
| 91398 | 62440, // VPROLVQZ256rr |
| 91399 | 62443, // VPROLVQZ256rrk |
| 91400 | 62448, // VPROLVQZ256rrkz |
| 91401 | 62452, // VPROLVQZrm |
| 91402 | 62455, // VPROLVQZrmb |
| 91403 | 62458, // VPROLVQZrmbk |
| 91404 | 62463, // VPROLVQZrmbkz |
| 91405 | 62467, // VPROLVQZrmk |
| 91406 | 62472, // VPROLVQZrmkz |
| 91407 | 62476, // VPROLVQZrr |
| 91408 | 62479, // VPROLVQZrrk |
| 91409 | 62484, // VPROLVQZrrkz |
| 91410 | 62488, // VPRORDZ128mbi |
| 91411 | 62491, // VPRORDZ128mbik |
| 91412 | 62496, // VPRORDZ128mbikz |
| 91413 | 62500, // VPRORDZ128mi |
| 91414 | 62503, // VPRORDZ128mik |
| 91415 | 62508, // VPRORDZ128mikz |
| 91416 | 62512, // VPRORDZ128ri |
| 91417 | 62515, // VPRORDZ128rik |
| 91418 | 62520, // VPRORDZ128rikz |
| 91419 | 62524, // VPRORDZ256mbi |
| 91420 | 62527, // VPRORDZ256mbik |
| 91421 | 62532, // VPRORDZ256mbikz |
| 91422 | 62536, // VPRORDZ256mi |
| 91423 | 62539, // VPRORDZ256mik |
| 91424 | 62544, // VPRORDZ256mikz |
| 91425 | 62548, // VPRORDZ256ri |
| 91426 | 62551, // VPRORDZ256rik |
| 91427 | 62556, // VPRORDZ256rikz |
| 91428 | 62560, // VPRORDZmbi |
| 91429 | 62563, // VPRORDZmbik |
| 91430 | 62568, // VPRORDZmbikz |
| 91431 | 62572, // VPRORDZmi |
| 91432 | 62575, // VPRORDZmik |
| 91433 | 62580, // VPRORDZmikz |
| 91434 | 62584, // VPRORDZri |
| 91435 | 62587, // VPRORDZrik |
| 91436 | 62592, // VPRORDZrikz |
| 91437 | 62596, // VPRORQZ128mbi |
| 91438 | 62599, // VPRORQZ128mbik |
| 91439 | 62604, // VPRORQZ128mbikz |
| 91440 | 62608, // VPRORQZ128mi |
| 91441 | 62611, // VPRORQZ128mik |
| 91442 | 62616, // VPRORQZ128mikz |
| 91443 | 62620, // VPRORQZ128ri |
| 91444 | 62623, // VPRORQZ128rik |
| 91445 | 62628, // VPRORQZ128rikz |
| 91446 | 62632, // VPRORQZ256mbi |
| 91447 | 62635, // VPRORQZ256mbik |
| 91448 | 62640, // VPRORQZ256mbikz |
| 91449 | 62644, // VPRORQZ256mi |
| 91450 | 62647, // VPRORQZ256mik |
| 91451 | 62652, // VPRORQZ256mikz |
| 91452 | 62656, // VPRORQZ256ri |
| 91453 | 62659, // VPRORQZ256rik |
| 91454 | 62664, // VPRORQZ256rikz |
| 91455 | 62668, // VPRORQZmbi |
| 91456 | 62671, // VPRORQZmbik |
| 91457 | 62676, // VPRORQZmbikz |
| 91458 | 62680, // VPRORQZmi |
| 91459 | 62683, // VPRORQZmik |
| 91460 | 62688, // VPRORQZmikz |
| 91461 | 62692, // VPRORQZri |
| 91462 | 62695, // VPRORQZrik |
| 91463 | 62700, // VPRORQZrikz |
| 91464 | 62704, // VPRORVDZ128rm |
| 91465 | 62707, // VPRORVDZ128rmb |
| 91466 | 62710, // VPRORVDZ128rmbk |
| 91467 | 62715, // VPRORVDZ128rmbkz |
| 91468 | 62719, // VPRORVDZ128rmk |
| 91469 | 62724, // VPRORVDZ128rmkz |
| 91470 | 62728, // VPRORVDZ128rr |
| 91471 | 62731, // VPRORVDZ128rrk |
| 91472 | 62736, // VPRORVDZ128rrkz |
| 91473 | 62740, // VPRORVDZ256rm |
| 91474 | 62743, // VPRORVDZ256rmb |
| 91475 | 62746, // VPRORVDZ256rmbk |
| 91476 | 62751, // VPRORVDZ256rmbkz |
| 91477 | 62755, // VPRORVDZ256rmk |
| 91478 | 62760, // VPRORVDZ256rmkz |
| 91479 | 62764, // VPRORVDZ256rr |
| 91480 | 62767, // VPRORVDZ256rrk |
| 91481 | 62772, // VPRORVDZ256rrkz |
| 91482 | 62776, // VPRORVDZrm |
| 91483 | 62779, // VPRORVDZrmb |
| 91484 | 62782, // VPRORVDZrmbk |
| 91485 | 62787, // VPRORVDZrmbkz |
| 91486 | 62791, // VPRORVDZrmk |
| 91487 | 62796, // VPRORVDZrmkz |
| 91488 | 62800, // VPRORVDZrr |
| 91489 | 62803, // VPRORVDZrrk |
| 91490 | 62808, // VPRORVDZrrkz |
| 91491 | 62812, // VPRORVQZ128rm |
| 91492 | 62815, // VPRORVQZ128rmb |
| 91493 | 62818, // VPRORVQZ128rmbk |
| 91494 | 62823, // VPRORVQZ128rmbkz |
| 91495 | 62827, // VPRORVQZ128rmk |
| 91496 | 62832, // VPRORVQZ128rmkz |
| 91497 | 62836, // VPRORVQZ128rr |
| 91498 | 62839, // VPRORVQZ128rrk |
| 91499 | 62844, // VPRORVQZ128rrkz |
| 91500 | 62848, // VPRORVQZ256rm |
| 91501 | 62851, // VPRORVQZ256rmb |
| 91502 | 62854, // VPRORVQZ256rmbk |
| 91503 | 62859, // VPRORVQZ256rmbkz |
| 91504 | 62863, // VPRORVQZ256rmk |
| 91505 | 62868, // VPRORVQZ256rmkz |
| 91506 | 62872, // VPRORVQZ256rr |
| 91507 | 62875, // VPRORVQZ256rrk |
| 91508 | 62880, // VPRORVQZ256rrkz |
| 91509 | 62884, // VPRORVQZrm |
| 91510 | 62887, // VPRORVQZrmb |
| 91511 | 62890, // VPRORVQZrmbk |
| 91512 | 62895, // VPRORVQZrmbkz |
| 91513 | 62899, // VPRORVQZrmk |
| 91514 | 62904, // VPRORVQZrmkz |
| 91515 | 62908, // VPRORVQZrr |
| 91516 | 62911, // VPRORVQZrrk |
| 91517 | 62916, // VPRORVQZrrkz |
| 91518 | 62920, // VPROTBmi |
| 91519 | 62923, // VPROTBmr |
| 91520 | 62926, // VPROTBri |
| 91521 | 62929, // VPROTBrm |
| 91522 | 62932, // VPROTBrr |
| 91523 | 62935, // VPROTBrr_REV |
| 91524 | 62938, // VPROTDmi |
| 91525 | 62941, // VPROTDmr |
| 91526 | 62944, // VPROTDri |
| 91527 | 62947, // VPROTDrm |
| 91528 | 62950, // VPROTDrr |
| 91529 | 62953, // VPROTDrr_REV |
| 91530 | 62956, // VPROTQmi |
| 91531 | 62959, // VPROTQmr |
| 91532 | 62962, // VPROTQri |
| 91533 | 62965, // VPROTQrm |
| 91534 | 62968, // VPROTQrr |
| 91535 | 62971, // VPROTQrr_REV |
| 91536 | 62974, // VPROTWmi |
| 91537 | 62977, // VPROTWmr |
| 91538 | 62980, // VPROTWri |
| 91539 | 62983, // VPROTWrm |
| 91540 | 62986, // VPROTWrr |
| 91541 | 62989, // VPROTWrr_REV |
| 91542 | 62992, // VPSADBWYrm |
| 91543 | 62995, // VPSADBWYrr |
| 91544 | 62998, // VPSADBWZ128rm |
| 91545 | 63001, // VPSADBWZ128rr |
| 91546 | 63004, // VPSADBWZ256rm |
| 91547 | 63007, // VPSADBWZ256rr |
| 91548 | 63010, // VPSADBWZrm |
| 91549 | 63013, // VPSADBWZrr |
| 91550 | 63016, // VPSADBWrm |
| 91551 | 63019, // VPSADBWrr |
| 91552 | 63022, // VPSCATTERDDZ128mr |
| 91553 | 63026, // VPSCATTERDDZ256mr |
| 91554 | 63030, // VPSCATTERDDZmr |
| 91555 | 63034, // VPSCATTERDQZ128mr |
| 91556 | 63038, // VPSCATTERDQZ256mr |
| 91557 | 63042, // VPSCATTERDQZmr |
| 91558 | 63046, // VPSCATTERQDZ128mr |
| 91559 | 63050, // VPSCATTERQDZ256mr |
| 91560 | 63054, // VPSCATTERQDZmr |
| 91561 | 63058, // VPSCATTERQQZ128mr |
| 91562 | 63062, // VPSCATTERQQZ256mr |
| 91563 | 63066, // VPSCATTERQQZmr |
| 91564 | 63070, // VPSHABmr |
| 91565 | 63073, // VPSHABrm |
| 91566 | 63076, // VPSHABrr |
| 91567 | 63079, // VPSHABrr_REV |
| 91568 | 63082, // VPSHADmr |
| 91569 | 63085, // VPSHADrm |
| 91570 | 63088, // VPSHADrr |
| 91571 | 63091, // VPSHADrr_REV |
| 91572 | 63094, // VPSHAQmr |
| 91573 | 63097, // VPSHAQrm |
| 91574 | 63100, // VPSHAQrr |
| 91575 | 63103, // VPSHAQrr_REV |
| 91576 | 63106, // VPSHAWmr |
| 91577 | 63109, // VPSHAWrm |
| 91578 | 63112, // VPSHAWrr |
| 91579 | 63115, // VPSHAWrr_REV |
| 91580 | 63118, // VPSHLBmr |
| 91581 | 63121, // VPSHLBrm |
| 91582 | 63124, // VPSHLBrr |
| 91583 | 63127, // VPSHLBrr_REV |
| 91584 | 63130, // VPSHLDDZ128rmbi |
| 91585 | 63134, // VPSHLDDZ128rmbik |
| 91586 | 63140, // VPSHLDDZ128rmbikz |
| 91587 | 63145, // VPSHLDDZ128rmi |
| 91588 | 63149, // VPSHLDDZ128rmik |
| 91589 | 63155, // VPSHLDDZ128rmikz |
| 91590 | 63160, // VPSHLDDZ128rri |
| 91591 | 63164, // VPSHLDDZ128rrik |
| 91592 | 63170, // VPSHLDDZ128rrikz |
| 91593 | 63175, // VPSHLDDZ256rmbi |
| 91594 | 63179, // VPSHLDDZ256rmbik |
| 91595 | 63185, // VPSHLDDZ256rmbikz |
| 91596 | 63190, // VPSHLDDZ256rmi |
| 91597 | 63194, // VPSHLDDZ256rmik |
| 91598 | 63200, // VPSHLDDZ256rmikz |
| 91599 | 63205, // VPSHLDDZ256rri |
| 91600 | 63209, // VPSHLDDZ256rrik |
| 91601 | 63215, // VPSHLDDZ256rrikz |
| 91602 | 63220, // VPSHLDDZrmbi |
| 91603 | 63224, // VPSHLDDZrmbik |
| 91604 | 63230, // VPSHLDDZrmbikz |
| 91605 | 63235, // VPSHLDDZrmi |
| 91606 | 63239, // VPSHLDDZrmik |
| 91607 | 63245, // VPSHLDDZrmikz |
| 91608 | 63250, // VPSHLDDZrri |
| 91609 | 63254, // VPSHLDDZrrik |
| 91610 | 63260, // VPSHLDDZrrikz |
| 91611 | 63265, // VPSHLDQZ128rmbi |
| 91612 | 63269, // VPSHLDQZ128rmbik |
| 91613 | 63275, // VPSHLDQZ128rmbikz |
| 91614 | 63280, // VPSHLDQZ128rmi |
| 91615 | 63284, // VPSHLDQZ128rmik |
| 91616 | 63290, // VPSHLDQZ128rmikz |
| 91617 | 63295, // VPSHLDQZ128rri |
| 91618 | 63299, // VPSHLDQZ128rrik |
| 91619 | 63305, // VPSHLDQZ128rrikz |
| 91620 | 63310, // VPSHLDQZ256rmbi |
| 91621 | 63314, // VPSHLDQZ256rmbik |
| 91622 | 63320, // VPSHLDQZ256rmbikz |
| 91623 | 63325, // VPSHLDQZ256rmi |
| 91624 | 63329, // VPSHLDQZ256rmik |
| 91625 | 63335, // VPSHLDQZ256rmikz |
| 91626 | 63340, // VPSHLDQZ256rri |
| 91627 | 63344, // VPSHLDQZ256rrik |
| 91628 | 63350, // VPSHLDQZ256rrikz |
| 91629 | 63355, // VPSHLDQZrmbi |
| 91630 | 63359, // VPSHLDQZrmbik |
| 91631 | 63365, // VPSHLDQZrmbikz |
| 91632 | 63370, // VPSHLDQZrmi |
| 91633 | 63374, // VPSHLDQZrmik |
| 91634 | 63380, // VPSHLDQZrmikz |
| 91635 | 63385, // VPSHLDQZrri |
| 91636 | 63389, // VPSHLDQZrrik |
| 91637 | 63395, // VPSHLDQZrrikz |
| 91638 | 63400, // VPSHLDVDZ128m |
| 91639 | 63404, // VPSHLDVDZ128mb |
| 91640 | 63408, // VPSHLDVDZ128mbk |
| 91641 | 63413, // VPSHLDVDZ128mbkz |
| 91642 | 63418, // VPSHLDVDZ128mk |
| 91643 | 63423, // VPSHLDVDZ128mkz |
| 91644 | 63428, // VPSHLDVDZ128r |
| 91645 | 63432, // VPSHLDVDZ128rk |
| 91646 | 63437, // VPSHLDVDZ128rkz |
| 91647 | 63442, // VPSHLDVDZ256m |
| 91648 | 63446, // VPSHLDVDZ256mb |
| 91649 | 63450, // VPSHLDVDZ256mbk |
| 91650 | 63455, // VPSHLDVDZ256mbkz |
| 91651 | 63460, // VPSHLDVDZ256mk |
| 91652 | 63465, // VPSHLDVDZ256mkz |
| 91653 | 63470, // VPSHLDVDZ256r |
| 91654 | 63474, // VPSHLDVDZ256rk |
| 91655 | 63479, // VPSHLDVDZ256rkz |
| 91656 | 63484, // VPSHLDVDZm |
| 91657 | 63488, // VPSHLDVDZmb |
| 91658 | 63492, // VPSHLDVDZmbk |
| 91659 | 63497, // VPSHLDVDZmbkz |
| 91660 | 63502, // VPSHLDVDZmk |
| 91661 | 63507, // VPSHLDVDZmkz |
| 91662 | 63512, // VPSHLDVDZr |
| 91663 | 63516, // VPSHLDVDZrk |
| 91664 | 63521, // VPSHLDVDZrkz |
| 91665 | 63526, // VPSHLDVQZ128m |
| 91666 | 63530, // VPSHLDVQZ128mb |
| 91667 | 63534, // VPSHLDVQZ128mbk |
| 91668 | 63539, // VPSHLDVQZ128mbkz |
| 91669 | 63544, // VPSHLDVQZ128mk |
| 91670 | 63549, // VPSHLDVQZ128mkz |
| 91671 | 63554, // VPSHLDVQZ128r |
| 91672 | 63558, // VPSHLDVQZ128rk |
| 91673 | 63563, // VPSHLDVQZ128rkz |
| 91674 | 63568, // VPSHLDVQZ256m |
| 91675 | 63572, // VPSHLDVQZ256mb |
| 91676 | 63576, // VPSHLDVQZ256mbk |
| 91677 | 63581, // VPSHLDVQZ256mbkz |
| 91678 | 63586, // VPSHLDVQZ256mk |
| 91679 | 63591, // VPSHLDVQZ256mkz |
| 91680 | 63596, // VPSHLDVQZ256r |
| 91681 | 63600, // VPSHLDVQZ256rk |
| 91682 | 63605, // VPSHLDVQZ256rkz |
| 91683 | 63610, // VPSHLDVQZm |
| 91684 | 63614, // VPSHLDVQZmb |
| 91685 | 63618, // VPSHLDVQZmbk |
| 91686 | 63623, // VPSHLDVQZmbkz |
| 91687 | 63628, // VPSHLDVQZmk |
| 91688 | 63633, // VPSHLDVQZmkz |
| 91689 | 63638, // VPSHLDVQZr |
| 91690 | 63642, // VPSHLDVQZrk |
| 91691 | 63647, // VPSHLDVQZrkz |
| 91692 | 63652, // VPSHLDVWZ128m |
| 91693 | 63656, // VPSHLDVWZ128mk |
| 91694 | 63661, // VPSHLDVWZ128mkz |
| 91695 | 63666, // VPSHLDVWZ128r |
| 91696 | 63670, // VPSHLDVWZ128rk |
| 91697 | 63675, // VPSHLDVWZ128rkz |
| 91698 | 63680, // VPSHLDVWZ256m |
| 91699 | 63684, // VPSHLDVWZ256mk |
| 91700 | 63689, // VPSHLDVWZ256mkz |
| 91701 | 63694, // VPSHLDVWZ256r |
| 91702 | 63698, // VPSHLDVWZ256rk |
| 91703 | 63703, // VPSHLDVWZ256rkz |
| 91704 | 63708, // VPSHLDVWZm |
| 91705 | 63712, // VPSHLDVWZmk |
| 91706 | 63717, // VPSHLDVWZmkz |
| 91707 | 63722, // VPSHLDVWZr |
| 91708 | 63726, // VPSHLDVWZrk |
| 91709 | 63731, // VPSHLDVWZrkz |
| 91710 | 63736, // VPSHLDWZ128rmi |
| 91711 | 63740, // VPSHLDWZ128rmik |
| 91712 | 63746, // VPSHLDWZ128rmikz |
| 91713 | 63751, // VPSHLDWZ128rri |
| 91714 | 63755, // VPSHLDWZ128rrik |
| 91715 | 63761, // VPSHLDWZ128rrikz |
| 91716 | 63766, // VPSHLDWZ256rmi |
| 91717 | 63770, // VPSHLDWZ256rmik |
| 91718 | 63776, // VPSHLDWZ256rmikz |
| 91719 | 63781, // VPSHLDWZ256rri |
| 91720 | 63785, // VPSHLDWZ256rrik |
| 91721 | 63791, // VPSHLDWZ256rrikz |
| 91722 | 63796, // VPSHLDWZrmi |
| 91723 | 63800, // VPSHLDWZrmik |
| 91724 | 63806, // VPSHLDWZrmikz |
| 91725 | 63811, // VPSHLDWZrri |
| 91726 | 63815, // VPSHLDWZrrik |
| 91727 | 63821, // VPSHLDWZrrikz |
| 91728 | 63826, // VPSHLDmr |
| 91729 | 63829, // VPSHLDrm |
| 91730 | 63832, // VPSHLDrr |
| 91731 | 63835, // VPSHLDrr_REV |
| 91732 | 63838, // VPSHLQmr |
| 91733 | 63841, // VPSHLQrm |
| 91734 | 63844, // VPSHLQrr |
| 91735 | 63847, // VPSHLQrr_REV |
| 91736 | 63850, // VPSHLWmr |
| 91737 | 63853, // VPSHLWrm |
| 91738 | 63856, // VPSHLWrr |
| 91739 | 63859, // VPSHLWrr_REV |
| 91740 | 63862, // VPSHRDDZ128rmbi |
| 91741 | 63866, // VPSHRDDZ128rmbik |
| 91742 | 63872, // VPSHRDDZ128rmbikz |
| 91743 | 63877, // VPSHRDDZ128rmi |
| 91744 | 63881, // VPSHRDDZ128rmik |
| 91745 | 63887, // VPSHRDDZ128rmikz |
| 91746 | 63892, // VPSHRDDZ128rri |
| 91747 | 63896, // VPSHRDDZ128rrik |
| 91748 | 63902, // VPSHRDDZ128rrikz |
| 91749 | 63907, // VPSHRDDZ256rmbi |
| 91750 | 63911, // VPSHRDDZ256rmbik |
| 91751 | 63917, // VPSHRDDZ256rmbikz |
| 91752 | 63922, // VPSHRDDZ256rmi |
| 91753 | 63926, // VPSHRDDZ256rmik |
| 91754 | 63932, // VPSHRDDZ256rmikz |
| 91755 | 63937, // VPSHRDDZ256rri |
| 91756 | 63941, // VPSHRDDZ256rrik |
| 91757 | 63947, // VPSHRDDZ256rrikz |
| 91758 | 63952, // VPSHRDDZrmbi |
| 91759 | 63956, // VPSHRDDZrmbik |
| 91760 | 63962, // VPSHRDDZrmbikz |
| 91761 | 63967, // VPSHRDDZrmi |
| 91762 | 63971, // VPSHRDDZrmik |
| 91763 | 63977, // VPSHRDDZrmikz |
| 91764 | 63982, // VPSHRDDZrri |
| 91765 | 63986, // VPSHRDDZrrik |
| 91766 | 63992, // VPSHRDDZrrikz |
| 91767 | 63997, // VPSHRDQZ128rmbi |
| 91768 | 64001, // VPSHRDQZ128rmbik |
| 91769 | 64007, // VPSHRDQZ128rmbikz |
| 91770 | 64012, // VPSHRDQZ128rmi |
| 91771 | 64016, // VPSHRDQZ128rmik |
| 91772 | 64022, // VPSHRDQZ128rmikz |
| 91773 | 64027, // VPSHRDQZ128rri |
| 91774 | 64031, // VPSHRDQZ128rrik |
| 91775 | 64037, // VPSHRDQZ128rrikz |
| 91776 | 64042, // VPSHRDQZ256rmbi |
| 91777 | 64046, // VPSHRDQZ256rmbik |
| 91778 | 64052, // VPSHRDQZ256rmbikz |
| 91779 | 64057, // VPSHRDQZ256rmi |
| 91780 | 64061, // VPSHRDQZ256rmik |
| 91781 | 64067, // VPSHRDQZ256rmikz |
| 91782 | 64072, // VPSHRDQZ256rri |
| 91783 | 64076, // VPSHRDQZ256rrik |
| 91784 | 64082, // VPSHRDQZ256rrikz |
| 91785 | 64087, // VPSHRDQZrmbi |
| 91786 | 64091, // VPSHRDQZrmbik |
| 91787 | 64097, // VPSHRDQZrmbikz |
| 91788 | 64102, // VPSHRDQZrmi |
| 91789 | 64106, // VPSHRDQZrmik |
| 91790 | 64112, // VPSHRDQZrmikz |
| 91791 | 64117, // VPSHRDQZrri |
| 91792 | 64121, // VPSHRDQZrrik |
| 91793 | 64127, // VPSHRDQZrrikz |
| 91794 | 64132, // VPSHRDVDZ128m |
| 91795 | 64136, // VPSHRDVDZ128mb |
| 91796 | 64140, // VPSHRDVDZ128mbk |
| 91797 | 64145, // VPSHRDVDZ128mbkz |
| 91798 | 64150, // VPSHRDVDZ128mk |
| 91799 | 64155, // VPSHRDVDZ128mkz |
| 91800 | 64160, // VPSHRDVDZ128r |
| 91801 | 64164, // VPSHRDVDZ128rk |
| 91802 | 64169, // VPSHRDVDZ128rkz |
| 91803 | 64174, // VPSHRDVDZ256m |
| 91804 | 64178, // VPSHRDVDZ256mb |
| 91805 | 64182, // VPSHRDVDZ256mbk |
| 91806 | 64187, // VPSHRDVDZ256mbkz |
| 91807 | 64192, // VPSHRDVDZ256mk |
| 91808 | 64197, // VPSHRDVDZ256mkz |
| 91809 | 64202, // VPSHRDVDZ256r |
| 91810 | 64206, // VPSHRDVDZ256rk |
| 91811 | 64211, // VPSHRDVDZ256rkz |
| 91812 | 64216, // VPSHRDVDZm |
| 91813 | 64220, // VPSHRDVDZmb |
| 91814 | 64224, // VPSHRDVDZmbk |
| 91815 | 64229, // VPSHRDVDZmbkz |
| 91816 | 64234, // VPSHRDVDZmk |
| 91817 | 64239, // VPSHRDVDZmkz |
| 91818 | 64244, // VPSHRDVDZr |
| 91819 | 64248, // VPSHRDVDZrk |
| 91820 | 64253, // VPSHRDVDZrkz |
| 91821 | 64258, // VPSHRDVQZ128m |
| 91822 | 64262, // VPSHRDVQZ128mb |
| 91823 | 64266, // VPSHRDVQZ128mbk |
| 91824 | 64271, // VPSHRDVQZ128mbkz |
| 91825 | 64276, // VPSHRDVQZ128mk |
| 91826 | 64281, // VPSHRDVQZ128mkz |
| 91827 | 64286, // VPSHRDVQZ128r |
| 91828 | 64290, // VPSHRDVQZ128rk |
| 91829 | 64295, // VPSHRDVQZ128rkz |
| 91830 | 64300, // VPSHRDVQZ256m |
| 91831 | 64304, // VPSHRDVQZ256mb |
| 91832 | 64308, // VPSHRDVQZ256mbk |
| 91833 | 64313, // VPSHRDVQZ256mbkz |
| 91834 | 64318, // VPSHRDVQZ256mk |
| 91835 | 64323, // VPSHRDVQZ256mkz |
| 91836 | 64328, // VPSHRDVQZ256r |
| 91837 | 64332, // VPSHRDVQZ256rk |
| 91838 | 64337, // VPSHRDVQZ256rkz |
| 91839 | 64342, // VPSHRDVQZm |
| 91840 | 64346, // VPSHRDVQZmb |
| 91841 | 64350, // VPSHRDVQZmbk |
| 91842 | 64355, // VPSHRDVQZmbkz |
| 91843 | 64360, // VPSHRDVQZmk |
| 91844 | 64365, // VPSHRDVQZmkz |
| 91845 | 64370, // VPSHRDVQZr |
| 91846 | 64374, // VPSHRDVQZrk |
| 91847 | 64379, // VPSHRDVQZrkz |
| 91848 | 64384, // VPSHRDVWZ128m |
| 91849 | 64388, // VPSHRDVWZ128mk |
| 91850 | 64393, // VPSHRDVWZ128mkz |
| 91851 | 64398, // VPSHRDVWZ128r |
| 91852 | 64402, // VPSHRDVWZ128rk |
| 91853 | 64407, // VPSHRDVWZ128rkz |
| 91854 | 64412, // VPSHRDVWZ256m |
| 91855 | 64416, // VPSHRDVWZ256mk |
| 91856 | 64421, // VPSHRDVWZ256mkz |
| 91857 | 64426, // VPSHRDVWZ256r |
| 91858 | 64430, // VPSHRDVWZ256rk |
| 91859 | 64435, // VPSHRDVWZ256rkz |
| 91860 | 64440, // VPSHRDVWZm |
| 91861 | 64444, // VPSHRDVWZmk |
| 91862 | 64449, // VPSHRDVWZmkz |
| 91863 | 64454, // VPSHRDVWZr |
| 91864 | 64458, // VPSHRDVWZrk |
| 91865 | 64463, // VPSHRDVWZrkz |
| 91866 | 64468, // VPSHRDWZ128rmi |
| 91867 | 64472, // VPSHRDWZ128rmik |
| 91868 | 64478, // VPSHRDWZ128rmikz |
| 91869 | 64483, // VPSHRDWZ128rri |
| 91870 | 64487, // VPSHRDWZ128rrik |
| 91871 | 64493, // VPSHRDWZ128rrikz |
| 91872 | 64498, // VPSHRDWZ256rmi |
| 91873 | 64502, // VPSHRDWZ256rmik |
| 91874 | 64508, // VPSHRDWZ256rmikz |
| 91875 | 64513, // VPSHRDWZ256rri |
| 91876 | 64517, // VPSHRDWZ256rrik |
| 91877 | 64523, // VPSHRDWZ256rrikz |
| 91878 | 64528, // VPSHRDWZrmi |
| 91879 | 64532, // VPSHRDWZrmik |
| 91880 | 64538, // VPSHRDWZrmikz |
| 91881 | 64543, // VPSHRDWZrri |
| 91882 | 64547, // VPSHRDWZrrik |
| 91883 | 64553, // VPSHRDWZrrikz |
| 91884 | 64558, // VPSHUFBITQMBZ128rm |
| 91885 | 64561, // VPSHUFBITQMBZ128rmk |
| 91886 | 64565, // VPSHUFBITQMBZ128rr |
| 91887 | 64568, // VPSHUFBITQMBZ128rrk |
| 91888 | 64572, // VPSHUFBITQMBZ256rm |
| 91889 | 64575, // VPSHUFBITQMBZ256rmk |
| 91890 | 64579, // VPSHUFBITQMBZ256rr |
| 91891 | 64582, // VPSHUFBITQMBZ256rrk |
| 91892 | 64586, // VPSHUFBITQMBZrm |
| 91893 | 64589, // VPSHUFBITQMBZrmk |
| 91894 | 64593, // VPSHUFBITQMBZrr |
| 91895 | 64596, // VPSHUFBITQMBZrrk |
| 91896 | 64600, // VPSHUFBYrm |
| 91897 | 64603, // VPSHUFBYrr |
| 91898 | 64606, // VPSHUFBZ128rm |
| 91899 | 64609, // VPSHUFBZ128rmk |
| 91900 | 64614, // VPSHUFBZ128rmkz |
| 91901 | 64618, // VPSHUFBZ128rr |
| 91902 | 64621, // VPSHUFBZ128rrk |
| 91903 | 64626, // VPSHUFBZ128rrkz |
| 91904 | 64630, // VPSHUFBZ256rm |
| 91905 | 64633, // VPSHUFBZ256rmk |
| 91906 | 64638, // VPSHUFBZ256rmkz |
| 91907 | 64642, // VPSHUFBZ256rr |
| 91908 | 64645, // VPSHUFBZ256rrk |
| 91909 | 64650, // VPSHUFBZ256rrkz |
| 91910 | 64654, // VPSHUFBZrm |
| 91911 | 64657, // VPSHUFBZrmk |
| 91912 | 64662, // VPSHUFBZrmkz |
| 91913 | 64666, // VPSHUFBZrr |
| 91914 | 64669, // VPSHUFBZrrk |
| 91915 | 64674, // VPSHUFBZrrkz |
| 91916 | 64678, // VPSHUFBrm |
| 91917 | 64681, // VPSHUFBrr |
| 91918 | 64684, // VPSHUFDYmi |
| 91919 | 64687, // VPSHUFDYri |
| 91920 | 64690, // VPSHUFDZ128mbi |
| 91921 | 64693, // VPSHUFDZ128mbik |
| 91922 | 64698, // VPSHUFDZ128mbikz |
| 91923 | 64702, // VPSHUFDZ128mi |
| 91924 | 64705, // VPSHUFDZ128mik |
| 91925 | 64710, // VPSHUFDZ128mikz |
| 91926 | 64714, // VPSHUFDZ128ri |
| 91927 | 64717, // VPSHUFDZ128rik |
| 91928 | 64722, // VPSHUFDZ128rikz |
| 91929 | 64726, // VPSHUFDZ256mbi |
| 91930 | 64729, // VPSHUFDZ256mbik |
| 91931 | 64734, // VPSHUFDZ256mbikz |
| 91932 | 64738, // VPSHUFDZ256mi |
| 91933 | 64741, // VPSHUFDZ256mik |
| 91934 | 64746, // VPSHUFDZ256mikz |
| 91935 | 64750, // VPSHUFDZ256ri |
| 91936 | 64753, // VPSHUFDZ256rik |
| 91937 | 64758, // VPSHUFDZ256rikz |
| 91938 | 64762, // VPSHUFDZmbi |
| 91939 | 64765, // VPSHUFDZmbik |
| 91940 | 64770, // VPSHUFDZmbikz |
| 91941 | 64774, // VPSHUFDZmi |
| 91942 | 64777, // VPSHUFDZmik |
| 91943 | 64782, // VPSHUFDZmikz |
| 91944 | 64786, // VPSHUFDZri |
| 91945 | 64789, // VPSHUFDZrik |
| 91946 | 64794, // VPSHUFDZrikz |
| 91947 | 64798, // VPSHUFDmi |
| 91948 | 64801, // VPSHUFDri |
| 91949 | 64804, // VPSHUFHWYmi |
| 91950 | 64807, // VPSHUFHWYri |
| 91951 | 64810, // VPSHUFHWZ128mi |
| 91952 | 64813, // VPSHUFHWZ128mik |
| 91953 | 64818, // VPSHUFHWZ128mikz |
| 91954 | 64822, // VPSHUFHWZ128ri |
| 91955 | 64825, // VPSHUFHWZ128rik |
| 91956 | 64830, // VPSHUFHWZ128rikz |
| 91957 | 64834, // VPSHUFHWZ256mi |
| 91958 | 64837, // VPSHUFHWZ256mik |
| 91959 | 64842, // VPSHUFHWZ256mikz |
| 91960 | 64846, // VPSHUFHWZ256ri |
| 91961 | 64849, // VPSHUFHWZ256rik |
| 91962 | 64854, // VPSHUFHWZ256rikz |
| 91963 | 64858, // VPSHUFHWZmi |
| 91964 | 64861, // VPSHUFHWZmik |
| 91965 | 64866, // VPSHUFHWZmikz |
| 91966 | 64870, // VPSHUFHWZri |
| 91967 | 64873, // VPSHUFHWZrik |
| 91968 | 64878, // VPSHUFHWZrikz |
| 91969 | 64882, // VPSHUFHWmi |
| 91970 | 64885, // VPSHUFHWri |
| 91971 | 64888, // VPSHUFLWYmi |
| 91972 | 64891, // VPSHUFLWYri |
| 91973 | 64894, // VPSHUFLWZ128mi |
| 91974 | 64897, // VPSHUFLWZ128mik |
| 91975 | 64902, // VPSHUFLWZ128mikz |
| 91976 | 64906, // VPSHUFLWZ128ri |
| 91977 | 64909, // VPSHUFLWZ128rik |
| 91978 | 64914, // VPSHUFLWZ128rikz |
| 91979 | 64918, // VPSHUFLWZ256mi |
| 91980 | 64921, // VPSHUFLWZ256mik |
| 91981 | 64926, // VPSHUFLWZ256mikz |
| 91982 | 64930, // VPSHUFLWZ256ri |
| 91983 | 64933, // VPSHUFLWZ256rik |
| 91984 | 64938, // VPSHUFLWZ256rikz |
| 91985 | 64942, // VPSHUFLWZmi |
| 91986 | 64945, // VPSHUFLWZmik |
| 91987 | 64950, // VPSHUFLWZmikz |
| 91988 | 64954, // VPSHUFLWZri |
| 91989 | 64957, // VPSHUFLWZrik |
| 91990 | 64962, // VPSHUFLWZrikz |
| 91991 | 64966, // VPSHUFLWmi |
| 91992 | 64969, // VPSHUFLWri |
| 91993 | 64972, // VPSIGNBYrm |
| 91994 | 64975, // VPSIGNBYrr |
| 91995 | 64978, // VPSIGNBrm |
| 91996 | 64981, // VPSIGNBrr |
| 91997 | 64984, // VPSIGNDYrm |
| 91998 | 64987, // VPSIGNDYrr |
| 91999 | 64990, // VPSIGNDrm |
| 92000 | 64993, // VPSIGNDrr |
| 92001 | 64996, // VPSIGNWYrm |
| 92002 | 64999, // VPSIGNWYrr |
| 92003 | 65002, // VPSIGNWrm |
| 92004 | 65005, // VPSIGNWrr |
| 92005 | 65008, // VPSLLDQYri |
| 92006 | 65011, // VPSLLDQZ128mi |
| 92007 | 65014, // VPSLLDQZ128ri |
| 92008 | 65017, // VPSLLDQZ256mi |
| 92009 | 65020, // VPSLLDQZ256ri |
| 92010 | 65023, // VPSLLDQZmi |
| 92011 | 65026, // VPSLLDQZri |
| 92012 | 65029, // VPSLLDQri |
| 92013 | 65032, // VPSLLDYri |
| 92014 | 65035, // VPSLLDYrm |
| 92015 | 65038, // VPSLLDYrr |
| 92016 | 65041, // VPSLLDZ128mbi |
| 92017 | 65044, // VPSLLDZ128mbik |
| 92018 | 65049, // VPSLLDZ128mbikz |
| 92019 | 65053, // VPSLLDZ128mi |
| 92020 | 65056, // VPSLLDZ128mik |
| 92021 | 65061, // VPSLLDZ128mikz |
| 92022 | 65065, // VPSLLDZ128ri |
| 92023 | 65068, // VPSLLDZ128rik |
| 92024 | 65073, // VPSLLDZ128rikz |
| 92025 | 65077, // VPSLLDZ128rm |
| 92026 | 65080, // VPSLLDZ128rmk |
| 92027 | 65085, // VPSLLDZ128rmkz |
| 92028 | 65089, // VPSLLDZ128rr |
| 92029 | 65092, // VPSLLDZ128rrk |
| 92030 | 65097, // VPSLLDZ128rrkz |
| 92031 | 65101, // VPSLLDZ256mbi |
| 92032 | 65104, // VPSLLDZ256mbik |
| 92033 | 65109, // VPSLLDZ256mbikz |
| 92034 | 65113, // VPSLLDZ256mi |
| 92035 | 65116, // VPSLLDZ256mik |
| 92036 | 65121, // VPSLLDZ256mikz |
| 92037 | 65125, // VPSLLDZ256ri |
| 92038 | 65128, // VPSLLDZ256rik |
| 92039 | 65133, // VPSLLDZ256rikz |
| 92040 | 65137, // VPSLLDZ256rm |
| 92041 | 65140, // VPSLLDZ256rmk |
| 92042 | 65145, // VPSLLDZ256rmkz |
| 92043 | 65149, // VPSLLDZ256rr |
| 92044 | 65152, // VPSLLDZ256rrk |
| 92045 | 65157, // VPSLLDZ256rrkz |
| 92046 | 65161, // VPSLLDZmbi |
| 92047 | 65164, // VPSLLDZmbik |
| 92048 | 65169, // VPSLLDZmbikz |
| 92049 | 65173, // VPSLLDZmi |
| 92050 | 65176, // VPSLLDZmik |
| 92051 | 65181, // VPSLLDZmikz |
| 92052 | 65185, // VPSLLDZri |
| 92053 | 65188, // VPSLLDZrik |
| 92054 | 65193, // VPSLLDZrikz |
| 92055 | 65197, // VPSLLDZrm |
| 92056 | 65200, // VPSLLDZrmk |
| 92057 | 65205, // VPSLLDZrmkz |
| 92058 | 65209, // VPSLLDZrr |
| 92059 | 65212, // VPSLLDZrrk |
| 92060 | 65217, // VPSLLDZrrkz |
| 92061 | 65221, // VPSLLDri |
| 92062 | 65224, // VPSLLDrm |
| 92063 | 65227, // VPSLLDrr |
| 92064 | 65230, // VPSLLQYri |
| 92065 | 65233, // VPSLLQYrm |
| 92066 | 65236, // VPSLLQYrr |
| 92067 | 65239, // VPSLLQZ128mbi |
| 92068 | 65242, // VPSLLQZ128mbik |
| 92069 | 65247, // VPSLLQZ128mbikz |
| 92070 | 65251, // VPSLLQZ128mi |
| 92071 | 65254, // VPSLLQZ128mik |
| 92072 | 65259, // VPSLLQZ128mikz |
| 92073 | 65263, // VPSLLQZ128ri |
| 92074 | 65266, // VPSLLQZ128rik |
| 92075 | 65271, // VPSLLQZ128rikz |
| 92076 | 65275, // VPSLLQZ128rm |
| 92077 | 65278, // VPSLLQZ128rmk |
| 92078 | 65283, // VPSLLQZ128rmkz |
| 92079 | 65287, // VPSLLQZ128rr |
| 92080 | 65290, // VPSLLQZ128rrk |
| 92081 | 65295, // VPSLLQZ128rrkz |
| 92082 | 65299, // VPSLLQZ256mbi |
| 92083 | 65302, // VPSLLQZ256mbik |
| 92084 | 65307, // VPSLLQZ256mbikz |
| 92085 | 65311, // VPSLLQZ256mi |
| 92086 | 65314, // VPSLLQZ256mik |
| 92087 | 65319, // VPSLLQZ256mikz |
| 92088 | 65323, // VPSLLQZ256ri |
| 92089 | 65326, // VPSLLQZ256rik |
| 92090 | 65331, // VPSLLQZ256rikz |
| 92091 | 65335, // VPSLLQZ256rm |
| 92092 | 65338, // VPSLLQZ256rmk |
| 92093 | 65343, // VPSLLQZ256rmkz |
| 92094 | 65347, // VPSLLQZ256rr |
| 92095 | 65350, // VPSLLQZ256rrk |
| 92096 | 65355, // VPSLLQZ256rrkz |
| 92097 | 65359, // VPSLLQZmbi |
| 92098 | 65362, // VPSLLQZmbik |
| 92099 | 65367, // VPSLLQZmbikz |
| 92100 | 65371, // VPSLLQZmi |
| 92101 | 65374, // VPSLLQZmik |
| 92102 | 65379, // VPSLLQZmikz |
| 92103 | 65383, // VPSLLQZri |
| 92104 | 65386, // VPSLLQZrik |
| 92105 | 65391, // VPSLLQZrikz |
| 92106 | 65395, // VPSLLQZrm |
| 92107 | 65398, // VPSLLQZrmk |
| 92108 | 65403, // VPSLLQZrmkz |
| 92109 | 65407, // VPSLLQZrr |
| 92110 | 65410, // VPSLLQZrrk |
| 92111 | 65415, // VPSLLQZrrkz |
| 92112 | 65419, // VPSLLQri |
| 92113 | 65422, // VPSLLQrm |
| 92114 | 65425, // VPSLLQrr |
| 92115 | 65428, // VPSLLVDYrm |
| 92116 | 65431, // VPSLLVDYrr |
| 92117 | 65434, // VPSLLVDZ128rm |
| 92118 | 65437, // VPSLLVDZ128rmb |
| 92119 | 65440, // VPSLLVDZ128rmbk |
| 92120 | 65445, // VPSLLVDZ128rmbkz |
| 92121 | 65449, // VPSLLVDZ128rmk |
| 92122 | 65454, // VPSLLVDZ128rmkz |
| 92123 | 65458, // VPSLLVDZ128rr |
| 92124 | 65461, // VPSLLVDZ128rrk |
| 92125 | 65466, // VPSLLVDZ128rrkz |
| 92126 | 65470, // VPSLLVDZ256rm |
| 92127 | 65473, // VPSLLVDZ256rmb |
| 92128 | 65476, // VPSLLVDZ256rmbk |
| 92129 | 65481, // VPSLLVDZ256rmbkz |
| 92130 | 65485, // VPSLLVDZ256rmk |
| 92131 | 65490, // VPSLLVDZ256rmkz |
| 92132 | 65494, // VPSLLVDZ256rr |
| 92133 | 65497, // VPSLLVDZ256rrk |
| 92134 | 65502, // VPSLLVDZ256rrkz |
| 92135 | 65506, // VPSLLVDZrm |
| 92136 | 65509, // VPSLLVDZrmb |
| 92137 | 65512, // VPSLLVDZrmbk |
| 92138 | 65517, // VPSLLVDZrmbkz |
| 92139 | 65521, // VPSLLVDZrmk |
| 92140 | 65526, // VPSLLVDZrmkz |
| 92141 | 65530, // VPSLLVDZrr |
| 92142 | 65533, // VPSLLVDZrrk |
| 92143 | 65538, // VPSLLVDZrrkz |
| 92144 | 65542, // VPSLLVDrm |
| 92145 | 65545, // VPSLLVDrr |
| 92146 | 65548, // VPSLLVQYrm |
| 92147 | 65551, // VPSLLVQYrr |
| 92148 | 65554, // VPSLLVQZ128rm |
| 92149 | 65557, // VPSLLVQZ128rmb |
| 92150 | 65560, // VPSLLVQZ128rmbk |
| 92151 | 65565, // VPSLLVQZ128rmbkz |
| 92152 | 65569, // VPSLLVQZ128rmk |
| 92153 | 65574, // VPSLLVQZ128rmkz |
| 92154 | 65578, // VPSLLVQZ128rr |
| 92155 | 65581, // VPSLLVQZ128rrk |
| 92156 | 65586, // VPSLLVQZ128rrkz |
| 92157 | 65590, // VPSLLVQZ256rm |
| 92158 | 65593, // VPSLLVQZ256rmb |
| 92159 | 65596, // VPSLLVQZ256rmbk |
| 92160 | 65601, // VPSLLVQZ256rmbkz |
| 92161 | 65605, // VPSLLVQZ256rmk |
| 92162 | 65610, // VPSLLVQZ256rmkz |
| 92163 | 65614, // VPSLLVQZ256rr |
| 92164 | 65617, // VPSLLVQZ256rrk |
| 92165 | 65622, // VPSLLVQZ256rrkz |
| 92166 | 65626, // VPSLLVQZrm |
| 92167 | 65629, // VPSLLVQZrmb |
| 92168 | 65632, // VPSLLVQZrmbk |
| 92169 | 65637, // VPSLLVQZrmbkz |
| 92170 | 65641, // VPSLLVQZrmk |
| 92171 | 65646, // VPSLLVQZrmkz |
| 92172 | 65650, // VPSLLVQZrr |
| 92173 | 65653, // VPSLLVQZrrk |
| 92174 | 65658, // VPSLLVQZrrkz |
| 92175 | 65662, // VPSLLVQrm |
| 92176 | 65665, // VPSLLVQrr |
| 92177 | 65668, // VPSLLVWZ128rm |
| 92178 | 65671, // VPSLLVWZ128rmk |
| 92179 | 65676, // VPSLLVWZ128rmkz |
| 92180 | 65680, // VPSLLVWZ128rr |
| 92181 | 65683, // VPSLLVWZ128rrk |
| 92182 | 65688, // VPSLLVWZ128rrkz |
| 92183 | 65692, // VPSLLVWZ256rm |
| 92184 | 65695, // VPSLLVWZ256rmk |
| 92185 | 65700, // VPSLLVWZ256rmkz |
| 92186 | 65704, // VPSLLVWZ256rr |
| 92187 | 65707, // VPSLLVWZ256rrk |
| 92188 | 65712, // VPSLLVWZ256rrkz |
| 92189 | 65716, // VPSLLVWZrm |
| 92190 | 65719, // VPSLLVWZrmk |
| 92191 | 65724, // VPSLLVWZrmkz |
| 92192 | 65728, // VPSLLVWZrr |
| 92193 | 65731, // VPSLLVWZrrk |
| 92194 | 65736, // VPSLLVWZrrkz |
| 92195 | 65740, // VPSLLWYri |
| 92196 | 65743, // VPSLLWYrm |
| 92197 | 65746, // VPSLLWYrr |
| 92198 | 65749, // VPSLLWZ128mi |
| 92199 | 65752, // VPSLLWZ128mik |
| 92200 | 65757, // VPSLLWZ128mikz |
| 92201 | 65761, // VPSLLWZ128ri |
| 92202 | 65764, // VPSLLWZ128rik |
| 92203 | 65769, // VPSLLWZ128rikz |
| 92204 | 65773, // VPSLLWZ128rm |
| 92205 | 65776, // VPSLLWZ128rmk |
| 92206 | 65781, // VPSLLWZ128rmkz |
| 92207 | 65785, // VPSLLWZ128rr |
| 92208 | 65788, // VPSLLWZ128rrk |
| 92209 | 65793, // VPSLLWZ128rrkz |
| 92210 | 65797, // VPSLLWZ256mi |
| 92211 | 65800, // VPSLLWZ256mik |
| 92212 | 65805, // VPSLLWZ256mikz |
| 92213 | 65809, // VPSLLWZ256ri |
| 92214 | 65812, // VPSLLWZ256rik |
| 92215 | 65817, // VPSLLWZ256rikz |
| 92216 | 65821, // VPSLLWZ256rm |
| 92217 | 65824, // VPSLLWZ256rmk |
| 92218 | 65829, // VPSLLWZ256rmkz |
| 92219 | 65833, // VPSLLWZ256rr |
| 92220 | 65836, // VPSLLWZ256rrk |
| 92221 | 65841, // VPSLLWZ256rrkz |
| 92222 | 65845, // VPSLLWZmi |
| 92223 | 65848, // VPSLLWZmik |
| 92224 | 65853, // VPSLLWZmikz |
| 92225 | 65857, // VPSLLWZri |
| 92226 | 65860, // VPSLLWZrik |
| 92227 | 65865, // VPSLLWZrikz |
| 92228 | 65869, // VPSLLWZrm |
| 92229 | 65872, // VPSLLWZrmk |
| 92230 | 65877, // VPSLLWZrmkz |
| 92231 | 65881, // VPSLLWZrr |
| 92232 | 65884, // VPSLLWZrrk |
| 92233 | 65889, // VPSLLWZrrkz |
| 92234 | 65893, // VPSLLWri |
| 92235 | 65896, // VPSLLWrm |
| 92236 | 65899, // VPSLLWrr |
| 92237 | 65902, // VPSRADYri |
| 92238 | 65905, // VPSRADYrm |
| 92239 | 65908, // VPSRADYrr |
| 92240 | 65911, // VPSRADZ128mbi |
| 92241 | 65914, // VPSRADZ128mbik |
| 92242 | 65919, // VPSRADZ128mbikz |
| 92243 | 65923, // VPSRADZ128mi |
| 92244 | 65926, // VPSRADZ128mik |
| 92245 | 65931, // VPSRADZ128mikz |
| 92246 | 65935, // VPSRADZ128ri |
| 92247 | 65938, // VPSRADZ128rik |
| 92248 | 65943, // VPSRADZ128rikz |
| 92249 | 65947, // VPSRADZ128rm |
| 92250 | 65950, // VPSRADZ128rmk |
| 92251 | 65955, // VPSRADZ128rmkz |
| 92252 | 65959, // VPSRADZ128rr |
| 92253 | 65962, // VPSRADZ128rrk |
| 92254 | 65967, // VPSRADZ128rrkz |
| 92255 | 65971, // VPSRADZ256mbi |
| 92256 | 65974, // VPSRADZ256mbik |
| 92257 | 65979, // VPSRADZ256mbikz |
| 92258 | 65983, // VPSRADZ256mi |
| 92259 | 65986, // VPSRADZ256mik |
| 92260 | 65991, // VPSRADZ256mikz |
| 92261 | 65995, // VPSRADZ256ri |
| 92262 | 65998, // VPSRADZ256rik |
| 92263 | 66003, // VPSRADZ256rikz |
| 92264 | 66007, // VPSRADZ256rm |
| 92265 | 66010, // VPSRADZ256rmk |
| 92266 | 66015, // VPSRADZ256rmkz |
| 92267 | 66019, // VPSRADZ256rr |
| 92268 | 66022, // VPSRADZ256rrk |
| 92269 | 66027, // VPSRADZ256rrkz |
| 92270 | 66031, // VPSRADZmbi |
| 92271 | 66034, // VPSRADZmbik |
| 92272 | 66039, // VPSRADZmbikz |
| 92273 | 66043, // VPSRADZmi |
| 92274 | 66046, // VPSRADZmik |
| 92275 | 66051, // VPSRADZmikz |
| 92276 | 66055, // VPSRADZri |
| 92277 | 66058, // VPSRADZrik |
| 92278 | 66063, // VPSRADZrikz |
| 92279 | 66067, // VPSRADZrm |
| 92280 | 66070, // VPSRADZrmk |
| 92281 | 66075, // VPSRADZrmkz |
| 92282 | 66079, // VPSRADZrr |
| 92283 | 66082, // VPSRADZrrk |
| 92284 | 66087, // VPSRADZrrkz |
| 92285 | 66091, // VPSRADri |
| 92286 | 66094, // VPSRADrm |
| 92287 | 66097, // VPSRADrr |
| 92288 | 66100, // VPSRAQZ128mbi |
| 92289 | 66103, // VPSRAQZ128mbik |
| 92290 | 66108, // VPSRAQZ128mbikz |
| 92291 | 66112, // VPSRAQZ128mi |
| 92292 | 66115, // VPSRAQZ128mik |
| 92293 | 66120, // VPSRAQZ128mikz |
| 92294 | 66124, // VPSRAQZ128ri |
| 92295 | 66127, // VPSRAQZ128rik |
| 92296 | 66132, // VPSRAQZ128rikz |
| 92297 | 66136, // VPSRAQZ128rm |
| 92298 | 66139, // VPSRAQZ128rmk |
| 92299 | 66144, // VPSRAQZ128rmkz |
| 92300 | 66148, // VPSRAQZ128rr |
| 92301 | 66151, // VPSRAQZ128rrk |
| 92302 | 66156, // VPSRAQZ128rrkz |
| 92303 | 66160, // VPSRAQZ256mbi |
| 92304 | 66163, // VPSRAQZ256mbik |
| 92305 | 66168, // VPSRAQZ256mbikz |
| 92306 | 66172, // VPSRAQZ256mi |
| 92307 | 66175, // VPSRAQZ256mik |
| 92308 | 66180, // VPSRAQZ256mikz |
| 92309 | 66184, // VPSRAQZ256ri |
| 92310 | 66187, // VPSRAQZ256rik |
| 92311 | 66192, // VPSRAQZ256rikz |
| 92312 | 66196, // VPSRAQZ256rm |
| 92313 | 66199, // VPSRAQZ256rmk |
| 92314 | 66204, // VPSRAQZ256rmkz |
| 92315 | 66208, // VPSRAQZ256rr |
| 92316 | 66211, // VPSRAQZ256rrk |
| 92317 | 66216, // VPSRAQZ256rrkz |
| 92318 | 66220, // VPSRAQZmbi |
| 92319 | 66223, // VPSRAQZmbik |
| 92320 | 66228, // VPSRAQZmbikz |
| 92321 | 66232, // VPSRAQZmi |
| 92322 | 66235, // VPSRAQZmik |
| 92323 | 66240, // VPSRAQZmikz |
| 92324 | 66244, // VPSRAQZri |
| 92325 | 66247, // VPSRAQZrik |
| 92326 | 66252, // VPSRAQZrikz |
| 92327 | 66256, // VPSRAQZrm |
| 92328 | 66259, // VPSRAQZrmk |
| 92329 | 66264, // VPSRAQZrmkz |
| 92330 | 66268, // VPSRAQZrr |
| 92331 | 66271, // VPSRAQZrrk |
| 92332 | 66276, // VPSRAQZrrkz |
| 92333 | 66280, // VPSRAVDYrm |
| 92334 | 66283, // VPSRAVDYrr |
| 92335 | 66286, // VPSRAVDZ128rm |
| 92336 | 66289, // VPSRAVDZ128rmb |
| 92337 | 66292, // VPSRAVDZ128rmbk |
| 92338 | 66297, // VPSRAVDZ128rmbkz |
| 92339 | 66301, // VPSRAVDZ128rmk |
| 92340 | 66306, // VPSRAVDZ128rmkz |
| 92341 | 66310, // VPSRAVDZ128rr |
| 92342 | 66313, // VPSRAVDZ128rrk |
| 92343 | 66318, // VPSRAVDZ128rrkz |
| 92344 | 66322, // VPSRAVDZ256rm |
| 92345 | 66325, // VPSRAVDZ256rmb |
| 92346 | 66328, // VPSRAVDZ256rmbk |
| 92347 | 66333, // VPSRAVDZ256rmbkz |
| 92348 | 66337, // VPSRAVDZ256rmk |
| 92349 | 66342, // VPSRAVDZ256rmkz |
| 92350 | 66346, // VPSRAVDZ256rr |
| 92351 | 66349, // VPSRAVDZ256rrk |
| 92352 | 66354, // VPSRAVDZ256rrkz |
| 92353 | 66358, // VPSRAVDZrm |
| 92354 | 66361, // VPSRAVDZrmb |
| 92355 | 66364, // VPSRAVDZrmbk |
| 92356 | 66369, // VPSRAVDZrmbkz |
| 92357 | 66373, // VPSRAVDZrmk |
| 92358 | 66378, // VPSRAVDZrmkz |
| 92359 | 66382, // VPSRAVDZrr |
| 92360 | 66385, // VPSRAVDZrrk |
| 92361 | 66390, // VPSRAVDZrrkz |
| 92362 | 66394, // VPSRAVDrm |
| 92363 | 66397, // VPSRAVDrr |
| 92364 | 66400, // VPSRAVQZ128rm |
| 92365 | 66403, // VPSRAVQZ128rmb |
| 92366 | 66406, // VPSRAVQZ128rmbk |
| 92367 | 66411, // VPSRAVQZ128rmbkz |
| 92368 | 66415, // VPSRAVQZ128rmk |
| 92369 | 66420, // VPSRAVQZ128rmkz |
| 92370 | 66424, // VPSRAVQZ128rr |
| 92371 | 66427, // VPSRAVQZ128rrk |
| 92372 | 66432, // VPSRAVQZ128rrkz |
| 92373 | 66436, // VPSRAVQZ256rm |
| 92374 | 66439, // VPSRAVQZ256rmb |
| 92375 | 66442, // VPSRAVQZ256rmbk |
| 92376 | 66447, // VPSRAVQZ256rmbkz |
| 92377 | 66451, // VPSRAVQZ256rmk |
| 92378 | 66456, // VPSRAVQZ256rmkz |
| 92379 | 66460, // VPSRAVQZ256rr |
| 92380 | 66463, // VPSRAVQZ256rrk |
| 92381 | 66468, // VPSRAVQZ256rrkz |
| 92382 | 66472, // VPSRAVQZrm |
| 92383 | 66475, // VPSRAVQZrmb |
| 92384 | 66478, // VPSRAVQZrmbk |
| 92385 | 66483, // VPSRAVQZrmbkz |
| 92386 | 66487, // VPSRAVQZrmk |
| 92387 | 66492, // VPSRAVQZrmkz |
| 92388 | 66496, // VPSRAVQZrr |
| 92389 | 66499, // VPSRAVQZrrk |
| 92390 | 66504, // VPSRAVQZrrkz |
| 92391 | 66508, // VPSRAVWZ128rm |
| 92392 | 66511, // VPSRAVWZ128rmk |
| 92393 | 66516, // VPSRAVWZ128rmkz |
| 92394 | 66520, // VPSRAVWZ128rr |
| 92395 | 66523, // VPSRAVWZ128rrk |
| 92396 | 66528, // VPSRAVWZ128rrkz |
| 92397 | 66532, // VPSRAVWZ256rm |
| 92398 | 66535, // VPSRAVWZ256rmk |
| 92399 | 66540, // VPSRAVWZ256rmkz |
| 92400 | 66544, // VPSRAVWZ256rr |
| 92401 | 66547, // VPSRAVWZ256rrk |
| 92402 | 66552, // VPSRAVWZ256rrkz |
| 92403 | 66556, // VPSRAVWZrm |
| 92404 | 66559, // VPSRAVWZrmk |
| 92405 | 66564, // VPSRAVWZrmkz |
| 92406 | 66568, // VPSRAVWZrr |
| 92407 | 66571, // VPSRAVWZrrk |
| 92408 | 66576, // VPSRAVWZrrkz |
| 92409 | 66580, // VPSRAWYri |
| 92410 | 66583, // VPSRAWYrm |
| 92411 | 66586, // VPSRAWYrr |
| 92412 | 66589, // VPSRAWZ128mi |
| 92413 | 66592, // VPSRAWZ128mik |
| 92414 | 66597, // VPSRAWZ128mikz |
| 92415 | 66601, // VPSRAWZ128ri |
| 92416 | 66604, // VPSRAWZ128rik |
| 92417 | 66609, // VPSRAWZ128rikz |
| 92418 | 66613, // VPSRAWZ128rm |
| 92419 | 66616, // VPSRAWZ128rmk |
| 92420 | 66621, // VPSRAWZ128rmkz |
| 92421 | 66625, // VPSRAWZ128rr |
| 92422 | 66628, // VPSRAWZ128rrk |
| 92423 | 66633, // VPSRAWZ128rrkz |
| 92424 | 66637, // VPSRAWZ256mi |
| 92425 | 66640, // VPSRAWZ256mik |
| 92426 | 66645, // VPSRAWZ256mikz |
| 92427 | 66649, // VPSRAWZ256ri |
| 92428 | 66652, // VPSRAWZ256rik |
| 92429 | 66657, // VPSRAWZ256rikz |
| 92430 | 66661, // VPSRAWZ256rm |
| 92431 | 66664, // VPSRAWZ256rmk |
| 92432 | 66669, // VPSRAWZ256rmkz |
| 92433 | 66673, // VPSRAWZ256rr |
| 92434 | 66676, // VPSRAWZ256rrk |
| 92435 | 66681, // VPSRAWZ256rrkz |
| 92436 | 66685, // VPSRAWZmi |
| 92437 | 66688, // VPSRAWZmik |
| 92438 | 66693, // VPSRAWZmikz |
| 92439 | 66697, // VPSRAWZri |
| 92440 | 66700, // VPSRAWZrik |
| 92441 | 66705, // VPSRAWZrikz |
| 92442 | 66709, // VPSRAWZrm |
| 92443 | 66712, // VPSRAWZrmk |
| 92444 | 66717, // VPSRAWZrmkz |
| 92445 | 66721, // VPSRAWZrr |
| 92446 | 66724, // VPSRAWZrrk |
| 92447 | 66729, // VPSRAWZrrkz |
| 92448 | 66733, // VPSRAWri |
| 92449 | 66736, // VPSRAWrm |
| 92450 | 66739, // VPSRAWrr |
| 92451 | 66742, // VPSRLDQYri |
| 92452 | 66745, // VPSRLDQZ128mi |
| 92453 | 66748, // VPSRLDQZ128ri |
| 92454 | 66751, // VPSRLDQZ256mi |
| 92455 | 66754, // VPSRLDQZ256ri |
| 92456 | 66757, // VPSRLDQZmi |
| 92457 | 66760, // VPSRLDQZri |
| 92458 | 66763, // VPSRLDQri |
| 92459 | 66766, // VPSRLDYri |
| 92460 | 66769, // VPSRLDYrm |
| 92461 | 66772, // VPSRLDYrr |
| 92462 | 66775, // VPSRLDZ128mbi |
| 92463 | 66778, // VPSRLDZ128mbik |
| 92464 | 66783, // VPSRLDZ128mbikz |
| 92465 | 66787, // VPSRLDZ128mi |
| 92466 | 66790, // VPSRLDZ128mik |
| 92467 | 66795, // VPSRLDZ128mikz |
| 92468 | 66799, // VPSRLDZ128ri |
| 92469 | 66802, // VPSRLDZ128rik |
| 92470 | 66807, // VPSRLDZ128rikz |
| 92471 | 66811, // VPSRLDZ128rm |
| 92472 | 66814, // VPSRLDZ128rmk |
| 92473 | 66819, // VPSRLDZ128rmkz |
| 92474 | 66823, // VPSRLDZ128rr |
| 92475 | 66826, // VPSRLDZ128rrk |
| 92476 | 66831, // VPSRLDZ128rrkz |
| 92477 | 66835, // VPSRLDZ256mbi |
| 92478 | 66838, // VPSRLDZ256mbik |
| 92479 | 66843, // VPSRLDZ256mbikz |
| 92480 | 66847, // VPSRLDZ256mi |
| 92481 | 66850, // VPSRLDZ256mik |
| 92482 | 66855, // VPSRLDZ256mikz |
| 92483 | 66859, // VPSRLDZ256ri |
| 92484 | 66862, // VPSRLDZ256rik |
| 92485 | 66867, // VPSRLDZ256rikz |
| 92486 | 66871, // VPSRLDZ256rm |
| 92487 | 66874, // VPSRLDZ256rmk |
| 92488 | 66879, // VPSRLDZ256rmkz |
| 92489 | 66883, // VPSRLDZ256rr |
| 92490 | 66886, // VPSRLDZ256rrk |
| 92491 | 66891, // VPSRLDZ256rrkz |
| 92492 | 66895, // VPSRLDZmbi |
| 92493 | 66898, // VPSRLDZmbik |
| 92494 | 66903, // VPSRLDZmbikz |
| 92495 | 66907, // VPSRLDZmi |
| 92496 | 66910, // VPSRLDZmik |
| 92497 | 66915, // VPSRLDZmikz |
| 92498 | 66919, // VPSRLDZri |
| 92499 | 66922, // VPSRLDZrik |
| 92500 | 66927, // VPSRLDZrikz |
| 92501 | 66931, // VPSRLDZrm |
| 92502 | 66934, // VPSRLDZrmk |
| 92503 | 66939, // VPSRLDZrmkz |
| 92504 | 66943, // VPSRLDZrr |
| 92505 | 66946, // VPSRLDZrrk |
| 92506 | 66951, // VPSRLDZrrkz |
| 92507 | 66955, // VPSRLDri |
| 92508 | 66958, // VPSRLDrm |
| 92509 | 66961, // VPSRLDrr |
| 92510 | 66964, // VPSRLQYri |
| 92511 | 66967, // VPSRLQYrm |
| 92512 | 66970, // VPSRLQYrr |
| 92513 | 66973, // VPSRLQZ128mbi |
| 92514 | 66976, // VPSRLQZ128mbik |
| 92515 | 66981, // VPSRLQZ128mbikz |
| 92516 | 66985, // VPSRLQZ128mi |
| 92517 | 66988, // VPSRLQZ128mik |
| 92518 | 66993, // VPSRLQZ128mikz |
| 92519 | 66997, // VPSRLQZ128ri |
| 92520 | 67000, // VPSRLQZ128rik |
| 92521 | 67005, // VPSRLQZ128rikz |
| 92522 | 67009, // VPSRLQZ128rm |
| 92523 | 67012, // VPSRLQZ128rmk |
| 92524 | 67017, // VPSRLQZ128rmkz |
| 92525 | 67021, // VPSRLQZ128rr |
| 92526 | 67024, // VPSRLQZ128rrk |
| 92527 | 67029, // VPSRLQZ128rrkz |
| 92528 | 67033, // VPSRLQZ256mbi |
| 92529 | 67036, // VPSRLQZ256mbik |
| 92530 | 67041, // VPSRLQZ256mbikz |
| 92531 | 67045, // VPSRLQZ256mi |
| 92532 | 67048, // VPSRLQZ256mik |
| 92533 | 67053, // VPSRLQZ256mikz |
| 92534 | 67057, // VPSRLQZ256ri |
| 92535 | 67060, // VPSRLQZ256rik |
| 92536 | 67065, // VPSRLQZ256rikz |
| 92537 | 67069, // VPSRLQZ256rm |
| 92538 | 67072, // VPSRLQZ256rmk |
| 92539 | 67077, // VPSRLQZ256rmkz |
| 92540 | 67081, // VPSRLQZ256rr |
| 92541 | 67084, // VPSRLQZ256rrk |
| 92542 | 67089, // VPSRLQZ256rrkz |
| 92543 | 67093, // VPSRLQZmbi |
| 92544 | 67096, // VPSRLQZmbik |
| 92545 | 67101, // VPSRLQZmbikz |
| 92546 | 67105, // VPSRLQZmi |
| 92547 | 67108, // VPSRLQZmik |
| 92548 | 67113, // VPSRLQZmikz |
| 92549 | 67117, // VPSRLQZri |
| 92550 | 67120, // VPSRLQZrik |
| 92551 | 67125, // VPSRLQZrikz |
| 92552 | 67129, // VPSRLQZrm |
| 92553 | 67132, // VPSRLQZrmk |
| 92554 | 67137, // VPSRLQZrmkz |
| 92555 | 67141, // VPSRLQZrr |
| 92556 | 67144, // VPSRLQZrrk |
| 92557 | 67149, // VPSRLQZrrkz |
| 92558 | 67153, // VPSRLQri |
| 92559 | 67156, // VPSRLQrm |
| 92560 | 67159, // VPSRLQrr |
| 92561 | 67162, // VPSRLVDYrm |
| 92562 | 67165, // VPSRLVDYrr |
| 92563 | 67168, // VPSRLVDZ128rm |
| 92564 | 67171, // VPSRLVDZ128rmb |
| 92565 | 67174, // VPSRLVDZ128rmbk |
| 92566 | 67179, // VPSRLVDZ128rmbkz |
| 92567 | 67183, // VPSRLVDZ128rmk |
| 92568 | 67188, // VPSRLVDZ128rmkz |
| 92569 | 67192, // VPSRLVDZ128rr |
| 92570 | 67195, // VPSRLVDZ128rrk |
| 92571 | 67200, // VPSRLVDZ128rrkz |
| 92572 | 67204, // VPSRLVDZ256rm |
| 92573 | 67207, // VPSRLVDZ256rmb |
| 92574 | 67210, // VPSRLVDZ256rmbk |
| 92575 | 67215, // VPSRLVDZ256rmbkz |
| 92576 | 67219, // VPSRLVDZ256rmk |
| 92577 | 67224, // VPSRLVDZ256rmkz |
| 92578 | 67228, // VPSRLVDZ256rr |
| 92579 | 67231, // VPSRLVDZ256rrk |
| 92580 | 67236, // VPSRLVDZ256rrkz |
| 92581 | 67240, // VPSRLVDZrm |
| 92582 | 67243, // VPSRLVDZrmb |
| 92583 | 67246, // VPSRLVDZrmbk |
| 92584 | 67251, // VPSRLVDZrmbkz |
| 92585 | 67255, // VPSRLVDZrmk |
| 92586 | 67260, // VPSRLVDZrmkz |
| 92587 | 67264, // VPSRLVDZrr |
| 92588 | 67267, // VPSRLVDZrrk |
| 92589 | 67272, // VPSRLVDZrrkz |
| 92590 | 67276, // VPSRLVDrm |
| 92591 | 67279, // VPSRLVDrr |
| 92592 | 67282, // VPSRLVQYrm |
| 92593 | 67285, // VPSRLVQYrr |
| 92594 | 67288, // VPSRLVQZ128rm |
| 92595 | 67291, // VPSRLVQZ128rmb |
| 92596 | 67294, // VPSRLVQZ128rmbk |
| 92597 | 67299, // VPSRLVQZ128rmbkz |
| 92598 | 67303, // VPSRLVQZ128rmk |
| 92599 | 67308, // VPSRLVQZ128rmkz |
| 92600 | 67312, // VPSRLVQZ128rr |
| 92601 | 67315, // VPSRLVQZ128rrk |
| 92602 | 67320, // VPSRLVQZ128rrkz |
| 92603 | 67324, // VPSRLVQZ256rm |
| 92604 | 67327, // VPSRLVQZ256rmb |
| 92605 | 67330, // VPSRLVQZ256rmbk |
| 92606 | 67335, // VPSRLVQZ256rmbkz |
| 92607 | 67339, // VPSRLVQZ256rmk |
| 92608 | 67344, // VPSRLVQZ256rmkz |
| 92609 | 67348, // VPSRLVQZ256rr |
| 92610 | 67351, // VPSRLVQZ256rrk |
| 92611 | 67356, // VPSRLVQZ256rrkz |
| 92612 | 67360, // VPSRLVQZrm |
| 92613 | 67363, // VPSRLVQZrmb |
| 92614 | 67366, // VPSRLVQZrmbk |
| 92615 | 67371, // VPSRLVQZrmbkz |
| 92616 | 67375, // VPSRLVQZrmk |
| 92617 | 67380, // VPSRLVQZrmkz |
| 92618 | 67384, // VPSRLVQZrr |
| 92619 | 67387, // VPSRLVQZrrk |
| 92620 | 67392, // VPSRLVQZrrkz |
| 92621 | 67396, // VPSRLVQrm |
| 92622 | 67399, // VPSRLVQrr |
| 92623 | 67402, // VPSRLVWZ128rm |
| 92624 | 67405, // VPSRLVWZ128rmk |
| 92625 | 67410, // VPSRLVWZ128rmkz |
| 92626 | 67414, // VPSRLVWZ128rr |
| 92627 | 67417, // VPSRLVWZ128rrk |
| 92628 | 67422, // VPSRLVWZ128rrkz |
| 92629 | 67426, // VPSRLVWZ256rm |
| 92630 | 67429, // VPSRLVWZ256rmk |
| 92631 | 67434, // VPSRLVWZ256rmkz |
| 92632 | 67438, // VPSRLVWZ256rr |
| 92633 | 67441, // VPSRLVWZ256rrk |
| 92634 | 67446, // VPSRLVWZ256rrkz |
| 92635 | 67450, // VPSRLVWZrm |
| 92636 | 67453, // VPSRLVWZrmk |
| 92637 | 67458, // VPSRLVWZrmkz |
| 92638 | 67462, // VPSRLVWZrr |
| 92639 | 67465, // VPSRLVWZrrk |
| 92640 | 67470, // VPSRLVWZrrkz |
| 92641 | 67474, // VPSRLWYri |
| 92642 | 67477, // VPSRLWYrm |
| 92643 | 67480, // VPSRLWYrr |
| 92644 | 67483, // VPSRLWZ128mi |
| 92645 | 67486, // VPSRLWZ128mik |
| 92646 | 67491, // VPSRLWZ128mikz |
| 92647 | 67495, // VPSRLWZ128ri |
| 92648 | 67498, // VPSRLWZ128rik |
| 92649 | 67503, // VPSRLWZ128rikz |
| 92650 | 67507, // VPSRLWZ128rm |
| 92651 | 67510, // VPSRLWZ128rmk |
| 92652 | 67515, // VPSRLWZ128rmkz |
| 92653 | 67519, // VPSRLWZ128rr |
| 92654 | 67522, // VPSRLWZ128rrk |
| 92655 | 67527, // VPSRLWZ128rrkz |
| 92656 | 67531, // VPSRLWZ256mi |
| 92657 | 67534, // VPSRLWZ256mik |
| 92658 | 67539, // VPSRLWZ256mikz |
| 92659 | 67543, // VPSRLWZ256ri |
| 92660 | 67546, // VPSRLWZ256rik |
| 92661 | 67551, // VPSRLWZ256rikz |
| 92662 | 67555, // VPSRLWZ256rm |
| 92663 | 67558, // VPSRLWZ256rmk |
| 92664 | 67563, // VPSRLWZ256rmkz |
| 92665 | 67567, // VPSRLWZ256rr |
| 92666 | 67570, // VPSRLWZ256rrk |
| 92667 | 67575, // VPSRLWZ256rrkz |
| 92668 | 67579, // VPSRLWZmi |
| 92669 | 67582, // VPSRLWZmik |
| 92670 | 67587, // VPSRLWZmikz |
| 92671 | 67591, // VPSRLWZri |
| 92672 | 67594, // VPSRLWZrik |
| 92673 | 67599, // VPSRLWZrikz |
| 92674 | 67603, // VPSRLWZrm |
| 92675 | 67606, // VPSRLWZrmk |
| 92676 | 67611, // VPSRLWZrmkz |
| 92677 | 67615, // VPSRLWZrr |
| 92678 | 67618, // VPSRLWZrrk |
| 92679 | 67623, // VPSRLWZrrkz |
| 92680 | 67627, // VPSRLWri |
| 92681 | 67630, // VPSRLWrm |
| 92682 | 67633, // VPSRLWrr |
| 92683 | 67636, // VPSUBBYrm |
| 92684 | 67639, // VPSUBBYrr |
| 92685 | 67642, // VPSUBBZ128rm |
| 92686 | 67645, // VPSUBBZ128rmk |
| 92687 | 67650, // VPSUBBZ128rmkz |
| 92688 | 67654, // VPSUBBZ128rr |
| 92689 | 67657, // VPSUBBZ128rrk |
| 92690 | 67662, // VPSUBBZ128rrkz |
| 92691 | 67666, // VPSUBBZ256rm |
| 92692 | 67669, // VPSUBBZ256rmk |
| 92693 | 67674, // VPSUBBZ256rmkz |
| 92694 | 67678, // VPSUBBZ256rr |
| 92695 | 67681, // VPSUBBZ256rrk |
| 92696 | 67686, // VPSUBBZ256rrkz |
| 92697 | 67690, // VPSUBBZrm |
| 92698 | 67693, // VPSUBBZrmk |
| 92699 | 67698, // VPSUBBZrmkz |
| 92700 | 67702, // VPSUBBZrr |
| 92701 | 67705, // VPSUBBZrrk |
| 92702 | 67710, // VPSUBBZrrkz |
| 92703 | 67714, // VPSUBBrm |
| 92704 | 67717, // VPSUBBrr |
| 92705 | 67720, // VPSUBDYrm |
| 92706 | 67723, // VPSUBDYrr |
| 92707 | 67726, // VPSUBDZ128rm |
| 92708 | 67729, // VPSUBDZ128rmb |
| 92709 | 67732, // VPSUBDZ128rmbk |
| 92710 | 67737, // VPSUBDZ128rmbkz |
| 92711 | 67741, // VPSUBDZ128rmk |
| 92712 | 67746, // VPSUBDZ128rmkz |
| 92713 | 67750, // VPSUBDZ128rr |
| 92714 | 67753, // VPSUBDZ128rrk |
| 92715 | 67758, // VPSUBDZ128rrkz |
| 92716 | 67762, // VPSUBDZ256rm |
| 92717 | 67765, // VPSUBDZ256rmb |
| 92718 | 67768, // VPSUBDZ256rmbk |
| 92719 | 67773, // VPSUBDZ256rmbkz |
| 92720 | 67777, // VPSUBDZ256rmk |
| 92721 | 67782, // VPSUBDZ256rmkz |
| 92722 | 67786, // VPSUBDZ256rr |
| 92723 | 67789, // VPSUBDZ256rrk |
| 92724 | 67794, // VPSUBDZ256rrkz |
| 92725 | 67798, // VPSUBDZrm |
| 92726 | 67801, // VPSUBDZrmb |
| 92727 | 67804, // VPSUBDZrmbk |
| 92728 | 67809, // VPSUBDZrmbkz |
| 92729 | 67813, // VPSUBDZrmk |
| 92730 | 67818, // VPSUBDZrmkz |
| 92731 | 67822, // VPSUBDZrr |
| 92732 | 67825, // VPSUBDZrrk |
| 92733 | 67830, // VPSUBDZrrkz |
| 92734 | 67834, // VPSUBDrm |
| 92735 | 67837, // VPSUBDrr |
| 92736 | 67840, // VPSUBQYrm |
| 92737 | 67843, // VPSUBQYrr |
| 92738 | 67846, // VPSUBQZ128rm |
| 92739 | 67849, // VPSUBQZ128rmb |
| 92740 | 67852, // VPSUBQZ128rmbk |
| 92741 | 67857, // VPSUBQZ128rmbkz |
| 92742 | 67861, // VPSUBQZ128rmk |
| 92743 | 67866, // VPSUBQZ128rmkz |
| 92744 | 67870, // VPSUBQZ128rr |
| 92745 | 67873, // VPSUBQZ128rrk |
| 92746 | 67878, // VPSUBQZ128rrkz |
| 92747 | 67882, // VPSUBQZ256rm |
| 92748 | 67885, // VPSUBQZ256rmb |
| 92749 | 67888, // VPSUBQZ256rmbk |
| 92750 | 67893, // VPSUBQZ256rmbkz |
| 92751 | 67897, // VPSUBQZ256rmk |
| 92752 | 67902, // VPSUBQZ256rmkz |
| 92753 | 67906, // VPSUBQZ256rr |
| 92754 | 67909, // VPSUBQZ256rrk |
| 92755 | 67914, // VPSUBQZ256rrkz |
| 92756 | 67918, // VPSUBQZrm |
| 92757 | 67921, // VPSUBQZrmb |
| 92758 | 67924, // VPSUBQZrmbk |
| 92759 | 67929, // VPSUBQZrmbkz |
| 92760 | 67933, // VPSUBQZrmk |
| 92761 | 67938, // VPSUBQZrmkz |
| 92762 | 67942, // VPSUBQZrr |
| 92763 | 67945, // VPSUBQZrrk |
| 92764 | 67950, // VPSUBQZrrkz |
| 92765 | 67954, // VPSUBQrm |
| 92766 | 67957, // VPSUBQrr |
| 92767 | 67960, // VPSUBSBYrm |
| 92768 | 67963, // VPSUBSBYrr |
| 92769 | 67966, // VPSUBSBZ128rm |
| 92770 | 67969, // VPSUBSBZ128rmk |
| 92771 | 67974, // VPSUBSBZ128rmkz |
| 92772 | 67978, // VPSUBSBZ128rr |
| 92773 | 67981, // VPSUBSBZ128rrk |
| 92774 | 67986, // VPSUBSBZ128rrkz |
| 92775 | 67990, // VPSUBSBZ256rm |
| 92776 | 67993, // VPSUBSBZ256rmk |
| 92777 | 67998, // VPSUBSBZ256rmkz |
| 92778 | 68002, // VPSUBSBZ256rr |
| 92779 | 68005, // VPSUBSBZ256rrk |
| 92780 | 68010, // VPSUBSBZ256rrkz |
| 92781 | 68014, // VPSUBSBZrm |
| 92782 | 68017, // VPSUBSBZrmk |
| 92783 | 68022, // VPSUBSBZrmkz |
| 92784 | 68026, // VPSUBSBZrr |
| 92785 | 68029, // VPSUBSBZrrk |
| 92786 | 68034, // VPSUBSBZrrkz |
| 92787 | 68038, // VPSUBSBrm |
| 92788 | 68041, // VPSUBSBrr |
| 92789 | 68044, // VPSUBSWYrm |
| 92790 | 68047, // VPSUBSWYrr |
| 92791 | 68050, // VPSUBSWZ128rm |
| 92792 | 68053, // VPSUBSWZ128rmk |
| 92793 | 68058, // VPSUBSWZ128rmkz |
| 92794 | 68062, // VPSUBSWZ128rr |
| 92795 | 68065, // VPSUBSWZ128rrk |
| 92796 | 68070, // VPSUBSWZ128rrkz |
| 92797 | 68074, // VPSUBSWZ256rm |
| 92798 | 68077, // VPSUBSWZ256rmk |
| 92799 | 68082, // VPSUBSWZ256rmkz |
| 92800 | 68086, // VPSUBSWZ256rr |
| 92801 | 68089, // VPSUBSWZ256rrk |
| 92802 | 68094, // VPSUBSWZ256rrkz |
| 92803 | 68098, // VPSUBSWZrm |
| 92804 | 68101, // VPSUBSWZrmk |
| 92805 | 68106, // VPSUBSWZrmkz |
| 92806 | 68110, // VPSUBSWZrr |
| 92807 | 68113, // VPSUBSWZrrk |
| 92808 | 68118, // VPSUBSWZrrkz |
| 92809 | 68122, // VPSUBSWrm |
| 92810 | 68125, // VPSUBSWrr |
| 92811 | 68128, // VPSUBUSBYrm |
| 92812 | 68131, // VPSUBUSBYrr |
| 92813 | 68134, // VPSUBUSBZ128rm |
| 92814 | 68137, // VPSUBUSBZ128rmk |
| 92815 | 68142, // VPSUBUSBZ128rmkz |
| 92816 | 68146, // VPSUBUSBZ128rr |
| 92817 | 68149, // VPSUBUSBZ128rrk |
| 92818 | 68154, // VPSUBUSBZ128rrkz |
| 92819 | 68158, // VPSUBUSBZ256rm |
| 92820 | 68161, // VPSUBUSBZ256rmk |
| 92821 | 68166, // VPSUBUSBZ256rmkz |
| 92822 | 68170, // VPSUBUSBZ256rr |
| 92823 | 68173, // VPSUBUSBZ256rrk |
| 92824 | 68178, // VPSUBUSBZ256rrkz |
| 92825 | 68182, // VPSUBUSBZrm |
| 92826 | 68185, // VPSUBUSBZrmk |
| 92827 | 68190, // VPSUBUSBZrmkz |
| 92828 | 68194, // VPSUBUSBZrr |
| 92829 | 68197, // VPSUBUSBZrrk |
| 92830 | 68202, // VPSUBUSBZrrkz |
| 92831 | 68206, // VPSUBUSBrm |
| 92832 | 68209, // VPSUBUSBrr |
| 92833 | 68212, // VPSUBUSWYrm |
| 92834 | 68215, // VPSUBUSWYrr |
| 92835 | 68218, // VPSUBUSWZ128rm |
| 92836 | 68221, // VPSUBUSWZ128rmk |
| 92837 | 68226, // VPSUBUSWZ128rmkz |
| 92838 | 68230, // VPSUBUSWZ128rr |
| 92839 | 68233, // VPSUBUSWZ128rrk |
| 92840 | 68238, // VPSUBUSWZ128rrkz |
| 92841 | 68242, // VPSUBUSWZ256rm |
| 92842 | 68245, // VPSUBUSWZ256rmk |
| 92843 | 68250, // VPSUBUSWZ256rmkz |
| 92844 | 68254, // VPSUBUSWZ256rr |
| 92845 | 68257, // VPSUBUSWZ256rrk |
| 92846 | 68262, // VPSUBUSWZ256rrkz |
| 92847 | 68266, // VPSUBUSWZrm |
| 92848 | 68269, // VPSUBUSWZrmk |
| 92849 | 68274, // VPSUBUSWZrmkz |
| 92850 | 68278, // VPSUBUSWZrr |
| 92851 | 68281, // VPSUBUSWZrrk |
| 92852 | 68286, // VPSUBUSWZrrkz |
| 92853 | 68290, // VPSUBUSWrm |
| 92854 | 68293, // VPSUBUSWrr |
| 92855 | 68296, // VPSUBWYrm |
| 92856 | 68299, // VPSUBWYrr |
| 92857 | 68302, // VPSUBWZ128rm |
| 92858 | 68305, // VPSUBWZ128rmk |
| 92859 | 68310, // VPSUBWZ128rmkz |
| 92860 | 68314, // VPSUBWZ128rr |
| 92861 | 68317, // VPSUBWZ128rrk |
| 92862 | 68322, // VPSUBWZ128rrkz |
| 92863 | 68326, // VPSUBWZ256rm |
| 92864 | 68329, // VPSUBWZ256rmk |
| 92865 | 68334, // VPSUBWZ256rmkz |
| 92866 | 68338, // VPSUBWZ256rr |
| 92867 | 68341, // VPSUBWZ256rrk |
| 92868 | 68346, // VPSUBWZ256rrkz |
| 92869 | 68350, // VPSUBWZrm |
| 92870 | 68353, // VPSUBWZrmk |
| 92871 | 68358, // VPSUBWZrmkz |
| 92872 | 68362, // VPSUBWZrr |
| 92873 | 68365, // VPSUBWZrrk |
| 92874 | 68370, // VPSUBWZrrkz |
| 92875 | 68374, // VPSUBWrm |
| 92876 | 68377, // VPSUBWrr |
| 92877 | 68380, // VPTERNLOGDZ128rmbi |
| 92878 | 68385, // VPTERNLOGDZ128rmbik |
| 92879 | 68391, // VPTERNLOGDZ128rmbikz |
| 92880 | 68397, // VPTERNLOGDZ128rmi |
| 92881 | 68402, // VPTERNLOGDZ128rmik |
| 92882 | 68408, // VPTERNLOGDZ128rmikz |
| 92883 | 68414, // VPTERNLOGDZ128rri |
| 92884 | 68419, // VPTERNLOGDZ128rrik |
| 92885 | 68425, // VPTERNLOGDZ128rrikz |
| 92886 | 68431, // VPTERNLOGDZ256rmbi |
| 92887 | 68436, // VPTERNLOGDZ256rmbik |
| 92888 | 68442, // VPTERNLOGDZ256rmbikz |
| 92889 | 68448, // VPTERNLOGDZ256rmi |
| 92890 | 68453, // VPTERNLOGDZ256rmik |
| 92891 | 68459, // VPTERNLOGDZ256rmikz |
| 92892 | 68465, // VPTERNLOGDZ256rri |
| 92893 | 68470, // VPTERNLOGDZ256rrik |
| 92894 | 68476, // VPTERNLOGDZ256rrikz |
| 92895 | 68482, // VPTERNLOGDZrmbi |
| 92896 | 68487, // VPTERNLOGDZrmbik |
| 92897 | 68493, // VPTERNLOGDZrmbikz |
| 92898 | 68499, // VPTERNLOGDZrmi |
| 92899 | 68504, // VPTERNLOGDZrmik |
| 92900 | 68510, // VPTERNLOGDZrmikz |
| 92901 | 68516, // VPTERNLOGDZrri |
| 92902 | 68521, // VPTERNLOGDZrrik |
| 92903 | 68527, // VPTERNLOGDZrrikz |
| 92904 | 68533, // VPTERNLOGQZ128rmbi |
| 92905 | 68538, // VPTERNLOGQZ128rmbik |
| 92906 | 68544, // VPTERNLOGQZ128rmbikz |
| 92907 | 68550, // VPTERNLOGQZ128rmi |
| 92908 | 68555, // VPTERNLOGQZ128rmik |
| 92909 | 68561, // VPTERNLOGQZ128rmikz |
| 92910 | 68567, // VPTERNLOGQZ128rri |
| 92911 | 68572, // VPTERNLOGQZ128rrik |
| 92912 | 68578, // VPTERNLOGQZ128rrikz |
| 92913 | 68584, // VPTERNLOGQZ256rmbi |
| 92914 | 68589, // VPTERNLOGQZ256rmbik |
| 92915 | 68595, // VPTERNLOGQZ256rmbikz |
| 92916 | 68601, // VPTERNLOGQZ256rmi |
| 92917 | 68606, // VPTERNLOGQZ256rmik |
| 92918 | 68612, // VPTERNLOGQZ256rmikz |
| 92919 | 68618, // VPTERNLOGQZ256rri |
| 92920 | 68623, // VPTERNLOGQZ256rrik |
| 92921 | 68629, // VPTERNLOGQZ256rrikz |
| 92922 | 68635, // VPTERNLOGQZrmbi |
| 92923 | 68640, // VPTERNLOGQZrmbik |
| 92924 | 68646, // VPTERNLOGQZrmbikz |
| 92925 | 68652, // VPTERNLOGQZrmi |
| 92926 | 68657, // VPTERNLOGQZrmik |
| 92927 | 68663, // VPTERNLOGQZrmikz |
| 92928 | 68669, // VPTERNLOGQZrri |
| 92929 | 68674, // VPTERNLOGQZrrik |
| 92930 | 68680, // VPTERNLOGQZrrikz |
| 92931 | 68686, // VPTESTMBZ128rm |
| 92932 | 68689, // VPTESTMBZ128rmk |
| 92933 | 68693, // VPTESTMBZ128rr |
| 92934 | 68696, // VPTESTMBZ128rrk |
| 92935 | 68700, // VPTESTMBZ256rm |
| 92936 | 68703, // VPTESTMBZ256rmk |
| 92937 | 68707, // VPTESTMBZ256rr |
| 92938 | 68710, // VPTESTMBZ256rrk |
| 92939 | 68714, // VPTESTMBZrm |
| 92940 | 68717, // VPTESTMBZrmk |
| 92941 | 68721, // VPTESTMBZrr |
| 92942 | 68724, // VPTESTMBZrrk |
| 92943 | 68728, // VPTESTMDZ128rm |
| 92944 | 68731, // VPTESTMDZ128rmb |
| 92945 | 68734, // VPTESTMDZ128rmbk |
| 92946 | 68738, // VPTESTMDZ128rmk |
| 92947 | 68742, // VPTESTMDZ128rr |
| 92948 | 68745, // VPTESTMDZ128rrk |
| 92949 | 68749, // VPTESTMDZ256rm |
| 92950 | 68752, // VPTESTMDZ256rmb |
| 92951 | 68755, // VPTESTMDZ256rmbk |
| 92952 | 68759, // VPTESTMDZ256rmk |
| 92953 | 68763, // VPTESTMDZ256rr |
| 92954 | 68766, // VPTESTMDZ256rrk |
| 92955 | 68770, // VPTESTMDZrm |
| 92956 | 68773, // VPTESTMDZrmb |
| 92957 | 68776, // VPTESTMDZrmbk |
| 92958 | 68780, // VPTESTMDZrmk |
| 92959 | 68784, // VPTESTMDZrr |
| 92960 | 68787, // VPTESTMDZrrk |
| 92961 | 68791, // VPTESTMQZ128rm |
| 92962 | 68794, // VPTESTMQZ128rmb |
| 92963 | 68797, // VPTESTMQZ128rmbk |
| 92964 | 68801, // VPTESTMQZ128rmk |
| 92965 | 68805, // VPTESTMQZ128rr |
| 92966 | 68808, // VPTESTMQZ128rrk |
| 92967 | 68812, // VPTESTMQZ256rm |
| 92968 | 68815, // VPTESTMQZ256rmb |
| 92969 | 68818, // VPTESTMQZ256rmbk |
| 92970 | 68822, // VPTESTMQZ256rmk |
| 92971 | 68826, // VPTESTMQZ256rr |
| 92972 | 68829, // VPTESTMQZ256rrk |
| 92973 | 68833, // VPTESTMQZrm |
| 92974 | 68836, // VPTESTMQZrmb |
| 92975 | 68839, // VPTESTMQZrmbk |
| 92976 | 68843, // VPTESTMQZrmk |
| 92977 | 68847, // VPTESTMQZrr |
| 92978 | 68850, // VPTESTMQZrrk |
| 92979 | 68854, // VPTESTMWZ128rm |
| 92980 | 68857, // VPTESTMWZ128rmk |
| 92981 | 68861, // VPTESTMWZ128rr |
| 92982 | 68864, // VPTESTMWZ128rrk |
| 92983 | 68868, // VPTESTMWZ256rm |
| 92984 | 68871, // VPTESTMWZ256rmk |
| 92985 | 68875, // VPTESTMWZ256rr |
| 92986 | 68878, // VPTESTMWZ256rrk |
| 92987 | 68882, // VPTESTMWZrm |
| 92988 | 68885, // VPTESTMWZrmk |
| 92989 | 68889, // VPTESTMWZrr |
| 92990 | 68892, // VPTESTMWZrrk |
| 92991 | 68896, // VPTESTNMBZ128rm |
| 92992 | 68899, // VPTESTNMBZ128rmk |
| 92993 | 68903, // VPTESTNMBZ128rr |
| 92994 | 68906, // VPTESTNMBZ128rrk |
| 92995 | 68910, // VPTESTNMBZ256rm |
| 92996 | 68913, // VPTESTNMBZ256rmk |
| 92997 | 68917, // VPTESTNMBZ256rr |
| 92998 | 68920, // VPTESTNMBZ256rrk |
| 92999 | 68924, // VPTESTNMBZrm |
| 93000 | 68927, // VPTESTNMBZrmk |
| 93001 | 68931, // VPTESTNMBZrr |
| 93002 | 68934, // VPTESTNMBZrrk |
| 93003 | 68938, // VPTESTNMDZ128rm |
| 93004 | 68941, // VPTESTNMDZ128rmb |
| 93005 | 68944, // VPTESTNMDZ128rmbk |
| 93006 | 68948, // VPTESTNMDZ128rmk |
| 93007 | 68952, // VPTESTNMDZ128rr |
| 93008 | 68955, // VPTESTNMDZ128rrk |
| 93009 | 68959, // VPTESTNMDZ256rm |
| 93010 | 68962, // VPTESTNMDZ256rmb |
| 93011 | 68965, // VPTESTNMDZ256rmbk |
| 93012 | 68969, // VPTESTNMDZ256rmk |
| 93013 | 68973, // VPTESTNMDZ256rr |
| 93014 | 68976, // VPTESTNMDZ256rrk |
| 93015 | 68980, // VPTESTNMDZrm |
| 93016 | 68983, // VPTESTNMDZrmb |
| 93017 | 68986, // VPTESTNMDZrmbk |
| 93018 | 68990, // VPTESTNMDZrmk |
| 93019 | 68994, // VPTESTNMDZrr |
| 93020 | 68997, // VPTESTNMDZrrk |
| 93021 | 69001, // VPTESTNMQZ128rm |
| 93022 | 69004, // VPTESTNMQZ128rmb |
| 93023 | 69007, // VPTESTNMQZ128rmbk |
| 93024 | 69011, // VPTESTNMQZ128rmk |
| 93025 | 69015, // VPTESTNMQZ128rr |
| 93026 | 69018, // VPTESTNMQZ128rrk |
| 93027 | 69022, // VPTESTNMQZ256rm |
| 93028 | 69025, // VPTESTNMQZ256rmb |
| 93029 | 69028, // VPTESTNMQZ256rmbk |
| 93030 | 69032, // VPTESTNMQZ256rmk |
| 93031 | 69036, // VPTESTNMQZ256rr |
| 93032 | 69039, // VPTESTNMQZ256rrk |
| 93033 | 69043, // VPTESTNMQZrm |
| 93034 | 69046, // VPTESTNMQZrmb |
| 93035 | 69049, // VPTESTNMQZrmbk |
| 93036 | 69053, // VPTESTNMQZrmk |
| 93037 | 69057, // VPTESTNMQZrr |
| 93038 | 69060, // VPTESTNMQZrrk |
| 93039 | 69064, // VPTESTNMWZ128rm |
| 93040 | 69067, // VPTESTNMWZ128rmk |
| 93041 | 69071, // VPTESTNMWZ128rr |
| 93042 | 69074, // VPTESTNMWZ128rrk |
| 93043 | 69078, // VPTESTNMWZ256rm |
| 93044 | 69081, // VPTESTNMWZ256rmk |
| 93045 | 69085, // VPTESTNMWZ256rr |
| 93046 | 69088, // VPTESTNMWZ256rrk |
| 93047 | 69092, // VPTESTNMWZrm |
| 93048 | 69095, // VPTESTNMWZrmk |
| 93049 | 69099, // VPTESTNMWZrr |
| 93050 | 69102, // VPTESTNMWZrrk |
| 93051 | 69106, // VPTESTYrm |
| 93052 | 69108, // VPTESTYrr |
| 93053 | 69110, // VPTESTrm |
| 93054 | 69112, // VPTESTrr |
| 93055 | 69114, // VPUNPCKHBWYrm |
| 93056 | 69117, // VPUNPCKHBWYrr |
| 93057 | 69120, // VPUNPCKHBWZ128rm |
| 93058 | 69123, // VPUNPCKHBWZ128rmk |
| 93059 | 69128, // VPUNPCKHBWZ128rmkz |
| 93060 | 69132, // VPUNPCKHBWZ128rr |
| 93061 | 69135, // VPUNPCKHBWZ128rrk |
| 93062 | 69140, // VPUNPCKHBWZ128rrkz |
| 93063 | 69144, // VPUNPCKHBWZ256rm |
| 93064 | 69147, // VPUNPCKHBWZ256rmk |
| 93065 | 69152, // VPUNPCKHBWZ256rmkz |
| 93066 | 69156, // VPUNPCKHBWZ256rr |
| 93067 | 69159, // VPUNPCKHBWZ256rrk |
| 93068 | 69164, // VPUNPCKHBWZ256rrkz |
| 93069 | 69168, // VPUNPCKHBWZrm |
| 93070 | 69171, // VPUNPCKHBWZrmk |
| 93071 | 69176, // VPUNPCKHBWZrmkz |
| 93072 | 69180, // VPUNPCKHBWZrr |
| 93073 | 69183, // VPUNPCKHBWZrrk |
| 93074 | 69188, // VPUNPCKHBWZrrkz |
| 93075 | 69192, // VPUNPCKHBWrm |
| 93076 | 69195, // VPUNPCKHBWrr |
| 93077 | 69198, // VPUNPCKHDQYrm |
| 93078 | 69201, // VPUNPCKHDQYrr |
| 93079 | 69204, // VPUNPCKHDQZ128rm |
| 93080 | 69207, // VPUNPCKHDQZ128rmb |
| 93081 | 69210, // VPUNPCKHDQZ128rmbk |
| 93082 | 69215, // VPUNPCKHDQZ128rmbkz |
| 93083 | 69219, // VPUNPCKHDQZ128rmk |
| 93084 | 69224, // VPUNPCKHDQZ128rmkz |
| 93085 | 69228, // VPUNPCKHDQZ128rr |
| 93086 | 69231, // VPUNPCKHDQZ128rrk |
| 93087 | 69236, // VPUNPCKHDQZ128rrkz |
| 93088 | 69240, // VPUNPCKHDQZ256rm |
| 93089 | 69243, // VPUNPCKHDQZ256rmb |
| 93090 | 69246, // VPUNPCKHDQZ256rmbk |
| 93091 | 69251, // VPUNPCKHDQZ256rmbkz |
| 93092 | 69255, // VPUNPCKHDQZ256rmk |
| 93093 | 69260, // VPUNPCKHDQZ256rmkz |
| 93094 | 69264, // VPUNPCKHDQZ256rr |
| 93095 | 69267, // VPUNPCKHDQZ256rrk |
| 93096 | 69272, // VPUNPCKHDQZ256rrkz |
| 93097 | 69276, // VPUNPCKHDQZrm |
| 93098 | 69279, // VPUNPCKHDQZrmb |
| 93099 | 69282, // VPUNPCKHDQZrmbk |
| 93100 | 69287, // VPUNPCKHDQZrmbkz |
| 93101 | 69291, // VPUNPCKHDQZrmk |
| 93102 | 69296, // VPUNPCKHDQZrmkz |
| 93103 | 69300, // VPUNPCKHDQZrr |
| 93104 | 69303, // VPUNPCKHDQZrrk |
| 93105 | 69308, // VPUNPCKHDQZrrkz |
| 93106 | 69312, // VPUNPCKHDQrm |
| 93107 | 69315, // VPUNPCKHDQrr |
| 93108 | 69318, // VPUNPCKHQDQYrm |
| 93109 | 69321, // VPUNPCKHQDQYrr |
| 93110 | 69324, // VPUNPCKHQDQZ128rm |
| 93111 | 69327, // VPUNPCKHQDQZ128rmb |
| 93112 | 69330, // VPUNPCKHQDQZ128rmbk |
| 93113 | 69335, // VPUNPCKHQDQZ128rmbkz |
| 93114 | 69339, // VPUNPCKHQDQZ128rmk |
| 93115 | 69344, // VPUNPCKHQDQZ128rmkz |
| 93116 | 69348, // VPUNPCKHQDQZ128rr |
| 93117 | 69351, // VPUNPCKHQDQZ128rrk |
| 93118 | 69356, // VPUNPCKHQDQZ128rrkz |
| 93119 | 69360, // VPUNPCKHQDQZ256rm |
| 93120 | 69363, // VPUNPCKHQDQZ256rmb |
| 93121 | 69366, // VPUNPCKHQDQZ256rmbk |
| 93122 | 69371, // VPUNPCKHQDQZ256rmbkz |
| 93123 | 69375, // VPUNPCKHQDQZ256rmk |
| 93124 | 69380, // VPUNPCKHQDQZ256rmkz |
| 93125 | 69384, // VPUNPCKHQDQZ256rr |
| 93126 | 69387, // VPUNPCKHQDQZ256rrk |
| 93127 | 69392, // VPUNPCKHQDQZ256rrkz |
| 93128 | 69396, // VPUNPCKHQDQZrm |
| 93129 | 69399, // VPUNPCKHQDQZrmb |
| 93130 | 69402, // VPUNPCKHQDQZrmbk |
| 93131 | 69407, // VPUNPCKHQDQZrmbkz |
| 93132 | 69411, // VPUNPCKHQDQZrmk |
| 93133 | 69416, // VPUNPCKHQDQZrmkz |
| 93134 | 69420, // VPUNPCKHQDQZrr |
| 93135 | 69423, // VPUNPCKHQDQZrrk |
| 93136 | 69428, // VPUNPCKHQDQZrrkz |
| 93137 | 69432, // VPUNPCKHQDQrm |
| 93138 | 69435, // VPUNPCKHQDQrr |
| 93139 | 69438, // VPUNPCKHWDYrm |
| 93140 | 69441, // VPUNPCKHWDYrr |
| 93141 | 69444, // VPUNPCKHWDZ128rm |
| 93142 | 69447, // VPUNPCKHWDZ128rmk |
| 93143 | 69452, // VPUNPCKHWDZ128rmkz |
| 93144 | 69456, // VPUNPCKHWDZ128rr |
| 93145 | 69459, // VPUNPCKHWDZ128rrk |
| 93146 | 69464, // VPUNPCKHWDZ128rrkz |
| 93147 | 69468, // VPUNPCKHWDZ256rm |
| 93148 | 69471, // VPUNPCKHWDZ256rmk |
| 93149 | 69476, // VPUNPCKHWDZ256rmkz |
| 93150 | 69480, // VPUNPCKHWDZ256rr |
| 93151 | 69483, // VPUNPCKHWDZ256rrk |
| 93152 | 69488, // VPUNPCKHWDZ256rrkz |
| 93153 | 69492, // VPUNPCKHWDZrm |
| 93154 | 69495, // VPUNPCKHWDZrmk |
| 93155 | 69500, // VPUNPCKHWDZrmkz |
| 93156 | 69504, // VPUNPCKHWDZrr |
| 93157 | 69507, // VPUNPCKHWDZrrk |
| 93158 | 69512, // VPUNPCKHWDZrrkz |
| 93159 | 69516, // VPUNPCKHWDrm |
| 93160 | 69519, // VPUNPCKHWDrr |
| 93161 | 69522, // VPUNPCKLBWYrm |
| 93162 | 69525, // VPUNPCKLBWYrr |
| 93163 | 69528, // VPUNPCKLBWZ128rm |
| 93164 | 69531, // VPUNPCKLBWZ128rmk |
| 93165 | 69536, // VPUNPCKLBWZ128rmkz |
| 93166 | 69540, // VPUNPCKLBWZ128rr |
| 93167 | 69543, // VPUNPCKLBWZ128rrk |
| 93168 | 69548, // VPUNPCKLBWZ128rrkz |
| 93169 | 69552, // VPUNPCKLBWZ256rm |
| 93170 | 69555, // VPUNPCKLBWZ256rmk |
| 93171 | 69560, // VPUNPCKLBWZ256rmkz |
| 93172 | 69564, // VPUNPCKLBWZ256rr |
| 93173 | 69567, // VPUNPCKLBWZ256rrk |
| 93174 | 69572, // VPUNPCKLBWZ256rrkz |
| 93175 | 69576, // VPUNPCKLBWZrm |
| 93176 | 69579, // VPUNPCKLBWZrmk |
| 93177 | 69584, // VPUNPCKLBWZrmkz |
| 93178 | 69588, // VPUNPCKLBWZrr |
| 93179 | 69591, // VPUNPCKLBWZrrk |
| 93180 | 69596, // VPUNPCKLBWZrrkz |
| 93181 | 69600, // VPUNPCKLBWrm |
| 93182 | 69603, // VPUNPCKLBWrr |
| 93183 | 69606, // VPUNPCKLDQYrm |
| 93184 | 69609, // VPUNPCKLDQYrr |
| 93185 | 69612, // VPUNPCKLDQZ128rm |
| 93186 | 69615, // VPUNPCKLDQZ128rmb |
| 93187 | 69618, // VPUNPCKLDQZ128rmbk |
| 93188 | 69623, // VPUNPCKLDQZ128rmbkz |
| 93189 | 69627, // VPUNPCKLDQZ128rmk |
| 93190 | 69632, // VPUNPCKLDQZ128rmkz |
| 93191 | 69636, // VPUNPCKLDQZ128rr |
| 93192 | 69639, // VPUNPCKLDQZ128rrk |
| 93193 | 69644, // VPUNPCKLDQZ128rrkz |
| 93194 | 69648, // VPUNPCKLDQZ256rm |
| 93195 | 69651, // VPUNPCKLDQZ256rmb |
| 93196 | 69654, // VPUNPCKLDQZ256rmbk |
| 93197 | 69659, // VPUNPCKLDQZ256rmbkz |
| 93198 | 69663, // VPUNPCKLDQZ256rmk |
| 93199 | 69668, // VPUNPCKLDQZ256rmkz |
| 93200 | 69672, // VPUNPCKLDQZ256rr |
| 93201 | 69675, // VPUNPCKLDQZ256rrk |
| 93202 | 69680, // VPUNPCKLDQZ256rrkz |
| 93203 | 69684, // VPUNPCKLDQZrm |
| 93204 | 69687, // VPUNPCKLDQZrmb |
| 93205 | 69690, // VPUNPCKLDQZrmbk |
| 93206 | 69695, // VPUNPCKLDQZrmbkz |
| 93207 | 69699, // VPUNPCKLDQZrmk |
| 93208 | 69704, // VPUNPCKLDQZrmkz |
| 93209 | 69708, // VPUNPCKLDQZrr |
| 93210 | 69711, // VPUNPCKLDQZrrk |
| 93211 | 69716, // VPUNPCKLDQZrrkz |
| 93212 | 69720, // VPUNPCKLDQrm |
| 93213 | 69723, // VPUNPCKLDQrr |
| 93214 | 69726, // VPUNPCKLQDQYrm |
| 93215 | 69729, // VPUNPCKLQDQYrr |
| 93216 | 69732, // VPUNPCKLQDQZ128rm |
| 93217 | 69735, // VPUNPCKLQDQZ128rmb |
| 93218 | 69738, // VPUNPCKLQDQZ128rmbk |
| 93219 | 69743, // VPUNPCKLQDQZ128rmbkz |
| 93220 | 69747, // VPUNPCKLQDQZ128rmk |
| 93221 | 69752, // VPUNPCKLQDQZ128rmkz |
| 93222 | 69756, // VPUNPCKLQDQZ128rr |
| 93223 | 69759, // VPUNPCKLQDQZ128rrk |
| 93224 | 69764, // VPUNPCKLQDQZ128rrkz |
| 93225 | 69768, // VPUNPCKLQDQZ256rm |
| 93226 | 69771, // VPUNPCKLQDQZ256rmb |
| 93227 | 69774, // VPUNPCKLQDQZ256rmbk |
| 93228 | 69779, // VPUNPCKLQDQZ256rmbkz |
| 93229 | 69783, // VPUNPCKLQDQZ256rmk |
| 93230 | 69788, // VPUNPCKLQDQZ256rmkz |
| 93231 | 69792, // VPUNPCKLQDQZ256rr |
| 93232 | 69795, // VPUNPCKLQDQZ256rrk |
| 93233 | 69800, // VPUNPCKLQDQZ256rrkz |
| 93234 | 69804, // VPUNPCKLQDQZrm |
| 93235 | 69807, // VPUNPCKLQDQZrmb |
| 93236 | 69810, // VPUNPCKLQDQZrmbk |
| 93237 | 69815, // VPUNPCKLQDQZrmbkz |
| 93238 | 69819, // VPUNPCKLQDQZrmk |
| 93239 | 69824, // VPUNPCKLQDQZrmkz |
| 93240 | 69828, // VPUNPCKLQDQZrr |
| 93241 | 69831, // VPUNPCKLQDQZrrk |
| 93242 | 69836, // VPUNPCKLQDQZrrkz |
| 93243 | 69840, // VPUNPCKLQDQrm |
| 93244 | 69843, // VPUNPCKLQDQrr |
| 93245 | 69846, // VPUNPCKLWDYrm |
| 93246 | 69849, // VPUNPCKLWDYrr |
| 93247 | 69852, // VPUNPCKLWDZ128rm |
| 93248 | 69855, // VPUNPCKLWDZ128rmk |
| 93249 | 69860, // VPUNPCKLWDZ128rmkz |
| 93250 | 69864, // VPUNPCKLWDZ128rr |
| 93251 | 69867, // VPUNPCKLWDZ128rrk |
| 93252 | 69872, // VPUNPCKLWDZ128rrkz |
| 93253 | 69876, // VPUNPCKLWDZ256rm |
| 93254 | 69879, // VPUNPCKLWDZ256rmk |
| 93255 | 69884, // VPUNPCKLWDZ256rmkz |
| 93256 | 69888, // VPUNPCKLWDZ256rr |
| 93257 | 69891, // VPUNPCKLWDZ256rrk |
| 93258 | 69896, // VPUNPCKLWDZ256rrkz |
| 93259 | 69900, // VPUNPCKLWDZrm |
| 93260 | 69903, // VPUNPCKLWDZrmk |
| 93261 | 69908, // VPUNPCKLWDZrmkz |
| 93262 | 69912, // VPUNPCKLWDZrr |
| 93263 | 69915, // VPUNPCKLWDZrrk |
| 93264 | 69920, // VPUNPCKLWDZrrkz |
| 93265 | 69924, // VPUNPCKLWDrm |
| 93266 | 69927, // VPUNPCKLWDrr |
| 93267 | 69930, // VPXORDZ128rm |
| 93268 | 69933, // VPXORDZ128rmb |
| 93269 | 69936, // VPXORDZ128rmbk |
| 93270 | 69941, // VPXORDZ128rmbkz |
| 93271 | 69945, // VPXORDZ128rmk |
| 93272 | 69950, // VPXORDZ128rmkz |
| 93273 | 69954, // VPXORDZ128rr |
| 93274 | 69957, // VPXORDZ128rrk |
| 93275 | 69962, // VPXORDZ128rrkz |
| 93276 | 69966, // VPXORDZ256rm |
| 93277 | 69969, // VPXORDZ256rmb |
| 93278 | 69972, // VPXORDZ256rmbk |
| 93279 | 69977, // VPXORDZ256rmbkz |
| 93280 | 69981, // VPXORDZ256rmk |
| 93281 | 69986, // VPXORDZ256rmkz |
| 93282 | 69990, // VPXORDZ256rr |
| 93283 | 69993, // VPXORDZ256rrk |
| 93284 | 69998, // VPXORDZ256rrkz |
| 93285 | 70002, // VPXORDZrm |
| 93286 | 70005, // VPXORDZrmb |
| 93287 | 70008, // VPXORDZrmbk |
| 93288 | 70013, // VPXORDZrmbkz |
| 93289 | 70017, // VPXORDZrmk |
| 93290 | 70022, // VPXORDZrmkz |
| 93291 | 70026, // VPXORDZrr |
| 93292 | 70029, // VPXORDZrrk |
| 93293 | 70034, // VPXORDZrrkz |
| 93294 | 70038, // VPXORQZ128rm |
| 93295 | 70041, // VPXORQZ128rmb |
| 93296 | 70044, // VPXORQZ128rmbk |
| 93297 | 70049, // VPXORQZ128rmbkz |
| 93298 | 70053, // VPXORQZ128rmk |
| 93299 | 70058, // VPXORQZ128rmkz |
| 93300 | 70062, // VPXORQZ128rr |
| 93301 | 70065, // VPXORQZ128rrk |
| 93302 | 70070, // VPXORQZ128rrkz |
| 93303 | 70074, // VPXORQZ256rm |
| 93304 | 70077, // VPXORQZ256rmb |
| 93305 | 70080, // VPXORQZ256rmbk |
| 93306 | 70085, // VPXORQZ256rmbkz |
| 93307 | 70089, // VPXORQZ256rmk |
| 93308 | 70094, // VPXORQZ256rmkz |
| 93309 | 70098, // VPXORQZ256rr |
| 93310 | 70101, // VPXORQZ256rrk |
| 93311 | 70106, // VPXORQZ256rrkz |
| 93312 | 70110, // VPXORQZrm |
| 93313 | 70113, // VPXORQZrmb |
| 93314 | 70116, // VPXORQZrmbk |
| 93315 | 70121, // VPXORQZrmbkz |
| 93316 | 70125, // VPXORQZrmk |
| 93317 | 70130, // VPXORQZrmkz |
| 93318 | 70134, // VPXORQZrr |
| 93319 | 70137, // VPXORQZrrk |
| 93320 | 70142, // VPXORQZrrkz |
| 93321 | 70146, // VPXORYrm |
| 93322 | 70149, // VPXORYrr |
| 93323 | 70152, // VPXORrm |
| 93324 | 70155, // VPXORrr |
| 93325 | 70158, // VRANGEPDZ128rmbi |
| 93326 | 70162, // VRANGEPDZ128rmbik |
| 93327 | 70168, // VRANGEPDZ128rmbikz |
| 93328 | 70173, // VRANGEPDZ128rmi |
| 93329 | 70177, // VRANGEPDZ128rmik |
| 93330 | 70183, // VRANGEPDZ128rmikz |
| 93331 | 70188, // VRANGEPDZ128rri |
| 93332 | 70192, // VRANGEPDZ128rrik |
| 93333 | 70198, // VRANGEPDZ128rrikz |
| 93334 | 70203, // VRANGEPDZ256rmbi |
| 93335 | 70207, // VRANGEPDZ256rmbik |
| 93336 | 70213, // VRANGEPDZ256rmbikz |
| 93337 | 70218, // VRANGEPDZ256rmi |
| 93338 | 70222, // VRANGEPDZ256rmik |
| 93339 | 70228, // VRANGEPDZ256rmikz |
| 93340 | 70233, // VRANGEPDZ256rri |
| 93341 | 70237, // VRANGEPDZ256rrik |
| 93342 | 70243, // VRANGEPDZ256rrikz |
| 93343 | 70248, // VRANGEPDZrmbi |
| 93344 | 70252, // VRANGEPDZrmbik |
| 93345 | 70258, // VRANGEPDZrmbikz |
| 93346 | 70263, // VRANGEPDZrmi |
| 93347 | 70267, // VRANGEPDZrmik |
| 93348 | 70273, // VRANGEPDZrmikz |
| 93349 | 70278, // VRANGEPDZrri |
| 93350 | 70282, // VRANGEPDZrrib |
| 93351 | 70286, // VRANGEPDZrribk |
| 93352 | 70292, // VRANGEPDZrribkz |
| 93353 | 70297, // VRANGEPDZrrik |
| 93354 | 70303, // VRANGEPDZrrikz |
| 93355 | 70308, // VRANGEPSZ128rmbi |
| 93356 | 70312, // VRANGEPSZ128rmbik |
| 93357 | 70318, // VRANGEPSZ128rmbikz |
| 93358 | 70323, // VRANGEPSZ128rmi |
| 93359 | 70327, // VRANGEPSZ128rmik |
| 93360 | 70333, // VRANGEPSZ128rmikz |
| 93361 | 70338, // VRANGEPSZ128rri |
| 93362 | 70342, // VRANGEPSZ128rrik |
| 93363 | 70348, // VRANGEPSZ128rrikz |
| 93364 | 70353, // VRANGEPSZ256rmbi |
| 93365 | 70357, // VRANGEPSZ256rmbik |
| 93366 | 70363, // VRANGEPSZ256rmbikz |
| 93367 | 70368, // VRANGEPSZ256rmi |
| 93368 | 70372, // VRANGEPSZ256rmik |
| 93369 | 70378, // VRANGEPSZ256rmikz |
| 93370 | 70383, // VRANGEPSZ256rri |
| 93371 | 70387, // VRANGEPSZ256rrik |
| 93372 | 70393, // VRANGEPSZ256rrikz |
| 93373 | 70398, // VRANGEPSZrmbi |
| 93374 | 70402, // VRANGEPSZrmbik |
| 93375 | 70408, // VRANGEPSZrmbikz |
| 93376 | 70413, // VRANGEPSZrmi |
| 93377 | 70417, // VRANGEPSZrmik |
| 93378 | 70423, // VRANGEPSZrmikz |
| 93379 | 70428, // VRANGEPSZrri |
| 93380 | 70432, // VRANGEPSZrrib |
| 93381 | 70436, // VRANGEPSZrribk |
| 93382 | 70442, // VRANGEPSZrribkz |
| 93383 | 70447, // VRANGEPSZrrik |
| 93384 | 70453, // VRANGEPSZrrikz |
| 93385 | 70458, // VRANGESDZrmi |
| 93386 | 70462, // VRANGESDZrmik |
| 93387 | 70468, // VRANGESDZrmikz |
| 93388 | 70473, // VRANGESDZrri |
| 93389 | 70477, // VRANGESDZrrib |
| 93390 | 70481, // VRANGESDZrribk |
| 93391 | 70487, // VRANGESDZrribkz |
| 93392 | 70492, // VRANGESDZrrik |
| 93393 | 70498, // VRANGESDZrrikz |
| 93394 | 70503, // VRANGESSZrmi |
| 93395 | 70507, // VRANGESSZrmik |
| 93396 | 70513, // VRANGESSZrmikz |
| 93397 | 70518, // VRANGESSZrri |
| 93398 | 70522, // VRANGESSZrrib |
| 93399 | 70526, // VRANGESSZrribk |
| 93400 | 70532, // VRANGESSZrribkz |
| 93401 | 70537, // VRANGESSZrrik |
| 93402 | 70543, // VRANGESSZrrikz |
| 93403 | 70548, // VRCP14PDZ128m |
| 93404 | 70550, // VRCP14PDZ128mb |
| 93405 | 70552, // VRCP14PDZ128mbk |
| 93406 | 70556, // VRCP14PDZ128mbkz |
| 93407 | 70559, // VRCP14PDZ128mk |
| 93408 | 70563, // VRCP14PDZ128mkz |
| 93409 | 70566, // VRCP14PDZ128r |
| 93410 | 70568, // VRCP14PDZ128rk |
| 93411 | 70572, // VRCP14PDZ128rkz |
| 93412 | 70575, // VRCP14PDZ256m |
| 93413 | 70577, // VRCP14PDZ256mb |
| 93414 | 70579, // VRCP14PDZ256mbk |
| 93415 | 70583, // VRCP14PDZ256mbkz |
| 93416 | 70586, // VRCP14PDZ256mk |
| 93417 | 70590, // VRCP14PDZ256mkz |
| 93418 | 70593, // VRCP14PDZ256r |
| 93419 | 70595, // VRCP14PDZ256rk |
| 93420 | 70599, // VRCP14PDZ256rkz |
| 93421 | 70602, // VRCP14PDZm |
| 93422 | 70604, // VRCP14PDZmb |
| 93423 | 70606, // VRCP14PDZmbk |
| 93424 | 70610, // VRCP14PDZmbkz |
| 93425 | 70613, // VRCP14PDZmk |
| 93426 | 70617, // VRCP14PDZmkz |
| 93427 | 70620, // VRCP14PDZr |
| 93428 | 70622, // VRCP14PDZrk |
| 93429 | 70626, // VRCP14PDZrkz |
| 93430 | 70629, // VRCP14PSZ128m |
| 93431 | 70631, // VRCP14PSZ128mb |
| 93432 | 70633, // VRCP14PSZ128mbk |
| 93433 | 70637, // VRCP14PSZ128mbkz |
| 93434 | 70640, // VRCP14PSZ128mk |
| 93435 | 70644, // VRCP14PSZ128mkz |
| 93436 | 70647, // VRCP14PSZ128r |
| 93437 | 70649, // VRCP14PSZ128rk |
| 93438 | 70653, // VRCP14PSZ128rkz |
| 93439 | 70656, // VRCP14PSZ256m |
| 93440 | 70658, // VRCP14PSZ256mb |
| 93441 | 70660, // VRCP14PSZ256mbk |
| 93442 | 70664, // VRCP14PSZ256mbkz |
| 93443 | 70667, // VRCP14PSZ256mk |
| 93444 | 70671, // VRCP14PSZ256mkz |
| 93445 | 70674, // VRCP14PSZ256r |
| 93446 | 70676, // VRCP14PSZ256rk |
| 93447 | 70680, // VRCP14PSZ256rkz |
| 93448 | 70683, // VRCP14PSZm |
| 93449 | 70685, // VRCP14PSZmb |
| 93450 | 70687, // VRCP14PSZmbk |
| 93451 | 70691, // VRCP14PSZmbkz |
| 93452 | 70694, // VRCP14PSZmk |
| 93453 | 70698, // VRCP14PSZmkz |
| 93454 | 70701, // VRCP14PSZr |
| 93455 | 70703, // VRCP14PSZrk |
| 93456 | 70707, // VRCP14PSZrkz |
| 93457 | 70710, // VRCP14SDZrm |
| 93458 | 70713, // VRCP14SDZrmk |
| 93459 | 70718, // VRCP14SDZrmkz |
| 93460 | 70722, // VRCP14SDZrr |
| 93461 | 70725, // VRCP14SDZrrk |
| 93462 | 70730, // VRCP14SDZrrkz |
| 93463 | 70734, // VRCP14SSZrm |
| 93464 | 70737, // VRCP14SSZrmk |
| 93465 | 70742, // VRCP14SSZrmkz |
| 93466 | 70746, // VRCP14SSZrr |
| 93467 | 70749, // VRCP14SSZrrk |
| 93468 | 70754, // VRCP14SSZrrkz |
| 93469 | 70758, // VRCP28PDZm |
| 93470 | 70760, // VRCP28PDZmb |
| 93471 | 70762, // VRCP28PDZmbk |
| 93472 | 70766, // VRCP28PDZmbkz |
| 93473 | 70769, // VRCP28PDZmk |
| 93474 | 70773, // VRCP28PDZmkz |
| 93475 | 70776, // VRCP28PDZr |
| 93476 | 70778, // VRCP28PDZrb |
| 93477 | 70780, // VRCP28PDZrbk |
| 93478 | 70784, // VRCP28PDZrbkz |
| 93479 | 70787, // VRCP28PDZrk |
| 93480 | 70791, // VRCP28PDZrkz |
| 93481 | 70794, // VRCP28PSZm |
| 93482 | 70796, // VRCP28PSZmb |
| 93483 | 70798, // VRCP28PSZmbk |
| 93484 | 70802, // VRCP28PSZmbkz |
| 93485 | 70805, // VRCP28PSZmk |
| 93486 | 70809, // VRCP28PSZmkz |
| 93487 | 70812, // VRCP28PSZr |
| 93488 | 70814, // VRCP28PSZrb |
| 93489 | 70816, // VRCP28PSZrbk |
| 93490 | 70820, // VRCP28PSZrbkz |
| 93491 | 70823, // VRCP28PSZrk |
| 93492 | 70827, // VRCP28PSZrkz |
| 93493 | 70830, // VRCP28SDZm |
| 93494 | 70833, // VRCP28SDZmk |
| 93495 | 70838, // VRCP28SDZmkz |
| 93496 | 70842, // VRCP28SDZr |
| 93497 | 70845, // VRCP28SDZrb |
| 93498 | 70848, // VRCP28SDZrbk |
| 93499 | 70853, // VRCP28SDZrbkz |
| 93500 | 70857, // VRCP28SDZrk |
| 93501 | 70862, // VRCP28SDZrkz |
| 93502 | 70866, // VRCP28SSZm |
| 93503 | 70869, // VRCP28SSZmk |
| 93504 | 70874, // VRCP28SSZmkz |
| 93505 | 70878, // VRCP28SSZr |
| 93506 | 70881, // VRCP28SSZrb |
| 93507 | 70884, // VRCP28SSZrbk |
| 93508 | 70889, // VRCP28SSZrbkz |
| 93509 | 70893, // VRCP28SSZrk |
| 93510 | 70898, // VRCP28SSZrkz |
| 93511 | 70902, // VRCPBF16Z128m |
| 93512 | 70904, // VRCPBF16Z128mb |
| 93513 | 70906, // VRCPBF16Z128mbk |
| 93514 | 70910, // VRCPBF16Z128mbkz |
| 93515 | 70913, // VRCPBF16Z128mk |
| 93516 | 70917, // VRCPBF16Z128mkz |
| 93517 | 70920, // VRCPBF16Z128r |
| 93518 | 70922, // VRCPBF16Z128rk |
| 93519 | 70926, // VRCPBF16Z128rkz |
| 93520 | 70929, // VRCPBF16Z256m |
| 93521 | 70931, // VRCPBF16Z256mb |
| 93522 | 70933, // VRCPBF16Z256mbk |
| 93523 | 70937, // VRCPBF16Z256mbkz |
| 93524 | 70940, // VRCPBF16Z256mk |
| 93525 | 70944, // VRCPBF16Z256mkz |
| 93526 | 70947, // VRCPBF16Z256r |
| 93527 | 70949, // VRCPBF16Z256rk |
| 93528 | 70953, // VRCPBF16Z256rkz |
| 93529 | 70956, // VRCPBF16Zm |
| 93530 | 70958, // VRCPBF16Zmb |
| 93531 | 70960, // VRCPBF16Zmbk |
| 93532 | 70964, // VRCPBF16Zmbkz |
| 93533 | 70967, // VRCPBF16Zmk |
| 93534 | 70971, // VRCPBF16Zmkz |
| 93535 | 70974, // VRCPBF16Zr |
| 93536 | 70976, // VRCPBF16Zrk |
| 93537 | 70980, // VRCPBF16Zrkz |
| 93538 | 70983, // VRCPPHZ128m |
| 93539 | 70985, // VRCPPHZ128mb |
| 93540 | 70987, // VRCPPHZ128mbk |
| 93541 | 70991, // VRCPPHZ128mbkz |
| 93542 | 70994, // VRCPPHZ128mk |
| 93543 | 70998, // VRCPPHZ128mkz |
| 93544 | 71001, // VRCPPHZ128r |
| 93545 | 71003, // VRCPPHZ128rk |
| 93546 | 71007, // VRCPPHZ128rkz |
| 93547 | 71010, // VRCPPHZ256m |
| 93548 | 71012, // VRCPPHZ256mb |
| 93549 | 71014, // VRCPPHZ256mbk |
| 93550 | 71018, // VRCPPHZ256mbkz |
| 93551 | 71021, // VRCPPHZ256mk |
| 93552 | 71025, // VRCPPHZ256mkz |
| 93553 | 71028, // VRCPPHZ256r |
| 93554 | 71030, // VRCPPHZ256rk |
| 93555 | 71034, // VRCPPHZ256rkz |
| 93556 | 71037, // VRCPPHZm |
| 93557 | 71039, // VRCPPHZmb |
| 93558 | 71041, // VRCPPHZmbk |
| 93559 | 71045, // VRCPPHZmbkz |
| 93560 | 71048, // VRCPPHZmk |
| 93561 | 71052, // VRCPPHZmkz |
| 93562 | 71055, // VRCPPHZr |
| 93563 | 71057, // VRCPPHZrk |
| 93564 | 71061, // VRCPPHZrkz |
| 93565 | 71064, // VRCPPSYm |
| 93566 | 71066, // VRCPPSYr |
| 93567 | 71068, // VRCPPSm |
| 93568 | 71070, // VRCPPSr |
| 93569 | 71072, // VRCPSHZrm |
| 93570 | 71075, // VRCPSHZrmk |
| 93571 | 71080, // VRCPSHZrmkz |
| 93572 | 71084, // VRCPSHZrr |
| 93573 | 71087, // VRCPSHZrrk |
| 93574 | 71092, // VRCPSHZrrkz |
| 93575 | 71096, // VRCPSSm |
| 93576 | 71099, // VRCPSSm_Int |
| 93577 | 71102, // VRCPSSr |
| 93578 | 71105, // VRCPSSr_Int |
| 93579 | 71108, // VREDUCEBF16Z128rmbi |
| 93580 | 71111, // VREDUCEBF16Z128rmbik |
| 93581 | 71116, // VREDUCEBF16Z128rmbikz |
| 93582 | 71120, // VREDUCEBF16Z128rmi |
| 93583 | 71123, // VREDUCEBF16Z128rmik |
| 93584 | 71128, // VREDUCEBF16Z128rmikz |
| 93585 | 71132, // VREDUCEBF16Z128rri |
| 93586 | 71135, // VREDUCEBF16Z128rrik |
| 93587 | 71140, // VREDUCEBF16Z128rrikz |
| 93588 | 71144, // VREDUCEBF16Z256rmbi |
| 93589 | 71147, // VREDUCEBF16Z256rmbik |
| 93590 | 71152, // VREDUCEBF16Z256rmbikz |
| 93591 | 71156, // VREDUCEBF16Z256rmi |
| 93592 | 71159, // VREDUCEBF16Z256rmik |
| 93593 | 71164, // VREDUCEBF16Z256rmikz |
| 93594 | 71168, // VREDUCEBF16Z256rri |
| 93595 | 71171, // VREDUCEBF16Z256rrik |
| 93596 | 71176, // VREDUCEBF16Z256rrikz |
| 93597 | 71180, // VREDUCEBF16Zrmbi |
| 93598 | 71183, // VREDUCEBF16Zrmbik |
| 93599 | 71188, // VREDUCEBF16Zrmbikz |
| 93600 | 71192, // VREDUCEBF16Zrmi |
| 93601 | 71195, // VREDUCEBF16Zrmik |
| 93602 | 71200, // VREDUCEBF16Zrmikz |
| 93603 | 71204, // VREDUCEBF16Zrri |
| 93604 | 71207, // VREDUCEBF16Zrrik |
| 93605 | 71212, // VREDUCEBF16Zrrikz |
| 93606 | 71216, // VREDUCEPDZ128rmbi |
| 93607 | 71219, // VREDUCEPDZ128rmbik |
| 93608 | 71224, // VREDUCEPDZ128rmbikz |
| 93609 | 71228, // VREDUCEPDZ128rmi |
| 93610 | 71231, // VREDUCEPDZ128rmik |
| 93611 | 71236, // VREDUCEPDZ128rmikz |
| 93612 | 71240, // VREDUCEPDZ128rri |
| 93613 | 71243, // VREDUCEPDZ128rrik |
| 93614 | 71248, // VREDUCEPDZ128rrikz |
| 93615 | 71252, // VREDUCEPDZ256rmbi |
| 93616 | 71255, // VREDUCEPDZ256rmbik |
| 93617 | 71260, // VREDUCEPDZ256rmbikz |
| 93618 | 71264, // VREDUCEPDZ256rmi |
| 93619 | 71267, // VREDUCEPDZ256rmik |
| 93620 | 71272, // VREDUCEPDZ256rmikz |
| 93621 | 71276, // VREDUCEPDZ256rri |
| 93622 | 71279, // VREDUCEPDZ256rrik |
| 93623 | 71284, // VREDUCEPDZ256rrikz |
| 93624 | 71288, // VREDUCEPDZrmbi |
| 93625 | 71291, // VREDUCEPDZrmbik |
| 93626 | 71296, // VREDUCEPDZrmbikz |
| 93627 | 71300, // VREDUCEPDZrmi |
| 93628 | 71303, // VREDUCEPDZrmik |
| 93629 | 71308, // VREDUCEPDZrmikz |
| 93630 | 71312, // VREDUCEPDZrri |
| 93631 | 71315, // VREDUCEPDZrrib |
| 93632 | 71318, // VREDUCEPDZrribk |
| 93633 | 71323, // VREDUCEPDZrribkz |
| 93634 | 71327, // VREDUCEPDZrrik |
| 93635 | 71332, // VREDUCEPDZrrikz |
| 93636 | 71336, // VREDUCEPHZ128rmbi |
| 93637 | 71339, // VREDUCEPHZ128rmbik |
| 93638 | 71344, // VREDUCEPHZ128rmbikz |
| 93639 | 71348, // VREDUCEPHZ128rmi |
| 93640 | 71351, // VREDUCEPHZ128rmik |
| 93641 | 71356, // VREDUCEPHZ128rmikz |
| 93642 | 71360, // VREDUCEPHZ128rri |
| 93643 | 71363, // VREDUCEPHZ128rrik |
| 93644 | 71368, // VREDUCEPHZ128rrikz |
| 93645 | 71372, // VREDUCEPHZ256rmbi |
| 93646 | 71375, // VREDUCEPHZ256rmbik |
| 93647 | 71380, // VREDUCEPHZ256rmbikz |
| 93648 | 71384, // VREDUCEPHZ256rmi |
| 93649 | 71387, // VREDUCEPHZ256rmik |
| 93650 | 71392, // VREDUCEPHZ256rmikz |
| 93651 | 71396, // VREDUCEPHZ256rri |
| 93652 | 71399, // VREDUCEPHZ256rrik |
| 93653 | 71404, // VREDUCEPHZ256rrikz |
| 93654 | 71408, // VREDUCEPHZrmbi |
| 93655 | 71411, // VREDUCEPHZrmbik |
| 93656 | 71416, // VREDUCEPHZrmbikz |
| 93657 | 71420, // VREDUCEPHZrmi |
| 93658 | 71423, // VREDUCEPHZrmik |
| 93659 | 71428, // VREDUCEPHZrmikz |
| 93660 | 71432, // VREDUCEPHZrri |
| 93661 | 71435, // VREDUCEPHZrrib |
| 93662 | 71438, // VREDUCEPHZrribk |
| 93663 | 71443, // VREDUCEPHZrribkz |
| 93664 | 71447, // VREDUCEPHZrrik |
| 93665 | 71452, // VREDUCEPHZrrikz |
| 93666 | 71456, // VREDUCEPSZ128rmbi |
| 93667 | 71459, // VREDUCEPSZ128rmbik |
| 93668 | 71464, // VREDUCEPSZ128rmbikz |
| 93669 | 71468, // VREDUCEPSZ128rmi |
| 93670 | 71471, // VREDUCEPSZ128rmik |
| 93671 | 71476, // VREDUCEPSZ128rmikz |
| 93672 | 71480, // VREDUCEPSZ128rri |
| 93673 | 71483, // VREDUCEPSZ128rrik |
| 93674 | 71488, // VREDUCEPSZ128rrikz |
| 93675 | 71492, // VREDUCEPSZ256rmbi |
| 93676 | 71495, // VREDUCEPSZ256rmbik |
| 93677 | 71500, // VREDUCEPSZ256rmbikz |
| 93678 | 71504, // VREDUCEPSZ256rmi |
| 93679 | 71507, // VREDUCEPSZ256rmik |
| 93680 | 71512, // VREDUCEPSZ256rmikz |
| 93681 | 71516, // VREDUCEPSZ256rri |
| 93682 | 71519, // VREDUCEPSZ256rrik |
| 93683 | 71524, // VREDUCEPSZ256rrikz |
| 93684 | 71528, // VREDUCEPSZrmbi |
| 93685 | 71531, // VREDUCEPSZrmbik |
| 93686 | 71536, // VREDUCEPSZrmbikz |
| 93687 | 71540, // VREDUCEPSZrmi |
| 93688 | 71543, // VREDUCEPSZrmik |
| 93689 | 71548, // VREDUCEPSZrmikz |
| 93690 | 71552, // VREDUCEPSZrri |
| 93691 | 71555, // VREDUCEPSZrrib |
| 93692 | 71558, // VREDUCEPSZrribk |
| 93693 | 71563, // VREDUCEPSZrribkz |
| 93694 | 71567, // VREDUCEPSZrrik |
| 93695 | 71572, // VREDUCEPSZrrikz |
| 93696 | 71576, // VREDUCESDZrmi |
| 93697 | 71580, // VREDUCESDZrmik |
| 93698 | 71586, // VREDUCESDZrmikz |
| 93699 | 71591, // VREDUCESDZrri |
| 93700 | 71595, // VREDUCESDZrrib |
| 93701 | 71599, // VREDUCESDZrribk |
| 93702 | 71605, // VREDUCESDZrribkz |
| 93703 | 71610, // VREDUCESDZrrik |
| 93704 | 71616, // VREDUCESDZrrikz |
| 93705 | 71621, // VREDUCESHZrmi |
| 93706 | 71625, // VREDUCESHZrmik |
| 93707 | 71631, // VREDUCESHZrmikz |
| 93708 | 71636, // VREDUCESHZrri |
| 93709 | 71640, // VREDUCESHZrrib |
| 93710 | 71644, // VREDUCESHZrribk |
| 93711 | 71650, // VREDUCESHZrribkz |
| 93712 | 71655, // VREDUCESHZrrik |
| 93713 | 71661, // VREDUCESHZrrikz |
| 93714 | 71666, // VREDUCESSZrmi |
| 93715 | 71670, // VREDUCESSZrmik |
| 93716 | 71676, // VREDUCESSZrmikz |
| 93717 | 71681, // VREDUCESSZrri |
| 93718 | 71685, // VREDUCESSZrrib |
| 93719 | 71689, // VREDUCESSZrribk |
| 93720 | 71695, // VREDUCESSZrribkz |
| 93721 | 71700, // VREDUCESSZrrik |
| 93722 | 71706, // VREDUCESSZrrikz |
| 93723 | 71711, // VRNDSCALEBF16Z128rmbi |
| 93724 | 71714, // VRNDSCALEBF16Z128rmbik |
| 93725 | 71719, // VRNDSCALEBF16Z128rmbikz |
| 93726 | 71723, // VRNDSCALEBF16Z128rmi |
| 93727 | 71726, // VRNDSCALEBF16Z128rmik |
| 93728 | 71731, // VRNDSCALEBF16Z128rmikz |
| 93729 | 71735, // VRNDSCALEBF16Z128rri |
| 93730 | 71738, // VRNDSCALEBF16Z128rrik |
| 93731 | 71743, // VRNDSCALEBF16Z128rrikz |
| 93732 | 71747, // VRNDSCALEBF16Z256rmbi |
| 93733 | 71750, // VRNDSCALEBF16Z256rmbik |
| 93734 | 71755, // VRNDSCALEBF16Z256rmbikz |
| 93735 | 71759, // VRNDSCALEBF16Z256rmi |
| 93736 | 71762, // VRNDSCALEBF16Z256rmik |
| 93737 | 71767, // VRNDSCALEBF16Z256rmikz |
| 93738 | 71771, // VRNDSCALEBF16Z256rri |
| 93739 | 71774, // VRNDSCALEBF16Z256rrik |
| 93740 | 71779, // VRNDSCALEBF16Z256rrikz |
| 93741 | 71783, // VRNDSCALEBF16Zrmbi |
| 93742 | 71786, // VRNDSCALEBF16Zrmbik |
| 93743 | 71791, // VRNDSCALEBF16Zrmbikz |
| 93744 | 71795, // VRNDSCALEBF16Zrmi |
| 93745 | 71798, // VRNDSCALEBF16Zrmik |
| 93746 | 71803, // VRNDSCALEBF16Zrmikz |
| 93747 | 71807, // VRNDSCALEBF16Zrri |
| 93748 | 71810, // VRNDSCALEBF16Zrrik |
| 93749 | 71815, // VRNDSCALEBF16Zrrikz |
| 93750 | 71819, // VRNDSCALEPDZ128rmbi |
| 93751 | 71822, // VRNDSCALEPDZ128rmbik |
| 93752 | 71827, // VRNDSCALEPDZ128rmbikz |
| 93753 | 71831, // VRNDSCALEPDZ128rmi |
| 93754 | 71834, // VRNDSCALEPDZ128rmik |
| 93755 | 71839, // VRNDSCALEPDZ128rmikz |
| 93756 | 71843, // VRNDSCALEPDZ128rri |
| 93757 | 71846, // VRNDSCALEPDZ128rrik |
| 93758 | 71851, // VRNDSCALEPDZ128rrikz |
| 93759 | 71855, // VRNDSCALEPDZ256rmbi |
| 93760 | 71858, // VRNDSCALEPDZ256rmbik |
| 93761 | 71863, // VRNDSCALEPDZ256rmbikz |
| 93762 | 71867, // VRNDSCALEPDZ256rmi |
| 93763 | 71870, // VRNDSCALEPDZ256rmik |
| 93764 | 71875, // VRNDSCALEPDZ256rmikz |
| 93765 | 71879, // VRNDSCALEPDZ256rri |
| 93766 | 71882, // VRNDSCALEPDZ256rrik |
| 93767 | 71887, // VRNDSCALEPDZ256rrikz |
| 93768 | 71891, // VRNDSCALEPDZrmbi |
| 93769 | 71894, // VRNDSCALEPDZrmbik |
| 93770 | 71899, // VRNDSCALEPDZrmbikz |
| 93771 | 71903, // VRNDSCALEPDZrmi |
| 93772 | 71906, // VRNDSCALEPDZrmik |
| 93773 | 71911, // VRNDSCALEPDZrmikz |
| 93774 | 71915, // VRNDSCALEPDZrri |
| 93775 | 71918, // VRNDSCALEPDZrrib |
| 93776 | 71921, // VRNDSCALEPDZrribk |
| 93777 | 71926, // VRNDSCALEPDZrribkz |
| 93778 | 71930, // VRNDSCALEPDZrrik |
| 93779 | 71935, // VRNDSCALEPDZrrikz |
| 93780 | 71939, // VRNDSCALEPHZ128rmbi |
| 93781 | 71942, // VRNDSCALEPHZ128rmbik |
| 93782 | 71947, // VRNDSCALEPHZ128rmbikz |
| 93783 | 71951, // VRNDSCALEPHZ128rmi |
| 93784 | 71954, // VRNDSCALEPHZ128rmik |
| 93785 | 71959, // VRNDSCALEPHZ128rmikz |
| 93786 | 71963, // VRNDSCALEPHZ128rri |
| 93787 | 71966, // VRNDSCALEPHZ128rrik |
| 93788 | 71971, // VRNDSCALEPHZ128rrikz |
| 93789 | 71975, // VRNDSCALEPHZ256rmbi |
| 93790 | 71978, // VRNDSCALEPHZ256rmbik |
| 93791 | 71983, // VRNDSCALEPHZ256rmbikz |
| 93792 | 71987, // VRNDSCALEPHZ256rmi |
| 93793 | 71990, // VRNDSCALEPHZ256rmik |
| 93794 | 71995, // VRNDSCALEPHZ256rmikz |
| 93795 | 71999, // VRNDSCALEPHZ256rri |
| 93796 | 72002, // VRNDSCALEPHZ256rrik |
| 93797 | 72007, // VRNDSCALEPHZ256rrikz |
| 93798 | 72011, // VRNDSCALEPHZrmbi |
| 93799 | 72014, // VRNDSCALEPHZrmbik |
| 93800 | 72019, // VRNDSCALEPHZrmbikz |
| 93801 | 72023, // VRNDSCALEPHZrmi |
| 93802 | 72026, // VRNDSCALEPHZrmik |
| 93803 | 72031, // VRNDSCALEPHZrmikz |
| 93804 | 72035, // VRNDSCALEPHZrri |
| 93805 | 72038, // VRNDSCALEPHZrrib |
| 93806 | 72041, // VRNDSCALEPHZrribk |
| 93807 | 72046, // VRNDSCALEPHZrribkz |
| 93808 | 72050, // VRNDSCALEPHZrrik |
| 93809 | 72055, // VRNDSCALEPHZrrikz |
| 93810 | 72059, // VRNDSCALEPSZ128rmbi |
| 93811 | 72062, // VRNDSCALEPSZ128rmbik |
| 93812 | 72067, // VRNDSCALEPSZ128rmbikz |
| 93813 | 72071, // VRNDSCALEPSZ128rmi |
| 93814 | 72074, // VRNDSCALEPSZ128rmik |
| 93815 | 72079, // VRNDSCALEPSZ128rmikz |
| 93816 | 72083, // VRNDSCALEPSZ128rri |
| 93817 | 72086, // VRNDSCALEPSZ128rrik |
| 93818 | 72091, // VRNDSCALEPSZ128rrikz |
| 93819 | 72095, // VRNDSCALEPSZ256rmbi |
| 93820 | 72098, // VRNDSCALEPSZ256rmbik |
| 93821 | 72103, // VRNDSCALEPSZ256rmbikz |
| 93822 | 72107, // VRNDSCALEPSZ256rmi |
| 93823 | 72110, // VRNDSCALEPSZ256rmik |
| 93824 | 72115, // VRNDSCALEPSZ256rmikz |
| 93825 | 72119, // VRNDSCALEPSZ256rri |
| 93826 | 72122, // VRNDSCALEPSZ256rrik |
| 93827 | 72127, // VRNDSCALEPSZ256rrikz |
| 93828 | 72131, // VRNDSCALEPSZrmbi |
| 93829 | 72134, // VRNDSCALEPSZrmbik |
| 93830 | 72139, // VRNDSCALEPSZrmbikz |
| 93831 | 72143, // VRNDSCALEPSZrmi |
| 93832 | 72146, // VRNDSCALEPSZrmik |
| 93833 | 72151, // VRNDSCALEPSZrmikz |
| 93834 | 72155, // VRNDSCALEPSZrri |
| 93835 | 72158, // VRNDSCALEPSZrrib |
| 93836 | 72161, // VRNDSCALEPSZrribk |
| 93837 | 72166, // VRNDSCALEPSZrribkz |
| 93838 | 72170, // VRNDSCALEPSZrrik |
| 93839 | 72175, // VRNDSCALEPSZrrikz |
| 93840 | 72179, // VRNDSCALESDZrmi |
| 93841 | 72183, // VRNDSCALESDZrmi_Int |
| 93842 | 72187, // VRNDSCALESDZrmik_Int |
| 93843 | 72193, // VRNDSCALESDZrmikz_Int |
| 93844 | 72198, // VRNDSCALESDZrri |
| 93845 | 72202, // VRNDSCALESDZrri_Int |
| 93846 | 72206, // VRNDSCALESDZrrib_Int |
| 93847 | 72210, // VRNDSCALESDZrribk_Int |
| 93848 | 72216, // VRNDSCALESDZrribkz_Int |
| 93849 | 72221, // VRNDSCALESDZrrik_Int |
| 93850 | 72227, // VRNDSCALESDZrrikz_Int |
| 93851 | 72232, // VRNDSCALESHZrmi |
| 93852 | 72236, // VRNDSCALESHZrmi_Int |
| 93853 | 72240, // VRNDSCALESHZrmik_Int |
| 93854 | 72246, // VRNDSCALESHZrmikz_Int |
| 93855 | 72251, // VRNDSCALESHZrri |
| 93856 | 72255, // VRNDSCALESHZrri_Int |
| 93857 | 72259, // VRNDSCALESHZrrib_Int |
| 93858 | 72263, // VRNDSCALESHZrribk_Int |
| 93859 | 72269, // VRNDSCALESHZrribkz_Int |
| 93860 | 72274, // VRNDSCALESHZrrik_Int |
| 93861 | 72280, // VRNDSCALESHZrrikz_Int |
| 93862 | 72285, // VRNDSCALESSZrmi |
| 93863 | 72289, // VRNDSCALESSZrmi_Int |
| 93864 | 72293, // VRNDSCALESSZrmik_Int |
| 93865 | 72299, // VRNDSCALESSZrmikz_Int |
| 93866 | 72304, // VRNDSCALESSZrri |
| 93867 | 72308, // VRNDSCALESSZrri_Int |
| 93868 | 72312, // VRNDSCALESSZrrib_Int |
| 93869 | 72316, // VRNDSCALESSZrribk_Int |
| 93870 | 72322, // VRNDSCALESSZrribkz_Int |
| 93871 | 72327, // VRNDSCALESSZrrik_Int |
| 93872 | 72333, // VRNDSCALESSZrrikz_Int |
| 93873 | 72338, // VROUNDPDYmi |
| 93874 | 72341, // VROUNDPDYri |
| 93875 | 72344, // VROUNDPDmi |
| 93876 | 72347, // VROUNDPDri |
| 93877 | 72350, // VROUNDPSYmi |
| 93878 | 72353, // VROUNDPSYri |
| 93879 | 72356, // VROUNDPSmi |
| 93880 | 72359, // VROUNDPSri |
| 93881 | 72362, // VROUNDSDmi |
| 93882 | 72366, // VROUNDSDmi_Int |
| 93883 | 72370, // VROUNDSDri |
| 93884 | 72374, // VROUNDSDri_Int |
| 93885 | 72378, // VROUNDSSmi |
| 93886 | 72382, // VROUNDSSmi_Int |
| 93887 | 72386, // VROUNDSSri |
| 93888 | 72390, // VROUNDSSri_Int |
| 93889 | 72394, // VRSQRT14PDZ128m |
| 93890 | 72396, // VRSQRT14PDZ128mb |
| 93891 | 72398, // VRSQRT14PDZ128mbk |
| 93892 | 72402, // VRSQRT14PDZ128mbkz |
| 93893 | 72405, // VRSQRT14PDZ128mk |
| 93894 | 72409, // VRSQRT14PDZ128mkz |
| 93895 | 72412, // VRSQRT14PDZ128r |
| 93896 | 72414, // VRSQRT14PDZ128rk |
| 93897 | 72418, // VRSQRT14PDZ128rkz |
| 93898 | 72421, // VRSQRT14PDZ256m |
| 93899 | 72423, // VRSQRT14PDZ256mb |
| 93900 | 72425, // VRSQRT14PDZ256mbk |
| 93901 | 72429, // VRSQRT14PDZ256mbkz |
| 93902 | 72432, // VRSQRT14PDZ256mk |
| 93903 | 72436, // VRSQRT14PDZ256mkz |
| 93904 | 72439, // VRSQRT14PDZ256r |
| 93905 | 72441, // VRSQRT14PDZ256rk |
| 93906 | 72445, // VRSQRT14PDZ256rkz |
| 93907 | 72448, // VRSQRT14PDZm |
| 93908 | 72450, // VRSQRT14PDZmb |
| 93909 | 72452, // VRSQRT14PDZmbk |
| 93910 | 72456, // VRSQRT14PDZmbkz |
| 93911 | 72459, // VRSQRT14PDZmk |
| 93912 | 72463, // VRSQRT14PDZmkz |
| 93913 | 72466, // VRSQRT14PDZr |
| 93914 | 72468, // VRSQRT14PDZrk |
| 93915 | 72472, // VRSQRT14PDZrkz |
| 93916 | 72475, // VRSQRT14PSZ128m |
| 93917 | 72477, // VRSQRT14PSZ128mb |
| 93918 | 72479, // VRSQRT14PSZ128mbk |
| 93919 | 72483, // VRSQRT14PSZ128mbkz |
| 93920 | 72486, // VRSQRT14PSZ128mk |
| 93921 | 72490, // VRSQRT14PSZ128mkz |
| 93922 | 72493, // VRSQRT14PSZ128r |
| 93923 | 72495, // VRSQRT14PSZ128rk |
| 93924 | 72499, // VRSQRT14PSZ128rkz |
| 93925 | 72502, // VRSQRT14PSZ256m |
| 93926 | 72504, // VRSQRT14PSZ256mb |
| 93927 | 72506, // VRSQRT14PSZ256mbk |
| 93928 | 72510, // VRSQRT14PSZ256mbkz |
| 93929 | 72513, // VRSQRT14PSZ256mk |
| 93930 | 72517, // VRSQRT14PSZ256mkz |
| 93931 | 72520, // VRSQRT14PSZ256r |
| 93932 | 72522, // VRSQRT14PSZ256rk |
| 93933 | 72526, // VRSQRT14PSZ256rkz |
| 93934 | 72529, // VRSQRT14PSZm |
| 93935 | 72531, // VRSQRT14PSZmb |
| 93936 | 72533, // VRSQRT14PSZmbk |
| 93937 | 72537, // VRSQRT14PSZmbkz |
| 93938 | 72540, // VRSQRT14PSZmk |
| 93939 | 72544, // VRSQRT14PSZmkz |
| 93940 | 72547, // VRSQRT14PSZr |
| 93941 | 72549, // VRSQRT14PSZrk |
| 93942 | 72553, // VRSQRT14PSZrkz |
| 93943 | 72556, // VRSQRT14SDZrm |
| 93944 | 72559, // VRSQRT14SDZrmk |
| 93945 | 72564, // VRSQRT14SDZrmkz |
| 93946 | 72568, // VRSQRT14SDZrr |
| 93947 | 72571, // VRSQRT14SDZrrk |
| 93948 | 72576, // VRSQRT14SDZrrkz |
| 93949 | 72580, // VRSQRT14SSZrm |
| 93950 | 72583, // VRSQRT14SSZrmk |
| 93951 | 72588, // VRSQRT14SSZrmkz |
| 93952 | 72592, // VRSQRT14SSZrr |
| 93953 | 72595, // VRSQRT14SSZrrk |
| 93954 | 72600, // VRSQRT14SSZrrkz |
| 93955 | 72604, // VRSQRT28PDZm |
| 93956 | 72606, // VRSQRT28PDZmb |
| 93957 | 72608, // VRSQRT28PDZmbk |
| 93958 | 72612, // VRSQRT28PDZmbkz |
| 93959 | 72615, // VRSQRT28PDZmk |
| 93960 | 72619, // VRSQRT28PDZmkz |
| 93961 | 72622, // VRSQRT28PDZr |
| 93962 | 72624, // VRSQRT28PDZrb |
| 93963 | 72626, // VRSQRT28PDZrbk |
| 93964 | 72630, // VRSQRT28PDZrbkz |
| 93965 | 72633, // VRSQRT28PDZrk |
| 93966 | 72637, // VRSQRT28PDZrkz |
| 93967 | 72640, // VRSQRT28PSZm |
| 93968 | 72642, // VRSQRT28PSZmb |
| 93969 | 72644, // VRSQRT28PSZmbk |
| 93970 | 72648, // VRSQRT28PSZmbkz |
| 93971 | 72651, // VRSQRT28PSZmk |
| 93972 | 72655, // VRSQRT28PSZmkz |
| 93973 | 72658, // VRSQRT28PSZr |
| 93974 | 72660, // VRSQRT28PSZrb |
| 93975 | 72662, // VRSQRT28PSZrbk |
| 93976 | 72666, // VRSQRT28PSZrbkz |
| 93977 | 72669, // VRSQRT28PSZrk |
| 93978 | 72673, // VRSQRT28PSZrkz |
| 93979 | 72676, // VRSQRT28SDZm |
| 93980 | 72679, // VRSQRT28SDZmk |
| 93981 | 72684, // VRSQRT28SDZmkz |
| 93982 | 72688, // VRSQRT28SDZr |
| 93983 | 72691, // VRSQRT28SDZrb |
| 93984 | 72694, // VRSQRT28SDZrbk |
| 93985 | 72699, // VRSQRT28SDZrbkz |
| 93986 | 72703, // VRSQRT28SDZrk |
| 93987 | 72708, // VRSQRT28SDZrkz |
| 93988 | 72712, // VRSQRT28SSZm |
| 93989 | 72715, // VRSQRT28SSZmk |
| 93990 | 72720, // VRSQRT28SSZmkz |
| 93991 | 72724, // VRSQRT28SSZr |
| 93992 | 72727, // VRSQRT28SSZrb |
| 93993 | 72730, // VRSQRT28SSZrbk |
| 93994 | 72735, // VRSQRT28SSZrbkz |
| 93995 | 72739, // VRSQRT28SSZrk |
| 93996 | 72744, // VRSQRT28SSZrkz |
| 93997 | 72748, // VRSQRTBF16Z128m |
| 93998 | 72750, // VRSQRTBF16Z128mb |
| 93999 | 72752, // VRSQRTBF16Z128mbk |
| 94000 | 72756, // VRSQRTBF16Z128mbkz |
| 94001 | 72759, // VRSQRTBF16Z128mk |
| 94002 | 72763, // VRSQRTBF16Z128mkz |
| 94003 | 72766, // VRSQRTBF16Z128r |
| 94004 | 72768, // VRSQRTBF16Z128rk |
| 94005 | 72772, // VRSQRTBF16Z128rkz |
| 94006 | 72775, // VRSQRTBF16Z256m |
| 94007 | 72777, // VRSQRTBF16Z256mb |
| 94008 | 72779, // VRSQRTBF16Z256mbk |
| 94009 | 72783, // VRSQRTBF16Z256mbkz |
| 94010 | 72786, // VRSQRTBF16Z256mk |
| 94011 | 72790, // VRSQRTBF16Z256mkz |
| 94012 | 72793, // VRSQRTBF16Z256r |
| 94013 | 72795, // VRSQRTBF16Z256rk |
| 94014 | 72799, // VRSQRTBF16Z256rkz |
| 94015 | 72802, // VRSQRTBF16Zm |
| 94016 | 72804, // VRSQRTBF16Zmb |
| 94017 | 72806, // VRSQRTBF16Zmbk |
| 94018 | 72810, // VRSQRTBF16Zmbkz |
| 94019 | 72813, // VRSQRTBF16Zmk |
| 94020 | 72817, // VRSQRTBF16Zmkz |
| 94021 | 72820, // VRSQRTBF16Zr |
| 94022 | 72822, // VRSQRTBF16Zrk |
| 94023 | 72826, // VRSQRTBF16Zrkz |
| 94024 | 72829, // VRSQRTPHZ128m |
| 94025 | 72831, // VRSQRTPHZ128mb |
| 94026 | 72833, // VRSQRTPHZ128mbk |
| 94027 | 72837, // VRSQRTPHZ128mbkz |
| 94028 | 72840, // VRSQRTPHZ128mk |
| 94029 | 72844, // VRSQRTPHZ128mkz |
| 94030 | 72847, // VRSQRTPHZ128r |
| 94031 | 72849, // VRSQRTPHZ128rk |
| 94032 | 72853, // VRSQRTPHZ128rkz |
| 94033 | 72856, // VRSQRTPHZ256m |
| 94034 | 72858, // VRSQRTPHZ256mb |
| 94035 | 72860, // VRSQRTPHZ256mbk |
| 94036 | 72864, // VRSQRTPHZ256mbkz |
| 94037 | 72867, // VRSQRTPHZ256mk |
| 94038 | 72871, // VRSQRTPHZ256mkz |
| 94039 | 72874, // VRSQRTPHZ256r |
| 94040 | 72876, // VRSQRTPHZ256rk |
| 94041 | 72880, // VRSQRTPHZ256rkz |
| 94042 | 72883, // VRSQRTPHZm |
| 94043 | 72885, // VRSQRTPHZmb |
| 94044 | 72887, // VRSQRTPHZmbk |
| 94045 | 72891, // VRSQRTPHZmbkz |
| 94046 | 72894, // VRSQRTPHZmk |
| 94047 | 72898, // VRSQRTPHZmkz |
| 94048 | 72901, // VRSQRTPHZr |
| 94049 | 72903, // VRSQRTPHZrk |
| 94050 | 72907, // VRSQRTPHZrkz |
| 94051 | 72910, // VRSQRTPSYm |
| 94052 | 72912, // VRSQRTPSYr |
| 94053 | 72914, // VRSQRTPSm |
| 94054 | 72916, // VRSQRTPSr |
| 94055 | 72918, // VRSQRTSHZrm |
| 94056 | 72921, // VRSQRTSHZrmk |
| 94057 | 72926, // VRSQRTSHZrmkz |
| 94058 | 72930, // VRSQRTSHZrr |
| 94059 | 72933, // VRSQRTSHZrrk |
| 94060 | 72938, // VRSQRTSHZrrkz |
| 94061 | 72942, // VRSQRTSSm |
| 94062 | 72945, // VRSQRTSSm_Int |
| 94063 | 72948, // VRSQRTSSr |
| 94064 | 72951, // VRSQRTSSr_Int |
| 94065 | 72954, // VSCALEFBF16Z128rm |
| 94066 | 72957, // VSCALEFBF16Z128rmb |
| 94067 | 72960, // VSCALEFBF16Z128rmbk |
| 94068 | 72965, // VSCALEFBF16Z128rmbkz |
| 94069 | 72969, // VSCALEFBF16Z128rmk |
| 94070 | 72974, // VSCALEFBF16Z128rmkz |
| 94071 | 72978, // VSCALEFBF16Z128rr |
| 94072 | 72981, // VSCALEFBF16Z128rrk |
| 94073 | 72986, // VSCALEFBF16Z128rrkz |
| 94074 | 72990, // VSCALEFBF16Z256rm |
| 94075 | 72993, // VSCALEFBF16Z256rmb |
| 94076 | 72996, // VSCALEFBF16Z256rmbk |
| 94077 | 73001, // VSCALEFBF16Z256rmbkz |
| 94078 | 73005, // VSCALEFBF16Z256rmk |
| 94079 | 73010, // VSCALEFBF16Z256rmkz |
| 94080 | 73014, // VSCALEFBF16Z256rr |
| 94081 | 73017, // VSCALEFBF16Z256rrk |
| 94082 | 73022, // VSCALEFBF16Z256rrkz |
| 94083 | 73026, // VSCALEFBF16Zrm |
| 94084 | 73029, // VSCALEFBF16Zrmb |
| 94085 | 73032, // VSCALEFBF16Zrmbk |
| 94086 | 73037, // VSCALEFBF16Zrmbkz |
| 94087 | 73041, // VSCALEFBF16Zrmk |
| 94088 | 73046, // VSCALEFBF16Zrmkz |
| 94089 | 73050, // VSCALEFBF16Zrr |
| 94090 | 73053, // VSCALEFBF16Zrrk |
| 94091 | 73058, // VSCALEFBF16Zrrkz |
| 94092 | 73062, // VSCALEFPDZ128rm |
| 94093 | 73065, // VSCALEFPDZ128rmb |
| 94094 | 73068, // VSCALEFPDZ128rmbk |
| 94095 | 73073, // VSCALEFPDZ128rmbkz |
| 94096 | 73077, // VSCALEFPDZ128rmk |
| 94097 | 73082, // VSCALEFPDZ128rmkz |
| 94098 | 73086, // VSCALEFPDZ128rr |
| 94099 | 73089, // VSCALEFPDZ128rrk |
| 94100 | 73094, // VSCALEFPDZ128rrkz |
| 94101 | 73098, // VSCALEFPDZ256rm |
| 94102 | 73101, // VSCALEFPDZ256rmb |
| 94103 | 73104, // VSCALEFPDZ256rmbk |
| 94104 | 73109, // VSCALEFPDZ256rmbkz |
| 94105 | 73113, // VSCALEFPDZ256rmk |
| 94106 | 73118, // VSCALEFPDZ256rmkz |
| 94107 | 73122, // VSCALEFPDZ256rr |
| 94108 | 73125, // VSCALEFPDZ256rrk |
| 94109 | 73130, // VSCALEFPDZ256rrkz |
| 94110 | 73134, // VSCALEFPDZrm |
| 94111 | 73137, // VSCALEFPDZrmb |
| 94112 | 73140, // VSCALEFPDZrmbk |
| 94113 | 73145, // VSCALEFPDZrmbkz |
| 94114 | 73149, // VSCALEFPDZrmk |
| 94115 | 73154, // VSCALEFPDZrmkz |
| 94116 | 73158, // VSCALEFPDZrr |
| 94117 | 73161, // VSCALEFPDZrrb |
| 94118 | 73165, // VSCALEFPDZrrbk |
| 94119 | 73171, // VSCALEFPDZrrbkz |
| 94120 | 73176, // VSCALEFPDZrrk |
| 94121 | 73181, // VSCALEFPDZrrkz |
| 94122 | 73185, // VSCALEFPHZ128rm |
| 94123 | 73188, // VSCALEFPHZ128rmb |
| 94124 | 73191, // VSCALEFPHZ128rmbk |
| 94125 | 73196, // VSCALEFPHZ128rmbkz |
| 94126 | 73200, // VSCALEFPHZ128rmk |
| 94127 | 73205, // VSCALEFPHZ128rmkz |
| 94128 | 73209, // VSCALEFPHZ128rr |
| 94129 | 73212, // VSCALEFPHZ128rrk |
| 94130 | 73217, // VSCALEFPHZ128rrkz |
| 94131 | 73221, // VSCALEFPHZ256rm |
| 94132 | 73224, // VSCALEFPHZ256rmb |
| 94133 | 73227, // VSCALEFPHZ256rmbk |
| 94134 | 73232, // VSCALEFPHZ256rmbkz |
| 94135 | 73236, // VSCALEFPHZ256rmk |
| 94136 | 73241, // VSCALEFPHZ256rmkz |
| 94137 | 73245, // VSCALEFPHZ256rr |
| 94138 | 73248, // VSCALEFPHZ256rrk |
| 94139 | 73253, // VSCALEFPHZ256rrkz |
| 94140 | 73257, // VSCALEFPHZrm |
| 94141 | 73260, // VSCALEFPHZrmb |
| 94142 | 73263, // VSCALEFPHZrmbk |
| 94143 | 73268, // VSCALEFPHZrmbkz |
| 94144 | 73272, // VSCALEFPHZrmk |
| 94145 | 73277, // VSCALEFPHZrmkz |
| 94146 | 73281, // VSCALEFPHZrr |
| 94147 | 73284, // VSCALEFPHZrrb |
| 94148 | 73288, // VSCALEFPHZrrbk |
| 94149 | 73294, // VSCALEFPHZrrbkz |
| 94150 | 73299, // VSCALEFPHZrrk |
| 94151 | 73304, // VSCALEFPHZrrkz |
| 94152 | 73308, // VSCALEFPSZ128rm |
| 94153 | 73311, // VSCALEFPSZ128rmb |
| 94154 | 73314, // VSCALEFPSZ128rmbk |
| 94155 | 73319, // VSCALEFPSZ128rmbkz |
| 94156 | 73323, // VSCALEFPSZ128rmk |
| 94157 | 73328, // VSCALEFPSZ128rmkz |
| 94158 | 73332, // VSCALEFPSZ128rr |
| 94159 | 73335, // VSCALEFPSZ128rrk |
| 94160 | 73340, // VSCALEFPSZ128rrkz |
| 94161 | 73344, // VSCALEFPSZ256rm |
| 94162 | 73347, // VSCALEFPSZ256rmb |
| 94163 | 73350, // VSCALEFPSZ256rmbk |
| 94164 | 73355, // VSCALEFPSZ256rmbkz |
| 94165 | 73359, // VSCALEFPSZ256rmk |
| 94166 | 73364, // VSCALEFPSZ256rmkz |
| 94167 | 73368, // VSCALEFPSZ256rr |
| 94168 | 73371, // VSCALEFPSZ256rrk |
| 94169 | 73376, // VSCALEFPSZ256rrkz |
| 94170 | 73380, // VSCALEFPSZrm |
| 94171 | 73383, // VSCALEFPSZrmb |
| 94172 | 73386, // VSCALEFPSZrmbk |
| 94173 | 73391, // VSCALEFPSZrmbkz |
| 94174 | 73395, // VSCALEFPSZrmk |
| 94175 | 73400, // VSCALEFPSZrmkz |
| 94176 | 73404, // VSCALEFPSZrr |
| 94177 | 73407, // VSCALEFPSZrrb |
| 94178 | 73411, // VSCALEFPSZrrbk |
| 94179 | 73417, // VSCALEFPSZrrbkz |
| 94180 | 73422, // VSCALEFPSZrrk |
| 94181 | 73427, // VSCALEFPSZrrkz |
| 94182 | 73431, // VSCALEFSDZrm |
| 94183 | 73434, // VSCALEFSDZrmk |
| 94184 | 73439, // VSCALEFSDZrmkz |
| 94185 | 73443, // VSCALEFSDZrr |
| 94186 | 73446, // VSCALEFSDZrrb_Int |
| 94187 | 73450, // VSCALEFSDZrrbk_Int |
| 94188 | 73456, // VSCALEFSDZrrbkz_Int |
| 94189 | 73461, // VSCALEFSDZrrk |
| 94190 | 73466, // VSCALEFSDZrrkz |
| 94191 | 73470, // VSCALEFSHZrm |
| 94192 | 73473, // VSCALEFSHZrmk |
| 94193 | 73478, // VSCALEFSHZrmkz |
| 94194 | 73482, // VSCALEFSHZrr |
| 94195 | 73485, // VSCALEFSHZrrb_Int |
| 94196 | 73489, // VSCALEFSHZrrbk_Int |
| 94197 | 73495, // VSCALEFSHZrrbkz_Int |
| 94198 | 73500, // VSCALEFSHZrrk |
| 94199 | 73505, // VSCALEFSHZrrkz |
| 94200 | 73509, // VSCALEFSSZrm |
| 94201 | 73512, // VSCALEFSSZrmk |
| 94202 | 73517, // VSCALEFSSZrmkz |
| 94203 | 73521, // VSCALEFSSZrr |
| 94204 | 73524, // VSCALEFSSZrrb_Int |
| 94205 | 73528, // VSCALEFSSZrrbk_Int |
| 94206 | 73534, // VSCALEFSSZrrbkz_Int |
| 94207 | 73539, // VSCALEFSSZrrk |
| 94208 | 73544, // VSCALEFSSZrrkz |
| 94209 | 73548, // VSCATTERDPDZ128mr |
| 94210 | 73552, // VSCATTERDPDZ256mr |
| 94211 | 73556, // VSCATTERDPDZmr |
| 94212 | 73560, // VSCATTERDPSZ128mr |
| 94213 | 73564, // VSCATTERDPSZ256mr |
| 94214 | 73568, // VSCATTERDPSZmr |
| 94215 | 73572, // VSCATTERPF0DPDm |
| 94216 | 73574, // VSCATTERPF0DPSm |
| 94217 | 73576, // VSCATTERPF0QPDm |
| 94218 | 73578, // VSCATTERPF0QPSm |
| 94219 | 73580, // VSCATTERPF1DPDm |
| 94220 | 73582, // VSCATTERPF1DPSm |
| 94221 | 73584, // VSCATTERPF1QPDm |
| 94222 | 73586, // VSCATTERPF1QPSm |
| 94223 | 73588, // VSCATTERQPDZ128mr |
| 94224 | 73592, // VSCATTERQPDZ256mr |
| 94225 | 73596, // VSCATTERQPDZmr |
| 94226 | 73600, // VSCATTERQPSZ128mr |
| 94227 | 73604, // VSCATTERQPSZ256mr |
| 94228 | 73608, // VSCATTERQPSZmr |
| 94229 | 73612, // VSHA512MSG1rr |
| 94230 | 73615, // VSHA512MSG2rr |
| 94231 | 73618, // VSHA512RNDS2rr |
| 94232 | 73622, // VSHUFF32X4Z256rmbi |
| 94233 | 73626, // VSHUFF32X4Z256rmbik |
| 94234 | 73632, // VSHUFF32X4Z256rmbikz |
| 94235 | 73637, // VSHUFF32X4Z256rmi |
| 94236 | 73641, // VSHUFF32X4Z256rmik |
| 94237 | 73647, // VSHUFF32X4Z256rmikz |
| 94238 | 73652, // VSHUFF32X4Z256rri |
| 94239 | 73656, // VSHUFF32X4Z256rrik |
| 94240 | 73662, // VSHUFF32X4Z256rrikz |
| 94241 | 73667, // VSHUFF32X4Zrmbi |
| 94242 | 73671, // VSHUFF32X4Zrmbik |
| 94243 | 73677, // VSHUFF32X4Zrmbikz |
| 94244 | 73682, // VSHUFF32X4Zrmi |
| 94245 | 73686, // VSHUFF32X4Zrmik |
| 94246 | 73692, // VSHUFF32X4Zrmikz |
| 94247 | 73697, // VSHUFF32X4Zrri |
| 94248 | 73701, // VSHUFF32X4Zrrik |
| 94249 | 73707, // VSHUFF32X4Zrrikz |
| 94250 | 73712, // VSHUFF64X2Z256rmbi |
| 94251 | 73716, // VSHUFF64X2Z256rmbik |
| 94252 | 73722, // VSHUFF64X2Z256rmbikz |
| 94253 | 73727, // VSHUFF64X2Z256rmi |
| 94254 | 73731, // VSHUFF64X2Z256rmik |
| 94255 | 73737, // VSHUFF64X2Z256rmikz |
| 94256 | 73742, // VSHUFF64X2Z256rri |
| 94257 | 73746, // VSHUFF64X2Z256rrik |
| 94258 | 73752, // VSHUFF64X2Z256rrikz |
| 94259 | 73757, // VSHUFF64X2Zrmbi |
| 94260 | 73761, // VSHUFF64X2Zrmbik |
| 94261 | 73767, // VSHUFF64X2Zrmbikz |
| 94262 | 73772, // VSHUFF64X2Zrmi |
| 94263 | 73776, // VSHUFF64X2Zrmik |
| 94264 | 73782, // VSHUFF64X2Zrmikz |
| 94265 | 73787, // VSHUFF64X2Zrri |
| 94266 | 73791, // VSHUFF64X2Zrrik |
| 94267 | 73797, // VSHUFF64X2Zrrikz |
| 94268 | 73802, // VSHUFI32X4Z256rmbi |
| 94269 | 73806, // VSHUFI32X4Z256rmbik |
| 94270 | 73812, // VSHUFI32X4Z256rmbikz |
| 94271 | 73817, // VSHUFI32X4Z256rmi |
| 94272 | 73821, // VSHUFI32X4Z256rmik |
| 94273 | 73827, // VSHUFI32X4Z256rmikz |
| 94274 | 73832, // VSHUFI32X4Z256rri |
| 94275 | 73836, // VSHUFI32X4Z256rrik |
| 94276 | 73842, // VSHUFI32X4Z256rrikz |
| 94277 | 73847, // VSHUFI32X4Zrmbi |
| 94278 | 73851, // VSHUFI32X4Zrmbik |
| 94279 | 73857, // VSHUFI32X4Zrmbikz |
| 94280 | 73862, // VSHUFI32X4Zrmi |
| 94281 | 73866, // VSHUFI32X4Zrmik |
| 94282 | 73872, // VSHUFI32X4Zrmikz |
| 94283 | 73877, // VSHUFI32X4Zrri |
| 94284 | 73881, // VSHUFI32X4Zrrik |
| 94285 | 73887, // VSHUFI32X4Zrrikz |
| 94286 | 73892, // VSHUFI64X2Z256rmbi |
| 94287 | 73896, // VSHUFI64X2Z256rmbik |
| 94288 | 73902, // VSHUFI64X2Z256rmbikz |
| 94289 | 73907, // VSHUFI64X2Z256rmi |
| 94290 | 73911, // VSHUFI64X2Z256rmik |
| 94291 | 73917, // VSHUFI64X2Z256rmikz |
| 94292 | 73922, // VSHUFI64X2Z256rri |
| 94293 | 73926, // VSHUFI64X2Z256rrik |
| 94294 | 73932, // VSHUFI64X2Z256rrikz |
| 94295 | 73937, // VSHUFI64X2Zrmbi |
| 94296 | 73941, // VSHUFI64X2Zrmbik |
| 94297 | 73947, // VSHUFI64X2Zrmbikz |
| 94298 | 73952, // VSHUFI64X2Zrmi |
| 94299 | 73956, // VSHUFI64X2Zrmik |
| 94300 | 73962, // VSHUFI64X2Zrmikz |
| 94301 | 73967, // VSHUFI64X2Zrri |
| 94302 | 73971, // VSHUFI64X2Zrrik |
| 94303 | 73977, // VSHUFI64X2Zrrikz |
| 94304 | 73982, // VSHUFPDYrmi |
| 94305 | 73986, // VSHUFPDYrri |
| 94306 | 73990, // VSHUFPDZ128rmbi |
| 94307 | 73994, // VSHUFPDZ128rmbik |
| 94308 | 74000, // VSHUFPDZ128rmbikz |
| 94309 | 74005, // VSHUFPDZ128rmi |
| 94310 | 74009, // VSHUFPDZ128rmik |
| 94311 | 74015, // VSHUFPDZ128rmikz |
| 94312 | 74020, // VSHUFPDZ128rri |
| 94313 | 74024, // VSHUFPDZ128rrik |
| 94314 | 74030, // VSHUFPDZ128rrikz |
| 94315 | 74035, // VSHUFPDZ256rmbi |
| 94316 | 74039, // VSHUFPDZ256rmbik |
| 94317 | 74045, // VSHUFPDZ256rmbikz |
| 94318 | 74050, // VSHUFPDZ256rmi |
| 94319 | 74054, // VSHUFPDZ256rmik |
| 94320 | 74060, // VSHUFPDZ256rmikz |
| 94321 | 74065, // VSHUFPDZ256rri |
| 94322 | 74069, // VSHUFPDZ256rrik |
| 94323 | 74075, // VSHUFPDZ256rrikz |
| 94324 | 74080, // VSHUFPDZrmbi |
| 94325 | 74084, // VSHUFPDZrmbik |
| 94326 | 74090, // VSHUFPDZrmbikz |
| 94327 | 74095, // VSHUFPDZrmi |
| 94328 | 74099, // VSHUFPDZrmik |
| 94329 | 74105, // VSHUFPDZrmikz |
| 94330 | 74110, // VSHUFPDZrri |
| 94331 | 74114, // VSHUFPDZrrik |
| 94332 | 74120, // VSHUFPDZrrikz |
| 94333 | 74125, // VSHUFPDrmi |
| 94334 | 74129, // VSHUFPDrri |
| 94335 | 74133, // VSHUFPSYrmi |
| 94336 | 74137, // VSHUFPSYrri |
| 94337 | 74141, // VSHUFPSZ128rmbi |
| 94338 | 74145, // VSHUFPSZ128rmbik |
| 94339 | 74151, // VSHUFPSZ128rmbikz |
| 94340 | 74156, // VSHUFPSZ128rmi |
| 94341 | 74160, // VSHUFPSZ128rmik |
| 94342 | 74166, // VSHUFPSZ128rmikz |
| 94343 | 74171, // VSHUFPSZ128rri |
| 94344 | 74175, // VSHUFPSZ128rrik |
| 94345 | 74181, // VSHUFPSZ128rrikz |
| 94346 | 74186, // VSHUFPSZ256rmbi |
| 94347 | 74190, // VSHUFPSZ256rmbik |
| 94348 | 74196, // VSHUFPSZ256rmbikz |
| 94349 | 74201, // VSHUFPSZ256rmi |
| 94350 | 74205, // VSHUFPSZ256rmik |
| 94351 | 74211, // VSHUFPSZ256rmikz |
| 94352 | 74216, // VSHUFPSZ256rri |
| 94353 | 74220, // VSHUFPSZ256rrik |
| 94354 | 74226, // VSHUFPSZ256rrikz |
| 94355 | 74231, // VSHUFPSZrmbi |
| 94356 | 74235, // VSHUFPSZrmbik |
| 94357 | 74241, // VSHUFPSZrmbikz |
| 94358 | 74246, // VSHUFPSZrmi |
| 94359 | 74250, // VSHUFPSZrmik |
| 94360 | 74256, // VSHUFPSZrmikz |
| 94361 | 74261, // VSHUFPSZrri |
| 94362 | 74265, // VSHUFPSZrrik |
| 94363 | 74271, // VSHUFPSZrrikz |
| 94364 | 74276, // VSHUFPSrmi |
| 94365 | 74280, // VSHUFPSrri |
| 94366 | 74284, // VSM3MSG1rm |
| 94367 | 74288, // VSM3MSG1rr |
| 94368 | 74292, // VSM3MSG2rm |
| 94369 | 74296, // VSM3MSG2rr |
| 94370 | 74300, // VSM3RNDS2rmi |
| 94371 | 74305, // VSM3RNDS2rri |
| 94372 | 74310, // VSM4KEY4Yrm |
| 94373 | 74313, // VSM4KEY4Yrr |
| 94374 | 74316, // VSM4KEY4Z128rm |
| 94375 | 74319, // VSM4KEY4Z128rr |
| 94376 | 74322, // VSM4KEY4Z256rm |
| 94377 | 74325, // VSM4KEY4Z256rr |
| 94378 | 74328, // VSM4KEY4Zrm |
| 94379 | 74331, // VSM4KEY4Zrr |
| 94380 | 74334, // VSM4KEY4rm |
| 94381 | 74337, // VSM4KEY4rr |
| 94382 | 74340, // VSM4RNDS4Yrm |
| 94383 | 74343, // VSM4RNDS4Yrr |
| 94384 | 74346, // VSM4RNDS4Z128rm |
| 94385 | 74349, // VSM4RNDS4Z128rr |
| 94386 | 74352, // VSM4RNDS4Z256rm |
| 94387 | 74355, // VSM4RNDS4Z256rr |
| 94388 | 74358, // VSM4RNDS4Zrm |
| 94389 | 74361, // VSM4RNDS4Zrr |
| 94390 | 74364, // VSM4RNDS4rm |
| 94391 | 74367, // VSM4RNDS4rr |
| 94392 | 74370, // VSQRTBF16Z128m |
| 94393 | 74372, // VSQRTBF16Z128mb |
| 94394 | 74374, // VSQRTBF16Z128mbk |
| 94395 | 74378, // VSQRTBF16Z128mbkz |
| 94396 | 74381, // VSQRTBF16Z128mk |
| 94397 | 74385, // VSQRTBF16Z128mkz |
| 94398 | 74388, // VSQRTBF16Z128r |
| 94399 | 74390, // VSQRTBF16Z128rk |
| 94400 | 74394, // VSQRTBF16Z128rkz |
| 94401 | 74397, // VSQRTBF16Z256m |
| 94402 | 74399, // VSQRTBF16Z256mb |
| 94403 | 74401, // VSQRTBF16Z256mbk |
| 94404 | 74405, // VSQRTBF16Z256mbkz |
| 94405 | 74408, // VSQRTBF16Z256mk |
| 94406 | 74412, // VSQRTBF16Z256mkz |
| 94407 | 74415, // VSQRTBF16Z256r |
| 94408 | 74417, // VSQRTBF16Z256rk |
| 94409 | 74421, // VSQRTBF16Z256rkz |
| 94410 | 74424, // VSQRTBF16Zm |
| 94411 | 74426, // VSQRTBF16Zmb |
| 94412 | 74428, // VSQRTBF16Zmbk |
| 94413 | 74432, // VSQRTBF16Zmbkz |
| 94414 | 74435, // VSQRTBF16Zmk |
| 94415 | 74439, // VSQRTBF16Zmkz |
| 94416 | 74442, // VSQRTBF16Zr |
| 94417 | 74444, // VSQRTBF16Zrk |
| 94418 | 74448, // VSQRTBF16Zrkz |
| 94419 | 74451, // VSQRTPDYm |
| 94420 | 74453, // VSQRTPDYr |
| 94421 | 74455, // VSQRTPDZ128m |
| 94422 | 74457, // VSQRTPDZ128mb |
| 94423 | 74459, // VSQRTPDZ128mbk |
| 94424 | 74463, // VSQRTPDZ128mbkz |
| 94425 | 74466, // VSQRTPDZ128mk |
| 94426 | 74470, // VSQRTPDZ128mkz |
| 94427 | 74473, // VSQRTPDZ128r |
| 94428 | 74475, // VSQRTPDZ128rk |
| 94429 | 74479, // VSQRTPDZ128rkz |
| 94430 | 74482, // VSQRTPDZ256m |
| 94431 | 74484, // VSQRTPDZ256mb |
| 94432 | 74486, // VSQRTPDZ256mbk |
| 94433 | 74490, // VSQRTPDZ256mbkz |
| 94434 | 74493, // VSQRTPDZ256mk |
| 94435 | 74497, // VSQRTPDZ256mkz |
| 94436 | 74500, // VSQRTPDZ256r |
| 94437 | 74502, // VSQRTPDZ256rk |
| 94438 | 74506, // VSQRTPDZ256rkz |
| 94439 | 74509, // VSQRTPDZm |
| 94440 | 74511, // VSQRTPDZmb |
| 94441 | 74513, // VSQRTPDZmbk |
| 94442 | 74517, // VSQRTPDZmbkz |
| 94443 | 74520, // VSQRTPDZmk |
| 94444 | 74524, // VSQRTPDZmkz |
| 94445 | 74527, // VSQRTPDZr |
| 94446 | 74529, // VSQRTPDZrb |
| 94447 | 74532, // VSQRTPDZrbk |
| 94448 | 74537, // VSQRTPDZrbkz |
| 94449 | 74541, // VSQRTPDZrk |
| 94450 | 74545, // VSQRTPDZrkz |
| 94451 | 74548, // VSQRTPDm |
| 94452 | 74550, // VSQRTPDr |
| 94453 | 74552, // VSQRTPHZ128m |
| 94454 | 74554, // VSQRTPHZ128mb |
| 94455 | 74556, // VSQRTPHZ128mbk |
| 94456 | 74560, // VSQRTPHZ128mbkz |
| 94457 | 74563, // VSQRTPHZ128mk |
| 94458 | 74567, // VSQRTPHZ128mkz |
| 94459 | 74570, // VSQRTPHZ128r |
| 94460 | 74572, // VSQRTPHZ128rk |
| 94461 | 74576, // VSQRTPHZ128rkz |
| 94462 | 74579, // VSQRTPHZ256m |
| 94463 | 74581, // VSQRTPHZ256mb |
| 94464 | 74583, // VSQRTPHZ256mbk |
| 94465 | 74587, // VSQRTPHZ256mbkz |
| 94466 | 74590, // VSQRTPHZ256mk |
| 94467 | 74594, // VSQRTPHZ256mkz |
| 94468 | 74597, // VSQRTPHZ256r |
| 94469 | 74599, // VSQRTPHZ256rk |
| 94470 | 74603, // VSQRTPHZ256rkz |
| 94471 | 74606, // VSQRTPHZm |
| 94472 | 74608, // VSQRTPHZmb |
| 94473 | 74610, // VSQRTPHZmbk |
| 94474 | 74614, // VSQRTPHZmbkz |
| 94475 | 74617, // VSQRTPHZmk |
| 94476 | 74621, // VSQRTPHZmkz |
| 94477 | 74624, // VSQRTPHZr |
| 94478 | 74626, // VSQRTPHZrb |
| 94479 | 74629, // VSQRTPHZrbk |
| 94480 | 74634, // VSQRTPHZrbkz |
| 94481 | 74638, // VSQRTPHZrk |
| 94482 | 74642, // VSQRTPHZrkz |
| 94483 | 74645, // VSQRTPSYm |
| 94484 | 74647, // VSQRTPSYr |
| 94485 | 74649, // VSQRTPSZ128m |
| 94486 | 74651, // VSQRTPSZ128mb |
| 94487 | 74653, // VSQRTPSZ128mbk |
| 94488 | 74657, // VSQRTPSZ128mbkz |
| 94489 | 74660, // VSQRTPSZ128mk |
| 94490 | 74664, // VSQRTPSZ128mkz |
| 94491 | 74667, // VSQRTPSZ128r |
| 94492 | 74669, // VSQRTPSZ128rk |
| 94493 | 74673, // VSQRTPSZ128rkz |
| 94494 | 74676, // VSQRTPSZ256m |
| 94495 | 74678, // VSQRTPSZ256mb |
| 94496 | 74680, // VSQRTPSZ256mbk |
| 94497 | 74684, // VSQRTPSZ256mbkz |
| 94498 | 74687, // VSQRTPSZ256mk |
| 94499 | 74691, // VSQRTPSZ256mkz |
| 94500 | 74694, // VSQRTPSZ256r |
| 94501 | 74696, // VSQRTPSZ256rk |
| 94502 | 74700, // VSQRTPSZ256rkz |
| 94503 | 74703, // VSQRTPSZm |
| 94504 | 74705, // VSQRTPSZmb |
| 94505 | 74707, // VSQRTPSZmbk |
| 94506 | 74711, // VSQRTPSZmbkz |
| 94507 | 74714, // VSQRTPSZmk |
| 94508 | 74718, // VSQRTPSZmkz |
| 94509 | 74721, // VSQRTPSZr |
| 94510 | 74723, // VSQRTPSZrb |
| 94511 | 74726, // VSQRTPSZrbk |
| 94512 | 74731, // VSQRTPSZrbkz |
| 94513 | 74735, // VSQRTPSZrk |
| 94514 | 74739, // VSQRTPSZrkz |
| 94515 | 74742, // VSQRTPSm |
| 94516 | 74744, // VSQRTPSr |
| 94517 | 74746, // VSQRTSDZm |
| 94518 | 74749, // VSQRTSDZm_Int |
| 94519 | 74752, // VSQRTSDZmk_Int |
| 94520 | 74757, // VSQRTSDZmkz_Int |
| 94521 | 74761, // VSQRTSDZr |
| 94522 | 74764, // VSQRTSDZr_Int |
| 94523 | 74767, // VSQRTSDZrb_Int |
| 94524 | 74771, // VSQRTSDZrbk_Int |
| 94525 | 74777, // VSQRTSDZrbkz_Int |
| 94526 | 74782, // VSQRTSDZrk_Int |
| 94527 | 74787, // VSQRTSDZrkz_Int |
| 94528 | 74791, // VSQRTSDm |
| 94529 | 74794, // VSQRTSDm_Int |
| 94530 | 74797, // VSQRTSDr |
| 94531 | 74800, // VSQRTSDr_Int |
| 94532 | 74803, // VSQRTSHZm |
| 94533 | 74806, // VSQRTSHZm_Int |
| 94534 | 74809, // VSQRTSHZmk_Int |
| 94535 | 74814, // VSQRTSHZmkz_Int |
| 94536 | 74818, // VSQRTSHZr |
| 94537 | 74821, // VSQRTSHZr_Int |
| 94538 | 74824, // VSQRTSHZrb_Int |
| 94539 | 74828, // VSQRTSHZrbk_Int |
| 94540 | 74834, // VSQRTSHZrbkz_Int |
| 94541 | 74839, // VSQRTSHZrk_Int |
| 94542 | 74844, // VSQRTSHZrkz_Int |
| 94543 | 74848, // VSQRTSSZm |
| 94544 | 74851, // VSQRTSSZm_Int |
| 94545 | 74854, // VSQRTSSZmk_Int |
| 94546 | 74859, // VSQRTSSZmkz_Int |
| 94547 | 74863, // VSQRTSSZr |
| 94548 | 74866, // VSQRTSSZr_Int |
| 94549 | 74869, // VSQRTSSZrb_Int |
| 94550 | 74873, // VSQRTSSZrbk_Int |
| 94551 | 74879, // VSQRTSSZrbkz_Int |
| 94552 | 74884, // VSQRTSSZrk_Int |
| 94553 | 74889, // VSQRTSSZrkz_Int |
| 94554 | 74893, // VSQRTSSm |
| 94555 | 74896, // VSQRTSSm_Int |
| 94556 | 74899, // VSQRTSSr |
| 94557 | 74902, // VSQRTSSr_Int |
| 94558 | 74905, // VSTMXCSR |
| 94559 | 74906, // VSUBBF16Z128rm |
| 94560 | 74909, // VSUBBF16Z128rmb |
| 94561 | 74912, // VSUBBF16Z128rmbk |
| 94562 | 74917, // VSUBBF16Z128rmbkz |
| 94563 | 74921, // VSUBBF16Z128rmk |
| 94564 | 74926, // VSUBBF16Z128rmkz |
| 94565 | 74930, // VSUBBF16Z128rr |
| 94566 | 74933, // VSUBBF16Z128rrk |
| 94567 | 74938, // VSUBBF16Z128rrkz |
| 94568 | 74942, // VSUBBF16Z256rm |
| 94569 | 74945, // VSUBBF16Z256rmb |
| 94570 | 74948, // VSUBBF16Z256rmbk |
| 94571 | 74953, // VSUBBF16Z256rmbkz |
| 94572 | 74957, // VSUBBF16Z256rmk |
| 94573 | 74962, // VSUBBF16Z256rmkz |
| 94574 | 74966, // VSUBBF16Z256rr |
| 94575 | 74969, // VSUBBF16Z256rrk |
| 94576 | 74974, // VSUBBF16Z256rrkz |
| 94577 | 74978, // VSUBBF16Zrm |
| 94578 | 74981, // VSUBBF16Zrmb |
| 94579 | 74984, // VSUBBF16Zrmbk |
| 94580 | 74989, // VSUBBF16Zrmbkz |
| 94581 | 74993, // VSUBBF16Zrmk |
| 94582 | 74998, // VSUBBF16Zrmkz |
| 94583 | 75002, // VSUBBF16Zrr |
| 94584 | 75005, // VSUBBF16Zrrk |
| 94585 | 75010, // VSUBBF16Zrrkz |
| 94586 | 75014, // VSUBPDYrm |
| 94587 | 75017, // VSUBPDYrr |
| 94588 | 75020, // VSUBPDZ128rm |
| 94589 | 75023, // VSUBPDZ128rmb |
| 94590 | 75026, // VSUBPDZ128rmbk |
| 94591 | 75031, // VSUBPDZ128rmbkz |
| 94592 | 75035, // VSUBPDZ128rmk |
| 94593 | 75040, // VSUBPDZ128rmkz |
| 94594 | 75044, // VSUBPDZ128rr |
| 94595 | 75047, // VSUBPDZ128rrk |
| 94596 | 75052, // VSUBPDZ128rrkz |
| 94597 | 75056, // VSUBPDZ256rm |
| 94598 | 75059, // VSUBPDZ256rmb |
| 94599 | 75062, // VSUBPDZ256rmbk |
| 94600 | 75067, // VSUBPDZ256rmbkz |
| 94601 | 75071, // VSUBPDZ256rmk |
| 94602 | 75076, // VSUBPDZ256rmkz |
| 94603 | 75080, // VSUBPDZ256rr |
| 94604 | 75083, // VSUBPDZ256rrk |
| 94605 | 75088, // VSUBPDZ256rrkz |
| 94606 | 75092, // VSUBPDZrm |
| 94607 | 75095, // VSUBPDZrmb |
| 94608 | 75098, // VSUBPDZrmbk |
| 94609 | 75103, // VSUBPDZrmbkz |
| 94610 | 75107, // VSUBPDZrmk |
| 94611 | 75112, // VSUBPDZrmkz |
| 94612 | 75116, // VSUBPDZrr |
| 94613 | 75119, // VSUBPDZrrb |
| 94614 | 75123, // VSUBPDZrrbk |
| 94615 | 75129, // VSUBPDZrrbkz |
| 94616 | 75134, // VSUBPDZrrk |
| 94617 | 75139, // VSUBPDZrrkz |
| 94618 | 75143, // VSUBPDrm |
| 94619 | 75146, // VSUBPDrr |
| 94620 | 75149, // VSUBPHZ128rm |
| 94621 | 75152, // VSUBPHZ128rmb |
| 94622 | 75155, // VSUBPHZ128rmbk |
| 94623 | 75160, // VSUBPHZ128rmbkz |
| 94624 | 75164, // VSUBPHZ128rmk |
| 94625 | 75169, // VSUBPHZ128rmkz |
| 94626 | 75173, // VSUBPHZ128rr |
| 94627 | 75176, // VSUBPHZ128rrk |
| 94628 | 75181, // VSUBPHZ128rrkz |
| 94629 | 75185, // VSUBPHZ256rm |
| 94630 | 75188, // VSUBPHZ256rmb |
| 94631 | 75191, // VSUBPHZ256rmbk |
| 94632 | 75196, // VSUBPHZ256rmbkz |
| 94633 | 75200, // VSUBPHZ256rmk |
| 94634 | 75205, // VSUBPHZ256rmkz |
| 94635 | 75209, // VSUBPHZ256rr |
| 94636 | 75212, // VSUBPHZ256rrk |
| 94637 | 75217, // VSUBPHZ256rrkz |
| 94638 | 75221, // VSUBPHZrm |
| 94639 | 75224, // VSUBPHZrmb |
| 94640 | 75227, // VSUBPHZrmbk |
| 94641 | 75232, // VSUBPHZrmbkz |
| 94642 | 75236, // VSUBPHZrmk |
| 94643 | 75241, // VSUBPHZrmkz |
| 94644 | 75245, // VSUBPHZrr |
| 94645 | 75248, // VSUBPHZrrb |
| 94646 | 75252, // VSUBPHZrrbk |
| 94647 | 75258, // VSUBPHZrrbkz |
| 94648 | 75263, // VSUBPHZrrk |
| 94649 | 75268, // VSUBPHZrrkz |
| 94650 | 75272, // VSUBPSYrm |
| 94651 | 75275, // VSUBPSYrr |
| 94652 | 75278, // VSUBPSZ128rm |
| 94653 | 75281, // VSUBPSZ128rmb |
| 94654 | 75284, // VSUBPSZ128rmbk |
| 94655 | 75289, // VSUBPSZ128rmbkz |
| 94656 | 75293, // VSUBPSZ128rmk |
| 94657 | 75298, // VSUBPSZ128rmkz |
| 94658 | 75302, // VSUBPSZ128rr |
| 94659 | 75305, // VSUBPSZ128rrk |
| 94660 | 75310, // VSUBPSZ128rrkz |
| 94661 | 75314, // VSUBPSZ256rm |
| 94662 | 75317, // VSUBPSZ256rmb |
| 94663 | 75320, // VSUBPSZ256rmbk |
| 94664 | 75325, // VSUBPSZ256rmbkz |
| 94665 | 75329, // VSUBPSZ256rmk |
| 94666 | 75334, // VSUBPSZ256rmkz |
| 94667 | 75338, // VSUBPSZ256rr |
| 94668 | 75341, // VSUBPSZ256rrk |
| 94669 | 75346, // VSUBPSZ256rrkz |
| 94670 | 75350, // VSUBPSZrm |
| 94671 | 75353, // VSUBPSZrmb |
| 94672 | 75356, // VSUBPSZrmbk |
| 94673 | 75361, // VSUBPSZrmbkz |
| 94674 | 75365, // VSUBPSZrmk |
| 94675 | 75370, // VSUBPSZrmkz |
| 94676 | 75374, // VSUBPSZrr |
| 94677 | 75377, // VSUBPSZrrb |
| 94678 | 75381, // VSUBPSZrrbk |
| 94679 | 75387, // VSUBPSZrrbkz |
| 94680 | 75392, // VSUBPSZrrk |
| 94681 | 75397, // VSUBPSZrrkz |
| 94682 | 75401, // VSUBPSrm |
| 94683 | 75404, // VSUBPSrr |
| 94684 | 75407, // VSUBSDZrm |
| 94685 | 75410, // VSUBSDZrm_Int |
| 94686 | 75413, // VSUBSDZrmk_Int |
| 94687 | 75418, // VSUBSDZrmkz_Int |
| 94688 | 75422, // VSUBSDZrr |
| 94689 | 75425, // VSUBSDZrr_Int |
| 94690 | 75428, // VSUBSDZrrb_Int |
| 94691 | 75432, // VSUBSDZrrbk_Int |
| 94692 | 75438, // VSUBSDZrrbkz_Int |
| 94693 | 75443, // VSUBSDZrrk_Int |
| 94694 | 75448, // VSUBSDZrrkz_Int |
| 94695 | 75452, // VSUBSDrm |
| 94696 | 75455, // VSUBSDrm_Int |
| 94697 | 75458, // VSUBSDrr |
| 94698 | 75461, // VSUBSDrr_Int |
| 94699 | 75464, // VSUBSHZrm |
| 94700 | 75467, // VSUBSHZrm_Int |
| 94701 | 75470, // VSUBSHZrmk_Int |
| 94702 | 75475, // VSUBSHZrmkz_Int |
| 94703 | 75479, // VSUBSHZrr |
| 94704 | 75482, // VSUBSHZrr_Int |
| 94705 | 75485, // VSUBSHZrrb_Int |
| 94706 | 75489, // VSUBSHZrrbk_Int |
| 94707 | 75495, // VSUBSHZrrbkz_Int |
| 94708 | 75500, // VSUBSHZrrk_Int |
| 94709 | 75505, // VSUBSHZrrkz_Int |
| 94710 | 75509, // VSUBSSZrm |
| 94711 | 75512, // VSUBSSZrm_Int |
| 94712 | 75515, // VSUBSSZrmk_Int |
| 94713 | 75520, // VSUBSSZrmkz_Int |
| 94714 | 75524, // VSUBSSZrr |
| 94715 | 75527, // VSUBSSZrr_Int |
| 94716 | 75530, // VSUBSSZrrb_Int |
| 94717 | 75534, // VSUBSSZrrbk_Int |
| 94718 | 75540, // VSUBSSZrrbkz_Int |
| 94719 | 75545, // VSUBSSZrrk_Int |
| 94720 | 75550, // VSUBSSZrrkz_Int |
| 94721 | 75554, // VSUBSSrm |
| 94722 | 75557, // VSUBSSrm_Int |
| 94723 | 75560, // VSUBSSrr |
| 94724 | 75563, // VSUBSSrr_Int |
| 94725 | 75566, // VTESTPDYrm |
| 94726 | 75568, // VTESTPDYrr |
| 94727 | 75570, // VTESTPDrm |
| 94728 | 75572, // VTESTPDrr |
| 94729 | 75574, // VTESTPSYrm |
| 94730 | 75576, // VTESTPSYrr |
| 94731 | 75578, // VTESTPSrm |
| 94732 | 75580, // VTESTPSrr |
| 94733 | 75582, // VUCOMISDZrm |
| 94734 | 75584, // VUCOMISDZrm_Int |
| 94735 | 75586, // VUCOMISDZrr |
| 94736 | 75588, // VUCOMISDZrr_Int |
| 94737 | 75590, // VUCOMISDZrrb |
| 94738 | 75592, // VUCOMISDrm |
| 94739 | 75594, // VUCOMISDrm_Int |
| 94740 | 75596, // VUCOMISDrr |
| 94741 | 75598, // VUCOMISDrr_Int |
| 94742 | 75600, // VUCOMISHZrm |
| 94743 | 75602, // VUCOMISHZrm_Int |
| 94744 | 75604, // VUCOMISHZrr |
| 94745 | 75606, // VUCOMISHZrr_Int |
| 94746 | 75608, // VUCOMISHZrrb |
| 94747 | 75610, // VUCOMISSZrm |
| 94748 | 75612, // VUCOMISSZrm_Int |
| 94749 | 75614, // VUCOMISSZrr |
| 94750 | 75616, // VUCOMISSZrr_Int |
| 94751 | 75618, // VUCOMISSZrrb |
| 94752 | 75620, // VUCOMISSrm |
| 94753 | 75622, // VUCOMISSrm_Int |
| 94754 | 75624, // VUCOMISSrr |
| 94755 | 75626, // VUCOMISSrr_Int |
| 94756 | 75628, // VUCOMXSDZrm |
| 94757 | 75630, // VUCOMXSDZrm_Int |
| 94758 | 75632, // VUCOMXSDZrr |
| 94759 | 75634, // VUCOMXSDZrr_Int |
| 94760 | 75636, // VUCOMXSDZrrb_Int |
| 94761 | 75638, // VUCOMXSHZrm |
| 94762 | 75640, // VUCOMXSHZrm_Int |
| 94763 | 75642, // VUCOMXSHZrr |
| 94764 | 75644, // VUCOMXSHZrr_Int |
| 94765 | 75646, // VUCOMXSHZrrb_Int |
| 94766 | 75648, // VUCOMXSSZrm |
| 94767 | 75650, // VUCOMXSSZrm_Int |
| 94768 | 75652, // VUCOMXSSZrr |
| 94769 | 75654, // VUCOMXSSZrr_Int |
| 94770 | 75656, // VUCOMXSSZrrb_Int |
| 94771 | 75658, // VUNPCKHPDYrm |
| 94772 | 75661, // VUNPCKHPDYrr |
| 94773 | 75664, // VUNPCKHPDZ128rm |
| 94774 | 75667, // VUNPCKHPDZ128rmb |
| 94775 | 75670, // VUNPCKHPDZ128rmbk |
| 94776 | 75675, // VUNPCKHPDZ128rmbkz |
| 94777 | 75679, // VUNPCKHPDZ128rmk |
| 94778 | 75684, // VUNPCKHPDZ128rmkz |
| 94779 | 75688, // VUNPCKHPDZ128rr |
| 94780 | 75691, // VUNPCKHPDZ128rrk |
| 94781 | 75696, // VUNPCKHPDZ128rrkz |
| 94782 | 75700, // VUNPCKHPDZ256rm |
| 94783 | 75703, // VUNPCKHPDZ256rmb |
| 94784 | 75706, // VUNPCKHPDZ256rmbk |
| 94785 | 75711, // VUNPCKHPDZ256rmbkz |
| 94786 | 75715, // VUNPCKHPDZ256rmk |
| 94787 | 75720, // VUNPCKHPDZ256rmkz |
| 94788 | 75724, // VUNPCKHPDZ256rr |
| 94789 | 75727, // VUNPCKHPDZ256rrk |
| 94790 | 75732, // VUNPCKHPDZ256rrkz |
| 94791 | 75736, // VUNPCKHPDZrm |
| 94792 | 75739, // VUNPCKHPDZrmb |
| 94793 | 75742, // VUNPCKHPDZrmbk |
| 94794 | 75747, // VUNPCKHPDZrmbkz |
| 94795 | 75751, // VUNPCKHPDZrmk |
| 94796 | 75756, // VUNPCKHPDZrmkz |
| 94797 | 75760, // VUNPCKHPDZrr |
| 94798 | 75763, // VUNPCKHPDZrrk |
| 94799 | 75768, // VUNPCKHPDZrrkz |
| 94800 | 75772, // VUNPCKHPDrm |
| 94801 | 75775, // VUNPCKHPDrr |
| 94802 | 75778, // VUNPCKHPSYrm |
| 94803 | 75781, // VUNPCKHPSYrr |
| 94804 | 75784, // VUNPCKHPSZ128rm |
| 94805 | 75787, // VUNPCKHPSZ128rmb |
| 94806 | 75790, // VUNPCKHPSZ128rmbk |
| 94807 | 75795, // VUNPCKHPSZ128rmbkz |
| 94808 | 75799, // VUNPCKHPSZ128rmk |
| 94809 | 75804, // VUNPCKHPSZ128rmkz |
| 94810 | 75808, // VUNPCKHPSZ128rr |
| 94811 | 75811, // VUNPCKHPSZ128rrk |
| 94812 | 75816, // VUNPCKHPSZ128rrkz |
| 94813 | 75820, // VUNPCKHPSZ256rm |
| 94814 | 75823, // VUNPCKHPSZ256rmb |
| 94815 | 75826, // VUNPCKHPSZ256rmbk |
| 94816 | 75831, // VUNPCKHPSZ256rmbkz |
| 94817 | 75835, // VUNPCKHPSZ256rmk |
| 94818 | 75840, // VUNPCKHPSZ256rmkz |
| 94819 | 75844, // VUNPCKHPSZ256rr |
| 94820 | 75847, // VUNPCKHPSZ256rrk |
| 94821 | 75852, // VUNPCKHPSZ256rrkz |
| 94822 | 75856, // VUNPCKHPSZrm |
| 94823 | 75859, // VUNPCKHPSZrmb |
| 94824 | 75862, // VUNPCKHPSZrmbk |
| 94825 | 75867, // VUNPCKHPSZrmbkz |
| 94826 | 75871, // VUNPCKHPSZrmk |
| 94827 | 75876, // VUNPCKHPSZrmkz |
| 94828 | 75880, // VUNPCKHPSZrr |
| 94829 | 75883, // VUNPCKHPSZrrk |
| 94830 | 75888, // VUNPCKHPSZrrkz |
| 94831 | 75892, // VUNPCKHPSrm |
| 94832 | 75895, // VUNPCKHPSrr |
| 94833 | 75898, // VUNPCKLPDYrm |
| 94834 | 75901, // VUNPCKLPDYrr |
| 94835 | 75904, // VUNPCKLPDZ128rm |
| 94836 | 75907, // VUNPCKLPDZ128rmb |
| 94837 | 75910, // VUNPCKLPDZ128rmbk |
| 94838 | 75915, // VUNPCKLPDZ128rmbkz |
| 94839 | 75919, // VUNPCKLPDZ128rmk |
| 94840 | 75924, // VUNPCKLPDZ128rmkz |
| 94841 | 75928, // VUNPCKLPDZ128rr |
| 94842 | 75931, // VUNPCKLPDZ128rrk |
| 94843 | 75936, // VUNPCKLPDZ128rrkz |
| 94844 | 75940, // VUNPCKLPDZ256rm |
| 94845 | 75943, // VUNPCKLPDZ256rmb |
| 94846 | 75946, // VUNPCKLPDZ256rmbk |
| 94847 | 75951, // VUNPCKLPDZ256rmbkz |
| 94848 | 75955, // VUNPCKLPDZ256rmk |
| 94849 | 75960, // VUNPCKLPDZ256rmkz |
| 94850 | 75964, // VUNPCKLPDZ256rr |
| 94851 | 75967, // VUNPCKLPDZ256rrk |
| 94852 | 75972, // VUNPCKLPDZ256rrkz |
| 94853 | 75976, // VUNPCKLPDZrm |
| 94854 | 75979, // VUNPCKLPDZrmb |
| 94855 | 75982, // VUNPCKLPDZrmbk |
| 94856 | 75987, // VUNPCKLPDZrmbkz |
| 94857 | 75991, // VUNPCKLPDZrmk |
| 94858 | 75996, // VUNPCKLPDZrmkz |
| 94859 | 76000, // VUNPCKLPDZrr |
| 94860 | 76003, // VUNPCKLPDZrrk |
| 94861 | 76008, // VUNPCKLPDZrrkz |
| 94862 | 76012, // VUNPCKLPDrm |
| 94863 | 76015, // VUNPCKLPDrr |
| 94864 | 76018, // VUNPCKLPSYrm |
| 94865 | 76021, // VUNPCKLPSYrr |
| 94866 | 76024, // VUNPCKLPSZ128rm |
| 94867 | 76027, // VUNPCKLPSZ128rmb |
| 94868 | 76030, // VUNPCKLPSZ128rmbk |
| 94869 | 76035, // VUNPCKLPSZ128rmbkz |
| 94870 | 76039, // VUNPCKLPSZ128rmk |
| 94871 | 76044, // VUNPCKLPSZ128rmkz |
| 94872 | 76048, // VUNPCKLPSZ128rr |
| 94873 | 76051, // VUNPCKLPSZ128rrk |
| 94874 | 76056, // VUNPCKLPSZ128rrkz |
| 94875 | 76060, // VUNPCKLPSZ256rm |
| 94876 | 76063, // VUNPCKLPSZ256rmb |
| 94877 | 76066, // VUNPCKLPSZ256rmbk |
| 94878 | 76071, // VUNPCKLPSZ256rmbkz |
| 94879 | 76075, // VUNPCKLPSZ256rmk |
| 94880 | 76080, // VUNPCKLPSZ256rmkz |
| 94881 | 76084, // VUNPCKLPSZ256rr |
| 94882 | 76087, // VUNPCKLPSZ256rrk |
| 94883 | 76092, // VUNPCKLPSZ256rrkz |
| 94884 | 76096, // VUNPCKLPSZrm |
| 94885 | 76099, // VUNPCKLPSZrmb |
| 94886 | 76102, // VUNPCKLPSZrmbk |
| 94887 | 76107, // VUNPCKLPSZrmbkz |
| 94888 | 76111, // VUNPCKLPSZrmk |
| 94889 | 76116, // VUNPCKLPSZrmkz |
| 94890 | 76120, // VUNPCKLPSZrr |
| 94891 | 76123, // VUNPCKLPSZrrk |
| 94892 | 76128, // VUNPCKLPSZrrkz |
| 94893 | 76132, // VUNPCKLPSrm |
| 94894 | 76135, // VUNPCKLPSrr |
| 94895 | 76138, // VXORPDYrm |
| 94896 | 76141, // VXORPDYrr |
| 94897 | 76144, // VXORPDZ128rm |
| 94898 | 76147, // VXORPDZ128rmb |
| 94899 | 76150, // VXORPDZ128rmbk |
| 94900 | 76155, // VXORPDZ128rmbkz |
| 94901 | 76159, // VXORPDZ128rmk |
| 94902 | 76164, // VXORPDZ128rmkz |
| 94903 | 76168, // VXORPDZ128rr |
| 94904 | 76171, // VXORPDZ128rrk |
| 94905 | 76176, // VXORPDZ128rrkz |
| 94906 | 76180, // VXORPDZ256rm |
| 94907 | 76183, // VXORPDZ256rmb |
| 94908 | 76186, // VXORPDZ256rmbk |
| 94909 | 76191, // VXORPDZ256rmbkz |
| 94910 | 76195, // VXORPDZ256rmk |
| 94911 | 76200, // VXORPDZ256rmkz |
| 94912 | 76204, // VXORPDZ256rr |
| 94913 | 76207, // VXORPDZ256rrk |
| 94914 | 76212, // VXORPDZ256rrkz |
| 94915 | 76216, // VXORPDZrm |
| 94916 | 76219, // VXORPDZrmb |
| 94917 | 76222, // VXORPDZrmbk |
| 94918 | 76227, // VXORPDZrmbkz |
| 94919 | 76231, // VXORPDZrmk |
| 94920 | 76236, // VXORPDZrmkz |
| 94921 | 76240, // VXORPDZrr |
| 94922 | 76243, // VXORPDZrrk |
| 94923 | 76248, // VXORPDZrrkz |
| 94924 | 76252, // VXORPDrm |
| 94925 | 76255, // VXORPDrr |
| 94926 | 76258, // VXORPSYrm |
| 94927 | 76261, // VXORPSYrr |
| 94928 | 76264, // VXORPSZ128rm |
| 94929 | 76267, // VXORPSZ128rmb |
| 94930 | 76270, // VXORPSZ128rmbk |
| 94931 | 76275, // VXORPSZ128rmbkz |
| 94932 | 76279, // VXORPSZ128rmk |
| 94933 | 76284, // VXORPSZ128rmkz |
| 94934 | 76288, // VXORPSZ128rr |
| 94935 | 76291, // VXORPSZ128rrk |
| 94936 | 76296, // VXORPSZ128rrkz |
| 94937 | 76300, // VXORPSZ256rm |
| 94938 | 76303, // VXORPSZ256rmb |
| 94939 | 76306, // VXORPSZ256rmbk |
| 94940 | 76311, // VXORPSZ256rmbkz |
| 94941 | 76315, // VXORPSZ256rmk |
| 94942 | 76320, // VXORPSZ256rmkz |
| 94943 | 76324, // VXORPSZ256rr |
| 94944 | 76327, // VXORPSZ256rrk |
| 94945 | 76332, // VXORPSZ256rrkz |
| 94946 | 76336, // VXORPSZrm |
| 94947 | 76339, // VXORPSZrmb |
| 94948 | 76342, // VXORPSZrmbk |
| 94949 | 76347, // VXORPSZrmbkz |
| 94950 | 76351, // VXORPSZrmk |
| 94951 | 76356, // VXORPSZrmkz |
| 94952 | 76360, // VXORPSZrr |
| 94953 | 76363, // VXORPSZrrk |
| 94954 | 76368, // VXORPSZrrkz |
| 94955 | 76372, // VXORPSrm |
| 94956 | 76375, // VXORPSrr |
| 94957 | 76378, // VZEROALL |
| 94958 | 76378, // VZEROUPPER |
| 94959 | 76378, // WAIT |
| 94960 | 76378, // WBINVD |
| 94961 | 76378, // WBNOINVD |
| 94962 | 76378, // WRFSBASE |
| 94963 | 76379, // WRFSBASE64 |
| 94964 | 76380, // WRGSBASE |
| 94965 | 76381, // WRGSBASE64 |
| 94966 | 76382, // WRMSR |
| 94967 | 76382, // WRMSRLIST |
| 94968 | 76382, // WRMSRNS |
| 94969 | 76382, // WRMSRNSir |
| 94970 | 76384, // WRMSRNSir_EVEX |
| 94971 | 76386, // WRPKRUr |
| 94972 | 76386, // WRSSD |
| 94973 | 76388, // WRSSD_EVEX |
| 94974 | 76390, // WRSSQ |
| 94975 | 76392, // WRSSQ_EVEX |
| 94976 | 76394, // WRUSSD |
| 94977 | 76396, // WRUSSD_EVEX |
| 94978 | 76398, // WRUSSQ |
| 94979 | 76400, // WRUSSQ_EVEX |
| 94980 | 76402, // XABORT |
| 94981 | 76403, // XACQUIRE_PREFIX |
| 94982 | 76403, // XADD16rm |
| 94983 | 76406, // XADD16rr |
| 94984 | 76410, // XADD32rm |
| 94985 | 76413, // XADD32rr |
| 94986 | 76417, // XADD64rm |
| 94987 | 76420, // XADD64rr |
| 94988 | 76424, // XADD8rm |
| 94989 | 76427, // XADD8rr |
| 94990 | 76431, // XAM_F |
| 94991 | 76431, // XAM_Fp32 |
| 94992 | 76432, // XAM_Fp64 |
| 94993 | 76433, // XAM_Fp80 |
| 94994 | 76434, // XBEGIN |
| 94995 | 76435, // XBEGIN_2 |
| 94996 | 76436, // XBEGIN_4 |
| 94997 | 76437, // XCHG16ar |
| 94998 | 76439, // XCHG16rm |
| 94999 | 76442, // XCHG16rr |
| 95000 | 76446, // XCHG32ar |
| 95001 | 76448, // XCHG32rm |
| 95002 | 76451, // XCHG32rr |
| 95003 | 76455, // XCHG64ar |
| 95004 | 76457, // XCHG64rm |
| 95005 | 76460, // XCHG64rr |
| 95006 | 76464, // XCHG8rm |
| 95007 | 76467, // XCHG8rr |
| 95008 | 76471, // XCH_F |
| 95009 | 76472, // XCRYPTCBC |
| 95010 | 76472, // XCRYPTCFB |
| 95011 | 76472, // XCRYPTCTR |
| 95012 | 76472, // XCRYPTECB |
| 95013 | 76472, // XCRYPTOFB |
| 95014 | 76472, // XEND |
| 95015 | 76472, // XGETBV |
| 95016 | 76472, // XLAT |
| 95017 | 76472, // XOR16i16 |
| 95018 | 76473, // XOR16mi |
| 95019 | 76475, // XOR16mi8 |
| 95020 | 76477, // XOR16mi8_EVEX |
| 95021 | 76479, // XOR16mi8_ND |
| 95022 | 76482, // XOR16mi8_NF |
| 95023 | 76484, // XOR16mi8_NF_ND |
| 95024 | 76487, // XOR16mi_EVEX |
| 95025 | 76489, // XOR16mi_ND |
| 95026 | 76492, // XOR16mi_NF |
| 95027 | 76494, // XOR16mi_NF_ND |
| 95028 | 76497, // XOR16mr |
| 95029 | 76499, // XOR16mr_EVEX |
| 95030 | 76501, // XOR16mr_ND |
| 95031 | 76504, // XOR16mr_NF |
| 95032 | 76506, // XOR16mr_NF_ND |
| 95033 | 76509, // XOR16ri |
| 95034 | 76512, // XOR16ri8 |
| 95035 | 76515, // XOR16ri8_EVEX |
| 95036 | 76518, // XOR16ri8_ND |
| 95037 | 76521, // XOR16ri8_NF |
| 95038 | 76524, // XOR16ri8_NF_ND |
| 95039 | 76527, // XOR16ri_EVEX |
| 95040 | 76530, // XOR16ri_ND |
| 95041 | 76533, // XOR16ri_NF |
| 95042 | 76536, // XOR16ri_NF_ND |
| 95043 | 76539, // XOR16rm |
| 95044 | 76542, // XOR16rm_EVEX |
| 95045 | 76545, // XOR16rm_ND |
| 95046 | 76548, // XOR16rm_NF |
| 95047 | 76551, // XOR16rm_NF_ND |
| 95048 | 76554, // XOR16rr |
| 95049 | 76557, // XOR16rr_EVEX |
| 95050 | 76560, // XOR16rr_EVEX_REV |
| 95051 | 76563, // XOR16rr_ND |
| 95052 | 76566, // XOR16rr_ND_REV |
| 95053 | 76569, // XOR16rr_NF |
| 95054 | 76572, // XOR16rr_NF_ND |
| 95055 | 76575, // XOR16rr_NF_ND_REV |
| 95056 | 76578, // XOR16rr_NF_REV |
| 95057 | 76581, // XOR16rr_REV |
| 95058 | 76584, // XOR32i32 |
| 95059 | 76585, // XOR32mi |
| 95060 | 76587, // XOR32mi8 |
| 95061 | 76589, // XOR32mi8_EVEX |
| 95062 | 76591, // XOR32mi8_ND |
| 95063 | 76594, // XOR32mi8_NF |
| 95064 | 76596, // XOR32mi8_NF_ND |
| 95065 | 76599, // XOR32mi_EVEX |
| 95066 | 76601, // XOR32mi_ND |
| 95067 | 76604, // XOR32mi_NF |
| 95068 | 76606, // XOR32mi_NF_ND |
| 95069 | 76609, // XOR32mr |
| 95070 | 76611, // XOR32mr_EVEX |
| 95071 | 76613, // XOR32mr_ND |
| 95072 | 76616, // XOR32mr_NF |
| 95073 | 76618, // XOR32mr_NF_ND |
| 95074 | 76621, // XOR32ri |
| 95075 | 76624, // XOR32ri8 |
| 95076 | 76627, // XOR32ri8_EVEX |
| 95077 | 76630, // XOR32ri8_ND |
| 95078 | 76633, // XOR32ri8_NF |
| 95079 | 76636, // XOR32ri8_NF_ND |
| 95080 | 76639, // XOR32ri_EVEX |
| 95081 | 76642, // XOR32ri_ND |
| 95082 | 76645, // XOR32ri_NF |
| 95083 | 76648, // XOR32ri_NF_ND |
| 95084 | 76651, // XOR32rm |
| 95085 | 76654, // XOR32rm_EVEX |
| 95086 | 76657, // XOR32rm_ND |
| 95087 | 76660, // XOR32rm_NF |
| 95088 | 76663, // XOR32rm_NF_ND |
| 95089 | 76666, // XOR32rr |
| 95090 | 76669, // XOR32rr_EVEX |
| 95091 | 76672, // XOR32rr_EVEX_REV |
| 95092 | 76675, // XOR32rr_ND |
| 95093 | 76678, // XOR32rr_ND_REV |
| 95094 | 76681, // XOR32rr_NF |
| 95095 | 76684, // XOR32rr_NF_ND |
| 95096 | 76687, // XOR32rr_NF_ND_REV |
| 95097 | 76690, // XOR32rr_NF_REV |
| 95098 | 76693, // XOR32rr_REV |
| 95099 | 76696, // XOR64i32 |
| 95100 | 76697, // XOR64mi32 |
| 95101 | 76699, // XOR64mi32_EVEX |
| 95102 | 76701, // XOR64mi32_ND |
| 95103 | 76704, // XOR64mi32_NF |
| 95104 | 76706, // XOR64mi32_NF_ND |
| 95105 | 76709, // XOR64mi8 |
| 95106 | 76711, // XOR64mi8_EVEX |
| 95107 | 76713, // XOR64mi8_ND |
| 95108 | 76716, // XOR64mi8_NF |
| 95109 | 76718, // XOR64mi8_NF_ND |
| 95110 | 76721, // XOR64mr |
| 95111 | 76723, // XOR64mr_EVEX |
| 95112 | 76725, // XOR64mr_ND |
| 95113 | 76728, // XOR64mr_NF |
| 95114 | 76730, // XOR64mr_NF_ND |
| 95115 | 76733, // XOR64ri32 |
| 95116 | 76736, // XOR64ri32_EVEX |
| 95117 | 76739, // XOR64ri32_ND |
| 95118 | 76742, // XOR64ri32_NF |
| 95119 | 76745, // XOR64ri32_NF_ND |
| 95120 | 76748, // XOR64ri8 |
| 95121 | 76751, // XOR64ri8_EVEX |
| 95122 | 76754, // XOR64ri8_ND |
| 95123 | 76757, // XOR64ri8_NF |
| 95124 | 76760, // XOR64ri8_NF_ND |
| 95125 | 76763, // XOR64rm |
| 95126 | 76766, // XOR64rm_EVEX |
| 95127 | 76769, // XOR64rm_ND |
| 95128 | 76772, // XOR64rm_NF |
| 95129 | 76775, // XOR64rm_NF_ND |
| 95130 | 76778, // XOR64rr |
| 95131 | 76781, // XOR64rr_EVEX |
| 95132 | 76784, // XOR64rr_EVEX_REV |
| 95133 | 76787, // XOR64rr_ND |
| 95134 | 76790, // XOR64rr_ND_REV |
| 95135 | 76793, // XOR64rr_NF |
| 95136 | 76796, // XOR64rr_NF_ND |
| 95137 | 76799, // XOR64rr_NF_ND_REV |
| 95138 | 76802, // XOR64rr_NF_REV |
| 95139 | 76805, // XOR64rr_REV |
| 95140 | 76808, // XOR8i8 |
| 95141 | 76809, // XOR8mi |
| 95142 | 76811, // XOR8mi8 |
| 95143 | 76813, // XOR8mi_EVEX |
| 95144 | 76815, // XOR8mi_ND |
| 95145 | 76818, // XOR8mi_NF |
| 95146 | 76820, // XOR8mi_NF_ND |
| 95147 | 76823, // XOR8mr |
| 95148 | 76825, // XOR8mr_EVEX |
| 95149 | 76827, // XOR8mr_ND |
| 95150 | 76830, // XOR8mr_NF |
| 95151 | 76832, // XOR8mr_NF_ND |
| 95152 | 76835, // XOR8ri |
| 95153 | 76838, // XOR8ri8 |
| 95154 | 76841, // XOR8ri_EVEX |
| 95155 | 76844, // XOR8ri_ND |
| 95156 | 76847, // XOR8ri_NF |
| 95157 | 76850, // XOR8ri_NF_ND |
| 95158 | 76853, // XOR8rm |
| 95159 | 76856, // XOR8rm_EVEX |
| 95160 | 76859, // XOR8rm_ND |
| 95161 | 76862, // XOR8rm_NF |
| 95162 | 76865, // XOR8rm_NF_ND |
| 95163 | 76868, // XOR8rr |
| 95164 | 76871, // XOR8rr_EVEX |
| 95165 | 76874, // XOR8rr_EVEX_REV |
| 95166 | 76877, // XOR8rr_ND |
| 95167 | 76880, // XOR8rr_ND_REV |
| 95168 | 76883, // XOR8rr_NF |
| 95169 | 76886, // XOR8rr_NF_ND |
| 95170 | 76889, // XOR8rr_NF_ND_REV |
| 95171 | 76892, // XOR8rr_NF_REV |
| 95172 | 76895, // XOR8rr_NOREX |
| 95173 | 76898, // XOR8rr_REV |
| 95174 | 76901, // XORPDrm |
| 95175 | 76904, // XORPDrr |
| 95176 | 76907, // XORPSrm |
| 95177 | 76910, // XORPSrr |
| 95178 | 76913, // XRELEASE_PREFIX |
| 95179 | 76913, // XRESLDTRK |
| 95180 | 76913, // XRSTOR |
| 95181 | 76914, // XRSTOR64 |
| 95182 | 76915, // XRSTORS |
| 95183 | 76916, // XRSTORS64 |
| 95184 | 76917, // XSAVE |
| 95185 | 76918, // XSAVE64 |
| 95186 | 76919, // XSAVEC |
| 95187 | 76920, // XSAVEC64 |
| 95188 | 76921, // XSAVEOPT |
| 95189 | 76922, // XSAVEOPT64 |
| 95190 | 76923, // XSAVES |
| 95191 | 76924, // XSAVES64 |
| 95192 | 76925, // XSETBV |
| 95193 | 76925, // XSHA1 |
| 95194 | 76925, // XSHA256 |
| 95195 | 76925, // XSTORE |
| 95196 | 76925, // XSUSLDTRK |
| 95197 | 76925, // XTEST |
| 95198 | }; |
| 95199 | |
| 95200 | using namespace OpTypes; |
| 95201 | static constexpr int16_t OpcodeOperandTypes[] = { |
| 95202 | /* PHI */ |
| 95203 | -1, |
| 95204 | /* INLINEASM */ |
| 95205 | /* INLINEASM_BR */ |
| 95206 | /* CFI_INSTRUCTION */ |
| 95207 | i32imm, |
| 95208 | /* EH_LABEL */ |
| 95209 | i32imm, |
| 95210 | /* GC_LABEL */ |
| 95211 | i32imm, |
| 95212 | /* ANNOTATION_LABEL */ |
| 95213 | i32imm, |
| 95214 | /* KILL */ |
| 95215 | /* EXTRACT_SUBREG */ |
| 95216 | -1, -1, i32imm, |
| 95217 | /* INSERT_SUBREG */ |
| 95218 | -1, -1, -1, i32imm, |
| 95219 | /* IMPLICIT_DEF */ |
| 95220 | -1, |
| 95221 | /* INIT_UNDEF */ |
| 95222 | -1, |
| 95223 | /* SUBREG_TO_REG */ |
| 95224 | -1, -1, -1, i32imm, |
| 95225 | /* COPY_TO_REGCLASS */ |
| 95226 | -1, -1, i32imm, |
| 95227 | /* DBG_VALUE */ |
| 95228 | /* DBG_VALUE_LIST */ |
| 95229 | /* DBG_INSTR_REF */ |
| 95230 | /* DBG_PHI */ |
| 95231 | /* DBG_LABEL */ |
| 95232 | -1, |
| 95233 | /* REG_SEQUENCE */ |
| 95234 | -1, -1, |
| 95235 | /* COPY */ |
| 95236 | -1, -1, |
| 95237 | /* BUNDLE */ |
| 95238 | /* LIFETIME_START */ |
| 95239 | i32imm, |
| 95240 | /* LIFETIME_END */ |
| 95241 | i32imm, |
| 95242 | /* PSEUDO_PROBE */ |
| 95243 | i64imm, i64imm, i8imm, i32imm, |
| 95244 | /* ARITH_FENCE */ |
| 95245 | -1, -1, |
| 95246 | /* STACKMAP */ |
| 95247 | i64imm, i32imm, |
| 95248 | /* FENTRY_CALL */ |
| 95249 | /* PATCHPOINT */ |
| 95250 | -1, i64imm, i32imm, -1, i32imm, i32imm, |
| 95251 | /* LOAD_STACK_GUARD */ |
| 95252 | -1, |
| 95253 | /* PREALLOCATED_SETUP */ |
| 95254 | i32imm, |
| 95255 | /* PREALLOCATED_ARG */ |
| 95256 | -1, i32imm, i32imm, |
| 95257 | /* STATEPOINT */ |
| 95258 | /* LOCAL_ESCAPE */ |
| 95259 | -1, i32imm, |
| 95260 | /* FAULTING_OP */ |
| 95261 | -1, |
| 95262 | /* PATCHABLE_OP */ |
| 95263 | /* PATCHABLE_FUNCTION_ENTER */ |
| 95264 | /* PATCHABLE_RET */ |
| 95265 | /* PATCHABLE_FUNCTION_EXIT */ |
| 95266 | /* PATCHABLE_TAIL_CALL */ |
| 95267 | /* PATCHABLE_EVENT_CALL */ |
| 95268 | -1, -1, |
| 95269 | /* PATCHABLE_TYPED_EVENT_CALL */ |
| 95270 | -1, -1, -1, |
| 95271 | /* ICALL_BRANCH_FUNNEL */ |
| 95272 | /* FAKE_USE */ |
| 95273 | /* MEMBARRIER */ |
| 95274 | /* JUMP_TABLE_DEBUG_INFO */ |
| 95275 | i64imm, |
| 95276 | /* CONVERGENCECTRL_ENTRY */ |
| 95277 | -1, |
| 95278 | /* CONVERGENCECTRL_ANCHOR */ |
| 95279 | -1, |
| 95280 | /* CONVERGENCECTRL_LOOP */ |
| 95281 | -1, -1, |
| 95282 | /* CONVERGENCECTRL_GLUE */ |
| 95283 | -1, |
| 95284 | /* G_ASSERT_SEXT */ |
| 95285 | type0, type0, untyped_imm_0, |
| 95286 | /* G_ASSERT_ZEXT */ |
| 95287 | type0, type0, untyped_imm_0, |
| 95288 | /* G_ASSERT_ALIGN */ |
| 95289 | type0, type0, untyped_imm_0, |
| 95290 | /* G_ADD */ |
| 95291 | type0, type0, type0, |
| 95292 | /* G_SUB */ |
| 95293 | type0, type0, type0, |
| 95294 | /* G_MUL */ |
| 95295 | type0, type0, type0, |
| 95296 | /* G_SDIV */ |
| 95297 | type0, type0, type0, |
| 95298 | /* G_UDIV */ |
| 95299 | type0, type0, type0, |
| 95300 | /* G_SREM */ |
| 95301 | type0, type0, type0, |
| 95302 | /* G_UREM */ |
| 95303 | type0, type0, type0, |
| 95304 | /* G_SDIVREM */ |
| 95305 | type0, type0, type0, type0, |
| 95306 | /* G_UDIVREM */ |
| 95307 | type0, type0, type0, type0, |
| 95308 | /* G_AND */ |
| 95309 | type0, type0, type0, |
| 95310 | /* G_OR */ |
| 95311 | type0, type0, type0, |
| 95312 | /* G_XOR */ |
| 95313 | type0, type0, type0, |
| 95314 | /* G_ABDS */ |
| 95315 | type0, type0, type0, |
| 95316 | /* G_ABDU */ |
| 95317 | type0, type0, type0, |
| 95318 | /* G_IMPLICIT_DEF */ |
| 95319 | type0, |
| 95320 | /* G_PHI */ |
| 95321 | type0, |
| 95322 | /* G_FRAME_INDEX */ |
| 95323 | ptype0, -1, |
| 95324 | /* G_GLOBAL_VALUE */ |
| 95325 | type0, -1, |
| 95326 | /* G_PTRAUTH_GLOBAL_VALUE */ |
| 95327 | type0, -1, i32imm, type1, i64imm, |
| 95328 | /* G_CONSTANT_POOL */ |
| 95329 | type0, -1, |
| 95330 | /* G_EXTRACT */ |
| 95331 | type0, type1, untyped_imm_0, |
| 95332 | /* G_UNMERGE_VALUES */ |
| 95333 | type0, type1, |
| 95334 | /* G_INSERT */ |
| 95335 | type0, type0, type1, untyped_imm_0, |
| 95336 | /* G_MERGE_VALUES */ |
| 95337 | type0, type1, |
| 95338 | /* G_BUILD_VECTOR */ |
| 95339 | type0, type1, |
| 95340 | /* G_BUILD_VECTOR_TRUNC */ |
| 95341 | type0, type1, |
| 95342 | /* G_CONCAT_VECTORS */ |
| 95343 | type0, type1, |
| 95344 | /* G_PTRTOINT */ |
| 95345 | type0, type1, |
| 95346 | /* G_INTTOPTR */ |
| 95347 | type0, type1, |
| 95348 | /* G_BITCAST */ |
| 95349 | type0, type1, |
| 95350 | /* G_FREEZE */ |
| 95351 | type0, type0, |
| 95352 | /* G_CONSTANT_FOLD_BARRIER */ |
| 95353 | type0, type0, |
| 95354 | /* G_INTRINSIC_FPTRUNC_ROUND */ |
| 95355 | type0, type1, i32imm, |
| 95356 | /* G_INTRINSIC_TRUNC */ |
| 95357 | type0, type0, |
| 95358 | /* G_INTRINSIC_ROUND */ |
| 95359 | type0, type0, |
| 95360 | /* G_INTRINSIC_LRINT */ |
| 95361 | type0, type1, |
| 95362 | /* G_INTRINSIC_LLRINT */ |
| 95363 | type0, type1, |
| 95364 | /* G_INTRINSIC_ROUNDEVEN */ |
| 95365 | type0, type0, |
| 95366 | /* G_READCYCLECOUNTER */ |
| 95367 | type0, |
| 95368 | /* G_READSTEADYCOUNTER */ |
| 95369 | type0, |
| 95370 | /* G_LOAD */ |
| 95371 | type0, ptype1, |
| 95372 | /* G_SEXTLOAD */ |
| 95373 | type0, ptype1, |
| 95374 | /* G_ZEXTLOAD */ |
| 95375 | type0, ptype1, |
| 95376 | /* G_INDEXED_LOAD */ |
| 95377 | type0, ptype1, ptype1, type2, -1, |
| 95378 | /* G_INDEXED_SEXTLOAD */ |
| 95379 | type0, ptype1, ptype1, type2, -1, |
| 95380 | /* G_INDEXED_ZEXTLOAD */ |
| 95381 | type0, ptype1, ptype1, type2, -1, |
| 95382 | /* G_STORE */ |
| 95383 | type0, ptype1, |
| 95384 | /* G_INDEXED_STORE */ |
| 95385 | ptype0, type1, ptype0, ptype2, -1, |
| 95386 | /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ |
| 95387 | type0, type1, type2, type0, type0, |
| 95388 | /* G_ATOMIC_CMPXCHG */ |
| 95389 | type0, ptype1, type0, type0, |
| 95390 | /* G_ATOMICRMW_XCHG */ |
| 95391 | type0, ptype1, type0, |
| 95392 | /* G_ATOMICRMW_ADD */ |
| 95393 | type0, ptype1, type0, |
| 95394 | /* G_ATOMICRMW_SUB */ |
| 95395 | type0, ptype1, type0, |
| 95396 | /* G_ATOMICRMW_AND */ |
| 95397 | type0, ptype1, type0, |
| 95398 | /* G_ATOMICRMW_NAND */ |
| 95399 | type0, ptype1, type0, |
| 95400 | /* G_ATOMICRMW_OR */ |
| 95401 | type0, ptype1, type0, |
| 95402 | /* G_ATOMICRMW_XOR */ |
| 95403 | type0, ptype1, type0, |
| 95404 | /* G_ATOMICRMW_MAX */ |
| 95405 | type0, ptype1, type0, |
| 95406 | /* G_ATOMICRMW_MIN */ |
| 95407 | type0, ptype1, type0, |
| 95408 | /* G_ATOMICRMW_UMAX */ |
| 95409 | type0, ptype1, type0, |
| 95410 | /* G_ATOMICRMW_UMIN */ |
| 95411 | type0, ptype1, type0, |
| 95412 | /* G_ATOMICRMW_FADD */ |
| 95413 | type0, ptype1, type0, |
| 95414 | /* G_ATOMICRMW_FSUB */ |
| 95415 | type0, ptype1, type0, |
| 95416 | /* G_ATOMICRMW_FMAX */ |
| 95417 | type0, ptype1, type0, |
| 95418 | /* G_ATOMICRMW_FMIN */ |
| 95419 | type0, ptype1, type0, |
| 95420 | /* G_ATOMICRMW_FMAXIMUM */ |
| 95421 | type0, ptype1, type0, |
| 95422 | /* G_ATOMICRMW_FMINIMUM */ |
| 95423 | type0, ptype1, type0, |
| 95424 | /* G_ATOMICRMW_UINC_WRAP */ |
| 95425 | type0, ptype1, type0, |
| 95426 | /* G_ATOMICRMW_UDEC_WRAP */ |
| 95427 | type0, ptype1, type0, |
| 95428 | /* G_ATOMICRMW_USUB_COND */ |
| 95429 | type0, ptype1, type0, |
| 95430 | /* G_ATOMICRMW_USUB_SAT */ |
| 95431 | type0, ptype1, type0, |
| 95432 | /* G_FENCE */ |
| 95433 | i32imm, i32imm, |
| 95434 | /* G_PREFETCH */ |
| 95435 | ptype0, i32imm, i32imm, i32imm, |
| 95436 | /* G_BRCOND */ |
| 95437 | type0, -1, |
| 95438 | /* G_BRINDIRECT */ |
| 95439 | type0, |
| 95440 | /* G_INVOKE_REGION_START */ |
| 95441 | /* G_INTRINSIC */ |
| 95442 | -1, |
| 95443 | /* G_INTRINSIC_W_SIDE_EFFECTS */ |
| 95444 | -1, |
| 95445 | /* G_INTRINSIC_CONVERGENT */ |
| 95446 | -1, |
| 95447 | /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */ |
| 95448 | -1, |
| 95449 | /* G_ANYEXT */ |
| 95450 | type0, type1, |
| 95451 | /* G_TRUNC */ |
| 95452 | type0, type1, |
| 95453 | /* G_CONSTANT */ |
| 95454 | type0, -1, |
| 95455 | /* G_FCONSTANT */ |
| 95456 | type0, -1, |
| 95457 | /* G_VASTART */ |
| 95458 | type0, |
| 95459 | /* G_VAARG */ |
| 95460 | type0, type1, -1, |
| 95461 | /* G_SEXT */ |
| 95462 | type0, type1, |
| 95463 | /* G_SEXT_INREG */ |
| 95464 | type0, type0, untyped_imm_0, |
| 95465 | /* G_ZEXT */ |
| 95466 | type0, type1, |
| 95467 | /* G_SHL */ |
| 95468 | type0, type0, type1, |
| 95469 | /* G_LSHR */ |
| 95470 | type0, type0, type1, |
| 95471 | /* G_ASHR */ |
| 95472 | type0, type0, type1, |
| 95473 | /* G_FSHL */ |
| 95474 | type0, type0, type0, type1, |
| 95475 | /* G_FSHR */ |
| 95476 | type0, type0, type0, type1, |
| 95477 | /* G_ROTR */ |
| 95478 | type0, type0, type1, |
| 95479 | /* G_ROTL */ |
| 95480 | type0, type0, type1, |
| 95481 | /* G_ICMP */ |
| 95482 | type0, -1, type1, type1, |
| 95483 | /* G_FCMP */ |
| 95484 | type0, -1, type1, type1, |
| 95485 | /* G_SCMP */ |
| 95486 | type0, type1, type1, |
| 95487 | /* G_UCMP */ |
| 95488 | type0, type1, type1, |
| 95489 | /* G_SELECT */ |
| 95490 | type0, type1, type0, type0, |
| 95491 | /* G_UADDO */ |
| 95492 | type0, type1, type0, type0, |
| 95493 | /* G_UADDE */ |
| 95494 | type0, type1, type0, type0, type1, |
| 95495 | /* G_USUBO */ |
| 95496 | type0, type1, type0, type0, |
| 95497 | /* G_USUBE */ |
| 95498 | type0, type1, type0, type0, type1, |
| 95499 | /* G_SADDO */ |
| 95500 | type0, type1, type0, type0, |
| 95501 | /* G_SADDE */ |
| 95502 | type0, type1, type0, type0, type1, |
| 95503 | /* G_SSUBO */ |
| 95504 | type0, type1, type0, type0, |
| 95505 | /* G_SSUBE */ |
| 95506 | type0, type1, type0, type0, type1, |
| 95507 | /* G_UMULO */ |
| 95508 | type0, type1, type0, type0, |
| 95509 | /* G_SMULO */ |
| 95510 | type0, type1, type0, type0, |
| 95511 | /* G_UMULH */ |
| 95512 | type0, type0, type0, |
| 95513 | /* G_SMULH */ |
| 95514 | type0, type0, type0, |
| 95515 | /* G_UADDSAT */ |
| 95516 | type0, type0, type0, |
| 95517 | /* G_SADDSAT */ |
| 95518 | type0, type0, type0, |
| 95519 | /* G_USUBSAT */ |
| 95520 | type0, type0, type0, |
| 95521 | /* G_SSUBSAT */ |
| 95522 | type0, type0, type0, |
| 95523 | /* G_USHLSAT */ |
| 95524 | type0, type0, type1, |
| 95525 | /* G_SSHLSAT */ |
| 95526 | type0, type0, type1, |
| 95527 | /* G_SMULFIX */ |
| 95528 | type0, type0, type0, untyped_imm_0, |
| 95529 | /* G_UMULFIX */ |
| 95530 | type0, type0, type0, untyped_imm_0, |
| 95531 | /* G_SMULFIXSAT */ |
| 95532 | type0, type0, type0, untyped_imm_0, |
| 95533 | /* G_UMULFIXSAT */ |
| 95534 | type0, type0, type0, untyped_imm_0, |
| 95535 | /* G_SDIVFIX */ |
| 95536 | type0, type0, type0, untyped_imm_0, |
| 95537 | /* G_UDIVFIX */ |
| 95538 | type0, type0, type0, untyped_imm_0, |
| 95539 | /* G_SDIVFIXSAT */ |
| 95540 | type0, type0, type0, untyped_imm_0, |
| 95541 | /* G_UDIVFIXSAT */ |
| 95542 | type0, type0, type0, untyped_imm_0, |
| 95543 | /* G_FADD */ |
| 95544 | type0, type0, type0, |
| 95545 | /* G_FSUB */ |
| 95546 | type0, type0, type0, |
| 95547 | /* G_FMUL */ |
| 95548 | type0, type0, type0, |
| 95549 | /* G_FMA */ |
| 95550 | type0, type0, type0, type0, |
| 95551 | /* G_FMAD */ |
| 95552 | type0, type0, type0, type0, |
| 95553 | /* G_FDIV */ |
| 95554 | type0, type0, type0, |
| 95555 | /* G_FREM */ |
| 95556 | type0, type0, type0, |
| 95557 | /* G_FPOW */ |
| 95558 | type0, type0, type0, |
| 95559 | /* G_FPOWI */ |
| 95560 | type0, type0, type1, |
| 95561 | /* G_FEXP */ |
| 95562 | type0, type0, |
| 95563 | /* G_FEXP2 */ |
| 95564 | type0, type0, |
| 95565 | /* G_FEXP10 */ |
| 95566 | type0, type0, |
| 95567 | /* G_FLOG */ |
| 95568 | type0, type0, |
| 95569 | /* G_FLOG2 */ |
| 95570 | type0, type0, |
| 95571 | /* G_FLOG10 */ |
| 95572 | type0, type0, |
| 95573 | /* G_FLDEXP */ |
| 95574 | type0, type0, type1, |
| 95575 | /* G_FFREXP */ |
| 95576 | type0, type1, type0, |
| 95577 | /* G_FNEG */ |
| 95578 | type0, type0, |
| 95579 | /* G_FPEXT */ |
| 95580 | type0, type1, |
| 95581 | /* G_FPTRUNC */ |
| 95582 | type0, type1, |
| 95583 | /* G_FPTOSI */ |
| 95584 | type0, type1, |
| 95585 | /* G_FPTOUI */ |
| 95586 | type0, type1, |
| 95587 | /* G_SITOFP */ |
| 95588 | type0, type1, |
| 95589 | /* G_UITOFP */ |
| 95590 | type0, type1, |
| 95591 | /* G_FPTOSI_SAT */ |
| 95592 | type0, type1, |
| 95593 | /* G_FPTOUI_SAT */ |
| 95594 | type0, type1, |
| 95595 | /* G_FABS */ |
| 95596 | type0, type0, |
| 95597 | /* G_FCOPYSIGN */ |
| 95598 | type0, type0, type1, |
| 95599 | /* G_IS_FPCLASS */ |
| 95600 | type0, type1, -1, |
| 95601 | /* G_FCANONICALIZE */ |
| 95602 | type0, type0, |
| 95603 | /* G_FMINNUM */ |
| 95604 | type0, type0, type0, |
| 95605 | /* G_FMAXNUM */ |
| 95606 | type0, type0, type0, |
| 95607 | /* G_FMINNUM_IEEE */ |
| 95608 | type0, type0, type0, |
| 95609 | /* G_FMAXNUM_IEEE */ |
| 95610 | type0, type0, type0, |
| 95611 | /* G_FMINIMUM */ |
| 95612 | type0, type0, type0, |
| 95613 | /* G_FMAXIMUM */ |
| 95614 | type0, type0, type0, |
| 95615 | /* G_FMINIMUMNUM */ |
| 95616 | type0, type0, type0, |
| 95617 | /* G_FMAXIMUMNUM */ |
| 95618 | type0, type0, type0, |
| 95619 | /* G_GET_FPENV */ |
| 95620 | type0, |
| 95621 | /* G_SET_FPENV */ |
| 95622 | type0, |
| 95623 | /* G_RESET_FPENV */ |
| 95624 | /* G_GET_FPMODE */ |
| 95625 | type0, |
| 95626 | /* G_SET_FPMODE */ |
| 95627 | type0, |
| 95628 | /* G_RESET_FPMODE */ |
| 95629 | /* G_PTR_ADD */ |
| 95630 | ptype0, ptype0, type1, |
| 95631 | /* G_PTRMASK */ |
| 95632 | ptype0, ptype0, type1, |
| 95633 | /* G_SMIN */ |
| 95634 | type0, type0, type0, |
| 95635 | /* G_SMAX */ |
| 95636 | type0, type0, type0, |
| 95637 | /* G_UMIN */ |
| 95638 | type0, type0, type0, |
| 95639 | /* G_UMAX */ |
| 95640 | type0, type0, type0, |
| 95641 | /* G_ABS */ |
| 95642 | type0, type0, |
| 95643 | /* G_LROUND */ |
| 95644 | type0, type1, |
| 95645 | /* G_LLROUND */ |
| 95646 | type0, type1, |
| 95647 | /* G_BR */ |
| 95648 | -1, |
| 95649 | /* G_BRJT */ |
| 95650 | ptype0, -1, type1, |
| 95651 | /* G_VSCALE */ |
| 95652 | type0, -1, |
| 95653 | /* G_INSERT_SUBVECTOR */ |
| 95654 | type0, type0, type1, untyped_imm_0, |
| 95655 | /* G_EXTRACT_SUBVECTOR */ |
| 95656 | type0, type1, untyped_imm_0, |
| 95657 | /* G_INSERT_VECTOR_ELT */ |
| 95658 | type0, type0, type1, type2, |
| 95659 | /* G_EXTRACT_VECTOR_ELT */ |
| 95660 | type0, type1, type2, |
| 95661 | /* G_SHUFFLE_VECTOR */ |
| 95662 | type0, type1, type1, -1, |
| 95663 | /* G_SPLAT_VECTOR */ |
| 95664 | type0, type1, |
| 95665 | /* G_STEP_VECTOR */ |
| 95666 | type0, -1, |
| 95667 | /* G_VECTOR_COMPRESS */ |
| 95668 | type0, type0, type1, type0, |
| 95669 | /* G_CTTZ */ |
| 95670 | type0, type1, |
| 95671 | /* G_CTTZ_ZERO_UNDEF */ |
| 95672 | type0, type1, |
| 95673 | /* G_CTLZ */ |
| 95674 | type0, type1, |
| 95675 | /* G_CTLZ_ZERO_UNDEF */ |
| 95676 | type0, type1, |
| 95677 | /* G_CTPOP */ |
| 95678 | type0, type1, |
| 95679 | /* G_BSWAP */ |
| 95680 | type0, type0, |
| 95681 | /* G_BITREVERSE */ |
| 95682 | type0, type0, |
| 95683 | /* G_FCEIL */ |
| 95684 | type0, type0, |
| 95685 | /* G_FCOS */ |
| 95686 | type0, type0, |
| 95687 | /* G_FSIN */ |
| 95688 | type0, type0, |
| 95689 | /* G_FSINCOS */ |
| 95690 | type0, type0, type0, |
| 95691 | /* G_FTAN */ |
| 95692 | type0, type0, |
| 95693 | /* G_FACOS */ |
| 95694 | type0, type0, |
| 95695 | /* G_FASIN */ |
| 95696 | type0, type0, |
| 95697 | /* G_FATAN */ |
| 95698 | type0, type0, |
| 95699 | /* G_FATAN2 */ |
| 95700 | type0, type0, type0, |
| 95701 | /* G_FCOSH */ |
| 95702 | type0, type0, |
| 95703 | /* G_FSINH */ |
| 95704 | type0, type0, |
| 95705 | /* G_FTANH */ |
| 95706 | type0, type0, |
| 95707 | /* G_FSQRT */ |
| 95708 | type0, type0, |
| 95709 | /* G_FFLOOR */ |
| 95710 | type0, type0, |
| 95711 | /* G_FRINT */ |
| 95712 | type0, type0, |
| 95713 | /* G_FNEARBYINT */ |
| 95714 | type0, type0, |
| 95715 | /* G_ADDRSPACE_CAST */ |
| 95716 | type0, type1, |
| 95717 | /* G_BLOCK_ADDR */ |
| 95718 | type0, -1, |
| 95719 | /* G_JUMP_TABLE */ |
| 95720 | type0, -1, |
| 95721 | /* G_DYN_STACKALLOC */ |
| 95722 | ptype0, type1, i32imm, |
| 95723 | /* G_STACKSAVE */ |
| 95724 | ptype0, |
| 95725 | /* G_STACKRESTORE */ |
| 95726 | ptype0, |
| 95727 | /* G_STRICT_FADD */ |
| 95728 | type0, type0, type0, |
| 95729 | /* G_STRICT_FSUB */ |
| 95730 | type0, type0, type0, |
| 95731 | /* G_STRICT_FMUL */ |
| 95732 | type0, type0, type0, |
| 95733 | /* G_STRICT_FDIV */ |
| 95734 | type0, type0, type0, |
| 95735 | /* G_STRICT_FREM */ |
| 95736 | type0, type0, type0, |
| 95737 | /* G_STRICT_FMA */ |
| 95738 | type0, type0, type0, type0, |
| 95739 | /* G_STRICT_FSQRT */ |
| 95740 | type0, type0, |
| 95741 | /* G_STRICT_FLDEXP */ |
| 95742 | type0, type0, type1, |
| 95743 | /* G_READ_REGISTER */ |
| 95744 | type0, -1, |
| 95745 | /* G_WRITE_REGISTER */ |
| 95746 | -1, type0, |
| 95747 | /* G_MEMCPY */ |
| 95748 | ptype0, ptype1, type2, untyped_imm_0, |
| 95749 | /* G_MEMCPY_INLINE */ |
| 95750 | ptype0, ptype1, type2, |
| 95751 | /* G_MEMMOVE */ |
| 95752 | ptype0, ptype1, type2, untyped_imm_0, |
| 95753 | /* G_MEMSET */ |
| 95754 | ptype0, type1, type2, untyped_imm_0, |
| 95755 | /* G_BZERO */ |
| 95756 | ptype0, type1, untyped_imm_0, |
| 95757 | /* G_TRAP */ |
| 95758 | /* G_DEBUGTRAP */ |
| 95759 | /* G_UBSANTRAP */ |
| 95760 | i8imm, |
| 95761 | /* G_VECREDUCE_SEQ_FADD */ |
| 95762 | type0, type1, type2, |
| 95763 | /* G_VECREDUCE_SEQ_FMUL */ |
| 95764 | type0, type1, type2, |
| 95765 | /* G_VECREDUCE_FADD */ |
| 95766 | type0, type1, |
| 95767 | /* G_VECREDUCE_FMUL */ |
| 95768 | type0, type1, |
| 95769 | /* G_VECREDUCE_FMAX */ |
| 95770 | type0, type1, |
| 95771 | /* G_VECREDUCE_FMIN */ |
| 95772 | type0, type1, |
| 95773 | /* G_VECREDUCE_FMAXIMUM */ |
| 95774 | type0, type1, |
| 95775 | /* G_VECREDUCE_FMINIMUM */ |
| 95776 | type0, type1, |
| 95777 | /* G_VECREDUCE_ADD */ |
| 95778 | type0, type1, |
| 95779 | /* G_VECREDUCE_MUL */ |
| 95780 | type0, type1, |
| 95781 | /* G_VECREDUCE_AND */ |
| 95782 | type0, type1, |
| 95783 | /* G_VECREDUCE_OR */ |
| 95784 | type0, type1, |
| 95785 | /* G_VECREDUCE_XOR */ |
| 95786 | type0, type1, |
| 95787 | /* G_VECREDUCE_SMAX */ |
| 95788 | type0, type1, |
| 95789 | /* G_VECREDUCE_SMIN */ |
| 95790 | type0, type1, |
| 95791 | /* G_VECREDUCE_UMAX */ |
| 95792 | type0, type1, |
| 95793 | /* G_VECREDUCE_UMIN */ |
| 95794 | type0, type1, |
| 95795 | /* G_SBFX */ |
| 95796 | type0, type0, type1, type1, |
| 95797 | /* G_UBFX */ |
| 95798 | type0, type0, type1, type1, |
| 95799 | /* ADD16ri_DB */ |
| 95800 | GR16, GR16, i16imm, |
| 95801 | /* ADD16rr_DB */ |
| 95802 | GR16, GR16, GR16, |
| 95803 | /* ADD32ri_DB */ |
| 95804 | GR32, GR32, i32imm, |
| 95805 | /* ADD32rr_DB */ |
| 95806 | GR32, GR32, GR32, |
| 95807 | /* ADD64ri32_DB */ |
| 95808 | GR64, GR64, i64i32imm, |
| 95809 | /* ADD64rr_DB */ |
| 95810 | GR64, GR64, GR64, |
| 95811 | /* ADD8ri_DB */ |
| 95812 | GR8, GR8, i8imm, |
| 95813 | /* ADD8rr_DB */ |
| 95814 | GR8, GR8, GR8, |
| 95815 | /* AVX1_SETALLONES */ |
| 95816 | VR256, |
| 95817 | /* AVX2_SETALLONES */ |
| 95818 | VR256, |
| 95819 | /* AVX512_128_SET0 */ |
| 95820 | VR128X, |
| 95821 | /* AVX512_256_SET0 */ |
| 95822 | VR256X, |
| 95823 | /* AVX512_512_SET0 */ |
| 95824 | VR512, |
| 95825 | /* AVX512_512_SETALLONES */ |
| 95826 | VR512, |
| 95827 | /* AVX512_512_SEXT_MASK_32 */ |
| 95828 | VR512, VK16WM, |
| 95829 | /* AVX512_512_SEXT_MASK_64 */ |
| 95830 | VR512, VK8WM, |
| 95831 | /* AVX512_FsFLD0F128 */ |
| 95832 | VR128X, |
| 95833 | /* AVX512_FsFLD0SD */ |
| 95834 | FR64X, |
| 95835 | /* AVX512_FsFLD0SH */ |
| 95836 | FR16X, |
| 95837 | /* AVX512_FsFLD0SS */ |
| 95838 | FR32X, |
| 95839 | /* AVX_SET0 */ |
| 95840 | VR256, |
| 95841 | /* CALL64m_RVMARKER */ |
| 95842 | i64imm, i64mem, |
| 95843 | /* CALL64pcrel32_RVMARKER */ |
| 95844 | i64imm, i64i32imm_brtarget, |
| 95845 | /* CALL64r_ImpCall */ |
| 95846 | GR64_A, |
| 95847 | /* CALL64r_RVMARKER */ |
| 95848 | i64imm, GR64, |
| 95849 | /* FsFLD0F128 */ |
| 95850 | VR128, |
| 95851 | /* FsFLD0SD */ |
| 95852 | FR64, |
| 95853 | /* FsFLD0SH */ |
| 95854 | FR16, |
| 95855 | /* FsFLD0SS */ |
| 95856 | FR32, |
| 95857 | /* G_FILD */ |
| 95858 | type0, ptype1, |
| 95859 | /* G_FIST */ |
| 95860 | type0, ptype1, |
| 95861 | /* INDIRECT_THUNK_CALL32 */ |
| 95862 | GR32, |
| 95863 | /* INDIRECT_THUNK_CALL64 */ |
| 95864 | GR64, |
| 95865 | /* INDIRECT_THUNK_TCRETURN32 */ |
| 95866 | GR32, i32imm, |
| 95867 | /* INDIRECT_THUNK_TCRETURN64 */ |
| 95868 | GR64, i32imm, |
| 95869 | /* KSET0D */ |
| 95870 | VK32, |
| 95871 | /* KSET0Q */ |
| 95872 | VK64, |
| 95873 | /* KSET0W */ |
| 95874 | VK16, |
| 95875 | /* KSET1D */ |
| 95876 | VK32, |
| 95877 | /* KSET1Q */ |
| 95878 | VK64, |
| 95879 | /* KSET1W */ |
| 95880 | VK16, |
| 95881 | /* LCMPXCHG16B_NO_RBX */ |
| 95882 | i128mem, GR64, |
| 95883 | /* LCMPXCHG16B_SAVE_RBX */ |
| 95884 | GR64, i128mem, GR64, GR64, |
| 95885 | /* MMX_SET0 */ |
| 95886 | VR64, |
| 95887 | /* MORESTACK_RET */ |
| 95888 | /* MORESTACK_RET_RESTORE_R10 */ |
| 95889 | /* MOV32ImmSExti8 */ |
| 95890 | GR32, i32i8imm, |
| 95891 | /* MOV32r0 */ |
| 95892 | GR32, |
| 95893 | /* MOV32r1 */ |
| 95894 | GR32, |
| 95895 | /* MOV32r_1 */ |
| 95896 | GR32, |
| 95897 | /* MOV32ri64 */ |
| 95898 | GR64, i64i32imm, |
| 95899 | /* MOV64ImmSExti8 */ |
| 95900 | GR64, i64i8imm, |
| 95901 | /* MWAITX */ |
| 95902 | GR32, GR32, GR32, |
| 95903 | /* MWAITX_SAVE_RBX */ |
| 95904 | GR64, GR32, GR64, |
| 95905 | /* PLDTILECFGV */ |
| 95906 | opaquemem, |
| 95907 | /* PLEA32r */ |
| 95908 | GR32, anymem, |
| 95909 | /* PLEA64r */ |
| 95910 | GR64, anymem, |
| 95911 | /* PT2RPNTLVWZ0RST1V */ |
| 95912 | TILEPair, GR16, GR16, GR16, opaquemem, |
| 95913 | /* PT2RPNTLVWZ0RSV */ |
| 95914 | TILEPair, GR16, GR16, GR16, opaquemem, |
| 95915 | /* PT2RPNTLVWZ0T1V */ |
| 95916 | TILEPair, GR16, GR16, GR16, opaquemem, |
| 95917 | /* PT2RPNTLVWZ0V */ |
| 95918 | TILEPair, GR16, GR16, GR16, opaquemem, |
| 95919 | /* PT2RPNTLVWZ1RST1V */ |
| 95920 | TILEPair, GR16, GR16, GR16, opaquemem, |
| 95921 | /* PT2RPNTLVWZ1RSV */ |
| 95922 | TILEPair, GR16, GR16, GR16, opaquemem, |
| 95923 | /* PT2RPNTLVWZ1T1V */ |
| 95924 | TILEPair, GR16, GR16, GR16, opaquemem, |
| 95925 | /* PT2RPNTLVWZ1V */ |
| 95926 | TILEPair, GR16, GR16, GR16, opaquemem, |
| 95927 | /* PTDPBF16PSV */ |
| 95928 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 95929 | /* PTDPBSSDV */ |
| 95930 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 95931 | /* PTDPBSUDV */ |
| 95932 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 95933 | /* PTDPBUSDV */ |
| 95934 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 95935 | /* PTDPBUUDV */ |
| 95936 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 95937 | /* PTDPFP16PSV */ |
| 95938 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 95939 | /* PTILELOADDRST1V */ |
| 95940 | TILE, GR16, GR16, opaquemem, |
| 95941 | /* PTILELOADDRSV */ |
| 95942 | TILE, GR16, GR16, opaquemem, |
| 95943 | /* PTILELOADDT1V */ |
| 95944 | TILE, GR16, GR16, opaquemem, |
| 95945 | /* PTILELOADDV */ |
| 95946 | TILE, GR16, GR16, opaquemem, |
| 95947 | /* PTILEPAIRLOAD */ |
| 95948 | TILEPair, opaquemem, |
| 95949 | /* PTILEPAIRSTORE */ |
| 95950 | opaquemem, TILEPair, |
| 95951 | /* PTILESTOREDV */ |
| 95952 | GR16, GR16, opaquemem, TILE, |
| 95953 | /* PTILEZEROV */ |
| 95954 | TILE, GR16, GR16, |
| 95955 | /* RDFLAGS32 */ |
| 95956 | GR32, |
| 95957 | /* RDFLAGS64 */ |
| 95958 | GR64, |
| 95959 | /* SEH_BeginEpilogue */ |
| 95960 | /* SEH_EndEpilogue */ |
| 95961 | /* SEH_EndPrologue */ |
| 95962 | /* SEH_PushFrame */ |
| 95963 | i1imm, |
| 95964 | /* SEH_PushReg */ |
| 95965 | i32imm, |
| 95966 | /* SEH_SaveReg */ |
| 95967 | i32imm, i32imm, |
| 95968 | /* SEH_SaveXMM */ |
| 95969 | i32imm, i32imm, |
| 95970 | /* SEH_SetFrame */ |
| 95971 | i32imm, i32imm, |
| 95972 | /* SEH_StackAlign */ |
| 95973 | i32imm, |
| 95974 | /* SEH_StackAlloc */ |
| 95975 | i32imm, |
| 95976 | /* SEH_UnwindV2Start */ |
| 95977 | /* SEH_UnwindVersion */ |
| 95978 | i1imm, |
| 95979 | /* SETB_C32r */ |
| 95980 | GR32, |
| 95981 | /* SETB_C64r */ |
| 95982 | GR64, |
| 95983 | /* SHLDROT32ri */ |
| 95984 | GR32, GR32, u8imm, |
| 95985 | /* SHLDROT64ri */ |
| 95986 | GR64, GR64, u8imm, |
| 95987 | /* SHRDROT32ri */ |
| 95988 | GR32, GR32, u8imm, |
| 95989 | /* SHRDROT64ri */ |
| 95990 | GR64, GR64, u8imm, |
| 95991 | /* VMOVAPSZ128mr_NOVLX */ |
| 95992 | f128mem, VR128X, |
| 95993 | /* VMOVAPSZ128rm_NOVLX */ |
| 95994 | VR128X, f128mem, |
| 95995 | /* VMOVAPSZ256mr_NOVLX */ |
| 95996 | f256mem, VR256X, |
| 95997 | /* VMOVAPSZ256rm_NOVLX */ |
| 95998 | VR256X, f256mem, |
| 95999 | /* VMOVUPSZ128mr_NOVLX */ |
| 96000 | f128mem, VR128X, |
| 96001 | /* VMOVUPSZ128rm_NOVLX */ |
| 96002 | VR128X, f128mem, |
| 96003 | /* VMOVUPSZ256mr_NOVLX */ |
| 96004 | f256mem, VR256X, |
| 96005 | /* VMOVUPSZ256rm_NOVLX */ |
| 96006 | VR256X, f256mem, |
| 96007 | /* V_SET0 */ |
| 96008 | VR128, |
| 96009 | /* V_SETALLONES */ |
| 96010 | VR128, |
| 96011 | /* WRFLAGS32 */ |
| 96012 | GR32, |
| 96013 | /* WRFLAGS64 */ |
| 96014 | GR64, |
| 96015 | /* XABORT_DEF */ |
| 96016 | /* XOR32_FP */ |
| 96017 | GR32, GR32, |
| 96018 | /* XOR64_FP */ |
| 96019 | GR64, GR64, |
| 96020 | /* AAA */ |
| 96021 | /* AAD8i8 */ |
| 96022 | i8imm, |
| 96023 | /* AADD32mr */ |
| 96024 | i32mem, GR32, |
| 96025 | /* AADD32mr_EVEX */ |
| 96026 | i32mem, GR32, |
| 96027 | /* AADD64mr */ |
| 96028 | i64mem, GR64, |
| 96029 | /* AADD64mr_EVEX */ |
| 96030 | i64mem, GR64, |
| 96031 | /* AAM8i8 */ |
| 96032 | i8imm, |
| 96033 | /* AAND32mr */ |
| 96034 | i32mem, GR32, |
| 96035 | /* AAND32mr_EVEX */ |
| 96036 | i32mem, GR32, |
| 96037 | /* AAND64mr */ |
| 96038 | i64mem, GR64, |
| 96039 | /* AAND64mr_EVEX */ |
| 96040 | i64mem, GR64, |
| 96041 | /* AAS */ |
| 96042 | /* ABS_F */ |
| 96043 | /* ABS_Fp32 */ |
| 96044 | RFP32, RFP32, |
| 96045 | /* ABS_Fp64 */ |
| 96046 | RFP64, RFP64, |
| 96047 | /* ABS_Fp80 */ |
| 96048 | RFP80, RFP80, |
| 96049 | /* ADC16i16 */ |
| 96050 | i16imm, |
| 96051 | /* ADC16mi */ |
| 96052 | i16mem, i16imm, |
| 96053 | /* ADC16mi8 */ |
| 96054 | i16mem, i16i8imm, |
| 96055 | /* ADC16mi8_EVEX */ |
| 96056 | i16mem, i16i8imm, |
| 96057 | /* ADC16mi8_ND */ |
| 96058 | GR16, i16mem, i16i8imm, |
| 96059 | /* ADC16mi_EVEX */ |
| 96060 | i16mem, i16imm, |
| 96061 | /* ADC16mi_ND */ |
| 96062 | GR16, i16mem, i16imm, |
| 96063 | /* ADC16mr */ |
| 96064 | i16mem, GR16, |
| 96065 | /* ADC16mr_EVEX */ |
| 96066 | i16mem, GR16, |
| 96067 | /* ADC16mr_ND */ |
| 96068 | GR16, i16mem, GR16, |
| 96069 | /* ADC16ri */ |
| 96070 | GR16, GR16, i16imm, |
| 96071 | /* ADC16ri8 */ |
| 96072 | GR16, GR16, i16i8imm, |
| 96073 | /* ADC16ri8_EVEX */ |
| 96074 | GR16, GR16, i16i8imm, |
| 96075 | /* ADC16ri8_ND */ |
| 96076 | GR16, GR16, i16i8imm, |
| 96077 | /* ADC16ri_EVEX */ |
| 96078 | GR16, GR16, i16imm, |
| 96079 | /* ADC16ri_ND */ |
| 96080 | GR16, GR16, i16imm, |
| 96081 | /* ADC16rm */ |
| 96082 | GR16, GR16, i16mem, |
| 96083 | /* ADC16rm_EVEX */ |
| 96084 | GR16, GR16, i16mem, |
| 96085 | /* ADC16rm_ND */ |
| 96086 | GR16, GR16, i16mem, |
| 96087 | /* ADC16rr */ |
| 96088 | GR16, GR16, GR16, |
| 96089 | /* ADC16rr_EVEX */ |
| 96090 | GR16, GR16, GR16, |
| 96091 | /* ADC16rr_EVEX_REV */ |
| 96092 | GR16, GR16, GR16, |
| 96093 | /* ADC16rr_ND */ |
| 96094 | GR16, GR16, GR16, |
| 96095 | /* ADC16rr_ND_REV */ |
| 96096 | GR16, GR16, GR16, |
| 96097 | /* ADC16rr_REV */ |
| 96098 | GR16, GR16, GR16, |
| 96099 | /* ADC32i32 */ |
| 96100 | i32imm, |
| 96101 | /* ADC32mi */ |
| 96102 | i32mem, i32imm, |
| 96103 | /* ADC32mi8 */ |
| 96104 | i32mem, i32i8imm, |
| 96105 | /* ADC32mi8_EVEX */ |
| 96106 | i32mem, i32i8imm, |
| 96107 | /* ADC32mi8_ND */ |
| 96108 | GR32, i32mem, i32i8imm, |
| 96109 | /* ADC32mi_EVEX */ |
| 96110 | i32mem, i32imm, |
| 96111 | /* ADC32mi_ND */ |
| 96112 | GR32, i32mem, i32imm, |
| 96113 | /* ADC32mr */ |
| 96114 | i32mem, GR32, |
| 96115 | /* ADC32mr_EVEX */ |
| 96116 | i32mem, GR32, |
| 96117 | /* ADC32mr_ND */ |
| 96118 | GR32, i32mem, GR32, |
| 96119 | /* ADC32ri */ |
| 96120 | GR32, GR32, i32imm, |
| 96121 | /* ADC32ri8 */ |
| 96122 | GR32, GR32, i32i8imm, |
| 96123 | /* ADC32ri8_EVEX */ |
| 96124 | GR32, GR32, i32i8imm, |
| 96125 | /* ADC32ri8_ND */ |
| 96126 | GR32, GR32, i32i8imm, |
| 96127 | /* ADC32ri_EVEX */ |
| 96128 | GR32, GR32, i32imm, |
| 96129 | /* ADC32ri_ND */ |
| 96130 | GR32, GR32, i32imm, |
| 96131 | /* ADC32rm */ |
| 96132 | GR32, GR32, i32mem, |
| 96133 | /* ADC32rm_EVEX */ |
| 96134 | GR32, GR32, i32mem, |
| 96135 | /* ADC32rm_ND */ |
| 96136 | GR32, GR32, i32mem, |
| 96137 | /* ADC32rr */ |
| 96138 | GR32, GR32, GR32, |
| 96139 | /* ADC32rr_EVEX */ |
| 96140 | GR32, GR32, GR32, |
| 96141 | /* ADC32rr_EVEX_REV */ |
| 96142 | GR32, GR32, GR32, |
| 96143 | /* ADC32rr_ND */ |
| 96144 | GR32, GR32, GR32, |
| 96145 | /* ADC32rr_ND_REV */ |
| 96146 | GR32, GR32, GR32, |
| 96147 | /* ADC32rr_REV */ |
| 96148 | GR32, GR32, GR32, |
| 96149 | /* ADC64i32 */ |
| 96150 | i64i32imm, |
| 96151 | /* ADC64mi32 */ |
| 96152 | i64mem, i64i32imm, |
| 96153 | /* ADC64mi32_EVEX */ |
| 96154 | i64mem, i64i32imm, |
| 96155 | /* ADC64mi32_ND */ |
| 96156 | GR64, i64mem, i64i32imm, |
| 96157 | /* ADC64mi8 */ |
| 96158 | i64mem, i64i8imm, |
| 96159 | /* ADC64mi8_EVEX */ |
| 96160 | i64mem, i64i8imm, |
| 96161 | /* ADC64mi8_ND */ |
| 96162 | GR64, i64mem, i64i8imm, |
| 96163 | /* ADC64mr */ |
| 96164 | i64mem, GR64, |
| 96165 | /* ADC64mr_EVEX */ |
| 96166 | i64mem, GR64, |
| 96167 | /* ADC64mr_ND */ |
| 96168 | GR64, i64mem, GR64, |
| 96169 | /* ADC64ri32 */ |
| 96170 | GR64, GR64, i64i32imm, |
| 96171 | /* ADC64ri32_EVEX */ |
| 96172 | GR64, GR64, i64i32imm, |
| 96173 | /* ADC64ri32_ND */ |
| 96174 | GR64, GR64, i64i32imm, |
| 96175 | /* ADC64ri8 */ |
| 96176 | GR64, GR64, i64i8imm, |
| 96177 | /* ADC64ri8_EVEX */ |
| 96178 | GR64, GR64, i64i8imm, |
| 96179 | /* ADC64ri8_ND */ |
| 96180 | GR64, GR64, i64i8imm, |
| 96181 | /* ADC64rm */ |
| 96182 | GR64, GR64, i64mem, |
| 96183 | /* ADC64rm_EVEX */ |
| 96184 | GR64, GR64, i64mem, |
| 96185 | /* ADC64rm_ND */ |
| 96186 | GR64, GR64, i64mem, |
| 96187 | /* ADC64rr */ |
| 96188 | GR64, GR64, GR64, |
| 96189 | /* ADC64rr_EVEX */ |
| 96190 | GR64, GR64, GR64, |
| 96191 | /* ADC64rr_EVEX_REV */ |
| 96192 | GR64, GR64, GR64, |
| 96193 | /* ADC64rr_ND */ |
| 96194 | GR64, GR64, GR64, |
| 96195 | /* ADC64rr_ND_REV */ |
| 96196 | GR64, GR64, GR64, |
| 96197 | /* ADC64rr_REV */ |
| 96198 | GR64, GR64, GR64, |
| 96199 | /* ADC8i8 */ |
| 96200 | i8imm, |
| 96201 | /* ADC8mi */ |
| 96202 | i8mem, i8imm, |
| 96203 | /* ADC8mi8 */ |
| 96204 | i8mem, i8imm, |
| 96205 | /* ADC8mi_EVEX */ |
| 96206 | i8mem, i8imm, |
| 96207 | /* ADC8mi_ND */ |
| 96208 | GR8, i8mem, i8imm, |
| 96209 | /* ADC8mr */ |
| 96210 | i8mem, GR8, |
| 96211 | /* ADC8mr_EVEX */ |
| 96212 | i8mem, GR8, |
| 96213 | /* ADC8mr_ND */ |
| 96214 | GR8, i8mem, GR8, |
| 96215 | /* ADC8ri */ |
| 96216 | GR8, GR8, i8imm, |
| 96217 | /* ADC8ri8 */ |
| 96218 | GR8, GR8, i8imm, |
| 96219 | /* ADC8ri_EVEX */ |
| 96220 | GR8, GR8, i8imm, |
| 96221 | /* ADC8ri_ND */ |
| 96222 | GR8, GR8, i8imm, |
| 96223 | /* ADC8rm */ |
| 96224 | GR8, GR8, i8mem, |
| 96225 | /* ADC8rm_EVEX */ |
| 96226 | GR8, GR8, i8mem, |
| 96227 | /* ADC8rm_ND */ |
| 96228 | GR8, GR8, i8mem, |
| 96229 | /* ADC8rr */ |
| 96230 | GR8, GR8, GR8, |
| 96231 | /* ADC8rr_EVEX */ |
| 96232 | GR8, GR8, GR8, |
| 96233 | /* ADC8rr_EVEX_REV */ |
| 96234 | GR8, GR8, GR8, |
| 96235 | /* ADC8rr_ND */ |
| 96236 | GR8, GR8, GR8, |
| 96237 | /* ADC8rr_ND_REV */ |
| 96238 | GR8, GR8, GR8, |
| 96239 | /* ADC8rr_REV */ |
| 96240 | GR8, GR8, GR8, |
| 96241 | /* ADCX32rm */ |
| 96242 | GR32, GR32, i32mem, |
| 96243 | /* ADCX32rm_EVEX */ |
| 96244 | GR32, GR32, i32mem, |
| 96245 | /* ADCX32rm_ND */ |
| 96246 | GR32, GR32, i32mem, |
| 96247 | /* ADCX32rr */ |
| 96248 | GR32, GR32, GR32, |
| 96249 | /* ADCX32rr_EVEX */ |
| 96250 | GR32, GR32, GR32, |
| 96251 | /* ADCX32rr_ND */ |
| 96252 | GR32, GR32, GR32, |
| 96253 | /* ADCX64rm */ |
| 96254 | GR64, GR64, i64mem, |
| 96255 | /* ADCX64rm_EVEX */ |
| 96256 | GR64, GR64, i64mem, |
| 96257 | /* ADCX64rm_ND */ |
| 96258 | GR64, GR64, i64mem, |
| 96259 | /* ADCX64rr */ |
| 96260 | GR64, GR64, GR64, |
| 96261 | /* ADCX64rr_EVEX */ |
| 96262 | GR64, GR64, GR64, |
| 96263 | /* ADCX64rr_ND */ |
| 96264 | GR64, GR64, GR64, |
| 96265 | /* ADD16i16 */ |
| 96266 | i16imm, |
| 96267 | /* ADD16mi */ |
| 96268 | i16mem, i16imm, |
| 96269 | /* ADD16mi8 */ |
| 96270 | i16mem, i16i8imm, |
| 96271 | /* ADD16mi8_EVEX */ |
| 96272 | i16mem, i16i8imm, |
| 96273 | /* ADD16mi8_ND */ |
| 96274 | GR16, i16mem, i16i8imm, |
| 96275 | /* ADD16mi8_NF */ |
| 96276 | i16mem, i16i8imm, |
| 96277 | /* ADD16mi8_NF_ND */ |
| 96278 | GR16, i16mem, i16i8imm, |
| 96279 | /* ADD16mi_EVEX */ |
| 96280 | i16mem, i16imm, |
| 96281 | /* ADD16mi_ND */ |
| 96282 | GR16, i16mem, i16imm, |
| 96283 | /* ADD16mi_NF */ |
| 96284 | i16mem, i16imm, |
| 96285 | /* ADD16mi_NF_ND */ |
| 96286 | GR16, i16mem, i16imm, |
| 96287 | /* ADD16mr */ |
| 96288 | i16mem, GR16, |
| 96289 | /* ADD16mr_EVEX */ |
| 96290 | i16mem, GR16, |
| 96291 | /* ADD16mr_ND */ |
| 96292 | GR16, i16mem, GR16, |
| 96293 | /* ADD16mr_NF */ |
| 96294 | i16mem, GR16, |
| 96295 | /* ADD16mr_NF_ND */ |
| 96296 | GR16, i16mem, GR16, |
| 96297 | /* ADD16ri */ |
| 96298 | GR16, GR16, i16imm, |
| 96299 | /* ADD16ri8 */ |
| 96300 | GR16, GR16, i16i8imm, |
| 96301 | /* ADD16ri8_EVEX */ |
| 96302 | GR16, GR16, i16i8imm, |
| 96303 | /* ADD16ri8_ND */ |
| 96304 | GR16, GR16, i16i8imm, |
| 96305 | /* ADD16ri8_NF */ |
| 96306 | GR16, GR16, i16i8imm, |
| 96307 | /* ADD16ri8_NF_ND */ |
| 96308 | GR16, GR16, i16i8imm, |
| 96309 | /* ADD16ri_EVEX */ |
| 96310 | GR16, GR16, i16imm, |
| 96311 | /* ADD16ri_ND */ |
| 96312 | GR16, GR16, i16imm, |
| 96313 | /* ADD16ri_NF */ |
| 96314 | GR16, GR16, i16imm, |
| 96315 | /* ADD16ri_NF_ND */ |
| 96316 | GR16, GR16, i16imm, |
| 96317 | /* ADD16rm */ |
| 96318 | GR16, GR16, i16mem, |
| 96319 | /* ADD16rm_EVEX */ |
| 96320 | GR16, GR16, i16mem, |
| 96321 | /* ADD16rm_ND */ |
| 96322 | GR16, GR16, i16mem, |
| 96323 | /* ADD16rm_NF */ |
| 96324 | GR16, GR16, i16mem, |
| 96325 | /* ADD16rm_NF_ND */ |
| 96326 | GR16, GR16, i16mem, |
| 96327 | /* ADD16rr */ |
| 96328 | GR16, GR16, GR16, |
| 96329 | /* ADD16rr_EVEX */ |
| 96330 | GR16, GR16, GR16, |
| 96331 | /* ADD16rr_EVEX_REV */ |
| 96332 | GR16, GR16, GR16, |
| 96333 | /* ADD16rr_ND */ |
| 96334 | GR16, GR16, GR16, |
| 96335 | /* ADD16rr_ND_REV */ |
| 96336 | GR16, GR16, GR16, |
| 96337 | /* ADD16rr_NF */ |
| 96338 | GR16, GR16, GR16, |
| 96339 | /* ADD16rr_NF_ND */ |
| 96340 | GR16, GR16, GR16, |
| 96341 | /* ADD16rr_NF_ND_REV */ |
| 96342 | GR16, GR16, GR16, |
| 96343 | /* ADD16rr_NF_REV */ |
| 96344 | GR16, GR16, GR16, |
| 96345 | /* ADD16rr_REV */ |
| 96346 | GR16, GR16, GR16, |
| 96347 | /* ADD32i32 */ |
| 96348 | i32imm, |
| 96349 | /* ADD32mi */ |
| 96350 | i32mem, i32imm, |
| 96351 | /* ADD32mi8 */ |
| 96352 | i32mem, i32i8imm, |
| 96353 | /* ADD32mi8_EVEX */ |
| 96354 | i32mem, i32i8imm, |
| 96355 | /* ADD32mi8_ND */ |
| 96356 | GR32, i32mem, i32i8imm, |
| 96357 | /* ADD32mi8_NF */ |
| 96358 | i32mem, i32i8imm, |
| 96359 | /* ADD32mi8_NF_ND */ |
| 96360 | GR32, i32mem, i32i8imm, |
| 96361 | /* ADD32mi_EVEX */ |
| 96362 | i32mem, i32imm, |
| 96363 | /* ADD32mi_ND */ |
| 96364 | GR32, i32mem, i32imm, |
| 96365 | /* ADD32mi_NF */ |
| 96366 | i32mem, i32imm, |
| 96367 | /* ADD32mi_NF_ND */ |
| 96368 | GR32, i32mem, i32imm, |
| 96369 | /* ADD32mr */ |
| 96370 | i32mem, GR32, |
| 96371 | /* ADD32mr_EVEX */ |
| 96372 | i32mem, GR32, |
| 96373 | /* ADD32mr_ND */ |
| 96374 | GR32, i32mem, GR32, |
| 96375 | /* ADD32mr_NF */ |
| 96376 | i32mem, GR32, |
| 96377 | /* ADD32mr_NF_ND */ |
| 96378 | GR32, i32mem, GR32, |
| 96379 | /* ADD32ri */ |
| 96380 | GR32, GR32, i32imm, |
| 96381 | /* ADD32ri8 */ |
| 96382 | GR32, GR32, i32i8imm, |
| 96383 | /* ADD32ri8_EVEX */ |
| 96384 | GR32, GR32, i32i8imm, |
| 96385 | /* ADD32ri8_ND */ |
| 96386 | GR32, GR32, i32i8imm, |
| 96387 | /* ADD32ri8_NF */ |
| 96388 | GR32, GR32, i32i8imm, |
| 96389 | /* ADD32ri8_NF_ND */ |
| 96390 | GR32, GR32, i32i8imm, |
| 96391 | /* ADD32ri_EVEX */ |
| 96392 | GR32, GR32, i32imm, |
| 96393 | /* ADD32ri_ND */ |
| 96394 | GR32, GR32, i32imm, |
| 96395 | /* ADD32ri_NF */ |
| 96396 | GR32, GR32, i32imm, |
| 96397 | /* ADD32ri_NF_ND */ |
| 96398 | GR32, GR32, i32imm, |
| 96399 | /* ADD32rm */ |
| 96400 | GR32, GR32, i32mem, |
| 96401 | /* ADD32rm_EVEX */ |
| 96402 | GR32, GR32, i32mem, |
| 96403 | /* ADD32rm_ND */ |
| 96404 | GR32, GR32, i32mem, |
| 96405 | /* ADD32rm_NF */ |
| 96406 | GR32, GR32, i32mem, |
| 96407 | /* ADD32rm_NF_ND */ |
| 96408 | GR32, GR32, i32mem, |
| 96409 | /* ADD32rr */ |
| 96410 | GR32, GR32, GR32, |
| 96411 | /* ADD32rr_EVEX */ |
| 96412 | GR32, GR32, GR32, |
| 96413 | /* ADD32rr_EVEX_REV */ |
| 96414 | GR32, GR32, GR32, |
| 96415 | /* ADD32rr_ND */ |
| 96416 | GR32, GR32, GR32, |
| 96417 | /* ADD32rr_ND_REV */ |
| 96418 | GR32, GR32, GR32, |
| 96419 | /* ADD32rr_NF */ |
| 96420 | GR32, GR32, GR32, |
| 96421 | /* ADD32rr_NF_ND */ |
| 96422 | GR32, GR32, GR32, |
| 96423 | /* ADD32rr_NF_ND_REV */ |
| 96424 | GR32, GR32, GR32, |
| 96425 | /* ADD32rr_NF_REV */ |
| 96426 | GR32, GR32, GR32, |
| 96427 | /* ADD32rr_REV */ |
| 96428 | GR32, GR32, GR32, |
| 96429 | /* ADD64i32 */ |
| 96430 | i64i32imm, |
| 96431 | /* ADD64mi32 */ |
| 96432 | i64mem, i64i32imm, |
| 96433 | /* ADD64mi32_EVEX */ |
| 96434 | i64mem, i64i32imm, |
| 96435 | /* ADD64mi32_ND */ |
| 96436 | GR64, i64mem, i64i32imm, |
| 96437 | /* ADD64mi32_NF */ |
| 96438 | i64mem, i64i32imm, |
| 96439 | /* ADD64mi32_NF_ND */ |
| 96440 | GR64, i64mem, i64i32imm, |
| 96441 | /* ADD64mi8 */ |
| 96442 | i64mem, i64i8imm, |
| 96443 | /* ADD64mi8_EVEX */ |
| 96444 | i64mem, i64i8imm, |
| 96445 | /* ADD64mi8_ND */ |
| 96446 | GR64, i64mem, i64i8imm, |
| 96447 | /* ADD64mi8_NF */ |
| 96448 | i64mem, i64i8imm, |
| 96449 | /* ADD64mi8_NF_ND */ |
| 96450 | GR64, i64mem, i64i8imm, |
| 96451 | /* ADD64mr */ |
| 96452 | i64mem, GR64, |
| 96453 | /* ADD64mr_EVEX */ |
| 96454 | i64mem, GR64, |
| 96455 | /* ADD64mr_ND */ |
| 96456 | GR64, i64mem, GR64, |
| 96457 | /* ADD64mr_NF */ |
| 96458 | i64mem, GR64, |
| 96459 | /* ADD64mr_NF_ND */ |
| 96460 | GR64, i64mem, GR64, |
| 96461 | /* ADD64ri32 */ |
| 96462 | GR64, GR64, i64i32imm, |
| 96463 | /* ADD64ri32_EVEX */ |
| 96464 | GR64, GR64, i64i32imm, |
| 96465 | /* ADD64ri32_ND */ |
| 96466 | GR64, GR64, i64i32imm, |
| 96467 | /* ADD64ri32_NF */ |
| 96468 | GR64, GR64, i64i32imm, |
| 96469 | /* ADD64ri32_NF_ND */ |
| 96470 | GR64, GR64, i64i32imm, |
| 96471 | /* ADD64ri8 */ |
| 96472 | GR64, GR64, i64i8imm, |
| 96473 | /* ADD64ri8_EVEX */ |
| 96474 | GR64, GR64, i64i8imm, |
| 96475 | /* ADD64ri8_ND */ |
| 96476 | GR64, GR64, i64i8imm, |
| 96477 | /* ADD64ri8_NF */ |
| 96478 | GR64, GR64, i64i8imm, |
| 96479 | /* ADD64ri8_NF_ND */ |
| 96480 | GR64, GR64, i64i8imm, |
| 96481 | /* ADD64rm */ |
| 96482 | GR64, GR64, i64mem, |
| 96483 | /* ADD64rm_EVEX */ |
| 96484 | GR64, GR64, i64mem, |
| 96485 | /* ADD64rm_ND */ |
| 96486 | GR64, GR64, i64mem, |
| 96487 | /* ADD64rm_NF */ |
| 96488 | GR64, GR64, i64mem, |
| 96489 | /* ADD64rm_NF_ND */ |
| 96490 | GR64, GR64, i64mem, |
| 96491 | /* ADD64rr */ |
| 96492 | GR64, GR64, GR64, |
| 96493 | /* ADD64rr_EVEX */ |
| 96494 | GR64, GR64, GR64, |
| 96495 | /* ADD64rr_EVEX_REV */ |
| 96496 | GR64, GR64, GR64, |
| 96497 | /* ADD64rr_ND */ |
| 96498 | GR64, GR64, GR64, |
| 96499 | /* ADD64rr_ND_REV */ |
| 96500 | GR64, GR64, GR64, |
| 96501 | /* ADD64rr_NF */ |
| 96502 | GR64, GR64, GR64, |
| 96503 | /* ADD64rr_NF_ND */ |
| 96504 | GR64, GR64, GR64, |
| 96505 | /* ADD64rr_NF_ND_REV */ |
| 96506 | GR64, GR64, GR64, |
| 96507 | /* ADD64rr_NF_REV */ |
| 96508 | GR64, GR64, GR64, |
| 96509 | /* ADD64rr_REV */ |
| 96510 | GR64, GR64, GR64, |
| 96511 | /* ADD8i8 */ |
| 96512 | i8imm, |
| 96513 | /* ADD8mi */ |
| 96514 | i8mem, i8imm, |
| 96515 | /* ADD8mi8 */ |
| 96516 | i8mem, i8imm, |
| 96517 | /* ADD8mi_EVEX */ |
| 96518 | i8mem, i8imm, |
| 96519 | /* ADD8mi_ND */ |
| 96520 | GR8, i8mem, i8imm, |
| 96521 | /* ADD8mi_NF */ |
| 96522 | i8mem, i8imm, |
| 96523 | /* ADD8mi_NF_ND */ |
| 96524 | GR8, i8mem, i8imm, |
| 96525 | /* ADD8mr */ |
| 96526 | i8mem, GR8, |
| 96527 | /* ADD8mr_EVEX */ |
| 96528 | i8mem, GR8, |
| 96529 | /* ADD8mr_ND */ |
| 96530 | GR8, i8mem, GR8, |
| 96531 | /* ADD8mr_NF */ |
| 96532 | i8mem, GR8, |
| 96533 | /* ADD8mr_NF_ND */ |
| 96534 | GR8, i8mem, GR8, |
| 96535 | /* ADD8ri */ |
| 96536 | GR8, GR8, i8imm, |
| 96537 | /* ADD8ri8 */ |
| 96538 | GR8, GR8, i8imm, |
| 96539 | /* ADD8ri_EVEX */ |
| 96540 | GR8, GR8, i8imm, |
| 96541 | /* ADD8ri_ND */ |
| 96542 | GR8, GR8, i8imm, |
| 96543 | /* ADD8ri_NF */ |
| 96544 | GR8, GR8, i8imm, |
| 96545 | /* ADD8ri_NF_ND */ |
| 96546 | GR8, GR8, i8imm, |
| 96547 | /* ADD8rm */ |
| 96548 | GR8, GR8, i8mem, |
| 96549 | /* ADD8rm_EVEX */ |
| 96550 | GR8, GR8, i8mem, |
| 96551 | /* ADD8rm_ND */ |
| 96552 | GR8, GR8, i8mem, |
| 96553 | /* ADD8rm_NF */ |
| 96554 | GR8, GR8, i8mem, |
| 96555 | /* ADD8rm_NF_ND */ |
| 96556 | GR8, GR8, i8mem, |
| 96557 | /* ADD8rr */ |
| 96558 | GR8, GR8, GR8, |
| 96559 | /* ADD8rr_EVEX */ |
| 96560 | GR8, GR8, GR8, |
| 96561 | /* ADD8rr_EVEX_REV */ |
| 96562 | GR8, GR8, GR8, |
| 96563 | /* ADD8rr_ND */ |
| 96564 | GR8, GR8, GR8, |
| 96565 | /* ADD8rr_ND_REV */ |
| 96566 | GR8, GR8, GR8, |
| 96567 | /* ADD8rr_NF */ |
| 96568 | GR8, GR8, GR8, |
| 96569 | /* ADD8rr_NF_ND */ |
| 96570 | GR8, GR8, GR8, |
| 96571 | /* ADD8rr_NF_ND_REV */ |
| 96572 | GR8, GR8, GR8, |
| 96573 | /* ADD8rr_NF_REV */ |
| 96574 | GR8, GR8, GR8, |
| 96575 | /* ADD8rr_REV */ |
| 96576 | GR8, GR8, GR8, |
| 96577 | /* ADDPDrm */ |
| 96578 | VR128, VR128, f128mem, |
| 96579 | /* ADDPDrr */ |
| 96580 | VR128, VR128, VR128, |
| 96581 | /* ADDPSrm */ |
| 96582 | VR128, VR128, f128mem, |
| 96583 | /* ADDPSrr */ |
| 96584 | VR128, VR128, VR128, |
| 96585 | /* ADDR16_PREFIX */ |
| 96586 | /* ADDR32_PREFIX */ |
| 96587 | /* ADDSDrm */ |
| 96588 | FR64, FR64, f64mem, |
| 96589 | /* ADDSDrm_Int */ |
| 96590 | VR128, VR128, sdmem, |
| 96591 | /* ADDSDrr */ |
| 96592 | FR64, FR64, FR64, |
| 96593 | /* ADDSDrr_Int */ |
| 96594 | VR128, VR128, VR128, |
| 96595 | /* ADDSSrm */ |
| 96596 | FR32, FR32, f32mem, |
| 96597 | /* ADDSSrm_Int */ |
| 96598 | VR128, VR128, ssmem, |
| 96599 | /* ADDSSrr */ |
| 96600 | FR32, FR32, FR32, |
| 96601 | /* ADDSSrr_Int */ |
| 96602 | VR128, VR128, VR128, |
| 96603 | /* ADDSUBPDrm */ |
| 96604 | VR128, VR128, f128mem, |
| 96605 | /* ADDSUBPDrr */ |
| 96606 | VR128, VR128, VR128, |
| 96607 | /* ADDSUBPSrm */ |
| 96608 | VR128, VR128, f128mem, |
| 96609 | /* ADDSUBPSrr */ |
| 96610 | VR128, VR128, VR128, |
| 96611 | /* ADD_F32m */ |
| 96612 | f32mem, |
| 96613 | /* ADD_F64m */ |
| 96614 | f64mem, |
| 96615 | /* ADD_FI16m */ |
| 96616 | i16mem, |
| 96617 | /* ADD_FI32m */ |
| 96618 | i32mem, |
| 96619 | /* ADD_FPrST0 */ |
| 96620 | RSTi, |
| 96621 | /* ADD_FST0r */ |
| 96622 | RSTi, |
| 96623 | /* ADD_Fp32 */ |
| 96624 | RFP32, RFP32, RFP32, |
| 96625 | /* ADD_Fp32m */ |
| 96626 | RFP32, RFP32, f32mem, |
| 96627 | /* ADD_Fp64 */ |
| 96628 | RFP64, RFP64, RFP64, |
| 96629 | /* ADD_Fp64m */ |
| 96630 | RFP64, RFP64, f64mem, |
| 96631 | /* ADD_Fp64m32 */ |
| 96632 | RFP64, RFP64, f32mem, |
| 96633 | /* ADD_Fp80 */ |
| 96634 | RFP80, RFP80, RFP80, |
| 96635 | /* ADD_Fp80m32 */ |
| 96636 | RFP80, RFP80, f32mem, |
| 96637 | /* ADD_Fp80m64 */ |
| 96638 | RFP80, RFP80, f64mem, |
| 96639 | /* ADD_FpI16m32 */ |
| 96640 | RFP32, RFP32, i16mem, |
| 96641 | /* ADD_FpI16m64 */ |
| 96642 | RFP64, RFP64, i16mem, |
| 96643 | /* ADD_FpI16m80 */ |
| 96644 | RFP80, RFP80, i16mem, |
| 96645 | /* ADD_FpI32m32 */ |
| 96646 | RFP32, RFP32, i32mem, |
| 96647 | /* ADD_FpI32m64 */ |
| 96648 | RFP64, RFP64, i32mem, |
| 96649 | /* ADD_FpI32m80 */ |
| 96650 | RFP80, RFP80, i32mem, |
| 96651 | /* ADD_FrST0 */ |
| 96652 | RSTi, |
| 96653 | /* ADJCALLSTACKDOWN32 */ |
| 96654 | i32imm, i32imm, i32imm, |
| 96655 | /* ADJCALLSTACKDOWN64 */ |
| 96656 | i32imm, i32imm, i32imm, |
| 96657 | /* ADJCALLSTACKUP32 */ |
| 96658 | i32imm, i32imm, |
| 96659 | /* ADJCALLSTACKUP64 */ |
| 96660 | i32imm, i32imm, |
| 96661 | /* ADOX32rm */ |
| 96662 | GR32, GR32, i32mem, |
| 96663 | /* ADOX32rm_EVEX */ |
| 96664 | GR32, GR32, i32mem, |
| 96665 | /* ADOX32rm_ND */ |
| 96666 | GR32, GR32, i32mem, |
| 96667 | /* ADOX32rr */ |
| 96668 | GR32, GR32, GR32, |
| 96669 | /* ADOX32rr_EVEX */ |
| 96670 | GR32, GR32, GR32, |
| 96671 | /* ADOX32rr_ND */ |
| 96672 | GR32, GR32, GR32, |
| 96673 | /* ADOX64rm */ |
| 96674 | GR64, GR64, i64mem, |
| 96675 | /* ADOX64rm_EVEX */ |
| 96676 | GR64, GR64, i64mem, |
| 96677 | /* ADOX64rm_ND */ |
| 96678 | GR64, GR64, i64mem, |
| 96679 | /* ADOX64rr */ |
| 96680 | GR64, GR64, GR64, |
| 96681 | /* ADOX64rr_EVEX */ |
| 96682 | GR64, GR64, GR64, |
| 96683 | /* ADOX64rr_ND */ |
| 96684 | GR64, GR64, GR64, |
| 96685 | /* AESDEC128KL */ |
| 96686 | VR128, VR128, opaquemem, |
| 96687 | /* AESDEC256KL */ |
| 96688 | VR128, VR128, opaquemem, |
| 96689 | /* AESDECLASTrm */ |
| 96690 | VR128, VR128, i128mem, |
| 96691 | /* AESDECLASTrr */ |
| 96692 | VR128, VR128, VR128, |
| 96693 | /* AESDECWIDE128KL */ |
| 96694 | opaquemem, |
| 96695 | /* AESDECWIDE256KL */ |
| 96696 | opaquemem, |
| 96697 | /* AESDECrm */ |
| 96698 | VR128, VR128, i128mem, |
| 96699 | /* AESDECrr */ |
| 96700 | VR128, VR128, VR128, |
| 96701 | /* AESENC128KL */ |
| 96702 | VR128, VR128, opaquemem, |
| 96703 | /* AESENC256KL */ |
| 96704 | VR128, VR128, opaquemem, |
| 96705 | /* AESENCLASTrm */ |
| 96706 | VR128, VR128, i128mem, |
| 96707 | /* AESENCLASTrr */ |
| 96708 | VR128, VR128, VR128, |
| 96709 | /* AESENCWIDE128KL */ |
| 96710 | opaquemem, |
| 96711 | /* AESENCWIDE256KL */ |
| 96712 | opaquemem, |
| 96713 | /* AESENCrm */ |
| 96714 | VR128, VR128, i128mem, |
| 96715 | /* AESENCrr */ |
| 96716 | VR128, VR128, VR128, |
| 96717 | /* AESIMCrm */ |
| 96718 | VR128, i128mem, |
| 96719 | /* AESIMCrr */ |
| 96720 | VR128, VR128, |
| 96721 | /* AESKEYGENASSIST128rm */ |
| 96722 | VR128, i128mem, u8imm, |
| 96723 | /* AESKEYGENASSIST128rr */ |
| 96724 | VR128, VR128, u8imm, |
| 96725 | /* AND16i16 */ |
| 96726 | i16imm, |
| 96727 | /* AND16mi */ |
| 96728 | i16mem, i16imm, |
| 96729 | /* AND16mi8 */ |
| 96730 | i16mem, i16i8imm, |
| 96731 | /* AND16mi8_EVEX */ |
| 96732 | i16mem, i16i8imm, |
| 96733 | /* AND16mi8_ND */ |
| 96734 | GR16, i16mem, i16i8imm, |
| 96735 | /* AND16mi8_NF */ |
| 96736 | i16mem, i16i8imm, |
| 96737 | /* AND16mi8_NF_ND */ |
| 96738 | GR16, i16mem, i16i8imm, |
| 96739 | /* AND16mi_EVEX */ |
| 96740 | i16mem, i16imm, |
| 96741 | /* AND16mi_ND */ |
| 96742 | GR16, i16mem, i16imm, |
| 96743 | /* AND16mi_NF */ |
| 96744 | i16mem, i16imm, |
| 96745 | /* AND16mi_NF_ND */ |
| 96746 | GR16, i16mem, i16imm, |
| 96747 | /* AND16mr */ |
| 96748 | i16mem, GR16, |
| 96749 | /* AND16mr_EVEX */ |
| 96750 | i16mem, GR16, |
| 96751 | /* AND16mr_ND */ |
| 96752 | GR16, i16mem, GR16, |
| 96753 | /* AND16mr_NF */ |
| 96754 | i16mem, GR16, |
| 96755 | /* AND16mr_NF_ND */ |
| 96756 | GR16, i16mem, GR16, |
| 96757 | /* AND16ri */ |
| 96758 | GR16, GR16, i16imm, |
| 96759 | /* AND16ri8 */ |
| 96760 | GR16, GR16, i16i8imm, |
| 96761 | /* AND16ri8_EVEX */ |
| 96762 | GR16, GR16, i16i8imm, |
| 96763 | /* AND16ri8_ND */ |
| 96764 | GR16, GR16, i16i8imm, |
| 96765 | /* AND16ri8_NF */ |
| 96766 | GR16, GR16, i16i8imm, |
| 96767 | /* AND16ri8_NF_ND */ |
| 96768 | GR16, GR16, i16i8imm, |
| 96769 | /* AND16ri_EVEX */ |
| 96770 | GR16, GR16, i16imm, |
| 96771 | /* AND16ri_ND */ |
| 96772 | GR16, GR16, i16imm, |
| 96773 | /* AND16ri_NF */ |
| 96774 | GR16, GR16, i16imm, |
| 96775 | /* AND16ri_NF_ND */ |
| 96776 | GR16, GR16, i16imm, |
| 96777 | /* AND16rm */ |
| 96778 | GR16, GR16, i16mem, |
| 96779 | /* AND16rm_EVEX */ |
| 96780 | GR16, GR16, i16mem, |
| 96781 | /* AND16rm_ND */ |
| 96782 | GR16, GR16, i16mem, |
| 96783 | /* AND16rm_NF */ |
| 96784 | GR16, GR16, i16mem, |
| 96785 | /* AND16rm_NF_ND */ |
| 96786 | GR16, GR16, i16mem, |
| 96787 | /* AND16rr */ |
| 96788 | GR16, GR16, GR16, |
| 96789 | /* AND16rr_EVEX */ |
| 96790 | GR16, GR16, GR16, |
| 96791 | /* AND16rr_EVEX_REV */ |
| 96792 | GR16, GR16, GR16, |
| 96793 | /* AND16rr_ND */ |
| 96794 | GR16, GR16, GR16, |
| 96795 | /* AND16rr_ND_REV */ |
| 96796 | GR16, GR16, GR16, |
| 96797 | /* AND16rr_NF */ |
| 96798 | GR16, GR16, GR16, |
| 96799 | /* AND16rr_NF_ND */ |
| 96800 | GR16, GR16, GR16, |
| 96801 | /* AND16rr_NF_ND_REV */ |
| 96802 | GR16, GR16, GR16, |
| 96803 | /* AND16rr_NF_REV */ |
| 96804 | GR16, GR16, GR16, |
| 96805 | /* AND16rr_REV */ |
| 96806 | GR16, GR16, GR16, |
| 96807 | /* AND32i32 */ |
| 96808 | i32imm, |
| 96809 | /* AND32mi */ |
| 96810 | i32mem, i32imm, |
| 96811 | /* AND32mi8 */ |
| 96812 | i32mem, i32i8imm, |
| 96813 | /* AND32mi8_EVEX */ |
| 96814 | i32mem, i32i8imm, |
| 96815 | /* AND32mi8_ND */ |
| 96816 | GR32, i32mem, i32i8imm, |
| 96817 | /* AND32mi8_NF */ |
| 96818 | i32mem, i32i8imm, |
| 96819 | /* AND32mi8_NF_ND */ |
| 96820 | GR32, i32mem, i32i8imm, |
| 96821 | /* AND32mi_EVEX */ |
| 96822 | i32mem, i32imm, |
| 96823 | /* AND32mi_ND */ |
| 96824 | GR32, i32mem, i32imm, |
| 96825 | /* AND32mi_NF */ |
| 96826 | i32mem, i32imm, |
| 96827 | /* AND32mi_NF_ND */ |
| 96828 | GR32, i32mem, i32imm, |
| 96829 | /* AND32mr */ |
| 96830 | i32mem, GR32, |
| 96831 | /* AND32mr_EVEX */ |
| 96832 | i32mem, GR32, |
| 96833 | /* AND32mr_ND */ |
| 96834 | GR32, i32mem, GR32, |
| 96835 | /* AND32mr_NF */ |
| 96836 | i32mem, GR32, |
| 96837 | /* AND32mr_NF_ND */ |
| 96838 | GR32, i32mem, GR32, |
| 96839 | /* AND32ri */ |
| 96840 | GR32, GR32, i32imm, |
| 96841 | /* AND32ri8 */ |
| 96842 | GR32, GR32, i32i8imm, |
| 96843 | /* AND32ri8_EVEX */ |
| 96844 | GR32, GR32, i32i8imm, |
| 96845 | /* AND32ri8_ND */ |
| 96846 | GR32, GR32, i32i8imm, |
| 96847 | /* AND32ri8_NF */ |
| 96848 | GR32, GR32, i32i8imm, |
| 96849 | /* AND32ri8_NF_ND */ |
| 96850 | GR32, GR32, i32i8imm, |
| 96851 | /* AND32ri_EVEX */ |
| 96852 | GR32, GR32, i32imm, |
| 96853 | /* AND32ri_ND */ |
| 96854 | GR32, GR32, i32imm, |
| 96855 | /* AND32ri_NF */ |
| 96856 | GR32, GR32, i32imm, |
| 96857 | /* AND32ri_NF_ND */ |
| 96858 | GR32, GR32, i32imm, |
| 96859 | /* AND32rm */ |
| 96860 | GR32, GR32, i32mem, |
| 96861 | /* AND32rm_EVEX */ |
| 96862 | GR32, GR32, i32mem, |
| 96863 | /* AND32rm_ND */ |
| 96864 | GR32, GR32, i32mem, |
| 96865 | /* AND32rm_NF */ |
| 96866 | GR32, GR32, i32mem, |
| 96867 | /* AND32rm_NF_ND */ |
| 96868 | GR32, GR32, i32mem, |
| 96869 | /* AND32rr */ |
| 96870 | GR32, GR32, GR32, |
| 96871 | /* AND32rr_EVEX */ |
| 96872 | GR32, GR32, GR32, |
| 96873 | /* AND32rr_EVEX_REV */ |
| 96874 | GR32, GR32, GR32, |
| 96875 | /* AND32rr_ND */ |
| 96876 | GR32, GR32, GR32, |
| 96877 | /* AND32rr_ND_REV */ |
| 96878 | GR32, GR32, GR32, |
| 96879 | /* AND32rr_NF */ |
| 96880 | GR32, GR32, GR32, |
| 96881 | /* AND32rr_NF_ND */ |
| 96882 | GR32, GR32, GR32, |
| 96883 | /* AND32rr_NF_ND_REV */ |
| 96884 | GR32, GR32, GR32, |
| 96885 | /* AND32rr_NF_REV */ |
| 96886 | GR32, GR32, GR32, |
| 96887 | /* AND32rr_REV */ |
| 96888 | GR32, GR32, GR32, |
| 96889 | /* AND64i32 */ |
| 96890 | i64i32imm, |
| 96891 | /* AND64mi32 */ |
| 96892 | i64mem, i64i32imm, |
| 96893 | /* AND64mi32_EVEX */ |
| 96894 | i64mem, i64i32imm, |
| 96895 | /* AND64mi32_ND */ |
| 96896 | GR64, i64mem, i64i32imm, |
| 96897 | /* AND64mi32_NF */ |
| 96898 | i64mem, i64i32imm, |
| 96899 | /* AND64mi32_NF_ND */ |
| 96900 | GR64, i64mem, i64i32imm, |
| 96901 | /* AND64mi8 */ |
| 96902 | i64mem, i64i8imm, |
| 96903 | /* AND64mi8_EVEX */ |
| 96904 | i64mem, i64i8imm, |
| 96905 | /* AND64mi8_ND */ |
| 96906 | GR64, i64mem, i64i8imm, |
| 96907 | /* AND64mi8_NF */ |
| 96908 | i64mem, i64i8imm, |
| 96909 | /* AND64mi8_NF_ND */ |
| 96910 | GR64, i64mem, i64i8imm, |
| 96911 | /* AND64mr */ |
| 96912 | i64mem, GR64, |
| 96913 | /* AND64mr_EVEX */ |
| 96914 | i64mem, GR64, |
| 96915 | /* AND64mr_ND */ |
| 96916 | GR64, i64mem, GR64, |
| 96917 | /* AND64mr_NF */ |
| 96918 | i64mem, GR64, |
| 96919 | /* AND64mr_NF_ND */ |
| 96920 | GR64, i64mem, GR64, |
| 96921 | /* AND64ri32 */ |
| 96922 | GR64, GR64, i64i32imm, |
| 96923 | /* AND64ri32_EVEX */ |
| 96924 | GR64, GR64, i64i32imm, |
| 96925 | /* AND64ri32_ND */ |
| 96926 | GR64, GR64, i64i32imm, |
| 96927 | /* AND64ri32_NF */ |
| 96928 | GR64, GR64, i64i32imm, |
| 96929 | /* AND64ri32_NF_ND */ |
| 96930 | GR64, GR64, i64i32imm, |
| 96931 | /* AND64ri8 */ |
| 96932 | GR64, GR64, i64i8imm, |
| 96933 | /* AND64ri8_EVEX */ |
| 96934 | GR64, GR64, i64i8imm, |
| 96935 | /* AND64ri8_ND */ |
| 96936 | GR64, GR64, i64i8imm, |
| 96937 | /* AND64ri8_NF */ |
| 96938 | GR64, GR64, i64i8imm, |
| 96939 | /* AND64ri8_NF_ND */ |
| 96940 | GR64, GR64, i64i8imm, |
| 96941 | /* AND64rm */ |
| 96942 | GR64, GR64, i64mem, |
| 96943 | /* AND64rm_EVEX */ |
| 96944 | GR64, GR64, i64mem, |
| 96945 | /* AND64rm_ND */ |
| 96946 | GR64, GR64, i64mem, |
| 96947 | /* AND64rm_NF */ |
| 96948 | GR64, GR64, i64mem, |
| 96949 | /* AND64rm_NF_ND */ |
| 96950 | GR64, GR64, i64mem, |
| 96951 | /* AND64rr */ |
| 96952 | GR64, GR64, GR64, |
| 96953 | /* AND64rr_EVEX */ |
| 96954 | GR64, GR64, GR64, |
| 96955 | /* AND64rr_EVEX_REV */ |
| 96956 | GR64, GR64, GR64, |
| 96957 | /* AND64rr_ND */ |
| 96958 | GR64, GR64, GR64, |
| 96959 | /* AND64rr_ND_REV */ |
| 96960 | GR64, GR64, GR64, |
| 96961 | /* AND64rr_NF */ |
| 96962 | GR64, GR64, GR64, |
| 96963 | /* AND64rr_NF_ND */ |
| 96964 | GR64, GR64, GR64, |
| 96965 | /* AND64rr_NF_ND_REV */ |
| 96966 | GR64, GR64, GR64, |
| 96967 | /* AND64rr_NF_REV */ |
| 96968 | GR64, GR64, GR64, |
| 96969 | /* AND64rr_REV */ |
| 96970 | GR64, GR64, GR64, |
| 96971 | /* AND8i8 */ |
| 96972 | i8imm, |
| 96973 | /* AND8mi */ |
| 96974 | i8mem, i8imm, |
| 96975 | /* AND8mi8 */ |
| 96976 | i8mem, i8imm, |
| 96977 | /* AND8mi_EVEX */ |
| 96978 | i8mem, i8imm, |
| 96979 | /* AND8mi_ND */ |
| 96980 | GR8, i8mem, i8imm, |
| 96981 | /* AND8mi_NF */ |
| 96982 | i8mem, i8imm, |
| 96983 | /* AND8mi_NF_ND */ |
| 96984 | GR8, i8mem, i8imm, |
| 96985 | /* AND8mr */ |
| 96986 | i8mem, GR8, |
| 96987 | /* AND8mr_EVEX */ |
| 96988 | i8mem, GR8, |
| 96989 | /* AND8mr_ND */ |
| 96990 | GR8, i8mem, GR8, |
| 96991 | /* AND8mr_NF */ |
| 96992 | i8mem, GR8, |
| 96993 | /* AND8mr_NF_ND */ |
| 96994 | GR8, i8mem, GR8, |
| 96995 | /* AND8ri */ |
| 96996 | GR8, GR8, i8imm, |
| 96997 | /* AND8ri8 */ |
| 96998 | GR8, GR8, i8imm, |
| 96999 | /* AND8ri_EVEX */ |
| 97000 | GR8, GR8, i8imm, |
| 97001 | /* AND8ri_ND */ |
| 97002 | GR8, GR8, i8imm, |
| 97003 | /* AND8ri_NF */ |
| 97004 | GR8, GR8, i8imm, |
| 97005 | /* AND8ri_NF_ND */ |
| 97006 | GR8, GR8, i8imm, |
| 97007 | /* AND8rm */ |
| 97008 | GR8, GR8, i8mem, |
| 97009 | /* AND8rm_EVEX */ |
| 97010 | GR8, GR8, i8mem, |
| 97011 | /* AND8rm_ND */ |
| 97012 | GR8, GR8, i8mem, |
| 97013 | /* AND8rm_NF */ |
| 97014 | GR8, GR8, i8mem, |
| 97015 | /* AND8rm_NF_ND */ |
| 97016 | GR8, GR8, i8mem, |
| 97017 | /* AND8rr */ |
| 97018 | GR8, GR8, GR8, |
| 97019 | /* AND8rr_EVEX */ |
| 97020 | GR8, GR8, GR8, |
| 97021 | /* AND8rr_EVEX_REV */ |
| 97022 | GR8, GR8, GR8, |
| 97023 | /* AND8rr_ND */ |
| 97024 | GR8, GR8, GR8, |
| 97025 | /* AND8rr_ND_REV */ |
| 97026 | GR8, GR8, GR8, |
| 97027 | /* AND8rr_NF */ |
| 97028 | GR8, GR8, GR8, |
| 97029 | /* AND8rr_NF_ND */ |
| 97030 | GR8, GR8, GR8, |
| 97031 | /* AND8rr_NF_ND_REV */ |
| 97032 | GR8, GR8, GR8, |
| 97033 | /* AND8rr_NF_REV */ |
| 97034 | GR8, GR8, GR8, |
| 97035 | /* AND8rr_REV */ |
| 97036 | GR8, GR8, GR8, |
| 97037 | /* ANDN32rm */ |
| 97038 | GR32, GR32, i32mem, |
| 97039 | /* ANDN32rm_EVEX */ |
| 97040 | GR32, GR32, i32mem, |
| 97041 | /* ANDN32rm_NF */ |
| 97042 | GR32, GR32, i32mem, |
| 97043 | /* ANDN32rr */ |
| 97044 | GR32, GR32, GR32, |
| 97045 | /* ANDN32rr_EVEX */ |
| 97046 | GR32, GR32, GR32, |
| 97047 | /* ANDN32rr_NF */ |
| 97048 | GR32, GR32, GR32, |
| 97049 | /* ANDN64rm */ |
| 97050 | GR64, GR64, i64mem, |
| 97051 | /* ANDN64rm_EVEX */ |
| 97052 | GR64, GR64, i64mem, |
| 97053 | /* ANDN64rm_NF */ |
| 97054 | GR64, GR64, i64mem, |
| 97055 | /* ANDN64rr */ |
| 97056 | GR64, GR64, GR64, |
| 97057 | /* ANDN64rr_EVEX */ |
| 97058 | GR64, GR64, GR64, |
| 97059 | /* ANDN64rr_NF */ |
| 97060 | GR64, GR64, GR64, |
| 97061 | /* ANDNPDrm */ |
| 97062 | VR128, VR128, f128mem, |
| 97063 | /* ANDNPDrr */ |
| 97064 | VR128, VR128, VR128, |
| 97065 | /* ANDNPSrm */ |
| 97066 | VR128, VR128, f128mem, |
| 97067 | /* ANDNPSrr */ |
| 97068 | VR128, VR128, VR128, |
| 97069 | /* ANDPDrm */ |
| 97070 | VR128, VR128, f128mem, |
| 97071 | /* ANDPDrr */ |
| 97072 | VR128, VR128, VR128, |
| 97073 | /* ANDPSrm */ |
| 97074 | VR128, VR128, f128mem, |
| 97075 | /* ANDPSrr */ |
| 97076 | VR128, VR128, VR128, |
| 97077 | /* AOR32mr */ |
| 97078 | i32mem, GR32, |
| 97079 | /* AOR32mr_EVEX */ |
| 97080 | i32mem, GR32, |
| 97081 | /* AOR64mr */ |
| 97082 | i64mem, GR64, |
| 97083 | /* AOR64mr_EVEX */ |
| 97084 | i64mem, GR64, |
| 97085 | /* ARPL16mr */ |
| 97086 | i16mem, GR16, |
| 97087 | /* ARPL16rr */ |
| 97088 | GR16, GR16, |
| 97089 | /* ASAN_CHECK_MEMACCESS */ |
| 97090 | GR64PLTSafe, i32imm, |
| 97091 | /* AXOR32mr */ |
| 97092 | i32mem, GR32, |
| 97093 | /* AXOR32mr_EVEX */ |
| 97094 | i32mem, GR32, |
| 97095 | /* AXOR64mr */ |
| 97096 | i64mem, GR64, |
| 97097 | /* AXOR64mr_EVEX */ |
| 97098 | i64mem, GR64, |
| 97099 | /* BEXTR32rm */ |
| 97100 | GR32, i32mem, GR32, |
| 97101 | /* BEXTR32rm_EVEX */ |
| 97102 | GR32, i32mem, GR32, |
| 97103 | /* BEXTR32rm_NF */ |
| 97104 | GR32, i32mem, GR32, |
| 97105 | /* BEXTR32rr */ |
| 97106 | GR32, GR32, GR32, |
| 97107 | /* BEXTR32rr_EVEX */ |
| 97108 | GR32, GR32, GR32, |
| 97109 | /* BEXTR32rr_NF */ |
| 97110 | GR32, GR32, GR32, |
| 97111 | /* BEXTR64rm */ |
| 97112 | GR64, i64mem, GR64, |
| 97113 | /* BEXTR64rm_EVEX */ |
| 97114 | GR64, i64mem, GR64, |
| 97115 | /* BEXTR64rm_NF */ |
| 97116 | GR64, i64mem, GR64, |
| 97117 | /* BEXTR64rr */ |
| 97118 | GR64, GR64, GR64, |
| 97119 | /* BEXTR64rr_EVEX */ |
| 97120 | GR64, GR64, GR64, |
| 97121 | /* BEXTR64rr_NF */ |
| 97122 | GR64, GR64, GR64, |
| 97123 | /* BEXTRI32mi */ |
| 97124 | GR32, i32mem, i32imm, |
| 97125 | /* BEXTRI32ri */ |
| 97126 | GR32, GR32, i32imm, |
| 97127 | /* BEXTRI64mi */ |
| 97128 | GR64, i64mem, i64i32imm, |
| 97129 | /* BEXTRI64ri */ |
| 97130 | GR64, GR64, i64i32imm, |
| 97131 | /* BLCFILL32rm */ |
| 97132 | GR32, i32mem, |
| 97133 | /* BLCFILL32rr */ |
| 97134 | GR32, GR32, |
| 97135 | /* BLCFILL64rm */ |
| 97136 | GR64, i64mem, |
| 97137 | /* BLCFILL64rr */ |
| 97138 | GR64, GR64, |
| 97139 | /* BLCI32rm */ |
| 97140 | GR32, i32mem, |
| 97141 | /* BLCI32rr */ |
| 97142 | GR32, GR32, |
| 97143 | /* BLCI64rm */ |
| 97144 | GR64, i64mem, |
| 97145 | /* BLCI64rr */ |
| 97146 | GR64, GR64, |
| 97147 | /* BLCIC32rm */ |
| 97148 | GR32, i32mem, |
| 97149 | /* BLCIC32rr */ |
| 97150 | GR32, GR32, |
| 97151 | /* BLCIC64rm */ |
| 97152 | GR64, i64mem, |
| 97153 | /* BLCIC64rr */ |
| 97154 | GR64, GR64, |
| 97155 | /* BLCMSK32rm */ |
| 97156 | GR32, i32mem, |
| 97157 | /* BLCMSK32rr */ |
| 97158 | GR32, GR32, |
| 97159 | /* BLCMSK64rm */ |
| 97160 | GR64, i64mem, |
| 97161 | /* BLCMSK64rr */ |
| 97162 | GR64, GR64, |
| 97163 | /* BLCS32rm */ |
| 97164 | GR32, i32mem, |
| 97165 | /* BLCS32rr */ |
| 97166 | GR32, GR32, |
| 97167 | /* BLCS64rm */ |
| 97168 | GR64, i64mem, |
| 97169 | /* BLCS64rr */ |
| 97170 | GR64, GR64, |
| 97171 | /* BLENDPDrmi */ |
| 97172 | VR128, VR128, f128mem, u8imm, |
| 97173 | /* BLENDPDrri */ |
| 97174 | VR128, VR128, VR128, u8imm, |
| 97175 | /* BLENDPSrmi */ |
| 97176 | VR128, VR128, f128mem, u8imm, |
| 97177 | /* BLENDPSrri */ |
| 97178 | VR128, VR128, VR128, u8imm, |
| 97179 | /* BLENDVPDrm0 */ |
| 97180 | VR128, VR128, f128mem, |
| 97181 | /* BLENDVPDrr0 */ |
| 97182 | VR128, VR128, VR128, |
| 97183 | /* BLENDVPSrm0 */ |
| 97184 | VR128, VR128, f128mem, |
| 97185 | /* BLENDVPSrr0 */ |
| 97186 | VR128, VR128, VR128, |
| 97187 | /* BLSFILL32rm */ |
| 97188 | GR32, i32mem, |
| 97189 | /* BLSFILL32rr */ |
| 97190 | GR32, GR32, |
| 97191 | /* BLSFILL64rm */ |
| 97192 | GR64, i64mem, |
| 97193 | /* BLSFILL64rr */ |
| 97194 | GR64, GR64, |
| 97195 | /* BLSI32rm */ |
| 97196 | GR32, i32mem, |
| 97197 | /* BLSI32rm_EVEX */ |
| 97198 | GR32, i32mem, |
| 97199 | /* BLSI32rm_NF */ |
| 97200 | GR32, i32mem, |
| 97201 | /* BLSI32rr */ |
| 97202 | GR32, GR32, |
| 97203 | /* BLSI32rr_EVEX */ |
| 97204 | GR32, GR32, |
| 97205 | /* BLSI32rr_NF */ |
| 97206 | GR32, GR32, |
| 97207 | /* BLSI64rm */ |
| 97208 | GR64, i64mem, |
| 97209 | /* BLSI64rm_EVEX */ |
| 97210 | GR64, i64mem, |
| 97211 | /* BLSI64rm_NF */ |
| 97212 | GR64, i64mem, |
| 97213 | /* BLSI64rr */ |
| 97214 | GR64, GR64, |
| 97215 | /* BLSI64rr_EVEX */ |
| 97216 | GR64, GR64, |
| 97217 | /* BLSI64rr_NF */ |
| 97218 | GR64, GR64, |
| 97219 | /* BLSIC32rm */ |
| 97220 | GR32, i32mem, |
| 97221 | /* BLSIC32rr */ |
| 97222 | GR32, GR32, |
| 97223 | /* BLSIC64rm */ |
| 97224 | GR64, i64mem, |
| 97225 | /* BLSIC64rr */ |
| 97226 | GR64, GR64, |
| 97227 | /* BLSMSK32rm */ |
| 97228 | GR32, i32mem, |
| 97229 | /* BLSMSK32rm_EVEX */ |
| 97230 | GR32, i32mem, |
| 97231 | /* BLSMSK32rm_NF */ |
| 97232 | GR32, i32mem, |
| 97233 | /* BLSMSK32rr */ |
| 97234 | GR32, GR32, |
| 97235 | /* BLSMSK32rr_EVEX */ |
| 97236 | GR32, GR32, |
| 97237 | /* BLSMSK32rr_NF */ |
| 97238 | GR32, GR32, |
| 97239 | /* BLSMSK64rm */ |
| 97240 | GR64, i64mem, |
| 97241 | /* BLSMSK64rm_EVEX */ |
| 97242 | GR64, i64mem, |
| 97243 | /* BLSMSK64rm_NF */ |
| 97244 | GR64, i64mem, |
| 97245 | /* BLSMSK64rr */ |
| 97246 | GR64, GR64, |
| 97247 | /* BLSMSK64rr_EVEX */ |
| 97248 | GR64, GR64, |
| 97249 | /* BLSMSK64rr_NF */ |
| 97250 | GR64, GR64, |
| 97251 | /* BLSR32rm */ |
| 97252 | GR32, i32mem, |
| 97253 | /* BLSR32rm_EVEX */ |
| 97254 | GR32, i32mem, |
| 97255 | /* BLSR32rm_NF */ |
| 97256 | GR32, i32mem, |
| 97257 | /* BLSR32rr */ |
| 97258 | GR32, GR32, |
| 97259 | /* BLSR32rr_EVEX */ |
| 97260 | GR32, GR32, |
| 97261 | /* BLSR32rr_NF */ |
| 97262 | GR32, GR32, |
| 97263 | /* BLSR64rm */ |
| 97264 | GR64, i64mem, |
| 97265 | /* BLSR64rm_EVEX */ |
| 97266 | GR64, i64mem, |
| 97267 | /* BLSR64rm_NF */ |
| 97268 | GR64, i64mem, |
| 97269 | /* BLSR64rr */ |
| 97270 | GR64, GR64, |
| 97271 | /* BLSR64rr_EVEX */ |
| 97272 | GR64, GR64, |
| 97273 | /* BLSR64rr_NF */ |
| 97274 | GR64, GR64, |
| 97275 | /* BOUNDS16rm */ |
| 97276 | GR16, i16mem, |
| 97277 | /* BOUNDS32rm */ |
| 97278 | GR32, i32mem, |
| 97279 | /* BSF16rm */ |
| 97280 | GR16, GR16, i16mem, |
| 97281 | /* BSF16rr */ |
| 97282 | GR16, GR16, GR16, |
| 97283 | /* BSF32rm */ |
| 97284 | GR32, GR32, i32mem, |
| 97285 | /* BSF32rr */ |
| 97286 | GR32, GR32, GR32, |
| 97287 | /* BSF64rm */ |
| 97288 | GR64, GR64, i64mem, |
| 97289 | /* BSF64rr */ |
| 97290 | GR64, GR64, GR64, |
| 97291 | /* BSR16rm */ |
| 97292 | GR16, GR16, i16mem, |
| 97293 | /* BSR16rr */ |
| 97294 | GR16, GR16, GR16, |
| 97295 | /* BSR32rm */ |
| 97296 | GR32, GR32, i32mem, |
| 97297 | /* BSR32rr */ |
| 97298 | GR32, GR32, GR32, |
| 97299 | /* BSR64rm */ |
| 97300 | GR64, GR64, i64mem, |
| 97301 | /* BSR64rr */ |
| 97302 | GR64, GR64, GR64, |
| 97303 | /* BSWAP16r_BAD */ |
| 97304 | GR16, GR16, |
| 97305 | /* BSWAP32r */ |
| 97306 | GR32, GR32, |
| 97307 | /* BSWAP64r */ |
| 97308 | GR64, GR64, |
| 97309 | /* BT16mi8 */ |
| 97310 | i16mem, i16u8imm, |
| 97311 | /* BT16mr */ |
| 97312 | i16mem, GR16, |
| 97313 | /* BT16ri8 */ |
| 97314 | GR16, i16u8imm, |
| 97315 | /* BT16rr */ |
| 97316 | GR16, GR16, |
| 97317 | /* BT32mi8 */ |
| 97318 | i32mem, i32u8imm, |
| 97319 | /* BT32mr */ |
| 97320 | i32mem, GR32, |
| 97321 | /* BT32ri8 */ |
| 97322 | GR32, i32u8imm, |
| 97323 | /* BT32rr */ |
| 97324 | GR32, GR32, |
| 97325 | /* BT64mi8 */ |
| 97326 | i64mem, i64u8imm, |
| 97327 | /* BT64mr */ |
| 97328 | i64mem, GR64, |
| 97329 | /* BT64ri8 */ |
| 97330 | GR64, i64u8imm, |
| 97331 | /* BT64rr */ |
| 97332 | GR64, GR64, |
| 97333 | /* BTC16mi8 */ |
| 97334 | i16mem, i16u8imm, |
| 97335 | /* BTC16mr */ |
| 97336 | i16mem, GR16, |
| 97337 | /* BTC16ri8 */ |
| 97338 | GR16, GR16, i16u8imm, |
| 97339 | /* BTC16rr */ |
| 97340 | GR16, GR16, GR16, |
| 97341 | /* BTC32mi8 */ |
| 97342 | i32mem, i32u8imm, |
| 97343 | /* BTC32mr */ |
| 97344 | i32mem, GR32, |
| 97345 | /* BTC32ri8 */ |
| 97346 | GR32, GR32, i32u8imm, |
| 97347 | /* BTC32rr */ |
| 97348 | GR32, GR32, GR32, |
| 97349 | /* BTC64mi8 */ |
| 97350 | i64mem, i64u8imm, |
| 97351 | /* BTC64mr */ |
| 97352 | i64mem, GR64, |
| 97353 | /* BTC64ri8 */ |
| 97354 | GR64, GR64, i64u8imm, |
| 97355 | /* BTC64rr */ |
| 97356 | GR64, GR64, GR64, |
| 97357 | /* BTR16mi8 */ |
| 97358 | i16mem, i16u8imm, |
| 97359 | /* BTR16mr */ |
| 97360 | i16mem, GR16, |
| 97361 | /* BTR16ri8 */ |
| 97362 | GR16, GR16, i16u8imm, |
| 97363 | /* BTR16rr */ |
| 97364 | GR16, GR16, GR16, |
| 97365 | /* BTR32mi8 */ |
| 97366 | i32mem, i32u8imm, |
| 97367 | /* BTR32mr */ |
| 97368 | i32mem, GR32, |
| 97369 | /* BTR32ri8 */ |
| 97370 | GR32, GR32, i32u8imm, |
| 97371 | /* BTR32rr */ |
| 97372 | GR32, GR32, GR32, |
| 97373 | /* BTR64mi8 */ |
| 97374 | i64mem, i64u8imm, |
| 97375 | /* BTR64mr */ |
| 97376 | i64mem, GR64, |
| 97377 | /* BTR64ri8 */ |
| 97378 | GR64, GR64, i64u8imm, |
| 97379 | /* BTR64rr */ |
| 97380 | GR64, GR64, GR64, |
| 97381 | /* BTS16mi8 */ |
| 97382 | i16mem, i16u8imm, |
| 97383 | /* BTS16mr */ |
| 97384 | i16mem, GR16, |
| 97385 | /* BTS16ri8 */ |
| 97386 | GR16, GR16, i16u8imm, |
| 97387 | /* BTS16rr */ |
| 97388 | GR16, GR16, GR16, |
| 97389 | /* BTS32mi8 */ |
| 97390 | i32mem, i32u8imm, |
| 97391 | /* BTS32mr */ |
| 97392 | i32mem, GR32, |
| 97393 | /* BTS32ri8 */ |
| 97394 | GR32, GR32, i32u8imm, |
| 97395 | /* BTS32rr */ |
| 97396 | GR32, GR32, GR32, |
| 97397 | /* BTS64mi8 */ |
| 97398 | i64mem, i64u8imm, |
| 97399 | /* BTS64mr */ |
| 97400 | i64mem, GR64, |
| 97401 | /* BTS64ri8 */ |
| 97402 | GR64, GR64, i64u8imm, |
| 97403 | /* BTS64rr */ |
| 97404 | GR64, GR64, GR64, |
| 97405 | /* BZHI32rm */ |
| 97406 | GR32, i32mem, GR32, |
| 97407 | /* BZHI32rm_EVEX */ |
| 97408 | GR32, i32mem, GR32, |
| 97409 | /* BZHI32rm_NF */ |
| 97410 | GR32, i32mem, GR32, |
| 97411 | /* BZHI32rr */ |
| 97412 | GR32, GR32, GR32, |
| 97413 | /* BZHI32rr_EVEX */ |
| 97414 | GR32, GR32, GR32, |
| 97415 | /* BZHI32rr_NF */ |
| 97416 | GR32, GR32, GR32, |
| 97417 | /* BZHI64rm */ |
| 97418 | GR64, i64mem, GR64, |
| 97419 | /* BZHI64rm_EVEX */ |
| 97420 | GR64, i64mem, GR64, |
| 97421 | /* BZHI64rm_NF */ |
| 97422 | GR64, i64mem, GR64, |
| 97423 | /* BZHI64rr */ |
| 97424 | GR64, GR64, GR64, |
| 97425 | /* BZHI64rr_EVEX */ |
| 97426 | GR64, GR64, GR64, |
| 97427 | /* BZHI64rr_NF */ |
| 97428 | GR64, GR64, GR64, |
| 97429 | /* CALL16m */ |
| 97430 | i16mem, |
| 97431 | /* CALL16m_NT */ |
| 97432 | i16mem, |
| 97433 | /* CALL16r */ |
| 97434 | GR16, |
| 97435 | /* CALL16r_NT */ |
| 97436 | GR16, |
| 97437 | /* CALL32m */ |
| 97438 | i32mem, |
| 97439 | /* CALL32m_NT */ |
| 97440 | i32mem, |
| 97441 | /* CALL32r */ |
| 97442 | GR32, |
| 97443 | /* CALL32r_NT */ |
| 97444 | GR32, |
| 97445 | /* CALL64m */ |
| 97446 | i64mem, |
| 97447 | /* CALL64m_NT */ |
| 97448 | i64mem, |
| 97449 | /* CALL64pcrel32 */ |
| 97450 | i64i32imm_brtarget, |
| 97451 | /* CALL64r */ |
| 97452 | GR64, |
| 97453 | /* CALL64r_NT */ |
| 97454 | GR64, |
| 97455 | /* CALLpcrel16 */ |
| 97456 | i16imm_brtarget, |
| 97457 | /* CALLpcrel32 */ |
| 97458 | i32imm_brtarget, |
| 97459 | /* CATCHRET */ |
| 97460 | brtarget32, brtarget32, |
| 97461 | /* CBW */ |
| 97462 | /* CCMP16mi */ |
| 97463 | i16mem, i16imm, cflags, ccode, |
| 97464 | /* CCMP16mi8 */ |
| 97465 | i16mem, i16i8imm, cflags, ccode, |
| 97466 | /* CCMP16mr */ |
| 97467 | i16mem, GR16, cflags, ccode, |
| 97468 | /* CCMP16ri */ |
| 97469 | GR16, i16imm, cflags, ccode, |
| 97470 | /* CCMP16ri8 */ |
| 97471 | GR16, i16i8imm, cflags, ccode, |
| 97472 | /* CCMP16rm */ |
| 97473 | GR16, i16mem, cflags, ccode, |
| 97474 | /* CCMP16rr */ |
| 97475 | GR16, GR16, cflags, ccode, |
| 97476 | /* CCMP16rr_REV */ |
| 97477 | GR16, GR16, cflags, ccode, |
| 97478 | /* CCMP32mi */ |
| 97479 | i32mem, i32imm, cflags, ccode, |
| 97480 | /* CCMP32mi8 */ |
| 97481 | i32mem, i32i8imm, cflags, ccode, |
| 97482 | /* CCMP32mr */ |
| 97483 | i32mem, GR32, cflags, ccode, |
| 97484 | /* CCMP32ri */ |
| 97485 | GR32, i32imm, cflags, ccode, |
| 97486 | /* CCMP32ri8 */ |
| 97487 | GR32, i32i8imm, cflags, ccode, |
| 97488 | /* CCMP32rm */ |
| 97489 | GR32, i32mem, cflags, ccode, |
| 97490 | /* CCMP32rr */ |
| 97491 | GR32, GR32, cflags, ccode, |
| 97492 | /* CCMP32rr_REV */ |
| 97493 | GR32, GR32, cflags, ccode, |
| 97494 | /* CCMP64mi32 */ |
| 97495 | i64mem, i64i32imm, cflags, ccode, |
| 97496 | /* CCMP64mi8 */ |
| 97497 | i64mem, i64i8imm, cflags, ccode, |
| 97498 | /* CCMP64mr */ |
| 97499 | i64mem, GR64, cflags, ccode, |
| 97500 | /* CCMP64ri32 */ |
| 97501 | GR64, i64i32imm, cflags, ccode, |
| 97502 | /* CCMP64ri8 */ |
| 97503 | GR64, i64i8imm, cflags, ccode, |
| 97504 | /* CCMP64rm */ |
| 97505 | GR64, i64mem, cflags, ccode, |
| 97506 | /* CCMP64rr */ |
| 97507 | GR64, GR64, cflags, ccode, |
| 97508 | /* CCMP64rr_REV */ |
| 97509 | GR64, GR64, cflags, ccode, |
| 97510 | /* CCMP8mi */ |
| 97511 | i8mem, i8imm, cflags, ccode, |
| 97512 | /* CCMP8mr */ |
| 97513 | i8mem, GR8, cflags, ccode, |
| 97514 | /* CCMP8ri */ |
| 97515 | GR8, i8imm, cflags, ccode, |
| 97516 | /* CCMP8rm */ |
| 97517 | GR8, i8mem, cflags, ccode, |
| 97518 | /* CCMP8rr */ |
| 97519 | GR8, GR8, cflags, ccode, |
| 97520 | /* CCMP8rr_REV */ |
| 97521 | GR8, GR8, cflags, ccode, |
| 97522 | /* CDQ */ |
| 97523 | /* CDQE */ |
| 97524 | /* CFCMOV16mr */ |
| 97525 | i16mem, GR16, ccode, |
| 97526 | /* CFCMOV16rm */ |
| 97527 | GR16, i16mem, ccode, |
| 97528 | /* CFCMOV16rm_ND */ |
| 97529 | GR16, GR16, i16mem, ccode, |
| 97530 | /* CFCMOV16rr */ |
| 97531 | GR16, GR16, ccode, |
| 97532 | /* CFCMOV16rr_ND */ |
| 97533 | GR16, GR16, GR16, ccode, |
| 97534 | /* CFCMOV16rr_REV */ |
| 97535 | GR16, GR16, ccode, |
| 97536 | /* CFCMOV32mr */ |
| 97537 | i32mem, GR32, ccode, |
| 97538 | /* CFCMOV32rm */ |
| 97539 | GR32, i32mem, ccode, |
| 97540 | /* CFCMOV32rm_ND */ |
| 97541 | GR32, GR32, i32mem, ccode, |
| 97542 | /* CFCMOV32rr */ |
| 97543 | GR32, GR32, ccode, |
| 97544 | /* CFCMOV32rr_ND */ |
| 97545 | GR32, GR32, GR32, ccode, |
| 97546 | /* CFCMOV32rr_REV */ |
| 97547 | GR32, GR32, ccode, |
| 97548 | /* CFCMOV64mr */ |
| 97549 | i64mem, GR64, ccode, |
| 97550 | /* CFCMOV64rm */ |
| 97551 | GR64, i64mem, ccode, |
| 97552 | /* CFCMOV64rm_ND */ |
| 97553 | GR64, GR64, i64mem, ccode, |
| 97554 | /* CFCMOV64rr */ |
| 97555 | GR64, GR64, ccode, |
| 97556 | /* CFCMOV64rr_ND */ |
| 97557 | GR64, GR64, GR64, ccode, |
| 97558 | /* CFCMOV64rr_REV */ |
| 97559 | GR64, GR64, ccode, |
| 97560 | /* CHS_F */ |
| 97561 | /* CHS_Fp32 */ |
| 97562 | RFP32, RFP32, |
| 97563 | /* CHS_Fp64 */ |
| 97564 | RFP64, RFP64, |
| 97565 | /* CHS_Fp80 */ |
| 97566 | RFP80, RFP80, |
| 97567 | /* CLAC */ |
| 97568 | /* CLC */ |
| 97569 | /* CLD */ |
| 97570 | /* CLDEMOTE */ |
| 97571 | i8mem, |
| 97572 | /* CLEANUPRET */ |
| 97573 | /* CLFLUSH */ |
| 97574 | i8mem, |
| 97575 | /* CLFLUSHOPT */ |
| 97576 | i8mem, |
| 97577 | /* CLGI */ |
| 97578 | /* CLI */ |
| 97579 | /* CLRSSBSY */ |
| 97580 | i32mem, |
| 97581 | /* CLTS */ |
| 97582 | /* CLUI */ |
| 97583 | /* CLWB */ |
| 97584 | i8mem, |
| 97585 | /* CLZERO32r */ |
| 97586 | /* CLZERO64r */ |
| 97587 | /* CMC */ |
| 97588 | /* CMOV16rm */ |
| 97589 | GR16, GR16, i16mem, ccode, |
| 97590 | /* CMOV16rm_ND */ |
| 97591 | GR16, GR16, i16mem, ccode, |
| 97592 | /* CMOV16rr */ |
| 97593 | GR16, GR16, GR16, ccode, |
| 97594 | /* CMOV16rr_ND */ |
| 97595 | GR16, GR16, GR16, ccode, |
| 97596 | /* CMOV32rm */ |
| 97597 | GR32, GR32, i32mem, ccode, |
| 97598 | /* CMOV32rm_ND */ |
| 97599 | GR32, GR32, i32mem, ccode, |
| 97600 | /* CMOV32rr */ |
| 97601 | GR32, GR32, GR32, ccode, |
| 97602 | /* CMOV32rr_ND */ |
| 97603 | GR32, GR32, GR32, ccode, |
| 97604 | /* CMOV64rm */ |
| 97605 | GR64, GR64, i64mem, ccode, |
| 97606 | /* CMOV64rm_ND */ |
| 97607 | GR64, GR64, i64mem, ccode, |
| 97608 | /* CMOV64rr */ |
| 97609 | GR64, GR64, GR64, ccode, |
| 97610 | /* CMOV64rr_ND */ |
| 97611 | GR64, GR64, GR64, ccode, |
| 97612 | /* CMOVBE_F */ |
| 97613 | RSTi, |
| 97614 | /* CMOVBE_Fp32 */ |
| 97615 | RFP32, RFP32, RFP32, |
| 97616 | /* CMOVBE_Fp64 */ |
| 97617 | RFP64, RFP64, RFP64, |
| 97618 | /* CMOVBE_Fp80 */ |
| 97619 | RFP80, RFP80, RFP80, |
| 97620 | /* CMOVB_F */ |
| 97621 | RSTi, |
| 97622 | /* CMOVB_Fp32 */ |
| 97623 | RFP32, RFP32, RFP32, |
| 97624 | /* CMOVB_Fp64 */ |
| 97625 | RFP64, RFP64, RFP64, |
| 97626 | /* CMOVB_Fp80 */ |
| 97627 | RFP80, RFP80, RFP80, |
| 97628 | /* CMOVE_F */ |
| 97629 | RSTi, |
| 97630 | /* CMOVE_Fp32 */ |
| 97631 | RFP32, RFP32, RFP32, |
| 97632 | /* CMOVE_Fp64 */ |
| 97633 | RFP64, RFP64, RFP64, |
| 97634 | /* CMOVE_Fp80 */ |
| 97635 | RFP80, RFP80, RFP80, |
| 97636 | /* CMOVNBE_F */ |
| 97637 | RSTi, |
| 97638 | /* CMOVNBE_Fp32 */ |
| 97639 | RFP32, RFP32, RFP32, |
| 97640 | /* CMOVNBE_Fp64 */ |
| 97641 | RFP64, RFP64, RFP64, |
| 97642 | /* CMOVNBE_Fp80 */ |
| 97643 | RFP80, RFP80, RFP80, |
| 97644 | /* CMOVNB_F */ |
| 97645 | RSTi, |
| 97646 | /* CMOVNB_Fp32 */ |
| 97647 | RFP32, RFP32, RFP32, |
| 97648 | /* CMOVNB_Fp64 */ |
| 97649 | RFP64, RFP64, RFP64, |
| 97650 | /* CMOVNB_Fp80 */ |
| 97651 | RFP80, RFP80, RFP80, |
| 97652 | /* CMOVNE_F */ |
| 97653 | RSTi, |
| 97654 | /* CMOVNE_Fp32 */ |
| 97655 | RFP32, RFP32, RFP32, |
| 97656 | /* CMOVNE_Fp64 */ |
| 97657 | RFP64, RFP64, RFP64, |
| 97658 | /* CMOVNE_Fp80 */ |
| 97659 | RFP80, RFP80, RFP80, |
| 97660 | /* CMOVNP_F */ |
| 97661 | RSTi, |
| 97662 | /* CMOVNP_Fp32 */ |
| 97663 | RFP32, RFP32, RFP32, |
| 97664 | /* CMOVNP_Fp64 */ |
| 97665 | RFP64, RFP64, RFP64, |
| 97666 | /* CMOVNP_Fp80 */ |
| 97667 | RFP80, RFP80, RFP80, |
| 97668 | /* CMOVP_F */ |
| 97669 | RSTi, |
| 97670 | /* CMOVP_Fp32 */ |
| 97671 | RFP32, RFP32, RFP32, |
| 97672 | /* CMOVP_Fp64 */ |
| 97673 | RFP64, RFP64, RFP64, |
| 97674 | /* CMOVP_Fp80 */ |
| 97675 | RFP80, RFP80, RFP80, |
| 97676 | /* CMOV_FR16 */ |
| 97677 | FR16, FR16, FR16, i8imm, |
| 97678 | /* CMOV_FR16X */ |
| 97679 | FR16X, FR16X, FR16X, i8imm, |
| 97680 | /* CMOV_FR32 */ |
| 97681 | FR32, FR32, FR32, i8imm, |
| 97682 | /* CMOV_FR32X */ |
| 97683 | FR32X, FR32X, FR32X, i8imm, |
| 97684 | /* CMOV_FR64 */ |
| 97685 | FR64, FR64, FR64, i8imm, |
| 97686 | /* CMOV_FR64X */ |
| 97687 | FR64X, FR64X, FR64X, i8imm, |
| 97688 | /* CMOV_GR16 */ |
| 97689 | GR16, GR16, GR16, i8imm, |
| 97690 | /* CMOV_GR32 */ |
| 97691 | GR32, GR32, GR32, i8imm, |
| 97692 | /* CMOV_GR8 */ |
| 97693 | GR8, GR8, GR8, i8imm, |
| 97694 | /* CMOV_RFP32 */ |
| 97695 | RFP32, RFP32, RFP32, i8imm, |
| 97696 | /* CMOV_RFP64 */ |
| 97697 | RFP64, RFP64, RFP64, i8imm, |
| 97698 | /* CMOV_RFP80 */ |
| 97699 | RFP80, RFP80, RFP80, i8imm, |
| 97700 | /* CMOV_VK1 */ |
| 97701 | VK1, VK1, VK1, i8imm, |
| 97702 | /* CMOV_VK16 */ |
| 97703 | VK16, VK16, VK16, i8imm, |
| 97704 | /* CMOV_VK2 */ |
| 97705 | VK2, VK2, VK2, i8imm, |
| 97706 | /* CMOV_VK32 */ |
| 97707 | VK32, VK32, VK32, i8imm, |
| 97708 | /* CMOV_VK4 */ |
| 97709 | VK4, VK4, VK4, i8imm, |
| 97710 | /* CMOV_VK64 */ |
| 97711 | VK64, VK64, VK64, i8imm, |
| 97712 | /* CMOV_VK8 */ |
| 97713 | VK8, VK8, VK8, i8imm, |
| 97714 | /* CMOV_VR128 */ |
| 97715 | VR128, VR128, VR128, i8imm, |
| 97716 | /* CMOV_VR128X */ |
| 97717 | VR128X, VR128X, VR128X, i8imm, |
| 97718 | /* CMOV_VR256 */ |
| 97719 | VR256, VR256, VR256, i8imm, |
| 97720 | /* CMOV_VR256X */ |
| 97721 | VR256X, VR256X, VR256X, i8imm, |
| 97722 | /* CMOV_VR512 */ |
| 97723 | VR512, VR512, VR512, i8imm, |
| 97724 | /* CMOV_VR64 */ |
| 97725 | VR64, VR64, VR64, i8imm, |
| 97726 | /* CMP16i16 */ |
| 97727 | i16imm, |
| 97728 | /* CMP16mi */ |
| 97729 | i16mem, i16imm, |
| 97730 | /* CMP16mi8 */ |
| 97731 | i16mem, i16i8imm, |
| 97732 | /* CMP16mr */ |
| 97733 | i16mem, GR16, |
| 97734 | /* CMP16ri */ |
| 97735 | GR16, i16imm, |
| 97736 | /* CMP16ri8 */ |
| 97737 | GR16, i16i8imm, |
| 97738 | /* CMP16rm */ |
| 97739 | GR16, i16mem, |
| 97740 | /* CMP16rr */ |
| 97741 | GR16, GR16, |
| 97742 | /* CMP16rr_REV */ |
| 97743 | GR16, GR16, |
| 97744 | /* CMP32i32 */ |
| 97745 | i32imm, |
| 97746 | /* CMP32mi */ |
| 97747 | i32mem, i32imm, |
| 97748 | /* CMP32mi8 */ |
| 97749 | i32mem, i32i8imm, |
| 97750 | /* CMP32mr */ |
| 97751 | i32mem, GR32, |
| 97752 | /* CMP32ri */ |
| 97753 | GR32, i32imm, |
| 97754 | /* CMP32ri8 */ |
| 97755 | GR32, i32i8imm, |
| 97756 | /* CMP32rm */ |
| 97757 | GR32, i32mem, |
| 97758 | /* CMP32rr */ |
| 97759 | GR32, GR32, |
| 97760 | /* CMP32rr_REV */ |
| 97761 | GR32, GR32, |
| 97762 | /* CMP64i32 */ |
| 97763 | i64i32imm, |
| 97764 | /* CMP64mi32 */ |
| 97765 | i64mem, i64i32imm, |
| 97766 | /* CMP64mi8 */ |
| 97767 | i64mem, i64i8imm, |
| 97768 | /* CMP64mr */ |
| 97769 | i64mem, GR64, |
| 97770 | /* CMP64ri32 */ |
| 97771 | GR64, i64i32imm, |
| 97772 | /* CMP64ri8 */ |
| 97773 | GR64, i64i8imm, |
| 97774 | /* CMP64rm */ |
| 97775 | GR64, i64mem, |
| 97776 | /* CMP64rr */ |
| 97777 | GR64, GR64, |
| 97778 | /* CMP64rr_REV */ |
| 97779 | GR64, GR64, |
| 97780 | /* CMP8i8 */ |
| 97781 | i8imm, |
| 97782 | /* CMP8mi */ |
| 97783 | i8mem, i8imm, |
| 97784 | /* CMP8mi8 */ |
| 97785 | i8mem, i8imm, |
| 97786 | /* CMP8mr */ |
| 97787 | i8mem, GR8, |
| 97788 | /* CMP8ri */ |
| 97789 | GR8, i8imm, |
| 97790 | /* CMP8ri8 */ |
| 97791 | GR8, i8imm, |
| 97792 | /* CMP8rm */ |
| 97793 | GR8, i8mem, |
| 97794 | /* CMP8rr */ |
| 97795 | GR8, GR8, |
| 97796 | /* CMP8rr_REV */ |
| 97797 | GR8, GR8, |
| 97798 | /* CMPCCXADDmr32 */ |
| 97799 | GR32, GR32, i32mem, GR32, ccode, |
| 97800 | /* CMPCCXADDmr32_EVEX */ |
| 97801 | GR32, GR32, i32mem, GR32, ccode, |
| 97802 | /* CMPCCXADDmr64 */ |
| 97803 | GR64, GR64, i64mem, GR64, ccode, |
| 97804 | /* CMPCCXADDmr64_EVEX */ |
| 97805 | GR64, GR64, i64mem, GR64, ccode, |
| 97806 | /* CMPPDrmi */ |
| 97807 | VR128, VR128, f128mem, u8imm, |
| 97808 | /* CMPPDrri */ |
| 97809 | VR128, VR128, VR128, u8imm, |
| 97810 | /* CMPPSrmi */ |
| 97811 | VR128, VR128, f128mem, u8imm, |
| 97812 | /* CMPPSrri */ |
| 97813 | VR128, VR128, VR128, u8imm, |
| 97814 | /* CMPSB */ |
| 97815 | dstidx8, srcidx8, |
| 97816 | /* CMPSDrmi */ |
| 97817 | FR64, FR64, f64mem, u8imm, |
| 97818 | /* CMPSDrmi_Int */ |
| 97819 | VR128, VR128, sdmem, u8imm, |
| 97820 | /* CMPSDrri */ |
| 97821 | FR64, FR64, FR64, u8imm, |
| 97822 | /* CMPSDrri_Int */ |
| 97823 | VR128, VR128, VR128, u8imm, |
| 97824 | /* CMPSL */ |
| 97825 | dstidx32, srcidx32, |
| 97826 | /* CMPSQ */ |
| 97827 | dstidx64, srcidx64, |
| 97828 | /* CMPSSrmi */ |
| 97829 | FR32, FR32, f32mem, u8imm, |
| 97830 | /* CMPSSrmi_Int */ |
| 97831 | VR128, VR128, ssmem, u8imm, |
| 97832 | /* CMPSSrri */ |
| 97833 | FR32, FR32, FR32, u8imm, |
| 97834 | /* CMPSSrri_Int */ |
| 97835 | VR128, VR128, VR128, u8imm, |
| 97836 | /* CMPSW */ |
| 97837 | dstidx16, srcidx16, |
| 97838 | /* CMPXCHG16B */ |
| 97839 | i128mem, |
| 97840 | /* CMPXCHG16rm */ |
| 97841 | i16mem, GR16, |
| 97842 | /* CMPXCHG16rr */ |
| 97843 | GR16, GR16, |
| 97844 | /* CMPXCHG32rm */ |
| 97845 | i32mem, GR32, |
| 97846 | /* CMPXCHG32rr */ |
| 97847 | GR32, GR32, |
| 97848 | /* CMPXCHG64rm */ |
| 97849 | i64mem, GR64, |
| 97850 | /* CMPXCHG64rr */ |
| 97851 | GR64, GR64, |
| 97852 | /* CMPXCHG8B */ |
| 97853 | i64mem, |
| 97854 | /* CMPXCHG8rm */ |
| 97855 | i8mem, GR8, |
| 97856 | /* CMPXCHG8rr */ |
| 97857 | GR8, GR8, |
| 97858 | /* COMISDrm */ |
| 97859 | FR64, f64mem, |
| 97860 | /* COMISDrm_Int */ |
| 97861 | VR128, sdmem, |
| 97862 | /* COMISDrr */ |
| 97863 | FR64, FR64, |
| 97864 | /* COMISDrr_Int */ |
| 97865 | VR128, VR128, |
| 97866 | /* COMISSrm */ |
| 97867 | FR32, f32mem, |
| 97868 | /* COMISSrm_Int */ |
| 97869 | VR128, ssmem, |
| 97870 | /* COMISSrr */ |
| 97871 | FR32, FR32, |
| 97872 | /* COMISSrr_Int */ |
| 97873 | VR128, VR128, |
| 97874 | /* COMP_FST0r */ |
| 97875 | RSTi, |
| 97876 | /* COM_FIPr */ |
| 97877 | RSTi, |
| 97878 | /* COM_FIr */ |
| 97879 | RSTi, |
| 97880 | /* COM_FST0r */ |
| 97881 | RSTi, |
| 97882 | /* COM_FpIr32 */ |
| 97883 | RFP32, RFP32, |
| 97884 | /* COM_FpIr64 */ |
| 97885 | RFP64, RFP64, |
| 97886 | /* COM_FpIr80 */ |
| 97887 | RFP80, RFP80, |
| 97888 | /* COM_Fpr32 */ |
| 97889 | RFP32, RFP32, |
| 97890 | /* COM_Fpr64 */ |
| 97891 | RFP64, RFP64, |
| 97892 | /* COM_Fpr80 */ |
| 97893 | RFP80, RFP80, |
| 97894 | /* CPUID */ |
| 97895 | /* CQO */ |
| 97896 | /* CRC32r32m16 */ |
| 97897 | GR32, GR32, i16mem, |
| 97898 | /* CRC32r32m16_EVEX */ |
| 97899 | GR32, GR32, i16mem, |
| 97900 | /* CRC32r32m32 */ |
| 97901 | GR32, GR32, i32mem, |
| 97902 | /* CRC32r32m32_EVEX */ |
| 97903 | GR32, GR32, i32mem, |
| 97904 | /* CRC32r32m8 */ |
| 97905 | GR32, GR32, i8mem, |
| 97906 | /* CRC32r32m8_EVEX */ |
| 97907 | GR32, GR32, i8mem, |
| 97908 | /* CRC32r32r16 */ |
| 97909 | GR32, GR32, GR16, |
| 97910 | /* CRC32r32r16_EVEX */ |
| 97911 | GR32, GR32, GR16, |
| 97912 | /* CRC32r32r32 */ |
| 97913 | GR32, GR32, GR32, |
| 97914 | /* CRC32r32r32_EVEX */ |
| 97915 | GR32, GR32, GR32, |
| 97916 | /* CRC32r32r8 */ |
| 97917 | GR32, GR32, GR8, |
| 97918 | /* CRC32r32r8_EVEX */ |
| 97919 | GR32, GR32, GR8, |
| 97920 | /* CRC32r64m64 */ |
| 97921 | GR64, GR64, i64mem, |
| 97922 | /* CRC32r64m64_EVEX */ |
| 97923 | GR64, GR64, i64mem, |
| 97924 | /* CRC32r64m8 */ |
| 97925 | GR64, GR64, i8mem, |
| 97926 | /* CRC32r64m8_EVEX */ |
| 97927 | GR64, GR64, i8mem, |
| 97928 | /* CRC32r64r64 */ |
| 97929 | GR64, GR64, GR64, |
| 97930 | /* CRC32r64r64_EVEX */ |
| 97931 | GR64, GR64, GR64, |
| 97932 | /* CRC32r64r8 */ |
| 97933 | GR64, GR64, GR8, |
| 97934 | /* CRC32r64r8_EVEX */ |
| 97935 | GR64, GR64, GR8, |
| 97936 | /* CS_PREFIX */ |
| 97937 | /* CTEST16mi */ |
| 97938 | i16mem, i16imm, cflags, ccode, |
| 97939 | /* CTEST16mr */ |
| 97940 | i16mem, GR16, cflags, ccode, |
| 97941 | /* CTEST16ri */ |
| 97942 | GR16, i16imm, cflags, ccode, |
| 97943 | /* CTEST16rr */ |
| 97944 | GR16, GR16, cflags, ccode, |
| 97945 | /* CTEST32mi */ |
| 97946 | i32mem, i32imm, cflags, ccode, |
| 97947 | /* CTEST32mr */ |
| 97948 | i32mem, GR32, cflags, ccode, |
| 97949 | /* CTEST32ri */ |
| 97950 | GR32, i32imm, cflags, ccode, |
| 97951 | /* CTEST32rr */ |
| 97952 | GR32, GR32, cflags, ccode, |
| 97953 | /* CTEST64mi32 */ |
| 97954 | i64mem, i64i32imm, cflags, ccode, |
| 97955 | /* CTEST64mr */ |
| 97956 | i64mem, GR64, cflags, ccode, |
| 97957 | /* CTEST64ri32 */ |
| 97958 | GR64, i64i32imm, cflags, ccode, |
| 97959 | /* CTEST64rr */ |
| 97960 | GR64, GR64, cflags, ccode, |
| 97961 | /* CTEST8mi */ |
| 97962 | i8mem, i8imm, cflags, ccode, |
| 97963 | /* CTEST8mr */ |
| 97964 | i8mem, GR8, cflags, ccode, |
| 97965 | /* CTEST8ri */ |
| 97966 | GR8, i8imm, cflags, ccode, |
| 97967 | /* CTEST8rr */ |
| 97968 | GR8, GR8, cflags, ccode, |
| 97969 | /* CVTDQ2PDrm */ |
| 97970 | VR128, i64mem, |
| 97971 | /* CVTDQ2PDrr */ |
| 97972 | VR128, VR128, |
| 97973 | /* CVTDQ2PSrm */ |
| 97974 | VR128, i128mem, |
| 97975 | /* CVTDQ2PSrr */ |
| 97976 | VR128, VR128, |
| 97977 | /* CVTPD2DQrm */ |
| 97978 | VR128, f128mem, |
| 97979 | /* CVTPD2DQrr */ |
| 97980 | VR128, VR128, |
| 97981 | /* CVTPD2PSrm */ |
| 97982 | VR128, f128mem, |
| 97983 | /* CVTPD2PSrr */ |
| 97984 | VR128, VR128, |
| 97985 | /* CVTPS2DQrm */ |
| 97986 | VR128, f128mem, |
| 97987 | /* CVTPS2DQrr */ |
| 97988 | VR128, VR128, |
| 97989 | /* CVTPS2PDrm */ |
| 97990 | VR128, f64mem, |
| 97991 | /* CVTPS2PDrr */ |
| 97992 | VR128, VR128, |
| 97993 | /* CVTSD2SI64rm */ |
| 97994 | GR64, f64mem, |
| 97995 | /* CVTSD2SI64rm_Int */ |
| 97996 | GR64, sdmem, |
| 97997 | /* CVTSD2SI64rr */ |
| 97998 | GR64, FR64, |
| 97999 | /* CVTSD2SI64rr_Int */ |
| 98000 | GR64, VR128, |
| 98001 | /* CVTSD2SIrm */ |
| 98002 | GR32, f64mem, |
| 98003 | /* CVTSD2SIrm_Int */ |
| 98004 | GR32, sdmem, |
| 98005 | /* CVTSD2SIrr */ |
| 98006 | GR32, FR64, |
| 98007 | /* CVTSD2SIrr_Int */ |
| 98008 | GR32, VR128, |
| 98009 | /* CVTSD2SSrm */ |
| 98010 | FR32, f64mem, |
| 98011 | /* CVTSD2SSrm_Int */ |
| 98012 | VR128, VR128, sdmem, |
| 98013 | /* CVTSD2SSrr */ |
| 98014 | FR32, FR64, |
| 98015 | /* CVTSD2SSrr_Int */ |
| 98016 | VR128, VR128, VR128, |
| 98017 | /* CVTSI2SDrm */ |
| 98018 | FR64, i32mem, |
| 98019 | /* CVTSI2SDrm_Int */ |
| 98020 | VR128, VR128, i32mem, |
| 98021 | /* CVTSI2SDrr */ |
| 98022 | FR64, GR32, |
| 98023 | /* CVTSI2SDrr_Int */ |
| 98024 | VR128, VR128, GR32, |
| 98025 | /* CVTSI2SSrm */ |
| 98026 | FR32, i32mem, |
| 98027 | /* CVTSI2SSrm_Int */ |
| 98028 | VR128, VR128, i32mem, |
| 98029 | /* CVTSI2SSrr */ |
| 98030 | FR32, GR32, |
| 98031 | /* CVTSI2SSrr_Int */ |
| 98032 | VR128, VR128, GR32, |
| 98033 | /* CVTSI642SDrm */ |
| 98034 | FR64, i64mem, |
| 98035 | /* CVTSI642SDrm_Int */ |
| 98036 | VR128, VR128, i64mem, |
| 98037 | /* CVTSI642SDrr */ |
| 98038 | FR64, GR64, |
| 98039 | /* CVTSI642SDrr_Int */ |
| 98040 | VR128, VR128, GR64, |
| 98041 | /* CVTSI642SSrm */ |
| 98042 | FR32, i64mem, |
| 98043 | /* CVTSI642SSrm_Int */ |
| 98044 | VR128, VR128, i64mem, |
| 98045 | /* CVTSI642SSrr */ |
| 98046 | FR32, GR64, |
| 98047 | /* CVTSI642SSrr_Int */ |
| 98048 | VR128, VR128, GR64, |
| 98049 | /* CVTSS2SDrm */ |
| 98050 | FR64, f32mem, |
| 98051 | /* CVTSS2SDrm_Int */ |
| 98052 | VR128, VR128, ssmem, |
| 98053 | /* CVTSS2SDrr */ |
| 98054 | FR64, FR32, |
| 98055 | /* CVTSS2SDrr_Int */ |
| 98056 | VR128, VR128, VR128, |
| 98057 | /* CVTSS2SI64rm */ |
| 98058 | GR64, f32mem, |
| 98059 | /* CVTSS2SI64rm_Int */ |
| 98060 | GR64, ssmem, |
| 98061 | /* CVTSS2SI64rr */ |
| 98062 | GR64, FR32, |
| 98063 | /* CVTSS2SI64rr_Int */ |
| 98064 | GR64, VR128, |
| 98065 | /* CVTSS2SIrm */ |
| 98066 | GR32, f32mem, |
| 98067 | /* CVTSS2SIrm_Int */ |
| 98068 | GR32, ssmem, |
| 98069 | /* CVTSS2SIrr */ |
| 98070 | GR32, FR32, |
| 98071 | /* CVTSS2SIrr_Int */ |
| 98072 | GR32, VR128, |
| 98073 | /* CVTTPD2DQrm */ |
| 98074 | VR128, f128mem, |
| 98075 | /* CVTTPD2DQrr */ |
| 98076 | VR128, VR128, |
| 98077 | /* CVTTPS2DQrm */ |
| 98078 | VR128, f128mem, |
| 98079 | /* CVTTPS2DQrr */ |
| 98080 | VR128, VR128, |
| 98081 | /* CVTTSD2SI64rm */ |
| 98082 | GR64, f64mem, |
| 98083 | /* CVTTSD2SI64rm_Int */ |
| 98084 | GR64, sdmem, |
| 98085 | /* CVTTSD2SI64rr */ |
| 98086 | GR64, FR64, |
| 98087 | /* CVTTSD2SI64rr_Int */ |
| 98088 | GR64, VR128, |
| 98089 | /* CVTTSD2SIrm */ |
| 98090 | GR32, f64mem, |
| 98091 | /* CVTTSD2SIrm_Int */ |
| 98092 | GR32, sdmem, |
| 98093 | /* CVTTSD2SIrr */ |
| 98094 | GR32, FR64, |
| 98095 | /* CVTTSD2SIrr_Int */ |
| 98096 | GR32, VR128, |
| 98097 | /* CVTTSS2SI64rm */ |
| 98098 | GR64, f32mem, |
| 98099 | /* CVTTSS2SI64rm_Int */ |
| 98100 | GR64, ssmem, |
| 98101 | /* CVTTSS2SI64rr */ |
| 98102 | GR64, FR32, |
| 98103 | /* CVTTSS2SI64rr_Int */ |
| 98104 | GR64, VR128, |
| 98105 | /* CVTTSS2SIrm */ |
| 98106 | GR32, f32mem, |
| 98107 | /* CVTTSS2SIrm_Int */ |
| 98108 | GR32, ssmem, |
| 98109 | /* CVTTSS2SIrr */ |
| 98110 | GR32, FR32, |
| 98111 | /* CVTTSS2SIrr_Int */ |
| 98112 | GR32, VR128, |
| 98113 | /* CWD */ |
| 98114 | /* CWDE */ |
| 98115 | /* DAA */ |
| 98116 | /* DAS */ |
| 98117 | /* DATA16_PREFIX */ |
| 98118 | /* DEC16m */ |
| 98119 | i16mem, |
| 98120 | /* DEC16m_EVEX */ |
| 98121 | i16mem, |
| 98122 | /* DEC16m_ND */ |
| 98123 | GR16, i16mem, |
| 98124 | /* DEC16m_NF */ |
| 98125 | i16mem, |
| 98126 | /* DEC16m_NF_ND */ |
| 98127 | GR16, i16mem, |
| 98128 | /* DEC16r */ |
| 98129 | GR16, GR16, |
| 98130 | /* DEC16r_EVEX */ |
| 98131 | GR16, GR16, |
| 98132 | /* DEC16r_ND */ |
| 98133 | GR16, GR16, |
| 98134 | /* DEC16r_NF */ |
| 98135 | GR16, GR16, |
| 98136 | /* DEC16r_NF_ND */ |
| 98137 | GR16, GR16, |
| 98138 | /* DEC16r_alt */ |
| 98139 | GR16, GR16, |
| 98140 | /* DEC32m */ |
| 98141 | i32mem, |
| 98142 | /* DEC32m_EVEX */ |
| 98143 | i32mem, |
| 98144 | /* DEC32m_ND */ |
| 98145 | GR32, i32mem, |
| 98146 | /* DEC32m_NF */ |
| 98147 | i32mem, |
| 98148 | /* DEC32m_NF_ND */ |
| 98149 | GR32, i32mem, |
| 98150 | /* DEC32r */ |
| 98151 | GR32, GR32, |
| 98152 | /* DEC32r_EVEX */ |
| 98153 | GR32, GR32, |
| 98154 | /* DEC32r_ND */ |
| 98155 | GR32, GR32, |
| 98156 | /* DEC32r_NF */ |
| 98157 | GR32, GR32, |
| 98158 | /* DEC32r_NF_ND */ |
| 98159 | GR32, GR32, |
| 98160 | /* DEC32r_alt */ |
| 98161 | GR32, GR32, |
| 98162 | /* DEC64m */ |
| 98163 | i64mem, |
| 98164 | /* DEC64m_EVEX */ |
| 98165 | i64mem, |
| 98166 | /* DEC64m_ND */ |
| 98167 | GR64, i64mem, |
| 98168 | /* DEC64m_NF */ |
| 98169 | i64mem, |
| 98170 | /* DEC64m_NF_ND */ |
| 98171 | GR64, i64mem, |
| 98172 | /* DEC64r */ |
| 98173 | GR64, GR64, |
| 98174 | /* DEC64r_EVEX */ |
| 98175 | GR64, GR64, |
| 98176 | /* DEC64r_ND */ |
| 98177 | GR64, GR64, |
| 98178 | /* DEC64r_NF */ |
| 98179 | GR64, GR64, |
| 98180 | /* DEC64r_NF_ND */ |
| 98181 | GR64, GR64, |
| 98182 | /* DEC8m */ |
| 98183 | i8mem, |
| 98184 | /* DEC8m_EVEX */ |
| 98185 | i8mem, |
| 98186 | /* DEC8m_ND */ |
| 98187 | GR8, i8mem, |
| 98188 | /* DEC8m_NF */ |
| 98189 | i8mem, |
| 98190 | /* DEC8m_NF_ND */ |
| 98191 | GR8, i8mem, |
| 98192 | /* DEC8r */ |
| 98193 | GR8, GR8, |
| 98194 | /* DEC8r_EVEX */ |
| 98195 | GR8, GR8, |
| 98196 | /* DEC8r_ND */ |
| 98197 | GR8, GR8, |
| 98198 | /* DEC8r_NF */ |
| 98199 | GR8, GR8, |
| 98200 | /* DEC8r_NF_ND */ |
| 98201 | GR8, GR8, |
| 98202 | /* DIV16m */ |
| 98203 | i16mem, |
| 98204 | /* DIV16m_EVEX */ |
| 98205 | i16mem, |
| 98206 | /* DIV16m_NF */ |
| 98207 | i16mem, |
| 98208 | /* DIV16r */ |
| 98209 | GR16, |
| 98210 | /* DIV16r_EVEX */ |
| 98211 | GR16, |
| 98212 | /* DIV16r_NF */ |
| 98213 | GR16, |
| 98214 | /* DIV32m */ |
| 98215 | i32mem, |
| 98216 | /* DIV32m_EVEX */ |
| 98217 | i32mem, |
| 98218 | /* DIV32m_NF */ |
| 98219 | i32mem, |
| 98220 | /* DIV32r */ |
| 98221 | GR32, |
| 98222 | /* DIV32r_EVEX */ |
| 98223 | GR32, |
| 98224 | /* DIV32r_NF */ |
| 98225 | GR32, |
| 98226 | /* DIV64m */ |
| 98227 | i64mem, |
| 98228 | /* DIV64m_EVEX */ |
| 98229 | i64mem, |
| 98230 | /* DIV64m_NF */ |
| 98231 | i64mem, |
| 98232 | /* DIV64r */ |
| 98233 | GR64, |
| 98234 | /* DIV64r_EVEX */ |
| 98235 | GR64, |
| 98236 | /* DIV64r_NF */ |
| 98237 | GR64, |
| 98238 | /* DIV8m */ |
| 98239 | i8mem, |
| 98240 | /* DIV8m_EVEX */ |
| 98241 | i8mem, |
| 98242 | /* DIV8m_NF */ |
| 98243 | i8mem, |
| 98244 | /* DIV8r */ |
| 98245 | GR8, |
| 98246 | /* DIV8r_EVEX */ |
| 98247 | GR8, |
| 98248 | /* DIV8r_NF */ |
| 98249 | GR8, |
| 98250 | /* DIVPDrm */ |
| 98251 | VR128, VR128, f128mem, |
| 98252 | /* DIVPDrr */ |
| 98253 | VR128, VR128, VR128, |
| 98254 | /* DIVPSrm */ |
| 98255 | VR128, VR128, f128mem, |
| 98256 | /* DIVPSrr */ |
| 98257 | VR128, VR128, VR128, |
| 98258 | /* DIVR_F32m */ |
| 98259 | f32mem, |
| 98260 | /* DIVR_F64m */ |
| 98261 | f64mem, |
| 98262 | /* DIVR_FI16m */ |
| 98263 | i16mem, |
| 98264 | /* DIVR_FI32m */ |
| 98265 | i32mem, |
| 98266 | /* DIVR_FPrST0 */ |
| 98267 | RSTi, |
| 98268 | /* DIVR_FST0r */ |
| 98269 | RSTi, |
| 98270 | /* DIVR_Fp32m */ |
| 98271 | RFP32, RFP32, f32mem, |
| 98272 | /* DIVR_Fp64m */ |
| 98273 | RFP64, RFP64, f64mem, |
| 98274 | /* DIVR_Fp64m32 */ |
| 98275 | RFP64, RFP64, f32mem, |
| 98276 | /* DIVR_Fp80m32 */ |
| 98277 | RFP80, RFP80, f32mem, |
| 98278 | /* DIVR_Fp80m64 */ |
| 98279 | RFP80, RFP80, f64mem, |
| 98280 | /* DIVR_FpI16m32 */ |
| 98281 | RFP32, RFP32, i16mem, |
| 98282 | /* DIVR_FpI16m64 */ |
| 98283 | RFP64, RFP64, i16mem, |
| 98284 | /* DIVR_FpI16m80 */ |
| 98285 | RFP80, RFP80, i16mem, |
| 98286 | /* DIVR_FpI32m32 */ |
| 98287 | RFP32, RFP32, i32mem, |
| 98288 | /* DIVR_FpI32m64 */ |
| 98289 | RFP64, RFP64, i32mem, |
| 98290 | /* DIVR_FpI32m80 */ |
| 98291 | RFP80, RFP80, i32mem, |
| 98292 | /* DIVR_FrST0 */ |
| 98293 | RSTi, |
| 98294 | /* DIVSDrm */ |
| 98295 | FR64, FR64, f64mem, |
| 98296 | /* DIVSDrm_Int */ |
| 98297 | VR128, VR128, sdmem, |
| 98298 | /* DIVSDrr */ |
| 98299 | FR64, FR64, FR64, |
| 98300 | /* DIVSDrr_Int */ |
| 98301 | VR128, VR128, VR128, |
| 98302 | /* DIVSSrm */ |
| 98303 | FR32, FR32, f32mem, |
| 98304 | /* DIVSSrm_Int */ |
| 98305 | VR128, VR128, ssmem, |
| 98306 | /* DIVSSrr */ |
| 98307 | FR32, FR32, FR32, |
| 98308 | /* DIVSSrr_Int */ |
| 98309 | VR128, VR128, VR128, |
| 98310 | /* DIV_F32m */ |
| 98311 | f32mem, |
| 98312 | /* DIV_F64m */ |
| 98313 | f64mem, |
| 98314 | /* DIV_FI16m */ |
| 98315 | i16mem, |
| 98316 | /* DIV_FI32m */ |
| 98317 | i32mem, |
| 98318 | /* DIV_FPrST0 */ |
| 98319 | RSTi, |
| 98320 | /* DIV_FST0r */ |
| 98321 | RSTi, |
| 98322 | /* DIV_Fp32 */ |
| 98323 | RFP32, RFP32, RFP32, |
| 98324 | /* DIV_Fp32m */ |
| 98325 | RFP32, RFP32, f32mem, |
| 98326 | /* DIV_Fp64 */ |
| 98327 | RFP64, RFP64, RFP64, |
| 98328 | /* DIV_Fp64m */ |
| 98329 | RFP64, RFP64, f64mem, |
| 98330 | /* DIV_Fp64m32 */ |
| 98331 | RFP64, RFP64, f32mem, |
| 98332 | /* DIV_Fp80 */ |
| 98333 | RFP80, RFP80, RFP80, |
| 98334 | /* DIV_Fp80m32 */ |
| 98335 | RFP80, RFP80, f32mem, |
| 98336 | /* DIV_Fp80m64 */ |
| 98337 | RFP80, RFP80, f64mem, |
| 98338 | /* DIV_FpI16m32 */ |
| 98339 | RFP32, RFP32, i16mem, |
| 98340 | /* DIV_FpI16m64 */ |
| 98341 | RFP64, RFP64, i16mem, |
| 98342 | /* DIV_FpI16m80 */ |
| 98343 | RFP80, RFP80, i16mem, |
| 98344 | /* DIV_FpI32m32 */ |
| 98345 | RFP32, RFP32, i32mem, |
| 98346 | /* DIV_FpI32m64 */ |
| 98347 | RFP64, RFP64, i32mem, |
| 98348 | /* DIV_FpI32m80 */ |
| 98349 | RFP80, RFP80, i32mem, |
| 98350 | /* DIV_FrST0 */ |
| 98351 | RSTi, |
| 98352 | /* DPPDrmi */ |
| 98353 | VR128, VR128, f128mem, u8imm, |
| 98354 | /* DPPDrri */ |
| 98355 | VR128, VR128, VR128, u8imm, |
| 98356 | /* DPPSrmi */ |
| 98357 | VR128, VR128, f128mem, u8imm, |
| 98358 | /* DPPSrri */ |
| 98359 | VR128, VR128, VR128, u8imm, |
| 98360 | /* DS_PREFIX */ |
| 98361 | /* DYN_ALLOCA_32 */ |
| 98362 | GR32, |
| 98363 | /* DYN_ALLOCA_64 */ |
| 98364 | GR64, |
| 98365 | /* EH_RETURN */ |
| 98366 | GR32, |
| 98367 | /* EH_RETURN64 */ |
| 98368 | GR64, |
| 98369 | /* EH_SjLj_LongJmp32 */ |
| 98370 | i32mem, |
| 98371 | /* EH_SjLj_LongJmp64 */ |
| 98372 | i64mem, |
| 98373 | /* EH_SjLj_SetJmp32 */ |
| 98374 | GR32, i32mem, |
| 98375 | /* EH_SjLj_SetJmp64 */ |
| 98376 | GR32, i64mem, |
| 98377 | /* EH_SjLj_Setup */ |
| 98378 | brtarget, |
| 98379 | /* ENCLS */ |
| 98380 | /* ENCLU */ |
| 98381 | /* ENCLV */ |
| 98382 | /* ENCODEKEY128 */ |
| 98383 | GR32, GR32, |
| 98384 | /* ENCODEKEY256 */ |
| 98385 | GR32, GR32, |
| 98386 | /* ENDBR32 */ |
| 98387 | /* ENDBR64 */ |
| 98388 | /* ENQCMD16 */ |
| 98389 | GR16, i512mem_GR16, |
| 98390 | /* ENQCMD32 */ |
| 98391 | GR32, i512mem_GR32, |
| 98392 | /* ENQCMD32_EVEX */ |
| 98393 | GR32, i512mem_GR32, |
| 98394 | /* ENQCMD64 */ |
| 98395 | GR64, i512mem_GR64, |
| 98396 | /* ENQCMD64_EVEX */ |
| 98397 | GR64, i512mem_GR64, |
| 98398 | /* ENQCMDS16 */ |
| 98399 | GR16, i512mem_GR16, |
| 98400 | /* ENQCMDS32 */ |
| 98401 | GR32, i512mem_GR32, |
| 98402 | /* ENQCMDS32_EVEX */ |
| 98403 | GR32, i512mem_GR32, |
| 98404 | /* ENQCMDS64 */ |
| 98405 | GR64, i512mem_GR64, |
| 98406 | /* ENQCMDS64_EVEX */ |
| 98407 | GR64, i512mem_GR64, |
| 98408 | /* ENTER */ |
| 98409 | i16imm, i8imm, |
| 98410 | /* ERETS */ |
| 98411 | /* ERETU */ |
| 98412 | /* ES_PREFIX */ |
| 98413 | /* EXTRACTPSmri */ |
| 98414 | f32mem, VR128, u8imm, |
| 98415 | /* EXTRACTPSrri */ |
| 98416 | GR32orGR64, VR128, u8imm, |
| 98417 | /* EXTRQ */ |
| 98418 | VR128, VR128, VR128, |
| 98419 | /* EXTRQI */ |
| 98420 | VR128, VR128, u8imm, u8imm, |
| 98421 | /* F2XM1 */ |
| 98422 | /* FARCALL16i */ |
| 98423 | i16imm, i16imm, |
| 98424 | /* FARCALL16m */ |
| 98425 | opaquemem, |
| 98426 | /* FARCALL32i */ |
| 98427 | i32imm, i16imm, |
| 98428 | /* FARCALL32m */ |
| 98429 | opaquemem, |
| 98430 | /* FARCALL64m */ |
| 98431 | opaquemem, |
| 98432 | /* FARJMP16i */ |
| 98433 | i16imm, i16imm, |
| 98434 | /* FARJMP16m */ |
| 98435 | opaquemem, |
| 98436 | /* FARJMP32i */ |
| 98437 | i32imm, i16imm, |
| 98438 | /* FARJMP32m */ |
| 98439 | opaquemem, |
| 98440 | /* FARJMP64m */ |
| 98441 | opaquemem, |
| 98442 | /* FBLDm */ |
| 98443 | f80mem, |
| 98444 | /* FBSTPm */ |
| 98445 | f80mem, |
| 98446 | /* FCOM32m */ |
| 98447 | f32mem, |
| 98448 | /* FCOM64m */ |
| 98449 | f64mem, |
| 98450 | /* FCOMP32m */ |
| 98451 | f32mem, |
| 98452 | /* FCOMP64m */ |
| 98453 | f64mem, |
| 98454 | /* FCOMPP */ |
| 98455 | /* FCOS */ |
| 98456 | /* FDECSTP */ |
| 98457 | /* FEMMS */ |
| 98458 | /* FFREE */ |
| 98459 | RSTi, |
| 98460 | /* FFREEP */ |
| 98461 | RSTi, |
| 98462 | /* FICOM16m */ |
| 98463 | i16mem, |
| 98464 | /* FICOM32m */ |
| 98465 | i32mem, |
| 98466 | /* FICOMP16m */ |
| 98467 | i16mem, |
| 98468 | /* FICOMP32m */ |
| 98469 | i32mem, |
| 98470 | /* FINCSTP */ |
| 98471 | /* FLDCW16m */ |
| 98472 | i16mem, |
| 98473 | /* FLDENVm */ |
| 98474 | anymem, |
| 98475 | /* FLDL2E */ |
| 98476 | /* FLDL2T */ |
| 98477 | /* FLDLG2 */ |
| 98478 | /* FLDLN2 */ |
| 98479 | /* FLDPI */ |
| 98480 | /* FNCLEX */ |
| 98481 | /* FNINIT */ |
| 98482 | /* FNOP */ |
| 98483 | /* FNSTCW16m */ |
| 98484 | i16mem, |
| 98485 | /* FNSTSW16r */ |
| 98486 | /* FNSTSWm */ |
| 98487 | i16mem, |
| 98488 | /* FP32_TO_INT16_IN_MEM */ |
| 98489 | i16mem, RFP32, |
| 98490 | /* FP32_TO_INT32_IN_MEM */ |
| 98491 | i32mem, RFP32, |
| 98492 | /* FP32_TO_INT64_IN_MEM */ |
| 98493 | i64mem, RFP32, |
| 98494 | /* FP64_TO_INT16_IN_MEM */ |
| 98495 | i16mem, RFP64, |
| 98496 | /* FP64_TO_INT32_IN_MEM */ |
| 98497 | i32mem, RFP64, |
| 98498 | /* FP64_TO_INT64_IN_MEM */ |
| 98499 | i64mem, RFP64, |
| 98500 | /* FP80_ADDm32 */ |
| 98501 | RFP80, RFP80, f32mem, |
| 98502 | /* FP80_ADDr */ |
| 98503 | RFP80, RFP80, RFP80, |
| 98504 | /* FP80_TO_INT16_IN_MEM */ |
| 98505 | i16mem, RFP80, |
| 98506 | /* FP80_TO_INT32_IN_MEM */ |
| 98507 | i32mem, RFP80, |
| 98508 | /* FP80_TO_INT64_IN_MEM */ |
| 98509 | i64mem, RFP80, |
| 98510 | /* FPATAN */ |
| 98511 | /* FPREM */ |
| 98512 | /* FPREM1 */ |
| 98513 | /* FPTAN */ |
| 98514 | /* FRNDINT */ |
| 98515 | /* FRSTORm */ |
| 98516 | anymem, |
| 98517 | /* FSAVEm */ |
| 98518 | anymem, |
| 98519 | /* FSCALE */ |
| 98520 | /* FSIN */ |
| 98521 | /* FSINCOS */ |
| 98522 | /* FSTENVm */ |
| 98523 | anymem, |
| 98524 | /* FS_PREFIX */ |
| 98525 | /* FXRSTOR */ |
| 98526 | opaquemem, |
| 98527 | /* FXRSTOR64 */ |
| 98528 | opaquemem, |
| 98529 | /* FXSAVE */ |
| 98530 | opaquemem, |
| 98531 | /* FXSAVE64 */ |
| 98532 | opaquemem, |
| 98533 | /* FXTRACT */ |
| 98534 | /* FYL2X */ |
| 98535 | /* FYL2XP1 */ |
| 98536 | /* GETSEC */ |
| 98537 | /* GF2P8AFFINEINVQBrmi */ |
| 98538 | VR128, VR128, i128mem, u8imm, |
| 98539 | /* GF2P8AFFINEINVQBrri */ |
| 98540 | VR128, VR128, VR128, u8imm, |
| 98541 | /* GF2P8AFFINEQBrmi */ |
| 98542 | VR128, VR128, i128mem, u8imm, |
| 98543 | /* GF2P8AFFINEQBrri */ |
| 98544 | VR128, VR128, VR128, u8imm, |
| 98545 | /* GF2P8MULBrm */ |
| 98546 | VR128, VR128, i128mem, |
| 98547 | /* GF2P8MULBrr */ |
| 98548 | VR128, VR128, VR128, |
| 98549 | /* GS_PREFIX */ |
| 98550 | /* HADDPDrm */ |
| 98551 | VR128, VR128, f128mem, |
| 98552 | /* HADDPDrr */ |
| 98553 | VR128, VR128, VR128, |
| 98554 | /* HADDPSrm */ |
| 98555 | VR128, VR128, f128mem, |
| 98556 | /* HADDPSrr */ |
| 98557 | VR128, VR128, VR128, |
| 98558 | /* HLT */ |
| 98559 | /* HRESET */ |
| 98560 | i32u8imm, |
| 98561 | /* HSUBPDrm */ |
| 98562 | VR128, VR128, f128mem, |
| 98563 | /* HSUBPDrr */ |
| 98564 | VR128, VR128, VR128, |
| 98565 | /* HSUBPSrm */ |
| 98566 | VR128, VR128, f128mem, |
| 98567 | /* HSUBPSrr */ |
| 98568 | VR128, VR128, VR128, |
| 98569 | /* IDIV16m */ |
| 98570 | i16mem, |
| 98571 | /* IDIV16m_EVEX */ |
| 98572 | i16mem, |
| 98573 | /* IDIV16m_NF */ |
| 98574 | i16mem, |
| 98575 | /* IDIV16r */ |
| 98576 | GR16, |
| 98577 | /* IDIV16r_EVEX */ |
| 98578 | GR16, |
| 98579 | /* IDIV16r_NF */ |
| 98580 | GR16, |
| 98581 | /* IDIV32m */ |
| 98582 | i32mem, |
| 98583 | /* IDIV32m_EVEX */ |
| 98584 | i32mem, |
| 98585 | /* IDIV32m_NF */ |
| 98586 | i32mem, |
| 98587 | /* IDIV32r */ |
| 98588 | GR32, |
| 98589 | /* IDIV32r_EVEX */ |
| 98590 | GR32, |
| 98591 | /* IDIV32r_NF */ |
| 98592 | GR32, |
| 98593 | /* IDIV64m */ |
| 98594 | i64mem, |
| 98595 | /* IDIV64m_EVEX */ |
| 98596 | i64mem, |
| 98597 | /* IDIV64m_NF */ |
| 98598 | i64mem, |
| 98599 | /* IDIV64r */ |
| 98600 | GR64, |
| 98601 | /* IDIV64r_EVEX */ |
| 98602 | GR64, |
| 98603 | /* IDIV64r_NF */ |
| 98604 | GR64, |
| 98605 | /* IDIV8m */ |
| 98606 | i8mem, |
| 98607 | /* IDIV8m_EVEX */ |
| 98608 | i8mem, |
| 98609 | /* IDIV8m_NF */ |
| 98610 | i8mem, |
| 98611 | /* IDIV8r */ |
| 98612 | GR8, |
| 98613 | /* IDIV8r_EVEX */ |
| 98614 | GR8, |
| 98615 | /* IDIV8r_NF */ |
| 98616 | GR8, |
| 98617 | /* ILD_F16m */ |
| 98618 | i16mem, |
| 98619 | /* ILD_F32m */ |
| 98620 | i32mem, |
| 98621 | /* ILD_F64m */ |
| 98622 | i64mem, |
| 98623 | /* ILD_Fp16m32 */ |
| 98624 | RFP32, i16mem, |
| 98625 | /* ILD_Fp16m64 */ |
| 98626 | RFP64, i16mem, |
| 98627 | /* ILD_Fp16m80 */ |
| 98628 | RFP80, i16mem, |
| 98629 | /* ILD_Fp32m32 */ |
| 98630 | RFP32, i32mem, |
| 98631 | /* ILD_Fp32m64 */ |
| 98632 | RFP64, i32mem, |
| 98633 | /* ILD_Fp32m80 */ |
| 98634 | RFP80, i32mem, |
| 98635 | /* ILD_Fp64m32 */ |
| 98636 | RFP32, i64mem, |
| 98637 | /* ILD_Fp64m64 */ |
| 98638 | RFP64, i64mem, |
| 98639 | /* ILD_Fp64m80 */ |
| 98640 | RFP80, i64mem, |
| 98641 | /* IMUL16m */ |
| 98642 | i16mem, |
| 98643 | /* IMUL16m_EVEX */ |
| 98644 | i16mem, |
| 98645 | /* IMUL16m_NF */ |
| 98646 | i16mem, |
| 98647 | /* IMUL16r */ |
| 98648 | GR16, |
| 98649 | /* IMUL16r_EVEX */ |
| 98650 | GR16, |
| 98651 | /* IMUL16r_NF */ |
| 98652 | GR16, |
| 98653 | /* IMUL16rm */ |
| 98654 | GR16, GR16, i16mem, |
| 98655 | /* IMUL16rm_EVEX */ |
| 98656 | GR16, GR16, i16mem, |
| 98657 | /* IMUL16rm_ND */ |
| 98658 | GR16, GR16, i16mem, |
| 98659 | /* IMUL16rm_NF */ |
| 98660 | GR16, GR16, i16mem, |
| 98661 | /* IMUL16rm_NF_ND */ |
| 98662 | GR16, GR16, i16mem, |
| 98663 | /* IMUL16rmi */ |
| 98664 | GR16, i16mem, i16imm, |
| 98665 | /* IMUL16rmi8 */ |
| 98666 | GR16, i16mem, i16i8imm, |
| 98667 | /* IMUL16rmi8_EVEX */ |
| 98668 | GR16, i16mem, i16i8imm, |
| 98669 | /* IMUL16rmi8_NF */ |
| 98670 | GR16, i16mem, i16i8imm, |
| 98671 | /* IMUL16rmi_EVEX */ |
| 98672 | GR16, i16mem, i16imm, |
| 98673 | /* IMUL16rmi_NF */ |
| 98674 | GR16, i16mem, i16imm, |
| 98675 | /* IMUL16rr */ |
| 98676 | GR16, GR16, GR16, |
| 98677 | /* IMUL16rr_EVEX */ |
| 98678 | GR16, GR16, GR16, |
| 98679 | /* IMUL16rr_ND */ |
| 98680 | GR16, GR16, GR16, |
| 98681 | /* IMUL16rr_NF */ |
| 98682 | GR16, GR16, GR16, |
| 98683 | /* IMUL16rr_NF_ND */ |
| 98684 | GR16, GR16, GR16, |
| 98685 | /* IMUL16rri */ |
| 98686 | GR16, GR16, i16imm, |
| 98687 | /* IMUL16rri8 */ |
| 98688 | GR16, GR16, i16i8imm, |
| 98689 | /* IMUL16rri8_EVEX */ |
| 98690 | GR16, GR16, i16i8imm, |
| 98691 | /* IMUL16rri8_NF */ |
| 98692 | GR16, GR16, i16i8imm, |
| 98693 | /* IMUL16rri_EVEX */ |
| 98694 | GR16, GR16, i16imm, |
| 98695 | /* IMUL16rri_NF */ |
| 98696 | GR16, GR16, i16imm, |
| 98697 | /* IMUL32m */ |
| 98698 | i32mem, |
| 98699 | /* IMUL32m_EVEX */ |
| 98700 | i32mem, |
| 98701 | /* IMUL32m_NF */ |
| 98702 | i32mem, |
| 98703 | /* IMUL32r */ |
| 98704 | GR32, |
| 98705 | /* IMUL32r_EVEX */ |
| 98706 | GR32, |
| 98707 | /* IMUL32r_NF */ |
| 98708 | GR32, |
| 98709 | /* IMUL32rm */ |
| 98710 | GR32, GR32, i32mem, |
| 98711 | /* IMUL32rm_EVEX */ |
| 98712 | GR32, GR32, i32mem, |
| 98713 | /* IMUL32rm_ND */ |
| 98714 | GR32, GR32, i32mem, |
| 98715 | /* IMUL32rm_NF */ |
| 98716 | GR32, GR32, i32mem, |
| 98717 | /* IMUL32rm_NF_ND */ |
| 98718 | GR32, GR32, i32mem, |
| 98719 | /* IMUL32rmi */ |
| 98720 | GR32, i32mem, i32imm, |
| 98721 | /* IMUL32rmi8 */ |
| 98722 | GR32, i32mem, i32i8imm, |
| 98723 | /* IMUL32rmi8_EVEX */ |
| 98724 | GR32, i32mem, i32i8imm, |
| 98725 | /* IMUL32rmi8_NF */ |
| 98726 | GR32, i32mem, i32i8imm, |
| 98727 | /* IMUL32rmi_EVEX */ |
| 98728 | GR32, i32mem, i32imm, |
| 98729 | /* IMUL32rmi_NF */ |
| 98730 | GR32, i32mem, i32imm, |
| 98731 | /* IMUL32rr */ |
| 98732 | GR32, GR32, GR32, |
| 98733 | /* IMUL32rr_EVEX */ |
| 98734 | GR32, GR32, GR32, |
| 98735 | /* IMUL32rr_ND */ |
| 98736 | GR32, GR32, GR32, |
| 98737 | /* IMUL32rr_NF */ |
| 98738 | GR32, GR32, GR32, |
| 98739 | /* IMUL32rr_NF_ND */ |
| 98740 | GR32, GR32, GR32, |
| 98741 | /* IMUL32rri */ |
| 98742 | GR32, GR32, i32imm, |
| 98743 | /* IMUL32rri8 */ |
| 98744 | GR32, GR32, i32i8imm, |
| 98745 | /* IMUL32rri8_EVEX */ |
| 98746 | GR32, GR32, i32i8imm, |
| 98747 | /* IMUL32rri8_NF */ |
| 98748 | GR32, GR32, i32i8imm, |
| 98749 | /* IMUL32rri_EVEX */ |
| 98750 | GR32, GR32, i32imm, |
| 98751 | /* IMUL32rri_NF */ |
| 98752 | GR32, GR32, i32imm, |
| 98753 | /* IMUL64m */ |
| 98754 | i64mem, |
| 98755 | /* IMUL64m_EVEX */ |
| 98756 | i64mem, |
| 98757 | /* IMUL64m_NF */ |
| 98758 | i64mem, |
| 98759 | /* IMUL64r */ |
| 98760 | GR64, |
| 98761 | /* IMUL64r_EVEX */ |
| 98762 | GR64, |
| 98763 | /* IMUL64r_NF */ |
| 98764 | GR64, |
| 98765 | /* IMUL64rm */ |
| 98766 | GR64, GR64, i64mem, |
| 98767 | /* IMUL64rm_EVEX */ |
| 98768 | GR64, GR64, i64mem, |
| 98769 | /* IMUL64rm_ND */ |
| 98770 | GR64, GR64, i64mem, |
| 98771 | /* IMUL64rm_NF */ |
| 98772 | GR64, GR64, i64mem, |
| 98773 | /* IMUL64rm_NF_ND */ |
| 98774 | GR64, GR64, i64mem, |
| 98775 | /* IMUL64rmi32 */ |
| 98776 | GR64, i64mem, i64i32imm, |
| 98777 | /* IMUL64rmi32_EVEX */ |
| 98778 | GR64, i64mem, i64i32imm, |
| 98779 | /* IMUL64rmi32_NF */ |
| 98780 | GR64, i64mem, i64i32imm, |
| 98781 | /* IMUL64rmi8 */ |
| 98782 | GR64, i64mem, i64i8imm, |
| 98783 | /* IMUL64rmi8_EVEX */ |
| 98784 | GR64, i64mem, i64i8imm, |
| 98785 | /* IMUL64rmi8_NF */ |
| 98786 | GR64, i64mem, i64i8imm, |
| 98787 | /* IMUL64rr */ |
| 98788 | GR64, GR64, GR64, |
| 98789 | /* IMUL64rr_EVEX */ |
| 98790 | GR64, GR64, GR64, |
| 98791 | /* IMUL64rr_ND */ |
| 98792 | GR64, GR64, GR64, |
| 98793 | /* IMUL64rr_NF */ |
| 98794 | GR64, GR64, GR64, |
| 98795 | /* IMUL64rr_NF_ND */ |
| 98796 | GR64, GR64, GR64, |
| 98797 | /* IMUL64rri32 */ |
| 98798 | GR64, GR64, i64i32imm, |
| 98799 | /* IMUL64rri32_EVEX */ |
| 98800 | GR64, GR64, i64i32imm, |
| 98801 | /* IMUL64rri32_NF */ |
| 98802 | GR64, GR64, i64i32imm, |
| 98803 | /* IMUL64rri8 */ |
| 98804 | GR64, GR64, i64i8imm, |
| 98805 | /* IMUL64rri8_EVEX */ |
| 98806 | GR64, GR64, i64i8imm, |
| 98807 | /* IMUL64rri8_NF */ |
| 98808 | GR64, GR64, i64i8imm, |
| 98809 | /* IMUL8m */ |
| 98810 | i8mem, |
| 98811 | /* IMUL8m_EVEX */ |
| 98812 | i8mem, |
| 98813 | /* IMUL8m_NF */ |
| 98814 | i8mem, |
| 98815 | /* IMUL8r */ |
| 98816 | GR8, |
| 98817 | /* IMUL8r_EVEX */ |
| 98818 | GR8, |
| 98819 | /* IMUL8r_NF */ |
| 98820 | GR8, |
| 98821 | /* IMULZU16rmi */ |
| 98822 | GR16, i16mem, i16imm, |
| 98823 | /* IMULZU16rmi8 */ |
| 98824 | GR16, i16mem, i16i8imm, |
| 98825 | /* IMULZU16rri */ |
| 98826 | GR16, GR16, i16imm, |
| 98827 | /* IMULZU16rri8 */ |
| 98828 | GR16, GR16, i16i8imm, |
| 98829 | /* IMULZU32rmi */ |
| 98830 | GR32, i32mem, i32imm, |
| 98831 | /* IMULZU32rmi8 */ |
| 98832 | GR32, i32mem, i32i8imm, |
| 98833 | /* IMULZU32rri */ |
| 98834 | GR32, GR32, i32imm, |
| 98835 | /* IMULZU32rri8 */ |
| 98836 | GR32, GR32, i32i8imm, |
| 98837 | /* IMULZU64rmi32 */ |
| 98838 | GR64, i64mem, i64i32imm, |
| 98839 | /* IMULZU64rmi8 */ |
| 98840 | GR64, i64mem, i64i8imm, |
| 98841 | /* IMULZU64rri32 */ |
| 98842 | GR64, GR64, i64i32imm, |
| 98843 | /* IMULZU64rri8 */ |
| 98844 | GR64, GR64, i64i8imm, |
| 98845 | /* IN16ri */ |
| 98846 | u8imm, |
| 98847 | /* IN16rr */ |
| 98848 | /* IN32ri */ |
| 98849 | u8imm, |
| 98850 | /* IN32rr */ |
| 98851 | /* IN8ri */ |
| 98852 | u8imm, |
| 98853 | /* IN8rr */ |
| 98854 | /* INC16m */ |
| 98855 | i16mem, |
| 98856 | /* INC16m_EVEX */ |
| 98857 | i16mem, |
| 98858 | /* INC16m_ND */ |
| 98859 | GR16, i16mem, |
| 98860 | /* INC16m_NF */ |
| 98861 | i16mem, |
| 98862 | /* INC16m_NF_ND */ |
| 98863 | GR16, i16mem, |
| 98864 | /* INC16r */ |
| 98865 | GR16, GR16, |
| 98866 | /* INC16r_EVEX */ |
| 98867 | GR16, GR16, |
| 98868 | /* INC16r_ND */ |
| 98869 | GR16, GR16, |
| 98870 | /* INC16r_NF */ |
| 98871 | GR16, GR16, |
| 98872 | /* INC16r_NF_ND */ |
| 98873 | GR16, GR16, |
| 98874 | /* INC16r_alt */ |
| 98875 | GR16, GR16, |
| 98876 | /* INC32m */ |
| 98877 | i32mem, |
| 98878 | /* INC32m_EVEX */ |
| 98879 | i32mem, |
| 98880 | /* INC32m_ND */ |
| 98881 | GR32, i32mem, |
| 98882 | /* INC32m_NF */ |
| 98883 | i32mem, |
| 98884 | /* INC32m_NF_ND */ |
| 98885 | GR32, i32mem, |
| 98886 | /* INC32r */ |
| 98887 | GR32, GR32, |
| 98888 | /* INC32r_EVEX */ |
| 98889 | GR32, GR32, |
| 98890 | /* INC32r_ND */ |
| 98891 | GR32, GR32, |
| 98892 | /* INC32r_NF */ |
| 98893 | GR32, GR32, |
| 98894 | /* INC32r_NF_ND */ |
| 98895 | GR32, GR32, |
| 98896 | /* INC32r_alt */ |
| 98897 | GR32, GR32, |
| 98898 | /* INC64m */ |
| 98899 | i64mem, |
| 98900 | /* INC64m_EVEX */ |
| 98901 | i64mem, |
| 98902 | /* INC64m_ND */ |
| 98903 | GR64, i64mem, |
| 98904 | /* INC64m_NF */ |
| 98905 | i64mem, |
| 98906 | /* INC64m_NF_ND */ |
| 98907 | GR64, i64mem, |
| 98908 | /* INC64r */ |
| 98909 | GR64, GR64, |
| 98910 | /* INC64r_EVEX */ |
| 98911 | GR64, GR64, |
| 98912 | /* INC64r_ND */ |
| 98913 | GR64, GR64, |
| 98914 | /* INC64r_NF */ |
| 98915 | GR64, GR64, |
| 98916 | /* INC64r_NF_ND */ |
| 98917 | GR64, GR64, |
| 98918 | /* INC8m */ |
| 98919 | i8mem, |
| 98920 | /* INC8m_EVEX */ |
| 98921 | i8mem, |
| 98922 | /* INC8m_ND */ |
| 98923 | GR8, i8mem, |
| 98924 | /* INC8m_NF */ |
| 98925 | i8mem, |
| 98926 | /* INC8m_NF_ND */ |
| 98927 | GR8, i8mem, |
| 98928 | /* INC8r */ |
| 98929 | GR8, GR8, |
| 98930 | /* INC8r_EVEX */ |
| 98931 | GR8, GR8, |
| 98932 | /* INC8r_ND */ |
| 98933 | GR8, GR8, |
| 98934 | /* INC8r_NF */ |
| 98935 | GR8, GR8, |
| 98936 | /* INC8r_NF_ND */ |
| 98937 | GR8, GR8, |
| 98938 | /* INCSSPD */ |
| 98939 | GR32, |
| 98940 | /* INCSSPQ */ |
| 98941 | GR64, |
| 98942 | /* INSB */ |
| 98943 | dstidx8, |
| 98944 | /* INSERTPSrmi */ |
| 98945 | VR128, VR128, f32mem, u8imm, |
| 98946 | /* INSERTPSrri */ |
| 98947 | VR128, VR128, VR128, u8imm, |
| 98948 | /* INSERTQ */ |
| 98949 | VR128, VR128, VR128, |
| 98950 | /* INSERTQI */ |
| 98951 | VR128, VR128, VR128, u8imm, u8imm, |
| 98952 | /* INSL */ |
| 98953 | dstidx32, |
| 98954 | /* INSW */ |
| 98955 | dstidx16, |
| 98956 | /* INT */ |
| 98957 | u8imm, |
| 98958 | /* INT3 */ |
| 98959 | /* INTO */ |
| 98960 | /* INVD */ |
| 98961 | /* INVEPT32 */ |
| 98962 | GR32, i128mem, |
| 98963 | /* INVEPT64 */ |
| 98964 | GR64, i128mem, |
| 98965 | /* INVEPT64_EVEX */ |
| 98966 | GR64, i128mem, |
| 98967 | /* INVLPG */ |
| 98968 | i8mem, |
| 98969 | /* INVLPGA32 */ |
| 98970 | /* INVLPGA64 */ |
| 98971 | /* INVLPGB32 */ |
| 98972 | /* INVLPGB64 */ |
| 98973 | /* INVPCID32 */ |
| 98974 | GR32, i128mem, |
| 98975 | /* INVPCID64 */ |
| 98976 | GR64, i128mem, |
| 98977 | /* INVPCID64_EVEX */ |
| 98978 | GR64, i128mem, |
| 98979 | /* INVVPID32 */ |
| 98980 | GR32, i128mem, |
| 98981 | /* INVVPID64 */ |
| 98982 | GR64, i128mem, |
| 98983 | /* INVVPID64_EVEX */ |
| 98984 | GR64, i128mem, |
| 98985 | /* IRET */ |
| 98986 | i32imm, |
| 98987 | /* IRET16 */ |
| 98988 | /* IRET32 */ |
| 98989 | /* IRET64 */ |
| 98990 | /* ISTT_FP16m */ |
| 98991 | i16mem, |
| 98992 | /* ISTT_FP32m */ |
| 98993 | i32mem, |
| 98994 | /* ISTT_FP64m */ |
| 98995 | i64mem, |
| 98996 | /* ISTT_Fp16m32 */ |
| 98997 | i16mem, RFP32, |
| 98998 | /* ISTT_Fp16m64 */ |
| 98999 | i16mem, RFP64, |
| 99000 | /* ISTT_Fp16m80 */ |
| 99001 | i16mem, RFP80, |
| 99002 | /* ISTT_Fp32m32 */ |
| 99003 | i32mem, RFP32, |
| 99004 | /* ISTT_Fp32m64 */ |
| 99005 | i32mem, RFP64, |
| 99006 | /* ISTT_Fp32m80 */ |
| 99007 | i32mem, RFP80, |
| 99008 | /* ISTT_Fp64m32 */ |
| 99009 | i64mem, RFP32, |
| 99010 | /* ISTT_Fp64m64 */ |
| 99011 | i64mem, RFP64, |
| 99012 | /* ISTT_Fp64m80 */ |
| 99013 | i64mem, RFP80, |
| 99014 | /* IST_F16m */ |
| 99015 | i16mem, |
| 99016 | /* IST_F32m */ |
| 99017 | i32mem, |
| 99018 | /* IST_FP16m */ |
| 99019 | i16mem, |
| 99020 | /* IST_FP32m */ |
| 99021 | i32mem, |
| 99022 | /* IST_FP64m */ |
| 99023 | i64mem, |
| 99024 | /* IST_Fp16m32 */ |
| 99025 | i16mem, RFP32, |
| 99026 | /* IST_Fp16m64 */ |
| 99027 | i16mem, RFP64, |
| 99028 | /* IST_Fp16m80 */ |
| 99029 | i16mem, RFP80, |
| 99030 | /* IST_Fp32m32 */ |
| 99031 | i32mem, RFP32, |
| 99032 | /* IST_Fp32m64 */ |
| 99033 | i32mem, RFP64, |
| 99034 | /* IST_Fp32m80 */ |
| 99035 | i32mem, RFP80, |
| 99036 | /* IST_Fp64m32 */ |
| 99037 | i64mem, RFP32, |
| 99038 | /* IST_Fp64m64 */ |
| 99039 | i64mem, RFP64, |
| 99040 | /* IST_Fp64m80 */ |
| 99041 | i64mem, RFP80, |
| 99042 | /* Int_eh_sjlj_setup_dispatch */ |
| 99043 | /* JCC_1 */ |
| 99044 | brtarget8, ccode, |
| 99045 | /* JCC_2 */ |
| 99046 | brtarget16, ccode, |
| 99047 | /* JCC_4 */ |
| 99048 | brtarget32, ccode, |
| 99049 | /* JCXZ */ |
| 99050 | i8imm_brtarget, |
| 99051 | /* JECXZ */ |
| 99052 | i8imm_brtarget, |
| 99053 | /* JMP16m */ |
| 99054 | i16mem, |
| 99055 | /* JMP16m_NT */ |
| 99056 | i16mem, |
| 99057 | /* JMP16r */ |
| 99058 | GR16, |
| 99059 | /* JMP16r_NT */ |
| 99060 | GR16, |
| 99061 | /* JMP32m */ |
| 99062 | i32mem, |
| 99063 | /* JMP32m_NT */ |
| 99064 | i32mem, |
| 99065 | /* JMP32r */ |
| 99066 | GR32, |
| 99067 | /* JMP32r_NT */ |
| 99068 | GR32, |
| 99069 | /* JMP64m */ |
| 99070 | i64mem, |
| 99071 | /* JMP64m_NT */ |
| 99072 | i64mem, |
| 99073 | /* JMP64m_REX */ |
| 99074 | i64mem, |
| 99075 | /* JMP64r */ |
| 99076 | GR64, |
| 99077 | /* JMP64r_NT */ |
| 99078 | GR64, |
| 99079 | /* JMP64r_REX */ |
| 99080 | GR64, |
| 99081 | /* JMPABS64i */ |
| 99082 | i64imm, |
| 99083 | /* JMP_1 */ |
| 99084 | brtarget8, |
| 99085 | /* JMP_2 */ |
| 99086 | brtarget16, |
| 99087 | /* JMP_4 */ |
| 99088 | brtarget32, |
| 99089 | /* JRCXZ */ |
| 99090 | i8imm_brtarget, |
| 99091 | /* KADDBkk */ |
| 99092 | VK8, VK8, VK8, |
| 99093 | /* KADDDkk */ |
| 99094 | VK32, VK32, VK32, |
| 99095 | /* KADDQkk */ |
| 99096 | VK64, VK64, VK64, |
| 99097 | /* KADDWkk */ |
| 99098 | VK16, VK16, VK16, |
| 99099 | /* KANDBkk */ |
| 99100 | VK8, VK8, VK8, |
| 99101 | /* KANDDkk */ |
| 99102 | VK32, VK32, VK32, |
| 99103 | /* KANDNBkk */ |
| 99104 | VK8, VK8, VK8, |
| 99105 | /* KANDNDkk */ |
| 99106 | VK32, VK32, VK32, |
| 99107 | /* KANDNQkk */ |
| 99108 | VK64, VK64, VK64, |
| 99109 | /* KANDNWkk */ |
| 99110 | VK16, VK16, VK16, |
| 99111 | /* KANDQkk */ |
| 99112 | VK64, VK64, VK64, |
| 99113 | /* KANDWkk */ |
| 99114 | VK16, VK16, VK16, |
| 99115 | /* KCFI_CHECK */ |
| 99116 | GR64, i32imm, |
| 99117 | /* KMOVBkk */ |
| 99118 | VK8, VK8, |
| 99119 | /* KMOVBkk_EVEX */ |
| 99120 | VK8, VK8, |
| 99121 | /* KMOVBkm */ |
| 99122 | VK8, i8mem, |
| 99123 | /* KMOVBkm_EVEX */ |
| 99124 | VK8, i8mem, |
| 99125 | /* KMOVBkr */ |
| 99126 | VK8, GR32, |
| 99127 | /* KMOVBkr_EVEX */ |
| 99128 | VK8, GR32, |
| 99129 | /* KMOVBmk */ |
| 99130 | i8mem, VK8, |
| 99131 | /* KMOVBmk_EVEX */ |
| 99132 | i8mem, VK8, |
| 99133 | /* KMOVBrk */ |
| 99134 | GR32, VK8, |
| 99135 | /* KMOVBrk_EVEX */ |
| 99136 | GR32, VK8, |
| 99137 | /* KMOVDkk */ |
| 99138 | VK32, VK32, |
| 99139 | /* KMOVDkk_EVEX */ |
| 99140 | VK32, VK32, |
| 99141 | /* KMOVDkm */ |
| 99142 | VK32, i32mem, |
| 99143 | /* KMOVDkm_EVEX */ |
| 99144 | VK32, i32mem, |
| 99145 | /* KMOVDkr */ |
| 99146 | VK32, GR32, |
| 99147 | /* KMOVDkr_EVEX */ |
| 99148 | VK32, GR32, |
| 99149 | /* KMOVDmk */ |
| 99150 | i32mem, VK32, |
| 99151 | /* KMOVDmk_EVEX */ |
| 99152 | i32mem, VK32, |
| 99153 | /* KMOVDrk */ |
| 99154 | GR32, VK32, |
| 99155 | /* KMOVDrk_EVEX */ |
| 99156 | GR32, VK32, |
| 99157 | /* KMOVQkk */ |
| 99158 | VK64, VK64, |
| 99159 | /* KMOVQkk_EVEX */ |
| 99160 | VK64, VK64, |
| 99161 | /* KMOVQkm */ |
| 99162 | VK64, i64mem, |
| 99163 | /* KMOVQkm_EVEX */ |
| 99164 | VK64, i64mem, |
| 99165 | /* KMOVQkr */ |
| 99166 | VK64, GR64, |
| 99167 | /* KMOVQkr_EVEX */ |
| 99168 | VK64, GR64, |
| 99169 | /* KMOVQmk */ |
| 99170 | i64mem, VK64, |
| 99171 | /* KMOVQmk_EVEX */ |
| 99172 | i64mem, VK64, |
| 99173 | /* KMOVQrk */ |
| 99174 | GR64, VK64, |
| 99175 | /* KMOVQrk_EVEX */ |
| 99176 | GR64, VK64, |
| 99177 | /* KMOVWkk */ |
| 99178 | VK16, VK16, |
| 99179 | /* KMOVWkk_EVEX */ |
| 99180 | VK16, VK16, |
| 99181 | /* KMOVWkm */ |
| 99182 | VK16, i16mem, |
| 99183 | /* KMOVWkm_EVEX */ |
| 99184 | VK16, i16mem, |
| 99185 | /* KMOVWkr */ |
| 99186 | VK16, GR32, |
| 99187 | /* KMOVWkr_EVEX */ |
| 99188 | VK16, GR32, |
| 99189 | /* KMOVWmk */ |
| 99190 | i16mem, VK16, |
| 99191 | /* KMOVWmk_EVEX */ |
| 99192 | i16mem, VK16, |
| 99193 | /* KMOVWrk */ |
| 99194 | GR32, VK16, |
| 99195 | /* KMOVWrk_EVEX */ |
| 99196 | GR32, VK16, |
| 99197 | /* KNOTBkk */ |
| 99198 | VK8, VK8, |
| 99199 | /* KNOTDkk */ |
| 99200 | VK32, VK32, |
| 99201 | /* KNOTQkk */ |
| 99202 | VK64, VK64, |
| 99203 | /* KNOTWkk */ |
| 99204 | VK16, VK16, |
| 99205 | /* KORBkk */ |
| 99206 | VK8, VK8, VK8, |
| 99207 | /* KORDkk */ |
| 99208 | VK32, VK32, VK32, |
| 99209 | /* KORQkk */ |
| 99210 | VK64, VK64, VK64, |
| 99211 | /* KORTESTBkk */ |
| 99212 | VK8, VK8, |
| 99213 | /* KORTESTDkk */ |
| 99214 | VK32, VK32, |
| 99215 | /* KORTESTQkk */ |
| 99216 | VK64, VK64, |
| 99217 | /* KORTESTWkk */ |
| 99218 | VK16, VK16, |
| 99219 | /* KORWkk */ |
| 99220 | VK16, VK16, VK16, |
| 99221 | /* KSHIFTLBki */ |
| 99222 | VK8, VK8, u8imm, |
| 99223 | /* KSHIFTLDki */ |
| 99224 | VK32, VK32, u8imm, |
| 99225 | /* KSHIFTLQki */ |
| 99226 | VK64, VK64, u8imm, |
| 99227 | /* KSHIFTLWki */ |
| 99228 | VK16, VK16, u8imm, |
| 99229 | /* KSHIFTRBki */ |
| 99230 | VK8, VK8, u8imm, |
| 99231 | /* KSHIFTRDki */ |
| 99232 | VK32, VK32, u8imm, |
| 99233 | /* KSHIFTRQki */ |
| 99234 | VK64, VK64, u8imm, |
| 99235 | /* KSHIFTRWki */ |
| 99236 | VK16, VK16, u8imm, |
| 99237 | /* KTESTBkk */ |
| 99238 | VK8, VK8, |
| 99239 | /* KTESTDkk */ |
| 99240 | VK32, VK32, |
| 99241 | /* KTESTQkk */ |
| 99242 | VK64, VK64, |
| 99243 | /* KTESTWkk */ |
| 99244 | VK16, VK16, |
| 99245 | /* KUNPCKBWkk */ |
| 99246 | VK16, VK8, VK8, |
| 99247 | /* KUNPCKDQkk */ |
| 99248 | VK64, VK32, VK32, |
| 99249 | /* KUNPCKWDkk */ |
| 99250 | VK32, VK16, VK16, |
| 99251 | /* KXNORBkk */ |
| 99252 | VK8, VK8, VK8, |
| 99253 | /* KXNORDkk */ |
| 99254 | VK32, VK32, VK32, |
| 99255 | /* KXNORQkk */ |
| 99256 | VK64, VK64, VK64, |
| 99257 | /* KXNORWkk */ |
| 99258 | VK16, VK16, VK16, |
| 99259 | /* KXORBkk */ |
| 99260 | VK8, VK8, VK8, |
| 99261 | /* KXORDkk */ |
| 99262 | VK32, VK32, VK32, |
| 99263 | /* KXORQkk */ |
| 99264 | VK64, VK64, VK64, |
| 99265 | /* KXORWkk */ |
| 99266 | VK16, VK16, VK16, |
| 99267 | /* LAHF */ |
| 99268 | /* LAR16rm */ |
| 99269 | GR16, i16mem, |
| 99270 | /* LAR16rr */ |
| 99271 | GR16, GR16orGR32orGR64, |
| 99272 | /* LAR32rm */ |
| 99273 | GR32, i16mem, |
| 99274 | /* LAR32rr */ |
| 99275 | GR32, GR16orGR32orGR64, |
| 99276 | /* LAR64rm */ |
| 99277 | GR64, i16mem, |
| 99278 | /* LAR64rr */ |
| 99279 | GR64, GR16orGR32orGR64, |
| 99280 | /* LCMPXCHG16 */ |
| 99281 | i16mem, GR16, |
| 99282 | /* LCMPXCHG16B */ |
| 99283 | i128mem, |
| 99284 | /* LCMPXCHG32 */ |
| 99285 | i32mem, GR32, |
| 99286 | /* LCMPXCHG64 */ |
| 99287 | i64mem, GR64, |
| 99288 | /* LCMPXCHG8 */ |
| 99289 | i8mem, GR8, |
| 99290 | /* LCMPXCHG8B */ |
| 99291 | i64mem, |
| 99292 | /* LDDQUrm */ |
| 99293 | VR128, i128mem, |
| 99294 | /* LDMXCSR */ |
| 99295 | i32mem, |
| 99296 | /* LDS16rm */ |
| 99297 | GR16, opaquemem, |
| 99298 | /* LDS32rm */ |
| 99299 | GR32, opaquemem, |
| 99300 | /* LDTILECFG */ |
| 99301 | opaquemem, |
| 99302 | /* LDTILECFG_EVEX */ |
| 99303 | opaquemem, |
| 99304 | /* LD_F0 */ |
| 99305 | /* LD_F1 */ |
| 99306 | /* LD_F32m */ |
| 99307 | f32mem, |
| 99308 | /* LD_F64m */ |
| 99309 | f64mem, |
| 99310 | /* LD_F80m */ |
| 99311 | f80mem, |
| 99312 | /* LD_Fp032 */ |
| 99313 | RFP32, |
| 99314 | /* LD_Fp064 */ |
| 99315 | RFP64, |
| 99316 | /* LD_Fp080 */ |
| 99317 | RFP80, |
| 99318 | /* LD_Fp132 */ |
| 99319 | RFP32, |
| 99320 | /* LD_Fp164 */ |
| 99321 | RFP64, |
| 99322 | /* LD_Fp180 */ |
| 99323 | RFP80, |
| 99324 | /* LD_Fp32m */ |
| 99325 | RFP32, f32mem, |
| 99326 | /* LD_Fp32m64 */ |
| 99327 | RFP64, f32mem, |
| 99328 | /* LD_Fp32m80 */ |
| 99329 | RFP80, f32mem, |
| 99330 | /* LD_Fp64m */ |
| 99331 | RFP64, f64mem, |
| 99332 | /* LD_Fp64m80 */ |
| 99333 | RFP80, f64mem, |
| 99334 | /* LD_Fp80m */ |
| 99335 | RFP80, f80mem, |
| 99336 | /* LD_Frr */ |
| 99337 | RSTi, |
| 99338 | /* LEA16r */ |
| 99339 | GR16, anymem, |
| 99340 | /* LEA32r */ |
| 99341 | GR32, anymem, |
| 99342 | /* LEA64_16r */ |
| 99343 | GR16, lea64_16mem, |
| 99344 | /* LEA64_32r */ |
| 99345 | GR32, lea64_32mem, |
| 99346 | /* LEA64_8r */ |
| 99347 | GR8, lea64_8mem, |
| 99348 | /* LEA64r */ |
| 99349 | GR64, lea64mem, |
| 99350 | /* LEAVE */ |
| 99351 | /* LEAVE64 */ |
| 99352 | /* LES16rm */ |
| 99353 | GR16, opaquemem, |
| 99354 | /* LES32rm */ |
| 99355 | GR32, opaquemem, |
| 99356 | /* LFENCE */ |
| 99357 | /* LFS16rm */ |
| 99358 | GR16, opaquemem, |
| 99359 | /* LFS32rm */ |
| 99360 | GR32, opaquemem, |
| 99361 | /* LFS64rm */ |
| 99362 | GR64, opaquemem, |
| 99363 | /* LGDT16m */ |
| 99364 | opaquemem, |
| 99365 | /* LGDT32m */ |
| 99366 | opaquemem, |
| 99367 | /* LGDT64m */ |
| 99368 | opaquemem, |
| 99369 | /* LGS16rm */ |
| 99370 | GR16, opaquemem, |
| 99371 | /* LGS32rm */ |
| 99372 | GR32, opaquemem, |
| 99373 | /* LGS64rm */ |
| 99374 | GR64, opaquemem, |
| 99375 | /* LIDT16m */ |
| 99376 | opaquemem, |
| 99377 | /* LIDT32m */ |
| 99378 | opaquemem, |
| 99379 | /* LIDT64m */ |
| 99380 | opaquemem, |
| 99381 | /* LKGS16m */ |
| 99382 | i16mem, |
| 99383 | /* LKGS16r */ |
| 99384 | GR16, |
| 99385 | /* LLDT16m */ |
| 99386 | i16mem, |
| 99387 | /* LLDT16r */ |
| 99388 | GR16, |
| 99389 | /* LLWPCB */ |
| 99390 | GR32, |
| 99391 | /* LLWPCB64 */ |
| 99392 | GR64, |
| 99393 | /* LMSW16m */ |
| 99394 | i16mem, |
| 99395 | /* LMSW16r */ |
| 99396 | GR16, |
| 99397 | /* LOADIWKEY */ |
| 99398 | VR128, VR128, |
| 99399 | /* LOCK_ADD16mi */ |
| 99400 | i16mem, i16imm, |
| 99401 | /* LOCK_ADD16mi8 */ |
| 99402 | i16mem, i16i8imm, |
| 99403 | /* LOCK_ADD16mr */ |
| 99404 | i16mem, GR16, |
| 99405 | /* LOCK_ADD32mi */ |
| 99406 | i32mem, i32imm, |
| 99407 | /* LOCK_ADD32mi8 */ |
| 99408 | i32mem, i32i8imm, |
| 99409 | /* LOCK_ADD32mr */ |
| 99410 | i32mem, GR32, |
| 99411 | /* LOCK_ADD64mi32 */ |
| 99412 | i64mem, i64i32imm, |
| 99413 | /* LOCK_ADD64mi8 */ |
| 99414 | i64mem, i64i8imm, |
| 99415 | /* LOCK_ADD64mr */ |
| 99416 | i64mem, GR64, |
| 99417 | /* LOCK_ADD8mi */ |
| 99418 | i8mem, i8imm, |
| 99419 | /* LOCK_ADD8mr */ |
| 99420 | i8mem, GR8, |
| 99421 | /* LOCK_AND16mi */ |
| 99422 | i16mem, i16imm, |
| 99423 | /* LOCK_AND16mi8 */ |
| 99424 | i16mem, i16i8imm, |
| 99425 | /* LOCK_AND16mr */ |
| 99426 | i16mem, GR16, |
| 99427 | /* LOCK_AND32mi */ |
| 99428 | i32mem, i32imm, |
| 99429 | /* LOCK_AND32mi8 */ |
| 99430 | i32mem, i32i8imm, |
| 99431 | /* LOCK_AND32mr */ |
| 99432 | i32mem, GR32, |
| 99433 | /* LOCK_AND64mi32 */ |
| 99434 | i64mem, i64i32imm, |
| 99435 | /* LOCK_AND64mi8 */ |
| 99436 | i64mem, i64i8imm, |
| 99437 | /* LOCK_AND64mr */ |
| 99438 | i64mem, GR64, |
| 99439 | /* LOCK_AND8mi */ |
| 99440 | i8mem, i8imm, |
| 99441 | /* LOCK_AND8mr */ |
| 99442 | i8mem, GR8, |
| 99443 | /* LOCK_BTC16m */ |
| 99444 | i16mem, i8imm, |
| 99445 | /* LOCK_BTC32m */ |
| 99446 | i32mem, i8imm, |
| 99447 | /* LOCK_BTC64m */ |
| 99448 | i64mem, i8imm, |
| 99449 | /* LOCK_BTC_RM16rm */ |
| 99450 | i16mem, GR16, |
| 99451 | /* LOCK_BTC_RM32rm */ |
| 99452 | i32mem, GR32, |
| 99453 | /* LOCK_BTC_RM64rm */ |
| 99454 | i64mem, GR64, |
| 99455 | /* LOCK_BTR16m */ |
| 99456 | i16mem, i8imm, |
| 99457 | /* LOCK_BTR32m */ |
| 99458 | i32mem, i8imm, |
| 99459 | /* LOCK_BTR64m */ |
| 99460 | i64mem, i8imm, |
| 99461 | /* LOCK_BTR_RM16rm */ |
| 99462 | i16mem, GR16, |
| 99463 | /* LOCK_BTR_RM32rm */ |
| 99464 | i32mem, GR32, |
| 99465 | /* LOCK_BTR_RM64rm */ |
| 99466 | i64mem, GR64, |
| 99467 | /* LOCK_BTS16m */ |
| 99468 | i16mem, i8imm, |
| 99469 | /* LOCK_BTS32m */ |
| 99470 | i32mem, i8imm, |
| 99471 | /* LOCK_BTS64m */ |
| 99472 | i64mem, i8imm, |
| 99473 | /* LOCK_BTS_RM16rm */ |
| 99474 | i16mem, GR16, |
| 99475 | /* LOCK_BTS_RM32rm */ |
| 99476 | i32mem, GR32, |
| 99477 | /* LOCK_BTS_RM64rm */ |
| 99478 | i64mem, GR64, |
| 99479 | /* LOCK_DEC16m */ |
| 99480 | i16mem, |
| 99481 | /* LOCK_DEC32m */ |
| 99482 | i32mem, |
| 99483 | /* LOCK_DEC64m */ |
| 99484 | i64mem, |
| 99485 | /* LOCK_DEC8m */ |
| 99486 | i8mem, |
| 99487 | /* LOCK_INC16m */ |
| 99488 | i16mem, |
| 99489 | /* LOCK_INC32m */ |
| 99490 | i32mem, |
| 99491 | /* LOCK_INC64m */ |
| 99492 | i64mem, |
| 99493 | /* LOCK_INC8m */ |
| 99494 | i8mem, |
| 99495 | /* LOCK_OR16mi */ |
| 99496 | i16mem, i16imm, |
| 99497 | /* LOCK_OR16mi8 */ |
| 99498 | i16mem, i16i8imm, |
| 99499 | /* LOCK_OR16mr */ |
| 99500 | i16mem, GR16, |
| 99501 | /* LOCK_OR32mi */ |
| 99502 | i32mem, i32imm, |
| 99503 | /* LOCK_OR32mi8 */ |
| 99504 | i32mem, i32i8imm, |
| 99505 | /* LOCK_OR32mr */ |
| 99506 | i32mem, GR32, |
| 99507 | /* LOCK_OR64mi32 */ |
| 99508 | i64mem, i64i32imm, |
| 99509 | /* LOCK_OR64mi8 */ |
| 99510 | i64mem, i64i8imm, |
| 99511 | /* LOCK_OR64mr */ |
| 99512 | i64mem, GR64, |
| 99513 | /* LOCK_OR8mi */ |
| 99514 | i8mem, i8imm, |
| 99515 | /* LOCK_OR8mr */ |
| 99516 | i8mem, GR8, |
| 99517 | /* LOCK_PREFIX */ |
| 99518 | /* LOCK_SUB16mi */ |
| 99519 | i16mem, i16imm, |
| 99520 | /* LOCK_SUB16mi8 */ |
| 99521 | i16mem, i16i8imm, |
| 99522 | /* LOCK_SUB16mr */ |
| 99523 | i16mem, GR16, |
| 99524 | /* LOCK_SUB32mi */ |
| 99525 | i32mem, i32imm, |
| 99526 | /* LOCK_SUB32mi8 */ |
| 99527 | i32mem, i32i8imm, |
| 99528 | /* LOCK_SUB32mr */ |
| 99529 | i32mem, GR32, |
| 99530 | /* LOCK_SUB64mi32 */ |
| 99531 | i64mem, i64i32imm, |
| 99532 | /* LOCK_SUB64mi8 */ |
| 99533 | i64mem, i64i8imm, |
| 99534 | /* LOCK_SUB64mr */ |
| 99535 | i64mem, GR64, |
| 99536 | /* LOCK_SUB8mi */ |
| 99537 | i8mem, i8imm, |
| 99538 | /* LOCK_SUB8mr */ |
| 99539 | i8mem, GR8, |
| 99540 | /* LOCK_XOR16mi */ |
| 99541 | i16mem, i16imm, |
| 99542 | /* LOCK_XOR16mi8 */ |
| 99543 | i16mem, i16i8imm, |
| 99544 | /* LOCK_XOR16mr */ |
| 99545 | i16mem, GR16, |
| 99546 | /* LOCK_XOR32mi */ |
| 99547 | i32mem, i32imm, |
| 99548 | /* LOCK_XOR32mi8 */ |
| 99549 | i32mem, i32i8imm, |
| 99550 | /* LOCK_XOR32mr */ |
| 99551 | i32mem, GR32, |
| 99552 | /* LOCK_XOR64mi32 */ |
| 99553 | i64mem, i64i32imm, |
| 99554 | /* LOCK_XOR64mi8 */ |
| 99555 | i64mem, i64i8imm, |
| 99556 | /* LOCK_XOR64mr */ |
| 99557 | i64mem, GR64, |
| 99558 | /* LOCK_XOR8mi */ |
| 99559 | i8mem, i8imm, |
| 99560 | /* LOCK_XOR8mr */ |
| 99561 | i8mem, GR8, |
| 99562 | /* LODSB */ |
| 99563 | srcidx8, |
| 99564 | /* LODSL */ |
| 99565 | srcidx32, |
| 99566 | /* LODSQ */ |
| 99567 | srcidx64, |
| 99568 | /* LODSW */ |
| 99569 | srcidx16, |
| 99570 | /* LOOP */ |
| 99571 | i8imm_brtarget, |
| 99572 | /* LOOPE */ |
| 99573 | i8imm_brtarget, |
| 99574 | /* LOOPNE */ |
| 99575 | i8imm_brtarget, |
| 99576 | /* LRET16 */ |
| 99577 | /* LRET32 */ |
| 99578 | /* LRET64 */ |
| 99579 | /* LRETI16 */ |
| 99580 | i16imm, |
| 99581 | /* LRETI32 */ |
| 99582 | i16imm, |
| 99583 | /* LRETI64 */ |
| 99584 | i16imm, |
| 99585 | /* LSL16rm */ |
| 99586 | GR16, i16mem, |
| 99587 | /* LSL16rr */ |
| 99588 | GR16, GR16orGR32orGR64, |
| 99589 | /* LSL32rm */ |
| 99590 | GR32, i16mem, |
| 99591 | /* LSL32rr */ |
| 99592 | GR32, GR16orGR32orGR64, |
| 99593 | /* LSL64rm */ |
| 99594 | GR64, i16mem, |
| 99595 | /* LSL64rr */ |
| 99596 | GR64, GR16orGR32orGR64, |
| 99597 | /* LSS16rm */ |
| 99598 | GR16, opaquemem, |
| 99599 | /* LSS32rm */ |
| 99600 | GR32, opaquemem, |
| 99601 | /* LSS64rm */ |
| 99602 | GR64, opaquemem, |
| 99603 | /* LTRm */ |
| 99604 | i16mem, |
| 99605 | /* LTRr */ |
| 99606 | GR16, |
| 99607 | /* LWPINS32rmi */ |
| 99608 | GR32, i32mem, i32imm, |
| 99609 | /* LWPINS32rri */ |
| 99610 | GR32, GR32, i32imm, |
| 99611 | /* LWPINS64rmi */ |
| 99612 | GR64, i32mem, i32imm, |
| 99613 | /* LWPINS64rri */ |
| 99614 | GR64, GR32, i32imm, |
| 99615 | /* LWPVAL32rmi */ |
| 99616 | GR32, i32mem, i32imm, |
| 99617 | /* LWPVAL32rri */ |
| 99618 | GR32, GR32, i32imm, |
| 99619 | /* LWPVAL64rmi */ |
| 99620 | GR64, i32mem, i32imm, |
| 99621 | /* LWPVAL64rri */ |
| 99622 | GR64, GR32, i32imm, |
| 99623 | /* LXADD16 */ |
| 99624 | GR16, GR16, i16mem, |
| 99625 | /* LXADD32 */ |
| 99626 | GR32, GR32, i32mem, |
| 99627 | /* LXADD64 */ |
| 99628 | GR64, GR64, i64mem, |
| 99629 | /* LXADD8 */ |
| 99630 | GR8, GR8, i8mem, |
| 99631 | /* LZCNT16rm */ |
| 99632 | GR16, i16mem, |
| 99633 | /* LZCNT16rm_EVEX */ |
| 99634 | GR16, i16mem, |
| 99635 | /* LZCNT16rm_NF */ |
| 99636 | GR16, i16mem, |
| 99637 | /* LZCNT16rr */ |
| 99638 | GR16, GR16, |
| 99639 | /* LZCNT16rr_EVEX */ |
| 99640 | GR16, GR16, |
| 99641 | /* LZCNT16rr_NF */ |
| 99642 | GR16, GR16, |
| 99643 | /* LZCNT32rm */ |
| 99644 | GR32, i32mem, |
| 99645 | /* LZCNT32rm_EVEX */ |
| 99646 | GR32, i32mem, |
| 99647 | /* LZCNT32rm_NF */ |
| 99648 | GR32, i32mem, |
| 99649 | /* LZCNT32rr */ |
| 99650 | GR32, GR32, |
| 99651 | /* LZCNT32rr_EVEX */ |
| 99652 | GR32, GR32, |
| 99653 | /* LZCNT32rr_NF */ |
| 99654 | GR32, GR32, |
| 99655 | /* LZCNT64rm */ |
| 99656 | GR64, i64mem, |
| 99657 | /* LZCNT64rm_EVEX */ |
| 99658 | GR64, i64mem, |
| 99659 | /* LZCNT64rm_NF */ |
| 99660 | GR64, i64mem, |
| 99661 | /* LZCNT64rr */ |
| 99662 | GR64, GR64, |
| 99663 | /* LZCNT64rr_EVEX */ |
| 99664 | GR64, GR64, |
| 99665 | /* LZCNT64rr_NF */ |
| 99666 | GR64, GR64, |
| 99667 | /* MASKMOVDQU */ |
| 99668 | VR128, VR128, |
| 99669 | /* MASKMOVDQU64 */ |
| 99670 | VR128, VR128, |
| 99671 | /* MASKPAIR16LOAD */ |
| 99672 | VK16PAIR, anymem, |
| 99673 | /* MASKPAIR16STORE */ |
| 99674 | anymem, VK16PAIR, |
| 99675 | /* MAXCPDrm */ |
| 99676 | VR128, VR128, f128mem, |
| 99677 | /* MAXCPDrr */ |
| 99678 | VR128, VR128, VR128, |
| 99679 | /* MAXCPSrm */ |
| 99680 | VR128, VR128, f128mem, |
| 99681 | /* MAXCPSrr */ |
| 99682 | VR128, VR128, VR128, |
| 99683 | /* MAXCSDrm */ |
| 99684 | FR64, FR64, f64mem, |
| 99685 | /* MAXCSDrr */ |
| 99686 | FR64, FR64, FR64, |
| 99687 | /* MAXCSSrm */ |
| 99688 | FR32, FR32, f32mem, |
| 99689 | /* MAXCSSrr */ |
| 99690 | FR32, FR32, FR32, |
| 99691 | /* MAXPDrm */ |
| 99692 | VR128, VR128, f128mem, |
| 99693 | /* MAXPDrr */ |
| 99694 | VR128, VR128, VR128, |
| 99695 | /* MAXPSrm */ |
| 99696 | VR128, VR128, f128mem, |
| 99697 | /* MAXPSrr */ |
| 99698 | VR128, VR128, VR128, |
| 99699 | /* MAXSDrm */ |
| 99700 | FR64, FR64, f64mem, |
| 99701 | /* MAXSDrm_Int */ |
| 99702 | VR128, VR128, sdmem, |
| 99703 | /* MAXSDrr */ |
| 99704 | FR64, FR64, FR64, |
| 99705 | /* MAXSDrr_Int */ |
| 99706 | VR128, VR128, VR128, |
| 99707 | /* MAXSSrm */ |
| 99708 | FR32, FR32, f32mem, |
| 99709 | /* MAXSSrm_Int */ |
| 99710 | VR128, VR128, ssmem, |
| 99711 | /* MAXSSrr */ |
| 99712 | FR32, FR32, FR32, |
| 99713 | /* MAXSSrr_Int */ |
| 99714 | VR128, VR128, VR128, |
| 99715 | /* MFENCE */ |
| 99716 | /* MINCPDrm */ |
| 99717 | VR128, VR128, f128mem, |
| 99718 | /* MINCPDrr */ |
| 99719 | VR128, VR128, VR128, |
| 99720 | /* MINCPSrm */ |
| 99721 | VR128, VR128, f128mem, |
| 99722 | /* MINCPSrr */ |
| 99723 | VR128, VR128, VR128, |
| 99724 | /* MINCSDrm */ |
| 99725 | FR64, FR64, f64mem, |
| 99726 | /* MINCSDrr */ |
| 99727 | FR64, FR64, FR64, |
| 99728 | /* MINCSSrm */ |
| 99729 | FR32, FR32, f32mem, |
| 99730 | /* MINCSSrr */ |
| 99731 | FR32, FR32, FR32, |
| 99732 | /* MINPDrm */ |
| 99733 | VR128, VR128, f128mem, |
| 99734 | /* MINPDrr */ |
| 99735 | VR128, VR128, VR128, |
| 99736 | /* MINPSrm */ |
| 99737 | VR128, VR128, f128mem, |
| 99738 | /* MINPSrr */ |
| 99739 | VR128, VR128, VR128, |
| 99740 | /* MINSDrm */ |
| 99741 | FR64, FR64, f64mem, |
| 99742 | /* MINSDrm_Int */ |
| 99743 | VR128, VR128, sdmem, |
| 99744 | /* MINSDrr */ |
| 99745 | FR64, FR64, FR64, |
| 99746 | /* MINSDrr_Int */ |
| 99747 | VR128, VR128, VR128, |
| 99748 | /* MINSSrm */ |
| 99749 | FR32, FR32, f32mem, |
| 99750 | /* MINSSrm_Int */ |
| 99751 | VR128, VR128, ssmem, |
| 99752 | /* MINSSrr */ |
| 99753 | FR32, FR32, FR32, |
| 99754 | /* MINSSrr_Int */ |
| 99755 | VR128, VR128, VR128, |
| 99756 | /* MMX_CVTPD2PIrm */ |
| 99757 | VR64, f128mem, |
| 99758 | /* MMX_CVTPD2PIrr */ |
| 99759 | VR64, VR128, |
| 99760 | /* MMX_CVTPI2PDrm */ |
| 99761 | VR128, i64mem, |
| 99762 | /* MMX_CVTPI2PDrr */ |
| 99763 | VR128, VR64, |
| 99764 | /* MMX_CVTPI2PSrm */ |
| 99765 | VR128, VR128, i64mem, |
| 99766 | /* MMX_CVTPI2PSrr */ |
| 99767 | VR128, VR128, VR64, |
| 99768 | /* MMX_CVTPS2PIrm */ |
| 99769 | VR64, f64mem, |
| 99770 | /* MMX_CVTPS2PIrr */ |
| 99771 | VR64, VR128, |
| 99772 | /* MMX_CVTTPD2PIrm */ |
| 99773 | VR64, f128mem, |
| 99774 | /* MMX_CVTTPD2PIrr */ |
| 99775 | VR64, VR128, |
| 99776 | /* MMX_CVTTPS2PIrm */ |
| 99777 | VR64, f64mem, |
| 99778 | /* MMX_CVTTPS2PIrr */ |
| 99779 | VR64, VR128, |
| 99780 | /* MMX_EMMS */ |
| 99781 | /* MMX_MASKMOVQ */ |
| 99782 | VR64, VR64, |
| 99783 | /* MMX_MASKMOVQ64 */ |
| 99784 | VR64, VR64, |
| 99785 | /* MMX_MOVD64from64mr */ |
| 99786 | i64mem, VR64, |
| 99787 | /* MMX_MOVD64from64rr */ |
| 99788 | GR64, VR64, |
| 99789 | /* MMX_MOVD64grr */ |
| 99790 | GR32, VR64, |
| 99791 | /* MMX_MOVD64mr */ |
| 99792 | i32mem, VR64, |
| 99793 | /* MMX_MOVD64rm */ |
| 99794 | VR64, i32mem, |
| 99795 | /* MMX_MOVD64rr */ |
| 99796 | VR64, GR32, |
| 99797 | /* MMX_MOVD64to64rm */ |
| 99798 | VR64, i64mem, |
| 99799 | /* MMX_MOVD64to64rr */ |
| 99800 | VR64, GR64, |
| 99801 | /* MMX_MOVDQ2Qrr */ |
| 99802 | VR64, VR128, |
| 99803 | /* MMX_MOVFR642Qrr */ |
| 99804 | VR64, FR64, |
| 99805 | /* MMX_MOVNTQmr */ |
| 99806 | i64mem, VR64, |
| 99807 | /* MMX_MOVQ2DQrr */ |
| 99808 | VR128, VR64, |
| 99809 | /* MMX_MOVQ2FR64rr */ |
| 99810 | FR64, VR64, |
| 99811 | /* MMX_MOVQ64mr */ |
| 99812 | i64mem, VR64, |
| 99813 | /* MMX_MOVQ64rm */ |
| 99814 | VR64, i64mem, |
| 99815 | /* MMX_MOVQ64rr */ |
| 99816 | VR64, VR64, |
| 99817 | /* MMX_MOVQ64rr_REV */ |
| 99818 | VR64, VR64, |
| 99819 | /* MMX_PABSBrm */ |
| 99820 | VR64, i64mem, |
| 99821 | /* MMX_PABSBrr */ |
| 99822 | VR64, VR64, |
| 99823 | /* MMX_PABSDrm */ |
| 99824 | VR64, i64mem, |
| 99825 | /* MMX_PABSDrr */ |
| 99826 | VR64, VR64, |
| 99827 | /* MMX_PABSWrm */ |
| 99828 | VR64, i64mem, |
| 99829 | /* MMX_PABSWrr */ |
| 99830 | VR64, VR64, |
| 99831 | /* MMX_PACKSSDWrm */ |
| 99832 | VR64, VR64, i64mem, |
| 99833 | /* MMX_PACKSSDWrr */ |
| 99834 | VR64, VR64, VR64, |
| 99835 | /* MMX_PACKSSWBrm */ |
| 99836 | VR64, VR64, i64mem, |
| 99837 | /* MMX_PACKSSWBrr */ |
| 99838 | VR64, VR64, VR64, |
| 99839 | /* MMX_PACKUSWBrm */ |
| 99840 | VR64, VR64, i64mem, |
| 99841 | /* MMX_PACKUSWBrr */ |
| 99842 | VR64, VR64, VR64, |
| 99843 | /* MMX_PADDBrm */ |
| 99844 | VR64, VR64, i64mem, |
| 99845 | /* MMX_PADDBrr */ |
| 99846 | VR64, VR64, VR64, |
| 99847 | /* MMX_PADDDrm */ |
| 99848 | VR64, VR64, i64mem, |
| 99849 | /* MMX_PADDDrr */ |
| 99850 | VR64, VR64, VR64, |
| 99851 | /* MMX_PADDQrm */ |
| 99852 | VR64, VR64, i64mem, |
| 99853 | /* MMX_PADDQrr */ |
| 99854 | VR64, VR64, VR64, |
| 99855 | /* MMX_PADDSBrm */ |
| 99856 | VR64, VR64, i64mem, |
| 99857 | /* MMX_PADDSBrr */ |
| 99858 | VR64, VR64, VR64, |
| 99859 | /* MMX_PADDSWrm */ |
| 99860 | VR64, VR64, i64mem, |
| 99861 | /* MMX_PADDSWrr */ |
| 99862 | VR64, VR64, VR64, |
| 99863 | /* MMX_PADDUSBrm */ |
| 99864 | VR64, VR64, i64mem, |
| 99865 | /* MMX_PADDUSBrr */ |
| 99866 | VR64, VR64, VR64, |
| 99867 | /* MMX_PADDUSWrm */ |
| 99868 | VR64, VR64, i64mem, |
| 99869 | /* MMX_PADDUSWrr */ |
| 99870 | VR64, VR64, VR64, |
| 99871 | /* MMX_PADDWrm */ |
| 99872 | VR64, VR64, i64mem, |
| 99873 | /* MMX_PADDWrr */ |
| 99874 | VR64, VR64, VR64, |
| 99875 | /* MMX_PALIGNRrmi */ |
| 99876 | VR64, VR64, i64mem, u8imm, |
| 99877 | /* MMX_PALIGNRrri */ |
| 99878 | VR64, VR64, VR64, u8imm, |
| 99879 | /* MMX_PANDNrm */ |
| 99880 | VR64, VR64, i64mem, |
| 99881 | /* MMX_PANDNrr */ |
| 99882 | VR64, VR64, VR64, |
| 99883 | /* MMX_PANDrm */ |
| 99884 | VR64, VR64, i64mem, |
| 99885 | /* MMX_PANDrr */ |
| 99886 | VR64, VR64, VR64, |
| 99887 | /* MMX_PAVGBrm */ |
| 99888 | VR64, VR64, i64mem, |
| 99889 | /* MMX_PAVGBrr */ |
| 99890 | VR64, VR64, VR64, |
| 99891 | /* MMX_PAVGWrm */ |
| 99892 | VR64, VR64, i64mem, |
| 99893 | /* MMX_PAVGWrr */ |
| 99894 | VR64, VR64, VR64, |
| 99895 | /* MMX_PCMPEQBrm */ |
| 99896 | VR64, VR64, i64mem, |
| 99897 | /* MMX_PCMPEQBrr */ |
| 99898 | VR64, VR64, VR64, |
| 99899 | /* MMX_PCMPEQDrm */ |
| 99900 | VR64, VR64, i64mem, |
| 99901 | /* MMX_PCMPEQDrr */ |
| 99902 | VR64, VR64, VR64, |
| 99903 | /* MMX_PCMPEQWrm */ |
| 99904 | VR64, VR64, i64mem, |
| 99905 | /* MMX_PCMPEQWrr */ |
| 99906 | VR64, VR64, VR64, |
| 99907 | /* MMX_PCMPGTBrm */ |
| 99908 | VR64, VR64, i64mem, |
| 99909 | /* MMX_PCMPGTBrr */ |
| 99910 | VR64, VR64, VR64, |
| 99911 | /* MMX_PCMPGTDrm */ |
| 99912 | VR64, VR64, i64mem, |
| 99913 | /* MMX_PCMPGTDrr */ |
| 99914 | VR64, VR64, VR64, |
| 99915 | /* MMX_PCMPGTWrm */ |
| 99916 | VR64, VR64, i64mem, |
| 99917 | /* MMX_PCMPGTWrr */ |
| 99918 | VR64, VR64, VR64, |
| 99919 | /* MMX_PEXTRWrri */ |
| 99920 | GR32orGR64, VR64, i32u8imm, |
| 99921 | /* MMX_PHADDDrm */ |
| 99922 | VR64, VR64, i64mem, |
| 99923 | /* MMX_PHADDDrr */ |
| 99924 | VR64, VR64, VR64, |
| 99925 | /* MMX_PHADDSWrm */ |
| 99926 | VR64, VR64, i64mem, |
| 99927 | /* MMX_PHADDSWrr */ |
| 99928 | VR64, VR64, VR64, |
| 99929 | /* MMX_PHADDWrm */ |
| 99930 | VR64, VR64, i64mem, |
| 99931 | /* MMX_PHADDWrr */ |
| 99932 | VR64, VR64, VR64, |
| 99933 | /* MMX_PHSUBDrm */ |
| 99934 | VR64, VR64, i64mem, |
| 99935 | /* MMX_PHSUBDrr */ |
| 99936 | VR64, VR64, VR64, |
| 99937 | /* MMX_PHSUBSWrm */ |
| 99938 | VR64, VR64, i64mem, |
| 99939 | /* MMX_PHSUBSWrr */ |
| 99940 | VR64, VR64, VR64, |
| 99941 | /* MMX_PHSUBWrm */ |
| 99942 | VR64, VR64, i64mem, |
| 99943 | /* MMX_PHSUBWrr */ |
| 99944 | VR64, VR64, VR64, |
| 99945 | /* MMX_PINSRWrmi */ |
| 99946 | VR64, VR64, i16mem, i32u8imm, |
| 99947 | /* MMX_PINSRWrri */ |
| 99948 | VR64, VR64, GR32orGR64, i32u8imm, |
| 99949 | /* MMX_PMADDUBSWrm */ |
| 99950 | VR64, VR64, i64mem, |
| 99951 | /* MMX_PMADDUBSWrr */ |
| 99952 | VR64, VR64, VR64, |
| 99953 | /* MMX_PMADDWDrm */ |
| 99954 | VR64, VR64, i64mem, |
| 99955 | /* MMX_PMADDWDrr */ |
| 99956 | VR64, VR64, VR64, |
| 99957 | /* MMX_PMAXSWrm */ |
| 99958 | VR64, VR64, i64mem, |
| 99959 | /* MMX_PMAXSWrr */ |
| 99960 | VR64, VR64, VR64, |
| 99961 | /* MMX_PMAXUBrm */ |
| 99962 | VR64, VR64, i64mem, |
| 99963 | /* MMX_PMAXUBrr */ |
| 99964 | VR64, VR64, VR64, |
| 99965 | /* MMX_PMINSWrm */ |
| 99966 | VR64, VR64, i64mem, |
| 99967 | /* MMX_PMINSWrr */ |
| 99968 | VR64, VR64, VR64, |
| 99969 | /* MMX_PMINUBrm */ |
| 99970 | VR64, VR64, i64mem, |
| 99971 | /* MMX_PMINUBrr */ |
| 99972 | VR64, VR64, VR64, |
| 99973 | /* MMX_PMOVMSKBrr */ |
| 99974 | GR32orGR64, VR64, |
| 99975 | /* MMX_PMULHRSWrm */ |
| 99976 | VR64, VR64, i64mem, |
| 99977 | /* MMX_PMULHRSWrr */ |
| 99978 | VR64, VR64, VR64, |
| 99979 | /* MMX_PMULHUWrm */ |
| 99980 | VR64, VR64, i64mem, |
| 99981 | /* MMX_PMULHUWrr */ |
| 99982 | VR64, VR64, VR64, |
| 99983 | /* MMX_PMULHWrm */ |
| 99984 | VR64, VR64, i64mem, |
| 99985 | /* MMX_PMULHWrr */ |
| 99986 | VR64, VR64, VR64, |
| 99987 | /* MMX_PMULLWrm */ |
| 99988 | VR64, VR64, i64mem, |
| 99989 | /* MMX_PMULLWrr */ |
| 99990 | VR64, VR64, VR64, |
| 99991 | /* MMX_PMULUDQrm */ |
| 99992 | VR64, VR64, i64mem, |
| 99993 | /* MMX_PMULUDQrr */ |
| 99994 | VR64, VR64, VR64, |
| 99995 | /* MMX_PORrm */ |
| 99996 | VR64, VR64, i64mem, |
| 99997 | /* MMX_PORrr */ |
| 99998 | VR64, VR64, VR64, |
| 99999 | /* MMX_PSADBWrm */ |
| 100000 | VR64, VR64, i64mem, |
| 100001 | /* MMX_PSADBWrr */ |
| 100002 | VR64, VR64, VR64, |
| 100003 | /* MMX_PSHUFBrm */ |
| 100004 | VR64, VR64, i64mem, |
| 100005 | /* MMX_PSHUFBrr */ |
| 100006 | VR64, VR64, VR64, |
| 100007 | /* MMX_PSHUFWmi */ |
| 100008 | VR64, i64mem, u8imm, |
| 100009 | /* MMX_PSHUFWri */ |
| 100010 | VR64, VR64, u8imm, |
| 100011 | /* MMX_PSIGNBrm */ |
| 100012 | VR64, VR64, i64mem, |
| 100013 | /* MMX_PSIGNBrr */ |
| 100014 | VR64, VR64, VR64, |
| 100015 | /* MMX_PSIGNDrm */ |
| 100016 | VR64, VR64, i64mem, |
| 100017 | /* MMX_PSIGNDrr */ |
| 100018 | VR64, VR64, VR64, |
| 100019 | /* MMX_PSIGNWrm */ |
| 100020 | VR64, VR64, i64mem, |
| 100021 | /* MMX_PSIGNWrr */ |
| 100022 | VR64, VR64, VR64, |
| 100023 | /* MMX_PSLLDri */ |
| 100024 | VR64, VR64, i32u8imm, |
| 100025 | /* MMX_PSLLDrm */ |
| 100026 | VR64, VR64, i64mem, |
| 100027 | /* MMX_PSLLDrr */ |
| 100028 | VR64, VR64, VR64, |
| 100029 | /* MMX_PSLLQri */ |
| 100030 | VR64, VR64, i32u8imm, |
| 100031 | /* MMX_PSLLQrm */ |
| 100032 | VR64, VR64, i64mem, |
| 100033 | /* MMX_PSLLQrr */ |
| 100034 | VR64, VR64, VR64, |
| 100035 | /* MMX_PSLLWri */ |
| 100036 | VR64, VR64, i32u8imm, |
| 100037 | /* MMX_PSLLWrm */ |
| 100038 | VR64, VR64, i64mem, |
| 100039 | /* MMX_PSLLWrr */ |
| 100040 | VR64, VR64, VR64, |
| 100041 | /* MMX_PSRADri */ |
| 100042 | VR64, VR64, i32u8imm, |
| 100043 | /* MMX_PSRADrm */ |
| 100044 | VR64, VR64, i64mem, |
| 100045 | /* MMX_PSRADrr */ |
| 100046 | VR64, VR64, VR64, |
| 100047 | /* MMX_PSRAWri */ |
| 100048 | VR64, VR64, i32u8imm, |
| 100049 | /* MMX_PSRAWrm */ |
| 100050 | VR64, VR64, i64mem, |
| 100051 | /* MMX_PSRAWrr */ |
| 100052 | VR64, VR64, VR64, |
| 100053 | /* MMX_PSRLDri */ |
| 100054 | VR64, VR64, i32u8imm, |
| 100055 | /* MMX_PSRLDrm */ |
| 100056 | VR64, VR64, i64mem, |
| 100057 | /* MMX_PSRLDrr */ |
| 100058 | VR64, VR64, VR64, |
| 100059 | /* MMX_PSRLQri */ |
| 100060 | VR64, VR64, i32u8imm, |
| 100061 | /* MMX_PSRLQrm */ |
| 100062 | VR64, VR64, i64mem, |
| 100063 | /* MMX_PSRLQrr */ |
| 100064 | VR64, VR64, VR64, |
| 100065 | /* MMX_PSRLWri */ |
| 100066 | VR64, VR64, i32u8imm, |
| 100067 | /* MMX_PSRLWrm */ |
| 100068 | VR64, VR64, i64mem, |
| 100069 | /* MMX_PSRLWrr */ |
| 100070 | VR64, VR64, VR64, |
| 100071 | /* MMX_PSUBBrm */ |
| 100072 | VR64, VR64, i64mem, |
| 100073 | /* MMX_PSUBBrr */ |
| 100074 | VR64, VR64, VR64, |
| 100075 | /* MMX_PSUBDrm */ |
| 100076 | VR64, VR64, i64mem, |
| 100077 | /* MMX_PSUBDrr */ |
| 100078 | VR64, VR64, VR64, |
| 100079 | /* MMX_PSUBQrm */ |
| 100080 | VR64, VR64, i64mem, |
| 100081 | /* MMX_PSUBQrr */ |
| 100082 | VR64, VR64, VR64, |
| 100083 | /* MMX_PSUBSBrm */ |
| 100084 | VR64, VR64, i64mem, |
| 100085 | /* MMX_PSUBSBrr */ |
| 100086 | VR64, VR64, VR64, |
| 100087 | /* MMX_PSUBSWrm */ |
| 100088 | VR64, VR64, i64mem, |
| 100089 | /* MMX_PSUBSWrr */ |
| 100090 | VR64, VR64, VR64, |
| 100091 | /* MMX_PSUBUSBrm */ |
| 100092 | VR64, VR64, i64mem, |
| 100093 | /* MMX_PSUBUSBrr */ |
| 100094 | VR64, VR64, VR64, |
| 100095 | /* MMX_PSUBUSWrm */ |
| 100096 | VR64, VR64, i64mem, |
| 100097 | /* MMX_PSUBUSWrr */ |
| 100098 | VR64, VR64, VR64, |
| 100099 | /* MMX_PSUBWrm */ |
| 100100 | VR64, VR64, i64mem, |
| 100101 | /* MMX_PSUBWrr */ |
| 100102 | VR64, VR64, VR64, |
| 100103 | /* MMX_PUNPCKHBWrm */ |
| 100104 | VR64, VR64, i64mem, |
| 100105 | /* MMX_PUNPCKHBWrr */ |
| 100106 | VR64, VR64, VR64, |
| 100107 | /* MMX_PUNPCKHDQrm */ |
| 100108 | VR64, VR64, i64mem, |
| 100109 | /* MMX_PUNPCKHDQrr */ |
| 100110 | VR64, VR64, VR64, |
| 100111 | /* MMX_PUNPCKHWDrm */ |
| 100112 | VR64, VR64, i64mem, |
| 100113 | /* MMX_PUNPCKHWDrr */ |
| 100114 | VR64, VR64, VR64, |
| 100115 | /* MMX_PUNPCKLBWrm */ |
| 100116 | VR64, VR64, i32mem, |
| 100117 | /* MMX_PUNPCKLBWrr */ |
| 100118 | VR64, VR64, VR64, |
| 100119 | /* MMX_PUNPCKLDQrm */ |
| 100120 | VR64, VR64, i32mem, |
| 100121 | /* MMX_PUNPCKLDQrr */ |
| 100122 | VR64, VR64, VR64, |
| 100123 | /* MMX_PUNPCKLWDrm */ |
| 100124 | VR64, VR64, i32mem, |
| 100125 | /* MMX_PUNPCKLWDrr */ |
| 100126 | VR64, VR64, VR64, |
| 100127 | /* MMX_PXORrm */ |
| 100128 | VR64, VR64, i64mem, |
| 100129 | /* MMX_PXORrr */ |
| 100130 | VR64, VR64, VR64, |
| 100131 | /* MONITOR32rrr */ |
| 100132 | /* MONITOR64rrr */ |
| 100133 | /* MONITORX32rrr */ |
| 100134 | /* MONITORX64rrr */ |
| 100135 | /* MONTMUL */ |
| 100136 | /* MOV16ao16 */ |
| 100137 | offset16_16, |
| 100138 | /* MOV16ao32 */ |
| 100139 | offset32_16, |
| 100140 | /* MOV16ao64 */ |
| 100141 | offset64_16, |
| 100142 | /* MOV16mi */ |
| 100143 | i16mem, i16imm, |
| 100144 | /* MOV16mr */ |
| 100145 | i16mem, GR16, |
| 100146 | /* MOV16ms */ |
| 100147 | i16mem, SEGMENT_REG, |
| 100148 | /* MOV16o16a */ |
| 100149 | offset16_16, |
| 100150 | /* MOV16o32a */ |
| 100151 | offset32_16, |
| 100152 | /* MOV16o64a */ |
| 100153 | offset64_16, |
| 100154 | /* MOV16ri */ |
| 100155 | GR16, i16imm, |
| 100156 | /* MOV16ri_alt */ |
| 100157 | GR16, i16imm, |
| 100158 | /* MOV16rm */ |
| 100159 | GR16, i16mem, |
| 100160 | /* MOV16rr */ |
| 100161 | GR16, GR16, |
| 100162 | /* MOV16rr_REV */ |
| 100163 | GR16, GR16, |
| 100164 | /* MOV16rs */ |
| 100165 | GR16, SEGMENT_REG, |
| 100166 | /* MOV16sm */ |
| 100167 | SEGMENT_REG, i16mem, |
| 100168 | /* MOV16sr */ |
| 100169 | SEGMENT_REG, GR16, |
| 100170 | /* MOV32ao16 */ |
| 100171 | offset16_32, |
| 100172 | /* MOV32ao32 */ |
| 100173 | offset32_32, |
| 100174 | /* MOV32ao64 */ |
| 100175 | offset64_32, |
| 100176 | /* MOV32cr */ |
| 100177 | CONTROL_REG, GR32, |
| 100178 | /* MOV32dr */ |
| 100179 | DEBUG_REG, GR32, |
| 100180 | /* MOV32mi */ |
| 100181 | i32mem, i32imm, |
| 100182 | /* MOV32mr */ |
| 100183 | i32mem, GR32, |
| 100184 | /* MOV32o16a */ |
| 100185 | offset16_32, |
| 100186 | /* MOV32o32a */ |
| 100187 | offset32_32, |
| 100188 | /* MOV32o64a */ |
| 100189 | offset64_32, |
| 100190 | /* MOV32rc */ |
| 100191 | GR32, CONTROL_REG, |
| 100192 | /* MOV32rd */ |
| 100193 | GR32, DEBUG_REG, |
| 100194 | /* MOV32ri */ |
| 100195 | GR32, i32imm, |
| 100196 | /* MOV32ri_alt */ |
| 100197 | GR32, i32imm, |
| 100198 | /* MOV32rm */ |
| 100199 | GR32, i32mem, |
| 100200 | /* MOV32rr */ |
| 100201 | GR32, GR32, |
| 100202 | /* MOV32rr_REV */ |
| 100203 | GR32, GR32, |
| 100204 | /* MOV32rs */ |
| 100205 | GR32, SEGMENT_REG, |
| 100206 | /* MOV32sr */ |
| 100207 | SEGMENT_REG, GR32, |
| 100208 | /* MOV64ao32 */ |
| 100209 | offset32_64, |
| 100210 | /* MOV64ao64 */ |
| 100211 | offset64_64, |
| 100212 | /* MOV64cr */ |
| 100213 | CONTROL_REG, GR64, |
| 100214 | /* MOV64dr */ |
| 100215 | DEBUG_REG, GR64, |
| 100216 | /* MOV64mi32 */ |
| 100217 | i64mem, i64i32imm, |
| 100218 | /* MOV64mr */ |
| 100219 | i64mem, GR64, |
| 100220 | /* MOV64o32a */ |
| 100221 | offset32_64, |
| 100222 | /* MOV64o64a */ |
| 100223 | offset64_64, |
| 100224 | /* MOV64rc */ |
| 100225 | GR64, CONTROL_REG, |
| 100226 | /* MOV64rd */ |
| 100227 | GR64, DEBUG_REG, |
| 100228 | /* MOV64ri */ |
| 100229 | GR64, i64imm, |
| 100230 | /* MOV64ri32 */ |
| 100231 | GR64, i64i32imm, |
| 100232 | /* MOV64rm */ |
| 100233 | GR64, i64mem, |
| 100234 | /* MOV64rr */ |
| 100235 | GR64, GR64, |
| 100236 | /* MOV64rr_REV */ |
| 100237 | GR64, GR64, |
| 100238 | /* MOV64rs */ |
| 100239 | GR64, SEGMENT_REG, |
| 100240 | /* MOV64sr */ |
| 100241 | SEGMENT_REG, GR64, |
| 100242 | /* MOV64toPQIrm */ |
| 100243 | VR128, i64mem, |
| 100244 | /* MOV64toPQIrr */ |
| 100245 | VR128, GR64, |
| 100246 | /* MOV64toSDrr */ |
| 100247 | FR64, GR64, |
| 100248 | /* MOV8ao16 */ |
| 100249 | offset16_8, |
| 100250 | /* MOV8ao32 */ |
| 100251 | offset32_8, |
| 100252 | /* MOV8ao64 */ |
| 100253 | offset64_8, |
| 100254 | /* MOV8mi */ |
| 100255 | i8mem, i8imm, |
| 100256 | /* MOV8mr */ |
| 100257 | i8mem, GR8, |
| 100258 | /* MOV8mr_NOREX */ |
| 100259 | i8mem_NOREX, GR8_NOREX, |
| 100260 | /* MOV8o16a */ |
| 100261 | offset16_8, |
| 100262 | /* MOV8o32a */ |
| 100263 | offset32_8, |
| 100264 | /* MOV8o64a */ |
| 100265 | offset64_8, |
| 100266 | /* MOV8ri */ |
| 100267 | GR8, i8imm, |
| 100268 | /* MOV8ri_alt */ |
| 100269 | GR8, i8imm, |
| 100270 | /* MOV8rm */ |
| 100271 | GR8, i8mem, |
| 100272 | /* MOV8rm_NOREX */ |
| 100273 | GR8_NOREX, i8mem_NOREX, |
| 100274 | /* MOV8rr */ |
| 100275 | GR8, GR8, |
| 100276 | /* MOV8rr_NOREX */ |
| 100277 | GR8_NOREX, GR8_NOREX, |
| 100278 | /* MOV8rr_REV */ |
| 100279 | GR8, GR8, |
| 100280 | /* MOVAPDmr */ |
| 100281 | f128mem, VR128, |
| 100282 | /* MOVAPDrm */ |
| 100283 | VR128, f128mem, |
| 100284 | /* MOVAPDrr */ |
| 100285 | VR128, VR128, |
| 100286 | /* MOVAPDrr_REV */ |
| 100287 | VR128, VR128, |
| 100288 | /* MOVAPSmr */ |
| 100289 | f128mem, VR128, |
| 100290 | /* MOVAPSrm */ |
| 100291 | VR128, f128mem, |
| 100292 | /* MOVAPSrr */ |
| 100293 | VR128, VR128, |
| 100294 | /* MOVAPSrr_REV */ |
| 100295 | VR128, VR128, |
| 100296 | /* MOVBE16mr */ |
| 100297 | i16mem, GR16, |
| 100298 | /* MOVBE16mr_EVEX */ |
| 100299 | i16mem, GR16, |
| 100300 | /* MOVBE16rm */ |
| 100301 | GR16, i16mem, |
| 100302 | /* MOVBE16rm_EVEX */ |
| 100303 | GR16, i16mem, |
| 100304 | /* MOVBE16rr */ |
| 100305 | GR16, GR16, |
| 100306 | /* MOVBE16rr_REV */ |
| 100307 | GR16, GR16, |
| 100308 | /* MOVBE32mr */ |
| 100309 | i32mem, GR32, |
| 100310 | /* MOVBE32mr_EVEX */ |
| 100311 | i32mem, GR32, |
| 100312 | /* MOVBE32rm */ |
| 100313 | GR32, i32mem, |
| 100314 | /* MOVBE32rm_EVEX */ |
| 100315 | GR32, i32mem, |
| 100316 | /* MOVBE32rr */ |
| 100317 | GR32, GR32, |
| 100318 | /* MOVBE32rr_REV */ |
| 100319 | GR32, GR32, |
| 100320 | /* MOVBE64mr */ |
| 100321 | i64mem, GR64, |
| 100322 | /* MOVBE64mr_EVEX */ |
| 100323 | i64mem, GR64, |
| 100324 | /* MOVBE64rm */ |
| 100325 | GR64, i64mem, |
| 100326 | /* MOVBE64rm_EVEX */ |
| 100327 | GR64, i64mem, |
| 100328 | /* MOVBE64rr */ |
| 100329 | GR64, GR64, |
| 100330 | /* MOVBE64rr_REV */ |
| 100331 | GR64, GR64, |
| 100332 | /* MOVDDUPrm */ |
| 100333 | VR128, f64mem, |
| 100334 | /* MOVDDUPrr */ |
| 100335 | VR128, VR128, |
| 100336 | /* MOVDI2PDIrm */ |
| 100337 | VR128, i32mem, |
| 100338 | /* MOVDI2PDIrr */ |
| 100339 | VR128, GR32, |
| 100340 | /* MOVDI2SSrr */ |
| 100341 | FR32, GR32, |
| 100342 | /* MOVDIR64B16 */ |
| 100343 | GR16, i512mem_GR16, |
| 100344 | /* MOVDIR64B32 */ |
| 100345 | GR32, i512mem_GR32, |
| 100346 | /* MOVDIR64B32_EVEX */ |
| 100347 | GR32, i512mem_GR32, |
| 100348 | /* MOVDIR64B64 */ |
| 100349 | GR64, i512mem_GR64, |
| 100350 | /* MOVDIR64B64_EVEX */ |
| 100351 | GR64, i512mem_GR64, |
| 100352 | /* MOVDIRI32 */ |
| 100353 | i32mem, GR32, |
| 100354 | /* MOVDIRI32_EVEX */ |
| 100355 | i32mem, GR32, |
| 100356 | /* MOVDIRI64 */ |
| 100357 | i64mem, GR64, |
| 100358 | /* MOVDIRI64_EVEX */ |
| 100359 | i64mem, GR64, |
| 100360 | /* MOVDQAmr */ |
| 100361 | i128mem, VR128, |
| 100362 | /* MOVDQArm */ |
| 100363 | VR128, i128mem, |
| 100364 | /* MOVDQArr */ |
| 100365 | VR128, VR128, |
| 100366 | /* MOVDQArr_REV */ |
| 100367 | VR128, VR128, |
| 100368 | /* MOVDQUmr */ |
| 100369 | i128mem, VR128, |
| 100370 | /* MOVDQUrm */ |
| 100371 | VR128, i128mem, |
| 100372 | /* MOVDQUrr */ |
| 100373 | VR128, VR128, |
| 100374 | /* MOVDQUrr_REV */ |
| 100375 | VR128, VR128, |
| 100376 | /* MOVHLPSrr */ |
| 100377 | VR128, VR128, VR128, |
| 100378 | /* MOVHPDmr */ |
| 100379 | f64mem, VR128, |
| 100380 | /* MOVHPDrm */ |
| 100381 | VR128, VR128, f64mem, |
| 100382 | /* MOVHPSmr */ |
| 100383 | f64mem, VR128, |
| 100384 | /* MOVHPSrm */ |
| 100385 | VR128, VR128, f64mem, |
| 100386 | /* MOVLHPSrr */ |
| 100387 | VR128, VR128, VR128, |
| 100388 | /* MOVLPDmr */ |
| 100389 | f64mem, VR128, |
| 100390 | /* MOVLPDrm */ |
| 100391 | VR128, VR128, f64mem, |
| 100392 | /* MOVLPSmr */ |
| 100393 | f64mem, VR128, |
| 100394 | /* MOVLPSrm */ |
| 100395 | VR128, VR128, f64mem, |
| 100396 | /* MOVMSKPDrr */ |
| 100397 | GR32orGR64, VR128, |
| 100398 | /* MOVMSKPSrr */ |
| 100399 | GR32orGR64, VR128, |
| 100400 | /* MOVNTDQArm */ |
| 100401 | VR128, i128mem, |
| 100402 | /* MOVNTDQmr */ |
| 100403 | f128mem, VR128, |
| 100404 | /* MOVNTI_64mr */ |
| 100405 | i64mem, GR64, |
| 100406 | /* MOVNTImr */ |
| 100407 | i32mem, GR32, |
| 100408 | /* MOVNTPDmr */ |
| 100409 | f128mem, VR128, |
| 100410 | /* MOVNTPSmr */ |
| 100411 | f128mem, VR128, |
| 100412 | /* MOVNTSD */ |
| 100413 | f64mem, VR128, |
| 100414 | /* MOVNTSS */ |
| 100415 | f32mem, VR128, |
| 100416 | /* MOVPC32r */ |
| 100417 | GR32, i32imm, |
| 100418 | /* MOVPDI2DImr */ |
| 100419 | i32mem, VR128, |
| 100420 | /* MOVPDI2DIrr */ |
| 100421 | GR32, VR128, |
| 100422 | /* MOVPQI2QImr */ |
| 100423 | i64mem, VR128, |
| 100424 | /* MOVPQI2QIrr */ |
| 100425 | VR128, VR128, |
| 100426 | /* MOVPQIto64mr */ |
| 100427 | i64mem, VR128, |
| 100428 | /* MOVPQIto64rr */ |
| 100429 | GR64, VR128, |
| 100430 | /* MOVQI2PQIrm */ |
| 100431 | VR128, i64mem, |
| 100432 | /* MOVRS16rm */ |
| 100433 | GR16, i16mem, |
| 100434 | /* MOVRS16rm_EVEX */ |
| 100435 | GR16, i16mem, |
| 100436 | /* MOVRS32rm */ |
| 100437 | GR32, i32mem, |
| 100438 | /* MOVRS32rm_EVEX */ |
| 100439 | GR32, i32mem, |
| 100440 | /* MOVRS64rm */ |
| 100441 | GR64, i64mem, |
| 100442 | /* MOVRS64rm_EVEX */ |
| 100443 | GR64, i64mem, |
| 100444 | /* MOVRS8rm */ |
| 100445 | GR8, i8mem, |
| 100446 | /* MOVRS8rm_EVEX */ |
| 100447 | GR8, i8mem, |
| 100448 | /* MOVSB */ |
| 100449 | dstidx8, srcidx8, |
| 100450 | /* MOVSDmr */ |
| 100451 | f64mem, FR64, |
| 100452 | /* MOVSDrm */ |
| 100453 | VR128, f64mem, |
| 100454 | /* MOVSDrm_alt */ |
| 100455 | FR64, f64mem, |
| 100456 | /* MOVSDrr */ |
| 100457 | VR128, VR128, VR128, |
| 100458 | /* MOVSDrr_REV */ |
| 100459 | VR128, VR128, VR128, |
| 100460 | /* MOVSDto64rr */ |
| 100461 | GR64, FR64, |
| 100462 | /* MOVSHDUPrm */ |
| 100463 | VR128, f128mem, |
| 100464 | /* MOVSHDUPrr */ |
| 100465 | VR128, VR128, |
| 100466 | /* MOVSL */ |
| 100467 | dstidx32, srcidx32, |
| 100468 | /* MOVSLDUPrm */ |
| 100469 | VR128, f128mem, |
| 100470 | /* MOVSLDUPrr */ |
| 100471 | VR128, VR128, |
| 100472 | /* MOVSQ */ |
| 100473 | dstidx64, srcidx64, |
| 100474 | /* MOVSS2DIrr */ |
| 100475 | GR32, FR32, |
| 100476 | /* MOVSSmr */ |
| 100477 | f32mem, FR32, |
| 100478 | /* MOVSSrm */ |
| 100479 | VR128, f32mem, |
| 100480 | /* MOVSSrm_alt */ |
| 100481 | FR32, f32mem, |
| 100482 | /* MOVSSrr */ |
| 100483 | VR128, VR128, VR128, |
| 100484 | /* MOVSSrr_REV */ |
| 100485 | VR128, VR128, VR128, |
| 100486 | /* MOVSW */ |
| 100487 | dstidx16, srcidx16, |
| 100488 | /* MOVSX16rm16 */ |
| 100489 | GR16, i16mem, |
| 100490 | /* MOVSX16rm32 */ |
| 100491 | GR16, i32mem, |
| 100492 | /* MOVSX16rm8 */ |
| 100493 | GR16, i8mem, |
| 100494 | /* MOVSX16rr16 */ |
| 100495 | GR16, GR16, |
| 100496 | /* MOVSX16rr32 */ |
| 100497 | GR16, GR32, |
| 100498 | /* MOVSX16rr8 */ |
| 100499 | GR16, GR8, |
| 100500 | /* MOVSX32rm16 */ |
| 100501 | GR32, i16mem, |
| 100502 | /* MOVSX32rm32 */ |
| 100503 | GR32, i32mem, |
| 100504 | /* MOVSX32rm8 */ |
| 100505 | GR32, i8mem, |
| 100506 | /* MOVSX32rm8_NOREX */ |
| 100507 | GR32_NOREX, i8mem_NOREX, |
| 100508 | /* MOVSX32rr16 */ |
| 100509 | GR32, GR16, |
| 100510 | /* MOVSX32rr32 */ |
| 100511 | GR32, GR32, |
| 100512 | /* MOVSX32rr8 */ |
| 100513 | GR32, GR8, |
| 100514 | /* MOVSX32rr8_NOREX */ |
| 100515 | GR32_NOREX, GR8_NOREX, |
| 100516 | /* MOVSX64rm16 */ |
| 100517 | GR64, i16mem, |
| 100518 | /* MOVSX64rm32 */ |
| 100519 | GR64, i32mem, |
| 100520 | /* MOVSX64rm8 */ |
| 100521 | GR64, i8mem, |
| 100522 | /* MOVSX64rr16 */ |
| 100523 | GR64, GR16, |
| 100524 | /* MOVSX64rr32 */ |
| 100525 | GR64, GR32, |
| 100526 | /* MOVSX64rr8 */ |
| 100527 | GR64, GR8, |
| 100528 | /* MOVUPDmr */ |
| 100529 | f128mem, VR128, |
| 100530 | /* MOVUPDrm */ |
| 100531 | VR128, f128mem, |
| 100532 | /* MOVUPDrr */ |
| 100533 | VR128, VR128, |
| 100534 | /* MOVUPDrr_REV */ |
| 100535 | VR128, VR128, |
| 100536 | /* MOVUPSmr */ |
| 100537 | f128mem, VR128, |
| 100538 | /* MOVUPSrm */ |
| 100539 | VR128, f128mem, |
| 100540 | /* MOVUPSrr */ |
| 100541 | VR128, VR128, |
| 100542 | /* MOVUPSrr_REV */ |
| 100543 | VR128, VR128, |
| 100544 | /* MOVZPQILo2PQIrr */ |
| 100545 | VR128, VR128, |
| 100546 | /* MOVZX16rm16 */ |
| 100547 | GR16, i16mem, |
| 100548 | /* MOVZX16rm8 */ |
| 100549 | GR16, i8mem, |
| 100550 | /* MOVZX16rr16 */ |
| 100551 | GR16, GR16, |
| 100552 | /* MOVZX16rr8 */ |
| 100553 | GR16, GR8, |
| 100554 | /* MOVZX32rm16 */ |
| 100555 | GR32, i16mem, |
| 100556 | /* MOVZX32rm8 */ |
| 100557 | GR32, i8mem, |
| 100558 | /* MOVZX32rm8_NOREX */ |
| 100559 | GR32_NOREX, i8mem_NOREX, |
| 100560 | /* MOVZX32rr16 */ |
| 100561 | GR32, GR16, |
| 100562 | /* MOVZX32rr8 */ |
| 100563 | GR32, GR8, |
| 100564 | /* MOVZX32rr8_NOREX */ |
| 100565 | GR32_NOREX, GR8_NOREX, |
| 100566 | /* MOVZX64rm16 */ |
| 100567 | GR64, i16mem, |
| 100568 | /* MOVZX64rm8 */ |
| 100569 | GR64, i8mem, |
| 100570 | /* MOVZX64rr16 */ |
| 100571 | GR64, GR16, |
| 100572 | /* MOVZX64rr8 */ |
| 100573 | GR64, GR8, |
| 100574 | /* MPSADBWrmi */ |
| 100575 | VR128, VR128, i128mem, u8imm, |
| 100576 | /* MPSADBWrri */ |
| 100577 | VR128, VR128, VR128, u8imm, |
| 100578 | /* MUL16m */ |
| 100579 | i16mem, |
| 100580 | /* MUL16m_EVEX */ |
| 100581 | i16mem, |
| 100582 | /* MUL16m_NF */ |
| 100583 | i16mem, |
| 100584 | /* MUL16r */ |
| 100585 | GR16, |
| 100586 | /* MUL16r_EVEX */ |
| 100587 | GR16, |
| 100588 | /* MUL16r_NF */ |
| 100589 | GR16, |
| 100590 | /* MUL32m */ |
| 100591 | i32mem, |
| 100592 | /* MUL32m_EVEX */ |
| 100593 | i32mem, |
| 100594 | /* MUL32m_NF */ |
| 100595 | i32mem, |
| 100596 | /* MUL32r */ |
| 100597 | GR32, |
| 100598 | /* MUL32r_EVEX */ |
| 100599 | GR32, |
| 100600 | /* MUL32r_NF */ |
| 100601 | GR32, |
| 100602 | /* MUL64m */ |
| 100603 | i64mem, |
| 100604 | /* MUL64m_EVEX */ |
| 100605 | i64mem, |
| 100606 | /* MUL64m_NF */ |
| 100607 | i64mem, |
| 100608 | /* MUL64r */ |
| 100609 | GR64, |
| 100610 | /* MUL64r_EVEX */ |
| 100611 | GR64, |
| 100612 | /* MUL64r_NF */ |
| 100613 | GR64, |
| 100614 | /* MUL8m */ |
| 100615 | i8mem, |
| 100616 | /* MUL8m_EVEX */ |
| 100617 | i8mem, |
| 100618 | /* MUL8m_NF */ |
| 100619 | i8mem, |
| 100620 | /* MUL8r */ |
| 100621 | GR8, |
| 100622 | /* MUL8r_EVEX */ |
| 100623 | GR8, |
| 100624 | /* MUL8r_NF */ |
| 100625 | GR8, |
| 100626 | /* MULPDrm */ |
| 100627 | VR128, VR128, f128mem, |
| 100628 | /* MULPDrr */ |
| 100629 | VR128, VR128, VR128, |
| 100630 | /* MULPSrm */ |
| 100631 | VR128, VR128, f128mem, |
| 100632 | /* MULPSrr */ |
| 100633 | VR128, VR128, VR128, |
| 100634 | /* MULSDrm */ |
| 100635 | FR64, FR64, f64mem, |
| 100636 | /* MULSDrm_Int */ |
| 100637 | VR128, VR128, sdmem, |
| 100638 | /* MULSDrr */ |
| 100639 | FR64, FR64, FR64, |
| 100640 | /* MULSDrr_Int */ |
| 100641 | VR128, VR128, VR128, |
| 100642 | /* MULSSrm */ |
| 100643 | FR32, FR32, f32mem, |
| 100644 | /* MULSSrm_Int */ |
| 100645 | VR128, VR128, ssmem, |
| 100646 | /* MULSSrr */ |
| 100647 | FR32, FR32, FR32, |
| 100648 | /* MULSSrr_Int */ |
| 100649 | VR128, VR128, VR128, |
| 100650 | /* MULX32Hrm */ |
| 100651 | GR32, i32mem, |
| 100652 | /* MULX32Hrr */ |
| 100653 | GR32, GR32, |
| 100654 | /* MULX32rm */ |
| 100655 | GR32, GR32, i32mem, |
| 100656 | /* MULX32rm_EVEX */ |
| 100657 | GR32, GR32, i32mem, |
| 100658 | /* MULX32rr */ |
| 100659 | GR32, GR32, GR32, |
| 100660 | /* MULX32rr_EVEX */ |
| 100661 | GR32, GR32, GR32, |
| 100662 | /* MULX64Hrm */ |
| 100663 | GR64, i64mem, |
| 100664 | /* MULX64Hrr */ |
| 100665 | GR64, GR64, |
| 100666 | /* MULX64rm */ |
| 100667 | GR64, GR64, i64mem, |
| 100668 | /* MULX64rm_EVEX */ |
| 100669 | GR64, GR64, i64mem, |
| 100670 | /* MULX64rr */ |
| 100671 | GR64, GR64, GR64, |
| 100672 | /* MULX64rr_EVEX */ |
| 100673 | GR64, GR64, GR64, |
| 100674 | /* MUL_F32m */ |
| 100675 | f32mem, |
| 100676 | /* MUL_F64m */ |
| 100677 | f64mem, |
| 100678 | /* MUL_FI16m */ |
| 100679 | i16mem, |
| 100680 | /* MUL_FI32m */ |
| 100681 | i32mem, |
| 100682 | /* MUL_FPrST0 */ |
| 100683 | RSTi, |
| 100684 | /* MUL_FST0r */ |
| 100685 | RSTi, |
| 100686 | /* MUL_Fp32 */ |
| 100687 | RFP32, RFP32, RFP32, |
| 100688 | /* MUL_Fp32m */ |
| 100689 | RFP32, RFP32, f32mem, |
| 100690 | /* MUL_Fp64 */ |
| 100691 | RFP64, RFP64, RFP64, |
| 100692 | /* MUL_Fp64m */ |
| 100693 | RFP64, RFP64, f64mem, |
| 100694 | /* MUL_Fp64m32 */ |
| 100695 | RFP64, RFP64, f32mem, |
| 100696 | /* MUL_Fp80 */ |
| 100697 | RFP80, RFP80, RFP80, |
| 100698 | /* MUL_Fp80m32 */ |
| 100699 | RFP80, RFP80, f32mem, |
| 100700 | /* MUL_Fp80m64 */ |
| 100701 | RFP80, RFP80, f64mem, |
| 100702 | /* MUL_FpI16m32 */ |
| 100703 | RFP32, RFP32, i16mem, |
| 100704 | /* MUL_FpI16m64 */ |
| 100705 | RFP64, RFP64, i16mem, |
| 100706 | /* MUL_FpI16m80 */ |
| 100707 | RFP80, RFP80, i16mem, |
| 100708 | /* MUL_FpI32m32 */ |
| 100709 | RFP32, RFP32, i32mem, |
| 100710 | /* MUL_FpI32m64 */ |
| 100711 | RFP64, RFP64, i32mem, |
| 100712 | /* MUL_FpI32m80 */ |
| 100713 | RFP80, RFP80, i32mem, |
| 100714 | /* MUL_FrST0 */ |
| 100715 | RSTi, |
| 100716 | /* MWAITXrrr */ |
| 100717 | /* MWAITrr */ |
| 100718 | /* NEG16m */ |
| 100719 | i16mem, |
| 100720 | /* NEG16m_EVEX */ |
| 100721 | i16mem, |
| 100722 | /* NEG16m_ND */ |
| 100723 | GR16, i16mem, |
| 100724 | /* NEG16m_NF */ |
| 100725 | i16mem, |
| 100726 | /* NEG16m_NF_ND */ |
| 100727 | GR16, i16mem, |
| 100728 | /* NEG16r */ |
| 100729 | GR16, GR16, |
| 100730 | /* NEG16r_EVEX */ |
| 100731 | GR16, GR16, |
| 100732 | /* NEG16r_ND */ |
| 100733 | GR16, GR16, |
| 100734 | /* NEG16r_NF */ |
| 100735 | GR16, GR16, |
| 100736 | /* NEG16r_NF_ND */ |
| 100737 | GR16, GR16, |
| 100738 | /* NEG32m */ |
| 100739 | i32mem, |
| 100740 | /* NEG32m_EVEX */ |
| 100741 | i32mem, |
| 100742 | /* NEG32m_ND */ |
| 100743 | GR32, i32mem, |
| 100744 | /* NEG32m_NF */ |
| 100745 | i32mem, |
| 100746 | /* NEG32m_NF_ND */ |
| 100747 | GR32, i32mem, |
| 100748 | /* NEG32r */ |
| 100749 | GR32, GR32, |
| 100750 | /* NEG32r_EVEX */ |
| 100751 | GR32, GR32, |
| 100752 | /* NEG32r_ND */ |
| 100753 | GR32, GR32, |
| 100754 | /* NEG32r_NF */ |
| 100755 | GR32, GR32, |
| 100756 | /* NEG32r_NF_ND */ |
| 100757 | GR32, GR32, |
| 100758 | /* NEG64m */ |
| 100759 | i64mem, |
| 100760 | /* NEG64m_EVEX */ |
| 100761 | i64mem, |
| 100762 | /* NEG64m_ND */ |
| 100763 | GR64, i64mem, |
| 100764 | /* NEG64m_NF */ |
| 100765 | i64mem, |
| 100766 | /* NEG64m_NF_ND */ |
| 100767 | GR64, i64mem, |
| 100768 | /* NEG64r */ |
| 100769 | GR64, GR64, |
| 100770 | /* NEG64r_EVEX */ |
| 100771 | GR64, GR64, |
| 100772 | /* NEG64r_ND */ |
| 100773 | GR64, GR64, |
| 100774 | /* NEG64r_NF */ |
| 100775 | GR64, GR64, |
| 100776 | /* NEG64r_NF_ND */ |
| 100777 | GR64, GR64, |
| 100778 | /* NEG8m */ |
| 100779 | i8mem, |
| 100780 | /* NEG8m_EVEX */ |
| 100781 | i8mem, |
| 100782 | /* NEG8m_ND */ |
| 100783 | GR8, i8mem, |
| 100784 | /* NEG8m_NF */ |
| 100785 | i8mem, |
| 100786 | /* NEG8m_NF_ND */ |
| 100787 | GR8, i8mem, |
| 100788 | /* NEG8r */ |
| 100789 | GR8, GR8, |
| 100790 | /* NEG8r_EVEX */ |
| 100791 | GR8, GR8, |
| 100792 | /* NEG8r_ND */ |
| 100793 | GR8, GR8, |
| 100794 | /* NEG8r_NF */ |
| 100795 | GR8, GR8, |
| 100796 | /* NEG8r_NF_ND */ |
| 100797 | GR8, GR8, |
| 100798 | /* NOOP */ |
| 100799 | /* NOOPL */ |
| 100800 | i32mem, |
| 100801 | /* NOOPLr */ |
| 100802 | GR32, |
| 100803 | /* NOOPQ */ |
| 100804 | i64mem, |
| 100805 | /* NOOPQr */ |
| 100806 | GR64, |
| 100807 | /* NOOPW */ |
| 100808 | i16mem, |
| 100809 | /* NOOPWr */ |
| 100810 | GR16, |
| 100811 | /* NOT16m */ |
| 100812 | i16mem, |
| 100813 | /* NOT16m_EVEX */ |
| 100814 | i16mem, |
| 100815 | /* NOT16m_ND */ |
| 100816 | GR16, i16mem, |
| 100817 | /* NOT16r */ |
| 100818 | GR16, GR16, |
| 100819 | /* NOT16r_EVEX */ |
| 100820 | GR16, GR16, |
| 100821 | /* NOT16r_ND */ |
| 100822 | GR16, GR16, |
| 100823 | /* NOT32m */ |
| 100824 | i32mem, |
| 100825 | /* NOT32m_EVEX */ |
| 100826 | i32mem, |
| 100827 | /* NOT32m_ND */ |
| 100828 | GR32, i32mem, |
| 100829 | /* NOT32r */ |
| 100830 | GR32, GR32, |
| 100831 | /* NOT32r_EVEX */ |
| 100832 | GR32, GR32, |
| 100833 | /* NOT32r_ND */ |
| 100834 | GR32, GR32, |
| 100835 | /* NOT64m */ |
| 100836 | i64mem, |
| 100837 | /* NOT64m_EVEX */ |
| 100838 | i64mem, |
| 100839 | /* NOT64m_ND */ |
| 100840 | GR64, i64mem, |
| 100841 | /* NOT64r */ |
| 100842 | GR64, GR64, |
| 100843 | /* NOT64r_EVEX */ |
| 100844 | GR64, GR64, |
| 100845 | /* NOT64r_ND */ |
| 100846 | GR64, GR64, |
| 100847 | /* NOT8m */ |
| 100848 | i8mem, |
| 100849 | /* NOT8m_EVEX */ |
| 100850 | i8mem, |
| 100851 | /* NOT8m_ND */ |
| 100852 | GR8, i8mem, |
| 100853 | /* NOT8r */ |
| 100854 | GR8, GR8, |
| 100855 | /* NOT8r_EVEX */ |
| 100856 | GR8, GR8, |
| 100857 | /* NOT8r_ND */ |
| 100858 | GR8, GR8, |
| 100859 | /* OR16i16 */ |
| 100860 | i16imm, |
| 100861 | /* OR16mi */ |
| 100862 | i16mem, i16imm, |
| 100863 | /* OR16mi8 */ |
| 100864 | i16mem, i16i8imm, |
| 100865 | /* OR16mi8_EVEX */ |
| 100866 | i16mem, i16i8imm, |
| 100867 | /* OR16mi8_ND */ |
| 100868 | GR16, i16mem, i16i8imm, |
| 100869 | /* OR16mi8_NF */ |
| 100870 | i16mem, i16i8imm, |
| 100871 | /* OR16mi8_NF_ND */ |
| 100872 | GR16, i16mem, i16i8imm, |
| 100873 | /* OR16mi_EVEX */ |
| 100874 | i16mem, i16imm, |
| 100875 | /* OR16mi_ND */ |
| 100876 | GR16, i16mem, i16imm, |
| 100877 | /* OR16mi_NF */ |
| 100878 | i16mem, i16imm, |
| 100879 | /* OR16mi_NF_ND */ |
| 100880 | GR16, i16mem, i16imm, |
| 100881 | /* OR16mr */ |
| 100882 | i16mem, GR16, |
| 100883 | /* OR16mr_EVEX */ |
| 100884 | i16mem, GR16, |
| 100885 | /* OR16mr_ND */ |
| 100886 | GR16, i16mem, GR16, |
| 100887 | /* OR16mr_NF */ |
| 100888 | i16mem, GR16, |
| 100889 | /* OR16mr_NF_ND */ |
| 100890 | GR16, i16mem, GR16, |
| 100891 | /* OR16ri */ |
| 100892 | GR16, GR16, i16imm, |
| 100893 | /* OR16ri8 */ |
| 100894 | GR16, GR16, i16i8imm, |
| 100895 | /* OR16ri8_EVEX */ |
| 100896 | GR16, GR16, i16i8imm, |
| 100897 | /* OR16ri8_ND */ |
| 100898 | GR16, GR16, i16i8imm, |
| 100899 | /* OR16ri8_NF */ |
| 100900 | GR16, GR16, i16i8imm, |
| 100901 | /* OR16ri8_NF_ND */ |
| 100902 | GR16, GR16, i16i8imm, |
| 100903 | /* OR16ri_EVEX */ |
| 100904 | GR16, GR16, i16imm, |
| 100905 | /* OR16ri_ND */ |
| 100906 | GR16, GR16, i16imm, |
| 100907 | /* OR16ri_NF */ |
| 100908 | GR16, GR16, i16imm, |
| 100909 | /* OR16ri_NF_ND */ |
| 100910 | GR16, GR16, i16imm, |
| 100911 | /* OR16rm */ |
| 100912 | GR16, GR16, i16mem, |
| 100913 | /* OR16rm_EVEX */ |
| 100914 | GR16, GR16, i16mem, |
| 100915 | /* OR16rm_ND */ |
| 100916 | GR16, GR16, i16mem, |
| 100917 | /* OR16rm_NF */ |
| 100918 | GR16, GR16, i16mem, |
| 100919 | /* OR16rm_NF_ND */ |
| 100920 | GR16, GR16, i16mem, |
| 100921 | /* OR16rr */ |
| 100922 | GR16, GR16, GR16, |
| 100923 | /* OR16rr_EVEX */ |
| 100924 | GR16, GR16, GR16, |
| 100925 | /* OR16rr_EVEX_REV */ |
| 100926 | GR16, GR16, GR16, |
| 100927 | /* OR16rr_ND */ |
| 100928 | GR16, GR16, GR16, |
| 100929 | /* OR16rr_ND_REV */ |
| 100930 | GR16, GR16, GR16, |
| 100931 | /* OR16rr_NF */ |
| 100932 | GR16, GR16, GR16, |
| 100933 | /* OR16rr_NF_ND */ |
| 100934 | GR16, GR16, GR16, |
| 100935 | /* OR16rr_NF_ND_REV */ |
| 100936 | GR16, GR16, GR16, |
| 100937 | /* OR16rr_NF_REV */ |
| 100938 | GR16, GR16, GR16, |
| 100939 | /* OR16rr_REV */ |
| 100940 | GR16, GR16, GR16, |
| 100941 | /* OR32i32 */ |
| 100942 | i32imm, |
| 100943 | /* OR32mi */ |
| 100944 | i32mem, i32imm, |
| 100945 | /* OR32mi8 */ |
| 100946 | i32mem, i32i8imm, |
| 100947 | /* OR32mi8Locked */ |
| 100948 | i32mem, i32i8imm, |
| 100949 | /* OR32mi8_EVEX */ |
| 100950 | i32mem, i32i8imm, |
| 100951 | /* OR32mi8_ND */ |
| 100952 | GR32, i32mem, i32i8imm, |
| 100953 | /* OR32mi8_NF */ |
| 100954 | i32mem, i32i8imm, |
| 100955 | /* OR32mi8_NF_ND */ |
| 100956 | GR32, i32mem, i32i8imm, |
| 100957 | /* OR32mi_EVEX */ |
| 100958 | i32mem, i32imm, |
| 100959 | /* OR32mi_ND */ |
| 100960 | GR32, i32mem, i32imm, |
| 100961 | /* OR32mi_NF */ |
| 100962 | i32mem, i32imm, |
| 100963 | /* OR32mi_NF_ND */ |
| 100964 | GR32, i32mem, i32imm, |
| 100965 | /* OR32mr */ |
| 100966 | i32mem, GR32, |
| 100967 | /* OR32mr_EVEX */ |
| 100968 | i32mem, GR32, |
| 100969 | /* OR32mr_ND */ |
| 100970 | GR32, i32mem, GR32, |
| 100971 | /* OR32mr_NF */ |
| 100972 | i32mem, GR32, |
| 100973 | /* OR32mr_NF_ND */ |
| 100974 | GR32, i32mem, GR32, |
| 100975 | /* OR32ri */ |
| 100976 | GR32, GR32, i32imm, |
| 100977 | /* OR32ri8 */ |
| 100978 | GR32, GR32, i32i8imm, |
| 100979 | /* OR32ri8_EVEX */ |
| 100980 | GR32, GR32, i32i8imm, |
| 100981 | /* OR32ri8_ND */ |
| 100982 | GR32, GR32, i32i8imm, |
| 100983 | /* OR32ri8_NF */ |
| 100984 | GR32, GR32, i32i8imm, |
| 100985 | /* OR32ri8_NF_ND */ |
| 100986 | GR32, GR32, i32i8imm, |
| 100987 | /* OR32ri_EVEX */ |
| 100988 | GR32, GR32, i32imm, |
| 100989 | /* OR32ri_ND */ |
| 100990 | GR32, GR32, i32imm, |
| 100991 | /* OR32ri_NF */ |
| 100992 | GR32, GR32, i32imm, |
| 100993 | /* OR32ri_NF_ND */ |
| 100994 | GR32, GR32, i32imm, |
| 100995 | /* OR32rm */ |
| 100996 | GR32, GR32, i32mem, |
| 100997 | /* OR32rm_EVEX */ |
| 100998 | GR32, GR32, i32mem, |
| 100999 | /* OR32rm_ND */ |
| 101000 | GR32, GR32, i32mem, |
| 101001 | /* OR32rm_NF */ |
| 101002 | GR32, GR32, i32mem, |
| 101003 | /* OR32rm_NF_ND */ |
| 101004 | GR32, GR32, i32mem, |
| 101005 | /* OR32rr */ |
| 101006 | GR32, GR32, GR32, |
| 101007 | /* OR32rr_EVEX */ |
| 101008 | GR32, GR32, GR32, |
| 101009 | /* OR32rr_EVEX_REV */ |
| 101010 | GR32, GR32, GR32, |
| 101011 | /* OR32rr_ND */ |
| 101012 | GR32, GR32, GR32, |
| 101013 | /* OR32rr_ND_REV */ |
| 101014 | GR32, GR32, GR32, |
| 101015 | /* OR32rr_NF */ |
| 101016 | GR32, GR32, GR32, |
| 101017 | /* OR32rr_NF_ND */ |
| 101018 | GR32, GR32, GR32, |
| 101019 | /* OR32rr_NF_ND_REV */ |
| 101020 | GR32, GR32, GR32, |
| 101021 | /* OR32rr_NF_REV */ |
| 101022 | GR32, GR32, GR32, |
| 101023 | /* OR32rr_REV */ |
| 101024 | GR32, GR32, GR32, |
| 101025 | /* OR64i32 */ |
| 101026 | i64i32imm, |
| 101027 | /* OR64mi32 */ |
| 101028 | i64mem, i64i32imm, |
| 101029 | /* OR64mi32_EVEX */ |
| 101030 | i64mem, i64i32imm, |
| 101031 | /* OR64mi32_ND */ |
| 101032 | GR64, i64mem, i64i32imm, |
| 101033 | /* OR64mi32_NF */ |
| 101034 | i64mem, i64i32imm, |
| 101035 | /* OR64mi32_NF_ND */ |
| 101036 | GR64, i64mem, i64i32imm, |
| 101037 | /* OR64mi8 */ |
| 101038 | i64mem, i64i8imm, |
| 101039 | /* OR64mi8_EVEX */ |
| 101040 | i64mem, i64i8imm, |
| 101041 | /* OR64mi8_ND */ |
| 101042 | GR64, i64mem, i64i8imm, |
| 101043 | /* OR64mi8_NF */ |
| 101044 | i64mem, i64i8imm, |
| 101045 | /* OR64mi8_NF_ND */ |
| 101046 | GR64, i64mem, i64i8imm, |
| 101047 | /* OR64mr */ |
| 101048 | i64mem, GR64, |
| 101049 | /* OR64mr_EVEX */ |
| 101050 | i64mem, GR64, |
| 101051 | /* OR64mr_ND */ |
| 101052 | GR64, i64mem, GR64, |
| 101053 | /* OR64mr_NF */ |
| 101054 | i64mem, GR64, |
| 101055 | /* OR64mr_NF_ND */ |
| 101056 | GR64, i64mem, GR64, |
| 101057 | /* OR64ri32 */ |
| 101058 | GR64, GR64, i64i32imm, |
| 101059 | /* OR64ri32_EVEX */ |
| 101060 | GR64, GR64, i64i32imm, |
| 101061 | /* OR64ri32_ND */ |
| 101062 | GR64, GR64, i64i32imm, |
| 101063 | /* OR64ri32_NF */ |
| 101064 | GR64, GR64, i64i32imm, |
| 101065 | /* OR64ri32_NF_ND */ |
| 101066 | GR64, GR64, i64i32imm, |
| 101067 | /* OR64ri8 */ |
| 101068 | GR64, GR64, i64i8imm, |
| 101069 | /* OR64ri8_EVEX */ |
| 101070 | GR64, GR64, i64i8imm, |
| 101071 | /* OR64ri8_ND */ |
| 101072 | GR64, GR64, i64i8imm, |
| 101073 | /* OR64ri8_NF */ |
| 101074 | GR64, GR64, i64i8imm, |
| 101075 | /* OR64ri8_NF_ND */ |
| 101076 | GR64, GR64, i64i8imm, |
| 101077 | /* OR64rm */ |
| 101078 | GR64, GR64, i64mem, |
| 101079 | /* OR64rm_EVEX */ |
| 101080 | GR64, GR64, i64mem, |
| 101081 | /* OR64rm_ND */ |
| 101082 | GR64, GR64, i64mem, |
| 101083 | /* OR64rm_NF */ |
| 101084 | GR64, GR64, i64mem, |
| 101085 | /* OR64rm_NF_ND */ |
| 101086 | GR64, GR64, i64mem, |
| 101087 | /* OR64rr */ |
| 101088 | GR64, GR64, GR64, |
| 101089 | /* OR64rr_EVEX */ |
| 101090 | GR64, GR64, GR64, |
| 101091 | /* OR64rr_EVEX_REV */ |
| 101092 | GR64, GR64, GR64, |
| 101093 | /* OR64rr_ND */ |
| 101094 | GR64, GR64, GR64, |
| 101095 | /* OR64rr_ND_REV */ |
| 101096 | GR64, GR64, GR64, |
| 101097 | /* OR64rr_NF */ |
| 101098 | GR64, GR64, GR64, |
| 101099 | /* OR64rr_NF_ND */ |
| 101100 | GR64, GR64, GR64, |
| 101101 | /* OR64rr_NF_ND_REV */ |
| 101102 | GR64, GR64, GR64, |
| 101103 | /* OR64rr_NF_REV */ |
| 101104 | GR64, GR64, GR64, |
| 101105 | /* OR64rr_REV */ |
| 101106 | GR64, GR64, GR64, |
| 101107 | /* OR8i8 */ |
| 101108 | i8imm, |
| 101109 | /* OR8mi */ |
| 101110 | i8mem, i8imm, |
| 101111 | /* OR8mi8 */ |
| 101112 | i8mem, i8imm, |
| 101113 | /* OR8mi_EVEX */ |
| 101114 | i8mem, i8imm, |
| 101115 | /* OR8mi_ND */ |
| 101116 | GR8, i8mem, i8imm, |
| 101117 | /* OR8mi_NF */ |
| 101118 | i8mem, i8imm, |
| 101119 | /* OR8mi_NF_ND */ |
| 101120 | GR8, i8mem, i8imm, |
| 101121 | /* OR8mr */ |
| 101122 | i8mem, GR8, |
| 101123 | /* OR8mr_EVEX */ |
| 101124 | i8mem, GR8, |
| 101125 | /* OR8mr_ND */ |
| 101126 | GR8, i8mem, GR8, |
| 101127 | /* OR8mr_NF */ |
| 101128 | i8mem, GR8, |
| 101129 | /* OR8mr_NF_ND */ |
| 101130 | GR8, i8mem, GR8, |
| 101131 | /* OR8ri */ |
| 101132 | GR8, GR8, i8imm, |
| 101133 | /* OR8ri8 */ |
| 101134 | GR8, GR8, i8imm, |
| 101135 | /* OR8ri_EVEX */ |
| 101136 | GR8, GR8, i8imm, |
| 101137 | /* OR8ri_ND */ |
| 101138 | GR8, GR8, i8imm, |
| 101139 | /* OR8ri_NF */ |
| 101140 | GR8, GR8, i8imm, |
| 101141 | /* OR8ri_NF_ND */ |
| 101142 | GR8, GR8, i8imm, |
| 101143 | /* OR8rm */ |
| 101144 | GR8, GR8, i8mem, |
| 101145 | /* OR8rm_EVEX */ |
| 101146 | GR8, GR8, i8mem, |
| 101147 | /* OR8rm_ND */ |
| 101148 | GR8, GR8, i8mem, |
| 101149 | /* OR8rm_NF */ |
| 101150 | GR8, GR8, i8mem, |
| 101151 | /* OR8rm_NF_ND */ |
| 101152 | GR8, GR8, i8mem, |
| 101153 | /* OR8rr */ |
| 101154 | GR8, GR8, GR8, |
| 101155 | /* OR8rr_EVEX */ |
| 101156 | GR8, GR8, GR8, |
| 101157 | /* OR8rr_EVEX_REV */ |
| 101158 | GR8, GR8, GR8, |
| 101159 | /* OR8rr_ND */ |
| 101160 | GR8, GR8, GR8, |
| 101161 | /* OR8rr_ND_REV */ |
| 101162 | GR8, GR8, GR8, |
| 101163 | /* OR8rr_NF */ |
| 101164 | GR8, GR8, GR8, |
| 101165 | /* OR8rr_NF_ND */ |
| 101166 | GR8, GR8, GR8, |
| 101167 | /* OR8rr_NF_ND_REV */ |
| 101168 | GR8, GR8, GR8, |
| 101169 | /* OR8rr_NF_REV */ |
| 101170 | GR8, GR8, GR8, |
| 101171 | /* OR8rr_REV */ |
| 101172 | GR8, GR8, GR8, |
| 101173 | /* ORPDrm */ |
| 101174 | VR128, VR128, f128mem, |
| 101175 | /* ORPDrr */ |
| 101176 | VR128, VR128, VR128, |
| 101177 | /* ORPSrm */ |
| 101178 | VR128, VR128, f128mem, |
| 101179 | /* ORPSrr */ |
| 101180 | VR128, VR128, VR128, |
| 101181 | /* OUT16ir */ |
| 101182 | u8imm, |
| 101183 | /* OUT16rr */ |
| 101184 | /* OUT32ir */ |
| 101185 | u8imm, |
| 101186 | /* OUT32rr */ |
| 101187 | /* OUT8ir */ |
| 101188 | u8imm, |
| 101189 | /* OUT8rr */ |
| 101190 | /* OUTSB */ |
| 101191 | srcidx8, |
| 101192 | /* OUTSL */ |
| 101193 | srcidx32, |
| 101194 | /* OUTSW */ |
| 101195 | srcidx16, |
| 101196 | /* PABSBrm */ |
| 101197 | VR128, i128mem, |
| 101198 | /* PABSBrr */ |
| 101199 | VR128, VR128, |
| 101200 | /* PABSDrm */ |
| 101201 | VR128, i128mem, |
| 101202 | /* PABSDrr */ |
| 101203 | VR128, VR128, |
| 101204 | /* PABSWrm */ |
| 101205 | VR128, i128mem, |
| 101206 | /* PABSWrr */ |
| 101207 | VR128, VR128, |
| 101208 | /* PACKSSDWrm */ |
| 101209 | VR128, VR128, i128mem, |
| 101210 | /* PACKSSDWrr */ |
| 101211 | VR128, VR128, VR128, |
| 101212 | /* PACKSSWBrm */ |
| 101213 | VR128, VR128, i128mem, |
| 101214 | /* PACKSSWBrr */ |
| 101215 | VR128, VR128, VR128, |
| 101216 | /* PACKUSDWrm */ |
| 101217 | VR128, VR128, i128mem, |
| 101218 | /* PACKUSDWrr */ |
| 101219 | VR128, VR128, VR128, |
| 101220 | /* PACKUSWBrm */ |
| 101221 | VR128, VR128, i128mem, |
| 101222 | /* PACKUSWBrr */ |
| 101223 | VR128, VR128, VR128, |
| 101224 | /* PADDBrm */ |
| 101225 | VR128, VR128, i128mem, |
| 101226 | /* PADDBrr */ |
| 101227 | VR128, VR128, VR128, |
| 101228 | /* PADDDrm */ |
| 101229 | VR128, VR128, i128mem, |
| 101230 | /* PADDDrr */ |
| 101231 | VR128, VR128, VR128, |
| 101232 | /* PADDQrm */ |
| 101233 | VR128, VR128, i128mem, |
| 101234 | /* PADDQrr */ |
| 101235 | VR128, VR128, VR128, |
| 101236 | /* PADDSBrm */ |
| 101237 | VR128, VR128, i128mem, |
| 101238 | /* PADDSBrr */ |
| 101239 | VR128, VR128, VR128, |
| 101240 | /* PADDSWrm */ |
| 101241 | VR128, VR128, i128mem, |
| 101242 | /* PADDSWrr */ |
| 101243 | VR128, VR128, VR128, |
| 101244 | /* PADDUSBrm */ |
| 101245 | VR128, VR128, i128mem, |
| 101246 | /* PADDUSBrr */ |
| 101247 | VR128, VR128, VR128, |
| 101248 | /* PADDUSWrm */ |
| 101249 | VR128, VR128, i128mem, |
| 101250 | /* PADDUSWrr */ |
| 101251 | VR128, VR128, VR128, |
| 101252 | /* PADDWrm */ |
| 101253 | VR128, VR128, i128mem, |
| 101254 | /* PADDWrr */ |
| 101255 | VR128, VR128, VR128, |
| 101256 | /* PALIGNRrmi */ |
| 101257 | VR128, VR128, i128mem, u8imm, |
| 101258 | /* PALIGNRrri */ |
| 101259 | VR128, VR128, VR128, u8imm, |
| 101260 | /* PANDNrm */ |
| 101261 | VR128, VR128, i128mem, |
| 101262 | /* PANDNrr */ |
| 101263 | VR128, VR128, VR128, |
| 101264 | /* PANDrm */ |
| 101265 | VR128, VR128, i128mem, |
| 101266 | /* PANDrr */ |
| 101267 | VR128, VR128, VR128, |
| 101268 | /* PAUSE */ |
| 101269 | /* PAVGBrm */ |
| 101270 | VR128, VR128, i128mem, |
| 101271 | /* PAVGBrr */ |
| 101272 | VR128, VR128, VR128, |
| 101273 | /* PAVGUSBrm */ |
| 101274 | VR64, VR64, i64mem, |
| 101275 | /* PAVGUSBrr */ |
| 101276 | VR64, VR64, VR64, |
| 101277 | /* PAVGWrm */ |
| 101278 | VR128, VR128, i128mem, |
| 101279 | /* PAVGWrr */ |
| 101280 | VR128, VR128, VR128, |
| 101281 | /* PBLENDVBrm0 */ |
| 101282 | VR128, VR128, i128mem, |
| 101283 | /* PBLENDVBrr0 */ |
| 101284 | VR128, VR128, VR128, |
| 101285 | /* PBLENDWrmi */ |
| 101286 | VR128, VR128, i128mem, u8imm, |
| 101287 | /* PBLENDWrri */ |
| 101288 | VR128, VR128, VR128, u8imm, |
| 101289 | /* PBNDKB */ |
| 101290 | /* PCLMULQDQrmi */ |
| 101291 | VR128, VR128, i128mem, u8imm, |
| 101292 | /* PCLMULQDQrri */ |
| 101293 | VR128, VR128, VR128, u8imm, |
| 101294 | /* PCMPEQBrm */ |
| 101295 | VR128, VR128, i128mem, |
| 101296 | /* PCMPEQBrr */ |
| 101297 | VR128, VR128, VR128, |
| 101298 | /* PCMPEQDrm */ |
| 101299 | VR128, VR128, i128mem, |
| 101300 | /* PCMPEQDrr */ |
| 101301 | VR128, VR128, VR128, |
| 101302 | /* PCMPEQQrm */ |
| 101303 | VR128, VR128, i128mem, |
| 101304 | /* PCMPEQQrr */ |
| 101305 | VR128, VR128, VR128, |
| 101306 | /* PCMPEQWrm */ |
| 101307 | VR128, VR128, i128mem, |
| 101308 | /* PCMPEQWrr */ |
| 101309 | VR128, VR128, VR128, |
| 101310 | /* PCMPESTRIrmi */ |
| 101311 | VR128, i128mem, u8imm, |
| 101312 | /* PCMPESTRIrri */ |
| 101313 | VR128, VR128, u8imm, |
| 101314 | /* PCMPESTRMrmi */ |
| 101315 | VR128, i128mem, u8imm, |
| 101316 | /* PCMPESTRMrri */ |
| 101317 | VR128, VR128, u8imm, |
| 101318 | /* PCMPGTBrm */ |
| 101319 | VR128, VR128, i128mem, |
| 101320 | /* PCMPGTBrr */ |
| 101321 | VR128, VR128, VR128, |
| 101322 | /* PCMPGTDrm */ |
| 101323 | VR128, VR128, i128mem, |
| 101324 | /* PCMPGTDrr */ |
| 101325 | VR128, VR128, VR128, |
| 101326 | /* PCMPGTQrm */ |
| 101327 | VR128, VR128, i128mem, |
| 101328 | /* PCMPGTQrr */ |
| 101329 | VR128, VR128, VR128, |
| 101330 | /* PCMPGTWrm */ |
| 101331 | VR128, VR128, i128mem, |
| 101332 | /* PCMPGTWrr */ |
| 101333 | VR128, VR128, VR128, |
| 101334 | /* PCMPISTRIrmi */ |
| 101335 | VR128, i128mem, u8imm, |
| 101336 | /* PCMPISTRIrri */ |
| 101337 | VR128, VR128, u8imm, |
| 101338 | /* PCMPISTRMrmi */ |
| 101339 | VR128, i128mem, u8imm, |
| 101340 | /* PCMPISTRMrri */ |
| 101341 | VR128, VR128, u8imm, |
| 101342 | /* PCONFIG */ |
| 101343 | /* PDEP32rm */ |
| 101344 | GR32, GR32, i32mem, |
| 101345 | /* PDEP32rm_EVEX */ |
| 101346 | GR32, GR32, i32mem, |
| 101347 | /* PDEP32rr */ |
| 101348 | GR32, GR32, GR32, |
| 101349 | /* PDEP32rr_EVEX */ |
| 101350 | GR32, GR32, GR32, |
| 101351 | /* PDEP64rm */ |
| 101352 | GR64, GR64, i64mem, |
| 101353 | /* PDEP64rm_EVEX */ |
| 101354 | GR64, GR64, i64mem, |
| 101355 | /* PDEP64rr */ |
| 101356 | GR64, GR64, GR64, |
| 101357 | /* PDEP64rr_EVEX */ |
| 101358 | GR64, GR64, GR64, |
| 101359 | /* PEXT32rm */ |
| 101360 | GR32, GR32, i32mem, |
| 101361 | /* PEXT32rm_EVEX */ |
| 101362 | GR32, GR32, i32mem, |
| 101363 | /* PEXT32rr */ |
| 101364 | GR32, GR32, GR32, |
| 101365 | /* PEXT32rr_EVEX */ |
| 101366 | GR32, GR32, GR32, |
| 101367 | /* PEXT64rm */ |
| 101368 | GR64, GR64, i64mem, |
| 101369 | /* PEXT64rm_EVEX */ |
| 101370 | GR64, GR64, i64mem, |
| 101371 | /* PEXT64rr */ |
| 101372 | GR64, GR64, GR64, |
| 101373 | /* PEXT64rr_EVEX */ |
| 101374 | GR64, GR64, GR64, |
| 101375 | /* PEXTRBmri */ |
| 101376 | i8mem, VR128, u8imm, |
| 101377 | /* PEXTRBrri */ |
| 101378 | GR32orGR64, VR128, u8imm, |
| 101379 | /* PEXTRDmri */ |
| 101380 | i32mem, VR128, u8imm, |
| 101381 | /* PEXTRDrri */ |
| 101382 | GR32, VR128, u8imm, |
| 101383 | /* PEXTRQmri */ |
| 101384 | i64mem, VR128, u8imm, |
| 101385 | /* PEXTRQrri */ |
| 101386 | GR64, VR128, u8imm, |
| 101387 | /* PEXTRWmri */ |
| 101388 | i16mem, VR128, u8imm, |
| 101389 | /* PEXTRWrri */ |
| 101390 | GR32orGR64, VR128, u8imm, |
| 101391 | /* PEXTRWrri_REV */ |
| 101392 | GR32orGR64, VR128, u8imm, |
| 101393 | /* PF2IDrm */ |
| 101394 | VR64, i64mem, |
| 101395 | /* PF2IDrr */ |
| 101396 | VR64, VR64, |
| 101397 | /* PF2IWrm */ |
| 101398 | VR64, i64mem, |
| 101399 | /* PF2IWrr */ |
| 101400 | VR64, VR64, |
| 101401 | /* PFACCrm */ |
| 101402 | VR64, VR64, i64mem, |
| 101403 | /* PFACCrr */ |
| 101404 | VR64, VR64, VR64, |
| 101405 | /* PFADDrm */ |
| 101406 | VR64, VR64, i64mem, |
| 101407 | /* PFADDrr */ |
| 101408 | VR64, VR64, VR64, |
| 101409 | /* PFCMPEQrm */ |
| 101410 | VR64, VR64, i64mem, |
| 101411 | /* PFCMPEQrr */ |
| 101412 | VR64, VR64, VR64, |
| 101413 | /* PFCMPGErm */ |
| 101414 | VR64, VR64, i64mem, |
| 101415 | /* PFCMPGErr */ |
| 101416 | VR64, VR64, VR64, |
| 101417 | /* PFCMPGTrm */ |
| 101418 | VR64, VR64, i64mem, |
| 101419 | /* PFCMPGTrr */ |
| 101420 | VR64, VR64, VR64, |
| 101421 | /* PFMAXrm */ |
| 101422 | VR64, VR64, i64mem, |
| 101423 | /* PFMAXrr */ |
| 101424 | VR64, VR64, VR64, |
| 101425 | /* PFMINrm */ |
| 101426 | VR64, VR64, i64mem, |
| 101427 | /* PFMINrr */ |
| 101428 | VR64, VR64, VR64, |
| 101429 | /* PFMULrm */ |
| 101430 | VR64, VR64, i64mem, |
| 101431 | /* PFMULrr */ |
| 101432 | VR64, VR64, VR64, |
| 101433 | /* PFNACCrm */ |
| 101434 | VR64, VR64, i64mem, |
| 101435 | /* PFNACCrr */ |
| 101436 | VR64, VR64, VR64, |
| 101437 | /* PFPNACCrm */ |
| 101438 | VR64, VR64, i64mem, |
| 101439 | /* PFPNACCrr */ |
| 101440 | VR64, VR64, VR64, |
| 101441 | /* PFRCPIT1rm */ |
| 101442 | VR64, VR64, i64mem, |
| 101443 | /* PFRCPIT1rr */ |
| 101444 | VR64, VR64, VR64, |
| 101445 | /* PFRCPIT2rm */ |
| 101446 | VR64, VR64, i64mem, |
| 101447 | /* PFRCPIT2rr */ |
| 101448 | VR64, VR64, VR64, |
| 101449 | /* PFRCPrm */ |
| 101450 | VR64, i64mem, |
| 101451 | /* PFRCPrr */ |
| 101452 | VR64, VR64, |
| 101453 | /* PFRSQIT1rm */ |
| 101454 | VR64, VR64, i64mem, |
| 101455 | /* PFRSQIT1rr */ |
| 101456 | VR64, VR64, VR64, |
| 101457 | /* PFRSQRTrm */ |
| 101458 | VR64, i64mem, |
| 101459 | /* PFRSQRTrr */ |
| 101460 | VR64, VR64, |
| 101461 | /* PFSUBRrm */ |
| 101462 | VR64, VR64, i64mem, |
| 101463 | /* PFSUBRrr */ |
| 101464 | VR64, VR64, VR64, |
| 101465 | /* PFSUBrm */ |
| 101466 | VR64, VR64, i64mem, |
| 101467 | /* PFSUBrr */ |
| 101468 | VR64, VR64, VR64, |
| 101469 | /* PHADDDrm */ |
| 101470 | VR128, VR128, i128mem, |
| 101471 | /* PHADDDrr */ |
| 101472 | VR128, VR128, VR128, |
| 101473 | /* PHADDSWrm */ |
| 101474 | VR128, VR128, i128mem, |
| 101475 | /* PHADDSWrr */ |
| 101476 | VR128, VR128, VR128, |
| 101477 | /* PHADDWrm */ |
| 101478 | VR128, VR128, i128mem, |
| 101479 | /* PHADDWrr */ |
| 101480 | VR128, VR128, VR128, |
| 101481 | /* PHMINPOSUWrm */ |
| 101482 | VR128, i128mem, |
| 101483 | /* PHMINPOSUWrr */ |
| 101484 | VR128, VR128, |
| 101485 | /* PHSUBDrm */ |
| 101486 | VR128, VR128, i128mem, |
| 101487 | /* PHSUBDrr */ |
| 101488 | VR128, VR128, VR128, |
| 101489 | /* PHSUBSWrm */ |
| 101490 | VR128, VR128, i128mem, |
| 101491 | /* PHSUBSWrr */ |
| 101492 | VR128, VR128, VR128, |
| 101493 | /* PHSUBWrm */ |
| 101494 | VR128, VR128, i128mem, |
| 101495 | /* PHSUBWrr */ |
| 101496 | VR128, VR128, VR128, |
| 101497 | /* PI2FDrm */ |
| 101498 | VR64, i64mem, |
| 101499 | /* PI2FDrr */ |
| 101500 | VR64, VR64, |
| 101501 | /* PI2FWrm */ |
| 101502 | VR64, i64mem, |
| 101503 | /* PI2FWrr */ |
| 101504 | VR64, VR64, |
| 101505 | /* PINSRBrmi */ |
| 101506 | VR128, VR128, i8mem, u8imm, |
| 101507 | /* PINSRBrri */ |
| 101508 | VR128, VR128, GR32orGR64, u8imm, |
| 101509 | /* PINSRDrmi */ |
| 101510 | VR128, VR128, i32mem, u8imm, |
| 101511 | /* PINSRDrri */ |
| 101512 | VR128, VR128, GR32, u8imm, |
| 101513 | /* PINSRQrmi */ |
| 101514 | VR128, VR128, i64mem, u8imm, |
| 101515 | /* PINSRQrri */ |
| 101516 | VR128, VR128, GR64, u8imm, |
| 101517 | /* PINSRWrmi */ |
| 101518 | VR128, VR128, i16mem, u8imm, |
| 101519 | /* PINSRWrri */ |
| 101520 | VR128, VR128, GR32orGR64, u8imm, |
| 101521 | /* PMADDUBSWrm */ |
| 101522 | VR128, VR128, i128mem, |
| 101523 | /* PMADDUBSWrr */ |
| 101524 | VR128, VR128, VR128, |
| 101525 | /* PMADDWDrm */ |
| 101526 | VR128, VR128, i128mem, |
| 101527 | /* PMADDWDrr */ |
| 101528 | VR128, VR128, VR128, |
| 101529 | /* PMAXSBrm */ |
| 101530 | VR128, VR128, i128mem, |
| 101531 | /* PMAXSBrr */ |
| 101532 | VR128, VR128, VR128, |
| 101533 | /* PMAXSDrm */ |
| 101534 | VR128, VR128, i128mem, |
| 101535 | /* PMAXSDrr */ |
| 101536 | VR128, VR128, VR128, |
| 101537 | /* PMAXSWrm */ |
| 101538 | VR128, VR128, i128mem, |
| 101539 | /* PMAXSWrr */ |
| 101540 | VR128, VR128, VR128, |
| 101541 | /* PMAXUBrm */ |
| 101542 | VR128, VR128, i128mem, |
| 101543 | /* PMAXUBrr */ |
| 101544 | VR128, VR128, VR128, |
| 101545 | /* PMAXUDrm */ |
| 101546 | VR128, VR128, i128mem, |
| 101547 | /* PMAXUDrr */ |
| 101548 | VR128, VR128, VR128, |
| 101549 | /* PMAXUWrm */ |
| 101550 | VR128, VR128, i128mem, |
| 101551 | /* PMAXUWrr */ |
| 101552 | VR128, VR128, VR128, |
| 101553 | /* PMINSBrm */ |
| 101554 | VR128, VR128, i128mem, |
| 101555 | /* PMINSBrr */ |
| 101556 | VR128, VR128, VR128, |
| 101557 | /* PMINSDrm */ |
| 101558 | VR128, VR128, i128mem, |
| 101559 | /* PMINSDrr */ |
| 101560 | VR128, VR128, VR128, |
| 101561 | /* PMINSWrm */ |
| 101562 | VR128, VR128, i128mem, |
| 101563 | /* PMINSWrr */ |
| 101564 | VR128, VR128, VR128, |
| 101565 | /* PMINUBrm */ |
| 101566 | VR128, VR128, i128mem, |
| 101567 | /* PMINUBrr */ |
| 101568 | VR128, VR128, VR128, |
| 101569 | /* PMINUDrm */ |
| 101570 | VR128, VR128, i128mem, |
| 101571 | /* PMINUDrr */ |
| 101572 | VR128, VR128, VR128, |
| 101573 | /* PMINUWrm */ |
| 101574 | VR128, VR128, i128mem, |
| 101575 | /* PMINUWrr */ |
| 101576 | VR128, VR128, VR128, |
| 101577 | /* PMOVMSKBrr */ |
| 101578 | GR32orGR64, VR128, |
| 101579 | /* PMOVSXBDrm */ |
| 101580 | VR128, i32mem, |
| 101581 | /* PMOVSXBDrr */ |
| 101582 | VR128, VR128, |
| 101583 | /* PMOVSXBQrm */ |
| 101584 | VR128, i16mem, |
| 101585 | /* PMOVSXBQrr */ |
| 101586 | VR128, VR128, |
| 101587 | /* PMOVSXBWrm */ |
| 101588 | VR128, i64mem, |
| 101589 | /* PMOVSXBWrr */ |
| 101590 | VR128, VR128, |
| 101591 | /* PMOVSXDQrm */ |
| 101592 | VR128, i64mem, |
| 101593 | /* PMOVSXDQrr */ |
| 101594 | VR128, VR128, |
| 101595 | /* PMOVSXWDrm */ |
| 101596 | VR128, i64mem, |
| 101597 | /* PMOVSXWDrr */ |
| 101598 | VR128, VR128, |
| 101599 | /* PMOVSXWQrm */ |
| 101600 | VR128, i32mem, |
| 101601 | /* PMOVSXWQrr */ |
| 101602 | VR128, VR128, |
| 101603 | /* PMOVZXBDrm */ |
| 101604 | VR128, i32mem, |
| 101605 | /* PMOVZXBDrr */ |
| 101606 | VR128, VR128, |
| 101607 | /* PMOVZXBQrm */ |
| 101608 | VR128, i16mem, |
| 101609 | /* PMOVZXBQrr */ |
| 101610 | VR128, VR128, |
| 101611 | /* PMOVZXBWrm */ |
| 101612 | VR128, i64mem, |
| 101613 | /* PMOVZXBWrr */ |
| 101614 | VR128, VR128, |
| 101615 | /* PMOVZXDQrm */ |
| 101616 | VR128, i64mem, |
| 101617 | /* PMOVZXDQrr */ |
| 101618 | VR128, VR128, |
| 101619 | /* PMOVZXWDrm */ |
| 101620 | VR128, i64mem, |
| 101621 | /* PMOVZXWDrr */ |
| 101622 | VR128, VR128, |
| 101623 | /* PMOVZXWQrm */ |
| 101624 | VR128, i32mem, |
| 101625 | /* PMOVZXWQrr */ |
| 101626 | VR128, VR128, |
| 101627 | /* PMULDQrm */ |
| 101628 | VR128, VR128, i128mem, |
| 101629 | /* PMULDQrr */ |
| 101630 | VR128, VR128, VR128, |
| 101631 | /* PMULHRSWrm */ |
| 101632 | VR128, VR128, i128mem, |
| 101633 | /* PMULHRSWrr */ |
| 101634 | VR128, VR128, VR128, |
| 101635 | /* PMULHRWrm */ |
| 101636 | VR64, VR64, i64mem, |
| 101637 | /* PMULHRWrr */ |
| 101638 | VR64, VR64, VR64, |
| 101639 | /* PMULHUWrm */ |
| 101640 | VR128, VR128, i128mem, |
| 101641 | /* PMULHUWrr */ |
| 101642 | VR128, VR128, VR128, |
| 101643 | /* PMULHWrm */ |
| 101644 | VR128, VR128, i128mem, |
| 101645 | /* PMULHWrr */ |
| 101646 | VR128, VR128, VR128, |
| 101647 | /* PMULLDrm */ |
| 101648 | VR128, VR128, i128mem, |
| 101649 | /* PMULLDrr */ |
| 101650 | VR128, VR128, VR128, |
| 101651 | /* PMULLWrm */ |
| 101652 | VR128, VR128, i128mem, |
| 101653 | /* PMULLWrr */ |
| 101654 | VR128, VR128, VR128, |
| 101655 | /* PMULUDQrm */ |
| 101656 | VR128, VR128, i128mem, |
| 101657 | /* PMULUDQrr */ |
| 101658 | VR128, VR128, VR128, |
| 101659 | /* POP16r */ |
| 101660 | GR16, |
| 101661 | /* POP16rmm */ |
| 101662 | i16mem, |
| 101663 | /* POP16rmr */ |
| 101664 | GR16, |
| 101665 | /* POP2 */ |
| 101666 | GR64, GR64, |
| 101667 | /* POP2P */ |
| 101668 | GR64, GR64, |
| 101669 | /* POP32r */ |
| 101670 | GR32, |
| 101671 | /* POP32rmm */ |
| 101672 | i32mem, |
| 101673 | /* POP32rmr */ |
| 101674 | GR32, |
| 101675 | /* POP64r */ |
| 101676 | GR64, |
| 101677 | /* POP64rmm */ |
| 101678 | i64mem, |
| 101679 | /* POP64rmr */ |
| 101680 | GR64, |
| 101681 | /* POPA16 */ |
| 101682 | /* POPA32 */ |
| 101683 | /* POPCNT16rm */ |
| 101684 | GR16, i16mem, |
| 101685 | /* POPCNT16rm_EVEX */ |
| 101686 | GR16, i16mem, |
| 101687 | /* POPCNT16rm_NF */ |
| 101688 | GR16, i16mem, |
| 101689 | /* POPCNT16rr */ |
| 101690 | GR16, GR16, |
| 101691 | /* POPCNT16rr_EVEX */ |
| 101692 | GR16, GR16, |
| 101693 | /* POPCNT16rr_NF */ |
| 101694 | GR16, GR16, |
| 101695 | /* POPCNT32rm */ |
| 101696 | GR32, i32mem, |
| 101697 | /* POPCNT32rm_EVEX */ |
| 101698 | GR32, i32mem, |
| 101699 | /* POPCNT32rm_NF */ |
| 101700 | GR32, i32mem, |
| 101701 | /* POPCNT32rr */ |
| 101702 | GR32, GR32, |
| 101703 | /* POPCNT32rr_EVEX */ |
| 101704 | GR32, GR32, |
| 101705 | /* POPCNT32rr_NF */ |
| 101706 | GR32, GR32, |
| 101707 | /* POPCNT64rm */ |
| 101708 | GR64, i64mem, |
| 101709 | /* POPCNT64rm_EVEX */ |
| 101710 | GR64, i64mem, |
| 101711 | /* POPCNT64rm_NF */ |
| 101712 | GR64, i64mem, |
| 101713 | /* POPCNT64rr */ |
| 101714 | GR64, GR64, |
| 101715 | /* POPCNT64rr_EVEX */ |
| 101716 | GR64, GR64, |
| 101717 | /* POPCNT64rr_NF */ |
| 101718 | GR64, GR64, |
| 101719 | /* POPDS16 */ |
| 101720 | /* POPDS32 */ |
| 101721 | /* POPES16 */ |
| 101722 | /* POPES32 */ |
| 101723 | /* POPF16 */ |
| 101724 | /* POPF32 */ |
| 101725 | /* POPF64 */ |
| 101726 | /* POPFS16 */ |
| 101727 | /* POPFS32 */ |
| 101728 | /* POPFS64 */ |
| 101729 | /* POPGS16 */ |
| 101730 | /* POPGS32 */ |
| 101731 | /* POPGS64 */ |
| 101732 | /* POPP64r */ |
| 101733 | GR64, |
| 101734 | /* POPSS16 */ |
| 101735 | /* POPSS32 */ |
| 101736 | /* PORrm */ |
| 101737 | VR128, VR128, i128mem, |
| 101738 | /* PORrr */ |
| 101739 | VR128, VR128, VR128, |
| 101740 | /* PREFETCH */ |
| 101741 | i8mem, |
| 101742 | /* PREFETCHIT0 */ |
| 101743 | i8mem, |
| 101744 | /* PREFETCHIT1 */ |
| 101745 | i8mem, |
| 101746 | /* PREFETCHNTA */ |
| 101747 | i8mem, |
| 101748 | /* PREFETCHRST2 */ |
| 101749 | i8mem, |
| 101750 | /* PREFETCHT0 */ |
| 101751 | i8mem, |
| 101752 | /* PREFETCHT1 */ |
| 101753 | i8mem, |
| 101754 | /* PREFETCHT2 */ |
| 101755 | i8mem, |
| 101756 | /* PREFETCHW */ |
| 101757 | i8mem, |
| 101758 | /* PREFETCHWT1 */ |
| 101759 | i8mem, |
| 101760 | /* PROBED_ALLOCA_32 */ |
| 101761 | GR32, GR32, |
| 101762 | /* PROBED_ALLOCA_64 */ |
| 101763 | GR64, GR64, |
| 101764 | /* PSADBWrm */ |
| 101765 | VR128, VR128, i128mem, |
| 101766 | /* PSADBWrr */ |
| 101767 | VR128, VR128, VR128, |
| 101768 | /* PSHUFBrm */ |
| 101769 | VR128, VR128, i128mem, |
| 101770 | /* PSHUFBrr */ |
| 101771 | VR128, VR128, VR128, |
| 101772 | /* PSHUFDmi */ |
| 101773 | VR128, i128mem, u8imm, |
| 101774 | /* PSHUFDri */ |
| 101775 | VR128, VR128, u8imm, |
| 101776 | /* PSHUFHWmi */ |
| 101777 | VR128, i128mem, u8imm, |
| 101778 | /* PSHUFHWri */ |
| 101779 | VR128, VR128, u8imm, |
| 101780 | /* PSHUFLWmi */ |
| 101781 | VR128, i128mem, u8imm, |
| 101782 | /* PSHUFLWri */ |
| 101783 | VR128, VR128, u8imm, |
| 101784 | /* PSIGNBrm */ |
| 101785 | VR128, VR128, i128mem, |
| 101786 | /* PSIGNBrr */ |
| 101787 | VR128, VR128, VR128, |
| 101788 | /* PSIGNDrm */ |
| 101789 | VR128, VR128, i128mem, |
| 101790 | /* PSIGNDrr */ |
| 101791 | VR128, VR128, VR128, |
| 101792 | /* PSIGNWrm */ |
| 101793 | VR128, VR128, i128mem, |
| 101794 | /* PSIGNWrr */ |
| 101795 | VR128, VR128, VR128, |
| 101796 | /* PSLLDQri */ |
| 101797 | VR128, VR128, u8imm, |
| 101798 | /* PSLLDri */ |
| 101799 | VR128, VR128, u8imm, |
| 101800 | /* PSLLDrm */ |
| 101801 | VR128, VR128, i128mem, |
| 101802 | /* PSLLDrr */ |
| 101803 | VR128, VR128, VR128, |
| 101804 | /* PSLLQri */ |
| 101805 | VR128, VR128, u8imm, |
| 101806 | /* PSLLQrm */ |
| 101807 | VR128, VR128, i128mem, |
| 101808 | /* PSLLQrr */ |
| 101809 | VR128, VR128, VR128, |
| 101810 | /* PSLLWri */ |
| 101811 | VR128, VR128, u8imm, |
| 101812 | /* PSLLWrm */ |
| 101813 | VR128, VR128, i128mem, |
| 101814 | /* PSLLWrr */ |
| 101815 | VR128, VR128, VR128, |
| 101816 | /* PSMASH */ |
| 101817 | /* PSRADri */ |
| 101818 | VR128, VR128, u8imm, |
| 101819 | /* PSRADrm */ |
| 101820 | VR128, VR128, i128mem, |
| 101821 | /* PSRADrr */ |
| 101822 | VR128, VR128, VR128, |
| 101823 | /* PSRAWri */ |
| 101824 | VR128, VR128, u8imm, |
| 101825 | /* PSRAWrm */ |
| 101826 | VR128, VR128, i128mem, |
| 101827 | /* PSRAWrr */ |
| 101828 | VR128, VR128, VR128, |
| 101829 | /* PSRLDQri */ |
| 101830 | VR128, VR128, u8imm, |
| 101831 | /* PSRLDri */ |
| 101832 | VR128, VR128, u8imm, |
| 101833 | /* PSRLDrm */ |
| 101834 | VR128, VR128, i128mem, |
| 101835 | /* PSRLDrr */ |
| 101836 | VR128, VR128, VR128, |
| 101837 | /* PSRLQri */ |
| 101838 | VR128, VR128, u8imm, |
| 101839 | /* PSRLQrm */ |
| 101840 | VR128, VR128, i128mem, |
| 101841 | /* PSRLQrr */ |
| 101842 | VR128, VR128, VR128, |
| 101843 | /* PSRLWri */ |
| 101844 | VR128, VR128, u8imm, |
| 101845 | /* PSRLWrm */ |
| 101846 | VR128, VR128, i128mem, |
| 101847 | /* PSRLWrr */ |
| 101848 | VR128, VR128, VR128, |
| 101849 | /* PSUBBrm */ |
| 101850 | VR128, VR128, i128mem, |
| 101851 | /* PSUBBrr */ |
| 101852 | VR128, VR128, VR128, |
| 101853 | /* PSUBDrm */ |
| 101854 | VR128, VR128, i128mem, |
| 101855 | /* PSUBDrr */ |
| 101856 | VR128, VR128, VR128, |
| 101857 | /* PSUBQrm */ |
| 101858 | VR128, VR128, i128mem, |
| 101859 | /* PSUBQrr */ |
| 101860 | VR128, VR128, VR128, |
| 101861 | /* PSUBSBrm */ |
| 101862 | VR128, VR128, i128mem, |
| 101863 | /* PSUBSBrr */ |
| 101864 | VR128, VR128, VR128, |
| 101865 | /* PSUBSWrm */ |
| 101866 | VR128, VR128, i128mem, |
| 101867 | /* PSUBSWrr */ |
| 101868 | VR128, VR128, VR128, |
| 101869 | /* PSUBUSBrm */ |
| 101870 | VR128, VR128, i128mem, |
| 101871 | /* PSUBUSBrr */ |
| 101872 | VR128, VR128, VR128, |
| 101873 | /* PSUBUSWrm */ |
| 101874 | VR128, VR128, i128mem, |
| 101875 | /* PSUBUSWrr */ |
| 101876 | VR128, VR128, VR128, |
| 101877 | /* PSUBWrm */ |
| 101878 | VR128, VR128, i128mem, |
| 101879 | /* PSUBWrr */ |
| 101880 | VR128, VR128, VR128, |
| 101881 | /* PSWAPDrm */ |
| 101882 | VR64, i64mem, |
| 101883 | /* PSWAPDrr */ |
| 101884 | VR64, VR64, |
| 101885 | /* PT2RPNTLVWZ0 */ |
| 101886 | u8imm, sibmem, |
| 101887 | /* PT2RPNTLVWZ0RS */ |
| 101888 | u8imm, sibmem, |
| 101889 | /* PT2RPNTLVWZ0RST1 */ |
| 101890 | u8imm, sibmem, |
| 101891 | /* PT2RPNTLVWZ0T1 */ |
| 101892 | u8imm, sibmem, |
| 101893 | /* PT2RPNTLVWZ1 */ |
| 101894 | u8imm, sibmem, |
| 101895 | /* PT2RPNTLVWZ1RS */ |
| 101896 | u8imm, sibmem, |
| 101897 | /* PT2RPNTLVWZ1RST1 */ |
| 101898 | u8imm, sibmem, |
| 101899 | /* PT2RPNTLVWZ1T1 */ |
| 101900 | u8imm, sibmem, |
| 101901 | /* PTCMMIMFP16PS */ |
| 101902 | u8imm, u8imm, u8imm, |
| 101903 | /* PTCMMIMFP16PSV */ |
| 101904 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 101905 | /* PTCMMRLFP16PS */ |
| 101906 | u8imm, u8imm, u8imm, |
| 101907 | /* PTCMMRLFP16PSV */ |
| 101908 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 101909 | /* PTCONJTCMMIMFP16PS */ |
| 101910 | u8imm, u8imm, u8imm, |
| 101911 | /* PTCONJTCMMIMFP16PSV */ |
| 101912 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 101913 | /* PTCONJTFP16 */ |
| 101914 | u8imm, u8imm, |
| 101915 | /* PTCONJTFP16V */ |
| 101916 | TILE, GR16, GR16, TILE, |
| 101917 | /* PTCVTROWD2PSrre */ |
| 101918 | VR512, u8imm, GR32, |
| 101919 | /* PTCVTROWD2PSrreV */ |
| 101920 | VR512, GR16, GR16, TILE, GR32, |
| 101921 | /* PTCVTROWD2PSrri */ |
| 101922 | VR512, u8imm, i32u8imm, |
| 101923 | /* PTCVTROWD2PSrriV */ |
| 101924 | VR512, GR16, GR16, TILE, i32u8imm, |
| 101925 | /* PTCVTROWPS2BF16Hrre */ |
| 101926 | VR512, u8imm, GR32, |
| 101927 | /* PTCVTROWPS2BF16HrreV */ |
| 101928 | VR512, GR16, GR16, TILE, GR32, |
| 101929 | /* PTCVTROWPS2BF16Hrri */ |
| 101930 | VR512, u8imm, i32u8imm, |
| 101931 | /* PTCVTROWPS2BF16HrriV */ |
| 101932 | VR512, GR16, GR16, TILE, i32u8imm, |
| 101933 | /* PTCVTROWPS2BF16Lrre */ |
| 101934 | VR512, u8imm, GR32, |
| 101935 | /* PTCVTROWPS2BF16LrreV */ |
| 101936 | VR512, GR16, GR16, TILE, GR32, |
| 101937 | /* PTCVTROWPS2BF16Lrri */ |
| 101938 | VR512, u8imm, i32u8imm, |
| 101939 | /* PTCVTROWPS2BF16LrriV */ |
| 101940 | VR512, GR16, GR16, TILE, i32u8imm, |
| 101941 | /* PTCVTROWPS2PHHrre */ |
| 101942 | VR512, u8imm, GR32, |
| 101943 | /* PTCVTROWPS2PHHrreV */ |
| 101944 | VR512, GR16, GR16, TILE, GR32, |
| 101945 | /* PTCVTROWPS2PHHrri */ |
| 101946 | VR512, u8imm, i32u8imm, |
| 101947 | /* PTCVTROWPS2PHHrriV */ |
| 101948 | VR512, GR16, GR16, TILE, i32u8imm, |
| 101949 | /* PTCVTROWPS2PHLrre */ |
| 101950 | VR512, u8imm, GR32, |
| 101951 | /* PTCVTROWPS2PHLrreV */ |
| 101952 | VR512, GR16, GR16, TILE, GR32, |
| 101953 | /* PTCVTROWPS2PHLrri */ |
| 101954 | VR512, u8imm, i32u8imm, |
| 101955 | /* PTCVTROWPS2PHLrriV */ |
| 101956 | VR512, GR16, GR16, TILE, i32u8imm, |
| 101957 | /* PTDPBF16PS */ |
| 101958 | u8imm, u8imm, u8imm, |
| 101959 | /* PTDPBF8PS */ |
| 101960 | u8imm, u8imm, u8imm, |
| 101961 | /* PTDPBF8PSV */ |
| 101962 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 101963 | /* PTDPBHF8PS */ |
| 101964 | u8imm, u8imm, u8imm, |
| 101965 | /* PTDPBHF8PSV */ |
| 101966 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 101967 | /* PTDPBSSD */ |
| 101968 | u8imm, u8imm, u8imm, |
| 101969 | /* PTDPBSUD */ |
| 101970 | u8imm, u8imm, u8imm, |
| 101971 | /* PTDPBUSD */ |
| 101972 | u8imm, u8imm, u8imm, |
| 101973 | /* PTDPBUUD */ |
| 101974 | u8imm, u8imm, u8imm, |
| 101975 | /* PTDPFP16PS */ |
| 101976 | u8imm, u8imm, u8imm, |
| 101977 | /* PTDPHBF8PS */ |
| 101978 | u8imm, u8imm, u8imm, |
| 101979 | /* PTDPHBF8PSV */ |
| 101980 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 101981 | /* PTDPHF8PS */ |
| 101982 | u8imm, u8imm, u8imm, |
| 101983 | /* PTDPHF8PSV */ |
| 101984 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 101985 | /* PTESTrm */ |
| 101986 | VR128, f128mem, |
| 101987 | /* PTESTrr */ |
| 101988 | VR128, VR128, |
| 101989 | /* PTILELOADD */ |
| 101990 | u8imm, sibmem, |
| 101991 | /* PTILELOADDRS */ |
| 101992 | u8imm, sibmem, |
| 101993 | /* PTILELOADDRST1 */ |
| 101994 | u8imm, sibmem, |
| 101995 | /* PTILELOADDT1 */ |
| 101996 | u8imm, sibmem, |
| 101997 | /* PTILEMOVROWrre */ |
| 101998 | VR512, u8imm, GR32, |
| 101999 | /* PTILEMOVROWrreV */ |
| 102000 | VR512, GR16, GR16, TILE, GR32, |
| 102001 | /* PTILEMOVROWrri */ |
| 102002 | VR512, u8imm, i32u8imm, |
| 102003 | /* PTILEMOVROWrriV */ |
| 102004 | VR512, GR16, GR16, TILE, i32u8imm, |
| 102005 | /* PTILESTORED */ |
| 102006 | i8mem, u8imm, |
| 102007 | /* PTILEZERO */ |
| 102008 | u8imm, |
| 102009 | /* PTMMULTF32PS */ |
| 102010 | u8imm, u8imm, u8imm, |
| 102011 | /* PTMMULTF32PSV */ |
| 102012 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 102013 | /* PTTCMMIMFP16PS */ |
| 102014 | u8imm, u8imm, u8imm, |
| 102015 | /* PTTCMMIMFP16PSV */ |
| 102016 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 102017 | /* PTTCMMRLFP16PS */ |
| 102018 | u8imm, u8imm, u8imm, |
| 102019 | /* PTTCMMRLFP16PSV */ |
| 102020 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 102021 | /* PTTDPBF16PS */ |
| 102022 | u8imm, u8imm, u8imm, |
| 102023 | /* PTTDPBF16PSV */ |
| 102024 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 102025 | /* PTTDPFP16PS */ |
| 102026 | u8imm, u8imm, u8imm, |
| 102027 | /* PTTDPFP16PSV */ |
| 102028 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 102029 | /* PTTMMULTF32PS */ |
| 102030 | u8imm, u8imm, u8imm, |
| 102031 | /* PTTMMULTF32PSV */ |
| 102032 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 102033 | /* PTTRANSPOSED */ |
| 102034 | u8imm, u8imm, |
| 102035 | /* PTTRANSPOSEDV */ |
| 102036 | TILE, GR16, GR16, TILE, |
| 102037 | /* PTWRITE64m */ |
| 102038 | i64mem, |
| 102039 | /* PTWRITE64r */ |
| 102040 | GR64, |
| 102041 | /* PTWRITEm */ |
| 102042 | i32mem, |
| 102043 | /* PTWRITEr */ |
| 102044 | GR32, |
| 102045 | /* PUNPCKHBWrm */ |
| 102046 | VR128, VR128, i128mem, |
| 102047 | /* PUNPCKHBWrr */ |
| 102048 | VR128, VR128, VR128, |
| 102049 | /* PUNPCKHDQrm */ |
| 102050 | VR128, VR128, i128mem, |
| 102051 | /* PUNPCKHDQrr */ |
| 102052 | VR128, VR128, VR128, |
| 102053 | /* PUNPCKHQDQrm */ |
| 102054 | VR128, VR128, i128mem, |
| 102055 | /* PUNPCKHQDQrr */ |
| 102056 | VR128, VR128, VR128, |
| 102057 | /* PUNPCKHWDrm */ |
| 102058 | VR128, VR128, i128mem, |
| 102059 | /* PUNPCKHWDrr */ |
| 102060 | VR128, VR128, VR128, |
| 102061 | /* PUNPCKLBWrm */ |
| 102062 | VR128, VR128, i128mem, |
| 102063 | /* PUNPCKLBWrr */ |
| 102064 | VR128, VR128, VR128, |
| 102065 | /* PUNPCKLDQrm */ |
| 102066 | VR128, VR128, i128mem, |
| 102067 | /* PUNPCKLDQrr */ |
| 102068 | VR128, VR128, VR128, |
| 102069 | /* PUNPCKLQDQrm */ |
| 102070 | VR128, VR128, i128mem, |
| 102071 | /* PUNPCKLQDQrr */ |
| 102072 | VR128, VR128, VR128, |
| 102073 | /* PUNPCKLWDrm */ |
| 102074 | VR128, VR128, i128mem, |
| 102075 | /* PUNPCKLWDrr */ |
| 102076 | VR128, VR128, VR128, |
| 102077 | /* PUSH16i */ |
| 102078 | i16imm, |
| 102079 | /* PUSH16i8 */ |
| 102080 | i16i8imm, |
| 102081 | /* PUSH16r */ |
| 102082 | GR16, |
| 102083 | /* PUSH16rmm */ |
| 102084 | i16mem, |
| 102085 | /* PUSH16rmr */ |
| 102086 | GR16, |
| 102087 | /* PUSH2 */ |
| 102088 | GR64, GR64, |
| 102089 | /* PUSH2P */ |
| 102090 | GR64, GR64, |
| 102091 | /* PUSH32i */ |
| 102092 | i32imm, |
| 102093 | /* PUSH32i8 */ |
| 102094 | i32i8imm, |
| 102095 | /* PUSH32r */ |
| 102096 | GR32, |
| 102097 | /* PUSH32rmm */ |
| 102098 | i32mem, |
| 102099 | /* PUSH32rmr */ |
| 102100 | GR32, |
| 102101 | /* PUSH64i32 */ |
| 102102 | i64i32imm, |
| 102103 | /* PUSH64i8 */ |
| 102104 | i64i8imm, |
| 102105 | /* PUSH64r */ |
| 102106 | GR64, |
| 102107 | /* PUSH64rmm */ |
| 102108 | i64mem, |
| 102109 | /* PUSH64rmr */ |
| 102110 | GR64, |
| 102111 | /* PUSHA16 */ |
| 102112 | /* PUSHA32 */ |
| 102113 | /* PUSHCS16 */ |
| 102114 | /* PUSHCS32 */ |
| 102115 | /* PUSHDS16 */ |
| 102116 | /* PUSHDS32 */ |
| 102117 | /* PUSHES16 */ |
| 102118 | /* PUSHES32 */ |
| 102119 | /* PUSHF16 */ |
| 102120 | /* PUSHF32 */ |
| 102121 | /* PUSHF64 */ |
| 102122 | /* PUSHFS16 */ |
| 102123 | /* PUSHFS32 */ |
| 102124 | /* PUSHFS64 */ |
| 102125 | /* PUSHGS16 */ |
| 102126 | /* PUSHGS32 */ |
| 102127 | /* PUSHGS64 */ |
| 102128 | /* PUSHP64r */ |
| 102129 | GR64, |
| 102130 | /* PUSHSS16 */ |
| 102131 | /* PUSHSS32 */ |
| 102132 | /* PVALIDATE32 */ |
| 102133 | /* PVALIDATE64 */ |
| 102134 | /* PXORrm */ |
| 102135 | VR128, VR128, i128mem, |
| 102136 | /* PXORrr */ |
| 102137 | VR128, VR128, VR128, |
| 102138 | /* RCL16m1 */ |
| 102139 | i16mem, |
| 102140 | /* RCL16m1_EVEX */ |
| 102141 | i16mem, |
| 102142 | /* RCL16m1_ND */ |
| 102143 | GR16, i16mem, |
| 102144 | /* RCL16mCL */ |
| 102145 | i16mem, |
| 102146 | /* RCL16mCL_EVEX */ |
| 102147 | i16mem, |
| 102148 | /* RCL16mCL_ND */ |
| 102149 | GR16, i16mem, |
| 102150 | /* RCL16mi */ |
| 102151 | i16mem, u8imm, |
| 102152 | /* RCL16mi_EVEX */ |
| 102153 | i16mem, u8imm, |
| 102154 | /* RCL16mi_ND */ |
| 102155 | GR16, i16mem, u8imm, |
| 102156 | /* RCL16r1 */ |
| 102157 | GR16, GR16, |
| 102158 | /* RCL16r1_EVEX */ |
| 102159 | GR16, GR16, |
| 102160 | /* RCL16r1_ND */ |
| 102161 | GR16, GR16, |
| 102162 | /* RCL16rCL */ |
| 102163 | GR16, GR16, |
| 102164 | /* RCL16rCL_EVEX */ |
| 102165 | GR16, GR16, |
| 102166 | /* RCL16rCL_ND */ |
| 102167 | GR16, GR16, |
| 102168 | /* RCL16ri */ |
| 102169 | GR16, GR16, u8imm, |
| 102170 | /* RCL16ri_EVEX */ |
| 102171 | GR16, GR16, u8imm, |
| 102172 | /* RCL16ri_ND */ |
| 102173 | GR16, GR16, u8imm, |
| 102174 | /* RCL32m1 */ |
| 102175 | i32mem, |
| 102176 | /* RCL32m1_EVEX */ |
| 102177 | i32mem, |
| 102178 | /* RCL32m1_ND */ |
| 102179 | GR32, i32mem, |
| 102180 | /* RCL32mCL */ |
| 102181 | i32mem, |
| 102182 | /* RCL32mCL_EVEX */ |
| 102183 | i32mem, |
| 102184 | /* RCL32mCL_ND */ |
| 102185 | GR32, i32mem, |
| 102186 | /* RCL32mi */ |
| 102187 | i32mem, u8imm, |
| 102188 | /* RCL32mi_EVEX */ |
| 102189 | i32mem, u8imm, |
| 102190 | /* RCL32mi_ND */ |
| 102191 | GR32, i32mem, u8imm, |
| 102192 | /* RCL32r1 */ |
| 102193 | GR32, GR32, |
| 102194 | /* RCL32r1_EVEX */ |
| 102195 | GR32, GR32, |
| 102196 | /* RCL32r1_ND */ |
| 102197 | GR32, GR32, |
| 102198 | /* RCL32rCL */ |
| 102199 | GR32, GR32, |
| 102200 | /* RCL32rCL_EVEX */ |
| 102201 | GR32, GR32, |
| 102202 | /* RCL32rCL_ND */ |
| 102203 | GR32, GR32, |
| 102204 | /* RCL32ri */ |
| 102205 | GR32, GR32, u8imm, |
| 102206 | /* RCL32ri_EVEX */ |
| 102207 | GR32, GR32, u8imm, |
| 102208 | /* RCL32ri_ND */ |
| 102209 | GR32, GR32, u8imm, |
| 102210 | /* RCL64m1 */ |
| 102211 | i64mem, |
| 102212 | /* RCL64m1_EVEX */ |
| 102213 | i64mem, |
| 102214 | /* RCL64m1_ND */ |
| 102215 | GR64, i64mem, |
| 102216 | /* RCL64mCL */ |
| 102217 | i64mem, |
| 102218 | /* RCL64mCL_EVEX */ |
| 102219 | i64mem, |
| 102220 | /* RCL64mCL_ND */ |
| 102221 | GR64, i64mem, |
| 102222 | /* RCL64mi */ |
| 102223 | i64mem, u8imm, |
| 102224 | /* RCL64mi_EVEX */ |
| 102225 | i64mem, u8imm, |
| 102226 | /* RCL64mi_ND */ |
| 102227 | GR64, i64mem, u8imm, |
| 102228 | /* RCL64r1 */ |
| 102229 | GR64, GR64, |
| 102230 | /* RCL64r1_EVEX */ |
| 102231 | GR64, GR64, |
| 102232 | /* RCL64r1_ND */ |
| 102233 | GR64, GR64, |
| 102234 | /* RCL64rCL */ |
| 102235 | GR64, GR64, |
| 102236 | /* RCL64rCL_EVEX */ |
| 102237 | GR64, GR64, |
| 102238 | /* RCL64rCL_ND */ |
| 102239 | GR64, GR64, |
| 102240 | /* RCL64ri */ |
| 102241 | GR64, GR64, u8imm, |
| 102242 | /* RCL64ri_EVEX */ |
| 102243 | GR64, GR64, u8imm, |
| 102244 | /* RCL64ri_ND */ |
| 102245 | GR64, GR64, u8imm, |
| 102246 | /* RCL8m1 */ |
| 102247 | i8mem, |
| 102248 | /* RCL8m1_EVEX */ |
| 102249 | i8mem, |
| 102250 | /* RCL8m1_ND */ |
| 102251 | GR8, i8mem, |
| 102252 | /* RCL8mCL */ |
| 102253 | i8mem, |
| 102254 | /* RCL8mCL_EVEX */ |
| 102255 | i8mem, |
| 102256 | /* RCL8mCL_ND */ |
| 102257 | GR8, i8mem, |
| 102258 | /* RCL8mi */ |
| 102259 | i8mem, u8imm, |
| 102260 | /* RCL8mi_EVEX */ |
| 102261 | i8mem, u8imm, |
| 102262 | /* RCL8mi_ND */ |
| 102263 | GR8, i8mem, u8imm, |
| 102264 | /* RCL8r1 */ |
| 102265 | GR8, GR8, |
| 102266 | /* RCL8r1_EVEX */ |
| 102267 | GR8, GR8, |
| 102268 | /* RCL8r1_ND */ |
| 102269 | GR8, GR8, |
| 102270 | /* RCL8rCL */ |
| 102271 | GR8, GR8, |
| 102272 | /* RCL8rCL_EVEX */ |
| 102273 | GR8, GR8, |
| 102274 | /* RCL8rCL_ND */ |
| 102275 | GR8, GR8, |
| 102276 | /* RCL8ri */ |
| 102277 | GR8, GR8, u8imm, |
| 102278 | /* RCL8ri_EVEX */ |
| 102279 | GR8, GR8, u8imm, |
| 102280 | /* RCL8ri_ND */ |
| 102281 | GR8, GR8, u8imm, |
| 102282 | /* RCPPSm */ |
| 102283 | VR128, f128mem, |
| 102284 | /* RCPPSr */ |
| 102285 | VR128, VR128, |
| 102286 | /* RCPSSm */ |
| 102287 | FR32, f32mem, |
| 102288 | /* RCPSSm_Int */ |
| 102289 | VR128, VR128, ssmem, |
| 102290 | /* RCPSSr */ |
| 102291 | FR32, FR32, |
| 102292 | /* RCPSSr_Int */ |
| 102293 | VR128, VR128, VR128, |
| 102294 | /* RCR16m1 */ |
| 102295 | i16mem, |
| 102296 | /* RCR16m1_EVEX */ |
| 102297 | i16mem, |
| 102298 | /* RCR16m1_ND */ |
| 102299 | GR16, i16mem, |
| 102300 | /* RCR16mCL */ |
| 102301 | i16mem, |
| 102302 | /* RCR16mCL_EVEX */ |
| 102303 | i16mem, |
| 102304 | /* RCR16mCL_ND */ |
| 102305 | GR16, i16mem, |
| 102306 | /* RCR16mi */ |
| 102307 | i16mem, u8imm, |
| 102308 | /* RCR16mi_EVEX */ |
| 102309 | i16mem, u8imm, |
| 102310 | /* RCR16mi_ND */ |
| 102311 | GR16, i16mem, u8imm, |
| 102312 | /* RCR16r1 */ |
| 102313 | GR16, GR16, |
| 102314 | /* RCR16r1_EVEX */ |
| 102315 | GR16, GR16, |
| 102316 | /* RCR16r1_ND */ |
| 102317 | GR16, GR16, |
| 102318 | /* RCR16rCL */ |
| 102319 | GR16, GR16, |
| 102320 | /* RCR16rCL_EVEX */ |
| 102321 | GR16, GR16, |
| 102322 | /* RCR16rCL_ND */ |
| 102323 | GR16, GR16, |
| 102324 | /* RCR16ri */ |
| 102325 | GR16, GR16, u8imm, |
| 102326 | /* RCR16ri_EVEX */ |
| 102327 | GR16, GR16, u8imm, |
| 102328 | /* RCR16ri_ND */ |
| 102329 | GR16, GR16, u8imm, |
| 102330 | /* RCR32m1 */ |
| 102331 | i32mem, |
| 102332 | /* RCR32m1_EVEX */ |
| 102333 | i32mem, |
| 102334 | /* RCR32m1_ND */ |
| 102335 | GR32, i32mem, |
| 102336 | /* RCR32mCL */ |
| 102337 | i32mem, |
| 102338 | /* RCR32mCL_EVEX */ |
| 102339 | i32mem, |
| 102340 | /* RCR32mCL_ND */ |
| 102341 | GR32, i32mem, |
| 102342 | /* RCR32mi */ |
| 102343 | i32mem, u8imm, |
| 102344 | /* RCR32mi_EVEX */ |
| 102345 | i32mem, u8imm, |
| 102346 | /* RCR32mi_ND */ |
| 102347 | GR32, i32mem, u8imm, |
| 102348 | /* RCR32r1 */ |
| 102349 | GR32, GR32, |
| 102350 | /* RCR32r1_EVEX */ |
| 102351 | GR32, GR32, |
| 102352 | /* RCR32r1_ND */ |
| 102353 | GR32, GR32, |
| 102354 | /* RCR32rCL */ |
| 102355 | GR32, GR32, |
| 102356 | /* RCR32rCL_EVEX */ |
| 102357 | GR32, GR32, |
| 102358 | /* RCR32rCL_ND */ |
| 102359 | GR32, GR32, |
| 102360 | /* RCR32ri */ |
| 102361 | GR32, GR32, u8imm, |
| 102362 | /* RCR32ri_EVEX */ |
| 102363 | GR32, GR32, u8imm, |
| 102364 | /* RCR32ri_ND */ |
| 102365 | GR32, GR32, u8imm, |
| 102366 | /* RCR64m1 */ |
| 102367 | i64mem, |
| 102368 | /* RCR64m1_EVEX */ |
| 102369 | i64mem, |
| 102370 | /* RCR64m1_ND */ |
| 102371 | GR64, i64mem, |
| 102372 | /* RCR64mCL */ |
| 102373 | i64mem, |
| 102374 | /* RCR64mCL_EVEX */ |
| 102375 | i64mem, |
| 102376 | /* RCR64mCL_ND */ |
| 102377 | GR64, i64mem, |
| 102378 | /* RCR64mi */ |
| 102379 | i64mem, u8imm, |
| 102380 | /* RCR64mi_EVEX */ |
| 102381 | i64mem, u8imm, |
| 102382 | /* RCR64mi_ND */ |
| 102383 | GR64, i64mem, u8imm, |
| 102384 | /* RCR64r1 */ |
| 102385 | GR64, GR64, |
| 102386 | /* RCR64r1_EVEX */ |
| 102387 | GR64, GR64, |
| 102388 | /* RCR64r1_ND */ |
| 102389 | GR64, GR64, |
| 102390 | /* RCR64rCL */ |
| 102391 | GR64, GR64, |
| 102392 | /* RCR64rCL_EVEX */ |
| 102393 | GR64, GR64, |
| 102394 | /* RCR64rCL_ND */ |
| 102395 | GR64, GR64, |
| 102396 | /* RCR64ri */ |
| 102397 | GR64, GR64, u8imm, |
| 102398 | /* RCR64ri_EVEX */ |
| 102399 | GR64, GR64, u8imm, |
| 102400 | /* RCR64ri_ND */ |
| 102401 | GR64, GR64, u8imm, |
| 102402 | /* RCR8m1 */ |
| 102403 | i8mem, |
| 102404 | /* RCR8m1_EVEX */ |
| 102405 | i8mem, |
| 102406 | /* RCR8m1_ND */ |
| 102407 | GR8, i8mem, |
| 102408 | /* RCR8mCL */ |
| 102409 | i8mem, |
| 102410 | /* RCR8mCL_EVEX */ |
| 102411 | i8mem, |
| 102412 | /* RCR8mCL_ND */ |
| 102413 | GR8, i8mem, |
| 102414 | /* RCR8mi */ |
| 102415 | i8mem, u8imm, |
| 102416 | /* RCR8mi_EVEX */ |
| 102417 | i8mem, u8imm, |
| 102418 | /* RCR8mi_ND */ |
| 102419 | GR8, i8mem, u8imm, |
| 102420 | /* RCR8r1 */ |
| 102421 | GR8, GR8, |
| 102422 | /* RCR8r1_EVEX */ |
| 102423 | GR8, GR8, |
| 102424 | /* RCR8r1_ND */ |
| 102425 | GR8, GR8, |
| 102426 | /* RCR8rCL */ |
| 102427 | GR8, GR8, |
| 102428 | /* RCR8rCL_EVEX */ |
| 102429 | GR8, GR8, |
| 102430 | /* RCR8rCL_ND */ |
| 102431 | GR8, GR8, |
| 102432 | /* RCR8ri */ |
| 102433 | GR8, GR8, u8imm, |
| 102434 | /* RCR8ri_EVEX */ |
| 102435 | GR8, GR8, u8imm, |
| 102436 | /* RCR8ri_ND */ |
| 102437 | GR8, GR8, u8imm, |
| 102438 | /* RDFSBASE */ |
| 102439 | GR32, |
| 102440 | /* RDFSBASE64 */ |
| 102441 | GR64, |
| 102442 | /* RDGSBASE */ |
| 102443 | GR32, |
| 102444 | /* RDGSBASE64 */ |
| 102445 | GR64, |
| 102446 | /* RDMSR */ |
| 102447 | /* RDMSRLIST */ |
| 102448 | /* RDMSRri */ |
| 102449 | GR64, i64i32imm, |
| 102450 | /* RDMSRri_EVEX */ |
| 102451 | GR64, i64i32imm, |
| 102452 | /* RDPID32 */ |
| 102453 | GR32, |
| 102454 | /* RDPID64 */ |
| 102455 | GR64, |
| 102456 | /* RDPKRUr */ |
| 102457 | /* RDPMC */ |
| 102458 | /* RDPRU */ |
| 102459 | /* RDRAND16r */ |
| 102460 | GR16, |
| 102461 | /* RDRAND32r */ |
| 102462 | GR32, |
| 102463 | /* RDRAND64r */ |
| 102464 | GR64, |
| 102465 | /* RDSEED16r */ |
| 102466 | GR16, |
| 102467 | /* RDSEED32r */ |
| 102468 | GR32, |
| 102469 | /* RDSEED64r */ |
| 102470 | GR64, |
| 102471 | /* RDSSPD */ |
| 102472 | GR32, GR32, |
| 102473 | /* RDSSPQ */ |
| 102474 | GR64, GR64, |
| 102475 | /* RDTSC */ |
| 102476 | /* RDTSCP */ |
| 102477 | /* REPNE_PREFIX */ |
| 102478 | /* REP_MOVSB_32 */ |
| 102479 | /* REP_MOVSB_64 */ |
| 102480 | /* REP_MOVSD_32 */ |
| 102481 | /* REP_MOVSD_64 */ |
| 102482 | /* REP_MOVSQ_32 */ |
| 102483 | /* REP_MOVSQ_64 */ |
| 102484 | /* REP_MOVSW_32 */ |
| 102485 | /* REP_MOVSW_64 */ |
| 102486 | /* REP_PREFIX */ |
| 102487 | /* REP_STOSB_32 */ |
| 102488 | /* REP_STOSB_64 */ |
| 102489 | /* REP_STOSD_32 */ |
| 102490 | /* REP_STOSD_64 */ |
| 102491 | /* REP_STOSQ_32 */ |
| 102492 | /* REP_STOSQ_64 */ |
| 102493 | /* REP_STOSW_32 */ |
| 102494 | /* REP_STOSW_64 */ |
| 102495 | /* RET */ |
| 102496 | i32imm, |
| 102497 | /* RET16 */ |
| 102498 | /* RET32 */ |
| 102499 | /* RET64 */ |
| 102500 | /* RETI16 */ |
| 102501 | i16imm, |
| 102502 | /* RETI32 */ |
| 102503 | i16imm, |
| 102504 | /* RETI64 */ |
| 102505 | i16imm, |
| 102506 | /* REX64_PREFIX */ |
| 102507 | /* RMPADJUST */ |
| 102508 | /* RMPQUERY */ |
| 102509 | /* RMPUPDATE */ |
| 102510 | /* ROL16m1 */ |
| 102511 | i16mem, |
| 102512 | /* ROL16m1_EVEX */ |
| 102513 | i16mem, |
| 102514 | /* ROL16m1_ND */ |
| 102515 | GR16, i16mem, |
| 102516 | /* ROL16m1_NF */ |
| 102517 | i16mem, |
| 102518 | /* ROL16m1_NF_ND */ |
| 102519 | GR16, i16mem, |
| 102520 | /* ROL16mCL */ |
| 102521 | i16mem, |
| 102522 | /* ROL16mCL_EVEX */ |
| 102523 | i16mem, |
| 102524 | /* ROL16mCL_ND */ |
| 102525 | GR16, i16mem, |
| 102526 | /* ROL16mCL_NF */ |
| 102527 | i16mem, |
| 102528 | /* ROL16mCL_NF_ND */ |
| 102529 | GR16, i16mem, |
| 102530 | /* ROL16mi */ |
| 102531 | i16mem, u8imm, |
| 102532 | /* ROL16mi_EVEX */ |
| 102533 | i16mem, u8imm, |
| 102534 | /* ROL16mi_ND */ |
| 102535 | GR16, i16mem, u8imm, |
| 102536 | /* ROL16mi_NF */ |
| 102537 | i16mem, u8imm, |
| 102538 | /* ROL16mi_NF_ND */ |
| 102539 | GR16, i16mem, u8imm, |
| 102540 | /* ROL16r1 */ |
| 102541 | GR16, GR16, |
| 102542 | /* ROL16r1_EVEX */ |
| 102543 | GR16, GR16, |
| 102544 | /* ROL16r1_ND */ |
| 102545 | GR16, GR16, |
| 102546 | /* ROL16r1_NF */ |
| 102547 | GR16, GR16, |
| 102548 | /* ROL16r1_NF_ND */ |
| 102549 | GR16, GR16, |
| 102550 | /* ROL16rCL */ |
| 102551 | GR16, GR16, |
| 102552 | /* ROL16rCL_EVEX */ |
| 102553 | GR16, GR16, |
| 102554 | /* ROL16rCL_ND */ |
| 102555 | GR16, GR16, |
| 102556 | /* ROL16rCL_NF */ |
| 102557 | GR16, GR16, |
| 102558 | /* ROL16rCL_NF_ND */ |
| 102559 | GR16, GR16, |
| 102560 | /* ROL16ri */ |
| 102561 | GR16, GR16, u8imm, |
| 102562 | /* ROL16ri_EVEX */ |
| 102563 | GR16, GR16, u8imm, |
| 102564 | /* ROL16ri_ND */ |
| 102565 | GR16, GR16, u8imm, |
| 102566 | /* ROL16ri_NF */ |
| 102567 | GR16, GR16, u8imm, |
| 102568 | /* ROL16ri_NF_ND */ |
| 102569 | GR16, GR16, u8imm, |
| 102570 | /* ROL32m1 */ |
| 102571 | i32mem, |
| 102572 | /* ROL32m1_EVEX */ |
| 102573 | i32mem, |
| 102574 | /* ROL32m1_ND */ |
| 102575 | GR32, i32mem, |
| 102576 | /* ROL32m1_NF */ |
| 102577 | i32mem, |
| 102578 | /* ROL32m1_NF_ND */ |
| 102579 | GR32, i32mem, |
| 102580 | /* ROL32mCL */ |
| 102581 | i32mem, |
| 102582 | /* ROL32mCL_EVEX */ |
| 102583 | i32mem, |
| 102584 | /* ROL32mCL_ND */ |
| 102585 | GR32, i32mem, |
| 102586 | /* ROL32mCL_NF */ |
| 102587 | i32mem, |
| 102588 | /* ROL32mCL_NF_ND */ |
| 102589 | GR32, i32mem, |
| 102590 | /* ROL32mi */ |
| 102591 | i32mem, u8imm, |
| 102592 | /* ROL32mi_EVEX */ |
| 102593 | i32mem, u8imm, |
| 102594 | /* ROL32mi_ND */ |
| 102595 | GR32, i32mem, u8imm, |
| 102596 | /* ROL32mi_NF */ |
| 102597 | i32mem, u8imm, |
| 102598 | /* ROL32mi_NF_ND */ |
| 102599 | GR32, i32mem, u8imm, |
| 102600 | /* ROL32r1 */ |
| 102601 | GR32, GR32, |
| 102602 | /* ROL32r1_EVEX */ |
| 102603 | GR32, GR32, |
| 102604 | /* ROL32r1_ND */ |
| 102605 | GR32, GR32, |
| 102606 | /* ROL32r1_NF */ |
| 102607 | GR32, GR32, |
| 102608 | /* ROL32r1_NF_ND */ |
| 102609 | GR32, GR32, |
| 102610 | /* ROL32rCL */ |
| 102611 | GR32, GR32, |
| 102612 | /* ROL32rCL_EVEX */ |
| 102613 | GR32, GR32, |
| 102614 | /* ROL32rCL_ND */ |
| 102615 | GR32, GR32, |
| 102616 | /* ROL32rCL_NF */ |
| 102617 | GR32, GR32, |
| 102618 | /* ROL32rCL_NF_ND */ |
| 102619 | GR32, GR32, |
| 102620 | /* ROL32ri */ |
| 102621 | GR32, GR32, u8imm, |
| 102622 | /* ROL32ri_EVEX */ |
| 102623 | GR32, GR32, u8imm, |
| 102624 | /* ROL32ri_ND */ |
| 102625 | GR32, GR32, u8imm, |
| 102626 | /* ROL32ri_NF */ |
| 102627 | GR32, GR32, u8imm, |
| 102628 | /* ROL32ri_NF_ND */ |
| 102629 | GR32, GR32, u8imm, |
| 102630 | /* ROL64m1 */ |
| 102631 | i64mem, |
| 102632 | /* ROL64m1_EVEX */ |
| 102633 | i64mem, |
| 102634 | /* ROL64m1_ND */ |
| 102635 | GR64, i64mem, |
| 102636 | /* ROL64m1_NF */ |
| 102637 | i64mem, |
| 102638 | /* ROL64m1_NF_ND */ |
| 102639 | GR64, i64mem, |
| 102640 | /* ROL64mCL */ |
| 102641 | i64mem, |
| 102642 | /* ROL64mCL_EVEX */ |
| 102643 | i64mem, |
| 102644 | /* ROL64mCL_ND */ |
| 102645 | GR64, i64mem, |
| 102646 | /* ROL64mCL_NF */ |
| 102647 | i64mem, |
| 102648 | /* ROL64mCL_NF_ND */ |
| 102649 | GR64, i64mem, |
| 102650 | /* ROL64mi */ |
| 102651 | i64mem, u8imm, |
| 102652 | /* ROL64mi_EVEX */ |
| 102653 | i64mem, u8imm, |
| 102654 | /* ROL64mi_ND */ |
| 102655 | GR64, i64mem, u8imm, |
| 102656 | /* ROL64mi_NF */ |
| 102657 | i64mem, u8imm, |
| 102658 | /* ROL64mi_NF_ND */ |
| 102659 | GR64, i64mem, u8imm, |
| 102660 | /* ROL64r1 */ |
| 102661 | GR64, GR64, |
| 102662 | /* ROL64r1_EVEX */ |
| 102663 | GR64, GR64, |
| 102664 | /* ROL64r1_ND */ |
| 102665 | GR64, GR64, |
| 102666 | /* ROL64r1_NF */ |
| 102667 | GR64, GR64, |
| 102668 | /* ROL64r1_NF_ND */ |
| 102669 | GR64, GR64, |
| 102670 | /* ROL64rCL */ |
| 102671 | GR64, GR64, |
| 102672 | /* ROL64rCL_EVEX */ |
| 102673 | GR64, GR64, |
| 102674 | /* ROL64rCL_ND */ |
| 102675 | GR64, GR64, |
| 102676 | /* ROL64rCL_NF */ |
| 102677 | GR64, GR64, |
| 102678 | /* ROL64rCL_NF_ND */ |
| 102679 | GR64, GR64, |
| 102680 | /* ROL64ri */ |
| 102681 | GR64, GR64, u8imm, |
| 102682 | /* ROL64ri_EVEX */ |
| 102683 | GR64, GR64, u8imm, |
| 102684 | /* ROL64ri_ND */ |
| 102685 | GR64, GR64, u8imm, |
| 102686 | /* ROL64ri_NF */ |
| 102687 | GR64, GR64, u8imm, |
| 102688 | /* ROL64ri_NF_ND */ |
| 102689 | GR64, GR64, u8imm, |
| 102690 | /* ROL8m1 */ |
| 102691 | i8mem, |
| 102692 | /* ROL8m1_EVEX */ |
| 102693 | i8mem, |
| 102694 | /* ROL8m1_ND */ |
| 102695 | GR8, i8mem, |
| 102696 | /* ROL8m1_NF */ |
| 102697 | i8mem, |
| 102698 | /* ROL8m1_NF_ND */ |
| 102699 | GR8, i8mem, |
| 102700 | /* ROL8mCL */ |
| 102701 | i8mem, |
| 102702 | /* ROL8mCL_EVEX */ |
| 102703 | i8mem, |
| 102704 | /* ROL8mCL_ND */ |
| 102705 | GR8, i8mem, |
| 102706 | /* ROL8mCL_NF */ |
| 102707 | i8mem, |
| 102708 | /* ROL8mCL_NF_ND */ |
| 102709 | GR8, i8mem, |
| 102710 | /* ROL8mi */ |
| 102711 | i8mem, u8imm, |
| 102712 | /* ROL8mi_EVEX */ |
| 102713 | i8mem, u8imm, |
| 102714 | /* ROL8mi_ND */ |
| 102715 | GR8, i8mem, u8imm, |
| 102716 | /* ROL8mi_NF */ |
| 102717 | i8mem, u8imm, |
| 102718 | /* ROL8mi_NF_ND */ |
| 102719 | GR8, i8mem, u8imm, |
| 102720 | /* ROL8r1 */ |
| 102721 | GR8, GR8, |
| 102722 | /* ROL8r1_EVEX */ |
| 102723 | GR8, GR8, |
| 102724 | /* ROL8r1_ND */ |
| 102725 | GR8, GR8, |
| 102726 | /* ROL8r1_NF */ |
| 102727 | GR8, GR8, |
| 102728 | /* ROL8r1_NF_ND */ |
| 102729 | GR8, GR8, |
| 102730 | /* ROL8rCL */ |
| 102731 | GR8, GR8, |
| 102732 | /* ROL8rCL_EVEX */ |
| 102733 | GR8, GR8, |
| 102734 | /* ROL8rCL_ND */ |
| 102735 | GR8, GR8, |
| 102736 | /* ROL8rCL_NF */ |
| 102737 | GR8, GR8, |
| 102738 | /* ROL8rCL_NF_ND */ |
| 102739 | GR8, GR8, |
| 102740 | /* ROL8ri */ |
| 102741 | GR8, GR8, u8imm, |
| 102742 | /* ROL8ri_EVEX */ |
| 102743 | GR8, GR8, u8imm, |
| 102744 | /* ROL8ri_ND */ |
| 102745 | GR8, GR8, u8imm, |
| 102746 | /* ROL8ri_NF */ |
| 102747 | GR8, GR8, u8imm, |
| 102748 | /* ROL8ri_NF_ND */ |
| 102749 | GR8, GR8, u8imm, |
| 102750 | /* ROR16m1 */ |
| 102751 | i16mem, |
| 102752 | /* ROR16m1_EVEX */ |
| 102753 | i16mem, |
| 102754 | /* ROR16m1_ND */ |
| 102755 | GR16, i16mem, |
| 102756 | /* ROR16m1_NF */ |
| 102757 | i16mem, |
| 102758 | /* ROR16m1_NF_ND */ |
| 102759 | GR16, i16mem, |
| 102760 | /* ROR16mCL */ |
| 102761 | i16mem, |
| 102762 | /* ROR16mCL_EVEX */ |
| 102763 | i16mem, |
| 102764 | /* ROR16mCL_ND */ |
| 102765 | GR16, i16mem, |
| 102766 | /* ROR16mCL_NF */ |
| 102767 | i16mem, |
| 102768 | /* ROR16mCL_NF_ND */ |
| 102769 | GR16, i16mem, |
| 102770 | /* ROR16mi */ |
| 102771 | i16mem, u8imm, |
| 102772 | /* ROR16mi_EVEX */ |
| 102773 | i16mem, u8imm, |
| 102774 | /* ROR16mi_ND */ |
| 102775 | GR16, i16mem, u8imm, |
| 102776 | /* ROR16mi_NF */ |
| 102777 | i16mem, u8imm, |
| 102778 | /* ROR16mi_NF_ND */ |
| 102779 | GR16, i16mem, u8imm, |
| 102780 | /* ROR16r1 */ |
| 102781 | GR16, GR16, |
| 102782 | /* ROR16r1_EVEX */ |
| 102783 | GR16, GR16, |
| 102784 | /* ROR16r1_ND */ |
| 102785 | GR16, GR16, |
| 102786 | /* ROR16r1_NF */ |
| 102787 | GR16, GR16, |
| 102788 | /* ROR16r1_NF_ND */ |
| 102789 | GR16, GR16, |
| 102790 | /* ROR16rCL */ |
| 102791 | GR16, GR16, |
| 102792 | /* ROR16rCL_EVEX */ |
| 102793 | GR16, GR16, |
| 102794 | /* ROR16rCL_ND */ |
| 102795 | GR16, GR16, |
| 102796 | /* ROR16rCL_NF */ |
| 102797 | GR16, GR16, |
| 102798 | /* ROR16rCL_NF_ND */ |
| 102799 | GR16, GR16, |
| 102800 | /* ROR16ri */ |
| 102801 | GR16, GR16, u8imm, |
| 102802 | /* ROR16ri_EVEX */ |
| 102803 | GR16, GR16, u8imm, |
| 102804 | /* ROR16ri_ND */ |
| 102805 | GR16, GR16, u8imm, |
| 102806 | /* ROR16ri_NF */ |
| 102807 | GR16, GR16, u8imm, |
| 102808 | /* ROR16ri_NF_ND */ |
| 102809 | GR16, GR16, u8imm, |
| 102810 | /* ROR32m1 */ |
| 102811 | i32mem, |
| 102812 | /* ROR32m1_EVEX */ |
| 102813 | i32mem, |
| 102814 | /* ROR32m1_ND */ |
| 102815 | GR32, i32mem, |
| 102816 | /* ROR32m1_NF */ |
| 102817 | i32mem, |
| 102818 | /* ROR32m1_NF_ND */ |
| 102819 | GR32, i32mem, |
| 102820 | /* ROR32mCL */ |
| 102821 | i32mem, |
| 102822 | /* ROR32mCL_EVEX */ |
| 102823 | i32mem, |
| 102824 | /* ROR32mCL_ND */ |
| 102825 | GR32, i32mem, |
| 102826 | /* ROR32mCL_NF */ |
| 102827 | i32mem, |
| 102828 | /* ROR32mCL_NF_ND */ |
| 102829 | GR32, i32mem, |
| 102830 | /* ROR32mi */ |
| 102831 | i32mem, u8imm, |
| 102832 | /* ROR32mi_EVEX */ |
| 102833 | i32mem, u8imm, |
| 102834 | /* ROR32mi_ND */ |
| 102835 | GR32, i32mem, u8imm, |
| 102836 | /* ROR32mi_NF */ |
| 102837 | i32mem, u8imm, |
| 102838 | /* ROR32mi_NF_ND */ |
| 102839 | GR32, i32mem, u8imm, |
| 102840 | /* ROR32r1 */ |
| 102841 | GR32, GR32, |
| 102842 | /* ROR32r1_EVEX */ |
| 102843 | GR32, GR32, |
| 102844 | /* ROR32r1_ND */ |
| 102845 | GR32, GR32, |
| 102846 | /* ROR32r1_NF */ |
| 102847 | GR32, GR32, |
| 102848 | /* ROR32r1_NF_ND */ |
| 102849 | GR32, GR32, |
| 102850 | /* ROR32rCL */ |
| 102851 | GR32, GR32, |
| 102852 | /* ROR32rCL_EVEX */ |
| 102853 | GR32, GR32, |
| 102854 | /* ROR32rCL_ND */ |
| 102855 | GR32, GR32, |
| 102856 | /* ROR32rCL_NF */ |
| 102857 | GR32, GR32, |
| 102858 | /* ROR32rCL_NF_ND */ |
| 102859 | GR32, GR32, |
| 102860 | /* ROR32ri */ |
| 102861 | GR32, GR32, u8imm, |
| 102862 | /* ROR32ri_EVEX */ |
| 102863 | GR32, GR32, u8imm, |
| 102864 | /* ROR32ri_ND */ |
| 102865 | GR32, GR32, u8imm, |
| 102866 | /* ROR32ri_NF */ |
| 102867 | GR32, GR32, u8imm, |
| 102868 | /* ROR32ri_NF_ND */ |
| 102869 | GR32, GR32, u8imm, |
| 102870 | /* ROR64m1 */ |
| 102871 | i64mem, |
| 102872 | /* ROR64m1_EVEX */ |
| 102873 | i64mem, |
| 102874 | /* ROR64m1_ND */ |
| 102875 | GR64, i64mem, |
| 102876 | /* ROR64m1_NF */ |
| 102877 | i64mem, |
| 102878 | /* ROR64m1_NF_ND */ |
| 102879 | GR64, i64mem, |
| 102880 | /* ROR64mCL */ |
| 102881 | i64mem, |
| 102882 | /* ROR64mCL_EVEX */ |
| 102883 | i64mem, |
| 102884 | /* ROR64mCL_ND */ |
| 102885 | GR64, i64mem, |
| 102886 | /* ROR64mCL_NF */ |
| 102887 | i64mem, |
| 102888 | /* ROR64mCL_NF_ND */ |
| 102889 | GR64, i64mem, |
| 102890 | /* ROR64mi */ |
| 102891 | i64mem, u8imm, |
| 102892 | /* ROR64mi_EVEX */ |
| 102893 | i64mem, u8imm, |
| 102894 | /* ROR64mi_ND */ |
| 102895 | GR64, i64mem, u8imm, |
| 102896 | /* ROR64mi_NF */ |
| 102897 | i64mem, u8imm, |
| 102898 | /* ROR64mi_NF_ND */ |
| 102899 | GR64, i64mem, u8imm, |
| 102900 | /* ROR64r1 */ |
| 102901 | GR64, GR64, |
| 102902 | /* ROR64r1_EVEX */ |
| 102903 | GR64, GR64, |
| 102904 | /* ROR64r1_ND */ |
| 102905 | GR64, GR64, |
| 102906 | /* ROR64r1_NF */ |
| 102907 | GR64, GR64, |
| 102908 | /* ROR64r1_NF_ND */ |
| 102909 | GR64, GR64, |
| 102910 | /* ROR64rCL */ |
| 102911 | GR64, GR64, |
| 102912 | /* ROR64rCL_EVEX */ |
| 102913 | GR64, GR64, |
| 102914 | /* ROR64rCL_ND */ |
| 102915 | GR64, GR64, |
| 102916 | /* ROR64rCL_NF */ |
| 102917 | GR64, GR64, |
| 102918 | /* ROR64rCL_NF_ND */ |
| 102919 | GR64, GR64, |
| 102920 | /* ROR64ri */ |
| 102921 | GR64, GR64, u8imm, |
| 102922 | /* ROR64ri_EVEX */ |
| 102923 | GR64, GR64, u8imm, |
| 102924 | /* ROR64ri_ND */ |
| 102925 | GR64, GR64, u8imm, |
| 102926 | /* ROR64ri_NF */ |
| 102927 | GR64, GR64, u8imm, |
| 102928 | /* ROR64ri_NF_ND */ |
| 102929 | GR64, GR64, u8imm, |
| 102930 | /* ROR8m1 */ |
| 102931 | i8mem, |
| 102932 | /* ROR8m1_EVEX */ |
| 102933 | i8mem, |
| 102934 | /* ROR8m1_ND */ |
| 102935 | GR8, i8mem, |
| 102936 | /* ROR8m1_NF */ |
| 102937 | i8mem, |
| 102938 | /* ROR8m1_NF_ND */ |
| 102939 | GR8, i8mem, |
| 102940 | /* ROR8mCL */ |
| 102941 | i8mem, |
| 102942 | /* ROR8mCL_EVEX */ |
| 102943 | i8mem, |
| 102944 | /* ROR8mCL_ND */ |
| 102945 | GR8, i8mem, |
| 102946 | /* ROR8mCL_NF */ |
| 102947 | i8mem, |
| 102948 | /* ROR8mCL_NF_ND */ |
| 102949 | GR8, i8mem, |
| 102950 | /* ROR8mi */ |
| 102951 | i8mem, u8imm, |
| 102952 | /* ROR8mi_EVEX */ |
| 102953 | i8mem, u8imm, |
| 102954 | /* ROR8mi_ND */ |
| 102955 | GR8, i8mem, u8imm, |
| 102956 | /* ROR8mi_NF */ |
| 102957 | i8mem, u8imm, |
| 102958 | /* ROR8mi_NF_ND */ |
| 102959 | GR8, i8mem, u8imm, |
| 102960 | /* ROR8r1 */ |
| 102961 | GR8, GR8, |
| 102962 | /* ROR8r1_EVEX */ |
| 102963 | GR8, GR8, |
| 102964 | /* ROR8r1_ND */ |
| 102965 | GR8, GR8, |
| 102966 | /* ROR8r1_NF */ |
| 102967 | GR8, GR8, |
| 102968 | /* ROR8r1_NF_ND */ |
| 102969 | GR8, GR8, |
| 102970 | /* ROR8rCL */ |
| 102971 | GR8, GR8, |
| 102972 | /* ROR8rCL_EVEX */ |
| 102973 | GR8, GR8, |
| 102974 | /* ROR8rCL_ND */ |
| 102975 | GR8, GR8, |
| 102976 | /* ROR8rCL_NF */ |
| 102977 | GR8, GR8, |
| 102978 | /* ROR8rCL_NF_ND */ |
| 102979 | GR8, GR8, |
| 102980 | /* ROR8ri */ |
| 102981 | GR8, GR8, u8imm, |
| 102982 | /* ROR8ri_EVEX */ |
| 102983 | GR8, GR8, u8imm, |
| 102984 | /* ROR8ri_ND */ |
| 102985 | GR8, GR8, u8imm, |
| 102986 | /* ROR8ri_NF */ |
| 102987 | GR8, GR8, u8imm, |
| 102988 | /* ROR8ri_NF_ND */ |
| 102989 | GR8, GR8, u8imm, |
| 102990 | /* RORX32mi */ |
| 102991 | GR32, i32mem, u8imm, |
| 102992 | /* RORX32mi_EVEX */ |
| 102993 | GR32, i32mem, u8imm, |
| 102994 | /* RORX32ri */ |
| 102995 | GR32, GR32, u8imm, |
| 102996 | /* RORX32ri_EVEX */ |
| 102997 | GR32, GR32, u8imm, |
| 102998 | /* RORX64mi */ |
| 102999 | GR64, i64mem, u8imm, |
| 103000 | /* RORX64mi_EVEX */ |
| 103001 | GR64, i64mem, u8imm, |
| 103002 | /* RORX64ri */ |
| 103003 | GR64, GR64, u8imm, |
| 103004 | /* RORX64ri_EVEX */ |
| 103005 | GR64, GR64, u8imm, |
| 103006 | /* ROUNDPDmi */ |
| 103007 | VR128, f128mem, i32u8imm, |
| 103008 | /* ROUNDPDri */ |
| 103009 | VR128, VR128, i32u8imm, |
| 103010 | /* ROUNDPSmi */ |
| 103011 | VR128, f128mem, i32u8imm, |
| 103012 | /* ROUNDPSri */ |
| 103013 | VR128, VR128, i32u8imm, |
| 103014 | /* ROUNDSDmi */ |
| 103015 | FR64, f64mem, i32u8imm, |
| 103016 | /* ROUNDSDmi_Int */ |
| 103017 | VR128, VR128, sdmem, i32u8imm, |
| 103018 | /* ROUNDSDri */ |
| 103019 | FR64, FR64, i32u8imm, |
| 103020 | /* ROUNDSDri_Int */ |
| 103021 | VR128, VR128, VR128, i32u8imm, |
| 103022 | /* ROUNDSSmi */ |
| 103023 | FR32, f32mem, i32u8imm, |
| 103024 | /* ROUNDSSmi_Int */ |
| 103025 | VR128, VR128, ssmem, i32u8imm, |
| 103026 | /* ROUNDSSri */ |
| 103027 | FR32, FR32, i32u8imm, |
| 103028 | /* ROUNDSSri_Int */ |
| 103029 | VR128, VR128, VR128, i32u8imm, |
| 103030 | /* RSM */ |
| 103031 | /* RSQRTPSm */ |
| 103032 | VR128, f128mem, |
| 103033 | /* RSQRTPSr */ |
| 103034 | VR128, VR128, |
| 103035 | /* RSQRTSSm */ |
| 103036 | FR32, f32mem, |
| 103037 | /* RSQRTSSm_Int */ |
| 103038 | VR128, VR128, ssmem, |
| 103039 | /* RSQRTSSr */ |
| 103040 | FR32, FR32, |
| 103041 | /* RSQRTSSr_Int */ |
| 103042 | VR128, VR128, VR128, |
| 103043 | /* RSTORSSP */ |
| 103044 | i32mem, |
| 103045 | /* SAHF */ |
| 103046 | /* SALC */ |
| 103047 | /* SAR16m1 */ |
| 103048 | i16mem, |
| 103049 | /* SAR16m1_EVEX */ |
| 103050 | i16mem, |
| 103051 | /* SAR16m1_ND */ |
| 103052 | GR16, i16mem, |
| 103053 | /* SAR16m1_NF */ |
| 103054 | i16mem, |
| 103055 | /* SAR16m1_NF_ND */ |
| 103056 | GR16, i16mem, |
| 103057 | /* SAR16mCL */ |
| 103058 | i16mem, |
| 103059 | /* SAR16mCL_EVEX */ |
| 103060 | i16mem, |
| 103061 | /* SAR16mCL_ND */ |
| 103062 | GR16, i16mem, |
| 103063 | /* SAR16mCL_NF */ |
| 103064 | i16mem, |
| 103065 | /* SAR16mCL_NF_ND */ |
| 103066 | GR16, i16mem, |
| 103067 | /* SAR16mi */ |
| 103068 | i16mem, u8imm, |
| 103069 | /* SAR16mi_EVEX */ |
| 103070 | i16mem, u8imm, |
| 103071 | /* SAR16mi_ND */ |
| 103072 | GR16, i16mem, u8imm, |
| 103073 | /* SAR16mi_NF */ |
| 103074 | i16mem, u8imm, |
| 103075 | /* SAR16mi_NF_ND */ |
| 103076 | GR16, i16mem, u8imm, |
| 103077 | /* SAR16r1 */ |
| 103078 | GR16, GR16, |
| 103079 | /* SAR16r1_EVEX */ |
| 103080 | GR16, GR16, |
| 103081 | /* SAR16r1_ND */ |
| 103082 | GR16, GR16, |
| 103083 | /* SAR16r1_NF */ |
| 103084 | GR16, GR16, |
| 103085 | /* SAR16r1_NF_ND */ |
| 103086 | GR16, GR16, |
| 103087 | /* SAR16rCL */ |
| 103088 | GR16, GR16, |
| 103089 | /* SAR16rCL_EVEX */ |
| 103090 | GR16, GR16, |
| 103091 | /* SAR16rCL_ND */ |
| 103092 | GR16, GR16, |
| 103093 | /* SAR16rCL_NF */ |
| 103094 | GR16, GR16, |
| 103095 | /* SAR16rCL_NF_ND */ |
| 103096 | GR16, GR16, |
| 103097 | /* SAR16ri */ |
| 103098 | GR16, GR16, u8imm, |
| 103099 | /* SAR16ri_EVEX */ |
| 103100 | GR16, GR16, u8imm, |
| 103101 | /* SAR16ri_ND */ |
| 103102 | GR16, GR16, u8imm, |
| 103103 | /* SAR16ri_NF */ |
| 103104 | GR16, GR16, u8imm, |
| 103105 | /* SAR16ri_NF_ND */ |
| 103106 | GR16, GR16, u8imm, |
| 103107 | /* SAR32m1 */ |
| 103108 | i32mem, |
| 103109 | /* SAR32m1_EVEX */ |
| 103110 | i32mem, |
| 103111 | /* SAR32m1_ND */ |
| 103112 | GR32, i32mem, |
| 103113 | /* SAR32m1_NF */ |
| 103114 | i32mem, |
| 103115 | /* SAR32m1_NF_ND */ |
| 103116 | GR32, i32mem, |
| 103117 | /* SAR32mCL */ |
| 103118 | i32mem, |
| 103119 | /* SAR32mCL_EVEX */ |
| 103120 | i32mem, |
| 103121 | /* SAR32mCL_ND */ |
| 103122 | GR32, i32mem, |
| 103123 | /* SAR32mCL_NF */ |
| 103124 | i32mem, |
| 103125 | /* SAR32mCL_NF_ND */ |
| 103126 | GR32, i32mem, |
| 103127 | /* SAR32mi */ |
| 103128 | i32mem, u8imm, |
| 103129 | /* SAR32mi_EVEX */ |
| 103130 | i32mem, u8imm, |
| 103131 | /* SAR32mi_ND */ |
| 103132 | GR32, i32mem, u8imm, |
| 103133 | /* SAR32mi_NF */ |
| 103134 | i32mem, u8imm, |
| 103135 | /* SAR32mi_NF_ND */ |
| 103136 | GR32, i32mem, u8imm, |
| 103137 | /* SAR32r1 */ |
| 103138 | GR32, GR32, |
| 103139 | /* SAR32r1_EVEX */ |
| 103140 | GR32, GR32, |
| 103141 | /* SAR32r1_ND */ |
| 103142 | GR32, GR32, |
| 103143 | /* SAR32r1_NF */ |
| 103144 | GR32, GR32, |
| 103145 | /* SAR32r1_NF_ND */ |
| 103146 | GR32, GR32, |
| 103147 | /* SAR32rCL */ |
| 103148 | GR32, GR32, |
| 103149 | /* SAR32rCL_EVEX */ |
| 103150 | GR32, GR32, |
| 103151 | /* SAR32rCL_ND */ |
| 103152 | GR32, GR32, |
| 103153 | /* SAR32rCL_NF */ |
| 103154 | GR32, GR32, |
| 103155 | /* SAR32rCL_NF_ND */ |
| 103156 | GR32, GR32, |
| 103157 | /* SAR32ri */ |
| 103158 | GR32, GR32, u8imm, |
| 103159 | /* SAR32ri_EVEX */ |
| 103160 | GR32, GR32, u8imm, |
| 103161 | /* SAR32ri_ND */ |
| 103162 | GR32, GR32, u8imm, |
| 103163 | /* SAR32ri_NF */ |
| 103164 | GR32, GR32, u8imm, |
| 103165 | /* SAR32ri_NF_ND */ |
| 103166 | GR32, GR32, u8imm, |
| 103167 | /* SAR64m1 */ |
| 103168 | i64mem, |
| 103169 | /* SAR64m1_EVEX */ |
| 103170 | i64mem, |
| 103171 | /* SAR64m1_ND */ |
| 103172 | GR64, i64mem, |
| 103173 | /* SAR64m1_NF */ |
| 103174 | i64mem, |
| 103175 | /* SAR64m1_NF_ND */ |
| 103176 | GR64, i64mem, |
| 103177 | /* SAR64mCL */ |
| 103178 | i64mem, |
| 103179 | /* SAR64mCL_EVEX */ |
| 103180 | i64mem, |
| 103181 | /* SAR64mCL_ND */ |
| 103182 | GR64, i64mem, |
| 103183 | /* SAR64mCL_NF */ |
| 103184 | i64mem, |
| 103185 | /* SAR64mCL_NF_ND */ |
| 103186 | GR64, i64mem, |
| 103187 | /* SAR64mi */ |
| 103188 | i64mem, u8imm, |
| 103189 | /* SAR64mi_EVEX */ |
| 103190 | i64mem, u8imm, |
| 103191 | /* SAR64mi_ND */ |
| 103192 | GR64, i64mem, u8imm, |
| 103193 | /* SAR64mi_NF */ |
| 103194 | i64mem, u8imm, |
| 103195 | /* SAR64mi_NF_ND */ |
| 103196 | GR64, i64mem, u8imm, |
| 103197 | /* SAR64r1 */ |
| 103198 | GR64, GR64, |
| 103199 | /* SAR64r1_EVEX */ |
| 103200 | GR64, GR64, |
| 103201 | /* SAR64r1_ND */ |
| 103202 | GR64, GR64, |
| 103203 | /* SAR64r1_NF */ |
| 103204 | GR64, GR64, |
| 103205 | /* SAR64r1_NF_ND */ |
| 103206 | GR64, GR64, |
| 103207 | /* SAR64rCL */ |
| 103208 | GR64, GR64, |
| 103209 | /* SAR64rCL_EVEX */ |
| 103210 | GR64, GR64, |
| 103211 | /* SAR64rCL_ND */ |
| 103212 | GR64, GR64, |
| 103213 | /* SAR64rCL_NF */ |
| 103214 | GR64, GR64, |
| 103215 | /* SAR64rCL_NF_ND */ |
| 103216 | GR64, GR64, |
| 103217 | /* SAR64ri */ |
| 103218 | GR64, GR64, u8imm, |
| 103219 | /* SAR64ri_EVEX */ |
| 103220 | GR64, GR64, u8imm, |
| 103221 | /* SAR64ri_ND */ |
| 103222 | GR64, GR64, u8imm, |
| 103223 | /* SAR64ri_NF */ |
| 103224 | GR64, GR64, u8imm, |
| 103225 | /* SAR64ri_NF_ND */ |
| 103226 | GR64, GR64, u8imm, |
| 103227 | /* SAR8m1 */ |
| 103228 | i8mem, |
| 103229 | /* SAR8m1_EVEX */ |
| 103230 | i8mem, |
| 103231 | /* SAR8m1_ND */ |
| 103232 | GR8, i8mem, |
| 103233 | /* SAR8m1_NF */ |
| 103234 | i8mem, |
| 103235 | /* SAR8m1_NF_ND */ |
| 103236 | GR8, i8mem, |
| 103237 | /* SAR8mCL */ |
| 103238 | i8mem, |
| 103239 | /* SAR8mCL_EVEX */ |
| 103240 | i8mem, |
| 103241 | /* SAR8mCL_ND */ |
| 103242 | GR8, i8mem, |
| 103243 | /* SAR8mCL_NF */ |
| 103244 | i8mem, |
| 103245 | /* SAR8mCL_NF_ND */ |
| 103246 | GR8, i8mem, |
| 103247 | /* SAR8mi */ |
| 103248 | i8mem, u8imm, |
| 103249 | /* SAR8mi_EVEX */ |
| 103250 | i8mem, u8imm, |
| 103251 | /* SAR8mi_ND */ |
| 103252 | GR8, i8mem, u8imm, |
| 103253 | /* SAR8mi_NF */ |
| 103254 | i8mem, u8imm, |
| 103255 | /* SAR8mi_NF_ND */ |
| 103256 | GR8, i8mem, u8imm, |
| 103257 | /* SAR8r1 */ |
| 103258 | GR8, GR8, |
| 103259 | /* SAR8r1_EVEX */ |
| 103260 | GR8, GR8, |
| 103261 | /* SAR8r1_ND */ |
| 103262 | GR8, GR8, |
| 103263 | /* SAR8r1_NF */ |
| 103264 | GR8, GR8, |
| 103265 | /* SAR8r1_NF_ND */ |
| 103266 | GR8, GR8, |
| 103267 | /* SAR8rCL */ |
| 103268 | GR8, GR8, |
| 103269 | /* SAR8rCL_EVEX */ |
| 103270 | GR8, GR8, |
| 103271 | /* SAR8rCL_ND */ |
| 103272 | GR8, GR8, |
| 103273 | /* SAR8rCL_NF */ |
| 103274 | GR8, GR8, |
| 103275 | /* SAR8rCL_NF_ND */ |
| 103276 | GR8, GR8, |
| 103277 | /* SAR8ri */ |
| 103278 | GR8, GR8, u8imm, |
| 103279 | /* SAR8ri_EVEX */ |
| 103280 | GR8, GR8, u8imm, |
| 103281 | /* SAR8ri_ND */ |
| 103282 | GR8, GR8, u8imm, |
| 103283 | /* SAR8ri_NF */ |
| 103284 | GR8, GR8, u8imm, |
| 103285 | /* SAR8ri_NF_ND */ |
| 103286 | GR8, GR8, u8imm, |
| 103287 | /* SARX32rm */ |
| 103288 | GR32, i32mem, GR32, |
| 103289 | /* SARX32rm_EVEX */ |
| 103290 | GR32, i32mem, GR32, |
| 103291 | /* SARX32rr */ |
| 103292 | GR32, GR32, GR32, |
| 103293 | /* SARX32rr_EVEX */ |
| 103294 | GR32, GR32, GR32, |
| 103295 | /* SARX64rm */ |
| 103296 | GR64, i64mem, GR64, |
| 103297 | /* SARX64rm_EVEX */ |
| 103298 | GR64, i64mem, GR64, |
| 103299 | /* SARX64rr */ |
| 103300 | GR64, GR64, GR64, |
| 103301 | /* SARX64rr_EVEX */ |
| 103302 | GR64, GR64, GR64, |
| 103303 | /* SAVEPREVSSP */ |
| 103304 | /* SBB16i16 */ |
| 103305 | i16imm, |
| 103306 | /* SBB16mi */ |
| 103307 | i16mem, i16imm, |
| 103308 | /* SBB16mi8 */ |
| 103309 | i16mem, i16i8imm, |
| 103310 | /* SBB16mi8_EVEX */ |
| 103311 | i16mem, i16i8imm, |
| 103312 | /* SBB16mi8_ND */ |
| 103313 | GR16, i16mem, i16i8imm, |
| 103314 | /* SBB16mi_EVEX */ |
| 103315 | i16mem, i16imm, |
| 103316 | /* SBB16mi_ND */ |
| 103317 | GR16, i16mem, i16imm, |
| 103318 | /* SBB16mr */ |
| 103319 | i16mem, GR16, |
| 103320 | /* SBB16mr_EVEX */ |
| 103321 | i16mem, GR16, |
| 103322 | /* SBB16mr_ND */ |
| 103323 | GR16, i16mem, GR16, |
| 103324 | /* SBB16ri */ |
| 103325 | GR16, GR16, i16imm, |
| 103326 | /* SBB16ri8 */ |
| 103327 | GR16, GR16, i16i8imm, |
| 103328 | /* SBB16ri8_EVEX */ |
| 103329 | GR16, GR16, i16i8imm, |
| 103330 | /* SBB16ri8_ND */ |
| 103331 | GR16, GR16, i16i8imm, |
| 103332 | /* SBB16ri_EVEX */ |
| 103333 | GR16, GR16, i16imm, |
| 103334 | /* SBB16ri_ND */ |
| 103335 | GR16, GR16, i16imm, |
| 103336 | /* SBB16rm */ |
| 103337 | GR16, GR16, i16mem, |
| 103338 | /* SBB16rm_EVEX */ |
| 103339 | GR16, GR16, i16mem, |
| 103340 | /* SBB16rm_ND */ |
| 103341 | GR16, GR16, i16mem, |
| 103342 | /* SBB16rr */ |
| 103343 | GR16, GR16, GR16, |
| 103344 | /* SBB16rr_EVEX */ |
| 103345 | GR16, GR16, GR16, |
| 103346 | /* SBB16rr_EVEX_REV */ |
| 103347 | GR16, GR16, GR16, |
| 103348 | /* SBB16rr_ND */ |
| 103349 | GR16, GR16, GR16, |
| 103350 | /* SBB16rr_ND_REV */ |
| 103351 | GR16, GR16, GR16, |
| 103352 | /* SBB16rr_REV */ |
| 103353 | GR16, GR16, GR16, |
| 103354 | /* SBB32i32 */ |
| 103355 | i32imm, |
| 103356 | /* SBB32mi */ |
| 103357 | i32mem, i32imm, |
| 103358 | /* SBB32mi8 */ |
| 103359 | i32mem, i32i8imm, |
| 103360 | /* SBB32mi8_EVEX */ |
| 103361 | i32mem, i32i8imm, |
| 103362 | /* SBB32mi8_ND */ |
| 103363 | GR32, i32mem, i32i8imm, |
| 103364 | /* SBB32mi_EVEX */ |
| 103365 | i32mem, i32imm, |
| 103366 | /* SBB32mi_ND */ |
| 103367 | GR32, i32mem, i32imm, |
| 103368 | /* SBB32mr */ |
| 103369 | i32mem, GR32, |
| 103370 | /* SBB32mr_EVEX */ |
| 103371 | i32mem, GR32, |
| 103372 | /* SBB32mr_ND */ |
| 103373 | GR32, i32mem, GR32, |
| 103374 | /* SBB32ri */ |
| 103375 | GR32, GR32, i32imm, |
| 103376 | /* SBB32ri8 */ |
| 103377 | GR32, GR32, i32i8imm, |
| 103378 | /* SBB32ri8_EVEX */ |
| 103379 | GR32, GR32, i32i8imm, |
| 103380 | /* SBB32ri8_ND */ |
| 103381 | GR32, GR32, i32i8imm, |
| 103382 | /* SBB32ri_EVEX */ |
| 103383 | GR32, GR32, i32imm, |
| 103384 | /* SBB32ri_ND */ |
| 103385 | GR32, GR32, i32imm, |
| 103386 | /* SBB32rm */ |
| 103387 | GR32, GR32, i32mem, |
| 103388 | /* SBB32rm_EVEX */ |
| 103389 | GR32, GR32, i32mem, |
| 103390 | /* SBB32rm_ND */ |
| 103391 | GR32, GR32, i32mem, |
| 103392 | /* SBB32rr */ |
| 103393 | GR32, GR32, GR32, |
| 103394 | /* SBB32rr_EVEX */ |
| 103395 | GR32, GR32, GR32, |
| 103396 | /* SBB32rr_EVEX_REV */ |
| 103397 | GR32, GR32, GR32, |
| 103398 | /* SBB32rr_ND */ |
| 103399 | GR32, GR32, GR32, |
| 103400 | /* SBB32rr_ND_REV */ |
| 103401 | GR32, GR32, GR32, |
| 103402 | /* SBB32rr_REV */ |
| 103403 | GR32, GR32, GR32, |
| 103404 | /* SBB64i32 */ |
| 103405 | i64i32imm, |
| 103406 | /* SBB64mi32 */ |
| 103407 | i64mem, i64i32imm, |
| 103408 | /* SBB64mi32_EVEX */ |
| 103409 | i64mem, i64i32imm, |
| 103410 | /* SBB64mi32_ND */ |
| 103411 | GR64, i64mem, i64i32imm, |
| 103412 | /* SBB64mi8 */ |
| 103413 | i64mem, i64i8imm, |
| 103414 | /* SBB64mi8_EVEX */ |
| 103415 | i64mem, i64i8imm, |
| 103416 | /* SBB64mi8_ND */ |
| 103417 | GR64, i64mem, i64i8imm, |
| 103418 | /* SBB64mr */ |
| 103419 | i64mem, GR64, |
| 103420 | /* SBB64mr_EVEX */ |
| 103421 | i64mem, GR64, |
| 103422 | /* SBB64mr_ND */ |
| 103423 | GR64, i64mem, GR64, |
| 103424 | /* SBB64ri32 */ |
| 103425 | GR64, GR64, i64i32imm, |
| 103426 | /* SBB64ri32_EVEX */ |
| 103427 | GR64, GR64, i64i32imm, |
| 103428 | /* SBB64ri32_ND */ |
| 103429 | GR64, GR64, i64i32imm, |
| 103430 | /* SBB64ri8 */ |
| 103431 | GR64, GR64, i64i8imm, |
| 103432 | /* SBB64ri8_EVEX */ |
| 103433 | GR64, GR64, i64i8imm, |
| 103434 | /* SBB64ri8_ND */ |
| 103435 | GR64, GR64, i64i8imm, |
| 103436 | /* SBB64rm */ |
| 103437 | GR64, GR64, i64mem, |
| 103438 | /* SBB64rm_EVEX */ |
| 103439 | GR64, GR64, i64mem, |
| 103440 | /* SBB64rm_ND */ |
| 103441 | GR64, GR64, i64mem, |
| 103442 | /* SBB64rr */ |
| 103443 | GR64, GR64, GR64, |
| 103444 | /* SBB64rr_EVEX */ |
| 103445 | GR64, GR64, GR64, |
| 103446 | /* SBB64rr_EVEX_REV */ |
| 103447 | GR64, GR64, GR64, |
| 103448 | /* SBB64rr_ND */ |
| 103449 | GR64, GR64, GR64, |
| 103450 | /* SBB64rr_ND_REV */ |
| 103451 | GR64, GR64, GR64, |
| 103452 | /* SBB64rr_REV */ |
| 103453 | GR64, GR64, GR64, |
| 103454 | /* SBB8i8 */ |
| 103455 | i8imm, |
| 103456 | /* SBB8mi */ |
| 103457 | i8mem, i8imm, |
| 103458 | /* SBB8mi8 */ |
| 103459 | i8mem, i8imm, |
| 103460 | /* SBB8mi_EVEX */ |
| 103461 | i8mem, i8imm, |
| 103462 | /* SBB8mi_ND */ |
| 103463 | GR8, i8mem, i8imm, |
| 103464 | /* SBB8mr */ |
| 103465 | i8mem, GR8, |
| 103466 | /* SBB8mr_EVEX */ |
| 103467 | i8mem, GR8, |
| 103468 | /* SBB8mr_ND */ |
| 103469 | GR8, i8mem, GR8, |
| 103470 | /* SBB8ri */ |
| 103471 | GR8, GR8, i8imm, |
| 103472 | /* SBB8ri8 */ |
| 103473 | GR8, GR8, i8imm, |
| 103474 | /* SBB8ri_EVEX */ |
| 103475 | GR8, GR8, i8imm, |
| 103476 | /* SBB8ri_ND */ |
| 103477 | GR8, GR8, i8imm, |
| 103478 | /* SBB8rm */ |
| 103479 | GR8, GR8, i8mem, |
| 103480 | /* SBB8rm_EVEX */ |
| 103481 | GR8, GR8, i8mem, |
| 103482 | /* SBB8rm_ND */ |
| 103483 | GR8, GR8, i8mem, |
| 103484 | /* SBB8rr */ |
| 103485 | GR8, GR8, GR8, |
| 103486 | /* SBB8rr_EVEX */ |
| 103487 | GR8, GR8, GR8, |
| 103488 | /* SBB8rr_EVEX_REV */ |
| 103489 | GR8, GR8, GR8, |
| 103490 | /* SBB8rr_ND */ |
| 103491 | GR8, GR8, GR8, |
| 103492 | /* SBB8rr_ND_REV */ |
| 103493 | GR8, GR8, GR8, |
| 103494 | /* SBB8rr_REV */ |
| 103495 | GR8, GR8, GR8, |
| 103496 | /* SCASB */ |
| 103497 | dstidx8, |
| 103498 | /* SCASL */ |
| 103499 | dstidx32, |
| 103500 | /* SCASQ */ |
| 103501 | dstidx64, |
| 103502 | /* SCASW */ |
| 103503 | dstidx16, |
| 103504 | /* SEAMCALL */ |
| 103505 | /* SEAMOPS */ |
| 103506 | /* SEAMRET */ |
| 103507 | /* SEG_ALLOCA_32 */ |
| 103508 | GR32, GR32, |
| 103509 | /* SEG_ALLOCA_64 */ |
| 103510 | GR64, GR64, |
| 103511 | /* SENDUIPI */ |
| 103512 | GR64, |
| 103513 | /* SERIALIZE */ |
| 103514 | /* SETCCm */ |
| 103515 | i8mem, ccode, |
| 103516 | /* SETCCm_EVEX */ |
| 103517 | i8mem, ccode, |
| 103518 | /* SETCCr */ |
| 103519 | GR8, ccode, |
| 103520 | /* SETCCr_EVEX */ |
| 103521 | GR8, ccode, |
| 103522 | /* SETSSBSY */ |
| 103523 | /* SETZUCCm */ |
| 103524 | i8mem, ccode, |
| 103525 | /* SETZUCCr */ |
| 103526 | GR8, ccode, |
| 103527 | /* SFENCE */ |
| 103528 | /* SGDT16m */ |
| 103529 | opaquemem, |
| 103530 | /* SGDT32m */ |
| 103531 | opaquemem, |
| 103532 | /* SGDT64m */ |
| 103533 | opaquemem, |
| 103534 | /* SHA1MSG1rm */ |
| 103535 | VR128, VR128, i128mem, |
| 103536 | /* SHA1MSG1rr */ |
| 103537 | VR128, VR128, VR128, |
| 103538 | /* SHA1MSG2rm */ |
| 103539 | VR128, VR128, i128mem, |
| 103540 | /* SHA1MSG2rr */ |
| 103541 | VR128, VR128, VR128, |
| 103542 | /* SHA1NEXTErm */ |
| 103543 | VR128, VR128, i128mem, |
| 103544 | /* SHA1NEXTErr */ |
| 103545 | VR128, VR128, VR128, |
| 103546 | /* SHA1RNDS4rmi */ |
| 103547 | VR128, VR128, i128mem, u8imm, |
| 103548 | /* SHA1RNDS4rri */ |
| 103549 | VR128, VR128, VR128, u8imm, |
| 103550 | /* SHA256MSG1rm */ |
| 103551 | VR128, VR128, i128mem, |
| 103552 | /* SHA256MSG1rr */ |
| 103553 | VR128, VR128, VR128, |
| 103554 | /* SHA256MSG2rm */ |
| 103555 | VR128, VR128, i128mem, |
| 103556 | /* SHA256MSG2rr */ |
| 103557 | VR128, VR128, VR128, |
| 103558 | /* SHA256RNDS2rm */ |
| 103559 | VR128, VR128, i128mem, |
| 103560 | /* SHA256RNDS2rr */ |
| 103561 | VR128, VR128, VR128, |
| 103562 | /* SHL16m1 */ |
| 103563 | i16mem, |
| 103564 | /* SHL16m1_EVEX */ |
| 103565 | i16mem, |
| 103566 | /* SHL16m1_ND */ |
| 103567 | GR16, i16mem, |
| 103568 | /* SHL16m1_NF */ |
| 103569 | i16mem, |
| 103570 | /* SHL16m1_NF_ND */ |
| 103571 | GR16, i16mem, |
| 103572 | /* SHL16mCL */ |
| 103573 | i16mem, |
| 103574 | /* SHL16mCL_EVEX */ |
| 103575 | i16mem, |
| 103576 | /* SHL16mCL_ND */ |
| 103577 | GR16, i16mem, |
| 103578 | /* SHL16mCL_NF */ |
| 103579 | i16mem, |
| 103580 | /* SHL16mCL_NF_ND */ |
| 103581 | GR16, i16mem, |
| 103582 | /* SHL16mi */ |
| 103583 | i16mem, u8imm, |
| 103584 | /* SHL16mi_EVEX */ |
| 103585 | i16mem, u8imm, |
| 103586 | /* SHL16mi_ND */ |
| 103587 | GR16, i16mem, u8imm, |
| 103588 | /* SHL16mi_NF */ |
| 103589 | i16mem, u8imm, |
| 103590 | /* SHL16mi_NF_ND */ |
| 103591 | GR16, i16mem, u8imm, |
| 103592 | /* SHL16r1 */ |
| 103593 | GR16, GR16, |
| 103594 | /* SHL16r1_EVEX */ |
| 103595 | GR16, GR16, |
| 103596 | /* SHL16r1_ND */ |
| 103597 | GR16, GR16, |
| 103598 | /* SHL16r1_NF */ |
| 103599 | GR16, GR16, |
| 103600 | /* SHL16r1_NF_ND */ |
| 103601 | GR16, GR16, |
| 103602 | /* SHL16rCL */ |
| 103603 | GR16, GR16, |
| 103604 | /* SHL16rCL_EVEX */ |
| 103605 | GR16, GR16, |
| 103606 | /* SHL16rCL_ND */ |
| 103607 | GR16, GR16, |
| 103608 | /* SHL16rCL_NF */ |
| 103609 | GR16, GR16, |
| 103610 | /* SHL16rCL_NF_ND */ |
| 103611 | GR16, GR16, |
| 103612 | /* SHL16ri */ |
| 103613 | GR16, GR16, u8imm, |
| 103614 | /* SHL16ri_EVEX */ |
| 103615 | GR16, GR16, u8imm, |
| 103616 | /* SHL16ri_ND */ |
| 103617 | GR16, GR16, u8imm, |
| 103618 | /* SHL16ri_NF */ |
| 103619 | GR16, GR16, u8imm, |
| 103620 | /* SHL16ri_NF_ND */ |
| 103621 | GR16, GR16, u8imm, |
| 103622 | /* SHL32m1 */ |
| 103623 | i32mem, |
| 103624 | /* SHL32m1_EVEX */ |
| 103625 | i32mem, |
| 103626 | /* SHL32m1_ND */ |
| 103627 | GR32, i32mem, |
| 103628 | /* SHL32m1_NF */ |
| 103629 | i32mem, |
| 103630 | /* SHL32m1_NF_ND */ |
| 103631 | GR32, i32mem, |
| 103632 | /* SHL32mCL */ |
| 103633 | i32mem, |
| 103634 | /* SHL32mCL_EVEX */ |
| 103635 | i32mem, |
| 103636 | /* SHL32mCL_ND */ |
| 103637 | GR32, i32mem, |
| 103638 | /* SHL32mCL_NF */ |
| 103639 | i32mem, |
| 103640 | /* SHL32mCL_NF_ND */ |
| 103641 | GR32, i32mem, |
| 103642 | /* SHL32mi */ |
| 103643 | i32mem, u8imm, |
| 103644 | /* SHL32mi_EVEX */ |
| 103645 | i32mem, u8imm, |
| 103646 | /* SHL32mi_ND */ |
| 103647 | GR32, i32mem, u8imm, |
| 103648 | /* SHL32mi_NF */ |
| 103649 | i32mem, u8imm, |
| 103650 | /* SHL32mi_NF_ND */ |
| 103651 | GR32, i32mem, u8imm, |
| 103652 | /* SHL32r1 */ |
| 103653 | GR32, GR32, |
| 103654 | /* SHL32r1_EVEX */ |
| 103655 | GR32, GR32, |
| 103656 | /* SHL32r1_ND */ |
| 103657 | GR32, GR32, |
| 103658 | /* SHL32r1_NF */ |
| 103659 | GR32, GR32, |
| 103660 | /* SHL32r1_NF_ND */ |
| 103661 | GR32, GR32, |
| 103662 | /* SHL32rCL */ |
| 103663 | GR32, GR32, |
| 103664 | /* SHL32rCL_EVEX */ |
| 103665 | GR32, GR32, |
| 103666 | /* SHL32rCL_ND */ |
| 103667 | GR32, GR32, |
| 103668 | /* SHL32rCL_NF */ |
| 103669 | GR32, GR32, |
| 103670 | /* SHL32rCL_NF_ND */ |
| 103671 | GR32, GR32, |
| 103672 | /* SHL32ri */ |
| 103673 | GR32, GR32, u8imm, |
| 103674 | /* SHL32ri_EVEX */ |
| 103675 | GR32, GR32, u8imm, |
| 103676 | /* SHL32ri_ND */ |
| 103677 | GR32, GR32, u8imm, |
| 103678 | /* SHL32ri_NF */ |
| 103679 | GR32, GR32, u8imm, |
| 103680 | /* SHL32ri_NF_ND */ |
| 103681 | GR32, GR32, u8imm, |
| 103682 | /* SHL64m1 */ |
| 103683 | i64mem, |
| 103684 | /* SHL64m1_EVEX */ |
| 103685 | i64mem, |
| 103686 | /* SHL64m1_ND */ |
| 103687 | GR64, i64mem, |
| 103688 | /* SHL64m1_NF */ |
| 103689 | i64mem, |
| 103690 | /* SHL64m1_NF_ND */ |
| 103691 | GR64, i64mem, |
| 103692 | /* SHL64mCL */ |
| 103693 | i64mem, |
| 103694 | /* SHL64mCL_EVEX */ |
| 103695 | i64mem, |
| 103696 | /* SHL64mCL_ND */ |
| 103697 | GR64, i64mem, |
| 103698 | /* SHL64mCL_NF */ |
| 103699 | i64mem, |
| 103700 | /* SHL64mCL_NF_ND */ |
| 103701 | GR64, i64mem, |
| 103702 | /* SHL64mi */ |
| 103703 | i64mem, u8imm, |
| 103704 | /* SHL64mi_EVEX */ |
| 103705 | i64mem, u8imm, |
| 103706 | /* SHL64mi_ND */ |
| 103707 | GR64, i64mem, u8imm, |
| 103708 | /* SHL64mi_NF */ |
| 103709 | i64mem, u8imm, |
| 103710 | /* SHL64mi_NF_ND */ |
| 103711 | GR64, i64mem, u8imm, |
| 103712 | /* SHL64r1 */ |
| 103713 | GR64, GR64, |
| 103714 | /* SHL64r1_EVEX */ |
| 103715 | GR64, GR64, |
| 103716 | /* SHL64r1_ND */ |
| 103717 | GR64, GR64, |
| 103718 | /* SHL64r1_NF */ |
| 103719 | GR64, GR64, |
| 103720 | /* SHL64r1_NF_ND */ |
| 103721 | GR64, GR64, |
| 103722 | /* SHL64rCL */ |
| 103723 | GR64, GR64, |
| 103724 | /* SHL64rCL_EVEX */ |
| 103725 | GR64, GR64, |
| 103726 | /* SHL64rCL_ND */ |
| 103727 | GR64, GR64, |
| 103728 | /* SHL64rCL_NF */ |
| 103729 | GR64, GR64, |
| 103730 | /* SHL64rCL_NF_ND */ |
| 103731 | GR64, GR64, |
| 103732 | /* SHL64ri */ |
| 103733 | GR64, GR64, u8imm, |
| 103734 | /* SHL64ri_EVEX */ |
| 103735 | GR64, GR64, u8imm, |
| 103736 | /* SHL64ri_ND */ |
| 103737 | GR64, GR64, u8imm, |
| 103738 | /* SHL64ri_NF */ |
| 103739 | GR64, GR64, u8imm, |
| 103740 | /* SHL64ri_NF_ND */ |
| 103741 | GR64, GR64, u8imm, |
| 103742 | /* SHL8m1 */ |
| 103743 | i8mem, |
| 103744 | /* SHL8m1_EVEX */ |
| 103745 | i8mem, |
| 103746 | /* SHL8m1_ND */ |
| 103747 | GR8, i8mem, |
| 103748 | /* SHL8m1_NF */ |
| 103749 | i8mem, |
| 103750 | /* SHL8m1_NF_ND */ |
| 103751 | GR8, i8mem, |
| 103752 | /* SHL8mCL */ |
| 103753 | i8mem, |
| 103754 | /* SHL8mCL_EVEX */ |
| 103755 | i8mem, |
| 103756 | /* SHL8mCL_ND */ |
| 103757 | GR8, i8mem, |
| 103758 | /* SHL8mCL_NF */ |
| 103759 | i8mem, |
| 103760 | /* SHL8mCL_NF_ND */ |
| 103761 | GR8, i8mem, |
| 103762 | /* SHL8mi */ |
| 103763 | i8mem, u8imm, |
| 103764 | /* SHL8mi_EVEX */ |
| 103765 | i8mem, u8imm, |
| 103766 | /* SHL8mi_ND */ |
| 103767 | GR8, i8mem, u8imm, |
| 103768 | /* SHL8mi_NF */ |
| 103769 | i8mem, u8imm, |
| 103770 | /* SHL8mi_NF_ND */ |
| 103771 | GR8, i8mem, u8imm, |
| 103772 | /* SHL8r1 */ |
| 103773 | GR8, GR8, |
| 103774 | /* SHL8r1_EVEX */ |
| 103775 | GR8, GR8, |
| 103776 | /* SHL8r1_ND */ |
| 103777 | GR8, GR8, |
| 103778 | /* SHL8r1_NF */ |
| 103779 | GR8, GR8, |
| 103780 | /* SHL8r1_NF_ND */ |
| 103781 | GR8, GR8, |
| 103782 | /* SHL8rCL */ |
| 103783 | GR8, GR8, |
| 103784 | /* SHL8rCL_EVEX */ |
| 103785 | GR8, GR8, |
| 103786 | /* SHL8rCL_ND */ |
| 103787 | GR8, GR8, |
| 103788 | /* SHL8rCL_NF */ |
| 103789 | GR8, GR8, |
| 103790 | /* SHL8rCL_NF_ND */ |
| 103791 | GR8, GR8, |
| 103792 | /* SHL8ri */ |
| 103793 | GR8, GR8, u8imm, |
| 103794 | /* SHL8ri_EVEX */ |
| 103795 | GR8, GR8, u8imm, |
| 103796 | /* SHL8ri_ND */ |
| 103797 | GR8, GR8, u8imm, |
| 103798 | /* SHL8ri_NF */ |
| 103799 | GR8, GR8, u8imm, |
| 103800 | /* SHL8ri_NF_ND */ |
| 103801 | GR8, GR8, u8imm, |
| 103802 | /* SHLD16mrCL */ |
| 103803 | i16mem, GR16, |
| 103804 | /* SHLD16mrCL_EVEX */ |
| 103805 | i16mem, GR16, |
| 103806 | /* SHLD16mrCL_ND */ |
| 103807 | GR16, i16mem, GR16, |
| 103808 | /* SHLD16mrCL_NF */ |
| 103809 | i16mem, GR16, |
| 103810 | /* SHLD16mrCL_NF_ND */ |
| 103811 | GR16, i16mem, GR16, |
| 103812 | /* SHLD16mri8 */ |
| 103813 | i16mem, GR16, u8imm, |
| 103814 | /* SHLD16mri8_EVEX */ |
| 103815 | i16mem, GR16, u8imm, |
| 103816 | /* SHLD16mri8_ND */ |
| 103817 | GR16, i16mem, GR16, u8imm, |
| 103818 | /* SHLD16mri8_NF */ |
| 103819 | i16mem, GR16, u8imm, |
| 103820 | /* SHLD16mri8_NF_ND */ |
| 103821 | GR16, i16mem, GR16, u8imm, |
| 103822 | /* SHLD16rrCL */ |
| 103823 | GR16, GR16, GR16, |
| 103824 | /* SHLD16rrCL_EVEX */ |
| 103825 | GR16, GR16, GR16, |
| 103826 | /* SHLD16rrCL_ND */ |
| 103827 | GR16, GR16, GR16, |
| 103828 | /* SHLD16rrCL_NF */ |
| 103829 | GR16, GR16, GR16, |
| 103830 | /* SHLD16rrCL_NF_ND */ |
| 103831 | GR16, GR16, GR16, |
| 103832 | /* SHLD16rri8 */ |
| 103833 | GR16, GR16, GR16, u8imm, |
| 103834 | /* SHLD16rri8_EVEX */ |
| 103835 | GR16, GR16, GR16, u8imm, |
| 103836 | /* SHLD16rri8_ND */ |
| 103837 | GR16, GR16, GR16, u8imm, |
| 103838 | /* SHLD16rri8_NF */ |
| 103839 | GR16, GR16, GR16, u8imm, |
| 103840 | /* SHLD16rri8_NF_ND */ |
| 103841 | GR16, GR16, GR16, u8imm, |
| 103842 | /* SHLD32mrCL */ |
| 103843 | i32mem, GR32, |
| 103844 | /* SHLD32mrCL_EVEX */ |
| 103845 | i32mem, GR32, |
| 103846 | /* SHLD32mrCL_ND */ |
| 103847 | GR32, i32mem, GR32, |
| 103848 | /* SHLD32mrCL_NF */ |
| 103849 | i32mem, GR32, |
| 103850 | /* SHLD32mrCL_NF_ND */ |
| 103851 | GR32, i32mem, GR32, |
| 103852 | /* SHLD32mri8 */ |
| 103853 | i32mem, GR32, u8imm, |
| 103854 | /* SHLD32mri8_EVEX */ |
| 103855 | i32mem, GR32, u8imm, |
| 103856 | /* SHLD32mri8_ND */ |
| 103857 | GR32, i32mem, GR32, u8imm, |
| 103858 | /* SHLD32mri8_NF */ |
| 103859 | i32mem, GR32, u8imm, |
| 103860 | /* SHLD32mri8_NF_ND */ |
| 103861 | GR32, i32mem, GR32, u8imm, |
| 103862 | /* SHLD32rrCL */ |
| 103863 | GR32, GR32, GR32, |
| 103864 | /* SHLD32rrCL_EVEX */ |
| 103865 | GR32, GR32, GR32, |
| 103866 | /* SHLD32rrCL_ND */ |
| 103867 | GR32, GR32, GR32, |
| 103868 | /* SHLD32rrCL_NF */ |
| 103869 | GR32, GR32, GR32, |
| 103870 | /* SHLD32rrCL_NF_ND */ |
| 103871 | GR32, GR32, GR32, |
| 103872 | /* SHLD32rri8 */ |
| 103873 | GR32, GR32, GR32, u8imm, |
| 103874 | /* SHLD32rri8_EVEX */ |
| 103875 | GR32, GR32, GR32, u8imm, |
| 103876 | /* SHLD32rri8_ND */ |
| 103877 | GR32, GR32, GR32, u8imm, |
| 103878 | /* SHLD32rri8_NF */ |
| 103879 | GR32, GR32, GR32, u8imm, |
| 103880 | /* SHLD32rri8_NF_ND */ |
| 103881 | GR32, GR32, GR32, u8imm, |
| 103882 | /* SHLD64mrCL */ |
| 103883 | i64mem, GR64, |
| 103884 | /* SHLD64mrCL_EVEX */ |
| 103885 | i64mem, GR64, |
| 103886 | /* SHLD64mrCL_ND */ |
| 103887 | GR64, i64mem, GR64, |
| 103888 | /* SHLD64mrCL_NF */ |
| 103889 | i64mem, GR64, |
| 103890 | /* SHLD64mrCL_NF_ND */ |
| 103891 | GR64, i64mem, GR64, |
| 103892 | /* SHLD64mri8 */ |
| 103893 | i64mem, GR64, u8imm, |
| 103894 | /* SHLD64mri8_EVEX */ |
| 103895 | i64mem, GR64, u8imm, |
| 103896 | /* SHLD64mri8_ND */ |
| 103897 | GR64, i64mem, GR64, u8imm, |
| 103898 | /* SHLD64mri8_NF */ |
| 103899 | i64mem, GR64, u8imm, |
| 103900 | /* SHLD64mri8_NF_ND */ |
| 103901 | GR64, i64mem, GR64, u8imm, |
| 103902 | /* SHLD64rrCL */ |
| 103903 | GR64, GR64, GR64, |
| 103904 | /* SHLD64rrCL_EVEX */ |
| 103905 | GR64, GR64, GR64, |
| 103906 | /* SHLD64rrCL_ND */ |
| 103907 | GR64, GR64, GR64, |
| 103908 | /* SHLD64rrCL_NF */ |
| 103909 | GR64, GR64, GR64, |
| 103910 | /* SHLD64rrCL_NF_ND */ |
| 103911 | GR64, GR64, GR64, |
| 103912 | /* SHLD64rri8 */ |
| 103913 | GR64, GR64, GR64, u8imm, |
| 103914 | /* SHLD64rri8_EVEX */ |
| 103915 | GR64, GR64, GR64, u8imm, |
| 103916 | /* SHLD64rri8_ND */ |
| 103917 | GR64, GR64, GR64, u8imm, |
| 103918 | /* SHLD64rri8_NF */ |
| 103919 | GR64, GR64, GR64, u8imm, |
| 103920 | /* SHLD64rri8_NF_ND */ |
| 103921 | GR64, GR64, GR64, u8imm, |
| 103922 | /* SHLX32rm */ |
| 103923 | GR32, i32mem, GR32, |
| 103924 | /* SHLX32rm_EVEX */ |
| 103925 | GR32, i32mem, GR32, |
| 103926 | /* SHLX32rr */ |
| 103927 | GR32, GR32, GR32, |
| 103928 | /* SHLX32rr_EVEX */ |
| 103929 | GR32, GR32, GR32, |
| 103930 | /* SHLX64rm */ |
| 103931 | GR64, i64mem, GR64, |
| 103932 | /* SHLX64rm_EVEX */ |
| 103933 | GR64, i64mem, GR64, |
| 103934 | /* SHLX64rr */ |
| 103935 | GR64, GR64, GR64, |
| 103936 | /* SHLX64rr_EVEX */ |
| 103937 | GR64, GR64, GR64, |
| 103938 | /* SHR16m1 */ |
| 103939 | i16mem, |
| 103940 | /* SHR16m1_EVEX */ |
| 103941 | i16mem, |
| 103942 | /* SHR16m1_ND */ |
| 103943 | GR16, i16mem, |
| 103944 | /* SHR16m1_NF */ |
| 103945 | i16mem, |
| 103946 | /* SHR16m1_NF_ND */ |
| 103947 | GR16, i16mem, |
| 103948 | /* SHR16mCL */ |
| 103949 | i16mem, |
| 103950 | /* SHR16mCL_EVEX */ |
| 103951 | i16mem, |
| 103952 | /* SHR16mCL_ND */ |
| 103953 | GR16, i16mem, |
| 103954 | /* SHR16mCL_NF */ |
| 103955 | i16mem, |
| 103956 | /* SHR16mCL_NF_ND */ |
| 103957 | GR16, i16mem, |
| 103958 | /* SHR16mi */ |
| 103959 | i16mem, u8imm, |
| 103960 | /* SHR16mi_EVEX */ |
| 103961 | i16mem, u8imm, |
| 103962 | /* SHR16mi_ND */ |
| 103963 | GR16, i16mem, u8imm, |
| 103964 | /* SHR16mi_NF */ |
| 103965 | i16mem, u8imm, |
| 103966 | /* SHR16mi_NF_ND */ |
| 103967 | GR16, i16mem, u8imm, |
| 103968 | /* SHR16r1 */ |
| 103969 | GR16, GR16, |
| 103970 | /* SHR16r1_EVEX */ |
| 103971 | GR16, GR16, |
| 103972 | /* SHR16r1_ND */ |
| 103973 | GR16, GR16, |
| 103974 | /* SHR16r1_NF */ |
| 103975 | GR16, GR16, |
| 103976 | /* SHR16r1_NF_ND */ |
| 103977 | GR16, GR16, |
| 103978 | /* SHR16rCL */ |
| 103979 | GR16, GR16, |
| 103980 | /* SHR16rCL_EVEX */ |
| 103981 | GR16, GR16, |
| 103982 | /* SHR16rCL_ND */ |
| 103983 | GR16, GR16, |
| 103984 | /* SHR16rCL_NF */ |
| 103985 | GR16, GR16, |
| 103986 | /* SHR16rCL_NF_ND */ |
| 103987 | GR16, GR16, |
| 103988 | /* SHR16ri */ |
| 103989 | GR16, GR16, u8imm, |
| 103990 | /* SHR16ri_EVEX */ |
| 103991 | GR16, GR16, u8imm, |
| 103992 | /* SHR16ri_ND */ |
| 103993 | GR16, GR16, u8imm, |
| 103994 | /* SHR16ri_NF */ |
| 103995 | GR16, GR16, u8imm, |
| 103996 | /* SHR16ri_NF_ND */ |
| 103997 | GR16, GR16, u8imm, |
| 103998 | /* SHR32m1 */ |
| 103999 | i32mem, |
| 104000 | /* SHR32m1_EVEX */ |
| 104001 | i32mem, |
| 104002 | /* SHR32m1_ND */ |
| 104003 | GR32, i32mem, |
| 104004 | /* SHR32m1_NF */ |
| 104005 | i32mem, |
| 104006 | /* SHR32m1_NF_ND */ |
| 104007 | GR32, i32mem, |
| 104008 | /* SHR32mCL */ |
| 104009 | i32mem, |
| 104010 | /* SHR32mCL_EVEX */ |
| 104011 | i32mem, |
| 104012 | /* SHR32mCL_ND */ |
| 104013 | GR32, i32mem, |
| 104014 | /* SHR32mCL_NF */ |
| 104015 | i32mem, |
| 104016 | /* SHR32mCL_NF_ND */ |
| 104017 | GR32, i32mem, |
| 104018 | /* SHR32mi */ |
| 104019 | i32mem, u8imm, |
| 104020 | /* SHR32mi_EVEX */ |
| 104021 | i32mem, u8imm, |
| 104022 | /* SHR32mi_ND */ |
| 104023 | GR32, i32mem, u8imm, |
| 104024 | /* SHR32mi_NF */ |
| 104025 | i32mem, u8imm, |
| 104026 | /* SHR32mi_NF_ND */ |
| 104027 | GR32, i32mem, u8imm, |
| 104028 | /* SHR32r1 */ |
| 104029 | GR32, GR32, |
| 104030 | /* SHR32r1_EVEX */ |
| 104031 | GR32, GR32, |
| 104032 | /* SHR32r1_ND */ |
| 104033 | GR32, GR32, |
| 104034 | /* SHR32r1_NF */ |
| 104035 | GR32, GR32, |
| 104036 | /* SHR32r1_NF_ND */ |
| 104037 | GR32, GR32, |
| 104038 | /* SHR32rCL */ |
| 104039 | GR32, GR32, |
| 104040 | /* SHR32rCL_EVEX */ |
| 104041 | GR32, GR32, |
| 104042 | /* SHR32rCL_ND */ |
| 104043 | GR32, GR32, |
| 104044 | /* SHR32rCL_NF */ |
| 104045 | GR32, GR32, |
| 104046 | /* SHR32rCL_NF_ND */ |
| 104047 | GR32, GR32, |
| 104048 | /* SHR32ri */ |
| 104049 | GR32, GR32, u8imm, |
| 104050 | /* SHR32ri_EVEX */ |
| 104051 | GR32, GR32, u8imm, |
| 104052 | /* SHR32ri_ND */ |
| 104053 | GR32, GR32, u8imm, |
| 104054 | /* SHR32ri_NF */ |
| 104055 | GR32, GR32, u8imm, |
| 104056 | /* SHR32ri_NF_ND */ |
| 104057 | GR32, GR32, u8imm, |
| 104058 | /* SHR64m1 */ |
| 104059 | i64mem, |
| 104060 | /* SHR64m1_EVEX */ |
| 104061 | i64mem, |
| 104062 | /* SHR64m1_ND */ |
| 104063 | GR64, i64mem, |
| 104064 | /* SHR64m1_NF */ |
| 104065 | i64mem, |
| 104066 | /* SHR64m1_NF_ND */ |
| 104067 | GR64, i64mem, |
| 104068 | /* SHR64mCL */ |
| 104069 | i64mem, |
| 104070 | /* SHR64mCL_EVEX */ |
| 104071 | i64mem, |
| 104072 | /* SHR64mCL_ND */ |
| 104073 | GR64, i64mem, |
| 104074 | /* SHR64mCL_NF */ |
| 104075 | i64mem, |
| 104076 | /* SHR64mCL_NF_ND */ |
| 104077 | GR64, i64mem, |
| 104078 | /* SHR64mi */ |
| 104079 | i64mem, u8imm, |
| 104080 | /* SHR64mi_EVEX */ |
| 104081 | i64mem, u8imm, |
| 104082 | /* SHR64mi_ND */ |
| 104083 | GR64, i64mem, u8imm, |
| 104084 | /* SHR64mi_NF */ |
| 104085 | i64mem, u8imm, |
| 104086 | /* SHR64mi_NF_ND */ |
| 104087 | GR64, i64mem, u8imm, |
| 104088 | /* SHR64r1 */ |
| 104089 | GR64, GR64, |
| 104090 | /* SHR64r1_EVEX */ |
| 104091 | GR64, GR64, |
| 104092 | /* SHR64r1_ND */ |
| 104093 | GR64, GR64, |
| 104094 | /* SHR64r1_NF */ |
| 104095 | GR64, GR64, |
| 104096 | /* SHR64r1_NF_ND */ |
| 104097 | GR64, GR64, |
| 104098 | /* SHR64rCL */ |
| 104099 | GR64, GR64, |
| 104100 | /* SHR64rCL_EVEX */ |
| 104101 | GR64, GR64, |
| 104102 | /* SHR64rCL_ND */ |
| 104103 | GR64, GR64, |
| 104104 | /* SHR64rCL_NF */ |
| 104105 | GR64, GR64, |
| 104106 | /* SHR64rCL_NF_ND */ |
| 104107 | GR64, GR64, |
| 104108 | /* SHR64ri */ |
| 104109 | GR64, GR64, u8imm, |
| 104110 | /* SHR64ri_EVEX */ |
| 104111 | GR64, GR64, u8imm, |
| 104112 | /* SHR64ri_ND */ |
| 104113 | GR64, GR64, u8imm, |
| 104114 | /* SHR64ri_NF */ |
| 104115 | GR64, GR64, u8imm, |
| 104116 | /* SHR64ri_NF_ND */ |
| 104117 | GR64, GR64, u8imm, |
| 104118 | /* SHR8m1 */ |
| 104119 | i8mem, |
| 104120 | /* SHR8m1_EVEX */ |
| 104121 | i8mem, |
| 104122 | /* SHR8m1_ND */ |
| 104123 | GR8, i8mem, |
| 104124 | /* SHR8m1_NF */ |
| 104125 | i8mem, |
| 104126 | /* SHR8m1_NF_ND */ |
| 104127 | GR8, i8mem, |
| 104128 | /* SHR8mCL */ |
| 104129 | i8mem, |
| 104130 | /* SHR8mCL_EVEX */ |
| 104131 | i8mem, |
| 104132 | /* SHR8mCL_ND */ |
| 104133 | GR8, i8mem, |
| 104134 | /* SHR8mCL_NF */ |
| 104135 | i8mem, |
| 104136 | /* SHR8mCL_NF_ND */ |
| 104137 | GR8, i8mem, |
| 104138 | /* SHR8mi */ |
| 104139 | i8mem, u8imm, |
| 104140 | /* SHR8mi_EVEX */ |
| 104141 | i8mem, u8imm, |
| 104142 | /* SHR8mi_ND */ |
| 104143 | GR8, i8mem, u8imm, |
| 104144 | /* SHR8mi_NF */ |
| 104145 | i8mem, u8imm, |
| 104146 | /* SHR8mi_NF_ND */ |
| 104147 | GR8, i8mem, u8imm, |
| 104148 | /* SHR8r1 */ |
| 104149 | GR8, GR8, |
| 104150 | /* SHR8r1_EVEX */ |
| 104151 | GR8, GR8, |
| 104152 | /* SHR8r1_ND */ |
| 104153 | GR8, GR8, |
| 104154 | /* SHR8r1_NF */ |
| 104155 | GR8, GR8, |
| 104156 | /* SHR8r1_NF_ND */ |
| 104157 | GR8, GR8, |
| 104158 | /* SHR8rCL */ |
| 104159 | GR8, GR8, |
| 104160 | /* SHR8rCL_EVEX */ |
| 104161 | GR8, GR8, |
| 104162 | /* SHR8rCL_ND */ |
| 104163 | GR8, GR8, |
| 104164 | /* SHR8rCL_NF */ |
| 104165 | GR8, GR8, |
| 104166 | /* SHR8rCL_NF_ND */ |
| 104167 | GR8, GR8, |
| 104168 | /* SHR8ri */ |
| 104169 | GR8, GR8, u8imm, |
| 104170 | /* SHR8ri_EVEX */ |
| 104171 | GR8, GR8, u8imm, |
| 104172 | /* SHR8ri_ND */ |
| 104173 | GR8, GR8, u8imm, |
| 104174 | /* SHR8ri_NF */ |
| 104175 | GR8, GR8, u8imm, |
| 104176 | /* SHR8ri_NF_ND */ |
| 104177 | GR8, GR8, u8imm, |
| 104178 | /* SHRD16mrCL */ |
| 104179 | i16mem, GR16, |
| 104180 | /* SHRD16mrCL_EVEX */ |
| 104181 | i16mem, GR16, |
| 104182 | /* SHRD16mrCL_ND */ |
| 104183 | GR16, i16mem, GR16, |
| 104184 | /* SHRD16mrCL_NF */ |
| 104185 | i16mem, GR16, |
| 104186 | /* SHRD16mrCL_NF_ND */ |
| 104187 | GR16, i16mem, GR16, |
| 104188 | /* SHRD16mri8 */ |
| 104189 | i16mem, GR16, u8imm, |
| 104190 | /* SHRD16mri8_EVEX */ |
| 104191 | i16mem, GR16, u8imm, |
| 104192 | /* SHRD16mri8_ND */ |
| 104193 | GR16, i16mem, GR16, u8imm, |
| 104194 | /* SHRD16mri8_NF */ |
| 104195 | i16mem, GR16, u8imm, |
| 104196 | /* SHRD16mri8_NF_ND */ |
| 104197 | GR16, i16mem, GR16, u8imm, |
| 104198 | /* SHRD16rrCL */ |
| 104199 | GR16, GR16, GR16, |
| 104200 | /* SHRD16rrCL_EVEX */ |
| 104201 | GR16, GR16, GR16, |
| 104202 | /* SHRD16rrCL_ND */ |
| 104203 | GR16, GR16, GR16, |
| 104204 | /* SHRD16rrCL_NF */ |
| 104205 | GR16, GR16, GR16, |
| 104206 | /* SHRD16rrCL_NF_ND */ |
| 104207 | GR16, GR16, GR16, |
| 104208 | /* SHRD16rri8 */ |
| 104209 | GR16, GR16, GR16, u8imm, |
| 104210 | /* SHRD16rri8_EVEX */ |
| 104211 | GR16, GR16, GR16, u8imm, |
| 104212 | /* SHRD16rri8_ND */ |
| 104213 | GR16, GR16, GR16, u8imm, |
| 104214 | /* SHRD16rri8_NF */ |
| 104215 | GR16, GR16, GR16, u8imm, |
| 104216 | /* SHRD16rri8_NF_ND */ |
| 104217 | GR16, GR16, GR16, u8imm, |
| 104218 | /* SHRD32mrCL */ |
| 104219 | i32mem, GR32, |
| 104220 | /* SHRD32mrCL_EVEX */ |
| 104221 | i32mem, GR32, |
| 104222 | /* SHRD32mrCL_ND */ |
| 104223 | GR32, i32mem, GR32, |
| 104224 | /* SHRD32mrCL_NF */ |
| 104225 | i32mem, GR32, |
| 104226 | /* SHRD32mrCL_NF_ND */ |
| 104227 | GR32, i32mem, GR32, |
| 104228 | /* SHRD32mri8 */ |
| 104229 | i32mem, GR32, u8imm, |
| 104230 | /* SHRD32mri8_EVEX */ |
| 104231 | i32mem, GR32, u8imm, |
| 104232 | /* SHRD32mri8_ND */ |
| 104233 | GR32, i32mem, GR32, u8imm, |
| 104234 | /* SHRD32mri8_NF */ |
| 104235 | i32mem, GR32, u8imm, |
| 104236 | /* SHRD32mri8_NF_ND */ |
| 104237 | GR32, i32mem, GR32, u8imm, |
| 104238 | /* SHRD32rrCL */ |
| 104239 | GR32, GR32, GR32, |
| 104240 | /* SHRD32rrCL_EVEX */ |
| 104241 | GR32, GR32, GR32, |
| 104242 | /* SHRD32rrCL_ND */ |
| 104243 | GR32, GR32, GR32, |
| 104244 | /* SHRD32rrCL_NF */ |
| 104245 | GR32, GR32, GR32, |
| 104246 | /* SHRD32rrCL_NF_ND */ |
| 104247 | GR32, GR32, GR32, |
| 104248 | /* SHRD32rri8 */ |
| 104249 | GR32, GR32, GR32, u8imm, |
| 104250 | /* SHRD32rri8_EVEX */ |
| 104251 | GR32, GR32, GR32, u8imm, |
| 104252 | /* SHRD32rri8_ND */ |
| 104253 | GR32, GR32, GR32, u8imm, |
| 104254 | /* SHRD32rri8_NF */ |
| 104255 | GR32, GR32, GR32, u8imm, |
| 104256 | /* SHRD32rri8_NF_ND */ |
| 104257 | GR32, GR32, GR32, u8imm, |
| 104258 | /* SHRD64mrCL */ |
| 104259 | i64mem, GR64, |
| 104260 | /* SHRD64mrCL_EVEX */ |
| 104261 | i64mem, GR64, |
| 104262 | /* SHRD64mrCL_ND */ |
| 104263 | GR64, i64mem, GR64, |
| 104264 | /* SHRD64mrCL_NF */ |
| 104265 | i64mem, GR64, |
| 104266 | /* SHRD64mrCL_NF_ND */ |
| 104267 | GR64, i64mem, GR64, |
| 104268 | /* SHRD64mri8 */ |
| 104269 | i64mem, GR64, u8imm, |
| 104270 | /* SHRD64mri8_EVEX */ |
| 104271 | i64mem, GR64, u8imm, |
| 104272 | /* SHRD64mri8_ND */ |
| 104273 | GR64, i64mem, GR64, u8imm, |
| 104274 | /* SHRD64mri8_NF */ |
| 104275 | i64mem, GR64, u8imm, |
| 104276 | /* SHRD64mri8_NF_ND */ |
| 104277 | GR64, i64mem, GR64, u8imm, |
| 104278 | /* SHRD64rrCL */ |
| 104279 | GR64, GR64, GR64, |
| 104280 | /* SHRD64rrCL_EVEX */ |
| 104281 | GR64, GR64, GR64, |
| 104282 | /* SHRD64rrCL_ND */ |
| 104283 | GR64, GR64, GR64, |
| 104284 | /* SHRD64rrCL_NF */ |
| 104285 | GR64, GR64, GR64, |
| 104286 | /* SHRD64rrCL_NF_ND */ |
| 104287 | GR64, GR64, GR64, |
| 104288 | /* SHRD64rri8 */ |
| 104289 | GR64, GR64, GR64, u8imm, |
| 104290 | /* SHRD64rri8_EVEX */ |
| 104291 | GR64, GR64, GR64, u8imm, |
| 104292 | /* SHRD64rri8_ND */ |
| 104293 | GR64, GR64, GR64, u8imm, |
| 104294 | /* SHRD64rri8_NF */ |
| 104295 | GR64, GR64, GR64, u8imm, |
| 104296 | /* SHRD64rri8_NF_ND */ |
| 104297 | GR64, GR64, GR64, u8imm, |
| 104298 | /* SHRX32rm */ |
| 104299 | GR32, i32mem, GR32, |
| 104300 | /* SHRX32rm_EVEX */ |
| 104301 | GR32, i32mem, GR32, |
| 104302 | /* SHRX32rr */ |
| 104303 | GR32, GR32, GR32, |
| 104304 | /* SHRX32rr_EVEX */ |
| 104305 | GR32, GR32, GR32, |
| 104306 | /* SHRX64rm */ |
| 104307 | GR64, i64mem, GR64, |
| 104308 | /* SHRX64rm_EVEX */ |
| 104309 | GR64, i64mem, GR64, |
| 104310 | /* SHRX64rr */ |
| 104311 | GR64, GR64, GR64, |
| 104312 | /* SHRX64rr_EVEX */ |
| 104313 | GR64, GR64, GR64, |
| 104314 | /* SHUFPDrmi */ |
| 104315 | VR128, VR128, f128mem, u8imm, |
| 104316 | /* SHUFPDrri */ |
| 104317 | VR128, VR128, VR128, u8imm, |
| 104318 | /* SHUFPSrmi */ |
| 104319 | VR128, VR128, f128mem, u8imm, |
| 104320 | /* SHUFPSrri */ |
| 104321 | VR128, VR128, VR128, u8imm, |
| 104322 | /* SIDT16m */ |
| 104323 | opaquemem, |
| 104324 | /* SIDT32m */ |
| 104325 | opaquemem, |
| 104326 | /* SIDT64m */ |
| 104327 | opaquemem, |
| 104328 | /* SKINIT */ |
| 104329 | /* SLDT16m */ |
| 104330 | i16mem, |
| 104331 | /* SLDT16r */ |
| 104332 | GR16, |
| 104333 | /* SLDT32r */ |
| 104334 | GR32, |
| 104335 | /* SLDT64r */ |
| 104336 | GR64, |
| 104337 | /* SLWPCB */ |
| 104338 | GR32, |
| 104339 | /* SLWPCB64 */ |
| 104340 | GR64, |
| 104341 | /* SMSW16m */ |
| 104342 | i16mem, |
| 104343 | /* SMSW16r */ |
| 104344 | GR16, |
| 104345 | /* SMSW32r */ |
| 104346 | GR32, |
| 104347 | /* SMSW64r */ |
| 104348 | GR64, |
| 104349 | /* SQRTPDm */ |
| 104350 | VR128, f128mem, |
| 104351 | /* SQRTPDr */ |
| 104352 | VR128, VR128, |
| 104353 | /* SQRTPSm */ |
| 104354 | VR128, f128mem, |
| 104355 | /* SQRTPSr */ |
| 104356 | VR128, VR128, |
| 104357 | /* SQRTSDm */ |
| 104358 | FR64, f64mem, |
| 104359 | /* SQRTSDm_Int */ |
| 104360 | VR128, VR128, sdmem, |
| 104361 | /* SQRTSDr */ |
| 104362 | FR64, FR64, |
| 104363 | /* SQRTSDr_Int */ |
| 104364 | VR128, VR128, VR128, |
| 104365 | /* SQRTSSm */ |
| 104366 | FR32, f32mem, |
| 104367 | /* SQRTSSm_Int */ |
| 104368 | VR128, VR128, ssmem, |
| 104369 | /* SQRTSSr */ |
| 104370 | FR32, FR32, |
| 104371 | /* SQRTSSr_Int */ |
| 104372 | VR128, VR128, VR128, |
| 104373 | /* SQRT_F */ |
| 104374 | /* SQRT_Fp32 */ |
| 104375 | RFP32, RFP32, |
| 104376 | /* SQRT_Fp64 */ |
| 104377 | RFP64, RFP64, |
| 104378 | /* SQRT_Fp80 */ |
| 104379 | RFP80, RFP80, |
| 104380 | /* SS_PREFIX */ |
| 104381 | /* STAC */ |
| 104382 | /* STACKALLOC_W_PROBING */ |
| 104383 | i64imm, |
| 104384 | /* STC */ |
| 104385 | /* STD */ |
| 104386 | /* STGI */ |
| 104387 | /* STI */ |
| 104388 | /* STMXCSR */ |
| 104389 | i32mem, |
| 104390 | /* STOSB */ |
| 104391 | dstidx8, |
| 104392 | /* STOSL */ |
| 104393 | dstidx32, |
| 104394 | /* STOSQ */ |
| 104395 | dstidx64, |
| 104396 | /* STOSW */ |
| 104397 | dstidx16, |
| 104398 | /* STR16r */ |
| 104399 | GR16, |
| 104400 | /* STR32r */ |
| 104401 | GR32, |
| 104402 | /* STR64r */ |
| 104403 | GR64, |
| 104404 | /* STRm */ |
| 104405 | i16mem, |
| 104406 | /* STTILECFG */ |
| 104407 | opaquemem, |
| 104408 | /* STTILECFG_EVEX */ |
| 104409 | opaquemem, |
| 104410 | /* STUI */ |
| 104411 | /* ST_F32m */ |
| 104412 | f32mem, |
| 104413 | /* ST_F64m */ |
| 104414 | f64mem, |
| 104415 | /* ST_FP32m */ |
| 104416 | f32mem, |
| 104417 | /* ST_FP64m */ |
| 104418 | f64mem, |
| 104419 | /* ST_FP80m */ |
| 104420 | f80mem, |
| 104421 | /* ST_FPrr */ |
| 104422 | RSTi, |
| 104423 | /* ST_Fp32m */ |
| 104424 | f32mem, RFP32, |
| 104425 | /* ST_Fp64m */ |
| 104426 | f64mem, RFP64, |
| 104427 | /* ST_Fp64m32 */ |
| 104428 | f32mem, RFP64, |
| 104429 | /* ST_Fp80m32 */ |
| 104430 | f32mem, RFP80, |
| 104431 | /* ST_Fp80m64 */ |
| 104432 | f64mem, RFP80, |
| 104433 | /* ST_FpP32m */ |
| 104434 | f32mem, RFP32, |
| 104435 | /* ST_FpP64m */ |
| 104436 | f64mem, RFP64, |
| 104437 | /* ST_FpP64m32 */ |
| 104438 | f32mem, RFP64, |
| 104439 | /* ST_FpP80m */ |
| 104440 | f80mem, RFP80, |
| 104441 | /* ST_FpP80m32 */ |
| 104442 | f32mem, RFP80, |
| 104443 | /* ST_FpP80m64 */ |
| 104444 | f64mem, RFP80, |
| 104445 | /* ST_Frr */ |
| 104446 | RSTi, |
| 104447 | /* SUB16i16 */ |
| 104448 | i16imm, |
| 104449 | /* SUB16mi */ |
| 104450 | i16mem, i16imm, |
| 104451 | /* SUB16mi8 */ |
| 104452 | i16mem, i16i8imm, |
| 104453 | /* SUB16mi8_EVEX */ |
| 104454 | i16mem, i16i8imm, |
| 104455 | /* SUB16mi8_ND */ |
| 104456 | GR16, i16mem, i16i8imm, |
| 104457 | /* SUB16mi8_NF */ |
| 104458 | i16mem, i16i8imm, |
| 104459 | /* SUB16mi8_NF_ND */ |
| 104460 | GR16, i16mem, i16i8imm, |
| 104461 | /* SUB16mi_EVEX */ |
| 104462 | i16mem, i16imm, |
| 104463 | /* SUB16mi_ND */ |
| 104464 | GR16, i16mem, i16imm, |
| 104465 | /* SUB16mi_NF */ |
| 104466 | i16mem, i16imm, |
| 104467 | /* SUB16mi_NF_ND */ |
| 104468 | GR16, i16mem, i16imm, |
| 104469 | /* SUB16mr */ |
| 104470 | i16mem, GR16, |
| 104471 | /* SUB16mr_EVEX */ |
| 104472 | i16mem, GR16, |
| 104473 | /* SUB16mr_ND */ |
| 104474 | GR16, i16mem, GR16, |
| 104475 | /* SUB16mr_NF */ |
| 104476 | i16mem, GR16, |
| 104477 | /* SUB16mr_NF_ND */ |
| 104478 | GR16, i16mem, GR16, |
| 104479 | /* SUB16ri */ |
| 104480 | GR16, GR16, i16imm, |
| 104481 | /* SUB16ri8 */ |
| 104482 | GR16, GR16, i16i8imm, |
| 104483 | /* SUB16ri8_EVEX */ |
| 104484 | GR16, GR16, i16i8imm, |
| 104485 | /* SUB16ri8_ND */ |
| 104486 | GR16, GR16, i16i8imm, |
| 104487 | /* SUB16ri8_NF */ |
| 104488 | GR16, GR16, i16i8imm, |
| 104489 | /* SUB16ri8_NF_ND */ |
| 104490 | GR16, GR16, i16i8imm, |
| 104491 | /* SUB16ri_EVEX */ |
| 104492 | GR16, GR16, i16imm, |
| 104493 | /* SUB16ri_ND */ |
| 104494 | GR16, GR16, i16imm, |
| 104495 | /* SUB16ri_NF */ |
| 104496 | GR16, GR16, i16imm, |
| 104497 | /* SUB16ri_NF_ND */ |
| 104498 | GR16, GR16, i16imm, |
| 104499 | /* SUB16rm */ |
| 104500 | GR16, GR16, i16mem, |
| 104501 | /* SUB16rm_EVEX */ |
| 104502 | GR16, GR16, i16mem, |
| 104503 | /* SUB16rm_ND */ |
| 104504 | GR16, GR16, i16mem, |
| 104505 | /* SUB16rm_NF */ |
| 104506 | GR16, GR16, i16mem, |
| 104507 | /* SUB16rm_NF_ND */ |
| 104508 | GR16, GR16, i16mem, |
| 104509 | /* SUB16rr */ |
| 104510 | GR16, GR16, GR16, |
| 104511 | /* SUB16rr_EVEX */ |
| 104512 | GR16, GR16, GR16, |
| 104513 | /* SUB16rr_EVEX_REV */ |
| 104514 | GR16, GR16, GR16, |
| 104515 | /* SUB16rr_ND */ |
| 104516 | GR16, GR16, GR16, |
| 104517 | /* SUB16rr_ND_REV */ |
| 104518 | GR16, GR16, GR16, |
| 104519 | /* SUB16rr_NF */ |
| 104520 | GR16, GR16, GR16, |
| 104521 | /* SUB16rr_NF_ND */ |
| 104522 | GR16, GR16, GR16, |
| 104523 | /* SUB16rr_NF_ND_REV */ |
| 104524 | GR16, GR16, GR16, |
| 104525 | /* SUB16rr_NF_REV */ |
| 104526 | GR16, GR16, GR16, |
| 104527 | /* SUB16rr_REV */ |
| 104528 | GR16, GR16, GR16, |
| 104529 | /* SUB32i32 */ |
| 104530 | i32imm, |
| 104531 | /* SUB32mi */ |
| 104532 | i32mem, i32imm, |
| 104533 | /* SUB32mi8 */ |
| 104534 | i32mem, i32i8imm, |
| 104535 | /* SUB32mi8_EVEX */ |
| 104536 | i32mem, i32i8imm, |
| 104537 | /* SUB32mi8_ND */ |
| 104538 | GR32, i32mem, i32i8imm, |
| 104539 | /* SUB32mi8_NF */ |
| 104540 | i32mem, i32i8imm, |
| 104541 | /* SUB32mi8_NF_ND */ |
| 104542 | GR32, i32mem, i32i8imm, |
| 104543 | /* SUB32mi_EVEX */ |
| 104544 | i32mem, i32imm, |
| 104545 | /* SUB32mi_ND */ |
| 104546 | GR32, i32mem, i32imm, |
| 104547 | /* SUB32mi_NF */ |
| 104548 | i32mem, i32imm, |
| 104549 | /* SUB32mi_NF_ND */ |
| 104550 | GR32, i32mem, i32imm, |
| 104551 | /* SUB32mr */ |
| 104552 | i32mem, GR32, |
| 104553 | /* SUB32mr_EVEX */ |
| 104554 | i32mem, GR32, |
| 104555 | /* SUB32mr_ND */ |
| 104556 | GR32, i32mem, GR32, |
| 104557 | /* SUB32mr_NF */ |
| 104558 | i32mem, GR32, |
| 104559 | /* SUB32mr_NF_ND */ |
| 104560 | GR32, i32mem, GR32, |
| 104561 | /* SUB32ri */ |
| 104562 | GR32, GR32, i32imm, |
| 104563 | /* SUB32ri8 */ |
| 104564 | GR32, GR32, i32i8imm, |
| 104565 | /* SUB32ri8_EVEX */ |
| 104566 | GR32, GR32, i32i8imm, |
| 104567 | /* SUB32ri8_ND */ |
| 104568 | GR32, GR32, i32i8imm, |
| 104569 | /* SUB32ri8_NF */ |
| 104570 | GR32, GR32, i32i8imm, |
| 104571 | /* SUB32ri8_NF_ND */ |
| 104572 | GR32, GR32, i32i8imm, |
| 104573 | /* SUB32ri_EVEX */ |
| 104574 | GR32, GR32, i32imm, |
| 104575 | /* SUB32ri_ND */ |
| 104576 | GR32, GR32, i32imm, |
| 104577 | /* SUB32ri_NF */ |
| 104578 | GR32, GR32, i32imm, |
| 104579 | /* SUB32ri_NF_ND */ |
| 104580 | GR32, GR32, i32imm, |
| 104581 | /* SUB32rm */ |
| 104582 | GR32, GR32, i32mem, |
| 104583 | /* SUB32rm_EVEX */ |
| 104584 | GR32, GR32, i32mem, |
| 104585 | /* SUB32rm_ND */ |
| 104586 | GR32, GR32, i32mem, |
| 104587 | /* SUB32rm_NF */ |
| 104588 | GR32, GR32, i32mem, |
| 104589 | /* SUB32rm_NF_ND */ |
| 104590 | GR32, GR32, i32mem, |
| 104591 | /* SUB32rr */ |
| 104592 | GR32, GR32, GR32, |
| 104593 | /* SUB32rr_EVEX */ |
| 104594 | GR32, GR32, GR32, |
| 104595 | /* SUB32rr_EVEX_REV */ |
| 104596 | GR32, GR32, GR32, |
| 104597 | /* SUB32rr_ND */ |
| 104598 | GR32, GR32, GR32, |
| 104599 | /* SUB32rr_ND_REV */ |
| 104600 | GR32, GR32, GR32, |
| 104601 | /* SUB32rr_NF */ |
| 104602 | GR32, GR32, GR32, |
| 104603 | /* SUB32rr_NF_ND */ |
| 104604 | GR32, GR32, GR32, |
| 104605 | /* SUB32rr_NF_ND_REV */ |
| 104606 | GR32, GR32, GR32, |
| 104607 | /* SUB32rr_NF_REV */ |
| 104608 | GR32, GR32, GR32, |
| 104609 | /* SUB32rr_REV */ |
| 104610 | GR32, GR32, GR32, |
| 104611 | /* SUB64i32 */ |
| 104612 | i64i32imm, |
| 104613 | /* SUB64mi32 */ |
| 104614 | i64mem, i64i32imm, |
| 104615 | /* SUB64mi32_EVEX */ |
| 104616 | i64mem, i64i32imm, |
| 104617 | /* SUB64mi32_ND */ |
| 104618 | GR64, i64mem, i64i32imm, |
| 104619 | /* SUB64mi32_NF */ |
| 104620 | i64mem, i64i32imm, |
| 104621 | /* SUB64mi32_NF_ND */ |
| 104622 | GR64, i64mem, i64i32imm, |
| 104623 | /* SUB64mi8 */ |
| 104624 | i64mem, i64i8imm, |
| 104625 | /* SUB64mi8_EVEX */ |
| 104626 | i64mem, i64i8imm, |
| 104627 | /* SUB64mi8_ND */ |
| 104628 | GR64, i64mem, i64i8imm, |
| 104629 | /* SUB64mi8_NF */ |
| 104630 | i64mem, i64i8imm, |
| 104631 | /* SUB64mi8_NF_ND */ |
| 104632 | GR64, i64mem, i64i8imm, |
| 104633 | /* SUB64mr */ |
| 104634 | i64mem, GR64, |
| 104635 | /* SUB64mr_EVEX */ |
| 104636 | i64mem, GR64, |
| 104637 | /* SUB64mr_ND */ |
| 104638 | GR64, i64mem, GR64, |
| 104639 | /* SUB64mr_NF */ |
| 104640 | i64mem, GR64, |
| 104641 | /* SUB64mr_NF_ND */ |
| 104642 | GR64, i64mem, GR64, |
| 104643 | /* SUB64ri32 */ |
| 104644 | GR64, GR64, i64i32imm, |
| 104645 | /* SUB64ri32_EVEX */ |
| 104646 | GR64, GR64, i64i32imm, |
| 104647 | /* SUB64ri32_ND */ |
| 104648 | GR64, GR64, i64i32imm, |
| 104649 | /* SUB64ri32_NF */ |
| 104650 | GR64, GR64, i64i32imm, |
| 104651 | /* SUB64ri32_NF_ND */ |
| 104652 | GR64, GR64, i64i32imm, |
| 104653 | /* SUB64ri8 */ |
| 104654 | GR64, GR64, i64i8imm, |
| 104655 | /* SUB64ri8_EVEX */ |
| 104656 | GR64, GR64, i64i8imm, |
| 104657 | /* SUB64ri8_ND */ |
| 104658 | GR64, GR64, i64i8imm, |
| 104659 | /* SUB64ri8_NF */ |
| 104660 | GR64, GR64, i64i8imm, |
| 104661 | /* SUB64ri8_NF_ND */ |
| 104662 | GR64, GR64, i64i8imm, |
| 104663 | /* SUB64rm */ |
| 104664 | GR64, GR64, i64mem, |
| 104665 | /* SUB64rm_EVEX */ |
| 104666 | GR64, GR64, i64mem, |
| 104667 | /* SUB64rm_ND */ |
| 104668 | GR64, GR64, i64mem, |
| 104669 | /* SUB64rm_NF */ |
| 104670 | GR64, GR64, i64mem, |
| 104671 | /* SUB64rm_NF_ND */ |
| 104672 | GR64, GR64, i64mem, |
| 104673 | /* SUB64rr */ |
| 104674 | GR64, GR64, GR64, |
| 104675 | /* SUB64rr_EVEX */ |
| 104676 | GR64, GR64, GR64, |
| 104677 | /* SUB64rr_EVEX_REV */ |
| 104678 | GR64, GR64, GR64, |
| 104679 | /* SUB64rr_ND */ |
| 104680 | GR64, GR64, GR64, |
| 104681 | /* SUB64rr_ND_REV */ |
| 104682 | GR64, GR64, GR64, |
| 104683 | /* SUB64rr_NF */ |
| 104684 | GR64, GR64, GR64, |
| 104685 | /* SUB64rr_NF_ND */ |
| 104686 | GR64, GR64, GR64, |
| 104687 | /* SUB64rr_NF_ND_REV */ |
| 104688 | GR64, GR64, GR64, |
| 104689 | /* SUB64rr_NF_REV */ |
| 104690 | GR64, GR64, GR64, |
| 104691 | /* SUB64rr_REV */ |
| 104692 | GR64, GR64, GR64, |
| 104693 | /* SUB8i8 */ |
| 104694 | i8imm, |
| 104695 | /* SUB8mi */ |
| 104696 | i8mem, i8imm, |
| 104697 | /* SUB8mi8 */ |
| 104698 | i8mem, i8imm, |
| 104699 | /* SUB8mi_EVEX */ |
| 104700 | i8mem, i8imm, |
| 104701 | /* SUB8mi_ND */ |
| 104702 | GR8, i8mem, i8imm, |
| 104703 | /* SUB8mi_NF */ |
| 104704 | i8mem, i8imm, |
| 104705 | /* SUB8mi_NF_ND */ |
| 104706 | GR8, i8mem, i8imm, |
| 104707 | /* SUB8mr */ |
| 104708 | i8mem, GR8, |
| 104709 | /* SUB8mr_EVEX */ |
| 104710 | i8mem, GR8, |
| 104711 | /* SUB8mr_ND */ |
| 104712 | GR8, i8mem, GR8, |
| 104713 | /* SUB8mr_NF */ |
| 104714 | i8mem, GR8, |
| 104715 | /* SUB8mr_NF_ND */ |
| 104716 | GR8, i8mem, GR8, |
| 104717 | /* SUB8ri */ |
| 104718 | GR8, GR8, i8imm, |
| 104719 | /* SUB8ri8 */ |
| 104720 | GR8, GR8, i8imm, |
| 104721 | /* SUB8ri_EVEX */ |
| 104722 | GR8, GR8, i8imm, |
| 104723 | /* SUB8ri_ND */ |
| 104724 | GR8, GR8, i8imm, |
| 104725 | /* SUB8ri_NF */ |
| 104726 | GR8, GR8, i8imm, |
| 104727 | /* SUB8ri_NF_ND */ |
| 104728 | GR8, GR8, i8imm, |
| 104729 | /* SUB8rm */ |
| 104730 | GR8, GR8, i8mem, |
| 104731 | /* SUB8rm_EVEX */ |
| 104732 | GR8, GR8, i8mem, |
| 104733 | /* SUB8rm_ND */ |
| 104734 | GR8, GR8, i8mem, |
| 104735 | /* SUB8rm_NF */ |
| 104736 | GR8, GR8, i8mem, |
| 104737 | /* SUB8rm_NF_ND */ |
| 104738 | GR8, GR8, i8mem, |
| 104739 | /* SUB8rr */ |
| 104740 | GR8, GR8, GR8, |
| 104741 | /* SUB8rr_EVEX */ |
| 104742 | GR8, GR8, GR8, |
| 104743 | /* SUB8rr_EVEX_REV */ |
| 104744 | GR8, GR8, GR8, |
| 104745 | /* SUB8rr_ND */ |
| 104746 | GR8, GR8, GR8, |
| 104747 | /* SUB8rr_ND_REV */ |
| 104748 | GR8, GR8, GR8, |
| 104749 | /* SUB8rr_NF */ |
| 104750 | GR8, GR8, GR8, |
| 104751 | /* SUB8rr_NF_ND */ |
| 104752 | GR8, GR8, GR8, |
| 104753 | /* SUB8rr_NF_ND_REV */ |
| 104754 | GR8, GR8, GR8, |
| 104755 | /* SUB8rr_NF_REV */ |
| 104756 | GR8, GR8, GR8, |
| 104757 | /* SUB8rr_REV */ |
| 104758 | GR8, GR8, GR8, |
| 104759 | /* SUBPDrm */ |
| 104760 | VR128, VR128, f128mem, |
| 104761 | /* SUBPDrr */ |
| 104762 | VR128, VR128, VR128, |
| 104763 | /* SUBPSrm */ |
| 104764 | VR128, VR128, f128mem, |
| 104765 | /* SUBPSrr */ |
| 104766 | VR128, VR128, VR128, |
| 104767 | /* SUBR_F32m */ |
| 104768 | f32mem, |
| 104769 | /* SUBR_F64m */ |
| 104770 | f64mem, |
| 104771 | /* SUBR_FI16m */ |
| 104772 | i16mem, |
| 104773 | /* SUBR_FI32m */ |
| 104774 | i32mem, |
| 104775 | /* SUBR_FPrST0 */ |
| 104776 | RSTi, |
| 104777 | /* SUBR_FST0r */ |
| 104778 | RSTi, |
| 104779 | /* SUBR_Fp32m */ |
| 104780 | RFP32, RFP32, f32mem, |
| 104781 | /* SUBR_Fp64m */ |
| 104782 | RFP64, RFP64, f64mem, |
| 104783 | /* SUBR_Fp64m32 */ |
| 104784 | RFP64, RFP64, f32mem, |
| 104785 | /* SUBR_Fp80m32 */ |
| 104786 | RFP80, RFP80, f32mem, |
| 104787 | /* SUBR_Fp80m64 */ |
| 104788 | RFP80, RFP80, f64mem, |
| 104789 | /* SUBR_FpI16m32 */ |
| 104790 | RFP32, RFP32, i16mem, |
| 104791 | /* SUBR_FpI16m64 */ |
| 104792 | RFP64, RFP64, i16mem, |
| 104793 | /* SUBR_FpI16m80 */ |
| 104794 | RFP80, RFP80, i16mem, |
| 104795 | /* SUBR_FpI32m32 */ |
| 104796 | RFP32, RFP32, i32mem, |
| 104797 | /* SUBR_FpI32m64 */ |
| 104798 | RFP64, RFP64, i32mem, |
| 104799 | /* SUBR_FpI32m80 */ |
| 104800 | RFP80, RFP80, i32mem, |
| 104801 | /* SUBR_FrST0 */ |
| 104802 | RSTi, |
| 104803 | /* SUBSDrm */ |
| 104804 | FR64, FR64, f64mem, |
| 104805 | /* SUBSDrm_Int */ |
| 104806 | VR128, VR128, sdmem, |
| 104807 | /* SUBSDrr */ |
| 104808 | FR64, FR64, FR64, |
| 104809 | /* SUBSDrr_Int */ |
| 104810 | VR128, VR128, VR128, |
| 104811 | /* SUBSSrm */ |
| 104812 | FR32, FR32, f32mem, |
| 104813 | /* SUBSSrm_Int */ |
| 104814 | VR128, VR128, ssmem, |
| 104815 | /* SUBSSrr */ |
| 104816 | FR32, FR32, FR32, |
| 104817 | /* SUBSSrr_Int */ |
| 104818 | VR128, VR128, VR128, |
| 104819 | /* SUB_F32m */ |
| 104820 | f32mem, |
| 104821 | /* SUB_F64m */ |
| 104822 | f64mem, |
| 104823 | /* SUB_FI16m */ |
| 104824 | i16mem, |
| 104825 | /* SUB_FI32m */ |
| 104826 | i32mem, |
| 104827 | /* SUB_FPrST0 */ |
| 104828 | RSTi, |
| 104829 | /* SUB_FST0r */ |
| 104830 | RSTi, |
| 104831 | /* SUB_Fp32 */ |
| 104832 | RFP32, RFP32, RFP32, |
| 104833 | /* SUB_Fp32m */ |
| 104834 | RFP32, RFP32, f32mem, |
| 104835 | /* SUB_Fp64 */ |
| 104836 | RFP64, RFP64, RFP64, |
| 104837 | /* SUB_Fp64m */ |
| 104838 | RFP64, RFP64, f64mem, |
| 104839 | /* SUB_Fp64m32 */ |
| 104840 | RFP64, RFP64, f32mem, |
| 104841 | /* SUB_Fp80 */ |
| 104842 | RFP80, RFP80, RFP80, |
| 104843 | /* SUB_Fp80m32 */ |
| 104844 | RFP80, RFP80, f32mem, |
| 104845 | /* SUB_Fp80m64 */ |
| 104846 | RFP80, RFP80, f64mem, |
| 104847 | /* SUB_FpI16m32 */ |
| 104848 | RFP32, RFP32, i16mem, |
| 104849 | /* SUB_FpI16m64 */ |
| 104850 | RFP64, RFP64, i16mem, |
| 104851 | /* SUB_FpI16m80 */ |
| 104852 | RFP80, RFP80, i16mem, |
| 104853 | /* SUB_FpI32m32 */ |
| 104854 | RFP32, RFP32, i32mem, |
| 104855 | /* SUB_FpI32m64 */ |
| 104856 | RFP64, RFP64, i32mem, |
| 104857 | /* SUB_FpI32m80 */ |
| 104858 | RFP80, RFP80, i32mem, |
| 104859 | /* SUB_FrST0 */ |
| 104860 | RSTi, |
| 104861 | /* SWAPGS */ |
| 104862 | /* SYSCALL */ |
| 104863 | /* SYSENTER */ |
| 104864 | /* SYSEXIT */ |
| 104865 | /* SYSEXIT64 */ |
| 104866 | /* SYSRET */ |
| 104867 | /* SYSRET64 */ |
| 104868 | /* T1MSKC32rm */ |
| 104869 | GR32, i32mem, |
| 104870 | /* T1MSKC32rr */ |
| 104871 | GR32, GR32, |
| 104872 | /* T1MSKC64rm */ |
| 104873 | GR64, i64mem, |
| 104874 | /* T1MSKC64rr */ |
| 104875 | GR64, GR64, |
| 104876 | /* T2RPNTLVWZ0 */ |
| 104877 | TILEPair, sibmem, |
| 104878 | /* T2RPNTLVWZ0RS */ |
| 104879 | TILEPair, sibmem, |
| 104880 | /* T2RPNTLVWZ0RST1 */ |
| 104881 | TILEPair, sibmem, |
| 104882 | /* T2RPNTLVWZ0RST1_EVEX */ |
| 104883 | TILEPair, sibmem, |
| 104884 | /* T2RPNTLVWZ0RS_EVEX */ |
| 104885 | TILEPair, sibmem, |
| 104886 | /* T2RPNTLVWZ0T1 */ |
| 104887 | TILEPair, sibmem, |
| 104888 | /* T2RPNTLVWZ0T1_EVEX */ |
| 104889 | TILEPair, sibmem, |
| 104890 | /* T2RPNTLVWZ0_EVEX */ |
| 104891 | TILEPair, sibmem, |
| 104892 | /* T2RPNTLVWZ1 */ |
| 104893 | TILEPair, sibmem, |
| 104894 | /* T2RPNTLVWZ1RS */ |
| 104895 | TILEPair, sibmem, |
| 104896 | /* T2RPNTLVWZ1RST1 */ |
| 104897 | TILEPair, sibmem, |
| 104898 | /* T2RPNTLVWZ1RST1_EVEX */ |
| 104899 | TILEPair, sibmem, |
| 104900 | /* T2RPNTLVWZ1RS_EVEX */ |
| 104901 | TILEPair, sibmem, |
| 104902 | /* T2RPNTLVWZ1T1 */ |
| 104903 | TILEPair, sibmem, |
| 104904 | /* T2RPNTLVWZ1T1_EVEX */ |
| 104905 | TILEPair, sibmem, |
| 104906 | /* T2RPNTLVWZ1_EVEX */ |
| 104907 | TILEPair, sibmem, |
| 104908 | /* TAILJMPd */ |
| 104909 | i32imm_brtarget, |
| 104910 | /* TAILJMPd64 */ |
| 104911 | i64i32imm_brtarget, |
| 104912 | /* TAILJMPd64_CC */ |
| 104913 | i64i32imm_brtarget, i32imm, |
| 104914 | /* TAILJMPd_CC */ |
| 104915 | i32imm_brtarget, i32imm, |
| 104916 | /* TAILJMPm */ |
| 104917 | i32mem_TC, |
| 104918 | /* TAILJMPm64 */ |
| 104919 | i64mem_TC, |
| 104920 | /* TAILJMPm64_REX */ |
| 104921 | i64mem_TC, |
| 104922 | /* TAILJMPr */ |
| 104923 | -1, |
| 104924 | /* TAILJMPr64 */ |
| 104925 | -1, |
| 104926 | /* TAILJMPr64_REX */ |
| 104927 | -1, |
| 104928 | /* TCMMIMFP16PS */ |
| 104929 | TILE, TILE, TILE, TILE, |
| 104930 | /* TCMMRLFP16PS */ |
| 104931 | TILE, TILE, TILE, TILE, |
| 104932 | /* TCONJTCMMIMFP16PS */ |
| 104933 | TILE, TILE, TILE, TILE, |
| 104934 | /* TCONJTFP16 */ |
| 104935 | TILE, TILE, |
| 104936 | /* TCRETURNdi */ |
| 104937 | i32imm_brtarget, i32imm, |
| 104938 | /* TCRETURNdi64 */ |
| 104939 | i64i32imm_brtarget, i32imm, |
| 104940 | /* TCRETURNdi64cc */ |
| 104941 | i64i32imm_brtarget, i32imm, i32imm, |
| 104942 | /* TCRETURNdicc */ |
| 104943 | i32imm_brtarget, i32imm, i32imm, |
| 104944 | /* TCRETURNmi */ |
| 104945 | i32mem_TC, i32imm, |
| 104946 | /* TCRETURNmi64 */ |
| 104947 | i64mem_TC, i32imm, |
| 104948 | /* TCRETURNri */ |
| 104949 | -1, i32imm, |
| 104950 | /* TCRETURNri64 */ |
| 104951 | -1, i32imm, |
| 104952 | /* TCRETURNri64_ImpCall */ |
| 104953 | GR64_A, i32imm, |
| 104954 | /* TCVTROWD2PSrre */ |
| 104955 | VR512, TILE, GR32, |
| 104956 | /* TCVTROWD2PSrri */ |
| 104957 | VR512, TILE, i32u8imm, |
| 104958 | /* TCVTROWPS2BF16Hrre */ |
| 104959 | VR512, TILE, GR32, |
| 104960 | /* TCVTROWPS2BF16Hrri */ |
| 104961 | VR512, TILE, i32u8imm, |
| 104962 | /* TCVTROWPS2BF16Lrre */ |
| 104963 | VR512, TILE, GR32, |
| 104964 | /* TCVTROWPS2BF16Lrri */ |
| 104965 | VR512, TILE, i32u8imm, |
| 104966 | /* TCVTROWPS2PHHrre */ |
| 104967 | VR512, TILE, GR32, |
| 104968 | /* TCVTROWPS2PHHrri */ |
| 104969 | VR512, TILE, i32u8imm, |
| 104970 | /* TCVTROWPS2PHLrre */ |
| 104971 | VR512, TILE, GR32, |
| 104972 | /* TCVTROWPS2PHLrri */ |
| 104973 | VR512, TILE, i32u8imm, |
| 104974 | /* TDCALL */ |
| 104975 | /* TDPBF16PS */ |
| 104976 | TILE, TILE, TILE, TILE, |
| 104977 | /* TDPBF8PS */ |
| 104978 | TILE, TILE, TILE, TILE, |
| 104979 | /* TDPBHF8PS */ |
| 104980 | TILE, TILE, TILE, TILE, |
| 104981 | /* TDPBSSD */ |
| 104982 | TILE, TILE, TILE, TILE, |
| 104983 | /* TDPBSUD */ |
| 104984 | TILE, TILE, TILE, TILE, |
| 104985 | /* TDPBUSD */ |
| 104986 | TILE, TILE, TILE, TILE, |
| 104987 | /* TDPBUUD */ |
| 104988 | TILE, TILE, TILE, TILE, |
| 104989 | /* TDPFP16PS */ |
| 104990 | TILE, TILE, TILE, TILE, |
| 104991 | /* TDPHBF8PS */ |
| 104992 | TILE, TILE, TILE, TILE, |
| 104993 | /* TDPHF8PS */ |
| 104994 | TILE, TILE, TILE, TILE, |
| 104995 | /* TEST16i16 */ |
| 104996 | i16imm, |
| 104997 | /* TEST16mi */ |
| 104998 | i16mem, i16imm, |
| 104999 | /* TEST16mr */ |
| 105000 | i16mem, GR16, |
| 105001 | /* TEST16ri */ |
| 105002 | GR16, i16imm, |
| 105003 | /* TEST16rr */ |
| 105004 | GR16, GR16, |
| 105005 | /* TEST32i32 */ |
| 105006 | i32imm, |
| 105007 | /* TEST32mi */ |
| 105008 | i32mem, i32imm, |
| 105009 | /* TEST32mr */ |
| 105010 | i32mem, GR32, |
| 105011 | /* TEST32ri */ |
| 105012 | GR32, i32imm, |
| 105013 | /* TEST32rr */ |
| 105014 | GR32, GR32, |
| 105015 | /* TEST64i32 */ |
| 105016 | i64i32imm, |
| 105017 | /* TEST64mi32 */ |
| 105018 | i64mem, i64i32imm, |
| 105019 | /* TEST64mr */ |
| 105020 | i64mem, GR64, |
| 105021 | /* TEST64ri32 */ |
| 105022 | GR64, i64i32imm, |
| 105023 | /* TEST64rr */ |
| 105024 | GR64, GR64, |
| 105025 | /* TEST8i8 */ |
| 105026 | i8imm, |
| 105027 | /* TEST8mi */ |
| 105028 | i8mem, i8imm, |
| 105029 | /* TEST8mr */ |
| 105030 | i8mem, GR8, |
| 105031 | /* TEST8ri */ |
| 105032 | GR8, i8imm, |
| 105033 | /* TEST8rr */ |
| 105034 | GR8, GR8, |
| 105035 | /* TESTUI */ |
| 105036 | /* TILELOADD */ |
| 105037 | TILE, sibmem, |
| 105038 | /* TILELOADDRS */ |
| 105039 | TILE, sibmem, |
| 105040 | /* TILELOADDRST1 */ |
| 105041 | TILE, sibmem, |
| 105042 | /* TILELOADDRST1_EVEX */ |
| 105043 | TILE, sibmem, |
| 105044 | /* TILELOADDRS_EVEX */ |
| 105045 | TILE, sibmem, |
| 105046 | /* TILELOADDT1 */ |
| 105047 | TILE, sibmem, |
| 105048 | /* TILELOADDT1_EVEX */ |
| 105049 | TILE, sibmem, |
| 105050 | /* TILELOADD_EVEX */ |
| 105051 | TILE, sibmem, |
| 105052 | /* TILEMOVROWrre */ |
| 105053 | VR512, TILE, GR32, |
| 105054 | /* TILEMOVROWrri */ |
| 105055 | VR512, TILE, u8imm, |
| 105056 | /* TILERELEASE */ |
| 105057 | /* TILESTORED */ |
| 105058 | sibmem, TILE, |
| 105059 | /* TILESTORED_EVEX */ |
| 105060 | sibmem, TILE, |
| 105061 | /* TILEZERO */ |
| 105062 | TILE, |
| 105063 | /* TLBSYNC */ |
| 105064 | /* TLSCall_32 */ |
| 105065 | i32mem, |
| 105066 | /* TLSCall_64 */ |
| 105067 | i64mem, |
| 105068 | /* TLS_addr32 */ |
| 105069 | i32mem, |
| 105070 | /* TLS_addr64 */ |
| 105071 | i64mem, |
| 105072 | /* TLS_addrX32 */ |
| 105073 | i32mem, |
| 105074 | /* TLS_base_addr32 */ |
| 105075 | i32mem, |
| 105076 | /* TLS_base_addr64 */ |
| 105077 | i64mem, |
| 105078 | /* TLS_base_addrX32 */ |
| 105079 | i32mem, |
| 105080 | /* TLS_desc32 */ |
| 105081 | i32mem, |
| 105082 | /* TLS_desc64 */ |
| 105083 | i64mem, |
| 105084 | /* TMMULTF32PS */ |
| 105085 | TILE, TILE, TILE, TILE, |
| 105086 | /* TPAUSE */ |
| 105087 | GR32orGR64, |
| 105088 | /* TRAP */ |
| 105089 | /* TST_F */ |
| 105090 | /* TST_Fp32 */ |
| 105091 | RFP32, |
| 105092 | /* TST_Fp64 */ |
| 105093 | RFP64, |
| 105094 | /* TST_Fp80 */ |
| 105095 | RFP80, |
| 105096 | /* TTCMMIMFP16PS */ |
| 105097 | TILE, TILE, TILE, TILE, |
| 105098 | /* TTCMMRLFP16PS */ |
| 105099 | TILE, TILE, TILE, TILE, |
| 105100 | /* TTDPBF16PS */ |
| 105101 | TILE, TILE, TILE, TILE, |
| 105102 | /* TTDPFP16PS */ |
| 105103 | TILE, TILE, TILE, TILE, |
| 105104 | /* TTMMULTF32PS */ |
| 105105 | TILE, TILE, TILE, TILE, |
| 105106 | /* TTRANSPOSED */ |
| 105107 | TILE, TILE, |
| 105108 | /* TZCNT16rm */ |
| 105109 | GR16, i16mem, |
| 105110 | /* TZCNT16rm_EVEX */ |
| 105111 | GR16, i16mem, |
| 105112 | /* TZCNT16rm_NF */ |
| 105113 | GR16, i16mem, |
| 105114 | /* TZCNT16rr */ |
| 105115 | GR16, GR16, |
| 105116 | /* TZCNT16rr_EVEX */ |
| 105117 | GR16, GR16, |
| 105118 | /* TZCNT16rr_NF */ |
| 105119 | GR16, GR16, |
| 105120 | /* TZCNT32rm */ |
| 105121 | GR32, i32mem, |
| 105122 | /* TZCNT32rm_EVEX */ |
| 105123 | GR32, i32mem, |
| 105124 | /* TZCNT32rm_NF */ |
| 105125 | GR32, i32mem, |
| 105126 | /* TZCNT32rr */ |
| 105127 | GR32, GR32, |
| 105128 | /* TZCNT32rr_EVEX */ |
| 105129 | GR32, GR32, |
| 105130 | /* TZCNT32rr_NF */ |
| 105131 | GR32, GR32, |
| 105132 | /* TZCNT64rm */ |
| 105133 | GR64, i64mem, |
| 105134 | /* TZCNT64rm_EVEX */ |
| 105135 | GR64, i64mem, |
| 105136 | /* TZCNT64rm_NF */ |
| 105137 | GR64, i64mem, |
| 105138 | /* TZCNT64rr */ |
| 105139 | GR64, GR64, |
| 105140 | /* TZCNT64rr_EVEX */ |
| 105141 | GR64, GR64, |
| 105142 | /* TZCNT64rr_NF */ |
| 105143 | GR64, GR64, |
| 105144 | /* TZMSK32rm */ |
| 105145 | GR32, i32mem, |
| 105146 | /* TZMSK32rr */ |
| 105147 | GR32, GR32, |
| 105148 | /* TZMSK64rm */ |
| 105149 | GR64, i64mem, |
| 105150 | /* TZMSK64rr */ |
| 105151 | GR64, GR64, |
| 105152 | /* UBSAN_UD1 */ |
| 105153 | i32imm, |
| 105154 | /* UCOMISDrm */ |
| 105155 | FR64, f64mem, |
| 105156 | /* UCOMISDrm_Int */ |
| 105157 | VR128, sdmem, |
| 105158 | /* UCOMISDrr */ |
| 105159 | FR64, FR64, |
| 105160 | /* UCOMISDrr_Int */ |
| 105161 | VR128, VR128, |
| 105162 | /* UCOMISSrm */ |
| 105163 | FR32, f32mem, |
| 105164 | /* UCOMISSrm_Int */ |
| 105165 | VR128, ssmem, |
| 105166 | /* UCOMISSrr */ |
| 105167 | FR32, FR32, |
| 105168 | /* UCOMISSrr_Int */ |
| 105169 | VR128, VR128, |
| 105170 | /* UCOM_FIPr */ |
| 105171 | RSTi, |
| 105172 | /* UCOM_FIr */ |
| 105173 | RSTi, |
| 105174 | /* UCOM_FPPr */ |
| 105175 | /* UCOM_FPr */ |
| 105176 | RSTi, |
| 105177 | /* UCOM_FpIr32 */ |
| 105178 | RFP32, RFP32, |
| 105179 | /* UCOM_FpIr64 */ |
| 105180 | RFP64, RFP64, |
| 105181 | /* UCOM_FpIr80 */ |
| 105182 | RFP80, RFP80, |
| 105183 | /* UCOM_Fpr32 */ |
| 105184 | RFP32, RFP32, |
| 105185 | /* UCOM_Fpr64 */ |
| 105186 | RFP64, RFP64, |
| 105187 | /* UCOM_Fpr80 */ |
| 105188 | RFP80, RFP80, |
| 105189 | /* UCOM_Fr */ |
| 105190 | RSTi, |
| 105191 | /* UD1Lm */ |
| 105192 | GR32, i32mem, |
| 105193 | /* UD1Lr */ |
| 105194 | GR32, GR32, |
| 105195 | /* UD1Qm */ |
| 105196 | GR64, i64mem, |
| 105197 | /* UD1Qr */ |
| 105198 | GR64, GR64, |
| 105199 | /* UD1Wm */ |
| 105200 | GR16, i16mem, |
| 105201 | /* UD1Wr */ |
| 105202 | GR16, GR16, |
| 105203 | /* UIRET */ |
| 105204 | /* UMONITOR16 */ |
| 105205 | GR16, |
| 105206 | /* UMONITOR32 */ |
| 105207 | GR32, |
| 105208 | /* UMONITOR64 */ |
| 105209 | GR64, |
| 105210 | /* UMWAIT */ |
| 105211 | GR32orGR64, |
| 105212 | /* UNPCKHPDrm */ |
| 105213 | VR128, VR128, f128mem, |
| 105214 | /* UNPCKHPDrr */ |
| 105215 | VR128, VR128, VR128, |
| 105216 | /* UNPCKHPSrm */ |
| 105217 | VR128, VR128, f128mem, |
| 105218 | /* UNPCKHPSrr */ |
| 105219 | VR128, VR128, VR128, |
| 105220 | /* UNPCKLPDrm */ |
| 105221 | VR128, VR128, f128mem, |
| 105222 | /* UNPCKLPDrr */ |
| 105223 | VR128, VR128, VR128, |
| 105224 | /* UNPCKLPSrm */ |
| 105225 | VR128, VR128, f128mem, |
| 105226 | /* UNPCKLPSrr */ |
| 105227 | VR128, VR128, VR128, |
| 105228 | /* URDMSRri */ |
| 105229 | GR64, i64i32imm, |
| 105230 | /* URDMSRri_EVEX */ |
| 105231 | GR64, i64i32imm, |
| 105232 | /* URDMSRrr */ |
| 105233 | GR64, GR64, |
| 105234 | /* URDMSRrr_EVEX */ |
| 105235 | GR64, GR64, |
| 105236 | /* UWRMSRir */ |
| 105237 | GR64, i64i32imm, |
| 105238 | /* UWRMSRir_EVEX */ |
| 105239 | GR64, i64i32imm, |
| 105240 | /* UWRMSRrr */ |
| 105241 | GR64, GR64, |
| 105242 | /* UWRMSRrr_EVEX */ |
| 105243 | GR64, GR64, |
| 105244 | /* V4FMADDPSrm */ |
| 105245 | VR512, VR512, VR512, f128mem, |
| 105246 | /* V4FMADDPSrmk */ |
| 105247 | VR512, VR512, VK16WM, VR512, f128mem, |
| 105248 | /* V4FMADDPSrmkz */ |
| 105249 | VR512, VR512, VK16WM, VR512, f128mem, |
| 105250 | /* V4FMADDSSrm */ |
| 105251 | VR128X, VR128X, VR128X, f128mem, |
| 105252 | /* V4FMADDSSrmk */ |
| 105253 | VR128X, VR128X, VK1WM, VR128X, f128mem, |
| 105254 | /* V4FMADDSSrmkz */ |
| 105255 | VR128X, VR128X, VK1WM, VR128X, f128mem, |
| 105256 | /* V4FNMADDPSrm */ |
| 105257 | VR512, VR512, VR512, f128mem, |
| 105258 | /* V4FNMADDPSrmk */ |
| 105259 | VR512, VR512, VK16WM, VR512, f128mem, |
| 105260 | /* V4FNMADDPSrmkz */ |
| 105261 | VR512, VR512, VK16WM, VR512, f128mem, |
| 105262 | /* V4FNMADDSSrm */ |
| 105263 | VR128X, VR128X, VR128X, f128mem, |
| 105264 | /* V4FNMADDSSrmk */ |
| 105265 | VR128X, VR128X, VK1WM, VR128X, f128mem, |
| 105266 | /* V4FNMADDSSrmkz */ |
| 105267 | VR128X, VR128X, VK1WM, VR128X, f128mem, |
| 105268 | /* VAARG_64 */ |
| 105269 | GR64, i8mem, i32imm, i8imm, i32imm, |
| 105270 | /* VAARG_X32 */ |
| 105271 | GR32, i8mem, i32imm, i8imm, i32imm, |
| 105272 | /* VADDBF16Z128rm */ |
| 105273 | VR128X, VR128X, f128mem, |
| 105274 | /* VADDBF16Z128rmb */ |
| 105275 | VR128X, VR128X, f16mem, |
| 105276 | /* VADDBF16Z128rmbk */ |
| 105277 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 105278 | /* VADDBF16Z128rmbkz */ |
| 105279 | VR128X, VK8WM, VR128X, f16mem, |
| 105280 | /* VADDBF16Z128rmk */ |
| 105281 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 105282 | /* VADDBF16Z128rmkz */ |
| 105283 | VR128X, VK8WM, VR128X, f128mem, |
| 105284 | /* VADDBF16Z128rr */ |
| 105285 | VR128X, VR128X, VR128X, |
| 105286 | /* VADDBF16Z128rrk */ |
| 105287 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 105288 | /* VADDBF16Z128rrkz */ |
| 105289 | VR128X, VK8WM, VR128X, VR128X, |
| 105290 | /* VADDBF16Z256rm */ |
| 105291 | VR256X, VR256X, f256mem, |
| 105292 | /* VADDBF16Z256rmb */ |
| 105293 | VR256X, VR256X, f16mem, |
| 105294 | /* VADDBF16Z256rmbk */ |
| 105295 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 105296 | /* VADDBF16Z256rmbkz */ |
| 105297 | VR256X, VK16WM, VR256X, f16mem, |
| 105298 | /* VADDBF16Z256rmk */ |
| 105299 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 105300 | /* VADDBF16Z256rmkz */ |
| 105301 | VR256X, VK16WM, VR256X, f256mem, |
| 105302 | /* VADDBF16Z256rr */ |
| 105303 | VR256X, VR256X, VR256X, |
| 105304 | /* VADDBF16Z256rrk */ |
| 105305 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 105306 | /* VADDBF16Z256rrkz */ |
| 105307 | VR256X, VK16WM, VR256X, VR256X, |
| 105308 | /* VADDBF16Zrm */ |
| 105309 | VR512, VR512, f512mem, |
| 105310 | /* VADDBF16Zrmb */ |
| 105311 | VR512, VR512, f16mem, |
| 105312 | /* VADDBF16Zrmbk */ |
| 105313 | VR512, VR512, VK32WM, VR512, f16mem, |
| 105314 | /* VADDBF16Zrmbkz */ |
| 105315 | VR512, VK32WM, VR512, f16mem, |
| 105316 | /* VADDBF16Zrmk */ |
| 105317 | VR512, VR512, VK32WM, VR512, f512mem, |
| 105318 | /* VADDBF16Zrmkz */ |
| 105319 | VR512, VK32WM, VR512, f512mem, |
| 105320 | /* VADDBF16Zrr */ |
| 105321 | VR512, VR512, VR512, |
| 105322 | /* VADDBF16Zrrk */ |
| 105323 | VR512, VR512, VK32WM, VR512, VR512, |
| 105324 | /* VADDBF16Zrrkz */ |
| 105325 | VR512, VK32WM, VR512, VR512, |
| 105326 | /* VADDPDYrm */ |
| 105327 | VR256, VR256, f256mem, |
| 105328 | /* VADDPDYrr */ |
| 105329 | VR256, VR256, VR256, |
| 105330 | /* VADDPDZ128rm */ |
| 105331 | VR128X, VR128X, f128mem, |
| 105332 | /* VADDPDZ128rmb */ |
| 105333 | VR128X, VR128X, f64mem, |
| 105334 | /* VADDPDZ128rmbk */ |
| 105335 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 105336 | /* VADDPDZ128rmbkz */ |
| 105337 | VR128X, VK2WM, VR128X, f64mem, |
| 105338 | /* VADDPDZ128rmk */ |
| 105339 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 105340 | /* VADDPDZ128rmkz */ |
| 105341 | VR128X, VK2WM, VR128X, f128mem, |
| 105342 | /* VADDPDZ128rr */ |
| 105343 | VR128X, VR128X, VR128X, |
| 105344 | /* VADDPDZ128rrk */ |
| 105345 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 105346 | /* VADDPDZ128rrkz */ |
| 105347 | VR128X, VK2WM, VR128X, VR128X, |
| 105348 | /* VADDPDZ256rm */ |
| 105349 | VR256X, VR256X, f256mem, |
| 105350 | /* VADDPDZ256rmb */ |
| 105351 | VR256X, VR256X, f64mem, |
| 105352 | /* VADDPDZ256rmbk */ |
| 105353 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 105354 | /* VADDPDZ256rmbkz */ |
| 105355 | VR256X, VK4WM, VR256X, f64mem, |
| 105356 | /* VADDPDZ256rmk */ |
| 105357 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 105358 | /* VADDPDZ256rmkz */ |
| 105359 | VR256X, VK4WM, VR256X, f256mem, |
| 105360 | /* VADDPDZ256rr */ |
| 105361 | VR256X, VR256X, VR256X, |
| 105362 | /* VADDPDZ256rrk */ |
| 105363 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 105364 | /* VADDPDZ256rrkz */ |
| 105365 | VR256X, VK4WM, VR256X, VR256X, |
| 105366 | /* VADDPDZrm */ |
| 105367 | VR512, VR512, f512mem, |
| 105368 | /* VADDPDZrmb */ |
| 105369 | VR512, VR512, f64mem, |
| 105370 | /* VADDPDZrmbk */ |
| 105371 | VR512, VR512, VK8WM, VR512, f64mem, |
| 105372 | /* VADDPDZrmbkz */ |
| 105373 | VR512, VK8WM, VR512, f64mem, |
| 105374 | /* VADDPDZrmk */ |
| 105375 | VR512, VR512, VK8WM, VR512, f512mem, |
| 105376 | /* VADDPDZrmkz */ |
| 105377 | VR512, VK8WM, VR512, f512mem, |
| 105378 | /* VADDPDZrr */ |
| 105379 | VR512, VR512, VR512, |
| 105380 | /* VADDPDZrrb */ |
| 105381 | VR512, VR512, VR512, AVX512RC, |
| 105382 | /* VADDPDZrrbk */ |
| 105383 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 105384 | /* VADDPDZrrbkz */ |
| 105385 | VR512, VK8WM, VR512, VR512, AVX512RC, |
| 105386 | /* VADDPDZrrk */ |
| 105387 | VR512, VR512, VK8WM, VR512, VR512, |
| 105388 | /* VADDPDZrrkz */ |
| 105389 | VR512, VK8WM, VR512, VR512, |
| 105390 | /* VADDPDrm */ |
| 105391 | VR128, VR128, f128mem, |
| 105392 | /* VADDPDrr */ |
| 105393 | VR128, VR128, VR128, |
| 105394 | /* VADDPHZ128rm */ |
| 105395 | VR128X, VR128X, f128mem, |
| 105396 | /* VADDPHZ128rmb */ |
| 105397 | VR128X, VR128X, f16mem, |
| 105398 | /* VADDPHZ128rmbk */ |
| 105399 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 105400 | /* VADDPHZ128rmbkz */ |
| 105401 | VR128X, VK8WM, VR128X, f16mem, |
| 105402 | /* VADDPHZ128rmk */ |
| 105403 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 105404 | /* VADDPHZ128rmkz */ |
| 105405 | VR128X, VK8WM, VR128X, f128mem, |
| 105406 | /* VADDPHZ128rr */ |
| 105407 | VR128X, VR128X, VR128X, |
| 105408 | /* VADDPHZ128rrk */ |
| 105409 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 105410 | /* VADDPHZ128rrkz */ |
| 105411 | VR128X, VK8WM, VR128X, VR128X, |
| 105412 | /* VADDPHZ256rm */ |
| 105413 | VR256X, VR256X, f256mem, |
| 105414 | /* VADDPHZ256rmb */ |
| 105415 | VR256X, VR256X, f16mem, |
| 105416 | /* VADDPHZ256rmbk */ |
| 105417 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 105418 | /* VADDPHZ256rmbkz */ |
| 105419 | VR256X, VK16WM, VR256X, f16mem, |
| 105420 | /* VADDPHZ256rmk */ |
| 105421 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 105422 | /* VADDPHZ256rmkz */ |
| 105423 | VR256X, VK16WM, VR256X, f256mem, |
| 105424 | /* VADDPHZ256rr */ |
| 105425 | VR256X, VR256X, VR256X, |
| 105426 | /* VADDPHZ256rrk */ |
| 105427 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 105428 | /* VADDPHZ256rrkz */ |
| 105429 | VR256X, VK16WM, VR256X, VR256X, |
| 105430 | /* VADDPHZrm */ |
| 105431 | VR512, VR512, f512mem, |
| 105432 | /* VADDPHZrmb */ |
| 105433 | VR512, VR512, f16mem, |
| 105434 | /* VADDPHZrmbk */ |
| 105435 | VR512, VR512, VK32WM, VR512, f16mem, |
| 105436 | /* VADDPHZrmbkz */ |
| 105437 | VR512, VK32WM, VR512, f16mem, |
| 105438 | /* VADDPHZrmk */ |
| 105439 | VR512, VR512, VK32WM, VR512, f512mem, |
| 105440 | /* VADDPHZrmkz */ |
| 105441 | VR512, VK32WM, VR512, f512mem, |
| 105442 | /* VADDPHZrr */ |
| 105443 | VR512, VR512, VR512, |
| 105444 | /* VADDPHZrrb */ |
| 105445 | VR512, VR512, VR512, AVX512RC, |
| 105446 | /* VADDPHZrrbk */ |
| 105447 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 105448 | /* VADDPHZrrbkz */ |
| 105449 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 105450 | /* VADDPHZrrk */ |
| 105451 | VR512, VR512, VK32WM, VR512, VR512, |
| 105452 | /* VADDPHZrrkz */ |
| 105453 | VR512, VK32WM, VR512, VR512, |
| 105454 | /* VADDPSYrm */ |
| 105455 | VR256, VR256, f256mem, |
| 105456 | /* VADDPSYrr */ |
| 105457 | VR256, VR256, VR256, |
| 105458 | /* VADDPSZ128rm */ |
| 105459 | VR128X, VR128X, f128mem, |
| 105460 | /* VADDPSZ128rmb */ |
| 105461 | VR128X, VR128X, f32mem, |
| 105462 | /* VADDPSZ128rmbk */ |
| 105463 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 105464 | /* VADDPSZ128rmbkz */ |
| 105465 | VR128X, VK4WM, VR128X, f32mem, |
| 105466 | /* VADDPSZ128rmk */ |
| 105467 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 105468 | /* VADDPSZ128rmkz */ |
| 105469 | VR128X, VK4WM, VR128X, f128mem, |
| 105470 | /* VADDPSZ128rr */ |
| 105471 | VR128X, VR128X, VR128X, |
| 105472 | /* VADDPSZ128rrk */ |
| 105473 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 105474 | /* VADDPSZ128rrkz */ |
| 105475 | VR128X, VK4WM, VR128X, VR128X, |
| 105476 | /* VADDPSZ256rm */ |
| 105477 | VR256X, VR256X, f256mem, |
| 105478 | /* VADDPSZ256rmb */ |
| 105479 | VR256X, VR256X, f32mem, |
| 105480 | /* VADDPSZ256rmbk */ |
| 105481 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 105482 | /* VADDPSZ256rmbkz */ |
| 105483 | VR256X, VK8WM, VR256X, f32mem, |
| 105484 | /* VADDPSZ256rmk */ |
| 105485 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 105486 | /* VADDPSZ256rmkz */ |
| 105487 | VR256X, VK8WM, VR256X, f256mem, |
| 105488 | /* VADDPSZ256rr */ |
| 105489 | VR256X, VR256X, VR256X, |
| 105490 | /* VADDPSZ256rrk */ |
| 105491 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 105492 | /* VADDPSZ256rrkz */ |
| 105493 | VR256X, VK8WM, VR256X, VR256X, |
| 105494 | /* VADDPSZrm */ |
| 105495 | VR512, VR512, f512mem, |
| 105496 | /* VADDPSZrmb */ |
| 105497 | VR512, VR512, f32mem, |
| 105498 | /* VADDPSZrmbk */ |
| 105499 | VR512, VR512, VK16WM, VR512, f32mem, |
| 105500 | /* VADDPSZrmbkz */ |
| 105501 | VR512, VK16WM, VR512, f32mem, |
| 105502 | /* VADDPSZrmk */ |
| 105503 | VR512, VR512, VK16WM, VR512, f512mem, |
| 105504 | /* VADDPSZrmkz */ |
| 105505 | VR512, VK16WM, VR512, f512mem, |
| 105506 | /* VADDPSZrr */ |
| 105507 | VR512, VR512, VR512, |
| 105508 | /* VADDPSZrrb */ |
| 105509 | VR512, VR512, VR512, AVX512RC, |
| 105510 | /* VADDPSZrrbk */ |
| 105511 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 105512 | /* VADDPSZrrbkz */ |
| 105513 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 105514 | /* VADDPSZrrk */ |
| 105515 | VR512, VR512, VK16WM, VR512, VR512, |
| 105516 | /* VADDPSZrrkz */ |
| 105517 | VR512, VK16WM, VR512, VR512, |
| 105518 | /* VADDPSrm */ |
| 105519 | VR128, VR128, f128mem, |
| 105520 | /* VADDPSrr */ |
| 105521 | VR128, VR128, VR128, |
| 105522 | /* VADDSDZrm */ |
| 105523 | FR64X, FR64X, f64mem, |
| 105524 | /* VADDSDZrm_Int */ |
| 105525 | VR128X, VR128X, sdmem, |
| 105526 | /* VADDSDZrmk_Int */ |
| 105527 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 105528 | /* VADDSDZrmkz_Int */ |
| 105529 | VR128X, VK1WM, VR128X, sdmem, |
| 105530 | /* VADDSDZrr */ |
| 105531 | FR64X, FR64X, FR64X, |
| 105532 | /* VADDSDZrr_Int */ |
| 105533 | VR128X, VR128X, VR128X, |
| 105534 | /* VADDSDZrrb_Int */ |
| 105535 | VR128X, VR128X, VR128X, AVX512RC, |
| 105536 | /* VADDSDZrrbk_Int */ |
| 105537 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 105538 | /* VADDSDZrrbkz_Int */ |
| 105539 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 105540 | /* VADDSDZrrk_Int */ |
| 105541 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 105542 | /* VADDSDZrrkz_Int */ |
| 105543 | VR128X, VK1WM, VR128X, VR128X, |
| 105544 | /* VADDSDrm */ |
| 105545 | FR64, FR64, f64mem, |
| 105546 | /* VADDSDrm_Int */ |
| 105547 | VR128, VR128, sdmem, |
| 105548 | /* VADDSDrr */ |
| 105549 | FR64, FR64, FR64, |
| 105550 | /* VADDSDrr_Int */ |
| 105551 | VR128, VR128, VR128, |
| 105552 | /* VADDSHZrm */ |
| 105553 | FR16X, FR16X, f16mem, |
| 105554 | /* VADDSHZrm_Int */ |
| 105555 | VR128X, VR128X, shmem, |
| 105556 | /* VADDSHZrmk_Int */ |
| 105557 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 105558 | /* VADDSHZrmkz_Int */ |
| 105559 | VR128X, VK1WM, VR128X, shmem, |
| 105560 | /* VADDSHZrr */ |
| 105561 | FR16X, FR16X, FR16X, |
| 105562 | /* VADDSHZrr_Int */ |
| 105563 | VR128X, VR128X, VR128X, |
| 105564 | /* VADDSHZrrb_Int */ |
| 105565 | VR128X, VR128X, VR128X, AVX512RC, |
| 105566 | /* VADDSHZrrbk_Int */ |
| 105567 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 105568 | /* VADDSHZrrbkz_Int */ |
| 105569 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 105570 | /* VADDSHZrrk_Int */ |
| 105571 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 105572 | /* VADDSHZrrkz_Int */ |
| 105573 | VR128X, VK1WM, VR128X, VR128X, |
| 105574 | /* VADDSSZrm */ |
| 105575 | FR32X, FR32X, f32mem, |
| 105576 | /* VADDSSZrm_Int */ |
| 105577 | VR128X, VR128X, ssmem, |
| 105578 | /* VADDSSZrmk_Int */ |
| 105579 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 105580 | /* VADDSSZrmkz_Int */ |
| 105581 | VR128X, VK1WM, VR128X, ssmem, |
| 105582 | /* VADDSSZrr */ |
| 105583 | FR32X, FR32X, FR32X, |
| 105584 | /* VADDSSZrr_Int */ |
| 105585 | VR128X, VR128X, VR128X, |
| 105586 | /* VADDSSZrrb_Int */ |
| 105587 | VR128X, VR128X, VR128X, AVX512RC, |
| 105588 | /* VADDSSZrrbk_Int */ |
| 105589 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 105590 | /* VADDSSZrrbkz_Int */ |
| 105591 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 105592 | /* VADDSSZrrk_Int */ |
| 105593 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 105594 | /* VADDSSZrrkz_Int */ |
| 105595 | VR128X, VK1WM, VR128X, VR128X, |
| 105596 | /* VADDSSrm */ |
| 105597 | FR32, FR32, f32mem, |
| 105598 | /* VADDSSrm_Int */ |
| 105599 | VR128, VR128, ssmem, |
| 105600 | /* VADDSSrr */ |
| 105601 | FR32, FR32, FR32, |
| 105602 | /* VADDSSrr_Int */ |
| 105603 | VR128, VR128, VR128, |
| 105604 | /* VADDSUBPDYrm */ |
| 105605 | VR256, VR256, f256mem, |
| 105606 | /* VADDSUBPDYrr */ |
| 105607 | VR256, VR256, VR256, |
| 105608 | /* VADDSUBPDrm */ |
| 105609 | VR128, VR128, f128mem, |
| 105610 | /* VADDSUBPDrr */ |
| 105611 | VR128, VR128, VR128, |
| 105612 | /* VADDSUBPSYrm */ |
| 105613 | VR256, VR256, f256mem, |
| 105614 | /* VADDSUBPSYrr */ |
| 105615 | VR256, VR256, VR256, |
| 105616 | /* VADDSUBPSrm */ |
| 105617 | VR128, VR128, f128mem, |
| 105618 | /* VADDSUBPSrr */ |
| 105619 | VR128, VR128, VR128, |
| 105620 | /* VAESDECLASTYrm */ |
| 105621 | VR256, VR256, i256mem, |
| 105622 | /* VAESDECLASTYrr */ |
| 105623 | VR256, VR256, VR256, |
| 105624 | /* VAESDECLASTZ128rm */ |
| 105625 | VR128X, VR128X, i128mem, |
| 105626 | /* VAESDECLASTZ128rr */ |
| 105627 | VR128X, VR128X, VR128X, |
| 105628 | /* VAESDECLASTZ256rm */ |
| 105629 | VR256X, VR256X, i256mem, |
| 105630 | /* VAESDECLASTZ256rr */ |
| 105631 | VR256X, VR256X, VR256X, |
| 105632 | /* VAESDECLASTZrm */ |
| 105633 | VR512, VR512, i512mem, |
| 105634 | /* VAESDECLASTZrr */ |
| 105635 | VR512, VR512, VR512, |
| 105636 | /* VAESDECLASTrm */ |
| 105637 | VR128, VR128, i128mem, |
| 105638 | /* VAESDECLASTrr */ |
| 105639 | VR128, VR128, VR128, |
| 105640 | /* VAESDECYrm */ |
| 105641 | VR256, VR256, i256mem, |
| 105642 | /* VAESDECYrr */ |
| 105643 | VR256, VR256, VR256, |
| 105644 | /* VAESDECZ128rm */ |
| 105645 | VR128X, VR128X, i128mem, |
| 105646 | /* VAESDECZ128rr */ |
| 105647 | VR128X, VR128X, VR128X, |
| 105648 | /* VAESDECZ256rm */ |
| 105649 | VR256X, VR256X, i256mem, |
| 105650 | /* VAESDECZ256rr */ |
| 105651 | VR256X, VR256X, VR256X, |
| 105652 | /* VAESDECZrm */ |
| 105653 | VR512, VR512, i512mem, |
| 105654 | /* VAESDECZrr */ |
| 105655 | VR512, VR512, VR512, |
| 105656 | /* VAESDECrm */ |
| 105657 | VR128, VR128, i128mem, |
| 105658 | /* VAESDECrr */ |
| 105659 | VR128, VR128, VR128, |
| 105660 | /* VAESENCLASTYrm */ |
| 105661 | VR256, VR256, i256mem, |
| 105662 | /* VAESENCLASTYrr */ |
| 105663 | VR256, VR256, VR256, |
| 105664 | /* VAESENCLASTZ128rm */ |
| 105665 | VR128X, VR128X, i128mem, |
| 105666 | /* VAESENCLASTZ128rr */ |
| 105667 | VR128X, VR128X, VR128X, |
| 105668 | /* VAESENCLASTZ256rm */ |
| 105669 | VR256X, VR256X, i256mem, |
| 105670 | /* VAESENCLASTZ256rr */ |
| 105671 | VR256X, VR256X, VR256X, |
| 105672 | /* VAESENCLASTZrm */ |
| 105673 | VR512, VR512, i512mem, |
| 105674 | /* VAESENCLASTZrr */ |
| 105675 | VR512, VR512, VR512, |
| 105676 | /* VAESENCLASTrm */ |
| 105677 | VR128, VR128, i128mem, |
| 105678 | /* VAESENCLASTrr */ |
| 105679 | VR128, VR128, VR128, |
| 105680 | /* VAESENCYrm */ |
| 105681 | VR256, VR256, i256mem, |
| 105682 | /* VAESENCYrr */ |
| 105683 | VR256, VR256, VR256, |
| 105684 | /* VAESENCZ128rm */ |
| 105685 | VR128X, VR128X, i128mem, |
| 105686 | /* VAESENCZ128rr */ |
| 105687 | VR128X, VR128X, VR128X, |
| 105688 | /* VAESENCZ256rm */ |
| 105689 | VR256X, VR256X, i256mem, |
| 105690 | /* VAESENCZ256rr */ |
| 105691 | VR256X, VR256X, VR256X, |
| 105692 | /* VAESENCZrm */ |
| 105693 | VR512, VR512, i512mem, |
| 105694 | /* VAESENCZrr */ |
| 105695 | VR512, VR512, VR512, |
| 105696 | /* VAESENCrm */ |
| 105697 | VR128, VR128, i128mem, |
| 105698 | /* VAESENCrr */ |
| 105699 | VR128, VR128, VR128, |
| 105700 | /* VAESIMCrm */ |
| 105701 | VR128, i128mem, |
| 105702 | /* VAESIMCrr */ |
| 105703 | VR128, VR128, |
| 105704 | /* VAESKEYGENASSIST128rm */ |
| 105705 | VR128, i128mem, u8imm, |
| 105706 | /* VAESKEYGENASSIST128rr */ |
| 105707 | VR128, VR128, u8imm, |
| 105708 | /* VALIGNDZ128rmbi */ |
| 105709 | VR128X, VR128X, i32mem, u8imm, |
| 105710 | /* VALIGNDZ128rmbik */ |
| 105711 | VR128X, VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 105712 | /* VALIGNDZ128rmbikz */ |
| 105713 | VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 105714 | /* VALIGNDZ128rmi */ |
| 105715 | VR128X, VR128X, i128mem, u8imm, |
| 105716 | /* VALIGNDZ128rmik */ |
| 105717 | VR128X, VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 105718 | /* VALIGNDZ128rmikz */ |
| 105719 | VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 105720 | /* VALIGNDZ128rri */ |
| 105721 | VR128X, VR128X, VR128X, u8imm, |
| 105722 | /* VALIGNDZ128rrik */ |
| 105723 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 105724 | /* VALIGNDZ128rrikz */ |
| 105725 | VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 105726 | /* VALIGNDZ256rmbi */ |
| 105727 | VR256X, VR256X, i32mem, u8imm, |
| 105728 | /* VALIGNDZ256rmbik */ |
| 105729 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 105730 | /* VALIGNDZ256rmbikz */ |
| 105731 | VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 105732 | /* VALIGNDZ256rmi */ |
| 105733 | VR256X, VR256X, i256mem, u8imm, |
| 105734 | /* VALIGNDZ256rmik */ |
| 105735 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 105736 | /* VALIGNDZ256rmikz */ |
| 105737 | VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 105738 | /* VALIGNDZ256rri */ |
| 105739 | VR256X, VR256X, VR256X, u8imm, |
| 105740 | /* VALIGNDZ256rrik */ |
| 105741 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 105742 | /* VALIGNDZ256rrikz */ |
| 105743 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 105744 | /* VALIGNDZrmbi */ |
| 105745 | VR512, VR512, i32mem, u8imm, |
| 105746 | /* VALIGNDZrmbik */ |
| 105747 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 105748 | /* VALIGNDZrmbikz */ |
| 105749 | VR512, VK16WM, VR512, i32mem, u8imm, |
| 105750 | /* VALIGNDZrmi */ |
| 105751 | VR512, VR512, i512mem, u8imm, |
| 105752 | /* VALIGNDZrmik */ |
| 105753 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 105754 | /* VALIGNDZrmikz */ |
| 105755 | VR512, VK16WM, VR512, i512mem, u8imm, |
| 105756 | /* VALIGNDZrri */ |
| 105757 | VR512, VR512, VR512, u8imm, |
| 105758 | /* VALIGNDZrrik */ |
| 105759 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 105760 | /* VALIGNDZrrikz */ |
| 105761 | VR512, VK16WM, VR512, VR512, u8imm, |
| 105762 | /* VALIGNQZ128rmbi */ |
| 105763 | VR128X, VR128X, i64mem, u8imm, |
| 105764 | /* VALIGNQZ128rmbik */ |
| 105765 | VR128X, VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 105766 | /* VALIGNQZ128rmbikz */ |
| 105767 | VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 105768 | /* VALIGNQZ128rmi */ |
| 105769 | VR128X, VR128X, i128mem, u8imm, |
| 105770 | /* VALIGNQZ128rmik */ |
| 105771 | VR128X, VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 105772 | /* VALIGNQZ128rmikz */ |
| 105773 | VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 105774 | /* VALIGNQZ128rri */ |
| 105775 | VR128X, VR128X, VR128X, u8imm, |
| 105776 | /* VALIGNQZ128rrik */ |
| 105777 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 105778 | /* VALIGNQZ128rrikz */ |
| 105779 | VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 105780 | /* VALIGNQZ256rmbi */ |
| 105781 | VR256X, VR256X, i64mem, u8imm, |
| 105782 | /* VALIGNQZ256rmbik */ |
| 105783 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 105784 | /* VALIGNQZ256rmbikz */ |
| 105785 | VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 105786 | /* VALIGNQZ256rmi */ |
| 105787 | VR256X, VR256X, i256mem, u8imm, |
| 105788 | /* VALIGNQZ256rmik */ |
| 105789 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 105790 | /* VALIGNQZ256rmikz */ |
| 105791 | VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 105792 | /* VALIGNQZ256rri */ |
| 105793 | VR256X, VR256X, VR256X, u8imm, |
| 105794 | /* VALIGNQZ256rrik */ |
| 105795 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 105796 | /* VALIGNQZ256rrikz */ |
| 105797 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 105798 | /* VALIGNQZrmbi */ |
| 105799 | VR512, VR512, i64mem, u8imm, |
| 105800 | /* VALIGNQZrmbik */ |
| 105801 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 105802 | /* VALIGNQZrmbikz */ |
| 105803 | VR512, VK8WM, VR512, i64mem, u8imm, |
| 105804 | /* VALIGNQZrmi */ |
| 105805 | VR512, VR512, i512mem, u8imm, |
| 105806 | /* VALIGNQZrmik */ |
| 105807 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 105808 | /* VALIGNQZrmikz */ |
| 105809 | VR512, VK8WM, VR512, i512mem, u8imm, |
| 105810 | /* VALIGNQZrri */ |
| 105811 | VR512, VR512, VR512, u8imm, |
| 105812 | /* VALIGNQZrrik */ |
| 105813 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 105814 | /* VALIGNQZrrikz */ |
| 105815 | VR512, VK8WM, VR512, VR512, u8imm, |
| 105816 | /* VANDNPDYrm */ |
| 105817 | VR256, VR256, f256mem, |
| 105818 | /* VANDNPDYrr */ |
| 105819 | VR256, VR256, VR256, |
| 105820 | /* VANDNPDZ128rm */ |
| 105821 | VR128X, VR128X, f128mem, |
| 105822 | /* VANDNPDZ128rmb */ |
| 105823 | VR128X, VR128X, f64mem, |
| 105824 | /* VANDNPDZ128rmbk */ |
| 105825 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 105826 | /* VANDNPDZ128rmbkz */ |
| 105827 | VR128X, VK2WM, VR128X, f64mem, |
| 105828 | /* VANDNPDZ128rmk */ |
| 105829 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 105830 | /* VANDNPDZ128rmkz */ |
| 105831 | VR128X, VK2WM, VR128X, f128mem, |
| 105832 | /* VANDNPDZ128rr */ |
| 105833 | VR128X, VR128X, VR128X, |
| 105834 | /* VANDNPDZ128rrk */ |
| 105835 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 105836 | /* VANDNPDZ128rrkz */ |
| 105837 | VR128X, VK2WM, VR128X, VR128X, |
| 105838 | /* VANDNPDZ256rm */ |
| 105839 | VR256X, VR256X, f256mem, |
| 105840 | /* VANDNPDZ256rmb */ |
| 105841 | VR256X, VR256X, f64mem, |
| 105842 | /* VANDNPDZ256rmbk */ |
| 105843 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 105844 | /* VANDNPDZ256rmbkz */ |
| 105845 | VR256X, VK4WM, VR256X, f64mem, |
| 105846 | /* VANDNPDZ256rmk */ |
| 105847 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 105848 | /* VANDNPDZ256rmkz */ |
| 105849 | VR256X, VK4WM, VR256X, f256mem, |
| 105850 | /* VANDNPDZ256rr */ |
| 105851 | VR256X, VR256X, VR256X, |
| 105852 | /* VANDNPDZ256rrk */ |
| 105853 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 105854 | /* VANDNPDZ256rrkz */ |
| 105855 | VR256X, VK4WM, VR256X, VR256X, |
| 105856 | /* VANDNPDZrm */ |
| 105857 | VR512, VR512, f512mem, |
| 105858 | /* VANDNPDZrmb */ |
| 105859 | VR512, VR512, f64mem, |
| 105860 | /* VANDNPDZrmbk */ |
| 105861 | VR512, VR512, VK8WM, VR512, f64mem, |
| 105862 | /* VANDNPDZrmbkz */ |
| 105863 | VR512, VK8WM, VR512, f64mem, |
| 105864 | /* VANDNPDZrmk */ |
| 105865 | VR512, VR512, VK8WM, VR512, f512mem, |
| 105866 | /* VANDNPDZrmkz */ |
| 105867 | VR512, VK8WM, VR512, f512mem, |
| 105868 | /* VANDNPDZrr */ |
| 105869 | VR512, VR512, VR512, |
| 105870 | /* VANDNPDZrrk */ |
| 105871 | VR512, VR512, VK8WM, VR512, VR512, |
| 105872 | /* VANDNPDZrrkz */ |
| 105873 | VR512, VK8WM, VR512, VR512, |
| 105874 | /* VANDNPDrm */ |
| 105875 | VR128, VR128, f128mem, |
| 105876 | /* VANDNPDrr */ |
| 105877 | VR128, VR128, VR128, |
| 105878 | /* VANDNPSYrm */ |
| 105879 | VR256, VR256, f256mem, |
| 105880 | /* VANDNPSYrr */ |
| 105881 | VR256, VR256, VR256, |
| 105882 | /* VANDNPSZ128rm */ |
| 105883 | VR128X, VR128X, f128mem, |
| 105884 | /* VANDNPSZ128rmb */ |
| 105885 | VR128X, VR128X, f32mem, |
| 105886 | /* VANDNPSZ128rmbk */ |
| 105887 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 105888 | /* VANDNPSZ128rmbkz */ |
| 105889 | VR128X, VK4WM, VR128X, f32mem, |
| 105890 | /* VANDNPSZ128rmk */ |
| 105891 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 105892 | /* VANDNPSZ128rmkz */ |
| 105893 | VR128X, VK4WM, VR128X, f128mem, |
| 105894 | /* VANDNPSZ128rr */ |
| 105895 | VR128X, VR128X, VR128X, |
| 105896 | /* VANDNPSZ128rrk */ |
| 105897 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 105898 | /* VANDNPSZ128rrkz */ |
| 105899 | VR128X, VK4WM, VR128X, VR128X, |
| 105900 | /* VANDNPSZ256rm */ |
| 105901 | VR256X, VR256X, f256mem, |
| 105902 | /* VANDNPSZ256rmb */ |
| 105903 | VR256X, VR256X, f32mem, |
| 105904 | /* VANDNPSZ256rmbk */ |
| 105905 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 105906 | /* VANDNPSZ256rmbkz */ |
| 105907 | VR256X, VK8WM, VR256X, f32mem, |
| 105908 | /* VANDNPSZ256rmk */ |
| 105909 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 105910 | /* VANDNPSZ256rmkz */ |
| 105911 | VR256X, VK8WM, VR256X, f256mem, |
| 105912 | /* VANDNPSZ256rr */ |
| 105913 | VR256X, VR256X, VR256X, |
| 105914 | /* VANDNPSZ256rrk */ |
| 105915 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 105916 | /* VANDNPSZ256rrkz */ |
| 105917 | VR256X, VK8WM, VR256X, VR256X, |
| 105918 | /* VANDNPSZrm */ |
| 105919 | VR512, VR512, f512mem, |
| 105920 | /* VANDNPSZrmb */ |
| 105921 | VR512, VR512, f32mem, |
| 105922 | /* VANDNPSZrmbk */ |
| 105923 | VR512, VR512, VK16WM, VR512, f32mem, |
| 105924 | /* VANDNPSZrmbkz */ |
| 105925 | VR512, VK16WM, VR512, f32mem, |
| 105926 | /* VANDNPSZrmk */ |
| 105927 | VR512, VR512, VK16WM, VR512, f512mem, |
| 105928 | /* VANDNPSZrmkz */ |
| 105929 | VR512, VK16WM, VR512, f512mem, |
| 105930 | /* VANDNPSZrr */ |
| 105931 | VR512, VR512, VR512, |
| 105932 | /* VANDNPSZrrk */ |
| 105933 | VR512, VR512, VK16WM, VR512, VR512, |
| 105934 | /* VANDNPSZrrkz */ |
| 105935 | VR512, VK16WM, VR512, VR512, |
| 105936 | /* VANDNPSrm */ |
| 105937 | VR128, VR128, f128mem, |
| 105938 | /* VANDNPSrr */ |
| 105939 | VR128, VR128, VR128, |
| 105940 | /* VANDPDYrm */ |
| 105941 | VR256, VR256, f256mem, |
| 105942 | /* VANDPDYrr */ |
| 105943 | VR256, VR256, VR256, |
| 105944 | /* VANDPDZ128rm */ |
| 105945 | VR128X, VR128X, f128mem, |
| 105946 | /* VANDPDZ128rmb */ |
| 105947 | VR128X, VR128X, f64mem, |
| 105948 | /* VANDPDZ128rmbk */ |
| 105949 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 105950 | /* VANDPDZ128rmbkz */ |
| 105951 | VR128X, VK2WM, VR128X, f64mem, |
| 105952 | /* VANDPDZ128rmk */ |
| 105953 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 105954 | /* VANDPDZ128rmkz */ |
| 105955 | VR128X, VK2WM, VR128X, f128mem, |
| 105956 | /* VANDPDZ128rr */ |
| 105957 | VR128X, VR128X, VR128X, |
| 105958 | /* VANDPDZ128rrk */ |
| 105959 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 105960 | /* VANDPDZ128rrkz */ |
| 105961 | VR128X, VK2WM, VR128X, VR128X, |
| 105962 | /* VANDPDZ256rm */ |
| 105963 | VR256X, VR256X, f256mem, |
| 105964 | /* VANDPDZ256rmb */ |
| 105965 | VR256X, VR256X, f64mem, |
| 105966 | /* VANDPDZ256rmbk */ |
| 105967 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 105968 | /* VANDPDZ256rmbkz */ |
| 105969 | VR256X, VK4WM, VR256X, f64mem, |
| 105970 | /* VANDPDZ256rmk */ |
| 105971 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 105972 | /* VANDPDZ256rmkz */ |
| 105973 | VR256X, VK4WM, VR256X, f256mem, |
| 105974 | /* VANDPDZ256rr */ |
| 105975 | VR256X, VR256X, VR256X, |
| 105976 | /* VANDPDZ256rrk */ |
| 105977 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 105978 | /* VANDPDZ256rrkz */ |
| 105979 | VR256X, VK4WM, VR256X, VR256X, |
| 105980 | /* VANDPDZrm */ |
| 105981 | VR512, VR512, f512mem, |
| 105982 | /* VANDPDZrmb */ |
| 105983 | VR512, VR512, f64mem, |
| 105984 | /* VANDPDZrmbk */ |
| 105985 | VR512, VR512, VK8WM, VR512, f64mem, |
| 105986 | /* VANDPDZrmbkz */ |
| 105987 | VR512, VK8WM, VR512, f64mem, |
| 105988 | /* VANDPDZrmk */ |
| 105989 | VR512, VR512, VK8WM, VR512, f512mem, |
| 105990 | /* VANDPDZrmkz */ |
| 105991 | VR512, VK8WM, VR512, f512mem, |
| 105992 | /* VANDPDZrr */ |
| 105993 | VR512, VR512, VR512, |
| 105994 | /* VANDPDZrrk */ |
| 105995 | VR512, VR512, VK8WM, VR512, VR512, |
| 105996 | /* VANDPDZrrkz */ |
| 105997 | VR512, VK8WM, VR512, VR512, |
| 105998 | /* VANDPDrm */ |
| 105999 | VR128, VR128, f128mem, |
| 106000 | /* VANDPDrr */ |
| 106001 | VR128, VR128, VR128, |
| 106002 | /* VANDPSYrm */ |
| 106003 | VR256, VR256, f256mem, |
| 106004 | /* VANDPSYrr */ |
| 106005 | VR256, VR256, VR256, |
| 106006 | /* VANDPSZ128rm */ |
| 106007 | VR128X, VR128X, f128mem, |
| 106008 | /* VANDPSZ128rmb */ |
| 106009 | VR128X, VR128X, f32mem, |
| 106010 | /* VANDPSZ128rmbk */ |
| 106011 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 106012 | /* VANDPSZ128rmbkz */ |
| 106013 | VR128X, VK4WM, VR128X, f32mem, |
| 106014 | /* VANDPSZ128rmk */ |
| 106015 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 106016 | /* VANDPSZ128rmkz */ |
| 106017 | VR128X, VK4WM, VR128X, f128mem, |
| 106018 | /* VANDPSZ128rr */ |
| 106019 | VR128X, VR128X, VR128X, |
| 106020 | /* VANDPSZ128rrk */ |
| 106021 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 106022 | /* VANDPSZ128rrkz */ |
| 106023 | VR128X, VK4WM, VR128X, VR128X, |
| 106024 | /* VANDPSZ256rm */ |
| 106025 | VR256X, VR256X, f256mem, |
| 106026 | /* VANDPSZ256rmb */ |
| 106027 | VR256X, VR256X, f32mem, |
| 106028 | /* VANDPSZ256rmbk */ |
| 106029 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 106030 | /* VANDPSZ256rmbkz */ |
| 106031 | VR256X, VK8WM, VR256X, f32mem, |
| 106032 | /* VANDPSZ256rmk */ |
| 106033 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 106034 | /* VANDPSZ256rmkz */ |
| 106035 | VR256X, VK8WM, VR256X, f256mem, |
| 106036 | /* VANDPSZ256rr */ |
| 106037 | VR256X, VR256X, VR256X, |
| 106038 | /* VANDPSZ256rrk */ |
| 106039 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 106040 | /* VANDPSZ256rrkz */ |
| 106041 | VR256X, VK8WM, VR256X, VR256X, |
| 106042 | /* VANDPSZrm */ |
| 106043 | VR512, VR512, f512mem, |
| 106044 | /* VANDPSZrmb */ |
| 106045 | VR512, VR512, f32mem, |
| 106046 | /* VANDPSZrmbk */ |
| 106047 | VR512, VR512, VK16WM, VR512, f32mem, |
| 106048 | /* VANDPSZrmbkz */ |
| 106049 | VR512, VK16WM, VR512, f32mem, |
| 106050 | /* VANDPSZrmk */ |
| 106051 | VR512, VR512, VK16WM, VR512, f512mem, |
| 106052 | /* VANDPSZrmkz */ |
| 106053 | VR512, VK16WM, VR512, f512mem, |
| 106054 | /* VANDPSZrr */ |
| 106055 | VR512, VR512, VR512, |
| 106056 | /* VANDPSZrrk */ |
| 106057 | VR512, VR512, VK16WM, VR512, VR512, |
| 106058 | /* VANDPSZrrkz */ |
| 106059 | VR512, VK16WM, VR512, VR512, |
| 106060 | /* VANDPSrm */ |
| 106061 | VR128, VR128, f128mem, |
| 106062 | /* VANDPSrr */ |
| 106063 | VR128, VR128, VR128, |
| 106064 | /* VASTART_SAVE_XMM_REGS */ |
| 106065 | GR8, i8mem, |
| 106066 | /* VBCSTNEBF162PSYrm */ |
| 106067 | VR256, f16mem, |
| 106068 | /* VBCSTNEBF162PSrm */ |
| 106069 | VR128, f16mem, |
| 106070 | /* VBCSTNESH2PSYrm */ |
| 106071 | VR256, f16mem, |
| 106072 | /* VBCSTNESH2PSrm */ |
| 106073 | VR128, f16mem, |
| 106074 | /* VBLENDMPDZ128rm */ |
| 106075 | VR128X, VR128X, f128mem, |
| 106076 | /* VBLENDMPDZ128rmb */ |
| 106077 | VR128X, VR128X, f64mem, |
| 106078 | /* VBLENDMPDZ128rmbk */ |
| 106079 | VR128X, VK2WM, VR128X, f64mem, |
| 106080 | /* VBLENDMPDZ128rmbkz */ |
| 106081 | VR128X, VK2WM, VR128X, f64mem, |
| 106082 | /* VBLENDMPDZ128rmk */ |
| 106083 | VR128X, VK2WM, VR128X, f128mem, |
| 106084 | /* VBLENDMPDZ128rmkz */ |
| 106085 | VR128X, VK2WM, VR128X, f128mem, |
| 106086 | /* VBLENDMPDZ128rr */ |
| 106087 | VR128X, VR128X, VR128X, |
| 106088 | /* VBLENDMPDZ128rrk */ |
| 106089 | VR128X, VK2WM, VR128X, VR128X, |
| 106090 | /* VBLENDMPDZ128rrkz */ |
| 106091 | VR128X, VK2WM, VR128X, VR128X, |
| 106092 | /* VBLENDMPDZ256rm */ |
| 106093 | VR256X, VR256X, f256mem, |
| 106094 | /* VBLENDMPDZ256rmb */ |
| 106095 | VR256X, VR256X, f64mem, |
| 106096 | /* VBLENDMPDZ256rmbk */ |
| 106097 | VR256X, VK4WM, VR256X, f64mem, |
| 106098 | /* VBLENDMPDZ256rmbkz */ |
| 106099 | VR256X, VK4WM, VR256X, f64mem, |
| 106100 | /* VBLENDMPDZ256rmk */ |
| 106101 | VR256X, VK4WM, VR256X, f256mem, |
| 106102 | /* VBLENDMPDZ256rmkz */ |
| 106103 | VR256X, VK4WM, VR256X, f256mem, |
| 106104 | /* VBLENDMPDZ256rr */ |
| 106105 | VR256X, VR256X, VR256X, |
| 106106 | /* VBLENDMPDZ256rrk */ |
| 106107 | VR256X, VK4WM, VR256X, VR256X, |
| 106108 | /* VBLENDMPDZ256rrkz */ |
| 106109 | VR256X, VK4WM, VR256X, VR256X, |
| 106110 | /* VBLENDMPDZrm */ |
| 106111 | VR512, VR512, f512mem, |
| 106112 | /* VBLENDMPDZrmb */ |
| 106113 | VR512, VR512, f64mem, |
| 106114 | /* VBLENDMPDZrmbk */ |
| 106115 | VR512, VK8WM, VR512, f64mem, |
| 106116 | /* VBLENDMPDZrmbkz */ |
| 106117 | VR512, VK8WM, VR512, f64mem, |
| 106118 | /* VBLENDMPDZrmk */ |
| 106119 | VR512, VK8WM, VR512, f512mem, |
| 106120 | /* VBLENDMPDZrmkz */ |
| 106121 | VR512, VK8WM, VR512, f512mem, |
| 106122 | /* VBLENDMPDZrr */ |
| 106123 | VR512, VR512, VR512, |
| 106124 | /* VBLENDMPDZrrk */ |
| 106125 | VR512, VK8WM, VR512, VR512, |
| 106126 | /* VBLENDMPDZrrkz */ |
| 106127 | VR512, VK8WM, VR512, VR512, |
| 106128 | /* VBLENDMPSZ128rm */ |
| 106129 | VR128X, VR128X, f128mem, |
| 106130 | /* VBLENDMPSZ128rmb */ |
| 106131 | VR128X, VR128X, f32mem, |
| 106132 | /* VBLENDMPSZ128rmbk */ |
| 106133 | VR128X, VK4WM, VR128X, f32mem, |
| 106134 | /* VBLENDMPSZ128rmbkz */ |
| 106135 | VR128X, VK4WM, VR128X, f32mem, |
| 106136 | /* VBLENDMPSZ128rmk */ |
| 106137 | VR128X, VK4WM, VR128X, f128mem, |
| 106138 | /* VBLENDMPSZ128rmkz */ |
| 106139 | VR128X, VK4WM, VR128X, f128mem, |
| 106140 | /* VBLENDMPSZ128rr */ |
| 106141 | VR128X, VR128X, VR128X, |
| 106142 | /* VBLENDMPSZ128rrk */ |
| 106143 | VR128X, VK4WM, VR128X, VR128X, |
| 106144 | /* VBLENDMPSZ128rrkz */ |
| 106145 | VR128X, VK4WM, VR128X, VR128X, |
| 106146 | /* VBLENDMPSZ256rm */ |
| 106147 | VR256X, VR256X, f256mem, |
| 106148 | /* VBLENDMPSZ256rmb */ |
| 106149 | VR256X, VR256X, f32mem, |
| 106150 | /* VBLENDMPSZ256rmbk */ |
| 106151 | VR256X, VK8WM, VR256X, f32mem, |
| 106152 | /* VBLENDMPSZ256rmbkz */ |
| 106153 | VR256X, VK8WM, VR256X, f32mem, |
| 106154 | /* VBLENDMPSZ256rmk */ |
| 106155 | VR256X, VK8WM, VR256X, f256mem, |
| 106156 | /* VBLENDMPSZ256rmkz */ |
| 106157 | VR256X, VK8WM, VR256X, f256mem, |
| 106158 | /* VBLENDMPSZ256rr */ |
| 106159 | VR256X, VR256X, VR256X, |
| 106160 | /* VBLENDMPSZ256rrk */ |
| 106161 | VR256X, VK8WM, VR256X, VR256X, |
| 106162 | /* VBLENDMPSZ256rrkz */ |
| 106163 | VR256X, VK8WM, VR256X, VR256X, |
| 106164 | /* VBLENDMPSZrm */ |
| 106165 | VR512, VR512, f512mem, |
| 106166 | /* VBLENDMPSZrmb */ |
| 106167 | VR512, VR512, f32mem, |
| 106168 | /* VBLENDMPSZrmbk */ |
| 106169 | VR512, VK16WM, VR512, f32mem, |
| 106170 | /* VBLENDMPSZrmbkz */ |
| 106171 | VR512, VK16WM, VR512, f32mem, |
| 106172 | /* VBLENDMPSZrmk */ |
| 106173 | VR512, VK16WM, VR512, f512mem, |
| 106174 | /* VBLENDMPSZrmkz */ |
| 106175 | VR512, VK16WM, VR512, f512mem, |
| 106176 | /* VBLENDMPSZrr */ |
| 106177 | VR512, VR512, VR512, |
| 106178 | /* VBLENDMPSZrrk */ |
| 106179 | VR512, VK16WM, VR512, VR512, |
| 106180 | /* VBLENDMPSZrrkz */ |
| 106181 | VR512, VK16WM, VR512, VR512, |
| 106182 | /* VBLENDPDYrmi */ |
| 106183 | VR256, VR256, f256mem, u8imm, |
| 106184 | /* VBLENDPDYrri */ |
| 106185 | VR256, VR256, VR256, u8imm, |
| 106186 | /* VBLENDPDrmi */ |
| 106187 | VR128, VR128, f128mem, u8imm, |
| 106188 | /* VBLENDPDrri */ |
| 106189 | VR128, VR128, VR128, u8imm, |
| 106190 | /* VBLENDPSYrmi */ |
| 106191 | VR256, VR256, f256mem, u8imm, |
| 106192 | /* VBLENDPSYrri */ |
| 106193 | VR256, VR256, VR256, u8imm, |
| 106194 | /* VBLENDPSrmi */ |
| 106195 | VR128, VR128, f128mem, u8imm, |
| 106196 | /* VBLENDPSrri */ |
| 106197 | VR128, VR128, VR128, u8imm, |
| 106198 | /* VBLENDVPDYrmr */ |
| 106199 | VR256, VR256, f256mem, VR256, |
| 106200 | /* VBLENDVPDYrrr */ |
| 106201 | VR256, VR256, VR256, VR256, |
| 106202 | /* VBLENDVPDrmr */ |
| 106203 | VR128, VR128, f128mem, VR128, |
| 106204 | /* VBLENDVPDrrr */ |
| 106205 | VR128, VR128, VR128, VR128, |
| 106206 | /* VBLENDVPSYrmr */ |
| 106207 | VR256, VR256, f256mem, VR256, |
| 106208 | /* VBLENDVPSYrrr */ |
| 106209 | VR256, VR256, VR256, VR256, |
| 106210 | /* VBLENDVPSrmr */ |
| 106211 | VR128, VR128, f128mem, VR128, |
| 106212 | /* VBLENDVPSrrr */ |
| 106213 | VR128, VR128, VR128, VR128, |
| 106214 | /* VBROADCASTF128rm */ |
| 106215 | VR256, f128mem, |
| 106216 | /* VBROADCASTF32X2Z256rm */ |
| 106217 | VR256X, f64mem, |
| 106218 | /* VBROADCASTF32X2Z256rmk */ |
| 106219 | VR256X, VR256X, VK8WM, f64mem, |
| 106220 | /* VBROADCASTF32X2Z256rmkz */ |
| 106221 | VR256X, VK8WM, f64mem, |
| 106222 | /* VBROADCASTF32X2Z256rr */ |
| 106223 | VR256X, VR128X, |
| 106224 | /* VBROADCASTF32X2Z256rrk */ |
| 106225 | VR256X, VR256X, VK8WM, VR128X, |
| 106226 | /* VBROADCASTF32X2Z256rrkz */ |
| 106227 | VR256X, VK8WM, VR128X, |
| 106228 | /* VBROADCASTF32X2Zrm */ |
| 106229 | VR512, f64mem, |
| 106230 | /* VBROADCASTF32X2Zrmk */ |
| 106231 | VR512, VR512, VK16WM, f64mem, |
| 106232 | /* VBROADCASTF32X2Zrmkz */ |
| 106233 | VR512, VK16WM, f64mem, |
| 106234 | /* VBROADCASTF32X2Zrr */ |
| 106235 | VR512, VR128X, |
| 106236 | /* VBROADCASTF32X2Zrrk */ |
| 106237 | VR512, VR512, VK16WM, VR128X, |
| 106238 | /* VBROADCASTF32X2Zrrkz */ |
| 106239 | VR512, VK16WM, VR128X, |
| 106240 | /* VBROADCASTF32X4Z256rm */ |
| 106241 | VR256X, f128mem, |
| 106242 | /* VBROADCASTF32X4Z256rmk */ |
| 106243 | VR256X, VR256X, VK8WM, f128mem, |
| 106244 | /* VBROADCASTF32X4Z256rmkz */ |
| 106245 | VR256X, VK8WM, f128mem, |
| 106246 | /* VBROADCASTF32X4Zrm */ |
| 106247 | VR512, f128mem, |
| 106248 | /* VBROADCASTF32X4Zrmk */ |
| 106249 | VR512, VR512, VK16WM, f128mem, |
| 106250 | /* VBROADCASTF32X4Zrmkz */ |
| 106251 | VR512, VK16WM, f128mem, |
| 106252 | /* VBROADCASTF32X8Zrm */ |
| 106253 | VR512, f256mem, |
| 106254 | /* VBROADCASTF32X8Zrmk */ |
| 106255 | VR512, VR512, VK16WM, f256mem, |
| 106256 | /* VBROADCASTF32X8Zrmkz */ |
| 106257 | VR512, VK16WM, f256mem, |
| 106258 | /* VBROADCASTF64X2Z256rm */ |
| 106259 | VR256X, f128mem, |
| 106260 | /* VBROADCASTF64X2Z256rmk */ |
| 106261 | VR256X, VR256X, VK4WM, f128mem, |
| 106262 | /* VBROADCASTF64X2Z256rmkz */ |
| 106263 | VR256X, VK4WM, f128mem, |
| 106264 | /* VBROADCASTF64X2Zrm */ |
| 106265 | VR512, f128mem, |
| 106266 | /* VBROADCASTF64X2Zrmk */ |
| 106267 | VR512, VR512, VK8WM, f128mem, |
| 106268 | /* VBROADCASTF64X2Zrmkz */ |
| 106269 | VR512, VK8WM, f128mem, |
| 106270 | /* VBROADCASTF64X4Zrm */ |
| 106271 | VR512, f256mem, |
| 106272 | /* VBROADCASTF64X4Zrmk */ |
| 106273 | VR512, VR512, VK8WM, f256mem, |
| 106274 | /* VBROADCASTF64X4Zrmkz */ |
| 106275 | VR512, VK8WM, f256mem, |
| 106276 | /* VBROADCASTI128rm */ |
| 106277 | VR256, i128mem, |
| 106278 | /* VBROADCASTI32X2Z128rm */ |
| 106279 | VR128X, i64mem, |
| 106280 | /* VBROADCASTI32X2Z128rmk */ |
| 106281 | VR128X, VR128X, VK4WM, i64mem, |
| 106282 | /* VBROADCASTI32X2Z128rmkz */ |
| 106283 | VR128X, VK4WM, i64mem, |
| 106284 | /* VBROADCASTI32X2Z128rr */ |
| 106285 | VR128X, VR128X, |
| 106286 | /* VBROADCASTI32X2Z128rrk */ |
| 106287 | VR128X, VR128X, VK4WM, VR128X, |
| 106288 | /* VBROADCASTI32X2Z128rrkz */ |
| 106289 | VR128X, VK4WM, VR128X, |
| 106290 | /* VBROADCASTI32X2Z256rm */ |
| 106291 | VR256X, i64mem, |
| 106292 | /* VBROADCASTI32X2Z256rmk */ |
| 106293 | VR256X, VR256X, VK8WM, i64mem, |
| 106294 | /* VBROADCASTI32X2Z256rmkz */ |
| 106295 | VR256X, VK8WM, i64mem, |
| 106296 | /* VBROADCASTI32X2Z256rr */ |
| 106297 | VR256X, VR128X, |
| 106298 | /* VBROADCASTI32X2Z256rrk */ |
| 106299 | VR256X, VR256X, VK8WM, VR128X, |
| 106300 | /* VBROADCASTI32X2Z256rrkz */ |
| 106301 | VR256X, VK8WM, VR128X, |
| 106302 | /* VBROADCASTI32X2Zrm */ |
| 106303 | VR512, i64mem, |
| 106304 | /* VBROADCASTI32X2Zrmk */ |
| 106305 | VR512, VR512, VK16WM, i64mem, |
| 106306 | /* VBROADCASTI32X2Zrmkz */ |
| 106307 | VR512, VK16WM, i64mem, |
| 106308 | /* VBROADCASTI32X2Zrr */ |
| 106309 | VR512, VR128X, |
| 106310 | /* VBROADCASTI32X2Zrrk */ |
| 106311 | VR512, VR512, VK16WM, VR128X, |
| 106312 | /* VBROADCASTI32X2Zrrkz */ |
| 106313 | VR512, VK16WM, VR128X, |
| 106314 | /* VBROADCASTI32X4Z256rm */ |
| 106315 | VR256X, i128mem, |
| 106316 | /* VBROADCASTI32X4Z256rmk */ |
| 106317 | VR256X, VR256X, VK8WM, i128mem, |
| 106318 | /* VBROADCASTI32X4Z256rmkz */ |
| 106319 | VR256X, VK8WM, i128mem, |
| 106320 | /* VBROADCASTI32X4Zrm */ |
| 106321 | VR512, i128mem, |
| 106322 | /* VBROADCASTI32X4Zrmk */ |
| 106323 | VR512, VR512, VK16WM, i128mem, |
| 106324 | /* VBROADCASTI32X4Zrmkz */ |
| 106325 | VR512, VK16WM, i128mem, |
| 106326 | /* VBROADCASTI32X8Zrm */ |
| 106327 | VR512, i256mem, |
| 106328 | /* VBROADCASTI32X8Zrmk */ |
| 106329 | VR512, VR512, VK16WM, i256mem, |
| 106330 | /* VBROADCASTI32X8Zrmkz */ |
| 106331 | VR512, VK16WM, i256mem, |
| 106332 | /* VBROADCASTI64X2Z256rm */ |
| 106333 | VR256X, i128mem, |
| 106334 | /* VBROADCASTI64X2Z256rmk */ |
| 106335 | VR256X, VR256X, VK4WM, i128mem, |
| 106336 | /* VBROADCASTI64X2Z256rmkz */ |
| 106337 | VR256X, VK4WM, i128mem, |
| 106338 | /* VBROADCASTI64X2Zrm */ |
| 106339 | VR512, i128mem, |
| 106340 | /* VBROADCASTI64X2Zrmk */ |
| 106341 | VR512, VR512, VK8WM, i128mem, |
| 106342 | /* VBROADCASTI64X2Zrmkz */ |
| 106343 | VR512, VK8WM, i128mem, |
| 106344 | /* VBROADCASTI64X4Zrm */ |
| 106345 | VR512, i256mem, |
| 106346 | /* VBROADCASTI64X4Zrmk */ |
| 106347 | VR512, VR512, VK8WM, i256mem, |
| 106348 | /* VBROADCASTI64X4Zrmkz */ |
| 106349 | VR512, VK8WM, i256mem, |
| 106350 | /* VBROADCASTSDYrm */ |
| 106351 | VR256, f64mem, |
| 106352 | /* VBROADCASTSDYrr */ |
| 106353 | VR256, VR128, |
| 106354 | /* VBROADCASTSDZ256rm */ |
| 106355 | VR256X, f64mem, |
| 106356 | /* VBROADCASTSDZ256rmk */ |
| 106357 | VR256X, VR256X, VK4WM, f64mem, |
| 106358 | /* VBROADCASTSDZ256rmkz */ |
| 106359 | VR256X, VK4WM, f64mem, |
| 106360 | /* VBROADCASTSDZ256rr */ |
| 106361 | VR256X, VR128X, |
| 106362 | /* VBROADCASTSDZ256rrk */ |
| 106363 | VR256X, VR256X, VK4WM, VR128X, |
| 106364 | /* VBROADCASTSDZ256rrkz */ |
| 106365 | VR256X, VK4WM, VR128X, |
| 106366 | /* VBROADCASTSDZrm */ |
| 106367 | VR512, f64mem, |
| 106368 | /* VBROADCASTSDZrmk */ |
| 106369 | VR512, VR512, VK8WM, f64mem, |
| 106370 | /* VBROADCASTSDZrmkz */ |
| 106371 | VR512, VK8WM, f64mem, |
| 106372 | /* VBROADCASTSDZrr */ |
| 106373 | VR512, VR128X, |
| 106374 | /* VBROADCASTSDZrrk */ |
| 106375 | VR512, VR512, VK8WM, VR128X, |
| 106376 | /* VBROADCASTSDZrrkz */ |
| 106377 | VR512, VK8WM, VR128X, |
| 106378 | /* VBROADCASTSSYrm */ |
| 106379 | VR256, f32mem, |
| 106380 | /* VBROADCASTSSYrr */ |
| 106381 | VR256, VR128, |
| 106382 | /* VBROADCASTSSZ128rm */ |
| 106383 | VR128X, f32mem, |
| 106384 | /* VBROADCASTSSZ128rmk */ |
| 106385 | VR128X, VR128X, VK4WM, f32mem, |
| 106386 | /* VBROADCASTSSZ128rmkz */ |
| 106387 | VR128X, VK4WM, f32mem, |
| 106388 | /* VBROADCASTSSZ128rr */ |
| 106389 | VR128X, VR128X, |
| 106390 | /* VBROADCASTSSZ128rrk */ |
| 106391 | VR128X, VR128X, VK4WM, VR128X, |
| 106392 | /* VBROADCASTSSZ128rrkz */ |
| 106393 | VR128X, VK4WM, VR128X, |
| 106394 | /* VBROADCASTSSZ256rm */ |
| 106395 | VR256X, f32mem, |
| 106396 | /* VBROADCASTSSZ256rmk */ |
| 106397 | VR256X, VR256X, VK8WM, f32mem, |
| 106398 | /* VBROADCASTSSZ256rmkz */ |
| 106399 | VR256X, VK8WM, f32mem, |
| 106400 | /* VBROADCASTSSZ256rr */ |
| 106401 | VR256X, VR128X, |
| 106402 | /* VBROADCASTSSZ256rrk */ |
| 106403 | VR256X, VR256X, VK8WM, VR128X, |
| 106404 | /* VBROADCASTSSZ256rrkz */ |
| 106405 | VR256X, VK8WM, VR128X, |
| 106406 | /* VBROADCASTSSZrm */ |
| 106407 | VR512, f32mem, |
| 106408 | /* VBROADCASTSSZrmk */ |
| 106409 | VR512, VR512, VK16WM, f32mem, |
| 106410 | /* VBROADCASTSSZrmkz */ |
| 106411 | VR512, VK16WM, f32mem, |
| 106412 | /* VBROADCASTSSZrr */ |
| 106413 | VR512, VR128X, |
| 106414 | /* VBROADCASTSSZrrk */ |
| 106415 | VR512, VR512, VK16WM, VR128X, |
| 106416 | /* VBROADCASTSSZrrkz */ |
| 106417 | VR512, VK16WM, VR128X, |
| 106418 | /* VBROADCASTSSrm */ |
| 106419 | VR128, f32mem, |
| 106420 | /* VBROADCASTSSrr */ |
| 106421 | VR128, VR128, |
| 106422 | /* VCMPBF16Z128rmbi */ |
| 106423 | VK8, VR128X, f16mem, u8imm, |
| 106424 | /* VCMPBF16Z128rmbik */ |
| 106425 | VK8, VK8WM, VR128X, f16mem, u8imm, |
| 106426 | /* VCMPBF16Z128rmi */ |
| 106427 | VK8, VR128X, f128mem, u8imm, |
| 106428 | /* VCMPBF16Z128rmik */ |
| 106429 | VK8, VK8WM, VR128X, f128mem, u8imm, |
| 106430 | /* VCMPBF16Z128rri */ |
| 106431 | VK8, VR128X, VR128X, u8imm, |
| 106432 | /* VCMPBF16Z128rrik */ |
| 106433 | VK8, VK8WM, VR128X, VR128X, u8imm, |
| 106434 | /* VCMPBF16Z256rmbi */ |
| 106435 | VK16, VR256X, f16mem, u8imm, |
| 106436 | /* VCMPBF16Z256rmbik */ |
| 106437 | VK16, VK16WM, VR256X, f16mem, u8imm, |
| 106438 | /* VCMPBF16Z256rmi */ |
| 106439 | VK16, VR256X, f256mem, u8imm, |
| 106440 | /* VCMPBF16Z256rmik */ |
| 106441 | VK16, VK16WM, VR256X, f256mem, u8imm, |
| 106442 | /* VCMPBF16Z256rri */ |
| 106443 | VK16, VR256X, VR256X, u8imm, |
| 106444 | /* VCMPBF16Z256rrik */ |
| 106445 | VK16, VK16WM, VR256X, VR256X, u8imm, |
| 106446 | /* VCMPBF16Zrmbi */ |
| 106447 | VK32, VR512, f16mem, u8imm, |
| 106448 | /* VCMPBF16Zrmbik */ |
| 106449 | VK32, VK32WM, VR512, f16mem, u8imm, |
| 106450 | /* VCMPBF16Zrmi */ |
| 106451 | VK32, VR512, f512mem, u8imm, |
| 106452 | /* VCMPBF16Zrmik */ |
| 106453 | VK32, VK32WM, VR512, f512mem, u8imm, |
| 106454 | /* VCMPBF16Zrri */ |
| 106455 | VK32, VR512, VR512, u8imm, |
| 106456 | /* VCMPBF16Zrrik */ |
| 106457 | VK32, VK32WM, VR512, VR512, u8imm, |
| 106458 | /* VCMPPDYrmi */ |
| 106459 | VR256, VR256, f256mem, u8imm, |
| 106460 | /* VCMPPDYrri */ |
| 106461 | VR256, VR256, VR256, u8imm, |
| 106462 | /* VCMPPDZ128rmbi */ |
| 106463 | VK2, VR128X, f64mem, u8imm, |
| 106464 | /* VCMPPDZ128rmbik */ |
| 106465 | VK2, VK2WM, VR128X, f64mem, u8imm, |
| 106466 | /* VCMPPDZ128rmi */ |
| 106467 | VK2, VR128X, f128mem, u8imm, |
| 106468 | /* VCMPPDZ128rmik */ |
| 106469 | VK2, VK2WM, VR128X, f128mem, u8imm, |
| 106470 | /* VCMPPDZ128rri */ |
| 106471 | VK2, VR128X, VR128X, u8imm, |
| 106472 | /* VCMPPDZ128rrik */ |
| 106473 | VK2, VK2WM, VR128X, VR128X, u8imm, |
| 106474 | /* VCMPPDZ256rmbi */ |
| 106475 | VK4, VR256X, f64mem, u8imm, |
| 106476 | /* VCMPPDZ256rmbik */ |
| 106477 | VK4, VK4WM, VR256X, f64mem, u8imm, |
| 106478 | /* VCMPPDZ256rmi */ |
| 106479 | VK4, VR256X, f256mem, u8imm, |
| 106480 | /* VCMPPDZ256rmik */ |
| 106481 | VK4, VK4WM, VR256X, f256mem, u8imm, |
| 106482 | /* VCMPPDZ256rri */ |
| 106483 | VK4, VR256X, VR256X, u8imm, |
| 106484 | /* VCMPPDZ256rrik */ |
| 106485 | VK4, VK4WM, VR256X, VR256X, u8imm, |
| 106486 | /* VCMPPDZrmbi */ |
| 106487 | VK8, VR512, f64mem, u8imm, |
| 106488 | /* VCMPPDZrmbik */ |
| 106489 | VK8, VK8WM, VR512, f64mem, u8imm, |
| 106490 | /* VCMPPDZrmi */ |
| 106491 | VK8, VR512, f512mem, u8imm, |
| 106492 | /* VCMPPDZrmik */ |
| 106493 | VK8, VK8WM, VR512, f512mem, u8imm, |
| 106494 | /* VCMPPDZrri */ |
| 106495 | VK8, VR512, VR512, u8imm, |
| 106496 | /* VCMPPDZrrib */ |
| 106497 | VK8, VR512, VR512, u8imm, |
| 106498 | /* VCMPPDZrribk */ |
| 106499 | VK8, VK8WM, VR512, VR512, u8imm, |
| 106500 | /* VCMPPDZrrik */ |
| 106501 | VK8, VK8WM, VR512, VR512, u8imm, |
| 106502 | /* VCMPPDrmi */ |
| 106503 | VR128, VR128, f128mem, u8imm, |
| 106504 | /* VCMPPDrri */ |
| 106505 | VR128, VR128, VR128, u8imm, |
| 106506 | /* VCMPPHZ128rmbi */ |
| 106507 | VK8, VR128X, f16mem, u8imm, |
| 106508 | /* VCMPPHZ128rmbik */ |
| 106509 | VK8, VK8WM, VR128X, f16mem, u8imm, |
| 106510 | /* VCMPPHZ128rmi */ |
| 106511 | VK8, VR128X, f128mem, u8imm, |
| 106512 | /* VCMPPHZ128rmik */ |
| 106513 | VK8, VK8WM, VR128X, f128mem, u8imm, |
| 106514 | /* VCMPPHZ128rri */ |
| 106515 | VK8, VR128X, VR128X, u8imm, |
| 106516 | /* VCMPPHZ128rrik */ |
| 106517 | VK8, VK8WM, VR128X, VR128X, u8imm, |
| 106518 | /* VCMPPHZ256rmbi */ |
| 106519 | VK16, VR256X, f16mem, u8imm, |
| 106520 | /* VCMPPHZ256rmbik */ |
| 106521 | VK16, VK16WM, VR256X, f16mem, u8imm, |
| 106522 | /* VCMPPHZ256rmi */ |
| 106523 | VK16, VR256X, f256mem, u8imm, |
| 106524 | /* VCMPPHZ256rmik */ |
| 106525 | VK16, VK16WM, VR256X, f256mem, u8imm, |
| 106526 | /* VCMPPHZ256rri */ |
| 106527 | VK16, VR256X, VR256X, u8imm, |
| 106528 | /* VCMPPHZ256rrik */ |
| 106529 | VK16, VK16WM, VR256X, VR256X, u8imm, |
| 106530 | /* VCMPPHZrmbi */ |
| 106531 | VK32, VR512, f16mem, u8imm, |
| 106532 | /* VCMPPHZrmbik */ |
| 106533 | VK32, VK32WM, VR512, f16mem, u8imm, |
| 106534 | /* VCMPPHZrmi */ |
| 106535 | VK32, VR512, f512mem, u8imm, |
| 106536 | /* VCMPPHZrmik */ |
| 106537 | VK32, VK32WM, VR512, f512mem, u8imm, |
| 106538 | /* VCMPPHZrri */ |
| 106539 | VK32, VR512, VR512, u8imm, |
| 106540 | /* VCMPPHZrrib */ |
| 106541 | VK32, VR512, VR512, u8imm, |
| 106542 | /* VCMPPHZrribk */ |
| 106543 | VK32, VK32WM, VR512, VR512, u8imm, |
| 106544 | /* VCMPPHZrrik */ |
| 106545 | VK32, VK32WM, VR512, VR512, u8imm, |
| 106546 | /* VCMPPSYrmi */ |
| 106547 | VR256, VR256, f256mem, u8imm, |
| 106548 | /* VCMPPSYrri */ |
| 106549 | VR256, VR256, VR256, u8imm, |
| 106550 | /* VCMPPSZ128rmbi */ |
| 106551 | VK4, VR128X, f32mem, u8imm, |
| 106552 | /* VCMPPSZ128rmbik */ |
| 106553 | VK4, VK4WM, VR128X, f32mem, u8imm, |
| 106554 | /* VCMPPSZ128rmi */ |
| 106555 | VK4, VR128X, f128mem, u8imm, |
| 106556 | /* VCMPPSZ128rmik */ |
| 106557 | VK4, VK4WM, VR128X, f128mem, u8imm, |
| 106558 | /* VCMPPSZ128rri */ |
| 106559 | VK4, VR128X, VR128X, u8imm, |
| 106560 | /* VCMPPSZ128rrik */ |
| 106561 | VK4, VK4WM, VR128X, VR128X, u8imm, |
| 106562 | /* VCMPPSZ256rmbi */ |
| 106563 | VK8, VR256X, f32mem, u8imm, |
| 106564 | /* VCMPPSZ256rmbik */ |
| 106565 | VK8, VK8WM, VR256X, f32mem, u8imm, |
| 106566 | /* VCMPPSZ256rmi */ |
| 106567 | VK8, VR256X, f256mem, u8imm, |
| 106568 | /* VCMPPSZ256rmik */ |
| 106569 | VK8, VK8WM, VR256X, f256mem, u8imm, |
| 106570 | /* VCMPPSZ256rri */ |
| 106571 | VK8, VR256X, VR256X, u8imm, |
| 106572 | /* VCMPPSZ256rrik */ |
| 106573 | VK8, VK8WM, VR256X, VR256X, u8imm, |
| 106574 | /* VCMPPSZrmbi */ |
| 106575 | VK16, VR512, f32mem, u8imm, |
| 106576 | /* VCMPPSZrmbik */ |
| 106577 | VK16, VK16WM, VR512, f32mem, u8imm, |
| 106578 | /* VCMPPSZrmi */ |
| 106579 | VK16, VR512, f512mem, u8imm, |
| 106580 | /* VCMPPSZrmik */ |
| 106581 | VK16, VK16WM, VR512, f512mem, u8imm, |
| 106582 | /* VCMPPSZrri */ |
| 106583 | VK16, VR512, VR512, u8imm, |
| 106584 | /* VCMPPSZrrib */ |
| 106585 | VK16, VR512, VR512, u8imm, |
| 106586 | /* VCMPPSZrribk */ |
| 106587 | VK16, VK16WM, VR512, VR512, u8imm, |
| 106588 | /* VCMPPSZrrik */ |
| 106589 | VK16, VK16WM, VR512, VR512, u8imm, |
| 106590 | /* VCMPPSrmi */ |
| 106591 | VR128, VR128, f128mem, u8imm, |
| 106592 | /* VCMPPSrri */ |
| 106593 | VR128, VR128, VR128, u8imm, |
| 106594 | /* VCMPSDZrmi */ |
| 106595 | VK1, FR64X, f64mem, u8imm, |
| 106596 | /* VCMPSDZrmi_Int */ |
| 106597 | VK1, VR128X, sdmem, u8imm, |
| 106598 | /* VCMPSDZrmik_Int */ |
| 106599 | VK1, VK1WM, VR128X, sdmem, u8imm, |
| 106600 | /* VCMPSDZrri */ |
| 106601 | VK1, FR64X, FR64X, u8imm, |
| 106602 | /* VCMPSDZrri_Int */ |
| 106603 | VK1, VR128X, VR128X, u8imm, |
| 106604 | /* VCMPSDZrrib_Int */ |
| 106605 | VK1, VR128X, VR128X, u8imm, |
| 106606 | /* VCMPSDZrribk_Int */ |
| 106607 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 106608 | /* VCMPSDZrrik_Int */ |
| 106609 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 106610 | /* VCMPSDrmi */ |
| 106611 | FR64, FR64, f64mem, u8imm, |
| 106612 | /* VCMPSDrmi_Int */ |
| 106613 | VR128, VR128, sdmem, u8imm, |
| 106614 | /* VCMPSDrri */ |
| 106615 | FR64, FR64, FR64, u8imm, |
| 106616 | /* VCMPSDrri_Int */ |
| 106617 | VR128, VR128, VR128, u8imm, |
| 106618 | /* VCMPSHZrmi */ |
| 106619 | VK1, FR16X, f16mem, u8imm, |
| 106620 | /* VCMPSHZrmi_Int */ |
| 106621 | VK1, VR128X, shmem, u8imm, |
| 106622 | /* VCMPSHZrmik_Int */ |
| 106623 | VK1, VK1WM, VR128X, shmem, u8imm, |
| 106624 | /* VCMPSHZrri */ |
| 106625 | VK1, FR16X, FR16X, u8imm, |
| 106626 | /* VCMPSHZrri_Int */ |
| 106627 | VK1, VR128X, VR128X, u8imm, |
| 106628 | /* VCMPSHZrrib_Int */ |
| 106629 | VK1, VR128X, VR128X, u8imm, |
| 106630 | /* VCMPSHZrribk_Int */ |
| 106631 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 106632 | /* VCMPSHZrrik_Int */ |
| 106633 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 106634 | /* VCMPSSZrmi */ |
| 106635 | VK1, FR32X, f32mem, u8imm, |
| 106636 | /* VCMPSSZrmi_Int */ |
| 106637 | VK1, VR128X, ssmem, u8imm, |
| 106638 | /* VCMPSSZrmik_Int */ |
| 106639 | VK1, VK1WM, VR128X, ssmem, u8imm, |
| 106640 | /* VCMPSSZrri */ |
| 106641 | VK1, FR32X, FR32X, u8imm, |
| 106642 | /* VCMPSSZrri_Int */ |
| 106643 | VK1, VR128X, VR128X, u8imm, |
| 106644 | /* VCMPSSZrrib_Int */ |
| 106645 | VK1, VR128X, VR128X, u8imm, |
| 106646 | /* VCMPSSZrribk_Int */ |
| 106647 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 106648 | /* VCMPSSZrrik_Int */ |
| 106649 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 106650 | /* VCMPSSrmi */ |
| 106651 | FR32, FR32, f32mem, u8imm, |
| 106652 | /* VCMPSSrmi_Int */ |
| 106653 | VR128, VR128, ssmem, u8imm, |
| 106654 | /* VCMPSSrri */ |
| 106655 | FR32, FR32, FR32, u8imm, |
| 106656 | /* VCMPSSrri_Int */ |
| 106657 | VR128, VR128, VR128, u8imm, |
| 106658 | /* VCOMISBF16Zrm */ |
| 106659 | FR16X, f16mem, |
| 106660 | /* VCOMISBF16Zrm_Int */ |
| 106661 | VR128X, f16mem, |
| 106662 | /* VCOMISBF16Zrr */ |
| 106663 | FR16X, FR16X, |
| 106664 | /* VCOMISBF16Zrr_Int */ |
| 106665 | VR128X, VR128X, |
| 106666 | /* VCOMISDZrm */ |
| 106667 | FR64X, f64mem, |
| 106668 | /* VCOMISDZrm_Int */ |
| 106669 | VR128X, sdmem, |
| 106670 | /* VCOMISDZrr */ |
| 106671 | FR64X, FR64X, |
| 106672 | /* VCOMISDZrr_Int */ |
| 106673 | VR128X, VR128X, |
| 106674 | /* VCOMISDZrrb */ |
| 106675 | VR128X, VR128X, |
| 106676 | /* VCOMISDrm */ |
| 106677 | FR64, f64mem, |
| 106678 | /* VCOMISDrm_Int */ |
| 106679 | VR128, sdmem, |
| 106680 | /* VCOMISDrr */ |
| 106681 | FR64, FR64, |
| 106682 | /* VCOMISDrr_Int */ |
| 106683 | VR128, VR128, |
| 106684 | /* VCOMISHZrm */ |
| 106685 | FR16X, f16mem, |
| 106686 | /* VCOMISHZrm_Int */ |
| 106687 | VR128X, shmem, |
| 106688 | /* VCOMISHZrr */ |
| 106689 | FR16X, FR16X, |
| 106690 | /* VCOMISHZrr_Int */ |
| 106691 | VR128X, VR128X, |
| 106692 | /* VCOMISHZrrb */ |
| 106693 | VR128X, VR128X, |
| 106694 | /* VCOMISSZrm */ |
| 106695 | FR32X, f32mem, |
| 106696 | /* VCOMISSZrm_Int */ |
| 106697 | VR128X, ssmem, |
| 106698 | /* VCOMISSZrr */ |
| 106699 | FR32X, FR32X, |
| 106700 | /* VCOMISSZrr_Int */ |
| 106701 | VR128X, VR128X, |
| 106702 | /* VCOMISSZrrb */ |
| 106703 | VR128X, VR128X, |
| 106704 | /* VCOMISSrm */ |
| 106705 | FR32, f32mem, |
| 106706 | /* VCOMISSrm_Int */ |
| 106707 | VR128, ssmem, |
| 106708 | /* VCOMISSrr */ |
| 106709 | FR32, FR32, |
| 106710 | /* VCOMISSrr_Int */ |
| 106711 | VR128, VR128, |
| 106712 | /* VCOMPRESSPDZ128mr */ |
| 106713 | f128mem, VR128X, |
| 106714 | /* VCOMPRESSPDZ128mrk */ |
| 106715 | f128mem, VK2WM, VR128X, |
| 106716 | /* VCOMPRESSPDZ128rr */ |
| 106717 | VR128X, VR128X, |
| 106718 | /* VCOMPRESSPDZ128rrk */ |
| 106719 | VR128X, VR128X, VK2WM, VR128X, |
| 106720 | /* VCOMPRESSPDZ128rrkz */ |
| 106721 | VR128X, VK2WM, VR128X, |
| 106722 | /* VCOMPRESSPDZ256mr */ |
| 106723 | f256mem, VR256X, |
| 106724 | /* VCOMPRESSPDZ256mrk */ |
| 106725 | f256mem, VK4WM, VR256X, |
| 106726 | /* VCOMPRESSPDZ256rr */ |
| 106727 | VR256X, VR256X, |
| 106728 | /* VCOMPRESSPDZ256rrk */ |
| 106729 | VR256X, VR256X, VK4WM, VR256X, |
| 106730 | /* VCOMPRESSPDZ256rrkz */ |
| 106731 | VR256X, VK4WM, VR256X, |
| 106732 | /* VCOMPRESSPDZmr */ |
| 106733 | f512mem, VR512, |
| 106734 | /* VCOMPRESSPDZmrk */ |
| 106735 | f512mem, VK8WM, VR512, |
| 106736 | /* VCOMPRESSPDZrr */ |
| 106737 | VR512, VR512, |
| 106738 | /* VCOMPRESSPDZrrk */ |
| 106739 | VR512, VR512, VK8WM, VR512, |
| 106740 | /* VCOMPRESSPDZrrkz */ |
| 106741 | VR512, VK8WM, VR512, |
| 106742 | /* VCOMPRESSPSZ128mr */ |
| 106743 | f128mem, VR128X, |
| 106744 | /* VCOMPRESSPSZ128mrk */ |
| 106745 | f128mem, VK4WM, VR128X, |
| 106746 | /* VCOMPRESSPSZ128rr */ |
| 106747 | VR128X, VR128X, |
| 106748 | /* VCOMPRESSPSZ128rrk */ |
| 106749 | VR128X, VR128X, VK4WM, VR128X, |
| 106750 | /* VCOMPRESSPSZ128rrkz */ |
| 106751 | VR128X, VK4WM, VR128X, |
| 106752 | /* VCOMPRESSPSZ256mr */ |
| 106753 | f256mem, VR256X, |
| 106754 | /* VCOMPRESSPSZ256mrk */ |
| 106755 | f256mem, VK8WM, VR256X, |
| 106756 | /* VCOMPRESSPSZ256rr */ |
| 106757 | VR256X, VR256X, |
| 106758 | /* VCOMPRESSPSZ256rrk */ |
| 106759 | VR256X, VR256X, VK8WM, VR256X, |
| 106760 | /* VCOMPRESSPSZ256rrkz */ |
| 106761 | VR256X, VK8WM, VR256X, |
| 106762 | /* VCOMPRESSPSZmr */ |
| 106763 | f512mem, VR512, |
| 106764 | /* VCOMPRESSPSZmrk */ |
| 106765 | f512mem, VK16WM, VR512, |
| 106766 | /* VCOMPRESSPSZrr */ |
| 106767 | VR512, VR512, |
| 106768 | /* VCOMPRESSPSZrrk */ |
| 106769 | VR512, VR512, VK16WM, VR512, |
| 106770 | /* VCOMPRESSPSZrrkz */ |
| 106771 | VR512, VK16WM, VR512, |
| 106772 | /* VCOMXSDZrm_Int */ |
| 106773 | VR128X, f64mem, |
| 106774 | /* VCOMXSDZrr_Int */ |
| 106775 | VR128X, VR128X, |
| 106776 | /* VCOMXSDZrrb_Int */ |
| 106777 | VR128X, VR128X, |
| 106778 | /* VCOMXSHZrm_Int */ |
| 106779 | VR128X, f16mem, |
| 106780 | /* VCOMXSHZrr_Int */ |
| 106781 | VR128X, VR128X, |
| 106782 | /* VCOMXSHZrrb_Int */ |
| 106783 | VR128X, VR128X, |
| 106784 | /* VCOMXSSZrm_Int */ |
| 106785 | VR128X, f32mem, |
| 106786 | /* VCOMXSSZrr_Int */ |
| 106787 | VR128X, VR128X, |
| 106788 | /* VCOMXSSZrrb_Int */ |
| 106789 | VR128X, VR128X, |
| 106790 | /* VCVT2PH2BF8SZ128rm */ |
| 106791 | VR128X, VR128X, f128mem, |
| 106792 | /* VCVT2PH2BF8SZ128rmb */ |
| 106793 | VR128X, VR128X, f16mem, |
| 106794 | /* VCVT2PH2BF8SZ128rmbk */ |
| 106795 | VR128X, VR128X, VK16WM, VR128X, f16mem, |
| 106796 | /* VCVT2PH2BF8SZ128rmbkz */ |
| 106797 | VR128X, VK16WM, VR128X, f16mem, |
| 106798 | /* VCVT2PH2BF8SZ128rmk */ |
| 106799 | VR128X, VR128X, VK16WM, VR128X, f128mem, |
| 106800 | /* VCVT2PH2BF8SZ128rmkz */ |
| 106801 | VR128X, VK16WM, VR128X, f128mem, |
| 106802 | /* VCVT2PH2BF8SZ128rr */ |
| 106803 | VR128X, VR128X, VR128X, |
| 106804 | /* VCVT2PH2BF8SZ128rrk */ |
| 106805 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 106806 | /* VCVT2PH2BF8SZ128rrkz */ |
| 106807 | VR128X, VK16WM, VR128X, VR128X, |
| 106808 | /* VCVT2PH2BF8SZ256rm */ |
| 106809 | VR256X, VR256X, f256mem, |
| 106810 | /* VCVT2PH2BF8SZ256rmb */ |
| 106811 | VR256X, VR256X, f16mem, |
| 106812 | /* VCVT2PH2BF8SZ256rmbk */ |
| 106813 | VR256X, VR256X, VK32WM, VR256X, f16mem, |
| 106814 | /* VCVT2PH2BF8SZ256rmbkz */ |
| 106815 | VR256X, VK32WM, VR256X, f16mem, |
| 106816 | /* VCVT2PH2BF8SZ256rmk */ |
| 106817 | VR256X, VR256X, VK32WM, VR256X, f256mem, |
| 106818 | /* VCVT2PH2BF8SZ256rmkz */ |
| 106819 | VR256X, VK32WM, VR256X, f256mem, |
| 106820 | /* VCVT2PH2BF8SZ256rr */ |
| 106821 | VR256X, VR256X, VR256X, |
| 106822 | /* VCVT2PH2BF8SZ256rrk */ |
| 106823 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 106824 | /* VCVT2PH2BF8SZ256rrkz */ |
| 106825 | VR256X, VK32WM, VR256X, VR256X, |
| 106826 | /* VCVT2PH2BF8SZrm */ |
| 106827 | VR512, VR512, f512mem, |
| 106828 | /* VCVT2PH2BF8SZrmb */ |
| 106829 | VR512, VR512, f16mem, |
| 106830 | /* VCVT2PH2BF8SZrmbk */ |
| 106831 | VR512, VR512, VK64WM, VR512, f16mem, |
| 106832 | /* VCVT2PH2BF8SZrmbkz */ |
| 106833 | VR512, VK64WM, VR512, f16mem, |
| 106834 | /* VCVT2PH2BF8SZrmk */ |
| 106835 | VR512, VR512, VK64WM, VR512, f512mem, |
| 106836 | /* VCVT2PH2BF8SZrmkz */ |
| 106837 | VR512, VK64WM, VR512, f512mem, |
| 106838 | /* VCVT2PH2BF8SZrr */ |
| 106839 | VR512, VR512, VR512, |
| 106840 | /* VCVT2PH2BF8SZrrk */ |
| 106841 | VR512, VR512, VK64WM, VR512, VR512, |
| 106842 | /* VCVT2PH2BF8SZrrkz */ |
| 106843 | VR512, VK64WM, VR512, VR512, |
| 106844 | /* VCVT2PH2BF8Z128rm */ |
| 106845 | VR128X, VR128X, f128mem, |
| 106846 | /* VCVT2PH2BF8Z128rmb */ |
| 106847 | VR128X, VR128X, f16mem, |
| 106848 | /* VCVT2PH2BF8Z128rmbk */ |
| 106849 | VR128X, VR128X, VK16WM, VR128X, f16mem, |
| 106850 | /* VCVT2PH2BF8Z128rmbkz */ |
| 106851 | VR128X, VK16WM, VR128X, f16mem, |
| 106852 | /* VCVT2PH2BF8Z128rmk */ |
| 106853 | VR128X, VR128X, VK16WM, VR128X, f128mem, |
| 106854 | /* VCVT2PH2BF8Z128rmkz */ |
| 106855 | VR128X, VK16WM, VR128X, f128mem, |
| 106856 | /* VCVT2PH2BF8Z128rr */ |
| 106857 | VR128X, VR128X, VR128X, |
| 106858 | /* VCVT2PH2BF8Z128rrk */ |
| 106859 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 106860 | /* VCVT2PH2BF8Z128rrkz */ |
| 106861 | VR128X, VK16WM, VR128X, VR128X, |
| 106862 | /* VCVT2PH2BF8Z256rm */ |
| 106863 | VR256X, VR256X, f256mem, |
| 106864 | /* VCVT2PH2BF8Z256rmb */ |
| 106865 | VR256X, VR256X, f16mem, |
| 106866 | /* VCVT2PH2BF8Z256rmbk */ |
| 106867 | VR256X, VR256X, VK32WM, VR256X, f16mem, |
| 106868 | /* VCVT2PH2BF8Z256rmbkz */ |
| 106869 | VR256X, VK32WM, VR256X, f16mem, |
| 106870 | /* VCVT2PH2BF8Z256rmk */ |
| 106871 | VR256X, VR256X, VK32WM, VR256X, f256mem, |
| 106872 | /* VCVT2PH2BF8Z256rmkz */ |
| 106873 | VR256X, VK32WM, VR256X, f256mem, |
| 106874 | /* VCVT2PH2BF8Z256rr */ |
| 106875 | VR256X, VR256X, VR256X, |
| 106876 | /* VCVT2PH2BF8Z256rrk */ |
| 106877 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 106878 | /* VCVT2PH2BF8Z256rrkz */ |
| 106879 | VR256X, VK32WM, VR256X, VR256X, |
| 106880 | /* VCVT2PH2BF8Zrm */ |
| 106881 | VR512, VR512, f512mem, |
| 106882 | /* VCVT2PH2BF8Zrmb */ |
| 106883 | VR512, VR512, f16mem, |
| 106884 | /* VCVT2PH2BF8Zrmbk */ |
| 106885 | VR512, VR512, VK64WM, VR512, f16mem, |
| 106886 | /* VCVT2PH2BF8Zrmbkz */ |
| 106887 | VR512, VK64WM, VR512, f16mem, |
| 106888 | /* VCVT2PH2BF8Zrmk */ |
| 106889 | VR512, VR512, VK64WM, VR512, f512mem, |
| 106890 | /* VCVT2PH2BF8Zrmkz */ |
| 106891 | VR512, VK64WM, VR512, f512mem, |
| 106892 | /* VCVT2PH2BF8Zrr */ |
| 106893 | VR512, VR512, VR512, |
| 106894 | /* VCVT2PH2BF8Zrrk */ |
| 106895 | VR512, VR512, VK64WM, VR512, VR512, |
| 106896 | /* VCVT2PH2BF8Zrrkz */ |
| 106897 | VR512, VK64WM, VR512, VR512, |
| 106898 | /* VCVT2PH2HF8SZ128rm */ |
| 106899 | VR128X, VR128X, f128mem, |
| 106900 | /* VCVT2PH2HF8SZ128rmb */ |
| 106901 | VR128X, VR128X, f16mem, |
| 106902 | /* VCVT2PH2HF8SZ128rmbk */ |
| 106903 | VR128X, VR128X, VK16WM, VR128X, f16mem, |
| 106904 | /* VCVT2PH2HF8SZ128rmbkz */ |
| 106905 | VR128X, VK16WM, VR128X, f16mem, |
| 106906 | /* VCVT2PH2HF8SZ128rmk */ |
| 106907 | VR128X, VR128X, VK16WM, VR128X, f128mem, |
| 106908 | /* VCVT2PH2HF8SZ128rmkz */ |
| 106909 | VR128X, VK16WM, VR128X, f128mem, |
| 106910 | /* VCVT2PH2HF8SZ128rr */ |
| 106911 | VR128X, VR128X, VR128X, |
| 106912 | /* VCVT2PH2HF8SZ128rrk */ |
| 106913 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 106914 | /* VCVT2PH2HF8SZ128rrkz */ |
| 106915 | VR128X, VK16WM, VR128X, VR128X, |
| 106916 | /* VCVT2PH2HF8SZ256rm */ |
| 106917 | VR256X, VR256X, f256mem, |
| 106918 | /* VCVT2PH2HF8SZ256rmb */ |
| 106919 | VR256X, VR256X, f16mem, |
| 106920 | /* VCVT2PH2HF8SZ256rmbk */ |
| 106921 | VR256X, VR256X, VK32WM, VR256X, f16mem, |
| 106922 | /* VCVT2PH2HF8SZ256rmbkz */ |
| 106923 | VR256X, VK32WM, VR256X, f16mem, |
| 106924 | /* VCVT2PH2HF8SZ256rmk */ |
| 106925 | VR256X, VR256X, VK32WM, VR256X, f256mem, |
| 106926 | /* VCVT2PH2HF8SZ256rmkz */ |
| 106927 | VR256X, VK32WM, VR256X, f256mem, |
| 106928 | /* VCVT2PH2HF8SZ256rr */ |
| 106929 | VR256X, VR256X, VR256X, |
| 106930 | /* VCVT2PH2HF8SZ256rrk */ |
| 106931 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 106932 | /* VCVT2PH2HF8SZ256rrkz */ |
| 106933 | VR256X, VK32WM, VR256X, VR256X, |
| 106934 | /* VCVT2PH2HF8SZrm */ |
| 106935 | VR512, VR512, f512mem, |
| 106936 | /* VCVT2PH2HF8SZrmb */ |
| 106937 | VR512, VR512, f16mem, |
| 106938 | /* VCVT2PH2HF8SZrmbk */ |
| 106939 | VR512, VR512, VK64WM, VR512, f16mem, |
| 106940 | /* VCVT2PH2HF8SZrmbkz */ |
| 106941 | VR512, VK64WM, VR512, f16mem, |
| 106942 | /* VCVT2PH2HF8SZrmk */ |
| 106943 | VR512, VR512, VK64WM, VR512, f512mem, |
| 106944 | /* VCVT2PH2HF8SZrmkz */ |
| 106945 | VR512, VK64WM, VR512, f512mem, |
| 106946 | /* VCVT2PH2HF8SZrr */ |
| 106947 | VR512, VR512, VR512, |
| 106948 | /* VCVT2PH2HF8SZrrk */ |
| 106949 | VR512, VR512, VK64WM, VR512, VR512, |
| 106950 | /* VCVT2PH2HF8SZrrkz */ |
| 106951 | VR512, VK64WM, VR512, VR512, |
| 106952 | /* VCVT2PH2HF8Z128rm */ |
| 106953 | VR128X, VR128X, f128mem, |
| 106954 | /* VCVT2PH2HF8Z128rmb */ |
| 106955 | VR128X, VR128X, f16mem, |
| 106956 | /* VCVT2PH2HF8Z128rmbk */ |
| 106957 | VR128X, VR128X, VK16WM, VR128X, f16mem, |
| 106958 | /* VCVT2PH2HF8Z128rmbkz */ |
| 106959 | VR128X, VK16WM, VR128X, f16mem, |
| 106960 | /* VCVT2PH2HF8Z128rmk */ |
| 106961 | VR128X, VR128X, VK16WM, VR128X, f128mem, |
| 106962 | /* VCVT2PH2HF8Z128rmkz */ |
| 106963 | VR128X, VK16WM, VR128X, f128mem, |
| 106964 | /* VCVT2PH2HF8Z128rr */ |
| 106965 | VR128X, VR128X, VR128X, |
| 106966 | /* VCVT2PH2HF8Z128rrk */ |
| 106967 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 106968 | /* VCVT2PH2HF8Z128rrkz */ |
| 106969 | VR128X, VK16WM, VR128X, VR128X, |
| 106970 | /* VCVT2PH2HF8Z256rm */ |
| 106971 | VR256X, VR256X, f256mem, |
| 106972 | /* VCVT2PH2HF8Z256rmb */ |
| 106973 | VR256X, VR256X, f16mem, |
| 106974 | /* VCVT2PH2HF8Z256rmbk */ |
| 106975 | VR256X, VR256X, VK32WM, VR256X, f16mem, |
| 106976 | /* VCVT2PH2HF8Z256rmbkz */ |
| 106977 | VR256X, VK32WM, VR256X, f16mem, |
| 106978 | /* VCVT2PH2HF8Z256rmk */ |
| 106979 | VR256X, VR256X, VK32WM, VR256X, f256mem, |
| 106980 | /* VCVT2PH2HF8Z256rmkz */ |
| 106981 | VR256X, VK32WM, VR256X, f256mem, |
| 106982 | /* VCVT2PH2HF8Z256rr */ |
| 106983 | VR256X, VR256X, VR256X, |
| 106984 | /* VCVT2PH2HF8Z256rrk */ |
| 106985 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 106986 | /* VCVT2PH2HF8Z256rrkz */ |
| 106987 | VR256X, VK32WM, VR256X, VR256X, |
| 106988 | /* VCVT2PH2HF8Zrm */ |
| 106989 | VR512, VR512, f512mem, |
| 106990 | /* VCVT2PH2HF8Zrmb */ |
| 106991 | VR512, VR512, f16mem, |
| 106992 | /* VCVT2PH2HF8Zrmbk */ |
| 106993 | VR512, VR512, VK64WM, VR512, f16mem, |
| 106994 | /* VCVT2PH2HF8Zrmbkz */ |
| 106995 | VR512, VK64WM, VR512, f16mem, |
| 106996 | /* VCVT2PH2HF8Zrmk */ |
| 106997 | VR512, VR512, VK64WM, VR512, f512mem, |
| 106998 | /* VCVT2PH2HF8Zrmkz */ |
| 106999 | VR512, VK64WM, VR512, f512mem, |
| 107000 | /* VCVT2PH2HF8Zrr */ |
| 107001 | VR512, VR512, VR512, |
| 107002 | /* VCVT2PH2HF8Zrrk */ |
| 107003 | VR512, VR512, VK64WM, VR512, VR512, |
| 107004 | /* VCVT2PH2HF8Zrrkz */ |
| 107005 | VR512, VK64WM, VR512, VR512, |
| 107006 | /* VCVT2PS2PHXZ128rm */ |
| 107007 | VR128X, VR128X, f128mem, |
| 107008 | /* VCVT2PS2PHXZ128rmb */ |
| 107009 | VR128X, VR128X, f32mem, |
| 107010 | /* VCVT2PS2PHXZ128rmbk */ |
| 107011 | VR128X, VR128X, VK8WM, VR128X, f32mem, |
| 107012 | /* VCVT2PS2PHXZ128rmbkz */ |
| 107013 | VR128X, VK8WM, VR128X, f32mem, |
| 107014 | /* VCVT2PS2PHXZ128rmk */ |
| 107015 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 107016 | /* VCVT2PS2PHXZ128rmkz */ |
| 107017 | VR128X, VK8WM, VR128X, f128mem, |
| 107018 | /* VCVT2PS2PHXZ128rr */ |
| 107019 | VR128X, VR128X, VR128X, |
| 107020 | /* VCVT2PS2PHXZ128rrk */ |
| 107021 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 107022 | /* VCVT2PS2PHXZ128rrkz */ |
| 107023 | VR128X, VK8WM, VR128X, VR128X, |
| 107024 | /* VCVT2PS2PHXZ256rm */ |
| 107025 | VR256X, VR256X, f256mem, |
| 107026 | /* VCVT2PS2PHXZ256rmb */ |
| 107027 | VR256X, VR256X, f32mem, |
| 107028 | /* VCVT2PS2PHXZ256rmbk */ |
| 107029 | VR256X, VR256X, VK16WM, VR256X, f32mem, |
| 107030 | /* VCVT2PS2PHXZ256rmbkz */ |
| 107031 | VR256X, VK16WM, VR256X, f32mem, |
| 107032 | /* VCVT2PS2PHXZ256rmk */ |
| 107033 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 107034 | /* VCVT2PS2PHXZ256rmkz */ |
| 107035 | VR256X, VK16WM, VR256X, f256mem, |
| 107036 | /* VCVT2PS2PHXZ256rr */ |
| 107037 | VR256X, VR256X, VR256X, |
| 107038 | /* VCVT2PS2PHXZ256rrk */ |
| 107039 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 107040 | /* VCVT2PS2PHXZ256rrkz */ |
| 107041 | VR256X, VK16WM, VR256X, VR256X, |
| 107042 | /* VCVT2PS2PHXZrm */ |
| 107043 | VR512, VR512, f512mem, |
| 107044 | /* VCVT2PS2PHXZrmb */ |
| 107045 | VR512, VR512, f32mem, |
| 107046 | /* VCVT2PS2PHXZrmbk */ |
| 107047 | VR512, VR512, VK32WM, VR512, f32mem, |
| 107048 | /* VCVT2PS2PHXZrmbkz */ |
| 107049 | VR512, VK32WM, VR512, f32mem, |
| 107050 | /* VCVT2PS2PHXZrmk */ |
| 107051 | VR512, VR512, VK32WM, VR512, f512mem, |
| 107052 | /* VCVT2PS2PHXZrmkz */ |
| 107053 | VR512, VK32WM, VR512, f512mem, |
| 107054 | /* VCVT2PS2PHXZrr */ |
| 107055 | VR512, VR512, VR512, |
| 107056 | /* VCVT2PS2PHXZrrb */ |
| 107057 | VR512, VR512, VR512, AVX512RC, |
| 107058 | /* VCVT2PS2PHXZrrbk */ |
| 107059 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 107060 | /* VCVT2PS2PHXZrrbkz */ |
| 107061 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 107062 | /* VCVT2PS2PHXZrrk */ |
| 107063 | VR512, VR512, VK32WM, VR512, VR512, |
| 107064 | /* VCVT2PS2PHXZrrkz */ |
| 107065 | VR512, VK32WM, VR512, VR512, |
| 107066 | /* VCVTBF162IBSZ128rm */ |
| 107067 | VR128X, f128mem, |
| 107068 | /* VCVTBF162IBSZ128rmb */ |
| 107069 | VR128X, f16mem, |
| 107070 | /* VCVTBF162IBSZ128rmbk */ |
| 107071 | VR128X, VR128X, VK8WM, f16mem, |
| 107072 | /* VCVTBF162IBSZ128rmbkz */ |
| 107073 | VR128X, VK8WM, f16mem, |
| 107074 | /* VCVTBF162IBSZ128rmk */ |
| 107075 | VR128X, VR128X, VK8WM, f128mem, |
| 107076 | /* VCVTBF162IBSZ128rmkz */ |
| 107077 | VR128X, VK8WM, f128mem, |
| 107078 | /* VCVTBF162IBSZ128rr */ |
| 107079 | VR128X, VR128X, |
| 107080 | /* VCVTBF162IBSZ128rrk */ |
| 107081 | VR128X, VR128X, VK8WM, VR128X, |
| 107082 | /* VCVTBF162IBSZ128rrkz */ |
| 107083 | VR128X, VK8WM, VR128X, |
| 107084 | /* VCVTBF162IBSZ256rm */ |
| 107085 | VR256X, f256mem, |
| 107086 | /* VCVTBF162IBSZ256rmb */ |
| 107087 | VR256X, f16mem, |
| 107088 | /* VCVTBF162IBSZ256rmbk */ |
| 107089 | VR256X, VR256X, VK16WM, f16mem, |
| 107090 | /* VCVTBF162IBSZ256rmbkz */ |
| 107091 | VR256X, VK16WM, f16mem, |
| 107092 | /* VCVTBF162IBSZ256rmk */ |
| 107093 | VR256X, VR256X, VK16WM, f256mem, |
| 107094 | /* VCVTBF162IBSZ256rmkz */ |
| 107095 | VR256X, VK16WM, f256mem, |
| 107096 | /* VCVTBF162IBSZ256rr */ |
| 107097 | VR256X, VR256X, |
| 107098 | /* VCVTBF162IBSZ256rrk */ |
| 107099 | VR256X, VR256X, VK16WM, VR256X, |
| 107100 | /* VCVTBF162IBSZ256rrkz */ |
| 107101 | VR256X, VK16WM, VR256X, |
| 107102 | /* VCVTBF162IBSZrm */ |
| 107103 | VR512, f512mem, |
| 107104 | /* VCVTBF162IBSZrmb */ |
| 107105 | VR512, f16mem, |
| 107106 | /* VCVTBF162IBSZrmbk */ |
| 107107 | VR512, VR512, VK32WM, f16mem, |
| 107108 | /* VCVTBF162IBSZrmbkz */ |
| 107109 | VR512, VK32WM, f16mem, |
| 107110 | /* VCVTBF162IBSZrmk */ |
| 107111 | VR512, VR512, VK32WM, f512mem, |
| 107112 | /* VCVTBF162IBSZrmkz */ |
| 107113 | VR512, VK32WM, f512mem, |
| 107114 | /* VCVTBF162IBSZrr */ |
| 107115 | VR512, VR512, |
| 107116 | /* VCVTBF162IBSZrrk */ |
| 107117 | VR512, VR512, VK32WM, VR512, |
| 107118 | /* VCVTBF162IBSZrrkz */ |
| 107119 | VR512, VK32WM, VR512, |
| 107120 | /* VCVTBF162IUBSZ128rm */ |
| 107121 | VR128X, f128mem, |
| 107122 | /* VCVTBF162IUBSZ128rmb */ |
| 107123 | VR128X, f16mem, |
| 107124 | /* VCVTBF162IUBSZ128rmbk */ |
| 107125 | VR128X, VR128X, VK8WM, f16mem, |
| 107126 | /* VCVTBF162IUBSZ128rmbkz */ |
| 107127 | VR128X, VK8WM, f16mem, |
| 107128 | /* VCVTBF162IUBSZ128rmk */ |
| 107129 | VR128X, VR128X, VK8WM, f128mem, |
| 107130 | /* VCVTBF162IUBSZ128rmkz */ |
| 107131 | VR128X, VK8WM, f128mem, |
| 107132 | /* VCVTBF162IUBSZ128rr */ |
| 107133 | VR128X, VR128X, |
| 107134 | /* VCVTBF162IUBSZ128rrk */ |
| 107135 | VR128X, VR128X, VK8WM, VR128X, |
| 107136 | /* VCVTBF162IUBSZ128rrkz */ |
| 107137 | VR128X, VK8WM, VR128X, |
| 107138 | /* VCVTBF162IUBSZ256rm */ |
| 107139 | VR256X, f256mem, |
| 107140 | /* VCVTBF162IUBSZ256rmb */ |
| 107141 | VR256X, f16mem, |
| 107142 | /* VCVTBF162IUBSZ256rmbk */ |
| 107143 | VR256X, VR256X, VK16WM, f16mem, |
| 107144 | /* VCVTBF162IUBSZ256rmbkz */ |
| 107145 | VR256X, VK16WM, f16mem, |
| 107146 | /* VCVTBF162IUBSZ256rmk */ |
| 107147 | VR256X, VR256X, VK16WM, f256mem, |
| 107148 | /* VCVTBF162IUBSZ256rmkz */ |
| 107149 | VR256X, VK16WM, f256mem, |
| 107150 | /* VCVTBF162IUBSZ256rr */ |
| 107151 | VR256X, VR256X, |
| 107152 | /* VCVTBF162IUBSZ256rrk */ |
| 107153 | VR256X, VR256X, VK16WM, VR256X, |
| 107154 | /* VCVTBF162IUBSZ256rrkz */ |
| 107155 | VR256X, VK16WM, VR256X, |
| 107156 | /* VCVTBF162IUBSZrm */ |
| 107157 | VR512, f512mem, |
| 107158 | /* VCVTBF162IUBSZrmb */ |
| 107159 | VR512, f16mem, |
| 107160 | /* VCVTBF162IUBSZrmbk */ |
| 107161 | VR512, VR512, VK32WM, f16mem, |
| 107162 | /* VCVTBF162IUBSZrmbkz */ |
| 107163 | VR512, VK32WM, f16mem, |
| 107164 | /* VCVTBF162IUBSZrmk */ |
| 107165 | VR512, VR512, VK32WM, f512mem, |
| 107166 | /* VCVTBF162IUBSZrmkz */ |
| 107167 | VR512, VK32WM, f512mem, |
| 107168 | /* VCVTBF162IUBSZrr */ |
| 107169 | VR512, VR512, |
| 107170 | /* VCVTBF162IUBSZrrk */ |
| 107171 | VR512, VR512, VK32WM, VR512, |
| 107172 | /* VCVTBF162IUBSZrrkz */ |
| 107173 | VR512, VK32WM, VR512, |
| 107174 | /* VCVTBIASPH2BF8SZ128rm */ |
| 107175 | VR128X, VR128X, f128mem, |
| 107176 | /* VCVTBIASPH2BF8SZ128rmb */ |
| 107177 | VR128X, VR128X, f16mem, |
| 107178 | /* VCVTBIASPH2BF8SZ128rmbk */ |
| 107179 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 107180 | /* VCVTBIASPH2BF8SZ128rmbkz */ |
| 107181 | VR128X, VK8WM, VR128X, f16mem, |
| 107182 | /* VCVTBIASPH2BF8SZ128rmk */ |
| 107183 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 107184 | /* VCVTBIASPH2BF8SZ128rmkz */ |
| 107185 | VR128X, VK8WM, VR128X, f128mem, |
| 107186 | /* VCVTBIASPH2BF8SZ128rr */ |
| 107187 | VR128X, VR128X, VR128X, |
| 107188 | /* VCVTBIASPH2BF8SZ128rrk */ |
| 107189 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 107190 | /* VCVTBIASPH2BF8SZ128rrkz */ |
| 107191 | VR128X, VK8WM, VR128X, VR128X, |
| 107192 | /* VCVTBIASPH2BF8SZ256rm */ |
| 107193 | VR128X, VR256X, f256mem, |
| 107194 | /* VCVTBIASPH2BF8SZ256rmb */ |
| 107195 | VR128X, VR256X, f16mem, |
| 107196 | /* VCVTBIASPH2BF8SZ256rmbk */ |
| 107197 | VR128X, VR128X, VK16WM, VR256X, f16mem, |
| 107198 | /* VCVTBIASPH2BF8SZ256rmbkz */ |
| 107199 | VR128X, VK16WM, VR256X, f16mem, |
| 107200 | /* VCVTBIASPH2BF8SZ256rmk */ |
| 107201 | VR128X, VR128X, VK16WM, VR256X, f256mem, |
| 107202 | /* VCVTBIASPH2BF8SZ256rmkz */ |
| 107203 | VR128X, VK16WM, VR256X, f256mem, |
| 107204 | /* VCVTBIASPH2BF8SZ256rr */ |
| 107205 | VR128X, VR256X, VR256X, |
| 107206 | /* VCVTBIASPH2BF8SZ256rrk */ |
| 107207 | VR128X, VR128X, VK16WM, VR256X, VR256X, |
| 107208 | /* VCVTBIASPH2BF8SZ256rrkz */ |
| 107209 | VR128X, VK16WM, VR256X, VR256X, |
| 107210 | /* VCVTBIASPH2BF8SZrm */ |
| 107211 | VR256X, VR512, f512mem, |
| 107212 | /* VCVTBIASPH2BF8SZrmb */ |
| 107213 | VR256X, VR512, f16mem, |
| 107214 | /* VCVTBIASPH2BF8SZrmbk */ |
| 107215 | VR256X, VR256X, VK32WM, VR512, f16mem, |
| 107216 | /* VCVTBIASPH2BF8SZrmbkz */ |
| 107217 | VR256X, VK32WM, VR512, f16mem, |
| 107218 | /* VCVTBIASPH2BF8SZrmk */ |
| 107219 | VR256X, VR256X, VK32WM, VR512, f512mem, |
| 107220 | /* VCVTBIASPH2BF8SZrmkz */ |
| 107221 | VR256X, VK32WM, VR512, f512mem, |
| 107222 | /* VCVTBIASPH2BF8SZrr */ |
| 107223 | VR256X, VR512, VR512, |
| 107224 | /* VCVTBIASPH2BF8SZrrk */ |
| 107225 | VR256X, VR256X, VK32WM, VR512, VR512, |
| 107226 | /* VCVTBIASPH2BF8SZrrkz */ |
| 107227 | VR256X, VK32WM, VR512, VR512, |
| 107228 | /* VCVTBIASPH2BF8Z128rm */ |
| 107229 | VR128X, VR128X, f128mem, |
| 107230 | /* VCVTBIASPH2BF8Z128rmb */ |
| 107231 | VR128X, VR128X, f16mem, |
| 107232 | /* VCVTBIASPH2BF8Z128rmbk */ |
| 107233 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 107234 | /* VCVTBIASPH2BF8Z128rmbkz */ |
| 107235 | VR128X, VK8WM, VR128X, f16mem, |
| 107236 | /* VCVTBIASPH2BF8Z128rmk */ |
| 107237 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 107238 | /* VCVTBIASPH2BF8Z128rmkz */ |
| 107239 | VR128X, VK8WM, VR128X, f128mem, |
| 107240 | /* VCVTBIASPH2BF8Z128rr */ |
| 107241 | VR128X, VR128X, VR128X, |
| 107242 | /* VCVTBIASPH2BF8Z128rrk */ |
| 107243 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 107244 | /* VCVTBIASPH2BF8Z128rrkz */ |
| 107245 | VR128X, VK8WM, VR128X, VR128X, |
| 107246 | /* VCVTBIASPH2BF8Z256rm */ |
| 107247 | VR128X, VR256X, f256mem, |
| 107248 | /* VCVTBIASPH2BF8Z256rmb */ |
| 107249 | VR128X, VR256X, f16mem, |
| 107250 | /* VCVTBIASPH2BF8Z256rmbk */ |
| 107251 | VR128X, VR128X, VK16WM, VR256X, f16mem, |
| 107252 | /* VCVTBIASPH2BF8Z256rmbkz */ |
| 107253 | VR128X, VK16WM, VR256X, f16mem, |
| 107254 | /* VCVTBIASPH2BF8Z256rmk */ |
| 107255 | VR128X, VR128X, VK16WM, VR256X, f256mem, |
| 107256 | /* VCVTBIASPH2BF8Z256rmkz */ |
| 107257 | VR128X, VK16WM, VR256X, f256mem, |
| 107258 | /* VCVTBIASPH2BF8Z256rr */ |
| 107259 | VR128X, VR256X, VR256X, |
| 107260 | /* VCVTBIASPH2BF8Z256rrk */ |
| 107261 | VR128X, VR128X, VK16WM, VR256X, VR256X, |
| 107262 | /* VCVTBIASPH2BF8Z256rrkz */ |
| 107263 | VR128X, VK16WM, VR256X, VR256X, |
| 107264 | /* VCVTBIASPH2BF8Zrm */ |
| 107265 | VR256X, VR512, f512mem, |
| 107266 | /* VCVTBIASPH2BF8Zrmb */ |
| 107267 | VR256X, VR512, f16mem, |
| 107268 | /* VCVTBIASPH2BF8Zrmbk */ |
| 107269 | VR256X, VR256X, VK32WM, VR512, f16mem, |
| 107270 | /* VCVTBIASPH2BF8Zrmbkz */ |
| 107271 | VR256X, VK32WM, VR512, f16mem, |
| 107272 | /* VCVTBIASPH2BF8Zrmk */ |
| 107273 | VR256X, VR256X, VK32WM, VR512, f512mem, |
| 107274 | /* VCVTBIASPH2BF8Zrmkz */ |
| 107275 | VR256X, VK32WM, VR512, f512mem, |
| 107276 | /* VCVTBIASPH2BF8Zrr */ |
| 107277 | VR256X, VR512, VR512, |
| 107278 | /* VCVTBIASPH2BF8Zrrk */ |
| 107279 | VR256X, VR256X, VK32WM, VR512, VR512, |
| 107280 | /* VCVTBIASPH2BF8Zrrkz */ |
| 107281 | VR256X, VK32WM, VR512, VR512, |
| 107282 | /* VCVTBIASPH2HF8SZ128rm */ |
| 107283 | VR128X, VR128X, f128mem, |
| 107284 | /* VCVTBIASPH2HF8SZ128rmb */ |
| 107285 | VR128X, VR128X, f16mem, |
| 107286 | /* VCVTBIASPH2HF8SZ128rmbk */ |
| 107287 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 107288 | /* VCVTBIASPH2HF8SZ128rmbkz */ |
| 107289 | VR128X, VK8WM, VR128X, f16mem, |
| 107290 | /* VCVTBIASPH2HF8SZ128rmk */ |
| 107291 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 107292 | /* VCVTBIASPH2HF8SZ128rmkz */ |
| 107293 | VR128X, VK8WM, VR128X, f128mem, |
| 107294 | /* VCVTBIASPH2HF8SZ128rr */ |
| 107295 | VR128X, VR128X, VR128X, |
| 107296 | /* VCVTBIASPH2HF8SZ128rrk */ |
| 107297 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 107298 | /* VCVTBIASPH2HF8SZ128rrkz */ |
| 107299 | VR128X, VK8WM, VR128X, VR128X, |
| 107300 | /* VCVTBIASPH2HF8SZ256rm */ |
| 107301 | VR128X, VR256X, f256mem, |
| 107302 | /* VCVTBIASPH2HF8SZ256rmb */ |
| 107303 | VR128X, VR256X, f16mem, |
| 107304 | /* VCVTBIASPH2HF8SZ256rmbk */ |
| 107305 | VR128X, VR128X, VK16WM, VR256X, f16mem, |
| 107306 | /* VCVTBIASPH2HF8SZ256rmbkz */ |
| 107307 | VR128X, VK16WM, VR256X, f16mem, |
| 107308 | /* VCVTBIASPH2HF8SZ256rmk */ |
| 107309 | VR128X, VR128X, VK16WM, VR256X, f256mem, |
| 107310 | /* VCVTBIASPH2HF8SZ256rmkz */ |
| 107311 | VR128X, VK16WM, VR256X, f256mem, |
| 107312 | /* VCVTBIASPH2HF8SZ256rr */ |
| 107313 | VR128X, VR256X, VR256X, |
| 107314 | /* VCVTBIASPH2HF8SZ256rrk */ |
| 107315 | VR128X, VR128X, VK16WM, VR256X, VR256X, |
| 107316 | /* VCVTBIASPH2HF8SZ256rrkz */ |
| 107317 | VR128X, VK16WM, VR256X, VR256X, |
| 107318 | /* VCVTBIASPH2HF8SZrm */ |
| 107319 | VR256X, VR512, f512mem, |
| 107320 | /* VCVTBIASPH2HF8SZrmb */ |
| 107321 | VR256X, VR512, f16mem, |
| 107322 | /* VCVTBIASPH2HF8SZrmbk */ |
| 107323 | VR256X, VR256X, VK32WM, VR512, f16mem, |
| 107324 | /* VCVTBIASPH2HF8SZrmbkz */ |
| 107325 | VR256X, VK32WM, VR512, f16mem, |
| 107326 | /* VCVTBIASPH2HF8SZrmk */ |
| 107327 | VR256X, VR256X, VK32WM, VR512, f512mem, |
| 107328 | /* VCVTBIASPH2HF8SZrmkz */ |
| 107329 | VR256X, VK32WM, VR512, f512mem, |
| 107330 | /* VCVTBIASPH2HF8SZrr */ |
| 107331 | VR256X, VR512, VR512, |
| 107332 | /* VCVTBIASPH2HF8SZrrk */ |
| 107333 | VR256X, VR256X, VK32WM, VR512, VR512, |
| 107334 | /* VCVTBIASPH2HF8SZrrkz */ |
| 107335 | VR256X, VK32WM, VR512, VR512, |
| 107336 | /* VCVTBIASPH2HF8Z128rm */ |
| 107337 | VR128X, VR128X, f128mem, |
| 107338 | /* VCVTBIASPH2HF8Z128rmb */ |
| 107339 | VR128X, VR128X, f16mem, |
| 107340 | /* VCVTBIASPH2HF8Z128rmbk */ |
| 107341 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 107342 | /* VCVTBIASPH2HF8Z128rmbkz */ |
| 107343 | VR128X, VK8WM, VR128X, f16mem, |
| 107344 | /* VCVTBIASPH2HF8Z128rmk */ |
| 107345 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 107346 | /* VCVTBIASPH2HF8Z128rmkz */ |
| 107347 | VR128X, VK8WM, VR128X, f128mem, |
| 107348 | /* VCVTBIASPH2HF8Z128rr */ |
| 107349 | VR128X, VR128X, VR128X, |
| 107350 | /* VCVTBIASPH2HF8Z128rrk */ |
| 107351 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 107352 | /* VCVTBIASPH2HF8Z128rrkz */ |
| 107353 | VR128X, VK8WM, VR128X, VR128X, |
| 107354 | /* VCVTBIASPH2HF8Z256rm */ |
| 107355 | VR128X, VR256X, f256mem, |
| 107356 | /* VCVTBIASPH2HF8Z256rmb */ |
| 107357 | VR128X, VR256X, f16mem, |
| 107358 | /* VCVTBIASPH2HF8Z256rmbk */ |
| 107359 | VR128X, VR128X, VK16WM, VR256X, f16mem, |
| 107360 | /* VCVTBIASPH2HF8Z256rmbkz */ |
| 107361 | VR128X, VK16WM, VR256X, f16mem, |
| 107362 | /* VCVTBIASPH2HF8Z256rmk */ |
| 107363 | VR128X, VR128X, VK16WM, VR256X, f256mem, |
| 107364 | /* VCVTBIASPH2HF8Z256rmkz */ |
| 107365 | VR128X, VK16WM, VR256X, f256mem, |
| 107366 | /* VCVTBIASPH2HF8Z256rr */ |
| 107367 | VR128X, VR256X, VR256X, |
| 107368 | /* VCVTBIASPH2HF8Z256rrk */ |
| 107369 | VR128X, VR128X, VK16WM, VR256X, VR256X, |
| 107370 | /* VCVTBIASPH2HF8Z256rrkz */ |
| 107371 | VR128X, VK16WM, VR256X, VR256X, |
| 107372 | /* VCVTBIASPH2HF8Zrm */ |
| 107373 | VR256X, VR512, f512mem, |
| 107374 | /* VCVTBIASPH2HF8Zrmb */ |
| 107375 | VR256X, VR512, f16mem, |
| 107376 | /* VCVTBIASPH2HF8Zrmbk */ |
| 107377 | VR256X, VR256X, VK32WM, VR512, f16mem, |
| 107378 | /* VCVTBIASPH2HF8Zrmbkz */ |
| 107379 | VR256X, VK32WM, VR512, f16mem, |
| 107380 | /* VCVTBIASPH2HF8Zrmk */ |
| 107381 | VR256X, VR256X, VK32WM, VR512, f512mem, |
| 107382 | /* VCVTBIASPH2HF8Zrmkz */ |
| 107383 | VR256X, VK32WM, VR512, f512mem, |
| 107384 | /* VCVTBIASPH2HF8Zrr */ |
| 107385 | VR256X, VR512, VR512, |
| 107386 | /* VCVTBIASPH2HF8Zrrk */ |
| 107387 | VR256X, VR256X, VK32WM, VR512, VR512, |
| 107388 | /* VCVTBIASPH2HF8Zrrkz */ |
| 107389 | VR256X, VK32WM, VR512, VR512, |
| 107390 | /* VCVTDQ2PDYrm */ |
| 107391 | VR256, i128mem, |
| 107392 | /* VCVTDQ2PDYrr */ |
| 107393 | VR256, VR128, |
| 107394 | /* VCVTDQ2PDZ128rm */ |
| 107395 | VR128X, i64mem, |
| 107396 | /* VCVTDQ2PDZ128rmb */ |
| 107397 | VR128X, i32mem, |
| 107398 | /* VCVTDQ2PDZ128rmbk */ |
| 107399 | VR128X, VR128X, VK2WM, i32mem, |
| 107400 | /* VCVTDQ2PDZ128rmbkz */ |
| 107401 | VR128X, VK2WM, i32mem, |
| 107402 | /* VCVTDQ2PDZ128rmk */ |
| 107403 | VR128X, VR128X, VK2WM, i64mem, |
| 107404 | /* VCVTDQ2PDZ128rmkz */ |
| 107405 | VR128X, VK2WM, i64mem, |
| 107406 | /* VCVTDQ2PDZ128rr */ |
| 107407 | VR128X, VR128X, |
| 107408 | /* VCVTDQ2PDZ128rrk */ |
| 107409 | VR128X, VR128X, VK2WM, VR128X, |
| 107410 | /* VCVTDQ2PDZ128rrkz */ |
| 107411 | VR128X, VK2WM, VR128X, |
| 107412 | /* VCVTDQ2PDZ256rm */ |
| 107413 | VR256X, i128mem, |
| 107414 | /* VCVTDQ2PDZ256rmb */ |
| 107415 | VR256X, i32mem, |
| 107416 | /* VCVTDQ2PDZ256rmbk */ |
| 107417 | VR256X, VR256X, VK4WM, i32mem, |
| 107418 | /* VCVTDQ2PDZ256rmbkz */ |
| 107419 | VR256X, VK4WM, i32mem, |
| 107420 | /* VCVTDQ2PDZ256rmk */ |
| 107421 | VR256X, VR256X, VK4WM, i128mem, |
| 107422 | /* VCVTDQ2PDZ256rmkz */ |
| 107423 | VR256X, VK4WM, i128mem, |
| 107424 | /* VCVTDQ2PDZ256rr */ |
| 107425 | VR256X, VR128X, |
| 107426 | /* VCVTDQ2PDZ256rrk */ |
| 107427 | VR256X, VR256X, VK4WM, VR128X, |
| 107428 | /* VCVTDQ2PDZ256rrkz */ |
| 107429 | VR256X, VK4WM, VR128X, |
| 107430 | /* VCVTDQ2PDZrm */ |
| 107431 | VR512, i256mem, |
| 107432 | /* VCVTDQ2PDZrmb */ |
| 107433 | VR512, i32mem, |
| 107434 | /* VCVTDQ2PDZrmbk */ |
| 107435 | VR512, VR512, VK8WM, i32mem, |
| 107436 | /* VCVTDQ2PDZrmbkz */ |
| 107437 | VR512, VK8WM, i32mem, |
| 107438 | /* VCVTDQ2PDZrmk */ |
| 107439 | VR512, VR512, VK8WM, i256mem, |
| 107440 | /* VCVTDQ2PDZrmkz */ |
| 107441 | VR512, VK8WM, i256mem, |
| 107442 | /* VCVTDQ2PDZrr */ |
| 107443 | VR512, VR256X, |
| 107444 | /* VCVTDQ2PDZrrk */ |
| 107445 | VR512, VR512, VK8WM, VR256X, |
| 107446 | /* VCVTDQ2PDZrrkz */ |
| 107447 | VR512, VK8WM, VR256X, |
| 107448 | /* VCVTDQ2PDrm */ |
| 107449 | VR128, i64mem, |
| 107450 | /* VCVTDQ2PDrr */ |
| 107451 | VR128, VR128, |
| 107452 | /* VCVTDQ2PHZ128rm */ |
| 107453 | VR128X, i128mem, |
| 107454 | /* VCVTDQ2PHZ128rmb */ |
| 107455 | VR128X, i32mem, |
| 107456 | /* VCVTDQ2PHZ128rmbk */ |
| 107457 | VR128X, VR128X, VK4WM, i32mem, |
| 107458 | /* VCVTDQ2PHZ128rmbkz */ |
| 107459 | VR128X, VK4WM, i32mem, |
| 107460 | /* VCVTDQ2PHZ128rmk */ |
| 107461 | VR128X, VR128X, VK4WM, i128mem, |
| 107462 | /* VCVTDQ2PHZ128rmkz */ |
| 107463 | VR128X, VK4WM, i128mem, |
| 107464 | /* VCVTDQ2PHZ128rr */ |
| 107465 | VR128X, VR128X, |
| 107466 | /* VCVTDQ2PHZ128rrk */ |
| 107467 | VR128X, VR128X, VK4WM, VR128X, |
| 107468 | /* VCVTDQ2PHZ128rrkz */ |
| 107469 | VR128X, VK4WM, VR128X, |
| 107470 | /* VCVTDQ2PHZ256rm */ |
| 107471 | VR128X, i256mem, |
| 107472 | /* VCVTDQ2PHZ256rmb */ |
| 107473 | VR128X, i32mem, |
| 107474 | /* VCVTDQ2PHZ256rmbk */ |
| 107475 | VR128X, VR128X, VK8WM, i32mem, |
| 107476 | /* VCVTDQ2PHZ256rmbkz */ |
| 107477 | VR128X, VK8WM, i32mem, |
| 107478 | /* VCVTDQ2PHZ256rmk */ |
| 107479 | VR128X, VR128X, VK8WM, i256mem, |
| 107480 | /* VCVTDQ2PHZ256rmkz */ |
| 107481 | VR128X, VK8WM, i256mem, |
| 107482 | /* VCVTDQ2PHZ256rr */ |
| 107483 | VR128X, VR256X, |
| 107484 | /* VCVTDQ2PHZ256rrk */ |
| 107485 | VR128X, VR128X, VK8WM, VR256X, |
| 107486 | /* VCVTDQ2PHZ256rrkz */ |
| 107487 | VR128X, VK8WM, VR256X, |
| 107488 | /* VCVTDQ2PHZrm */ |
| 107489 | VR256X, i512mem, |
| 107490 | /* VCVTDQ2PHZrmb */ |
| 107491 | VR256X, i32mem, |
| 107492 | /* VCVTDQ2PHZrmbk */ |
| 107493 | VR256X, VR256X, VK16WM, i32mem, |
| 107494 | /* VCVTDQ2PHZrmbkz */ |
| 107495 | VR256X, VK16WM, i32mem, |
| 107496 | /* VCVTDQ2PHZrmk */ |
| 107497 | VR256X, VR256X, VK16WM, i512mem, |
| 107498 | /* VCVTDQ2PHZrmkz */ |
| 107499 | VR256X, VK16WM, i512mem, |
| 107500 | /* VCVTDQ2PHZrr */ |
| 107501 | VR256X, VR512, |
| 107502 | /* VCVTDQ2PHZrrb */ |
| 107503 | VR256X, VR512, AVX512RC, |
| 107504 | /* VCVTDQ2PHZrrbk */ |
| 107505 | VR256X, VR256X, VK16WM, VR512, AVX512RC, |
| 107506 | /* VCVTDQ2PHZrrbkz */ |
| 107507 | VR256X, VK16WM, VR512, AVX512RC, |
| 107508 | /* VCVTDQ2PHZrrk */ |
| 107509 | VR256X, VR256X, VK16WM, VR512, |
| 107510 | /* VCVTDQ2PHZrrkz */ |
| 107511 | VR256X, VK16WM, VR512, |
| 107512 | /* VCVTDQ2PSYrm */ |
| 107513 | VR256, i256mem, |
| 107514 | /* VCVTDQ2PSYrr */ |
| 107515 | VR256, VR256, |
| 107516 | /* VCVTDQ2PSZ128rm */ |
| 107517 | VR128X, i128mem, |
| 107518 | /* VCVTDQ2PSZ128rmb */ |
| 107519 | VR128X, i32mem, |
| 107520 | /* VCVTDQ2PSZ128rmbk */ |
| 107521 | VR128X, VR128X, VK4WM, i32mem, |
| 107522 | /* VCVTDQ2PSZ128rmbkz */ |
| 107523 | VR128X, VK4WM, i32mem, |
| 107524 | /* VCVTDQ2PSZ128rmk */ |
| 107525 | VR128X, VR128X, VK4WM, i128mem, |
| 107526 | /* VCVTDQ2PSZ128rmkz */ |
| 107527 | VR128X, VK4WM, i128mem, |
| 107528 | /* VCVTDQ2PSZ128rr */ |
| 107529 | VR128X, VR128X, |
| 107530 | /* VCVTDQ2PSZ128rrk */ |
| 107531 | VR128X, VR128X, VK4WM, VR128X, |
| 107532 | /* VCVTDQ2PSZ128rrkz */ |
| 107533 | VR128X, VK4WM, VR128X, |
| 107534 | /* VCVTDQ2PSZ256rm */ |
| 107535 | VR256X, i256mem, |
| 107536 | /* VCVTDQ2PSZ256rmb */ |
| 107537 | VR256X, i32mem, |
| 107538 | /* VCVTDQ2PSZ256rmbk */ |
| 107539 | VR256X, VR256X, VK8WM, i32mem, |
| 107540 | /* VCVTDQ2PSZ256rmbkz */ |
| 107541 | VR256X, VK8WM, i32mem, |
| 107542 | /* VCVTDQ2PSZ256rmk */ |
| 107543 | VR256X, VR256X, VK8WM, i256mem, |
| 107544 | /* VCVTDQ2PSZ256rmkz */ |
| 107545 | VR256X, VK8WM, i256mem, |
| 107546 | /* VCVTDQ2PSZ256rr */ |
| 107547 | VR256X, VR256X, |
| 107548 | /* VCVTDQ2PSZ256rrk */ |
| 107549 | VR256X, VR256X, VK8WM, VR256X, |
| 107550 | /* VCVTDQ2PSZ256rrkz */ |
| 107551 | VR256X, VK8WM, VR256X, |
| 107552 | /* VCVTDQ2PSZrm */ |
| 107553 | VR512, i512mem, |
| 107554 | /* VCVTDQ2PSZrmb */ |
| 107555 | VR512, i32mem, |
| 107556 | /* VCVTDQ2PSZrmbk */ |
| 107557 | VR512, VR512, VK16WM, i32mem, |
| 107558 | /* VCVTDQ2PSZrmbkz */ |
| 107559 | VR512, VK16WM, i32mem, |
| 107560 | /* VCVTDQ2PSZrmk */ |
| 107561 | VR512, VR512, VK16WM, i512mem, |
| 107562 | /* VCVTDQ2PSZrmkz */ |
| 107563 | VR512, VK16WM, i512mem, |
| 107564 | /* VCVTDQ2PSZrr */ |
| 107565 | VR512, VR512, |
| 107566 | /* VCVTDQ2PSZrrb */ |
| 107567 | VR512, VR512, AVX512RC, |
| 107568 | /* VCVTDQ2PSZrrbk */ |
| 107569 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 107570 | /* VCVTDQ2PSZrrbkz */ |
| 107571 | VR512, VK16WM, VR512, AVX512RC, |
| 107572 | /* VCVTDQ2PSZrrk */ |
| 107573 | VR512, VR512, VK16WM, VR512, |
| 107574 | /* VCVTDQ2PSZrrkz */ |
| 107575 | VR512, VK16WM, VR512, |
| 107576 | /* VCVTDQ2PSrm */ |
| 107577 | VR128, i128mem, |
| 107578 | /* VCVTDQ2PSrr */ |
| 107579 | VR128, VR128, |
| 107580 | /* VCVTHF82PHZ128rm */ |
| 107581 | VR128X, f64mem, |
| 107582 | /* VCVTHF82PHZ128rmk */ |
| 107583 | VR128X, VR128X, VK8WM, f64mem, |
| 107584 | /* VCVTHF82PHZ128rmkz */ |
| 107585 | VR128X, VK8WM, f64mem, |
| 107586 | /* VCVTHF82PHZ128rr */ |
| 107587 | VR128X, VR128X, |
| 107588 | /* VCVTHF82PHZ128rrk */ |
| 107589 | VR128X, VR128X, VK8WM, VR128X, |
| 107590 | /* VCVTHF82PHZ128rrkz */ |
| 107591 | VR128X, VK8WM, VR128X, |
| 107592 | /* VCVTHF82PHZ256rm */ |
| 107593 | VR256X, f128mem, |
| 107594 | /* VCVTHF82PHZ256rmk */ |
| 107595 | VR256X, VR256X, VK16WM, f128mem, |
| 107596 | /* VCVTHF82PHZ256rmkz */ |
| 107597 | VR256X, VK16WM, f128mem, |
| 107598 | /* VCVTHF82PHZ256rr */ |
| 107599 | VR256X, VR128X, |
| 107600 | /* VCVTHF82PHZ256rrk */ |
| 107601 | VR256X, VR256X, VK16WM, VR128X, |
| 107602 | /* VCVTHF82PHZ256rrkz */ |
| 107603 | VR256X, VK16WM, VR128X, |
| 107604 | /* VCVTHF82PHZrm */ |
| 107605 | VR512, f256mem, |
| 107606 | /* VCVTHF82PHZrmk */ |
| 107607 | VR512, VR512, VK32WM, f256mem, |
| 107608 | /* VCVTHF82PHZrmkz */ |
| 107609 | VR512, VK32WM, f256mem, |
| 107610 | /* VCVTHF82PHZrr */ |
| 107611 | VR512, VR256X, |
| 107612 | /* VCVTHF82PHZrrk */ |
| 107613 | VR512, VR512, VK32WM, VR256X, |
| 107614 | /* VCVTHF82PHZrrkz */ |
| 107615 | VR512, VK32WM, VR256X, |
| 107616 | /* VCVTNE2PS2BF16Z128rm */ |
| 107617 | VR128X, VR128X, f128mem, |
| 107618 | /* VCVTNE2PS2BF16Z128rmb */ |
| 107619 | VR128X, VR128X, f32mem, |
| 107620 | /* VCVTNE2PS2BF16Z128rmbk */ |
| 107621 | VR128X, VR128X, VK8WM, VR128X, f32mem, |
| 107622 | /* VCVTNE2PS2BF16Z128rmbkz */ |
| 107623 | VR128X, VK8WM, VR128X, f32mem, |
| 107624 | /* VCVTNE2PS2BF16Z128rmk */ |
| 107625 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 107626 | /* VCVTNE2PS2BF16Z128rmkz */ |
| 107627 | VR128X, VK8WM, VR128X, f128mem, |
| 107628 | /* VCVTNE2PS2BF16Z128rr */ |
| 107629 | VR128X, VR128X, VR128X, |
| 107630 | /* VCVTNE2PS2BF16Z128rrk */ |
| 107631 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 107632 | /* VCVTNE2PS2BF16Z128rrkz */ |
| 107633 | VR128X, VK8WM, VR128X, VR128X, |
| 107634 | /* VCVTNE2PS2BF16Z256rm */ |
| 107635 | VR256X, VR256X, f256mem, |
| 107636 | /* VCVTNE2PS2BF16Z256rmb */ |
| 107637 | VR256X, VR256X, f32mem, |
| 107638 | /* VCVTNE2PS2BF16Z256rmbk */ |
| 107639 | VR256X, VR256X, VK16WM, VR256X, f32mem, |
| 107640 | /* VCVTNE2PS2BF16Z256rmbkz */ |
| 107641 | VR256X, VK16WM, VR256X, f32mem, |
| 107642 | /* VCVTNE2PS2BF16Z256rmk */ |
| 107643 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 107644 | /* VCVTNE2PS2BF16Z256rmkz */ |
| 107645 | VR256X, VK16WM, VR256X, f256mem, |
| 107646 | /* VCVTNE2PS2BF16Z256rr */ |
| 107647 | VR256X, VR256X, VR256X, |
| 107648 | /* VCVTNE2PS2BF16Z256rrk */ |
| 107649 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 107650 | /* VCVTNE2PS2BF16Z256rrkz */ |
| 107651 | VR256X, VK16WM, VR256X, VR256X, |
| 107652 | /* VCVTNE2PS2BF16Zrm */ |
| 107653 | VR512, VR512, f512mem, |
| 107654 | /* VCVTNE2PS2BF16Zrmb */ |
| 107655 | VR512, VR512, f32mem, |
| 107656 | /* VCVTNE2PS2BF16Zrmbk */ |
| 107657 | VR512, VR512, VK32WM, VR512, f32mem, |
| 107658 | /* VCVTNE2PS2BF16Zrmbkz */ |
| 107659 | VR512, VK32WM, VR512, f32mem, |
| 107660 | /* VCVTNE2PS2BF16Zrmk */ |
| 107661 | VR512, VR512, VK32WM, VR512, f512mem, |
| 107662 | /* VCVTNE2PS2BF16Zrmkz */ |
| 107663 | VR512, VK32WM, VR512, f512mem, |
| 107664 | /* VCVTNE2PS2BF16Zrr */ |
| 107665 | VR512, VR512, VR512, |
| 107666 | /* VCVTNE2PS2BF16Zrrk */ |
| 107667 | VR512, VR512, VK32WM, VR512, VR512, |
| 107668 | /* VCVTNE2PS2BF16Zrrkz */ |
| 107669 | VR512, VK32WM, VR512, VR512, |
| 107670 | /* VCVTNEEBF162PSYrm */ |
| 107671 | VR256, f256mem, |
| 107672 | /* VCVTNEEBF162PSrm */ |
| 107673 | VR128, f128mem, |
| 107674 | /* VCVTNEEPH2PSYrm */ |
| 107675 | VR256, f256mem, |
| 107676 | /* VCVTNEEPH2PSrm */ |
| 107677 | VR128, f128mem, |
| 107678 | /* VCVTNEOBF162PSYrm */ |
| 107679 | VR256, f256mem, |
| 107680 | /* VCVTNEOBF162PSrm */ |
| 107681 | VR128, f128mem, |
| 107682 | /* VCVTNEOPH2PSYrm */ |
| 107683 | VR256, f256mem, |
| 107684 | /* VCVTNEOPH2PSrm */ |
| 107685 | VR128, f128mem, |
| 107686 | /* VCVTNEPS2BF16Yrm */ |
| 107687 | VR128, f256mem, |
| 107688 | /* VCVTNEPS2BF16Yrr */ |
| 107689 | VR128, VR256, |
| 107690 | /* VCVTNEPS2BF16Z128rm */ |
| 107691 | VR128X, f128mem, |
| 107692 | /* VCVTNEPS2BF16Z128rmb */ |
| 107693 | VR128X, f32mem, |
| 107694 | /* VCVTNEPS2BF16Z128rmbk */ |
| 107695 | VR128X, VR128X, VK4WM, f32mem, |
| 107696 | /* VCVTNEPS2BF16Z128rmbkz */ |
| 107697 | VR128X, VK4WM, f32mem, |
| 107698 | /* VCVTNEPS2BF16Z128rmk */ |
| 107699 | VR128X, VR128X, VK4WM, f128mem, |
| 107700 | /* VCVTNEPS2BF16Z128rmkz */ |
| 107701 | VR128X, VK4WM, f128mem, |
| 107702 | /* VCVTNEPS2BF16Z128rr */ |
| 107703 | VR128X, VR128X, |
| 107704 | /* VCVTNEPS2BF16Z128rrk */ |
| 107705 | VR128X, VR128X, VK4WM, VR128X, |
| 107706 | /* VCVTNEPS2BF16Z128rrkz */ |
| 107707 | VR128X, VK4WM, VR128X, |
| 107708 | /* VCVTNEPS2BF16Z256rm */ |
| 107709 | VR128X, f256mem, |
| 107710 | /* VCVTNEPS2BF16Z256rmb */ |
| 107711 | VR128X, f32mem, |
| 107712 | /* VCVTNEPS2BF16Z256rmbk */ |
| 107713 | VR128X, VR128X, VK8WM, f32mem, |
| 107714 | /* VCVTNEPS2BF16Z256rmbkz */ |
| 107715 | VR128X, VK8WM, f32mem, |
| 107716 | /* VCVTNEPS2BF16Z256rmk */ |
| 107717 | VR128X, VR128X, VK8WM, f256mem, |
| 107718 | /* VCVTNEPS2BF16Z256rmkz */ |
| 107719 | VR128X, VK8WM, f256mem, |
| 107720 | /* VCVTNEPS2BF16Z256rr */ |
| 107721 | VR128X, VR256X, |
| 107722 | /* VCVTNEPS2BF16Z256rrk */ |
| 107723 | VR128X, VR128X, VK8WM, VR256X, |
| 107724 | /* VCVTNEPS2BF16Z256rrkz */ |
| 107725 | VR128X, VK8WM, VR256X, |
| 107726 | /* VCVTNEPS2BF16Zrm */ |
| 107727 | VR256X, f512mem, |
| 107728 | /* VCVTNEPS2BF16Zrmb */ |
| 107729 | VR256X, f32mem, |
| 107730 | /* VCVTNEPS2BF16Zrmbk */ |
| 107731 | VR256X, VR256X, VK16WM, f32mem, |
| 107732 | /* VCVTNEPS2BF16Zrmbkz */ |
| 107733 | VR256X, VK16WM, f32mem, |
| 107734 | /* VCVTNEPS2BF16Zrmk */ |
| 107735 | VR256X, VR256X, VK16WM, f512mem, |
| 107736 | /* VCVTNEPS2BF16Zrmkz */ |
| 107737 | VR256X, VK16WM, f512mem, |
| 107738 | /* VCVTNEPS2BF16Zrr */ |
| 107739 | VR256X, VR512, |
| 107740 | /* VCVTNEPS2BF16Zrrk */ |
| 107741 | VR256X, VR256X, VK16WM, VR512, |
| 107742 | /* VCVTNEPS2BF16Zrrkz */ |
| 107743 | VR256X, VK16WM, VR512, |
| 107744 | /* VCVTNEPS2BF16rm */ |
| 107745 | VR128, f128mem, |
| 107746 | /* VCVTNEPS2BF16rr */ |
| 107747 | VR128, VR128, |
| 107748 | /* VCVTPD2DQYrm */ |
| 107749 | VR128, f256mem, |
| 107750 | /* VCVTPD2DQYrr */ |
| 107751 | VR128, VR256, |
| 107752 | /* VCVTPD2DQZ128rm */ |
| 107753 | VR128X, f128mem, |
| 107754 | /* VCVTPD2DQZ128rmb */ |
| 107755 | VR128X, f64mem, |
| 107756 | /* VCVTPD2DQZ128rmbk */ |
| 107757 | VR128X, VR128X, VK2WM, f64mem, |
| 107758 | /* VCVTPD2DQZ128rmbkz */ |
| 107759 | VR128X, VK2WM, f64mem, |
| 107760 | /* VCVTPD2DQZ128rmk */ |
| 107761 | VR128X, VR128X, VK2WM, f128mem, |
| 107762 | /* VCVTPD2DQZ128rmkz */ |
| 107763 | VR128X, VK2WM, f128mem, |
| 107764 | /* VCVTPD2DQZ128rr */ |
| 107765 | VR128X, VR128X, |
| 107766 | /* VCVTPD2DQZ128rrk */ |
| 107767 | VR128X, VR128X, VK2WM, VR128X, |
| 107768 | /* VCVTPD2DQZ128rrkz */ |
| 107769 | VR128X, VK2WM, VR128X, |
| 107770 | /* VCVTPD2DQZ256rm */ |
| 107771 | VR128X, f256mem, |
| 107772 | /* VCVTPD2DQZ256rmb */ |
| 107773 | VR128X, f64mem, |
| 107774 | /* VCVTPD2DQZ256rmbk */ |
| 107775 | VR128X, VR128X, VK4WM, f64mem, |
| 107776 | /* VCVTPD2DQZ256rmbkz */ |
| 107777 | VR128X, VK4WM, f64mem, |
| 107778 | /* VCVTPD2DQZ256rmk */ |
| 107779 | VR128X, VR128X, VK4WM, f256mem, |
| 107780 | /* VCVTPD2DQZ256rmkz */ |
| 107781 | VR128X, VK4WM, f256mem, |
| 107782 | /* VCVTPD2DQZ256rr */ |
| 107783 | VR128X, VR256X, |
| 107784 | /* VCVTPD2DQZ256rrk */ |
| 107785 | VR128X, VR128X, VK4WM, VR256X, |
| 107786 | /* VCVTPD2DQZ256rrkz */ |
| 107787 | VR128X, VK4WM, VR256X, |
| 107788 | /* VCVTPD2DQZrm */ |
| 107789 | VR256X, f512mem, |
| 107790 | /* VCVTPD2DQZrmb */ |
| 107791 | VR256X, f64mem, |
| 107792 | /* VCVTPD2DQZrmbk */ |
| 107793 | VR256X, VR256X, VK8WM, f64mem, |
| 107794 | /* VCVTPD2DQZrmbkz */ |
| 107795 | VR256X, VK8WM, f64mem, |
| 107796 | /* VCVTPD2DQZrmk */ |
| 107797 | VR256X, VR256X, VK8WM, f512mem, |
| 107798 | /* VCVTPD2DQZrmkz */ |
| 107799 | VR256X, VK8WM, f512mem, |
| 107800 | /* VCVTPD2DQZrr */ |
| 107801 | VR256X, VR512, |
| 107802 | /* VCVTPD2DQZrrb */ |
| 107803 | VR256X, VR512, AVX512RC, |
| 107804 | /* VCVTPD2DQZrrbk */ |
| 107805 | VR256X, VR256X, VK8WM, VR512, AVX512RC, |
| 107806 | /* VCVTPD2DQZrrbkz */ |
| 107807 | VR256X, VK8WM, VR512, AVX512RC, |
| 107808 | /* VCVTPD2DQZrrk */ |
| 107809 | VR256X, VR256X, VK8WM, VR512, |
| 107810 | /* VCVTPD2DQZrrkz */ |
| 107811 | VR256X, VK8WM, VR512, |
| 107812 | /* VCVTPD2DQrm */ |
| 107813 | VR128, f128mem, |
| 107814 | /* VCVTPD2DQrr */ |
| 107815 | VR128, VR128, |
| 107816 | /* VCVTPD2PHZ128rm */ |
| 107817 | VR128X, f128mem, |
| 107818 | /* VCVTPD2PHZ128rmb */ |
| 107819 | VR128X, f64mem, |
| 107820 | /* VCVTPD2PHZ128rmbk */ |
| 107821 | VR128X, VR128X, VK2WM, f64mem, |
| 107822 | /* VCVTPD2PHZ128rmbkz */ |
| 107823 | VR128X, VK2WM, f64mem, |
| 107824 | /* VCVTPD2PHZ128rmk */ |
| 107825 | VR128X, VR128X, VK2WM, f128mem, |
| 107826 | /* VCVTPD2PHZ128rmkz */ |
| 107827 | VR128X, VK2WM, f128mem, |
| 107828 | /* VCVTPD2PHZ128rr */ |
| 107829 | VR128X, VR128X, |
| 107830 | /* VCVTPD2PHZ128rrk */ |
| 107831 | VR128X, VR128X, VK2WM, VR128X, |
| 107832 | /* VCVTPD2PHZ128rrkz */ |
| 107833 | VR128X, VK2WM, VR128X, |
| 107834 | /* VCVTPD2PHZ256rm */ |
| 107835 | VR128X, f256mem, |
| 107836 | /* VCVTPD2PHZ256rmb */ |
| 107837 | VR128X, f64mem, |
| 107838 | /* VCVTPD2PHZ256rmbk */ |
| 107839 | VR128X, VR128X, VK4WM, f64mem, |
| 107840 | /* VCVTPD2PHZ256rmbkz */ |
| 107841 | VR128X, VK4WM, f64mem, |
| 107842 | /* VCVTPD2PHZ256rmk */ |
| 107843 | VR128X, VR128X, VK4WM, f256mem, |
| 107844 | /* VCVTPD2PHZ256rmkz */ |
| 107845 | VR128X, VK4WM, f256mem, |
| 107846 | /* VCVTPD2PHZ256rr */ |
| 107847 | VR128X, VR256X, |
| 107848 | /* VCVTPD2PHZ256rrk */ |
| 107849 | VR128X, VR128X, VK4WM, VR256X, |
| 107850 | /* VCVTPD2PHZ256rrkz */ |
| 107851 | VR128X, VK4WM, VR256X, |
| 107852 | /* VCVTPD2PHZrm */ |
| 107853 | VR128X, f512mem, |
| 107854 | /* VCVTPD2PHZrmb */ |
| 107855 | VR128X, f64mem, |
| 107856 | /* VCVTPD2PHZrmbk */ |
| 107857 | VR128X, VR128X, VK8WM, f64mem, |
| 107858 | /* VCVTPD2PHZrmbkz */ |
| 107859 | VR128X, VK8WM, f64mem, |
| 107860 | /* VCVTPD2PHZrmk */ |
| 107861 | VR128X, VR128X, VK8WM, f512mem, |
| 107862 | /* VCVTPD2PHZrmkz */ |
| 107863 | VR128X, VK8WM, f512mem, |
| 107864 | /* VCVTPD2PHZrr */ |
| 107865 | VR128X, VR512, |
| 107866 | /* VCVTPD2PHZrrb */ |
| 107867 | VR128X, VR512, AVX512RC, |
| 107868 | /* VCVTPD2PHZrrbk */ |
| 107869 | VR128X, VR128X, VK8WM, VR512, AVX512RC, |
| 107870 | /* VCVTPD2PHZrrbkz */ |
| 107871 | VR128X, VK8WM, VR512, AVX512RC, |
| 107872 | /* VCVTPD2PHZrrk */ |
| 107873 | VR128X, VR128X, VK8WM, VR512, |
| 107874 | /* VCVTPD2PHZrrkz */ |
| 107875 | VR128X, VK8WM, VR512, |
| 107876 | /* VCVTPD2PSYrm */ |
| 107877 | VR128, f256mem, |
| 107878 | /* VCVTPD2PSYrr */ |
| 107879 | VR128, VR256, |
| 107880 | /* VCVTPD2PSZ128rm */ |
| 107881 | VR128X, f128mem, |
| 107882 | /* VCVTPD2PSZ128rmb */ |
| 107883 | VR128X, f64mem, |
| 107884 | /* VCVTPD2PSZ128rmbk */ |
| 107885 | VR128X, VR128X, VK2WM, f64mem, |
| 107886 | /* VCVTPD2PSZ128rmbkz */ |
| 107887 | VR128X, VK2WM, f64mem, |
| 107888 | /* VCVTPD2PSZ128rmk */ |
| 107889 | VR128X, VR128X, VK2WM, f128mem, |
| 107890 | /* VCVTPD2PSZ128rmkz */ |
| 107891 | VR128X, VK2WM, f128mem, |
| 107892 | /* VCVTPD2PSZ128rr */ |
| 107893 | VR128X, VR128X, |
| 107894 | /* VCVTPD2PSZ128rrk */ |
| 107895 | VR128X, VR128X, VK2WM, VR128X, |
| 107896 | /* VCVTPD2PSZ128rrkz */ |
| 107897 | VR128X, VK2WM, VR128X, |
| 107898 | /* VCVTPD2PSZ256rm */ |
| 107899 | VR128X, f256mem, |
| 107900 | /* VCVTPD2PSZ256rmb */ |
| 107901 | VR128X, f64mem, |
| 107902 | /* VCVTPD2PSZ256rmbk */ |
| 107903 | VR128X, VR128X, VK4WM, f64mem, |
| 107904 | /* VCVTPD2PSZ256rmbkz */ |
| 107905 | VR128X, VK4WM, f64mem, |
| 107906 | /* VCVTPD2PSZ256rmk */ |
| 107907 | VR128X, VR128X, VK4WM, f256mem, |
| 107908 | /* VCVTPD2PSZ256rmkz */ |
| 107909 | VR128X, VK4WM, f256mem, |
| 107910 | /* VCVTPD2PSZ256rr */ |
| 107911 | VR128X, VR256X, |
| 107912 | /* VCVTPD2PSZ256rrk */ |
| 107913 | VR128X, VR128X, VK4WM, VR256X, |
| 107914 | /* VCVTPD2PSZ256rrkz */ |
| 107915 | VR128X, VK4WM, VR256X, |
| 107916 | /* VCVTPD2PSZrm */ |
| 107917 | VR256X, f512mem, |
| 107918 | /* VCVTPD2PSZrmb */ |
| 107919 | VR256X, f64mem, |
| 107920 | /* VCVTPD2PSZrmbk */ |
| 107921 | VR256X, VR256X, VK8WM, f64mem, |
| 107922 | /* VCVTPD2PSZrmbkz */ |
| 107923 | VR256X, VK8WM, f64mem, |
| 107924 | /* VCVTPD2PSZrmk */ |
| 107925 | VR256X, VR256X, VK8WM, f512mem, |
| 107926 | /* VCVTPD2PSZrmkz */ |
| 107927 | VR256X, VK8WM, f512mem, |
| 107928 | /* VCVTPD2PSZrr */ |
| 107929 | VR256X, VR512, |
| 107930 | /* VCVTPD2PSZrrb */ |
| 107931 | VR256X, VR512, AVX512RC, |
| 107932 | /* VCVTPD2PSZrrbk */ |
| 107933 | VR256X, VR256X, VK8WM, VR512, AVX512RC, |
| 107934 | /* VCVTPD2PSZrrbkz */ |
| 107935 | VR256X, VK8WM, VR512, AVX512RC, |
| 107936 | /* VCVTPD2PSZrrk */ |
| 107937 | VR256X, VR256X, VK8WM, VR512, |
| 107938 | /* VCVTPD2PSZrrkz */ |
| 107939 | VR256X, VK8WM, VR512, |
| 107940 | /* VCVTPD2PSrm */ |
| 107941 | VR128, f128mem, |
| 107942 | /* VCVTPD2PSrr */ |
| 107943 | VR128, VR128, |
| 107944 | /* VCVTPD2QQZ128rm */ |
| 107945 | VR128X, f128mem, |
| 107946 | /* VCVTPD2QQZ128rmb */ |
| 107947 | VR128X, f64mem, |
| 107948 | /* VCVTPD2QQZ128rmbk */ |
| 107949 | VR128X, VR128X, VK2WM, f64mem, |
| 107950 | /* VCVTPD2QQZ128rmbkz */ |
| 107951 | VR128X, VK2WM, f64mem, |
| 107952 | /* VCVTPD2QQZ128rmk */ |
| 107953 | VR128X, VR128X, VK2WM, f128mem, |
| 107954 | /* VCVTPD2QQZ128rmkz */ |
| 107955 | VR128X, VK2WM, f128mem, |
| 107956 | /* VCVTPD2QQZ128rr */ |
| 107957 | VR128X, VR128X, |
| 107958 | /* VCVTPD2QQZ128rrk */ |
| 107959 | VR128X, VR128X, VK2WM, VR128X, |
| 107960 | /* VCVTPD2QQZ128rrkz */ |
| 107961 | VR128X, VK2WM, VR128X, |
| 107962 | /* VCVTPD2QQZ256rm */ |
| 107963 | VR256X, f256mem, |
| 107964 | /* VCVTPD2QQZ256rmb */ |
| 107965 | VR256X, f64mem, |
| 107966 | /* VCVTPD2QQZ256rmbk */ |
| 107967 | VR256X, VR256X, VK4WM, f64mem, |
| 107968 | /* VCVTPD2QQZ256rmbkz */ |
| 107969 | VR256X, VK4WM, f64mem, |
| 107970 | /* VCVTPD2QQZ256rmk */ |
| 107971 | VR256X, VR256X, VK4WM, f256mem, |
| 107972 | /* VCVTPD2QQZ256rmkz */ |
| 107973 | VR256X, VK4WM, f256mem, |
| 107974 | /* VCVTPD2QQZ256rr */ |
| 107975 | VR256X, VR256X, |
| 107976 | /* VCVTPD2QQZ256rrk */ |
| 107977 | VR256X, VR256X, VK4WM, VR256X, |
| 107978 | /* VCVTPD2QQZ256rrkz */ |
| 107979 | VR256X, VK4WM, VR256X, |
| 107980 | /* VCVTPD2QQZrm */ |
| 107981 | VR512, f512mem, |
| 107982 | /* VCVTPD2QQZrmb */ |
| 107983 | VR512, f64mem, |
| 107984 | /* VCVTPD2QQZrmbk */ |
| 107985 | VR512, VR512, VK8WM, f64mem, |
| 107986 | /* VCVTPD2QQZrmbkz */ |
| 107987 | VR512, VK8WM, f64mem, |
| 107988 | /* VCVTPD2QQZrmk */ |
| 107989 | VR512, VR512, VK8WM, f512mem, |
| 107990 | /* VCVTPD2QQZrmkz */ |
| 107991 | VR512, VK8WM, f512mem, |
| 107992 | /* VCVTPD2QQZrr */ |
| 107993 | VR512, VR512, |
| 107994 | /* VCVTPD2QQZrrb */ |
| 107995 | VR512, VR512, AVX512RC, |
| 107996 | /* VCVTPD2QQZrrbk */ |
| 107997 | VR512, VR512, VK8WM, VR512, AVX512RC, |
| 107998 | /* VCVTPD2QQZrrbkz */ |
| 107999 | VR512, VK8WM, VR512, AVX512RC, |
| 108000 | /* VCVTPD2QQZrrk */ |
| 108001 | VR512, VR512, VK8WM, VR512, |
| 108002 | /* VCVTPD2QQZrrkz */ |
| 108003 | VR512, VK8WM, VR512, |
| 108004 | /* VCVTPD2UDQZ128rm */ |
| 108005 | VR128X, f128mem, |
| 108006 | /* VCVTPD2UDQZ128rmb */ |
| 108007 | VR128X, f64mem, |
| 108008 | /* VCVTPD2UDQZ128rmbk */ |
| 108009 | VR128X, VR128X, VK2WM, f64mem, |
| 108010 | /* VCVTPD2UDQZ128rmbkz */ |
| 108011 | VR128X, VK2WM, f64mem, |
| 108012 | /* VCVTPD2UDQZ128rmk */ |
| 108013 | VR128X, VR128X, VK2WM, f128mem, |
| 108014 | /* VCVTPD2UDQZ128rmkz */ |
| 108015 | VR128X, VK2WM, f128mem, |
| 108016 | /* VCVTPD2UDQZ128rr */ |
| 108017 | VR128X, VR128X, |
| 108018 | /* VCVTPD2UDQZ128rrk */ |
| 108019 | VR128X, VR128X, VK2WM, VR128X, |
| 108020 | /* VCVTPD2UDQZ128rrkz */ |
| 108021 | VR128X, VK2WM, VR128X, |
| 108022 | /* VCVTPD2UDQZ256rm */ |
| 108023 | VR128X, f256mem, |
| 108024 | /* VCVTPD2UDQZ256rmb */ |
| 108025 | VR128X, f64mem, |
| 108026 | /* VCVTPD2UDQZ256rmbk */ |
| 108027 | VR128X, VR128X, VK4WM, f64mem, |
| 108028 | /* VCVTPD2UDQZ256rmbkz */ |
| 108029 | VR128X, VK4WM, f64mem, |
| 108030 | /* VCVTPD2UDQZ256rmk */ |
| 108031 | VR128X, VR128X, VK4WM, f256mem, |
| 108032 | /* VCVTPD2UDQZ256rmkz */ |
| 108033 | VR128X, VK4WM, f256mem, |
| 108034 | /* VCVTPD2UDQZ256rr */ |
| 108035 | VR128X, VR256X, |
| 108036 | /* VCVTPD2UDQZ256rrk */ |
| 108037 | VR128X, VR128X, VK4WM, VR256X, |
| 108038 | /* VCVTPD2UDQZ256rrkz */ |
| 108039 | VR128X, VK4WM, VR256X, |
| 108040 | /* VCVTPD2UDQZrm */ |
| 108041 | VR256X, f512mem, |
| 108042 | /* VCVTPD2UDQZrmb */ |
| 108043 | VR256X, f64mem, |
| 108044 | /* VCVTPD2UDQZrmbk */ |
| 108045 | VR256X, VR256X, VK8WM, f64mem, |
| 108046 | /* VCVTPD2UDQZrmbkz */ |
| 108047 | VR256X, VK8WM, f64mem, |
| 108048 | /* VCVTPD2UDQZrmk */ |
| 108049 | VR256X, VR256X, VK8WM, f512mem, |
| 108050 | /* VCVTPD2UDQZrmkz */ |
| 108051 | VR256X, VK8WM, f512mem, |
| 108052 | /* VCVTPD2UDQZrr */ |
| 108053 | VR256X, VR512, |
| 108054 | /* VCVTPD2UDQZrrb */ |
| 108055 | VR256X, VR512, AVX512RC, |
| 108056 | /* VCVTPD2UDQZrrbk */ |
| 108057 | VR256X, VR256X, VK8WM, VR512, AVX512RC, |
| 108058 | /* VCVTPD2UDQZrrbkz */ |
| 108059 | VR256X, VK8WM, VR512, AVX512RC, |
| 108060 | /* VCVTPD2UDQZrrk */ |
| 108061 | VR256X, VR256X, VK8WM, VR512, |
| 108062 | /* VCVTPD2UDQZrrkz */ |
| 108063 | VR256X, VK8WM, VR512, |
| 108064 | /* VCVTPD2UQQZ128rm */ |
| 108065 | VR128X, f128mem, |
| 108066 | /* VCVTPD2UQQZ128rmb */ |
| 108067 | VR128X, f64mem, |
| 108068 | /* VCVTPD2UQQZ128rmbk */ |
| 108069 | VR128X, VR128X, VK2WM, f64mem, |
| 108070 | /* VCVTPD2UQQZ128rmbkz */ |
| 108071 | VR128X, VK2WM, f64mem, |
| 108072 | /* VCVTPD2UQQZ128rmk */ |
| 108073 | VR128X, VR128X, VK2WM, f128mem, |
| 108074 | /* VCVTPD2UQQZ128rmkz */ |
| 108075 | VR128X, VK2WM, f128mem, |
| 108076 | /* VCVTPD2UQQZ128rr */ |
| 108077 | VR128X, VR128X, |
| 108078 | /* VCVTPD2UQQZ128rrk */ |
| 108079 | VR128X, VR128X, VK2WM, VR128X, |
| 108080 | /* VCVTPD2UQQZ128rrkz */ |
| 108081 | VR128X, VK2WM, VR128X, |
| 108082 | /* VCVTPD2UQQZ256rm */ |
| 108083 | VR256X, f256mem, |
| 108084 | /* VCVTPD2UQQZ256rmb */ |
| 108085 | VR256X, f64mem, |
| 108086 | /* VCVTPD2UQQZ256rmbk */ |
| 108087 | VR256X, VR256X, VK4WM, f64mem, |
| 108088 | /* VCVTPD2UQQZ256rmbkz */ |
| 108089 | VR256X, VK4WM, f64mem, |
| 108090 | /* VCVTPD2UQQZ256rmk */ |
| 108091 | VR256X, VR256X, VK4WM, f256mem, |
| 108092 | /* VCVTPD2UQQZ256rmkz */ |
| 108093 | VR256X, VK4WM, f256mem, |
| 108094 | /* VCVTPD2UQQZ256rr */ |
| 108095 | VR256X, VR256X, |
| 108096 | /* VCVTPD2UQQZ256rrk */ |
| 108097 | VR256X, VR256X, VK4WM, VR256X, |
| 108098 | /* VCVTPD2UQQZ256rrkz */ |
| 108099 | VR256X, VK4WM, VR256X, |
| 108100 | /* VCVTPD2UQQZrm */ |
| 108101 | VR512, f512mem, |
| 108102 | /* VCVTPD2UQQZrmb */ |
| 108103 | VR512, f64mem, |
| 108104 | /* VCVTPD2UQQZrmbk */ |
| 108105 | VR512, VR512, VK8WM, f64mem, |
| 108106 | /* VCVTPD2UQQZrmbkz */ |
| 108107 | VR512, VK8WM, f64mem, |
| 108108 | /* VCVTPD2UQQZrmk */ |
| 108109 | VR512, VR512, VK8WM, f512mem, |
| 108110 | /* VCVTPD2UQQZrmkz */ |
| 108111 | VR512, VK8WM, f512mem, |
| 108112 | /* VCVTPD2UQQZrr */ |
| 108113 | VR512, VR512, |
| 108114 | /* VCVTPD2UQQZrrb */ |
| 108115 | VR512, VR512, AVX512RC, |
| 108116 | /* VCVTPD2UQQZrrbk */ |
| 108117 | VR512, VR512, VK8WM, VR512, AVX512RC, |
| 108118 | /* VCVTPD2UQQZrrbkz */ |
| 108119 | VR512, VK8WM, VR512, AVX512RC, |
| 108120 | /* VCVTPD2UQQZrrk */ |
| 108121 | VR512, VR512, VK8WM, VR512, |
| 108122 | /* VCVTPD2UQQZrrkz */ |
| 108123 | VR512, VK8WM, VR512, |
| 108124 | /* VCVTPH2BF8SZ128rm */ |
| 108125 | VR128X, f128mem, |
| 108126 | /* VCVTPH2BF8SZ128rmb */ |
| 108127 | VR128X, f16mem, |
| 108128 | /* VCVTPH2BF8SZ128rmbk */ |
| 108129 | VR128X, VR128X, VK8WM, f16mem, |
| 108130 | /* VCVTPH2BF8SZ128rmbkz */ |
| 108131 | VR128X, VK8WM, f16mem, |
| 108132 | /* VCVTPH2BF8SZ128rmk */ |
| 108133 | VR128X, VR128X, VK8WM, f128mem, |
| 108134 | /* VCVTPH2BF8SZ128rmkz */ |
| 108135 | VR128X, VK8WM, f128mem, |
| 108136 | /* VCVTPH2BF8SZ128rr */ |
| 108137 | VR128X, VR128X, |
| 108138 | /* VCVTPH2BF8SZ128rrk */ |
| 108139 | VR128X, VR128X, VK8WM, VR128X, |
| 108140 | /* VCVTPH2BF8SZ128rrkz */ |
| 108141 | VR128X, VK8WM, VR128X, |
| 108142 | /* VCVTPH2BF8SZ256rm */ |
| 108143 | VR128X, f256mem, |
| 108144 | /* VCVTPH2BF8SZ256rmb */ |
| 108145 | VR128X, f16mem, |
| 108146 | /* VCVTPH2BF8SZ256rmbk */ |
| 108147 | VR128X, VR128X, VK16WM, f16mem, |
| 108148 | /* VCVTPH2BF8SZ256rmbkz */ |
| 108149 | VR128X, VK16WM, f16mem, |
| 108150 | /* VCVTPH2BF8SZ256rmk */ |
| 108151 | VR128X, VR128X, VK16WM, f256mem, |
| 108152 | /* VCVTPH2BF8SZ256rmkz */ |
| 108153 | VR128X, VK16WM, f256mem, |
| 108154 | /* VCVTPH2BF8SZ256rr */ |
| 108155 | VR128X, VR256X, |
| 108156 | /* VCVTPH2BF8SZ256rrk */ |
| 108157 | VR128X, VR128X, VK16WM, VR256X, |
| 108158 | /* VCVTPH2BF8SZ256rrkz */ |
| 108159 | VR128X, VK16WM, VR256X, |
| 108160 | /* VCVTPH2BF8SZrm */ |
| 108161 | VR256X, f512mem, |
| 108162 | /* VCVTPH2BF8SZrmb */ |
| 108163 | VR256X, f16mem, |
| 108164 | /* VCVTPH2BF8SZrmbk */ |
| 108165 | VR256X, VR256X, VK32WM, f16mem, |
| 108166 | /* VCVTPH2BF8SZrmbkz */ |
| 108167 | VR256X, VK32WM, f16mem, |
| 108168 | /* VCVTPH2BF8SZrmk */ |
| 108169 | VR256X, VR256X, VK32WM, f512mem, |
| 108170 | /* VCVTPH2BF8SZrmkz */ |
| 108171 | VR256X, VK32WM, f512mem, |
| 108172 | /* VCVTPH2BF8SZrr */ |
| 108173 | VR256X, VR512, |
| 108174 | /* VCVTPH2BF8SZrrk */ |
| 108175 | VR256X, VR256X, VK32WM, VR512, |
| 108176 | /* VCVTPH2BF8SZrrkz */ |
| 108177 | VR256X, VK32WM, VR512, |
| 108178 | /* VCVTPH2BF8Z128rm */ |
| 108179 | VR128X, f128mem, |
| 108180 | /* VCVTPH2BF8Z128rmb */ |
| 108181 | VR128X, f16mem, |
| 108182 | /* VCVTPH2BF8Z128rmbk */ |
| 108183 | VR128X, VR128X, VK8WM, f16mem, |
| 108184 | /* VCVTPH2BF8Z128rmbkz */ |
| 108185 | VR128X, VK8WM, f16mem, |
| 108186 | /* VCVTPH2BF8Z128rmk */ |
| 108187 | VR128X, VR128X, VK8WM, f128mem, |
| 108188 | /* VCVTPH2BF8Z128rmkz */ |
| 108189 | VR128X, VK8WM, f128mem, |
| 108190 | /* VCVTPH2BF8Z128rr */ |
| 108191 | VR128X, VR128X, |
| 108192 | /* VCVTPH2BF8Z128rrk */ |
| 108193 | VR128X, VR128X, VK8WM, VR128X, |
| 108194 | /* VCVTPH2BF8Z128rrkz */ |
| 108195 | VR128X, VK8WM, VR128X, |
| 108196 | /* VCVTPH2BF8Z256rm */ |
| 108197 | VR128X, f256mem, |
| 108198 | /* VCVTPH2BF8Z256rmb */ |
| 108199 | VR128X, f16mem, |
| 108200 | /* VCVTPH2BF8Z256rmbk */ |
| 108201 | VR128X, VR128X, VK16WM, f16mem, |
| 108202 | /* VCVTPH2BF8Z256rmbkz */ |
| 108203 | VR128X, VK16WM, f16mem, |
| 108204 | /* VCVTPH2BF8Z256rmk */ |
| 108205 | VR128X, VR128X, VK16WM, f256mem, |
| 108206 | /* VCVTPH2BF8Z256rmkz */ |
| 108207 | VR128X, VK16WM, f256mem, |
| 108208 | /* VCVTPH2BF8Z256rr */ |
| 108209 | VR128X, VR256X, |
| 108210 | /* VCVTPH2BF8Z256rrk */ |
| 108211 | VR128X, VR128X, VK16WM, VR256X, |
| 108212 | /* VCVTPH2BF8Z256rrkz */ |
| 108213 | VR128X, VK16WM, VR256X, |
| 108214 | /* VCVTPH2BF8Zrm */ |
| 108215 | VR256X, f512mem, |
| 108216 | /* VCVTPH2BF8Zrmb */ |
| 108217 | VR256X, f16mem, |
| 108218 | /* VCVTPH2BF8Zrmbk */ |
| 108219 | VR256X, VR256X, VK32WM, f16mem, |
| 108220 | /* VCVTPH2BF8Zrmbkz */ |
| 108221 | VR256X, VK32WM, f16mem, |
| 108222 | /* VCVTPH2BF8Zrmk */ |
| 108223 | VR256X, VR256X, VK32WM, f512mem, |
| 108224 | /* VCVTPH2BF8Zrmkz */ |
| 108225 | VR256X, VK32WM, f512mem, |
| 108226 | /* VCVTPH2BF8Zrr */ |
| 108227 | VR256X, VR512, |
| 108228 | /* VCVTPH2BF8Zrrk */ |
| 108229 | VR256X, VR256X, VK32WM, VR512, |
| 108230 | /* VCVTPH2BF8Zrrkz */ |
| 108231 | VR256X, VK32WM, VR512, |
| 108232 | /* VCVTPH2DQZ128rm */ |
| 108233 | VR128X, f64mem, |
| 108234 | /* VCVTPH2DQZ128rmb */ |
| 108235 | VR128X, f16mem, |
| 108236 | /* VCVTPH2DQZ128rmbk */ |
| 108237 | VR128X, VR128X, VK4WM, f16mem, |
| 108238 | /* VCVTPH2DQZ128rmbkz */ |
| 108239 | VR128X, VK4WM, f16mem, |
| 108240 | /* VCVTPH2DQZ128rmk */ |
| 108241 | VR128X, VR128X, VK4WM, f64mem, |
| 108242 | /* VCVTPH2DQZ128rmkz */ |
| 108243 | VR128X, VK4WM, f64mem, |
| 108244 | /* VCVTPH2DQZ128rr */ |
| 108245 | VR128X, VR128X, |
| 108246 | /* VCVTPH2DQZ128rrk */ |
| 108247 | VR128X, VR128X, VK4WM, VR128X, |
| 108248 | /* VCVTPH2DQZ128rrkz */ |
| 108249 | VR128X, VK4WM, VR128X, |
| 108250 | /* VCVTPH2DQZ256rm */ |
| 108251 | VR256X, f128mem, |
| 108252 | /* VCVTPH2DQZ256rmb */ |
| 108253 | VR256X, f16mem, |
| 108254 | /* VCVTPH2DQZ256rmbk */ |
| 108255 | VR256X, VR256X, VK8WM, f16mem, |
| 108256 | /* VCVTPH2DQZ256rmbkz */ |
| 108257 | VR256X, VK8WM, f16mem, |
| 108258 | /* VCVTPH2DQZ256rmk */ |
| 108259 | VR256X, VR256X, VK8WM, f128mem, |
| 108260 | /* VCVTPH2DQZ256rmkz */ |
| 108261 | VR256X, VK8WM, f128mem, |
| 108262 | /* VCVTPH2DQZ256rr */ |
| 108263 | VR256X, VR128X, |
| 108264 | /* VCVTPH2DQZ256rrk */ |
| 108265 | VR256X, VR256X, VK8WM, VR128X, |
| 108266 | /* VCVTPH2DQZ256rrkz */ |
| 108267 | VR256X, VK8WM, VR128X, |
| 108268 | /* VCVTPH2DQZrm */ |
| 108269 | VR512, f256mem, |
| 108270 | /* VCVTPH2DQZrmb */ |
| 108271 | VR512, f16mem, |
| 108272 | /* VCVTPH2DQZrmbk */ |
| 108273 | VR512, VR512, VK16WM, f16mem, |
| 108274 | /* VCVTPH2DQZrmbkz */ |
| 108275 | VR512, VK16WM, f16mem, |
| 108276 | /* VCVTPH2DQZrmk */ |
| 108277 | VR512, VR512, VK16WM, f256mem, |
| 108278 | /* VCVTPH2DQZrmkz */ |
| 108279 | VR512, VK16WM, f256mem, |
| 108280 | /* VCVTPH2DQZrr */ |
| 108281 | VR512, VR256X, |
| 108282 | /* VCVTPH2DQZrrb */ |
| 108283 | VR512, VR256X, AVX512RC, |
| 108284 | /* VCVTPH2DQZrrbk */ |
| 108285 | VR512, VR512, VK16WM, VR256X, AVX512RC, |
| 108286 | /* VCVTPH2DQZrrbkz */ |
| 108287 | VR512, VK16WM, VR256X, AVX512RC, |
| 108288 | /* VCVTPH2DQZrrk */ |
| 108289 | VR512, VR512, VK16WM, VR256X, |
| 108290 | /* VCVTPH2DQZrrkz */ |
| 108291 | VR512, VK16WM, VR256X, |
| 108292 | /* VCVTPH2HF8SZ128rm */ |
| 108293 | VR128X, f128mem, |
| 108294 | /* VCVTPH2HF8SZ128rmb */ |
| 108295 | VR128X, f16mem, |
| 108296 | /* VCVTPH2HF8SZ128rmbk */ |
| 108297 | VR128X, VR128X, VK8WM, f16mem, |
| 108298 | /* VCVTPH2HF8SZ128rmbkz */ |
| 108299 | VR128X, VK8WM, f16mem, |
| 108300 | /* VCVTPH2HF8SZ128rmk */ |
| 108301 | VR128X, VR128X, VK8WM, f128mem, |
| 108302 | /* VCVTPH2HF8SZ128rmkz */ |
| 108303 | VR128X, VK8WM, f128mem, |
| 108304 | /* VCVTPH2HF8SZ128rr */ |
| 108305 | VR128X, VR128X, |
| 108306 | /* VCVTPH2HF8SZ128rrk */ |
| 108307 | VR128X, VR128X, VK8WM, VR128X, |
| 108308 | /* VCVTPH2HF8SZ128rrkz */ |
| 108309 | VR128X, VK8WM, VR128X, |
| 108310 | /* VCVTPH2HF8SZ256rm */ |
| 108311 | VR128X, f256mem, |
| 108312 | /* VCVTPH2HF8SZ256rmb */ |
| 108313 | VR128X, f16mem, |
| 108314 | /* VCVTPH2HF8SZ256rmbk */ |
| 108315 | VR128X, VR128X, VK16WM, f16mem, |
| 108316 | /* VCVTPH2HF8SZ256rmbkz */ |
| 108317 | VR128X, VK16WM, f16mem, |
| 108318 | /* VCVTPH2HF8SZ256rmk */ |
| 108319 | VR128X, VR128X, VK16WM, f256mem, |
| 108320 | /* VCVTPH2HF8SZ256rmkz */ |
| 108321 | VR128X, VK16WM, f256mem, |
| 108322 | /* VCVTPH2HF8SZ256rr */ |
| 108323 | VR128X, VR256X, |
| 108324 | /* VCVTPH2HF8SZ256rrk */ |
| 108325 | VR128X, VR128X, VK16WM, VR256X, |
| 108326 | /* VCVTPH2HF8SZ256rrkz */ |
| 108327 | VR128X, VK16WM, VR256X, |
| 108328 | /* VCVTPH2HF8SZrm */ |
| 108329 | VR256X, f512mem, |
| 108330 | /* VCVTPH2HF8SZrmb */ |
| 108331 | VR256X, f16mem, |
| 108332 | /* VCVTPH2HF8SZrmbk */ |
| 108333 | VR256X, VR256X, VK32WM, f16mem, |
| 108334 | /* VCVTPH2HF8SZrmbkz */ |
| 108335 | VR256X, VK32WM, f16mem, |
| 108336 | /* VCVTPH2HF8SZrmk */ |
| 108337 | VR256X, VR256X, VK32WM, f512mem, |
| 108338 | /* VCVTPH2HF8SZrmkz */ |
| 108339 | VR256X, VK32WM, f512mem, |
| 108340 | /* VCVTPH2HF8SZrr */ |
| 108341 | VR256X, VR512, |
| 108342 | /* VCVTPH2HF8SZrrk */ |
| 108343 | VR256X, VR256X, VK32WM, VR512, |
| 108344 | /* VCVTPH2HF8SZrrkz */ |
| 108345 | VR256X, VK32WM, VR512, |
| 108346 | /* VCVTPH2HF8Z128rm */ |
| 108347 | VR128X, f128mem, |
| 108348 | /* VCVTPH2HF8Z128rmb */ |
| 108349 | VR128X, f16mem, |
| 108350 | /* VCVTPH2HF8Z128rmbk */ |
| 108351 | VR128X, VR128X, VK8WM, f16mem, |
| 108352 | /* VCVTPH2HF8Z128rmbkz */ |
| 108353 | VR128X, VK8WM, f16mem, |
| 108354 | /* VCVTPH2HF8Z128rmk */ |
| 108355 | VR128X, VR128X, VK8WM, f128mem, |
| 108356 | /* VCVTPH2HF8Z128rmkz */ |
| 108357 | VR128X, VK8WM, f128mem, |
| 108358 | /* VCVTPH2HF8Z128rr */ |
| 108359 | VR128X, VR128X, |
| 108360 | /* VCVTPH2HF8Z128rrk */ |
| 108361 | VR128X, VR128X, VK8WM, VR128X, |
| 108362 | /* VCVTPH2HF8Z128rrkz */ |
| 108363 | VR128X, VK8WM, VR128X, |
| 108364 | /* VCVTPH2HF8Z256rm */ |
| 108365 | VR128X, f256mem, |
| 108366 | /* VCVTPH2HF8Z256rmb */ |
| 108367 | VR128X, f16mem, |
| 108368 | /* VCVTPH2HF8Z256rmbk */ |
| 108369 | VR128X, VR128X, VK16WM, f16mem, |
| 108370 | /* VCVTPH2HF8Z256rmbkz */ |
| 108371 | VR128X, VK16WM, f16mem, |
| 108372 | /* VCVTPH2HF8Z256rmk */ |
| 108373 | VR128X, VR128X, VK16WM, f256mem, |
| 108374 | /* VCVTPH2HF8Z256rmkz */ |
| 108375 | VR128X, VK16WM, f256mem, |
| 108376 | /* VCVTPH2HF8Z256rr */ |
| 108377 | VR128X, VR256X, |
| 108378 | /* VCVTPH2HF8Z256rrk */ |
| 108379 | VR128X, VR128X, VK16WM, VR256X, |
| 108380 | /* VCVTPH2HF8Z256rrkz */ |
| 108381 | VR128X, VK16WM, VR256X, |
| 108382 | /* VCVTPH2HF8Zrm */ |
| 108383 | VR256X, f512mem, |
| 108384 | /* VCVTPH2HF8Zrmb */ |
| 108385 | VR256X, f16mem, |
| 108386 | /* VCVTPH2HF8Zrmbk */ |
| 108387 | VR256X, VR256X, VK32WM, f16mem, |
| 108388 | /* VCVTPH2HF8Zrmbkz */ |
| 108389 | VR256X, VK32WM, f16mem, |
| 108390 | /* VCVTPH2HF8Zrmk */ |
| 108391 | VR256X, VR256X, VK32WM, f512mem, |
| 108392 | /* VCVTPH2HF8Zrmkz */ |
| 108393 | VR256X, VK32WM, f512mem, |
| 108394 | /* VCVTPH2HF8Zrr */ |
| 108395 | VR256X, VR512, |
| 108396 | /* VCVTPH2HF8Zrrk */ |
| 108397 | VR256X, VR256X, VK32WM, VR512, |
| 108398 | /* VCVTPH2HF8Zrrkz */ |
| 108399 | VR256X, VK32WM, VR512, |
| 108400 | /* VCVTPH2IBSZ128rm */ |
| 108401 | VR128X, f128mem, |
| 108402 | /* VCVTPH2IBSZ128rmb */ |
| 108403 | VR128X, f16mem, |
| 108404 | /* VCVTPH2IBSZ128rmbk */ |
| 108405 | VR128X, VR128X, VK8WM, f16mem, |
| 108406 | /* VCVTPH2IBSZ128rmbkz */ |
| 108407 | VR128X, VK8WM, f16mem, |
| 108408 | /* VCVTPH2IBSZ128rmk */ |
| 108409 | VR128X, VR128X, VK8WM, f128mem, |
| 108410 | /* VCVTPH2IBSZ128rmkz */ |
| 108411 | VR128X, VK8WM, f128mem, |
| 108412 | /* VCVTPH2IBSZ128rr */ |
| 108413 | VR128X, VR128X, |
| 108414 | /* VCVTPH2IBSZ128rrk */ |
| 108415 | VR128X, VR128X, VK8WM, VR128X, |
| 108416 | /* VCVTPH2IBSZ128rrkz */ |
| 108417 | VR128X, VK8WM, VR128X, |
| 108418 | /* VCVTPH2IBSZ256rm */ |
| 108419 | VR256X, f256mem, |
| 108420 | /* VCVTPH2IBSZ256rmb */ |
| 108421 | VR256X, f16mem, |
| 108422 | /* VCVTPH2IBSZ256rmbk */ |
| 108423 | VR256X, VR256X, VK16WM, f16mem, |
| 108424 | /* VCVTPH2IBSZ256rmbkz */ |
| 108425 | VR256X, VK16WM, f16mem, |
| 108426 | /* VCVTPH2IBSZ256rmk */ |
| 108427 | VR256X, VR256X, VK16WM, f256mem, |
| 108428 | /* VCVTPH2IBSZ256rmkz */ |
| 108429 | VR256X, VK16WM, f256mem, |
| 108430 | /* VCVTPH2IBSZ256rr */ |
| 108431 | VR256X, VR256X, |
| 108432 | /* VCVTPH2IBSZ256rrk */ |
| 108433 | VR256X, VR256X, VK16WM, VR256X, |
| 108434 | /* VCVTPH2IBSZ256rrkz */ |
| 108435 | VR256X, VK16WM, VR256X, |
| 108436 | /* VCVTPH2IBSZrm */ |
| 108437 | VR512, f512mem, |
| 108438 | /* VCVTPH2IBSZrmb */ |
| 108439 | VR512, f16mem, |
| 108440 | /* VCVTPH2IBSZrmbk */ |
| 108441 | VR512, VR512, VK32WM, f16mem, |
| 108442 | /* VCVTPH2IBSZrmbkz */ |
| 108443 | VR512, VK32WM, f16mem, |
| 108444 | /* VCVTPH2IBSZrmk */ |
| 108445 | VR512, VR512, VK32WM, f512mem, |
| 108446 | /* VCVTPH2IBSZrmkz */ |
| 108447 | VR512, VK32WM, f512mem, |
| 108448 | /* VCVTPH2IBSZrr */ |
| 108449 | VR512, VR512, |
| 108450 | /* VCVTPH2IBSZrrb */ |
| 108451 | VR512, VR512, AVX512RC, |
| 108452 | /* VCVTPH2IBSZrrbk */ |
| 108453 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 108454 | /* VCVTPH2IBSZrrbkz */ |
| 108455 | VR512, VK32WM, VR512, AVX512RC, |
| 108456 | /* VCVTPH2IBSZrrk */ |
| 108457 | VR512, VR512, VK32WM, VR512, |
| 108458 | /* VCVTPH2IBSZrrkz */ |
| 108459 | VR512, VK32WM, VR512, |
| 108460 | /* VCVTPH2IUBSZ128rm */ |
| 108461 | VR128X, f128mem, |
| 108462 | /* VCVTPH2IUBSZ128rmb */ |
| 108463 | VR128X, f16mem, |
| 108464 | /* VCVTPH2IUBSZ128rmbk */ |
| 108465 | VR128X, VR128X, VK8WM, f16mem, |
| 108466 | /* VCVTPH2IUBSZ128rmbkz */ |
| 108467 | VR128X, VK8WM, f16mem, |
| 108468 | /* VCVTPH2IUBSZ128rmk */ |
| 108469 | VR128X, VR128X, VK8WM, f128mem, |
| 108470 | /* VCVTPH2IUBSZ128rmkz */ |
| 108471 | VR128X, VK8WM, f128mem, |
| 108472 | /* VCVTPH2IUBSZ128rr */ |
| 108473 | VR128X, VR128X, |
| 108474 | /* VCVTPH2IUBSZ128rrk */ |
| 108475 | VR128X, VR128X, VK8WM, VR128X, |
| 108476 | /* VCVTPH2IUBSZ128rrkz */ |
| 108477 | VR128X, VK8WM, VR128X, |
| 108478 | /* VCVTPH2IUBSZ256rm */ |
| 108479 | VR256X, f256mem, |
| 108480 | /* VCVTPH2IUBSZ256rmb */ |
| 108481 | VR256X, f16mem, |
| 108482 | /* VCVTPH2IUBSZ256rmbk */ |
| 108483 | VR256X, VR256X, VK16WM, f16mem, |
| 108484 | /* VCVTPH2IUBSZ256rmbkz */ |
| 108485 | VR256X, VK16WM, f16mem, |
| 108486 | /* VCVTPH2IUBSZ256rmk */ |
| 108487 | VR256X, VR256X, VK16WM, f256mem, |
| 108488 | /* VCVTPH2IUBSZ256rmkz */ |
| 108489 | VR256X, VK16WM, f256mem, |
| 108490 | /* VCVTPH2IUBSZ256rr */ |
| 108491 | VR256X, VR256X, |
| 108492 | /* VCVTPH2IUBSZ256rrk */ |
| 108493 | VR256X, VR256X, VK16WM, VR256X, |
| 108494 | /* VCVTPH2IUBSZ256rrkz */ |
| 108495 | VR256X, VK16WM, VR256X, |
| 108496 | /* VCVTPH2IUBSZrm */ |
| 108497 | VR512, f512mem, |
| 108498 | /* VCVTPH2IUBSZrmb */ |
| 108499 | VR512, f16mem, |
| 108500 | /* VCVTPH2IUBSZrmbk */ |
| 108501 | VR512, VR512, VK32WM, f16mem, |
| 108502 | /* VCVTPH2IUBSZrmbkz */ |
| 108503 | VR512, VK32WM, f16mem, |
| 108504 | /* VCVTPH2IUBSZrmk */ |
| 108505 | VR512, VR512, VK32WM, f512mem, |
| 108506 | /* VCVTPH2IUBSZrmkz */ |
| 108507 | VR512, VK32WM, f512mem, |
| 108508 | /* VCVTPH2IUBSZrr */ |
| 108509 | VR512, VR512, |
| 108510 | /* VCVTPH2IUBSZrrb */ |
| 108511 | VR512, VR512, AVX512RC, |
| 108512 | /* VCVTPH2IUBSZrrbk */ |
| 108513 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 108514 | /* VCVTPH2IUBSZrrbkz */ |
| 108515 | VR512, VK32WM, VR512, AVX512RC, |
| 108516 | /* VCVTPH2IUBSZrrk */ |
| 108517 | VR512, VR512, VK32WM, VR512, |
| 108518 | /* VCVTPH2IUBSZrrkz */ |
| 108519 | VR512, VK32WM, VR512, |
| 108520 | /* VCVTPH2PDZ128rm */ |
| 108521 | VR128X, f32mem, |
| 108522 | /* VCVTPH2PDZ128rmb */ |
| 108523 | VR128X, f16mem, |
| 108524 | /* VCVTPH2PDZ128rmbk */ |
| 108525 | VR128X, VR128X, VK2WM, f16mem, |
| 108526 | /* VCVTPH2PDZ128rmbkz */ |
| 108527 | VR128X, VK2WM, f16mem, |
| 108528 | /* VCVTPH2PDZ128rmk */ |
| 108529 | VR128X, VR128X, VK2WM, f32mem, |
| 108530 | /* VCVTPH2PDZ128rmkz */ |
| 108531 | VR128X, VK2WM, f32mem, |
| 108532 | /* VCVTPH2PDZ128rr */ |
| 108533 | VR128X, VR128X, |
| 108534 | /* VCVTPH2PDZ128rrk */ |
| 108535 | VR128X, VR128X, VK2WM, VR128X, |
| 108536 | /* VCVTPH2PDZ128rrkz */ |
| 108537 | VR128X, VK2WM, VR128X, |
| 108538 | /* VCVTPH2PDZ256rm */ |
| 108539 | VR256X, f64mem, |
| 108540 | /* VCVTPH2PDZ256rmb */ |
| 108541 | VR256X, f16mem, |
| 108542 | /* VCVTPH2PDZ256rmbk */ |
| 108543 | VR256X, VR256X, VK4WM, f16mem, |
| 108544 | /* VCVTPH2PDZ256rmbkz */ |
| 108545 | VR256X, VK4WM, f16mem, |
| 108546 | /* VCVTPH2PDZ256rmk */ |
| 108547 | VR256X, VR256X, VK4WM, f64mem, |
| 108548 | /* VCVTPH2PDZ256rmkz */ |
| 108549 | VR256X, VK4WM, f64mem, |
| 108550 | /* VCVTPH2PDZ256rr */ |
| 108551 | VR256X, VR128X, |
| 108552 | /* VCVTPH2PDZ256rrk */ |
| 108553 | VR256X, VR256X, VK4WM, VR128X, |
| 108554 | /* VCVTPH2PDZ256rrkz */ |
| 108555 | VR256X, VK4WM, VR128X, |
| 108556 | /* VCVTPH2PDZrm */ |
| 108557 | VR512, f128mem, |
| 108558 | /* VCVTPH2PDZrmb */ |
| 108559 | VR512, f16mem, |
| 108560 | /* VCVTPH2PDZrmbk */ |
| 108561 | VR512, VR512, VK8WM, f16mem, |
| 108562 | /* VCVTPH2PDZrmbkz */ |
| 108563 | VR512, VK8WM, f16mem, |
| 108564 | /* VCVTPH2PDZrmk */ |
| 108565 | VR512, VR512, VK8WM, f128mem, |
| 108566 | /* VCVTPH2PDZrmkz */ |
| 108567 | VR512, VK8WM, f128mem, |
| 108568 | /* VCVTPH2PDZrr */ |
| 108569 | VR512, VR128X, |
| 108570 | /* VCVTPH2PDZrrb */ |
| 108571 | VR512, VR128X, |
| 108572 | /* VCVTPH2PDZrrbk */ |
| 108573 | VR512, VR512, VK8WM, VR128X, |
| 108574 | /* VCVTPH2PDZrrbkz */ |
| 108575 | VR512, VK8WM, VR128X, |
| 108576 | /* VCVTPH2PDZrrk */ |
| 108577 | VR512, VR512, VK8WM, VR128X, |
| 108578 | /* VCVTPH2PDZrrkz */ |
| 108579 | VR512, VK8WM, VR128X, |
| 108580 | /* VCVTPH2PSXZ128rm */ |
| 108581 | VR128X, f64mem, |
| 108582 | /* VCVTPH2PSXZ128rmb */ |
| 108583 | VR128X, f16mem, |
| 108584 | /* VCVTPH2PSXZ128rmbk */ |
| 108585 | VR128X, VR128X, VK4WM, f16mem, |
| 108586 | /* VCVTPH2PSXZ128rmbkz */ |
| 108587 | VR128X, VK4WM, f16mem, |
| 108588 | /* VCVTPH2PSXZ128rmk */ |
| 108589 | VR128X, VR128X, VK4WM, f64mem, |
| 108590 | /* VCVTPH2PSXZ128rmkz */ |
| 108591 | VR128X, VK4WM, f64mem, |
| 108592 | /* VCVTPH2PSXZ128rr */ |
| 108593 | VR128X, VR128X, |
| 108594 | /* VCVTPH2PSXZ128rrk */ |
| 108595 | VR128X, VR128X, VK4WM, VR128X, |
| 108596 | /* VCVTPH2PSXZ128rrkz */ |
| 108597 | VR128X, VK4WM, VR128X, |
| 108598 | /* VCVTPH2PSXZ256rm */ |
| 108599 | VR256X, f128mem, |
| 108600 | /* VCVTPH2PSXZ256rmb */ |
| 108601 | VR256X, f16mem, |
| 108602 | /* VCVTPH2PSXZ256rmbk */ |
| 108603 | VR256X, VR256X, VK8WM, f16mem, |
| 108604 | /* VCVTPH2PSXZ256rmbkz */ |
| 108605 | VR256X, VK8WM, f16mem, |
| 108606 | /* VCVTPH2PSXZ256rmk */ |
| 108607 | VR256X, VR256X, VK8WM, f128mem, |
| 108608 | /* VCVTPH2PSXZ256rmkz */ |
| 108609 | VR256X, VK8WM, f128mem, |
| 108610 | /* VCVTPH2PSXZ256rr */ |
| 108611 | VR256X, VR128X, |
| 108612 | /* VCVTPH2PSXZ256rrk */ |
| 108613 | VR256X, VR256X, VK8WM, VR128X, |
| 108614 | /* VCVTPH2PSXZ256rrkz */ |
| 108615 | VR256X, VK8WM, VR128X, |
| 108616 | /* VCVTPH2PSXZrm */ |
| 108617 | VR512, f256mem, |
| 108618 | /* VCVTPH2PSXZrmb */ |
| 108619 | VR512, f16mem, |
| 108620 | /* VCVTPH2PSXZrmbk */ |
| 108621 | VR512, VR512, VK16WM, f16mem, |
| 108622 | /* VCVTPH2PSXZrmbkz */ |
| 108623 | VR512, VK16WM, f16mem, |
| 108624 | /* VCVTPH2PSXZrmk */ |
| 108625 | VR512, VR512, VK16WM, f256mem, |
| 108626 | /* VCVTPH2PSXZrmkz */ |
| 108627 | VR512, VK16WM, f256mem, |
| 108628 | /* VCVTPH2PSXZrr */ |
| 108629 | VR512, VR256X, |
| 108630 | /* VCVTPH2PSXZrrb */ |
| 108631 | VR512, VR256X, |
| 108632 | /* VCVTPH2PSXZrrbk */ |
| 108633 | VR512, VR512, VK16WM, VR256X, |
| 108634 | /* VCVTPH2PSXZrrbkz */ |
| 108635 | VR512, VK16WM, VR256X, |
| 108636 | /* VCVTPH2PSXZrrk */ |
| 108637 | VR512, VR512, VK16WM, VR256X, |
| 108638 | /* VCVTPH2PSXZrrkz */ |
| 108639 | VR512, VK16WM, VR256X, |
| 108640 | /* VCVTPH2PSYrm */ |
| 108641 | VR256, f128mem, |
| 108642 | /* VCVTPH2PSYrr */ |
| 108643 | VR256, VR128, |
| 108644 | /* VCVTPH2PSZ128rm */ |
| 108645 | VR128X, f64mem, |
| 108646 | /* VCVTPH2PSZ128rmk */ |
| 108647 | VR128X, VR128X, VK4WM, f64mem, |
| 108648 | /* VCVTPH2PSZ128rmkz */ |
| 108649 | VR128X, VK4WM, f64mem, |
| 108650 | /* VCVTPH2PSZ128rr */ |
| 108651 | VR128X, VR128X, |
| 108652 | /* VCVTPH2PSZ128rrk */ |
| 108653 | VR128X, VR128X, VK4WM, VR128X, |
| 108654 | /* VCVTPH2PSZ128rrkz */ |
| 108655 | VR128X, VK4WM, VR128X, |
| 108656 | /* VCVTPH2PSZ256rm */ |
| 108657 | VR256X, f128mem, |
| 108658 | /* VCVTPH2PSZ256rmk */ |
| 108659 | VR256X, VR256X, VK8WM, f128mem, |
| 108660 | /* VCVTPH2PSZ256rmkz */ |
| 108661 | VR256X, VK8WM, f128mem, |
| 108662 | /* VCVTPH2PSZ256rr */ |
| 108663 | VR256X, VR128X, |
| 108664 | /* VCVTPH2PSZ256rrk */ |
| 108665 | VR256X, VR256X, VK8WM, VR128X, |
| 108666 | /* VCVTPH2PSZ256rrkz */ |
| 108667 | VR256X, VK8WM, VR128X, |
| 108668 | /* VCVTPH2PSZrm */ |
| 108669 | VR512, f256mem, |
| 108670 | /* VCVTPH2PSZrmk */ |
| 108671 | VR512, VR512, VK16WM, f256mem, |
| 108672 | /* VCVTPH2PSZrmkz */ |
| 108673 | VR512, VK16WM, f256mem, |
| 108674 | /* VCVTPH2PSZrr */ |
| 108675 | VR512, VR256X, |
| 108676 | /* VCVTPH2PSZrrb */ |
| 108677 | VR512, VR256X, |
| 108678 | /* VCVTPH2PSZrrbk */ |
| 108679 | VR512, VR512, VK16WM, VR256X, |
| 108680 | /* VCVTPH2PSZrrbkz */ |
| 108681 | VR512, VK16WM, VR256X, |
| 108682 | /* VCVTPH2PSZrrk */ |
| 108683 | VR512, VR512, VK16WM, VR256X, |
| 108684 | /* VCVTPH2PSZrrkz */ |
| 108685 | VR512, VK16WM, VR256X, |
| 108686 | /* VCVTPH2PSrm */ |
| 108687 | VR128, f64mem, |
| 108688 | /* VCVTPH2PSrr */ |
| 108689 | VR128, VR128, |
| 108690 | /* VCVTPH2QQZ128rm */ |
| 108691 | VR128X, f32mem, |
| 108692 | /* VCVTPH2QQZ128rmb */ |
| 108693 | VR128X, f16mem, |
| 108694 | /* VCVTPH2QQZ128rmbk */ |
| 108695 | VR128X, VR128X, VK2WM, f16mem, |
| 108696 | /* VCVTPH2QQZ128rmbkz */ |
| 108697 | VR128X, VK2WM, f16mem, |
| 108698 | /* VCVTPH2QQZ128rmk */ |
| 108699 | VR128X, VR128X, VK2WM, f32mem, |
| 108700 | /* VCVTPH2QQZ128rmkz */ |
| 108701 | VR128X, VK2WM, f32mem, |
| 108702 | /* VCVTPH2QQZ128rr */ |
| 108703 | VR128X, VR128X, |
| 108704 | /* VCVTPH2QQZ128rrk */ |
| 108705 | VR128X, VR128X, VK2WM, VR128X, |
| 108706 | /* VCVTPH2QQZ128rrkz */ |
| 108707 | VR128X, VK2WM, VR128X, |
| 108708 | /* VCVTPH2QQZ256rm */ |
| 108709 | VR256X, f64mem, |
| 108710 | /* VCVTPH2QQZ256rmb */ |
| 108711 | VR256X, f16mem, |
| 108712 | /* VCVTPH2QQZ256rmbk */ |
| 108713 | VR256X, VR256X, VK4WM, f16mem, |
| 108714 | /* VCVTPH2QQZ256rmbkz */ |
| 108715 | VR256X, VK4WM, f16mem, |
| 108716 | /* VCVTPH2QQZ256rmk */ |
| 108717 | VR256X, VR256X, VK4WM, f64mem, |
| 108718 | /* VCVTPH2QQZ256rmkz */ |
| 108719 | VR256X, VK4WM, f64mem, |
| 108720 | /* VCVTPH2QQZ256rr */ |
| 108721 | VR256X, VR128X, |
| 108722 | /* VCVTPH2QQZ256rrk */ |
| 108723 | VR256X, VR256X, VK4WM, VR128X, |
| 108724 | /* VCVTPH2QQZ256rrkz */ |
| 108725 | VR256X, VK4WM, VR128X, |
| 108726 | /* VCVTPH2QQZrm */ |
| 108727 | VR512, f128mem, |
| 108728 | /* VCVTPH2QQZrmb */ |
| 108729 | VR512, f16mem, |
| 108730 | /* VCVTPH2QQZrmbk */ |
| 108731 | VR512, VR512, VK8WM, f16mem, |
| 108732 | /* VCVTPH2QQZrmbkz */ |
| 108733 | VR512, VK8WM, f16mem, |
| 108734 | /* VCVTPH2QQZrmk */ |
| 108735 | VR512, VR512, VK8WM, f128mem, |
| 108736 | /* VCVTPH2QQZrmkz */ |
| 108737 | VR512, VK8WM, f128mem, |
| 108738 | /* VCVTPH2QQZrr */ |
| 108739 | VR512, VR128X, |
| 108740 | /* VCVTPH2QQZrrb */ |
| 108741 | VR512, VR128X, AVX512RC, |
| 108742 | /* VCVTPH2QQZrrbk */ |
| 108743 | VR512, VR512, VK8WM, VR128X, AVX512RC, |
| 108744 | /* VCVTPH2QQZrrbkz */ |
| 108745 | VR512, VK8WM, VR128X, AVX512RC, |
| 108746 | /* VCVTPH2QQZrrk */ |
| 108747 | VR512, VR512, VK8WM, VR128X, |
| 108748 | /* VCVTPH2QQZrrkz */ |
| 108749 | VR512, VK8WM, VR128X, |
| 108750 | /* VCVTPH2UDQZ128rm */ |
| 108751 | VR128X, f64mem, |
| 108752 | /* VCVTPH2UDQZ128rmb */ |
| 108753 | VR128X, f16mem, |
| 108754 | /* VCVTPH2UDQZ128rmbk */ |
| 108755 | VR128X, VR128X, VK4WM, f16mem, |
| 108756 | /* VCVTPH2UDQZ128rmbkz */ |
| 108757 | VR128X, VK4WM, f16mem, |
| 108758 | /* VCVTPH2UDQZ128rmk */ |
| 108759 | VR128X, VR128X, VK4WM, f64mem, |
| 108760 | /* VCVTPH2UDQZ128rmkz */ |
| 108761 | VR128X, VK4WM, f64mem, |
| 108762 | /* VCVTPH2UDQZ128rr */ |
| 108763 | VR128X, VR128X, |
| 108764 | /* VCVTPH2UDQZ128rrk */ |
| 108765 | VR128X, VR128X, VK4WM, VR128X, |
| 108766 | /* VCVTPH2UDQZ128rrkz */ |
| 108767 | VR128X, VK4WM, VR128X, |
| 108768 | /* VCVTPH2UDQZ256rm */ |
| 108769 | VR256X, f128mem, |
| 108770 | /* VCVTPH2UDQZ256rmb */ |
| 108771 | VR256X, f16mem, |
| 108772 | /* VCVTPH2UDQZ256rmbk */ |
| 108773 | VR256X, VR256X, VK8WM, f16mem, |
| 108774 | /* VCVTPH2UDQZ256rmbkz */ |
| 108775 | VR256X, VK8WM, f16mem, |
| 108776 | /* VCVTPH2UDQZ256rmk */ |
| 108777 | VR256X, VR256X, VK8WM, f128mem, |
| 108778 | /* VCVTPH2UDQZ256rmkz */ |
| 108779 | VR256X, VK8WM, f128mem, |
| 108780 | /* VCVTPH2UDQZ256rr */ |
| 108781 | VR256X, VR128X, |
| 108782 | /* VCVTPH2UDQZ256rrk */ |
| 108783 | VR256X, VR256X, VK8WM, VR128X, |
| 108784 | /* VCVTPH2UDQZ256rrkz */ |
| 108785 | VR256X, VK8WM, VR128X, |
| 108786 | /* VCVTPH2UDQZrm */ |
| 108787 | VR512, f256mem, |
| 108788 | /* VCVTPH2UDQZrmb */ |
| 108789 | VR512, f16mem, |
| 108790 | /* VCVTPH2UDQZrmbk */ |
| 108791 | VR512, VR512, VK16WM, f16mem, |
| 108792 | /* VCVTPH2UDQZrmbkz */ |
| 108793 | VR512, VK16WM, f16mem, |
| 108794 | /* VCVTPH2UDQZrmk */ |
| 108795 | VR512, VR512, VK16WM, f256mem, |
| 108796 | /* VCVTPH2UDQZrmkz */ |
| 108797 | VR512, VK16WM, f256mem, |
| 108798 | /* VCVTPH2UDQZrr */ |
| 108799 | VR512, VR256X, |
| 108800 | /* VCVTPH2UDQZrrb */ |
| 108801 | VR512, VR256X, AVX512RC, |
| 108802 | /* VCVTPH2UDQZrrbk */ |
| 108803 | VR512, VR512, VK16WM, VR256X, AVX512RC, |
| 108804 | /* VCVTPH2UDQZrrbkz */ |
| 108805 | VR512, VK16WM, VR256X, AVX512RC, |
| 108806 | /* VCVTPH2UDQZrrk */ |
| 108807 | VR512, VR512, VK16WM, VR256X, |
| 108808 | /* VCVTPH2UDQZrrkz */ |
| 108809 | VR512, VK16WM, VR256X, |
| 108810 | /* VCVTPH2UQQZ128rm */ |
| 108811 | VR128X, f32mem, |
| 108812 | /* VCVTPH2UQQZ128rmb */ |
| 108813 | VR128X, f16mem, |
| 108814 | /* VCVTPH2UQQZ128rmbk */ |
| 108815 | VR128X, VR128X, VK2WM, f16mem, |
| 108816 | /* VCVTPH2UQQZ128rmbkz */ |
| 108817 | VR128X, VK2WM, f16mem, |
| 108818 | /* VCVTPH2UQQZ128rmk */ |
| 108819 | VR128X, VR128X, VK2WM, f32mem, |
| 108820 | /* VCVTPH2UQQZ128rmkz */ |
| 108821 | VR128X, VK2WM, f32mem, |
| 108822 | /* VCVTPH2UQQZ128rr */ |
| 108823 | VR128X, VR128X, |
| 108824 | /* VCVTPH2UQQZ128rrk */ |
| 108825 | VR128X, VR128X, VK2WM, VR128X, |
| 108826 | /* VCVTPH2UQQZ128rrkz */ |
| 108827 | VR128X, VK2WM, VR128X, |
| 108828 | /* VCVTPH2UQQZ256rm */ |
| 108829 | VR256X, f64mem, |
| 108830 | /* VCVTPH2UQQZ256rmb */ |
| 108831 | VR256X, f16mem, |
| 108832 | /* VCVTPH2UQQZ256rmbk */ |
| 108833 | VR256X, VR256X, VK4WM, f16mem, |
| 108834 | /* VCVTPH2UQQZ256rmbkz */ |
| 108835 | VR256X, VK4WM, f16mem, |
| 108836 | /* VCVTPH2UQQZ256rmk */ |
| 108837 | VR256X, VR256X, VK4WM, f64mem, |
| 108838 | /* VCVTPH2UQQZ256rmkz */ |
| 108839 | VR256X, VK4WM, f64mem, |
| 108840 | /* VCVTPH2UQQZ256rr */ |
| 108841 | VR256X, VR128X, |
| 108842 | /* VCVTPH2UQQZ256rrk */ |
| 108843 | VR256X, VR256X, VK4WM, VR128X, |
| 108844 | /* VCVTPH2UQQZ256rrkz */ |
| 108845 | VR256X, VK4WM, VR128X, |
| 108846 | /* VCVTPH2UQQZrm */ |
| 108847 | VR512, f128mem, |
| 108848 | /* VCVTPH2UQQZrmb */ |
| 108849 | VR512, f16mem, |
| 108850 | /* VCVTPH2UQQZrmbk */ |
| 108851 | VR512, VR512, VK8WM, f16mem, |
| 108852 | /* VCVTPH2UQQZrmbkz */ |
| 108853 | VR512, VK8WM, f16mem, |
| 108854 | /* VCVTPH2UQQZrmk */ |
| 108855 | VR512, VR512, VK8WM, f128mem, |
| 108856 | /* VCVTPH2UQQZrmkz */ |
| 108857 | VR512, VK8WM, f128mem, |
| 108858 | /* VCVTPH2UQQZrr */ |
| 108859 | VR512, VR128X, |
| 108860 | /* VCVTPH2UQQZrrb */ |
| 108861 | VR512, VR128X, AVX512RC, |
| 108862 | /* VCVTPH2UQQZrrbk */ |
| 108863 | VR512, VR512, VK8WM, VR128X, AVX512RC, |
| 108864 | /* VCVTPH2UQQZrrbkz */ |
| 108865 | VR512, VK8WM, VR128X, AVX512RC, |
| 108866 | /* VCVTPH2UQQZrrk */ |
| 108867 | VR512, VR512, VK8WM, VR128X, |
| 108868 | /* VCVTPH2UQQZrrkz */ |
| 108869 | VR512, VK8WM, VR128X, |
| 108870 | /* VCVTPH2UWZ128rm */ |
| 108871 | VR128X, f128mem, |
| 108872 | /* VCVTPH2UWZ128rmb */ |
| 108873 | VR128X, f16mem, |
| 108874 | /* VCVTPH2UWZ128rmbk */ |
| 108875 | VR128X, VR128X, VK8WM, f16mem, |
| 108876 | /* VCVTPH2UWZ128rmbkz */ |
| 108877 | VR128X, VK8WM, f16mem, |
| 108878 | /* VCVTPH2UWZ128rmk */ |
| 108879 | VR128X, VR128X, VK8WM, f128mem, |
| 108880 | /* VCVTPH2UWZ128rmkz */ |
| 108881 | VR128X, VK8WM, f128mem, |
| 108882 | /* VCVTPH2UWZ128rr */ |
| 108883 | VR128X, VR128X, |
| 108884 | /* VCVTPH2UWZ128rrk */ |
| 108885 | VR128X, VR128X, VK8WM, VR128X, |
| 108886 | /* VCVTPH2UWZ128rrkz */ |
| 108887 | VR128X, VK8WM, VR128X, |
| 108888 | /* VCVTPH2UWZ256rm */ |
| 108889 | VR256X, f256mem, |
| 108890 | /* VCVTPH2UWZ256rmb */ |
| 108891 | VR256X, f16mem, |
| 108892 | /* VCVTPH2UWZ256rmbk */ |
| 108893 | VR256X, VR256X, VK16WM, f16mem, |
| 108894 | /* VCVTPH2UWZ256rmbkz */ |
| 108895 | VR256X, VK16WM, f16mem, |
| 108896 | /* VCVTPH2UWZ256rmk */ |
| 108897 | VR256X, VR256X, VK16WM, f256mem, |
| 108898 | /* VCVTPH2UWZ256rmkz */ |
| 108899 | VR256X, VK16WM, f256mem, |
| 108900 | /* VCVTPH2UWZ256rr */ |
| 108901 | VR256X, VR256X, |
| 108902 | /* VCVTPH2UWZ256rrk */ |
| 108903 | VR256X, VR256X, VK16WM, VR256X, |
| 108904 | /* VCVTPH2UWZ256rrkz */ |
| 108905 | VR256X, VK16WM, VR256X, |
| 108906 | /* VCVTPH2UWZrm */ |
| 108907 | VR512, f512mem, |
| 108908 | /* VCVTPH2UWZrmb */ |
| 108909 | VR512, f16mem, |
| 108910 | /* VCVTPH2UWZrmbk */ |
| 108911 | VR512, VR512, VK32WM, f16mem, |
| 108912 | /* VCVTPH2UWZrmbkz */ |
| 108913 | VR512, VK32WM, f16mem, |
| 108914 | /* VCVTPH2UWZrmk */ |
| 108915 | VR512, VR512, VK32WM, f512mem, |
| 108916 | /* VCVTPH2UWZrmkz */ |
| 108917 | VR512, VK32WM, f512mem, |
| 108918 | /* VCVTPH2UWZrr */ |
| 108919 | VR512, VR512, |
| 108920 | /* VCVTPH2UWZrrb */ |
| 108921 | VR512, VR512, AVX512RC, |
| 108922 | /* VCVTPH2UWZrrbk */ |
| 108923 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 108924 | /* VCVTPH2UWZrrbkz */ |
| 108925 | VR512, VK32WM, VR512, AVX512RC, |
| 108926 | /* VCVTPH2UWZrrk */ |
| 108927 | VR512, VR512, VK32WM, VR512, |
| 108928 | /* VCVTPH2UWZrrkz */ |
| 108929 | VR512, VK32WM, VR512, |
| 108930 | /* VCVTPH2WZ128rm */ |
| 108931 | VR128X, f128mem, |
| 108932 | /* VCVTPH2WZ128rmb */ |
| 108933 | VR128X, f16mem, |
| 108934 | /* VCVTPH2WZ128rmbk */ |
| 108935 | VR128X, VR128X, VK8WM, f16mem, |
| 108936 | /* VCVTPH2WZ128rmbkz */ |
| 108937 | VR128X, VK8WM, f16mem, |
| 108938 | /* VCVTPH2WZ128rmk */ |
| 108939 | VR128X, VR128X, VK8WM, f128mem, |
| 108940 | /* VCVTPH2WZ128rmkz */ |
| 108941 | VR128X, VK8WM, f128mem, |
| 108942 | /* VCVTPH2WZ128rr */ |
| 108943 | VR128X, VR128X, |
| 108944 | /* VCVTPH2WZ128rrk */ |
| 108945 | VR128X, VR128X, VK8WM, VR128X, |
| 108946 | /* VCVTPH2WZ128rrkz */ |
| 108947 | VR128X, VK8WM, VR128X, |
| 108948 | /* VCVTPH2WZ256rm */ |
| 108949 | VR256X, f256mem, |
| 108950 | /* VCVTPH2WZ256rmb */ |
| 108951 | VR256X, f16mem, |
| 108952 | /* VCVTPH2WZ256rmbk */ |
| 108953 | VR256X, VR256X, VK16WM, f16mem, |
| 108954 | /* VCVTPH2WZ256rmbkz */ |
| 108955 | VR256X, VK16WM, f16mem, |
| 108956 | /* VCVTPH2WZ256rmk */ |
| 108957 | VR256X, VR256X, VK16WM, f256mem, |
| 108958 | /* VCVTPH2WZ256rmkz */ |
| 108959 | VR256X, VK16WM, f256mem, |
| 108960 | /* VCVTPH2WZ256rr */ |
| 108961 | VR256X, VR256X, |
| 108962 | /* VCVTPH2WZ256rrk */ |
| 108963 | VR256X, VR256X, VK16WM, VR256X, |
| 108964 | /* VCVTPH2WZ256rrkz */ |
| 108965 | VR256X, VK16WM, VR256X, |
| 108966 | /* VCVTPH2WZrm */ |
| 108967 | VR512, f512mem, |
| 108968 | /* VCVTPH2WZrmb */ |
| 108969 | VR512, f16mem, |
| 108970 | /* VCVTPH2WZrmbk */ |
| 108971 | VR512, VR512, VK32WM, f16mem, |
| 108972 | /* VCVTPH2WZrmbkz */ |
| 108973 | VR512, VK32WM, f16mem, |
| 108974 | /* VCVTPH2WZrmk */ |
| 108975 | VR512, VR512, VK32WM, f512mem, |
| 108976 | /* VCVTPH2WZrmkz */ |
| 108977 | VR512, VK32WM, f512mem, |
| 108978 | /* VCVTPH2WZrr */ |
| 108979 | VR512, VR512, |
| 108980 | /* VCVTPH2WZrrb */ |
| 108981 | VR512, VR512, AVX512RC, |
| 108982 | /* VCVTPH2WZrrbk */ |
| 108983 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 108984 | /* VCVTPH2WZrrbkz */ |
| 108985 | VR512, VK32WM, VR512, AVX512RC, |
| 108986 | /* VCVTPH2WZrrk */ |
| 108987 | VR512, VR512, VK32WM, VR512, |
| 108988 | /* VCVTPH2WZrrkz */ |
| 108989 | VR512, VK32WM, VR512, |
| 108990 | /* VCVTPS2DQYrm */ |
| 108991 | VR256, f256mem, |
| 108992 | /* VCVTPS2DQYrr */ |
| 108993 | VR256, VR256, |
| 108994 | /* VCVTPS2DQZ128rm */ |
| 108995 | VR128X, f128mem, |
| 108996 | /* VCVTPS2DQZ128rmb */ |
| 108997 | VR128X, f32mem, |
| 108998 | /* VCVTPS2DQZ128rmbk */ |
| 108999 | VR128X, VR128X, VK4WM, f32mem, |
| 109000 | /* VCVTPS2DQZ128rmbkz */ |
| 109001 | VR128X, VK4WM, f32mem, |
| 109002 | /* VCVTPS2DQZ128rmk */ |
| 109003 | VR128X, VR128X, VK4WM, f128mem, |
| 109004 | /* VCVTPS2DQZ128rmkz */ |
| 109005 | VR128X, VK4WM, f128mem, |
| 109006 | /* VCVTPS2DQZ128rr */ |
| 109007 | VR128X, VR128X, |
| 109008 | /* VCVTPS2DQZ128rrk */ |
| 109009 | VR128X, VR128X, VK4WM, VR128X, |
| 109010 | /* VCVTPS2DQZ128rrkz */ |
| 109011 | VR128X, VK4WM, VR128X, |
| 109012 | /* VCVTPS2DQZ256rm */ |
| 109013 | VR256X, f256mem, |
| 109014 | /* VCVTPS2DQZ256rmb */ |
| 109015 | VR256X, f32mem, |
| 109016 | /* VCVTPS2DQZ256rmbk */ |
| 109017 | VR256X, VR256X, VK8WM, f32mem, |
| 109018 | /* VCVTPS2DQZ256rmbkz */ |
| 109019 | VR256X, VK8WM, f32mem, |
| 109020 | /* VCVTPS2DQZ256rmk */ |
| 109021 | VR256X, VR256X, VK8WM, f256mem, |
| 109022 | /* VCVTPS2DQZ256rmkz */ |
| 109023 | VR256X, VK8WM, f256mem, |
| 109024 | /* VCVTPS2DQZ256rr */ |
| 109025 | VR256X, VR256X, |
| 109026 | /* VCVTPS2DQZ256rrk */ |
| 109027 | VR256X, VR256X, VK8WM, VR256X, |
| 109028 | /* VCVTPS2DQZ256rrkz */ |
| 109029 | VR256X, VK8WM, VR256X, |
| 109030 | /* VCVTPS2DQZrm */ |
| 109031 | VR512, f512mem, |
| 109032 | /* VCVTPS2DQZrmb */ |
| 109033 | VR512, f32mem, |
| 109034 | /* VCVTPS2DQZrmbk */ |
| 109035 | VR512, VR512, VK16WM, f32mem, |
| 109036 | /* VCVTPS2DQZrmbkz */ |
| 109037 | VR512, VK16WM, f32mem, |
| 109038 | /* VCVTPS2DQZrmk */ |
| 109039 | VR512, VR512, VK16WM, f512mem, |
| 109040 | /* VCVTPS2DQZrmkz */ |
| 109041 | VR512, VK16WM, f512mem, |
| 109042 | /* VCVTPS2DQZrr */ |
| 109043 | VR512, VR512, |
| 109044 | /* VCVTPS2DQZrrb */ |
| 109045 | VR512, VR512, AVX512RC, |
| 109046 | /* VCVTPS2DQZrrbk */ |
| 109047 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 109048 | /* VCVTPS2DQZrrbkz */ |
| 109049 | VR512, VK16WM, VR512, AVX512RC, |
| 109050 | /* VCVTPS2DQZrrk */ |
| 109051 | VR512, VR512, VK16WM, VR512, |
| 109052 | /* VCVTPS2DQZrrkz */ |
| 109053 | VR512, VK16WM, VR512, |
| 109054 | /* VCVTPS2DQrm */ |
| 109055 | VR128, f128mem, |
| 109056 | /* VCVTPS2DQrr */ |
| 109057 | VR128, VR128, |
| 109058 | /* VCVTPS2IBSZ128rm */ |
| 109059 | VR128X, f128mem, |
| 109060 | /* VCVTPS2IBSZ128rmb */ |
| 109061 | VR128X, f32mem, |
| 109062 | /* VCVTPS2IBSZ128rmbk */ |
| 109063 | VR128X, VR128X, VK4WM, f32mem, |
| 109064 | /* VCVTPS2IBSZ128rmbkz */ |
| 109065 | VR128X, VK4WM, f32mem, |
| 109066 | /* VCVTPS2IBSZ128rmk */ |
| 109067 | VR128X, VR128X, VK4WM, f128mem, |
| 109068 | /* VCVTPS2IBSZ128rmkz */ |
| 109069 | VR128X, VK4WM, f128mem, |
| 109070 | /* VCVTPS2IBSZ128rr */ |
| 109071 | VR128X, VR128X, |
| 109072 | /* VCVTPS2IBSZ128rrk */ |
| 109073 | VR128X, VR128X, VK4WM, VR128X, |
| 109074 | /* VCVTPS2IBSZ128rrkz */ |
| 109075 | VR128X, VK4WM, VR128X, |
| 109076 | /* VCVTPS2IBSZ256rm */ |
| 109077 | VR256X, f256mem, |
| 109078 | /* VCVTPS2IBSZ256rmb */ |
| 109079 | VR256X, f32mem, |
| 109080 | /* VCVTPS2IBSZ256rmbk */ |
| 109081 | VR256X, VR256X, VK8WM, f32mem, |
| 109082 | /* VCVTPS2IBSZ256rmbkz */ |
| 109083 | VR256X, VK8WM, f32mem, |
| 109084 | /* VCVTPS2IBSZ256rmk */ |
| 109085 | VR256X, VR256X, VK8WM, f256mem, |
| 109086 | /* VCVTPS2IBSZ256rmkz */ |
| 109087 | VR256X, VK8WM, f256mem, |
| 109088 | /* VCVTPS2IBSZ256rr */ |
| 109089 | VR256X, VR256X, |
| 109090 | /* VCVTPS2IBSZ256rrk */ |
| 109091 | VR256X, VR256X, VK8WM, VR256X, |
| 109092 | /* VCVTPS2IBSZ256rrkz */ |
| 109093 | VR256X, VK8WM, VR256X, |
| 109094 | /* VCVTPS2IBSZrm */ |
| 109095 | VR512, f512mem, |
| 109096 | /* VCVTPS2IBSZrmb */ |
| 109097 | VR512, f32mem, |
| 109098 | /* VCVTPS2IBSZrmbk */ |
| 109099 | VR512, VR512, VK16WM, f32mem, |
| 109100 | /* VCVTPS2IBSZrmbkz */ |
| 109101 | VR512, VK16WM, f32mem, |
| 109102 | /* VCVTPS2IBSZrmk */ |
| 109103 | VR512, VR512, VK16WM, f512mem, |
| 109104 | /* VCVTPS2IBSZrmkz */ |
| 109105 | VR512, VK16WM, f512mem, |
| 109106 | /* VCVTPS2IBSZrr */ |
| 109107 | VR512, VR512, |
| 109108 | /* VCVTPS2IBSZrrb */ |
| 109109 | VR512, VR512, AVX512RC, |
| 109110 | /* VCVTPS2IBSZrrbk */ |
| 109111 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 109112 | /* VCVTPS2IBSZrrbkz */ |
| 109113 | VR512, VK16WM, VR512, AVX512RC, |
| 109114 | /* VCVTPS2IBSZrrk */ |
| 109115 | VR512, VR512, VK16WM, VR512, |
| 109116 | /* VCVTPS2IBSZrrkz */ |
| 109117 | VR512, VK16WM, VR512, |
| 109118 | /* VCVTPS2IUBSZ128rm */ |
| 109119 | VR128X, f128mem, |
| 109120 | /* VCVTPS2IUBSZ128rmb */ |
| 109121 | VR128X, f32mem, |
| 109122 | /* VCVTPS2IUBSZ128rmbk */ |
| 109123 | VR128X, VR128X, VK4WM, f32mem, |
| 109124 | /* VCVTPS2IUBSZ128rmbkz */ |
| 109125 | VR128X, VK4WM, f32mem, |
| 109126 | /* VCVTPS2IUBSZ128rmk */ |
| 109127 | VR128X, VR128X, VK4WM, f128mem, |
| 109128 | /* VCVTPS2IUBSZ128rmkz */ |
| 109129 | VR128X, VK4WM, f128mem, |
| 109130 | /* VCVTPS2IUBSZ128rr */ |
| 109131 | VR128X, VR128X, |
| 109132 | /* VCVTPS2IUBSZ128rrk */ |
| 109133 | VR128X, VR128X, VK4WM, VR128X, |
| 109134 | /* VCVTPS2IUBSZ128rrkz */ |
| 109135 | VR128X, VK4WM, VR128X, |
| 109136 | /* VCVTPS2IUBSZ256rm */ |
| 109137 | VR256X, f256mem, |
| 109138 | /* VCVTPS2IUBSZ256rmb */ |
| 109139 | VR256X, f32mem, |
| 109140 | /* VCVTPS2IUBSZ256rmbk */ |
| 109141 | VR256X, VR256X, VK8WM, f32mem, |
| 109142 | /* VCVTPS2IUBSZ256rmbkz */ |
| 109143 | VR256X, VK8WM, f32mem, |
| 109144 | /* VCVTPS2IUBSZ256rmk */ |
| 109145 | VR256X, VR256X, VK8WM, f256mem, |
| 109146 | /* VCVTPS2IUBSZ256rmkz */ |
| 109147 | VR256X, VK8WM, f256mem, |
| 109148 | /* VCVTPS2IUBSZ256rr */ |
| 109149 | VR256X, VR256X, |
| 109150 | /* VCVTPS2IUBSZ256rrk */ |
| 109151 | VR256X, VR256X, VK8WM, VR256X, |
| 109152 | /* VCVTPS2IUBSZ256rrkz */ |
| 109153 | VR256X, VK8WM, VR256X, |
| 109154 | /* VCVTPS2IUBSZrm */ |
| 109155 | VR512, f512mem, |
| 109156 | /* VCVTPS2IUBSZrmb */ |
| 109157 | VR512, f32mem, |
| 109158 | /* VCVTPS2IUBSZrmbk */ |
| 109159 | VR512, VR512, VK16WM, f32mem, |
| 109160 | /* VCVTPS2IUBSZrmbkz */ |
| 109161 | VR512, VK16WM, f32mem, |
| 109162 | /* VCVTPS2IUBSZrmk */ |
| 109163 | VR512, VR512, VK16WM, f512mem, |
| 109164 | /* VCVTPS2IUBSZrmkz */ |
| 109165 | VR512, VK16WM, f512mem, |
| 109166 | /* VCVTPS2IUBSZrr */ |
| 109167 | VR512, VR512, |
| 109168 | /* VCVTPS2IUBSZrrb */ |
| 109169 | VR512, VR512, AVX512RC, |
| 109170 | /* VCVTPS2IUBSZrrbk */ |
| 109171 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 109172 | /* VCVTPS2IUBSZrrbkz */ |
| 109173 | VR512, VK16WM, VR512, AVX512RC, |
| 109174 | /* VCVTPS2IUBSZrrk */ |
| 109175 | VR512, VR512, VK16WM, VR512, |
| 109176 | /* VCVTPS2IUBSZrrkz */ |
| 109177 | VR512, VK16WM, VR512, |
| 109178 | /* VCVTPS2PDYrm */ |
| 109179 | VR256, f128mem, |
| 109180 | /* VCVTPS2PDYrr */ |
| 109181 | VR256, VR128, |
| 109182 | /* VCVTPS2PDZ128rm */ |
| 109183 | VR128X, f64mem, |
| 109184 | /* VCVTPS2PDZ128rmb */ |
| 109185 | VR128X, f32mem, |
| 109186 | /* VCVTPS2PDZ128rmbk */ |
| 109187 | VR128X, VR128X, VK2WM, f32mem, |
| 109188 | /* VCVTPS2PDZ128rmbkz */ |
| 109189 | VR128X, VK2WM, f32mem, |
| 109190 | /* VCVTPS2PDZ128rmk */ |
| 109191 | VR128X, VR128X, VK2WM, f64mem, |
| 109192 | /* VCVTPS2PDZ128rmkz */ |
| 109193 | VR128X, VK2WM, f64mem, |
| 109194 | /* VCVTPS2PDZ128rr */ |
| 109195 | VR128X, VR128X, |
| 109196 | /* VCVTPS2PDZ128rrk */ |
| 109197 | VR128X, VR128X, VK2WM, VR128X, |
| 109198 | /* VCVTPS2PDZ128rrkz */ |
| 109199 | VR128X, VK2WM, VR128X, |
| 109200 | /* VCVTPS2PDZ256rm */ |
| 109201 | VR256X, f128mem, |
| 109202 | /* VCVTPS2PDZ256rmb */ |
| 109203 | VR256X, f32mem, |
| 109204 | /* VCVTPS2PDZ256rmbk */ |
| 109205 | VR256X, VR256X, VK4WM, f32mem, |
| 109206 | /* VCVTPS2PDZ256rmbkz */ |
| 109207 | VR256X, VK4WM, f32mem, |
| 109208 | /* VCVTPS2PDZ256rmk */ |
| 109209 | VR256X, VR256X, VK4WM, f128mem, |
| 109210 | /* VCVTPS2PDZ256rmkz */ |
| 109211 | VR256X, VK4WM, f128mem, |
| 109212 | /* VCVTPS2PDZ256rr */ |
| 109213 | VR256X, VR128X, |
| 109214 | /* VCVTPS2PDZ256rrk */ |
| 109215 | VR256X, VR256X, VK4WM, VR128X, |
| 109216 | /* VCVTPS2PDZ256rrkz */ |
| 109217 | VR256X, VK4WM, VR128X, |
| 109218 | /* VCVTPS2PDZrm */ |
| 109219 | VR512, f256mem, |
| 109220 | /* VCVTPS2PDZrmb */ |
| 109221 | VR512, f32mem, |
| 109222 | /* VCVTPS2PDZrmbk */ |
| 109223 | VR512, VR512, VK8WM, f32mem, |
| 109224 | /* VCVTPS2PDZrmbkz */ |
| 109225 | VR512, VK8WM, f32mem, |
| 109226 | /* VCVTPS2PDZrmk */ |
| 109227 | VR512, VR512, VK8WM, f256mem, |
| 109228 | /* VCVTPS2PDZrmkz */ |
| 109229 | VR512, VK8WM, f256mem, |
| 109230 | /* VCVTPS2PDZrr */ |
| 109231 | VR512, VR256X, |
| 109232 | /* VCVTPS2PDZrrb */ |
| 109233 | VR512, VR256X, |
| 109234 | /* VCVTPS2PDZrrbk */ |
| 109235 | VR512, VR512, VK8WM, VR256X, |
| 109236 | /* VCVTPS2PDZrrbkz */ |
| 109237 | VR512, VK8WM, VR256X, |
| 109238 | /* VCVTPS2PDZrrk */ |
| 109239 | VR512, VR512, VK8WM, VR256X, |
| 109240 | /* VCVTPS2PDZrrkz */ |
| 109241 | VR512, VK8WM, VR256X, |
| 109242 | /* VCVTPS2PDrm */ |
| 109243 | VR128, f64mem, |
| 109244 | /* VCVTPS2PDrr */ |
| 109245 | VR128, VR128, |
| 109246 | /* VCVTPS2PHXZ128rm */ |
| 109247 | VR128X, f128mem, |
| 109248 | /* VCVTPS2PHXZ128rmb */ |
| 109249 | VR128X, f32mem, |
| 109250 | /* VCVTPS2PHXZ128rmbk */ |
| 109251 | VR128X, VR128X, VK4WM, f32mem, |
| 109252 | /* VCVTPS2PHXZ128rmbkz */ |
| 109253 | VR128X, VK4WM, f32mem, |
| 109254 | /* VCVTPS2PHXZ128rmk */ |
| 109255 | VR128X, VR128X, VK4WM, f128mem, |
| 109256 | /* VCVTPS2PHXZ128rmkz */ |
| 109257 | VR128X, VK4WM, f128mem, |
| 109258 | /* VCVTPS2PHXZ128rr */ |
| 109259 | VR128X, VR128X, |
| 109260 | /* VCVTPS2PHXZ128rrk */ |
| 109261 | VR128X, VR128X, VK4WM, VR128X, |
| 109262 | /* VCVTPS2PHXZ128rrkz */ |
| 109263 | VR128X, VK4WM, VR128X, |
| 109264 | /* VCVTPS2PHXZ256rm */ |
| 109265 | VR128X, f256mem, |
| 109266 | /* VCVTPS2PHXZ256rmb */ |
| 109267 | VR128X, f32mem, |
| 109268 | /* VCVTPS2PHXZ256rmbk */ |
| 109269 | VR128X, VR128X, VK8WM, f32mem, |
| 109270 | /* VCVTPS2PHXZ256rmbkz */ |
| 109271 | VR128X, VK8WM, f32mem, |
| 109272 | /* VCVTPS2PHXZ256rmk */ |
| 109273 | VR128X, VR128X, VK8WM, f256mem, |
| 109274 | /* VCVTPS2PHXZ256rmkz */ |
| 109275 | VR128X, VK8WM, f256mem, |
| 109276 | /* VCVTPS2PHXZ256rr */ |
| 109277 | VR128X, VR256X, |
| 109278 | /* VCVTPS2PHXZ256rrk */ |
| 109279 | VR128X, VR128X, VK8WM, VR256X, |
| 109280 | /* VCVTPS2PHXZ256rrkz */ |
| 109281 | VR128X, VK8WM, VR256X, |
| 109282 | /* VCVTPS2PHXZrm */ |
| 109283 | VR256X, f512mem, |
| 109284 | /* VCVTPS2PHXZrmb */ |
| 109285 | VR256X, f32mem, |
| 109286 | /* VCVTPS2PHXZrmbk */ |
| 109287 | VR256X, VR256X, VK16WM, f32mem, |
| 109288 | /* VCVTPS2PHXZrmbkz */ |
| 109289 | VR256X, VK16WM, f32mem, |
| 109290 | /* VCVTPS2PHXZrmk */ |
| 109291 | VR256X, VR256X, VK16WM, f512mem, |
| 109292 | /* VCVTPS2PHXZrmkz */ |
| 109293 | VR256X, VK16WM, f512mem, |
| 109294 | /* VCVTPS2PHXZrr */ |
| 109295 | VR256X, VR512, |
| 109296 | /* VCVTPS2PHXZrrb */ |
| 109297 | VR256X, VR512, AVX512RC, |
| 109298 | /* VCVTPS2PHXZrrbk */ |
| 109299 | VR256X, VR256X, VK16WM, VR512, AVX512RC, |
| 109300 | /* VCVTPS2PHXZrrbkz */ |
| 109301 | VR256X, VK16WM, VR512, AVX512RC, |
| 109302 | /* VCVTPS2PHXZrrk */ |
| 109303 | VR256X, VR256X, VK16WM, VR512, |
| 109304 | /* VCVTPS2PHXZrrkz */ |
| 109305 | VR256X, VK16WM, VR512, |
| 109306 | /* VCVTPS2PHYmr */ |
| 109307 | f128mem, VR256, i32u8imm, |
| 109308 | /* VCVTPS2PHYrr */ |
| 109309 | VR128, VR256, i32u8imm, |
| 109310 | /* VCVTPS2PHZ128mr */ |
| 109311 | f64mem, VR128X, i32u8imm, |
| 109312 | /* VCVTPS2PHZ128mrk */ |
| 109313 | f64mem, VK8WM, VR128X, i32u8imm, |
| 109314 | /* VCVTPS2PHZ128rr */ |
| 109315 | VR128X, VR128X, i32u8imm, |
| 109316 | /* VCVTPS2PHZ128rrk */ |
| 109317 | VR128X, VR128X, VK4WM, VR128X, i32u8imm, |
| 109318 | /* VCVTPS2PHZ128rrkz */ |
| 109319 | VR128X, VK4WM, VR128X, i32u8imm, |
| 109320 | /* VCVTPS2PHZ256mr */ |
| 109321 | f128mem, VR256X, i32u8imm, |
| 109322 | /* VCVTPS2PHZ256mrk */ |
| 109323 | f128mem, VK8WM, VR256X, i32u8imm, |
| 109324 | /* VCVTPS2PHZ256rr */ |
| 109325 | VR128X, VR256X, i32u8imm, |
| 109326 | /* VCVTPS2PHZ256rrk */ |
| 109327 | VR128X, VR128X, VK8WM, VR256X, i32u8imm, |
| 109328 | /* VCVTPS2PHZ256rrkz */ |
| 109329 | VR128X, VK8WM, VR256X, i32u8imm, |
| 109330 | /* VCVTPS2PHZmr */ |
| 109331 | f256mem, VR512, i32u8imm, |
| 109332 | /* VCVTPS2PHZmrk */ |
| 109333 | f256mem, VK16WM, VR512, i32u8imm, |
| 109334 | /* VCVTPS2PHZrr */ |
| 109335 | VR256X, VR512, i32u8imm, |
| 109336 | /* VCVTPS2PHZrrb */ |
| 109337 | VR256X, VR512, i32u8imm, |
| 109338 | /* VCVTPS2PHZrrbk */ |
| 109339 | VR256X, VR256X, VK16WM, VR512, i32u8imm, |
| 109340 | /* VCVTPS2PHZrrbkz */ |
| 109341 | VR256X, VK16WM, VR512, i32u8imm, |
| 109342 | /* VCVTPS2PHZrrk */ |
| 109343 | VR256X, VR256X, VK16WM, VR512, i32u8imm, |
| 109344 | /* VCVTPS2PHZrrkz */ |
| 109345 | VR256X, VK16WM, VR512, i32u8imm, |
| 109346 | /* VCVTPS2PHmr */ |
| 109347 | f64mem, VR128, i32u8imm, |
| 109348 | /* VCVTPS2PHrr */ |
| 109349 | VR128, VR128, i32u8imm, |
| 109350 | /* VCVTPS2QQZ128rm */ |
| 109351 | VR128X, f64mem, |
| 109352 | /* VCVTPS2QQZ128rmb */ |
| 109353 | VR128X, f32mem, |
| 109354 | /* VCVTPS2QQZ128rmbk */ |
| 109355 | VR128X, VR128X, VK2WM, f32mem, |
| 109356 | /* VCVTPS2QQZ128rmbkz */ |
| 109357 | VR128X, VK2WM, f32mem, |
| 109358 | /* VCVTPS2QQZ128rmk */ |
| 109359 | VR128X, VR128X, VK2WM, f64mem, |
| 109360 | /* VCVTPS2QQZ128rmkz */ |
| 109361 | VR128X, VK2WM, f64mem, |
| 109362 | /* VCVTPS2QQZ128rr */ |
| 109363 | VR128X, VR128X, |
| 109364 | /* VCVTPS2QQZ128rrk */ |
| 109365 | VR128X, VR128X, VK2WM, VR128X, |
| 109366 | /* VCVTPS2QQZ128rrkz */ |
| 109367 | VR128X, VK2WM, VR128X, |
| 109368 | /* VCVTPS2QQZ256rm */ |
| 109369 | VR256X, f128mem, |
| 109370 | /* VCVTPS2QQZ256rmb */ |
| 109371 | VR256X, f32mem, |
| 109372 | /* VCVTPS2QQZ256rmbk */ |
| 109373 | VR256X, VR256X, VK4WM, f32mem, |
| 109374 | /* VCVTPS2QQZ256rmbkz */ |
| 109375 | VR256X, VK4WM, f32mem, |
| 109376 | /* VCVTPS2QQZ256rmk */ |
| 109377 | VR256X, VR256X, VK4WM, f128mem, |
| 109378 | /* VCVTPS2QQZ256rmkz */ |
| 109379 | VR256X, VK4WM, f128mem, |
| 109380 | /* VCVTPS2QQZ256rr */ |
| 109381 | VR256X, VR128X, |
| 109382 | /* VCVTPS2QQZ256rrk */ |
| 109383 | VR256X, VR256X, VK4WM, VR128X, |
| 109384 | /* VCVTPS2QQZ256rrkz */ |
| 109385 | VR256X, VK4WM, VR128X, |
| 109386 | /* VCVTPS2QQZrm */ |
| 109387 | VR512, f256mem, |
| 109388 | /* VCVTPS2QQZrmb */ |
| 109389 | VR512, f32mem, |
| 109390 | /* VCVTPS2QQZrmbk */ |
| 109391 | VR512, VR512, VK8WM, f32mem, |
| 109392 | /* VCVTPS2QQZrmbkz */ |
| 109393 | VR512, VK8WM, f32mem, |
| 109394 | /* VCVTPS2QQZrmk */ |
| 109395 | VR512, VR512, VK8WM, f256mem, |
| 109396 | /* VCVTPS2QQZrmkz */ |
| 109397 | VR512, VK8WM, f256mem, |
| 109398 | /* VCVTPS2QQZrr */ |
| 109399 | VR512, VR256X, |
| 109400 | /* VCVTPS2QQZrrb */ |
| 109401 | VR512, VR256X, AVX512RC, |
| 109402 | /* VCVTPS2QQZrrbk */ |
| 109403 | VR512, VR512, VK8WM, VR256X, AVX512RC, |
| 109404 | /* VCVTPS2QQZrrbkz */ |
| 109405 | VR512, VK8WM, VR256X, AVX512RC, |
| 109406 | /* VCVTPS2QQZrrk */ |
| 109407 | VR512, VR512, VK8WM, VR256X, |
| 109408 | /* VCVTPS2QQZrrkz */ |
| 109409 | VR512, VK8WM, VR256X, |
| 109410 | /* VCVTPS2UDQZ128rm */ |
| 109411 | VR128X, f128mem, |
| 109412 | /* VCVTPS2UDQZ128rmb */ |
| 109413 | VR128X, f32mem, |
| 109414 | /* VCVTPS2UDQZ128rmbk */ |
| 109415 | VR128X, VR128X, VK4WM, f32mem, |
| 109416 | /* VCVTPS2UDQZ128rmbkz */ |
| 109417 | VR128X, VK4WM, f32mem, |
| 109418 | /* VCVTPS2UDQZ128rmk */ |
| 109419 | VR128X, VR128X, VK4WM, f128mem, |
| 109420 | /* VCVTPS2UDQZ128rmkz */ |
| 109421 | VR128X, VK4WM, f128mem, |
| 109422 | /* VCVTPS2UDQZ128rr */ |
| 109423 | VR128X, VR128X, |
| 109424 | /* VCVTPS2UDQZ128rrk */ |
| 109425 | VR128X, VR128X, VK4WM, VR128X, |
| 109426 | /* VCVTPS2UDQZ128rrkz */ |
| 109427 | VR128X, VK4WM, VR128X, |
| 109428 | /* VCVTPS2UDQZ256rm */ |
| 109429 | VR256X, f256mem, |
| 109430 | /* VCVTPS2UDQZ256rmb */ |
| 109431 | VR256X, f32mem, |
| 109432 | /* VCVTPS2UDQZ256rmbk */ |
| 109433 | VR256X, VR256X, VK8WM, f32mem, |
| 109434 | /* VCVTPS2UDQZ256rmbkz */ |
| 109435 | VR256X, VK8WM, f32mem, |
| 109436 | /* VCVTPS2UDQZ256rmk */ |
| 109437 | VR256X, VR256X, VK8WM, f256mem, |
| 109438 | /* VCVTPS2UDQZ256rmkz */ |
| 109439 | VR256X, VK8WM, f256mem, |
| 109440 | /* VCVTPS2UDQZ256rr */ |
| 109441 | VR256X, VR256X, |
| 109442 | /* VCVTPS2UDQZ256rrk */ |
| 109443 | VR256X, VR256X, VK8WM, VR256X, |
| 109444 | /* VCVTPS2UDQZ256rrkz */ |
| 109445 | VR256X, VK8WM, VR256X, |
| 109446 | /* VCVTPS2UDQZrm */ |
| 109447 | VR512, f512mem, |
| 109448 | /* VCVTPS2UDQZrmb */ |
| 109449 | VR512, f32mem, |
| 109450 | /* VCVTPS2UDQZrmbk */ |
| 109451 | VR512, VR512, VK16WM, f32mem, |
| 109452 | /* VCVTPS2UDQZrmbkz */ |
| 109453 | VR512, VK16WM, f32mem, |
| 109454 | /* VCVTPS2UDQZrmk */ |
| 109455 | VR512, VR512, VK16WM, f512mem, |
| 109456 | /* VCVTPS2UDQZrmkz */ |
| 109457 | VR512, VK16WM, f512mem, |
| 109458 | /* VCVTPS2UDQZrr */ |
| 109459 | VR512, VR512, |
| 109460 | /* VCVTPS2UDQZrrb */ |
| 109461 | VR512, VR512, AVX512RC, |
| 109462 | /* VCVTPS2UDQZrrbk */ |
| 109463 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 109464 | /* VCVTPS2UDQZrrbkz */ |
| 109465 | VR512, VK16WM, VR512, AVX512RC, |
| 109466 | /* VCVTPS2UDQZrrk */ |
| 109467 | VR512, VR512, VK16WM, VR512, |
| 109468 | /* VCVTPS2UDQZrrkz */ |
| 109469 | VR512, VK16WM, VR512, |
| 109470 | /* VCVTPS2UQQZ128rm */ |
| 109471 | VR128X, f64mem, |
| 109472 | /* VCVTPS2UQQZ128rmb */ |
| 109473 | VR128X, f32mem, |
| 109474 | /* VCVTPS2UQQZ128rmbk */ |
| 109475 | VR128X, VR128X, VK2WM, f32mem, |
| 109476 | /* VCVTPS2UQQZ128rmbkz */ |
| 109477 | VR128X, VK2WM, f32mem, |
| 109478 | /* VCVTPS2UQQZ128rmk */ |
| 109479 | VR128X, VR128X, VK2WM, f64mem, |
| 109480 | /* VCVTPS2UQQZ128rmkz */ |
| 109481 | VR128X, VK2WM, f64mem, |
| 109482 | /* VCVTPS2UQQZ128rr */ |
| 109483 | VR128X, VR128X, |
| 109484 | /* VCVTPS2UQQZ128rrk */ |
| 109485 | VR128X, VR128X, VK2WM, VR128X, |
| 109486 | /* VCVTPS2UQQZ128rrkz */ |
| 109487 | VR128X, VK2WM, VR128X, |
| 109488 | /* VCVTPS2UQQZ256rm */ |
| 109489 | VR256X, f128mem, |
| 109490 | /* VCVTPS2UQQZ256rmb */ |
| 109491 | VR256X, f32mem, |
| 109492 | /* VCVTPS2UQQZ256rmbk */ |
| 109493 | VR256X, VR256X, VK4WM, f32mem, |
| 109494 | /* VCVTPS2UQQZ256rmbkz */ |
| 109495 | VR256X, VK4WM, f32mem, |
| 109496 | /* VCVTPS2UQQZ256rmk */ |
| 109497 | VR256X, VR256X, VK4WM, f128mem, |
| 109498 | /* VCVTPS2UQQZ256rmkz */ |
| 109499 | VR256X, VK4WM, f128mem, |
| 109500 | /* VCVTPS2UQQZ256rr */ |
| 109501 | VR256X, VR128X, |
| 109502 | /* VCVTPS2UQQZ256rrk */ |
| 109503 | VR256X, VR256X, VK4WM, VR128X, |
| 109504 | /* VCVTPS2UQQZ256rrkz */ |
| 109505 | VR256X, VK4WM, VR128X, |
| 109506 | /* VCVTPS2UQQZrm */ |
| 109507 | VR512, f256mem, |
| 109508 | /* VCVTPS2UQQZrmb */ |
| 109509 | VR512, f32mem, |
| 109510 | /* VCVTPS2UQQZrmbk */ |
| 109511 | VR512, VR512, VK8WM, f32mem, |
| 109512 | /* VCVTPS2UQQZrmbkz */ |
| 109513 | VR512, VK8WM, f32mem, |
| 109514 | /* VCVTPS2UQQZrmk */ |
| 109515 | VR512, VR512, VK8WM, f256mem, |
| 109516 | /* VCVTPS2UQQZrmkz */ |
| 109517 | VR512, VK8WM, f256mem, |
| 109518 | /* VCVTPS2UQQZrr */ |
| 109519 | VR512, VR256X, |
| 109520 | /* VCVTPS2UQQZrrb */ |
| 109521 | VR512, VR256X, AVX512RC, |
| 109522 | /* VCVTPS2UQQZrrbk */ |
| 109523 | VR512, VR512, VK8WM, VR256X, AVX512RC, |
| 109524 | /* VCVTPS2UQQZrrbkz */ |
| 109525 | VR512, VK8WM, VR256X, AVX512RC, |
| 109526 | /* VCVTPS2UQQZrrk */ |
| 109527 | VR512, VR512, VK8WM, VR256X, |
| 109528 | /* VCVTPS2UQQZrrkz */ |
| 109529 | VR512, VK8WM, VR256X, |
| 109530 | /* VCVTQQ2PDZ128rm */ |
| 109531 | VR128X, i128mem, |
| 109532 | /* VCVTQQ2PDZ128rmb */ |
| 109533 | VR128X, i64mem, |
| 109534 | /* VCVTQQ2PDZ128rmbk */ |
| 109535 | VR128X, VR128X, VK2WM, i64mem, |
| 109536 | /* VCVTQQ2PDZ128rmbkz */ |
| 109537 | VR128X, VK2WM, i64mem, |
| 109538 | /* VCVTQQ2PDZ128rmk */ |
| 109539 | VR128X, VR128X, VK2WM, i128mem, |
| 109540 | /* VCVTQQ2PDZ128rmkz */ |
| 109541 | VR128X, VK2WM, i128mem, |
| 109542 | /* VCVTQQ2PDZ128rr */ |
| 109543 | VR128X, VR128X, |
| 109544 | /* VCVTQQ2PDZ128rrk */ |
| 109545 | VR128X, VR128X, VK2WM, VR128X, |
| 109546 | /* VCVTQQ2PDZ128rrkz */ |
| 109547 | VR128X, VK2WM, VR128X, |
| 109548 | /* VCVTQQ2PDZ256rm */ |
| 109549 | VR256X, i256mem, |
| 109550 | /* VCVTQQ2PDZ256rmb */ |
| 109551 | VR256X, i64mem, |
| 109552 | /* VCVTQQ2PDZ256rmbk */ |
| 109553 | VR256X, VR256X, VK4WM, i64mem, |
| 109554 | /* VCVTQQ2PDZ256rmbkz */ |
| 109555 | VR256X, VK4WM, i64mem, |
| 109556 | /* VCVTQQ2PDZ256rmk */ |
| 109557 | VR256X, VR256X, VK4WM, i256mem, |
| 109558 | /* VCVTQQ2PDZ256rmkz */ |
| 109559 | VR256X, VK4WM, i256mem, |
| 109560 | /* VCVTQQ2PDZ256rr */ |
| 109561 | VR256X, VR256X, |
| 109562 | /* VCVTQQ2PDZ256rrk */ |
| 109563 | VR256X, VR256X, VK4WM, VR256X, |
| 109564 | /* VCVTQQ2PDZ256rrkz */ |
| 109565 | VR256X, VK4WM, VR256X, |
| 109566 | /* VCVTQQ2PDZrm */ |
| 109567 | VR512, i512mem, |
| 109568 | /* VCVTQQ2PDZrmb */ |
| 109569 | VR512, i64mem, |
| 109570 | /* VCVTQQ2PDZrmbk */ |
| 109571 | VR512, VR512, VK8WM, i64mem, |
| 109572 | /* VCVTQQ2PDZrmbkz */ |
| 109573 | VR512, VK8WM, i64mem, |
| 109574 | /* VCVTQQ2PDZrmk */ |
| 109575 | VR512, VR512, VK8WM, i512mem, |
| 109576 | /* VCVTQQ2PDZrmkz */ |
| 109577 | VR512, VK8WM, i512mem, |
| 109578 | /* VCVTQQ2PDZrr */ |
| 109579 | VR512, VR512, |
| 109580 | /* VCVTQQ2PDZrrb */ |
| 109581 | VR512, VR512, AVX512RC, |
| 109582 | /* VCVTQQ2PDZrrbk */ |
| 109583 | VR512, VR512, VK8WM, VR512, AVX512RC, |
| 109584 | /* VCVTQQ2PDZrrbkz */ |
| 109585 | VR512, VK8WM, VR512, AVX512RC, |
| 109586 | /* VCVTQQ2PDZrrk */ |
| 109587 | VR512, VR512, VK8WM, VR512, |
| 109588 | /* VCVTQQ2PDZrrkz */ |
| 109589 | VR512, VK8WM, VR512, |
| 109590 | /* VCVTQQ2PHZ128rm */ |
| 109591 | VR128X, i128mem, |
| 109592 | /* VCVTQQ2PHZ128rmb */ |
| 109593 | VR128X, i64mem, |
| 109594 | /* VCVTQQ2PHZ128rmbk */ |
| 109595 | VR128X, VR128X, VK2WM, i64mem, |
| 109596 | /* VCVTQQ2PHZ128rmbkz */ |
| 109597 | VR128X, VK2WM, i64mem, |
| 109598 | /* VCVTQQ2PHZ128rmk */ |
| 109599 | VR128X, VR128X, VK2WM, i128mem, |
| 109600 | /* VCVTQQ2PHZ128rmkz */ |
| 109601 | VR128X, VK2WM, i128mem, |
| 109602 | /* VCVTQQ2PHZ128rr */ |
| 109603 | VR128X, VR128X, |
| 109604 | /* VCVTQQ2PHZ128rrk */ |
| 109605 | VR128X, VR128X, VK2WM, VR128X, |
| 109606 | /* VCVTQQ2PHZ128rrkz */ |
| 109607 | VR128X, VK2WM, VR128X, |
| 109608 | /* VCVTQQ2PHZ256rm */ |
| 109609 | VR128X, i256mem, |
| 109610 | /* VCVTQQ2PHZ256rmb */ |
| 109611 | VR128X, i64mem, |
| 109612 | /* VCVTQQ2PHZ256rmbk */ |
| 109613 | VR128X, VR128X, VK4WM, i64mem, |
| 109614 | /* VCVTQQ2PHZ256rmbkz */ |
| 109615 | VR128X, VK4WM, i64mem, |
| 109616 | /* VCVTQQ2PHZ256rmk */ |
| 109617 | VR128X, VR128X, VK4WM, i256mem, |
| 109618 | /* VCVTQQ2PHZ256rmkz */ |
| 109619 | VR128X, VK4WM, i256mem, |
| 109620 | /* VCVTQQ2PHZ256rr */ |
| 109621 | VR128X, VR256X, |
| 109622 | /* VCVTQQ2PHZ256rrk */ |
| 109623 | VR128X, VR128X, VK4WM, VR256X, |
| 109624 | /* VCVTQQ2PHZ256rrkz */ |
| 109625 | VR128X, VK4WM, VR256X, |
| 109626 | /* VCVTQQ2PHZrm */ |
| 109627 | VR128X, i512mem, |
| 109628 | /* VCVTQQ2PHZrmb */ |
| 109629 | VR128X, i64mem, |
| 109630 | /* VCVTQQ2PHZrmbk */ |
| 109631 | VR128X, VR128X, VK8WM, i64mem, |
| 109632 | /* VCVTQQ2PHZrmbkz */ |
| 109633 | VR128X, VK8WM, i64mem, |
| 109634 | /* VCVTQQ2PHZrmk */ |
| 109635 | VR128X, VR128X, VK8WM, i512mem, |
| 109636 | /* VCVTQQ2PHZrmkz */ |
| 109637 | VR128X, VK8WM, i512mem, |
| 109638 | /* VCVTQQ2PHZrr */ |
| 109639 | VR128X, VR512, |
| 109640 | /* VCVTQQ2PHZrrb */ |
| 109641 | VR128X, VR512, AVX512RC, |
| 109642 | /* VCVTQQ2PHZrrbk */ |
| 109643 | VR128X, VR128X, VK8WM, VR512, AVX512RC, |
| 109644 | /* VCVTQQ2PHZrrbkz */ |
| 109645 | VR128X, VK8WM, VR512, AVX512RC, |
| 109646 | /* VCVTQQ2PHZrrk */ |
| 109647 | VR128X, VR128X, VK8WM, VR512, |
| 109648 | /* VCVTQQ2PHZrrkz */ |
| 109649 | VR128X, VK8WM, VR512, |
| 109650 | /* VCVTQQ2PSZ128rm */ |
| 109651 | VR128X, i128mem, |
| 109652 | /* VCVTQQ2PSZ128rmb */ |
| 109653 | VR128X, i64mem, |
| 109654 | /* VCVTQQ2PSZ128rmbk */ |
| 109655 | VR128X, VR128X, VK2WM, i64mem, |
| 109656 | /* VCVTQQ2PSZ128rmbkz */ |
| 109657 | VR128X, VK2WM, i64mem, |
| 109658 | /* VCVTQQ2PSZ128rmk */ |
| 109659 | VR128X, VR128X, VK2WM, i128mem, |
| 109660 | /* VCVTQQ2PSZ128rmkz */ |
| 109661 | VR128X, VK2WM, i128mem, |
| 109662 | /* VCVTQQ2PSZ128rr */ |
| 109663 | VR128X, VR128X, |
| 109664 | /* VCVTQQ2PSZ128rrk */ |
| 109665 | VR128X, VR128X, VK2WM, VR128X, |
| 109666 | /* VCVTQQ2PSZ128rrkz */ |
| 109667 | VR128X, VK2WM, VR128X, |
| 109668 | /* VCVTQQ2PSZ256rm */ |
| 109669 | VR128X, i256mem, |
| 109670 | /* VCVTQQ2PSZ256rmb */ |
| 109671 | VR128X, i64mem, |
| 109672 | /* VCVTQQ2PSZ256rmbk */ |
| 109673 | VR128X, VR128X, VK4WM, i64mem, |
| 109674 | /* VCVTQQ2PSZ256rmbkz */ |
| 109675 | VR128X, VK4WM, i64mem, |
| 109676 | /* VCVTQQ2PSZ256rmk */ |
| 109677 | VR128X, VR128X, VK4WM, i256mem, |
| 109678 | /* VCVTQQ2PSZ256rmkz */ |
| 109679 | VR128X, VK4WM, i256mem, |
| 109680 | /* VCVTQQ2PSZ256rr */ |
| 109681 | VR128X, VR256X, |
| 109682 | /* VCVTQQ2PSZ256rrk */ |
| 109683 | VR128X, VR128X, VK4WM, VR256X, |
| 109684 | /* VCVTQQ2PSZ256rrkz */ |
| 109685 | VR128X, VK4WM, VR256X, |
| 109686 | /* VCVTQQ2PSZrm */ |
| 109687 | VR256X, i512mem, |
| 109688 | /* VCVTQQ2PSZrmb */ |
| 109689 | VR256X, i64mem, |
| 109690 | /* VCVTQQ2PSZrmbk */ |
| 109691 | VR256X, VR256X, VK8WM, i64mem, |
| 109692 | /* VCVTQQ2PSZrmbkz */ |
| 109693 | VR256X, VK8WM, i64mem, |
| 109694 | /* VCVTQQ2PSZrmk */ |
| 109695 | VR256X, VR256X, VK8WM, i512mem, |
| 109696 | /* VCVTQQ2PSZrmkz */ |
| 109697 | VR256X, VK8WM, i512mem, |
| 109698 | /* VCVTQQ2PSZrr */ |
| 109699 | VR256X, VR512, |
| 109700 | /* VCVTQQ2PSZrrb */ |
| 109701 | VR256X, VR512, AVX512RC, |
| 109702 | /* VCVTQQ2PSZrrbk */ |
| 109703 | VR256X, VR256X, VK8WM, VR512, AVX512RC, |
| 109704 | /* VCVTQQ2PSZrrbkz */ |
| 109705 | VR256X, VK8WM, VR512, AVX512RC, |
| 109706 | /* VCVTQQ2PSZrrk */ |
| 109707 | VR256X, VR256X, VK8WM, VR512, |
| 109708 | /* VCVTQQ2PSZrrkz */ |
| 109709 | VR256X, VK8WM, VR512, |
| 109710 | /* VCVTSD2SHZrm */ |
| 109711 | FR16X, FR16X, f64mem, |
| 109712 | /* VCVTSD2SHZrm_Int */ |
| 109713 | VR128X, VR128X, sdmem, |
| 109714 | /* VCVTSD2SHZrmk_Int */ |
| 109715 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 109716 | /* VCVTSD2SHZrmkz_Int */ |
| 109717 | VR128X, VK1WM, VR128X, sdmem, |
| 109718 | /* VCVTSD2SHZrr */ |
| 109719 | FR16X, FR16X, FR64X, |
| 109720 | /* VCVTSD2SHZrr_Int */ |
| 109721 | VR128X, VR128X, VR128X, |
| 109722 | /* VCVTSD2SHZrrb_Int */ |
| 109723 | VR128X, VR128X, VR128X, AVX512RC, |
| 109724 | /* VCVTSD2SHZrrbk_Int */ |
| 109725 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 109726 | /* VCVTSD2SHZrrbkz_Int */ |
| 109727 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 109728 | /* VCVTSD2SHZrrk_Int */ |
| 109729 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 109730 | /* VCVTSD2SHZrrkz_Int */ |
| 109731 | VR128X, VK1WM, VR128X, VR128X, |
| 109732 | /* VCVTSD2SI64Zrm */ |
| 109733 | GR64, f64mem, |
| 109734 | /* VCVTSD2SI64Zrm_Int */ |
| 109735 | GR64, sdmem, |
| 109736 | /* VCVTSD2SI64Zrr */ |
| 109737 | GR64, FR64X, |
| 109738 | /* VCVTSD2SI64Zrr_Int */ |
| 109739 | GR64, VR128X, |
| 109740 | /* VCVTSD2SI64Zrrb_Int */ |
| 109741 | GR64, VR128X, AVX512RC, |
| 109742 | /* VCVTSD2SI64rm */ |
| 109743 | GR64, f64mem, |
| 109744 | /* VCVTSD2SI64rm_Int */ |
| 109745 | GR64, sdmem, |
| 109746 | /* VCVTSD2SI64rr */ |
| 109747 | GR64, FR64, |
| 109748 | /* VCVTSD2SI64rr_Int */ |
| 109749 | GR64, VR128, |
| 109750 | /* VCVTSD2SIZrm */ |
| 109751 | GR32, f64mem, |
| 109752 | /* VCVTSD2SIZrm_Int */ |
| 109753 | GR32, sdmem, |
| 109754 | /* VCVTSD2SIZrr */ |
| 109755 | GR32, FR64X, |
| 109756 | /* VCVTSD2SIZrr_Int */ |
| 109757 | GR32, VR128X, |
| 109758 | /* VCVTSD2SIZrrb_Int */ |
| 109759 | GR32, VR128X, AVX512RC, |
| 109760 | /* VCVTSD2SIrm */ |
| 109761 | GR32, f64mem, |
| 109762 | /* VCVTSD2SIrm_Int */ |
| 109763 | GR32, sdmem, |
| 109764 | /* VCVTSD2SIrr */ |
| 109765 | GR32, FR64, |
| 109766 | /* VCVTSD2SIrr_Int */ |
| 109767 | GR32, VR128, |
| 109768 | /* VCVTSD2SSZrm */ |
| 109769 | FR32X, FR32X, f64mem, |
| 109770 | /* VCVTSD2SSZrm_Int */ |
| 109771 | VR128X, VR128X, sdmem, |
| 109772 | /* VCVTSD2SSZrmk_Int */ |
| 109773 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 109774 | /* VCVTSD2SSZrmkz_Int */ |
| 109775 | VR128X, VK1WM, VR128X, sdmem, |
| 109776 | /* VCVTSD2SSZrr */ |
| 109777 | FR32X, FR32X, FR64X, |
| 109778 | /* VCVTSD2SSZrr_Int */ |
| 109779 | VR128X, VR128X, VR128X, |
| 109780 | /* VCVTSD2SSZrrb_Int */ |
| 109781 | VR128X, VR128X, VR128X, AVX512RC, |
| 109782 | /* VCVTSD2SSZrrbk_Int */ |
| 109783 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 109784 | /* VCVTSD2SSZrrbkz_Int */ |
| 109785 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 109786 | /* VCVTSD2SSZrrk_Int */ |
| 109787 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 109788 | /* VCVTSD2SSZrrkz_Int */ |
| 109789 | VR128X, VK1WM, VR128X, VR128X, |
| 109790 | /* VCVTSD2SSrm */ |
| 109791 | FR32, FR32, f64mem, |
| 109792 | /* VCVTSD2SSrm_Int */ |
| 109793 | VR128, VR128, sdmem, |
| 109794 | /* VCVTSD2SSrr */ |
| 109795 | FR32, FR32, FR64, |
| 109796 | /* VCVTSD2SSrr_Int */ |
| 109797 | VR128, VR128, VR128, |
| 109798 | /* VCVTSD2USI64Zrm_Int */ |
| 109799 | GR64, sdmem, |
| 109800 | /* VCVTSD2USI64Zrr_Int */ |
| 109801 | GR64, VR128X, |
| 109802 | /* VCVTSD2USI64Zrrb_Int */ |
| 109803 | GR64, VR128X, AVX512RC, |
| 109804 | /* VCVTSD2USIZrm_Int */ |
| 109805 | GR32, sdmem, |
| 109806 | /* VCVTSD2USIZrr_Int */ |
| 109807 | GR32, VR128X, |
| 109808 | /* VCVTSD2USIZrrb_Int */ |
| 109809 | GR32, VR128X, AVX512RC, |
| 109810 | /* VCVTSH2SDZrm */ |
| 109811 | FR64X, FR64X, f16mem, |
| 109812 | /* VCVTSH2SDZrm_Int */ |
| 109813 | VR128X, VR128X, shmem, |
| 109814 | /* VCVTSH2SDZrmk_Int */ |
| 109815 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 109816 | /* VCVTSH2SDZrmkz_Int */ |
| 109817 | VR128X, VK1WM, VR128X, shmem, |
| 109818 | /* VCVTSH2SDZrr */ |
| 109819 | FR64X, FR64X, FR16X, |
| 109820 | /* VCVTSH2SDZrr_Int */ |
| 109821 | VR128X, VR128X, VR128X, |
| 109822 | /* VCVTSH2SDZrrb_Int */ |
| 109823 | VR128X, VR128X, VR128X, |
| 109824 | /* VCVTSH2SDZrrbk_Int */ |
| 109825 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 109826 | /* VCVTSH2SDZrrbkz_Int */ |
| 109827 | VR128X, VK1WM, VR128X, VR128X, |
| 109828 | /* VCVTSH2SDZrrk_Int */ |
| 109829 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 109830 | /* VCVTSH2SDZrrkz_Int */ |
| 109831 | VR128X, VK1WM, VR128X, VR128X, |
| 109832 | /* VCVTSH2SI64Zrm_Int */ |
| 109833 | GR64, shmem, |
| 109834 | /* VCVTSH2SI64Zrr_Int */ |
| 109835 | GR64, VR128X, |
| 109836 | /* VCVTSH2SI64Zrrb_Int */ |
| 109837 | GR64, VR128X, AVX512RC, |
| 109838 | /* VCVTSH2SIZrm_Int */ |
| 109839 | GR32, shmem, |
| 109840 | /* VCVTSH2SIZrr_Int */ |
| 109841 | GR32, VR128X, |
| 109842 | /* VCVTSH2SIZrrb_Int */ |
| 109843 | GR32, VR128X, AVX512RC, |
| 109844 | /* VCVTSH2SSZrm */ |
| 109845 | FR32X, FR32X, f16mem, |
| 109846 | /* VCVTSH2SSZrm_Int */ |
| 109847 | VR128X, VR128X, shmem, |
| 109848 | /* VCVTSH2SSZrmk_Int */ |
| 109849 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 109850 | /* VCVTSH2SSZrmkz_Int */ |
| 109851 | VR128X, VK1WM, VR128X, shmem, |
| 109852 | /* VCVTSH2SSZrr */ |
| 109853 | FR32X, FR32X, FR16X, |
| 109854 | /* VCVTSH2SSZrr_Int */ |
| 109855 | VR128X, VR128X, VR128X, |
| 109856 | /* VCVTSH2SSZrrb_Int */ |
| 109857 | VR128X, VR128X, VR128X, |
| 109858 | /* VCVTSH2SSZrrbk_Int */ |
| 109859 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 109860 | /* VCVTSH2SSZrrbkz_Int */ |
| 109861 | VR128X, VK1WM, VR128X, VR128X, |
| 109862 | /* VCVTSH2SSZrrk_Int */ |
| 109863 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 109864 | /* VCVTSH2SSZrrkz_Int */ |
| 109865 | VR128X, VK1WM, VR128X, VR128X, |
| 109866 | /* VCVTSH2USI64Zrm_Int */ |
| 109867 | GR64, shmem, |
| 109868 | /* VCVTSH2USI64Zrr_Int */ |
| 109869 | GR64, VR128X, |
| 109870 | /* VCVTSH2USI64Zrrb_Int */ |
| 109871 | GR64, VR128X, AVX512RC, |
| 109872 | /* VCVTSH2USIZrm_Int */ |
| 109873 | GR32, shmem, |
| 109874 | /* VCVTSH2USIZrr_Int */ |
| 109875 | GR32, VR128X, |
| 109876 | /* VCVTSH2USIZrrb_Int */ |
| 109877 | GR32, VR128X, AVX512RC, |
| 109878 | /* VCVTSI2SDZrm */ |
| 109879 | FR64X, FR64X, i32mem, |
| 109880 | /* VCVTSI2SDZrm_Int */ |
| 109881 | VR128X, VR128X, i32mem, |
| 109882 | /* VCVTSI2SDZrr */ |
| 109883 | FR64X, FR64X, GR32, |
| 109884 | /* VCVTSI2SDZrr_Int */ |
| 109885 | VR128X, VR128X, GR32, |
| 109886 | /* VCVTSI2SDrm */ |
| 109887 | FR64, FR64, i32mem, |
| 109888 | /* VCVTSI2SDrm_Int */ |
| 109889 | VR128, VR128, i32mem, |
| 109890 | /* VCVTSI2SDrr */ |
| 109891 | FR64, FR64, GR32, |
| 109892 | /* VCVTSI2SDrr_Int */ |
| 109893 | VR128, VR128, GR32, |
| 109894 | /* VCVTSI2SHZrm */ |
| 109895 | FR16X, FR16X, i32mem, |
| 109896 | /* VCVTSI2SHZrm_Int */ |
| 109897 | VR128X, VR128X, i32mem, |
| 109898 | /* VCVTSI2SHZrr */ |
| 109899 | FR16X, FR16X, GR32, |
| 109900 | /* VCVTSI2SHZrr_Int */ |
| 109901 | VR128X, VR128X, GR32, |
| 109902 | /* VCVTSI2SHZrrb_Int */ |
| 109903 | VR128X, VR128X, GR32, AVX512RC, |
| 109904 | /* VCVTSI2SSZrm */ |
| 109905 | FR32X, FR32X, i32mem, |
| 109906 | /* VCVTSI2SSZrm_Int */ |
| 109907 | VR128X, VR128X, i32mem, |
| 109908 | /* VCVTSI2SSZrr */ |
| 109909 | FR32X, FR32X, GR32, |
| 109910 | /* VCVTSI2SSZrr_Int */ |
| 109911 | VR128X, VR128X, GR32, |
| 109912 | /* VCVTSI2SSZrrb_Int */ |
| 109913 | VR128X, VR128X, GR32, AVX512RC, |
| 109914 | /* VCVTSI2SSrm */ |
| 109915 | FR32, FR32, i32mem, |
| 109916 | /* VCVTSI2SSrm_Int */ |
| 109917 | VR128, VR128, i32mem, |
| 109918 | /* VCVTSI2SSrr */ |
| 109919 | FR32, FR32, GR32, |
| 109920 | /* VCVTSI2SSrr_Int */ |
| 109921 | VR128, VR128, GR32, |
| 109922 | /* VCVTSI642SDZrm */ |
| 109923 | FR64X, FR64X, i64mem, |
| 109924 | /* VCVTSI642SDZrm_Int */ |
| 109925 | VR128X, VR128X, i64mem, |
| 109926 | /* VCVTSI642SDZrr */ |
| 109927 | FR64X, FR64X, GR64, |
| 109928 | /* VCVTSI642SDZrr_Int */ |
| 109929 | VR128X, VR128X, GR64, |
| 109930 | /* VCVTSI642SDZrrb_Int */ |
| 109931 | VR128X, VR128X, GR64, AVX512RC, |
| 109932 | /* VCVTSI642SDrm */ |
| 109933 | FR64, FR64, i64mem, |
| 109934 | /* VCVTSI642SDrm_Int */ |
| 109935 | VR128, VR128, i64mem, |
| 109936 | /* VCVTSI642SDrr */ |
| 109937 | FR64, FR64, GR64, |
| 109938 | /* VCVTSI642SDrr_Int */ |
| 109939 | VR128, VR128, GR64, |
| 109940 | /* VCVTSI642SHZrm */ |
| 109941 | FR16X, FR16X, i64mem, |
| 109942 | /* VCVTSI642SHZrm_Int */ |
| 109943 | VR128X, VR128X, i64mem, |
| 109944 | /* VCVTSI642SHZrr */ |
| 109945 | FR16X, FR16X, GR64, |
| 109946 | /* VCVTSI642SHZrr_Int */ |
| 109947 | VR128X, VR128X, GR64, |
| 109948 | /* VCVTSI642SHZrrb_Int */ |
| 109949 | VR128X, VR128X, GR64, AVX512RC, |
| 109950 | /* VCVTSI642SSZrm */ |
| 109951 | FR32X, FR32X, i64mem, |
| 109952 | /* VCVTSI642SSZrm_Int */ |
| 109953 | VR128X, VR128X, i64mem, |
| 109954 | /* VCVTSI642SSZrr */ |
| 109955 | FR32X, FR32X, GR64, |
| 109956 | /* VCVTSI642SSZrr_Int */ |
| 109957 | VR128X, VR128X, GR64, |
| 109958 | /* VCVTSI642SSZrrb_Int */ |
| 109959 | VR128X, VR128X, GR64, AVX512RC, |
| 109960 | /* VCVTSI642SSrm */ |
| 109961 | FR32, FR32, i64mem, |
| 109962 | /* VCVTSI642SSrm_Int */ |
| 109963 | VR128, VR128, i64mem, |
| 109964 | /* VCVTSI642SSrr */ |
| 109965 | FR32, FR32, GR64, |
| 109966 | /* VCVTSI642SSrr_Int */ |
| 109967 | VR128, VR128, GR64, |
| 109968 | /* VCVTSS2SDZrm */ |
| 109969 | FR64X, FR64X, f32mem, |
| 109970 | /* VCVTSS2SDZrm_Int */ |
| 109971 | VR128X, VR128X, ssmem, |
| 109972 | /* VCVTSS2SDZrmk_Int */ |
| 109973 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 109974 | /* VCVTSS2SDZrmkz_Int */ |
| 109975 | VR128X, VK1WM, VR128X, ssmem, |
| 109976 | /* VCVTSS2SDZrr */ |
| 109977 | FR64X, FR64X, FR32X, |
| 109978 | /* VCVTSS2SDZrr_Int */ |
| 109979 | VR128X, VR128X, VR128X, |
| 109980 | /* VCVTSS2SDZrrb_Int */ |
| 109981 | VR128X, VR128X, VR128X, |
| 109982 | /* VCVTSS2SDZrrbk_Int */ |
| 109983 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 109984 | /* VCVTSS2SDZrrbkz_Int */ |
| 109985 | VR128X, VK1WM, VR128X, VR128X, |
| 109986 | /* VCVTSS2SDZrrk_Int */ |
| 109987 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 109988 | /* VCVTSS2SDZrrkz_Int */ |
| 109989 | VR128X, VK1WM, VR128X, VR128X, |
| 109990 | /* VCVTSS2SDrm */ |
| 109991 | FR64, FR64, f32mem, |
| 109992 | /* VCVTSS2SDrm_Int */ |
| 109993 | VR128, VR128, ssmem, |
| 109994 | /* VCVTSS2SDrr */ |
| 109995 | FR64, FR64, FR32, |
| 109996 | /* VCVTSS2SDrr_Int */ |
| 109997 | VR128, VR128, VR128, |
| 109998 | /* VCVTSS2SHZrm */ |
| 109999 | FR16X, FR16X, f32mem, |
| 110000 | /* VCVTSS2SHZrm_Int */ |
| 110001 | VR128X, VR128X, ssmem, |
| 110002 | /* VCVTSS2SHZrmk_Int */ |
| 110003 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 110004 | /* VCVTSS2SHZrmkz_Int */ |
| 110005 | VR128X, VK1WM, VR128X, ssmem, |
| 110006 | /* VCVTSS2SHZrr */ |
| 110007 | FR16X, FR16X, FR32X, |
| 110008 | /* VCVTSS2SHZrr_Int */ |
| 110009 | VR128X, VR128X, VR128X, |
| 110010 | /* VCVTSS2SHZrrb_Int */ |
| 110011 | VR128X, VR128X, VR128X, AVX512RC, |
| 110012 | /* VCVTSS2SHZrrbk_Int */ |
| 110013 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 110014 | /* VCVTSS2SHZrrbkz_Int */ |
| 110015 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 110016 | /* VCVTSS2SHZrrk_Int */ |
| 110017 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 110018 | /* VCVTSS2SHZrrkz_Int */ |
| 110019 | VR128X, VK1WM, VR128X, VR128X, |
| 110020 | /* VCVTSS2SI64Zrm */ |
| 110021 | GR64, f32mem, |
| 110022 | /* VCVTSS2SI64Zrm_Int */ |
| 110023 | GR64, ssmem, |
| 110024 | /* VCVTSS2SI64Zrr */ |
| 110025 | GR64, FR32X, |
| 110026 | /* VCVTSS2SI64Zrr_Int */ |
| 110027 | GR64, VR128X, |
| 110028 | /* VCVTSS2SI64Zrrb_Int */ |
| 110029 | GR64, VR128X, AVX512RC, |
| 110030 | /* VCVTSS2SI64rm */ |
| 110031 | GR64, f32mem, |
| 110032 | /* VCVTSS2SI64rm_Int */ |
| 110033 | GR64, ssmem, |
| 110034 | /* VCVTSS2SI64rr */ |
| 110035 | GR64, FR32, |
| 110036 | /* VCVTSS2SI64rr_Int */ |
| 110037 | GR64, VR128, |
| 110038 | /* VCVTSS2SIZrm */ |
| 110039 | GR32, f32mem, |
| 110040 | /* VCVTSS2SIZrm_Int */ |
| 110041 | GR32, ssmem, |
| 110042 | /* VCVTSS2SIZrr */ |
| 110043 | GR32, FR32X, |
| 110044 | /* VCVTSS2SIZrr_Int */ |
| 110045 | GR32, VR128X, |
| 110046 | /* VCVTSS2SIZrrb_Int */ |
| 110047 | GR32, VR128X, AVX512RC, |
| 110048 | /* VCVTSS2SIrm */ |
| 110049 | GR32, f32mem, |
| 110050 | /* VCVTSS2SIrm_Int */ |
| 110051 | GR32, ssmem, |
| 110052 | /* VCVTSS2SIrr */ |
| 110053 | GR32, FR32, |
| 110054 | /* VCVTSS2SIrr_Int */ |
| 110055 | GR32, VR128, |
| 110056 | /* VCVTSS2USI64Zrm_Int */ |
| 110057 | GR64, ssmem, |
| 110058 | /* VCVTSS2USI64Zrr_Int */ |
| 110059 | GR64, VR128X, |
| 110060 | /* VCVTSS2USI64Zrrb_Int */ |
| 110061 | GR64, VR128X, AVX512RC, |
| 110062 | /* VCVTSS2USIZrm_Int */ |
| 110063 | GR32, ssmem, |
| 110064 | /* VCVTSS2USIZrr_Int */ |
| 110065 | GR32, VR128X, |
| 110066 | /* VCVTSS2USIZrrb_Int */ |
| 110067 | GR32, VR128X, AVX512RC, |
| 110068 | /* VCVTTBF162IBSZ128rm */ |
| 110069 | VR128X, f128mem, |
| 110070 | /* VCVTTBF162IBSZ128rmb */ |
| 110071 | VR128X, f16mem, |
| 110072 | /* VCVTTBF162IBSZ128rmbk */ |
| 110073 | VR128X, VR128X, VK8WM, f16mem, |
| 110074 | /* VCVTTBF162IBSZ128rmbkz */ |
| 110075 | VR128X, VK8WM, f16mem, |
| 110076 | /* VCVTTBF162IBSZ128rmk */ |
| 110077 | VR128X, VR128X, VK8WM, f128mem, |
| 110078 | /* VCVTTBF162IBSZ128rmkz */ |
| 110079 | VR128X, VK8WM, f128mem, |
| 110080 | /* VCVTTBF162IBSZ128rr */ |
| 110081 | VR128X, VR128X, |
| 110082 | /* VCVTTBF162IBSZ128rrk */ |
| 110083 | VR128X, VR128X, VK8WM, VR128X, |
| 110084 | /* VCVTTBF162IBSZ128rrkz */ |
| 110085 | VR128X, VK8WM, VR128X, |
| 110086 | /* VCVTTBF162IBSZ256rm */ |
| 110087 | VR256X, f256mem, |
| 110088 | /* VCVTTBF162IBSZ256rmb */ |
| 110089 | VR256X, f16mem, |
| 110090 | /* VCVTTBF162IBSZ256rmbk */ |
| 110091 | VR256X, VR256X, VK16WM, f16mem, |
| 110092 | /* VCVTTBF162IBSZ256rmbkz */ |
| 110093 | VR256X, VK16WM, f16mem, |
| 110094 | /* VCVTTBF162IBSZ256rmk */ |
| 110095 | VR256X, VR256X, VK16WM, f256mem, |
| 110096 | /* VCVTTBF162IBSZ256rmkz */ |
| 110097 | VR256X, VK16WM, f256mem, |
| 110098 | /* VCVTTBF162IBSZ256rr */ |
| 110099 | VR256X, VR256X, |
| 110100 | /* VCVTTBF162IBSZ256rrk */ |
| 110101 | VR256X, VR256X, VK16WM, VR256X, |
| 110102 | /* VCVTTBF162IBSZ256rrkz */ |
| 110103 | VR256X, VK16WM, VR256X, |
| 110104 | /* VCVTTBF162IBSZrm */ |
| 110105 | VR512, f512mem, |
| 110106 | /* VCVTTBF162IBSZrmb */ |
| 110107 | VR512, f16mem, |
| 110108 | /* VCVTTBF162IBSZrmbk */ |
| 110109 | VR512, VR512, VK32WM, f16mem, |
| 110110 | /* VCVTTBF162IBSZrmbkz */ |
| 110111 | VR512, VK32WM, f16mem, |
| 110112 | /* VCVTTBF162IBSZrmk */ |
| 110113 | VR512, VR512, VK32WM, f512mem, |
| 110114 | /* VCVTTBF162IBSZrmkz */ |
| 110115 | VR512, VK32WM, f512mem, |
| 110116 | /* VCVTTBF162IBSZrr */ |
| 110117 | VR512, VR512, |
| 110118 | /* VCVTTBF162IBSZrrk */ |
| 110119 | VR512, VR512, VK32WM, VR512, |
| 110120 | /* VCVTTBF162IBSZrrkz */ |
| 110121 | VR512, VK32WM, VR512, |
| 110122 | /* VCVTTBF162IUBSZ128rm */ |
| 110123 | VR128X, f128mem, |
| 110124 | /* VCVTTBF162IUBSZ128rmb */ |
| 110125 | VR128X, f16mem, |
| 110126 | /* VCVTTBF162IUBSZ128rmbk */ |
| 110127 | VR128X, VR128X, VK8WM, f16mem, |
| 110128 | /* VCVTTBF162IUBSZ128rmbkz */ |
| 110129 | VR128X, VK8WM, f16mem, |
| 110130 | /* VCVTTBF162IUBSZ128rmk */ |
| 110131 | VR128X, VR128X, VK8WM, f128mem, |
| 110132 | /* VCVTTBF162IUBSZ128rmkz */ |
| 110133 | VR128X, VK8WM, f128mem, |
| 110134 | /* VCVTTBF162IUBSZ128rr */ |
| 110135 | VR128X, VR128X, |
| 110136 | /* VCVTTBF162IUBSZ128rrk */ |
| 110137 | VR128X, VR128X, VK8WM, VR128X, |
| 110138 | /* VCVTTBF162IUBSZ128rrkz */ |
| 110139 | VR128X, VK8WM, VR128X, |
| 110140 | /* VCVTTBF162IUBSZ256rm */ |
| 110141 | VR256X, f256mem, |
| 110142 | /* VCVTTBF162IUBSZ256rmb */ |
| 110143 | VR256X, f16mem, |
| 110144 | /* VCVTTBF162IUBSZ256rmbk */ |
| 110145 | VR256X, VR256X, VK16WM, f16mem, |
| 110146 | /* VCVTTBF162IUBSZ256rmbkz */ |
| 110147 | VR256X, VK16WM, f16mem, |
| 110148 | /* VCVTTBF162IUBSZ256rmk */ |
| 110149 | VR256X, VR256X, VK16WM, f256mem, |
| 110150 | /* VCVTTBF162IUBSZ256rmkz */ |
| 110151 | VR256X, VK16WM, f256mem, |
| 110152 | /* VCVTTBF162IUBSZ256rr */ |
| 110153 | VR256X, VR256X, |
| 110154 | /* VCVTTBF162IUBSZ256rrk */ |
| 110155 | VR256X, VR256X, VK16WM, VR256X, |
| 110156 | /* VCVTTBF162IUBSZ256rrkz */ |
| 110157 | VR256X, VK16WM, VR256X, |
| 110158 | /* VCVTTBF162IUBSZrm */ |
| 110159 | VR512, f512mem, |
| 110160 | /* VCVTTBF162IUBSZrmb */ |
| 110161 | VR512, f16mem, |
| 110162 | /* VCVTTBF162IUBSZrmbk */ |
| 110163 | VR512, VR512, VK32WM, f16mem, |
| 110164 | /* VCVTTBF162IUBSZrmbkz */ |
| 110165 | VR512, VK32WM, f16mem, |
| 110166 | /* VCVTTBF162IUBSZrmk */ |
| 110167 | VR512, VR512, VK32WM, f512mem, |
| 110168 | /* VCVTTBF162IUBSZrmkz */ |
| 110169 | VR512, VK32WM, f512mem, |
| 110170 | /* VCVTTBF162IUBSZrr */ |
| 110171 | VR512, VR512, |
| 110172 | /* VCVTTBF162IUBSZrrk */ |
| 110173 | VR512, VR512, VK32WM, VR512, |
| 110174 | /* VCVTTBF162IUBSZrrkz */ |
| 110175 | VR512, VK32WM, VR512, |
| 110176 | /* VCVTTPD2DQSZ128rm */ |
| 110177 | VR128X, f128mem, |
| 110178 | /* VCVTTPD2DQSZ128rmb */ |
| 110179 | VR128X, f64mem, |
| 110180 | /* VCVTTPD2DQSZ128rmbk */ |
| 110181 | VR128X, VR128X, VK2WM, f64mem, |
| 110182 | /* VCVTTPD2DQSZ128rmbkz */ |
| 110183 | VR128X, VK2WM, f64mem, |
| 110184 | /* VCVTTPD2DQSZ128rmk */ |
| 110185 | VR128X, VR128X, VK2WM, f128mem, |
| 110186 | /* VCVTTPD2DQSZ128rmkz */ |
| 110187 | VR128X, VK2WM, f128mem, |
| 110188 | /* VCVTTPD2DQSZ128rr */ |
| 110189 | VR128X, VR128X, |
| 110190 | /* VCVTTPD2DQSZ128rrk */ |
| 110191 | VR128X, VR128X, VK2WM, VR128X, |
| 110192 | /* VCVTTPD2DQSZ128rrkz */ |
| 110193 | VR128X, VK2WM, VR128X, |
| 110194 | /* VCVTTPD2DQSZ256rm */ |
| 110195 | VR128X, f256mem, |
| 110196 | /* VCVTTPD2DQSZ256rmb */ |
| 110197 | VR128X, f64mem, |
| 110198 | /* VCVTTPD2DQSZ256rmbk */ |
| 110199 | VR128X, VR128X, VK4WM, f64mem, |
| 110200 | /* VCVTTPD2DQSZ256rmbkz */ |
| 110201 | VR128X, VK4WM, f64mem, |
| 110202 | /* VCVTTPD2DQSZ256rmk */ |
| 110203 | VR128X, VR128X, VK4WM, f256mem, |
| 110204 | /* VCVTTPD2DQSZ256rmkz */ |
| 110205 | VR128X, VK4WM, f256mem, |
| 110206 | /* VCVTTPD2DQSZ256rr */ |
| 110207 | VR128X, VR256X, |
| 110208 | /* VCVTTPD2DQSZ256rrb */ |
| 110209 | VR128X, VR256X, |
| 110210 | /* VCVTTPD2DQSZ256rrbk */ |
| 110211 | VR128X, VR128X, VK4WM, VR256X, |
| 110212 | /* VCVTTPD2DQSZ256rrbkz */ |
| 110213 | VR128X, VK4WM, VR256X, |
| 110214 | /* VCVTTPD2DQSZ256rrk */ |
| 110215 | VR128X, VR128X, VK4WM, VR256X, |
| 110216 | /* VCVTTPD2DQSZ256rrkz */ |
| 110217 | VR128X, VK4WM, VR256X, |
| 110218 | /* VCVTTPD2DQSZrm */ |
| 110219 | VR256X, f512mem, |
| 110220 | /* VCVTTPD2DQSZrmb */ |
| 110221 | VR256X, f64mem, |
| 110222 | /* VCVTTPD2DQSZrmbk */ |
| 110223 | VR256X, VR256X, VK8WM, f64mem, |
| 110224 | /* VCVTTPD2DQSZrmbkz */ |
| 110225 | VR256X, VK8WM, f64mem, |
| 110226 | /* VCVTTPD2DQSZrmk */ |
| 110227 | VR256X, VR256X, VK8WM, f512mem, |
| 110228 | /* VCVTTPD2DQSZrmkz */ |
| 110229 | VR256X, VK8WM, f512mem, |
| 110230 | /* VCVTTPD2DQSZrr */ |
| 110231 | VR256X, VR512, |
| 110232 | /* VCVTTPD2DQSZrrb */ |
| 110233 | VR256X, VR512, |
| 110234 | /* VCVTTPD2DQSZrrbk */ |
| 110235 | VR256X, VR256X, VK8WM, VR512, |
| 110236 | /* VCVTTPD2DQSZrrbkz */ |
| 110237 | VR256X, VK8WM, VR512, |
| 110238 | /* VCVTTPD2DQSZrrk */ |
| 110239 | VR256X, VR256X, VK8WM, VR512, |
| 110240 | /* VCVTTPD2DQSZrrkz */ |
| 110241 | VR256X, VK8WM, VR512, |
| 110242 | /* VCVTTPD2DQYrm */ |
| 110243 | VR128, f256mem, |
| 110244 | /* VCVTTPD2DQYrr */ |
| 110245 | VR128, VR256, |
| 110246 | /* VCVTTPD2DQZ128rm */ |
| 110247 | VR128X, f128mem, |
| 110248 | /* VCVTTPD2DQZ128rmb */ |
| 110249 | VR128X, f64mem, |
| 110250 | /* VCVTTPD2DQZ128rmbk */ |
| 110251 | VR128X, VR128X, VK2WM, f64mem, |
| 110252 | /* VCVTTPD2DQZ128rmbkz */ |
| 110253 | VR128X, VK2WM, f64mem, |
| 110254 | /* VCVTTPD2DQZ128rmk */ |
| 110255 | VR128X, VR128X, VK2WM, f128mem, |
| 110256 | /* VCVTTPD2DQZ128rmkz */ |
| 110257 | VR128X, VK2WM, f128mem, |
| 110258 | /* VCVTTPD2DQZ128rr */ |
| 110259 | VR128X, VR128X, |
| 110260 | /* VCVTTPD2DQZ128rrk */ |
| 110261 | VR128X, VR128X, VK2WM, VR128X, |
| 110262 | /* VCVTTPD2DQZ128rrkz */ |
| 110263 | VR128X, VK2WM, VR128X, |
| 110264 | /* VCVTTPD2DQZ256rm */ |
| 110265 | VR128X, f256mem, |
| 110266 | /* VCVTTPD2DQZ256rmb */ |
| 110267 | VR128X, f64mem, |
| 110268 | /* VCVTTPD2DQZ256rmbk */ |
| 110269 | VR128X, VR128X, VK4WM, f64mem, |
| 110270 | /* VCVTTPD2DQZ256rmbkz */ |
| 110271 | VR128X, VK4WM, f64mem, |
| 110272 | /* VCVTTPD2DQZ256rmk */ |
| 110273 | VR128X, VR128X, VK4WM, f256mem, |
| 110274 | /* VCVTTPD2DQZ256rmkz */ |
| 110275 | VR128X, VK4WM, f256mem, |
| 110276 | /* VCVTTPD2DQZ256rr */ |
| 110277 | VR128X, VR256X, |
| 110278 | /* VCVTTPD2DQZ256rrk */ |
| 110279 | VR128X, VR128X, VK4WM, VR256X, |
| 110280 | /* VCVTTPD2DQZ256rrkz */ |
| 110281 | VR128X, VK4WM, VR256X, |
| 110282 | /* VCVTTPD2DQZrm */ |
| 110283 | VR256X, f512mem, |
| 110284 | /* VCVTTPD2DQZrmb */ |
| 110285 | VR256X, f64mem, |
| 110286 | /* VCVTTPD2DQZrmbk */ |
| 110287 | VR256X, VR256X, VK8WM, f64mem, |
| 110288 | /* VCVTTPD2DQZrmbkz */ |
| 110289 | VR256X, VK8WM, f64mem, |
| 110290 | /* VCVTTPD2DQZrmk */ |
| 110291 | VR256X, VR256X, VK8WM, f512mem, |
| 110292 | /* VCVTTPD2DQZrmkz */ |
| 110293 | VR256X, VK8WM, f512mem, |
| 110294 | /* VCVTTPD2DQZrr */ |
| 110295 | VR256X, VR512, |
| 110296 | /* VCVTTPD2DQZrrb */ |
| 110297 | VR256X, VR512, |
| 110298 | /* VCVTTPD2DQZrrbk */ |
| 110299 | VR256X, VR256X, VK8WM, VR512, |
| 110300 | /* VCVTTPD2DQZrrbkz */ |
| 110301 | VR256X, VK8WM, VR512, |
| 110302 | /* VCVTTPD2DQZrrk */ |
| 110303 | VR256X, VR256X, VK8WM, VR512, |
| 110304 | /* VCVTTPD2DQZrrkz */ |
| 110305 | VR256X, VK8WM, VR512, |
| 110306 | /* VCVTTPD2DQrm */ |
| 110307 | VR128, f128mem, |
| 110308 | /* VCVTTPD2DQrr */ |
| 110309 | VR128, VR128, |
| 110310 | /* VCVTTPD2QQSZ128rm */ |
| 110311 | VR128X, f128mem, |
| 110312 | /* VCVTTPD2QQSZ128rmb */ |
| 110313 | VR128X, f64mem, |
| 110314 | /* VCVTTPD2QQSZ128rmbk */ |
| 110315 | VR128X, VR128X, VK2WM, f64mem, |
| 110316 | /* VCVTTPD2QQSZ128rmbkz */ |
| 110317 | VR128X, VK2WM, f64mem, |
| 110318 | /* VCVTTPD2QQSZ128rmk */ |
| 110319 | VR128X, VR128X, VK2WM, f128mem, |
| 110320 | /* VCVTTPD2QQSZ128rmkz */ |
| 110321 | VR128X, VK2WM, f128mem, |
| 110322 | /* VCVTTPD2QQSZ128rr */ |
| 110323 | VR128X, VR128X, |
| 110324 | /* VCVTTPD2QQSZ128rrk */ |
| 110325 | VR128X, VR128X, VK2WM, VR128X, |
| 110326 | /* VCVTTPD2QQSZ128rrkz */ |
| 110327 | VR128X, VK2WM, VR128X, |
| 110328 | /* VCVTTPD2QQSZ256rm */ |
| 110329 | VR256X, f256mem, |
| 110330 | /* VCVTTPD2QQSZ256rmb */ |
| 110331 | VR256X, f64mem, |
| 110332 | /* VCVTTPD2QQSZ256rmbk */ |
| 110333 | VR256X, VR256X, VK4WM, f64mem, |
| 110334 | /* VCVTTPD2QQSZ256rmbkz */ |
| 110335 | VR256X, VK4WM, f64mem, |
| 110336 | /* VCVTTPD2QQSZ256rmk */ |
| 110337 | VR256X, VR256X, VK4WM, f256mem, |
| 110338 | /* VCVTTPD2QQSZ256rmkz */ |
| 110339 | VR256X, VK4WM, f256mem, |
| 110340 | /* VCVTTPD2QQSZ256rr */ |
| 110341 | VR256X, VR256X, |
| 110342 | /* VCVTTPD2QQSZ256rrb */ |
| 110343 | VR256X, VR256X, |
| 110344 | /* VCVTTPD2QQSZ256rrbk */ |
| 110345 | VR256X, VR256X, VK4WM, VR256X, |
| 110346 | /* VCVTTPD2QQSZ256rrbkz */ |
| 110347 | VR256X, VK4WM, VR256X, |
| 110348 | /* VCVTTPD2QQSZ256rrk */ |
| 110349 | VR256X, VR256X, VK4WM, VR256X, |
| 110350 | /* VCVTTPD2QQSZ256rrkz */ |
| 110351 | VR256X, VK4WM, VR256X, |
| 110352 | /* VCVTTPD2QQSZrm */ |
| 110353 | VR512, f512mem, |
| 110354 | /* VCVTTPD2QQSZrmb */ |
| 110355 | VR512, f64mem, |
| 110356 | /* VCVTTPD2QQSZrmbk */ |
| 110357 | VR512, VR512, VK8WM, f64mem, |
| 110358 | /* VCVTTPD2QQSZrmbkz */ |
| 110359 | VR512, VK8WM, f64mem, |
| 110360 | /* VCVTTPD2QQSZrmk */ |
| 110361 | VR512, VR512, VK8WM, f512mem, |
| 110362 | /* VCVTTPD2QQSZrmkz */ |
| 110363 | VR512, VK8WM, f512mem, |
| 110364 | /* VCVTTPD2QQSZrr */ |
| 110365 | VR512, VR512, |
| 110366 | /* VCVTTPD2QQSZrrb */ |
| 110367 | VR512, VR512, |
| 110368 | /* VCVTTPD2QQSZrrbk */ |
| 110369 | VR512, VR512, VK8WM, VR512, |
| 110370 | /* VCVTTPD2QQSZrrbkz */ |
| 110371 | VR512, VK8WM, VR512, |
| 110372 | /* VCVTTPD2QQSZrrk */ |
| 110373 | VR512, VR512, VK8WM, VR512, |
| 110374 | /* VCVTTPD2QQSZrrkz */ |
| 110375 | VR512, VK8WM, VR512, |
| 110376 | /* VCVTTPD2QQZ128rm */ |
| 110377 | VR128X, f128mem, |
| 110378 | /* VCVTTPD2QQZ128rmb */ |
| 110379 | VR128X, f64mem, |
| 110380 | /* VCVTTPD2QQZ128rmbk */ |
| 110381 | VR128X, VR128X, VK2WM, f64mem, |
| 110382 | /* VCVTTPD2QQZ128rmbkz */ |
| 110383 | VR128X, VK2WM, f64mem, |
| 110384 | /* VCVTTPD2QQZ128rmk */ |
| 110385 | VR128X, VR128X, VK2WM, f128mem, |
| 110386 | /* VCVTTPD2QQZ128rmkz */ |
| 110387 | VR128X, VK2WM, f128mem, |
| 110388 | /* VCVTTPD2QQZ128rr */ |
| 110389 | VR128X, VR128X, |
| 110390 | /* VCVTTPD2QQZ128rrk */ |
| 110391 | VR128X, VR128X, VK2WM, VR128X, |
| 110392 | /* VCVTTPD2QQZ128rrkz */ |
| 110393 | VR128X, VK2WM, VR128X, |
| 110394 | /* VCVTTPD2QQZ256rm */ |
| 110395 | VR256X, f256mem, |
| 110396 | /* VCVTTPD2QQZ256rmb */ |
| 110397 | VR256X, f64mem, |
| 110398 | /* VCVTTPD2QQZ256rmbk */ |
| 110399 | VR256X, VR256X, VK4WM, f64mem, |
| 110400 | /* VCVTTPD2QQZ256rmbkz */ |
| 110401 | VR256X, VK4WM, f64mem, |
| 110402 | /* VCVTTPD2QQZ256rmk */ |
| 110403 | VR256X, VR256X, VK4WM, f256mem, |
| 110404 | /* VCVTTPD2QQZ256rmkz */ |
| 110405 | VR256X, VK4WM, f256mem, |
| 110406 | /* VCVTTPD2QQZ256rr */ |
| 110407 | VR256X, VR256X, |
| 110408 | /* VCVTTPD2QQZ256rrk */ |
| 110409 | VR256X, VR256X, VK4WM, VR256X, |
| 110410 | /* VCVTTPD2QQZ256rrkz */ |
| 110411 | VR256X, VK4WM, VR256X, |
| 110412 | /* VCVTTPD2QQZrm */ |
| 110413 | VR512, f512mem, |
| 110414 | /* VCVTTPD2QQZrmb */ |
| 110415 | VR512, f64mem, |
| 110416 | /* VCVTTPD2QQZrmbk */ |
| 110417 | VR512, VR512, VK8WM, f64mem, |
| 110418 | /* VCVTTPD2QQZrmbkz */ |
| 110419 | VR512, VK8WM, f64mem, |
| 110420 | /* VCVTTPD2QQZrmk */ |
| 110421 | VR512, VR512, VK8WM, f512mem, |
| 110422 | /* VCVTTPD2QQZrmkz */ |
| 110423 | VR512, VK8WM, f512mem, |
| 110424 | /* VCVTTPD2QQZrr */ |
| 110425 | VR512, VR512, |
| 110426 | /* VCVTTPD2QQZrrb */ |
| 110427 | VR512, VR512, |
| 110428 | /* VCVTTPD2QQZrrbk */ |
| 110429 | VR512, VR512, VK8WM, VR512, |
| 110430 | /* VCVTTPD2QQZrrbkz */ |
| 110431 | VR512, VK8WM, VR512, |
| 110432 | /* VCVTTPD2QQZrrk */ |
| 110433 | VR512, VR512, VK8WM, VR512, |
| 110434 | /* VCVTTPD2QQZrrkz */ |
| 110435 | VR512, VK8WM, VR512, |
| 110436 | /* VCVTTPD2UDQSZ128rm */ |
| 110437 | VR128X, f128mem, |
| 110438 | /* VCVTTPD2UDQSZ128rmb */ |
| 110439 | VR128X, f64mem, |
| 110440 | /* VCVTTPD2UDQSZ128rmbk */ |
| 110441 | VR128X, VR128X, VK2WM, f64mem, |
| 110442 | /* VCVTTPD2UDQSZ128rmbkz */ |
| 110443 | VR128X, VK2WM, f64mem, |
| 110444 | /* VCVTTPD2UDQSZ128rmk */ |
| 110445 | VR128X, VR128X, VK2WM, f128mem, |
| 110446 | /* VCVTTPD2UDQSZ128rmkz */ |
| 110447 | VR128X, VK2WM, f128mem, |
| 110448 | /* VCVTTPD2UDQSZ128rr */ |
| 110449 | VR128X, VR128X, |
| 110450 | /* VCVTTPD2UDQSZ128rrk */ |
| 110451 | VR128X, VR128X, VK2WM, VR128X, |
| 110452 | /* VCVTTPD2UDQSZ128rrkz */ |
| 110453 | VR128X, VK2WM, VR128X, |
| 110454 | /* VCVTTPD2UDQSZ256rm */ |
| 110455 | VR128X, f256mem, |
| 110456 | /* VCVTTPD2UDQSZ256rmb */ |
| 110457 | VR128X, f64mem, |
| 110458 | /* VCVTTPD2UDQSZ256rmbk */ |
| 110459 | VR128X, VR128X, VK4WM, f64mem, |
| 110460 | /* VCVTTPD2UDQSZ256rmbkz */ |
| 110461 | VR128X, VK4WM, f64mem, |
| 110462 | /* VCVTTPD2UDQSZ256rmk */ |
| 110463 | VR128X, VR128X, VK4WM, f256mem, |
| 110464 | /* VCVTTPD2UDQSZ256rmkz */ |
| 110465 | VR128X, VK4WM, f256mem, |
| 110466 | /* VCVTTPD2UDQSZ256rr */ |
| 110467 | VR128X, VR256X, |
| 110468 | /* VCVTTPD2UDQSZ256rrb */ |
| 110469 | VR128X, VR256X, |
| 110470 | /* VCVTTPD2UDQSZ256rrbk */ |
| 110471 | VR128X, VR128X, VK4WM, VR256X, |
| 110472 | /* VCVTTPD2UDQSZ256rrbkz */ |
| 110473 | VR128X, VK4WM, VR256X, |
| 110474 | /* VCVTTPD2UDQSZ256rrk */ |
| 110475 | VR128X, VR128X, VK4WM, VR256X, |
| 110476 | /* VCVTTPD2UDQSZ256rrkz */ |
| 110477 | VR128X, VK4WM, VR256X, |
| 110478 | /* VCVTTPD2UDQSZrm */ |
| 110479 | VR256X, f512mem, |
| 110480 | /* VCVTTPD2UDQSZrmb */ |
| 110481 | VR256X, f64mem, |
| 110482 | /* VCVTTPD2UDQSZrmbk */ |
| 110483 | VR256X, VR256X, VK8WM, f64mem, |
| 110484 | /* VCVTTPD2UDQSZrmbkz */ |
| 110485 | VR256X, VK8WM, f64mem, |
| 110486 | /* VCVTTPD2UDQSZrmk */ |
| 110487 | VR256X, VR256X, VK8WM, f512mem, |
| 110488 | /* VCVTTPD2UDQSZrmkz */ |
| 110489 | VR256X, VK8WM, f512mem, |
| 110490 | /* VCVTTPD2UDQSZrr */ |
| 110491 | VR256X, VR512, |
| 110492 | /* VCVTTPD2UDQSZrrb */ |
| 110493 | VR256X, VR512, |
| 110494 | /* VCVTTPD2UDQSZrrbk */ |
| 110495 | VR256X, VR256X, VK8WM, VR512, |
| 110496 | /* VCVTTPD2UDQSZrrbkz */ |
| 110497 | VR256X, VK8WM, VR512, |
| 110498 | /* VCVTTPD2UDQSZrrk */ |
| 110499 | VR256X, VR256X, VK8WM, VR512, |
| 110500 | /* VCVTTPD2UDQSZrrkz */ |
| 110501 | VR256X, VK8WM, VR512, |
| 110502 | /* VCVTTPD2UDQZ128rm */ |
| 110503 | VR128X, f128mem, |
| 110504 | /* VCVTTPD2UDQZ128rmb */ |
| 110505 | VR128X, f64mem, |
| 110506 | /* VCVTTPD2UDQZ128rmbk */ |
| 110507 | VR128X, VR128X, VK2WM, f64mem, |
| 110508 | /* VCVTTPD2UDQZ128rmbkz */ |
| 110509 | VR128X, VK2WM, f64mem, |
| 110510 | /* VCVTTPD2UDQZ128rmk */ |
| 110511 | VR128X, VR128X, VK2WM, f128mem, |
| 110512 | /* VCVTTPD2UDQZ128rmkz */ |
| 110513 | VR128X, VK2WM, f128mem, |
| 110514 | /* VCVTTPD2UDQZ128rr */ |
| 110515 | VR128X, VR128X, |
| 110516 | /* VCVTTPD2UDQZ128rrk */ |
| 110517 | VR128X, VR128X, VK2WM, VR128X, |
| 110518 | /* VCVTTPD2UDQZ128rrkz */ |
| 110519 | VR128X, VK2WM, VR128X, |
| 110520 | /* VCVTTPD2UDQZ256rm */ |
| 110521 | VR128X, f256mem, |
| 110522 | /* VCVTTPD2UDQZ256rmb */ |
| 110523 | VR128X, f64mem, |
| 110524 | /* VCVTTPD2UDQZ256rmbk */ |
| 110525 | VR128X, VR128X, VK4WM, f64mem, |
| 110526 | /* VCVTTPD2UDQZ256rmbkz */ |
| 110527 | VR128X, VK4WM, f64mem, |
| 110528 | /* VCVTTPD2UDQZ256rmk */ |
| 110529 | VR128X, VR128X, VK4WM, f256mem, |
| 110530 | /* VCVTTPD2UDQZ256rmkz */ |
| 110531 | VR128X, VK4WM, f256mem, |
| 110532 | /* VCVTTPD2UDQZ256rr */ |
| 110533 | VR128X, VR256X, |
| 110534 | /* VCVTTPD2UDQZ256rrk */ |
| 110535 | VR128X, VR128X, VK4WM, VR256X, |
| 110536 | /* VCVTTPD2UDQZ256rrkz */ |
| 110537 | VR128X, VK4WM, VR256X, |
| 110538 | /* VCVTTPD2UDQZrm */ |
| 110539 | VR256X, f512mem, |
| 110540 | /* VCVTTPD2UDQZrmb */ |
| 110541 | VR256X, f64mem, |
| 110542 | /* VCVTTPD2UDQZrmbk */ |
| 110543 | VR256X, VR256X, VK8WM, f64mem, |
| 110544 | /* VCVTTPD2UDQZrmbkz */ |
| 110545 | VR256X, VK8WM, f64mem, |
| 110546 | /* VCVTTPD2UDQZrmk */ |
| 110547 | VR256X, VR256X, VK8WM, f512mem, |
| 110548 | /* VCVTTPD2UDQZrmkz */ |
| 110549 | VR256X, VK8WM, f512mem, |
| 110550 | /* VCVTTPD2UDQZrr */ |
| 110551 | VR256X, VR512, |
| 110552 | /* VCVTTPD2UDQZrrb */ |
| 110553 | VR256X, VR512, |
| 110554 | /* VCVTTPD2UDQZrrbk */ |
| 110555 | VR256X, VR256X, VK8WM, VR512, |
| 110556 | /* VCVTTPD2UDQZrrbkz */ |
| 110557 | VR256X, VK8WM, VR512, |
| 110558 | /* VCVTTPD2UDQZrrk */ |
| 110559 | VR256X, VR256X, VK8WM, VR512, |
| 110560 | /* VCVTTPD2UDQZrrkz */ |
| 110561 | VR256X, VK8WM, VR512, |
| 110562 | /* VCVTTPD2UQQSZ128rm */ |
| 110563 | VR128X, f128mem, |
| 110564 | /* VCVTTPD2UQQSZ128rmb */ |
| 110565 | VR128X, f64mem, |
| 110566 | /* VCVTTPD2UQQSZ128rmbk */ |
| 110567 | VR128X, VR128X, VK2WM, f64mem, |
| 110568 | /* VCVTTPD2UQQSZ128rmbkz */ |
| 110569 | VR128X, VK2WM, f64mem, |
| 110570 | /* VCVTTPD2UQQSZ128rmk */ |
| 110571 | VR128X, VR128X, VK2WM, f128mem, |
| 110572 | /* VCVTTPD2UQQSZ128rmkz */ |
| 110573 | VR128X, VK2WM, f128mem, |
| 110574 | /* VCVTTPD2UQQSZ128rr */ |
| 110575 | VR128X, VR128X, |
| 110576 | /* VCVTTPD2UQQSZ128rrk */ |
| 110577 | VR128X, VR128X, VK2WM, VR128X, |
| 110578 | /* VCVTTPD2UQQSZ128rrkz */ |
| 110579 | VR128X, VK2WM, VR128X, |
| 110580 | /* VCVTTPD2UQQSZ256rm */ |
| 110581 | VR256X, f256mem, |
| 110582 | /* VCVTTPD2UQQSZ256rmb */ |
| 110583 | VR256X, f64mem, |
| 110584 | /* VCVTTPD2UQQSZ256rmbk */ |
| 110585 | VR256X, VR256X, VK4WM, f64mem, |
| 110586 | /* VCVTTPD2UQQSZ256rmbkz */ |
| 110587 | VR256X, VK4WM, f64mem, |
| 110588 | /* VCVTTPD2UQQSZ256rmk */ |
| 110589 | VR256X, VR256X, VK4WM, f256mem, |
| 110590 | /* VCVTTPD2UQQSZ256rmkz */ |
| 110591 | VR256X, VK4WM, f256mem, |
| 110592 | /* VCVTTPD2UQQSZ256rr */ |
| 110593 | VR256X, VR256X, |
| 110594 | /* VCVTTPD2UQQSZ256rrb */ |
| 110595 | VR256X, VR256X, |
| 110596 | /* VCVTTPD2UQQSZ256rrbk */ |
| 110597 | VR256X, VR256X, VK4WM, VR256X, |
| 110598 | /* VCVTTPD2UQQSZ256rrbkz */ |
| 110599 | VR256X, VK4WM, VR256X, |
| 110600 | /* VCVTTPD2UQQSZ256rrk */ |
| 110601 | VR256X, VR256X, VK4WM, VR256X, |
| 110602 | /* VCVTTPD2UQQSZ256rrkz */ |
| 110603 | VR256X, VK4WM, VR256X, |
| 110604 | /* VCVTTPD2UQQSZrm */ |
| 110605 | VR512, f512mem, |
| 110606 | /* VCVTTPD2UQQSZrmb */ |
| 110607 | VR512, f64mem, |
| 110608 | /* VCVTTPD2UQQSZrmbk */ |
| 110609 | VR512, VR512, VK8WM, f64mem, |
| 110610 | /* VCVTTPD2UQQSZrmbkz */ |
| 110611 | VR512, VK8WM, f64mem, |
| 110612 | /* VCVTTPD2UQQSZrmk */ |
| 110613 | VR512, VR512, VK8WM, f512mem, |
| 110614 | /* VCVTTPD2UQQSZrmkz */ |
| 110615 | VR512, VK8WM, f512mem, |
| 110616 | /* VCVTTPD2UQQSZrr */ |
| 110617 | VR512, VR512, |
| 110618 | /* VCVTTPD2UQQSZrrb */ |
| 110619 | VR512, VR512, |
| 110620 | /* VCVTTPD2UQQSZrrbk */ |
| 110621 | VR512, VR512, VK8WM, VR512, |
| 110622 | /* VCVTTPD2UQQSZrrbkz */ |
| 110623 | VR512, VK8WM, VR512, |
| 110624 | /* VCVTTPD2UQQSZrrk */ |
| 110625 | VR512, VR512, VK8WM, VR512, |
| 110626 | /* VCVTTPD2UQQSZrrkz */ |
| 110627 | VR512, VK8WM, VR512, |
| 110628 | /* VCVTTPD2UQQZ128rm */ |
| 110629 | VR128X, f128mem, |
| 110630 | /* VCVTTPD2UQQZ128rmb */ |
| 110631 | VR128X, f64mem, |
| 110632 | /* VCVTTPD2UQQZ128rmbk */ |
| 110633 | VR128X, VR128X, VK2WM, f64mem, |
| 110634 | /* VCVTTPD2UQQZ128rmbkz */ |
| 110635 | VR128X, VK2WM, f64mem, |
| 110636 | /* VCVTTPD2UQQZ128rmk */ |
| 110637 | VR128X, VR128X, VK2WM, f128mem, |
| 110638 | /* VCVTTPD2UQQZ128rmkz */ |
| 110639 | VR128X, VK2WM, f128mem, |
| 110640 | /* VCVTTPD2UQQZ128rr */ |
| 110641 | VR128X, VR128X, |
| 110642 | /* VCVTTPD2UQQZ128rrk */ |
| 110643 | VR128X, VR128X, VK2WM, VR128X, |
| 110644 | /* VCVTTPD2UQQZ128rrkz */ |
| 110645 | VR128X, VK2WM, VR128X, |
| 110646 | /* VCVTTPD2UQQZ256rm */ |
| 110647 | VR256X, f256mem, |
| 110648 | /* VCVTTPD2UQQZ256rmb */ |
| 110649 | VR256X, f64mem, |
| 110650 | /* VCVTTPD2UQQZ256rmbk */ |
| 110651 | VR256X, VR256X, VK4WM, f64mem, |
| 110652 | /* VCVTTPD2UQQZ256rmbkz */ |
| 110653 | VR256X, VK4WM, f64mem, |
| 110654 | /* VCVTTPD2UQQZ256rmk */ |
| 110655 | VR256X, VR256X, VK4WM, f256mem, |
| 110656 | /* VCVTTPD2UQQZ256rmkz */ |
| 110657 | VR256X, VK4WM, f256mem, |
| 110658 | /* VCVTTPD2UQQZ256rr */ |
| 110659 | VR256X, VR256X, |
| 110660 | /* VCVTTPD2UQQZ256rrk */ |
| 110661 | VR256X, VR256X, VK4WM, VR256X, |
| 110662 | /* VCVTTPD2UQQZ256rrkz */ |
| 110663 | VR256X, VK4WM, VR256X, |
| 110664 | /* VCVTTPD2UQQZrm */ |
| 110665 | VR512, f512mem, |
| 110666 | /* VCVTTPD2UQQZrmb */ |
| 110667 | VR512, f64mem, |
| 110668 | /* VCVTTPD2UQQZrmbk */ |
| 110669 | VR512, VR512, VK8WM, f64mem, |
| 110670 | /* VCVTTPD2UQQZrmbkz */ |
| 110671 | VR512, VK8WM, f64mem, |
| 110672 | /* VCVTTPD2UQQZrmk */ |
| 110673 | VR512, VR512, VK8WM, f512mem, |
| 110674 | /* VCVTTPD2UQQZrmkz */ |
| 110675 | VR512, VK8WM, f512mem, |
| 110676 | /* VCVTTPD2UQQZrr */ |
| 110677 | VR512, VR512, |
| 110678 | /* VCVTTPD2UQQZrrb */ |
| 110679 | VR512, VR512, |
| 110680 | /* VCVTTPD2UQQZrrbk */ |
| 110681 | VR512, VR512, VK8WM, VR512, |
| 110682 | /* VCVTTPD2UQQZrrbkz */ |
| 110683 | VR512, VK8WM, VR512, |
| 110684 | /* VCVTTPD2UQQZrrk */ |
| 110685 | VR512, VR512, VK8WM, VR512, |
| 110686 | /* VCVTTPD2UQQZrrkz */ |
| 110687 | VR512, VK8WM, VR512, |
| 110688 | /* VCVTTPH2DQZ128rm */ |
| 110689 | VR128X, f64mem, |
| 110690 | /* VCVTTPH2DQZ128rmb */ |
| 110691 | VR128X, f16mem, |
| 110692 | /* VCVTTPH2DQZ128rmbk */ |
| 110693 | VR128X, VR128X, VK4WM, f16mem, |
| 110694 | /* VCVTTPH2DQZ128rmbkz */ |
| 110695 | VR128X, VK4WM, f16mem, |
| 110696 | /* VCVTTPH2DQZ128rmk */ |
| 110697 | VR128X, VR128X, VK4WM, f64mem, |
| 110698 | /* VCVTTPH2DQZ128rmkz */ |
| 110699 | VR128X, VK4WM, f64mem, |
| 110700 | /* VCVTTPH2DQZ128rr */ |
| 110701 | VR128X, VR128X, |
| 110702 | /* VCVTTPH2DQZ128rrk */ |
| 110703 | VR128X, VR128X, VK4WM, VR128X, |
| 110704 | /* VCVTTPH2DQZ128rrkz */ |
| 110705 | VR128X, VK4WM, VR128X, |
| 110706 | /* VCVTTPH2DQZ256rm */ |
| 110707 | VR256X, f128mem, |
| 110708 | /* VCVTTPH2DQZ256rmb */ |
| 110709 | VR256X, f16mem, |
| 110710 | /* VCVTTPH2DQZ256rmbk */ |
| 110711 | VR256X, VR256X, VK8WM, f16mem, |
| 110712 | /* VCVTTPH2DQZ256rmbkz */ |
| 110713 | VR256X, VK8WM, f16mem, |
| 110714 | /* VCVTTPH2DQZ256rmk */ |
| 110715 | VR256X, VR256X, VK8WM, f128mem, |
| 110716 | /* VCVTTPH2DQZ256rmkz */ |
| 110717 | VR256X, VK8WM, f128mem, |
| 110718 | /* VCVTTPH2DQZ256rr */ |
| 110719 | VR256X, VR128X, |
| 110720 | /* VCVTTPH2DQZ256rrk */ |
| 110721 | VR256X, VR256X, VK8WM, VR128X, |
| 110722 | /* VCVTTPH2DQZ256rrkz */ |
| 110723 | VR256X, VK8WM, VR128X, |
| 110724 | /* VCVTTPH2DQZrm */ |
| 110725 | VR512, f256mem, |
| 110726 | /* VCVTTPH2DQZrmb */ |
| 110727 | VR512, f16mem, |
| 110728 | /* VCVTTPH2DQZrmbk */ |
| 110729 | VR512, VR512, VK16WM, f16mem, |
| 110730 | /* VCVTTPH2DQZrmbkz */ |
| 110731 | VR512, VK16WM, f16mem, |
| 110732 | /* VCVTTPH2DQZrmk */ |
| 110733 | VR512, VR512, VK16WM, f256mem, |
| 110734 | /* VCVTTPH2DQZrmkz */ |
| 110735 | VR512, VK16WM, f256mem, |
| 110736 | /* VCVTTPH2DQZrr */ |
| 110737 | VR512, VR256X, |
| 110738 | /* VCVTTPH2DQZrrb */ |
| 110739 | VR512, VR256X, |
| 110740 | /* VCVTTPH2DQZrrbk */ |
| 110741 | VR512, VR512, VK16WM, VR256X, |
| 110742 | /* VCVTTPH2DQZrrbkz */ |
| 110743 | VR512, VK16WM, VR256X, |
| 110744 | /* VCVTTPH2DQZrrk */ |
| 110745 | VR512, VR512, VK16WM, VR256X, |
| 110746 | /* VCVTTPH2DQZrrkz */ |
| 110747 | VR512, VK16WM, VR256X, |
| 110748 | /* VCVTTPH2IBSZ128rm */ |
| 110749 | VR128X, f128mem, |
| 110750 | /* VCVTTPH2IBSZ128rmb */ |
| 110751 | VR128X, f16mem, |
| 110752 | /* VCVTTPH2IBSZ128rmbk */ |
| 110753 | VR128X, VR128X, VK8WM, f16mem, |
| 110754 | /* VCVTTPH2IBSZ128rmbkz */ |
| 110755 | VR128X, VK8WM, f16mem, |
| 110756 | /* VCVTTPH2IBSZ128rmk */ |
| 110757 | VR128X, VR128X, VK8WM, f128mem, |
| 110758 | /* VCVTTPH2IBSZ128rmkz */ |
| 110759 | VR128X, VK8WM, f128mem, |
| 110760 | /* VCVTTPH2IBSZ128rr */ |
| 110761 | VR128X, VR128X, |
| 110762 | /* VCVTTPH2IBSZ128rrk */ |
| 110763 | VR128X, VR128X, VK8WM, VR128X, |
| 110764 | /* VCVTTPH2IBSZ128rrkz */ |
| 110765 | VR128X, VK8WM, VR128X, |
| 110766 | /* VCVTTPH2IBSZ256rm */ |
| 110767 | VR256X, f256mem, |
| 110768 | /* VCVTTPH2IBSZ256rmb */ |
| 110769 | VR256X, f16mem, |
| 110770 | /* VCVTTPH2IBSZ256rmbk */ |
| 110771 | VR256X, VR256X, VK16WM, f16mem, |
| 110772 | /* VCVTTPH2IBSZ256rmbkz */ |
| 110773 | VR256X, VK16WM, f16mem, |
| 110774 | /* VCVTTPH2IBSZ256rmk */ |
| 110775 | VR256X, VR256X, VK16WM, f256mem, |
| 110776 | /* VCVTTPH2IBSZ256rmkz */ |
| 110777 | VR256X, VK16WM, f256mem, |
| 110778 | /* VCVTTPH2IBSZ256rr */ |
| 110779 | VR256X, VR256X, |
| 110780 | /* VCVTTPH2IBSZ256rrk */ |
| 110781 | VR256X, VR256X, VK16WM, VR256X, |
| 110782 | /* VCVTTPH2IBSZ256rrkz */ |
| 110783 | VR256X, VK16WM, VR256X, |
| 110784 | /* VCVTTPH2IBSZrm */ |
| 110785 | VR512, f512mem, |
| 110786 | /* VCVTTPH2IBSZrmb */ |
| 110787 | VR512, f16mem, |
| 110788 | /* VCVTTPH2IBSZrmbk */ |
| 110789 | VR512, VR512, VK32WM, f16mem, |
| 110790 | /* VCVTTPH2IBSZrmbkz */ |
| 110791 | VR512, VK32WM, f16mem, |
| 110792 | /* VCVTTPH2IBSZrmk */ |
| 110793 | VR512, VR512, VK32WM, f512mem, |
| 110794 | /* VCVTTPH2IBSZrmkz */ |
| 110795 | VR512, VK32WM, f512mem, |
| 110796 | /* VCVTTPH2IBSZrr */ |
| 110797 | VR512, VR512, |
| 110798 | /* VCVTTPH2IBSZrrb */ |
| 110799 | VR512, VR512, |
| 110800 | /* VCVTTPH2IBSZrrbk */ |
| 110801 | VR512, VR512, VK32WM, VR512, |
| 110802 | /* VCVTTPH2IBSZrrbkz */ |
| 110803 | VR512, VK32WM, VR512, |
| 110804 | /* VCVTTPH2IBSZrrk */ |
| 110805 | VR512, VR512, VK32WM, VR512, |
| 110806 | /* VCVTTPH2IBSZrrkz */ |
| 110807 | VR512, VK32WM, VR512, |
| 110808 | /* VCVTTPH2IUBSZ128rm */ |
| 110809 | VR128X, f128mem, |
| 110810 | /* VCVTTPH2IUBSZ128rmb */ |
| 110811 | VR128X, f16mem, |
| 110812 | /* VCVTTPH2IUBSZ128rmbk */ |
| 110813 | VR128X, VR128X, VK8WM, f16mem, |
| 110814 | /* VCVTTPH2IUBSZ128rmbkz */ |
| 110815 | VR128X, VK8WM, f16mem, |
| 110816 | /* VCVTTPH2IUBSZ128rmk */ |
| 110817 | VR128X, VR128X, VK8WM, f128mem, |
| 110818 | /* VCVTTPH2IUBSZ128rmkz */ |
| 110819 | VR128X, VK8WM, f128mem, |
| 110820 | /* VCVTTPH2IUBSZ128rr */ |
| 110821 | VR128X, VR128X, |
| 110822 | /* VCVTTPH2IUBSZ128rrk */ |
| 110823 | VR128X, VR128X, VK8WM, VR128X, |
| 110824 | /* VCVTTPH2IUBSZ128rrkz */ |
| 110825 | VR128X, VK8WM, VR128X, |
| 110826 | /* VCVTTPH2IUBSZ256rm */ |
| 110827 | VR256X, f256mem, |
| 110828 | /* VCVTTPH2IUBSZ256rmb */ |
| 110829 | VR256X, f16mem, |
| 110830 | /* VCVTTPH2IUBSZ256rmbk */ |
| 110831 | VR256X, VR256X, VK16WM, f16mem, |
| 110832 | /* VCVTTPH2IUBSZ256rmbkz */ |
| 110833 | VR256X, VK16WM, f16mem, |
| 110834 | /* VCVTTPH2IUBSZ256rmk */ |
| 110835 | VR256X, VR256X, VK16WM, f256mem, |
| 110836 | /* VCVTTPH2IUBSZ256rmkz */ |
| 110837 | VR256X, VK16WM, f256mem, |
| 110838 | /* VCVTTPH2IUBSZ256rr */ |
| 110839 | VR256X, VR256X, |
| 110840 | /* VCVTTPH2IUBSZ256rrk */ |
| 110841 | VR256X, VR256X, VK16WM, VR256X, |
| 110842 | /* VCVTTPH2IUBSZ256rrkz */ |
| 110843 | VR256X, VK16WM, VR256X, |
| 110844 | /* VCVTTPH2IUBSZrm */ |
| 110845 | VR512, f512mem, |
| 110846 | /* VCVTTPH2IUBSZrmb */ |
| 110847 | VR512, f16mem, |
| 110848 | /* VCVTTPH2IUBSZrmbk */ |
| 110849 | VR512, VR512, VK32WM, f16mem, |
| 110850 | /* VCVTTPH2IUBSZrmbkz */ |
| 110851 | VR512, VK32WM, f16mem, |
| 110852 | /* VCVTTPH2IUBSZrmk */ |
| 110853 | VR512, VR512, VK32WM, f512mem, |
| 110854 | /* VCVTTPH2IUBSZrmkz */ |
| 110855 | VR512, VK32WM, f512mem, |
| 110856 | /* VCVTTPH2IUBSZrr */ |
| 110857 | VR512, VR512, |
| 110858 | /* VCVTTPH2IUBSZrrb */ |
| 110859 | VR512, VR512, |
| 110860 | /* VCVTTPH2IUBSZrrbk */ |
| 110861 | VR512, VR512, VK32WM, VR512, |
| 110862 | /* VCVTTPH2IUBSZrrbkz */ |
| 110863 | VR512, VK32WM, VR512, |
| 110864 | /* VCVTTPH2IUBSZrrk */ |
| 110865 | VR512, VR512, VK32WM, VR512, |
| 110866 | /* VCVTTPH2IUBSZrrkz */ |
| 110867 | VR512, VK32WM, VR512, |
| 110868 | /* VCVTTPH2QQZ128rm */ |
| 110869 | VR128X, f32mem, |
| 110870 | /* VCVTTPH2QQZ128rmb */ |
| 110871 | VR128X, f16mem, |
| 110872 | /* VCVTTPH2QQZ128rmbk */ |
| 110873 | VR128X, VR128X, VK2WM, f16mem, |
| 110874 | /* VCVTTPH2QQZ128rmbkz */ |
| 110875 | VR128X, VK2WM, f16mem, |
| 110876 | /* VCVTTPH2QQZ128rmk */ |
| 110877 | VR128X, VR128X, VK2WM, f32mem, |
| 110878 | /* VCVTTPH2QQZ128rmkz */ |
| 110879 | VR128X, VK2WM, f32mem, |
| 110880 | /* VCVTTPH2QQZ128rr */ |
| 110881 | VR128X, VR128X, |
| 110882 | /* VCVTTPH2QQZ128rrk */ |
| 110883 | VR128X, VR128X, VK2WM, VR128X, |
| 110884 | /* VCVTTPH2QQZ128rrkz */ |
| 110885 | VR128X, VK2WM, VR128X, |
| 110886 | /* VCVTTPH2QQZ256rm */ |
| 110887 | VR256X, f64mem, |
| 110888 | /* VCVTTPH2QQZ256rmb */ |
| 110889 | VR256X, f16mem, |
| 110890 | /* VCVTTPH2QQZ256rmbk */ |
| 110891 | VR256X, VR256X, VK4WM, f16mem, |
| 110892 | /* VCVTTPH2QQZ256rmbkz */ |
| 110893 | VR256X, VK4WM, f16mem, |
| 110894 | /* VCVTTPH2QQZ256rmk */ |
| 110895 | VR256X, VR256X, VK4WM, f64mem, |
| 110896 | /* VCVTTPH2QQZ256rmkz */ |
| 110897 | VR256X, VK4WM, f64mem, |
| 110898 | /* VCVTTPH2QQZ256rr */ |
| 110899 | VR256X, VR128X, |
| 110900 | /* VCVTTPH2QQZ256rrk */ |
| 110901 | VR256X, VR256X, VK4WM, VR128X, |
| 110902 | /* VCVTTPH2QQZ256rrkz */ |
| 110903 | VR256X, VK4WM, VR128X, |
| 110904 | /* VCVTTPH2QQZrm */ |
| 110905 | VR512, f128mem, |
| 110906 | /* VCVTTPH2QQZrmb */ |
| 110907 | VR512, f16mem, |
| 110908 | /* VCVTTPH2QQZrmbk */ |
| 110909 | VR512, VR512, VK8WM, f16mem, |
| 110910 | /* VCVTTPH2QQZrmbkz */ |
| 110911 | VR512, VK8WM, f16mem, |
| 110912 | /* VCVTTPH2QQZrmk */ |
| 110913 | VR512, VR512, VK8WM, f128mem, |
| 110914 | /* VCVTTPH2QQZrmkz */ |
| 110915 | VR512, VK8WM, f128mem, |
| 110916 | /* VCVTTPH2QQZrr */ |
| 110917 | VR512, VR128X, |
| 110918 | /* VCVTTPH2QQZrrb */ |
| 110919 | VR512, VR128X, |
| 110920 | /* VCVTTPH2QQZrrbk */ |
| 110921 | VR512, VR512, VK8WM, VR128X, |
| 110922 | /* VCVTTPH2QQZrrbkz */ |
| 110923 | VR512, VK8WM, VR128X, |
| 110924 | /* VCVTTPH2QQZrrk */ |
| 110925 | VR512, VR512, VK8WM, VR128X, |
| 110926 | /* VCVTTPH2QQZrrkz */ |
| 110927 | VR512, VK8WM, VR128X, |
| 110928 | /* VCVTTPH2UDQZ128rm */ |
| 110929 | VR128X, f64mem, |
| 110930 | /* VCVTTPH2UDQZ128rmb */ |
| 110931 | VR128X, f16mem, |
| 110932 | /* VCVTTPH2UDQZ128rmbk */ |
| 110933 | VR128X, VR128X, VK4WM, f16mem, |
| 110934 | /* VCVTTPH2UDQZ128rmbkz */ |
| 110935 | VR128X, VK4WM, f16mem, |
| 110936 | /* VCVTTPH2UDQZ128rmk */ |
| 110937 | VR128X, VR128X, VK4WM, f64mem, |
| 110938 | /* VCVTTPH2UDQZ128rmkz */ |
| 110939 | VR128X, VK4WM, f64mem, |
| 110940 | /* VCVTTPH2UDQZ128rr */ |
| 110941 | VR128X, VR128X, |
| 110942 | /* VCVTTPH2UDQZ128rrk */ |
| 110943 | VR128X, VR128X, VK4WM, VR128X, |
| 110944 | /* VCVTTPH2UDQZ128rrkz */ |
| 110945 | VR128X, VK4WM, VR128X, |
| 110946 | /* VCVTTPH2UDQZ256rm */ |
| 110947 | VR256X, f128mem, |
| 110948 | /* VCVTTPH2UDQZ256rmb */ |
| 110949 | VR256X, f16mem, |
| 110950 | /* VCVTTPH2UDQZ256rmbk */ |
| 110951 | VR256X, VR256X, VK8WM, f16mem, |
| 110952 | /* VCVTTPH2UDQZ256rmbkz */ |
| 110953 | VR256X, VK8WM, f16mem, |
| 110954 | /* VCVTTPH2UDQZ256rmk */ |
| 110955 | VR256X, VR256X, VK8WM, f128mem, |
| 110956 | /* VCVTTPH2UDQZ256rmkz */ |
| 110957 | VR256X, VK8WM, f128mem, |
| 110958 | /* VCVTTPH2UDQZ256rr */ |
| 110959 | VR256X, VR128X, |
| 110960 | /* VCVTTPH2UDQZ256rrk */ |
| 110961 | VR256X, VR256X, VK8WM, VR128X, |
| 110962 | /* VCVTTPH2UDQZ256rrkz */ |
| 110963 | VR256X, VK8WM, VR128X, |
| 110964 | /* VCVTTPH2UDQZrm */ |
| 110965 | VR512, f256mem, |
| 110966 | /* VCVTTPH2UDQZrmb */ |
| 110967 | VR512, f16mem, |
| 110968 | /* VCVTTPH2UDQZrmbk */ |
| 110969 | VR512, VR512, VK16WM, f16mem, |
| 110970 | /* VCVTTPH2UDQZrmbkz */ |
| 110971 | VR512, VK16WM, f16mem, |
| 110972 | /* VCVTTPH2UDQZrmk */ |
| 110973 | VR512, VR512, VK16WM, f256mem, |
| 110974 | /* VCVTTPH2UDQZrmkz */ |
| 110975 | VR512, VK16WM, f256mem, |
| 110976 | /* VCVTTPH2UDQZrr */ |
| 110977 | VR512, VR256X, |
| 110978 | /* VCVTTPH2UDQZrrb */ |
| 110979 | VR512, VR256X, |
| 110980 | /* VCVTTPH2UDQZrrbk */ |
| 110981 | VR512, VR512, VK16WM, VR256X, |
| 110982 | /* VCVTTPH2UDQZrrbkz */ |
| 110983 | VR512, VK16WM, VR256X, |
| 110984 | /* VCVTTPH2UDQZrrk */ |
| 110985 | VR512, VR512, VK16WM, VR256X, |
| 110986 | /* VCVTTPH2UDQZrrkz */ |
| 110987 | VR512, VK16WM, VR256X, |
| 110988 | /* VCVTTPH2UQQZ128rm */ |
| 110989 | VR128X, f32mem, |
| 110990 | /* VCVTTPH2UQQZ128rmb */ |
| 110991 | VR128X, f16mem, |
| 110992 | /* VCVTTPH2UQQZ128rmbk */ |
| 110993 | VR128X, VR128X, VK2WM, f16mem, |
| 110994 | /* VCVTTPH2UQQZ128rmbkz */ |
| 110995 | VR128X, VK2WM, f16mem, |
| 110996 | /* VCVTTPH2UQQZ128rmk */ |
| 110997 | VR128X, VR128X, VK2WM, f32mem, |
| 110998 | /* VCVTTPH2UQQZ128rmkz */ |
| 110999 | VR128X, VK2WM, f32mem, |
| 111000 | /* VCVTTPH2UQQZ128rr */ |
| 111001 | VR128X, VR128X, |
| 111002 | /* VCVTTPH2UQQZ128rrk */ |
| 111003 | VR128X, VR128X, VK2WM, VR128X, |
| 111004 | /* VCVTTPH2UQQZ128rrkz */ |
| 111005 | VR128X, VK2WM, VR128X, |
| 111006 | /* VCVTTPH2UQQZ256rm */ |
| 111007 | VR256X, f64mem, |
| 111008 | /* VCVTTPH2UQQZ256rmb */ |
| 111009 | VR256X, f16mem, |
| 111010 | /* VCVTTPH2UQQZ256rmbk */ |
| 111011 | VR256X, VR256X, VK4WM, f16mem, |
| 111012 | /* VCVTTPH2UQQZ256rmbkz */ |
| 111013 | VR256X, VK4WM, f16mem, |
| 111014 | /* VCVTTPH2UQQZ256rmk */ |
| 111015 | VR256X, VR256X, VK4WM, f64mem, |
| 111016 | /* VCVTTPH2UQQZ256rmkz */ |
| 111017 | VR256X, VK4WM, f64mem, |
| 111018 | /* VCVTTPH2UQQZ256rr */ |
| 111019 | VR256X, VR128X, |
| 111020 | /* VCVTTPH2UQQZ256rrk */ |
| 111021 | VR256X, VR256X, VK4WM, VR128X, |
| 111022 | /* VCVTTPH2UQQZ256rrkz */ |
| 111023 | VR256X, VK4WM, VR128X, |
| 111024 | /* VCVTTPH2UQQZrm */ |
| 111025 | VR512, f128mem, |
| 111026 | /* VCVTTPH2UQQZrmb */ |
| 111027 | VR512, f16mem, |
| 111028 | /* VCVTTPH2UQQZrmbk */ |
| 111029 | VR512, VR512, VK8WM, f16mem, |
| 111030 | /* VCVTTPH2UQQZrmbkz */ |
| 111031 | VR512, VK8WM, f16mem, |
| 111032 | /* VCVTTPH2UQQZrmk */ |
| 111033 | VR512, VR512, VK8WM, f128mem, |
| 111034 | /* VCVTTPH2UQQZrmkz */ |
| 111035 | VR512, VK8WM, f128mem, |
| 111036 | /* VCVTTPH2UQQZrr */ |
| 111037 | VR512, VR128X, |
| 111038 | /* VCVTTPH2UQQZrrb */ |
| 111039 | VR512, VR128X, |
| 111040 | /* VCVTTPH2UQQZrrbk */ |
| 111041 | VR512, VR512, VK8WM, VR128X, |
| 111042 | /* VCVTTPH2UQQZrrbkz */ |
| 111043 | VR512, VK8WM, VR128X, |
| 111044 | /* VCVTTPH2UQQZrrk */ |
| 111045 | VR512, VR512, VK8WM, VR128X, |
| 111046 | /* VCVTTPH2UQQZrrkz */ |
| 111047 | VR512, VK8WM, VR128X, |
| 111048 | /* VCVTTPH2UWZ128rm */ |
| 111049 | VR128X, f128mem, |
| 111050 | /* VCVTTPH2UWZ128rmb */ |
| 111051 | VR128X, f16mem, |
| 111052 | /* VCVTTPH2UWZ128rmbk */ |
| 111053 | VR128X, VR128X, VK8WM, f16mem, |
| 111054 | /* VCVTTPH2UWZ128rmbkz */ |
| 111055 | VR128X, VK8WM, f16mem, |
| 111056 | /* VCVTTPH2UWZ128rmk */ |
| 111057 | VR128X, VR128X, VK8WM, f128mem, |
| 111058 | /* VCVTTPH2UWZ128rmkz */ |
| 111059 | VR128X, VK8WM, f128mem, |
| 111060 | /* VCVTTPH2UWZ128rr */ |
| 111061 | VR128X, VR128X, |
| 111062 | /* VCVTTPH2UWZ128rrk */ |
| 111063 | VR128X, VR128X, VK8WM, VR128X, |
| 111064 | /* VCVTTPH2UWZ128rrkz */ |
| 111065 | VR128X, VK8WM, VR128X, |
| 111066 | /* VCVTTPH2UWZ256rm */ |
| 111067 | VR256X, f256mem, |
| 111068 | /* VCVTTPH2UWZ256rmb */ |
| 111069 | VR256X, f16mem, |
| 111070 | /* VCVTTPH2UWZ256rmbk */ |
| 111071 | VR256X, VR256X, VK16WM, f16mem, |
| 111072 | /* VCVTTPH2UWZ256rmbkz */ |
| 111073 | VR256X, VK16WM, f16mem, |
| 111074 | /* VCVTTPH2UWZ256rmk */ |
| 111075 | VR256X, VR256X, VK16WM, f256mem, |
| 111076 | /* VCVTTPH2UWZ256rmkz */ |
| 111077 | VR256X, VK16WM, f256mem, |
| 111078 | /* VCVTTPH2UWZ256rr */ |
| 111079 | VR256X, VR256X, |
| 111080 | /* VCVTTPH2UWZ256rrk */ |
| 111081 | VR256X, VR256X, VK16WM, VR256X, |
| 111082 | /* VCVTTPH2UWZ256rrkz */ |
| 111083 | VR256X, VK16WM, VR256X, |
| 111084 | /* VCVTTPH2UWZrm */ |
| 111085 | VR512, f512mem, |
| 111086 | /* VCVTTPH2UWZrmb */ |
| 111087 | VR512, f16mem, |
| 111088 | /* VCVTTPH2UWZrmbk */ |
| 111089 | VR512, VR512, VK32WM, f16mem, |
| 111090 | /* VCVTTPH2UWZrmbkz */ |
| 111091 | VR512, VK32WM, f16mem, |
| 111092 | /* VCVTTPH2UWZrmk */ |
| 111093 | VR512, VR512, VK32WM, f512mem, |
| 111094 | /* VCVTTPH2UWZrmkz */ |
| 111095 | VR512, VK32WM, f512mem, |
| 111096 | /* VCVTTPH2UWZrr */ |
| 111097 | VR512, VR512, |
| 111098 | /* VCVTTPH2UWZrrb */ |
| 111099 | VR512, VR512, |
| 111100 | /* VCVTTPH2UWZrrbk */ |
| 111101 | VR512, VR512, VK32WM, VR512, |
| 111102 | /* VCVTTPH2UWZrrbkz */ |
| 111103 | VR512, VK32WM, VR512, |
| 111104 | /* VCVTTPH2UWZrrk */ |
| 111105 | VR512, VR512, VK32WM, VR512, |
| 111106 | /* VCVTTPH2UWZrrkz */ |
| 111107 | VR512, VK32WM, VR512, |
| 111108 | /* VCVTTPH2WZ128rm */ |
| 111109 | VR128X, f128mem, |
| 111110 | /* VCVTTPH2WZ128rmb */ |
| 111111 | VR128X, f16mem, |
| 111112 | /* VCVTTPH2WZ128rmbk */ |
| 111113 | VR128X, VR128X, VK8WM, f16mem, |
| 111114 | /* VCVTTPH2WZ128rmbkz */ |
| 111115 | VR128X, VK8WM, f16mem, |
| 111116 | /* VCVTTPH2WZ128rmk */ |
| 111117 | VR128X, VR128X, VK8WM, f128mem, |
| 111118 | /* VCVTTPH2WZ128rmkz */ |
| 111119 | VR128X, VK8WM, f128mem, |
| 111120 | /* VCVTTPH2WZ128rr */ |
| 111121 | VR128X, VR128X, |
| 111122 | /* VCVTTPH2WZ128rrk */ |
| 111123 | VR128X, VR128X, VK8WM, VR128X, |
| 111124 | /* VCVTTPH2WZ128rrkz */ |
| 111125 | VR128X, VK8WM, VR128X, |
| 111126 | /* VCVTTPH2WZ256rm */ |
| 111127 | VR256X, f256mem, |
| 111128 | /* VCVTTPH2WZ256rmb */ |
| 111129 | VR256X, f16mem, |
| 111130 | /* VCVTTPH2WZ256rmbk */ |
| 111131 | VR256X, VR256X, VK16WM, f16mem, |
| 111132 | /* VCVTTPH2WZ256rmbkz */ |
| 111133 | VR256X, VK16WM, f16mem, |
| 111134 | /* VCVTTPH2WZ256rmk */ |
| 111135 | VR256X, VR256X, VK16WM, f256mem, |
| 111136 | /* VCVTTPH2WZ256rmkz */ |
| 111137 | VR256X, VK16WM, f256mem, |
| 111138 | /* VCVTTPH2WZ256rr */ |
| 111139 | VR256X, VR256X, |
| 111140 | /* VCVTTPH2WZ256rrk */ |
| 111141 | VR256X, VR256X, VK16WM, VR256X, |
| 111142 | /* VCVTTPH2WZ256rrkz */ |
| 111143 | VR256X, VK16WM, VR256X, |
| 111144 | /* VCVTTPH2WZrm */ |
| 111145 | VR512, f512mem, |
| 111146 | /* VCVTTPH2WZrmb */ |
| 111147 | VR512, f16mem, |
| 111148 | /* VCVTTPH2WZrmbk */ |
| 111149 | VR512, VR512, VK32WM, f16mem, |
| 111150 | /* VCVTTPH2WZrmbkz */ |
| 111151 | VR512, VK32WM, f16mem, |
| 111152 | /* VCVTTPH2WZrmk */ |
| 111153 | VR512, VR512, VK32WM, f512mem, |
| 111154 | /* VCVTTPH2WZrmkz */ |
| 111155 | VR512, VK32WM, f512mem, |
| 111156 | /* VCVTTPH2WZrr */ |
| 111157 | VR512, VR512, |
| 111158 | /* VCVTTPH2WZrrb */ |
| 111159 | VR512, VR512, |
| 111160 | /* VCVTTPH2WZrrbk */ |
| 111161 | VR512, VR512, VK32WM, VR512, |
| 111162 | /* VCVTTPH2WZrrbkz */ |
| 111163 | VR512, VK32WM, VR512, |
| 111164 | /* VCVTTPH2WZrrk */ |
| 111165 | VR512, VR512, VK32WM, VR512, |
| 111166 | /* VCVTTPH2WZrrkz */ |
| 111167 | VR512, VK32WM, VR512, |
| 111168 | /* VCVTTPS2DQSZ128rm */ |
| 111169 | VR128X, f128mem, |
| 111170 | /* VCVTTPS2DQSZ128rmb */ |
| 111171 | VR128X, f32mem, |
| 111172 | /* VCVTTPS2DQSZ128rmbk */ |
| 111173 | VR128X, VR128X, VK4WM, f32mem, |
| 111174 | /* VCVTTPS2DQSZ128rmbkz */ |
| 111175 | VR128X, VK4WM, f32mem, |
| 111176 | /* VCVTTPS2DQSZ128rmk */ |
| 111177 | VR128X, VR128X, VK4WM, f128mem, |
| 111178 | /* VCVTTPS2DQSZ128rmkz */ |
| 111179 | VR128X, VK4WM, f128mem, |
| 111180 | /* VCVTTPS2DQSZ128rr */ |
| 111181 | VR128X, VR128X, |
| 111182 | /* VCVTTPS2DQSZ128rrk */ |
| 111183 | VR128X, VR128X, VK4WM, VR128X, |
| 111184 | /* VCVTTPS2DQSZ128rrkz */ |
| 111185 | VR128X, VK4WM, VR128X, |
| 111186 | /* VCVTTPS2DQSZ256rm */ |
| 111187 | VR256X, f256mem, |
| 111188 | /* VCVTTPS2DQSZ256rmb */ |
| 111189 | VR256X, f32mem, |
| 111190 | /* VCVTTPS2DQSZ256rmbk */ |
| 111191 | VR256X, VR256X, VK8WM, f32mem, |
| 111192 | /* VCVTTPS2DQSZ256rmbkz */ |
| 111193 | VR256X, VK8WM, f32mem, |
| 111194 | /* VCVTTPS2DQSZ256rmk */ |
| 111195 | VR256X, VR256X, VK8WM, f256mem, |
| 111196 | /* VCVTTPS2DQSZ256rmkz */ |
| 111197 | VR256X, VK8WM, f256mem, |
| 111198 | /* VCVTTPS2DQSZ256rr */ |
| 111199 | VR256X, VR256X, |
| 111200 | /* VCVTTPS2DQSZ256rrk */ |
| 111201 | VR256X, VR256X, VK8WM, VR256X, |
| 111202 | /* VCVTTPS2DQSZ256rrkz */ |
| 111203 | VR256X, VK8WM, VR256X, |
| 111204 | /* VCVTTPS2DQSZrm */ |
| 111205 | VR512, f512mem, |
| 111206 | /* VCVTTPS2DQSZrmb */ |
| 111207 | VR512, f32mem, |
| 111208 | /* VCVTTPS2DQSZrmbk */ |
| 111209 | VR512, VR512, VK16WM, f32mem, |
| 111210 | /* VCVTTPS2DQSZrmbkz */ |
| 111211 | VR512, VK16WM, f32mem, |
| 111212 | /* VCVTTPS2DQSZrmk */ |
| 111213 | VR512, VR512, VK16WM, f512mem, |
| 111214 | /* VCVTTPS2DQSZrmkz */ |
| 111215 | VR512, VK16WM, f512mem, |
| 111216 | /* VCVTTPS2DQSZrr */ |
| 111217 | VR512, VR512, |
| 111218 | /* VCVTTPS2DQSZrrb */ |
| 111219 | VR512, VR512, |
| 111220 | /* VCVTTPS2DQSZrrbk */ |
| 111221 | VR512, VR512, VK16WM, VR512, |
| 111222 | /* VCVTTPS2DQSZrrbkz */ |
| 111223 | VR512, VK16WM, VR512, |
| 111224 | /* VCVTTPS2DQSZrrk */ |
| 111225 | VR512, VR512, VK16WM, VR512, |
| 111226 | /* VCVTTPS2DQSZrrkz */ |
| 111227 | VR512, VK16WM, VR512, |
| 111228 | /* VCVTTPS2DQYrm */ |
| 111229 | VR256, f256mem, |
| 111230 | /* VCVTTPS2DQYrr */ |
| 111231 | VR256, VR256, |
| 111232 | /* VCVTTPS2DQZ128rm */ |
| 111233 | VR128X, f128mem, |
| 111234 | /* VCVTTPS2DQZ128rmb */ |
| 111235 | VR128X, f32mem, |
| 111236 | /* VCVTTPS2DQZ128rmbk */ |
| 111237 | VR128X, VR128X, VK4WM, f32mem, |
| 111238 | /* VCVTTPS2DQZ128rmbkz */ |
| 111239 | VR128X, VK4WM, f32mem, |
| 111240 | /* VCVTTPS2DQZ128rmk */ |
| 111241 | VR128X, VR128X, VK4WM, f128mem, |
| 111242 | /* VCVTTPS2DQZ128rmkz */ |
| 111243 | VR128X, VK4WM, f128mem, |
| 111244 | /* VCVTTPS2DQZ128rr */ |
| 111245 | VR128X, VR128X, |
| 111246 | /* VCVTTPS2DQZ128rrk */ |
| 111247 | VR128X, VR128X, VK4WM, VR128X, |
| 111248 | /* VCVTTPS2DQZ128rrkz */ |
| 111249 | VR128X, VK4WM, VR128X, |
| 111250 | /* VCVTTPS2DQZ256rm */ |
| 111251 | VR256X, f256mem, |
| 111252 | /* VCVTTPS2DQZ256rmb */ |
| 111253 | VR256X, f32mem, |
| 111254 | /* VCVTTPS2DQZ256rmbk */ |
| 111255 | VR256X, VR256X, VK8WM, f32mem, |
| 111256 | /* VCVTTPS2DQZ256rmbkz */ |
| 111257 | VR256X, VK8WM, f32mem, |
| 111258 | /* VCVTTPS2DQZ256rmk */ |
| 111259 | VR256X, VR256X, VK8WM, f256mem, |
| 111260 | /* VCVTTPS2DQZ256rmkz */ |
| 111261 | VR256X, VK8WM, f256mem, |
| 111262 | /* VCVTTPS2DQZ256rr */ |
| 111263 | VR256X, VR256X, |
| 111264 | /* VCVTTPS2DQZ256rrk */ |
| 111265 | VR256X, VR256X, VK8WM, VR256X, |
| 111266 | /* VCVTTPS2DQZ256rrkz */ |
| 111267 | VR256X, VK8WM, VR256X, |
| 111268 | /* VCVTTPS2DQZrm */ |
| 111269 | VR512, f512mem, |
| 111270 | /* VCVTTPS2DQZrmb */ |
| 111271 | VR512, f32mem, |
| 111272 | /* VCVTTPS2DQZrmbk */ |
| 111273 | VR512, VR512, VK16WM, f32mem, |
| 111274 | /* VCVTTPS2DQZrmbkz */ |
| 111275 | VR512, VK16WM, f32mem, |
| 111276 | /* VCVTTPS2DQZrmk */ |
| 111277 | VR512, VR512, VK16WM, f512mem, |
| 111278 | /* VCVTTPS2DQZrmkz */ |
| 111279 | VR512, VK16WM, f512mem, |
| 111280 | /* VCVTTPS2DQZrr */ |
| 111281 | VR512, VR512, |
| 111282 | /* VCVTTPS2DQZrrb */ |
| 111283 | VR512, VR512, |
| 111284 | /* VCVTTPS2DQZrrbk */ |
| 111285 | VR512, VR512, VK16WM, VR512, |
| 111286 | /* VCVTTPS2DQZrrbkz */ |
| 111287 | VR512, VK16WM, VR512, |
| 111288 | /* VCVTTPS2DQZrrk */ |
| 111289 | VR512, VR512, VK16WM, VR512, |
| 111290 | /* VCVTTPS2DQZrrkz */ |
| 111291 | VR512, VK16WM, VR512, |
| 111292 | /* VCVTTPS2DQrm */ |
| 111293 | VR128, f128mem, |
| 111294 | /* VCVTTPS2DQrr */ |
| 111295 | VR128, VR128, |
| 111296 | /* VCVTTPS2IBSZ128rm */ |
| 111297 | VR128X, f128mem, |
| 111298 | /* VCVTTPS2IBSZ128rmb */ |
| 111299 | VR128X, f32mem, |
| 111300 | /* VCVTTPS2IBSZ128rmbk */ |
| 111301 | VR128X, VR128X, VK4WM, f32mem, |
| 111302 | /* VCVTTPS2IBSZ128rmbkz */ |
| 111303 | VR128X, VK4WM, f32mem, |
| 111304 | /* VCVTTPS2IBSZ128rmk */ |
| 111305 | VR128X, VR128X, VK4WM, f128mem, |
| 111306 | /* VCVTTPS2IBSZ128rmkz */ |
| 111307 | VR128X, VK4WM, f128mem, |
| 111308 | /* VCVTTPS2IBSZ128rr */ |
| 111309 | VR128X, VR128X, |
| 111310 | /* VCVTTPS2IBSZ128rrk */ |
| 111311 | VR128X, VR128X, VK4WM, VR128X, |
| 111312 | /* VCVTTPS2IBSZ128rrkz */ |
| 111313 | VR128X, VK4WM, VR128X, |
| 111314 | /* VCVTTPS2IBSZ256rm */ |
| 111315 | VR256X, f256mem, |
| 111316 | /* VCVTTPS2IBSZ256rmb */ |
| 111317 | VR256X, f32mem, |
| 111318 | /* VCVTTPS2IBSZ256rmbk */ |
| 111319 | VR256X, VR256X, VK8WM, f32mem, |
| 111320 | /* VCVTTPS2IBSZ256rmbkz */ |
| 111321 | VR256X, VK8WM, f32mem, |
| 111322 | /* VCVTTPS2IBSZ256rmk */ |
| 111323 | VR256X, VR256X, VK8WM, f256mem, |
| 111324 | /* VCVTTPS2IBSZ256rmkz */ |
| 111325 | VR256X, VK8WM, f256mem, |
| 111326 | /* VCVTTPS2IBSZ256rr */ |
| 111327 | VR256X, VR256X, |
| 111328 | /* VCVTTPS2IBSZ256rrk */ |
| 111329 | VR256X, VR256X, VK8WM, VR256X, |
| 111330 | /* VCVTTPS2IBSZ256rrkz */ |
| 111331 | VR256X, VK8WM, VR256X, |
| 111332 | /* VCVTTPS2IBSZrm */ |
| 111333 | VR512, f512mem, |
| 111334 | /* VCVTTPS2IBSZrmb */ |
| 111335 | VR512, f32mem, |
| 111336 | /* VCVTTPS2IBSZrmbk */ |
| 111337 | VR512, VR512, VK16WM, f32mem, |
| 111338 | /* VCVTTPS2IBSZrmbkz */ |
| 111339 | VR512, VK16WM, f32mem, |
| 111340 | /* VCVTTPS2IBSZrmk */ |
| 111341 | VR512, VR512, VK16WM, f512mem, |
| 111342 | /* VCVTTPS2IBSZrmkz */ |
| 111343 | VR512, VK16WM, f512mem, |
| 111344 | /* VCVTTPS2IBSZrr */ |
| 111345 | VR512, VR512, |
| 111346 | /* VCVTTPS2IBSZrrb */ |
| 111347 | VR512, VR512, |
| 111348 | /* VCVTTPS2IBSZrrbk */ |
| 111349 | VR512, VR512, VK16WM, VR512, |
| 111350 | /* VCVTTPS2IBSZrrbkz */ |
| 111351 | VR512, VK16WM, VR512, |
| 111352 | /* VCVTTPS2IBSZrrk */ |
| 111353 | VR512, VR512, VK16WM, VR512, |
| 111354 | /* VCVTTPS2IBSZrrkz */ |
| 111355 | VR512, VK16WM, VR512, |
| 111356 | /* VCVTTPS2IUBSZ128rm */ |
| 111357 | VR128X, f128mem, |
| 111358 | /* VCVTTPS2IUBSZ128rmb */ |
| 111359 | VR128X, f32mem, |
| 111360 | /* VCVTTPS2IUBSZ128rmbk */ |
| 111361 | VR128X, VR128X, VK4WM, f32mem, |
| 111362 | /* VCVTTPS2IUBSZ128rmbkz */ |
| 111363 | VR128X, VK4WM, f32mem, |
| 111364 | /* VCVTTPS2IUBSZ128rmk */ |
| 111365 | VR128X, VR128X, VK4WM, f128mem, |
| 111366 | /* VCVTTPS2IUBSZ128rmkz */ |
| 111367 | VR128X, VK4WM, f128mem, |
| 111368 | /* VCVTTPS2IUBSZ128rr */ |
| 111369 | VR128X, VR128X, |
| 111370 | /* VCVTTPS2IUBSZ128rrk */ |
| 111371 | VR128X, VR128X, VK4WM, VR128X, |
| 111372 | /* VCVTTPS2IUBSZ128rrkz */ |
| 111373 | VR128X, VK4WM, VR128X, |
| 111374 | /* VCVTTPS2IUBSZ256rm */ |
| 111375 | VR256X, f256mem, |
| 111376 | /* VCVTTPS2IUBSZ256rmb */ |
| 111377 | VR256X, f32mem, |
| 111378 | /* VCVTTPS2IUBSZ256rmbk */ |
| 111379 | VR256X, VR256X, VK8WM, f32mem, |
| 111380 | /* VCVTTPS2IUBSZ256rmbkz */ |
| 111381 | VR256X, VK8WM, f32mem, |
| 111382 | /* VCVTTPS2IUBSZ256rmk */ |
| 111383 | VR256X, VR256X, VK8WM, f256mem, |
| 111384 | /* VCVTTPS2IUBSZ256rmkz */ |
| 111385 | VR256X, VK8WM, f256mem, |
| 111386 | /* VCVTTPS2IUBSZ256rr */ |
| 111387 | VR256X, VR256X, |
| 111388 | /* VCVTTPS2IUBSZ256rrk */ |
| 111389 | VR256X, VR256X, VK8WM, VR256X, |
| 111390 | /* VCVTTPS2IUBSZ256rrkz */ |
| 111391 | VR256X, VK8WM, VR256X, |
| 111392 | /* VCVTTPS2IUBSZrm */ |
| 111393 | VR512, f512mem, |
| 111394 | /* VCVTTPS2IUBSZrmb */ |
| 111395 | VR512, f32mem, |
| 111396 | /* VCVTTPS2IUBSZrmbk */ |
| 111397 | VR512, VR512, VK16WM, f32mem, |
| 111398 | /* VCVTTPS2IUBSZrmbkz */ |
| 111399 | VR512, VK16WM, f32mem, |
| 111400 | /* VCVTTPS2IUBSZrmk */ |
| 111401 | VR512, VR512, VK16WM, f512mem, |
| 111402 | /* VCVTTPS2IUBSZrmkz */ |
| 111403 | VR512, VK16WM, f512mem, |
| 111404 | /* VCVTTPS2IUBSZrr */ |
| 111405 | VR512, VR512, |
| 111406 | /* VCVTTPS2IUBSZrrb */ |
| 111407 | VR512, VR512, |
| 111408 | /* VCVTTPS2IUBSZrrbk */ |
| 111409 | VR512, VR512, VK16WM, VR512, |
| 111410 | /* VCVTTPS2IUBSZrrbkz */ |
| 111411 | VR512, VK16WM, VR512, |
| 111412 | /* VCVTTPS2IUBSZrrk */ |
| 111413 | VR512, VR512, VK16WM, VR512, |
| 111414 | /* VCVTTPS2IUBSZrrkz */ |
| 111415 | VR512, VK16WM, VR512, |
| 111416 | /* VCVTTPS2QQSZ128rm */ |
| 111417 | VR128X, f64mem, |
| 111418 | /* VCVTTPS2QQSZ128rmb */ |
| 111419 | VR128X, f32mem, |
| 111420 | /* VCVTTPS2QQSZ128rmbk */ |
| 111421 | VR128X, VR128X, VK2WM, f32mem, |
| 111422 | /* VCVTTPS2QQSZ128rmbkz */ |
| 111423 | VR128X, VK2WM, f32mem, |
| 111424 | /* VCVTTPS2QQSZ128rmk */ |
| 111425 | VR128X, VR128X, VK2WM, f64mem, |
| 111426 | /* VCVTTPS2QQSZ128rmkz */ |
| 111427 | VR128X, VK2WM, f64mem, |
| 111428 | /* VCVTTPS2QQSZ128rr */ |
| 111429 | VR128X, VR128X, |
| 111430 | /* VCVTTPS2QQSZ128rrk */ |
| 111431 | VR128X, VR128X, VK2WM, VR128X, |
| 111432 | /* VCVTTPS2QQSZ128rrkz */ |
| 111433 | VR128X, VK2WM, VR128X, |
| 111434 | /* VCVTTPS2QQSZ256rm */ |
| 111435 | VR256X, f128mem, |
| 111436 | /* VCVTTPS2QQSZ256rmb */ |
| 111437 | VR256X, f32mem, |
| 111438 | /* VCVTTPS2QQSZ256rmbk */ |
| 111439 | VR256X, VR256X, VK4WM, f32mem, |
| 111440 | /* VCVTTPS2QQSZ256rmbkz */ |
| 111441 | VR256X, VK4WM, f32mem, |
| 111442 | /* VCVTTPS2QQSZ256rmk */ |
| 111443 | VR256X, VR256X, VK4WM, f128mem, |
| 111444 | /* VCVTTPS2QQSZ256rmkz */ |
| 111445 | VR256X, VK4WM, f128mem, |
| 111446 | /* VCVTTPS2QQSZ256rr */ |
| 111447 | VR256X, VR128X, |
| 111448 | /* VCVTTPS2QQSZ256rrb */ |
| 111449 | VR256X, VR128X, |
| 111450 | /* VCVTTPS2QQSZ256rrbk */ |
| 111451 | VR256X, VR256X, VK4WM, VR128X, |
| 111452 | /* VCVTTPS2QQSZ256rrbkz */ |
| 111453 | VR256X, VK4WM, VR128X, |
| 111454 | /* VCVTTPS2QQSZ256rrk */ |
| 111455 | VR256X, VR256X, VK4WM, VR128X, |
| 111456 | /* VCVTTPS2QQSZ256rrkz */ |
| 111457 | VR256X, VK4WM, VR128X, |
| 111458 | /* VCVTTPS2QQSZrm */ |
| 111459 | VR512, f256mem, |
| 111460 | /* VCVTTPS2QQSZrmb */ |
| 111461 | VR512, f32mem, |
| 111462 | /* VCVTTPS2QQSZrmbk */ |
| 111463 | VR512, VR512, VK8WM, f32mem, |
| 111464 | /* VCVTTPS2QQSZrmbkz */ |
| 111465 | VR512, VK8WM, f32mem, |
| 111466 | /* VCVTTPS2QQSZrmk */ |
| 111467 | VR512, VR512, VK8WM, f256mem, |
| 111468 | /* VCVTTPS2QQSZrmkz */ |
| 111469 | VR512, VK8WM, f256mem, |
| 111470 | /* VCVTTPS2QQSZrr */ |
| 111471 | VR512, VR256X, |
| 111472 | /* VCVTTPS2QQSZrrb */ |
| 111473 | VR512, VR256X, |
| 111474 | /* VCVTTPS2QQSZrrbk */ |
| 111475 | VR512, VR512, VK8WM, VR256X, |
| 111476 | /* VCVTTPS2QQSZrrbkz */ |
| 111477 | VR512, VK8WM, VR256X, |
| 111478 | /* VCVTTPS2QQSZrrk */ |
| 111479 | VR512, VR512, VK8WM, VR256X, |
| 111480 | /* VCVTTPS2QQSZrrkz */ |
| 111481 | VR512, VK8WM, VR256X, |
| 111482 | /* VCVTTPS2QQZ128rm */ |
| 111483 | VR128X, f64mem, |
| 111484 | /* VCVTTPS2QQZ128rmb */ |
| 111485 | VR128X, f32mem, |
| 111486 | /* VCVTTPS2QQZ128rmbk */ |
| 111487 | VR128X, VR128X, VK2WM, f32mem, |
| 111488 | /* VCVTTPS2QQZ128rmbkz */ |
| 111489 | VR128X, VK2WM, f32mem, |
| 111490 | /* VCVTTPS2QQZ128rmk */ |
| 111491 | VR128X, VR128X, VK2WM, f64mem, |
| 111492 | /* VCVTTPS2QQZ128rmkz */ |
| 111493 | VR128X, VK2WM, f64mem, |
| 111494 | /* VCVTTPS2QQZ128rr */ |
| 111495 | VR128X, VR128X, |
| 111496 | /* VCVTTPS2QQZ128rrk */ |
| 111497 | VR128X, VR128X, VK2WM, VR128X, |
| 111498 | /* VCVTTPS2QQZ128rrkz */ |
| 111499 | VR128X, VK2WM, VR128X, |
| 111500 | /* VCVTTPS2QQZ256rm */ |
| 111501 | VR256X, f128mem, |
| 111502 | /* VCVTTPS2QQZ256rmb */ |
| 111503 | VR256X, f32mem, |
| 111504 | /* VCVTTPS2QQZ256rmbk */ |
| 111505 | VR256X, VR256X, VK4WM, f32mem, |
| 111506 | /* VCVTTPS2QQZ256rmbkz */ |
| 111507 | VR256X, VK4WM, f32mem, |
| 111508 | /* VCVTTPS2QQZ256rmk */ |
| 111509 | VR256X, VR256X, VK4WM, f128mem, |
| 111510 | /* VCVTTPS2QQZ256rmkz */ |
| 111511 | VR256X, VK4WM, f128mem, |
| 111512 | /* VCVTTPS2QQZ256rr */ |
| 111513 | VR256X, VR128X, |
| 111514 | /* VCVTTPS2QQZ256rrk */ |
| 111515 | VR256X, VR256X, VK4WM, VR128X, |
| 111516 | /* VCVTTPS2QQZ256rrkz */ |
| 111517 | VR256X, VK4WM, VR128X, |
| 111518 | /* VCVTTPS2QQZrm */ |
| 111519 | VR512, f256mem, |
| 111520 | /* VCVTTPS2QQZrmb */ |
| 111521 | VR512, f32mem, |
| 111522 | /* VCVTTPS2QQZrmbk */ |
| 111523 | VR512, VR512, VK8WM, f32mem, |
| 111524 | /* VCVTTPS2QQZrmbkz */ |
| 111525 | VR512, VK8WM, f32mem, |
| 111526 | /* VCVTTPS2QQZrmk */ |
| 111527 | VR512, VR512, VK8WM, f256mem, |
| 111528 | /* VCVTTPS2QQZrmkz */ |
| 111529 | VR512, VK8WM, f256mem, |
| 111530 | /* VCVTTPS2QQZrr */ |
| 111531 | VR512, VR256X, |
| 111532 | /* VCVTTPS2QQZrrb */ |
| 111533 | VR512, VR256X, |
| 111534 | /* VCVTTPS2QQZrrbk */ |
| 111535 | VR512, VR512, VK8WM, VR256X, |
| 111536 | /* VCVTTPS2QQZrrbkz */ |
| 111537 | VR512, VK8WM, VR256X, |
| 111538 | /* VCVTTPS2QQZrrk */ |
| 111539 | VR512, VR512, VK8WM, VR256X, |
| 111540 | /* VCVTTPS2QQZrrkz */ |
| 111541 | VR512, VK8WM, VR256X, |
| 111542 | /* VCVTTPS2UDQSZ128rm */ |
| 111543 | VR128X, f128mem, |
| 111544 | /* VCVTTPS2UDQSZ128rmb */ |
| 111545 | VR128X, f32mem, |
| 111546 | /* VCVTTPS2UDQSZ128rmbk */ |
| 111547 | VR128X, VR128X, VK4WM, f32mem, |
| 111548 | /* VCVTTPS2UDQSZ128rmbkz */ |
| 111549 | VR128X, VK4WM, f32mem, |
| 111550 | /* VCVTTPS2UDQSZ128rmk */ |
| 111551 | VR128X, VR128X, VK4WM, f128mem, |
| 111552 | /* VCVTTPS2UDQSZ128rmkz */ |
| 111553 | VR128X, VK4WM, f128mem, |
| 111554 | /* VCVTTPS2UDQSZ128rr */ |
| 111555 | VR128X, VR128X, |
| 111556 | /* VCVTTPS2UDQSZ128rrk */ |
| 111557 | VR128X, VR128X, VK4WM, VR128X, |
| 111558 | /* VCVTTPS2UDQSZ128rrkz */ |
| 111559 | VR128X, VK4WM, VR128X, |
| 111560 | /* VCVTTPS2UDQSZ256rm */ |
| 111561 | VR256X, f256mem, |
| 111562 | /* VCVTTPS2UDQSZ256rmb */ |
| 111563 | VR256X, f32mem, |
| 111564 | /* VCVTTPS2UDQSZ256rmbk */ |
| 111565 | VR256X, VR256X, VK8WM, f32mem, |
| 111566 | /* VCVTTPS2UDQSZ256rmbkz */ |
| 111567 | VR256X, VK8WM, f32mem, |
| 111568 | /* VCVTTPS2UDQSZ256rmk */ |
| 111569 | VR256X, VR256X, VK8WM, f256mem, |
| 111570 | /* VCVTTPS2UDQSZ256rmkz */ |
| 111571 | VR256X, VK8WM, f256mem, |
| 111572 | /* VCVTTPS2UDQSZ256rr */ |
| 111573 | VR256X, VR256X, |
| 111574 | /* VCVTTPS2UDQSZ256rrk */ |
| 111575 | VR256X, VR256X, VK8WM, VR256X, |
| 111576 | /* VCVTTPS2UDQSZ256rrkz */ |
| 111577 | VR256X, VK8WM, VR256X, |
| 111578 | /* VCVTTPS2UDQSZrm */ |
| 111579 | VR512, f512mem, |
| 111580 | /* VCVTTPS2UDQSZrmb */ |
| 111581 | VR512, f32mem, |
| 111582 | /* VCVTTPS2UDQSZrmbk */ |
| 111583 | VR512, VR512, VK16WM, f32mem, |
| 111584 | /* VCVTTPS2UDQSZrmbkz */ |
| 111585 | VR512, VK16WM, f32mem, |
| 111586 | /* VCVTTPS2UDQSZrmk */ |
| 111587 | VR512, VR512, VK16WM, f512mem, |
| 111588 | /* VCVTTPS2UDQSZrmkz */ |
| 111589 | VR512, VK16WM, f512mem, |
| 111590 | /* VCVTTPS2UDQSZrr */ |
| 111591 | VR512, VR512, |
| 111592 | /* VCVTTPS2UDQSZrrb */ |
| 111593 | VR512, VR512, |
| 111594 | /* VCVTTPS2UDQSZrrbk */ |
| 111595 | VR512, VR512, VK16WM, VR512, |
| 111596 | /* VCVTTPS2UDQSZrrbkz */ |
| 111597 | VR512, VK16WM, VR512, |
| 111598 | /* VCVTTPS2UDQSZrrk */ |
| 111599 | VR512, VR512, VK16WM, VR512, |
| 111600 | /* VCVTTPS2UDQSZrrkz */ |
| 111601 | VR512, VK16WM, VR512, |
| 111602 | /* VCVTTPS2UDQZ128rm */ |
| 111603 | VR128X, f128mem, |
| 111604 | /* VCVTTPS2UDQZ128rmb */ |
| 111605 | VR128X, f32mem, |
| 111606 | /* VCVTTPS2UDQZ128rmbk */ |
| 111607 | VR128X, VR128X, VK4WM, f32mem, |
| 111608 | /* VCVTTPS2UDQZ128rmbkz */ |
| 111609 | VR128X, VK4WM, f32mem, |
| 111610 | /* VCVTTPS2UDQZ128rmk */ |
| 111611 | VR128X, VR128X, VK4WM, f128mem, |
| 111612 | /* VCVTTPS2UDQZ128rmkz */ |
| 111613 | VR128X, VK4WM, f128mem, |
| 111614 | /* VCVTTPS2UDQZ128rr */ |
| 111615 | VR128X, VR128X, |
| 111616 | /* VCVTTPS2UDQZ128rrk */ |
| 111617 | VR128X, VR128X, VK4WM, VR128X, |
| 111618 | /* VCVTTPS2UDQZ128rrkz */ |
| 111619 | VR128X, VK4WM, VR128X, |
| 111620 | /* VCVTTPS2UDQZ256rm */ |
| 111621 | VR256X, f256mem, |
| 111622 | /* VCVTTPS2UDQZ256rmb */ |
| 111623 | VR256X, f32mem, |
| 111624 | /* VCVTTPS2UDQZ256rmbk */ |
| 111625 | VR256X, VR256X, VK8WM, f32mem, |
| 111626 | /* VCVTTPS2UDQZ256rmbkz */ |
| 111627 | VR256X, VK8WM, f32mem, |
| 111628 | /* VCVTTPS2UDQZ256rmk */ |
| 111629 | VR256X, VR256X, VK8WM, f256mem, |
| 111630 | /* VCVTTPS2UDQZ256rmkz */ |
| 111631 | VR256X, VK8WM, f256mem, |
| 111632 | /* VCVTTPS2UDQZ256rr */ |
| 111633 | VR256X, VR256X, |
| 111634 | /* VCVTTPS2UDQZ256rrk */ |
| 111635 | VR256X, VR256X, VK8WM, VR256X, |
| 111636 | /* VCVTTPS2UDQZ256rrkz */ |
| 111637 | VR256X, VK8WM, VR256X, |
| 111638 | /* VCVTTPS2UDQZrm */ |
| 111639 | VR512, f512mem, |
| 111640 | /* VCVTTPS2UDQZrmb */ |
| 111641 | VR512, f32mem, |
| 111642 | /* VCVTTPS2UDQZrmbk */ |
| 111643 | VR512, VR512, VK16WM, f32mem, |
| 111644 | /* VCVTTPS2UDQZrmbkz */ |
| 111645 | VR512, VK16WM, f32mem, |
| 111646 | /* VCVTTPS2UDQZrmk */ |
| 111647 | VR512, VR512, VK16WM, f512mem, |
| 111648 | /* VCVTTPS2UDQZrmkz */ |
| 111649 | VR512, VK16WM, f512mem, |
| 111650 | /* VCVTTPS2UDQZrr */ |
| 111651 | VR512, VR512, |
| 111652 | /* VCVTTPS2UDQZrrb */ |
| 111653 | VR512, VR512, |
| 111654 | /* VCVTTPS2UDQZrrbk */ |
| 111655 | VR512, VR512, VK16WM, VR512, |
| 111656 | /* VCVTTPS2UDQZrrbkz */ |
| 111657 | VR512, VK16WM, VR512, |
| 111658 | /* VCVTTPS2UDQZrrk */ |
| 111659 | VR512, VR512, VK16WM, VR512, |
| 111660 | /* VCVTTPS2UDQZrrkz */ |
| 111661 | VR512, VK16WM, VR512, |
| 111662 | /* VCVTTPS2UQQSZ128rm */ |
| 111663 | VR128X, f64mem, |
| 111664 | /* VCVTTPS2UQQSZ128rmb */ |
| 111665 | VR128X, f32mem, |
| 111666 | /* VCVTTPS2UQQSZ128rmbk */ |
| 111667 | VR128X, VR128X, VK2WM, f32mem, |
| 111668 | /* VCVTTPS2UQQSZ128rmbkz */ |
| 111669 | VR128X, VK2WM, f32mem, |
| 111670 | /* VCVTTPS2UQQSZ128rmk */ |
| 111671 | VR128X, VR128X, VK2WM, f64mem, |
| 111672 | /* VCVTTPS2UQQSZ128rmkz */ |
| 111673 | VR128X, VK2WM, f64mem, |
| 111674 | /* VCVTTPS2UQQSZ128rr */ |
| 111675 | VR128X, VR128X, |
| 111676 | /* VCVTTPS2UQQSZ128rrk */ |
| 111677 | VR128X, VR128X, VK2WM, VR128X, |
| 111678 | /* VCVTTPS2UQQSZ128rrkz */ |
| 111679 | VR128X, VK2WM, VR128X, |
| 111680 | /* VCVTTPS2UQQSZ256rm */ |
| 111681 | VR256X, f128mem, |
| 111682 | /* VCVTTPS2UQQSZ256rmb */ |
| 111683 | VR256X, f32mem, |
| 111684 | /* VCVTTPS2UQQSZ256rmbk */ |
| 111685 | VR256X, VR256X, VK4WM, f32mem, |
| 111686 | /* VCVTTPS2UQQSZ256rmbkz */ |
| 111687 | VR256X, VK4WM, f32mem, |
| 111688 | /* VCVTTPS2UQQSZ256rmk */ |
| 111689 | VR256X, VR256X, VK4WM, f128mem, |
| 111690 | /* VCVTTPS2UQQSZ256rmkz */ |
| 111691 | VR256X, VK4WM, f128mem, |
| 111692 | /* VCVTTPS2UQQSZ256rr */ |
| 111693 | VR256X, VR128X, |
| 111694 | /* VCVTTPS2UQQSZ256rrb */ |
| 111695 | VR256X, VR128X, |
| 111696 | /* VCVTTPS2UQQSZ256rrbk */ |
| 111697 | VR256X, VR256X, VK4WM, VR128X, |
| 111698 | /* VCVTTPS2UQQSZ256rrbkz */ |
| 111699 | VR256X, VK4WM, VR128X, |
| 111700 | /* VCVTTPS2UQQSZ256rrk */ |
| 111701 | VR256X, VR256X, VK4WM, VR128X, |
| 111702 | /* VCVTTPS2UQQSZ256rrkz */ |
| 111703 | VR256X, VK4WM, VR128X, |
| 111704 | /* VCVTTPS2UQQSZrm */ |
| 111705 | VR512, f256mem, |
| 111706 | /* VCVTTPS2UQQSZrmb */ |
| 111707 | VR512, f32mem, |
| 111708 | /* VCVTTPS2UQQSZrmbk */ |
| 111709 | VR512, VR512, VK8WM, f32mem, |
| 111710 | /* VCVTTPS2UQQSZrmbkz */ |
| 111711 | VR512, VK8WM, f32mem, |
| 111712 | /* VCVTTPS2UQQSZrmk */ |
| 111713 | VR512, VR512, VK8WM, f256mem, |
| 111714 | /* VCVTTPS2UQQSZrmkz */ |
| 111715 | VR512, VK8WM, f256mem, |
| 111716 | /* VCVTTPS2UQQSZrr */ |
| 111717 | VR512, VR256X, |
| 111718 | /* VCVTTPS2UQQSZrrb */ |
| 111719 | VR512, VR256X, |
| 111720 | /* VCVTTPS2UQQSZrrbk */ |
| 111721 | VR512, VR512, VK8WM, VR256X, |
| 111722 | /* VCVTTPS2UQQSZrrbkz */ |
| 111723 | VR512, VK8WM, VR256X, |
| 111724 | /* VCVTTPS2UQQSZrrk */ |
| 111725 | VR512, VR512, VK8WM, VR256X, |
| 111726 | /* VCVTTPS2UQQSZrrkz */ |
| 111727 | VR512, VK8WM, VR256X, |
| 111728 | /* VCVTTPS2UQQZ128rm */ |
| 111729 | VR128X, f64mem, |
| 111730 | /* VCVTTPS2UQQZ128rmb */ |
| 111731 | VR128X, f32mem, |
| 111732 | /* VCVTTPS2UQQZ128rmbk */ |
| 111733 | VR128X, VR128X, VK2WM, f32mem, |
| 111734 | /* VCVTTPS2UQQZ128rmbkz */ |
| 111735 | VR128X, VK2WM, f32mem, |
| 111736 | /* VCVTTPS2UQQZ128rmk */ |
| 111737 | VR128X, VR128X, VK2WM, f64mem, |
| 111738 | /* VCVTTPS2UQQZ128rmkz */ |
| 111739 | VR128X, VK2WM, f64mem, |
| 111740 | /* VCVTTPS2UQQZ128rr */ |
| 111741 | VR128X, VR128X, |
| 111742 | /* VCVTTPS2UQQZ128rrk */ |
| 111743 | VR128X, VR128X, VK2WM, VR128X, |
| 111744 | /* VCVTTPS2UQQZ128rrkz */ |
| 111745 | VR128X, VK2WM, VR128X, |
| 111746 | /* VCVTTPS2UQQZ256rm */ |
| 111747 | VR256X, f128mem, |
| 111748 | /* VCVTTPS2UQQZ256rmb */ |
| 111749 | VR256X, f32mem, |
| 111750 | /* VCVTTPS2UQQZ256rmbk */ |
| 111751 | VR256X, VR256X, VK4WM, f32mem, |
| 111752 | /* VCVTTPS2UQQZ256rmbkz */ |
| 111753 | VR256X, VK4WM, f32mem, |
| 111754 | /* VCVTTPS2UQQZ256rmk */ |
| 111755 | VR256X, VR256X, VK4WM, f128mem, |
| 111756 | /* VCVTTPS2UQQZ256rmkz */ |
| 111757 | VR256X, VK4WM, f128mem, |
| 111758 | /* VCVTTPS2UQQZ256rr */ |
| 111759 | VR256X, VR128X, |
| 111760 | /* VCVTTPS2UQQZ256rrk */ |
| 111761 | VR256X, VR256X, VK4WM, VR128X, |
| 111762 | /* VCVTTPS2UQQZ256rrkz */ |
| 111763 | VR256X, VK4WM, VR128X, |
| 111764 | /* VCVTTPS2UQQZrm */ |
| 111765 | VR512, f256mem, |
| 111766 | /* VCVTTPS2UQQZrmb */ |
| 111767 | VR512, f32mem, |
| 111768 | /* VCVTTPS2UQQZrmbk */ |
| 111769 | VR512, VR512, VK8WM, f32mem, |
| 111770 | /* VCVTTPS2UQQZrmbkz */ |
| 111771 | VR512, VK8WM, f32mem, |
| 111772 | /* VCVTTPS2UQQZrmk */ |
| 111773 | VR512, VR512, VK8WM, f256mem, |
| 111774 | /* VCVTTPS2UQQZrmkz */ |
| 111775 | VR512, VK8WM, f256mem, |
| 111776 | /* VCVTTPS2UQQZrr */ |
| 111777 | VR512, VR256X, |
| 111778 | /* VCVTTPS2UQQZrrb */ |
| 111779 | VR512, VR256X, |
| 111780 | /* VCVTTPS2UQQZrrbk */ |
| 111781 | VR512, VR512, VK8WM, VR256X, |
| 111782 | /* VCVTTPS2UQQZrrbkz */ |
| 111783 | VR512, VK8WM, VR256X, |
| 111784 | /* VCVTTPS2UQQZrrk */ |
| 111785 | VR512, VR512, VK8WM, VR256X, |
| 111786 | /* VCVTTPS2UQQZrrkz */ |
| 111787 | VR512, VK8WM, VR256X, |
| 111788 | /* VCVTTSD2SI64Srm */ |
| 111789 | GR64, f64mem, |
| 111790 | /* VCVTTSD2SI64Srm_Int */ |
| 111791 | GR64, sdmem, |
| 111792 | /* VCVTTSD2SI64Srr */ |
| 111793 | GR64, FR64X, |
| 111794 | /* VCVTTSD2SI64Srr_Int */ |
| 111795 | GR64, VR128X, |
| 111796 | /* VCVTTSD2SI64Srrb_Int */ |
| 111797 | GR64, VR128X, |
| 111798 | /* VCVTTSD2SI64Zrm */ |
| 111799 | GR64, f64mem, |
| 111800 | /* VCVTTSD2SI64Zrm_Int */ |
| 111801 | GR64, sdmem, |
| 111802 | /* VCVTTSD2SI64Zrr */ |
| 111803 | GR64, FR64X, |
| 111804 | /* VCVTTSD2SI64Zrr_Int */ |
| 111805 | GR64, VR128X, |
| 111806 | /* VCVTTSD2SI64Zrrb_Int */ |
| 111807 | GR64, VR128X, |
| 111808 | /* VCVTTSD2SI64rm */ |
| 111809 | GR64, f64mem, |
| 111810 | /* VCVTTSD2SI64rm_Int */ |
| 111811 | GR64, sdmem, |
| 111812 | /* VCVTTSD2SI64rr */ |
| 111813 | GR64, FR64, |
| 111814 | /* VCVTTSD2SI64rr_Int */ |
| 111815 | GR64, VR128, |
| 111816 | /* VCVTTSD2SISrm */ |
| 111817 | GR32, f64mem, |
| 111818 | /* VCVTTSD2SISrm_Int */ |
| 111819 | GR32, sdmem, |
| 111820 | /* VCVTTSD2SISrr */ |
| 111821 | GR32, FR64X, |
| 111822 | /* VCVTTSD2SISrr_Int */ |
| 111823 | GR32, VR128X, |
| 111824 | /* VCVTTSD2SISrrb_Int */ |
| 111825 | GR32, VR128X, |
| 111826 | /* VCVTTSD2SIZrm */ |
| 111827 | GR32, f64mem, |
| 111828 | /* VCVTTSD2SIZrm_Int */ |
| 111829 | GR32, sdmem, |
| 111830 | /* VCVTTSD2SIZrr */ |
| 111831 | GR32, FR64X, |
| 111832 | /* VCVTTSD2SIZrr_Int */ |
| 111833 | GR32, VR128X, |
| 111834 | /* VCVTTSD2SIZrrb_Int */ |
| 111835 | GR32, VR128X, |
| 111836 | /* VCVTTSD2SIrm */ |
| 111837 | GR32, f64mem, |
| 111838 | /* VCVTTSD2SIrm_Int */ |
| 111839 | GR32, sdmem, |
| 111840 | /* VCVTTSD2SIrr */ |
| 111841 | GR32, FR64, |
| 111842 | /* VCVTTSD2SIrr_Int */ |
| 111843 | GR32, VR128, |
| 111844 | /* VCVTTSD2USI64Srm */ |
| 111845 | GR64, f64mem, |
| 111846 | /* VCVTTSD2USI64Srm_Int */ |
| 111847 | GR64, sdmem, |
| 111848 | /* VCVTTSD2USI64Srr */ |
| 111849 | GR64, FR64X, |
| 111850 | /* VCVTTSD2USI64Srr_Int */ |
| 111851 | GR64, VR128X, |
| 111852 | /* VCVTTSD2USI64Srrb_Int */ |
| 111853 | GR64, VR128X, |
| 111854 | /* VCVTTSD2USI64Zrm */ |
| 111855 | GR64, f64mem, |
| 111856 | /* VCVTTSD2USI64Zrm_Int */ |
| 111857 | GR64, sdmem, |
| 111858 | /* VCVTTSD2USI64Zrr */ |
| 111859 | GR64, FR64X, |
| 111860 | /* VCVTTSD2USI64Zrr_Int */ |
| 111861 | GR64, VR128X, |
| 111862 | /* VCVTTSD2USI64Zrrb_Int */ |
| 111863 | GR64, VR128X, |
| 111864 | /* VCVTTSD2USISrm */ |
| 111865 | GR32, f64mem, |
| 111866 | /* VCVTTSD2USISrm_Int */ |
| 111867 | GR32, sdmem, |
| 111868 | /* VCVTTSD2USISrr */ |
| 111869 | GR32, FR64X, |
| 111870 | /* VCVTTSD2USISrr_Int */ |
| 111871 | GR32, VR128X, |
| 111872 | /* VCVTTSD2USISrrb_Int */ |
| 111873 | GR32, VR128X, |
| 111874 | /* VCVTTSD2USIZrm */ |
| 111875 | GR32, f64mem, |
| 111876 | /* VCVTTSD2USIZrm_Int */ |
| 111877 | GR32, sdmem, |
| 111878 | /* VCVTTSD2USIZrr */ |
| 111879 | GR32, FR64X, |
| 111880 | /* VCVTTSD2USIZrr_Int */ |
| 111881 | GR32, VR128X, |
| 111882 | /* VCVTTSD2USIZrrb_Int */ |
| 111883 | GR32, VR128X, |
| 111884 | /* VCVTTSH2SI64Zrm */ |
| 111885 | GR64, f16mem, |
| 111886 | /* VCVTTSH2SI64Zrm_Int */ |
| 111887 | GR64, shmem, |
| 111888 | /* VCVTTSH2SI64Zrr */ |
| 111889 | GR64, FR16X, |
| 111890 | /* VCVTTSH2SI64Zrr_Int */ |
| 111891 | GR64, VR128X, |
| 111892 | /* VCVTTSH2SI64Zrrb_Int */ |
| 111893 | GR64, VR128X, |
| 111894 | /* VCVTTSH2SIZrm */ |
| 111895 | GR32, f16mem, |
| 111896 | /* VCVTTSH2SIZrm_Int */ |
| 111897 | GR32, shmem, |
| 111898 | /* VCVTTSH2SIZrr */ |
| 111899 | GR32, FR16X, |
| 111900 | /* VCVTTSH2SIZrr_Int */ |
| 111901 | GR32, VR128X, |
| 111902 | /* VCVTTSH2SIZrrb_Int */ |
| 111903 | GR32, VR128X, |
| 111904 | /* VCVTTSH2USI64Zrm */ |
| 111905 | GR64, f16mem, |
| 111906 | /* VCVTTSH2USI64Zrm_Int */ |
| 111907 | GR64, shmem, |
| 111908 | /* VCVTTSH2USI64Zrr */ |
| 111909 | GR64, FR16X, |
| 111910 | /* VCVTTSH2USI64Zrr_Int */ |
| 111911 | GR64, VR128X, |
| 111912 | /* VCVTTSH2USI64Zrrb_Int */ |
| 111913 | GR64, VR128X, |
| 111914 | /* VCVTTSH2USIZrm */ |
| 111915 | GR32, f16mem, |
| 111916 | /* VCVTTSH2USIZrm_Int */ |
| 111917 | GR32, shmem, |
| 111918 | /* VCVTTSH2USIZrr */ |
| 111919 | GR32, FR16X, |
| 111920 | /* VCVTTSH2USIZrr_Int */ |
| 111921 | GR32, VR128X, |
| 111922 | /* VCVTTSH2USIZrrb_Int */ |
| 111923 | GR32, VR128X, |
| 111924 | /* VCVTTSS2SI64Srm */ |
| 111925 | GR64, f32mem, |
| 111926 | /* VCVTTSS2SI64Srm_Int */ |
| 111927 | GR64, ssmem, |
| 111928 | /* VCVTTSS2SI64Srr */ |
| 111929 | GR64, FR32X, |
| 111930 | /* VCVTTSS2SI64Srr_Int */ |
| 111931 | GR64, VR128X, |
| 111932 | /* VCVTTSS2SI64Srrb_Int */ |
| 111933 | GR64, VR128X, |
| 111934 | /* VCVTTSS2SI64Zrm */ |
| 111935 | GR64, f32mem, |
| 111936 | /* VCVTTSS2SI64Zrm_Int */ |
| 111937 | GR64, ssmem, |
| 111938 | /* VCVTTSS2SI64Zrr */ |
| 111939 | GR64, FR32X, |
| 111940 | /* VCVTTSS2SI64Zrr_Int */ |
| 111941 | GR64, VR128X, |
| 111942 | /* VCVTTSS2SI64Zrrb_Int */ |
| 111943 | GR64, VR128X, |
| 111944 | /* VCVTTSS2SI64rm */ |
| 111945 | GR64, f32mem, |
| 111946 | /* VCVTTSS2SI64rm_Int */ |
| 111947 | GR64, ssmem, |
| 111948 | /* VCVTTSS2SI64rr */ |
| 111949 | GR64, FR32, |
| 111950 | /* VCVTTSS2SI64rr_Int */ |
| 111951 | GR64, VR128, |
| 111952 | /* VCVTTSS2SISrm */ |
| 111953 | GR32, f32mem, |
| 111954 | /* VCVTTSS2SISrm_Int */ |
| 111955 | GR32, ssmem, |
| 111956 | /* VCVTTSS2SISrr */ |
| 111957 | GR32, FR32X, |
| 111958 | /* VCVTTSS2SISrr_Int */ |
| 111959 | GR32, VR128X, |
| 111960 | /* VCVTTSS2SISrrb_Int */ |
| 111961 | GR32, VR128X, |
| 111962 | /* VCVTTSS2SIZrm */ |
| 111963 | GR32, f32mem, |
| 111964 | /* VCVTTSS2SIZrm_Int */ |
| 111965 | GR32, ssmem, |
| 111966 | /* VCVTTSS2SIZrr */ |
| 111967 | GR32, FR32X, |
| 111968 | /* VCVTTSS2SIZrr_Int */ |
| 111969 | GR32, VR128X, |
| 111970 | /* VCVTTSS2SIZrrb_Int */ |
| 111971 | GR32, VR128X, |
| 111972 | /* VCVTTSS2SIrm */ |
| 111973 | GR32, f32mem, |
| 111974 | /* VCVTTSS2SIrm_Int */ |
| 111975 | GR32, ssmem, |
| 111976 | /* VCVTTSS2SIrr */ |
| 111977 | GR32, FR32, |
| 111978 | /* VCVTTSS2SIrr_Int */ |
| 111979 | GR32, VR128, |
| 111980 | /* VCVTTSS2USI64Srm */ |
| 111981 | GR64, f32mem, |
| 111982 | /* VCVTTSS2USI64Srm_Int */ |
| 111983 | GR64, ssmem, |
| 111984 | /* VCVTTSS2USI64Srr */ |
| 111985 | GR64, FR32X, |
| 111986 | /* VCVTTSS2USI64Srr_Int */ |
| 111987 | GR64, VR128X, |
| 111988 | /* VCVTTSS2USI64Srrb_Int */ |
| 111989 | GR64, VR128X, |
| 111990 | /* VCVTTSS2USI64Zrm */ |
| 111991 | GR64, f32mem, |
| 111992 | /* VCVTTSS2USI64Zrm_Int */ |
| 111993 | GR64, ssmem, |
| 111994 | /* VCVTTSS2USI64Zrr */ |
| 111995 | GR64, FR32X, |
| 111996 | /* VCVTTSS2USI64Zrr_Int */ |
| 111997 | GR64, VR128X, |
| 111998 | /* VCVTTSS2USI64Zrrb_Int */ |
| 111999 | GR64, VR128X, |
| 112000 | /* VCVTTSS2USISrm */ |
| 112001 | GR32, f32mem, |
| 112002 | /* VCVTTSS2USISrm_Int */ |
| 112003 | GR32, ssmem, |
| 112004 | /* VCVTTSS2USISrr */ |
| 112005 | GR32, FR32X, |
| 112006 | /* VCVTTSS2USISrr_Int */ |
| 112007 | GR32, VR128X, |
| 112008 | /* VCVTTSS2USISrrb_Int */ |
| 112009 | GR32, VR128X, |
| 112010 | /* VCVTTSS2USIZrm */ |
| 112011 | GR32, f32mem, |
| 112012 | /* VCVTTSS2USIZrm_Int */ |
| 112013 | GR32, ssmem, |
| 112014 | /* VCVTTSS2USIZrr */ |
| 112015 | GR32, FR32X, |
| 112016 | /* VCVTTSS2USIZrr_Int */ |
| 112017 | GR32, VR128X, |
| 112018 | /* VCVTTSS2USIZrrb_Int */ |
| 112019 | GR32, VR128X, |
| 112020 | /* VCVTUDQ2PDZ128rm */ |
| 112021 | VR128X, i64mem, |
| 112022 | /* VCVTUDQ2PDZ128rmb */ |
| 112023 | VR128X, i32mem, |
| 112024 | /* VCVTUDQ2PDZ128rmbk */ |
| 112025 | VR128X, VR128X, VK2WM, i32mem, |
| 112026 | /* VCVTUDQ2PDZ128rmbkz */ |
| 112027 | VR128X, VK2WM, i32mem, |
| 112028 | /* VCVTUDQ2PDZ128rmk */ |
| 112029 | VR128X, VR128X, VK2WM, i64mem, |
| 112030 | /* VCVTUDQ2PDZ128rmkz */ |
| 112031 | VR128X, VK2WM, i64mem, |
| 112032 | /* VCVTUDQ2PDZ128rr */ |
| 112033 | VR128X, VR128X, |
| 112034 | /* VCVTUDQ2PDZ128rrk */ |
| 112035 | VR128X, VR128X, VK2WM, VR128X, |
| 112036 | /* VCVTUDQ2PDZ128rrkz */ |
| 112037 | VR128X, VK2WM, VR128X, |
| 112038 | /* VCVTUDQ2PDZ256rm */ |
| 112039 | VR256X, i128mem, |
| 112040 | /* VCVTUDQ2PDZ256rmb */ |
| 112041 | VR256X, i32mem, |
| 112042 | /* VCVTUDQ2PDZ256rmbk */ |
| 112043 | VR256X, VR256X, VK4WM, i32mem, |
| 112044 | /* VCVTUDQ2PDZ256rmbkz */ |
| 112045 | VR256X, VK4WM, i32mem, |
| 112046 | /* VCVTUDQ2PDZ256rmk */ |
| 112047 | VR256X, VR256X, VK4WM, i128mem, |
| 112048 | /* VCVTUDQ2PDZ256rmkz */ |
| 112049 | VR256X, VK4WM, i128mem, |
| 112050 | /* VCVTUDQ2PDZ256rr */ |
| 112051 | VR256X, VR128X, |
| 112052 | /* VCVTUDQ2PDZ256rrk */ |
| 112053 | VR256X, VR256X, VK4WM, VR128X, |
| 112054 | /* VCVTUDQ2PDZ256rrkz */ |
| 112055 | VR256X, VK4WM, VR128X, |
| 112056 | /* VCVTUDQ2PDZrm */ |
| 112057 | VR512, i256mem, |
| 112058 | /* VCVTUDQ2PDZrmb */ |
| 112059 | VR512, i32mem, |
| 112060 | /* VCVTUDQ2PDZrmbk */ |
| 112061 | VR512, VR512, VK8WM, i32mem, |
| 112062 | /* VCVTUDQ2PDZrmbkz */ |
| 112063 | VR512, VK8WM, i32mem, |
| 112064 | /* VCVTUDQ2PDZrmk */ |
| 112065 | VR512, VR512, VK8WM, i256mem, |
| 112066 | /* VCVTUDQ2PDZrmkz */ |
| 112067 | VR512, VK8WM, i256mem, |
| 112068 | /* VCVTUDQ2PDZrr */ |
| 112069 | VR512, VR256X, |
| 112070 | /* VCVTUDQ2PDZrrk */ |
| 112071 | VR512, VR512, VK8WM, VR256X, |
| 112072 | /* VCVTUDQ2PDZrrkz */ |
| 112073 | VR512, VK8WM, VR256X, |
| 112074 | /* VCVTUDQ2PHZ128rm */ |
| 112075 | VR128X, i128mem, |
| 112076 | /* VCVTUDQ2PHZ128rmb */ |
| 112077 | VR128X, i32mem, |
| 112078 | /* VCVTUDQ2PHZ128rmbk */ |
| 112079 | VR128X, VR128X, VK4WM, i32mem, |
| 112080 | /* VCVTUDQ2PHZ128rmbkz */ |
| 112081 | VR128X, VK4WM, i32mem, |
| 112082 | /* VCVTUDQ2PHZ128rmk */ |
| 112083 | VR128X, VR128X, VK4WM, i128mem, |
| 112084 | /* VCVTUDQ2PHZ128rmkz */ |
| 112085 | VR128X, VK4WM, i128mem, |
| 112086 | /* VCVTUDQ2PHZ128rr */ |
| 112087 | VR128X, VR128X, |
| 112088 | /* VCVTUDQ2PHZ128rrk */ |
| 112089 | VR128X, VR128X, VK4WM, VR128X, |
| 112090 | /* VCVTUDQ2PHZ128rrkz */ |
| 112091 | VR128X, VK4WM, VR128X, |
| 112092 | /* VCVTUDQ2PHZ256rm */ |
| 112093 | VR128X, i256mem, |
| 112094 | /* VCVTUDQ2PHZ256rmb */ |
| 112095 | VR128X, i32mem, |
| 112096 | /* VCVTUDQ2PHZ256rmbk */ |
| 112097 | VR128X, VR128X, VK8WM, i32mem, |
| 112098 | /* VCVTUDQ2PHZ256rmbkz */ |
| 112099 | VR128X, VK8WM, i32mem, |
| 112100 | /* VCVTUDQ2PHZ256rmk */ |
| 112101 | VR128X, VR128X, VK8WM, i256mem, |
| 112102 | /* VCVTUDQ2PHZ256rmkz */ |
| 112103 | VR128X, VK8WM, i256mem, |
| 112104 | /* VCVTUDQ2PHZ256rr */ |
| 112105 | VR128X, VR256X, |
| 112106 | /* VCVTUDQ2PHZ256rrk */ |
| 112107 | VR128X, VR128X, VK8WM, VR256X, |
| 112108 | /* VCVTUDQ2PHZ256rrkz */ |
| 112109 | VR128X, VK8WM, VR256X, |
| 112110 | /* VCVTUDQ2PHZrm */ |
| 112111 | VR256X, i512mem, |
| 112112 | /* VCVTUDQ2PHZrmb */ |
| 112113 | VR256X, i32mem, |
| 112114 | /* VCVTUDQ2PHZrmbk */ |
| 112115 | VR256X, VR256X, VK16WM, i32mem, |
| 112116 | /* VCVTUDQ2PHZrmbkz */ |
| 112117 | VR256X, VK16WM, i32mem, |
| 112118 | /* VCVTUDQ2PHZrmk */ |
| 112119 | VR256X, VR256X, VK16WM, i512mem, |
| 112120 | /* VCVTUDQ2PHZrmkz */ |
| 112121 | VR256X, VK16WM, i512mem, |
| 112122 | /* VCVTUDQ2PHZrr */ |
| 112123 | VR256X, VR512, |
| 112124 | /* VCVTUDQ2PHZrrb */ |
| 112125 | VR256X, VR512, AVX512RC, |
| 112126 | /* VCVTUDQ2PHZrrbk */ |
| 112127 | VR256X, VR256X, VK16WM, VR512, AVX512RC, |
| 112128 | /* VCVTUDQ2PHZrrbkz */ |
| 112129 | VR256X, VK16WM, VR512, AVX512RC, |
| 112130 | /* VCVTUDQ2PHZrrk */ |
| 112131 | VR256X, VR256X, VK16WM, VR512, |
| 112132 | /* VCVTUDQ2PHZrrkz */ |
| 112133 | VR256X, VK16WM, VR512, |
| 112134 | /* VCVTUDQ2PSZ128rm */ |
| 112135 | VR128X, i128mem, |
| 112136 | /* VCVTUDQ2PSZ128rmb */ |
| 112137 | VR128X, i32mem, |
| 112138 | /* VCVTUDQ2PSZ128rmbk */ |
| 112139 | VR128X, VR128X, VK4WM, i32mem, |
| 112140 | /* VCVTUDQ2PSZ128rmbkz */ |
| 112141 | VR128X, VK4WM, i32mem, |
| 112142 | /* VCVTUDQ2PSZ128rmk */ |
| 112143 | VR128X, VR128X, VK4WM, i128mem, |
| 112144 | /* VCVTUDQ2PSZ128rmkz */ |
| 112145 | VR128X, VK4WM, i128mem, |
| 112146 | /* VCVTUDQ2PSZ128rr */ |
| 112147 | VR128X, VR128X, |
| 112148 | /* VCVTUDQ2PSZ128rrk */ |
| 112149 | VR128X, VR128X, VK4WM, VR128X, |
| 112150 | /* VCVTUDQ2PSZ128rrkz */ |
| 112151 | VR128X, VK4WM, VR128X, |
| 112152 | /* VCVTUDQ2PSZ256rm */ |
| 112153 | VR256X, i256mem, |
| 112154 | /* VCVTUDQ2PSZ256rmb */ |
| 112155 | VR256X, i32mem, |
| 112156 | /* VCVTUDQ2PSZ256rmbk */ |
| 112157 | VR256X, VR256X, VK8WM, i32mem, |
| 112158 | /* VCVTUDQ2PSZ256rmbkz */ |
| 112159 | VR256X, VK8WM, i32mem, |
| 112160 | /* VCVTUDQ2PSZ256rmk */ |
| 112161 | VR256X, VR256X, VK8WM, i256mem, |
| 112162 | /* VCVTUDQ2PSZ256rmkz */ |
| 112163 | VR256X, VK8WM, i256mem, |
| 112164 | /* VCVTUDQ2PSZ256rr */ |
| 112165 | VR256X, VR256X, |
| 112166 | /* VCVTUDQ2PSZ256rrk */ |
| 112167 | VR256X, VR256X, VK8WM, VR256X, |
| 112168 | /* VCVTUDQ2PSZ256rrkz */ |
| 112169 | VR256X, VK8WM, VR256X, |
| 112170 | /* VCVTUDQ2PSZrm */ |
| 112171 | VR512, i512mem, |
| 112172 | /* VCVTUDQ2PSZrmb */ |
| 112173 | VR512, i32mem, |
| 112174 | /* VCVTUDQ2PSZrmbk */ |
| 112175 | VR512, VR512, VK16WM, i32mem, |
| 112176 | /* VCVTUDQ2PSZrmbkz */ |
| 112177 | VR512, VK16WM, i32mem, |
| 112178 | /* VCVTUDQ2PSZrmk */ |
| 112179 | VR512, VR512, VK16WM, i512mem, |
| 112180 | /* VCVTUDQ2PSZrmkz */ |
| 112181 | VR512, VK16WM, i512mem, |
| 112182 | /* VCVTUDQ2PSZrr */ |
| 112183 | VR512, VR512, |
| 112184 | /* VCVTUDQ2PSZrrb */ |
| 112185 | VR512, VR512, AVX512RC, |
| 112186 | /* VCVTUDQ2PSZrrbk */ |
| 112187 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 112188 | /* VCVTUDQ2PSZrrbkz */ |
| 112189 | VR512, VK16WM, VR512, AVX512RC, |
| 112190 | /* VCVTUDQ2PSZrrk */ |
| 112191 | VR512, VR512, VK16WM, VR512, |
| 112192 | /* VCVTUDQ2PSZrrkz */ |
| 112193 | VR512, VK16WM, VR512, |
| 112194 | /* VCVTUQQ2PDZ128rm */ |
| 112195 | VR128X, i128mem, |
| 112196 | /* VCVTUQQ2PDZ128rmb */ |
| 112197 | VR128X, i64mem, |
| 112198 | /* VCVTUQQ2PDZ128rmbk */ |
| 112199 | VR128X, VR128X, VK2WM, i64mem, |
| 112200 | /* VCVTUQQ2PDZ128rmbkz */ |
| 112201 | VR128X, VK2WM, i64mem, |
| 112202 | /* VCVTUQQ2PDZ128rmk */ |
| 112203 | VR128X, VR128X, VK2WM, i128mem, |
| 112204 | /* VCVTUQQ2PDZ128rmkz */ |
| 112205 | VR128X, VK2WM, i128mem, |
| 112206 | /* VCVTUQQ2PDZ128rr */ |
| 112207 | VR128X, VR128X, |
| 112208 | /* VCVTUQQ2PDZ128rrk */ |
| 112209 | VR128X, VR128X, VK2WM, VR128X, |
| 112210 | /* VCVTUQQ2PDZ128rrkz */ |
| 112211 | VR128X, VK2WM, VR128X, |
| 112212 | /* VCVTUQQ2PDZ256rm */ |
| 112213 | VR256X, i256mem, |
| 112214 | /* VCVTUQQ2PDZ256rmb */ |
| 112215 | VR256X, i64mem, |
| 112216 | /* VCVTUQQ2PDZ256rmbk */ |
| 112217 | VR256X, VR256X, VK4WM, i64mem, |
| 112218 | /* VCVTUQQ2PDZ256rmbkz */ |
| 112219 | VR256X, VK4WM, i64mem, |
| 112220 | /* VCVTUQQ2PDZ256rmk */ |
| 112221 | VR256X, VR256X, VK4WM, i256mem, |
| 112222 | /* VCVTUQQ2PDZ256rmkz */ |
| 112223 | VR256X, VK4WM, i256mem, |
| 112224 | /* VCVTUQQ2PDZ256rr */ |
| 112225 | VR256X, VR256X, |
| 112226 | /* VCVTUQQ2PDZ256rrk */ |
| 112227 | VR256X, VR256X, VK4WM, VR256X, |
| 112228 | /* VCVTUQQ2PDZ256rrkz */ |
| 112229 | VR256X, VK4WM, VR256X, |
| 112230 | /* VCVTUQQ2PDZrm */ |
| 112231 | VR512, i512mem, |
| 112232 | /* VCVTUQQ2PDZrmb */ |
| 112233 | VR512, i64mem, |
| 112234 | /* VCVTUQQ2PDZrmbk */ |
| 112235 | VR512, VR512, VK8WM, i64mem, |
| 112236 | /* VCVTUQQ2PDZrmbkz */ |
| 112237 | VR512, VK8WM, i64mem, |
| 112238 | /* VCVTUQQ2PDZrmk */ |
| 112239 | VR512, VR512, VK8WM, i512mem, |
| 112240 | /* VCVTUQQ2PDZrmkz */ |
| 112241 | VR512, VK8WM, i512mem, |
| 112242 | /* VCVTUQQ2PDZrr */ |
| 112243 | VR512, VR512, |
| 112244 | /* VCVTUQQ2PDZrrb */ |
| 112245 | VR512, VR512, AVX512RC, |
| 112246 | /* VCVTUQQ2PDZrrbk */ |
| 112247 | VR512, VR512, VK8WM, VR512, AVX512RC, |
| 112248 | /* VCVTUQQ2PDZrrbkz */ |
| 112249 | VR512, VK8WM, VR512, AVX512RC, |
| 112250 | /* VCVTUQQ2PDZrrk */ |
| 112251 | VR512, VR512, VK8WM, VR512, |
| 112252 | /* VCVTUQQ2PDZrrkz */ |
| 112253 | VR512, VK8WM, VR512, |
| 112254 | /* VCVTUQQ2PHZ128rm */ |
| 112255 | VR128X, i128mem, |
| 112256 | /* VCVTUQQ2PHZ128rmb */ |
| 112257 | VR128X, i64mem, |
| 112258 | /* VCVTUQQ2PHZ128rmbk */ |
| 112259 | VR128X, VR128X, VK2WM, i64mem, |
| 112260 | /* VCVTUQQ2PHZ128rmbkz */ |
| 112261 | VR128X, VK2WM, i64mem, |
| 112262 | /* VCVTUQQ2PHZ128rmk */ |
| 112263 | VR128X, VR128X, VK2WM, i128mem, |
| 112264 | /* VCVTUQQ2PHZ128rmkz */ |
| 112265 | VR128X, VK2WM, i128mem, |
| 112266 | /* VCVTUQQ2PHZ128rr */ |
| 112267 | VR128X, VR128X, |
| 112268 | /* VCVTUQQ2PHZ128rrk */ |
| 112269 | VR128X, VR128X, VK2WM, VR128X, |
| 112270 | /* VCVTUQQ2PHZ128rrkz */ |
| 112271 | VR128X, VK2WM, VR128X, |
| 112272 | /* VCVTUQQ2PHZ256rm */ |
| 112273 | VR128X, i256mem, |
| 112274 | /* VCVTUQQ2PHZ256rmb */ |
| 112275 | VR128X, i64mem, |
| 112276 | /* VCVTUQQ2PHZ256rmbk */ |
| 112277 | VR128X, VR128X, VK4WM, i64mem, |
| 112278 | /* VCVTUQQ2PHZ256rmbkz */ |
| 112279 | VR128X, VK4WM, i64mem, |
| 112280 | /* VCVTUQQ2PHZ256rmk */ |
| 112281 | VR128X, VR128X, VK4WM, i256mem, |
| 112282 | /* VCVTUQQ2PHZ256rmkz */ |
| 112283 | VR128X, VK4WM, i256mem, |
| 112284 | /* VCVTUQQ2PHZ256rr */ |
| 112285 | VR128X, VR256X, |
| 112286 | /* VCVTUQQ2PHZ256rrk */ |
| 112287 | VR128X, VR128X, VK4WM, VR256X, |
| 112288 | /* VCVTUQQ2PHZ256rrkz */ |
| 112289 | VR128X, VK4WM, VR256X, |
| 112290 | /* VCVTUQQ2PHZrm */ |
| 112291 | VR128X, i512mem, |
| 112292 | /* VCVTUQQ2PHZrmb */ |
| 112293 | VR128X, i64mem, |
| 112294 | /* VCVTUQQ2PHZrmbk */ |
| 112295 | VR128X, VR128X, VK8WM, i64mem, |
| 112296 | /* VCVTUQQ2PHZrmbkz */ |
| 112297 | VR128X, VK8WM, i64mem, |
| 112298 | /* VCVTUQQ2PHZrmk */ |
| 112299 | VR128X, VR128X, VK8WM, i512mem, |
| 112300 | /* VCVTUQQ2PHZrmkz */ |
| 112301 | VR128X, VK8WM, i512mem, |
| 112302 | /* VCVTUQQ2PHZrr */ |
| 112303 | VR128X, VR512, |
| 112304 | /* VCVTUQQ2PHZrrb */ |
| 112305 | VR128X, VR512, AVX512RC, |
| 112306 | /* VCVTUQQ2PHZrrbk */ |
| 112307 | VR128X, VR128X, VK8WM, VR512, AVX512RC, |
| 112308 | /* VCVTUQQ2PHZrrbkz */ |
| 112309 | VR128X, VK8WM, VR512, AVX512RC, |
| 112310 | /* VCVTUQQ2PHZrrk */ |
| 112311 | VR128X, VR128X, VK8WM, VR512, |
| 112312 | /* VCVTUQQ2PHZrrkz */ |
| 112313 | VR128X, VK8WM, VR512, |
| 112314 | /* VCVTUQQ2PSZ128rm */ |
| 112315 | VR128X, i128mem, |
| 112316 | /* VCVTUQQ2PSZ128rmb */ |
| 112317 | VR128X, i64mem, |
| 112318 | /* VCVTUQQ2PSZ128rmbk */ |
| 112319 | VR128X, VR128X, VK2WM, i64mem, |
| 112320 | /* VCVTUQQ2PSZ128rmbkz */ |
| 112321 | VR128X, VK2WM, i64mem, |
| 112322 | /* VCVTUQQ2PSZ128rmk */ |
| 112323 | VR128X, VR128X, VK2WM, i128mem, |
| 112324 | /* VCVTUQQ2PSZ128rmkz */ |
| 112325 | VR128X, VK2WM, i128mem, |
| 112326 | /* VCVTUQQ2PSZ128rr */ |
| 112327 | VR128X, VR128X, |
| 112328 | /* VCVTUQQ2PSZ128rrk */ |
| 112329 | VR128X, VR128X, VK2WM, VR128X, |
| 112330 | /* VCVTUQQ2PSZ128rrkz */ |
| 112331 | VR128X, VK2WM, VR128X, |
| 112332 | /* VCVTUQQ2PSZ256rm */ |
| 112333 | VR128X, i256mem, |
| 112334 | /* VCVTUQQ2PSZ256rmb */ |
| 112335 | VR128X, i64mem, |
| 112336 | /* VCVTUQQ2PSZ256rmbk */ |
| 112337 | VR128X, VR128X, VK4WM, i64mem, |
| 112338 | /* VCVTUQQ2PSZ256rmbkz */ |
| 112339 | VR128X, VK4WM, i64mem, |
| 112340 | /* VCVTUQQ2PSZ256rmk */ |
| 112341 | VR128X, VR128X, VK4WM, i256mem, |
| 112342 | /* VCVTUQQ2PSZ256rmkz */ |
| 112343 | VR128X, VK4WM, i256mem, |
| 112344 | /* VCVTUQQ2PSZ256rr */ |
| 112345 | VR128X, VR256X, |
| 112346 | /* VCVTUQQ2PSZ256rrk */ |
| 112347 | VR128X, VR128X, VK4WM, VR256X, |
| 112348 | /* VCVTUQQ2PSZ256rrkz */ |
| 112349 | VR128X, VK4WM, VR256X, |
| 112350 | /* VCVTUQQ2PSZrm */ |
| 112351 | VR256X, i512mem, |
| 112352 | /* VCVTUQQ2PSZrmb */ |
| 112353 | VR256X, i64mem, |
| 112354 | /* VCVTUQQ2PSZrmbk */ |
| 112355 | VR256X, VR256X, VK8WM, i64mem, |
| 112356 | /* VCVTUQQ2PSZrmbkz */ |
| 112357 | VR256X, VK8WM, i64mem, |
| 112358 | /* VCVTUQQ2PSZrmk */ |
| 112359 | VR256X, VR256X, VK8WM, i512mem, |
| 112360 | /* VCVTUQQ2PSZrmkz */ |
| 112361 | VR256X, VK8WM, i512mem, |
| 112362 | /* VCVTUQQ2PSZrr */ |
| 112363 | VR256X, VR512, |
| 112364 | /* VCVTUQQ2PSZrrb */ |
| 112365 | VR256X, VR512, AVX512RC, |
| 112366 | /* VCVTUQQ2PSZrrbk */ |
| 112367 | VR256X, VR256X, VK8WM, VR512, AVX512RC, |
| 112368 | /* VCVTUQQ2PSZrrbkz */ |
| 112369 | VR256X, VK8WM, VR512, AVX512RC, |
| 112370 | /* VCVTUQQ2PSZrrk */ |
| 112371 | VR256X, VR256X, VK8WM, VR512, |
| 112372 | /* VCVTUQQ2PSZrrkz */ |
| 112373 | VR256X, VK8WM, VR512, |
| 112374 | /* VCVTUSI2SDZrm */ |
| 112375 | FR64X, FR64X, i32mem, |
| 112376 | /* VCVTUSI2SDZrm_Int */ |
| 112377 | VR128X, VR128X, i32mem, |
| 112378 | /* VCVTUSI2SDZrr */ |
| 112379 | FR64X, FR64X, GR32, |
| 112380 | /* VCVTUSI2SDZrr_Int */ |
| 112381 | VR128X, VR128X, GR32, |
| 112382 | /* VCVTUSI2SHZrm */ |
| 112383 | FR16X, FR16X, i32mem, |
| 112384 | /* VCVTUSI2SHZrm_Int */ |
| 112385 | VR128X, VR128X, i32mem, |
| 112386 | /* VCVTUSI2SHZrr */ |
| 112387 | FR16X, FR16X, GR32, |
| 112388 | /* VCVTUSI2SHZrr_Int */ |
| 112389 | VR128X, VR128X, GR32, |
| 112390 | /* VCVTUSI2SHZrrb_Int */ |
| 112391 | VR128X, VR128X, GR32, AVX512RC, |
| 112392 | /* VCVTUSI2SSZrm */ |
| 112393 | FR32X, FR32X, i32mem, |
| 112394 | /* VCVTUSI2SSZrm_Int */ |
| 112395 | VR128X, VR128X, i32mem, |
| 112396 | /* VCVTUSI2SSZrr */ |
| 112397 | FR32X, FR32X, GR32, |
| 112398 | /* VCVTUSI2SSZrr_Int */ |
| 112399 | VR128X, VR128X, GR32, |
| 112400 | /* VCVTUSI2SSZrrb_Int */ |
| 112401 | VR128X, VR128X, GR32, AVX512RC, |
| 112402 | /* VCVTUSI642SDZrm */ |
| 112403 | FR64X, FR64X, i64mem, |
| 112404 | /* VCVTUSI642SDZrm_Int */ |
| 112405 | VR128X, VR128X, i64mem, |
| 112406 | /* VCVTUSI642SDZrr */ |
| 112407 | FR64X, FR64X, GR64, |
| 112408 | /* VCVTUSI642SDZrr_Int */ |
| 112409 | VR128X, VR128X, GR64, |
| 112410 | /* VCVTUSI642SDZrrb_Int */ |
| 112411 | VR128X, VR128X, GR64, AVX512RC, |
| 112412 | /* VCVTUSI642SHZrm */ |
| 112413 | FR16X, FR16X, i64mem, |
| 112414 | /* VCVTUSI642SHZrm_Int */ |
| 112415 | VR128X, VR128X, i64mem, |
| 112416 | /* VCVTUSI642SHZrr */ |
| 112417 | FR16X, FR16X, GR64, |
| 112418 | /* VCVTUSI642SHZrr_Int */ |
| 112419 | VR128X, VR128X, GR64, |
| 112420 | /* VCVTUSI642SHZrrb_Int */ |
| 112421 | VR128X, VR128X, GR64, AVX512RC, |
| 112422 | /* VCVTUSI642SSZrm */ |
| 112423 | FR32X, FR32X, i64mem, |
| 112424 | /* VCVTUSI642SSZrm_Int */ |
| 112425 | VR128X, VR128X, i64mem, |
| 112426 | /* VCVTUSI642SSZrr */ |
| 112427 | FR32X, FR32X, GR64, |
| 112428 | /* VCVTUSI642SSZrr_Int */ |
| 112429 | VR128X, VR128X, GR64, |
| 112430 | /* VCVTUSI642SSZrrb_Int */ |
| 112431 | VR128X, VR128X, GR64, AVX512RC, |
| 112432 | /* VCVTUW2PHZ128rm */ |
| 112433 | VR128X, i128mem, |
| 112434 | /* VCVTUW2PHZ128rmb */ |
| 112435 | VR128X, i16mem, |
| 112436 | /* VCVTUW2PHZ128rmbk */ |
| 112437 | VR128X, VR128X, VK8WM, i16mem, |
| 112438 | /* VCVTUW2PHZ128rmbkz */ |
| 112439 | VR128X, VK8WM, i16mem, |
| 112440 | /* VCVTUW2PHZ128rmk */ |
| 112441 | VR128X, VR128X, VK8WM, i128mem, |
| 112442 | /* VCVTUW2PHZ128rmkz */ |
| 112443 | VR128X, VK8WM, i128mem, |
| 112444 | /* VCVTUW2PHZ128rr */ |
| 112445 | VR128X, VR128X, |
| 112446 | /* VCVTUW2PHZ128rrk */ |
| 112447 | VR128X, VR128X, VK8WM, VR128X, |
| 112448 | /* VCVTUW2PHZ128rrkz */ |
| 112449 | VR128X, VK8WM, VR128X, |
| 112450 | /* VCVTUW2PHZ256rm */ |
| 112451 | VR256X, i256mem, |
| 112452 | /* VCVTUW2PHZ256rmb */ |
| 112453 | VR256X, i16mem, |
| 112454 | /* VCVTUW2PHZ256rmbk */ |
| 112455 | VR256X, VR256X, VK16WM, i16mem, |
| 112456 | /* VCVTUW2PHZ256rmbkz */ |
| 112457 | VR256X, VK16WM, i16mem, |
| 112458 | /* VCVTUW2PHZ256rmk */ |
| 112459 | VR256X, VR256X, VK16WM, i256mem, |
| 112460 | /* VCVTUW2PHZ256rmkz */ |
| 112461 | VR256X, VK16WM, i256mem, |
| 112462 | /* VCVTUW2PHZ256rr */ |
| 112463 | VR256X, VR256X, |
| 112464 | /* VCVTUW2PHZ256rrk */ |
| 112465 | VR256X, VR256X, VK16WM, VR256X, |
| 112466 | /* VCVTUW2PHZ256rrkz */ |
| 112467 | VR256X, VK16WM, VR256X, |
| 112468 | /* VCVTUW2PHZrm */ |
| 112469 | VR512, i512mem, |
| 112470 | /* VCVTUW2PHZrmb */ |
| 112471 | VR512, i16mem, |
| 112472 | /* VCVTUW2PHZrmbk */ |
| 112473 | VR512, VR512, VK32WM, i16mem, |
| 112474 | /* VCVTUW2PHZrmbkz */ |
| 112475 | VR512, VK32WM, i16mem, |
| 112476 | /* VCVTUW2PHZrmk */ |
| 112477 | VR512, VR512, VK32WM, i512mem, |
| 112478 | /* VCVTUW2PHZrmkz */ |
| 112479 | VR512, VK32WM, i512mem, |
| 112480 | /* VCVTUW2PHZrr */ |
| 112481 | VR512, VR512, |
| 112482 | /* VCVTUW2PHZrrb */ |
| 112483 | VR512, VR512, AVX512RC, |
| 112484 | /* VCVTUW2PHZrrbk */ |
| 112485 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 112486 | /* VCVTUW2PHZrrbkz */ |
| 112487 | VR512, VK32WM, VR512, AVX512RC, |
| 112488 | /* VCVTUW2PHZrrk */ |
| 112489 | VR512, VR512, VK32WM, VR512, |
| 112490 | /* VCVTUW2PHZrrkz */ |
| 112491 | VR512, VK32WM, VR512, |
| 112492 | /* VCVTW2PHZ128rm */ |
| 112493 | VR128X, i128mem, |
| 112494 | /* VCVTW2PHZ128rmb */ |
| 112495 | VR128X, i16mem, |
| 112496 | /* VCVTW2PHZ128rmbk */ |
| 112497 | VR128X, VR128X, VK8WM, i16mem, |
| 112498 | /* VCVTW2PHZ128rmbkz */ |
| 112499 | VR128X, VK8WM, i16mem, |
| 112500 | /* VCVTW2PHZ128rmk */ |
| 112501 | VR128X, VR128X, VK8WM, i128mem, |
| 112502 | /* VCVTW2PHZ128rmkz */ |
| 112503 | VR128X, VK8WM, i128mem, |
| 112504 | /* VCVTW2PHZ128rr */ |
| 112505 | VR128X, VR128X, |
| 112506 | /* VCVTW2PHZ128rrk */ |
| 112507 | VR128X, VR128X, VK8WM, VR128X, |
| 112508 | /* VCVTW2PHZ128rrkz */ |
| 112509 | VR128X, VK8WM, VR128X, |
| 112510 | /* VCVTW2PHZ256rm */ |
| 112511 | VR256X, i256mem, |
| 112512 | /* VCVTW2PHZ256rmb */ |
| 112513 | VR256X, i16mem, |
| 112514 | /* VCVTW2PHZ256rmbk */ |
| 112515 | VR256X, VR256X, VK16WM, i16mem, |
| 112516 | /* VCVTW2PHZ256rmbkz */ |
| 112517 | VR256X, VK16WM, i16mem, |
| 112518 | /* VCVTW2PHZ256rmk */ |
| 112519 | VR256X, VR256X, VK16WM, i256mem, |
| 112520 | /* VCVTW2PHZ256rmkz */ |
| 112521 | VR256X, VK16WM, i256mem, |
| 112522 | /* VCVTW2PHZ256rr */ |
| 112523 | VR256X, VR256X, |
| 112524 | /* VCVTW2PHZ256rrk */ |
| 112525 | VR256X, VR256X, VK16WM, VR256X, |
| 112526 | /* VCVTW2PHZ256rrkz */ |
| 112527 | VR256X, VK16WM, VR256X, |
| 112528 | /* VCVTW2PHZrm */ |
| 112529 | VR512, i512mem, |
| 112530 | /* VCVTW2PHZrmb */ |
| 112531 | VR512, i16mem, |
| 112532 | /* VCVTW2PHZrmbk */ |
| 112533 | VR512, VR512, VK32WM, i16mem, |
| 112534 | /* VCVTW2PHZrmbkz */ |
| 112535 | VR512, VK32WM, i16mem, |
| 112536 | /* VCVTW2PHZrmk */ |
| 112537 | VR512, VR512, VK32WM, i512mem, |
| 112538 | /* VCVTW2PHZrmkz */ |
| 112539 | VR512, VK32WM, i512mem, |
| 112540 | /* VCVTW2PHZrr */ |
| 112541 | VR512, VR512, |
| 112542 | /* VCVTW2PHZrrb */ |
| 112543 | VR512, VR512, AVX512RC, |
| 112544 | /* VCVTW2PHZrrbk */ |
| 112545 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 112546 | /* VCVTW2PHZrrbkz */ |
| 112547 | VR512, VK32WM, VR512, AVX512RC, |
| 112548 | /* VCVTW2PHZrrk */ |
| 112549 | VR512, VR512, VK32WM, VR512, |
| 112550 | /* VCVTW2PHZrrkz */ |
| 112551 | VR512, VK32WM, VR512, |
| 112552 | /* VDBPSADBWZ128rmi */ |
| 112553 | VR128X, VR128X, i128mem, u8imm, |
| 112554 | /* VDBPSADBWZ128rmik */ |
| 112555 | VR128X, VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 112556 | /* VDBPSADBWZ128rmikz */ |
| 112557 | VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 112558 | /* VDBPSADBWZ128rri */ |
| 112559 | VR128X, VR128X, VR128X, u8imm, |
| 112560 | /* VDBPSADBWZ128rrik */ |
| 112561 | VR128X, VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 112562 | /* VDBPSADBWZ128rrikz */ |
| 112563 | VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 112564 | /* VDBPSADBWZ256rmi */ |
| 112565 | VR256X, VR256X, i256mem, u8imm, |
| 112566 | /* VDBPSADBWZ256rmik */ |
| 112567 | VR256X, VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 112568 | /* VDBPSADBWZ256rmikz */ |
| 112569 | VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 112570 | /* VDBPSADBWZ256rri */ |
| 112571 | VR256X, VR256X, VR256X, u8imm, |
| 112572 | /* VDBPSADBWZ256rrik */ |
| 112573 | VR256X, VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 112574 | /* VDBPSADBWZ256rrikz */ |
| 112575 | VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 112576 | /* VDBPSADBWZrmi */ |
| 112577 | VR512, VR512, i512mem, u8imm, |
| 112578 | /* VDBPSADBWZrmik */ |
| 112579 | VR512, VR512, VK32WM, VR512, i512mem, u8imm, |
| 112580 | /* VDBPSADBWZrmikz */ |
| 112581 | VR512, VK32WM, VR512, i512mem, u8imm, |
| 112582 | /* VDBPSADBWZrri */ |
| 112583 | VR512, VR512, VR512, u8imm, |
| 112584 | /* VDBPSADBWZrrik */ |
| 112585 | VR512, VR512, VK32WM, VR512, VR512, u8imm, |
| 112586 | /* VDBPSADBWZrrikz */ |
| 112587 | VR512, VK32WM, VR512, VR512, u8imm, |
| 112588 | /* VDIVBF16Z128rm */ |
| 112589 | VR128X, VR128X, f128mem, |
| 112590 | /* VDIVBF16Z128rmb */ |
| 112591 | VR128X, VR128X, f16mem, |
| 112592 | /* VDIVBF16Z128rmbk */ |
| 112593 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 112594 | /* VDIVBF16Z128rmbkz */ |
| 112595 | VR128X, VK8WM, VR128X, f16mem, |
| 112596 | /* VDIVBF16Z128rmk */ |
| 112597 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 112598 | /* VDIVBF16Z128rmkz */ |
| 112599 | VR128X, VK8WM, VR128X, f128mem, |
| 112600 | /* VDIVBF16Z128rr */ |
| 112601 | VR128X, VR128X, VR128X, |
| 112602 | /* VDIVBF16Z128rrk */ |
| 112603 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 112604 | /* VDIVBF16Z128rrkz */ |
| 112605 | VR128X, VK8WM, VR128X, VR128X, |
| 112606 | /* VDIVBF16Z256rm */ |
| 112607 | VR256X, VR256X, f256mem, |
| 112608 | /* VDIVBF16Z256rmb */ |
| 112609 | VR256X, VR256X, f16mem, |
| 112610 | /* VDIVBF16Z256rmbk */ |
| 112611 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 112612 | /* VDIVBF16Z256rmbkz */ |
| 112613 | VR256X, VK16WM, VR256X, f16mem, |
| 112614 | /* VDIVBF16Z256rmk */ |
| 112615 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 112616 | /* VDIVBF16Z256rmkz */ |
| 112617 | VR256X, VK16WM, VR256X, f256mem, |
| 112618 | /* VDIVBF16Z256rr */ |
| 112619 | VR256X, VR256X, VR256X, |
| 112620 | /* VDIVBF16Z256rrk */ |
| 112621 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 112622 | /* VDIVBF16Z256rrkz */ |
| 112623 | VR256X, VK16WM, VR256X, VR256X, |
| 112624 | /* VDIVBF16Zrm */ |
| 112625 | VR512, VR512, f512mem, |
| 112626 | /* VDIVBF16Zrmb */ |
| 112627 | VR512, VR512, f16mem, |
| 112628 | /* VDIVBF16Zrmbk */ |
| 112629 | VR512, VR512, VK32WM, VR512, f16mem, |
| 112630 | /* VDIVBF16Zrmbkz */ |
| 112631 | VR512, VK32WM, VR512, f16mem, |
| 112632 | /* VDIVBF16Zrmk */ |
| 112633 | VR512, VR512, VK32WM, VR512, f512mem, |
| 112634 | /* VDIVBF16Zrmkz */ |
| 112635 | VR512, VK32WM, VR512, f512mem, |
| 112636 | /* VDIVBF16Zrr */ |
| 112637 | VR512, VR512, VR512, |
| 112638 | /* VDIVBF16Zrrk */ |
| 112639 | VR512, VR512, VK32WM, VR512, VR512, |
| 112640 | /* VDIVBF16Zrrkz */ |
| 112641 | VR512, VK32WM, VR512, VR512, |
| 112642 | /* VDIVPDYrm */ |
| 112643 | VR256, VR256, f256mem, |
| 112644 | /* VDIVPDYrr */ |
| 112645 | VR256, VR256, VR256, |
| 112646 | /* VDIVPDZ128rm */ |
| 112647 | VR128X, VR128X, f128mem, |
| 112648 | /* VDIVPDZ128rmb */ |
| 112649 | VR128X, VR128X, f64mem, |
| 112650 | /* VDIVPDZ128rmbk */ |
| 112651 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 112652 | /* VDIVPDZ128rmbkz */ |
| 112653 | VR128X, VK2WM, VR128X, f64mem, |
| 112654 | /* VDIVPDZ128rmk */ |
| 112655 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 112656 | /* VDIVPDZ128rmkz */ |
| 112657 | VR128X, VK2WM, VR128X, f128mem, |
| 112658 | /* VDIVPDZ128rr */ |
| 112659 | VR128X, VR128X, VR128X, |
| 112660 | /* VDIVPDZ128rrk */ |
| 112661 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 112662 | /* VDIVPDZ128rrkz */ |
| 112663 | VR128X, VK2WM, VR128X, VR128X, |
| 112664 | /* VDIVPDZ256rm */ |
| 112665 | VR256X, VR256X, f256mem, |
| 112666 | /* VDIVPDZ256rmb */ |
| 112667 | VR256X, VR256X, f64mem, |
| 112668 | /* VDIVPDZ256rmbk */ |
| 112669 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 112670 | /* VDIVPDZ256rmbkz */ |
| 112671 | VR256X, VK4WM, VR256X, f64mem, |
| 112672 | /* VDIVPDZ256rmk */ |
| 112673 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 112674 | /* VDIVPDZ256rmkz */ |
| 112675 | VR256X, VK4WM, VR256X, f256mem, |
| 112676 | /* VDIVPDZ256rr */ |
| 112677 | VR256X, VR256X, VR256X, |
| 112678 | /* VDIVPDZ256rrk */ |
| 112679 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 112680 | /* VDIVPDZ256rrkz */ |
| 112681 | VR256X, VK4WM, VR256X, VR256X, |
| 112682 | /* VDIVPDZrm */ |
| 112683 | VR512, VR512, f512mem, |
| 112684 | /* VDIVPDZrmb */ |
| 112685 | VR512, VR512, f64mem, |
| 112686 | /* VDIVPDZrmbk */ |
| 112687 | VR512, VR512, VK8WM, VR512, f64mem, |
| 112688 | /* VDIVPDZrmbkz */ |
| 112689 | VR512, VK8WM, VR512, f64mem, |
| 112690 | /* VDIVPDZrmk */ |
| 112691 | VR512, VR512, VK8WM, VR512, f512mem, |
| 112692 | /* VDIVPDZrmkz */ |
| 112693 | VR512, VK8WM, VR512, f512mem, |
| 112694 | /* VDIVPDZrr */ |
| 112695 | VR512, VR512, VR512, |
| 112696 | /* VDIVPDZrrb */ |
| 112697 | VR512, VR512, VR512, AVX512RC, |
| 112698 | /* VDIVPDZrrbk */ |
| 112699 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 112700 | /* VDIVPDZrrbkz */ |
| 112701 | VR512, VK8WM, VR512, VR512, AVX512RC, |
| 112702 | /* VDIVPDZrrk */ |
| 112703 | VR512, VR512, VK8WM, VR512, VR512, |
| 112704 | /* VDIVPDZrrkz */ |
| 112705 | VR512, VK8WM, VR512, VR512, |
| 112706 | /* VDIVPDrm */ |
| 112707 | VR128, VR128, f128mem, |
| 112708 | /* VDIVPDrr */ |
| 112709 | VR128, VR128, VR128, |
| 112710 | /* VDIVPHZ128rm */ |
| 112711 | VR128X, VR128X, f128mem, |
| 112712 | /* VDIVPHZ128rmb */ |
| 112713 | VR128X, VR128X, f16mem, |
| 112714 | /* VDIVPHZ128rmbk */ |
| 112715 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 112716 | /* VDIVPHZ128rmbkz */ |
| 112717 | VR128X, VK8WM, VR128X, f16mem, |
| 112718 | /* VDIVPHZ128rmk */ |
| 112719 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 112720 | /* VDIVPHZ128rmkz */ |
| 112721 | VR128X, VK8WM, VR128X, f128mem, |
| 112722 | /* VDIVPHZ128rr */ |
| 112723 | VR128X, VR128X, VR128X, |
| 112724 | /* VDIVPHZ128rrk */ |
| 112725 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 112726 | /* VDIVPHZ128rrkz */ |
| 112727 | VR128X, VK8WM, VR128X, VR128X, |
| 112728 | /* VDIVPHZ256rm */ |
| 112729 | VR256X, VR256X, f256mem, |
| 112730 | /* VDIVPHZ256rmb */ |
| 112731 | VR256X, VR256X, f16mem, |
| 112732 | /* VDIVPHZ256rmbk */ |
| 112733 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 112734 | /* VDIVPHZ256rmbkz */ |
| 112735 | VR256X, VK16WM, VR256X, f16mem, |
| 112736 | /* VDIVPHZ256rmk */ |
| 112737 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 112738 | /* VDIVPHZ256rmkz */ |
| 112739 | VR256X, VK16WM, VR256X, f256mem, |
| 112740 | /* VDIVPHZ256rr */ |
| 112741 | VR256X, VR256X, VR256X, |
| 112742 | /* VDIVPHZ256rrk */ |
| 112743 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 112744 | /* VDIVPHZ256rrkz */ |
| 112745 | VR256X, VK16WM, VR256X, VR256X, |
| 112746 | /* VDIVPHZrm */ |
| 112747 | VR512, VR512, f512mem, |
| 112748 | /* VDIVPHZrmb */ |
| 112749 | VR512, VR512, f16mem, |
| 112750 | /* VDIVPHZrmbk */ |
| 112751 | VR512, VR512, VK32WM, VR512, f16mem, |
| 112752 | /* VDIVPHZrmbkz */ |
| 112753 | VR512, VK32WM, VR512, f16mem, |
| 112754 | /* VDIVPHZrmk */ |
| 112755 | VR512, VR512, VK32WM, VR512, f512mem, |
| 112756 | /* VDIVPHZrmkz */ |
| 112757 | VR512, VK32WM, VR512, f512mem, |
| 112758 | /* VDIVPHZrr */ |
| 112759 | VR512, VR512, VR512, |
| 112760 | /* VDIVPHZrrb */ |
| 112761 | VR512, VR512, VR512, AVX512RC, |
| 112762 | /* VDIVPHZrrbk */ |
| 112763 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 112764 | /* VDIVPHZrrbkz */ |
| 112765 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 112766 | /* VDIVPHZrrk */ |
| 112767 | VR512, VR512, VK32WM, VR512, VR512, |
| 112768 | /* VDIVPHZrrkz */ |
| 112769 | VR512, VK32WM, VR512, VR512, |
| 112770 | /* VDIVPSYrm */ |
| 112771 | VR256, VR256, f256mem, |
| 112772 | /* VDIVPSYrr */ |
| 112773 | VR256, VR256, VR256, |
| 112774 | /* VDIVPSZ128rm */ |
| 112775 | VR128X, VR128X, f128mem, |
| 112776 | /* VDIVPSZ128rmb */ |
| 112777 | VR128X, VR128X, f32mem, |
| 112778 | /* VDIVPSZ128rmbk */ |
| 112779 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 112780 | /* VDIVPSZ128rmbkz */ |
| 112781 | VR128X, VK4WM, VR128X, f32mem, |
| 112782 | /* VDIVPSZ128rmk */ |
| 112783 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 112784 | /* VDIVPSZ128rmkz */ |
| 112785 | VR128X, VK4WM, VR128X, f128mem, |
| 112786 | /* VDIVPSZ128rr */ |
| 112787 | VR128X, VR128X, VR128X, |
| 112788 | /* VDIVPSZ128rrk */ |
| 112789 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 112790 | /* VDIVPSZ128rrkz */ |
| 112791 | VR128X, VK4WM, VR128X, VR128X, |
| 112792 | /* VDIVPSZ256rm */ |
| 112793 | VR256X, VR256X, f256mem, |
| 112794 | /* VDIVPSZ256rmb */ |
| 112795 | VR256X, VR256X, f32mem, |
| 112796 | /* VDIVPSZ256rmbk */ |
| 112797 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 112798 | /* VDIVPSZ256rmbkz */ |
| 112799 | VR256X, VK8WM, VR256X, f32mem, |
| 112800 | /* VDIVPSZ256rmk */ |
| 112801 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 112802 | /* VDIVPSZ256rmkz */ |
| 112803 | VR256X, VK8WM, VR256X, f256mem, |
| 112804 | /* VDIVPSZ256rr */ |
| 112805 | VR256X, VR256X, VR256X, |
| 112806 | /* VDIVPSZ256rrk */ |
| 112807 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 112808 | /* VDIVPSZ256rrkz */ |
| 112809 | VR256X, VK8WM, VR256X, VR256X, |
| 112810 | /* VDIVPSZrm */ |
| 112811 | VR512, VR512, f512mem, |
| 112812 | /* VDIVPSZrmb */ |
| 112813 | VR512, VR512, f32mem, |
| 112814 | /* VDIVPSZrmbk */ |
| 112815 | VR512, VR512, VK16WM, VR512, f32mem, |
| 112816 | /* VDIVPSZrmbkz */ |
| 112817 | VR512, VK16WM, VR512, f32mem, |
| 112818 | /* VDIVPSZrmk */ |
| 112819 | VR512, VR512, VK16WM, VR512, f512mem, |
| 112820 | /* VDIVPSZrmkz */ |
| 112821 | VR512, VK16WM, VR512, f512mem, |
| 112822 | /* VDIVPSZrr */ |
| 112823 | VR512, VR512, VR512, |
| 112824 | /* VDIVPSZrrb */ |
| 112825 | VR512, VR512, VR512, AVX512RC, |
| 112826 | /* VDIVPSZrrbk */ |
| 112827 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 112828 | /* VDIVPSZrrbkz */ |
| 112829 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 112830 | /* VDIVPSZrrk */ |
| 112831 | VR512, VR512, VK16WM, VR512, VR512, |
| 112832 | /* VDIVPSZrrkz */ |
| 112833 | VR512, VK16WM, VR512, VR512, |
| 112834 | /* VDIVPSrm */ |
| 112835 | VR128, VR128, f128mem, |
| 112836 | /* VDIVPSrr */ |
| 112837 | VR128, VR128, VR128, |
| 112838 | /* VDIVSDZrm */ |
| 112839 | FR64X, FR64X, f64mem, |
| 112840 | /* VDIVSDZrm_Int */ |
| 112841 | VR128X, VR128X, sdmem, |
| 112842 | /* VDIVSDZrmk_Int */ |
| 112843 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 112844 | /* VDIVSDZrmkz_Int */ |
| 112845 | VR128X, VK1WM, VR128X, sdmem, |
| 112846 | /* VDIVSDZrr */ |
| 112847 | FR64X, FR64X, FR64X, |
| 112848 | /* VDIVSDZrr_Int */ |
| 112849 | VR128X, VR128X, VR128X, |
| 112850 | /* VDIVSDZrrb_Int */ |
| 112851 | VR128X, VR128X, VR128X, AVX512RC, |
| 112852 | /* VDIVSDZrrbk_Int */ |
| 112853 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 112854 | /* VDIVSDZrrbkz_Int */ |
| 112855 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 112856 | /* VDIVSDZrrk_Int */ |
| 112857 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 112858 | /* VDIVSDZrrkz_Int */ |
| 112859 | VR128X, VK1WM, VR128X, VR128X, |
| 112860 | /* VDIVSDrm */ |
| 112861 | FR64, FR64, f64mem, |
| 112862 | /* VDIVSDrm_Int */ |
| 112863 | VR128, VR128, sdmem, |
| 112864 | /* VDIVSDrr */ |
| 112865 | FR64, FR64, FR64, |
| 112866 | /* VDIVSDrr_Int */ |
| 112867 | VR128, VR128, VR128, |
| 112868 | /* VDIVSHZrm */ |
| 112869 | FR16X, FR16X, f16mem, |
| 112870 | /* VDIVSHZrm_Int */ |
| 112871 | VR128X, VR128X, shmem, |
| 112872 | /* VDIVSHZrmk_Int */ |
| 112873 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 112874 | /* VDIVSHZrmkz_Int */ |
| 112875 | VR128X, VK1WM, VR128X, shmem, |
| 112876 | /* VDIVSHZrr */ |
| 112877 | FR16X, FR16X, FR16X, |
| 112878 | /* VDIVSHZrr_Int */ |
| 112879 | VR128X, VR128X, VR128X, |
| 112880 | /* VDIVSHZrrb_Int */ |
| 112881 | VR128X, VR128X, VR128X, AVX512RC, |
| 112882 | /* VDIVSHZrrbk_Int */ |
| 112883 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 112884 | /* VDIVSHZrrbkz_Int */ |
| 112885 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 112886 | /* VDIVSHZrrk_Int */ |
| 112887 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 112888 | /* VDIVSHZrrkz_Int */ |
| 112889 | VR128X, VK1WM, VR128X, VR128X, |
| 112890 | /* VDIVSSZrm */ |
| 112891 | FR32X, FR32X, f32mem, |
| 112892 | /* VDIVSSZrm_Int */ |
| 112893 | VR128X, VR128X, ssmem, |
| 112894 | /* VDIVSSZrmk_Int */ |
| 112895 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 112896 | /* VDIVSSZrmkz_Int */ |
| 112897 | VR128X, VK1WM, VR128X, ssmem, |
| 112898 | /* VDIVSSZrr */ |
| 112899 | FR32X, FR32X, FR32X, |
| 112900 | /* VDIVSSZrr_Int */ |
| 112901 | VR128X, VR128X, VR128X, |
| 112902 | /* VDIVSSZrrb_Int */ |
| 112903 | VR128X, VR128X, VR128X, AVX512RC, |
| 112904 | /* VDIVSSZrrbk_Int */ |
| 112905 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 112906 | /* VDIVSSZrrbkz_Int */ |
| 112907 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 112908 | /* VDIVSSZrrk_Int */ |
| 112909 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 112910 | /* VDIVSSZrrkz_Int */ |
| 112911 | VR128X, VK1WM, VR128X, VR128X, |
| 112912 | /* VDIVSSrm */ |
| 112913 | FR32, FR32, f32mem, |
| 112914 | /* VDIVSSrm_Int */ |
| 112915 | VR128, VR128, ssmem, |
| 112916 | /* VDIVSSrr */ |
| 112917 | FR32, FR32, FR32, |
| 112918 | /* VDIVSSrr_Int */ |
| 112919 | VR128, VR128, VR128, |
| 112920 | /* VDPBF16PSZ128m */ |
| 112921 | VR128X, VR128X, VR128X, f128mem, |
| 112922 | /* VDPBF16PSZ128mb */ |
| 112923 | VR128X, VR128X, VR128X, f32mem, |
| 112924 | /* VDPBF16PSZ128mbk */ |
| 112925 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 112926 | /* VDPBF16PSZ128mbkz */ |
| 112927 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 112928 | /* VDPBF16PSZ128mk */ |
| 112929 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 112930 | /* VDPBF16PSZ128mkz */ |
| 112931 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 112932 | /* VDPBF16PSZ128r */ |
| 112933 | VR128X, VR128X, VR128X, VR128X, |
| 112934 | /* VDPBF16PSZ128rk */ |
| 112935 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 112936 | /* VDPBF16PSZ128rkz */ |
| 112937 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 112938 | /* VDPBF16PSZ256m */ |
| 112939 | VR256X, VR256X, VR256X, f256mem, |
| 112940 | /* VDPBF16PSZ256mb */ |
| 112941 | VR256X, VR256X, VR256X, f32mem, |
| 112942 | /* VDPBF16PSZ256mbk */ |
| 112943 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 112944 | /* VDPBF16PSZ256mbkz */ |
| 112945 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 112946 | /* VDPBF16PSZ256mk */ |
| 112947 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 112948 | /* VDPBF16PSZ256mkz */ |
| 112949 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 112950 | /* VDPBF16PSZ256r */ |
| 112951 | VR256X, VR256X, VR256X, VR256X, |
| 112952 | /* VDPBF16PSZ256rk */ |
| 112953 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 112954 | /* VDPBF16PSZ256rkz */ |
| 112955 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 112956 | /* VDPBF16PSZm */ |
| 112957 | VR512, VR512, VR512, f512mem, |
| 112958 | /* VDPBF16PSZmb */ |
| 112959 | VR512, VR512, VR512, f32mem, |
| 112960 | /* VDPBF16PSZmbk */ |
| 112961 | VR512, VR512, VK16WM, VR512, f32mem, |
| 112962 | /* VDPBF16PSZmbkz */ |
| 112963 | VR512, VR512, VK16WM, VR512, f32mem, |
| 112964 | /* VDPBF16PSZmk */ |
| 112965 | VR512, VR512, VK16WM, VR512, f512mem, |
| 112966 | /* VDPBF16PSZmkz */ |
| 112967 | VR512, VR512, VK16WM, VR512, f512mem, |
| 112968 | /* VDPBF16PSZr */ |
| 112969 | VR512, VR512, VR512, VR512, |
| 112970 | /* VDPBF16PSZrk */ |
| 112971 | VR512, VR512, VK16WM, VR512, VR512, |
| 112972 | /* VDPBF16PSZrkz */ |
| 112973 | VR512, VR512, VK16WM, VR512, VR512, |
| 112974 | /* VDPPDrmi */ |
| 112975 | VR128, VR128, f128mem, u8imm, |
| 112976 | /* VDPPDrri */ |
| 112977 | VR128, VR128, VR128, u8imm, |
| 112978 | /* VDPPHPSZ128m */ |
| 112979 | VR128X, VR128X, VR128X, f128mem, |
| 112980 | /* VDPPHPSZ128mb */ |
| 112981 | VR128X, VR128X, VR128X, f32mem, |
| 112982 | /* VDPPHPSZ128mbk */ |
| 112983 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 112984 | /* VDPPHPSZ128mbkz */ |
| 112985 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 112986 | /* VDPPHPSZ128mk */ |
| 112987 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 112988 | /* VDPPHPSZ128mkz */ |
| 112989 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 112990 | /* VDPPHPSZ128r */ |
| 112991 | VR128X, VR128X, VR128X, VR128X, |
| 112992 | /* VDPPHPSZ128rk */ |
| 112993 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 112994 | /* VDPPHPSZ128rkz */ |
| 112995 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 112996 | /* VDPPHPSZ256m */ |
| 112997 | VR256X, VR256X, VR256X, f256mem, |
| 112998 | /* VDPPHPSZ256mb */ |
| 112999 | VR256X, VR256X, VR256X, f32mem, |
| 113000 | /* VDPPHPSZ256mbk */ |
| 113001 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 113002 | /* VDPPHPSZ256mbkz */ |
| 113003 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 113004 | /* VDPPHPSZ256mk */ |
| 113005 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 113006 | /* VDPPHPSZ256mkz */ |
| 113007 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 113008 | /* VDPPHPSZ256r */ |
| 113009 | VR256X, VR256X, VR256X, VR256X, |
| 113010 | /* VDPPHPSZ256rk */ |
| 113011 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 113012 | /* VDPPHPSZ256rkz */ |
| 113013 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 113014 | /* VDPPHPSZm */ |
| 113015 | VR512, VR512, VR512, f512mem, |
| 113016 | /* VDPPHPSZmb */ |
| 113017 | VR512, VR512, VR512, f32mem, |
| 113018 | /* VDPPHPSZmbk */ |
| 113019 | VR512, VR512, VK16WM, VR512, f32mem, |
| 113020 | /* VDPPHPSZmbkz */ |
| 113021 | VR512, VR512, VK16WM, VR512, f32mem, |
| 113022 | /* VDPPHPSZmk */ |
| 113023 | VR512, VR512, VK16WM, VR512, f512mem, |
| 113024 | /* VDPPHPSZmkz */ |
| 113025 | VR512, VR512, VK16WM, VR512, f512mem, |
| 113026 | /* VDPPHPSZr */ |
| 113027 | VR512, VR512, VR512, VR512, |
| 113028 | /* VDPPHPSZrk */ |
| 113029 | VR512, VR512, VK16WM, VR512, VR512, |
| 113030 | /* VDPPHPSZrkz */ |
| 113031 | VR512, VR512, VK16WM, VR512, VR512, |
| 113032 | /* VDPPSYrmi */ |
| 113033 | VR256, VR256, i256mem, u8imm, |
| 113034 | /* VDPPSYrri */ |
| 113035 | VR256, VR256, VR256, u8imm, |
| 113036 | /* VDPPSrmi */ |
| 113037 | VR128, VR128, f128mem, u8imm, |
| 113038 | /* VDPPSrri */ |
| 113039 | VR128, VR128, VR128, u8imm, |
| 113040 | /* VERRm */ |
| 113041 | i16mem, |
| 113042 | /* VERRr */ |
| 113043 | GR16, |
| 113044 | /* VERWm */ |
| 113045 | i16mem, |
| 113046 | /* VERWr */ |
| 113047 | GR16, |
| 113048 | /* VEXP2PDZm */ |
| 113049 | VR512, f512mem, |
| 113050 | /* VEXP2PDZmb */ |
| 113051 | VR512, f64mem, |
| 113052 | /* VEXP2PDZmbk */ |
| 113053 | VR512, VR512, VK8WM, f64mem, |
| 113054 | /* VEXP2PDZmbkz */ |
| 113055 | VR512, VK8WM, f64mem, |
| 113056 | /* VEXP2PDZmk */ |
| 113057 | VR512, VR512, VK8WM, f512mem, |
| 113058 | /* VEXP2PDZmkz */ |
| 113059 | VR512, VK8WM, f512mem, |
| 113060 | /* VEXP2PDZr */ |
| 113061 | VR512, VR512, |
| 113062 | /* VEXP2PDZrb */ |
| 113063 | VR512, VR512, |
| 113064 | /* VEXP2PDZrbk */ |
| 113065 | VR512, VR512, VK8WM, VR512, |
| 113066 | /* VEXP2PDZrbkz */ |
| 113067 | VR512, VK8WM, VR512, |
| 113068 | /* VEXP2PDZrk */ |
| 113069 | VR512, VR512, VK8WM, VR512, |
| 113070 | /* VEXP2PDZrkz */ |
| 113071 | VR512, VK8WM, VR512, |
| 113072 | /* VEXP2PSZm */ |
| 113073 | VR512, f512mem, |
| 113074 | /* VEXP2PSZmb */ |
| 113075 | VR512, f32mem, |
| 113076 | /* VEXP2PSZmbk */ |
| 113077 | VR512, VR512, VK16WM, f32mem, |
| 113078 | /* VEXP2PSZmbkz */ |
| 113079 | VR512, VK16WM, f32mem, |
| 113080 | /* VEXP2PSZmk */ |
| 113081 | VR512, VR512, VK16WM, f512mem, |
| 113082 | /* VEXP2PSZmkz */ |
| 113083 | VR512, VK16WM, f512mem, |
| 113084 | /* VEXP2PSZr */ |
| 113085 | VR512, VR512, |
| 113086 | /* VEXP2PSZrb */ |
| 113087 | VR512, VR512, |
| 113088 | /* VEXP2PSZrbk */ |
| 113089 | VR512, VR512, VK16WM, VR512, |
| 113090 | /* VEXP2PSZrbkz */ |
| 113091 | VR512, VK16WM, VR512, |
| 113092 | /* VEXP2PSZrk */ |
| 113093 | VR512, VR512, VK16WM, VR512, |
| 113094 | /* VEXP2PSZrkz */ |
| 113095 | VR512, VK16WM, VR512, |
| 113096 | /* VEXPANDPDZ128rm */ |
| 113097 | VR128X, f128mem, |
| 113098 | /* VEXPANDPDZ128rmk */ |
| 113099 | VR128X, VR128X, VK2WM, f128mem, |
| 113100 | /* VEXPANDPDZ128rmkz */ |
| 113101 | VR128X, VK2WM, f128mem, |
| 113102 | /* VEXPANDPDZ128rr */ |
| 113103 | VR128X, VR128X, |
| 113104 | /* VEXPANDPDZ128rrk */ |
| 113105 | VR128X, VR128X, VK2WM, VR128X, |
| 113106 | /* VEXPANDPDZ128rrkz */ |
| 113107 | VR128X, VK2WM, VR128X, |
| 113108 | /* VEXPANDPDZ256rm */ |
| 113109 | VR256X, f256mem, |
| 113110 | /* VEXPANDPDZ256rmk */ |
| 113111 | VR256X, VR256X, VK4WM, f256mem, |
| 113112 | /* VEXPANDPDZ256rmkz */ |
| 113113 | VR256X, VK4WM, f256mem, |
| 113114 | /* VEXPANDPDZ256rr */ |
| 113115 | VR256X, VR256X, |
| 113116 | /* VEXPANDPDZ256rrk */ |
| 113117 | VR256X, VR256X, VK4WM, VR256X, |
| 113118 | /* VEXPANDPDZ256rrkz */ |
| 113119 | VR256X, VK4WM, VR256X, |
| 113120 | /* VEXPANDPDZrm */ |
| 113121 | VR512, f512mem, |
| 113122 | /* VEXPANDPDZrmk */ |
| 113123 | VR512, VR512, VK8WM, f512mem, |
| 113124 | /* VEXPANDPDZrmkz */ |
| 113125 | VR512, VK8WM, f512mem, |
| 113126 | /* VEXPANDPDZrr */ |
| 113127 | VR512, VR512, |
| 113128 | /* VEXPANDPDZrrk */ |
| 113129 | VR512, VR512, VK8WM, VR512, |
| 113130 | /* VEXPANDPDZrrkz */ |
| 113131 | VR512, VK8WM, VR512, |
| 113132 | /* VEXPANDPSZ128rm */ |
| 113133 | VR128X, f128mem, |
| 113134 | /* VEXPANDPSZ128rmk */ |
| 113135 | VR128X, VR128X, VK4WM, f128mem, |
| 113136 | /* VEXPANDPSZ128rmkz */ |
| 113137 | VR128X, VK4WM, f128mem, |
| 113138 | /* VEXPANDPSZ128rr */ |
| 113139 | VR128X, VR128X, |
| 113140 | /* VEXPANDPSZ128rrk */ |
| 113141 | VR128X, VR128X, VK4WM, VR128X, |
| 113142 | /* VEXPANDPSZ128rrkz */ |
| 113143 | VR128X, VK4WM, VR128X, |
| 113144 | /* VEXPANDPSZ256rm */ |
| 113145 | VR256X, f256mem, |
| 113146 | /* VEXPANDPSZ256rmk */ |
| 113147 | VR256X, VR256X, VK8WM, f256mem, |
| 113148 | /* VEXPANDPSZ256rmkz */ |
| 113149 | VR256X, VK8WM, f256mem, |
| 113150 | /* VEXPANDPSZ256rr */ |
| 113151 | VR256X, VR256X, |
| 113152 | /* VEXPANDPSZ256rrk */ |
| 113153 | VR256X, VR256X, VK8WM, VR256X, |
| 113154 | /* VEXPANDPSZ256rrkz */ |
| 113155 | VR256X, VK8WM, VR256X, |
| 113156 | /* VEXPANDPSZrm */ |
| 113157 | VR512, f512mem, |
| 113158 | /* VEXPANDPSZrmk */ |
| 113159 | VR512, VR512, VK16WM, f512mem, |
| 113160 | /* VEXPANDPSZrmkz */ |
| 113161 | VR512, VK16WM, f512mem, |
| 113162 | /* VEXPANDPSZrr */ |
| 113163 | VR512, VR512, |
| 113164 | /* VEXPANDPSZrrk */ |
| 113165 | VR512, VR512, VK16WM, VR512, |
| 113166 | /* VEXPANDPSZrrkz */ |
| 113167 | VR512, VK16WM, VR512, |
| 113168 | /* VEXTRACTF128mri */ |
| 113169 | f128mem, VR256, u8imm, |
| 113170 | /* VEXTRACTF128rri */ |
| 113171 | VR128, VR256, u8imm, |
| 113172 | /* VEXTRACTF32X4Z256mri */ |
| 113173 | f128mem, VR256X, u8imm, |
| 113174 | /* VEXTRACTF32X4Z256mrik */ |
| 113175 | f128mem, VK4WM, VR256X, u8imm, |
| 113176 | /* VEXTRACTF32X4Z256rri */ |
| 113177 | VR128X, VR256X, u8imm, |
| 113178 | /* VEXTRACTF32X4Z256rrik */ |
| 113179 | VR128X, VR128X, VK4WM, VR256X, u8imm, |
| 113180 | /* VEXTRACTF32X4Z256rrikz */ |
| 113181 | VR128X, VK4WM, VR256X, u8imm, |
| 113182 | /* VEXTRACTF32X4Zmri */ |
| 113183 | f128mem, VR512, u8imm, |
| 113184 | /* VEXTRACTF32X4Zmrik */ |
| 113185 | f128mem, VK4WM, VR512, u8imm, |
| 113186 | /* VEXTRACTF32X4Zrri */ |
| 113187 | VR128X, VR512, u8imm, |
| 113188 | /* VEXTRACTF32X4Zrrik */ |
| 113189 | VR128X, VR128X, VK4WM, VR512, u8imm, |
| 113190 | /* VEXTRACTF32X4Zrrikz */ |
| 113191 | VR128X, VK4WM, VR512, u8imm, |
| 113192 | /* VEXTRACTF32X8Zmri */ |
| 113193 | f256mem, VR512, u8imm, |
| 113194 | /* VEXTRACTF32X8Zmrik */ |
| 113195 | f256mem, VK8WM, VR512, u8imm, |
| 113196 | /* VEXTRACTF32X8Zrri */ |
| 113197 | VR256X, VR512, u8imm, |
| 113198 | /* VEXTRACTF32X8Zrrik */ |
| 113199 | VR256X, VR256X, VK8WM, VR512, u8imm, |
| 113200 | /* VEXTRACTF32X8Zrrikz */ |
| 113201 | VR256X, VK8WM, VR512, u8imm, |
| 113202 | /* VEXTRACTF64X2Z256mri */ |
| 113203 | f128mem, VR256X, u8imm, |
| 113204 | /* VEXTRACTF64X2Z256mrik */ |
| 113205 | f128mem, VK2WM, VR256X, u8imm, |
| 113206 | /* VEXTRACTF64X2Z256rri */ |
| 113207 | VR128X, VR256X, u8imm, |
| 113208 | /* VEXTRACTF64X2Z256rrik */ |
| 113209 | VR128X, VR128X, VK2WM, VR256X, u8imm, |
| 113210 | /* VEXTRACTF64X2Z256rrikz */ |
| 113211 | VR128X, VK2WM, VR256X, u8imm, |
| 113212 | /* VEXTRACTF64X2Zmri */ |
| 113213 | f128mem, VR512, u8imm, |
| 113214 | /* VEXTRACTF64X2Zmrik */ |
| 113215 | f128mem, VK2WM, VR512, u8imm, |
| 113216 | /* VEXTRACTF64X2Zrri */ |
| 113217 | VR128X, VR512, u8imm, |
| 113218 | /* VEXTRACTF64X2Zrrik */ |
| 113219 | VR128X, VR128X, VK2WM, VR512, u8imm, |
| 113220 | /* VEXTRACTF64X2Zrrikz */ |
| 113221 | VR128X, VK2WM, VR512, u8imm, |
| 113222 | /* VEXTRACTF64X4Zmri */ |
| 113223 | f256mem, VR512, u8imm, |
| 113224 | /* VEXTRACTF64X4Zmrik */ |
| 113225 | f256mem, VK4WM, VR512, u8imm, |
| 113226 | /* VEXTRACTF64X4Zrri */ |
| 113227 | VR256X, VR512, u8imm, |
| 113228 | /* VEXTRACTF64X4Zrrik */ |
| 113229 | VR256X, VR256X, VK4WM, VR512, u8imm, |
| 113230 | /* VEXTRACTF64X4Zrrikz */ |
| 113231 | VR256X, VK4WM, VR512, u8imm, |
| 113232 | /* VEXTRACTI128mri */ |
| 113233 | i128mem, VR256, u8imm, |
| 113234 | /* VEXTRACTI128rri */ |
| 113235 | VR128, VR256, u8imm, |
| 113236 | /* VEXTRACTI32X4Z256mri */ |
| 113237 | i128mem, VR256X, u8imm, |
| 113238 | /* VEXTRACTI32X4Z256mrik */ |
| 113239 | i128mem, VK4WM, VR256X, u8imm, |
| 113240 | /* VEXTRACTI32X4Z256rri */ |
| 113241 | VR128X, VR256X, u8imm, |
| 113242 | /* VEXTRACTI32X4Z256rrik */ |
| 113243 | VR128X, VR128X, VK4WM, VR256X, u8imm, |
| 113244 | /* VEXTRACTI32X4Z256rrikz */ |
| 113245 | VR128X, VK4WM, VR256X, u8imm, |
| 113246 | /* VEXTRACTI32X4Zmri */ |
| 113247 | i128mem, VR512, u8imm, |
| 113248 | /* VEXTRACTI32X4Zmrik */ |
| 113249 | i128mem, VK4WM, VR512, u8imm, |
| 113250 | /* VEXTRACTI32X4Zrri */ |
| 113251 | VR128X, VR512, u8imm, |
| 113252 | /* VEXTRACTI32X4Zrrik */ |
| 113253 | VR128X, VR128X, VK4WM, VR512, u8imm, |
| 113254 | /* VEXTRACTI32X4Zrrikz */ |
| 113255 | VR128X, VK4WM, VR512, u8imm, |
| 113256 | /* VEXTRACTI32X8Zmri */ |
| 113257 | i256mem, VR512, u8imm, |
| 113258 | /* VEXTRACTI32X8Zmrik */ |
| 113259 | i256mem, VK8WM, VR512, u8imm, |
| 113260 | /* VEXTRACTI32X8Zrri */ |
| 113261 | VR256X, VR512, u8imm, |
| 113262 | /* VEXTRACTI32X8Zrrik */ |
| 113263 | VR256X, VR256X, VK8WM, VR512, u8imm, |
| 113264 | /* VEXTRACTI32X8Zrrikz */ |
| 113265 | VR256X, VK8WM, VR512, u8imm, |
| 113266 | /* VEXTRACTI64X2Z256mri */ |
| 113267 | i128mem, VR256X, u8imm, |
| 113268 | /* VEXTRACTI64X2Z256mrik */ |
| 113269 | i128mem, VK2WM, VR256X, u8imm, |
| 113270 | /* VEXTRACTI64X2Z256rri */ |
| 113271 | VR128X, VR256X, u8imm, |
| 113272 | /* VEXTRACTI64X2Z256rrik */ |
| 113273 | VR128X, VR128X, VK2WM, VR256X, u8imm, |
| 113274 | /* VEXTRACTI64X2Z256rrikz */ |
| 113275 | VR128X, VK2WM, VR256X, u8imm, |
| 113276 | /* VEXTRACTI64X2Zmri */ |
| 113277 | i128mem, VR512, u8imm, |
| 113278 | /* VEXTRACTI64X2Zmrik */ |
| 113279 | i128mem, VK2WM, VR512, u8imm, |
| 113280 | /* VEXTRACTI64X2Zrri */ |
| 113281 | VR128X, VR512, u8imm, |
| 113282 | /* VEXTRACTI64X2Zrrik */ |
| 113283 | VR128X, VR128X, VK2WM, VR512, u8imm, |
| 113284 | /* VEXTRACTI64X2Zrrikz */ |
| 113285 | VR128X, VK2WM, VR512, u8imm, |
| 113286 | /* VEXTRACTI64X4Zmri */ |
| 113287 | i256mem, VR512, u8imm, |
| 113288 | /* VEXTRACTI64X4Zmrik */ |
| 113289 | i256mem, VK4WM, VR512, u8imm, |
| 113290 | /* VEXTRACTI64X4Zrri */ |
| 113291 | VR256X, VR512, u8imm, |
| 113292 | /* VEXTRACTI64X4Zrrik */ |
| 113293 | VR256X, VR256X, VK4WM, VR512, u8imm, |
| 113294 | /* VEXTRACTI64X4Zrrikz */ |
| 113295 | VR256X, VK4WM, VR512, u8imm, |
| 113296 | /* VEXTRACTPSZmri */ |
| 113297 | f32mem, VR128X, u8imm, |
| 113298 | /* VEXTRACTPSZrri */ |
| 113299 | GR32orGR64, VR128X, u8imm, |
| 113300 | /* VEXTRACTPSmri */ |
| 113301 | f32mem, VR128, u8imm, |
| 113302 | /* VEXTRACTPSrri */ |
| 113303 | GR32orGR64, VR128, u8imm, |
| 113304 | /* VFCMADDCPHZ128m */ |
| 113305 | VR128X, VR128X, VR128X, f128mem, |
| 113306 | /* VFCMADDCPHZ128mb */ |
| 113307 | VR128X, VR128X, VR128X, f32mem, |
| 113308 | /* VFCMADDCPHZ128mbk */ |
| 113309 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 113310 | /* VFCMADDCPHZ128mbkz */ |
| 113311 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 113312 | /* VFCMADDCPHZ128mk */ |
| 113313 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 113314 | /* VFCMADDCPHZ128mkz */ |
| 113315 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 113316 | /* VFCMADDCPHZ128r */ |
| 113317 | VR128X, VR128X, VR128X, VR128X, |
| 113318 | /* VFCMADDCPHZ128rk */ |
| 113319 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 113320 | /* VFCMADDCPHZ128rkz */ |
| 113321 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 113322 | /* VFCMADDCPHZ256m */ |
| 113323 | VR256X, VR256X, VR256X, f256mem, |
| 113324 | /* VFCMADDCPHZ256mb */ |
| 113325 | VR256X, VR256X, VR256X, f32mem, |
| 113326 | /* VFCMADDCPHZ256mbk */ |
| 113327 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 113328 | /* VFCMADDCPHZ256mbkz */ |
| 113329 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 113330 | /* VFCMADDCPHZ256mk */ |
| 113331 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 113332 | /* VFCMADDCPHZ256mkz */ |
| 113333 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 113334 | /* VFCMADDCPHZ256r */ |
| 113335 | VR256X, VR256X, VR256X, VR256X, |
| 113336 | /* VFCMADDCPHZ256rk */ |
| 113337 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 113338 | /* VFCMADDCPHZ256rkz */ |
| 113339 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 113340 | /* VFCMADDCPHZm */ |
| 113341 | VR512, VR512, VR512, f512mem, |
| 113342 | /* VFCMADDCPHZmb */ |
| 113343 | VR512, VR512, VR512, f32mem, |
| 113344 | /* VFCMADDCPHZmbk */ |
| 113345 | VR512, VR512, VK16WM, VR512, f32mem, |
| 113346 | /* VFCMADDCPHZmbkz */ |
| 113347 | VR512, VR512, VK16WM, VR512, f32mem, |
| 113348 | /* VFCMADDCPHZmk */ |
| 113349 | VR512, VR512, VK16WM, VR512, f512mem, |
| 113350 | /* VFCMADDCPHZmkz */ |
| 113351 | VR512, VR512, VK16WM, VR512, f512mem, |
| 113352 | /* VFCMADDCPHZr */ |
| 113353 | VR512, VR512, VR512, VR512, |
| 113354 | /* VFCMADDCPHZrb */ |
| 113355 | VR512, VR512, VR512, VR512, AVX512RC, |
| 113356 | /* VFCMADDCPHZrbk */ |
| 113357 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 113358 | /* VFCMADDCPHZrbkz */ |
| 113359 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 113360 | /* VFCMADDCPHZrk */ |
| 113361 | VR512, VR512, VK16WM, VR512, VR512, |
| 113362 | /* VFCMADDCPHZrkz */ |
| 113363 | VR512, VR512, VK16WM, VR512, VR512, |
| 113364 | /* VFCMADDCSHZm */ |
| 113365 | VR128X, VR128X, VR128X, ssmem, |
| 113366 | /* VFCMADDCSHZmk */ |
| 113367 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 113368 | /* VFCMADDCSHZmkz */ |
| 113369 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 113370 | /* VFCMADDCSHZr */ |
| 113371 | VR128X, VR128X, VR128X, VR128X, |
| 113372 | /* VFCMADDCSHZrb */ |
| 113373 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 113374 | /* VFCMADDCSHZrbk */ |
| 113375 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 113376 | /* VFCMADDCSHZrbkz */ |
| 113377 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 113378 | /* VFCMADDCSHZrk */ |
| 113379 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 113380 | /* VFCMADDCSHZrkz */ |
| 113381 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 113382 | /* VFCMULCPHZ128rm */ |
| 113383 | VR128X, VR128X, f128mem, |
| 113384 | /* VFCMULCPHZ128rmb */ |
| 113385 | VR128X, VR128X, f32mem, |
| 113386 | /* VFCMULCPHZ128rmbk */ |
| 113387 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 113388 | /* VFCMULCPHZ128rmbkz */ |
| 113389 | VR128X, VK4WM, VR128X, f32mem, |
| 113390 | /* VFCMULCPHZ128rmk */ |
| 113391 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 113392 | /* VFCMULCPHZ128rmkz */ |
| 113393 | VR128X, VK4WM, VR128X, f128mem, |
| 113394 | /* VFCMULCPHZ128rr */ |
| 113395 | VR128X, VR128X, VR128X, |
| 113396 | /* VFCMULCPHZ128rrk */ |
| 113397 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 113398 | /* VFCMULCPHZ128rrkz */ |
| 113399 | VR128X, VK4WM, VR128X, VR128X, |
| 113400 | /* VFCMULCPHZ256rm */ |
| 113401 | VR256X, VR256X, f256mem, |
| 113402 | /* VFCMULCPHZ256rmb */ |
| 113403 | VR256X, VR256X, f32mem, |
| 113404 | /* VFCMULCPHZ256rmbk */ |
| 113405 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 113406 | /* VFCMULCPHZ256rmbkz */ |
| 113407 | VR256X, VK8WM, VR256X, f32mem, |
| 113408 | /* VFCMULCPHZ256rmk */ |
| 113409 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 113410 | /* VFCMULCPHZ256rmkz */ |
| 113411 | VR256X, VK8WM, VR256X, f256mem, |
| 113412 | /* VFCMULCPHZ256rr */ |
| 113413 | VR256X, VR256X, VR256X, |
| 113414 | /* VFCMULCPHZ256rrk */ |
| 113415 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 113416 | /* VFCMULCPHZ256rrkz */ |
| 113417 | VR256X, VK8WM, VR256X, VR256X, |
| 113418 | /* VFCMULCPHZrm */ |
| 113419 | VR512, VR512, f512mem, |
| 113420 | /* VFCMULCPHZrmb */ |
| 113421 | VR512, VR512, f32mem, |
| 113422 | /* VFCMULCPHZrmbk */ |
| 113423 | VR512, VR512, VK16WM, VR512, f32mem, |
| 113424 | /* VFCMULCPHZrmbkz */ |
| 113425 | VR512, VK16WM, VR512, f32mem, |
| 113426 | /* VFCMULCPHZrmk */ |
| 113427 | VR512, VR512, VK16WM, VR512, f512mem, |
| 113428 | /* VFCMULCPHZrmkz */ |
| 113429 | VR512, VK16WM, VR512, f512mem, |
| 113430 | /* VFCMULCPHZrr */ |
| 113431 | VR512, VR512, VR512, |
| 113432 | /* VFCMULCPHZrrb */ |
| 113433 | VR512, VR512, VR512, AVX512RC, |
| 113434 | /* VFCMULCPHZrrbk */ |
| 113435 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 113436 | /* VFCMULCPHZrrbkz */ |
| 113437 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 113438 | /* VFCMULCPHZrrk */ |
| 113439 | VR512, VR512, VK16WM, VR512, VR512, |
| 113440 | /* VFCMULCPHZrrkz */ |
| 113441 | VR512, VK16WM, VR512, VR512, |
| 113442 | /* VFCMULCSHZrm */ |
| 113443 | VR128X, VR128X, ssmem, |
| 113444 | /* VFCMULCSHZrmk */ |
| 113445 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 113446 | /* VFCMULCSHZrmkz */ |
| 113447 | VR128X, VK1WM, VR128X, ssmem, |
| 113448 | /* VFCMULCSHZrr */ |
| 113449 | VR128X, VR128X, VR128X, |
| 113450 | /* VFCMULCSHZrrb */ |
| 113451 | VR128X, VR128X, VR128X, AVX512RC, |
| 113452 | /* VFCMULCSHZrrbk */ |
| 113453 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 113454 | /* VFCMULCSHZrrbkz */ |
| 113455 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 113456 | /* VFCMULCSHZrrk */ |
| 113457 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 113458 | /* VFCMULCSHZrrkz */ |
| 113459 | VR128X, VK1WM, VR128X, VR128X, |
| 113460 | /* VFIXUPIMMPDZ128rmbi */ |
| 113461 | VR128X, VR128X, VR128X, f64mem, i32u8imm, |
| 113462 | /* VFIXUPIMMPDZ128rmbik */ |
| 113463 | VR128X, VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 113464 | /* VFIXUPIMMPDZ128rmbikz */ |
| 113465 | VR128X, VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 113466 | /* VFIXUPIMMPDZ128rmi */ |
| 113467 | VR128X, VR128X, VR128X, f128mem, i32u8imm, |
| 113468 | /* VFIXUPIMMPDZ128rmik */ |
| 113469 | VR128X, VR128X, VK2WM, VR128X, f128mem, i32u8imm, |
| 113470 | /* VFIXUPIMMPDZ128rmikz */ |
| 113471 | VR128X, VR128X, VK2WM, VR128X, f128mem, i32u8imm, |
| 113472 | /* VFIXUPIMMPDZ128rri */ |
| 113473 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 113474 | /* VFIXUPIMMPDZ128rrik */ |
| 113475 | VR128X, VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 113476 | /* VFIXUPIMMPDZ128rrikz */ |
| 113477 | VR128X, VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 113478 | /* VFIXUPIMMPDZ256rmbi */ |
| 113479 | VR256X, VR256X, VR256X, f64mem, i32u8imm, |
| 113480 | /* VFIXUPIMMPDZ256rmbik */ |
| 113481 | VR256X, VR256X, VK4WM, VR256X, f64mem, i32u8imm, |
| 113482 | /* VFIXUPIMMPDZ256rmbikz */ |
| 113483 | VR256X, VR256X, VK4WM, VR256X, f64mem, i32u8imm, |
| 113484 | /* VFIXUPIMMPDZ256rmi */ |
| 113485 | VR256X, VR256X, VR256X, f256mem, i32u8imm, |
| 113486 | /* VFIXUPIMMPDZ256rmik */ |
| 113487 | VR256X, VR256X, VK4WM, VR256X, f256mem, i32u8imm, |
| 113488 | /* VFIXUPIMMPDZ256rmikz */ |
| 113489 | VR256X, VR256X, VK4WM, VR256X, f256mem, i32u8imm, |
| 113490 | /* VFIXUPIMMPDZ256rri */ |
| 113491 | VR256X, VR256X, VR256X, VR256X, i32u8imm, |
| 113492 | /* VFIXUPIMMPDZ256rrik */ |
| 113493 | VR256X, VR256X, VK4WM, VR256X, VR256X, i32u8imm, |
| 113494 | /* VFIXUPIMMPDZ256rrikz */ |
| 113495 | VR256X, VR256X, VK4WM, VR256X, VR256X, i32u8imm, |
| 113496 | /* VFIXUPIMMPDZrmbi */ |
| 113497 | VR512, VR512, VR512, f64mem, i32u8imm, |
| 113498 | /* VFIXUPIMMPDZrmbik */ |
| 113499 | VR512, VR512, VK8WM, VR512, f64mem, i32u8imm, |
| 113500 | /* VFIXUPIMMPDZrmbikz */ |
| 113501 | VR512, VR512, VK8WM, VR512, f64mem, i32u8imm, |
| 113502 | /* VFIXUPIMMPDZrmi */ |
| 113503 | VR512, VR512, VR512, f512mem, i32u8imm, |
| 113504 | /* VFIXUPIMMPDZrmik */ |
| 113505 | VR512, VR512, VK8WM, VR512, f512mem, i32u8imm, |
| 113506 | /* VFIXUPIMMPDZrmikz */ |
| 113507 | VR512, VR512, VK8WM, VR512, f512mem, i32u8imm, |
| 113508 | /* VFIXUPIMMPDZrri */ |
| 113509 | VR512, VR512, VR512, VR512, i32u8imm, |
| 113510 | /* VFIXUPIMMPDZrrib */ |
| 113511 | VR512, VR512, VR512, VR512, i32u8imm, |
| 113512 | /* VFIXUPIMMPDZrribk */ |
| 113513 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 113514 | /* VFIXUPIMMPDZrribkz */ |
| 113515 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 113516 | /* VFIXUPIMMPDZrrik */ |
| 113517 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 113518 | /* VFIXUPIMMPDZrrikz */ |
| 113519 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 113520 | /* VFIXUPIMMPSZ128rmbi */ |
| 113521 | VR128X, VR128X, VR128X, f32mem, i32u8imm, |
| 113522 | /* VFIXUPIMMPSZ128rmbik */ |
| 113523 | VR128X, VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 113524 | /* VFIXUPIMMPSZ128rmbikz */ |
| 113525 | VR128X, VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 113526 | /* VFIXUPIMMPSZ128rmi */ |
| 113527 | VR128X, VR128X, VR128X, f128mem, i32u8imm, |
| 113528 | /* VFIXUPIMMPSZ128rmik */ |
| 113529 | VR128X, VR128X, VK4WM, VR128X, f128mem, i32u8imm, |
| 113530 | /* VFIXUPIMMPSZ128rmikz */ |
| 113531 | VR128X, VR128X, VK4WM, VR128X, f128mem, i32u8imm, |
| 113532 | /* VFIXUPIMMPSZ128rri */ |
| 113533 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 113534 | /* VFIXUPIMMPSZ128rrik */ |
| 113535 | VR128X, VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 113536 | /* VFIXUPIMMPSZ128rrikz */ |
| 113537 | VR128X, VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 113538 | /* VFIXUPIMMPSZ256rmbi */ |
| 113539 | VR256X, VR256X, VR256X, f32mem, i32u8imm, |
| 113540 | /* VFIXUPIMMPSZ256rmbik */ |
| 113541 | VR256X, VR256X, VK8WM, VR256X, f32mem, i32u8imm, |
| 113542 | /* VFIXUPIMMPSZ256rmbikz */ |
| 113543 | VR256X, VR256X, VK8WM, VR256X, f32mem, i32u8imm, |
| 113544 | /* VFIXUPIMMPSZ256rmi */ |
| 113545 | VR256X, VR256X, VR256X, f256mem, i32u8imm, |
| 113546 | /* VFIXUPIMMPSZ256rmik */ |
| 113547 | VR256X, VR256X, VK8WM, VR256X, f256mem, i32u8imm, |
| 113548 | /* VFIXUPIMMPSZ256rmikz */ |
| 113549 | VR256X, VR256X, VK8WM, VR256X, f256mem, i32u8imm, |
| 113550 | /* VFIXUPIMMPSZ256rri */ |
| 113551 | VR256X, VR256X, VR256X, VR256X, i32u8imm, |
| 113552 | /* VFIXUPIMMPSZ256rrik */ |
| 113553 | VR256X, VR256X, VK8WM, VR256X, VR256X, i32u8imm, |
| 113554 | /* VFIXUPIMMPSZ256rrikz */ |
| 113555 | VR256X, VR256X, VK8WM, VR256X, VR256X, i32u8imm, |
| 113556 | /* VFIXUPIMMPSZrmbi */ |
| 113557 | VR512, VR512, VR512, f32mem, i32u8imm, |
| 113558 | /* VFIXUPIMMPSZrmbik */ |
| 113559 | VR512, VR512, VK16WM, VR512, f32mem, i32u8imm, |
| 113560 | /* VFIXUPIMMPSZrmbikz */ |
| 113561 | VR512, VR512, VK16WM, VR512, f32mem, i32u8imm, |
| 113562 | /* VFIXUPIMMPSZrmi */ |
| 113563 | VR512, VR512, VR512, f512mem, i32u8imm, |
| 113564 | /* VFIXUPIMMPSZrmik */ |
| 113565 | VR512, VR512, VK16WM, VR512, f512mem, i32u8imm, |
| 113566 | /* VFIXUPIMMPSZrmikz */ |
| 113567 | VR512, VR512, VK16WM, VR512, f512mem, i32u8imm, |
| 113568 | /* VFIXUPIMMPSZrri */ |
| 113569 | VR512, VR512, VR512, VR512, i32u8imm, |
| 113570 | /* VFIXUPIMMPSZrrib */ |
| 113571 | VR512, VR512, VR512, VR512, i32u8imm, |
| 113572 | /* VFIXUPIMMPSZrribk */ |
| 113573 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 113574 | /* VFIXUPIMMPSZrribkz */ |
| 113575 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 113576 | /* VFIXUPIMMPSZrrik */ |
| 113577 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 113578 | /* VFIXUPIMMPSZrrikz */ |
| 113579 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 113580 | /* VFIXUPIMMSDZrmi */ |
| 113581 | VR128X, VR128X, VR128X, f64mem, i32u8imm, |
| 113582 | /* VFIXUPIMMSDZrmik */ |
| 113583 | VR128X, VR128X, VK1WM, VR128X, f64mem, i32u8imm, |
| 113584 | /* VFIXUPIMMSDZrmikz */ |
| 113585 | VR128X, VR128X, VK1WM, VR128X, f64mem, i32u8imm, |
| 113586 | /* VFIXUPIMMSDZrri */ |
| 113587 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 113588 | /* VFIXUPIMMSDZrrib */ |
| 113589 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 113590 | /* VFIXUPIMMSDZrribk */ |
| 113591 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 113592 | /* VFIXUPIMMSDZrribkz */ |
| 113593 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 113594 | /* VFIXUPIMMSDZrrik */ |
| 113595 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 113596 | /* VFIXUPIMMSDZrrikz */ |
| 113597 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 113598 | /* VFIXUPIMMSSZrmi */ |
| 113599 | VR128X, VR128X, VR128X, f32mem, i32u8imm, |
| 113600 | /* VFIXUPIMMSSZrmik */ |
| 113601 | VR128X, VR128X, VK1WM, VR128X, f32mem, i32u8imm, |
| 113602 | /* VFIXUPIMMSSZrmikz */ |
| 113603 | VR128X, VR128X, VK1WM, VR128X, f32mem, i32u8imm, |
| 113604 | /* VFIXUPIMMSSZrri */ |
| 113605 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 113606 | /* VFIXUPIMMSSZrrib */ |
| 113607 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 113608 | /* VFIXUPIMMSSZrribk */ |
| 113609 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 113610 | /* VFIXUPIMMSSZrribkz */ |
| 113611 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 113612 | /* VFIXUPIMMSSZrrik */ |
| 113613 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 113614 | /* VFIXUPIMMSSZrrikz */ |
| 113615 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 113616 | /* VFMADD132BF16Z128m */ |
| 113617 | VR128X, VR128X, VR128X, f128mem, |
| 113618 | /* VFMADD132BF16Z128mb */ |
| 113619 | VR128X, VR128X, VR128X, f16mem, |
| 113620 | /* VFMADD132BF16Z128mbk */ |
| 113621 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 113622 | /* VFMADD132BF16Z128mbkz */ |
| 113623 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 113624 | /* VFMADD132BF16Z128mk */ |
| 113625 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 113626 | /* VFMADD132BF16Z128mkz */ |
| 113627 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 113628 | /* VFMADD132BF16Z128r */ |
| 113629 | VR128X, VR128X, VR128X, VR128X, |
| 113630 | /* VFMADD132BF16Z128rk */ |
| 113631 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 113632 | /* VFMADD132BF16Z128rkz */ |
| 113633 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 113634 | /* VFMADD132BF16Z256m */ |
| 113635 | VR256X, VR256X, VR256X, f256mem, |
| 113636 | /* VFMADD132BF16Z256mb */ |
| 113637 | VR256X, VR256X, VR256X, f16mem, |
| 113638 | /* VFMADD132BF16Z256mbk */ |
| 113639 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 113640 | /* VFMADD132BF16Z256mbkz */ |
| 113641 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 113642 | /* VFMADD132BF16Z256mk */ |
| 113643 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 113644 | /* VFMADD132BF16Z256mkz */ |
| 113645 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 113646 | /* VFMADD132BF16Z256r */ |
| 113647 | VR256X, VR256X, VR256X, VR256X, |
| 113648 | /* VFMADD132BF16Z256rk */ |
| 113649 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 113650 | /* VFMADD132BF16Z256rkz */ |
| 113651 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 113652 | /* VFMADD132BF16Zm */ |
| 113653 | VR512, VR512, VR512, f512mem, |
| 113654 | /* VFMADD132BF16Zmb */ |
| 113655 | VR512, VR512, VR512, f16mem, |
| 113656 | /* VFMADD132BF16Zmbk */ |
| 113657 | VR512, VR512, VK32WM, VR512, f16mem, |
| 113658 | /* VFMADD132BF16Zmbkz */ |
| 113659 | VR512, VR512, VK32WM, VR512, f16mem, |
| 113660 | /* VFMADD132BF16Zmk */ |
| 113661 | VR512, VR512, VK32WM, VR512, f512mem, |
| 113662 | /* VFMADD132BF16Zmkz */ |
| 113663 | VR512, VR512, VK32WM, VR512, f512mem, |
| 113664 | /* VFMADD132BF16Zr */ |
| 113665 | VR512, VR512, VR512, VR512, |
| 113666 | /* VFMADD132BF16Zrk */ |
| 113667 | VR512, VR512, VK32WM, VR512, VR512, |
| 113668 | /* VFMADD132BF16Zrkz */ |
| 113669 | VR512, VR512, VK32WM, VR512, VR512, |
| 113670 | /* VFMADD132PDYm */ |
| 113671 | VR256, VR256, VR256, f256mem, |
| 113672 | /* VFMADD132PDYr */ |
| 113673 | VR256, VR256, VR256, VR256, |
| 113674 | /* VFMADD132PDZ128m */ |
| 113675 | VR128X, VR128X, VR128X, f128mem, |
| 113676 | /* VFMADD132PDZ128mb */ |
| 113677 | VR128X, VR128X, VR128X, f64mem, |
| 113678 | /* VFMADD132PDZ128mbk */ |
| 113679 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 113680 | /* VFMADD132PDZ128mbkz */ |
| 113681 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 113682 | /* VFMADD132PDZ128mk */ |
| 113683 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 113684 | /* VFMADD132PDZ128mkz */ |
| 113685 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 113686 | /* VFMADD132PDZ128r */ |
| 113687 | VR128X, VR128X, VR128X, VR128X, |
| 113688 | /* VFMADD132PDZ128rk */ |
| 113689 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 113690 | /* VFMADD132PDZ128rkz */ |
| 113691 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 113692 | /* VFMADD132PDZ256m */ |
| 113693 | VR256X, VR256X, VR256X, f256mem, |
| 113694 | /* VFMADD132PDZ256mb */ |
| 113695 | VR256X, VR256X, VR256X, f64mem, |
| 113696 | /* VFMADD132PDZ256mbk */ |
| 113697 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 113698 | /* VFMADD132PDZ256mbkz */ |
| 113699 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 113700 | /* VFMADD132PDZ256mk */ |
| 113701 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 113702 | /* VFMADD132PDZ256mkz */ |
| 113703 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 113704 | /* VFMADD132PDZ256r */ |
| 113705 | VR256X, VR256X, VR256X, VR256X, |
| 113706 | /* VFMADD132PDZ256rk */ |
| 113707 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 113708 | /* VFMADD132PDZ256rkz */ |
| 113709 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 113710 | /* VFMADD132PDZm */ |
| 113711 | VR512, VR512, VR512, f512mem, |
| 113712 | /* VFMADD132PDZmb */ |
| 113713 | VR512, VR512, VR512, f64mem, |
| 113714 | /* VFMADD132PDZmbk */ |
| 113715 | VR512, VR512, VK8WM, VR512, f64mem, |
| 113716 | /* VFMADD132PDZmbkz */ |
| 113717 | VR512, VR512, VK8WM, VR512, f64mem, |
| 113718 | /* VFMADD132PDZmk */ |
| 113719 | VR512, VR512, VK8WM, VR512, f512mem, |
| 113720 | /* VFMADD132PDZmkz */ |
| 113721 | VR512, VR512, VK8WM, VR512, f512mem, |
| 113722 | /* VFMADD132PDZr */ |
| 113723 | VR512, VR512, VR512, VR512, |
| 113724 | /* VFMADD132PDZrb */ |
| 113725 | VR512, VR512, VR512, VR512, AVX512RC, |
| 113726 | /* VFMADD132PDZrbk */ |
| 113727 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 113728 | /* VFMADD132PDZrbkz */ |
| 113729 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 113730 | /* VFMADD132PDZrk */ |
| 113731 | VR512, VR512, VK8WM, VR512, VR512, |
| 113732 | /* VFMADD132PDZrkz */ |
| 113733 | VR512, VR512, VK8WM, VR512, VR512, |
| 113734 | /* VFMADD132PDm */ |
| 113735 | VR128, VR128, VR128, f128mem, |
| 113736 | /* VFMADD132PDr */ |
| 113737 | VR128, VR128, VR128, VR128, |
| 113738 | /* VFMADD132PHZ128m */ |
| 113739 | VR128X, VR128X, VR128X, f128mem, |
| 113740 | /* VFMADD132PHZ128mb */ |
| 113741 | VR128X, VR128X, VR128X, f16mem, |
| 113742 | /* VFMADD132PHZ128mbk */ |
| 113743 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 113744 | /* VFMADD132PHZ128mbkz */ |
| 113745 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 113746 | /* VFMADD132PHZ128mk */ |
| 113747 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 113748 | /* VFMADD132PHZ128mkz */ |
| 113749 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 113750 | /* VFMADD132PHZ128r */ |
| 113751 | VR128X, VR128X, VR128X, VR128X, |
| 113752 | /* VFMADD132PHZ128rk */ |
| 113753 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 113754 | /* VFMADD132PHZ128rkz */ |
| 113755 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 113756 | /* VFMADD132PHZ256m */ |
| 113757 | VR256X, VR256X, VR256X, f256mem, |
| 113758 | /* VFMADD132PHZ256mb */ |
| 113759 | VR256X, VR256X, VR256X, f16mem, |
| 113760 | /* VFMADD132PHZ256mbk */ |
| 113761 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 113762 | /* VFMADD132PHZ256mbkz */ |
| 113763 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 113764 | /* VFMADD132PHZ256mk */ |
| 113765 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 113766 | /* VFMADD132PHZ256mkz */ |
| 113767 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 113768 | /* VFMADD132PHZ256r */ |
| 113769 | VR256X, VR256X, VR256X, VR256X, |
| 113770 | /* VFMADD132PHZ256rk */ |
| 113771 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 113772 | /* VFMADD132PHZ256rkz */ |
| 113773 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 113774 | /* VFMADD132PHZm */ |
| 113775 | VR512, VR512, VR512, f512mem, |
| 113776 | /* VFMADD132PHZmb */ |
| 113777 | VR512, VR512, VR512, f16mem, |
| 113778 | /* VFMADD132PHZmbk */ |
| 113779 | VR512, VR512, VK32WM, VR512, f16mem, |
| 113780 | /* VFMADD132PHZmbkz */ |
| 113781 | VR512, VR512, VK32WM, VR512, f16mem, |
| 113782 | /* VFMADD132PHZmk */ |
| 113783 | VR512, VR512, VK32WM, VR512, f512mem, |
| 113784 | /* VFMADD132PHZmkz */ |
| 113785 | VR512, VR512, VK32WM, VR512, f512mem, |
| 113786 | /* VFMADD132PHZr */ |
| 113787 | VR512, VR512, VR512, VR512, |
| 113788 | /* VFMADD132PHZrb */ |
| 113789 | VR512, VR512, VR512, VR512, AVX512RC, |
| 113790 | /* VFMADD132PHZrbk */ |
| 113791 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 113792 | /* VFMADD132PHZrbkz */ |
| 113793 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 113794 | /* VFMADD132PHZrk */ |
| 113795 | VR512, VR512, VK32WM, VR512, VR512, |
| 113796 | /* VFMADD132PHZrkz */ |
| 113797 | VR512, VR512, VK32WM, VR512, VR512, |
| 113798 | /* VFMADD132PSYm */ |
| 113799 | VR256, VR256, VR256, f256mem, |
| 113800 | /* VFMADD132PSYr */ |
| 113801 | VR256, VR256, VR256, VR256, |
| 113802 | /* VFMADD132PSZ128m */ |
| 113803 | VR128X, VR128X, VR128X, f128mem, |
| 113804 | /* VFMADD132PSZ128mb */ |
| 113805 | VR128X, VR128X, VR128X, f32mem, |
| 113806 | /* VFMADD132PSZ128mbk */ |
| 113807 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 113808 | /* VFMADD132PSZ128mbkz */ |
| 113809 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 113810 | /* VFMADD132PSZ128mk */ |
| 113811 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 113812 | /* VFMADD132PSZ128mkz */ |
| 113813 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 113814 | /* VFMADD132PSZ128r */ |
| 113815 | VR128X, VR128X, VR128X, VR128X, |
| 113816 | /* VFMADD132PSZ128rk */ |
| 113817 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 113818 | /* VFMADD132PSZ128rkz */ |
| 113819 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 113820 | /* VFMADD132PSZ256m */ |
| 113821 | VR256X, VR256X, VR256X, f256mem, |
| 113822 | /* VFMADD132PSZ256mb */ |
| 113823 | VR256X, VR256X, VR256X, f32mem, |
| 113824 | /* VFMADD132PSZ256mbk */ |
| 113825 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 113826 | /* VFMADD132PSZ256mbkz */ |
| 113827 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 113828 | /* VFMADD132PSZ256mk */ |
| 113829 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 113830 | /* VFMADD132PSZ256mkz */ |
| 113831 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 113832 | /* VFMADD132PSZ256r */ |
| 113833 | VR256X, VR256X, VR256X, VR256X, |
| 113834 | /* VFMADD132PSZ256rk */ |
| 113835 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 113836 | /* VFMADD132PSZ256rkz */ |
| 113837 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 113838 | /* VFMADD132PSZm */ |
| 113839 | VR512, VR512, VR512, f512mem, |
| 113840 | /* VFMADD132PSZmb */ |
| 113841 | VR512, VR512, VR512, f32mem, |
| 113842 | /* VFMADD132PSZmbk */ |
| 113843 | VR512, VR512, VK16WM, VR512, f32mem, |
| 113844 | /* VFMADD132PSZmbkz */ |
| 113845 | VR512, VR512, VK16WM, VR512, f32mem, |
| 113846 | /* VFMADD132PSZmk */ |
| 113847 | VR512, VR512, VK16WM, VR512, f512mem, |
| 113848 | /* VFMADD132PSZmkz */ |
| 113849 | VR512, VR512, VK16WM, VR512, f512mem, |
| 113850 | /* VFMADD132PSZr */ |
| 113851 | VR512, VR512, VR512, VR512, |
| 113852 | /* VFMADD132PSZrb */ |
| 113853 | VR512, VR512, VR512, VR512, AVX512RC, |
| 113854 | /* VFMADD132PSZrbk */ |
| 113855 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 113856 | /* VFMADD132PSZrbkz */ |
| 113857 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 113858 | /* VFMADD132PSZrk */ |
| 113859 | VR512, VR512, VK16WM, VR512, VR512, |
| 113860 | /* VFMADD132PSZrkz */ |
| 113861 | VR512, VR512, VK16WM, VR512, VR512, |
| 113862 | /* VFMADD132PSm */ |
| 113863 | VR128, VR128, VR128, f128mem, |
| 113864 | /* VFMADD132PSr */ |
| 113865 | VR128, VR128, VR128, VR128, |
| 113866 | /* VFMADD132SDZm */ |
| 113867 | FR64X, FR64X, FR64X, f64mem, |
| 113868 | /* VFMADD132SDZm_Int */ |
| 113869 | VR128X, VR128X, VR128X, sdmem, |
| 113870 | /* VFMADD132SDZmk_Int */ |
| 113871 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 113872 | /* VFMADD132SDZmkz_Int */ |
| 113873 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 113874 | /* VFMADD132SDZr */ |
| 113875 | FR64X, FR64X, FR64X, FR64X, |
| 113876 | /* VFMADD132SDZr_Int */ |
| 113877 | VR128X, VR128X, VR128X, VR128X, |
| 113878 | /* VFMADD132SDZrb */ |
| 113879 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 113880 | /* VFMADD132SDZrb_Int */ |
| 113881 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 113882 | /* VFMADD132SDZrbk_Int */ |
| 113883 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 113884 | /* VFMADD132SDZrbkz_Int */ |
| 113885 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 113886 | /* VFMADD132SDZrk_Int */ |
| 113887 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 113888 | /* VFMADD132SDZrkz_Int */ |
| 113889 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 113890 | /* VFMADD132SDm */ |
| 113891 | FR64, FR64, FR64, f64mem, |
| 113892 | /* VFMADD132SDm_Int */ |
| 113893 | VR128, VR128, VR128, sdmem, |
| 113894 | /* VFMADD132SDr */ |
| 113895 | FR64, FR64, FR64, FR64, |
| 113896 | /* VFMADD132SDr_Int */ |
| 113897 | VR128, VR128, VR128, VR128, |
| 113898 | /* VFMADD132SHZm */ |
| 113899 | FR16X, FR16X, FR16X, f16mem, |
| 113900 | /* VFMADD132SHZm_Int */ |
| 113901 | VR128X, VR128X, VR128X, shmem, |
| 113902 | /* VFMADD132SHZmk_Int */ |
| 113903 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 113904 | /* VFMADD132SHZmkz_Int */ |
| 113905 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 113906 | /* VFMADD132SHZr */ |
| 113907 | FR16X, FR16X, FR16X, FR16X, |
| 113908 | /* VFMADD132SHZr_Int */ |
| 113909 | VR128X, VR128X, VR128X, VR128X, |
| 113910 | /* VFMADD132SHZrb */ |
| 113911 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 113912 | /* VFMADD132SHZrb_Int */ |
| 113913 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 113914 | /* VFMADD132SHZrbk_Int */ |
| 113915 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 113916 | /* VFMADD132SHZrbkz_Int */ |
| 113917 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 113918 | /* VFMADD132SHZrk_Int */ |
| 113919 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 113920 | /* VFMADD132SHZrkz_Int */ |
| 113921 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 113922 | /* VFMADD132SSZm */ |
| 113923 | FR32X, FR32X, FR32X, f32mem, |
| 113924 | /* VFMADD132SSZm_Int */ |
| 113925 | VR128X, VR128X, VR128X, ssmem, |
| 113926 | /* VFMADD132SSZmk_Int */ |
| 113927 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 113928 | /* VFMADD132SSZmkz_Int */ |
| 113929 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 113930 | /* VFMADD132SSZr */ |
| 113931 | FR32X, FR32X, FR32X, FR32X, |
| 113932 | /* VFMADD132SSZr_Int */ |
| 113933 | VR128X, VR128X, VR128X, VR128X, |
| 113934 | /* VFMADD132SSZrb */ |
| 113935 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 113936 | /* VFMADD132SSZrb_Int */ |
| 113937 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 113938 | /* VFMADD132SSZrbk_Int */ |
| 113939 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 113940 | /* VFMADD132SSZrbkz_Int */ |
| 113941 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 113942 | /* VFMADD132SSZrk_Int */ |
| 113943 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 113944 | /* VFMADD132SSZrkz_Int */ |
| 113945 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 113946 | /* VFMADD132SSm */ |
| 113947 | FR32, FR32, FR32, f32mem, |
| 113948 | /* VFMADD132SSm_Int */ |
| 113949 | VR128, VR128, VR128, ssmem, |
| 113950 | /* VFMADD132SSr */ |
| 113951 | FR32, FR32, FR32, FR32, |
| 113952 | /* VFMADD132SSr_Int */ |
| 113953 | VR128, VR128, VR128, VR128, |
| 113954 | /* VFMADD213BF16Z128m */ |
| 113955 | VR128X, VR128X, VR128X, f128mem, |
| 113956 | /* VFMADD213BF16Z128mb */ |
| 113957 | VR128X, VR128X, VR128X, f16mem, |
| 113958 | /* VFMADD213BF16Z128mbk */ |
| 113959 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 113960 | /* VFMADD213BF16Z128mbkz */ |
| 113961 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 113962 | /* VFMADD213BF16Z128mk */ |
| 113963 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 113964 | /* VFMADD213BF16Z128mkz */ |
| 113965 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 113966 | /* VFMADD213BF16Z128r */ |
| 113967 | VR128X, VR128X, VR128X, VR128X, |
| 113968 | /* VFMADD213BF16Z128rk */ |
| 113969 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 113970 | /* VFMADD213BF16Z128rkz */ |
| 113971 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 113972 | /* VFMADD213BF16Z256m */ |
| 113973 | VR256X, VR256X, VR256X, f256mem, |
| 113974 | /* VFMADD213BF16Z256mb */ |
| 113975 | VR256X, VR256X, VR256X, f16mem, |
| 113976 | /* VFMADD213BF16Z256mbk */ |
| 113977 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 113978 | /* VFMADD213BF16Z256mbkz */ |
| 113979 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 113980 | /* VFMADD213BF16Z256mk */ |
| 113981 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 113982 | /* VFMADD213BF16Z256mkz */ |
| 113983 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 113984 | /* VFMADD213BF16Z256r */ |
| 113985 | VR256X, VR256X, VR256X, VR256X, |
| 113986 | /* VFMADD213BF16Z256rk */ |
| 113987 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 113988 | /* VFMADD213BF16Z256rkz */ |
| 113989 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 113990 | /* VFMADD213BF16Zm */ |
| 113991 | VR512, VR512, VR512, f512mem, |
| 113992 | /* VFMADD213BF16Zmb */ |
| 113993 | VR512, VR512, VR512, f16mem, |
| 113994 | /* VFMADD213BF16Zmbk */ |
| 113995 | VR512, VR512, VK32WM, VR512, f16mem, |
| 113996 | /* VFMADD213BF16Zmbkz */ |
| 113997 | VR512, VR512, VK32WM, VR512, f16mem, |
| 113998 | /* VFMADD213BF16Zmk */ |
| 113999 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114000 | /* VFMADD213BF16Zmkz */ |
| 114001 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114002 | /* VFMADD213BF16Zr */ |
| 114003 | VR512, VR512, VR512, VR512, |
| 114004 | /* VFMADD213BF16Zrk */ |
| 114005 | VR512, VR512, VK32WM, VR512, VR512, |
| 114006 | /* VFMADD213BF16Zrkz */ |
| 114007 | VR512, VR512, VK32WM, VR512, VR512, |
| 114008 | /* VFMADD213PDYm */ |
| 114009 | VR256, VR256, VR256, f256mem, |
| 114010 | /* VFMADD213PDYr */ |
| 114011 | VR256, VR256, VR256, VR256, |
| 114012 | /* VFMADD213PDZ128m */ |
| 114013 | VR128X, VR128X, VR128X, f128mem, |
| 114014 | /* VFMADD213PDZ128mb */ |
| 114015 | VR128X, VR128X, VR128X, f64mem, |
| 114016 | /* VFMADD213PDZ128mbk */ |
| 114017 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 114018 | /* VFMADD213PDZ128mbkz */ |
| 114019 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 114020 | /* VFMADD213PDZ128mk */ |
| 114021 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 114022 | /* VFMADD213PDZ128mkz */ |
| 114023 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 114024 | /* VFMADD213PDZ128r */ |
| 114025 | VR128X, VR128X, VR128X, VR128X, |
| 114026 | /* VFMADD213PDZ128rk */ |
| 114027 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 114028 | /* VFMADD213PDZ128rkz */ |
| 114029 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 114030 | /* VFMADD213PDZ256m */ |
| 114031 | VR256X, VR256X, VR256X, f256mem, |
| 114032 | /* VFMADD213PDZ256mb */ |
| 114033 | VR256X, VR256X, VR256X, f64mem, |
| 114034 | /* VFMADD213PDZ256mbk */ |
| 114035 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 114036 | /* VFMADD213PDZ256mbkz */ |
| 114037 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 114038 | /* VFMADD213PDZ256mk */ |
| 114039 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 114040 | /* VFMADD213PDZ256mkz */ |
| 114041 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 114042 | /* VFMADD213PDZ256r */ |
| 114043 | VR256X, VR256X, VR256X, VR256X, |
| 114044 | /* VFMADD213PDZ256rk */ |
| 114045 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 114046 | /* VFMADD213PDZ256rkz */ |
| 114047 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 114048 | /* VFMADD213PDZm */ |
| 114049 | VR512, VR512, VR512, f512mem, |
| 114050 | /* VFMADD213PDZmb */ |
| 114051 | VR512, VR512, VR512, f64mem, |
| 114052 | /* VFMADD213PDZmbk */ |
| 114053 | VR512, VR512, VK8WM, VR512, f64mem, |
| 114054 | /* VFMADD213PDZmbkz */ |
| 114055 | VR512, VR512, VK8WM, VR512, f64mem, |
| 114056 | /* VFMADD213PDZmk */ |
| 114057 | VR512, VR512, VK8WM, VR512, f512mem, |
| 114058 | /* VFMADD213PDZmkz */ |
| 114059 | VR512, VR512, VK8WM, VR512, f512mem, |
| 114060 | /* VFMADD213PDZr */ |
| 114061 | VR512, VR512, VR512, VR512, |
| 114062 | /* VFMADD213PDZrb */ |
| 114063 | VR512, VR512, VR512, VR512, AVX512RC, |
| 114064 | /* VFMADD213PDZrbk */ |
| 114065 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 114066 | /* VFMADD213PDZrbkz */ |
| 114067 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 114068 | /* VFMADD213PDZrk */ |
| 114069 | VR512, VR512, VK8WM, VR512, VR512, |
| 114070 | /* VFMADD213PDZrkz */ |
| 114071 | VR512, VR512, VK8WM, VR512, VR512, |
| 114072 | /* VFMADD213PDm */ |
| 114073 | VR128, VR128, VR128, f128mem, |
| 114074 | /* VFMADD213PDr */ |
| 114075 | VR128, VR128, VR128, VR128, |
| 114076 | /* VFMADD213PHZ128m */ |
| 114077 | VR128X, VR128X, VR128X, f128mem, |
| 114078 | /* VFMADD213PHZ128mb */ |
| 114079 | VR128X, VR128X, VR128X, f16mem, |
| 114080 | /* VFMADD213PHZ128mbk */ |
| 114081 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 114082 | /* VFMADD213PHZ128mbkz */ |
| 114083 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 114084 | /* VFMADD213PHZ128mk */ |
| 114085 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 114086 | /* VFMADD213PHZ128mkz */ |
| 114087 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 114088 | /* VFMADD213PHZ128r */ |
| 114089 | VR128X, VR128X, VR128X, VR128X, |
| 114090 | /* VFMADD213PHZ128rk */ |
| 114091 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 114092 | /* VFMADD213PHZ128rkz */ |
| 114093 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 114094 | /* VFMADD213PHZ256m */ |
| 114095 | VR256X, VR256X, VR256X, f256mem, |
| 114096 | /* VFMADD213PHZ256mb */ |
| 114097 | VR256X, VR256X, VR256X, f16mem, |
| 114098 | /* VFMADD213PHZ256mbk */ |
| 114099 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 114100 | /* VFMADD213PHZ256mbkz */ |
| 114101 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 114102 | /* VFMADD213PHZ256mk */ |
| 114103 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 114104 | /* VFMADD213PHZ256mkz */ |
| 114105 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 114106 | /* VFMADD213PHZ256r */ |
| 114107 | VR256X, VR256X, VR256X, VR256X, |
| 114108 | /* VFMADD213PHZ256rk */ |
| 114109 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 114110 | /* VFMADD213PHZ256rkz */ |
| 114111 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 114112 | /* VFMADD213PHZm */ |
| 114113 | VR512, VR512, VR512, f512mem, |
| 114114 | /* VFMADD213PHZmb */ |
| 114115 | VR512, VR512, VR512, f16mem, |
| 114116 | /* VFMADD213PHZmbk */ |
| 114117 | VR512, VR512, VK32WM, VR512, f16mem, |
| 114118 | /* VFMADD213PHZmbkz */ |
| 114119 | VR512, VR512, VK32WM, VR512, f16mem, |
| 114120 | /* VFMADD213PHZmk */ |
| 114121 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114122 | /* VFMADD213PHZmkz */ |
| 114123 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114124 | /* VFMADD213PHZr */ |
| 114125 | VR512, VR512, VR512, VR512, |
| 114126 | /* VFMADD213PHZrb */ |
| 114127 | VR512, VR512, VR512, VR512, AVX512RC, |
| 114128 | /* VFMADD213PHZrbk */ |
| 114129 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 114130 | /* VFMADD213PHZrbkz */ |
| 114131 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 114132 | /* VFMADD213PHZrk */ |
| 114133 | VR512, VR512, VK32WM, VR512, VR512, |
| 114134 | /* VFMADD213PHZrkz */ |
| 114135 | VR512, VR512, VK32WM, VR512, VR512, |
| 114136 | /* VFMADD213PSYm */ |
| 114137 | VR256, VR256, VR256, f256mem, |
| 114138 | /* VFMADD213PSYr */ |
| 114139 | VR256, VR256, VR256, VR256, |
| 114140 | /* VFMADD213PSZ128m */ |
| 114141 | VR128X, VR128X, VR128X, f128mem, |
| 114142 | /* VFMADD213PSZ128mb */ |
| 114143 | VR128X, VR128X, VR128X, f32mem, |
| 114144 | /* VFMADD213PSZ128mbk */ |
| 114145 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 114146 | /* VFMADD213PSZ128mbkz */ |
| 114147 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 114148 | /* VFMADD213PSZ128mk */ |
| 114149 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 114150 | /* VFMADD213PSZ128mkz */ |
| 114151 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 114152 | /* VFMADD213PSZ128r */ |
| 114153 | VR128X, VR128X, VR128X, VR128X, |
| 114154 | /* VFMADD213PSZ128rk */ |
| 114155 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 114156 | /* VFMADD213PSZ128rkz */ |
| 114157 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 114158 | /* VFMADD213PSZ256m */ |
| 114159 | VR256X, VR256X, VR256X, f256mem, |
| 114160 | /* VFMADD213PSZ256mb */ |
| 114161 | VR256X, VR256X, VR256X, f32mem, |
| 114162 | /* VFMADD213PSZ256mbk */ |
| 114163 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 114164 | /* VFMADD213PSZ256mbkz */ |
| 114165 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 114166 | /* VFMADD213PSZ256mk */ |
| 114167 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 114168 | /* VFMADD213PSZ256mkz */ |
| 114169 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 114170 | /* VFMADD213PSZ256r */ |
| 114171 | VR256X, VR256X, VR256X, VR256X, |
| 114172 | /* VFMADD213PSZ256rk */ |
| 114173 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 114174 | /* VFMADD213PSZ256rkz */ |
| 114175 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 114176 | /* VFMADD213PSZm */ |
| 114177 | VR512, VR512, VR512, f512mem, |
| 114178 | /* VFMADD213PSZmb */ |
| 114179 | VR512, VR512, VR512, f32mem, |
| 114180 | /* VFMADD213PSZmbk */ |
| 114181 | VR512, VR512, VK16WM, VR512, f32mem, |
| 114182 | /* VFMADD213PSZmbkz */ |
| 114183 | VR512, VR512, VK16WM, VR512, f32mem, |
| 114184 | /* VFMADD213PSZmk */ |
| 114185 | VR512, VR512, VK16WM, VR512, f512mem, |
| 114186 | /* VFMADD213PSZmkz */ |
| 114187 | VR512, VR512, VK16WM, VR512, f512mem, |
| 114188 | /* VFMADD213PSZr */ |
| 114189 | VR512, VR512, VR512, VR512, |
| 114190 | /* VFMADD213PSZrb */ |
| 114191 | VR512, VR512, VR512, VR512, AVX512RC, |
| 114192 | /* VFMADD213PSZrbk */ |
| 114193 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 114194 | /* VFMADD213PSZrbkz */ |
| 114195 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 114196 | /* VFMADD213PSZrk */ |
| 114197 | VR512, VR512, VK16WM, VR512, VR512, |
| 114198 | /* VFMADD213PSZrkz */ |
| 114199 | VR512, VR512, VK16WM, VR512, VR512, |
| 114200 | /* VFMADD213PSm */ |
| 114201 | VR128, VR128, VR128, f128mem, |
| 114202 | /* VFMADD213PSr */ |
| 114203 | VR128, VR128, VR128, VR128, |
| 114204 | /* VFMADD213SDZm */ |
| 114205 | FR64X, FR64X, FR64X, f64mem, |
| 114206 | /* VFMADD213SDZm_Int */ |
| 114207 | VR128X, VR128X, VR128X, sdmem, |
| 114208 | /* VFMADD213SDZmk_Int */ |
| 114209 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 114210 | /* VFMADD213SDZmkz_Int */ |
| 114211 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 114212 | /* VFMADD213SDZr */ |
| 114213 | FR64X, FR64X, FR64X, FR64X, |
| 114214 | /* VFMADD213SDZr_Int */ |
| 114215 | VR128X, VR128X, VR128X, VR128X, |
| 114216 | /* VFMADD213SDZrb */ |
| 114217 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 114218 | /* VFMADD213SDZrb_Int */ |
| 114219 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 114220 | /* VFMADD213SDZrbk_Int */ |
| 114221 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114222 | /* VFMADD213SDZrbkz_Int */ |
| 114223 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114224 | /* VFMADD213SDZrk_Int */ |
| 114225 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114226 | /* VFMADD213SDZrkz_Int */ |
| 114227 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114228 | /* VFMADD213SDm */ |
| 114229 | FR64, FR64, FR64, f64mem, |
| 114230 | /* VFMADD213SDm_Int */ |
| 114231 | VR128, VR128, VR128, sdmem, |
| 114232 | /* VFMADD213SDr */ |
| 114233 | FR64, FR64, FR64, FR64, |
| 114234 | /* VFMADD213SDr_Int */ |
| 114235 | VR128, VR128, VR128, VR128, |
| 114236 | /* VFMADD213SHZm */ |
| 114237 | FR16X, FR16X, FR16X, f16mem, |
| 114238 | /* VFMADD213SHZm_Int */ |
| 114239 | VR128X, VR128X, VR128X, shmem, |
| 114240 | /* VFMADD213SHZmk_Int */ |
| 114241 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 114242 | /* VFMADD213SHZmkz_Int */ |
| 114243 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 114244 | /* VFMADD213SHZr */ |
| 114245 | FR16X, FR16X, FR16X, FR16X, |
| 114246 | /* VFMADD213SHZr_Int */ |
| 114247 | VR128X, VR128X, VR128X, VR128X, |
| 114248 | /* VFMADD213SHZrb */ |
| 114249 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 114250 | /* VFMADD213SHZrb_Int */ |
| 114251 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 114252 | /* VFMADD213SHZrbk_Int */ |
| 114253 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114254 | /* VFMADD213SHZrbkz_Int */ |
| 114255 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114256 | /* VFMADD213SHZrk_Int */ |
| 114257 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114258 | /* VFMADD213SHZrkz_Int */ |
| 114259 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114260 | /* VFMADD213SSZm */ |
| 114261 | FR32X, FR32X, FR32X, f32mem, |
| 114262 | /* VFMADD213SSZm_Int */ |
| 114263 | VR128X, VR128X, VR128X, ssmem, |
| 114264 | /* VFMADD213SSZmk_Int */ |
| 114265 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 114266 | /* VFMADD213SSZmkz_Int */ |
| 114267 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 114268 | /* VFMADD213SSZr */ |
| 114269 | FR32X, FR32X, FR32X, FR32X, |
| 114270 | /* VFMADD213SSZr_Int */ |
| 114271 | VR128X, VR128X, VR128X, VR128X, |
| 114272 | /* VFMADD213SSZrb */ |
| 114273 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 114274 | /* VFMADD213SSZrb_Int */ |
| 114275 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 114276 | /* VFMADD213SSZrbk_Int */ |
| 114277 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114278 | /* VFMADD213SSZrbkz_Int */ |
| 114279 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114280 | /* VFMADD213SSZrk_Int */ |
| 114281 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114282 | /* VFMADD213SSZrkz_Int */ |
| 114283 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114284 | /* VFMADD213SSm */ |
| 114285 | FR32, FR32, FR32, f32mem, |
| 114286 | /* VFMADD213SSm_Int */ |
| 114287 | VR128, VR128, VR128, ssmem, |
| 114288 | /* VFMADD213SSr */ |
| 114289 | FR32, FR32, FR32, FR32, |
| 114290 | /* VFMADD213SSr_Int */ |
| 114291 | VR128, VR128, VR128, VR128, |
| 114292 | /* VFMADD231BF16Z128m */ |
| 114293 | VR128X, VR128X, VR128X, f128mem, |
| 114294 | /* VFMADD231BF16Z128mb */ |
| 114295 | VR128X, VR128X, VR128X, f16mem, |
| 114296 | /* VFMADD231BF16Z128mbk */ |
| 114297 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 114298 | /* VFMADD231BF16Z128mbkz */ |
| 114299 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 114300 | /* VFMADD231BF16Z128mk */ |
| 114301 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 114302 | /* VFMADD231BF16Z128mkz */ |
| 114303 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 114304 | /* VFMADD231BF16Z128r */ |
| 114305 | VR128X, VR128X, VR128X, VR128X, |
| 114306 | /* VFMADD231BF16Z128rk */ |
| 114307 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 114308 | /* VFMADD231BF16Z128rkz */ |
| 114309 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 114310 | /* VFMADD231BF16Z256m */ |
| 114311 | VR256X, VR256X, VR256X, f256mem, |
| 114312 | /* VFMADD231BF16Z256mb */ |
| 114313 | VR256X, VR256X, VR256X, f16mem, |
| 114314 | /* VFMADD231BF16Z256mbk */ |
| 114315 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 114316 | /* VFMADD231BF16Z256mbkz */ |
| 114317 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 114318 | /* VFMADD231BF16Z256mk */ |
| 114319 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 114320 | /* VFMADD231BF16Z256mkz */ |
| 114321 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 114322 | /* VFMADD231BF16Z256r */ |
| 114323 | VR256X, VR256X, VR256X, VR256X, |
| 114324 | /* VFMADD231BF16Z256rk */ |
| 114325 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 114326 | /* VFMADD231BF16Z256rkz */ |
| 114327 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 114328 | /* VFMADD231BF16Zm */ |
| 114329 | VR512, VR512, VR512, f512mem, |
| 114330 | /* VFMADD231BF16Zmb */ |
| 114331 | VR512, VR512, VR512, f16mem, |
| 114332 | /* VFMADD231BF16Zmbk */ |
| 114333 | VR512, VR512, VK32WM, VR512, f16mem, |
| 114334 | /* VFMADD231BF16Zmbkz */ |
| 114335 | VR512, VR512, VK32WM, VR512, f16mem, |
| 114336 | /* VFMADD231BF16Zmk */ |
| 114337 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114338 | /* VFMADD231BF16Zmkz */ |
| 114339 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114340 | /* VFMADD231BF16Zr */ |
| 114341 | VR512, VR512, VR512, VR512, |
| 114342 | /* VFMADD231BF16Zrk */ |
| 114343 | VR512, VR512, VK32WM, VR512, VR512, |
| 114344 | /* VFMADD231BF16Zrkz */ |
| 114345 | VR512, VR512, VK32WM, VR512, VR512, |
| 114346 | /* VFMADD231PDYm */ |
| 114347 | VR256, VR256, VR256, f256mem, |
| 114348 | /* VFMADD231PDYr */ |
| 114349 | VR256, VR256, VR256, VR256, |
| 114350 | /* VFMADD231PDZ128m */ |
| 114351 | VR128X, VR128X, VR128X, f128mem, |
| 114352 | /* VFMADD231PDZ128mb */ |
| 114353 | VR128X, VR128X, VR128X, f64mem, |
| 114354 | /* VFMADD231PDZ128mbk */ |
| 114355 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 114356 | /* VFMADD231PDZ128mbkz */ |
| 114357 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 114358 | /* VFMADD231PDZ128mk */ |
| 114359 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 114360 | /* VFMADD231PDZ128mkz */ |
| 114361 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 114362 | /* VFMADD231PDZ128r */ |
| 114363 | VR128X, VR128X, VR128X, VR128X, |
| 114364 | /* VFMADD231PDZ128rk */ |
| 114365 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 114366 | /* VFMADD231PDZ128rkz */ |
| 114367 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 114368 | /* VFMADD231PDZ256m */ |
| 114369 | VR256X, VR256X, VR256X, f256mem, |
| 114370 | /* VFMADD231PDZ256mb */ |
| 114371 | VR256X, VR256X, VR256X, f64mem, |
| 114372 | /* VFMADD231PDZ256mbk */ |
| 114373 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 114374 | /* VFMADD231PDZ256mbkz */ |
| 114375 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 114376 | /* VFMADD231PDZ256mk */ |
| 114377 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 114378 | /* VFMADD231PDZ256mkz */ |
| 114379 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 114380 | /* VFMADD231PDZ256r */ |
| 114381 | VR256X, VR256X, VR256X, VR256X, |
| 114382 | /* VFMADD231PDZ256rk */ |
| 114383 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 114384 | /* VFMADD231PDZ256rkz */ |
| 114385 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 114386 | /* VFMADD231PDZm */ |
| 114387 | VR512, VR512, VR512, f512mem, |
| 114388 | /* VFMADD231PDZmb */ |
| 114389 | VR512, VR512, VR512, f64mem, |
| 114390 | /* VFMADD231PDZmbk */ |
| 114391 | VR512, VR512, VK8WM, VR512, f64mem, |
| 114392 | /* VFMADD231PDZmbkz */ |
| 114393 | VR512, VR512, VK8WM, VR512, f64mem, |
| 114394 | /* VFMADD231PDZmk */ |
| 114395 | VR512, VR512, VK8WM, VR512, f512mem, |
| 114396 | /* VFMADD231PDZmkz */ |
| 114397 | VR512, VR512, VK8WM, VR512, f512mem, |
| 114398 | /* VFMADD231PDZr */ |
| 114399 | VR512, VR512, VR512, VR512, |
| 114400 | /* VFMADD231PDZrb */ |
| 114401 | VR512, VR512, VR512, VR512, AVX512RC, |
| 114402 | /* VFMADD231PDZrbk */ |
| 114403 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 114404 | /* VFMADD231PDZrbkz */ |
| 114405 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 114406 | /* VFMADD231PDZrk */ |
| 114407 | VR512, VR512, VK8WM, VR512, VR512, |
| 114408 | /* VFMADD231PDZrkz */ |
| 114409 | VR512, VR512, VK8WM, VR512, VR512, |
| 114410 | /* VFMADD231PDm */ |
| 114411 | VR128, VR128, VR128, f128mem, |
| 114412 | /* VFMADD231PDr */ |
| 114413 | VR128, VR128, VR128, VR128, |
| 114414 | /* VFMADD231PHZ128m */ |
| 114415 | VR128X, VR128X, VR128X, f128mem, |
| 114416 | /* VFMADD231PHZ128mb */ |
| 114417 | VR128X, VR128X, VR128X, f16mem, |
| 114418 | /* VFMADD231PHZ128mbk */ |
| 114419 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 114420 | /* VFMADD231PHZ128mbkz */ |
| 114421 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 114422 | /* VFMADD231PHZ128mk */ |
| 114423 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 114424 | /* VFMADD231PHZ128mkz */ |
| 114425 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 114426 | /* VFMADD231PHZ128r */ |
| 114427 | VR128X, VR128X, VR128X, VR128X, |
| 114428 | /* VFMADD231PHZ128rk */ |
| 114429 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 114430 | /* VFMADD231PHZ128rkz */ |
| 114431 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 114432 | /* VFMADD231PHZ256m */ |
| 114433 | VR256X, VR256X, VR256X, f256mem, |
| 114434 | /* VFMADD231PHZ256mb */ |
| 114435 | VR256X, VR256X, VR256X, f16mem, |
| 114436 | /* VFMADD231PHZ256mbk */ |
| 114437 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 114438 | /* VFMADD231PHZ256mbkz */ |
| 114439 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 114440 | /* VFMADD231PHZ256mk */ |
| 114441 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 114442 | /* VFMADD231PHZ256mkz */ |
| 114443 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 114444 | /* VFMADD231PHZ256r */ |
| 114445 | VR256X, VR256X, VR256X, VR256X, |
| 114446 | /* VFMADD231PHZ256rk */ |
| 114447 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 114448 | /* VFMADD231PHZ256rkz */ |
| 114449 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 114450 | /* VFMADD231PHZm */ |
| 114451 | VR512, VR512, VR512, f512mem, |
| 114452 | /* VFMADD231PHZmb */ |
| 114453 | VR512, VR512, VR512, f16mem, |
| 114454 | /* VFMADD231PHZmbk */ |
| 114455 | VR512, VR512, VK32WM, VR512, f16mem, |
| 114456 | /* VFMADD231PHZmbkz */ |
| 114457 | VR512, VR512, VK32WM, VR512, f16mem, |
| 114458 | /* VFMADD231PHZmk */ |
| 114459 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114460 | /* VFMADD231PHZmkz */ |
| 114461 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114462 | /* VFMADD231PHZr */ |
| 114463 | VR512, VR512, VR512, VR512, |
| 114464 | /* VFMADD231PHZrb */ |
| 114465 | VR512, VR512, VR512, VR512, AVX512RC, |
| 114466 | /* VFMADD231PHZrbk */ |
| 114467 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 114468 | /* VFMADD231PHZrbkz */ |
| 114469 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 114470 | /* VFMADD231PHZrk */ |
| 114471 | VR512, VR512, VK32WM, VR512, VR512, |
| 114472 | /* VFMADD231PHZrkz */ |
| 114473 | VR512, VR512, VK32WM, VR512, VR512, |
| 114474 | /* VFMADD231PSYm */ |
| 114475 | VR256, VR256, VR256, f256mem, |
| 114476 | /* VFMADD231PSYr */ |
| 114477 | VR256, VR256, VR256, VR256, |
| 114478 | /* VFMADD231PSZ128m */ |
| 114479 | VR128X, VR128X, VR128X, f128mem, |
| 114480 | /* VFMADD231PSZ128mb */ |
| 114481 | VR128X, VR128X, VR128X, f32mem, |
| 114482 | /* VFMADD231PSZ128mbk */ |
| 114483 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 114484 | /* VFMADD231PSZ128mbkz */ |
| 114485 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 114486 | /* VFMADD231PSZ128mk */ |
| 114487 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 114488 | /* VFMADD231PSZ128mkz */ |
| 114489 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 114490 | /* VFMADD231PSZ128r */ |
| 114491 | VR128X, VR128X, VR128X, VR128X, |
| 114492 | /* VFMADD231PSZ128rk */ |
| 114493 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 114494 | /* VFMADD231PSZ128rkz */ |
| 114495 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 114496 | /* VFMADD231PSZ256m */ |
| 114497 | VR256X, VR256X, VR256X, f256mem, |
| 114498 | /* VFMADD231PSZ256mb */ |
| 114499 | VR256X, VR256X, VR256X, f32mem, |
| 114500 | /* VFMADD231PSZ256mbk */ |
| 114501 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 114502 | /* VFMADD231PSZ256mbkz */ |
| 114503 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 114504 | /* VFMADD231PSZ256mk */ |
| 114505 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 114506 | /* VFMADD231PSZ256mkz */ |
| 114507 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 114508 | /* VFMADD231PSZ256r */ |
| 114509 | VR256X, VR256X, VR256X, VR256X, |
| 114510 | /* VFMADD231PSZ256rk */ |
| 114511 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 114512 | /* VFMADD231PSZ256rkz */ |
| 114513 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 114514 | /* VFMADD231PSZm */ |
| 114515 | VR512, VR512, VR512, f512mem, |
| 114516 | /* VFMADD231PSZmb */ |
| 114517 | VR512, VR512, VR512, f32mem, |
| 114518 | /* VFMADD231PSZmbk */ |
| 114519 | VR512, VR512, VK16WM, VR512, f32mem, |
| 114520 | /* VFMADD231PSZmbkz */ |
| 114521 | VR512, VR512, VK16WM, VR512, f32mem, |
| 114522 | /* VFMADD231PSZmk */ |
| 114523 | VR512, VR512, VK16WM, VR512, f512mem, |
| 114524 | /* VFMADD231PSZmkz */ |
| 114525 | VR512, VR512, VK16WM, VR512, f512mem, |
| 114526 | /* VFMADD231PSZr */ |
| 114527 | VR512, VR512, VR512, VR512, |
| 114528 | /* VFMADD231PSZrb */ |
| 114529 | VR512, VR512, VR512, VR512, AVX512RC, |
| 114530 | /* VFMADD231PSZrbk */ |
| 114531 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 114532 | /* VFMADD231PSZrbkz */ |
| 114533 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 114534 | /* VFMADD231PSZrk */ |
| 114535 | VR512, VR512, VK16WM, VR512, VR512, |
| 114536 | /* VFMADD231PSZrkz */ |
| 114537 | VR512, VR512, VK16WM, VR512, VR512, |
| 114538 | /* VFMADD231PSm */ |
| 114539 | VR128, VR128, VR128, f128mem, |
| 114540 | /* VFMADD231PSr */ |
| 114541 | VR128, VR128, VR128, VR128, |
| 114542 | /* VFMADD231SDZm */ |
| 114543 | FR64X, FR64X, FR64X, f64mem, |
| 114544 | /* VFMADD231SDZm_Int */ |
| 114545 | VR128X, VR128X, VR128X, sdmem, |
| 114546 | /* VFMADD231SDZmk_Int */ |
| 114547 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 114548 | /* VFMADD231SDZmkz_Int */ |
| 114549 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 114550 | /* VFMADD231SDZr */ |
| 114551 | FR64X, FR64X, FR64X, FR64X, |
| 114552 | /* VFMADD231SDZr_Int */ |
| 114553 | VR128X, VR128X, VR128X, VR128X, |
| 114554 | /* VFMADD231SDZrb */ |
| 114555 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 114556 | /* VFMADD231SDZrb_Int */ |
| 114557 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 114558 | /* VFMADD231SDZrbk_Int */ |
| 114559 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114560 | /* VFMADD231SDZrbkz_Int */ |
| 114561 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114562 | /* VFMADD231SDZrk_Int */ |
| 114563 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114564 | /* VFMADD231SDZrkz_Int */ |
| 114565 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114566 | /* VFMADD231SDm */ |
| 114567 | FR64, FR64, FR64, f64mem, |
| 114568 | /* VFMADD231SDm_Int */ |
| 114569 | VR128, VR128, VR128, sdmem, |
| 114570 | /* VFMADD231SDr */ |
| 114571 | FR64, FR64, FR64, FR64, |
| 114572 | /* VFMADD231SDr_Int */ |
| 114573 | VR128, VR128, VR128, VR128, |
| 114574 | /* VFMADD231SHZm */ |
| 114575 | FR16X, FR16X, FR16X, f16mem, |
| 114576 | /* VFMADD231SHZm_Int */ |
| 114577 | VR128X, VR128X, VR128X, shmem, |
| 114578 | /* VFMADD231SHZmk_Int */ |
| 114579 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 114580 | /* VFMADD231SHZmkz_Int */ |
| 114581 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 114582 | /* VFMADD231SHZr */ |
| 114583 | FR16X, FR16X, FR16X, FR16X, |
| 114584 | /* VFMADD231SHZr_Int */ |
| 114585 | VR128X, VR128X, VR128X, VR128X, |
| 114586 | /* VFMADD231SHZrb */ |
| 114587 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 114588 | /* VFMADD231SHZrb_Int */ |
| 114589 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 114590 | /* VFMADD231SHZrbk_Int */ |
| 114591 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114592 | /* VFMADD231SHZrbkz_Int */ |
| 114593 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114594 | /* VFMADD231SHZrk_Int */ |
| 114595 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114596 | /* VFMADD231SHZrkz_Int */ |
| 114597 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114598 | /* VFMADD231SSZm */ |
| 114599 | FR32X, FR32X, FR32X, f32mem, |
| 114600 | /* VFMADD231SSZm_Int */ |
| 114601 | VR128X, VR128X, VR128X, ssmem, |
| 114602 | /* VFMADD231SSZmk_Int */ |
| 114603 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 114604 | /* VFMADD231SSZmkz_Int */ |
| 114605 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 114606 | /* VFMADD231SSZr */ |
| 114607 | FR32X, FR32X, FR32X, FR32X, |
| 114608 | /* VFMADD231SSZr_Int */ |
| 114609 | VR128X, VR128X, VR128X, VR128X, |
| 114610 | /* VFMADD231SSZrb */ |
| 114611 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 114612 | /* VFMADD231SSZrb_Int */ |
| 114613 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 114614 | /* VFMADD231SSZrbk_Int */ |
| 114615 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114616 | /* VFMADD231SSZrbkz_Int */ |
| 114617 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114618 | /* VFMADD231SSZrk_Int */ |
| 114619 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114620 | /* VFMADD231SSZrkz_Int */ |
| 114621 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114622 | /* VFMADD231SSm */ |
| 114623 | FR32, FR32, FR32, f32mem, |
| 114624 | /* VFMADD231SSm_Int */ |
| 114625 | VR128, VR128, VR128, ssmem, |
| 114626 | /* VFMADD231SSr */ |
| 114627 | FR32, FR32, FR32, FR32, |
| 114628 | /* VFMADD231SSr_Int */ |
| 114629 | VR128, VR128, VR128, VR128, |
| 114630 | /* VFMADDCPHZ128m */ |
| 114631 | VR128X, VR128X, VR128X, f128mem, |
| 114632 | /* VFMADDCPHZ128mb */ |
| 114633 | VR128X, VR128X, VR128X, f32mem, |
| 114634 | /* VFMADDCPHZ128mbk */ |
| 114635 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 114636 | /* VFMADDCPHZ128mbkz */ |
| 114637 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 114638 | /* VFMADDCPHZ128mk */ |
| 114639 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 114640 | /* VFMADDCPHZ128mkz */ |
| 114641 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 114642 | /* VFMADDCPHZ128r */ |
| 114643 | VR128X, VR128X, VR128X, VR128X, |
| 114644 | /* VFMADDCPHZ128rk */ |
| 114645 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 114646 | /* VFMADDCPHZ128rkz */ |
| 114647 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 114648 | /* VFMADDCPHZ256m */ |
| 114649 | VR256X, VR256X, VR256X, f256mem, |
| 114650 | /* VFMADDCPHZ256mb */ |
| 114651 | VR256X, VR256X, VR256X, f32mem, |
| 114652 | /* VFMADDCPHZ256mbk */ |
| 114653 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 114654 | /* VFMADDCPHZ256mbkz */ |
| 114655 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 114656 | /* VFMADDCPHZ256mk */ |
| 114657 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 114658 | /* VFMADDCPHZ256mkz */ |
| 114659 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 114660 | /* VFMADDCPHZ256r */ |
| 114661 | VR256X, VR256X, VR256X, VR256X, |
| 114662 | /* VFMADDCPHZ256rk */ |
| 114663 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 114664 | /* VFMADDCPHZ256rkz */ |
| 114665 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 114666 | /* VFMADDCPHZm */ |
| 114667 | VR512, VR512, VR512, f512mem, |
| 114668 | /* VFMADDCPHZmb */ |
| 114669 | VR512, VR512, VR512, f32mem, |
| 114670 | /* VFMADDCPHZmbk */ |
| 114671 | VR512, VR512, VK16WM, VR512, f32mem, |
| 114672 | /* VFMADDCPHZmbkz */ |
| 114673 | VR512, VR512, VK16WM, VR512, f32mem, |
| 114674 | /* VFMADDCPHZmk */ |
| 114675 | VR512, VR512, VK16WM, VR512, f512mem, |
| 114676 | /* VFMADDCPHZmkz */ |
| 114677 | VR512, VR512, VK16WM, VR512, f512mem, |
| 114678 | /* VFMADDCPHZr */ |
| 114679 | VR512, VR512, VR512, VR512, |
| 114680 | /* VFMADDCPHZrb */ |
| 114681 | VR512, VR512, VR512, VR512, AVX512RC, |
| 114682 | /* VFMADDCPHZrbk */ |
| 114683 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 114684 | /* VFMADDCPHZrbkz */ |
| 114685 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 114686 | /* VFMADDCPHZrk */ |
| 114687 | VR512, VR512, VK16WM, VR512, VR512, |
| 114688 | /* VFMADDCPHZrkz */ |
| 114689 | VR512, VR512, VK16WM, VR512, VR512, |
| 114690 | /* VFMADDCSHZm */ |
| 114691 | VR128X, VR128X, VR128X, ssmem, |
| 114692 | /* VFMADDCSHZmk */ |
| 114693 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 114694 | /* VFMADDCSHZmkz */ |
| 114695 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 114696 | /* VFMADDCSHZr */ |
| 114697 | VR128X, VR128X, VR128X, VR128X, |
| 114698 | /* VFMADDCSHZrb */ |
| 114699 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 114700 | /* VFMADDCSHZrbk */ |
| 114701 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114702 | /* VFMADDCSHZrbkz */ |
| 114703 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114704 | /* VFMADDCSHZrk */ |
| 114705 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114706 | /* VFMADDCSHZrkz */ |
| 114707 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114708 | /* VFMADDPD4Ymr */ |
| 114709 | VR256, VR256, f256mem, VR256, |
| 114710 | /* VFMADDPD4Yrm */ |
| 114711 | VR256, VR256, VR256, f256mem, |
| 114712 | /* VFMADDPD4Yrr */ |
| 114713 | VR256, VR256, VR256, VR256, |
| 114714 | /* VFMADDPD4Yrr_REV */ |
| 114715 | VR256, VR256, VR256, VR256, |
| 114716 | /* VFMADDPD4mr */ |
| 114717 | VR128, VR128, f128mem, VR128, |
| 114718 | /* VFMADDPD4rm */ |
| 114719 | VR128, VR128, VR128, f128mem, |
| 114720 | /* VFMADDPD4rr */ |
| 114721 | VR128, VR128, VR128, VR128, |
| 114722 | /* VFMADDPD4rr_REV */ |
| 114723 | VR128, VR128, VR128, VR128, |
| 114724 | /* VFMADDPS4Ymr */ |
| 114725 | VR256, VR256, f256mem, VR256, |
| 114726 | /* VFMADDPS4Yrm */ |
| 114727 | VR256, VR256, VR256, f256mem, |
| 114728 | /* VFMADDPS4Yrr */ |
| 114729 | VR256, VR256, VR256, VR256, |
| 114730 | /* VFMADDPS4Yrr_REV */ |
| 114731 | VR256, VR256, VR256, VR256, |
| 114732 | /* VFMADDPS4mr */ |
| 114733 | VR128, VR128, f128mem, VR128, |
| 114734 | /* VFMADDPS4rm */ |
| 114735 | VR128, VR128, VR128, f128mem, |
| 114736 | /* VFMADDPS4rr */ |
| 114737 | VR128, VR128, VR128, VR128, |
| 114738 | /* VFMADDPS4rr_REV */ |
| 114739 | VR128, VR128, VR128, VR128, |
| 114740 | /* VFMADDSD4mr */ |
| 114741 | FR64, FR64, f64mem, FR64, |
| 114742 | /* VFMADDSD4mr_Int */ |
| 114743 | VR128, VR128, sdmem, VR128, |
| 114744 | /* VFMADDSD4rm */ |
| 114745 | FR64, FR64, FR64, f64mem, |
| 114746 | /* VFMADDSD4rm_Int */ |
| 114747 | VR128, VR128, VR128, sdmem, |
| 114748 | /* VFMADDSD4rr */ |
| 114749 | FR64, FR64, FR64, FR64, |
| 114750 | /* VFMADDSD4rr_Int */ |
| 114751 | VR128, VR128, VR128, VR128, |
| 114752 | /* VFMADDSD4rr_Int_REV */ |
| 114753 | VR128, VR128, VR128, VR128, |
| 114754 | /* VFMADDSD4rr_REV */ |
| 114755 | FR64, FR64, FR64, FR64, |
| 114756 | /* VFMADDSS4mr */ |
| 114757 | FR32, FR32, f32mem, FR32, |
| 114758 | /* VFMADDSS4mr_Int */ |
| 114759 | VR128, VR128, ssmem, VR128, |
| 114760 | /* VFMADDSS4rm */ |
| 114761 | FR32, FR32, FR32, f32mem, |
| 114762 | /* VFMADDSS4rm_Int */ |
| 114763 | VR128, VR128, VR128, ssmem, |
| 114764 | /* VFMADDSS4rr */ |
| 114765 | FR32, FR32, FR32, FR32, |
| 114766 | /* VFMADDSS4rr_Int */ |
| 114767 | VR128, VR128, VR128, VR128, |
| 114768 | /* VFMADDSS4rr_Int_REV */ |
| 114769 | VR128, VR128, VR128, VR128, |
| 114770 | /* VFMADDSS4rr_REV */ |
| 114771 | FR32, FR32, FR32, FR32, |
| 114772 | /* VFMADDSUB132PDYm */ |
| 114773 | VR256, VR256, VR256, f256mem, |
| 114774 | /* VFMADDSUB132PDYr */ |
| 114775 | VR256, VR256, VR256, VR256, |
| 114776 | /* VFMADDSUB132PDZ128m */ |
| 114777 | VR128X, VR128X, VR128X, f128mem, |
| 114778 | /* VFMADDSUB132PDZ128mb */ |
| 114779 | VR128X, VR128X, VR128X, f64mem, |
| 114780 | /* VFMADDSUB132PDZ128mbk */ |
| 114781 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 114782 | /* VFMADDSUB132PDZ128mbkz */ |
| 114783 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 114784 | /* VFMADDSUB132PDZ128mk */ |
| 114785 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 114786 | /* VFMADDSUB132PDZ128mkz */ |
| 114787 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 114788 | /* VFMADDSUB132PDZ128r */ |
| 114789 | VR128X, VR128X, VR128X, VR128X, |
| 114790 | /* VFMADDSUB132PDZ128rk */ |
| 114791 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 114792 | /* VFMADDSUB132PDZ128rkz */ |
| 114793 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 114794 | /* VFMADDSUB132PDZ256m */ |
| 114795 | VR256X, VR256X, VR256X, f256mem, |
| 114796 | /* VFMADDSUB132PDZ256mb */ |
| 114797 | VR256X, VR256X, VR256X, f64mem, |
| 114798 | /* VFMADDSUB132PDZ256mbk */ |
| 114799 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 114800 | /* VFMADDSUB132PDZ256mbkz */ |
| 114801 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 114802 | /* VFMADDSUB132PDZ256mk */ |
| 114803 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 114804 | /* VFMADDSUB132PDZ256mkz */ |
| 114805 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 114806 | /* VFMADDSUB132PDZ256r */ |
| 114807 | VR256X, VR256X, VR256X, VR256X, |
| 114808 | /* VFMADDSUB132PDZ256rk */ |
| 114809 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 114810 | /* VFMADDSUB132PDZ256rkz */ |
| 114811 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 114812 | /* VFMADDSUB132PDZm */ |
| 114813 | VR512, VR512, VR512, f512mem, |
| 114814 | /* VFMADDSUB132PDZmb */ |
| 114815 | VR512, VR512, VR512, f64mem, |
| 114816 | /* VFMADDSUB132PDZmbk */ |
| 114817 | VR512, VR512, VK8WM, VR512, f64mem, |
| 114818 | /* VFMADDSUB132PDZmbkz */ |
| 114819 | VR512, VR512, VK8WM, VR512, f64mem, |
| 114820 | /* VFMADDSUB132PDZmk */ |
| 114821 | VR512, VR512, VK8WM, VR512, f512mem, |
| 114822 | /* VFMADDSUB132PDZmkz */ |
| 114823 | VR512, VR512, VK8WM, VR512, f512mem, |
| 114824 | /* VFMADDSUB132PDZr */ |
| 114825 | VR512, VR512, VR512, VR512, |
| 114826 | /* VFMADDSUB132PDZrb */ |
| 114827 | VR512, VR512, VR512, VR512, AVX512RC, |
| 114828 | /* VFMADDSUB132PDZrbk */ |
| 114829 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 114830 | /* VFMADDSUB132PDZrbkz */ |
| 114831 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 114832 | /* VFMADDSUB132PDZrk */ |
| 114833 | VR512, VR512, VK8WM, VR512, VR512, |
| 114834 | /* VFMADDSUB132PDZrkz */ |
| 114835 | VR512, VR512, VK8WM, VR512, VR512, |
| 114836 | /* VFMADDSUB132PDm */ |
| 114837 | VR128, VR128, VR128, f128mem, |
| 114838 | /* VFMADDSUB132PDr */ |
| 114839 | VR128, VR128, VR128, VR128, |
| 114840 | /* VFMADDSUB132PHZ128m */ |
| 114841 | VR128X, VR128X, VR128X, f128mem, |
| 114842 | /* VFMADDSUB132PHZ128mb */ |
| 114843 | VR128X, VR128X, VR128X, f16mem, |
| 114844 | /* VFMADDSUB132PHZ128mbk */ |
| 114845 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 114846 | /* VFMADDSUB132PHZ128mbkz */ |
| 114847 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 114848 | /* VFMADDSUB132PHZ128mk */ |
| 114849 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 114850 | /* VFMADDSUB132PHZ128mkz */ |
| 114851 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 114852 | /* VFMADDSUB132PHZ128r */ |
| 114853 | VR128X, VR128X, VR128X, VR128X, |
| 114854 | /* VFMADDSUB132PHZ128rk */ |
| 114855 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 114856 | /* VFMADDSUB132PHZ128rkz */ |
| 114857 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 114858 | /* VFMADDSUB132PHZ256m */ |
| 114859 | VR256X, VR256X, VR256X, f256mem, |
| 114860 | /* VFMADDSUB132PHZ256mb */ |
| 114861 | VR256X, VR256X, VR256X, f16mem, |
| 114862 | /* VFMADDSUB132PHZ256mbk */ |
| 114863 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 114864 | /* VFMADDSUB132PHZ256mbkz */ |
| 114865 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 114866 | /* VFMADDSUB132PHZ256mk */ |
| 114867 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 114868 | /* VFMADDSUB132PHZ256mkz */ |
| 114869 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 114870 | /* VFMADDSUB132PHZ256r */ |
| 114871 | VR256X, VR256X, VR256X, VR256X, |
| 114872 | /* VFMADDSUB132PHZ256rk */ |
| 114873 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 114874 | /* VFMADDSUB132PHZ256rkz */ |
| 114875 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 114876 | /* VFMADDSUB132PHZm */ |
| 114877 | VR512, VR512, VR512, f512mem, |
| 114878 | /* VFMADDSUB132PHZmb */ |
| 114879 | VR512, VR512, VR512, f16mem, |
| 114880 | /* VFMADDSUB132PHZmbk */ |
| 114881 | VR512, VR512, VK32WM, VR512, f16mem, |
| 114882 | /* VFMADDSUB132PHZmbkz */ |
| 114883 | VR512, VR512, VK32WM, VR512, f16mem, |
| 114884 | /* VFMADDSUB132PHZmk */ |
| 114885 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114886 | /* VFMADDSUB132PHZmkz */ |
| 114887 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114888 | /* VFMADDSUB132PHZr */ |
| 114889 | VR512, VR512, VR512, VR512, |
| 114890 | /* VFMADDSUB132PHZrb */ |
| 114891 | VR512, VR512, VR512, VR512, AVX512RC, |
| 114892 | /* VFMADDSUB132PHZrbk */ |
| 114893 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 114894 | /* VFMADDSUB132PHZrbkz */ |
| 114895 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 114896 | /* VFMADDSUB132PHZrk */ |
| 114897 | VR512, VR512, VK32WM, VR512, VR512, |
| 114898 | /* VFMADDSUB132PHZrkz */ |
| 114899 | VR512, VR512, VK32WM, VR512, VR512, |
| 114900 | /* VFMADDSUB132PSYm */ |
| 114901 | VR256, VR256, VR256, f256mem, |
| 114902 | /* VFMADDSUB132PSYr */ |
| 114903 | VR256, VR256, VR256, VR256, |
| 114904 | /* VFMADDSUB132PSZ128m */ |
| 114905 | VR128X, VR128X, VR128X, f128mem, |
| 114906 | /* VFMADDSUB132PSZ128mb */ |
| 114907 | VR128X, VR128X, VR128X, f32mem, |
| 114908 | /* VFMADDSUB132PSZ128mbk */ |
| 114909 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 114910 | /* VFMADDSUB132PSZ128mbkz */ |
| 114911 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 114912 | /* VFMADDSUB132PSZ128mk */ |
| 114913 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 114914 | /* VFMADDSUB132PSZ128mkz */ |
| 114915 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 114916 | /* VFMADDSUB132PSZ128r */ |
| 114917 | VR128X, VR128X, VR128X, VR128X, |
| 114918 | /* VFMADDSUB132PSZ128rk */ |
| 114919 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 114920 | /* VFMADDSUB132PSZ128rkz */ |
| 114921 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 114922 | /* VFMADDSUB132PSZ256m */ |
| 114923 | VR256X, VR256X, VR256X, f256mem, |
| 114924 | /* VFMADDSUB132PSZ256mb */ |
| 114925 | VR256X, VR256X, VR256X, f32mem, |
| 114926 | /* VFMADDSUB132PSZ256mbk */ |
| 114927 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 114928 | /* VFMADDSUB132PSZ256mbkz */ |
| 114929 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 114930 | /* VFMADDSUB132PSZ256mk */ |
| 114931 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 114932 | /* VFMADDSUB132PSZ256mkz */ |
| 114933 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 114934 | /* VFMADDSUB132PSZ256r */ |
| 114935 | VR256X, VR256X, VR256X, VR256X, |
| 114936 | /* VFMADDSUB132PSZ256rk */ |
| 114937 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 114938 | /* VFMADDSUB132PSZ256rkz */ |
| 114939 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 114940 | /* VFMADDSUB132PSZm */ |
| 114941 | VR512, VR512, VR512, f512mem, |
| 114942 | /* VFMADDSUB132PSZmb */ |
| 114943 | VR512, VR512, VR512, f32mem, |
| 114944 | /* VFMADDSUB132PSZmbk */ |
| 114945 | VR512, VR512, VK16WM, VR512, f32mem, |
| 114946 | /* VFMADDSUB132PSZmbkz */ |
| 114947 | VR512, VR512, VK16WM, VR512, f32mem, |
| 114948 | /* VFMADDSUB132PSZmk */ |
| 114949 | VR512, VR512, VK16WM, VR512, f512mem, |
| 114950 | /* VFMADDSUB132PSZmkz */ |
| 114951 | VR512, VR512, VK16WM, VR512, f512mem, |
| 114952 | /* VFMADDSUB132PSZr */ |
| 114953 | VR512, VR512, VR512, VR512, |
| 114954 | /* VFMADDSUB132PSZrb */ |
| 114955 | VR512, VR512, VR512, VR512, AVX512RC, |
| 114956 | /* VFMADDSUB132PSZrbk */ |
| 114957 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 114958 | /* VFMADDSUB132PSZrbkz */ |
| 114959 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 114960 | /* VFMADDSUB132PSZrk */ |
| 114961 | VR512, VR512, VK16WM, VR512, VR512, |
| 114962 | /* VFMADDSUB132PSZrkz */ |
| 114963 | VR512, VR512, VK16WM, VR512, VR512, |
| 114964 | /* VFMADDSUB132PSm */ |
| 114965 | VR128, VR128, VR128, f128mem, |
| 114966 | /* VFMADDSUB132PSr */ |
| 114967 | VR128, VR128, VR128, VR128, |
| 114968 | /* VFMADDSUB213PDYm */ |
| 114969 | VR256, VR256, VR256, f256mem, |
| 114970 | /* VFMADDSUB213PDYr */ |
| 114971 | VR256, VR256, VR256, VR256, |
| 114972 | /* VFMADDSUB213PDZ128m */ |
| 114973 | VR128X, VR128X, VR128X, f128mem, |
| 114974 | /* VFMADDSUB213PDZ128mb */ |
| 114975 | VR128X, VR128X, VR128X, f64mem, |
| 114976 | /* VFMADDSUB213PDZ128mbk */ |
| 114977 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 114978 | /* VFMADDSUB213PDZ128mbkz */ |
| 114979 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 114980 | /* VFMADDSUB213PDZ128mk */ |
| 114981 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 114982 | /* VFMADDSUB213PDZ128mkz */ |
| 114983 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 114984 | /* VFMADDSUB213PDZ128r */ |
| 114985 | VR128X, VR128X, VR128X, VR128X, |
| 114986 | /* VFMADDSUB213PDZ128rk */ |
| 114987 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 114988 | /* VFMADDSUB213PDZ128rkz */ |
| 114989 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 114990 | /* VFMADDSUB213PDZ256m */ |
| 114991 | VR256X, VR256X, VR256X, f256mem, |
| 114992 | /* VFMADDSUB213PDZ256mb */ |
| 114993 | VR256X, VR256X, VR256X, f64mem, |
| 114994 | /* VFMADDSUB213PDZ256mbk */ |
| 114995 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 114996 | /* VFMADDSUB213PDZ256mbkz */ |
| 114997 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 114998 | /* VFMADDSUB213PDZ256mk */ |
| 114999 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 115000 | /* VFMADDSUB213PDZ256mkz */ |
| 115001 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 115002 | /* VFMADDSUB213PDZ256r */ |
| 115003 | VR256X, VR256X, VR256X, VR256X, |
| 115004 | /* VFMADDSUB213PDZ256rk */ |
| 115005 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 115006 | /* VFMADDSUB213PDZ256rkz */ |
| 115007 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 115008 | /* VFMADDSUB213PDZm */ |
| 115009 | VR512, VR512, VR512, f512mem, |
| 115010 | /* VFMADDSUB213PDZmb */ |
| 115011 | VR512, VR512, VR512, f64mem, |
| 115012 | /* VFMADDSUB213PDZmbk */ |
| 115013 | VR512, VR512, VK8WM, VR512, f64mem, |
| 115014 | /* VFMADDSUB213PDZmbkz */ |
| 115015 | VR512, VR512, VK8WM, VR512, f64mem, |
| 115016 | /* VFMADDSUB213PDZmk */ |
| 115017 | VR512, VR512, VK8WM, VR512, f512mem, |
| 115018 | /* VFMADDSUB213PDZmkz */ |
| 115019 | VR512, VR512, VK8WM, VR512, f512mem, |
| 115020 | /* VFMADDSUB213PDZr */ |
| 115021 | VR512, VR512, VR512, VR512, |
| 115022 | /* VFMADDSUB213PDZrb */ |
| 115023 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115024 | /* VFMADDSUB213PDZrbk */ |
| 115025 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 115026 | /* VFMADDSUB213PDZrbkz */ |
| 115027 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 115028 | /* VFMADDSUB213PDZrk */ |
| 115029 | VR512, VR512, VK8WM, VR512, VR512, |
| 115030 | /* VFMADDSUB213PDZrkz */ |
| 115031 | VR512, VR512, VK8WM, VR512, VR512, |
| 115032 | /* VFMADDSUB213PDm */ |
| 115033 | VR128, VR128, VR128, f128mem, |
| 115034 | /* VFMADDSUB213PDr */ |
| 115035 | VR128, VR128, VR128, VR128, |
| 115036 | /* VFMADDSUB213PHZ128m */ |
| 115037 | VR128X, VR128X, VR128X, f128mem, |
| 115038 | /* VFMADDSUB213PHZ128mb */ |
| 115039 | VR128X, VR128X, VR128X, f16mem, |
| 115040 | /* VFMADDSUB213PHZ128mbk */ |
| 115041 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115042 | /* VFMADDSUB213PHZ128mbkz */ |
| 115043 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115044 | /* VFMADDSUB213PHZ128mk */ |
| 115045 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115046 | /* VFMADDSUB213PHZ128mkz */ |
| 115047 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115048 | /* VFMADDSUB213PHZ128r */ |
| 115049 | VR128X, VR128X, VR128X, VR128X, |
| 115050 | /* VFMADDSUB213PHZ128rk */ |
| 115051 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115052 | /* VFMADDSUB213PHZ128rkz */ |
| 115053 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115054 | /* VFMADDSUB213PHZ256m */ |
| 115055 | VR256X, VR256X, VR256X, f256mem, |
| 115056 | /* VFMADDSUB213PHZ256mb */ |
| 115057 | VR256X, VR256X, VR256X, f16mem, |
| 115058 | /* VFMADDSUB213PHZ256mbk */ |
| 115059 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115060 | /* VFMADDSUB213PHZ256mbkz */ |
| 115061 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115062 | /* VFMADDSUB213PHZ256mk */ |
| 115063 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115064 | /* VFMADDSUB213PHZ256mkz */ |
| 115065 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115066 | /* VFMADDSUB213PHZ256r */ |
| 115067 | VR256X, VR256X, VR256X, VR256X, |
| 115068 | /* VFMADDSUB213PHZ256rk */ |
| 115069 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115070 | /* VFMADDSUB213PHZ256rkz */ |
| 115071 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115072 | /* VFMADDSUB213PHZm */ |
| 115073 | VR512, VR512, VR512, f512mem, |
| 115074 | /* VFMADDSUB213PHZmb */ |
| 115075 | VR512, VR512, VR512, f16mem, |
| 115076 | /* VFMADDSUB213PHZmbk */ |
| 115077 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115078 | /* VFMADDSUB213PHZmbkz */ |
| 115079 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115080 | /* VFMADDSUB213PHZmk */ |
| 115081 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115082 | /* VFMADDSUB213PHZmkz */ |
| 115083 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115084 | /* VFMADDSUB213PHZr */ |
| 115085 | VR512, VR512, VR512, VR512, |
| 115086 | /* VFMADDSUB213PHZrb */ |
| 115087 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115088 | /* VFMADDSUB213PHZrbk */ |
| 115089 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 115090 | /* VFMADDSUB213PHZrbkz */ |
| 115091 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 115092 | /* VFMADDSUB213PHZrk */ |
| 115093 | VR512, VR512, VK32WM, VR512, VR512, |
| 115094 | /* VFMADDSUB213PHZrkz */ |
| 115095 | VR512, VR512, VK32WM, VR512, VR512, |
| 115096 | /* VFMADDSUB213PSYm */ |
| 115097 | VR256, VR256, VR256, f256mem, |
| 115098 | /* VFMADDSUB213PSYr */ |
| 115099 | VR256, VR256, VR256, VR256, |
| 115100 | /* VFMADDSUB213PSZ128m */ |
| 115101 | VR128X, VR128X, VR128X, f128mem, |
| 115102 | /* VFMADDSUB213PSZ128mb */ |
| 115103 | VR128X, VR128X, VR128X, f32mem, |
| 115104 | /* VFMADDSUB213PSZ128mbk */ |
| 115105 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 115106 | /* VFMADDSUB213PSZ128mbkz */ |
| 115107 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 115108 | /* VFMADDSUB213PSZ128mk */ |
| 115109 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 115110 | /* VFMADDSUB213PSZ128mkz */ |
| 115111 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 115112 | /* VFMADDSUB213PSZ128r */ |
| 115113 | VR128X, VR128X, VR128X, VR128X, |
| 115114 | /* VFMADDSUB213PSZ128rk */ |
| 115115 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 115116 | /* VFMADDSUB213PSZ128rkz */ |
| 115117 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 115118 | /* VFMADDSUB213PSZ256m */ |
| 115119 | VR256X, VR256X, VR256X, f256mem, |
| 115120 | /* VFMADDSUB213PSZ256mb */ |
| 115121 | VR256X, VR256X, VR256X, f32mem, |
| 115122 | /* VFMADDSUB213PSZ256mbk */ |
| 115123 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 115124 | /* VFMADDSUB213PSZ256mbkz */ |
| 115125 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 115126 | /* VFMADDSUB213PSZ256mk */ |
| 115127 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 115128 | /* VFMADDSUB213PSZ256mkz */ |
| 115129 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 115130 | /* VFMADDSUB213PSZ256r */ |
| 115131 | VR256X, VR256X, VR256X, VR256X, |
| 115132 | /* VFMADDSUB213PSZ256rk */ |
| 115133 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 115134 | /* VFMADDSUB213PSZ256rkz */ |
| 115135 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 115136 | /* VFMADDSUB213PSZm */ |
| 115137 | VR512, VR512, VR512, f512mem, |
| 115138 | /* VFMADDSUB213PSZmb */ |
| 115139 | VR512, VR512, VR512, f32mem, |
| 115140 | /* VFMADDSUB213PSZmbk */ |
| 115141 | VR512, VR512, VK16WM, VR512, f32mem, |
| 115142 | /* VFMADDSUB213PSZmbkz */ |
| 115143 | VR512, VR512, VK16WM, VR512, f32mem, |
| 115144 | /* VFMADDSUB213PSZmk */ |
| 115145 | VR512, VR512, VK16WM, VR512, f512mem, |
| 115146 | /* VFMADDSUB213PSZmkz */ |
| 115147 | VR512, VR512, VK16WM, VR512, f512mem, |
| 115148 | /* VFMADDSUB213PSZr */ |
| 115149 | VR512, VR512, VR512, VR512, |
| 115150 | /* VFMADDSUB213PSZrb */ |
| 115151 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115152 | /* VFMADDSUB213PSZrbk */ |
| 115153 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 115154 | /* VFMADDSUB213PSZrbkz */ |
| 115155 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 115156 | /* VFMADDSUB213PSZrk */ |
| 115157 | VR512, VR512, VK16WM, VR512, VR512, |
| 115158 | /* VFMADDSUB213PSZrkz */ |
| 115159 | VR512, VR512, VK16WM, VR512, VR512, |
| 115160 | /* VFMADDSUB213PSm */ |
| 115161 | VR128, VR128, VR128, f128mem, |
| 115162 | /* VFMADDSUB213PSr */ |
| 115163 | VR128, VR128, VR128, VR128, |
| 115164 | /* VFMADDSUB231PDYm */ |
| 115165 | VR256, VR256, VR256, f256mem, |
| 115166 | /* VFMADDSUB231PDYr */ |
| 115167 | VR256, VR256, VR256, VR256, |
| 115168 | /* VFMADDSUB231PDZ128m */ |
| 115169 | VR128X, VR128X, VR128X, f128mem, |
| 115170 | /* VFMADDSUB231PDZ128mb */ |
| 115171 | VR128X, VR128X, VR128X, f64mem, |
| 115172 | /* VFMADDSUB231PDZ128mbk */ |
| 115173 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 115174 | /* VFMADDSUB231PDZ128mbkz */ |
| 115175 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 115176 | /* VFMADDSUB231PDZ128mk */ |
| 115177 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 115178 | /* VFMADDSUB231PDZ128mkz */ |
| 115179 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 115180 | /* VFMADDSUB231PDZ128r */ |
| 115181 | VR128X, VR128X, VR128X, VR128X, |
| 115182 | /* VFMADDSUB231PDZ128rk */ |
| 115183 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 115184 | /* VFMADDSUB231PDZ128rkz */ |
| 115185 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 115186 | /* VFMADDSUB231PDZ256m */ |
| 115187 | VR256X, VR256X, VR256X, f256mem, |
| 115188 | /* VFMADDSUB231PDZ256mb */ |
| 115189 | VR256X, VR256X, VR256X, f64mem, |
| 115190 | /* VFMADDSUB231PDZ256mbk */ |
| 115191 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 115192 | /* VFMADDSUB231PDZ256mbkz */ |
| 115193 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 115194 | /* VFMADDSUB231PDZ256mk */ |
| 115195 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 115196 | /* VFMADDSUB231PDZ256mkz */ |
| 115197 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 115198 | /* VFMADDSUB231PDZ256r */ |
| 115199 | VR256X, VR256X, VR256X, VR256X, |
| 115200 | /* VFMADDSUB231PDZ256rk */ |
| 115201 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 115202 | /* VFMADDSUB231PDZ256rkz */ |
| 115203 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 115204 | /* VFMADDSUB231PDZm */ |
| 115205 | VR512, VR512, VR512, f512mem, |
| 115206 | /* VFMADDSUB231PDZmb */ |
| 115207 | VR512, VR512, VR512, f64mem, |
| 115208 | /* VFMADDSUB231PDZmbk */ |
| 115209 | VR512, VR512, VK8WM, VR512, f64mem, |
| 115210 | /* VFMADDSUB231PDZmbkz */ |
| 115211 | VR512, VR512, VK8WM, VR512, f64mem, |
| 115212 | /* VFMADDSUB231PDZmk */ |
| 115213 | VR512, VR512, VK8WM, VR512, f512mem, |
| 115214 | /* VFMADDSUB231PDZmkz */ |
| 115215 | VR512, VR512, VK8WM, VR512, f512mem, |
| 115216 | /* VFMADDSUB231PDZr */ |
| 115217 | VR512, VR512, VR512, VR512, |
| 115218 | /* VFMADDSUB231PDZrb */ |
| 115219 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115220 | /* VFMADDSUB231PDZrbk */ |
| 115221 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 115222 | /* VFMADDSUB231PDZrbkz */ |
| 115223 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 115224 | /* VFMADDSUB231PDZrk */ |
| 115225 | VR512, VR512, VK8WM, VR512, VR512, |
| 115226 | /* VFMADDSUB231PDZrkz */ |
| 115227 | VR512, VR512, VK8WM, VR512, VR512, |
| 115228 | /* VFMADDSUB231PDm */ |
| 115229 | VR128, VR128, VR128, f128mem, |
| 115230 | /* VFMADDSUB231PDr */ |
| 115231 | VR128, VR128, VR128, VR128, |
| 115232 | /* VFMADDSUB231PHZ128m */ |
| 115233 | VR128X, VR128X, VR128X, f128mem, |
| 115234 | /* VFMADDSUB231PHZ128mb */ |
| 115235 | VR128X, VR128X, VR128X, f16mem, |
| 115236 | /* VFMADDSUB231PHZ128mbk */ |
| 115237 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115238 | /* VFMADDSUB231PHZ128mbkz */ |
| 115239 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115240 | /* VFMADDSUB231PHZ128mk */ |
| 115241 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115242 | /* VFMADDSUB231PHZ128mkz */ |
| 115243 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115244 | /* VFMADDSUB231PHZ128r */ |
| 115245 | VR128X, VR128X, VR128X, VR128X, |
| 115246 | /* VFMADDSUB231PHZ128rk */ |
| 115247 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115248 | /* VFMADDSUB231PHZ128rkz */ |
| 115249 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115250 | /* VFMADDSUB231PHZ256m */ |
| 115251 | VR256X, VR256X, VR256X, f256mem, |
| 115252 | /* VFMADDSUB231PHZ256mb */ |
| 115253 | VR256X, VR256X, VR256X, f16mem, |
| 115254 | /* VFMADDSUB231PHZ256mbk */ |
| 115255 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115256 | /* VFMADDSUB231PHZ256mbkz */ |
| 115257 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115258 | /* VFMADDSUB231PHZ256mk */ |
| 115259 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115260 | /* VFMADDSUB231PHZ256mkz */ |
| 115261 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115262 | /* VFMADDSUB231PHZ256r */ |
| 115263 | VR256X, VR256X, VR256X, VR256X, |
| 115264 | /* VFMADDSUB231PHZ256rk */ |
| 115265 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115266 | /* VFMADDSUB231PHZ256rkz */ |
| 115267 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115268 | /* VFMADDSUB231PHZm */ |
| 115269 | VR512, VR512, VR512, f512mem, |
| 115270 | /* VFMADDSUB231PHZmb */ |
| 115271 | VR512, VR512, VR512, f16mem, |
| 115272 | /* VFMADDSUB231PHZmbk */ |
| 115273 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115274 | /* VFMADDSUB231PHZmbkz */ |
| 115275 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115276 | /* VFMADDSUB231PHZmk */ |
| 115277 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115278 | /* VFMADDSUB231PHZmkz */ |
| 115279 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115280 | /* VFMADDSUB231PHZr */ |
| 115281 | VR512, VR512, VR512, VR512, |
| 115282 | /* VFMADDSUB231PHZrb */ |
| 115283 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115284 | /* VFMADDSUB231PHZrbk */ |
| 115285 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 115286 | /* VFMADDSUB231PHZrbkz */ |
| 115287 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 115288 | /* VFMADDSUB231PHZrk */ |
| 115289 | VR512, VR512, VK32WM, VR512, VR512, |
| 115290 | /* VFMADDSUB231PHZrkz */ |
| 115291 | VR512, VR512, VK32WM, VR512, VR512, |
| 115292 | /* VFMADDSUB231PSYm */ |
| 115293 | VR256, VR256, VR256, f256mem, |
| 115294 | /* VFMADDSUB231PSYr */ |
| 115295 | VR256, VR256, VR256, VR256, |
| 115296 | /* VFMADDSUB231PSZ128m */ |
| 115297 | VR128X, VR128X, VR128X, f128mem, |
| 115298 | /* VFMADDSUB231PSZ128mb */ |
| 115299 | VR128X, VR128X, VR128X, f32mem, |
| 115300 | /* VFMADDSUB231PSZ128mbk */ |
| 115301 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 115302 | /* VFMADDSUB231PSZ128mbkz */ |
| 115303 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 115304 | /* VFMADDSUB231PSZ128mk */ |
| 115305 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 115306 | /* VFMADDSUB231PSZ128mkz */ |
| 115307 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 115308 | /* VFMADDSUB231PSZ128r */ |
| 115309 | VR128X, VR128X, VR128X, VR128X, |
| 115310 | /* VFMADDSUB231PSZ128rk */ |
| 115311 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 115312 | /* VFMADDSUB231PSZ128rkz */ |
| 115313 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 115314 | /* VFMADDSUB231PSZ256m */ |
| 115315 | VR256X, VR256X, VR256X, f256mem, |
| 115316 | /* VFMADDSUB231PSZ256mb */ |
| 115317 | VR256X, VR256X, VR256X, f32mem, |
| 115318 | /* VFMADDSUB231PSZ256mbk */ |
| 115319 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 115320 | /* VFMADDSUB231PSZ256mbkz */ |
| 115321 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 115322 | /* VFMADDSUB231PSZ256mk */ |
| 115323 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 115324 | /* VFMADDSUB231PSZ256mkz */ |
| 115325 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 115326 | /* VFMADDSUB231PSZ256r */ |
| 115327 | VR256X, VR256X, VR256X, VR256X, |
| 115328 | /* VFMADDSUB231PSZ256rk */ |
| 115329 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 115330 | /* VFMADDSUB231PSZ256rkz */ |
| 115331 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 115332 | /* VFMADDSUB231PSZm */ |
| 115333 | VR512, VR512, VR512, f512mem, |
| 115334 | /* VFMADDSUB231PSZmb */ |
| 115335 | VR512, VR512, VR512, f32mem, |
| 115336 | /* VFMADDSUB231PSZmbk */ |
| 115337 | VR512, VR512, VK16WM, VR512, f32mem, |
| 115338 | /* VFMADDSUB231PSZmbkz */ |
| 115339 | VR512, VR512, VK16WM, VR512, f32mem, |
| 115340 | /* VFMADDSUB231PSZmk */ |
| 115341 | VR512, VR512, VK16WM, VR512, f512mem, |
| 115342 | /* VFMADDSUB231PSZmkz */ |
| 115343 | VR512, VR512, VK16WM, VR512, f512mem, |
| 115344 | /* VFMADDSUB231PSZr */ |
| 115345 | VR512, VR512, VR512, VR512, |
| 115346 | /* VFMADDSUB231PSZrb */ |
| 115347 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115348 | /* VFMADDSUB231PSZrbk */ |
| 115349 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 115350 | /* VFMADDSUB231PSZrbkz */ |
| 115351 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 115352 | /* VFMADDSUB231PSZrk */ |
| 115353 | VR512, VR512, VK16WM, VR512, VR512, |
| 115354 | /* VFMADDSUB231PSZrkz */ |
| 115355 | VR512, VR512, VK16WM, VR512, VR512, |
| 115356 | /* VFMADDSUB231PSm */ |
| 115357 | VR128, VR128, VR128, f128mem, |
| 115358 | /* VFMADDSUB231PSr */ |
| 115359 | VR128, VR128, VR128, VR128, |
| 115360 | /* VFMADDSUBPD4Ymr */ |
| 115361 | VR256, VR256, f256mem, VR256, |
| 115362 | /* VFMADDSUBPD4Yrm */ |
| 115363 | VR256, VR256, VR256, f256mem, |
| 115364 | /* VFMADDSUBPD4Yrr */ |
| 115365 | VR256, VR256, VR256, VR256, |
| 115366 | /* VFMADDSUBPD4Yrr_REV */ |
| 115367 | VR256, VR256, VR256, VR256, |
| 115368 | /* VFMADDSUBPD4mr */ |
| 115369 | VR128, VR128, f128mem, VR128, |
| 115370 | /* VFMADDSUBPD4rm */ |
| 115371 | VR128, VR128, VR128, f128mem, |
| 115372 | /* VFMADDSUBPD4rr */ |
| 115373 | VR128, VR128, VR128, VR128, |
| 115374 | /* VFMADDSUBPD4rr_REV */ |
| 115375 | VR128, VR128, VR128, VR128, |
| 115376 | /* VFMADDSUBPS4Ymr */ |
| 115377 | VR256, VR256, f256mem, VR256, |
| 115378 | /* VFMADDSUBPS4Yrm */ |
| 115379 | VR256, VR256, VR256, f256mem, |
| 115380 | /* VFMADDSUBPS4Yrr */ |
| 115381 | VR256, VR256, VR256, VR256, |
| 115382 | /* VFMADDSUBPS4Yrr_REV */ |
| 115383 | VR256, VR256, VR256, VR256, |
| 115384 | /* VFMADDSUBPS4mr */ |
| 115385 | VR128, VR128, f128mem, VR128, |
| 115386 | /* VFMADDSUBPS4rm */ |
| 115387 | VR128, VR128, VR128, f128mem, |
| 115388 | /* VFMADDSUBPS4rr */ |
| 115389 | VR128, VR128, VR128, VR128, |
| 115390 | /* VFMADDSUBPS4rr_REV */ |
| 115391 | VR128, VR128, VR128, VR128, |
| 115392 | /* VFMSUB132BF16Z128m */ |
| 115393 | VR128X, VR128X, VR128X, f128mem, |
| 115394 | /* VFMSUB132BF16Z128mb */ |
| 115395 | VR128X, VR128X, VR128X, f16mem, |
| 115396 | /* VFMSUB132BF16Z128mbk */ |
| 115397 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115398 | /* VFMSUB132BF16Z128mbkz */ |
| 115399 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115400 | /* VFMSUB132BF16Z128mk */ |
| 115401 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115402 | /* VFMSUB132BF16Z128mkz */ |
| 115403 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115404 | /* VFMSUB132BF16Z128r */ |
| 115405 | VR128X, VR128X, VR128X, VR128X, |
| 115406 | /* VFMSUB132BF16Z128rk */ |
| 115407 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115408 | /* VFMSUB132BF16Z128rkz */ |
| 115409 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115410 | /* VFMSUB132BF16Z256m */ |
| 115411 | VR256X, VR256X, VR256X, f256mem, |
| 115412 | /* VFMSUB132BF16Z256mb */ |
| 115413 | VR256X, VR256X, VR256X, f16mem, |
| 115414 | /* VFMSUB132BF16Z256mbk */ |
| 115415 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115416 | /* VFMSUB132BF16Z256mbkz */ |
| 115417 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115418 | /* VFMSUB132BF16Z256mk */ |
| 115419 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115420 | /* VFMSUB132BF16Z256mkz */ |
| 115421 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115422 | /* VFMSUB132BF16Z256r */ |
| 115423 | VR256X, VR256X, VR256X, VR256X, |
| 115424 | /* VFMSUB132BF16Z256rk */ |
| 115425 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115426 | /* VFMSUB132BF16Z256rkz */ |
| 115427 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115428 | /* VFMSUB132BF16Zm */ |
| 115429 | VR512, VR512, VR512, f512mem, |
| 115430 | /* VFMSUB132BF16Zmb */ |
| 115431 | VR512, VR512, VR512, f16mem, |
| 115432 | /* VFMSUB132BF16Zmbk */ |
| 115433 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115434 | /* VFMSUB132BF16Zmbkz */ |
| 115435 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115436 | /* VFMSUB132BF16Zmk */ |
| 115437 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115438 | /* VFMSUB132BF16Zmkz */ |
| 115439 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115440 | /* VFMSUB132BF16Zr */ |
| 115441 | VR512, VR512, VR512, VR512, |
| 115442 | /* VFMSUB132BF16Zrk */ |
| 115443 | VR512, VR512, VK32WM, VR512, VR512, |
| 115444 | /* VFMSUB132BF16Zrkz */ |
| 115445 | VR512, VR512, VK32WM, VR512, VR512, |
| 115446 | /* VFMSUB132PDYm */ |
| 115447 | VR256, VR256, VR256, f256mem, |
| 115448 | /* VFMSUB132PDYr */ |
| 115449 | VR256, VR256, VR256, VR256, |
| 115450 | /* VFMSUB132PDZ128m */ |
| 115451 | VR128X, VR128X, VR128X, f128mem, |
| 115452 | /* VFMSUB132PDZ128mb */ |
| 115453 | VR128X, VR128X, VR128X, f64mem, |
| 115454 | /* VFMSUB132PDZ128mbk */ |
| 115455 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 115456 | /* VFMSUB132PDZ128mbkz */ |
| 115457 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 115458 | /* VFMSUB132PDZ128mk */ |
| 115459 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 115460 | /* VFMSUB132PDZ128mkz */ |
| 115461 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 115462 | /* VFMSUB132PDZ128r */ |
| 115463 | VR128X, VR128X, VR128X, VR128X, |
| 115464 | /* VFMSUB132PDZ128rk */ |
| 115465 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 115466 | /* VFMSUB132PDZ128rkz */ |
| 115467 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 115468 | /* VFMSUB132PDZ256m */ |
| 115469 | VR256X, VR256X, VR256X, f256mem, |
| 115470 | /* VFMSUB132PDZ256mb */ |
| 115471 | VR256X, VR256X, VR256X, f64mem, |
| 115472 | /* VFMSUB132PDZ256mbk */ |
| 115473 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 115474 | /* VFMSUB132PDZ256mbkz */ |
| 115475 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 115476 | /* VFMSUB132PDZ256mk */ |
| 115477 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 115478 | /* VFMSUB132PDZ256mkz */ |
| 115479 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 115480 | /* VFMSUB132PDZ256r */ |
| 115481 | VR256X, VR256X, VR256X, VR256X, |
| 115482 | /* VFMSUB132PDZ256rk */ |
| 115483 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 115484 | /* VFMSUB132PDZ256rkz */ |
| 115485 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 115486 | /* VFMSUB132PDZm */ |
| 115487 | VR512, VR512, VR512, f512mem, |
| 115488 | /* VFMSUB132PDZmb */ |
| 115489 | VR512, VR512, VR512, f64mem, |
| 115490 | /* VFMSUB132PDZmbk */ |
| 115491 | VR512, VR512, VK8WM, VR512, f64mem, |
| 115492 | /* VFMSUB132PDZmbkz */ |
| 115493 | VR512, VR512, VK8WM, VR512, f64mem, |
| 115494 | /* VFMSUB132PDZmk */ |
| 115495 | VR512, VR512, VK8WM, VR512, f512mem, |
| 115496 | /* VFMSUB132PDZmkz */ |
| 115497 | VR512, VR512, VK8WM, VR512, f512mem, |
| 115498 | /* VFMSUB132PDZr */ |
| 115499 | VR512, VR512, VR512, VR512, |
| 115500 | /* VFMSUB132PDZrb */ |
| 115501 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115502 | /* VFMSUB132PDZrbk */ |
| 115503 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 115504 | /* VFMSUB132PDZrbkz */ |
| 115505 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 115506 | /* VFMSUB132PDZrk */ |
| 115507 | VR512, VR512, VK8WM, VR512, VR512, |
| 115508 | /* VFMSUB132PDZrkz */ |
| 115509 | VR512, VR512, VK8WM, VR512, VR512, |
| 115510 | /* VFMSUB132PDm */ |
| 115511 | VR128, VR128, VR128, f128mem, |
| 115512 | /* VFMSUB132PDr */ |
| 115513 | VR128, VR128, VR128, VR128, |
| 115514 | /* VFMSUB132PHZ128m */ |
| 115515 | VR128X, VR128X, VR128X, f128mem, |
| 115516 | /* VFMSUB132PHZ128mb */ |
| 115517 | VR128X, VR128X, VR128X, f16mem, |
| 115518 | /* VFMSUB132PHZ128mbk */ |
| 115519 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115520 | /* VFMSUB132PHZ128mbkz */ |
| 115521 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115522 | /* VFMSUB132PHZ128mk */ |
| 115523 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115524 | /* VFMSUB132PHZ128mkz */ |
| 115525 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115526 | /* VFMSUB132PHZ128r */ |
| 115527 | VR128X, VR128X, VR128X, VR128X, |
| 115528 | /* VFMSUB132PHZ128rk */ |
| 115529 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115530 | /* VFMSUB132PHZ128rkz */ |
| 115531 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115532 | /* VFMSUB132PHZ256m */ |
| 115533 | VR256X, VR256X, VR256X, f256mem, |
| 115534 | /* VFMSUB132PHZ256mb */ |
| 115535 | VR256X, VR256X, VR256X, f16mem, |
| 115536 | /* VFMSUB132PHZ256mbk */ |
| 115537 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115538 | /* VFMSUB132PHZ256mbkz */ |
| 115539 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115540 | /* VFMSUB132PHZ256mk */ |
| 115541 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115542 | /* VFMSUB132PHZ256mkz */ |
| 115543 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115544 | /* VFMSUB132PHZ256r */ |
| 115545 | VR256X, VR256X, VR256X, VR256X, |
| 115546 | /* VFMSUB132PHZ256rk */ |
| 115547 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115548 | /* VFMSUB132PHZ256rkz */ |
| 115549 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115550 | /* VFMSUB132PHZm */ |
| 115551 | VR512, VR512, VR512, f512mem, |
| 115552 | /* VFMSUB132PHZmb */ |
| 115553 | VR512, VR512, VR512, f16mem, |
| 115554 | /* VFMSUB132PHZmbk */ |
| 115555 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115556 | /* VFMSUB132PHZmbkz */ |
| 115557 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115558 | /* VFMSUB132PHZmk */ |
| 115559 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115560 | /* VFMSUB132PHZmkz */ |
| 115561 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115562 | /* VFMSUB132PHZr */ |
| 115563 | VR512, VR512, VR512, VR512, |
| 115564 | /* VFMSUB132PHZrb */ |
| 115565 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115566 | /* VFMSUB132PHZrbk */ |
| 115567 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 115568 | /* VFMSUB132PHZrbkz */ |
| 115569 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 115570 | /* VFMSUB132PHZrk */ |
| 115571 | VR512, VR512, VK32WM, VR512, VR512, |
| 115572 | /* VFMSUB132PHZrkz */ |
| 115573 | VR512, VR512, VK32WM, VR512, VR512, |
| 115574 | /* VFMSUB132PSYm */ |
| 115575 | VR256, VR256, VR256, f256mem, |
| 115576 | /* VFMSUB132PSYr */ |
| 115577 | VR256, VR256, VR256, VR256, |
| 115578 | /* VFMSUB132PSZ128m */ |
| 115579 | VR128X, VR128X, VR128X, f128mem, |
| 115580 | /* VFMSUB132PSZ128mb */ |
| 115581 | VR128X, VR128X, VR128X, f32mem, |
| 115582 | /* VFMSUB132PSZ128mbk */ |
| 115583 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 115584 | /* VFMSUB132PSZ128mbkz */ |
| 115585 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 115586 | /* VFMSUB132PSZ128mk */ |
| 115587 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 115588 | /* VFMSUB132PSZ128mkz */ |
| 115589 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 115590 | /* VFMSUB132PSZ128r */ |
| 115591 | VR128X, VR128X, VR128X, VR128X, |
| 115592 | /* VFMSUB132PSZ128rk */ |
| 115593 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 115594 | /* VFMSUB132PSZ128rkz */ |
| 115595 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 115596 | /* VFMSUB132PSZ256m */ |
| 115597 | VR256X, VR256X, VR256X, f256mem, |
| 115598 | /* VFMSUB132PSZ256mb */ |
| 115599 | VR256X, VR256X, VR256X, f32mem, |
| 115600 | /* VFMSUB132PSZ256mbk */ |
| 115601 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 115602 | /* VFMSUB132PSZ256mbkz */ |
| 115603 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 115604 | /* VFMSUB132PSZ256mk */ |
| 115605 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 115606 | /* VFMSUB132PSZ256mkz */ |
| 115607 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 115608 | /* VFMSUB132PSZ256r */ |
| 115609 | VR256X, VR256X, VR256X, VR256X, |
| 115610 | /* VFMSUB132PSZ256rk */ |
| 115611 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 115612 | /* VFMSUB132PSZ256rkz */ |
| 115613 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 115614 | /* VFMSUB132PSZm */ |
| 115615 | VR512, VR512, VR512, f512mem, |
| 115616 | /* VFMSUB132PSZmb */ |
| 115617 | VR512, VR512, VR512, f32mem, |
| 115618 | /* VFMSUB132PSZmbk */ |
| 115619 | VR512, VR512, VK16WM, VR512, f32mem, |
| 115620 | /* VFMSUB132PSZmbkz */ |
| 115621 | VR512, VR512, VK16WM, VR512, f32mem, |
| 115622 | /* VFMSUB132PSZmk */ |
| 115623 | VR512, VR512, VK16WM, VR512, f512mem, |
| 115624 | /* VFMSUB132PSZmkz */ |
| 115625 | VR512, VR512, VK16WM, VR512, f512mem, |
| 115626 | /* VFMSUB132PSZr */ |
| 115627 | VR512, VR512, VR512, VR512, |
| 115628 | /* VFMSUB132PSZrb */ |
| 115629 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115630 | /* VFMSUB132PSZrbk */ |
| 115631 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 115632 | /* VFMSUB132PSZrbkz */ |
| 115633 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 115634 | /* VFMSUB132PSZrk */ |
| 115635 | VR512, VR512, VK16WM, VR512, VR512, |
| 115636 | /* VFMSUB132PSZrkz */ |
| 115637 | VR512, VR512, VK16WM, VR512, VR512, |
| 115638 | /* VFMSUB132PSm */ |
| 115639 | VR128, VR128, VR128, f128mem, |
| 115640 | /* VFMSUB132PSr */ |
| 115641 | VR128, VR128, VR128, VR128, |
| 115642 | /* VFMSUB132SDZm */ |
| 115643 | FR64X, FR64X, FR64X, f64mem, |
| 115644 | /* VFMSUB132SDZm_Int */ |
| 115645 | VR128X, VR128X, VR128X, sdmem, |
| 115646 | /* VFMSUB132SDZmk_Int */ |
| 115647 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 115648 | /* VFMSUB132SDZmkz_Int */ |
| 115649 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 115650 | /* VFMSUB132SDZr */ |
| 115651 | FR64X, FR64X, FR64X, FR64X, |
| 115652 | /* VFMSUB132SDZr_Int */ |
| 115653 | VR128X, VR128X, VR128X, VR128X, |
| 115654 | /* VFMSUB132SDZrb */ |
| 115655 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 115656 | /* VFMSUB132SDZrb_Int */ |
| 115657 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 115658 | /* VFMSUB132SDZrbk_Int */ |
| 115659 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 115660 | /* VFMSUB132SDZrbkz_Int */ |
| 115661 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 115662 | /* VFMSUB132SDZrk_Int */ |
| 115663 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 115664 | /* VFMSUB132SDZrkz_Int */ |
| 115665 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 115666 | /* VFMSUB132SDm */ |
| 115667 | FR64, FR64, FR64, f64mem, |
| 115668 | /* VFMSUB132SDm_Int */ |
| 115669 | VR128, VR128, VR128, sdmem, |
| 115670 | /* VFMSUB132SDr */ |
| 115671 | FR64, FR64, FR64, FR64, |
| 115672 | /* VFMSUB132SDr_Int */ |
| 115673 | VR128, VR128, VR128, VR128, |
| 115674 | /* VFMSUB132SHZm */ |
| 115675 | FR16X, FR16X, FR16X, f16mem, |
| 115676 | /* VFMSUB132SHZm_Int */ |
| 115677 | VR128X, VR128X, VR128X, shmem, |
| 115678 | /* VFMSUB132SHZmk_Int */ |
| 115679 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 115680 | /* VFMSUB132SHZmkz_Int */ |
| 115681 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 115682 | /* VFMSUB132SHZr */ |
| 115683 | FR16X, FR16X, FR16X, FR16X, |
| 115684 | /* VFMSUB132SHZr_Int */ |
| 115685 | VR128X, VR128X, VR128X, VR128X, |
| 115686 | /* VFMSUB132SHZrb */ |
| 115687 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 115688 | /* VFMSUB132SHZrb_Int */ |
| 115689 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 115690 | /* VFMSUB132SHZrbk_Int */ |
| 115691 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 115692 | /* VFMSUB132SHZrbkz_Int */ |
| 115693 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 115694 | /* VFMSUB132SHZrk_Int */ |
| 115695 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 115696 | /* VFMSUB132SHZrkz_Int */ |
| 115697 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 115698 | /* VFMSUB132SSZm */ |
| 115699 | FR32X, FR32X, FR32X, f32mem, |
| 115700 | /* VFMSUB132SSZm_Int */ |
| 115701 | VR128X, VR128X, VR128X, ssmem, |
| 115702 | /* VFMSUB132SSZmk_Int */ |
| 115703 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 115704 | /* VFMSUB132SSZmkz_Int */ |
| 115705 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 115706 | /* VFMSUB132SSZr */ |
| 115707 | FR32X, FR32X, FR32X, FR32X, |
| 115708 | /* VFMSUB132SSZr_Int */ |
| 115709 | VR128X, VR128X, VR128X, VR128X, |
| 115710 | /* VFMSUB132SSZrb */ |
| 115711 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 115712 | /* VFMSUB132SSZrb_Int */ |
| 115713 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 115714 | /* VFMSUB132SSZrbk_Int */ |
| 115715 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 115716 | /* VFMSUB132SSZrbkz_Int */ |
| 115717 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 115718 | /* VFMSUB132SSZrk_Int */ |
| 115719 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 115720 | /* VFMSUB132SSZrkz_Int */ |
| 115721 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 115722 | /* VFMSUB132SSm */ |
| 115723 | FR32, FR32, FR32, f32mem, |
| 115724 | /* VFMSUB132SSm_Int */ |
| 115725 | VR128, VR128, VR128, ssmem, |
| 115726 | /* VFMSUB132SSr */ |
| 115727 | FR32, FR32, FR32, FR32, |
| 115728 | /* VFMSUB132SSr_Int */ |
| 115729 | VR128, VR128, VR128, VR128, |
| 115730 | /* VFMSUB213BF16Z128m */ |
| 115731 | VR128X, VR128X, VR128X, f128mem, |
| 115732 | /* VFMSUB213BF16Z128mb */ |
| 115733 | VR128X, VR128X, VR128X, f16mem, |
| 115734 | /* VFMSUB213BF16Z128mbk */ |
| 115735 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115736 | /* VFMSUB213BF16Z128mbkz */ |
| 115737 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115738 | /* VFMSUB213BF16Z128mk */ |
| 115739 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115740 | /* VFMSUB213BF16Z128mkz */ |
| 115741 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115742 | /* VFMSUB213BF16Z128r */ |
| 115743 | VR128X, VR128X, VR128X, VR128X, |
| 115744 | /* VFMSUB213BF16Z128rk */ |
| 115745 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115746 | /* VFMSUB213BF16Z128rkz */ |
| 115747 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115748 | /* VFMSUB213BF16Z256m */ |
| 115749 | VR256X, VR256X, VR256X, f256mem, |
| 115750 | /* VFMSUB213BF16Z256mb */ |
| 115751 | VR256X, VR256X, VR256X, f16mem, |
| 115752 | /* VFMSUB213BF16Z256mbk */ |
| 115753 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115754 | /* VFMSUB213BF16Z256mbkz */ |
| 115755 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115756 | /* VFMSUB213BF16Z256mk */ |
| 115757 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115758 | /* VFMSUB213BF16Z256mkz */ |
| 115759 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115760 | /* VFMSUB213BF16Z256r */ |
| 115761 | VR256X, VR256X, VR256X, VR256X, |
| 115762 | /* VFMSUB213BF16Z256rk */ |
| 115763 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115764 | /* VFMSUB213BF16Z256rkz */ |
| 115765 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115766 | /* VFMSUB213BF16Zm */ |
| 115767 | VR512, VR512, VR512, f512mem, |
| 115768 | /* VFMSUB213BF16Zmb */ |
| 115769 | VR512, VR512, VR512, f16mem, |
| 115770 | /* VFMSUB213BF16Zmbk */ |
| 115771 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115772 | /* VFMSUB213BF16Zmbkz */ |
| 115773 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115774 | /* VFMSUB213BF16Zmk */ |
| 115775 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115776 | /* VFMSUB213BF16Zmkz */ |
| 115777 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115778 | /* VFMSUB213BF16Zr */ |
| 115779 | VR512, VR512, VR512, VR512, |
| 115780 | /* VFMSUB213BF16Zrk */ |
| 115781 | VR512, VR512, VK32WM, VR512, VR512, |
| 115782 | /* VFMSUB213BF16Zrkz */ |
| 115783 | VR512, VR512, VK32WM, VR512, VR512, |
| 115784 | /* VFMSUB213PDYm */ |
| 115785 | VR256, VR256, VR256, f256mem, |
| 115786 | /* VFMSUB213PDYr */ |
| 115787 | VR256, VR256, VR256, VR256, |
| 115788 | /* VFMSUB213PDZ128m */ |
| 115789 | VR128X, VR128X, VR128X, f128mem, |
| 115790 | /* VFMSUB213PDZ128mb */ |
| 115791 | VR128X, VR128X, VR128X, f64mem, |
| 115792 | /* VFMSUB213PDZ128mbk */ |
| 115793 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 115794 | /* VFMSUB213PDZ128mbkz */ |
| 115795 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 115796 | /* VFMSUB213PDZ128mk */ |
| 115797 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 115798 | /* VFMSUB213PDZ128mkz */ |
| 115799 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 115800 | /* VFMSUB213PDZ128r */ |
| 115801 | VR128X, VR128X, VR128X, VR128X, |
| 115802 | /* VFMSUB213PDZ128rk */ |
| 115803 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 115804 | /* VFMSUB213PDZ128rkz */ |
| 115805 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 115806 | /* VFMSUB213PDZ256m */ |
| 115807 | VR256X, VR256X, VR256X, f256mem, |
| 115808 | /* VFMSUB213PDZ256mb */ |
| 115809 | VR256X, VR256X, VR256X, f64mem, |
| 115810 | /* VFMSUB213PDZ256mbk */ |
| 115811 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 115812 | /* VFMSUB213PDZ256mbkz */ |
| 115813 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 115814 | /* VFMSUB213PDZ256mk */ |
| 115815 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 115816 | /* VFMSUB213PDZ256mkz */ |
| 115817 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 115818 | /* VFMSUB213PDZ256r */ |
| 115819 | VR256X, VR256X, VR256X, VR256X, |
| 115820 | /* VFMSUB213PDZ256rk */ |
| 115821 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 115822 | /* VFMSUB213PDZ256rkz */ |
| 115823 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 115824 | /* VFMSUB213PDZm */ |
| 115825 | VR512, VR512, VR512, f512mem, |
| 115826 | /* VFMSUB213PDZmb */ |
| 115827 | VR512, VR512, VR512, f64mem, |
| 115828 | /* VFMSUB213PDZmbk */ |
| 115829 | VR512, VR512, VK8WM, VR512, f64mem, |
| 115830 | /* VFMSUB213PDZmbkz */ |
| 115831 | VR512, VR512, VK8WM, VR512, f64mem, |
| 115832 | /* VFMSUB213PDZmk */ |
| 115833 | VR512, VR512, VK8WM, VR512, f512mem, |
| 115834 | /* VFMSUB213PDZmkz */ |
| 115835 | VR512, VR512, VK8WM, VR512, f512mem, |
| 115836 | /* VFMSUB213PDZr */ |
| 115837 | VR512, VR512, VR512, VR512, |
| 115838 | /* VFMSUB213PDZrb */ |
| 115839 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115840 | /* VFMSUB213PDZrbk */ |
| 115841 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 115842 | /* VFMSUB213PDZrbkz */ |
| 115843 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 115844 | /* VFMSUB213PDZrk */ |
| 115845 | VR512, VR512, VK8WM, VR512, VR512, |
| 115846 | /* VFMSUB213PDZrkz */ |
| 115847 | VR512, VR512, VK8WM, VR512, VR512, |
| 115848 | /* VFMSUB213PDm */ |
| 115849 | VR128, VR128, VR128, f128mem, |
| 115850 | /* VFMSUB213PDr */ |
| 115851 | VR128, VR128, VR128, VR128, |
| 115852 | /* VFMSUB213PHZ128m */ |
| 115853 | VR128X, VR128X, VR128X, f128mem, |
| 115854 | /* VFMSUB213PHZ128mb */ |
| 115855 | VR128X, VR128X, VR128X, f16mem, |
| 115856 | /* VFMSUB213PHZ128mbk */ |
| 115857 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115858 | /* VFMSUB213PHZ128mbkz */ |
| 115859 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 115860 | /* VFMSUB213PHZ128mk */ |
| 115861 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115862 | /* VFMSUB213PHZ128mkz */ |
| 115863 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 115864 | /* VFMSUB213PHZ128r */ |
| 115865 | VR128X, VR128X, VR128X, VR128X, |
| 115866 | /* VFMSUB213PHZ128rk */ |
| 115867 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115868 | /* VFMSUB213PHZ128rkz */ |
| 115869 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 115870 | /* VFMSUB213PHZ256m */ |
| 115871 | VR256X, VR256X, VR256X, f256mem, |
| 115872 | /* VFMSUB213PHZ256mb */ |
| 115873 | VR256X, VR256X, VR256X, f16mem, |
| 115874 | /* VFMSUB213PHZ256mbk */ |
| 115875 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115876 | /* VFMSUB213PHZ256mbkz */ |
| 115877 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 115878 | /* VFMSUB213PHZ256mk */ |
| 115879 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115880 | /* VFMSUB213PHZ256mkz */ |
| 115881 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 115882 | /* VFMSUB213PHZ256r */ |
| 115883 | VR256X, VR256X, VR256X, VR256X, |
| 115884 | /* VFMSUB213PHZ256rk */ |
| 115885 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115886 | /* VFMSUB213PHZ256rkz */ |
| 115887 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 115888 | /* VFMSUB213PHZm */ |
| 115889 | VR512, VR512, VR512, f512mem, |
| 115890 | /* VFMSUB213PHZmb */ |
| 115891 | VR512, VR512, VR512, f16mem, |
| 115892 | /* VFMSUB213PHZmbk */ |
| 115893 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115894 | /* VFMSUB213PHZmbkz */ |
| 115895 | VR512, VR512, VK32WM, VR512, f16mem, |
| 115896 | /* VFMSUB213PHZmk */ |
| 115897 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115898 | /* VFMSUB213PHZmkz */ |
| 115899 | VR512, VR512, VK32WM, VR512, f512mem, |
| 115900 | /* VFMSUB213PHZr */ |
| 115901 | VR512, VR512, VR512, VR512, |
| 115902 | /* VFMSUB213PHZrb */ |
| 115903 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115904 | /* VFMSUB213PHZrbk */ |
| 115905 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 115906 | /* VFMSUB213PHZrbkz */ |
| 115907 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 115908 | /* VFMSUB213PHZrk */ |
| 115909 | VR512, VR512, VK32WM, VR512, VR512, |
| 115910 | /* VFMSUB213PHZrkz */ |
| 115911 | VR512, VR512, VK32WM, VR512, VR512, |
| 115912 | /* VFMSUB213PSYm */ |
| 115913 | VR256, VR256, VR256, f256mem, |
| 115914 | /* VFMSUB213PSYr */ |
| 115915 | VR256, VR256, VR256, VR256, |
| 115916 | /* VFMSUB213PSZ128m */ |
| 115917 | VR128X, VR128X, VR128X, f128mem, |
| 115918 | /* VFMSUB213PSZ128mb */ |
| 115919 | VR128X, VR128X, VR128X, f32mem, |
| 115920 | /* VFMSUB213PSZ128mbk */ |
| 115921 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 115922 | /* VFMSUB213PSZ128mbkz */ |
| 115923 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 115924 | /* VFMSUB213PSZ128mk */ |
| 115925 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 115926 | /* VFMSUB213PSZ128mkz */ |
| 115927 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 115928 | /* VFMSUB213PSZ128r */ |
| 115929 | VR128X, VR128X, VR128X, VR128X, |
| 115930 | /* VFMSUB213PSZ128rk */ |
| 115931 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 115932 | /* VFMSUB213PSZ128rkz */ |
| 115933 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 115934 | /* VFMSUB213PSZ256m */ |
| 115935 | VR256X, VR256X, VR256X, f256mem, |
| 115936 | /* VFMSUB213PSZ256mb */ |
| 115937 | VR256X, VR256X, VR256X, f32mem, |
| 115938 | /* VFMSUB213PSZ256mbk */ |
| 115939 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 115940 | /* VFMSUB213PSZ256mbkz */ |
| 115941 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 115942 | /* VFMSUB213PSZ256mk */ |
| 115943 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 115944 | /* VFMSUB213PSZ256mkz */ |
| 115945 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 115946 | /* VFMSUB213PSZ256r */ |
| 115947 | VR256X, VR256X, VR256X, VR256X, |
| 115948 | /* VFMSUB213PSZ256rk */ |
| 115949 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 115950 | /* VFMSUB213PSZ256rkz */ |
| 115951 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 115952 | /* VFMSUB213PSZm */ |
| 115953 | VR512, VR512, VR512, f512mem, |
| 115954 | /* VFMSUB213PSZmb */ |
| 115955 | VR512, VR512, VR512, f32mem, |
| 115956 | /* VFMSUB213PSZmbk */ |
| 115957 | VR512, VR512, VK16WM, VR512, f32mem, |
| 115958 | /* VFMSUB213PSZmbkz */ |
| 115959 | VR512, VR512, VK16WM, VR512, f32mem, |
| 115960 | /* VFMSUB213PSZmk */ |
| 115961 | VR512, VR512, VK16WM, VR512, f512mem, |
| 115962 | /* VFMSUB213PSZmkz */ |
| 115963 | VR512, VR512, VK16WM, VR512, f512mem, |
| 115964 | /* VFMSUB213PSZr */ |
| 115965 | VR512, VR512, VR512, VR512, |
| 115966 | /* VFMSUB213PSZrb */ |
| 115967 | VR512, VR512, VR512, VR512, AVX512RC, |
| 115968 | /* VFMSUB213PSZrbk */ |
| 115969 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 115970 | /* VFMSUB213PSZrbkz */ |
| 115971 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 115972 | /* VFMSUB213PSZrk */ |
| 115973 | VR512, VR512, VK16WM, VR512, VR512, |
| 115974 | /* VFMSUB213PSZrkz */ |
| 115975 | VR512, VR512, VK16WM, VR512, VR512, |
| 115976 | /* VFMSUB213PSm */ |
| 115977 | VR128, VR128, VR128, f128mem, |
| 115978 | /* VFMSUB213PSr */ |
| 115979 | VR128, VR128, VR128, VR128, |
| 115980 | /* VFMSUB213SDZm */ |
| 115981 | FR64X, FR64X, FR64X, f64mem, |
| 115982 | /* VFMSUB213SDZm_Int */ |
| 115983 | VR128X, VR128X, VR128X, sdmem, |
| 115984 | /* VFMSUB213SDZmk_Int */ |
| 115985 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 115986 | /* VFMSUB213SDZmkz_Int */ |
| 115987 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 115988 | /* VFMSUB213SDZr */ |
| 115989 | FR64X, FR64X, FR64X, FR64X, |
| 115990 | /* VFMSUB213SDZr_Int */ |
| 115991 | VR128X, VR128X, VR128X, VR128X, |
| 115992 | /* VFMSUB213SDZrb */ |
| 115993 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 115994 | /* VFMSUB213SDZrb_Int */ |
| 115995 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 115996 | /* VFMSUB213SDZrbk_Int */ |
| 115997 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 115998 | /* VFMSUB213SDZrbkz_Int */ |
| 115999 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116000 | /* VFMSUB213SDZrk_Int */ |
| 116001 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116002 | /* VFMSUB213SDZrkz_Int */ |
| 116003 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116004 | /* VFMSUB213SDm */ |
| 116005 | FR64, FR64, FR64, f64mem, |
| 116006 | /* VFMSUB213SDm_Int */ |
| 116007 | VR128, VR128, VR128, sdmem, |
| 116008 | /* VFMSUB213SDr */ |
| 116009 | FR64, FR64, FR64, FR64, |
| 116010 | /* VFMSUB213SDr_Int */ |
| 116011 | VR128, VR128, VR128, VR128, |
| 116012 | /* VFMSUB213SHZm */ |
| 116013 | FR16X, FR16X, FR16X, f16mem, |
| 116014 | /* VFMSUB213SHZm_Int */ |
| 116015 | VR128X, VR128X, VR128X, shmem, |
| 116016 | /* VFMSUB213SHZmk_Int */ |
| 116017 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 116018 | /* VFMSUB213SHZmkz_Int */ |
| 116019 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 116020 | /* VFMSUB213SHZr */ |
| 116021 | FR16X, FR16X, FR16X, FR16X, |
| 116022 | /* VFMSUB213SHZr_Int */ |
| 116023 | VR128X, VR128X, VR128X, VR128X, |
| 116024 | /* VFMSUB213SHZrb */ |
| 116025 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 116026 | /* VFMSUB213SHZrb_Int */ |
| 116027 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 116028 | /* VFMSUB213SHZrbk_Int */ |
| 116029 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116030 | /* VFMSUB213SHZrbkz_Int */ |
| 116031 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116032 | /* VFMSUB213SHZrk_Int */ |
| 116033 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116034 | /* VFMSUB213SHZrkz_Int */ |
| 116035 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116036 | /* VFMSUB213SSZm */ |
| 116037 | FR32X, FR32X, FR32X, f32mem, |
| 116038 | /* VFMSUB213SSZm_Int */ |
| 116039 | VR128X, VR128X, VR128X, ssmem, |
| 116040 | /* VFMSUB213SSZmk_Int */ |
| 116041 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 116042 | /* VFMSUB213SSZmkz_Int */ |
| 116043 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 116044 | /* VFMSUB213SSZr */ |
| 116045 | FR32X, FR32X, FR32X, FR32X, |
| 116046 | /* VFMSUB213SSZr_Int */ |
| 116047 | VR128X, VR128X, VR128X, VR128X, |
| 116048 | /* VFMSUB213SSZrb */ |
| 116049 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 116050 | /* VFMSUB213SSZrb_Int */ |
| 116051 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 116052 | /* VFMSUB213SSZrbk_Int */ |
| 116053 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116054 | /* VFMSUB213SSZrbkz_Int */ |
| 116055 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116056 | /* VFMSUB213SSZrk_Int */ |
| 116057 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116058 | /* VFMSUB213SSZrkz_Int */ |
| 116059 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116060 | /* VFMSUB213SSm */ |
| 116061 | FR32, FR32, FR32, f32mem, |
| 116062 | /* VFMSUB213SSm_Int */ |
| 116063 | VR128, VR128, VR128, ssmem, |
| 116064 | /* VFMSUB213SSr */ |
| 116065 | FR32, FR32, FR32, FR32, |
| 116066 | /* VFMSUB213SSr_Int */ |
| 116067 | VR128, VR128, VR128, VR128, |
| 116068 | /* VFMSUB231BF16Z128m */ |
| 116069 | VR128X, VR128X, VR128X, f128mem, |
| 116070 | /* VFMSUB231BF16Z128mb */ |
| 116071 | VR128X, VR128X, VR128X, f16mem, |
| 116072 | /* VFMSUB231BF16Z128mbk */ |
| 116073 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 116074 | /* VFMSUB231BF16Z128mbkz */ |
| 116075 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 116076 | /* VFMSUB231BF16Z128mk */ |
| 116077 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116078 | /* VFMSUB231BF16Z128mkz */ |
| 116079 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116080 | /* VFMSUB231BF16Z128r */ |
| 116081 | VR128X, VR128X, VR128X, VR128X, |
| 116082 | /* VFMSUB231BF16Z128rk */ |
| 116083 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116084 | /* VFMSUB231BF16Z128rkz */ |
| 116085 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116086 | /* VFMSUB231BF16Z256m */ |
| 116087 | VR256X, VR256X, VR256X, f256mem, |
| 116088 | /* VFMSUB231BF16Z256mb */ |
| 116089 | VR256X, VR256X, VR256X, f16mem, |
| 116090 | /* VFMSUB231BF16Z256mbk */ |
| 116091 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 116092 | /* VFMSUB231BF16Z256mbkz */ |
| 116093 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 116094 | /* VFMSUB231BF16Z256mk */ |
| 116095 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116096 | /* VFMSUB231BF16Z256mkz */ |
| 116097 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116098 | /* VFMSUB231BF16Z256r */ |
| 116099 | VR256X, VR256X, VR256X, VR256X, |
| 116100 | /* VFMSUB231BF16Z256rk */ |
| 116101 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116102 | /* VFMSUB231BF16Z256rkz */ |
| 116103 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116104 | /* VFMSUB231BF16Zm */ |
| 116105 | VR512, VR512, VR512, f512mem, |
| 116106 | /* VFMSUB231BF16Zmb */ |
| 116107 | VR512, VR512, VR512, f16mem, |
| 116108 | /* VFMSUB231BF16Zmbk */ |
| 116109 | VR512, VR512, VK32WM, VR512, f16mem, |
| 116110 | /* VFMSUB231BF16Zmbkz */ |
| 116111 | VR512, VR512, VK32WM, VR512, f16mem, |
| 116112 | /* VFMSUB231BF16Zmk */ |
| 116113 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116114 | /* VFMSUB231BF16Zmkz */ |
| 116115 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116116 | /* VFMSUB231BF16Zr */ |
| 116117 | VR512, VR512, VR512, VR512, |
| 116118 | /* VFMSUB231BF16Zrk */ |
| 116119 | VR512, VR512, VK32WM, VR512, VR512, |
| 116120 | /* VFMSUB231BF16Zrkz */ |
| 116121 | VR512, VR512, VK32WM, VR512, VR512, |
| 116122 | /* VFMSUB231PDYm */ |
| 116123 | VR256, VR256, VR256, f256mem, |
| 116124 | /* VFMSUB231PDYr */ |
| 116125 | VR256, VR256, VR256, VR256, |
| 116126 | /* VFMSUB231PDZ128m */ |
| 116127 | VR128X, VR128X, VR128X, f128mem, |
| 116128 | /* VFMSUB231PDZ128mb */ |
| 116129 | VR128X, VR128X, VR128X, f64mem, |
| 116130 | /* VFMSUB231PDZ128mbk */ |
| 116131 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 116132 | /* VFMSUB231PDZ128mbkz */ |
| 116133 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 116134 | /* VFMSUB231PDZ128mk */ |
| 116135 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 116136 | /* VFMSUB231PDZ128mkz */ |
| 116137 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 116138 | /* VFMSUB231PDZ128r */ |
| 116139 | VR128X, VR128X, VR128X, VR128X, |
| 116140 | /* VFMSUB231PDZ128rk */ |
| 116141 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 116142 | /* VFMSUB231PDZ128rkz */ |
| 116143 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 116144 | /* VFMSUB231PDZ256m */ |
| 116145 | VR256X, VR256X, VR256X, f256mem, |
| 116146 | /* VFMSUB231PDZ256mb */ |
| 116147 | VR256X, VR256X, VR256X, f64mem, |
| 116148 | /* VFMSUB231PDZ256mbk */ |
| 116149 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 116150 | /* VFMSUB231PDZ256mbkz */ |
| 116151 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 116152 | /* VFMSUB231PDZ256mk */ |
| 116153 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 116154 | /* VFMSUB231PDZ256mkz */ |
| 116155 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 116156 | /* VFMSUB231PDZ256r */ |
| 116157 | VR256X, VR256X, VR256X, VR256X, |
| 116158 | /* VFMSUB231PDZ256rk */ |
| 116159 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 116160 | /* VFMSUB231PDZ256rkz */ |
| 116161 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 116162 | /* VFMSUB231PDZm */ |
| 116163 | VR512, VR512, VR512, f512mem, |
| 116164 | /* VFMSUB231PDZmb */ |
| 116165 | VR512, VR512, VR512, f64mem, |
| 116166 | /* VFMSUB231PDZmbk */ |
| 116167 | VR512, VR512, VK8WM, VR512, f64mem, |
| 116168 | /* VFMSUB231PDZmbkz */ |
| 116169 | VR512, VR512, VK8WM, VR512, f64mem, |
| 116170 | /* VFMSUB231PDZmk */ |
| 116171 | VR512, VR512, VK8WM, VR512, f512mem, |
| 116172 | /* VFMSUB231PDZmkz */ |
| 116173 | VR512, VR512, VK8WM, VR512, f512mem, |
| 116174 | /* VFMSUB231PDZr */ |
| 116175 | VR512, VR512, VR512, VR512, |
| 116176 | /* VFMSUB231PDZrb */ |
| 116177 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116178 | /* VFMSUB231PDZrbk */ |
| 116179 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 116180 | /* VFMSUB231PDZrbkz */ |
| 116181 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 116182 | /* VFMSUB231PDZrk */ |
| 116183 | VR512, VR512, VK8WM, VR512, VR512, |
| 116184 | /* VFMSUB231PDZrkz */ |
| 116185 | VR512, VR512, VK8WM, VR512, VR512, |
| 116186 | /* VFMSUB231PDm */ |
| 116187 | VR128, VR128, VR128, f128mem, |
| 116188 | /* VFMSUB231PDr */ |
| 116189 | VR128, VR128, VR128, VR128, |
| 116190 | /* VFMSUB231PHZ128m */ |
| 116191 | VR128X, VR128X, VR128X, f128mem, |
| 116192 | /* VFMSUB231PHZ128mb */ |
| 116193 | VR128X, VR128X, VR128X, f16mem, |
| 116194 | /* VFMSUB231PHZ128mbk */ |
| 116195 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 116196 | /* VFMSUB231PHZ128mbkz */ |
| 116197 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 116198 | /* VFMSUB231PHZ128mk */ |
| 116199 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116200 | /* VFMSUB231PHZ128mkz */ |
| 116201 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116202 | /* VFMSUB231PHZ128r */ |
| 116203 | VR128X, VR128X, VR128X, VR128X, |
| 116204 | /* VFMSUB231PHZ128rk */ |
| 116205 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116206 | /* VFMSUB231PHZ128rkz */ |
| 116207 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116208 | /* VFMSUB231PHZ256m */ |
| 116209 | VR256X, VR256X, VR256X, f256mem, |
| 116210 | /* VFMSUB231PHZ256mb */ |
| 116211 | VR256X, VR256X, VR256X, f16mem, |
| 116212 | /* VFMSUB231PHZ256mbk */ |
| 116213 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 116214 | /* VFMSUB231PHZ256mbkz */ |
| 116215 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 116216 | /* VFMSUB231PHZ256mk */ |
| 116217 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116218 | /* VFMSUB231PHZ256mkz */ |
| 116219 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116220 | /* VFMSUB231PHZ256r */ |
| 116221 | VR256X, VR256X, VR256X, VR256X, |
| 116222 | /* VFMSUB231PHZ256rk */ |
| 116223 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116224 | /* VFMSUB231PHZ256rkz */ |
| 116225 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116226 | /* VFMSUB231PHZm */ |
| 116227 | VR512, VR512, VR512, f512mem, |
| 116228 | /* VFMSUB231PHZmb */ |
| 116229 | VR512, VR512, VR512, f16mem, |
| 116230 | /* VFMSUB231PHZmbk */ |
| 116231 | VR512, VR512, VK32WM, VR512, f16mem, |
| 116232 | /* VFMSUB231PHZmbkz */ |
| 116233 | VR512, VR512, VK32WM, VR512, f16mem, |
| 116234 | /* VFMSUB231PHZmk */ |
| 116235 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116236 | /* VFMSUB231PHZmkz */ |
| 116237 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116238 | /* VFMSUB231PHZr */ |
| 116239 | VR512, VR512, VR512, VR512, |
| 116240 | /* VFMSUB231PHZrb */ |
| 116241 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116242 | /* VFMSUB231PHZrbk */ |
| 116243 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 116244 | /* VFMSUB231PHZrbkz */ |
| 116245 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 116246 | /* VFMSUB231PHZrk */ |
| 116247 | VR512, VR512, VK32WM, VR512, VR512, |
| 116248 | /* VFMSUB231PHZrkz */ |
| 116249 | VR512, VR512, VK32WM, VR512, VR512, |
| 116250 | /* VFMSUB231PSYm */ |
| 116251 | VR256, VR256, VR256, f256mem, |
| 116252 | /* VFMSUB231PSYr */ |
| 116253 | VR256, VR256, VR256, VR256, |
| 116254 | /* VFMSUB231PSZ128m */ |
| 116255 | VR128X, VR128X, VR128X, f128mem, |
| 116256 | /* VFMSUB231PSZ128mb */ |
| 116257 | VR128X, VR128X, VR128X, f32mem, |
| 116258 | /* VFMSUB231PSZ128mbk */ |
| 116259 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 116260 | /* VFMSUB231PSZ128mbkz */ |
| 116261 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 116262 | /* VFMSUB231PSZ128mk */ |
| 116263 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 116264 | /* VFMSUB231PSZ128mkz */ |
| 116265 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 116266 | /* VFMSUB231PSZ128r */ |
| 116267 | VR128X, VR128X, VR128X, VR128X, |
| 116268 | /* VFMSUB231PSZ128rk */ |
| 116269 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 116270 | /* VFMSUB231PSZ128rkz */ |
| 116271 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 116272 | /* VFMSUB231PSZ256m */ |
| 116273 | VR256X, VR256X, VR256X, f256mem, |
| 116274 | /* VFMSUB231PSZ256mb */ |
| 116275 | VR256X, VR256X, VR256X, f32mem, |
| 116276 | /* VFMSUB231PSZ256mbk */ |
| 116277 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 116278 | /* VFMSUB231PSZ256mbkz */ |
| 116279 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 116280 | /* VFMSUB231PSZ256mk */ |
| 116281 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 116282 | /* VFMSUB231PSZ256mkz */ |
| 116283 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 116284 | /* VFMSUB231PSZ256r */ |
| 116285 | VR256X, VR256X, VR256X, VR256X, |
| 116286 | /* VFMSUB231PSZ256rk */ |
| 116287 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 116288 | /* VFMSUB231PSZ256rkz */ |
| 116289 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 116290 | /* VFMSUB231PSZm */ |
| 116291 | VR512, VR512, VR512, f512mem, |
| 116292 | /* VFMSUB231PSZmb */ |
| 116293 | VR512, VR512, VR512, f32mem, |
| 116294 | /* VFMSUB231PSZmbk */ |
| 116295 | VR512, VR512, VK16WM, VR512, f32mem, |
| 116296 | /* VFMSUB231PSZmbkz */ |
| 116297 | VR512, VR512, VK16WM, VR512, f32mem, |
| 116298 | /* VFMSUB231PSZmk */ |
| 116299 | VR512, VR512, VK16WM, VR512, f512mem, |
| 116300 | /* VFMSUB231PSZmkz */ |
| 116301 | VR512, VR512, VK16WM, VR512, f512mem, |
| 116302 | /* VFMSUB231PSZr */ |
| 116303 | VR512, VR512, VR512, VR512, |
| 116304 | /* VFMSUB231PSZrb */ |
| 116305 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116306 | /* VFMSUB231PSZrbk */ |
| 116307 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 116308 | /* VFMSUB231PSZrbkz */ |
| 116309 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 116310 | /* VFMSUB231PSZrk */ |
| 116311 | VR512, VR512, VK16WM, VR512, VR512, |
| 116312 | /* VFMSUB231PSZrkz */ |
| 116313 | VR512, VR512, VK16WM, VR512, VR512, |
| 116314 | /* VFMSUB231PSm */ |
| 116315 | VR128, VR128, VR128, f128mem, |
| 116316 | /* VFMSUB231PSr */ |
| 116317 | VR128, VR128, VR128, VR128, |
| 116318 | /* VFMSUB231SDZm */ |
| 116319 | FR64X, FR64X, FR64X, f64mem, |
| 116320 | /* VFMSUB231SDZm_Int */ |
| 116321 | VR128X, VR128X, VR128X, sdmem, |
| 116322 | /* VFMSUB231SDZmk_Int */ |
| 116323 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 116324 | /* VFMSUB231SDZmkz_Int */ |
| 116325 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 116326 | /* VFMSUB231SDZr */ |
| 116327 | FR64X, FR64X, FR64X, FR64X, |
| 116328 | /* VFMSUB231SDZr_Int */ |
| 116329 | VR128X, VR128X, VR128X, VR128X, |
| 116330 | /* VFMSUB231SDZrb */ |
| 116331 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 116332 | /* VFMSUB231SDZrb_Int */ |
| 116333 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 116334 | /* VFMSUB231SDZrbk_Int */ |
| 116335 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116336 | /* VFMSUB231SDZrbkz_Int */ |
| 116337 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116338 | /* VFMSUB231SDZrk_Int */ |
| 116339 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116340 | /* VFMSUB231SDZrkz_Int */ |
| 116341 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116342 | /* VFMSUB231SDm */ |
| 116343 | FR64, FR64, FR64, f64mem, |
| 116344 | /* VFMSUB231SDm_Int */ |
| 116345 | VR128, VR128, VR128, sdmem, |
| 116346 | /* VFMSUB231SDr */ |
| 116347 | FR64, FR64, FR64, FR64, |
| 116348 | /* VFMSUB231SDr_Int */ |
| 116349 | VR128, VR128, VR128, VR128, |
| 116350 | /* VFMSUB231SHZm */ |
| 116351 | FR16X, FR16X, FR16X, f16mem, |
| 116352 | /* VFMSUB231SHZm_Int */ |
| 116353 | VR128X, VR128X, VR128X, shmem, |
| 116354 | /* VFMSUB231SHZmk_Int */ |
| 116355 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 116356 | /* VFMSUB231SHZmkz_Int */ |
| 116357 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 116358 | /* VFMSUB231SHZr */ |
| 116359 | FR16X, FR16X, FR16X, FR16X, |
| 116360 | /* VFMSUB231SHZr_Int */ |
| 116361 | VR128X, VR128X, VR128X, VR128X, |
| 116362 | /* VFMSUB231SHZrb */ |
| 116363 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 116364 | /* VFMSUB231SHZrb_Int */ |
| 116365 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 116366 | /* VFMSUB231SHZrbk_Int */ |
| 116367 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116368 | /* VFMSUB231SHZrbkz_Int */ |
| 116369 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116370 | /* VFMSUB231SHZrk_Int */ |
| 116371 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116372 | /* VFMSUB231SHZrkz_Int */ |
| 116373 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116374 | /* VFMSUB231SSZm */ |
| 116375 | FR32X, FR32X, FR32X, f32mem, |
| 116376 | /* VFMSUB231SSZm_Int */ |
| 116377 | VR128X, VR128X, VR128X, ssmem, |
| 116378 | /* VFMSUB231SSZmk_Int */ |
| 116379 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 116380 | /* VFMSUB231SSZmkz_Int */ |
| 116381 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 116382 | /* VFMSUB231SSZr */ |
| 116383 | FR32X, FR32X, FR32X, FR32X, |
| 116384 | /* VFMSUB231SSZr_Int */ |
| 116385 | VR128X, VR128X, VR128X, VR128X, |
| 116386 | /* VFMSUB231SSZrb */ |
| 116387 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 116388 | /* VFMSUB231SSZrb_Int */ |
| 116389 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 116390 | /* VFMSUB231SSZrbk_Int */ |
| 116391 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116392 | /* VFMSUB231SSZrbkz_Int */ |
| 116393 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 116394 | /* VFMSUB231SSZrk_Int */ |
| 116395 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116396 | /* VFMSUB231SSZrkz_Int */ |
| 116397 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 116398 | /* VFMSUB231SSm */ |
| 116399 | FR32, FR32, FR32, f32mem, |
| 116400 | /* VFMSUB231SSm_Int */ |
| 116401 | VR128, VR128, VR128, ssmem, |
| 116402 | /* VFMSUB231SSr */ |
| 116403 | FR32, FR32, FR32, FR32, |
| 116404 | /* VFMSUB231SSr_Int */ |
| 116405 | VR128, VR128, VR128, VR128, |
| 116406 | /* VFMSUBADD132PDYm */ |
| 116407 | VR256, VR256, VR256, f256mem, |
| 116408 | /* VFMSUBADD132PDYr */ |
| 116409 | VR256, VR256, VR256, VR256, |
| 116410 | /* VFMSUBADD132PDZ128m */ |
| 116411 | VR128X, VR128X, VR128X, f128mem, |
| 116412 | /* VFMSUBADD132PDZ128mb */ |
| 116413 | VR128X, VR128X, VR128X, f64mem, |
| 116414 | /* VFMSUBADD132PDZ128mbk */ |
| 116415 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 116416 | /* VFMSUBADD132PDZ128mbkz */ |
| 116417 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 116418 | /* VFMSUBADD132PDZ128mk */ |
| 116419 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 116420 | /* VFMSUBADD132PDZ128mkz */ |
| 116421 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 116422 | /* VFMSUBADD132PDZ128r */ |
| 116423 | VR128X, VR128X, VR128X, VR128X, |
| 116424 | /* VFMSUBADD132PDZ128rk */ |
| 116425 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 116426 | /* VFMSUBADD132PDZ128rkz */ |
| 116427 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 116428 | /* VFMSUBADD132PDZ256m */ |
| 116429 | VR256X, VR256X, VR256X, f256mem, |
| 116430 | /* VFMSUBADD132PDZ256mb */ |
| 116431 | VR256X, VR256X, VR256X, f64mem, |
| 116432 | /* VFMSUBADD132PDZ256mbk */ |
| 116433 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 116434 | /* VFMSUBADD132PDZ256mbkz */ |
| 116435 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 116436 | /* VFMSUBADD132PDZ256mk */ |
| 116437 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 116438 | /* VFMSUBADD132PDZ256mkz */ |
| 116439 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 116440 | /* VFMSUBADD132PDZ256r */ |
| 116441 | VR256X, VR256X, VR256X, VR256X, |
| 116442 | /* VFMSUBADD132PDZ256rk */ |
| 116443 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 116444 | /* VFMSUBADD132PDZ256rkz */ |
| 116445 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 116446 | /* VFMSUBADD132PDZm */ |
| 116447 | VR512, VR512, VR512, f512mem, |
| 116448 | /* VFMSUBADD132PDZmb */ |
| 116449 | VR512, VR512, VR512, f64mem, |
| 116450 | /* VFMSUBADD132PDZmbk */ |
| 116451 | VR512, VR512, VK8WM, VR512, f64mem, |
| 116452 | /* VFMSUBADD132PDZmbkz */ |
| 116453 | VR512, VR512, VK8WM, VR512, f64mem, |
| 116454 | /* VFMSUBADD132PDZmk */ |
| 116455 | VR512, VR512, VK8WM, VR512, f512mem, |
| 116456 | /* VFMSUBADD132PDZmkz */ |
| 116457 | VR512, VR512, VK8WM, VR512, f512mem, |
| 116458 | /* VFMSUBADD132PDZr */ |
| 116459 | VR512, VR512, VR512, VR512, |
| 116460 | /* VFMSUBADD132PDZrb */ |
| 116461 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116462 | /* VFMSUBADD132PDZrbk */ |
| 116463 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 116464 | /* VFMSUBADD132PDZrbkz */ |
| 116465 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 116466 | /* VFMSUBADD132PDZrk */ |
| 116467 | VR512, VR512, VK8WM, VR512, VR512, |
| 116468 | /* VFMSUBADD132PDZrkz */ |
| 116469 | VR512, VR512, VK8WM, VR512, VR512, |
| 116470 | /* VFMSUBADD132PDm */ |
| 116471 | VR128, VR128, VR128, f128mem, |
| 116472 | /* VFMSUBADD132PDr */ |
| 116473 | VR128, VR128, VR128, VR128, |
| 116474 | /* VFMSUBADD132PHZ128m */ |
| 116475 | VR128X, VR128X, VR128X, f128mem, |
| 116476 | /* VFMSUBADD132PHZ128mb */ |
| 116477 | VR128X, VR128X, VR128X, f16mem, |
| 116478 | /* VFMSUBADD132PHZ128mbk */ |
| 116479 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 116480 | /* VFMSUBADD132PHZ128mbkz */ |
| 116481 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 116482 | /* VFMSUBADD132PHZ128mk */ |
| 116483 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116484 | /* VFMSUBADD132PHZ128mkz */ |
| 116485 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116486 | /* VFMSUBADD132PHZ128r */ |
| 116487 | VR128X, VR128X, VR128X, VR128X, |
| 116488 | /* VFMSUBADD132PHZ128rk */ |
| 116489 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116490 | /* VFMSUBADD132PHZ128rkz */ |
| 116491 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116492 | /* VFMSUBADD132PHZ256m */ |
| 116493 | VR256X, VR256X, VR256X, f256mem, |
| 116494 | /* VFMSUBADD132PHZ256mb */ |
| 116495 | VR256X, VR256X, VR256X, f16mem, |
| 116496 | /* VFMSUBADD132PHZ256mbk */ |
| 116497 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 116498 | /* VFMSUBADD132PHZ256mbkz */ |
| 116499 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 116500 | /* VFMSUBADD132PHZ256mk */ |
| 116501 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116502 | /* VFMSUBADD132PHZ256mkz */ |
| 116503 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116504 | /* VFMSUBADD132PHZ256r */ |
| 116505 | VR256X, VR256X, VR256X, VR256X, |
| 116506 | /* VFMSUBADD132PHZ256rk */ |
| 116507 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116508 | /* VFMSUBADD132PHZ256rkz */ |
| 116509 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116510 | /* VFMSUBADD132PHZm */ |
| 116511 | VR512, VR512, VR512, f512mem, |
| 116512 | /* VFMSUBADD132PHZmb */ |
| 116513 | VR512, VR512, VR512, f16mem, |
| 116514 | /* VFMSUBADD132PHZmbk */ |
| 116515 | VR512, VR512, VK32WM, VR512, f16mem, |
| 116516 | /* VFMSUBADD132PHZmbkz */ |
| 116517 | VR512, VR512, VK32WM, VR512, f16mem, |
| 116518 | /* VFMSUBADD132PHZmk */ |
| 116519 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116520 | /* VFMSUBADD132PHZmkz */ |
| 116521 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116522 | /* VFMSUBADD132PHZr */ |
| 116523 | VR512, VR512, VR512, VR512, |
| 116524 | /* VFMSUBADD132PHZrb */ |
| 116525 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116526 | /* VFMSUBADD132PHZrbk */ |
| 116527 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 116528 | /* VFMSUBADD132PHZrbkz */ |
| 116529 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 116530 | /* VFMSUBADD132PHZrk */ |
| 116531 | VR512, VR512, VK32WM, VR512, VR512, |
| 116532 | /* VFMSUBADD132PHZrkz */ |
| 116533 | VR512, VR512, VK32WM, VR512, VR512, |
| 116534 | /* VFMSUBADD132PSYm */ |
| 116535 | VR256, VR256, VR256, f256mem, |
| 116536 | /* VFMSUBADD132PSYr */ |
| 116537 | VR256, VR256, VR256, VR256, |
| 116538 | /* VFMSUBADD132PSZ128m */ |
| 116539 | VR128X, VR128X, VR128X, f128mem, |
| 116540 | /* VFMSUBADD132PSZ128mb */ |
| 116541 | VR128X, VR128X, VR128X, f32mem, |
| 116542 | /* VFMSUBADD132PSZ128mbk */ |
| 116543 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 116544 | /* VFMSUBADD132PSZ128mbkz */ |
| 116545 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 116546 | /* VFMSUBADD132PSZ128mk */ |
| 116547 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 116548 | /* VFMSUBADD132PSZ128mkz */ |
| 116549 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 116550 | /* VFMSUBADD132PSZ128r */ |
| 116551 | VR128X, VR128X, VR128X, VR128X, |
| 116552 | /* VFMSUBADD132PSZ128rk */ |
| 116553 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 116554 | /* VFMSUBADD132PSZ128rkz */ |
| 116555 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 116556 | /* VFMSUBADD132PSZ256m */ |
| 116557 | VR256X, VR256X, VR256X, f256mem, |
| 116558 | /* VFMSUBADD132PSZ256mb */ |
| 116559 | VR256X, VR256X, VR256X, f32mem, |
| 116560 | /* VFMSUBADD132PSZ256mbk */ |
| 116561 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 116562 | /* VFMSUBADD132PSZ256mbkz */ |
| 116563 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 116564 | /* VFMSUBADD132PSZ256mk */ |
| 116565 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 116566 | /* VFMSUBADD132PSZ256mkz */ |
| 116567 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 116568 | /* VFMSUBADD132PSZ256r */ |
| 116569 | VR256X, VR256X, VR256X, VR256X, |
| 116570 | /* VFMSUBADD132PSZ256rk */ |
| 116571 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 116572 | /* VFMSUBADD132PSZ256rkz */ |
| 116573 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 116574 | /* VFMSUBADD132PSZm */ |
| 116575 | VR512, VR512, VR512, f512mem, |
| 116576 | /* VFMSUBADD132PSZmb */ |
| 116577 | VR512, VR512, VR512, f32mem, |
| 116578 | /* VFMSUBADD132PSZmbk */ |
| 116579 | VR512, VR512, VK16WM, VR512, f32mem, |
| 116580 | /* VFMSUBADD132PSZmbkz */ |
| 116581 | VR512, VR512, VK16WM, VR512, f32mem, |
| 116582 | /* VFMSUBADD132PSZmk */ |
| 116583 | VR512, VR512, VK16WM, VR512, f512mem, |
| 116584 | /* VFMSUBADD132PSZmkz */ |
| 116585 | VR512, VR512, VK16WM, VR512, f512mem, |
| 116586 | /* VFMSUBADD132PSZr */ |
| 116587 | VR512, VR512, VR512, VR512, |
| 116588 | /* VFMSUBADD132PSZrb */ |
| 116589 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116590 | /* VFMSUBADD132PSZrbk */ |
| 116591 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 116592 | /* VFMSUBADD132PSZrbkz */ |
| 116593 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 116594 | /* VFMSUBADD132PSZrk */ |
| 116595 | VR512, VR512, VK16WM, VR512, VR512, |
| 116596 | /* VFMSUBADD132PSZrkz */ |
| 116597 | VR512, VR512, VK16WM, VR512, VR512, |
| 116598 | /* VFMSUBADD132PSm */ |
| 116599 | VR128, VR128, VR128, f128mem, |
| 116600 | /* VFMSUBADD132PSr */ |
| 116601 | VR128, VR128, VR128, VR128, |
| 116602 | /* VFMSUBADD213PDYm */ |
| 116603 | VR256, VR256, VR256, f256mem, |
| 116604 | /* VFMSUBADD213PDYr */ |
| 116605 | VR256, VR256, VR256, VR256, |
| 116606 | /* VFMSUBADD213PDZ128m */ |
| 116607 | VR128X, VR128X, VR128X, f128mem, |
| 116608 | /* VFMSUBADD213PDZ128mb */ |
| 116609 | VR128X, VR128X, VR128X, f64mem, |
| 116610 | /* VFMSUBADD213PDZ128mbk */ |
| 116611 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 116612 | /* VFMSUBADD213PDZ128mbkz */ |
| 116613 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 116614 | /* VFMSUBADD213PDZ128mk */ |
| 116615 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 116616 | /* VFMSUBADD213PDZ128mkz */ |
| 116617 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 116618 | /* VFMSUBADD213PDZ128r */ |
| 116619 | VR128X, VR128X, VR128X, VR128X, |
| 116620 | /* VFMSUBADD213PDZ128rk */ |
| 116621 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 116622 | /* VFMSUBADD213PDZ128rkz */ |
| 116623 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 116624 | /* VFMSUBADD213PDZ256m */ |
| 116625 | VR256X, VR256X, VR256X, f256mem, |
| 116626 | /* VFMSUBADD213PDZ256mb */ |
| 116627 | VR256X, VR256X, VR256X, f64mem, |
| 116628 | /* VFMSUBADD213PDZ256mbk */ |
| 116629 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 116630 | /* VFMSUBADD213PDZ256mbkz */ |
| 116631 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 116632 | /* VFMSUBADD213PDZ256mk */ |
| 116633 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 116634 | /* VFMSUBADD213PDZ256mkz */ |
| 116635 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 116636 | /* VFMSUBADD213PDZ256r */ |
| 116637 | VR256X, VR256X, VR256X, VR256X, |
| 116638 | /* VFMSUBADD213PDZ256rk */ |
| 116639 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 116640 | /* VFMSUBADD213PDZ256rkz */ |
| 116641 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 116642 | /* VFMSUBADD213PDZm */ |
| 116643 | VR512, VR512, VR512, f512mem, |
| 116644 | /* VFMSUBADD213PDZmb */ |
| 116645 | VR512, VR512, VR512, f64mem, |
| 116646 | /* VFMSUBADD213PDZmbk */ |
| 116647 | VR512, VR512, VK8WM, VR512, f64mem, |
| 116648 | /* VFMSUBADD213PDZmbkz */ |
| 116649 | VR512, VR512, VK8WM, VR512, f64mem, |
| 116650 | /* VFMSUBADD213PDZmk */ |
| 116651 | VR512, VR512, VK8WM, VR512, f512mem, |
| 116652 | /* VFMSUBADD213PDZmkz */ |
| 116653 | VR512, VR512, VK8WM, VR512, f512mem, |
| 116654 | /* VFMSUBADD213PDZr */ |
| 116655 | VR512, VR512, VR512, VR512, |
| 116656 | /* VFMSUBADD213PDZrb */ |
| 116657 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116658 | /* VFMSUBADD213PDZrbk */ |
| 116659 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 116660 | /* VFMSUBADD213PDZrbkz */ |
| 116661 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 116662 | /* VFMSUBADD213PDZrk */ |
| 116663 | VR512, VR512, VK8WM, VR512, VR512, |
| 116664 | /* VFMSUBADD213PDZrkz */ |
| 116665 | VR512, VR512, VK8WM, VR512, VR512, |
| 116666 | /* VFMSUBADD213PDm */ |
| 116667 | VR128, VR128, VR128, f128mem, |
| 116668 | /* VFMSUBADD213PDr */ |
| 116669 | VR128, VR128, VR128, VR128, |
| 116670 | /* VFMSUBADD213PHZ128m */ |
| 116671 | VR128X, VR128X, VR128X, f128mem, |
| 116672 | /* VFMSUBADD213PHZ128mb */ |
| 116673 | VR128X, VR128X, VR128X, f16mem, |
| 116674 | /* VFMSUBADD213PHZ128mbk */ |
| 116675 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 116676 | /* VFMSUBADD213PHZ128mbkz */ |
| 116677 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 116678 | /* VFMSUBADD213PHZ128mk */ |
| 116679 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116680 | /* VFMSUBADD213PHZ128mkz */ |
| 116681 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116682 | /* VFMSUBADD213PHZ128r */ |
| 116683 | VR128X, VR128X, VR128X, VR128X, |
| 116684 | /* VFMSUBADD213PHZ128rk */ |
| 116685 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116686 | /* VFMSUBADD213PHZ128rkz */ |
| 116687 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116688 | /* VFMSUBADD213PHZ256m */ |
| 116689 | VR256X, VR256X, VR256X, f256mem, |
| 116690 | /* VFMSUBADD213PHZ256mb */ |
| 116691 | VR256X, VR256X, VR256X, f16mem, |
| 116692 | /* VFMSUBADD213PHZ256mbk */ |
| 116693 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 116694 | /* VFMSUBADD213PHZ256mbkz */ |
| 116695 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 116696 | /* VFMSUBADD213PHZ256mk */ |
| 116697 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116698 | /* VFMSUBADD213PHZ256mkz */ |
| 116699 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116700 | /* VFMSUBADD213PHZ256r */ |
| 116701 | VR256X, VR256X, VR256X, VR256X, |
| 116702 | /* VFMSUBADD213PHZ256rk */ |
| 116703 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116704 | /* VFMSUBADD213PHZ256rkz */ |
| 116705 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116706 | /* VFMSUBADD213PHZm */ |
| 116707 | VR512, VR512, VR512, f512mem, |
| 116708 | /* VFMSUBADD213PHZmb */ |
| 116709 | VR512, VR512, VR512, f16mem, |
| 116710 | /* VFMSUBADD213PHZmbk */ |
| 116711 | VR512, VR512, VK32WM, VR512, f16mem, |
| 116712 | /* VFMSUBADD213PHZmbkz */ |
| 116713 | VR512, VR512, VK32WM, VR512, f16mem, |
| 116714 | /* VFMSUBADD213PHZmk */ |
| 116715 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116716 | /* VFMSUBADD213PHZmkz */ |
| 116717 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116718 | /* VFMSUBADD213PHZr */ |
| 116719 | VR512, VR512, VR512, VR512, |
| 116720 | /* VFMSUBADD213PHZrb */ |
| 116721 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116722 | /* VFMSUBADD213PHZrbk */ |
| 116723 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 116724 | /* VFMSUBADD213PHZrbkz */ |
| 116725 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 116726 | /* VFMSUBADD213PHZrk */ |
| 116727 | VR512, VR512, VK32WM, VR512, VR512, |
| 116728 | /* VFMSUBADD213PHZrkz */ |
| 116729 | VR512, VR512, VK32WM, VR512, VR512, |
| 116730 | /* VFMSUBADD213PSYm */ |
| 116731 | VR256, VR256, VR256, f256mem, |
| 116732 | /* VFMSUBADD213PSYr */ |
| 116733 | VR256, VR256, VR256, VR256, |
| 116734 | /* VFMSUBADD213PSZ128m */ |
| 116735 | VR128X, VR128X, VR128X, f128mem, |
| 116736 | /* VFMSUBADD213PSZ128mb */ |
| 116737 | VR128X, VR128X, VR128X, f32mem, |
| 116738 | /* VFMSUBADD213PSZ128mbk */ |
| 116739 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 116740 | /* VFMSUBADD213PSZ128mbkz */ |
| 116741 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 116742 | /* VFMSUBADD213PSZ128mk */ |
| 116743 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 116744 | /* VFMSUBADD213PSZ128mkz */ |
| 116745 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 116746 | /* VFMSUBADD213PSZ128r */ |
| 116747 | VR128X, VR128X, VR128X, VR128X, |
| 116748 | /* VFMSUBADD213PSZ128rk */ |
| 116749 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 116750 | /* VFMSUBADD213PSZ128rkz */ |
| 116751 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 116752 | /* VFMSUBADD213PSZ256m */ |
| 116753 | VR256X, VR256X, VR256X, f256mem, |
| 116754 | /* VFMSUBADD213PSZ256mb */ |
| 116755 | VR256X, VR256X, VR256X, f32mem, |
| 116756 | /* VFMSUBADD213PSZ256mbk */ |
| 116757 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 116758 | /* VFMSUBADD213PSZ256mbkz */ |
| 116759 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 116760 | /* VFMSUBADD213PSZ256mk */ |
| 116761 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 116762 | /* VFMSUBADD213PSZ256mkz */ |
| 116763 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 116764 | /* VFMSUBADD213PSZ256r */ |
| 116765 | VR256X, VR256X, VR256X, VR256X, |
| 116766 | /* VFMSUBADD213PSZ256rk */ |
| 116767 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 116768 | /* VFMSUBADD213PSZ256rkz */ |
| 116769 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 116770 | /* VFMSUBADD213PSZm */ |
| 116771 | VR512, VR512, VR512, f512mem, |
| 116772 | /* VFMSUBADD213PSZmb */ |
| 116773 | VR512, VR512, VR512, f32mem, |
| 116774 | /* VFMSUBADD213PSZmbk */ |
| 116775 | VR512, VR512, VK16WM, VR512, f32mem, |
| 116776 | /* VFMSUBADD213PSZmbkz */ |
| 116777 | VR512, VR512, VK16WM, VR512, f32mem, |
| 116778 | /* VFMSUBADD213PSZmk */ |
| 116779 | VR512, VR512, VK16WM, VR512, f512mem, |
| 116780 | /* VFMSUBADD213PSZmkz */ |
| 116781 | VR512, VR512, VK16WM, VR512, f512mem, |
| 116782 | /* VFMSUBADD213PSZr */ |
| 116783 | VR512, VR512, VR512, VR512, |
| 116784 | /* VFMSUBADD213PSZrb */ |
| 116785 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116786 | /* VFMSUBADD213PSZrbk */ |
| 116787 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 116788 | /* VFMSUBADD213PSZrbkz */ |
| 116789 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 116790 | /* VFMSUBADD213PSZrk */ |
| 116791 | VR512, VR512, VK16WM, VR512, VR512, |
| 116792 | /* VFMSUBADD213PSZrkz */ |
| 116793 | VR512, VR512, VK16WM, VR512, VR512, |
| 116794 | /* VFMSUBADD213PSm */ |
| 116795 | VR128, VR128, VR128, f128mem, |
| 116796 | /* VFMSUBADD213PSr */ |
| 116797 | VR128, VR128, VR128, VR128, |
| 116798 | /* VFMSUBADD231PDYm */ |
| 116799 | VR256, VR256, VR256, f256mem, |
| 116800 | /* VFMSUBADD231PDYr */ |
| 116801 | VR256, VR256, VR256, VR256, |
| 116802 | /* VFMSUBADD231PDZ128m */ |
| 116803 | VR128X, VR128X, VR128X, f128mem, |
| 116804 | /* VFMSUBADD231PDZ128mb */ |
| 116805 | VR128X, VR128X, VR128X, f64mem, |
| 116806 | /* VFMSUBADD231PDZ128mbk */ |
| 116807 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 116808 | /* VFMSUBADD231PDZ128mbkz */ |
| 116809 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 116810 | /* VFMSUBADD231PDZ128mk */ |
| 116811 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 116812 | /* VFMSUBADD231PDZ128mkz */ |
| 116813 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 116814 | /* VFMSUBADD231PDZ128r */ |
| 116815 | VR128X, VR128X, VR128X, VR128X, |
| 116816 | /* VFMSUBADD231PDZ128rk */ |
| 116817 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 116818 | /* VFMSUBADD231PDZ128rkz */ |
| 116819 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 116820 | /* VFMSUBADD231PDZ256m */ |
| 116821 | VR256X, VR256X, VR256X, f256mem, |
| 116822 | /* VFMSUBADD231PDZ256mb */ |
| 116823 | VR256X, VR256X, VR256X, f64mem, |
| 116824 | /* VFMSUBADD231PDZ256mbk */ |
| 116825 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 116826 | /* VFMSUBADD231PDZ256mbkz */ |
| 116827 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 116828 | /* VFMSUBADD231PDZ256mk */ |
| 116829 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 116830 | /* VFMSUBADD231PDZ256mkz */ |
| 116831 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 116832 | /* VFMSUBADD231PDZ256r */ |
| 116833 | VR256X, VR256X, VR256X, VR256X, |
| 116834 | /* VFMSUBADD231PDZ256rk */ |
| 116835 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 116836 | /* VFMSUBADD231PDZ256rkz */ |
| 116837 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 116838 | /* VFMSUBADD231PDZm */ |
| 116839 | VR512, VR512, VR512, f512mem, |
| 116840 | /* VFMSUBADD231PDZmb */ |
| 116841 | VR512, VR512, VR512, f64mem, |
| 116842 | /* VFMSUBADD231PDZmbk */ |
| 116843 | VR512, VR512, VK8WM, VR512, f64mem, |
| 116844 | /* VFMSUBADD231PDZmbkz */ |
| 116845 | VR512, VR512, VK8WM, VR512, f64mem, |
| 116846 | /* VFMSUBADD231PDZmk */ |
| 116847 | VR512, VR512, VK8WM, VR512, f512mem, |
| 116848 | /* VFMSUBADD231PDZmkz */ |
| 116849 | VR512, VR512, VK8WM, VR512, f512mem, |
| 116850 | /* VFMSUBADD231PDZr */ |
| 116851 | VR512, VR512, VR512, VR512, |
| 116852 | /* VFMSUBADD231PDZrb */ |
| 116853 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116854 | /* VFMSUBADD231PDZrbk */ |
| 116855 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 116856 | /* VFMSUBADD231PDZrbkz */ |
| 116857 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 116858 | /* VFMSUBADD231PDZrk */ |
| 116859 | VR512, VR512, VK8WM, VR512, VR512, |
| 116860 | /* VFMSUBADD231PDZrkz */ |
| 116861 | VR512, VR512, VK8WM, VR512, VR512, |
| 116862 | /* VFMSUBADD231PDm */ |
| 116863 | VR128, VR128, VR128, f128mem, |
| 116864 | /* VFMSUBADD231PDr */ |
| 116865 | VR128, VR128, VR128, VR128, |
| 116866 | /* VFMSUBADD231PHZ128m */ |
| 116867 | VR128X, VR128X, VR128X, f128mem, |
| 116868 | /* VFMSUBADD231PHZ128mb */ |
| 116869 | VR128X, VR128X, VR128X, f16mem, |
| 116870 | /* VFMSUBADD231PHZ128mbk */ |
| 116871 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 116872 | /* VFMSUBADD231PHZ128mbkz */ |
| 116873 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 116874 | /* VFMSUBADD231PHZ128mk */ |
| 116875 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116876 | /* VFMSUBADD231PHZ128mkz */ |
| 116877 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116878 | /* VFMSUBADD231PHZ128r */ |
| 116879 | VR128X, VR128X, VR128X, VR128X, |
| 116880 | /* VFMSUBADD231PHZ128rk */ |
| 116881 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116882 | /* VFMSUBADD231PHZ128rkz */ |
| 116883 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116884 | /* VFMSUBADD231PHZ256m */ |
| 116885 | VR256X, VR256X, VR256X, f256mem, |
| 116886 | /* VFMSUBADD231PHZ256mb */ |
| 116887 | VR256X, VR256X, VR256X, f16mem, |
| 116888 | /* VFMSUBADD231PHZ256mbk */ |
| 116889 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 116890 | /* VFMSUBADD231PHZ256mbkz */ |
| 116891 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 116892 | /* VFMSUBADD231PHZ256mk */ |
| 116893 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116894 | /* VFMSUBADD231PHZ256mkz */ |
| 116895 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116896 | /* VFMSUBADD231PHZ256r */ |
| 116897 | VR256X, VR256X, VR256X, VR256X, |
| 116898 | /* VFMSUBADD231PHZ256rk */ |
| 116899 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116900 | /* VFMSUBADD231PHZ256rkz */ |
| 116901 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116902 | /* VFMSUBADD231PHZm */ |
| 116903 | VR512, VR512, VR512, f512mem, |
| 116904 | /* VFMSUBADD231PHZmb */ |
| 116905 | VR512, VR512, VR512, f16mem, |
| 116906 | /* VFMSUBADD231PHZmbk */ |
| 116907 | VR512, VR512, VK32WM, VR512, f16mem, |
| 116908 | /* VFMSUBADD231PHZmbkz */ |
| 116909 | VR512, VR512, VK32WM, VR512, f16mem, |
| 116910 | /* VFMSUBADD231PHZmk */ |
| 116911 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116912 | /* VFMSUBADD231PHZmkz */ |
| 116913 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116914 | /* VFMSUBADD231PHZr */ |
| 116915 | VR512, VR512, VR512, VR512, |
| 116916 | /* VFMSUBADD231PHZrb */ |
| 116917 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116918 | /* VFMSUBADD231PHZrbk */ |
| 116919 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 116920 | /* VFMSUBADD231PHZrbkz */ |
| 116921 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 116922 | /* VFMSUBADD231PHZrk */ |
| 116923 | VR512, VR512, VK32WM, VR512, VR512, |
| 116924 | /* VFMSUBADD231PHZrkz */ |
| 116925 | VR512, VR512, VK32WM, VR512, VR512, |
| 116926 | /* VFMSUBADD231PSYm */ |
| 116927 | VR256, VR256, VR256, f256mem, |
| 116928 | /* VFMSUBADD231PSYr */ |
| 116929 | VR256, VR256, VR256, VR256, |
| 116930 | /* VFMSUBADD231PSZ128m */ |
| 116931 | VR128X, VR128X, VR128X, f128mem, |
| 116932 | /* VFMSUBADD231PSZ128mb */ |
| 116933 | VR128X, VR128X, VR128X, f32mem, |
| 116934 | /* VFMSUBADD231PSZ128mbk */ |
| 116935 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 116936 | /* VFMSUBADD231PSZ128mbkz */ |
| 116937 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 116938 | /* VFMSUBADD231PSZ128mk */ |
| 116939 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 116940 | /* VFMSUBADD231PSZ128mkz */ |
| 116941 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 116942 | /* VFMSUBADD231PSZ128r */ |
| 116943 | VR128X, VR128X, VR128X, VR128X, |
| 116944 | /* VFMSUBADD231PSZ128rk */ |
| 116945 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 116946 | /* VFMSUBADD231PSZ128rkz */ |
| 116947 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 116948 | /* VFMSUBADD231PSZ256m */ |
| 116949 | VR256X, VR256X, VR256X, f256mem, |
| 116950 | /* VFMSUBADD231PSZ256mb */ |
| 116951 | VR256X, VR256X, VR256X, f32mem, |
| 116952 | /* VFMSUBADD231PSZ256mbk */ |
| 116953 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 116954 | /* VFMSUBADD231PSZ256mbkz */ |
| 116955 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 116956 | /* VFMSUBADD231PSZ256mk */ |
| 116957 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 116958 | /* VFMSUBADD231PSZ256mkz */ |
| 116959 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 116960 | /* VFMSUBADD231PSZ256r */ |
| 116961 | VR256X, VR256X, VR256X, VR256X, |
| 116962 | /* VFMSUBADD231PSZ256rk */ |
| 116963 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 116964 | /* VFMSUBADD231PSZ256rkz */ |
| 116965 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 116966 | /* VFMSUBADD231PSZm */ |
| 116967 | VR512, VR512, VR512, f512mem, |
| 116968 | /* VFMSUBADD231PSZmb */ |
| 116969 | VR512, VR512, VR512, f32mem, |
| 116970 | /* VFMSUBADD231PSZmbk */ |
| 116971 | VR512, VR512, VK16WM, VR512, f32mem, |
| 116972 | /* VFMSUBADD231PSZmbkz */ |
| 116973 | VR512, VR512, VK16WM, VR512, f32mem, |
| 116974 | /* VFMSUBADD231PSZmk */ |
| 116975 | VR512, VR512, VK16WM, VR512, f512mem, |
| 116976 | /* VFMSUBADD231PSZmkz */ |
| 116977 | VR512, VR512, VK16WM, VR512, f512mem, |
| 116978 | /* VFMSUBADD231PSZr */ |
| 116979 | VR512, VR512, VR512, VR512, |
| 116980 | /* VFMSUBADD231PSZrb */ |
| 116981 | VR512, VR512, VR512, VR512, AVX512RC, |
| 116982 | /* VFMSUBADD231PSZrbk */ |
| 116983 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 116984 | /* VFMSUBADD231PSZrbkz */ |
| 116985 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 116986 | /* VFMSUBADD231PSZrk */ |
| 116987 | VR512, VR512, VK16WM, VR512, VR512, |
| 116988 | /* VFMSUBADD231PSZrkz */ |
| 116989 | VR512, VR512, VK16WM, VR512, VR512, |
| 116990 | /* VFMSUBADD231PSm */ |
| 116991 | VR128, VR128, VR128, f128mem, |
| 116992 | /* VFMSUBADD231PSr */ |
| 116993 | VR128, VR128, VR128, VR128, |
| 116994 | /* VFMSUBADDPD4Ymr */ |
| 116995 | VR256, VR256, f256mem, VR256, |
| 116996 | /* VFMSUBADDPD4Yrm */ |
| 116997 | VR256, VR256, VR256, f256mem, |
| 116998 | /* VFMSUBADDPD4Yrr */ |
| 116999 | VR256, VR256, VR256, VR256, |
| 117000 | /* VFMSUBADDPD4Yrr_REV */ |
| 117001 | VR256, VR256, VR256, VR256, |
| 117002 | /* VFMSUBADDPD4mr */ |
| 117003 | VR128, VR128, f128mem, VR128, |
| 117004 | /* VFMSUBADDPD4rm */ |
| 117005 | VR128, VR128, VR128, f128mem, |
| 117006 | /* VFMSUBADDPD4rr */ |
| 117007 | VR128, VR128, VR128, VR128, |
| 117008 | /* VFMSUBADDPD4rr_REV */ |
| 117009 | VR128, VR128, VR128, VR128, |
| 117010 | /* VFMSUBADDPS4Ymr */ |
| 117011 | VR256, VR256, f256mem, VR256, |
| 117012 | /* VFMSUBADDPS4Yrm */ |
| 117013 | VR256, VR256, VR256, f256mem, |
| 117014 | /* VFMSUBADDPS4Yrr */ |
| 117015 | VR256, VR256, VR256, VR256, |
| 117016 | /* VFMSUBADDPS4Yrr_REV */ |
| 117017 | VR256, VR256, VR256, VR256, |
| 117018 | /* VFMSUBADDPS4mr */ |
| 117019 | VR128, VR128, f128mem, VR128, |
| 117020 | /* VFMSUBADDPS4rm */ |
| 117021 | VR128, VR128, VR128, f128mem, |
| 117022 | /* VFMSUBADDPS4rr */ |
| 117023 | VR128, VR128, VR128, VR128, |
| 117024 | /* VFMSUBADDPS4rr_REV */ |
| 117025 | VR128, VR128, VR128, VR128, |
| 117026 | /* VFMSUBPD4Ymr */ |
| 117027 | VR256, VR256, f256mem, VR256, |
| 117028 | /* VFMSUBPD4Yrm */ |
| 117029 | VR256, VR256, VR256, f256mem, |
| 117030 | /* VFMSUBPD4Yrr */ |
| 117031 | VR256, VR256, VR256, VR256, |
| 117032 | /* VFMSUBPD4Yrr_REV */ |
| 117033 | VR256, VR256, VR256, VR256, |
| 117034 | /* VFMSUBPD4mr */ |
| 117035 | VR128, VR128, f128mem, VR128, |
| 117036 | /* VFMSUBPD4rm */ |
| 117037 | VR128, VR128, VR128, f128mem, |
| 117038 | /* VFMSUBPD4rr */ |
| 117039 | VR128, VR128, VR128, VR128, |
| 117040 | /* VFMSUBPD4rr_REV */ |
| 117041 | VR128, VR128, VR128, VR128, |
| 117042 | /* VFMSUBPS4Ymr */ |
| 117043 | VR256, VR256, f256mem, VR256, |
| 117044 | /* VFMSUBPS4Yrm */ |
| 117045 | VR256, VR256, VR256, f256mem, |
| 117046 | /* VFMSUBPS4Yrr */ |
| 117047 | VR256, VR256, VR256, VR256, |
| 117048 | /* VFMSUBPS4Yrr_REV */ |
| 117049 | VR256, VR256, VR256, VR256, |
| 117050 | /* VFMSUBPS4mr */ |
| 117051 | VR128, VR128, f128mem, VR128, |
| 117052 | /* VFMSUBPS4rm */ |
| 117053 | VR128, VR128, VR128, f128mem, |
| 117054 | /* VFMSUBPS4rr */ |
| 117055 | VR128, VR128, VR128, VR128, |
| 117056 | /* VFMSUBPS4rr_REV */ |
| 117057 | VR128, VR128, VR128, VR128, |
| 117058 | /* VFMSUBSD4mr */ |
| 117059 | FR64, FR64, f64mem, FR64, |
| 117060 | /* VFMSUBSD4mr_Int */ |
| 117061 | VR128, VR128, sdmem, VR128, |
| 117062 | /* VFMSUBSD4rm */ |
| 117063 | FR64, FR64, FR64, f64mem, |
| 117064 | /* VFMSUBSD4rm_Int */ |
| 117065 | VR128, VR128, VR128, sdmem, |
| 117066 | /* VFMSUBSD4rr */ |
| 117067 | FR64, FR64, FR64, FR64, |
| 117068 | /* VFMSUBSD4rr_Int */ |
| 117069 | VR128, VR128, VR128, VR128, |
| 117070 | /* VFMSUBSD4rr_Int_REV */ |
| 117071 | VR128, VR128, VR128, VR128, |
| 117072 | /* VFMSUBSD4rr_REV */ |
| 117073 | FR64, FR64, FR64, FR64, |
| 117074 | /* VFMSUBSS4mr */ |
| 117075 | FR32, FR32, f32mem, FR32, |
| 117076 | /* VFMSUBSS4mr_Int */ |
| 117077 | VR128, VR128, ssmem, VR128, |
| 117078 | /* VFMSUBSS4rm */ |
| 117079 | FR32, FR32, FR32, f32mem, |
| 117080 | /* VFMSUBSS4rm_Int */ |
| 117081 | VR128, VR128, VR128, ssmem, |
| 117082 | /* VFMSUBSS4rr */ |
| 117083 | FR32, FR32, FR32, FR32, |
| 117084 | /* VFMSUBSS4rr_Int */ |
| 117085 | VR128, VR128, VR128, VR128, |
| 117086 | /* VFMSUBSS4rr_Int_REV */ |
| 117087 | VR128, VR128, VR128, VR128, |
| 117088 | /* VFMSUBSS4rr_REV */ |
| 117089 | FR32, FR32, FR32, FR32, |
| 117090 | /* VFMULCPHZ128rm */ |
| 117091 | VR128X, VR128X, f128mem, |
| 117092 | /* VFMULCPHZ128rmb */ |
| 117093 | VR128X, VR128X, f32mem, |
| 117094 | /* VFMULCPHZ128rmbk */ |
| 117095 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 117096 | /* VFMULCPHZ128rmbkz */ |
| 117097 | VR128X, VK4WM, VR128X, f32mem, |
| 117098 | /* VFMULCPHZ128rmk */ |
| 117099 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 117100 | /* VFMULCPHZ128rmkz */ |
| 117101 | VR128X, VK4WM, VR128X, f128mem, |
| 117102 | /* VFMULCPHZ128rr */ |
| 117103 | VR128X, VR128X, VR128X, |
| 117104 | /* VFMULCPHZ128rrk */ |
| 117105 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 117106 | /* VFMULCPHZ128rrkz */ |
| 117107 | VR128X, VK4WM, VR128X, VR128X, |
| 117108 | /* VFMULCPHZ256rm */ |
| 117109 | VR256X, VR256X, f256mem, |
| 117110 | /* VFMULCPHZ256rmb */ |
| 117111 | VR256X, VR256X, f32mem, |
| 117112 | /* VFMULCPHZ256rmbk */ |
| 117113 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 117114 | /* VFMULCPHZ256rmbkz */ |
| 117115 | VR256X, VK8WM, VR256X, f32mem, |
| 117116 | /* VFMULCPHZ256rmk */ |
| 117117 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 117118 | /* VFMULCPHZ256rmkz */ |
| 117119 | VR256X, VK8WM, VR256X, f256mem, |
| 117120 | /* VFMULCPHZ256rr */ |
| 117121 | VR256X, VR256X, VR256X, |
| 117122 | /* VFMULCPHZ256rrk */ |
| 117123 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 117124 | /* VFMULCPHZ256rrkz */ |
| 117125 | VR256X, VK8WM, VR256X, VR256X, |
| 117126 | /* VFMULCPHZrm */ |
| 117127 | VR512, VR512, f512mem, |
| 117128 | /* VFMULCPHZrmb */ |
| 117129 | VR512, VR512, f32mem, |
| 117130 | /* VFMULCPHZrmbk */ |
| 117131 | VR512, VR512, VK16WM, VR512, f32mem, |
| 117132 | /* VFMULCPHZrmbkz */ |
| 117133 | VR512, VK16WM, VR512, f32mem, |
| 117134 | /* VFMULCPHZrmk */ |
| 117135 | VR512, VR512, VK16WM, VR512, f512mem, |
| 117136 | /* VFMULCPHZrmkz */ |
| 117137 | VR512, VK16WM, VR512, f512mem, |
| 117138 | /* VFMULCPHZrr */ |
| 117139 | VR512, VR512, VR512, |
| 117140 | /* VFMULCPHZrrb */ |
| 117141 | VR512, VR512, VR512, AVX512RC, |
| 117142 | /* VFMULCPHZrrbk */ |
| 117143 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 117144 | /* VFMULCPHZrrbkz */ |
| 117145 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 117146 | /* VFMULCPHZrrk */ |
| 117147 | VR512, VR512, VK16WM, VR512, VR512, |
| 117148 | /* VFMULCPHZrrkz */ |
| 117149 | VR512, VK16WM, VR512, VR512, |
| 117150 | /* VFMULCSHZrm */ |
| 117151 | VR128X, VR128X, ssmem, |
| 117152 | /* VFMULCSHZrmk */ |
| 117153 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 117154 | /* VFMULCSHZrmkz */ |
| 117155 | VR128X, VK1WM, VR128X, ssmem, |
| 117156 | /* VFMULCSHZrr */ |
| 117157 | VR128X, VR128X, VR128X, |
| 117158 | /* VFMULCSHZrrb */ |
| 117159 | VR128X, VR128X, VR128X, AVX512RC, |
| 117160 | /* VFMULCSHZrrbk */ |
| 117161 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117162 | /* VFMULCSHZrrbkz */ |
| 117163 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117164 | /* VFMULCSHZrrk */ |
| 117165 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117166 | /* VFMULCSHZrrkz */ |
| 117167 | VR128X, VK1WM, VR128X, VR128X, |
| 117168 | /* VFNMADD132BF16Z128m */ |
| 117169 | VR128X, VR128X, VR128X, f128mem, |
| 117170 | /* VFNMADD132BF16Z128mb */ |
| 117171 | VR128X, VR128X, VR128X, f16mem, |
| 117172 | /* VFNMADD132BF16Z128mbk */ |
| 117173 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117174 | /* VFNMADD132BF16Z128mbkz */ |
| 117175 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117176 | /* VFNMADD132BF16Z128mk */ |
| 117177 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117178 | /* VFNMADD132BF16Z128mkz */ |
| 117179 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117180 | /* VFNMADD132BF16Z128r */ |
| 117181 | VR128X, VR128X, VR128X, VR128X, |
| 117182 | /* VFNMADD132BF16Z128rk */ |
| 117183 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117184 | /* VFNMADD132BF16Z128rkz */ |
| 117185 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117186 | /* VFNMADD132BF16Z256m */ |
| 117187 | VR256X, VR256X, VR256X, f256mem, |
| 117188 | /* VFNMADD132BF16Z256mb */ |
| 117189 | VR256X, VR256X, VR256X, f16mem, |
| 117190 | /* VFNMADD132BF16Z256mbk */ |
| 117191 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117192 | /* VFNMADD132BF16Z256mbkz */ |
| 117193 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117194 | /* VFNMADD132BF16Z256mk */ |
| 117195 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117196 | /* VFNMADD132BF16Z256mkz */ |
| 117197 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117198 | /* VFNMADD132BF16Z256r */ |
| 117199 | VR256X, VR256X, VR256X, VR256X, |
| 117200 | /* VFNMADD132BF16Z256rk */ |
| 117201 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 117202 | /* VFNMADD132BF16Z256rkz */ |
| 117203 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 117204 | /* VFNMADD132BF16Zm */ |
| 117205 | VR512, VR512, VR512, f512mem, |
| 117206 | /* VFNMADD132BF16Zmb */ |
| 117207 | VR512, VR512, VR512, f16mem, |
| 117208 | /* VFNMADD132BF16Zmbk */ |
| 117209 | VR512, VR512, VK32WM, VR512, f16mem, |
| 117210 | /* VFNMADD132BF16Zmbkz */ |
| 117211 | VR512, VR512, VK32WM, VR512, f16mem, |
| 117212 | /* VFNMADD132BF16Zmk */ |
| 117213 | VR512, VR512, VK32WM, VR512, f512mem, |
| 117214 | /* VFNMADD132BF16Zmkz */ |
| 117215 | VR512, VR512, VK32WM, VR512, f512mem, |
| 117216 | /* VFNMADD132BF16Zr */ |
| 117217 | VR512, VR512, VR512, VR512, |
| 117218 | /* VFNMADD132BF16Zrk */ |
| 117219 | VR512, VR512, VK32WM, VR512, VR512, |
| 117220 | /* VFNMADD132BF16Zrkz */ |
| 117221 | VR512, VR512, VK32WM, VR512, VR512, |
| 117222 | /* VFNMADD132PDYm */ |
| 117223 | VR256, VR256, VR256, f256mem, |
| 117224 | /* VFNMADD132PDYr */ |
| 117225 | VR256, VR256, VR256, VR256, |
| 117226 | /* VFNMADD132PDZ128m */ |
| 117227 | VR128X, VR128X, VR128X, f128mem, |
| 117228 | /* VFNMADD132PDZ128mb */ |
| 117229 | VR128X, VR128X, VR128X, f64mem, |
| 117230 | /* VFNMADD132PDZ128mbk */ |
| 117231 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 117232 | /* VFNMADD132PDZ128mbkz */ |
| 117233 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 117234 | /* VFNMADD132PDZ128mk */ |
| 117235 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 117236 | /* VFNMADD132PDZ128mkz */ |
| 117237 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 117238 | /* VFNMADD132PDZ128r */ |
| 117239 | VR128X, VR128X, VR128X, VR128X, |
| 117240 | /* VFNMADD132PDZ128rk */ |
| 117241 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 117242 | /* VFNMADD132PDZ128rkz */ |
| 117243 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 117244 | /* VFNMADD132PDZ256m */ |
| 117245 | VR256X, VR256X, VR256X, f256mem, |
| 117246 | /* VFNMADD132PDZ256mb */ |
| 117247 | VR256X, VR256X, VR256X, f64mem, |
| 117248 | /* VFNMADD132PDZ256mbk */ |
| 117249 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 117250 | /* VFNMADD132PDZ256mbkz */ |
| 117251 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 117252 | /* VFNMADD132PDZ256mk */ |
| 117253 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 117254 | /* VFNMADD132PDZ256mkz */ |
| 117255 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 117256 | /* VFNMADD132PDZ256r */ |
| 117257 | VR256X, VR256X, VR256X, VR256X, |
| 117258 | /* VFNMADD132PDZ256rk */ |
| 117259 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 117260 | /* VFNMADD132PDZ256rkz */ |
| 117261 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 117262 | /* VFNMADD132PDZm */ |
| 117263 | VR512, VR512, VR512, f512mem, |
| 117264 | /* VFNMADD132PDZmb */ |
| 117265 | VR512, VR512, VR512, f64mem, |
| 117266 | /* VFNMADD132PDZmbk */ |
| 117267 | VR512, VR512, VK8WM, VR512, f64mem, |
| 117268 | /* VFNMADD132PDZmbkz */ |
| 117269 | VR512, VR512, VK8WM, VR512, f64mem, |
| 117270 | /* VFNMADD132PDZmk */ |
| 117271 | VR512, VR512, VK8WM, VR512, f512mem, |
| 117272 | /* VFNMADD132PDZmkz */ |
| 117273 | VR512, VR512, VK8WM, VR512, f512mem, |
| 117274 | /* VFNMADD132PDZr */ |
| 117275 | VR512, VR512, VR512, VR512, |
| 117276 | /* VFNMADD132PDZrb */ |
| 117277 | VR512, VR512, VR512, VR512, AVX512RC, |
| 117278 | /* VFNMADD132PDZrbk */ |
| 117279 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 117280 | /* VFNMADD132PDZrbkz */ |
| 117281 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 117282 | /* VFNMADD132PDZrk */ |
| 117283 | VR512, VR512, VK8WM, VR512, VR512, |
| 117284 | /* VFNMADD132PDZrkz */ |
| 117285 | VR512, VR512, VK8WM, VR512, VR512, |
| 117286 | /* VFNMADD132PDm */ |
| 117287 | VR128, VR128, VR128, f128mem, |
| 117288 | /* VFNMADD132PDr */ |
| 117289 | VR128, VR128, VR128, VR128, |
| 117290 | /* VFNMADD132PHZ128m */ |
| 117291 | VR128X, VR128X, VR128X, f128mem, |
| 117292 | /* VFNMADD132PHZ128mb */ |
| 117293 | VR128X, VR128X, VR128X, f16mem, |
| 117294 | /* VFNMADD132PHZ128mbk */ |
| 117295 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117296 | /* VFNMADD132PHZ128mbkz */ |
| 117297 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117298 | /* VFNMADD132PHZ128mk */ |
| 117299 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117300 | /* VFNMADD132PHZ128mkz */ |
| 117301 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117302 | /* VFNMADD132PHZ128r */ |
| 117303 | VR128X, VR128X, VR128X, VR128X, |
| 117304 | /* VFNMADD132PHZ128rk */ |
| 117305 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117306 | /* VFNMADD132PHZ128rkz */ |
| 117307 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117308 | /* VFNMADD132PHZ256m */ |
| 117309 | VR256X, VR256X, VR256X, f256mem, |
| 117310 | /* VFNMADD132PHZ256mb */ |
| 117311 | VR256X, VR256X, VR256X, f16mem, |
| 117312 | /* VFNMADD132PHZ256mbk */ |
| 117313 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117314 | /* VFNMADD132PHZ256mbkz */ |
| 117315 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117316 | /* VFNMADD132PHZ256mk */ |
| 117317 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117318 | /* VFNMADD132PHZ256mkz */ |
| 117319 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117320 | /* VFNMADD132PHZ256r */ |
| 117321 | VR256X, VR256X, VR256X, VR256X, |
| 117322 | /* VFNMADD132PHZ256rk */ |
| 117323 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 117324 | /* VFNMADD132PHZ256rkz */ |
| 117325 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 117326 | /* VFNMADD132PHZm */ |
| 117327 | VR512, VR512, VR512, f512mem, |
| 117328 | /* VFNMADD132PHZmb */ |
| 117329 | VR512, VR512, VR512, f16mem, |
| 117330 | /* VFNMADD132PHZmbk */ |
| 117331 | VR512, VR512, VK32WM, VR512, f16mem, |
| 117332 | /* VFNMADD132PHZmbkz */ |
| 117333 | VR512, VR512, VK32WM, VR512, f16mem, |
| 117334 | /* VFNMADD132PHZmk */ |
| 117335 | VR512, VR512, VK32WM, VR512, f512mem, |
| 117336 | /* VFNMADD132PHZmkz */ |
| 117337 | VR512, VR512, VK32WM, VR512, f512mem, |
| 117338 | /* VFNMADD132PHZr */ |
| 117339 | VR512, VR512, VR512, VR512, |
| 117340 | /* VFNMADD132PHZrb */ |
| 117341 | VR512, VR512, VR512, VR512, AVX512RC, |
| 117342 | /* VFNMADD132PHZrbk */ |
| 117343 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 117344 | /* VFNMADD132PHZrbkz */ |
| 117345 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 117346 | /* VFNMADD132PHZrk */ |
| 117347 | VR512, VR512, VK32WM, VR512, VR512, |
| 117348 | /* VFNMADD132PHZrkz */ |
| 117349 | VR512, VR512, VK32WM, VR512, VR512, |
| 117350 | /* VFNMADD132PSYm */ |
| 117351 | VR256, VR256, VR256, f256mem, |
| 117352 | /* VFNMADD132PSYr */ |
| 117353 | VR256, VR256, VR256, VR256, |
| 117354 | /* VFNMADD132PSZ128m */ |
| 117355 | VR128X, VR128X, VR128X, f128mem, |
| 117356 | /* VFNMADD132PSZ128mb */ |
| 117357 | VR128X, VR128X, VR128X, f32mem, |
| 117358 | /* VFNMADD132PSZ128mbk */ |
| 117359 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 117360 | /* VFNMADD132PSZ128mbkz */ |
| 117361 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 117362 | /* VFNMADD132PSZ128mk */ |
| 117363 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 117364 | /* VFNMADD132PSZ128mkz */ |
| 117365 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 117366 | /* VFNMADD132PSZ128r */ |
| 117367 | VR128X, VR128X, VR128X, VR128X, |
| 117368 | /* VFNMADD132PSZ128rk */ |
| 117369 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 117370 | /* VFNMADD132PSZ128rkz */ |
| 117371 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 117372 | /* VFNMADD132PSZ256m */ |
| 117373 | VR256X, VR256X, VR256X, f256mem, |
| 117374 | /* VFNMADD132PSZ256mb */ |
| 117375 | VR256X, VR256X, VR256X, f32mem, |
| 117376 | /* VFNMADD132PSZ256mbk */ |
| 117377 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 117378 | /* VFNMADD132PSZ256mbkz */ |
| 117379 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 117380 | /* VFNMADD132PSZ256mk */ |
| 117381 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 117382 | /* VFNMADD132PSZ256mkz */ |
| 117383 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 117384 | /* VFNMADD132PSZ256r */ |
| 117385 | VR256X, VR256X, VR256X, VR256X, |
| 117386 | /* VFNMADD132PSZ256rk */ |
| 117387 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 117388 | /* VFNMADD132PSZ256rkz */ |
| 117389 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 117390 | /* VFNMADD132PSZm */ |
| 117391 | VR512, VR512, VR512, f512mem, |
| 117392 | /* VFNMADD132PSZmb */ |
| 117393 | VR512, VR512, VR512, f32mem, |
| 117394 | /* VFNMADD132PSZmbk */ |
| 117395 | VR512, VR512, VK16WM, VR512, f32mem, |
| 117396 | /* VFNMADD132PSZmbkz */ |
| 117397 | VR512, VR512, VK16WM, VR512, f32mem, |
| 117398 | /* VFNMADD132PSZmk */ |
| 117399 | VR512, VR512, VK16WM, VR512, f512mem, |
| 117400 | /* VFNMADD132PSZmkz */ |
| 117401 | VR512, VR512, VK16WM, VR512, f512mem, |
| 117402 | /* VFNMADD132PSZr */ |
| 117403 | VR512, VR512, VR512, VR512, |
| 117404 | /* VFNMADD132PSZrb */ |
| 117405 | VR512, VR512, VR512, VR512, AVX512RC, |
| 117406 | /* VFNMADD132PSZrbk */ |
| 117407 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 117408 | /* VFNMADD132PSZrbkz */ |
| 117409 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 117410 | /* VFNMADD132PSZrk */ |
| 117411 | VR512, VR512, VK16WM, VR512, VR512, |
| 117412 | /* VFNMADD132PSZrkz */ |
| 117413 | VR512, VR512, VK16WM, VR512, VR512, |
| 117414 | /* VFNMADD132PSm */ |
| 117415 | VR128, VR128, VR128, f128mem, |
| 117416 | /* VFNMADD132PSr */ |
| 117417 | VR128, VR128, VR128, VR128, |
| 117418 | /* VFNMADD132SDZm */ |
| 117419 | FR64X, FR64X, FR64X, f64mem, |
| 117420 | /* VFNMADD132SDZm_Int */ |
| 117421 | VR128X, VR128X, VR128X, sdmem, |
| 117422 | /* VFNMADD132SDZmk_Int */ |
| 117423 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 117424 | /* VFNMADD132SDZmkz_Int */ |
| 117425 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 117426 | /* VFNMADD132SDZr */ |
| 117427 | FR64X, FR64X, FR64X, FR64X, |
| 117428 | /* VFNMADD132SDZr_Int */ |
| 117429 | VR128X, VR128X, VR128X, VR128X, |
| 117430 | /* VFNMADD132SDZrb */ |
| 117431 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 117432 | /* VFNMADD132SDZrb_Int */ |
| 117433 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 117434 | /* VFNMADD132SDZrbk_Int */ |
| 117435 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117436 | /* VFNMADD132SDZrbkz_Int */ |
| 117437 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117438 | /* VFNMADD132SDZrk_Int */ |
| 117439 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117440 | /* VFNMADD132SDZrkz_Int */ |
| 117441 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117442 | /* VFNMADD132SDm */ |
| 117443 | FR64, FR64, FR64, f64mem, |
| 117444 | /* VFNMADD132SDm_Int */ |
| 117445 | VR128, VR128, VR128, sdmem, |
| 117446 | /* VFNMADD132SDr */ |
| 117447 | FR64, FR64, FR64, FR64, |
| 117448 | /* VFNMADD132SDr_Int */ |
| 117449 | VR128, VR128, VR128, VR128, |
| 117450 | /* VFNMADD132SHZm */ |
| 117451 | FR16X, FR16X, FR16X, f16mem, |
| 117452 | /* VFNMADD132SHZm_Int */ |
| 117453 | VR128X, VR128X, VR128X, shmem, |
| 117454 | /* VFNMADD132SHZmk_Int */ |
| 117455 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 117456 | /* VFNMADD132SHZmkz_Int */ |
| 117457 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 117458 | /* VFNMADD132SHZr */ |
| 117459 | FR16X, FR16X, FR16X, FR16X, |
| 117460 | /* VFNMADD132SHZr_Int */ |
| 117461 | VR128X, VR128X, VR128X, VR128X, |
| 117462 | /* VFNMADD132SHZrb */ |
| 117463 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 117464 | /* VFNMADD132SHZrb_Int */ |
| 117465 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 117466 | /* VFNMADD132SHZrbk_Int */ |
| 117467 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117468 | /* VFNMADD132SHZrbkz_Int */ |
| 117469 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117470 | /* VFNMADD132SHZrk_Int */ |
| 117471 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117472 | /* VFNMADD132SHZrkz_Int */ |
| 117473 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117474 | /* VFNMADD132SSZm */ |
| 117475 | FR32X, FR32X, FR32X, f32mem, |
| 117476 | /* VFNMADD132SSZm_Int */ |
| 117477 | VR128X, VR128X, VR128X, ssmem, |
| 117478 | /* VFNMADD132SSZmk_Int */ |
| 117479 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 117480 | /* VFNMADD132SSZmkz_Int */ |
| 117481 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 117482 | /* VFNMADD132SSZr */ |
| 117483 | FR32X, FR32X, FR32X, FR32X, |
| 117484 | /* VFNMADD132SSZr_Int */ |
| 117485 | VR128X, VR128X, VR128X, VR128X, |
| 117486 | /* VFNMADD132SSZrb */ |
| 117487 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 117488 | /* VFNMADD132SSZrb_Int */ |
| 117489 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 117490 | /* VFNMADD132SSZrbk_Int */ |
| 117491 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117492 | /* VFNMADD132SSZrbkz_Int */ |
| 117493 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117494 | /* VFNMADD132SSZrk_Int */ |
| 117495 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117496 | /* VFNMADD132SSZrkz_Int */ |
| 117497 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117498 | /* VFNMADD132SSm */ |
| 117499 | FR32, FR32, FR32, f32mem, |
| 117500 | /* VFNMADD132SSm_Int */ |
| 117501 | VR128, VR128, VR128, ssmem, |
| 117502 | /* VFNMADD132SSr */ |
| 117503 | FR32, FR32, FR32, FR32, |
| 117504 | /* VFNMADD132SSr_Int */ |
| 117505 | VR128, VR128, VR128, VR128, |
| 117506 | /* VFNMADD213BF16Z128m */ |
| 117507 | VR128X, VR128X, VR128X, f128mem, |
| 117508 | /* VFNMADD213BF16Z128mb */ |
| 117509 | VR128X, VR128X, VR128X, f16mem, |
| 117510 | /* VFNMADD213BF16Z128mbk */ |
| 117511 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117512 | /* VFNMADD213BF16Z128mbkz */ |
| 117513 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117514 | /* VFNMADD213BF16Z128mk */ |
| 117515 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117516 | /* VFNMADD213BF16Z128mkz */ |
| 117517 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117518 | /* VFNMADD213BF16Z128r */ |
| 117519 | VR128X, VR128X, VR128X, VR128X, |
| 117520 | /* VFNMADD213BF16Z128rk */ |
| 117521 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117522 | /* VFNMADD213BF16Z128rkz */ |
| 117523 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117524 | /* VFNMADD213BF16Z256m */ |
| 117525 | VR256X, VR256X, VR256X, f256mem, |
| 117526 | /* VFNMADD213BF16Z256mb */ |
| 117527 | VR256X, VR256X, VR256X, f16mem, |
| 117528 | /* VFNMADD213BF16Z256mbk */ |
| 117529 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117530 | /* VFNMADD213BF16Z256mbkz */ |
| 117531 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117532 | /* VFNMADD213BF16Z256mk */ |
| 117533 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117534 | /* VFNMADD213BF16Z256mkz */ |
| 117535 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117536 | /* VFNMADD213BF16Z256r */ |
| 117537 | VR256X, VR256X, VR256X, VR256X, |
| 117538 | /* VFNMADD213BF16Z256rk */ |
| 117539 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 117540 | /* VFNMADD213BF16Z256rkz */ |
| 117541 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 117542 | /* VFNMADD213BF16Zm */ |
| 117543 | VR512, VR512, VR512, f512mem, |
| 117544 | /* VFNMADD213BF16Zmb */ |
| 117545 | VR512, VR512, VR512, f16mem, |
| 117546 | /* VFNMADD213BF16Zmbk */ |
| 117547 | VR512, VR512, VK32WM, VR512, f16mem, |
| 117548 | /* VFNMADD213BF16Zmbkz */ |
| 117549 | VR512, VR512, VK32WM, VR512, f16mem, |
| 117550 | /* VFNMADD213BF16Zmk */ |
| 117551 | VR512, VR512, VK32WM, VR512, f512mem, |
| 117552 | /* VFNMADD213BF16Zmkz */ |
| 117553 | VR512, VR512, VK32WM, VR512, f512mem, |
| 117554 | /* VFNMADD213BF16Zr */ |
| 117555 | VR512, VR512, VR512, VR512, |
| 117556 | /* VFNMADD213BF16Zrk */ |
| 117557 | VR512, VR512, VK32WM, VR512, VR512, |
| 117558 | /* VFNMADD213BF16Zrkz */ |
| 117559 | VR512, VR512, VK32WM, VR512, VR512, |
| 117560 | /* VFNMADD213PDYm */ |
| 117561 | VR256, VR256, VR256, f256mem, |
| 117562 | /* VFNMADD213PDYr */ |
| 117563 | VR256, VR256, VR256, VR256, |
| 117564 | /* VFNMADD213PDZ128m */ |
| 117565 | VR128X, VR128X, VR128X, f128mem, |
| 117566 | /* VFNMADD213PDZ128mb */ |
| 117567 | VR128X, VR128X, VR128X, f64mem, |
| 117568 | /* VFNMADD213PDZ128mbk */ |
| 117569 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 117570 | /* VFNMADD213PDZ128mbkz */ |
| 117571 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 117572 | /* VFNMADD213PDZ128mk */ |
| 117573 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 117574 | /* VFNMADD213PDZ128mkz */ |
| 117575 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 117576 | /* VFNMADD213PDZ128r */ |
| 117577 | VR128X, VR128X, VR128X, VR128X, |
| 117578 | /* VFNMADD213PDZ128rk */ |
| 117579 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 117580 | /* VFNMADD213PDZ128rkz */ |
| 117581 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 117582 | /* VFNMADD213PDZ256m */ |
| 117583 | VR256X, VR256X, VR256X, f256mem, |
| 117584 | /* VFNMADD213PDZ256mb */ |
| 117585 | VR256X, VR256X, VR256X, f64mem, |
| 117586 | /* VFNMADD213PDZ256mbk */ |
| 117587 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 117588 | /* VFNMADD213PDZ256mbkz */ |
| 117589 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 117590 | /* VFNMADD213PDZ256mk */ |
| 117591 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 117592 | /* VFNMADD213PDZ256mkz */ |
| 117593 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 117594 | /* VFNMADD213PDZ256r */ |
| 117595 | VR256X, VR256X, VR256X, VR256X, |
| 117596 | /* VFNMADD213PDZ256rk */ |
| 117597 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 117598 | /* VFNMADD213PDZ256rkz */ |
| 117599 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 117600 | /* VFNMADD213PDZm */ |
| 117601 | VR512, VR512, VR512, f512mem, |
| 117602 | /* VFNMADD213PDZmb */ |
| 117603 | VR512, VR512, VR512, f64mem, |
| 117604 | /* VFNMADD213PDZmbk */ |
| 117605 | VR512, VR512, VK8WM, VR512, f64mem, |
| 117606 | /* VFNMADD213PDZmbkz */ |
| 117607 | VR512, VR512, VK8WM, VR512, f64mem, |
| 117608 | /* VFNMADD213PDZmk */ |
| 117609 | VR512, VR512, VK8WM, VR512, f512mem, |
| 117610 | /* VFNMADD213PDZmkz */ |
| 117611 | VR512, VR512, VK8WM, VR512, f512mem, |
| 117612 | /* VFNMADD213PDZr */ |
| 117613 | VR512, VR512, VR512, VR512, |
| 117614 | /* VFNMADD213PDZrb */ |
| 117615 | VR512, VR512, VR512, VR512, AVX512RC, |
| 117616 | /* VFNMADD213PDZrbk */ |
| 117617 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 117618 | /* VFNMADD213PDZrbkz */ |
| 117619 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 117620 | /* VFNMADD213PDZrk */ |
| 117621 | VR512, VR512, VK8WM, VR512, VR512, |
| 117622 | /* VFNMADD213PDZrkz */ |
| 117623 | VR512, VR512, VK8WM, VR512, VR512, |
| 117624 | /* VFNMADD213PDm */ |
| 117625 | VR128, VR128, VR128, f128mem, |
| 117626 | /* VFNMADD213PDr */ |
| 117627 | VR128, VR128, VR128, VR128, |
| 117628 | /* VFNMADD213PHZ128m */ |
| 117629 | VR128X, VR128X, VR128X, f128mem, |
| 117630 | /* VFNMADD213PHZ128mb */ |
| 117631 | VR128X, VR128X, VR128X, f16mem, |
| 117632 | /* VFNMADD213PHZ128mbk */ |
| 117633 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117634 | /* VFNMADD213PHZ128mbkz */ |
| 117635 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117636 | /* VFNMADD213PHZ128mk */ |
| 117637 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117638 | /* VFNMADD213PHZ128mkz */ |
| 117639 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117640 | /* VFNMADD213PHZ128r */ |
| 117641 | VR128X, VR128X, VR128X, VR128X, |
| 117642 | /* VFNMADD213PHZ128rk */ |
| 117643 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117644 | /* VFNMADD213PHZ128rkz */ |
| 117645 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117646 | /* VFNMADD213PHZ256m */ |
| 117647 | VR256X, VR256X, VR256X, f256mem, |
| 117648 | /* VFNMADD213PHZ256mb */ |
| 117649 | VR256X, VR256X, VR256X, f16mem, |
| 117650 | /* VFNMADD213PHZ256mbk */ |
| 117651 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117652 | /* VFNMADD213PHZ256mbkz */ |
| 117653 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117654 | /* VFNMADD213PHZ256mk */ |
| 117655 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117656 | /* VFNMADD213PHZ256mkz */ |
| 117657 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117658 | /* VFNMADD213PHZ256r */ |
| 117659 | VR256X, VR256X, VR256X, VR256X, |
| 117660 | /* VFNMADD213PHZ256rk */ |
| 117661 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 117662 | /* VFNMADD213PHZ256rkz */ |
| 117663 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 117664 | /* VFNMADD213PHZm */ |
| 117665 | VR512, VR512, VR512, f512mem, |
| 117666 | /* VFNMADD213PHZmb */ |
| 117667 | VR512, VR512, VR512, f16mem, |
| 117668 | /* VFNMADD213PHZmbk */ |
| 117669 | VR512, VR512, VK32WM, VR512, f16mem, |
| 117670 | /* VFNMADD213PHZmbkz */ |
| 117671 | VR512, VR512, VK32WM, VR512, f16mem, |
| 117672 | /* VFNMADD213PHZmk */ |
| 117673 | VR512, VR512, VK32WM, VR512, f512mem, |
| 117674 | /* VFNMADD213PHZmkz */ |
| 117675 | VR512, VR512, VK32WM, VR512, f512mem, |
| 117676 | /* VFNMADD213PHZr */ |
| 117677 | VR512, VR512, VR512, VR512, |
| 117678 | /* VFNMADD213PHZrb */ |
| 117679 | VR512, VR512, VR512, VR512, AVX512RC, |
| 117680 | /* VFNMADD213PHZrbk */ |
| 117681 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 117682 | /* VFNMADD213PHZrbkz */ |
| 117683 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 117684 | /* VFNMADD213PHZrk */ |
| 117685 | VR512, VR512, VK32WM, VR512, VR512, |
| 117686 | /* VFNMADD213PHZrkz */ |
| 117687 | VR512, VR512, VK32WM, VR512, VR512, |
| 117688 | /* VFNMADD213PSYm */ |
| 117689 | VR256, VR256, VR256, f256mem, |
| 117690 | /* VFNMADD213PSYr */ |
| 117691 | VR256, VR256, VR256, VR256, |
| 117692 | /* VFNMADD213PSZ128m */ |
| 117693 | VR128X, VR128X, VR128X, f128mem, |
| 117694 | /* VFNMADD213PSZ128mb */ |
| 117695 | VR128X, VR128X, VR128X, f32mem, |
| 117696 | /* VFNMADD213PSZ128mbk */ |
| 117697 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 117698 | /* VFNMADD213PSZ128mbkz */ |
| 117699 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 117700 | /* VFNMADD213PSZ128mk */ |
| 117701 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 117702 | /* VFNMADD213PSZ128mkz */ |
| 117703 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 117704 | /* VFNMADD213PSZ128r */ |
| 117705 | VR128X, VR128X, VR128X, VR128X, |
| 117706 | /* VFNMADD213PSZ128rk */ |
| 117707 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 117708 | /* VFNMADD213PSZ128rkz */ |
| 117709 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 117710 | /* VFNMADD213PSZ256m */ |
| 117711 | VR256X, VR256X, VR256X, f256mem, |
| 117712 | /* VFNMADD213PSZ256mb */ |
| 117713 | VR256X, VR256X, VR256X, f32mem, |
| 117714 | /* VFNMADD213PSZ256mbk */ |
| 117715 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 117716 | /* VFNMADD213PSZ256mbkz */ |
| 117717 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 117718 | /* VFNMADD213PSZ256mk */ |
| 117719 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 117720 | /* VFNMADD213PSZ256mkz */ |
| 117721 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 117722 | /* VFNMADD213PSZ256r */ |
| 117723 | VR256X, VR256X, VR256X, VR256X, |
| 117724 | /* VFNMADD213PSZ256rk */ |
| 117725 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 117726 | /* VFNMADD213PSZ256rkz */ |
| 117727 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 117728 | /* VFNMADD213PSZm */ |
| 117729 | VR512, VR512, VR512, f512mem, |
| 117730 | /* VFNMADD213PSZmb */ |
| 117731 | VR512, VR512, VR512, f32mem, |
| 117732 | /* VFNMADD213PSZmbk */ |
| 117733 | VR512, VR512, VK16WM, VR512, f32mem, |
| 117734 | /* VFNMADD213PSZmbkz */ |
| 117735 | VR512, VR512, VK16WM, VR512, f32mem, |
| 117736 | /* VFNMADD213PSZmk */ |
| 117737 | VR512, VR512, VK16WM, VR512, f512mem, |
| 117738 | /* VFNMADD213PSZmkz */ |
| 117739 | VR512, VR512, VK16WM, VR512, f512mem, |
| 117740 | /* VFNMADD213PSZr */ |
| 117741 | VR512, VR512, VR512, VR512, |
| 117742 | /* VFNMADD213PSZrb */ |
| 117743 | VR512, VR512, VR512, VR512, AVX512RC, |
| 117744 | /* VFNMADD213PSZrbk */ |
| 117745 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 117746 | /* VFNMADD213PSZrbkz */ |
| 117747 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 117748 | /* VFNMADD213PSZrk */ |
| 117749 | VR512, VR512, VK16WM, VR512, VR512, |
| 117750 | /* VFNMADD213PSZrkz */ |
| 117751 | VR512, VR512, VK16WM, VR512, VR512, |
| 117752 | /* VFNMADD213PSm */ |
| 117753 | VR128, VR128, VR128, f128mem, |
| 117754 | /* VFNMADD213PSr */ |
| 117755 | VR128, VR128, VR128, VR128, |
| 117756 | /* VFNMADD213SDZm */ |
| 117757 | FR64X, FR64X, FR64X, f64mem, |
| 117758 | /* VFNMADD213SDZm_Int */ |
| 117759 | VR128X, VR128X, VR128X, sdmem, |
| 117760 | /* VFNMADD213SDZmk_Int */ |
| 117761 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 117762 | /* VFNMADD213SDZmkz_Int */ |
| 117763 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 117764 | /* VFNMADD213SDZr */ |
| 117765 | FR64X, FR64X, FR64X, FR64X, |
| 117766 | /* VFNMADD213SDZr_Int */ |
| 117767 | VR128X, VR128X, VR128X, VR128X, |
| 117768 | /* VFNMADD213SDZrb */ |
| 117769 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 117770 | /* VFNMADD213SDZrb_Int */ |
| 117771 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 117772 | /* VFNMADD213SDZrbk_Int */ |
| 117773 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117774 | /* VFNMADD213SDZrbkz_Int */ |
| 117775 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117776 | /* VFNMADD213SDZrk_Int */ |
| 117777 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117778 | /* VFNMADD213SDZrkz_Int */ |
| 117779 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117780 | /* VFNMADD213SDm */ |
| 117781 | FR64, FR64, FR64, f64mem, |
| 117782 | /* VFNMADD213SDm_Int */ |
| 117783 | VR128, VR128, VR128, sdmem, |
| 117784 | /* VFNMADD213SDr */ |
| 117785 | FR64, FR64, FR64, FR64, |
| 117786 | /* VFNMADD213SDr_Int */ |
| 117787 | VR128, VR128, VR128, VR128, |
| 117788 | /* VFNMADD213SHZm */ |
| 117789 | FR16X, FR16X, FR16X, f16mem, |
| 117790 | /* VFNMADD213SHZm_Int */ |
| 117791 | VR128X, VR128X, VR128X, shmem, |
| 117792 | /* VFNMADD213SHZmk_Int */ |
| 117793 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 117794 | /* VFNMADD213SHZmkz_Int */ |
| 117795 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 117796 | /* VFNMADD213SHZr */ |
| 117797 | FR16X, FR16X, FR16X, FR16X, |
| 117798 | /* VFNMADD213SHZr_Int */ |
| 117799 | VR128X, VR128X, VR128X, VR128X, |
| 117800 | /* VFNMADD213SHZrb */ |
| 117801 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 117802 | /* VFNMADD213SHZrb_Int */ |
| 117803 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 117804 | /* VFNMADD213SHZrbk_Int */ |
| 117805 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117806 | /* VFNMADD213SHZrbkz_Int */ |
| 117807 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117808 | /* VFNMADD213SHZrk_Int */ |
| 117809 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117810 | /* VFNMADD213SHZrkz_Int */ |
| 117811 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117812 | /* VFNMADD213SSZm */ |
| 117813 | FR32X, FR32X, FR32X, f32mem, |
| 117814 | /* VFNMADD213SSZm_Int */ |
| 117815 | VR128X, VR128X, VR128X, ssmem, |
| 117816 | /* VFNMADD213SSZmk_Int */ |
| 117817 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 117818 | /* VFNMADD213SSZmkz_Int */ |
| 117819 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 117820 | /* VFNMADD213SSZr */ |
| 117821 | FR32X, FR32X, FR32X, FR32X, |
| 117822 | /* VFNMADD213SSZr_Int */ |
| 117823 | VR128X, VR128X, VR128X, VR128X, |
| 117824 | /* VFNMADD213SSZrb */ |
| 117825 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 117826 | /* VFNMADD213SSZrb_Int */ |
| 117827 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 117828 | /* VFNMADD213SSZrbk_Int */ |
| 117829 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117830 | /* VFNMADD213SSZrbkz_Int */ |
| 117831 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117832 | /* VFNMADD213SSZrk_Int */ |
| 117833 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117834 | /* VFNMADD213SSZrkz_Int */ |
| 117835 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117836 | /* VFNMADD213SSm */ |
| 117837 | FR32, FR32, FR32, f32mem, |
| 117838 | /* VFNMADD213SSm_Int */ |
| 117839 | VR128, VR128, VR128, ssmem, |
| 117840 | /* VFNMADD213SSr */ |
| 117841 | FR32, FR32, FR32, FR32, |
| 117842 | /* VFNMADD213SSr_Int */ |
| 117843 | VR128, VR128, VR128, VR128, |
| 117844 | /* VFNMADD231BF16Z128m */ |
| 117845 | VR128X, VR128X, VR128X, f128mem, |
| 117846 | /* VFNMADD231BF16Z128mb */ |
| 117847 | VR128X, VR128X, VR128X, f16mem, |
| 117848 | /* VFNMADD231BF16Z128mbk */ |
| 117849 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117850 | /* VFNMADD231BF16Z128mbkz */ |
| 117851 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117852 | /* VFNMADD231BF16Z128mk */ |
| 117853 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117854 | /* VFNMADD231BF16Z128mkz */ |
| 117855 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117856 | /* VFNMADD231BF16Z128r */ |
| 117857 | VR128X, VR128X, VR128X, VR128X, |
| 117858 | /* VFNMADD231BF16Z128rk */ |
| 117859 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117860 | /* VFNMADD231BF16Z128rkz */ |
| 117861 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117862 | /* VFNMADD231BF16Z256m */ |
| 117863 | VR256X, VR256X, VR256X, f256mem, |
| 117864 | /* VFNMADD231BF16Z256mb */ |
| 117865 | VR256X, VR256X, VR256X, f16mem, |
| 117866 | /* VFNMADD231BF16Z256mbk */ |
| 117867 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117868 | /* VFNMADD231BF16Z256mbkz */ |
| 117869 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117870 | /* VFNMADD231BF16Z256mk */ |
| 117871 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117872 | /* VFNMADD231BF16Z256mkz */ |
| 117873 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117874 | /* VFNMADD231BF16Z256r */ |
| 117875 | VR256X, VR256X, VR256X, VR256X, |
| 117876 | /* VFNMADD231BF16Z256rk */ |
| 117877 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 117878 | /* VFNMADD231BF16Z256rkz */ |
| 117879 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 117880 | /* VFNMADD231BF16Zm */ |
| 117881 | VR512, VR512, VR512, f512mem, |
| 117882 | /* VFNMADD231BF16Zmb */ |
| 117883 | VR512, VR512, VR512, f16mem, |
| 117884 | /* VFNMADD231BF16Zmbk */ |
| 117885 | VR512, VR512, VK32WM, VR512, f16mem, |
| 117886 | /* VFNMADD231BF16Zmbkz */ |
| 117887 | VR512, VR512, VK32WM, VR512, f16mem, |
| 117888 | /* VFNMADD231BF16Zmk */ |
| 117889 | VR512, VR512, VK32WM, VR512, f512mem, |
| 117890 | /* VFNMADD231BF16Zmkz */ |
| 117891 | VR512, VR512, VK32WM, VR512, f512mem, |
| 117892 | /* VFNMADD231BF16Zr */ |
| 117893 | VR512, VR512, VR512, VR512, |
| 117894 | /* VFNMADD231BF16Zrk */ |
| 117895 | VR512, VR512, VK32WM, VR512, VR512, |
| 117896 | /* VFNMADD231BF16Zrkz */ |
| 117897 | VR512, VR512, VK32WM, VR512, VR512, |
| 117898 | /* VFNMADD231PDYm */ |
| 117899 | VR256, VR256, VR256, f256mem, |
| 117900 | /* VFNMADD231PDYr */ |
| 117901 | VR256, VR256, VR256, VR256, |
| 117902 | /* VFNMADD231PDZ128m */ |
| 117903 | VR128X, VR128X, VR128X, f128mem, |
| 117904 | /* VFNMADD231PDZ128mb */ |
| 117905 | VR128X, VR128X, VR128X, f64mem, |
| 117906 | /* VFNMADD231PDZ128mbk */ |
| 117907 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 117908 | /* VFNMADD231PDZ128mbkz */ |
| 117909 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 117910 | /* VFNMADD231PDZ128mk */ |
| 117911 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 117912 | /* VFNMADD231PDZ128mkz */ |
| 117913 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 117914 | /* VFNMADD231PDZ128r */ |
| 117915 | VR128X, VR128X, VR128X, VR128X, |
| 117916 | /* VFNMADD231PDZ128rk */ |
| 117917 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 117918 | /* VFNMADD231PDZ128rkz */ |
| 117919 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 117920 | /* VFNMADD231PDZ256m */ |
| 117921 | VR256X, VR256X, VR256X, f256mem, |
| 117922 | /* VFNMADD231PDZ256mb */ |
| 117923 | VR256X, VR256X, VR256X, f64mem, |
| 117924 | /* VFNMADD231PDZ256mbk */ |
| 117925 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 117926 | /* VFNMADD231PDZ256mbkz */ |
| 117927 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 117928 | /* VFNMADD231PDZ256mk */ |
| 117929 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 117930 | /* VFNMADD231PDZ256mkz */ |
| 117931 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 117932 | /* VFNMADD231PDZ256r */ |
| 117933 | VR256X, VR256X, VR256X, VR256X, |
| 117934 | /* VFNMADD231PDZ256rk */ |
| 117935 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 117936 | /* VFNMADD231PDZ256rkz */ |
| 117937 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 117938 | /* VFNMADD231PDZm */ |
| 117939 | VR512, VR512, VR512, f512mem, |
| 117940 | /* VFNMADD231PDZmb */ |
| 117941 | VR512, VR512, VR512, f64mem, |
| 117942 | /* VFNMADD231PDZmbk */ |
| 117943 | VR512, VR512, VK8WM, VR512, f64mem, |
| 117944 | /* VFNMADD231PDZmbkz */ |
| 117945 | VR512, VR512, VK8WM, VR512, f64mem, |
| 117946 | /* VFNMADD231PDZmk */ |
| 117947 | VR512, VR512, VK8WM, VR512, f512mem, |
| 117948 | /* VFNMADD231PDZmkz */ |
| 117949 | VR512, VR512, VK8WM, VR512, f512mem, |
| 117950 | /* VFNMADD231PDZr */ |
| 117951 | VR512, VR512, VR512, VR512, |
| 117952 | /* VFNMADD231PDZrb */ |
| 117953 | VR512, VR512, VR512, VR512, AVX512RC, |
| 117954 | /* VFNMADD231PDZrbk */ |
| 117955 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 117956 | /* VFNMADD231PDZrbkz */ |
| 117957 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 117958 | /* VFNMADD231PDZrk */ |
| 117959 | VR512, VR512, VK8WM, VR512, VR512, |
| 117960 | /* VFNMADD231PDZrkz */ |
| 117961 | VR512, VR512, VK8WM, VR512, VR512, |
| 117962 | /* VFNMADD231PDm */ |
| 117963 | VR128, VR128, VR128, f128mem, |
| 117964 | /* VFNMADD231PDr */ |
| 117965 | VR128, VR128, VR128, VR128, |
| 117966 | /* VFNMADD231PHZ128m */ |
| 117967 | VR128X, VR128X, VR128X, f128mem, |
| 117968 | /* VFNMADD231PHZ128mb */ |
| 117969 | VR128X, VR128X, VR128X, f16mem, |
| 117970 | /* VFNMADD231PHZ128mbk */ |
| 117971 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117972 | /* VFNMADD231PHZ128mbkz */ |
| 117973 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 117974 | /* VFNMADD231PHZ128mk */ |
| 117975 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117976 | /* VFNMADD231PHZ128mkz */ |
| 117977 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 117978 | /* VFNMADD231PHZ128r */ |
| 117979 | VR128X, VR128X, VR128X, VR128X, |
| 117980 | /* VFNMADD231PHZ128rk */ |
| 117981 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117982 | /* VFNMADD231PHZ128rkz */ |
| 117983 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 117984 | /* VFNMADD231PHZ256m */ |
| 117985 | VR256X, VR256X, VR256X, f256mem, |
| 117986 | /* VFNMADD231PHZ256mb */ |
| 117987 | VR256X, VR256X, VR256X, f16mem, |
| 117988 | /* VFNMADD231PHZ256mbk */ |
| 117989 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117990 | /* VFNMADD231PHZ256mbkz */ |
| 117991 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 117992 | /* VFNMADD231PHZ256mk */ |
| 117993 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117994 | /* VFNMADD231PHZ256mkz */ |
| 117995 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 117996 | /* VFNMADD231PHZ256r */ |
| 117997 | VR256X, VR256X, VR256X, VR256X, |
| 117998 | /* VFNMADD231PHZ256rk */ |
| 117999 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118000 | /* VFNMADD231PHZ256rkz */ |
| 118001 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118002 | /* VFNMADD231PHZm */ |
| 118003 | VR512, VR512, VR512, f512mem, |
| 118004 | /* VFNMADD231PHZmb */ |
| 118005 | VR512, VR512, VR512, f16mem, |
| 118006 | /* VFNMADD231PHZmbk */ |
| 118007 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118008 | /* VFNMADD231PHZmbkz */ |
| 118009 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118010 | /* VFNMADD231PHZmk */ |
| 118011 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118012 | /* VFNMADD231PHZmkz */ |
| 118013 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118014 | /* VFNMADD231PHZr */ |
| 118015 | VR512, VR512, VR512, VR512, |
| 118016 | /* VFNMADD231PHZrb */ |
| 118017 | VR512, VR512, VR512, VR512, AVX512RC, |
| 118018 | /* VFNMADD231PHZrbk */ |
| 118019 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 118020 | /* VFNMADD231PHZrbkz */ |
| 118021 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 118022 | /* VFNMADD231PHZrk */ |
| 118023 | VR512, VR512, VK32WM, VR512, VR512, |
| 118024 | /* VFNMADD231PHZrkz */ |
| 118025 | VR512, VR512, VK32WM, VR512, VR512, |
| 118026 | /* VFNMADD231PSYm */ |
| 118027 | VR256, VR256, VR256, f256mem, |
| 118028 | /* VFNMADD231PSYr */ |
| 118029 | VR256, VR256, VR256, VR256, |
| 118030 | /* VFNMADD231PSZ128m */ |
| 118031 | VR128X, VR128X, VR128X, f128mem, |
| 118032 | /* VFNMADD231PSZ128mb */ |
| 118033 | VR128X, VR128X, VR128X, f32mem, |
| 118034 | /* VFNMADD231PSZ128mbk */ |
| 118035 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 118036 | /* VFNMADD231PSZ128mbkz */ |
| 118037 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 118038 | /* VFNMADD231PSZ128mk */ |
| 118039 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 118040 | /* VFNMADD231PSZ128mkz */ |
| 118041 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 118042 | /* VFNMADD231PSZ128r */ |
| 118043 | VR128X, VR128X, VR128X, VR128X, |
| 118044 | /* VFNMADD231PSZ128rk */ |
| 118045 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 118046 | /* VFNMADD231PSZ128rkz */ |
| 118047 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 118048 | /* VFNMADD231PSZ256m */ |
| 118049 | VR256X, VR256X, VR256X, f256mem, |
| 118050 | /* VFNMADD231PSZ256mb */ |
| 118051 | VR256X, VR256X, VR256X, f32mem, |
| 118052 | /* VFNMADD231PSZ256mbk */ |
| 118053 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 118054 | /* VFNMADD231PSZ256mbkz */ |
| 118055 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 118056 | /* VFNMADD231PSZ256mk */ |
| 118057 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 118058 | /* VFNMADD231PSZ256mkz */ |
| 118059 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 118060 | /* VFNMADD231PSZ256r */ |
| 118061 | VR256X, VR256X, VR256X, VR256X, |
| 118062 | /* VFNMADD231PSZ256rk */ |
| 118063 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 118064 | /* VFNMADD231PSZ256rkz */ |
| 118065 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 118066 | /* VFNMADD231PSZm */ |
| 118067 | VR512, VR512, VR512, f512mem, |
| 118068 | /* VFNMADD231PSZmb */ |
| 118069 | VR512, VR512, VR512, f32mem, |
| 118070 | /* VFNMADD231PSZmbk */ |
| 118071 | VR512, VR512, VK16WM, VR512, f32mem, |
| 118072 | /* VFNMADD231PSZmbkz */ |
| 118073 | VR512, VR512, VK16WM, VR512, f32mem, |
| 118074 | /* VFNMADD231PSZmk */ |
| 118075 | VR512, VR512, VK16WM, VR512, f512mem, |
| 118076 | /* VFNMADD231PSZmkz */ |
| 118077 | VR512, VR512, VK16WM, VR512, f512mem, |
| 118078 | /* VFNMADD231PSZr */ |
| 118079 | VR512, VR512, VR512, VR512, |
| 118080 | /* VFNMADD231PSZrb */ |
| 118081 | VR512, VR512, VR512, VR512, AVX512RC, |
| 118082 | /* VFNMADD231PSZrbk */ |
| 118083 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 118084 | /* VFNMADD231PSZrbkz */ |
| 118085 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 118086 | /* VFNMADD231PSZrk */ |
| 118087 | VR512, VR512, VK16WM, VR512, VR512, |
| 118088 | /* VFNMADD231PSZrkz */ |
| 118089 | VR512, VR512, VK16WM, VR512, VR512, |
| 118090 | /* VFNMADD231PSm */ |
| 118091 | VR128, VR128, VR128, f128mem, |
| 118092 | /* VFNMADD231PSr */ |
| 118093 | VR128, VR128, VR128, VR128, |
| 118094 | /* VFNMADD231SDZm */ |
| 118095 | FR64X, FR64X, FR64X, f64mem, |
| 118096 | /* VFNMADD231SDZm_Int */ |
| 118097 | VR128X, VR128X, VR128X, sdmem, |
| 118098 | /* VFNMADD231SDZmk_Int */ |
| 118099 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 118100 | /* VFNMADD231SDZmkz_Int */ |
| 118101 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 118102 | /* VFNMADD231SDZr */ |
| 118103 | FR64X, FR64X, FR64X, FR64X, |
| 118104 | /* VFNMADD231SDZr_Int */ |
| 118105 | VR128X, VR128X, VR128X, VR128X, |
| 118106 | /* VFNMADD231SDZrb */ |
| 118107 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 118108 | /* VFNMADD231SDZrb_Int */ |
| 118109 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 118110 | /* VFNMADD231SDZrbk_Int */ |
| 118111 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118112 | /* VFNMADD231SDZrbkz_Int */ |
| 118113 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118114 | /* VFNMADD231SDZrk_Int */ |
| 118115 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118116 | /* VFNMADD231SDZrkz_Int */ |
| 118117 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118118 | /* VFNMADD231SDm */ |
| 118119 | FR64, FR64, FR64, f64mem, |
| 118120 | /* VFNMADD231SDm_Int */ |
| 118121 | VR128, VR128, VR128, sdmem, |
| 118122 | /* VFNMADD231SDr */ |
| 118123 | FR64, FR64, FR64, FR64, |
| 118124 | /* VFNMADD231SDr_Int */ |
| 118125 | VR128, VR128, VR128, VR128, |
| 118126 | /* VFNMADD231SHZm */ |
| 118127 | FR16X, FR16X, FR16X, f16mem, |
| 118128 | /* VFNMADD231SHZm_Int */ |
| 118129 | VR128X, VR128X, VR128X, shmem, |
| 118130 | /* VFNMADD231SHZmk_Int */ |
| 118131 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 118132 | /* VFNMADD231SHZmkz_Int */ |
| 118133 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 118134 | /* VFNMADD231SHZr */ |
| 118135 | FR16X, FR16X, FR16X, FR16X, |
| 118136 | /* VFNMADD231SHZr_Int */ |
| 118137 | VR128X, VR128X, VR128X, VR128X, |
| 118138 | /* VFNMADD231SHZrb */ |
| 118139 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 118140 | /* VFNMADD231SHZrb_Int */ |
| 118141 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 118142 | /* VFNMADD231SHZrbk_Int */ |
| 118143 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118144 | /* VFNMADD231SHZrbkz_Int */ |
| 118145 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118146 | /* VFNMADD231SHZrk_Int */ |
| 118147 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118148 | /* VFNMADD231SHZrkz_Int */ |
| 118149 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118150 | /* VFNMADD231SSZm */ |
| 118151 | FR32X, FR32X, FR32X, f32mem, |
| 118152 | /* VFNMADD231SSZm_Int */ |
| 118153 | VR128X, VR128X, VR128X, ssmem, |
| 118154 | /* VFNMADD231SSZmk_Int */ |
| 118155 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 118156 | /* VFNMADD231SSZmkz_Int */ |
| 118157 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 118158 | /* VFNMADD231SSZr */ |
| 118159 | FR32X, FR32X, FR32X, FR32X, |
| 118160 | /* VFNMADD231SSZr_Int */ |
| 118161 | VR128X, VR128X, VR128X, VR128X, |
| 118162 | /* VFNMADD231SSZrb */ |
| 118163 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 118164 | /* VFNMADD231SSZrb_Int */ |
| 118165 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 118166 | /* VFNMADD231SSZrbk_Int */ |
| 118167 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118168 | /* VFNMADD231SSZrbkz_Int */ |
| 118169 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118170 | /* VFNMADD231SSZrk_Int */ |
| 118171 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118172 | /* VFNMADD231SSZrkz_Int */ |
| 118173 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118174 | /* VFNMADD231SSm */ |
| 118175 | FR32, FR32, FR32, f32mem, |
| 118176 | /* VFNMADD231SSm_Int */ |
| 118177 | VR128, VR128, VR128, ssmem, |
| 118178 | /* VFNMADD231SSr */ |
| 118179 | FR32, FR32, FR32, FR32, |
| 118180 | /* VFNMADD231SSr_Int */ |
| 118181 | VR128, VR128, VR128, VR128, |
| 118182 | /* VFNMADDPD4Ymr */ |
| 118183 | VR256, VR256, f256mem, VR256, |
| 118184 | /* VFNMADDPD4Yrm */ |
| 118185 | VR256, VR256, VR256, f256mem, |
| 118186 | /* VFNMADDPD4Yrr */ |
| 118187 | VR256, VR256, VR256, VR256, |
| 118188 | /* VFNMADDPD4Yrr_REV */ |
| 118189 | VR256, VR256, VR256, VR256, |
| 118190 | /* VFNMADDPD4mr */ |
| 118191 | VR128, VR128, f128mem, VR128, |
| 118192 | /* VFNMADDPD4rm */ |
| 118193 | VR128, VR128, VR128, f128mem, |
| 118194 | /* VFNMADDPD4rr */ |
| 118195 | VR128, VR128, VR128, VR128, |
| 118196 | /* VFNMADDPD4rr_REV */ |
| 118197 | VR128, VR128, VR128, VR128, |
| 118198 | /* VFNMADDPS4Ymr */ |
| 118199 | VR256, VR256, f256mem, VR256, |
| 118200 | /* VFNMADDPS4Yrm */ |
| 118201 | VR256, VR256, VR256, f256mem, |
| 118202 | /* VFNMADDPS4Yrr */ |
| 118203 | VR256, VR256, VR256, VR256, |
| 118204 | /* VFNMADDPS4Yrr_REV */ |
| 118205 | VR256, VR256, VR256, VR256, |
| 118206 | /* VFNMADDPS4mr */ |
| 118207 | VR128, VR128, f128mem, VR128, |
| 118208 | /* VFNMADDPS4rm */ |
| 118209 | VR128, VR128, VR128, f128mem, |
| 118210 | /* VFNMADDPS4rr */ |
| 118211 | VR128, VR128, VR128, VR128, |
| 118212 | /* VFNMADDPS4rr_REV */ |
| 118213 | VR128, VR128, VR128, VR128, |
| 118214 | /* VFNMADDSD4mr */ |
| 118215 | FR64, FR64, f64mem, FR64, |
| 118216 | /* VFNMADDSD4mr_Int */ |
| 118217 | VR128, VR128, sdmem, VR128, |
| 118218 | /* VFNMADDSD4rm */ |
| 118219 | FR64, FR64, FR64, f64mem, |
| 118220 | /* VFNMADDSD4rm_Int */ |
| 118221 | VR128, VR128, VR128, sdmem, |
| 118222 | /* VFNMADDSD4rr */ |
| 118223 | FR64, FR64, FR64, FR64, |
| 118224 | /* VFNMADDSD4rr_Int */ |
| 118225 | VR128, VR128, VR128, VR128, |
| 118226 | /* VFNMADDSD4rr_Int_REV */ |
| 118227 | VR128, VR128, VR128, VR128, |
| 118228 | /* VFNMADDSD4rr_REV */ |
| 118229 | FR64, FR64, FR64, FR64, |
| 118230 | /* VFNMADDSS4mr */ |
| 118231 | FR32, FR32, f32mem, FR32, |
| 118232 | /* VFNMADDSS4mr_Int */ |
| 118233 | VR128, VR128, ssmem, VR128, |
| 118234 | /* VFNMADDSS4rm */ |
| 118235 | FR32, FR32, FR32, f32mem, |
| 118236 | /* VFNMADDSS4rm_Int */ |
| 118237 | VR128, VR128, VR128, ssmem, |
| 118238 | /* VFNMADDSS4rr */ |
| 118239 | FR32, FR32, FR32, FR32, |
| 118240 | /* VFNMADDSS4rr_Int */ |
| 118241 | VR128, VR128, VR128, VR128, |
| 118242 | /* VFNMADDSS4rr_Int_REV */ |
| 118243 | VR128, VR128, VR128, VR128, |
| 118244 | /* VFNMADDSS4rr_REV */ |
| 118245 | FR32, FR32, FR32, FR32, |
| 118246 | /* VFNMSUB132BF16Z128m */ |
| 118247 | VR128X, VR128X, VR128X, f128mem, |
| 118248 | /* VFNMSUB132BF16Z128mb */ |
| 118249 | VR128X, VR128X, VR128X, f16mem, |
| 118250 | /* VFNMSUB132BF16Z128mbk */ |
| 118251 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 118252 | /* VFNMSUB132BF16Z128mbkz */ |
| 118253 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 118254 | /* VFNMSUB132BF16Z128mk */ |
| 118255 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 118256 | /* VFNMSUB132BF16Z128mkz */ |
| 118257 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 118258 | /* VFNMSUB132BF16Z128r */ |
| 118259 | VR128X, VR128X, VR128X, VR128X, |
| 118260 | /* VFNMSUB132BF16Z128rk */ |
| 118261 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 118262 | /* VFNMSUB132BF16Z128rkz */ |
| 118263 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 118264 | /* VFNMSUB132BF16Z256m */ |
| 118265 | VR256X, VR256X, VR256X, f256mem, |
| 118266 | /* VFNMSUB132BF16Z256mb */ |
| 118267 | VR256X, VR256X, VR256X, f16mem, |
| 118268 | /* VFNMSUB132BF16Z256mbk */ |
| 118269 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 118270 | /* VFNMSUB132BF16Z256mbkz */ |
| 118271 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 118272 | /* VFNMSUB132BF16Z256mk */ |
| 118273 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 118274 | /* VFNMSUB132BF16Z256mkz */ |
| 118275 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 118276 | /* VFNMSUB132BF16Z256r */ |
| 118277 | VR256X, VR256X, VR256X, VR256X, |
| 118278 | /* VFNMSUB132BF16Z256rk */ |
| 118279 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118280 | /* VFNMSUB132BF16Z256rkz */ |
| 118281 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118282 | /* VFNMSUB132BF16Zm */ |
| 118283 | VR512, VR512, VR512, f512mem, |
| 118284 | /* VFNMSUB132BF16Zmb */ |
| 118285 | VR512, VR512, VR512, f16mem, |
| 118286 | /* VFNMSUB132BF16Zmbk */ |
| 118287 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118288 | /* VFNMSUB132BF16Zmbkz */ |
| 118289 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118290 | /* VFNMSUB132BF16Zmk */ |
| 118291 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118292 | /* VFNMSUB132BF16Zmkz */ |
| 118293 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118294 | /* VFNMSUB132BF16Zr */ |
| 118295 | VR512, VR512, VR512, VR512, |
| 118296 | /* VFNMSUB132BF16Zrk */ |
| 118297 | VR512, VR512, VK32WM, VR512, VR512, |
| 118298 | /* VFNMSUB132BF16Zrkz */ |
| 118299 | VR512, VR512, VK32WM, VR512, VR512, |
| 118300 | /* VFNMSUB132PDYm */ |
| 118301 | VR256, VR256, VR256, f256mem, |
| 118302 | /* VFNMSUB132PDYr */ |
| 118303 | VR256, VR256, VR256, VR256, |
| 118304 | /* VFNMSUB132PDZ128m */ |
| 118305 | VR128X, VR128X, VR128X, f128mem, |
| 118306 | /* VFNMSUB132PDZ128mb */ |
| 118307 | VR128X, VR128X, VR128X, f64mem, |
| 118308 | /* VFNMSUB132PDZ128mbk */ |
| 118309 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 118310 | /* VFNMSUB132PDZ128mbkz */ |
| 118311 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 118312 | /* VFNMSUB132PDZ128mk */ |
| 118313 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 118314 | /* VFNMSUB132PDZ128mkz */ |
| 118315 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 118316 | /* VFNMSUB132PDZ128r */ |
| 118317 | VR128X, VR128X, VR128X, VR128X, |
| 118318 | /* VFNMSUB132PDZ128rk */ |
| 118319 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 118320 | /* VFNMSUB132PDZ128rkz */ |
| 118321 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 118322 | /* VFNMSUB132PDZ256m */ |
| 118323 | VR256X, VR256X, VR256X, f256mem, |
| 118324 | /* VFNMSUB132PDZ256mb */ |
| 118325 | VR256X, VR256X, VR256X, f64mem, |
| 118326 | /* VFNMSUB132PDZ256mbk */ |
| 118327 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 118328 | /* VFNMSUB132PDZ256mbkz */ |
| 118329 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 118330 | /* VFNMSUB132PDZ256mk */ |
| 118331 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 118332 | /* VFNMSUB132PDZ256mkz */ |
| 118333 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 118334 | /* VFNMSUB132PDZ256r */ |
| 118335 | VR256X, VR256X, VR256X, VR256X, |
| 118336 | /* VFNMSUB132PDZ256rk */ |
| 118337 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 118338 | /* VFNMSUB132PDZ256rkz */ |
| 118339 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 118340 | /* VFNMSUB132PDZm */ |
| 118341 | VR512, VR512, VR512, f512mem, |
| 118342 | /* VFNMSUB132PDZmb */ |
| 118343 | VR512, VR512, VR512, f64mem, |
| 118344 | /* VFNMSUB132PDZmbk */ |
| 118345 | VR512, VR512, VK8WM, VR512, f64mem, |
| 118346 | /* VFNMSUB132PDZmbkz */ |
| 118347 | VR512, VR512, VK8WM, VR512, f64mem, |
| 118348 | /* VFNMSUB132PDZmk */ |
| 118349 | VR512, VR512, VK8WM, VR512, f512mem, |
| 118350 | /* VFNMSUB132PDZmkz */ |
| 118351 | VR512, VR512, VK8WM, VR512, f512mem, |
| 118352 | /* VFNMSUB132PDZr */ |
| 118353 | VR512, VR512, VR512, VR512, |
| 118354 | /* VFNMSUB132PDZrb */ |
| 118355 | VR512, VR512, VR512, VR512, AVX512RC, |
| 118356 | /* VFNMSUB132PDZrbk */ |
| 118357 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 118358 | /* VFNMSUB132PDZrbkz */ |
| 118359 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 118360 | /* VFNMSUB132PDZrk */ |
| 118361 | VR512, VR512, VK8WM, VR512, VR512, |
| 118362 | /* VFNMSUB132PDZrkz */ |
| 118363 | VR512, VR512, VK8WM, VR512, VR512, |
| 118364 | /* VFNMSUB132PDm */ |
| 118365 | VR128, VR128, VR128, f128mem, |
| 118366 | /* VFNMSUB132PDr */ |
| 118367 | VR128, VR128, VR128, VR128, |
| 118368 | /* VFNMSUB132PHZ128m */ |
| 118369 | VR128X, VR128X, VR128X, f128mem, |
| 118370 | /* VFNMSUB132PHZ128mb */ |
| 118371 | VR128X, VR128X, VR128X, f16mem, |
| 118372 | /* VFNMSUB132PHZ128mbk */ |
| 118373 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 118374 | /* VFNMSUB132PHZ128mbkz */ |
| 118375 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 118376 | /* VFNMSUB132PHZ128mk */ |
| 118377 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 118378 | /* VFNMSUB132PHZ128mkz */ |
| 118379 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 118380 | /* VFNMSUB132PHZ128r */ |
| 118381 | VR128X, VR128X, VR128X, VR128X, |
| 118382 | /* VFNMSUB132PHZ128rk */ |
| 118383 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 118384 | /* VFNMSUB132PHZ128rkz */ |
| 118385 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 118386 | /* VFNMSUB132PHZ256m */ |
| 118387 | VR256X, VR256X, VR256X, f256mem, |
| 118388 | /* VFNMSUB132PHZ256mb */ |
| 118389 | VR256X, VR256X, VR256X, f16mem, |
| 118390 | /* VFNMSUB132PHZ256mbk */ |
| 118391 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 118392 | /* VFNMSUB132PHZ256mbkz */ |
| 118393 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 118394 | /* VFNMSUB132PHZ256mk */ |
| 118395 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 118396 | /* VFNMSUB132PHZ256mkz */ |
| 118397 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 118398 | /* VFNMSUB132PHZ256r */ |
| 118399 | VR256X, VR256X, VR256X, VR256X, |
| 118400 | /* VFNMSUB132PHZ256rk */ |
| 118401 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118402 | /* VFNMSUB132PHZ256rkz */ |
| 118403 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118404 | /* VFNMSUB132PHZm */ |
| 118405 | VR512, VR512, VR512, f512mem, |
| 118406 | /* VFNMSUB132PHZmb */ |
| 118407 | VR512, VR512, VR512, f16mem, |
| 118408 | /* VFNMSUB132PHZmbk */ |
| 118409 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118410 | /* VFNMSUB132PHZmbkz */ |
| 118411 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118412 | /* VFNMSUB132PHZmk */ |
| 118413 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118414 | /* VFNMSUB132PHZmkz */ |
| 118415 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118416 | /* VFNMSUB132PHZr */ |
| 118417 | VR512, VR512, VR512, VR512, |
| 118418 | /* VFNMSUB132PHZrb */ |
| 118419 | VR512, VR512, VR512, VR512, AVX512RC, |
| 118420 | /* VFNMSUB132PHZrbk */ |
| 118421 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 118422 | /* VFNMSUB132PHZrbkz */ |
| 118423 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 118424 | /* VFNMSUB132PHZrk */ |
| 118425 | VR512, VR512, VK32WM, VR512, VR512, |
| 118426 | /* VFNMSUB132PHZrkz */ |
| 118427 | VR512, VR512, VK32WM, VR512, VR512, |
| 118428 | /* VFNMSUB132PSYm */ |
| 118429 | VR256, VR256, VR256, f256mem, |
| 118430 | /* VFNMSUB132PSYr */ |
| 118431 | VR256, VR256, VR256, VR256, |
| 118432 | /* VFNMSUB132PSZ128m */ |
| 118433 | VR128X, VR128X, VR128X, f128mem, |
| 118434 | /* VFNMSUB132PSZ128mb */ |
| 118435 | VR128X, VR128X, VR128X, f32mem, |
| 118436 | /* VFNMSUB132PSZ128mbk */ |
| 118437 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 118438 | /* VFNMSUB132PSZ128mbkz */ |
| 118439 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 118440 | /* VFNMSUB132PSZ128mk */ |
| 118441 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 118442 | /* VFNMSUB132PSZ128mkz */ |
| 118443 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 118444 | /* VFNMSUB132PSZ128r */ |
| 118445 | VR128X, VR128X, VR128X, VR128X, |
| 118446 | /* VFNMSUB132PSZ128rk */ |
| 118447 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 118448 | /* VFNMSUB132PSZ128rkz */ |
| 118449 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 118450 | /* VFNMSUB132PSZ256m */ |
| 118451 | VR256X, VR256X, VR256X, f256mem, |
| 118452 | /* VFNMSUB132PSZ256mb */ |
| 118453 | VR256X, VR256X, VR256X, f32mem, |
| 118454 | /* VFNMSUB132PSZ256mbk */ |
| 118455 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 118456 | /* VFNMSUB132PSZ256mbkz */ |
| 118457 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 118458 | /* VFNMSUB132PSZ256mk */ |
| 118459 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 118460 | /* VFNMSUB132PSZ256mkz */ |
| 118461 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 118462 | /* VFNMSUB132PSZ256r */ |
| 118463 | VR256X, VR256X, VR256X, VR256X, |
| 118464 | /* VFNMSUB132PSZ256rk */ |
| 118465 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 118466 | /* VFNMSUB132PSZ256rkz */ |
| 118467 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 118468 | /* VFNMSUB132PSZm */ |
| 118469 | VR512, VR512, VR512, f512mem, |
| 118470 | /* VFNMSUB132PSZmb */ |
| 118471 | VR512, VR512, VR512, f32mem, |
| 118472 | /* VFNMSUB132PSZmbk */ |
| 118473 | VR512, VR512, VK16WM, VR512, f32mem, |
| 118474 | /* VFNMSUB132PSZmbkz */ |
| 118475 | VR512, VR512, VK16WM, VR512, f32mem, |
| 118476 | /* VFNMSUB132PSZmk */ |
| 118477 | VR512, VR512, VK16WM, VR512, f512mem, |
| 118478 | /* VFNMSUB132PSZmkz */ |
| 118479 | VR512, VR512, VK16WM, VR512, f512mem, |
| 118480 | /* VFNMSUB132PSZr */ |
| 118481 | VR512, VR512, VR512, VR512, |
| 118482 | /* VFNMSUB132PSZrb */ |
| 118483 | VR512, VR512, VR512, VR512, AVX512RC, |
| 118484 | /* VFNMSUB132PSZrbk */ |
| 118485 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 118486 | /* VFNMSUB132PSZrbkz */ |
| 118487 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 118488 | /* VFNMSUB132PSZrk */ |
| 118489 | VR512, VR512, VK16WM, VR512, VR512, |
| 118490 | /* VFNMSUB132PSZrkz */ |
| 118491 | VR512, VR512, VK16WM, VR512, VR512, |
| 118492 | /* VFNMSUB132PSm */ |
| 118493 | VR128, VR128, VR128, f128mem, |
| 118494 | /* VFNMSUB132PSr */ |
| 118495 | VR128, VR128, VR128, VR128, |
| 118496 | /* VFNMSUB132SDZm */ |
| 118497 | FR64X, FR64X, FR64X, f64mem, |
| 118498 | /* VFNMSUB132SDZm_Int */ |
| 118499 | VR128X, VR128X, VR128X, sdmem, |
| 118500 | /* VFNMSUB132SDZmk_Int */ |
| 118501 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 118502 | /* VFNMSUB132SDZmkz_Int */ |
| 118503 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 118504 | /* VFNMSUB132SDZr */ |
| 118505 | FR64X, FR64X, FR64X, FR64X, |
| 118506 | /* VFNMSUB132SDZr_Int */ |
| 118507 | VR128X, VR128X, VR128X, VR128X, |
| 118508 | /* VFNMSUB132SDZrb */ |
| 118509 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 118510 | /* VFNMSUB132SDZrb_Int */ |
| 118511 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 118512 | /* VFNMSUB132SDZrbk_Int */ |
| 118513 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118514 | /* VFNMSUB132SDZrbkz_Int */ |
| 118515 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118516 | /* VFNMSUB132SDZrk_Int */ |
| 118517 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118518 | /* VFNMSUB132SDZrkz_Int */ |
| 118519 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118520 | /* VFNMSUB132SDm */ |
| 118521 | FR64, FR64, FR64, f64mem, |
| 118522 | /* VFNMSUB132SDm_Int */ |
| 118523 | VR128, VR128, VR128, sdmem, |
| 118524 | /* VFNMSUB132SDr */ |
| 118525 | FR64, FR64, FR64, FR64, |
| 118526 | /* VFNMSUB132SDr_Int */ |
| 118527 | VR128, VR128, VR128, VR128, |
| 118528 | /* VFNMSUB132SHZm */ |
| 118529 | FR16X, FR16X, FR16X, f16mem, |
| 118530 | /* VFNMSUB132SHZm_Int */ |
| 118531 | VR128X, VR128X, VR128X, shmem, |
| 118532 | /* VFNMSUB132SHZmk_Int */ |
| 118533 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 118534 | /* VFNMSUB132SHZmkz_Int */ |
| 118535 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 118536 | /* VFNMSUB132SHZr */ |
| 118537 | FR16X, FR16X, FR16X, FR16X, |
| 118538 | /* VFNMSUB132SHZr_Int */ |
| 118539 | VR128X, VR128X, VR128X, VR128X, |
| 118540 | /* VFNMSUB132SHZrb */ |
| 118541 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 118542 | /* VFNMSUB132SHZrb_Int */ |
| 118543 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 118544 | /* VFNMSUB132SHZrbk_Int */ |
| 118545 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118546 | /* VFNMSUB132SHZrbkz_Int */ |
| 118547 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118548 | /* VFNMSUB132SHZrk_Int */ |
| 118549 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118550 | /* VFNMSUB132SHZrkz_Int */ |
| 118551 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118552 | /* VFNMSUB132SSZm */ |
| 118553 | FR32X, FR32X, FR32X, f32mem, |
| 118554 | /* VFNMSUB132SSZm_Int */ |
| 118555 | VR128X, VR128X, VR128X, ssmem, |
| 118556 | /* VFNMSUB132SSZmk_Int */ |
| 118557 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 118558 | /* VFNMSUB132SSZmkz_Int */ |
| 118559 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 118560 | /* VFNMSUB132SSZr */ |
| 118561 | FR32X, FR32X, FR32X, FR32X, |
| 118562 | /* VFNMSUB132SSZr_Int */ |
| 118563 | VR128X, VR128X, VR128X, VR128X, |
| 118564 | /* VFNMSUB132SSZrb */ |
| 118565 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 118566 | /* VFNMSUB132SSZrb_Int */ |
| 118567 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 118568 | /* VFNMSUB132SSZrbk_Int */ |
| 118569 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118570 | /* VFNMSUB132SSZrbkz_Int */ |
| 118571 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118572 | /* VFNMSUB132SSZrk_Int */ |
| 118573 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118574 | /* VFNMSUB132SSZrkz_Int */ |
| 118575 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118576 | /* VFNMSUB132SSm */ |
| 118577 | FR32, FR32, FR32, f32mem, |
| 118578 | /* VFNMSUB132SSm_Int */ |
| 118579 | VR128, VR128, VR128, ssmem, |
| 118580 | /* VFNMSUB132SSr */ |
| 118581 | FR32, FR32, FR32, FR32, |
| 118582 | /* VFNMSUB132SSr_Int */ |
| 118583 | VR128, VR128, VR128, VR128, |
| 118584 | /* VFNMSUB213BF16Z128m */ |
| 118585 | VR128X, VR128X, VR128X, f128mem, |
| 118586 | /* VFNMSUB213BF16Z128mb */ |
| 118587 | VR128X, VR128X, VR128X, f16mem, |
| 118588 | /* VFNMSUB213BF16Z128mbk */ |
| 118589 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 118590 | /* VFNMSUB213BF16Z128mbkz */ |
| 118591 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 118592 | /* VFNMSUB213BF16Z128mk */ |
| 118593 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 118594 | /* VFNMSUB213BF16Z128mkz */ |
| 118595 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 118596 | /* VFNMSUB213BF16Z128r */ |
| 118597 | VR128X, VR128X, VR128X, VR128X, |
| 118598 | /* VFNMSUB213BF16Z128rk */ |
| 118599 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 118600 | /* VFNMSUB213BF16Z128rkz */ |
| 118601 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 118602 | /* VFNMSUB213BF16Z256m */ |
| 118603 | VR256X, VR256X, VR256X, f256mem, |
| 118604 | /* VFNMSUB213BF16Z256mb */ |
| 118605 | VR256X, VR256X, VR256X, f16mem, |
| 118606 | /* VFNMSUB213BF16Z256mbk */ |
| 118607 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 118608 | /* VFNMSUB213BF16Z256mbkz */ |
| 118609 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 118610 | /* VFNMSUB213BF16Z256mk */ |
| 118611 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 118612 | /* VFNMSUB213BF16Z256mkz */ |
| 118613 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 118614 | /* VFNMSUB213BF16Z256r */ |
| 118615 | VR256X, VR256X, VR256X, VR256X, |
| 118616 | /* VFNMSUB213BF16Z256rk */ |
| 118617 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118618 | /* VFNMSUB213BF16Z256rkz */ |
| 118619 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118620 | /* VFNMSUB213BF16Zm */ |
| 118621 | VR512, VR512, VR512, f512mem, |
| 118622 | /* VFNMSUB213BF16Zmb */ |
| 118623 | VR512, VR512, VR512, f16mem, |
| 118624 | /* VFNMSUB213BF16Zmbk */ |
| 118625 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118626 | /* VFNMSUB213BF16Zmbkz */ |
| 118627 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118628 | /* VFNMSUB213BF16Zmk */ |
| 118629 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118630 | /* VFNMSUB213BF16Zmkz */ |
| 118631 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118632 | /* VFNMSUB213BF16Zr */ |
| 118633 | VR512, VR512, VR512, VR512, |
| 118634 | /* VFNMSUB213BF16Zrk */ |
| 118635 | VR512, VR512, VK32WM, VR512, VR512, |
| 118636 | /* VFNMSUB213BF16Zrkz */ |
| 118637 | VR512, VR512, VK32WM, VR512, VR512, |
| 118638 | /* VFNMSUB213PDYm */ |
| 118639 | VR256, VR256, VR256, f256mem, |
| 118640 | /* VFNMSUB213PDYr */ |
| 118641 | VR256, VR256, VR256, VR256, |
| 118642 | /* VFNMSUB213PDZ128m */ |
| 118643 | VR128X, VR128X, VR128X, f128mem, |
| 118644 | /* VFNMSUB213PDZ128mb */ |
| 118645 | VR128X, VR128X, VR128X, f64mem, |
| 118646 | /* VFNMSUB213PDZ128mbk */ |
| 118647 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 118648 | /* VFNMSUB213PDZ128mbkz */ |
| 118649 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 118650 | /* VFNMSUB213PDZ128mk */ |
| 118651 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 118652 | /* VFNMSUB213PDZ128mkz */ |
| 118653 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 118654 | /* VFNMSUB213PDZ128r */ |
| 118655 | VR128X, VR128X, VR128X, VR128X, |
| 118656 | /* VFNMSUB213PDZ128rk */ |
| 118657 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 118658 | /* VFNMSUB213PDZ128rkz */ |
| 118659 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 118660 | /* VFNMSUB213PDZ256m */ |
| 118661 | VR256X, VR256X, VR256X, f256mem, |
| 118662 | /* VFNMSUB213PDZ256mb */ |
| 118663 | VR256X, VR256X, VR256X, f64mem, |
| 118664 | /* VFNMSUB213PDZ256mbk */ |
| 118665 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 118666 | /* VFNMSUB213PDZ256mbkz */ |
| 118667 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 118668 | /* VFNMSUB213PDZ256mk */ |
| 118669 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 118670 | /* VFNMSUB213PDZ256mkz */ |
| 118671 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 118672 | /* VFNMSUB213PDZ256r */ |
| 118673 | VR256X, VR256X, VR256X, VR256X, |
| 118674 | /* VFNMSUB213PDZ256rk */ |
| 118675 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 118676 | /* VFNMSUB213PDZ256rkz */ |
| 118677 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 118678 | /* VFNMSUB213PDZm */ |
| 118679 | VR512, VR512, VR512, f512mem, |
| 118680 | /* VFNMSUB213PDZmb */ |
| 118681 | VR512, VR512, VR512, f64mem, |
| 118682 | /* VFNMSUB213PDZmbk */ |
| 118683 | VR512, VR512, VK8WM, VR512, f64mem, |
| 118684 | /* VFNMSUB213PDZmbkz */ |
| 118685 | VR512, VR512, VK8WM, VR512, f64mem, |
| 118686 | /* VFNMSUB213PDZmk */ |
| 118687 | VR512, VR512, VK8WM, VR512, f512mem, |
| 118688 | /* VFNMSUB213PDZmkz */ |
| 118689 | VR512, VR512, VK8WM, VR512, f512mem, |
| 118690 | /* VFNMSUB213PDZr */ |
| 118691 | VR512, VR512, VR512, VR512, |
| 118692 | /* VFNMSUB213PDZrb */ |
| 118693 | VR512, VR512, VR512, VR512, AVX512RC, |
| 118694 | /* VFNMSUB213PDZrbk */ |
| 118695 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 118696 | /* VFNMSUB213PDZrbkz */ |
| 118697 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 118698 | /* VFNMSUB213PDZrk */ |
| 118699 | VR512, VR512, VK8WM, VR512, VR512, |
| 118700 | /* VFNMSUB213PDZrkz */ |
| 118701 | VR512, VR512, VK8WM, VR512, VR512, |
| 118702 | /* VFNMSUB213PDm */ |
| 118703 | VR128, VR128, VR128, f128mem, |
| 118704 | /* VFNMSUB213PDr */ |
| 118705 | VR128, VR128, VR128, VR128, |
| 118706 | /* VFNMSUB213PHZ128m */ |
| 118707 | VR128X, VR128X, VR128X, f128mem, |
| 118708 | /* VFNMSUB213PHZ128mb */ |
| 118709 | VR128X, VR128X, VR128X, f16mem, |
| 118710 | /* VFNMSUB213PHZ128mbk */ |
| 118711 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 118712 | /* VFNMSUB213PHZ128mbkz */ |
| 118713 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 118714 | /* VFNMSUB213PHZ128mk */ |
| 118715 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 118716 | /* VFNMSUB213PHZ128mkz */ |
| 118717 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 118718 | /* VFNMSUB213PHZ128r */ |
| 118719 | VR128X, VR128X, VR128X, VR128X, |
| 118720 | /* VFNMSUB213PHZ128rk */ |
| 118721 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 118722 | /* VFNMSUB213PHZ128rkz */ |
| 118723 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 118724 | /* VFNMSUB213PHZ256m */ |
| 118725 | VR256X, VR256X, VR256X, f256mem, |
| 118726 | /* VFNMSUB213PHZ256mb */ |
| 118727 | VR256X, VR256X, VR256X, f16mem, |
| 118728 | /* VFNMSUB213PHZ256mbk */ |
| 118729 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 118730 | /* VFNMSUB213PHZ256mbkz */ |
| 118731 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 118732 | /* VFNMSUB213PHZ256mk */ |
| 118733 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 118734 | /* VFNMSUB213PHZ256mkz */ |
| 118735 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 118736 | /* VFNMSUB213PHZ256r */ |
| 118737 | VR256X, VR256X, VR256X, VR256X, |
| 118738 | /* VFNMSUB213PHZ256rk */ |
| 118739 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118740 | /* VFNMSUB213PHZ256rkz */ |
| 118741 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118742 | /* VFNMSUB213PHZm */ |
| 118743 | VR512, VR512, VR512, f512mem, |
| 118744 | /* VFNMSUB213PHZmb */ |
| 118745 | VR512, VR512, VR512, f16mem, |
| 118746 | /* VFNMSUB213PHZmbk */ |
| 118747 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118748 | /* VFNMSUB213PHZmbkz */ |
| 118749 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118750 | /* VFNMSUB213PHZmk */ |
| 118751 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118752 | /* VFNMSUB213PHZmkz */ |
| 118753 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118754 | /* VFNMSUB213PHZr */ |
| 118755 | VR512, VR512, VR512, VR512, |
| 118756 | /* VFNMSUB213PHZrb */ |
| 118757 | VR512, VR512, VR512, VR512, AVX512RC, |
| 118758 | /* VFNMSUB213PHZrbk */ |
| 118759 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 118760 | /* VFNMSUB213PHZrbkz */ |
| 118761 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 118762 | /* VFNMSUB213PHZrk */ |
| 118763 | VR512, VR512, VK32WM, VR512, VR512, |
| 118764 | /* VFNMSUB213PHZrkz */ |
| 118765 | VR512, VR512, VK32WM, VR512, VR512, |
| 118766 | /* VFNMSUB213PSYm */ |
| 118767 | VR256, VR256, VR256, f256mem, |
| 118768 | /* VFNMSUB213PSYr */ |
| 118769 | VR256, VR256, VR256, VR256, |
| 118770 | /* VFNMSUB213PSZ128m */ |
| 118771 | VR128X, VR128X, VR128X, f128mem, |
| 118772 | /* VFNMSUB213PSZ128mb */ |
| 118773 | VR128X, VR128X, VR128X, f32mem, |
| 118774 | /* VFNMSUB213PSZ128mbk */ |
| 118775 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 118776 | /* VFNMSUB213PSZ128mbkz */ |
| 118777 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 118778 | /* VFNMSUB213PSZ128mk */ |
| 118779 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 118780 | /* VFNMSUB213PSZ128mkz */ |
| 118781 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 118782 | /* VFNMSUB213PSZ128r */ |
| 118783 | VR128X, VR128X, VR128X, VR128X, |
| 118784 | /* VFNMSUB213PSZ128rk */ |
| 118785 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 118786 | /* VFNMSUB213PSZ128rkz */ |
| 118787 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 118788 | /* VFNMSUB213PSZ256m */ |
| 118789 | VR256X, VR256X, VR256X, f256mem, |
| 118790 | /* VFNMSUB213PSZ256mb */ |
| 118791 | VR256X, VR256X, VR256X, f32mem, |
| 118792 | /* VFNMSUB213PSZ256mbk */ |
| 118793 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 118794 | /* VFNMSUB213PSZ256mbkz */ |
| 118795 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 118796 | /* VFNMSUB213PSZ256mk */ |
| 118797 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 118798 | /* VFNMSUB213PSZ256mkz */ |
| 118799 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 118800 | /* VFNMSUB213PSZ256r */ |
| 118801 | VR256X, VR256X, VR256X, VR256X, |
| 118802 | /* VFNMSUB213PSZ256rk */ |
| 118803 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 118804 | /* VFNMSUB213PSZ256rkz */ |
| 118805 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 118806 | /* VFNMSUB213PSZm */ |
| 118807 | VR512, VR512, VR512, f512mem, |
| 118808 | /* VFNMSUB213PSZmb */ |
| 118809 | VR512, VR512, VR512, f32mem, |
| 118810 | /* VFNMSUB213PSZmbk */ |
| 118811 | VR512, VR512, VK16WM, VR512, f32mem, |
| 118812 | /* VFNMSUB213PSZmbkz */ |
| 118813 | VR512, VR512, VK16WM, VR512, f32mem, |
| 118814 | /* VFNMSUB213PSZmk */ |
| 118815 | VR512, VR512, VK16WM, VR512, f512mem, |
| 118816 | /* VFNMSUB213PSZmkz */ |
| 118817 | VR512, VR512, VK16WM, VR512, f512mem, |
| 118818 | /* VFNMSUB213PSZr */ |
| 118819 | VR512, VR512, VR512, VR512, |
| 118820 | /* VFNMSUB213PSZrb */ |
| 118821 | VR512, VR512, VR512, VR512, AVX512RC, |
| 118822 | /* VFNMSUB213PSZrbk */ |
| 118823 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 118824 | /* VFNMSUB213PSZrbkz */ |
| 118825 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 118826 | /* VFNMSUB213PSZrk */ |
| 118827 | VR512, VR512, VK16WM, VR512, VR512, |
| 118828 | /* VFNMSUB213PSZrkz */ |
| 118829 | VR512, VR512, VK16WM, VR512, VR512, |
| 118830 | /* VFNMSUB213PSm */ |
| 118831 | VR128, VR128, VR128, f128mem, |
| 118832 | /* VFNMSUB213PSr */ |
| 118833 | VR128, VR128, VR128, VR128, |
| 118834 | /* VFNMSUB213SDZm */ |
| 118835 | FR64X, FR64X, FR64X, f64mem, |
| 118836 | /* VFNMSUB213SDZm_Int */ |
| 118837 | VR128X, VR128X, VR128X, sdmem, |
| 118838 | /* VFNMSUB213SDZmk_Int */ |
| 118839 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 118840 | /* VFNMSUB213SDZmkz_Int */ |
| 118841 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 118842 | /* VFNMSUB213SDZr */ |
| 118843 | FR64X, FR64X, FR64X, FR64X, |
| 118844 | /* VFNMSUB213SDZr_Int */ |
| 118845 | VR128X, VR128X, VR128X, VR128X, |
| 118846 | /* VFNMSUB213SDZrb */ |
| 118847 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 118848 | /* VFNMSUB213SDZrb_Int */ |
| 118849 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 118850 | /* VFNMSUB213SDZrbk_Int */ |
| 118851 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118852 | /* VFNMSUB213SDZrbkz_Int */ |
| 118853 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118854 | /* VFNMSUB213SDZrk_Int */ |
| 118855 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118856 | /* VFNMSUB213SDZrkz_Int */ |
| 118857 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118858 | /* VFNMSUB213SDm */ |
| 118859 | FR64, FR64, FR64, f64mem, |
| 118860 | /* VFNMSUB213SDm_Int */ |
| 118861 | VR128, VR128, VR128, sdmem, |
| 118862 | /* VFNMSUB213SDr */ |
| 118863 | FR64, FR64, FR64, FR64, |
| 118864 | /* VFNMSUB213SDr_Int */ |
| 118865 | VR128, VR128, VR128, VR128, |
| 118866 | /* VFNMSUB213SHZm */ |
| 118867 | FR16X, FR16X, FR16X, f16mem, |
| 118868 | /* VFNMSUB213SHZm_Int */ |
| 118869 | VR128X, VR128X, VR128X, shmem, |
| 118870 | /* VFNMSUB213SHZmk_Int */ |
| 118871 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 118872 | /* VFNMSUB213SHZmkz_Int */ |
| 118873 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 118874 | /* VFNMSUB213SHZr */ |
| 118875 | FR16X, FR16X, FR16X, FR16X, |
| 118876 | /* VFNMSUB213SHZr_Int */ |
| 118877 | VR128X, VR128X, VR128X, VR128X, |
| 118878 | /* VFNMSUB213SHZrb */ |
| 118879 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 118880 | /* VFNMSUB213SHZrb_Int */ |
| 118881 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 118882 | /* VFNMSUB213SHZrbk_Int */ |
| 118883 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118884 | /* VFNMSUB213SHZrbkz_Int */ |
| 118885 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118886 | /* VFNMSUB213SHZrk_Int */ |
| 118887 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118888 | /* VFNMSUB213SHZrkz_Int */ |
| 118889 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118890 | /* VFNMSUB213SSZm */ |
| 118891 | FR32X, FR32X, FR32X, f32mem, |
| 118892 | /* VFNMSUB213SSZm_Int */ |
| 118893 | VR128X, VR128X, VR128X, ssmem, |
| 118894 | /* VFNMSUB213SSZmk_Int */ |
| 118895 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 118896 | /* VFNMSUB213SSZmkz_Int */ |
| 118897 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 118898 | /* VFNMSUB213SSZr */ |
| 118899 | FR32X, FR32X, FR32X, FR32X, |
| 118900 | /* VFNMSUB213SSZr_Int */ |
| 118901 | VR128X, VR128X, VR128X, VR128X, |
| 118902 | /* VFNMSUB213SSZrb */ |
| 118903 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 118904 | /* VFNMSUB213SSZrb_Int */ |
| 118905 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 118906 | /* VFNMSUB213SSZrbk_Int */ |
| 118907 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118908 | /* VFNMSUB213SSZrbkz_Int */ |
| 118909 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 118910 | /* VFNMSUB213SSZrk_Int */ |
| 118911 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118912 | /* VFNMSUB213SSZrkz_Int */ |
| 118913 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 118914 | /* VFNMSUB213SSm */ |
| 118915 | FR32, FR32, FR32, f32mem, |
| 118916 | /* VFNMSUB213SSm_Int */ |
| 118917 | VR128, VR128, VR128, ssmem, |
| 118918 | /* VFNMSUB213SSr */ |
| 118919 | FR32, FR32, FR32, FR32, |
| 118920 | /* VFNMSUB213SSr_Int */ |
| 118921 | VR128, VR128, VR128, VR128, |
| 118922 | /* VFNMSUB231BF16Z128m */ |
| 118923 | VR128X, VR128X, VR128X, f128mem, |
| 118924 | /* VFNMSUB231BF16Z128mb */ |
| 118925 | VR128X, VR128X, VR128X, f16mem, |
| 118926 | /* VFNMSUB231BF16Z128mbk */ |
| 118927 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 118928 | /* VFNMSUB231BF16Z128mbkz */ |
| 118929 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 118930 | /* VFNMSUB231BF16Z128mk */ |
| 118931 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 118932 | /* VFNMSUB231BF16Z128mkz */ |
| 118933 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 118934 | /* VFNMSUB231BF16Z128r */ |
| 118935 | VR128X, VR128X, VR128X, VR128X, |
| 118936 | /* VFNMSUB231BF16Z128rk */ |
| 118937 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 118938 | /* VFNMSUB231BF16Z128rkz */ |
| 118939 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 118940 | /* VFNMSUB231BF16Z256m */ |
| 118941 | VR256X, VR256X, VR256X, f256mem, |
| 118942 | /* VFNMSUB231BF16Z256mb */ |
| 118943 | VR256X, VR256X, VR256X, f16mem, |
| 118944 | /* VFNMSUB231BF16Z256mbk */ |
| 118945 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 118946 | /* VFNMSUB231BF16Z256mbkz */ |
| 118947 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 118948 | /* VFNMSUB231BF16Z256mk */ |
| 118949 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 118950 | /* VFNMSUB231BF16Z256mkz */ |
| 118951 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 118952 | /* VFNMSUB231BF16Z256r */ |
| 118953 | VR256X, VR256X, VR256X, VR256X, |
| 118954 | /* VFNMSUB231BF16Z256rk */ |
| 118955 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118956 | /* VFNMSUB231BF16Z256rkz */ |
| 118957 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 118958 | /* VFNMSUB231BF16Zm */ |
| 118959 | VR512, VR512, VR512, f512mem, |
| 118960 | /* VFNMSUB231BF16Zmb */ |
| 118961 | VR512, VR512, VR512, f16mem, |
| 118962 | /* VFNMSUB231BF16Zmbk */ |
| 118963 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118964 | /* VFNMSUB231BF16Zmbkz */ |
| 118965 | VR512, VR512, VK32WM, VR512, f16mem, |
| 118966 | /* VFNMSUB231BF16Zmk */ |
| 118967 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118968 | /* VFNMSUB231BF16Zmkz */ |
| 118969 | VR512, VR512, VK32WM, VR512, f512mem, |
| 118970 | /* VFNMSUB231BF16Zr */ |
| 118971 | VR512, VR512, VR512, VR512, |
| 118972 | /* VFNMSUB231BF16Zrk */ |
| 118973 | VR512, VR512, VK32WM, VR512, VR512, |
| 118974 | /* VFNMSUB231BF16Zrkz */ |
| 118975 | VR512, VR512, VK32WM, VR512, VR512, |
| 118976 | /* VFNMSUB231PDYm */ |
| 118977 | VR256, VR256, VR256, f256mem, |
| 118978 | /* VFNMSUB231PDYr */ |
| 118979 | VR256, VR256, VR256, VR256, |
| 118980 | /* VFNMSUB231PDZ128m */ |
| 118981 | VR128X, VR128X, VR128X, f128mem, |
| 118982 | /* VFNMSUB231PDZ128mb */ |
| 118983 | VR128X, VR128X, VR128X, f64mem, |
| 118984 | /* VFNMSUB231PDZ128mbk */ |
| 118985 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 118986 | /* VFNMSUB231PDZ128mbkz */ |
| 118987 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 118988 | /* VFNMSUB231PDZ128mk */ |
| 118989 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 118990 | /* VFNMSUB231PDZ128mkz */ |
| 118991 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 118992 | /* VFNMSUB231PDZ128r */ |
| 118993 | VR128X, VR128X, VR128X, VR128X, |
| 118994 | /* VFNMSUB231PDZ128rk */ |
| 118995 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 118996 | /* VFNMSUB231PDZ128rkz */ |
| 118997 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 118998 | /* VFNMSUB231PDZ256m */ |
| 118999 | VR256X, VR256X, VR256X, f256mem, |
| 119000 | /* VFNMSUB231PDZ256mb */ |
| 119001 | VR256X, VR256X, VR256X, f64mem, |
| 119002 | /* VFNMSUB231PDZ256mbk */ |
| 119003 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 119004 | /* VFNMSUB231PDZ256mbkz */ |
| 119005 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 119006 | /* VFNMSUB231PDZ256mk */ |
| 119007 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 119008 | /* VFNMSUB231PDZ256mkz */ |
| 119009 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 119010 | /* VFNMSUB231PDZ256r */ |
| 119011 | VR256X, VR256X, VR256X, VR256X, |
| 119012 | /* VFNMSUB231PDZ256rk */ |
| 119013 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 119014 | /* VFNMSUB231PDZ256rkz */ |
| 119015 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 119016 | /* VFNMSUB231PDZm */ |
| 119017 | VR512, VR512, VR512, f512mem, |
| 119018 | /* VFNMSUB231PDZmb */ |
| 119019 | VR512, VR512, VR512, f64mem, |
| 119020 | /* VFNMSUB231PDZmbk */ |
| 119021 | VR512, VR512, VK8WM, VR512, f64mem, |
| 119022 | /* VFNMSUB231PDZmbkz */ |
| 119023 | VR512, VR512, VK8WM, VR512, f64mem, |
| 119024 | /* VFNMSUB231PDZmk */ |
| 119025 | VR512, VR512, VK8WM, VR512, f512mem, |
| 119026 | /* VFNMSUB231PDZmkz */ |
| 119027 | VR512, VR512, VK8WM, VR512, f512mem, |
| 119028 | /* VFNMSUB231PDZr */ |
| 119029 | VR512, VR512, VR512, VR512, |
| 119030 | /* VFNMSUB231PDZrb */ |
| 119031 | VR512, VR512, VR512, VR512, AVX512RC, |
| 119032 | /* VFNMSUB231PDZrbk */ |
| 119033 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 119034 | /* VFNMSUB231PDZrbkz */ |
| 119035 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 119036 | /* VFNMSUB231PDZrk */ |
| 119037 | VR512, VR512, VK8WM, VR512, VR512, |
| 119038 | /* VFNMSUB231PDZrkz */ |
| 119039 | VR512, VR512, VK8WM, VR512, VR512, |
| 119040 | /* VFNMSUB231PDm */ |
| 119041 | VR128, VR128, VR128, f128mem, |
| 119042 | /* VFNMSUB231PDr */ |
| 119043 | VR128, VR128, VR128, VR128, |
| 119044 | /* VFNMSUB231PHZ128m */ |
| 119045 | VR128X, VR128X, VR128X, f128mem, |
| 119046 | /* VFNMSUB231PHZ128mb */ |
| 119047 | VR128X, VR128X, VR128X, f16mem, |
| 119048 | /* VFNMSUB231PHZ128mbk */ |
| 119049 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 119050 | /* VFNMSUB231PHZ128mbkz */ |
| 119051 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 119052 | /* VFNMSUB231PHZ128mk */ |
| 119053 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 119054 | /* VFNMSUB231PHZ128mkz */ |
| 119055 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 119056 | /* VFNMSUB231PHZ128r */ |
| 119057 | VR128X, VR128X, VR128X, VR128X, |
| 119058 | /* VFNMSUB231PHZ128rk */ |
| 119059 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 119060 | /* VFNMSUB231PHZ128rkz */ |
| 119061 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 119062 | /* VFNMSUB231PHZ256m */ |
| 119063 | VR256X, VR256X, VR256X, f256mem, |
| 119064 | /* VFNMSUB231PHZ256mb */ |
| 119065 | VR256X, VR256X, VR256X, f16mem, |
| 119066 | /* VFNMSUB231PHZ256mbk */ |
| 119067 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 119068 | /* VFNMSUB231PHZ256mbkz */ |
| 119069 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 119070 | /* VFNMSUB231PHZ256mk */ |
| 119071 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 119072 | /* VFNMSUB231PHZ256mkz */ |
| 119073 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 119074 | /* VFNMSUB231PHZ256r */ |
| 119075 | VR256X, VR256X, VR256X, VR256X, |
| 119076 | /* VFNMSUB231PHZ256rk */ |
| 119077 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 119078 | /* VFNMSUB231PHZ256rkz */ |
| 119079 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 119080 | /* VFNMSUB231PHZm */ |
| 119081 | VR512, VR512, VR512, f512mem, |
| 119082 | /* VFNMSUB231PHZmb */ |
| 119083 | VR512, VR512, VR512, f16mem, |
| 119084 | /* VFNMSUB231PHZmbk */ |
| 119085 | VR512, VR512, VK32WM, VR512, f16mem, |
| 119086 | /* VFNMSUB231PHZmbkz */ |
| 119087 | VR512, VR512, VK32WM, VR512, f16mem, |
| 119088 | /* VFNMSUB231PHZmk */ |
| 119089 | VR512, VR512, VK32WM, VR512, f512mem, |
| 119090 | /* VFNMSUB231PHZmkz */ |
| 119091 | VR512, VR512, VK32WM, VR512, f512mem, |
| 119092 | /* VFNMSUB231PHZr */ |
| 119093 | VR512, VR512, VR512, VR512, |
| 119094 | /* VFNMSUB231PHZrb */ |
| 119095 | VR512, VR512, VR512, VR512, AVX512RC, |
| 119096 | /* VFNMSUB231PHZrbk */ |
| 119097 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 119098 | /* VFNMSUB231PHZrbkz */ |
| 119099 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 119100 | /* VFNMSUB231PHZrk */ |
| 119101 | VR512, VR512, VK32WM, VR512, VR512, |
| 119102 | /* VFNMSUB231PHZrkz */ |
| 119103 | VR512, VR512, VK32WM, VR512, VR512, |
| 119104 | /* VFNMSUB231PSYm */ |
| 119105 | VR256, VR256, VR256, f256mem, |
| 119106 | /* VFNMSUB231PSYr */ |
| 119107 | VR256, VR256, VR256, VR256, |
| 119108 | /* VFNMSUB231PSZ128m */ |
| 119109 | VR128X, VR128X, VR128X, f128mem, |
| 119110 | /* VFNMSUB231PSZ128mb */ |
| 119111 | VR128X, VR128X, VR128X, f32mem, |
| 119112 | /* VFNMSUB231PSZ128mbk */ |
| 119113 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 119114 | /* VFNMSUB231PSZ128mbkz */ |
| 119115 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 119116 | /* VFNMSUB231PSZ128mk */ |
| 119117 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 119118 | /* VFNMSUB231PSZ128mkz */ |
| 119119 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 119120 | /* VFNMSUB231PSZ128r */ |
| 119121 | VR128X, VR128X, VR128X, VR128X, |
| 119122 | /* VFNMSUB231PSZ128rk */ |
| 119123 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 119124 | /* VFNMSUB231PSZ128rkz */ |
| 119125 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 119126 | /* VFNMSUB231PSZ256m */ |
| 119127 | VR256X, VR256X, VR256X, f256mem, |
| 119128 | /* VFNMSUB231PSZ256mb */ |
| 119129 | VR256X, VR256X, VR256X, f32mem, |
| 119130 | /* VFNMSUB231PSZ256mbk */ |
| 119131 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 119132 | /* VFNMSUB231PSZ256mbkz */ |
| 119133 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 119134 | /* VFNMSUB231PSZ256mk */ |
| 119135 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 119136 | /* VFNMSUB231PSZ256mkz */ |
| 119137 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 119138 | /* VFNMSUB231PSZ256r */ |
| 119139 | VR256X, VR256X, VR256X, VR256X, |
| 119140 | /* VFNMSUB231PSZ256rk */ |
| 119141 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 119142 | /* VFNMSUB231PSZ256rkz */ |
| 119143 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 119144 | /* VFNMSUB231PSZm */ |
| 119145 | VR512, VR512, VR512, f512mem, |
| 119146 | /* VFNMSUB231PSZmb */ |
| 119147 | VR512, VR512, VR512, f32mem, |
| 119148 | /* VFNMSUB231PSZmbk */ |
| 119149 | VR512, VR512, VK16WM, VR512, f32mem, |
| 119150 | /* VFNMSUB231PSZmbkz */ |
| 119151 | VR512, VR512, VK16WM, VR512, f32mem, |
| 119152 | /* VFNMSUB231PSZmk */ |
| 119153 | VR512, VR512, VK16WM, VR512, f512mem, |
| 119154 | /* VFNMSUB231PSZmkz */ |
| 119155 | VR512, VR512, VK16WM, VR512, f512mem, |
| 119156 | /* VFNMSUB231PSZr */ |
| 119157 | VR512, VR512, VR512, VR512, |
| 119158 | /* VFNMSUB231PSZrb */ |
| 119159 | VR512, VR512, VR512, VR512, AVX512RC, |
| 119160 | /* VFNMSUB231PSZrbk */ |
| 119161 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 119162 | /* VFNMSUB231PSZrbkz */ |
| 119163 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 119164 | /* VFNMSUB231PSZrk */ |
| 119165 | VR512, VR512, VK16WM, VR512, VR512, |
| 119166 | /* VFNMSUB231PSZrkz */ |
| 119167 | VR512, VR512, VK16WM, VR512, VR512, |
| 119168 | /* VFNMSUB231PSm */ |
| 119169 | VR128, VR128, VR128, f128mem, |
| 119170 | /* VFNMSUB231PSr */ |
| 119171 | VR128, VR128, VR128, VR128, |
| 119172 | /* VFNMSUB231SDZm */ |
| 119173 | FR64X, FR64X, FR64X, f64mem, |
| 119174 | /* VFNMSUB231SDZm_Int */ |
| 119175 | VR128X, VR128X, VR128X, sdmem, |
| 119176 | /* VFNMSUB231SDZmk_Int */ |
| 119177 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 119178 | /* VFNMSUB231SDZmkz_Int */ |
| 119179 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 119180 | /* VFNMSUB231SDZr */ |
| 119181 | FR64X, FR64X, FR64X, FR64X, |
| 119182 | /* VFNMSUB231SDZr_Int */ |
| 119183 | VR128X, VR128X, VR128X, VR128X, |
| 119184 | /* VFNMSUB231SDZrb */ |
| 119185 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 119186 | /* VFNMSUB231SDZrb_Int */ |
| 119187 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 119188 | /* VFNMSUB231SDZrbk_Int */ |
| 119189 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119190 | /* VFNMSUB231SDZrbkz_Int */ |
| 119191 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119192 | /* VFNMSUB231SDZrk_Int */ |
| 119193 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119194 | /* VFNMSUB231SDZrkz_Int */ |
| 119195 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119196 | /* VFNMSUB231SDm */ |
| 119197 | FR64, FR64, FR64, f64mem, |
| 119198 | /* VFNMSUB231SDm_Int */ |
| 119199 | VR128, VR128, VR128, sdmem, |
| 119200 | /* VFNMSUB231SDr */ |
| 119201 | FR64, FR64, FR64, FR64, |
| 119202 | /* VFNMSUB231SDr_Int */ |
| 119203 | VR128, VR128, VR128, VR128, |
| 119204 | /* VFNMSUB231SHZm */ |
| 119205 | FR16X, FR16X, FR16X, f16mem, |
| 119206 | /* VFNMSUB231SHZm_Int */ |
| 119207 | VR128X, VR128X, VR128X, shmem, |
| 119208 | /* VFNMSUB231SHZmk_Int */ |
| 119209 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 119210 | /* VFNMSUB231SHZmkz_Int */ |
| 119211 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 119212 | /* VFNMSUB231SHZr */ |
| 119213 | FR16X, FR16X, FR16X, FR16X, |
| 119214 | /* VFNMSUB231SHZr_Int */ |
| 119215 | VR128X, VR128X, VR128X, VR128X, |
| 119216 | /* VFNMSUB231SHZrb */ |
| 119217 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 119218 | /* VFNMSUB231SHZrb_Int */ |
| 119219 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 119220 | /* VFNMSUB231SHZrbk_Int */ |
| 119221 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119222 | /* VFNMSUB231SHZrbkz_Int */ |
| 119223 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119224 | /* VFNMSUB231SHZrk_Int */ |
| 119225 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119226 | /* VFNMSUB231SHZrkz_Int */ |
| 119227 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119228 | /* VFNMSUB231SSZm */ |
| 119229 | FR32X, FR32X, FR32X, f32mem, |
| 119230 | /* VFNMSUB231SSZm_Int */ |
| 119231 | VR128X, VR128X, VR128X, ssmem, |
| 119232 | /* VFNMSUB231SSZmk_Int */ |
| 119233 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 119234 | /* VFNMSUB231SSZmkz_Int */ |
| 119235 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 119236 | /* VFNMSUB231SSZr */ |
| 119237 | FR32X, FR32X, FR32X, FR32X, |
| 119238 | /* VFNMSUB231SSZr_Int */ |
| 119239 | VR128X, VR128X, VR128X, VR128X, |
| 119240 | /* VFNMSUB231SSZrb */ |
| 119241 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 119242 | /* VFNMSUB231SSZrb_Int */ |
| 119243 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 119244 | /* VFNMSUB231SSZrbk_Int */ |
| 119245 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119246 | /* VFNMSUB231SSZrbkz_Int */ |
| 119247 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119248 | /* VFNMSUB231SSZrk_Int */ |
| 119249 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119250 | /* VFNMSUB231SSZrkz_Int */ |
| 119251 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119252 | /* VFNMSUB231SSm */ |
| 119253 | FR32, FR32, FR32, f32mem, |
| 119254 | /* VFNMSUB231SSm_Int */ |
| 119255 | VR128, VR128, VR128, ssmem, |
| 119256 | /* VFNMSUB231SSr */ |
| 119257 | FR32, FR32, FR32, FR32, |
| 119258 | /* VFNMSUB231SSr_Int */ |
| 119259 | VR128, VR128, VR128, VR128, |
| 119260 | /* VFNMSUBPD4Ymr */ |
| 119261 | VR256, VR256, f256mem, VR256, |
| 119262 | /* VFNMSUBPD4Yrm */ |
| 119263 | VR256, VR256, VR256, f256mem, |
| 119264 | /* VFNMSUBPD4Yrr */ |
| 119265 | VR256, VR256, VR256, VR256, |
| 119266 | /* VFNMSUBPD4Yrr_REV */ |
| 119267 | VR256, VR256, VR256, VR256, |
| 119268 | /* VFNMSUBPD4mr */ |
| 119269 | VR128, VR128, f128mem, VR128, |
| 119270 | /* VFNMSUBPD4rm */ |
| 119271 | VR128, VR128, VR128, f128mem, |
| 119272 | /* VFNMSUBPD4rr */ |
| 119273 | VR128, VR128, VR128, VR128, |
| 119274 | /* VFNMSUBPD4rr_REV */ |
| 119275 | VR128, VR128, VR128, VR128, |
| 119276 | /* VFNMSUBPS4Ymr */ |
| 119277 | VR256, VR256, f256mem, VR256, |
| 119278 | /* VFNMSUBPS4Yrm */ |
| 119279 | VR256, VR256, VR256, f256mem, |
| 119280 | /* VFNMSUBPS4Yrr */ |
| 119281 | VR256, VR256, VR256, VR256, |
| 119282 | /* VFNMSUBPS4Yrr_REV */ |
| 119283 | VR256, VR256, VR256, VR256, |
| 119284 | /* VFNMSUBPS4mr */ |
| 119285 | VR128, VR128, f128mem, VR128, |
| 119286 | /* VFNMSUBPS4rm */ |
| 119287 | VR128, VR128, VR128, f128mem, |
| 119288 | /* VFNMSUBPS4rr */ |
| 119289 | VR128, VR128, VR128, VR128, |
| 119290 | /* VFNMSUBPS4rr_REV */ |
| 119291 | VR128, VR128, VR128, VR128, |
| 119292 | /* VFNMSUBSD4mr */ |
| 119293 | FR64, FR64, f64mem, FR64, |
| 119294 | /* VFNMSUBSD4mr_Int */ |
| 119295 | VR128, VR128, sdmem, VR128, |
| 119296 | /* VFNMSUBSD4rm */ |
| 119297 | FR64, FR64, FR64, f64mem, |
| 119298 | /* VFNMSUBSD4rm_Int */ |
| 119299 | VR128, VR128, VR128, sdmem, |
| 119300 | /* VFNMSUBSD4rr */ |
| 119301 | FR64, FR64, FR64, FR64, |
| 119302 | /* VFNMSUBSD4rr_Int */ |
| 119303 | VR128, VR128, VR128, VR128, |
| 119304 | /* VFNMSUBSD4rr_Int_REV */ |
| 119305 | VR128, VR128, VR128, VR128, |
| 119306 | /* VFNMSUBSD4rr_REV */ |
| 119307 | FR64, FR64, FR64, FR64, |
| 119308 | /* VFNMSUBSS4mr */ |
| 119309 | FR32, FR32, f32mem, FR32, |
| 119310 | /* VFNMSUBSS4mr_Int */ |
| 119311 | VR128, VR128, ssmem, VR128, |
| 119312 | /* VFNMSUBSS4rm */ |
| 119313 | FR32, FR32, FR32, f32mem, |
| 119314 | /* VFNMSUBSS4rm_Int */ |
| 119315 | VR128, VR128, VR128, ssmem, |
| 119316 | /* VFNMSUBSS4rr */ |
| 119317 | FR32, FR32, FR32, FR32, |
| 119318 | /* VFNMSUBSS4rr_Int */ |
| 119319 | VR128, VR128, VR128, VR128, |
| 119320 | /* VFNMSUBSS4rr_Int_REV */ |
| 119321 | VR128, VR128, VR128, VR128, |
| 119322 | /* VFNMSUBSS4rr_REV */ |
| 119323 | FR32, FR32, FR32, FR32, |
| 119324 | /* VFPCLASSBF16Z128mbi */ |
| 119325 | VK8, f16mem, i32u8imm, |
| 119326 | /* VFPCLASSBF16Z128mbik */ |
| 119327 | VK8, VK8WM, f16mem, i32u8imm, |
| 119328 | /* VFPCLASSBF16Z128mi */ |
| 119329 | VK8, f128mem, i32u8imm, |
| 119330 | /* VFPCLASSBF16Z128mik */ |
| 119331 | VK8, VK8WM, f128mem, i32u8imm, |
| 119332 | /* VFPCLASSBF16Z128ri */ |
| 119333 | VK8, VR128X, i32u8imm, |
| 119334 | /* VFPCLASSBF16Z128rik */ |
| 119335 | VK8, VK8WM, VR128X, i32u8imm, |
| 119336 | /* VFPCLASSBF16Z256mbi */ |
| 119337 | VK16, f16mem, i32u8imm, |
| 119338 | /* VFPCLASSBF16Z256mbik */ |
| 119339 | VK16, VK16WM, f16mem, i32u8imm, |
| 119340 | /* VFPCLASSBF16Z256mi */ |
| 119341 | VK16, f256mem, i32u8imm, |
| 119342 | /* VFPCLASSBF16Z256mik */ |
| 119343 | VK16, VK16WM, f256mem, i32u8imm, |
| 119344 | /* VFPCLASSBF16Z256ri */ |
| 119345 | VK16, VR256X, i32u8imm, |
| 119346 | /* VFPCLASSBF16Z256rik */ |
| 119347 | VK16, VK16WM, VR256X, i32u8imm, |
| 119348 | /* VFPCLASSBF16Zmbi */ |
| 119349 | VK32, f16mem, i32u8imm, |
| 119350 | /* VFPCLASSBF16Zmbik */ |
| 119351 | VK32, VK32WM, f16mem, i32u8imm, |
| 119352 | /* VFPCLASSBF16Zmi */ |
| 119353 | VK32, f512mem, i32u8imm, |
| 119354 | /* VFPCLASSBF16Zmik */ |
| 119355 | VK32, VK32WM, f512mem, i32u8imm, |
| 119356 | /* VFPCLASSBF16Zri */ |
| 119357 | VK32, VR512, i32u8imm, |
| 119358 | /* VFPCLASSBF16Zrik */ |
| 119359 | VK32, VK32WM, VR512, i32u8imm, |
| 119360 | /* VFPCLASSPDZ128mbi */ |
| 119361 | VK2, f64mem, i32u8imm, |
| 119362 | /* VFPCLASSPDZ128mbik */ |
| 119363 | VK2, VK2WM, f64mem, i32u8imm, |
| 119364 | /* VFPCLASSPDZ128mi */ |
| 119365 | VK2, f128mem, i32u8imm, |
| 119366 | /* VFPCLASSPDZ128mik */ |
| 119367 | VK2, VK2WM, f128mem, i32u8imm, |
| 119368 | /* VFPCLASSPDZ128ri */ |
| 119369 | VK2, VR128X, i32u8imm, |
| 119370 | /* VFPCLASSPDZ128rik */ |
| 119371 | VK2, VK2WM, VR128X, i32u8imm, |
| 119372 | /* VFPCLASSPDZ256mbi */ |
| 119373 | VK4, f64mem, i32u8imm, |
| 119374 | /* VFPCLASSPDZ256mbik */ |
| 119375 | VK4, VK4WM, f64mem, i32u8imm, |
| 119376 | /* VFPCLASSPDZ256mi */ |
| 119377 | VK4, f256mem, i32u8imm, |
| 119378 | /* VFPCLASSPDZ256mik */ |
| 119379 | VK4, VK4WM, f256mem, i32u8imm, |
| 119380 | /* VFPCLASSPDZ256ri */ |
| 119381 | VK4, VR256X, i32u8imm, |
| 119382 | /* VFPCLASSPDZ256rik */ |
| 119383 | VK4, VK4WM, VR256X, i32u8imm, |
| 119384 | /* VFPCLASSPDZmbi */ |
| 119385 | VK8, f64mem, i32u8imm, |
| 119386 | /* VFPCLASSPDZmbik */ |
| 119387 | VK8, VK8WM, f64mem, i32u8imm, |
| 119388 | /* VFPCLASSPDZmi */ |
| 119389 | VK8, f512mem, i32u8imm, |
| 119390 | /* VFPCLASSPDZmik */ |
| 119391 | VK8, VK8WM, f512mem, i32u8imm, |
| 119392 | /* VFPCLASSPDZri */ |
| 119393 | VK8, VR512, i32u8imm, |
| 119394 | /* VFPCLASSPDZrik */ |
| 119395 | VK8, VK8WM, VR512, i32u8imm, |
| 119396 | /* VFPCLASSPHZ128mbi */ |
| 119397 | VK8, f16mem, i32u8imm, |
| 119398 | /* VFPCLASSPHZ128mbik */ |
| 119399 | VK8, VK8WM, f16mem, i32u8imm, |
| 119400 | /* VFPCLASSPHZ128mi */ |
| 119401 | VK8, f128mem, i32u8imm, |
| 119402 | /* VFPCLASSPHZ128mik */ |
| 119403 | VK8, VK8WM, f128mem, i32u8imm, |
| 119404 | /* VFPCLASSPHZ128ri */ |
| 119405 | VK8, VR128X, i32u8imm, |
| 119406 | /* VFPCLASSPHZ128rik */ |
| 119407 | VK8, VK8WM, VR128X, i32u8imm, |
| 119408 | /* VFPCLASSPHZ256mbi */ |
| 119409 | VK16, f16mem, i32u8imm, |
| 119410 | /* VFPCLASSPHZ256mbik */ |
| 119411 | VK16, VK16WM, f16mem, i32u8imm, |
| 119412 | /* VFPCLASSPHZ256mi */ |
| 119413 | VK16, f256mem, i32u8imm, |
| 119414 | /* VFPCLASSPHZ256mik */ |
| 119415 | VK16, VK16WM, f256mem, i32u8imm, |
| 119416 | /* VFPCLASSPHZ256ri */ |
| 119417 | VK16, VR256X, i32u8imm, |
| 119418 | /* VFPCLASSPHZ256rik */ |
| 119419 | VK16, VK16WM, VR256X, i32u8imm, |
| 119420 | /* VFPCLASSPHZmbi */ |
| 119421 | VK32, f16mem, i32u8imm, |
| 119422 | /* VFPCLASSPHZmbik */ |
| 119423 | VK32, VK32WM, f16mem, i32u8imm, |
| 119424 | /* VFPCLASSPHZmi */ |
| 119425 | VK32, f512mem, i32u8imm, |
| 119426 | /* VFPCLASSPHZmik */ |
| 119427 | VK32, VK32WM, f512mem, i32u8imm, |
| 119428 | /* VFPCLASSPHZri */ |
| 119429 | VK32, VR512, i32u8imm, |
| 119430 | /* VFPCLASSPHZrik */ |
| 119431 | VK32, VK32WM, VR512, i32u8imm, |
| 119432 | /* VFPCLASSPSZ128mbi */ |
| 119433 | VK4, f32mem, i32u8imm, |
| 119434 | /* VFPCLASSPSZ128mbik */ |
| 119435 | VK4, VK4WM, f32mem, i32u8imm, |
| 119436 | /* VFPCLASSPSZ128mi */ |
| 119437 | VK4, f128mem, i32u8imm, |
| 119438 | /* VFPCLASSPSZ128mik */ |
| 119439 | VK4, VK4WM, f128mem, i32u8imm, |
| 119440 | /* VFPCLASSPSZ128ri */ |
| 119441 | VK4, VR128X, i32u8imm, |
| 119442 | /* VFPCLASSPSZ128rik */ |
| 119443 | VK4, VK4WM, VR128X, i32u8imm, |
| 119444 | /* VFPCLASSPSZ256mbi */ |
| 119445 | VK8, f32mem, i32u8imm, |
| 119446 | /* VFPCLASSPSZ256mbik */ |
| 119447 | VK8, VK8WM, f32mem, i32u8imm, |
| 119448 | /* VFPCLASSPSZ256mi */ |
| 119449 | VK8, f256mem, i32u8imm, |
| 119450 | /* VFPCLASSPSZ256mik */ |
| 119451 | VK8, VK8WM, f256mem, i32u8imm, |
| 119452 | /* VFPCLASSPSZ256ri */ |
| 119453 | VK8, VR256X, i32u8imm, |
| 119454 | /* VFPCLASSPSZ256rik */ |
| 119455 | VK8, VK8WM, VR256X, i32u8imm, |
| 119456 | /* VFPCLASSPSZmbi */ |
| 119457 | VK16, f32mem, i32u8imm, |
| 119458 | /* VFPCLASSPSZmbik */ |
| 119459 | VK16, VK16WM, f32mem, i32u8imm, |
| 119460 | /* VFPCLASSPSZmi */ |
| 119461 | VK16, f512mem, i32u8imm, |
| 119462 | /* VFPCLASSPSZmik */ |
| 119463 | VK16, VK16WM, f512mem, i32u8imm, |
| 119464 | /* VFPCLASSPSZri */ |
| 119465 | VK16, VR512, i32u8imm, |
| 119466 | /* VFPCLASSPSZrik */ |
| 119467 | VK16, VK16WM, VR512, i32u8imm, |
| 119468 | /* VFPCLASSSDZmi */ |
| 119469 | VK1, sdmem, i32u8imm, |
| 119470 | /* VFPCLASSSDZmik */ |
| 119471 | VK1, VK1WM, sdmem, i32u8imm, |
| 119472 | /* VFPCLASSSDZri */ |
| 119473 | VK1, VR128X, i32u8imm, |
| 119474 | /* VFPCLASSSDZrik */ |
| 119475 | VK1, VK1WM, VR128X, i32u8imm, |
| 119476 | /* VFPCLASSSHZmi */ |
| 119477 | VK1, shmem, i32u8imm, |
| 119478 | /* VFPCLASSSHZmik */ |
| 119479 | VK1, VK1WM, shmem, i32u8imm, |
| 119480 | /* VFPCLASSSHZri */ |
| 119481 | VK1, VR128X, i32u8imm, |
| 119482 | /* VFPCLASSSHZrik */ |
| 119483 | VK1, VK1WM, VR128X, i32u8imm, |
| 119484 | /* VFPCLASSSSZmi */ |
| 119485 | VK1, ssmem, i32u8imm, |
| 119486 | /* VFPCLASSSSZmik */ |
| 119487 | VK1, VK1WM, ssmem, i32u8imm, |
| 119488 | /* VFPCLASSSSZri */ |
| 119489 | VK1, VR128X, i32u8imm, |
| 119490 | /* VFPCLASSSSZrik */ |
| 119491 | VK1, VK1WM, VR128X, i32u8imm, |
| 119492 | /* VFRCZPDYrm */ |
| 119493 | VR256, f256mem, |
| 119494 | /* VFRCZPDYrr */ |
| 119495 | VR256, VR256, |
| 119496 | /* VFRCZPDrm */ |
| 119497 | VR128, f128mem, |
| 119498 | /* VFRCZPDrr */ |
| 119499 | VR128, VR128, |
| 119500 | /* VFRCZPSYrm */ |
| 119501 | VR256, f256mem, |
| 119502 | /* VFRCZPSYrr */ |
| 119503 | VR256, VR256, |
| 119504 | /* VFRCZPSrm */ |
| 119505 | VR128, f128mem, |
| 119506 | /* VFRCZPSrr */ |
| 119507 | VR128, VR128, |
| 119508 | /* VFRCZSDrm */ |
| 119509 | VR128, sdmem, |
| 119510 | /* VFRCZSDrr */ |
| 119511 | VR128, VR128, |
| 119512 | /* VFRCZSSrm */ |
| 119513 | VR128, ssmem, |
| 119514 | /* VFRCZSSrr */ |
| 119515 | VR128, VR128, |
| 119516 | /* VGATHERDPDYrm */ |
| 119517 | VR256, VR256, VR256, vx64mem, VR256, |
| 119518 | /* VGATHERDPDZ128rm */ |
| 119519 | VR128X, VK2WM, VR128X, VK2WM, vx64xmem, |
| 119520 | /* VGATHERDPDZ256rm */ |
| 119521 | VR256X, VK4WM, VR256X, VK4WM, vx64xmem, |
| 119522 | /* VGATHERDPDZrm */ |
| 119523 | VR512, VK8WM, VR512, VK8WM, vy64xmem, |
| 119524 | /* VGATHERDPDrm */ |
| 119525 | VR128, VR128, VR128, vx64mem, VR128, |
| 119526 | /* VGATHERDPSYrm */ |
| 119527 | VR256, VR256, VR256, vy32mem, VR256, |
| 119528 | /* VGATHERDPSZ128rm */ |
| 119529 | VR128X, VK4WM, VR128X, VK4WM, vx32xmem, |
| 119530 | /* VGATHERDPSZ256rm */ |
| 119531 | VR256X, VK8WM, VR256X, VK8WM, vy32xmem, |
| 119532 | /* VGATHERDPSZrm */ |
| 119533 | VR512, VK16WM, VR512, VK16WM, vz32mem, |
| 119534 | /* VGATHERDPSrm */ |
| 119535 | VR128, VR128, VR128, vx32mem, VR128, |
| 119536 | /* VGATHERPF0DPDm */ |
| 119537 | VK8WM, vy64xmem, |
| 119538 | /* VGATHERPF0DPSm */ |
| 119539 | VK16WM, vz32mem, |
| 119540 | /* VGATHERPF0QPDm */ |
| 119541 | VK8WM, vz64mem, |
| 119542 | /* VGATHERPF0QPSm */ |
| 119543 | VK8WM, vz32mem, |
| 119544 | /* VGATHERPF1DPDm */ |
| 119545 | VK8WM, vy64xmem, |
| 119546 | /* VGATHERPF1DPSm */ |
| 119547 | VK16WM, vz32mem, |
| 119548 | /* VGATHERPF1QPDm */ |
| 119549 | VK8WM, vz64mem, |
| 119550 | /* VGATHERPF1QPSm */ |
| 119551 | VK8WM, vz32mem, |
| 119552 | /* VGATHERQPDYrm */ |
| 119553 | VR256, VR256, VR256, vy64mem, VR256, |
| 119554 | /* VGATHERQPDZ128rm */ |
| 119555 | VR128X, VK2WM, VR128X, VK2WM, vx64xmem, |
| 119556 | /* VGATHERQPDZ256rm */ |
| 119557 | VR256X, VK4WM, VR256X, VK4WM, vy64xmem, |
| 119558 | /* VGATHERQPDZrm */ |
| 119559 | VR512, VK8WM, VR512, VK8WM, vz64mem, |
| 119560 | /* VGATHERQPDrm */ |
| 119561 | VR128, VR128, VR128, vx64mem, VR128, |
| 119562 | /* VGATHERQPSYrm */ |
| 119563 | VR128, VR128, VR128, vy32mem, VR128, |
| 119564 | /* VGATHERQPSZ128rm */ |
| 119565 | VR128X, VK2WM, VR128X, VK2WM, vx32xmem, |
| 119566 | /* VGATHERQPSZ256rm */ |
| 119567 | VR128X, VK4WM, VR128X, VK4WM, vy32xmem, |
| 119568 | /* VGATHERQPSZrm */ |
| 119569 | VR256X, VK8WM, VR256X, VK8WM, vz32mem, |
| 119570 | /* VGATHERQPSrm */ |
| 119571 | VR128, VR128, VR128, vx32mem, VR128, |
| 119572 | /* VGETEXPBF16Z128m */ |
| 119573 | VR128X, f128mem, |
| 119574 | /* VGETEXPBF16Z128mb */ |
| 119575 | VR128X, f16mem, |
| 119576 | /* VGETEXPBF16Z128mbk */ |
| 119577 | VR128X, VR128X, VK8WM, f16mem, |
| 119578 | /* VGETEXPBF16Z128mbkz */ |
| 119579 | VR128X, VK8WM, f16mem, |
| 119580 | /* VGETEXPBF16Z128mk */ |
| 119581 | VR128X, VR128X, VK8WM, f128mem, |
| 119582 | /* VGETEXPBF16Z128mkz */ |
| 119583 | VR128X, VK8WM, f128mem, |
| 119584 | /* VGETEXPBF16Z128r */ |
| 119585 | VR128X, VR128X, |
| 119586 | /* VGETEXPBF16Z128rk */ |
| 119587 | VR128X, VR128X, VK8WM, VR128X, |
| 119588 | /* VGETEXPBF16Z128rkz */ |
| 119589 | VR128X, VK8WM, VR128X, |
| 119590 | /* VGETEXPBF16Z256m */ |
| 119591 | VR256X, f256mem, |
| 119592 | /* VGETEXPBF16Z256mb */ |
| 119593 | VR256X, f16mem, |
| 119594 | /* VGETEXPBF16Z256mbk */ |
| 119595 | VR256X, VR256X, VK16WM, f16mem, |
| 119596 | /* VGETEXPBF16Z256mbkz */ |
| 119597 | VR256X, VK16WM, f16mem, |
| 119598 | /* VGETEXPBF16Z256mk */ |
| 119599 | VR256X, VR256X, VK16WM, f256mem, |
| 119600 | /* VGETEXPBF16Z256mkz */ |
| 119601 | VR256X, VK16WM, f256mem, |
| 119602 | /* VGETEXPBF16Z256r */ |
| 119603 | VR256X, VR256X, |
| 119604 | /* VGETEXPBF16Z256rk */ |
| 119605 | VR256X, VR256X, VK16WM, VR256X, |
| 119606 | /* VGETEXPBF16Z256rkz */ |
| 119607 | VR256X, VK16WM, VR256X, |
| 119608 | /* VGETEXPBF16Zm */ |
| 119609 | VR512, f512mem, |
| 119610 | /* VGETEXPBF16Zmb */ |
| 119611 | VR512, f16mem, |
| 119612 | /* VGETEXPBF16Zmbk */ |
| 119613 | VR512, VR512, VK32WM, f16mem, |
| 119614 | /* VGETEXPBF16Zmbkz */ |
| 119615 | VR512, VK32WM, f16mem, |
| 119616 | /* VGETEXPBF16Zmk */ |
| 119617 | VR512, VR512, VK32WM, f512mem, |
| 119618 | /* VGETEXPBF16Zmkz */ |
| 119619 | VR512, VK32WM, f512mem, |
| 119620 | /* VGETEXPBF16Zr */ |
| 119621 | VR512, VR512, |
| 119622 | /* VGETEXPBF16Zrk */ |
| 119623 | VR512, VR512, VK32WM, VR512, |
| 119624 | /* VGETEXPBF16Zrkz */ |
| 119625 | VR512, VK32WM, VR512, |
| 119626 | /* VGETEXPPDZ128m */ |
| 119627 | VR128X, f128mem, |
| 119628 | /* VGETEXPPDZ128mb */ |
| 119629 | VR128X, f64mem, |
| 119630 | /* VGETEXPPDZ128mbk */ |
| 119631 | VR128X, VR128X, VK2WM, f64mem, |
| 119632 | /* VGETEXPPDZ128mbkz */ |
| 119633 | VR128X, VK2WM, f64mem, |
| 119634 | /* VGETEXPPDZ128mk */ |
| 119635 | VR128X, VR128X, VK2WM, f128mem, |
| 119636 | /* VGETEXPPDZ128mkz */ |
| 119637 | VR128X, VK2WM, f128mem, |
| 119638 | /* VGETEXPPDZ128r */ |
| 119639 | VR128X, VR128X, |
| 119640 | /* VGETEXPPDZ128rk */ |
| 119641 | VR128X, VR128X, VK2WM, VR128X, |
| 119642 | /* VGETEXPPDZ128rkz */ |
| 119643 | VR128X, VK2WM, VR128X, |
| 119644 | /* VGETEXPPDZ256m */ |
| 119645 | VR256X, f256mem, |
| 119646 | /* VGETEXPPDZ256mb */ |
| 119647 | VR256X, f64mem, |
| 119648 | /* VGETEXPPDZ256mbk */ |
| 119649 | VR256X, VR256X, VK4WM, f64mem, |
| 119650 | /* VGETEXPPDZ256mbkz */ |
| 119651 | VR256X, VK4WM, f64mem, |
| 119652 | /* VGETEXPPDZ256mk */ |
| 119653 | VR256X, VR256X, VK4WM, f256mem, |
| 119654 | /* VGETEXPPDZ256mkz */ |
| 119655 | VR256X, VK4WM, f256mem, |
| 119656 | /* VGETEXPPDZ256r */ |
| 119657 | VR256X, VR256X, |
| 119658 | /* VGETEXPPDZ256rk */ |
| 119659 | VR256X, VR256X, VK4WM, VR256X, |
| 119660 | /* VGETEXPPDZ256rkz */ |
| 119661 | VR256X, VK4WM, VR256X, |
| 119662 | /* VGETEXPPDZm */ |
| 119663 | VR512, f512mem, |
| 119664 | /* VGETEXPPDZmb */ |
| 119665 | VR512, f64mem, |
| 119666 | /* VGETEXPPDZmbk */ |
| 119667 | VR512, VR512, VK8WM, f64mem, |
| 119668 | /* VGETEXPPDZmbkz */ |
| 119669 | VR512, VK8WM, f64mem, |
| 119670 | /* VGETEXPPDZmk */ |
| 119671 | VR512, VR512, VK8WM, f512mem, |
| 119672 | /* VGETEXPPDZmkz */ |
| 119673 | VR512, VK8WM, f512mem, |
| 119674 | /* VGETEXPPDZr */ |
| 119675 | VR512, VR512, |
| 119676 | /* VGETEXPPDZrb */ |
| 119677 | VR512, VR512, |
| 119678 | /* VGETEXPPDZrbk */ |
| 119679 | VR512, VR512, VK8WM, VR512, |
| 119680 | /* VGETEXPPDZrbkz */ |
| 119681 | VR512, VK8WM, VR512, |
| 119682 | /* VGETEXPPDZrk */ |
| 119683 | VR512, VR512, VK8WM, VR512, |
| 119684 | /* VGETEXPPDZrkz */ |
| 119685 | VR512, VK8WM, VR512, |
| 119686 | /* VGETEXPPHZ128m */ |
| 119687 | VR128X, f128mem, |
| 119688 | /* VGETEXPPHZ128mb */ |
| 119689 | VR128X, f16mem, |
| 119690 | /* VGETEXPPHZ128mbk */ |
| 119691 | VR128X, VR128X, VK8WM, f16mem, |
| 119692 | /* VGETEXPPHZ128mbkz */ |
| 119693 | VR128X, VK8WM, f16mem, |
| 119694 | /* VGETEXPPHZ128mk */ |
| 119695 | VR128X, VR128X, VK8WM, f128mem, |
| 119696 | /* VGETEXPPHZ128mkz */ |
| 119697 | VR128X, VK8WM, f128mem, |
| 119698 | /* VGETEXPPHZ128r */ |
| 119699 | VR128X, VR128X, |
| 119700 | /* VGETEXPPHZ128rk */ |
| 119701 | VR128X, VR128X, VK8WM, VR128X, |
| 119702 | /* VGETEXPPHZ128rkz */ |
| 119703 | VR128X, VK8WM, VR128X, |
| 119704 | /* VGETEXPPHZ256m */ |
| 119705 | VR256X, f256mem, |
| 119706 | /* VGETEXPPHZ256mb */ |
| 119707 | VR256X, f16mem, |
| 119708 | /* VGETEXPPHZ256mbk */ |
| 119709 | VR256X, VR256X, VK16WM, f16mem, |
| 119710 | /* VGETEXPPHZ256mbkz */ |
| 119711 | VR256X, VK16WM, f16mem, |
| 119712 | /* VGETEXPPHZ256mk */ |
| 119713 | VR256X, VR256X, VK16WM, f256mem, |
| 119714 | /* VGETEXPPHZ256mkz */ |
| 119715 | VR256X, VK16WM, f256mem, |
| 119716 | /* VGETEXPPHZ256r */ |
| 119717 | VR256X, VR256X, |
| 119718 | /* VGETEXPPHZ256rk */ |
| 119719 | VR256X, VR256X, VK16WM, VR256X, |
| 119720 | /* VGETEXPPHZ256rkz */ |
| 119721 | VR256X, VK16WM, VR256X, |
| 119722 | /* VGETEXPPHZm */ |
| 119723 | VR512, f512mem, |
| 119724 | /* VGETEXPPHZmb */ |
| 119725 | VR512, f16mem, |
| 119726 | /* VGETEXPPHZmbk */ |
| 119727 | VR512, VR512, VK32WM, f16mem, |
| 119728 | /* VGETEXPPHZmbkz */ |
| 119729 | VR512, VK32WM, f16mem, |
| 119730 | /* VGETEXPPHZmk */ |
| 119731 | VR512, VR512, VK32WM, f512mem, |
| 119732 | /* VGETEXPPHZmkz */ |
| 119733 | VR512, VK32WM, f512mem, |
| 119734 | /* VGETEXPPHZr */ |
| 119735 | VR512, VR512, |
| 119736 | /* VGETEXPPHZrb */ |
| 119737 | VR512, VR512, |
| 119738 | /* VGETEXPPHZrbk */ |
| 119739 | VR512, VR512, VK32WM, VR512, |
| 119740 | /* VGETEXPPHZrbkz */ |
| 119741 | VR512, VK32WM, VR512, |
| 119742 | /* VGETEXPPHZrk */ |
| 119743 | VR512, VR512, VK32WM, VR512, |
| 119744 | /* VGETEXPPHZrkz */ |
| 119745 | VR512, VK32WM, VR512, |
| 119746 | /* VGETEXPPSZ128m */ |
| 119747 | VR128X, f128mem, |
| 119748 | /* VGETEXPPSZ128mb */ |
| 119749 | VR128X, f32mem, |
| 119750 | /* VGETEXPPSZ128mbk */ |
| 119751 | VR128X, VR128X, VK4WM, f32mem, |
| 119752 | /* VGETEXPPSZ128mbkz */ |
| 119753 | VR128X, VK4WM, f32mem, |
| 119754 | /* VGETEXPPSZ128mk */ |
| 119755 | VR128X, VR128X, VK4WM, f128mem, |
| 119756 | /* VGETEXPPSZ128mkz */ |
| 119757 | VR128X, VK4WM, f128mem, |
| 119758 | /* VGETEXPPSZ128r */ |
| 119759 | VR128X, VR128X, |
| 119760 | /* VGETEXPPSZ128rk */ |
| 119761 | VR128X, VR128X, VK4WM, VR128X, |
| 119762 | /* VGETEXPPSZ128rkz */ |
| 119763 | VR128X, VK4WM, VR128X, |
| 119764 | /* VGETEXPPSZ256m */ |
| 119765 | VR256X, f256mem, |
| 119766 | /* VGETEXPPSZ256mb */ |
| 119767 | VR256X, f32mem, |
| 119768 | /* VGETEXPPSZ256mbk */ |
| 119769 | VR256X, VR256X, VK8WM, f32mem, |
| 119770 | /* VGETEXPPSZ256mbkz */ |
| 119771 | VR256X, VK8WM, f32mem, |
| 119772 | /* VGETEXPPSZ256mk */ |
| 119773 | VR256X, VR256X, VK8WM, f256mem, |
| 119774 | /* VGETEXPPSZ256mkz */ |
| 119775 | VR256X, VK8WM, f256mem, |
| 119776 | /* VGETEXPPSZ256r */ |
| 119777 | VR256X, VR256X, |
| 119778 | /* VGETEXPPSZ256rk */ |
| 119779 | VR256X, VR256X, VK8WM, VR256X, |
| 119780 | /* VGETEXPPSZ256rkz */ |
| 119781 | VR256X, VK8WM, VR256X, |
| 119782 | /* VGETEXPPSZm */ |
| 119783 | VR512, f512mem, |
| 119784 | /* VGETEXPPSZmb */ |
| 119785 | VR512, f32mem, |
| 119786 | /* VGETEXPPSZmbk */ |
| 119787 | VR512, VR512, VK16WM, f32mem, |
| 119788 | /* VGETEXPPSZmbkz */ |
| 119789 | VR512, VK16WM, f32mem, |
| 119790 | /* VGETEXPPSZmk */ |
| 119791 | VR512, VR512, VK16WM, f512mem, |
| 119792 | /* VGETEXPPSZmkz */ |
| 119793 | VR512, VK16WM, f512mem, |
| 119794 | /* VGETEXPPSZr */ |
| 119795 | VR512, VR512, |
| 119796 | /* VGETEXPPSZrb */ |
| 119797 | VR512, VR512, |
| 119798 | /* VGETEXPPSZrbk */ |
| 119799 | VR512, VR512, VK16WM, VR512, |
| 119800 | /* VGETEXPPSZrbkz */ |
| 119801 | VR512, VK16WM, VR512, |
| 119802 | /* VGETEXPPSZrk */ |
| 119803 | VR512, VR512, VK16WM, VR512, |
| 119804 | /* VGETEXPPSZrkz */ |
| 119805 | VR512, VK16WM, VR512, |
| 119806 | /* VGETEXPSDZm */ |
| 119807 | VR128X, VR128X, sdmem, |
| 119808 | /* VGETEXPSDZmk */ |
| 119809 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 119810 | /* VGETEXPSDZmkz */ |
| 119811 | VR128X, VK1WM, VR128X, sdmem, |
| 119812 | /* VGETEXPSDZr */ |
| 119813 | VR128X, VR128X, VR128X, |
| 119814 | /* VGETEXPSDZrb */ |
| 119815 | VR128X, VR128X, VR128X, |
| 119816 | /* VGETEXPSDZrbk */ |
| 119817 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119818 | /* VGETEXPSDZrbkz */ |
| 119819 | VR128X, VK1WM, VR128X, VR128X, |
| 119820 | /* VGETEXPSDZrk */ |
| 119821 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119822 | /* VGETEXPSDZrkz */ |
| 119823 | VR128X, VK1WM, VR128X, VR128X, |
| 119824 | /* VGETEXPSHZm */ |
| 119825 | VR128X, VR128X, shmem, |
| 119826 | /* VGETEXPSHZmk */ |
| 119827 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 119828 | /* VGETEXPSHZmkz */ |
| 119829 | VR128X, VK1WM, VR128X, shmem, |
| 119830 | /* VGETEXPSHZr */ |
| 119831 | VR128X, VR128X, VR128X, |
| 119832 | /* VGETEXPSHZrb */ |
| 119833 | VR128X, VR128X, VR128X, |
| 119834 | /* VGETEXPSHZrbk */ |
| 119835 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119836 | /* VGETEXPSHZrbkz */ |
| 119837 | VR128X, VK1WM, VR128X, VR128X, |
| 119838 | /* VGETEXPSHZrk */ |
| 119839 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119840 | /* VGETEXPSHZrkz */ |
| 119841 | VR128X, VK1WM, VR128X, VR128X, |
| 119842 | /* VGETEXPSSZm */ |
| 119843 | VR128X, VR128X, ssmem, |
| 119844 | /* VGETEXPSSZmk */ |
| 119845 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 119846 | /* VGETEXPSSZmkz */ |
| 119847 | VR128X, VK1WM, VR128X, ssmem, |
| 119848 | /* VGETEXPSSZr */ |
| 119849 | VR128X, VR128X, VR128X, |
| 119850 | /* VGETEXPSSZrb */ |
| 119851 | VR128X, VR128X, VR128X, |
| 119852 | /* VGETEXPSSZrbk */ |
| 119853 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119854 | /* VGETEXPSSZrbkz */ |
| 119855 | VR128X, VK1WM, VR128X, VR128X, |
| 119856 | /* VGETEXPSSZrk */ |
| 119857 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119858 | /* VGETEXPSSZrkz */ |
| 119859 | VR128X, VK1WM, VR128X, VR128X, |
| 119860 | /* VGETMANTBF16Z128rmbi */ |
| 119861 | VR128X, f16mem, i32u8imm, |
| 119862 | /* VGETMANTBF16Z128rmbik */ |
| 119863 | VR128X, VR128X, VK8WM, f16mem, i32u8imm, |
| 119864 | /* VGETMANTBF16Z128rmbikz */ |
| 119865 | VR128X, VK8WM, f16mem, i32u8imm, |
| 119866 | /* VGETMANTBF16Z128rmi */ |
| 119867 | VR128X, f128mem, i32u8imm, |
| 119868 | /* VGETMANTBF16Z128rmik */ |
| 119869 | VR128X, VR128X, VK8WM, f128mem, i32u8imm, |
| 119870 | /* VGETMANTBF16Z128rmikz */ |
| 119871 | VR128X, VK8WM, f128mem, i32u8imm, |
| 119872 | /* VGETMANTBF16Z128rri */ |
| 119873 | VR128X, VR128X, i32u8imm, |
| 119874 | /* VGETMANTBF16Z128rrik */ |
| 119875 | VR128X, VR128X, VK8WM, VR128X, i32u8imm, |
| 119876 | /* VGETMANTBF16Z128rrikz */ |
| 119877 | VR128X, VK8WM, VR128X, i32u8imm, |
| 119878 | /* VGETMANTBF16Z256rmbi */ |
| 119879 | VR256X, f16mem, i32u8imm, |
| 119880 | /* VGETMANTBF16Z256rmbik */ |
| 119881 | VR256X, VR256X, VK16WM, f16mem, i32u8imm, |
| 119882 | /* VGETMANTBF16Z256rmbikz */ |
| 119883 | VR256X, VK16WM, f16mem, i32u8imm, |
| 119884 | /* VGETMANTBF16Z256rmi */ |
| 119885 | VR256X, f256mem, i32u8imm, |
| 119886 | /* VGETMANTBF16Z256rmik */ |
| 119887 | VR256X, VR256X, VK16WM, f256mem, i32u8imm, |
| 119888 | /* VGETMANTBF16Z256rmikz */ |
| 119889 | VR256X, VK16WM, f256mem, i32u8imm, |
| 119890 | /* VGETMANTBF16Z256rri */ |
| 119891 | VR256X, VR256X, i32u8imm, |
| 119892 | /* VGETMANTBF16Z256rrik */ |
| 119893 | VR256X, VR256X, VK16WM, VR256X, i32u8imm, |
| 119894 | /* VGETMANTBF16Z256rrikz */ |
| 119895 | VR256X, VK16WM, VR256X, i32u8imm, |
| 119896 | /* VGETMANTBF16Zrmbi */ |
| 119897 | VR512, f16mem, i32u8imm, |
| 119898 | /* VGETMANTBF16Zrmbik */ |
| 119899 | VR512, VR512, VK32WM, f16mem, i32u8imm, |
| 119900 | /* VGETMANTBF16Zrmbikz */ |
| 119901 | VR512, VK32WM, f16mem, i32u8imm, |
| 119902 | /* VGETMANTBF16Zrmi */ |
| 119903 | VR512, f512mem, i32u8imm, |
| 119904 | /* VGETMANTBF16Zrmik */ |
| 119905 | VR512, VR512, VK32WM, f512mem, i32u8imm, |
| 119906 | /* VGETMANTBF16Zrmikz */ |
| 119907 | VR512, VK32WM, f512mem, i32u8imm, |
| 119908 | /* VGETMANTBF16Zrri */ |
| 119909 | VR512, VR512, i32u8imm, |
| 119910 | /* VGETMANTBF16Zrrik */ |
| 119911 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 119912 | /* VGETMANTBF16Zrrikz */ |
| 119913 | VR512, VK32WM, VR512, i32u8imm, |
| 119914 | /* VGETMANTPDZ128rmbi */ |
| 119915 | VR128X, f64mem, i32u8imm, |
| 119916 | /* VGETMANTPDZ128rmbik */ |
| 119917 | VR128X, VR128X, VK2WM, f64mem, i32u8imm, |
| 119918 | /* VGETMANTPDZ128rmbikz */ |
| 119919 | VR128X, VK2WM, f64mem, i32u8imm, |
| 119920 | /* VGETMANTPDZ128rmi */ |
| 119921 | VR128X, f128mem, i32u8imm, |
| 119922 | /* VGETMANTPDZ128rmik */ |
| 119923 | VR128X, VR128X, VK2WM, f128mem, i32u8imm, |
| 119924 | /* VGETMANTPDZ128rmikz */ |
| 119925 | VR128X, VK2WM, f128mem, i32u8imm, |
| 119926 | /* VGETMANTPDZ128rri */ |
| 119927 | VR128X, VR128X, i32u8imm, |
| 119928 | /* VGETMANTPDZ128rrik */ |
| 119929 | VR128X, VR128X, VK2WM, VR128X, i32u8imm, |
| 119930 | /* VGETMANTPDZ128rrikz */ |
| 119931 | VR128X, VK2WM, VR128X, i32u8imm, |
| 119932 | /* VGETMANTPDZ256rmbi */ |
| 119933 | VR256X, f64mem, i32u8imm, |
| 119934 | /* VGETMANTPDZ256rmbik */ |
| 119935 | VR256X, VR256X, VK4WM, f64mem, i32u8imm, |
| 119936 | /* VGETMANTPDZ256rmbikz */ |
| 119937 | VR256X, VK4WM, f64mem, i32u8imm, |
| 119938 | /* VGETMANTPDZ256rmi */ |
| 119939 | VR256X, f256mem, i32u8imm, |
| 119940 | /* VGETMANTPDZ256rmik */ |
| 119941 | VR256X, VR256X, VK4WM, f256mem, i32u8imm, |
| 119942 | /* VGETMANTPDZ256rmikz */ |
| 119943 | VR256X, VK4WM, f256mem, i32u8imm, |
| 119944 | /* VGETMANTPDZ256rri */ |
| 119945 | VR256X, VR256X, i32u8imm, |
| 119946 | /* VGETMANTPDZ256rrik */ |
| 119947 | VR256X, VR256X, VK4WM, VR256X, i32u8imm, |
| 119948 | /* VGETMANTPDZ256rrikz */ |
| 119949 | VR256X, VK4WM, VR256X, i32u8imm, |
| 119950 | /* VGETMANTPDZrmbi */ |
| 119951 | VR512, f64mem, i32u8imm, |
| 119952 | /* VGETMANTPDZrmbik */ |
| 119953 | VR512, VR512, VK8WM, f64mem, i32u8imm, |
| 119954 | /* VGETMANTPDZrmbikz */ |
| 119955 | VR512, VK8WM, f64mem, i32u8imm, |
| 119956 | /* VGETMANTPDZrmi */ |
| 119957 | VR512, f512mem, i32u8imm, |
| 119958 | /* VGETMANTPDZrmik */ |
| 119959 | VR512, VR512, VK8WM, f512mem, i32u8imm, |
| 119960 | /* VGETMANTPDZrmikz */ |
| 119961 | VR512, VK8WM, f512mem, i32u8imm, |
| 119962 | /* VGETMANTPDZrri */ |
| 119963 | VR512, VR512, i32u8imm, |
| 119964 | /* VGETMANTPDZrrib */ |
| 119965 | VR512, VR512, i32u8imm, |
| 119966 | /* VGETMANTPDZrribk */ |
| 119967 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 119968 | /* VGETMANTPDZrribkz */ |
| 119969 | VR512, VK8WM, VR512, i32u8imm, |
| 119970 | /* VGETMANTPDZrrik */ |
| 119971 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 119972 | /* VGETMANTPDZrrikz */ |
| 119973 | VR512, VK8WM, VR512, i32u8imm, |
| 119974 | /* VGETMANTPHZ128rmbi */ |
| 119975 | VR128X, f16mem, i32u8imm, |
| 119976 | /* VGETMANTPHZ128rmbik */ |
| 119977 | VR128X, VR128X, VK8WM, f16mem, i32u8imm, |
| 119978 | /* VGETMANTPHZ128rmbikz */ |
| 119979 | VR128X, VK8WM, f16mem, i32u8imm, |
| 119980 | /* VGETMANTPHZ128rmi */ |
| 119981 | VR128X, f128mem, i32u8imm, |
| 119982 | /* VGETMANTPHZ128rmik */ |
| 119983 | VR128X, VR128X, VK8WM, f128mem, i32u8imm, |
| 119984 | /* VGETMANTPHZ128rmikz */ |
| 119985 | VR128X, VK8WM, f128mem, i32u8imm, |
| 119986 | /* VGETMANTPHZ128rri */ |
| 119987 | VR128X, VR128X, i32u8imm, |
| 119988 | /* VGETMANTPHZ128rrik */ |
| 119989 | VR128X, VR128X, VK8WM, VR128X, i32u8imm, |
| 119990 | /* VGETMANTPHZ128rrikz */ |
| 119991 | VR128X, VK8WM, VR128X, i32u8imm, |
| 119992 | /* VGETMANTPHZ256rmbi */ |
| 119993 | VR256X, f16mem, i32u8imm, |
| 119994 | /* VGETMANTPHZ256rmbik */ |
| 119995 | VR256X, VR256X, VK16WM, f16mem, i32u8imm, |
| 119996 | /* VGETMANTPHZ256rmbikz */ |
| 119997 | VR256X, VK16WM, f16mem, i32u8imm, |
| 119998 | /* VGETMANTPHZ256rmi */ |
| 119999 | VR256X, f256mem, i32u8imm, |
| 120000 | /* VGETMANTPHZ256rmik */ |
| 120001 | VR256X, VR256X, VK16WM, f256mem, i32u8imm, |
| 120002 | /* VGETMANTPHZ256rmikz */ |
| 120003 | VR256X, VK16WM, f256mem, i32u8imm, |
| 120004 | /* VGETMANTPHZ256rri */ |
| 120005 | VR256X, VR256X, i32u8imm, |
| 120006 | /* VGETMANTPHZ256rrik */ |
| 120007 | VR256X, VR256X, VK16WM, VR256X, i32u8imm, |
| 120008 | /* VGETMANTPHZ256rrikz */ |
| 120009 | VR256X, VK16WM, VR256X, i32u8imm, |
| 120010 | /* VGETMANTPHZrmbi */ |
| 120011 | VR512, f16mem, i32u8imm, |
| 120012 | /* VGETMANTPHZrmbik */ |
| 120013 | VR512, VR512, VK32WM, f16mem, i32u8imm, |
| 120014 | /* VGETMANTPHZrmbikz */ |
| 120015 | VR512, VK32WM, f16mem, i32u8imm, |
| 120016 | /* VGETMANTPHZrmi */ |
| 120017 | VR512, f512mem, i32u8imm, |
| 120018 | /* VGETMANTPHZrmik */ |
| 120019 | VR512, VR512, VK32WM, f512mem, i32u8imm, |
| 120020 | /* VGETMANTPHZrmikz */ |
| 120021 | VR512, VK32WM, f512mem, i32u8imm, |
| 120022 | /* VGETMANTPHZrri */ |
| 120023 | VR512, VR512, i32u8imm, |
| 120024 | /* VGETMANTPHZrrib */ |
| 120025 | VR512, VR512, i32u8imm, |
| 120026 | /* VGETMANTPHZrribk */ |
| 120027 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 120028 | /* VGETMANTPHZrribkz */ |
| 120029 | VR512, VK32WM, VR512, i32u8imm, |
| 120030 | /* VGETMANTPHZrrik */ |
| 120031 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 120032 | /* VGETMANTPHZrrikz */ |
| 120033 | VR512, VK32WM, VR512, i32u8imm, |
| 120034 | /* VGETMANTPSZ128rmbi */ |
| 120035 | VR128X, f32mem, i32u8imm, |
| 120036 | /* VGETMANTPSZ128rmbik */ |
| 120037 | VR128X, VR128X, VK4WM, f32mem, i32u8imm, |
| 120038 | /* VGETMANTPSZ128rmbikz */ |
| 120039 | VR128X, VK4WM, f32mem, i32u8imm, |
| 120040 | /* VGETMANTPSZ128rmi */ |
| 120041 | VR128X, f128mem, i32u8imm, |
| 120042 | /* VGETMANTPSZ128rmik */ |
| 120043 | VR128X, VR128X, VK4WM, f128mem, i32u8imm, |
| 120044 | /* VGETMANTPSZ128rmikz */ |
| 120045 | VR128X, VK4WM, f128mem, i32u8imm, |
| 120046 | /* VGETMANTPSZ128rri */ |
| 120047 | VR128X, VR128X, i32u8imm, |
| 120048 | /* VGETMANTPSZ128rrik */ |
| 120049 | VR128X, VR128X, VK4WM, VR128X, i32u8imm, |
| 120050 | /* VGETMANTPSZ128rrikz */ |
| 120051 | VR128X, VK4WM, VR128X, i32u8imm, |
| 120052 | /* VGETMANTPSZ256rmbi */ |
| 120053 | VR256X, f32mem, i32u8imm, |
| 120054 | /* VGETMANTPSZ256rmbik */ |
| 120055 | VR256X, VR256X, VK8WM, f32mem, i32u8imm, |
| 120056 | /* VGETMANTPSZ256rmbikz */ |
| 120057 | VR256X, VK8WM, f32mem, i32u8imm, |
| 120058 | /* VGETMANTPSZ256rmi */ |
| 120059 | VR256X, f256mem, i32u8imm, |
| 120060 | /* VGETMANTPSZ256rmik */ |
| 120061 | VR256X, VR256X, VK8WM, f256mem, i32u8imm, |
| 120062 | /* VGETMANTPSZ256rmikz */ |
| 120063 | VR256X, VK8WM, f256mem, i32u8imm, |
| 120064 | /* VGETMANTPSZ256rri */ |
| 120065 | VR256X, VR256X, i32u8imm, |
| 120066 | /* VGETMANTPSZ256rrik */ |
| 120067 | VR256X, VR256X, VK8WM, VR256X, i32u8imm, |
| 120068 | /* VGETMANTPSZ256rrikz */ |
| 120069 | VR256X, VK8WM, VR256X, i32u8imm, |
| 120070 | /* VGETMANTPSZrmbi */ |
| 120071 | VR512, f32mem, i32u8imm, |
| 120072 | /* VGETMANTPSZrmbik */ |
| 120073 | VR512, VR512, VK16WM, f32mem, i32u8imm, |
| 120074 | /* VGETMANTPSZrmbikz */ |
| 120075 | VR512, VK16WM, f32mem, i32u8imm, |
| 120076 | /* VGETMANTPSZrmi */ |
| 120077 | VR512, f512mem, i32u8imm, |
| 120078 | /* VGETMANTPSZrmik */ |
| 120079 | VR512, VR512, VK16WM, f512mem, i32u8imm, |
| 120080 | /* VGETMANTPSZrmikz */ |
| 120081 | VR512, VK16WM, f512mem, i32u8imm, |
| 120082 | /* VGETMANTPSZrri */ |
| 120083 | VR512, VR512, i32u8imm, |
| 120084 | /* VGETMANTPSZrrib */ |
| 120085 | VR512, VR512, i32u8imm, |
| 120086 | /* VGETMANTPSZrribk */ |
| 120087 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 120088 | /* VGETMANTPSZrribkz */ |
| 120089 | VR512, VK16WM, VR512, i32u8imm, |
| 120090 | /* VGETMANTPSZrrik */ |
| 120091 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 120092 | /* VGETMANTPSZrrikz */ |
| 120093 | VR512, VK16WM, VR512, i32u8imm, |
| 120094 | /* VGETMANTSDZrmi */ |
| 120095 | VR128X, VR128X, sdmem, i32u8imm, |
| 120096 | /* VGETMANTSDZrmik */ |
| 120097 | VR128X, VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 120098 | /* VGETMANTSDZrmikz */ |
| 120099 | VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 120100 | /* VGETMANTSDZrri */ |
| 120101 | VR128X, VR128X, VR128X, i32u8imm, |
| 120102 | /* VGETMANTSDZrrib */ |
| 120103 | VR128X, VR128X, VR128X, i32u8imm, |
| 120104 | /* VGETMANTSDZrribk */ |
| 120105 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120106 | /* VGETMANTSDZrribkz */ |
| 120107 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120108 | /* VGETMANTSDZrrik */ |
| 120109 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120110 | /* VGETMANTSDZrrikz */ |
| 120111 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120112 | /* VGETMANTSHZrmi */ |
| 120113 | VR128X, VR128X, shmem, i32u8imm, |
| 120114 | /* VGETMANTSHZrmik */ |
| 120115 | VR128X, VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 120116 | /* VGETMANTSHZrmikz */ |
| 120117 | VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 120118 | /* VGETMANTSHZrri */ |
| 120119 | VR128X, VR128X, VR128X, i32u8imm, |
| 120120 | /* VGETMANTSHZrrib */ |
| 120121 | VR128X, VR128X, VR128X, i32u8imm, |
| 120122 | /* VGETMANTSHZrribk */ |
| 120123 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120124 | /* VGETMANTSHZrribkz */ |
| 120125 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120126 | /* VGETMANTSHZrrik */ |
| 120127 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120128 | /* VGETMANTSHZrrikz */ |
| 120129 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120130 | /* VGETMANTSSZrmi */ |
| 120131 | VR128X, VR128X, ssmem, i32u8imm, |
| 120132 | /* VGETMANTSSZrmik */ |
| 120133 | VR128X, VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 120134 | /* VGETMANTSSZrmikz */ |
| 120135 | VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 120136 | /* VGETMANTSSZrri */ |
| 120137 | VR128X, VR128X, VR128X, i32u8imm, |
| 120138 | /* VGETMANTSSZrrib */ |
| 120139 | VR128X, VR128X, VR128X, i32u8imm, |
| 120140 | /* VGETMANTSSZrribk */ |
| 120141 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120142 | /* VGETMANTSSZrribkz */ |
| 120143 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120144 | /* VGETMANTSSZrrik */ |
| 120145 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120146 | /* VGETMANTSSZrrikz */ |
| 120147 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120148 | /* VGF2P8AFFINEINVQBYrmi */ |
| 120149 | VR256, VR256, i256mem, u8imm, |
| 120150 | /* VGF2P8AFFINEINVQBYrri */ |
| 120151 | VR256, VR256, VR256, u8imm, |
| 120152 | /* VGF2P8AFFINEINVQBZ128rmbi */ |
| 120153 | VR128X, VR128X, i64mem, u8imm, |
| 120154 | /* VGF2P8AFFINEINVQBZ128rmbik */ |
| 120155 | VR128X, VR128X, VK16WM, VR128X, i64mem, u8imm, |
| 120156 | /* VGF2P8AFFINEINVQBZ128rmbikz */ |
| 120157 | VR128X, VK16WM, VR128X, i64mem, u8imm, |
| 120158 | /* VGF2P8AFFINEINVQBZ128rmi */ |
| 120159 | VR128X, VR128X, i128mem, u8imm, |
| 120160 | /* VGF2P8AFFINEINVQBZ128rmik */ |
| 120161 | VR128X, VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 120162 | /* VGF2P8AFFINEINVQBZ128rmikz */ |
| 120163 | VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 120164 | /* VGF2P8AFFINEINVQBZ128rri */ |
| 120165 | VR128X, VR128X, VR128X, u8imm, |
| 120166 | /* VGF2P8AFFINEINVQBZ128rrik */ |
| 120167 | VR128X, VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 120168 | /* VGF2P8AFFINEINVQBZ128rrikz */ |
| 120169 | VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 120170 | /* VGF2P8AFFINEINVQBZ256rmbi */ |
| 120171 | VR256X, VR256X, i64mem, u8imm, |
| 120172 | /* VGF2P8AFFINEINVQBZ256rmbik */ |
| 120173 | VR256X, VR256X, VK32WM, VR256X, i64mem, u8imm, |
| 120174 | /* VGF2P8AFFINEINVQBZ256rmbikz */ |
| 120175 | VR256X, VK32WM, VR256X, i64mem, u8imm, |
| 120176 | /* VGF2P8AFFINEINVQBZ256rmi */ |
| 120177 | VR256X, VR256X, i256mem, u8imm, |
| 120178 | /* VGF2P8AFFINEINVQBZ256rmik */ |
| 120179 | VR256X, VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 120180 | /* VGF2P8AFFINEINVQBZ256rmikz */ |
| 120181 | VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 120182 | /* VGF2P8AFFINEINVQBZ256rri */ |
| 120183 | VR256X, VR256X, VR256X, u8imm, |
| 120184 | /* VGF2P8AFFINEINVQBZ256rrik */ |
| 120185 | VR256X, VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 120186 | /* VGF2P8AFFINEINVQBZ256rrikz */ |
| 120187 | VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 120188 | /* VGF2P8AFFINEINVQBZrmbi */ |
| 120189 | VR512, VR512, i64mem, u8imm, |
| 120190 | /* VGF2P8AFFINEINVQBZrmbik */ |
| 120191 | VR512, VR512, VK64WM, VR512, i64mem, u8imm, |
| 120192 | /* VGF2P8AFFINEINVQBZrmbikz */ |
| 120193 | VR512, VK64WM, VR512, i64mem, u8imm, |
| 120194 | /* VGF2P8AFFINEINVQBZrmi */ |
| 120195 | VR512, VR512, i512mem, u8imm, |
| 120196 | /* VGF2P8AFFINEINVQBZrmik */ |
| 120197 | VR512, VR512, VK64WM, VR512, i512mem, u8imm, |
| 120198 | /* VGF2P8AFFINEINVQBZrmikz */ |
| 120199 | VR512, VK64WM, VR512, i512mem, u8imm, |
| 120200 | /* VGF2P8AFFINEINVQBZrri */ |
| 120201 | VR512, VR512, VR512, u8imm, |
| 120202 | /* VGF2P8AFFINEINVQBZrrik */ |
| 120203 | VR512, VR512, VK64WM, VR512, VR512, u8imm, |
| 120204 | /* VGF2P8AFFINEINVQBZrrikz */ |
| 120205 | VR512, VK64WM, VR512, VR512, u8imm, |
| 120206 | /* VGF2P8AFFINEINVQBrmi */ |
| 120207 | VR128, VR128, i128mem, u8imm, |
| 120208 | /* VGF2P8AFFINEINVQBrri */ |
| 120209 | VR128, VR128, VR128, u8imm, |
| 120210 | /* VGF2P8AFFINEQBYrmi */ |
| 120211 | VR256, VR256, i256mem, u8imm, |
| 120212 | /* VGF2P8AFFINEQBYrri */ |
| 120213 | VR256, VR256, VR256, u8imm, |
| 120214 | /* VGF2P8AFFINEQBZ128rmbi */ |
| 120215 | VR128X, VR128X, i64mem, u8imm, |
| 120216 | /* VGF2P8AFFINEQBZ128rmbik */ |
| 120217 | VR128X, VR128X, VK16WM, VR128X, i64mem, u8imm, |
| 120218 | /* VGF2P8AFFINEQBZ128rmbikz */ |
| 120219 | VR128X, VK16WM, VR128X, i64mem, u8imm, |
| 120220 | /* VGF2P8AFFINEQBZ128rmi */ |
| 120221 | VR128X, VR128X, i128mem, u8imm, |
| 120222 | /* VGF2P8AFFINEQBZ128rmik */ |
| 120223 | VR128X, VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 120224 | /* VGF2P8AFFINEQBZ128rmikz */ |
| 120225 | VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 120226 | /* VGF2P8AFFINEQBZ128rri */ |
| 120227 | VR128X, VR128X, VR128X, u8imm, |
| 120228 | /* VGF2P8AFFINEQBZ128rrik */ |
| 120229 | VR128X, VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 120230 | /* VGF2P8AFFINEQBZ128rrikz */ |
| 120231 | VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 120232 | /* VGF2P8AFFINEQBZ256rmbi */ |
| 120233 | VR256X, VR256X, i64mem, u8imm, |
| 120234 | /* VGF2P8AFFINEQBZ256rmbik */ |
| 120235 | VR256X, VR256X, VK32WM, VR256X, i64mem, u8imm, |
| 120236 | /* VGF2P8AFFINEQBZ256rmbikz */ |
| 120237 | VR256X, VK32WM, VR256X, i64mem, u8imm, |
| 120238 | /* VGF2P8AFFINEQBZ256rmi */ |
| 120239 | VR256X, VR256X, i256mem, u8imm, |
| 120240 | /* VGF2P8AFFINEQBZ256rmik */ |
| 120241 | VR256X, VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 120242 | /* VGF2P8AFFINEQBZ256rmikz */ |
| 120243 | VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 120244 | /* VGF2P8AFFINEQBZ256rri */ |
| 120245 | VR256X, VR256X, VR256X, u8imm, |
| 120246 | /* VGF2P8AFFINEQBZ256rrik */ |
| 120247 | VR256X, VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 120248 | /* VGF2P8AFFINEQBZ256rrikz */ |
| 120249 | VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 120250 | /* VGF2P8AFFINEQBZrmbi */ |
| 120251 | VR512, VR512, i64mem, u8imm, |
| 120252 | /* VGF2P8AFFINEQBZrmbik */ |
| 120253 | VR512, VR512, VK64WM, VR512, i64mem, u8imm, |
| 120254 | /* VGF2P8AFFINEQBZrmbikz */ |
| 120255 | VR512, VK64WM, VR512, i64mem, u8imm, |
| 120256 | /* VGF2P8AFFINEQBZrmi */ |
| 120257 | VR512, VR512, i512mem, u8imm, |
| 120258 | /* VGF2P8AFFINEQBZrmik */ |
| 120259 | VR512, VR512, VK64WM, VR512, i512mem, u8imm, |
| 120260 | /* VGF2P8AFFINEQBZrmikz */ |
| 120261 | VR512, VK64WM, VR512, i512mem, u8imm, |
| 120262 | /* VGF2P8AFFINEQBZrri */ |
| 120263 | VR512, VR512, VR512, u8imm, |
| 120264 | /* VGF2P8AFFINEQBZrrik */ |
| 120265 | VR512, VR512, VK64WM, VR512, VR512, u8imm, |
| 120266 | /* VGF2P8AFFINEQBZrrikz */ |
| 120267 | VR512, VK64WM, VR512, VR512, u8imm, |
| 120268 | /* VGF2P8AFFINEQBrmi */ |
| 120269 | VR128, VR128, i128mem, u8imm, |
| 120270 | /* VGF2P8AFFINEQBrri */ |
| 120271 | VR128, VR128, VR128, u8imm, |
| 120272 | /* VGF2P8MULBYrm */ |
| 120273 | VR256, VR256, i256mem, |
| 120274 | /* VGF2P8MULBYrr */ |
| 120275 | VR256, VR256, VR256, |
| 120276 | /* VGF2P8MULBZ128rm */ |
| 120277 | VR128X, VR128X, i128mem, |
| 120278 | /* VGF2P8MULBZ128rmk */ |
| 120279 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 120280 | /* VGF2P8MULBZ128rmkz */ |
| 120281 | VR128X, VK16WM, VR128X, i128mem, |
| 120282 | /* VGF2P8MULBZ128rr */ |
| 120283 | VR128X, VR128X, VR128X, |
| 120284 | /* VGF2P8MULBZ128rrk */ |
| 120285 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 120286 | /* VGF2P8MULBZ128rrkz */ |
| 120287 | VR128X, VK16WM, VR128X, VR128X, |
| 120288 | /* VGF2P8MULBZ256rm */ |
| 120289 | VR256X, VR256X, i256mem, |
| 120290 | /* VGF2P8MULBZ256rmk */ |
| 120291 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 120292 | /* VGF2P8MULBZ256rmkz */ |
| 120293 | VR256X, VK32WM, VR256X, i256mem, |
| 120294 | /* VGF2P8MULBZ256rr */ |
| 120295 | VR256X, VR256X, VR256X, |
| 120296 | /* VGF2P8MULBZ256rrk */ |
| 120297 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 120298 | /* VGF2P8MULBZ256rrkz */ |
| 120299 | VR256X, VK32WM, VR256X, VR256X, |
| 120300 | /* VGF2P8MULBZrm */ |
| 120301 | VR512, VR512, i512mem, |
| 120302 | /* VGF2P8MULBZrmk */ |
| 120303 | VR512, VR512, VK64WM, VR512, i512mem, |
| 120304 | /* VGF2P8MULBZrmkz */ |
| 120305 | VR512, VK64WM, VR512, i512mem, |
| 120306 | /* VGF2P8MULBZrr */ |
| 120307 | VR512, VR512, VR512, |
| 120308 | /* VGF2P8MULBZrrk */ |
| 120309 | VR512, VR512, VK64WM, VR512, VR512, |
| 120310 | /* VGF2P8MULBZrrkz */ |
| 120311 | VR512, VK64WM, VR512, VR512, |
| 120312 | /* VGF2P8MULBrm */ |
| 120313 | VR128, VR128, i128mem, |
| 120314 | /* VGF2P8MULBrr */ |
| 120315 | VR128, VR128, VR128, |
| 120316 | /* VHADDPDYrm */ |
| 120317 | VR256, VR256, f256mem, |
| 120318 | /* VHADDPDYrr */ |
| 120319 | VR256, VR256, VR256, |
| 120320 | /* VHADDPDrm */ |
| 120321 | VR128, VR128, f128mem, |
| 120322 | /* VHADDPDrr */ |
| 120323 | VR128, VR128, VR128, |
| 120324 | /* VHADDPSYrm */ |
| 120325 | VR256, VR256, f256mem, |
| 120326 | /* VHADDPSYrr */ |
| 120327 | VR256, VR256, VR256, |
| 120328 | /* VHADDPSrm */ |
| 120329 | VR128, VR128, f128mem, |
| 120330 | /* VHADDPSrr */ |
| 120331 | VR128, VR128, VR128, |
| 120332 | /* VHSUBPDYrm */ |
| 120333 | VR256, VR256, f256mem, |
| 120334 | /* VHSUBPDYrr */ |
| 120335 | VR256, VR256, VR256, |
| 120336 | /* VHSUBPDrm */ |
| 120337 | VR128, VR128, f128mem, |
| 120338 | /* VHSUBPDrr */ |
| 120339 | VR128, VR128, VR128, |
| 120340 | /* VHSUBPSYrm */ |
| 120341 | VR256, VR256, f256mem, |
| 120342 | /* VHSUBPSYrr */ |
| 120343 | VR256, VR256, VR256, |
| 120344 | /* VHSUBPSrm */ |
| 120345 | VR128, VR128, f128mem, |
| 120346 | /* VHSUBPSrr */ |
| 120347 | VR128, VR128, VR128, |
| 120348 | /* VINSERTF128rmi */ |
| 120349 | VR256, VR256, f128mem, u8imm, |
| 120350 | /* VINSERTF128rri */ |
| 120351 | VR256, VR256, VR128, u8imm, |
| 120352 | /* VINSERTF32X4Z256rmi */ |
| 120353 | VR256X, VR256X, f128mem, u8imm, |
| 120354 | /* VINSERTF32X4Z256rmik */ |
| 120355 | VR256X, VR256X, VK8WM, VR256X, f128mem, u8imm, |
| 120356 | /* VINSERTF32X4Z256rmikz */ |
| 120357 | VR256X, VK8WM, VR256X, f128mem, u8imm, |
| 120358 | /* VINSERTF32X4Z256rri */ |
| 120359 | VR256X, VR256X, VR128X, u8imm, |
| 120360 | /* VINSERTF32X4Z256rrik */ |
| 120361 | VR256X, VR256X, VK8WM, VR256X, VR128X, u8imm, |
| 120362 | /* VINSERTF32X4Z256rrikz */ |
| 120363 | VR256X, VK8WM, VR256X, VR128X, u8imm, |
| 120364 | /* VINSERTF32X4Zrmi */ |
| 120365 | VR512, VR512, f128mem, u8imm, |
| 120366 | /* VINSERTF32X4Zrmik */ |
| 120367 | VR512, VR512, VK16WM, VR512, f128mem, u8imm, |
| 120368 | /* VINSERTF32X4Zrmikz */ |
| 120369 | VR512, VK16WM, VR512, f128mem, u8imm, |
| 120370 | /* VINSERTF32X4Zrri */ |
| 120371 | VR512, VR512, VR128X, u8imm, |
| 120372 | /* VINSERTF32X4Zrrik */ |
| 120373 | VR512, VR512, VK16WM, VR512, VR128X, u8imm, |
| 120374 | /* VINSERTF32X4Zrrikz */ |
| 120375 | VR512, VK16WM, VR512, VR128X, u8imm, |
| 120376 | /* VINSERTF32X8Zrmi */ |
| 120377 | VR512, VR512, f256mem, u8imm, |
| 120378 | /* VINSERTF32X8Zrmik */ |
| 120379 | VR512, VR512, VK16WM, VR512, f256mem, u8imm, |
| 120380 | /* VINSERTF32X8Zrmikz */ |
| 120381 | VR512, VK16WM, VR512, f256mem, u8imm, |
| 120382 | /* VINSERTF32X8Zrri */ |
| 120383 | VR512, VR512, VR256X, u8imm, |
| 120384 | /* VINSERTF32X8Zrrik */ |
| 120385 | VR512, VR512, VK16WM, VR512, VR256X, u8imm, |
| 120386 | /* VINSERTF32X8Zrrikz */ |
| 120387 | VR512, VK16WM, VR512, VR256X, u8imm, |
| 120388 | /* VINSERTF64X2Z256rmi */ |
| 120389 | VR256X, VR256X, f128mem, u8imm, |
| 120390 | /* VINSERTF64X2Z256rmik */ |
| 120391 | VR256X, VR256X, VK4WM, VR256X, f128mem, u8imm, |
| 120392 | /* VINSERTF64X2Z256rmikz */ |
| 120393 | VR256X, VK4WM, VR256X, f128mem, u8imm, |
| 120394 | /* VINSERTF64X2Z256rri */ |
| 120395 | VR256X, VR256X, VR128X, u8imm, |
| 120396 | /* VINSERTF64X2Z256rrik */ |
| 120397 | VR256X, VR256X, VK4WM, VR256X, VR128X, u8imm, |
| 120398 | /* VINSERTF64X2Z256rrikz */ |
| 120399 | VR256X, VK4WM, VR256X, VR128X, u8imm, |
| 120400 | /* VINSERTF64X2Zrmi */ |
| 120401 | VR512, VR512, f128mem, u8imm, |
| 120402 | /* VINSERTF64X2Zrmik */ |
| 120403 | VR512, VR512, VK8WM, VR512, f128mem, u8imm, |
| 120404 | /* VINSERTF64X2Zrmikz */ |
| 120405 | VR512, VK8WM, VR512, f128mem, u8imm, |
| 120406 | /* VINSERTF64X2Zrri */ |
| 120407 | VR512, VR512, VR128X, u8imm, |
| 120408 | /* VINSERTF64X2Zrrik */ |
| 120409 | VR512, VR512, VK8WM, VR512, VR128X, u8imm, |
| 120410 | /* VINSERTF64X2Zrrikz */ |
| 120411 | VR512, VK8WM, VR512, VR128X, u8imm, |
| 120412 | /* VINSERTF64X4Zrmi */ |
| 120413 | VR512, VR512, f256mem, u8imm, |
| 120414 | /* VINSERTF64X4Zrmik */ |
| 120415 | VR512, VR512, VK8WM, VR512, f256mem, u8imm, |
| 120416 | /* VINSERTF64X4Zrmikz */ |
| 120417 | VR512, VK8WM, VR512, f256mem, u8imm, |
| 120418 | /* VINSERTF64X4Zrri */ |
| 120419 | VR512, VR512, VR256X, u8imm, |
| 120420 | /* VINSERTF64X4Zrrik */ |
| 120421 | VR512, VR512, VK8WM, VR512, VR256X, u8imm, |
| 120422 | /* VINSERTF64X4Zrrikz */ |
| 120423 | VR512, VK8WM, VR512, VR256X, u8imm, |
| 120424 | /* VINSERTI128rmi */ |
| 120425 | VR256, VR256, i128mem, u8imm, |
| 120426 | /* VINSERTI128rri */ |
| 120427 | VR256, VR256, VR128, u8imm, |
| 120428 | /* VINSERTI32X4Z256rmi */ |
| 120429 | VR256X, VR256X, i128mem, u8imm, |
| 120430 | /* VINSERTI32X4Z256rmik */ |
| 120431 | VR256X, VR256X, VK8WM, VR256X, i128mem, u8imm, |
| 120432 | /* VINSERTI32X4Z256rmikz */ |
| 120433 | VR256X, VK8WM, VR256X, i128mem, u8imm, |
| 120434 | /* VINSERTI32X4Z256rri */ |
| 120435 | VR256X, VR256X, VR128X, u8imm, |
| 120436 | /* VINSERTI32X4Z256rrik */ |
| 120437 | VR256X, VR256X, VK8WM, VR256X, VR128X, u8imm, |
| 120438 | /* VINSERTI32X4Z256rrikz */ |
| 120439 | VR256X, VK8WM, VR256X, VR128X, u8imm, |
| 120440 | /* VINSERTI32X4Zrmi */ |
| 120441 | VR512, VR512, i128mem, u8imm, |
| 120442 | /* VINSERTI32X4Zrmik */ |
| 120443 | VR512, VR512, VK16WM, VR512, i128mem, u8imm, |
| 120444 | /* VINSERTI32X4Zrmikz */ |
| 120445 | VR512, VK16WM, VR512, i128mem, u8imm, |
| 120446 | /* VINSERTI32X4Zrri */ |
| 120447 | VR512, VR512, VR128X, u8imm, |
| 120448 | /* VINSERTI32X4Zrrik */ |
| 120449 | VR512, VR512, VK16WM, VR512, VR128X, u8imm, |
| 120450 | /* VINSERTI32X4Zrrikz */ |
| 120451 | VR512, VK16WM, VR512, VR128X, u8imm, |
| 120452 | /* VINSERTI32X8Zrmi */ |
| 120453 | VR512, VR512, i256mem, u8imm, |
| 120454 | /* VINSERTI32X8Zrmik */ |
| 120455 | VR512, VR512, VK16WM, VR512, i256mem, u8imm, |
| 120456 | /* VINSERTI32X8Zrmikz */ |
| 120457 | VR512, VK16WM, VR512, i256mem, u8imm, |
| 120458 | /* VINSERTI32X8Zrri */ |
| 120459 | VR512, VR512, VR256X, u8imm, |
| 120460 | /* VINSERTI32X8Zrrik */ |
| 120461 | VR512, VR512, VK16WM, VR512, VR256X, u8imm, |
| 120462 | /* VINSERTI32X8Zrrikz */ |
| 120463 | VR512, VK16WM, VR512, VR256X, u8imm, |
| 120464 | /* VINSERTI64X2Z256rmi */ |
| 120465 | VR256X, VR256X, i128mem, u8imm, |
| 120466 | /* VINSERTI64X2Z256rmik */ |
| 120467 | VR256X, VR256X, VK4WM, VR256X, i128mem, u8imm, |
| 120468 | /* VINSERTI64X2Z256rmikz */ |
| 120469 | VR256X, VK4WM, VR256X, i128mem, u8imm, |
| 120470 | /* VINSERTI64X2Z256rri */ |
| 120471 | VR256X, VR256X, VR128X, u8imm, |
| 120472 | /* VINSERTI64X2Z256rrik */ |
| 120473 | VR256X, VR256X, VK4WM, VR256X, VR128X, u8imm, |
| 120474 | /* VINSERTI64X2Z256rrikz */ |
| 120475 | VR256X, VK4WM, VR256X, VR128X, u8imm, |
| 120476 | /* VINSERTI64X2Zrmi */ |
| 120477 | VR512, VR512, i128mem, u8imm, |
| 120478 | /* VINSERTI64X2Zrmik */ |
| 120479 | VR512, VR512, VK8WM, VR512, i128mem, u8imm, |
| 120480 | /* VINSERTI64X2Zrmikz */ |
| 120481 | VR512, VK8WM, VR512, i128mem, u8imm, |
| 120482 | /* VINSERTI64X2Zrri */ |
| 120483 | VR512, VR512, VR128X, u8imm, |
| 120484 | /* VINSERTI64X2Zrrik */ |
| 120485 | VR512, VR512, VK8WM, VR512, VR128X, u8imm, |
| 120486 | /* VINSERTI64X2Zrrikz */ |
| 120487 | VR512, VK8WM, VR512, VR128X, u8imm, |
| 120488 | /* VINSERTI64X4Zrmi */ |
| 120489 | VR512, VR512, i256mem, u8imm, |
| 120490 | /* VINSERTI64X4Zrmik */ |
| 120491 | VR512, VR512, VK8WM, VR512, i256mem, u8imm, |
| 120492 | /* VINSERTI64X4Zrmikz */ |
| 120493 | VR512, VK8WM, VR512, i256mem, u8imm, |
| 120494 | /* VINSERTI64X4Zrri */ |
| 120495 | VR512, VR512, VR256X, u8imm, |
| 120496 | /* VINSERTI64X4Zrrik */ |
| 120497 | VR512, VR512, VK8WM, VR512, VR256X, u8imm, |
| 120498 | /* VINSERTI64X4Zrrikz */ |
| 120499 | VR512, VK8WM, VR512, VR256X, u8imm, |
| 120500 | /* VINSERTPSZrmi */ |
| 120501 | VR128X, VR128X, f32mem, u8imm, |
| 120502 | /* VINSERTPSZrri */ |
| 120503 | VR128X, VR128X, VR128X, u8imm, |
| 120504 | /* VINSERTPSrmi */ |
| 120505 | VR128, VR128, f32mem, u8imm, |
| 120506 | /* VINSERTPSrri */ |
| 120507 | VR128, VR128, VR128, u8imm, |
| 120508 | /* VLDDQUYrm */ |
| 120509 | VR256, i256mem, |
| 120510 | /* VLDDQUrm */ |
| 120511 | VR128, i128mem, |
| 120512 | /* VLDMXCSR */ |
| 120513 | i32mem, |
| 120514 | /* VMASKMOVDQU */ |
| 120515 | VR128, VR128, |
| 120516 | /* VMASKMOVDQU64 */ |
| 120517 | VR128, VR128, |
| 120518 | /* VMASKMOVPDYmr */ |
| 120519 | f256mem, VR256, VR256, |
| 120520 | /* VMASKMOVPDYrm */ |
| 120521 | VR256, VR256, f256mem, |
| 120522 | /* VMASKMOVPDmr */ |
| 120523 | f128mem, VR128, VR128, |
| 120524 | /* VMASKMOVPDrm */ |
| 120525 | VR128, VR128, f128mem, |
| 120526 | /* VMASKMOVPSYmr */ |
| 120527 | f256mem, VR256, VR256, |
| 120528 | /* VMASKMOVPSYrm */ |
| 120529 | VR256, VR256, f256mem, |
| 120530 | /* VMASKMOVPSmr */ |
| 120531 | f128mem, VR128, VR128, |
| 120532 | /* VMASKMOVPSrm */ |
| 120533 | VR128, VR128, f128mem, |
| 120534 | /* VMAXBF16Z128rm */ |
| 120535 | VR128X, VR128X, f128mem, |
| 120536 | /* VMAXBF16Z128rmb */ |
| 120537 | VR128X, VR128X, f16mem, |
| 120538 | /* VMAXBF16Z128rmbk */ |
| 120539 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 120540 | /* VMAXBF16Z128rmbkz */ |
| 120541 | VR128X, VK8WM, VR128X, f16mem, |
| 120542 | /* VMAXBF16Z128rmk */ |
| 120543 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 120544 | /* VMAXBF16Z128rmkz */ |
| 120545 | VR128X, VK8WM, VR128X, f128mem, |
| 120546 | /* VMAXBF16Z128rr */ |
| 120547 | VR128X, VR128X, VR128X, |
| 120548 | /* VMAXBF16Z128rrk */ |
| 120549 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 120550 | /* VMAXBF16Z128rrkz */ |
| 120551 | VR128X, VK8WM, VR128X, VR128X, |
| 120552 | /* VMAXBF16Z256rm */ |
| 120553 | VR256X, VR256X, f256mem, |
| 120554 | /* VMAXBF16Z256rmb */ |
| 120555 | VR256X, VR256X, f16mem, |
| 120556 | /* VMAXBF16Z256rmbk */ |
| 120557 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 120558 | /* VMAXBF16Z256rmbkz */ |
| 120559 | VR256X, VK16WM, VR256X, f16mem, |
| 120560 | /* VMAXBF16Z256rmk */ |
| 120561 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 120562 | /* VMAXBF16Z256rmkz */ |
| 120563 | VR256X, VK16WM, VR256X, f256mem, |
| 120564 | /* VMAXBF16Z256rr */ |
| 120565 | VR256X, VR256X, VR256X, |
| 120566 | /* VMAXBF16Z256rrk */ |
| 120567 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 120568 | /* VMAXBF16Z256rrkz */ |
| 120569 | VR256X, VK16WM, VR256X, VR256X, |
| 120570 | /* VMAXBF16Zrm */ |
| 120571 | VR512, VR512, f512mem, |
| 120572 | /* VMAXBF16Zrmb */ |
| 120573 | VR512, VR512, f16mem, |
| 120574 | /* VMAXBF16Zrmbk */ |
| 120575 | VR512, VR512, VK32WM, VR512, f16mem, |
| 120576 | /* VMAXBF16Zrmbkz */ |
| 120577 | VR512, VK32WM, VR512, f16mem, |
| 120578 | /* VMAXBF16Zrmk */ |
| 120579 | VR512, VR512, VK32WM, VR512, f512mem, |
| 120580 | /* VMAXBF16Zrmkz */ |
| 120581 | VR512, VK32WM, VR512, f512mem, |
| 120582 | /* VMAXBF16Zrr */ |
| 120583 | VR512, VR512, VR512, |
| 120584 | /* VMAXBF16Zrrk */ |
| 120585 | VR512, VR512, VK32WM, VR512, VR512, |
| 120586 | /* VMAXBF16Zrrkz */ |
| 120587 | VR512, VK32WM, VR512, VR512, |
| 120588 | /* VMAXCPDYrm */ |
| 120589 | VR256, VR256, f256mem, |
| 120590 | /* VMAXCPDYrr */ |
| 120591 | VR256, VR256, VR256, |
| 120592 | /* VMAXCPDZ128rm */ |
| 120593 | VR128X, VR128X, f128mem, |
| 120594 | /* VMAXCPDZ128rmb */ |
| 120595 | VR128X, VR128X, f64mem, |
| 120596 | /* VMAXCPDZ128rmbk */ |
| 120597 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 120598 | /* VMAXCPDZ128rmbkz */ |
| 120599 | VR128X, VK2WM, VR128X, f64mem, |
| 120600 | /* VMAXCPDZ128rmk */ |
| 120601 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 120602 | /* VMAXCPDZ128rmkz */ |
| 120603 | VR128X, VK2WM, VR128X, f128mem, |
| 120604 | /* VMAXCPDZ128rr */ |
| 120605 | VR128X, VR128X, VR128X, |
| 120606 | /* VMAXCPDZ128rrk */ |
| 120607 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 120608 | /* VMAXCPDZ128rrkz */ |
| 120609 | VR128X, VK2WM, VR128X, VR128X, |
| 120610 | /* VMAXCPDZ256rm */ |
| 120611 | VR256X, VR256X, f256mem, |
| 120612 | /* VMAXCPDZ256rmb */ |
| 120613 | VR256X, VR256X, f64mem, |
| 120614 | /* VMAXCPDZ256rmbk */ |
| 120615 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 120616 | /* VMAXCPDZ256rmbkz */ |
| 120617 | VR256X, VK4WM, VR256X, f64mem, |
| 120618 | /* VMAXCPDZ256rmk */ |
| 120619 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 120620 | /* VMAXCPDZ256rmkz */ |
| 120621 | VR256X, VK4WM, VR256X, f256mem, |
| 120622 | /* VMAXCPDZ256rr */ |
| 120623 | VR256X, VR256X, VR256X, |
| 120624 | /* VMAXCPDZ256rrk */ |
| 120625 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 120626 | /* VMAXCPDZ256rrkz */ |
| 120627 | VR256X, VK4WM, VR256X, VR256X, |
| 120628 | /* VMAXCPDZrm */ |
| 120629 | VR512, VR512, f512mem, |
| 120630 | /* VMAXCPDZrmb */ |
| 120631 | VR512, VR512, f64mem, |
| 120632 | /* VMAXCPDZrmbk */ |
| 120633 | VR512, VR512, VK8WM, VR512, f64mem, |
| 120634 | /* VMAXCPDZrmbkz */ |
| 120635 | VR512, VK8WM, VR512, f64mem, |
| 120636 | /* VMAXCPDZrmk */ |
| 120637 | VR512, VR512, VK8WM, VR512, f512mem, |
| 120638 | /* VMAXCPDZrmkz */ |
| 120639 | VR512, VK8WM, VR512, f512mem, |
| 120640 | /* VMAXCPDZrr */ |
| 120641 | VR512, VR512, VR512, |
| 120642 | /* VMAXCPDZrrk */ |
| 120643 | VR512, VR512, VK8WM, VR512, VR512, |
| 120644 | /* VMAXCPDZrrkz */ |
| 120645 | VR512, VK8WM, VR512, VR512, |
| 120646 | /* VMAXCPDrm */ |
| 120647 | VR128, VR128, f128mem, |
| 120648 | /* VMAXCPDrr */ |
| 120649 | VR128, VR128, VR128, |
| 120650 | /* VMAXCPHZ128rm */ |
| 120651 | VR128X, VR128X, f128mem, |
| 120652 | /* VMAXCPHZ128rmb */ |
| 120653 | VR128X, VR128X, f16mem, |
| 120654 | /* VMAXCPHZ128rmbk */ |
| 120655 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 120656 | /* VMAXCPHZ128rmbkz */ |
| 120657 | VR128X, VK8WM, VR128X, f16mem, |
| 120658 | /* VMAXCPHZ128rmk */ |
| 120659 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 120660 | /* VMAXCPHZ128rmkz */ |
| 120661 | VR128X, VK8WM, VR128X, f128mem, |
| 120662 | /* VMAXCPHZ128rr */ |
| 120663 | VR128X, VR128X, VR128X, |
| 120664 | /* VMAXCPHZ128rrk */ |
| 120665 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 120666 | /* VMAXCPHZ128rrkz */ |
| 120667 | VR128X, VK8WM, VR128X, VR128X, |
| 120668 | /* VMAXCPHZ256rm */ |
| 120669 | VR256X, VR256X, f256mem, |
| 120670 | /* VMAXCPHZ256rmb */ |
| 120671 | VR256X, VR256X, f16mem, |
| 120672 | /* VMAXCPHZ256rmbk */ |
| 120673 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 120674 | /* VMAXCPHZ256rmbkz */ |
| 120675 | VR256X, VK16WM, VR256X, f16mem, |
| 120676 | /* VMAXCPHZ256rmk */ |
| 120677 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 120678 | /* VMAXCPHZ256rmkz */ |
| 120679 | VR256X, VK16WM, VR256X, f256mem, |
| 120680 | /* VMAXCPHZ256rr */ |
| 120681 | VR256X, VR256X, VR256X, |
| 120682 | /* VMAXCPHZ256rrk */ |
| 120683 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 120684 | /* VMAXCPHZ256rrkz */ |
| 120685 | VR256X, VK16WM, VR256X, VR256X, |
| 120686 | /* VMAXCPHZrm */ |
| 120687 | VR512, VR512, f512mem, |
| 120688 | /* VMAXCPHZrmb */ |
| 120689 | VR512, VR512, f16mem, |
| 120690 | /* VMAXCPHZrmbk */ |
| 120691 | VR512, VR512, VK32WM, VR512, f16mem, |
| 120692 | /* VMAXCPHZrmbkz */ |
| 120693 | VR512, VK32WM, VR512, f16mem, |
| 120694 | /* VMAXCPHZrmk */ |
| 120695 | VR512, VR512, VK32WM, VR512, f512mem, |
| 120696 | /* VMAXCPHZrmkz */ |
| 120697 | VR512, VK32WM, VR512, f512mem, |
| 120698 | /* VMAXCPHZrr */ |
| 120699 | VR512, VR512, VR512, |
| 120700 | /* VMAXCPHZrrk */ |
| 120701 | VR512, VR512, VK32WM, VR512, VR512, |
| 120702 | /* VMAXCPHZrrkz */ |
| 120703 | VR512, VK32WM, VR512, VR512, |
| 120704 | /* VMAXCPSYrm */ |
| 120705 | VR256, VR256, f256mem, |
| 120706 | /* VMAXCPSYrr */ |
| 120707 | VR256, VR256, VR256, |
| 120708 | /* VMAXCPSZ128rm */ |
| 120709 | VR128X, VR128X, f128mem, |
| 120710 | /* VMAXCPSZ128rmb */ |
| 120711 | VR128X, VR128X, f32mem, |
| 120712 | /* VMAXCPSZ128rmbk */ |
| 120713 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 120714 | /* VMAXCPSZ128rmbkz */ |
| 120715 | VR128X, VK4WM, VR128X, f32mem, |
| 120716 | /* VMAXCPSZ128rmk */ |
| 120717 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 120718 | /* VMAXCPSZ128rmkz */ |
| 120719 | VR128X, VK4WM, VR128X, f128mem, |
| 120720 | /* VMAXCPSZ128rr */ |
| 120721 | VR128X, VR128X, VR128X, |
| 120722 | /* VMAXCPSZ128rrk */ |
| 120723 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120724 | /* VMAXCPSZ128rrkz */ |
| 120725 | VR128X, VK4WM, VR128X, VR128X, |
| 120726 | /* VMAXCPSZ256rm */ |
| 120727 | VR256X, VR256X, f256mem, |
| 120728 | /* VMAXCPSZ256rmb */ |
| 120729 | VR256X, VR256X, f32mem, |
| 120730 | /* VMAXCPSZ256rmbk */ |
| 120731 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 120732 | /* VMAXCPSZ256rmbkz */ |
| 120733 | VR256X, VK8WM, VR256X, f32mem, |
| 120734 | /* VMAXCPSZ256rmk */ |
| 120735 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 120736 | /* VMAXCPSZ256rmkz */ |
| 120737 | VR256X, VK8WM, VR256X, f256mem, |
| 120738 | /* VMAXCPSZ256rr */ |
| 120739 | VR256X, VR256X, VR256X, |
| 120740 | /* VMAXCPSZ256rrk */ |
| 120741 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 120742 | /* VMAXCPSZ256rrkz */ |
| 120743 | VR256X, VK8WM, VR256X, VR256X, |
| 120744 | /* VMAXCPSZrm */ |
| 120745 | VR512, VR512, f512mem, |
| 120746 | /* VMAXCPSZrmb */ |
| 120747 | VR512, VR512, f32mem, |
| 120748 | /* VMAXCPSZrmbk */ |
| 120749 | VR512, VR512, VK16WM, VR512, f32mem, |
| 120750 | /* VMAXCPSZrmbkz */ |
| 120751 | VR512, VK16WM, VR512, f32mem, |
| 120752 | /* VMAXCPSZrmk */ |
| 120753 | VR512, VR512, VK16WM, VR512, f512mem, |
| 120754 | /* VMAXCPSZrmkz */ |
| 120755 | VR512, VK16WM, VR512, f512mem, |
| 120756 | /* VMAXCPSZrr */ |
| 120757 | VR512, VR512, VR512, |
| 120758 | /* VMAXCPSZrrk */ |
| 120759 | VR512, VR512, VK16WM, VR512, VR512, |
| 120760 | /* VMAXCPSZrrkz */ |
| 120761 | VR512, VK16WM, VR512, VR512, |
| 120762 | /* VMAXCPSrm */ |
| 120763 | VR128, VR128, f128mem, |
| 120764 | /* VMAXCPSrr */ |
| 120765 | VR128, VR128, VR128, |
| 120766 | /* VMAXCSDZrm */ |
| 120767 | FR64X, FR64X, f64mem, |
| 120768 | /* VMAXCSDZrr */ |
| 120769 | FR64X, FR64X, FR64X, |
| 120770 | /* VMAXCSDrm */ |
| 120771 | FR64, FR64, f64mem, |
| 120772 | /* VMAXCSDrr */ |
| 120773 | FR64, FR64, FR64, |
| 120774 | /* VMAXCSHZrm */ |
| 120775 | FR16X, FR16X, f16mem, |
| 120776 | /* VMAXCSHZrr */ |
| 120777 | FR16X, FR16X, FR16X, |
| 120778 | /* VMAXCSSZrm */ |
| 120779 | FR32X, FR32X, f32mem, |
| 120780 | /* VMAXCSSZrr */ |
| 120781 | FR32X, FR32X, FR32X, |
| 120782 | /* VMAXCSSrm */ |
| 120783 | FR32, FR32, f32mem, |
| 120784 | /* VMAXCSSrr */ |
| 120785 | FR32, FR32, FR32, |
| 120786 | /* VMAXPDYrm */ |
| 120787 | VR256, VR256, f256mem, |
| 120788 | /* VMAXPDYrr */ |
| 120789 | VR256, VR256, VR256, |
| 120790 | /* VMAXPDZ128rm */ |
| 120791 | VR128X, VR128X, f128mem, |
| 120792 | /* VMAXPDZ128rmb */ |
| 120793 | VR128X, VR128X, f64mem, |
| 120794 | /* VMAXPDZ128rmbk */ |
| 120795 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 120796 | /* VMAXPDZ128rmbkz */ |
| 120797 | VR128X, VK2WM, VR128X, f64mem, |
| 120798 | /* VMAXPDZ128rmk */ |
| 120799 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 120800 | /* VMAXPDZ128rmkz */ |
| 120801 | VR128X, VK2WM, VR128X, f128mem, |
| 120802 | /* VMAXPDZ128rr */ |
| 120803 | VR128X, VR128X, VR128X, |
| 120804 | /* VMAXPDZ128rrk */ |
| 120805 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 120806 | /* VMAXPDZ128rrkz */ |
| 120807 | VR128X, VK2WM, VR128X, VR128X, |
| 120808 | /* VMAXPDZ256rm */ |
| 120809 | VR256X, VR256X, f256mem, |
| 120810 | /* VMAXPDZ256rmb */ |
| 120811 | VR256X, VR256X, f64mem, |
| 120812 | /* VMAXPDZ256rmbk */ |
| 120813 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 120814 | /* VMAXPDZ256rmbkz */ |
| 120815 | VR256X, VK4WM, VR256X, f64mem, |
| 120816 | /* VMAXPDZ256rmk */ |
| 120817 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 120818 | /* VMAXPDZ256rmkz */ |
| 120819 | VR256X, VK4WM, VR256X, f256mem, |
| 120820 | /* VMAXPDZ256rr */ |
| 120821 | VR256X, VR256X, VR256X, |
| 120822 | /* VMAXPDZ256rrk */ |
| 120823 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 120824 | /* VMAXPDZ256rrkz */ |
| 120825 | VR256X, VK4WM, VR256X, VR256X, |
| 120826 | /* VMAXPDZrm */ |
| 120827 | VR512, VR512, f512mem, |
| 120828 | /* VMAXPDZrmb */ |
| 120829 | VR512, VR512, f64mem, |
| 120830 | /* VMAXPDZrmbk */ |
| 120831 | VR512, VR512, VK8WM, VR512, f64mem, |
| 120832 | /* VMAXPDZrmbkz */ |
| 120833 | VR512, VK8WM, VR512, f64mem, |
| 120834 | /* VMAXPDZrmk */ |
| 120835 | VR512, VR512, VK8WM, VR512, f512mem, |
| 120836 | /* VMAXPDZrmkz */ |
| 120837 | VR512, VK8WM, VR512, f512mem, |
| 120838 | /* VMAXPDZrr */ |
| 120839 | VR512, VR512, VR512, |
| 120840 | /* VMAXPDZrrb */ |
| 120841 | VR512, VR512, VR512, |
| 120842 | /* VMAXPDZrrbk */ |
| 120843 | VR512, VR512, VK8WM, VR512, VR512, |
| 120844 | /* VMAXPDZrrbkz */ |
| 120845 | VR512, VK8WM, VR512, VR512, |
| 120846 | /* VMAXPDZrrk */ |
| 120847 | VR512, VR512, VK8WM, VR512, VR512, |
| 120848 | /* VMAXPDZrrkz */ |
| 120849 | VR512, VK8WM, VR512, VR512, |
| 120850 | /* VMAXPDrm */ |
| 120851 | VR128, VR128, f128mem, |
| 120852 | /* VMAXPDrr */ |
| 120853 | VR128, VR128, VR128, |
| 120854 | /* VMAXPHZ128rm */ |
| 120855 | VR128X, VR128X, f128mem, |
| 120856 | /* VMAXPHZ128rmb */ |
| 120857 | VR128X, VR128X, f16mem, |
| 120858 | /* VMAXPHZ128rmbk */ |
| 120859 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 120860 | /* VMAXPHZ128rmbkz */ |
| 120861 | VR128X, VK8WM, VR128X, f16mem, |
| 120862 | /* VMAXPHZ128rmk */ |
| 120863 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 120864 | /* VMAXPHZ128rmkz */ |
| 120865 | VR128X, VK8WM, VR128X, f128mem, |
| 120866 | /* VMAXPHZ128rr */ |
| 120867 | VR128X, VR128X, VR128X, |
| 120868 | /* VMAXPHZ128rrk */ |
| 120869 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 120870 | /* VMAXPHZ128rrkz */ |
| 120871 | VR128X, VK8WM, VR128X, VR128X, |
| 120872 | /* VMAXPHZ256rm */ |
| 120873 | VR256X, VR256X, f256mem, |
| 120874 | /* VMAXPHZ256rmb */ |
| 120875 | VR256X, VR256X, f16mem, |
| 120876 | /* VMAXPHZ256rmbk */ |
| 120877 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 120878 | /* VMAXPHZ256rmbkz */ |
| 120879 | VR256X, VK16WM, VR256X, f16mem, |
| 120880 | /* VMAXPHZ256rmk */ |
| 120881 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 120882 | /* VMAXPHZ256rmkz */ |
| 120883 | VR256X, VK16WM, VR256X, f256mem, |
| 120884 | /* VMAXPHZ256rr */ |
| 120885 | VR256X, VR256X, VR256X, |
| 120886 | /* VMAXPHZ256rrk */ |
| 120887 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 120888 | /* VMAXPHZ256rrkz */ |
| 120889 | VR256X, VK16WM, VR256X, VR256X, |
| 120890 | /* VMAXPHZrm */ |
| 120891 | VR512, VR512, f512mem, |
| 120892 | /* VMAXPHZrmb */ |
| 120893 | VR512, VR512, f16mem, |
| 120894 | /* VMAXPHZrmbk */ |
| 120895 | VR512, VR512, VK32WM, VR512, f16mem, |
| 120896 | /* VMAXPHZrmbkz */ |
| 120897 | VR512, VK32WM, VR512, f16mem, |
| 120898 | /* VMAXPHZrmk */ |
| 120899 | VR512, VR512, VK32WM, VR512, f512mem, |
| 120900 | /* VMAXPHZrmkz */ |
| 120901 | VR512, VK32WM, VR512, f512mem, |
| 120902 | /* VMAXPHZrr */ |
| 120903 | VR512, VR512, VR512, |
| 120904 | /* VMAXPHZrrb */ |
| 120905 | VR512, VR512, VR512, |
| 120906 | /* VMAXPHZrrbk */ |
| 120907 | VR512, VR512, VK32WM, VR512, VR512, |
| 120908 | /* VMAXPHZrrbkz */ |
| 120909 | VR512, VK32WM, VR512, VR512, |
| 120910 | /* VMAXPHZrrk */ |
| 120911 | VR512, VR512, VK32WM, VR512, VR512, |
| 120912 | /* VMAXPHZrrkz */ |
| 120913 | VR512, VK32WM, VR512, VR512, |
| 120914 | /* VMAXPSYrm */ |
| 120915 | VR256, VR256, f256mem, |
| 120916 | /* VMAXPSYrr */ |
| 120917 | VR256, VR256, VR256, |
| 120918 | /* VMAXPSZ128rm */ |
| 120919 | VR128X, VR128X, f128mem, |
| 120920 | /* VMAXPSZ128rmb */ |
| 120921 | VR128X, VR128X, f32mem, |
| 120922 | /* VMAXPSZ128rmbk */ |
| 120923 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 120924 | /* VMAXPSZ128rmbkz */ |
| 120925 | VR128X, VK4WM, VR128X, f32mem, |
| 120926 | /* VMAXPSZ128rmk */ |
| 120927 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 120928 | /* VMAXPSZ128rmkz */ |
| 120929 | VR128X, VK4WM, VR128X, f128mem, |
| 120930 | /* VMAXPSZ128rr */ |
| 120931 | VR128X, VR128X, VR128X, |
| 120932 | /* VMAXPSZ128rrk */ |
| 120933 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120934 | /* VMAXPSZ128rrkz */ |
| 120935 | VR128X, VK4WM, VR128X, VR128X, |
| 120936 | /* VMAXPSZ256rm */ |
| 120937 | VR256X, VR256X, f256mem, |
| 120938 | /* VMAXPSZ256rmb */ |
| 120939 | VR256X, VR256X, f32mem, |
| 120940 | /* VMAXPSZ256rmbk */ |
| 120941 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 120942 | /* VMAXPSZ256rmbkz */ |
| 120943 | VR256X, VK8WM, VR256X, f32mem, |
| 120944 | /* VMAXPSZ256rmk */ |
| 120945 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 120946 | /* VMAXPSZ256rmkz */ |
| 120947 | VR256X, VK8WM, VR256X, f256mem, |
| 120948 | /* VMAXPSZ256rr */ |
| 120949 | VR256X, VR256X, VR256X, |
| 120950 | /* VMAXPSZ256rrk */ |
| 120951 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 120952 | /* VMAXPSZ256rrkz */ |
| 120953 | VR256X, VK8WM, VR256X, VR256X, |
| 120954 | /* VMAXPSZrm */ |
| 120955 | VR512, VR512, f512mem, |
| 120956 | /* VMAXPSZrmb */ |
| 120957 | VR512, VR512, f32mem, |
| 120958 | /* VMAXPSZrmbk */ |
| 120959 | VR512, VR512, VK16WM, VR512, f32mem, |
| 120960 | /* VMAXPSZrmbkz */ |
| 120961 | VR512, VK16WM, VR512, f32mem, |
| 120962 | /* VMAXPSZrmk */ |
| 120963 | VR512, VR512, VK16WM, VR512, f512mem, |
| 120964 | /* VMAXPSZrmkz */ |
| 120965 | VR512, VK16WM, VR512, f512mem, |
| 120966 | /* VMAXPSZrr */ |
| 120967 | VR512, VR512, VR512, |
| 120968 | /* VMAXPSZrrb */ |
| 120969 | VR512, VR512, VR512, |
| 120970 | /* VMAXPSZrrbk */ |
| 120971 | VR512, VR512, VK16WM, VR512, VR512, |
| 120972 | /* VMAXPSZrrbkz */ |
| 120973 | VR512, VK16WM, VR512, VR512, |
| 120974 | /* VMAXPSZrrk */ |
| 120975 | VR512, VR512, VK16WM, VR512, VR512, |
| 120976 | /* VMAXPSZrrkz */ |
| 120977 | VR512, VK16WM, VR512, VR512, |
| 120978 | /* VMAXPSrm */ |
| 120979 | VR128, VR128, f128mem, |
| 120980 | /* VMAXPSrr */ |
| 120981 | VR128, VR128, VR128, |
| 120982 | /* VMAXSDZrm */ |
| 120983 | FR64X, FR64X, f64mem, |
| 120984 | /* VMAXSDZrm_Int */ |
| 120985 | VR128X, VR128X, sdmem, |
| 120986 | /* VMAXSDZrmk_Int */ |
| 120987 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 120988 | /* VMAXSDZrmkz_Int */ |
| 120989 | VR128X, VK1WM, VR128X, sdmem, |
| 120990 | /* VMAXSDZrr */ |
| 120991 | FR64X, FR64X, FR64X, |
| 120992 | /* VMAXSDZrr_Int */ |
| 120993 | VR128X, VR128X, VR128X, |
| 120994 | /* VMAXSDZrrb_Int */ |
| 120995 | VR128X, VR128X, VR128X, |
| 120996 | /* VMAXSDZrrbk_Int */ |
| 120997 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 120998 | /* VMAXSDZrrbkz_Int */ |
| 120999 | VR128X, VK1WM, VR128X, VR128X, |
| 121000 | /* VMAXSDZrrk_Int */ |
| 121001 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121002 | /* VMAXSDZrrkz_Int */ |
| 121003 | VR128X, VK1WM, VR128X, VR128X, |
| 121004 | /* VMAXSDrm */ |
| 121005 | FR64, FR64, f64mem, |
| 121006 | /* VMAXSDrm_Int */ |
| 121007 | VR128, VR128, sdmem, |
| 121008 | /* VMAXSDrr */ |
| 121009 | FR64, FR64, FR64, |
| 121010 | /* VMAXSDrr_Int */ |
| 121011 | VR128, VR128, VR128, |
| 121012 | /* VMAXSHZrm */ |
| 121013 | FR16X, FR16X, f16mem, |
| 121014 | /* VMAXSHZrm_Int */ |
| 121015 | VR128X, VR128X, shmem, |
| 121016 | /* VMAXSHZrmk_Int */ |
| 121017 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 121018 | /* VMAXSHZrmkz_Int */ |
| 121019 | VR128X, VK1WM, VR128X, shmem, |
| 121020 | /* VMAXSHZrr */ |
| 121021 | FR16X, FR16X, FR16X, |
| 121022 | /* VMAXSHZrr_Int */ |
| 121023 | VR128X, VR128X, VR128X, |
| 121024 | /* VMAXSHZrrb_Int */ |
| 121025 | VR128X, VR128X, VR128X, |
| 121026 | /* VMAXSHZrrbk_Int */ |
| 121027 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121028 | /* VMAXSHZrrbkz_Int */ |
| 121029 | VR128X, VK1WM, VR128X, VR128X, |
| 121030 | /* VMAXSHZrrk_Int */ |
| 121031 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121032 | /* VMAXSHZrrkz_Int */ |
| 121033 | VR128X, VK1WM, VR128X, VR128X, |
| 121034 | /* VMAXSSZrm */ |
| 121035 | FR32X, FR32X, f32mem, |
| 121036 | /* VMAXSSZrm_Int */ |
| 121037 | VR128X, VR128X, ssmem, |
| 121038 | /* VMAXSSZrmk_Int */ |
| 121039 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 121040 | /* VMAXSSZrmkz_Int */ |
| 121041 | VR128X, VK1WM, VR128X, ssmem, |
| 121042 | /* VMAXSSZrr */ |
| 121043 | FR32X, FR32X, FR32X, |
| 121044 | /* VMAXSSZrr_Int */ |
| 121045 | VR128X, VR128X, VR128X, |
| 121046 | /* VMAXSSZrrb_Int */ |
| 121047 | VR128X, VR128X, VR128X, |
| 121048 | /* VMAXSSZrrbk_Int */ |
| 121049 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121050 | /* VMAXSSZrrbkz_Int */ |
| 121051 | VR128X, VK1WM, VR128X, VR128X, |
| 121052 | /* VMAXSSZrrk_Int */ |
| 121053 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121054 | /* VMAXSSZrrkz_Int */ |
| 121055 | VR128X, VK1WM, VR128X, VR128X, |
| 121056 | /* VMAXSSrm */ |
| 121057 | FR32, FR32, f32mem, |
| 121058 | /* VMAXSSrm_Int */ |
| 121059 | VR128, VR128, ssmem, |
| 121060 | /* VMAXSSrr */ |
| 121061 | FR32, FR32, FR32, |
| 121062 | /* VMAXSSrr_Int */ |
| 121063 | VR128, VR128, VR128, |
| 121064 | /* VMCALL */ |
| 121065 | /* VMCLEARm */ |
| 121066 | i64mem, |
| 121067 | /* VMFUNC */ |
| 121068 | /* VMINBF16Z128rm */ |
| 121069 | VR128X, VR128X, f128mem, |
| 121070 | /* VMINBF16Z128rmb */ |
| 121071 | VR128X, VR128X, f16mem, |
| 121072 | /* VMINBF16Z128rmbk */ |
| 121073 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121074 | /* VMINBF16Z128rmbkz */ |
| 121075 | VR128X, VK8WM, VR128X, f16mem, |
| 121076 | /* VMINBF16Z128rmk */ |
| 121077 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121078 | /* VMINBF16Z128rmkz */ |
| 121079 | VR128X, VK8WM, VR128X, f128mem, |
| 121080 | /* VMINBF16Z128rr */ |
| 121081 | VR128X, VR128X, VR128X, |
| 121082 | /* VMINBF16Z128rrk */ |
| 121083 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121084 | /* VMINBF16Z128rrkz */ |
| 121085 | VR128X, VK8WM, VR128X, VR128X, |
| 121086 | /* VMINBF16Z256rm */ |
| 121087 | VR256X, VR256X, f256mem, |
| 121088 | /* VMINBF16Z256rmb */ |
| 121089 | VR256X, VR256X, f16mem, |
| 121090 | /* VMINBF16Z256rmbk */ |
| 121091 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121092 | /* VMINBF16Z256rmbkz */ |
| 121093 | VR256X, VK16WM, VR256X, f16mem, |
| 121094 | /* VMINBF16Z256rmk */ |
| 121095 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 121096 | /* VMINBF16Z256rmkz */ |
| 121097 | VR256X, VK16WM, VR256X, f256mem, |
| 121098 | /* VMINBF16Z256rr */ |
| 121099 | VR256X, VR256X, VR256X, |
| 121100 | /* VMINBF16Z256rrk */ |
| 121101 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 121102 | /* VMINBF16Z256rrkz */ |
| 121103 | VR256X, VK16WM, VR256X, VR256X, |
| 121104 | /* VMINBF16Zrm */ |
| 121105 | VR512, VR512, f512mem, |
| 121106 | /* VMINBF16Zrmb */ |
| 121107 | VR512, VR512, f16mem, |
| 121108 | /* VMINBF16Zrmbk */ |
| 121109 | VR512, VR512, VK32WM, VR512, f16mem, |
| 121110 | /* VMINBF16Zrmbkz */ |
| 121111 | VR512, VK32WM, VR512, f16mem, |
| 121112 | /* VMINBF16Zrmk */ |
| 121113 | VR512, VR512, VK32WM, VR512, f512mem, |
| 121114 | /* VMINBF16Zrmkz */ |
| 121115 | VR512, VK32WM, VR512, f512mem, |
| 121116 | /* VMINBF16Zrr */ |
| 121117 | VR512, VR512, VR512, |
| 121118 | /* VMINBF16Zrrk */ |
| 121119 | VR512, VR512, VK32WM, VR512, VR512, |
| 121120 | /* VMINBF16Zrrkz */ |
| 121121 | VR512, VK32WM, VR512, VR512, |
| 121122 | /* VMINCPDYrm */ |
| 121123 | VR256, VR256, f256mem, |
| 121124 | /* VMINCPDYrr */ |
| 121125 | VR256, VR256, VR256, |
| 121126 | /* VMINCPDZ128rm */ |
| 121127 | VR128X, VR128X, f128mem, |
| 121128 | /* VMINCPDZ128rmb */ |
| 121129 | VR128X, VR128X, f64mem, |
| 121130 | /* VMINCPDZ128rmbk */ |
| 121131 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 121132 | /* VMINCPDZ128rmbkz */ |
| 121133 | VR128X, VK2WM, VR128X, f64mem, |
| 121134 | /* VMINCPDZ128rmk */ |
| 121135 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 121136 | /* VMINCPDZ128rmkz */ |
| 121137 | VR128X, VK2WM, VR128X, f128mem, |
| 121138 | /* VMINCPDZ128rr */ |
| 121139 | VR128X, VR128X, VR128X, |
| 121140 | /* VMINCPDZ128rrk */ |
| 121141 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 121142 | /* VMINCPDZ128rrkz */ |
| 121143 | VR128X, VK2WM, VR128X, VR128X, |
| 121144 | /* VMINCPDZ256rm */ |
| 121145 | VR256X, VR256X, f256mem, |
| 121146 | /* VMINCPDZ256rmb */ |
| 121147 | VR256X, VR256X, f64mem, |
| 121148 | /* VMINCPDZ256rmbk */ |
| 121149 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 121150 | /* VMINCPDZ256rmbkz */ |
| 121151 | VR256X, VK4WM, VR256X, f64mem, |
| 121152 | /* VMINCPDZ256rmk */ |
| 121153 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 121154 | /* VMINCPDZ256rmkz */ |
| 121155 | VR256X, VK4WM, VR256X, f256mem, |
| 121156 | /* VMINCPDZ256rr */ |
| 121157 | VR256X, VR256X, VR256X, |
| 121158 | /* VMINCPDZ256rrk */ |
| 121159 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 121160 | /* VMINCPDZ256rrkz */ |
| 121161 | VR256X, VK4WM, VR256X, VR256X, |
| 121162 | /* VMINCPDZrm */ |
| 121163 | VR512, VR512, f512mem, |
| 121164 | /* VMINCPDZrmb */ |
| 121165 | VR512, VR512, f64mem, |
| 121166 | /* VMINCPDZrmbk */ |
| 121167 | VR512, VR512, VK8WM, VR512, f64mem, |
| 121168 | /* VMINCPDZrmbkz */ |
| 121169 | VR512, VK8WM, VR512, f64mem, |
| 121170 | /* VMINCPDZrmk */ |
| 121171 | VR512, VR512, VK8WM, VR512, f512mem, |
| 121172 | /* VMINCPDZrmkz */ |
| 121173 | VR512, VK8WM, VR512, f512mem, |
| 121174 | /* VMINCPDZrr */ |
| 121175 | VR512, VR512, VR512, |
| 121176 | /* VMINCPDZrrk */ |
| 121177 | VR512, VR512, VK8WM, VR512, VR512, |
| 121178 | /* VMINCPDZrrkz */ |
| 121179 | VR512, VK8WM, VR512, VR512, |
| 121180 | /* VMINCPDrm */ |
| 121181 | VR128, VR128, f128mem, |
| 121182 | /* VMINCPDrr */ |
| 121183 | VR128, VR128, VR128, |
| 121184 | /* VMINCPHZ128rm */ |
| 121185 | VR128X, VR128X, f128mem, |
| 121186 | /* VMINCPHZ128rmb */ |
| 121187 | VR128X, VR128X, f16mem, |
| 121188 | /* VMINCPHZ128rmbk */ |
| 121189 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121190 | /* VMINCPHZ128rmbkz */ |
| 121191 | VR128X, VK8WM, VR128X, f16mem, |
| 121192 | /* VMINCPHZ128rmk */ |
| 121193 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121194 | /* VMINCPHZ128rmkz */ |
| 121195 | VR128X, VK8WM, VR128X, f128mem, |
| 121196 | /* VMINCPHZ128rr */ |
| 121197 | VR128X, VR128X, VR128X, |
| 121198 | /* VMINCPHZ128rrk */ |
| 121199 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121200 | /* VMINCPHZ128rrkz */ |
| 121201 | VR128X, VK8WM, VR128X, VR128X, |
| 121202 | /* VMINCPHZ256rm */ |
| 121203 | VR256X, VR256X, f256mem, |
| 121204 | /* VMINCPHZ256rmb */ |
| 121205 | VR256X, VR256X, f16mem, |
| 121206 | /* VMINCPHZ256rmbk */ |
| 121207 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121208 | /* VMINCPHZ256rmbkz */ |
| 121209 | VR256X, VK16WM, VR256X, f16mem, |
| 121210 | /* VMINCPHZ256rmk */ |
| 121211 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 121212 | /* VMINCPHZ256rmkz */ |
| 121213 | VR256X, VK16WM, VR256X, f256mem, |
| 121214 | /* VMINCPHZ256rr */ |
| 121215 | VR256X, VR256X, VR256X, |
| 121216 | /* VMINCPHZ256rrk */ |
| 121217 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 121218 | /* VMINCPHZ256rrkz */ |
| 121219 | VR256X, VK16WM, VR256X, VR256X, |
| 121220 | /* VMINCPHZrm */ |
| 121221 | VR512, VR512, f512mem, |
| 121222 | /* VMINCPHZrmb */ |
| 121223 | VR512, VR512, f16mem, |
| 121224 | /* VMINCPHZrmbk */ |
| 121225 | VR512, VR512, VK32WM, VR512, f16mem, |
| 121226 | /* VMINCPHZrmbkz */ |
| 121227 | VR512, VK32WM, VR512, f16mem, |
| 121228 | /* VMINCPHZrmk */ |
| 121229 | VR512, VR512, VK32WM, VR512, f512mem, |
| 121230 | /* VMINCPHZrmkz */ |
| 121231 | VR512, VK32WM, VR512, f512mem, |
| 121232 | /* VMINCPHZrr */ |
| 121233 | VR512, VR512, VR512, |
| 121234 | /* VMINCPHZrrk */ |
| 121235 | VR512, VR512, VK32WM, VR512, VR512, |
| 121236 | /* VMINCPHZrrkz */ |
| 121237 | VR512, VK32WM, VR512, VR512, |
| 121238 | /* VMINCPSYrm */ |
| 121239 | VR256, VR256, f256mem, |
| 121240 | /* VMINCPSYrr */ |
| 121241 | VR256, VR256, VR256, |
| 121242 | /* VMINCPSZ128rm */ |
| 121243 | VR128X, VR128X, f128mem, |
| 121244 | /* VMINCPSZ128rmb */ |
| 121245 | VR128X, VR128X, f32mem, |
| 121246 | /* VMINCPSZ128rmbk */ |
| 121247 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 121248 | /* VMINCPSZ128rmbkz */ |
| 121249 | VR128X, VK4WM, VR128X, f32mem, |
| 121250 | /* VMINCPSZ128rmk */ |
| 121251 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 121252 | /* VMINCPSZ128rmkz */ |
| 121253 | VR128X, VK4WM, VR128X, f128mem, |
| 121254 | /* VMINCPSZ128rr */ |
| 121255 | VR128X, VR128X, VR128X, |
| 121256 | /* VMINCPSZ128rrk */ |
| 121257 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121258 | /* VMINCPSZ128rrkz */ |
| 121259 | VR128X, VK4WM, VR128X, VR128X, |
| 121260 | /* VMINCPSZ256rm */ |
| 121261 | VR256X, VR256X, f256mem, |
| 121262 | /* VMINCPSZ256rmb */ |
| 121263 | VR256X, VR256X, f32mem, |
| 121264 | /* VMINCPSZ256rmbk */ |
| 121265 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 121266 | /* VMINCPSZ256rmbkz */ |
| 121267 | VR256X, VK8WM, VR256X, f32mem, |
| 121268 | /* VMINCPSZ256rmk */ |
| 121269 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 121270 | /* VMINCPSZ256rmkz */ |
| 121271 | VR256X, VK8WM, VR256X, f256mem, |
| 121272 | /* VMINCPSZ256rr */ |
| 121273 | VR256X, VR256X, VR256X, |
| 121274 | /* VMINCPSZ256rrk */ |
| 121275 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 121276 | /* VMINCPSZ256rrkz */ |
| 121277 | VR256X, VK8WM, VR256X, VR256X, |
| 121278 | /* VMINCPSZrm */ |
| 121279 | VR512, VR512, f512mem, |
| 121280 | /* VMINCPSZrmb */ |
| 121281 | VR512, VR512, f32mem, |
| 121282 | /* VMINCPSZrmbk */ |
| 121283 | VR512, VR512, VK16WM, VR512, f32mem, |
| 121284 | /* VMINCPSZrmbkz */ |
| 121285 | VR512, VK16WM, VR512, f32mem, |
| 121286 | /* VMINCPSZrmk */ |
| 121287 | VR512, VR512, VK16WM, VR512, f512mem, |
| 121288 | /* VMINCPSZrmkz */ |
| 121289 | VR512, VK16WM, VR512, f512mem, |
| 121290 | /* VMINCPSZrr */ |
| 121291 | VR512, VR512, VR512, |
| 121292 | /* VMINCPSZrrk */ |
| 121293 | VR512, VR512, VK16WM, VR512, VR512, |
| 121294 | /* VMINCPSZrrkz */ |
| 121295 | VR512, VK16WM, VR512, VR512, |
| 121296 | /* VMINCPSrm */ |
| 121297 | VR128, VR128, f128mem, |
| 121298 | /* VMINCPSrr */ |
| 121299 | VR128, VR128, VR128, |
| 121300 | /* VMINCSDZrm */ |
| 121301 | FR64X, FR64X, f64mem, |
| 121302 | /* VMINCSDZrr */ |
| 121303 | FR64X, FR64X, FR64X, |
| 121304 | /* VMINCSDrm */ |
| 121305 | FR64, FR64, f64mem, |
| 121306 | /* VMINCSDrr */ |
| 121307 | FR64, FR64, FR64, |
| 121308 | /* VMINCSHZrm */ |
| 121309 | FR16X, FR16X, f16mem, |
| 121310 | /* VMINCSHZrr */ |
| 121311 | FR16X, FR16X, FR16X, |
| 121312 | /* VMINCSSZrm */ |
| 121313 | FR32X, FR32X, f32mem, |
| 121314 | /* VMINCSSZrr */ |
| 121315 | FR32X, FR32X, FR32X, |
| 121316 | /* VMINCSSrm */ |
| 121317 | FR32, FR32, f32mem, |
| 121318 | /* VMINCSSrr */ |
| 121319 | FR32, FR32, FR32, |
| 121320 | /* VMINMAXBF16Z128rmbi */ |
| 121321 | VR128X, VR128X, f16mem, i32u8imm, |
| 121322 | /* VMINMAXBF16Z128rmbik */ |
| 121323 | VR128X, VR128X, VK8WM, VR128X, f16mem, i32u8imm, |
| 121324 | /* VMINMAXBF16Z128rmbikz */ |
| 121325 | VR128X, VK8WM, VR128X, f16mem, i32u8imm, |
| 121326 | /* VMINMAXBF16Z128rmi */ |
| 121327 | VR128X, VR128X, f128mem, i32u8imm, |
| 121328 | /* VMINMAXBF16Z128rmik */ |
| 121329 | VR128X, VR128X, VK8WM, VR128X, f128mem, i32u8imm, |
| 121330 | /* VMINMAXBF16Z128rmikz */ |
| 121331 | VR128X, VK8WM, VR128X, f128mem, i32u8imm, |
| 121332 | /* VMINMAXBF16Z128rri */ |
| 121333 | VR128X, VR128X, VR128X, i32u8imm, |
| 121334 | /* VMINMAXBF16Z128rrik */ |
| 121335 | VR128X, VR128X, VK8WM, VR128X, VR128X, i32u8imm, |
| 121336 | /* VMINMAXBF16Z128rrikz */ |
| 121337 | VR128X, VK8WM, VR128X, VR128X, i32u8imm, |
| 121338 | /* VMINMAXBF16Z256rmbi */ |
| 121339 | VR256X, VR256X, f16mem, i32u8imm, |
| 121340 | /* VMINMAXBF16Z256rmbik */ |
| 121341 | VR256X, VR256X, VK16WM, VR256X, f16mem, i32u8imm, |
| 121342 | /* VMINMAXBF16Z256rmbikz */ |
| 121343 | VR256X, VK16WM, VR256X, f16mem, i32u8imm, |
| 121344 | /* VMINMAXBF16Z256rmi */ |
| 121345 | VR256X, VR256X, f256mem, i32u8imm, |
| 121346 | /* VMINMAXBF16Z256rmik */ |
| 121347 | VR256X, VR256X, VK16WM, VR256X, f256mem, i32u8imm, |
| 121348 | /* VMINMAXBF16Z256rmikz */ |
| 121349 | VR256X, VK16WM, VR256X, f256mem, i32u8imm, |
| 121350 | /* VMINMAXBF16Z256rri */ |
| 121351 | VR256X, VR256X, VR256X, i32u8imm, |
| 121352 | /* VMINMAXBF16Z256rrik */ |
| 121353 | VR256X, VR256X, VK16WM, VR256X, VR256X, i32u8imm, |
| 121354 | /* VMINMAXBF16Z256rrikz */ |
| 121355 | VR256X, VK16WM, VR256X, VR256X, i32u8imm, |
| 121356 | /* VMINMAXBF16Zrmbi */ |
| 121357 | VR512, VR512, f16mem, i32u8imm, |
| 121358 | /* VMINMAXBF16Zrmbik */ |
| 121359 | VR512, VR512, VK32WM, VR512, f16mem, i32u8imm, |
| 121360 | /* VMINMAXBF16Zrmbikz */ |
| 121361 | VR512, VK32WM, VR512, f16mem, i32u8imm, |
| 121362 | /* VMINMAXBF16Zrmi */ |
| 121363 | VR512, VR512, f512mem, i32u8imm, |
| 121364 | /* VMINMAXBF16Zrmik */ |
| 121365 | VR512, VR512, VK32WM, VR512, f512mem, i32u8imm, |
| 121366 | /* VMINMAXBF16Zrmikz */ |
| 121367 | VR512, VK32WM, VR512, f512mem, i32u8imm, |
| 121368 | /* VMINMAXBF16Zrri */ |
| 121369 | VR512, VR512, VR512, i32u8imm, |
| 121370 | /* VMINMAXBF16Zrrik */ |
| 121371 | VR512, VR512, VK32WM, VR512, VR512, i32u8imm, |
| 121372 | /* VMINMAXBF16Zrrikz */ |
| 121373 | VR512, VK32WM, VR512, VR512, i32u8imm, |
| 121374 | /* VMINMAXPDZ128rmbi */ |
| 121375 | VR128X, VR128X, f64mem, i32u8imm, |
| 121376 | /* VMINMAXPDZ128rmbik */ |
| 121377 | VR128X, VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 121378 | /* VMINMAXPDZ128rmbikz */ |
| 121379 | VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 121380 | /* VMINMAXPDZ128rmi */ |
| 121381 | VR128X, VR128X, f128mem, i32u8imm, |
| 121382 | /* VMINMAXPDZ128rmik */ |
| 121383 | VR128X, VR128X, VK2WM, VR128X, f128mem, i32u8imm, |
| 121384 | /* VMINMAXPDZ128rmikz */ |
| 121385 | VR128X, VK2WM, VR128X, f128mem, i32u8imm, |
| 121386 | /* VMINMAXPDZ128rri */ |
| 121387 | VR128X, VR128X, VR128X, i32u8imm, |
| 121388 | /* VMINMAXPDZ128rrik */ |
| 121389 | VR128X, VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 121390 | /* VMINMAXPDZ128rrikz */ |
| 121391 | VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 121392 | /* VMINMAXPDZ256rmbi */ |
| 121393 | VR256X, VR256X, f64mem, i32u8imm, |
| 121394 | /* VMINMAXPDZ256rmbik */ |
| 121395 | VR256X, VR256X, VK4WM, VR256X, f64mem, i32u8imm, |
| 121396 | /* VMINMAXPDZ256rmbikz */ |
| 121397 | VR256X, VK4WM, VR256X, f64mem, i32u8imm, |
| 121398 | /* VMINMAXPDZ256rmi */ |
| 121399 | VR256X, VR256X, f256mem, i32u8imm, |
| 121400 | /* VMINMAXPDZ256rmik */ |
| 121401 | VR256X, VR256X, VK4WM, VR256X, f256mem, i32u8imm, |
| 121402 | /* VMINMAXPDZ256rmikz */ |
| 121403 | VR256X, VK4WM, VR256X, f256mem, i32u8imm, |
| 121404 | /* VMINMAXPDZ256rri */ |
| 121405 | VR256X, VR256X, VR256X, i32u8imm, |
| 121406 | /* VMINMAXPDZ256rrik */ |
| 121407 | VR256X, VR256X, VK4WM, VR256X, VR256X, i32u8imm, |
| 121408 | /* VMINMAXPDZ256rrikz */ |
| 121409 | VR256X, VK4WM, VR256X, VR256X, i32u8imm, |
| 121410 | /* VMINMAXPDZrmbi */ |
| 121411 | VR512, VR512, f64mem, i32u8imm, |
| 121412 | /* VMINMAXPDZrmbik */ |
| 121413 | VR512, VR512, VK8WM, VR512, f64mem, i32u8imm, |
| 121414 | /* VMINMAXPDZrmbikz */ |
| 121415 | VR512, VK8WM, VR512, f64mem, i32u8imm, |
| 121416 | /* VMINMAXPDZrmi */ |
| 121417 | VR512, VR512, f512mem, i32u8imm, |
| 121418 | /* VMINMAXPDZrmik */ |
| 121419 | VR512, VR512, VK8WM, VR512, f512mem, i32u8imm, |
| 121420 | /* VMINMAXPDZrmikz */ |
| 121421 | VR512, VK8WM, VR512, f512mem, i32u8imm, |
| 121422 | /* VMINMAXPDZrri */ |
| 121423 | VR512, VR512, VR512, i32u8imm, |
| 121424 | /* VMINMAXPDZrrib */ |
| 121425 | VR512, VR512, VR512, i32u8imm, |
| 121426 | /* VMINMAXPDZrribk */ |
| 121427 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 121428 | /* VMINMAXPDZrribkz */ |
| 121429 | VR512, VK8WM, VR512, VR512, i32u8imm, |
| 121430 | /* VMINMAXPDZrrik */ |
| 121431 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 121432 | /* VMINMAXPDZrrikz */ |
| 121433 | VR512, VK8WM, VR512, VR512, i32u8imm, |
| 121434 | /* VMINMAXPHZ128rmbi */ |
| 121435 | VR128X, VR128X, f16mem, i32u8imm, |
| 121436 | /* VMINMAXPHZ128rmbik */ |
| 121437 | VR128X, VR128X, VK8WM, VR128X, f16mem, i32u8imm, |
| 121438 | /* VMINMAXPHZ128rmbikz */ |
| 121439 | VR128X, VK8WM, VR128X, f16mem, i32u8imm, |
| 121440 | /* VMINMAXPHZ128rmi */ |
| 121441 | VR128X, VR128X, f128mem, i32u8imm, |
| 121442 | /* VMINMAXPHZ128rmik */ |
| 121443 | VR128X, VR128X, VK8WM, VR128X, f128mem, i32u8imm, |
| 121444 | /* VMINMAXPHZ128rmikz */ |
| 121445 | VR128X, VK8WM, VR128X, f128mem, i32u8imm, |
| 121446 | /* VMINMAXPHZ128rri */ |
| 121447 | VR128X, VR128X, VR128X, i32u8imm, |
| 121448 | /* VMINMAXPHZ128rrik */ |
| 121449 | VR128X, VR128X, VK8WM, VR128X, VR128X, i32u8imm, |
| 121450 | /* VMINMAXPHZ128rrikz */ |
| 121451 | VR128X, VK8WM, VR128X, VR128X, i32u8imm, |
| 121452 | /* VMINMAXPHZ256rmbi */ |
| 121453 | VR256X, VR256X, f16mem, i32u8imm, |
| 121454 | /* VMINMAXPHZ256rmbik */ |
| 121455 | VR256X, VR256X, VK16WM, VR256X, f16mem, i32u8imm, |
| 121456 | /* VMINMAXPHZ256rmbikz */ |
| 121457 | VR256X, VK16WM, VR256X, f16mem, i32u8imm, |
| 121458 | /* VMINMAXPHZ256rmi */ |
| 121459 | VR256X, VR256X, f256mem, i32u8imm, |
| 121460 | /* VMINMAXPHZ256rmik */ |
| 121461 | VR256X, VR256X, VK16WM, VR256X, f256mem, i32u8imm, |
| 121462 | /* VMINMAXPHZ256rmikz */ |
| 121463 | VR256X, VK16WM, VR256X, f256mem, i32u8imm, |
| 121464 | /* VMINMAXPHZ256rri */ |
| 121465 | VR256X, VR256X, VR256X, i32u8imm, |
| 121466 | /* VMINMAXPHZ256rrik */ |
| 121467 | VR256X, VR256X, VK16WM, VR256X, VR256X, i32u8imm, |
| 121468 | /* VMINMAXPHZ256rrikz */ |
| 121469 | VR256X, VK16WM, VR256X, VR256X, i32u8imm, |
| 121470 | /* VMINMAXPHZrmbi */ |
| 121471 | VR512, VR512, f16mem, i32u8imm, |
| 121472 | /* VMINMAXPHZrmbik */ |
| 121473 | VR512, VR512, VK32WM, VR512, f16mem, i32u8imm, |
| 121474 | /* VMINMAXPHZrmbikz */ |
| 121475 | VR512, VK32WM, VR512, f16mem, i32u8imm, |
| 121476 | /* VMINMAXPHZrmi */ |
| 121477 | VR512, VR512, f512mem, i32u8imm, |
| 121478 | /* VMINMAXPHZrmik */ |
| 121479 | VR512, VR512, VK32WM, VR512, f512mem, i32u8imm, |
| 121480 | /* VMINMAXPHZrmikz */ |
| 121481 | VR512, VK32WM, VR512, f512mem, i32u8imm, |
| 121482 | /* VMINMAXPHZrri */ |
| 121483 | VR512, VR512, VR512, i32u8imm, |
| 121484 | /* VMINMAXPHZrrib */ |
| 121485 | VR512, VR512, VR512, i32u8imm, |
| 121486 | /* VMINMAXPHZrribk */ |
| 121487 | VR512, VR512, VK32WM, VR512, VR512, i32u8imm, |
| 121488 | /* VMINMAXPHZrribkz */ |
| 121489 | VR512, VK32WM, VR512, VR512, i32u8imm, |
| 121490 | /* VMINMAXPHZrrik */ |
| 121491 | VR512, VR512, VK32WM, VR512, VR512, i32u8imm, |
| 121492 | /* VMINMAXPHZrrikz */ |
| 121493 | VR512, VK32WM, VR512, VR512, i32u8imm, |
| 121494 | /* VMINMAXPSZ128rmbi */ |
| 121495 | VR128X, VR128X, f32mem, i32u8imm, |
| 121496 | /* VMINMAXPSZ128rmbik */ |
| 121497 | VR128X, VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 121498 | /* VMINMAXPSZ128rmbikz */ |
| 121499 | VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 121500 | /* VMINMAXPSZ128rmi */ |
| 121501 | VR128X, VR128X, f128mem, i32u8imm, |
| 121502 | /* VMINMAXPSZ128rmik */ |
| 121503 | VR128X, VR128X, VK4WM, VR128X, f128mem, i32u8imm, |
| 121504 | /* VMINMAXPSZ128rmikz */ |
| 121505 | VR128X, VK4WM, VR128X, f128mem, i32u8imm, |
| 121506 | /* VMINMAXPSZ128rri */ |
| 121507 | VR128X, VR128X, VR128X, i32u8imm, |
| 121508 | /* VMINMAXPSZ128rrik */ |
| 121509 | VR128X, VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 121510 | /* VMINMAXPSZ128rrikz */ |
| 121511 | VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 121512 | /* VMINMAXPSZ256rmbi */ |
| 121513 | VR256X, VR256X, f32mem, i32u8imm, |
| 121514 | /* VMINMAXPSZ256rmbik */ |
| 121515 | VR256X, VR256X, VK8WM, VR256X, f32mem, i32u8imm, |
| 121516 | /* VMINMAXPSZ256rmbikz */ |
| 121517 | VR256X, VK8WM, VR256X, f32mem, i32u8imm, |
| 121518 | /* VMINMAXPSZ256rmi */ |
| 121519 | VR256X, VR256X, f256mem, i32u8imm, |
| 121520 | /* VMINMAXPSZ256rmik */ |
| 121521 | VR256X, VR256X, VK8WM, VR256X, f256mem, i32u8imm, |
| 121522 | /* VMINMAXPSZ256rmikz */ |
| 121523 | VR256X, VK8WM, VR256X, f256mem, i32u8imm, |
| 121524 | /* VMINMAXPSZ256rri */ |
| 121525 | VR256X, VR256X, VR256X, i32u8imm, |
| 121526 | /* VMINMAXPSZ256rrik */ |
| 121527 | VR256X, VR256X, VK8WM, VR256X, VR256X, i32u8imm, |
| 121528 | /* VMINMAXPSZ256rrikz */ |
| 121529 | VR256X, VK8WM, VR256X, VR256X, i32u8imm, |
| 121530 | /* VMINMAXPSZrmbi */ |
| 121531 | VR512, VR512, f32mem, i32u8imm, |
| 121532 | /* VMINMAXPSZrmbik */ |
| 121533 | VR512, VR512, VK16WM, VR512, f32mem, i32u8imm, |
| 121534 | /* VMINMAXPSZrmbikz */ |
| 121535 | VR512, VK16WM, VR512, f32mem, i32u8imm, |
| 121536 | /* VMINMAXPSZrmi */ |
| 121537 | VR512, VR512, f512mem, i32u8imm, |
| 121538 | /* VMINMAXPSZrmik */ |
| 121539 | VR512, VR512, VK16WM, VR512, f512mem, i32u8imm, |
| 121540 | /* VMINMAXPSZrmikz */ |
| 121541 | VR512, VK16WM, VR512, f512mem, i32u8imm, |
| 121542 | /* VMINMAXPSZrri */ |
| 121543 | VR512, VR512, VR512, i32u8imm, |
| 121544 | /* VMINMAXPSZrrib */ |
| 121545 | VR512, VR512, VR512, i32u8imm, |
| 121546 | /* VMINMAXPSZrribk */ |
| 121547 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 121548 | /* VMINMAXPSZrribkz */ |
| 121549 | VR512, VK16WM, VR512, VR512, i32u8imm, |
| 121550 | /* VMINMAXPSZrrik */ |
| 121551 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 121552 | /* VMINMAXPSZrrikz */ |
| 121553 | VR512, VK16WM, VR512, VR512, i32u8imm, |
| 121554 | /* VMINMAXSDrmi */ |
| 121555 | FR64X, FR64X, f64mem, i32u8imm, |
| 121556 | /* VMINMAXSDrmi_Int */ |
| 121557 | VR128X, VR128X, f64mem, i32u8imm, |
| 121558 | /* VMINMAXSDrmik_Int */ |
| 121559 | VR128X, VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 121560 | /* VMINMAXSDrmikz_Int */ |
| 121561 | VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 121562 | /* VMINMAXSDrri */ |
| 121563 | FR64X, FR64X, FR64X, i32u8imm, |
| 121564 | /* VMINMAXSDrri_Int */ |
| 121565 | VR128X, VR128X, VR128X, i32u8imm, |
| 121566 | /* VMINMAXSDrrib_Int */ |
| 121567 | VR128X, VR128X, VR128X, i32u8imm, |
| 121568 | /* VMINMAXSDrribk_Int */ |
| 121569 | VR128X, VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 121570 | /* VMINMAXSDrribkz_Int */ |
| 121571 | VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 121572 | /* VMINMAXSDrrik_Int */ |
| 121573 | VR128X, VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 121574 | /* VMINMAXSDrrikz_Int */ |
| 121575 | VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 121576 | /* VMINMAXSHrmi */ |
| 121577 | FR16X, FR16X, f16mem, i32u8imm, |
| 121578 | /* VMINMAXSHrmi_Int */ |
| 121579 | VR128X, VR128X, f16mem, i32u8imm, |
| 121580 | /* VMINMAXSHrmik_Int */ |
| 121581 | VR128X, VR128X, VK8WM, VR128X, f16mem, i32u8imm, |
| 121582 | /* VMINMAXSHrmikz_Int */ |
| 121583 | VR128X, VK8WM, VR128X, f16mem, i32u8imm, |
| 121584 | /* VMINMAXSHrri */ |
| 121585 | FR16X, FR16X, FR16X, i32u8imm, |
| 121586 | /* VMINMAXSHrri_Int */ |
| 121587 | VR128X, VR128X, VR128X, i32u8imm, |
| 121588 | /* VMINMAXSHrrib_Int */ |
| 121589 | VR128X, VR128X, VR128X, i32u8imm, |
| 121590 | /* VMINMAXSHrribk_Int */ |
| 121591 | VR128X, VR128X, VK8WM, VR128X, VR128X, i32u8imm, |
| 121592 | /* VMINMAXSHrribkz_Int */ |
| 121593 | VR128X, VK8WM, VR128X, VR128X, i32u8imm, |
| 121594 | /* VMINMAXSHrrik_Int */ |
| 121595 | VR128X, VR128X, VK8WM, VR128X, VR128X, i32u8imm, |
| 121596 | /* VMINMAXSHrrikz_Int */ |
| 121597 | VR128X, VK8WM, VR128X, VR128X, i32u8imm, |
| 121598 | /* VMINMAXSSrmi */ |
| 121599 | FR32X, FR32X, f32mem, i32u8imm, |
| 121600 | /* VMINMAXSSrmi_Int */ |
| 121601 | VR128X, VR128X, f32mem, i32u8imm, |
| 121602 | /* VMINMAXSSrmik_Int */ |
| 121603 | VR128X, VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 121604 | /* VMINMAXSSrmikz_Int */ |
| 121605 | VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 121606 | /* VMINMAXSSrri */ |
| 121607 | FR32X, FR32X, FR32X, i32u8imm, |
| 121608 | /* VMINMAXSSrri_Int */ |
| 121609 | VR128X, VR128X, VR128X, i32u8imm, |
| 121610 | /* VMINMAXSSrrib_Int */ |
| 121611 | VR128X, VR128X, VR128X, i32u8imm, |
| 121612 | /* VMINMAXSSrribk_Int */ |
| 121613 | VR128X, VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 121614 | /* VMINMAXSSrribkz_Int */ |
| 121615 | VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 121616 | /* VMINMAXSSrrik_Int */ |
| 121617 | VR128X, VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 121618 | /* VMINMAXSSrrikz_Int */ |
| 121619 | VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 121620 | /* VMINPDYrm */ |
| 121621 | VR256, VR256, f256mem, |
| 121622 | /* VMINPDYrr */ |
| 121623 | VR256, VR256, VR256, |
| 121624 | /* VMINPDZ128rm */ |
| 121625 | VR128X, VR128X, f128mem, |
| 121626 | /* VMINPDZ128rmb */ |
| 121627 | VR128X, VR128X, f64mem, |
| 121628 | /* VMINPDZ128rmbk */ |
| 121629 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 121630 | /* VMINPDZ128rmbkz */ |
| 121631 | VR128X, VK2WM, VR128X, f64mem, |
| 121632 | /* VMINPDZ128rmk */ |
| 121633 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 121634 | /* VMINPDZ128rmkz */ |
| 121635 | VR128X, VK2WM, VR128X, f128mem, |
| 121636 | /* VMINPDZ128rr */ |
| 121637 | VR128X, VR128X, VR128X, |
| 121638 | /* VMINPDZ128rrk */ |
| 121639 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 121640 | /* VMINPDZ128rrkz */ |
| 121641 | VR128X, VK2WM, VR128X, VR128X, |
| 121642 | /* VMINPDZ256rm */ |
| 121643 | VR256X, VR256X, f256mem, |
| 121644 | /* VMINPDZ256rmb */ |
| 121645 | VR256X, VR256X, f64mem, |
| 121646 | /* VMINPDZ256rmbk */ |
| 121647 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 121648 | /* VMINPDZ256rmbkz */ |
| 121649 | VR256X, VK4WM, VR256X, f64mem, |
| 121650 | /* VMINPDZ256rmk */ |
| 121651 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 121652 | /* VMINPDZ256rmkz */ |
| 121653 | VR256X, VK4WM, VR256X, f256mem, |
| 121654 | /* VMINPDZ256rr */ |
| 121655 | VR256X, VR256X, VR256X, |
| 121656 | /* VMINPDZ256rrk */ |
| 121657 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 121658 | /* VMINPDZ256rrkz */ |
| 121659 | VR256X, VK4WM, VR256X, VR256X, |
| 121660 | /* VMINPDZrm */ |
| 121661 | VR512, VR512, f512mem, |
| 121662 | /* VMINPDZrmb */ |
| 121663 | VR512, VR512, f64mem, |
| 121664 | /* VMINPDZrmbk */ |
| 121665 | VR512, VR512, VK8WM, VR512, f64mem, |
| 121666 | /* VMINPDZrmbkz */ |
| 121667 | VR512, VK8WM, VR512, f64mem, |
| 121668 | /* VMINPDZrmk */ |
| 121669 | VR512, VR512, VK8WM, VR512, f512mem, |
| 121670 | /* VMINPDZrmkz */ |
| 121671 | VR512, VK8WM, VR512, f512mem, |
| 121672 | /* VMINPDZrr */ |
| 121673 | VR512, VR512, VR512, |
| 121674 | /* VMINPDZrrb */ |
| 121675 | VR512, VR512, VR512, |
| 121676 | /* VMINPDZrrbk */ |
| 121677 | VR512, VR512, VK8WM, VR512, VR512, |
| 121678 | /* VMINPDZrrbkz */ |
| 121679 | VR512, VK8WM, VR512, VR512, |
| 121680 | /* VMINPDZrrk */ |
| 121681 | VR512, VR512, VK8WM, VR512, VR512, |
| 121682 | /* VMINPDZrrkz */ |
| 121683 | VR512, VK8WM, VR512, VR512, |
| 121684 | /* VMINPDrm */ |
| 121685 | VR128, VR128, f128mem, |
| 121686 | /* VMINPDrr */ |
| 121687 | VR128, VR128, VR128, |
| 121688 | /* VMINPHZ128rm */ |
| 121689 | VR128X, VR128X, f128mem, |
| 121690 | /* VMINPHZ128rmb */ |
| 121691 | VR128X, VR128X, f16mem, |
| 121692 | /* VMINPHZ128rmbk */ |
| 121693 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121694 | /* VMINPHZ128rmbkz */ |
| 121695 | VR128X, VK8WM, VR128X, f16mem, |
| 121696 | /* VMINPHZ128rmk */ |
| 121697 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121698 | /* VMINPHZ128rmkz */ |
| 121699 | VR128X, VK8WM, VR128X, f128mem, |
| 121700 | /* VMINPHZ128rr */ |
| 121701 | VR128X, VR128X, VR128X, |
| 121702 | /* VMINPHZ128rrk */ |
| 121703 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121704 | /* VMINPHZ128rrkz */ |
| 121705 | VR128X, VK8WM, VR128X, VR128X, |
| 121706 | /* VMINPHZ256rm */ |
| 121707 | VR256X, VR256X, f256mem, |
| 121708 | /* VMINPHZ256rmb */ |
| 121709 | VR256X, VR256X, f16mem, |
| 121710 | /* VMINPHZ256rmbk */ |
| 121711 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121712 | /* VMINPHZ256rmbkz */ |
| 121713 | VR256X, VK16WM, VR256X, f16mem, |
| 121714 | /* VMINPHZ256rmk */ |
| 121715 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 121716 | /* VMINPHZ256rmkz */ |
| 121717 | VR256X, VK16WM, VR256X, f256mem, |
| 121718 | /* VMINPHZ256rr */ |
| 121719 | VR256X, VR256X, VR256X, |
| 121720 | /* VMINPHZ256rrk */ |
| 121721 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 121722 | /* VMINPHZ256rrkz */ |
| 121723 | VR256X, VK16WM, VR256X, VR256X, |
| 121724 | /* VMINPHZrm */ |
| 121725 | VR512, VR512, f512mem, |
| 121726 | /* VMINPHZrmb */ |
| 121727 | VR512, VR512, f16mem, |
| 121728 | /* VMINPHZrmbk */ |
| 121729 | VR512, VR512, VK32WM, VR512, f16mem, |
| 121730 | /* VMINPHZrmbkz */ |
| 121731 | VR512, VK32WM, VR512, f16mem, |
| 121732 | /* VMINPHZrmk */ |
| 121733 | VR512, VR512, VK32WM, VR512, f512mem, |
| 121734 | /* VMINPHZrmkz */ |
| 121735 | VR512, VK32WM, VR512, f512mem, |
| 121736 | /* VMINPHZrr */ |
| 121737 | VR512, VR512, VR512, |
| 121738 | /* VMINPHZrrb */ |
| 121739 | VR512, VR512, VR512, |
| 121740 | /* VMINPHZrrbk */ |
| 121741 | VR512, VR512, VK32WM, VR512, VR512, |
| 121742 | /* VMINPHZrrbkz */ |
| 121743 | VR512, VK32WM, VR512, VR512, |
| 121744 | /* VMINPHZrrk */ |
| 121745 | VR512, VR512, VK32WM, VR512, VR512, |
| 121746 | /* VMINPHZrrkz */ |
| 121747 | VR512, VK32WM, VR512, VR512, |
| 121748 | /* VMINPSYrm */ |
| 121749 | VR256, VR256, f256mem, |
| 121750 | /* VMINPSYrr */ |
| 121751 | VR256, VR256, VR256, |
| 121752 | /* VMINPSZ128rm */ |
| 121753 | VR128X, VR128X, f128mem, |
| 121754 | /* VMINPSZ128rmb */ |
| 121755 | VR128X, VR128X, f32mem, |
| 121756 | /* VMINPSZ128rmbk */ |
| 121757 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 121758 | /* VMINPSZ128rmbkz */ |
| 121759 | VR128X, VK4WM, VR128X, f32mem, |
| 121760 | /* VMINPSZ128rmk */ |
| 121761 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 121762 | /* VMINPSZ128rmkz */ |
| 121763 | VR128X, VK4WM, VR128X, f128mem, |
| 121764 | /* VMINPSZ128rr */ |
| 121765 | VR128X, VR128X, VR128X, |
| 121766 | /* VMINPSZ128rrk */ |
| 121767 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121768 | /* VMINPSZ128rrkz */ |
| 121769 | VR128X, VK4WM, VR128X, VR128X, |
| 121770 | /* VMINPSZ256rm */ |
| 121771 | VR256X, VR256X, f256mem, |
| 121772 | /* VMINPSZ256rmb */ |
| 121773 | VR256X, VR256X, f32mem, |
| 121774 | /* VMINPSZ256rmbk */ |
| 121775 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 121776 | /* VMINPSZ256rmbkz */ |
| 121777 | VR256X, VK8WM, VR256X, f32mem, |
| 121778 | /* VMINPSZ256rmk */ |
| 121779 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 121780 | /* VMINPSZ256rmkz */ |
| 121781 | VR256X, VK8WM, VR256X, f256mem, |
| 121782 | /* VMINPSZ256rr */ |
| 121783 | VR256X, VR256X, VR256X, |
| 121784 | /* VMINPSZ256rrk */ |
| 121785 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 121786 | /* VMINPSZ256rrkz */ |
| 121787 | VR256X, VK8WM, VR256X, VR256X, |
| 121788 | /* VMINPSZrm */ |
| 121789 | VR512, VR512, f512mem, |
| 121790 | /* VMINPSZrmb */ |
| 121791 | VR512, VR512, f32mem, |
| 121792 | /* VMINPSZrmbk */ |
| 121793 | VR512, VR512, VK16WM, VR512, f32mem, |
| 121794 | /* VMINPSZrmbkz */ |
| 121795 | VR512, VK16WM, VR512, f32mem, |
| 121796 | /* VMINPSZrmk */ |
| 121797 | VR512, VR512, VK16WM, VR512, f512mem, |
| 121798 | /* VMINPSZrmkz */ |
| 121799 | VR512, VK16WM, VR512, f512mem, |
| 121800 | /* VMINPSZrr */ |
| 121801 | VR512, VR512, VR512, |
| 121802 | /* VMINPSZrrb */ |
| 121803 | VR512, VR512, VR512, |
| 121804 | /* VMINPSZrrbk */ |
| 121805 | VR512, VR512, VK16WM, VR512, VR512, |
| 121806 | /* VMINPSZrrbkz */ |
| 121807 | VR512, VK16WM, VR512, VR512, |
| 121808 | /* VMINPSZrrk */ |
| 121809 | VR512, VR512, VK16WM, VR512, VR512, |
| 121810 | /* VMINPSZrrkz */ |
| 121811 | VR512, VK16WM, VR512, VR512, |
| 121812 | /* VMINPSrm */ |
| 121813 | VR128, VR128, f128mem, |
| 121814 | /* VMINPSrr */ |
| 121815 | VR128, VR128, VR128, |
| 121816 | /* VMINSDZrm */ |
| 121817 | FR64X, FR64X, f64mem, |
| 121818 | /* VMINSDZrm_Int */ |
| 121819 | VR128X, VR128X, sdmem, |
| 121820 | /* VMINSDZrmk_Int */ |
| 121821 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 121822 | /* VMINSDZrmkz_Int */ |
| 121823 | VR128X, VK1WM, VR128X, sdmem, |
| 121824 | /* VMINSDZrr */ |
| 121825 | FR64X, FR64X, FR64X, |
| 121826 | /* VMINSDZrr_Int */ |
| 121827 | VR128X, VR128X, VR128X, |
| 121828 | /* VMINSDZrrb_Int */ |
| 121829 | VR128X, VR128X, VR128X, |
| 121830 | /* VMINSDZrrbk_Int */ |
| 121831 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121832 | /* VMINSDZrrbkz_Int */ |
| 121833 | VR128X, VK1WM, VR128X, VR128X, |
| 121834 | /* VMINSDZrrk_Int */ |
| 121835 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121836 | /* VMINSDZrrkz_Int */ |
| 121837 | VR128X, VK1WM, VR128X, VR128X, |
| 121838 | /* VMINSDrm */ |
| 121839 | FR64, FR64, f64mem, |
| 121840 | /* VMINSDrm_Int */ |
| 121841 | VR128, VR128, sdmem, |
| 121842 | /* VMINSDrr */ |
| 121843 | FR64, FR64, FR64, |
| 121844 | /* VMINSDrr_Int */ |
| 121845 | VR128, VR128, VR128, |
| 121846 | /* VMINSHZrm */ |
| 121847 | FR16X, FR16X, f16mem, |
| 121848 | /* VMINSHZrm_Int */ |
| 121849 | VR128X, VR128X, shmem, |
| 121850 | /* VMINSHZrmk_Int */ |
| 121851 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 121852 | /* VMINSHZrmkz_Int */ |
| 121853 | VR128X, VK1WM, VR128X, shmem, |
| 121854 | /* VMINSHZrr */ |
| 121855 | FR16X, FR16X, FR16X, |
| 121856 | /* VMINSHZrr_Int */ |
| 121857 | VR128X, VR128X, VR128X, |
| 121858 | /* VMINSHZrrb_Int */ |
| 121859 | VR128X, VR128X, VR128X, |
| 121860 | /* VMINSHZrrbk_Int */ |
| 121861 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121862 | /* VMINSHZrrbkz_Int */ |
| 121863 | VR128X, VK1WM, VR128X, VR128X, |
| 121864 | /* VMINSHZrrk_Int */ |
| 121865 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121866 | /* VMINSHZrrkz_Int */ |
| 121867 | VR128X, VK1WM, VR128X, VR128X, |
| 121868 | /* VMINSSZrm */ |
| 121869 | FR32X, FR32X, f32mem, |
| 121870 | /* VMINSSZrm_Int */ |
| 121871 | VR128X, VR128X, ssmem, |
| 121872 | /* VMINSSZrmk_Int */ |
| 121873 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 121874 | /* VMINSSZrmkz_Int */ |
| 121875 | VR128X, VK1WM, VR128X, ssmem, |
| 121876 | /* VMINSSZrr */ |
| 121877 | FR32X, FR32X, FR32X, |
| 121878 | /* VMINSSZrr_Int */ |
| 121879 | VR128X, VR128X, VR128X, |
| 121880 | /* VMINSSZrrb_Int */ |
| 121881 | VR128X, VR128X, VR128X, |
| 121882 | /* VMINSSZrrbk_Int */ |
| 121883 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121884 | /* VMINSSZrrbkz_Int */ |
| 121885 | VR128X, VK1WM, VR128X, VR128X, |
| 121886 | /* VMINSSZrrk_Int */ |
| 121887 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121888 | /* VMINSSZrrkz_Int */ |
| 121889 | VR128X, VK1WM, VR128X, VR128X, |
| 121890 | /* VMINSSrm */ |
| 121891 | FR32, FR32, f32mem, |
| 121892 | /* VMINSSrm_Int */ |
| 121893 | VR128, VR128, ssmem, |
| 121894 | /* VMINSSrr */ |
| 121895 | FR32, FR32, FR32, |
| 121896 | /* VMINSSrr_Int */ |
| 121897 | VR128, VR128, VR128, |
| 121898 | /* VMLAUNCH */ |
| 121899 | /* VMLOAD32 */ |
| 121900 | /* VMLOAD64 */ |
| 121901 | /* VMMCALL */ |
| 121902 | /* VMOV64toPQIZrm */ |
| 121903 | VR128X, i64mem, |
| 121904 | /* VMOV64toPQIZrr */ |
| 121905 | VR128X, GR64, |
| 121906 | /* VMOV64toPQIrm */ |
| 121907 | VR128, i64mem, |
| 121908 | /* VMOV64toPQIrr */ |
| 121909 | VR128, GR64, |
| 121910 | /* VMOV64toSDZrr */ |
| 121911 | FR64X, GR64, |
| 121912 | /* VMOV64toSDrr */ |
| 121913 | FR64, GR64, |
| 121914 | /* VMOVAPDYmr */ |
| 121915 | f256mem, VR256, |
| 121916 | /* VMOVAPDYrm */ |
| 121917 | VR256, f256mem, |
| 121918 | /* VMOVAPDYrr */ |
| 121919 | VR256, VR256, |
| 121920 | /* VMOVAPDYrr_REV */ |
| 121921 | VR256, VR256, |
| 121922 | /* VMOVAPDZ128mr */ |
| 121923 | f128mem, VR128X, |
| 121924 | /* VMOVAPDZ128mrk */ |
| 121925 | f128mem, VK2WM, VR128X, |
| 121926 | /* VMOVAPDZ128rm */ |
| 121927 | VR128X, f128mem, |
| 121928 | /* VMOVAPDZ128rmk */ |
| 121929 | VR128X, VR128X, VK2WM, f128mem, |
| 121930 | /* VMOVAPDZ128rmkz */ |
| 121931 | VR128X, VK2WM, f128mem, |
| 121932 | /* VMOVAPDZ128rr */ |
| 121933 | VR128X, VR128X, |
| 121934 | /* VMOVAPDZ128rr_REV */ |
| 121935 | VR128X, VR128X, |
| 121936 | /* VMOVAPDZ128rrk */ |
| 121937 | VR128X, VR128X, VK2WM, VR128X, |
| 121938 | /* VMOVAPDZ128rrk_REV */ |
| 121939 | VR128X, VK2WM, VR128X, |
| 121940 | /* VMOVAPDZ128rrkz */ |
| 121941 | VR128X, VK2WM, VR128X, |
| 121942 | /* VMOVAPDZ128rrkz_REV */ |
| 121943 | VR128X, VK2WM, VR128X, |
| 121944 | /* VMOVAPDZ256mr */ |
| 121945 | f256mem, VR256X, |
| 121946 | /* VMOVAPDZ256mrk */ |
| 121947 | f256mem, VK4WM, VR256X, |
| 121948 | /* VMOVAPDZ256rm */ |
| 121949 | VR256X, f256mem, |
| 121950 | /* VMOVAPDZ256rmk */ |
| 121951 | VR256X, VR256X, VK4WM, f256mem, |
| 121952 | /* VMOVAPDZ256rmkz */ |
| 121953 | VR256X, VK4WM, f256mem, |
| 121954 | /* VMOVAPDZ256rr */ |
| 121955 | VR256X, VR256X, |
| 121956 | /* VMOVAPDZ256rr_REV */ |
| 121957 | VR256X, VR256X, |
| 121958 | /* VMOVAPDZ256rrk */ |
| 121959 | VR256X, VR256X, VK4WM, VR256X, |
| 121960 | /* VMOVAPDZ256rrk_REV */ |
| 121961 | VR256X, VK4WM, VR256X, |
| 121962 | /* VMOVAPDZ256rrkz */ |
| 121963 | VR256X, VK4WM, VR256X, |
| 121964 | /* VMOVAPDZ256rrkz_REV */ |
| 121965 | VR256X, VK4WM, VR256X, |
| 121966 | /* VMOVAPDZmr */ |
| 121967 | f512mem, VR512, |
| 121968 | /* VMOVAPDZmrk */ |
| 121969 | f512mem, VK8WM, VR512, |
| 121970 | /* VMOVAPDZrm */ |
| 121971 | VR512, f512mem, |
| 121972 | /* VMOVAPDZrmk */ |
| 121973 | VR512, VR512, VK8WM, f512mem, |
| 121974 | /* VMOVAPDZrmkz */ |
| 121975 | VR512, VK8WM, f512mem, |
| 121976 | /* VMOVAPDZrr */ |
| 121977 | VR512, VR512, |
| 121978 | /* VMOVAPDZrr_REV */ |
| 121979 | VR512, VR512, |
| 121980 | /* VMOVAPDZrrk */ |
| 121981 | VR512, VR512, VK8WM, VR512, |
| 121982 | /* VMOVAPDZrrk_REV */ |
| 121983 | VR512, VK8WM, VR512, |
| 121984 | /* VMOVAPDZrrkz */ |
| 121985 | VR512, VK8WM, VR512, |
| 121986 | /* VMOVAPDZrrkz_REV */ |
| 121987 | VR512, VK8WM, VR512, |
| 121988 | /* VMOVAPDmr */ |
| 121989 | f128mem, VR128, |
| 121990 | /* VMOVAPDrm */ |
| 121991 | VR128, f128mem, |
| 121992 | /* VMOVAPDrr */ |
| 121993 | VR128, VR128, |
| 121994 | /* VMOVAPDrr_REV */ |
| 121995 | VR128, VR128, |
| 121996 | /* VMOVAPSYmr */ |
| 121997 | f256mem, VR256, |
| 121998 | /* VMOVAPSYrm */ |
| 121999 | VR256, f256mem, |
| 122000 | /* VMOVAPSYrr */ |
| 122001 | VR256, VR256, |
| 122002 | /* VMOVAPSYrr_REV */ |
| 122003 | VR256, VR256, |
| 122004 | /* VMOVAPSZ128mr */ |
| 122005 | f128mem, VR128X, |
| 122006 | /* VMOVAPSZ128mrk */ |
| 122007 | f128mem, VK4WM, VR128X, |
| 122008 | /* VMOVAPSZ128rm */ |
| 122009 | VR128X, f128mem, |
| 122010 | /* VMOVAPSZ128rmk */ |
| 122011 | VR128X, VR128X, VK4WM, f128mem, |
| 122012 | /* VMOVAPSZ128rmkz */ |
| 122013 | VR128X, VK4WM, f128mem, |
| 122014 | /* VMOVAPSZ128rr */ |
| 122015 | VR128X, VR128X, |
| 122016 | /* VMOVAPSZ128rr_REV */ |
| 122017 | VR128X, VR128X, |
| 122018 | /* VMOVAPSZ128rrk */ |
| 122019 | VR128X, VR128X, VK4WM, VR128X, |
| 122020 | /* VMOVAPSZ128rrk_REV */ |
| 122021 | VR128X, VK4WM, VR128X, |
| 122022 | /* VMOVAPSZ128rrkz */ |
| 122023 | VR128X, VK4WM, VR128X, |
| 122024 | /* VMOVAPSZ128rrkz_REV */ |
| 122025 | VR128X, VK4WM, VR128X, |
| 122026 | /* VMOVAPSZ256mr */ |
| 122027 | f256mem, VR256X, |
| 122028 | /* VMOVAPSZ256mrk */ |
| 122029 | f256mem, VK8WM, VR256X, |
| 122030 | /* VMOVAPSZ256rm */ |
| 122031 | VR256X, f256mem, |
| 122032 | /* VMOVAPSZ256rmk */ |
| 122033 | VR256X, VR256X, VK8WM, f256mem, |
| 122034 | /* VMOVAPSZ256rmkz */ |
| 122035 | VR256X, VK8WM, f256mem, |
| 122036 | /* VMOVAPSZ256rr */ |
| 122037 | VR256X, VR256X, |
| 122038 | /* VMOVAPSZ256rr_REV */ |
| 122039 | VR256X, VR256X, |
| 122040 | /* VMOVAPSZ256rrk */ |
| 122041 | VR256X, VR256X, VK8WM, VR256X, |
| 122042 | /* VMOVAPSZ256rrk_REV */ |
| 122043 | VR256X, VK8WM, VR256X, |
| 122044 | /* VMOVAPSZ256rrkz */ |
| 122045 | VR256X, VK8WM, VR256X, |
| 122046 | /* VMOVAPSZ256rrkz_REV */ |
| 122047 | VR256X, VK8WM, VR256X, |
| 122048 | /* VMOVAPSZmr */ |
| 122049 | f512mem, VR512, |
| 122050 | /* VMOVAPSZmrk */ |
| 122051 | f512mem, VK16WM, VR512, |
| 122052 | /* VMOVAPSZrm */ |
| 122053 | VR512, f512mem, |
| 122054 | /* VMOVAPSZrmk */ |
| 122055 | VR512, VR512, VK16WM, f512mem, |
| 122056 | /* VMOVAPSZrmkz */ |
| 122057 | VR512, VK16WM, f512mem, |
| 122058 | /* VMOVAPSZrr */ |
| 122059 | VR512, VR512, |
| 122060 | /* VMOVAPSZrr_REV */ |
| 122061 | VR512, VR512, |
| 122062 | /* VMOVAPSZrrk */ |
| 122063 | VR512, VR512, VK16WM, VR512, |
| 122064 | /* VMOVAPSZrrk_REV */ |
| 122065 | VR512, VK16WM, VR512, |
| 122066 | /* VMOVAPSZrrkz */ |
| 122067 | VR512, VK16WM, VR512, |
| 122068 | /* VMOVAPSZrrkz_REV */ |
| 122069 | VR512, VK16WM, VR512, |
| 122070 | /* VMOVAPSmr */ |
| 122071 | f128mem, VR128, |
| 122072 | /* VMOVAPSrm */ |
| 122073 | VR128, f128mem, |
| 122074 | /* VMOVAPSrr */ |
| 122075 | VR128, VR128, |
| 122076 | /* VMOVAPSrr_REV */ |
| 122077 | VR128, VR128, |
| 122078 | /* VMOVDDUPYrm */ |
| 122079 | VR256, f256mem, |
| 122080 | /* VMOVDDUPYrr */ |
| 122081 | VR256, VR256, |
| 122082 | /* VMOVDDUPZ128rm */ |
| 122083 | VR128X, f64mem, |
| 122084 | /* VMOVDDUPZ128rmk */ |
| 122085 | VR128X, VR128X, VK2WM, f64mem, |
| 122086 | /* VMOVDDUPZ128rmkz */ |
| 122087 | VR128X, VK2WM, f64mem, |
| 122088 | /* VMOVDDUPZ128rr */ |
| 122089 | VR128X, VR128X, |
| 122090 | /* VMOVDDUPZ128rrk */ |
| 122091 | VR128X, VR128X, VK2WM, VR128X, |
| 122092 | /* VMOVDDUPZ128rrkz */ |
| 122093 | VR128X, VK2WM, VR128X, |
| 122094 | /* VMOVDDUPZ256rm */ |
| 122095 | VR256X, f256mem, |
| 122096 | /* VMOVDDUPZ256rmk */ |
| 122097 | VR256X, VR256X, VK4WM, f256mem, |
| 122098 | /* VMOVDDUPZ256rmkz */ |
| 122099 | VR256X, VK4WM, f256mem, |
| 122100 | /* VMOVDDUPZ256rr */ |
| 122101 | VR256X, VR256X, |
| 122102 | /* VMOVDDUPZ256rrk */ |
| 122103 | VR256X, VR256X, VK4WM, VR256X, |
| 122104 | /* VMOVDDUPZ256rrkz */ |
| 122105 | VR256X, VK4WM, VR256X, |
| 122106 | /* VMOVDDUPZrm */ |
| 122107 | VR512, f512mem, |
| 122108 | /* VMOVDDUPZrmk */ |
| 122109 | VR512, VR512, VK8WM, f512mem, |
| 122110 | /* VMOVDDUPZrmkz */ |
| 122111 | VR512, VK8WM, f512mem, |
| 122112 | /* VMOVDDUPZrr */ |
| 122113 | VR512, VR512, |
| 122114 | /* VMOVDDUPZrrk */ |
| 122115 | VR512, VR512, VK8WM, VR512, |
| 122116 | /* VMOVDDUPZrrkz */ |
| 122117 | VR512, VK8WM, VR512, |
| 122118 | /* VMOVDDUPrm */ |
| 122119 | VR128, f64mem, |
| 122120 | /* VMOVDDUPrr */ |
| 122121 | VR128, VR128, |
| 122122 | /* VMOVDI2PDIZrm */ |
| 122123 | VR128X, i32mem, |
| 122124 | /* VMOVDI2PDIZrr */ |
| 122125 | VR128X, GR32, |
| 122126 | /* VMOVDI2PDIrm */ |
| 122127 | VR128, i32mem, |
| 122128 | /* VMOVDI2PDIrr */ |
| 122129 | VR128, GR32, |
| 122130 | /* VMOVDI2SSZrr */ |
| 122131 | FR32X, GR32, |
| 122132 | /* VMOVDI2SSrr */ |
| 122133 | FR32, GR32, |
| 122134 | /* VMOVDQA32Z128mr */ |
| 122135 | i128mem, VR128X, |
| 122136 | /* VMOVDQA32Z128mrk */ |
| 122137 | i128mem, VK4WM, VR128X, |
| 122138 | /* VMOVDQA32Z128rm */ |
| 122139 | VR128X, i128mem, |
| 122140 | /* VMOVDQA32Z128rmk */ |
| 122141 | VR128X, VR128X, VK4WM, i128mem, |
| 122142 | /* VMOVDQA32Z128rmkz */ |
| 122143 | VR128X, VK4WM, i128mem, |
| 122144 | /* VMOVDQA32Z128rr */ |
| 122145 | VR128X, VR128X, |
| 122146 | /* VMOVDQA32Z128rr_REV */ |
| 122147 | VR128X, VR128X, |
| 122148 | /* VMOVDQA32Z128rrk */ |
| 122149 | VR128X, VR128X, VK4WM, VR128X, |
| 122150 | /* VMOVDQA32Z128rrk_REV */ |
| 122151 | VR128X, VK4WM, VR128X, |
| 122152 | /* VMOVDQA32Z128rrkz */ |
| 122153 | VR128X, VK4WM, VR128X, |
| 122154 | /* VMOVDQA32Z128rrkz_REV */ |
| 122155 | VR128X, VK4WM, VR128X, |
| 122156 | /* VMOVDQA32Z256mr */ |
| 122157 | i256mem, VR256X, |
| 122158 | /* VMOVDQA32Z256mrk */ |
| 122159 | i256mem, VK8WM, VR256X, |
| 122160 | /* VMOVDQA32Z256rm */ |
| 122161 | VR256X, i256mem, |
| 122162 | /* VMOVDQA32Z256rmk */ |
| 122163 | VR256X, VR256X, VK8WM, i256mem, |
| 122164 | /* VMOVDQA32Z256rmkz */ |
| 122165 | VR256X, VK8WM, i256mem, |
| 122166 | /* VMOVDQA32Z256rr */ |
| 122167 | VR256X, VR256X, |
| 122168 | /* VMOVDQA32Z256rr_REV */ |
| 122169 | VR256X, VR256X, |
| 122170 | /* VMOVDQA32Z256rrk */ |
| 122171 | VR256X, VR256X, VK8WM, VR256X, |
| 122172 | /* VMOVDQA32Z256rrk_REV */ |
| 122173 | VR256X, VK8WM, VR256X, |
| 122174 | /* VMOVDQA32Z256rrkz */ |
| 122175 | VR256X, VK8WM, VR256X, |
| 122176 | /* VMOVDQA32Z256rrkz_REV */ |
| 122177 | VR256X, VK8WM, VR256X, |
| 122178 | /* VMOVDQA32Zmr */ |
| 122179 | i512mem, VR512, |
| 122180 | /* VMOVDQA32Zmrk */ |
| 122181 | i512mem, VK16WM, VR512, |
| 122182 | /* VMOVDQA32Zrm */ |
| 122183 | VR512, i512mem, |
| 122184 | /* VMOVDQA32Zrmk */ |
| 122185 | VR512, VR512, VK16WM, i512mem, |
| 122186 | /* VMOVDQA32Zrmkz */ |
| 122187 | VR512, VK16WM, i512mem, |
| 122188 | /* VMOVDQA32Zrr */ |
| 122189 | VR512, VR512, |
| 122190 | /* VMOVDQA32Zrr_REV */ |
| 122191 | VR512, VR512, |
| 122192 | /* VMOVDQA32Zrrk */ |
| 122193 | VR512, VR512, VK16WM, VR512, |
| 122194 | /* VMOVDQA32Zrrk_REV */ |
| 122195 | VR512, VK16WM, VR512, |
| 122196 | /* VMOVDQA32Zrrkz */ |
| 122197 | VR512, VK16WM, VR512, |
| 122198 | /* VMOVDQA32Zrrkz_REV */ |
| 122199 | VR512, VK16WM, VR512, |
| 122200 | /* VMOVDQA64Z128mr */ |
| 122201 | i128mem, VR128X, |
| 122202 | /* VMOVDQA64Z128mrk */ |
| 122203 | i128mem, VK2WM, VR128X, |
| 122204 | /* VMOVDQA64Z128rm */ |
| 122205 | VR128X, i128mem, |
| 122206 | /* VMOVDQA64Z128rmk */ |
| 122207 | VR128X, VR128X, VK2WM, i128mem, |
| 122208 | /* VMOVDQA64Z128rmkz */ |
| 122209 | VR128X, VK2WM, i128mem, |
| 122210 | /* VMOVDQA64Z128rr */ |
| 122211 | VR128X, VR128X, |
| 122212 | /* VMOVDQA64Z128rr_REV */ |
| 122213 | VR128X, VR128X, |
| 122214 | /* VMOVDQA64Z128rrk */ |
| 122215 | VR128X, VR128X, VK2WM, VR128X, |
| 122216 | /* VMOVDQA64Z128rrk_REV */ |
| 122217 | VR128X, VK2WM, VR128X, |
| 122218 | /* VMOVDQA64Z128rrkz */ |
| 122219 | VR128X, VK2WM, VR128X, |
| 122220 | /* VMOVDQA64Z128rrkz_REV */ |
| 122221 | VR128X, VK2WM, VR128X, |
| 122222 | /* VMOVDQA64Z256mr */ |
| 122223 | i256mem, VR256X, |
| 122224 | /* VMOVDQA64Z256mrk */ |
| 122225 | i256mem, VK4WM, VR256X, |
| 122226 | /* VMOVDQA64Z256rm */ |
| 122227 | VR256X, i256mem, |
| 122228 | /* VMOVDQA64Z256rmk */ |
| 122229 | VR256X, VR256X, VK4WM, i256mem, |
| 122230 | /* VMOVDQA64Z256rmkz */ |
| 122231 | VR256X, VK4WM, i256mem, |
| 122232 | /* VMOVDQA64Z256rr */ |
| 122233 | VR256X, VR256X, |
| 122234 | /* VMOVDQA64Z256rr_REV */ |
| 122235 | VR256X, VR256X, |
| 122236 | /* VMOVDQA64Z256rrk */ |
| 122237 | VR256X, VR256X, VK4WM, VR256X, |
| 122238 | /* VMOVDQA64Z256rrk_REV */ |
| 122239 | VR256X, VK4WM, VR256X, |
| 122240 | /* VMOVDQA64Z256rrkz */ |
| 122241 | VR256X, VK4WM, VR256X, |
| 122242 | /* VMOVDQA64Z256rrkz_REV */ |
| 122243 | VR256X, VK4WM, VR256X, |
| 122244 | /* VMOVDQA64Zmr */ |
| 122245 | i512mem, VR512, |
| 122246 | /* VMOVDQA64Zmrk */ |
| 122247 | i512mem, VK8WM, VR512, |
| 122248 | /* VMOVDQA64Zrm */ |
| 122249 | VR512, i512mem, |
| 122250 | /* VMOVDQA64Zrmk */ |
| 122251 | VR512, VR512, VK8WM, i512mem, |
| 122252 | /* VMOVDQA64Zrmkz */ |
| 122253 | VR512, VK8WM, i512mem, |
| 122254 | /* VMOVDQA64Zrr */ |
| 122255 | VR512, VR512, |
| 122256 | /* VMOVDQA64Zrr_REV */ |
| 122257 | VR512, VR512, |
| 122258 | /* VMOVDQA64Zrrk */ |
| 122259 | VR512, VR512, VK8WM, VR512, |
| 122260 | /* VMOVDQA64Zrrk_REV */ |
| 122261 | VR512, VK8WM, VR512, |
| 122262 | /* VMOVDQA64Zrrkz */ |
| 122263 | VR512, VK8WM, VR512, |
| 122264 | /* VMOVDQA64Zrrkz_REV */ |
| 122265 | VR512, VK8WM, VR512, |
| 122266 | /* VMOVDQAYmr */ |
| 122267 | i256mem, VR256, |
| 122268 | /* VMOVDQAYrm */ |
| 122269 | VR256, i256mem, |
| 122270 | /* VMOVDQAYrr */ |
| 122271 | VR256, VR256, |
| 122272 | /* VMOVDQAYrr_REV */ |
| 122273 | VR256, VR256, |
| 122274 | /* VMOVDQAmr */ |
| 122275 | i128mem, VR128, |
| 122276 | /* VMOVDQArm */ |
| 122277 | VR128, i128mem, |
| 122278 | /* VMOVDQArr */ |
| 122279 | VR128, VR128, |
| 122280 | /* VMOVDQArr_REV */ |
| 122281 | VR128, VR128, |
| 122282 | /* VMOVDQU16Z128mr */ |
| 122283 | i128mem, VR128X, |
| 122284 | /* VMOVDQU16Z128mrk */ |
| 122285 | i128mem, VK8WM, VR128X, |
| 122286 | /* VMOVDQU16Z128rm */ |
| 122287 | VR128X, i128mem, |
| 122288 | /* VMOVDQU16Z128rmk */ |
| 122289 | VR128X, VR128X, VK8WM, i128mem, |
| 122290 | /* VMOVDQU16Z128rmkz */ |
| 122291 | VR128X, VK8WM, i128mem, |
| 122292 | /* VMOVDQU16Z128rr */ |
| 122293 | VR128X, VR128X, |
| 122294 | /* VMOVDQU16Z128rr_REV */ |
| 122295 | VR128X, VR128X, |
| 122296 | /* VMOVDQU16Z128rrk */ |
| 122297 | VR128X, VR128X, VK8WM, VR128X, |
| 122298 | /* VMOVDQU16Z128rrk_REV */ |
| 122299 | VR128X, VK8WM, VR128X, |
| 122300 | /* VMOVDQU16Z128rrkz */ |
| 122301 | VR128X, VK8WM, VR128X, |
| 122302 | /* VMOVDQU16Z128rrkz_REV */ |
| 122303 | VR128X, VK8WM, VR128X, |
| 122304 | /* VMOVDQU16Z256mr */ |
| 122305 | i256mem, VR256X, |
| 122306 | /* VMOVDQU16Z256mrk */ |
| 122307 | i256mem, VK16WM, VR256X, |
| 122308 | /* VMOVDQU16Z256rm */ |
| 122309 | VR256X, i256mem, |
| 122310 | /* VMOVDQU16Z256rmk */ |
| 122311 | VR256X, VR256X, VK16WM, i256mem, |
| 122312 | /* VMOVDQU16Z256rmkz */ |
| 122313 | VR256X, VK16WM, i256mem, |
| 122314 | /* VMOVDQU16Z256rr */ |
| 122315 | VR256X, VR256X, |
| 122316 | /* VMOVDQU16Z256rr_REV */ |
| 122317 | VR256X, VR256X, |
| 122318 | /* VMOVDQU16Z256rrk */ |
| 122319 | VR256X, VR256X, VK16WM, VR256X, |
| 122320 | /* VMOVDQU16Z256rrk_REV */ |
| 122321 | VR256X, VK16WM, VR256X, |
| 122322 | /* VMOVDQU16Z256rrkz */ |
| 122323 | VR256X, VK16WM, VR256X, |
| 122324 | /* VMOVDQU16Z256rrkz_REV */ |
| 122325 | VR256X, VK16WM, VR256X, |
| 122326 | /* VMOVDQU16Zmr */ |
| 122327 | i512mem, VR512, |
| 122328 | /* VMOVDQU16Zmrk */ |
| 122329 | i512mem, VK32WM, VR512, |
| 122330 | /* VMOVDQU16Zrm */ |
| 122331 | VR512, i512mem, |
| 122332 | /* VMOVDQU16Zrmk */ |
| 122333 | VR512, VR512, VK32WM, i512mem, |
| 122334 | /* VMOVDQU16Zrmkz */ |
| 122335 | VR512, VK32WM, i512mem, |
| 122336 | /* VMOVDQU16Zrr */ |
| 122337 | VR512, VR512, |
| 122338 | /* VMOVDQU16Zrr_REV */ |
| 122339 | VR512, VR512, |
| 122340 | /* VMOVDQU16Zrrk */ |
| 122341 | VR512, VR512, VK32WM, VR512, |
| 122342 | /* VMOVDQU16Zrrk_REV */ |
| 122343 | VR512, VK32WM, VR512, |
| 122344 | /* VMOVDQU16Zrrkz */ |
| 122345 | VR512, VK32WM, VR512, |
| 122346 | /* VMOVDQU16Zrrkz_REV */ |
| 122347 | VR512, VK32WM, VR512, |
| 122348 | /* VMOVDQU32Z128mr */ |
| 122349 | i128mem, VR128X, |
| 122350 | /* VMOVDQU32Z128mrk */ |
| 122351 | i128mem, VK4WM, VR128X, |
| 122352 | /* VMOVDQU32Z128rm */ |
| 122353 | VR128X, i128mem, |
| 122354 | /* VMOVDQU32Z128rmk */ |
| 122355 | VR128X, VR128X, VK4WM, i128mem, |
| 122356 | /* VMOVDQU32Z128rmkz */ |
| 122357 | VR128X, VK4WM, i128mem, |
| 122358 | /* VMOVDQU32Z128rr */ |
| 122359 | VR128X, VR128X, |
| 122360 | /* VMOVDQU32Z128rr_REV */ |
| 122361 | VR128X, VR128X, |
| 122362 | /* VMOVDQU32Z128rrk */ |
| 122363 | VR128X, VR128X, VK4WM, VR128X, |
| 122364 | /* VMOVDQU32Z128rrk_REV */ |
| 122365 | VR128X, VK4WM, VR128X, |
| 122366 | /* VMOVDQU32Z128rrkz */ |
| 122367 | VR128X, VK4WM, VR128X, |
| 122368 | /* VMOVDQU32Z128rrkz_REV */ |
| 122369 | VR128X, VK4WM, VR128X, |
| 122370 | /* VMOVDQU32Z256mr */ |
| 122371 | i256mem, VR256X, |
| 122372 | /* VMOVDQU32Z256mrk */ |
| 122373 | i256mem, VK8WM, VR256X, |
| 122374 | /* VMOVDQU32Z256rm */ |
| 122375 | VR256X, i256mem, |
| 122376 | /* VMOVDQU32Z256rmk */ |
| 122377 | VR256X, VR256X, VK8WM, i256mem, |
| 122378 | /* VMOVDQU32Z256rmkz */ |
| 122379 | VR256X, VK8WM, i256mem, |
| 122380 | /* VMOVDQU32Z256rr */ |
| 122381 | VR256X, VR256X, |
| 122382 | /* VMOVDQU32Z256rr_REV */ |
| 122383 | VR256X, VR256X, |
| 122384 | /* VMOVDQU32Z256rrk */ |
| 122385 | VR256X, VR256X, VK8WM, VR256X, |
| 122386 | /* VMOVDQU32Z256rrk_REV */ |
| 122387 | VR256X, VK8WM, VR256X, |
| 122388 | /* VMOVDQU32Z256rrkz */ |
| 122389 | VR256X, VK8WM, VR256X, |
| 122390 | /* VMOVDQU32Z256rrkz_REV */ |
| 122391 | VR256X, VK8WM, VR256X, |
| 122392 | /* VMOVDQU32Zmr */ |
| 122393 | i512mem, VR512, |
| 122394 | /* VMOVDQU32Zmrk */ |
| 122395 | i512mem, VK16WM, VR512, |
| 122396 | /* VMOVDQU32Zrm */ |
| 122397 | VR512, i512mem, |
| 122398 | /* VMOVDQU32Zrmk */ |
| 122399 | VR512, VR512, VK16WM, i512mem, |
| 122400 | /* VMOVDQU32Zrmkz */ |
| 122401 | VR512, VK16WM, i512mem, |
| 122402 | /* VMOVDQU32Zrr */ |
| 122403 | VR512, VR512, |
| 122404 | /* VMOVDQU32Zrr_REV */ |
| 122405 | VR512, VR512, |
| 122406 | /* VMOVDQU32Zrrk */ |
| 122407 | VR512, VR512, VK16WM, VR512, |
| 122408 | /* VMOVDQU32Zrrk_REV */ |
| 122409 | VR512, VK16WM, VR512, |
| 122410 | /* VMOVDQU32Zrrkz */ |
| 122411 | VR512, VK16WM, VR512, |
| 122412 | /* VMOVDQU32Zrrkz_REV */ |
| 122413 | VR512, VK16WM, VR512, |
| 122414 | /* VMOVDQU64Z128mr */ |
| 122415 | i128mem, VR128X, |
| 122416 | /* VMOVDQU64Z128mrk */ |
| 122417 | i128mem, VK2WM, VR128X, |
| 122418 | /* VMOVDQU64Z128rm */ |
| 122419 | VR128X, i128mem, |
| 122420 | /* VMOVDQU64Z128rmk */ |
| 122421 | VR128X, VR128X, VK2WM, i128mem, |
| 122422 | /* VMOVDQU64Z128rmkz */ |
| 122423 | VR128X, VK2WM, i128mem, |
| 122424 | /* VMOVDQU64Z128rr */ |
| 122425 | VR128X, VR128X, |
| 122426 | /* VMOVDQU64Z128rr_REV */ |
| 122427 | VR128X, VR128X, |
| 122428 | /* VMOVDQU64Z128rrk */ |
| 122429 | VR128X, VR128X, VK2WM, VR128X, |
| 122430 | /* VMOVDQU64Z128rrk_REV */ |
| 122431 | VR128X, VK2WM, VR128X, |
| 122432 | /* VMOVDQU64Z128rrkz */ |
| 122433 | VR128X, VK2WM, VR128X, |
| 122434 | /* VMOVDQU64Z128rrkz_REV */ |
| 122435 | VR128X, VK2WM, VR128X, |
| 122436 | /* VMOVDQU64Z256mr */ |
| 122437 | i256mem, VR256X, |
| 122438 | /* VMOVDQU64Z256mrk */ |
| 122439 | i256mem, VK4WM, VR256X, |
| 122440 | /* VMOVDQU64Z256rm */ |
| 122441 | VR256X, i256mem, |
| 122442 | /* VMOVDQU64Z256rmk */ |
| 122443 | VR256X, VR256X, VK4WM, i256mem, |
| 122444 | /* VMOVDQU64Z256rmkz */ |
| 122445 | VR256X, VK4WM, i256mem, |
| 122446 | /* VMOVDQU64Z256rr */ |
| 122447 | VR256X, VR256X, |
| 122448 | /* VMOVDQU64Z256rr_REV */ |
| 122449 | VR256X, VR256X, |
| 122450 | /* VMOVDQU64Z256rrk */ |
| 122451 | VR256X, VR256X, VK4WM, VR256X, |
| 122452 | /* VMOVDQU64Z256rrk_REV */ |
| 122453 | VR256X, VK4WM, VR256X, |
| 122454 | /* VMOVDQU64Z256rrkz */ |
| 122455 | VR256X, VK4WM, VR256X, |
| 122456 | /* VMOVDQU64Z256rrkz_REV */ |
| 122457 | VR256X, VK4WM, VR256X, |
| 122458 | /* VMOVDQU64Zmr */ |
| 122459 | i512mem, VR512, |
| 122460 | /* VMOVDQU64Zmrk */ |
| 122461 | i512mem, VK8WM, VR512, |
| 122462 | /* VMOVDQU64Zrm */ |
| 122463 | VR512, i512mem, |
| 122464 | /* VMOVDQU64Zrmk */ |
| 122465 | VR512, VR512, VK8WM, i512mem, |
| 122466 | /* VMOVDQU64Zrmkz */ |
| 122467 | VR512, VK8WM, i512mem, |
| 122468 | /* VMOVDQU64Zrr */ |
| 122469 | VR512, VR512, |
| 122470 | /* VMOVDQU64Zrr_REV */ |
| 122471 | VR512, VR512, |
| 122472 | /* VMOVDQU64Zrrk */ |
| 122473 | VR512, VR512, VK8WM, VR512, |
| 122474 | /* VMOVDQU64Zrrk_REV */ |
| 122475 | VR512, VK8WM, VR512, |
| 122476 | /* VMOVDQU64Zrrkz */ |
| 122477 | VR512, VK8WM, VR512, |
| 122478 | /* VMOVDQU64Zrrkz_REV */ |
| 122479 | VR512, VK8WM, VR512, |
| 122480 | /* VMOVDQU8Z128mr */ |
| 122481 | i128mem, VR128X, |
| 122482 | /* VMOVDQU8Z128mrk */ |
| 122483 | i128mem, VK16WM, VR128X, |
| 122484 | /* VMOVDQU8Z128rm */ |
| 122485 | VR128X, i128mem, |
| 122486 | /* VMOVDQU8Z128rmk */ |
| 122487 | VR128X, VR128X, VK16WM, i128mem, |
| 122488 | /* VMOVDQU8Z128rmkz */ |
| 122489 | VR128X, VK16WM, i128mem, |
| 122490 | /* VMOVDQU8Z128rr */ |
| 122491 | VR128X, VR128X, |
| 122492 | /* VMOVDQU8Z128rr_REV */ |
| 122493 | VR128X, VR128X, |
| 122494 | /* VMOVDQU8Z128rrk */ |
| 122495 | VR128X, VR128X, VK16WM, VR128X, |
| 122496 | /* VMOVDQU8Z128rrk_REV */ |
| 122497 | VR128X, VK16WM, VR128X, |
| 122498 | /* VMOVDQU8Z128rrkz */ |
| 122499 | VR128X, VK16WM, VR128X, |
| 122500 | /* VMOVDQU8Z128rrkz_REV */ |
| 122501 | VR128X, VK16WM, VR128X, |
| 122502 | /* VMOVDQU8Z256mr */ |
| 122503 | i256mem, VR256X, |
| 122504 | /* VMOVDQU8Z256mrk */ |
| 122505 | i256mem, VK32WM, VR256X, |
| 122506 | /* VMOVDQU8Z256rm */ |
| 122507 | VR256X, i256mem, |
| 122508 | /* VMOVDQU8Z256rmk */ |
| 122509 | VR256X, VR256X, VK32WM, i256mem, |
| 122510 | /* VMOVDQU8Z256rmkz */ |
| 122511 | VR256X, VK32WM, i256mem, |
| 122512 | /* VMOVDQU8Z256rr */ |
| 122513 | VR256X, VR256X, |
| 122514 | /* VMOVDQU8Z256rr_REV */ |
| 122515 | VR256X, VR256X, |
| 122516 | /* VMOVDQU8Z256rrk */ |
| 122517 | VR256X, VR256X, VK32WM, VR256X, |
| 122518 | /* VMOVDQU8Z256rrk_REV */ |
| 122519 | VR256X, VK32WM, VR256X, |
| 122520 | /* VMOVDQU8Z256rrkz */ |
| 122521 | VR256X, VK32WM, VR256X, |
| 122522 | /* VMOVDQU8Z256rrkz_REV */ |
| 122523 | VR256X, VK32WM, VR256X, |
| 122524 | /* VMOVDQU8Zmr */ |
| 122525 | i512mem, VR512, |
| 122526 | /* VMOVDQU8Zmrk */ |
| 122527 | i512mem, VK64WM, VR512, |
| 122528 | /* VMOVDQU8Zrm */ |
| 122529 | VR512, i512mem, |
| 122530 | /* VMOVDQU8Zrmk */ |
| 122531 | VR512, VR512, VK64WM, i512mem, |
| 122532 | /* VMOVDQU8Zrmkz */ |
| 122533 | VR512, VK64WM, i512mem, |
| 122534 | /* VMOVDQU8Zrr */ |
| 122535 | VR512, VR512, |
| 122536 | /* VMOVDQU8Zrr_REV */ |
| 122537 | VR512, VR512, |
| 122538 | /* VMOVDQU8Zrrk */ |
| 122539 | VR512, VR512, VK64WM, VR512, |
| 122540 | /* VMOVDQU8Zrrk_REV */ |
| 122541 | VR512, VK64WM, VR512, |
| 122542 | /* VMOVDQU8Zrrkz */ |
| 122543 | VR512, VK64WM, VR512, |
| 122544 | /* VMOVDQU8Zrrkz_REV */ |
| 122545 | VR512, VK64WM, VR512, |
| 122546 | /* VMOVDQUYmr */ |
| 122547 | i256mem, VR256, |
| 122548 | /* VMOVDQUYrm */ |
| 122549 | VR256, i256mem, |
| 122550 | /* VMOVDQUYrr */ |
| 122551 | VR256, VR256, |
| 122552 | /* VMOVDQUYrr_REV */ |
| 122553 | VR256, VR256, |
| 122554 | /* VMOVDQUmr */ |
| 122555 | i128mem, VR128, |
| 122556 | /* VMOVDQUrm */ |
| 122557 | VR128, i128mem, |
| 122558 | /* VMOVDQUrr */ |
| 122559 | VR128, VR128, |
| 122560 | /* VMOVDQUrr_REV */ |
| 122561 | VR128, VR128, |
| 122562 | /* VMOVHLPSZrr */ |
| 122563 | VR128X, VR128X, VR128X, |
| 122564 | /* VMOVHLPSrr */ |
| 122565 | VR128, VR128, VR128, |
| 122566 | /* VMOVHPDZ128mr */ |
| 122567 | f64mem, VR128X, |
| 122568 | /* VMOVHPDZ128rm */ |
| 122569 | VR128X, VR128X, f64mem, |
| 122570 | /* VMOVHPDmr */ |
| 122571 | f64mem, VR128, |
| 122572 | /* VMOVHPDrm */ |
| 122573 | VR128, VR128, f64mem, |
| 122574 | /* VMOVHPSZ128mr */ |
| 122575 | f64mem, VR128X, |
| 122576 | /* VMOVHPSZ128rm */ |
| 122577 | VR128X, VR128X, f64mem, |
| 122578 | /* VMOVHPSmr */ |
| 122579 | f64mem, VR128, |
| 122580 | /* VMOVHPSrm */ |
| 122581 | VR128, VR128, f64mem, |
| 122582 | /* VMOVLHPSZrr */ |
| 122583 | VR128X, VR128X, VR128X, |
| 122584 | /* VMOVLHPSrr */ |
| 122585 | VR128, VR128, VR128, |
| 122586 | /* VMOVLPDZ128mr */ |
| 122587 | f64mem, VR128X, |
| 122588 | /* VMOVLPDZ128rm */ |
| 122589 | VR128X, VR128X, f64mem, |
| 122590 | /* VMOVLPDmr */ |
| 122591 | f64mem, VR128, |
| 122592 | /* VMOVLPDrm */ |
| 122593 | VR128, VR128, f64mem, |
| 122594 | /* VMOVLPSZ128mr */ |
| 122595 | f64mem, VR128X, |
| 122596 | /* VMOVLPSZ128rm */ |
| 122597 | VR128X, VR128X, f64mem, |
| 122598 | /* VMOVLPSmr */ |
| 122599 | f64mem, VR128, |
| 122600 | /* VMOVLPSrm */ |
| 122601 | VR128, VR128, f64mem, |
| 122602 | /* VMOVMSKPDYrr */ |
| 122603 | GR32orGR64, VR256, |
| 122604 | /* VMOVMSKPDrr */ |
| 122605 | GR32orGR64, VR128, |
| 122606 | /* VMOVMSKPSYrr */ |
| 122607 | GR32orGR64, VR256, |
| 122608 | /* VMOVMSKPSrr */ |
| 122609 | GR32orGR64, VR128, |
| 122610 | /* VMOVNTDQAYrm */ |
| 122611 | VR256, i256mem, |
| 122612 | /* VMOVNTDQAZ128rm */ |
| 122613 | VR128X, i128mem, |
| 122614 | /* VMOVNTDQAZ256rm */ |
| 122615 | VR256X, i256mem, |
| 122616 | /* VMOVNTDQAZrm */ |
| 122617 | VR512, i512mem, |
| 122618 | /* VMOVNTDQArm */ |
| 122619 | VR128, i128mem, |
| 122620 | /* VMOVNTDQYmr */ |
| 122621 | i256mem, VR256, |
| 122622 | /* VMOVNTDQZ128mr */ |
| 122623 | i128mem, VR128X, |
| 122624 | /* VMOVNTDQZ256mr */ |
| 122625 | i256mem, VR256X, |
| 122626 | /* VMOVNTDQZmr */ |
| 122627 | i512mem, VR512, |
| 122628 | /* VMOVNTDQmr */ |
| 122629 | i128mem, VR128, |
| 122630 | /* VMOVNTPDYmr */ |
| 122631 | f256mem, VR256, |
| 122632 | /* VMOVNTPDZ128mr */ |
| 122633 | f128mem, VR128X, |
| 122634 | /* VMOVNTPDZ256mr */ |
| 122635 | f256mem, VR256X, |
| 122636 | /* VMOVNTPDZmr */ |
| 122637 | f512mem, VR512, |
| 122638 | /* VMOVNTPDmr */ |
| 122639 | f128mem, VR128, |
| 122640 | /* VMOVNTPSYmr */ |
| 122641 | f256mem, VR256, |
| 122642 | /* VMOVNTPSZ128mr */ |
| 122643 | f128mem, VR128X, |
| 122644 | /* VMOVNTPSZ256mr */ |
| 122645 | f256mem, VR256X, |
| 122646 | /* VMOVNTPSZmr */ |
| 122647 | f512mem, VR512, |
| 122648 | /* VMOVNTPSmr */ |
| 122649 | f128mem, VR128, |
| 122650 | /* VMOVPDI2DIZmr */ |
| 122651 | i32mem, VR128X, |
| 122652 | /* VMOVPDI2DIZrr */ |
| 122653 | GR32, VR128X, |
| 122654 | /* VMOVPDI2DImr */ |
| 122655 | i32mem, VR128, |
| 122656 | /* VMOVPDI2DIrr */ |
| 122657 | GR32, VR128, |
| 122658 | /* VMOVPQI2QIZmr */ |
| 122659 | i64mem, VR128X, |
| 122660 | /* VMOVPQI2QIZrr */ |
| 122661 | VR128X, VR128X, |
| 122662 | /* VMOVPQI2QImr */ |
| 122663 | i64mem, VR128, |
| 122664 | /* VMOVPQI2QIrr */ |
| 122665 | VR128, VR128, |
| 122666 | /* VMOVPQIto64Zmr */ |
| 122667 | i64mem, VR128X, |
| 122668 | /* VMOVPQIto64Zrr */ |
| 122669 | GR64, VR128X, |
| 122670 | /* VMOVPQIto64mr */ |
| 122671 | i64mem, VR128, |
| 122672 | /* VMOVPQIto64rr */ |
| 122673 | GR64, VR128, |
| 122674 | /* VMOVQI2PQIZrm */ |
| 122675 | VR128X, i64mem, |
| 122676 | /* VMOVQI2PQIrm */ |
| 122677 | VR128, i64mem, |
| 122678 | /* VMOVRSBZ128m */ |
| 122679 | VR128X, i128mem, |
| 122680 | /* VMOVRSBZ128mk */ |
| 122681 | VR128X, VR128X, VK16WM, i128mem, |
| 122682 | /* VMOVRSBZ128mkz */ |
| 122683 | VR128X, VK16WM, i128mem, |
| 122684 | /* VMOVRSBZ256m */ |
| 122685 | VR256X, i256mem, |
| 122686 | /* VMOVRSBZ256mk */ |
| 122687 | VR256X, VR256X, VK32WM, i256mem, |
| 122688 | /* VMOVRSBZ256mkz */ |
| 122689 | VR256X, VK32WM, i256mem, |
| 122690 | /* VMOVRSBZm */ |
| 122691 | VR512, i512mem, |
| 122692 | /* VMOVRSBZmk */ |
| 122693 | VR512, VR512, VK64WM, i512mem, |
| 122694 | /* VMOVRSBZmkz */ |
| 122695 | VR512, VK64WM, i512mem, |
| 122696 | /* VMOVRSDZ128m */ |
| 122697 | VR128X, i128mem, |
| 122698 | /* VMOVRSDZ128mk */ |
| 122699 | VR128X, VR128X, VK4WM, i128mem, |
| 122700 | /* VMOVRSDZ128mkz */ |
| 122701 | VR128X, VK4WM, i128mem, |
| 122702 | /* VMOVRSDZ256m */ |
| 122703 | VR256X, i256mem, |
| 122704 | /* VMOVRSDZ256mk */ |
| 122705 | VR256X, VR256X, VK8WM, i256mem, |
| 122706 | /* VMOVRSDZ256mkz */ |
| 122707 | VR256X, VK8WM, i256mem, |
| 122708 | /* VMOVRSDZm */ |
| 122709 | VR512, i512mem, |
| 122710 | /* VMOVRSDZmk */ |
| 122711 | VR512, VR512, VK16WM, i512mem, |
| 122712 | /* VMOVRSDZmkz */ |
| 122713 | VR512, VK16WM, i512mem, |
| 122714 | /* VMOVRSQZ128m */ |
| 122715 | VR128X, i128mem, |
| 122716 | /* VMOVRSQZ128mk */ |
| 122717 | VR128X, VR128X, VK2WM, i128mem, |
| 122718 | /* VMOVRSQZ128mkz */ |
| 122719 | VR128X, VK2WM, i128mem, |
| 122720 | /* VMOVRSQZ256m */ |
| 122721 | VR256X, i256mem, |
| 122722 | /* VMOVRSQZ256mk */ |
| 122723 | VR256X, VR256X, VK4WM, i256mem, |
| 122724 | /* VMOVRSQZ256mkz */ |
| 122725 | VR256X, VK4WM, i256mem, |
| 122726 | /* VMOVRSQZm */ |
| 122727 | VR512, i512mem, |
| 122728 | /* VMOVRSQZmk */ |
| 122729 | VR512, VR512, VK8WM, i512mem, |
| 122730 | /* VMOVRSQZmkz */ |
| 122731 | VR512, VK8WM, i512mem, |
| 122732 | /* VMOVRSWZ128m */ |
| 122733 | VR128X, i128mem, |
| 122734 | /* VMOVRSWZ128mk */ |
| 122735 | VR128X, VR128X, VK8WM, i128mem, |
| 122736 | /* VMOVRSWZ128mkz */ |
| 122737 | VR128X, VK8WM, i128mem, |
| 122738 | /* VMOVRSWZ256m */ |
| 122739 | VR256X, i256mem, |
| 122740 | /* VMOVRSWZ256mk */ |
| 122741 | VR256X, VR256X, VK16WM, i256mem, |
| 122742 | /* VMOVRSWZ256mkz */ |
| 122743 | VR256X, VK16WM, i256mem, |
| 122744 | /* VMOVRSWZm */ |
| 122745 | VR512, i512mem, |
| 122746 | /* VMOVRSWZmk */ |
| 122747 | VR512, VR512, VK32WM, i512mem, |
| 122748 | /* VMOVRSWZmkz */ |
| 122749 | VR512, VK32WM, i512mem, |
| 122750 | /* VMOVSDZmr */ |
| 122751 | f64mem, FR64X, |
| 122752 | /* VMOVSDZmrk */ |
| 122753 | f64mem, VK1WM, VR128X, |
| 122754 | /* VMOVSDZrm */ |
| 122755 | VR128X, f64mem, |
| 122756 | /* VMOVSDZrm_alt */ |
| 122757 | FR64X, f64mem, |
| 122758 | /* VMOVSDZrmk */ |
| 122759 | VR128X, VR128X, VK1WM, f64mem, |
| 122760 | /* VMOVSDZrmkz */ |
| 122761 | VR128X, VK1WM, f64mem, |
| 122762 | /* VMOVSDZrr */ |
| 122763 | VR128X, VR128X, VR128X, |
| 122764 | /* VMOVSDZrr_REV */ |
| 122765 | VR128X, VR128X, VR128X, |
| 122766 | /* VMOVSDZrrk */ |
| 122767 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122768 | /* VMOVSDZrrk_REV */ |
| 122769 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122770 | /* VMOVSDZrrkz */ |
| 122771 | VR128X, VK1WM, VR128X, VR128X, |
| 122772 | /* VMOVSDZrrkz_REV */ |
| 122773 | VR128X, VK1WM, VR128X, VR128X, |
| 122774 | /* VMOVSDmr */ |
| 122775 | f64mem, FR64, |
| 122776 | /* VMOVSDrm */ |
| 122777 | VR128, f64mem, |
| 122778 | /* VMOVSDrm_alt */ |
| 122779 | FR64, f64mem, |
| 122780 | /* VMOVSDrr */ |
| 122781 | VR128, VR128, VR128, |
| 122782 | /* VMOVSDrr_REV */ |
| 122783 | VR128, VR128, VR128, |
| 122784 | /* VMOVSDto64Zrr */ |
| 122785 | GR64, FR64X, |
| 122786 | /* VMOVSDto64rr */ |
| 122787 | GR64, FR64, |
| 122788 | /* VMOVSH2Wrr */ |
| 122789 | GR32, VR128X, |
| 122790 | /* VMOVSHDUPYrm */ |
| 122791 | VR256, f256mem, |
| 122792 | /* VMOVSHDUPYrr */ |
| 122793 | VR256, VR256, |
| 122794 | /* VMOVSHDUPZ128rm */ |
| 122795 | VR128X, f128mem, |
| 122796 | /* VMOVSHDUPZ128rmk */ |
| 122797 | VR128X, VR128X, VK4WM, f128mem, |
| 122798 | /* VMOVSHDUPZ128rmkz */ |
| 122799 | VR128X, VK4WM, f128mem, |
| 122800 | /* VMOVSHDUPZ128rr */ |
| 122801 | VR128X, VR128X, |
| 122802 | /* VMOVSHDUPZ128rrk */ |
| 122803 | VR128X, VR128X, VK4WM, VR128X, |
| 122804 | /* VMOVSHDUPZ128rrkz */ |
| 122805 | VR128X, VK4WM, VR128X, |
| 122806 | /* VMOVSHDUPZ256rm */ |
| 122807 | VR256X, f256mem, |
| 122808 | /* VMOVSHDUPZ256rmk */ |
| 122809 | VR256X, VR256X, VK8WM, f256mem, |
| 122810 | /* VMOVSHDUPZ256rmkz */ |
| 122811 | VR256X, VK8WM, f256mem, |
| 122812 | /* VMOVSHDUPZ256rr */ |
| 122813 | VR256X, VR256X, |
| 122814 | /* VMOVSHDUPZ256rrk */ |
| 122815 | VR256X, VR256X, VK8WM, VR256X, |
| 122816 | /* VMOVSHDUPZ256rrkz */ |
| 122817 | VR256X, VK8WM, VR256X, |
| 122818 | /* VMOVSHDUPZrm */ |
| 122819 | VR512, f512mem, |
| 122820 | /* VMOVSHDUPZrmk */ |
| 122821 | VR512, VR512, VK16WM, f512mem, |
| 122822 | /* VMOVSHDUPZrmkz */ |
| 122823 | VR512, VK16WM, f512mem, |
| 122824 | /* VMOVSHDUPZrr */ |
| 122825 | VR512, VR512, |
| 122826 | /* VMOVSHDUPZrrk */ |
| 122827 | VR512, VR512, VK16WM, VR512, |
| 122828 | /* VMOVSHDUPZrrkz */ |
| 122829 | VR512, VK16WM, VR512, |
| 122830 | /* VMOVSHDUPrm */ |
| 122831 | VR128, f128mem, |
| 122832 | /* VMOVSHDUPrr */ |
| 122833 | VR128, VR128, |
| 122834 | /* VMOVSHZmr */ |
| 122835 | f16mem, FR16X, |
| 122836 | /* VMOVSHZmrk */ |
| 122837 | f16mem, VK1WM, VR128X, |
| 122838 | /* VMOVSHZrm */ |
| 122839 | VR128X, f16mem, |
| 122840 | /* VMOVSHZrm_alt */ |
| 122841 | FR16X, f16mem, |
| 122842 | /* VMOVSHZrmk */ |
| 122843 | VR128X, VR128X, VK1WM, f16mem, |
| 122844 | /* VMOVSHZrmkz */ |
| 122845 | VR128X, VK1WM, f16mem, |
| 122846 | /* VMOVSHZrr */ |
| 122847 | VR128X, VR128X, VR128X, |
| 122848 | /* VMOVSHZrr_REV */ |
| 122849 | VR128X, VR128X, VR128X, |
| 122850 | /* VMOVSHZrrk */ |
| 122851 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122852 | /* VMOVSHZrrk_REV */ |
| 122853 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122854 | /* VMOVSHZrrkz */ |
| 122855 | VR128X, VK1WM, VR128X, VR128X, |
| 122856 | /* VMOVSHZrrkz_REV */ |
| 122857 | VR128X, VK1WM, VR128X, VR128X, |
| 122858 | /* VMOVSHtoW64rr */ |
| 122859 | GR64, VR128X, |
| 122860 | /* VMOVSLDUPYrm */ |
| 122861 | VR256, f256mem, |
| 122862 | /* VMOVSLDUPYrr */ |
| 122863 | VR256, VR256, |
| 122864 | /* VMOVSLDUPZ128rm */ |
| 122865 | VR128X, f128mem, |
| 122866 | /* VMOVSLDUPZ128rmk */ |
| 122867 | VR128X, VR128X, VK4WM, f128mem, |
| 122868 | /* VMOVSLDUPZ128rmkz */ |
| 122869 | VR128X, VK4WM, f128mem, |
| 122870 | /* VMOVSLDUPZ128rr */ |
| 122871 | VR128X, VR128X, |
| 122872 | /* VMOVSLDUPZ128rrk */ |
| 122873 | VR128X, VR128X, VK4WM, VR128X, |
| 122874 | /* VMOVSLDUPZ128rrkz */ |
| 122875 | VR128X, VK4WM, VR128X, |
| 122876 | /* VMOVSLDUPZ256rm */ |
| 122877 | VR256X, f256mem, |
| 122878 | /* VMOVSLDUPZ256rmk */ |
| 122879 | VR256X, VR256X, VK8WM, f256mem, |
| 122880 | /* VMOVSLDUPZ256rmkz */ |
| 122881 | VR256X, VK8WM, f256mem, |
| 122882 | /* VMOVSLDUPZ256rr */ |
| 122883 | VR256X, VR256X, |
| 122884 | /* VMOVSLDUPZ256rrk */ |
| 122885 | VR256X, VR256X, VK8WM, VR256X, |
| 122886 | /* VMOVSLDUPZ256rrkz */ |
| 122887 | VR256X, VK8WM, VR256X, |
| 122888 | /* VMOVSLDUPZrm */ |
| 122889 | VR512, f512mem, |
| 122890 | /* VMOVSLDUPZrmk */ |
| 122891 | VR512, VR512, VK16WM, f512mem, |
| 122892 | /* VMOVSLDUPZrmkz */ |
| 122893 | VR512, VK16WM, f512mem, |
| 122894 | /* VMOVSLDUPZrr */ |
| 122895 | VR512, VR512, |
| 122896 | /* VMOVSLDUPZrrk */ |
| 122897 | VR512, VR512, VK16WM, VR512, |
| 122898 | /* VMOVSLDUPZrrkz */ |
| 122899 | VR512, VK16WM, VR512, |
| 122900 | /* VMOVSLDUPrm */ |
| 122901 | VR128, f128mem, |
| 122902 | /* VMOVSLDUPrr */ |
| 122903 | VR128, VR128, |
| 122904 | /* VMOVSS2DIZrr */ |
| 122905 | GR32, FR32X, |
| 122906 | /* VMOVSS2DIrr */ |
| 122907 | GR32, FR32, |
| 122908 | /* VMOVSSZmr */ |
| 122909 | f32mem, FR32X, |
| 122910 | /* VMOVSSZmrk */ |
| 122911 | f32mem, VK1WM, VR128X, |
| 122912 | /* VMOVSSZrm */ |
| 122913 | VR128X, f32mem, |
| 122914 | /* VMOVSSZrm_alt */ |
| 122915 | FR32X, f32mem, |
| 122916 | /* VMOVSSZrmk */ |
| 122917 | VR128X, VR128X, VK1WM, f32mem, |
| 122918 | /* VMOVSSZrmkz */ |
| 122919 | VR128X, VK1WM, f32mem, |
| 122920 | /* VMOVSSZrr */ |
| 122921 | VR128X, VR128X, VR128X, |
| 122922 | /* VMOVSSZrr_REV */ |
| 122923 | VR128X, VR128X, VR128X, |
| 122924 | /* VMOVSSZrrk */ |
| 122925 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122926 | /* VMOVSSZrrk_REV */ |
| 122927 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122928 | /* VMOVSSZrrkz */ |
| 122929 | VR128X, VK1WM, VR128X, VR128X, |
| 122930 | /* VMOVSSZrrkz_REV */ |
| 122931 | VR128X, VK1WM, VR128X, VR128X, |
| 122932 | /* VMOVSSmr */ |
| 122933 | f32mem, FR32, |
| 122934 | /* VMOVSSrm */ |
| 122935 | VR128, f32mem, |
| 122936 | /* VMOVSSrm_alt */ |
| 122937 | FR32, f32mem, |
| 122938 | /* VMOVSSrr */ |
| 122939 | VR128, VR128, VR128, |
| 122940 | /* VMOVSSrr_REV */ |
| 122941 | VR128, VR128, VR128, |
| 122942 | /* VMOVUPDYmr */ |
| 122943 | f256mem, VR256, |
| 122944 | /* VMOVUPDYrm */ |
| 122945 | VR256, f256mem, |
| 122946 | /* VMOVUPDYrr */ |
| 122947 | VR256, VR256, |
| 122948 | /* VMOVUPDYrr_REV */ |
| 122949 | VR256, VR256, |
| 122950 | /* VMOVUPDZ128mr */ |
| 122951 | f128mem, VR128X, |
| 122952 | /* VMOVUPDZ128mrk */ |
| 122953 | f128mem, VK2WM, VR128X, |
| 122954 | /* VMOVUPDZ128rm */ |
| 122955 | VR128X, f128mem, |
| 122956 | /* VMOVUPDZ128rmk */ |
| 122957 | VR128X, VR128X, VK2WM, f128mem, |
| 122958 | /* VMOVUPDZ128rmkz */ |
| 122959 | VR128X, VK2WM, f128mem, |
| 122960 | /* VMOVUPDZ128rr */ |
| 122961 | VR128X, VR128X, |
| 122962 | /* VMOVUPDZ128rr_REV */ |
| 122963 | VR128X, VR128X, |
| 122964 | /* VMOVUPDZ128rrk */ |
| 122965 | VR128X, VR128X, VK2WM, VR128X, |
| 122966 | /* VMOVUPDZ128rrk_REV */ |
| 122967 | VR128X, VK2WM, VR128X, |
| 122968 | /* VMOVUPDZ128rrkz */ |
| 122969 | VR128X, VK2WM, VR128X, |
| 122970 | /* VMOVUPDZ128rrkz_REV */ |
| 122971 | VR128X, VK2WM, VR128X, |
| 122972 | /* VMOVUPDZ256mr */ |
| 122973 | f256mem, VR256X, |
| 122974 | /* VMOVUPDZ256mrk */ |
| 122975 | f256mem, VK4WM, VR256X, |
| 122976 | /* VMOVUPDZ256rm */ |
| 122977 | VR256X, f256mem, |
| 122978 | /* VMOVUPDZ256rmk */ |
| 122979 | VR256X, VR256X, VK4WM, f256mem, |
| 122980 | /* VMOVUPDZ256rmkz */ |
| 122981 | VR256X, VK4WM, f256mem, |
| 122982 | /* VMOVUPDZ256rr */ |
| 122983 | VR256X, VR256X, |
| 122984 | /* VMOVUPDZ256rr_REV */ |
| 122985 | VR256X, VR256X, |
| 122986 | /* VMOVUPDZ256rrk */ |
| 122987 | VR256X, VR256X, VK4WM, VR256X, |
| 122988 | /* VMOVUPDZ256rrk_REV */ |
| 122989 | VR256X, VK4WM, VR256X, |
| 122990 | /* VMOVUPDZ256rrkz */ |
| 122991 | VR256X, VK4WM, VR256X, |
| 122992 | /* VMOVUPDZ256rrkz_REV */ |
| 122993 | VR256X, VK4WM, VR256X, |
| 122994 | /* VMOVUPDZmr */ |
| 122995 | f512mem, VR512, |
| 122996 | /* VMOVUPDZmrk */ |
| 122997 | f512mem, VK8WM, VR512, |
| 122998 | /* VMOVUPDZrm */ |
| 122999 | VR512, f512mem, |
| 123000 | /* VMOVUPDZrmk */ |
| 123001 | VR512, VR512, VK8WM, f512mem, |
| 123002 | /* VMOVUPDZrmkz */ |
| 123003 | VR512, VK8WM, f512mem, |
| 123004 | /* VMOVUPDZrr */ |
| 123005 | VR512, VR512, |
| 123006 | /* VMOVUPDZrr_REV */ |
| 123007 | VR512, VR512, |
| 123008 | /* VMOVUPDZrrk */ |
| 123009 | VR512, VR512, VK8WM, VR512, |
| 123010 | /* VMOVUPDZrrk_REV */ |
| 123011 | VR512, VK8WM, VR512, |
| 123012 | /* VMOVUPDZrrkz */ |
| 123013 | VR512, VK8WM, VR512, |
| 123014 | /* VMOVUPDZrrkz_REV */ |
| 123015 | VR512, VK8WM, VR512, |
| 123016 | /* VMOVUPDmr */ |
| 123017 | f128mem, VR128, |
| 123018 | /* VMOVUPDrm */ |
| 123019 | VR128, f128mem, |
| 123020 | /* VMOVUPDrr */ |
| 123021 | VR128, VR128, |
| 123022 | /* VMOVUPDrr_REV */ |
| 123023 | VR128, VR128, |
| 123024 | /* VMOVUPSYmr */ |
| 123025 | f256mem, VR256, |
| 123026 | /* VMOVUPSYrm */ |
| 123027 | VR256, f256mem, |
| 123028 | /* VMOVUPSYrr */ |
| 123029 | VR256, VR256, |
| 123030 | /* VMOVUPSYrr_REV */ |
| 123031 | VR256, VR256, |
| 123032 | /* VMOVUPSZ128mr */ |
| 123033 | f128mem, VR128X, |
| 123034 | /* VMOVUPSZ128mrk */ |
| 123035 | f128mem, VK4WM, VR128X, |
| 123036 | /* VMOVUPSZ128rm */ |
| 123037 | VR128X, f128mem, |
| 123038 | /* VMOVUPSZ128rmk */ |
| 123039 | VR128X, VR128X, VK4WM, f128mem, |
| 123040 | /* VMOVUPSZ128rmkz */ |
| 123041 | VR128X, VK4WM, f128mem, |
| 123042 | /* VMOVUPSZ128rr */ |
| 123043 | VR128X, VR128X, |
| 123044 | /* VMOVUPSZ128rr_REV */ |
| 123045 | VR128X, VR128X, |
| 123046 | /* VMOVUPSZ128rrk */ |
| 123047 | VR128X, VR128X, VK4WM, VR128X, |
| 123048 | /* VMOVUPSZ128rrk_REV */ |
| 123049 | VR128X, VK4WM, VR128X, |
| 123050 | /* VMOVUPSZ128rrkz */ |
| 123051 | VR128X, VK4WM, VR128X, |
| 123052 | /* VMOVUPSZ128rrkz_REV */ |
| 123053 | VR128X, VK4WM, VR128X, |
| 123054 | /* VMOVUPSZ256mr */ |
| 123055 | f256mem, VR256X, |
| 123056 | /* VMOVUPSZ256mrk */ |
| 123057 | f256mem, VK8WM, VR256X, |
| 123058 | /* VMOVUPSZ256rm */ |
| 123059 | VR256X, f256mem, |
| 123060 | /* VMOVUPSZ256rmk */ |
| 123061 | VR256X, VR256X, VK8WM, f256mem, |
| 123062 | /* VMOVUPSZ256rmkz */ |
| 123063 | VR256X, VK8WM, f256mem, |
| 123064 | /* VMOVUPSZ256rr */ |
| 123065 | VR256X, VR256X, |
| 123066 | /* VMOVUPSZ256rr_REV */ |
| 123067 | VR256X, VR256X, |
| 123068 | /* VMOVUPSZ256rrk */ |
| 123069 | VR256X, VR256X, VK8WM, VR256X, |
| 123070 | /* VMOVUPSZ256rrk_REV */ |
| 123071 | VR256X, VK8WM, VR256X, |
| 123072 | /* VMOVUPSZ256rrkz */ |
| 123073 | VR256X, VK8WM, VR256X, |
| 123074 | /* VMOVUPSZ256rrkz_REV */ |
| 123075 | VR256X, VK8WM, VR256X, |
| 123076 | /* VMOVUPSZmr */ |
| 123077 | f512mem, VR512, |
| 123078 | /* VMOVUPSZmrk */ |
| 123079 | f512mem, VK16WM, VR512, |
| 123080 | /* VMOVUPSZrm */ |
| 123081 | VR512, f512mem, |
| 123082 | /* VMOVUPSZrmk */ |
| 123083 | VR512, VR512, VK16WM, f512mem, |
| 123084 | /* VMOVUPSZrmkz */ |
| 123085 | VR512, VK16WM, f512mem, |
| 123086 | /* VMOVUPSZrr */ |
| 123087 | VR512, VR512, |
| 123088 | /* VMOVUPSZrr_REV */ |
| 123089 | VR512, VR512, |
| 123090 | /* VMOVUPSZrrk */ |
| 123091 | VR512, VR512, VK16WM, VR512, |
| 123092 | /* VMOVUPSZrrk_REV */ |
| 123093 | VR512, VK16WM, VR512, |
| 123094 | /* VMOVUPSZrrkz */ |
| 123095 | VR512, VK16WM, VR512, |
| 123096 | /* VMOVUPSZrrkz_REV */ |
| 123097 | VR512, VK16WM, VR512, |
| 123098 | /* VMOVUPSmr */ |
| 123099 | f128mem, VR128, |
| 123100 | /* VMOVUPSrm */ |
| 123101 | VR128, f128mem, |
| 123102 | /* VMOVUPSrr */ |
| 123103 | VR128, VR128, |
| 123104 | /* VMOVUPSrr_REV */ |
| 123105 | VR128, VR128, |
| 123106 | /* VMOVW2SHrr */ |
| 123107 | VR128X, GR32, |
| 123108 | /* VMOVW64toSHrr */ |
| 123109 | VR128X, GR64, |
| 123110 | /* VMOVWmr */ |
| 123111 | i16mem, VR128X, |
| 123112 | /* VMOVWrm */ |
| 123113 | VR128X, i16mem, |
| 123114 | /* VMOVZPDILo2PDIZmr */ |
| 123115 | i32mem, VR128X, |
| 123116 | /* VMOVZPDILo2PDIZrm */ |
| 123117 | VR128X, i32mem, |
| 123118 | /* VMOVZPDILo2PDIZrr */ |
| 123119 | VR128X, VR128X, |
| 123120 | /* VMOVZPDILo2PDIZrr2 */ |
| 123121 | VR128X, VR128X, |
| 123122 | /* VMOVZPQILo2PQIZrr */ |
| 123123 | VR128X, VR128X, |
| 123124 | /* VMOVZPQILo2PQIrr */ |
| 123125 | VR128, VR128, |
| 123126 | /* VMOVZPWILo2PWIZmr */ |
| 123127 | i32mem, VR128X, |
| 123128 | /* VMOVZPWILo2PWIZrm */ |
| 123129 | VR128X, i16mem, |
| 123130 | /* VMOVZPWILo2PWIZrr */ |
| 123131 | VR128X, VR128X, |
| 123132 | /* VMOVZPWILo2PWIZrr2 */ |
| 123133 | VR128X, VR128X, |
| 123134 | /* VMPSADBWYrmi */ |
| 123135 | VR256, VR256, i256mem, u8imm, |
| 123136 | /* VMPSADBWYrri */ |
| 123137 | VR256, VR256, VR256, u8imm, |
| 123138 | /* VMPSADBWZ128rmi */ |
| 123139 | VR128X, VR128X, i128mem, u8imm, |
| 123140 | /* VMPSADBWZ128rmik */ |
| 123141 | VR128X, VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 123142 | /* VMPSADBWZ128rmikz */ |
| 123143 | VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 123144 | /* VMPSADBWZ128rri */ |
| 123145 | VR128X, VR128X, VR128X, u8imm, |
| 123146 | /* VMPSADBWZ128rrik */ |
| 123147 | VR128X, VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 123148 | /* VMPSADBWZ128rrikz */ |
| 123149 | VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 123150 | /* VMPSADBWZ256rmi */ |
| 123151 | VR256X, VR256X, i256mem, u8imm, |
| 123152 | /* VMPSADBWZ256rmik */ |
| 123153 | VR256X, VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 123154 | /* VMPSADBWZ256rmikz */ |
| 123155 | VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 123156 | /* VMPSADBWZ256rri */ |
| 123157 | VR256X, VR256X, VR256X, u8imm, |
| 123158 | /* VMPSADBWZ256rrik */ |
| 123159 | VR256X, VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 123160 | /* VMPSADBWZ256rrikz */ |
| 123161 | VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 123162 | /* VMPSADBWZrmi */ |
| 123163 | VR512, VR512, i512mem, u8imm, |
| 123164 | /* VMPSADBWZrmik */ |
| 123165 | VR512, VR512, VK32WM, VR512, i512mem, u8imm, |
| 123166 | /* VMPSADBWZrmikz */ |
| 123167 | VR512, VK32WM, VR512, i512mem, u8imm, |
| 123168 | /* VMPSADBWZrri */ |
| 123169 | VR512, VR512, VR512, u8imm, |
| 123170 | /* VMPSADBWZrrik */ |
| 123171 | VR512, VR512, VK32WM, VR512, VR512, u8imm, |
| 123172 | /* VMPSADBWZrrikz */ |
| 123173 | VR512, VK32WM, VR512, VR512, u8imm, |
| 123174 | /* VMPSADBWrmi */ |
| 123175 | VR128, VR128, i128mem, u8imm, |
| 123176 | /* VMPSADBWrri */ |
| 123177 | VR128, VR128, VR128, u8imm, |
| 123178 | /* VMPTRLDm */ |
| 123179 | i64mem, |
| 123180 | /* VMPTRSTm */ |
| 123181 | i64mem, |
| 123182 | /* VMREAD32mr */ |
| 123183 | i32mem, GR32, |
| 123184 | /* VMREAD32rr */ |
| 123185 | GR32, GR32, |
| 123186 | /* VMREAD64mr */ |
| 123187 | i64mem, GR64, |
| 123188 | /* VMREAD64rr */ |
| 123189 | GR64, GR64, |
| 123190 | /* VMRESUME */ |
| 123191 | /* VMRUN32 */ |
| 123192 | /* VMRUN64 */ |
| 123193 | /* VMSAVE32 */ |
| 123194 | /* VMSAVE64 */ |
| 123195 | /* VMULBF16Z128rm */ |
| 123196 | VR128X, VR128X, f128mem, |
| 123197 | /* VMULBF16Z128rmb */ |
| 123198 | VR128X, VR128X, f16mem, |
| 123199 | /* VMULBF16Z128rmbk */ |
| 123200 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 123201 | /* VMULBF16Z128rmbkz */ |
| 123202 | VR128X, VK8WM, VR128X, f16mem, |
| 123203 | /* VMULBF16Z128rmk */ |
| 123204 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 123205 | /* VMULBF16Z128rmkz */ |
| 123206 | VR128X, VK8WM, VR128X, f128mem, |
| 123207 | /* VMULBF16Z128rr */ |
| 123208 | VR128X, VR128X, VR128X, |
| 123209 | /* VMULBF16Z128rrk */ |
| 123210 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123211 | /* VMULBF16Z128rrkz */ |
| 123212 | VR128X, VK8WM, VR128X, VR128X, |
| 123213 | /* VMULBF16Z256rm */ |
| 123214 | VR256X, VR256X, f256mem, |
| 123215 | /* VMULBF16Z256rmb */ |
| 123216 | VR256X, VR256X, f16mem, |
| 123217 | /* VMULBF16Z256rmbk */ |
| 123218 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 123219 | /* VMULBF16Z256rmbkz */ |
| 123220 | VR256X, VK16WM, VR256X, f16mem, |
| 123221 | /* VMULBF16Z256rmk */ |
| 123222 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 123223 | /* VMULBF16Z256rmkz */ |
| 123224 | VR256X, VK16WM, VR256X, f256mem, |
| 123225 | /* VMULBF16Z256rr */ |
| 123226 | VR256X, VR256X, VR256X, |
| 123227 | /* VMULBF16Z256rrk */ |
| 123228 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123229 | /* VMULBF16Z256rrkz */ |
| 123230 | VR256X, VK16WM, VR256X, VR256X, |
| 123231 | /* VMULBF16Zrm */ |
| 123232 | VR512, VR512, f512mem, |
| 123233 | /* VMULBF16Zrmb */ |
| 123234 | VR512, VR512, f16mem, |
| 123235 | /* VMULBF16Zrmbk */ |
| 123236 | VR512, VR512, VK32WM, VR512, f16mem, |
| 123237 | /* VMULBF16Zrmbkz */ |
| 123238 | VR512, VK32WM, VR512, f16mem, |
| 123239 | /* VMULBF16Zrmk */ |
| 123240 | VR512, VR512, VK32WM, VR512, f512mem, |
| 123241 | /* VMULBF16Zrmkz */ |
| 123242 | VR512, VK32WM, VR512, f512mem, |
| 123243 | /* VMULBF16Zrr */ |
| 123244 | VR512, VR512, VR512, |
| 123245 | /* VMULBF16Zrrk */ |
| 123246 | VR512, VR512, VK32WM, VR512, VR512, |
| 123247 | /* VMULBF16Zrrkz */ |
| 123248 | VR512, VK32WM, VR512, VR512, |
| 123249 | /* VMULPDYrm */ |
| 123250 | VR256, VR256, f256mem, |
| 123251 | /* VMULPDYrr */ |
| 123252 | VR256, VR256, VR256, |
| 123253 | /* VMULPDZ128rm */ |
| 123254 | VR128X, VR128X, f128mem, |
| 123255 | /* VMULPDZ128rmb */ |
| 123256 | VR128X, VR128X, f64mem, |
| 123257 | /* VMULPDZ128rmbk */ |
| 123258 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 123259 | /* VMULPDZ128rmbkz */ |
| 123260 | VR128X, VK2WM, VR128X, f64mem, |
| 123261 | /* VMULPDZ128rmk */ |
| 123262 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 123263 | /* VMULPDZ128rmkz */ |
| 123264 | VR128X, VK2WM, VR128X, f128mem, |
| 123265 | /* VMULPDZ128rr */ |
| 123266 | VR128X, VR128X, VR128X, |
| 123267 | /* VMULPDZ128rrk */ |
| 123268 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 123269 | /* VMULPDZ128rrkz */ |
| 123270 | VR128X, VK2WM, VR128X, VR128X, |
| 123271 | /* VMULPDZ256rm */ |
| 123272 | VR256X, VR256X, f256mem, |
| 123273 | /* VMULPDZ256rmb */ |
| 123274 | VR256X, VR256X, f64mem, |
| 123275 | /* VMULPDZ256rmbk */ |
| 123276 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 123277 | /* VMULPDZ256rmbkz */ |
| 123278 | VR256X, VK4WM, VR256X, f64mem, |
| 123279 | /* VMULPDZ256rmk */ |
| 123280 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 123281 | /* VMULPDZ256rmkz */ |
| 123282 | VR256X, VK4WM, VR256X, f256mem, |
| 123283 | /* VMULPDZ256rr */ |
| 123284 | VR256X, VR256X, VR256X, |
| 123285 | /* VMULPDZ256rrk */ |
| 123286 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 123287 | /* VMULPDZ256rrkz */ |
| 123288 | VR256X, VK4WM, VR256X, VR256X, |
| 123289 | /* VMULPDZrm */ |
| 123290 | VR512, VR512, f512mem, |
| 123291 | /* VMULPDZrmb */ |
| 123292 | VR512, VR512, f64mem, |
| 123293 | /* VMULPDZrmbk */ |
| 123294 | VR512, VR512, VK8WM, VR512, f64mem, |
| 123295 | /* VMULPDZrmbkz */ |
| 123296 | VR512, VK8WM, VR512, f64mem, |
| 123297 | /* VMULPDZrmk */ |
| 123298 | VR512, VR512, VK8WM, VR512, f512mem, |
| 123299 | /* VMULPDZrmkz */ |
| 123300 | VR512, VK8WM, VR512, f512mem, |
| 123301 | /* VMULPDZrr */ |
| 123302 | VR512, VR512, VR512, |
| 123303 | /* VMULPDZrrb */ |
| 123304 | VR512, VR512, VR512, AVX512RC, |
| 123305 | /* VMULPDZrrbk */ |
| 123306 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 123307 | /* VMULPDZrrbkz */ |
| 123308 | VR512, VK8WM, VR512, VR512, AVX512RC, |
| 123309 | /* VMULPDZrrk */ |
| 123310 | VR512, VR512, VK8WM, VR512, VR512, |
| 123311 | /* VMULPDZrrkz */ |
| 123312 | VR512, VK8WM, VR512, VR512, |
| 123313 | /* VMULPDrm */ |
| 123314 | VR128, VR128, f128mem, |
| 123315 | /* VMULPDrr */ |
| 123316 | VR128, VR128, VR128, |
| 123317 | /* VMULPHZ128rm */ |
| 123318 | VR128X, VR128X, f128mem, |
| 123319 | /* VMULPHZ128rmb */ |
| 123320 | VR128X, VR128X, f16mem, |
| 123321 | /* VMULPHZ128rmbk */ |
| 123322 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 123323 | /* VMULPHZ128rmbkz */ |
| 123324 | VR128X, VK8WM, VR128X, f16mem, |
| 123325 | /* VMULPHZ128rmk */ |
| 123326 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 123327 | /* VMULPHZ128rmkz */ |
| 123328 | VR128X, VK8WM, VR128X, f128mem, |
| 123329 | /* VMULPHZ128rr */ |
| 123330 | VR128X, VR128X, VR128X, |
| 123331 | /* VMULPHZ128rrk */ |
| 123332 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123333 | /* VMULPHZ128rrkz */ |
| 123334 | VR128X, VK8WM, VR128X, VR128X, |
| 123335 | /* VMULPHZ256rm */ |
| 123336 | VR256X, VR256X, f256mem, |
| 123337 | /* VMULPHZ256rmb */ |
| 123338 | VR256X, VR256X, f16mem, |
| 123339 | /* VMULPHZ256rmbk */ |
| 123340 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 123341 | /* VMULPHZ256rmbkz */ |
| 123342 | VR256X, VK16WM, VR256X, f16mem, |
| 123343 | /* VMULPHZ256rmk */ |
| 123344 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 123345 | /* VMULPHZ256rmkz */ |
| 123346 | VR256X, VK16WM, VR256X, f256mem, |
| 123347 | /* VMULPHZ256rr */ |
| 123348 | VR256X, VR256X, VR256X, |
| 123349 | /* VMULPHZ256rrk */ |
| 123350 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123351 | /* VMULPHZ256rrkz */ |
| 123352 | VR256X, VK16WM, VR256X, VR256X, |
| 123353 | /* VMULPHZrm */ |
| 123354 | VR512, VR512, f512mem, |
| 123355 | /* VMULPHZrmb */ |
| 123356 | VR512, VR512, f16mem, |
| 123357 | /* VMULPHZrmbk */ |
| 123358 | VR512, VR512, VK32WM, VR512, f16mem, |
| 123359 | /* VMULPHZrmbkz */ |
| 123360 | VR512, VK32WM, VR512, f16mem, |
| 123361 | /* VMULPHZrmk */ |
| 123362 | VR512, VR512, VK32WM, VR512, f512mem, |
| 123363 | /* VMULPHZrmkz */ |
| 123364 | VR512, VK32WM, VR512, f512mem, |
| 123365 | /* VMULPHZrr */ |
| 123366 | VR512, VR512, VR512, |
| 123367 | /* VMULPHZrrb */ |
| 123368 | VR512, VR512, VR512, AVX512RC, |
| 123369 | /* VMULPHZrrbk */ |
| 123370 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 123371 | /* VMULPHZrrbkz */ |
| 123372 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 123373 | /* VMULPHZrrk */ |
| 123374 | VR512, VR512, VK32WM, VR512, VR512, |
| 123375 | /* VMULPHZrrkz */ |
| 123376 | VR512, VK32WM, VR512, VR512, |
| 123377 | /* VMULPSYrm */ |
| 123378 | VR256, VR256, f256mem, |
| 123379 | /* VMULPSYrr */ |
| 123380 | VR256, VR256, VR256, |
| 123381 | /* VMULPSZ128rm */ |
| 123382 | VR128X, VR128X, f128mem, |
| 123383 | /* VMULPSZ128rmb */ |
| 123384 | VR128X, VR128X, f32mem, |
| 123385 | /* VMULPSZ128rmbk */ |
| 123386 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123387 | /* VMULPSZ128rmbkz */ |
| 123388 | VR128X, VK4WM, VR128X, f32mem, |
| 123389 | /* VMULPSZ128rmk */ |
| 123390 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123391 | /* VMULPSZ128rmkz */ |
| 123392 | VR128X, VK4WM, VR128X, f128mem, |
| 123393 | /* VMULPSZ128rr */ |
| 123394 | VR128X, VR128X, VR128X, |
| 123395 | /* VMULPSZ128rrk */ |
| 123396 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123397 | /* VMULPSZ128rrkz */ |
| 123398 | VR128X, VK4WM, VR128X, VR128X, |
| 123399 | /* VMULPSZ256rm */ |
| 123400 | VR256X, VR256X, f256mem, |
| 123401 | /* VMULPSZ256rmb */ |
| 123402 | VR256X, VR256X, f32mem, |
| 123403 | /* VMULPSZ256rmbk */ |
| 123404 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123405 | /* VMULPSZ256rmbkz */ |
| 123406 | VR256X, VK8WM, VR256X, f32mem, |
| 123407 | /* VMULPSZ256rmk */ |
| 123408 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123409 | /* VMULPSZ256rmkz */ |
| 123410 | VR256X, VK8WM, VR256X, f256mem, |
| 123411 | /* VMULPSZ256rr */ |
| 123412 | VR256X, VR256X, VR256X, |
| 123413 | /* VMULPSZ256rrk */ |
| 123414 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123415 | /* VMULPSZ256rrkz */ |
| 123416 | VR256X, VK8WM, VR256X, VR256X, |
| 123417 | /* VMULPSZrm */ |
| 123418 | VR512, VR512, f512mem, |
| 123419 | /* VMULPSZrmb */ |
| 123420 | VR512, VR512, f32mem, |
| 123421 | /* VMULPSZrmbk */ |
| 123422 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123423 | /* VMULPSZrmbkz */ |
| 123424 | VR512, VK16WM, VR512, f32mem, |
| 123425 | /* VMULPSZrmk */ |
| 123426 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123427 | /* VMULPSZrmkz */ |
| 123428 | VR512, VK16WM, VR512, f512mem, |
| 123429 | /* VMULPSZrr */ |
| 123430 | VR512, VR512, VR512, |
| 123431 | /* VMULPSZrrb */ |
| 123432 | VR512, VR512, VR512, AVX512RC, |
| 123433 | /* VMULPSZrrbk */ |
| 123434 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123435 | /* VMULPSZrrbkz */ |
| 123436 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123437 | /* VMULPSZrrk */ |
| 123438 | VR512, VR512, VK16WM, VR512, VR512, |
| 123439 | /* VMULPSZrrkz */ |
| 123440 | VR512, VK16WM, VR512, VR512, |
| 123441 | /* VMULPSrm */ |
| 123442 | VR128, VR128, f128mem, |
| 123443 | /* VMULPSrr */ |
| 123444 | VR128, VR128, VR128, |
| 123445 | /* VMULSDZrm */ |
| 123446 | FR64X, FR64X, f64mem, |
| 123447 | /* VMULSDZrm_Int */ |
| 123448 | VR128X, VR128X, sdmem, |
| 123449 | /* VMULSDZrmk_Int */ |
| 123450 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 123451 | /* VMULSDZrmkz_Int */ |
| 123452 | VR128X, VK1WM, VR128X, sdmem, |
| 123453 | /* VMULSDZrr */ |
| 123454 | FR64X, FR64X, FR64X, |
| 123455 | /* VMULSDZrr_Int */ |
| 123456 | VR128X, VR128X, VR128X, |
| 123457 | /* VMULSDZrrb_Int */ |
| 123458 | VR128X, VR128X, VR128X, AVX512RC, |
| 123459 | /* VMULSDZrrbk_Int */ |
| 123460 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123461 | /* VMULSDZrrbkz_Int */ |
| 123462 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123463 | /* VMULSDZrrk_Int */ |
| 123464 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 123465 | /* VMULSDZrrkz_Int */ |
| 123466 | VR128X, VK1WM, VR128X, VR128X, |
| 123467 | /* VMULSDrm */ |
| 123468 | FR64, FR64, f64mem, |
| 123469 | /* VMULSDrm_Int */ |
| 123470 | VR128, VR128, sdmem, |
| 123471 | /* VMULSDrr */ |
| 123472 | FR64, FR64, FR64, |
| 123473 | /* VMULSDrr_Int */ |
| 123474 | VR128, VR128, VR128, |
| 123475 | /* VMULSHZrm */ |
| 123476 | FR16X, FR16X, f16mem, |
| 123477 | /* VMULSHZrm_Int */ |
| 123478 | VR128X, VR128X, shmem, |
| 123479 | /* VMULSHZrmk_Int */ |
| 123480 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 123481 | /* VMULSHZrmkz_Int */ |
| 123482 | VR128X, VK1WM, VR128X, shmem, |
| 123483 | /* VMULSHZrr */ |
| 123484 | FR16X, FR16X, FR16X, |
| 123485 | /* VMULSHZrr_Int */ |
| 123486 | VR128X, VR128X, VR128X, |
| 123487 | /* VMULSHZrrb_Int */ |
| 123488 | VR128X, VR128X, VR128X, AVX512RC, |
| 123489 | /* VMULSHZrrbk_Int */ |
| 123490 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123491 | /* VMULSHZrrbkz_Int */ |
| 123492 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123493 | /* VMULSHZrrk_Int */ |
| 123494 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 123495 | /* VMULSHZrrkz_Int */ |
| 123496 | VR128X, VK1WM, VR128X, VR128X, |
| 123497 | /* VMULSSZrm */ |
| 123498 | FR32X, FR32X, f32mem, |
| 123499 | /* VMULSSZrm_Int */ |
| 123500 | VR128X, VR128X, ssmem, |
| 123501 | /* VMULSSZrmk_Int */ |
| 123502 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 123503 | /* VMULSSZrmkz_Int */ |
| 123504 | VR128X, VK1WM, VR128X, ssmem, |
| 123505 | /* VMULSSZrr */ |
| 123506 | FR32X, FR32X, FR32X, |
| 123507 | /* VMULSSZrr_Int */ |
| 123508 | VR128X, VR128X, VR128X, |
| 123509 | /* VMULSSZrrb_Int */ |
| 123510 | VR128X, VR128X, VR128X, AVX512RC, |
| 123511 | /* VMULSSZrrbk_Int */ |
| 123512 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123513 | /* VMULSSZrrbkz_Int */ |
| 123514 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123515 | /* VMULSSZrrk_Int */ |
| 123516 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 123517 | /* VMULSSZrrkz_Int */ |
| 123518 | VR128X, VK1WM, VR128X, VR128X, |
| 123519 | /* VMULSSrm */ |
| 123520 | FR32, FR32, f32mem, |
| 123521 | /* VMULSSrm_Int */ |
| 123522 | VR128, VR128, ssmem, |
| 123523 | /* VMULSSrr */ |
| 123524 | FR32, FR32, FR32, |
| 123525 | /* VMULSSrr_Int */ |
| 123526 | VR128, VR128, VR128, |
| 123527 | /* VMWRITE32rm */ |
| 123528 | GR32, i32mem, |
| 123529 | /* VMWRITE32rr */ |
| 123530 | GR32, GR32, |
| 123531 | /* VMWRITE64rm */ |
| 123532 | GR64, i64mem, |
| 123533 | /* VMWRITE64rr */ |
| 123534 | GR64, GR64, |
| 123535 | /* VMXOFF */ |
| 123536 | /* VMXON */ |
| 123537 | i64mem, |
| 123538 | /* VORPDYrm */ |
| 123539 | VR256, VR256, f256mem, |
| 123540 | /* VORPDYrr */ |
| 123541 | VR256, VR256, VR256, |
| 123542 | /* VORPDZ128rm */ |
| 123543 | VR128X, VR128X, f128mem, |
| 123544 | /* VORPDZ128rmb */ |
| 123545 | VR128X, VR128X, f64mem, |
| 123546 | /* VORPDZ128rmbk */ |
| 123547 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 123548 | /* VORPDZ128rmbkz */ |
| 123549 | VR128X, VK2WM, VR128X, f64mem, |
| 123550 | /* VORPDZ128rmk */ |
| 123551 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 123552 | /* VORPDZ128rmkz */ |
| 123553 | VR128X, VK2WM, VR128X, f128mem, |
| 123554 | /* VORPDZ128rr */ |
| 123555 | VR128X, VR128X, VR128X, |
| 123556 | /* VORPDZ128rrk */ |
| 123557 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 123558 | /* VORPDZ128rrkz */ |
| 123559 | VR128X, VK2WM, VR128X, VR128X, |
| 123560 | /* VORPDZ256rm */ |
| 123561 | VR256X, VR256X, f256mem, |
| 123562 | /* VORPDZ256rmb */ |
| 123563 | VR256X, VR256X, f64mem, |
| 123564 | /* VORPDZ256rmbk */ |
| 123565 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 123566 | /* VORPDZ256rmbkz */ |
| 123567 | VR256X, VK4WM, VR256X, f64mem, |
| 123568 | /* VORPDZ256rmk */ |
| 123569 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 123570 | /* VORPDZ256rmkz */ |
| 123571 | VR256X, VK4WM, VR256X, f256mem, |
| 123572 | /* VORPDZ256rr */ |
| 123573 | VR256X, VR256X, VR256X, |
| 123574 | /* VORPDZ256rrk */ |
| 123575 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 123576 | /* VORPDZ256rrkz */ |
| 123577 | VR256X, VK4WM, VR256X, VR256X, |
| 123578 | /* VORPDZrm */ |
| 123579 | VR512, VR512, f512mem, |
| 123580 | /* VORPDZrmb */ |
| 123581 | VR512, VR512, f64mem, |
| 123582 | /* VORPDZrmbk */ |
| 123583 | VR512, VR512, VK8WM, VR512, f64mem, |
| 123584 | /* VORPDZrmbkz */ |
| 123585 | VR512, VK8WM, VR512, f64mem, |
| 123586 | /* VORPDZrmk */ |
| 123587 | VR512, VR512, VK8WM, VR512, f512mem, |
| 123588 | /* VORPDZrmkz */ |
| 123589 | VR512, VK8WM, VR512, f512mem, |
| 123590 | /* VORPDZrr */ |
| 123591 | VR512, VR512, VR512, |
| 123592 | /* VORPDZrrk */ |
| 123593 | VR512, VR512, VK8WM, VR512, VR512, |
| 123594 | /* VORPDZrrkz */ |
| 123595 | VR512, VK8WM, VR512, VR512, |
| 123596 | /* VORPDrm */ |
| 123597 | VR128, VR128, f128mem, |
| 123598 | /* VORPDrr */ |
| 123599 | VR128, VR128, VR128, |
| 123600 | /* VORPSYrm */ |
| 123601 | VR256, VR256, f256mem, |
| 123602 | /* VORPSYrr */ |
| 123603 | VR256, VR256, VR256, |
| 123604 | /* VORPSZ128rm */ |
| 123605 | VR128X, VR128X, f128mem, |
| 123606 | /* VORPSZ128rmb */ |
| 123607 | VR128X, VR128X, f32mem, |
| 123608 | /* VORPSZ128rmbk */ |
| 123609 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123610 | /* VORPSZ128rmbkz */ |
| 123611 | VR128X, VK4WM, VR128X, f32mem, |
| 123612 | /* VORPSZ128rmk */ |
| 123613 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123614 | /* VORPSZ128rmkz */ |
| 123615 | VR128X, VK4WM, VR128X, f128mem, |
| 123616 | /* VORPSZ128rr */ |
| 123617 | VR128X, VR128X, VR128X, |
| 123618 | /* VORPSZ128rrk */ |
| 123619 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123620 | /* VORPSZ128rrkz */ |
| 123621 | VR128X, VK4WM, VR128X, VR128X, |
| 123622 | /* VORPSZ256rm */ |
| 123623 | VR256X, VR256X, f256mem, |
| 123624 | /* VORPSZ256rmb */ |
| 123625 | VR256X, VR256X, f32mem, |
| 123626 | /* VORPSZ256rmbk */ |
| 123627 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123628 | /* VORPSZ256rmbkz */ |
| 123629 | VR256X, VK8WM, VR256X, f32mem, |
| 123630 | /* VORPSZ256rmk */ |
| 123631 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123632 | /* VORPSZ256rmkz */ |
| 123633 | VR256X, VK8WM, VR256X, f256mem, |
| 123634 | /* VORPSZ256rr */ |
| 123635 | VR256X, VR256X, VR256X, |
| 123636 | /* VORPSZ256rrk */ |
| 123637 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123638 | /* VORPSZ256rrkz */ |
| 123639 | VR256X, VK8WM, VR256X, VR256X, |
| 123640 | /* VORPSZrm */ |
| 123641 | VR512, VR512, f512mem, |
| 123642 | /* VORPSZrmb */ |
| 123643 | VR512, VR512, f32mem, |
| 123644 | /* VORPSZrmbk */ |
| 123645 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123646 | /* VORPSZrmbkz */ |
| 123647 | VR512, VK16WM, VR512, f32mem, |
| 123648 | /* VORPSZrmk */ |
| 123649 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123650 | /* VORPSZrmkz */ |
| 123651 | VR512, VK16WM, VR512, f512mem, |
| 123652 | /* VORPSZrr */ |
| 123653 | VR512, VR512, VR512, |
| 123654 | /* VORPSZrrk */ |
| 123655 | VR512, VR512, VK16WM, VR512, VR512, |
| 123656 | /* VORPSZrrkz */ |
| 123657 | VR512, VK16WM, VR512, VR512, |
| 123658 | /* VORPSrm */ |
| 123659 | VR128, VR128, f128mem, |
| 123660 | /* VORPSrr */ |
| 123661 | VR128, VR128, VR128, |
| 123662 | /* VP2INTERSECTDZ128rm */ |
| 123663 | VK4Pair, VR128X, i128mem, |
| 123664 | /* VP2INTERSECTDZ128rmb */ |
| 123665 | VK4Pair, VR128X, i32mem, |
| 123666 | /* VP2INTERSECTDZ128rr */ |
| 123667 | VK4Pair, VR128X, VR128X, |
| 123668 | /* VP2INTERSECTDZ256rm */ |
| 123669 | VK8Pair, VR256X, i256mem, |
| 123670 | /* VP2INTERSECTDZ256rmb */ |
| 123671 | VK8Pair, VR256X, i32mem, |
| 123672 | /* VP2INTERSECTDZ256rr */ |
| 123673 | VK8Pair, VR256X, VR256X, |
| 123674 | /* VP2INTERSECTDZrm */ |
| 123675 | VK16Pair, VR512, i512mem, |
| 123676 | /* VP2INTERSECTDZrmb */ |
| 123677 | VK16Pair, VR512, i32mem, |
| 123678 | /* VP2INTERSECTDZrr */ |
| 123679 | VK16Pair, VR512, VR512, |
| 123680 | /* VP2INTERSECTQZ128rm */ |
| 123681 | VK2Pair, VR128X, i128mem, |
| 123682 | /* VP2INTERSECTQZ128rmb */ |
| 123683 | VK2Pair, VR128X, i64mem, |
| 123684 | /* VP2INTERSECTQZ128rr */ |
| 123685 | VK2Pair, VR128X, VR128X, |
| 123686 | /* VP2INTERSECTQZ256rm */ |
| 123687 | VK4Pair, VR256X, i256mem, |
| 123688 | /* VP2INTERSECTQZ256rmb */ |
| 123689 | VK4Pair, VR256X, i64mem, |
| 123690 | /* VP2INTERSECTQZ256rr */ |
| 123691 | VK4Pair, VR256X, VR256X, |
| 123692 | /* VP2INTERSECTQZrm */ |
| 123693 | VK8Pair, VR512, i512mem, |
| 123694 | /* VP2INTERSECTQZrmb */ |
| 123695 | VK8Pair, VR512, i64mem, |
| 123696 | /* VP2INTERSECTQZrr */ |
| 123697 | VK8Pair, VR512, VR512, |
| 123698 | /* VP4DPWSSDSrm */ |
| 123699 | VR512, VR512, VR512, f128mem, |
| 123700 | /* VP4DPWSSDSrmk */ |
| 123701 | VR512, VR512, VK16WM, VR512, f128mem, |
| 123702 | /* VP4DPWSSDSrmkz */ |
| 123703 | VR512, VR512, VK16WM, VR512, f128mem, |
| 123704 | /* VP4DPWSSDrm */ |
| 123705 | VR512, VR512, VR512, f128mem, |
| 123706 | /* VP4DPWSSDrmk */ |
| 123707 | VR512, VR512, VK16WM, VR512, f128mem, |
| 123708 | /* VP4DPWSSDrmkz */ |
| 123709 | VR512, VR512, VK16WM, VR512, f128mem, |
| 123710 | /* VPABSBYrm */ |
| 123711 | VR256, i256mem, |
| 123712 | /* VPABSBYrr */ |
| 123713 | VR256, VR256, |
| 123714 | /* VPABSBZ128rm */ |
| 123715 | VR128X, i128mem, |
| 123716 | /* VPABSBZ128rmk */ |
| 123717 | VR128X, VR128X, VK16WM, i128mem, |
| 123718 | /* VPABSBZ128rmkz */ |
| 123719 | VR128X, VK16WM, i128mem, |
| 123720 | /* VPABSBZ128rr */ |
| 123721 | VR128X, VR128X, |
| 123722 | /* VPABSBZ128rrk */ |
| 123723 | VR128X, VR128X, VK16WM, VR128X, |
| 123724 | /* VPABSBZ128rrkz */ |
| 123725 | VR128X, VK16WM, VR128X, |
| 123726 | /* VPABSBZ256rm */ |
| 123727 | VR256X, i256mem, |
| 123728 | /* VPABSBZ256rmk */ |
| 123729 | VR256X, VR256X, VK32WM, i256mem, |
| 123730 | /* VPABSBZ256rmkz */ |
| 123731 | VR256X, VK32WM, i256mem, |
| 123732 | /* VPABSBZ256rr */ |
| 123733 | VR256X, VR256X, |
| 123734 | /* VPABSBZ256rrk */ |
| 123735 | VR256X, VR256X, VK32WM, VR256X, |
| 123736 | /* VPABSBZ256rrkz */ |
| 123737 | VR256X, VK32WM, VR256X, |
| 123738 | /* VPABSBZrm */ |
| 123739 | VR512, i512mem, |
| 123740 | /* VPABSBZrmk */ |
| 123741 | VR512, VR512, VK64WM, i512mem, |
| 123742 | /* VPABSBZrmkz */ |
| 123743 | VR512, VK64WM, i512mem, |
| 123744 | /* VPABSBZrr */ |
| 123745 | VR512, VR512, |
| 123746 | /* VPABSBZrrk */ |
| 123747 | VR512, VR512, VK64WM, VR512, |
| 123748 | /* VPABSBZrrkz */ |
| 123749 | VR512, VK64WM, VR512, |
| 123750 | /* VPABSBrm */ |
| 123751 | VR128, i128mem, |
| 123752 | /* VPABSBrr */ |
| 123753 | VR128, VR128, |
| 123754 | /* VPABSDYrm */ |
| 123755 | VR256, i256mem, |
| 123756 | /* VPABSDYrr */ |
| 123757 | VR256, VR256, |
| 123758 | /* VPABSDZ128rm */ |
| 123759 | VR128X, i128mem, |
| 123760 | /* VPABSDZ128rmb */ |
| 123761 | VR128X, i32mem, |
| 123762 | /* VPABSDZ128rmbk */ |
| 123763 | VR128X, VR128X, VK4WM, i32mem, |
| 123764 | /* VPABSDZ128rmbkz */ |
| 123765 | VR128X, VK4WM, i32mem, |
| 123766 | /* VPABSDZ128rmk */ |
| 123767 | VR128X, VR128X, VK4WM, i128mem, |
| 123768 | /* VPABSDZ128rmkz */ |
| 123769 | VR128X, VK4WM, i128mem, |
| 123770 | /* VPABSDZ128rr */ |
| 123771 | VR128X, VR128X, |
| 123772 | /* VPABSDZ128rrk */ |
| 123773 | VR128X, VR128X, VK4WM, VR128X, |
| 123774 | /* VPABSDZ128rrkz */ |
| 123775 | VR128X, VK4WM, VR128X, |
| 123776 | /* VPABSDZ256rm */ |
| 123777 | VR256X, i256mem, |
| 123778 | /* VPABSDZ256rmb */ |
| 123779 | VR256X, i32mem, |
| 123780 | /* VPABSDZ256rmbk */ |
| 123781 | VR256X, VR256X, VK8WM, i32mem, |
| 123782 | /* VPABSDZ256rmbkz */ |
| 123783 | VR256X, VK8WM, i32mem, |
| 123784 | /* VPABSDZ256rmk */ |
| 123785 | VR256X, VR256X, VK8WM, i256mem, |
| 123786 | /* VPABSDZ256rmkz */ |
| 123787 | VR256X, VK8WM, i256mem, |
| 123788 | /* VPABSDZ256rr */ |
| 123789 | VR256X, VR256X, |
| 123790 | /* VPABSDZ256rrk */ |
| 123791 | VR256X, VR256X, VK8WM, VR256X, |
| 123792 | /* VPABSDZ256rrkz */ |
| 123793 | VR256X, VK8WM, VR256X, |
| 123794 | /* VPABSDZrm */ |
| 123795 | VR512, i512mem, |
| 123796 | /* VPABSDZrmb */ |
| 123797 | VR512, i32mem, |
| 123798 | /* VPABSDZrmbk */ |
| 123799 | VR512, VR512, VK16WM, i32mem, |
| 123800 | /* VPABSDZrmbkz */ |
| 123801 | VR512, VK16WM, i32mem, |
| 123802 | /* VPABSDZrmk */ |
| 123803 | VR512, VR512, VK16WM, i512mem, |
| 123804 | /* VPABSDZrmkz */ |
| 123805 | VR512, VK16WM, i512mem, |
| 123806 | /* VPABSDZrr */ |
| 123807 | VR512, VR512, |
| 123808 | /* VPABSDZrrk */ |
| 123809 | VR512, VR512, VK16WM, VR512, |
| 123810 | /* VPABSDZrrkz */ |
| 123811 | VR512, VK16WM, VR512, |
| 123812 | /* VPABSDrm */ |
| 123813 | VR128, i128mem, |
| 123814 | /* VPABSDrr */ |
| 123815 | VR128, VR128, |
| 123816 | /* VPABSQZ128rm */ |
| 123817 | VR128X, i128mem, |
| 123818 | /* VPABSQZ128rmb */ |
| 123819 | VR128X, i64mem, |
| 123820 | /* VPABSQZ128rmbk */ |
| 123821 | VR128X, VR128X, VK2WM, i64mem, |
| 123822 | /* VPABSQZ128rmbkz */ |
| 123823 | VR128X, VK2WM, i64mem, |
| 123824 | /* VPABSQZ128rmk */ |
| 123825 | VR128X, VR128X, VK2WM, i128mem, |
| 123826 | /* VPABSQZ128rmkz */ |
| 123827 | VR128X, VK2WM, i128mem, |
| 123828 | /* VPABSQZ128rr */ |
| 123829 | VR128X, VR128X, |
| 123830 | /* VPABSQZ128rrk */ |
| 123831 | VR128X, VR128X, VK2WM, VR128X, |
| 123832 | /* VPABSQZ128rrkz */ |
| 123833 | VR128X, VK2WM, VR128X, |
| 123834 | /* VPABSQZ256rm */ |
| 123835 | VR256X, i256mem, |
| 123836 | /* VPABSQZ256rmb */ |
| 123837 | VR256X, i64mem, |
| 123838 | /* VPABSQZ256rmbk */ |
| 123839 | VR256X, VR256X, VK4WM, i64mem, |
| 123840 | /* VPABSQZ256rmbkz */ |
| 123841 | VR256X, VK4WM, i64mem, |
| 123842 | /* VPABSQZ256rmk */ |
| 123843 | VR256X, VR256X, VK4WM, i256mem, |
| 123844 | /* VPABSQZ256rmkz */ |
| 123845 | VR256X, VK4WM, i256mem, |
| 123846 | /* VPABSQZ256rr */ |
| 123847 | VR256X, VR256X, |
| 123848 | /* VPABSQZ256rrk */ |
| 123849 | VR256X, VR256X, VK4WM, VR256X, |
| 123850 | /* VPABSQZ256rrkz */ |
| 123851 | VR256X, VK4WM, VR256X, |
| 123852 | /* VPABSQZrm */ |
| 123853 | VR512, i512mem, |
| 123854 | /* VPABSQZrmb */ |
| 123855 | VR512, i64mem, |
| 123856 | /* VPABSQZrmbk */ |
| 123857 | VR512, VR512, VK8WM, i64mem, |
| 123858 | /* VPABSQZrmbkz */ |
| 123859 | VR512, VK8WM, i64mem, |
| 123860 | /* VPABSQZrmk */ |
| 123861 | VR512, VR512, VK8WM, i512mem, |
| 123862 | /* VPABSQZrmkz */ |
| 123863 | VR512, VK8WM, i512mem, |
| 123864 | /* VPABSQZrr */ |
| 123865 | VR512, VR512, |
| 123866 | /* VPABSQZrrk */ |
| 123867 | VR512, VR512, VK8WM, VR512, |
| 123868 | /* VPABSQZrrkz */ |
| 123869 | VR512, VK8WM, VR512, |
| 123870 | /* VPABSWYrm */ |
| 123871 | VR256, i256mem, |
| 123872 | /* VPABSWYrr */ |
| 123873 | VR256, VR256, |
| 123874 | /* VPABSWZ128rm */ |
| 123875 | VR128X, i128mem, |
| 123876 | /* VPABSWZ128rmk */ |
| 123877 | VR128X, VR128X, VK8WM, i128mem, |
| 123878 | /* VPABSWZ128rmkz */ |
| 123879 | VR128X, VK8WM, i128mem, |
| 123880 | /* VPABSWZ128rr */ |
| 123881 | VR128X, VR128X, |
| 123882 | /* VPABSWZ128rrk */ |
| 123883 | VR128X, VR128X, VK8WM, VR128X, |
| 123884 | /* VPABSWZ128rrkz */ |
| 123885 | VR128X, VK8WM, VR128X, |
| 123886 | /* VPABSWZ256rm */ |
| 123887 | VR256X, i256mem, |
| 123888 | /* VPABSWZ256rmk */ |
| 123889 | VR256X, VR256X, VK16WM, i256mem, |
| 123890 | /* VPABSWZ256rmkz */ |
| 123891 | VR256X, VK16WM, i256mem, |
| 123892 | /* VPABSWZ256rr */ |
| 123893 | VR256X, VR256X, |
| 123894 | /* VPABSWZ256rrk */ |
| 123895 | VR256X, VR256X, VK16WM, VR256X, |
| 123896 | /* VPABSWZ256rrkz */ |
| 123897 | VR256X, VK16WM, VR256X, |
| 123898 | /* VPABSWZrm */ |
| 123899 | VR512, i512mem, |
| 123900 | /* VPABSWZrmk */ |
| 123901 | VR512, VR512, VK32WM, i512mem, |
| 123902 | /* VPABSWZrmkz */ |
| 123903 | VR512, VK32WM, i512mem, |
| 123904 | /* VPABSWZrr */ |
| 123905 | VR512, VR512, |
| 123906 | /* VPABSWZrrk */ |
| 123907 | VR512, VR512, VK32WM, VR512, |
| 123908 | /* VPABSWZrrkz */ |
| 123909 | VR512, VK32WM, VR512, |
| 123910 | /* VPABSWrm */ |
| 123911 | VR128, i128mem, |
| 123912 | /* VPABSWrr */ |
| 123913 | VR128, VR128, |
| 123914 | /* VPACKSSDWYrm */ |
| 123915 | VR256, VR256, i256mem, |
| 123916 | /* VPACKSSDWYrr */ |
| 123917 | VR256, VR256, VR256, |
| 123918 | /* VPACKSSDWZ128rm */ |
| 123919 | VR128X, VR128X, i128mem, |
| 123920 | /* VPACKSSDWZ128rmb */ |
| 123921 | VR128X, VR128X, i32mem, |
| 123922 | /* VPACKSSDWZ128rmbk */ |
| 123923 | VR128X, VR128X, VK8WM, VR128X, i32mem, |
| 123924 | /* VPACKSSDWZ128rmbkz */ |
| 123925 | VR128X, VK8WM, VR128X, i32mem, |
| 123926 | /* VPACKSSDWZ128rmk */ |
| 123927 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 123928 | /* VPACKSSDWZ128rmkz */ |
| 123929 | VR128X, VK8WM, VR128X, i128mem, |
| 123930 | /* VPACKSSDWZ128rr */ |
| 123931 | VR128X, VR128X, VR128X, |
| 123932 | /* VPACKSSDWZ128rrk */ |
| 123933 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123934 | /* VPACKSSDWZ128rrkz */ |
| 123935 | VR128X, VK8WM, VR128X, VR128X, |
| 123936 | /* VPACKSSDWZ256rm */ |
| 123937 | VR256X, VR256X, i256mem, |
| 123938 | /* VPACKSSDWZ256rmb */ |
| 123939 | VR256X, VR256X, i32mem, |
| 123940 | /* VPACKSSDWZ256rmbk */ |
| 123941 | VR256X, VR256X, VK16WM, VR256X, i32mem, |
| 123942 | /* VPACKSSDWZ256rmbkz */ |
| 123943 | VR256X, VK16WM, VR256X, i32mem, |
| 123944 | /* VPACKSSDWZ256rmk */ |
| 123945 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 123946 | /* VPACKSSDWZ256rmkz */ |
| 123947 | VR256X, VK16WM, VR256X, i256mem, |
| 123948 | /* VPACKSSDWZ256rr */ |
| 123949 | VR256X, VR256X, VR256X, |
| 123950 | /* VPACKSSDWZ256rrk */ |
| 123951 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123952 | /* VPACKSSDWZ256rrkz */ |
| 123953 | VR256X, VK16WM, VR256X, VR256X, |
| 123954 | /* VPACKSSDWZrm */ |
| 123955 | VR512, VR512, i512mem, |
| 123956 | /* VPACKSSDWZrmb */ |
| 123957 | VR512, VR512, i32mem, |
| 123958 | /* VPACKSSDWZrmbk */ |
| 123959 | VR512, VR512, VK32WM, VR512, i32mem, |
| 123960 | /* VPACKSSDWZrmbkz */ |
| 123961 | VR512, VK32WM, VR512, i32mem, |
| 123962 | /* VPACKSSDWZrmk */ |
| 123963 | VR512, VR512, VK32WM, VR512, i512mem, |
| 123964 | /* VPACKSSDWZrmkz */ |
| 123965 | VR512, VK32WM, VR512, i512mem, |
| 123966 | /* VPACKSSDWZrr */ |
| 123967 | VR512, VR512, VR512, |
| 123968 | /* VPACKSSDWZrrk */ |
| 123969 | VR512, VR512, VK32WM, VR512, VR512, |
| 123970 | /* VPACKSSDWZrrkz */ |
| 123971 | VR512, VK32WM, VR512, VR512, |
| 123972 | /* VPACKSSDWrm */ |
| 123973 | VR128, VR128, i128mem, |
| 123974 | /* VPACKSSDWrr */ |
| 123975 | VR128, VR128, VR128, |
| 123976 | /* VPACKSSWBYrm */ |
| 123977 | VR256, VR256, i256mem, |
| 123978 | /* VPACKSSWBYrr */ |
| 123979 | VR256, VR256, VR256, |
| 123980 | /* VPACKSSWBZ128rm */ |
| 123981 | VR128X, VR128X, i128mem, |
| 123982 | /* VPACKSSWBZ128rmk */ |
| 123983 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 123984 | /* VPACKSSWBZ128rmkz */ |
| 123985 | VR128X, VK16WM, VR128X, i128mem, |
| 123986 | /* VPACKSSWBZ128rr */ |
| 123987 | VR128X, VR128X, VR128X, |
| 123988 | /* VPACKSSWBZ128rrk */ |
| 123989 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 123990 | /* VPACKSSWBZ128rrkz */ |
| 123991 | VR128X, VK16WM, VR128X, VR128X, |
| 123992 | /* VPACKSSWBZ256rm */ |
| 123993 | VR256X, VR256X, i256mem, |
| 123994 | /* VPACKSSWBZ256rmk */ |
| 123995 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 123996 | /* VPACKSSWBZ256rmkz */ |
| 123997 | VR256X, VK32WM, VR256X, i256mem, |
| 123998 | /* VPACKSSWBZ256rr */ |
| 123999 | VR256X, VR256X, VR256X, |
| 124000 | /* VPACKSSWBZ256rrk */ |
| 124001 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 124002 | /* VPACKSSWBZ256rrkz */ |
| 124003 | VR256X, VK32WM, VR256X, VR256X, |
| 124004 | /* VPACKSSWBZrm */ |
| 124005 | VR512, VR512, i512mem, |
| 124006 | /* VPACKSSWBZrmk */ |
| 124007 | VR512, VR512, VK64WM, VR512, i512mem, |
| 124008 | /* VPACKSSWBZrmkz */ |
| 124009 | VR512, VK64WM, VR512, i512mem, |
| 124010 | /* VPACKSSWBZrr */ |
| 124011 | VR512, VR512, VR512, |
| 124012 | /* VPACKSSWBZrrk */ |
| 124013 | VR512, VR512, VK64WM, VR512, VR512, |
| 124014 | /* VPACKSSWBZrrkz */ |
| 124015 | VR512, VK64WM, VR512, VR512, |
| 124016 | /* VPACKSSWBrm */ |
| 124017 | VR128, VR128, i128mem, |
| 124018 | /* VPACKSSWBrr */ |
| 124019 | VR128, VR128, VR128, |
| 124020 | /* VPACKUSDWYrm */ |
| 124021 | VR256, VR256, i256mem, |
| 124022 | /* VPACKUSDWYrr */ |
| 124023 | VR256, VR256, VR256, |
| 124024 | /* VPACKUSDWZ128rm */ |
| 124025 | VR128X, VR128X, i128mem, |
| 124026 | /* VPACKUSDWZ128rmb */ |
| 124027 | VR128X, VR128X, i32mem, |
| 124028 | /* VPACKUSDWZ128rmbk */ |
| 124029 | VR128X, VR128X, VK8WM, VR128X, i32mem, |
| 124030 | /* VPACKUSDWZ128rmbkz */ |
| 124031 | VR128X, VK8WM, VR128X, i32mem, |
| 124032 | /* VPACKUSDWZ128rmk */ |
| 124033 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 124034 | /* VPACKUSDWZ128rmkz */ |
| 124035 | VR128X, VK8WM, VR128X, i128mem, |
| 124036 | /* VPACKUSDWZ128rr */ |
| 124037 | VR128X, VR128X, VR128X, |
| 124038 | /* VPACKUSDWZ128rrk */ |
| 124039 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124040 | /* VPACKUSDWZ128rrkz */ |
| 124041 | VR128X, VK8WM, VR128X, VR128X, |
| 124042 | /* VPACKUSDWZ256rm */ |
| 124043 | VR256X, VR256X, i256mem, |
| 124044 | /* VPACKUSDWZ256rmb */ |
| 124045 | VR256X, VR256X, i32mem, |
| 124046 | /* VPACKUSDWZ256rmbk */ |
| 124047 | VR256X, VR256X, VK16WM, VR256X, i32mem, |
| 124048 | /* VPACKUSDWZ256rmbkz */ |
| 124049 | VR256X, VK16WM, VR256X, i32mem, |
| 124050 | /* VPACKUSDWZ256rmk */ |
| 124051 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 124052 | /* VPACKUSDWZ256rmkz */ |
| 124053 | VR256X, VK16WM, VR256X, i256mem, |
| 124054 | /* VPACKUSDWZ256rr */ |
| 124055 | VR256X, VR256X, VR256X, |
| 124056 | /* VPACKUSDWZ256rrk */ |
| 124057 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124058 | /* VPACKUSDWZ256rrkz */ |
| 124059 | VR256X, VK16WM, VR256X, VR256X, |
| 124060 | /* VPACKUSDWZrm */ |
| 124061 | VR512, VR512, i512mem, |
| 124062 | /* VPACKUSDWZrmb */ |
| 124063 | VR512, VR512, i32mem, |
| 124064 | /* VPACKUSDWZrmbk */ |
| 124065 | VR512, VR512, VK32WM, VR512, i32mem, |
| 124066 | /* VPACKUSDWZrmbkz */ |
| 124067 | VR512, VK32WM, VR512, i32mem, |
| 124068 | /* VPACKUSDWZrmk */ |
| 124069 | VR512, VR512, VK32WM, VR512, i512mem, |
| 124070 | /* VPACKUSDWZrmkz */ |
| 124071 | VR512, VK32WM, VR512, i512mem, |
| 124072 | /* VPACKUSDWZrr */ |
| 124073 | VR512, VR512, VR512, |
| 124074 | /* VPACKUSDWZrrk */ |
| 124075 | VR512, VR512, VK32WM, VR512, VR512, |
| 124076 | /* VPACKUSDWZrrkz */ |
| 124077 | VR512, VK32WM, VR512, VR512, |
| 124078 | /* VPACKUSDWrm */ |
| 124079 | VR128, VR128, i128mem, |
| 124080 | /* VPACKUSDWrr */ |
| 124081 | VR128, VR128, VR128, |
| 124082 | /* VPACKUSWBYrm */ |
| 124083 | VR256, VR256, i256mem, |
| 124084 | /* VPACKUSWBYrr */ |
| 124085 | VR256, VR256, VR256, |
| 124086 | /* VPACKUSWBZ128rm */ |
| 124087 | VR128X, VR128X, i128mem, |
| 124088 | /* VPACKUSWBZ128rmk */ |
| 124089 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 124090 | /* VPACKUSWBZ128rmkz */ |
| 124091 | VR128X, VK16WM, VR128X, i128mem, |
| 124092 | /* VPACKUSWBZ128rr */ |
| 124093 | VR128X, VR128X, VR128X, |
| 124094 | /* VPACKUSWBZ128rrk */ |
| 124095 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 124096 | /* VPACKUSWBZ128rrkz */ |
| 124097 | VR128X, VK16WM, VR128X, VR128X, |
| 124098 | /* VPACKUSWBZ256rm */ |
| 124099 | VR256X, VR256X, i256mem, |
| 124100 | /* VPACKUSWBZ256rmk */ |
| 124101 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 124102 | /* VPACKUSWBZ256rmkz */ |
| 124103 | VR256X, VK32WM, VR256X, i256mem, |
| 124104 | /* VPACKUSWBZ256rr */ |
| 124105 | VR256X, VR256X, VR256X, |
| 124106 | /* VPACKUSWBZ256rrk */ |
| 124107 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 124108 | /* VPACKUSWBZ256rrkz */ |
| 124109 | VR256X, VK32WM, VR256X, VR256X, |
| 124110 | /* VPACKUSWBZrm */ |
| 124111 | VR512, VR512, i512mem, |
| 124112 | /* VPACKUSWBZrmk */ |
| 124113 | VR512, VR512, VK64WM, VR512, i512mem, |
| 124114 | /* VPACKUSWBZrmkz */ |
| 124115 | VR512, VK64WM, VR512, i512mem, |
| 124116 | /* VPACKUSWBZrr */ |
| 124117 | VR512, VR512, VR512, |
| 124118 | /* VPACKUSWBZrrk */ |
| 124119 | VR512, VR512, VK64WM, VR512, VR512, |
| 124120 | /* VPACKUSWBZrrkz */ |
| 124121 | VR512, VK64WM, VR512, VR512, |
| 124122 | /* VPACKUSWBrm */ |
| 124123 | VR128, VR128, i128mem, |
| 124124 | /* VPACKUSWBrr */ |
| 124125 | VR128, VR128, VR128, |
| 124126 | /* VPADDBYrm */ |
| 124127 | VR256, VR256, i256mem, |
| 124128 | /* VPADDBYrr */ |
| 124129 | VR256, VR256, VR256, |
| 124130 | /* VPADDBZ128rm */ |
| 124131 | VR128X, VR128X, i128mem, |
| 124132 | /* VPADDBZ128rmk */ |
| 124133 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 124134 | /* VPADDBZ128rmkz */ |
| 124135 | VR128X, VK16WM, VR128X, i128mem, |
| 124136 | /* VPADDBZ128rr */ |
| 124137 | VR128X, VR128X, VR128X, |
| 124138 | /* VPADDBZ128rrk */ |
| 124139 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 124140 | /* VPADDBZ128rrkz */ |
| 124141 | VR128X, VK16WM, VR128X, VR128X, |
| 124142 | /* VPADDBZ256rm */ |
| 124143 | VR256X, VR256X, i256mem, |
| 124144 | /* VPADDBZ256rmk */ |
| 124145 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 124146 | /* VPADDBZ256rmkz */ |
| 124147 | VR256X, VK32WM, VR256X, i256mem, |
| 124148 | /* VPADDBZ256rr */ |
| 124149 | VR256X, VR256X, VR256X, |
| 124150 | /* VPADDBZ256rrk */ |
| 124151 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 124152 | /* VPADDBZ256rrkz */ |
| 124153 | VR256X, VK32WM, VR256X, VR256X, |
| 124154 | /* VPADDBZrm */ |
| 124155 | VR512, VR512, i512mem, |
| 124156 | /* VPADDBZrmk */ |
| 124157 | VR512, VR512, VK64WM, VR512, i512mem, |
| 124158 | /* VPADDBZrmkz */ |
| 124159 | VR512, VK64WM, VR512, i512mem, |
| 124160 | /* VPADDBZrr */ |
| 124161 | VR512, VR512, VR512, |
| 124162 | /* VPADDBZrrk */ |
| 124163 | VR512, VR512, VK64WM, VR512, VR512, |
| 124164 | /* VPADDBZrrkz */ |
| 124165 | VR512, VK64WM, VR512, VR512, |
| 124166 | /* VPADDBrm */ |
| 124167 | VR128, VR128, i128mem, |
| 124168 | /* VPADDBrr */ |
| 124169 | VR128, VR128, VR128, |
| 124170 | /* VPADDDYrm */ |
| 124171 | VR256, VR256, i256mem, |
| 124172 | /* VPADDDYrr */ |
| 124173 | VR256, VR256, VR256, |
| 124174 | /* VPADDDZ128rm */ |
| 124175 | VR128X, VR128X, i128mem, |
| 124176 | /* VPADDDZ128rmb */ |
| 124177 | VR128X, VR128X, i32mem, |
| 124178 | /* VPADDDZ128rmbk */ |
| 124179 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 124180 | /* VPADDDZ128rmbkz */ |
| 124181 | VR128X, VK4WM, VR128X, i32mem, |
| 124182 | /* VPADDDZ128rmk */ |
| 124183 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 124184 | /* VPADDDZ128rmkz */ |
| 124185 | VR128X, VK4WM, VR128X, i128mem, |
| 124186 | /* VPADDDZ128rr */ |
| 124187 | VR128X, VR128X, VR128X, |
| 124188 | /* VPADDDZ128rrk */ |
| 124189 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 124190 | /* VPADDDZ128rrkz */ |
| 124191 | VR128X, VK4WM, VR128X, VR128X, |
| 124192 | /* VPADDDZ256rm */ |
| 124193 | VR256X, VR256X, i256mem, |
| 124194 | /* VPADDDZ256rmb */ |
| 124195 | VR256X, VR256X, i32mem, |
| 124196 | /* VPADDDZ256rmbk */ |
| 124197 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 124198 | /* VPADDDZ256rmbkz */ |
| 124199 | VR256X, VK8WM, VR256X, i32mem, |
| 124200 | /* VPADDDZ256rmk */ |
| 124201 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 124202 | /* VPADDDZ256rmkz */ |
| 124203 | VR256X, VK8WM, VR256X, i256mem, |
| 124204 | /* VPADDDZ256rr */ |
| 124205 | VR256X, VR256X, VR256X, |
| 124206 | /* VPADDDZ256rrk */ |
| 124207 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 124208 | /* VPADDDZ256rrkz */ |
| 124209 | VR256X, VK8WM, VR256X, VR256X, |
| 124210 | /* VPADDDZrm */ |
| 124211 | VR512, VR512, i512mem, |
| 124212 | /* VPADDDZrmb */ |
| 124213 | VR512, VR512, i32mem, |
| 124214 | /* VPADDDZrmbk */ |
| 124215 | VR512, VR512, VK16WM, VR512, i32mem, |
| 124216 | /* VPADDDZrmbkz */ |
| 124217 | VR512, VK16WM, VR512, i32mem, |
| 124218 | /* VPADDDZrmk */ |
| 124219 | VR512, VR512, VK16WM, VR512, i512mem, |
| 124220 | /* VPADDDZrmkz */ |
| 124221 | VR512, VK16WM, VR512, i512mem, |
| 124222 | /* VPADDDZrr */ |
| 124223 | VR512, VR512, VR512, |
| 124224 | /* VPADDDZrrk */ |
| 124225 | VR512, VR512, VK16WM, VR512, VR512, |
| 124226 | /* VPADDDZrrkz */ |
| 124227 | VR512, VK16WM, VR512, VR512, |
| 124228 | /* VPADDDrm */ |
| 124229 | VR128, VR128, i128mem, |
| 124230 | /* VPADDDrr */ |
| 124231 | VR128, VR128, VR128, |
| 124232 | /* VPADDQYrm */ |
| 124233 | VR256, VR256, i256mem, |
| 124234 | /* VPADDQYrr */ |
| 124235 | VR256, VR256, VR256, |
| 124236 | /* VPADDQZ128rm */ |
| 124237 | VR128X, VR128X, i128mem, |
| 124238 | /* VPADDQZ128rmb */ |
| 124239 | VR128X, VR128X, i64mem, |
| 124240 | /* VPADDQZ128rmbk */ |
| 124241 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 124242 | /* VPADDQZ128rmbkz */ |
| 124243 | VR128X, VK2WM, VR128X, i64mem, |
| 124244 | /* VPADDQZ128rmk */ |
| 124245 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 124246 | /* VPADDQZ128rmkz */ |
| 124247 | VR128X, VK2WM, VR128X, i128mem, |
| 124248 | /* VPADDQZ128rr */ |
| 124249 | VR128X, VR128X, VR128X, |
| 124250 | /* VPADDQZ128rrk */ |
| 124251 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124252 | /* VPADDQZ128rrkz */ |
| 124253 | VR128X, VK2WM, VR128X, VR128X, |
| 124254 | /* VPADDQZ256rm */ |
| 124255 | VR256X, VR256X, i256mem, |
| 124256 | /* VPADDQZ256rmb */ |
| 124257 | VR256X, VR256X, i64mem, |
| 124258 | /* VPADDQZ256rmbk */ |
| 124259 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 124260 | /* VPADDQZ256rmbkz */ |
| 124261 | VR256X, VK4WM, VR256X, i64mem, |
| 124262 | /* VPADDQZ256rmk */ |
| 124263 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 124264 | /* VPADDQZ256rmkz */ |
| 124265 | VR256X, VK4WM, VR256X, i256mem, |
| 124266 | /* VPADDQZ256rr */ |
| 124267 | VR256X, VR256X, VR256X, |
| 124268 | /* VPADDQZ256rrk */ |
| 124269 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124270 | /* VPADDQZ256rrkz */ |
| 124271 | VR256X, VK4WM, VR256X, VR256X, |
| 124272 | /* VPADDQZrm */ |
| 124273 | VR512, VR512, i512mem, |
| 124274 | /* VPADDQZrmb */ |
| 124275 | VR512, VR512, i64mem, |
| 124276 | /* VPADDQZrmbk */ |
| 124277 | VR512, VR512, VK8WM, VR512, i64mem, |
| 124278 | /* VPADDQZrmbkz */ |
| 124279 | VR512, VK8WM, VR512, i64mem, |
| 124280 | /* VPADDQZrmk */ |
| 124281 | VR512, VR512, VK8WM, VR512, i512mem, |
| 124282 | /* VPADDQZrmkz */ |
| 124283 | VR512, VK8WM, VR512, i512mem, |
| 124284 | /* VPADDQZrr */ |
| 124285 | VR512, VR512, VR512, |
| 124286 | /* VPADDQZrrk */ |
| 124287 | VR512, VR512, VK8WM, VR512, VR512, |
| 124288 | /* VPADDQZrrkz */ |
| 124289 | VR512, VK8WM, VR512, VR512, |
| 124290 | /* VPADDQrm */ |
| 124291 | VR128, VR128, i128mem, |
| 124292 | /* VPADDQrr */ |
| 124293 | VR128, VR128, VR128, |
| 124294 | /* VPADDSBYrm */ |
| 124295 | VR256, VR256, i256mem, |
| 124296 | /* VPADDSBYrr */ |
| 124297 | VR256, VR256, VR256, |
| 124298 | /* VPADDSBZ128rm */ |
| 124299 | VR128X, VR128X, i128mem, |
| 124300 | /* VPADDSBZ128rmk */ |
| 124301 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 124302 | /* VPADDSBZ128rmkz */ |
| 124303 | VR128X, VK16WM, VR128X, i128mem, |
| 124304 | /* VPADDSBZ128rr */ |
| 124305 | VR128X, VR128X, VR128X, |
| 124306 | /* VPADDSBZ128rrk */ |
| 124307 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 124308 | /* VPADDSBZ128rrkz */ |
| 124309 | VR128X, VK16WM, VR128X, VR128X, |
| 124310 | /* VPADDSBZ256rm */ |
| 124311 | VR256X, VR256X, i256mem, |
| 124312 | /* VPADDSBZ256rmk */ |
| 124313 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 124314 | /* VPADDSBZ256rmkz */ |
| 124315 | VR256X, VK32WM, VR256X, i256mem, |
| 124316 | /* VPADDSBZ256rr */ |
| 124317 | VR256X, VR256X, VR256X, |
| 124318 | /* VPADDSBZ256rrk */ |
| 124319 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 124320 | /* VPADDSBZ256rrkz */ |
| 124321 | VR256X, VK32WM, VR256X, VR256X, |
| 124322 | /* VPADDSBZrm */ |
| 124323 | VR512, VR512, i512mem, |
| 124324 | /* VPADDSBZrmk */ |
| 124325 | VR512, VR512, VK64WM, VR512, i512mem, |
| 124326 | /* VPADDSBZrmkz */ |
| 124327 | VR512, VK64WM, VR512, i512mem, |
| 124328 | /* VPADDSBZrr */ |
| 124329 | VR512, VR512, VR512, |
| 124330 | /* VPADDSBZrrk */ |
| 124331 | VR512, VR512, VK64WM, VR512, VR512, |
| 124332 | /* VPADDSBZrrkz */ |
| 124333 | VR512, VK64WM, VR512, VR512, |
| 124334 | /* VPADDSBrm */ |
| 124335 | VR128, VR128, i128mem, |
| 124336 | /* VPADDSBrr */ |
| 124337 | VR128, VR128, VR128, |
| 124338 | /* VPADDSWYrm */ |
| 124339 | VR256, VR256, i256mem, |
| 124340 | /* VPADDSWYrr */ |
| 124341 | VR256, VR256, VR256, |
| 124342 | /* VPADDSWZ128rm */ |
| 124343 | VR128X, VR128X, i128mem, |
| 124344 | /* VPADDSWZ128rmk */ |
| 124345 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 124346 | /* VPADDSWZ128rmkz */ |
| 124347 | VR128X, VK8WM, VR128X, i128mem, |
| 124348 | /* VPADDSWZ128rr */ |
| 124349 | VR128X, VR128X, VR128X, |
| 124350 | /* VPADDSWZ128rrk */ |
| 124351 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124352 | /* VPADDSWZ128rrkz */ |
| 124353 | VR128X, VK8WM, VR128X, VR128X, |
| 124354 | /* VPADDSWZ256rm */ |
| 124355 | VR256X, VR256X, i256mem, |
| 124356 | /* VPADDSWZ256rmk */ |
| 124357 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 124358 | /* VPADDSWZ256rmkz */ |
| 124359 | VR256X, VK16WM, VR256X, i256mem, |
| 124360 | /* VPADDSWZ256rr */ |
| 124361 | VR256X, VR256X, VR256X, |
| 124362 | /* VPADDSWZ256rrk */ |
| 124363 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124364 | /* VPADDSWZ256rrkz */ |
| 124365 | VR256X, VK16WM, VR256X, VR256X, |
| 124366 | /* VPADDSWZrm */ |
| 124367 | VR512, VR512, i512mem, |
| 124368 | /* VPADDSWZrmk */ |
| 124369 | VR512, VR512, VK32WM, VR512, i512mem, |
| 124370 | /* VPADDSWZrmkz */ |
| 124371 | VR512, VK32WM, VR512, i512mem, |
| 124372 | /* VPADDSWZrr */ |
| 124373 | VR512, VR512, VR512, |
| 124374 | /* VPADDSWZrrk */ |
| 124375 | VR512, VR512, VK32WM, VR512, VR512, |
| 124376 | /* VPADDSWZrrkz */ |
| 124377 | VR512, VK32WM, VR512, VR512, |
| 124378 | /* VPADDSWrm */ |
| 124379 | VR128, VR128, i128mem, |
| 124380 | /* VPADDSWrr */ |
| 124381 | VR128, VR128, VR128, |
| 124382 | /* VPADDUSBYrm */ |
| 124383 | VR256, VR256, i256mem, |
| 124384 | /* VPADDUSBYrr */ |
| 124385 | VR256, VR256, VR256, |
| 124386 | /* VPADDUSBZ128rm */ |
| 124387 | VR128X, VR128X, i128mem, |
| 124388 | /* VPADDUSBZ128rmk */ |
| 124389 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 124390 | /* VPADDUSBZ128rmkz */ |
| 124391 | VR128X, VK16WM, VR128X, i128mem, |
| 124392 | /* VPADDUSBZ128rr */ |
| 124393 | VR128X, VR128X, VR128X, |
| 124394 | /* VPADDUSBZ128rrk */ |
| 124395 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 124396 | /* VPADDUSBZ128rrkz */ |
| 124397 | VR128X, VK16WM, VR128X, VR128X, |
| 124398 | /* VPADDUSBZ256rm */ |
| 124399 | VR256X, VR256X, i256mem, |
| 124400 | /* VPADDUSBZ256rmk */ |
| 124401 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 124402 | /* VPADDUSBZ256rmkz */ |
| 124403 | VR256X, VK32WM, VR256X, i256mem, |
| 124404 | /* VPADDUSBZ256rr */ |
| 124405 | VR256X, VR256X, VR256X, |
| 124406 | /* VPADDUSBZ256rrk */ |
| 124407 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 124408 | /* VPADDUSBZ256rrkz */ |
| 124409 | VR256X, VK32WM, VR256X, VR256X, |
| 124410 | /* VPADDUSBZrm */ |
| 124411 | VR512, VR512, i512mem, |
| 124412 | /* VPADDUSBZrmk */ |
| 124413 | VR512, VR512, VK64WM, VR512, i512mem, |
| 124414 | /* VPADDUSBZrmkz */ |
| 124415 | VR512, VK64WM, VR512, i512mem, |
| 124416 | /* VPADDUSBZrr */ |
| 124417 | VR512, VR512, VR512, |
| 124418 | /* VPADDUSBZrrk */ |
| 124419 | VR512, VR512, VK64WM, VR512, VR512, |
| 124420 | /* VPADDUSBZrrkz */ |
| 124421 | VR512, VK64WM, VR512, VR512, |
| 124422 | /* VPADDUSBrm */ |
| 124423 | VR128, VR128, i128mem, |
| 124424 | /* VPADDUSBrr */ |
| 124425 | VR128, VR128, VR128, |
| 124426 | /* VPADDUSWYrm */ |
| 124427 | VR256, VR256, i256mem, |
| 124428 | /* VPADDUSWYrr */ |
| 124429 | VR256, VR256, VR256, |
| 124430 | /* VPADDUSWZ128rm */ |
| 124431 | VR128X, VR128X, i128mem, |
| 124432 | /* VPADDUSWZ128rmk */ |
| 124433 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 124434 | /* VPADDUSWZ128rmkz */ |
| 124435 | VR128X, VK8WM, VR128X, i128mem, |
| 124436 | /* VPADDUSWZ128rr */ |
| 124437 | VR128X, VR128X, VR128X, |
| 124438 | /* VPADDUSWZ128rrk */ |
| 124439 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124440 | /* VPADDUSWZ128rrkz */ |
| 124441 | VR128X, VK8WM, VR128X, VR128X, |
| 124442 | /* VPADDUSWZ256rm */ |
| 124443 | VR256X, VR256X, i256mem, |
| 124444 | /* VPADDUSWZ256rmk */ |
| 124445 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 124446 | /* VPADDUSWZ256rmkz */ |
| 124447 | VR256X, VK16WM, VR256X, i256mem, |
| 124448 | /* VPADDUSWZ256rr */ |
| 124449 | VR256X, VR256X, VR256X, |
| 124450 | /* VPADDUSWZ256rrk */ |
| 124451 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124452 | /* VPADDUSWZ256rrkz */ |
| 124453 | VR256X, VK16WM, VR256X, VR256X, |
| 124454 | /* VPADDUSWZrm */ |
| 124455 | VR512, VR512, i512mem, |
| 124456 | /* VPADDUSWZrmk */ |
| 124457 | VR512, VR512, VK32WM, VR512, i512mem, |
| 124458 | /* VPADDUSWZrmkz */ |
| 124459 | VR512, VK32WM, VR512, i512mem, |
| 124460 | /* VPADDUSWZrr */ |
| 124461 | VR512, VR512, VR512, |
| 124462 | /* VPADDUSWZrrk */ |
| 124463 | VR512, VR512, VK32WM, VR512, VR512, |
| 124464 | /* VPADDUSWZrrkz */ |
| 124465 | VR512, VK32WM, VR512, VR512, |
| 124466 | /* VPADDUSWrm */ |
| 124467 | VR128, VR128, i128mem, |
| 124468 | /* VPADDUSWrr */ |
| 124469 | VR128, VR128, VR128, |
| 124470 | /* VPADDWYrm */ |
| 124471 | VR256, VR256, i256mem, |
| 124472 | /* VPADDWYrr */ |
| 124473 | VR256, VR256, VR256, |
| 124474 | /* VPADDWZ128rm */ |
| 124475 | VR128X, VR128X, i128mem, |
| 124476 | /* VPADDWZ128rmk */ |
| 124477 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 124478 | /* VPADDWZ128rmkz */ |
| 124479 | VR128X, VK8WM, VR128X, i128mem, |
| 124480 | /* VPADDWZ128rr */ |
| 124481 | VR128X, VR128X, VR128X, |
| 124482 | /* VPADDWZ128rrk */ |
| 124483 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124484 | /* VPADDWZ128rrkz */ |
| 124485 | VR128X, VK8WM, VR128X, VR128X, |
| 124486 | /* VPADDWZ256rm */ |
| 124487 | VR256X, VR256X, i256mem, |
| 124488 | /* VPADDWZ256rmk */ |
| 124489 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 124490 | /* VPADDWZ256rmkz */ |
| 124491 | VR256X, VK16WM, VR256X, i256mem, |
| 124492 | /* VPADDWZ256rr */ |
| 124493 | VR256X, VR256X, VR256X, |
| 124494 | /* VPADDWZ256rrk */ |
| 124495 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124496 | /* VPADDWZ256rrkz */ |
| 124497 | VR256X, VK16WM, VR256X, VR256X, |
| 124498 | /* VPADDWZrm */ |
| 124499 | VR512, VR512, i512mem, |
| 124500 | /* VPADDWZrmk */ |
| 124501 | VR512, VR512, VK32WM, VR512, i512mem, |
| 124502 | /* VPADDWZrmkz */ |
| 124503 | VR512, VK32WM, VR512, i512mem, |
| 124504 | /* VPADDWZrr */ |
| 124505 | VR512, VR512, VR512, |
| 124506 | /* VPADDWZrrk */ |
| 124507 | VR512, VR512, VK32WM, VR512, VR512, |
| 124508 | /* VPADDWZrrkz */ |
| 124509 | VR512, VK32WM, VR512, VR512, |
| 124510 | /* VPADDWrm */ |
| 124511 | VR128, VR128, i128mem, |
| 124512 | /* VPADDWrr */ |
| 124513 | VR128, VR128, VR128, |
| 124514 | /* VPALIGNRYrmi */ |
| 124515 | VR256, VR256, i256mem, u8imm, |
| 124516 | /* VPALIGNRYrri */ |
| 124517 | VR256, VR256, VR256, u8imm, |
| 124518 | /* VPALIGNRZ128rmi */ |
| 124519 | VR128X, VR128X, i128mem, u8imm, |
| 124520 | /* VPALIGNRZ128rmik */ |
| 124521 | VR128X, VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 124522 | /* VPALIGNRZ128rmikz */ |
| 124523 | VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 124524 | /* VPALIGNRZ128rri */ |
| 124525 | VR128X, VR128X, VR128X, u8imm, |
| 124526 | /* VPALIGNRZ128rrik */ |
| 124527 | VR128X, VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 124528 | /* VPALIGNRZ128rrikz */ |
| 124529 | VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 124530 | /* VPALIGNRZ256rmi */ |
| 124531 | VR256X, VR256X, i256mem, u8imm, |
| 124532 | /* VPALIGNRZ256rmik */ |
| 124533 | VR256X, VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 124534 | /* VPALIGNRZ256rmikz */ |
| 124535 | VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 124536 | /* VPALIGNRZ256rri */ |
| 124537 | VR256X, VR256X, VR256X, u8imm, |
| 124538 | /* VPALIGNRZ256rrik */ |
| 124539 | VR256X, VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 124540 | /* VPALIGNRZ256rrikz */ |
| 124541 | VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 124542 | /* VPALIGNRZrmi */ |
| 124543 | VR512, VR512, i512mem, u8imm, |
| 124544 | /* VPALIGNRZrmik */ |
| 124545 | VR512, VR512, VK64WM, VR512, i512mem, u8imm, |
| 124546 | /* VPALIGNRZrmikz */ |
| 124547 | VR512, VK64WM, VR512, i512mem, u8imm, |
| 124548 | /* VPALIGNRZrri */ |
| 124549 | VR512, VR512, VR512, u8imm, |
| 124550 | /* VPALIGNRZrrik */ |
| 124551 | VR512, VR512, VK64WM, VR512, VR512, u8imm, |
| 124552 | /* VPALIGNRZrrikz */ |
| 124553 | VR512, VK64WM, VR512, VR512, u8imm, |
| 124554 | /* VPALIGNRrmi */ |
| 124555 | VR128, VR128, i128mem, u8imm, |
| 124556 | /* VPALIGNRrri */ |
| 124557 | VR128, VR128, VR128, u8imm, |
| 124558 | /* VPANDDZ128rm */ |
| 124559 | VR128X, VR128X, i128mem, |
| 124560 | /* VPANDDZ128rmb */ |
| 124561 | VR128X, VR128X, i32mem, |
| 124562 | /* VPANDDZ128rmbk */ |
| 124563 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 124564 | /* VPANDDZ128rmbkz */ |
| 124565 | VR128X, VK4WM, VR128X, i32mem, |
| 124566 | /* VPANDDZ128rmk */ |
| 124567 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 124568 | /* VPANDDZ128rmkz */ |
| 124569 | VR128X, VK4WM, VR128X, i128mem, |
| 124570 | /* VPANDDZ128rr */ |
| 124571 | VR128X, VR128X, VR128X, |
| 124572 | /* VPANDDZ128rrk */ |
| 124573 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 124574 | /* VPANDDZ128rrkz */ |
| 124575 | VR128X, VK4WM, VR128X, VR128X, |
| 124576 | /* VPANDDZ256rm */ |
| 124577 | VR256X, VR256X, i256mem, |
| 124578 | /* VPANDDZ256rmb */ |
| 124579 | VR256X, VR256X, i32mem, |
| 124580 | /* VPANDDZ256rmbk */ |
| 124581 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 124582 | /* VPANDDZ256rmbkz */ |
| 124583 | VR256X, VK8WM, VR256X, i32mem, |
| 124584 | /* VPANDDZ256rmk */ |
| 124585 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 124586 | /* VPANDDZ256rmkz */ |
| 124587 | VR256X, VK8WM, VR256X, i256mem, |
| 124588 | /* VPANDDZ256rr */ |
| 124589 | VR256X, VR256X, VR256X, |
| 124590 | /* VPANDDZ256rrk */ |
| 124591 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 124592 | /* VPANDDZ256rrkz */ |
| 124593 | VR256X, VK8WM, VR256X, VR256X, |
| 124594 | /* VPANDDZrm */ |
| 124595 | VR512, VR512, i512mem, |
| 124596 | /* VPANDDZrmb */ |
| 124597 | VR512, VR512, i32mem, |
| 124598 | /* VPANDDZrmbk */ |
| 124599 | VR512, VR512, VK16WM, VR512, i32mem, |
| 124600 | /* VPANDDZrmbkz */ |
| 124601 | VR512, VK16WM, VR512, i32mem, |
| 124602 | /* VPANDDZrmk */ |
| 124603 | VR512, VR512, VK16WM, VR512, i512mem, |
| 124604 | /* VPANDDZrmkz */ |
| 124605 | VR512, VK16WM, VR512, i512mem, |
| 124606 | /* VPANDDZrr */ |
| 124607 | VR512, VR512, VR512, |
| 124608 | /* VPANDDZrrk */ |
| 124609 | VR512, VR512, VK16WM, VR512, VR512, |
| 124610 | /* VPANDDZrrkz */ |
| 124611 | VR512, VK16WM, VR512, VR512, |
| 124612 | /* VPANDNDZ128rm */ |
| 124613 | VR128X, VR128X, i128mem, |
| 124614 | /* VPANDNDZ128rmb */ |
| 124615 | VR128X, VR128X, i32mem, |
| 124616 | /* VPANDNDZ128rmbk */ |
| 124617 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 124618 | /* VPANDNDZ128rmbkz */ |
| 124619 | VR128X, VK4WM, VR128X, i32mem, |
| 124620 | /* VPANDNDZ128rmk */ |
| 124621 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 124622 | /* VPANDNDZ128rmkz */ |
| 124623 | VR128X, VK4WM, VR128X, i128mem, |
| 124624 | /* VPANDNDZ128rr */ |
| 124625 | VR128X, VR128X, VR128X, |
| 124626 | /* VPANDNDZ128rrk */ |
| 124627 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 124628 | /* VPANDNDZ128rrkz */ |
| 124629 | VR128X, VK4WM, VR128X, VR128X, |
| 124630 | /* VPANDNDZ256rm */ |
| 124631 | VR256X, VR256X, i256mem, |
| 124632 | /* VPANDNDZ256rmb */ |
| 124633 | VR256X, VR256X, i32mem, |
| 124634 | /* VPANDNDZ256rmbk */ |
| 124635 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 124636 | /* VPANDNDZ256rmbkz */ |
| 124637 | VR256X, VK8WM, VR256X, i32mem, |
| 124638 | /* VPANDNDZ256rmk */ |
| 124639 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 124640 | /* VPANDNDZ256rmkz */ |
| 124641 | VR256X, VK8WM, VR256X, i256mem, |
| 124642 | /* VPANDNDZ256rr */ |
| 124643 | VR256X, VR256X, VR256X, |
| 124644 | /* VPANDNDZ256rrk */ |
| 124645 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 124646 | /* VPANDNDZ256rrkz */ |
| 124647 | VR256X, VK8WM, VR256X, VR256X, |
| 124648 | /* VPANDNDZrm */ |
| 124649 | VR512, VR512, i512mem, |
| 124650 | /* VPANDNDZrmb */ |
| 124651 | VR512, VR512, i32mem, |
| 124652 | /* VPANDNDZrmbk */ |
| 124653 | VR512, VR512, VK16WM, VR512, i32mem, |
| 124654 | /* VPANDNDZrmbkz */ |
| 124655 | VR512, VK16WM, VR512, i32mem, |
| 124656 | /* VPANDNDZrmk */ |
| 124657 | VR512, VR512, VK16WM, VR512, i512mem, |
| 124658 | /* VPANDNDZrmkz */ |
| 124659 | VR512, VK16WM, VR512, i512mem, |
| 124660 | /* VPANDNDZrr */ |
| 124661 | VR512, VR512, VR512, |
| 124662 | /* VPANDNDZrrk */ |
| 124663 | VR512, VR512, VK16WM, VR512, VR512, |
| 124664 | /* VPANDNDZrrkz */ |
| 124665 | VR512, VK16WM, VR512, VR512, |
| 124666 | /* VPANDNQZ128rm */ |
| 124667 | VR128X, VR128X, i128mem, |
| 124668 | /* VPANDNQZ128rmb */ |
| 124669 | VR128X, VR128X, i64mem, |
| 124670 | /* VPANDNQZ128rmbk */ |
| 124671 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 124672 | /* VPANDNQZ128rmbkz */ |
| 124673 | VR128X, VK2WM, VR128X, i64mem, |
| 124674 | /* VPANDNQZ128rmk */ |
| 124675 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 124676 | /* VPANDNQZ128rmkz */ |
| 124677 | VR128X, VK2WM, VR128X, i128mem, |
| 124678 | /* VPANDNQZ128rr */ |
| 124679 | VR128X, VR128X, VR128X, |
| 124680 | /* VPANDNQZ128rrk */ |
| 124681 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124682 | /* VPANDNQZ128rrkz */ |
| 124683 | VR128X, VK2WM, VR128X, VR128X, |
| 124684 | /* VPANDNQZ256rm */ |
| 124685 | VR256X, VR256X, i256mem, |
| 124686 | /* VPANDNQZ256rmb */ |
| 124687 | VR256X, VR256X, i64mem, |
| 124688 | /* VPANDNQZ256rmbk */ |
| 124689 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 124690 | /* VPANDNQZ256rmbkz */ |
| 124691 | VR256X, VK4WM, VR256X, i64mem, |
| 124692 | /* VPANDNQZ256rmk */ |
| 124693 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 124694 | /* VPANDNQZ256rmkz */ |
| 124695 | VR256X, VK4WM, VR256X, i256mem, |
| 124696 | /* VPANDNQZ256rr */ |
| 124697 | VR256X, VR256X, VR256X, |
| 124698 | /* VPANDNQZ256rrk */ |
| 124699 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124700 | /* VPANDNQZ256rrkz */ |
| 124701 | VR256X, VK4WM, VR256X, VR256X, |
| 124702 | /* VPANDNQZrm */ |
| 124703 | VR512, VR512, i512mem, |
| 124704 | /* VPANDNQZrmb */ |
| 124705 | VR512, VR512, i64mem, |
| 124706 | /* VPANDNQZrmbk */ |
| 124707 | VR512, VR512, VK8WM, VR512, i64mem, |
| 124708 | /* VPANDNQZrmbkz */ |
| 124709 | VR512, VK8WM, VR512, i64mem, |
| 124710 | /* VPANDNQZrmk */ |
| 124711 | VR512, VR512, VK8WM, VR512, i512mem, |
| 124712 | /* VPANDNQZrmkz */ |
| 124713 | VR512, VK8WM, VR512, i512mem, |
| 124714 | /* VPANDNQZrr */ |
| 124715 | VR512, VR512, VR512, |
| 124716 | /* VPANDNQZrrk */ |
| 124717 | VR512, VR512, VK8WM, VR512, VR512, |
| 124718 | /* VPANDNQZrrkz */ |
| 124719 | VR512, VK8WM, VR512, VR512, |
| 124720 | /* VPANDNYrm */ |
| 124721 | VR256, VR256, i256mem, |
| 124722 | /* VPANDNYrr */ |
| 124723 | VR256, VR256, VR256, |
| 124724 | /* VPANDNrm */ |
| 124725 | VR128, VR128, i128mem, |
| 124726 | /* VPANDNrr */ |
| 124727 | VR128, VR128, VR128, |
| 124728 | /* VPANDQZ128rm */ |
| 124729 | VR128X, VR128X, i128mem, |
| 124730 | /* VPANDQZ128rmb */ |
| 124731 | VR128X, VR128X, i64mem, |
| 124732 | /* VPANDQZ128rmbk */ |
| 124733 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 124734 | /* VPANDQZ128rmbkz */ |
| 124735 | VR128X, VK2WM, VR128X, i64mem, |
| 124736 | /* VPANDQZ128rmk */ |
| 124737 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 124738 | /* VPANDQZ128rmkz */ |
| 124739 | VR128X, VK2WM, VR128X, i128mem, |
| 124740 | /* VPANDQZ128rr */ |
| 124741 | VR128X, VR128X, VR128X, |
| 124742 | /* VPANDQZ128rrk */ |
| 124743 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124744 | /* VPANDQZ128rrkz */ |
| 124745 | VR128X, VK2WM, VR128X, VR128X, |
| 124746 | /* VPANDQZ256rm */ |
| 124747 | VR256X, VR256X, i256mem, |
| 124748 | /* VPANDQZ256rmb */ |
| 124749 | VR256X, VR256X, i64mem, |
| 124750 | /* VPANDQZ256rmbk */ |
| 124751 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 124752 | /* VPANDQZ256rmbkz */ |
| 124753 | VR256X, VK4WM, VR256X, i64mem, |
| 124754 | /* VPANDQZ256rmk */ |
| 124755 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 124756 | /* VPANDQZ256rmkz */ |
| 124757 | VR256X, VK4WM, VR256X, i256mem, |
| 124758 | /* VPANDQZ256rr */ |
| 124759 | VR256X, VR256X, VR256X, |
| 124760 | /* VPANDQZ256rrk */ |
| 124761 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124762 | /* VPANDQZ256rrkz */ |
| 124763 | VR256X, VK4WM, VR256X, VR256X, |
| 124764 | /* VPANDQZrm */ |
| 124765 | VR512, VR512, i512mem, |
| 124766 | /* VPANDQZrmb */ |
| 124767 | VR512, VR512, i64mem, |
| 124768 | /* VPANDQZrmbk */ |
| 124769 | VR512, VR512, VK8WM, VR512, i64mem, |
| 124770 | /* VPANDQZrmbkz */ |
| 124771 | VR512, VK8WM, VR512, i64mem, |
| 124772 | /* VPANDQZrmk */ |
| 124773 | VR512, VR512, VK8WM, VR512, i512mem, |
| 124774 | /* VPANDQZrmkz */ |
| 124775 | VR512, VK8WM, VR512, i512mem, |
| 124776 | /* VPANDQZrr */ |
| 124777 | VR512, VR512, VR512, |
| 124778 | /* VPANDQZrrk */ |
| 124779 | VR512, VR512, VK8WM, VR512, VR512, |
| 124780 | /* VPANDQZrrkz */ |
| 124781 | VR512, VK8WM, VR512, VR512, |
| 124782 | /* VPANDYrm */ |
| 124783 | VR256, VR256, i256mem, |
| 124784 | /* VPANDYrr */ |
| 124785 | VR256, VR256, VR256, |
| 124786 | /* VPANDrm */ |
| 124787 | VR128, VR128, i128mem, |
| 124788 | /* VPANDrr */ |
| 124789 | VR128, VR128, VR128, |
| 124790 | /* VPAVGBYrm */ |
| 124791 | VR256, VR256, i256mem, |
| 124792 | /* VPAVGBYrr */ |
| 124793 | VR256, VR256, VR256, |
| 124794 | /* VPAVGBZ128rm */ |
| 124795 | VR128X, VR128X, i128mem, |
| 124796 | /* VPAVGBZ128rmk */ |
| 124797 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 124798 | /* VPAVGBZ128rmkz */ |
| 124799 | VR128X, VK16WM, VR128X, i128mem, |
| 124800 | /* VPAVGBZ128rr */ |
| 124801 | VR128X, VR128X, VR128X, |
| 124802 | /* VPAVGBZ128rrk */ |
| 124803 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 124804 | /* VPAVGBZ128rrkz */ |
| 124805 | VR128X, VK16WM, VR128X, VR128X, |
| 124806 | /* VPAVGBZ256rm */ |
| 124807 | VR256X, VR256X, i256mem, |
| 124808 | /* VPAVGBZ256rmk */ |
| 124809 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 124810 | /* VPAVGBZ256rmkz */ |
| 124811 | VR256X, VK32WM, VR256X, i256mem, |
| 124812 | /* VPAVGBZ256rr */ |
| 124813 | VR256X, VR256X, VR256X, |
| 124814 | /* VPAVGBZ256rrk */ |
| 124815 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 124816 | /* VPAVGBZ256rrkz */ |
| 124817 | VR256X, VK32WM, VR256X, VR256X, |
| 124818 | /* VPAVGBZrm */ |
| 124819 | VR512, VR512, i512mem, |
| 124820 | /* VPAVGBZrmk */ |
| 124821 | VR512, VR512, VK64WM, VR512, i512mem, |
| 124822 | /* VPAVGBZrmkz */ |
| 124823 | VR512, VK64WM, VR512, i512mem, |
| 124824 | /* VPAVGBZrr */ |
| 124825 | VR512, VR512, VR512, |
| 124826 | /* VPAVGBZrrk */ |
| 124827 | VR512, VR512, VK64WM, VR512, VR512, |
| 124828 | /* VPAVGBZrrkz */ |
| 124829 | VR512, VK64WM, VR512, VR512, |
| 124830 | /* VPAVGBrm */ |
| 124831 | VR128, VR128, i128mem, |
| 124832 | /* VPAVGBrr */ |
| 124833 | VR128, VR128, VR128, |
| 124834 | /* VPAVGWYrm */ |
| 124835 | VR256, VR256, i256mem, |
| 124836 | /* VPAVGWYrr */ |
| 124837 | VR256, VR256, VR256, |
| 124838 | /* VPAVGWZ128rm */ |
| 124839 | VR128X, VR128X, i128mem, |
| 124840 | /* VPAVGWZ128rmk */ |
| 124841 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 124842 | /* VPAVGWZ128rmkz */ |
| 124843 | VR128X, VK8WM, VR128X, i128mem, |
| 124844 | /* VPAVGWZ128rr */ |
| 124845 | VR128X, VR128X, VR128X, |
| 124846 | /* VPAVGWZ128rrk */ |
| 124847 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124848 | /* VPAVGWZ128rrkz */ |
| 124849 | VR128X, VK8WM, VR128X, VR128X, |
| 124850 | /* VPAVGWZ256rm */ |
| 124851 | VR256X, VR256X, i256mem, |
| 124852 | /* VPAVGWZ256rmk */ |
| 124853 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 124854 | /* VPAVGWZ256rmkz */ |
| 124855 | VR256X, VK16WM, VR256X, i256mem, |
| 124856 | /* VPAVGWZ256rr */ |
| 124857 | VR256X, VR256X, VR256X, |
| 124858 | /* VPAVGWZ256rrk */ |
| 124859 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124860 | /* VPAVGWZ256rrkz */ |
| 124861 | VR256X, VK16WM, VR256X, VR256X, |
| 124862 | /* VPAVGWZrm */ |
| 124863 | VR512, VR512, i512mem, |
| 124864 | /* VPAVGWZrmk */ |
| 124865 | VR512, VR512, VK32WM, VR512, i512mem, |
| 124866 | /* VPAVGWZrmkz */ |
| 124867 | VR512, VK32WM, VR512, i512mem, |
| 124868 | /* VPAVGWZrr */ |
| 124869 | VR512, VR512, VR512, |
| 124870 | /* VPAVGWZrrk */ |
| 124871 | VR512, VR512, VK32WM, VR512, VR512, |
| 124872 | /* VPAVGWZrrkz */ |
| 124873 | VR512, VK32WM, VR512, VR512, |
| 124874 | /* VPAVGWrm */ |
| 124875 | VR128, VR128, i128mem, |
| 124876 | /* VPAVGWrr */ |
| 124877 | VR128, VR128, VR128, |
| 124878 | /* VPBLENDDYrmi */ |
| 124879 | VR256, VR256, i256mem, u8imm, |
| 124880 | /* VPBLENDDYrri */ |
| 124881 | VR256, VR256, VR256, u8imm, |
| 124882 | /* VPBLENDDrmi */ |
| 124883 | VR128, VR128, i128mem, u8imm, |
| 124884 | /* VPBLENDDrri */ |
| 124885 | VR128, VR128, VR128, u8imm, |
| 124886 | /* VPBLENDMBZ128rm */ |
| 124887 | VR128X, VR128X, i128mem, |
| 124888 | /* VPBLENDMBZ128rmk */ |
| 124889 | VR128X, VK16WM, VR128X, i128mem, |
| 124890 | /* VPBLENDMBZ128rmkz */ |
| 124891 | VR128X, VK16WM, VR128X, i128mem, |
| 124892 | /* VPBLENDMBZ128rr */ |
| 124893 | VR128X, VR128X, VR128X, |
| 124894 | /* VPBLENDMBZ128rrk */ |
| 124895 | VR128X, VK16WM, VR128X, VR128X, |
| 124896 | /* VPBLENDMBZ128rrkz */ |
| 124897 | VR128X, VK16WM, VR128X, VR128X, |
| 124898 | /* VPBLENDMBZ256rm */ |
| 124899 | VR256X, VR256X, i256mem, |
| 124900 | /* VPBLENDMBZ256rmk */ |
| 124901 | VR256X, VK32WM, VR256X, i256mem, |
| 124902 | /* VPBLENDMBZ256rmkz */ |
| 124903 | VR256X, VK32WM, VR256X, i256mem, |
| 124904 | /* VPBLENDMBZ256rr */ |
| 124905 | VR256X, VR256X, VR256X, |
| 124906 | /* VPBLENDMBZ256rrk */ |
| 124907 | VR256X, VK32WM, VR256X, VR256X, |
| 124908 | /* VPBLENDMBZ256rrkz */ |
| 124909 | VR256X, VK32WM, VR256X, VR256X, |
| 124910 | /* VPBLENDMBZrm */ |
| 124911 | VR512, VR512, i512mem, |
| 124912 | /* VPBLENDMBZrmk */ |
| 124913 | VR512, VK64WM, VR512, i512mem, |
| 124914 | /* VPBLENDMBZrmkz */ |
| 124915 | VR512, VK64WM, VR512, i512mem, |
| 124916 | /* VPBLENDMBZrr */ |
| 124917 | VR512, VR512, VR512, |
| 124918 | /* VPBLENDMBZrrk */ |
| 124919 | VR512, VK64WM, VR512, VR512, |
| 124920 | /* VPBLENDMBZrrkz */ |
| 124921 | VR512, VK64WM, VR512, VR512, |
| 124922 | /* VPBLENDMDZ128rm */ |
| 124923 | VR128X, VR128X, i128mem, |
| 124924 | /* VPBLENDMDZ128rmb */ |
| 124925 | VR128X, VR128X, i32mem, |
| 124926 | /* VPBLENDMDZ128rmbk */ |
| 124927 | VR128X, VK4WM, VR128X, i32mem, |
| 124928 | /* VPBLENDMDZ128rmbkz */ |
| 124929 | VR128X, VK4WM, VR128X, i32mem, |
| 124930 | /* VPBLENDMDZ128rmk */ |
| 124931 | VR128X, VK4WM, VR128X, i128mem, |
| 124932 | /* VPBLENDMDZ128rmkz */ |
| 124933 | VR128X, VK4WM, VR128X, i128mem, |
| 124934 | /* VPBLENDMDZ128rr */ |
| 124935 | VR128X, VR128X, VR128X, |
| 124936 | /* VPBLENDMDZ128rrk */ |
| 124937 | VR128X, VK4WM, VR128X, VR128X, |
| 124938 | /* VPBLENDMDZ128rrkz */ |
| 124939 | VR128X, VK4WM, VR128X, VR128X, |
| 124940 | /* VPBLENDMDZ256rm */ |
| 124941 | VR256X, VR256X, i256mem, |
| 124942 | /* VPBLENDMDZ256rmb */ |
| 124943 | VR256X, VR256X, i32mem, |
| 124944 | /* VPBLENDMDZ256rmbk */ |
| 124945 | VR256X, VK8WM, VR256X, i32mem, |
| 124946 | /* VPBLENDMDZ256rmbkz */ |
| 124947 | VR256X, VK8WM, VR256X, i32mem, |
| 124948 | /* VPBLENDMDZ256rmk */ |
| 124949 | VR256X, VK8WM, VR256X, i256mem, |
| 124950 | /* VPBLENDMDZ256rmkz */ |
| 124951 | VR256X, VK8WM, VR256X, i256mem, |
| 124952 | /* VPBLENDMDZ256rr */ |
| 124953 | VR256X, VR256X, VR256X, |
| 124954 | /* VPBLENDMDZ256rrk */ |
| 124955 | VR256X, VK8WM, VR256X, VR256X, |
| 124956 | /* VPBLENDMDZ256rrkz */ |
| 124957 | VR256X, VK8WM, VR256X, VR256X, |
| 124958 | /* VPBLENDMDZrm */ |
| 124959 | VR512, VR512, i512mem, |
| 124960 | /* VPBLENDMDZrmb */ |
| 124961 | VR512, VR512, i32mem, |
| 124962 | /* VPBLENDMDZrmbk */ |
| 124963 | VR512, VK16WM, VR512, i32mem, |
| 124964 | /* VPBLENDMDZrmbkz */ |
| 124965 | VR512, VK16WM, VR512, i32mem, |
| 124966 | /* VPBLENDMDZrmk */ |
| 124967 | VR512, VK16WM, VR512, i512mem, |
| 124968 | /* VPBLENDMDZrmkz */ |
| 124969 | VR512, VK16WM, VR512, i512mem, |
| 124970 | /* VPBLENDMDZrr */ |
| 124971 | VR512, VR512, VR512, |
| 124972 | /* VPBLENDMDZrrk */ |
| 124973 | VR512, VK16WM, VR512, VR512, |
| 124974 | /* VPBLENDMDZrrkz */ |
| 124975 | VR512, VK16WM, VR512, VR512, |
| 124976 | /* VPBLENDMQZ128rm */ |
| 124977 | VR128X, VR128X, i128mem, |
| 124978 | /* VPBLENDMQZ128rmb */ |
| 124979 | VR128X, VR128X, i64mem, |
| 124980 | /* VPBLENDMQZ128rmbk */ |
| 124981 | VR128X, VK2WM, VR128X, i64mem, |
| 124982 | /* VPBLENDMQZ128rmbkz */ |
| 124983 | VR128X, VK2WM, VR128X, i64mem, |
| 124984 | /* VPBLENDMQZ128rmk */ |
| 124985 | VR128X, VK2WM, VR128X, i128mem, |
| 124986 | /* VPBLENDMQZ128rmkz */ |
| 124987 | VR128X, VK2WM, VR128X, i128mem, |
| 124988 | /* VPBLENDMQZ128rr */ |
| 124989 | VR128X, VR128X, VR128X, |
| 124990 | /* VPBLENDMQZ128rrk */ |
| 124991 | VR128X, VK2WM, VR128X, VR128X, |
| 124992 | /* VPBLENDMQZ128rrkz */ |
| 124993 | VR128X, VK2WM, VR128X, VR128X, |
| 124994 | /* VPBLENDMQZ256rm */ |
| 124995 | VR256X, VR256X, i256mem, |
| 124996 | /* VPBLENDMQZ256rmb */ |
| 124997 | VR256X, VR256X, i64mem, |
| 124998 | /* VPBLENDMQZ256rmbk */ |
| 124999 | VR256X, VK4WM, VR256X, i64mem, |
| 125000 | /* VPBLENDMQZ256rmbkz */ |
| 125001 | VR256X, VK4WM, VR256X, i64mem, |
| 125002 | /* VPBLENDMQZ256rmk */ |
| 125003 | VR256X, VK4WM, VR256X, i256mem, |
| 125004 | /* VPBLENDMQZ256rmkz */ |
| 125005 | VR256X, VK4WM, VR256X, i256mem, |
| 125006 | /* VPBLENDMQZ256rr */ |
| 125007 | VR256X, VR256X, VR256X, |
| 125008 | /* VPBLENDMQZ256rrk */ |
| 125009 | VR256X, VK4WM, VR256X, VR256X, |
| 125010 | /* VPBLENDMQZ256rrkz */ |
| 125011 | VR256X, VK4WM, VR256X, VR256X, |
| 125012 | /* VPBLENDMQZrm */ |
| 125013 | VR512, VR512, i512mem, |
| 125014 | /* VPBLENDMQZrmb */ |
| 125015 | VR512, VR512, i64mem, |
| 125016 | /* VPBLENDMQZrmbk */ |
| 125017 | VR512, VK8WM, VR512, i64mem, |
| 125018 | /* VPBLENDMQZrmbkz */ |
| 125019 | VR512, VK8WM, VR512, i64mem, |
| 125020 | /* VPBLENDMQZrmk */ |
| 125021 | VR512, VK8WM, VR512, i512mem, |
| 125022 | /* VPBLENDMQZrmkz */ |
| 125023 | VR512, VK8WM, VR512, i512mem, |
| 125024 | /* VPBLENDMQZrr */ |
| 125025 | VR512, VR512, VR512, |
| 125026 | /* VPBLENDMQZrrk */ |
| 125027 | VR512, VK8WM, VR512, VR512, |
| 125028 | /* VPBLENDMQZrrkz */ |
| 125029 | VR512, VK8WM, VR512, VR512, |
| 125030 | /* VPBLENDMWZ128rm */ |
| 125031 | VR128X, VR128X, i128mem, |
| 125032 | /* VPBLENDMWZ128rmk */ |
| 125033 | VR128X, VK8WM, VR128X, i128mem, |
| 125034 | /* VPBLENDMWZ128rmkz */ |
| 125035 | VR128X, VK8WM, VR128X, i128mem, |
| 125036 | /* VPBLENDMWZ128rr */ |
| 125037 | VR128X, VR128X, VR128X, |
| 125038 | /* VPBLENDMWZ128rrk */ |
| 125039 | VR128X, VK8WM, VR128X, VR128X, |
| 125040 | /* VPBLENDMWZ128rrkz */ |
| 125041 | VR128X, VK8WM, VR128X, VR128X, |
| 125042 | /* VPBLENDMWZ256rm */ |
| 125043 | VR256X, VR256X, i256mem, |
| 125044 | /* VPBLENDMWZ256rmk */ |
| 125045 | VR256X, VK16WM, VR256X, i256mem, |
| 125046 | /* VPBLENDMWZ256rmkz */ |
| 125047 | VR256X, VK16WM, VR256X, i256mem, |
| 125048 | /* VPBLENDMWZ256rr */ |
| 125049 | VR256X, VR256X, VR256X, |
| 125050 | /* VPBLENDMWZ256rrk */ |
| 125051 | VR256X, VK16WM, VR256X, VR256X, |
| 125052 | /* VPBLENDMWZ256rrkz */ |
| 125053 | VR256X, VK16WM, VR256X, VR256X, |
| 125054 | /* VPBLENDMWZrm */ |
| 125055 | VR512, VR512, i512mem, |
| 125056 | /* VPBLENDMWZrmk */ |
| 125057 | VR512, VK32WM, VR512, i512mem, |
| 125058 | /* VPBLENDMWZrmkz */ |
| 125059 | VR512, VK32WM, VR512, i512mem, |
| 125060 | /* VPBLENDMWZrr */ |
| 125061 | VR512, VR512, VR512, |
| 125062 | /* VPBLENDMWZrrk */ |
| 125063 | VR512, VK32WM, VR512, VR512, |
| 125064 | /* VPBLENDMWZrrkz */ |
| 125065 | VR512, VK32WM, VR512, VR512, |
| 125066 | /* VPBLENDVBYrmr */ |
| 125067 | VR256, VR256, i256mem, VR256, |
| 125068 | /* VPBLENDVBYrrr */ |
| 125069 | VR256, VR256, VR256, VR256, |
| 125070 | /* VPBLENDVBrmr */ |
| 125071 | VR128, VR128, i128mem, VR128, |
| 125072 | /* VPBLENDVBrrr */ |
| 125073 | VR128, VR128, VR128, VR128, |
| 125074 | /* VPBLENDWYrmi */ |
| 125075 | VR256, VR256, i256mem, u8imm, |
| 125076 | /* VPBLENDWYrri */ |
| 125077 | VR256, VR256, VR256, u8imm, |
| 125078 | /* VPBLENDWrmi */ |
| 125079 | VR128, VR128, i128mem, u8imm, |
| 125080 | /* VPBLENDWrri */ |
| 125081 | VR128, VR128, VR128, u8imm, |
| 125082 | /* VPBROADCASTBYrm */ |
| 125083 | VR256, i8mem, |
| 125084 | /* VPBROADCASTBYrr */ |
| 125085 | VR256, VR128, |
| 125086 | /* VPBROADCASTBZ128rm */ |
| 125087 | VR128X, i8mem, |
| 125088 | /* VPBROADCASTBZ128rmk */ |
| 125089 | VR128X, VR128X, VK16WM, i8mem, |
| 125090 | /* VPBROADCASTBZ128rmkz */ |
| 125091 | VR128X, VK16WM, i8mem, |
| 125092 | /* VPBROADCASTBZ128rr */ |
| 125093 | VR128X, VR128X, |
| 125094 | /* VPBROADCASTBZ128rrk */ |
| 125095 | VR128X, VR128X, VK16WM, VR128X, |
| 125096 | /* VPBROADCASTBZ128rrkz */ |
| 125097 | VR128X, VK16WM, VR128X, |
| 125098 | /* VPBROADCASTBZ256rm */ |
| 125099 | VR256X, i8mem, |
| 125100 | /* VPBROADCASTBZ256rmk */ |
| 125101 | VR256X, VR256X, VK32WM, i8mem, |
| 125102 | /* VPBROADCASTBZ256rmkz */ |
| 125103 | VR256X, VK32WM, i8mem, |
| 125104 | /* VPBROADCASTBZ256rr */ |
| 125105 | VR256X, VR128X, |
| 125106 | /* VPBROADCASTBZ256rrk */ |
| 125107 | VR256X, VR256X, VK32WM, VR128X, |
| 125108 | /* VPBROADCASTBZ256rrkz */ |
| 125109 | VR256X, VK32WM, VR128X, |
| 125110 | /* VPBROADCASTBZrm */ |
| 125111 | VR512, i8mem, |
| 125112 | /* VPBROADCASTBZrmk */ |
| 125113 | VR512, VR512, VK64WM, i8mem, |
| 125114 | /* VPBROADCASTBZrmkz */ |
| 125115 | VR512, VK64WM, i8mem, |
| 125116 | /* VPBROADCASTBZrr */ |
| 125117 | VR512, VR128X, |
| 125118 | /* VPBROADCASTBZrrk */ |
| 125119 | VR512, VR512, VK64WM, VR128X, |
| 125120 | /* VPBROADCASTBZrrkz */ |
| 125121 | VR512, VK64WM, VR128X, |
| 125122 | /* VPBROADCASTBrZ128rr */ |
| 125123 | VR128X, GR32, |
| 125124 | /* VPBROADCASTBrZ128rrk */ |
| 125125 | VR128X, VR128X, VK16WM, GR32, |
| 125126 | /* VPBROADCASTBrZ128rrkz */ |
| 125127 | VR128X, VK16WM, GR32, |
| 125128 | /* VPBROADCASTBrZ256rr */ |
| 125129 | VR256X, GR32, |
| 125130 | /* VPBROADCASTBrZ256rrk */ |
| 125131 | VR256X, VR256X, VK32WM, GR32, |
| 125132 | /* VPBROADCASTBrZ256rrkz */ |
| 125133 | VR256X, VK32WM, GR32, |
| 125134 | /* VPBROADCASTBrZrr */ |
| 125135 | VR512, GR32, |
| 125136 | /* VPBROADCASTBrZrrk */ |
| 125137 | VR512, VR512, VK64WM, GR32, |
| 125138 | /* VPBROADCASTBrZrrkz */ |
| 125139 | VR512, VK64WM, GR32, |
| 125140 | /* VPBROADCASTBrm */ |
| 125141 | VR128, i8mem, |
| 125142 | /* VPBROADCASTBrr */ |
| 125143 | VR128, VR128, |
| 125144 | /* VPBROADCASTDYrm */ |
| 125145 | VR256, i32mem, |
| 125146 | /* VPBROADCASTDYrr */ |
| 125147 | VR256, VR128, |
| 125148 | /* VPBROADCASTDZ128rm */ |
| 125149 | VR128X, i32mem, |
| 125150 | /* VPBROADCASTDZ128rmk */ |
| 125151 | VR128X, VR128X, VK4WM, i32mem, |
| 125152 | /* VPBROADCASTDZ128rmkz */ |
| 125153 | VR128X, VK4WM, i32mem, |
| 125154 | /* VPBROADCASTDZ128rr */ |
| 125155 | VR128X, VR128X, |
| 125156 | /* VPBROADCASTDZ128rrk */ |
| 125157 | VR128X, VR128X, VK4WM, VR128X, |
| 125158 | /* VPBROADCASTDZ128rrkz */ |
| 125159 | VR128X, VK4WM, VR128X, |
| 125160 | /* VPBROADCASTDZ256rm */ |
| 125161 | VR256X, i32mem, |
| 125162 | /* VPBROADCASTDZ256rmk */ |
| 125163 | VR256X, VR256X, VK8WM, i32mem, |
| 125164 | /* VPBROADCASTDZ256rmkz */ |
| 125165 | VR256X, VK8WM, i32mem, |
| 125166 | /* VPBROADCASTDZ256rr */ |
| 125167 | VR256X, VR128X, |
| 125168 | /* VPBROADCASTDZ256rrk */ |
| 125169 | VR256X, VR256X, VK8WM, VR128X, |
| 125170 | /* VPBROADCASTDZ256rrkz */ |
| 125171 | VR256X, VK8WM, VR128X, |
| 125172 | /* VPBROADCASTDZrm */ |
| 125173 | VR512, i32mem, |
| 125174 | /* VPBROADCASTDZrmk */ |
| 125175 | VR512, VR512, VK16WM, i32mem, |
| 125176 | /* VPBROADCASTDZrmkz */ |
| 125177 | VR512, VK16WM, i32mem, |
| 125178 | /* VPBROADCASTDZrr */ |
| 125179 | VR512, VR128X, |
| 125180 | /* VPBROADCASTDZrrk */ |
| 125181 | VR512, VR512, VK16WM, VR128X, |
| 125182 | /* VPBROADCASTDZrrkz */ |
| 125183 | VR512, VK16WM, VR128X, |
| 125184 | /* VPBROADCASTDrZ128rr */ |
| 125185 | VR128X, GR32, |
| 125186 | /* VPBROADCASTDrZ128rrk */ |
| 125187 | VR128X, VR128X, VK4WM, GR32, |
| 125188 | /* VPBROADCASTDrZ128rrkz */ |
| 125189 | VR128X, VK4WM, GR32, |
| 125190 | /* VPBROADCASTDrZ256rr */ |
| 125191 | VR256X, GR32, |
| 125192 | /* VPBROADCASTDrZ256rrk */ |
| 125193 | VR256X, VR256X, VK8WM, GR32, |
| 125194 | /* VPBROADCASTDrZ256rrkz */ |
| 125195 | VR256X, VK8WM, GR32, |
| 125196 | /* VPBROADCASTDrZrr */ |
| 125197 | VR512, GR32, |
| 125198 | /* VPBROADCASTDrZrrk */ |
| 125199 | VR512, VR512, VK16WM, GR32, |
| 125200 | /* VPBROADCASTDrZrrkz */ |
| 125201 | VR512, VK16WM, GR32, |
| 125202 | /* VPBROADCASTDrm */ |
| 125203 | VR128, i32mem, |
| 125204 | /* VPBROADCASTDrr */ |
| 125205 | VR128, VR128, |
| 125206 | /* VPBROADCASTMB2QZ128rr */ |
| 125207 | VR128X, VK8, |
| 125208 | /* VPBROADCASTMB2QZ256rr */ |
| 125209 | VR256X, VK8, |
| 125210 | /* VPBROADCASTMB2QZrr */ |
| 125211 | VR512, VK8, |
| 125212 | /* VPBROADCASTMW2DZ128rr */ |
| 125213 | VR128X, VK16, |
| 125214 | /* VPBROADCASTMW2DZ256rr */ |
| 125215 | VR256X, VK16, |
| 125216 | /* VPBROADCASTMW2DZrr */ |
| 125217 | VR512, VK16, |
| 125218 | /* VPBROADCASTQYrm */ |
| 125219 | VR256, i64mem, |
| 125220 | /* VPBROADCASTQYrr */ |
| 125221 | VR256, VR128, |
| 125222 | /* VPBROADCASTQZ128rm */ |
| 125223 | VR128X, i64mem, |
| 125224 | /* VPBROADCASTQZ128rmk */ |
| 125225 | VR128X, VR128X, VK2WM, i64mem, |
| 125226 | /* VPBROADCASTQZ128rmkz */ |
| 125227 | VR128X, VK2WM, i64mem, |
| 125228 | /* VPBROADCASTQZ128rr */ |
| 125229 | VR128X, VR128X, |
| 125230 | /* VPBROADCASTQZ128rrk */ |
| 125231 | VR128X, VR128X, VK2WM, VR128X, |
| 125232 | /* VPBROADCASTQZ128rrkz */ |
| 125233 | VR128X, VK2WM, VR128X, |
| 125234 | /* VPBROADCASTQZ256rm */ |
| 125235 | VR256X, i64mem, |
| 125236 | /* VPBROADCASTQZ256rmk */ |
| 125237 | VR256X, VR256X, VK4WM, i64mem, |
| 125238 | /* VPBROADCASTQZ256rmkz */ |
| 125239 | VR256X, VK4WM, i64mem, |
| 125240 | /* VPBROADCASTQZ256rr */ |
| 125241 | VR256X, VR128X, |
| 125242 | /* VPBROADCASTQZ256rrk */ |
| 125243 | VR256X, VR256X, VK4WM, VR128X, |
| 125244 | /* VPBROADCASTQZ256rrkz */ |
| 125245 | VR256X, VK4WM, VR128X, |
| 125246 | /* VPBROADCASTQZrm */ |
| 125247 | VR512, i64mem, |
| 125248 | /* VPBROADCASTQZrmk */ |
| 125249 | VR512, VR512, VK8WM, i64mem, |
| 125250 | /* VPBROADCASTQZrmkz */ |
| 125251 | VR512, VK8WM, i64mem, |
| 125252 | /* VPBROADCASTQZrr */ |
| 125253 | VR512, VR128X, |
| 125254 | /* VPBROADCASTQZrrk */ |
| 125255 | VR512, VR512, VK8WM, VR128X, |
| 125256 | /* VPBROADCASTQZrrkz */ |
| 125257 | VR512, VK8WM, VR128X, |
| 125258 | /* VPBROADCASTQrZ128rr */ |
| 125259 | VR128X, GR64, |
| 125260 | /* VPBROADCASTQrZ128rrk */ |
| 125261 | VR128X, VR128X, VK2WM, GR64, |
| 125262 | /* VPBROADCASTQrZ128rrkz */ |
| 125263 | VR128X, VK2WM, GR64, |
| 125264 | /* VPBROADCASTQrZ256rr */ |
| 125265 | VR256X, GR64, |
| 125266 | /* VPBROADCASTQrZ256rrk */ |
| 125267 | VR256X, VR256X, VK4WM, GR64, |
| 125268 | /* VPBROADCASTQrZ256rrkz */ |
| 125269 | VR256X, VK4WM, GR64, |
| 125270 | /* VPBROADCASTQrZrr */ |
| 125271 | VR512, GR64, |
| 125272 | /* VPBROADCASTQrZrrk */ |
| 125273 | VR512, VR512, VK8WM, GR64, |
| 125274 | /* VPBROADCASTQrZrrkz */ |
| 125275 | VR512, VK8WM, GR64, |
| 125276 | /* VPBROADCASTQrm */ |
| 125277 | VR128, i64mem, |
| 125278 | /* VPBROADCASTQrr */ |
| 125279 | VR128, VR128, |
| 125280 | /* VPBROADCASTWYrm */ |
| 125281 | VR256, i16mem, |
| 125282 | /* VPBROADCASTWYrr */ |
| 125283 | VR256, VR128, |
| 125284 | /* VPBROADCASTWZ128rm */ |
| 125285 | VR128X, i16mem, |
| 125286 | /* VPBROADCASTWZ128rmk */ |
| 125287 | VR128X, VR128X, VK8WM, i16mem, |
| 125288 | /* VPBROADCASTWZ128rmkz */ |
| 125289 | VR128X, VK8WM, i16mem, |
| 125290 | /* VPBROADCASTWZ128rr */ |
| 125291 | VR128X, VR128X, |
| 125292 | /* VPBROADCASTWZ128rrk */ |
| 125293 | VR128X, VR128X, VK8WM, VR128X, |
| 125294 | /* VPBROADCASTWZ128rrkz */ |
| 125295 | VR128X, VK8WM, VR128X, |
| 125296 | /* VPBROADCASTWZ256rm */ |
| 125297 | VR256X, i16mem, |
| 125298 | /* VPBROADCASTWZ256rmk */ |
| 125299 | VR256X, VR256X, VK16WM, i16mem, |
| 125300 | /* VPBROADCASTWZ256rmkz */ |
| 125301 | VR256X, VK16WM, i16mem, |
| 125302 | /* VPBROADCASTWZ256rr */ |
| 125303 | VR256X, VR128X, |
| 125304 | /* VPBROADCASTWZ256rrk */ |
| 125305 | VR256X, VR256X, VK16WM, VR128X, |
| 125306 | /* VPBROADCASTWZ256rrkz */ |
| 125307 | VR256X, VK16WM, VR128X, |
| 125308 | /* VPBROADCASTWZrm */ |
| 125309 | VR512, i16mem, |
| 125310 | /* VPBROADCASTWZrmk */ |
| 125311 | VR512, VR512, VK32WM, i16mem, |
| 125312 | /* VPBROADCASTWZrmkz */ |
| 125313 | VR512, VK32WM, i16mem, |
| 125314 | /* VPBROADCASTWZrr */ |
| 125315 | VR512, VR128X, |
| 125316 | /* VPBROADCASTWZrrk */ |
| 125317 | VR512, VR512, VK32WM, VR128X, |
| 125318 | /* VPBROADCASTWZrrkz */ |
| 125319 | VR512, VK32WM, VR128X, |
| 125320 | /* VPBROADCASTWrZ128rr */ |
| 125321 | VR128X, GR32, |
| 125322 | /* VPBROADCASTWrZ128rrk */ |
| 125323 | VR128X, VR128X, VK8WM, GR32, |
| 125324 | /* VPBROADCASTWrZ128rrkz */ |
| 125325 | VR128X, VK8WM, GR32, |
| 125326 | /* VPBROADCASTWrZ256rr */ |
| 125327 | VR256X, GR32, |
| 125328 | /* VPBROADCASTWrZ256rrk */ |
| 125329 | VR256X, VR256X, VK16WM, GR32, |
| 125330 | /* VPBROADCASTWrZ256rrkz */ |
| 125331 | VR256X, VK16WM, GR32, |
| 125332 | /* VPBROADCASTWrZrr */ |
| 125333 | VR512, GR32, |
| 125334 | /* VPBROADCASTWrZrrk */ |
| 125335 | VR512, VR512, VK32WM, GR32, |
| 125336 | /* VPBROADCASTWrZrrkz */ |
| 125337 | VR512, VK32WM, GR32, |
| 125338 | /* VPBROADCASTWrm */ |
| 125339 | VR128, i16mem, |
| 125340 | /* VPBROADCASTWrr */ |
| 125341 | VR128, VR128, |
| 125342 | /* VPCLMULQDQYrmi */ |
| 125343 | VR256, VR256, i256mem, u8imm, |
| 125344 | /* VPCLMULQDQYrri */ |
| 125345 | VR256, VR256, VR256, u8imm, |
| 125346 | /* VPCLMULQDQZ128rmi */ |
| 125347 | VR128X, VR128X, i128mem, u8imm, |
| 125348 | /* VPCLMULQDQZ128rri */ |
| 125349 | VR128X, VR128X, VR128X, u8imm, |
| 125350 | /* VPCLMULQDQZ256rmi */ |
| 125351 | VR256X, VR256X, i256mem, u8imm, |
| 125352 | /* VPCLMULQDQZ256rri */ |
| 125353 | VR256X, VR256X, VR256X, u8imm, |
| 125354 | /* VPCLMULQDQZrmi */ |
| 125355 | VR512, VR512, i512mem, u8imm, |
| 125356 | /* VPCLMULQDQZrri */ |
| 125357 | VR512, VR512, VR512, u8imm, |
| 125358 | /* VPCLMULQDQrmi */ |
| 125359 | VR128, VR128, i128mem, u8imm, |
| 125360 | /* VPCLMULQDQrri */ |
| 125361 | VR128, VR128, VR128, u8imm, |
| 125362 | /* VPCMOVYrmr */ |
| 125363 | VR256, VR256, i256mem, VR256, |
| 125364 | /* VPCMOVYrrm */ |
| 125365 | VR256, VR256, VR256, i256mem, |
| 125366 | /* VPCMOVYrrr */ |
| 125367 | VR256, VR256, VR256, VR256, |
| 125368 | /* VPCMOVYrrr_REV */ |
| 125369 | VR256, VR256, VR256, VR256, |
| 125370 | /* VPCMOVrmr */ |
| 125371 | VR128, VR128, i128mem, VR128, |
| 125372 | /* VPCMOVrrm */ |
| 125373 | VR128, VR128, VR128, i128mem, |
| 125374 | /* VPCMOVrrr */ |
| 125375 | VR128, VR128, VR128, VR128, |
| 125376 | /* VPCMOVrrr_REV */ |
| 125377 | VR128, VR128, VR128, VR128, |
| 125378 | /* VPCMPBZ128rmi */ |
| 125379 | VK16, VR128X, i128mem, u8imm, |
| 125380 | /* VPCMPBZ128rmik */ |
| 125381 | VK16, VK16WM, VR128X, i128mem, u8imm, |
| 125382 | /* VPCMPBZ128rri */ |
| 125383 | VK16, VR128X, VR128X, u8imm, |
| 125384 | /* VPCMPBZ128rrik */ |
| 125385 | VK16, VK16WM, VR128X, VR128X, u8imm, |
| 125386 | /* VPCMPBZ256rmi */ |
| 125387 | VK32, VR256X, i256mem, u8imm, |
| 125388 | /* VPCMPBZ256rmik */ |
| 125389 | VK32, VK32WM, VR256X, i256mem, u8imm, |
| 125390 | /* VPCMPBZ256rri */ |
| 125391 | VK32, VR256X, VR256X, u8imm, |
| 125392 | /* VPCMPBZ256rrik */ |
| 125393 | VK32, VK32WM, VR256X, VR256X, u8imm, |
| 125394 | /* VPCMPBZrmi */ |
| 125395 | VK64, VR512, i512mem, u8imm, |
| 125396 | /* VPCMPBZrmik */ |
| 125397 | VK64, VK64WM, VR512, i512mem, u8imm, |
| 125398 | /* VPCMPBZrri */ |
| 125399 | VK64, VR512, VR512, u8imm, |
| 125400 | /* VPCMPBZrrik */ |
| 125401 | VK64, VK64WM, VR512, VR512, u8imm, |
| 125402 | /* VPCMPDZ128rmbi */ |
| 125403 | VK4, VR128X, i32mem, u8imm, |
| 125404 | /* VPCMPDZ128rmbik */ |
| 125405 | VK4, VK4WM, VR128X, i32mem, u8imm, |
| 125406 | /* VPCMPDZ128rmi */ |
| 125407 | VK4, VR128X, i128mem, u8imm, |
| 125408 | /* VPCMPDZ128rmik */ |
| 125409 | VK4, VK4WM, VR128X, i128mem, u8imm, |
| 125410 | /* VPCMPDZ128rri */ |
| 125411 | VK4, VR128X, VR128X, u8imm, |
| 125412 | /* VPCMPDZ128rrik */ |
| 125413 | VK4, VK4WM, VR128X, VR128X, u8imm, |
| 125414 | /* VPCMPDZ256rmbi */ |
| 125415 | VK8, VR256X, i32mem, u8imm, |
| 125416 | /* VPCMPDZ256rmbik */ |
| 125417 | VK8, VK8WM, VR256X, i32mem, u8imm, |
| 125418 | /* VPCMPDZ256rmi */ |
| 125419 | VK8, VR256X, i256mem, u8imm, |
| 125420 | /* VPCMPDZ256rmik */ |
| 125421 | VK8, VK8WM, VR256X, i256mem, u8imm, |
| 125422 | /* VPCMPDZ256rri */ |
| 125423 | VK8, VR256X, VR256X, u8imm, |
| 125424 | /* VPCMPDZ256rrik */ |
| 125425 | VK8, VK8WM, VR256X, VR256X, u8imm, |
| 125426 | /* VPCMPDZrmbi */ |
| 125427 | VK16, VR512, i32mem, u8imm, |
| 125428 | /* VPCMPDZrmbik */ |
| 125429 | VK16, VK16WM, VR512, i32mem, u8imm, |
| 125430 | /* VPCMPDZrmi */ |
| 125431 | VK16, VR512, i512mem, u8imm, |
| 125432 | /* VPCMPDZrmik */ |
| 125433 | VK16, VK16WM, VR512, i512mem, u8imm, |
| 125434 | /* VPCMPDZrri */ |
| 125435 | VK16, VR512, VR512, u8imm, |
| 125436 | /* VPCMPDZrrik */ |
| 125437 | VK16, VK16WM, VR512, VR512, u8imm, |
| 125438 | /* VPCMPEQBYrm */ |
| 125439 | VR256, VR256, i256mem, |
| 125440 | /* VPCMPEQBYrr */ |
| 125441 | VR256, VR256, VR256, |
| 125442 | /* VPCMPEQBZ128rm */ |
| 125443 | VK16, VR128X, i128mem, |
| 125444 | /* VPCMPEQBZ128rmk */ |
| 125445 | VK16, VK16WM, VR128X, i128mem, |
| 125446 | /* VPCMPEQBZ128rr */ |
| 125447 | VK16, VR128X, VR128X, |
| 125448 | /* VPCMPEQBZ128rrk */ |
| 125449 | VK16, VK16WM, VR128X, VR128X, |
| 125450 | /* VPCMPEQBZ256rm */ |
| 125451 | VK32, VR256X, i256mem, |
| 125452 | /* VPCMPEQBZ256rmk */ |
| 125453 | VK32, VK32WM, VR256X, i256mem, |
| 125454 | /* VPCMPEQBZ256rr */ |
| 125455 | VK32, VR256X, VR256X, |
| 125456 | /* VPCMPEQBZ256rrk */ |
| 125457 | VK32, VK32WM, VR256X, VR256X, |
| 125458 | /* VPCMPEQBZrm */ |
| 125459 | VK64, VR512, i512mem, |
| 125460 | /* VPCMPEQBZrmk */ |
| 125461 | VK64, VK64WM, VR512, i512mem, |
| 125462 | /* VPCMPEQBZrr */ |
| 125463 | VK64, VR512, VR512, |
| 125464 | /* VPCMPEQBZrrk */ |
| 125465 | VK64, VK64WM, VR512, VR512, |
| 125466 | /* VPCMPEQBrm */ |
| 125467 | VR128, VR128, i128mem, |
| 125468 | /* VPCMPEQBrr */ |
| 125469 | VR128, VR128, VR128, |
| 125470 | /* VPCMPEQDYrm */ |
| 125471 | VR256, VR256, i256mem, |
| 125472 | /* VPCMPEQDYrr */ |
| 125473 | VR256, VR256, VR256, |
| 125474 | /* VPCMPEQDZ128rm */ |
| 125475 | VK4, VR128X, i128mem, |
| 125476 | /* VPCMPEQDZ128rmb */ |
| 125477 | VK4, VR128X, i32mem, |
| 125478 | /* VPCMPEQDZ128rmbk */ |
| 125479 | VK4, VK4WM, VR128X, i32mem, |
| 125480 | /* VPCMPEQDZ128rmk */ |
| 125481 | VK4, VK4WM, VR128X, i128mem, |
| 125482 | /* VPCMPEQDZ128rr */ |
| 125483 | VK4, VR128X, VR128X, |
| 125484 | /* VPCMPEQDZ128rrk */ |
| 125485 | VK4, VK4WM, VR128X, VR128X, |
| 125486 | /* VPCMPEQDZ256rm */ |
| 125487 | VK8, VR256X, i256mem, |
| 125488 | /* VPCMPEQDZ256rmb */ |
| 125489 | VK8, VR256X, i32mem, |
| 125490 | /* VPCMPEQDZ256rmbk */ |
| 125491 | VK8, VK8WM, VR256X, i32mem, |
| 125492 | /* VPCMPEQDZ256rmk */ |
| 125493 | VK8, VK8WM, VR256X, i256mem, |
| 125494 | /* VPCMPEQDZ256rr */ |
| 125495 | VK8, VR256X, VR256X, |
| 125496 | /* VPCMPEQDZ256rrk */ |
| 125497 | VK8, VK8WM, VR256X, VR256X, |
| 125498 | /* VPCMPEQDZrm */ |
| 125499 | VK16, VR512, i512mem, |
| 125500 | /* VPCMPEQDZrmb */ |
| 125501 | VK16, VR512, i32mem, |
| 125502 | /* VPCMPEQDZrmbk */ |
| 125503 | VK16, VK16WM, VR512, i32mem, |
| 125504 | /* VPCMPEQDZrmk */ |
| 125505 | VK16, VK16WM, VR512, i512mem, |
| 125506 | /* VPCMPEQDZrr */ |
| 125507 | VK16, VR512, VR512, |
| 125508 | /* VPCMPEQDZrrk */ |
| 125509 | VK16, VK16WM, VR512, VR512, |
| 125510 | /* VPCMPEQDrm */ |
| 125511 | VR128, VR128, i128mem, |
| 125512 | /* VPCMPEQDrr */ |
| 125513 | VR128, VR128, VR128, |
| 125514 | /* VPCMPEQQYrm */ |
| 125515 | VR256, VR256, i256mem, |
| 125516 | /* VPCMPEQQYrr */ |
| 125517 | VR256, VR256, VR256, |
| 125518 | /* VPCMPEQQZ128rm */ |
| 125519 | VK2, VR128X, i128mem, |
| 125520 | /* VPCMPEQQZ128rmb */ |
| 125521 | VK2, VR128X, i64mem, |
| 125522 | /* VPCMPEQQZ128rmbk */ |
| 125523 | VK2, VK2WM, VR128X, i64mem, |
| 125524 | /* VPCMPEQQZ128rmk */ |
| 125525 | VK2, VK2WM, VR128X, i128mem, |
| 125526 | /* VPCMPEQQZ128rr */ |
| 125527 | VK2, VR128X, VR128X, |
| 125528 | /* VPCMPEQQZ128rrk */ |
| 125529 | VK2, VK2WM, VR128X, VR128X, |
| 125530 | /* VPCMPEQQZ256rm */ |
| 125531 | VK4, VR256X, i256mem, |
| 125532 | /* VPCMPEQQZ256rmb */ |
| 125533 | VK4, VR256X, i64mem, |
| 125534 | /* VPCMPEQQZ256rmbk */ |
| 125535 | VK4, VK4WM, VR256X, i64mem, |
| 125536 | /* VPCMPEQQZ256rmk */ |
| 125537 | VK4, VK4WM, VR256X, i256mem, |
| 125538 | /* VPCMPEQQZ256rr */ |
| 125539 | VK4, VR256X, VR256X, |
| 125540 | /* VPCMPEQQZ256rrk */ |
| 125541 | VK4, VK4WM, VR256X, VR256X, |
| 125542 | /* VPCMPEQQZrm */ |
| 125543 | VK8, VR512, i512mem, |
| 125544 | /* VPCMPEQQZrmb */ |
| 125545 | VK8, VR512, i64mem, |
| 125546 | /* VPCMPEQQZrmbk */ |
| 125547 | VK8, VK8WM, VR512, i64mem, |
| 125548 | /* VPCMPEQQZrmk */ |
| 125549 | VK8, VK8WM, VR512, i512mem, |
| 125550 | /* VPCMPEQQZrr */ |
| 125551 | VK8, VR512, VR512, |
| 125552 | /* VPCMPEQQZrrk */ |
| 125553 | VK8, VK8WM, VR512, VR512, |
| 125554 | /* VPCMPEQQrm */ |
| 125555 | VR128, VR128, i128mem, |
| 125556 | /* VPCMPEQQrr */ |
| 125557 | VR128, VR128, VR128, |
| 125558 | /* VPCMPEQWYrm */ |
| 125559 | VR256, VR256, i256mem, |
| 125560 | /* VPCMPEQWYrr */ |
| 125561 | VR256, VR256, VR256, |
| 125562 | /* VPCMPEQWZ128rm */ |
| 125563 | VK8, VR128X, i128mem, |
| 125564 | /* VPCMPEQWZ128rmk */ |
| 125565 | VK8, VK8WM, VR128X, i128mem, |
| 125566 | /* VPCMPEQWZ128rr */ |
| 125567 | VK8, VR128X, VR128X, |
| 125568 | /* VPCMPEQWZ128rrk */ |
| 125569 | VK8, VK8WM, VR128X, VR128X, |
| 125570 | /* VPCMPEQWZ256rm */ |
| 125571 | VK16, VR256X, i256mem, |
| 125572 | /* VPCMPEQWZ256rmk */ |
| 125573 | VK16, VK16WM, VR256X, i256mem, |
| 125574 | /* VPCMPEQWZ256rr */ |
| 125575 | VK16, VR256X, VR256X, |
| 125576 | /* VPCMPEQWZ256rrk */ |
| 125577 | VK16, VK16WM, VR256X, VR256X, |
| 125578 | /* VPCMPEQWZrm */ |
| 125579 | VK32, VR512, i512mem, |
| 125580 | /* VPCMPEQWZrmk */ |
| 125581 | VK32, VK32WM, VR512, i512mem, |
| 125582 | /* VPCMPEQWZrr */ |
| 125583 | VK32, VR512, VR512, |
| 125584 | /* VPCMPEQWZrrk */ |
| 125585 | VK32, VK32WM, VR512, VR512, |
| 125586 | /* VPCMPEQWrm */ |
| 125587 | VR128, VR128, i128mem, |
| 125588 | /* VPCMPEQWrr */ |
| 125589 | VR128, VR128, VR128, |
| 125590 | /* VPCMPESTRIrmi */ |
| 125591 | VR128, i128mem, u8imm, |
| 125592 | /* VPCMPESTRIrri */ |
| 125593 | VR128, VR128, u8imm, |
| 125594 | /* VPCMPESTRMrmi */ |
| 125595 | VR128, i128mem, u8imm, |
| 125596 | /* VPCMPESTRMrri */ |
| 125597 | VR128, VR128, u8imm, |
| 125598 | /* VPCMPGTBYrm */ |
| 125599 | VR256, VR256, i256mem, |
| 125600 | /* VPCMPGTBYrr */ |
| 125601 | VR256, VR256, VR256, |
| 125602 | /* VPCMPGTBZ128rm */ |
| 125603 | VK16, VR128X, i128mem, |
| 125604 | /* VPCMPGTBZ128rmk */ |
| 125605 | VK16, VK16WM, VR128X, i128mem, |
| 125606 | /* VPCMPGTBZ128rr */ |
| 125607 | VK16, VR128X, VR128X, |
| 125608 | /* VPCMPGTBZ128rrk */ |
| 125609 | VK16, VK16WM, VR128X, VR128X, |
| 125610 | /* VPCMPGTBZ256rm */ |
| 125611 | VK32, VR256X, i256mem, |
| 125612 | /* VPCMPGTBZ256rmk */ |
| 125613 | VK32, VK32WM, VR256X, i256mem, |
| 125614 | /* VPCMPGTBZ256rr */ |
| 125615 | VK32, VR256X, VR256X, |
| 125616 | /* VPCMPGTBZ256rrk */ |
| 125617 | VK32, VK32WM, VR256X, VR256X, |
| 125618 | /* VPCMPGTBZrm */ |
| 125619 | VK64, VR512, i512mem, |
| 125620 | /* VPCMPGTBZrmk */ |
| 125621 | VK64, VK64WM, VR512, i512mem, |
| 125622 | /* VPCMPGTBZrr */ |
| 125623 | VK64, VR512, VR512, |
| 125624 | /* VPCMPGTBZrrk */ |
| 125625 | VK64, VK64WM, VR512, VR512, |
| 125626 | /* VPCMPGTBrm */ |
| 125627 | VR128, VR128, i128mem, |
| 125628 | /* VPCMPGTBrr */ |
| 125629 | VR128, VR128, VR128, |
| 125630 | /* VPCMPGTDYrm */ |
| 125631 | VR256, VR256, i256mem, |
| 125632 | /* VPCMPGTDYrr */ |
| 125633 | VR256, VR256, VR256, |
| 125634 | /* VPCMPGTDZ128rm */ |
| 125635 | VK4, VR128X, i128mem, |
| 125636 | /* VPCMPGTDZ128rmb */ |
| 125637 | VK4, VR128X, i32mem, |
| 125638 | /* VPCMPGTDZ128rmbk */ |
| 125639 | VK4, VK4WM, VR128X, i32mem, |
| 125640 | /* VPCMPGTDZ128rmk */ |
| 125641 | VK4, VK4WM, VR128X, i128mem, |
| 125642 | /* VPCMPGTDZ128rr */ |
| 125643 | VK4, VR128X, VR128X, |
| 125644 | /* VPCMPGTDZ128rrk */ |
| 125645 | VK4, VK4WM, VR128X, VR128X, |
| 125646 | /* VPCMPGTDZ256rm */ |
| 125647 | VK8, VR256X, i256mem, |
| 125648 | /* VPCMPGTDZ256rmb */ |
| 125649 | VK8, VR256X, i32mem, |
| 125650 | /* VPCMPGTDZ256rmbk */ |
| 125651 | VK8, VK8WM, VR256X, i32mem, |
| 125652 | /* VPCMPGTDZ256rmk */ |
| 125653 | VK8, VK8WM, VR256X, i256mem, |
| 125654 | /* VPCMPGTDZ256rr */ |
| 125655 | VK8, VR256X, VR256X, |
| 125656 | /* VPCMPGTDZ256rrk */ |
| 125657 | VK8, VK8WM, VR256X, VR256X, |
| 125658 | /* VPCMPGTDZrm */ |
| 125659 | VK16, VR512, i512mem, |
| 125660 | /* VPCMPGTDZrmb */ |
| 125661 | VK16, VR512, i32mem, |
| 125662 | /* VPCMPGTDZrmbk */ |
| 125663 | VK16, VK16WM, VR512, i32mem, |
| 125664 | /* VPCMPGTDZrmk */ |
| 125665 | VK16, VK16WM, VR512, i512mem, |
| 125666 | /* VPCMPGTDZrr */ |
| 125667 | VK16, VR512, VR512, |
| 125668 | /* VPCMPGTDZrrk */ |
| 125669 | VK16, VK16WM, VR512, VR512, |
| 125670 | /* VPCMPGTDrm */ |
| 125671 | VR128, VR128, i128mem, |
| 125672 | /* VPCMPGTDrr */ |
| 125673 | VR128, VR128, VR128, |
| 125674 | /* VPCMPGTQYrm */ |
| 125675 | VR256, VR256, i256mem, |
| 125676 | /* VPCMPGTQYrr */ |
| 125677 | VR256, VR256, VR256, |
| 125678 | /* VPCMPGTQZ128rm */ |
| 125679 | VK2, VR128X, i128mem, |
| 125680 | /* VPCMPGTQZ128rmb */ |
| 125681 | VK2, VR128X, i64mem, |
| 125682 | /* VPCMPGTQZ128rmbk */ |
| 125683 | VK2, VK2WM, VR128X, i64mem, |
| 125684 | /* VPCMPGTQZ128rmk */ |
| 125685 | VK2, VK2WM, VR128X, i128mem, |
| 125686 | /* VPCMPGTQZ128rr */ |
| 125687 | VK2, VR128X, VR128X, |
| 125688 | /* VPCMPGTQZ128rrk */ |
| 125689 | VK2, VK2WM, VR128X, VR128X, |
| 125690 | /* VPCMPGTQZ256rm */ |
| 125691 | VK4, VR256X, i256mem, |
| 125692 | /* VPCMPGTQZ256rmb */ |
| 125693 | VK4, VR256X, i64mem, |
| 125694 | /* VPCMPGTQZ256rmbk */ |
| 125695 | VK4, VK4WM, VR256X, i64mem, |
| 125696 | /* VPCMPGTQZ256rmk */ |
| 125697 | VK4, VK4WM, VR256X, i256mem, |
| 125698 | /* VPCMPGTQZ256rr */ |
| 125699 | VK4, VR256X, VR256X, |
| 125700 | /* VPCMPGTQZ256rrk */ |
| 125701 | VK4, VK4WM, VR256X, VR256X, |
| 125702 | /* VPCMPGTQZrm */ |
| 125703 | VK8, VR512, i512mem, |
| 125704 | /* VPCMPGTQZrmb */ |
| 125705 | VK8, VR512, i64mem, |
| 125706 | /* VPCMPGTQZrmbk */ |
| 125707 | VK8, VK8WM, VR512, i64mem, |
| 125708 | /* VPCMPGTQZrmk */ |
| 125709 | VK8, VK8WM, VR512, i512mem, |
| 125710 | /* VPCMPGTQZrr */ |
| 125711 | VK8, VR512, VR512, |
| 125712 | /* VPCMPGTQZrrk */ |
| 125713 | VK8, VK8WM, VR512, VR512, |
| 125714 | /* VPCMPGTQrm */ |
| 125715 | VR128, VR128, i128mem, |
| 125716 | /* VPCMPGTQrr */ |
| 125717 | VR128, VR128, VR128, |
| 125718 | /* VPCMPGTWYrm */ |
| 125719 | VR256, VR256, i256mem, |
| 125720 | /* VPCMPGTWYrr */ |
| 125721 | VR256, VR256, VR256, |
| 125722 | /* VPCMPGTWZ128rm */ |
| 125723 | VK8, VR128X, i128mem, |
| 125724 | /* VPCMPGTWZ128rmk */ |
| 125725 | VK8, VK8WM, VR128X, i128mem, |
| 125726 | /* VPCMPGTWZ128rr */ |
| 125727 | VK8, VR128X, VR128X, |
| 125728 | /* VPCMPGTWZ128rrk */ |
| 125729 | VK8, VK8WM, VR128X, VR128X, |
| 125730 | /* VPCMPGTWZ256rm */ |
| 125731 | VK16, VR256X, i256mem, |
| 125732 | /* VPCMPGTWZ256rmk */ |
| 125733 | VK16, VK16WM, VR256X, i256mem, |
| 125734 | /* VPCMPGTWZ256rr */ |
| 125735 | VK16, VR256X, VR256X, |
| 125736 | /* VPCMPGTWZ256rrk */ |
| 125737 | VK16, VK16WM, VR256X, VR256X, |
| 125738 | /* VPCMPGTWZrm */ |
| 125739 | VK32, VR512, i512mem, |
| 125740 | /* VPCMPGTWZrmk */ |
| 125741 | VK32, VK32WM, VR512, i512mem, |
| 125742 | /* VPCMPGTWZrr */ |
| 125743 | VK32, VR512, VR512, |
| 125744 | /* VPCMPGTWZrrk */ |
| 125745 | VK32, VK32WM, VR512, VR512, |
| 125746 | /* VPCMPGTWrm */ |
| 125747 | VR128, VR128, i128mem, |
| 125748 | /* VPCMPGTWrr */ |
| 125749 | VR128, VR128, VR128, |
| 125750 | /* VPCMPISTRIrmi */ |
| 125751 | VR128, i128mem, u8imm, |
| 125752 | /* VPCMPISTRIrri */ |
| 125753 | VR128, VR128, u8imm, |
| 125754 | /* VPCMPISTRMrmi */ |
| 125755 | VR128, i128mem, u8imm, |
| 125756 | /* VPCMPISTRMrri */ |
| 125757 | VR128, VR128, u8imm, |
| 125758 | /* VPCMPQZ128rmbi */ |
| 125759 | VK2, VR128X, i64mem, u8imm, |
| 125760 | /* VPCMPQZ128rmbik */ |
| 125761 | VK2, VK2WM, VR128X, i64mem, u8imm, |
| 125762 | /* VPCMPQZ128rmi */ |
| 125763 | VK2, VR128X, i128mem, u8imm, |
| 125764 | /* VPCMPQZ128rmik */ |
| 125765 | VK2, VK2WM, VR128X, i128mem, u8imm, |
| 125766 | /* VPCMPQZ128rri */ |
| 125767 | VK2, VR128X, VR128X, u8imm, |
| 125768 | /* VPCMPQZ128rrik */ |
| 125769 | VK2, VK2WM, VR128X, VR128X, u8imm, |
| 125770 | /* VPCMPQZ256rmbi */ |
| 125771 | VK4, VR256X, i64mem, u8imm, |
| 125772 | /* VPCMPQZ256rmbik */ |
| 125773 | VK4, VK4WM, VR256X, i64mem, u8imm, |
| 125774 | /* VPCMPQZ256rmi */ |
| 125775 | VK4, VR256X, i256mem, u8imm, |
| 125776 | /* VPCMPQZ256rmik */ |
| 125777 | VK4, VK4WM, VR256X, i256mem, u8imm, |
| 125778 | /* VPCMPQZ256rri */ |
| 125779 | VK4, VR256X, VR256X, u8imm, |
| 125780 | /* VPCMPQZ256rrik */ |
| 125781 | VK4, VK4WM, VR256X, VR256X, u8imm, |
| 125782 | /* VPCMPQZrmbi */ |
| 125783 | VK8, VR512, i64mem, u8imm, |
| 125784 | /* VPCMPQZrmbik */ |
| 125785 | VK8, VK8WM, VR512, i64mem, u8imm, |
| 125786 | /* VPCMPQZrmi */ |
| 125787 | VK8, VR512, i512mem, u8imm, |
| 125788 | /* VPCMPQZrmik */ |
| 125789 | VK8, VK8WM, VR512, i512mem, u8imm, |
| 125790 | /* VPCMPQZrri */ |
| 125791 | VK8, VR512, VR512, u8imm, |
| 125792 | /* VPCMPQZrrik */ |
| 125793 | VK8, VK8WM, VR512, VR512, u8imm, |
| 125794 | /* VPCMPUBZ128rmi */ |
| 125795 | VK16, VR128X, i128mem, u8imm, |
| 125796 | /* VPCMPUBZ128rmik */ |
| 125797 | VK16, VK16WM, VR128X, i128mem, u8imm, |
| 125798 | /* VPCMPUBZ128rri */ |
| 125799 | VK16, VR128X, VR128X, u8imm, |
| 125800 | /* VPCMPUBZ128rrik */ |
| 125801 | VK16, VK16WM, VR128X, VR128X, u8imm, |
| 125802 | /* VPCMPUBZ256rmi */ |
| 125803 | VK32, VR256X, i256mem, u8imm, |
| 125804 | /* VPCMPUBZ256rmik */ |
| 125805 | VK32, VK32WM, VR256X, i256mem, u8imm, |
| 125806 | /* VPCMPUBZ256rri */ |
| 125807 | VK32, VR256X, VR256X, u8imm, |
| 125808 | /* VPCMPUBZ256rrik */ |
| 125809 | VK32, VK32WM, VR256X, VR256X, u8imm, |
| 125810 | /* VPCMPUBZrmi */ |
| 125811 | VK64, VR512, i512mem, u8imm, |
| 125812 | /* VPCMPUBZrmik */ |
| 125813 | VK64, VK64WM, VR512, i512mem, u8imm, |
| 125814 | /* VPCMPUBZrri */ |
| 125815 | VK64, VR512, VR512, u8imm, |
| 125816 | /* VPCMPUBZrrik */ |
| 125817 | VK64, VK64WM, VR512, VR512, u8imm, |
| 125818 | /* VPCMPUDZ128rmbi */ |
| 125819 | VK4, VR128X, i32mem, u8imm, |
| 125820 | /* VPCMPUDZ128rmbik */ |
| 125821 | VK4, VK4WM, VR128X, i32mem, u8imm, |
| 125822 | /* VPCMPUDZ128rmi */ |
| 125823 | VK4, VR128X, i128mem, u8imm, |
| 125824 | /* VPCMPUDZ128rmik */ |
| 125825 | VK4, VK4WM, VR128X, i128mem, u8imm, |
| 125826 | /* VPCMPUDZ128rri */ |
| 125827 | VK4, VR128X, VR128X, u8imm, |
| 125828 | /* VPCMPUDZ128rrik */ |
| 125829 | VK4, VK4WM, VR128X, VR128X, u8imm, |
| 125830 | /* VPCMPUDZ256rmbi */ |
| 125831 | VK8, VR256X, i32mem, u8imm, |
| 125832 | /* VPCMPUDZ256rmbik */ |
| 125833 | VK8, VK8WM, VR256X, i32mem, u8imm, |
| 125834 | /* VPCMPUDZ256rmi */ |
| 125835 | VK8, VR256X, i256mem, u8imm, |
| 125836 | /* VPCMPUDZ256rmik */ |
| 125837 | VK8, VK8WM, VR256X, i256mem, u8imm, |
| 125838 | /* VPCMPUDZ256rri */ |
| 125839 | VK8, VR256X, VR256X, u8imm, |
| 125840 | /* VPCMPUDZ256rrik */ |
| 125841 | VK8, VK8WM, VR256X, VR256X, u8imm, |
| 125842 | /* VPCMPUDZrmbi */ |
| 125843 | VK16, VR512, i32mem, u8imm, |
| 125844 | /* VPCMPUDZrmbik */ |
| 125845 | VK16, VK16WM, VR512, i32mem, u8imm, |
| 125846 | /* VPCMPUDZrmi */ |
| 125847 | VK16, VR512, i512mem, u8imm, |
| 125848 | /* VPCMPUDZrmik */ |
| 125849 | VK16, VK16WM, VR512, i512mem, u8imm, |
| 125850 | /* VPCMPUDZrri */ |
| 125851 | VK16, VR512, VR512, u8imm, |
| 125852 | /* VPCMPUDZrrik */ |
| 125853 | VK16, VK16WM, VR512, VR512, u8imm, |
| 125854 | /* VPCMPUQZ128rmbi */ |
| 125855 | VK2, VR128X, i64mem, u8imm, |
| 125856 | /* VPCMPUQZ128rmbik */ |
| 125857 | VK2, VK2WM, VR128X, i64mem, u8imm, |
| 125858 | /* VPCMPUQZ128rmi */ |
| 125859 | VK2, VR128X, i128mem, u8imm, |
| 125860 | /* VPCMPUQZ128rmik */ |
| 125861 | VK2, VK2WM, VR128X, i128mem, u8imm, |
| 125862 | /* VPCMPUQZ128rri */ |
| 125863 | VK2, VR128X, VR128X, u8imm, |
| 125864 | /* VPCMPUQZ128rrik */ |
| 125865 | VK2, VK2WM, VR128X, VR128X, u8imm, |
| 125866 | /* VPCMPUQZ256rmbi */ |
| 125867 | VK4, VR256X, i64mem, u8imm, |
| 125868 | /* VPCMPUQZ256rmbik */ |
| 125869 | VK4, VK4WM, VR256X, i64mem, u8imm, |
| 125870 | /* VPCMPUQZ256rmi */ |
| 125871 | VK4, VR256X, i256mem, u8imm, |
| 125872 | /* VPCMPUQZ256rmik */ |
| 125873 | VK4, VK4WM, VR256X, i256mem, u8imm, |
| 125874 | /* VPCMPUQZ256rri */ |
| 125875 | VK4, VR256X, VR256X, u8imm, |
| 125876 | /* VPCMPUQZ256rrik */ |
| 125877 | VK4, VK4WM, VR256X, VR256X, u8imm, |
| 125878 | /* VPCMPUQZrmbi */ |
| 125879 | VK8, VR512, i64mem, u8imm, |
| 125880 | /* VPCMPUQZrmbik */ |
| 125881 | VK8, VK8WM, VR512, i64mem, u8imm, |
| 125882 | /* VPCMPUQZrmi */ |
| 125883 | VK8, VR512, i512mem, u8imm, |
| 125884 | /* VPCMPUQZrmik */ |
| 125885 | VK8, VK8WM, VR512, i512mem, u8imm, |
| 125886 | /* VPCMPUQZrri */ |
| 125887 | VK8, VR512, VR512, u8imm, |
| 125888 | /* VPCMPUQZrrik */ |
| 125889 | VK8, VK8WM, VR512, VR512, u8imm, |
| 125890 | /* VPCMPUWZ128rmi */ |
| 125891 | VK8, VR128X, i128mem, u8imm, |
| 125892 | /* VPCMPUWZ128rmik */ |
| 125893 | VK8, VK8WM, VR128X, i128mem, u8imm, |
| 125894 | /* VPCMPUWZ128rri */ |
| 125895 | VK8, VR128X, VR128X, u8imm, |
| 125896 | /* VPCMPUWZ128rrik */ |
| 125897 | VK8, VK8WM, VR128X, VR128X, u8imm, |
| 125898 | /* VPCMPUWZ256rmi */ |
| 125899 | VK16, VR256X, i256mem, u8imm, |
| 125900 | /* VPCMPUWZ256rmik */ |
| 125901 | VK16, VK16WM, VR256X, i256mem, u8imm, |
| 125902 | /* VPCMPUWZ256rri */ |
| 125903 | VK16, VR256X, VR256X, u8imm, |
| 125904 | /* VPCMPUWZ256rrik */ |
| 125905 | VK16, VK16WM, VR256X, VR256X, u8imm, |
| 125906 | /* VPCMPUWZrmi */ |
| 125907 | VK32, VR512, i512mem, u8imm, |
| 125908 | /* VPCMPUWZrmik */ |
| 125909 | VK32, VK32WM, VR512, i512mem, u8imm, |
| 125910 | /* VPCMPUWZrri */ |
| 125911 | VK32, VR512, VR512, u8imm, |
| 125912 | /* VPCMPUWZrrik */ |
| 125913 | VK32, VK32WM, VR512, VR512, u8imm, |
| 125914 | /* VPCMPWZ128rmi */ |
| 125915 | VK8, VR128X, i128mem, u8imm, |
| 125916 | /* VPCMPWZ128rmik */ |
| 125917 | VK8, VK8WM, VR128X, i128mem, u8imm, |
| 125918 | /* VPCMPWZ128rri */ |
| 125919 | VK8, VR128X, VR128X, u8imm, |
| 125920 | /* VPCMPWZ128rrik */ |
| 125921 | VK8, VK8WM, VR128X, VR128X, u8imm, |
| 125922 | /* VPCMPWZ256rmi */ |
| 125923 | VK16, VR256X, i256mem, u8imm, |
| 125924 | /* VPCMPWZ256rmik */ |
| 125925 | VK16, VK16WM, VR256X, i256mem, u8imm, |
| 125926 | /* VPCMPWZ256rri */ |
| 125927 | VK16, VR256X, VR256X, u8imm, |
| 125928 | /* VPCMPWZ256rrik */ |
| 125929 | VK16, VK16WM, VR256X, VR256X, u8imm, |
| 125930 | /* VPCMPWZrmi */ |
| 125931 | VK32, VR512, i512mem, u8imm, |
| 125932 | /* VPCMPWZrmik */ |
| 125933 | VK32, VK32WM, VR512, i512mem, u8imm, |
| 125934 | /* VPCMPWZrri */ |
| 125935 | VK32, VR512, VR512, u8imm, |
| 125936 | /* VPCMPWZrrik */ |
| 125937 | VK32, VK32WM, VR512, VR512, u8imm, |
| 125938 | /* VPCOMBmi */ |
| 125939 | VR128, VR128, i128mem, u8imm, |
| 125940 | /* VPCOMBri */ |
| 125941 | VR128, VR128, VR128, u8imm, |
| 125942 | /* VPCOMDmi */ |
| 125943 | VR128, VR128, i128mem, u8imm, |
| 125944 | /* VPCOMDri */ |
| 125945 | VR128, VR128, VR128, u8imm, |
| 125946 | /* VPCOMPRESSBZ128mr */ |
| 125947 | i128mem, VR128X, |
| 125948 | /* VPCOMPRESSBZ128mrk */ |
| 125949 | i128mem, VK16WM, VR128X, |
| 125950 | /* VPCOMPRESSBZ128rr */ |
| 125951 | VR128X, VR128X, |
| 125952 | /* VPCOMPRESSBZ128rrk */ |
| 125953 | VR128X, VR128X, VK16WM, VR128X, |
| 125954 | /* VPCOMPRESSBZ128rrkz */ |
| 125955 | VR128X, VK16WM, VR128X, |
| 125956 | /* VPCOMPRESSBZ256mr */ |
| 125957 | i256mem, VR256X, |
| 125958 | /* VPCOMPRESSBZ256mrk */ |
| 125959 | i256mem, VK32WM, VR256X, |
| 125960 | /* VPCOMPRESSBZ256rr */ |
| 125961 | VR256X, VR256X, |
| 125962 | /* VPCOMPRESSBZ256rrk */ |
| 125963 | VR256X, VR256X, VK32WM, VR256X, |
| 125964 | /* VPCOMPRESSBZ256rrkz */ |
| 125965 | VR256X, VK32WM, VR256X, |
| 125966 | /* VPCOMPRESSBZmr */ |
| 125967 | i512mem, VR512, |
| 125968 | /* VPCOMPRESSBZmrk */ |
| 125969 | i512mem, VK64WM, VR512, |
| 125970 | /* VPCOMPRESSBZrr */ |
| 125971 | VR512, VR512, |
| 125972 | /* VPCOMPRESSBZrrk */ |
| 125973 | VR512, VR512, VK64WM, VR512, |
| 125974 | /* VPCOMPRESSBZrrkz */ |
| 125975 | VR512, VK64WM, VR512, |
| 125976 | /* VPCOMPRESSDZ128mr */ |
| 125977 | i128mem, VR128X, |
| 125978 | /* VPCOMPRESSDZ128mrk */ |
| 125979 | i128mem, VK4WM, VR128X, |
| 125980 | /* VPCOMPRESSDZ128rr */ |
| 125981 | VR128X, VR128X, |
| 125982 | /* VPCOMPRESSDZ128rrk */ |
| 125983 | VR128X, VR128X, VK4WM, VR128X, |
| 125984 | /* VPCOMPRESSDZ128rrkz */ |
| 125985 | VR128X, VK4WM, VR128X, |
| 125986 | /* VPCOMPRESSDZ256mr */ |
| 125987 | i256mem, VR256X, |
| 125988 | /* VPCOMPRESSDZ256mrk */ |
| 125989 | i256mem, VK8WM, VR256X, |
| 125990 | /* VPCOMPRESSDZ256rr */ |
| 125991 | VR256X, VR256X, |
| 125992 | /* VPCOMPRESSDZ256rrk */ |
| 125993 | VR256X, VR256X, VK8WM, VR256X, |
| 125994 | /* VPCOMPRESSDZ256rrkz */ |
| 125995 | VR256X, VK8WM, VR256X, |
| 125996 | /* VPCOMPRESSDZmr */ |
| 125997 | i512mem, VR512, |
| 125998 | /* VPCOMPRESSDZmrk */ |
| 125999 | i512mem, VK16WM, VR512, |
| 126000 | /* VPCOMPRESSDZrr */ |
| 126001 | VR512, VR512, |
| 126002 | /* VPCOMPRESSDZrrk */ |
| 126003 | VR512, VR512, VK16WM, VR512, |
| 126004 | /* VPCOMPRESSDZrrkz */ |
| 126005 | VR512, VK16WM, VR512, |
| 126006 | /* VPCOMPRESSQZ128mr */ |
| 126007 | i128mem, VR128X, |
| 126008 | /* VPCOMPRESSQZ128mrk */ |
| 126009 | i128mem, VK2WM, VR128X, |
| 126010 | /* VPCOMPRESSQZ128rr */ |
| 126011 | VR128X, VR128X, |
| 126012 | /* VPCOMPRESSQZ128rrk */ |
| 126013 | VR128X, VR128X, VK2WM, VR128X, |
| 126014 | /* VPCOMPRESSQZ128rrkz */ |
| 126015 | VR128X, VK2WM, VR128X, |
| 126016 | /* VPCOMPRESSQZ256mr */ |
| 126017 | i256mem, VR256X, |
| 126018 | /* VPCOMPRESSQZ256mrk */ |
| 126019 | i256mem, VK4WM, VR256X, |
| 126020 | /* VPCOMPRESSQZ256rr */ |
| 126021 | VR256X, VR256X, |
| 126022 | /* VPCOMPRESSQZ256rrk */ |
| 126023 | VR256X, VR256X, VK4WM, VR256X, |
| 126024 | /* VPCOMPRESSQZ256rrkz */ |
| 126025 | VR256X, VK4WM, VR256X, |
| 126026 | /* VPCOMPRESSQZmr */ |
| 126027 | i512mem, VR512, |
| 126028 | /* VPCOMPRESSQZmrk */ |
| 126029 | i512mem, VK8WM, VR512, |
| 126030 | /* VPCOMPRESSQZrr */ |
| 126031 | VR512, VR512, |
| 126032 | /* VPCOMPRESSQZrrk */ |
| 126033 | VR512, VR512, VK8WM, VR512, |
| 126034 | /* VPCOMPRESSQZrrkz */ |
| 126035 | VR512, VK8WM, VR512, |
| 126036 | /* VPCOMPRESSWZ128mr */ |
| 126037 | i128mem, VR128X, |
| 126038 | /* VPCOMPRESSWZ128mrk */ |
| 126039 | i128mem, VK8WM, VR128X, |
| 126040 | /* VPCOMPRESSWZ128rr */ |
| 126041 | VR128X, VR128X, |
| 126042 | /* VPCOMPRESSWZ128rrk */ |
| 126043 | VR128X, VR128X, VK8WM, VR128X, |
| 126044 | /* VPCOMPRESSWZ128rrkz */ |
| 126045 | VR128X, VK8WM, VR128X, |
| 126046 | /* VPCOMPRESSWZ256mr */ |
| 126047 | i256mem, VR256X, |
| 126048 | /* VPCOMPRESSWZ256mrk */ |
| 126049 | i256mem, VK16WM, VR256X, |
| 126050 | /* VPCOMPRESSWZ256rr */ |
| 126051 | VR256X, VR256X, |
| 126052 | /* VPCOMPRESSWZ256rrk */ |
| 126053 | VR256X, VR256X, VK16WM, VR256X, |
| 126054 | /* VPCOMPRESSWZ256rrkz */ |
| 126055 | VR256X, VK16WM, VR256X, |
| 126056 | /* VPCOMPRESSWZmr */ |
| 126057 | i512mem, VR512, |
| 126058 | /* VPCOMPRESSWZmrk */ |
| 126059 | i512mem, VK32WM, VR512, |
| 126060 | /* VPCOMPRESSWZrr */ |
| 126061 | VR512, VR512, |
| 126062 | /* VPCOMPRESSWZrrk */ |
| 126063 | VR512, VR512, VK32WM, VR512, |
| 126064 | /* VPCOMPRESSWZrrkz */ |
| 126065 | VR512, VK32WM, VR512, |
| 126066 | /* VPCOMQmi */ |
| 126067 | VR128, VR128, i128mem, u8imm, |
| 126068 | /* VPCOMQri */ |
| 126069 | VR128, VR128, VR128, u8imm, |
| 126070 | /* VPCOMUBmi */ |
| 126071 | VR128, VR128, i128mem, u8imm, |
| 126072 | /* VPCOMUBri */ |
| 126073 | VR128, VR128, VR128, u8imm, |
| 126074 | /* VPCOMUDmi */ |
| 126075 | VR128, VR128, i128mem, u8imm, |
| 126076 | /* VPCOMUDri */ |
| 126077 | VR128, VR128, VR128, u8imm, |
| 126078 | /* VPCOMUQmi */ |
| 126079 | VR128, VR128, i128mem, u8imm, |
| 126080 | /* VPCOMUQri */ |
| 126081 | VR128, VR128, VR128, u8imm, |
| 126082 | /* VPCOMUWmi */ |
| 126083 | VR128, VR128, i128mem, u8imm, |
| 126084 | /* VPCOMUWri */ |
| 126085 | VR128, VR128, VR128, u8imm, |
| 126086 | /* VPCOMWmi */ |
| 126087 | VR128, VR128, i128mem, u8imm, |
| 126088 | /* VPCOMWri */ |
| 126089 | VR128, VR128, VR128, u8imm, |
| 126090 | /* VPCONFLICTDZ128rm */ |
| 126091 | VR128X, i128mem, |
| 126092 | /* VPCONFLICTDZ128rmb */ |
| 126093 | VR128X, i32mem, |
| 126094 | /* VPCONFLICTDZ128rmbk */ |
| 126095 | VR128X, VR128X, VK4WM, i32mem, |
| 126096 | /* VPCONFLICTDZ128rmbkz */ |
| 126097 | VR128X, VK4WM, i32mem, |
| 126098 | /* VPCONFLICTDZ128rmk */ |
| 126099 | VR128X, VR128X, VK4WM, i128mem, |
| 126100 | /* VPCONFLICTDZ128rmkz */ |
| 126101 | VR128X, VK4WM, i128mem, |
| 126102 | /* VPCONFLICTDZ128rr */ |
| 126103 | VR128X, VR128X, |
| 126104 | /* VPCONFLICTDZ128rrk */ |
| 126105 | VR128X, VR128X, VK4WM, VR128X, |
| 126106 | /* VPCONFLICTDZ128rrkz */ |
| 126107 | VR128X, VK4WM, VR128X, |
| 126108 | /* VPCONFLICTDZ256rm */ |
| 126109 | VR256X, i256mem, |
| 126110 | /* VPCONFLICTDZ256rmb */ |
| 126111 | VR256X, i32mem, |
| 126112 | /* VPCONFLICTDZ256rmbk */ |
| 126113 | VR256X, VR256X, VK8WM, i32mem, |
| 126114 | /* VPCONFLICTDZ256rmbkz */ |
| 126115 | VR256X, VK8WM, i32mem, |
| 126116 | /* VPCONFLICTDZ256rmk */ |
| 126117 | VR256X, VR256X, VK8WM, i256mem, |
| 126118 | /* VPCONFLICTDZ256rmkz */ |
| 126119 | VR256X, VK8WM, i256mem, |
| 126120 | /* VPCONFLICTDZ256rr */ |
| 126121 | VR256X, VR256X, |
| 126122 | /* VPCONFLICTDZ256rrk */ |
| 126123 | VR256X, VR256X, VK8WM, VR256X, |
| 126124 | /* VPCONFLICTDZ256rrkz */ |
| 126125 | VR256X, VK8WM, VR256X, |
| 126126 | /* VPCONFLICTDZrm */ |
| 126127 | VR512, i512mem, |
| 126128 | /* VPCONFLICTDZrmb */ |
| 126129 | VR512, i32mem, |
| 126130 | /* VPCONFLICTDZrmbk */ |
| 126131 | VR512, VR512, VK16WM, i32mem, |
| 126132 | /* VPCONFLICTDZrmbkz */ |
| 126133 | VR512, VK16WM, i32mem, |
| 126134 | /* VPCONFLICTDZrmk */ |
| 126135 | VR512, VR512, VK16WM, i512mem, |
| 126136 | /* VPCONFLICTDZrmkz */ |
| 126137 | VR512, VK16WM, i512mem, |
| 126138 | /* VPCONFLICTDZrr */ |
| 126139 | VR512, VR512, |
| 126140 | /* VPCONFLICTDZrrk */ |
| 126141 | VR512, VR512, VK16WM, VR512, |
| 126142 | /* VPCONFLICTDZrrkz */ |
| 126143 | VR512, VK16WM, VR512, |
| 126144 | /* VPCONFLICTQZ128rm */ |
| 126145 | VR128X, i128mem, |
| 126146 | /* VPCONFLICTQZ128rmb */ |
| 126147 | VR128X, i64mem, |
| 126148 | /* VPCONFLICTQZ128rmbk */ |
| 126149 | VR128X, VR128X, VK2WM, i64mem, |
| 126150 | /* VPCONFLICTQZ128rmbkz */ |
| 126151 | VR128X, VK2WM, i64mem, |
| 126152 | /* VPCONFLICTQZ128rmk */ |
| 126153 | VR128X, VR128X, VK2WM, i128mem, |
| 126154 | /* VPCONFLICTQZ128rmkz */ |
| 126155 | VR128X, VK2WM, i128mem, |
| 126156 | /* VPCONFLICTQZ128rr */ |
| 126157 | VR128X, VR128X, |
| 126158 | /* VPCONFLICTQZ128rrk */ |
| 126159 | VR128X, VR128X, VK2WM, VR128X, |
| 126160 | /* VPCONFLICTQZ128rrkz */ |
| 126161 | VR128X, VK2WM, VR128X, |
| 126162 | /* VPCONFLICTQZ256rm */ |
| 126163 | VR256X, i256mem, |
| 126164 | /* VPCONFLICTQZ256rmb */ |
| 126165 | VR256X, i64mem, |
| 126166 | /* VPCONFLICTQZ256rmbk */ |
| 126167 | VR256X, VR256X, VK4WM, i64mem, |
| 126168 | /* VPCONFLICTQZ256rmbkz */ |
| 126169 | VR256X, VK4WM, i64mem, |
| 126170 | /* VPCONFLICTQZ256rmk */ |
| 126171 | VR256X, VR256X, VK4WM, i256mem, |
| 126172 | /* VPCONFLICTQZ256rmkz */ |
| 126173 | VR256X, VK4WM, i256mem, |
| 126174 | /* VPCONFLICTQZ256rr */ |
| 126175 | VR256X, VR256X, |
| 126176 | /* VPCONFLICTQZ256rrk */ |
| 126177 | VR256X, VR256X, VK4WM, VR256X, |
| 126178 | /* VPCONFLICTQZ256rrkz */ |
| 126179 | VR256X, VK4WM, VR256X, |
| 126180 | /* VPCONFLICTQZrm */ |
| 126181 | VR512, i512mem, |
| 126182 | /* VPCONFLICTQZrmb */ |
| 126183 | VR512, i64mem, |
| 126184 | /* VPCONFLICTQZrmbk */ |
| 126185 | VR512, VR512, VK8WM, i64mem, |
| 126186 | /* VPCONFLICTQZrmbkz */ |
| 126187 | VR512, VK8WM, i64mem, |
| 126188 | /* VPCONFLICTQZrmk */ |
| 126189 | VR512, VR512, VK8WM, i512mem, |
| 126190 | /* VPCONFLICTQZrmkz */ |
| 126191 | VR512, VK8WM, i512mem, |
| 126192 | /* VPCONFLICTQZrr */ |
| 126193 | VR512, VR512, |
| 126194 | /* VPCONFLICTQZrrk */ |
| 126195 | VR512, VR512, VK8WM, VR512, |
| 126196 | /* VPCONFLICTQZrrkz */ |
| 126197 | VR512, VK8WM, VR512, |
| 126198 | /* VPDPBSSDSYrm */ |
| 126199 | VR256, VR256, VR256, i256mem, |
| 126200 | /* VPDPBSSDSYrr */ |
| 126201 | VR256, VR256, VR256, VR256, |
| 126202 | /* VPDPBSSDSZ128m */ |
| 126203 | VR128X, VR128X, VR128X, i128mem, |
| 126204 | /* VPDPBSSDSZ128mb */ |
| 126205 | VR128X, VR128X, VR128X, i32mem, |
| 126206 | /* VPDPBSSDSZ128mbk */ |
| 126207 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126208 | /* VPDPBSSDSZ128mbkz */ |
| 126209 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126210 | /* VPDPBSSDSZ128mk */ |
| 126211 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126212 | /* VPDPBSSDSZ128mkz */ |
| 126213 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126214 | /* VPDPBSSDSZ128r */ |
| 126215 | VR128X, VR128X, VR128X, VR128X, |
| 126216 | /* VPDPBSSDSZ128rk */ |
| 126217 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126218 | /* VPDPBSSDSZ128rkz */ |
| 126219 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126220 | /* VPDPBSSDSZ256m */ |
| 126221 | VR256X, VR256X, VR256X, i256mem, |
| 126222 | /* VPDPBSSDSZ256mb */ |
| 126223 | VR256X, VR256X, VR256X, i32mem, |
| 126224 | /* VPDPBSSDSZ256mbk */ |
| 126225 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126226 | /* VPDPBSSDSZ256mbkz */ |
| 126227 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126228 | /* VPDPBSSDSZ256mk */ |
| 126229 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126230 | /* VPDPBSSDSZ256mkz */ |
| 126231 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126232 | /* VPDPBSSDSZ256r */ |
| 126233 | VR256X, VR256X, VR256X, VR256X, |
| 126234 | /* VPDPBSSDSZ256rk */ |
| 126235 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126236 | /* VPDPBSSDSZ256rkz */ |
| 126237 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126238 | /* VPDPBSSDSZm */ |
| 126239 | VR512, VR512, VR512, i512mem, |
| 126240 | /* VPDPBSSDSZmb */ |
| 126241 | VR512, VR512, VR512, i32mem, |
| 126242 | /* VPDPBSSDSZmbk */ |
| 126243 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126244 | /* VPDPBSSDSZmbkz */ |
| 126245 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126246 | /* VPDPBSSDSZmk */ |
| 126247 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126248 | /* VPDPBSSDSZmkz */ |
| 126249 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126250 | /* VPDPBSSDSZr */ |
| 126251 | VR512, VR512, VR512, VR512, |
| 126252 | /* VPDPBSSDSZrk */ |
| 126253 | VR512, VR512, VK16WM, VR512, VR512, |
| 126254 | /* VPDPBSSDSZrkz */ |
| 126255 | VR512, VR512, VK16WM, VR512, VR512, |
| 126256 | /* VPDPBSSDSrm */ |
| 126257 | VR128, VR128, VR128, i128mem, |
| 126258 | /* VPDPBSSDSrr */ |
| 126259 | VR128, VR128, VR128, VR128, |
| 126260 | /* VPDPBSSDYrm */ |
| 126261 | VR256, VR256, VR256, i256mem, |
| 126262 | /* VPDPBSSDYrr */ |
| 126263 | VR256, VR256, VR256, VR256, |
| 126264 | /* VPDPBSSDZ128m */ |
| 126265 | VR128X, VR128X, VR128X, i128mem, |
| 126266 | /* VPDPBSSDZ128mb */ |
| 126267 | VR128X, VR128X, VR128X, i32mem, |
| 126268 | /* VPDPBSSDZ128mbk */ |
| 126269 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126270 | /* VPDPBSSDZ128mbkz */ |
| 126271 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126272 | /* VPDPBSSDZ128mk */ |
| 126273 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126274 | /* VPDPBSSDZ128mkz */ |
| 126275 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126276 | /* VPDPBSSDZ128r */ |
| 126277 | VR128X, VR128X, VR128X, VR128X, |
| 126278 | /* VPDPBSSDZ128rk */ |
| 126279 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126280 | /* VPDPBSSDZ128rkz */ |
| 126281 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126282 | /* VPDPBSSDZ256m */ |
| 126283 | VR256X, VR256X, VR256X, i256mem, |
| 126284 | /* VPDPBSSDZ256mb */ |
| 126285 | VR256X, VR256X, VR256X, i32mem, |
| 126286 | /* VPDPBSSDZ256mbk */ |
| 126287 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126288 | /* VPDPBSSDZ256mbkz */ |
| 126289 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126290 | /* VPDPBSSDZ256mk */ |
| 126291 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126292 | /* VPDPBSSDZ256mkz */ |
| 126293 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126294 | /* VPDPBSSDZ256r */ |
| 126295 | VR256X, VR256X, VR256X, VR256X, |
| 126296 | /* VPDPBSSDZ256rk */ |
| 126297 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126298 | /* VPDPBSSDZ256rkz */ |
| 126299 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126300 | /* VPDPBSSDZm */ |
| 126301 | VR512, VR512, VR512, i512mem, |
| 126302 | /* VPDPBSSDZmb */ |
| 126303 | VR512, VR512, VR512, i32mem, |
| 126304 | /* VPDPBSSDZmbk */ |
| 126305 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126306 | /* VPDPBSSDZmbkz */ |
| 126307 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126308 | /* VPDPBSSDZmk */ |
| 126309 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126310 | /* VPDPBSSDZmkz */ |
| 126311 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126312 | /* VPDPBSSDZr */ |
| 126313 | VR512, VR512, VR512, VR512, |
| 126314 | /* VPDPBSSDZrk */ |
| 126315 | VR512, VR512, VK16WM, VR512, VR512, |
| 126316 | /* VPDPBSSDZrkz */ |
| 126317 | VR512, VR512, VK16WM, VR512, VR512, |
| 126318 | /* VPDPBSSDrm */ |
| 126319 | VR128, VR128, VR128, i128mem, |
| 126320 | /* VPDPBSSDrr */ |
| 126321 | VR128, VR128, VR128, VR128, |
| 126322 | /* VPDPBSUDSYrm */ |
| 126323 | VR256, VR256, VR256, i256mem, |
| 126324 | /* VPDPBSUDSYrr */ |
| 126325 | VR256, VR256, VR256, VR256, |
| 126326 | /* VPDPBSUDSZ128m */ |
| 126327 | VR128X, VR128X, VR128X, i128mem, |
| 126328 | /* VPDPBSUDSZ128mb */ |
| 126329 | VR128X, VR128X, VR128X, i32mem, |
| 126330 | /* VPDPBSUDSZ128mbk */ |
| 126331 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126332 | /* VPDPBSUDSZ128mbkz */ |
| 126333 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126334 | /* VPDPBSUDSZ128mk */ |
| 126335 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126336 | /* VPDPBSUDSZ128mkz */ |
| 126337 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126338 | /* VPDPBSUDSZ128r */ |
| 126339 | VR128X, VR128X, VR128X, VR128X, |
| 126340 | /* VPDPBSUDSZ128rk */ |
| 126341 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126342 | /* VPDPBSUDSZ128rkz */ |
| 126343 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126344 | /* VPDPBSUDSZ256m */ |
| 126345 | VR256X, VR256X, VR256X, i256mem, |
| 126346 | /* VPDPBSUDSZ256mb */ |
| 126347 | VR256X, VR256X, VR256X, i32mem, |
| 126348 | /* VPDPBSUDSZ256mbk */ |
| 126349 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126350 | /* VPDPBSUDSZ256mbkz */ |
| 126351 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126352 | /* VPDPBSUDSZ256mk */ |
| 126353 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126354 | /* VPDPBSUDSZ256mkz */ |
| 126355 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126356 | /* VPDPBSUDSZ256r */ |
| 126357 | VR256X, VR256X, VR256X, VR256X, |
| 126358 | /* VPDPBSUDSZ256rk */ |
| 126359 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126360 | /* VPDPBSUDSZ256rkz */ |
| 126361 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126362 | /* VPDPBSUDSZm */ |
| 126363 | VR512, VR512, VR512, i512mem, |
| 126364 | /* VPDPBSUDSZmb */ |
| 126365 | VR512, VR512, VR512, i32mem, |
| 126366 | /* VPDPBSUDSZmbk */ |
| 126367 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126368 | /* VPDPBSUDSZmbkz */ |
| 126369 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126370 | /* VPDPBSUDSZmk */ |
| 126371 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126372 | /* VPDPBSUDSZmkz */ |
| 126373 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126374 | /* VPDPBSUDSZr */ |
| 126375 | VR512, VR512, VR512, VR512, |
| 126376 | /* VPDPBSUDSZrk */ |
| 126377 | VR512, VR512, VK16WM, VR512, VR512, |
| 126378 | /* VPDPBSUDSZrkz */ |
| 126379 | VR512, VR512, VK16WM, VR512, VR512, |
| 126380 | /* VPDPBSUDSrm */ |
| 126381 | VR128, VR128, VR128, i128mem, |
| 126382 | /* VPDPBSUDSrr */ |
| 126383 | VR128, VR128, VR128, VR128, |
| 126384 | /* VPDPBSUDYrm */ |
| 126385 | VR256, VR256, VR256, i256mem, |
| 126386 | /* VPDPBSUDYrr */ |
| 126387 | VR256, VR256, VR256, VR256, |
| 126388 | /* VPDPBSUDZ128m */ |
| 126389 | VR128X, VR128X, VR128X, i128mem, |
| 126390 | /* VPDPBSUDZ128mb */ |
| 126391 | VR128X, VR128X, VR128X, i32mem, |
| 126392 | /* VPDPBSUDZ128mbk */ |
| 126393 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126394 | /* VPDPBSUDZ128mbkz */ |
| 126395 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126396 | /* VPDPBSUDZ128mk */ |
| 126397 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126398 | /* VPDPBSUDZ128mkz */ |
| 126399 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126400 | /* VPDPBSUDZ128r */ |
| 126401 | VR128X, VR128X, VR128X, VR128X, |
| 126402 | /* VPDPBSUDZ128rk */ |
| 126403 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126404 | /* VPDPBSUDZ128rkz */ |
| 126405 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126406 | /* VPDPBSUDZ256m */ |
| 126407 | VR256X, VR256X, VR256X, i256mem, |
| 126408 | /* VPDPBSUDZ256mb */ |
| 126409 | VR256X, VR256X, VR256X, i32mem, |
| 126410 | /* VPDPBSUDZ256mbk */ |
| 126411 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126412 | /* VPDPBSUDZ256mbkz */ |
| 126413 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126414 | /* VPDPBSUDZ256mk */ |
| 126415 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126416 | /* VPDPBSUDZ256mkz */ |
| 126417 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126418 | /* VPDPBSUDZ256r */ |
| 126419 | VR256X, VR256X, VR256X, VR256X, |
| 126420 | /* VPDPBSUDZ256rk */ |
| 126421 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126422 | /* VPDPBSUDZ256rkz */ |
| 126423 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126424 | /* VPDPBSUDZm */ |
| 126425 | VR512, VR512, VR512, i512mem, |
| 126426 | /* VPDPBSUDZmb */ |
| 126427 | VR512, VR512, VR512, i32mem, |
| 126428 | /* VPDPBSUDZmbk */ |
| 126429 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126430 | /* VPDPBSUDZmbkz */ |
| 126431 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126432 | /* VPDPBSUDZmk */ |
| 126433 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126434 | /* VPDPBSUDZmkz */ |
| 126435 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126436 | /* VPDPBSUDZr */ |
| 126437 | VR512, VR512, VR512, VR512, |
| 126438 | /* VPDPBSUDZrk */ |
| 126439 | VR512, VR512, VK16WM, VR512, VR512, |
| 126440 | /* VPDPBSUDZrkz */ |
| 126441 | VR512, VR512, VK16WM, VR512, VR512, |
| 126442 | /* VPDPBSUDrm */ |
| 126443 | VR128, VR128, VR128, i128mem, |
| 126444 | /* VPDPBSUDrr */ |
| 126445 | VR128, VR128, VR128, VR128, |
| 126446 | /* VPDPBUSDSYrm */ |
| 126447 | VR256, VR256, VR256, i256mem, |
| 126448 | /* VPDPBUSDSYrr */ |
| 126449 | VR256, VR256, VR256, VR256, |
| 126450 | /* VPDPBUSDSZ128m */ |
| 126451 | VR128X, VR128X, VR128X, i128mem, |
| 126452 | /* VPDPBUSDSZ128mb */ |
| 126453 | VR128X, VR128X, VR128X, i32mem, |
| 126454 | /* VPDPBUSDSZ128mbk */ |
| 126455 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126456 | /* VPDPBUSDSZ128mbkz */ |
| 126457 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126458 | /* VPDPBUSDSZ128mk */ |
| 126459 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126460 | /* VPDPBUSDSZ128mkz */ |
| 126461 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126462 | /* VPDPBUSDSZ128r */ |
| 126463 | VR128X, VR128X, VR128X, VR128X, |
| 126464 | /* VPDPBUSDSZ128rk */ |
| 126465 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126466 | /* VPDPBUSDSZ128rkz */ |
| 126467 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126468 | /* VPDPBUSDSZ256m */ |
| 126469 | VR256X, VR256X, VR256X, i256mem, |
| 126470 | /* VPDPBUSDSZ256mb */ |
| 126471 | VR256X, VR256X, VR256X, i32mem, |
| 126472 | /* VPDPBUSDSZ256mbk */ |
| 126473 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126474 | /* VPDPBUSDSZ256mbkz */ |
| 126475 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126476 | /* VPDPBUSDSZ256mk */ |
| 126477 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126478 | /* VPDPBUSDSZ256mkz */ |
| 126479 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126480 | /* VPDPBUSDSZ256r */ |
| 126481 | VR256X, VR256X, VR256X, VR256X, |
| 126482 | /* VPDPBUSDSZ256rk */ |
| 126483 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126484 | /* VPDPBUSDSZ256rkz */ |
| 126485 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126486 | /* VPDPBUSDSZm */ |
| 126487 | VR512, VR512, VR512, i512mem, |
| 126488 | /* VPDPBUSDSZmb */ |
| 126489 | VR512, VR512, VR512, i32mem, |
| 126490 | /* VPDPBUSDSZmbk */ |
| 126491 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126492 | /* VPDPBUSDSZmbkz */ |
| 126493 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126494 | /* VPDPBUSDSZmk */ |
| 126495 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126496 | /* VPDPBUSDSZmkz */ |
| 126497 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126498 | /* VPDPBUSDSZr */ |
| 126499 | VR512, VR512, VR512, VR512, |
| 126500 | /* VPDPBUSDSZrk */ |
| 126501 | VR512, VR512, VK16WM, VR512, VR512, |
| 126502 | /* VPDPBUSDSZrkz */ |
| 126503 | VR512, VR512, VK16WM, VR512, VR512, |
| 126504 | /* VPDPBUSDSrm */ |
| 126505 | VR128, VR128, VR128, i128mem, |
| 126506 | /* VPDPBUSDSrr */ |
| 126507 | VR128, VR128, VR128, VR128, |
| 126508 | /* VPDPBUSDYrm */ |
| 126509 | VR256, VR256, VR256, i256mem, |
| 126510 | /* VPDPBUSDYrr */ |
| 126511 | VR256, VR256, VR256, VR256, |
| 126512 | /* VPDPBUSDZ128m */ |
| 126513 | VR128X, VR128X, VR128X, i128mem, |
| 126514 | /* VPDPBUSDZ128mb */ |
| 126515 | VR128X, VR128X, VR128X, i32mem, |
| 126516 | /* VPDPBUSDZ128mbk */ |
| 126517 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126518 | /* VPDPBUSDZ128mbkz */ |
| 126519 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126520 | /* VPDPBUSDZ128mk */ |
| 126521 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126522 | /* VPDPBUSDZ128mkz */ |
| 126523 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126524 | /* VPDPBUSDZ128r */ |
| 126525 | VR128X, VR128X, VR128X, VR128X, |
| 126526 | /* VPDPBUSDZ128rk */ |
| 126527 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126528 | /* VPDPBUSDZ128rkz */ |
| 126529 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126530 | /* VPDPBUSDZ256m */ |
| 126531 | VR256X, VR256X, VR256X, i256mem, |
| 126532 | /* VPDPBUSDZ256mb */ |
| 126533 | VR256X, VR256X, VR256X, i32mem, |
| 126534 | /* VPDPBUSDZ256mbk */ |
| 126535 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126536 | /* VPDPBUSDZ256mbkz */ |
| 126537 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126538 | /* VPDPBUSDZ256mk */ |
| 126539 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126540 | /* VPDPBUSDZ256mkz */ |
| 126541 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126542 | /* VPDPBUSDZ256r */ |
| 126543 | VR256X, VR256X, VR256X, VR256X, |
| 126544 | /* VPDPBUSDZ256rk */ |
| 126545 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126546 | /* VPDPBUSDZ256rkz */ |
| 126547 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126548 | /* VPDPBUSDZm */ |
| 126549 | VR512, VR512, VR512, i512mem, |
| 126550 | /* VPDPBUSDZmb */ |
| 126551 | VR512, VR512, VR512, i32mem, |
| 126552 | /* VPDPBUSDZmbk */ |
| 126553 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126554 | /* VPDPBUSDZmbkz */ |
| 126555 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126556 | /* VPDPBUSDZmk */ |
| 126557 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126558 | /* VPDPBUSDZmkz */ |
| 126559 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126560 | /* VPDPBUSDZr */ |
| 126561 | VR512, VR512, VR512, VR512, |
| 126562 | /* VPDPBUSDZrk */ |
| 126563 | VR512, VR512, VK16WM, VR512, VR512, |
| 126564 | /* VPDPBUSDZrkz */ |
| 126565 | VR512, VR512, VK16WM, VR512, VR512, |
| 126566 | /* VPDPBUSDrm */ |
| 126567 | VR128, VR128, VR128, i128mem, |
| 126568 | /* VPDPBUSDrr */ |
| 126569 | VR128, VR128, VR128, VR128, |
| 126570 | /* VPDPBUUDSYrm */ |
| 126571 | VR256, VR256, VR256, i256mem, |
| 126572 | /* VPDPBUUDSYrr */ |
| 126573 | VR256, VR256, VR256, VR256, |
| 126574 | /* VPDPBUUDSZ128m */ |
| 126575 | VR128X, VR128X, VR128X, i128mem, |
| 126576 | /* VPDPBUUDSZ128mb */ |
| 126577 | VR128X, VR128X, VR128X, i32mem, |
| 126578 | /* VPDPBUUDSZ128mbk */ |
| 126579 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126580 | /* VPDPBUUDSZ128mbkz */ |
| 126581 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126582 | /* VPDPBUUDSZ128mk */ |
| 126583 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126584 | /* VPDPBUUDSZ128mkz */ |
| 126585 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126586 | /* VPDPBUUDSZ128r */ |
| 126587 | VR128X, VR128X, VR128X, VR128X, |
| 126588 | /* VPDPBUUDSZ128rk */ |
| 126589 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126590 | /* VPDPBUUDSZ128rkz */ |
| 126591 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126592 | /* VPDPBUUDSZ256m */ |
| 126593 | VR256X, VR256X, VR256X, i256mem, |
| 126594 | /* VPDPBUUDSZ256mb */ |
| 126595 | VR256X, VR256X, VR256X, i32mem, |
| 126596 | /* VPDPBUUDSZ256mbk */ |
| 126597 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126598 | /* VPDPBUUDSZ256mbkz */ |
| 126599 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126600 | /* VPDPBUUDSZ256mk */ |
| 126601 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126602 | /* VPDPBUUDSZ256mkz */ |
| 126603 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126604 | /* VPDPBUUDSZ256r */ |
| 126605 | VR256X, VR256X, VR256X, VR256X, |
| 126606 | /* VPDPBUUDSZ256rk */ |
| 126607 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126608 | /* VPDPBUUDSZ256rkz */ |
| 126609 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126610 | /* VPDPBUUDSZm */ |
| 126611 | VR512, VR512, VR512, i512mem, |
| 126612 | /* VPDPBUUDSZmb */ |
| 126613 | VR512, VR512, VR512, i32mem, |
| 126614 | /* VPDPBUUDSZmbk */ |
| 126615 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126616 | /* VPDPBUUDSZmbkz */ |
| 126617 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126618 | /* VPDPBUUDSZmk */ |
| 126619 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126620 | /* VPDPBUUDSZmkz */ |
| 126621 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126622 | /* VPDPBUUDSZr */ |
| 126623 | VR512, VR512, VR512, VR512, |
| 126624 | /* VPDPBUUDSZrk */ |
| 126625 | VR512, VR512, VK16WM, VR512, VR512, |
| 126626 | /* VPDPBUUDSZrkz */ |
| 126627 | VR512, VR512, VK16WM, VR512, VR512, |
| 126628 | /* VPDPBUUDSrm */ |
| 126629 | VR128, VR128, VR128, i128mem, |
| 126630 | /* VPDPBUUDSrr */ |
| 126631 | VR128, VR128, VR128, VR128, |
| 126632 | /* VPDPBUUDYrm */ |
| 126633 | VR256, VR256, VR256, i256mem, |
| 126634 | /* VPDPBUUDYrr */ |
| 126635 | VR256, VR256, VR256, VR256, |
| 126636 | /* VPDPBUUDZ128m */ |
| 126637 | VR128X, VR128X, VR128X, i128mem, |
| 126638 | /* VPDPBUUDZ128mb */ |
| 126639 | VR128X, VR128X, VR128X, i32mem, |
| 126640 | /* VPDPBUUDZ128mbk */ |
| 126641 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126642 | /* VPDPBUUDZ128mbkz */ |
| 126643 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126644 | /* VPDPBUUDZ128mk */ |
| 126645 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126646 | /* VPDPBUUDZ128mkz */ |
| 126647 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126648 | /* VPDPBUUDZ128r */ |
| 126649 | VR128X, VR128X, VR128X, VR128X, |
| 126650 | /* VPDPBUUDZ128rk */ |
| 126651 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126652 | /* VPDPBUUDZ128rkz */ |
| 126653 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126654 | /* VPDPBUUDZ256m */ |
| 126655 | VR256X, VR256X, VR256X, i256mem, |
| 126656 | /* VPDPBUUDZ256mb */ |
| 126657 | VR256X, VR256X, VR256X, i32mem, |
| 126658 | /* VPDPBUUDZ256mbk */ |
| 126659 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126660 | /* VPDPBUUDZ256mbkz */ |
| 126661 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126662 | /* VPDPBUUDZ256mk */ |
| 126663 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126664 | /* VPDPBUUDZ256mkz */ |
| 126665 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126666 | /* VPDPBUUDZ256r */ |
| 126667 | VR256X, VR256X, VR256X, VR256X, |
| 126668 | /* VPDPBUUDZ256rk */ |
| 126669 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126670 | /* VPDPBUUDZ256rkz */ |
| 126671 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126672 | /* VPDPBUUDZm */ |
| 126673 | VR512, VR512, VR512, i512mem, |
| 126674 | /* VPDPBUUDZmb */ |
| 126675 | VR512, VR512, VR512, i32mem, |
| 126676 | /* VPDPBUUDZmbk */ |
| 126677 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126678 | /* VPDPBUUDZmbkz */ |
| 126679 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126680 | /* VPDPBUUDZmk */ |
| 126681 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126682 | /* VPDPBUUDZmkz */ |
| 126683 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126684 | /* VPDPBUUDZr */ |
| 126685 | VR512, VR512, VR512, VR512, |
| 126686 | /* VPDPBUUDZrk */ |
| 126687 | VR512, VR512, VK16WM, VR512, VR512, |
| 126688 | /* VPDPBUUDZrkz */ |
| 126689 | VR512, VR512, VK16WM, VR512, VR512, |
| 126690 | /* VPDPBUUDrm */ |
| 126691 | VR128, VR128, VR128, i128mem, |
| 126692 | /* VPDPBUUDrr */ |
| 126693 | VR128, VR128, VR128, VR128, |
| 126694 | /* VPDPWSSDSYrm */ |
| 126695 | VR256, VR256, VR256, i256mem, |
| 126696 | /* VPDPWSSDSYrr */ |
| 126697 | VR256, VR256, VR256, VR256, |
| 126698 | /* VPDPWSSDSZ128m */ |
| 126699 | VR128X, VR128X, VR128X, i128mem, |
| 126700 | /* VPDPWSSDSZ128mb */ |
| 126701 | VR128X, VR128X, VR128X, i32mem, |
| 126702 | /* VPDPWSSDSZ128mbk */ |
| 126703 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126704 | /* VPDPWSSDSZ128mbkz */ |
| 126705 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126706 | /* VPDPWSSDSZ128mk */ |
| 126707 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126708 | /* VPDPWSSDSZ128mkz */ |
| 126709 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126710 | /* VPDPWSSDSZ128r */ |
| 126711 | VR128X, VR128X, VR128X, VR128X, |
| 126712 | /* VPDPWSSDSZ128rk */ |
| 126713 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126714 | /* VPDPWSSDSZ128rkz */ |
| 126715 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126716 | /* VPDPWSSDSZ256m */ |
| 126717 | VR256X, VR256X, VR256X, i256mem, |
| 126718 | /* VPDPWSSDSZ256mb */ |
| 126719 | VR256X, VR256X, VR256X, i32mem, |
| 126720 | /* VPDPWSSDSZ256mbk */ |
| 126721 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126722 | /* VPDPWSSDSZ256mbkz */ |
| 126723 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126724 | /* VPDPWSSDSZ256mk */ |
| 126725 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126726 | /* VPDPWSSDSZ256mkz */ |
| 126727 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126728 | /* VPDPWSSDSZ256r */ |
| 126729 | VR256X, VR256X, VR256X, VR256X, |
| 126730 | /* VPDPWSSDSZ256rk */ |
| 126731 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126732 | /* VPDPWSSDSZ256rkz */ |
| 126733 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126734 | /* VPDPWSSDSZm */ |
| 126735 | VR512, VR512, VR512, i512mem, |
| 126736 | /* VPDPWSSDSZmb */ |
| 126737 | VR512, VR512, VR512, i32mem, |
| 126738 | /* VPDPWSSDSZmbk */ |
| 126739 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126740 | /* VPDPWSSDSZmbkz */ |
| 126741 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126742 | /* VPDPWSSDSZmk */ |
| 126743 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126744 | /* VPDPWSSDSZmkz */ |
| 126745 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126746 | /* VPDPWSSDSZr */ |
| 126747 | VR512, VR512, VR512, VR512, |
| 126748 | /* VPDPWSSDSZrk */ |
| 126749 | VR512, VR512, VK16WM, VR512, VR512, |
| 126750 | /* VPDPWSSDSZrkz */ |
| 126751 | VR512, VR512, VK16WM, VR512, VR512, |
| 126752 | /* VPDPWSSDSrm */ |
| 126753 | VR128, VR128, VR128, i128mem, |
| 126754 | /* VPDPWSSDSrr */ |
| 126755 | VR128, VR128, VR128, VR128, |
| 126756 | /* VPDPWSSDYrm */ |
| 126757 | VR256, VR256, VR256, i256mem, |
| 126758 | /* VPDPWSSDYrr */ |
| 126759 | VR256, VR256, VR256, VR256, |
| 126760 | /* VPDPWSSDZ128m */ |
| 126761 | VR128X, VR128X, VR128X, i128mem, |
| 126762 | /* VPDPWSSDZ128mb */ |
| 126763 | VR128X, VR128X, VR128X, i32mem, |
| 126764 | /* VPDPWSSDZ128mbk */ |
| 126765 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126766 | /* VPDPWSSDZ128mbkz */ |
| 126767 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126768 | /* VPDPWSSDZ128mk */ |
| 126769 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126770 | /* VPDPWSSDZ128mkz */ |
| 126771 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126772 | /* VPDPWSSDZ128r */ |
| 126773 | VR128X, VR128X, VR128X, VR128X, |
| 126774 | /* VPDPWSSDZ128rk */ |
| 126775 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126776 | /* VPDPWSSDZ128rkz */ |
| 126777 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126778 | /* VPDPWSSDZ256m */ |
| 126779 | VR256X, VR256X, VR256X, i256mem, |
| 126780 | /* VPDPWSSDZ256mb */ |
| 126781 | VR256X, VR256X, VR256X, i32mem, |
| 126782 | /* VPDPWSSDZ256mbk */ |
| 126783 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126784 | /* VPDPWSSDZ256mbkz */ |
| 126785 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126786 | /* VPDPWSSDZ256mk */ |
| 126787 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126788 | /* VPDPWSSDZ256mkz */ |
| 126789 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126790 | /* VPDPWSSDZ256r */ |
| 126791 | VR256X, VR256X, VR256X, VR256X, |
| 126792 | /* VPDPWSSDZ256rk */ |
| 126793 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126794 | /* VPDPWSSDZ256rkz */ |
| 126795 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126796 | /* VPDPWSSDZm */ |
| 126797 | VR512, VR512, VR512, i512mem, |
| 126798 | /* VPDPWSSDZmb */ |
| 126799 | VR512, VR512, VR512, i32mem, |
| 126800 | /* VPDPWSSDZmbk */ |
| 126801 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126802 | /* VPDPWSSDZmbkz */ |
| 126803 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126804 | /* VPDPWSSDZmk */ |
| 126805 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126806 | /* VPDPWSSDZmkz */ |
| 126807 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126808 | /* VPDPWSSDZr */ |
| 126809 | VR512, VR512, VR512, VR512, |
| 126810 | /* VPDPWSSDZrk */ |
| 126811 | VR512, VR512, VK16WM, VR512, VR512, |
| 126812 | /* VPDPWSSDZrkz */ |
| 126813 | VR512, VR512, VK16WM, VR512, VR512, |
| 126814 | /* VPDPWSSDrm */ |
| 126815 | VR128, VR128, VR128, i128mem, |
| 126816 | /* VPDPWSSDrr */ |
| 126817 | VR128, VR128, VR128, VR128, |
| 126818 | /* VPDPWSUDSYrm */ |
| 126819 | VR256, VR256, VR256, i256mem, |
| 126820 | /* VPDPWSUDSYrr */ |
| 126821 | VR256, VR256, VR256, VR256, |
| 126822 | /* VPDPWSUDSZ128m */ |
| 126823 | VR128X, VR128X, VR128X, i128mem, |
| 126824 | /* VPDPWSUDSZ128mb */ |
| 126825 | VR128X, VR128X, VR128X, i32mem, |
| 126826 | /* VPDPWSUDSZ128mbk */ |
| 126827 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126828 | /* VPDPWSUDSZ128mbkz */ |
| 126829 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126830 | /* VPDPWSUDSZ128mk */ |
| 126831 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126832 | /* VPDPWSUDSZ128mkz */ |
| 126833 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126834 | /* VPDPWSUDSZ128r */ |
| 126835 | VR128X, VR128X, VR128X, VR128X, |
| 126836 | /* VPDPWSUDSZ128rk */ |
| 126837 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126838 | /* VPDPWSUDSZ128rkz */ |
| 126839 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126840 | /* VPDPWSUDSZ256m */ |
| 126841 | VR256X, VR256X, VR256X, i256mem, |
| 126842 | /* VPDPWSUDSZ256mb */ |
| 126843 | VR256X, VR256X, VR256X, i32mem, |
| 126844 | /* VPDPWSUDSZ256mbk */ |
| 126845 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126846 | /* VPDPWSUDSZ256mbkz */ |
| 126847 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126848 | /* VPDPWSUDSZ256mk */ |
| 126849 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126850 | /* VPDPWSUDSZ256mkz */ |
| 126851 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126852 | /* VPDPWSUDSZ256r */ |
| 126853 | VR256X, VR256X, VR256X, VR256X, |
| 126854 | /* VPDPWSUDSZ256rk */ |
| 126855 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126856 | /* VPDPWSUDSZ256rkz */ |
| 126857 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126858 | /* VPDPWSUDSZm */ |
| 126859 | VR512, VR512, VR512, i512mem, |
| 126860 | /* VPDPWSUDSZmb */ |
| 126861 | VR512, VR512, VR512, i32mem, |
| 126862 | /* VPDPWSUDSZmbk */ |
| 126863 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126864 | /* VPDPWSUDSZmbkz */ |
| 126865 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126866 | /* VPDPWSUDSZmk */ |
| 126867 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126868 | /* VPDPWSUDSZmkz */ |
| 126869 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126870 | /* VPDPWSUDSZr */ |
| 126871 | VR512, VR512, VR512, VR512, |
| 126872 | /* VPDPWSUDSZrk */ |
| 126873 | VR512, VR512, VK16WM, VR512, VR512, |
| 126874 | /* VPDPWSUDSZrkz */ |
| 126875 | VR512, VR512, VK16WM, VR512, VR512, |
| 126876 | /* VPDPWSUDSrm */ |
| 126877 | VR128, VR128, VR128, i128mem, |
| 126878 | /* VPDPWSUDSrr */ |
| 126879 | VR128, VR128, VR128, VR128, |
| 126880 | /* VPDPWSUDYrm */ |
| 126881 | VR256, VR256, VR256, i256mem, |
| 126882 | /* VPDPWSUDYrr */ |
| 126883 | VR256, VR256, VR256, VR256, |
| 126884 | /* VPDPWSUDZ128m */ |
| 126885 | VR128X, VR128X, VR128X, i128mem, |
| 126886 | /* VPDPWSUDZ128mb */ |
| 126887 | VR128X, VR128X, VR128X, i32mem, |
| 126888 | /* VPDPWSUDZ128mbk */ |
| 126889 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126890 | /* VPDPWSUDZ128mbkz */ |
| 126891 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126892 | /* VPDPWSUDZ128mk */ |
| 126893 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126894 | /* VPDPWSUDZ128mkz */ |
| 126895 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126896 | /* VPDPWSUDZ128r */ |
| 126897 | VR128X, VR128X, VR128X, VR128X, |
| 126898 | /* VPDPWSUDZ128rk */ |
| 126899 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126900 | /* VPDPWSUDZ128rkz */ |
| 126901 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126902 | /* VPDPWSUDZ256m */ |
| 126903 | VR256X, VR256X, VR256X, i256mem, |
| 126904 | /* VPDPWSUDZ256mb */ |
| 126905 | VR256X, VR256X, VR256X, i32mem, |
| 126906 | /* VPDPWSUDZ256mbk */ |
| 126907 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126908 | /* VPDPWSUDZ256mbkz */ |
| 126909 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126910 | /* VPDPWSUDZ256mk */ |
| 126911 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126912 | /* VPDPWSUDZ256mkz */ |
| 126913 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126914 | /* VPDPWSUDZ256r */ |
| 126915 | VR256X, VR256X, VR256X, VR256X, |
| 126916 | /* VPDPWSUDZ256rk */ |
| 126917 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126918 | /* VPDPWSUDZ256rkz */ |
| 126919 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126920 | /* VPDPWSUDZm */ |
| 126921 | VR512, VR512, VR512, i512mem, |
| 126922 | /* VPDPWSUDZmb */ |
| 126923 | VR512, VR512, VR512, i32mem, |
| 126924 | /* VPDPWSUDZmbk */ |
| 126925 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126926 | /* VPDPWSUDZmbkz */ |
| 126927 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126928 | /* VPDPWSUDZmk */ |
| 126929 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126930 | /* VPDPWSUDZmkz */ |
| 126931 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126932 | /* VPDPWSUDZr */ |
| 126933 | VR512, VR512, VR512, VR512, |
| 126934 | /* VPDPWSUDZrk */ |
| 126935 | VR512, VR512, VK16WM, VR512, VR512, |
| 126936 | /* VPDPWSUDZrkz */ |
| 126937 | VR512, VR512, VK16WM, VR512, VR512, |
| 126938 | /* VPDPWSUDrm */ |
| 126939 | VR128, VR128, VR128, i128mem, |
| 126940 | /* VPDPWSUDrr */ |
| 126941 | VR128, VR128, VR128, VR128, |
| 126942 | /* VPDPWUSDSYrm */ |
| 126943 | VR256, VR256, VR256, i256mem, |
| 126944 | /* VPDPWUSDSYrr */ |
| 126945 | VR256, VR256, VR256, VR256, |
| 126946 | /* VPDPWUSDSZ128m */ |
| 126947 | VR128X, VR128X, VR128X, i128mem, |
| 126948 | /* VPDPWUSDSZ128mb */ |
| 126949 | VR128X, VR128X, VR128X, i32mem, |
| 126950 | /* VPDPWUSDSZ128mbk */ |
| 126951 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126952 | /* VPDPWUSDSZ128mbkz */ |
| 126953 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 126954 | /* VPDPWUSDSZ128mk */ |
| 126955 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126956 | /* VPDPWUSDSZ128mkz */ |
| 126957 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 126958 | /* VPDPWUSDSZ128r */ |
| 126959 | VR128X, VR128X, VR128X, VR128X, |
| 126960 | /* VPDPWUSDSZ128rk */ |
| 126961 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126962 | /* VPDPWUSDSZ128rkz */ |
| 126963 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126964 | /* VPDPWUSDSZ256m */ |
| 126965 | VR256X, VR256X, VR256X, i256mem, |
| 126966 | /* VPDPWUSDSZ256mb */ |
| 126967 | VR256X, VR256X, VR256X, i32mem, |
| 126968 | /* VPDPWUSDSZ256mbk */ |
| 126969 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126970 | /* VPDPWUSDSZ256mbkz */ |
| 126971 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 126972 | /* VPDPWUSDSZ256mk */ |
| 126973 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126974 | /* VPDPWUSDSZ256mkz */ |
| 126975 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 126976 | /* VPDPWUSDSZ256r */ |
| 126977 | VR256X, VR256X, VR256X, VR256X, |
| 126978 | /* VPDPWUSDSZ256rk */ |
| 126979 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126980 | /* VPDPWUSDSZ256rkz */ |
| 126981 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126982 | /* VPDPWUSDSZm */ |
| 126983 | VR512, VR512, VR512, i512mem, |
| 126984 | /* VPDPWUSDSZmb */ |
| 126985 | VR512, VR512, VR512, i32mem, |
| 126986 | /* VPDPWUSDSZmbk */ |
| 126987 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126988 | /* VPDPWUSDSZmbkz */ |
| 126989 | VR512, VR512, VK16WM, VR512, i32mem, |
| 126990 | /* VPDPWUSDSZmk */ |
| 126991 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126992 | /* VPDPWUSDSZmkz */ |
| 126993 | VR512, VR512, VK16WM, VR512, i512mem, |
| 126994 | /* VPDPWUSDSZr */ |
| 126995 | VR512, VR512, VR512, VR512, |
| 126996 | /* VPDPWUSDSZrk */ |
| 126997 | VR512, VR512, VK16WM, VR512, VR512, |
| 126998 | /* VPDPWUSDSZrkz */ |
| 126999 | VR512, VR512, VK16WM, VR512, VR512, |
| 127000 | /* VPDPWUSDSrm */ |
| 127001 | VR128, VR128, VR128, i128mem, |
| 127002 | /* VPDPWUSDSrr */ |
| 127003 | VR128, VR128, VR128, VR128, |
| 127004 | /* VPDPWUSDYrm */ |
| 127005 | VR256, VR256, VR256, i256mem, |
| 127006 | /* VPDPWUSDYrr */ |
| 127007 | VR256, VR256, VR256, VR256, |
| 127008 | /* VPDPWUSDZ128m */ |
| 127009 | VR128X, VR128X, VR128X, i128mem, |
| 127010 | /* VPDPWUSDZ128mb */ |
| 127011 | VR128X, VR128X, VR128X, i32mem, |
| 127012 | /* VPDPWUSDZ128mbk */ |
| 127013 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 127014 | /* VPDPWUSDZ128mbkz */ |
| 127015 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 127016 | /* VPDPWUSDZ128mk */ |
| 127017 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 127018 | /* VPDPWUSDZ128mkz */ |
| 127019 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 127020 | /* VPDPWUSDZ128r */ |
| 127021 | VR128X, VR128X, VR128X, VR128X, |
| 127022 | /* VPDPWUSDZ128rk */ |
| 127023 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127024 | /* VPDPWUSDZ128rkz */ |
| 127025 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127026 | /* VPDPWUSDZ256m */ |
| 127027 | VR256X, VR256X, VR256X, i256mem, |
| 127028 | /* VPDPWUSDZ256mb */ |
| 127029 | VR256X, VR256X, VR256X, i32mem, |
| 127030 | /* VPDPWUSDZ256mbk */ |
| 127031 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 127032 | /* VPDPWUSDZ256mbkz */ |
| 127033 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 127034 | /* VPDPWUSDZ256mk */ |
| 127035 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 127036 | /* VPDPWUSDZ256mkz */ |
| 127037 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 127038 | /* VPDPWUSDZ256r */ |
| 127039 | VR256X, VR256X, VR256X, VR256X, |
| 127040 | /* VPDPWUSDZ256rk */ |
| 127041 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127042 | /* VPDPWUSDZ256rkz */ |
| 127043 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127044 | /* VPDPWUSDZm */ |
| 127045 | VR512, VR512, VR512, i512mem, |
| 127046 | /* VPDPWUSDZmb */ |
| 127047 | VR512, VR512, VR512, i32mem, |
| 127048 | /* VPDPWUSDZmbk */ |
| 127049 | VR512, VR512, VK16WM, VR512, i32mem, |
| 127050 | /* VPDPWUSDZmbkz */ |
| 127051 | VR512, VR512, VK16WM, VR512, i32mem, |
| 127052 | /* VPDPWUSDZmk */ |
| 127053 | VR512, VR512, VK16WM, VR512, i512mem, |
| 127054 | /* VPDPWUSDZmkz */ |
| 127055 | VR512, VR512, VK16WM, VR512, i512mem, |
| 127056 | /* VPDPWUSDZr */ |
| 127057 | VR512, VR512, VR512, VR512, |
| 127058 | /* VPDPWUSDZrk */ |
| 127059 | VR512, VR512, VK16WM, VR512, VR512, |
| 127060 | /* VPDPWUSDZrkz */ |
| 127061 | VR512, VR512, VK16WM, VR512, VR512, |
| 127062 | /* VPDPWUSDrm */ |
| 127063 | VR128, VR128, VR128, i128mem, |
| 127064 | /* VPDPWUSDrr */ |
| 127065 | VR128, VR128, VR128, VR128, |
| 127066 | /* VPDPWUUDSYrm */ |
| 127067 | VR256, VR256, VR256, i256mem, |
| 127068 | /* VPDPWUUDSYrr */ |
| 127069 | VR256, VR256, VR256, VR256, |
| 127070 | /* VPDPWUUDSZ128m */ |
| 127071 | VR128X, VR128X, VR128X, i128mem, |
| 127072 | /* VPDPWUUDSZ128mb */ |
| 127073 | VR128X, VR128X, VR128X, i32mem, |
| 127074 | /* VPDPWUUDSZ128mbk */ |
| 127075 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 127076 | /* VPDPWUUDSZ128mbkz */ |
| 127077 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 127078 | /* VPDPWUUDSZ128mk */ |
| 127079 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 127080 | /* VPDPWUUDSZ128mkz */ |
| 127081 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 127082 | /* VPDPWUUDSZ128r */ |
| 127083 | VR128X, VR128X, VR128X, VR128X, |
| 127084 | /* VPDPWUUDSZ128rk */ |
| 127085 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127086 | /* VPDPWUUDSZ128rkz */ |
| 127087 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127088 | /* VPDPWUUDSZ256m */ |
| 127089 | VR256X, VR256X, VR256X, i256mem, |
| 127090 | /* VPDPWUUDSZ256mb */ |
| 127091 | VR256X, VR256X, VR256X, i32mem, |
| 127092 | /* VPDPWUUDSZ256mbk */ |
| 127093 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 127094 | /* VPDPWUUDSZ256mbkz */ |
| 127095 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 127096 | /* VPDPWUUDSZ256mk */ |
| 127097 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 127098 | /* VPDPWUUDSZ256mkz */ |
| 127099 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 127100 | /* VPDPWUUDSZ256r */ |
| 127101 | VR256X, VR256X, VR256X, VR256X, |
| 127102 | /* VPDPWUUDSZ256rk */ |
| 127103 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127104 | /* VPDPWUUDSZ256rkz */ |
| 127105 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127106 | /* VPDPWUUDSZm */ |
| 127107 | VR512, VR512, VR512, i512mem, |
| 127108 | /* VPDPWUUDSZmb */ |
| 127109 | VR512, VR512, VR512, i32mem, |
| 127110 | /* VPDPWUUDSZmbk */ |
| 127111 | VR512, VR512, VK16WM, VR512, i32mem, |
| 127112 | /* VPDPWUUDSZmbkz */ |
| 127113 | VR512, VR512, VK16WM, VR512, i32mem, |
| 127114 | /* VPDPWUUDSZmk */ |
| 127115 | VR512, VR512, VK16WM, VR512, i512mem, |
| 127116 | /* VPDPWUUDSZmkz */ |
| 127117 | VR512, VR512, VK16WM, VR512, i512mem, |
| 127118 | /* VPDPWUUDSZr */ |
| 127119 | VR512, VR512, VR512, VR512, |
| 127120 | /* VPDPWUUDSZrk */ |
| 127121 | VR512, VR512, VK16WM, VR512, VR512, |
| 127122 | /* VPDPWUUDSZrkz */ |
| 127123 | VR512, VR512, VK16WM, VR512, VR512, |
| 127124 | /* VPDPWUUDSrm */ |
| 127125 | VR128, VR128, VR128, i128mem, |
| 127126 | /* VPDPWUUDSrr */ |
| 127127 | VR128, VR128, VR128, VR128, |
| 127128 | /* VPDPWUUDYrm */ |
| 127129 | VR256, VR256, VR256, i256mem, |
| 127130 | /* VPDPWUUDYrr */ |
| 127131 | VR256, VR256, VR256, VR256, |
| 127132 | /* VPDPWUUDZ128m */ |
| 127133 | VR128X, VR128X, VR128X, i128mem, |
| 127134 | /* VPDPWUUDZ128mb */ |
| 127135 | VR128X, VR128X, VR128X, i32mem, |
| 127136 | /* VPDPWUUDZ128mbk */ |
| 127137 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 127138 | /* VPDPWUUDZ128mbkz */ |
| 127139 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 127140 | /* VPDPWUUDZ128mk */ |
| 127141 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 127142 | /* VPDPWUUDZ128mkz */ |
| 127143 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 127144 | /* VPDPWUUDZ128r */ |
| 127145 | VR128X, VR128X, VR128X, VR128X, |
| 127146 | /* VPDPWUUDZ128rk */ |
| 127147 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127148 | /* VPDPWUUDZ128rkz */ |
| 127149 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127150 | /* VPDPWUUDZ256m */ |
| 127151 | VR256X, VR256X, VR256X, i256mem, |
| 127152 | /* VPDPWUUDZ256mb */ |
| 127153 | VR256X, VR256X, VR256X, i32mem, |
| 127154 | /* VPDPWUUDZ256mbk */ |
| 127155 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 127156 | /* VPDPWUUDZ256mbkz */ |
| 127157 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 127158 | /* VPDPWUUDZ256mk */ |
| 127159 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 127160 | /* VPDPWUUDZ256mkz */ |
| 127161 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 127162 | /* VPDPWUUDZ256r */ |
| 127163 | VR256X, VR256X, VR256X, VR256X, |
| 127164 | /* VPDPWUUDZ256rk */ |
| 127165 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127166 | /* VPDPWUUDZ256rkz */ |
| 127167 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127168 | /* VPDPWUUDZm */ |
| 127169 | VR512, VR512, VR512, i512mem, |
| 127170 | /* VPDPWUUDZmb */ |
| 127171 | VR512, VR512, VR512, i32mem, |
| 127172 | /* VPDPWUUDZmbk */ |
| 127173 | VR512, VR512, VK16WM, VR512, i32mem, |
| 127174 | /* VPDPWUUDZmbkz */ |
| 127175 | VR512, VR512, VK16WM, VR512, i32mem, |
| 127176 | /* VPDPWUUDZmk */ |
| 127177 | VR512, VR512, VK16WM, VR512, i512mem, |
| 127178 | /* VPDPWUUDZmkz */ |
| 127179 | VR512, VR512, VK16WM, VR512, i512mem, |
| 127180 | /* VPDPWUUDZr */ |
| 127181 | VR512, VR512, VR512, VR512, |
| 127182 | /* VPDPWUUDZrk */ |
| 127183 | VR512, VR512, VK16WM, VR512, VR512, |
| 127184 | /* VPDPWUUDZrkz */ |
| 127185 | VR512, VR512, VK16WM, VR512, VR512, |
| 127186 | /* VPDPWUUDrm */ |
| 127187 | VR128, VR128, VR128, i128mem, |
| 127188 | /* VPDPWUUDrr */ |
| 127189 | VR128, VR128, VR128, VR128, |
| 127190 | /* VPERM2F128rmi */ |
| 127191 | VR256, VR256, f256mem, u8imm, |
| 127192 | /* VPERM2F128rri */ |
| 127193 | VR256, VR256, VR256, u8imm, |
| 127194 | /* VPERM2I128rmi */ |
| 127195 | VR256, VR256, f256mem, u8imm, |
| 127196 | /* VPERM2I128rri */ |
| 127197 | VR256, VR256, VR256, u8imm, |
| 127198 | /* VPERMBZ128rm */ |
| 127199 | VR128X, VR128X, i128mem, |
| 127200 | /* VPERMBZ128rmk */ |
| 127201 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 127202 | /* VPERMBZ128rmkz */ |
| 127203 | VR128X, VK16WM, VR128X, i128mem, |
| 127204 | /* VPERMBZ128rr */ |
| 127205 | VR128X, VR128X, VR128X, |
| 127206 | /* VPERMBZ128rrk */ |
| 127207 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 127208 | /* VPERMBZ128rrkz */ |
| 127209 | VR128X, VK16WM, VR128X, VR128X, |
| 127210 | /* VPERMBZ256rm */ |
| 127211 | VR256X, VR256X, i256mem, |
| 127212 | /* VPERMBZ256rmk */ |
| 127213 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 127214 | /* VPERMBZ256rmkz */ |
| 127215 | VR256X, VK32WM, VR256X, i256mem, |
| 127216 | /* VPERMBZ256rr */ |
| 127217 | VR256X, VR256X, VR256X, |
| 127218 | /* VPERMBZ256rrk */ |
| 127219 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 127220 | /* VPERMBZ256rrkz */ |
| 127221 | VR256X, VK32WM, VR256X, VR256X, |
| 127222 | /* VPERMBZrm */ |
| 127223 | VR512, VR512, i512mem, |
| 127224 | /* VPERMBZrmk */ |
| 127225 | VR512, VR512, VK64WM, VR512, i512mem, |
| 127226 | /* VPERMBZrmkz */ |
| 127227 | VR512, VK64WM, VR512, i512mem, |
| 127228 | /* VPERMBZrr */ |
| 127229 | VR512, VR512, VR512, |
| 127230 | /* VPERMBZrrk */ |
| 127231 | VR512, VR512, VK64WM, VR512, VR512, |
| 127232 | /* VPERMBZrrkz */ |
| 127233 | VR512, VK64WM, VR512, VR512, |
| 127234 | /* VPERMDYrm */ |
| 127235 | VR256, VR256, i256mem, |
| 127236 | /* VPERMDYrr */ |
| 127237 | VR256, VR256, VR256, |
| 127238 | /* VPERMDZ256rm */ |
| 127239 | VR256X, VR256X, i256mem, |
| 127240 | /* VPERMDZ256rmb */ |
| 127241 | VR256X, VR256X, i32mem, |
| 127242 | /* VPERMDZ256rmbk */ |
| 127243 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 127244 | /* VPERMDZ256rmbkz */ |
| 127245 | VR256X, VK8WM, VR256X, i32mem, |
| 127246 | /* VPERMDZ256rmk */ |
| 127247 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 127248 | /* VPERMDZ256rmkz */ |
| 127249 | VR256X, VK8WM, VR256X, i256mem, |
| 127250 | /* VPERMDZ256rr */ |
| 127251 | VR256X, VR256X, VR256X, |
| 127252 | /* VPERMDZ256rrk */ |
| 127253 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127254 | /* VPERMDZ256rrkz */ |
| 127255 | VR256X, VK8WM, VR256X, VR256X, |
| 127256 | /* VPERMDZrm */ |
| 127257 | VR512, VR512, i512mem, |
| 127258 | /* VPERMDZrmb */ |
| 127259 | VR512, VR512, i32mem, |
| 127260 | /* VPERMDZrmbk */ |
| 127261 | VR512, VR512, VK16WM, VR512, i32mem, |
| 127262 | /* VPERMDZrmbkz */ |
| 127263 | VR512, VK16WM, VR512, i32mem, |
| 127264 | /* VPERMDZrmk */ |
| 127265 | VR512, VR512, VK16WM, VR512, i512mem, |
| 127266 | /* VPERMDZrmkz */ |
| 127267 | VR512, VK16WM, VR512, i512mem, |
| 127268 | /* VPERMDZrr */ |
| 127269 | VR512, VR512, VR512, |
| 127270 | /* VPERMDZrrk */ |
| 127271 | VR512, VR512, VK16WM, VR512, VR512, |
| 127272 | /* VPERMDZrrkz */ |
| 127273 | VR512, VK16WM, VR512, VR512, |
| 127274 | /* VPERMI2BZ128rm */ |
| 127275 | VR128X, VR128X, VR128X, i128mem, |
| 127276 | /* VPERMI2BZ128rmk */ |
| 127277 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 127278 | /* VPERMI2BZ128rmkz */ |
| 127279 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 127280 | /* VPERMI2BZ128rr */ |
| 127281 | VR128X, VR128X, VR128X, VR128X, |
| 127282 | /* VPERMI2BZ128rrk */ |
| 127283 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 127284 | /* VPERMI2BZ128rrkz */ |
| 127285 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 127286 | /* VPERMI2BZ256rm */ |
| 127287 | VR256X, VR256X, VR256X, i256mem, |
| 127288 | /* VPERMI2BZ256rmk */ |
| 127289 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 127290 | /* VPERMI2BZ256rmkz */ |
| 127291 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 127292 | /* VPERMI2BZ256rr */ |
| 127293 | VR256X, VR256X, VR256X, VR256X, |
| 127294 | /* VPERMI2BZ256rrk */ |
| 127295 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 127296 | /* VPERMI2BZ256rrkz */ |
| 127297 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 127298 | /* VPERMI2BZrm */ |
| 127299 | VR512, VR512, VR512, i512mem, |
| 127300 | /* VPERMI2BZrmk */ |
| 127301 | VR512, VR512, VK64WM, VR512, i512mem, |
| 127302 | /* VPERMI2BZrmkz */ |
| 127303 | VR512, VR512, VK64WM, VR512, i512mem, |
| 127304 | /* VPERMI2BZrr */ |
| 127305 | VR512, VR512, VR512, VR512, |
| 127306 | /* VPERMI2BZrrk */ |
| 127307 | VR512, VR512, VK64WM, VR512, VR512, |
| 127308 | /* VPERMI2BZrrkz */ |
| 127309 | VR512, VR512, VK64WM, VR512, VR512, |
| 127310 | /* VPERMI2DZ128rm */ |
| 127311 | VR128X, VR128X, VR128X, i128mem, |
| 127312 | /* VPERMI2DZ128rmb */ |
| 127313 | VR128X, VR128X, VR128X, i32mem, |
| 127314 | /* VPERMI2DZ128rmbk */ |
| 127315 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 127316 | /* VPERMI2DZ128rmbkz */ |
| 127317 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 127318 | /* VPERMI2DZ128rmk */ |
| 127319 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 127320 | /* VPERMI2DZ128rmkz */ |
| 127321 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 127322 | /* VPERMI2DZ128rr */ |
| 127323 | VR128X, VR128X, VR128X, VR128X, |
| 127324 | /* VPERMI2DZ128rrk */ |
| 127325 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127326 | /* VPERMI2DZ128rrkz */ |
| 127327 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127328 | /* VPERMI2DZ256rm */ |
| 127329 | VR256X, VR256X, VR256X, i256mem, |
| 127330 | /* VPERMI2DZ256rmb */ |
| 127331 | VR256X, VR256X, VR256X, i32mem, |
| 127332 | /* VPERMI2DZ256rmbk */ |
| 127333 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 127334 | /* VPERMI2DZ256rmbkz */ |
| 127335 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 127336 | /* VPERMI2DZ256rmk */ |
| 127337 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 127338 | /* VPERMI2DZ256rmkz */ |
| 127339 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 127340 | /* VPERMI2DZ256rr */ |
| 127341 | VR256X, VR256X, VR256X, VR256X, |
| 127342 | /* VPERMI2DZ256rrk */ |
| 127343 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127344 | /* VPERMI2DZ256rrkz */ |
| 127345 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127346 | /* VPERMI2DZrm */ |
| 127347 | VR512, VR512, VR512, i512mem, |
| 127348 | /* VPERMI2DZrmb */ |
| 127349 | VR512, VR512, VR512, i32mem, |
| 127350 | /* VPERMI2DZrmbk */ |
| 127351 | VR512, VR512, VK16WM, VR512, i32mem, |
| 127352 | /* VPERMI2DZrmbkz */ |
| 127353 | VR512, VR512, VK16WM, VR512, i32mem, |
| 127354 | /* VPERMI2DZrmk */ |
| 127355 | VR512, VR512, VK16WM, VR512, i512mem, |
| 127356 | /* VPERMI2DZrmkz */ |
| 127357 | VR512, VR512, VK16WM, VR512, i512mem, |
| 127358 | /* VPERMI2DZrr */ |
| 127359 | VR512, VR512, VR512, VR512, |
| 127360 | /* VPERMI2DZrrk */ |
| 127361 | VR512, VR512, VK16WM, VR512, VR512, |
| 127362 | /* VPERMI2DZrrkz */ |
| 127363 | VR512, VR512, VK16WM, VR512, VR512, |
| 127364 | /* VPERMI2PDZ128rm */ |
| 127365 | VR128X, VR128X, VR128X, f128mem, |
| 127366 | /* VPERMI2PDZ128rmb */ |
| 127367 | VR128X, VR128X, VR128X, f64mem, |
| 127368 | /* VPERMI2PDZ128rmbk */ |
| 127369 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 127370 | /* VPERMI2PDZ128rmbkz */ |
| 127371 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 127372 | /* VPERMI2PDZ128rmk */ |
| 127373 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 127374 | /* VPERMI2PDZ128rmkz */ |
| 127375 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 127376 | /* VPERMI2PDZ128rr */ |
| 127377 | VR128X, VR128X, VR128X, VR128X, |
| 127378 | /* VPERMI2PDZ128rrk */ |
| 127379 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 127380 | /* VPERMI2PDZ128rrkz */ |
| 127381 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 127382 | /* VPERMI2PDZ256rm */ |
| 127383 | VR256X, VR256X, VR256X, f256mem, |
| 127384 | /* VPERMI2PDZ256rmb */ |
| 127385 | VR256X, VR256X, VR256X, f64mem, |
| 127386 | /* VPERMI2PDZ256rmbk */ |
| 127387 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 127388 | /* VPERMI2PDZ256rmbkz */ |
| 127389 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 127390 | /* VPERMI2PDZ256rmk */ |
| 127391 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 127392 | /* VPERMI2PDZ256rmkz */ |
| 127393 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 127394 | /* VPERMI2PDZ256rr */ |
| 127395 | VR256X, VR256X, VR256X, VR256X, |
| 127396 | /* VPERMI2PDZ256rrk */ |
| 127397 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 127398 | /* VPERMI2PDZ256rrkz */ |
| 127399 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 127400 | /* VPERMI2PDZrm */ |
| 127401 | VR512, VR512, VR512, f512mem, |
| 127402 | /* VPERMI2PDZrmb */ |
| 127403 | VR512, VR512, VR512, f64mem, |
| 127404 | /* VPERMI2PDZrmbk */ |
| 127405 | VR512, VR512, VK8WM, VR512, f64mem, |
| 127406 | /* VPERMI2PDZrmbkz */ |
| 127407 | VR512, VR512, VK8WM, VR512, f64mem, |
| 127408 | /* VPERMI2PDZrmk */ |
| 127409 | VR512, VR512, VK8WM, VR512, f512mem, |
| 127410 | /* VPERMI2PDZrmkz */ |
| 127411 | VR512, VR512, VK8WM, VR512, f512mem, |
| 127412 | /* VPERMI2PDZrr */ |
| 127413 | VR512, VR512, VR512, VR512, |
| 127414 | /* VPERMI2PDZrrk */ |
| 127415 | VR512, VR512, VK8WM, VR512, VR512, |
| 127416 | /* VPERMI2PDZrrkz */ |
| 127417 | VR512, VR512, VK8WM, VR512, VR512, |
| 127418 | /* VPERMI2PSZ128rm */ |
| 127419 | VR128X, VR128X, VR128X, f128mem, |
| 127420 | /* VPERMI2PSZ128rmb */ |
| 127421 | VR128X, VR128X, VR128X, f32mem, |
| 127422 | /* VPERMI2PSZ128rmbk */ |
| 127423 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 127424 | /* VPERMI2PSZ128rmbkz */ |
| 127425 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 127426 | /* VPERMI2PSZ128rmk */ |
| 127427 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 127428 | /* VPERMI2PSZ128rmkz */ |
| 127429 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 127430 | /* VPERMI2PSZ128rr */ |
| 127431 | VR128X, VR128X, VR128X, VR128X, |
| 127432 | /* VPERMI2PSZ128rrk */ |
| 127433 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127434 | /* VPERMI2PSZ128rrkz */ |
| 127435 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127436 | /* VPERMI2PSZ256rm */ |
| 127437 | VR256X, VR256X, VR256X, f256mem, |
| 127438 | /* VPERMI2PSZ256rmb */ |
| 127439 | VR256X, VR256X, VR256X, f32mem, |
| 127440 | /* VPERMI2PSZ256rmbk */ |
| 127441 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 127442 | /* VPERMI2PSZ256rmbkz */ |
| 127443 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 127444 | /* VPERMI2PSZ256rmk */ |
| 127445 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 127446 | /* VPERMI2PSZ256rmkz */ |
| 127447 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 127448 | /* VPERMI2PSZ256rr */ |
| 127449 | VR256X, VR256X, VR256X, VR256X, |
| 127450 | /* VPERMI2PSZ256rrk */ |
| 127451 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127452 | /* VPERMI2PSZ256rrkz */ |
| 127453 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127454 | /* VPERMI2PSZrm */ |
| 127455 | VR512, VR512, VR512, f512mem, |
| 127456 | /* VPERMI2PSZrmb */ |
| 127457 | VR512, VR512, VR512, f32mem, |
| 127458 | /* VPERMI2PSZrmbk */ |
| 127459 | VR512, VR512, VK16WM, VR512, f32mem, |
| 127460 | /* VPERMI2PSZrmbkz */ |
| 127461 | VR512, VR512, VK16WM, VR512, f32mem, |
| 127462 | /* VPERMI2PSZrmk */ |
| 127463 | VR512, VR512, VK16WM, VR512, f512mem, |
| 127464 | /* VPERMI2PSZrmkz */ |
| 127465 | VR512, VR512, VK16WM, VR512, f512mem, |
| 127466 | /* VPERMI2PSZrr */ |
| 127467 | VR512, VR512, VR512, VR512, |
| 127468 | /* VPERMI2PSZrrk */ |
| 127469 | VR512, VR512, VK16WM, VR512, VR512, |
| 127470 | /* VPERMI2PSZrrkz */ |
| 127471 | VR512, VR512, VK16WM, VR512, VR512, |
| 127472 | /* VPERMI2QZ128rm */ |
| 127473 | VR128X, VR128X, VR128X, i128mem, |
| 127474 | /* VPERMI2QZ128rmb */ |
| 127475 | VR128X, VR128X, VR128X, i64mem, |
| 127476 | /* VPERMI2QZ128rmbk */ |
| 127477 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 127478 | /* VPERMI2QZ128rmbkz */ |
| 127479 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 127480 | /* VPERMI2QZ128rmk */ |
| 127481 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 127482 | /* VPERMI2QZ128rmkz */ |
| 127483 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 127484 | /* VPERMI2QZ128rr */ |
| 127485 | VR128X, VR128X, VR128X, VR128X, |
| 127486 | /* VPERMI2QZ128rrk */ |
| 127487 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 127488 | /* VPERMI2QZ128rrkz */ |
| 127489 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 127490 | /* VPERMI2QZ256rm */ |
| 127491 | VR256X, VR256X, VR256X, i256mem, |
| 127492 | /* VPERMI2QZ256rmb */ |
| 127493 | VR256X, VR256X, VR256X, i64mem, |
| 127494 | /* VPERMI2QZ256rmbk */ |
| 127495 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 127496 | /* VPERMI2QZ256rmbkz */ |
| 127497 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 127498 | /* VPERMI2QZ256rmk */ |
| 127499 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 127500 | /* VPERMI2QZ256rmkz */ |
| 127501 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 127502 | /* VPERMI2QZ256rr */ |
| 127503 | VR256X, VR256X, VR256X, VR256X, |
| 127504 | /* VPERMI2QZ256rrk */ |
| 127505 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 127506 | /* VPERMI2QZ256rrkz */ |
| 127507 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 127508 | /* VPERMI2QZrm */ |
| 127509 | VR512, VR512, VR512, i512mem, |
| 127510 | /* VPERMI2QZrmb */ |
| 127511 | VR512, VR512, VR512, i64mem, |
| 127512 | /* VPERMI2QZrmbk */ |
| 127513 | VR512, VR512, VK8WM, VR512, i64mem, |
| 127514 | /* VPERMI2QZrmbkz */ |
| 127515 | VR512, VR512, VK8WM, VR512, i64mem, |
| 127516 | /* VPERMI2QZrmk */ |
| 127517 | VR512, VR512, VK8WM, VR512, i512mem, |
| 127518 | /* VPERMI2QZrmkz */ |
| 127519 | VR512, VR512, VK8WM, VR512, i512mem, |
| 127520 | /* VPERMI2QZrr */ |
| 127521 | VR512, VR512, VR512, VR512, |
| 127522 | /* VPERMI2QZrrk */ |
| 127523 | VR512, VR512, VK8WM, VR512, VR512, |
| 127524 | /* VPERMI2QZrrkz */ |
| 127525 | VR512, VR512, VK8WM, VR512, VR512, |
| 127526 | /* VPERMI2WZ128rm */ |
| 127527 | VR128X, VR128X, VR128X, i128mem, |
| 127528 | /* VPERMI2WZ128rmk */ |
| 127529 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 127530 | /* VPERMI2WZ128rmkz */ |
| 127531 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 127532 | /* VPERMI2WZ128rr */ |
| 127533 | VR128X, VR128X, VR128X, VR128X, |
| 127534 | /* VPERMI2WZ128rrk */ |
| 127535 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 127536 | /* VPERMI2WZ128rrkz */ |
| 127537 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 127538 | /* VPERMI2WZ256rm */ |
| 127539 | VR256X, VR256X, VR256X, i256mem, |
| 127540 | /* VPERMI2WZ256rmk */ |
| 127541 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 127542 | /* VPERMI2WZ256rmkz */ |
| 127543 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 127544 | /* VPERMI2WZ256rr */ |
| 127545 | VR256X, VR256X, VR256X, VR256X, |
| 127546 | /* VPERMI2WZ256rrk */ |
| 127547 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 127548 | /* VPERMI2WZ256rrkz */ |
| 127549 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 127550 | /* VPERMI2WZrm */ |
| 127551 | VR512, VR512, VR512, i512mem, |
| 127552 | /* VPERMI2WZrmk */ |
| 127553 | VR512, VR512, VK32WM, VR512, i512mem, |
| 127554 | /* VPERMI2WZrmkz */ |
| 127555 | VR512, VR512, VK32WM, VR512, i512mem, |
| 127556 | /* VPERMI2WZrr */ |
| 127557 | VR512, VR512, VR512, VR512, |
| 127558 | /* VPERMI2WZrrk */ |
| 127559 | VR512, VR512, VK32WM, VR512, VR512, |
| 127560 | /* VPERMI2WZrrkz */ |
| 127561 | VR512, VR512, VK32WM, VR512, VR512, |
| 127562 | /* VPERMIL2PDYmr */ |
| 127563 | VR256, VR256, f256mem, VR256, u4imm, |
| 127564 | /* VPERMIL2PDYrm */ |
| 127565 | VR256, VR256, VR256, i256mem, u4imm, |
| 127566 | /* VPERMIL2PDYrr */ |
| 127567 | VR256, VR256, VR256, VR256, u4imm, |
| 127568 | /* VPERMIL2PDYrr_REV */ |
| 127569 | VR256, VR256, VR256, VR256, u4imm, |
| 127570 | /* VPERMIL2PDmr */ |
| 127571 | VR128, VR128, f128mem, VR128, u4imm, |
| 127572 | /* VPERMIL2PDrm */ |
| 127573 | VR128, VR128, VR128, i128mem, u4imm, |
| 127574 | /* VPERMIL2PDrr */ |
| 127575 | VR128, VR128, VR128, VR128, u4imm, |
| 127576 | /* VPERMIL2PDrr_REV */ |
| 127577 | VR128, VR128, VR128, VR128, u4imm, |
| 127578 | /* VPERMIL2PSYmr */ |
| 127579 | VR256, VR256, f256mem, VR256, u4imm, |
| 127580 | /* VPERMIL2PSYrm */ |
| 127581 | VR256, VR256, VR256, i256mem, u4imm, |
| 127582 | /* VPERMIL2PSYrr */ |
| 127583 | VR256, VR256, VR256, VR256, u4imm, |
| 127584 | /* VPERMIL2PSYrr_REV */ |
| 127585 | VR256, VR256, VR256, VR256, u4imm, |
| 127586 | /* VPERMIL2PSmr */ |
| 127587 | VR128, VR128, f128mem, VR128, u4imm, |
| 127588 | /* VPERMIL2PSrm */ |
| 127589 | VR128, VR128, VR128, i128mem, u4imm, |
| 127590 | /* VPERMIL2PSrr */ |
| 127591 | VR128, VR128, VR128, VR128, u4imm, |
| 127592 | /* VPERMIL2PSrr_REV */ |
| 127593 | VR128, VR128, VR128, VR128, u4imm, |
| 127594 | /* VPERMILPDYmi */ |
| 127595 | VR256, f256mem, u8imm, |
| 127596 | /* VPERMILPDYri */ |
| 127597 | VR256, VR256, u8imm, |
| 127598 | /* VPERMILPDYrm */ |
| 127599 | VR256, VR256, i256mem, |
| 127600 | /* VPERMILPDYrr */ |
| 127601 | VR256, VR256, VR256, |
| 127602 | /* VPERMILPDZ128mbi */ |
| 127603 | VR128X, f64mem, u8imm, |
| 127604 | /* VPERMILPDZ128mbik */ |
| 127605 | VR128X, VR128X, VK2WM, f64mem, u8imm, |
| 127606 | /* VPERMILPDZ128mbikz */ |
| 127607 | VR128X, VK2WM, f64mem, u8imm, |
| 127608 | /* VPERMILPDZ128mi */ |
| 127609 | VR128X, f128mem, u8imm, |
| 127610 | /* VPERMILPDZ128mik */ |
| 127611 | VR128X, VR128X, VK2WM, f128mem, u8imm, |
| 127612 | /* VPERMILPDZ128mikz */ |
| 127613 | VR128X, VK2WM, f128mem, u8imm, |
| 127614 | /* VPERMILPDZ128ri */ |
| 127615 | VR128X, VR128X, u8imm, |
| 127616 | /* VPERMILPDZ128rik */ |
| 127617 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 127618 | /* VPERMILPDZ128rikz */ |
| 127619 | VR128X, VK2WM, VR128X, u8imm, |
| 127620 | /* VPERMILPDZ128rm */ |
| 127621 | VR128X, VR128X, i128mem, |
| 127622 | /* VPERMILPDZ128rmb */ |
| 127623 | VR128X, VR128X, f64mem, |
| 127624 | /* VPERMILPDZ128rmbk */ |
| 127625 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 127626 | /* VPERMILPDZ128rmbkz */ |
| 127627 | VR128X, VK2WM, VR128X, f64mem, |
| 127628 | /* VPERMILPDZ128rmk */ |
| 127629 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 127630 | /* VPERMILPDZ128rmkz */ |
| 127631 | VR128X, VK2WM, VR128X, i128mem, |
| 127632 | /* VPERMILPDZ128rr */ |
| 127633 | VR128X, VR128X, VR128X, |
| 127634 | /* VPERMILPDZ128rrk */ |
| 127635 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 127636 | /* VPERMILPDZ128rrkz */ |
| 127637 | VR128X, VK2WM, VR128X, VR128X, |
| 127638 | /* VPERMILPDZ256mbi */ |
| 127639 | VR256X, f64mem, u8imm, |
| 127640 | /* VPERMILPDZ256mbik */ |
| 127641 | VR256X, VR256X, VK4WM, f64mem, u8imm, |
| 127642 | /* VPERMILPDZ256mbikz */ |
| 127643 | VR256X, VK4WM, f64mem, u8imm, |
| 127644 | /* VPERMILPDZ256mi */ |
| 127645 | VR256X, f256mem, u8imm, |
| 127646 | /* VPERMILPDZ256mik */ |
| 127647 | VR256X, VR256X, VK4WM, f256mem, u8imm, |
| 127648 | /* VPERMILPDZ256mikz */ |
| 127649 | VR256X, VK4WM, f256mem, u8imm, |
| 127650 | /* VPERMILPDZ256ri */ |
| 127651 | VR256X, VR256X, u8imm, |
| 127652 | /* VPERMILPDZ256rik */ |
| 127653 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 127654 | /* VPERMILPDZ256rikz */ |
| 127655 | VR256X, VK4WM, VR256X, u8imm, |
| 127656 | /* VPERMILPDZ256rm */ |
| 127657 | VR256X, VR256X, i256mem, |
| 127658 | /* VPERMILPDZ256rmb */ |
| 127659 | VR256X, VR256X, f64mem, |
| 127660 | /* VPERMILPDZ256rmbk */ |
| 127661 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 127662 | /* VPERMILPDZ256rmbkz */ |
| 127663 | VR256X, VK4WM, VR256X, f64mem, |
| 127664 | /* VPERMILPDZ256rmk */ |
| 127665 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 127666 | /* VPERMILPDZ256rmkz */ |
| 127667 | VR256X, VK4WM, VR256X, i256mem, |
| 127668 | /* VPERMILPDZ256rr */ |
| 127669 | VR256X, VR256X, VR256X, |
| 127670 | /* VPERMILPDZ256rrk */ |
| 127671 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 127672 | /* VPERMILPDZ256rrkz */ |
| 127673 | VR256X, VK4WM, VR256X, VR256X, |
| 127674 | /* VPERMILPDZmbi */ |
| 127675 | VR512, f64mem, u8imm, |
| 127676 | /* VPERMILPDZmbik */ |
| 127677 | VR512, VR512, VK8WM, f64mem, u8imm, |
| 127678 | /* VPERMILPDZmbikz */ |
| 127679 | VR512, VK8WM, f64mem, u8imm, |
| 127680 | /* VPERMILPDZmi */ |
| 127681 | VR512, f512mem, u8imm, |
| 127682 | /* VPERMILPDZmik */ |
| 127683 | VR512, VR512, VK8WM, f512mem, u8imm, |
| 127684 | /* VPERMILPDZmikz */ |
| 127685 | VR512, VK8WM, f512mem, u8imm, |
| 127686 | /* VPERMILPDZri */ |
| 127687 | VR512, VR512, u8imm, |
| 127688 | /* VPERMILPDZrik */ |
| 127689 | VR512, VR512, VK8WM, VR512, u8imm, |
| 127690 | /* VPERMILPDZrikz */ |
| 127691 | VR512, VK8WM, VR512, u8imm, |
| 127692 | /* VPERMILPDZrm */ |
| 127693 | VR512, VR512, i512mem, |
| 127694 | /* VPERMILPDZrmb */ |
| 127695 | VR512, VR512, f64mem, |
| 127696 | /* VPERMILPDZrmbk */ |
| 127697 | VR512, VR512, VK8WM, VR512, f64mem, |
| 127698 | /* VPERMILPDZrmbkz */ |
| 127699 | VR512, VK8WM, VR512, f64mem, |
| 127700 | /* VPERMILPDZrmk */ |
| 127701 | VR512, VR512, VK8WM, VR512, i512mem, |
| 127702 | /* VPERMILPDZrmkz */ |
| 127703 | VR512, VK8WM, VR512, i512mem, |
| 127704 | /* VPERMILPDZrr */ |
| 127705 | VR512, VR512, VR512, |
| 127706 | /* VPERMILPDZrrk */ |
| 127707 | VR512, VR512, VK8WM, VR512, VR512, |
| 127708 | /* VPERMILPDZrrkz */ |
| 127709 | VR512, VK8WM, VR512, VR512, |
| 127710 | /* VPERMILPDmi */ |
| 127711 | VR128, f128mem, u8imm, |
| 127712 | /* VPERMILPDri */ |
| 127713 | VR128, VR128, u8imm, |
| 127714 | /* VPERMILPDrm */ |
| 127715 | VR128, VR128, i128mem, |
| 127716 | /* VPERMILPDrr */ |
| 127717 | VR128, VR128, VR128, |
| 127718 | /* VPERMILPSYmi */ |
| 127719 | VR256, f256mem, u8imm, |
| 127720 | /* VPERMILPSYri */ |
| 127721 | VR256, VR256, u8imm, |
| 127722 | /* VPERMILPSYrm */ |
| 127723 | VR256, VR256, i256mem, |
| 127724 | /* VPERMILPSYrr */ |
| 127725 | VR256, VR256, VR256, |
| 127726 | /* VPERMILPSZ128mbi */ |
| 127727 | VR128X, f32mem, u8imm, |
| 127728 | /* VPERMILPSZ128mbik */ |
| 127729 | VR128X, VR128X, VK4WM, f32mem, u8imm, |
| 127730 | /* VPERMILPSZ128mbikz */ |
| 127731 | VR128X, VK4WM, f32mem, u8imm, |
| 127732 | /* VPERMILPSZ128mi */ |
| 127733 | VR128X, f128mem, u8imm, |
| 127734 | /* VPERMILPSZ128mik */ |
| 127735 | VR128X, VR128X, VK4WM, f128mem, u8imm, |
| 127736 | /* VPERMILPSZ128mikz */ |
| 127737 | VR128X, VK4WM, f128mem, u8imm, |
| 127738 | /* VPERMILPSZ128ri */ |
| 127739 | VR128X, VR128X, u8imm, |
| 127740 | /* VPERMILPSZ128rik */ |
| 127741 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 127742 | /* VPERMILPSZ128rikz */ |
| 127743 | VR128X, VK4WM, VR128X, u8imm, |
| 127744 | /* VPERMILPSZ128rm */ |
| 127745 | VR128X, VR128X, i128mem, |
| 127746 | /* VPERMILPSZ128rmb */ |
| 127747 | VR128X, VR128X, f32mem, |
| 127748 | /* VPERMILPSZ128rmbk */ |
| 127749 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 127750 | /* VPERMILPSZ128rmbkz */ |
| 127751 | VR128X, VK4WM, VR128X, f32mem, |
| 127752 | /* VPERMILPSZ128rmk */ |
| 127753 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 127754 | /* VPERMILPSZ128rmkz */ |
| 127755 | VR128X, VK4WM, VR128X, i128mem, |
| 127756 | /* VPERMILPSZ128rr */ |
| 127757 | VR128X, VR128X, VR128X, |
| 127758 | /* VPERMILPSZ128rrk */ |
| 127759 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127760 | /* VPERMILPSZ128rrkz */ |
| 127761 | VR128X, VK4WM, VR128X, VR128X, |
| 127762 | /* VPERMILPSZ256mbi */ |
| 127763 | VR256X, f32mem, u8imm, |
| 127764 | /* VPERMILPSZ256mbik */ |
| 127765 | VR256X, VR256X, VK8WM, f32mem, u8imm, |
| 127766 | /* VPERMILPSZ256mbikz */ |
| 127767 | VR256X, VK8WM, f32mem, u8imm, |
| 127768 | /* VPERMILPSZ256mi */ |
| 127769 | VR256X, f256mem, u8imm, |
| 127770 | /* VPERMILPSZ256mik */ |
| 127771 | VR256X, VR256X, VK8WM, f256mem, u8imm, |
| 127772 | /* VPERMILPSZ256mikz */ |
| 127773 | VR256X, VK8WM, f256mem, u8imm, |
| 127774 | /* VPERMILPSZ256ri */ |
| 127775 | VR256X, VR256X, u8imm, |
| 127776 | /* VPERMILPSZ256rik */ |
| 127777 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 127778 | /* VPERMILPSZ256rikz */ |
| 127779 | VR256X, VK8WM, VR256X, u8imm, |
| 127780 | /* VPERMILPSZ256rm */ |
| 127781 | VR256X, VR256X, i256mem, |
| 127782 | /* VPERMILPSZ256rmb */ |
| 127783 | VR256X, VR256X, f32mem, |
| 127784 | /* VPERMILPSZ256rmbk */ |
| 127785 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 127786 | /* VPERMILPSZ256rmbkz */ |
| 127787 | VR256X, VK8WM, VR256X, f32mem, |
| 127788 | /* VPERMILPSZ256rmk */ |
| 127789 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 127790 | /* VPERMILPSZ256rmkz */ |
| 127791 | VR256X, VK8WM, VR256X, i256mem, |
| 127792 | /* VPERMILPSZ256rr */ |
| 127793 | VR256X, VR256X, VR256X, |
| 127794 | /* VPERMILPSZ256rrk */ |
| 127795 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127796 | /* VPERMILPSZ256rrkz */ |
| 127797 | VR256X, VK8WM, VR256X, VR256X, |
| 127798 | /* VPERMILPSZmbi */ |
| 127799 | VR512, f32mem, u8imm, |
| 127800 | /* VPERMILPSZmbik */ |
| 127801 | VR512, VR512, VK16WM, f32mem, u8imm, |
| 127802 | /* VPERMILPSZmbikz */ |
| 127803 | VR512, VK16WM, f32mem, u8imm, |
| 127804 | /* VPERMILPSZmi */ |
| 127805 | VR512, f512mem, u8imm, |
| 127806 | /* VPERMILPSZmik */ |
| 127807 | VR512, VR512, VK16WM, f512mem, u8imm, |
| 127808 | /* VPERMILPSZmikz */ |
| 127809 | VR512, VK16WM, f512mem, u8imm, |
| 127810 | /* VPERMILPSZri */ |
| 127811 | VR512, VR512, u8imm, |
| 127812 | /* VPERMILPSZrik */ |
| 127813 | VR512, VR512, VK16WM, VR512, u8imm, |
| 127814 | /* VPERMILPSZrikz */ |
| 127815 | VR512, VK16WM, VR512, u8imm, |
| 127816 | /* VPERMILPSZrm */ |
| 127817 | VR512, VR512, i512mem, |
| 127818 | /* VPERMILPSZrmb */ |
| 127819 | VR512, VR512, f32mem, |
| 127820 | /* VPERMILPSZrmbk */ |
| 127821 | VR512, VR512, VK16WM, VR512, f32mem, |
| 127822 | /* VPERMILPSZrmbkz */ |
| 127823 | VR512, VK16WM, VR512, f32mem, |
| 127824 | /* VPERMILPSZrmk */ |
| 127825 | VR512, VR512, VK16WM, VR512, i512mem, |
| 127826 | /* VPERMILPSZrmkz */ |
| 127827 | VR512, VK16WM, VR512, i512mem, |
| 127828 | /* VPERMILPSZrr */ |
| 127829 | VR512, VR512, VR512, |
| 127830 | /* VPERMILPSZrrk */ |
| 127831 | VR512, VR512, VK16WM, VR512, VR512, |
| 127832 | /* VPERMILPSZrrkz */ |
| 127833 | VR512, VK16WM, VR512, VR512, |
| 127834 | /* VPERMILPSmi */ |
| 127835 | VR128, f128mem, u8imm, |
| 127836 | /* VPERMILPSri */ |
| 127837 | VR128, VR128, u8imm, |
| 127838 | /* VPERMILPSrm */ |
| 127839 | VR128, VR128, i128mem, |
| 127840 | /* VPERMILPSrr */ |
| 127841 | VR128, VR128, VR128, |
| 127842 | /* VPERMPDYmi */ |
| 127843 | VR256, f256mem, u8imm, |
| 127844 | /* VPERMPDYri */ |
| 127845 | VR256, VR256, u8imm, |
| 127846 | /* VPERMPDZ256mbi */ |
| 127847 | VR256X, f64mem, u8imm, |
| 127848 | /* VPERMPDZ256mbik */ |
| 127849 | VR256X, VR256X, VK4WM, f64mem, u8imm, |
| 127850 | /* VPERMPDZ256mbikz */ |
| 127851 | VR256X, VK4WM, f64mem, u8imm, |
| 127852 | /* VPERMPDZ256mi */ |
| 127853 | VR256X, f256mem, u8imm, |
| 127854 | /* VPERMPDZ256mik */ |
| 127855 | VR256X, VR256X, VK4WM, f256mem, u8imm, |
| 127856 | /* VPERMPDZ256mikz */ |
| 127857 | VR256X, VK4WM, f256mem, u8imm, |
| 127858 | /* VPERMPDZ256ri */ |
| 127859 | VR256X, VR256X, u8imm, |
| 127860 | /* VPERMPDZ256rik */ |
| 127861 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 127862 | /* VPERMPDZ256rikz */ |
| 127863 | VR256X, VK4WM, VR256X, u8imm, |
| 127864 | /* VPERMPDZ256rm */ |
| 127865 | VR256X, VR256X, f256mem, |
| 127866 | /* VPERMPDZ256rmb */ |
| 127867 | VR256X, VR256X, f64mem, |
| 127868 | /* VPERMPDZ256rmbk */ |
| 127869 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 127870 | /* VPERMPDZ256rmbkz */ |
| 127871 | VR256X, VK4WM, VR256X, f64mem, |
| 127872 | /* VPERMPDZ256rmk */ |
| 127873 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 127874 | /* VPERMPDZ256rmkz */ |
| 127875 | VR256X, VK4WM, VR256X, f256mem, |
| 127876 | /* VPERMPDZ256rr */ |
| 127877 | VR256X, VR256X, VR256X, |
| 127878 | /* VPERMPDZ256rrk */ |
| 127879 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 127880 | /* VPERMPDZ256rrkz */ |
| 127881 | VR256X, VK4WM, VR256X, VR256X, |
| 127882 | /* VPERMPDZmbi */ |
| 127883 | VR512, f64mem, u8imm, |
| 127884 | /* VPERMPDZmbik */ |
| 127885 | VR512, VR512, VK8WM, f64mem, u8imm, |
| 127886 | /* VPERMPDZmbikz */ |
| 127887 | VR512, VK8WM, f64mem, u8imm, |
| 127888 | /* VPERMPDZmi */ |
| 127889 | VR512, f512mem, u8imm, |
| 127890 | /* VPERMPDZmik */ |
| 127891 | VR512, VR512, VK8WM, f512mem, u8imm, |
| 127892 | /* VPERMPDZmikz */ |
| 127893 | VR512, VK8WM, f512mem, u8imm, |
| 127894 | /* VPERMPDZri */ |
| 127895 | VR512, VR512, u8imm, |
| 127896 | /* VPERMPDZrik */ |
| 127897 | VR512, VR512, VK8WM, VR512, u8imm, |
| 127898 | /* VPERMPDZrikz */ |
| 127899 | VR512, VK8WM, VR512, u8imm, |
| 127900 | /* VPERMPDZrm */ |
| 127901 | VR512, VR512, f512mem, |
| 127902 | /* VPERMPDZrmb */ |
| 127903 | VR512, VR512, f64mem, |
| 127904 | /* VPERMPDZrmbk */ |
| 127905 | VR512, VR512, VK8WM, VR512, f64mem, |
| 127906 | /* VPERMPDZrmbkz */ |
| 127907 | VR512, VK8WM, VR512, f64mem, |
| 127908 | /* VPERMPDZrmk */ |
| 127909 | VR512, VR512, VK8WM, VR512, f512mem, |
| 127910 | /* VPERMPDZrmkz */ |
| 127911 | VR512, VK8WM, VR512, f512mem, |
| 127912 | /* VPERMPDZrr */ |
| 127913 | VR512, VR512, VR512, |
| 127914 | /* VPERMPDZrrk */ |
| 127915 | VR512, VR512, VK8WM, VR512, VR512, |
| 127916 | /* VPERMPDZrrkz */ |
| 127917 | VR512, VK8WM, VR512, VR512, |
| 127918 | /* VPERMPSYrm */ |
| 127919 | VR256, VR256, f256mem, |
| 127920 | /* VPERMPSYrr */ |
| 127921 | VR256, VR256, VR256, |
| 127922 | /* VPERMPSZ256rm */ |
| 127923 | VR256X, VR256X, f256mem, |
| 127924 | /* VPERMPSZ256rmb */ |
| 127925 | VR256X, VR256X, f32mem, |
| 127926 | /* VPERMPSZ256rmbk */ |
| 127927 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 127928 | /* VPERMPSZ256rmbkz */ |
| 127929 | VR256X, VK8WM, VR256X, f32mem, |
| 127930 | /* VPERMPSZ256rmk */ |
| 127931 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 127932 | /* VPERMPSZ256rmkz */ |
| 127933 | VR256X, VK8WM, VR256X, f256mem, |
| 127934 | /* VPERMPSZ256rr */ |
| 127935 | VR256X, VR256X, VR256X, |
| 127936 | /* VPERMPSZ256rrk */ |
| 127937 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127938 | /* VPERMPSZ256rrkz */ |
| 127939 | VR256X, VK8WM, VR256X, VR256X, |
| 127940 | /* VPERMPSZrm */ |
| 127941 | VR512, VR512, f512mem, |
| 127942 | /* VPERMPSZrmb */ |
| 127943 | VR512, VR512, f32mem, |
| 127944 | /* VPERMPSZrmbk */ |
| 127945 | VR512, VR512, VK16WM, VR512, f32mem, |
| 127946 | /* VPERMPSZrmbkz */ |
| 127947 | VR512, VK16WM, VR512, f32mem, |
| 127948 | /* VPERMPSZrmk */ |
| 127949 | VR512, VR512, VK16WM, VR512, f512mem, |
| 127950 | /* VPERMPSZrmkz */ |
| 127951 | VR512, VK16WM, VR512, f512mem, |
| 127952 | /* VPERMPSZrr */ |
| 127953 | VR512, VR512, VR512, |
| 127954 | /* VPERMPSZrrk */ |
| 127955 | VR512, VR512, VK16WM, VR512, VR512, |
| 127956 | /* VPERMPSZrrkz */ |
| 127957 | VR512, VK16WM, VR512, VR512, |
| 127958 | /* VPERMQYmi */ |
| 127959 | VR256, i256mem, u8imm, |
| 127960 | /* VPERMQYri */ |
| 127961 | VR256, VR256, u8imm, |
| 127962 | /* VPERMQZ256mbi */ |
| 127963 | VR256X, i64mem, u8imm, |
| 127964 | /* VPERMQZ256mbik */ |
| 127965 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 127966 | /* VPERMQZ256mbikz */ |
| 127967 | VR256X, VK4WM, i64mem, u8imm, |
| 127968 | /* VPERMQZ256mi */ |
| 127969 | VR256X, i256mem, u8imm, |
| 127970 | /* VPERMQZ256mik */ |
| 127971 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 127972 | /* VPERMQZ256mikz */ |
| 127973 | VR256X, VK4WM, i256mem, u8imm, |
| 127974 | /* VPERMQZ256ri */ |
| 127975 | VR256X, VR256X, u8imm, |
| 127976 | /* VPERMQZ256rik */ |
| 127977 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 127978 | /* VPERMQZ256rikz */ |
| 127979 | VR256X, VK4WM, VR256X, u8imm, |
| 127980 | /* VPERMQZ256rm */ |
| 127981 | VR256X, VR256X, i256mem, |
| 127982 | /* VPERMQZ256rmb */ |
| 127983 | VR256X, VR256X, i64mem, |
| 127984 | /* VPERMQZ256rmbk */ |
| 127985 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 127986 | /* VPERMQZ256rmbkz */ |
| 127987 | VR256X, VK4WM, VR256X, i64mem, |
| 127988 | /* VPERMQZ256rmk */ |
| 127989 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 127990 | /* VPERMQZ256rmkz */ |
| 127991 | VR256X, VK4WM, VR256X, i256mem, |
| 127992 | /* VPERMQZ256rr */ |
| 127993 | VR256X, VR256X, VR256X, |
| 127994 | /* VPERMQZ256rrk */ |
| 127995 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 127996 | /* VPERMQZ256rrkz */ |
| 127997 | VR256X, VK4WM, VR256X, VR256X, |
| 127998 | /* VPERMQZmbi */ |
| 127999 | VR512, i64mem, u8imm, |
| 128000 | /* VPERMQZmbik */ |
| 128001 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 128002 | /* VPERMQZmbikz */ |
| 128003 | VR512, VK8WM, i64mem, u8imm, |
| 128004 | /* VPERMQZmi */ |
| 128005 | VR512, i512mem, u8imm, |
| 128006 | /* VPERMQZmik */ |
| 128007 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 128008 | /* VPERMQZmikz */ |
| 128009 | VR512, VK8WM, i512mem, u8imm, |
| 128010 | /* VPERMQZri */ |
| 128011 | VR512, VR512, u8imm, |
| 128012 | /* VPERMQZrik */ |
| 128013 | VR512, VR512, VK8WM, VR512, u8imm, |
| 128014 | /* VPERMQZrikz */ |
| 128015 | VR512, VK8WM, VR512, u8imm, |
| 128016 | /* VPERMQZrm */ |
| 128017 | VR512, VR512, i512mem, |
| 128018 | /* VPERMQZrmb */ |
| 128019 | VR512, VR512, i64mem, |
| 128020 | /* VPERMQZrmbk */ |
| 128021 | VR512, VR512, VK8WM, VR512, i64mem, |
| 128022 | /* VPERMQZrmbkz */ |
| 128023 | VR512, VK8WM, VR512, i64mem, |
| 128024 | /* VPERMQZrmk */ |
| 128025 | VR512, VR512, VK8WM, VR512, i512mem, |
| 128026 | /* VPERMQZrmkz */ |
| 128027 | VR512, VK8WM, VR512, i512mem, |
| 128028 | /* VPERMQZrr */ |
| 128029 | VR512, VR512, VR512, |
| 128030 | /* VPERMQZrrk */ |
| 128031 | VR512, VR512, VK8WM, VR512, VR512, |
| 128032 | /* VPERMQZrrkz */ |
| 128033 | VR512, VK8WM, VR512, VR512, |
| 128034 | /* VPERMT2BZ128rm */ |
| 128035 | VR128X, VR128X, VR128X, i128mem, |
| 128036 | /* VPERMT2BZ128rmk */ |
| 128037 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 128038 | /* VPERMT2BZ128rmkz */ |
| 128039 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 128040 | /* VPERMT2BZ128rr */ |
| 128041 | VR128X, VR128X, VR128X, VR128X, |
| 128042 | /* VPERMT2BZ128rrk */ |
| 128043 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 128044 | /* VPERMT2BZ128rrkz */ |
| 128045 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 128046 | /* VPERMT2BZ256rm */ |
| 128047 | VR256X, VR256X, VR256X, i256mem, |
| 128048 | /* VPERMT2BZ256rmk */ |
| 128049 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 128050 | /* VPERMT2BZ256rmkz */ |
| 128051 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 128052 | /* VPERMT2BZ256rr */ |
| 128053 | VR256X, VR256X, VR256X, VR256X, |
| 128054 | /* VPERMT2BZ256rrk */ |
| 128055 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 128056 | /* VPERMT2BZ256rrkz */ |
| 128057 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 128058 | /* VPERMT2BZrm */ |
| 128059 | VR512, VR512, VR512, i512mem, |
| 128060 | /* VPERMT2BZrmk */ |
| 128061 | VR512, VR512, VK64WM, VR512, i512mem, |
| 128062 | /* VPERMT2BZrmkz */ |
| 128063 | VR512, VR512, VK64WM, VR512, i512mem, |
| 128064 | /* VPERMT2BZrr */ |
| 128065 | VR512, VR512, VR512, VR512, |
| 128066 | /* VPERMT2BZrrk */ |
| 128067 | VR512, VR512, VK64WM, VR512, VR512, |
| 128068 | /* VPERMT2BZrrkz */ |
| 128069 | VR512, VR512, VK64WM, VR512, VR512, |
| 128070 | /* VPERMT2DZ128rm */ |
| 128071 | VR128X, VR128X, VR128X, i128mem, |
| 128072 | /* VPERMT2DZ128rmb */ |
| 128073 | VR128X, VR128X, VR128X, i32mem, |
| 128074 | /* VPERMT2DZ128rmbk */ |
| 128075 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 128076 | /* VPERMT2DZ128rmbkz */ |
| 128077 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 128078 | /* VPERMT2DZ128rmk */ |
| 128079 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 128080 | /* VPERMT2DZ128rmkz */ |
| 128081 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 128082 | /* VPERMT2DZ128rr */ |
| 128083 | VR128X, VR128X, VR128X, VR128X, |
| 128084 | /* VPERMT2DZ128rrk */ |
| 128085 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 128086 | /* VPERMT2DZ128rrkz */ |
| 128087 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 128088 | /* VPERMT2DZ256rm */ |
| 128089 | VR256X, VR256X, VR256X, i256mem, |
| 128090 | /* VPERMT2DZ256rmb */ |
| 128091 | VR256X, VR256X, VR256X, i32mem, |
| 128092 | /* VPERMT2DZ256rmbk */ |
| 128093 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 128094 | /* VPERMT2DZ256rmbkz */ |
| 128095 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 128096 | /* VPERMT2DZ256rmk */ |
| 128097 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 128098 | /* VPERMT2DZ256rmkz */ |
| 128099 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 128100 | /* VPERMT2DZ256rr */ |
| 128101 | VR256X, VR256X, VR256X, VR256X, |
| 128102 | /* VPERMT2DZ256rrk */ |
| 128103 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 128104 | /* VPERMT2DZ256rrkz */ |
| 128105 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 128106 | /* VPERMT2DZrm */ |
| 128107 | VR512, VR512, VR512, i512mem, |
| 128108 | /* VPERMT2DZrmb */ |
| 128109 | VR512, VR512, VR512, i32mem, |
| 128110 | /* VPERMT2DZrmbk */ |
| 128111 | VR512, VR512, VK16WM, VR512, i32mem, |
| 128112 | /* VPERMT2DZrmbkz */ |
| 128113 | VR512, VR512, VK16WM, VR512, i32mem, |
| 128114 | /* VPERMT2DZrmk */ |
| 128115 | VR512, VR512, VK16WM, VR512, i512mem, |
| 128116 | /* VPERMT2DZrmkz */ |
| 128117 | VR512, VR512, VK16WM, VR512, i512mem, |
| 128118 | /* VPERMT2DZrr */ |
| 128119 | VR512, VR512, VR512, VR512, |
| 128120 | /* VPERMT2DZrrk */ |
| 128121 | VR512, VR512, VK16WM, VR512, VR512, |
| 128122 | /* VPERMT2DZrrkz */ |
| 128123 | VR512, VR512, VK16WM, VR512, VR512, |
| 128124 | /* VPERMT2PDZ128rm */ |
| 128125 | VR128X, VR128X, VR128X, f128mem, |
| 128126 | /* VPERMT2PDZ128rmb */ |
| 128127 | VR128X, VR128X, VR128X, f64mem, |
| 128128 | /* VPERMT2PDZ128rmbk */ |
| 128129 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 128130 | /* VPERMT2PDZ128rmbkz */ |
| 128131 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 128132 | /* VPERMT2PDZ128rmk */ |
| 128133 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 128134 | /* VPERMT2PDZ128rmkz */ |
| 128135 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 128136 | /* VPERMT2PDZ128rr */ |
| 128137 | VR128X, VR128X, VR128X, VR128X, |
| 128138 | /* VPERMT2PDZ128rrk */ |
| 128139 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 128140 | /* VPERMT2PDZ128rrkz */ |
| 128141 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 128142 | /* VPERMT2PDZ256rm */ |
| 128143 | VR256X, VR256X, VR256X, f256mem, |
| 128144 | /* VPERMT2PDZ256rmb */ |
| 128145 | VR256X, VR256X, VR256X, f64mem, |
| 128146 | /* VPERMT2PDZ256rmbk */ |
| 128147 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 128148 | /* VPERMT2PDZ256rmbkz */ |
| 128149 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 128150 | /* VPERMT2PDZ256rmk */ |
| 128151 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 128152 | /* VPERMT2PDZ256rmkz */ |
| 128153 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 128154 | /* VPERMT2PDZ256rr */ |
| 128155 | VR256X, VR256X, VR256X, VR256X, |
| 128156 | /* VPERMT2PDZ256rrk */ |
| 128157 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 128158 | /* VPERMT2PDZ256rrkz */ |
| 128159 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 128160 | /* VPERMT2PDZrm */ |
| 128161 | VR512, VR512, VR512, f512mem, |
| 128162 | /* VPERMT2PDZrmb */ |
| 128163 | VR512, VR512, VR512, f64mem, |
| 128164 | /* VPERMT2PDZrmbk */ |
| 128165 | VR512, VR512, VK8WM, VR512, f64mem, |
| 128166 | /* VPERMT2PDZrmbkz */ |
| 128167 | VR512, VR512, VK8WM, VR512, f64mem, |
| 128168 | /* VPERMT2PDZrmk */ |
| 128169 | VR512, VR512, VK8WM, VR512, f512mem, |
| 128170 | /* VPERMT2PDZrmkz */ |
| 128171 | VR512, VR512, VK8WM, VR512, f512mem, |
| 128172 | /* VPERMT2PDZrr */ |
| 128173 | VR512, VR512, VR512, VR512, |
| 128174 | /* VPERMT2PDZrrk */ |
| 128175 | VR512, VR512, VK8WM, VR512, VR512, |
| 128176 | /* VPERMT2PDZrrkz */ |
| 128177 | VR512, VR512, VK8WM, VR512, VR512, |
| 128178 | /* VPERMT2PSZ128rm */ |
| 128179 | VR128X, VR128X, VR128X, f128mem, |
| 128180 | /* VPERMT2PSZ128rmb */ |
| 128181 | VR128X, VR128X, VR128X, f32mem, |
| 128182 | /* VPERMT2PSZ128rmbk */ |
| 128183 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 128184 | /* VPERMT2PSZ128rmbkz */ |
| 128185 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 128186 | /* VPERMT2PSZ128rmk */ |
| 128187 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 128188 | /* VPERMT2PSZ128rmkz */ |
| 128189 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 128190 | /* VPERMT2PSZ128rr */ |
| 128191 | VR128X, VR128X, VR128X, VR128X, |
| 128192 | /* VPERMT2PSZ128rrk */ |
| 128193 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 128194 | /* VPERMT2PSZ128rrkz */ |
| 128195 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 128196 | /* VPERMT2PSZ256rm */ |
| 128197 | VR256X, VR256X, VR256X, f256mem, |
| 128198 | /* VPERMT2PSZ256rmb */ |
| 128199 | VR256X, VR256X, VR256X, f32mem, |
| 128200 | /* VPERMT2PSZ256rmbk */ |
| 128201 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 128202 | /* VPERMT2PSZ256rmbkz */ |
| 128203 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 128204 | /* VPERMT2PSZ256rmk */ |
| 128205 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 128206 | /* VPERMT2PSZ256rmkz */ |
| 128207 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 128208 | /* VPERMT2PSZ256rr */ |
| 128209 | VR256X, VR256X, VR256X, VR256X, |
| 128210 | /* VPERMT2PSZ256rrk */ |
| 128211 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 128212 | /* VPERMT2PSZ256rrkz */ |
| 128213 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 128214 | /* VPERMT2PSZrm */ |
| 128215 | VR512, VR512, VR512, f512mem, |
| 128216 | /* VPERMT2PSZrmb */ |
| 128217 | VR512, VR512, VR512, f32mem, |
| 128218 | /* VPERMT2PSZrmbk */ |
| 128219 | VR512, VR512, VK16WM, VR512, f32mem, |
| 128220 | /* VPERMT2PSZrmbkz */ |
| 128221 | VR512, VR512, VK16WM, VR512, f32mem, |
| 128222 | /* VPERMT2PSZrmk */ |
| 128223 | VR512, VR512, VK16WM, VR512, f512mem, |
| 128224 | /* VPERMT2PSZrmkz */ |
| 128225 | VR512, VR512, VK16WM, VR512, f512mem, |
| 128226 | /* VPERMT2PSZrr */ |
| 128227 | VR512, VR512, VR512, VR512, |
| 128228 | /* VPERMT2PSZrrk */ |
| 128229 | VR512, VR512, VK16WM, VR512, VR512, |
| 128230 | /* VPERMT2PSZrrkz */ |
| 128231 | VR512, VR512, VK16WM, VR512, VR512, |
| 128232 | /* VPERMT2QZ128rm */ |
| 128233 | VR128X, VR128X, VR128X, i128mem, |
| 128234 | /* VPERMT2QZ128rmb */ |
| 128235 | VR128X, VR128X, VR128X, i64mem, |
| 128236 | /* VPERMT2QZ128rmbk */ |
| 128237 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 128238 | /* VPERMT2QZ128rmbkz */ |
| 128239 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 128240 | /* VPERMT2QZ128rmk */ |
| 128241 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 128242 | /* VPERMT2QZ128rmkz */ |
| 128243 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 128244 | /* VPERMT2QZ128rr */ |
| 128245 | VR128X, VR128X, VR128X, VR128X, |
| 128246 | /* VPERMT2QZ128rrk */ |
| 128247 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 128248 | /* VPERMT2QZ128rrkz */ |
| 128249 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 128250 | /* VPERMT2QZ256rm */ |
| 128251 | VR256X, VR256X, VR256X, i256mem, |
| 128252 | /* VPERMT2QZ256rmb */ |
| 128253 | VR256X, VR256X, VR256X, i64mem, |
| 128254 | /* VPERMT2QZ256rmbk */ |
| 128255 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 128256 | /* VPERMT2QZ256rmbkz */ |
| 128257 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 128258 | /* VPERMT2QZ256rmk */ |
| 128259 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 128260 | /* VPERMT2QZ256rmkz */ |
| 128261 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 128262 | /* VPERMT2QZ256rr */ |
| 128263 | VR256X, VR256X, VR256X, VR256X, |
| 128264 | /* VPERMT2QZ256rrk */ |
| 128265 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 128266 | /* VPERMT2QZ256rrkz */ |
| 128267 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 128268 | /* VPERMT2QZrm */ |
| 128269 | VR512, VR512, VR512, i512mem, |
| 128270 | /* VPERMT2QZrmb */ |
| 128271 | VR512, VR512, VR512, i64mem, |
| 128272 | /* VPERMT2QZrmbk */ |
| 128273 | VR512, VR512, VK8WM, VR512, i64mem, |
| 128274 | /* VPERMT2QZrmbkz */ |
| 128275 | VR512, VR512, VK8WM, VR512, i64mem, |
| 128276 | /* VPERMT2QZrmk */ |
| 128277 | VR512, VR512, VK8WM, VR512, i512mem, |
| 128278 | /* VPERMT2QZrmkz */ |
| 128279 | VR512, VR512, VK8WM, VR512, i512mem, |
| 128280 | /* VPERMT2QZrr */ |
| 128281 | VR512, VR512, VR512, VR512, |
| 128282 | /* VPERMT2QZrrk */ |
| 128283 | VR512, VR512, VK8WM, VR512, VR512, |
| 128284 | /* VPERMT2QZrrkz */ |
| 128285 | VR512, VR512, VK8WM, VR512, VR512, |
| 128286 | /* VPERMT2WZ128rm */ |
| 128287 | VR128X, VR128X, VR128X, i128mem, |
| 128288 | /* VPERMT2WZ128rmk */ |
| 128289 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 128290 | /* VPERMT2WZ128rmkz */ |
| 128291 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 128292 | /* VPERMT2WZ128rr */ |
| 128293 | VR128X, VR128X, VR128X, VR128X, |
| 128294 | /* VPERMT2WZ128rrk */ |
| 128295 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 128296 | /* VPERMT2WZ128rrkz */ |
| 128297 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 128298 | /* VPERMT2WZ256rm */ |
| 128299 | VR256X, VR256X, VR256X, i256mem, |
| 128300 | /* VPERMT2WZ256rmk */ |
| 128301 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 128302 | /* VPERMT2WZ256rmkz */ |
| 128303 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 128304 | /* VPERMT2WZ256rr */ |
| 128305 | VR256X, VR256X, VR256X, VR256X, |
| 128306 | /* VPERMT2WZ256rrk */ |
| 128307 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 128308 | /* VPERMT2WZ256rrkz */ |
| 128309 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 128310 | /* VPERMT2WZrm */ |
| 128311 | VR512, VR512, VR512, i512mem, |
| 128312 | /* VPERMT2WZrmk */ |
| 128313 | VR512, VR512, VK32WM, VR512, i512mem, |
| 128314 | /* VPERMT2WZrmkz */ |
| 128315 | VR512, VR512, VK32WM, VR512, i512mem, |
| 128316 | /* VPERMT2WZrr */ |
| 128317 | VR512, VR512, VR512, VR512, |
| 128318 | /* VPERMT2WZrrk */ |
| 128319 | VR512, VR512, VK32WM, VR512, VR512, |
| 128320 | /* VPERMT2WZrrkz */ |
| 128321 | VR512, VR512, VK32WM, VR512, VR512, |
| 128322 | /* VPERMWZ128rm */ |
| 128323 | VR128X, VR128X, i128mem, |
| 128324 | /* VPERMWZ128rmk */ |
| 128325 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 128326 | /* VPERMWZ128rmkz */ |
| 128327 | VR128X, VK8WM, VR128X, i128mem, |
| 128328 | /* VPERMWZ128rr */ |
| 128329 | VR128X, VR128X, VR128X, |
| 128330 | /* VPERMWZ128rrk */ |
| 128331 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 128332 | /* VPERMWZ128rrkz */ |
| 128333 | VR128X, VK8WM, VR128X, VR128X, |
| 128334 | /* VPERMWZ256rm */ |
| 128335 | VR256X, VR256X, i256mem, |
| 128336 | /* VPERMWZ256rmk */ |
| 128337 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 128338 | /* VPERMWZ256rmkz */ |
| 128339 | VR256X, VK16WM, VR256X, i256mem, |
| 128340 | /* VPERMWZ256rr */ |
| 128341 | VR256X, VR256X, VR256X, |
| 128342 | /* VPERMWZ256rrk */ |
| 128343 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 128344 | /* VPERMWZ256rrkz */ |
| 128345 | VR256X, VK16WM, VR256X, VR256X, |
| 128346 | /* VPERMWZrm */ |
| 128347 | VR512, VR512, i512mem, |
| 128348 | /* VPERMWZrmk */ |
| 128349 | VR512, VR512, VK32WM, VR512, i512mem, |
| 128350 | /* VPERMWZrmkz */ |
| 128351 | VR512, VK32WM, VR512, i512mem, |
| 128352 | /* VPERMWZrr */ |
| 128353 | VR512, VR512, VR512, |
| 128354 | /* VPERMWZrrk */ |
| 128355 | VR512, VR512, VK32WM, VR512, VR512, |
| 128356 | /* VPERMWZrrkz */ |
| 128357 | VR512, VK32WM, VR512, VR512, |
| 128358 | /* VPEXPANDBZ128rm */ |
| 128359 | VR128X, i128mem, |
| 128360 | /* VPEXPANDBZ128rmk */ |
| 128361 | VR128X, VR128X, VK16WM, i128mem, |
| 128362 | /* VPEXPANDBZ128rmkz */ |
| 128363 | VR128X, VK16WM, i128mem, |
| 128364 | /* VPEXPANDBZ128rr */ |
| 128365 | VR128X, VR128X, |
| 128366 | /* VPEXPANDBZ128rrk */ |
| 128367 | VR128X, VR128X, VK16WM, VR128X, |
| 128368 | /* VPEXPANDBZ128rrkz */ |
| 128369 | VR128X, VK16WM, VR128X, |
| 128370 | /* VPEXPANDBZ256rm */ |
| 128371 | VR256X, i256mem, |
| 128372 | /* VPEXPANDBZ256rmk */ |
| 128373 | VR256X, VR256X, VK32WM, i256mem, |
| 128374 | /* VPEXPANDBZ256rmkz */ |
| 128375 | VR256X, VK32WM, i256mem, |
| 128376 | /* VPEXPANDBZ256rr */ |
| 128377 | VR256X, VR256X, |
| 128378 | /* VPEXPANDBZ256rrk */ |
| 128379 | VR256X, VR256X, VK32WM, VR256X, |
| 128380 | /* VPEXPANDBZ256rrkz */ |
| 128381 | VR256X, VK32WM, VR256X, |
| 128382 | /* VPEXPANDBZrm */ |
| 128383 | VR512, i512mem, |
| 128384 | /* VPEXPANDBZrmk */ |
| 128385 | VR512, VR512, VK64WM, i512mem, |
| 128386 | /* VPEXPANDBZrmkz */ |
| 128387 | VR512, VK64WM, i512mem, |
| 128388 | /* VPEXPANDBZrr */ |
| 128389 | VR512, VR512, |
| 128390 | /* VPEXPANDBZrrk */ |
| 128391 | VR512, VR512, VK64WM, VR512, |
| 128392 | /* VPEXPANDBZrrkz */ |
| 128393 | VR512, VK64WM, VR512, |
| 128394 | /* VPEXPANDDZ128rm */ |
| 128395 | VR128X, i128mem, |
| 128396 | /* VPEXPANDDZ128rmk */ |
| 128397 | VR128X, VR128X, VK4WM, i128mem, |
| 128398 | /* VPEXPANDDZ128rmkz */ |
| 128399 | VR128X, VK4WM, i128mem, |
| 128400 | /* VPEXPANDDZ128rr */ |
| 128401 | VR128X, VR128X, |
| 128402 | /* VPEXPANDDZ128rrk */ |
| 128403 | VR128X, VR128X, VK4WM, VR128X, |
| 128404 | /* VPEXPANDDZ128rrkz */ |
| 128405 | VR128X, VK4WM, VR128X, |
| 128406 | /* VPEXPANDDZ256rm */ |
| 128407 | VR256X, i256mem, |
| 128408 | /* VPEXPANDDZ256rmk */ |
| 128409 | VR256X, VR256X, VK8WM, i256mem, |
| 128410 | /* VPEXPANDDZ256rmkz */ |
| 128411 | VR256X, VK8WM, i256mem, |
| 128412 | /* VPEXPANDDZ256rr */ |
| 128413 | VR256X, VR256X, |
| 128414 | /* VPEXPANDDZ256rrk */ |
| 128415 | VR256X, VR256X, VK8WM, VR256X, |
| 128416 | /* VPEXPANDDZ256rrkz */ |
| 128417 | VR256X, VK8WM, VR256X, |
| 128418 | /* VPEXPANDDZrm */ |
| 128419 | VR512, i512mem, |
| 128420 | /* VPEXPANDDZrmk */ |
| 128421 | VR512, VR512, VK16WM, i512mem, |
| 128422 | /* VPEXPANDDZrmkz */ |
| 128423 | VR512, VK16WM, i512mem, |
| 128424 | /* VPEXPANDDZrr */ |
| 128425 | VR512, VR512, |
| 128426 | /* VPEXPANDDZrrk */ |
| 128427 | VR512, VR512, VK16WM, VR512, |
| 128428 | /* VPEXPANDDZrrkz */ |
| 128429 | VR512, VK16WM, VR512, |
| 128430 | /* VPEXPANDQZ128rm */ |
| 128431 | VR128X, i128mem, |
| 128432 | /* VPEXPANDQZ128rmk */ |
| 128433 | VR128X, VR128X, VK2WM, i128mem, |
| 128434 | /* VPEXPANDQZ128rmkz */ |
| 128435 | VR128X, VK2WM, i128mem, |
| 128436 | /* VPEXPANDQZ128rr */ |
| 128437 | VR128X, VR128X, |
| 128438 | /* VPEXPANDQZ128rrk */ |
| 128439 | VR128X, VR128X, VK2WM, VR128X, |
| 128440 | /* VPEXPANDQZ128rrkz */ |
| 128441 | VR128X, VK2WM, VR128X, |
| 128442 | /* VPEXPANDQZ256rm */ |
| 128443 | VR256X, i256mem, |
| 128444 | /* VPEXPANDQZ256rmk */ |
| 128445 | VR256X, VR256X, VK4WM, i256mem, |
| 128446 | /* VPEXPANDQZ256rmkz */ |
| 128447 | VR256X, VK4WM, i256mem, |
| 128448 | /* VPEXPANDQZ256rr */ |
| 128449 | VR256X, VR256X, |
| 128450 | /* VPEXPANDQZ256rrk */ |
| 128451 | VR256X, VR256X, VK4WM, VR256X, |
| 128452 | /* VPEXPANDQZ256rrkz */ |
| 128453 | VR256X, VK4WM, VR256X, |
| 128454 | /* VPEXPANDQZrm */ |
| 128455 | VR512, i512mem, |
| 128456 | /* VPEXPANDQZrmk */ |
| 128457 | VR512, VR512, VK8WM, i512mem, |
| 128458 | /* VPEXPANDQZrmkz */ |
| 128459 | VR512, VK8WM, i512mem, |
| 128460 | /* VPEXPANDQZrr */ |
| 128461 | VR512, VR512, |
| 128462 | /* VPEXPANDQZrrk */ |
| 128463 | VR512, VR512, VK8WM, VR512, |
| 128464 | /* VPEXPANDQZrrkz */ |
| 128465 | VR512, VK8WM, VR512, |
| 128466 | /* VPEXPANDWZ128rm */ |
| 128467 | VR128X, i128mem, |
| 128468 | /* VPEXPANDWZ128rmk */ |
| 128469 | VR128X, VR128X, VK8WM, i128mem, |
| 128470 | /* VPEXPANDWZ128rmkz */ |
| 128471 | VR128X, VK8WM, i128mem, |
| 128472 | /* VPEXPANDWZ128rr */ |
| 128473 | VR128X, VR128X, |
| 128474 | /* VPEXPANDWZ128rrk */ |
| 128475 | VR128X, VR128X, VK8WM, VR128X, |
| 128476 | /* VPEXPANDWZ128rrkz */ |
| 128477 | VR128X, VK8WM, VR128X, |
| 128478 | /* VPEXPANDWZ256rm */ |
| 128479 | VR256X, i256mem, |
| 128480 | /* VPEXPANDWZ256rmk */ |
| 128481 | VR256X, VR256X, VK16WM, i256mem, |
| 128482 | /* VPEXPANDWZ256rmkz */ |
| 128483 | VR256X, VK16WM, i256mem, |
| 128484 | /* VPEXPANDWZ256rr */ |
| 128485 | VR256X, VR256X, |
| 128486 | /* VPEXPANDWZ256rrk */ |
| 128487 | VR256X, VR256X, VK16WM, VR256X, |
| 128488 | /* VPEXPANDWZ256rrkz */ |
| 128489 | VR256X, VK16WM, VR256X, |
| 128490 | /* VPEXPANDWZrm */ |
| 128491 | VR512, i512mem, |
| 128492 | /* VPEXPANDWZrmk */ |
| 128493 | VR512, VR512, VK32WM, i512mem, |
| 128494 | /* VPEXPANDWZrmkz */ |
| 128495 | VR512, VK32WM, i512mem, |
| 128496 | /* VPEXPANDWZrr */ |
| 128497 | VR512, VR512, |
| 128498 | /* VPEXPANDWZrrk */ |
| 128499 | VR512, VR512, VK32WM, VR512, |
| 128500 | /* VPEXPANDWZrrkz */ |
| 128501 | VR512, VK32WM, VR512, |
| 128502 | /* VPEXTRBZmri */ |
| 128503 | i8mem, VR128X, u8imm, |
| 128504 | /* VPEXTRBZrri */ |
| 128505 | GR32orGR64, VR128X, u8imm, |
| 128506 | /* VPEXTRBmri */ |
| 128507 | i8mem, VR128, u8imm, |
| 128508 | /* VPEXTRBrri */ |
| 128509 | GR32orGR64, VR128, u8imm, |
| 128510 | /* VPEXTRDZmri */ |
| 128511 | i32mem, VR128X, u8imm, |
| 128512 | /* VPEXTRDZrri */ |
| 128513 | GR32, VR128X, u8imm, |
| 128514 | /* VPEXTRDmri */ |
| 128515 | i32mem, VR128, u8imm, |
| 128516 | /* VPEXTRDrri */ |
| 128517 | GR32, VR128, u8imm, |
| 128518 | /* VPEXTRQZmri */ |
| 128519 | i64mem, VR128X, u8imm, |
| 128520 | /* VPEXTRQZrri */ |
| 128521 | GR64, VR128X, u8imm, |
| 128522 | /* VPEXTRQmri */ |
| 128523 | i64mem, VR128, u8imm, |
| 128524 | /* VPEXTRQrri */ |
| 128525 | GR64, VR128, u8imm, |
| 128526 | /* VPEXTRWZmri */ |
| 128527 | i16mem, VR128X, u8imm, |
| 128528 | /* VPEXTRWZrri */ |
| 128529 | GR32orGR64, VR128X, u8imm, |
| 128530 | /* VPEXTRWZrri_REV */ |
| 128531 | GR32orGR64, VR128X, u8imm, |
| 128532 | /* VPEXTRWmri */ |
| 128533 | i16mem, VR128, u8imm, |
| 128534 | /* VPEXTRWrri */ |
| 128535 | GR32orGR64, VR128, u8imm, |
| 128536 | /* VPEXTRWrri_REV */ |
| 128537 | GR32orGR64, VR128, u8imm, |
| 128538 | /* VPGATHERDDYrm */ |
| 128539 | VR256, VR256, VR256, vy32mem, VR256, |
| 128540 | /* VPGATHERDDZ128rm */ |
| 128541 | VR128X, VK4WM, VR128X, VK4WM, vx32xmem, |
| 128542 | /* VPGATHERDDZ256rm */ |
| 128543 | VR256X, VK8WM, VR256X, VK8WM, vy32xmem, |
| 128544 | /* VPGATHERDDZrm */ |
| 128545 | VR512, VK16WM, VR512, VK16WM, vz32mem, |
| 128546 | /* VPGATHERDDrm */ |
| 128547 | VR128, VR128, VR128, vx32mem, VR128, |
| 128548 | /* VPGATHERDQYrm */ |
| 128549 | VR256, VR256, VR256, vx64mem, VR256, |
| 128550 | /* VPGATHERDQZ128rm */ |
| 128551 | VR128X, VK2WM, VR128X, VK2WM, vx64xmem, |
| 128552 | /* VPGATHERDQZ256rm */ |
| 128553 | VR256X, VK4WM, VR256X, VK4WM, vx64xmem, |
| 128554 | /* VPGATHERDQZrm */ |
| 128555 | VR512, VK8WM, VR512, VK8WM, vy64xmem, |
| 128556 | /* VPGATHERDQrm */ |
| 128557 | VR128, VR128, VR128, vx64mem, VR128, |
| 128558 | /* VPGATHERQDYrm */ |
| 128559 | VR128, VR128, VR128, vy32mem, VR128, |
| 128560 | /* VPGATHERQDZ128rm */ |
| 128561 | VR128X, VK2WM, VR128X, VK2WM, vx32xmem, |
| 128562 | /* VPGATHERQDZ256rm */ |
| 128563 | VR128X, VK4WM, VR128X, VK4WM, vy32xmem, |
| 128564 | /* VPGATHERQDZrm */ |
| 128565 | VR256X, VK8WM, VR256X, VK8WM, vz32mem, |
| 128566 | /* VPGATHERQDrm */ |
| 128567 | VR128, VR128, VR128, vx32mem, VR128, |
| 128568 | /* VPGATHERQQYrm */ |
| 128569 | VR256, VR256, VR256, vy64mem, VR256, |
| 128570 | /* VPGATHERQQZ128rm */ |
| 128571 | VR128X, VK2WM, VR128X, VK2WM, vx64xmem, |
| 128572 | /* VPGATHERQQZ256rm */ |
| 128573 | VR256X, VK4WM, VR256X, VK4WM, vy64xmem, |
| 128574 | /* VPGATHERQQZrm */ |
| 128575 | VR512, VK8WM, VR512, VK8WM, vz64mem, |
| 128576 | /* VPGATHERQQrm */ |
| 128577 | VR128, VR128, VR128, vx64mem, VR128, |
| 128578 | /* VPHADDBDrm */ |
| 128579 | VR128, i128mem, |
| 128580 | /* VPHADDBDrr */ |
| 128581 | VR128, VR128, |
| 128582 | /* VPHADDBQrm */ |
| 128583 | VR128, i128mem, |
| 128584 | /* VPHADDBQrr */ |
| 128585 | VR128, VR128, |
| 128586 | /* VPHADDBWrm */ |
| 128587 | VR128, i128mem, |
| 128588 | /* VPHADDBWrr */ |
| 128589 | VR128, VR128, |
| 128590 | /* VPHADDDQrm */ |
| 128591 | VR128, i128mem, |
| 128592 | /* VPHADDDQrr */ |
| 128593 | VR128, VR128, |
| 128594 | /* VPHADDDYrm */ |
| 128595 | VR256, VR256, i256mem, |
| 128596 | /* VPHADDDYrr */ |
| 128597 | VR256, VR256, VR256, |
| 128598 | /* VPHADDDrm */ |
| 128599 | VR128, VR128, i128mem, |
| 128600 | /* VPHADDDrr */ |
| 128601 | VR128, VR128, VR128, |
| 128602 | /* VPHADDSWYrm */ |
| 128603 | VR256, VR256, i256mem, |
| 128604 | /* VPHADDSWYrr */ |
| 128605 | VR256, VR256, VR256, |
| 128606 | /* VPHADDSWrm */ |
| 128607 | VR128, VR128, i128mem, |
| 128608 | /* VPHADDSWrr */ |
| 128609 | VR128, VR128, VR128, |
| 128610 | /* VPHADDUBDrm */ |
| 128611 | VR128, i128mem, |
| 128612 | /* VPHADDUBDrr */ |
| 128613 | VR128, VR128, |
| 128614 | /* VPHADDUBQrm */ |
| 128615 | VR128, i128mem, |
| 128616 | /* VPHADDUBQrr */ |
| 128617 | VR128, VR128, |
| 128618 | /* VPHADDUBWrm */ |
| 128619 | VR128, i128mem, |
| 128620 | /* VPHADDUBWrr */ |
| 128621 | VR128, VR128, |
| 128622 | /* VPHADDUDQrm */ |
| 128623 | VR128, i128mem, |
| 128624 | /* VPHADDUDQrr */ |
| 128625 | VR128, VR128, |
| 128626 | /* VPHADDUWDrm */ |
| 128627 | VR128, i128mem, |
| 128628 | /* VPHADDUWDrr */ |
| 128629 | VR128, VR128, |
| 128630 | /* VPHADDUWQrm */ |
| 128631 | VR128, i128mem, |
| 128632 | /* VPHADDUWQrr */ |
| 128633 | VR128, VR128, |
| 128634 | /* VPHADDWDrm */ |
| 128635 | VR128, i128mem, |
| 128636 | /* VPHADDWDrr */ |
| 128637 | VR128, VR128, |
| 128638 | /* VPHADDWQrm */ |
| 128639 | VR128, i128mem, |
| 128640 | /* VPHADDWQrr */ |
| 128641 | VR128, VR128, |
| 128642 | /* VPHADDWYrm */ |
| 128643 | VR256, VR256, i256mem, |
| 128644 | /* VPHADDWYrr */ |
| 128645 | VR256, VR256, VR256, |
| 128646 | /* VPHADDWrm */ |
| 128647 | VR128, VR128, i128mem, |
| 128648 | /* VPHADDWrr */ |
| 128649 | VR128, VR128, VR128, |
| 128650 | /* VPHMINPOSUWrm */ |
| 128651 | VR128, i128mem, |
| 128652 | /* VPHMINPOSUWrr */ |
| 128653 | VR128, VR128, |
| 128654 | /* VPHSUBBWrm */ |
| 128655 | VR128, i128mem, |
| 128656 | /* VPHSUBBWrr */ |
| 128657 | VR128, VR128, |
| 128658 | /* VPHSUBDQrm */ |
| 128659 | VR128, i128mem, |
| 128660 | /* VPHSUBDQrr */ |
| 128661 | VR128, VR128, |
| 128662 | /* VPHSUBDYrm */ |
| 128663 | VR256, VR256, i256mem, |
| 128664 | /* VPHSUBDYrr */ |
| 128665 | VR256, VR256, VR256, |
| 128666 | /* VPHSUBDrm */ |
| 128667 | VR128, VR128, i128mem, |
| 128668 | /* VPHSUBDrr */ |
| 128669 | VR128, VR128, VR128, |
| 128670 | /* VPHSUBSWYrm */ |
| 128671 | VR256, VR256, i256mem, |
| 128672 | /* VPHSUBSWYrr */ |
| 128673 | VR256, VR256, VR256, |
| 128674 | /* VPHSUBSWrm */ |
| 128675 | VR128, VR128, i128mem, |
| 128676 | /* VPHSUBSWrr */ |
| 128677 | VR128, VR128, VR128, |
| 128678 | /* VPHSUBWDrm */ |
| 128679 | VR128, i128mem, |
| 128680 | /* VPHSUBWDrr */ |
| 128681 | VR128, VR128, |
| 128682 | /* VPHSUBWYrm */ |
| 128683 | VR256, VR256, i256mem, |
| 128684 | /* VPHSUBWYrr */ |
| 128685 | VR256, VR256, VR256, |
| 128686 | /* VPHSUBWrm */ |
| 128687 | VR128, VR128, i128mem, |
| 128688 | /* VPHSUBWrr */ |
| 128689 | VR128, VR128, VR128, |
| 128690 | /* VPINSRBZrmi */ |
| 128691 | VR128X, VR128X, i8mem, u8imm, |
| 128692 | /* VPINSRBZrri */ |
| 128693 | VR128X, VR128X, GR32orGR64, u8imm, |
| 128694 | /* VPINSRBrmi */ |
| 128695 | VR128, VR128, i8mem, u8imm, |
| 128696 | /* VPINSRBrri */ |
| 128697 | VR128, VR128, GR32orGR64, u8imm, |
| 128698 | /* VPINSRDZrmi */ |
| 128699 | VR128X, VR128X, i32mem, u8imm, |
| 128700 | /* VPINSRDZrri */ |
| 128701 | VR128X, VR128X, GR32, u8imm, |
| 128702 | /* VPINSRDrmi */ |
| 128703 | VR128, VR128, i32mem, u8imm, |
| 128704 | /* VPINSRDrri */ |
| 128705 | VR128, VR128, GR32, u8imm, |
| 128706 | /* VPINSRQZrmi */ |
| 128707 | VR128X, VR128X, i64mem, u8imm, |
| 128708 | /* VPINSRQZrri */ |
| 128709 | VR128X, VR128X, GR64, u8imm, |
| 128710 | /* VPINSRQrmi */ |
| 128711 | VR128, VR128, i64mem, u8imm, |
| 128712 | /* VPINSRQrri */ |
| 128713 | VR128, VR128, GR64, u8imm, |
| 128714 | /* VPINSRWZrmi */ |
| 128715 | VR128X, VR128X, i16mem, u8imm, |
| 128716 | /* VPINSRWZrri */ |
| 128717 | VR128X, VR128X, GR32orGR64, u8imm, |
| 128718 | /* VPINSRWrmi */ |
| 128719 | VR128, VR128, i16mem, u8imm, |
| 128720 | /* VPINSRWrri */ |
| 128721 | VR128, VR128, GR32orGR64, u8imm, |
| 128722 | /* VPLZCNTDZ128rm */ |
| 128723 | VR128X, i128mem, |
| 128724 | /* VPLZCNTDZ128rmb */ |
| 128725 | VR128X, i32mem, |
| 128726 | /* VPLZCNTDZ128rmbk */ |
| 128727 | VR128X, VR128X, VK4WM, i32mem, |
| 128728 | /* VPLZCNTDZ128rmbkz */ |
| 128729 | VR128X, VK4WM, i32mem, |
| 128730 | /* VPLZCNTDZ128rmk */ |
| 128731 | VR128X, VR128X, VK4WM, i128mem, |
| 128732 | /* VPLZCNTDZ128rmkz */ |
| 128733 | VR128X, VK4WM, i128mem, |
| 128734 | /* VPLZCNTDZ128rr */ |
| 128735 | VR128X, VR128X, |
| 128736 | /* VPLZCNTDZ128rrk */ |
| 128737 | VR128X, VR128X, VK4WM, VR128X, |
| 128738 | /* VPLZCNTDZ128rrkz */ |
| 128739 | VR128X, VK4WM, VR128X, |
| 128740 | /* VPLZCNTDZ256rm */ |
| 128741 | VR256X, i256mem, |
| 128742 | /* VPLZCNTDZ256rmb */ |
| 128743 | VR256X, i32mem, |
| 128744 | /* VPLZCNTDZ256rmbk */ |
| 128745 | VR256X, VR256X, VK8WM, i32mem, |
| 128746 | /* VPLZCNTDZ256rmbkz */ |
| 128747 | VR256X, VK8WM, i32mem, |
| 128748 | /* VPLZCNTDZ256rmk */ |
| 128749 | VR256X, VR256X, VK8WM, i256mem, |
| 128750 | /* VPLZCNTDZ256rmkz */ |
| 128751 | VR256X, VK8WM, i256mem, |
| 128752 | /* VPLZCNTDZ256rr */ |
| 128753 | VR256X, VR256X, |
| 128754 | /* VPLZCNTDZ256rrk */ |
| 128755 | VR256X, VR256X, VK8WM, VR256X, |
| 128756 | /* VPLZCNTDZ256rrkz */ |
| 128757 | VR256X, VK8WM, VR256X, |
| 128758 | /* VPLZCNTDZrm */ |
| 128759 | VR512, i512mem, |
| 128760 | /* VPLZCNTDZrmb */ |
| 128761 | VR512, i32mem, |
| 128762 | /* VPLZCNTDZrmbk */ |
| 128763 | VR512, VR512, VK16WM, i32mem, |
| 128764 | /* VPLZCNTDZrmbkz */ |
| 128765 | VR512, VK16WM, i32mem, |
| 128766 | /* VPLZCNTDZrmk */ |
| 128767 | VR512, VR512, VK16WM, i512mem, |
| 128768 | /* VPLZCNTDZrmkz */ |
| 128769 | VR512, VK16WM, i512mem, |
| 128770 | /* VPLZCNTDZrr */ |
| 128771 | VR512, VR512, |
| 128772 | /* VPLZCNTDZrrk */ |
| 128773 | VR512, VR512, VK16WM, VR512, |
| 128774 | /* VPLZCNTDZrrkz */ |
| 128775 | VR512, VK16WM, VR512, |
| 128776 | /* VPLZCNTQZ128rm */ |
| 128777 | VR128X, i128mem, |
| 128778 | /* VPLZCNTQZ128rmb */ |
| 128779 | VR128X, i64mem, |
| 128780 | /* VPLZCNTQZ128rmbk */ |
| 128781 | VR128X, VR128X, VK2WM, i64mem, |
| 128782 | /* VPLZCNTQZ128rmbkz */ |
| 128783 | VR128X, VK2WM, i64mem, |
| 128784 | /* VPLZCNTQZ128rmk */ |
| 128785 | VR128X, VR128X, VK2WM, i128mem, |
| 128786 | /* VPLZCNTQZ128rmkz */ |
| 128787 | VR128X, VK2WM, i128mem, |
| 128788 | /* VPLZCNTQZ128rr */ |
| 128789 | VR128X, VR128X, |
| 128790 | /* VPLZCNTQZ128rrk */ |
| 128791 | VR128X, VR128X, VK2WM, VR128X, |
| 128792 | /* VPLZCNTQZ128rrkz */ |
| 128793 | VR128X, VK2WM, VR128X, |
| 128794 | /* VPLZCNTQZ256rm */ |
| 128795 | VR256X, i256mem, |
| 128796 | /* VPLZCNTQZ256rmb */ |
| 128797 | VR256X, i64mem, |
| 128798 | /* VPLZCNTQZ256rmbk */ |
| 128799 | VR256X, VR256X, VK4WM, i64mem, |
| 128800 | /* VPLZCNTQZ256rmbkz */ |
| 128801 | VR256X, VK4WM, i64mem, |
| 128802 | /* VPLZCNTQZ256rmk */ |
| 128803 | VR256X, VR256X, VK4WM, i256mem, |
| 128804 | /* VPLZCNTQZ256rmkz */ |
| 128805 | VR256X, VK4WM, i256mem, |
| 128806 | /* VPLZCNTQZ256rr */ |
| 128807 | VR256X, VR256X, |
| 128808 | /* VPLZCNTQZ256rrk */ |
| 128809 | VR256X, VR256X, VK4WM, VR256X, |
| 128810 | /* VPLZCNTQZ256rrkz */ |
| 128811 | VR256X, VK4WM, VR256X, |
| 128812 | /* VPLZCNTQZrm */ |
| 128813 | VR512, i512mem, |
| 128814 | /* VPLZCNTQZrmb */ |
| 128815 | VR512, i64mem, |
| 128816 | /* VPLZCNTQZrmbk */ |
| 128817 | VR512, VR512, VK8WM, i64mem, |
| 128818 | /* VPLZCNTQZrmbkz */ |
| 128819 | VR512, VK8WM, i64mem, |
| 128820 | /* VPLZCNTQZrmk */ |
| 128821 | VR512, VR512, VK8WM, i512mem, |
| 128822 | /* VPLZCNTQZrmkz */ |
| 128823 | VR512, VK8WM, i512mem, |
| 128824 | /* VPLZCNTQZrr */ |
| 128825 | VR512, VR512, |
| 128826 | /* VPLZCNTQZrrk */ |
| 128827 | VR512, VR512, VK8WM, VR512, |
| 128828 | /* VPLZCNTQZrrkz */ |
| 128829 | VR512, VK8WM, VR512, |
| 128830 | /* VPMACSDDrm */ |
| 128831 | VR128, VR128, i128mem, VR128, |
| 128832 | /* VPMACSDDrr */ |
| 128833 | VR128, VR128, VR128, VR128, |
| 128834 | /* VPMACSDQHrm */ |
| 128835 | VR128, VR128, i128mem, VR128, |
| 128836 | /* VPMACSDQHrr */ |
| 128837 | VR128, VR128, VR128, VR128, |
| 128838 | /* VPMACSDQLrm */ |
| 128839 | VR128, VR128, i128mem, VR128, |
| 128840 | /* VPMACSDQLrr */ |
| 128841 | VR128, VR128, VR128, VR128, |
| 128842 | /* VPMACSSDDrm */ |
| 128843 | VR128, VR128, i128mem, VR128, |
| 128844 | /* VPMACSSDDrr */ |
| 128845 | VR128, VR128, VR128, VR128, |
| 128846 | /* VPMACSSDQHrm */ |
| 128847 | VR128, VR128, i128mem, VR128, |
| 128848 | /* VPMACSSDQHrr */ |
| 128849 | VR128, VR128, VR128, VR128, |
| 128850 | /* VPMACSSDQLrm */ |
| 128851 | VR128, VR128, i128mem, VR128, |
| 128852 | /* VPMACSSDQLrr */ |
| 128853 | VR128, VR128, VR128, VR128, |
| 128854 | /* VPMACSSWDrm */ |
| 128855 | VR128, VR128, i128mem, VR128, |
| 128856 | /* VPMACSSWDrr */ |
| 128857 | VR128, VR128, VR128, VR128, |
| 128858 | /* VPMACSSWWrm */ |
| 128859 | VR128, VR128, i128mem, VR128, |
| 128860 | /* VPMACSSWWrr */ |
| 128861 | VR128, VR128, VR128, VR128, |
| 128862 | /* VPMACSWDrm */ |
| 128863 | VR128, VR128, i128mem, VR128, |
| 128864 | /* VPMACSWDrr */ |
| 128865 | VR128, VR128, VR128, VR128, |
| 128866 | /* VPMACSWWrm */ |
| 128867 | VR128, VR128, i128mem, VR128, |
| 128868 | /* VPMACSWWrr */ |
| 128869 | VR128, VR128, VR128, VR128, |
| 128870 | /* VPMADCSSWDrm */ |
| 128871 | VR128, VR128, i128mem, VR128, |
| 128872 | /* VPMADCSSWDrr */ |
| 128873 | VR128, VR128, VR128, VR128, |
| 128874 | /* VPMADCSWDrm */ |
| 128875 | VR128, VR128, i128mem, VR128, |
| 128876 | /* VPMADCSWDrr */ |
| 128877 | VR128, VR128, VR128, VR128, |
| 128878 | /* VPMADD52HUQYrm */ |
| 128879 | VR256, VR256, VR256, i256mem, |
| 128880 | /* VPMADD52HUQYrr */ |
| 128881 | VR256, VR256, VR256, VR256, |
| 128882 | /* VPMADD52HUQZ128m */ |
| 128883 | VR128X, VR128X, VR128X, i128mem, |
| 128884 | /* VPMADD52HUQZ128mb */ |
| 128885 | VR128X, VR128X, VR128X, i64mem, |
| 128886 | /* VPMADD52HUQZ128mbk */ |
| 128887 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 128888 | /* VPMADD52HUQZ128mbkz */ |
| 128889 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 128890 | /* VPMADD52HUQZ128mk */ |
| 128891 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 128892 | /* VPMADD52HUQZ128mkz */ |
| 128893 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 128894 | /* VPMADD52HUQZ128r */ |
| 128895 | VR128X, VR128X, VR128X, VR128X, |
| 128896 | /* VPMADD52HUQZ128rk */ |
| 128897 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 128898 | /* VPMADD52HUQZ128rkz */ |
| 128899 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 128900 | /* VPMADD52HUQZ256m */ |
| 128901 | VR256X, VR256X, VR256X, i256mem, |
| 128902 | /* VPMADD52HUQZ256mb */ |
| 128903 | VR256X, VR256X, VR256X, i64mem, |
| 128904 | /* VPMADD52HUQZ256mbk */ |
| 128905 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 128906 | /* VPMADD52HUQZ256mbkz */ |
| 128907 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 128908 | /* VPMADD52HUQZ256mk */ |
| 128909 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 128910 | /* VPMADD52HUQZ256mkz */ |
| 128911 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 128912 | /* VPMADD52HUQZ256r */ |
| 128913 | VR256X, VR256X, VR256X, VR256X, |
| 128914 | /* VPMADD52HUQZ256rk */ |
| 128915 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 128916 | /* VPMADD52HUQZ256rkz */ |
| 128917 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 128918 | /* VPMADD52HUQZm */ |
| 128919 | VR512, VR512, VR512, i512mem, |
| 128920 | /* VPMADD52HUQZmb */ |
| 128921 | VR512, VR512, VR512, i64mem, |
| 128922 | /* VPMADD52HUQZmbk */ |
| 128923 | VR512, VR512, VK8WM, VR512, i64mem, |
| 128924 | /* VPMADD52HUQZmbkz */ |
| 128925 | VR512, VR512, VK8WM, VR512, i64mem, |
| 128926 | /* VPMADD52HUQZmk */ |
| 128927 | VR512, VR512, VK8WM, VR512, i512mem, |
| 128928 | /* VPMADD52HUQZmkz */ |
| 128929 | VR512, VR512, VK8WM, VR512, i512mem, |
| 128930 | /* VPMADD52HUQZr */ |
| 128931 | VR512, VR512, VR512, VR512, |
| 128932 | /* VPMADD52HUQZrk */ |
| 128933 | VR512, VR512, VK8WM, VR512, VR512, |
| 128934 | /* VPMADD52HUQZrkz */ |
| 128935 | VR512, VR512, VK8WM, VR512, VR512, |
| 128936 | /* VPMADD52HUQrm */ |
| 128937 | VR128, VR128, VR128, i128mem, |
| 128938 | /* VPMADD52HUQrr */ |
| 128939 | VR128, VR128, VR128, VR128, |
| 128940 | /* VPMADD52LUQYrm */ |
| 128941 | VR256, VR256, VR256, i256mem, |
| 128942 | /* VPMADD52LUQYrr */ |
| 128943 | VR256, VR256, VR256, VR256, |
| 128944 | /* VPMADD52LUQZ128m */ |
| 128945 | VR128X, VR128X, VR128X, i128mem, |
| 128946 | /* VPMADD52LUQZ128mb */ |
| 128947 | VR128X, VR128X, VR128X, i64mem, |
| 128948 | /* VPMADD52LUQZ128mbk */ |
| 128949 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 128950 | /* VPMADD52LUQZ128mbkz */ |
| 128951 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 128952 | /* VPMADD52LUQZ128mk */ |
| 128953 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 128954 | /* VPMADD52LUQZ128mkz */ |
| 128955 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 128956 | /* VPMADD52LUQZ128r */ |
| 128957 | VR128X, VR128X, VR128X, VR128X, |
| 128958 | /* VPMADD52LUQZ128rk */ |
| 128959 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 128960 | /* VPMADD52LUQZ128rkz */ |
| 128961 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 128962 | /* VPMADD52LUQZ256m */ |
| 128963 | VR256X, VR256X, VR256X, i256mem, |
| 128964 | /* VPMADD52LUQZ256mb */ |
| 128965 | VR256X, VR256X, VR256X, i64mem, |
| 128966 | /* VPMADD52LUQZ256mbk */ |
| 128967 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 128968 | /* VPMADD52LUQZ256mbkz */ |
| 128969 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 128970 | /* VPMADD52LUQZ256mk */ |
| 128971 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 128972 | /* VPMADD52LUQZ256mkz */ |
| 128973 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 128974 | /* VPMADD52LUQZ256r */ |
| 128975 | VR256X, VR256X, VR256X, VR256X, |
| 128976 | /* VPMADD52LUQZ256rk */ |
| 128977 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 128978 | /* VPMADD52LUQZ256rkz */ |
| 128979 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 128980 | /* VPMADD52LUQZm */ |
| 128981 | VR512, VR512, VR512, i512mem, |
| 128982 | /* VPMADD52LUQZmb */ |
| 128983 | VR512, VR512, VR512, i64mem, |
| 128984 | /* VPMADD52LUQZmbk */ |
| 128985 | VR512, VR512, VK8WM, VR512, i64mem, |
| 128986 | /* VPMADD52LUQZmbkz */ |
| 128987 | VR512, VR512, VK8WM, VR512, i64mem, |
| 128988 | /* VPMADD52LUQZmk */ |
| 128989 | VR512, VR512, VK8WM, VR512, i512mem, |
| 128990 | /* VPMADD52LUQZmkz */ |
| 128991 | VR512, VR512, VK8WM, VR512, i512mem, |
| 128992 | /* VPMADD52LUQZr */ |
| 128993 | VR512, VR512, VR512, VR512, |
| 128994 | /* VPMADD52LUQZrk */ |
| 128995 | VR512, VR512, VK8WM, VR512, VR512, |
| 128996 | /* VPMADD52LUQZrkz */ |
| 128997 | VR512, VR512, VK8WM, VR512, VR512, |
| 128998 | /* VPMADD52LUQrm */ |
| 128999 | VR128, VR128, VR128, i128mem, |
| 129000 | /* VPMADD52LUQrr */ |
| 129001 | VR128, VR128, VR128, VR128, |
| 129002 | /* VPMADDUBSWYrm */ |
| 129003 | VR256, VR256, i256mem, |
| 129004 | /* VPMADDUBSWYrr */ |
| 129005 | VR256, VR256, VR256, |
| 129006 | /* VPMADDUBSWZ128rm */ |
| 129007 | VR128X, VR128X, i128mem, |
| 129008 | /* VPMADDUBSWZ128rmk */ |
| 129009 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 129010 | /* VPMADDUBSWZ128rmkz */ |
| 129011 | VR128X, VK8WM, VR128X, i128mem, |
| 129012 | /* VPMADDUBSWZ128rr */ |
| 129013 | VR128X, VR128X, VR128X, |
| 129014 | /* VPMADDUBSWZ128rrk */ |
| 129015 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 129016 | /* VPMADDUBSWZ128rrkz */ |
| 129017 | VR128X, VK8WM, VR128X, VR128X, |
| 129018 | /* VPMADDUBSWZ256rm */ |
| 129019 | VR256X, VR256X, i256mem, |
| 129020 | /* VPMADDUBSWZ256rmk */ |
| 129021 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 129022 | /* VPMADDUBSWZ256rmkz */ |
| 129023 | VR256X, VK16WM, VR256X, i256mem, |
| 129024 | /* VPMADDUBSWZ256rr */ |
| 129025 | VR256X, VR256X, VR256X, |
| 129026 | /* VPMADDUBSWZ256rrk */ |
| 129027 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 129028 | /* VPMADDUBSWZ256rrkz */ |
| 129029 | VR256X, VK16WM, VR256X, VR256X, |
| 129030 | /* VPMADDUBSWZrm */ |
| 129031 | VR512, VR512, i512mem, |
| 129032 | /* VPMADDUBSWZrmk */ |
| 129033 | VR512, VR512, VK32WM, VR512, i512mem, |
| 129034 | /* VPMADDUBSWZrmkz */ |
| 129035 | VR512, VK32WM, VR512, i512mem, |
| 129036 | /* VPMADDUBSWZrr */ |
| 129037 | VR512, VR512, VR512, |
| 129038 | /* VPMADDUBSWZrrk */ |
| 129039 | VR512, VR512, VK32WM, VR512, VR512, |
| 129040 | /* VPMADDUBSWZrrkz */ |
| 129041 | VR512, VK32WM, VR512, VR512, |
| 129042 | /* VPMADDUBSWrm */ |
| 129043 | VR128, VR128, i128mem, |
| 129044 | /* VPMADDUBSWrr */ |
| 129045 | VR128, VR128, VR128, |
| 129046 | /* VPMADDWDYrm */ |
| 129047 | VR256, VR256, i256mem, |
| 129048 | /* VPMADDWDYrr */ |
| 129049 | VR256, VR256, VR256, |
| 129050 | /* VPMADDWDZ128rm */ |
| 129051 | VR128X, VR128X, i128mem, |
| 129052 | /* VPMADDWDZ128rmk */ |
| 129053 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 129054 | /* VPMADDWDZ128rmkz */ |
| 129055 | VR128X, VK4WM, VR128X, i128mem, |
| 129056 | /* VPMADDWDZ128rr */ |
| 129057 | VR128X, VR128X, VR128X, |
| 129058 | /* VPMADDWDZ128rrk */ |
| 129059 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 129060 | /* VPMADDWDZ128rrkz */ |
| 129061 | VR128X, VK4WM, VR128X, VR128X, |
| 129062 | /* VPMADDWDZ256rm */ |
| 129063 | VR256X, VR256X, i256mem, |
| 129064 | /* VPMADDWDZ256rmk */ |
| 129065 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 129066 | /* VPMADDWDZ256rmkz */ |
| 129067 | VR256X, VK8WM, VR256X, i256mem, |
| 129068 | /* VPMADDWDZ256rr */ |
| 129069 | VR256X, VR256X, VR256X, |
| 129070 | /* VPMADDWDZ256rrk */ |
| 129071 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 129072 | /* VPMADDWDZ256rrkz */ |
| 129073 | VR256X, VK8WM, VR256X, VR256X, |
| 129074 | /* VPMADDWDZrm */ |
| 129075 | VR512, VR512, i512mem, |
| 129076 | /* VPMADDWDZrmk */ |
| 129077 | VR512, VR512, VK16WM, VR512, i512mem, |
| 129078 | /* VPMADDWDZrmkz */ |
| 129079 | VR512, VK16WM, VR512, i512mem, |
| 129080 | /* VPMADDWDZrr */ |
| 129081 | VR512, VR512, VR512, |
| 129082 | /* VPMADDWDZrrk */ |
| 129083 | VR512, VR512, VK16WM, VR512, VR512, |
| 129084 | /* VPMADDWDZrrkz */ |
| 129085 | VR512, VK16WM, VR512, VR512, |
| 129086 | /* VPMADDWDrm */ |
| 129087 | VR128, VR128, i128mem, |
| 129088 | /* VPMADDWDrr */ |
| 129089 | VR128, VR128, VR128, |
| 129090 | /* VPMASKMOVDYmr */ |
| 129091 | i256mem, VR256, VR256, |
| 129092 | /* VPMASKMOVDYrm */ |
| 129093 | VR256, VR256, i256mem, |
| 129094 | /* VPMASKMOVDmr */ |
| 129095 | i128mem, VR128, VR128, |
| 129096 | /* VPMASKMOVDrm */ |
| 129097 | VR128, VR128, i128mem, |
| 129098 | /* VPMASKMOVQYmr */ |
| 129099 | i256mem, VR256, VR256, |
| 129100 | /* VPMASKMOVQYrm */ |
| 129101 | VR256, VR256, i256mem, |
| 129102 | /* VPMASKMOVQmr */ |
| 129103 | i128mem, VR128, VR128, |
| 129104 | /* VPMASKMOVQrm */ |
| 129105 | VR128, VR128, i128mem, |
| 129106 | /* VPMAXSBYrm */ |
| 129107 | VR256, VR256, i256mem, |
| 129108 | /* VPMAXSBYrr */ |
| 129109 | VR256, VR256, VR256, |
| 129110 | /* VPMAXSBZ128rm */ |
| 129111 | VR128X, VR128X, i128mem, |
| 129112 | /* VPMAXSBZ128rmk */ |
| 129113 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 129114 | /* VPMAXSBZ128rmkz */ |
| 129115 | VR128X, VK16WM, VR128X, i128mem, |
| 129116 | /* VPMAXSBZ128rr */ |
| 129117 | VR128X, VR128X, VR128X, |
| 129118 | /* VPMAXSBZ128rrk */ |
| 129119 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 129120 | /* VPMAXSBZ128rrkz */ |
| 129121 | VR128X, VK16WM, VR128X, VR128X, |
| 129122 | /* VPMAXSBZ256rm */ |
| 129123 | VR256X, VR256X, i256mem, |
| 129124 | /* VPMAXSBZ256rmk */ |
| 129125 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 129126 | /* VPMAXSBZ256rmkz */ |
| 129127 | VR256X, VK32WM, VR256X, i256mem, |
| 129128 | /* VPMAXSBZ256rr */ |
| 129129 | VR256X, VR256X, VR256X, |
| 129130 | /* VPMAXSBZ256rrk */ |
| 129131 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 129132 | /* VPMAXSBZ256rrkz */ |
| 129133 | VR256X, VK32WM, VR256X, VR256X, |
| 129134 | /* VPMAXSBZrm */ |
| 129135 | VR512, VR512, i512mem, |
| 129136 | /* VPMAXSBZrmk */ |
| 129137 | VR512, VR512, VK64WM, VR512, i512mem, |
| 129138 | /* VPMAXSBZrmkz */ |
| 129139 | VR512, VK64WM, VR512, i512mem, |
| 129140 | /* VPMAXSBZrr */ |
| 129141 | VR512, VR512, VR512, |
| 129142 | /* VPMAXSBZrrk */ |
| 129143 | VR512, VR512, VK64WM, VR512, VR512, |
| 129144 | /* VPMAXSBZrrkz */ |
| 129145 | VR512, VK64WM, VR512, VR512, |
| 129146 | /* VPMAXSBrm */ |
| 129147 | VR128, VR128, i128mem, |
| 129148 | /* VPMAXSBrr */ |
| 129149 | VR128, VR128, VR128, |
| 129150 | /* VPMAXSDYrm */ |
| 129151 | VR256, VR256, i256mem, |
| 129152 | /* VPMAXSDYrr */ |
| 129153 | VR256, VR256, VR256, |
| 129154 | /* VPMAXSDZ128rm */ |
| 129155 | VR128X, VR128X, i128mem, |
| 129156 | /* VPMAXSDZ128rmb */ |
| 129157 | VR128X, VR128X, i32mem, |
| 129158 | /* VPMAXSDZ128rmbk */ |
| 129159 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 129160 | /* VPMAXSDZ128rmbkz */ |
| 129161 | VR128X, VK4WM, VR128X, i32mem, |
| 129162 | /* VPMAXSDZ128rmk */ |
| 129163 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 129164 | /* VPMAXSDZ128rmkz */ |
| 129165 | VR128X, VK4WM, VR128X, i128mem, |
| 129166 | /* VPMAXSDZ128rr */ |
| 129167 | VR128X, VR128X, VR128X, |
| 129168 | /* VPMAXSDZ128rrk */ |
| 129169 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 129170 | /* VPMAXSDZ128rrkz */ |
| 129171 | VR128X, VK4WM, VR128X, VR128X, |
| 129172 | /* VPMAXSDZ256rm */ |
| 129173 | VR256X, VR256X, i256mem, |
| 129174 | /* VPMAXSDZ256rmb */ |
| 129175 | VR256X, VR256X, i32mem, |
| 129176 | /* VPMAXSDZ256rmbk */ |
| 129177 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 129178 | /* VPMAXSDZ256rmbkz */ |
| 129179 | VR256X, VK8WM, VR256X, i32mem, |
| 129180 | /* VPMAXSDZ256rmk */ |
| 129181 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 129182 | /* VPMAXSDZ256rmkz */ |
| 129183 | VR256X, VK8WM, VR256X, i256mem, |
| 129184 | /* VPMAXSDZ256rr */ |
| 129185 | VR256X, VR256X, VR256X, |
| 129186 | /* VPMAXSDZ256rrk */ |
| 129187 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 129188 | /* VPMAXSDZ256rrkz */ |
| 129189 | VR256X, VK8WM, VR256X, VR256X, |
| 129190 | /* VPMAXSDZrm */ |
| 129191 | VR512, VR512, i512mem, |
| 129192 | /* VPMAXSDZrmb */ |
| 129193 | VR512, VR512, i32mem, |
| 129194 | /* VPMAXSDZrmbk */ |
| 129195 | VR512, VR512, VK16WM, VR512, i32mem, |
| 129196 | /* VPMAXSDZrmbkz */ |
| 129197 | VR512, VK16WM, VR512, i32mem, |
| 129198 | /* VPMAXSDZrmk */ |
| 129199 | VR512, VR512, VK16WM, VR512, i512mem, |
| 129200 | /* VPMAXSDZrmkz */ |
| 129201 | VR512, VK16WM, VR512, i512mem, |
| 129202 | /* VPMAXSDZrr */ |
| 129203 | VR512, VR512, VR512, |
| 129204 | /* VPMAXSDZrrk */ |
| 129205 | VR512, VR512, VK16WM, VR512, VR512, |
| 129206 | /* VPMAXSDZrrkz */ |
| 129207 | VR512, VK16WM, VR512, VR512, |
| 129208 | /* VPMAXSDrm */ |
| 129209 | VR128, VR128, i128mem, |
| 129210 | /* VPMAXSDrr */ |
| 129211 | VR128, VR128, VR128, |
| 129212 | /* VPMAXSQZ128rm */ |
| 129213 | VR128X, VR128X, i128mem, |
| 129214 | /* VPMAXSQZ128rmb */ |
| 129215 | VR128X, VR128X, i64mem, |
| 129216 | /* VPMAXSQZ128rmbk */ |
| 129217 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 129218 | /* VPMAXSQZ128rmbkz */ |
| 129219 | VR128X, VK2WM, VR128X, i64mem, |
| 129220 | /* VPMAXSQZ128rmk */ |
| 129221 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 129222 | /* VPMAXSQZ128rmkz */ |
| 129223 | VR128X, VK2WM, VR128X, i128mem, |
| 129224 | /* VPMAXSQZ128rr */ |
| 129225 | VR128X, VR128X, VR128X, |
| 129226 | /* VPMAXSQZ128rrk */ |
| 129227 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 129228 | /* VPMAXSQZ128rrkz */ |
| 129229 | VR128X, VK2WM, VR128X, VR128X, |
| 129230 | /* VPMAXSQZ256rm */ |
| 129231 | VR256X, VR256X, i256mem, |
| 129232 | /* VPMAXSQZ256rmb */ |
| 129233 | VR256X, VR256X, i64mem, |
| 129234 | /* VPMAXSQZ256rmbk */ |
| 129235 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 129236 | /* VPMAXSQZ256rmbkz */ |
| 129237 | VR256X, VK4WM, VR256X, i64mem, |
| 129238 | /* VPMAXSQZ256rmk */ |
| 129239 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 129240 | /* VPMAXSQZ256rmkz */ |
| 129241 | VR256X, VK4WM, VR256X, i256mem, |
| 129242 | /* VPMAXSQZ256rr */ |
| 129243 | VR256X, VR256X, VR256X, |
| 129244 | /* VPMAXSQZ256rrk */ |
| 129245 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 129246 | /* VPMAXSQZ256rrkz */ |
| 129247 | VR256X, VK4WM, VR256X, VR256X, |
| 129248 | /* VPMAXSQZrm */ |
| 129249 | VR512, VR512, i512mem, |
| 129250 | /* VPMAXSQZrmb */ |
| 129251 | VR512, VR512, i64mem, |
| 129252 | /* VPMAXSQZrmbk */ |
| 129253 | VR512, VR512, VK8WM, VR512, i64mem, |
| 129254 | /* VPMAXSQZrmbkz */ |
| 129255 | VR512, VK8WM, VR512, i64mem, |
| 129256 | /* VPMAXSQZrmk */ |
| 129257 | VR512, VR512, VK8WM, VR512, i512mem, |
| 129258 | /* VPMAXSQZrmkz */ |
| 129259 | VR512, VK8WM, VR512, i512mem, |
| 129260 | /* VPMAXSQZrr */ |
| 129261 | VR512, VR512, VR512, |
| 129262 | /* VPMAXSQZrrk */ |
| 129263 | VR512, VR512, VK8WM, VR512, VR512, |
| 129264 | /* VPMAXSQZrrkz */ |
| 129265 | VR512, VK8WM, VR512, VR512, |
| 129266 | /* VPMAXSWYrm */ |
| 129267 | VR256, VR256, i256mem, |
| 129268 | /* VPMAXSWYrr */ |
| 129269 | VR256, VR256, VR256, |
| 129270 | /* VPMAXSWZ128rm */ |
| 129271 | VR128X, VR128X, i128mem, |
| 129272 | /* VPMAXSWZ128rmk */ |
| 129273 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 129274 | /* VPMAXSWZ128rmkz */ |
| 129275 | VR128X, VK8WM, VR128X, i128mem, |
| 129276 | /* VPMAXSWZ128rr */ |
| 129277 | VR128X, VR128X, VR128X, |
| 129278 | /* VPMAXSWZ128rrk */ |
| 129279 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 129280 | /* VPMAXSWZ128rrkz */ |
| 129281 | VR128X, VK8WM, VR128X, VR128X, |
| 129282 | /* VPMAXSWZ256rm */ |
| 129283 | VR256X, VR256X, i256mem, |
| 129284 | /* VPMAXSWZ256rmk */ |
| 129285 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 129286 | /* VPMAXSWZ256rmkz */ |
| 129287 | VR256X, VK16WM, VR256X, i256mem, |
| 129288 | /* VPMAXSWZ256rr */ |
| 129289 | VR256X, VR256X, VR256X, |
| 129290 | /* VPMAXSWZ256rrk */ |
| 129291 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 129292 | /* VPMAXSWZ256rrkz */ |
| 129293 | VR256X, VK16WM, VR256X, VR256X, |
| 129294 | /* VPMAXSWZrm */ |
| 129295 | VR512, VR512, i512mem, |
| 129296 | /* VPMAXSWZrmk */ |
| 129297 | VR512, VR512, VK32WM, VR512, i512mem, |
| 129298 | /* VPMAXSWZrmkz */ |
| 129299 | VR512, VK32WM, VR512, i512mem, |
| 129300 | /* VPMAXSWZrr */ |
| 129301 | VR512, VR512, VR512, |
| 129302 | /* VPMAXSWZrrk */ |
| 129303 | VR512, VR512, VK32WM, VR512, VR512, |
| 129304 | /* VPMAXSWZrrkz */ |
| 129305 | VR512, VK32WM, VR512, VR512, |
| 129306 | /* VPMAXSWrm */ |
| 129307 | VR128, VR128, i128mem, |
| 129308 | /* VPMAXSWrr */ |
| 129309 | VR128, VR128, VR128, |
| 129310 | /* VPMAXUBYrm */ |
| 129311 | VR256, VR256, i256mem, |
| 129312 | /* VPMAXUBYrr */ |
| 129313 | VR256, VR256, VR256, |
| 129314 | /* VPMAXUBZ128rm */ |
| 129315 | VR128X, VR128X, i128mem, |
| 129316 | /* VPMAXUBZ128rmk */ |
| 129317 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 129318 | /* VPMAXUBZ128rmkz */ |
| 129319 | VR128X, VK16WM, VR128X, i128mem, |
| 129320 | /* VPMAXUBZ128rr */ |
| 129321 | VR128X, VR128X, VR128X, |
| 129322 | /* VPMAXUBZ128rrk */ |
| 129323 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 129324 | /* VPMAXUBZ128rrkz */ |
| 129325 | VR128X, VK16WM, VR128X, VR128X, |
| 129326 | /* VPMAXUBZ256rm */ |
| 129327 | VR256X, VR256X, i256mem, |
| 129328 | /* VPMAXUBZ256rmk */ |
| 129329 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 129330 | /* VPMAXUBZ256rmkz */ |
| 129331 | VR256X, VK32WM, VR256X, i256mem, |
| 129332 | /* VPMAXUBZ256rr */ |
| 129333 | VR256X, VR256X, VR256X, |
| 129334 | /* VPMAXUBZ256rrk */ |
| 129335 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 129336 | /* VPMAXUBZ256rrkz */ |
| 129337 | VR256X, VK32WM, VR256X, VR256X, |
| 129338 | /* VPMAXUBZrm */ |
| 129339 | VR512, VR512, i512mem, |
| 129340 | /* VPMAXUBZrmk */ |
| 129341 | VR512, VR512, VK64WM, VR512, i512mem, |
| 129342 | /* VPMAXUBZrmkz */ |
| 129343 | VR512, VK64WM, VR512, i512mem, |
| 129344 | /* VPMAXUBZrr */ |
| 129345 | VR512, VR512, VR512, |
| 129346 | /* VPMAXUBZrrk */ |
| 129347 | VR512, VR512, VK64WM, VR512, VR512, |
| 129348 | /* VPMAXUBZrrkz */ |
| 129349 | VR512, VK64WM, VR512, VR512, |
| 129350 | /* VPMAXUBrm */ |
| 129351 | VR128, VR128, i128mem, |
| 129352 | /* VPMAXUBrr */ |
| 129353 | VR128, VR128, VR128, |
| 129354 | /* VPMAXUDYrm */ |
| 129355 | VR256, VR256, i256mem, |
| 129356 | /* VPMAXUDYrr */ |
| 129357 | VR256, VR256, VR256, |
| 129358 | /* VPMAXUDZ128rm */ |
| 129359 | VR128X, VR128X, i128mem, |
| 129360 | /* VPMAXUDZ128rmb */ |
| 129361 | VR128X, VR128X, i32mem, |
| 129362 | /* VPMAXUDZ128rmbk */ |
| 129363 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 129364 | /* VPMAXUDZ128rmbkz */ |
| 129365 | VR128X, VK4WM, VR128X, i32mem, |
| 129366 | /* VPMAXUDZ128rmk */ |
| 129367 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 129368 | /* VPMAXUDZ128rmkz */ |
| 129369 | VR128X, VK4WM, VR128X, i128mem, |
| 129370 | /* VPMAXUDZ128rr */ |
| 129371 | VR128X, VR128X, VR128X, |
| 129372 | /* VPMAXUDZ128rrk */ |
| 129373 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 129374 | /* VPMAXUDZ128rrkz */ |
| 129375 | VR128X, VK4WM, VR128X, VR128X, |
| 129376 | /* VPMAXUDZ256rm */ |
| 129377 | VR256X, VR256X, i256mem, |
| 129378 | /* VPMAXUDZ256rmb */ |
| 129379 | VR256X, VR256X, i32mem, |
| 129380 | /* VPMAXUDZ256rmbk */ |
| 129381 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 129382 | /* VPMAXUDZ256rmbkz */ |
| 129383 | VR256X, VK8WM, VR256X, i32mem, |
| 129384 | /* VPMAXUDZ256rmk */ |
| 129385 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 129386 | /* VPMAXUDZ256rmkz */ |
| 129387 | VR256X, VK8WM, VR256X, i256mem, |
| 129388 | /* VPMAXUDZ256rr */ |
| 129389 | VR256X, VR256X, VR256X, |
| 129390 | /* VPMAXUDZ256rrk */ |
| 129391 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 129392 | /* VPMAXUDZ256rrkz */ |
| 129393 | VR256X, VK8WM, VR256X, VR256X, |
| 129394 | /* VPMAXUDZrm */ |
| 129395 | VR512, VR512, i512mem, |
| 129396 | /* VPMAXUDZrmb */ |
| 129397 | VR512, VR512, i32mem, |
| 129398 | /* VPMAXUDZrmbk */ |
| 129399 | VR512, VR512, VK16WM, VR512, i32mem, |
| 129400 | /* VPMAXUDZrmbkz */ |
| 129401 | VR512, VK16WM, VR512, i32mem, |
| 129402 | /* VPMAXUDZrmk */ |
| 129403 | VR512, VR512, VK16WM, VR512, i512mem, |
| 129404 | /* VPMAXUDZrmkz */ |
| 129405 | VR512, VK16WM, VR512, i512mem, |
| 129406 | /* VPMAXUDZrr */ |
| 129407 | VR512, VR512, VR512, |
| 129408 | /* VPMAXUDZrrk */ |
| 129409 | VR512, VR512, VK16WM, VR512, VR512, |
| 129410 | /* VPMAXUDZrrkz */ |
| 129411 | VR512, VK16WM, VR512, VR512, |
| 129412 | /* VPMAXUDrm */ |
| 129413 | VR128, VR128, i128mem, |
| 129414 | /* VPMAXUDrr */ |
| 129415 | VR128, VR128, VR128, |
| 129416 | /* VPMAXUQZ128rm */ |
| 129417 | VR128X, VR128X, i128mem, |
| 129418 | /* VPMAXUQZ128rmb */ |
| 129419 | VR128X, VR128X, i64mem, |
| 129420 | /* VPMAXUQZ128rmbk */ |
| 129421 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 129422 | /* VPMAXUQZ128rmbkz */ |
| 129423 | VR128X, VK2WM, VR128X, i64mem, |
| 129424 | /* VPMAXUQZ128rmk */ |
| 129425 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 129426 | /* VPMAXUQZ128rmkz */ |
| 129427 | VR128X, VK2WM, VR128X, i128mem, |
| 129428 | /* VPMAXUQZ128rr */ |
| 129429 | VR128X, VR128X, VR128X, |
| 129430 | /* VPMAXUQZ128rrk */ |
| 129431 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 129432 | /* VPMAXUQZ128rrkz */ |
| 129433 | VR128X, VK2WM, VR128X, VR128X, |
| 129434 | /* VPMAXUQZ256rm */ |
| 129435 | VR256X, VR256X, i256mem, |
| 129436 | /* VPMAXUQZ256rmb */ |
| 129437 | VR256X, VR256X, i64mem, |
| 129438 | /* VPMAXUQZ256rmbk */ |
| 129439 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 129440 | /* VPMAXUQZ256rmbkz */ |
| 129441 | VR256X, VK4WM, VR256X, i64mem, |
| 129442 | /* VPMAXUQZ256rmk */ |
| 129443 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 129444 | /* VPMAXUQZ256rmkz */ |
| 129445 | VR256X, VK4WM, VR256X, i256mem, |
| 129446 | /* VPMAXUQZ256rr */ |
| 129447 | VR256X, VR256X, VR256X, |
| 129448 | /* VPMAXUQZ256rrk */ |
| 129449 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 129450 | /* VPMAXUQZ256rrkz */ |
| 129451 | VR256X, VK4WM, VR256X, VR256X, |
| 129452 | /* VPMAXUQZrm */ |
| 129453 | VR512, VR512, i512mem, |
| 129454 | /* VPMAXUQZrmb */ |
| 129455 | VR512, VR512, i64mem, |
| 129456 | /* VPMAXUQZrmbk */ |
| 129457 | VR512, VR512, VK8WM, VR512, i64mem, |
| 129458 | /* VPMAXUQZrmbkz */ |
| 129459 | VR512, VK8WM, VR512, i64mem, |
| 129460 | /* VPMAXUQZrmk */ |
| 129461 | VR512, VR512, VK8WM, VR512, i512mem, |
| 129462 | /* VPMAXUQZrmkz */ |
| 129463 | VR512, VK8WM, VR512, i512mem, |
| 129464 | /* VPMAXUQZrr */ |
| 129465 | VR512, VR512, VR512, |
| 129466 | /* VPMAXUQZrrk */ |
| 129467 | VR512, VR512, VK8WM, VR512, VR512, |
| 129468 | /* VPMAXUQZrrkz */ |
| 129469 | VR512, VK8WM, VR512, VR512, |
| 129470 | /* VPMAXUWYrm */ |
| 129471 | VR256, VR256, i256mem, |
| 129472 | /* VPMAXUWYrr */ |
| 129473 | VR256, VR256, VR256, |
| 129474 | /* VPMAXUWZ128rm */ |
| 129475 | VR128X, VR128X, i128mem, |
| 129476 | /* VPMAXUWZ128rmk */ |
| 129477 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 129478 | /* VPMAXUWZ128rmkz */ |
| 129479 | VR128X, VK8WM, VR128X, i128mem, |
| 129480 | /* VPMAXUWZ128rr */ |
| 129481 | VR128X, VR128X, VR128X, |
| 129482 | /* VPMAXUWZ128rrk */ |
| 129483 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 129484 | /* VPMAXUWZ128rrkz */ |
| 129485 | VR128X, VK8WM, VR128X, VR128X, |
| 129486 | /* VPMAXUWZ256rm */ |
| 129487 | VR256X, VR256X, i256mem, |
| 129488 | /* VPMAXUWZ256rmk */ |
| 129489 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 129490 | /* VPMAXUWZ256rmkz */ |
| 129491 | VR256X, VK16WM, VR256X, i256mem, |
| 129492 | /* VPMAXUWZ256rr */ |
| 129493 | VR256X, VR256X, VR256X, |
| 129494 | /* VPMAXUWZ256rrk */ |
| 129495 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 129496 | /* VPMAXUWZ256rrkz */ |
| 129497 | VR256X, VK16WM, VR256X, VR256X, |
| 129498 | /* VPMAXUWZrm */ |
| 129499 | VR512, VR512, i512mem, |
| 129500 | /* VPMAXUWZrmk */ |
| 129501 | VR512, VR512, VK32WM, VR512, i512mem, |
| 129502 | /* VPMAXUWZrmkz */ |
| 129503 | VR512, VK32WM, VR512, i512mem, |
| 129504 | /* VPMAXUWZrr */ |
| 129505 | VR512, VR512, VR512, |
| 129506 | /* VPMAXUWZrrk */ |
| 129507 | VR512, VR512, VK32WM, VR512, VR512, |
| 129508 | /* VPMAXUWZrrkz */ |
| 129509 | VR512, VK32WM, VR512, VR512, |
| 129510 | /* VPMAXUWrm */ |
| 129511 | VR128, VR128, i128mem, |
| 129512 | /* VPMAXUWrr */ |
| 129513 | VR128, VR128, VR128, |
| 129514 | /* VPMINSBYrm */ |
| 129515 | VR256, VR256, i256mem, |
| 129516 | /* VPMINSBYrr */ |
| 129517 | VR256, VR256, VR256, |
| 129518 | /* VPMINSBZ128rm */ |
| 129519 | VR128X, VR128X, i128mem, |
| 129520 | /* VPMINSBZ128rmk */ |
| 129521 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 129522 | /* VPMINSBZ128rmkz */ |
| 129523 | VR128X, VK16WM, VR128X, i128mem, |
| 129524 | /* VPMINSBZ128rr */ |
| 129525 | VR128X, VR128X, VR128X, |
| 129526 | /* VPMINSBZ128rrk */ |
| 129527 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 129528 | /* VPMINSBZ128rrkz */ |
| 129529 | VR128X, VK16WM, VR128X, VR128X, |
| 129530 | /* VPMINSBZ256rm */ |
| 129531 | VR256X, VR256X, i256mem, |
| 129532 | /* VPMINSBZ256rmk */ |
| 129533 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 129534 | /* VPMINSBZ256rmkz */ |
| 129535 | VR256X, VK32WM, VR256X, i256mem, |
| 129536 | /* VPMINSBZ256rr */ |
| 129537 | VR256X, VR256X, VR256X, |
| 129538 | /* VPMINSBZ256rrk */ |
| 129539 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 129540 | /* VPMINSBZ256rrkz */ |
| 129541 | VR256X, VK32WM, VR256X, VR256X, |
| 129542 | /* VPMINSBZrm */ |
| 129543 | VR512, VR512, i512mem, |
| 129544 | /* VPMINSBZrmk */ |
| 129545 | VR512, VR512, VK64WM, VR512, i512mem, |
| 129546 | /* VPMINSBZrmkz */ |
| 129547 | VR512, VK64WM, VR512, i512mem, |
| 129548 | /* VPMINSBZrr */ |
| 129549 | VR512, VR512, VR512, |
| 129550 | /* VPMINSBZrrk */ |
| 129551 | VR512, VR512, VK64WM, VR512, VR512, |
| 129552 | /* VPMINSBZrrkz */ |
| 129553 | VR512, VK64WM, VR512, VR512, |
| 129554 | /* VPMINSBrm */ |
| 129555 | VR128, VR128, i128mem, |
| 129556 | /* VPMINSBrr */ |
| 129557 | VR128, VR128, VR128, |
| 129558 | /* VPMINSDYrm */ |
| 129559 | VR256, VR256, i256mem, |
| 129560 | /* VPMINSDYrr */ |
| 129561 | VR256, VR256, VR256, |
| 129562 | /* VPMINSDZ128rm */ |
| 129563 | VR128X, VR128X, i128mem, |
| 129564 | /* VPMINSDZ128rmb */ |
| 129565 | VR128X, VR128X, i32mem, |
| 129566 | /* VPMINSDZ128rmbk */ |
| 129567 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 129568 | /* VPMINSDZ128rmbkz */ |
| 129569 | VR128X, VK4WM, VR128X, i32mem, |
| 129570 | /* VPMINSDZ128rmk */ |
| 129571 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 129572 | /* VPMINSDZ128rmkz */ |
| 129573 | VR128X, VK4WM, VR128X, i128mem, |
| 129574 | /* VPMINSDZ128rr */ |
| 129575 | VR128X, VR128X, VR128X, |
| 129576 | /* VPMINSDZ128rrk */ |
| 129577 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 129578 | /* VPMINSDZ128rrkz */ |
| 129579 | VR128X, VK4WM, VR128X, VR128X, |
| 129580 | /* VPMINSDZ256rm */ |
| 129581 | VR256X, VR256X, i256mem, |
| 129582 | /* VPMINSDZ256rmb */ |
| 129583 | VR256X, VR256X, i32mem, |
| 129584 | /* VPMINSDZ256rmbk */ |
| 129585 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 129586 | /* VPMINSDZ256rmbkz */ |
| 129587 | VR256X, VK8WM, VR256X, i32mem, |
| 129588 | /* VPMINSDZ256rmk */ |
| 129589 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 129590 | /* VPMINSDZ256rmkz */ |
| 129591 | VR256X, VK8WM, VR256X, i256mem, |
| 129592 | /* VPMINSDZ256rr */ |
| 129593 | VR256X, VR256X, VR256X, |
| 129594 | /* VPMINSDZ256rrk */ |
| 129595 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 129596 | /* VPMINSDZ256rrkz */ |
| 129597 | VR256X, VK8WM, VR256X, VR256X, |
| 129598 | /* VPMINSDZrm */ |
| 129599 | VR512, VR512, i512mem, |
| 129600 | /* VPMINSDZrmb */ |
| 129601 | VR512, VR512, i32mem, |
| 129602 | /* VPMINSDZrmbk */ |
| 129603 | VR512, VR512, VK16WM, VR512, i32mem, |
| 129604 | /* VPMINSDZrmbkz */ |
| 129605 | VR512, VK16WM, VR512, i32mem, |
| 129606 | /* VPMINSDZrmk */ |
| 129607 | VR512, VR512, VK16WM, VR512, i512mem, |
| 129608 | /* VPMINSDZrmkz */ |
| 129609 | VR512, VK16WM, VR512, i512mem, |
| 129610 | /* VPMINSDZrr */ |
| 129611 | VR512, VR512, VR512, |
| 129612 | /* VPMINSDZrrk */ |
| 129613 | VR512, VR512, VK16WM, VR512, VR512, |
| 129614 | /* VPMINSDZrrkz */ |
| 129615 | VR512, VK16WM, VR512, VR512, |
| 129616 | /* VPMINSDrm */ |
| 129617 | VR128, VR128, i128mem, |
| 129618 | /* VPMINSDrr */ |
| 129619 | VR128, VR128, VR128, |
| 129620 | /* VPMINSQZ128rm */ |
| 129621 | VR128X, VR128X, i128mem, |
| 129622 | /* VPMINSQZ128rmb */ |
| 129623 | VR128X, VR128X, i64mem, |
| 129624 | /* VPMINSQZ128rmbk */ |
| 129625 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 129626 | /* VPMINSQZ128rmbkz */ |
| 129627 | VR128X, VK2WM, VR128X, i64mem, |
| 129628 | /* VPMINSQZ128rmk */ |
| 129629 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 129630 | /* VPMINSQZ128rmkz */ |
| 129631 | VR128X, VK2WM, VR128X, i128mem, |
| 129632 | /* VPMINSQZ128rr */ |
| 129633 | VR128X, VR128X, VR128X, |
| 129634 | /* VPMINSQZ128rrk */ |
| 129635 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 129636 | /* VPMINSQZ128rrkz */ |
| 129637 | VR128X, VK2WM, VR128X, VR128X, |
| 129638 | /* VPMINSQZ256rm */ |
| 129639 | VR256X, VR256X, i256mem, |
| 129640 | /* VPMINSQZ256rmb */ |
| 129641 | VR256X, VR256X, i64mem, |
| 129642 | /* VPMINSQZ256rmbk */ |
| 129643 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 129644 | /* VPMINSQZ256rmbkz */ |
| 129645 | VR256X, VK4WM, VR256X, i64mem, |
| 129646 | /* VPMINSQZ256rmk */ |
| 129647 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 129648 | /* VPMINSQZ256rmkz */ |
| 129649 | VR256X, VK4WM, VR256X, i256mem, |
| 129650 | /* VPMINSQZ256rr */ |
| 129651 | VR256X, VR256X, VR256X, |
| 129652 | /* VPMINSQZ256rrk */ |
| 129653 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 129654 | /* VPMINSQZ256rrkz */ |
| 129655 | VR256X, VK4WM, VR256X, VR256X, |
| 129656 | /* VPMINSQZrm */ |
| 129657 | VR512, VR512, i512mem, |
| 129658 | /* VPMINSQZrmb */ |
| 129659 | VR512, VR512, i64mem, |
| 129660 | /* VPMINSQZrmbk */ |
| 129661 | VR512, VR512, VK8WM, VR512, i64mem, |
| 129662 | /* VPMINSQZrmbkz */ |
| 129663 | VR512, VK8WM, VR512, i64mem, |
| 129664 | /* VPMINSQZrmk */ |
| 129665 | VR512, VR512, VK8WM, VR512, i512mem, |
| 129666 | /* VPMINSQZrmkz */ |
| 129667 | VR512, VK8WM, VR512, i512mem, |
| 129668 | /* VPMINSQZrr */ |
| 129669 | VR512, VR512, VR512, |
| 129670 | /* VPMINSQZrrk */ |
| 129671 | VR512, VR512, VK8WM, VR512, VR512, |
| 129672 | /* VPMINSQZrrkz */ |
| 129673 | VR512, VK8WM, VR512, VR512, |
| 129674 | /* VPMINSWYrm */ |
| 129675 | VR256, VR256, i256mem, |
| 129676 | /* VPMINSWYrr */ |
| 129677 | VR256, VR256, VR256, |
| 129678 | /* VPMINSWZ128rm */ |
| 129679 | VR128X, VR128X, i128mem, |
| 129680 | /* VPMINSWZ128rmk */ |
| 129681 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 129682 | /* VPMINSWZ128rmkz */ |
| 129683 | VR128X, VK8WM, VR128X, i128mem, |
| 129684 | /* VPMINSWZ128rr */ |
| 129685 | VR128X, VR128X, VR128X, |
| 129686 | /* VPMINSWZ128rrk */ |
| 129687 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 129688 | /* VPMINSWZ128rrkz */ |
| 129689 | VR128X, VK8WM, VR128X, VR128X, |
| 129690 | /* VPMINSWZ256rm */ |
| 129691 | VR256X, VR256X, i256mem, |
| 129692 | /* VPMINSWZ256rmk */ |
| 129693 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 129694 | /* VPMINSWZ256rmkz */ |
| 129695 | VR256X, VK16WM, VR256X, i256mem, |
| 129696 | /* VPMINSWZ256rr */ |
| 129697 | VR256X, VR256X, VR256X, |
| 129698 | /* VPMINSWZ256rrk */ |
| 129699 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 129700 | /* VPMINSWZ256rrkz */ |
| 129701 | VR256X, VK16WM, VR256X, VR256X, |
| 129702 | /* VPMINSWZrm */ |
| 129703 | VR512, VR512, i512mem, |
| 129704 | /* VPMINSWZrmk */ |
| 129705 | VR512, VR512, VK32WM, VR512, i512mem, |
| 129706 | /* VPMINSWZrmkz */ |
| 129707 | VR512, VK32WM, VR512, i512mem, |
| 129708 | /* VPMINSWZrr */ |
| 129709 | VR512, VR512, VR512, |
| 129710 | /* VPMINSWZrrk */ |
| 129711 | VR512, VR512, VK32WM, VR512, VR512, |
| 129712 | /* VPMINSWZrrkz */ |
| 129713 | VR512, VK32WM, VR512, VR512, |
| 129714 | /* VPMINSWrm */ |
| 129715 | VR128, VR128, i128mem, |
| 129716 | /* VPMINSWrr */ |
| 129717 | VR128, VR128, VR128, |
| 129718 | /* VPMINUBYrm */ |
| 129719 | VR256, VR256, i256mem, |
| 129720 | /* VPMINUBYrr */ |
| 129721 | VR256, VR256, VR256, |
| 129722 | /* VPMINUBZ128rm */ |
| 129723 | VR128X, VR128X, i128mem, |
| 129724 | /* VPMINUBZ128rmk */ |
| 129725 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 129726 | /* VPMINUBZ128rmkz */ |
| 129727 | VR128X, VK16WM, VR128X, i128mem, |
| 129728 | /* VPMINUBZ128rr */ |
| 129729 | VR128X, VR128X, VR128X, |
| 129730 | /* VPMINUBZ128rrk */ |
| 129731 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 129732 | /* VPMINUBZ128rrkz */ |
| 129733 | VR128X, VK16WM, VR128X, VR128X, |
| 129734 | /* VPMINUBZ256rm */ |
| 129735 | VR256X, VR256X, i256mem, |
| 129736 | /* VPMINUBZ256rmk */ |
| 129737 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 129738 | /* VPMINUBZ256rmkz */ |
| 129739 | VR256X, VK32WM, VR256X, i256mem, |
| 129740 | /* VPMINUBZ256rr */ |
| 129741 | VR256X, VR256X, VR256X, |
| 129742 | /* VPMINUBZ256rrk */ |
| 129743 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 129744 | /* VPMINUBZ256rrkz */ |
| 129745 | VR256X, VK32WM, VR256X, VR256X, |
| 129746 | /* VPMINUBZrm */ |
| 129747 | VR512, VR512, i512mem, |
| 129748 | /* VPMINUBZrmk */ |
| 129749 | VR512, VR512, VK64WM, VR512, i512mem, |
| 129750 | /* VPMINUBZrmkz */ |
| 129751 | VR512, VK64WM, VR512, i512mem, |
| 129752 | /* VPMINUBZrr */ |
| 129753 | VR512, VR512, VR512, |
| 129754 | /* VPMINUBZrrk */ |
| 129755 | VR512, VR512, VK64WM, VR512, VR512, |
| 129756 | /* VPMINUBZrrkz */ |
| 129757 | VR512, VK64WM, VR512, VR512, |
| 129758 | /* VPMINUBrm */ |
| 129759 | VR128, VR128, i128mem, |
| 129760 | /* VPMINUBrr */ |
| 129761 | VR128, VR128, VR128, |
| 129762 | /* VPMINUDYrm */ |
| 129763 | VR256, VR256, i256mem, |
| 129764 | /* VPMINUDYrr */ |
| 129765 | VR256, VR256, VR256, |
| 129766 | /* VPMINUDZ128rm */ |
| 129767 | VR128X, VR128X, i128mem, |
| 129768 | /* VPMINUDZ128rmb */ |
| 129769 | VR128X, VR128X, i32mem, |
| 129770 | /* VPMINUDZ128rmbk */ |
| 129771 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 129772 | /* VPMINUDZ128rmbkz */ |
| 129773 | VR128X, VK4WM, VR128X, i32mem, |
| 129774 | /* VPMINUDZ128rmk */ |
| 129775 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 129776 | /* VPMINUDZ128rmkz */ |
| 129777 | VR128X, VK4WM, VR128X, i128mem, |
| 129778 | /* VPMINUDZ128rr */ |
| 129779 | VR128X, VR128X, VR128X, |
| 129780 | /* VPMINUDZ128rrk */ |
| 129781 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 129782 | /* VPMINUDZ128rrkz */ |
| 129783 | VR128X, VK4WM, VR128X, VR128X, |
| 129784 | /* VPMINUDZ256rm */ |
| 129785 | VR256X, VR256X, i256mem, |
| 129786 | /* VPMINUDZ256rmb */ |
| 129787 | VR256X, VR256X, i32mem, |
| 129788 | /* VPMINUDZ256rmbk */ |
| 129789 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 129790 | /* VPMINUDZ256rmbkz */ |
| 129791 | VR256X, VK8WM, VR256X, i32mem, |
| 129792 | /* VPMINUDZ256rmk */ |
| 129793 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 129794 | /* VPMINUDZ256rmkz */ |
| 129795 | VR256X, VK8WM, VR256X, i256mem, |
| 129796 | /* VPMINUDZ256rr */ |
| 129797 | VR256X, VR256X, VR256X, |
| 129798 | /* VPMINUDZ256rrk */ |
| 129799 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 129800 | /* VPMINUDZ256rrkz */ |
| 129801 | VR256X, VK8WM, VR256X, VR256X, |
| 129802 | /* VPMINUDZrm */ |
| 129803 | VR512, VR512, i512mem, |
| 129804 | /* VPMINUDZrmb */ |
| 129805 | VR512, VR512, i32mem, |
| 129806 | /* VPMINUDZrmbk */ |
| 129807 | VR512, VR512, VK16WM, VR512, i32mem, |
| 129808 | /* VPMINUDZrmbkz */ |
| 129809 | VR512, VK16WM, VR512, i32mem, |
| 129810 | /* VPMINUDZrmk */ |
| 129811 | VR512, VR512, VK16WM, VR512, i512mem, |
| 129812 | /* VPMINUDZrmkz */ |
| 129813 | VR512, VK16WM, VR512, i512mem, |
| 129814 | /* VPMINUDZrr */ |
| 129815 | VR512, VR512, VR512, |
| 129816 | /* VPMINUDZrrk */ |
| 129817 | VR512, VR512, VK16WM, VR512, VR512, |
| 129818 | /* VPMINUDZrrkz */ |
| 129819 | VR512, VK16WM, VR512, VR512, |
| 129820 | /* VPMINUDrm */ |
| 129821 | VR128, VR128, i128mem, |
| 129822 | /* VPMINUDrr */ |
| 129823 | VR128, VR128, VR128, |
| 129824 | /* VPMINUQZ128rm */ |
| 129825 | VR128X, VR128X, i128mem, |
| 129826 | /* VPMINUQZ128rmb */ |
| 129827 | VR128X, VR128X, i64mem, |
| 129828 | /* VPMINUQZ128rmbk */ |
| 129829 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 129830 | /* VPMINUQZ128rmbkz */ |
| 129831 | VR128X, VK2WM, VR128X, i64mem, |
| 129832 | /* VPMINUQZ128rmk */ |
| 129833 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 129834 | /* VPMINUQZ128rmkz */ |
| 129835 | VR128X, VK2WM, VR128X, i128mem, |
| 129836 | /* VPMINUQZ128rr */ |
| 129837 | VR128X, VR128X, VR128X, |
| 129838 | /* VPMINUQZ128rrk */ |
| 129839 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 129840 | /* VPMINUQZ128rrkz */ |
| 129841 | VR128X, VK2WM, VR128X, VR128X, |
| 129842 | /* VPMINUQZ256rm */ |
| 129843 | VR256X, VR256X, i256mem, |
| 129844 | /* VPMINUQZ256rmb */ |
| 129845 | VR256X, VR256X, i64mem, |
| 129846 | /* VPMINUQZ256rmbk */ |
| 129847 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 129848 | /* VPMINUQZ256rmbkz */ |
| 129849 | VR256X, VK4WM, VR256X, i64mem, |
| 129850 | /* VPMINUQZ256rmk */ |
| 129851 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 129852 | /* VPMINUQZ256rmkz */ |
| 129853 | VR256X, VK4WM, VR256X, i256mem, |
| 129854 | /* VPMINUQZ256rr */ |
| 129855 | VR256X, VR256X, VR256X, |
| 129856 | /* VPMINUQZ256rrk */ |
| 129857 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 129858 | /* VPMINUQZ256rrkz */ |
| 129859 | VR256X, VK4WM, VR256X, VR256X, |
| 129860 | /* VPMINUQZrm */ |
| 129861 | VR512, VR512, i512mem, |
| 129862 | /* VPMINUQZrmb */ |
| 129863 | VR512, VR512, i64mem, |
| 129864 | /* VPMINUQZrmbk */ |
| 129865 | VR512, VR512, VK8WM, VR512, i64mem, |
| 129866 | /* VPMINUQZrmbkz */ |
| 129867 | VR512, VK8WM, VR512, i64mem, |
| 129868 | /* VPMINUQZrmk */ |
| 129869 | VR512, VR512, VK8WM, VR512, i512mem, |
| 129870 | /* VPMINUQZrmkz */ |
| 129871 | VR512, VK8WM, VR512, i512mem, |
| 129872 | /* VPMINUQZrr */ |
| 129873 | VR512, VR512, VR512, |
| 129874 | /* VPMINUQZrrk */ |
| 129875 | VR512, VR512, VK8WM, VR512, VR512, |
| 129876 | /* VPMINUQZrrkz */ |
| 129877 | VR512, VK8WM, VR512, VR512, |
| 129878 | /* VPMINUWYrm */ |
| 129879 | VR256, VR256, i256mem, |
| 129880 | /* VPMINUWYrr */ |
| 129881 | VR256, VR256, VR256, |
| 129882 | /* VPMINUWZ128rm */ |
| 129883 | VR128X, VR128X, i128mem, |
| 129884 | /* VPMINUWZ128rmk */ |
| 129885 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 129886 | /* VPMINUWZ128rmkz */ |
| 129887 | VR128X, VK8WM, VR128X, i128mem, |
| 129888 | /* VPMINUWZ128rr */ |
| 129889 | VR128X, VR128X, VR128X, |
| 129890 | /* VPMINUWZ128rrk */ |
| 129891 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 129892 | /* VPMINUWZ128rrkz */ |
| 129893 | VR128X, VK8WM, VR128X, VR128X, |
| 129894 | /* VPMINUWZ256rm */ |
| 129895 | VR256X, VR256X, i256mem, |
| 129896 | /* VPMINUWZ256rmk */ |
| 129897 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 129898 | /* VPMINUWZ256rmkz */ |
| 129899 | VR256X, VK16WM, VR256X, i256mem, |
| 129900 | /* VPMINUWZ256rr */ |
| 129901 | VR256X, VR256X, VR256X, |
| 129902 | /* VPMINUWZ256rrk */ |
| 129903 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 129904 | /* VPMINUWZ256rrkz */ |
| 129905 | VR256X, VK16WM, VR256X, VR256X, |
| 129906 | /* VPMINUWZrm */ |
| 129907 | VR512, VR512, i512mem, |
| 129908 | /* VPMINUWZrmk */ |
| 129909 | VR512, VR512, VK32WM, VR512, i512mem, |
| 129910 | /* VPMINUWZrmkz */ |
| 129911 | VR512, VK32WM, VR512, i512mem, |
| 129912 | /* VPMINUWZrr */ |
| 129913 | VR512, VR512, VR512, |
| 129914 | /* VPMINUWZrrk */ |
| 129915 | VR512, VR512, VK32WM, VR512, VR512, |
| 129916 | /* VPMINUWZrrkz */ |
| 129917 | VR512, VK32WM, VR512, VR512, |
| 129918 | /* VPMINUWrm */ |
| 129919 | VR128, VR128, i128mem, |
| 129920 | /* VPMINUWrr */ |
| 129921 | VR128, VR128, VR128, |
| 129922 | /* VPMOVB2MZ128kr */ |
| 129923 | VK16, VR128X, |
| 129924 | /* VPMOVB2MZ256kr */ |
| 129925 | VK32, VR256X, |
| 129926 | /* VPMOVB2MZkr */ |
| 129927 | VK64, VR512, |
| 129928 | /* VPMOVD2MZ128kr */ |
| 129929 | VK4, VR128X, |
| 129930 | /* VPMOVD2MZ256kr */ |
| 129931 | VK8, VR256X, |
| 129932 | /* VPMOVD2MZkr */ |
| 129933 | VK16, VR512, |
| 129934 | /* VPMOVDBZ128mr */ |
| 129935 | i32mem, VR128X, |
| 129936 | /* VPMOVDBZ128mrk */ |
| 129937 | i32mem, VK4WM, VR128X, |
| 129938 | /* VPMOVDBZ128rr */ |
| 129939 | VR128X, VR128X, |
| 129940 | /* VPMOVDBZ128rrk */ |
| 129941 | VR128X, VR128X, VK4WM, VR128X, |
| 129942 | /* VPMOVDBZ128rrkz */ |
| 129943 | VR128X, VK4WM, VR128X, |
| 129944 | /* VPMOVDBZ256mr */ |
| 129945 | i64mem, VR256X, |
| 129946 | /* VPMOVDBZ256mrk */ |
| 129947 | i64mem, VK8WM, VR256X, |
| 129948 | /* VPMOVDBZ256rr */ |
| 129949 | VR128X, VR256X, |
| 129950 | /* VPMOVDBZ256rrk */ |
| 129951 | VR128X, VR128X, VK8WM, VR256X, |
| 129952 | /* VPMOVDBZ256rrkz */ |
| 129953 | VR128X, VK8WM, VR256X, |
| 129954 | /* VPMOVDBZmr */ |
| 129955 | i128mem, VR512, |
| 129956 | /* VPMOVDBZmrk */ |
| 129957 | i128mem, VK16WM, VR512, |
| 129958 | /* VPMOVDBZrr */ |
| 129959 | VR128X, VR512, |
| 129960 | /* VPMOVDBZrrk */ |
| 129961 | VR128X, VR128X, VK16WM, VR512, |
| 129962 | /* VPMOVDBZrrkz */ |
| 129963 | VR128X, VK16WM, VR512, |
| 129964 | /* VPMOVDWZ128mr */ |
| 129965 | i64mem, VR128X, |
| 129966 | /* VPMOVDWZ128mrk */ |
| 129967 | i64mem, VK4WM, VR128X, |
| 129968 | /* VPMOVDWZ128rr */ |
| 129969 | VR128X, VR128X, |
| 129970 | /* VPMOVDWZ128rrk */ |
| 129971 | VR128X, VR128X, VK4WM, VR128X, |
| 129972 | /* VPMOVDWZ128rrkz */ |
| 129973 | VR128X, VK4WM, VR128X, |
| 129974 | /* VPMOVDWZ256mr */ |
| 129975 | i128mem, VR256X, |
| 129976 | /* VPMOVDWZ256mrk */ |
| 129977 | i128mem, VK8WM, VR256X, |
| 129978 | /* VPMOVDWZ256rr */ |
| 129979 | VR128X, VR256X, |
| 129980 | /* VPMOVDWZ256rrk */ |
| 129981 | VR128X, VR128X, VK8WM, VR256X, |
| 129982 | /* VPMOVDWZ256rrkz */ |
| 129983 | VR128X, VK8WM, VR256X, |
| 129984 | /* VPMOVDWZmr */ |
| 129985 | i256mem, VR512, |
| 129986 | /* VPMOVDWZmrk */ |
| 129987 | i256mem, VK16WM, VR512, |
| 129988 | /* VPMOVDWZrr */ |
| 129989 | VR256X, VR512, |
| 129990 | /* VPMOVDWZrrk */ |
| 129991 | VR256X, VR256X, VK16WM, VR512, |
| 129992 | /* VPMOVDWZrrkz */ |
| 129993 | VR256X, VK16WM, VR512, |
| 129994 | /* VPMOVM2BZ128rk */ |
| 129995 | VR128X, VK16, |
| 129996 | /* VPMOVM2BZ256rk */ |
| 129997 | VR256X, VK32, |
| 129998 | /* VPMOVM2BZrk */ |
| 129999 | VR512, VK64, |
| 130000 | /* VPMOVM2DZ128rk */ |
| 130001 | VR128X, VK4, |
| 130002 | /* VPMOVM2DZ256rk */ |
| 130003 | VR256X, VK8, |
| 130004 | /* VPMOVM2DZrk */ |
| 130005 | VR512, VK16, |
| 130006 | /* VPMOVM2QZ128rk */ |
| 130007 | VR128X, VK2, |
| 130008 | /* VPMOVM2QZ256rk */ |
| 130009 | VR256X, VK4, |
| 130010 | /* VPMOVM2QZrk */ |
| 130011 | VR512, VK8, |
| 130012 | /* VPMOVM2WZ128rk */ |
| 130013 | VR128X, VK8, |
| 130014 | /* VPMOVM2WZ256rk */ |
| 130015 | VR256X, VK16, |
| 130016 | /* VPMOVM2WZrk */ |
| 130017 | VR512, VK32, |
| 130018 | /* VPMOVMSKBYrr */ |
| 130019 | GR32orGR64, VR256, |
| 130020 | /* VPMOVMSKBrr */ |
| 130021 | GR32orGR64, VR128, |
| 130022 | /* VPMOVQ2MZ128kr */ |
| 130023 | VK2, VR128X, |
| 130024 | /* VPMOVQ2MZ256kr */ |
| 130025 | VK4, VR256X, |
| 130026 | /* VPMOVQ2MZkr */ |
| 130027 | VK8, VR512, |
| 130028 | /* VPMOVQBZ128mr */ |
| 130029 | i16mem, VR128X, |
| 130030 | /* VPMOVQBZ128mrk */ |
| 130031 | i16mem, VK2WM, VR128X, |
| 130032 | /* VPMOVQBZ128rr */ |
| 130033 | VR128X, VR128X, |
| 130034 | /* VPMOVQBZ128rrk */ |
| 130035 | VR128X, VR128X, VK2WM, VR128X, |
| 130036 | /* VPMOVQBZ128rrkz */ |
| 130037 | VR128X, VK2WM, VR128X, |
| 130038 | /* VPMOVQBZ256mr */ |
| 130039 | i32mem, VR256X, |
| 130040 | /* VPMOVQBZ256mrk */ |
| 130041 | i32mem, VK4WM, VR256X, |
| 130042 | /* VPMOVQBZ256rr */ |
| 130043 | VR128X, VR256X, |
| 130044 | /* VPMOVQBZ256rrk */ |
| 130045 | VR128X, VR128X, VK4WM, VR256X, |
| 130046 | /* VPMOVQBZ256rrkz */ |
| 130047 | VR128X, VK4WM, VR256X, |
| 130048 | /* VPMOVQBZmr */ |
| 130049 | i64mem, VR512, |
| 130050 | /* VPMOVQBZmrk */ |
| 130051 | i64mem, VK8WM, VR512, |
| 130052 | /* VPMOVQBZrr */ |
| 130053 | VR128X, VR512, |
| 130054 | /* VPMOVQBZrrk */ |
| 130055 | VR128X, VR128X, VK8WM, VR512, |
| 130056 | /* VPMOVQBZrrkz */ |
| 130057 | VR128X, VK8WM, VR512, |
| 130058 | /* VPMOVQDZ128mr */ |
| 130059 | i64mem, VR128X, |
| 130060 | /* VPMOVQDZ128mrk */ |
| 130061 | i64mem, VK2WM, VR128X, |
| 130062 | /* VPMOVQDZ128rr */ |
| 130063 | VR128X, VR128X, |
| 130064 | /* VPMOVQDZ128rrk */ |
| 130065 | VR128X, VR128X, VK2WM, VR128X, |
| 130066 | /* VPMOVQDZ128rrkz */ |
| 130067 | VR128X, VK2WM, VR128X, |
| 130068 | /* VPMOVQDZ256mr */ |
| 130069 | i128mem, VR256X, |
| 130070 | /* VPMOVQDZ256mrk */ |
| 130071 | i128mem, VK4WM, VR256X, |
| 130072 | /* VPMOVQDZ256rr */ |
| 130073 | VR128X, VR256X, |
| 130074 | /* VPMOVQDZ256rrk */ |
| 130075 | VR128X, VR128X, VK4WM, VR256X, |
| 130076 | /* VPMOVQDZ256rrkz */ |
| 130077 | VR128X, VK4WM, VR256X, |
| 130078 | /* VPMOVQDZmr */ |
| 130079 | i256mem, VR512, |
| 130080 | /* VPMOVQDZmrk */ |
| 130081 | i256mem, VK8WM, VR512, |
| 130082 | /* VPMOVQDZrr */ |
| 130083 | VR256X, VR512, |
| 130084 | /* VPMOVQDZrrk */ |
| 130085 | VR256X, VR256X, VK8WM, VR512, |
| 130086 | /* VPMOVQDZrrkz */ |
| 130087 | VR256X, VK8WM, VR512, |
| 130088 | /* VPMOVQWZ128mr */ |
| 130089 | i32mem, VR128X, |
| 130090 | /* VPMOVQWZ128mrk */ |
| 130091 | i32mem, VK2WM, VR128X, |
| 130092 | /* VPMOVQWZ128rr */ |
| 130093 | VR128X, VR128X, |
| 130094 | /* VPMOVQWZ128rrk */ |
| 130095 | VR128X, VR128X, VK2WM, VR128X, |
| 130096 | /* VPMOVQWZ128rrkz */ |
| 130097 | VR128X, VK2WM, VR128X, |
| 130098 | /* VPMOVQWZ256mr */ |
| 130099 | i64mem, VR256X, |
| 130100 | /* VPMOVQWZ256mrk */ |
| 130101 | i64mem, VK4WM, VR256X, |
| 130102 | /* VPMOVQWZ256rr */ |
| 130103 | VR128X, VR256X, |
| 130104 | /* VPMOVQWZ256rrk */ |
| 130105 | VR128X, VR128X, VK4WM, VR256X, |
| 130106 | /* VPMOVQWZ256rrkz */ |
| 130107 | VR128X, VK4WM, VR256X, |
| 130108 | /* VPMOVQWZmr */ |
| 130109 | i128mem, VR512, |
| 130110 | /* VPMOVQWZmrk */ |
| 130111 | i128mem, VK8WM, VR512, |
| 130112 | /* VPMOVQWZrr */ |
| 130113 | VR128X, VR512, |
| 130114 | /* VPMOVQWZrrk */ |
| 130115 | VR128X, VR128X, VK8WM, VR512, |
| 130116 | /* VPMOVQWZrrkz */ |
| 130117 | VR128X, VK8WM, VR512, |
| 130118 | /* VPMOVSDBZ128mr */ |
| 130119 | i32mem, VR128X, |
| 130120 | /* VPMOVSDBZ128mrk */ |
| 130121 | i32mem, VK4WM, VR128X, |
| 130122 | /* VPMOVSDBZ128rr */ |
| 130123 | VR128X, VR128X, |
| 130124 | /* VPMOVSDBZ128rrk */ |
| 130125 | VR128X, VR128X, VK4WM, VR128X, |
| 130126 | /* VPMOVSDBZ128rrkz */ |
| 130127 | VR128X, VK4WM, VR128X, |
| 130128 | /* VPMOVSDBZ256mr */ |
| 130129 | i64mem, VR256X, |
| 130130 | /* VPMOVSDBZ256mrk */ |
| 130131 | i64mem, VK8WM, VR256X, |
| 130132 | /* VPMOVSDBZ256rr */ |
| 130133 | VR128X, VR256X, |
| 130134 | /* VPMOVSDBZ256rrk */ |
| 130135 | VR128X, VR128X, VK8WM, VR256X, |
| 130136 | /* VPMOVSDBZ256rrkz */ |
| 130137 | VR128X, VK8WM, VR256X, |
| 130138 | /* VPMOVSDBZmr */ |
| 130139 | i128mem, VR512, |
| 130140 | /* VPMOVSDBZmrk */ |
| 130141 | i128mem, VK16WM, VR512, |
| 130142 | /* VPMOVSDBZrr */ |
| 130143 | VR128X, VR512, |
| 130144 | /* VPMOVSDBZrrk */ |
| 130145 | VR128X, VR128X, VK16WM, VR512, |
| 130146 | /* VPMOVSDBZrrkz */ |
| 130147 | VR128X, VK16WM, VR512, |
| 130148 | /* VPMOVSDWZ128mr */ |
| 130149 | i64mem, VR128X, |
| 130150 | /* VPMOVSDWZ128mrk */ |
| 130151 | i64mem, VK4WM, VR128X, |
| 130152 | /* VPMOVSDWZ128rr */ |
| 130153 | VR128X, VR128X, |
| 130154 | /* VPMOVSDWZ128rrk */ |
| 130155 | VR128X, VR128X, VK4WM, VR128X, |
| 130156 | /* VPMOVSDWZ128rrkz */ |
| 130157 | VR128X, VK4WM, VR128X, |
| 130158 | /* VPMOVSDWZ256mr */ |
| 130159 | i128mem, VR256X, |
| 130160 | /* VPMOVSDWZ256mrk */ |
| 130161 | i128mem, VK8WM, VR256X, |
| 130162 | /* VPMOVSDWZ256rr */ |
| 130163 | VR128X, VR256X, |
| 130164 | /* VPMOVSDWZ256rrk */ |
| 130165 | VR128X, VR128X, VK8WM, VR256X, |
| 130166 | /* VPMOVSDWZ256rrkz */ |
| 130167 | VR128X, VK8WM, VR256X, |
| 130168 | /* VPMOVSDWZmr */ |
| 130169 | i256mem, VR512, |
| 130170 | /* VPMOVSDWZmrk */ |
| 130171 | i256mem, VK16WM, VR512, |
| 130172 | /* VPMOVSDWZrr */ |
| 130173 | VR256X, VR512, |
| 130174 | /* VPMOVSDWZrrk */ |
| 130175 | VR256X, VR256X, VK16WM, VR512, |
| 130176 | /* VPMOVSDWZrrkz */ |
| 130177 | VR256X, VK16WM, VR512, |
| 130178 | /* VPMOVSQBZ128mr */ |
| 130179 | i16mem, VR128X, |
| 130180 | /* VPMOVSQBZ128mrk */ |
| 130181 | i16mem, VK2WM, VR128X, |
| 130182 | /* VPMOVSQBZ128rr */ |
| 130183 | VR128X, VR128X, |
| 130184 | /* VPMOVSQBZ128rrk */ |
| 130185 | VR128X, VR128X, VK2WM, VR128X, |
| 130186 | /* VPMOVSQBZ128rrkz */ |
| 130187 | VR128X, VK2WM, VR128X, |
| 130188 | /* VPMOVSQBZ256mr */ |
| 130189 | i32mem, VR256X, |
| 130190 | /* VPMOVSQBZ256mrk */ |
| 130191 | i32mem, VK4WM, VR256X, |
| 130192 | /* VPMOVSQBZ256rr */ |
| 130193 | VR128X, VR256X, |
| 130194 | /* VPMOVSQBZ256rrk */ |
| 130195 | VR128X, VR128X, VK4WM, VR256X, |
| 130196 | /* VPMOVSQBZ256rrkz */ |
| 130197 | VR128X, VK4WM, VR256X, |
| 130198 | /* VPMOVSQBZmr */ |
| 130199 | i64mem, VR512, |
| 130200 | /* VPMOVSQBZmrk */ |
| 130201 | i64mem, VK8WM, VR512, |
| 130202 | /* VPMOVSQBZrr */ |
| 130203 | VR128X, VR512, |
| 130204 | /* VPMOVSQBZrrk */ |
| 130205 | VR128X, VR128X, VK8WM, VR512, |
| 130206 | /* VPMOVSQBZrrkz */ |
| 130207 | VR128X, VK8WM, VR512, |
| 130208 | /* VPMOVSQDZ128mr */ |
| 130209 | i64mem, VR128X, |
| 130210 | /* VPMOVSQDZ128mrk */ |
| 130211 | i64mem, VK2WM, VR128X, |
| 130212 | /* VPMOVSQDZ128rr */ |
| 130213 | VR128X, VR128X, |
| 130214 | /* VPMOVSQDZ128rrk */ |
| 130215 | VR128X, VR128X, VK2WM, VR128X, |
| 130216 | /* VPMOVSQDZ128rrkz */ |
| 130217 | VR128X, VK2WM, VR128X, |
| 130218 | /* VPMOVSQDZ256mr */ |
| 130219 | i128mem, VR256X, |
| 130220 | /* VPMOVSQDZ256mrk */ |
| 130221 | i128mem, VK4WM, VR256X, |
| 130222 | /* VPMOVSQDZ256rr */ |
| 130223 | VR128X, VR256X, |
| 130224 | /* VPMOVSQDZ256rrk */ |
| 130225 | VR128X, VR128X, VK4WM, VR256X, |
| 130226 | /* VPMOVSQDZ256rrkz */ |
| 130227 | VR128X, VK4WM, VR256X, |
| 130228 | /* VPMOVSQDZmr */ |
| 130229 | i256mem, VR512, |
| 130230 | /* VPMOVSQDZmrk */ |
| 130231 | i256mem, VK8WM, VR512, |
| 130232 | /* VPMOVSQDZrr */ |
| 130233 | VR256X, VR512, |
| 130234 | /* VPMOVSQDZrrk */ |
| 130235 | VR256X, VR256X, VK8WM, VR512, |
| 130236 | /* VPMOVSQDZrrkz */ |
| 130237 | VR256X, VK8WM, VR512, |
| 130238 | /* VPMOVSQWZ128mr */ |
| 130239 | i32mem, VR128X, |
| 130240 | /* VPMOVSQWZ128mrk */ |
| 130241 | i32mem, VK2WM, VR128X, |
| 130242 | /* VPMOVSQWZ128rr */ |
| 130243 | VR128X, VR128X, |
| 130244 | /* VPMOVSQWZ128rrk */ |
| 130245 | VR128X, VR128X, VK2WM, VR128X, |
| 130246 | /* VPMOVSQWZ128rrkz */ |
| 130247 | VR128X, VK2WM, VR128X, |
| 130248 | /* VPMOVSQWZ256mr */ |
| 130249 | i64mem, VR256X, |
| 130250 | /* VPMOVSQWZ256mrk */ |
| 130251 | i64mem, VK4WM, VR256X, |
| 130252 | /* VPMOVSQWZ256rr */ |
| 130253 | VR128X, VR256X, |
| 130254 | /* VPMOVSQWZ256rrk */ |
| 130255 | VR128X, VR128X, VK4WM, VR256X, |
| 130256 | /* VPMOVSQWZ256rrkz */ |
| 130257 | VR128X, VK4WM, VR256X, |
| 130258 | /* VPMOVSQWZmr */ |
| 130259 | i128mem, VR512, |
| 130260 | /* VPMOVSQWZmrk */ |
| 130261 | i128mem, VK8WM, VR512, |
| 130262 | /* VPMOVSQWZrr */ |
| 130263 | VR128X, VR512, |
| 130264 | /* VPMOVSQWZrrk */ |
| 130265 | VR128X, VR128X, VK8WM, VR512, |
| 130266 | /* VPMOVSQWZrrkz */ |
| 130267 | VR128X, VK8WM, VR512, |
| 130268 | /* VPMOVSWBZ128mr */ |
| 130269 | i64mem, VR128X, |
| 130270 | /* VPMOVSWBZ128mrk */ |
| 130271 | i64mem, VK8WM, VR128X, |
| 130272 | /* VPMOVSWBZ128rr */ |
| 130273 | VR128X, VR128X, |
| 130274 | /* VPMOVSWBZ128rrk */ |
| 130275 | VR128X, VR128X, VK8WM, VR128X, |
| 130276 | /* VPMOVSWBZ128rrkz */ |
| 130277 | VR128X, VK8WM, VR128X, |
| 130278 | /* VPMOVSWBZ256mr */ |
| 130279 | i128mem, VR256X, |
| 130280 | /* VPMOVSWBZ256mrk */ |
| 130281 | i128mem, VK16WM, VR256X, |
| 130282 | /* VPMOVSWBZ256rr */ |
| 130283 | VR128X, VR256X, |
| 130284 | /* VPMOVSWBZ256rrk */ |
| 130285 | VR128X, VR128X, VK16WM, VR256X, |
| 130286 | /* VPMOVSWBZ256rrkz */ |
| 130287 | VR128X, VK16WM, VR256X, |
| 130288 | /* VPMOVSWBZmr */ |
| 130289 | i256mem, VR512, |
| 130290 | /* VPMOVSWBZmrk */ |
| 130291 | i256mem, VK32WM, VR512, |
| 130292 | /* VPMOVSWBZrr */ |
| 130293 | VR256X, VR512, |
| 130294 | /* VPMOVSWBZrrk */ |
| 130295 | VR256X, VR256X, VK32WM, VR512, |
| 130296 | /* VPMOVSWBZrrkz */ |
| 130297 | VR256X, VK32WM, VR512, |
| 130298 | /* VPMOVSXBDYrm */ |
| 130299 | VR256, i64mem, |
| 130300 | /* VPMOVSXBDYrr */ |
| 130301 | VR256, VR128, |
| 130302 | /* VPMOVSXBDZ128rm */ |
| 130303 | VR128X, i32mem, |
| 130304 | /* VPMOVSXBDZ128rmk */ |
| 130305 | VR128X, VR128X, VK4WM, i32mem, |
| 130306 | /* VPMOVSXBDZ128rmkz */ |
| 130307 | VR128X, VK4WM, i32mem, |
| 130308 | /* VPMOVSXBDZ128rr */ |
| 130309 | VR128X, VR128X, |
| 130310 | /* VPMOVSXBDZ128rrk */ |
| 130311 | VR128X, VR128X, VK4WM, VR128X, |
| 130312 | /* VPMOVSXBDZ128rrkz */ |
| 130313 | VR128X, VK4WM, VR128X, |
| 130314 | /* VPMOVSXBDZ256rm */ |
| 130315 | VR256X, i64mem, |
| 130316 | /* VPMOVSXBDZ256rmk */ |
| 130317 | VR256X, VR256X, VK8WM, i64mem, |
| 130318 | /* VPMOVSXBDZ256rmkz */ |
| 130319 | VR256X, VK8WM, i64mem, |
| 130320 | /* VPMOVSXBDZ256rr */ |
| 130321 | VR256X, VR128X, |
| 130322 | /* VPMOVSXBDZ256rrk */ |
| 130323 | VR256X, VR256X, VK8WM, VR128X, |
| 130324 | /* VPMOVSXBDZ256rrkz */ |
| 130325 | VR256X, VK8WM, VR128X, |
| 130326 | /* VPMOVSXBDZrm */ |
| 130327 | VR512, i128mem, |
| 130328 | /* VPMOVSXBDZrmk */ |
| 130329 | VR512, VR512, VK16WM, i128mem, |
| 130330 | /* VPMOVSXBDZrmkz */ |
| 130331 | VR512, VK16WM, i128mem, |
| 130332 | /* VPMOVSXBDZrr */ |
| 130333 | VR512, VR128X, |
| 130334 | /* VPMOVSXBDZrrk */ |
| 130335 | VR512, VR512, VK16WM, VR128X, |
| 130336 | /* VPMOVSXBDZrrkz */ |
| 130337 | VR512, VK16WM, VR128X, |
| 130338 | /* VPMOVSXBDrm */ |
| 130339 | VR128, i32mem, |
| 130340 | /* VPMOVSXBDrr */ |
| 130341 | VR128, VR128, |
| 130342 | /* VPMOVSXBQYrm */ |
| 130343 | VR256, i32mem, |
| 130344 | /* VPMOVSXBQYrr */ |
| 130345 | VR256, VR128, |
| 130346 | /* VPMOVSXBQZ128rm */ |
| 130347 | VR128X, i16mem, |
| 130348 | /* VPMOVSXBQZ128rmk */ |
| 130349 | VR128X, VR128X, VK2WM, i16mem, |
| 130350 | /* VPMOVSXBQZ128rmkz */ |
| 130351 | VR128X, VK2WM, i16mem, |
| 130352 | /* VPMOVSXBQZ128rr */ |
| 130353 | VR128X, VR128X, |
| 130354 | /* VPMOVSXBQZ128rrk */ |
| 130355 | VR128X, VR128X, VK2WM, VR128X, |
| 130356 | /* VPMOVSXBQZ128rrkz */ |
| 130357 | VR128X, VK2WM, VR128X, |
| 130358 | /* VPMOVSXBQZ256rm */ |
| 130359 | VR256X, i32mem, |
| 130360 | /* VPMOVSXBQZ256rmk */ |
| 130361 | VR256X, VR256X, VK4WM, i32mem, |
| 130362 | /* VPMOVSXBQZ256rmkz */ |
| 130363 | VR256X, VK4WM, i32mem, |
| 130364 | /* VPMOVSXBQZ256rr */ |
| 130365 | VR256X, VR128X, |
| 130366 | /* VPMOVSXBQZ256rrk */ |
| 130367 | VR256X, VR256X, VK4WM, VR128X, |
| 130368 | /* VPMOVSXBQZ256rrkz */ |
| 130369 | VR256X, VK4WM, VR128X, |
| 130370 | /* VPMOVSXBQZrm */ |
| 130371 | VR512, i64mem, |
| 130372 | /* VPMOVSXBQZrmk */ |
| 130373 | VR512, VR512, VK8WM, i64mem, |
| 130374 | /* VPMOVSXBQZrmkz */ |
| 130375 | VR512, VK8WM, i64mem, |
| 130376 | /* VPMOVSXBQZrr */ |
| 130377 | VR512, VR128X, |
| 130378 | /* VPMOVSXBQZrrk */ |
| 130379 | VR512, VR512, VK8WM, VR128X, |
| 130380 | /* VPMOVSXBQZrrkz */ |
| 130381 | VR512, VK8WM, VR128X, |
| 130382 | /* VPMOVSXBQrm */ |
| 130383 | VR128, i16mem, |
| 130384 | /* VPMOVSXBQrr */ |
| 130385 | VR128, VR128, |
| 130386 | /* VPMOVSXBWYrm */ |
| 130387 | VR256, i128mem, |
| 130388 | /* VPMOVSXBWYrr */ |
| 130389 | VR256, VR128, |
| 130390 | /* VPMOVSXBWZ128rm */ |
| 130391 | VR128X, i64mem, |
| 130392 | /* VPMOVSXBWZ128rmk */ |
| 130393 | VR128X, VR128X, VK8WM, i64mem, |
| 130394 | /* VPMOVSXBWZ128rmkz */ |
| 130395 | VR128X, VK8WM, i64mem, |
| 130396 | /* VPMOVSXBWZ128rr */ |
| 130397 | VR128X, VR128X, |
| 130398 | /* VPMOVSXBWZ128rrk */ |
| 130399 | VR128X, VR128X, VK8WM, VR128X, |
| 130400 | /* VPMOVSXBWZ128rrkz */ |
| 130401 | VR128X, VK8WM, VR128X, |
| 130402 | /* VPMOVSXBWZ256rm */ |
| 130403 | VR256X, i128mem, |
| 130404 | /* VPMOVSXBWZ256rmk */ |
| 130405 | VR256X, VR256X, VK16WM, i128mem, |
| 130406 | /* VPMOVSXBWZ256rmkz */ |
| 130407 | VR256X, VK16WM, i128mem, |
| 130408 | /* VPMOVSXBWZ256rr */ |
| 130409 | VR256X, VR128X, |
| 130410 | /* VPMOVSXBWZ256rrk */ |
| 130411 | VR256X, VR256X, VK16WM, VR128X, |
| 130412 | /* VPMOVSXBWZ256rrkz */ |
| 130413 | VR256X, VK16WM, VR128X, |
| 130414 | /* VPMOVSXBWZrm */ |
| 130415 | VR512, i256mem, |
| 130416 | /* VPMOVSXBWZrmk */ |
| 130417 | VR512, VR512, VK32WM, i256mem, |
| 130418 | /* VPMOVSXBWZrmkz */ |
| 130419 | VR512, VK32WM, i256mem, |
| 130420 | /* VPMOVSXBWZrr */ |
| 130421 | VR512, VR256X, |
| 130422 | /* VPMOVSXBWZrrk */ |
| 130423 | VR512, VR512, VK32WM, VR256X, |
| 130424 | /* VPMOVSXBWZrrkz */ |
| 130425 | VR512, VK32WM, VR256X, |
| 130426 | /* VPMOVSXBWrm */ |
| 130427 | VR128, i64mem, |
| 130428 | /* VPMOVSXBWrr */ |
| 130429 | VR128, VR128, |
| 130430 | /* VPMOVSXDQYrm */ |
| 130431 | VR256, i128mem, |
| 130432 | /* VPMOVSXDQYrr */ |
| 130433 | VR256, VR128, |
| 130434 | /* VPMOVSXDQZ128rm */ |
| 130435 | VR128X, i64mem, |
| 130436 | /* VPMOVSXDQZ128rmk */ |
| 130437 | VR128X, VR128X, VK2WM, i64mem, |
| 130438 | /* VPMOVSXDQZ128rmkz */ |
| 130439 | VR128X, VK2WM, i64mem, |
| 130440 | /* VPMOVSXDQZ128rr */ |
| 130441 | VR128X, VR128X, |
| 130442 | /* VPMOVSXDQZ128rrk */ |
| 130443 | VR128X, VR128X, VK2WM, VR128X, |
| 130444 | /* VPMOVSXDQZ128rrkz */ |
| 130445 | VR128X, VK2WM, VR128X, |
| 130446 | /* VPMOVSXDQZ256rm */ |
| 130447 | VR256X, i128mem, |
| 130448 | /* VPMOVSXDQZ256rmk */ |
| 130449 | VR256X, VR256X, VK4WM, i128mem, |
| 130450 | /* VPMOVSXDQZ256rmkz */ |
| 130451 | VR256X, VK4WM, i128mem, |
| 130452 | /* VPMOVSXDQZ256rr */ |
| 130453 | VR256X, VR128X, |
| 130454 | /* VPMOVSXDQZ256rrk */ |
| 130455 | VR256X, VR256X, VK4WM, VR128X, |
| 130456 | /* VPMOVSXDQZ256rrkz */ |
| 130457 | VR256X, VK4WM, VR128X, |
| 130458 | /* VPMOVSXDQZrm */ |
| 130459 | VR512, i256mem, |
| 130460 | /* VPMOVSXDQZrmk */ |
| 130461 | VR512, VR512, VK8WM, i256mem, |
| 130462 | /* VPMOVSXDQZrmkz */ |
| 130463 | VR512, VK8WM, i256mem, |
| 130464 | /* VPMOVSXDQZrr */ |
| 130465 | VR512, VR256X, |
| 130466 | /* VPMOVSXDQZrrk */ |
| 130467 | VR512, VR512, VK8WM, VR256X, |
| 130468 | /* VPMOVSXDQZrrkz */ |
| 130469 | VR512, VK8WM, VR256X, |
| 130470 | /* VPMOVSXDQrm */ |
| 130471 | VR128, i64mem, |
| 130472 | /* VPMOVSXDQrr */ |
| 130473 | VR128, VR128, |
| 130474 | /* VPMOVSXWDYrm */ |
| 130475 | VR256, i128mem, |
| 130476 | /* VPMOVSXWDYrr */ |
| 130477 | VR256, VR128, |
| 130478 | /* VPMOVSXWDZ128rm */ |
| 130479 | VR128X, i64mem, |
| 130480 | /* VPMOVSXWDZ128rmk */ |
| 130481 | VR128X, VR128X, VK4WM, i64mem, |
| 130482 | /* VPMOVSXWDZ128rmkz */ |
| 130483 | VR128X, VK4WM, i64mem, |
| 130484 | /* VPMOVSXWDZ128rr */ |
| 130485 | VR128X, VR128X, |
| 130486 | /* VPMOVSXWDZ128rrk */ |
| 130487 | VR128X, VR128X, VK4WM, VR128X, |
| 130488 | /* VPMOVSXWDZ128rrkz */ |
| 130489 | VR128X, VK4WM, VR128X, |
| 130490 | /* VPMOVSXWDZ256rm */ |
| 130491 | VR256X, i128mem, |
| 130492 | /* VPMOVSXWDZ256rmk */ |
| 130493 | VR256X, VR256X, VK8WM, i128mem, |
| 130494 | /* VPMOVSXWDZ256rmkz */ |
| 130495 | VR256X, VK8WM, i128mem, |
| 130496 | /* VPMOVSXWDZ256rr */ |
| 130497 | VR256X, VR128X, |
| 130498 | /* VPMOVSXWDZ256rrk */ |
| 130499 | VR256X, VR256X, VK8WM, VR128X, |
| 130500 | /* VPMOVSXWDZ256rrkz */ |
| 130501 | VR256X, VK8WM, VR128X, |
| 130502 | /* VPMOVSXWDZrm */ |
| 130503 | VR512, i256mem, |
| 130504 | /* VPMOVSXWDZrmk */ |
| 130505 | VR512, VR512, VK16WM, i256mem, |
| 130506 | /* VPMOVSXWDZrmkz */ |
| 130507 | VR512, VK16WM, i256mem, |
| 130508 | /* VPMOVSXWDZrr */ |
| 130509 | VR512, VR256X, |
| 130510 | /* VPMOVSXWDZrrk */ |
| 130511 | VR512, VR512, VK16WM, VR256X, |
| 130512 | /* VPMOVSXWDZrrkz */ |
| 130513 | VR512, VK16WM, VR256X, |
| 130514 | /* VPMOVSXWDrm */ |
| 130515 | VR128, i64mem, |
| 130516 | /* VPMOVSXWDrr */ |
| 130517 | VR128, VR128, |
| 130518 | /* VPMOVSXWQYrm */ |
| 130519 | VR256, i64mem, |
| 130520 | /* VPMOVSXWQYrr */ |
| 130521 | VR256, VR128, |
| 130522 | /* VPMOVSXWQZ128rm */ |
| 130523 | VR128X, i32mem, |
| 130524 | /* VPMOVSXWQZ128rmk */ |
| 130525 | VR128X, VR128X, VK2WM, i32mem, |
| 130526 | /* VPMOVSXWQZ128rmkz */ |
| 130527 | VR128X, VK2WM, i32mem, |
| 130528 | /* VPMOVSXWQZ128rr */ |
| 130529 | VR128X, VR128X, |
| 130530 | /* VPMOVSXWQZ128rrk */ |
| 130531 | VR128X, VR128X, VK2WM, VR128X, |
| 130532 | /* VPMOVSXWQZ128rrkz */ |
| 130533 | VR128X, VK2WM, VR128X, |
| 130534 | /* VPMOVSXWQZ256rm */ |
| 130535 | VR256X, i64mem, |
| 130536 | /* VPMOVSXWQZ256rmk */ |
| 130537 | VR256X, VR256X, VK4WM, i64mem, |
| 130538 | /* VPMOVSXWQZ256rmkz */ |
| 130539 | VR256X, VK4WM, i64mem, |
| 130540 | /* VPMOVSXWQZ256rr */ |
| 130541 | VR256X, VR128X, |
| 130542 | /* VPMOVSXWQZ256rrk */ |
| 130543 | VR256X, VR256X, VK4WM, VR128X, |
| 130544 | /* VPMOVSXWQZ256rrkz */ |
| 130545 | VR256X, VK4WM, VR128X, |
| 130546 | /* VPMOVSXWQZrm */ |
| 130547 | VR512, i128mem, |
| 130548 | /* VPMOVSXWQZrmk */ |
| 130549 | VR512, VR512, VK8WM, i128mem, |
| 130550 | /* VPMOVSXWQZrmkz */ |
| 130551 | VR512, VK8WM, i128mem, |
| 130552 | /* VPMOVSXWQZrr */ |
| 130553 | VR512, VR128X, |
| 130554 | /* VPMOVSXWQZrrk */ |
| 130555 | VR512, VR512, VK8WM, VR128X, |
| 130556 | /* VPMOVSXWQZrrkz */ |
| 130557 | VR512, VK8WM, VR128X, |
| 130558 | /* VPMOVSXWQrm */ |
| 130559 | VR128, i32mem, |
| 130560 | /* VPMOVSXWQrr */ |
| 130561 | VR128, VR128, |
| 130562 | /* VPMOVUSDBZ128mr */ |
| 130563 | i32mem, VR128X, |
| 130564 | /* VPMOVUSDBZ128mrk */ |
| 130565 | i32mem, VK4WM, VR128X, |
| 130566 | /* VPMOVUSDBZ128rr */ |
| 130567 | VR128X, VR128X, |
| 130568 | /* VPMOVUSDBZ128rrk */ |
| 130569 | VR128X, VR128X, VK4WM, VR128X, |
| 130570 | /* VPMOVUSDBZ128rrkz */ |
| 130571 | VR128X, VK4WM, VR128X, |
| 130572 | /* VPMOVUSDBZ256mr */ |
| 130573 | i64mem, VR256X, |
| 130574 | /* VPMOVUSDBZ256mrk */ |
| 130575 | i64mem, VK8WM, VR256X, |
| 130576 | /* VPMOVUSDBZ256rr */ |
| 130577 | VR128X, VR256X, |
| 130578 | /* VPMOVUSDBZ256rrk */ |
| 130579 | VR128X, VR128X, VK8WM, VR256X, |
| 130580 | /* VPMOVUSDBZ256rrkz */ |
| 130581 | VR128X, VK8WM, VR256X, |
| 130582 | /* VPMOVUSDBZmr */ |
| 130583 | i128mem, VR512, |
| 130584 | /* VPMOVUSDBZmrk */ |
| 130585 | i128mem, VK16WM, VR512, |
| 130586 | /* VPMOVUSDBZrr */ |
| 130587 | VR128X, VR512, |
| 130588 | /* VPMOVUSDBZrrk */ |
| 130589 | VR128X, VR128X, VK16WM, VR512, |
| 130590 | /* VPMOVUSDBZrrkz */ |
| 130591 | VR128X, VK16WM, VR512, |
| 130592 | /* VPMOVUSDWZ128mr */ |
| 130593 | i64mem, VR128X, |
| 130594 | /* VPMOVUSDWZ128mrk */ |
| 130595 | i64mem, VK4WM, VR128X, |
| 130596 | /* VPMOVUSDWZ128rr */ |
| 130597 | VR128X, VR128X, |
| 130598 | /* VPMOVUSDWZ128rrk */ |
| 130599 | VR128X, VR128X, VK4WM, VR128X, |
| 130600 | /* VPMOVUSDWZ128rrkz */ |
| 130601 | VR128X, VK4WM, VR128X, |
| 130602 | /* VPMOVUSDWZ256mr */ |
| 130603 | i128mem, VR256X, |
| 130604 | /* VPMOVUSDWZ256mrk */ |
| 130605 | i128mem, VK8WM, VR256X, |
| 130606 | /* VPMOVUSDWZ256rr */ |
| 130607 | VR128X, VR256X, |
| 130608 | /* VPMOVUSDWZ256rrk */ |
| 130609 | VR128X, VR128X, VK8WM, VR256X, |
| 130610 | /* VPMOVUSDWZ256rrkz */ |
| 130611 | VR128X, VK8WM, VR256X, |
| 130612 | /* VPMOVUSDWZmr */ |
| 130613 | i256mem, VR512, |
| 130614 | /* VPMOVUSDWZmrk */ |
| 130615 | i256mem, VK16WM, VR512, |
| 130616 | /* VPMOVUSDWZrr */ |
| 130617 | VR256X, VR512, |
| 130618 | /* VPMOVUSDWZrrk */ |
| 130619 | VR256X, VR256X, VK16WM, VR512, |
| 130620 | /* VPMOVUSDWZrrkz */ |
| 130621 | VR256X, VK16WM, VR512, |
| 130622 | /* VPMOVUSQBZ128mr */ |
| 130623 | i16mem, VR128X, |
| 130624 | /* VPMOVUSQBZ128mrk */ |
| 130625 | i16mem, VK2WM, VR128X, |
| 130626 | /* VPMOVUSQBZ128rr */ |
| 130627 | VR128X, VR128X, |
| 130628 | /* VPMOVUSQBZ128rrk */ |
| 130629 | VR128X, VR128X, VK2WM, VR128X, |
| 130630 | /* VPMOVUSQBZ128rrkz */ |
| 130631 | VR128X, VK2WM, VR128X, |
| 130632 | /* VPMOVUSQBZ256mr */ |
| 130633 | i32mem, VR256X, |
| 130634 | /* VPMOVUSQBZ256mrk */ |
| 130635 | i32mem, VK4WM, VR256X, |
| 130636 | /* VPMOVUSQBZ256rr */ |
| 130637 | VR128X, VR256X, |
| 130638 | /* VPMOVUSQBZ256rrk */ |
| 130639 | VR128X, VR128X, VK4WM, VR256X, |
| 130640 | /* VPMOVUSQBZ256rrkz */ |
| 130641 | VR128X, VK4WM, VR256X, |
| 130642 | /* VPMOVUSQBZmr */ |
| 130643 | i64mem, VR512, |
| 130644 | /* VPMOVUSQBZmrk */ |
| 130645 | i64mem, VK8WM, VR512, |
| 130646 | /* VPMOVUSQBZrr */ |
| 130647 | VR128X, VR512, |
| 130648 | /* VPMOVUSQBZrrk */ |
| 130649 | VR128X, VR128X, VK8WM, VR512, |
| 130650 | /* VPMOVUSQBZrrkz */ |
| 130651 | VR128X, VK8WM, VR512, |
| 130652 | /* VPMOVUSQDZ128mr */ |
| 130653 | i64mem, VR128X, |
| 130654 | /* VPMOVUSQDZ128mrk */ |
| 130655 | i64mem, VK2WM, VR128X, |
| 130656 | /* VPMOVUSQDZ128rr */ |
| 130657 | VR128X, VR128X, |
| 130658 | /* VPMOVUSQDZ128rrk */ |
| 130659 | VR128X, VR128X, VK2WM, VR128X, |
| 130660 | /* VPMOVUSQDZ128rrkz */ |
| 130661 | VR128X, VK2WM, VR128X, |
| 130662 | /* VPMOVUSQDZ256mr */ |
| 130663 | i128mem, VR256X, |
| 130664 | /* VPMOVUSQDZ256mrk */ |
| 130665 | i128mem, VK4WM, VR256X, |
| 130666 | /* VPMOVUSQDZ256rr */ |
| 130667 | VR128X, VR256X, |
| 130668 | /* VPMOVUSQDZ256rrk */ |
| 130669 | VR128X, VR128X, VK4WM, VR256X, |
| 130670 | /* VPMOVUSQDZ256rrkz */ |
| 130671 | VR128X, VK4WM, VR256X, |
| 130672 | /* VPMOVUSQDZmr */ |
| 130673 | i256mem, VR512, |
| 130674 | /* VPMOVUSQDZmrk */ |
| 130675 | i256mem, VK8WM, VR512, |
| 130676 | /* VPMOVUSQDZrr */ |
| 130677 | VR256X, VR512, |
| 130678 | /* VPMOVUSQDZrrk */ |
| 130679 | VR256X, VR256X, VK8WM, VR512, |
| 130680 | /* VPMOVUSQDZrrkz */ |
| 130681 | VR256X, VK8WM, VR512, |
| 130682 | /* VPMOVUSQWZ128mr */ |
| 130683 | i32mem, VR128X, |
| 130684 | /* VPMOVUSQWZ128mrk */ |
| 130685 | i32mem, VK2WM, VR128X, |
| 130686 | /* VPMOVUSQWZ128rr */ |
| 130687 | VR128X, VR128X, |
| 130688 | /* VPMOVUSQWZ128rrk */ |
| 130689 | VR128X, VR128X, VK2WM, VR128X, |
| 130690 | /* VPMOVUSQWZ128rrkz */ |
| 130691 | VR128X, VK2WM, VR128X, |
| 130692 | /* VPMOVUSQWZ256mr */ |
| 130693 | i64mem, VR256X, |
| 130694 | /* VPMOVUSQWZ256mrk */ |
| 130695 | i64mem, VK4WM, VR256X, |
| 130696 | /* VPMOVUSQWZ256rr */ |
| 130697 | VR128X, VR256X, |
| 130698 | /* VPMOVUSQWZ256rrk */ |
| 130699 | VR128X, VR128X, VK4WM, VR256X, |
| 130700 | /* VPMOVUSQWZ256rrkz */ |
| 130701 | VR128X, VK4WM, VR256X, |
| 130702 | /* VPMOVUSQWZmr */ |
| 130703 | i128mem, VR512, |
| 130704 | /* VPMOVUSQWZmrk */ |
| 130705 | i128mem, VK8WM, VR512, |
| 130706 | /* VPMOVUSQWZrr */ |
| 130707 | VR128X, VR512, |
| 130708 | /* VPMOVUSQWZrrk */ |
| 130709 | VR128X, VR128X, VK8WM, VR512, |
| 130710 | /* VPMOVUSQWZrrkz */ |
| 130711 | VR128X, VK8WM, VR512, |
| 130712 | /* VPMOVUSWBZ128mr */ |
| 130713 | i64mem, VR128X, |
| 130714 | /* VPMOVUSWBZ128mrk */ |
| 130715 | i64mem, VK8WM, VR128X, |
| 130716 | /* VPMOVUSWBZ128rr */ |
| 130717 | VR128X, VR128X, |
| 130718 | /* VPMOVUSWBZ128rrk */ |
| 130719 | VR128X, VR128X, VK8WM, VR128X, |
| 130720 | /* VPMOVUSWBZ128rrkz */ |
| 130721 | VR128X, VK8WM, VR128X, |
| 130722 | /* VPMOVUSWBZ256mr */ |
| 130723 | i128mem, VR256X, |
| 130724 | /* VPMOVUSWBZ256mrk */ |
| 130725 | i128mem, VK16WM, VR256X, |
| 130726 | /* VPMOVUSWBZ256rr */ |
| 130727 | VR128X, VR256X, |
| 130728 | /* VPMOVUSWBZ256rrk */ |
| 130729 | VR128X, VR128X, VK16WM, VR256X, |
| 130730 | /* VPMOVUSWBZ256rrkz */ |
| 130731 | VR128X, VK16WM, VR256X, |
| 130732 | /* VPMOVUSWBZmr */ |
| 130733 | i256mem, VR512, |
| 130734 | /* VPMOVUSWBZmrk */ |
| 130735 | i256mem, VK32WM, VR512, |
| 130736 | /* VPMOVUSWBZrr */ |
| 130737 | VR256X, VR512, |
| 130738 | /* VPMOVUSWBZrrk */ |
| 130739 | VR256X, VR256X, VK32WM, VR512, |
| 130740 | /* VPMOVUSWBZrrkz */ |
| 130741 | VR256X, VK32WM, VR512, |
| 130742 | /* VPMOVW2MZ128kr */ |
| 130743 | VK8, VR128X, |
| 130744 | /* VPMOVW2MZ256kr */ |
| 130745 | VK16, VR256X, |
| 130746 | /* VPMOVW2MZkr */ |
| 130747 | VK32, VR512, |
| 130748 | /* VPMOVWBZ128mr */ |
| 130749 | i64mem, VR128X, |
| 130750 | /* VPMOVWBZ128mrk */ |
| 130751 | i64mem, VK8WM, VR128X, |
| 130752 | /* VPMOVWBZ128rr */ |
| 130753 | VR128X, VR128X, |
| 130754 | /* VPMOVWBZ128rrk */ |
| 130755 | VR128X, VR128X, VK8WM, VR128X, |
| 130756 | /* VPMOVWBZ128rrkz */ |
| 130757 | VR128X, VK8WM, VR128X, |
| 130758 | /* VPMOVWBZ256mr */ |
| 130759 | i128mem, VR256X, |
| 130760 | /* VPMOVWBZ256mrk */ |
| 130761 | i128mem, VK16WM, VR256X, |
| 130762 | /* VPMOVWBZ256rr */ |
| 130763 | VR128X, VR256X, |
| 130764 | /* VPMOVWBZ256rrk */ |
| 130765 | VR128X, VR128X, VK16WM, VR256X, |
| 130766 | /* VPMOVWBZ256rrkz */ |
| 130767 | VR128X, VK16WM, VR256X, |
| 130768 | /* VPMOVWBZmr */ |
| 130769 | i256mem, VR512, |
| 130770 | /* VPMOVWBZmrk */ |
| 130771 | i256mem, VK32WM, VR512, |
| 130772 | /* VPMOVWBZrr */ |
| 130773 | VR256X, VR512, |
| 130774 | /* VPMOVWBZrrk */ |
| 130775 | VR256X, VR256X, VK32WM, VR512, |
| 130776 | /* VPMOVWBZrrkz */ |
| 130777 | VR256X, VK32WM, VR512, |
| 130778 | /* VPMOVZXBDYrm */ |
| 130779 | VR256, i64mem, |
| 130780 | /* VPMOVZXBDYrr */ |
| 130781 | VR256, VR128, |
| 130782 | /* VPMOVZXBDZ128rm */ |
| 130783 | VR128X, i32mem, |
| 130784 | /* VPMOVZXBDZ128rmk */ |
| 130785 | VR128X, VR128X, VK4WM, i32mem, |
| 130786 | /* VPMOVZXBDZ128rmkz */ |
| 130787 | VR128X, VK4WM, i32mem, |
| 130788 | /* VPMOVZXBDZ128rr */ |
| 130789 | VR128X, VR128X, |
| 130790 | /* VPMOVZXBDZ128rrk */ |
| 130791 | VR128X, VR128X, VK4WM, VR128X, |
| 130792 | /* VPMOVZXBDZ128rrkz */ |
| 130793 | VR128X, VK4WM, VR128X, |
| 130794 | /* VPMOVZXBDZ256rm */ |
| 130795 | VR256X, i64mem, |
| 130796 | /* VPMOVZXBDZ256rmk */ |
| 130797 | VR256X, VR256X, VK8WM, i64mem, |
| 130798 | /* VPMOVZXBDZ256rmkz */ |
| 130799 | VR256X, VK8WM, i64mem, |
| 130800 | /* VPMOVZXBDZ256rr */ |
| 130801 | VR256X, VR128X, |
| 130802 | /* VPMOVZXBDZ256rrk */ |
| 130803 | VR256X, VR256X, VK8WM, VR128X, |
| 130804 | /* VPMOVZXBDZ256rrkz */ |
| 130805 | VR256X, VK8WM, VR128X, |
| 130806 | /* VPMOVZXBDZrm */ |
| 130807 | VR512, i128mem, |
| 130808 | /* VPMOVZXBDZrmk */ |
| 130809 | VR512, VR512, VK16WM, i128mem, |
| 130810 | /* VPMOVZXBDZrmkz */ |
| 130811 | VR512, VK16WM, i128mem, |
| 130812 | /* VPMOVZXBDZrr */ |
| 130813 | VR512, VR128X, |
| 130814 | /* VPMOVZXBDZrrk */ |
| 130815 | VR512, VR512, VK16WM, VR128X, |
| 130816 | /* VPMOVZXBDZrrkz */ |
| 130817 | VR512, VK16WM, VR128X, |
| 130818 | /* VPMOVZXBDrm */ |
| 130819 | VR128, i32mem, |
| 130820 | /* VPMOVZXBDrr */ |
| 130821 | VR128, VR128, |
| 130822 | /* VPMOVZXBQYrm */ |
| 130823 | VR256, i32mem, |
| 130824 | /* VPMOVZXBQYrr */ |
| 130825 | VR256, VR128, |
| 130826 | /* VPMOVZXBQZ128rm */ |
| 130827 | VR128X, i16mem, |
| 130828 | /* VPMOVZXBQZ128rmk */ |
| 130829 | VR128X, VR128X, VK2WM, i16mem, |
| 130830 | /* VPMOVZXBQZ128rmkz */ |
| 130831 | VR128X, VK2WM, i16mem, |
| 130832 | /* VPMOVZXBQZ128rr */ |
| 130833 | VR128X, VR128X, |
| 130834 | /* VPMOVZXBQZ128rrk */ |
| 130835 | VR128X, VR128X, VK2WM, VR128X, |
| 130836 | /* VPMOVZXBQZ128rrkz */ |
| 130837 | VR128X, VK2WM, VR128X, |
| 130838 | /* VPMOVZXBQZ256rm */ |
| 130839 | VR256X, i32mem, |
| 130840 | /* VPMOVZXBQZ256rmk */ |
| 130841 | VR256X, VR256X, VK4WM, i32mem, |
| 130842 | /* VPMOVZXBQZ256rmkz */ |
| 130843 | VR256X, VK4WM, i32mem, |
| 130844 | /* VPMOVZXBQZ256rr */ |
| 130845 | VR256X, VR128X, |
| 130846 | /* VPMOVZXBQZ256rrk */ |
| 130847 | VR256X, VR256X, VK4WM, VR128X, |
| 130848 | /* VPMOVZXBQZ256rrkz */ |
| 130849 | VR256X, VK4WM, VR128X, |
| 130850 | /* VPMOVZXBQZrm */ |
| 130851 | VR512, i64mem, |
| 130852 | /* VPMOVZXBQZrmk */ |
| 130853 | VR512, VR512, VK8WM, i64mem, |
| 130854 | /* VPMOVZXBQZrmkz */ |
| 130855 | VR512, VK8WM, i64mem, |
| 130856 | /* VPMOVZXBQZrr */ |
| 130857 | VR512, VR128X, |
| 130858 | /* VPMOVZXBQZrrk */ |
| 130859 | VR512, VR512, VK8WM, VR128X, |
| 130860 | /* VPMOVZXBQZrrkz */ |
| 130861 | VR512, VK8WM, VR128X, |
| 130862 | /* VPMOVZXBQrm */ |
| 130863 | VR128, i16mem, |
| 130864 | /* VPMOVZXBQrr */ |
| 130865 | VR128, VR128, |
| 130866 | /* VPMOVZXBWYrm */ |
| 130867 | VR256, i128mem, |
| 130868 | /* VPMOVZXBWYrr */ |
| 130869 | VR256, VR128, |
| 130870 | /* VPMOVZXBWZ128rm */ |
| 130871 | VR128X, i64mem, |
| 130872 | /* VPMOVZXBWZ128rmk */ |
| 130873 | VR128X, VR128X, VK8WM, i64mem, |
| 130874 | /* VPMOVZXBWZ128rmkz */ |
| 130875 | VR128X, VK8WM, i64mem, |
| 130876 | /* VPMOVZXBWZ128rr */ |
| 130877 | VR128X, VR128X, |
| 130878 | /* VPMOVZXBWZ128rrk */ |
| 130879 | VR128X, VR128X, VK8WM, VR128X, |
| 130880 | /* VPMOVZXBWZ128rrkz */ |
| 130881 | VR128X, VK8WM, VR128X, |
| 130882 | /* VPMOVZXBWZ256rm */ |
| 130883 | VR256X, i128mem, |
| 130884 | /* VPMOVZXBWZ256rmk */ |
| 130885 | VR256X, VR256X, VK16WM, i128mem, |
| 130886 | /* VPMOVZXBWZ256rmkz */ |
| 130887 | VR256X, VK16WM, i128mem, |
| 130888 | /* VPMOVZXBWZ256rr */ |
| 130889 | VR256X, VR128X, |
| 130890 | /* VPMOVZXBWZ256rrk */ |
| 130891 | VR256X, VR256X, VK16WM, VR128X, |
| 130892 | /* VPMOVZXBWZ256rrkz */ |
| 130893 | VR256X, VK16WM, VR128X, |
| 130894 | /* VPMOVZXBWZrm */ |
| 130895 | VR512, i256mem, |
| 130896 | /* VPMOVZXBWZrmk */ |
| 130897 | VR512, VR512, VK32WM, i256mem, |
| 130898 | /* VPMOVZXBWZrmkz */ |
| 130899 | VR512, VK32WM, i256mem, |
| 130900 | /* VPMOVZXBWZrr */ |
| 130901 | VR512, VR256X, |
| 130902 | /* VPMOVZXBWZrrk */ |
| 130903 | VR512, VR512, VK32WM, VR256X, |
| 130904 | /* VPMOVZXBWZrrkz */ |
| 130905 | VR512, VK32WM, VR256X, |
| 130906 | /* VPMOVZXBWrm */ |
| 130907 | VR128, i64mem, |
| 130908 | /* VPMOVZXBWrr */ |
| 130909 | VR128, VR128, |
| 130910 | /* VPMOVZXDQYrm */ |
| 130911 | VR256, i128mem, |
| 130912 | /* VPMOVZXDQYrr */ |
| 130913 | VR256, VR128, |
| 130914 | /* VPMOVZXDQZ128rm */ |
| 130915 | VR128X, i64mem, |
| 130916 | /* VPMOVZXDQZ128rmk */ |
| 130917 | VR128X, VR128X, VK2WM, i64mem, |
| 130918 | /* VPMOVZXDQZ128rmkz */ |
| 130919 | VR128X, VK2WM, i64mem, |
| 130920 | /* VPMOVZXDQZ128rr */ |
| 130921 | VR128X, VR128X, |
| 130922 | /* VPMOVZXDQZ128rrk */ |
| 130923 | VR128X, VR128X, VK2WM, VR128X, |
| 130924 | /* VPMOVZXDQZ128rrkz */ |
| 130925 | VR128X, VK2WM, VR128X, |
| 130926 | /* VPMOVZXDQZ256rm */ |
| 130927 | VR256X, i128mem, |
| 130928 | /* VPMOVZXDQZ256rmk */ |
| 130929 | VR256X, VR256X, VK4WM, i128mem, |
| 130930 | /* VPMOVZXDQZ256rmkz */ |
| 130931 | VR256X, VK4WM, i128mem, |
| 130932 | /* VPMOVZXDQZ256rr */ |
| 130933 | VR256X, VR128X, |
| 130934 | /* VPMOVZXDQZ256rrk */ |
| 130935 | VR256X, VR256X, VK4WM, VR128X, |
| 130936 | /* VPMOVZXDQZ256rrkz */ |
| 130937 | VR256X, VK4WM, VR128X, |
| 130938 | /* VPMOVZXDQZrm */ |
| 130939 | VR512, i256mem, |
| 130940 | /* VPMOVZXDQZrmk */ |
| 130941 | VR512, VR512, VK8WM, i256mem, |
| 130942 | /* VPMOVZXDQZrmkz */ |
| 130943 | VR512, VK8WM, i256mem, |
| 130944 | /* VPMOVZXDQZrr */ |
| 130945 | VR512, VR256X, |
| 130946 | /* VPMOVZXDQZrrk */ |
| 130947 | VR512, VR512, VK8WM, VR256X, |
| 130948 | /* VPMOVZXDQZrrkz */ |
| 130949 | VR512, VK8WM, VR256X, |
| 130950 | /* VPMOVZXDQrm */ |
| 130951 | VR128, i64mem, |
| 130952 | /* VPMOVZXDQrr */ |
| 130953 | VR128, VR128, |
| 130954 | /* VPMOVZXWDYrm */ |
| 130955 | VR256, i128mem, |
| 130956 | /* VPMOVZXWDYrr */ |
| 130957 | VR256, VR128, |
| 130958 | /* VPMOVZXWDZ128rm */ |
| 130959 | VR128X, i64mem, |
| 130960 | /* VPMOVZXWDZ128rmk */ |
| 130961 | VR128X, VR128X, VK4WM, i64mem, |
| 130962 | /* VPMOVZXWDZ128rmkz */ |
| 130963 | VR128X, VK4WM, i64mem, |
| 130964 | /* VPMOVZXWDZ128rr */ |
| 130965 | VR128X, VR128X, |
| 130966 | /* VPMOVZXWDZ128rrk */ |
| 130967 | VR128X, VR128X, VK4WM, VR128X, |
| 130968 | /* VPMOVZXWDZ128rrkz */ |
| 130969 | VR128X, VK4WM, VR128X, |
| 130970 | /* VPMOVZXWDZ256rm */ |
| 130971 | VR256X, i128mem, |
| 130972 | /* VPMOVZXWDZ256rmk */ |
| 130973 | VR256X, VR256X, VK8WM, i128mem, |
| 130974 | /* VPMOVZXWDZ256rmkz */ |
| 130975 | VR256X, VK8WM, i128mem, |
| 130976 | /* VPMOVZXWDZ256rr */ |
| 130977 | VR256X, VR128X, |
| 130978 | /* VPMOVZXWDZ256rrk */ |
| 130979 | VR256X, VR256X, VK8WM, VR128X, |
| 130980 | /* VPMOVZXWDZ256rrkz */ |
| 130981 | VR256X, VK8WM, VR128X, |
| 130982 | /* VPMOVZXWDZrm */ |
| 130983 | VR512, i256mem, |
| 130984 | /* VPMOVZXWDZrmk */ |
| 130985 | VR512, VR512, VK16WM, i256mem, |
| 130986 | /* VPMOVZXWDZrmkz */ |
| 130987 | VR512, VK16WM, i256mem, |
| 130988 | /* VPMOVZXWDZrr */ |
| 130989 | VR512, VR256X, |
| 130990 | /* VPMOVZXWDZrrk */ |
| 130991 | VR512, VR512, VK16WM, VR256X, |
| 130992 | /* VPMOVZXWDZrrkz */ |
| 130993 | VR512, VK16WM, VR256X, |
| 130994 | /* VPMOVZXWDrm */ |
| 130995 | VR128, i64mem, |
| 130996 | /* VPMOVZXWDrr */ |
| 130997 | VR128, VR128, |
| 130998 | /* VPMOVZXWQYrm */ |
| 130999 | VR256, i64mem, |
| 131000 | /* VPMOVZXWQYrr */ |
| 131001 | VR256, VR128, |
| 131002 | /* VPMOVZXWQZ128rm */ |
| 131003 | VR128X, i32mem, |
| 131004 | /* VPMOVZXWQZ128rmk */ |
| 131005 | VR128X, VR128X, VK2WM, i32mem, |
| 131006 | /* VPMOVZXWQZ128rmkz */ |
| 131007 | VR128X, VK2WM, i32mem, |
| 131008 | /* VPMOVZXWQZ128rr */ |
| 131009 | VR128X, VR128X, |
| 131010 | /* VPMOVZXWQZ128rrk */ |
| 131011 | VR128X, VR128X, VK2WM, VR128X, |
| 131012 | /* VPMOVZXWQZ128rrkz */ |
| 131013 | VR128X, VK2WM, VR128X, |
| 131014 | /* VPMOVZXWQZ256rm */ |
| 131015 | VR256X, i64mem, |
| 131016 | /* VPMOVZXWQZ256rmk */ |
| 131017 | VR256X, VR256X, VK4WM, i64mem, |
| 131018 | /* VPMOVZXWQZ256rmkz */ |
| 131019 | VR256X, VK4WM, i64mem, |
| 131020 | /* VPMOVZXWQZ256rr */ |
| 131021 | VR256X, VR128X, |
| 131022 | /* VPMOVZXWQZ256rrk */ |
| 131023 | VR256X, VR256X, VK4WM, VR128X, |
| 131024 | /* VPMOVZXWQZ256rrkz */ |
| 131025 | VR256X, VK4WM, VR128X, |
| 131026 | /* VPMOVZXWQZrm */ |
| 131027 | VR512, i128mem, |
| 131028 | /* VPMOVZXWQZrmk */ |
| 131029 | VR512, VR512, VK8WM, i128mem, |
| 131030 | /* VPMOVZXWQZrmkz */ |
| 131031 | VR512, VK8WM, i128mem, |
| 131032 | /* VPMOVZXWQZrr */ |
| 131033 | VR512, VR128X, |
| 131034 | /* VPMOVZXWQZrrk */ |
| 131035 | VR512, VR512, VK8WM, VR128X, |
| 131036 | /* VPMOVZXWQZrrkz */ |
| 131037 | VR512, VK8WM, VR128X, |
| 131038 | /* VPMOVZXWQrm */ |
| 131039 | VR128, i32mem, |
| 131040 | /* VPMOVZXWQrr */ |
| 131041 | VR128, VR128, |
| 131042 | /* VPMULDQYrm */ |
| 131043 | VR256, VR256, i256mem, |
| 131044 | /* VPMULDQYrr */ |
| 131045 | VR256, VR256, VR256, |
| 131046 | /* VPMULDQZ128rm */ |
| 131047 | VR128X, VR128X, i128mem, |
| 131048 | /* VPMULDQZ128rmb */ |
| 131049 | VR128X, VR128X, i64mem, |
| 131050 | /* VPMULDQZ128rmbk */ |
| 131051 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 131052 | /* VPMULDQZ128rmbkz */ |
| 131053 | VR128X, VK2WM, VR128X, i64mem, |
| 131054 | /* VPMULDQZ128rmk */ |
| 131055 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 131056 | /* VPMULDQZ128rmkz */ |
| 131057 | VR128X, VK2WM, VR128X, i128mem, |
| 131058 | /* VPMULDQZ128rr */ |
| 131059 | VR128X, VR128X, VR128X, |
| 131060 | /* VPMULDQZ128rrk */ |
| 131061 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 131062 | /* VPMULDQZ128rrkz */ |
| 131063 | VR128X, VK2WM, VR128X, VR128X, |
| 131064 | /* VPMULDQZ256rm */ |
| 131065 | VR256X, VR256X, i256mem, |
| 131066 | /* VPMULDQZ256rmb */ |
| 131067 | VR256X, VR256X, i64mem, |
| 131068 | /* VPMULDQZ256rmbk */ |
| 131069 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 131070 | /* VPMULDQZ256rmbkz */ |
| 131071 | VR256X, VK4WM, VR256X, i64mem, |
| 131072 | /* VPMULDQZ256rmk */ |
| 131073 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 131074 | /* VPMULDQZ256rmkz */ |
| 131075 | VR256X, VK4WM, VR256X, i256mem, |
| 131076 | /* VPMULDQZ256rr */ |
| 131077 | VR256X, VR256X, VR256X, |
| 131078 | /* VPMULDQZ256rrk */ |
| 131079 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 131080 | /* VPMULDQZ256rrkz */ |
| 131081 | VR256X, VK4WM, VR256X, VR256X, |
| 131082 | /* VPMULDQZrm */ |
| 131083 | VR512, VR512, i512mem, |
| 131084 | /* VPMULDQZrmb */ |
| 131085 | VR512, VR512, i64mem, |
| 131086 | /* VPMULDQZrmbk */ |
| 131087 | VR512, VR512, VK8WM, VR512, i64mem, |
| 131088 | /* VPMULDQZrmbkz */ |
| 131089 | VR512, VK8WM, VR512, i64mem, |
| 131090 | /* VPMULDQZrmk */ |
| 131091 | VR512, VR512, VK8WM, VR512, i512mem, |
| 131092 | /* VPMULDQZrmkz */ |
| 131093 | VR512, VK8WM, VR512, i512mem, |
| 131094 | /* VPMULDQZrr */ |
| 131095 | VR512, VR512, VR512, |
| 131096 | /* VPMULDQZrrk */ |
| 131097 | VR512, VR512, VK8WM, VR512, VR512, |
| 131098 | /* VPMULDQZrrkz */ |
| 131099 | VR512, VK8WM, VR512, VR512, |
| 131100 | /* VPMULDQrm */ |
| 131101 | VR128, VR128, i128mem, |
| 131102 | /* VPMULDQrr */ |
| 131103 | VR128, VR128, VR128, |
| 131104 | /* VPMULHRSWYrm */ |
| 131105 | VR256, VR256, i256mem, |
| 131106 | /* VPMULHRSWYrr */ |
| 131107 | VR256, VR256, VR256, |
| 131108 | /* VPMULHRSWZ128rm */ |
| 131109 | VR128X, VR128X, i128mem, |
| 131110 | /* VPMULHRSWZ128rmk */ |
| 131111 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 131112 | /* VPMULHRSWZ128rmkz */ |
| 131113 | VR128X, VK8WM, VR128X, i128mem, |
| 131114 | /* VPMULHRSWZ128rr */ |
| 131115 | VR128X, VR128X, VR128X, |
| 131116 | /* VPMULHRSWZ128rrk */ |
| 131117 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 131118 | /* VPMULHRSWZ128rrkz */ |
| 131119 | VR128X, VK8WM, VR128X, VR128X, |
| 131120 | /* VPMULHRSWZ256rm */ |
| 131121 | VR256X, VR256X, i256mem, |
| 131122 | /* VPMULHRSWZ256rmk */ |
| 131123 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 131124 | /* VPMULHRSWZ256rmkz */ |
| 131125 | VR256X, VK16WM, VR256X, i256mem, |
| 131126 | /* VPMULHRSWZ256rr */ |
| 131127 | VR256X, VR256X, VR256X, |
| 131128 | /* VPMULHRSWZ256rrk */ |
| 131129 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 131130 | /* VPMULHRSWZ256rrkz */ |
| 131131 | VR256X, VK16WM, VR256X, VR256X, |
| 131132 | /* VPMULHRSWZrm */ |
| 131133 | VR512, VR512, i512mem, |
| 131134 | /* VPMULHRSWZrmk */ |
| 131135 | VR512, VR512, VK32WM, VR512, i512mem, |
| 131136 | /* VPMULHRSWZrmkz */ |
| 131137 | VR512, VK32WM, VR512, i512mem, |
| 131138 | /* VPMULHRSWZrr */ |
| 131139 | VR512, VR512, VR512, |
| 131140 | /* VPMULHRSWZrrk */ |
| 131141 | VR512, VR512, VK32WM, VR512, VR512, |
| 131142 | /* VPMULHRSWZrrkz */ |
| 131143 | VR512, VK32WM, VR512, VR512, |
| 131144 | /* VPMULHRSWrm */ |
| 131145 | VR128, VR128, i128mem, |
| 131146 | /* VPMULHRSWrr */ |
| 131147 | VR128, VR128, VR128, |
| 131148 | /* VPMULHUWYrm */ |
| 131149 | VR256, VR256, i256mem, |
| 131150 | /* VPMULHUWYrr */ |
| 131151 | VR256, VR256, VR256, |
| 131152 | /* VPMULHUWZ128rm */ |
| 131153 | VR128X, VR128X, i128mem, |
| 131154 | /* VPMULHUWZ128rmk */ |
| 131155 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 131156 | /* VPMULHUWZ128rmkz */ |
| 131157 | VR128X, VK8WM, VR128X, i128mem, |
| 131158 | /* VPMULHUWZ128rr */ |
| 131159 | VR128X, VR128X, VR128X, |
| 131160 | /* VPMULHUWZ128rrk */ |
| 131161 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 131162 | /* VPMULHUWZ128rrkz */ |
| 131163 | VR128X, VK8WM, VR128X, VR128X, |
| 131164 | /* VPMULHUWZ256rm */ |
| 131165 | VR256X, VR256X, i256mem, |
| 131166 | /* VPMULHUWZ256rmk */ |
| 131167 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 131168 | /* VPMULHUWZ256rmkz */ |
| 131169 | VR256X, VK16WM, VR256X, i256mem, |
| 131170 | /* VPMULHUWZ256rr */ |
| 131171 | VR256X, VR256X, VR256X, |
| 131172 | /* VPMULHUWZ256rrk */ |
| 131173 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 131174 | /* VPMULHUWZ256rrkz */ |
| 131175 | VR256X, VK16WM, VR256X, VR256X, |
| 131176 | /* VPMULHUWZrm */ |
| 131177 | VR512, VR512, i512mem, |
| 131178 | /* VPMULHUWZrmk */ |
| 131179 | VR512, VR512, VK32WM, VR512, i512mem, |
| 131180 | /* VPMULHUWZrmkz */ |
| 131181 | VR512, VK32WM, VR512, i512mem, |
| 131182 | /* VPMULHUWZrr */ |
| 131183 | VR512, VR512, VR512, |
| 131184 | /* VPMULHUWZrrk */ |
| 131185 | VR512, VR512, VK32WM, VR512, VR512, |
| 131186 | /* VPMULHUWZrrkz */ |
| 131187 | VR512, VK32WM, VR512, VR512, |
| 131188 | /* VPMULHUWrm */ |
| 131189 | VR128, VR128, i128mem, |
| 131190 | /* VPMULHUWrr */ |
| 131191 | VR128, VR128, VR128, |
| 131192 | /* VPMULHWYrm */ |
| 131193 | VR256, VR256, i256mem, |
| 131194 | /* VPMULHWYrr */ |
| 131195 | VR256, VR256, VR256, |
| 131196 | /* VPMULHWZ128rm */ |
| 131197 | VR128X, VR128X, i128mem, |
| 131198 | /* VPMULHWZ128rmk */ |
| 131199 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 131200 | /* VPMULHWZ128rmkz */ |
| 131201 | VR128X, VK8WM, VR128X, i128mem, |
| 131202 | /* VPMULHWZ128rr */ |
| 131203 | VR128X, VR128X, VR128X, |
| 131204 | /* VPMULHWZ128rrk */ |
| 131205 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 131206 | /* VPMULHWZ128rrkz */ |
| 131207 | VR128X, VK8WM, VR128X, VR128X, |
| 131208 | /* VPMULHWZ256rm */ |
| 131209 | VR256X, VR256X, i256mem, |
| 131210 | /* VPMULHWZ256rmk */ |
| 131211 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 131212 | /* VPMULHWZ256rmkz */ |
| 131213 | VR256X, VK16WM, VR256X, i256mem, |
| 131214 | /* VPMULHWZ256rr */ |
| 131215 | VR256X, VR256X, VR256X, |
| 131216 | /* VPMULHWZ256rrk */ |
| 131217 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 131218 | /* VPMULHWZ256rrkz */ |
| 131219 | VR256X, VK16WM, VR256X, VR256X, |
| 131220 | /* VPMULHWZrm */ |
| 131221 | VR512, VR512, i512mem, |
| 131222 | /* VPMULHWZrmk */ |
| 131223 | VR512, VR512, VK32WM, VR512, i512mem, |
| 131224 | /* VPMULHWZrmkz */ |
| 131225 | VR512, VK32WM, VR512, i512mem, |
| 131226 | /* VPMULHWZrr */ |
| 131227 | VR512, VR512, VR512, |
| 131228 | /* VPMULHWZrrk */ |
| 131229 | VR512, VR512, VK32WM, VR512, VR512, |
| 131230 | /* VPMULHWZrrkz */ |
| 131231 | VR512, VK32WM, VR512, VR512, |
| 131232 | /* VPMULHWrm */ |
| 131233 | VR128, VR128, i128mem, |
| 131234 | /* VPMULHWrr */ |
| 131235 | VR128, VR128, VR128, |
| 131236 | /* VPMULLDYrm */ |
| 131237 | VR256, VR256, i256mem, |
| 131238 | /* VPMULLDYrr */ |
| 131239 | VR256, VR256, VR256, |
| 131240 | /* VPMULLDZ128rm */ |
| 131241 | VR128X, VR128X, i128mem, |
| 131242 | /* VPMULLDZ128rmb */ |
| 131243 | VR128X, VR128X, i32mem, |
| 131244 | /* VPMULLDZ128rmbk */ |
| 131245 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131246 | /* VPMULLDZ128rmbkz */ |
| 131247 | VR128X, VK4WM, VR128X, i32mem, |
| 131248 | /* VPMULLDZ128rmk */ |
| 131249 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131250 | /* VPMULLDZ128rmkz */ |
| 131251 | VR128X, VK4WM, VR128X, i128mem, |
| 131252 | /* VPMULLDZ128rr */ |
| 131253 | VR128X, VR128X, VR128X, |
| 131254 | /* VPMULLDZ128rrk */ |
| 131255 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131256 | /* VPMULLDZ128rrkz */ |
| 131257 | VR128X, VK4WM, VR128X, VR128X, |
| 131258 | /* VPMULLDZ256rm */ |
| 131259 | VR256X, VR256X, i256mem, |
| 131260 | /* VPMULLDZ256rmb */ |
| 131261 | VR256X, VR256X, i32mem, |
| 131262 | /* VPMULLDZ256rmbk */ |
| 131263 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131264 | /* VPMULLDZ256rmbkz */ |
| 131265 | VR256X, VK8WM, VR256X, i32mem, |
| 131266 | /* VPMULLDZ256rmk */ |
| 131267 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131268 | /* VPMULLDZ256rmkz */ |
| 131269 | VR256X, VK8WM, VR256X, i256mem, |
| 131270 | /* VPMULLDZ256rr */ |
| 131271 | VR256X, VR256X, VR256X, |
| 131272 | /* VPMULLDZ256rrk */ |
| 131273 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131274 | /* VPMULLDZ256rrkz */ |
| 131275 | VR256X, VK8WM, VR256X, VR256X, |
| 131276 | /* VPMULLDZrm */ |
| 131277 | VR512, VR512, i512mem, |
| 131278 | /* VPMULLDZrmb */ |
| 131279 | VR512, VR512, i32mem, |
| 131280 | /* VPMULLDZrmbk */ |
| 131281 | VR512, VR512, VK16WM, VR512, i32mem, |
| 131282 | /* VPMULLDZrmbkz */ |
| 131283 | VR512, VK16WM, VR512, i32mem, |
| 131284 | /* VPMULLDZrmk */ |
| 131285 | VR512, VR512, VK16WM, VR512, i512mem, |
| 131286 | /* VPMULLDZrmkz */ |
| 131287 | VR512, VK16WM, VR512, i512mem, |
| 131288 | /* VPMULLDZrr */ |
| 131289 | VR512, VR512, VR512, |
| 131290 | /* VPMULLDZrrk */ |
| 131291 | VR512, VR512, VK16WM, VR512, VR512, |
| 131292 | /* VPMULLDZrrkz */ |
| 131293 | VR512, VK16WM, VR512, VR512, |
| 131294 | /* VPMULLDrm */ |
| 131295 | VR128, VR128, i128mem, |
| 131296 | /* VPMULLDrr */ |
| 131297 | VR128, VR128, VR128, |
| 131298 | /* VPMULLQZ128rm */ |
| 131299 | VR128X, VR128X, i128mem, |
| 131300 | /* VPMULLQZ128rmb */ |
| 131301 | VR128X, VR128X, i64mem, |
| 131302 | /* VPMULLQZ128rmbk */ |
| 131303 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 131304 | /* VPMULLQZ128rmbkz */ |
| 131305 | VR128X, VK2WM, VR128X, i64mem, |
| 131306 | /* VPMULLQZ128rmk */ |
| 131307 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 131308 | /* VPMULLQZ128rmkz */ |
| 131309 | VR128X, VK2WM, VR128X, i128mem, |
| 131310 | /* VPMULLQZ128rr */ |
| 131311 | VR128X, VR128X, VR128X, |
| 131312 | /* VPMULLQZ128rrk */ |
| 131313 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 131314 | /* VPMULLQZ128rrkz */ |
| 131315 | VR128X, VK2WM, VR128X, VR128X, |
| 131316 | /* VPMULLQZ256rm */ |
| 131317 | VR256X, VR256X, i256mem, |
| 131318 | /* VPMULLQZ256rmb */ |
| 131319 | VR256X, VR256X, i64mem, |
| 131320 | /* VPMULLQZ256rmbk */ |
| 131321 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 131322 | /* VPMULLQZ256rmbkz */ |
| 131323 | VR256X, VK4WM, VR256X, i64mem, |
| 131324 | /* VPMULLQZ256rmk */ |
| 131325 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 131326 | /* VPMULLQZ256rmkz */ |
| 131327 | VR256X, VK4WM, VR256X, i256mem, |
| 131328 | /* VPMULLQZ256rr */ |
| 131329 | VR256X, VR256X, VR256X, |
| 131330 | /* VPMULLQZ256rrk */ |
| 131331 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 131332 | /* VPMULLQZ256rrkz */ |
| 131333 | VR256X, VK4WM, VR256X, VR256X, |
| 131334 | /* VPMULLQZrm */ |
| 131335 | VR512, VR512, i512mem, |
| 131336 | /* VPMULLQZrmb */ |
| 131337 | VR512, VR512, i64mem, |
| 131338 | /* VPMULLQZrmbk */ |
| 131339 | VR512, VR512, VK8WM, VR512, i64mem, |
| 131340 | /* VPMULLQZrmbkz */ |
| 131341 | VR512, VK8WM, VR512, i64mem, |
| 131342 | /* VPMULLQZrmk */ |
| 131343 | VR512, VR512, VK8WM, VR512, i512mem, |
| 131344 | /* VPMULLQZrmkz */ |
| 131345 | VR512, VK8WM, VR512, i512mem, |
| 131346 | /* VPMULLQZrr */ |
| 131347 | VR512, VR512, VR512, |
| 131348 | /* VPMULLQZrrk */ |
| 131349 | VR512, VR512, VK8WM, VR512, VR512, |
| 131350 | /* VPMULLQZrrkz */ |
| 131351 | VR512, VK8WM, VR512, VR512, |
| 131352 | /* VPMULLWYrm */ |
| 131353 | VR256, VR256, i256mem, |
| 131354 | /* VPMULLWYrr */ |
| 131355 | VR256, VR256, VR256, |
| 131356 | /* VPMULLWZ128rm */ |
| 131357 | VR128X, VR128X, i128mem, |
| 131358 | /* VPMULLWZ128rmk */ |
| 131359 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 131360 | /* VPMULLWZ128rmkz */ |
| 131361 | VR128X, VK8WM, VR128X, i128mem, |
| 131362 | /* VPMULLWZ128rr */ |
| 131363 | VR128X, VR128X, VR128X, |
| 131364 | /* VPMULLWZ128rrk */ |
| 131365 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 131366 | /* VPMULLWZ128rrkz */ |
| 131367 | VR128X, VK8WM, VR128X, VR128X, |
| 131368 | /* VPMULLWZ256rm */ |
| 131369 | VR256X, VR256X, i256mem, |
| 131370 | /* VPMULLWZ256rmk */ |
| 131371 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 131372 | /* VPMULLWZ256rmkz */ |
| 131373 | VR256X, VK16WM, VR256X, i256mem, |
| 131374 | /* VPMULLWZ256rr */ |
| 131375 | VR256X, VR256X, VR256X, |
| 131376 | /* VPMULLWZ256rrk */ |
| 131377 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 131378 | /* VPMULLWZ256rrkz */ |
| 131379 | VR256X, VK16WM, VR256X, VR256X, |
| 131380 | /* VPMULLWZrm */ |
| 131381 | VR512, VR512, i512mem, |
| 131382 | /* VPMULLWZrmk */ |
| 131383 | VR512, VR512, VK32WM, VR512, i512mem, |
| 131384 | /* VPMULLWZrmkz */ |
| 131385 | VR512, VK32WM, VR512, i512mem, |
| 131386 | /* VPMULLWZrr */ |
| 131387 | VR512, VR512, VR512, |
| 131388 | /* VPMULLWZrrk */ |
| 131389 | VR512, VR512, VK32WM, VR512, VR512, |
| 131390 | /* VPMULLWZrrkz */ |
| 131391 | VR512, VK32WM, VR512, VR512, |
| 131392 | /* VPMULLWrm */ |
| 131393 | VR128, VR128, i128mem, |
| 131394 | /* VPMULLWrr */ |
| 131395 | VR128, VR128, VR128, |
| 131396 | /* VPMULTISHIFTQBZ128rm */ |
| 131397 | VR128X, VR128X, i128mem, |
| 131398 | /* VPMULTISHIFTQBZ128rmb */ |
| 131399 | VR128X, VR128X, i64mem, |
| 131400 | /* VPMULTISHIFTQBZ128rmbk */ |
| 131401 | VR128X, VR128X, VK16WM, VR128X, i64mem, |
| 131402 | /* VPMULTISHIFTQBZ128rmbkz */ |
| 131403 | VR128X, VK16WM, VR128X, i64mem, |
| 131404 | /* VPMULTISHIFTQBZ128rmk */ |
| 131405 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 131406 | /* VPMULTISHIFTQBZ128rmkz */ |
| 131407 | VR128X, VK16WM, VR128X, i128mem, |
| 131408 | /* VPMULTISHIFTQBZ128rr */ |
| 131409 | VR128X, VR128X, VR128X, |
| 131410 | /* VPMULTISHIFTQBZ128rrk */ |
| 131411 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 131412 | /* VPMULTISHIFTQBZ128rrkz */ |
| 131413 | VR128X, VK16WM, VR128X, VR128X, |
| 131414 | /* VPMULTISHIFTQBZ256rm */ |
| 131415 | VR256X, VR256X, i256mem, |
| 131416 | /* VPMULTISHIFTQBZ256rmb */ |
| 131417 | VR256X, VR256X, i64mem, |
| 131418 | /* VPMULTISHIFTQBZ256rmbk */ |
| 131419 | VR256X, VR256X, VK32WM, VR256X, i64mem, |
| 131420 | /* VPMULTISHIFTQBZ256rmbkz */ |
| 131421 | VR256X, VK32WM, VR256X, i64mem, |
| 131422 | /* VPMULTISHIFTQBZ256rmk */ |
| 131423 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 131424 | /* VPMULTISHIFTQBZ256rmkz */ |
| 131425 | VR256X, VK32WM, VR256X, i256mem, |
| 131426 | /* VPMULTISHIFTQBZ256rr */ |
| 131427 | VR256X, VR256X, VR256X, |
| 131428 | /* VPMULTISHIFTQBZ256rrk */ |
| 131429 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 131430 | /* VPMULTISHIFTQBZ256rrkz */ |
| 131431 | VR256X, VK32WM, VR256X, VR256X, |
| 131432 | /* VPMULTISHIFTQBZrm */ |
| 131433 | VR512, VR512, i512mem, |
| 131434 | /* VPMULTISHIFTQBZrmb */ |
| 131435 | VR512, VR512, i64mem, |
| 131436 | /* VPMULTISHIFTQBZrmbk */ |
| 131437 | VR512, VR512, VK64WM, VR512, i64mem, |
| 131438 | /* VPMULTISHIFTQBZrmbkz */ |
| 131439 | VR512, VK64WM, VR512, i64mem, |
| 131440 | /* VPMULTISHIFTQBZrmk */ |
| 131441 | VR512, VR512, VK64WM, VR512, i512mem, |
| 131442 | /* VPMULTISHIFTQBZrmkz */ |
| 131443 | VR512, VK64WM, VR512, i512mem, |
| 131444 | /* VPMULTISHIFTQBZrr */ |
| 131445 | VR512, VR512, VR512, |
| 131446 | /* VPMULTISHIFTQBZrrk */ |
| 131447 | VR512, VR512, VK64WM, VR512, VR512, |
| 131448 | /* VPMULTISHIFTQBZrrkz */ |
| 131449 | VR512, VK64WM, VR512, VR512, |
| 131450 | /* VPMULUDQYrm */ |
| 131451 | VR256, VR256, i256mem, |
| 131452 | /* VPMULUDQYrr */ |
| 131453 | VR256, VR256, VR256, |
| 131454 | /* VPMULUDQZ128rm */ |
| 131455 | VR128X, VR128X, i128mem, |
| 131456 | /* VPMULUDQZ128rmb */ |
| 131457 | VR128X, VR128X, i64mem, |
| 131458 | /* VPMULUDQZ128rmbk */ |
| 131459 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 131460 | /* VPMULUDQZ128rmbkz */ |
| 131461 | VR128X, VK2WM, VR128X, i64mem, |
| 131462 | /* VPMULUDQZ128rmk */ |
| 131463 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 131464 | /* VPMULUDQZ128rmkz */ |
| 131465 | VR128X, VK2WM, VR128X, i128mem, |
| 131466 | /* VPMULUDQZ128rr */ |
| 131467 | VR128X, VR128X, VR128X, |
| 131468 | /* VPMULUDQZ128rrk */ |
| 131469 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 131470 | /* VPMULUDQZ128rrkz */ |
| 131471 | VR128X, VK2WM, VR128X, VR128X, |
| 131472 | /* VPMULUDQZ256rm */ |
| 131473 | VR256X, VR256X, i256mem, |
| 131474 | /* VPMULUDQZ256rmb */ |
| 131475 | VR256X, VR256X, i64mem, |
| 131476 | /* VPMULUDQZ256rmbk */ |
| 131477 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 131478 | /* VPMULUDQZ256rmbkz */ |
| 131479 | VR256X, VK4WM, VR256X, i64mem, |
| 131480 | /* VPMULUDQZ256rmk */ |
| 131481 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 131482 | /* VPMULUDQZ256rmkz */ |
| 131483 | VR256X, VK4WM, VR256X, i256mem, |
| 131484 | /* VPMULUDQZ256rr */ |
| 131485 | VR256X, VR256X, VR256X, |
| 131486 | /* VPMULUDQZ256rrk */ |
| 131487 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 131488 | /* VPMULUDQZ256rrkz */ |
| 131489 | VR256X, VK4WM, VR256X, VR256X, |
| 131490 | /* VPMULUDQZrm */ |
| 131491 | VR512, VR512, i512mem, |
| 131492 | /* VPMULUDQZrmb */ |
| 131493 | VR512, VR512, i64mem, |
| 131494 | /* VPMULUDQZrmbk */ |
| 131495 | VR512, VR512, VK8WM, VR512, i64mem, |
| 131496 | /* VPMULUDQZrmbkz */ |
| 131497 | VR512, VK8WM, VR512, i64mem, |
| 131498 | /* VPMULUDQZrmk */ |
| 131499 | VR512, VR512, VK8WM, VR512, i512mem, |
| 131500 | /* VPMULUDQZrmkz */ |
| 131501 | VR512, VK8WM, VR512, i512mem, |
| 131502 | /* VPMULUDQZrr */ |
| 131503 | VR512, VR512, VR512, |
| 131504 | /* VPMULUDQZrrk */ |
| 131505 | VR512, VR512, VK8WM, VR512, VR512, |
| 131506 | /* VPMULUDQZrrkz */ |
| 131507 | VR512, VK8WM, VR512, VR512, |
| 131508 | /* VPMULUDQrm */ |
| 131509 | VR128, VR128, i128mem, |
| 131510 | /* VPMULUDQrr */ |
| 131511 | VR128, VR128, VR128, |
| 131512 | /* VPOPCNTBZ128rm */ |
| 131513 | VR128X, i128mem, |
| 131514 | /* VPOPCNTBZ128rmk */ |
| 131515 | VR128X, VR128X, VK16WM, i128mem, |
| 131516 | /* VPOPCNTBZ128rmkz */ |
| 131517 | VR128X, VK16WM, i128mem, |
| 131518 | /* VPOPCNTBZ128rr */ |
| 131519 | VR128X, VR128X, |
| 131520 | /* VPOPCNTBZ128rrk */ |
| 131521 | VR128X, VR128X, VK16WM, VR128X, |
| 131522 | /* VPOPCNTBZ128rrkz */ |
| 131523 | VR128X, VK16WM, VR128X, |
| 131524 | /* VPOPCNTBZ256rm */ |
| 131525 | VR256X, i256mem, |
| 131526 | /* VPOPCNTBZ256rmk */ |
| 131527 | VR256X, VR256X, VK32WM, i256mem, |
| 131528 | /* VPOPCNTBZ256rmkz */ |
| 131529 | VR256X, VK32WM, i256mem, |
| 131530 | /* VPOPCNTBZ256rr */ |
| 131531 | VR256X, VR256X, |
| 131532 | /* VPOPCNTBZ256rrk */ |
| 131533 | VR256X, VR256X, VK32WM, VR256X, |
| 131534 | /* VPOPCNTBZ256rrkz */ |
| 131535 | VR256X, VK32WM, VR256X, |
| 131536 | /* VPOPCNTBZrm */ |
| 131537 | VR512, i512mem, |
| 131538 | /* VPOPCNTBZrmk */ |
| 131539 | VR512, VR512, VK64WM, i512mem, |
| 131540 | /* VPOPCNTBZrmkz */ |
| 131541 | VR512, VK64WM, i512mem, |
| 131542 | /* VPOPCNTBZrr */ |
| 131543 | VR512, VR512, |
| 131544 | /* VPOPCNTBZrrk */ |
| 131545 | VR512, VR512, VK64WM, VR512, |
| 131546 | /* VPOPCNTBZrrkz */ |
| 131547 | VR512, VK64WM, VR512, |
| 131548 | /* VPOPCNTDZ128rm */ |
| 131549 | VR128X, i128mem, |
| 131550 | /* VPOPCNTDZ128rmb */ |
| 131551 | VR128X, i32mem, |
| 131552 | /* VPOPCNTDZ128rmbk */ |
| 131553 | VR128X, VR128X, VK4WM, i32mem, |
| 131554 | /* VPOPCNTDZ128rmbkz */ |
| 131555 | VR128X, VK4WM, i32mem, |
| 131556 | /* VPOPCNTDZ128rmk */ |
| 131557 | VR128X, VR128X, VK4WM, i128mem, |
| 131558 | /* VPOPCNTDZ128rmkz */ |
| 131559 | VR128X, VK4WM, i128mem, |
| 131560 | /* VPOPCNTDZ128rr */ |
| 131561 | VR128X, VR128X, |
| 131562 | /* VPOPCNTDZ128rrk */ |
| 131563 | VR128X, VR128X, VK4WM, VR128X, |
| 131564 | /* VPOPCNTDZ128rrkz */ |
| 131565 | VR128X, VK4WM, VR128X, |
| 131566 | /* VPOPCNTDZ256rm */ |
| 131567 | VR256X, i256mem, |
| 131568 | /* VPOPCNTDZ256rmb */ |
| 131569 | VR256X, i32mem, |
| 131570 | /* VPOPCNTDZ256rmbk */ |
| 131571 | VR256X, VR256X, VK8WM, i32mem, |
| 131572 | /* VPOPCNTDZ256rmbkz */ |
| 131573 | VR256X, VK8WM, i32mem, |
| 131574 | /* VPOPCNTDZ256rmk */ |
| 131575 | VR256X, VR256X, VK8WM, i256mem, |
| 131576 | /* VPOPCNTDZ256rmkz */ |
| 131577 | VR256X, VK8WM, i256mem, |
| 131578 | /* VPOPCNTDZ256rr */ |
| 131579 | VR256X, VR256X, |
| 131580 | /* VPOPCNTDZ256rrk */ |
| 131581 | VR256X, VR256X, VK8WM, VR256X, |
| 131582 | /* VPOPCNTDZ256rrkz */ |
| 131583 | VR256X, VK8WM, VR256X, |
| 131584 | /* VPOPCNTDZrm */ |
| 131585 | VR512, i512mem, |
| 131586 | /* VPOPCNTDZrmb */ |
| 131587 | VR512, i32mem, |
| 131588 | /* VPOPCNTDZrmbk */ |
| 131589 | VR512, VR512, VK16WM, i32mem, |
| 131590 | /* VPOPCNTDZrmbkz */ |
| 131591 | VR512, VK16WM, i32mem, |
| 131592 | /* VPOPCNTDZrmk */ |
| 131593 | VR512, VR512, VK16WM, i512mem, |
| 131594 | /* VPOPCNTDZrmkz */ |
| 131595 | VR512, VK16WM, i512mem, |
| 131596 | /* VPOPCNTDZrr */ |
| 131597 | VR512, VR512, |
| 131598 | /* VPOPCNTDZrrk */ |
| 131599 | VR512, VR512, VK16WM, VR512, |
| 131600 | /* VPOPCNTDZrrkz */ |
| 131601 | VR512, VK16WM, VR512, |
| 131602 | /* VPOPCNTQZ128rm */ |
| 131603 | VR128X, i128mem, |
| 131604 | /* VPOPCNTQZ128rmb */ |
| 131605 | VR128X, i64mem, |
| 131606 | /* VPOPCNTQZ128rmbk */ |
| 131607 | VR128X, VR128X, VK2WM, i64mem, |
| 131608 | /* VPOPCNTQZ128rmbkz */ |
| 131609 | VR128X, VK2WM, i64mem, |
| 131610 | /* VPOPCNTQZ128rmk */ |
| 131611 | VR128X, VR128X, VK2WM, i128mem, |
| 131612 | /* VPOPCNTQZ128rmkz */ |
| 131613 | VR128X, VK2WM, i128mem, |
| 131614 | /* VPOPCNTQZ128rr */ |
| 131615 | VR128X, VR128X, |
| 131616 | /* VPOPCNTQZ128rrk */ |
| 131617 | VR128X, VR128X, VK2WM, VR128X, |
| 131618 | /* VPOPCNTQZ128rrkz */ |
| 131619 | VR128X, VK2WM, VR128X, |
| 131620 | /* VPOPCNTQZ256rm */ |
| 131621 | VR256X, i256mem, |
| 131622 | /* VPOPCNTQZ256rmb */ |
| 131623 | VR256X, i64mem, |
| 131624 | /* VPOPCNTQZ256rmbk */ |
| 131625 | VR256X, VR256X, VK4WM, i64mem, |
| 131626 | /* VPOPCNTQZ256rmbkz */ |
| 131627 | VR256X, VK4WM, i64mem, |
| 131628 | /* VPOPCNTQZ256rmk */ |
| 131629 | VR256X, VR256X, VK4WM, i256mem, |
| 131630 | /* VPOPCNTQZ256rmkz */ |
| 131631 | VR256X, VK4WM, i256mem, |
| 131632 | /* VPOPCNTQZ256rr */ |
| 131633 | VR256X, VR256X, |
| 131634 | /* VPOPCNTQZ256rrk */ |
| 131635 | VR256X, VR256X, VK4WM, VR256X, |
| 131636 | /* VPOPCNTQZ256rrkz */ |
| 131637 | VR256X, VK4WM, VR256X, |
| 131638 | /* VPOPCNTQZrm */ |
| 131639 | VR512, i512mem, |
| 131640 | /* VPOPCNTQZrmb */ |
| 131641 | VR512, i64mem, |
| 131642 | /* VPOPCNTQZrmbk */ |
| 131643 | VR512, VR512, VK8WM, i64mem, |
| 131644 | /* VPOPCNTQZrmbkz */ |
| 131645 | VR512, VK8WM, i64mem, |
| 131646 | /* VPOPCNTQZrmk */ |
| 131647 | VR512, VR512, VK8WM, i512mem, |
| 131648 | /* VPOPCNTQZrmkz */ |
| 131649 | VR512, VK8WM, i512mem, |
| 131650 | /* VPOPCNTQZrr */ |
| 131651 | VR512, VR512, |
| 131652 | /* VPOPCNTQZrrk */ |
| 131653 | VR512, VR512, VK8WM, VR512, |
| 131654 | /* VPOPCNTQZrrkz */ |
| 131655 | VR512, VK8WM, VR512, |
| 131656 | /* VPOPCNTWZ128rm */ |
| 131657 | VR128X, i128mem, |
| 131658 | /* VPOPCNTWZ128rmk */ |
| 131659 | VR128X, VR128X, VK8WM, i128mem, |
| 131660 | /* VPOPCNTWZ128rmkz */ |
| 131661 | VR128X, VK8WM, i128mem, |
| 131662 | /* VPOPCNTWZ128rr */ |
| 131663 | VR128X, VR128X, |
| 131664 | /* VPOPCNTWZ128rrk */ |
| 131665 | VR128X, VR128X, VK8WM, VR128X, |
| 131666 | /* VPOPCNTWZ128rrkz */ |
| 131667 | VR128X, VK8WM, VR128X, |
| 131668 | /* VPOPCNTWZ256rm */ |
| 131669 | VR256X, i256mem, |
| 131670 | /* VPOPCNTWZ256rmk */ |
| 131671 | VR256X, VR256X, VK16WM, i256mem, |
| 131672 | /* VPOPCNTWZ256rmkz */ |
| 131673 | VR256X, VK16WM, i256mem, |
| 131674 | /* VPOPCNTWZ256rr */ |
| 131675 | VR256X, VR256X, |
| 131676 | /* VPOPCNTWZ256rrk */ |
| 131677 | VR256X, VR256X, VK16WM, VR256X, |
| 131678 | /* VPOPCNTWZ256rrkz */ |
| 131679 | VR256X, VK16WM, VR256X, |
| 131680 | /* VPOPCNTWZrm */ |
| 131681 | VR512, i512mem, |
| 131682 | /* VPOPCNTWZrmk */ |
| 131683 | VR512, VR512, VK32WM, i512mem, |
| 131684 | /* VPOPCNTWZrmkz */ |
| 131685 | VR512, VK32WM, i512mem, |
| 131686 | /* VPOPCNTWZrr */ |
| 131687 | VR512, VR512, |
| 131688 | /* VPOPCNTWZrrk */ |
| 131689 | VR512, VR512, VK32WM, VR512, |
| 131690 | /* VPOPCNTWZrrkz */ |
| 131691 | VR512, VK32WM, VR512, |
| 131692 | /* VPORDZ128rm */ |
| 131693 | VR128X, VR128X, i128mem, |
| 131694 | /* VPORDZ128rmb */ |
| 131695 | VR128X, VR128X, i32mem, |
| 131696 | /* VPORDZ128rmbk */ |
| 131697 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131698 | /* VPORDZ128rmbkz */ |
| 131699 | VR128X, VK4WM, VR128X, i32mem, |
| 131700 | /* VPORDZ128rmk */ |
| 131701 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131702 | /* VPORDZ128rmkz */ |
| 131703 | VR128X, VK4WM, VR128X, i128mem, |
| 131704 | /* VPORDZ128rr */ |
| 131705 | VR128X, VR128X, VR128X, |
| 131706 | /* VPORDZ128rrk */ |
| 131707 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131708 | /* VPORDZ128rrkz */ |
| 131709 | VR128X, VK4WM, VR128X, VR128X, |
| 131710 | /* VPORDZ256rm */ |
| 131711 | VR256X, VR256X, i256mem, |
| 131712 | /* VPORDZ256rmb */ |
| 131713 | VR256X, VR256X, i32mem, |
| 131714 | /* VPORDZ256rmbk */ |
| 131715 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131716 | /* VPORDZ256rmbkz */ |
| 131717 | VR256X, VK8WM, VR256X, i32mem, |
| 131718 | /* VPORDZ256rmk */ |
| 131719 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131720 | /* VPORDZ256rmkz */ |
| 131721 | VR256X, VK8WM, VR256X, i256mem, |
| 131722 | /* VPORDZ256rr */ |
| 131723 | VR256X, VR256X, VR256X, |
| 131724 | /* VPORDZ256rrk */ |
| 131725 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131726 | /* VPORDZ256rrkz */ |
| 131727 | VR256X, VK8WM, VR256X, VR256X, |
| 131728 | /* VPORDZrm */ |
| 131729 | VR512, VR512, i512mem, |
| 131730 | /* VPORDZrmb */ |
| 131731 | VR512, VR512, i32mem, |
| 131732 | /* VPORDZrmbk */ |
| 131733 | VR512, VR512, VK16WM, VR512, i32mem, |
| 131734 | /* VPORDZrmbkz */ |
| 131735 | VR512, VK16WM, VR512, i32mem, |
| 131736 | /* VPORDZrmk */ |
| 131737 | VR512, VR512, VK16WM, VR512, i512mem, |
| 131738 | /* VPORDZrmkz */ |
| 131739 | VR512, VK16WM, VR512, i512mem, |
| 131740 | /* VPORDZrr */ |
| 131741 | VR512, VR512, VR512, |
| 131742 | /* VPORDZrrk */ |
| 131743 | VR512, VR512, VK16WM, VR512, VR512, |
| 131744 | /* VPORDZrrkz */ |
| 131745 | VR512, VK16WM, VR512, VR512, |
| 131746 | /* VPORQZ128rm */ |
| 131747 | VR128X, VR128X, i128mem, |
| 131748 | /* VPORQZ128rmb */ |
| 131749 | VR128X, VR128X, i64mem, |
| 131750 | /* VPORQZ128rmbk */ |
| 131751 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 131752 | /* VPORQZ128rmbkz */ |
| 131753 | VR128X, VK2WM, VR128X, i64mem, |
| 131754 | /* VPORQZ128rmk */ |
| 131755 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 131756 | /* VPORQZ128rmkz */ |
| 131757 | VR128X, VK2WM, VR128X, i128mem, |
| 131758 | /* VPORQZ128rr */ |
| 131759 | VR128X, VR128X, VR128X, |
| 131760 | /* VPORQZ128rrk */ |
| 131761 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 131762 | /* VPORQZ128rrkz */ |
| 131763 | VR128X, VK2WM, VR128X, VR128X, |
| 131764 | /* VPORQZ256rm */ |
| 131765 | VR256X, VR256X, i256mem, |
| 131766 | /* VPORQZ256rmb */ |
| 131767 | VR256X, VR256X, i64mem, |
| 131768 | /* VPORQZ256rmbk */ |
| 131769 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 131770 | /* VPORQZ256rmbkz */ |
| 131771 | VR256X, VK4WM, VR256X, i64mem, |
| 131772 | /* VPORQZ256rmk */ |
| 131773 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 131774 | /* VPORQZ256rmkz */ |
| 131775 | VR256X, VK4WM, VR256X, i256mem, |
| 131776 | /* VPORQZ256rr */ |
| 131777 | VR256X, VR256X, VR256X, |
| 131778 | /* VPORQZ256rrk */ |
| 131779 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 131780 | /* VPORQZ256rrkz */ |
| 131781 | VR256X, VK4WM, VR256X, VR256X, |
| 131782 | /* VPORQZrm */ |
| 131783 | VR512, VR512, i512mem, |
| 131784 | /* VPORQZrmb */ |
| 131785 | VR512, VR512, i64mem, |
| 131786 | /* VPORQZrmbk */ |
| 131787 | VR512, VR512, VK8WM, VR512, i64mem, |
| 131788 | /* VPORQZrmbkz */ |
| 131789 | VR512, VK8WM, VR512, i64mem, |
| 131790 | /* VPORQZrmk */ |
| 131791 | VR512, VR512, VK8WM, VR512, i512mem, |
| 131792 | /* VPORQZrmkz */ |
| 131793 | VR512, VK8WM, VR512, i512mem, |
| 131794 | /* VPORQZrr */ |
| 131795 | VR512, VR512, VR512, |
| 131796 | /* VPORQZrrk */ |
| 131797 | VR512, VR512, VK8WM, VR512, VR512, |
| 131798 | /* VPORQZrrkz */ |
| 131799 | VR512, VK8WM, VR512, VR512, |
| 131800 | /* VPORYrm */ |
| 131801 | VR256, VR256, i256mem, |
| 131802 | /* VPORYrr */ |
| 131803 | VR256, VR256, VR256, |
| 131804 | /* VPORrm */ |
| 131805 | VR128, VR128, i128mem, |
| 131806 | /* VPORrr */ |
| 131807 | VR128, VR128, VR128, |
| 131808 | /* VPPERMrmr */ |
| 131809 | VR128, VR128, i128mem, VR128, |
| 131810 | /* VPPERMrrm */ |
| 131811 | VR128, VR128, VR128, i128mem, |
| 131812 | /* VPPERMrrr */ |
| 131813 | VR128, VR128, VR128, VR128, |
| 131814 | /* VPPERMrrr_REV */ |
| 131815 | VR128, VR128, VR128, VR128, |
| 131816 | /* VPROLDZ128mbi */ |
| 131817 | VR128X, i32mem, u8imm, |
| 131818 | /* VPROLDZ128mbik */ |
| 131819 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 131820 | /* VPROLDZ128mbikz */ |
| 131821 | VR128X, VK4WM, i32mem, u8imm, |
| 131822 | /* VPROLDZ128mi */ |
| 131823 | VR128X, i128mem, u8imm, |
| 131824 | /* VPROLDZ128mik */ |
| 131825 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 131826 | /* VPROLDZ128mikz */ |
| 131827 | VR128X, VK4WM, i128mem, u8imm, |
| 131828 | /* VPROLDZ128ri */ |
| 131829 | VR128X, VR128X, u8imm, |
| 131830 | /* VPROLDZ128rik */ |
| 131831 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 131832 | /* VPROLDZ128rikz */ |
| 131833 | VR128X, VK4WM, VR128X, u8imm, |
| 131834 | /* VPROLDZ256mbi */ |
| 131835 | VR256X, i32mem, u8imm, |
| 131836 | /* VPROLDZ256mbik */ |
| 131837 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 131838 | /* VPROLDZ256mbikz */ |
| 131839 | VR256X, VK8WM, i32mem, u8imm, |
| 131840 | /* VPROLDZ256mi */ |
| 131841 | VR256X, i256mem, u8imm, |
| 131842 | /* VPROLDZ256mik */ |
| 131843 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 131844 | /* VPROLDZ256mikz */ |
| 131845 | VR256X, VK8WM, i256mem, u8imm, |
| 131846 | /* VPROLDZ256ri */ |
| 131847 | VR256X, VR256X, u8imm, |
| 131848 | /* VPROLDZ256rik */ |
| 131849 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 131850 | /* VPROLDZ256rikz */ |
| 131851 | VR256X, VK8WM, VR256X, u8imm, |
| 131852 | /* VPROLDZmbi */ |
| 131853 | VR512, i32mem, u8imm, |
| 131854 | /* VPROLDZmbik */ |
| 131855 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 131856 | /* VPROLDZmbikz */ |
| 131857 | VR512, VK16WM, i32mem, u8imm, |
| 131858 | /* VPROLDZmi */ |
| 131859 | VR512, i512mem, u8imm, |
| 131860 | /* VPROLDZmik */ |
| 131861 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 131862 | /* VPROLDZmikz */ |
| 131863 | VR512, VK16WM, i512mem, u8imm, |
| 131864 | /* VPROLDZri */ |
| 131865 | VR512, VR512, u8imm, |
| 131866 | /* VPROLDZrik */ |
| 131867 | VR512, VR512, VK16WM, VR512, u8imm, |
| 131868 | /* VPROLDZrikz */ |
| 131869 | VR512, VK16WM, VR512, u8imm, |
| 131870 | /* VPROLQZ128mbi */ |
| 131871 | VR128X, i64mem, u8imm, |
| 131872 | /* VPROLQZ128mbik */ |
| 131873 | VR128X, VR128X, VK2WM, i64mem, u8imm, |
| 131874 | /* VPROLQZ128mbikz */ |
| 131875 | VR128X, VK2WM, i64mem, u8imm, |
| 131876 | /* VPROLQZ128mi */ |
| 131877 | VR128X, i128mem, u8imm, |
| 131878 | /* VPROLQZ128mik */ |
| 131879 | VR128X, VR128X, VK2WM, i128mem, u8imm, |
| 131880 | /* VPROLQZ128mikz */ |
| 131881 | VR128X, VK2WM, i128mem, u8imm, |
| 131882 | /* VPROLQZ128ri */ |
| 131883 | VR128X, VR128X, u8imm, |
| 131884 | /* VPROLQZ128rik */ |
| 131885 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 131886 | /* VPROLQZ128rikz */ |
| 131887 | VR128X, VK2WM, VR128X, u8imm, |
| 131888 | /* VPROLQZ256mbi */ |
| 131889 | VR256X, i64mem, u8imm, |
| 131890 | /* VPROLQZ256mbik */ |
| 131891 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 131892 | /* VPROLQZ256mbikz */ |
| 131893 | VR256X, VK4WM, i64mem, u8imm, |
| 131894 | /* VPROLQZ256mi */ |
| 131895 | VR256X, i256mem, u8imm, |
| 131896 | /* VPROLQZ256mik */ |
| 131897 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 131898 | /* VPROLQZ256mikz */ |
| 131899 | VR256X, VK4WM, i256mem, u8imm, |
| 131900 | /* VPROLQZ256ri */ |
| 131901 | VR256X, VR256X, u8imm, |
| 131902 | /* VPROLQZ256rik */ |
| 131903 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 131904 | /* VPROLQZ256rikz */ |
| 131905 | VR256X, VK4WM, VR256X, u8imm, |
| 131906 | /* VPROLQZmbi */ |
| 131907 | VR512, i64mem, u8imm, |
| 131908 | /* VPROLQZmbik */ |
| 131909 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 131910 | /* VPROLQZmbikz */ |
| 131911 | VR512, VK8WM, i64mem, u8imm, |
| 131912 | /* VPROLQZmi */ |
| 131913 | VR512, i512mem, u8imm, |
| 131914 | /* VPROLQZmik */ |
| 131915 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 131916 | /* VPROLQZmikz */ |
| 131917 | VR512, VK8WM, i512mem, u8imm, |
| 131918 | /* VPROLQZri */ |
| 131919 | VR512, VR512, u8imm, |
| 131920 | /* VPROLQZrik */ |
| 131921 | VR512, VR512, VK8WM, VR512, u8imm, |
| 131922 | /* VPROLQZrikz */ |
| 131923 | VR512, VK8WM, VR512, u8imm, |
| 131924 | /* VPROLVDZ128rm */ |
| 131925 | VR128X, VR128X, i128mem, |
| 131926 | /* VPROLVDZ128rmb */ |
| 131927 | VR128X, VR128X, i32mem, |
| 131928 | /* VPROLVDZ128rmbk */ |
| 131929 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131930 | /* VPROLVDZ128rmbkz */ |
| 131931 | VR128X, VK4WM, VR128X, i32mem, |
| 131932 | /* VPROLVDZ128rmk */ |
| 131933 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131934 | /* VPROLVDZ128rmkz */ |
| 131935 | VR128X, VK4WM, VR128X, i128mem, |
| 131936 | /* VPROLVDZ128rr */ |
| 131937 | VR128X, VR128X, VR128X, |
| 131938 | /* VPROLVDZ128rrk */ |
| 131939 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131940 | /* VPROLVDZ128rrkz */ |
| 131941 | VR128X, VK4WM, VR128X, VR128X, |
| 131942 | /* VPROLVDZ256rm */ |
| 131943 | VR256X, VR256X, i256mem, |
| 131944 | /* VPROLVDZ256rmb */ |
| 131945 | VR256X, VR256X, i32mem, |
| 131946 | /* VPROLVDZ256rmbk */ |
| 131947 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131948 | /* VPROLVDZ256rmbkz */ |
| 131949 | VR256X, VK8WM, VR256X, i32mem, |
| 131950 | /* VPROLVDZ256rmk */ |
| 131951 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131952 | /* VPROLVDZ256rmkz */ |
| 131953 | VR256X, VK8WM, VR256X, i256mem, |
| 131954 | /* VPROLVDZ256rr */ |
| 131955 | VR256X, VR256X, VR256X, |
| 131956 | /* VPROLVDZ256rrk */ |
| 131957 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131958 | /* VPROLVDZ256rrkz */ |
| 131959 | VR256X, VK8WM, VR256X, VR256X, |
| 131960 | /* VPROLVDZrm */ |
| 131961 | VR512, VR512, i512mem, |
| 131962 | /* VPROLVDZrmb */ |
| 131963 | VR512, VR512, i32mem, |
| 131964 | /* VPROLVDZrmbk */ |
| 131965 | VR512, VR512, VK16WM, VR512, i32mem, |
| 131966 | /* VPROLVDZrmbkz */ |
| 131967 | VR512, VK16WM, VR512, i32mem, |
| 131968 | /* VPROLVDZrmk */ |
| 131969 | VR512, VR512, VK16WM, VR512, i512mem, |
| 131970 | /* VPROLVDZrmkz */ |
| 131971 | VR512, VK16WM, VR512, i512mem, |
| 131972 | /* VPROLVDZrr */ |
| 131973 | VR512, VR512, VR512, |
| 131974 | /* VPROLVDZrrk */ |
| 131975 | VR512, VR512, VK16WM, VR512, VR512, |
| 131976 | /* VPROLVDZrrkz */ |
| 131977 | VR512, VK16WM, VR512, VR512, |
| 131978 | /* VPROLVQZ128rm */ |
| 131979 | VR128X, VR128X, i128mem, |
| 131980 | /* VPROLVQZ128rmb */ |
| 131981 | VR128X, VR128X, i64mem, |
| 131982 | /* VPROLVQZ128rmbk */ |
| 131983 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 131984 | /* VPROLVQZ128rmbkz */ |
| 131985 | VR128X, VK2WM, VR128X, i64mem, |
| 131986 | /* VPROLVQZ128rmk */ |
| 131987 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 131988 | /* VPROLVQZ128rmkz */ |
| 131989 | VR128X, VK2WM, VR128X, i128mem, |
| 131990 | /* VPROLVQZ128rr */ |
| 131991 | VR128X, VR128X, VR128X, |
| 131992 | /* VPROLVQZ128rrk */ |
| 131993 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 131994 | /* VPROLVQZ128rrkz */ |
| 131995 | VR128X, VK2WM, VR128X, VR128X, |
| 131996 | /* VPROLVQZ256rm */ |
| 131997 | VR256X, VR256X, i256mem, |
| 131998 | /* VPROLVQZ256rmb */ |
| 131999 | VR256X, VR256X, i64mem, |
| 132000 | /* VPROLVQZ256rmbk */ |
| 132001 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 132002 | /* VPROLVQZ256rmbkz */ |
| 132003 | VR256X, VK4WM, VR256X, i64mem, |
| 132004 | /* VPROLVQZ256rmk */ |
| 132005 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 132006 | /* VPROLVQZ256rmkz */ |
| 132007 | VR256X, VK4WM, VR256X, i256mem, |
| 132008 | /* VPROLVQZ256rr */ |
| 132009 | VR256X, VR256X, VR256X, |
| 132010 | /* VPROLVQZ256rrk */ |
| 132011 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132012 | /* VPROLVQZ256rrkz */ |
| 132013 | VR256X, VK4WM, VR256X, VR256X, |
| 132014 | /* VPROLVQZrm */ |
| 132015 | VR512, VR512, i512mem, |
| 132016 | /* VPROLVQZrmb */ |
| 132017 | VR512, VR512, i64mem, |
| 132018 | /* VPROLVQZrmbk */ |
| 132019 | VR512, VR512, VK8WM, VR512, i64mem, |
| 132020 | /* VPROLVQZrmbkz */ |
| 132021 | VR512, VK8WM, VR512, i64mem, |
| 132022 | /* VPROLVQZrmk */ |
| 132023 | VR512, VR512, VK8WM, VR512, i512mem, |
| 132024 | /* VPROLVQZrmkz */ |
| 132025 | VR512, VK8WM, VR512, i512mem, |
| 132026 | /* VPROLVQZrr */ |
| 132027 | VR512, VR512, VR512, |
| 132028 | /* VPROLVQZrrk */ |
| 132029 | VR512, VR512, VK8WM, VR512, VR512, |
| 132030 | /* VPROLVQZrrkz */ |
| 132031 | VR512, VK8WM, VR512, VR512, |
| 132032 | /* VPRORDZ128mbi */ |
| 132033 | VR128X, i32mem, u8imm, |
| 132034 | /* VPRORDZ128mbik */ |
| 132035 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 132036 | /* VPRORDZ128mbikz */ |
| 132037 | VR128X, VK4WM, i32mem, u8imm, |
| 132038 | /* VPRORDZ128mi */ |
| 132039 | VR128X, i128mem, u8imm, |
| 132040 | /* VPRORDZ128mik */ |
| 132041 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 132042 | /* VPRORDZ128mikz */ |
| 132043 | VR128X, VK4WM, i128mem, u8imm, |
| 132044 | /* VPRORDZ128ri */ |
| 132045 | VR128X, VR128X, u8imm, |
| 132046 | /* VPRORDZ128rik */ |
| 132047 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 132048 | /* VPRORDZ128rikz */ |
| 132049 | VR128X, VK4WM, VR128X, u8imm, |
| 132050 | /* VPRORDZ256mbi */ |
| 132051 | VR256X, i32mem, u8imm, |
| 132052 | /* VPRORDZ256mbik */ |
| 132053 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 132054 | /* VPRORDZ256mbikz */ |
| 132055 | VR256X, VK8WM, i32mem, u8imm, |
| 132056 | /* VPRORDZ256mi */ |
| 132057 | VR256X, i256mem, u8imm, |
| 132058 | /* VPRORDZ256mik */ |
| 132059 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 132060 | /* VPRORDZ256mikz */ |
| 132061 | VR256X, VK8WM, i256mem, u8imm, |
| 132062 | /* VPRORDZ256ri */ |
| 132063 | VR256X, VR256X, u8imm, |
| 132064 | /* VPRORDZ256rik */ |
| 132065 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 132066 | /* VPRORDZ256rikz */ |
| 132067 | VR256X, VK8WM, VR256X, u8imm, |
| 132068 | /* VPRORDZmbi */ |
| 132069 | VR512, i32mem, u8imm, |
| 132070 | /* VPRORDZmbik */ |
| 132071 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 132072 | /* VPRORDZmbikz */ |
| 132073 | VR512, VK16WM, i32mem, u8imm, |
| 132074 | /* VPRORDZmi */ |
| 132075 | VR512, i512mem, u8imm, |
| 132076 | /* VPRORDZmik */ |
| 132077 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 132078 | /* VPRORDZmikz */ |
| 132079 | VR512, VK16WM, i512mem, u8imm, |
| 132080 | /* VPRORDZri */ |
| 132081 | VR512, VR512, u8imm, |
| 132082 | /* VPRORDZrik */ |
| 132083 | VR512, VR512, VK16WM, VR512, u8imm, |
| 132084 | /* VPRORDZrikz */ |
| 132085 | VR512, VK16WM, VR512, u8imm, |
| 132086 | /* VPRORQZ128mbi */ |
| 132087 | VR128X, i64mem, u8imm, |
| 132088 | /* VPRORQZ128mbik */ |
| 132089 | VR128X, VR128X, VK2WM, i64mem, u8imm, |
| 132090 | /* VPRORQZ128mbikz */ |
| 132091 | VR128X, VK2WM, i64mem, u8imm, |
| 132092 | /* VPRORQZ128mi */ |
| 132093 | VR128X, i128mem, u8imm, |
| 132094 | /* VPRORQZ128mik */ |
| 132095 | VR128X, VR128X, VK2WM, i128mem, u8imm, |
| 132096 | /* VPRORQZ128mikz */ |
| 132097 | VR128X, VK2WM, i128mem, u8imm, |
| 132098 | /* VPRORQZ128ri */ |
| 132099 | VR128X, VR128X, u8imm, |
| 132100 | /* VPRORQZ128rik */ |
| 132101 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 132102 | /* VPRORQZ128rikz */ |
| 132103 | VR128X, VK2WM, VR128X, u8imm, |
| 132104 | /* VPRORQZ256mbi */ |
| 132105 | VR256X, i64mem, u8imm, |
| 132106 | /* VPRORQZ256mbik */ |
| 132107 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 132108 | /* VPRORQZ256mbikz */ |
| 132109 | VR256X, VK4WM, i64mem, u8imm, |
| 132110 | /* VPRORQZ256mi */ |
| 132111 | VR256X, i256mem, u8imm, |
| 132112 | /* VPRORQZ256mik */ |
| 132113 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 132114 | /* VPRORQZ256mikz */ |
| 132115 | VR256X, VK4WM, i256mem, u8imm, |
| 132116 | /* VPRORQZ256ri */ |
| 132117 | VR256X, VR256X, u8imm, |
| 132118 | /* VPRORQZ256rik */ |
| 132119 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 132120 | /* VPRORQZ256rikz */ |
| 132121 | VR256X, VK4WM, VR256X, u8imm, |
| 132122 | /* VPRORQZmbi */ |
| 132123 | VR512, i64mem, u8imm, |
| 132124 | /* VPRORQZmbik */ |
| 132125 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 132126 | /* VPRORQZmbikz */ |
| 132127 | VR512, VK8WM, i64mem, u8imm, |
| 132128 | /* VPRORQZmi */ |
| 132129 | VR512, i512mem, u8imm, |
| 132130 | /* VPRORQZmik */ |
| 132131 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 132132 | /* VPRORQZmikz */ |
| 132133 | VR512, VK8WM, i512mem, u8imm, |
| 132134 | /* VPRORQZri */ |
| 132135 | VR512, VR512, u8imm, |
| 132136 | /* VPRORQZrik */ |
| 132137 | VR512, VR512, VK8WM, VR512, u8imm, |
| 132138 | /* VPRORQZrikz */ |
| 132139 | VR512, VK8WM, VR512, u8imm, |
| 132140 | /* VPRORVDZ128rm */ |
| 132141 | VR128X, VR128X, i128mem, |
| 132142 | /* VPRORVDZ128rmb */ |
| 132143 | VR128X, VR128X, i32mem, |
| 132144 | /* VPRORVDZ128rmbk */ |
| 132145 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 132146 | /* VPRORVDZ128rmbkz */ |
| 132147 | VR128X, VK4WM, VR128X, i32mem, |
| 132148 | /* VPRORVDZ128rmk */ |
| 132149 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 132150 | /* VPRORVDZ128rmkz */ |
| 132151 | VR128X, VK4WM, VR128X, i128mem, |
| 132152 | /* VPRORVDZ128rr */ |
| 132153 | VR128X, VR128X, VR128X, |
| 132154 | /* VPRORVDZ128rrk */ |
| 132155 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132156 | /* VPRORVDZ128rrkz */ |
| 132157 | VR128X, VK4WM, VR128X, VR128X, |
| 132158 | /* VPRORVDZ256rm */ |
| 132159 | VR256X, VR256X, i256mem, |
| 132160 | /* VPRORVDZ256rmb */ |
| 132161 | VR256X, VR256X, i32mem, |
| 132162 | /* VPRORVDZ256rmbk */ |
| 132163 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 132164 | /* VPRORVDZ256rmbkz */ |
| 132165 | VR256X, VK8WM, VR256X, i32mem, |
| 132166 | /* VPRORVDZ256rmk */ |
| 132167 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132168 | /* VPRORVDZ256rmkz */ |
| 132169 | VR256X, VK8WM, VR256X, i256mem, |
| 132170 | /* VPRORVDZ256rr */ |
| 132171 | VR256X, VR256X, VR256X, |
| 132172 | /* VPRORVDZ256rrk */ |
| 132173 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132174 | /* VPRORVDZ256rrkz */ |
| 132175 | VR256X, VK8WM, VR256X, VR256X, |
| 132176 | /* VPRORVDZrm */ |
| 132177 | VR512, VR512, i512mem, |
| 132178 | /* VPRORVDZrmb */ |
| 132179 | VR512, VR512, i32mem, |
| 132180 | /* VPRORVDZrmbk */ |
| 132181 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132182 | /* VPRORVDZrmbkz */ |
| 132183 | VR512, VK16WM, VR512, i32mem, |
| 132184 | /* VPRORVDZrmk */ |
| 132185 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132186 | /* VPRORVDZrmkz */ |
| 132187 | VR512, VK16WM, VR512, i512mem, |
| 132188 | /* VPRORVDZrr */ |
| 132189 | VR512, VR512, VR512, |
| 132190 | /* VPRORVDZrrk */ |
| 132191 | VR512, VR512, VK16WM, VR512, VR512, |
| 132192 | /* VPRORVDZrrkz */ |
| 132193 | VR512, VK16WM, VR512, VR512, |
| 132194 | /* VPRORVQZ128rm */ |
| 132195 | VR128X, VR128X, i128mem, |
| 132196 | /* VPRORVQZ128rmb */ |
| 132197 | VR128X, VR128X, i64mem, |
| 132198 | /* VPRORVQZ128rmbk */ |
| 132199 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 132200 | /* VPRORVQZ128rmbkz */ |
| 132201 | VR128X, VK2WM, VR128X, i64mem, |
| 132202 | /* VPRORVQZ128rmk */ |
| 132203 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 132204 | /* VPRORVQZ128rmkz */ |
| 132205 | VR128X, VK2WM, VR128X, i128mem, |
| 132206 | /* VPRORVQZ128rr */ |
| 132207 | VR128X, VR128X, VR128X, |
| 132208 | /* VPRORVQZ128rrk */ |
| 132209 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 132210 | /* VPRORVQZ128rrkz */ |
| 132211 | VR128X, VK2WM, VR128X, VR128X, |
| 132212 | /* VPRORVQZ256rm */ |
| 132213 | VR256X, VR256X, i256mem, |
| 132214 | /* VPRORVQZ256rmb */ |
| 132215 | VR256X, VR256X, i64mem, |
| 132216 | /* VPRORVQZ256rmbk */ |
| 132217 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 132218 | /* VPRORVQZ256rmbkz */ |
| 132219 | VR256X, VK4WM, VR256X, i64mem, |
| 132220 | /* VPRORVQZ256rmk */ |
| 132221 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 132222 | /* VPRORVQZ256rmkz */ |
| 132223 | VR256X, VK4WM, VR256X, i256mem, |
| 132224 | /* VPRORVQZ256rr */ |
| 132225 | VR256X, VR256X, VR256X, |
| 132226 | /* VPRORVQZ256rrk */ |
| 132227 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132228 | /* VPRORVQZ256rrkz */ |
| 132229 | VR256X, VK4WM, VR256X, VR256X, |
| 132230 | /* VPRORVQZrm */ |
| 132231 | VR512, VR512, i512mem, |
| 132232 | /* VPRORVQZrmb */ |
| 132233 | VR512, VR512, i64mem, |
| 132234 | /* VPRORVQZrmbk */ |
| 132235 | VR512, VR512, VK8WM, VR512, i64mem, |
| 132236 | /* VPRORVQZrmbkz */ |
| 132237 | VR512, VK8WM, VR512, i64mem, |
| 132238 | /* VPRORVQZrmk */ |
| 132239 | VR512, VR512, VK8WM, VR512, i512mem, |
| 132240 | /* VPRORVQZrmkz */ |
| 132241 | VR512, VK8WM, VR512, i512mem, |
| 132242 | /* VPRORVQZrr */ |
| 132243 | VR512, VR512, VR512, |
| 132244 | /* VPRORVQZrrk */ |
| 132245 | VR512, VR512, VK8WM, VR512, VR512, |
| 132246 | /* VPRORVQZrrkz */ |
| 132247 | VR512, VK8WM, VR512, VR512, |
| 132248 | /* VPROTBmi */ |
| 132249 | VR128, i128mem, u8imm, |
| 132250 | /* VPROTBmr */ |
| 132251 | VR128, i128mem, VR128, |
| 132252 | /* VPROTBri */ |
| 132253 | VR128, VR128, u8imm, |
| 132254 | /* VPROTBrm */ |
| 132255 | VR128, VR128, i128mem, |
| 132256 | /* VPROTBrr */ |
| 132257 | VR128, VR128, VR128, |
| 132258 | /* VPROTBrr_REV */ |
| 132259 | VR128, VR128, VR128, |
| 132260 | /* VPROTDmi */ |
| 132261 | VR128, i128mem, u8imm, |
| 132262 | /* VPROTDmr */ |
| 132263 | VR128, i128mem, VR128, |
| 132264 | /* VPROTDri */ |
| 132265 | VR128, VR128, u8imm, |
| 132266 | /* VPROTDrm */ |
| 132267 | VR128, VR128, i128mem, |
| 132268 | /* VPROTDrr */ |
| 132269 | VR128, VR128, VR128, |
| 132270 | /* VPROTDrr_REV */ |
| 132271 | VR128, VR128, VR128, |
| 132272 | /* VPROTQmi */ |
| 132273 | VR128, i128mem, u8imm, |
| 132274 | /* VPROTQmr */ |
| 132275 | VR128, i128mem, VR128, |
| 132276 | /* VPROTQri */ |
| 132277 | VR128, VR128, u8imm, |
| 132278 | /* VPROTQrm */ |
| 132279 | VR128, VR128, i128mem, |
| 132280 | /* VPROTQrr */ |
| 132281 | VR128, VR128, VR128, |
| 132282 | /* VPROTQrr_REV */ |
| 132283 | VR128, VR128, VR128, |
| 132284 | /* VPROTWmi */ |
| 132285 | VR128, i128mem, u8imm, |
| 132286 | /* VPROTWmr */ |
| 132287 | VR128, i128mem, VR128, |
| 132288 | /* VPROTWri */ |
| 132289 | VR128, VR128, u8imm, |
| 132290 | /* VPROTWrm */ |
| 132291 | VR128, VR128, i128mem, |
| 132292 | /* VPROTWrr */ |
| 132293 | VR128, VR128, VR128, |
| 132294 | /* VPROTWrr_REV */ |
| 132295 | VR128, VR128, VR128, |
| 132296 | /* VPSADBWYrm */ |
| 132297 | VR256, VR256, i256mem, |
| 132298 | /* VPSADBWYrr */ |
| 132299 | VR256, VR256, VR256, |
| 132300 | /* VPSADBWZ128rm */ |
| 132301 | VR128X, VR128X, i128mem, |
| 132302 | /* VPSADBWZ128rr */ |
| 132303 | VR128X, VR128X, VR128X, |
| 132304 | /* VPSADBWZ256rm */ |
| 132305 | VR256X, VR256X, i256mem, |
| 132306 | /* VPSADBWZ256rr */ |
| 132307 | VR256X, VR256X, VR256X, |
| 132308 | /* VPSADBWZrm */ |
| 132309 | VR512, VR512, i512mem, |
| 132310 | /* VPSADBWZrr */ |
| 132311 | VR512, VR512, VR512, |
| 132312 | /* VPSADBWrm */ |
| 132313 | VR128, VR128, i128mem, |
| 132314 | /* VPSADBWrr */ |
| 132315 | VR128, VR128, VR128, |
| 132316 | /* VPSCATTERDDZ128mr */ |
| 132317 | VK4WM, vx32xmem, VK4WM, VR128X, |
| 132318 | /* VPSCATTERDDZ256mr */ |
| 132319 | VK8WM, vy32xmem, VK8WM, VR256X, |
| 132320 | /* VPSCATTERDDZmr */ |
| 132321 | VK16WM, vz32mem, VK16WM, VR512, |
| 132322 | /* VPSCATTERDQZ128mr */ |
| 132323 | VK2WM, vx64xmem, VK2WM, VR128X, |
| 132324 | /* VPSCATTERDQZ256mr */ |
| 132325 | VK4WM, vx64xmem, VK4WM, VR256X, |
| 132326 | /* VPSCATTERDQZmr */ |
| 132327 | VK8WM, vy64xmem, VK8WM, VR512, |
| 132328 | /* VPSCATTERQDZ128mr */ |
| 132329 | VK2WM, vx32xmem, VK2WM, VR128X, |
| 132330 | /* VPSCATTERQDZ256mr */ |
| 132331 | VK4WM, vy32xmem, VK4WM, VR128X, |
| 132332 | /* VPSCATTERQDZmr */ |
| 132333 | VK8WM, vz32mem, VK8WM, VR256X, |
| 132334 | /* VPSCATTERQQZ128mr */ |
| 132335 | VK2WM, vx64xmem, VK2WM, VR128X, |
| 132336 | /* VPSCATTERQQZ256mr */ |
| 132337 | VK4WM, vy64xmem, VK4WM, VR256X, |
| 132338 | /* VPSCATTERQQZmr */ |
| 132339 | VK8WM, vz64mem, VK8WM, VR512, |
| 132340 | /* VPSHABmr */ |
| 132341 | VR128, i128mem, VR128, |
| 132342 | /* VPSHABrm */ |
| 132343 | VR128, VR128, i128mem, |
| 132344 | /* VPSHABrr */ |
| 132345 | VR128, VR128, VR128, |
| 132346 | /* VPSHABrr_REV */ |
| 132347 | VR128, VR128, VR128, |
| 132348 | /* VPSHADmr */ |
| 132349 | VR128, i128mem, VR128, |
| 132350 | /* VPSHADrm */ |
| 132351 | VR128, VR128, i128mem, |
| 132352 | /* VPSHADrr */ |
| 132353 | VR128, VR128, VR128, |
| 132354 | /* VPSHADrr_REV */ |
| 132355 | VR128, VR128, VR128, |
| 132356 | /* VPSHAQmr */ |
| 132357 | VR128, i128mem, VR128, |
| 132358 | /* VPSHAQrm */ |
| 132359 | VR128, VR128, i128mem, |
| 132360 | /* VPSHAQrr */ |
| 132361 | VR128, VR128, VR128, |
| 132362 | /* VPSHAQrr_REV */ |
| 132363 | VR128, VR128, VR128, |
| 132364 | /* VPSHAWmr */ |
| 132365 | VR128, i128mem, VR128, |
| 132366 | /* VPSHAWrm */ |
| 132367 | VR128, VR128, i128mem, |
| 132368 | /* VPSHAWrr */ |
| 132369 | VR128, VR128, VR128, |
| 132370 | /* VPSHAWrr_REV */ |
| 132371 | VR128, VR128, VR128, |
| 132372 | /* VPSHLBmr */ |
| 132373 | VR128, i128mem, VR128, |
| 132374 | /* VPSHLBrm */ |
| 132375 | VR128, VR128, i128mem, |
| 132376 | /* VPSHLBrr */ |
| 132377 | VR128, VR128, VR128, |
| 132378 | /* VPSHLBrr_REV */ |
| 132379 | VR128, VR128, VR128, |
| 132380 | /* VPSHLDDZ128rmbi */ |
| 132381 | VR128X, VR128X, i32mem, u8imm, |
| 132382 | /* VPSHLDDZ128rmbik */ |
| 132383 | VR128X, VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 132384 | /* VPSHLDDZ128rmbikz */ |
| 132385 | VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 132386 | /* VPSHLDDZ128rmi */ |
| 132387 | VR128X, VR128X, i128mem, u8imm, |
| 132388 | /* VPSHLDDZ128rmik */ |
| 132389 | VR128X, VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 132390 | /* VPSHLDDZ128rmikz */ |
| 132391 | VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 132392 | /* VPSHLDDZ128rri */ |
| 132393 | VR128X, VR128X, VR128X, u8imm, |
| 132394 | /* VPSHLDDZ128rrik */ |
| 132395 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 132396 | /* VPSHLDDZ128rrikz */ |
| 132397 | VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 132398 | /* VPSHLDDZ256rmbi */ |
| 132399 | VR256X, VR256X, i32mem, u8imm, |
| 132400 | /* VPSHLDDZ256rmbik */ |
| 132401 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 132402 | /* VPSHLDDZ256rmbikz */ |
| 132403 | VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 132404 | /* VPSHLDDZ256rmi */ |
| 132405 | VR256X, VR256X, i256mem, u8imm, |
| 132406 | /* VPSHLDDZ256rmik */ |
| 132407 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 132408 | /* VPSHLDDZ256rmikz */ |
| 132409 | VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 132410 | /* VPSHLDDZ256rri */ |
| 132411 | VR256X, VR256X, VR256X, u8imm, |
| 132412 | /* VPSHLDDZ256rrik */ |
| 132413 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 132414 | /* VPSHLDDZ256rrikz */ |
| 132415 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 132416 | /* VPSHLDDZrmbi */ |
| 132417 | VR512, VR512, i32mem, u8imm, |
| 132418 | /* VPSHLDDZrmbik */ |
| 132419 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 132420 | /* VPSHLDDZrmbikz */ |
| 132421 | VR512, VK16WM, VR512, i32mem, u8imm, |
| 132422 | /* VPSHLDDZrmi */ |
| 132423 | VR512, VR512, i512mem, u8imm, |
| 132424 | /* VPSHLDDZrmik */ |
| 132425 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 132426 | /* VPSHLDDZrmikz */ |
| 132427 | VR512, VK16WM, VR512, i512mem, u8imm, |
| 132428 | /* VPSHLDDZrri */ |
| 132429 | VR512, VR512, VR512, u8imm, |
| 132430 | /* VPSHLDDZrrik */ |
| 132431 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 132432 | /* VPSHLDDZrrikz */ |
| 132433 | VR512, VK16WM, VR512, VR512, u8imm, |
| 132434 | /* VPSHLDQZ128rmbi */ |
| 132435 | VR128X, VR128X, i64mem, u8imm, |
| 132436 | /* VPSHLDQZ128rmbik */ |
| 132437 | VR128X, VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 132438 | /* VPSHLDQZ128rmbikz */ |
| 132439 | VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 132440 | /* VPSHLDQZ128rmi */ |
| 132441 | VR128X, VR128X, i128mem, u8imm, |
| 132442 | /* VPSHLDQZ128rmik */ |
| 132443 | VR128X, VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 132444 | /* VPSHLDQZ128rmikz */ |
| 132445 | VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 132446 | /* VPSHLDQZ128rri */ |
| 132447 | VR128X, VR128X, VR128X, u8imm, |
| 132448 | /* VPSHLDQZ128rrik */ |
| 132449 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 132450 | /* VPSHLDQZ128rrikz */ |
| 132451 | VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 132452 | /* VPSHLDQZ256rmbi */ |
| 132453 | VR256X, VR256X, i64mem, u8imm, |
| 132454 | /* VPSHLDQZ256rmbik */ |
| 132455 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 132456 | /* VPSHLDQZ256rmbikz */ |
| 132457 | VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 132458 | /* VPSHLDQZ256rmi */ |
| 132459 | VR256X, VR256X, i256mem, u8imm, |
| 132460 | /* VPSHLDQZ256rmik */ |
| 132461 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 132462 | /* VPSHLDQZ256rmikz */ |
| 132463 | VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 132464 | /* VPSHLDQZ256rri */ |
| 132465 | VR256X, VR256X, VR256X, u8imm, |
| 132466 | /* VPSHLDQZ256rrik */ |
| 132467 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 132468 | /* VPSHLDQZ256rrikz */ |
| 132469 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 132470 | /* VPSHLDQZrmbi */ |
| 132471 | VR512, VR512, i64mem, u8imm, |
| 132472 | /* VPSHLDQZrmbik */ |
| 132473 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 132474 | /* VPSHLDQZrmbikz */ |
| 132475 | VR512, VK8WM, VR512, i64mem, u8imm, |
| 132476 | /* VPSHLDQZrmi */ |
| 132477 | VR512, VR512, i512mem, u8imm, |
| 132478 | /* VPSHLDQZrmik */ |
| 132479 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 132480 | /* VPSHLDQZrmikz */ |
| 132481 | VR512, VK8WM, VR512, i512mem, u8imm, |
| 132482 | /* VPSHLDQZrri */ |
| 132483 | VR512, VR512, VR512, u8imm, |
| 132484 | /* VPSHLDQZrrik */ |
| 132485 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 132486 | /* VPSHLDQZrrikz */ |
| 132487 | VR512, VK8WM, VR512, VR512, u8imm, |
| 132488 | /* VPSHLDVDZ128m */ |
| 132489 | VR128X, VR128X, VR128X, i128mem, |
| 132490 | /* VPSHLDVDZ128mb */ |
| 132491 | VR128X, VR128X, VR128X, i32mem, |
| 132492 | /* VPSHLDVDZ128mbk */ |
| 132493 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 132494 | /* VPSHLDVDZ128mbkz */ |
| 132495 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 132496 | /* VPSHLDVDZ128mk */ |
| 132497 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 132498 | /* VPSHLDVDZ128mkz */ |
| 132499 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 132500 | /* VPSHLDVDZ128r */ |
| 132501 | VR128X, VR128X, VR128X, VR128X, |
| 132502 | /* VPSHLDVDZ128rk */ |
| 132503 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132504 | /* VPSHLDVDZ128rkz */ |
| 132505 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132506 | /* VPSHLDVDZ256m */ |
| 132507 | VR256X, VR256X, VR256X, i256mem, |
| 132508 | /* VPSHLDVDZ256mb */ |
| 132509 | VR256X, VR256X, VR256X, i32mem, |
| 132510 | /* VPSHLDVDZ256mbk */ |
| 132511 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 132512 | /* VPSHLDVDZ256mbkz */ |
| 132513 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 132514 | /* VPSHLDVDZ256mk */ |
| 132515 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132516 | /* VPSHLDVDZ256mkz */ |
| 132517 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132518 | /* VPSHLDVDZ256r */ |
| 132519 | VR256X, VR256X, VR256X, VR256X, |
| 132520 | /* VPSHLDVDZ256rk */ |
| 132521 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132522 | /* VPSHLDVDZ256rkz */ |
| 132523 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132524 | /* VPSHLDVDZm */ |
| 132525 | VR512, VR512, VR512, i512mem, |
| 132526 | /* VPSHLDVDZmb */ |
| 132527 | VR512, VR512, VR512, i32mem, |
| 132528 | /* VPSHLDVDZmbk */ |
| 132529 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132530 | /* VPSHLDVDZmbkz */ |
| 132531 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132532 | /* VPSHLDVDZmk */ |
| 132533 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132534 | /* VPSHLDVDZmkz */ |
| 132535 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132536 | /* VPSHLDVDZr */ |
| 132537 | VR512, VR512, VR512, VR512, |
| 132538 | /* VPSHLDVDZrk */ |
| 132539 | VR512, VR512, VK16WM, VR512, VR512, |
| 132540 | /* VPSHLDVDZrkz */ |
| 132541 | VR512, VR512, VK16WM, VR512, VR512, |
| 132542 | /* VPSHLDVQZ128m */ |
| 132543 | VR128X, VR128X, VR128X, i128mem, |
| 132544 | /* VPSHLDVQZ128mb */ |
| 132545 | VR128X, VR128X, VR128X, i64mem, |
| 132546 | /* VPSHLDVQZ128mbk */ |
| 132547 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 132548 | /* VPSHLDVQZ128mbkz */ |
| 132549 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 132550 | /* VPSHLDVQZ128mk */ |
| 132551 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 132552 | /* VPSHLDVQZ128mkz */ |
| 132553 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 132554 | /* VPSHLDVQZ128r */ |
| 132555 | VR128X, VR128X, VR128X, VR128X, |
| 132556 | /* VPSHLDVQZ128rk */ |
| 132557 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 132558 | /* VPSHLDVQZ128rkz */ |
| 132559 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 132560 | /* VPSHLDVQZ256m */ |
| 132561 | VR256X, VR256X, VR256X, i256mem, |
| 132562 | /* VPSHLDVQZ256mb */ |
| 132563 | VR256X, VR256X, VR256X, i64mem, |
| 132564 | /* VPSHLDVQZ256mbk */ |
| 132565 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 132566 | /* VPSHLDVQZ256mbkz */ |
| 132567 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 132568 | /* VPSHLDVQZ256mk */ |
| 132569 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 132570 | /* VPSHLDVQZ256mkz */ |
| 132571 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 132572 | /* VPSHLDVQZ256r */ |
| 132573 | VR256X, VR256X, VR256X, VR256X, |
| 132574 | /* VPSHLDVQZ256rk */ |
| 132575 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132576 | /* VPSHLDVQZ256rkz */ |
| 132577 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132578 | /* VPSHLDVQZm */ |
| 132579 | VR512, VR512, VR512, i512mem, |
| 132580 | /* VPSHLDVQZmb */ |
| 132581 | VR512, VR512, VR512, i64mem, |
| 132582 | /* VPSHLDVQZmbk */ |
| 132583 | VR512, VR512, VK8WM, VR512, i64mem, |
| 132584 | /* VPSHLDVQZmbkz */ |
| 132585 | VR512, VR512, VK8WM, VR512, i64mem, |
| 132586 | /* VPSHLDVQZmk */ |
| 132587 | VR512, VR512, VK8WM, VR512, i512mem, |
| 132588 | /* VPSHLDVQZmkz */ |
| 132589 | VR512, VR512, VK8WM, VR512, i512mem, |
| 132590 | /* VPSHLDVQZr */ |
| 132591 | VR512, VR512, VR512, VR512, |
| 132592 | /* VPSHLDVQZrk */ |
| 132593 | VR512, VR512, VK8WM, VR512, VR512, |
| 132594 | /* VPSHLDVQZrkz */ |
| 132595 | VR512, VR512, VK8WM, VR512, VR512, |
| 132596 | /* VPSHLDVWZ128m */ |
| 132597 | VR128X, VR128X, VR128X, i128mem, |
| 132598 | /* VPSHLDVWZ128mk */ |
| 132599 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 132600 | /* VPSHLDVWZ128mkz */ |
| 132601 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 132602 | /* VPSHLDVWZ128r */ |
| 132603 | VR128X, VR128X, VR128X, VR128X, |
| 132604 | /* VPSHLDVWZ128rk */ |
| 132605 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 132606 | /* VPSHLDVWZ128rkz */ |
| 132607 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 132608 | /* VPSHLDVWZ256m */ |
| 132609 | VR256X, VR256X, VR256X, i256mem, |
| 132610 | /* VPSHLDVWZ256mk */ |
| 132611 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 132612 | /* VPSHLDVWZ256mkz */ |
| 132613 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 132614 | /* VPSHLDVWZ256r */ |
| 132615 | VR256X, VR256X, VR256X, VR256X, |
| 132616 | /* VPSHLDVWZ256rk */ |
| 132617 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 132618 | /* VPSHLDVWZ256rkz */ |
| 132619 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 132620 | /* VPSHLDVWZm */ |
| 132621 | VR512, VR512, VR512, i512mem, |
| 132622 | /* VPSHLDVWZmk */ |
| 132623 | VR512, VR512, VK32WM, VR512, i512mem, |
| 132624 | /* VPSHLDVWZmkz */ |
| 132625 | VR512, VR512, VK32WM, VR512, i512mem, |
| 132626 | /* VPSHLDVWZr */ |
| 132627 | VR512, VR512, VR512, VR512, |
| 132628 | /* VPSHLDVWZrk */ |
| 132629 | VR512, VR512, VK32WM, VR512, VR512, |
| 132630 | /* VPSHLDVWZrkz */ |
| 132631 | VR512, VR512, VK32WM, VR512, VR512, |
| 132632 | /* VPSHLDWZ128rmi */ |
| 132633 | VR128X, VR128X, i128mem, u8imm, |
| 132634 | /* VPSHLDWZ128rmik */ |
| 132635 | VR128X, VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 132636 | /* VPSHLDWZ128rmikz */ |
| 132637 | VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 132638 | /* VPSHLDWZ128rri */ |
| 132639 | VR128X, VR128X, VR128X, u8imm, |
| 132640 | /* VPSHLDWZ128rrik */ |
| 132641 | VR128X, VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 132642 | /* VPSHLDWZ128rrikz */ |
| 132643 | VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 132644 | /* VPSHLDWZ256rmi */ |
| 132645 | VR256X, VR256X, i256mem, u8imm, |
| 132646 | /* VPSHLDWZ256rmik */ |
| 132647 | VR256X, VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 132648 | /* VPSHLDWZ256rmikz */ |
| 132649 | VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 132650 | /* VPSHLDWZ256rri */ |
| 132651 | VR256X, VR256X, VR256X, u8imm, |
| 132652 | /* VPSHLDWZ256rrik */ |
| 132653 | VR256X, VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 132654 | /* VPSHLDWZ256rrikz */ |
| 132655 | VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 132656 | /* VPSHLDWZrmi */ |
| 132657 | VR512, VR512, i512mem, u8imm, |
| 132658 | /* VPSHLDWZrmik */ |
| 132659 | VR512, VR512, VK32WM, VR512, i512mem, u8imm, |
| 132660 | /* VPSHLDWZrmikz */ |
| 132661 | VR512, VK32WM, VR512, i512mem, u8imm, |
| 132662 | /* VPSHLDWZrri */ |
| 132663 | VR512, VR512, VR512, u8imm, |
| 132664 | /* VPSHLDWZrrik */ |
| 132665 | VR512, VR512, VK32WM, VR512, VR512, u8imm, |
| 132666 | /* VPSHLDWZrrikz */ |
| 132667 | VR512, VK32WM, VR512, VR512, u8imm, |
| 132668 | /* VPSHLDmr */ |
| 132669 | VR128, i128mem, VR128, |
| 132670 | /* VPSHLDrm */ |
| 132671 | VR128, VR128, i128mem, |
| 132672 | /* VPSHLDrr */ |
| 132673 | VR128, VR128, VR128, |
| 132674 | /* VPSHLDrr_REV */ |
| 132675 | VR128, VR128, VR128, |
| 132676 | /* VPSHLQmr */ |
| 132677 | VR128, i128mem, VR128, |
| 132678 | /* VPSHLQrm */ |
| 132679 | VR128, VR128, i128mem, |
| 132680 | /* VPSHLQrr */ |
| 132681 | VR128, VR128, VR128, |
| 132682 | /* VPSHLQrr_REV */ |
| 132683 | VR128, VR128, VR128, |
| 132684 | /* VPSHLWmr */ |
| 132685 | VR128, i128mem, VR128, |
| 132686 | /* VPSHLWrm */ |
| 132687 | VR128, VR128, i128mem, |
| 132688 | /* VPSHLWrr */ |
| 132689 | VR128, VR128, VR128, |
| 132690 | /* VPSHLWrr_REV */ |
| 132691 | VR128, VR128, VR128, |
| 132692 | /* VPSHRDDZ128rmbi */ |
| 132693 | VR128X, VR128X, i32mem, u8imm, |
| 132694 | /* VPSHRDDZ128rmbik */ |
| 132695 | VR128X, VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 132696 | /* VPSHRDDZ128rmbikz */ |
| 132697 | VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 132698 | /* VPSHRDDZ128rmi */ |
| 132699 | VR128X, VR128X, i128mem, u8imm, |
| 132700 | /* VPSHRDDZ128rmik */ |
| 132701 | VR128X, VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 132702 | /* VPSHRDDZ128rmikz */ |
| 132703 | VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 132704 | /* VPSHRDDZ128rri */ |
| 132705 | VR128X, VR128X, VR128X, u8imm, |
| 132706 | /* VPSHRDDZ128rrik */ |
| 132707 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 132708 | /* VPSHRDDZ128rrikz */ |
| 132709 | VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 132710 | /* VPSHRDDZ256rmbi */ |
| 132711 | VR256X, VR256X, i32mem, u8imm, |
| 132712 | /* VPSHRDDZ256rmbik */ |
| 132713 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 132714 | /* VPSHRDDZ256rmbikz */ |
| 132715 | VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 132716 | /* VPSHRDDZ256rmi */ |
| 132717 | VR256X, VR256X, i256mem, u8imm, |
| 132718 | /* VPSHRDDZ256rmik */ |
| 132719 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 132720 | /* VPSHRDDZ256rmikz */ |
| 132721 | VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 132722 | /* VPSHRDDZ256rri */ |
| 132723 | VR256X, VR256X, VR256X, u8imm, |
| 132724 | /* VPSHRDDZ256rrik */ |
| 132725 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 132726 | /* VPSHRDDZ256rrikz */ |
| 132727 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 132728 | /* VPSHRDDZrmbi */ |
| 132729 | VR512, VR512, i32mem, u8imm, |
| 132730 | /* VPSHRDDZrmbik */ |
| 132731 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 132732 | /* VPSHRDDZrmbikz */ |
| 132733 | VR512, VK16WM, VR512, i32mem, u8imm, |
| 132734 | /* VPSHRDDZrmi */ |
| 132735 | VR512, VR512, i512mem, u8imm, |
| 132736 | /* VPSHRDDZrmik */ |
| 132737 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 132738 | /* VPSHRDDZrmikz */ |
| 132739 | VR512, VK16WM, VR512, i512mem, u8imm, |
| 132740 | /* VPSHRDDZrri */ |
| 132741 | VR512, VR512, VR512, u8imm, |
| 132742 | /* VPSHRDDZrrik */ |
| 132743 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 132744 | /* VPSHRDDZrrikz */ |
| 132745 | VR512, VK16WM, VR512, VR512, u8imm, |
| 132746 | /* VPSHRDQZ128rmbi */ |
| 132747 | VR128X, VR128X, i64mem, u8imm, |
| 132748 | /* VPSHRDQZ128rmbik */ |
| 132749 | VR128X, VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 132750 | /* VPSHRDQZ128rmbikz */ |
| 132751 | VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 132752 | /* VPSHRDQZ128rmi */ |
| 132753 | VR128X, VR128X, i128mem, u8imm, |
| 132754 | /* VPSHRDQZ128rmik */ |
| 132755 | VR128X, VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 132756 | /* VPSHRDQZ128rmikz */ |
| 132757 | VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 132758 | /* VPSHRDQZ128rri */ |
| 132759 | VR128X, VR128X, VR128X, u8imm, |
| 132760 | /* VPSHRDQZ128rrik */ |
| 132761 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 132762 | /* VPSHRDQZ128rrikz */ |
| 132763 | VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 132764 | /* VPSHRDQZ256rmbi */ |
| 132765 | VR256X, VR256X, i64mem, u8imm, |
| 132766 | /* VPSHRDQZ256rmbik */ |
| 132767 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 132768 | /* VPSHRDQZ256rmbikz */ |
| 132769 | VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 132770 | /* VPSHRDQZ256rmi */ |
| 132771 | VR256X, VR256X, i256mem, u8imm, |
| 132772 | /* VPSHRDQZ256rmik */ |
| 132773 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 132774 | /* VPSHRDQZ256rmikz */ |
| 132775 | VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 132776 | /* VPSHRDQZ256rri */ |
| 132777 | VR256X, VR256X, VR256X, u8imm, |
| 132778 | /* VPSHRDQZ256rrik */ |
| 132779 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 132780 | /* VPSHRDQZ256rrikz */ |
| 132781 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 132782 | /* VPSHRDQZrmbi */ |
| 132783 | VR512, VR512, i64mem, u8imm, |
| 132784 | /* VPSHRDQZrmbik */ |
| 132785 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 132786 | /* VPSHRDQZrmbikz */ |
| 132787 | VR512, VK8WM, VR512, i64mem, u8imm, |
| 132788 | /* VPSHRDQZrmi */ |
| 132789 | VR512, VR512, i512mem, u8imm, |
| 132790 | /* VPSHRDQZrmik */ |
| 132791 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 132792 | /* VPSHRDQZrmikz */ |
| 132793 | VR512, VK8WM, VR512, i512mem, u8imm, |
| 132794 | /* VPSHRDQZrri */ |
| 132795 | VR512, VR512, VR512, u8imm, |
| 132796 | /* VPSHRDQZrrik */ |
| 132797 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 132798 | /* VPSHRDQZrrikz */ |
| 132799 | VR512, VK8WM, VR512, VR512, u8imm, |
| 132800 | /* VPSHRDVDZ128m */ |
| 132801 | VR128X, VR128X, VR128X, i128mem, |
| 132802 | /* VPSHRDVDZ128mb */ |
| 132803 | VR128X, VR128X, VR128X, i32mem, |
| 132804 | /* VPSHRDVDZ128mbk */ |
| 132805 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 132806 | /* VPSHRDVDZ128mbkz */ |
| 132807 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 132808 | /* VPSHRDVDZ128mk */ |
| 132809 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 132810 | /* VPSHRDVDZ128mkz */ |
| 132811 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 132812 | /* VPSHRDVDZ128r */ |
| 132813 | VR128X, VR128X, VR128X, VR128X, |
| 132814 | /* VPSHRDVDZ128rk */ |
| 132815 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132816 | /* VPSHRDVDZ128rkz */ |
| 132817 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132818 | /* VPSHRDVDZ256m */ |
| 132819 | VR256X, VR256X, VR256X, i256mem, |
| 132820 | /* VPSHRDVDZ256mb */ |
| 132821 | VR256X, VR256X, VR256X, i32mem, |
| 132822 | /* VPSHRDVDZ256mbk */ |
| 132823 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 132824 | /* VPSHRDVDZ256mbkz */ |
| 132825 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 132826 | /* VPSHRDVDZ256mk */ |
| 132827 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132828 | /* VPSHRDVDZ256mkz */ |
| 132829 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132830 | /* VPSHRDVDZ256r */ |
| 132831 | VR256X, VR256X, VR256X, VR256X, |
| 132832 | /* VPSHRDVDZ256rk */ |
| 132833 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132834 | /* VPSHRDVDZ256rkz */ |
| 132835 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132836 | /* VPSHRDVDZm */ |
| 132837 | VR512, VR512, VR512, i512mem, |
| 132838 | /* VPSHRDVDZmb */ |
| 132839 | VR512, VR512, VR512, i32mem, |
| 132840 | /* VPSHRDVDZmbk */ |
| 132841 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132842 | /* VPSHRDVDZmbkz */ |
| 132843 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132844 | /* VPSHRDVDZmk */ |
| 132845 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132846 | /* VPSHRDVDZmkz */ |
| 132847 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132848 | /* VPSHRDVDZr */ |
| 132849 | VR512, VR512, VR512, VR512, |
| 132850 | /* VPSHRDVDZrk */ |
| 132851 | VR512, VR512, VK16WM, VR512, VR512, |
| 132852 | /* VPSHRDVDZrkz */ |
| 132853 | VR512, VR512, VK16WM, VR512, VR512, |
| 132854 | /* VPSHRDVQZ128m */ |
| 132855 | VR128X, VR128X, VR128X, i128mem, |
| 132856 | /* VPSHRDVQZ128mb */ |
| 132857 | VR128X, VR128X, VR128X, i64mem, |
| 132858 | /* VPSHRDVQZ128mbk */ |
| 132859 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 132860 | /* VPSHRDVQZ128mbkz */ |
| 132861 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 132862 | /* VPSHRDVQZ128mk */ |
| 132863 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 132864 | /* VPSHRDVQZ128mkz */ |
| 132865 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 132866 | /* VPSHRDVQZ128r */ |
| 132867 | VR128X, VR128X, VR128X, VR128X, |
| 132868 | /* VPSHRDVQZ128rk */ |
| 132869 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 132870 | /* VPSHRDVQZ128rkz */ |
| 132871 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 132872 | /* VPSHRDVQZ256m */ |
| 132873 | VR256X, VR256X, VR256X, i256mem, |
| 132874 | /* VPSHRDVQZ256mb */ |
| 132875 | VR256X, VR256X, VR256X, i64mem, |
| 132876 | /* VPSHRDVQZ256mbk */ |
| 132877 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 132878 | /* VPSHRDVQZ256mbkz */ |
| 132879 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 132880 | /* VPSHRDVQZ256mk */ |
| 132881 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 132882 | /* VPSHRDVQZ256mkz */ |
| 132883 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 132884 | /* VPSHRDVQZ256r */ |
| 132885 | VR256X, VR256X, VR256X, VR256X, |
| 132886 | /* VPSHRDVQZ256rk */ |
| 132887 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132888 | /* VPSHRDVQZ256rkz */ |
| 132889 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132890 | /* VPSHRDVQZm */ |
| 132891 | VR512, VR512, VR512, i512mem, |
| 132892 | /* VPSHRDVQZmb */ |
| 132893 | VR512, VR512, VR512, i64mem, |
| 132894 | /* VPSHRDVQZmbk */ |
| 132895 | VR512, VR512, VK8WM, VR512, i64mem, |
| 132896 | /* VPSHRDVQZmbkz */ |
| 132897 | VR512, VR512, VK8WM, VR512, i64mem, |
| 132898 | /* VPSHRDVQZmk */ |
| 132899 | VR512, VR512, VK8WM, VR512, i512mem, |
| 132900 | /* VPSHRDVQZmkz */ |
| 132901 | VR512, VR512, VK8WM, VR512, i512mem, |
| 132902 | /* VPSHRDVQZr */ |
| 132903 | VR512, VR512, VR512, VR512, |
| 132904 | /* VPSHRDVQZrk */ |
| 132905 | VR512, VR512, VK8WM, VR512, VR512, |
| 132906 | /* VPSHRDVQZrkz */ |
| 132907 | VR512, VR512, VK8WM, VR512, VR512, |
| 132908 | /* VPSHRDVWZ128m */ |
| 132909 | VR128X, VR128X, VR128X, i128mem, |
| 132910 | /* VPSHRDVWZ128mk */ |
| 132911 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 132912 | /* VPSHRDVWZ128mkz */ |
| 132913 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 132914 | /* VPSHRDVWZ128r */ |
| 132915 | VR128X, VR128X, VR128X, VR128X, |
| 132916 | /* VPSHRDVWZ128rk */ |
| 132917 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 132918 | /* VPSHRDVWZ128rkz */ |
| 132919 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 132920 | /* VPSHRDVWZ256m */ |
| 132921 | VR256X, VR256X, VR256X, i256mem, |
| 132922 | /* VPSHRDVWZ256mk */ |
| 132923 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 132924 | /* VPSHRDVWZ256mkz */ |
| 132925 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 132926 | /* VPSHRDVWZ256r */ |
| 132927 | VR256X, VR256X, VR256X, VR256X, |
| 132928 | /* VPSHRDVWZ256rk */ |
| 132929 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 132930 | /* VPSHRDVWZ256rkz */ |
| 132931 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 132932 | /* VPSHRDVWZm */ |
| 132933 | VR512, VR512, VR512, i512mem, |
| 132934 | /* VPSHRDVWZmk */ |
| 132935 | VR512, VR512, VK32WM, VR512, i512mem, |
| 132936 | /* VPSHRDVWZmkz */ |
| 132937 | VR512, VR512, VK32WM, VR512, i512mem, |
| 132938 | /* VPSHRDVWZr */ |
| 132939 | VR512, VR512, VR512, VR512, |
| 132940 | /* VPSHRDVWZrk */ |
| 132941 | VR512, VR512, VK32WM, VR512, VR512, |
| 132942 | /* VPSHRDVWZrkz */ |
| 132943 | VR512, VR512, VK32WM, VR512, VR512, |
| 132944 | /* VPSHRDWZ128rmi */ |
| 132945 | VR128X, VR128X, i128mem, u8imm, |
| 132946 | /* VPSHRDWZ128rmik */ |
| 132947 | VR128X, VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 132948 | /* VPSHRDWZ128rmikz */ |
| 132949 | VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 132950 | /* VPSHRDWZ128rri */ |
| 132951 | VR128X, VR128X, VR128X, u8imm, |
| 132952 | /* VPSHRDWZ128rrik */ |
| 132953 | VR128X, VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 132954 | /* VPSHRDWZ128rrikz */ |
| 132955 | VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 132956 | /* VPSHRDWZ256rmi */ |
| 132957 | VR256X, VR256X, i256mem, u8imm, |
| 132958 | /* VPSHRDWZ256rmik */ |
| 132959 | VR256X, VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 132960 | /* VPSHRDWZ256rmikz */ |
| 132961 | VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 132962 | /* VPSHRDWZ256rri */ |
| 132963 | VR256X, VR256X, VR256X, u8imm, |
| 132964 | /* VPSHRDWZ256rrik */ |
| 132965 | VR256X, VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 132966 | /* VPSHRDWZ256rrikz */ |
| 132967 | VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 132968 | /* VPSHRDWZrmi */ |
| 132969 | VR512, VR512, i512mem, u8imm, |
| 132970 | /* VPSHRDWZrmik */ |
| 132971 | VR512, VR512, VK32WM, VR512, i512mem, u8imm, |
| 132972 | /* VPSHRDWZrmikz */ |
| 132973 | VR512, VK32WM, VR512, i512mem, u8imm, |
| 132974 | /* VPSHRDWZrri */ |
| 132975 | VR512, VR512, VR512, u8imm, |
| 132976 | /* VPSHRDWZrrik */ |
| 132977 | VR512, VR512, VK32WM, VR512, VR512, u8imm, |
| 132978 | /* VPSHRDWZrrikz */ |
| 132979 | VR512, VK32WM, VR512, VR512, u8imm, |
| 132980 | /* VPSHUFBITQMBZ128rm */ |
| 132981 | VK16, VR128X, i128mem, |
| 132982 | /* VPSHUFBITQMBZ128rmk */ |
| 132983 | VK16, VK16WM, VR128X, i128mem, |
| 132984 | /* VPSHUFBITQMBZ128rr */ |
| 132985 | VK16, VR128X, VR128X, |
| 132986 | /* VPSHUFBITQMBZ128rrk */ |
| 132987 | VK16, VK16WM, VR128X, VR128X, |
| 132988 | /* VPSHUFBITQMBZ256rm */ |
| 132989 | VK32, VR256X, i256mem, |
| 132990 | /* VPSHUFBITQMBZ256rmk */ |
| 132991 | VK32, VK32WM, VR256X, i256mem, |
| 132992 | /* VPSHUFBITQMBZ256rr */ |
| 132993 | VK32, VR256X, VR256X, |
| 132994 | /* VPSHUFBITQMBZ256rrk */ |
| 132995 | VK32, VK32WM, VR256X, VR256X, |
| 132996 | /* VPSHUFBITQMBZrm */ |
| 132997 | VK64, VR512, i512mem, |
| 132998 | /* VPSHUFBITQMBZrmk */ |
| 132999 | VK64, VK64WM, VR512, i512mem, |
| 133000 | /* VPSHUFBITQMBZrr */ |
| 133001 | VK64, VR512, VR512, |
| 133002 | /* VPSHUFBITQMBZrrk */ |
| 133003 | VK64, VK64WM, VR512, VR512, |
| 133004 | /* VPSHUFBYrm */ |
| 133005 | VR256, VR256, i256mem, |
| 133006 | /* VPSHUFBYrr */ |
| 133007 | VR256, VR256, VR256, |
| 133008 | /* VPSHUFBZ128rm */ |
| 133009 | VR128X, VR128X, i128mem, |
| 133010 | /* VPSHUFBZ128rmk */ |
| 133011 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 133012 | /* VPSHUFBZ128rmkz */ |
| 133013 | VR128X, VK16WM, VR128X, i128mem, |
| 133014 | /* VPSHUFBZ128rr */ |
| 133015 | VR128X, VR128X, VR128X, |
| 133016 | /* VPSHUFBZ128rrk */ |
| 133017 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 133018 | /* VPSHUFBZ128rrkz */ |
| 133019 | VR128X, VK16WM, VR128X, VR128X, |
| 133020 | /* VPSHUFBZ256rm */ |
| 133021 | VR256X, VR256X, i256mem, |
| 133022 | /* VPSHUFBZ256rmk */ |
| 133023 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 133024 | /* VPSHUFBZ256rmkz */ |
| 133025 | VR256X, VK32WM, VR256X, i256mem, |
| 133026 | /* VPSHUFBZ256rr */ |
| 133027 | VR256X, VR256X, VR256X, |
| 133028 | /* VPSHUFBZ256rrk */ |
| 133029 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 133030 | /* VPSHUFBZ256rrkz */ |
| 133031 | VR256X, VK32WM, VR256X, VR256X, |
| 133032 | /* VPSHUFBZrm */ |
| 133033 | VR512, VR512, i512mem, |
| 133034 | /* VPSHUFBZrmk */ |
| 133035 | VR512, VR512, VK64WM, VR512, i512mem, |
| 133036 | /* VPSHUFBZrmkz */ |
| 133037 | VR512, VK64WM, VR512, i512mem, |
| 133038 | /* VPSHUFBZrr */ |
| 133039 | VR512, VR512, VR512, |
| 133040 | /* VPSHUFBZrrk */ |
| 133041 | VR512, VR512, VK64WM, VR512, VR512, |
| 133042 | /* VPSHUFBZrrkz */ |
| 133043 | VR512, VK64WM, VR512, VR512, |
| 133044 | /* VPSHUFBrm */ |
| 133045 | VR128, VR128, i128mem, |
| 133046 | /* VPSHUFBrr */ |
| 133047 | VR128, VR128, VR128, |
| 133048 | /* VPSHUFDYmi */ |
| 133049 | VR256, i256mem, u8imm, |
| 133050 | /* VPSHUFDYri */ |
| 133051 | VR256, VR256, u8imm, |
| 133052 | /* VPSHUFDZ128mbi */ |
| 133053 | VR128X, i32mem, u8imm, |
| 133054 | /* VPSHUFDZ128mbik */ |
| 133055 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 133056 | /* VPSHUFDZ128mbikz */ |
| 133057 | VR128X, VK4WM, i32mem, u8imm, |
| 133058 | /* VPSHUFDZ128mi */ |
| 133059 | VR128X, i128mem, u8imm, |
| 133060 | /* VPSHUFDZ128mik */ |
| 133061 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 133062 | /* VPSHUFDZ128mikz */ |
| 133063 | VR128X, VK4WM, i128mem, u8imm, |
| 133064 | /* VPSHUFDZ128ri */ |
| 133065 | VR128X, VR128X, u8imm, |
| 133066 | /* VPSHUFDZ128rik */ |
| 133067 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 133068 | /* VPSHUFDZ128rikz */ |
| 133069 | VR128X, VK4WM, VR128X, u8imm, |
| 133070 | /* VPSHUFDZ256mbi */ |
| 133071 | VR256X, i32mem, u8imm, |
| 133072 | /* VPSHUFDZ256mbik */ |
| 133073 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 133074 | /* VPSHUFDZ256mbikz */ |
| 133075 | VR256X, VK8WM, i32mem, u8imm, |
| 133076 | /* VPSHUFDZ256mi */ |
| 133077 | VR256X, i256mem, u8imm, |
| 133078 | /* VPSHUFDZ256mik */ |
| 133079 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 133080 | /* VPSHUFDZ256mikz */ |
| 133081 | VR256X, VK8WM, i256mem, u8imm, |
| 133082 | /* VPSHUFDZ256ri */ |
| 133083 | VR256X, VR256X, u8imm, |
| 133084 | /* VPSHUFDZ256rik */ |
| 133085 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 133086 | /* VPSHUFDZ256rikz */ |
| 133087 | VR256X, VK8WM, VR256X, u8imm, |
| 133088 | /* VPSHUFDZmbi */ |
| 133089 | VR512, i32mem, u8imm, |
| 133090 | /* VPSHUFDZmbik */ |
| 133091 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 133092 | /* VPSHUFDZmbikz */ |
| 133093 | VR512, VK16WM, i32mem, u8imm, |
| 133094 | /* VPSHUFDZmi */ |
| 133095 | VR512, i512mem, u8imm, |
| 133096 | /* VPSHUFDZmik */ |
| 133097 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 133098 | /* VPSHUFDZmikz */ |
| 133099 | VR512, VK16WM, i512mem, u8imm, |
| 133100 | /* VPSHUFDZri */ |
| 133101 | VR512, VR512, u8imm, |
| 133102 | /* VPSHUFDZrik */ |
| 133103 | VR512, VR512, VK16WM, VR512, u8imm, |
| 133104 | /* VPSHUFDZrikz */ |
| 133105 | VR512, VK16WM, VR512, u8imm, |
| 133106 | /* VPSHUFDmi */ |
| 133107 | VR128, i128mem, u8imm, |
| 133108 | /* VPSHUFDri */ |
| 133109 | VR128, VR128, u8imm, |
| 133110 | /* VPSHUFHWYmi */ |
| 133111 | VR256, i256mem, u8imm, |
| 133112 | /* VPSHUFHWYri */ |
| 133113 | VR256, VR256, u8imm, |
| 133114 | /* VPSHUFHWZ128mi */ |
| 133115 | VR128X, i128mem, u8imm, |
| 133116 | /* VPSHUFHWZ128mik */ |
| 133117 | VR128X, VR128X, VK8WM, i128mem, u8imm, |
| 133118 | /* VPSHUFHWZ128mikz */ |
| 133119 | VR128X, VK8WM, i128mem, u8imm, |
| 133120 | /* VPSHUFHWZ128ri */ |
| 133121 | VR128X, VR128X, u8imm, |
| 133122 | /* VPSHUFHWZ128rik */ |
| 133123 | VR128X, VR128X, VK8WM, VR128X, u8imm, |
| 133124 | /* VPSHUFHWZ128rikz */ |
| 133125 | VR128X, VK8WM, VR128X, u8imm, |
| 133126 | /* VPSHUFHWZ256mi */ |
| 133127 | VR256X, i256mem, u8imm, |
| 133128 | /* VPSHUFHWZ256mik */ |
| 133129 | VR256X, VR256X, VK16WM, i256mem, u8imm, |
| 133130 | /* VPSHUFHWZ256mikz */ |
| 133131 | VR256X, VK16WM, i256mem, u8imm, |
| 133132 | /* VPSHUFHWZ256ri */ |
| 133133 | VR256X, VR256X, u8imm, |
| 133134 | /* VPSHUFHWZ256rik */ |
| 133135 | VR256X, VR256X, VK16WM, VR256X, u8imm, |
| 133136 | /* VPSHUFHWZ256rikz */ |
| 133137 | VR256X, VK16WM, VR256X, u8imm, |
| 133138 | /* VPSHUFHWZmi */ |
| 133139 | VR512, i512mem, u8imm, |
| 133140 | /* VPSHUFHWZmik */ |
| 133141 | VR512, VR512, VK32WM, i512mem, u8imm, |
| 133142 | /* VPSHUFHWZmikz */ |
| 133143 | VR512, VK32WM, i512mem, u8imm, |
| 133144 | /* VPSHUFHWZri */ |
| 133145 | VR512, VR512, u8imm, |
| 133146 | /* VPSHUFHWZrik */ |
| 133147 | VR512, VR512, VK32WM, VR512, u8imm, |
| 133148 | /* VPSHUFHWZrikz */ |
| 133149 | VR512, VK32WM, VR512, u8imm, |
| 133150 | /* VPSHUFHWmi */ |
| 133151 | VR128, i128mem, u8imm, |
| 133152 | /* VPSHUFHWri */ |
| 133153 | VR128, VR128, u8imm, |
| 133154 | /* VPSHUFLWYmi */ |
| 133155 | VR256, i256mem, u8imm, |
| 133156 | /* VPSHUFLWYri */ |
| 133157 | VR256, VR256, u8imm, |
| 133158 | /* VPSHUFLWZ128mi */ |
| 133159 | VR128X, i128mem, u8imm, |
| 133160 | /* VPSHUFLWZ128mik */ |
| 133161 | VR128X, VR128X, VK8WM, i128mem, u8imm, |
| 133162 | /* VPSHUFLWZ128mikz */ |
| 133163 | VR128X, VK8WM, i128mem, u8imm, |
| 133164 | /* VPSHUFLWZ128ri */ |
| 133165 | VR128X, VR128X, u8imm, |
| 133166 | /* VPSHUFLWZ128rik */ |
| 133167 | VR128X, VR128X, VK8WM, VR128X, u8imm, |
| 133168 | /* VPSHUFLWZ128rikz */ |
| 133169 | VR128X, VK8WM, VR128X, u8imm, |
| 133170 | /* VPSHUFLWZ256mi */ |
| 133171 | VR256X, i256mem, u8imm, |
| 133172 | /* VPSHUFLWZ256mik */ |
| 133173 | VR256X, VR256X, VK16WM, i256mem, u8imm, |
| 133174 | /* VPSHUFLWZ256mikz */ |
| 133175 | VR256X, VK16WM, i256mem, u8imm, |
| 133176 | /* VPSHUFLWZ256ri */ |
| 133177 | VR256X, VR256X, u8imm, |
| 133178 | /* VPSHUFLWZ256rik */ |
| 133179 | VR256X, VR256X, VK16WM, VR256X, u8imm, |
| 133180 | /* VPSHUFLWZ256rikz */ |
| 133181 | VR256X, VK16WM, VR256X, u8imm, |
| 133182 | /* VPSHUFLWZmi */ |
| 133183 | VR512, i512mem, u8imm, |
| 133184 | /* VPSHUFLWZmik */ |
| 133185 | VR512, VR512, VK32WM, i512mem, u8imm, |
| 133186 | /* VPSHUFLWZmikz */ |
| 133187 | VR512, VK32WM, i512mem, u8imm, |
| 133188 | /* VPSHUFLWZri */ |
| 133189 | VR512, VR512, u8imm, |
| 133190 | /* VPSHUFLWZrik */ |
| 133191 | VR512, VR512, VK32WM, VR512, u8imm, |
| 133192 | /* VPSHUFLWZrikz */ |
| 133193 | VR512, VK32WM, VR512, u8imm, |
| 133194 | /* VPSHUFLWmi */ |
| 133195 | VR128, i128mem, u8imm, |
| 133196 | /* VPSHUFLWri */ |
| 133197 | VR128, VR128, u8imm, |
| 133198 | /* VPSIGNBYrm */ |
| 133199 | VR256, VR256, i256mem, |
| 133200 | /* VPSIGNBYrr */ |
| 133201 | VR256, VR256, VR256, |
| 133202 | /* VPSIGNBrm */ |
| 133203 | VR128, VR128, i128mem, |
| 133204 | /* VPSIGNBrr */ |
| 133205 | VR128, VR128, VR128, |
| 133206 | /* VPSIGNDYrm */ |
| 133207 | VR256, VR256, i256mem, |
| 133208 | /* VPSIGNDYrr */ |
| 133209 | VR256, VR256, VR256, |
| 133210 | /* VPSIGNDrm */ |
| 133211 | VR128, VR128, i128mem, |
| 133212 | /* VPSIGNDrr */ |
| 133213 | VR128, VR128, VR128, |
| 133214 | /* VPSIGNWYrm */ |
| 133215 | VR256, VR256, i256mem, |
| 133216 | /* VPSIGNWYrr */ |
| 133217 | VR256, VR256, VR256, |
| 133218 | /* VPSIGNWrm */ |
| 133219 | VR128, VR128, i128mem, |
| 133220 | /* VPSIGNWrr */ |
| 133221 | VR128, VR128, VR128, |
| 133222 | /* VPSLLDQYri */ |
| 133223 | VR256, VR256, u8imm, |
| 133224 | /* VPSLLDQZ128mi */ |
| 133225 | VR128X, i128mem, u8imm, |
| 133226 | /* VPSLLDQZ128ri */ |
| 133227 | VR128X, VR128X, u8imm, |
| 133228 | /* VPSLLDQZ256mi */ |
| 133229 | VR256X, i256mem, u8imm, |
| 133230 | /* VPSLLDQZ256ri */ |
| 133231 | VR256X, VR256X, u8imm, |
| 133232 | /* VPSLLDQZmi */ |
| 133233 | VR512, i512mem, u8imm, |
| 133234 | /* VPSLLDQZri */ |
| 133235 | VR512, VR512, u8imm, |
| 133236 | /* VPSLLDQri */ |
| 133237 | VR128, VR128, u8imm, |
| 133238 | /* VPSLLDYri */ |
| 133239 | VR256, VR256, u8imm, |
| 133240 | /* VPSLLDYrm */ |
| 133241 | VR256, VR256, i128mem, |
| 133242 | /* VPSLLDYrr */ |
| 133243 | VR256, VR256, VR128, |
| 133244 | /* VPSLLDZ128mbi */ |
| 133245 | VR128X, i32mem, u8imm, |
| 133246 | /* VPSLLDZ128mbik */ |
| 133247 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 133248 | /* VPSLLDZ128mbikz */ |
| 133249 | VR128X, VK4WM, i32mem, u8imm, |
| 133250 | /* VPSLLDZ128mi */ |
| 133251 | VR128X, i128mem, u8imm, |
| 133252 | /* VPSLLDZ128mik */ |
| 133253 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 133254 | /* VPSLLDZ128mikz */ |
| 133255 | VR128X, VK4WM, i128mem, u8imm, |
| 133256 | /* VPSLLDZ128ri */ |
| 133257 | VR128X, VR128X, u8imm, |
| 133258 | /* VPSLLDZ128rik */ |
| 133259 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 133260 | /* VPSLLDZ128rikz */ |
| 133261 | VR128X, VK4WM, VR128X, u8imm, |
| 133262 | /* VPSLLDZ128rm */ |
| 133263 | VR128X, VR128X, i128mem, |
| 133264 | /* VPSLLDZ128rmk */ |
| 133265 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 133266 | /* VPSLLDZ128rmkz */ |
| 133267 | VR128X, VK4WM, VR128X, i128mem, |
| 133268 | /* VPSLLDZ128rr */ |
| 133269 | VR128X, VR128X, VR128X, |
| 133270 | /* VPSLLDZ128rrk */ |
| 133271 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 133272 | /* VPSLLDZ128rrkz */ |
| 133273 | VR128X, VK4WM, VR128X, VR128X, |
| 133274 | /* VPSLLDZ256mbi */ |
| 133275 | VR256X, i32mem, u8imm, |
| 133276 | /* VPSLLDZ256mbik */ |
| 133277 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 133278 | /* VPSLLDZ256mbikz */ |
| 133279 | VR256X, VK8WM, i32mem, u8imm, |
| 133280 | /* VPSLLDZ256mi */ |
| 133281 | VR256X, i256mem, u8imm, |
| 133282 | /* VPSLLDZ256mik */ |
| 133283 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 133284 | /* VPSLLDZ256mikz */ |
| 133285 | VR256X, VK8WM, i256mem, u8imm, |
| 133286 | /* VPSLLDZ256ri */ |
| 133287 | VR256X, VR256X, u8imm, |
| 133288 | /* VPSLLDZ256rik */ |
| 133289 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 133290 | /* VPSLLDZ256rikz */ |
| 133291 | VR256X, VK8WM, VR256X, u8imm, |
| 133292 | /* VPSLLDZ256rm */ |
| 133293 | VR256X, VR256X, i128mem, |
| 133294 | /* VPSLLDZ256rmk */ |
| 133295 | VR256X, VR256X, VK8WM, VR256X, i128mem, |
| 133296 | /* VPSLLDZ256rmkz */ |
| 133297 | VR256X, VK8WM, VR256X, i128mem, |
| 133298 | /* VPSLLDZ256rr */ |
| 133299 | VR256X, VR256X, VR128X, |
| 133300 | /* VPSLLDZ256rrk */ |
| 133301 | VR256X, VR256X, VK8WM, VR256X, VR128X, |
| 133302 | /* VPSLLDZ256rrkz */ |
| 133303 | VR256X, VK8WM, VR256X, VR128X, |
| 133304 | /* VPSLLDZmbi */ |
| 133305 | VR512, i32mem, u8imm, |
| 133306 | /* VPSLLDZmbik */ |
| 133307 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 133308 | /* VPSLLDZmbikz */ |
| 133309 | VR512, VK16WM, i32mem, u8imm, |
| 133310 | /* VPSLLDZmi */ |
| 133311 | VR512, i512mem, u8imm, |
| 133312 | /* VPSLLDZmik */ |
| 133313 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 133314 | /* VPSLLDZmikz */ |
| 133315 | VR512, VK16WM, i512mem, u8imm, |
| 133316 | /* VPSLLDZri */ |
| 133317 | VR512, VR512, u8imm, |
| 133318 | /* VPSLLDZrik */ |
| 133319 | VR512, VR512, VK16WM, VR512, u8imm, |
| 133320 | /* VPSLLDZrikz */ |
| 133321 | VR512, VK16WM, VR512, u8imm, |
| 133322 | /* VPSLLDZrm */ |
| 133323 | VR512, VR512, i128mem, |
| 133324 | /* VPSLLDZrmk */ |
| 133325 | VR512, VR512, VK16WM, VR512, i128mem, |
| 133326 | /* VPSLLDZrmkz */ |
| 133327 | VR512, VK16WM, VR512, i128mem, |
| 133328 | /* VPSLLDZrr */ |
| 133329 | VR512, VR512, VR128X, |
| 133330 | /* VPSLLDZrrk */ |
| 133331 | VR512, VR512, VK16WM, VR512, VR128X, |
| 133332 | /* VPSLLDZrrkz */ |
| 133333 | VR512, VK16WM, VR512, VR128X, |
| 133334 | /* VPSLLDri */ |
| 133335 | VR128, VR128, u8imm, |
| 133336 | /* VPSLLDrm */ |
| 133337 | VR128, VR128, i128mem, |
| 133338 | /* VPSLLDrr */ |
| 133339 | VR128, VR128, VR128, |
| 133340 | /* VPSLLQYri */ |
| 133341 | VR256, VR256, u8imm, |
| 133342 | /* VPSLLQYrm */ |
| 133343 | VR256, VR256, i128mem, |
| 133344 | /* VPSLLQYrr */ |
| 133345 | VR256, VR256, VR128, |
| 133346 | /* VPSLLQZ128mbi */ |
| 133347 | VR128X, i64mem, u8imm, |
| 133348 | /* VPSLLQZ128mbik */ |
| 133349 | VR128X, VR128X, VK2WM, i64mem, u8imm, |
| 133350 | /* VPSLLQZ128mbikz */ |
| 133351 | VR128X, VK2WM, i64mem, u8imm, |
| 133352 | /* VPSLLQZ128mi */ |
| 133353 | VR128X, i128mem, u8imm, |
| 133354 | /* VPSLLQZ128mik */ |
| 133355 | VR128X, VR128X, VK2WM, i128mem, u8imm, |
| 133356 | /* VPSLLQZ128mikz */ |
| 133357 | VR128X, VK2WM, i128mem, u8imm, |
| 133358 | /* VPSLLQZ128ri */ |
| 133359 | VR128X, VR128X, u8imm, |
| 133360 | /* VPSLLQZ128rik */ |
| 133361 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 133362 | /* VPSLLQZ128rikz */ |
| 133363 | VR128X, VK2WM, VR128X, u8imm, |
| 133364 | /* VPSLLQZ128rm */ |
| 133365 | VR128X, VR128X, i128mem, |
| 133366 | /* VPSLLQZ128rmk */ |
| 133367 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 133368 | /* VPSLLQZ128rmkz */ |
| 133369 | VR128X, VK2WM, VR128X, i128mem, |
| 133370 | /* VPSLLQZ128rr */ |
| 133371 | VR128X, VR128X, VR128X, |
| 133372 | /* VPSLLQZ128rrk */ |
| 133373 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133374 | /* VPSLLQZ128rrkz */ |
| 133375 | VR128X, VK2WM, VR128X, VR128X, |
| 133376 | /* VPSLLQZ256mbi */ |
| 133377 | VR256X, i64mem, u8imm, |
| 133378 | /* VPSLLQZ256mbik */ |
| 133379 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 133380 | /* VPSLLQZ256mbikz */ |
| 133381 | VR256X, VK4WM, i64mem, u8imm, |
| 133382 | /* VPSLLQZ256mi */ |
| 133383 | VR256X, i256mem, u8imm, |
| 133384 | /* VPSLLQZ256mik */ |
| 133385 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 133386 | /* VPSLLQZ256mikz */ |
| 133387 | VR256X, VK4WM, i256mem, u8imm, |
| 133388 | /* VPSLLQZ256ri */ |
| 133389 | VR256X, VR256X, u8imm, |
| 133390 | /* VPSLLQZ256rik */ |
| 133391 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 133392 | /* VPSLLQZ256rikz */ |
| 133393 | VR256X, VK4WM, VR256X, u8imm, |
| 133394 | /* VPSLLQZ256rm */ |
| 133395 | VR256X, VR256X, i128mem, |
| 133396 | /* VPSLLQZ256rmk */ |
| 133397 | VR256X, VR256X, VK4WM, VR256X, i128mem, |
| 133398 | /* VPSLLQZ256rmkz */ |
| 133399 | VR256X, VK4WM, VR256X, i128mem, |
| 133400 | /* VPSLLQZ256rr */ |
| 133401 | VR256X, VR256X, VR128X, |
| 133402 | /* VPSLLQZ256rrk */ |
| 133403 | VR256X, VR256X, VK4WM, VR256X, VR128X, |
| 133404 | /* VPSLLQZ256rrkz */ |
| 133405 | VR256X, VK4WM, VR256X, VR128X, |
| 133406 | /* VPSLLQZmbi */ |
| 133407 | VR512, i64mem, u8imm, |
| 133408 | /* VPSLLQZmbik */ |
| 133409 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 133410 | /* VPSLLQZmbikz */ |
| 133411 | VR512, VK8WM, i64mem, u8imm, |
| 133412 | /* VPSLLQZmi */ |
| 133413 | VR512, i512mem, u8imm, |
| 133414 | /* VPSLLQZmik */ |
| 133415 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 133416 | /* VPSLLQZmikz */ |
| 133417 | VR512, VK8WM, i512mem, u8imm, |
| 133418 | /* VPSLLQZri */ |
| 133419 | VR512, VR512, u8imm, |
| 133420 | /* VPSLLQZrik */ |
| 133421 | VR512, VR512, VK8WM, VR512, u8imm, |
| 133422 | /* VPSLLQZrikz */ |
| 133423 | VR512, VK8WM, VR512, u8imm, |
| 133424 | /* VPSLLQZrm */ |
| 133425 | VR512, VR512, i128mem, |
| 133426 | /* VPSLLQZrmk */ |
| 133427 | VR512, VR512, VK8WM, VR512, i128mem, |
| 133428 | /* VPSLLQZrmkz */ |
| 133429 | VR512, VK8WM, VR512, i128mem, |
| 133430 | /* VPSLLQZrr */ |
| 133431 | VR512, VR512, VR128X, |
| 133432 | /* VPSLLQZrrk */ |
| 133433 | VR512, VR512, VK8WM, VR512, VR128X, |
| 133434 | /* VPSLLQZrrkz */ |
| 133435 | VR512, VK8WM, VR512, VR128X, |
| 133436 | /* VPSLLQri */ |
| 133437 | VR128, VR128, u8imm, |
| 133438 | /* VPSLLQrm */ |
| 133439 | VR128, VR128, i128mem, |
| 133440 | /* VPSLLQrr */ |
| 133441 | VR128, VR128, VR128, |
| 133442 | /* VPSLLVDYrm */ |
| 133443 | VR256, VR256, i256mem, |
| 133444 | /* VPSLLVDYrr */ |
| 133445 | VR256, VR256, VR256, |
| 133446 | /* VPSLLVDZ128rm */ |
| 133447 | VR128X, VR128X, i128mem, |
| 133448 | /* VPSLLVDZ128rmb */ |
| 133449 | VR128X, VR128X, i32mem, |
| 133450 | /* VPSLLVDZ128rmbk */ |
| 133451 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 133452 | /* VPSLLVDZ128rmbkz */ |
| 133453 | VR128X, VK4WM, VR128X, i32mem, |
| 133454 | /* VPSLLVDZ128rmk */ |
| 133455 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 133456 | /* VPSLLVDZ128rmkz */ |
| 133457 | VR128X, VK4WM, VR128X, i128mem, |
| 133458 | /* VPSLLVDZ128rr */ |
| 133459 | VR128X, VR128X, VR128X, |
| 133460 | /* VPSLLVDZ128rrk */ |
| 133461 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 133462 | /* VPSLLVDZ128rrkz */ |
| 133463 | VR128X, VK4WM, VR128X, VR128X, |
| 133464 | /* VPSLLVDZ256rm */ |
| 133465 | VR256X, VR256X, i256mem, |
| 133466 | /* VPSLLVDZ256rmb */ |
| 133467 | VR256X, VR256X, i32mem, |
| 133468 | /* VPSLLVDZ256rmbk */ |
| 133469 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 133470 | /* VPSLLVDZ256rmbkz */ |
| 133471 | VR256X, VK8WM, VR256X, i32mem, |
| 133472 | /* VPSLLVDZ256rmk */ |
| 133473 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 133474 | /* VPSLLVDZ256rmkz */ |
| 133475 | VR256X, VK8WM, VR256X, i256mem, |
| 133476 | /* VPSLLVDZ256rr */ |
| 133477 | VR256X, VR256X, VR256X, |
| 133478 | /* VPSLLVDZ256rrk */ |
| 133479 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 133480 | /* VPSLLVDZ256rrkz */ |
| 133481 | VR256X, VK8WM, VR256X, VR256X, |
| 133482 | /* VPSLLVDZrm */ |
| 133483 | VR512, VR512, i512mem, |
| 133484 | /* VPSLLVDZrmb */ |
| 133485 | VR512, VR512, i32mem, |
| 133486 | /* VPSLLVDZrmbk */ |
| 133487 | VR512, VR512, VK16WM, VR512, i32mem, |
| 133488 | /* VPSLLVDZrmbkz */ |
| 133489 | VR512, VK16WM, VR512, i32mem, |
| 133490 | /* VPSLLVDZrmk */ |
| 133491 | VR512, VR512, VK16WM, VR512, i512mem, |
| 133492 | /* VPSLLVDZrmkz */ |
| 133493 | VR512, VK16WM, VR512, i512mem, |
| 133494 | /* VPSLLVDZrr */ |
| 133495 | VR512, VR512, VR512, |
| 133496 | /* VPSLLVDZrrk */ |
| 133497 | VR512, VR512, VK16WM, VR512, VR512, |
| 133498 | /* VPSLLVDZrrkz */ |
| 133499 | VR512, VK16WM, VR512, VR512, |
| 133500 | /* VPSLLVDrm */ |
| 133501 | VR128, VR128, i128mem, |
| 133502 | /* VPSLLVDrr */ |
| 133503 | VR128, VR128, VR128, |
| 133504 | /* VPSLLVQYrm */ |
| 133505 | VR256, VR256, i256mem, |
| 133506 | /* VPSLLVQYrr */ |
| 133507 | VR256, VR256, VR256, |
| 133508 | /* VPSLLVQZ128rm */ |
| 133509 | VR128X, VR128X, i128mem, |
| 133510 | /* VPSLLVQZ128rmb */ |
| 133511 | VR128X, VR128X, i64mem, |
| 133512 | /* VPSLLVQZ128rmbk */ |
| 133513 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 133514 | /* VPSLLVQZ128rmbkz */ |
| 133515 | VR128X, VK2WM, VR128X, i64mem, |
| 133516 | /* VPSLLVQZ128rmk */ |
| 133517 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 133518 | /* VPSLLVQZ128rmkz */ |
| 133519 | VR128X, VK2WM, VR128X, i128mem, |
| 133520 | /* VPSLLVQZ128rr */ |
| 133521 | VR128X, VR128X, VR128X, |
| 133522 | /* VPSLLVQZ128rrk */ |
| 133523 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133524 | /* VPSLLVQZ128rrkz */ |
| 133525 | VR128X, VK2WM, VR128X, VR128X, |
| 133526 | /* VPSLLVQZ256rm */ |
| 133527 | VR256X, VR256X, i256mem, |
| 133528 | /* VPSLLVQZ256rmb */ |
| 133529 | VR256X, VR256X, i64mem, |
| 133530 | /* VPSLLVQZ256rmbk */ |
| 133531 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 133532 | /* VPSLLVQZ256rmbkz */ |
| 133533 | VR256X, VK4WM, VR256X, i64mem, |
| 133534 | /* VPSLLVQZ256rmk */ |
| 133535 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 133536 | /* VPSLLVQZ256rmkz */ |
| 133537 | VR256X, VK4WM, VR256X, i256mem, |
| 133538 | /* VPSLLVQZ256rr */ |
| 133539 | VR256X, VR256X, VR256X, |
| 133540 | /* VPSLLVQZ256rrk */ |
| 133541 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 133542 | /* VPSLLVQZ256rrkz */ |
| 133543 | VR256X, VK4WM, VR256X, VR256X, |
| 133544 | /* VPSLLVQZrm */ |
| 133545 | VR512, VR512, i512mem, |
| 133546 | /* VPSLLVQZrmb */ |
| 133547 | VR512, VR512, i64mem, |
| 133548 | /* VPSLLVQZrmbk */ |
| 133549 | VR512, VR512, VK8WM, VR512, i64mem, |
| 133550 | /* VPSLLVQZrmbkz */ |
| 133551 | VR512, VK8WM, VR512, i64mem, |
| 133552 | /* VPSLLVQZrmk */ |
| 133553 | VR512, VR512, VK8WM, VR512, i512mem, |
| 133554 | /* VPSLLVQZrmkz */ |
| 133555 | VR512, VK8WM, VR512, i512mem, |
| 133556 | /* VPSLLVQZrr */ |
| 133557 | VR512, VR512, VR512, |
| 133558 | /* VPSLLVQZrrk */ |
| 133559 | VR512, VR512, VK8WM, VR512, VR512, |
| 133560 | /* VPSLLVQZrrkz */ |
| 133561 | VR512, VK8WM, VR512, VR512, |
| 133562 | /* VPSLLVQrm */ |
| 133563 | VR128, VR128, i128mem, |
| 133564 | /* VPSLLVQrr */ |
| 133565 | VR128, VR128, VR128, |
| 133566 | /* VPSLLVWZ128rm */ |
| 133567 | VR128X, VR128X, i128mem, |
| 133568 | /* VPSLLVWZ128rmk */ |
| 133569 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 133570 | /* VPSLLVWZ128rmkz */ |
| 133571 | VR128X, VK8WM, VR128X, i128mem, |
| 133572 | /* VPSLLVWZ128rr */ |
| 133573 | VR128X, VR128X, VR128X, |
| 133574 | /* VPSLLVWZ128rrk */ |
| 133575 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 133576 | /* VPSLLVWZ128rrkz */ |
| 133577 | VR128X, VK8WM, VR128X, VR128X, |
| 133578 | /* VPSLLVWZ256rm */ |
| 133579 | VR256X, VR256X, i256mem, |
| 133580 | /* VPSLLVWZ256rmk */ |
| 133581 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 133582 | /* VPSLLVWZ256rmkz */ |
| 133583 | VR256X, VK16WM, VR256X, i256mem, |
| 133584 | /* VPSLLVWZ256rr */ |
| 133585 | VR256X, VR256X, VR256X, |
| 133586 | /* VPSLLVWZ256rrk */ |
| 133587 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 133588 | /* VPSLLVWZ256rrkz */ |
| 133589 | VR256X, VK16WM, VR256X, VR256X, |
| 133590 | /* VPSLLVWZrm */ |
| 133591 | VR512, VR512, i512mem, |
| 133592 | /* VPSLLVWZrmk */ |
| 133593 | VR512, VR512, VK32WM, VR512, i512mem, |
| 133594 | /* VPSLLVWZrmkz */ |
| 133595 | VR512, VK32WM, VR512, i512mem, |
| 133596 | /* VPSLLVWZrr */ |
| 133597 | VR512, VR512, VR512, |
| 133598 | /* VPSLLVWZrrk */ |
| 133599 | VR512, VR512, VK32WM, VR512, VR512, |
| 133600 | /* VPSLLVWZrrkz */ |
| 133601 | VR512, VK32WM, VR512, VR512, |
| 133602 | /* VPSLLWYri */ |
| 133603 | VR256, VR256, u8imm, |
| 133604 | /* VPSLLWYrm */ |
| 133605 | VR256, VR256, i128mem, |
| 133606 | /* VPSLLWYrr */ |
| 133607 | VR256, VR256, VR128, |
| 133608 | /* VPSLLWZ128mi */ |
| 133609 | VR128X, i128mem, u8imm, |
| 133610 | /* VPSLLWZ128mik */ |
| 133611 | VR128X, VR128X, VK8WM, i128mem, u8imm, |
| 133612 | /* VPSLLWZ128mikz */ |
| 133613 | VR128X, VK8WM, i128mem, u8imm, |
| 133614 | /* VPSLLWZ128ri */ |
| 133615 | VR128X, VR128X, u8imm, |
| 133616 | /* VPSLLWZ128rik */ |
| 133617 | VR128X, VR128X, VK8WM, VR128X, u8imm, |
| 133618 | /* VPSLLWZ128rikz */ |
| 133619 | VR128X, VK8WM, VR128X, u8imm, |
| 133620 | /* VPSLLWZ128rm */ |
| 133621 | VR128X, VR128X, i128mem, |
| 133622 | /* VPSLLWZ128rmk */ |
| 133623 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 133624 | /* VPSLLWZ128rmkz */ |
| 133625 | VR128X, VK8WM, VR128X, i128mem, |
| 133626 | /* VPSLLWZ128rr */ |
| 133627 | VR128X, VR128X, VR128X, |
| 133628 | /* VPSLLWZ128rrk */ |
| 133629 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 133630 | /* VPSLLWZ128rrkz */ |
| 133631 | VR128X, VK8WM, VR128X, VR128X, |
| 133632 | /* VPSLLWZ256mi */ |
| 133633 | VR256X, i256mem, u8imm, |
| 133634 | /* VPSLLWZ256mik */ |
| 133635 | VR256X, VR256X, VK16WM, i256mem, u8imm, |
| 133636 | /* VPSLLWZ256mikz */ |
| 133637 | VR256X, VK16WM, i256mem, u8imm, |
| 133638 | /* VPSLLWZ256ri */ |
| 133639 | VR256X, VR256X, u8imm, |
| 133640 | /* VPSLLWZ256rik */ |
| 133641 | VR256X, VR256X, VK16WM, VR256X, u8imm, |
| 133642 | /* VPSLLWZ256rikz */ |
| 133643 | VR256X, VK16WM, VR256X, u8imm, |
| 133644 | /* VPSLLWZ256rm */ |
| 133645 | VR256X, VR256X, i128mem, |
| 133646 | /* VPSLLWZ256rmk */ |
| 133647 | VR256X, VR256X, VK16WM, VR256X, i128mem, |
| 133648 | /* VPSLLWZ256rmkz */ |
| 133649 | VR256X, VK16WM, VR256X, i128mem, |
| 133650 | /* VPSLLWZ256rr */ |
| 133651 | VR256X, VR256X, VR128X, |
| 133652 | /* VPSLLWZ256rrk */ |
| 133653 | VR256X, VR256X, VK16WM, VR256X, VR128X, |
| 133654 | /* VPSLLWZ256rrkz */ |
| 133655 | VR256X, VK16WM, VR256X, VR128X, |
| 133656 | /* VPSLLWZmi */ |
| 133657 | VR512, i512mem, u8imm, |
| 133658 | /* VPSLLWZmik */ |
| 133659 | VR512, VR512, VK32WM, i512mem, u8imm, |
| 133660 | /* VPSLLWZmikz */ |
| 133661 | VR512, VK32WM, i512mem, u8imm, |
| 133662 | /* VPSLLWZri */ |
| 133663 | VR512, VR512, u8imm, |
| 133664 | /* VPSLLWZrik */ |
| 133665 | VR512, VR512, VK32WM, VR512, u8imm, |
| 133666 | /* VPSLLWZrikz */ |
| 133667 | VR512, VK32WM, VR512, u8imm, |
| 133668 | /* VPSLLWZrm */ |
| 133669 | VR512, VR512, i128mem, |
| 133670 | /* VPSLLWZrmk */ |
| 133671 | VR512, VR512, VK32WM, VR512, i128mem, |
| 133672 | /* VPSLLWZrmkz */ |
| 133673 | VR512, VK32WM, VR512, i128mem, |
| 133674 | /* VPSLLWZrr */ |
| 133675 | VR512, VR512, VR128X, |
| 133676 | /* VPSLLWZrrk */ |
| 133677 | VR512, VR512, VK32WM, VR512, VR128X, |
| 133678 | /* VPSLLWZrrkz */ |
| 133679 | VR512, VK32WM, VR512, VR128X, |
| 133680 | /* VPSLLWri */ |
| 133681 | VR128, VR128, u8imm, |
| 133682 | /* VPSLLWrm */ |
| 133683 | VR128, VR128, i128mem, |
| 133684 | /* VPSLLWrr */ |
| 133685 | VR128, VR128, VR128, |
| 133686 | /* VPSRADYri */ |
| 133687 | VR256, VR256, u8imm, |
| 133688 | /* VPSRADYrm */ |
| 133689 | VR256, VR256, i128mem, |
| 133690 | /* VPSRADYrr */ |
| 133691 | VR256, VR256, VR128, |
| 133692 | /* VPSRADZ128mbi */ |
| 133693 | VR128X, i32mem, u8imm, |
| 133694 | /* VPSRADZ128mbik */ |
| 133695 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 133696 | /* VPSRADZ128mbikz */ |
| 133697 | VR128X, VK4WM, i32mem, u8imm, |
| 133698 | /* VPSRADZ128mi */ |
| 133699 | VR128X, i128mem, u8imm, |
| 133700 | /* VPSRADZ128mik */ |
| 133701 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 133702 | /* VPSRADZ128mikz */ |
| 133703 | VR128X, VK4WM, i128mem, u8imm, |
| 133704 | /* VPSRADZ128ri */ |
| 133705 | VR128X, VR128X, u8imm, |
| 133706 | /* VPSRADZ128rik */ |
| 133707 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 133708 | /* VPSRADZ128rikz */ |
| 133709 | VR128X, VK4WM, VR128X, u8imm, |
| 133710 | /* VPSRADZ128rm */ |
| 133711 | VR128X, VR128X, i128mem, |
| 133712 | /* VPSRADZ128rmk */ |
| 133713 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 133714 | /* VPSRADZ128rmkz */ |
| 133715 | VR128X, VK4WM, VR128X, i128mem, |
| 133716 | /* VPSRADZ128rr */ |
| 133717 | VR128X, VR128X, VR128X, |
| 133718 | /* VPSRADZ128rrk */ |
| 133719 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 133720 | /* VPSRADZ128rrkz */ |
| 133721 | VR128X, VK4WM, VR128X, VR128X, |
| 133722 | /* VPSRADZ256mbi */ |
| 133723 | VR256X, i32mem, u8imm, |
| 133724 | /* VPSRADZ256mbik */ |
| 133725 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 133726 | /* VPSRADZ256mbikz */ |
| 133727 | VR256X, VK8WM, i32mem, u8imm, |
| 133728 | /* VPSRADZ256mi */ |
| 133729 | VR256X, i256mem, u8imm, |
| 133730 | /* VPSRADZ256mik */ |
| 133731 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 133732 | /* VPSRADZ256mikz */ |
| 133733 | VR256X, VK8WM, i256mem, u8imm, |
| 133734 | /* VPSRADZ256ri */ |
| 133735 | VR256X, VR256X, u8imm, |
| 133736 | /* VPSRADZ256rik */ |
| 133737 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 133738 | /* VPSRADZ256rikz */ |
| 133739 | VR256X, VK8WM, VR256X, u8imm, |
| 133740 | /* VPSRADZ256rm */ |
| 133741 | VR256X, VR256X, i128mem, |
| 133742 | /* VPSRADZ256rmk */ |
| 133743 | VR256X, VR256X, VK8WM, VR256X, i128mem, |
| 133744 | /* VPSRADZ256rmkz */ |
| 133745 | VR256X, VK8WM, VR256X, i128mem, |
| 133746 | /* VPSRADZ256rr */ |
| 133747 | VR256X, VR256X, VR128X, |
| 133748 | /* VPSRADZ256rrk */ |
| 133749 | VR256X, VR256X, VK8WM, VR256X, VR128X, |
| 133750 | /* VPSRADZ256rrkz */ |
| 133751 | VR256X, VK8WM, VR256X, VR128X, |
| 133752 | /* VPSRADZmbi */ |
| 133753 | VR512, i32mem, u8imm, |
| 133754 | /* VPSRADZmbik */ |
| 133755 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 133756 | /* VPSRADZmbikz */ |
| 133757 | VR512, VK16WM, i32mem, u8imm, |
| 133758 | /* VPSRADZmi */ |
| 133759 | VR512, i512mem, u8imm, |
| 133760 | /* VPSRADZmik */ |
| 133761 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 133762 | /* VPSRADZmikz */ |
| 133763 | VR512, VK16WM, i512mem, u8imm, |
| 133764 | /* VPSRADZri */ |
| 133765 | VR512, VR512, u8imm, |
| 133766 | /* VPSRADZrik */ |
| 133767 | VR512, VR512, VK16WM, VR512, u8imm, |
| 133768 | /* VPSRADZrikz */ |
| 133769 | VR512, VK16WM, VR512, u8imm, |
| 133770 | /* VPSRADZrm */ |
| 133771 | VR512, VR512, i128mem, |
| 133772 | /* VPSRADZrmk */ |
| 133773 | VR512, VR512, VK16WM, VR512, i128mem, |
| 133774 | /* VPSRADZrmkz */ |
| 133775 | VR512, VK16WM, VR512, i128mem, |
| 133776 | /* VPSRADZrr */ |
| 133777 | VR512, VR512, VR128X, |
| 133778 | /* VPSRADZrrk */ |
| 133779 | VR512, VR512, VK16WM, VR512, VR128X, |
| 133780 | /* VPSRADZrrkz */ |
| 133781 | VR512, VK16WM, VR512, VR128X, |
| 133782 | /* VPSRADri */ |
| 133783 | VR128, VR128, u8imm, |
| 133784 | /* VPSRADrm */ |
| 133785 | VR128, VR128, i128mem, |
| 133786 | /* VPSRADrr */ |
| 133787 | VR128, VR128, VR128, |
| 133788 | /* VPSRAQZ128mbi */ |
| 133789 | VR128X, i64mem, u8imm, |
| 133790 | /* VPSRAQZ128mbik */ |
| 133791 | VR128X, VR128X, VK2WM, i64mem, u8imm, |
| 133792 | /* VPSRAQZ128mbikz */ |
| 133793 | VR128X, VK2WM, i64mem, u8imm, |
| 133794 | /* VPSRAQZ128mi */ |
| 133795 | VR128X, i128mem, u8imm, |
| 133796 | /* VPSRAQZ128mik */ |
| 133797 | VR128X, VR128X, VK2WM, i128mem, u8imm, |
| 133798 | /* VPSRAQZ128mikz */ |
| 133799 | VR128X, VK2WM, i128mem, u8imm, |
| 133800 | /* VPSRAQZ128ri */ |
| 133801 | VR128X, VR128X, u8imm, |
| 133802 | /* VPSRAQZ128rik */ |
| 133803 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 133804 | /* VPSRAQZ128rikz */ |
| 133805 | VR128X, VK2WM, VR128X, u8imm, |
| 133806 | /* VPSRAQZ128rm */ |
| 133807 | VR128X, VR128X, i128mem, |
| 133808 | /* VPSRAQZ128rmk */ |
| 133809 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 133810 | /* VPSRAQZ128rmkz */ |
| 133811 | VR128X, VK2WM, VR128X, i128mem, |
| 133812 | /* VPSRAQZ128rr */ |
| 133813 | VR128X, VR128X, VR128X, |
| 133814 | /* VPSRAQZ128rrk */ |
| 133815 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133816 | /* VPSRAQZ128rrkz */ |
| 133817 | VR128X, VK2WM, VR128X, VR128X, |
| 133818 | /* VPSRAQZ256mbi */ |
| 133819 | VR256X, i64mem, u8imm, |
| 133820 | /* VPSRAQZ256mbik */ |
| 133821 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 133822 | /* VPSRAQZ256mbikz */ |
| 133823 | VR256X, VK4WM, i64mem, u8imm, |
| 133824 | /* VPSRAQZ256mi */ |
| 133825 | VR256X, i256mem, u8imm, |
| 133826 | /* VPSRAQZ256mik */ |
| 133827 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 133828 | /* VPSRAQZ256mikz */ |
| 133829 | VR256X, VK4WM, i256mem, u8imm, |
| 133830 | /* VPSRAQZ256ri */ |
| 133831 | VR256X, VR256X, u8imm, |
| 133832 | /* VPSRAQZ256rik */ |
| 133833 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 133834 | /* VPSRAQZ256rikz */ |
| 133835 | VR256X, VK4WM, VR256X, u8imm, |
| 133836 | /* VPSRAQZ256rm */ |
| 133837 | VR256X, VR256X, i128mem, |
| 133838 | /* VPSRAQZ256rmk */ |
| 133839 | VR256X, VR256X, VK4WM, VR256X, i128mem, |
| 133840 | /* VPSRAQZ256rmkz */ |
| 133841 | VR256X, VK4WM, VR256X, i128mem, |
| 133842 | /* VPSRAQZ256rr */ |
| 133843 | VR256X, VR256X, VR128X, |
| 133844 | /* VPSRAQZ256rrk */ |
| 133845 | VR256X, VR256X, VK4WM, VR256X, VR128X, |
| 133846 | /* VPSRAQZ256rrkz */ |
| 133847 | VR256X, VK4WM, VR256X, VR128X, |
| 133848 | /* VPSRAQZmbi */ |
| 133849 | VR512, i64mem, u8imm, |
| 133850 | /* VPSRAQZmbik */ |
| 133851 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 133852 | /* VPSRAQZmbikz */ |
| 133853 | VR512, VK8WM, i64mem, u8imm, |
| 133854 | /* VPSRAQZmi */ |
| 133855 | VR512, i512mem, u8imm, |
| 133856 | /* VPSRAQZmik */ |
| 133857 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 133858 | /* VPSRAQZmikz */ |
| 133859 | VR512, VK8WM, i512mem, u8imm, |
| 133860 | /* VPSRAQZri */ |
| 133861 | VR512, VR512, u8imm, |
| 133862 | /* VPSRAQZrik */ |
| 133863 | VR512, VR512, VK8WM, VR512, u8imm, |
| 133864 | /* VPSRAQZrikz */ |
| 133865 | VR512, VK8WM, VR512, u8imm, |
| 133866 | /* VPSRAQZrm */ |
| 133867 | VR512, VR512, i128mem, |
| 133868 | /* VPSRAQZrmk */ |
| 133869 | VR512, VR512, VK8WM, VR512, i128mem, |
| 133870 | /* VPSRAQZrmkz */ |
| 133871 | VR512, VK8WM, VR512, i128mem, |
| 133872 | /* VPSRAQZrr */ |
| 133873 | VR512, VR512, VR128X, |
| 133874 | /* VPSRAQZrrk */ |
| 133875 | VR512, VR512, VK8WM, VR512, VR128X, |
| 133876 | /* VPSRAQZrrkz */ |
| 133877 | VR512, VK8WM, VR512, VR128X, |
| 133878 | /* VPSRAVDYrm */ |
| 133879 | VR256, VR256, i256mem, |
| 133880 | /* VPSRAVDYrr */ |
| 133881 | VR256, VR256, VR256, |
| 133882 | /* VPSRAVDZ128rm */ |
| 133883 | VR128X, VR128X, i128mem, |
| 133884 | /* VPSRAVDZ128rmb */ |
| 133885 | VR128X, VR128X, i32mem, |
| 133886 | /* VPSRAVDZ128rmbk */ |
| 133887 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 133888 | /* VPSRAVDZ128rmbkz */ |
| 133889 | VR128X, VK4WM, VR128X, i32mem, |
| 133890 | /* VPSRAVDZ128rmk */ |
| 133891 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 133892 | /* VPSRAVDZ128rmkz */ |
| 133893 | VR128X, VK4WM, VR128X, i128mem, |
| 133894 | /* VPSRAVDZ128rr */ |
| 133895 | VR128X, VR128X, VR128X, |
| 133896 | /* VPSRAVDZ128rrk */ |
| 133897 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 133898 | /* VPSRAVDZ128rrkz */ |
| 133899 | VR128X, VK4WM, VR128X, VR128X, |
| 133900 | /* VPSRAVDZ256rm */ |
| 133901 | VR256X, VR256X, i256mem, |
| 133902 | /* VPSRAVDZ256rmb */ |
| 133903 | VR256X, VR256X, i32mem, |
| 133904 | /* VPSRAVDZ256rmbk */ |
| 133905 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 133906 | /* VPSRAVDZ256rmbkz */ |
| 133907 | VR256X, VK8WM, VR256X, i32mem, |
| 133908 | /* VPSRAVDZ256rmk */ |
| 133909 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 133910 | /* VPSRAVDZ256rmkz */ |
| 133911 | VR256X, VK8WM, VR256X, i256mem, |
| 133912 | /* VPSRAVDZ256rr */ |
| 133913 | VR256X, VR256X, VR256X, |
| 133914 | /* VPSRAVDZ256rrk */ |
| 133915 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 133916 | /* VPSRAVDZ256rrkz */ |
| 133917 | VR256X, VK8WM, VR256X, VR256X, |
| 133918 | /* VPSRAVDZrm */ |
| 133919 | VR512, VR512, i512mem, |
| 133920 | /* VPSRAVDZrmb */ |
| 133921 | VR512, VR512, i32mem, |
| 133922 | /* VPSRAVDZrmbk */ |
| 133923 | VR512, VR512, VK16WM, VR512, i32mem, |
| 133924 | /* VPSRAVDZrmbkz */ |
| 133925 | VR512, VK16WM, VR512, i32mem, |
| 133926 | /* VPSRAVDZrmk */ |
| 133927 | VR512, VR512, VK16WM, VR512, i512mem, |
| 133928 | /* VPSRAVDZrmkz */ |
| 133929 | VR512, VK16WM, VR512, i512mem, |
| 133930 | /* VPSRAVDZrr */ |
| 133931 | VR512, VR512, VR512, |
| 133932 | /* VPSRAVDZrrk */ |
| 133933 | VR512, VR512, VK16WM, VR512, VR512, |
| 133934 | /* VPSRAVDZrrkz */ |
| 133935 | VR512, VK16WM, VR512, VR512, |
| 133936 | /* VPSRAVDrm */ |
| 133937 | VR128, VR128, i128mem, |
| 133938 | /* VPSRAVDrr */ |
| 133939 | VR128, VR128, VR128, |
| 133940 | /* VPSRAVQZ128rm */ |
| 133941 | VR128X, VR128X, i128mem, |
| 133942 | /* VPSRAVQZ128rmb */ |
| 133943 | VR128X, VR128X, i64mem, |
| 133944 | /* VPSRAVQZ128rmbk */ |
| 133945 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 133946 | /* VPSRAVQZ128rmbkz */ |
| 133947 | VR128X, VK2WM, VR128X, i64mem, |
| 133948 | /* VPSRAVQZ128rmk */ |
| 133949 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 133950 | /* VPSRAVQZ128rmkz */ |
| 133951 | VR128X, VK2WM, VR128X, i128mem, |
| 133952 | /* VPSRAVQZ128rr */ |
| 133953 | VR128X, VR128X, VR128X, |
| 133954 | /* VPSRAVQZ128rrk */ |
| 133955 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133956 | /* VPSRAVQZ128rrkz */ |
| 133957 | VR128X, VK2WM, VR128X, VR128X, |
| 133958 | /* VPSRAVQZ256rm */ |
| 133959 | VR256X, VR256X, i256mem, |
| 133960 | /* VPSRAVQZ256rmb */ |
| 133961 | VR256X, VR256X, i64mem, |
| 133962 | /* VPSRAVQZ256rmbk */ |
| 133963 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 133964 | /* VPSRAVQZ256rmbkz */ |
| 133965 | VR256X, VK4WM, VR256X, i64mem, |
| 133966 | /* VPSRAVQZ256rmk */ |
| 133967 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 133968 | /* VPSRAVQZ256rmkz */ |
| 133969 | VR256X, VK4WM, VR256X, i256mem, |
| 133970 | /* VPSRAVQZ256rr */ |
| 133971 | VR256X, VR256X, VR256X, |
| 133972 | /* VPSRAVQZ256rrk */ |
| 133973 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 133974 | /* VPSRAVQZ256rrkz */ |
| 133975 | VR256X, VK4WM, VR256X, VR256X, |
| 133976 | /* VPSRAVQZrm */ |
| 133977 | VR512, VR512, i512mem, |
| 133978 | /* VPSRAVQZrmb */ |
| 133979 | VR512, VR512, i64mem, |
| 133980 | /* VPSRAVQZrmbk */ |
| 133981 | VR512, VR512, VK8WM, VR512, i64mem, |
| 133982 | /* VPSRAVQZrmbkz */ |
| 133983 | VR512, VK8WM, VR512, i64mem, |
| 133984 | /* VPSRAVQZrmk */ |
| 133985 | VR512, VR512, VK8WM, VR512, i512mem, |
| 133986 | /* VPSRAVQZrmkz */ |
| 133987 | VR512, VK8WM, VR512, i512mem, |
| 133988 | /* VPSRAVQZrr */ |
| 133989 | VR512, VR512, VR512, |
| 133990 | /* VPSRAVQZrrk */ |
| 133991 | VR512, VR512, VK8WM, VR512, VR512, |
| 133992 | /* VPSRAVQZrrkz */ |
| 133993 | VR512, VK8WM, VR512, VR512, |
| 133994 | /* VPSRAVWZ128rm */ |
| 133995 | VR128X, VR128X, i128mem, |
| 133996 | /* VPSRAVWZ128rmk */ |
| 133997 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 133998 | /* VPSRAVWZ128rmkz */ |
| 133999 | VR128X, VK8WM, VR128X, i128mem, |
| 134000 | /* VPSRAVWZ128rr */ |
| 134001 | VR128X, VR128X, VR128X, |
| 134002 | /* VPSRAVWZ128rrk */ |
| 134003 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134004 | /* VPSRAVWZ128rrkz */ |
| 134005 | VR128X, VK8WM, VR128X, VR128X, |
| 134006 | /* VPSRAVWZ256rm */ |
| 134007 | VR256X, VR256X, i256mem, |
| 134008 | /* VPSRAVWZ256rmk */ |
| 134009 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 134010 | /* VPSRAVWZ256rmkz */ |
| 134011 | VR256X, VK16WM, VR256X, i256mem, |
| 134012 | /* VPSRAVWZ256rr */ |
| 134013 | VR256X, VR256X, VR256X, |
| 134014 | /* VPSRAVWZ256rrk */ |
| 134015 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 134016 | /* VPSRAVWZ256rrkz */ |
| 134017 | VR256X, VK16WM, VR256X, VR256X, |
| 134018 | /* VPSRAVWZrm */ |
| 134019 | VR512, VR512, i512mem, |
| 134020 | /* VPSRAVWZrmk */ |
| 134021 | VR512, VR512, VK32WM, VR512, i512mem, |
| 134022 | /* VPSRAVWZrmkz */ |
| 134023 | VR512, VK32WM, VR512, i512mem, |
| 134024 | /* VPSRAVWZrr */ |
| 134025 | VR512, VR512, VR512, |
| 134026 | /* VPSRAVWZrrk */ |
| 134027 | VR512, VR512, VK32WM, VR512, VR512, |
| 134028 | /* VPSRAVWZrrkz */ |
| 134029 | VR512, VK32WM, VR512, VR512, |
| 134030 | /* VPSRAWYri */ |
| 134031 | VR256, VR256, u8imm, |
| 134032 | /* VPSRAWYrm */ |
| 134033 | VR256, VR256, i128mem, |
| 134034 | /* VPSRAWYrr */ |
| 134035 | VR256, VR256, VR128, |
| 134036 | /* VPSRAWZ128mi */ |
| 134037 | VR128X, i128mem, u8imm, |
| 134038 | /* VPSRAWZ128mik */ |
| 134039 | VR128X, VR128X, VK8WM, i128mem, u8imm, |
| 134040 | /* VPSRAWZ128mikz */ |
| 134041 | VR128X, VK8WM, i128mem, u8imm, |
| 134042 | /* VPSRAWZ128ri */ |
| 134043 | VR128X, VR128X, u8imm, |
| 134044 | /* VPSRAWZ128rik */ |
| 134045 | VR128X, VR128X, VK8WM, VR128X, u8imm, |
| 134046 | /* VPSRAWZ128rikz */ |
| 134047 | VR128X, VK8WM, VR128X, u8imm, |
| 134048 | /* VPSRAWZ128rm */ |
| 134049 | VR128X, VR128X, i128mem, |
| 134050 | /* VPSRAWZ128rmk */ |
| 134051 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 134052 | /* VPSRAWZ128rmkz */ |
| 134053 | VR128X, VK8WM, VR128X, i128mem, |
| 134054 | /* VPSRAWZ128rr */ |
| 134055 | VR128X, VR128X, VR128X, |
| 134056 | /* VPSRAWZ128rrk */ |
| 134057 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134058 | /* VPSRAWZ128rrkz */ |
| 134059 | VR128X, VK8WM, VR128X, VR128X, |
| 134060 | /* VPSRAWZ256mi */ |
| 134061 | VR256X, i256mem, u8imm, |
| 134062 | /* VPSRAWZ256mik */ |
| 134063 | VR256X, VR256X, VK16WM, i256mem, u8imm, |
| 134064 | /* VPSRAWZ256mikz */ |
| 134065 | VR256X, VK16WM, i256mem, u8imm, |
| 134066 | /* VPSRAWZ256ri */ |
| 134067 | VR256X, VR256X, u8imm, |
| 134068 | /* VPSRAWZ256rik */ |
| 134069 | VR256X, VR256X, VK16WM, VR256X, u8imm, |
| 134070 | /* VPSRAWZ256rikz */ |
| 134071 | VR256X, VK16WM, VR256X, u8imm, |
| 134072 | /* VPSRAWZ256rm */ |
| 134073 | VR256X, VR256X, i128mem, |
| 134074 | /* VPSRAWZ256rmk */ |
| 134075 | VR256X, VR256X, VK16WM, VR256X, i128mem, |
| 134076 | /* VPSRAWZ256rmkz */ |
| 134077 | VR256X, VK16WM, VR256X, i128mem, |
| 134078 | /* VPSRAWZ256rr */ |
| 134079 | VR256X, VR256X, VR128X, |
| 134080 | /* VPSRAWZ256rrk */ |
| 134081 | VR256X, VR256X, VK16WM, VR256X, VR128X, |
| 134082 | /* VPSRAWZ256rrkz */ |
| 134083 | VR256X, VK16WM, VR256X, VR128X, |
| 134084 | /* VPSRAWZmi */ |
| 134085 | VR512, i512mem, u8imm, |
| 134086 | /* VPSRAWZmik */ |
| 134087 | VR512, VR512, VK32WM, i512mem, u8imm, |
| 134088 | /* VPSRAWZmikz */ |
| 134089 | VR512, VK32WM, i512mem, u8imm, |
| 134090 | /* VPSRAWZri */ |
| 134091 | VR512, VR512, u8imm, |
| 134092 | /* VPSRAWZrik */ |
| 134093 | VR512, VR512, VK32WM, VR512, u8imm, |
| 134094 | /* VPSRAWZrikz */ |
| 134095 | VR512, VK32WM, VR512, u8imm, |
| 134096 | /* VPSRAWZrm */ |
| 134097 | VR512, VR512, i128mem, |
| 134098 | /* VPSRAWZrmk */ |
| 134099 | VR512, VR512, VK32WM, VR512, i128mem, |
| 134100 | /* VPSRAWZrmkz */ |
| 134101 | VR512, VK32WM, VR512, i128mem, |
| 134102 | /* VPSRAWZrr */ |
| 134103 | VR512, VR512, VR128X, |
| 134104 | /* VPSRAWZrrk */ |
| 134105 | VR512, VR512, VK32WM, VR512, VR128X, |
| 134106 | /* VPSRAWZrrkz */ |
| 134107 | VR512, VK32WM, VR512, VR128X, |
| 134108 | /* VPSRAWri */ |
| 134109 | VR128, VR128, u8imm, |
| 134110 | /* VPSRAWrm */ |
| 134111 | VR128, VR128, i128mem, |
| 134112 | /* VPSRAWrr */ |
| 134113 | VR128, VR128, VR128, |
| 134114 | /* VPSRLDQYri */ |
| 134115 | VR256, VR256, u8imm, |
| 134116 | /* VPSRLDQZ128mi */ |
| 134117 | VR128X, i128mem, u8imm, |
| 134118 | /* VPSRLDQZ128ri */ |
| 134119 | VR128X, VR128X, u8imm, |
| 134120 | /* VPSRLDQZ256mi */ |
| 134121 | VR256X, i256mem, u8imm, |
| 134122 | /* VPSRLDQZ256ri */ |
| 134123 | VR256X, VR256X, u8imm, |
| 134124 | /* VPSRLDQZmi */ |
| 134125 | VR512, i512mem, u8imm, |
| 134126 | /* VPSRLDQZri */ |
| 134127 | VR512, VR512, u8imm, |
| 134128 | /* VPSRLDQri */ |
| 134129 | VR128, VR128, u8imm, |
| 134130 | /* VPSRLDYri */ |
| 134131 | VR256, VR256, u8imm, |
| 134132 | /* VPSRLDYrm */ |
| 134133 | VR256, VR256, i128mem, |
| 134134 | /* VPSRLDYrr */ |
| 134135 | VR256, VR256, VR128, |
| 134136 | /* VPSRLDZ128mbi */ |
| 134137 | VR128X, i32mem, u8imm, |
| 134138 | /* VPSRLDZ128mbik */ |
| 134139 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 134140 | /* VPSRLDZ128mbikz */ |
| 134141 | VR128X, VK4WM, i32mem, u8imm, |
| 134142 | /* VPSRLDZ128mi */ |
| 134143 | VR128X, i128mem, u8imm, |
| 134144 | /* VPSRLDZ128mik */ |
| 134145 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 134146 | /* VPSRLDZ128mikz */ |
| 134147 | VR128X, VK4WM, i128mem, u8imm, |
| 134148 | /* VPSRLDZ128ri */ |
| 134149 | VR128X, VR128X, u8imm, |
| 134150 | /* VPSRLDZ128rik */ |
| 134151 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 134152 | /* VPSRLDZ128rikz */ |
| 134153 | VR128X, VK4WM, VR128X, u8imm, |
| 134154 | /* VPSRLDZ128rm */ |
| 134155 | VR128X, VR128X, i128mem, |
| 134156 | /* VPSRLDZ128rmk */ |
| 134157 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 134158 | /* VPSRLDZ128rmkz */ |
| 134159 | VR128X, VK4WM, VR128X, i128mem, |
| 134160 | /* VPSRLDZ128rr */ |
| 134161 | VR128X, VR128X, VR128X, |
| 134162 | /* VPSRLDZ128rrk */ |
| 134163 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 134164 | /* VPSRLDZ128rrkz */ |
| 134165 | VR128X, VK4WM, VR128X, VR128X, |
| 134166 | /* VPSRLDZ256mbi */ |
| 134167 | VR256X, i32mem, u8imm, |
| 134168 | /* VPSRLDZ256mbik */ |
| 134169 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 134170 | /* VPSRLDZ256mbikz */ |
| 134171 | VR256X, VK8WM, i32mem, u8imm, |
| 134172 | /* VPSRLDZ256mi */ |
| 134173 | VR256X, i256mem, u8imm, |
| 134174 | /* VPSRLDZ256mik */ |
| 134175 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 134176 | /* VPSRLDZ256mikz */ |
| 134177 | VR256X, VK8WM, i256mem, u8imm, |
| 134178 | /* VPSRLDZ256ri */ |
| 134179 | VR256X, VR256X, u8imm, |
| 134180 | /* VPSRLDZ256rik */ |
| 134181 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 134182 | /* VPSRLDZ256rikz */ |
| 134183 | VR256X, VK8WM, VR256X, u8imm, |
| 134184 | /* VPSRLDZ256rm */ |
| 134185 | VR256X, VR256X, i128mem, |
| 134186 | /* VPSRLDZ256rmk */ |
| 134187 | VR256X, VR256X, VK8WM, VR256X, i128mem, |
| 134188 | /* VPSRLDZ256rmkz */ |
| 134189 | VR256X, VK8WM, VR256X, i128mem, |
| 134190 | /* VPSRLDZ256rr */ |
| 134191 | VR256X, VR256X, VR128X, |
| 134192 | /* VPSRLDZ256rrk */ |
| 134193 | VR256X, VR256X, VK8WM, VR256X, VR128X, |
| 134194 | /* VPSRLDZ256rrkz */ |
| 134195 | VR256X, VK8WM, VR256X, VR128X, |
| 134196 | /* VPSRLDZmbi */ |
| 134197 | VR512, i32mem, u8imm, |
| 134198 | /* VPSRLDZmbik */ |
| 134199 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 134200 | /* VPSRLDZmbikz */ |
| 134201 | VR512, VK16WM, i32mem, u8imm, |
| 134202 | /* VPSRLDZmi */ |
| 134203 | VR512, i512mem, u8imm, |
| 134204 | /* VPSRLDZmik */ |
| 134205 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 134206 | /* VPSRLDZmikz */ |
| 134207 | VR512, VK16WM, i512mem, u8imm, |
| 134208 | /* VPSRLDZri */ |
| 134209 | VR512, VR512, u8imm, |
| 134210 | /* VPSRLDZrik */ |
| 134211 | VR512, VR512, VK16WM, VR512, u8imm, |
| 134212 | /* VPSRLDZrikz */ |
| 134213 | VR512, VK16WM, VR512, u8imm, |
| 134214 | /* VPSRLDZrm */ |
| 134215 | VR512, VR512, i128mem, |
| 134216 | /* VPSRLDZrmk */ |
| 134217 | VR512, VR512, VK16WM, VR512, i128mem, |
| 134218 | /* VPSRLDZrmkz */ |
| 134219 | VR512, VK16WM, VR512, i128mem, |
| 134220 | /* VPSRLDZrr */ |
| 134221 | VR512, VR512, VR128X, |
| 134222 | /* VPSRLDZrrk */ |
| 134223 | VR512, VR512, VK16WM, VR512, VR128X, |
| 134224 | /* VPSRLDZrrkz */ |
| 134225 | VR512, VK16WM, VR512, VR128X, |
| 134226 | /* VPSRLDri */ |
| 134227 | VR128, VR128, u8imm, |
| 134228 | /* VPSRLDrm */ |
| 134229 | VR128, VR128, i128mem, |
| 134230 | /* VPSRLDrr */ |
| 134231 | VR128, VR128, VR128, |
| 134232 | /* VPSRLQYri */ |
| 134233 | VR256, VR256, u8imm, |
| 134234 | /* VPSRLQYrm */ |
| 134235 | VR256, VR256, i128mem, |
| 134236 | /* VPSRLQYrr */ |
| 134237 | VR256, VR256, VR128, |
| 134238 | /* VPSRLQZ128mbi */ |
| 134239 | VR128X, i64mem, u8imm, |
| 134240 | /* VPSRLQZ128mbik */ |
| 134241 | VR128X, VR128X, VK2WM, i64mem, u8imm, |
| 134242 | /* VPSRLQZ128mbikz */ |
| 134243 | VR128X, VK2WM, i64mem, u8imm, |
| 134244 | /* VPSRLQZ128mi */ |
| 134245 | VR128X, i128mem, u8imm, |
| 134246 | /* VPSRLQZ128mik */ |
| 134247 | VR128X, VR128X, VK2WM, i128mem, u8imm, |
| 134248 | /* VPSRLQZ128mikz */ |
| 134249 | VR128X, VK2WM, i128mem, u8imm, |
| 134250 | /* VPSRLQZ128ri */ |
| 134251 | VR128X, VR128X, u8imm, |
| 134252 | /* VPSRLQZ128rik */ |
| 134253 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 134254 | /* VPSRLQZ128rikz */ |
| 134255 | VR128X, VK2WM, VR128X, u8imm, |
| 134256 | /* VPSRLQZ128rm */ |
| 134257 | VR128X, VR128X, i128mem, |
| 134258 | /* VPSRLQZ128rmk */ |
| 134259 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 134260 | /* VPSRLQZ128rmkz */ |
| 134261 | VR128X, VK2WM, VR128X, i128mem, |
| 134262 | /* VPSRLQZ128rr */ |
| 134263 | VR128X, VR128X, VR128X, |
| 134264 | /* VPSRLQZ128rrk */ |
| 134265 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 134266 | /* VPSRLQZ128rrkz */ |
| 134267 | VR128X, VK2WM, VR128X, VR128X, |
| 134268 | /* VPSRLQZ256mbi */ |
| 134269 | VR256X, i64mem, u8imm, |
| 134270 | /* VPSRLQZ256mbik */ |
| 134271 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 134272 | /* VPSRLQZ256mbikz */ |
| 134273 | VR256X, VK4WM, i64mem, u8imm, |
| 134274 | /* VPSRLQZ256mi */ |
| 134275 | VR256X, i256mem, u8imm, |
| 134276 | /* VPSRLQZ256mik */ |
| 134277 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 134278 | /* VPSRLQZ256mikz */ |
| 134279 | VR256X, VK4WM, i256mem, u8imm, |
| 134280 | /* VPSRLQZ256ri */ |
| 134281 | VR256X, VR256X, u8imm, |
| 134282 | /* VPSRLQZ256rik */ |
| 134283 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 134284 | /* VPSRLQZ256rikz */ |
| 134285 | VR256X, VK4WM, VR256X, u8imm, |
| 134286 | /* VPSRLQZ256rm */ |
| 134287 | VR256X, VR256X, i128mem, |
| 134288 | /* VPSRLQZ256rmk */ |
| 134289 | VR256X, VR256X, VK4WM, VR256X, i128mem, |
| 134290 | /* VPSRLQZ256rmkz */ |
| 134291 | VR256X, VK4WM, VR256X, i128mem, |
| 134292 | /* VPSRLQZ256rr */ |
| 134293 | VR256X, VR256X, VR128X, |
| 134294 | /* VPSRLQZ256rrk */ |
| 134295 | VR256X, VR256X, VK4WM, VR256X, VR128X, |
| 134296 | /* VPSRLQZ256rrkz */ |
| 134297 | VR256X, VK4WM, VR256X, VR128X, |
| 134298 | /* VPSRLQZmbi */ |
| 134299 | VR512, i64mem, u8imm, |
| 134300 | /* VPSRLQZmbik */ |
| 134301 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 134302 | /* VPSRLQZmbikz */ |
| 134303 | VR512, VK8WM, i64mem, u8imm, |
| 134304 | /* VPSRLQZmi */ |
| 134305 | VR512, i512mem, u8imm, |
| 134306 | /* VPSRLQZmik */ |
| 134307 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 134308 | /* VPSRLQZmikz */ |
| 134309 | VR512, VK8WM, i512mem, u8imm, |
| 134310 | /* VPSRLQZri */ |
| 134311 | VR512, VR512, u8imm, |
| 134312 | /* VPSRLQZrik */ |
| 134313 | VR512, VR512, VK8WM, VR512, u8imm, |
| 134314 | /* VPSRLQZrikz */ |
| 134315 | VR512, VK8WM, VR512, u8imm, |
| 134316 | /* VPSRLQZrm */ |
| 134317 | VR512, VR512, i128mem, |
| 134318 | /* VPSRLQZrmk */ |
| 134319 | VR512, VR512, VK8WM, VR512, i128mem, |
| 134320 | /* VPSRLQZrmkz */ |
| 134321 | VR512, VK8WM, VR512, i128mem, |
| 134322 | /* VPSRLQZrr */ |
| 134323 | VR512, VR512, VR128X, |
| 134324 | /* VPSRLQZrrk */ |
| 134325 | VR512, VR512, VK8WM, VR512, VR128X, |
| 134326 | /* VPSRLQZrrkz */ |
| 134327 | VR512, VK8WM, VR512, VR128X, |
| 134328 | /* VPSRLQri */ |
| 134329 | VR128, VR128, u8imm, |
| 134330 | /* VPSRLQrm */ |
| 134331 | VR128, VR128, i128mem, |
| 134332 | /* VPSRLQrr */ |
| 134333 | VR128, VR128, VR128, |
| 134334 | /* VPSRLVDYrm */ |
| 134335 | VR256, VR256, i256mem, |
| 134336 | /* VPSRLVDYrr */ |
| 134337 | VR256, VR256, VR256, |
| 134338 | /* VPSRLVDZ128rm */ |
| 134339 | VR128X, VR128X, i128mem, |
| 134340 | /* VPSRLVDZ128rmb */ |
| 134341 | VR128X, VR128X, i32mem, |
| 134342 | /* VPSRLVDZ128rmbk */ |
| 134343 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 134344 | /* VPSRLVDZ128rmbkz */ |
| 134345 | VR128X, VK4WM, VR128X, i32mem, |
| 134346 | /* VPSRLVDZ128rmk */ |
| 134347 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 134348 | /* VPSRLVDZ128rmkz */ |
| 134349 | VR128X, VK4WM, VR128X, i128mem, |
| 134350 | /* VPSRLVDZ128rr */ |
| 134351 | VR128X, VR128X, VR128X, |
| 134352 | /* VPSRLVDZ128rrk */ |
| 134353 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 134354 | /* VPSRLVDZ128rrkz */ |
| 134355 | VR128X, VK4WM, VR128X, VR128X, |
| 134356 | /* VPSRLVDZ256rm */ |
| 134357 | VR256X, VR256X, i256mem, |
| 134358 | /* VPSRLVDZ256rmb */ |
| 134359 | VR256X, VR256X, i32mem, |
| 134360 | /* VPSRLVDZ256rmbk */ |
| 134361 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 134362 | /* VPSRLVDZ256rmbkz */ |
| 134363 | VR256X, VK8WM, VR256X, i32mem, |
| 134364 | /* VPSRLVDZ256rmk */ |
| 134365 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 134366 | /* VPSRLVDZ256rmkz */ |
| 134367 | VR256X, VK8WM, VR256X, i256mem, |
| 134368 | /* VPSRLVDZ256rr */ |
| 134369 | VR256X, VR256X, VR256X, |
| 134370 | /* VPSRLVDZ256rrk */ |
| 134371 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 134372 | /* VPSRLVDZ256rrkz */ |
| 134373 | VR256X, VK8WM, VR256X, VR256X, |
| 134374 | /* VPSRLVDZrm */ |
| 134375 | VR512, VR512, i512mem, |
| 134376 | /* VPSRLVDZrmb */ |
| 134377 | VR512, VR512, i32mem, |
| 134378 | /* VPSRLVDZrmbk */ |
| 134379 | VR512, VR512, VK16WM, VR512, i32mem, |
| 134380 | /* VPSRLVDZrmbkz */ |
| 134381 | VR512, VK16WM, VR512, i32mem, |
| 134382 | /* VPSRLVDZrmk */ |
| 134383 | VR512, VR512, VK16WM, VR512, i512mem, |
| 134384 | /* VPSRLVDZrmkz */ |
| 134385 | VR512, VK16WM, VR512, i512mem, |
| 134386 | /* VPSRLVDZrr */ |
| 134387 | VR512, VR512, VR512, |
| 134388 | /* VPSRLVDZrrk */ |
| 134389 | VR512, VR512, VK16WM, VR512, VR512, |
| 134390 | /* VPSRLVDZrrkz */ |
| 134391 | VR512, VK16WM, VR512, VR512, |
| 134392 | /* VPSRLVDrm */ |
| 134393 | VR128, VR128, i128mem, |
| 134394 | /* VPSRLVDrr */ |
| 134395 | VR128, VR128, VR128, |
| 134396 | /* VPSRLVQYrm */ |
| 134397 | VR256, VR256, i256mem, |
| 134398 | /* VPSRLVQYrr */ |
| 134399 | VR256, VR256, VR256, |
| 134400 | /* VPSRLVQZ128rm */ |
| 134401 | VR128X, VR128X, i128mem, |
| 134402 | /* VPSRLVQZ128rmb */ |
| 134403 | VR128X, VR128X, i64mem, |
| 134404 | /* VPSRLVQZ128rmbk */ |
| 134405 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 134406 | /* VPSRLVQZ128rmbkz */ |
| 134407 | VR128X, VK2WM, VR128X, i64mem, |
| 134408 | /* VPSRLVQZ128rmk */ |
| 134409 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 134410 | /* VPSRLVQZ128rmkz */ |
| 134411 | VR128X, VK2WM, VR128X, i128mem, |
| 134412 | /* VPSRLVQZ128rr */ |
| 134413 | VR128X, VR128X, VR128X, |
| 134414 | /* VPSRLVQZ128rrk */ |
| 134415 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 134416 | /* VPSRLVQZ128rrkz */ |
| 134417 | VR128X, VK2WM, VR128X, VR128X, |
| 134418 | /* VPSRLVQZ256rm */ |
| 134419 | VR256X, VR256X, i256mem, |
| 134420 | /* VPSRLVQZ256rmb */ |
| 134421 | VR256X, VR256X, i64mem, |
| 134422 | /* VPSRLVQZ256rmbk */ |
| 134423 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 134424 | /* VPSRLVQZ256rmbkz */ |
| 134425 | VR256X, VK4WM, VR256X, i64mem, |
| 134426 | /* VPSRLVQZ256rmk */ |
| 134427 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 134428 | /* VPSRLVQZ256rmkz */ |
| 134429 | VR256X, VK4WM, VR256X, i256mem, |
| 134430 | /* VPSRLVQZ256rr */ |
| 134431 | VR256X, VR256X, VR256X, |
| 134432 | /* VPSRLVQZ256rrk */ |
| 134433 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 134434 | /* VPSRLVQZ256rrkz */ |
| 134435 | VR256X, VK4WM, VR256X, VR256X, |
| 134436 | /* VPSRLVQZrm */ |
| 134437 | VR512, VR512, i512mem, |
| 134438 | /* VPSRLVQZrmb */ |
| 134439 | VR512, VR512, i64mem, |
| 134440 | /* VPSRLVQZrmbk */ |
| 134441 | VR512, VR512, VK8WM, VR512, i64mem, |
| 134442 | /* VPSRLVQZrmbkz */ |
| 134443 | VR512, VK8WM, VR512, i64mem, |
| 134444 | /* VPSRLVQZrmk */ |
| 134445 | VR512, VR512, VK8WM, VR512, i512mem, |
| 134446 | /* VPSRLVQZrmkz */ |
| 134447 | VR512, VK8WM, VR512, i512mem, |
| 134448 | /* VPSRLVQZrr */ |
| 134449 | VR512, VR512, VR512, |
| 134450 | /* VPSRLVQZrrk */ |
| 134451 | VR512, VR512, VK8WM, VR512, VR512, |
| 134452 | /* VPSRLVQZrrkz */ |
| 134453 | VR512, VK8WM, VR512, VR512, |
| 134454 | /* VPSRLVQrm */ |
| 134455 | VR128, VR128, i128mem, |
| 134456 | /* VPSRLVQrr */ |
| 134457 | VR128, VR128, VR128, |
| 134458 | /* VPSRLVWZ128rm */ |
| 134459 | VR128X, VR128X, i128mem, |
| 134460 | /* VPSRLVWZ128rmk */ |
| 134461 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 134462 | /* VPSRLVWZ128rmkz */ |
| 134463 | VR128X, VK8WM, VR128X, i128mem, |
| 134464 | /* VPSRLVWZ128rr */ |
| 134465 | VR128X, VR128X, VR128X, |
| 134466 | /* VPSRLVWZ128rrk */ |
| 134467 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134468 | /* VPSRLVWZ128rrkz */ |
| 134469 | VR128X, VK8WM, VR128X, VR128X, |
| 134470 | /* VPSRLVWZ256rm */ |
| 134471 | VR256X, VR256X, i256mem, |
| 134472 | /* VPSRLVWZ256rmk */ |
| 134473 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 134474 | /* VPSRLVWZ256rmkz */ |
| 134475 | VR256X, VK16WM, VR256X, i256mem, |
| 134476 | /* VPSRLVWZ256rr */ |
| 134477 | VR256X, VR256X, VR256X, |
| 134478 | /* VPSRLVWZ256rrk */ |
| 134479 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 134480 | /* VPSRLVWZ256rrkz */ |
| 134481 | VR256X, VK16WM, VR256X, VR256X, |
| 134482 | /* VPSRLVWZrm */ |
| 134483 | VR512, VR512, i512mem, |
| 134484 | /* VPSRLVWZrmk */ |
| 134485 | VR512, VR512, VK32WM, VR512, i512mem, |
| 134486 | /* VPSRLVWZrmkz */ |
| 134487 | VR512, VK32WM, VR512, i512mem, |
| 134488 | /* VPSRLVWZrr */ |
| 134489 | VR512, VR512, VR512, |
| 134490 | /* VPSRLVWZrrk */ |
| 134491 | VR512, VR512, VK32WM, VR512, VR512, |
| 134492 | /* VPSRLVWZrrkz */ |
| 134493 | VR512, VK32WM, VR512, VR512, |
| 134494 | /* VPSRLWYri */ |
| 134495 | VR256, VR256, u8imm, |
| 134496 | /* VPSRLWYrm */ |
| 134497 | VR256, VR256, i128mem, |
| 134498 | /* VPSRLWYrr */ |
| 134499 | VR256, VR256, VR128, |
| 134500 | /* VPSRLWZ128mi */ |
| 134501 | VR128X, i128mem, u8imm, |
| 134502 | /* VPSRLWZ128mik */ |
| 134503 | VR128X, VR128X, VK8WM, i128mem, u8imm, |
| 134504 | /* VPSRLWZ128mikz */ |
| 134505 | VR128X, VK8WM, i128mem, u8imm, |
| 134506 | /* VPSRLWZ128ri */ |
| 134507 | VR128X, VR128X, u8imm, |
| 134508 | /* VPSRLWZ128rik */ |
| 134509 | VR128X, VR128X, VK8WM, VR128X, u8imm, |
| 134510 | /* VPSRLWZ128rikz */ |
| 134511 | VR128X, VK8WM, VR128X, u8imm, |
| 134512 | /* VPSRLWZ128rm */ |
| 134513 | VR128X, VR128X, i128mem, |
| 134514 | /* VPSRLWZ128rmk */ |
| 134515 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 134516 | /* VPSRLWZ128rmkz */ |
| 134517 | VR128X, VK8WM, VR128X, i128mem, |
| 134518 | /* VPSRLWZ128rr */ |
| 134519 | VR128X, VR128X, VR128X, |
| 134520 | /* VPSRLWZ128rrk */ |
| 134521 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134522 | /* VPSRLWZ128rrkz */ |
| 134523 | VR128X, VK8WM, VR128X, VR128X, |
| 134524 | /* VPSRLWZ256mi */ |
| 134525 | VR256X, i256mem, u8imm, |
| 134526 | /* VPSRLWZ256mik */ |
| 134527 | VR256X, VR256X, VK16WM, i256mem, u8imm, |
| 134528 | /* VPSRLWZ256mikz */ |
| 134529 | VR256X, VK16WM, i256mem, u8imm, |
| 134530 | /* VPSRLWZ256ri */ |
| 134531 | VR256X, VR256X, u8imm, |
| 134532 | /* VPSRLWZ256rik */ |
| 134533 | VR256X, VR256X, VK16WM, VR256X, u8imm, |
| 134534 | /* VPSRLWZ256rikz */ |
| 134535 | VR256X, VK16WM, VR256X, u8imm, |
| 134536 | /* VPSRLWZ256rm */ |
| 134537 | VR256X, VR256X, i128mem, |
| 134538 | /* VPSRLWZ256rmk */ |
| 134539 | VR256X, VR256X, VK16WM, VR256X, i128mem, |
| 134540 | /* VPSRLWZ256rmkz */ |
| 134541 | VR256X, VK16WM, VR256X, i128mem, |
| 134542 | /* VPSRLWZ256rr */ |
| 134543 | VR256X, VR256X, VR128X, |
| 134544 | /* VPSRLWZ256rrk */ |
| 134545 | VR256X, VR256X, VK16WM, VR256X, VR128X, |
| 134546 | /* VPSRLWZ256rrkz */ |
| 134547 | VR256X, VK16WM, VR256X, VR128X, |
| 134548 | /* VPSRLWZmi */ |
| 134549 | VR512, i512mem, u8imm, |
| 134550 | /* VPSRLWZmik */ |
| 134551 | VR512, VR512, VK32WM, i512mem, u8imm, |
| 134552 | /* VPSRLWZmikz */ |
| 134553 | VR512, VK32WM, i512mem, u8imm, |
| 134554 | /* VPSRLWZri */ |
| 134555 | VR512, VR512, u8imm, |
| 134556 | /* VPSRLWZrik */ |
| 134557 | VR512, VR512, VK32WM, VR512, u8imm, |
| 134558 | /* VPSRLWZrikz */ |
| 134559 | VR512, VK32WM, VR512, u8imm, |
| 134560 | /* VPSRLWZrm */ |
| 134561 | VR512, VR512, i128mem, |
| 134562 | /* VPSRLWZrmk */ |
| 134563 | VR512, VR512, VK32WM, VR512, i128mem, |
| 134564 | /* VPSRLWZrmkz */ |
| 134565 | VR512, VK32WM, VR512, i128mem, |
| 134566 | /* VPSRLWZrr */ |
| 134567 | VR512, VR512, VR128X, |
| 134568 | /* VPSRLWZrrk */ |
| 134569 | VR512, VR512, VK32WM, VR512, VR128X, |
| 134570 | /* VPSRLWZrrkz */ |
| 134571 | VR512, VK32WM, VR512, VR128X, |
| 134572 | /* VPSRLWri */ |
| 134573 | VR128, VR128, u8imm, |
| 134574 | /* VPSRLWrm */ |
| 134575 | VR128, VR128, i128mem, |
| 134576 | /* VPSRLWrr */ |
| 134577 | VR128, VR128, VR128, |
| 134578 | /* VPSUBBYrm */ |
| 134579 | VR256, VR256, i256mem, |
| 134580 | /* VPSUBBYrr */ |
| 134581 | VR256, VR256, VR256, |
| 134582 | /* VPSUBBZ128rm */ |
| 134583 | VR128X, VR128X, i128mem, |
| 134584 | /* VPSUBBZ128rmk */ |
| 134585 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 134586 | /* VPSUBBZ128rmkz */ |
| 134587 | VR128X, VK16WM, VR128X, i128mem, |
| 134588 | /* VPSUBBZ128rr */ |
| 134589 | VR128X, VR128X, VR128X, |
| 134590 | /* VPSUBBZ128rrk */ |
| 134591 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 134592 | /* VPSUBBZ128rrkz */ |
| 134593 | VR128X, VK16WM, VR128X, VR128X, |
| 134594 | /* VPSUBBZ256rm */ |
| 134595 | VR256X, VR256X, i256mem, |
| 134596 | /* VPSUBBZ256rmk */ |
| 134597 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 134598 | /* VPSUBBZ256rmkz */ |
| 134599 | VR256X, VK32WM, VR256X, i256mem, |
| 134600 | /* VPSUBBZ256rr */ |
| 134601 | VR256X, VR256X, VR256X, |
| 134602 | /* VPSUBBZ256rrk */ |
| 134603 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 134604 | /* VPSUBBZ256rrkz */ |
| 134605 | VR256X, VK32WM, VR256X, VR256X, |
| 134606 | /* VPSUBBZrm */ |
| 134607 | VR512, VR512, i512mem, |
| 134608 | /* VPSUBBZrmk */ |
| 134609 | VR512, VR512, VK64WM, VR512, i512mem, |
| 134610 | /* VPSUBBZrmkz */ |
| 134611 | VR512, VK64WM, VR512, i512mem, |
| 134612 | /* VPSUBBZrr */ |
| 134613 | VR512, VR512, VR512, |
| 134614 | /* VPSUBBZrrk */ |
| 134615 | VR512, VR512, VK64WM, VR512, VR512, |
| 134616 | /* VPSUBBZrrkz */ |
| 134617 | VR512, VK64WM, VR512, VR512, |
| 134618 | /* VPSUBBrm */ |
| 134619 | VR128, VR128, i128mem, |
| 134620 | /* VPSUBBrr */ |
| 134621 | VR128, VR128, VR128, |
| 134622 | /* VPSUBDYrm */ |
| 134623 | VR256, VR256, i256mem, |
| 134624 | /* VPSUBDYrr */ |
| 134625 | VR256, VR256, VR256, |
| 134626 | /* VPSUBDZ128rm */ |
| 134627 | VR128X, VR128X, i128mem, |
| 134628 | /* VPSUBDZ128rmb */ |
| 134629 | VR128X, VR128X, i32mem, |
| 134630 | /* VPSUBDZ128rmbk */ |
| 134631 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 134632 | /* VPSUBDZ128rmbkz */ |
| 134633 | VR128X, VK4WM, VR128X, i32mem, |
| 134634 | /* VPSUBDZ128rmk */ |
| 134635 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 134636 | /* VPSUBDZ128rmkz */ |
| 134637 | VR128X, VK4WM, VR128X, i128mem, |
| 134638 | /* VPSUBDZ128rr */ |
| 134639 | VR128X, VR128X, VR128X, |
| 134640 | /* VPSUBDZ128rrk */ |
| 134641 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 134642 | /* VPSUBDZ128rrkz */ |
| 134643 | VR128X, VK4WM, VR128X, VR128X, |
| 134644 | /* VPSUBDZ256rm */ |
| 134645 | VR256X, VR256X, i256mem, |
| 134646 | /* VPSUBDZ256rmb */ |
| 134647 | VR256X, VR256X, i32mem, |
| 134648 | /* VPSUBDZ256rmbk */ |
| 134649 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 134650 | /* VPSUBDZ256rmbkz */ |
| 134651 | VR256X, VK8WM, VR256X, i32mem, |
| 134652 | /* VPSUBDZ256rmk */ |
| 134653 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 134654 | /* VPSUBDZ256rmkz */ |
| 134655 | VR256X, VK8WM, VR256X, i256mem, |
| 134656 | /* VPSUBDZ256rr */ |
| 134657 | VR256X, VR256X, VR256X, |
| 134658 | /* VPSUBDZ256rrk */ |
| 134659 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 134660 | /* VPSUBDZ256rrkz */ |
| 134661 | VR256X, VK8WM, VR256X, VR256X, |
| 134662 | /* VPSUBDZrm */ |
| 134663 | VR512, VR512, i512mem, |
| 134664 | /* VPSUBDZrmb */ |
| 134665 | VR512, VR512, i32mem, |
| 134666 | /* VPSUBDZrmbk */ |
| 134667 | VR512, VR512, VK16WM, VR512, i32mem, |
| 134668 | /* VPSUBDZrmbkz */ |
| 134669 | VR512, VK16WM, VR512, i32mem, |
| 134670 | /* VPSUBDZrmk */ |
| 134671 | VR512, VR512, VK16WM, VR512, i512mem, |
| 134672 | /* VPSUBDZrmkz */ |
| 134673 | VR512, VK16WM, VR512, i512mem, |
| 134674 | /* VPSUBDZrr */ |
| 134675 | VR512, VR512, VR512, |
| 134676 | /* VPSUBDZrrk */ |
| 134677 | VR512, VR512, VK16WM, VR512, VR512, |
| 134678 | /* VPSUBDZrrkz */ |
| 134679 | VR512, VK16WM, VR512, VR512, |
| 134680 | /* VPSUBDrm */ |
| 134681 | VR128, VR128, i128mem, |
| 134682 | /* VPSUBDrr */ |
| 134683 | VR128, VR128, VR128, |
| 134684 | /* VPSUBQYrm */ |
| 134685 | VR256, VR256, i256mem, |
| 134686 | /* VPSUBQYrr */ |
| 134687 | VR256, VR256, VR256, |
| 134688 | /* VPSUBQZ128rm */ |
| 134689 | VR128X, VR128X, i128mem, |
| 134690 | /* VPSUBQZ128rmb */ |
| 134691 | VR128X, VR128X, i64mem, |
| 134692 | /* VPSUBQZ128rmbk */ |
| 134693 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 134694 | /* VPSUBQZ128rmbkz */ |
| 134695 | VR128X, VK2WM, VR128X, i64mem, |
| 134696 | /* VPSUBQZ128rmk */ |
| 134697 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 134698 | /* VPSUBQZ128rmkz */ |
| 134699 | VR128X, VK2WM, VR128X, i128mem, |
| 134700 | /* VPSUBQZ128rr */ |
| 134701 | VR128X, VR128X, VR128X, |
| 134702 | /* VPSUBQZ128rrk */ |
| 134703 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 134704 | /* VPSUBQZ128rrkz */ |
| 134705 | VR128X, VK2WM, VR128X, VR128X, |
| 134706 | /* VPSUBQZ256rm */ |
| 134707 | VR256X, VR256X, i256mem, |
| 134708 | /* VPSUBQZ256rmb */ |
| 134709 | VR256X, VR256X, i64mem, |
| 134710 | /* VPSUBQZ256rmbk */ |
| 134711 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 134712 | /* VPSUBQZ256rmbkz */ |
| 134713 | VR256X, VK4WM, VR256X, i64mem, |
| 134714 | /* VPSUBQZ256rmk */ |
| 134715 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 134716 | /* VPSUBQZ256rmkz */ |
| 134717 | VR256X, VK4WM, VR256X, i256mem, |
| 134718 | /* VPSUBQZ256rr */ |
| 134719 | VR256X, VR256X, VR256X, |
| 134720 | /* VPSUBQZ256rrk */ |
| 134721 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 134722 | /* VPSUBQZ256rrkz */ |
| 134723 | VR256X, VK4WM, VR256X, VR256X, |
| 134724 | /* VPSUBQZrm */ |
| 134725 | VR512, VR512, i512mem, |
| 134726 | /* VPSUBQZrmb */ |
| 134727 | VR512, VR512, i64mem, |
| 134728 | /* VPSUBQZrmbk */ |
| 134729 | VR512, VR512, VK8WM, VR512, i64mem, |
| 134730 | /* VPSUBQZrmbkz */ |
| 134731 | VR512, VK8WM, VR512, i64mem, |
| 134732 | /* VPSUBQZrmk */ |
| 134733 | VR512, VR512, VK8WM, VR512, i512mem, |
| 134734 | /* VPSUBQZrmkz */ |
| 134735 | VR512, VK8WM, VR512, i512mem, |
| 134736 | /* VPSUBQZrr */ |
| 134737 | VR512, VR512, VR512, |
| 134738 | /* VPSUBQZrrk */ |
| 134739 | VR512, VR512, VK8WM, VR512, VR512, |
| 134740 | /* VPSUBQZrrkz */ |
| 134741 | VR512, VK8WM, VR512, VR512, |
| 134742 | /* VPSUBQrm */ |
| 134743 | VR128, VR128, i128mem, |
| 134744 | /* VPSUBQrr */ |
| 134745 | VR128, VR128, VR128, |
| 134746 | /* VPSUBSBYrm */ |
| 134747 | VR256, VR256, i256mem, |
| 134748 | /* VPSUBSBYrr */ |
| 134749 | VR256, VR256, VR256, |
| 134750 | /* VPSUBSBZ128rm */ |
| 134751 | VR128X, VR128X, i128mem, |
| 134752 | /* VPSUBSBZ128rmk */ |
| 134753 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 134754 | /* VPSUBSBZ128rmkz */ |
| 134755 | VR128X, VK16WM, VR128X, i128mem, |
| 134756 | /* VPSUBSBZ128rr */ |
| 134757 | VR128X, VR128X, VR128X, |
| 134758 | /* VPSUBSBZ128rrk */ |
| 134759 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 134760 | /* VPSUBSBZ128rrkz */ |
| 134761 | VR128X, VK16WM, VR128X, VR128X, |
| 134762 | /* VPSUBSBZ256rm */ |
| 134763 | VR256X, VR256X, i256mem, |
| 134764 | /* VPSUBSBZ256rmk */ |
| 134765 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 134766 | /* VPSUBSBZ256rmkz */ |
| 134767 | VR256X, VK32WM, VR256X, i256mem, |
| 134768 | /* VPSUBSBZ256rr */ |
| 134769 | VR256X, VR256X, VR256X, |
| 134770 | /* VPSUBSBZ256rrk */ |
| 134771 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 134772 | /* VPSUBSBZ256rrkz */ |
| 134773 | VR256X, VK32WM, VR256X, VR256X, |
| 134774 | /* VPSUBSBZrm */ |
| 134775 | VR512, VR512, i512mem, |
| 134776 | /* VPSUBSBZrmk */ |
| 134777 | VR512, VR512, VK64WM, VR512, i512mem, |
| 134778 | /* VPSUBSBZrmkz */ |
| 134779 | VR512, VK64WM, VR512, i512mem, |
| 134780 | /* VPSUBSBZrr */ |
| 134781 | VR512, VR512, VR512, |
| 134782 | /* VPSUBSBZrrk */ |
| 134783 | VR512, VR512, VK64WM, VR512, VR512, |
| 134784 | /* VPSUBSBZrrkz */ |
| 134785 | VR512, VK64WM, VR512, VR512, |
| 134786 | /* VPSUBSBrm */ |
| 134787 | VR128, VR128, i128mem, |
| 134788 | /* VPSUBSBrr */ |
| 134789 | VR128, VR128, VR128, |
| 134790 | /* VPSUBSWYrm */ |
| 134791 | VR256, VR256, i256mem, |
| 134792 | /* VPSUBSWYrr */ |
| 134793 | VR256, VR256, VR256, |
| 134794 | /* VPSUBSWZ128rm */ |
| 134795 | VR128X, VR128X, i128mem, |
| 134796 | /* VPSUBSWZ128rmk */ |
| 134797 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 134798 | /* VPSUBSWZ128rmkz */ |
| 134799 | VR128X, VK8WM, VR128X, i128mem, |
| 134800 | /* VPSUBSWZ128rr */ |
| 134801 | VR128X, VR128X, VR128X, |
| 134802 | /* VPSUBSWZ128rrk */ |
| 134803 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134804 | /* VPSUBSWZ128rrkz */ |
| 134805 | VR128X, VK8WM, VR128X, VR128X, |
| 134806 | /* VPSUBSWZ256rm */ |
| 134807 | VR256X, VR256X, i256mem, |
| 134808 | /* VPSUBSWZ256rmk */ |
| 134809 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 134810 | /* VPSUBSWZ256rmkz */ |
| 134811 | VR256X, VK16WM, VR256X, i256mem, |
| 134812 | /* VPSUBSWZ256rr */ |
| 134813 | VR256X, VR256X, VR256X, |
| 134814 | /* VPSUBSWZ256rrk */ |
| 134815 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 134816 | /* VPSUBSWZ256rrkz */ |
| 134817 | VR256X, VK16WM, VR256X, VR256X, |
| 134818 | /* VPSUBSWZrm */ |
| 134819 | VR512, VR512, i512mem, |
| 134820 | /* VPSUBSWZrmk */ |
| 134821 | VR512, VR512, VK32WM, VR512, i512mem, |
| 134822 | /* VPSUBSWZrmkz */ |
| 134823 | VR512, VK32WM, VR512, i512mem, |
| 134824 | /* VPSUBSWZrr */ |
| 134825 | VR512, VR512, VR512, |
| 134826 | /* VPSUBSWZrrk */ |
| 134827 | VR512, VR512, VK32WM, VR512, VR512, |
| 134828 | /* VPSUBSWZrrkz */ |
| 134829 | VR512, VK32WM, VR512, VR512, |
| 134830 | /* VPSUBSWrm */ |
| 134831 | VR128, VR128, i128mem, |
| 134832 | /* VPSUBSWrr */ |
| 134833 | VR128, VR128, VR128, |
| 134834 | /* VPSUBUSBYrm */ |
| 134835 | VR256, VR256, i256mem, |
| 134836 | /* VPSUBUSBYrr */ |
| 134837 | VR256, VR256, VR256, |
| 134838 | /* VPSUBUSBZ128rm */ |
| 134839 | VR128X, VR128X, i128mem, |
| 134840 | /* VPSUBUSBZ128rmk */ |
| 134841 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 134842 | /* VPSUBUSBZ128rmkz */ |
| 134843 | VR128X, VK16WM, VR128X, i128mem, |
| 134844 | /* VPSUBUSBZ128rr */ |
| 134845 | VR128X, VR128X, VR128X, |
| 134846 | /* VPSUBUSBZ128rrk */ |
| 134847 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 134848 | /* VPSUBUSBZ128rrkz */ |
| 134849 | VR128X, VK16WM, VR128X, VR128X, |
| 134850 | /* VPSUBUSBZ256rm */ |
| 134851 | VR256X, VR256X, i256mem, |
| 134852 | /* VPSUBUSBZ256rmk */ |
| 134853 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 134854 | /* VPSUBUSBZ256rmkz */ |
| 134855 | VR256X, VK32WM, VR256X, i256mem, |
| 134856 | /* VPSUBUSBZ256rr */ |
| 134857 | VR256X, VR256X, VR256X, |
| 134858 | /* VPSUBUSBZ256rrk */ |
| 134859 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 134860 | /* VPSUBUSBZ256rrkz */ |
| 134861 | VR256X, VK32WM, VR256X, VR256X, |
| 134862 | /* VPSUBUSBZrm */ |
| 134863 | VR512, VR512, i512mem, |
| 134864 | /* VPSUBUSBZrmk */ |
| 134865 | VR512, VR512, VK64WM, VR512, i512mem, |
| 134866 | /* VPSUBUSBZrmkz */ |
| 134867 | VR512, VK64WM, VR512, i512mem, |
| 134868 | /* VPSUBUSBZrr */ |
| 134869 | VR512, VR512, VR512, |
| 134870 | /* VPSUBUSBZrrk */ |
| 134871 | VR512, VR512, VK64WM, VR512, VR512, |
| 134872 | /* VPSUBUSBZrrkz */ |
| 134873 | VR512, VK64WM, VR512, VR512, |
| 134874 | /* VPSUBUSBrm */ |
| 134875 | VR128, VR128, i128mem, |
| 134876 | /* VPSUBUSBrr */ |
| 134877 | VR128, VR128, VR128, |
| 134878 | /* VPSUBUSWYrm */ |
| 134879 | VR256, VR256, i256mem, |
| 134880 | /* VPSUBUSWYrr */ |
| 134881 | VR256, VR256, VR256, |
| 134882 | /* VPSUBUSWZ128rm */ |
| 134883 | VR128X, VR128X, i128mem, |
| 134884 | /* VPSUBUSWZ128rmk */ |
| 134885 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 134886 | /* VPSUBUSWZ128rmkz */ |
| 134887 | VR128X, VK8WM, VR128X, i128mem, |
| 134888 | /* VPSUBUSWZ128rr */ |
| 134889 | VR128X, VR128X, VR128X, |
| 134890 | /* VPSUBUSWZ128rrk */ |
| 134891 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134892 | /* VPSUBUSWZ128rrkz */ |
| 134893 | VR128X, VK8WM, VR128X, VR128X, |
| 134894 | /* VPSUBUSWZ256rm */ |
| 134895 | VR256X, VR256X, i256mem, |
| 134896 | /* VPSUBUSWZ256rmk */ |
| 134897 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 134898 | /* VPSUBUSWZ256rmkz */ |
| 134899 | VR256X, VK16WM, VR256X, i256mem, |
| 134900 | /* VPSUBUSWZ256rr */ |
| 134901 | VR256X, VR256X, VR256X, |
| 134902 | /* VPSUBUSWZ256rrk */ |
| 134903 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 134904 | /* VPSUBUSWZ256rrkz */ |
| 134905 | VR256X, VK16WM, VR256X, VR256X, |
| 134906 | /* VPSUBUSWZrm */ |
| 134907 | VR512, VR512, i512mem, |
| 134908 | /* VPSUBUSWZrmk */ |
| 134909 | VR512, VR512, VK32WM, VR512, i512mem, |
| 134910 | /* VPSUBUSWZrmkz */ |
| 134911 | VR512, VK32WM, VR512, i512mem, |
| 134912 | /* VPSUBUSWZrr */ |
| 134913 | VR512, VR512, VR512, |
| 134914 | /* VPSUBUSWZrrk */ |
| 134915 | VR512, VR512, VK32WM, VR512, VR512, |
| 134916 | /* VPSUBUSWZrrkz */ |
| 134917 | VR512, VK32WM, VR512, VR512, |
| 134918 | /* VPSUBUSWrm */ |
| 134919 | VR128, VR128, i128mem, |
| 134920 | /* VPSUBUSWrr */ |
| 134921 | VR128, VR128, VR128, |
| 134922 | /* VPSUBWYrm */ |
| 134923 | VR256, VR256, i256mem, |
| 134924 | /* VPSUBWYrr */ |
| 134925 | VR256, VR256, VR256, |
| 134926 | /* VPSUBWZ128rm */ |
| 134927 | VR128X, VR128X, i128mem, |
| 134928 | /* VPSUBWZ128rmk */ |
| 134929 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 134930 | /* VPSUBWZ128rmkz */ |
| 134931 | VR128X, VK8WM, VR128X, i128mem, |
| 134932 | /* VPSUBWZ128rr */ |
| 134933 | VR128X, VR128X, VR128X, |
| 134934 | /* VPSUBWZ128rrk */ |
| 134935 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134936 | /* VPSUBWZ128rrkz */ |
| 134937 | VR128X, VK8WM, VR128X, VR128X, |
| 134938 | /* VPSUBWZ256rm */ |
| 134939 | VR256X, VR256X, i256mem, |
| 134940 | /* VPSUBWZ256rmk */ |
| 134941 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 134942 | /* VPSUBWZ256rmkz */ |
| 134943 | VR256X, VK16WM, VR256X, i256mem, |
| 134944 | /* VPSUBWZ256rr */ |
| 134945 | VR256X, VR256X, VR256X, |
| 134946 | /* VPSUBWZ256rrk */ |
| 134947 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 134948 | /* VPSUBWZ256rrkz */ |
| 134949 | VR256X, VK16WM, VR256X, VR256X, |
| 134950 | /* VPSUBWZrm */ |
| 134951 | VR512, VR512, i512mem, |
| 134952 | /* VPSUBWZrmk */ |
| 134953 | VR512, VR512, VK32WM, VR512, i512mem, |
| 134954 | /* VPSUBWZrmkz */ |
| 134955 | VR512, VK32WM, VR512, i512mem, |
| 134956 | /* VPSUBWZrr */ |
| 134957 | VR512, VR512, VR512, |
| 134958 | /* VPSUBWZrrk */ |
| 134959 | VR512, VR512, VK32WM, VR512, VR512, |
| 134960 | /* VPSUBWZrrkz */ |
| 134961 | VR512, VK32WM, VR512, VR512, |
| 134962 | /* VPSUBWrm */ |
| 134963 | VR128, VR128, i128mem, |
| 134964 | /* VPSUBWrr */ |
| 134965 | VR128, VR128, VR128, |
| 134966 | /* VPTERNLOGDZ128rmbi */ |
| 134967 | VR128X, VR128X, VR128X, i32mem, u8imm, |
| 134968 | /* VPTERNLOGDZ128rmbik */ |
| 134969 | VR128X, VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 134970 | /* VPTERNLOGDZ128rmbikz */ |
| 134971 | VR128X, VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 134972 | /* VPTERNLOGDZ128rmi */ |
| 134973 | VR128X, VR128X, VR128X, i128mem, u8imm, |
| 134974 | /* VPTERNLOGDZ128rmik */ |
| 134975 | VR128X, VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 134976 | /* VPTERNLOGDZ128rmikz */ |
| 134977 | VR128X, VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 134978 | /* VPTERNLOGDZ128rri */ |
| 134979 | VR128X, VR128X, VR128X, VR128X, u8imm, |
| 134980 | /* VPTERNLOGDZ128rrik */ |
| 134981 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 134982 | /* VPTERNLOGDZ128rrikz */ |
| 134983 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 134984 | /* VPTERNLOGDZ256rmbi */ |
| 134985 | VR256X, VR256X, VR256X, i32mem, u8imm, |
| 134986 | /* VPTERNLOGDZ256rmbik */ |
| 134987 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 134988 | /* VPTERNLOGDZ256rmbikz */ |
| 134989 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 134990 | /* VPTERNLOGDZ256rmi */ |
| 134991 | VR256X, VR256X, VR256X, i256mem, u8imm, |
| 134992 | /* VPTERNLOGDZ256rmik */ |
| 134993 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 134994 | /* VPTERNLOGDZ256rmikz */ |
| 134995 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 134996 | /* VPTERNLOGDZ256rri */ |
| 134997 | VR256X, VR256X, VR256X, VR256X, u8imm, |
| 134998 | /* VPTERNLOGDZ256rrik */ |
| 134999 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 135000 | /* VPTERNLOGDZ256rrikz */ |
| 135001 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 135002 | /* VPTERNLOGDZrmbi */ |
| 135003 | VR512, VR512, VR512, i32mem, u8imm, |
| 135004 | /* VPTERNLOGDZrmbik */ |
| 135005 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 135006 | /* VPTERNLOGDZrmbikz */ |
| 135007 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 135008 | /* VPTERNLOGDZrmi */ |
| 135009 | VR512, VR512, VR512, i512mem, u8imm, |
| 135010 | /* VPTERNLOGDZrmik */ |
| 135011 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 135012 | /* VPTERNLOGDZrmikz */ |
| 135013 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 135014 | /* VPTERNLOGDZrri */ |
| 135015 | VR512, VR512, VR512, VR512, u8imm, |
| 135016 | /* VPTERNLOGDZrrik */ |
| 135017 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 135018 | /* VPTERNLOGDZrrikz */ |
| 135019 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 135020 | /* VPTERNLOGQZ128rmbi */ |
| 135021 | VR128X, VR128X, VR128X, i64mem, u8imm, |
| 135022 | /* VPTERNLOGQZ128rmbik */ |
| 135023 | VR128X, VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 135024 | /* VPTERNLOGQZ128rmbikz */ |
| 135025 | VR128X, VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 135026 | /* VPTERNLOGQZ128rmi */ |
| 135027 | VR128X, VR128X, VR128X, i128mem, u8imm, |
| 135028 | /* VPTERNLOGQZ128rmik */ |
| 135029 | VR128X, VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 135030 | /* VPTERNLOGQZ128rmikz */ |
| 135031 | VR128X, VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 135032 | /* VPTERNLOGQZ128rri */ |
| 135033 | VR128X, VR128X, VR128X, VR128X, u8imm, |
| 135034 | /* VPTERNLOGQZ128rrik */ |
| 135035 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 135036 | /* VPTERNLOGQZ128rrikz */ |
| 135037 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 135038 | /* VPTERNLOGQZ256rmbi */ |
| 135039 | VR256X, VR256X, VR256X, i64mem, u8imm, |
| 135040 | /* VPTERNLOGQZ256rmbik */ |
| 135041 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 135042 | /* VPTERNLOGQZ256rmbikz */ |
| 135043 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 135044 | /* VPTERNLOGQZ256rmi */ |
| 135045 | VR256X, VR256X, VR256X, i256mem, u8imm, |
| 135046 | /* VPTERNLOGQZ256rmik */ |
| 135047 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 135048 | /* VPTERNLOGQZ256rmikz */ |
| 135049 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 135050 | /* VPTERNLOGQZ256rri */ |
| 135051 | VR256X, VR256X, VR256X, VR256X, u8imm, |
| 135052 | /* VPTERNLOGQZ256rrik */ |
| 135053 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 135054 | /* VPTERNLOGQZ256rrikz */ |
| 135055 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 135056 | /* VPTERNLOGQZrmbi */ |
| 135057 | VR512, VR512, VR512, i64mem, u8imm, |
| 135058 | /* VPTERNLOGQZrmbik */ |
| 135059 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 135060 | /* VPTERNLOGQZrmbikz */ |
| 135061 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 135062 | /* VPTERNLOGQZrmi */ |
| 135063 | VR512, VR512, VR512, i512mem, u8imm, |
| 135064 | /* VPTERNLOGQZrmik */ |
| 135065 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 135066 | /* VPTERNLOGQZrmikz */ |
| 135067 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 135068 | /* VPTERNLOGQZrri */ |
| 135069 | VR512, VR512, VR512, VR512, u8imm, |
| 135070 | /* VPTERNLOGQZrrik */ |
| 135071 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 135072 | /* VPTERNLOGQZrrikz */ |
| 135073 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 135074 | /* VPTESTMBZ128rm */ |
| 135075 | VK16, VR128X, i128mem, |
| 135076 | /* VPTESTMBZ128rmk */ |
| 135077 | VK16, VK16WM, VR128X, i128mem, |
| 135078 | /* VPTESTMBZ128rr */ |
| 135079 | VK16, VR128X, VR128X, |
| 135080 | /* VPTESTMBZ128rrk */ |
| 135081 | VK16, VK16WM, VR128X, VR128X, |
| 135082 | /* VPTESTMBZ256rm */ |
| 135083 | VK32, VR256X, i256mem, |
| 135084 | /* VPTESTMBZ256rmk */ |
| 135085 | VK32, VK32WM, VR256X, i256mem, |
| 135086 | /* VPTESTMBZ256rr */ |
| 135087 | VK32, VR256X, VR256X, |
| 135088 | /* VPTESTMBZ256rrk */ |
| 135089 | VK32, VK32WM, VR256X, VR256X, |
| 135090 | /* VPTESTMBZrm */ |
| 135091 | VK64, VR512, i512mem, |
| 135092 | /* VPTESTMBZrmk */ |
| 135093 | VK64, VK64WM, VR512, i512mem, |
| 135094 | /* VPTESTMBZrr */ |
| 135095 | VK64, VR512, VR512, |
| 135096 | /* VPTESTMBZrrk */ |
| 135097 | VK64, VK64WM, VR512, VR512, |
| 135098 | /* VPTESTMDZ128rm */ |
| 135099 | VK4, VR128X, i128mem, |
| 135100 | /* VPTESTMDZ128rmb */ |
| 135101 | VK4, VR128X, i32mem, |
| 135102 | /* VPTESTMDZ128rmbk */ |
| 135103 | VK4, VK4WM, VR128X, i32mem, |
| 135104 | /* VPTESTMDZ128rmk */ |
| 135105 | VK4, VK4WM, VR128X, i128mem, |
| 135106 | /* VPTESTMDZ128rr */ |
| 135107 | VK4, VR128X, VR128X, |
| 135108 | /* VPTESTMDZ128rrk */ |
| 135109 | VK4, VK4WM, VR128X, VR128X, |
| 135110 | /* VPTESTMDZ256rm */ |
| 135111 | VK8, VR256X, i256mem, |
| 135112 | /* VPTESTMDZ256rmb */ |
| 135113 | VK8, VR256X, i32mem, |
| 135114 | /* VPTESTMDZ256rmbk */ |
| 135115 | VK8, VK8WM, VR256X, i32mem, |
| 135116 | /* VPTESTMDZ256rmk */ |
| 135117 | VK8, VK8WM, VR256X, i256mem, |
| 135118 | /* VPTESTMDZ256rr */ |
| 135119 | VK8, VR256X, VR256X, |
| 135120 | /* VPTESTMDZ256rrk */ |
| 135121 | VK8, VK8WM, VR256X, VR256X, |
| 135122 | /* VPTESTMDZrm */ |
| 135123 | VK16, VR512, i512mem, |
| 135124 | /* VPTESTMDZrmb */ |
| 135125 | VK16, VR512, i32mem, |
| 135126 | /* VPTESTMDZrmbk */ |
| 135127 | VK16, VK16WM, VR512, i32mem, |
| 135128 | /* VPTESTMDZrmk */ |
| 135129 | VK16, VK16WM, VR512, i512mem, |
| 135130 | /* VPTESTMDZrr */ |
| 135131 | VK16, VR512, VR512, |
| 135132 | /* VPTESTMDZrrk */ |
| 135133 | VK16, VK16WM, VR512, VR512, |
| 135134 | /* VPTESTMQZ128rm */ |
| 135135 | VK2, VR128X, i128mem, |
| 135136 | /* VPTESTMQZ128rmb */ |
| 135137 | VK2, VR128X, i64mem, |
| 135138 | /* VPTESTMQZ128rmbk */ |
| 135139 | VK2, VK2WM, VR128X, i64mem, |
| 135140 | /* VPTESTMQZ128rmk */ |
| 135141 | VK2, VK2WM, VR128X, i128mem, |
| 135142 | /* VPTESTMQZ128rr */ |
| 135143 | VK2, VR128X, VR128X, |
| 135144 | /* VPTESTMQZ128rrk */ |
| 135145 | VK2, VK2WM, VR128X, VR128X, |
| 135146 | /* VPTESTMQZ256rm */ |
| 135147 | VK4, VR256X, i256mem, |
| 135148 | /* VPTESTMQZ256rmb */ |
| 135149 | VK4, VR256X, i64mem, |
| 135150 | /* VPTESTMQZ256rmbk */ |
| 135151 | VK4, VK4WM, VR256X, i64mem, |
| 135152 | /* VPTESTMQZ256rmk */ |
| 135153 | VK4, VK4WM, VR256X, i256mem, |
| 135154 | /* VPTESTMQZ256rr */ |
| 135155 | VK4, VR256X, VR256X, |
| 135156 | /* VPTESTMQZ256rrk */ |
| 135157 | VK4, VK4WM, VR256X, VR256X, |
| 135158 | /* VPTESTMQZrm */ |
| 135159 | VK8, VR512, i512mem, |
| 135160 | /* VPTESTMQZrmb */ |
| 135161 | VK8, VR512, i64mem, |
| 135162 | /* VPTESTMQZrmbk */ |
| 135163 | VK8, VK8WM, VR512, i64mem, |
| 135164 | /* VPTESTMQZrmk */ |
| 135165 | VK8, VK8WM, VR512, i512mem, |
| 135166 | /* VPTESTMQZrr */ |
| 135167 | VK8, VR512, VR512, |
| 135168 | /* VPTESTMQZrrk */ |
| 135169 | VK8, VK8WM, VR512, VR512, |
| 135170 | /* VPTESTMWZ128rm */ |
| 135171 | VK8, VR128X, i128mem, |
| 135172 | /* VPTESTMWZ128rmk */ |
| 135173 | VK8, VK8WM, VR128X, i128mem, |
| 135174 | /* VPTESTMWZ128rr */ |
| 135175 | VK8, VR128X, VR128X, |
| 135176 | /* VPTESTMWZ128rrk */ |
| 135177 | VK8, VK8WM, VR128X, VR128X, |
| 135178 | /* VPTESTMWZ256rm */ |
| 135179 | VK16, VR256X, i256mem, |
| 135180 | /* VPTESTMWZ256rmk */ |
| 135181 | VK16, VK16WM, VR256X, i256mem, |
| 135182 | /* VPTESTMWZ256rr */ |
| 135183 | VK16, VR256X, VR256X, |
| 135184 | /* VPTESTMWZ256rrk */ |
| 135185 | VK16, VK16WM, VR256X, VR256X, |
| 135186 | /* VPTESTMWZrm */ |
| 135187 | VK32, VR512, i512mem, |
| 135188 | /* VPTESTMWZrmk */ |
| 135189 | VK32, VK32WM, VR512, i512mem, |
| 135190 | /* VPTESTMWZrr */ |
| 135191 | VK32, VR512, VR512, |
| 135192 | /* VPTESTMWZrrk */ |
| 135193 | VK32, VK32WM, VR512, VR512, |
| 135194 | /* VPTESTNMBZ128rm */ |
| 135195 | VK16, VR128X, i128mem, |
| 135196 | /* VPTESTNMBZ128rmk */ |
| 135197 | VK16, VK16WM, VR128X, i128mem, |
| 135198 | /* VPTESTNMBZ128rr */ |
| 135199 | VK16, VR128X, VR128X, |
| 135200 | /* VPTESTNMBZ128rrk */ |
| 135201 | VK16, VK16WM, VR128X, VR128X, |
| 135202 | /* VPTESTNMBZ256rm */ |
| 135203 | VK32, VR256X, i256mem, |
| 135204 | /* VPTESTNMBZ256rmk */ |
| 135205 | VK32, VK32WM, VR256X, i256mem, |
| 135206 | /* VPTESTNMBZ256rr */ |
| 135207 | VK32, VR256X, VR256X, |
| 135208 | /* VPTESTNMBZ256rrk */ |
| 135209 | VK32, VK32WM, VR256X, VR256X, |
| 135210 | /* VPTESTNMBZrm */ |
| 135211 | VK64, VR512, i512mem, |
| 135212 | /* VPTESTNMBZrmk */ |
| 135213 | VK64, VK64WM, VR512, i512mem, |
| 135214 | /* VPTESTNMBZrr */ |
| 135215 | VK64, VR512, VR512, |
| 135216 | /* VPTESTNMBZrrk */ |
| 135217 | VK64, VK64WM, VR512, VR512, |
| 135218 | /* VPTESTNMDZ128rm */ |
| 135219 | VK4, VR128X, i128mem, |
| 135220 | /* VPTESTNMDZ128rmb */ |
| 135221 | VK4, VR128X, i32mem, |
| 135222 | /* VPTESTNMDZ128rmbk */ |
| 135223 | VK4, VK4WM, VR128X, i32mem, |
| 135224 | /* VPTESTNMDZ128rmk */ |
| 135225 | VK4, VK4WM, VR128X, i128mem, |
| 135226 | /* VPTESTNMDZ128rr */ |
| 135227 | VK4, VR128X, VR128X, |
| 135228 | /* VPTESTNMDZ128rrk */ |
| 135229 | VK4, VK4WM, VR128X, VR128X, |
| 135230 | /* VPTESTNMDZ256rm */ |
| 135231 | VK8, VR256X, i256mem, |
| 135232 | /* VPTESTNMDZ256rmb */ |
| 135233 | VK8, VR256X, i32mem, |
| 135234 | /* VPTESTNMDZ256rmbk */ |
| 135235 | VK8, VK8WM, VR256X, i32mem, |
| 135236 | /* VPTESTNMDZ256rmk */ |
| 135237 | VK8, VK8WM, VR256X, i256mem, |
| 135238 | /* VPTESTNMDZ256rr */ |
| 135239 | VK8, VR256X, VR256X, |
| 135240 | /* VPTESTNMDZ256rrk */ |
| 135241 | VK8, VK8WM, VR256X, VR256X, |
| 135242 | /* VPTESTNMDZrm */ |
| 135243 | VK16, VR512, i512mem, |
| 135244 | /* VPTESTNMDZrmb */ |
| 135245 | VK16, VR512, i32mem, |
| 135246 | /* VPTESTNMDZrmbk */ |
| 135247 | VK16, VK16WM, VR512, i32mem, |
| 135248 | /* VPTESTNMDZrmk */ |
| 135249 | VK16, VK16WM, VR512, i512mem, |
| 135250 | /* VPTESTNMDZrr */ |
| 135251 | VK16, VR512, VR512, |
| 135252 | /* VPTESTNMDZrrk */ |
| 135253 | VK16, VK16WM, VR512, VR512, |
| 135254 | /* VPTESTNMQZ128rm */ |
| 135255 | VK2, VR128X, i128mem, |
| 135256 | /* VPTESTNMQZ128rmb */ |
| 135257 | VK2, VR128X, i64mem, |
| 135258 | /* VPTESTNMQZ128rmbk */ |
| 135259 | VK2, VK2WM, VR128X, i64mem, |
| 135260 | /* VPTESTNMQZ128rmk */ |
| 135261 | VK2, VK2WM, VR128X, i128mem, |
| 135262 | /* VPTESTNMQZ128rr */ |
| 135263 | VK2, VR128X, VR128X, |
| 135264 | /* VPTESTNMQZ128rrk */ |
| 135265 | VK2, VK2WM, VR128X, VR128X, |
| 135266 | /* VPTESTNMQZ256rm */ |
| 135267 | VK4, VR256X, i256mem, |
| 135268 | /* VPTESTNMQZ256rmb */ |
| 135269 | VK4, VR256X, i64mem, |
| 135270 | /* VPTESTNMQZ256rmbk */ |
| 135271 | VK4, VK4WM, VR256X, i64mem, |
| 135272 | /* VPTESTNMQZ256rmk */ |
| 135273 | VK4, VK4WM, VR256X, i256mem, |
| 135274 | /* VPTESTNMQZ256rr */ |
| 135275 | VK4, VR256X, VR256X, |
| 135276 | /* VPTESTNMQZ256rrk */ |
| 135277 | VK4, VK4WM, VR256X, VR256X, |
| 135278 | /* VPTESTNMQZrm */ |
| 135279 | VK8, VR512, i512mem, |
| 135280 | /* VPTESTNMQZrmb */ |
| 135281 | VK8, VR512, i64mem, |
| 135282 | /* VPTESTNMQZrmbk */ |
| 135283 | VK8, VK8WM, VR512, i64mem, |
| 135284 | /* VPTESTNMQZrmk */ |
| 135285 | VK8, VK8WM, VR512, i512mem, |
| 135286 | /* VPTESTNMQZrr */ |
| 135287 | VK8, VR512, VR512, |
| 135288 | /* VPTESTNMQZrrk */ |
| 135289 | VK8, VK8WM, VR512, VR512, |
| 135290 | /* VPTESTNMWZ128rm */ |
| 135291 | VK8, VR128X, i128mem, |
| 135292 | /* VPTESTNMWZ128rmk */ |
| 135293 | VK8, VK8WM, VR128X, i128mem, |
| 135294 | /* VPTESTNMWZ128rr */ |
| 135295 | VK8, VR128X, VR128X, |
| 135296 | /* VPTESTNMWZ128rrk */ |
| 135297 | VK8, VK8WM, VR128X, VR128X, |
| 135298 | /* VPTESTNMWZ256rm */ |
| 135299 | VK16, VR256X, i256mem, |
| 135300 | /* VPTESTNMWZ256rmk */ |
| 135301 | VK16, VK16WM, VR256X, i256mem, |
| 135302 | /* VPTESTNMWZ256rr */ |
| 135303 | VK16, VR256X, VR256X, |
| 135304 | /* VPTESTNMWZ256rrk */ |
| 135305 | VK16, VK16WM, VR256X, VR256X, |
| 135306 | /* VPTESTNMWZrm */ |
| 135307 | VK32, VR512, i512mem, |
| 135308 | /* VPTESTNMWZrmk */ |
| 135309 | VK32, VK32WM, VR512, i512mem, |
| 135310 | /* VPTESTNMWZrr */ |
| 135311 | VK32, VR512, VR512, |
| 135312 | /* VPTESTNMWZrrk */ |
| 135313 | VK32, VK32WM, VR512, VR512, |
| 135314 | /* VPTESTYrm */ |
| 135315 | VR256, i256mem, |
| 135316 | /* VPTESTYrr */ |
| 135317 | VR256, VR256, |
| 135318 | /* VPTESTrm */ |
| 135319 | VR128, f128mem, |
| 135320 | /* VPTESTrr */ |
| 135321 | VR128, VR128, |
| 135322 | /* VPUNPCKHBWYrm */ |
| 135323 | VR256, VR256, i256mem, |
| 135324 | /* VPUNPCKHBWYrr */ |
| 135325 | VR256, VR256, VR256, |
| 135326 | /* VPUNPCKHBWZ128rm */ |
| 135327 | VR128X, VR128X, i128mem, |
| 135328 | /* VPUNPCKHBWZ128rmk */ |
| 135329 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 135330 | /* VPUNPCKHBWZ128rmkz */ |
| 135331 | VR128X, VK16WM, VR128X, i128mem, |
| 135332 | /* VPUNPCKHBWZ128rr */ |
| 135333 | VR128X, VR128X, VR128X, |
| 135334 | /* VPUNPCKHBWZ128rrk */ |
| 135335 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 135336 | /* VPUNPCKHBWZ128rrkz */ |
| 135337 | VR128X, VK16WM, VR128X, VR128X, |
| 135338 | /* VPUNPCKHBWZ256rm */ |
| 135339 | VR256X, VR256X, i256mem, |
| 135340 | /* VPUNPCKHBWZ256rmk */ |
| 135341 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 135342 | /* VPUNPCKHBWZ256rmkz */ |
| 135343 | VR256X, VK32WM, VR256X, i256mem, |
| 135344 | /* VPUNPCKHBWZ256rr */ |
| 135345 | VR256X, VR256X, VR256X, |
| 135346 | /* VPUNPCKHBWZ256rrk */ |
| 135347 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 135348 | /* VPUNPCKHBWZ256rrkz */ |
| 135349 | VR256X, VK32WM, VR256X, VR256X, |
| 135350 | /* VPUNPCKHBWZrm */ |
| 135351 | VR512, VR512, i512mem, |
| 135352 | /* VPUNPCKHBWZrmk */ |
| 135353 | VR512, VR512, VK64WM, VR512, i512mem, |
| 135354 | /* VPUNPCKHBWZrmkz */ |
| 135355 | VR512, VK64WM, VR512, i512mem, |
| 135356 | /* VPUNPCKHBWZrr */ |
| 135357 | VR512, VR512, VR512, |
| 135358 | /* VPUNPCKHBWZrrk */ |
| 135359 | VR512, VR512, VK64WM, VR512, VR512, |
| 135360 | /* VPUNPCKHBWZrrkz */ |
| 135361 | VR512, VK64WM, VR512, VR512, |
| 135362 | /* VPUNPCKHBWrm */ |
| 135363 | VR128, VR128, i128mem, |
| 135364 | /* VPUNPCKHBWrr */ |
| 135365 | VR128, VR128, VR128, |
| 135366 | /* VPUNPCKHDQYrm */ |
| 135367 | VR256, VR256, i256mem, |
| 135368 | /* VPUNPCKHDQYrr */ |
| 135369 | VR256, VR256, VR256, |
| 135370 | /* VPUNPCKHDQZ128rm */ |
| 135371 | VR128X, VR128X, i128mem, |
| 135372 | /* VPUNPCKHDQZ128rmb */ |
| 135373 | VR128X, VR128X, i32mem, |
| 135374 | /* VPUNPCKHDQZ128rmbk */ |
| 135375 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 135376 | /* VPUNPCKHDQZ128rmbkz */ |
| 135377 | VR128X, VK4WM, VR128X, i32mem, |
| 135378 | /* VPUNPCKHDQZ128rmk */ |
| 135379 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 135380 | /* VPUNPCKHDQZ128rmkz */ |
| 135381 | VR128X, VK4WM, VR128X, i128mem, |
| 135382 | /* VPUNPCKHDQZ128rr */ |
| 135383 | VR128X, VR128X, VR128X, |
| 135384 | /* VPUNPCKHDQZ128rrk */ |
| 135385 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 135386 | /* VPUNPCKHDQZ128rrkz */ |
| 135387 | VR128X, VK4WM, VR128X, VR128X, |
| 135388 | /* VPUNPCKHDQZ256rm */ |
| 135389 | VR256X, VR256X, i256mem, |
| 135390 | /* VPUNPCKHDQZ256rmb */ |
| 135391 | VR256X, VR256X, i32mem, |
| 135392 | /* VPUNPCKHDQZ256rmbk */ |
| 135393 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 135394 | /* VPUNPCKHDQZ256rmbkz */ |
| 135395 | VR256X, VK8WM, VR256X, i32mem, |
| 135396 | /* VPUNPCKHDQZ256rmk */ |
| 135397 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 135398 | /* VPUNPCKHDQZ256rmkz */ |
| 135399 | VR256X, VK8WM, VR256X, i256mem, |
| 135400 | /* VPUNPCKHDQZ256rr */ |
| 135401 | VR256X, VR256X, VR256X, |
| 135402 | /* VPUNPCKHDQZ256rrk */ |
| 135403 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 135404 | /* VPUNPCKHDQZ256rrkz */ |
| 135405 | VR256X, VK8WM, VR256X, VR256X, |
| 135406 | /* VPUNPCKHDQZrm */ |
| 135407 | VR512, VR512, i512mem, |
| 135408 | /* VPUNPCKHDQZrmb */ |
| 135409 | VR512, VR512, i32mem, |
| 135410 | /* VPUNPCKHDQZrmbk */ |
| 135411 | VR512, VR512, VK16WM, VR512, i32mem, |
| 135412 | /* VPUNPCKHDQZrmbkz */ |
| 135413 | VR512, VK16WM, VR512, i32mem, |
| 135414 | /* VPUNPCKHDQZrmk */ |
| 135415 | VR512, VR512, VK16WM, VR512, i512mem, |
| 135416 | /* VPUNPCKHDQZrmkz */ |
| 135417 | VR512, VK16WM, VR512, i512mem, |
| 135418 | /* VPUNPCKHDQZrr */ |
| 135419 | VR512, VR512, VR512, |
| 135420 | /* VPUNPCKHDQZrrk */ |
| 135421 | VR512, VR512, VK16WM, VR512, VR512, |
| 135422 | /* VPUNPCKHDQZrrkz */ |
| 135423 | VR512, VK16WM, VR512, VR512, |
| 135424 | /* VPUNPCKHDQrm */ |
| 135425 | VR128, VR128, i128mem, |
| 135426 | /* VPUNPCKHDQrr */ |
| 135427 | VR128, VR128, VR128, |
| 135428 | /* VPUNPCKHQDQYrm */ |
| 135429 | VR256, VR256, i256mem, |
| 135430 | /* VPUNPCKHQDQYrr */ |
| 135431 | VR256, VR256, VR256, |
| 135432 | /* VPUNPCKHQDQZ128rm */ |
| 135433 | VR128X, VR128X, i128mem, |
| 135434 | /* VPUNPCKHQDQZ128rmb */ |
| 135435 | VR128X, VR128X, i64mem, |
| 135436 | /* VPUNPCKHQDQZ128rmbk */ |
| 135437 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 135438 | /* VPUNPCKHQDQZ128rmbkz */ |
| 135439 | VR128X, VK2WM, VR128X, i64mem, |
| 135440 | /* VPUNPCKHQDQZ128rmk */ |
| 135441 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 135442 | /* VPUNPCKHQDQZ128rmkz */ |
| 135443 | VR128X, VK2WM, VR128X, i128mem, |
| 135444 | /* VPUNPCKHQDQZ128rr */ |
| 135445 | VR128X, VR128X, VR128X, |
| 135446 | /* VPUNPCKHQDQZ128rrk */ |
| 135447 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 135448 | /* VPUNPCKHQDQZ128rrkz */ |
| 135449 | VR128X, VK2WM, VR128X, VR128X, |
| 135450 | /* VPUNPCKHQDQZ256rm */ |
| 135451 | VR256X, VR256X, i256mem, |
| 135452 | /* VPUNPCKHQDQZ256rmb */ |
| 135453 | VR256X, VR256X, i64mem, |
| 135454 | /* VPUNPCKHQDQZ256rmbk */ |
| 135455 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 135456 | /* VPUNPCKHQDQZ256rmbkz */ |
| 135457 | VR256X, VK4WM, VR256X, i64mem, |
| 135458 | /* VPUNPCKHQDQZ256rmk */ |
| 135459 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 135460 | /* VPUNPCKHQDQZ256rmkz */ |
| 135461 | VR256X, VK4WM, VR256X, i256mem, |
| 135462 | /* VPUNPCKHQDQZ256rr */ |
| 135463 | VR256X, VR256X, VR256X, |
| 135464 | /* VPUNPCKHQDQZ256rrk */ |
| 135465 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 135466 | /* VPUNPCKHQDQZ256rrkz */ |
| 135467 | VR256X, VK4WM, VR256X, VR256X, |
| 135468 | /* VPUNPCKHQDQZrm */ |
| 135469 | VR512, VR512, i512mem, |
| 135470 | /* VPUNPCKHQDQZrmb */ |
| 135471 | VR512, VR512, i64mem, |
| 135472 | /* VPUNPCKHQDQZrmbk */ |
| 135473 | VR512, VR512, VK8WM, VR512, i64mem, |
| 135474 | /* VPUNPCKHQDQZrmbkz */ |
| 135475 | VR512, VK8WM, VR512, i64mem, |
| 135476 | /* VPUNPCKHQDQZrmk */ |
| 135477 | VR512, VR512, VK8WM, VR512, i512mem, |
| 135478 | /* VPUNPCKHQDQZrmkz */ |
| 135479 | VR512, VK8WM, VR512, i512mem, |
| 135480 | /* VPUNPCKHQDQZrr */ |
| 135481 | VR512, VR512, VR512, |
| 135482 | /* VPUNPCKHQDQZrrk */ |
| 135483 | VR512, VR512, VK8WM, VR512, VR512, |
| 135484 | /* VPUNPCKHQDQZrrkz */ |
| 135485 | VR512, VK8WM, VR512, VR512, |
| 135486 | /* VPUNPCKHQDQrm */ |
| 135487 | VR128, VR128, i128mem, |
| 135488 | /* VPUNPCKHQDQrr */ |
| 135489 | VR128, VR128, VR128, |
| 135490 | /* VPUNPCKHWDYrm */ |
| 135491 | VR256, VR256, i256mem, |
| 135492 | /* VPUNPCKHWDYrr */ |
| 135493 | VR256, VR256, VR256, |
| 135494 | /* VPUNPCKHWDZ128rm */ |
| 135495 | VR128X, VR128X, i128mem, |
| 135496 | /* VPUNPCKHWDZ128rmk */ |
| 135497 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 135498 | /* VPUNPCKHWDZ128rmkz */ |
| 135499 | VR128X, VK8WM, VR128X, i128mem, |
| 135500 | /* VPUNPCKHWDZ128rr */ |
| 135501 | VR128X, VR128X, VR128X, |
| 135502 | /* VPUNPCKHWDZ128rrk */ |
| 135503 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 135504 | /* VPUNPCKHWDZ128rrkz */ |
| 135505 | VR128X, VK8WM, VR128X, VR128X, |
| 135506 | /* VPUNPCKHWDZ256rm */ |
| 135507 | VR256X, VR256X, i256mem, |
| 135508 | /* VPUNPCKHWDZ256rmk */ |
| 135509 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 135510 | /* VPUNPCKHWDZ256rmkz */ |
| 135511 | VR256X, VK16WM, VR256X, i256mem, |
| 135512 | /* VPUNPCKHWDZ256rr */ |
| 135513 | VR256X, VR256X, VR256X, |
| 135514 | /* VPUNPCKHWDZ256rrk */ |
| 135515 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 135516 | /* VPUNPCKHWDZ256rrkz */ |
| 135517 | VR256X, VK16WM, VR256X, VR256X, |
| 135518 | /* VPUNPCKHWDZrm */ |
| 135519 | VR512, VR512, i512mem, |
| 135520 | /* VPUNPCKHWDZrmk */ |
| 135521 | VR512, VR512, VK32WM, VR512, i512mem, |
| 135522 | /* VPUNPCKHWDZrmkz */ |
| 135523 | VR512, VK32WM, VR512, i512mem, |
| 135524 | /* VPUNPCKHWDZrr */ |
| 135525 | VR512, VR512, VR512, |
| 135526 | /* VPUNPCKHWDZrrk */ |
| 135527 | VR512, VR512, VK32WM, VR512, VR512, |
| 135528 | /* VPUNPCKHWDZrrkz */ |
| 135529 | VR512, VK32WM, VR512, VR512, |
| 135530 | /* VPUNPCKHWDrm */ |
| 135531 | VR128, VR128, i128mem, |
| 135532 | /* VPUNPCKHWDrr */ |
| 135533 | VR128, VR128, VR128, |
| 135534 | /* VPUNPCKLBWYrm */ |
| 135535 | VR256, VR256, i256mem, |
| 135536 | /* VPUNPCKLBWYrr */ |
| 135537 | VR256, VR256, VR256, |
| 135538 | /* VPUNPCKLBWZ128rm */ |
| 135539 | VR128X, VR128X, i128mem, |
| 135540 | /* VPUNPCKLBWZ128rmk */ |
| 135541 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 135542 | /* VPUNPCKLBWZ128rmkz */ |
| 135543 | VR128X, VK16WM, VR128X, i128mem, |
| 135544 | /* VPUNPCKLBWZ128rr */ |
| 135545 | VR128X, VR128X, VR128X, |
| 135546 | /* VPUNPCKLBWZ128rrk */ |
| 135547 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 135548 | /* VPUNPCKLBWZ128rrkz */ |
| 135549 | VR128X, VK16WM, VR128X, VR128X, |
| 135550 | /* VPUNPCKLBWZ256rm */ |
| 135551 | VR256X, VR256X, i256mem, |
| 135552 | /* VPUNPCKLBWZ256rmk */ |
| 135553 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 135554 | /* VPUNPCKLBWZ256rmkz */ |
| 135555 | VR256X, VK32WM, VR256X, i256mem, |
| 135556 | /* VPUNPCKLBWZ256rr */ |
| 135557 | VR256X, VR256X, VR256X, |
| 135558 | /* VPUNPCKLBWZ256rrk */ |
| 135559 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 135560 | /* VPUNPCKLBWZ256rrkz */ |
| 135561 | VR256X, VK32WM, VR256X, VR256X, |
| 135562 | /* VPUNPCKLBWZrm */ |
| 135563 | VR512, VR512, i512mem, |
| 135564 | /* VPUNPCKLBWZrmk */ |
| 135565 | VR512, VR512, VK64WM, VR512, i512mem, |
| 135566 | /* VPUNPCKLBWZrmkz */ |
| 135567 | VR512, VK64WM, VR512, i512mem, |
| 135568 | /* VPUNPCKLBWZrr */ |
| 135569 | VR512, VR512, VR512, |
| 135570 | /* VPUNPCKLBWZrrk */ |
| 135571 | VR512, VR512, VK64WM, VR512, VR512, |
| 135572 | /* VPUNPCKLBWZrrkz */ |
| 135573 | VR512, VK64WM, VR512, VR512, |
| 135574 | /* VPUNPCKLBWrm */ |
| 135575 | VR128, VR128, i128mem, |
| 135576 | /* VPUNPCKLBWrr */ |
| 135577 | VR128, VR128, VR128, |
| 135578 | /* VPUNPCKLDQYrm */ |
| 135579 | VR256, VR256, i256mem, |
| 135580 | /* VPUNPCKLDQYrr */ |
| 135581 | VR256, VR256, VR256, |
| 135582 | /* VPUNPCKLDQZ128rm */ |
| 135583 | VR128X, VR128X, i128mem, |
| 135584 | /* VPUNPCKLDQZ128rmb */ |
| 135585 | VR128X, VR128X, i32mem, |
| 135586 | /* VPUNPCKLDQZ128rmbk */ |
| 135587 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 135588 | /* VPUNPCKLDQZ128rmbkz */ |
| 135589 | VR128X, VK4WM, VR128X, i32mem, |
| 135590 | /* VPUNPCKLDQZ128rmk */ |
| 135591 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 135592 | /* VPUNPCKLDQZ128rmkz */ |
| 135593 | VR128X, VK4WM, VR128X, i128mem, |
| 135594 | /* VPUNPCKLDQZ128rr */ |
| 135595 | VR128X, VR128X, VR128X, |
| 135596 | /* VPUNPCKLDQZ128rrk */ |
| 135597 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 135598 | /* VPUNPCKLDQZ128rrkz */ |
| 135599 | VR128X, VK4WM, VR128X, VR128X, |
| 135600 | /* VPUNPCKLDQZ256rm */ |
| 135601 | VR256X, VR256X, i256mem, |
| 135602 | /* VPUNPCKLDQZ256rmb */ |
| 135603 | VR256X, VR256X, i32mem, |
| 135604 | /* VPUNPCKLDQZ256rmbk */ |
| 135605 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 135606 | /* VPUNPCKLDQZ256rmbkz */ |
| 135607 | VR256X, VK8WM, VR256X, i32mem, |
| 135608 | /* VPUNPCKLDQZ256rmk */ |
| 135609 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 135610 | /* VPUNPCKLDQZ256rmkz */ |
| 135611 | VR256X, VK8WM, VR256X, i256mem, |
| 135612 | /* VPUNPCKLDQZ256rr */ |
| 135613 | VR256X, VR256X, VR256X, |
| 135614 | /* VPUNPCKLDQZ256rrk */ |
| 135615 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 135616 | /* VPUNPCKLDQZ256rrkz */ |
| 135617 | VR256X, VK8WM, VR256X, VR256X, |
| 135618 | /* VPUNPCKLDQZrm */ |
| 135619 | VR512, VR512, i512mem, |
| 135620 | /* VPUNPCKLDQZrmb */ |
| 135621 | VR512, VR512, i32mem, |
| 135622 | /* VPUNPCKLDQZrmbk */ |
| 135623 | VR512, VR512, VK16WM, VR512, i32mem, |
| 135624 | /* VPUNPCKLDQZrmbkz */ |
| 135625 | VR512, VK16WM, VR512, i32mem, |
| 135626 | /* VPUNPCKLDQZrmk */ |
| 135627 | VR512, VR512, VK16WM, VR512, i512mem, |
| 135628 | /* VPUNPCKLDQZrmkz */ |
| 135629 | VR512, VK16WM, VR512, i512mem, |
| 135630 | /* VPUNPCKLDQZrr */ |
| 135631 | VR512, VR512, VR512, |
| 135632 | /* VPUNPCKLDQZrrk */ |
| 135633 | VR512, VR512, VK16WM, VR512, VR512, |
| 135634 | /* VPUNPCKLDQZrrkz */ |
| 135635 | VR512, VK16WM, VR512, VR512, |
| 135636 | /* VPUNPCKLDQrm */ |
| 135637 | VR128, VR128, i128mem, |
| 135638 | /* VPUNPCKLDQrr */ |
| 135639 | VR128, VR128, VR128, |
| 135640 | /* VPUNPCKLQDQYrm */ |
| 135641 | VR256, VR256, i256mem, |
| 135642 | /* VPUNPCKLQDQYrr */ |
| 135643 | VR256, VR256, VR256, |
| 135644 | /* VPUNPCKLQDQZ128rm */ |
| 135645 | VR128X, VR128X, i128mem, |
| 135646 | /* VPUNPCKLQDQZ128rmb */ |
| 135647 | VR128X, VR128X, i64mem, |
| 135648 | /* VPUNPCKLQDQZ128rmbk */ |
| 135649 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 135650 | /* VPUNPCKLQDQZ128rmbkz */ |
| 135651 | VR128X, VK2WM, VR128X, i64mem, |
| 135652 | /* VPUNPCKLQDQZ128rmk */ |
| 135653 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 135654 | /* VPUNPCKLQDQZ128rmkz */ |
| 135655 | VR128X, VK2WM, VR128X, i128mem, |
| 135656 | /* VPUNPCKLQDQZ128rr */ |
| 135657 | VR128X, VR128X, VR128X, |
| 135658 | /* VPUNPCKLQDQZ128rrk */ |
| 135659 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 135660 | /* VPUNPCKLQDQZ128rrkz */ |
| 135661 | VR128X, VK2WM, VR128X, VR128X, |
| 135662 | /* VPUNPCKLQDQZ256rm */ |
| 135663 | VR256X, VR256X, i256mem, |
| 135664 | /* VPUNPCKLQDQZ256rmb */ |
| 135665 | VR256X, VR256X, i64mem, |
| 135666 | /* VPUNPCKLQDQZ256rmbk */ |
| 135667 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 135668 | /* VPUNPCKLQDQZ256rmbkz */ |
| 135669 | VR256X, VK4WM, VR256X, i64mem, |
| 135670 | /* VPUNPCKLQDQZ256rmk */ |
| 135671 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 135672 | /* VPUNPCKLQDQZ256rmkz */ |
| 135673 | VR256X, VK4WM, VR256X, i256mem, |
| 135674 | /* VPUNPCKLQDQZ256rr */ |
| 135675 | VR256X, VR256X, VR256X, |
| 135676 | /* VPUNPCKLQDQZ256rrk */ |
| 135677 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 135678 | /* VPUNPCKLQDQZ256rrkz */ |
| 135679 | VR256X, VK4WM, VR256X, VR256X, |
| 135680 | /* VPUNPCKLQDQZrm */ |
| 135681 | VR512, VR512, i512mem, |
| 135682 | /* VPUNPCKLQDQZrmb */ |
| 135683 | VR512, VR512, i64mem, |
| 135684 | /* VPUNPCKLQDQZrmbk */ |
| 135685 | VR512, VR512, VK8WM, VR512, i64mem, |
| 135686 | /* VPUNPCKLQDQZrmbkz */ |
| 135687 | VR512, VK8WM, VR512, i64mem, |
| 135688 | /* VPUNPCKLQDQZrmk */ |
| 135689 | VR512, VR512, VK8WM, VR512, i512mem, |
| 135690 | /* VPUNPCKLQDQZrmkz */ |
| 135691 | VR512, VK8WM, VR512, i512mem, |
| 135692 | /* VPUNPCKLQDQZrr */ |
| 135693 | VR512, VR512, VR512, |
| 135694 | /* VPUNPCKLQDQZrrk */ |
| 135695 | VR512, VR512, VK8WM, VR512, VR512, |
| 135696 | /* VPUNPCKLQDQZrrkz */ |
| 135697 | VR512, VK8WM, VR512, VR512, |
| 135698 | /* VPUNPCKLQDQrm */ |
| 135699 | VR128, VR128, i128mem, |
| 135700 | /* VPUNPCKLQDQrr */ |
| 135701 | VR128, VR128, VR128, |
| 135702 | /* VPUNPCKLWDYrm */ |
| 135703 | VR256, VR256, i256mem, |
| 135704 | /* VPUNPCKLWDYrr */ |
| 135705 | VR256, VR256, VR256, |
| 135706 | /* VPUNPCKLWDZ128rm */ |
| 135707 | VR128X, VR128X, i128mem, |
| 135708 | /* VPUNPCKLWDZ128rmk */ |
| 135709 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 135710 | /* VPUNPCKLWDZ128rmkz */ |
| 135711 | VR128X, VK8WM, VR128X, i128mem, |
| 135712 | /* VPUNPCKLWDZ128rr */ |
| 135713 | VR128X, VR128X, VR128X, |
| 135714 | /* VPUNPCKLWDZ128rrk */ |
| 135715 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 135716 | /* VPUNPCKLWDZ128rrkz */ |
| 135717 | VR128X, VK8WM, VR128X, VR128X, |
| 135718 | /* VPUNPCKLWDZ256rm */ |
| 135719 | VR256X, VR256X, i256mem, |
| 135720 | /* VPUNPCKLWDZ256rmk */ |
| 135721 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 135722 | /* VPUNPCKLWDZ256rmkz */ |
| 135723 | VR256X, VK16WM, VR256X, i256mem, |
| 135724 | /* VPUNPCKLWDZ256rr */ |
| 135725 | VR256X, VR256X, VR256X, |
| 135726 | /* VPUNPCKLWDZ256rrk */ |
| 135727 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 135728 | /* VPUNPCKLWDZ256rrkz */ |
| 135729 | VR256X, VK16WM, VR256X, VR256X, |
| 135730 | /* VPUNPCKLWDZrm */ |
| 135731 | VR512, VR512, i512mem, |
| 135732 | /* VPUNPCKLWDZrmk */ |
| 135733 | VR512, VR512, VK32WM, VR512, i512mem, |
| 135734 | /* VPUNPCKLWDZrmkz */ |
| 135735 | VR512, VK32WM, VR512, i512mem, |
| 135736 | /* VPUNPCKLWDZrr */ |
| 135737 | VR512, VR512, VR512, |
| 135738 | /* VPUNPCKLWDZrrk */ |
| 135739 | VR512, VR512, VK32WM, VR512, VR512, |
| 135740 | /* VPUNPCKLWDZrrkz */ |
| 135741 | VR512, VK32WM, VR512, VR512, |
| 135742 | /* VPUNPCKLWDrm */ |
| 135743 | VR128, VR128, i128mem, |
| 135744 | /* VPUNPCKLWDrr */ |
| 135745 | VR128, VR128, VR128, |
| 135746 | /* VPXORDZ128rm */ |
| 135747 | VR128X, VR128X, i128mem, |
| 135748 | /* VPXORDZ128rmb */ |
| 135749 | VR128X, VR128X, i32mem, |
| 135750 | /* VPXORDZ128rmbk */ |
| 135751 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 135752 | /* VPXORDZ128rmbkz */ |
| 135753 | VR128X, VK4WM, VR128X, i32mem, |
| 135754 | /* VPXORDZ128rmk */ |
| 135755 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 135756 | /* VPXORDZ128rmkz */ |
| 135757 | VR128X, VK4WM, VR128X, i128mem, |
| 135758 | /* VPXORDZ128rr */ |
| 135759 | VR128X, VR128X, VR128X, |
| 135760 | /* VPXORDZ128rrk */ |
| 135761 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 135762 | /* VPXORDZ128rrkz */ |
| 135763 | VR128X, VK4WM, VR128X, VR128X, |
| 135764 | /* VPXORDZ256rm */ |
| 135765 | VR256X, VR256X, i256mem, |
| 135766 | /* VPXORDZ256rmb */ |
| 135767 | VR256X, VR256X, i32mem, |
| 135768 | /* VPXORDZ256rmbk */ |
| 135769 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 135770 | /* VPXORDZ256rmbkz */ |
| 135771 | VR256X, VK8WM, VR256X, i32mem, |
| 135772 | /* VPXORDZ256rmk */ |
| 135773 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 135774 | /* VPXORDZ256rmkz */ |
| 135775 | VR256X, VK8WM, VR256X, i256mem, |
| 135776 | /* VPXORDZ256rr */ |
| 135777 | VR256X, VR256X, VR256X, |
| 135778 | /* VPXORDZ256rrk */ |
| 135779 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 135780 | /* VPXORDZ256rrkz */ |
| 135781 | VR256X, VK8WM, VR256X, VR256X, |
| 135782 | /* VPXORDZrm */ |
| 135783 | VR512, VR512, i512mem, |
| 135784 | /* VPXORDZrmb */ |
| 135785 | VR512, VR512, i32mem, |
| 135786 | /* VPXORDZrmbk */ |
| 135787 | VR512, VR512, VK16WM, VR512, i32mem, |
| 135788 | /* VPXORDZrmbkz */ |
| 135789 | VR512, VK16WM, VR512, i32mem, |
| 135790 | /* VPXORDZrmk */ |
| 135791 | VR512, VR512, VK16WM, VR512, i512mem, |
| 135792 | /* VPXORDZrmkz */ |
| 135793 | VR512, VK16WM, VR512, i512mem, |
| 135794 | /* VPXORDZrr */ |
| 135795 | VR512, VR512, VR512, |
| 135796 | /* VPXORDZrrk */ |
| 135797 | VR512, VR512, VK16WM, VR512, VR512, |
| 135798 | /* VPXORDZrrkz */ |
| 135799 | VR512, VK16WM, VR512, VR512, |
| 135800 | /* VPXORQZ128rm */ |
| 135801 | VR128X, VR128X, i128mem, |
| 135802 | /* VPXORQZ128rmb */ |
| 135803 | VR128X, VR128X, i64mem, |
| 135804 | /* VPXORQZ128rmbk */ |
| 135805 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 135806 | /* VPXORQZ128rmbkz */ |
| 135807 | VR128X, VK2WM, VR128X, i64mem, |
| 135808 | /* VPXORQZ128rmk */ |
| 135809 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 135810 | /* VPXORQZ128rmkz */ |
| 135811 | VR128X, VK2WM, VR128X, i128mem, |
| 135812 | /* VPXORQZ128rr */ |
| 135813 | VR128X, VR128X, VR128X, |
| 135814 | /* VPXORQZ128rrk */ |
| 135815 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 135816 | /* VPXORQZ128rrkz */ |
| 135817 | VR128X, VK2WM, VR128X, VR128X, |
| 135818 | /* VPXORQZ256rm */ |
| 135819 | VR256X, VR256X, i256mem, |
| 135820 | /* VPXORQZ256rmb */ |
| 135821 | VR256X, VR256X, i64mem, |
| 135822 | /* VPXORQZ256rmbk */ |
| 135823 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 135824 | /* VPXORQZ256rmbkz */ |
| 135825 | VR256X, VK4WM, VR256X, i64mem, |
| 135826 | /* VPXORQZ256rmk */ |
| 135827 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 135828 | /* VPXORQZ256rmkz */ |
| 135829 | VR256X, VK4WM, VR256X, i256mem, |
| 135830 | /* VPXORQZ256rr */ |
| 135831 | VR256X, VR256X, VR256X, |
| 135832 | /* VPXORQZ256rrk */ |
| 135833 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 135834 | /* VPXORQZ256rrkz */ |
| 135835 | VR256X, VK4WM, VR256X, VR256X, |
| 135836 | /* VPXORQZrm */ |
| 135837 | VR512, VR512, i512mem, |
| 135838 | /* VPXORQZrmb */ |
| 135839 | VR512, VR512, i64mem, |
| 135840 | /* VPXORQZrmbk */ |
| 135841 | VR512, VR512, VK8WM, VR512, i64mem, |
| 135842 | /* VPXORQZrmbkz */ |
| 135843 | VR512, VK8WM, VR512, i64mem, |
| 135844 | /* VPXORQZrmk */ |
| 135845 | VR512, VR512, VK8WM, VR512, i512mem, |
| 135846 | /* VPXORQZrmkz */ |
| 135847 | VR512, VK8WM, VR512, i512mem, |
| 135848 | /* VPXORQZrr */ |
| 135849 | VR512, VR512, VR512, |
| 135850 | /* VPXORQZrrk */ |
| 135851 | VR512, VR512, VK8WM, VR512, VR512, |
| 135852 | /* VPXORQZrrkz */ |
| 135853 | VR512, VK8WM, VR512, VR512, |
| 135854 | /* VPXORYrm */ |
| 135855 | VR256, VR256, i256mem, |
| 135856 | /* VPXORYrr */ |
| 135857 | VR256, VR256, VR256, |
| 135858 | /* VPXORrm */ |
| 135859 | VR128, VR128, i128mem, |
| 135860 | /* VPXORrr */ |
| 135861 | VR128, VR128, VR128, |
| 135862 | /* VRANGEPDZ128rmbi */ |
| 135863 | VR128X, VR128X, f64mem, i32u8imm, |
| 135864 | /* VRANGEPDZ128rmbik */ |
| 135865 | VR128X, VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 135866 | /* VRANGEPDZ128rmbikz */ |
| 135867 | VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 135868 | /* VRANGEPDZ128rmi */ |
| 135869 | VR128X, VR128X, f128mem, i32u8imm, |
| 135870 | /* VRANGEPDZ128rmik */ |
| 135871 | VR128X, VR128X, VK2WM, VR128X, f128mem, i32u8imm, |
| 135872 | /* VRANGEPDZ128rmikz */ |
| 135873 | VR128X, VK2WM, VR128X, f128mem, i32u8imm, |
| 135874 | /* VRANGEPDZ128rri */ |
| 135875 | VR128X, VR128X, VR128X, i32u8imm, |
| 135876 | /* VRANGEPDZ128rrik */ |
| 135877 | VR128X, VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 135878 | /* VRANGEPDZ128rrikz */ |
| 135879 | VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 135880 | /* VRANGEPDZ256rmbi */ |
| 135881 | VR256X, VR256X, f64mem, i32u8imm, |
| 135882 | /* VRANGEPDZ256rmbik */ |
| 135883 | VR256X, VR256X, VK4WM, VR256X, f64mem, i32u8imm, |
| 135884 | /* VRANGEPDZ256rmbikz */ |
| 135885 | VR256X, VK4WM, VR256X, f64mem, i32u8imm, |
| 135886 | /* VRANGEPDZ256rmi */ |
| 135887 | VR256X, VR256X, f256mem, i32u8imm, |
| 135888 | /* VRANGEPDZ256rmik */ |
| 135889 | VR256X, VR256X, VK4WM, VR256X, f256mem, i32u8imm, |
| 135890 | /* VRANGEPDZ256rmikz */ |
| 135891 | VR256X, VK4WM, VR256X, f256mem, i32u8imm, |
| 135892 | /* VRANGEPDZ256rri */ |
| 135893 | VR256X, VR256X, VR256X, i32u8imm, |
| 135894 | /* VRANGEPDZ256rrik */ |
| 135895 | VR256X, VR256X, VK4WM, VR256X, VR256X, i32u8imm, |
| 135896 | /* VRANGEPDZ256rrikz */ |
| 135897 | VR256X, VK4WM, VR256X, VR256X, i32u8imm, |
| 135898 | /* VRANGEPDZrmbi */ |
| 135899 | VR512, VR512, f64mem, i32u8imm, |
| 135900 | /* VRANGEPDZrmbik */ |
| 135901 | VR512, VR512, VK8WM, VR512, f64mem, i32u8imm, |
| 135902 | /* VRANGEPDZrmbikz */ |
| 135903 | VR512, VK8WM, VR512, f64mem, i32u8imm, |
| 135904 | /* VRANGEPDZrmi */ |
| 135905 | VR512, VR512, f512mem, i32u8imm, |
| 135906 | /* VRANGEPDZrmik */ |
| 135907 | VR512, VR512, VK8WM, VR512, f512mem, i32u8imm, |
| 135908 | /* VRANGEPDZrmikz */ |
| 135909 | VR512, VK8WM, VR512, f512mem, i32u8imm, |
| 135910 | /* VRANGEPDZrri */ |
| 135911 | VR512, VR512, VR512, i32u8imm, |
| 135912 | /* VRANGEPDZrrib */ |
| 135913 | VR512, VR512, VR512, i32u8imm, |
| 135914 | /* VRANGEPDZrribk */ |
| 135915 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 135916 | /* VRANGEPDZrribkz */ |
| 135917 | VR512, VK8WM, VR512, VR512, i32u8imm, |
| 135918 | /* VRANGEPDZrrik */ |
| 135919 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 135920 | /* VRANGEPDZrrikz */ |
| 135921 | VR512, VK8WM, VR512, VR512, i32u8imm, |
| 135922 | /* VRANGEPSZ128rmbi */ |
| 135923 | VR128X, VR128X, f32mem, i32u8imm, |
| 135924 | /* VRANGEPSZ128rmbik */ |
| 135925 | VR128X, VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 135926 | /* VRANGEPSZ128rmbikz */ |
| 135927 | VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 135928 | /* VRANGEPSZ128rmi */ |
| 135929 | VR128X, VR128X, f128mem, i32u8imm, |
| 135930 | /* VRANGEPSZ128rmik */ |
| 135931 | VR128X, VR128X, VK4WM, VR128X, f128mem, i32u8imm, |
| 135932 | /* VRANGEPSZ128rmikz */ |
| 135933 | VR128X, VK4WM, VR128X, f128mem, i32u8imm, |
| 135934 | /* VRANGEPSZ128rri */ |
| 135935 | VR128X, VR128X, VR128X, i32u8imm, |
| 135936 | /* VRANGEPSZ128rrik */ |
| 135937 | VR128X, VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 135938 | /* VRANGEPSZ128rrikz */ |
| 135939 | VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 135940 | /* VRANGEPSZ256rmbi */ |
| 135941 | VR256X, VR256X, f32mem, i32u8imm, |
| 135942 | /* VRANGEPSZ256rmbik */ |
| 135943 | VR256X, VR256X, VK8WM, VR256X, f32mem, i32u8imm, |
| 135944 | /* VRANGEPSZ256rmbikz */ |
| 135945 | VR256X, VK8WM, VR256X, f32mem, i32u8imm, |
| 135946 | /* VRANGEPSZ256rmi */ |
| 135947 | VR256X, VR256X, f256mem, i32u8imm, |
| 135948 | /* VRANGEPSZ256rmik */ |
| 135949 | VR256X, VR256X, VK8WM, VR256X, f256mem, i32u8imm, |
| 135950 | /* VRANGEPSZ256rmikz */ |
| 135951 | VR256X, VK8WM, VR256X, f256mem, i32u8imm, |
| 135952 | /* VRANGEPSZ256rri */ |
| 135953 | VR256X, VR256X, VR256X, i32u8imm, |
| 135954 | /* VRANGEPSZ256rrik */ |
| 135955 | VR256X, VR256X, VK8WM, VR256X, VR256X, i32u8imm, |
| 135956 | /* VRANGEPSZ256rrikz */ |
| 135957 | VR256X, VK8WM, VR256X, VR256X, i32u8imm, |
| 135958 | /* VRANGEPSZrmbi */ |
| 135959 | VR512, VR512, f32mem, i32u8imm, |
| 135960 | /* VRANGEPSZrmbik */ |
| 135961 | VR512, VR512, VK16WM, VR512, f32mem, i32u8imm, |
| 135962 | /* VRANGEPSZrmbikz */ |
| 135963 | VR512, VK16WM, VR512, f32mem, i32u8imm, |
| 135964 | /* VRANGEPSZrmi */ |
| 135965 | VR512, VR512, f512mem, i32u8imm, |
| 135966 | /* VRANGEPSZrmik */ |
| 135967 | VR512, VR512, VK16WM, VR512, f512mem, i32u8imm, |
| 135968 | /* VRANGEPSZrmikz */ |
| 135969 | VR512, VK16WM, VR512, f512mem, i32u8imm, |
| 135970 | /* VRANGEPSZrri */ |
| 135971 | VR512, VR512, VR512, i32u8imm, |
| 135972 | /* VRANGEPSZrrib */ |
| 135973 | VR512, VR512, VR512, i32u8imm, |
| 135974 | /* VRANGEPSZrribk */ |
| 135975 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 135976 | /* VRANGEPSZrribkz */ |
| 135977 | VR512, VK16WM, VR512, VR512, i32u8imm, |
| 135978 | /* VRANGEPSZrrik */ |
| 135979 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 135980 | /* VRANGEPSZrrikz */ |
| 135981 | VR512, VK16WM, VR512, VR512, i32u8imm, |
| 135982 | /* VRANGESDZrmi */ |
| 135983 | VR128X, VR128X, sdmem, i32u8imm, |
| 135984 | /* VRANGESDZrmik */ |
| 135985 | VR128X, VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 135986 | /* VRANGESDZrmikz */ |
| 135987 | VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 135988 | /* VRANGESDZrri */ |
| 135989 | VR128X, VR128X, VR128X, i32u8imm, |
| 135990 | /* VRANGESDZrrib */ |
| 135991 | VR128X, VR128X, VR128X, i32u8imm, |
| 135992 | /* VRANGESDZrribk */ |
| 135993 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 135994 | /* VRANGESDZrribkz */ |
| 135995 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 135996 | /* VRANGESDZrrik */ |
| 135997 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 135998 | /* VRANGESDZrrikz */ |
| 135999 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136000 | /* VRANGESSZrmi */ |
| 136001 | VR128X, VR128X, ssmem, i32u8imm, |
| 136002 | /* VRANGESSZrmik */ |
| 136003 | VR128X, VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 136004 | /* VRANGESSZrmikz */ |
| 136005 | VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 136006 | /* VRANGESSZrri */ |
| 136007 | VR128X, VR128X, VR128X, i32u8imm, |
| 136008 | /* VRANGESSZrrib */ |
| 136009 | VR128X, VR128X, VR128X, i32u8imm, |
| 136010 | /* VRANGESSZrribk */ |
| 136011 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136012 | /* VRANGESSZrribkz */ |
| 136013 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136014 | /* VRANGESSZrrik */ |
| 136015 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136016 | /* VRANGESSZrrikz */ |
| 136017 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136018 | /* VRCP14PDZ128m */ |
| 136019 | VR128X, f128mem, |
| 136020 | /* VRCP14PDZ128mb */ |
| 136021 | VR128X, f64mem, |
| 136022 | /* VRCP14PDZ128mbk */ |
| 136023 | VR128X, VR128X, VK2WM, f64mem, |
| 136024 | /* VRCP14PDZ128mbkz */ |
| 136025 | VR128X, VK2WM, f64mem, |
| 136026 | /* VRCP14PDZ128mk */ |
| 136027 | VR128X, VR128X, VK2WM, f128mem, |
| 136028 | /* VRCP14PDZ128mkz */ |
| 136029 | VR128X, VK2WM, f128mem, |
| 136030 | /* VRCP14PDZ128r */ |
| 136031 | VR128X, VR128X, |
| 136032 | /* VRCP14PDZ128rk */ |
| 136033 | VR128X, VR128X, VK2WM, VR128X, |
| 136034 | /* VRCP14PDZ128rkz */ |
| 136035 | VR128X, VK2WM, VR128X, |
| 136036 | /* VRCP14PDZ256m */ |
| 136037 | VR256X, f256mem, |
| 136038 | /* VRCP14PDZ256mb */ |
| 136039 | VR256X, f64mem, |
| 136040 | /* VRCP14PDZ256mbk */ |
| 136041 | VR256X, VR256X, VK4WM, f64mem, |
| 136042 | /* VRCP14PDZ256mbkz */ |
| 136043 | VR256X, VK4WM, f64mem, |
| 136044 | /* VRCP14PDZ256mk */ |
| 136045 | VR256X, VR256X, VK4WM, f256mem, |
| 136046 | /* VRCP14PDZ256mkz */ |
| 136047 | VR256X, VK4WM, f256mem, |
| 136048 | /* VRCP14PDZ256r */ |
| 136049 | VR256X, VR256X, |
| 136050 | /* VRCP14PDZ256rk */ |
| 136051 | VR256X, VR256X, VK4WM, VR256X, |
| 136052 | /* VRCP14PDZ256rkz */ |
| 136053 | VR256X, VK4WM, VR256X, |
| 136054 | /* VRCP14PDZm */ |
| 136055 | VR512, f512mem, |
| 136056 | /* VRCP14PDZmb */ |
| 136057 | VR512, f64mem, |
| 136058 | /* VRCP14PDZmbk */ |
| 136059 | VR512, VR512, VK8WM, f64mem, |
| 136060 | /* VRCP14PDZmbkz */ |
| 136061 | VR512, VK8WM, f64mem, |
| 136062 | /* VRCP14PDZmk */ |
| 136063 | VR512, VR512, VK8WM, f512mem, |
| 136064 | /* VRCP14PDZmkz */ |
| 136065 | VR512, VK8WM, f512mem, |
| 136066 | /* VRCP14PDZr */ |
| 136067 | VR512, VR512, |
| 136068 | /* VRCP14PDZrk */ |
| 136069 | VR512, VR512, VK8WM, VR512, |
| 136070 | /* VRCP14PDZrkz */ |
| 136071 | VR512, VK8WM, VR512, |
| 136072 | /* VRCP14PSZ128m */ |
| 136073 | VR128X, f128mem, |
| 136074 | /* VRCP14PSZ128mb */ |
| 136075 | VR128X, f32mem, |
| 136076 | /* VRCP14PSZ128mbk */ |
| 136077 | VR128X, VR128X, VK4WM, f32mem, |
| 136078 | /* VRCP14PSZ128mbkz */ |
| 136079 | VR128X, VK4WM, f32mem, |
| 136080 | /* VRCP14PSZ128mk */ |
| 136081 | VR128X, VR128X, VK4WM, f128mem, |
| 136082 | /* VRCP14PSZ128mkz */ |
| 136083 | VR128X, VK4WM, f128mem, |
| 136084 | /* VRCP14PSZ128r */ |
| 136085 | VR128X, VR128X, |
| 136086 | /* VRCP14PSZ128rk */ |
| 136087 | VR128X, VR128X, VK4WM, VR128X, |
| 136088 | /* VRCP14PSZ128rkz */ |
| 136089 | VR128X, VK4WM, VR128X, |
| 136090 | /* VRCP14PSZ256m */ |
| 136091 | VR256X, f256mem, |
| 136092 | /* VRCP14PSZ256mb */ |
| 136093 | VR256X, f32mem, |
| 136094 | /* VRCP14PSZ256mbk */ |
| 136095 | VR256X, VR256X, VK8WM, f32mem, |
| 136096 | /* VRCP14PSZ256mbkz */ |
| 136097 | VR256X, VK8WM, f32mem, |
| 136098 | /* VRCP14PSZ256mk */ |
| 136099 | VR256X, VR256X, VK8WM, f256mem, |
| 136100 | /* VRCP14PSZ256mkz */ |
| 136101 | VR256X, VK8WM, f256mem, |
| 136102 | /* VRCP14PSZ256r */ |
| 136103 | VR256X, VR256X, |
| 136104 | /* VRCP14PSZ256rk */ |
| 136105 | VR256X, VR256X, VK8WM, VR256X, |
| 136106 | /* VRCP14PSZ256rkz */ |
| 136107 | VR256X, VK8WM, VR256X, |
| 136108 | /* VRCP14PSZm */ |
| 136109 | VR512, f512mem, |
| 136110 | /* VRCP14PSZmb */ |
| 136111 | VR512, f32mem, |
| 136112 | /* VRCP14PSZmbk */ |
| 136113 | VR512, VR512, VK16WM, f32mem, |
| 136114 | /* VRCP14PSZmbkz */ |
| 136115 | VR512, VK16WM, f32mem, |
| 136116 | /* VRCP14PSZmk */ |
| 136117 | VR512, VR512, VK16WM, f512mem, |
| 136118 | /* VRCP14PSZmkz */ |
| 136119 | VR512, VK16WM, f512mem, |
| 136120 | /* VRCP14PSZr */ |
| 136121 | VR512, VR512, |
| 136122 | /* VRCP14PSZrk */ |
| 136123 | VR512, VR512, VK16WM, VR512, |
| 136124 | /* VRCP14PSZrkz */ |
| 136125 | VR512, VK16WM, VR512, |
| 136126 | /* VRCP14SDZrm */ |
| 136127 | VR128X, VR128X, sdmem, |
| 136128 | /* VRCP14SDZrmk */ |
| 136129 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 136130 | /* VRCP14SDZrmkz */ |
| 136131 | VR128X, VK1WM, VR128X, sdmem, |
| 136132 | /* VRCP14SDZrr */ |
| 136133 | VR128X, VR128X, VR128X, |
| 136134 | /* VRCP14SDZrrk */ |
| 136135 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 136136 | /* VRCP14SDZrrkz */ |
| 136137 | VR128X, VK1WM, VR128X, VR128X, |
| 136138 | /* VRCP14SSZrm */ |
| 136139 | VR128X, VR128X, ssmem, |
| 136140 | /* VRCP14SSZrmk */ |
| 136141 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 136142 | /* VRCP14SSZrmkz */ |
| 136143 | VR128X, VK1WM, VR128X, ssmem, |
| 136144 | /* VRCP14SSZrr */ |
| 136145 | VR128X, VR128X, VR128X, |
| 136146 | /* VRCP14SSZrrk */ |
| 136147 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 136148 | /* VRCP14SSZrrkz */ |
| 136149 | VR128X, VK1WM, VR128X, VR128X, |
| 136150 | /* VRCP28PDZm */ |
| 136151 | VR512, f512mem, |
| 136152 | /* VRCP28PDZmb */ |
| 136153 | VR512, f64mem, |
| 136154 | /* VRCP28PDZmbk */ |
| 136155 | VR512, VR512, VK8WM, f64mem, |
| 136156 | /* VRCP28PDZmbkz */ |
| 136157 | VR512, VK8WM, f64mem, |
| 136158 | /* VRCP28PDZmk */ |
| 136159 | VR512, VR512, VK8WM, f512mem, |
| 136160 | /* VRCP28PDZmkz */ |
| 136161 | VR512, VK8WM, f512mem, |
| 136162 | /* VRCP28PDZr */ |
| 136163 | VR512, VR512, |
| 136164 | /* VRCP28PDZrb */ |
| 136165 | VR512, VR512, |
| 136166 | /* VRCP28PDZrbk */ |
| 136167 | VR512, VR512, VK8WM, VR512, |
| 136168 | /* VRCP28PDZrbkz */ |
| 136169 | VR512, VK8WM, VR512, |
| 136170 | /* VRCP28PDZrk */ |
| 136171 | VR512, VR512, VK8WM, VR512, |
| 136172 | /* VRCP28PDZrkz */ |
| 136173 | VR512, VK8WM, VR512, |
| 136174 | /* VRCP28PSZm */ |
| 136175 | VR512, f512mem, |
| 136176 | /* VRCP28PSZmb */ |
| 136177 | VR512, f32mem, |
| 136178 | /* VRCP28PSZmbk */ |
| 136179 | VR512, VR512, VK16WM, f32mem, |
| 136180 | /* VRCP28PSZmbkz */ |
| 136181 | VR512, VK16WM, f32mem, |
| 136182 | /* VRCP28PSZmk */ |
| 136183 | VR512, VR512, VK16WM, f512mem, |
| 136184 | /* VRCP28PSZmkz */ |
| 136185 | VR512, VK16WM, f512mem, |
| 136186 | /* VRCP28PSZr */ |
| 136187 | VR512, VR512, |
| 136188 | /* VRCP28PSZrb */ |
| 136189 | VR512, VR512, |
| 136190 | /* VRCP28PSZrbk */ |
| 136191 | VR512, VR512, VK16WM, VR512, |
| 136192 | /* VRCP28PSZrbkz */ |
| 136193 | VR512, VK16WM, VR512, |
| 136194 | /* VRCP28PSZrk */ |
| 136195 | VR512, VR512, VK16WM, VR512, |
| 136196 | /* VRCP28PSZrkz */ |
| 136197 | VR512, VK16WM, VR512, |
| 136198 | /* VRCP28SDZm */ |
| 136199 | VR128X, VR128X, sdmem, |
| 136200 | /* VRCP28SDZmk */ |
| 136201 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 136202 | /* VRCP28SDZmkz */ |
| 136203 | VR128X, VK1WM, VR128X, sdmem, |
| 136204 | /* VRCP28SDZr */ |
| 136205 | VR128X, VR128X, VR128X, |
| 136206 | /* VRCP28SDZrb */ |
| 136207 | VR128X, VR128X, VR128X, |
| 136208 | /* VRCP28SDZrbk */ |
| 136209 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 136210 | /* VRCP28SDZrbkz */ |
| 136211 | VR128X, VK1WM, VR128X, VR128X, |
| 136212 | /* VRCP28SDZrk */ |
| 136213 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 136214 | /* VRCP28SDZrkz */ |
| 136215 | VR128X, VK1WM, VR128X, VR128X, |
| 136216 | /* VRCP28SSZm */ |
| 136217 | VR128X, VR128X, ssmem, |
| 136218 | /* VRCP28SSZmk */ |
| 136219 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 136220 | /* VRCP28SSZmkz */ |
| 136221 | VR128X, VK1WM, VR128X, ssmem, |
| 136222 | /* VRCP28SSZr */ |
| 136223 | VR128X, VR128X, VR128X, |
| 136224 | /* VRCP28SSZrb */ |
| 136225 | VR128X, VR128X, VR128X, |
| 136226 | /* VRCP28SSZrbk */ |
| 136227 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 136228 | /* VRCP28SSZrbkz */ |
| 136229 | VR128X, VK1WM, VR128X, VR128X, |
| 136230 | /* VRCP28SSZrk */ |
| 136231 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 136232 | /* VRCP28SSZrkz */ |
| 136233 | VR128X, VK1WM, VR128X, VR128X, |
| 136234 | /* VRCPBF16Z128m */ |
| 136235 | VR128X, f128mem, |
| 136236 | /* VRCPBF16Z128mb */ |
| 136237 | VR128X, f16mem, |
| 136238 | /* VRCPBF16Z128mbk */ |
| 136239 | VR128X, VR128X, VK8WM, f16mem, |
| 136240 | /* VRCPBF16Z128mbkz */ |
| 136241 | VR128X, VK8WM, f16mem, |
| 136242 | /* VRCPBF16Z128mk */ |
| 136243 | VR128X, VR128X, VK8WM, f128mem, |
| 136244 | /* VRCPBF16Z128mkz */ |
| 136245 | VR128X, VK8WM, f128mem, |
| 136246 | /* VRCPBF16Z128r */ |
| 136247 | VR128X, VR128X, |
| 136248 | /* VRCPBF16Z128rk */ |
| 136249 | VR128X, VR128X, VK8WM, VR128X, |
| 136250 | /* VRCPBF16Z128rkz */ |
| 136251 | VR128X, VK8WM, VR128X, |
| 136252 | /* VRCPBF16Z256m */ |
| 136253 | VR256X, f256mem, |
| 136254 | /* VRCPBF16Z256mb */ |
| 136255 | VR256X, f16mem, |
| 136256 | /* VRCPBF16Z256mbk */ |
| 136257 | VR256X, VR256X, VK16WM, f16mem, |
| 136258 | /* VRCPBF16Z256mbkz */ |
| 136259 | VR256X, VK16WM, f16mem, |
| 136260 | /* VRCPBF16Z256mk */ |
| 136261 | VR256X, VR256X, VK16WM, f256mem, |
| 136262 | /* VRCPBF16Z256mkz */ |
| 136263 | VR256X, VK16WM, f256mem, |
| 136264 | /* VRCPBF16Z256r */ |
| 136265 | VR256X, VR256X, |
| 136266 | /* VRCPBF16Z256rk */ |
| 136267 | VR256X, VR256X, VK16WM, VR256X, |
| 136268 | /* VRCPBF16Z256rkz */ |
| 136269 | VR256X, VK16WM, VR256X, |
| 136270 | /* VRCPBF16Zm */ |
| 136271 | VR512, f512mem, |
| 136272 | /* VRCPBF16Zmb */ |
| 136273 | VR512, f16mem, |
| 136274 | /* VRCPBF16Zmbk */ |
| 136275 | VR512, VR512, VK32WM, f16mem, |
| 136276 | /* VRCPBF16Zmbkz */ |
| 136277 | VR512, VK32WM, f16mem, |
| 136278 | /* VRCPBF16Zmk */ |
| 136279 | VR512, VR512, VK32WM, f512mem, |
| 136280 | /* VRCPBF16Zmkz */ |
| 136281 | VR512, VK32WM, f512mem, |
| 136282 | /* VRCPBF16Zr */ |
| 136283 | VR512, VR512, |
| 136284 | /* VRCPBF16Zrk */ |
| 136285 | VR512, VR512, VK32WM, VR512, |
| 136286 | /* VRCPBF16Zrkz */ |
| 136287 | VR512, VK32WM, VR512, |
| 136288 | /* VRCPPHZ128m */ |
| 136289 | VR128X, f128mem, |
| 136290 | /* VRCPPHZ128mb */ |
| 136291 | VR128X, f16mem, |
| 136292 | /* VRCPPHZ128mbk */ |
| 136293 | VR128X, VR128X, VK8WM, f16mem, |
| 136294 | /* VRCPPHZ128mbkz */ |
| 136295 | VR128X, VK8WM, f16mem, |
| 136296 | /* VRCPPHZ128mk */ |
| 136297 | VR128X, VR128X, VK8WM, f128mem, |
| 136298 | /* VRCPPHZ128mkz */ |
| 136299 | VR128X, VK8WM, f128mem, |
| 136300 | /* VRCPPHZ128r */ |
| 136301 | VR128X, VR128X, |
| 136302 | /* VRCPPHZ128rk */ |
| 136303 | VR128X, VR128X, VK8WM, VR128X, |
| 136304 | /* VRCPPHZ128rkz */ |
| 136305 | VR128X, VK8WM, VR128X, |
| 136306 | /* VRCPPHZ256m */ |
| 136307 | VR256X, f256mem, |
| 136308 | /* VRCPPHZ256mb */ |
| 136309 | VR256X, f16mem, |
| 136310 | /* VRCPPHZ256mbk */ |
| 136311 | VR256X, VR256X, VK16WM, f16mem, |
| 136312 | /* VRCPPHZ256mbkz */ |
| 136313 | VR256X, VK16WM, f16mem, |
| 136314 | /* VRCPPHZ256mk */ |
| 136315 | VR256X, VR256X, VK16WM, f256mem, |
| 136316 | /* VRCPPHZ256mkz */ |
| 136317 | VR256X, VK16WM, f256mem, |
| 136318 | /* VRCPPHZ256r */ |
| 136319 | VR256X, VR256X, |
| 136320 | /* VRCPPHZ256rk */ |
| 136321 | VR256X, VR256X, VK16WM, VR256X, |
| 136322 | /* VRCPPHZ256rkz */ |
| 136323 | VR256X, VK16WM, VR256X, |
| 136324 | /* VRCPPHZm */ |
| 136325 | VR512, f512mem, |
| 136326 | /* VRCPPHZmb */ |
| 136327 | VR512, f16mem, |
| 136328 | /* VRCPPHZmbk */ |
| 136329 | VR512, VR512, VK32WM, f16mem, |
| 136330 | /* VRCPPHZmbkz */ |
| 136331 | VR512, VK32WM, f16mem, |
| 136332 | /* VRCPPHZmk */ |
| 136333 | VR512, VR512, VK32WM, f512mem, |
| 136334 | /* VRCPPHZmkz */ |
| 136335 | VR512, VK32WM, f512mem, |
| 136336 | /* VRCPPHZr */ |
| 136337 | VR512, VR512, |
| 136338 | /* VRCPPHZrk */ |
| 136339 | VR512, VR512, VK32WM, VR512, |
| 136340 | /* VRCPPHZrkz */ |
| 136341 | VR512, VK32WM, VR512, |
| 136342 | /* VRCPPSYm */ |
| 136343 | VR256, f256mem, |
| 136344 | /* VRCPPSYr */ |
| 136345 | VR256, VR256, |
| 136346 | /* VRCPPSm */ |
| 136347 | VR128, f128mem, |
| 136348 | /* VRCPPSr */ |
| 136349 | VR128, VR128, |
| 136350 | /* VRCPSHZrm */ |
| 136351 | VR128X, VR128X, shmem, |
| 136352 | /* VRCPSHZrmk */ |
| 136353 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 136354 | /* VRCPSHZrmkz */ |
| 136355 | VR128X, VK1WM, VR128X, shmem, |
| 136356 | /* VRCPSHZrr */ |
| 136357 | VR128X, VR128X, VR128X, |
| 136358 | /* VRCPSHZrrk */ |
| 136359 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 136360 | /* VRCPSHZrrkz */ |
| 136361 | VR128X, VK1WM, VR128X, VR128X, |
| 136362 | /* VRCPSSm */ |
| 136363 | FR32, FR32, f32mem, |
| 136364 | /* VRCPSSm_Int */ |
| 136365 | VR128, VR128, ssmem, |
| 136366 | /* VRCPSSr */ |
| 136367 | FR32, FR32, FR32, |
| 136368 | /* VRCPSSr_Int */ |
| 136369 | VR128, VR128, VR128, |
| 136370 | /* VREDUCEBF16Z128rmbi */ |
| 136371 | VR128X, f16mem, i32u8imm, |
| 136372 | /* VREDUCEBF16Z128rmbik */ |
| 136373 | VR128X, VR128X, VK8WM, f16mem, i32u8imm, |
| 136374 | /* VREDUCEBF16Z128rmbikz */ |
| 136375 | VR128X, VK8WM, f16mem, i32u8imm, |
| 136376 | /* VREDUCEBF16Z128rmi */ |
| 136377 | VR128X, f128mem, i32u8imm, |
| 136378 | /* VREDUCEBF16Z128rmik */ |
| 136379 | VR128X, VR128X, VK8WM, f128mem, i32u8imm, |
| 136380 | /* VREDUCEBF16Z128rmikz */ |
| 136381 | VR128X, VK8WM, f128mem, i32u8imm, |
| 136382 | /* VREDUCEBF16Z128rri */ |
| 136383 | VR128X, VR128X, i32u8imm, |
| 136384 | /* VREDUCEBF16Z128rrik */ |
| 136385 | VR128X, VR128X, VK8WM, VR128X, i32u8imm, |
| 136386 | /* VREDUCEBF16Z128rrikz */ |
| 136387 | VR128X, VK8WM, VR128X, i32u8imm, |
| 136388 | /* VREDUCEBF16Z256rmbi */ |
| 136389 | VR256X, f16mem, i32u8imm, |
| 136390 | /* VREDUCEBF16Z256rmbik */ |
| 136391 | VR256X, VR256X, VK16WM, f16mem, i32u8imm, |
| 136392 | /* VREDUCEBF16Z256rmbikz */ |
| 136393 | VR256X, VK16WM, f16mem, i32u8imm, |
| 136394 | /* VREDUCEBF16Z256rmi */ |
| 136395 | VR256X, f256mem, i32u8imm, |
| 136396 | /* VREDUCEBF16Z256rmik */ |
| 136397 | VR256X, VR256X, VK16WM, f256mem, i32u8imm, |
| 136398 | /* VREDUCEBF16Z256rmikz */ |
| 136399 | VR256X, VK16WM, f256mem, i32u8imm, |
| 136400 | /* VREDUCEBF16Z256rri */ |
| 136401 | VR256X, VR256X, i32u8imm, |
| 136402 | /* VREDUCEBF16Z256rrik */ |
| 136403 | VR256X, VR256X, VK16WM, VR256X, i32u8imm, |
| 136404 | /* VREDUCEBF16Z256rrikz */ |
| 136405 | VR256X, VK16WM, VR256X, i32u8imm, |
| 136406 | /* VREDUCEBF16Zrmbi */ |
| 136407 | VR512, f16mem, i32u8imm, |
| 136408 | /* VREDUCEBF16Zrmbik */ |
| 136409 | VR512, VR512, VK32WM, f16mem, i32u8imm, |
| 136410 | /* VREDUCEBF16Zrmbikz */ |
| 136411 | VR512, VK32WM, f16mem, i32u8imm, |
| 136412 | /* VREDUCEBF16Zrmi */ |
| 136413 | VR512, f512mem, i32u8imm, |
| 136414 | /* VREDUCEBF16Zrmik */ |
| 136415 | VR512, VR512, VK32WM, f512mem, i32u8imm, |
| 136416 | /* VREDUCEBF16Zrmikz */ |
| 136417 | VR512, VK32WM, f512mem, i32u8imm, |
| 136418 | /* VREDUCEBF16Zrri */ |
| 136419 | VR512, VR512, i32u8imm, |
| 136420 | /* VREDUCEBF16Zrrik */ |
| 136421 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 136422 | /* VREDUCEBF16Zrrikz */ |
| 136423 | VR512, VK32WM, VR512, i32u8imm, |
| 136424 | /* VREDUCEPDZ128rmbi */ |
| 136425 | VR128X, f64mem, i32u8imm, |
| 136426 | /* VREDUCEPDZ128rmbik */ |
| 136427 | VR128X, VR128X, VK2WM, f64mem, i32u8imm, |
| 136428 | /* VREDUCEPDZ128rmbikz */ |
| 136429 | VR128X, VK2WM, f64mem, i32u8imm, |
| 136430 | /* VREDUCEPDZ128rmi */ |
| 136431 | VR128X, f128mem, i32u8imm, |
| 136432 | /* VREDUCEPDZ128rmik */ |
| 136433 | VR128X, VR128X, VK2WM, f128mem, i32u8imm, |
| 136434 | /* VREDUCEPDZ128rmikz */ |
| 136435 | VR128X, VK2WM, f128mem, i32u8imm, |
| 136436 | /* VREDUCEPDZ128rri */ |
| 136437 | VR128X, VR128X, i32u8imm, |
| 136438 | /* VREDUCEPDZ128rrik */ |
| 136439 | VR128X, VR128X, VK2WM, VR128X, i32u8imm, |
| 136440 | /* VREDUCEPDZ128rrikz */ |
| 136441 | VR128X, VK2WM, VR128X, i32u8imm, |
| 136442 | /* VREDUCEPDZ256rmbi */ |
| 136443 | VR256X, f64mem, i32u8imm, |
| 136444 | /* VREDUCEPDZ256rmbik */ |
| 136445 | VR256X, VR256X, VK4WM, f64mem, i32u8imm, |
| 136446 | /* VREDUCEPDZ256rmbikz */ |
| 136447 | VR256X, VK4WM, f64mem, i32u8imm, |
| 136448 | /* VREDUCEPDZ256rmi */ |
| 136449 | VR256X, f256mem, i32u8imm, |
| 136450 | /* VREDUCEPDZ256rmik */ |
| 136451 | VR256X, VR256X, VK4WM, f256mem, i32u8imm, |
| 136452 | /* VREDUCEPDZ256rmikz */ |
| 136453 | VR256X, VK4WM, f256mem, i32u8imm, |
| 136454 | /* VREDUCEPDZ256rri */ |
| 136455 | VR256X, VR256X, i32u8imm, |
| 136456 | /* VREDUCEPDZ256rrik */ |
| 136457 | VR256X, VR256X, VK4WM, VR256X, i32u8imm, |
| 136458 | /* VREDUCEPDZ256rrikz */ |
| 136459 | VR256X, VK4WM, VR256X, i32u8imm, |
| 136460 | /* VREDUCEPDZrmbi */ |
| 136461 | VR512, f64mem, i32u8imm, |
| 136462 | /* VREDUCEPDZrmbik */ |
| 136463 | VR512, VR512, VK8WM, f64mem, i32u8imm, |
| 136464 | /* VREDUCEPDZrmbikz */ |
| 136465 | VR512, VK8WM, f64mem, i32u8imm, |
| 136466 | /* VREDUCEPDZrmi */ |
| 136467 | VR512, f512mem, i32u8imm, |
| 136468 | /* VREDUCEPDZrmik */ |
| 136469 | VR512, VR512, VK8WM, f512mem, i32u8imm, |
| 136470 | /* VREDUCEPDZrmikz */ |
| 136471 | VR512, VK8WM, f512mem, i32u8imm, |
| 136472 | /* VREDUCEPDZrri */ |
| 136473 | VR512, VR512, i32u8imm, |
| 136474 | /* VREDUCEPDZrrib */ |
| 136475 | VR512, VR512, i32u8imm, |
| 136476 | /* VREDUCEPDZrribk */ |
| 136477 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 136478 | /* VREDUCEPDZrribkz */ |
| 136479 | VR512, VK8WM, VR512, i32u8imm, |
| 136480 | /* VREDUCEPDZrrik */ |
| 136481 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 136482 | /* VREDUCEPDZrrikz */ |
| 136483 | VR512, VK8WM, VR512, i32u8imm, |
| 136484 | /* VREDUCEPHZ128rmbi */ |
| 136485 | VR128X, f16mem, i32u8imm, |
| 136486 | /* VREDUCEPHZ128rmbik */ |
| 136487 | VR128X, VR128X, VK8WM, f16mem, i32u8imm, |
| 136488 | /* VREDUCEPHZ128rmbikz */ |
| 136489 | VR128X, VK8WM, f16mem, i32u8imm, |
| 136490 | /* VREDUCEPHZ128rmi */ |
| 136491 | VR128X, f128mem, i32u8imm, |
| 136492 | /* VREDUCEPHZ128rmik */ |
| 136493 | VR128X, VR128X, VK8WM, f128mem, i32u8imm, |
| 136494 | /* VREDUCEPHZ128rmikz */ |
| 136495 | VR128X, VK8WM, f128mem, i32u8imm, |
| 136496 | /* VREDUCEPHZ128rri */ |
| 136497 | VR128X, VR128X, i32u8imm, |
| 136498 | /* VREDUCEPHZ128rrik */ |
| 136499 | VR128X, VR128X, VK8WM, VR128X, i32u8imm, |
| 136500 | /* VREDUCEPHZ128rrikz */ |
| 136501 | VR128X, VK8WM, VR128X, i32u8imm, |
| 136502 | /* VREDUCEPHZ256rmbi */ |
| 136503 | VR256X, f16mem, i32u8imm, |
| 136504 | /* VREDUCEPHZ256rmbik */ |
| 136505 | VR256X, VR256X, VK16WM, f16mem, i32u8imm, |
| 136506 | /* VREDUCEPHZ256rmbikz */ |
| 136507 | VR256X, VK16WM, f16mem, i32u8imm, |
| 136508 | /* VREDUCEPHZ256rmi */ |
| 136509 | VR256X, f256mem, i32u8imm, |
| 136510 | /* VREDUCEPHZ256rmik */ |
| 136511 | VR256X, VR256X, VK16WM, f256mem, i32u8imm, |
| 136512 | /* VREDUCEPHZ256rmikz */ |
| 136513 | VR256X, VK16WM, f256mem, i32u8imm, |
| 136514 | /* VREDUCEPHZ256rri */ |
| 136515 | VR256X, VR256X, i32u8imm, |
| 136516 | /* VREDUCEPHZ256rrik */ |
| 136517 | VR256X, VR256X, VK16WM, VR256X, i32u8imm, |
| 136518 | /* VREDUCEPHZ256rrikz */ |
| 136519 | VR256X, VK16WM, VR256X, i32u8imm, |
| 136520 | /* VREDUCEPHZrmbi */ |
| 136521 | VR512, f16mem, i32u8imm, |
| 136522 | /* VREDUCEPHZrmbik */ |
| 136523 | VR512, VR512, VK32WM, f16mem, i32u8imm, |
| 136524 | /* VREDUCEPHZrmbikz */ |
| 136525 | VR512, VK32WM, f16mem, i32u8imm, |
| 136526 | /* VREDUCEPHZrmi */ |
| 136527 | VR512, f512mem, i32u8imm, |
| 136528 | /* VREDUCEPHZrmik */ |
| 136529 | VR512, VR512, VK32WM, f512mem, i32u8imm, |
| 136530 | /* VREDUCEPHZrmikz */ |
| 136531 | VR512, VK32WM, f512mem, i32u8imm, |
| 136532 | /* VREDUCEPHZrri */ |
| 136533 | VR512, VR512, i32u8imm, |
| 136534 | /* VREDUCEPHZrrib */ |
| 136535 | VR512, VR512, i32u8imm, |
| 136536 | /* VREDUCEPHZrribk */ |
| 136537 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 136538 | /* VREDUCEPHZrribkz */ |
| 136539 | VR512, VK32WM, VR512, i32u8imm, |
| 136540 | /* VREDUCEPHZrrik */ |
| 136541 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 136542 | /* VREDUCEPHZrrikz */ |
| 136543 | VR512, VK32WM, VR512, i32u8imm, |
| 136544 | /* VREDUCEPSZ128rmbi */ |
| 136545 | VR128X, f32mem, i32u8imm, |
| 136546 | /* VREDUCEPSZ128rmbik */ |
| 136547 | VR128X, VR128X, VK4WM, f32mem, i32u8imm, |
| 136548 | /* VREDUCEPSZ128rmbikz */ |
| 136549 | VR128X, VK4WM, f32mem, i32u8imm, |
| 136550 | /* VREDUCEPSZ128rmi */ |
| 136551 | VR128X, f128mem, i32u8imm, |
| 136552 | /* VREDUCEPSZ128rmik */ |
| 136553 | VR128X, VR128X, VK4WM, f128mem, i32u8imm, |
| 136554 | /* VREDUCEPSZ128rmikz */ |
| 136555 | VR128X, VK4WM, f128mem, i32u8imm, |
| 136556 | /* VREDUCEPSZ128rri */ |
| 136557 | VR128X, VR128X, i32u8imm, |
| 136558 | /* VREDUCEPSZ128rrik */ |
| 136559 | VR128X, VR128X, VK4WM, VR128X, i32u8imm, |
| 136560 | /* VREDUCEPSZ128rrikz */ |
| 136561 | VR128X, VK4WM, VR128X, i32u8imm, |
| 136562 | /* VREDUCEPSZ256rmbi */ |
| 136563 | VR256X, f32mem, i32u8imm, |
| 136564 | /* VREDUCEPSZ256rmbik */ |
| 136565 | VR256X, VR256X, VK8WM, f32mem, i32u8imm, |
| 136566 | /* VREDUCEPSZ256rmbikz */ |
| 136567 | VR256X, VK8WM, f32mem, i32u8imm, |
| 136568 | /* VREDUCEPSZ256rmi */ |
| 136569 | VR256X, f256mem, i32u8imm, |
| 136570 | /* VREDUCEPSZ256rmik */ |
| 136571 | VR256X, VR256X, VK8WM, f256mem, i32u8imm, |
| 136572 | /* VREDUCEPSZ256rmikz */ |
| 136573 | VR256X, VK8WM, f256mem, i32u8imm, |
| 136574 | /* VREDUCEPSZ256rri */ |
| 136575 | VR256X, VR256X, i32u8imm, |
| 136576 | /* VREDUCEPSZ256rrik */ |
| 136577 | VR256X, VR256X, VK8WM, VR256X, i32u8imm, |
| 136578 | /* VREDUCEPSZ256rrikz */ |
| 136579 | VR256X, VK8WM, VR256X, i32u8imm, |
| 136580 | /* VREDUCEPSZrmbi */ |
| 136581 | VR512, f32mem, i32u8imm, |
| 136582 | /* VREDUCEPSZrmbik */ |
| 136583 | VR512, VR512, VK16WM, f32mem, i32u8imm, |
| 136584 | /* VREDUCEPSZrmbikz */ |
| 136585 | VR512, VK16WM, f32mem, i32u8imm, |
| 136586 | /* VREDUCEPSZrmi */ |
| 136587 | VR512, f512mem, i32u8imm, |
| 136588 | /* VREDUCEPSZrmik */ |
| 136589 | VR512, VR512, VK16WM, f512mem, i32u8imm, |
| 136590 | /* VREDUCEPSZrmikz */ |
| 136591 | VR512, VK16WM, f512mem, i32u8imm, |
| 136592 | /* VREDUCEPSZrri */ |
| 136593 | VR512, VR512, i32u8imm, |
| 136594 | /* VREDUCEPSZrrib */ |
| 136595 | VR512, VR512, i32u8imm, |
| 136596 | /* VREDUCEPSZrribk */ |
| 136597 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 136598 | /* VREDUCEPSZrribkz */ |
| 136599 | VR512, VK16WM, VR512, i32u8imm, |
| 136600 | /* VREDUCEPSZrrik */ |
| 136601 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 136602 | /* VREDUCEPSZrrikz */ |
| 136603 | VR512, VK16WM, VR512, i32u8imm, |
| 136604 | /* VREDUCESDZrmi */ |
| 136605 | VR128X, VR128X, sdmem, i32u8imm, |
| 136606 | /* VREDUCESDZrmik */ |
| 136607 | VR128X, VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 136608 | /* VREDUCESDZrmikz */ |
| 136609 | VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 136610 | /* VREDUCESDZrri */ |
| 136611 | VR128X, VR128X, VR128X, i32u8imm, |
| 136612 | /* VREDUCESDZrrib */ |
| 136613 | VR128X, VR128X, VR128X, i32u8imm, |
| 136614 | /* VREDUCESDZrribk */ |
| 136615 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136616 | /* VREDUCESDZrribkz */ |
| 136617 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136618 | /* VREDUCESDZrrik */ |
| 136619 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136620 | /* VREDUCESDZrrikz */ |
| 136621 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136622 | /* VREDUCESHZrmi */ |
| 136623 | VR128X, VR128X, shmem, i32u8imm, |
| 136624 | /* VREDUCESHZrmik */ |
| 136625 | VR128X, VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 136626 | /* VREDUCESHZrmikz */ |
| 136627 | VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 136628 | /* VREDUCESHZrri */ |
| 136629 | VR128X, VR128X, VR128X, i32u8imm, |
| 136630 | /* VREDUCESHZrrib */ |
| 136631 | VR128X, VR128X, VR128X, i32u8imm, |
| 136632 | /* VREDUCESHZrribk */ |
| 136633 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136634 | /* VREDUCESHZrribkz */ |
| 136635 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136636 | /* VREDUCESHZrrik */ |
| 136637 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136638 | /* VREDUCESHZrrikz */ |
| 136639 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136640 | /* VREDUCESSZrmi */ |
| 136641 | VR128X, VR128X, ssmem, i32u8imm, |
| 136642 | /* VREDUCESSZrmik */ |
| 136643 | VR128X, VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 136644 | /* VREDUCESSZrmikz */ |
| 136645 | VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 136646 | /* VREDUCESSZrri */ |
| 136647 | VR128X, VR128X, VR128X, i32u8imm, |
| 136648 | /* VREDUCESSZrrib */ |
| 136649 | VR128X, VR128X, VR128X, i32u8imm, |
| 136650 | /* VREDUCESSZrribk */ |
| 136651 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136652 | /* VREDUCESSZrribkz */ |
| 136653 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136654 | /* VREDUCESSZrrik */ |
| 136655 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136656 | /* VREDUCESSZrrikz */ |
| 136657 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136658 | /* VRNDSCALEBF16Z128rmbi */ |
| 136659 | VR128X, f16mem, i32u8imm, |
| 136660 | /* VRNDSCALEBF16Z128rmbik */ |
| 136661 | VR128X, VR128X, VK8WM, f16mem, i32u8imm, |
| 136662 | /* VRNDSCALEBF16Z128rmbikz */ |
| 136663 | VR128X, VK8WM, f16mem, i32u8imm, |
| 136664 | /* VRNDSCALEBF16Z128rmi */ |
| 136665 | VR128X, f128mem, i32u8imm, |
| 136666 | /* VRNDSCALEBF16Z128rmik */ |
| 136667 | VR128X, VR128X, VK8WM, f128mem, i32u8imm, |
| 136668 | /* VRNDSCALEBF16Z128rmikz */ |
| 136669 | VR128X, VK8WM, f128mem, i32u8imm, |
| 136670 | /* VRNDSCALEBF16Z128rri */ |
| 136671 | VR128X, VR128X, i32u8imm, |
| 136672 | /* VRNDSCALEBF16Z128rrik */ |
| 136673 | VR128X, VR128X, VK8WM, VR128X, i32u8imm, |
| 136674 | /* VRNDSCALEBF16Z128rrikz */ |
| 136675 | VR128X, VK8WM, VR128X, i32u8imm, |
| 136676 | /* VRNDSCALEBF16Z256rmbi */ |
| 136677 | VR256X, f16mem, i32u8imm, |
| 136678 | /* VRNDSCALEBF16Z256rmbik */ |
| 136679 | VR256X, VR256X, VK16WM, f16mem, i32u8imm, |
| 136680 | /* VRNDSCALEBF16Z256rmbikz */ |
| 136681 | VR256X, VK16WM, f16mem, i32u8imm, |
| 136682 | /* VRNDSCALEBF16Z256rmi */ |
| 136683 | VR256X, f256mem, i32u8imm, |
| 136684 | /* VRNDSCALEBF16Z256rmik */ |
| 136685 | VR256X, VR256X, VK16WM, f256mem, i32u8imm, |
| 136686 | /* VRNDSCALEBF16Z256rmikz */ |
| 136687 | VR256X, VK16WM, f256mem, i32u8imm, |
| 136688 | /* VRNDSCALEBF16Z256rri */ |
| 136689 | VR256X, VR256X, i32u8imm, |
| 136690 | /* VRNDSCALEBF16Z256rrik */ |
| 136691 | VR256X, VR256X, VK16WM, VR256X, i32u8imm, |
| 136692 | /* VRNDSCALEBF16Z256rrikz */ |
| 136693 | VR256X, VK16WM, VR256X, i32u8imm, |
| 136694 | /* VRNDSCALEBF16Zrmbi */ |
| 136695 | VR512, f16mem, i32u8imm, |
| 136696 | /* VRNDSCALEBF16Zrmbik */ |
| 136697 | VR512, VR512, VK32WM, f16mem, i32u8imm, |
| 136698 | /* VRNDSCALEBF16Zrmbikz */ |
| 136699 | VR512, VK32WM, f16mem, i32u8imm, |
| 136700 | /* VRNDSCALEBF16Zrmi */ |
| 136701 | VR512, f512mem, i32u8imm, |
| 136702 | /* VRNDSCALEBF16Zrmik */ |
| 136703 | VR512, VR512, VK32WM, f512mem, i32u8imm, |
| 136704 | /* VRNDSCALEBF16Zrmikz */ |
| 136705 | VR512, VK32WM, f512mem, i32u8imm, |
| 136706 | /* VRNDSCALEBF16Zrri */ |
| 136707 | VR512, VR512, i32u8imm, |
| 136708 | /* VRNDSCALEBF16Zrrik */ |
| 136709 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 136710 | /* VRNDSCALEBF16Zrrikz */ |
| 136711 | VR512, VK32WM, VR512, i32u8imm, |
| 136712 | /* VRNDSCALEPDZ128rmbi */ |
| 136713 | VR128X, f64mem, i32u8imm, |
| 136714 | /* VRNDSCALEPDZ128rmbik */ |
| 136715 | VR128X, VR128X, VK2WM, f64mem, i32u8imm, |
| 136716 | /* VRNDSCALEPDZ128rmbikz */ |
| 136717 | VR128X, VK2WM, f64mem, i32u8imm, |
| 136718 | /* VRNDSCALEPDZ128rmi */ |
| 136719 | VR128X, f128mem, i32u8imm, |
| 136720 | /* VRNDSCALEPDZ128rmik */ |
| 136721 | VR128X, VR128X, VK2WM, f128mem, i32u8imm, |
| 136722 | /* VRNDSCALEPDZ128rmikz */ |
| 136723 | VR128X, VK2WM, f128mem, i32u8imm, |
| 136724 | /* VRNDSCALEPDZ128rri */ |
| 136725 | VR128X, VR128X, i32u8imm, |
| 136726 | /* VRNDSCALEPDZ128rrik */ |
| 136727 | VR128X, VR128X, VK2WM, VR128X, i32u8imm, |
| 136728 | /* VRNDSCALEPDZ128rrikz */ |
| 136729 | VR128X, VK2WM, VR128X, i32u8imm, |
| 136730 | /* VRNDSCALEPDZ256rmbi */ |
| 136731 | VR256X, f64mem, i32u8imm, |
| 136732 | /* VRNDSCALEPDZ256rmbik */ |
| 136733 | VR256X, VR256X, VK4WM, f64mem, i32u8imm, |
| 136734 | /* VRNDSCALEPDZ256rmbikz */ |
| 136735 | VR256X, VK4WM, f64mem, i32u8imm, |
| 136736 | /* VRNDSCALEPDZ256rmi */ |
| 136737 | VR256X, f256mem, i32u8imm, |
| 136738 | /* VRNDSCALEPDZ256rmik */ |
| 136739 | VR256X, VR256X, VK4WM, f256mem, i32u8imm, |
| 136740 | /* VRNDSCALEPDZ256rmikz */ |
| 136741 | VR256X, VK4WM, f256mem, i32u8imm, |
| 136742 | /* VRNDSCALEPDZ256rri */ |
| 136743 | VR256X, VR256X, i32u8imm, |
| 136744 | /* VRNDSCALEPDZ256rrik */ |
| 136745 | VR256X, VR256X, VK4WM, VR256X, i32u8imm, |
| 136746 | /* VRNDSCALEPDZ256rrikz */ |
| 136747 | VR256X, VK4WM, VR256X, i32u8imm, |
| 136748 | /* VRNDSCALEPDZrmbi */ |
| 136749 | VR512, f64mem, i32u8imm, |
| 136750 | /* VRNDSCALEPDZrmbik */ |
| 136751 | VR512, VR512, VK8WM, f64mem, i32u8imm, |
| 136752 | /* VRNDSCALEPDZrmbikz */ |
| 136753 | VR512, VK8WM, f64mem, i32u8imm, |
| 136754 | /* VRNDSCALEPDZrmi */ |
| 136755 | VR512, f512mem, i32u8imm, |
| 136756 | /* VRNDSCALEPDZrmik */ |
| 136757 | VR512, VR512, VK8WM, f512mem, i32u8imm, |
| 136758 | /* VRNDSCALEPDZrmikz */ |
| 136759 | VR512, VK8WM, f512mem, i32u8imm, |
| 136760 | /* VRNDSCALEPDZrri */ |
| 136761 | VR512, VR512, i32u8imm, |
| 136762 | /* VRNDSCALEPDZrrib */ |
| 136763 | VR512, VR512, i32u8imm, |
| 136764 | /* VRNDSCALEPDZrribk */ |
| 136765 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 136766 | /* VRNDSCALEPDZrribkz */ |
| 136767 | VR512, VK8WM, VR512, i32u8imm, |
| 136768 | /* VRNDSCALEPDZrrik */ |
| 136769 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 136770 | /* VRNDSCALEPDZrrikz */ |
| 136771 | VR512, VK8WM, VR512, i32u8imm, |
| 136772 | /* VRNDSCALEPHZ128rmbi */ |
| 136773 | VR128X, f16mem, i32u8imm, |
| 136774 | /* VRNDSCALEPHZ128rmbik */ |
| 136775 | VR128X, VR128X, VK8WM, f16mem, i32u8imm, |
| 136776 | /* VRNDSCALEPHZ128rmbikz */ |
| 136777 | VR128X, VK8WM, f16mem, i32u8imm, |
| 136778 | /* VRNDSCALEPHZ128rmi */ |
| 136779 | VR128X, f128mem, i32u8imm, |
| 136780 | /* VRNDSCALEPHZ128rmik */ |
| 136781 | VR128X, VR128X, VK8WM, f128mem, i32u8imm, |
| 136782 | /* VRNDSCALEPHZ128rmikz */ |
| 136783 | VR128X, VK8WM, f128mem, i32u8imm, |
| 136784 | /* VRNDSCALEPHZ128rri */ |
| 136785 | VR128X, VR128X, i32u8imm, |
| 136786 | /* VRNDSCALEPHZ128rrik */ |
| 136787 | VR128X, VR128X, VK8WM, VR128X, i32u8imm, |
| 136788 | /* VRNDSCALEPHZ128rrikz */ |
| 136789 | VR128X, VK8WM, VR128X, i32u8imm, |
| 136790 | /* VRNDSCALEPHZ256rmbi */ |
| 136791 | VR256X, f16mem, i32u8imm, |
| 136792 | /* VRNDSCALEPHZ256rmbik */ |
| 136793 | VR256X, VR256X, VK16WM, f16mem, i32u8imm, |
| 136794 | /* VRNDSCALEPHZ256rmbikz */ |
| 136795 | VR256X, VK16WM, f16mem, i32u8imm, |
| 136796 | /* VRNDSCALEPHZ256rmi */ |
| 136797 | VR256X, f256mem, i32u8imm, |
| 136798 | /* VRNDSCALEPHZ256rmik */ |
| 136799 | VR256X, VR256X, VK16WM, f256mem, i32u8imm, |
| 136800 | /* VRNDSCALEPHZ256rmikz */ |
| 136801 | VR256X, VK16WM, f256mem, i32u8imm, |
| 136802 | /* VRNDSCALEPHZ256rri */ |
| 136803 | VR256X, VR256X, i32u8imm, |
| 136804 | /* VRNDSCALEPHZ256rrik */ |
| 136805 | VR256X, VR256X, VK16WM, VR256X, i32u8imm, |
| 136806 | /* VRNDSCALEPHZ256rrikz */ |
| 136807 | VR256X, VK16WM, VR256X, i32u8imm, |
| 136808 | /* VRNDSCALEPHZrmbi */ |
| 136809 | VR512, f16mem, i32u8imm, |
| 136810 | /* VRNDSCALEPHZrmbik */ |
| 136811 | VR512, VR512, VK32WM, f16mem, i32u8imm, |
| 136812 | /* VRNDSCALEPHZrmbikz */ |
| 136813 | VR512, VK32WM, f16mem, i32u8imm, |
| 136814 | /* VRNDSCALEPHZrmi */ |
| 136815 | VR512, f512mem, i32u8imm, |
| 136816 | /* VRNDSCALEPHZrmik */ |
| 136817 | VR512, VR512, VK32WM, f512mem, i32u8imm, |
| 136818 | /* VRNDSCALEPHZrmikz */ |
| 136819 | VR512, VK32WM, f512mem, i32u8imm, |
| 136820 | /* VRNDSCALEPHZrri */ |
| 136821 | VR512, VR512, i32u8imm, |
| 136822 | /* VRNDSCALEPHZrrib */ |
| 136823 | VR512, VR512, i32u8imm, |
| 136824 | /* VRNDSCALEPHZrribk */ |
| 136825 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 136826 | /* VRNDSCALEPHZrribkz */ |
| 136827 | VR512, VK32WM, VR512, i32u8imm, |
| 136828 | /* VRNDSCALEPHZrrik */ |
| 136829 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 136830 | /* VRNDSCALEPHZrrikz */ |
| 136831 | VR512, VK32WM, VR512, i32u8imm, |
| 136832 | /* VRNDSCALEPSZ128rmbi */ |
| 136833 | VR128X, f32mem, i32u8imm, |
| 136834 | /* VRNDSCALEPSZ128rmbik */ |
| 136835 | VR128X, VR128X, VK4WM, f32mem, i32u8imm, |
| 136836 | /* VRNDSCALEPSZ128rmbikz */ |
| 136837 | VR128X, VK4WM, f32mem, i32u8imm, |
| 136838 | /* VRNDSCALEPSZ128rmi */ |
| 136839 | VR128X, f128mem, i32u8imm, |
| 136840 | /* VRNDSCALEPSZ128rmik */ |
| 136841 | VR128X, VR128X, VK4WM, f128mem, i32u8imm, |
| 136842 | /* VRNDSCALEPSZ128rmikz */ |
| 136843 | VR128X, VK4WM, f128mem, i32u8imm, |
| 136844 | /* VRNDSCALEPSZ128rri */ |
| 136845 | VR128X, VR128X, i32u8imm, |
| 136846 | /* VRNDSCALEPSZ128rrik */ |
| 136847 | VR128X, VR128X, VK4WM, VR128X, i32u8imm, |
| 136848 | /* VRNDSCALEPSZ128rrikz */ |
| 136849 | VR128X, VK4WM, VR128X, i32u8imm, |
| 136850 | /* VRNDSCALEPSZ256rmbi */ |
| 136851 | VR256X, f32mem, i32u8imm, |
| 136852 | /* VRNDSCALEPSZ256rmbik */ |
| 136853 | VR256X, VR256X, VK8WM, f32mem, i32u8imm, |
| 136854 | /* VRNDSCALEPSZ256rmbikz */ |
| 136855 | VR256X, VK8WM, f32mem, i32u8imm, |
| 136856 | /* VRNDSCALEPSZ256rmi */ |
| 136857 | VR256X, f256mem, i32u8imm, |
| 136858 | /* VRNDSCALEPSZ256rmik */ |
| 136859 | VR256X, VR256X, VK8WM, f256mem, i32u8imm, |
| 136860 | /* VRNDSCALEPSZ256rmikz */ |
| 136861 | VR256X, VK8WM, f256mem, i32u8imm, |
| 136862 | /* VRNDSCALEPSZ256rri */ |
| 136863 | VR256X, VR256X, i32u8imm, |
| 136864 | /* VRNDSCALEPSZ256rrik */ |
| 136865 | VR256X, VR256X, VK8WM, VR256X, i32u8imm, |
| 136866 | /* VRNDSCALEPSZ256rrikz */ |
| 136867 | VR256X, VK8WM, VR256X, i32u8imm, |
| 136868 | /* VRNDSCALEPSZrmbi */ |
| 136869 | VR512, f32mem, i32u8imm, |
| 136870 | /* VRNDSCALEPSZrmbik */ |
| 136871 | VR512, VR512, VK16WM, f32mem, i32u8imm, |
| 136872 | /* VRNDSCALEPSZrmbikz */ |
| 136873 | VR512, VK16WM, f32mem, i32u8imm, |
| 136874 | /* VRNDSCALEPSZrmi */ |
| 136875 | VR512, f512mem, i32u8imm, |
| 136876 | /* VRNDSCALEPSZrmik */ |
| 136877 | VR512, VR512, VK16WM, f512mem, i32u8imm, |
| 136878 | /* VRNDSCALEPSZrmikz */ |
| 136879 | VR512, VK16WM, f512mem, i32u8imm, |
| 136880 | /* VRNDSCALEPSZrri */ |
| 136881 | VR512, VR512, i32u8imm, |
| 136882 | /* VRNDSCALEPSZrrib */ |
| 136883 | VR512, VR512, i32u8imm, |
| 136884 | /* VRNDSCALEPSZrribk */ |
| 136885 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 136886 | /* VRNDSCALEPSZrribkz */ |
| 136887 | VR512, VK16WM, VR512, i32u8imm, |
| 136888 | /* VRNDSCALEPSZrrik */ |
| 136889 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 136890 | /* VRNDSCALEPSZrrikz */ |
| 136891 | VR512, VK16WM, VR512, i32u8imm, |
| 136892 | /* VRNDSCALESDZrmi */ |
| 136893 | FR64X, FR64X, f64mem, i32u8imm, |
| 136894 | /* VRNDSCALESDZrmi_Int */ |
| 136895 | VR128X, VR128X, sdmem, i32u8imm, |
| 136896 | /* VRNDSCALESDZrmik_Int */ |
| 136897 | VR128X, VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 136898 | /* VRNDSCALESDZrmikz_Int */ |
| 136899 | VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 136900 | /* VRNDSCALESDZrri */ |
| 136901 | FR64X, FR64X, FR64X, i32u8imm, |
| 136902 | /* VRNDSCALESDZrri_Int */ |
| 136903 | VR128X, VR128X, VR128X, i32u8imm, |
| 136904 | /* VRNDSCALESDZrrib_Int */ |
| 136905 | VR128X, VR128X, VR128X, i32u8imm, |
| 136906 | /* VRNDSCALESDZrribk_Int */ |
| 136907 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136908 | /* VRNDSCALESDZrribkz_Int */ |
| 136909 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136910 | /* VRNDSCALESDZrrik_Int */ |
| 136911 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136912 | /* VRNDSCALESDZrrikz_Int */ |
| 136913 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136914 | /* VRNDSCALESHZrmi */ |
| 136915 | FR16X, FR16X, f16mem, i32u8imm, |
| 136916 | /* VRNDSCALESHZrmi_Int */ |
| 136917 | VR128X, VR128X, shmem, i32u8imm, |
| 136918 | /* VRNDSCALESHZrmik_Int */ |
| 136919 | VR128X, VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 136920 | /* VRNDSCALESHZrmikz_Int */ |
| 136921 | VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 136922 | /* VRNDSCALESHZrri */ |
| 136923 | FR16X, FR16X, FR16X, i32u8imm, |
| 136924 | /* VRNDSCALESHZrri_Int */ |
| 136925 | VR128X, VR128X, VR128X, i32u8imm, |
| 136926 | /* VRNDSCALESHZrrib_Int */ |
| 136927 | VR128X, VR128X, VR128X, i32u8imm, |
| 136928 | /* VRNDSCALESHZrribk_Int */ |
| 136929 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136930 | /* VRNDSCALESHZrribkz_Int */ |
| 136931 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136932 | /* VRNDSCALESHZrrik_Int */ |
| 136933 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136934 | /* VRNDSCALESHZrrikz_Int */ |
| 136935 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136936 | /* VRNDSCALESSZrmi */ |
| 136937 | FR32X, FR32X, f32mem, i32u8imm, |
| 136938 | /* VRNDSCALESSZrmi_Int */ |
| 136939 | VR128X, VR128X, ssmem, i32u8imm, |
| 136940 | /* VRNDSCALESSZrmik_Int */ |
| 136941 | VR128X, VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 136942 | /* VRNDSCALESSZrmikz_Int */ |
| 136943 | VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 136944 | /* VRNDSCALESSZrri */ |
| 136945 | FR32X, FR32X, FR32X, i32u8imm, |
| 136946 | /* VRNDSCALESSZrri_Int */ |
| 136947 | VR128X, VR128X, VR128X, i32u8imm, |
| 136948 | /* VRNDSCALESSZrrib_Int */ |
| 136949 | VR128X, VR128X, VR128X, i32u8imm, |
| 136950 | /* VRNDSCALESSZrribk_Int */ |
| 136951 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136952 | /* VRNDSCALESSZrribkz_Int */ |
| 136953 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136954 | /* VRNDSCALESSZrrik_Int */ |
| 136955 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136956 | /* VRNDSCALESSZrrikz_Int */ |
| 136957 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 136958 | /* VROUNDPDYmi */ |
| 136959 | VR256, f256mem, i32u8imm, |
| 136960 | /* VROUNDPDYri */ |
| 136961 | VR256, VR256, i32u8imm, |
| 136962 | /* VROUNDPDmi */ |
| 136963 | VR128, f128mem, i32u8imm, |
| 136964 | /* VROUNDPDri */ |
| 136965 | VR128, VR128, i32u8imm, |
| 136966 | /* VROUNDPSYmi */ |
| 136967 | VR256, f256mem, i32u8imm, |
| 136968 | /* VROUNDPSYri */ |
| 136969 | VR256, VR256, i32u8imm, |
| 136970 | /* VROUNDPSmi */ |
| 136971 | VR128, f128mem, i32u8imm, |
| 136972 | /* VROUNDPSri */ |
| 136973 | VR128, VR128, i32u8imm, |
| 136974 | /* VROUNDSDmi */ |
| 136975 | FR64, FR64, f64mem, i32u8imm, |
| 136976 | /* VROUNDSDmi_Int */ |
| 136977 | VR128, VR128, sdmem, i32u8imm, |
| 136978 | /* VROUNDSDri */ |
| 136979 | FR64, FR64, FR64, i32u8imm, |
| 136980 | /* VROUNDSDri_Int */ |
| 136981 | VR128, VR128, VR128, i32u8imm, |
| 136982 | /* VROUNDSSmi */ |
| 136983 | FR32, FR32, f32mem, i32u8imm, |
| 136984 | /* VROUNDSSmi_Int */ |
| 136985 | VR128, VR128, ssmem, i32u8imm, |
| 136986 | /* VROUNDSSri */ |
| 136987 | FR32, FR32, FR32, i32u8imm, |
| 136988 | /* VROUNDSSri_Int */ |
| 136989 | VR128, VR128, VR128, i32u8imm, |
| 136990 | /* VRSQRT14PDZ128m */ |
| 136991 | VR128X, f128mem, |
| 136992 | /* VRSQRT14PDZ128mb */ |
| 136993 | VR128X, f64mem, |
| 136994 | /* VRSQRT14PDZ128mbk */ |
| 136995 | VR128X, VR128X, VK2WM, f64mem, |
| 136996 | /* VRSQRT14PDZ128mbkz */ |
| 136997 | VR128X, VK2WM, f64mem, |
| 136998 | /* VRSQRT14PDZ128mk */ |
| 136999 | VR128X, VR128X, VK2WM, f128mem, |
| 137000 | /* VRSQRT14PDZ128mkz */ |
| 137001 | VR128X, VK2WM, f128mem, |
| 137002 | /* VRSQRT14PDZ128r */ |
| 137003 | VR128X, VR128X, |
| 137004 | /* VRSQRT14PDZ128rk */ |
| 137005 | VR128X, VR128X, VK2WM, VR128X, |
| 137006 | /* VRSQRT14PDZ128rkz */ |
| 137007 | VR128X, VK2WM, VR128X, |
| 137008 | /* VRSQRT14PDZ256m */ |
| 137009 | VR256X, f256mem, |
| 137010 | /* VRSQRT14PDZ256mb */ |
| 137011 | VR256X, f64mem, |
| 137012 | /* VRSQRT14PDZ256mbk */ |
| 137013 | VR256X, VR256X, VK4WM, f64mem, |
| 137014 | /* VRSQRT14PDZ256mbkz */ |
| 137015 | VR256X, VK4WM, f64mem, |
| 137016 | /* VRSQRT14PDZ256mk */ |
| 137017 | VR256X, VR256X, VK4WM, f256mem, |
| 137018 | /* VRSQRT14PDZ256mkz */ |
| 137019 | VR256X, VK4WM, f256mem, |
| 137020 | /* VRSQRT14PDZ256r */ |
| 137021 | VR256X, VR256X, |
| 137022 | /* VRSQRT14PDZ256rk */ |
| 137023 | VR256X, VR256X, VK4WM, VR256X, |
| 137024 | /* VRSQRT14PDZ256rkz */ |
| 137025 | VR256X, VK4WM, VR256X, |
| 137026 | /* VRSQRT14PDZm */ |
| 137027 | VR512, f512mem, |
| 137028 | /* VRSQRT14PDZmb */ |
| 137029 | VR512, f64mem, |
| 137030 | /* VRSQRT14PDZmbk */ |
| 137031 | VR512, VR512, VK8WM, f64mem, |
| 137032 | /* VRSQRT14PDZmbkz */ |
| 137033 | VR512, VK8WM, f64mem, |
| 137034 | /* VRSQRT14PDZmk */ |
| 137035 | VR512, VR512, VK8WM, f512mem, |
| 137036 | /* VRSQRT14PDZmkz */ |
| 137037 | VR512, VK8WM, f512mem, |
| 137038 | /* VRSQRT14PDZr */ |
| 137039 | VR512, VR512, |
| 137040 | /* VRSQRT14PDZrk */ |
| 137041 | VR512, VR512, VK8WM, VR512, |
| 137042 | /* VRSQRT14PDZrkz */ |
| 137043 | VR512, VK8WM, VR512, |
| 137044 | /* VRSQRT14PSZ128m */ |
| 137045 | VR128X, f128mem, |
| 137046 | /* VRSQRT14PSZ128mb */ |
| 137047 | VR128X, f32mem, |
| 137048 | /* VRSQRT14PSZ128mbk */ |
| 137049 | VR128X, VR128X, VK4WM, f32mem, |
| 137050 | /* VRSQRT14PSZ128mbkz */ |
| 137051 | VR128X, VK4WM, f32mem, |
| 137052 | /* VRSQRT14PSZ128mk */ |
| 137053 | VR128X, VR128X, VK4WM, f128mem, |
| 137054 | /* VRSQRT14PSZ128mkz */ |
| 137055 | VR128X, VK4WM, f128mem, |
| 137056 | /* VRSQRT14PSZ128r */ |
| 137057 | VR128X, VR128X, |
| 137058 | /* VRSQRT14PSZ128rk */ |
| 137059 | VR128X, VR128X, VK4WM, VR128X, |
| 137060 | /* VRSQRT14PSZ128rkz */ |
| 137061 | VR128X, VK4WM, VR128X, |
| 137062 | /* VRSQRT14PSZ256m */ |
| 137063 | VR256X, f256mem, |
| 137064 | /* VRSQRT14PSZ256mb */ |
| 137065 | VR256X, f32mem, |
| 137066 | /* VRSQRT14PSZ256mbk */ |
| 137067 | VR256X, VR256X, VK8WM, f32mem, |
| 137068 | /* VRSQRT14PSZ256mbkz */ |
| 137069 | VR256X, VK8WM, f32mem, |
| 137070 | /* VRSQRT14PSZ256mk */ |
| 137071 | VR256X, VR256X, VK8WM, f256mem, |
| 137072 | /* VRSQRT14PSZ256mkz */ |
| 137073 | VR256X, VK8WM, f256mem, |
| 137074 | /* VRSQRT14PSZ256r */ |
| 137075 | VR256X, VR256X, |
| 137076 | /* VRSQRT14PSZ256rk */ |
| 137077 | VR256X, VR256X, VK8WM, VR256X, |
| 137078 | /* VRSQRT14PSZ256rkz */ |
| 137079 | VR256X, VK8WM, VR256X, |
| 137080 | /* VRSQRT14PSZm */ |
| 137081 | VR512, f512mem, |
| 137082 | /* VRSQRT14PSZmb */ |
| 137083 | VR512, f32mem, |
| 137084 | /* VRSQRT14PSZmbk */ |
| 137085 | VR512, VR512, VK16WM, f32mem, |
| 137086 | /* VRSQRT14PSZmbkz */ |
| 137087 | VR512, VK16WM, f32mem, |
| 137088 | /* VRSQRT14PSZmk */ |
| 137089 | VR512, VR512, VK16WM, f512mem, |
| 137090 | /* VRSQRT14PSZmkz */ |
| 137091 | VR512, VK16WM, f512mem, |
| 137092 | /* VRSQRT14PSZr */ |
| 137093 | VR512, VR512, |
| 137094 | /* VRSQRT14PSZrk */ |
| 137095 | VR512, VR512, VK16WM, VR512, |
| 137096 | /* VRSQRT14PSZrkz */ |
| 137097 | VR512, VK16WM, VR512, |
| 137098 | /* VRSQRT14SDZrm */ |
| 137099 | VR128X, VR128X, sdmem, |
| 137100 | /* VRSQRT14SDZrmk */ |
| 137101 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 137102 | /* VRSQRT14SDZrmkz */ |
| 137103 | VR128X, VK1WM, VR128X, sdmem, |
| 137104 | /* VRSQRT14SDZrr */ |
| 137105 | VR128X, VR128X, VR128X, |
| 137106 | /* VRSQRT14SDZrrk */ |
| 137107 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 137108 | /* VRSQRT14SDZrrkz */ |
| 137109 | VR128X, VK1WM, VR128X, VR128X, |
| 137110 | /* VRSQRT14SSZrm */ |
| 137111 | VR128X, VR128X, ssmem, |
| 137112 | /* VRSQRT14SSZrmk */ |
| 137113 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 137114 | /* VRSQRT14SSZrmkz */ |
| 137115 | VR128X, VK1WM, VR128X, ssmem, |
| 137116 | /* VRSQRT14SSZrr */ |
| 137117 | VR128X, VR128X, VR128X, |
| 137118 | /* VRSQRT14SSZrrk */ |
| 137119 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 137120 | /* VRSQRT14SSZrrkz */ |
| 137121 | VR128X, VK1WM, VR128X, VR128X, |
| 137122 | /* VRSQRT28PDZm */ |
| 137123 | VR512, f512mem, |
| 137124 | /* VRSQRT28PDZmb */ |
| 137125 | VR512, f64mem, |
| 137126 | /* VRSQRT28PDZmbk */ |
| 137127 | VR512, VR512, VK8WM, f64mem, |
| 137128 | /* VRSQRT28PDZmbkz */ |
| 137129 | VR512, VK8WM, f64mem, |
| 137130 | /* VRSQRT28PDZmk */ |
| 137131 | VR512, VR512, VK8WM, f512mem, |
| 137132 | /* VRSQRT28PDZmkz */ |
| 137133 | VR512, VK8WM, f512mem, |
| 137134 | /* VRSQRT28PDZr */ |
| 137135 | VR512, VR512, |
| 137136 | /* VRSQRT28PDZrb */ |
| 137137 | VR512, VR512, |
| 137138 | /* VRSQRT28PDZrbk */ |
| 137139 | VR512, VR512, VK8WM, VR512, |
| 137140 | /* VRSQRT28PDZrbkz */ |
| 137141 | VR512, VK8WM, VR512, |
| 137142 | /* VRSQRT28PDZrk */ |
| 137143 | VR512, VR512, VK8WM, VR512, |
| 137144 | /* VRSQRT28PDZrkz */ |
| 137145 | VR512, VK8WM, VR512, |
| 137146 | /* VRSQRT28PSZm */ |
| 137147 | VR512, f512mem, |
| 137148 | /* VRSQRT28PSZmb */ |
| 137149 | VR512, f32mem, |
| 137150 | /* VRSQRT28PSZmbk */ |
| 137151 | VR512, VR512, VK16WM, f32mem, |
| 137152 | /* VRSQRT28PSZmbkz */ |
| 137153 | VR512, VK16WM, f32mem, |
| 137154 | /* VRSQRT28PSZmk */ |
| 137155 | VR512, VR512, VK16WM, f512mem, |
| 137156 | /* VRSQRT28PSZmkz */ |
| 137157 | VR512, VK16WM, f512mem, |
| 137158 | /* VRSQRT28PSZr */ |
| 137159 | VR512, VR512, |
| 137160 | /* VRSQRT28PSZrb */ |
| 137161 | VR512, VR512, |
| 137162 | /* VRSQRT28PSZrbk */ |
| 137163 | VR512, VR512, VK16WM, VR512, |
| 137164 | /* VRSQRT28PSZrbkz */ |
| 137165 | VR512, VK16WM, VR512, |
| 137166 | /* VRSQRT28PSZrk */ |
| 137167 | VR512, VR512, VK16WM, VR512, |
| 137168 | /* VRSQRT28PSZrkz */ |
| 137169 | VR512, VK16WM, VR512, |
| 137170 | /* VRSQRT28SDZm */ |
| 137171 | VR128X, VR128X, sdmem, |
| 137172 | /* VRSQRT28SDZmk */ |
| 137173 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 137174 | /* VRSQRT28SDZmkz */ |
| 137175 | VR128X, VK1WM, VR128X, sdmem, |
| 137176 | /* VRSQRT28SDZr */ |
| 137177 | VR128X, VR128X, VR128X, |
| 137178 | /* VRSQRT28SDZrb */ |
| 137179 | VR128X, VR128X, VR128X, |
| 137180 | /* VRSQRT28SDZrbk */ |
| 137181 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 137182 | /* VRSQRT28SDZrbkz */ |
| 137183 | VR128X, VK1WM, VR128X, VR128X, |
| 137184 | /* VRSQRT28SDZrk */ |
| 137185 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 137186 | /* VRSQRT28SDZrkz */ |
| 137187 | VR128X, VK1WM, VR128X, VR128X, |
| 137188 | /* VRSQRT28SSZm */ |
| 137189 | VR128X, VR128X, ssmem, |
| 137190 | /* VRSQRT28SSZmk */ |
| 137191 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 137192 | /* VRSQRT28SSZmkz */ |
| 137193 | VR128X, VK1WM, VR128X, ssmem, |
| 137194 | /* VRSQRT28SSZr */ |
| 137195 | VR128X, VR128X, VR128X, |
| 137196 | /* VRSQRT28SSZrb */ |
| 137197 | VR128X, VR128X, VR128X, |
| 137198 | /* VRSQRT28SSZrbk */ |
| 137199 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 137200 | /* VRSQRT28SSZrbkz */ |
| 137201 | VR128X, VK1WM, VR128X, VR128X, |
| 137202 | /* VRSQRT28SSZrk */ |
| 137203 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 137204 | /* VRSQRT28SSZrkz */ |
| 137205 | VR128X, VK1WM, VR128X, VR128X, |
| 137206 | /* VRSQRTBF16Z128m */ |
| 137207 | VR128X, f128mem, |
| 137208 | /* VRSQRTBF16Z128mb */ |
| 137209 | VR128X, f16mem, |
| 137210 | /* VRSQRTBF16Z128mbk */ |
| 137211 | VR128X, VR128X, VK8WM, f16mem, |
| 137212 | /* VRSQRTBF16Z128mbkz */ |
| 137213 | VR128X, VK8WM, f16mem, |
| 137214 | /* VRSQRTBF16Z128mk */ |
| 137215 | VR128X, VR128X, VK8WM, f128mem, |
| 137216 | /* VRSQRTBF16Z128mkz */ |
| 137217 | VR128X, VK8WM, f128mem, |
| 137218 | /* VRSQRTBF16Z128r */ |
| 137219 | VR128X, VR128X, |
| 137220 | /* VRSQRTBF16Z128rk */ |
| 137221 | VR128X, VR128X, VK8WM, VR128X, |
| 137222 | /* VRSQRTBF16Z128rkz */ |
| 137223 | VR128X, VK8WM, VR128X, |
| 137224 | /* VRSQRTBF16Z256m */ |
| 137225 | VR256X, f256mem, |
| 137226 | /* VRSQRTBF16Z256mb */ |
| 137227 | VR256X, f16mem, |
| 137228 | /* VRSQRTBF16Z256mbk */ |
| 137229 | VR256X, VR256X, VK16WM, f16mem, |
| 137230 | /* VRSQRTBF16Z256mbkz */ |
| 137231 | VR256X, VK16WM, f16mem, |
| 137232 | /* VRSQRTBF16Z256mk */ |
| 137233 | VR256X, VR256X, VK16WM, f256mem, |
| 137234 | /* VRSQRTBF16Z256mkz */ |
| 137235 | VR256X, VK16WM, f256mem, |
| 137236 | /* VRSQRTBF16Z256r */ |
| 137237 | VR256X, VR256X, |
| 137238 | /* VRSQRTBF16Z256rk */ |
| 137239 | VR256X, VR256X, VK16WM, VR256X, |
| 137240 | /* VRSQRTBF16Z256rkz */ |
| 137241 | VR256X, VK16WM, VR256X, |
| 137242 | /* VRSQRTBF16Zm */ |
| 137243 | VR512, f512mem, |
| 137244 | /* VRSQRTBF16Zmb */ |
| 137245 | VR512, f16mem, |
| 137246 | /* VRSQRTBF16Zmbk */ |
| 137247 | VR512, VR512, VK32WM, f16mem, |
| 137248 | /* VRSQRTBF16Zmbkz */ |
| 137249 | VR512, VK32WM, f16mem, |
| 137250 | /* VRSQRTBF16Zmk */ |
| 137251 | VR512, VR512, VK32WM, f512mem, |
| 137252 | /* VRSQRTBF16Zmkz */ |
| 137253 | VR512, VK32WM, f512mem, |
| 137254 | /* VRSQRTBF16Zr */ |
| 137255 | VR512, VR512, |
| 137256 | /* VRSQRTBF16Zrk */ |
| 137257 | VR512, VR512, VK32WM, VR512, |
| 137258 | /* VRSQRTBF16Zrkz */ |
| 137259 | VR512, VK32WM, VR512, |
| 137260 | /* VRSQRTPHZ128m */ |
| 137261 | VR128X, f128mem, |
| 137262 | /* VRSQRTPHZ128mb */ |
| 137263 | VR128X, f16mem, |
| 137264 | /* VRSQRTPHZ128mbk */ |
| 137265 | VR128X, VR128X, VK8WM, f16mem, |
| 137266 | /* VRSQRTPHZ128mbkz */ |
| 137267 | VR128X, VK8WM, f16mem, |
| 137268 | /* VRSQRTPHZ128mk */ |
| 137269 | VR128X, VR128X, VK8WM, f128mem, |
| 137270 | /* VRSQRTPHZ128mkz */ |
| 137271 | VR128X, VK8WM, f128mem, |
| 137272 | /* VRSQRTPHZ128r */ |
| 137273 | VR128X, VR128X, |
| 137274 | /* VRSQRTPHZ128rk */ |
| 137275 | VR128X, VR128X, VK8WM, VR128X, |
| 137276 | /* VRSQRTPHZ128rkz */ |
| 137277 | VR128X, VK8WM, VR128X, |
| 137278 | /* VRSQRTPHZ256m */ |
| 137279 | VR256X, f256mem, |
| 137280 | /* VRSQRTPHZ256mb */ |
| 137281 | VR256X, f16mem, |
| 137282 | /* VRSQRTPHZ256mbk */ |
| 137283 | VR256X, VR256X, VK16WM, f16mem, |
| 137284 | /* VRSQRTPHZ256mbkz */ |
| 137285 | VR256X, VK16WM, f16mem, |
| 137286 | /* VRSQRTPHZ256mk */ |
| 137287 | VR256X, VR256X, VK16WM, f256mem, |
| 137288 | /* VRSQRTPHZ256mkz */ |
| 137289 | VR256X, VK16WM, f256mem, |
| 137290 | /* VRSQRTPHZ256r */ |
| 137291 | VR256X, VR256X, |
| 137292 | /* VRSQRTPHZ256rk */ |
| 137293 | VR256X, VR256X, VK16WM, VR256X, |
| 137294 | /* VRSQRTPHZ256rkz */ |
| 137295 | VR256X, VK16WM, VR256X, |
| 137296 | /* VRSQRTPHZm */ |
| 137297 | VR512, f512mem, |
| 137298 | /* VRSQRTPHZmb */ |
| 137299 | VR512, f16mem, |
| 137300 | /* VRSQRTPHZmbk */ |
| 137301 | VR512, VR512, VK32WM, f16mem, |
| 137302 | /* VRSQRTPHZmbkz */ |
| 137303 | VR512, VK32WM, f16mem, |
| 137304 | /* VRSQRTPHZmk */ |
| 137305 | VR512, VR512, VK32WM, f512mem, |
| 137306 | /* VRSQRTPHZmkz */ |
| 137307 | VR512, VK32WM, f512mem, |
| 137308 | /* VRSQRTPHZr */ |
| 137309 | VR512, VR512, |
| 137310 | /* VRSQRTPHZrk */ |
| 137311 | VR512, VR512, VK32WM, VR512, |
| 137312 | /* VRSQRTPHZrkz */ |
| 137313 | VR512, VK32WM, VR512, |
| 137314 | /* VRSQRTPSYm */ |
| 137315 | VR256, f256mem, |
| 137316 | /* VRSQRTPSYr */ |
| 137317 | VR256, VR256, |
| 137318 | /* VRSQRTPSm */ |
| 137319 | VR128, f128mem, |
| 137320 | /* VRSQRTPSr */ |
| 137321 | VR128, VR128, |
| 137322 | /* VRSQRTSHZrm */ |
| 137323 | VR128X, VR128X, shmem, |
| 137324 | /* VRSQRTSHZrmk */ |
| 137325 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 137326 | /* VRSQRTSHZrmkz */ |
| 137327 | VR128X, VK1WM, VR128X, shmem, |
| 137328 | /* VRSQRTSHZrr */ |
| 137329 | VR128X, VR128X, VR128X, |
| 137330 | /* VRSQRTSHZrrk */ |
| 137331 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 137332 | /* VRSQRTSHZrrkz */ |
| 137333 | VR128X, VK1WM, VR128X, VR128X, |
| 137334 | /* VRSQRTSSm */ |
| 137335 | FR32, FR32, f32mem, |
| 137336 | /* VRSQRTSSm_Int */ |
| 137337 | VR128, VR128, ssmem, |
| 137338 | /* VRSQRTSSr */ |
| 137339 | FR32, FR32, FR32, |
| 137340 | /* VRSQRTSSr_Int */ |
| 137341 | VR128, VR128, VR128, |
| 137342 | /* VSCALEFBF16Z128rm */ |
| 137343 | VR128X, VR128X, f128mem, |
| 137344 | /* VSCALEFBF16Z128rmb */ |
| 137345 | VR128X, VR128X, f16mem, |
| 137346 | /* VSCALEFBF16Z128rmbk */ |
| 137347 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 137348 | /* VSCALEFBF16Z128rmbkz */ |
| 137349 | VR128X, VK8WM, VR128X, f16mem, |
| 137350 | /* VSCALEFBF16Z128rmk */ |
| 137351 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 137352 | /* VSCALEFBF16Z128rmkz */ |
| 137353 | VR128X, VK8WM, VR128X, f128mem, |
| 137354 | /* VSCALEFBF16Z128rr */ |
| 137355 | VR128X, VR128X, VR128X, |
| 137356 | /* VSCALEFBF16Z128rrk */ |
| 137357 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 137358 | /* VSCALEFBF16Z128rrkz */ |
| 137359 | VR128X, VK8WM, VR128X, VR128X, |
| 137360 | /* VSCALEFBF16Z256rm */ |
| 137361 | VR256X, VR256X, f256mem, |
| 137362 | /* VSCALEFBF16Z256rmb */ |
| 137363 | VR256X, VR256X, f16mem, |
| 137364 | /* VSCALEFBF16Z256rmbk */ |
| 137365 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 137366 | /* VSCALEFBF16Z256rmbkz */ |
| 137367 | VR256X, VK16WM, VR256X, f16mem, |
| 137368 | /* VSCALEFBF16Z256rmk */ |
| 137369 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 137370 | /* VSCALEFBF16Z256rmkz */ |
| 137371 | VR256X, VK16WM, VR256X, f256mem, |
| 137372 | /* VSCALEFBF16Z256rr */ |
| 137373 | VR256X, VR256X, VR256X, |
| 137374 | /* VSCALEFBF16Z256rrk */ |
| 137375 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 137376 | /* VSCALEFBF16Z256rrkz */ |
| 137377 | VR256X, VK16WM, VR256X, VR256X, |
| 137378 | /* VSCALEFBF16Zrm */ |
| 137379 | VR512, VR512, f512mem, |
| 137380 | /* VSCALEFBF16Zrmb */ |
| 137381 | VR512, VR512, f16mem, |
| 137382 | /* VSCALEFBF16Zrmbk */ |
| 137383 | VR512, VR512, VK32WM, VR512, f16mem, |
| 137384 | /* VSCALEFBF16Zrmbkz */ |
| 137385 | VR512, VK32WM, VR512, f16mem, |
| 137386 | /* VSCALEFBF16Zrmk */ |
| 137387 | VR512, VR512, VK32WM, VR512, f512mem, |
| 137388 | /* VSCALEFBF16Zrmkz */ |
| 137389 | VR512, VK32WM, VR512, f512mem, |
| 137390 | /* VSCALEFBF16Zrr */ |
| 137391 | VR512, VR512, VR512, |
| 137392 | /* VSCALEFBF16Zrrk */ |
| 137393 | VR512, VR512, VK32WM, VR512, VR512, |
| 137394 | /* VSCALEFBF16Zrrkz */ |
| 137395 | VR512, VK32WM, VR512, VR512, |
| 137396 | /* VSCALEFPDZ128rm */ |
| 137397 | VR128X, VR128X, f128mem, |
| 137398 | /* VSCALEFPDZ128rmb */ |
| 137399 | VR128X, VR128X, f64mem, |
| 137400 | /* VSCALEFPDZ128rmbk */ |
| 137401 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 137402 | /* VSCALEFPDZ128rmbkz */ |
| 137403 | VR128X, VK2WM, VR128X, f64mem, |
| 137404 | /* VSCALEFPDZ128rmk */ |
| 137405 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 137406 | /* VSCALEFPDZ128rmkz */ |
| 137407 | VR128X, VK2WM, VR128X, f128mem, |
| 137408 | /* VSCALEFPDZ128rr */ |
| 137409 | VR128X, VR128X, VR128X, |
| 137410 | /* VSCALEFPDZ128rrk */ |
| 137411 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 137412 | /* VSCALEFPDZ128rrkz */ |
| 137413 | VR128X, VK2WM, VR128X, VR128X, |
| 137414 | /* VSCALEFPDZ256rm */ |
| 137415 | VR256X, VR256X, f256mem, |
| 137416 | /* VSCALEFPDZ256rmb */ |
| 137417 | VR256X, VR256X, f64mem, |
| 137418 | /* VSCALEFPDZ256rmbk */ |
| 137419 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 137420 | /* VSCALEFPDZ256rmbkz */ |
| 137421 | VR256X, VK4WM, VR256X, f64mem, |
| 137422 | /* VSCALEFPDZ256rmk */ |
| 137423 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 137424 | /* VSCALEFPDZ256rmkz */ |
| 137425 | VR256X, VK4WM, VR256X, f256mem, |
| 137426 | /* VSCALEFPDZ256rr */ |
| 137427 | VR256X, VR256X, VR256X, |
| 137428 | /* VSCALEFPDZ256rrk */ |
| 137429 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 137430 | /* VSCALEFPDZ256rrkz */ |
| 137431 | VR256X, VK4WM, VR256X, VR256X, |
| 137432 | /* VSCALEFPDZrm */ |
| 137433 | VR512, VR512, f512mem, |
| 137434 | /* VSCALEFPDZrmb */ |
| 137435 | VR512, VR512, f64mem, |
| 137436 | /* VSCALEFPDZrmbk */ |
| 137437 | VR512, VR512, VK8WM, VR512, f64mem, |
| 137438 | /* VSCALEFPDZrmbkz */ |
| 137439 | VR512, VK8WM, VR512, f64mem, |
| 137440 | /* VSCALEFPDZrmk */ |
| 137441 | VR512, VR512, VK8WM, VR512, f512mem, |
| 137442 | /* VSCALEFPDZrmkz */ |
| 137443 | VR512, VK8WM, VR512, f512mem, |
| 137444 | /* VSCALEFPDZrr */ |
| 137445 | VR512, VR512, VR512, |
| 137446 | /* VSCALEFPDZrrb */ |
| 137447 | VR512, VR512, VR512, AVX512RC, |
| 137448 | /* VSCALEFPDZrrbk */ |
| 137449 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 137450 | /* VSCALEFPDZrrbkz */ |
| 137451 | VR512, VK8WM, VR512, VR512, AVX512RC, |
| 137452 | /* VSCALEFPDZrrk */ |
| 137453 | VR512, VR512, VK8WM, VR512, VR512, |
| 137454 | /* VSCALEFPDZrrkz */ |
| 137455 | VR512, VK8WM, VR512, VR512, |
| 137456 | /* VSCALEFPHZ128rm */ |
| 137457 | VR128X, VR128X, f128mem, |
| 137458 | /* VSCALEFPHZ128rmb */ |
| 137459 | VR128X, VR128X, f16mem, |
| 137460 | /* VSCALEFPHZ128rmbk */ |
| 137461 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 137462 | /* VSCALEFPHZ128rmbkz */ |
| 137463 | VR128X, VK8WM, VR128X, f16mem, |
| 137464 | /* VSCALEFPHZ128rmk */ |
| 137465 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 137466 | /* VSCALEFPHZ128rmkz */ |
| 137467 | VR128X, VK8WM, VR128X, f128mem, |
| 137468 | /* VSCALEFPHZ128rr */ |
| 137469 | VR128X, VR128X, VR128X, |
| 137470 | /* VSCALEFPHZ128rrk */ |
| 137471 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 137472 | /* VSCALEFPHZ128rrkz */ |
| 137473 | VR128X, VK8WM, VR128X, VR128X, |
| 137474 | /* VSCALEFPHZ256rm */ |
| 137475 | VR256X, VR256X, f256mem, |
| 137476 | /* VSCALEFPHZ256rmb */ |
| 137477 | VR256X, VR256X, f16mem, |
| 137478 | /* VSCALEFPHZ256rmbk */ |
| 137479 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 137480 | /* VSCALEFPHZ256rmbkz */ |
| 137481 | VR256X, VK16WM, VR256X, f16mem, |
| 137482 | /* VSCALEFPHZ256rmk */ |
| 137483 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 137484 | /* VSCALEFPHZ256rmkz */ |
| 137485 | VR256X, VK16WM, VR256X, f256mem, |
| 137486 | /* VSCALEFPHZ256rr */ |
| 137487 | VR256X, VR256X, VR256X, |
| 137488 | /* VSCALEFPHZ256rrk */ |
| 137489 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 137490 | /* VSCALEFPHZ256rrkz */ |
| 137491 | VR256X, VK16WM, VR256X, VR256X, |
| 137492 | /* VSCALEFPHZrm */ |
| 137493 | VR512, VR512, f512mem, |
| 137494 | /* VSCALEFPHZrmb */ |
| 137495 | VR512, VR512, f16mem, |
| 137496 | /* VSCALEFPHZrmbk */ |
| 137497 | VR512, VR512, VK32WM, VR512, f16mem, |
| 137498 | /* VSCALEFPHZrmbkz */ |
| 137499 | VR512, VK32WM, VR512, f16mem, |
| 137500 | /* VSCALEFPHZrmk */ |
| 137501 | VR512, VR512, VK32WM, VR512, f512mem, |
| 137502 | /* VSCALEFPHZrmkz */ |
| 137503 | VR512, VK32WM, VR512, f512mem, |
| 137504 | /* VSCALEFPHZrr */ |
| 137505 | VR512, VR512, VR512, |
| 137506 | /* VSCALEFPHZrrb */ |
| 137507 | VR512, VR512, VR512, AVX512RC, |
| 137508 | /* VSCALEFPHZrrbk */ |
| 137509 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 137510 | /* VSCALEFPHZrrbkz */ |
| 137511 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 137512 | /* VSCALEFPHZrrk */ |
| 137513 | VR512, VR512, VK32WM, VR512, VR512, |
| 137514 | /* VSCALEFPHZrrkz */ |
| 137515 | VR512, VK32WM, VR512, VR512, |
| 137516 | /* VSCALEFPSZ128rm */ |
| 137517 | VR128X, VR128X, f128mem, |
| 137518 | /* VSCALEFPSZ128rmb */ |
| 137519 | VR128X, VR128X, f32mem, |
| 137520 | /* VSCALEFPSZ128rmbk */ |
| 137521 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 137522 | /* VSCALEFPSZ128rmbkz */ |
| 137523 | VR128X, VK4WM, VR128X, f32mem, |
| 137524 | /* VSCALEFPSZ128rmk */ |
| 137525 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 137526 | /* VSCALEFPSZ128rmkz */ |
| 137527 | VR128X, VK4WM, VR128X, f128mem, |
| 137528 | /* VSCALEFPSZ128rr */ |
| 137529 | VR128X, VR128X, VR128X, |
| 137530 | /* VSCALEFPSZ128rrk */ |
| 137531 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 137532 | /* VSCALEFPSZ128rrkz */ |
| 137533 | VR128X, VK4WM, VR128X, VR128X, |
| 137534 | /* VSCALEFPSZ256rm */ |
| 137535 | VR256X, VR256X, f256mem, |
| 137536 | /* VSCALEFPSZ256rmb */ |
| 137537 | VR256X, VR256X, f32mem, |
| 137538 | /* VSCALEFPSZ256rmbk */ |
| 137539 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 137540 | /* VSCALEFPSZ256rmbkz */ |
| 137541 | VR256X, VK8WM, VR256X, f32mem, |
| 137542 | /* VSCALEFPSZ256rmk */ |
| 137543 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 137544 | /* VSCALEFPSZ256rmkz */ |
| 137545 | VR256X, VK8WM, VR256X, f256mem, |
| 137546 | /* VSCALEFPSZ256rr */ |
| 137547 | VR256X, VR256X, VR256X, |
| 137548 | /* VSCALEFPSZ256rrk */ |
| 137549 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 137550 | /* VSCALEFPSZ256rrkz */ |
| 137551 | VR256X, VK8WM, VR256X, VR256X, |
| 137552 | /* VSCALEFPSZrm */ |
| 137553 | VR512, VR512, f512mem, |
| 137554 | /* VSCALEFPSZrmb */ |
| 137555 | VR512, VR512, f32mem, |
| 137556 | /* VSCALEFPSZrmbk */ |
| 137557 | VR512, VR512, VK16WM, VR512, f32mem, |
| 137558 | /* VSCALEFPSZrmbkz */ |
| 137559 | VR512, VK16WM, VR512, f32mem, |
| 137560 | /* VSCALEFPSZrmk */ |
| 137561 | VR512, VR512, VK16WM, VR512, f512mem, |
| 137562 | /* VSCALEFPSZrmkz */ |
| 137563 | VR512, VK16WM, VR512, f512mem, |
| 137564 | /* VSCALEFPSZrr */ |
| 137565 | VR512, VR512, VR512, |
| 137566 | /* VSCALEFPSZrrb */ |
| 137567 | VR512, VR512, VR512, AVX512RC, |
| 137568 | /* VSCALEFPSZrrbk */ |
| 137569 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 137570 | /* VSCALEFPSZrrbkz */ |
| 137571 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 137572 | /* VSCALEFPSZrrk */ |
| 137573 | VR512, VR512, VK16WM, VR512, VR512, |
| 137574 | /* VSCALEFPSZrrkz */ |
| 137575 | VR512, VK16WM, VR512, VR512, |
| 137576 | /* VSCALEFSDZrm */ |
| 137577 | VR128X, VR128X, sdmem, |
| 137578 | /* VSCALEFSDZrmk */ |
| 137579 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 137580 | /* VSCALEFSDZrmkz */ |
| 137581 | VR128X, VK1WM, VR128X, sdmem, |
| 137582 | /* VSCALEFSDZrr */ |
| 137583 | VR128X, VR128X, VR128X, |
| 137584 | /* VSCALEFSDZrrb_Int */ |
| 137585 | VR128X, VR128X, VR128X, AVX512RC, |
| 137586 | /* VSCALEFSDZrrbk_Int */ |
| 137587 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 137588 | /* VSCALEFSDZrrbkz_Int */ |
| 137589 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 137590 | /* VSCALEFSDZrrk */ |
| 137591 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 137592 | /* VSCALEFSDZrrkz */ |
| 137593 | VR128X, VK1WM, VR128X, VR128X, |
| 137594 | /* VSCALEFSHZrm */ |
| 137595 | VR128X, VR128X, shmem, |
| 137596 | /* VSCALEFSHZrmk */ |
| 137597 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 137598 | /* VSCALEFSHZrmkz */ |
| 137599 | VR128X, VK1WM, VR128X, shmem, |
| 137600 | /* VSCALEFSHZrr */ |
| 137601 | VR128X, VR128X, VR128X, |
| 137602 | /* VSCALEFSHZrrb_Int */ |
| 137603 | VR128X, VR128X, VR128X, AVX512RC, |
| 137604 | /* VSCALEFSHZrrbk_Int */ |
| 137605 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 137606 | /* VSCALEFSHZrrbkz_Int */ |
| 137607 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 137608 | /* VSCALEFSHZrrk */ |
| 137609 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 137610 | /* VSCALEFSHZrrkz */ |
| 137611 | VR128X, VK1WM, VR128X, VR128X, |
| 137612 | /* VSCALEFSSZrm */ |
| 137613 | VR128X, VR128X, ssmem, |
| 137614 | /* VSCALEFSSZrmk */ |
| 137615 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 137616 | /* VSCALEFSSZrmkz */ |
| 137617 | VR128X, VK1WM, VR128X, ssmem, |
| 137618 | /* VSCALEFSSZrr */ |
| 137619 | VR128X, VR128X, VR128X, |
| 137620 | /* VSCALEFSSZrrb_Int */ |
| 137621 | VR128X, VR128X, VR128X, AVX512RC, |
| 137622 | /* VSCALEFSSZrrbk_Int */ |
| 137623 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 137624 | /* VSCALEFSSZrrbkz_Int */ |
| 137625 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 137626 | /* VSCALEFSSZrrk */ |
| 137627 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 137628 | /* VSCALEFSSZrrkz */ |
| 137629 | VR128X, VK1WM, VR128X, VR128X, |
| 137630 | /* VSCATTERDPDZ128mr */ |
| 137631 | VK2WM, vx64xmem, VK2WM, VR128X, |
| 137632 | /* VSCATTERDPDZ256mr */ |
| 137633 | VK4WM, vx64xmem, VK4WM, VR256X, |
| 137634 | /* VSCATTERDPDZmr */ |
| 137635 | VK8WM, vy64xmem, VK8WM, VR512, |
| 137636 | /* VSCATTERDPSZ128mr */ |
| 137637 | VK4WM, vx32xmem, VK4WM, VR128X, |
| 137638 | /* VSCATTERDPSZ256mr */ |
| 137639 | VK8WM, vy32xmem, VK8WM, VR256X, |
| 137640 | /* VSCATTERDPSZmr */ |
| 137641 | VK16WM, vz32mem, VK16WM, VR512, |
| 137642 | /* VSCATTERPF0DPDm */ |
| 137643 | VK8WM, vy64xmem, |
| 137644 | /* VSCATTERPF0DPSm */ |
| 137645 | VK16WM, vz32mem, |
| 137646 | /* VSCATTERPF0QPDm */ |
| 137647 | VK8WM, vz64mem, |
| 137648 | /* VSCATTERPF0QPSm */ |
| 137649 | VK8WM, vz32mem, |
| 137650 | /* VSCATTERPF1DPDm */ |
| 137651 | VK8WM, vy64xmem, |
| 137652 | /* VSCATTERPF1DPSm */ |
| 137653 | VK16WM, vz32mem, |
| 137654 | /* VSCATTERPF1QPDm */ |
| 137655 | VK8WM, vz64mem, |
| 137656 | /* VSCATTERPF1QPSm */ |
| 137657 | VK8WM, vz32mem, |
| 137658 | /* VSCATTERQPDZ128mr */ |
| 137659 | VK2WM, vx64xmem, VK2WM, VR128X, |
| 137660 | /* VSCATTERQPDZ256mr */ |
| 137661 | VK4WM, vy64xmem, VK4WM, VR256X, |
| 137662 | /* VSCATTERQPDZmr */ |
| 137663 | VK8WM, vz64mem, VK8WM, VR512, |
| 137664 | /* VSCATTERQPSZ128mr */ |
| 137665 | VK2WM, vx32xmem, VK2WM, VR128X, |
| 137666 | /* VSCATTERQPSZ256mr */ |
| 137667 | VK4WM, vy32xmem, VK4WM, VR128X, |
| 137668 | /* VSCATTERQPSZmr */ |
| 137669 | VK8WM, vz32mem, VK8WM, VR256X, |
| 137670 | /* VSHA512MSG1rr */ |
| 137671 | VR256, VR256, VR128, |
| 137672 | /* VSHA512MSG2rr */ |
| 137673 | VR256, VR256, VR256, |
| 137674 | /* VSHA512RNDS2rr */ |
| 137675 | VR256, VR256, VR256, VR128, |
| 137676 | /* VSHUFF32X4Z256rmbi */ |
| 137677 | VR256X, VR256X, f32mem, u8imm, |
| 137678 | /* VSHUFF32X4Z256rmbik */ |
| 137679 | VR256X, VR256X, VK8WM, VR256X, f32mem, u8imm, |
| 137680 | /* VSHUFF32X4Z256rmbikz */ |
| 137681 | VR256X, VK8WM, VR256X, f32mem, u8imm, |
| 137682 | /* VSHUFF32X4Z256rmi */ |
| 137683 | VR256X, VR256X, f256mem, u8imm, |
| 137684 | /* VSHUFF32X4Z256rmik */ |
| 137685 | VR256X, VR256X, VK8WM, VR256X, f256mem, u8imm, |
| 137686 | /* VSHUFF32X4Z256rmikz */ |
| 137687 | VR256X, VK8WM, VR256X, f256mem, u8imm, |
| 137688 | /* VSHUFF32X4Z256rri */ |
| 137689 | VR256X, VR256X, VR256X, u8imm, |
| 137690 | /* VSHUFF32X4Z256rrik */ |
| 137691 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 137692 | /* VSHUFF32X4Z256rrikz */ |
| 137693 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 137694 | /* VSHUFF32X4Zrmbi */ |
| 137695 | VR512, VR512, f32mem, u8imm, |
| 137696 | /* VSHUFF32X4Zrmbik */ |
| 137697 | VR512, VR512, VK16WM, VR512, f32mem, u8imm, |
| 137698 | /* VSHUFF32X4Zrmbikz */ |
| 137699 | VR512, VK16WM, VR512, f32mem, u8imm, |
| 137700 | /* VSHUFF32X4Zrmi */ |
| 137701 | VR512, VR512, f512mem, u8imm, |
| 137702 | /* VSHUFF32X4Zrmik */ |
| 137703 | VR512, VR512, VK16WM, VR512, f512mem, u8imm, |
| 137704 | /* VSHUFF32X4Zrmikz */ |
| 137705 | VR512, VK16WM, VR512, f512mem, u8imm, |
| 137706 | /* VSHUFF32X4Zrri */ |
| 137707 | VR512, VR512, VR512, u8imm, |
| 137708 | /* VSHUFF32X4Zrrik */ |
| 137709 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 137710 | /* VSHUFF32X4Zrrikz */ |
| 137711 | VR512, VK16WM, VR512, VR512, u8imm, |
| 137712 | /* VSHUFF64X2Z256rmbi */ |
| 137713 | VR256X, VR256X, f64mem, u8imm, |
| 137714 | /* VSHUFF64X2Z256rmbik */ |
| 137715 | VR256X, VR256X, VK4WM, VR256X, f64mem, u8imm, |
| 137716 | /* VSHUFF64X2Z256rmbikz */ |
| 137717 | VR256X, VK4WM, VR256X, f64mem, u8imm, |
| 137718 | /* VSHUFF64X2Z256rmi */ |
| 137719 | VR256X, VR256X, f256mem, u8imm, |
| 137720 | /* VSHUFF64X2Z256rmik */ |
| 137721 | VR256X, VR256X, VK4WM, VR256X, f256mem, u8imm, |
| 137722 | /* VSHUFF64X2Z256rmikz */ |
| 137723 | VR256X, VK4WM, VR256X, f256mem, u8imm, |
| 137724 | /* VSHUFF64X2Z256rri */ |
| 137725 | VR256X, VR256X, VR256X, u8imm, |
| 137726 | /* VSHUFF64X2Z256rrik */ |
| 137727 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 137728 | /* VSHUFF64X2Z256rrikz */ |
| 137729 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 137730 | /* VSHUFF64X2Zrmbi */ |
| 137731 | VR512, VR512, f64mem, u8imm, |
| 137732 | /* VSHUFF64X2Zrmbik */ |
| 137733 | VR512, VR512, VK8WM, VR512, f64mem, u8imm, |
| 137734 | /* VSHUFF64X2Zrmbikz */ |
| 137735 | VR512, VK8WM, VR512, f64mem, u8imm, |
| 137736 | /* VSHUFF64X2Zrmi */ |
| 137737 | VR512, VR512, f512mem, u8imm, |
| 137738 | /* VSHUFF64X2Zrmik */ |
| 137739 | VR512, VR512, VK8WM, VR512, f512mem, u8imm, |
| 137740 | /* VSHUFF64X2Zrmikz */ |
| 137741 | VR512, VK8WM, VR512, f512mem, u8imm, |
| 137742 | /* VSHUFF64X2Zrri */ |
| 137743 | VR512, VR512, VR512, u8imm, |
| 137744 | /* VSHUFF64X2Zrrik */ |
| 137745 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 137746 | /* VSHUFF64X2Zrrikz */ |
| 137747 | VR512, VK8WM, VR512, VR512, u8imm, |
| 137748 | /* VSHUFI32X4Z256rmbi */ |
| 137749 | VR256X, VR256X, i32mem, u8imm, |
| 137750 | /* VSHUFI32X4Z256rmbik */ |
| 137751 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 137752 | /* VSHUFI32X4Z256rmbikz */ |
| 137753 | VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 137754 | /* VSHUFI32X4Z256rmi */ |
| 137755 | VR256X, VR256X, i256mem, u8imm, |
| 137756 | /* VSHUFI32X4Z256rmik */ |
| 137757 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 137758 | /* VSHUFI32X4Z256rmikz */ |
| 137759 | VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 137760 | /* VSHUFI32X4Z256rri */ |
| 137761 | VR256X, VR256X, VR256X, u8imm, |
| 137762 | /* VSHUFI32X4Z256rrik */ |
| 137763 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 137764 | /* VSHUFI32X4Z256rrikz */ |
| 137765 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 137766 | /* VSHUFI32X4Zrmbi */ |
| 137767 | VR512, VR512, i32mem, u8imm, |
| 137768 | /* VSHUFI32X4Zrmbik */ |
| 137769 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 137770 | /* VSHUFI32X4Zrmbikz */ |
| 137771 | VR512, VK16WM, VR512, i32mem, u8imm, |
| 137772 | /* VSHUFI32X4Zrmi */ |
| 137773 | VR512, VR512, i512mem, u8imm, |
| 137774 | /* VSHUFI32X4Zrmik */ |
| 137775 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 137776 | /* VSHUFI32X4Zrmikz */ |
| 137777 | VR512, VK16WM, VR512, i512mem, u8imm, |
| 137778 | /* VSHUFI32X4Zrri */ |
| 137779 | VR512, VR512, VR512, u8imm, |
| 137780 | /* VSHUFI32X4Zrrik */ |
| 137781 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 137782 | /* VSHUFI32X4Zrrikz */ |
| 137783 | VR512, VK16WM, VR512, VR512, u8imm, |
| 137784 | /* VSHUFI64X2Z256rmbi */ |
| 137785 | VR256X, VR256X, i64mem, u8imm, |
| 137786 | /* VSHUFI64X2Z256rmbik */ |
| 137787 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 137788 | /* VSHUFI64X2Z256rmbikz */ |
| 137789 | VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 137790 | /* VSHUFI64X2Z256rmi */ |
| 137791 | VR256X, VR256X, i256mem, u8imm, |
| 137792 | /* VSHUFI64X2Z256rmik */ |
| 137793 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 137794 | /* VSHUFI64X2Z256rmikz */ |
| 137795 | VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 137796 | /* VSHUFI64X2Z256rri */ |
| 137797 | VR256X, VR256X, VR256X, u8imm, |
| 137798 | /* VSHUFI64X2Z256rrik */ |
| 137799 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 137800 | /* VSHUFI64X2Z256rrikz */ |
| 137801 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 137802 | /* VSHUFI64X2Zrmbi */ |
| 137803 | VR512, VR512, i64mem, u8imm, |
| 137804 | /* VSHUFI64X2Zrmbik */ |
| 137805 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 137806 | /* VSHUFI64X2Zrmbikz */ |
| 137807 | VR512, VK8WM, VR512, i64mem, u8imm, |
| 137808 | /* VSHUFI64X2Zrmi */ |
| 137809 | VR512, VR512, i512mem, u8imm, |
| 137810 | /* VSHUFI64X2Zrmik */ |
| 137811 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 137812 | /* VSHUFI64X2Zrmikz */ |
| 137813 | VR512, VK8WM, VR512, i512mem, u8imm, |
| 137814 | /* VSHUFI64X2Zrri */ |
| 137815 | VR512, VR512, VR512, u8imm, |
| 137816 | /* VSHUFI64X2Zrrik */ |
| 137817 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 137818 | /* VSHUFI64X2Zrrikz */ |
| 137819 | VR512, VK8WM, VR512, VR512, u8imm, |
| 137820 | /* VSHUFPDYrmi */ |
| 137821 | VR256, VR256, f256mem, u8imm, |
| 137822 | /* VSHUFPDYrri */ |
| 137823 | VR256, VR256, VR256, u8imm, |
| 137824 | /* VSHUFPDZ128rmbi */ |
| 137825 | VR128X, VR128X, f64mem, u8imm, |
| 137826 | /* VSHUFPDZ128rmbik */ |
| 137827 | VR128X, VR128X, VK2WM, VR128X, f64mem, u8imm, |
| 137828 | /* VSHUFPDZ128rmbikz */ |
| 137829 | VR128X, VK2WM, VR128X, f64mem, u8imm, |
| 137830 | /* VSHUFPDZ128rmi */ |
| 137831 | VR128X, VR128X, f128mem, u8imm, |
| 137832 | /* VSHUFPDZ128rmik */ |
| 137833 | VR128X, VR128X, VK2WM, VR128X, f128mem, u8imm, |
| 137834 | /* VSHUFPDZ128rmikz */ |
| 137835 | VR128X, VK2WM, VR128X, f128mem, u8imm, |
| 137836 | /* VSHUFPDZ128rri */ |
| 137837 | VR128X, VR128X, VR128X, u8imm, |
| 137838 | /* VSHUFPDZ128rrik */ |
| 137839 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 137840 | /* VSHUFPDZ128rrikz */ |
| 137841 | VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 137842 | /* VSHUFPDZ256rmbi */ |
| 137843 | VR256X, VR256X, f64mem, u8imm, |
| 137844 | /* VSHUFPDZ256rmbik */ |
| 137845 | VR256X, VR256X, VK4WM, VR256X, f64mem, u8imm, |
| 137846 | /* VSHUFPDZ256rmbikz */ |
| 137847 | VR256X, VK4WM, VR256X, f64mem, u8imm, |
| 137848 | /* VSHUFPDZ256rmi */ |
| 137849 | VR256X, VR256X, f256mem, u8imm, |
| 137850 | /* VSHUFPDZ256rmik */ |
| 137851 | VR256X, VR256X, VK4WM, VR256X, f256mem, u8imm, |
| 137852 | /* VSHUFPDZ256rmikz */ |
| 137853 | VR256X, VK4WM, VR256X, f256mem, u8imm, |
| 137854 | /* VSHUFPDZ256rri */ |
| 137855 | VR256X, VR256X, VR256X, u8imm, |
| 137856 | /* VSHUFPDZ256rrik */ |
| 137857 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 137858 | /* VSHUFPDZ256rrikz */ |
| 137859 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 137860 | /* VSHUFPDZrmbi */ |
| 137861 | VR512, VR512, f64mem, u8imm, |
| 137862 | /* VSHUFPDZrmbik */ |
| 137863 | VR512, VR512, VK8WM, VR512, f64mem, u8imm, |
| 137864 | /* VSHUFPDZrmbikz */ |
| 137865 | VR512, VK8WM, VR512, f64mem, u8imm, |
| 137866 | /* VSHUFPDZrmi */ |
| 137867 | VR512, VR512, f512mem, u8imm, |
| 137868 | /* VSHUFPDZrmik */ |
| 137869 | VR512, VR512, VK8WM, VR512, f512mem, u8imm, |
| 137870 | /* VSHUFPDZrmikz */ |
| 137871 | VR512, VK8WM, VR512, f512mem, u8imm, |
| 137872 | /* VSHUFPDZrri */ |
| 137873 | VR512, VR512, VR512, u8imm, |
| 137874 | /* VSHUFPDZrrik */ |
| 137875 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 137876 | /* VSHUFPDZrrikz */ |
| 137877 | VR512, VK8WM, VR512, VR512, u8imm, |
| 137878 | /* VSHUFPDrmi */ |
| 137879 | VR128, VR128, f128mem, u8imm, |
| 137880 | /* VSHUFPDrri */ |
| 137881 | VR128, VR128, VR128, u8imm, |
| 137882 | /* VSHUFPSYrmi */ |
| 137883 | VR256, VR256, f256mem, u8imm, |
| 137884 | /* VSHUFPSYrri */ |
| 137885 | VR256, VR256, VR256, u8imm, |
| 137886 | /* VSHUFPSZ128rmbi */ |
| 137887 | VR128X, VR128X, f32mem, u8imm, |
| 137888 | /* VSHUFPSZ128rmbik */ |
| 137889 | VR128X, VR128X, VK4WM, VR128X, f32mem, u8imm, |
| 137890 | /* VSHUFPSZ128rmbikz */ |
| 137891 | VR128X, VK4WM, VR128X, f32mem, u8imm, |
| 137892 | /* VSHUFPSZ128rmi */ |
| 137893 | VR128X, VR128X, f128mem, u8imm, |
| 137894 | /* VSHUFPSZ128rmik */ |
| 137895 | VR128X, VR128X, VK4WM, VR128X, f128mem, u8imm, |
| 137896 | /* VSHUFPSZ128rmikz */ |
| 137897 | VR128X, VK4WM, VR128X, f128mem, u8imm, |
| 137898 | /* VSHUFPSZ128rri */ |
| 137899 | VR128X, VR128X, VR128X, u8imm, |
| 137900 | /* VSHUFPSZ128rrik */ |
| 137901 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 137902 | /* VSHUFPSZ128rrikz */ |
| 137903 | VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 137904 | /* VSHUFPSZ256rmbi */ |
| 137905 | VR256X, VR256X, f32mem, u8imm, |
| 137906 | /* VSHUFPSZ256rmbik */ |
| 137907 | VR256X, VR256X, VK8WM, VR256X, f32mem, u8imm, |
| 137908 | /* VSHUFPSZ256rmbikz */ |
| 137909 | VR256X, VK8WM, VR256X, f32mem, u8imm, |
| 137910 | /* VSHUFPSZ256rmi */ |
| 137911 | VR256X, VR256X, f256mem, u8imm, |
| 137912 | /* VSHUFPSZ256rmik */ |
| 137913 | VR256X, VR256X, VK8WM, VR256X, f256mem, u8imm, |
| 137914 | /* VSHUFPSZ256rmikz */ |
| 137915 | VR256X, VK8WM, VR256X, f256mem, u8imm, |
| 137916 | /* VSHUFPSZ256rri */ |
| 137917 | VR256X, VR256X, VR256X, u8imm, |
| 137918 | /* VSHUFPSZ256rrik */ |
| 137919 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 137920 | /* VSHUFPSZ256rrikz */ |
| 137921 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 137922 | /* VSHUFPSZrmbi */ |
| 137923 | VR512, VR512, f32mem, u8imm, |
| 137924 | /* VSHUFPSZrmbik */ |
| 137925 | VR512, VR512, VK16WM, VR512, f32mem, u8imm, |
| 137926 | /* VSHUFPSZrmbikz */ |
| 137927 | VR512, VK16WM, VR512, f32mem, u8imm, |
| 137928 | /* VSHUFPSZrmi */ |
| 137929 | VR512, VR512, f512mem, u8imm, |
| 137930 | /* VSHUFPSZrmik */ |
| 137931 | VR512, VR512, VK16WM, VR512, f512mem, u8imm, |
| 137932 | /* VSHUFPSZrmikz */ |
| 137933 | VR512, VK16WM, VR512, f512mem, u8imm, |
| 137934 | /* VSHUFPSZrri */ |
| 137935 | VR512, VR512, VR512, u8imm, |
| 137936 | /* VSHUFPSZrrik */ |
| 137937 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 137938 | /* VSHUFPSZrrikz */ |
| 137939 | VR512, VK16WM, VR512, VR512, u8imm, |
| 137940 | /* VSHUFPSrmi */ |
| 137941 | VR128, VR128, f128mem, u8imm, |
| 137942 | /* VSHUFPSrri */ |
| 137943 | VR128, VR128, VR128, u8imm, |
| 137944 | /* VSM3MSG1rm */ |
| 137945 | VR128, VR128, VR128, i128mem, |
| 137946 | /* VSM3MSG1rr */ |
| 137947 | VR128, VR128, VR128, VR128, |
| 137948 | /* VSM3MSG2rm */ |
| 137949 | VR128, VR128, VR128, i128mem, |
| 137950 | /* VSM3MSG2rr */ |
| 137951 | VR128, VR128, VR128, VR128, |
| 137952 | /* VSM3RNDS2rmi */ |
| 137953 | VR128, VR128, VR128, i128mem, i32u8imm, |
| 137954 | /* VSM3RNDS2rri */ |
| 137955 | VR128, VR128, VR128, VR128, i32u8imm, |
| 137956 | /* VSM4KEY4Yrm */ |
| 137957 | VR256, VR256, i256mem, |
| 137958 | /* VSM4KEY4Yrr */ |
| 137959 | VR256, VR256, VR256, |
| 137960 | /* VSM4KEY4Z128rm */ |
| 137961 | VR128X, VR128X, i128mem, |
| 137962 | /* VSM4KEY4Z128rr */ |
| 137963 | VR128X, VR128X, VR128X, |
| 137964 | /* VSM4KEY4Z256rm */ |
| 137965 | VR256X, VR256X, i256mem, |
| 137966 | /* VSM4KEY4Z256rr */ |
| 137967 | VR256X, VR256X, VR256X, |
| 137968 | /* VSM4KEY4Zrm */ |
| 137969 | VR512, VR512, i512mem, |
| 137970 | /* VSM4KEY4Zrr */ |
| 137971 | VR512, VR512, VR512, |
| 137972 | /* VSM4KEY4rm */ |
| 137973 | VR128, VR128, i128mem, |
| 137974 | /* VSM4KEY4rr */ |
| 137975 | VR128, VR128, VR128, |
| 137976 | /* VSM4RNDS4Yrm */ |
| 137977 | VR256, VR256, i256mem, |
| 137978 | /* VSM4RNDS4Yrr */ |
| 137979 | VR256, VR256, VR256, |
| 137980 | /* VSM4RNDS4Z128rm */ |
| 137981 | VR128X, VR128X, i128mem, |
| 137982 | /* VSM4RNDS4Z128rr */ |
| 137983 | VR128X, VR128X, VR128X, |
| 137984 | /* VSM4RNDS4Z256rm */ |
| 137985 | VR256X, VR256X, i256mem, |
| 137986 | /* VSM4RNDS4Z256rr */ |
| 137987 | VR256X, VR256X, VR256X, |
| 137988 | /* VSM4RNDS4Zrm */ |
| 137989 | VR512, VR512, i512mem, |
| 137990 | /* VSM4RNDS4Zrr */ |
| 137991 | VR512, VR512, VR512, |
| 137992 | /* VSM4RNDS4rm */ |
| 137993 | VR128, VR128, i128mem, |
| 137994 | /* VSM4RNDS4rr */ |
| 137995 | VR128, VR128, VR128, |
| 137996 | /* VSQRTBF16Z128m */ |
| 137997 | VR128X, f128mem, |
| 137998 | /* VSQRTBF16Z128mb */ |
| 137999 | VR128X, f16mem, |
| 138000 | /* VSQRTBF16Z128mbk */ |
| 138001 | VR128X, VR128X, VK8WM, f16mem, |
| 138002 | /* VSQRTBF16Z128mbkz */ |
| 138003 | VR128X, VK8WM, f16mem, |
| 138004 | /* VSQRTBF16Z128mk */ |
| 138005 | VR128X, VR128X, VK8WM, f128mem, |
| 138006 | /* VSQRTBF16Z128mkz */ |
| 138007 | VR128X, VK8WM, f128mem, |
| 138008 | /* VSQRTBF16Z128r */ |
| 138009 | VR128X, VR128X, |
| 138010 | /* VSQRTBF16Z128rk */ |
| 138011 | VR128X, VR128X, VK8WM, VR128X, |
| 138012 | /* VSQRTBF16Z128rkz */ |
| 138013 | VR128X, VK8WM, VR128X, |
| 138014 | /* VSQRTBF16Z256m */ |
| 138015 | VR256X, f256mem, |
| 138016 | /* VSQRTBF16Z256mb */ |
| 138017 | VR256X, f16mem, |
| 138018 | /* VSQRTBF16Z256mbk */ |
| 138019 | VR256X, VR256X, VK16WM, f16mem, |
| 138020 | /* VSQRTBF16Z256mbkz */ |
| 138021 | VR256X, VK16WM, f16mem, |
| 138022 | /* VSQRTBF16Z256mk */ |
| 138023 | VR256X, VR256X, VK16WM, f256mem, |
| 138024 | /* VSQRTBF16Z256mkz */ |
| 138025 | VR256X, VK16WM, f256mem, |
| 138026 | /* VSQRTBF16Z256r */ |
| 138027 | VR256X, VR256X, |
| 138028 | /* VSQRTBF16Z256rk */ |
| 138029 | VR256X, VR256X, VK16WM, VR256X, |
| 138030 | /* VSQRTBF16Z256rkz */ |
| 138031 | VR256X, VK16WM, VR256X, |
| 138032 | /* VSQRTBF16Zm */ |
| 138033 | VR512, f512mem, |
| 138034 | /* VSQRTBF16Zmb */ |
| 138035 | VR512, f16mem, |
| 138036 | /* VSQRTBF16Zmbk */ |
| 138037 | VR512, VR512, VK32WM, f16mem, |
| 138038 | /* VSQRTBF16Zmbkz */ |
| 138039 | VR512, VK32WM, f16mem, |
| 138040 | /* VSQRTBF16Zmk */ |
| 138041 | VR512, VR512, VK32WM, f512mem, |
| 138042 | /* VSQRTBF16Zmkz */ |
| 138043 | VR512, VK32WM, f512mem, |
| 138044 | /* VSQRTBF16Zr */ |
| 138045 | VR512, VR512, |
| 138046 | /* VSQRTBF16Zrk */ |
| 138047 | VR512, VR512, VK32WM, VR512, |
| 138048 | /* VSQRTBF16Zrkz */ |
| 138049 | VR512, VK32WM, VR512, |
| 138050 | /* VSQRTPDYm */ |
| 138051 | VR256, f256mem, |
| 138052 | /* VSQRTPDYr */ |
| 138053 | VR256, VR256, |
| 138054 | /* VSQRTPDZ128m */ |
| 138055 | VR128X, f128mem, |
| 138056 | /* VSQRTPDZ128mb */ |
| 138057 | VR128X, f64mem, |
| 138058 | /* VSQRTPDZ128mbk */ |
| 138059 | VR128X, VR128X, VK2WM, f64mem, |
| 138060 | /* VSQRTPDZ128mbkz */ |
| 138061 | VR128X, VK2WM, f64mem, |
| 138062 | /* VSQRTPDZ128mk */ |
| 138063 | VR128X, VR128X, VK2WM, f128mem, |
| 138064 | /* VSQRTPDZ128mkz */ |
| 138065 | VR128X, VK2WM, f128mem, |
| 138066 | /* VSQRTPDZ128r */ |
| 138067 | VR128X, VR128X, |
| 138068 | /* VSQRTPDZ128rk */ |
| 138069 | VR128X, VR128X, VK2WM, VR128X, |
| 138070 | /* VSQRTPDZ128rkz */ |
| 138071 | VR128X, VK2WM, VR128X, |
| 138072 | /* VSQRTPDZ256m */ |
| 138073 | VR256X, f256mem, |
| 138074 | /* VSQRTPDZ256mb */ |
| 138075 | VR256X, f64mem, |
| 138076 | /* VSQRTPDZ256mbk */ |
| 138077 | VR256X, VR256X, VK4WM, f64mem, |
| 138078 | /* VSQRTPDZ256mbkz */ |
| 138079 | VR256X, VK4WM, f64mem, |
| 138080 | /* VSQRTPDZ256mk */ |
| 138081 | VR256X, VR256X, VK4WM, f256mem, |
| 138082 | /* VSQRTPDZ256mkz */ |
| 138083 | VR256X, VK4WM, f256mem, |
| 138084 | /* VSQRTPDZ256r */ |
| 138085 | VR256X, VR256X, |
| 138086 | /* VSQRTPDZ256rk */ |
| 138087 | VR256X, VR256X, VK4WM, VR256X, |
| 138088 | /* VSQRTPDZ256rkz */ |
| 138089 | VR256X, VK4WM, VR256X, |
| 138090 | /* VSQRTPDZm */ |
| 138091 | VR512, f512mem, |
| 138092 | /* VSQRTPDZmb */ |
| 138093 | VR512, f64mem, |
| 138094 | /* VSQRTPDZmbk */ |
| 138095 | VR512, VR512, VK8WM, f64mem, |
| 138096 | /* VSQRTPDZmbkz */ |
| 138097 | VR512, VK8WM, f64mem, |
| 138098 | /* VSQRTPDZmk */ |
| 138099 | VR512, VR512, VK8WM, f512mem, |
| 138100 | /* VSQRTPDZmkz */ |
| 138101 | VR512, VK8WM, f512mem, |
| 138102 | /* VSQRTPDZr */ |
| 138103 | VR512, VR512, |
| 138104 | /* VSQRTPDZrb */ |
| 138105 | VR512, VR512, AVX512RC, |
| 138106 | /* VSQRTPDZrbk */ |
| 138107 | VR512, VR512, VK8WM, VR512, AVX512RC, |
| 138108 | /* VSQRTPDZrbkz */ |
| 138109 | VR512, VK8WM, VR512, AVX512RC, |
| 138110 | /* VSQRTPDZrk */ |
| 138111 | VR512, VR512, VK8WM, VR512, |
| 138112 | /* VSQRTPDZrkz */ |
| 138113 | VR512, VK8WM, VR512, |
| 138114 | /* VSQRTPDm */ |
| 138115 | VR128, f128mem, |
| 138116 | /* VSQRTPDr */ |
| 138117 | VR128, VR128, |
| 138118 | /* VSQRTPHZ128m */ |
| 138119 | VR128X, f128mem, |
| 138120 | /* VSQRTPHZ128mb */ |
| 138121 | VR128X, f16mem, |
| 138122 | /* VSQRTPHZ128mbk */ |
| 138123 | VR128X, VR128X, VK8WM, f16mem, |
| 138124 | /* VSQRTPHZ128mbkz */ |
| 138125 | VR128X, VK8WM, f16mem, |
| 138126 | /* VSQRTPHZ128mk */ |
| 138127 | VR128X, VR128X, VK8WM, f128mem, |
| 138128 | /* VSQRTPHZ128mkz */ |
| 138129 | VR128X, VK8WM, f128mem, |
| 138130 | /* VSQRTPHZ128r */ |
| 138131 | VR128X, VR128X, |
| 138132 | /* VSQRTPHZ128rk */ |
| 138133 | VR128X, VR128X, VK8WM, VR128X, |
| 138134 | /* VSQRTPHZ128rkz */ |
| 138135 | VR128X, VK8WM, VR128X, |
| 138136 | /* VSQRTPHZ256m */ |
| 138137 | VR256X, f256mem, |
| 138138 | /* VSQRTPHZ256mb */ |
| 138139 | VR256X, f16mem, |
| 138140 | /* VSQRTPHZ256mbk */ |
| 138141 | VR256X, VR256X, VK16WM, f16mem, |
| 138142 | /* VSQRTPHZ256mbkz */ |
| 138143 | VR256X, VK16WM, f16mem, |
| 138144 | /* VSQRTPHZ256mk */ |
| 138145 | VR256X, VR256X, VK16WM, f256mem, |
| 138146 | /* VSQRTPHZ256mkz */ |
| 138147 | VR256X, VK16WM, f256mem, |
| 138148 | /* VSQRTPHZ256r */ |
| 138149 | VR256X, VR256X, |
| 138150 | /* VSQRTPHZ256rk */ |
| 138151 | VR256X, VR256X, VK16WM, VR256X, |
| 138152 | /* VSQRTPHZ256rkz */ |
| 138153 | VR256X, VK16WM, VR256X, |
| 138154 | /* VSQRTPHZm */ |
| 138155 | VR512, f512mem, |
| 138156 | /* VSQRTPHZmb */ |
| 138157 | VR512, f16mem, |
| 138158 | /* VSQRTPHZmbk */ |
| 138159 | VR512, VR512, VK32WM, f16mem, |
| 138160 | /* VSQRTPHZmbkz */ |
| 138161 | VR512, VK32WM, f16mem, |
| 138162 | /* VSQRTPHZmk */ |
| 138163 | VR512, VR512, VK32WM, f512mem, |
| 138164 | /* VSQRTPHZmkz */ |
| 138165 | VR512, VK32WM, f512mem, |
| 138166 | /* VSQRTPHZr */ |
| 138167 | VR512, VR512, |
| 138168 | /* VSQRTPHZrb */ |
| 138169 | VR512, VR512, AVX512RC, |
| 138170 | /* VSQRTPHZrbk */ |
| 138171 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 138172 | /* VSQRTPHZrbkz */ |
| 138173 | VR512, VK32WM, VR512, AVX512RC, |
| 138174 | /* VSQRTPHZrk */ |
| 138175 | VR512, VR512, VK32WM, VR512, |
| 138176 | /* VSQRTPHZrkz */ |
| 138177 | VR512, VK32WM, VR512, |
| 138178 | /* VSQRTPSYm */ |
| 138179 | VR256, f256mem, |
| 138180 | /* VSQRTPSYr */ |
| 138181 | VR256, VR256, |
| 138182 | /* VSQRTPSZ128m */ |
| 138183 | VR128X, f128mem, |
| 138184 | /* VSQRTPSZ128mb */ |
| 138185 | VR128X, f32mem, |
| 138186 | /* VSQRTPSZ128mbk */ |
| 138187 | VR128X, VR128X, VK4WM, f32mem, |
| 138188 | /* VSQRTPSZ128mbkz */ |
| 138189 | VR128X, VK4WM, f32mem, |
| 138190 | /* VSQRTPSZ128mk */ |
| 138191 | VR128X, VR128X, VK4WM, f128mem, |
| 138192 | /* VSQRTPSZ128mkz */ |
| 138193 | VR128X, VK4WM, f128mem, |
| 138194 | /* VSQRTPSZ128r */ |
| 138195 | VR128X, VR128X, |
| 138196 | /* VSQRTPSZ128rk */ |
| 138197 | VR128X, VR128X, VK4WM, VR128X, |
| 138198 | /* VSQRTPSZ128rkz */ |
| 138199 | VR128X, VK4WM, VR128X, |
| 138200 | /* VSQRTPSZ256m */ |
| 138201 | VR256X, f256mem, |
| 138202 | /* VSQRTPSZ256mb */ |
| 138203 | VR256X, f32mem, |
| 138204 | /* VSQRTPSZ256mbk */ |
| 138205 | VR256X, VR256X, VK8WM, f32mem, |
| 138206 | /* VSQRTPSZ256mbkz */ |
| 138207 | VR256X, VK8WM, f32mem, |
| 138208 | /* VSQRTPSZ256mk */ |
| 138209 | VR256X, VR256X, VK8WM, f256mem, |
| 138210 | /* VSQRTPSZ256mkz */ |
| 138211 | VR256X, VK8WM, f256mem, |
| 138212 | /* VSQRTPSZ256r */ |
| 138213 | VR256X, VR256X, |
| 138214 | /* VSQRTPSZ256rk */ |
| 138215 | VR256X, VR256X, VK8WM, VR256X, |
| 138216 | /* VSQRTPSZ256rkz */ |
| 138217 | VR256X, VK8WM, VR256X, |
| 138218 | /* VSQRTPSZm */ |
| 138219 | VR512, f512mem, |
| 138220 | /* VSQRTPSZmb */ |
| 138221 | VR512, f32mem, |
| 138222 | /* VSQRTPSZmbk */ |
| 138223 | VR512, VR512, VK16WM, f32mem, |
| 138224 | /* VSQRTPSZmbkz */ |
| 138225 | VR512, VK16WM, f32mem, |
| 138226 | /* VSQRTPSZmk */ |
| 138227 | VR512, VR512, VK16WM, f512mem, |
| 138228 | /* VSQRTPSZmkz */ |
| 138229 | VR512, VK16WM, f512mem, |
| 138230 | /* VSQRTPSZr */ |
| 138231 | VR512, VR512, |
| 138232 | /* VSQRTPSZrb */ |
| 138233 | VR512, VR512, AVX512RC, |
| 138234 | /* VSQRTPSZrbk */ |
| 138235 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 138236 | /* VSQRTPSZrbkz */ |
| 138237 | VR512, VK16WM, VR512, AVX512RC, |
| 138238 | /* VSQRTPSZrk */ |
| 138239 | VR512, VR512, VK16WM, VR512, |
| 138240 | /* VSQRTPSZrkz */ |
| 138241 | VR512, VK16WM, VR512, |
| 138242 | /* VSQRTPSm */ |
| 138243 | VR128, f128mem, |
| 138244 | /* VSQRTPSr */ |
| 138245 | VR128, VR128, |
| 138246 | /* VSQRTSDZm */ |
| 138247 | FR64X, FR64X, f64mem, |
| 138248 | /* VSQRTSDZm_Int */ |
| 138249 | VR128X, VR128X, sdmem, |
| 138250 | /* VSQRTSDZmk_Int */ |
| 138251 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 138252 | /* VSQRTSDZmkz_Int */ |
| 138253 | VR128X, VK1WM, VR128X, sdmem, |
| 138254 | /* VSQRTSDZr */ |
| 138255 | FR64X, FR64X, FR64X, |
| 138256 | /* VSQRTSDZr_Int */ |
| 138257 | VR128X, VR128X, VR128X, |
| 138258 | /* VSQRTSDZrb_Int */ |
| 138259 | VR128X, VR128X, VR128X, AVX512RC, |
| 138260 | /* VSQRTSDZrbk_Int */ |
| 138261 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138262 | /* VSQRTSDZrbkz_Int */ |
| 138263 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138264 | /* VSQRTSDZrk_Int */ |
| 138265 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 138266 | /* VSQRTSDZrkz_Int */ |
| 138267 | VR128X, VK1WM, VR128X, VR128X, |
| 138268 | /* VSQRTSDm */ |
| 138269 | FR64, FR64, f64mem, |
| 138270 | /* VSQRTSDm_Int */ |
| 138271 | VR128, VR128, sdmem, |
| 138272 | /* VSQRTSDr */ |
| 138273 | FR64, FR64, FR64, |
| 138274 | /* VSQRTSDr_Int */ |
| 138275 | VR128, VR128, VR128, |
| 138276 | /* VSQRTSHZm */ |
| 138277 | FR16X, FR16X, f16mem, |
| 138278 | /* VSQRTSHZm_Int */ |
| 138279 | VR128X, VR128X, shmem, |
| 138280 | /* VSQRTSHZmk_Int */ |
| 138281 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 138282 | /* VSQRTSHZmkz_Int */ |
| 138283 | VR128X, VK1WM, VR128X, shmem, |
| 138284 | /* VSQRTSHZr */ |
| 138285 | FR16X, FR16X, FR16X, |
| 138286 | /* VSQRTSHZr_Int */ |
| 138287 | VR128X, VR128X, VR128X, |
| 138288 | /* VSQRTSHZrb_Int */ |
| 138289 | VR128X, VR128X, VR128X, AVX512RC, |
| 138290 | /* VSQRTSHZrbk_Int */ |
| 138291 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138292 | /* VSQRTSHZrbkz_Int */ |
| 138293 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138294 | /* VSQRTSHZrk_Int */ |
| 138295 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 138296 | /* VSQRTSHZrkz_Int */ |
| 138297 | VR128X, VK1WM, VR128X, VR128X, |
| 138298 | /* VSQRTSSZm */ |
| 138299 | FR32X, FR32X, f32mem, |
| 138300 | /* VSQRTSSZm_Int */ |
| 138301 | VR128X, VR128X, ssmem, |
| 138302 | /* VSQRTSSZmk_Int */ |
| 138303 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 138304 | /* VSQRTSSZmkz_Int */ |
| 138305 | VR128X, VK1WM, VR128X, ssmem, |
| 138306 | /* VSQRTSSZr */ |
| 138307 | FR32X, FR32X, FR32X, |
| 138308 | /* VSQRTSSZr_Int */ |
| 138309 | VR128X, VR128X, VR128X, |
| 138310 | /* VSQRTSSZrb_Int */ |
| 138311 | VR128X, VR128X, VR128X, AVX512RC, |
| 138312 | /* VSQRTSSZrbk_Int */ |
| 138313 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138314 | /* VSQRTSSZrbkz_Int */ |
| 138315 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138316 | /* VSQRTSSZrk_Int */ |
| 138317 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 138318 | /* VSQRTSSZrkz_Int */ |
| 138319 | VR128X, VK1WM, VR128X, VR128X, |
| 138320 | /* VSQRTSSm */ |
| 138321 | FR32, FR32, f32mem, |
| 138322 | /* VSQRTSSm_Int */ |
| 138323 | VR128, VR128, ssmem, |
| 138324 | /* VSQRTSSr */ |
| 138325 | FR32, FR32, FR32, |
| 138326 | /* VSQRTSSr_Int */ |
| 138327 | VR128, VR128, VR128, |
| 138328 | /* VSTMXCSR */ |
| 138329 | i32mem, |
| 138330 | /* VSUBBF16Z128rm */ |
| 138331 | VR128X, VR128X, f128mem, |
| 138332 | /* VSUBBF16Z128rmb */ |
| 138333 | VR128X, VR128X, f16mem, |
| 138334 | /* VSUBBF16Z128rmbk */ |
| 138335 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 138336 | /* VSUBBF16Z128rmbkz */ |
| 138337 | VR128X, VK8WM, VR128X, f16mem, |
| 138338 | /* VSUBBF16Z128rmk */ |
| 138339 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 138340 | /* VSUBBF16Z128rmkz */ |
| 138341 | VR128X, VK8WM, VR128X, f128mem, |
| 138342 | /* VSUBBF16Z128rr */ |
| 138343 | VR128X, VR128X, VR128X, |
| 138344 | /* VSUBBF16Z128rrk */ |
| 138345 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 138346 | /* VSUBBF16Z128rrkz */ |
| 138347 | VR128X, VK8WM, VR128X, VR128X, |
| 138348 | /* VSUBBF16Z256rm */ |
| 138349 | VR256X, VR256X, f256mem, |
| 138350 | /* VSUBBF16Z256rmb */ |
| 138351 | VR256X, VR256X, f16mem, |
| 138352 | /* VSUBBF16Z256rmbk */ |
| 138353 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 138354 | /* VSUBBF16Z256rmbkz */ |
| 138355 | VR256X, VK16WM, VR256X, f16mem, |
| 138356 | /* VSUBBF16Z256rmk */ |
| 138357 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 138358 | /* VSUBBF16Z256rmkz */ |
| 138359 | VR256X, VK16WM, VR256X, f256mem, |
| 138360 | /* VSUBBF16Z256rr */ |
| 138361 | VR256X, VR256X, VR256X, |
| 138362 | /* VSUBBF16Z256rrk */ |
| 138363 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 138364 | /* VSUBBF16Z256rrkz */ |
| 138365 | VR256X, VK16WM, VR256X, VR256X, |
| 138366 | /* VSUBBF16Zrm */ |
| 138367 | VR512, VR512, f512mem, |
| 138368 | /* VSUBBF16Zrmb */ |
| 138369 | VR512, VR512, f16mem, |
| 138370 | /* VSUBBF16Zrmbk */ |
| 138371 | VR512, VR512, VK32WM, VR512, f16mem, |
| 138372 | /* VSUBBF16Zrmbkz */ |
| 138373 | VR512, VK32WM, VR512, f16mem, |
| 138374 | /* VSUBBF16Zrmk */ |
| 138375 | VR512, VR512, VK32WM, VR512, f512mem, |
| 138376 | /* VSUBBF16Zrmkz */ |
| 138377 | VR512, VK32WM, VR512, f512mem, |
| 138378 | /* VSUBBF16Zrr */ |
| 138379 | VR512, VR512, VR512, |
| 138380 | /* VSUBBF16Zrrk */ |
| 138381 | VR512, VR512, VK32WM, VR512, VR512, |
| 138382 | /* VSUBBF16Zrrkz */ |
| 138383 | VR512, VK32WM, VR512, VR512, |
| 138384 | /* VSUBPDYrm */ |
| 138385 | VR256, VR256, f256mem, |
| 138386 | /* VSUBPDYrr */ |
| 138387 | VR256, VR256, VR256, |
| 138388 | /* VSUBPDZ128rm */ |
| 138389 | VR128X, VR128X, f128mem, |
| 138390 | /* VSUBPDZ128rmb */ |
| 138391 | VR128X, VR128X, f64mem, |
| 138392 | /* VSUBPDZ128rmbk */ |
| 138393 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 138394 | /* VSUBPDZ128rmbkz */ |
| 138395 | VR128X, VK2WM, VR128X, f64mem, |
| 138396 | /* VSUBPDZ128rmk */ |
| 138397 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 138398 | /* VSUBPDZ128rmkz */ |
| 138399 | VR128X, VK2WM, VR128X, f128mem, |
| 138400 | /* VSUBPDZ128rr */ |
| 138401 | VR128X, VR128X, VR128X, |
| 138402 | /* VSUBPDZ128rrk */ |
| 138403 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 138404 | /* VSUBPDZ128rrkz */ |
| 138405 | VR128X, VK2WM, VR128X, VR128X, |
| 138406 | /* VSUBPDZ256rm */ |
| 138407 | VR256X, VR256X, f256mem, |
| 138408 | /* VSUBPDZ256rmb */ |
| 138409 | VR256X, VR256X, f64mem, |
| 138410 | /* VSUBPDZ256rmbk */ |
| 138411 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 138412 | /* VSUBPDZ256rmbkz */ |
| 138413 | VR256X, VK4WM, VR256X, f64mem, |
| 138414 | /* VSUBPDZ256rmk */ |
| 138415 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 138416 | /* VSUBPDZ256rmkz */ |
| 138417 | VR256X, VK4WM, VR256X, f256mem, |
| 138418 | /* VSUBPDZ256rr */ |
| 138419 | VR256X, VR256X, VR256X, |
| 138420 | /* VSUBPDZ256rrk */ |
| 138421 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 138422 | /* VSUBPDZ256rrkz */ |
| 138423 | VR256X, VK4WM, VR256X, VR256X, |
| 138424 | /* VSUBPDZrm */ |
| 138425 | VR512, VR512, f512mem, |
| 138426 | /* VSUBPDZrmb */ |
| 138427 | VR512, VR512, f64mem, |
| 138428 | /* VSUBPDZrmbk */ |
| 138429 | VR512, VR512, VK8WM, VR512, f64mem, |
| 138430 | /* VSUBPDZrmbkz */ |
| 138431 | VR512, VK8WM, VR512, f64mem, |
| 138432 | /* VSUBPDZrmk */ |
| 138433 | VR512, VR512, VK8WM, VR512, f512mem, |
| 138434 | /* VSUBPDZrmkz */ |
| 138435 | VR512, VK8WM, VR512, f512mem, |
| 138436 | /* VSUBPDZrr */ |
| 138437 | VR512, VR512, VR512, |
| 138438 | /* VSUBPDZrrb */ |
| 138439 | VR512, VR512, VR512, AVX512RC, |
| 138440 | /* VSUBPDZrrbk */ |
| 138441 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 138442 | /* VSUBPDZrrbkz */ |
| 138443 | VR512, VK8WM, VR512, VR512, AVX512RC, |
| 138444 | /* VSUBPDZrrk */ |
| 138445 | VR512, VR512, VK8WM, VR512, VR512, |
| 138446 | /* VSUBPDZrrkz */ |
| 138447 | VR512, VK8WM, VR512, VR512, |
| 138448 | /* VSUBPDrm */ |
| 138449 | VR128, VR128, f128mem, |
| 138450 | /* VSUBPDrr */ |
| 138451 | VR128, VR128, VR128, |
| 138452 | /* VSUBPHZ128rm */ |
| 138453 | VR128X, VR128X, f128mem, |
| 138454 | /* VSUBPHZ128rmb */ |
| 138455 | VR128X, VR128X, f16mem, |
| 138456 | /* VSUBPHZ128rmbk */ |
| 138457 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 138458 | /* VSUBPHZ128rmbkz */ |
| 138459 | VR128X, VK8WM, VR128X, f16mem, |
| 138460 | /* VSUBPHZ128rmk */ |
| 138461 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 138462 | /* VSUBPHZ128rmkz */ |
| 138463 | VR128X, VK8WM, VR128X, f128mem, |
| 138464 | /* VSUBPHZ128rr */ |
| 138465 | VR128X, VR128X, VR128X, |
| 138466 | /* VSUBPHZ128rrk */ |
| 138467 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 138468 | /* VSUBPHZ128rrkz */ |
| 138469 | VR128X, VK8WM, VR128X, VR128X, |
| 138470 | /* VSUBPHZ256rm */ |
| 138471 | VR256X, VR256X, f256mem, |
| 138472 | /* VSUBPHZ256rmb */ |
| 138473 | VR256X, VR256X, f16mem, |
| 138474 | /* VSUBPHZ256rmbk */ |
| 138475 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 138476 | /* VSUBPHZ256rmbkz */ |
| 138477 | VR256X, VK16WM, VR256X, f16mem, |
| 138478 | /* VSUBPHZ256rmk */ |
| 138479 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 138480 | /* VSUBPHZ256rmkz */ |
| 138481 | VR256X, VK16WM, VR256X, f256mem, |
| 138482 | /* VSUBPHZ256rr */ |
| 138483 | VR256X, VR256X, VR256X, |
| 138484 | /* VSUBPHZ256rrk */ |
| 138485 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 138486 | /* VSUBPHZ256rrkz */ |
| 138487 | VR256X, VK16WM, VR256X, VR256X, |
| 138488 | /* VSUBPHZrm */ |
| 138489 | VR512, VR512, f512mem, |
| 138490 | /* VSUBPHZrmb */ |
| 138491 | VR512, VR512, f16mem, |
| 138492 | /* VSUBPHZrmbk */ |
| 138493 | VR512, VR512, VK32WM, VR512, f16mem, |
| 138494 | /* VSUBPHZrmbkz */ |
| 138495 | VR512, VK32WM, VR512, f16mem, |
| 138496 | /* VSUBPHZrmk */ |
| 138497 | VR512, VR512, VK32WM, VR512, f512mem, |
| 138498 | /* VSUBPHZrmkz */ |
| 138499 | VR512, VK32WM, VR512, f512mem, |
| 138500 | /* VSUBPHZrr */ |
| 138501 | VR512, VR512, VR512, |
| 138502 | /* VSUBPHZrrb */ |
| 138503 | VR512, VR512, VR512, AVX512RC, |
| 138504 | /* VSUBPHZrrbk */ |
| 138505 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 138506 | /* VSUBPHZrrbkz */ |
| 138507 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 138508 | /* VSUBPHZrrk */ |
| 138509 | VR512, VR512, VK32WM, VR512, VR512, |
| 138510 | /* VSUBPHZrrkz */ |
| 138511 | VR512, VK32WM, VR512, VR512, |
| 138512 | /* VSUBPSYrm */ |
| 138513 | VR256, VR256, f256mem, |
| 138514 | /* VSUBPSYrr */ |
| 138515 | VR256, VR256, VR256, |
| 138516 | /* VSUBPSZ128rm */ |
| 138517 | VR128X, VR128X, f128mem, |
| 138518 | /* VSUBPSZ128rmb */ |
| 138519 | VR128X, VR128X, f32mem, |
| 138520 | /* VSUBPSZ128rmbk */ |
| 138521 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 138522 | /* VSUBPSZ128rmbkz */ |
| 138523 | VR128X, VK4WM, VR128X, f32mem, |
| 138524 | /* VSUBPSZ128rmk */ |
| 138525 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 138526 | /* VSUBPSZ128rmkz */ |
| 138527 | VR128X, VK4WM, VR128X, f128mem, |
| 138528 | /* VSUBPSZ128rr */ |
| 138529 | VR128X, VR128X, VR128X, |
| 138530 | /* VSUBPSZ128rrk */ |
| 138531 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 138532 | /* VSUBPSZ128rrkz */ |
| 138533 | VR128X, VK4WM, VR128X, VR128X, |
| 138534 | /* VSUBPSZ256rm */ |
| 138535 | VR256X, VR256X, f256mem, |
| 138536 | /* VSUBPSZ256rmb */ |
| 138537 | VR256X, VR256X, f32mem, |
| 138538 | /* VSUBPSZ256rmbk */ |
| 138539 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 138540 | /* VSUBPSZ256rmbkz */ |
| 138541 | VR256X, VK8WM, VR256X, f32mem, |
| 138542 | /* VSUBPSZ256rmk */ |
| 138543 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 138544 | /* VSUBPSZ256rmkz */ |
| 138545 | VR256X, VK8WM, VR256X, f256mem, |
| 138546 | /* VSUBPSZ256rr */ |
| 138547 | VR256X, VR256X, VR256X, |
| 138548 | /* VSUBPSZ256rrk */ |
| 138549 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 138550 | /* VSUBPSZ256rrkz */ |
| 138551 | VR256X, VK8WM, VR256X, VR256X, |
| 138552 | /* VSUBPSZrm */ |
| 138553 | VR512, VR512, f512mem, |
| 138554 | /* VSUBPSZrmb */ |
| 138555 | VR512, VR512, f32mem, |
| 138556 | /* VSUBPSZrmbk */ |
| 138557 | VR512, VR512, VK16WM, VR512, f32mem, |
| 138558 | /* VSUBPSZrmbkz */ |
| 138559 | VR512, VK16WM, VR512, f32mem, |
| 138560 | /* VSUBPSZrmk */ |
| 138561 | VR512, VR512, VK16WM, VR512, f512mem, |
| 138562 | /* VSUBPSZrmkz */ |
| 138563 | VR512, VK16WM, VR512, f512mem, |
| 138564 | /* VSUBPSZrr */ |
| 138565 | VR512, VR512, VR512, |
| 138566 | /* VSUBPSZrrb */ |
| 138567 | VR512, VR512, VR512, AVX512RC, |
| 138568 | /* VSUBPSZrrbk */ |
| 138569 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 138570 | /* VSUBPSZrrbkz */ |
| 138571 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 138572 | /* VSUBPSZrrk */ |
| 138573 | VR512, VR512, VK16WM, VR512, VR512, |
| 138574 | /* VSUBPSZrrkz */ |
| 138575 | VR512, VK16WM, VR512, VR512, |
| 138576 | /* VSUBPSrm */ |
| 138577 | VR128, VR128, f128mem, |
| 138578 | /* VSUBPSrr */ |
| 138579 | VR128, VR128, VR128, |
| 138580 | /* VSUBSDZrm */ |
| 138581 | FR64X, FR64X, f64mem, |
| 138582 | /* VSUBSDZrm_Int */ |
| 138583 | VR128X, VR128X, sdmem, |
| 138584 | /* VSUBSDZrmk_Int */ |
| 138585 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 138586 | /* VSUBSDZrmkz_Int */ |
| 138587 | VR128X, VK1WM, VR128X, sdmem, |
| 138588 | /* VSUBSDZrr */ |
| 138589 | FR64X, FR64X, FR64X, |
| 138590 | /* VSUBSDZrr_Int */ |
| 138591 | VR128X, VR128X, VR128X, |
| 138592 | /* VSUBSDZrrb_Int */ |
| 138593 | VR128X, VR128X, VR128X, AVX512RC, |
| 138594 | /* VSUBSDZrrbk_Int */ |
| 138595 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138596 | /* VSUBSDZrrbkz_Int */ |
| 138597 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138598 | /* VSUBSDZrrk_Int */ |
| 138599 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 138600 | /* VSUBSDZrrkz_Int */ |
| 138601 | VR128X, VK1WM, VR128X, VR128X, |
| 138602 | /* VSUBSDrm */ |
| 138603 | FR64, FR64, f64mem, |
| 138604 | /* VSUBSDrm_Int */ |
| 138605 | VR128, VR128, sdmem, |
| 138606 | /* VSUBSDrr */ |
| 138607 | FR64, FR64, FR64, |
| 138608 | /* VSUBSDrr_Int */ |
| 138609 | VR128, VR128, VR128, |
| 138610 | /* VSUBSHZrm */ |
| 138611 | FR16X, FR16X, f16mem, |
| 138612 | /* VSUBSHZrm_Int */ |
| 138613 | VR128X, VR128X, shmem, |
| 138614 | /* VSUBSHZrmk_Int */ |
| 138615 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 138616 | /* VSUBSHZrmkz_Int */ |
| 138617 | VR128X, VK1WM, VR128X, shmem, |
| 138618 | /* VSUBSHZrr */ |
| 138619 | FR16X, FR16X, FR16X, |
| 138620 | /* VSUBSHZrr_Int */ |
| 138621 | VR128X, VR128X, VR128X, |
| 138622 | /* VSUBSHZrrb_Int */ |
| 138623 | VR128X, VR128X, VR128X, AVX512RC, |
| 138624 | /* VSUBSHZrrbk_Int */ |
| 138625 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138626 | /* VSUBSHZrrbkz_Int */ |
| 138627 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138628 | /* VSUBSHZrrk_Int */ |
| 138629 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 138630 | /* VSUBSHZrrkz_Int */ |
| 138631 | VR128X, VK1WM, VR128X, VR128X, |
| 138632 | /* VSUBSSZrm */ |
| 138633 | FR32X, FR32X, f32mem, |
| 138634 | /* VSUBSSZrm_Int */ |
| 138635 | VR128X, VR128X, ssmem, |
| 138636 | /* VSUBSSZrmk_Int */ |
| 138637 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 138638 | /* VSUBSSZrmkz_Int */ |
| 138639 | VR128X, VK1WM, VR128X, ssmem, |
| 138640 | /* VSUBSSZrr */ |
| 138641 | FR32X, FR32X, FR32X, |
| 138642 | /* VSUBSSZrr_Int */ |
| 138643 | VR128X, VR128X, VR128X, |
| 138644 | /* VSUBSSZrrb_Int */ |
| 138645 | VR128X, VR128X, VR128X, AVX512RC, |
| 138646 | /* VSUBSSZrrbk_Int */ |
| 138647 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138648 | /* VSUBSSZrrbkz_Int */ |
| 138649 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 138650 | /* VSUBSSZrrk_Int */ |
| 138651 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 138652 | /* VSUBSSZrrkz_Int */ |
| 138653 | VR128X, VK1WM, VR128X, VR128X, |
| 138654 | /* VSUBSSrm */ |
| 138655 | FR32, FR32, f32mem, |
| 138656 | /* VSUBSSrm_Int */ |
| 138657 | VR128, VR128, ssmem, |
| 138658 | /* VSUBSSrr */ |
| 138659 | FR32, FR32, FR32, |
| 138660 | /* VSUBSSrr_Int */ |
| 138661 | VR128, VR128, VR128, |
| 138662 | /* VTESTPDYrm */ |
| 138663 | VR256, f256mem, |
| 138664 | /* VTESTPDYrr */ |
| 138665 | VR256, VR256, |
| 138666 | /* VTESTPDrm */ |
| 138667 | VR128, f128mem, |
| 138668 | /* VTESTPDrr */ |
| 138669 | VR128, VR128, |
| 138670 | /* VTESTPSYrm */ |
| 138671 | VR256, f256mem, |
| 138672 | /* VTESTPSYrr */ |
| 138673 | VR256, VR256, |
| 138674 | /* VTESTPSrm */ |
| 138675 | VR128, f128mem, |
| 138676 | /* VTESTPSrr */ |
| 138677 | VR128, VR128, |
| 138678 | /* VUCOMISDZrm */ |
| 138679 | FR64X, f64mem, |
| 138680 | /* VUCOMISDZrm_Int */ |
| 138681 | VR128X, sdmem, |
| 138682 | /* VUCOMISDZrr */ |
| 138683 | FR64X, FR64X, |
| 138684 | /* VUCOMISDZrr_Int */ |
| 138685 | VR128X, VR128X, |
| 138686 | /* VUCOMISDZrrb */ |
| 138687 | VR128X, VR128X, |
| 138688 | /* VUCOMISDrm */ |
| 138689 | FR64, f64mem, |
| 138690 | /* VUCOMISDrm_Int */ |
| 138691 | VR128, sdmem, |
| 138692 | /* VUCOMISDrr */ |
| 138693 | FR64, FR64, |
| 138694 | /* VUCOMISDrr_Int */ |
| 138695 | VR128, VR128, |
| 138696 | /* VUCOMISHZrm */ |
| 138697 | FR16X, f16mem, |
| 138698 | /* VUCOMISHZrm_Int */ |
| 138699 | VR128X, shmem, |
| 138700 | /* VUCOMISHZrr */ |
| 138701 | FR16X, FR16X, |
| 138702 | /* VUCOMISHZrr_Int */ |
| 138703 | VR128X, VR128X, |
| 138704 | /* VUCOMISHZrrb */ |
| 138705 | VR128X, VR128X, |
| 138706 | /* VUCOMISSZrm */ |
| 138707 | FR32X, f32mem, |
| 138708 | /* VUCOMISSZrm_Int */ |
| 138709 | VR128X, ssmem, |
| 138710 | /* VUCOMISSZrr */ |
| 138711 | FR32X, FR32X, |
| 138712 | /* VUCOMISSZrr_Int */ |
| 138713 | VR128X, VR128X, |
| 138714 | /* VUCOMISSZrrb */ |
| 138715 | VR128X, VR128X, |
| 138716 | /* VUCOMISSrm */ |
| 138717 | FR32, f32mem, |
| 138718 | /* VUCOMISSrm_Int */ |
| 138719 | VR128, ssmem, |
| 138720 | /* VUCOMISSrr */ |
| 138721 | FR32, FR32, |
| 138722 | /* VUCOMISSrr_Int */ |
| 138723 | VR128, VR128, |
| 138724 | /* VUCOMXSDZrm */ |
| 138725 | FR64X, f64mem, |
| 138726 | /* VUCOMXSDZrm_Int */ |
| 138727 | VR128X, f64mem, |
| 138728 | /* VUCOMXSDZrr */ |
| 138729 | FR64X, FR64X, |
| 138730 | /* VUCOMXSDZrr_Int */ |
| 138731 | VR128X, VR128X, |
| 138732 | /* VUCOMXSDZrrb_Int */ |
| 138733 | VR128X, VR128X, |
| 138734 | /* VUCOMXSHZrm */ |
| 138735 | FR16X, f16mem, |
| 138736 | /* VUCOMXSHZrm_Int */ |
| 138737 | VR128X, f16mem, |
| 138738 | /* VUCOMXSHZrr */ |
| 138739 | FR16X, FR16X, |
| 138740 | /* VUCOMXSHZrr_Int */ |
| 138741 | VR128X, VR128X, |
| 138742 | /* VUCOMXSHZrrb_Int */ |
| 138743 | VR128X, VR128X, |
| 138744 | /* VUCOMXSSZrm */ |
| 138745 | FR32X, f32mem, |
| 138746 | /* VUCOMXSSZrm_Int */ |
| 138747 | VR128X, f32mem, |
| 138748 | /* VUCOMXSSZrr */ |
| 138749 | FR32X, FR32X, |
| 138750 | /* VUCOMXSSZrr_Int */ |
| 138751 | VR128X, VR128X, |
| 138752 | /* VUCOMXSSZrrb_Int */ |
| 138753 | VR128X, VR128X, |
| 138754 | /* VUNPCKHPDYrm */ |
| 138755 | VR256, VR256, f256mem, |
| 138756 | /* VUNPCKHPDYrr */ |
| 138757 | VR256, VR256, VR256, |
| 138758 | /* VUNPCKHPDZ128rm */ |
| 138759 | VR128X, VR128X, f128mem, |
| 138760 | /* VUNPCKHPDZ128rmb */ |
| 138761 | VR128X, VR128X, f64mem, |
| 138762 | /* VUNPCKHPDZ128rmbk */ |
| 138763 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 138764 | /* VUNPCKHPDZ128rmbkz */ |
| 138765 | VR128X, VK2WM, VR128X, f64mem, |
| 138766 | /* VUNPCKHPDZ128rmk */ |
| 138767 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 138768 | /* VUNPCKHPDZ128rmkz */ |
| 138769 | VR128X, VK2WM, VR128X, f128mem, |
| 138770 | /* VUNPCKHPDZ128rr */ |
| 138771 | VR128X, VR128X, VR128X, |
| 138772 | /* VUNPCKHPDZ128rrk */ |
| 138773 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 138774 | /* VUNPCKHPDZ128rrkz */ |
| 138775 | VR128X, VK2WM, VR128X, VR128X, |
| 138776 | /* VUNPCKHPDZ256rm */ |
| 138777 | VR256X, VR256X, f256mem, |
| 138778 | /* VUNPCKHPDZ256rmb */ |
| 138779 | VR256X, VR256X, f64mem, |
| 138780 | /* VUNPCKHPDZ256rmbk */ |
| 138781 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 138782 | /* VUNPCKHPDZ256rmbkz */ |
| 138783 | VR256X, VK4WM, VR256X, f64mem, |
| 138784 | /* VUNPCKHPDZ256rmk */ |
| 138785 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 138786 | /* VUNPCKHPDZ256rmkz */ |
| 138787 | VR256X, VK4WM, VR256X, f256mem, |
| 138788 | /* VUNPCKHPDZ256rr */ |
| 138789 | VR256X, VR256X, VR256X, |
| 138790 | /* VUNPCKHPDZ256rrk */ |
| 138791 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 138792 | /* VUNPCKHPDZ256rrkz */ |
| 138793 | VR256X, VK4WM, VR256X, VR256X, |
| 138794 | /* VUNPCKHPDZrm */ |
| 138795 | VR512, VR512, f512mem, |
| 138796 | /* VUNPCKHPDZrmb */ |
| 138797 | VR512, VR512, f64mem, |
| 138798 | /* VUNPCKHPDZrmbk */ |
| 138799 | VR512, VR512, VK8WM, VR512, f64mem, |
| 138800 | /* VUNPCKHPDZrmbkz */ |
| 138801 | VR512, VK8WM, VR512, f64mem, |
| 138802 | /* VUNPCKHPDZrmk */ |
| 138803 | VR512, VR512, VK8WM, VR512, f512mem, |
| 138804 | /* VUNPCKHPDZrmkz */ |
| 138805 | VR512, VK8WM, VR512, f512mem, |
| 138806 | /* VUNPCKHPDZrr */ |
| 138807 | VR512, VR512, VR512, |
| 138808 | /* VUNPCKHPDZrrk */ |
| 138809 | VR512, VR512, VK8WM, VR512, VR512, |
| 138810 | /* VUNPCKHPDZrrkz */ |
| 138811 | VR512, VK8WM, VR512, VR512, |
| 138812 | /* VUNPCKHPDrm */ |
| 138813 | VR128, VR128, f128mem, |
| 138814 | /* VUNPCKHPDrr */ |
| 138815 | VR128, VR128, VR128, |
| 138816 | /* VUNPCKHPSYrm */ |
| 138817 | VR256, VR256, f256mem, |
| 138818 | /* VUNPCKHPSYrr */ |
| 138819 | VR256, VR256, VR256, |
| 138820 | /* VUNPCKHPSZ128rm */ |
| 138821 | VR128X, VR128X, f128mem, |
| 138822 | /* VUNPCKHPSZ128rmb */ |
| 138823 | VR128X, VR128X, f32mem, |
| 138824 | /* VUNPCKHPSZ128rmbk */ |
| 138825 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 138826 | /* VUNPCKHPSZ128rmbkz */ |
| 138827 | VR128X, VK4WM, VR128X, f32mem, |
| 138828 | /* VUNPCKHPSZ128rmk */ |
| 138829 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 138830 | /* VUNPCKHPSZ128rmkz */ |
| 138831 | VR128X, VK4WM, VR128X, f128mem, |
| 138832 | /* VUNPCKHPSZ128rr */ |
| 138833 | VR128X, VR128X, VR128X, |
| 138834 | /* VUNPCKHPSZ128rrk */ |
| 138835 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 138836 | /* VUNPCKHPSZ128rrkz */ |
| 138837 | VR128X, VK4WM, VR128X, VR128X, |
| 138838 | /* VUNPCKHPSZ256rm */ |
| 138839 | VR256X, VR256X, f256mem, |
| 138840 | /* VUNPCKHPSZ256rmb */ |
| 138841 | VR256X, VR256X, f32mem, |
| 138842 | /* VUNPCKHPSZ256rmbk */ |
| 138843 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 138844 | /* VUNPCKHPSZ256rmbkz */ |
| 138845 | VR256X, VK8WM, VR256X, f32mem, |
| 138846 | /* VUNPCKHPSZ256rmk */ |
| 138847 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 138848 | /* VUNPCKHPSZ256rmkz */ |
| 138849 | VR256X, VK8WM, VR256X, f256mem, |
| 138850 | /* VUNPCKHPSZ256rr */ |
| 138851 | VR256X, VR256X, VR256X, |
| 138852 | /* VUNPCKHPSZ256rrk */ |
| 138853 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 138854 | /* VUNPCKHPSZ256rrkz */ |
| 138855 | VR256X, VK8WM, VR256X, VR256X, |
| 138856 | /* VUNPCKHPSZrm */ |
| 138857 | VR512, VR512, f512mem, |
| 138858 | /* VUNPCKHPSZrmb */ |
| 138859 | VR512, VR512, f32mem, |
| 138860 | /* VUNPCKHPSZrmbk */ |
| 138861 | VR512, VR512, VK16WM, VR512, f32mem, |
| 138862 | /* VUNPCKHPSZrmbkz */ |
| 138863 | VR512, VK16WM, VR512, f32mem, |
| 138864 | /* VUNPCKHPSZrmk */ |
| 138865 | VR512, VR512, VK16WM, VR512, f512mem, |
| 138866 | /* VUNPCKHPSZrmkz */ |
| 138867 | VR512, VK16WM, VR512, f512mem, |
| 138868 | /* VUNPCKHPSZrr */ |
| 138869 | VR512, VR512, VR512, |
| 138870 | /* VUNPCKHPSZrrk */ |
| 138871 | VR512, VR512, VK16WM, VR512, VR512, |
| 138872 | /* VUNPCKHPSZrrkz */ |
| 138873 | VR512, VK16WM, VR512, VR512, |
| 138874 | /* VUNPCKHPSrm */ |
| 138875 | VR128, VR128, f128mem, |
| 138876 | /* VUNPCKHPSrr */ |
| 138877 | VR128, VR128, VR128, |
| 138878 | /* VUNPCKLPDYrm */ |
| 138879 | VR256, VR256, f256mem, |
| 138880 | /* VUNPCKLPDYrr */ |
| 138881 | VR256, VR256, VR256, |
| 138882 | /* VUNPCKLPDZ128rm */ |
| 138883 | VR128X, VR128X, f128mem, |
| 138884 | /* VUNPCKLPDZ128rmb */ |
| 138885 | VR128X, VR128X, f64mem, |
| 138886 | /* VUNPCKLPDZ128rmbk */ |
| 138887 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 138888 | /* VUNPCKLPDZ128rmbkz */ |
| 138889 | VR128X, VK2WM, VR128X, f64mem, |
| 138890 | /* VUNPCKLPDZ128rmk */ |
| 138891 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 138892 | /* VUNPCKLPDZ128rmkz */ |
| 138893 | VR128X, VK2WM, VR128X, f128mem, |
| 138894 | /* VUNPCKLPDZ128rr */ |
| 138895 | VR128X, VR128X, VR128X, |
| 138896 | /* VUNPCKLPDZ128rrk */ |
| 138897 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 138898 | /* VUNPCKLPDZ128rrkz */ |
| 138899 | VR128X, VK2WM, VR128X, VR128X, |
| 138900 | /* VUNPCKLPDZ256rm */ |
| 138901 | VR256X, VR256X, f256mem, |
| 138902 | /* VUNPCKLPDZ256rmb */ |
| 138903 | VR256X, VR256X, f64mem, |
| 138904 | /* VUNPCKLPDZ256rmbk */ |
| 138905 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 138906 | /* VUNPCKLPDZ256rmbkz */ |
| 138907 | VR256X, VK4WM, VR256X, f64mem, |
| 138908 | /* VUNPCKLPDZ256rmk */ |
| 138909 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 138910 | /* VUNPCKLPDZ256rmkz */ |
| 138911 | VR256X, VK4WM, VR256X, f256mem, |
| 138912 | /* VUNPCKLPDZ256rr */ |
| 138913 | VR256X, VR256X, VR256X, |
| 138914 | /* VUNPCKLPDZ256rrk */ |
| 138915 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 138916 | /* VUNPCKLPDZ256rrkz */ |
| 138917 | VR256X, VK4WM, VR256X, VR256X, |
| 138918 | /* VUNPCKLPDZrm */ |
| 138919 | VR512, VR512, f512mem, |
| 138920 | /* VUNPCKLPDZrmb */ |
| 138921 | VR512, VR512, f64mem, |
| 138922 | /* VUNPCKLPDZrmbk */ |
| 138923 | VR512, VR512, VK8WM, VR512, f64mem, |
| 138924 | /* VUNPCKLPDZrmbkz */ |
| 138925 | VR512, VK8WM, VR512, f64mem, |
| 138926 | /* VUNPCKLPDZrmk */ |
| 138927 | VR512, VR512, VK8WM, VR512, f512mem, |
| 138928 | /* VUNPCKLPDZrmkz */ |
| 138929 | VR512, VK8WM, VR512, f512mem, |
| 138930 | /* VUNPCKLPDZrr */ |
| 138931 | VR512, VR512, VR512, |
| 138932 | /* VUNPCKLPDZrrk */ |
| 138933 | VR512, VR512, VK8WM, VR512, VR512, |
| 138934 | /* VUNPCKLPDZrrkz */ |
| 138935 | VR512, VK8WM, VR512, VR512, |
| 138936 | /* VUNPCKLPDrm */ |
| 138937 | VR128, VR128, f128mem, |
| 138938 | /* VUNPCKLPDrr */ |
| 138939 | VR128, VR128, VR128, |
| 138940 | /* VUNPCKLPSYrm */ |
| 138941 | VR256, VR256, f256mem, |
| 138942 | /* VUNPCKLPSYrr */ |
| 138943 | VR256, VR256, VR256, |
| 138944 | /* VUNPCKLPSZ128rm */ |
| 138945 | VR128X, VR128X, f128mem, |
| 138946 | /* VUNPCKLPSZ128rmb */ |
| 138947 | VR128X, VR128X, f32mem, |
| 138948 | /* VUNPCKLPSZ128rmbk */ |
| 138949 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 138950 | /* VUNPCKLPSZ128rmbkz */ |
| 138951 | VR128X, VK4WM, VR128X, f32mem, |
| 138952 | /* VUNPCKLPSZ128rmk */ |
| 138953 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 138954 | /* VUNPCKLPSZ128rmkz */ |
| 138955 | VR128X, VK4WM, VR128X, f128mem, |
| 138956 | /* VUNPCKLPSZ128rr */ |
| 138957 | VR128X, VR128X, VR128X, |
| 138958 | /* VUNPCKLPSZ128rrk */ |
| 138959 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 138960 | /* VUNPCKLPSZ128rrkz */ |
| 138961 | VR128X, VK4WM, VR128X, VR128X, |
| 138962 | /* VUNPCKLPSZ256rm */ |
| 138963 | VR256X, VR256X, f256mem, |
| 138964 | /* VUNPCKLPSZ256rmb */ |
| 138965 | VR256X, VR256X, f32mem, |
| 138966 | /* VUNPCKLPSZ256rmbk */ |
| 138967 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 138968 | /* VUNPCKLPSZ256rmbkz */ |
| 138969 | VR256X, VK8WM, VR256X, f32mem, |
| 138970 | /* VUNPCKLPSZ256rmk */ |
| 138971 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 138972 | /* VUNPCKLPSZ256rmkz */ |
| 138973 | VR256X, VK8WM, VR256X, f256mem, |
| 138974 | /* VUNPCKLPSZ256rr */ |
| 138975 | VR256X, VR256X, VR256X, |
| 138976 | /* VUNPCKLPSZ256rrk */ |
| 138977 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 138978 | /* VUNPCKLPSZ256rrkz */ |
| 138979 | VR256X, VK8WM, VR256X, VR256X, |
| 138980 | /* VUNPCKLPSZrm */ |
| 138981 | VR512, VR512, f512mem, |
| 138982 | /* VUNPCKLPSZrmb */ |
| 138983 | VR512, VR512, f32mem, |
| 138984 | /* VUNPCKLPSZrmbk */ |
| 138985 | VR512, VR512, VK16WM, VR512, f32mem, |
| 138986 | /* VUNPCKLPSZrmbkz */ |
| 138987 | VR512, VK16WM, VR512, f32mem, |
| 138988 | /* VUNPCKLPSZrmk */ |
| 138989 | VR512, VR512, VK16WM, VR512, f512mem, |
| 138990 | /* VUNPCKLPSZrmkz */ |
| 138991 | VR512, VK16WM, VR512, f512mem, |
| 138992 | /* VUNPCKLPSZrr */ |
| 138993 | VR512, VR512, VR512, |
| 138994 | /* VUNPCKLPSZrrk */ |
| 138995 | VR512, VR512, VK16WM, VR512, VR512, |
| 138996 | /* VUNPCKLPSZrrkz */ |
| 138997 | VR512, VK16WM, VR512, VR512, |
| 138998 | /* VUNPCKLPSrm */ |
| 138999 | VR128, VR128, f128mem, |
| 139000 | /* VUNPCKLPSrr */ |
| 139001 | VR128, VR128, VR128, |
| 139002 | /* VXORPDYrm */ |
| 139003 | VR256, VR256, f256mem, |
| 139004 | /* VXORPDYrr */ |
| 139005 | VR256, VR256, VR256, |
| 139006 | /* VXORPDZ128rm */ |
| 139007 | VR128X, VR128X, f128mem, |
| 139008 | /* VXORPDZ128rmb */ |
| 139009 | VR128X, VR128X, f64mem, |
| 139010 | /* VXORPDZ128rmbk */ |
| 139011 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 139012 | /* VXORPDZ128rmbkz */ |
| 139013 | VR128X, VK2WM, VR128X, f64mem, |
| 139014 | /* VXORPDZ128rmk */ |
| 139015 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 139016 | /* VXORPDZ128rmkz */ |
| 139017 | VR128X, VK2WM, VR128X, f128mem, |
| 139018 | /* VXORPDZ128rr */ |
| 139019 | VR128X, VR128X, VR128X, |
| 139020 | /* VXORPDZ128rrk */ |
| 139021 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 139022 | /* VXORPDZ128rrkz */ |
| 139023 | VR128X, VK2WM, VR128X, VR128X, |
| 139024 | /* VXORPDZ256rm */ |
| 139025 | VR256X, VR256X, f256mem, |
| 139026 | /* VXORPDZ256rmb */ |
| 139027 | VR256X, VR256X, f64mem, |
| 139028 | /* VXORPDZ256rmbk */ |
| 139029 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 139030 | /* VXORPDZ256rmbkz */ |
| 139031 | VR256X, VK4WM, VR256X, f64mem, |
| 139032 | /* VXORPDZ256rmk */ |
| 139033 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 139034 | /* VXORPDZ256rmkz */ |
| 139035 | VR256X, VK4WM, VR256X, f256mem, |
| 139036 | /* VXORPDZ256rr */ |
| 139037 | VR256X, VR256X, VR256X, |
| 139038 | /* VXORPDZ256rrk */ |
| 139039 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 139040 | /* VXORPDZ256rrkz */ |
| 139041 | VR256X, VK4WM, VR256X, VR256X, |
| 139042 | /* VXORPDZrm */ |
| 139043 | VR512, VR512, f512mem, |
| 139044 | /* VXORPDZrmb */ |
| 139045 | VR512, VR512, f64mem, |
| 139046 | /* VXORPDZrmbk */ |
| 139047 | VR512, VR512, VK8WM, VR512, f64mem, |
| 139048 | /* VXORPDZrmbkz */ |
| 139049 | VR512, VK8WM, VR512, f64mem, |
| 139050 | /* VXORPDZrmk */ |
| 139051 | VR512, VR512, VK8WM, VR512, f512mem, |
| 139052 | /* VXORPDZrmkz */ |
| 139053 | VR512, VK8WM, VR512, f512mem, |
| 139054 | /* VXORPDZrr */ |
| 139055 | VR512, VR512, VR512, |
| 139056 | /* VXORPDZrrk */ |
| 139057 | VR512, VR512, VK8WM, VR512, VR512, |
| 139058 | /* VXORPDZrrkz */ |
| 139059 | VR512, VK8WM, VR512, VR512, |
| 139060 | /* VXORPDrm */ |
| 139061 | VR128, VR128, f128mem, |
| 139062 | /* VXORPDrr */ |
| 139063 | VR128, VR128, VR128, |
| 139064 | /* VXORPSYrm */ |
| 139065 | VR256, VR256, f256mem, |
| 139066 | /* VXORPSYrr */ |
| 139067 | VR256, VR256, VR256, |
| 139068 | /* VXORPSZ128rm */ |
| 139069 | VR128X, VR128X, f128mem, |
| 139070 | /* VXORPSZ128rmb */ |
| 139071 | VR128X, VR128X, f32mem, |
| 139072 | /* VXORPSZ128rmbk */ |
| 139073 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 139074 | /* VXORPSZ128rmbkz */ |
| 139075 | VR128X, VK4WM, VR128X, f32mem, |
| 139076 | /* VXORPSZ128rmk */ |
| 139077 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 139078 | /* VXORPSZ128rmkz */ |
| 139079 | VR128X, VK4WM, VR128X, f128mem, |
| 139080 | /* VXORPSZ128rr */ |
| 139081 | VR128X, VR128X, VR128X, |
| 139082 | /* VXORPSZ128rrk */ |
| 139083 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 139084 | /* VXORPSZ128rrkz */ |
| 139085 | VR128X, VK4WM, VR128X, VR128X, |
| 139086 | /* VXORPSZ256rm */ |
| 139087 | VR256X, VR256X, f256mem, |
| 139088 | /* VXORPSZ256rmb */ |
| 139089 | VR256X, VR256X, f32mem, |
| 139090 | /* VXORPSZ256rmbk */ |
| 139091 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 139092 | /* VXORPSZ256rmbkz */ |
| 139093 | VR256X, VK8WM, VR256X, f32mem, |
| 139094 | /* VXORPSZ256rmk */ |
| 139095 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 139096 | /* VXORPSZ256rmkz */ |
| 139097 | VR256X, VK8WM, VR256X, f256mem, |
| 139098 | /* VXORPSZ256rr */ |
| 139099 | VR256X, VR256X, VR256X, |
| 139100 | /* VXORPSZ256rrk */ |
| 139101 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 139102 | /* VXORPSZ256rrkz */ |
| 139103 | VR256X, VK8WM, VR256X, VR256X, |
| 139104 | /* VXORPSZrm */ |
| 139105 | VR512, VR512, f512mem, |
| 139106 | /* VXORPSZrmb */ |
| 139107 | VR512, VR512, f32mem, |
| 139108 | /* VXORPSZrmbk */ |
| 139109 | VR512, VR512, VK16WM, VR512, f32mem, |
| 139110 | /* VXORPSZrmbkz */ |
| 139111 | VR512, VK16WM, VR512, f32mem, |
| 139112 | /* VXORPSZrmk */ |
| 139113 | VR512, VR512, VK16WM, VR512, f512mem, |
| 139114 | /* VXORPSZrmkz */ |
| 139115 | VR512, VK16WM, VR512, f512mem, |
| 139116 | /* VXORPSZrr */ |
| 139117 | VR512, VR512, VR512, |
| 139118 | /* VXORPSZrrk */ |
| 139119 | VR512, VR512, VK16WM, VR512, VR512, |
| 139120 | /* VXORPSZrrkz */ |
| 139121 | VR512, VK16WM, VR512, VR512, |
| 139122 | /* VXORPSrm */ |
| 139123 | VR128, VR128, f128mem, |
| 139124 | /* VXORPSrr */ |
| 139125 | VR128, VR128, VR128, |
| 139126 | /* VZEROALL */ |
| 139127 | /* VZEROUPPER */ |
| 139128 | /* WAIT */ |
| 139129 | /* WBINVD */ |
| 139130 | /* WBNOINVD */ |
| 139131 | /* WRFSBASE */ |
| 139132 | GR32, |
| 139133 | /* WRFSBASE64 */ |
| 139134 | GR64, |
| 139135 | /* WRGSBASE */ |
| 139136 | GR32, |
| 139137 | /* WRGSBASE64 */ |
| 139138 | GR64, |
| 139139 | /* WRMSR */ |
| 139140 | /* WRMSRLIST */ |
| 139141 | /* WRMSRNS */ |
| 139142 | /* WRMSRNSir */ |
| 139143 | GR64, i64i32imm, |
| 139144 | /* WRMSRNSir_EVEX */ |
| 139145 | GR64, i64i32imm, |
| 139146 | /* WRPKRUr */ |
| 139147 | /* WRSSD */ |
| 139148 | i32mem, GR32, |
| 139149 | /* WRSSD_EVEX */ |
| 139150 | i32mem, GR32, |
| 139151 | /* WRSSQ */ |
| 139152 | i64mem, GR64, |
| 139153 | /* WRSSQ_EVEX */ |
| 139154 | i64mem, GR64, |
| 139155 | /* WRUSSD */ |
| 139156 | i32mem, GR32, |
| 139157 | /* WRUSSD_EVEX */ |
| 139158 | i32mem, GR32, |
| 139159 | /* WRUSSQ */ |
| 139160 | i64mem, GR64, |
| 139161 | /* WRUSSQ_EVEX */ |
| 139162 | i64mem, GR64, |
| 139163 | /* XABORT */ |
| 139164 | i8imm, |
| 139165 | /* XACQUIRE_PREFIX */ |
| 139166 | /* XADD16rm */ |
| 139167 | GR16, GR16, i16mem, |
| 139168 | /* XADD16rr */ |
| 139169 | GR16, GR16, GR16, GR16, |
| 139170 | /* XADD32rm */ |
| 139171 | GR32, GR32, i32mem, |
| 139172 | /* XADD32rr */ |
| 139173 | GR32, GR32, GR32, GR32, |
| 139174 | /* XADD64rm */ |
| 139175 | GR64, GR64, i64mem, |
| 139176 | /* XADD64rr */ |
| 139177 | GR64, GR64, GR64, GR64, |
| 139178 | /* XADD8rm */ |
| 139179 | GR8, GR8, i8mem, |
| 139180 | /* XADD8rr */ |
| 139181 | GR8, GR8, GR8, GR8, |
| 139182 | /* XAM_F */ |
| 139183 | /* XAM_Fp32 */ |
| 139184 | RFP32, |
| 139185 | /* XAM_Fp64 */ |
| 139186 | RFP64, |
| 139187 | /* XAM_Fp80 */ |
| 139188 | RFP80, |
| 139189 | /* XBEGIN */ |
| 139190 | GR32, |
| 139191 | /* XBEGIN_2 */ |
| 139192 | brtarget16, |
| 139193 | /* XBEGIN_4 */ |
| 139194 | brtarget32, |
| 139195 | /* XCHG16ar */ |
| 139196 | GR16, GR16, |
| 139197 | /* XCHG16rm */ |
| 139198 | GR16, GR16, i16mem, |
| 139199 | /* XCHG16rr */ |
| 139200 | GR16, GR16, GR16, GR16, |
| 139201 | /* XCHG32ar */ |
| 139202 | GR32, GR32, |
| 139203 | /* XCHG32rm */ |
| 139204 | GR32, GR32, i32mem, |
| 139205 | /* XCHG32rr */ |
| 139206 | GR32, GR32, GR32, GR32, |
| 139207 | /* XCHG64ar */ |
| 139208 | GR64, GR64, |
| 139209 | /* XCHG64rm */ |
| 139210 | GR64, GR64, i64mem, |
| 139211 | /* XCHG64rr */ |
| 139212 | GR64, GR64, GR64, GR64, |
| 139213 | /* XCHG8rm */ |
| 139214 | GR8, GR8, i8mem, |
| 139215 | /* XCHG8rr */ |
| 139216 | GR8, GR8, GR8, GR8, |
| 139217 | /* XCH_F */ |
| 139218 | RSTi, |
| 139219 | /* XCRYPTCBC */ |
| 139220 | /* XCRYPTCFB */ |
| 139221 | /* XCRYPTCTR */ |
| 139222 | /* XCRYPTECB */ |
| 139223 | /* XCRYPTOFB */ |
| 139224 | /* XEND */ |
| 139225 | /* XGETBV */ |
| 139226 | /* XLAT */ |
| 139227 | /* XOR16i16 */ |
| 139228 | i16imm, |
| 139229 | /* XOR16mi */ |
| 139230 | i16mem, i16imm, |
| 139231 | /* XOR16mi8 */ |
| 139232 | i16mem, i16i8imm, |
| 139233 | /* XOR16mi8_EVEX */ |
| 139234 | i16mem, i16i8imm, |
| 139235 | /* XOR16mi8_ND */ |
| 139236 | GR16, i16mem, i16i8imm, |
| 139237 | /* XOR16mi8_NF */ |
| 139238 | i16mem, i16i8imm, |
| 139239 | /* XOR16mi8_NF_ND */ |
| 139240 | GR16, i16mem, i16i8imm, |
| 139241 | /* XOR16mi_EVEX */ |
| 139242 | i16mem, i16imm, |
| 139243 | /* XOR16mi_ND */ |
| 139244 | GR16, i16mem, i16imm, |
| 139245 | /* XOR16mi_NF */ |
| 139246 | i16mem, i16imm, |
| 139247 | /* XOR16mi_NF_ND */ |
| 139248 | GR16, i16mem, i16imm, |
| 139249 | /* XOR16mr */ |
| 139250 | i16mem, GR16, |
| 139251 | /* XOR16mr_EVEX */ |
| 139252 | i16mem, GR16, |
| 139253 | /* XOR16mr_ND */ |
| 139254 | GR16, i16mem, GR16, |
| 139255 | /* XOR16mr_NF */ |
| 139256 | i16mem, GR16, |
| 139257 | /* XOR16mr_NF_ND */ |
| 139258 | GR16, i16mem, GR16, |
| 139259 | /* XOR16ri */ |
| 139260 | GR16, GR16, i16imm, |
| 139261 | /* XOR16ri8 */ |
| 139262 | GR16, GR16, i16i8imm, |
| 139263 | /* XOR16ri8_EVEX */ |
| 139264 | GR16, GR16, i16i8imm, |
| 139265 | /* XOR16ri8_ND */ |
| 139266 | GR16, GR16, i16i8imm, |
| 139267 | /* XOR16ri8_NF */ |
| 139268 | GR16, GR16, i16i8imm, |
| 139269 | /* XOR16ri8_NF_ND */ |
| 139270 | GR16, GR16, i16i8imm, |
| 139271 | /* XOR16ri_EVEX */ |
| 139272 | GR16, GR16, i16imm, |
| 139273 | /* XOR16ri_ND */ |
| 139274 | GR16, GR16, i16imm, |
| 139275 | /* XOR16ri_NF */ |
| 139276 | GR16, GR16, i16imm, |
| 139277 | /* XOR16ri_NF_ND */ |
| 139278 | GR16, GR16, i16imm, |
| 139279 | /* XOR16rm */ |
| 139280 | GR16, GR16, i16mem, |
| 139281 | /* XOR16rm_EVEX */ |
| 139282 | GR16, GR16, i16mem, |
| 139283 | /* XOR16rm_ND */ |
| 139284 | GR16, GR16, i16mem, |
| 139285 | /* XOR16rm_NF */ |
| 139286 | GR16, GR16, i16mem, |
| 139287 | /* XOR16rm_NF_ND */ |
| 139288 | GR16, GR16, i16mem, |
| 139289 | /* XOR16rr */ |
| 139290 | GR16, GR16, GR16, |
| 139291 | /* XOR16rr_EVEX */ |
| 139292 | GR16, GR16, GR16, |
| 139293 | /* XOR16rr_EVEX_REV */ |
| 139294 | GR16, GR16, GR16, |
| 139295 | /* XOR16rr_ND */ |
| 139296 | GR16, GR16, GR16, |
| 139297 | /* XOR16rr_ND_REV */ |
| 139298 | GR16, GR16, GR16, |
| 139299 | /* XOR16rr_NF */ |
| 139300 | GR16, GR16, GR16, |
| 139301 | /* XOR16rr_NF_ND */ |
| 139302 | GR16, GR16, GR16, |
| 139303 | /* XOR16rr_NF_ND_REV */ |
| 139304 | GR16, GR16, GR16, |
| 139305 | /* XOR16rr_NF_REV */ |
| 139306 | GR16, GR16, GR16, |
| 139307 | /* XOR16rr_REV */ |
| 139308 | GR16, GR16, GR16, |
| 139309 | /* XOR32i32 */ |
| 139310 | i32imm, |
| 139311 | /* XOR32mi */ |
| 139312 | i32mem, i32imm, |
| 139313 | /* XOR32mi8 */ |
| 139314 | i32mem, i32i8imm, |
| 139315 | /* XOR32mi8_EVEX */ |
| 139316 | i32mem, i32i8imm, |
| 139317 | /* XOR32mi8_ND */ |
| 139318 | GR32, i32mem, i32i8imm, |
| 139319 | /* XOR32mi8_NF */ |
| 139320 | i32mem, i32i8imm, |
| 139321 | /* XOR32mi8_NF_ND */ |
| 139322 | GR32, i32mem, i32i8imm, |
| 139323 | /* XOR32mi_EVEX */ |
| 139324 | i32mem, i32imm, |
| 139325 | /* XOR32mi_ND */ |
| 139326 | GR32, i32mem, i32imm, |
| 139327 | /* XOR32mi_NF */ |
| 139328 | i32mem, i32imm, |
| 139329 | /* XOR32mi_NF_ND */ |
| 139330 | GR32, i32mem, i32imm, |
| 139331 | /* XOR32mr */ |
| 139332 | i32mem, GR32, |
| 139333 | /* XOR32mr_EVEX */ |
| 139334 | i32mem, GR32, |
| 139335 | /* XOR32mr_ND */ |
| 139336 | GR32, i32mem, GR32, |
| 139337 | /* XOR32mr_NF */ |
| 139338 | i32mem, GR32, |
| 139339 | /* XOR32mr_NF_ND */ |
| 139340 | GR32, i32mem, GR32, |
| 139341 | /* XOR32ri */ |
| 139342 | GR32, GR32, i32imm, |
| 139343 | /* XOR32ri8 */ |
| 139344 | GR32, GR32, i32i8imm, |
| 139345 | /* XOR32ri8_EVEX */ |
| 139346 | GR32, GR32, i32i8imm, |
| 139347 | /* XOR32ri8_ND */ |
| 139348 | GR32, GR32, i32i8imm, |
| 139349 | /* XOR32ri8_NF */ |
| 139350 | GR32, GR32, i32i8imm, |
| 139351 | /* XOR32ri8_NF_ND */ |
| 139352 | GR32, GR32, i32i8imm, |
| 139353 | /* XOR32ri_EVEX */ |
| 139354 | GR32, GR32, i32imm, |
| 139355 | /* XOR32ri_ND */ |
| 139356 | GR32, GR32, i32imm, |
| 139357 | /* XOR32ri_NF */ |
| 139358 | GR32, GR32, i32imm, |
| 139359 | /* XOR32ri_NF_ND */ |
| 139360 | GR32, GR32, i32imm, |
| 139361 | /* XOR32rm */ |
| 139362 | GR32, GR32, i32mem, |
| 139363 | /* XOR32rm_EVEX */ |
| 139364 | GR32, GR32, i32mem, |
| 139365 | /* XOR32rm_ND */ |
| 139366 | GR32, GR32, i32mem, |
| 139367 | /* XOR32rm_NF */ |
| 139368 | GR32, GR32, i32mem, |
| 139369 | /* XOR32rm_NF_ND */ |
| 139370 | GR32, GR32, i32mem, |
| 139371 | /* XOR32rr */ |
| 139372 | GR32, GR32, GR32, |
| 139373 | /* XOR32rr_EVEX */ |
| 139374 | GR32, GR32, GR32, |
| 139375 | /* XOR32rr_EVEX_REV */ |
| 139376 | GR32, GR32, GR32, |
| 139377 | /* XOR32rr_ND */ |
| 139378 | GR32, GR32, GR32, |
| 139379 | /* XOR32rr_ND_REV */ |
| 139380 | GR32, GR32, GR32, |
| 139381 | /* XOR32rr_NF */ |
| 139382 | GR32, GR32, GR32, |
| 139383 | /* XOR32rr_NF_ND */ |
| 139384 | GR32, GR32, GR32, |
| 139385 | /* XOR32rr_NF_ND_REV */ |
| 139386 | GR32, GR32, GR32, |
| 139387 | /* XOR32rr_NF_REV */ |
| 139388 | GR32, GR32, GR32, |
| 139389 | /* XOR32rr_REV */ |
| 139390 | GR32, GR32, GR32, |
| 139391 | /* XOR64i32 */ |
| 139392 | i64i32imm, |
| 139393 | /* XOR64mi32 */ |
| 139394 | i64mem, i64i32imm, |
| 139395 | /* XOR64mi32_EVEX */ |
| 139396 | i64mem, i64i32imm, |
| 139397 | /* XOR64mi32_ND */ |
| 139398 | GR64, i64mem, i64i32imm, |
| 139399 | /* XOR64mi32_NF */ |
| 139400 | i64mem, i64i32imm, |
| 139401 | /* XOR64mi32_NF_ND */ |
| 139402 | GR64, i64mem, i64i32imm, |
| 139403 | /* XOR64mi8 */ |
| 139404 | i64mem, i64i8imm, |
| 139405 | /* XOR64mi8_EVEX */ |
| 139406 | i64mem, i64i8imm, |
| 139407 | /* XOR64mi8_ND */ |
| 139408 | GR64, i64mem, i64i8imm, |
| 139409 | /* XOR64mi8_NF */ |
| 139410 | i64mem, i64i8imm, |
| 139411 | /* XOR64mi8_NF_ND */ |
| 139412 | GR64, i64mem, i64i8imm, |
| 139413 | /* XOR64mr */ |
| 139414 | i64mem, GR64, |
| 139415 | /* XOR64mr_EVEX */ |
| 139416 | i64mem, GR64, |
| 139417 | /* XOR64mr_ND */ |
| 139418 | GR64, i64mem, GR64, |
| 139419 | /* XOR64mr_NF */ |
| 139420 | i64mem, GR64, |
| 139421 | /* XOR64mr_NF_ND */ |
| 139422 | GR64, i64mem, GR64, |
| 139423 | /* XOR64ri32 */ |
| 139424 | GR64, GR64, i64i32imm, |
| 139425 | /* XOR64ri32_EVEX */ |
| 139426 | GR64, GR64, i64i32imm, |
| 139427 | /* XOR64ri32_ND */ |
| 139428 | GR64, GR64, i64i32imm, |
| 139429 | /* XOR64ri32_NF */ |
| 139430 | GR64, GR64, i64i32imm, |
| 139431 | /* XOR64ri32_NF_ND */ |
| 139432 | GR64, GR64, i64i32imm, |
| 139433 | /* XOR64ri8 */ |
| 139434 | GR64, GR64, i64i8imm, |
| 139435 | /* XOR64ri8_EVEX */ |
| 139436 | GR64, GR64, i64i8imm, |
| 139437 | /* XOR64ri8_ND */ |
| 139438 | GR64, GR64, i64i8imm, |
| 139439 | /* XOR64ri8_NF */ |
| 139440 | GR64, GR64, i64i8imm, |
| 139441 | /* XOR64ri8_NF_ND */ |
| 139442 | GR64, GR64, i64i8imm, |
| 139443 | /* XOR64rm */ |
| 139444 | GR64, GR64, i64mem, |
| 139445 | /* XOR64rm_EVEX */ |
| 139446 | GR64, GR64, i64mem, |
| 139447 | /* XOR64rm_ND */ |
| 139448 | GR64, GR64, i64mem, |
| 139449 | /* XOR64rm_NF */ |
| 139450 | GR64, GR64, i64mem, |
| 139451 | /* XOR64rm_NF_ND */ |
| 139452 | GR64, GR64, i64mem, |
| 139453 | /* XOR64rr */ |
| 139454 | GR64, GR64, GR64, |
| 139455 | /* XOR64rr_EVEX */ |
| 139456 | GR64, GR64, GR64, |
| 139457 | /* XOR64rr_EVEX_REV */ |
| 139458 | GR64, GR64, GR64, |
| 139459 | /* XOR64rr_ND */ |
| 139460 | GR64, GR64, GR64, |
| 139461 | /* XOR64rr_ND_REV */ |
| 139462 | GR64, GR64, GR64, |
| 139463 | /* XOR64rr_NF */ |
| 139464 | GR64, GR64, GR64, |
| 139465 | /* XOR64rr_NF_ND */ |
| 139466 | GR64, GR64, GR64, |
| 139467 | /* XOR64rr_NF_ND_REV */ |
| 139468 | GR64, GR64, GR64, |
| 139469 | /* XOR64rr_NF_REV */ |
| 139470 | GR64, GR64, GR64, |
| 139471 | /* XOR64rr_REV */ |
| 139472 | GR64, GR64, GR64, |
| 139473 | /* XOR8i8 */ |
| 139474 | i8imm, |
| 139475 | /* XOR8mi */ |
| 139476 | i8mem, i8imm, |
| 139477 | /* XOR8mi8 */ |
| 139478 | i8mem, i8imm, |
| 139479 | /* XOR8mi_EVEX */ |
| 139480 | i8mem, i8imm, |
| 139481 | /* XOR8mi_ND */ |
| 139482 | GR8, i8mem, i8imm, |
| 139483 | /* XOR8mi_NF */ |
| 139484 | i8mem, i8imm, |
| 139485 | /* XOR8mi_NF_ND */ |
| 139486 | GR8, i8mem, i8imm, |
| 139487 | /* XOR8mr */ |
| 139488 | i8mem, GR8, |
| 139489 | /* XOR8mr_EVEX */ |
| 139490 | i8mem, GR8, |
| 139491 | /* XOR8mr_ND */ |
| 139492 | GR8, i8mem, GR8, |
| 139493 | /* XOR8mr_NF */ |
| 139494 | i8mem, GR8, |
| 139495 | /* XOR8mr_NF_ND */ |
| 139496 | GR8, i8mem, GR8, |
| 139497 | /* XOR8ri */ |
| 139498 | GR8, GR8, i8imm, |
| 139499 | /* XOR8ri8 */ |
| 139500 | GR8, GR8, i8imm, |
| 139501 | /* XOR8ri_EVEX */ |
| 139502 | GR8, GR8, i8imm, |
| 139503 | /* XOR8ri_ND */ |
| 139504 | GR8, GR8, i8imm, |
| 139505 | /* XOR8ri_NF */ |
| 139506 | GR8, GR8, i8imm, |
| 139507 | /* XOR8ri_NF_ND */ |
| 139508 | GR8, GR8, i8imm, |
| 139509 | /* XOR8rm */ |
| 139510 | GR8, GR8, i8mem, |
| 139511 | /* XOR8rm_EVEX */ |
| 139512 | GR8, GR8, i8mem, |
| 139513 | /* XOR8rm_ND */ |
| 139514 | GR8, GR8, i8mem, |
| 139515 | /* XOR8rm_NF */ |
| 139516 | GR8, GR8, i8mem, |
| 139517 | /* XOR8rm_NF_ND */ |
| 139518 | GR8, GR8, i8mem, |
| 139519 | /* XOR8rr */ |
| 139520 | GR8, GR8, GR8, |
| 139521 | /* XOR8rr_EVEX */ |
| 139522 | GR8, GR8, GR8, |
| 139523 | /* XOR8rr_EVEX_REV */ |
| 139524 | GR8, GR8, GR8, |
| 139525 | /* XOR8rr_ND */ |
| 139526 | GR8, GR8, GR8, |
| 139527 | /* XOR8rr_ND_REV */ |
| 139528 | GR8, GR8, GR8, |
| 139529 | /* XOR8rr_NF */ |
| 139530 | GR8, GR8, GR8, |
| 139531 | /* XOR8rr_NF_ND */ |
| 139532 | GR8, GR8, GR8, |
| 139533 | /* XOR8rr_NF_ND_REV */ |
| 139534 | GR8, GR8, GR8, |
| 139535 | /* XOR8rr_NF_REV */ |
| 139536 | GR8, GR8, GR8, |
| 139537 | /* XOR8rr_NOREX */ |
| 139538 | GR8_NOREX, GR8_NOREX, GR8_NOREX, |
| 139539 | /* XOR8rr_REV */ |
| 139540 | GR8, GR8, GR8, |
| 139541 | /* XORPDrm */ |
| 139542 | VR128, VR128, f128mem, |
| 139543 | /* XORPDrr */ |
| 139544 | VR128, VR128, VR128, |
| 139545 | /* XORPSrm */ |
| 139546 | VR128, VR128, f128mem, |
| 139547 | /* XORPSrr */ |
| 139548 | VR128, VR128, VR128, |
| 139549 | /* XRELEASE_PREFIX */ |
| 139550 | /* XRESLDTRK */ |
| 139551 | /* XRSTOR */ |
| 139552 | opaquemem, |
| 139553 | /* XRSTOR64 */ |
| 139554 | opaquemem, |
| 139555 | /* XRSTORS */ |
| 139556 | opaquemem, |
| 139557 | /* XRSTORS64 */ |
| 139558 | opaquemem, |
| 139559 | /* XSAVE */ |
| 139560 | opaquemem, |
| 139561 | /* XSAVE64 */ |
| 139562 | opaquemem, |
| 139563 | /* XSAVEC */ |
| 139564 | opaquemem, |
| 139565 | /* XSAVEC64 */ |
| 139566 | opaquemem, |
| 139567 | /* XSAVEOPT */ |
| 139568 | opaquemem, |
| 139569 | /* XSAVEOPT64 */ |
| 139570 | opaquemem, |
| 139571 | /* XSAVES */ |
| 139572 | opaquemem, |
| 139573 | /* XSAVES64 */ |
| 139574 | opaquemem, |
| 139575 | }; |
| 139576 | return OpcodeOperandTypes[Offsets[Opcode] + OpIdx]; |
| 139577 | } |
| 139578 | } // end namespace llvm::X86 |
| 139579 | #endif // GET_INSTRINFO_OPERAND_TYPE |
| 139580 | |
| 139581 | #ifdef GET_INSTRINFO_MEM_OPERAND_SIZE |
| 139582 | #undef GET_INSTRINFO_MEM_OPERAND_SIZE |
| 139583 | namespace llvm::X86 { |
| 139584 | LLVM_READONLY |
| 139585 | static int getMemOperandSize(int OpType) { |
| 139586 | switch (OpType) { |
| 139587 | default: return 0; |
| 139588 | case OpTypes::i8mem: |
| 139589 | case OpTypes::i8mem_NOREX: |
| 139590 | return 8; |
| 139591 | |
| 139592 | case OpTypes::f16mem: |
| 139593 | case OpTypes::i16mem: |
| 139594 | return 16; |
| 139595 | |
| 139596 | case OpTypes::f32mem: |
| 139597 | case OpTypes::i32mem: |
| 139598 | case OpTypes::i32mem_TC: |
| 139599 | case OpTypes::vx32mem: |
| 139600 | case OpTypes::vx32xmem: |
| 139601 | case OpTypes::vy32mem: |
| 139602 | case OpTypes::vy32xmem: |
| 139603 | case OpTypes::vz32mem: |
| 139604 | return 32; |
| 139605 | |
| 139606 | case OpTypes::f64mem: |
| 139607 | case OpTypes::i64mem: |
| 139608 | case OpTypes::i64mem_TC: |
| 139609 | case OpTypes::vx64mem: |
| 139610 | case OpTypes::vx64xmem: |
| 139611 | case OpTypes::vy64mem: |
| 139612 | case OpTypes::vy64xmem: |
| 139613 | case OpTypes::vz64mem: |
| 139614 | return 64; |
| 139615 | |
| 139616 | case OpTypes::f80mem: |
| 139617 | return 80; |
| 139618 | |
| 139619 | case OpTypes::f128mem: |
| 139620 | case OpTypes::i128mem: |
| 139621 | return 128; |
| 139622 | |
| 139623 | case OpTypes::f256mem: |
| 139624 | case OpTypes::i256mem: |
| 139625 | return 256; |
| 139626 | |
| 139627 | case OpTypes::f512mem: |
| 139628 | case OpTypes::i512mem: |
| 139629 | case OpTypes::i512mem_GR16: |
| 139630 | case OpTypes::i512mem_GR32: |
| 139631 | case OpTypes::i512mem_GR64: |
| 139632 | return 512; |
| 139633 | |
| 139634 | } |
| 139635 | } |
| 139636 | } // end namespace llvm::X86 |
| 139637 | #endif // GET_INSTRINFO_MEM_OPERAND_SIZE |
| 139638 | |
| 139639 | #ifdef GET_INSTRINFO_MC_HELPER_DECLS |
| 139640 | #undef GET_INSTRINFO_MC_HELPER_DECLS |
| 139641 | |
| 139642 | namespace llvm { |
| 139643 | class MCInst; |
| 139644 | class FeatureBitset; |
| 139645 | |
| 139646 | namespace X86_MC { |
| 139647 | |
| 139648 | bool isThreeOperandsLEA(const MCInst &MI); |
| 139649 | void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features); |
| 139650 | |
| 139651 | } // end namespace X86_MC |
| 139652 | } // end namespace llvm |
| 139653 | |
| 139654 | #endif // GET_INSTRINFO_MC_HELPER_DECLS |
| 139655 | |
| 139656 | #ifdef GET_INSTRINFO_MC_HELPERS |
| 139657 | #undef GET_INSTRINFO_MC_HELPERS |
| 139658 | |
| 139659 | namespace llvm::X86_MC { |
| 139660 | bool isThreeOperandsLEA(const MCInst &MI) { |
| 139661 | switch(MI.getOpcode()) { |
| 139662 | case X86::LEA32r: |
| 139663 | case X86::LEA64r: |
| 139664 | case X86::LEA64_32r: |
| 139665 | case X86::LEA16r: |
| 139666 | return ( |
| 139667 | MI.getOperand(1).isReg() |
| 139668 | && MI.getOperand(1).getReg().isValid() |
| 139669 | && MI.getOperand(3).isReg() |
| 139670 | && MI.getOperand(3).getReg().isValid() |
| 139671 | && ( |
| 139672 | ( |
| 139673 | MI.getOperand(4).isImm() |
| 139674 | && MI.getOperand(4).getImm() != 0 |
| 139675 | ) |
| 139676 | || false |
| 139677 | ) |
| 139678 | ); |
| 139679 | default: |
| 139680 | return false; |
| 139681 | } // end of switch-stmt |
| 139682 | } |
| 139683 | |
| 139684 | } // end namespace llvm::X86_MC |
| 139685 | #endif // GET_GENISTRINFO_MC_HELPERS |
| 139686 | |
| 139687 | #if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\ |
| 139688 | defined(GET_AVAILABLE_OPCODE_CHECKER) |
| 139689 | #define GET_COMPUTE_FEATURES |
| 139690 | #endif |
| 139691 | #ifdef GET_COMPUTE_FEATURES |
| 139692 | #undef GET_COMPUTE_FEATURES |
| 139693 | namespace llvm::X86_MC { |
| 139694 | // Bits for subtarget features that participate in instruction matching. |
| 139695 | enum SubtargetFeatureBits : uint8_t { |
| 139696 | Feature_Not64BitModeBit = 4, |
| 139697 | Feature_In64BitModeBit = 2, |
| 139698 | Feature_In16BitModeBit = 0, |
| 139699 | Feature_Not16BitModeBit = 3, |
| 139700 | Feature_In32BitModeBit = 1, |
| 139701 | }; |
| 139702 | |
| 139703 | inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) { |
| 139704 | FeatureBitset Features; |
| 139705 | if (!FB[X86::Is64Bit]) |
| 139706 | Features.set(Feature_Not64BitModeBit); |
| 139707 | if (FB[X86::Is64Bit]) |
| 139708 | Features.set(Feature_In64BitModeBit); |
| 139709 | if (FB[X86::Is16Bit]) |
| 139710 | Features.set(Feature_In16BitModeBit); |
| 139711 | if (!FB[X86::Is16Bit]) |
| 139712 | Features.set(Feature_Not16BitModeBit); |
| 139713 | if (FB[X86::Is32Bit]) |
| 139714 | Features.set(Feature_In32BitModeBit); |
| 139715 | return Features; |
| 139716 | } |
| 139717 | |
| 139718 | inline FeatureBitset computeRequiredFeatures(unsigned Opcode) { |
| 139719 | enum : uint8_t { |
| 139720 | CEFBS_None, |
| 139721 | CEFBS_In32BitMode, |
| 139722 | CEFBS_In64BitMode, |
| 139723 | CEFBS_Not64BitMode, |
| 139724 | }; |
| 139725 | |
| 139726 | static constexpr FeatureBitset FeatureBitsets[] = { |
| 139727 | {}, // CEFBS_None |
| 139728 | {Feature_In32BitModeBit, }, |
| 139729 | {Feature_In64BitModeBit, }, |
| 139730 | {Feature_Not64BitModeBit, }, |
| 139731 | }; |
| 139732 | static constexpr uint8_t RequiredFeaturesRefs[] = { |
| 139733 | CEFBS_None, // PHI = 0 |
| 139734 | CEFBS_None, // INLINEASM = 1 |
| 139735 | CEFBS_None, // INLINEASM_BR = 2 |
| 139736 | CEFBS_None, // CFI_INSTRUCTION = 3 |
| 139737 | CEFBS_None, // EH_LABEL = 4 |
| 139738 | CEFBS_None, // GC_LABEL = 5 |
| 139739 | CEFBS_None, // ANNOTATION_LABEL = 6 |
| 139740 | CEFBS_None, // KILL = 7 |
| 139741 | CEFBS_None, // EXTRACT_SUBREG = 8 |
| 139742 | CEFBS_None, // INSERT_SUBREG = 9 |
| 139743 | CEFBS_None, // IMPLICIT_DEF = 10 |
| 139744 | CEFBS_None, // INIT_UNDEF = 11 |
| 139745 | CEFBS_None, // SUBREG_TO_REG = 12 |
| 139746 | CEFBS_None, // COPY_TO_REGCLASS = 13 |
| 139747 | CEFBS_None, // DBG_VALUE = 14 |
| 139748 | CEFBS_None, // DBG_VALUE_LIST = 15 |
| 139749 | CEFBS_None, // DBG_INSTR_REF = 16 |
| 139750 | CEFBS_None, // DBG_PHI = 17 |
| 139751 | CEFBS_None, // DBG_LABEL = 18 |
| 139752 | CEFBS_None, // REG_SEQUENCE = 19 |
| 139753 | CEFBS_None, // COPY = 20 |
| 139754 | CEFBS_None, // BUNDLE = 21 |
| 139755 | CEFBS_None, // LIFETIME_START = 22 |
| 139756 | CEFBS_None, // LIFETIME_END = 23 |
| 139757 | CEFBS_None, // PSEUDO_PROBE = 24 |
| 139758 | CEFBS_None, // ARITH_FENCE = 25 |
| 139759 | CEFBS_None, // STACKMAP = 26 |
| 139760 | CEFBS_None, // FENTRY_CALL = 27 |
| 139761 | CEFBS_None, // PATCHPOINT = 28 |
| 139762 | CEFBS_None, // LOAD_STACK_GUARD = 29 |
| 139763 | CEFBS_None, // PREALLOCATED_SETUP = 30 |
| 139764 | CEFBS_None, // PREALLOCATED_ARG = 31 |
| 139765 | CEFBS_None, // STATEPOINT = 32 |
| 139766 | CEFBS_None, // LOCAL_ESCAPE = 33 |
| 139767 | CEFBS_None, // FAULTING_OP = 34 |
| 139768 | CEFBS_None, // PATCHABLE_OP = 35 |
| 139769 | CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 36 |
| 139770 | CEFBS_None, // PATCHABLE_RET = 37 |
| 139771 | CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 38 |
| 139772 | CEFBS_None, // PATCHABLE_TAIL_CALL = 39 |
| 139773 | CEFBS_None, // PATCHABLE_EVENT_CALL = 40 |
| 139774 | CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 41 |
| 139775 | CEFBS_None, // ICALL_BRANCH_FUNNEL = 42 |
| 139776 | CEFBS_None, // FAKE_USE = 43 |
| 139777 | CEFBS_None, // MEMBARRIER = 44 |
| 139778 | CEFBS_None, // JUMP_TABLE_DEBUG_INFO = 45 |
| 139779 | CEFBS_None, // CONVERGENCECTRL_ENTRY = 46 |
| 139780 | CEFBS_None, // CONVERGENCECTRL_ANCHOR = 47 |
| 139781 | CEFBS_None, // CONVERGENCECTRL_LOOP = 48 |
| 139782 | CEFBS_None, // CONVERGENCECTRL_GLUE = 49 |
| 139783 | CEFBS_None, // G_ASSERT_SEXT = 50 |
| 139784 | CEFBS_None, // G_ASSERT_ZEXT = 51 |
| 139785 | CEFBS_None, // G_ASSERT_ALIGN = 52 |
| 139786 | CEFBS_None, // G_ADD = 53 |
| 139787 | CEFBS_None, // G_SUB = 54 |
| 139788 | CEFBS_None, // G_MUL = 55 |
| 139789 | CEFBS_None, // G_SDIV = 56 |
| 139790 | CEFBS_None, // G_UDIV = 57 |
| 139791 | CEFBS_None, // G_SREM = 58 |
| 139792 | CEFBS_None, // G_UREM = 59 |
| 139793 | CEFBS_None, // G_SDIVREM = 60 |
| 139794 | CEFBS_None, // G_UDIVREM = 61 |
| 139795 | CEFBS_None, // G_AND = 62 |
| 139796 | CEFBS_None, // G_OR = 63 |
| 139797 | CEFBS_None, // G_XOR = 64 |
| 139798 | CEFBS_None, // G_ABDS = 65 |
| 139799 | CEFBS_None, // G_ABDU = 66 |
| 139800 | CEFBS_None, // G_IMPLICIT_DEF = 67 |
| 139801 | CEFBS_None, // G_PHI = 68 |
| 139802 | CEFBS_None, // G_FRAME_INDEX = 69 |
| 139803 | CEFBS_None, // G_GLOBAL_VALUE = 70 |
| 139804 | CEFBS_None, // G_PTRAUTH_GLOBAL_VALUE = 71 |
| 139805 | CEFBS_None, // G_CONSTANT_POOL = 72 |
| 139806 | CEFBS_None, // G_EXTRACT = 73 |
| 139807 | CEFBS_None, // G_UNMERGE_VALUES = 74 |
| 139808 | CEFBS_None, // G_INSERT = 75 |
| 139809 | CEFBS_None, // G_MERGE_VALUES = 76 |
| 139810 | CEFBS_None, // G_BUILD_VECTOR = 77 |
| 139811 | CEFBS_None, // G_BUILD_VECTOR_TRUNC = 78 |
| 139812 | CEFBS_None, // G_CONCAT_VECTORS = 79 |
| 139813 | CEFBS_None, // G_PTRTOINT = 80 |
| 139814 | CEFBS_None, // G_INTTOPTR = 81 |
| 139815 | CEFBS_None, // G_BITCAST = 82 |
| 139816 | CEFBS_None, // G_FREEZE = 83 |
| 139817 | CEFBS_None, // G_CONSTANT_FOLD_BARRIER = 84 |
| 139818 | CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 85 |
| 139819 | CEFBS_None, // G_INTRINSIC_TRUNC = 86 |
| 139820 | CEFBS_None, // G_INTRINSIC_ROUND = 87 |
| 139821 | CEFBS_None, // G_INTRINSIC_LRINT = 88 |
| 139822 | CEFBS_None, // G_INTRINSIC_LLRINT = 89 |
| 139823 | CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 90 |
| 139824 | CEFBS_None, // G_READCYCLECOUNTER = 91 |
| 139825 | CEFBS_None, // G_READSTEADYCOUNTER = 92 |
| 139826 | CEFBS_None, // G_LOAD = 93 |
| 139827 | CEFBS_None, // G_SEXTLOAD = 94 |
| 139828 | CEFBS_None, // G_ZEXTLOAD = 95 |
| 139829 | CEFBS_None, // G_INDEXED_LOAD = 96 |
| 139830 | CEFBS_None, // G_INDEXED_SEXTLOAD = 97 |
| 139831 | CEFBS_None, // G_INDEXED_ZEXTLOAD = 98 |
| 139832 | CEFBS_None, // G_STORE = 99 |
| 139833 | CEFBS_None, // G_INDEXED_STORE = 100 |
| 139834 | CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 101 |
| 139835 | CEFBS_None, // G_ATOMIC_CMPXCHG = 102 |
| 139836 | CEFBS_None, // G_ATOMICRMW_XCHG = 103 |
| 139837 | CEFBS_None, // G_ATOMICRMW_ADD = 104 |
| 139838 | CEFBS_None, // G_ATOMICRMW_SUB = 105 |
| 139839 | CEFBS_None, // G_ATOMICRMW_AND = 106 |
| 139840 | CEFBS_None, // G_ATOMICRMW_NAND = 107 |
| 139841 | CEFBS_None, // G_ATOMICRMW_OR = 108 |
| 139842 | CEFBS_None, // G_ATOMICRMW_XOR = 109 |
| 139843 | CEFBS_None, // G_ATOMICRMW_MAX = 110 |
| 139844 | CEFBS_None, // G_ATOMICRMW_MIN = 111 |
| 139845 | CEFBS_None, // G_ATOMICRMW_UMAX = 112 |
| 139846 | CEFBS_None, // G_ATOMICRMW_UMIN = 113 |
| 139847 | CEFBS_None, // G_ATOMICRMW_FADD = 114 |
| 139848 | CEFBS_None, // G_ATOMICRMW_FSUB = 115 |
| 139849 | CEFBS_None, // G_ATOMICRMW_FMAX = 116 |
| 139850 | CEFBS_None, // G_ATOMICRMW_FMIN = 117 |
| 139851 | CEFBS_None, // G_ATOMICRMW_FMAXIMUM = 118 |
| 139852 | CEFBS_None, // G_ATOMICRMW_FMINIMUM = 119 |
| 139853 | CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 120 |
| 139854 | CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 121 |
| 139855 | CEFBS_None, // G_ATOMICRMW_USUB_COND = 122 |
| 139856 | CEFBS_None, // G_ATOMICRMW_USUB_SAT = 123 |
| 139857 | CEFBS_None, // G_FENCE = 124 |
| 139858 | CEFBS_None, // G_PREFETCH = 125 |
| 139859 | CEFBS_None, // G_BRCOND = 126 |
| 139860 | CEFBS_None, // G_BRINDIRECT = 127 |
| 139861 | CEFBS_None, // G_INVOKE_REGION_START = 128 |
| 139862 | CEFBS_None, // G_INTRINSIC = 129 |
| 139863 | CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 130 |
| 139864 | CEFBS_None, // G_INTRINSIC_CONVERGENT = 131 |
| 139865 | CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 132 |
| 139866 | CEFBS_None, // G_ANYEXT = 133 |
| 139867 | CEFBS_None, // G_TRUNC = 134 |
| 139868 | CEFBS_None, // G_CONSTANT = 135 |
| 139869 | CEFBS_None, // G_FCONSTANT = 136 |
| 139870 | CEFBS_None, // G_VASTART = 137 |
| 139871 | CEFBS_None, // G_VAARG = 138 |
| 139872 | CEFBS_None, // G_SEXT = 139 |
| 139873 | CEFBS_None, // G_SEXT_INREG = 140 |
| 139874 | CEFBS_None, // G_ZEXT = 141 |
| 139875 | CEFBS_None, // G_SHL = 142 |
| 139876 | CEFBS_None, // G_LSHR = 143 |
| 139877 | CEFBS_None, // G_ASHR = 144 |
| 139878 | CEFBS_None, // G_FSHL = 145 |
| 139879 | CEFBS_None, // G_FSHR = 146 |
| 139880 | CEFBS_None, // G_ROTR = 147 |
| 139881 | CEFBS_None, // G_ROTL = 148 |
| 139882 | CEFBS_None, // G_ICMP = 149 |
| 139883 | CEFBS_None, // G_FCMP = 150 |
| 139884 | CEFBS_None, // G_SCMP = 151 |
| 139885 | CEFBS_None, // G_UCMP = 152 |
| 139886 | CEFBS_None, // G_SELECT = 153 |
| 139887 | CEFBS_None, // G_UADDO = 154 |
| 139888 | CEFBS_None, // G_UADDE = 155 |
| 139889 | CEFBS_None, // G_USUBO = 156 |
| 139890 | CEFBS_None, // G_USUBE = 157 |
| 139891 | CEFBS_None, // G_SADDO = 158 |
| 139892 | CEFBS_None, // G_SADDE = 159 |
| 139893 | CEFBS_None, // G_SSUBO = 160 |
| 139894 | CEFBS_None, // G_SSUBE = 161 |
| 139895 | CEFBS_None, // G_UMULO = 162 |
| 139896 | CEFBS_None, // G_SMULO = 163 |
| 139897 | CEFBS_None, // G_UMULH = 164 |
| 139898 | CEFBS_None, // G_SMULH = 165 |
| 139899 | CEFBS_None, // G_UADDSAT = 166 |
| 139900 | CEFBS_None, // G_SADDSAT = 167 |
| 139901 | CEFBS_None, // G_USUBSAT = 168 |
| 139902 | CEFBS_None, // G_SSUBSAT = 169 |
| 139903 | CEFBS_None, // G_USHLSAT = 170 |
| 139904 | CEFBS_None, // G_SSHLSAT = 171 |
| 139905 | CEFBS_None, // G_SMULFIX = 172 |
| 139906 | CEFBS_None, // G_UMULFIX = 173 |
| 139907 | CEFBS_None, // G_SMULFIXSAT = 174 |
| 139908 | CEFBS_None, // G_UMULFIXSAT = 175 |
| 139909 | CEFBS_None, // G_SDIVFIX = 176 |
| 139910 | CEFBS_None, // G_UDIVFIX = 177 |
| 139911 | CEFBS_None, // G_SDIVFIXSAT = 178 |
| 139912 | CEFBS_None, // G_UDIVFIXSAT = 179 |
| 139913 | CEFBS_None, // G_FADD = 180 |
| 139914 | CEFBS_None, // G_FSUB = 181 |
| 139915 | CEFBS_None, // G_FMUL = 182 |
| 139916 | CEFBS_None, // G_FMA = 183 |
| 139917 | CEFBS_None, // G_FMAD = 184 |
| 139918 | CEFBS_None, // G_FDIV = 185 |
| 139919 | CEFBS_None, // G_FREM = 186 |
| 139920 | CEFBS_None, // G_FPOW = 187 |
| 139921 | CEFBS_None, // G_FPOWI = 188 |
| 139922 | CEFBS_None, // G_FEXP = 189 |
| 139923 | CEFBS_None, // G_FEXP2 = 190 |
| 139924 | CEFBS_None, // G_FEXP10 = 191 |
| 139925 | CEFBS_None, // G_FLOG = 192 |
| 139926 | CEFBS_None, // G_FLOG2 = 193 |
| 139927 | CEFBS_None, // G_FLOG10 = 194 |
| 139928 | CEFBS_None, // G_FLDEXP = 195 |
| 139929 | CEFBS_None, // G_FFREXP = 196 |
| 139930 | CEFBS_None, // G_FNEG = 197 |
| 139931 | CEFBS_None, // G_FPEXT = 198 |
| 139932 | CEFBS_None, // G_FPTRUNC = 199 |
| 139933 | CEFBS_None, // G_FPTOSI = 200 |
| 139934 | CEFBS_None, // G_FPTOUI = 201 |
| 139935 | CEFBS_None, // G_SITOFP = 202 |
| 139936 | CEFBS_None, // G_UITOFP = 203 |
| 139937 | CEFBS_None, // G_FPTOSI_SAT = 204 |
| 139938 | CEFBS_None, // G_FPTOUI_SAT = 205 |
| 139939 | CEFBS_None, // G_FABS = 206 |
| 139940 | CEFBS_None, // G_FCOPYSIGN = 207 |
| 139941 | CEFBS_None, // G_IS_FPCLASS = 208 |
| 139942 | CEFBS_None, // G_FCANONICALIZE = 209 |
| 139943 | CEFBS_None, // G_FMINNUM = 210 |
| 139944 | CEFBS_None, // G_FMAXNUM = 211 |
| 139945 | CEFBS_None, // G_FMINNUM_IEEE = 212 |
| 139946 | CEFBS_None, // G_FMAXNUM_IEEE = 213 |
| 139947 | CEFBS_None, // G_FMINIMUM = 214 |
| 139948 | CEFBS_None, // G_FMAXIMUM = 215 |
| 139949 | CEFBS_None, // G_FMINIMUMNUM = 216 |
| 139950 | CEFBS_None, // G_FMAXIMUMNUM = 217 |
| 139951 | CEFBS_None, // G_GET_FPENV = 218 |
| 139952 | CEFBS_None, // G_SET_FPENV = 219 |
| 139953 | CEFBS_None, // G_RESET_FPENV = 220 |
| 139954 | CEFBS_None, // G_GET_FPMODE = 221 |
| 139955 | CEFBS_None, // G_SET_FPMODE = 222 |
| 139956 | CEFBS_None, // G_RESET_FPMODE = 223 |
| 139957 | CEFBS_None, // G_PTR_ADD = 224 |
| 139958 | CEFBS_None, // G_PTRMASK = 225 |
| 139959 | CEFBS_None, // G_SMIN = 226 |
| 139960 | CEFBS_None, // G_SMAX = 227 |
| 139961 | CEFBS_None, // G_UMIN = 228 |
| 139962 | CEFBS_None, // G_UMAX = 229 |
| 139963 | CEFBS_None, // G_ABS = 230 |
| 139964 | CEFBS_None, // G_LROUND = 231 |
| 139965 | CEFBS_None, // G_LLROUND = 232 |
| 139966 | CEFBS_None, // G_BR = 233 |
| 139967 | CEFBS_None, // G_BRJT = 234 |
| 139968 | CEFBS_None, // G_VSCALE = 235 |
| 139969 | CEFBS_None, // G_INSERT_SUBVECTOR = 236 |
| 139970 | CEFBS_None, // G_EXTRACT_SUBVECTOR = 237 |
| 139971 | CEFBS_None, // G_INSERT_VECTOR_ELT = 238 |
| 139972 | CEFBS_None, // G_EXTRACT_VECTOR_ELT = 239 |
| 139973 | CEFBS_None, // G_SHUFFLE_VECTOR = 240 |
| 139974 | CEFBS_None, // G_SPLAT_VECTOR = 241 |
| 139975 | CEFBS_None, // G_STEP_VECTOR = 242 |
| 139976 | CEFBS_None, // G_VECTOR_COMPRESS = 243 |
| 139977 | CEFBS_None, // G_CTTZ = 244 |
| 139978 | CEFBS_None, // G_CTTZ_ZERO_UNDEF = 245 |
| 139979 | CEFBS_None, // G_CTLZ = 246 |
| 139980 | CEFBS_None, // G_CTLZ_ZERO_UNDEF = 247 |
| 139981 | CEFBS_None, // G_CTPOP = 248 |
| 139982 | CEFBS_None, // G_BSWAP = 249 |
| 139983 | CEFBS_None, // G_BITREVERSE = 250 |
| 139984 | CEFBS_None, // G_FCEIL = 251 |
| 139985 | CEFBS_None, // G_FCOS = 252 |
| 139986 | CEFBS_None, // G_FSIN = 253 |
| 139987 | CEFBS_None, // G_FSINCOS = 254 |
| 139988 | CEFBS_None, // G_FTAN = 255 |
| 139989 | CEFBS_None, // G_FACOS = 256 |
| 139990 | CEFBS_None, // G_FASIN = 257 |
| 139991 | CEFBS_None, // G_FATAN = 258 |
| 139992 | CEFBS_None, // G_FATAN2 = 259 |
| 139993 | CEFBS_None, // G_FCOSH = 260 |
| 139994 | CEFBS_None, // G_FSINH = 261 |
| 139995 | CEFBS_None, // G_FTANH = 262 |
| 139996 | CEFBS_None, // G_FSQRT = 263 |
| 139997 | CEFBS_None, // G_FFLOOR = 264 |
| 139998 | CEFBS_None, // G_FRINT = 265 |
| 139999 | CEFBS_None, // G_FNEARBYINT = 266 |
| 140000 | CEFBS_None, // G_ADDRSPACE_CAST = 267 |
| 140001 | CEFBS_None, // G_BLOCK_ADDR = 268 |
| 140002 | CEFBS_None, // G_JUMP_TABLE = 269 |
| 140003 | CEFBS_None, // G_DYN_STACKALLOC = 270 |
| 140004 | CEFBS_None, // G_STACKSAVE = 271 |
| 140005 | CEFBS_None, // G_STACKRESTORE = 272 |
| 140006 | CEFBS_None, // G_STRICT_FADD = 273 |
| 140007 | CEFBS_None, // G_STRICT_FSUB = 274 |
| 140008 | CEFBS_None, // G_STRICT_FMUL = 275 |
| 140009 | CEFBS_None, // G_STRICT_FDIV = 276 |
| 140010 | CEFBS_None, // G_STRICT_FREM = 277 |
| 140011 | CEFBS_None, // G_STRICT_FMA = 278 |
| 140012 | CEFBS_None, // G_STRICT_FSQRT = 279 |
| 140013 | CEFBS_None, // G_STRICT_FLDEXP = 280 |
| 140014 | CEFBS_None, // G_READ_REGISTER = 281 |
| 140015 | CEFBS_None, // G_WRITE_REGISTER = 282 |
| 140016 | CEFBS_None, // G_MEMCPY = 283 |
| 140017 | CEFBS_None, // G_MEMCPY_INLINE = 284 |
| 140018 | CEFBS_None, // G_MEMMOVE = 285 |
| 140019 | CEFBS_None, // G_MEMSET = 286 |
| 140020 | CEFBS_None, // G_BZERO = 287 |
| 140021 | CEFBS_None, // G_TRAP = 288 |
| 140022 | CEFBS_None, // G_DEBUGTRAP = 289 |
| 140023 | CEFBS_None, // G_UBSANTRAP = 290 |
| 140024 | CEFBS_None, // G_VECREDUCE_SEQ_FADD = 291 |
| 140025 | CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 292 |
| 140026 | CEFBS_None, // G_VECREDUCE_FADD = 293 |
| 140027 | CEFBS_None, // G_VECREDUCE_FMUL = 294 |
| 140028 | CEFBS_None, // G_VECREDUCE_FMAX = 295 |
| 140029 | CEFBS_None, // G_VECREDUCE_FMIN = 296 |
| 140030 | CEFBS_None, // G_VECREDUCE_FMAXIMUM = 297 |
| 140031 | CEFBS_None, // G_VECREDUCE_FMINIMUM = 298 |
| 140032 | CEFBS_None, // G_VECREDUCE_ADD = 299 |
| 140033 | CEFBS_None, // G_VECREDUCE_MUL = 300 |
| 140034 | CEFBS_None, // G_VECREDUCE_AND = 301 |
| 140035 | CEFBS_None, // G_VECREDUCE_OR = 302 |
| 140036 | CEFBS_None, // G_VECREDUCE_XOR = 303 |
| 140037 | CEFBS_None, // G_VECREDUCE_SMAX = 304 |
| 140038 | CEFBS_None, // G_VECREDUCE_SMIN = 305 |
| 140039 | CEFBS_None, // G_VECREDUCE_UMAX = 306 |
| 140040 | CEFBS_None, // G_VECREDUCE_UMIN = 307 |
| 140041 | CEFBS_None, // G_SBFX = 308 |
| 140042 | CEFBS_None, // G_UBFX = 309 |
| 140043 | CEFBS_None, // ADD16ri_DB = 310 |
| 140044 | CEFBS_None, // ADD16rr_DB = 311 |
| 140045 | CEFBS_None, // ADD32ri_DB = 312 |
| 140046 | CEFBS_None, // ADD32rr_DB = 313 |
| 140047 | CEFBS_None, // ADD64ri32_DB = 314 |
| 140048 | CEFBS_None, // ADD64rr_DB = 315 |
| 140049 | CEFBS_None, // ADD8ri_DB = 316 |
| 140050 | CEFBS_None, // ADD8rr_DB = 317 |
| 140051 | CEFBS_None, // AVX1_SETALLONES = 318 |
| 140052 | CEFBS_None, // AVX2_SETALLONES = 319 |
| 140053 | CEFBS_None, // AVX512_128_SET0 = 320 |
| 140054 | CEFBS_None, // AVX512_256_SET0 = 321 |
| 140055 | CEFBS_None, // AVX512_512_SET0 = 322 |
| 140056 | CEFBS_None, // AVX512_512_SETALLONES = 323 |
| 140057 | CEFBS_None, // AVX512_512_SEXT_MASK_32 = 324 |
| 140058 | CEFBS_None, // AVX512_512_SEXT_MASK_64 = 325 |
| 140059 | CEFBS_None, // AVX512_FsFLD0F128 = 326 |
| 140060 | CEFBS_None, // AVX512_FsFLD0SD = 327 |
| 140061 | CEFBS_None, // AVX512_FsFLD0SH = 328 |
| 140062 | CEFBS_None, // AVX512_FsFLD0SS = 329 |
| 140063 | CEFBS_None, // AVX_SET0 = 330 |
| 140064 | CEFBS_In64BitMode, // CALL64m_RVMARKER = 331 |
| 140065 | CEFBS_In64BitMode, // CALL64pcrel32_RVMARKER = 332 |
| 140066 | CEFBS_In64BitMode, // CALL64r_ImpCall = 333 |
| 140067 | CEFBS_In64BitMode, // CALL64r_RVMARKER = 334 |
| 140068 | CEFBS_None, // FsFLD0F128 = 335 |
| 140069 | CEFBS_None, // FsFLD0SD = 336 |
| 140070 | CEFBS_None, // FsFLD0SH = 337 |
| 140071 | CEFBS_None, // FsFLD0SS = 338 |
| 140072 | CEFBS_None, // G_FILD = 339 |
| 140073 | CEFBS_None, // G_FIST = 340 |
| 140074 | CEFBS_Not64BitMode, // INDIRECT_THUNK_CALL32 = 341 |
| 140075 | CEFBS_In64BitMode, // INDIRECT_THUNK_CALL64 = 342 |
| 140076 | CEFBS_None, // INDIRECT_THUNK_TCRETURN32 = 343 |
| 140077 | CEFBS_None, // INDIRECT_THUNK_TCRETURN64 = 344 |
| 140078 | CEFBS_None, // KSET0D = 345 |
| 140079 | CEFBS_None, // KSET0Q = 346 |
| 140080 | CEFBS_None, // KSET0W = 347 |
| 140081 | CEFBS_None, // KSET1D = 348 |
| 140082 | CEFBS_None, // KSET1Q = 349 |
| 140083 | CEFBS_None, // KSET1W = 350 |
| 140084 | CEFBS_In64BitMode, // LCMPXCHG16B_NO_RBX = 351 |
| 140085 | CEFBS_In64BitMode, // LCMPXCHG16B_SAVE_RBX = 352 |
| 140086 | CEFBS_None, // MMX_SET0 = 353 |
| 140087 | CEFBS_None, // MORESTACK_RET = 354 |
| 140088 | CEFBS_None, // MORESTACK_RET_RESTORE_R10 = 355 |
| 140089 | CEFBS_None, // MOV32ImmSExti8 = 356 |
| 140090 | CEFBS_None, // MOV32r0 = 357 |
| 140091 | CEFBS_Not64BitMode, // MOV32r1 = 358 |
| 140092 | CEFBS_Not64BitMode, // MOV32r_1 = 359 |
| 140093 | CEFBS_None, // MOV32ri64 = 360 |
| 140094 | CEFBS_None, // MOV64ImmSExti8 = 361 |
| 140095 | CEFBS_None, // MWAITX = 362 |
| 140096 | CEFBS_None, // MWAITX_SAVE_RBX = 363 |
| 140097 | CEFBS_In64BitMode, // PLDTILECFGV = 364 |
| 140098 | CEFBS_None, // PLEA32r = 365 |
| 140099 | CEFBS_None, // PLEA64r = 366 |
| 140100 | CEFBS_In64BitMode, // PT2RPNTLVWZ0RST1V = 367 |
| 140101 | CEFBS_In64BitMode, // PT2RPNTLVWZ0RSV = 368 |
| 140102 | CEFBS_In64BitMode, // PT2RPNTLVWZ0T1V = 369 |
| 140103 | CEFBS_In64BitMode, // PT2RPNTLVWZ0V = 370 |
| 140104 | CEFBS_In64BitMode, // PT2RPNTLVWZ1RST1V = 371 |
| 140105 | CEFBS_In64BitMode, // PT2RPNTLVWZ1RSV = 372 |
| 140106 | CEFBS_In64BitMode, // PT2RPNTLVWZ1T1V = 373 |
| 140107 | CEFBS_In64BitMode, // PT2RPNTLVWZ1V = 374 |
| 140108 | CEFBS_In64BitMode, // PTDPBF16PSV = 375 |
| 140109 | CEFBS_In64BitMode, // PTDPBSSDV = 376 |
| 140110 | CEFBS_In64BitMode, // PTDPBSUDV = 377 |
| 140111 | CEFBS_In64BitMode, // PTDPBUSDV = 378 |
| 140112 | CEFBS_In64BitMode, // PTDPBUUDV = 379 |
| 140113 | CEFBS_In64BitMode, // PTDPFP16PSV = 380 |
| 140114 | CEFBS_In64BitMode, // PTILELOADDRST1V = 381 |
| 140115 | CEFBS_In64BitMode, // PTILELOADDRSV = 382 |
| 140116 | CEFBS_In64BitMode, // PTILELOADDT1V = 383 |
| 140117 | CEFBS_In64BitMode, // PTILELOADDV = 384 |
| 140118 | CEFBS_In64BitMode, // PTILEPAIRLOAD = 385 |
| 140119 | CEFBS_In64BitMode, // PTILEPAIRSTORE = 386 |
| 140120 | CEFBS_In64BitMode, // PTILESTOREDV = 387 |
| 140121 | CEFBS_In64BitMode, // PTILEZEROV = 388 |
| 140122 | CEFBS_Not64BitMode, // RDFLAGS32 = 389 |
| 140123 | CEFBS_In64BitMode, // RDFLAGS64 = 390 |
| 140124 | CEFBS_None, // SEH_BeginEpilogue = 391 |
| 140125 | CEFBS_None, // SEH_EndEpilogue = 392 |
| 140126 | CEFBS_None, // SEH_EndPrologue = 393 |
| 140127 | CEFBS_None, // SEH_PushFrame = 394 |
| 140128 | CEFBS_None, // SEH_PushReg = 395 |
| 140129 | CEFBS_None, // SEH_SaveReg = 396 |
| 140130 | CEFBS_None, // SEH_SaveXMM = 397 |
| 140131 | CEFBS_None, // SEH_SetFrame = 398 |
| 140132 | CEFBS_None, // SEH_StackAlign = 399 |
| 140133 | CEFBS_None, // SEH_StackAlloc = 400 |
| 140134 | CEFBS_None, // SEH_UnwindV2Start = 401 |
| 140135 | CEFBS_None, // SEH_UnwindVersion = 402 |
| 140136 | CEFBS_None, // SETB_C32r = 403 |
| 140137 | CEFBS_None, // SETB_C64r = 404 |
| 140138 | CEFBS_None, // SHLDROT32ri = 405 |
| 140139 | CEFBS_None, // SHLDROT64ri = 406 |
| 140140 | CEFBS_None, // SHRDROT32ri = 407 |
| 140141 | CEFBS_None, // SHRDROT64ri = 408 |
| 140142 | CEFBS_None, // VMOVAPSZ128mr_NOVLX = 409 |
| 140143 | CEFBS_None, // VMOVAPSZ128rm_NOVLX = 410 |
| 140144 | CEFBS_None, // VMOVAPSZ256mr_NOVLX = 411 |
| 140145 | CEFBS_None, // VMOVAPSZ256rm_NOVLX = 412 |
| 140146 | CEFBS_None, // VMOVUPSZ128mr_NOVLX = 413 |
| 140147 | CEFBS_None, // VMOVUPSZ128rm_NOVLX = 414 |
| 140148 | CEFBS_None, // VMOVUPSZ256mr_NOVLX = 415 |
| 140149 | CEFBS_None, // VMOVUPSZ256rm_NOVLX = 416 |
| 140150 | CEFBS_None, // V_SET0 = 417 |
| 140151 | CEFBS_None, // V_SETALLONES = 418 |
| 140152 | CEFBS_Not64BitMode, // WRFLAGS32 = 419 |
| 140153 | CEFBS_In64BitMode, // WRFLAGS64 = 420 |
| 140154 | CEFBS_None, // XABORT_DEF = 421 |
| 140155 | CEFBS_None, // XOR32_FP = 422 |
| 140156 | CEFBS_In64BitMode, // XOR64_FP = 423 |
| 140157 | CEFBS_Not64BitMode, // AAA = 424 |
| 140158 | CEFBS_Not64BitMode, // AAD8i8 = 425 |
| 140159 | CEFBS_None, // AADD32mr = 426 |
| 140160 | CEFBS_In64BitMode, // AADD32mr_EVEX = 427 |
| 140161 | CEFBS_None, // AADD64mr = 428 |
| 140162 | CEFBS_In64BitMode, // AADD64mr_EVEX = 429 |
| 140163 | CEFBS_Not64BitMode, // AAM8i8 = 430 |
| 140164 | CEFBS_None, // AAND32mr = 431 |
| 140165 | CEFBS_In64BitMode, // AAND32mr_EVEX = 432 |
| 140166 | CEFBS_None, // AAND64mr = 433 |
| 140167 | CEFBS_In64BitMode, // AAND64mr_EVEX = 434 |
| 140168 | CEFBS_Not64BitMode, // AAS = 435 |
| 140169 | CEFBS_None, // ABS_F = 436 |
| 140170 | CEFBS_None, // ABS_Fp32 = 437 |
| 140171 | CEFBS_None, // ABS_Fp64 = 438 |
| 140172 | CEFBS_None, // ABS_Fp80 = 439 |
| 140173 | CEFBS_None, // ADC16i16 = 440 |
| 140174 | CEFBS_None, // ADC16mi = 441 |
| 140175 | CEFBS_None, // ADC16mi8 = 442 |
| 140176 | CEFBS_In64BitMode, // ADC16mi8_EVEX = 443 |
| 140177 | CEFBS_In64BitMode, // ADC16mi8_ND = 444 |
| 140178 | CEFBS_In64BitMode, // ADC16mi_EVEX = 445 |
| 140179 | CEFBS_In64BitMode, // ADC16mi_ND = 446 |
| 140180 | CEFBS_None, // ADC16mr = 447 |
| 140181 | CEFBS_In64BitMode, // ADC16mr_EVEX = 448 |
| 140182 | CEFBS_In64BitMode, // ADC16mr_ND = 449 |
| 140183 | CEFBS_None, // ADC16ri = 450 |
| 140184 | CEFBS_None, // ADC16ri8 = 451 |
| 140185 | CEFBS_In64BitMode, // ADC16ri8_EVEX = 452 |
| 140186 | CEFBS_In64BitMode, // ADC16ri8_ND = 453 |
| 140187 | CEFBS_In64BitMode, // ADC16ri_EVEX = 454 |
| 140188 | CEFBS_In64BitMode, // ADC16ri_ND = 455 |
| 140189 | CEFBS_None, // ADC16rm = 456 |
| 140190 | CEFBS_In64BitMode, // ADC16rm_EVEX = 457 |
| 140191 | CEFBS_In64BitMode, // ADC16rm_ND = 458 |
| 140192 | CEFBS_None, // ADC16rr = 459 |
| 140193 | CEFBS_In64BitMode, // ADC16rr_EVEX = 460 |
| 140194 | CEFBS_In64BitMode, // ADC16rr_EVEX_REV = 461 |
| 140195 | CEFBS_In64BitMode, // ADC16rr_ND = 462 |
| 140196 | CEFBS_In64BitMode, // ADC16rr_ND_REV = 463 |
| 140197 | CEFBS_None, // ADC16rr_REV = 464 |
| 140198 | CEFBS_None, // ADC32i32 = 465 |
| 140199 | CEFBS_None, // ADC32mi = 466 |
| 140200 | CEFBS_None, // ADC32mi8 = 467 |
| 140201 | CEFBS_In64BitMode, // ADC32mi8_EVEX = 468 |
| 140202 | CEFBS_In64BitMode, // ADC32mi8_ND = 469 |
| 140203 | CEFBS_In64BitMode, // ADC32mi_EVEX = 470 |
| 140204 | CEFBS_In64BitMode, // ADC32mi_ND = 471 |
| 140205 | CEFBS_None, // ADC32mr = 472 |
| 140206 | CEFBS_In64BitMode, // ADC32mr_EVEX = 473 |
| 140207 | CEFBS_In64BitMode, // ADC32mr_ND = 474 |
| 140208 | CEFBS_None, // ADC32ri = 475 |
| 140209 | CEFBS_None, // ADC32ri8 = 476 |
| 140210 | CEFBS_In64BitMode, // ADC32ri8_EVEX = 477 |
| 140211 | CEFBS_In64BitMode, // ADC32ri8_ND = 478 |
| 140212 | CEFBS_In64BitMode, // ADC32ri_EVEX = 479 |
| 140213 | CEFBS_In64BitMode, // ADC32ri_ND = 480 |
| 140214 | CEFBS_None, // ADC32rm = 481 |
| 140215 | CEFBS_In64BitMode, // ADC32rm_EVEX = 482 |
| 140216 | CEFBS_In64BitMode, // ADC32rm_ND = 483 |
| 140217 | CEFBS_None, // ADC32rr = 484 |
| 140218 | CEFBS_In64BitMode, // ADC32rr_EVEX = 485 |
| 140219 | CEFBS_In64BitMode, // ADC32rr_EVEX_REV = 486 |
| 140220 | CEFBS_In64BitMode, // ADC32rr_ND = 487 |
| 140221 | CEFBS_In64BitMode, // ADC32rr_ND_REV = 488 |
| 140222 | CEFBS_None, // ADC32rr_REV = 489 |
| 140223 | CEFBS_None, // ADC64i32 = 490 |
| 140224 | CEFBS_In64BitMode, // ADC64mi32 = 491 |
| 140225 | CEFBS_In64BitMode, // ADC64mi32_EVEX = 492 |
| 140226 | CEFBS_In64BitMode, // ADC64mi32_ND = 493 |
| 140227 | CEFBS_In64BitMode, // ADC64mi8 = 494 |
| 140228 | CEFBS_In64BitMode, // ADC64mi8_EVEX = 495 |
| 140229 | CEFBS_In64BitMode, // ADC64mi8_ND = 496 |
| 140230 | CEFBS_None, // ADC64mr = 497 |
| 140231 | CEFBS_In64BitMode, // ADC64mr_EVEX = 498 |
| 140232 | CEFBS_In64BitMode, // ADC64mr_ND = 499 |
| 140233 | CEFBS_None, // ADC64ri32 = 500 |
| 140234 | CEFBS_In64BitMode, // ADC64ri32_EVEX = 501 |
| 140235 | CEFBS_In64BitMode, // ADC64ri32_ND = 502 |
| 140236 | CEFBS_None, // ADC64ri8 = 503 |
| 140237 | CEFBS_In64BitMode, // ADC64ri8_EVEX = 504 |
| 140238 | CEFBS_In64BitMode, // ADC64ri8_ND = 505 |
| 140239 | CEFBS_None, // ADC64rm = 506 |
| 140240 | CEFBS_In64BitMode, // ADC64rm_EVEX = 507 |
| 140241 | CEFBS_In64BitMode, // ADC64rm_ND = 508 |
| 140242 | CEFBS_None, // ADC64rr = 509 |
| 140243 | CEFBS_In64BitMode, // ADC64rr_EVEX = 510 |
| 140244 | CEFBS_In64BitMode, // ADC64rr_EVEX_REV = 511 |
| 140245 | CEFBS_In64BitMode, // ADC64rr_ND = 512 |
| 140246 | CEFBS_In64BitMode, // ADC64rr_ND_REV = 513 |
| 140247 | CEFBS_None, // ADC64rr_REV = 514 |
| 140248 | CEFBS_None, // ADC8i8 = 515 |
| 140249 | CEFBS_None, // ADC8mi = 516 |
| 140250 | CEFBS_Not64BitMode, // ADC8mi8 = 517 |
| 140251 | CEFBS_In64BitMode, // ADC8mi_EVEX = 518 |
| 140252 | CEFBS_In64BitMode, // ADC8mi_ND = 519 |
| 140253 | CEFBS_None, // ADC8mr = 520 |
| 140254 | CEFBS_In64BitMode, // ADC8mr_EVEX = 521 |
| 140255 | CEFBS_In64BitMode, // ADC8mr_ND = 522 |
| 140256 | CEFBS_None, // ADC8ri = 523 |
| 140257 | CEFBS_Not64BitMode, // ADC8ri8 = 524 |
| 140258 | CEFBS_In64BitMode, // ADC8ri_EVEX = 525 |
| 140259 | CEFBS_In64BitMode, // ADC8ri_ND = 526 |
| 140260 | CEFBS_None, // ADC8rm = 527 |
| 140261 | CEFBS_In64BitMode, // ADC8rm_EVEX = 528 |
| 140262 | CEFBS_In64BitMode, // ADC8rm_ND = 529 |
| 140263 | CEFBS_None, // ADC8rr = 530 |
| 140264 | CEFBS_In64BitMode, // ADC8rr_EVEX = 531 |
| 140265 | CEFBS_In64BitMode, // ADC8rr_EVEX_REV = 532 |
| 140266 | CEFBS_In64BitMode, // ADC8rr_ND = 533 |
| 140267 | CEFBS_In64BitMode, // ADC8rr_ND_REV = 534 |
| 140268 | CEFBS_None, // ADC8rr_REV = 535 |
| 140269 | CEFBS_None, // ADCX32rm = 536 |
| 140270 | CEFBS_In64BitMode, // ADCX32rm_EVEX = 537 |
| 140271 | CEFBS_In64BitMode, // ADCX32rm_ND = 538 |
| 140272 | CEFBS_None, // ADCX32rr = 539 |
| 140273 | CEFBS_In64BitMode, // ADCX32rr_EVEX = 540 |
| 140274 | CEFBS_In64BitMode, // ADCX32rr_ND = 541 |
| 140275 | CEFBS_None, // ADCX64rm = 542 |
| 140276 | CEFBS_In64BitMode, // ADCX64rm_EVEX = 543 |
| 140277 | CEFBS_In64BitMode, // ADCX64rm_ND = 544 |
| 140278 | CEFBS_None, // ADCX64rr = 545 |
| 140279 | CEFBS_In64BitMode, // ADCX64rr_EVEX = 546 |
| 140280 | CEFBS_In64BitMode, // ADCX64rr_ND = 547 |
| 140281 | CEFBS_None, // ADD16i16 = 548 |
| 140282 | CEFBS_None, // ADD16mi = 549 |
| 140283 | CEFBS_None, // ADD16mi8 = 550 |
| 140284 | CEFBS_In64BitMode, // ADD16mi8_EVEX = 551 |
| 140285 | CEFBS_In64BitMode, // ADD16mi8_ND = 552 |
| 140286 | CEFBS_In64BitMode, // ADD16mi8_NF = 553 |
| 140287 | CEFBS_In64BitMode, // ADD16mi8_NF_ND = 554 |
| 140288 | CEFBS_In64BitMode, // ADD16mi_EVEX = 555 |
| 140289 | CEFBS_In64BitMode, // ADD16mi_ND = 556 |
| 140290 | CEFBS_In64BitMode, // ADD16mi_NF = 557 |
| 140291 | CEFBS_In64BitMode, // ADD16mi_NF_ND = 558 |
| 140292 | CEFBS_None, // ADD16mr = 559 |
| 140293 | CEFBS_In64BitMode, // ADD16mr_EVEX = 560 |
| 140294 | CEFBS_In64BitMode, // ADD16mr_ND = 561 |
| 140295 | CEFBS_In64BitMode, // ADD16mr_NF = 562 |
| 140296 | CEFBS_In64BitMode, // ADD16mr_NF_ND = 563 |
| 140297 | CEFBS_None, // ADD16ri = 564 |
| 140298 | CEFBS_None, // ADD16ri8 = 565 |
| 140299 | CEFBS_In64BitMode, // ADD16ri8_EVEX = 566 |
| 140300 | CEFBS_In64BitMode, // ADD16ri8_ND = 567 |
| 140301 | CEFBS_In64BitMode, // ADD16ri8_NF = 568 |
| 140302 | CEFBS_In64BitMode, // ADD16ri8_NF_ND = 569 |
| 140303 | CEFBS_In64BitMode, // ADD16ri_EVEX = 570 |
| 140304 | CEFBS_In64BitMode, // ADD16ri_ND = 571 |
| 140305 | CEFBS_In64BitMode, // ADD16ri_NF = 572 |
| 140306 | CEFBS_In64BitMode, // ADD16ri_NF_ND = 573 |
| 140307 | CEFBS_None, // ADD16rm = 574 |
| 140308 | CEFBS_In64BitMode, // ADD16rm_EVEX = 575 |
| 140309 | CEFBS_In64BitMode, // ADD16rm_ND = 576 |
| 140310 | CEFBS_In64BitMode, // ADD16rm_NF = 577 |
| 140311 | CEFBS_In64BitMode, // ADD16rm_NF_ND = 578 |
| 140312 | CEFBS_None, // ADD16rr = 579 |
| 140313 | CEFBS_In64BitMode, // ADD16rr_EVEX = 580 |
| 140314 | CEFBS_In64BitMode, // ADD16rr_EVEX_REV = 581 |
| 140315 | CEFBS_In64BitMode, // ADD16rr_ND = 582 |
| 140316 | CEFBS_In64BitMode, // ADD16rr_ND_REV = 583 |
| 140317 | CEFBS_In64BitMode, // ADD16rr_NF = 584 |
| 140318 | CEFBS_In64BitMode, // ADD16rr_NF_ND = 585 |
| 140319 | CEFBS_In64BitMode, // ADD16rr_NF_ND_REV = 586 |
| 140320 | CEFBS_In64BitMode, // ADD16rr_NF_REV = 587 |
| 140321 | CEFBS_None, // ADD16rr_REV = 588 |
| 140322 | CEFBS_None, // ADD32i32 = 589 |
| 140323 | CEFBS_None, // ADD32mi = 590 |
| 140324 | CEFBS_None, // ADD32mi8 = 591 |
| 140325 | CEFBS_In64BitMode, // ADD32mi8_EVEX = 592 |
| 140326 | CEFBS_In64BitMode, // ADD32mi8_ND = 593 |
| 140327 | CEFBS_In64BitMode, // ADD32mi8_NF = 594 |
| 140328 | CEFBS_In64BitMode, // ADD32mi8_NF_ND = 595 |
| 140329 | CEFBS_In64BitMode, // ADD32mi_EVEX = 596 |
| 140330 | CEFBS_In64BitMode, // ADD32mi_ND = 597 |
| 140331 | CEFBS_In64BitMode, // ADD32mi_NF = 598 |
| 140332 | CEFBS_In64BitMode, // ADD32mi_NF_ND = 599 |
| 140333 | CEFBS_None, // ADD32mr = 600 |
| 140334 | CEFBS_In64BitMode, // ADD32mr_EVEX = 601 |
| 140335 | CEFBS_In64BitMode, // ADD32mr_ND = 602 |
| 140336 | CEFBS_In64BitMode, // ADD32mr_NF = 603 |
| 140337 | CEFBS_In64BitMode, // ADD32mr_NF_ND = 604 |
| 140338 | CEFBS_None, // ADD32ri = 605 |
| 140339 | CEFBS_None, // ADD32ri8 = 606 |
| 140340 | CEFBS_In64BitMode, // ADD32ri8_EVEX = 607 |
| 140341 | CEFBS_In64BitMode, // ADD32ri8_ND = 608 |
| 140342 | CEFBS_In64BitMode, // ADD32ri8_NF = 609 |
| 140343 | CEFBS_In64BitMode, // ADD32ri8_NF_ND = 610 |
| 140344 | CEFBS_In64BitMode, // ADD32ri_EVEX = 611 |
| 140345 | CEFBS_In64BitMode, // ADD32ri_ND = 612 |
| 140346 | CEFBS_In64BitMode, // ADD32ri_NF = 613 |
| 140347 | CEFBS_In64BitMode, // ADD32ri_NF_ND = 614 |
| 140348 | CEFBS_None, // ADD32rm = 615 |
| 140349 | CEFBS_In64BitMode, // ADD32rm_EVEX = 616 |
| 140350 | CEFBS_In64BitMode, // ADD32rm_ND = 617 |
| 140351 | CEFBS_In64BitMode, // ADD32rm_NF = 618 |
| 140352 | CEFBS_In64BitMode, // ADD32rm_NF_ND = 619 |
| 140353 | CEFBS_None, // ADD32rr = 620 |
| 140354 | CEFBS_In64BitMode, // ADD32rr_EVEX = 621 |
| 140355 | CEFBS_In64BitMode, // ADD32rr_EVEX_REV = 622 |
| 140356 | CEFBS_In64BitMode, // ADD32rr_ND = 623 |
| 140357 | CEFBS_In64BitMode, // ADD32rr_ND_REV = 624 |
| 140358 | CEFBS_In64BitMode, // ADD32rr_NF = 625 |
| 140359 | CEFBS_In64BitMode, // ADD32rr_NF_ND = 626 |
| 140360 | CEFBS_In64BitMode, // ADD32rr_NF_ND_REV = 627 |
| 140361 | CEFBS_In64BitMode, // ADD32rr_NF_REV = 628 |
| 140362 | CEFBS_None, // ADD32rr_REV = 629 |
| 140363 | CEFBS_None, // ADD64i32 = 630 |
| 140364 | CEFBS_In64BitMode, // ADD64mi32 = 631 |
| 140365 | CEFBS_In64BitMode, // ADD64mi32_EVEX = 632 |
| 140366 | CEFBS_In64BitMode, // ADD64mi32_ND = 633 |
| 140367 | CEFBS_In64BitMode, // ADD64mi32_NF = 634 |
| 140368 | CEFBS_In64BitMode, // ADD64mi32_NF_ND = 635 |
| 140369 | CEFBS_In64BitMode, // ADD64mi8 = 636 |
| 140370 | CEFBS_In64BitMode, // ADD64mi8_EVEX = 637 |
| 140371 | CEFBS_In64BitMode, // ADD64mi8_ND = 638 |
| 140372 | CEFBS_In64BitMode, // ADD64mi8_NF = 639 |
| 140373 | CEFBS_In64BitMode, // ADD64mi8_NF_ND = 640 |
| 140374 | CEFBS_None, // ADD64mr = 641 |
| 140375 | CEFBS_In64BitMode, // ADD64mr_EVEX = 642 |
| 140376 | CEFBS_In64BitMode, // ADD64mr_ND = 643 |
| 140377 | CEFBS_In64BitMode, // ADD64mr_NF = 644 |
| 140378 | CEFBS_In64BitMode, // ADD64mr_NF_ND = 645 |
| 140379 | CEFBS_None, // ADD64ri32 = 646 |
| 140380 | CEFBS_In64BitMode, // ADD64ri32_EVEX = 647 |
| 140381 | CEFBS_In64BitMode, // ADD64ri32_ND = 648 |
| 140382 | CEFBS_In64BitMode, // ADD64ri32_NF = 649 |
| 140383 | CEFBS_In64BitMode, // ADD64ri32_NF_ND = 650 |
| 140384 | CEFBS_None, // ADD64ri8 = 651 |
| 140385 | CEFBS_In64BitMode, // ADD64ri8_EVEX = 652 |
| 140386 | CEFBS_In64BitMode, // ADD64ri8_ND = 653 |
| 140387 | CEFBS_In64BitMode, // ADD64ri8_NF = 654 |
| 140388 | CEFBS_In64BitMode, // ADD64ri8_NF_ND = 655 |
| 140389 | CEFBS_None, // ADD64rm = 656 |
| 140390 | CEFBS_In64BitMode, // ADD64rm_EVEX = 657 |
| 140391 | CEFBS_In64BitMode, // ADD64rm_ND = 658 |
| 140392 | CEFBS_In64BitMode, // ADD64rm_NF = 659 |
| 140393 | CEFBS_In64BitMode, // ADD64rm_NF_ND = 660 |
| 140394 | CEFBS_None, // ADD64rr = 661 |
| 140395 | CEFBS_In64BitMode, // ADD64rr_EVEX = 662 |
| 140396 | CEFBS_In64BitMode, // ADD64rr_EVEX_REV = 663 |
| 140397 | CEFBS_In64BitMode, // ADD64rr_ND = 664 |
| 140398 | CEFBS_In64BitMode, // ADD64rr_ND_REV = 665 |
| 140399 | CEFBS_In64BitMode, // ADD64rr_NF = 666 |
| 140400 | CEFBS_In64BitMode, // ADD64rr_NF_ND = 667 |
| 140401 | CEFBS_In64BitMode, // ADD64rr_NF_ND_REV = 668 |
| 140402 | CEFBS_In64BitMode, // ADD64rr_NF_REV = 669 |
| 140403 | CEFBS_None, // ADD64rr_REV = 670 |
| 140404 | CEFBS_None, // ADD8i8 = 671 |
| 140405 | CEFBS_None, // ADD8mi = 672 |
| 140406 | CEFBS_Not64BitMode, // ADD8mi8 = 673 |
| 140407 | CEFBS_In64BitMode, // ADD8mi_EVEX = 674 |
| 140408 | CEFBS_In64BitMode, // ADD8mi_ND = 675 |
| 140409 | CEFBS_In64BitMode, // ADD8mi_NF = 676 |
| 140410 | CEFBS_In64BitMode, // ADD8mi_NF_ND = 677 |
| 140411 | CEFBS_None, // ADD8mr = 678 |
| 140412 | CEFBS_In64BitMode, // ADD8mr_EVEX = 679 |
| 140413 | CEFBS_In64BitMode, // ADD8mr_ND = 680 |
| 140414 | CEFBS_In64BitMode, // ADD8mr_NF = 681 |
| 140415 | CEFBS_In64BitMode, // ADD8mr_NF_ND = 682 |
| 140416 | CEFBS_None, // ADD8ri = 683 |
| 140417 | CEFBS_Not64BitMode, // ADD8ri8 = 684 |
| 140418 | CEFBS_In64BitMode, // ADD8ri_EVEX = 685 |
| 140419 | CEFBS_In64BitMode, // ADD8ri_ND = 686 |
| 140420 | CEFBS_In64BitMode, // ADD8ri_NF = 687 |
| 140421 | CEFBS_In64BitMode, // ADD8ri_NF_ND = 688 |
| 140422 | CEFBS_None, // ADD8rm = 689 |
| 140423 | CEFBS_In64BitMode, // ADD8rm_EVEX = 690 |
| 140424 | CEFBS_In64BitMode, // ADD8rm_ND = 691 |
| 140425 | CEFBS_In64BitMode, // ADD8rm_NF = 692 |
| 140426 | CEFBS_In64BitMode, // ADD8rm_NF_ND = 693 |
| 140427 | CEFBS_None, // ADD8rr = 694 |
| 140428 | CEFBS_In64BitMode, // ADD8rr_EVEX = 695 |
| 140429 | CEFBS_In64BitMode, // ADD8rr_EVEX_REV = 696 |
| 140430 | CEFBS_In64BitMode, // ADD8rr_ND = 697 |
| 140431 | CEFBS_In64BitMode, // ADD8rr_ND_REV = 698 |
| 140432 | CEFBS_In64BitMode, // ADD8rr_NF = 699 |
| 140433 | CEFBS_In64BitMode, // ADD8rr_NF_ND = 700 |
| 140434 | CEFBS_In64BitMode, // ADD8rr_NF_ND_REV = 701 |
| 140435 | CEFBS_In64BitMode, // ADD8rr_NF_REV = 702 |
| 140436 | CEFBS_None, // ADD8rr_REV = 703 |
| 140437 | CEFBS_None, // ADDPDrm = 704 |
| 140438 | CEFBS_None, // ADDPDrr = 705 |
| 140439 | CEFBS_None, // ADDPSrm = 706 |
| 140440 | CEFBS_None, // ADDPSrr = 707 |
| 140441 | CEFBS_In32BitMode, // ADDR16_PREFIX = 708 |
| 140442 | CEFBS_In64BitMode, // ADDR32_PREFIX = 709 |
| 140443 | CEFBS_None, // ADDSDrm = 710 |
| 140444 | CEFBS_None, // ADDSDrm_Int = 711 |
| 140445 | CEFBS_None, // ADDSDrr = 712 |
| 140446 | CEFBS_None, // ADDSDrr_Int = 713 |
| 140447 | CEFBS_None, // ADDSSrm = 714 |
| 140448 | CEFBS_None, // ADDSSrm_Int = 715 |
| 140449 | CEFBS_None, // ADDSSrr = 716 |
| 140450 | CEFBS_None, // ADDSSrr_Int = 717 |
| 140451 | CEFBS_None, // ADDSUBPDrm = 718 |
| 140452 | CEFBS_None, // ADDSUBPDrr = 719 |
| 140453 | CEFBS_None, // ADDSUBPSrm = 720 |
| 140454 | CEFBS_None, // ADDSUBPSrr = 721 |
| 140455 | CEFBS_None, // ADD_F32m = 722 |
| 140456 | CEFBS_None, // ADD_F64m = 723 |
| 140457 | CEFBS_None, // ADD_FI16m = 724 |
| 140458 | CEFBS_None, // ADD_FI32m = 725 |
| 140459 | CEFBS_None, // ADD_FPrST0 = 726 |
| 140460 | CEFBS_None, // ADD_FST0r = 727 |
| 140461 | CEFBS_None, // ADD_Fp32 = 728 |
| 140462 | CEFBS_None, // ADD_Fp32m = 729 |
| 140463 | CEFBS_None, // ADD_Fp64 = 730 |
| 140464 | CEFBS_None, // ADD_Fp64m = 731 |
| 140465 | CEFBS_None, // ADD_Fp64m32 = 732 |
| 140466 | CEFBS_None, // ADD_Fp80 = 733 |
| 140467 | CEFBS_None, // ADD_Fp80m32 = 734 |
| 140468 | CEFBS_None, // ADD_Fp80m64 = 735 |
| 140469 | CEFBS_None, // ADD_FpI16m32 = 736 |
| 140470 | CEFBS_None, // ADD_FpI16m64 = 737 |
| 140471 | CEFBS_None, // ADD_FpI16m80 = 738 |
| 140472 | CEFBS_None, // ADD_FpI32m32 = 739 |
| 140473 | CEFBS_None, // ADD_FpI32m64 = 740 |
| 140474 | CEFBS_None, // ADD_FpI32m80 = 741 |
| 140475 | CEFBS_None, // ADD_FrST0 = 742 |
| 140476 | CEFBS_None, // ADJCALLSTACKDOWN32 = 743 |
| 140477 | CEFBS_None, // ADJCALLSTACKDOWN64 = 744 |
| 140478 | CEFBS_None, // ADJCALLSTACKUP32 = 745 |
| 140479 | CEFBS_None, // ADJCALLSTACKUP64 = 746 |
| 140480 | CEFBS_None, // ADOX32rm = 747 |
| 140481 | CEFBS_In64BitMode, // ADOX32rm_EVEX = 748 |
| 140482 | CEFBS_In64BitMode, // ADOX32rm_ND = 749 |
| 140483 | CEFBS_None, // ADOX32rr = 750 |
| 140484 | CEFBS_In64BitMode, // ADOX32rr_EVEX = 751 |
| 140485 | CEFBS_In64BitMode, // ADOX32rr_ND = 752 |
| 140486 | CEFBS_None, // ADOX64rm = 753 |
| 140487 | CEFBS_In64BitMode, // ADOX64rm_EVEX = 754 |
| 140488 | CEFBS_In64BitMode, // ADOX64rm_ND = 755 |
| 140489 | CEFBS_None, // ADOX64rr = 756 |
| 140490 | CEFBS_In64BitMode, // ADOX64rr_EVEX = 757 |
| 140491 | CEFBS_In64BitMode, // ADOX64rr_ND = 758 |
| 140492 | CEFBS_None, // AESDEC128KL = 759 |
| 140493 | CEFBS_None, // AESDEC256KL = 760 |
| 140494 | CEFBS_None, // AESDECLASTrm = 761 |
| 140495 | CEFBS_None, // AESDECLASTrr = 762 |
| 140496 | CEFBS_None, // AESDECWIDE128KL = 763 |
| 140497 | CEFBS_None, // AESDECWIDE256KL = 764 |
| 140498 | CEFBS_None, // AESDECrm = 765 |
| 140499 | CEFBS_None, // AESDECrr = 766 |
| 140500 | CEFBS_None, // AESENC128KL = 767 |
| 140501 | CEFBS_None, // AESENC256KL = 768 |
| 140502 | CEFBS_None, // AESENCLASTrm = 769 |
| 140503 | CEFBS_None, // AESENCLASTrr = 770 |
| 140504 | CEFBS_None, // AESENCWIDE128KL = 771 |
| 140505 | CEFBS_None, // AESENCWIDE256KL = 772 |
| 140506 | CEFBS_None, // AESENCrm = 773 |
| 140507 | CEFBS_None, // AESENCrr = 774 |
| 140508 | CEFBS_None, // AESIMCrm = 775 |
| 140509 | CEFBS_None, // AESIMCrr = 776 |
| 140510 | CEFBS_None, // AESKEYGENASSIST128rm = 777 |
| 140511 | CEFBS_None, // AESKEYGENASSIST128rr = 778 |
| 140512 | CEFBS_None, // AND16i16 = 779 |
| 140513 | CEFBS_None, // AND16mi = 780 |
| 140514 | CEFBS_None, // AND16mi8 = 781 |
| 140515 | CEFBS_In64BitMode, // AND16mi8_EVEX = 782 |
| 140516 | CEFBS_In64BitMode, // AND16mi8_ND = 783 |
| 140517 | CEFBS_In64BitMode, // AND16mi8_NF = 784 |
| 140518 | CEFBS_In64BitMode, // AND16mi8_NF_ND = 785 |
| 140519 | CEFBS_In64BitMode, // AND16mi_EVEX = 786 |
| 140520 | CEFBS_In64BitMode, // AND16mi_ND = 787 |
| 140521 | CEFBS_In64BitMode, // AND16mi_NF = 788 |
| 140522 | CEFBS_In64BitMode, // AND16mi_NF_ND = 789 |
| 140523 | CEFBS_None, // AND16mr = 790 |
| 140524 | CEFBS_In64BitMode, // AND16mr_EVEX = 791 |
| 140525 | CEFBS_In64BitMode, // AND16mr_ND = 792 |
| 140526 | CEFBS_In64BitMode, // AND16mr_NF = 793 |
| 140527 | CEFBS_In64BitMode, // AND16mr_NF_ND = 794 |
| 140528 | CEFBS_None, // AND16ri = 795 |
| 140529 | CEFBS_None, // AND16ri8 = 796 |
| 140530 | CEFBS_In64BitMode, // AND16ri8_EVEX = 797 |
| 140531 | CEFBS_In64BitMode, // AND16ri8_ND = 798 |
| 140532 | CEFBS_In64BitMode, // AND16ri8_NF = 799 |
| 140533 | CEFBS_In64BitMode, // AND16ri8_NF_ND = 800 |
| 140534 | CEFBS_In64BitMode, // AND16ri_EVEX = 801 |
| 140535 | CEFBS_In64BitMode, // AND16ri_ND = 802 |
| 140536 | CEFBS_In64BitMode, // AND16ri_NF = 803 |
| 140537 | CEFBS_In64BitMode, // AND16ri_NF_ND = 804 |
| 140538 | CEFBS_None, // AND16rm = 805 |
| 140539 | CEFBS_In64BitMode, // AND16rm_EVEX = 806 |
| 140540 | CEFBS_In64BitMode, // AND16rm_ND = 807 |
| 140541 | CEFBS_In64BitMode, // AND16rm_NF = 808 |
| 140542 | CEFBS_In64BitMode, // AND16rm_NF_ND = 809 |
| 140543 | CEFBS_None, // AND16rr = 810 |
| 140544 | CEFBS_In64BitMode, // AND16rr_EVEX = 811 |
| 140545 | CEFBS_In64BitMode, // AND16rr_EVEX_REV = 812 |
| 140546 | CEFBS_In64BitMode, // AND16rr_ND = 813 |
| 140547 | CEFBS_In64BitMode, // AND16rr_ND_REV = 814 |
| 140548 | CEFBS_In64BitMode, // AND16rr_NF = 815 |
| 140549 | CEFBS_In64BitMode, // AND16rr_NF_ND = 816 |
| 140550 | CEFBS_In64BitMode, // AND16rr_NF_ND_REV = 817 |
| 140551 | CEFBS_In64BitMode, // AND16rr_NF_REV = 818 |
| 140552 | CEFBS_None, // AND16rr_REV = 819 |
| 140553 | CEFBS_None, // AND32i32 = 820 |
| 140554 | CEFBS_None, // AND32mi = 821 |
| 140555 | CEFBS_None, // AND32mi8 = 822 |
| 140556 | CEFBS_In64BitMode, // AND32mi8_EVEX = 823 |
| 140557 | CEFBS_In64BitMode, // AND32mi8_ND = 824 |
| 140558 | CEFBS_In64BitMode, // AND32mi8_NF = 825 |
| 140559 | CEFBS_In64BitMode, // AND32mi8_NF_ND = 826 |
| 140560 | CEFBS_In64BitMode, // AND32mi_EVEX = 827 |
| 140561 | CEFBS_In64BitMode, // AND32mi_ND = 828 |
| 140562 | CEFBS_In64BitMode, // AND32mi_NF = 829 |
| 140563 | CEFBS_In64BitMode, // AND32mi_NF_ND = 830 |
| 140564 | CEFBS_None, // AND32mr = 831 |
| 140565 | CEFBS_In64BitMode, // AND32mr_EVEX = 832 |
| 140566 | CEFBS_In64BitMode, // AND32mr_ND = 833 |
| 140567 | CEFBS_In64BitMode, // AND32mr_NF = 834 |
| 140568 | CEFBS_In64BitMode, // AND32mr_NF_ND = 835 |
| 140569 | CEFBS_None, // AND32ri = 836 |
| 140570 | CEFBS_None, // AND32ri8 = 837 |
| 140571 | CEFBS_In64BitMode, // AND32ri8_EVEX = 838 |
| 140572 | CEFBS_In64BitMode, // AND32ri8_ND = 839 |
| 140573 | CEFBS_In64BitMode, // AND32ri8_NF = 840 |
| 140574 | CEFBS_In64BitMode, // AND32ri8_NF_ND = 841 |
| 140575 | CEFBS_In64BitMode, // AND32ri_EVEX = 842 |
| 140576 | CEFBS_In64BitMode, // AND32ri_ND = 843 |
| 140577 | CEFBS_In64BitMode, // AND32ri_NF = 844 |
| 140578 | CEFBS_In64BitMode, // AND32ri_NF_ND = 845 |
| 140579 | CEFBS_None, // AND32rm = 846 |
| 140580 | CEFBS_In64BitMode, // AND32rm_EVEX = 847 |
| 140581 | CEFBS_In64BitMode, // AND32rm_ND = 848 |
| 140582 | CEFBS_In64BitMode, // AND32rm_NF = 849 |
| 140583 | CEFBS_In64BitMode, // AND32rm_NF_ND = 850 |
| 140584 | CEFBS_None, // AND32rr = 851 |
| 140585 | CEFBS_In64BitMode, // AND32rr_EVEX = 852 |
| 140586 | CEFBS_In64BitMode, // AND32rr_EVEX_REV = 853 |
| 140587 | CEFBS_In64BitMode, // AND32rr_ND = 854 |
| 140588 | CEFBS_In64BitMode, // AND32rr_ND_REV = 855 |
| 140589 | CEFBS_In64BitMode, // AND32rr_NF = 856 |
| 140590 | CEFBS_In64BitMode, // AND32rr_NF_ND = 857 |
| 140591 | CEFBS_In64BitMode, // AND32rr_NF_ND_REV = 858 |
| 140592 | CEFBS_In64BitMode, // AND32rr_NF_REV = 859 |
| 140593 | CEFBS_None, // AND32rr_REV = 860 |
| 140594 | CEFBS_None, // AND64i32 = 861 |
| 140595 | CEFBS_In64BitMode, // AND64mi32 = 862 |
| 140596 | CEFBS_In64BitMode, // AND64mi32_EVEX = 863 |
| 140597 | CEFBS_In64BitMode, // AND64mi32_ND = 864 |
| 140598 | CEFBS_In64BitMode, // AND64mi32_NF = 865 |
| 140599 | CEFBS_In64BitMode, // AND64mi32_NF_ND = 866 |
| 140600 | CEFBS_In64BitMode, // AND64mi8 = 867 |
| 140601 | CEFBS_In64BitMode, // AND64mi8_EVEX = 868 |
| 140602 | CEFBS_In64BitMode, // AND64mi8_ND = 869 |
| 140603 | CEFBS_In64BitMode, // AND64mi8_NF = 870 |
| 140604 | CEFBS_In64BitMode, // AND64mi8_NF_ND = 871 |
| 140605 | CEFBS_None, // AND64mr = 872 |
| 140606 | CEFBS_In64BitMode, // AND64mr_EVEX = 873 |
| 140607 | CEFBS_In64BitMode, // AND64mr_ND = 874 |
| 140608 | CEFBS_In64BitMode, // AND64mr_NF = 875 |
| 140609 | CEFBS_In64BitMode, // AND64mr_NF_ND = 876 |
| 140610 | CEFBS_None, // AND64ri32 = 877 |
| 140611 | CEFBS_In64BitMode, // AND64ri32_EVEX = 878 |
| 140612 | CEFBS_In64BitMode, // AND64ri32_ND = 879 |
| 140613 | CEFBS_In64BitMode, // AND64ri32_NF = 880 |
| 140614 | CEFBS_In64BitMode, // AND64ri32_NF_ND = 881 |
| 140615 | CEFBS_None, // AND64ri8 = 882 |
| 140616 | CEFBS_In64BitMode, // AND64ri8_EVEX = 883 |
| 140617 | CEFBS_In64BitMode, // AND64ri8_ND = 884 |
| 140618 | CEFBS_In64BitMode, // AND64ri8_NF = 885 |
| 140619 | CEFBS_In64BitMode, // AND64ri8_NF_ND = 886 |
| 140620 | CEFBS_None, // AND64rm = 887 |
| 140621 | CEFBS_In64BitMode, // AND64rm_EVEX = 888 |
| 140622 | CEFBS_In64BitMode, // AND64rm_ND = 889 |
| 140623 | CEFBS_In64BitMode, // AND64rm_NF = 890 |
| 140624 | CEFBS_In64BitMode, // AND64rm_NF_ND = 891 |
| 140625 | CEFBS_None, // AND64rr = 892 |
| 140626 | CEFBS_In64BitMode, // AND64rr_EVEX = 893 |
| 140627 | CEFBS_In64BitMode, // AND64rr_EVEX_REV = 894 |
| 140628 | CEFBS_In64BitMode, // AND64rr_ND = 895 |
| 140629 | CEFBS_In64BitMode, // AND64rr_ND_REV = 896 |
| 140630 | CEFBS_In64BitMode, // AND64rr_NF = 897 |
| 140631 | CEFBS_In64BitMode, // AND64rr_NF_ND = 898 |
| 140632 | CEFBS_In64BitMode, // AND64rr_NF_ND_REV = 899 |
| 140633 | CEFBS_In64BitMode, // AND64rr_NF_REV = 900 |
| 140634 | CEFBS_None, // AND64rr_REV = 901 |
| 140635 | CEFBS_None, // AND8i8 = 902 |
| 140636 | CEFBS_None, // AND8mi = 903 |
| 140637 | CEFBS_Not64BitMode, // AND8mi8 = 904 |
| 140638 | CEFBS_In64BitMode, // AND8mi_EVEX = 905 |
| 140639 | CEFBS_In64BitMode, // AND8mi_ND = 906 |
| 140640 | CEFBS_In64BitMode, // AND8mi_NF = 907 |
| 140641 | CEFBS_In64BitMode, // AND8mi_NF_ND = 908 |
| 140642 | CEFBS_None, // AND8mr = 909 |
| 140643 | CEFBS_In64BitMode, // AND8mr_EVEX = 910 |
| 140644 | CEFBS_In64BitMode, // AND8mr_ND = 911 |
| 140645 | CEFBS_In64BitMode, // AND8mr_NF = 912 |
| 140646 | CEFBS_In64BitMode, // AND8mr_NF_ND = 913 |
| 140647 | CEFBS_None, // AND8ri = 914 |
| 140648 | CEFBS_Not64BitMode, // AND8ri8 = 915 |
| 140649 | CEFBS_In64BitMode, // AND8ri_EVEX = 916 |
| 140650 | CEFBS_In64BitMode, // AND8ri_ND = 917 |
| 140651 | CEFBS_In64BitMode, // AND8ri_NF = 918 |
| 140652 | CEFBS_In64BitMode, // AND8ri_NF_ND = 919 |
| 140653 | CEFBS_None, // AND8rm = 920 |
| 140654 | CEFBS_In64BitMode, // AND8rm_EVEX = 921 |
| 140655 | CEFBS_In64BitMode, // AND8rm_ND = 922 |
| 140656 | CEFBS_In64BitMode, // AND8rm_NF = 923 |
| 140657 | CEFBS_In64BitMode, // AND8rm_NF_ND = 924 |
| 140658 | CEFBS_None, // AND8rr = 925 |
| 140659 | CEFBS_In64BitMode, // AND8rr_EVEX = 926 |
| 140660 | CEFBS_In64BitMode, // AND8rr_EVEX_REV = 927 |
| 140661 | CEFBS_In64BitMode, // AND8rr_ND = 928 |
| 140662 | CEFBS_In64BitMode, // AND8rr_ND_REV = 929 |
| 140663 | CEFBS_In64BitMode, // AND8rr_NF = 930 |
| 140664 | CEFBS_In64BitMode, // AND8rr_NF_ND = 931 |
| 140665 | CEFBS_In64BitMode, // AND8rr_NF_ND_REV = 932 |
| 140666 | CEFBS_In64BitMode, // AND8rr_NF_REV = 933 |
| 140667 | CEFBS_None, // AND8rr_REV = 934 |
| 140668 | CEFBS_None, // ANDN32rm = 935 |
| 140669 | CEFBS_In64BitMode, // ANDN32rm_EVEX = 936 |
| 140670 | CEFBS_In64BitMode, // ANDN32rm_NF = 937 |
| 140671 | CEFBS_None, // ANDN32rr = 938 |
| 140672 | CEFBS_In64BitMode, // ANDN32rr_EVEX = 939 |
| 140673 | CEFBS_In64BitMode, // ANDN32rr_NF = 940 |
| 140674 | CEFBS_None, // ANDN64rm = 941 |
| 140675 | CEFBS_In64BitMode, // ANDN64rm_EVEX = 942 |
| 140676 | CEFBS_In64BitMode, // ANDN64rm_NF = 943 |
| 140677 | CEFBS_None, // ANDN64rr = 944 |
| 140678 | CEFBS_In64BitMode, // ANDN64rr_EVEX = 945 |
| 140679 | CEFBS_In64BitMode, // ANDN64rr_NF = 946 |
| 140680 | CEFBS_None, // ANDNPDrm = 947 |
| 140681 | CEFBS_None, // ANDNPDrr = 948 |
| 140682 | CEFBS_None, // ANDNPSrm = 949 |
| 140683 | CEFBS_None, // ANDNPSrr = 950 |
| 140684 | CEFBS_None, // ANDPDrm = 951 |
| 140685 | CEFBS_None, // ANDPDrr = 952 |
| 140686 | CEFBS_None, // ANDPSrm = 953 |
| 140687 | CEFBS_None, // ANDPSrr = 954 |
| 140688 | CEFBS_None, // AOR32mr = 955 |
| 140689 | CEFBS_In64BitMode, // AOR32mr_EVEX = 956 |
| 140690 | CEFBS_None, // AOR64mr = 957 |
| 140691 | CEFBS_In64BitMode, // AOR64mr_EVEX = 958 |
| 140692 | CEFBS_Not64BitMode, // ARPL16mr = 959 |
| 140693 | CEFBS_Not64BitMode, // ARPL16rr = 960 |
| 140694 | CEFBS_None, // ASAN_CHECK_MEMACCESS = 961 |
| 140695 | CEFBS_None, // AXOR32mr = 962 |
| 140696 | CEFBS_In64BitMode, // AXOR32mr_EVEX = 963 |
| 140697 | CEFBS_None, // AXOR64mr = 964 |
| 140698 | CEFBS_In64BitMode, // AXOR64mr_EVEX = 965 |
| 140699 | CEFBS_None, // BEXTR32rm = 966 |
| 140700 | CEFBS_In64BitMode, // BEXTR32rm_EVEX = 967 |
| 140701 | CEFBS_In64BitMode, // BEXTR32rm_NF = 968 |
| 140702 | CEFBS_None, // BEXTR32rr = 969 |
| 140703 | CEFBS_In64BitMode, // BEXTR32rr_EVEX = 970 |
| 140704 | CEFBS_In64BitMode, // BEXTR32rr_NF = 971 |
| 140705 | CEFBS_None, // BEXTR64rm = 972 |
| 140706 | CEFBS_In64BitMode, // BEXTR64rm_EVEX = 973 |
| 140707 | CEFBS_In64BitMode, // BEXTR64rm_NF = 974 |
| 140708 | CEFBS_None, // BEXTR64rr = 975 |
| 140709 | CEFBS_In64BitMode, // BEXTR64rr_EVEX = 976 |
| 140710 | CEFBS_In64BitMode, // BEXTR64rr_NF = 977 |
| 140711 | CEFBS_None, // BEXTRI32mi = 978 |
| 140712 | CEFBS_None, // BEXTRI32ri = 979 |
| 140713 | CEFBS_None, // BEXTRI64mi = 980 |
| 140714 | CEFBS_None, // BEXTRI64ri = 981 |
| 140715 | CEFBS_None, // BLCFILL32rm = 982 |
| 140716 | CEFBS_None, // BLCFILL32rr = 983 |
| 140717 | CEFBS_None, // BLCFILL64rm = 984 |
| 140718 | CEFBS_None, // BLCFILL64rr = 985 |
| 140719 | CEFBS_None, // BLCI32rm = 986 |
| 140720 | CEFBS_None, // BLCI32rr = 987 |
| 140721 | CEFBS_None, // BLCI64rm = 988 |
| 140722 | CEFBS_None, // BLCI64rr = 989 |
| 140723 | CEFBS_None, // BLCIC32rm = 990 |
| 140724 | CEFBS_None, // BLCIC32rr = 991 |
| 140725 | CEFBS_None, // BLCIC64rm = 992 |
| 140726 | CEFBS_None, // BLCIC64rr = 993 |
| 140727 | CEFBS_None, // BLCMSK32rm = 994 |
| 140728 | CEFBS_None, // BLCMSK32rr = 995 |
| 140729 | CEFBS_None, // BLCMSK64rm = 996 |
| 140730 | CEFBS_None, // BLCMSK64rr = 997 |
| 140731 | CEFBS_None, // BLCS32rm = 998 |
| 140732 | CEFBS_None, // BLCS32rr = 999 |
| 140733 | CEFBS_None, // BLCS64rm = 1000 |
| 140734 | CEFBS_None, // BLCS64rr = 1001 |
| 140735 | CEFBS_None, // BLENDPDrmi = 1002 |
| 140736 | CEFBS_None, // BLENDPDrri = 1003 |
| 140737 | CEFBS_None, // BLENDPSrmi = 1004 |
| 140738 | CEFBS_None, // BLENDPSrri = 1005 |
| 140739 | CEFBS_None, // BLENDVPDrm0 = 1006 |
| 140740 | CEFBS_None, // BLENDVPDrr0 = 1007 |
| 140741 | CEFBS_None, // BLENDVPSrm0 = 1008 |
| 140742 | CEFBS_None, // BLENDVPSrr0 = 1009 |
| 140743 | CEFBS_None, // BLSFILL32rm = 1010 |
| 140744 | CEFBS_None, // BLSFILL32rr = 1011 |
| 140745 | CEFBS_None, // BLSFILL64rm = 1012 |
| 140746 | CEFBS_None, // BLSFILL64rr = 1013 |
| 140747 | CEFBS_None, // BLSI32rm = 1014 |
| 140748 | CEFBS_In64BitMode, // BLSI32rm_EVEX = 1015 |
| 140749 | CEFBS_In64BitMode, // BLSI32rm_NF = 1016 |
| 140750 | CEFBS_None, // BLSI32rr = 1017 |
| 140751 | CEFBS_In64BitMode, // BLSI32rr_EVEX = 1018 |
| 140752 | CEFBS_In64BitMode, // BLSI32rr_NF = 1019 |
| 140753 | CEFBS_None, // BLSI64rm = 1020 |
| 140754 | CEFBS_In64BitMode, // BLSI64rm_EVEX = 1021 |
| 140755 | CEFBS_In64BitMode, // BLSI64rm_NF = 1022 |
| 140756 | CEFBS_None, // BLSI64rr = 1023 |
| 140757 | CEFBS_In64BitMode, // BLSI64rr_EVEX = 1024 |
| 140758 | CEFBS_In64BitMode, // BLSI64rr_NF = 1025 |
| 140759 | CEFBS_None, // BLSIC32rm = 1026 |
| 140760 | CEFBS_None, // BLSIC32rr = 1027 |
| 140761 | CEFBS_None, // BLSIC64rm = 1028 |
| 140762 | CEFBS_None, // BLSIC64rr = 1029 |
| 140763 | CEFBS_None, // BLSMSK32rm = 1030 |
| 140764 | CEFBS_In64BitMode, // BLSMSK32rm_EVEX = 1031 |
| 140765 | CEFBS_In64BitMode, // BLSMSK32rm_NF = 1032 |
| 140766 | CEFBS_None, // BLSMSK32rr = 1033 |
| 140767 | CEFBS_In64BitMode, // BLSMSK32rr_EVEX = 1034 |
| 140768 | CEFBS_In64BitMode, // BLSMSK32rr_NF = 1035 |
| 140769 | CEFBS_None, // BLSMSK64rm = 1036 |
| 140770 | CEFBS_In64BitMode, // BLSMSK64rm_EVEX = 1037 |
| 140771 | CEFBS_In64BitMode, // BLSMSK64rm_NF = 1038 |
| 140772 | CEFBS_None, // BLSMSK64rr = 1039 |
| 140773 | CEFBS_In64BitMode, // BLSMSK64rr_EVEX = 1040 |
| 140774 | CEFBS_In64BitMode, // BLSMSK64rr_NF = 1041 |
| 140775 | CEFBS_None, // BLSR32rm = 1042 |
| 140776 | CEFBS_In64BitMode, // BLSR32rm_EVEX = 1043 |
| 140777 | CEFBS_In64BitMode, // BLSR32rm_NF = 1044 |
| 140778 | CEFBS_None, // BLSR32rr = 1045 |
| 140779 | CEFBS_In64BitMode, // BLSR32rr_EVEX = 1046 |
| 140780 | CEFBS_In64BitMode, // BLSR32rr_NF = 1047 |
| 140781 | CEFBS_None, // BLSR64rm = 1048 |
| 140782 | CEFBS_In64BitMode, // BLSR64rm_EVEX = 1049 |
| 140783 | CEFBS_In64BitMode, // BLSR64rm_NF = 1050 |
| 140784 | CEFBS_None, // BLSR64rr = 1051 |
| 140785 | CEFBS_In64BitMode, // BLSR64rr_EVEX = 1052 |
| 140786 | CEFBS_In64BitMode, // BLSR64rr_NF = 1053 |
| 140787 | CEFBS_Not64BitMode, // BOUNDS16rm = 1054 |
| 140788 | CEFBS_Not64BitMode, // BOUNDS32rm = 1055 |
| 140789 | CEFBS_None, // BSF16rm = 1056 |
| 140790 | CEFBS_None, // BSF16rr = 1057 |
| 140791 | CEFBS_None, // BSF32rm = 1058 |
| 140792 | CEFBS_None, // BSF32rr = 1059 |
| 140793 | CEFBS_None, // BSF64rm = 1060 |
| 140794 | CEFBS_None, // BSF64rr = 1061 |
| 140795 | CEFBS_None, // BSR16rm = 1062 |
| 140796 | CEFBS_None, // BSR16rr = 1063 |
| 140797 | CEFBS_None, // BSR32rm = 1064 |
| 140798 | CEFBS_None, // BSR32rr = 1065 |
| 140799 | CEFBS_None, // BSR64rm = 1066 |
| 140800 | CEFBS_None, // BSR64rr = 1067 |
| 140801 | CEFBS_None, // BSWAP16r_BAD = 1068 |
| 140802 | CEFBS_None, // BSWAP32r = 1069 |
| 140803 | CEFBS_None, // BSWAP64r = 1070 |
| 140804 | CEFBS_None, // BT16mi8 = 1071 |
| 140805 | CEFBS_None, // BT16mr = 1072 |
| 140806 | CEFBS_None, // BT16ri8 = 1073 |
| 140807 | CEFBS_None, // BT16rr = 1074 |
| 140808 | CEFBS_None, // BT32mi8 = 1075 |
| 140809 | CEFBS_None, // BT32mr = 1076 |
| 140810 | CEFBS_None, // BT32ri8 = 1077 |
| 140811 | CEFBS_None, // BT32rr = 1078 |
| 140812 | CEFBS_In64BitMode, // BT64mi8 = 1079 |
| 140813 | CEFBS_None, // BT64mr = 1080 |
| 140814 | CEFBS_None, // BT64ri8 = 1081 |
| 140815 | CEFBS_None, // BT64rr = 1082 |
| 140816 | CEFBS_None, // BTC16mi8 = 1083 |
| 140817 | CEFBS_None, // BTC16mr = 1084 |
| 140818 | CEFBS_None, // BTC16ri8 = 1085 |
| 140819 | CEFBS_None, // BTC16rr = 1086 |
| 140820 | CEFBS_None, // BTC32mi8 = 1087 |
| 140821 | CEFBS_None, // BTC32mr = 1088 |
| 140822 | CEFBS_None, // BTC32ri8 = 1089 |
| 140823 | CEFBS_None, // BTC32rr = 1090 |
| 140824 | CEFBS_In64BitMode, // BTC64mi8 = 1091 |
| 140825 | CEFBS_None, // BTC64mr = 1092 |
| 140826 | CEFBS_None, // BTC64ri8 = 1093 |
| 140827 | CEFBS_None, // BTC64rr = 1094 |
| 140828 | CEFBS_None, // BTR16mi8 = 1095 |
| 140829 | CEFBS_None, // BTR16mr = 1096 |
| 140830 | CEFBS_None, // BTR16ri8 = 1097 |
| 140831 | CEFBS_None, // BTR16rr = 1098 |
| 140832 | CEFBS_None, // BTR32mi8 = 1099 |
| 140833 | CEFBS_None, // BTR32mr = 1100 |
| 140834 | CEFBS_None, // BTR32ri8 = 1101 |
| 140835 | CEFBS_None, // BTR32rr = 1102 |
| 140836 | CEFBS_In64BitMode, // BTR64mi8 = 1103 |
| 140837 | CEFBS_None, // BTR64mr = 1104 |
| 140838 | CEFBS_None, // BTR64ri8 = 1105 |
| 140839 | CEFBS_None, // BTR64rr = 1106 |
| 140840 | CEFBS_None, // BTS16mi8 = 1107 |
| 140841 | CEFBS_None, // BTS16mr = 1108 |
| 140842 | CEFBS_None, // BTS16ri8 = 1109 |
| 140843 | CEFBS_None, // BTS16rr = 1110 |
| 140844 | CEFBS_None, // BTS32mi8 = 1111 |
| 140845 | CEFBS_None, // BTS32mr = 1112 |
| 140846 | CEFBS_None, // BTS32ri8 = 1113 |
| 140847 | CEFBS_None, // BTS32rr = 1114 |
| 140848 | CEFBS_In64BitMode, // BTS64mi8 = 1115 |
| 140849 | CEFBS_None, // BTS64mr = 1116 |
| 140850 | CEFBS_None, // BTS64ri8 = 1117 |
| 140851 | CEFBS_None, // BTS64rr = 1118 |
| 140852 | CEFBS_None, // BZHI32rm = 1119 |
| 140853 | CEFBS_In64BitMode, // BZHI32rm_EVEX = 1120 |
| 140854 | CEFBS_In64BitMode, // BZHI32rm_NF = 1121 |
| 140855 | CEFBS_None, // BZHI32rr = 1122 |
| 140856 | CEFBS_In64BitMode, // BZHI32rr_EVEX = 1123 |
| 140857 | CEFBS_In64BitMode, // BZHI32rr_NF = 1124 |
| 140858 | CEFBS_None, // BZHI64rm = 1125 |
| 140859 | CEFBS_In64BitMode, // BZHI64rm_EVEX = 1126 |
| 140860 | CEFBS_In64BitMode, // BZHI64rm_NF = 1127 |
| 140861 | CEFBS_None, // BZHI64rr = 1128 |
| 140862 | CEFBS_In64BitMode, // BZHI64rr_EVEX = 1129 |
| 140863 | CEFBS_In64BitMode, // BZHI64rr_NF = 1130 |
| 140864 | CEFBS_Not64BitMode, // CALL16m = 1131 |
| 140865 | CEFBS_Not64BitMode, // CALL16m_NT = 1132 |
| 140866 | CEFBS_Not64BitMode, // CALL16r = 1133 |
| 140867 | CEFBS_Not64BitMode, // CALL16r_NT = 1134 |
| 140868 | CEFBS_Not64BitMode, // CALL32m = 1135 |
| 140869 | CEFBS_Not64BitMode, // CALL32m_NT = 1136 |
| 140870 | CEFBS_Not64BitMode, // CALL32r = 1137 |
| 140871 | CEFBS_Not64BitMode, // CALL32r_NT = 1138 |
| 140872 | CEFBS_In64BitMode, // CALL64m = 1139 |
| 140873 | CEFBS_In64BitMode, // CALL64m_NT = 1140 |
| 140874 | CEFBS_In64BitMode, // CALL64pcrel32 = 1141 |
| 140875 | CEFBS_In64BitMode, // CALL64r = 1142 |
| 140876 | CEFBS_In64BitMode, // CALL64r_NT = 1143 |
| 140877 | CEFBS_Not64BitMode, // CALLpcrel16 = 1144 |
| 140878 | CEFBS_Not64BitMode, // CALLpcrel32 = 1145 |
| 140879 | CEFBS_None, // CATCHRET = 1146 |
| 140880 | CEFBS_None, // CBW = 1147 |
| 140881 | CEFBS_In64BitMode, // CCMP16mi = 1148 |
| 140882 | CEFBS_In64BitMode, // CCMP16mi8 = 1149 |
| 140883 | CEFBS_In64BitMode, // CCMP16mr = 1150 |
| 140884 | CEFBS_In64BitMode, // CCMP16ri = 1151 |
| 140885 | CEFBS_In64BitMode, // CCMP16ri8 = 1152 |
| 140886 | CEFBS_In64BitMode, // CCMP16rm = 1153 |
| 140887 | CEFBS_In64BitMode, // CCMP16rr = 1154 |
| 140888 | CEFBS_In64BitMode, // CCMP16rr_REV = 1155 |
| 140889 | CEFBS_In64BitMode, // CCMP32mi = 1156 |
| 140890 | CEFBS_In64BitMode, // CCMP32mi8 = 1157 |
| 140891 | CEFBS_In64BitMode, // CCMP32mr = 1158 |
| 140892 | CEFBS_In64BitMode, // CCMP32ri = 1159 |
| 140893 | CEFBS_In64BitMode, // CCMP32ri8 = 1160 |
| 140894 | CEFBS_In64BitMode, // CCMP32rm = 1161 |
| 140895 | CEFBS_In64BitMode, // CCMP32rr = 1162 |
| 140896 | CEFBS_In64BitMode, // CCMP32rr_REV = 1163 |
| 140897 | CEFBS_In64BitMode, // CCMP64mi32 = 1164 |
| 140898 | CEFBS_In64BitMode, // CCMP64mi8 = 1165 |
| 140899 | CEFBS_In64BitMode, // CCMP64mr = 1166 |
| 140900 | CEFBS_In64BitMode, // CCMP64ri32 = 1167 |
| 140901 | CEFBS_In64BitMode, // CCMP64ri8 = 1168 |
| 140902 | CEFBS_In64BitMode, // CCMP64rm = 1169 |
| 140903 | CEFBS_In64BitMode, // CCMP64rr = 1170 |
| 140904 | CEFBS_In64BitMode, // CCMP64rr_REV = 1171 |
| 140905 | CEFBS_In64BitMode, // CCMP8mi = 1172 |
| 140906 | CEFBS_In64BitMode, // CCMP8mr = 1173 |
| 140907 | CEFBS_In64BitMode, // CCMP8ri = 1174 |
| 140908 | CEFBS_In64BitMode, // CCMP8rm = 1175 |
| 140909 | CEFBS_In64BitMode, // CCMP8rr = 1176 |
| 140910 | CEFBS_In64BitMode, // CCMP8rr_REV = 1177 |
| 140911 | CEFBS_None, // CDQ = 1178 |
| 140912 | CEFBS_In64BitMode, // CDQE = 1179 |
| 140913 | CEFBS_In64BitMode, // CFCMOV16mr = 1180 |
| 140914 | CEFBS_In64BitMode, // CFCMOV16rm = 1181 |
| 140915 | CEFBS_In64BitMode, // CFCMOV16rm_ND = 1182 |
| 140916 | CEFBS_In64BitMode, // CFCMOV16rr = 1183 |
| 140917 | CEFBS_In64BitMode, // CFCMOV16rr_ND = 1184 |
| 140918 | CEFBS_In64BitMode, // CFCMOV16rr_REV = 1185 |
| 140919 | CEFBS_In64BitMode, // CFCMOV32mr = 1186 |
| 140920 | CEFBS_In64BitMode, // CFCMOV32rm = 1187 |
| 140921 | CEFBS_In64BitMode, // CFCMOV32rm_ND = 1188 |
| 140922 | CEFBS_In64BitMode, // CFCMOV32rr = 1189 |
| 140923 | CEFBS_In64BitMode, // CFCMOV32rr_ND = 1190 |
| 140924 | CEFBS_In64BitMode, // CFCMOV32rr_REV = 1191 |
| 140925 | CEFBS_In64BitMode, // CFCMOV64mr = 1192 |
| 140926 | CEFBS_In64BitMode, // CFCMOV64rm = 1193 |
| 140927 | CEFBS_In64BitMode, // CFCMOV64rm_ND = 1194 |
| 140928 | CEFBS_In64BitMode, // CFCMOV64rr = 1195 |
| 140929 | CEFBS_In64BitMode, // CFCMOV64rr_ND = 1196 |
| 140930 | CEFBS_In64BitMode, // CFCMOV64rr_REV = 1197 |
| 140931 | CEFBS_None, // CHS_F = 1198 |
| 140932 | CEFBS_None, // CHS_Fp32 = 1199 |
| 140933 | CEFBS_None, // CHS_Fp64 = 1200 |
| 140934 | CEFBS_None, // CHS_Fp80 = 1201 |
| 140935 | CEFBS_None, // CLAC = 1202 |
| 140936 | CEFBS_None, // CLC = 1203 |
| 140937 | CEFBS_None, // CLD = 1204 |
| 140938 | CEFBS_None, // CLDEMOTE = 1205 |
| 140939 | CEFBS_None, // CLEANUPRET = 1206 |
| 140940 | CEFBS_None, // CLFLUSH = 1207 |
| 140941 | CEFBS_None, // CLFLUSHOPT = 1208 |
| 140942 | CEFBS_None, // CLGI = 1209 |
| 140943 | CEFBS_None, // CLI = 1210 |
| 140944 | CEFBS_None, // CLRSSBSY = 1211 |
| 140945 | CEFBS_None, // CLTS = 1212 |
| 140946 | CEFBS_In64BitMode, // CLUI = 1213 |
| 140947 | CEFBS_None, // CLWB = 1214 |
| 140948 | CEFBS_Not64BitMode, // CLZERO32r = 1215 |
| 140949 | CEFBS_In64BitMode, // CLZERO64r = 1216 |
| 140950 | CEFBS_None, // CMC = 1217 |
| 140951 | CEFBS_None, // CMOV16rm = 1218 |
| 140952 | CEFBS_In64BitMode, // CMOV16rm_ND = 1219 |
| 140953 | CEFBS_None, // CMOV16rr = 1220 |
| 140954 | CEFBS_In64BitMode, // CMOV16rr_ND = 1221 |
| 140955 | CEFBS_None, // CMOV32rm = 1222 |
| 140956 | CEFBS_In64BitMode, // CMOV32rm_ND = 1223 |
| 140957 | CEFBS_None, // CMOV32rr = 1224 |
| 140958 | CEFBS_In64BitMode, // CMOV32rr_ND = 1225 |
| 140959 | CEFBS_None, // CMOV64rm = 1226 |
| 140960 | CEFBS_In64BitMode, // CMOV64rm_ND = 1227 |
| 140961 | CEFBS_None, // CMOV64rr = 1228 |
| 140962 | CEFBS_In64BitMode, // CMOV64rr_ND = 1229 |
| 140963 | CEFBS_None, // CMOVBE_F = 1230 |
| 140964 | CEFBS_None, // CMOVBE_Fp32 = 1231 |
| 140965 | CEFBS_None, // CMOVBE_Fp64 = 1232 |
| 140966 | CEFBS_None, // CMOVBE_Fp80 = 1233 |
| 140967 | CEFBS_None, // CMOVB_F = 1234 |
| 140968 | CEFBS_None, // CMOVB_Fp32 = 1235 |
| 140969 | CEFBS_None, // CMOVB_Fp64 = 1236 |
| 140970 | CEFBS_None, // CMOVB_Fp80 = 1237 |
| 140971 | CEFBS_None, // CMOVE_F = 1238 |
| 140972 | CEFBS_None, // CMOVE_Fp32 = 1239 |
| 140973 | CEFBS_None, // CMOVE_Fp64 = 1240 |
| 140974 | CEFBS_None, // CMOVE_Fp80 = 1241 |
| 140975 | CEFBS_None, // CMOVNBE_F = 1242 |
| 140976 | CEFBS_None, // CMOVNBE_Fp32 = 1243 |
| 140977 | CEFBS_None, // CMOVNBE_Fp64 = 1244 |
| 140978 | CEFBS_None, // CMOVNBE_Fp80 = 1245 |
| 140979 | CEFBS_None, // CMOVNB_F = 1246 |
| 140980 | CEFBS_None, // CMOVNB_Fp32 = 1247 |
| 140981 | CEFBS_None, // CMOVNB_Fp64 = 1248 |
| 140982 | CEFBS_None, // CMOVNB_Fp80 = 1249 |
| 140983 | CEFBS_None, // CMOVNE_F = 1250 |
| 140984 | CEFBS_None, // CMOVNE_Fp32 = 1251 |
| 140985 | CEFBS_None, // CMOVNE_Fp64 = 1252 |
| 140986 | CEFBS_None, // CMOVNE_Fp80 = 1253 |
| 140987 | CEFBS_None, // CMOVNP_F = 1254 |
| 140988 | CEFBS_None, // CMOVNP_Fp32 = 1255 |
| 140989 | CEFBS_None, // CMOVNP_Fp64 = 1256 |
| 140990 | CEFBS_None, // CMOVNP_Fp80 = 1257 |
| 140991 | CEFBS_None, // CMOVP_F = 1258 |
| 140992 | CEFBS_None, // CMOVP_Fp32 = 1259 |
| 140993 | CEFBS_None, // CMOVP_Fp64 = 1260 |
| 140994 | CEFBS_None, // CMOVP_Fp80 = 1261 |
| 140995 | CEFBS_None, // CMOV_FR16 = 1262 |
| 140996 | CEFBS_None, // CMOV_FR16X = 1263 |
| 140997 | CEFBS_None, // CMOV_FR32 = 1264 |
| 140998 | CEFBS_None, // CMOV_FR32X = 1265 |
| 140999 | CEFBS_None, // CMOV_FR64 = 1266 |
| 141000 | CEFBS_None, // CMOV_FR64X = 1267 |
| 141001 | CEFBS_None, // CMOV_GR16 = 1268 |
| 141002 | CEFBS_None, // CMOV_GR32 = 1269 |
| 141003 | CEFBS_None, // CMOV_GR8 = 1270 |
| 141004 | CEFBS_None, // CMOV_RFP32 = 1271 |
| 141005 | CEFBS_None, // CMOV_RFP64 = 1272 |
| 141006 | CEFBS_None, // CMOV_RFP80 = 1273 |
| 141007 | CEFBS_None, // CMOV_VK1 = 1274 |
| 141008 | CEFBS_None, // CMOV_VK16 = 1275 |
| 141009 | CEFBS_None, // CMOV_VK2 = 1276 |
| 141010 | CEFBS_None, // CMOV_VK32 = 1277 |
| 141011 | CEFBS_None, // CMOV_VK4 = 1278 |
| 141012 | CEFBS_None, // CMOV_VK64 = 1279 |
| 141013 | CEFBS_None, // CMOV_VK8 = 1280 |
| 141014 | CEFBS_None, // CMOV_VR128 = 1281 |
| 141015 | CEFBS_None, // CMOV_VR128X = 1282 |
| 141016 | CEFBS_None, // CMOV_VR256 = 1283 |
| 141017 | CEFBS_None, // CMOV_VR256X = 1284 |
| 141018 | CEFBS_None, // CMOV_VR512 = 1285 |
| 141019 | CEFBS_None, // CMOV_VR64 = 1286 |
| 141020 | CEFBS_None, // CMP16i16 = 1287 |
| 141021 | CEFBS_None, // CMP16mi = 1288 |
| 141022 | CEFBS_None, // CMP16mi8 = 1289 |
| 141023 | CEFBS_None, // CMP16mr = 1290 |
| 141024 | CEFBS_None, // CMP16ri = 1291 |
| 141025 | CEFBS_None, // CMP16ri8 = 1292 |
| 141026 | CEFBS_None, // CMP16rm = 1293 |
| 141027 | CEFBS_None, // CMP16rr = 1294 |
| 141028 | CEFBS_None, // CMP16rr_REV = 1295 |
| 141029 | CEFBS_None, // CMP32i32 = 1296 |
| 141030 | CEFBS_None, // CMP32mi = 1297 |
| 141031 | CEFBS_None, // CMP32mi8 = 1298 |
| 141032 | CEFBS_None, // CMP32mr = 1299 |
| 141033 | CEFBS_None, // CMP32ri = 1300 |
| 141034 | CEFBS_None, // CMP32ri8 = 1301 |
| 141035 | CEFBS_None, // CMP32rm = 1302 |
| 141036 | CEFBS_None, // CMP32rr = 1303 |
| 141037 | CEFBS_None, // CMP32rr_REV = 1304 |
| 141038 | CEFBS_None, // CMP64i32 = 1305 |
| 141039 | CEFBS_In64BitMode, // CMP64mi32 = 1306 |
| 141040 | CEFBS_In64BitMode, // CMP64mi8 = 1307 |
| 141041 | CEFBS_None, // CMP64mr = 1308 |
| 141042 | CEFBS_None, // CMP64ri32 = 1309 |
| 141043 | CEFBS_None, // CMP64ri8 = 1310 |
| 141044 | CEFBS_None, // CMP64rm = 1311 |
| 141045 | CEFBS_None, // CMP64rr = 1312 |
| 141046 | CEFBS_None, // CMP64rr_REV = 1313 |
| 141047 | CEFBS_None, // CMP8i8 = 1314 |
| 141048 | CEFBS_None, // CMP8mi = 1315 |
| 141049 | CEFBS_Not64BitMode, // CMP8mi8 = 1316 |
| 141050 | CEFBS_None, // CMP8mr = 1317 |
| 141051 | CEFBS_None, // CMP8ri = 1318 |
| 141052 | CEFBS_Not64BitMode, // CMP8ri8 = 1319 |
| 141053 | CEFBS_None, // CMP8rm = 1320 |
| 141054 | CEFBS_None, // CMP8rr = 1321 |
| 141055 | CEFBS_None, // CMP8rr_REV = 1322 |
| 141056 | CEFBS_In64BitMode, // CMPCCXADDmr32 = 1323 |
| 141057 | CEFBS_In64BitMode, // CMPCCXADDmr32_EVEX = 1324 |
| 141058 | CEFBS_In64BitMode, // CMPCCXADDmr64 = 1325 |
| 141059 | CEFBS_In64BitMode, // CMPCCXADDmr64_EVEX = 1326 |
| 141060 | CEFBS_None, // CMPPDrmi = 1327 |
| 141061 | CEFBS_None, // CMPPDrri = 1328 |
| 141062 | CEFBS_None, // CMPPSrmi = 1329 |
| 141063 | CEFBS_None, // CMPPSrri = 1330 |
| 141064 | CEFBS_None, // CMPSB = 1331 |
| 141065 | CEFBS_None, // CMPSDrmi = 1332 |
| 141066 | CEFBS_None, // CMPSDrmi_Int = 1333 |
| 141067 | CEFBS_None, // CMPSDrri = 1334 |
| 141068 | CEFBS_None, // CMPSDrri_Int = 1335 |
| 141069 | CEFBS_None, // CMPSL = 1336 |
| 141070 | CEFBS_In64BitMode, // CMPSQ = 1337 |
| 141071 | CEFBS_None, // CMPSSrmi = 1338 |
| 141072 | CEFBS_None, // CMPSSrmi_Int = 1339 |
| 141073 | CEFBS_None, // CMPSSrri = 1340 |
| 141074 | CEFBS_None, // CMPSSrri_Int = 1341 |
| 141075 | CEFBS_None, // CMPSW = 1342 |
| 141076 | CEFBS_In64BitMode, // CMPXCHG16B = 1343 |
| 141077 | CEFBS_None, // CMPXCHG16rm = 1344 |
| 141078 | CEFBS_None, // CMPXCHG16rr = 1345 |
| 141079 | CEFBS_None, // CMPXCHG32rm = 1346 |
| 141080 | CEFBS_None, // CMPXCHG32rr = 1347 |
| 141081 | CEFBS_None, // CMPXCHG64rm = 1348 |
| 141082 | CEFBS_None, // CMPXCHG64rr = 1349 |
| 141083 | CEFBS_None, // CMPXCHG8B = 1350 |
| 141084 | CEFBS_None, // CMPXCHG8rm = 1351 |
| 141085 | CEFBS_None, // CMPXCHG8rr = 1352 |
| 141086 | CEFBS_None, // COMISDrm = 1353 |
| 141087 | CEFBS_None, // COMISDrm_Int = 1354 |
| 141088 | CEFBS_None, // COMISDrr = 1355 |
| 141089 | CEFBS_None, // COMISDrr_Int = 1356 |
| 141090 | CEFBS_None, // COMISSrm = 1357 |
| 141091 | CEFBS_None, // COMISSrm_Int = 1358 |
| 141092 | CEFBS_None, // COMISSrr = 1359 |
| 141093 | CEFBS_None, // COMISSrr_Int = 1360 |
| 141094 | CEFBS_None, // COMP_FST0r = 1361 |
| 141095 | CEFBS_None, // COM_FIPr = 1362 |
| 141096 | CEFBS_None, // COM_FIr = 1363 |
| 141097 | CEFBS_None, // COM_FST0r = 1364 |
| 141098 | CEFBS_None, // COM_FpIr32 = 1365 |
| 141099 | CEFBS_None, // COM_FpIr64 = 1366 |
| 141100 | CEFBS_None, // COM_FpIr80 = 1367 |
| 141101 | CEFBS_None, // COM_Fpr32 = 1368 |
| 141102 | CEFBS_None, // COM_Fpr64 = 1369 |
| 141103 | CEFBS_None, // COM_Fpr80 = 1370 |
| 141104 | CEFBS_None, // CPUID = 1371 |
| 141105 | CEFBS_In64BitMode, // CQO = 1372 |
| 141106 | CEFBS_None, // CRC32r32m16 = 1373 |
| 141107 | CEFBS_In64BitMode, // CRC32r32m16_EVEX = 1374 |
| 141108 | CEFBS_None, // CRC32r32m32 = 1375 |
| 141109 | CEFBS_In64BitMode, // CRC32r32m32_EVEX = 1376 |
| 141110 | CEFBS_None, // CRC32r32m8 = 1377 |
| 141111 | CEFBS_In64BitMode, // CRC32r32m8_EVEX = 1378 |
| 141112 | CEFBS_None, // CRC32r32r16 = 1379 |
| 141113 | CEFBS_In64BitMode, // CRC32r32r16_EVEX = 1380 |
| 141114 | CEFBS_None, // CRC32r32r32 = 1381 |
| 141115 | CEFBS_In64BitMode, // CRC32r32r32_EVEX = 1382 |
| 141116 | CEFBS_None, // CRC32r32r8 = 1383 |
| 141117 | CEFBS_In64BitMode, // CRC32r32r8_EVEX = 1384 |
| 141118 | CEFBS_None, // CRC32r64m64 = 1385 |
| 141119 | CEFBS_In64BitMode, // CRC32r64m64_EVEX = 1386 |
| 141120 | CEFBS_None, // CRC32r64m8 = 1387 |
| 141121 | CEFBS_In64BitMode, // CRC32r64m8_EVEX = 1388 |
| 141122 | CEFBS_None, // CRC32r64r64 = 1389 |
| 141123 | CEFBS_In64BitMode, // CRC32r64r64_EVEX = 1390 |
| 141124 | CEFBS_None, // CRC32r64r8 = 1391 |
| 141125 | CEFBS_In64BitMode, // CRC32r64r8_EVEX = 1392 |
| 141126 | CEFBS_None, // CS_PREFIX = 1393 |
| 141127 | CEFBS_In64BitMode, // CTEST16mi = 1394 |
| 141128 | CEFBS_In64BitMode, // CTEST16mr = 1395 |
| 141129 | CEFBS_In64BitMode, // CTEST16ri = 1396 |
| 141130 | CEFBS_In64BitMode, // CTEST16rr = 1397 |
| 141131 | CEFBS_In64BitMode, // CTEST32mi = 1398 |
| 141132 | CEFBS_In64BitMode, // CTEST32mr = 1399 |
| 141133 | CEFBS_In64BitMode, // CTEST32ri = 1400 |
| 141134 | CEFBS_In64BitMode, // CTEST32rr = 1401 |
| 141135 | CEFBS_In64BitMode, // CTEST64mi32 = 1402 |
| 141136 | CEFBS_In64BitMode, // CTEST64mr = 1403 |
| 141137 | CEFBS_In64BitMode, // CTEST64ri32 = 1404 |
| 141138 | CEFBS_In64BitMode, // CTEST64rr = 1405 |
| 141139 | CEFBS_In64BitMode, // CTEST8mi = 1406 |
| 141140 | CEFBS_In64BitMode, // CTEST8mr = 1407 |
| 141141 | CEFBS_In64BitMode, // CTEST8ri = 1408 |
| 141142 | CEFBS_In64BitMode, // CTEST8rr = 1409 |
| 141143 | CEFBS_None, // CVTDQ2PDrm = 1410 |
| 141144 | CEFBS_None, // CVTDQ2PDrr = 1411 |
| 141145 | CEFBS_None, // CVTDQ2PSrm = 1412 |
| 141146 | CEFBS_None, // CVTDQ2PSrr = 1413 |
| 141147 | CEFBS_None, // CVTPD2DQrm = 1414 |
| 141148 | CEFBS_None, // CVTPD2DQrr = 1415 |
| 141149 | CEFBS_None, // CVTPD2PSrm = 1416 |
| 141150 | CEFBS_None, // CVTPD2PSrr = 1417 |
| 141151 | CEFBS_None, // CVTPS2DQrm = 1418 |
| 141152 | CEFBS_None, // CVTPS2DQrr = 1419 |
| 141153 | CEFBS_None, // CVTPS2PDrm = 1420 |
| 141154 | CEFBS_None, // CVTPS2PDrr = 1421 |
| 141155 | CEFBS_None, // CVTSD2SI64rm = 1422 |
| 141156 | CEFBS_None, // CVTSD2SI64rm_Int = 1423 |
| 141157 | CEFBS_None, // CVTSD2SI64rr = 1424 |
| 141158 | CEFBS_None, // CVTSD2SI64rr_Int = 1425 |
| 141159 | CEFBS_None, // CVTSD2SIrm = 1426 |
| 141160 | CEFBS_None, // CVTSD2SIrm_Int = 1427 |
| 141161 | CEFBS_None, // CVTSD2SIrr = 1428 |
| 141162 | CEFBS_None, // CVTSD2SIrr_Int = 1429 |
| 141163 | CEFBS_None, // CVTSD2SSrm = 1430 |
| 141164 | CEFBS_None, // CVTSD2SSrm_Int = 1431 |
| 141165 | CEFBS_None, // CVTSD2SSrr = 1432 |
| 141166 | CEFBS_None, // CVTSD2SSrr_Int = 1433 |
| 141167 | CEFBS_None, // CVTSI2SDrm = 1434 |
| 141168 | CEFBS_None, // CVTSI2SDrm_Int = 1435 |
| 141169 | CEFBS_None, // CVTSI2SDrr = 1436 |
| 141170 | CEFBS_None, // CVTSI2SDrr_Int = 1437 |
| 141171 | CEFBS_None, // CVTSI2SSrm = 1438 |
| 141172 | CEFBS_None, // CVTSI2SSrm_Int = 1439 |
| 141173 | CEFBS_None, // CVTSI2SSrr = 1440 |
| 141174 | CEFBS_None, // CVTSI2SSrr_Int = 1441 |
| 141175 | CEFBS_None, // CVTSI642SDrm = 1442 |
| 141176 | CEFBS_None, // CVTSI642SDrm_Int = 1443 |
| 141177 | CEFBS_None, // CVTSI642SDrr = 1444 |
| 141178 | CEFBS_None, // CVTSI642SDrr_Int = 1445 |
| 141179 | CEFBS_None, // CVTSI642SSrm = 1446 |
| 141180 | CEFBS_None, // CVTSI642SSrm_Int = 1447 |
| 141181 | CEFBS_None, // CVTSI642SSrr = 1448 |
| 141182 | CEFBS_None, // CVTSI642SSrr_Int = 1449 |
| 141183 | CEFBS_None, // CVTSS2SDrm = 1450 |
| 141184 | CEFBS_None, // CVTSS2SDrm_Int = 1451 |
| 141185 | CEFBS_None, // CVTSS2SDrr = 1452 |
| 141186 | CEFBS_None, // CVTSS2SDrr_Int = 1453 |
| 141187 | CEFBS_None, // CVTSS2SI64rm = 1454 |
| 141188 | CEFBS_None, // CVTSS2SI64rm_Int = 1455 |
| 141189 | CEFBS_None, // CVTSS2SI64rr = 1456 |
| 141190 | CEFBS_None, // CVTSS2SI64rr_Int = 1457 |
| 141191 | CEFBS_None, // CVTSS2SIrm = 1458 |
| 141192 | CEFBS_None, // CVTSS2SIrm_Int = 1459 |
| 141193 | CEFBS_None, // CVTSS2SIrr = 1460 |
| 141194 | CEFBS_None, // CVTSS2SIrr_Int = 1461 |
| 141195 | CEFBS_None, // CVTTPD2DQrm = 1462 |
| 141196 | CEFBS_None, // CVTTPD2DQrr = 1463 |
| 141197 | CEFBS_None, // CVTTPS2DQrm = 1464 |
| 141198 | CEFBS_None, // CVTTPS2DQrr = 1465 |
| 141199 | CEFBS_None, // CVTTSD2SI64rm = 1466 |
| 141200 | CEFBS_None, // CVTTSD2SI64rm_Int = 1467 |
| 141201 | CEFBS_None, // CVTTSD2SI64rr = 1468 |
| 141202 | CEFBS_None, // CVTTSD2SI64rr_Int = 1469 |
| 141203 | CEFBS_None, // CVTTSD2SIrm = 1470 |
| 141204 | CEFBS_None, // CVTTSD2SIrm_Int = 1471 |
| 141205 | CEFBS_None, // CVTTSD2SIrr = 1472 |
| 141206 | CEFBS_None, // CVTTSD2SIrr_Int = 1473 |
| 141207 | CEFBS_None, // CVTTSS2SI64rm = 1474 |
| 141208 | CEFBS_None, // CVTTSS2SI64rm_Int = 1475 |
| 141209 | CEFBS_None, // CVTTSS2SI64rr = 1476 |
| 141210 | CEFBS_None, // CVTTSS2SI64rr_Int = 1477 |
| 141211 | CEFBS_None, // CVTTSS2SIrm = 1478 |
| 141212 | CEFBS_None, // CVTTSS2SIrm_Int = 1479 |
| 141213 | CEFBS_None, // CVTTSS2SIrr = 1480 |
| 141214 | CEFBS_None, // CVTTSS2SIrr_Int = 1481 |
| 141215 | CEFBS_None, // CWD = 1482 |
| 141216 | CEFBS_None, // CWDE = 1483 |
| 141217 | CEFBS_Not64BitMode, // DAA = 1484 |
| 141218 | CEFBS_Not64BitMode, // DAS = 1485 |
| 141219 | CEFBS_None, // DATA16_PREFIX = 1486 |
| 141220 | CEFBS_None, // DEC16m = 1487 |
| 141221 | CEFBS_In64BitMode, // DEC16m_EVEX = 1488 |
| 141222 | CEFBS_In64BitMode, // DEC16m_ND = 1489 |
| 141223 | CEFBS_In64BitMode, // DEC16m_NF = 1490 |
| 141224 | CEFBS_In64BitMode, // DEC16m_NF_ND = 1491 |
| 141225 | CEFBS_None, // DEC16r = 1492 |
| 141226 | CEFBS_In64BitMode, // DEC16r_EVEX = 1493 |
| 141227 | CEFBS_In64BitMode, // DEC16r_ND = 1494 |
| 141228 | CEFBS_In64BitMode, // DEC16r_NF = 1495 |
| 141229 | CEFBS_In64BitMode, // DEC16r_NF_ND = 1496 |
| 141230 | CEFBS_Not64BitMode, // DEC16r_alt = 1497 |
| 141231 | CEFBS_None, // DEC32m = 1498 |
| 141232 | CEFBS_In64BitMode, // DEC32m_EVEX = 1499 |
| 141233 | CEFBS_In64BitMode, // DEC32m_ND = 1500 |
| 141234 | CEFBS_In64BitMode, // DEC32m_NF = 1501 |
| 141235 | CEFBS_In64BitMode, // DEC32m_NF_ND = 1502 |
| 141236 | CEFBS_None, // DEC32r = 1503 |
| 141237 | CEFBS_In64BitMode, // DEC32r_EVEX = 1504 |
| 141238 | CEFBS_In64BitMode, // DEC32r_ND = 1505 |
| 141239 | CEFBS_In64BitMode, // DEC32r_NF = 1506 |
| 141240 | CEFBS_In64BitMode, // DEC32r_NF_ND = 1507 |
| 141241 | CEFBS_Not64BitMode, // DEC32r_alt = 1508 |
| 141242 | CEFBS_In64BitMode, // DEC64m = 1509 |
| 141243 | CEFBS_In64BitMode, // DEC64m_EVEX = 1510 |
| 141244 | CEFBS_In64BitMode, // DEC64m_ND = 1511 |
| 141245 | CEFBS_In64BitMode, // DEC64m_NF = 1512 |
| 141246 | CEFBS_In64BitMode, // DEC64m_NF_ND = 1513 |
| 141247 | CEFBS_None, // DEC64r = 1514 |
| 141248 | CEFBS_In64BitMode, // DEC64r_EVEX = 1515 |
| 141249 | CEFBS_In64BitMode, // DEC64r_ND = 1516 |
| 141250 | CEFBS_In64BitMode, // DEC64r_NF = 1517 |
| 141251 | CEFBS_In64BitMode, // DEC64r_NF_ND = 1518 |
| 141252 | CEFBS_None, // DEC8m = 1519 |
| 141253 | CEFBS_In64BitMode, // DEC8m_EVEX = 1520 |
| 141254 | CEFBS_In64BitMode, // DEC8m_ND = 1521 |
| 141255 | CEFBS_In64BitMode, // DEC8m_NF = 1522 |
| 141256 | CEFBS_In64BitMode, // DEC8m_NF_ND = 1523 |
| 141257 | CEFBS_None, // DEC8r = 1524 |
| 141258 | CEFBS_In64BitMode, // DEC8r_EVEX = 1525 |
| 141259 | CEFBS_In64BitMode, // DEC8r_ND = 1526 |
| 141260 | CEFBS_In64BitMode, // DEC8r_NF = 1527 |
| 141261 | CEFBS_In64BitMode, // DEC8r_NF_ND = 1528 |
| 141262 | CEFBS_None, // DIV16m = 1529 |
| 141263 | CEFBS_In64BitMode, // DIV16m_EVEX = 1530 |
| 141264 | CEFBS_In64BitMode, // DIV16m_NF = 1531 |
| 141265 | CEFBS_None, // DIV16r = 1532 |
| 141266 | CEFBS_In64BitMode, // DIV16r_EVEX = 1533 |
| 141267 | CEFBS_In64BitMode, // DIV16r_NF = 1534 |
| 141268 | CEFBS_None, // DIV32m = 1535 |
| 141269 | CEFBS_In64BitMode, // DIV32m_EVEX = 1536 |
| 141270 | CEFBS_In64BitMode, // DIV32m_NF = 1537 |
| 141271 | CEFBS_None, // DIV32r = 1538 |
| 141272 | CEFBS_In64BitMode, // DIV32r_EVEX = 1539 |
| 141273 | CEFBS_In64BitMode, // DIV32r_NF = 1540 |
| 141274 | CEFBS_In64BitMode, // DIV64m = 1541 |
| 141275 | CEFBS_In64BitMode, // DIV64m_EVEX = 1542 |
| 141276 | CEFBS_In64BitMode, // DIV64m_NF = 1543 |
| 141277 | CEFBS_None, // DIV64r = 1544 |
| 141278 | CEFBS_In64BitMode, // DIV64r_EVEX = 1545 |
| 141279 | CEFBS_In64BitMode, // DIV64r_NF = 1546 |
| 141280 | CEFBS_None, // DIV8m = 1547 |
| 141281 | CEFBS_In64BitMode, // DIV8m_EVEX = 1548 |
| 141282 | CEFBS_In64BitMode, // DIV8m_NF = 1549 |
| 141283 | CEFBS_None, // DIV8r = 1550 |
| 141284 | CEFBS_In64BitMode, // DIV8r_EVEX = 1551 |
| 141285 | CEFBS_In64BitMode, // DIV8r_NF = 1552 |
| 141286 | CEFBS_None, // DIVPDrm = 1553 |
| 141287 | CEFBS_None, // DIVPDrr = 1554 |
| 141288 | CEFBS_None, // DIVPSrm = 1555 |
| 141289 | CEFBS_None, // DIVPSrr = 1556 |
| 141290 | CEFBS_None, // DIVR_F32m = 1557 |
| 141291 | CEFBS_None, // DIVR_F64m = 1558 |
| 141292 | CEFBS_None, // DIVR_FI16m = 1559 |
| 141293 | CEFBS_None, // DIVR_FI32m = 1560 |
| 141294 | CEFBS_None, // DIVR_FPrST0 = 1561 |
| 141295 | CEFBS_None, // DIVR_FST0r = 1562 |
| 141296 | CEFBS_None, // DIVR_Fp32m = 1563 |
| 141297 | CEFBS_None, // DIVR_Fp64m = 1564 |
| 141298 | CEFBS_None, // DIVR_Fp64m32 = 1565 |
| 141299 | CEFBS_None, // DIVR_Fp80m32 = 1566 |
| 141300 | CEFBS_None, // DIVR_Fp80m64 = 1567 |
| 141301 | CEFBS_None, // DIVR_FpI16m32 = 1568 |
| 141302 | CEFBS_None, // DIVR_FpI16m64 = 1569 |
| 141303 | CEFBS_None, // DIVR_FpI16m80 = 1570 |
| 141304 | CEFBS_None, // DIVR_FpI32m32 = 1571 |
| 141305 | CEFBS_None, // DIVR_FpI32m64 = 1572 |
| 141306 | CEFBS_None, // DIVR_FpI32m80 = 1573 |
| 141307 | CEFBS_None, // DIVR_FrST0 = 1574 |
| 141308 | CEFBS_None, // DIVSDrm = 1575 |
| 141309 | CEFBS_None, // DIVSDrm_Int = 1576 |
| 141310 | CEFBS_None, // DIVSDrr = 1577 |
| 141311 | CEFBS_None, // DIVSDrr_Int = 1578 |
| 141312 | CEFBS_None, // DIVSSrm = 1579 |
| 141313 | CEFBS_None, // DIVSSrm_Int = 1580 |
| 141314 | CEFBS_None, // DIVSSrr = 1581 |
| 141315 | CEFBS_None, // DIVSSrr_Int = 1582 |
| 141316 | CEFBS_None, // DIV_F32m = 1583 |
| 141317 | CEFBS_None, // DIV_F64m = 1584 |
| 141318 | CEFBS_None, // DIV_FI16m = 1585 |
| 141319 | CEFBS_None, // DIV_FI32m = 1586 |
| 141320 | CEFBS_None, // DIV_FPrST0 = 1587 |
| 141321 | CEFBS_None, // DIV_FST0r = 1588 |
| 141322 | CEFBS_None, // DIV_Fp32 = 1589 |
| 141323 | CEFBS_None, // DIV_Fp32m = 1590 |
| 141324 | CEFBS_None, // DIV_Fp64 = 1591 |
| 141325 | CEFBS_None, // DIV_Fp64m = 1592 |
| 141326 | CEFBS_None, // DIV_Fp64m32 = 1593 |
| 141327 | CEFBS_None, // DIV_Fp80 = 1594 |
| 141328 | CEFBS_None, // DIV_Fp80m32 = 1595 |
| 141329 | CEFBS_None, // DIV_Fp80m64 = 1596 |
| 141330 | CEFBS_None, // DIV_FpI16m32 = 1597 |
| 141331 | CEFBS_None, // DIV_FpI16m64 = 1598 |
| 141332 | CEFBS_None, // DIV_FpI16m80 = 1599 |
| 141333 | CEFBS_None, // DIV_FpI32m32 = 1600 |
| 141334 | CEFBS_None, // DIV_FpI32m64 = 1601 |
| 141335 | CEFBS_None, // DIV_FpI32m80 = 1602 |
| 141336 | CEFBS_None, // DIV_FrST0 = 1603 |
| 141337 | CEFBS_None, // DPPDrmi = 1604 |
| 141338 | CEFBS_None, // DPPDrri = 1605 |
| 141339 | CEFBS_None, // DPPSrmi = 1606 |
| 141340 | CEFBS_None, // DPPSrri = 1607 |
| 141341 | CEFBS_None, // DS_PREFIX = 1608 |
| 141342 | CEFBS_None, // DYN_ALLOCA_32 = 1609 |
| 141343 | CEFBS_In64BitMode, // DYN_ALLOCA_64 = 1610 |
| 141344 | CEFBS_None, // EH_RETURN = 1611 |
| 141345 | CEFBS_None, // EH_RETURN64 = 1612 |
| 141346 | CEFBS_Not64BitMode, // EH_SjLj_LongJmp32 = 1613 |
| 141347 | CEFBS_In64BitMode, // EH_SjLj_LongJmp64 = 1614 |
| 141348 | CEFBS_Not64BitMode, // EH_SjLj_SetJmp32 = 1615 |
| 141349 | CEFBS_In64BitMode, // EH_SjLj_SetJmp64 = 1616 |
| 141350 | CEFBS_None, // EH_SjLj_Setup = 1617 |
| 141351 | CEFBS_None, // ENCLS = 1618 |
| 141352 | CEFBS_None, // ENCLU = 1619 |
| 141353 | CEFBS_None, // ENCLV = 1620 |
| 141354 | CEFBS_None, // ENCODEKEY128 = 1621 |
| 141355 | CEFBS_None, // ENCODEKEY256 = 1622 |
| 141356 | CEFBS_None, // ENDBR32 = 1623 |
| 141357 | CEFBS_None, // ENDBR64 = 1624 |
| 141358 | CEFBS_Not64BitMode, // ENQCMD16 = 1625 |
| 141359 | CEFBS_None, // ENQCMD32 = 1626 |
| 141360 | CEFBS_In64BitMode, // ENQCMD32_EVEX = 1627 |
| 141361 | CEFBS_None, // ENQCMD64 = 1628 |
| 141362 | CEFBS_In64BitMode, // ENQCMD64_EVEX = 1629 |
| 141363 | CEFBS_Not64BitMode, // ENQCMDS16 = 1630 |
| 141364 | CEFBS_None, // ENQCMDS32 = 1631 |
| 141365 | CEFBS_In64BitMode, // ENQCMDS32_EVEX = 1632 |
| 141366 | CEFBS_None, // ENQCMDS64 = 1633 |
| 141367 | CEFBS_In64BitMode, // ENQCMDS64_EVEX = 1634 |
| 141368 | CEFBS_None, // ENTER = 1635 |
| 141369 | CEFBS_In64BitMode, // ERETS = 1636 |
| 141370 | CEFBS_In64BitMode, // ERETU = 1637 |
| 141371 | CEFBS_None, // ES_PREFIX = 1638 |
| 141372 | CEFBS_None, // EXTRACTPSmri = 1639 |
| 141373 | CEFBS_None, // EXTRACTPSrri = 1640 |
| 141374 | CEFBS_None, // EXTRQ = 1641 |
| 141375 | CEFBS_None, // EXTRQI = 1642 |
| 141376 | CEFBS_None, // F2XM1 = 1643 |
| 141377 | CEFBS_Not64BitMode, // FARCALL16i = 1644 |
| 141378 | CEFBS_None, // FARCALL16m = 1645 |
| 141379 | CEFBS_Not64BitMode, // FARCALL32i = 1646 |
| 141380 | CEFBS_None, // FARCALL32m = 1647 |
| 141381 | CEFBS_None, // FARCALL64m = 1648 |
| 141382 | CEFBS_Not64BitMode, // FARJMP16i = 1649 |
| 141383 | CEFBS_None, // FARJMP16m = 1650 |
| 141384 | CEFBS_Not64BitMode, // FARJMP32i = 1651 |
| 141385 | CEFBS_None, // FARJMP32m = 1652 |
| 141386 | CEFBS_In64BitMode, // FARJMP64m = 1653 |
| 141387 | CEFBS_None, // FBLDm = 1654 |
| 141388 | CEFBS_None, // FBSTPm = 1655 |
| 141389 | CEFBS_None, // FCOM32m = 1656 |
| 141390 | CEFBS_None, // FCOM64m = 1657 |
| 141391 | CEFBS_None, // FCOMP32m = 1658 |
| 141392 | CEFBS_None, // FCOMP64m = 1659 |
| 141393 | CEFBS_None, // FCOMPP = 1660 |
| 141394 | CEFBS_None, // FCOS = 1661 |
| 141395 | CEFBS_None, // FDECSTP = 1662 |
| 141396 | CEFBS_None, // FEMMS = 1663 |
| 141397 | CEFBS_None, // FFREE = 1664 |
| 141398 | CEFBS_None, // FFREEP = 1665 |
| 141399 | CEFBS_None, // FICOM16m = 1666 |
| 141400 | CEFBS_None, // FICOM32m = 1667 |
| 141401 | CEFBS_None, // FICOMP16m = 1668 |
| 141402 | CEFBS_None, // FICOMP32m = 1669 |
| 141403 | CEFBS_None, // FINCSTP = 1670 |
| 141404 | CEFBS_None, // FLDCW16m = 1671 |
| 141405 | CEFBS_None, // FLDENVm = 1672 |
| 141406 | CEFBS_None, // FLDL2E = 1673 |
| 141407 | CEFBS_None, // FLDL2T = 1674 |
| 141408 | CEFBS_None, // FLDLG2 = 1675 |
| 141409 | CEFBS_None, // FLDLN2 = 1676 |
| 141410 | CEFBS_None, // FLDPI = 1677 |
| 141411 | CEFBS_None, // FNCLEX = 1678 |
| 141412 | CEFBS_None, // FNINIT = 1679 |
| 141413 | CEFBS_None, // FNOP = 1680 |
| 141414 | CEFBS_None, // FNSTCW16m = 1681 |
| 141415 | CEFBS_None, // FNSTSW16r = 1682 |
| 141416 | CEFBS_None, // FNSTSWm = 1683 |
| 141417 | CEFBS_None, // FP32_TO_INT16_IN_MEM = 1684 |
| 141418 | CEFBS_None, // FP32_TO_INT32_IN_MEM = 1685 |
| 141419 | CEFBS_None, // FP32_TO_INT64_IN_MEM = 1686 |
| 141420 | CEFBS_None, // FP64_TO_INT16_IN_MEM = 1687 |
| 141421 | CEFBS_None, // FP64_TO_INT32_IN_MEM = 1688 |
| 141422 | CEFBS_None, // FP64_TO_INT64_IN_MEM = 1689 |
| 141423 | CEFBS_None, // FP80_ADDm32 = 1690 |
| 141424 | CEFBS_None, // FP80_ADDr = 1691 |
| 141425 | CEFBS_None, // FP80_TO_INT16_IN_MEM = 1692 |
| 141426 | CEFBS_None, // FP80_TO_INT32_IN_MEM = 1693 |
| 141427 | CEFBS_None, // FP80_TO_INT64_IN_MEM = 1694 |
| 141428 | CEFBS_None, // FPATAN = 1695 |
| 141429 | CEFBS_None, // FPREM = 1696 |
| 141430 | CEFBS_None, // FPREM1 = 1697 |
| 141431 | CEFBS_None, // FPTAN = 1698 |
| 141432 | CEFBS_None, // FRNDINT = 1699 |
| 141433 | CEFBS_None, // FRSTORm = 1700 |
| 141434 | CEFBS_None, // FSAVEm = 1701 |
| 141435 | CEFBS_None, // FSCALE = 1702 |
| 141436 | CEFBS_None, // FSIN = 1703 |
| 141437 | CEFBS_None, // FSINCOS = 1704 |
| 141438 | CEFBS_None, // FSTENVm = 1705 |
| 141439 | CEFBS_None, // FS_PREFIX = 1706 |
| 141440 | CEFBS_None, // FXRSTOR = 1707 |
| 141441 | CEFBS_In64BitMode, // FXRSTOR64 = 1708 |
| 141442 | CEFBS_None, // FXSAVE = 1709 |
| 141443 | CEFBS_In64BitMode, // FXSAVE64 = 1710 |
| 141444 | CEFBS_None, // FXTRACT = 1711 |
| 141445 | CEFBS_None, // FYL2X = 1712 |
| 141446 | CEFBS_None, // FYL2XP1 = 1713 |
| 141447 | CEFBS_None, // GETSEC = 1714 |
| 141448 | CEFBS_None, // GF2P8AFFINEINVQBrmi = 1715 |
| 141449 | CEFBS_None, // GF2P8AFFINEINVQBrri = 1716 |
| 141450 | CEFBS_None, // GF2P8AFFINEQBrmi = 1717 |
| 141451 | CEFBS_None, // GF2P8AFFINEQBrri = 1718 |
| 141452 | CEFBS_None, // GF2P8MULBrm = 1719 |
| 141453 | CEFBS_None, // GF2P8MULBrr = 1720 |
| 141454 | CEFBS_None, // GS_PREFIX = 1721 |
| 141455 | CEFBS_None, // HADDPDrm = 1722 |
| 141456 | CEFBS_None, // HADDPDrr = 1723 |
| 141457 | CEFBS_None, // HADDPSrm = 1724 |
| 141458 | CEFBS_None, // HADDPSrr = 1725 |
| 141459 | CEFBS_None, // HLT = 1726 |
| 141460 | CEFBS_None, // HRESET = 1727 |
| 141461 | CEFBS_None, // HSUBPDrm = 1728 |
| 141462 | CEFBS_None, // HSUBPDrr = 1729 |
| 141463 | CEFBS_None, // HSUBPSrm = 1730 |
| 141464 | CEFBS_None, // HSUBPSrr = 1731 |
| 141465 | CEFBS_None, // IDIV16m = 1732 |
| 141466 | CEFBS_In64BitMode, // IDIV16m_EVEX = 1733 |
| 141467 | CEFBS_In64BitMode, // IDIV16m_NF = 1734 |
| 141468 | CEFBS_None, // IDIV16r = 1735 |
| 141469 | CEFBS_In64BitMode, // IDIV16r_EVEX = 1736 |
| 141470 | CEFBS_In64BitMode, // IDIV16r_NF = 1737 |
| 141471 | CEFBS_None, // IDIV32m = 1738 |
| 141472 | CEFBS_In64BitMode, // IDIV32m_EVEX = 1739 |
| 141473 | CEFBS_In64BitMode, // IDIV32m_NF = 1740 |
| 141474 | CEFBS_None, // IDIV32r = 1741 |
| 141475 | CEFBS_In64BitMode, // IDIV32r_EVEX = 1742 |
| 141476 | CEFBS_In64BitMode, // IDIV32r_NF = 1743 |
| 141477 | CEFBS_In64BitMode, // IDIV64m = 1744 |
| 141478 | CEFBS_In64BitMode, // IDIV64m_EVEX = 1745 |
| 141479 | CEFBS_In64BitMode, // IDIV64m_NF = 1746 |
| 141480 | CEFBS_None, // IDIV64r = 1747 |
| 141481 | CEFBS_In64BitMode, // IDIV64r_EVEX = 1748 |
| 141482 | CEFBS_In64BitMode, // IDIV64r_NF = 1749 |
| 141483 | CEFBS_None, // IDIV8m = 1750 |
| 141484 | CEFBS_In64BitMode, // IDIV8m_EVEX = 1751 |
| 141485 | CEFBS_In64BitMode, // IDIV8m_NF = 1752 |
| 141486 | CEFBS_None, // IDIV8r = 1753 |
| 141487 | CEFBS_In64BitMode, // IDIV8r_EVEX = 1754 |
| 141488 | CEFBS_In64BitMode, // IDIV8r_NF = 1755 |
| 141489 | CEFBS_None, // ILD_F16m = 1756 |
| 141490 | CEFBS_None, // ILD_F32m = 1757 |
| 141491 | CEFBS_None, // ILD_F64m = 1758 |
| 141492 | CEFBS_None, // ILD_Fp16m32 = 1759 |
| 141493 | CEFBS_None, // ILD_Fp16m64 = 1760 |
| 141494 | CEFBS_None, // ILD_Fp16m80 = 1761 |
| 141495 | CEFBS_None, // ILD_Fp32m32 = 1762 |
| 141496 | CEFBS_None, // ILD_Fp32m64 = 1763 |
| 141497 | CEFBS_None, // ILD_Fp32m80 = 1764 |
| 141498 | CEFBS_None, // ILD_Fp64m32 = 1765 |
| 141499 | CEFBS_None, // ILD_Fp64m64 = 1766 |
| 141500 | CEFBS_None, // ILD_Fp64m80 = 1767 |
| 141501 | CEFBS_None, // IMUL16m = 1768 |
| 141502 | CEFBS_In64BitMode, // IMUL16m_EVEX = 1769 |
| 141503 | CEFBS_In64BitMode, // IMUL16m_NF = 1770 |
| 141504 | CEFBS_None, // IMUL16r = 1771 |
| 141505 | CEFBS_In64BitMode, // IMUL16r_EVEX = 1772 |
| 141506 | CEFBS_In64BitMode, // IMUL16r_NF = 1773 |
| 141507 | CEFBS_None, // IMUL16rm = 1774 |
| 141508 | CEFBS_In64BitMode, // IMUL16rm_EVEX = 1775 |
| 141509 | CEFBS_In64BitMode, // IMUL16rm_ND = 1776 |
| 141510 | CEFBS_In64BitMode, // IMUL16rm_NF = 1777 |
| 141511 | CEFBS_In64BitMode, // IMUL16rm_NF_ND = 1778 |
| 141512 | CEFBS_None, // IMUL16rmi = 1779 |
| 141513 | CEFBS_None, // IMUL16rmi8 = 1780 |
| 141514 | CEFBS_In64BitMode, // IMUL16rmi8_EVEX = 1781 |
| 141515 | CEFBS_In64BitMode, // IMUL16rmi8_NF = 1782 |
| 141516 | CEFBS_In64BitMode, // IMUL16rmi_EVEX = 1783 |
| 141517 | CEFBS_In64BitMode, // IMUL16rmi_NF = 1784 |
| 141518 | CEFBS_None, // IMUL16rr = 1785 |
| 141519 | CEFBS_In64BitMode, // IMUL16rr_EVEX = 1786 |
| 141520 | CEFBS_In64BitMode, // IMUL16rr_ND = 1787 |
| 141521 | CEFBS_In64BitMode, // IMUL16rr_NF = 1788 |
| 141522 | CEFBS_In64BitMode, // IMUL16rr_NF_ND = 1789 |
| 141523 | CEFBS_None, // IMUL16rri = 1790 |
| 141524 | CEFBS_None, // IMUL16rri8 = 1791 |
| 141525 | CEFBS_In64BitMode, // IMUL16rri8_EVEX = 1792 |
| 141526 | CEFBS_In64BitMode, // IMUL16rri8_NF = 1793 |
| 141527 | CEFBS_In64BitMode, // IMUL16rri_EVEX = 1794 |
| 141528 | CEFBS_In64BitMode, // IMUL16rri_NF = 1795 |
| 141529 | CEFBS_None, // IMUL32m = 1796 |
| 141530 | CEFBS_In64BitMode, // IMUL32m_EVEX = 1797 |
| 141531 | CEFBS_In64BitMode, // IMUL32m_NF = 1798 |
| 141532 | CEFBS_None, // IMUL32r = 1799 |
| 141533 | CEFBS_In64BitMode, // IMUL32r_EVEX = 1800 |
| 141534 | CEFBS_In64BitMode, // IMUL32r_NF = 1801 |
| 141535 | CEFBS_None, // IMUL32rm = 1802 |
| 141536 | CEFBS_In64BitMode, // IMUL32rm_EVEX = 1803 |
| 141537 | CEFBS_In64BitMode, // IMUL32rm_ND = 1804 |
| 141538 | CEFBS_In64BitMode, // IMUL32rm_NF = 1805 |
| 141539 | CEFBS_In64BitMode, // IMUL32rm_NF_ND = 1806 |
| 141540 | CEFBS_None, // IMUL32rmi = 1807 |
| 141541 | CEFBS_None, // IMUL32rmi8 = 1808 |
| 141542 | CEFBS_In64BitMode, // IMUL32rmi8_EVEX = 1809 |
| 141543 | CEFBS_In64BitMode, // IMUL32rmi8_NF = 1810 |
| 141544 | CEFBS_In64BitMode, // IMUL32rmi_EVEX = 1811 |
| 141545 | CEFBS_In64BitMode, // IMUL32rmi_NF = 1812 |
| 141546 | CEFBS_None, // IMUL32rr = 1813 |
| 141547 | CEFBS_In64BitMode, // IMUL32rr_EVEX = 1814 |
| 141548 | CEFBS_In64BitMode, // IMUL32rr_ND = 1815 |
| 141549 | CEFBS_In64BitMode, // IMUL32rr_NF = 1816 |
| 141550 | CEFBS_In64BitMode, // IMUL32rr_NF_ND = 1817 |
| 141551 | CEFBS_None, // IMUL32rri = 1818 |
| 141552 | CEFBS_None, // IMUL32rri8 = 1819 |
| 141553 | CEFBS_In64BitMode, // IMUL32rri8_EVEX = 1820 |
| 141554 | CEFBS_In64BitMode, // IMUL32rri8_NF = 1821 |
| 141555 | CEFBS_In64BitMode, // IMUL32rri_EVEX = 1822 |
| 141556 | CEFBS_In64BitMode, // IMUL32rri_NF = 1823 |
| 141557 | CEFBS_In64BitMode, // IMUL64m = 1824 |
| 141558 | CEFBS_In64BitMode, // IMUL64m_EVEX = 1825 |
| 141559 | CEFBS_In64BitMode, // IMUL64m_NF = 1826 |
| 141560 | CEFBS_None, // IMUL64r = 1827 |
| 141561 | CEFBS_In64BitMode, // IMUL64r_EVEX = 1828 |
| 141562 | CEFBS_In64BitMode, // IMUL64r_NF = 1829 |
| 141563 | CEFBS_None, // IMUL64rm = 1830 |
| 141564 | CEFBS_In64BitMode, // IMUL64rm_EVEX = 1831 |
| 141565 | CEFBS_In64BitMode, // IMUL64rm_ND = 1832 |
| 141566 | CEFBS_In64BitMode, // IMUL64rm_NF = 1833 |
| 141567 | CEFBS_In64BitMode, // IMUL64rm_NF_ND = 1834 |
| 141568 | CEFBS_None, // IMUL64rmi32 = 1835 |
| 141569 | CEFBS_In64BitMode, // IMUL64rmi32_EVEX = 1836 |
| 141570 | CEFBS_In64BitMode, // IMUL64rmi32_NF = 1837 |
| 141571 | CEFBS_None, // IMUL64rmi8 = 1838 |
| 141572 | CEFBS_In64BitMode, // IMUL64rmi8_EVEX = 1839 |
| 141573 | CEFBS_In64BitMode, // IMUL64rmi8_NF = 1840 |
| 141574 | CEFBS_None, // IMUL64rr = 1841 |
| 141575 | CEFBS_In64BitMode, // IMUL64rr_EVEX = 1842 |
| 141576 | CEFBS_In64BitMode, // IMUL64rr_ND = 1843 |
| 141577 | CEFBS_In64BitMode, // IMUL64rr_NF = 1844 |
| 141578 | CEFBS_In64BitMode, // IMUL64rr_NF_ND = 1845 |
| 141579 | CEFBS_None, // IMUL64rri32 = 1846 |
| 141580 | CEFBS_In64BitMode, // IMUL64rri32_EVEX = 1847 |
| 141581 | CEFBS_In64BitMode, // IMUL64rri32_NF = 1848 |
| 141582 | CEFBS_None, // IMUL64rri8 = 1849 |
| 141583 | CEFBS_In64BitMode, // IMUL64rri8_EVEX = 1850 |
| 141584 | CEFBS_In64BitMode, // IMUL64rri8_NF = 1851 |
| 141585 | CEFBS_None, // IMUL8m = 1852 |
| 141586 | CEFBS_In64BitMode, // IMUL8m_EVEX = 1853 |
| 141587 | CEFBS_In64BitMode, // IMUL8m_NF = 1854 |
| 141588 | CEFBS_None, // IMUL8r = 1855 |
| 141589 | CEFBS_In64BitMode, // IMUL8r_EVEX = 1856 |
| 141590 | CEFBS_In64BitMode, // IMUL8r_NF = 1857 |
| 141591 | CEFBS_In64BitMode, // IMULZU16rmi = 1858 |
| 141592 | CEFBS_In64BitMode, // IMULZU16rmi8 = 1859 |
| 141593 | CEFBS_In64BitMode, // IMULZU16rri = 1860 |
| 141594 | CEFBS_In64BitMode, // IMULZU16rri8 = 1861 |
| 141595 | CEFBS_In64BitMode, // IMULZU32rmi = 1862 |
| 141596 | CEFBS_In64BitMode, // IMULZU32rmi8 = 1863 |
| 141597 | CEFBS_In64BitMode, // IMULZU32rri = 1864 |
| 141598 | CEFBS_In64BitMode, // IMULZU32rri8 = 1865 |
| 141599 | CEFBS_In64BitMode, // IMULZU64rmi32 = 1866 |
| 141600 | CEFBS_In64BitMode, // IMULZU64rmi8 = 1867 |
| 141601 | CEFBS_In64BitMode, // IMULZU64rri32 = 1868 |
| 141602 | CEFBS_In64BitMode, // IMULZU64rri8 = 1869 |
| 141603 | CEFBS_None, // IN16ri = 1870 |
| 141604 | CEFBS_None, // IN16rr = 1871 |
| 141605 | CEFBS_None, // IN32ri = 1872 |
| 141606 | CEFBS_None, // IN32rr = 1873 |
| 141607 | CEFBS_None, // IN8ri = 1874 |
| 141608 | CEFBS_None, // IN8rr = 1875 |
| 141609 | CEFBS_None, // INC16m = 1876 |
| 141610 | CEFBS_In64BitMode, // INC16m_EVEX = 1877 |
| 141611 | CEFBS_In64BitMode, // INC16m_ND = 1878 |
| 141612 | CEFBS_In64BitMode, // INC16m_NF = 1879 |
| 141613 | CEFBS_In64BitMode, // INC16m_NF_ND = 1880 |
| 141614 | CEFBS_None, // INC16r = 1881 |
| 141615 | CEFBS_In64BitMode, // INC16r_EVEX = 1882 |
| 141616 | CEFBS_In64BitMode, // INC16r_ND = 1883 |
| 141617 | CEFBS_In64BitMode, // INC16r_NF = 1884 |
| 141618 | CEFBS_In64BitMode, // INC16r_NF_ND = 1885 |
| 141619 | CEFBS_Not64BitMode, // INC16r_alt = 1886 |
| 141620 | CEFBS_None, // INC32m = 1887 |
| 141621 | CEFBS_In64BitMode, // INC32m_EVEX = 1888 |
| 141622 | CEFBS_In64BitMode, // INC32m_ND = 1889 |
| 141623 | CEFBS_In64BitMode, // INC32m_NF = 1890 |
| 141624 | CEFBS_In64BitMode, // INC32m_NF_ND = 1891 |
| 141625 | CEFBS_None, // INC32r = 1892 |
| 141626 | CEFBS_In64BitMode, // INC32r_EVEX = 1893 |
| 141627 | CEFBS_In64BitMode, // INC32r_ND = 1894 |
| 141628 | CEFBS_In64BitMode, // INC32r_NF = 1895 |
| 141629 | CEFBS_In64BitMode, // INC32r_NF_ND = 1896 |
| 141630 | CEFBS_Not64BitMode, // INC32r_alt = 1897 |
| 141631 | CEFBS_In64BitMode, // INC64m = 1898 |
| 141632 | CEFBS_In64BitMode, // INC64m_EVEX = 1899 |
| 141633 | CEFBS_In64BitMode, // INC64m_ND = 1900 |
| 141634 | CEFBS_In64BitMode, // INC64m_NF = 1901 |
| 141635 | CEFBS_In64BitMode, // INC64m_NF_ND = 1902 |
| 141636 | CEFBS_None, // INC64r = 1903 |
| 141637 | CEFBS_In64BitMode, // INC64r_EVEX = 1904 |
| 141638 | CEFBS_In64BitMode, // INC64r_ND = 1905 |
| 141639 | CEFBS_In64BitMode, // INC64r_NF = 1906 |
| 141640 | CEFBS_In64BitMode, // INC64r_NF_ND = 1907 |
| 141641 | CEFBS_None, // INC8m = 1908 |
| 141642 | CEFBS_In64BitMode, // INC8m_EVEX = 1909 |
| 141643 | CEFBS_In64BitMode, // INC8m_ND = 1910 |
| 141644 | CEFBS_In64BitMode, // INC8m_NF = 1911 |
| 141645 | CEFBS_In64BitMode, // INC8m_NF_ND = 1912 |
| 141646 | CEFBS_None, // INC8r = 1913 |
| 141647 | CEFBS_In64BitMode, // INC8r_EVEX = 1914 |
| 141648 | CEFBS_In64BitMode, // INC8r_ND = 1915 |
| 141649 | CEFBS_In64BitMode, // INC8r_NF = 1916 |
| 141650 | CEFBS_In64BitMode, // INC8r_NF_ND = 1917 |
| 141651 | CEFBS_None, // INCSSPD = 1918 |
| 141652 | CEFBS_None, // INCSSPQ = 1919 |
| 141653 | CEFBS_None, // INSB = 1920 |
| 141654 | CEFBS_None, // INSERTPSrmi = 1921 |
| 141655 | CEFBS_None, // INSERTPSrri = 1922 |
| 141656 | CEFBS_None, // INSERTQ = 1923 |
| 141657 | CEFBS_None, // INSERTQI = 1924 |
| 141658 | CEFBS_None, // INSL = 1925 |
| 141659 | CEFBS_None, // INSW = 1926 |
| 141660 | CEFBS_None, // INT = 1927 |
| 141661 | CEFBS_None, // INT3 = 1928 |
| 141662 | CEFBS_Not64BitMode, // INTO = 1929 |
| 141663 | CEFBS_None, // INVD = 1930 |
| 141664 | CEFBS_Not64BitMode, // INVEPT32 = 1931 |
| 141665 | CEFBS_In64BitMode, // INVEPT64 = 1932 |
| 141666 | CEFBS_In64BitMode, // INVEPT64_EVEX = 1933 |
| 141667 | CEFBS_None, // INVLPG = 1934 |
| 141668 | CEFBS_Not64BitMode, // INVLPGA32 = 1935 |
| 141669 | CEFBS_In64BitMode, // INVLPGA64 = 1936 |
| 141670 | CEFBS_Not64BitMode, // INVLPGB32 = 1937 |
| 141671 | CEFBS_In64BitMode, // INVLPGB64 = 1938 |
| 141672 | CEFBS_Not64BitMode, // INVPCID32 = 1939 |
| 141673 | CEFBS_In64BitMode, // INVPCID64 = 1940 |
| 141674 | CEFBS_In64BitMode, // INVPCID64_EVEX = 1941 |
| 141675 | CEFBS_Not64BitMode, // INVVPID32 = 1942 |
| 141676 | CEFBS_In64BitMode, // INVVPID64 = 1943 |
| 141677 | CEFBS_In64BitMode, // INVVPID64_EVEX = 1944 |
| 141678 | CEFBS_None, // IRET = 1945 |
| 141679 | CEFBS_None, // IRET16 = 1946 |
| 141680 | CEFBS_None, // IRET32 = 1947 |
| 141681 | CEFBS_In64BitMode, // IRET64 = 1948 |
| 141682 | CEFBS_None, // ISTT_FP16m = 1949 |
| 141683 | CEFBS_None, // ISTT_FP32m = 1950 |
| 141684 | CEFBS_None, // ISTT_FP64m = 1951 |
| 141685 | CEFBS_None, // ISTT_Fp16m32 = 1952 |
| 141686 | CEFBS_None, // ISTT_Fp16m64 = 1953 |
| 141687 | CEFBS_None, // ISTT_Fp16m80 = 1954 |
| 141688 | CEFBS_None, // ISTT_Fp32m32 = 1955 |
| 141689 | CEFBS_None, // ISTT_Fp32m64 = 1956 |
| 141690 | CEFBS_None, // ISTT_Fp32m80 = 1957 |
| 141691 | CEFBS_None, // ISTT_Fp64m32 = 1958 |
| 141692 | CEFBS_None, // ISTT_Fp64m64 = 1959 |
| 141693 | CEFBS_None, // ISTT_Fp64m80 = 1960 |
| 141694 | CEFBS_None, // IST_F16m = 1961 |
| 141695 | CEFBS_None, // IST_F32m = 1962 |
| 141696 | CEFBS_None, // IST_FP16m = 1963 |
| 141697 | CEFBS_None, // IST_FP32m = 1964 |
| 141698 | CEFBS_None, // IST_FP64m = 1965 |
| 141699 | CEFBS_None, // IST_Fp16m32 = 1966 |
| 141700 | CEFBS_None, // IST_Fp16m64 = 1967 |
| 141701 | CEFBS_None, // IST_Fp16m80 = 1968 |
| 141702 | CEFBS_None, // IST_Fp32m32 = 1969 |
| 141703 | CEFBS_None, // IST_Fp32m64 = 1970 |
| 141704 | CEFBS_None, // IST_Fp32m80 = 1971 |
| 141705 | CEFBS_None, // IST_Fp64m32 = 1972 |
| 141706 | CEFBS_None, // IST_Fp64m64 = 1973 |
| 141707 | CEFBS_None, // IST_Fp64m80 = 1974 |
| 141708 | CEFBS_None, // Int_eh_sjlj_setup_dispatch = 1975 |
| 141709 | CEFBS_None, // JCC_1 = 1976 |
| 141710 | CEFBS_None, // JCC_2 = 1977 |
| 141711 | CEFBS_None, // JCC_4 = 1978 |
| 141712 | CEFBS_Not64BitMode, // JCXZ = 1979 |
| 141713 | CEFBS_None, // JECXZ = 1980 |
| 141714 | CEFBS_Not64BitMode, // JMP16m = 1981 |
| 141715 | CEFBS_Not64BitMode, // JMP16m_NT = 1982 |
| 141716 | CEFBS_Not64BitMode, // JMP16r = 1983 |
| 141717 | CEFBS_Not64BitMode, // JMP16r_NT = 1984 |
| 141718 | CEFBS_Not64BitMode, // JMP32m = 1985 |
| 141719 | CEFBS_Not64BitMode, // JMP32m_NT = 1986 |
| 141720 | CEFBS_Not64BitMode, // JMP32r = 1987 |
| 141721 | CEFBS_Not64BitMode, // JMP32r_NT = 1988 |
| 141722 | CEFBS_In64BitMode, // JMP64m = 1989 |
| 141723 | CEFBS_In64BitMode, // JMP64m_NT = 1990 |
| 141724 | CEFBS_None, // JMP64m_REX = 1991 |
| 141725 | CEFBS_In64BitMode, // JMP64r = 1992 |
| 141726 | CEFBS_In64BitMode, // JMP64r_NT = 1993 |
| 141727 | CEFBS_None, // JMP64r_REX = 1994 |
| 141728 | CEFBS_In64BitMode, // JMPABS64i = 1995 |
| 141729 | CEFBS_None, // JMP_1 = 1996 |
| 141730 | CEFBS_None, // JMP_2 = 1997 |
| 141731 | CEFBS_None, // JMP_4 = 1998 |
| 141732 | CEFBS_In64BitMode, // JRCXZ = 1999 |
| 141733 | CEFBS_None, // KADDBkk = 2000 |
| 141734 | CEFBS_None, // KADDDkk = 2001 |
| 141735 | CEFBS_None, // KADDQkk = 2002 |
| 141736 | CEFBS_None, // KADDWkk = 2003 |
| 141737 | CEFBS_None, // KANDBkk = 2004 |
| 141738 | CEFBS_None, // KANDDkk = 2005 |
| 141739 | CEFBS_None, // KANDNBkk = 2006 |
| 141740 | CEFBS_None, // KANDNDkk = 2007 |
| 141741 | CEFBS_None, // KANDNQkk = 2008 |
| 141742 | CEFBS_None, // KANDNWkk = 2009 |
| 141743 | CEFBS_None, // KANDQkk = 2010 |
| 141744 | CEFBS_None, // KANDWkk = 2011 |
| 141745 | CEFBS_None, // KCFI_CHECK = 2012 |
| 141746 | CEFBS_None, // KMOVBkk = 2013 |
| 141747 | CEFBS_In64BitMode, // KMOVBkk_EVEX = 2014 |
| 141748 | CEFBS_None, // KMOVBkm = 2015 |
| 141749 | CEFBS_In64BitMode, // KMOVBkm_EVEX = 2016 |
| 141750 | CEFBS_None, // KMOVBkr = 2017 |
| 141751 | CEFBS_In64BitMode, // KMOVBkr_EVEX = 2018 |
| 141752 | CEFBS_None, // KMOVBmk = 2019 |
| 141753 | CEFBS_In64BitMode, // KMOVBmk_EVEX = 2020 |
| 141754 | CEFBS_None, // KMOVBrk = 2021 |
| 141755 | CEFBS_In64BitMode, // KMOVBrk_EVEX = 2022 |
| 141756 | CEFBS_None, // KMOVDkk = 2023 |
| 141757 | CEFBS_In64BitMode, // KMOVDkk_EVEX = 2024 |
| 141758 | CEFBS_None, // KMOVDkm = 2025 |
| 141759 | CEFBS_In64BitMode, // KMOVDkm_EVEX = 2026 |
| 141760 | CEFBS_None, // KMOVDkr = 2027 |
| 141761 | CEFBS_In64BitMode, // KMOVDkr_EVEX = 2028 |
| 141762 | CEFBS_None, // KMOVDmk = 2029 |
| 141763 | CEFBS_In64BitMode, // KMOVDmk_EVEX = 2030 |
| 141764 | CEFBS_None, // KMOVDrk = 2031 |
| 141765 | CEFBS_In64BitMode, // KMOVDrk_EVEX = 2032 |
| 141766 | CEFBS_None, // KMOVQkk = 2033 |
| 141767 | CEFBS_In64BitMode, // KMOVQkk_EVEX = 2034 |
| 141768 | CEFBS_None, // KMOVQkm = 2035 |
| 141769 | CEFBS_In64BitMode, // KMOVQkm_EVEX = 2036 |
| 141770 | CEFBS_None, // KMOVQkr = 2037 |
| 141771 | CEFBS_In64BitMode, // KMOVQkr_EVEX = 2038 |
| 141772 | CEFBS_None, // KMOVQmk = 2039 |
| 141773 | CEFBS_In64BitMode, // KMOVQmk_EVEX = 2040 |
| 141774 | CEFBS_None, // KMOVQrk = 2041 |
| 141775 | CEFBS_In64BitMode, // KMOVQrk_EVEX = 2042 |
| 141776 | CEFBS_None, // KMOVWkk = 2043 |
| 141777 | CEFBS_In64BitMode, // KMOVWkk_EVEX = 2044 |
| 141778 | CEFBS_None, // KMOVWkm = 2045 |
| 141779 | CEFBS_In64BitMode, // KMOVWkm_EVEX = 2046 |
| 141780 | CEFBS_None, // KMOVWkr = 2047 |
| 141781 | CEFBS_In64BitMode, // KMOVWkr_EVEX = 2048 |
| 141782 | CEFBS_None, // KMOVWmk = 2049 |
| 141783 | CEFBS_In64BitMode, // KMOVWmk_EVEX = 2050 |
| 141784 | CEFBS_None, // KMOVWrk = 2051 |
| 141785 | CEFBS_In64BitMode, // KMOVWrk_EVEX = 2052 |
| 141786 | CEFBS_None, // KNOTBkk = 2053 |
| 141787 | CEFBS_None, // KNOTDkk = 2054 |
| 141788 | CEFBS_None, // KNOTQkk = 2055 |
| 141789 | CEFBS_None, // KNOTWkk = 2056 |
| 141790 | CEFBS_None, // KORBkk = 2057 |
| 141791 | CEFBS_None, // KORDkk = 2058 |
| 141792 | CEFBS_None, // KORQkk = 2059 |
| 141793 | CEFBS_None, // KORTESTBkk = 2060 |
| 141794 | CEFBS_None, // KORTESTDkk = 2061 |
| 141795 | CEFBS_None, // KORTESTQkk = 2062 |
| 141796 | CEFBS_None, // KORTESTWkk = 2063 |
| 141797 | CEFBS_None, // KORWkk = 2064 |
| 141798 | CEFBS_None, // KSHIFTLBki = 2065 |
| 141799 | CEFBS_None, // KSHIFTLDki = 2066 |
| 141800 | CEFBS_None, // KSHIFTLQki = 2067 |
| 141801 | CEFBS_None, // KSHIFTLWki = 2068 |
| 141802 | CEFBS_None, // KSHIFTRBki = 2069 |
| 141803 | CEFBS_None, // KSHIFTRDki = 2070 |
| 141804 | CEFBS_None, // KSHIFTRQki = 2071 |
| 141805 | CEFBS_None, // KSHIFTRWki = 2072 |
| 141806 | CEFBS_None, // KTESTBkk = 2073 |
| 141807 | CEFBS_None, // KTESTDkk = 2074 |
| 141808 | CEFBS_None, // KTESTQkk = 2075 |
| 141809 | CEFBS_None, // KTESTWkk = 2076 |
| 141810 | CEFBS_None, // KUNPCKBWkk = 2077 |
| 141811 | CEFBS_None, // KUNPCKDQkk = 2078 |
| 141812 | CEFBS_None, // KUNPCKWDkk = 2079 |
| 141813 | CEFBS_None, // KXNORBkk = 2080 |
| 141814 | CEFBS_None, // KXNORDkk = 2081 |
| 141815 | CEFBS_None, // KXNORQkk = 2082 |
| 141816 | CEFBS_None, // KXNORWkk = 2083 |
| 141817 | CEFBS_None, // KXORBkk = 2084 |
| 141818 | CEFBS_None, // KXORDkk = 2085 |
| 141819 | CEFBS_None, // KXORQkk = 2086 |
| 141820 | CEFBS_None, // KXORWkk = 2087 |
| 141821 | CEFBS_None, // LAHF = 2088 |
| 141822 | CEFBS_None, // LAR16rm = 2089 |
| 141823 | CEFBS_None, // LAR16rr = 2090 |
| 141824 | CEFBS_None, // LAR32rm = 2091 |
| 141825 | CEFBS_None, // LAR32rr = 2092 |
| 141826 | CEFBS_None, // LAR64rm = 2093 |
| 141827 | CEFBS_None, // LAR64rr = 2094 |
| 141828 | CEFBS_None, // LCMPXCHG16 = 2095 |
| 141829 | CEFBS_In64BitMode, // LCMPXCHG16B = 2096 |
| 141830 | CEFBS_None, // LCMPXCHG32 = 2097 |
| 141831 | CEFBS_None, // LCMPXCHG64 = 2098 |
| 141832 | CEFBS_None, // LCMPXCHG8 = 2099 |
| 141833 | CEFBS_None, // LCMPXCHG8B = 2100 |
| 141834 | CEFBS_None, // LDDQUrm = 2101 |
| 141835 | CEFBS_None, // LDMXCSR = 2102 |
| 141836 | CEFBS_Not64BitMode, // LDS16rm = 2103 |
| 141837 | CEFBS_Not64BitMode, // LDS32rm = 2104 |
| 141838 | CEFBS_In64BitMode, // LDTILECFG = 2105 |
| 141839 | CEFBS_In64BitMode, // LDTILECFG_EVEX = 2106 |
| 141840 | CEFBS_None, // LD_F0 = 2107 |
| 141841 | CEFBS_None, // LD_F1 = 2108 |
| 141842 | CEFBS_None, // LD_F32m = 2109 |
| 141843 | CEFBS_None, // LD_F64m = 2110 |
| 141844 | CEFBS_None, // LD_F80m = 2111 |
| 141845 | CEFBS_None, // LD_Fp032 = 2112 |
| 141846 | CEFBS_None, // LD_Fp064 = 2113 |
| 141847 | CEFBS_None, // LD_Fp080 = 2114 |
| 141848 | CEFBS_None, // LD_Fp132 = 2115 |
| 141849 | CEFBS_None, // LD_Fp164 = 2116 |
| 141850 | CEFBS_None, // LD_Fp180 = 2117 |
| 141851 | CEFBS_None, // LD_Fp32m = 2118 |
| 141852 | CEFBS_None, // LD_Fp32m64 = 2119 |
| 141853 | CEFBS_None, // LD_Fp32m80 = 2120 |
| 141854 | CEFBS_None, // LD_Fp64m = 2121 |
| 141855 | CEFBS_None, // LD_Fp64m80 = 2122 |
| 141856 | CEFBS_None, // LD_Fp80m = 2123 |
| 141857 | CEFBS_None, // LD_Frr = 2124 |
| 141858 | CEFBS_None, // LEA16r = 2125 |
| 141859 | CEFBS_Not64BitMode, // LEA32r = 2126 |
| 141860 | CEFBS_None, // LEA64_16r = 2127 |
| 141861 | CEFBS_In64BitMode, // LEA64_32r = 2128 |
| 141862 | CEFBS_None, // LEA64_8r = 2129 |
| 141863 | CEFBS_None, // LEA64r = 2130 |
| 141864 | CEFBS_Not64BitMode, // LEAVE = 2131 |
| 141865 | CEFBS_In64BitMode, // LEAVE64 = 2132 |
| 141866 | CEFBS_Not64BitMode, // LES16rm = 2133 |
| 141867 | CEFBS_Not64BitMode, // LES32rm = 2134 |
| 141868 | CEFBS_None, // LFENCE = 2135 |
| 141869 | CEFBS_None, // LFS16rm = 2136 |
| 141870 | CEFBS_None, // LFS32rm = 2137 |
| 141871 | CEFBS_None, // LFS64rm = 2138 |
| 141872 | CEFBS_Not64BitMode, // LGDT16m = 2139 |
| 141873 | CEFBS_Not64BitMode, // LGDT32m = 2140 |
| 141874 | CEFBS_In64BitMode, // LGDT64m = 2141 |
| 141875 | CEFBS_None, // LGS16rm = 2142 |
| 141876 | CEFBS_None, // LGS32rm = 2143 |
| 141877 | CEFBS_None, // LGS64rm = 2144 |
| 141878 | CEFBS_Not64BitMode, // LIDT16m = 2145 |
| 141879 | CEFBS_Not64BitMode, // LIDT32m = 2146 |
| 141880 | CEFBS_In64BitMode, // LIDT64m = 2147 |
| 141881 | CEFBS_In64BitMode, // LKGS16m = 2148 |
| 141882 | CEFBS_In64BitMode, // LKGS16r = 2149 |
| 141883 | CEFBS_None, // LLDT16m = 2150 |
| 141884 | CEFBS_None, // LLDT16r = 2151 |
| 141885 | CEFBS_None, // LLWPCB = 2152 |
| 141886 | CEFBS_None, // LLWPCB64 = 2153 |
| 141887 | CEFBS_None, // LMSW16m = 2154 |
| 141888 | CEFBS_None, // LMSW16r = 2155 |
| 141889 | CEFBS_None, // LOADIWKEY = 2156 |
| 141890 | CEFBS_None, // LOCK_ADD16mi = 2157 |
| 141891 | CEFBS_None, // LOCK_ADD16mi8 = 2158 |
| 141892 | CEFBS_None, // LOCK_ADD16mr = 2159 |
| 141893 | CEFBS_None, // LOCK_ADD32mi = 2160 |
| 141894 | CEFBS_None, // LOCK_ADD32mi8 = 2161 |
| 141895 | CEFBS_None, // LOCK_ADD32mr = 2162 |
| 141896 | CEFBS_None, // LOCK_ADD64mi32 = 2163 |
| 141897 | CEFBS_None, // LOCK_ADD64mi8 = 2164 |
| 141898 | CEFBS_None, // LOCK_ADD64mr = 2165 |
| 141899 | CEFBS_None, // LOCK_ADD8mi = 2166 |
| 141900 | CEFBS_None, // LOCK_ADD8mr = 2167 |
| 141901 | CEFBS_None, // LOCK_AND16mi = 2168 |
| 141902 | CEFBS_None, // LOCK_AND16mi8 = 2169 |
| 141903 | CEFBS_None, // LOCK_AND16mr = 2170 |
| 141904 | CEFBS_None, // LOCK_AND32mi = 2171 |
| 141905 | CEFBS_None, // LOCK_AND32mi8 = 2172 |
| 141906 | CEFBS_None, // LOCK_AND32mr = 2173 |
| 141907 | CEFBS_None, // LOCK_AND64mi32 = 2174 |
| 141908 | CEFBS_None, // LOCK_AND64mi8 = 2175 |
| 141909 | CEFBS_None, // LOCK_AND64mr = 2176 |
| 141910 | CEFBS_None, // LOCK_AND8mi = 2177 |
| 141911 | CEFBS_None, // LOCK_AND8mr = 2178 |
| 141912 | CEFBS_None, // LOCK_BTC16m = 2179 |
| 141913 | CEFBS_None, // LOCK_BTC32m = 2180 |
| 141914 | CEFBS_None, // LOCK_BTC64m = 2181 |
| 141915 | CEFBS_None, // LOCK_BTC_RM16rm = 2182 |
| 141916 | CEFBS_None, // LOCK_BTC_RM32rm = 2183 |
| 141917 | CEFBS_None, // LOCK_BTC_RM64rm = 2184 |
| 141918 | CEFBS_None, // LOCK_BTR16m = 2185 |
| 141919 | CEFBS_None, // LOCK_BTR32m = 2186 |
| 141920 | CEFBS_None, // LOCK_BTR64m = 2187 |
| 141921 | CEFBS_None, // LOCK_BTR_RM16rm = 2188 |
| 141922 | CEFBS_None, // LOCK_BTR_RM32rm = 2189 |
| 141923 | CEFBS_None, // LOCK_BTR_RM64rm = 2190 |
| 141924 | CEFBS_None, // LOCK_BTS16m = 2191 |
| 141925 | CEFBS_None, // LOCK_BTS32m = 2192 |
| 141926 | CEFBS_None, // LOCK_BTS64m = 2193 |
| 141927 | CEFBS_None, // LOCK_BTS_RM16rm = 2194 |
| 141928 | CEFBS_None, // LOCK_BTS_RM32rm = 2195 |
| 141929 | CEFBS_None, // LOCK_BTS_RM64rm = 2196 |
| 141930 | CEFBS_None, // LOCK_DEC16m = 2197 |
| 141931 | CEFBS_None, // LOCK_DEC32m = 2198 |
| 141932 | CEFBS_In64BitMode, // LOCK_DEC64m = 2199 |
| 141933 | CEFBS_None, // LOCK_DEC8m = 2200 |
| 141934 | CEFBS_None, // LOCK_INC16m = 2201 |
| 141935 | CEFBS_None, // LOCK_INC32m = 2202 |
| 141936 | CEFBS_In64BitMode, // LOCK_INC64m = 2203 |
| 141937 | CEFBS_None, // LOCK_INC8m = 2204 |
| 141938 | CEFBS_None, // LOCK_OR16mi = 2205 |
| 141939 | CEFBS_None, // LOCK_OR16mi8 = 2206 |
| 141940 | CEFBS_None, // LOCK_OR16mr = 2207 |
| 141941 | CEFBS_None, // LOCK_OR32mi = 2208 |
| 141942 | CEFBS_None, // LOCK_OR32mi8 = 2209 |
| 141943 | CEFBS_None, // LOCK_OR32mr = 2210 |
| 141944 | CEFBS_None, // LOCK_OR64mi32 = 2211 |
| 141945 | CEFBS_None, // LOCK_OR64mi8 = 2212 |
| 141946 | CEFBS_None, // LOCK_OR64mr = 2213 |
| 141947 | CEFBS_None, // LOCK_OR8mi = 2214 |
| 141948 | CEFBS_None, // LOCK_OR8mr = 2215 |
| 141949 | CEFBS_None, // LOCK_PREFIX = 2216 |
| 141950 | CEFBS_None, // LOCK_SUB16mi = 2217 |
| 141951 | CEFBS_None, // LOCK_SUB16mi8 = 2218 |
| 141952 | CEFBS_None, // LOCK_SUB16mr = 2219 |
| 141953 | CEFBS_None, // LOCK_SUB32mi = 2220 |
| 141954 | CEFBS_None, // LOCK_SUB32mi8 = 2221 |
| 141955 | CEFBS_None, // LOCK_SUB32mr = 2222 |
| 141956 | CEFBS_None, // LOCK_SUB64mi32 = 2223 |
| 141957 | CEFBS_None, // LOCK_SUB64mi8 = 2224 |
| 141958 | CEFBS_None, // LOCK_SUB64mr = 2225 |
| 141959 | CEFBS_None, // LOCK_SUB8mi = 2226 |
| 141960 | CEFBS_None, // LOCK_SUB8mr = 2227 |
| 141961 | CEFBS_None, // LOCK_XOR16mi = 2228 |
| 141962 | CEFBS_None, // LOCK_XOR16mi8 = 2229 |
| 141963 | CEFBS_None, // LOCK_XOR16mr = 2230 |
| 141964 | CEFBS_None, // LOCK_XOR32mi = 2231 |
| 141965 | CEFBS_None, // LOCK_XOR32mi8 = 2232 |
| 141966 | CEFBS_None, // LOCK_XOR32mr = 2233 |
| 141967 | CEFBS_None, // LOCK_XOR64mi32 = 2234 |
| 141968 | CEFBS_None, // LOCK_XOR64mi8 = 2235 |
| 141969 | CEFBS_None, // LOCK_XOR64mr = 2236 |
| 141970 | CEFBS_None, // LOCK_XOR8mi = 2237 |
| 141971 | CEFBS_None, // LOCK_XOR8mr = 2238 |
| 141972 | CEFBS_None, // LODSB = 2239 |
| 141973 | CEFBS_None, // LODSL = 2240 |
| 141974 | CEFBS_In64BitMode, // LODSQ = 2241 |
| 141975 | CEFBS_None, // LODSW = 2242 |
| 141976 | CEFBS_None, // LOOP = 2243 |
| 141977 | CEFBS_None, // LOOPE = 2244 |
| 141978 | CEFBS_None, // LOOPNE = 2245 |
| 141979 | CEFBS_None, // LRET16 = 2246 |
| 141980 | CEFBS_None, // LRET32 = 2247 |
| 141981 | CEFBS_In64BitMode, // LRET64 = 2248 |
| 141982 | CEFBS_None, // LRETI16 = 2249 |
| 141983 | CEFBS_None, // LRETI32 = 2250 |
| 141984 | CEFBS_In64BitMode, // LRETI64 = 2251 |
| 141985 | CEFBS_None, // LSL16rm = 2252 |
| 141986 | CEFBS_None, // LSL16rr = 2253 |
| 141987 | CEFBS_None, // LSL32rm = 2254 |
| 141988 | CEFBS_None, // LSL32rr = 2255 |
| 141989 | CEFBS_None, // LSL64rm = 2256 |
| 141990 | CEFBS_None, // LSL64rr = 2257 |
| 141991 | CEFBS_None, // LSS16rm = 2258 |
| 141992 | CEFBS_None, // LSS32rm = 2259 |
| 141993 | CEFBS_None, // LSS64rm = 2260 |
| 141994 | CEFBS_None, // LTRm = 2261 |
| 141995 | CEFBS_None, // LTRr = 2262 |
| 141996 | CEFBS_None, // LWPINS32rmi = 2263 |
| 141997 | CEFBS_None, // LWPINS32rri = 2264 |
| 141998 | CEFBS_None, // LWPINS64rmi = 2265 |
| 141999 | CEFBS_None, // LWPINS64rri = 2266 |
| 142000 | CEFBS_None, // LWPVAL32rmi = 2267 |
| 142001 | CEFBS_None, // LWPVAL32rri = 2268 |
| 142002 | CEFBS_None, // LWPVAL64rmi = 2269 |
| 142003 | CEFBS_None, // LWPVAL64rri = 2270 |
| 142004 | CEFBS_None, // LXADD16 = 2271 |
| 142005 | CEFBS_None, // LXADD32 = 2272 |
| 142006 | CEFBS_None, // LXADD64 = 2273 |
| 142007 | CEFBS_None, // LXADD8 = 2274 |
| 142008 | CEFBS_None, // LZCNT16rm = 2275 |
| 142009 | CEFBS_None, // LZCNT16rm_EVEX = 2276 |
| 142010 | CEFBS_None, // LZCNT16rm_NF = 2277 |
| 142011 | CEFBS_None, // LZCNT16rr = 2278 |
| 142012 | CEFBS_None, // LZCNT16rr_EVEX = 2279 |
| 142013 | CEFBS_None, // LZCNT16rr_NF = 2280 |
| 142014 | CEFBS_None, // LZCNT32rm = 2281 |
| 142015 | CEFBS_None, // LZCNT32rm_EVEX = 2282 |
| 142016 | CEFBS_None, // LZCNT32rm_NF = 2283 |
| 142017 | CEFBS_None, // LZCNT32rr = 2284 |
| 142018 | CEFBS_None, // LZCNT32rr_EVEX = 2285 |
| 142019 | CEFBS_None, // LZCNT32rr_NF = 2286 |
| 142020 | CEFBS_None, // LZCNT64rm = 2287 |
| 142021 | CEFBS_None, // LZCNT64rm_EVEX = 2288 |
| 142022 | CEFBS_None, // LZCNT64rm_NF = 2289 |
| 142023 | CEFBS_None, // LZCNT64rr = 2290 |
| 142024 | CEFBS_None, // LZCNT64rr_EVEX = 2291 |
| 142025 | CEFBS_None, // LZCNT64rr_NF = 2292 |
| 142026 | CEFBS_None, // MASKMOVDQU = 2293 |
| 142027 | CEFBS_In64BitMode, // MASKMOVDQU64 = 2294 |
| 142028 | CEFBS_None, // MASKPAIR16LOAD = 2295 |
| 142029 | CEFBS_None, // MASKPAIR16STORE = 2296 |
| 142030 | CEFBS_None, // MAXCPDrm = 2297 |
| 142031 | CEFBS_None, // MAXCPDrr = 2298 |
| 142032 | CEFBS_None, // MAXCPSrm = 2299 |
| 142033 | CEFBS_None, // MAXCPSrr = 2300 |
| 142034 | CEFBS_None, // MAXCSDrm = 2301 |
| 142035 | CEFBS_None, // MAXCSDrr = 2302 |
| 142036 | CEFBS_None, // MAXCSSrm = 2303 |
| 142037 | CEFBS_None, // MAXCSSrr = 2304 |
| 142038 | CEFBS_None, // MAXPDrm = 2305 |
| 142039 | CEFBS_None, // MAXPDrr = 2306 |
| 142040 | CEFBS_None, // MAXPSrm = 2307 |
| 142041 | CEFBS_None, // MAXPSrr = 2308 |
| 142042 | CEFBS_None, // MAXSDrm = 2309 |
| 142043 | CEFBS_None, // MAXSDrm_Int = 2310 |
| 142044 | CEFBS_None, // MAXSDrr = 2311 |
| 142045 | CEFBS_None, // MAXSDrr_Int = 2312 |
| 142046 | CEFBS_None, // MAXSSrm = 2313 |
| 142047 | CEFBS_None, // MAXSSrm_Int = 2314 |
| 142048 | CEFBS_None, // MAXSSrr = 2315 |
| 142049 | CEFBS_None, // MAXSSrr_Int = 2316 |
| 142050 | CEFBS_None, // MFENCE = 2317 |
| 142051 | CEFBS_None, // MINCPDrm = 2318 |
| 142052 | CEFBS_None, // MINCPDrr = 2319 |
| 142053 | CEFBS_None, // MINCPSrm = 2320 |
| 142054 | CEFBS_None, // MINCPSrr = 2321 |
| 142055 | CEFBS_None, // MINCSDrm = 2322 |
| 142056 | CEFBS_None, // MINCSDrr = 2323 |
| 142057 | CEFBS_None, // MINCSSrm = 2324 |
| 142058 | CEFBS_None, // MINCSSrr = 2325 |
| 142059 | CEFBS_None, // MINPDrm = 2326 |
| 142060 | CEFBS_None, // MINPDrr = 2327 |
| 142061 | CEFBS_None, // MINPSrm = 2328 |
| 142062 | CEFBS_None, // MINPSrr = 2329 |
| 142063 | CEFBS_None, // MINSDrm = 2330 |
| 142064 | CEFBS_None, // MINSDrm_Int = 2331 |
| 142065 | CEFBS_None, // MINSDrr = 2332 |
| 142066 | CEFBS_None, // MINSDrr_Int = 2333 |
| 142067 | CEFBS_None, // MINSSrm = 2334 |
| 142068 | CEFBS_None, // MINSSrm_Int = 2335 |
| 142069 | CEFBS_None, // MINSSrr = 2336 |
| 142070 | CEFBS_None, // MINSSrr_Int = 2337 |
| 142071 | CEFBS_None, // MMX_CVTPD2PIrm = 2338 |
| 142072 | CEFBS_None, // MMX_CVTPD2PIrr = 2339 |
| 142073 | CEFBS_None, // MMX_CVTPI2PDrm = 2340 |
| 142074 | CEFBS_None, // MMX_CVTPI2PDrr = 2341 |
| 142075 | CEFBS_None, // MMX_CVTPI2PSrm = 2342 |
| 142076 | CEFBS_None, // MMX_CVTPI2PSrr = 2343 |
| 142077 | CEFBS_None, // MMX_CVTPS2PIrm = 2344 |
| 142078 | CEFBS_None, // MMX_CVTPS2PIrr = 2345 |
| 142079 | CEFBS_None, // MMX_CVTTPD2PIrm = 2346 |
| 142080 | CEFBS_None, // MMX_CVTTPD2PIrr = 2347 |
| 142081 | CEFBS_None, // MMX_CVTTPS2PIrm = 2348 |
| 142082 | CEFBS_None, // MMX_CVTTPS2PIrr = 2349 |
| 142083 | CEFBS_None, // MMX_EMMS = 2350 |
| 142084 | CEFBS_Not64BitMode, // MMX_MASKMOVQ = 2351 |
| 142085 | CEFBS_In64BitMode, // MMX_MASKMOVQ64 = 2352 |
| 142086 | CEFBS_In64BitMode, // MMX_MOVD64from64mr = 2353 |
| 142087 | CEFBS_In64BitMode, // MMX_MOVD64from64rr = 2354 |
| 142088 | CEFBS_None, // MMX_MOVD64grr = 2355 |
| 142089 | CEFBS_None, // MMX_MOVD64mr = 2356 |
| 142090 | CEFBS_None, // MMX_MOVD64rm = 2357 |
| 142091 | CEFBS_None, // MMX_MOVD64rr = 2358 |
| 142092 | CEFBS_In64BitMode, // MMX_MOVD64to64rm = 2359 |
| 142093 | CEFBS_In64BitMode, // MMX_MOVD64to64rr = 2360 |
| 142094 | CEFBS_None, // MMX_MOVDQ2Qrr = 2361 |
| 142095 | CEFBS_None, // MMX_MOVFR642Qrr = 2362 |
| 142096 | CEFBS_None, // MMX_MOVNTQmr = 2363 |
| 142097 | CEFBS_None, // MMX_MOVQ2DQrr = 2364 |
| 142098 | CEFBS_None, // MMX_MOVQ2FR64rr = 2365 |
| 142099 | CEFBS_None, // MMX_MOVQ64mr = 2366 |
| 142100 | CEFBS_None, // MMX_MOVQ64rm = 2367 |
| 142101 | CEFBS_None, // MMX_MOVQ64rr = 2368 |
| 142102 | CEFBS_None, // MMX_MOVQ64rr_REV = 2369 |
| 142103 | CEFBS_None, // MMX_PABSBrm = 2370 |
| 142104 | CEFBS_None, // MMX_PABSBrr = 2371 |
| 142105 | CEFBS_None, // MMX_PABSDrm = 2372 |
| 142106 | CEFBS_None, // MMX_PABSDrr = 2373 |
| 142107 | CEFBS_None, // MMX_PABSWrm = 2374 |
| 142108 | CEFBS_None, // MMX_PABSWrr = 2375 |
| 142109 | CEFBS_None, // MMX_PACKSSDWrm = 2376 |
| 142110 | CEFBS_None, // MMX_PACKSSDWrr = 2377 |
| 142111 | CEFBS_None, // MMX_PACKSSWBrm = 2378 |
| 142112 | CEFBS_None, // MMX_PACKSSWBrr = 2379 |
| 142113 | CEFBS_None, // MMX_PACKUSWBrm = 2380 |
| 142114 | CEFBS_None, // MMX_PACKUSWBrr = 2381 |
| 142115 | CEFBS_None, // MMX_PADDBrm = 2382 |
| 142116 | CEFBS_None, // MMX_PADDBrr = 2383 |
| 142117 | CEFBS_None, // MMX_PADDDrm = 2384 |
| 142118 | CEFBS_None, // MMX_PADDDrr = 2385 |
| 142119 | CEFBS_None, // MMX_PADDQrm = 2386 |
| 142120 | CEFBS_None, // MMX_PADDQrr = 2387 |
| 142121 | CEFBS_None, // MMX_PADDSBrm = 2388 |
| 142122 | CEFBS_None, // MMX_PADDSBrr = 2389 |
| 142123 | CEFBS_None, // MMX_PADDSWrm = 2390 |
| 142124 | CEFBS_None, // MMX_PADDSWrr = 2391 |
| 142125 | CEFBS_None, // MMX_PADDUSBrm = 2392 |
| 142126 | CEFBS_None, // MMX_PADDUSBrr = 2393 |
| 142127 | CEFBS_None, // MMX_PADDUSWrm = 2394 |
| 142128 | CEFBS_None, // MMX_PADDUSWrr = 2395 |
| 142129 | CEFBS_None, // MMX_PADDWrm = 2396 |
| 142130 | CEFBS_None, // MMX_PADDWrr = 2397 |
| 142131 | CEFBS_None, // MMX_PALIGNRrmi = 2398 |
| 142132 | CEFBS_None, // MMX_PALIGNRrri = 2399 |
| 142133 | CEFBS_None, // MMX_PANDNrm = 2400 |
| 142134 | CEFBS_None, // MMX_PANDNrr = 2401 |
| 142135 | CEFBS_None, // MMX_PANDrm = 2402 |
| 142136 | CEFBS_None, // MMX_PANDrr = 2403 |
| 142137 | CEFBS_None, // MMX_PAVGBrm = 2404 |
| 142138 | CEFBS_None, // MMX_PAVGBrr = 2405 |
| 142139 | CEFBS_None, // MMX_PAVGWrm = 2406 |
| 142140 | CEFBS_None, // MMX_PAVGWrr = 2407 |
| 142141 | CEFBS_None, // MMX_PCMPEQBrm = 2408 |
| 142142 | CEFBS_None, // MMX_PCMPEQBrr = 2409 |
| 142143 | CEFBS_None, // MMX_PCMPEQDrm = 2410 |
| 142144 | CEFBS_None, // MMX_PCMPEQDrr = 2411 |
| 142145 | CEFBS_None, // MMX_PCMPEQWrm = 2412 |
| 142146 | CEFBS_None, // MMX_PCMPEQWrr = 2413 |
| 142147 | CEFBS_None, // MMX_PCMPGTBrm = 2414 |
| 142148 | CEFBS_None, // MMX_PCMPGTBrr = 2415 |
| 142149 | CEFBS_None, // MMX_PCMPGTDrm = 2416 |
| 142150 | CEFBS_None, // MMX_PCMPGTDrr = 2417 |
| 142151 | CEFBS_None, // MMX_PCMPGTWrm = 2418 |
| 142152 | CEFBS_None, // MMX_PCMPGTWrr = 2419 |
| 142153 | CEFBS_None, // MMX_PEXTRWrri = 2420 |
| 142154 | CEFBS_None, // MMX_PHADDDrm = 2421 |
| 142155 | CEFBS_None, // MMX_PHADDDrr = 2422 |
| 142156 | CEFBS_None, // MMX_PHADDSWrm = 2423 |
| 142157 | CEFBS_None, // MMX_PHADDSWrr = 2424 |
| 142158 | CEFBS_None, // MMX_PHADDWrm = 2425 |
| 142159 | CEFBS_None, // MMX_PHADDWrr = 2426 |
| 142160 | CEFBS_None, // MMX_PHSUBDrm = 2427 |
| 142161 | CEFBS_None, // MMX_PHSUBDrr = 2428 |
| 142162 | CEFBS_None, // MMX_PHSUBSWrm = 2429 |
| 142163 | CEFBS_None, // MMX_PHSUBSWrr = 2430 |
| 142164 | CEFBS_None, // MMX_PHSUBWrm = 2431 |
| 142165 | CEFBS_None, // MMX_PHSUBWrr = 2432 |
| 142166 | CEFBS_None, // MMX_PINSRWrmi = 2433 |
| 142167 | CEFBS_None, // MMX_PINSRWrri = 2434 |
| 142168 | CEFBS_None, // MMX_PMADDUBSWrm = 2435 |
| 142169 | CEFBS_None, // MMX_PMADDUBSWrr = 2436 |
| 142170 | CEFBS_None, // MMX_PMADDWDrm = 2437 |
| 142171 | CEFBS_None, // MMX_PMADDWDrr = 2438 |
| 142172 | CEFBS_None, // MMX_PMAXSWrm = 2439 |
| 142173 | CEFBS_None, // MMX_PMAXSWrr = 2440 |
| 142174 | CEFBS_None, // MMX_PMAXUBrm = 2441 |
| 142175 | CEFBS_None, // MMX_PMAXUBrr = 2442 |
| 142176 | CEFBS_None, // MMX_PMINSWrm = 2443 |
| 142177 | CEFBS_None, // MMX_PMINSWrr = 2444 |
| 142178 | CEFBS_None, // MMX_PMINUBrm = 2445 |
| 142179 | CEFBS_None, // MMX_PMINUBrr = 2446 |
| 142180 | CEFBS_None, // MMX_PMOVMSKBrr = 2447 |
| 142181 | CEFBS_None, // MMX_PMULHRSWrm = 2448 |
| 142182 | CEFBS_None, // MMX_PMULHRSWrr = 2449 |
| 142183 | CEFBS_None, // MMX_PMULHUWrm = 2450 |
| 142184 | CEFBS_None, // MMX_PMULHUWrr = 2451 |
| 142185 | CEFBS_None, // MMX_PMULHWrm = 2452 |
| 142186 | CEFBS_None, // MMX_PMULHWrr = 2453 |
| 142187 | CEFBS_None, // MMX_PMULLWrm = 2454 |
| 142188 | CEFBS_None, // MMX_PMULLWrr = 2455 |
| 142189 | CEFBS_None, // MMX_PMULUDQrm = 2456 |
| 142190 | CEFBS_None, // MMX_PMULUDQrr = 2457 |
| 142191 | CEFBS_None, // MMX_PORrm = 2458 |
| 142192 | CEFBS_None, // MMX_PORrr = 2459 |
| 142193 | CEFBS_None, // MMX_PSADBWrm = 2460 |
| 142194 | CEFBS_None, // MMX_PSADBWrr = 2461 |
| 142195 | CEFBS_None, // MMX_PSHUFBrm = 2462 |
| 142196 | CEFBS_None, // MMX_PSHUFBrr = 2463 |
| 142197 | CEFBS_None, // MMX_PSHUFWmi = 2464 |
| 142198 | CEFBS_None, // MMX_PSHUFWri = 2465 |
| 142199 | CEFBS_None, // MMX_PSIGNBrm = 2466 |
| 142200 | CEFBS_None, // MMX_PSIGNBrr = 2467 |
| 142201 | CEFBS_None, // MMX_PSIGNDrm = 2468 |
| 142202 | CEFBS_None, // MMX_PSIGNDrr = 2469 |
| 142203 | CEFBS_None, // MMX_PSIGNWrm = 2470 |
| 142204 | CEFBS_None, // MMX_PSIGNWrr = 2471 |
| 142205 | CEFBS_None, // MMX_PSLLDri = 2472 |
| 142206 | CEFBS_None, // MMX_PSLLDrm = 2473 |
| 142207 | CEFBS_None, // MMX_PSLLDrr = 2474 |
| 142208 | CEFBS_None, // MMX_PSLLQri = 2475 |
| 142209 | CEFBS_None, // MMX_PSLLQrm = 2476 |
| 142210 | CEFBS_None, // MMX_PSLLQrr = 2477 |
| 142211 | CEFBS_None, // MMX_PSLLWri = 2478 |
| 142212 | CEFBS_None, // MMX_PSLLWrm = 2479 |
| 142213 | CEFBS_None, // MMX_PSLLWrr = 2480 |
| 142214 | CEFBS_None, // MMX_PSRADri = 2481 |
| 142215 | CEFBS_None, // MMX_PSRADrm = 2482 |
| 142216 | CEFBS_None, // MMX_PSRADrr = 2483 |
| 142217 | CEFBS_None, // MMX_PSRAWri = 2484 |
| 142218 | CEFBS_None, // MMX_PSRAWrm = 2485 |
| 142219 | CEFBS_None, // MMX_PSRAWrr = 2486 |
| 142220 | CEFBS_None, // MMX_PSRLDri = 2487 |
| 142221 | CEFBS_None, // MMX_PSRLDrm = 2488 |
| 142222 | CEFBS_None, // MMX_PSRLDrr = 2489 |
| 142223 | CEFBS_None, // MMX_PSRLQri = 2490 |
| 142224 | CEFBS_None, // MMX_PSRLQrm = 2491 |
| 142225 | CEFBS_None, // MMX_PSRLQrr = 2492 |
| 142226 | CEFBS_None, // MMX_PSRLWri = 2493 |
| 142227 | CEFBS_None, // MMX_PSRLWrm = 2494 |
| 142228 | CEFBS_None, // MMX_PSRLWrr = 2495 |
| 142229 | CEFBS_None, // MMX_PSUBBrm = 2496 |
| 142230 | CEFBS_None, // MMX_PSUBBrr = 2497 |
| 142231 | CEFBS_None, // MMX_PSUBDrm = 2498 |
| 142232 | CEFBS_None, // MMX_PSUBDrr = 2499 |
| 142233 | CEFBS_None, // MMX_PSUBQrm = 2500 |
| 142234 | CEFBS_None, // MMX_PSUBQrr = 2501 |
| 142235 | CEFBS_None, // MMX_PSUBSBrm = 2502 |
| 142236 | CEFBS_None, // MMX_PSUBSBrr = 2503 |
| 142237 | CEFBS_None, // MMX_PSUBSWrm = 2504 |
| 142238 | CEFBS_None, // MMX_PSUBSWrr = 2505 |
| 142239 | CEFBS_None, // MMX_PSUBUSBrm = 2506 |
| 142240 | CEFBS_None, // MMX_PSUBUSBrr = 2507 |
| 142241 | CEFBS_None, // MMX_PSUBUSWrm = 2508 |
| 142242 | CEFBS_None, // MMX_PSUBUSWrr = 2509 |
| 142243 | CEFBS_None, // MMX_PSUBWrm = 2510 |
| 142244 | CEFBS_None, // MMX_PSUBWrr = 2511 |
| 142245 | CEFBS_None, // MMX_PUNPCKHBWrm = 2512 |
| 142246 | CEFBS_None, // MMX_PUNPCKHBWrr = 2513 |
| 142247 | CEFBS_None, // MMX_PUNPCKHDQrm = 2514 |
| 142248 | CEFBS_None, // MMX_PUNPCKHDQrr = 2515 |
| 142249 | CEFBS_None, // MMX_PUNPCKHWDrm = 2516 |
| 142250 | CEFBS_None, // MMX_PUNPCKHWDrr = 2517 |
| 142251 | CEFBS_None, // MMX_PUNPCKLBWrm = 2518 |
| 142252 | CEFBS_None, // MMX_PUNPCKLBWrr = 2519 |
| 142253 | CEFBS_None, // MMX_PUNPCKLDQrm = 2520 |
| 142254 | CEFBS_None, // MMX_PUNPCKLDQrr = 2521 |
| 142255 | CEFBS_None, // MMX_PUNPCKLWDrm = 2522 |
| 142256 | CEFBS_None, // MMX_PUNPCKLWDrr = 2523 |
| 142257 | CEFBS_None, // MMX_PXORrm = 2524 |
| 142258 | CEFBS_None, // MMX_PXORrr = 2525 |
| 142259 | CEFBS_Not64BitMode, // MONITOR32rrr = 2526 |
| 142260 | CEFBS_In64BitMode, // MONITOR64rrr = 2527 |
| 142261 | CEFBS_Not64BitMode, // MONITORX32rrr = 2528 |
| 142262 | CEFBS_In64BitMode, // MONITORX64rrr = 2529 |
| 142263 | CEFBS_None, // MONTMUL = 2530 |
| 142264 | CEFBS_None, // MOV16ao16 = 2531 |
| 142265 | CEFBS_None, // MOV16ao32 = 2532 |
| 142266 | CEFBS_None, // MOV16ao64 = 2533 |
| 142267 | CEFBS_None, // MOV16mi = 2534 |
| 142268 | CEFBS_None, // MOV16mr = 2535 |
| 142269 | CEFBS_None, // MOV16ms = 2536 |
| 142270 | CEFBS_None, // MOV16o16a = 2537 |
| 142271 | CEFBS_None, // MOV16o32a = 2538 |
| 142272 | CEFBS_None, // MOV16o64a = 2539 |
| 142273 | CEFBS_None, // MOV16ri = 2540 |
| 142274 | CEFBS_None, // MOV16ri_alt = 2541 |
| 142275 | CEFBS_None, // MOV16rm = 2542 |
| 142276 | CEFBS_None, // MOV16rr = 2543 |
| 142277 | CEFBS_None, // MOV16rr_REV = 2544 |
| 142278 | CEFBS_None, // MOV16rs = 2545 |
| 142279 | CEFBS_None, // MOV16sm = 2546 |
| 142280 | CEFBS_None, // MOV16sr = 2547 |
| 142281 | CEFBS_None, // MOV32ao16 = 2548 |
| 142282 | CEFBS_None, // MOV32ao32 = 2549 |
| 142283 | CEFBS_None, // MOV32ao64 = 2550 |
| 142284 | CEFBS_Not64BitMode, // MOV32cr = 2551 |
| 142285 | CEFBS_Not64BitMode, // MOV32dr = 2552 |
| 142286 | CEFBS_None, // MOV32mi = 2553 |
| 142287 | CEFBS_None, // MOV32mr = 2554 |
| 142288 | CEFBS_None, // MOV32o16a = 2555 |
| 142289 | CEFBS_None, // MOV32o32a = 2556 |
| 142290 | CEFBS_None, // MOV32o64a = 2557 |
| 142291 | CEFBS_Not64BitMode, // MOV32rc = 2558 |
| 142292 | CEFBS_Not64BitMode, // MOV32rd = 2559 |
| 142293 | CEFBS_None, // MOV32ri = 2560 |
| 142294 | CEFBS_None, // MOV32ri_alt = 2561 |
| 142295 | CEFBS_None, // MOV32rm = 2562 |
| 142296 | CEFBS_None, // MOV32rr = 2563 |
| 142297 | CEFBS_None, // MOV32rr_REV = 2564 |
| 142298 | CEFBS_None, // MOV32rs = 2565 |
| 142299 | CEFBS_None, // MOV32sr = 2566 |
| 142300 | CEFBS_None, // MOV64ao32 = 2567 |
| 142301 | CEFBS_None, // MOV64ao64 = 2568 |
| 142302 | CEFBS_In64BitMode, // MOV64cr = 2569 |
| 142303 | CEFBS_In64BitMode, // MOV64dr = 2570 |
| 142304 | CEFBS_In64BitMode, // MOV64mi32 = 2571 |
| 142305 | CEFBS_None, // MOV64mr = 2572 |
| 142306 | CEFBS_None, // MOV64o32a = 2573 |
| 142307 | CEFBS_None, // MOV64o64a = 2574 |
| 142308 | CEFBS_In64BitMode, // MOV64rc = 2575 |
| 142309 | CEFBS_In64BitMode, // MOV64rd = 2576 |
| 142310 | CEFBS_None, // MOV64ri = 2577 |
| 142311 | CEFBS_None, // MOV64ri32 = 2578 |
| 142312 | CEFBS_None, // MOV64rm = 2579 |
| 142313 | CEFBS_None, // MOV64rr = 2580 |
| 142314 | CEFBS_None, // MOV64rr_REV = 2581 |
| 142315 | CEFBS_None, // MOV64rs = 2582 |
| 142316 | CEFBS_None, // MOV64sr = 2583 |
| 142317 | CEFBS_None, // MOV64toPQIrm = 2584 |
| 142318 | CEFBS_None, // MOV64toPQIrr = 2585 |
| 142319 | CEFBS_None, // MOV64toSDrr = 2586 |
| 142320 | CEFBS_None, // MOV8ao16 = 2587 |
| 142321 | CEFBS_None, // MOV8ao32 = 2588 |
| 142322 | CEFBS_None, // MOV8ao64 = 2589 |
| 142323 | CEFBS_None, // MOV8mi = 2590 |
| 142324 | CEFBS_None, // MOV8mr = 2591 |
| 142325 | CEFBS_None, // MOV8mr_NOREX = 2592 |
| 142326 | CEFBS_None, // MOV8o16a = 2593 |
| 142327 | CEFBS_None, // MOV8o32a = 2594 |
| 142328 | CEFBS_None, // MOV8o64a = 2595 |
| 142329 | CEFBS_None, // MOV8ri = 2596 |
| 142330 | CEFBS_None, // MOV8ri_alt = 2597 |
| 142331 | CEFBS_None, // MOV8rm = 2598 |
| 142332 | CEFBS_None, // MOV8rm_NOREX = 2599 |
| 142333 | CEFBS_None, // MOV8rr = 2600 |
| 142334 | CEFBS_None, // MOV8rr_NOREX = 2601 |
| 142335 | CEFBS_None, // MOV8rr_REV = 2602 |
| 142336 | CEFBS_None, // MOVAPDmr = 2603 |
| 142337 | CEFBS_None, // MOVAPDrm = 2604 |
| 142338 | CEFBS_None, // MOVAPDrr = 2605 |
| 142339 | CEFBS_None, // MOVAPDrr_REV = 2606 |
| 142340 | CEFBS_None, // MOVAPSmr = 2607 |
| 142341 | CEFBS_None, // MOVAPSrm = 2608 |
| 142342 | CEFBS_None, // MOVAPSrr = 2609 |
| 142343 | CEFBS_None, // MOVAPSrr_REV = 2610 |
| 142344 | CEFBS_None, // MOVBE16mr = 2611 |
| 142345 | CEFBS_In64BitMode, // MOVBE16mr_EVEX = 2612 |
| 142346 | CEFBS_None, // MOVBE16rm = 2613 |
| 142347 | CEFBS_In64BitMode, // MOVBE16rm_EVEX = 2614 |
| 142348 | CEFBS_In64BitMode, // MOVBE16rr = 2615 |
| 142349 | CEFBS_In64BitMode, // MOVBE16rr_REV = 2616 |
| 142350 | CEFBS_None, // MOVBE32mr = 2617 |
| 142351 | CEFBS_In64BitMode, // MOVBE32mr_EVEX = 2618 |
| 142352 | CEFBS_None, // MOVBE32rm = 2619 |
| 142353 | CEFBS_In64BitMode, // MOVBE32rm_EVEX = 2620 |
| 142354 | CEFBS_In64BitMode, // MOVBE32rr = 2621 |
| 142355 | CEFBS_In64BitMode, // MOVBE32rr_REV = 2622 |
| 142356 | CEFBS_None, // MOVBE64mr = 2623 |
| 142357 | CEFBS_In64BitMode, // MOVBE64mr_EVEX = 2624 |
| 142358 | CEFBS_None, // MOVBE64rm = 2625 |
| 142359 | CEFBS_In64BitMode, // MOVBE64rm_EVEX = 2626 |
| 142360 | CEFBS_In64BitMode, // MOVBE64rr = 2627 |
| 142361 | CEFBS_In64BitMode, // MOVBE64rr_REV = 2628 |
| 142362 | CEFBS_None, // MOVDDUPrm = 2629 |
| 142363 | CEFBS_None, // MOVDDUPrr = 2630 |
| 142364 | CEFBS_None, // MOVDI2PDIrm = 2631 |
| 142365 | CEFBS_None, // MOVDI2PDIrr = 2632 |
| 142366 | CEFBS_None, // MOVDI2SSrr = 2633 |
| 142367 | CEFBS_Not64BitMode, // MOVDIR64B16 = 2634 |
| 142368 | CEFBS_None, // MOVDIR64B32 = 2635 |
| 142369 | CEFBS_In64BitMode, // MOVDIR64B32_EVEX = 2636 |
| 142370 | CEFBS_In64BitMode, // MOVDIR64B64 = 2637 |
| 142371 | CEFBS_In64BitMode, // MOVDIR64B64_EVEX = 2638 |
| 142372 | CEFBS_None, // MOVDIRI32 = 2639 |
| 142373 | CEFBS_In64BitMode, // MOVDIRI32_EVEX = 2640 |
| 142374 | CEFBS_In64BitMode, // MOVDIRI64 = 2641 |
| 142375 | CEFBS_In64BitMode, // MOVDIRI64_EVEX = 2642 |
| 142376 | CEFBS_None, // MOVDQAmr = 2643 |
| 142377 | CEFBS_None, // MOVDQArm = 2644 |
| 142378 | CEFBS_None, // MOVDQArr = 2645 |
| 142379 | CEFBS_None, // MOVDQArr_REV = 2646 |
| 142380 | CEFBS_None, // MOVDQUmr = 2647 |
| 142381 | CEFBS_None, // MOVDQUrm = 2648 |
| 142382 | CEFBS_None, // MOVDQUrr = 2649 |
| 142383 | CEFBS_None, // MOVDQUrr_REV = 2650 |
| 142384 | CEFBS_None, // MOVHLPSrr = 2651 |
| 142385 | CEFBS_None, // MOVHPDmr = 2652 |
| 142386 | CEFBS_None, // MOVHPDrm = 2653 |
| 142387 | CEFBS_None, // MOVHPSmr = 2654 |
| 142388 | CEFBS_None, // MOVHPSrm = 2655 |
| 142389 | CEFBS_None, // MOVLHPSrr = 2656 |
| 142390 | CEFBS_None, // MOVLPDmr = 2657 |
| 142391 | CEFBS_None, // MOVLPDrm = 2658 |
| 142392 | CEFBS_None, // MOVLPSmr = 2659 |
| 142393 | CEFBS_None, // MOVLPSrm = 2660 |
| 142394 | CEFBS_None, // MOVMSKPDrr = 2661 |
| 142395 | CEFBS_None, // MOVMSKPSrr = 2662 |
| 142396 | CEFBS_None, // MOVNTDQArm = 2663 |
| 142397 | CEFBS_None, // MOVNTDQmr = 2664 |
| 142398 | CEFBS_None, // MOVNTI_64mr = 2665 |
| 142399 | CEFBS_None, // MOVNTImr = 2666 |
| 142400 | CEFBS_None, // MOVNTPDmr = 2667 |
| 142401 | CEFBS_None, // MOVNTPSmr = 2668 |
| 142402 | CEFBS_None, // MOVNTSD = 2669 |
| 142403 | CEFBS_None, // MOVNTSS = 2670 |
| 142404 | CEFBS_None, // MOVPC32r = 2671 |
| 142405 | CEFBS_None, // MOVPDI2DImr = 2672 |
| 142406 | CEFBS_None, // MOVPDI2DIrr = 2673 |
| 142407 | CEFBS_None, // MOVPQI2QImr = 2674 |
| 142408 | CEFBS_None, // MOVPQI2QIrr = 2675 |
| 142409 | CEFBS_None, // MOVPQIto64mr = 2676 |
| 142410 | CEFBS_None, // MOVPQIto64rr = 2677 |
| 142411 | CEFBS_None, // MOVQI2PQIrm = 2678 |
| 142412 | CEFBS_In64BitMode, // MOVRS16rm = 2679 |
| 142413 | CEFBS_In64BitMode, // MOVRS16rm_EVEX = 2680 |
| 142414 | CEFBS_In64BitMode, // MOVRS32rm = 2681 |
| 142415 | CEFBS_In64BitMode, // MOVRS32rm_EVEX = 2682 |
| 142416 | CEFBS_In64BitMode, // MOVRS64rm = 2683 |
| 142417 | CEFBS_In64BitMode, // MOVRS64rm_EVEX = 2684 |
| 142418 | CEFBS_In64BitMode, // MOVRS8rm = 2685 |
| 142419 | CEFBS_In64BitMode, // MOVRS8rm_EVEX = 2686 |
| 142420 | CEFBS_None, // MOVSB = 2687 |
| 142421 | CEFBS_None, // MOVSDmr = 2688 |
| 142422 | CEFBS_None, // MOVSDrm = 2689 |
| 142423 | CEFBS_None, // MOVSDrm_alt = 2690 |
| 142424 | CEFBS_None, // MOVSDrr = 2691 |
| 142425 | CEFBS_None, // MOVSDrr_REV = 2692 |
| 142426 | CEFBS_None, // MOVSDto64rr = 2693 |
| 142427 | CEFBS_None, // MOVSHDUPrm = 2694 |
| 142428 | CEFBS_None, // MOVSHDUPrr = 2695 |
| 142429 | CEFBS_None, // MOVSL = 2696 |
| 142430 | CEFBS_None, // MOVSLDUPrm = 2697 |
| 142431 | CEFBS_None, // MOVSLDUPrr = 2698 |
| 142432 | CEFBS_In64BitMode, // MOVSQ = 2699 |
| 142433 | CEFBS_None, // MOVSS2DIrr = 2700 |
| 142434 | CEFBS_None, // MOVSSmr = 2701 |
| 142435 | CEFBS_None, // MOVSSrm = 2702 |
| 142436 | CEFBS_None, // MOVSSrm_alt = 2703 |
| 142437 | CEFBS_None, // MOVSSrr = 2704 |
| 142438 | CEFBS_None, // MOVSSrr_REV = 2705 |
| 142439 | CEFBS_None, // MOVSW = 2706 |
| 142440 | CEFBS_None, // MOVSX16rm16 = 2707 |
| 142441 | CEFBS_In64BitMode, // MOVSX16rm32 = 2708 |
| 142442 | CEFBS_None, // MOVSX16rm8 = 2709 |
| 142443 | CEFBS_None, // MOVSX16rr16 = 2710 |
| 142444 | CEFBS_In64BitMode, // MOVSX16rr32 = 2711 |
| 142445 | CEFBS_None, // MOVSX16rr8 = 2712 |
| 142446 | CEFBS_None, // MOVSX32rm16 = 2713 |
| 142447 | CEFBS_In64BitMode, // MOVSX32rm32 = 2714 |
| 142448 | CEFBS_None, // MOVSX32rm8 = 2715 |
| 142449 | CEFBS_None, // MOVSX32rm8_NOREX = 2716 |
| 142450 | CEFBS_None, // MOVSX32rr16 = 2717 |
| 142451 | CEFBS_In64BitMode, // MOVSX32rr32 = 2718 |
| 142452 | CEFBS_None, // MOVSX32rr8 = 2719 |
| 142453 | CEFBS_None, // MOVSX32rr8_NOREX = 2720 |
| 142454 | CEFBS_None, // MOVSX64rm16 = 2721 |
| 142455 | CEFBS_In64BitMode, // MOVSX64rm32 = 2722 |
| 142456 | CEFBS_None, // MOVSX64rm8 = 2723 |
| 142457 | CEFBS_None, // MOVSX64rr16 = 2724 |
| 142458 | CEFBS_In64BitMode, // MOVSX64rr32 = 2725 |
| 142459 | CEFBS_None, // MOVSX64rr8 = 2726 |
| 142460 | CEFBS_None, // MOVUPDmr = 2727 |
| 142461 | CEFBS_None, // MOVUPDrm = 2728 |
| 142462 | CEFBS_None, // MOVUPDrr = 2729 |
| 142463 | CEFBS_None, // MOVUPDrr_REV = 2730 |
| 142464 | CEFBS_None, // MOVUPSmr = 2731 |
| 142465 | CEFBS_None, // MOVUPSrm = 2732 |
| 142466 | CEFBS_None, // MOVUPSrr = 2733 |
| 142467 | CEFBS_None, // MOVUPSrr_REV = 2734 |
| 142468 | CEFBS_None, // MOVZPQILo2PQIrr = 2735 |
| 142469 | CEFBS_None, // MOVZX16rm16 = 2736 |
| 142470 | CEFBS_None, // MOVZX16rm8 = 2737 |
| 142471 | CEFBS_None, // MOVZX16rr16 = 2738 |
| 142472 | CEFBS_None, // MOVZX16rr8 = 2739 |
| 142473 | CEFBS_None, // MOVZX32rm16 = 2740 |
| 142474 | CEFBS_None, // MOVZX32rm8 = 2741 |
| 142475 | CEFBS_None, // MOVZX32rm8_NOREX = 2742 |
| 142476 | CEFBS_None, // MOVZX32rr16 = 2743 |
| 142477 | CEFBS_None, // MOVZX32rr8 = 2744 |
| 142478 | CEFBS_None, // MOVZX32rr8_NOREX = 2745 |
| 142479 | CEFBS_None, // MOVZX64rm16 = 2746 |
| 142480 | CEFBS_None, // MOVZX64rm8 = 2747 |
| 142481 | CEFBS_None, // MOVZX64rr16 = 2748 |
| 142482 | CEFBS_None, // MOVZX64rr8 = 2749 |
| 142483 | CEFBS_None, // MPSADBWrmi = 2750 |
| 142484 | CEFBS_None, // MPSADBWrri = 2751 |
| 142485 | CEFBS_None, // MUL16m = 2752 |
| 142486 | CEFBS_In64BitMode, // MUL16m_EVEX = 2753 |
| 142487 | CEFBS_In64BitMode, // MUL16m_NF = 2754 |
| 142488 | CEFBS_None, // MUL16r = 2755 |
| 142489 | CEFBS_In64BitMode, // MUL16r_EVEX = 2756 |
| 142490 | CEFBS_In64BitMode, // MUL16r_NF = 2757 |
| 142491 | CEFBS_None, // MUL32m = 2758 |
| 142492 | CEFBS_In64BitMode, // MUL32m_EVEX = 2759 |
| 142493 | CEFBS_In64BitMode, // MUL32m_NF = 2760 |
| 142494 | CEFBS_None, // MUL32r = 2761 |
| 142495 | CEFBS_In64BitMode, // MUL32r_EVEX = 2762 |
| 142496 | CEFBS_In64BitMode, // MUL32r_NF = 2763 |
| 142497 | CEFBS_In64BitMode, // MUL64m = 2764 |
| 142498 | CEFBS_In64BitMode, // MUL64m_EVEX = 2765 |
| 142499 | CEFBS_In64BitMode, // MUL64m_NF = 2766 |
| 142500 | CEFBS_None, // MUL64r = 2767 |
| 142501 | CEFBS_In64BitMode, // MUL64r_EVEX = 2768 |
| 142502 | CEFBS_In64BitMode, // MUL64r_NF = 2769 |
| 142503 | CEFBS_None, // MUL8m = 2770 |
| 142504 | CEFBS_In64BitMode, // MUL8m_EVEX = 2771 |
| 142505 | CEFBS_In64BitMode, // MUL8m_NF = 2772 |
| 142506 | CEFBS_None, // MUL8r = 2773 |
| 142507 | CEFBS_In64BitMode, // MUL8r_EVEX = 2774 |
| 142508 | CEFBS_In64BitMode, // MUL8r_NF = 2775 |
| 142509 | CEFBS_None, // MULPDrm = 2776 |
| 142510 | CEFBS_None, // MULPDrr = 2777 |
| 142511 | CEFBS_None, // MULPSrm = 2778 |
| 142512 | CEFBS_None, // MULPSrr = 2779 |
| 142513 | CEFBS_None, // MULSDrm = 2780 |
| 142514 | CEFBS_None, // MULSDrm_Int = 2781 |
| 142515 | CEFBS_None, // MULSDrr = 2782 |
| 142516 | CEFBS_None, // MULSDrr_Int = 2783 |
| 142517 | CEFBS_None, // MULSSrm = 2784 |
| 142518 | CEFBS_None, // MULSSrm_Int = 2785 |
| 142519 | CEFBS_None, // MULSSrr = 2786 |
| 142520 | CEFBS_None, // MULSSrr_Int = 2787 |
| 142521 | CEFBS_None, // MULX32Hrm = 2788 |
| 142522 | CEFBS_None, // MULX32Hrr = 2789 |
| 142523 | CEFBS_None, // MULX32rm = 2790 |
| 142524 | CEFBS_In64BitMode, // MULX32rm_EVEX = 2791 |
| 142525 | CEFBS_None, // MULX32rr = 2792 |
| 142526 | CEFBS_In64BitMode, // MULX32rr_EVEX = 2793 |
| 142527 | CEFBS_None, // MULX64Hrm = 2794 |
| 142528 | CEFBS_None, // MULX64Hrr = 2795 |
| 142529 | CEFBS_None, // MULX64rm = 2796 |
| 142530 | CEFBS_In64BitMode, // MULX64rm_EVEX = 2797 |
| 142531 | CEFBS_None, // MULX64rr = 2798 |
| 142532 | CEFBS_In64BitMode, // MULX64rr_EVEX = 2799 |
| 142533 | CEFBS_None, // MUL_F32m = 2800 |
| 142534 | CEFBS_None, // MUL_F64m = 2801 |
| 142535 | CEFBS_None, // MUL_FI16m = 2802 |
| 142536 | CEFBS_None, // MUL_FI32m = 2803 |
| 142537 | CEFBS_None, // MUL_FPrST0 = 2804 |
| 142538 | CEFBS_None, // MUL_FST0r = 2805 |
| 142539 | CEFBS_None, // MUL_Fp32 = 2806 |
| 142540 | CEFBS_None, // MUL_Fp32m = 2807 |
| 142541 | CEFBS_None, // MUL_Fp64 = 2808 |
| 142542 | CEFBS_None, // MUL_Fp64m = 2809 |
| 142543 | CEFBS_None, // MUL_Fp64m32 = 2810 |
| 142544 | CEFBS_None, // MUL_Fp80 = 2811 |
| 142545 | CEFBS_None, // MUL_Fp80m32 = 2812 |
| 142546 | CEFBS_None, // MUL_Fp80m64 = 2813 |
| 142547 | CEFBS_None, // MUL_FpI16m32 = 2814 |
| 142548 | CEFBS_None, // MUL_FpI16m64 = 2815 |
| 142549 | CEFBS_None, // MUL_FpI16m80 = 2816 |
| 142550 | CEFBS_None, // MUL_FpI32m32 = 2817 |
| 142551 | CEFBS_None, // MUL_FpI32m64 = 2818 |
| 142552 | CEFBS_None, // MUL_FpI32m80 = 2819 |
| 142553 | CEFBS_None, // MUL_FrST0 = 2820 |
| 142554 | CEFBS_None, // MWAITXrrr = 2821 |
| 142555 | CEFBS_None, // MWAITrr = 2822 |
| 142556 | CEFBS_None, // NEG16m = 2823 |
| 142557 | CEFBS_In64BitMode, // NEG16m_EVEX = 2824 |
| 142558 | CEFBS_In64BitMode, // NEG16m_ND = 2825 |
| 142559 | CEFBS_In64BitMode, // NEG16m_NF = 2826 |
| 142560 | CEFBS_In64BitMode, // NEG16m_NF_ND = 2827 |
| 142561 | CEFBS_None, // NEG16r = 2828 |
| 142562 | CEFBS_In64BitMode, // NEG16r_EVEX = 2829 |
| 142563 | CEFBS_In64BitMode, // NEG16r_ND = 2830 |
| 142564 | CEFBS_In64BitMode, // NEG16r_NF = 2831 |
| 142565 | CEFBS_In64BitMode, // NEG16r_NF_ND = 2832 |
| 142566 | CEFBS_None, // NEG32m = 2833 |
| 142567 | CEFBS_In64BitMode, // NEG32m_EVEX = 2834 |
| 142568 | CEFBS_In64BitMode, // NEG32m_ND = 2835 |
| 142569 | CEFBS_In64BitMode, // NEG32m_NF = 2836 |
| 142570 | CEFBS_In64BitMode, // NEG32m_NF_ND = 2837 |
| 142571 | CEFBS_None, // NEG32r = 2838 |
| 142572 | CEFBS_In64BitMode, // NEG32r_EVEX = 2839 |
| 142573 | CEFBS_In64BitMode, // NEG32r_ND = 2840 |
| 142574 | CEFBS_In64BitMode, // NEG32r_NF = 2841 |
| 142575 | CEFBS_In64BitMode, // NEG32r_NF_ND = 2842 |
| 142576 | CEFBS_In64BitMode, // NEG64m = 2843 |
| 142577 | CEFBS_In64BitMode, // NEG64m_EVEX = 2844 |
| 142578 | CEFBS_In64BitMode, // NEG64m_ND = 2845 |
| 142579 | CEFBS_In64BitMode, // NEG64m_NF = 2846 |
| 142580 | CEFBS_In64BitMode, // NEG64m_NF_ND = 2847 |
| 142581 | CEFBS_None, // NEG64r = 2848 |
| 142582 | CEFBS_In64BitMode, // NEG64r_EVEX = 2849 |
| 142583 | CEFBS_In64BitMode, // NEG64r_ND = 2850 |
| 142584 | CEFBS_In64BitMode, // NEG64r_NF = 2851 |
| 142585 | CEFBS_In64BitMode, // NEG64r_NF_ND = 2852 |
| 142586 | CEFBS_None, // NEG8m = 2853 |
| 142587 | CEFBS_In64BitMode, // NEG8m_EVEX = 2854 |
| 142588 | CEFBS_In64BitMode, // NEG8m_ND = 2855 |
| 142589 | CEFBS_In64BitMode, // NEG8m_NF = 2856 |
| 142590 | CEFBS_In64BitMode, // NEG8m_NF_ND = 2857 |
| 142591 | CEFBS_None, // NEG8r = 2858 |
| 142592 | CEFBS_In64BitMode, // NEG8r_EVEX = 2859 |
| 142593 | CEFBS_In64BitMode, // NEG8r_ND = 2860 |
| 142594 | CEFBS_In64BitMode, // NEG8r_NF = 2861 |
| 142595 | CEFBS_In64BitMode, // NEG8r_NF_ND = 2862 |
| 142596 | CEFBS_None, // NOOP = 2863 |
| 142597 | CEFBS_None, // NOOPL = 2864 |
| 142598 | CEFBS_None, // NOOPLr = 2865 |
| 142599 | CEFBS_In64BitMode, // NOOPQ = 2866 |
| 142600 | CEFBS_In64BitMode, // NOOPQr = 2867 |
| 142601 | CEFBS_None, // NOOPW = 2868 |
| 142602 | CEFBS_None, // NOOPWr = 2869 |
| 142603 | CEFBS_None, // NOT16m = 2870 |
| 142604 | CEFBS_In64BitMode, // NOT16m_EVEX = 2871 |
| 142605 | CEFBS_In64BitMode, // NOT16m_ND = 2872 |
| 142606 | CEFBS_None, // NOT16r = 2873 |
| 142607 | CEFBS_In64BitMode, // NOT16r_EVEX = 2874 |
| 142608 | CEFBS_In64BitMode, // NOT16r_ND = 2875 |
| 142609 | CEFBS_None, // NOT32m = 2876 |
| 142610 | CEFBS_In64BitMode, // NOT32m_EVEX = 2877 |
| 142611 | CEFBS_In64BitMode, // NOT32m_ND = 2878 |
| 142612 | CEFBS_None, // NOT32r = 2879 |
| 142613 | CEFBS_In64BitMode, // NOT32r_EVEX = 2880 |
| 142614 | CEFBS_In64BitMode, // NOT32r_ND = 2881 |
| 142615 | CEFBS_In64BitMode, // NOT64m = 2882 |
| 142616 | CEFBS_In64BitMode, // NOT64m_EVEX = 2883 |
| 142617 | CEFBS_In64BitMode, // NOT64m_ND = 2884 |
| 142618 | CEFBS_None, // NOT64r = 2885 |
| 142619 | CEFBS_In64BitMode, // NOT64r_EVEX = 2886 |
| 142620 | CEFBS_In64BitMode, // NOT64r_ND = 2887 |
| 142621 | CEFBS_None, // NOT8m = 2888 |
| 142622 | CEFBS_In64BitMode, // NOT8m_EVEX = 2889 |
| 142623 | CEFBS_In64BitMode, // NOT8m_ND = 2890 |
| 142624 | CEFBS_None, // NOT8r = 2891 |
| 142625 | CEFBS_In64BitMode, // NOT8r_EVEX = 2892 |
| 142626 | CEFBS_In64BitMode, // NOT8r_ND = 2893 |
| 142627 | CEFBS_None, // OR16i16 = 2894 |
| 142628 | CEFBS_None, // OR16mi = 2895 |
| 142629 | CEFBS_None, // OR16mi8 = 2896 |
| 142630 | CEFBS_In64BitMode, // OR16mi8_EVEX = 2897 |
| 142631 | CEFBS_In64BitMode, // OR16mi8_ND = 2898 |
| 142632 | CEFBS_In64BitMode, // OR16mi8_NF = 2899 |
| 142633 | CEFBS_In64BitMode, // OR16mi8_NF_ND = 2900 |
| 142634 | CEFBS_In64BitMode, // OR16mi_EVEX = 2901 |
| 142635 | CEFBS_In64BitMode, // OR16mi_ND = 2902 |
| 142636 | CEFBS_In64BitMode, // OR16mi_NF = 2903 |
| 142637 | CEFBS_In64BitMode, // OR16mi_NF_ND = 2904 |
| 142638 | CEFBS_None, // OR16mr = 2905 |
| 142639 | CEFBS_In64BitMode, // OR16mr_EVEX = 2906 |
| 142640 | CEFBS_In64BitMode, // OR16mr_ND = 2907 |
| 142641 | CEFBS_In64BitMode, // OR16mr_NF = 2908 |
| 142642 | CEFBS_In64BitMode, // OR16mr_NF_ND = 2909 |
| 142643 | CEFBS_None, // OR16ri = 2910 |
| 142644 | CEFBS_None, // OR16ri8 = 2911 |
| 142645 | CEFBS_In64BitMode, // OR16ri8_EVEX = 2912 |
| 142646 | CEFBS_In64BitMode, // OR16ri8_ND = 2913 |
| 142647 | CEFBS_In64BitMode, // OR16ri8_NF = 2914 |
| 142648 | CEFBS_In64BitMode, // OR16ri8_NF_ND = 2915 |
| 142649 | CEFBS_In64BitMode, // OR16ri_EVEX = 2916 |
| 142650 | CEFBS_In64BitMode, // OR16ri_ND = 2917 |
| 142651 | CEFBS_In64BitMode, // OR16ri_NF = 2918 |
| 142652 | CEFBS_In64BitMode, // OR16ri_NF_ND = 2919 |
| 142653 | CEFBS_None, // OR16rm = 2920 |
| 142654 | CEFBS_In64BitMode, // OR16rm_EVEX = 2921 |
| 142655 | CEFBS_In64BitMode, // OR16rm_ND = 2922 |
| 142656 | CEFBS_In64BitMode, // OR16rm_NF = 2923 |
| 142657 | CEFBS_In64BitMode, // OR16rm_NF_ND = 2924 |
| 142658 | CEFBS_None, // OR16rr = 2925 |
| 142659 | CEFBS_In64BitMode, // OR16rr_EVEX = 2926 |
| 142660 | CEFBS_In64BitMode, // OR16rr_EVEX_REV = 2927 |
| 142661 | CEFBS_In64BitMode, // OR16rr_ND = 2928 |
| 142662 | CEFBS_In64BitMode, // OR16rr_ND_REV = 2929 |
| 142663 | CEFBS_In64BitMode, // OR16rr_NF = 2930 |
| 142664 | CEFBS_In64BitMode, // OR16rr_NF_ND = 2931 |
| 142665 | CEFBS_In64BitMode, // OR16rr_NF_ND_REV = 2932 |
| 142666 | CEFBS_In64BitMode, // OR16rr_NF_REV = 2933 |
| 142667 | CEFBS_None, // OR16rr_REV = 2934 |
| 142668 | CEFBS_None, // OR32i32 = 2935 |
| 142669 | CEFBS_None, // OR32mi = 2936 |
| 142670 | CEFBS_None, // OR32mi8 = 2937 |
| 142671 | CEFBS_Not64BitMode, // OR32mi8Locked = 2938 |
| 142672 | CEFBS_In64BitMode, // OR32mi8_EVEX = 2939 |
| 142673 | CEFBS_In64BitMode, // OR32mi8_ND = 2940 |
| 142674 | CEFBS_In64BitMode, // OR32mi8_NF = 2941 |
| 142675 | CEFBS_In64BitMode, // OR32mi8_NF_ND = 2942 |
| 142676 | CEFBS_In64BitMode, // OR32mi_EVEX = 2943 |
| 142677 | CEFBS_In64BitMode, // OR32mi_ND = 2944 |
| 142678 | CEFBS_In64BitMode, // OR32mi_NF = 2945 |
| 142679 | CEFBS_In64BitMode, // OR32mi_NF_ND = 2946 |
| 142680 | CEFBS_None, // OR32mr = 2947 |
| 142681 | CEFBS_In64BitMode, // OR32mr_EVEX = 2948 |
| 142682 | CEFBS_In64BitMode, // OR32mr_ND = 2949 |
| 142683 | CEFBS_In64BitMode, // OR32mr_NF = 2950 |
| 142684 | CEFBS_In64BitMode, // OR32mr_NF_ND = 2951 |
| 142685 | CEFBS_None, // OR32ri = 2952 |
| 142686 | CEFBS_None, // OR32ri8 = 2953 |
| 142687 | CEFBS_In64BitMode, // OR32ri8_EVEX = 2954 |
| 142688 | CEFBS_In64BitMode, // OR32ri8_ND = 2955 |
| 142689 | CEFBS_In64BitMode, // OR32ri8_NF = 2956 |
| 142690 | CEFBS_In64BitMode, // OR32ri8_NF_ND = 2957 |
| 142691 | CEFBS_In64BitMode, // OR32ri_EVEX = 2958 |
| 142692 | CEFBS_In64BitMode, // OR32ri_ND = 2959 |
| 142693 | CEFBS_In64BitMode, // OR32ri_NF = 2960 |
| 142694 | CEFBS_In64BitMode, // OR32ri_NF_ND = 2961 |
| 142695 | CEFBS_None, // OR32rm = 2962 |
| 142696 | CEFBS_In64BitMode, // OR32rm_EVEX = 2963 |
| 142697 | CEFBS_In64BitMode, // OR32rm_ND = 2964 |
| 142698 | CEFBS_In64BitMode, // OR32rm_NF = 2965 |
| 142699 | CEFBS_In64BitMode, // OR32rm_NF_ND = 2966 |
| 142700 | CEFBS_None, // OR32rr = 2967 |
| 142701 | CEFBS_In64BitMode, // OR32rr_EVEX = 2968 |
| 142702 | CEFBS_In64BitMode, // OR32rr_EVEX_REV = 2969 |
| 142703 | CEFBS_In64BitMode, // OR32rr_ND = 2970 |
| 142704 | CEFBS_In64BitMode, // OR32rr_ND_REV = 2971 |
| 142705 | CEFBS_In64BitMode, // OR32rr_NF = 2972 |
| 142706 | CEFBS_In64BitMode, // OR32rr_NF_ND = 2973 |
| 142707 | CEFBS_In64BitMode, // OR32rr_NF_ND_REV = 2974 |
| 142708 | CEFBS_In64BitMode, // OR32rr_NF_REV = 2975 |
| 142709 | CEFBS_None, // OR32rr_REV = 2976 |
| 142710 | CEFBS_None, // OR64i32 = 2977 |
| 142711 | CEFBS_In64BitMode, // OR64mi32 = 2978 |
| 142712 | CEFBS_In64BitMode, // OR64mi32_EVEX = 2979 |
| 142713 | CEFBS_In64BitMode, // OR64mi32_ND = 2980 |
| 142714 | CEFBS_In64BitMode, // OR64mi32_NF = 2981 |
| 142715 | CEFBS_In64BitMode, // OR64mi32_NF_ND = 2982 |
| 142716 | CEFBS_In64BitMode, // OR64mi8 = 2983 |
| 142717 | CEFBS_In64BitMode, // OR64mi8_EVEX = 2984 |
| 142718 | CEFBS_In64BitMode, // OR64mi8_ND = 2985 |
| 142719 | CEFBS_In64BitMode, // OR64mi8_NF = 2986 |
| 142720 | CEFBS_In64BitMode, // OR64mi8_NF_ND = 2987 |
| 142721 | CEFBS_None, // OR64mr = 2988 |
| 142722 | CEFBS_In64BitMode, // OR64mr_EVEX = 2989 |
| 142723 | CEFBS_In64BitMode, // OR64mr_ND = 2990 |
| 142724 | CEFBS_In64BitMode, // OR64mr_NF = 2991 |
| 142725 | CEFBS_In64BitMode, // OR64mr_NF_ND = 2992 |
| 142726 | CEFBS_None, // OR64ri32 = 2993 |
| 142727 | CEFBS_In64BitMode, // OR64ri32_EVEX = 2994 |
| 142728 | CEFBS_In64BitMode, // OR64ri32_ND = 2995 |
| 142729 | CEFBS_In64BitMode, // OR64ri32_NF = 2996 |
| 142730 | CEFBS_In64BitMode, // OR64ri32_NF_ND = 2997 |
| 142731 | CEFBS_None, // OR64ri8 = 2998 |
| 142732 | CEFBS_In64BitMode, // OR64ri8_EVEX = 2999 |
| 142733 | CEFBS_In64BitMode, // OR64ri8_ND = 3000 |
| 142734 | CEFBS_In64BitMode, // OR64ri8_NF = 3001 |
| 142735 | CEFBS_In64BitMode, // OR64ri8_NF_ND = 3002 |
| 142736 | CEFBS_None, // OR64rm = 3003 |
| 142737 | CEFBS_In64BitMode, // OR64rm_EVEX = 3004 |
| 142738 | CEFBS_In64BitMode, // OR64rm_ND = 3005 |
| 142739 | CEFBS_In64BitMode, // OR64rm_NF = 3006 |
| 142740 | CEFBS_In64BitMode, // OR64rm_NF_ND = 3007 |
| 142741 | CEFBS_None, // OR64rr = 3008 |
| 142742 | CEFBS_In64BitMode, // OR64rr_EVEX = 3009 |
| 142743 | CEFBS_In64BitMode, // OR64rr_EVEX_REV = 3010 |
| 142744 | CEFBS_In64BitMode, // OR64rr_ND = 3011 |
| 142745 | CEFBS_In64BitMode, // OR64rr_ND_REV = 3012 |
| 142746 | CEFBS_In64BitMode, // OR64rr_NF = 3013 |
| 142747 | CEFBS_In64BitMode, // OR64rr_NF_ND = 3014 |
| 142748 | CEFBS_In64BitMode, // OR64rr_NF_ND_REV = 3015 |
| 142749 | CEFBS_In64BitMode, // OR64rr_NF_REV = 3016 |
| 142750 | CEFBS_None, // OR64rr_REV = 3017 |
| 142751 | CEFBS_None, // OR8i8 = 3018 |
| 142752 | CEFBS_None, // OR8mi = 3019 |
| 142753 | CEFBS_Not64BitMode, // OR8mi8 = 3020 |
| 142754 | CEFBS_In64BitMode, // OR8mi_EVEX = 3021 |
| 142755 | CEFBS_In64BitMode, // OR8mi_ND = 3022 |
| 142756 | CEFBS_In64BitMode, // OR8mi_NF = 3023 |
| 142757 | CEFBS_In64BitMode, // OR8mi_NF_ND = 3024 |
| 142758 | CEFBS_None, // OR8mr = 3025 |
| 142759 | CEFBS_In64BitMode, // OR8mr_EVEX = 3026 |
| 142760 | CEFBS_In64BitMode, // OR8mr_ND = 3027 |
| 142761 | CEFBS_In64BitMode, // OR8mr_NF = 3028 |
| 142762 | CEFBS_In64BitMode, // OR8mr_NF_ND = 3029 |
| 142763 | CEFBS_None, // OR8ri = 3030 |
| 142764 | CEFBS_Not64BitMode, // OR8ri8 = 3031 |
| 142765 | CEFBS_In64BitMode, // OR8ri_EVEX = 3032 |
| 142766 | CEFBS_In64BitMode, // OR8ri_ND = 3033 |
| 142767 | CEFBS_In64BitMode, // OR8ri_NF = 3034 |
| 142768 | CEFBS_In64BitMode, // OR8ri_NF_ND = 3035 |
| 142769 | CEFBS_None, // OR8rm = 3036 |
| 142770 | CEFBS_In64BitMode, // OR8rm_EVEX = 3037 |
| 142771 | CEFBS_In64BitMode, // OR8rm_ND = 3038 |
| 142772 | CEFBS_In64BitMode, // OR8rm_NF = 3039 |
| 142773 | CEFBS_In64BitMode, // OR8rm_NF_ND = 3040 |
| 142774 | CEFBS_None, // OR8rr = 3041 |
| 142775 | CEFBS_In64BitMode, // OR8rr_EVEX = 3042 |
| 142776 | CEFBS_In64BitMode, // OR8rr_EVEX_REV = 3043 |
| 142777 | CEFBS_In64BitMode, // OR8rr_ND = 3044 |
| 142778 | CEFBS_In64BitMode, // OR8rr_ND_REV = 3045 |
| 142779 | CEFBS_In64BitMode, // OR8rr_NF = 3046 |
| 142780 | CEFBS_In64BitMode, // OR8rr_NF_ND = 3047 |
| 142781 | CEFBS_In64BitMode, // OR8rr_NF_ND_REV = 3048 |
| 142782 | CEFBS_In64BitMode, // OR8rr_NF_REV = 3049 |
| 142783 | CEFBS_None, // OR8rr_REV = 3050 |
| 142784 | CEFBS_None, // ORPDrm = 3051 |
| 142785 | CEFBS_None, // ORPDrr = 3052 |
| 142786 | CEFBS_None, // ORPSrm = 3053 |
| 142787 | CEFBS_None, // ORPSrr = 3054 |
| 142788 | CEFBS_None, // OUT16ir = 3055 |
| 142789 | CEFBS_None, // OUT16rr = 3056 |
| 142790 | CEFBS_None, // OUT32ir = 3057 |
| 142791 | CEFBS_None, // OUT32rr = 3058 |
| 142792 | CEFBS_None, // OUT8ir = 3059 |
| 142793 | CEFBS_None, // OUT8rr = 3060 |
| 142794 | CEFBS_None, // OUTSB = 3061 |
| 142795 | CEFBS_None, // OUTSL = 3062 |
| 142796 | CEFBS_None, // OUTSW = 3063 |
| 142797 | CEFBS_None, // PABSBrm = 3064 |
| 142798 | CEFBS_None, // PABSBrr = 3065 |
| 142799 | CEFBS_None, // PABSDrm = 3066 |
| 142800 | CEFBS_None, // PABSDrr = 3067 |
| 142801 | CEFBS_None, // PABSWrm = 3068 |
| 142802 | CEFBS_None, // PABSWrr = 3069 |
| 142803 | CEFBS_None, // PACKSSDWrm = 3070 |
| 142804 | CEFBS_None, // PACKSSDWrr = 3071 |
| 142805 | CEFBS_None, // PACKSSWBrm = 3072 |
| 142806 | CEFBS_None, // PACKSSWBrr = 3073 |
| 142807 | CEFBS_None, // PACKUSDWrm = 3074 |
| 142808 | CEFBS_None, // PACKUSDWrr = 3075 |
| 142809 | CEFBS_None, // PACKUSWBrm = 3076 |
| 142810 | CEFBS_None, // PACKUSWBrr = 3077 |
| 142811 | CEFBS_None, // PADDBrm = 3078 |
| 142812 | CEFBS_None, // PADDBrr = 3079 |
| 142813 | CEFBS_None, // PADDDrm = 3080 |
| 142814 | CEFBS_None, // PADDDrr = 3081 |
| 142815 | CEFBS_None, // PADDQrm = 3082 |
| 142816 | CEFBS_None, // PADDQrr = 3083 |
| 142817 | CEFBS_None, // PADDSBrm = 3084 |
| 142818 | CEFBS_None, // PADDSBrr = 3085 |
| 142819 | CEFBS_None, // PADDSWrm = 3086 |
| 142820 | CEFBS_None, // PADDSWrr = 3087 |
| 142821 | CEFBS_None, // PADDUSBrm = 3088 |
| 142822 | CEFBS_None, // PADDUSBrr = 3089 |
| 142823 | CEFBS_None, // PADDUSWrm = 3090 |
| 142824 | CEFBS_None, // PADDUSWrr = 3091 |
| 142825 | CEFBS_None, // PADDWrm = 3092 |
| 142826 | CEFBS_None, // PADDWrr = 3093 |
| 142827 | CEFBS_None, // PALIGNRrmi = 3094 |
| 142828 | CEFBS_None, // PALIGNRrri = 3095 |
| 142829 | CEFBS_None, // PANDNrm = 3096 |
| 142830 | CEFBS_None, // PANDNrr = 3097 |
| 142831 | CEFBS_None, // PANDrm = 3098 |
| 142832 | CEFBS_None, // PANDrr = 3099 |
| 142833 | CEFBS_None, // PAUSE = 3100 |
| 142834 | CEFBS_None, // PAVGBrm = 3101 |
| 142835 | CEFBS_None, // PAVGBrr = 3102 |
| 142836 | CEFBS_None, // PAVGUSBrm = 3103 |
| 142837 | CEFBS_None, // PAVGUSBrr = 3104 |
| 142838 | CEFBS_None, // PAVGWrm = 3105 |
| 142839 | CEFBS_None, // PAVGWrr = 3106 |
| 142840 | CEFBS_None, // PBLENDVBrm0 = 3107 |
| 142841 | CEFBS_None, // PBLENDVBrr0 = 3108 |
| 142842 | CEFBS_None, // PBLENDWrmi = 3109 |
| 142843 | CEFBS_None, // PBLENDWrri = 3110 |
| 142844 | CEFBS_In64BitMode, // PBNDKB = 3111 |
| 142845 | CEFBS_None, // PCLMULQDQrmi = 3112 |
| 142846 | CEFBS_None, // PCLMULQDQrri = 3113 |
| 142847 | CEFBS_None, // PCMPEQBrm = 3114 |
| 142848 | CEFBS_None, // PCMPEQBrr = 3115 |
| 142849 | CEFBS_None, // PCMPEQDrm = 3116 |
| 142850 | CEFBS_None, // PCMPEQDrr = 3117 |
| 142851 | CEFBS_None, // PCMPEQQrm = 3118 |
| 142852 | CEFBS_None, // PCMPEQQrr = 3119 |
| 142853 | CEFBS_None, // PCMPEQWrm = 3120 |
| 142854 | CEFBS_None, // PCMPEQWrr = 3121 |
| 142855 | CEFBS_None, // PCMPESTRIrmi = 3122 |
| 142856 | CEFBS_None, // PCMPESTRIrri = 3123 |
| 142857 | CEFBS_None, // PCMPESTRMrmi = 3124 |
| 142858 | CEFBS_None, // PCMPESTRMrri = 3125 |
| 142859 | CEFBS_None, // PCMPGTBrm = 3126 |
| 142860 | CEFBS_None, // PCMPGTBrr = 3127 |
| 142861 | CEFBS_None, // PCMPGTDrm = 3128 |
| 142862 | CEFBS_None, // PCMPGTDrr = 3129 |
| 142863 | CEFBS_None, // PCMPGTQrm = 3130 |
| 142864 | CEFBS_None, // PCMPGTQrr = 3131 |
| 142865 | CEFBS_None, // PCMPGTWrm = 3132 |
| 142866 | CEFBS_None, // PCMPGTWrr = 3133 |
| 142867 | CEFBS_None, // PCMPISTRIrmi = 3134 |
| 142868 | CEFBS_None, // PCMPISTRIrri = 3135 |
| 142869 | CEFBS_None, // PCMPISTRMrmi = 3136 |
| 142870 | CEFBS_None, // PCMPISTRMrri = 3137 |
| 142871 | CEFBS_None, // PCONFIG = 3138 |
| 142872 | CEFBS_None, // PDEP32rm = 3139 |
| 142873 | CEFBS_None, // PDEP32rm_EVEX = 3140 |
| 142874 | CEFBS_None, // PDEP32rr = 3141 |
| 142875 | CEFBS_None, // PDEP32rr_EVEX = 3142 |
| 142876 | CEFBS_None, // PDEP64rm = 3143 |
| 142877 | CEFBS_None, // PDEP64rm_EVEX = 3144 |
| 142878 | CEFBS_None, // PDEP64rr = 3145 |
| 142879 | CEFBS_None, // PDEP64rr_EVEX = 3146 |
| 142880 | CEFBS_None, // PEXT32rm = 3147 |
| 142881 | CEFBS_None, // PEXT32rm_EVEX = 3148 |
| 142882 | CEFBS_None, // PEXT32rr = 3149 |
| 142883 | CEFBS_None, // PEXT32rr_EVEX = 3150 |
| 142884 | CEFBS_None, // PEXT64rm = 3151 |
| 142885 | CEFBS_None, // PEXT64rm_EVEX = 3152 |
| 142886 | CEFBS_None, // PEXT64rr = 3153 |
| 142887 | CEFBS_None, // PEXT64rr_EVEX = 3154 |
| 142888 | CEFBS_None, // PEXTRBmri = 3155 |
| 142889 | CEFBS_None, // PEXTRBrri = 3156 |
| 142890 | CEFBS_None, // PEXTRDmri = 3157 |
| 142891 | CEFBS_None, // PEXTRDrri = 3158 |
| 142892 | CEFBS_None, // PEXTRQmri = 3159 |
| 142893 | CEFBS_None, // PEXTRQrri = 3160 |
| 142894 | CEFBS_None, // PEXTRWmri = 3161 |
| 142895 | CEFBS_None, // PEXTRWrri = 3162 |
| 142896 | CEFBS_None, // PEXTRWrri_REV = 3163 |
| 142897 | CEFBS_None, // PF2IDrm = 3164 |
| 142898 | CEFBS_None, // PF2IDrr = 3165 |
| 142899 | CEFBS_None, // PF2IWrm = 3166 |
| 142900 | CEFBS_None, // PF2IWrr = 3167 |
| 142901 | CEFBS_None, // PFACCrm = 3168 |
| 142902 | CEFBS_None, // PFACCrr = 3169 |
| 142903 | CEFBS_None, // PFADDrm = 3170 |
| 142904 | CEFBS_None, // PFADDrr = 3171 |
| 142905 | CEFBS_None, // PFCMPEQrm = 3172 |
| 142906 | CEFBS_None, // PFCMPEQrr = 3173 |
| 142907 | CEFBS_None, // PFCMPGErm = 3174 |
| 142908 | CEFBS_None, // PFCMPGErr = 3175 |
| 142909 | CEFBS_None, // PFCMPGTrm = 3176 |
| 142910 | CEFBS_None, // PFCMPGTrr = 3177 |
| 142911 | CEFBS_None, // PFMAXrm = 3178 |
| 142912 | CEFBS_None, // PFMAXrr = 3179 |
| 142913 | CEFBS_None, // PFMINrm = 3180 |
| 142914 | CEFBS_None, // PFMINrr = 3181 |
| 142915 | CEFBS_None, // PFMULrm = 3182 |
| 142916 | CEFBS_None, // PFMULrr = 3183 |
| 142917 | CEFBS_None, // PFNACCrm = 3184 |
| 142918 | CEFBS_None, // PFNACCrr = 3185 |
| 142919 | CEFBS_None, // PFPNACCrm = 3186 |
| 142920 | CEFBS_None, // PFPNACCrr = 3187 |
| 142921 | CEFBS_None, // PFRCPIT1rm = 3188 |
| 142922 | CEFBS_None, // PFRCPIT1rr = 3189 |
| 142923 | CEFBS_None, // PFRCPIT2rm = 3190 |
| 142924 | CEFBS_None, // PFRCPIT2rr = 3191 |
| 142925 | CEFBS_None, // PFRCPrm = 3192 |
| 142926 | CEFBS_None, // PFRCPrr = 3193 |
| 142927 | CEFBS_None, // PFRSQIT1rm = 3194 |
| 142928 | CEFBS_None, // PFRSQIT1rr = 3195 |
| 142929 | CEFBS_None, // PFRSQRTrm = 3196 |
| 142930 | CEFBS_None, // PFRSQRTrr = 3197 |
| 142931 | CEFBS_None, // PFSUBRrm = 3198 |
| 142932 | CEFBS_None, // PFSUBRrr = 3199 |
| 142933 | CEFBS_None, // PFSUBrm = 3200 |
| 142934 | CEFBS_None, // PFSUBrr = 3201 |
| 142935 | CEFBS_None, // PHADDDrm = 3202 |
| 142936 | CEFBS_None, // PHADDDrr = 3203 |
| 142937 | CEFBS_None, // PHADDSWrm = 3204 |
| 142938 | CEFBS_None, // PHADDSWrr = 3205 |
| 142939 | CEFBS_None, // PHADDWrm = 3206 |
| 142940 | CEFBS_None, // PHADDWrr = 3207 |
| 142941 | CEFBS_None, // PHMINPOSUWrm = 3208 |
| 142942 | CEFBS_None, // PHMINPOSUWrr = 3209 |
| 142943 | CEFBS_None, // PHSUBDrm = 3210 |
| 142944 | CEFBS_None, // PHSUBDrr = 3211 |
| 142945 | CEFBS_None, // PHSUBSWrm = 3212 |
| 142946 | CEFBS_None, // PHSUBSWrr = 3213 |
| 142947 | CEFBS_None, // PHSUBWrm = 3214 |
| 142948 | CEFBS_None, // PHSUBWrr = 3215 |
| 142949 | CEFBS_None, // PI2FDrm = 3216 |
| 142950 | CEFBS_None, // PI2FDrr = 3217 |
| 142951 | CEFBS_None, // PI2FWrm = 3218 |
| 142952 | CEFBS_None, // PI2FWrr = 3219 |
| 142953 | CEFBS_None, // PINSRBrmi = 3220 |
| 142954 | CEFBS_None, // PINSRBrri = 3221 |
| 142955 | CEFBS_None, // PINSRDrmi = 3222 |
| 142956 | CEFBS_None, // PINSRDrri = 3223 |
| 142957 | CEFBS_None, // PINSRQrmi = 3224 |
| 142958 | CEFBS_None, // PINSRQrri = 3225 |
| 142959 | CEFBS_None, // PINSRWrmi = 3226 |
| 142960 | CEFBS_None, // PINSRWrri = 3227 |
| 142961 | CEFBS_None, // PMADDUBSWrm = 3228 |
| 142962 | CEFBS_None, // PMADDUBSWrr = 3229 |
| 142963 | CEFBS_None, // PMADDWDrm = 3230 |
| 142964 | CEFBS_None, // PMADDWDrr = 3231 |
| 142965 | CEFBS_None, // PMAXSBrm = 3232 |
| 142966 | CEFBS_None, // PMAXSBrr = 3233 |
| 142967 | CEFBS_None, // PMAXSDrm = 3234 |
| 142968 | CEFBS_None, // PMAXSDrr = 3235 |
| 142969 | CEFBS_None, // PMAXSWrm = 3236 |
| 142970 | CEFBS_None, // PMAXSWrr = 3237 |
| 142971 | CEFBS_None, // PMAXUBrm = 3238 |
| 142972 | CEFBS_None, // PMAXUBrr = 3239 |
| 142973 | CEFBS_None, // PMAXUDrm = 3240 |
| 142974 | CEFBS_None, // PMAXUDrr = 3241 |
| 142975 | CEFBS_None, // PMAXUWrm = 3242 |
| 142976 | CEFBS_None, // PMAXUWrr = 3243 |
| 142977 | CEFBS_None, // PMINSBrm = 3244 |
| 142978 | CEFBS_None, // PMINSBrr = 3245 |
| 142979 | CEFBS_None, // PMINSDrm = 3246 |
| 142980 | CEFBS_None, // PMINSDrr = 3247 |
| 142981 | CEFBS_None, // PMINSWrm = 3248 |
| 142982 | CEFBS_None, // PMINSWrr = 3249 |
| 142983 | CEFBS_None, // PMINUBrm = 3250 |
| 142984 | CEFBS_None, // PMINUBrr = 3251 |
| 142985 | CEFBS_None, // PMINUDrm = 3252 |
| 142986 | CEFBS_None, // PMINUDrr = 3253 |
| 142987 | CEFBS_None, // PMINUWrm = 3254 |
| 142988 | CEFBS_None, // PMINUWrr = 3255 |
| 142989 | CEFBS_None, // PMOVMSKBrr = 3256 |
| 142990 | CEFBS_None, // PMOVSXBDrm = 3257 |
| 142991 | CEFBS_None, // PMOVSXBDrr = 3258 |
| 142992 | CEFBS_None, // PMOVSXBQrm = 3259 |
| 142993 | CEFBS_None, // PMOVSXBQrr = 3260 |
| 142994 | CEFBS_None, // PMOVSXBWrm = 3261 |
| 142995 | CEFBS_None, // PMOVSXBWrr = 3262 |
| 142996 | CEFBS_None, // PMOVSXDQrm = 3263 |
| 142997 | CEFBS_None, // PMOVSXDQrr = 3264 |
| 142998 | CEFBS_None, // PMOVSXWDrm = 3265 |
| 142999 | CEFBS_None, // PMOVSXWDrr = 3266 |
| 143000 | CEFBS_None, // PMOVSXWQrm = 3267 |
| 143001 | CEFBS_None, // PMOVSXWQrr = 3268 |
| 143002 | CEFBS_None, // PMOVZXBDrm = 3269 |
| 143003 | CEFBS_None, // PMOVZXBDrr = 3270 |
| 143004 | CEFBS_None, // PMOVZXBQrm = 3271 |
| 143005 | CEFBS_None, // PMOVZXBQrr = 3272 |
| 143006 | CEFBS_None, // PMOVZXBWrm = 3273 |
| 143007 | CEFBS_None, // PMOVZXBWrr = 3274 |
| 143008 | CEFBS_None, // PMOVZXDQrm = 3275 |
| 143009 | CEFBS_None, // PMOVZXDQrr = 3276 |
| 143010 | CEFBS_None, // PMOVZXWDrm = 3277 |
| 143011 | CEFBS_None, // PMOVZXWDrr = 3278 |
| 143012 | CEFBS_None, // PMOVZXWQrm = 3279 |
| 143013 | CEFBS_None, // PMOVZXWQrr = 3280 |
| 143014 | CEFBS_None, // PMULDQrm = 3281 |
| 143015 | CEFBS_None, // PMULDQrr = 3282 |
| 143016 | CEFBS_None, // PMULHRSWrm = 3283 |
| 143017 | CEFBS_None, // PMULHRSWrr = 3284 |
| 143018 | CEFBS_None, // PMULHRWrm = 3285 |
| 143019 | CEFBS_None, // PMULHRWrr = 3286 |
| 143020 | CEFBS_None, // PMULHUWrm = 3287 |
| 143021 | CEFBS_None, // PMULHUWrr = 3288 |
| 143022 | CEFBS_None, // PMULHWrm = 3289 |
| 143023 | CEFBS_None, // PMULHWrr = 3290 |
| 143024 | CEFBS_None, // PMULLDrm = 3291 |
| 143025 | CEFBS_None, // PMULLDrr = 3292 |
| 143026 | CEFBS_None, // PMULLWrm = 3293 |
| 143027 | CEFBS_None, // PMULLWrr = 3294 |
| 143028 | CEFBS_None, // PMULUDQrm = 3295 |
| 143029 | CEFBS_None, // PMULUDQrr = 3296 |
| 143030 | CEFBS_None, // POP16r = 3297 |
| 143031 | CEFBS_None, // POP16rmm = 3298 |
| 143032 | CEFBS_None, // POP16rmr = 3299 |
| 143033 | CEFBS_None, // POP2 = 3300 |
| 143034 | CEFBS_None, // POP2P = 3301 |
| 143035 | CEFBS_Not64BitMode, // POP32r = 3302 |
| 143036 | CEFBS_Not64BitMode, // POP32rmm = 3303 |
| 143037 | CEFBS_Not64BitMode, // POP32rmr = 3304 |
| 143038 | CEFBS_In64BitMode, // POP64r = 3305 |
| 143039 | CEFBS_In64BitMode, // POP64rmm = 3306 |
| 143040 | CEFBS_In64BitMode, // POP64rmr = 3307 |
| 143041 | CEFBS_Not64BitMode, // POPA16 = 3308 |
| 143042 | CEFBS_Not64BitMode, // POPA32 = 3309 |
| 143043 | CEFBS_None, // POPCNT16rm = 3310 |
| 143044 | CEFBS_None, // POPCNT16rm_EVEX = 3311 |
| 143045 | CEFBS_None, // POPCNT16rm_NF = 3312 |
| 143046 | CEFBS_None, // POPCNT16rr = 3313 |
| 143047 | CEFBS_None, // POPCNT16rr_EVEX = 3314 |
| 143048 | CEFBS_None, // POPCNT16rr_NF = 3315 |
| 143049 | CEFBS_None, // POPCNT32rm = 3316 |
| 143050 | CEFBS_None, // POPCNT32rm_EVEX = 3317 |
| 143051 | CEFBS_None, // POPCNT32rm_NF = 3318 |
| 143052 | CEFBS_None, // POPCNT32rr = 3319 |
| 143053 | CEFBS_None, // POPCNT32rr_EVEX = 3320 |
| 143054 | CEFBS_None, // POPCNT32rr_NF = 3321 |
| 143055 | CEFBS_None, // POPCNT64rm = 3322 |
| 143056 | CEFBS_None, // POPCNT64rm_EVEX = 3323 |
| 143057 | CEFBS_None, // POPCNT64rm_NF = 3324 |
| 143058 | CEFBS_None, // POPCNT64rr = 3325 |
| 143059 | CEFBS_None, // POPCNT64rr_EVEX = 3326 |
| 143060 | CEFBS_None, // POPCNT64rr_NF = 3327 |
| 143061 | CEFBS_Not64BitMode, // POPDS16 = 3328 |
| 143062 | CEFBS_Not64BitMode, // POPDS32 = 3329 |
| 143063 | CEFBS_Not64BitMode, // POPES16 = 3330 |
| 143064 | CEFBS_Not64BitMode, // POPES32 = 3331 |
| 143065 | CEFBS_None, // POPF16 = 3332 |
| 143066 | CEFBS_Not64BitMode, // POPF32 = 3333 |
| 143067 | CEFBS_In64BitMode, // POPF64 = 3334 |
| 143068 | CEFBS_None, // POPFS16 = 3335 |
| 143069 | CEFBS_Not64BitMode, // POPFS32 = 3336 |
| 143070 | CEFBS_In64BitMode, // POPFS64 = 3337 |
| 143071 | CEFBS_None, // POPGS16 = 3338 |
| 143072 | CEFBS_Not64BitMode, // POPGS32 = 3339 |
| 143073 | CEFBS_In64BitMode, // POPGS64 = 3340 |
| 143074 | CEFBS_In64BitMode, // POPP64r = 3341 |
| 143075 | CEFBS_Not64BitMode, // POPSS16 = 3342 |
| 143076 | CEFBS_Not64BitMode, // POPSS32 = 3343 |
| 143077 | CEFBS_None, // PORrm = 3344 |
| 143078 | CEFBS_None, // PORrr = 3345 |
| 143079 | CEFBS_None, // PREFETCH = 3346 |
| 143080 | CEFBS_In64BitMode, // PREFETCHIT0 = 3347 |
| 143081 | CEFBS_In64BitMode, // PREFETCHIT1 = 3348 |
| 143082 | CEFBS_None, // PREFETCHNTA = 3349 |
| 143083 | CEFBS_None, // PREFETCHRST2 = 3350 |
| 143084 | CEFBS_None, // PREFETCHT0 = 3351 |
| 143085 | CEFBS_None, // PREFETCHT1 = 3352 |
| 143086 | CEFBS_None, // PREFETCHT2 = 3353 |
| 143087 | CEFBS_None, // PREFETCHW = 3354 |
| 143088 | CEFBS_None, // PREFETCHWT1 = 3355 |
| 143089 | CEFBS_None, // PROBED_ALLOCA_32 = 3356 |
| 143090 | CEFBS_In64BitMode, // PROBED_ALLOCA_64 = 3357 |
| 143091 | CEFBS_None, // PSADBWrm = 3358 |
| 143092 | CEFBS_None, // PSADBWrr = 3359 |
| 143093 | CEFBS_None, // PSHUFBrm = 3360 |
| 143094 | CEFBS_None, // PSHUFBrr = 3361 |
| 143095 | CEFBS_None, // PSHUFDmi = 3362 |
| 143096 | CEFBS_None, // PSHUFDri = 3363 |
| 143097 | CEFBS_None, // PSHUFHWmi = 3364 |
| 143098 | CEFBS_None, // PSHUFHWri = 3365 |
| 143099 | CEFBS_None, // PSHUFLWmi = 3366 |
| 143100 | CEFBS_None, // PSHUFLWri = 3367 |
| 143101 | CEFBS_None, // PSIGNBrm = 3368 |
| 143102 | CEFBS_None, // PSIGNBrr = 3369 |
| 143103 | CEFBS_None, // PSIGNDrm = 3370 |
| 143104 | CEFBS_None, // PSIGNDrr = 3371 |
| 143105 | CEFBS_None, // PSIGNWrm = 3372 |
| 143106 | CEFBS_None, // PSIGNWrr = 3373 |
| 143107 | CEFBS_None, // PSLLDQri = 3374 |
| 143108 | CEFBS_None, // PSLLDri = 3375 |
| 143109 | CEFBS_None, // PSLLDrm = 3376 |
| 143110 | CEFBS_None, // PSLLDrr = 3377 |
| 143111 | CEFBS_None, // PSLLQri = 3378 |
| 143112 | CEFBS_None, // PSLLQrm = 3379 |
| 143113 | CEFBS_None, // PSLLQrr = 3380 |
| 143114 | CEFBS_None, // PSLLWri = 3381 |
| 143115 | CEFBS_None, // PSLLWrm = 3382 |
| 143116 | CEFBS_None, // PSLLWrr = 3383 |
| 143117 | CEFBS_In64BitMode, // PSMASH = 3384 |
| 143118 | CEFBS_None, // PSRADri = 3385 |
| 143119 | CEFBS_None, // PSRADrm = 3386 |
| 143120 | CEFBS_None, // PSRADrr = 3387 |
| 143121 | CEFBS_None, // PSRAWri = 3388 |
| 143122 | CEFBS_None, // PSRAWrm = 3389 |
| 143123 | CEFBS_None, // PSRAWrr = 3390 |
| 143124 | CEFBS_None, // PSRLDQri = 3391 |
| 143125 | CEFBS_None, // PSRLDri = 3392 |
| 143126 | CEFBS_None, // PSRLDrm = 3393 |
| 143127 | CEFBS_None, // PSRLDrr = 3394 |
| 143128 | CEFBS_None, // PSRLQri = 3395 |
| 143129 | CEFBS_None, // PSRLQrm = 3396 |
| 143130 | CEFBS_None, // PSRLQrr = 3397 |
| 143131 | CEFBS_None, // PSRLWri = 3398 |
| 143132 | CEFBS_None, // PSRLWrm = 3399 |
| 143133 | CEFBS_None, // PSRLWrr = 3400 |
| 143134 | CEFBS_None, // PSUBBrm = 3401 |
| 143135 | CEFBS_None, // PSUBBrr = 3402 |
| 143136 | CEFBS_None, // PSUBDrm = 3403 |
| 143137 | CEFBS_None, // PSUBDrr = 3404 |
| 143138 | CEFBS_None, // PSUBQrm = 3405 |
| 143139 | CEFBS_None, // PSUBQrr = 3406 |
| 143140 | CEFBS_None, // PSUBSBrm = 3407 |
| 143141 | CEFBS_None, // PSUBSBrr = 3408 |
| 143142 | CEFBS_None, // PSUBSWrm = 3409 |
| 143143 | CEFBS_None, // PSUBSWrr = 3410 |
| 143144 | CEFBS_None, // PSUBUSBrm = 3411 |
| 143145 | CEFBS_None, // PSUBUSBrr = 3412 |
| 143146 | CEFBS_None, // PSUBUSWrm = 3413 |
| 143147 | CEFBS_None, // PSUBUSWrr = 3414 |
| 143148 | CEFBS_None, // PSUBWrm = 3415 |
| 143149 | CEFBS_None, // PSUBWrr = 3416 |
| 143150 | CEFBS_None, // PSWAPDrm = 3417 |
| 143151 | CEFBS_None, // PSWAPDrr = 3418 |
| 143152 | CEFBS_In64BitMode, // PT2RPNTLVWZ0 = 3419 |
| 143153 | CEFBS_In64BitMode, // PT2RPNTLVWZ0RS = 3420 |
| 143154 | CEFBS_In64BitMode, // PT2RPNTLVWZ0RST1 = 3421 |
| 143155 | CEFBS_In64BitMode, // PT2RPNTLVWZ0T1 = 3422 |
| 143156 | CEFBS_In64BitMode, // PT2RPNTLVWZ1 = 3423 |
| 143157 | CEFBS_In64BitMode, // PT2RPNTLVWZ1RS = 3424 |
| 143158 | CEFBS_In64BitMode, // PT2RPNTLVWZ1RST1 = 3425 |
| 143159 | CEFBS_In64BitMode, // PT2RPNTLVWZ1T1 = 3426 |
| 143160 | CEFBS_In64BitMode, // PTCMMIMFP16PS = 3427 |
| 143161 | CEFBS_In64BitMode, // PTCMMIMFP16PSV = 3428 |
| 143162 | CEFBS_In64BitMode, // PTCMMRLFP16PS = 3429 |
| 143163 | CEFBS_In64BitMode, // PTCMMRLFP16PSV = 3430 |
| 143164 | CEFBS_In64BitMode, // PTCONJTCMMIMFP16PS = 3431 |
| 143165 | CEFBS_In64BitMode, // PTCONJTCMMIMFP16PSV = 3432 |
| 143166 | CEFBS_In64BitMode, // PTCONJTFP16 = 3433 |
| 143167 | CEFBS_In64BitMode, // PTCONJTFP16V = 3434 |
| 143168 | CEFBS_In64BitMode, // PTCVTROWD2PSrre = 3435 |
| 143169 | CEFBS_In64BitMode, // PTCVTROWD2PSrreV = 3436 |
| 143170 | CEFBS_In64BitMode, // PTCVTROWD2PSrri = 3437 |
| 143171 | CEFBS_In64BitMode, // PTCVTROWD2PSrriV = 3438 |
| 143172 | CEFBS_In64BitMode, // PTCVTROWPS2BF16Hrre = 3439 |
| 143173 | CEFBS_In64BitMode, // PTCVTROWPS2BF16HrreV = 3440 |
| 143174 | CEFBS_In64BitMode, // PTCVTROWPS2BF16Hrri = 3441 |
| 143175 | CEFBS_In64BitMode, // PTCVTROWPS2BF16HrriV = 3442 |
| 143176 | CEFBS_In64BitMode, // PTCVTROWPS2BF16Lrre = 3443 |
| 143177 | CEFBS_In64BitMode, // PTCVTROWPS2BF16LrreV = 3444 |
| 143178 | CEFBS_In64BitMode, // PTCVTROWPS2BF16Lrri = 3445 |
| 143179 | CEFBS_In64BitMode, // PTCVTROWPS2BF16LrriV = 3446 |
| 143180 | CEFBS_In64BitMode, // PTCVTROWPS2PHHrre = 3447 |
| 143181 | CEFBS_In64BitMode, // PTCVTROWPS2PHHrreV = 3448 |
| 143182 | CEFBS_In64BitMode, // PTCVTROWPS2PHHrri = 3449 |
| 143183 | CEFBS_In64BitMode, // PTCVTROWPS2PHHrriV = 3450 |
| 143184 | CEFBS_In64BitMode, // PTCVTROWPS2PHLrre = 3451 |
| 143185 | CEFBS_In64BitMode, // PTCVTROWPS2PHLrreV = 3452 |
| 143186 | CEFBS_In64BitMode, // PTCVTROWPS2PHLrri = 3453 |
| 143187 | CEFBS_In64BitMode, // PTCVTROWPS2PHLrriV = 3454 |
| 143188 | CEFBS_In64BitMode, // PTDPBF16PS = 3455 |
| 143189 | CEFBS_In64BitMode, // PTDPBF8PS = 3456 |
| 143190 | CEFBS_In64BitMode, // PTDPBF8PSV = 3457 |
| 143191 | CEFBS_In64BitMode, // PTDPBHF8PS = 3458 |
| 143192 | CEFBS_In64BitMode, // PTDPBHF8PSV = 3459 |
| 143193 | CEFBS_In64BitMode, // PTDPBSSD = 3460 |
| 143194 | CEFBS_In64BitMode, // PTDPBSUD = 3461 |
| 143195 | CEFBS_In64BitMode, // PTDPBUSD = 3462 |
| 143196 | CEFBS_In64BitMode, // PTDPBUUD = 3463 |
| 143197 | CEFBS_In64BitMode, // PTDPFP16PS = 3464 |
| 143198 | CEFBS_In64BitMode, // PTDPHBF8PS = 3465 |
| 143199 | CEFBS_In64BitMode, // PTDPHBF8PSV = 3466 |
| 143200 | CEFBS_In64BitMode, // PTDPHF8PS = 3467 |
| 143201 | CEFBS_In64BitMode, // PTDPHF8PSV = 3468 |
| 143202 | CEFBS_None, // PTESTrm = 3469 |
| 143203 | CEFBS_None, // PTESTrr = 3470 |
| 143204 | CEFBS_In64BitMode, // PTILELOADD = 3471 |
| 143205 | CEFBS_In64BitMode, // PTILELOADDRS = 3472 |
| 143206 | CEFBS_In64BitMode, // PTILELOADDRST1 = 3473 |
| 143207 | CEFBS_In64BitMode, // PTILELOADDT1 = 3474 |
| 143208 | CEFBS_In64BitMode, // PTILEMOVROWrre = 3475 |
| 143209 | CEFBS_In64BitMode, // PTILEMOVROWrreV = 3476 |
| 143210 | CEFBS_In64BitMode, // PTILEMOVROWrri = 3477 |
| 143211 | CEFBS_In64BitMode, // PTILEMOVROWrriV = 3478 |
| 143212 | CEFBS_In64BitMode, // PTILESTORED = 3479 |
| 143213 | CEFBS_In64BitMode, // PTILEZERO = 3480 |
| 143214 | CEFBS_In64BitMode, // PTMMULTF32PS = 3481 |
| 143215 | CEFBS_In64BitMode, // PTMMULTF32PSV = 3482 |
| 143216 | CEFBS_In64BitMode, // PTTCMMIMFP16PS = 3483 |
| 143217 | CEFBS_In64BitMode, // PTTCMMIMFP16PSV = 3484 |
| 143218 | CEFBS_In64BitMode, // PTTCMMRLFP16PS = 3485 |
| 143219 | CEFBS_In64BitMode, // PTTCMMRLFP16PSV = 3486 |
| 143220 | CEFBS_In64BitMode, // PTTDPBF16PS = 3487 |
| 143221 | CEFBS_In64BitMode, // PTTDPBF16PSV = 3488 |
| 143222 | CEFBS_In64BitMode, // PTTDPFP16PS = 3489 |
| 143223 | CEFBS_In64BitMode, // PTTDPFP16PSV = 3490 |
| 143224 | CEFBS_In64BitMode, // PTTMMULTF32PS = 3491 |
| 143225 | CEFBS_In64BitMode, // PTTMMULTF32PSV = 3492 |
| 143226 | CEFBS_In64BitMode, // PTTRANSPOSED = 3493 |
| 143227 | CEFBS_In64BitMode, // PTTRANSPOSEDV = 3494 |
| 143228 | CEFBS_In64BitMode, // PTWRITE64m = 3495 |
| 143229 | CEFBS_In64BitMode, // PTWRITE64r = 3496 |
| 143230 | CEFBS_None, // PTWRITEm = 3497 |
| 143231 | CEFBS_None, // PTWRITEr = 3498 |
| 143232 | CEFBS_None, // PUNPCKHBWrm = 3499 |
| 143233 | CEFBS_None, // PUNPCKHBWrr = 3500 |
| 143234 | CEFBS_None, // PUNPCKHDQrm = 3501 |
| 143235 | CEFBS_None, // PUNPCKHDQrr = 3502 |
| 143236 | CEFBS_None, // PUNPCKHQDQrm = 3503 |
| 143237 | CEFBS_None, // PUNPCKHQDQrr = 3504 |
| 143238 | CEFBS_None, // PUNPCKHWDrm = 3505 |
| 143239 | CEFBS_None, // PUNPCKHWDrr = 3506 |
| 143240 | CEFBS_None, // PUNPCKLBWrm = 3507 |
| 143241 | CEFBS_None, // PUNPCKLBWrr = 3508 |
| 143242 | CEFBS_None, // PUNPCKLDQrm = 3509 |
| 143243 | CEFBS_None, // PUNPCKLDQrr = 3510 |
| 143244 | CEFBS_None, // PUNPCKLQDQrm = 3511 |
| 143245 | CEFBS_None, // PUNPCKLQDQrr = 3512 |
| 143246 | CEFBS_None, // PUNPCKLWDrm = 3513 |
| 143247 | CEFBS_None, // PUNPCKLWDrr = 3514 |
| 143248 | CEFBS_None, // PUSH16i = 3515 |
| 143249 | CEFBS_None, // PUSH16i8 = 3516 |
| 143250 | CEFBS_None, // PUSH16r = 3517 |
| 143251 | CEFBS_None, // PUSH16rmm = 3518 |
| 143252 | CEFBS_None, // PUSH16rmr = 3519 |
| 143253 | CEFBS_None, // PUSH2 = 3520 |
| 143254 | CEFBS_None, // PUSH2P = 3521 |
| 143255 | CEFBS_Not64BitMode, // PUSH32i = 3522 |
| 143256 | CEFBS_Not64BitMode, // PUSH32i8 = 3523 |
| 143257 | CEFBS_Not64BitMode, // PUSH32r = 3524 |
| 143258 | CEFBS_Not64BitMode, // PUSH32rmm = 3525 |
| 143259 | CEFBS_Not64BitMode, // PUSH32rmr = 3526 |
| 143260 | CEFBS_In64BitMode, // PUSH64i32 = 3527 |
| 143261 | CEFBS_In64BitMode, // PUSH64i8 = 3528 |
| 143262 | CEFBS_In64BitMode, // PUSH64r = 3529 |
| 143263 | CEFBS_In64BitMode, // PUSH64rmm = 3530 |
| 143264 | CEFBS_In64BitMode, // PUSH64rmr = 3531 |
| 143265 | CEFBS_Not64BitMode, // PUSHA16 = 3532 |
| 143266 | CEFBS_Not64BitMode, // PUSHA32 = 3533 |
| 143267 | CEFBS_Not64BitMode, // PUSHCS16 = 3534 |
| 143268 | CEFBS_Not64BitMode, // PUSHCS32 = 3535 |
| 143269 | CEFBS_Not64BitMode, // PUSHDS16 = 3536 |
| 143270 | CEFBS_Not64BitMode, // PUSHDS32 = 3537 |
| 143271 | CEFBS_Not64BitMode, // PUSHES16 = 3538 |
| 143272 | CEFBS_Not64BitMode, // PUSHES32 = 3539 |
| 143273 | CEFBS_None, // PUSHF16 = 3540 |
| 143274 | CEFBS_Not64BitMode, // PUSHF32 = 3541 |
| 143275 | CEFBS_In64BitMode, // PUSHF64 = 3542 |
| 143276 | CEFBS_None, // PUSHFS16 = 3543 |
| 143277 | CEFBS_Not64BitMode, // PUSHFS32 = 3544 |
| 143278 | CEFBS_In64BitMode, // PUSHFS64 = 3545 |
| 143279 | CEFBS_None, // PUSHGS16 = 3546 |
| 143280 | CEFBS_Not64BitMode, // PUSHGS32 = 3547 |
| 143281 | CEFBS_In64BitMode, // PUSHGS64 = 3548 |
| 143282 | CEFBS_In64BitMode, // PUSHP64r = 3549 |
| 143283 | CEFBS_Not64BitMode, // PUSHSS16 = 3550 |
| 143284 | CEFBS_Not64BitMode, // PUSHSS32 = 3551 |
| 143285 | CEFBS_Not64BitMode, // PVALIDATE32 = 3552 |
| 143286 | CEFBS_In64BitMode, // PVALIDATE64 = 3553 |
| 143287 | CEFBS_None, // PXORrm = 3554 |
| 143288 | CEFBS_None, // PXORrr = 3555 |
| 143289 | CEFBS_None, // RCL16m1 = 3556 |
| 143290 | CEFBS_In64BitMode, // RCL16m1_EVEX = 3557 |
| 143291 | CEFBS_In64BitMode, // RCL16m1_ND = 3558 |
| 143292 | CEFBS_None, // RCL16mCL = 3559 |
| 143293 | CEFBS_In64BitMode, // RCL16mCL_EVEX = 3560 |
| 143294 | CEFBS_In64BitMode, // RCL16mCL_ND = 3561 |
| 143295 | CEFBS_None, // RCL16mi = 3562 |
| 143296 | CEFBS_In64BitMode, // RCL16mi_EVEX = 3563 |
| 143297 | CEFBS_In64BitMode, // RCL16mi_ND = 3564 |
| 143298 | CEFBS_None, // RCL16r1 = 3565 |
| 143299 | CEFBS_In64BitMode, // RCL16r1_EVEX = 3566 |
| 143300 | CEFBS_In64BitMode, // RCL16r1_ND = 3567 |
| 143301 | CEFBS_None, // RCL16rCL = 3568 |
| 143302 | CEFBS_In64BitMode, // RCL16rCL_EVEX = 3569 |
| 143303 | CEFBS_In64BitMode, // RCL16rCL_ND = 3570 |
| 143304 | CEFBS_None, // RCL16ri = 3571 |
| 143305 | CEFBS_In64BitMode, // RCL16ri_EVEX = 3572 |
| 143306 | CEFBS_In64BitMode, // RCL16ri_ND = 3573 |
| 143307 | CEFBS_None, // RCL32m1 = 3574 |
| 143308 | CEFBS_In64BitMode, // RCL32m1_EVEX = 3575 |
| 143309 | CEFBS_In64BitMode, // RCL32m1_ND = 3576 |
| 143310 | CEFBS_None, // RCL32mCL = 3577 |
| 143311 | CEFBS_In64BitMode, // RCL32mCL_EVEX = 3578 |
| 143312 | CEFBS_In64BitMode, // RCL32mCL_ND = 3579 |
| 143313 | CEFBS_None, // RCL32mi = 3580 |
| 143314 | CEFBS_In64BitMode, // RCL32mi_EVEX = 3581 |
| 143315 | CEFBS_In64BitMode, // RCL32mi_ND = 3582 |
| 143316 | CEFBS_None, // RCL32r1 = 3583 |
| 143317 | CEFBS_In64BitMode, // RCL32r1_EVEX = 3584 |
| 143318 | CEFBS_In64BitMode, // RCL32r1_ND = 3585 |
| 143319 | CEFBS_None, // RCL32rCL = 3586 |
| 143320 | CEFBS_In64BitMode, // RCL32rCL_EVEX = 3587 |
| 143321 | CEFBS_In64BitMode, // RCL32rCL_ND = 3588 |
| 143322 | CEFBS_None, // RCL32ri = 3589 |
| 143323 | CEFBS_In64BitMode, // RCL32ri_EVEX = 3590 |
| 143324 | CEFBS_In64BitMode, // RCL32ri_ND = 3591 |
| 143325 | CEFBS_In64BitMode, // RCL64m1 = 3592 |
| 143326 | CEFBS_In64BitMode, // RCL64m1_EVEX = 3593 |
| 143327 | CEFBS_In64BitMode, // RCL64m1_ND = 3594 |
| 143328 | CEFBS_In64BitMode, // RCL64mCL = 3595 |
| 143329 | CEFBS_In64BitMode, // RCL64mCL_EVEX = 3596 |
| 143330 | CEFBS_In64BitMode, // RCL64mCL_ND = 3597 |
| 143331 | CEFBS_In64BitMode, // RCL64mi = 3598 |
| 143332 | CEFBS_In64BitMode, // RCL64mi_EVEX = 3599 |
| 143333 | CEFBS_In64BitMode, // RCL64mi_ND = 3600 |
| 143334 | CEFBS_None, // RCL64r1 = 3601 |
| 143335 | CEFBS_In64BitMode, // RCL64r1_EVEX = 3602 |
| 143336 | CEFBS_In64BitMode, // RCL64r1_ND = 3603 |
| 143337 | CEFBS_None, // RCL64rCL = 3604 |
| 143338 | CEFBS_In64BitMode, // RCL64rCL_EVEX = 3605 |
| 143339 | CEFBS_In64BitMode, // RCL64rCL_ND = 3606 |
| 143340 | CEFBS_None, // RCL64ri = 3607 |
| 143341 | CEFBS_In64BitMode, // RCL64ri_EVEX = 3608 |
| 143342 | CEFBS_In64BitMode, // RCL64ri_ND = 3609 |
| 143343 | CEFBS_None, // RCL8m1 = 3610 |
| 143344 | CEFBS_In64BitMode, // RCL8m1_EVEX = 3611 |
| 143345 | CEFBS_In64BitMode, // RCL8m1_ND = 3612 |
| 143346 | CEFBS_None, // RCL8mCL = 3613 |
| 143347 | CEFBS_In64BitMode, // RCL8mCL_EVEX = 3614 |
| 143348 | CEFBS_In64BitMode, // RCL8mCL_ND = 3615 |
| 143349 | CEFBS_None, // RCL8mi = 3616 |
| 143350 | CEFBS_In64BitMode, // RCL8mi_EVEX = 3617 |
| 143351 | CEFBS_In64BitMode, // RCL8mi_ND = 3618 |
| 143352 | CEFBS_None, // RCL8r1 = 3619 |
| 143353 | CEFBS_In64BitMode, // RCL8r1_EVEX = 3620 |
| 143354 | CEFBS_In64BitMode, // RCL8r1_ND = 3621 |
| 143355 | CEFBS_None, // RCL8rCL = 3622 |
| 143356 | CEFBS_In64BitMode, // RCL8rCL_EVEX = 3623 |
| 143357 | CEFBS_In64BitMode, // RCL8rCL_ND = 3624 |
| 143358 | CEFBS_None, // RCL8ri = 3625 |
| 143359 | CEFBS_In64BitMode, // RCL8ri_EVEX = 3626 |
| 143360 | CEFBS_In64BitMode, // RCL8ri_ND = 3627 |
| 143361 | CEFBS_None, // RCPPSm = 3628 |
| 143362 | CEFBS_None, // RCPPSr = 3629 |
| 143363 | CEFBS_None, // RCPSSm = 3630 |
| 143364 | CEFBS_None, // RCPSSm_Int = 3631 |
| 143365 | CEFBS_None, // RCPSSr = 3632 |
| 143366 | CEFBS_None, // RCPSSr_Int = 3633 |
| 143367 | CEFBS_None, // RCR16m1 = 3634 |
| 143368 | CEFBS_In64BitMode, // RCR16m1_EVEX = 3635 |
| 143369 | CEFBS_In64BitMode, // RCR16m1_ND = 3636 |
| 143370 | CEFBS_None, // RCR16mCL = 3637 |
| 143371 | CEFBS_In64BitMode, // RCR16mCL_EVEX = 3638 |
| 143372 | CEFBS_In64BitMode, // RCR16mCL_ND = 3639 |
| 143373 | CEFBS_None, // RCR16mi = 3640 |
| 143374 | CEFBS_In64BitMode, // RCR16mi_EVEX = 3641 |
| 143375 | CEFBS_In64BitMode, // RCR16mi_ND = 3642 |
| 143376 | CEFBS_None, // RCR16r1 = 3643 |
| 143377 | CEFBS_In64BitMode, // RCR16r1_EVEX = 3644 |
| 143378 | CEFBS_In64BitMode, // RCR16r1_ND = 3645 |
| 143379 | CEFBS_None, // RCR16rCL = 3646 |
| 143380 | CEFBS_In64BitMode, // RCR16rCL_EVEX = 3647 |
| 143381 | CEFBS_In64BitMode, // RCR16rCL_ND = 3648 |
| 143382 | CEFBS_None, // RCR16ri = 3649 |
| 143383 | CEFBS_In64BitMode, // RCR16ri_EVEX = 3650 |
| 143384 | CEFBS_In64BitMode, // RCR16ri_ND = 3651 |
| 143385 | CEFBS_None, // RCR32m1 = 3652 |
| 143386 | CEFBS_In64BitMode, // RCR32m1_EVEX = 3653 |
| 143387 | CEFBS_In64BitMode, // RCR32m1_ND = 3654 |
| 143388 | CEFBS_None, // RCR32mCL = 3655 |
| 143389 | CEFBS_In64BitMode, // RCR32mCL_EVEX = 3656 |
| 143390 | CEFBS_In64BitMode, // RCR32mCL_ND = 3657 |
| 143391 | CEFBS_None, // RCR32mi = 3658 |
| 143392 | CEFBS_In64BitMode, // RCR32mi_EVEX = 3659 |
| 143393 | CEFBS_In64BitMode, // RCR32mi_ND = 3660 |
| 143394 | CEFBS_None, // RCR32r1 = 3661 |
| 143395 | CEFBS_In64BitMode, // RCR32r1_EVEX = 3662 |
| 143396 | CEFBS_In64BitMode, // RCR32r1_ND = 3663 |
| 143397 | CEFBS_None, // RCR32rCL = 3664 |
| 143398 | CEFBS_In64BitMode, // RCR32rCL_EVEX = 3665 |
| 143399 | CEFBS_In64BitMode, // RCR32rCL_ND = 3666 |
| 143400 | CEFBS_None, // RCR32ri = 3667 |
| 143401 | CEFBS_In64BitMode, // RCR32ri_EVEX = 3668 |
| 143402 | CEFBS_In64BitMode, // RCR32ri_ND = 3669 |
| 143403 | CEFBS_In64BitMode, // RCR64m1 = 3670 |
| 143404 | CEFBS_In64BitMode, // RCR64m1_EVEX = 3671 |
| 143405 | CEFBS_In64BitMode, // RCR64m1_ND = 3672 |
| 143406 | CEFBS_In64BitMode, // RCR64mCL = 3673 |
| 143407 | CEFBS_In64BitMode, // RCR64mCL_EVEX = 3674 |
| 143408 | CEFBS_In64BitMode, // RCR64mCL_ND = 3675 |
| 143409 | CEFBS_In64BitMode, // RCR64mi = 3676 |
| 143410 | CEFBS_In64BitMode, // RCR64mi_EVEX = 3677 |
| 143411 | CEFBS_In64BitMode, // RCR64mi_ND = 3678 |
| 143412 | CEFBS_None, // RCR64r1 = 3679 |
| 143413 | CEFBS_In64BitMode, // RCR64r1_EVEX = 3680 |
| 143414 | CEFBS_In64BitMode, // RCR64r1_ND = 3681 |
| 143415 | CEFBS_None, // RCR64rCL = 3682 |
| 143416 | CEFBS_In64BitMode, // RCR64rCL_EVEX = 3683 |
| 143417 | CEFBS_In64BitMode, // RCR64rCL_ND = 3684 |
| 143418 | CEFBS_None, // RCR64ri = 3685 |
| 143419 | CEFBS_In64BitMode, // RCR64ri_EVEX = 3686 |
| 143420 | CEFBS_In64BitMode, // RCR64ri_ND = 3687 |
| 143421 | CEFBS_None, // RCR8m1 = 3688 |
| 143422 | CEFBS_In64BitMode, // RCR8m1_EVEX = 3689 |
| 143423 | CEFBS_In64BitMode, // RCR8m1_ND = 3690 |
| 143424 | CEFBS_None, // RCR8mCL = 3691 |
| 143425 | CEFBS_In64BitMode, // RCR8mCL_EVEX = 3692 |
| 143426 | CEFBS_In64BitMode, // RCR8mCL_ND = 3693 |
| 143427 | CEFBS_None, // RCR8mi = 3694 |
| 143428 | CEFBS_In64BitMode, // RCR8mi_EVEX = 3695 |
| 143429 | CEFBS_In64BitMode, // RCR8mi_ND = 3696 |
| 143430 | CEFBS_None, // RCR8r1 = 3697 |
| 143431 | CEFBS_In64BitMode, // RCR8r1_EVEX = 3698 |
| 143432 | CEFBS_In64BitMode, // RCR8r1_ND = 3699 |
| 143433 | CEFBS_None, // RCR8rCL = 3700 |
| 143434 | CEFBS_In64BitMode, // RCR8rCL_EVEX = 3701 |
| 143435 | CEFBS_In64BitMode, // RCR8rCL_ND = 3702 |
| 143436 | CEFBS_None, // RCR8ri = 3703 |
| 143437 | CEFBS_In64BitMode, // RCR8ri_EVEX = 3704 |
| 143438 | CEFBS_In64BitMode, // RCR8ri_ND = 3705 |
| 143439 | CEFBS_In64BitMode, // RDFSBASE = 3706 |
| 143440 | CEFBS_In64BitMode, // RDFSBASE64 = 3707 |
| 143441 | CEFBS_In64BitMode, // RDGSBASE = 3708 |
| 143442 | CEFBS_In64BitMode, // RDGSBASE64 = 3709 |
| 143443 | CEFBS_None, // RDMSR = 3710 |
| 143444 | CEFBS_In64BitMode, // RDMSRLIST = 3711 |
| 143445 | CEFBS_None, // RDMSRri = 3712 |
| 143446 | CEFBS_In64BitMode, // RDMSRri_EVEX = 3713 |
| 143447 | CEFBS_Not64BitMode, // RDPID32 = 3714 |
| 143448 | CEFBS_In64BitMode, // RDPID64 = 3715 |
| 143449 | CEFBS_None, // RDPKRUr = 3716 |
| 143450 | CEFBS_None, // RDPMC = 3717 |
| 143451 | CEFBS_None, // RDPRU = 3718 |
| 143452 | CEFBS_None, // RDRAND16r = 3719 |
| 143453 | CEFBS_None, // RDRAND32r = 3720 |
| 143454 | CEFBS_None, // RDRAND64r = 3721 |
| 143455 | CEFBS_None, // RDSEED16r = 3722 |
| 143456 | CEFBS_None, // RDSEED32r = 3723 |
| 143457 | CEFBS_None, // RDSEED64r = 3724 |
| 143458 | CEFBS_None, // RDSSPD = 3725 |
| 143459 | CEFBS_None, // RDSSPQ = 3726 |
| 143460 | CEFBS_None, // RDTSC = 3727 |
| 143461 | CEFBS_None, // RDTSCP = 3728 |
| 143462 | CEFBS_None, // REPNE_PREFIX = 3729 |
| 143463 | CEFBS_None, // REP_MOVSB_32 = 3730 |
| 143464 | CEFBS_None, // REP_MOVSB_64 = 3731 |
| 143465 | CEFBS_None, // REP_MOVSD_32 = 3732 |
| 143466 | CEFBS_None, // REP_MOVSD_64 = 3733 |
| 143467 | CEFBS_In64BitMode, // REP_MOVSQ_32 = 3734 |
| 143468 | CEFBS_None, // REP_MOVSQ_64 = 3735 |
| 143469 | CEFBS_None, // REP_MOVSW_32 = 3736 |
| 143470 | CEFBS_None, // REP_MOVSW_64 = 3737 |
| 143471 | CEFBS_None, // REP_PREFIX = 3738 |
| 143472 | CEFBS_None, // REP_STOSB_32 = 3739 |
| 143473 | CEFBS_None, // REP_STOSB_64 = 3740 |
| 143474 | CEFBS_None, // REP_STOSD_32 = 3741 |
| 143475 | CEFBS_None, // REP_STOSD_64 = 3742 |
| 143476 | CEFBS_In64BitMode, // REP_STOSQ_32 = 3743 |
| 143477 | CEFBS_None, // REP_STOSQ_64 = 3744 |
| 143478 | CEFBS_None, // REP_STOSW_32 = 3745 |
| 143479 | CEFBS_None, // REP_STOSW_64 = 3746 |
| 143480 | CEFBS_None, // RET = 3747 |
| 143481 | CEFBS_None, // RET16 = 3748 |
| 143482 | CEFBS_Not64BitMode, // RET32 = 3749 |
| 143483 | CEFBS_In64BitMode, // RET64 = 3750 |
| 143484 | CEFBS_None, // RETI16 = 3751 |
| 143485 | CEFBS_Not64BitMode, // RETI32 = 3752 |
| 143486 | CEFBS_In64BitMode, // RETI64 = 3753 |
| 143487 | CEFBS_In64BitMode, // REX64_PREFIX = 3754 |
| 143488 | CEFBS_In64BitMode, // RMPADJUST = 3755 |
| 143489 | CEFBS_In64BitMode, // RMPQUERY = 3756 |
| 143490 | CEFBS_In64BitMode, // RMPUPDATE = 3757 |
| 143491 | CEFBS_None, // ROL16m1 = 3758 |
| 143492 | CEFBS_In64BitMode, // ROL16m1_EVEX = 3759 |
| 143493 | CEFBS_In64BitMode, // ROL16m1_ND = 3760 |
| 143494 | CEFBS_In64BitMode, // ROL16m1_NF = 3761 |
| 143495 | CEFBS_In64BitMode, // ROL16m1_NF_ND = 3762 |
| 143496 | CEFBS_None, // ROL16mCL = 3763 |
| 143497 | CEFBS_In64BitMode, // ROL16mCL_EVEX = 3764 |
| 143498 | CEFBS_In64BitMode, // ROL16mCL_ND = 3765 |
| 143499 | CEFBS_In64BitMode, // ROL16mCL_NF = 3766 |
| 143500 | CEFBS_In64BitMode, // ROL16mCL_NF_ND = 3767 |
| 143501 | CEFBS_None, // ROL16mi = 3768 |
| 143502 | CEFBS_In64BitMode, // ROL16mi_EVEX = 3769 |
| 143503 | CEFBS_In64BitMode, // ROL16mi_ND = 3770 |
| 143504 | CEFBS_In64BitMode, // ROL16mi_NF = 3771 |
| 143505 | CEFBS_In64BitMode, // ROL16mi_NF_ND = 3772 |
| 143506 | CEFBS_None, // ROL16r1 = 3773 |
| 143507 | CEFBS_In64BitMode, // ROL16r1_EVEX = 3774 |
| 143508 | CEFBS_In64BitMode, // ROL16r1_ND = 3775 |
| 143509 | CEFBS_In64BitMode, // ROL16r1_NF = 3776 |
| 143510 | CEFBS_In64BitMode, // ROL16r1_NF_ND = 3777 |
| 143511 | CEFBS_None, // ROL16rCL = 3778 |
| 143512 | CEFBS_In64BitMode, // ROL16rCL_EVEX = 3779 |
| 143513 | CEFBS_In64BitMode, // ROL16rCL_ND = 3780 |
| 143514 | CEFBS_In64BitMode, // ROL16rCL_NF = 3781 |
| 143515 | CEFBS_In64BitMode, // ROL16rCL_NF_ND = 3782 |
| 143516 | CEFBS_None, // ROL16ri = 3783 |
| 143517 | CEFBS_In64BitMode, // ROL16ri_EVEX = 3784 |
| 143518 | CEFBS_In64BitMode, // ROL16ri_ND = 3785 |
| 143519 | CEFBS_In64BitMode, // ROL16ri_NF = 3786 |
| 143520 | CEFBS_In64BitMode, // ROL16ri_NF_ND = 3787 |
| 143521 | CEFBS_None, // ROL32m1 = 3788 |
| 143522 | CEFBS_In64BitMode, // ROL32m1_EVEX = 3789 |
| 143523 | CEFBS_In64BitMode, // ROL32m1_ND = 3790 |
| 143524 | CEFBS_In64BitMode, // ROL32m1_NF = 3791 |
| 143525 | CEFBS_In64BitMode, // ROL32m1_NF_ND = 3792 |
| 143526 | CEFBS_None, // ROL32mCL = 3793 |
| 143527 | CEFBS_In64BitMode, // ROL32mCL_EVEX = 3794 |
| 143528 | CEFBS_In64BitMode, // ROL32mCL_ND = 3795 |
| 143529 | CEFBS_In64BitMode, // ROL32mCL_NF = 3796 |
| 143530 | CEFBS_In64BitMode, // ROL32mCL_NF_ND = 3797 |
| 143531 | CEFBS_None, // ROL32mi = 3798 |
| 143532 | CEFBS_In64BitMode, // ROL32mi_EVEX = 3799 |
| 143533 | CEFBS_In64BitMode, // ROL32mi_ND = 3800 |
| 143534 | CEFBS_In64BitMode, // ROL32mi_NF = 3801 |
| 143535 | CEFBS_In64BitMode, // ROL32mi_NF_ND = 3802 |
| 143536 | CEFBS_None, // ROL32r1 = 3803 |
| 143537 | CEFBS_In64BitMode, // ROL32r1_EVEX = 3804 |
| 143538 | CEFBS_In64BitMode, // ROL32r1_ND = 3805 |
| 143539 | CEFBS_In64BitMode, // ROL32r1_NF = 3806 |
| 143540 | CEFBS_In64BitMode, // ROL32r1_NF_ND = 3807 |
| 143541 | CEFBS_None, // ROL32rCL = 3808 |
| 143542 | CEFBS_In64BitMode, // ROL32rCL_EVEX = 3809 |
| 143543 | CEFBS_In64BitMode, // ROL32rCL_ND = 3810 |
| 143544 | CEFBS_In64BitMode, // ROL32rCL_NF = 3811 |
| 143545 | CEFBS_In64BitMode, // ROL32rCL_NF_ND = 3812 |
| 143546 | CEFBS_None, // ROL32ri = 3813 |
| 143547 | CEFBS_In64BitMode, // ROL32ri_EVEX = 3814 |
| 143548 | CEFBS_In64BitMode, // ROL32ri_ND = 3815 |
| 143549 | CEFBS_In64BitMode, // ROL32ri_NF = 3816 |
| 143550 | CEFBS_In64BitMode, // ROL32ri_NF_ND = 3817 |
| 143551 | CEFBS_In64BitMode, // ROL64m1 = 3818 |
| 143552 | CEFBS_In64BitMode, // ROL64m1_EVEX = 3819 |
| 143553 | CEFBS_In64BitMode, // ROL64m1_ND = 3820 |
| 143554 | CEFBS_In64BitMode, // ROL64m1_NF = 3821 |
| 143555 | CEFBS_In64BitMode, // ROL64m1_NF_ND = 3822 |
| 143556 | CEFBS_In64BitMode, // ROL64mCL = 3823 |
| 143557 | CEFBS_In64BitMode, // ROL64mCL_EVEX = 3824 |
| 143558 | CEFBS_In64BitMode, // ROL64mCL_ND = 3825 |
| 143559 | CEFBS_In64BitMode, // ROL64mCL_NF = 3826 |
| 143560 | CEFBS_In64BitMode, // ROL64mCL_NF_ND = 3827 |
| 143561 | CEFBS_In64BitMode, // ROL64mi = 3828 |
| 143562 | CEFBS_In64BitMode, // ROL64mi_EVEX = 3829 |
| 143563 | CEFBS_In64BitMode, // ROL64mi_ND = 3830 |
| 143564 | CEFBS_In64BitMode, // ROL64mi_NF = 3831 |
| 143565 | CEFBS_In64BitMode, // ROL64mi_NF_ND = 3832 |
| 143566 | CEFBS_None, // ROL64r1 = 3833 |
| 143567 | CEFBS_In64BitMode, // ROL64r1_EVEX = 3834 |
| 143568 | CEFBS_In64BitMode, // ROL64r1_ND = 3835 |
| 143569 | CEFBS_In64BitMode, // ROL64r1_NF = 3836 |
| 143570 | CEFBS_In64BitMode, // ROL64r1_NF_ND = 3837 |
| 143571 | CEFBS_None, // ROL64rCL = 3838 |
| 143572 | CEFBS_In64BitMode, // ROL64rCL_EVEX = 3839 |
| 143573 | CEFBS_In64BitMode, // ROL64rCL_ND = 3840 |
| 143574 | CEFBS_In64BitMode, // ROL64rCL_NF = 3841 |
| 143575 | CEFBS_In64BitMode, // ROL64rCL_NF_ND = 3842 |
| 143576 | CEFBS_None, // ROL64ri = 3843 |
| 143577 | CEFBS_In64BitMode, // ROL64ri_EVEX = 3844 |
| 143578 | CEFBS_In64BitMode, // ROL64ri_ND = 3845 |
| 143579 | CEFBS_In64BitMode, // ROL64ri_NF = 3846 |
| 143580 | CEFBS_In64BitMode, // ROL64ri_NF_ND = 3847 |
| 143581 | CEFBS_None, // ROL8m1 = 3848 |
| 143582 | CEFBS_In64BitMode, // ROL8m1_EVEX = 3849 |
| 143583 | CEFBS_In64BitMode, // ROL8m1_ND = 3850 |
| 143584 | CEFBS_In64BitMode, // ROL8m1_NF = 3851 |
| 143585 | CEFBS_In64BitMode, // ROL8m1_NF_ND = 3852 |
| 143586 | CEFBS_None, // ROL8mCL = 3853 |
| 143587 | CEFBS_In64BitMode, // ROL8mCL_EVEX = 3854 |
| 143588 | CEFBS_In64BitMode, // ROL8mCL_ND = 3855 |
| 143589 | CEFBS_In64BitMode, // ROL8mCL_NF = 3856 |
| 143590 | CEFBS_In64BitMode, // ROL8mCL_NF_ND = 3857 |
| 143591 | CEFBS_None, // ROL8mi = 3858 |
| 143592 | CEFBS_In64BitMode, // ROL8mi_EVEX = 3859 |
| 143593 | CEFBS_In64BitMode, // ROL8mi_ND = 3860 |
| 143594 | CEFBS_In64BitMode, // ROL8mi_NF = 3861 |
| 143595 | CEFBS_In64BitMode, // ROL8mi_NF_ND = 3862 |
| 143596 | CEFBS_None, // ROL8r1 = 3863 |
| 143597 | CEFBS_In64BitMode, // ROL8r1_EVEX = 3864 |
| 143598 | CEFBS_In64BitMode, // ROL8r1_ND = 3865 |
| 143599 | CEFBS_In64BitMode, // ROL8r1_NF = 3866 |
| 143600 | CEFBS_In64BitMode, // ROL8r1_NF_ND = 3867 |
| 143601 | CEFBS_None, // ROL8rCL = 3868 |
| 143602 | CEFBS_In64BitMode, // ROL8rCL_EVEX = 3869 |
| 143603 | CEFBS_In64BitMode, // ROL8rCL_ND = 3870 |
| 143604 | CEFBS_In64BitMode, // ROL8rCL_NF = 3871 |
| 143605 | CEFBS_In64BitMode, // ROL8rCL_NF_ND = 3872 |
| 143606 | CEFBS_None, // ROL8ri = 3873 |
| 143607 | CEFBS_In64BitMode, // ROL8ri_EVEX = 3874 |
| 143608 | CEFBS_In64BitMode, // ROL8ri_ND = 3875 |
| 143609 | CEFBS_In64BitMode, // ROL8ri_NF = 3876 |
| 143610 | CEFBS_In64BitMode, // ROL8ri_NF_ND = 3877 |
| 143611 | CEFBS_None, // ROR16m1 = 3878 |
| 143612 | CEFBS_In64BitMode, // ROR16m1_EVEX = 3879 |
| 143613 | CEFBS_In64BitMode, // ROR16m1_ND = 3880 |
| 143614 | CEFBS_In64BitMode, // ROR16m1_NF = 3881 |
| 143615 | CEFBS_In64BitMode, // ROR16m1_NF_ND = 3882 |
| 143616 | CEFBS_None, // ROR16mCL = 3883 |
| 143617 | CEFBS_In64BitMode, // ROR16mCL_EVEX = 3884 |
| 143618 | CEFBS_In64BitMode, // ROR16mCL_ND = 3885 |
| 143619 | CEFBS_In64BitMode, // ROR16mCL_NF = 3886 |
| 143620 | CEFBS_In64BitMode, // ROR16mCL_NF_ND = 3887 |
| 143621 | CEFBS_None, // ROR16mi = 3888 |
| 143622 | CEFBS_In64BitMode, // ROR16mi_EVEX = 3889 |
| 143623 | CEFBS_In64BitMode, // ROR16mi_ND = 3890 |
| 143624 | CEFBS_In64BitMode, // ROR16mi_NF = 3891 |
| 143625 | CEFBS_In64BitMode, // ROR16mi_NF_ND = 3892 |
| 143626 | CEFBS_None, // ROR16r1 = 3893 |
| 143627 | CEFBS_In64BitMode, // ROR16r1_EVEX = 3894 |
| 143628 | CEFBS_In64BitMode, // ROR16r1_ND = 3895 |
| 143629 | CEFBS_In64BitMode, // ROR16r1_NF = 3896 |
| 143630 | CEFBS_In64BitMode, // ROR16r1_NF_ND = 3897 |
| 143631 | CEFBS_None, // ROR16rCL = 3898 |
| 143632 | CEFBS_In64BitMode, // ROR16rCL_EVEX = 3899 |
| 143633 | CEFBS_In64BitMode, // ROR16rCL_ND = 3900 |
| 143634 | CEFBS_In64BitMode, // ROR16rCL_NF = 3901 |
| 143635 | CEFBS_In64BitMode, // ROR16rCL_NF_ND = 3902 |
| 143636 | CEFBS_None, // ROR16ri = 3903 |
| 143637 | CEFBS_In64BitMode, // ROR16ri_EVEX = 3904 |
| 143638 | CEFBS_In64BitMode, // ROR16ri_ND = 3905 |
| 143639 | CEFBS_In64BitMode, // ROR16ri_NF = 3906 |
| 143640 | CEFBS_In64BitMode, // ROR16ri_NF_ND = 3907 |
| 143641 | CEFBS_None, // ROR32m1 = 3908 |
| 143642 | CEFBS_In64BitMode, // ROR32m1_EVEX = 3909 |
| 143643 | CEFBS_In64BitMode, // ROR32m1_ND = 3910 |
| 143644 | CEFBS_In64BitMode, // ROR32m1_NF = 3911 |
| 143645 | CEFBS_In64BitMode, // ROR32m1_NF_ND = 3912 |
| 143646 | CEFBS_None, // ROR32mCL = 3913 |
| 143647 | CEFBS_In64BitMode, // ROR32mCL_EVEX = 3914 |
| 143648 | CEFBS_In64BitMode, // ROR32mCL_ND = 3915 |
| 143649 | CEFBS_In64BitMode, // ROR32mCL_NF = 3916 |
| 143650 | CEFBS_In64BitMode, // ROR32mCL_NF_ND = 3917 |
| 143651 | CEFBS_None, // ROR32mi = 3918 |
| 143652 | CEFBS_In64BitMode, // ROR32mi_EVEX = 3919 |
| 143653 | CEFBS_In64BitMode, // ROR32mi_ND = 3920 |
| 143654 | CEFBS_In64BitMode, // ROR32mi_NF = 3921 |
| 143655 | CEFBS_In64BitMode, // ROR32mi_NF_ND = 3922 |
| 143656 | CEFBS_None, // ROR32r1 = 3923 |
| 143657 | CEFBS_In64BitMode, // ROR32r1_EVEX = 3924 |
| 143658 | CEFBS_In64BitMode, // ROR32r1_ND = 3925 |
| 143659 | CEFBS_In64BitMode, // ROR32r1_NF = 3926 |
| 143660 | CEFBS_In64BitMode, // ROR32r1_NF_ND = 3927 |
| 143661 | CEFBS_None, // ROR32rCL = 3928 |
| 143662 | CEFBS_In64BitMode, // ROR32rCL_EVEX = 3929 |
| 143663 | CEFBS_In64BitMode, // ROR32rCL_ND = 3930 |
| 143664 | CEFBS_In64BitMode, // ROR32rCL_NF = 3931 |
| 143665 | CEFBS_In64BitMode, // ROR32rCL_NF_ND = 3932 |
| 143666 | CEFBS_None, // ROR32ri = 3933 |
| 143667 | CEFBS_In64BitMode, // ROR32ri_EVEX = 3934 |
| 143668 | CEFBS_In64BitMode, // ROR32ri_ND = 3935 |
| 143669 | CEFBS_In64BitMode, // ROR32ri_NF = 3936 |
| 143670 | CEFBS_In64BitMode, // ROR32ri_NF_ND = 3937 |
| 143671 | CEFBS_In64BitMode, // ROR64m1 = 3938 |
| 143672 | CEFBS_In64BitMode, // ROR64m1_EVEX = 3939 |
| 143673 | CEFBS_In64BitMode, // ROR64m1_ND = 3940 |
| 143674 | CEFBS_In64BitMode, // ROR64m1_NF = 3941 |
| 143675 | CEFBS_In64BitMode, // ROR64m1_NF_ND = 3942 |
| 143676 | CEFBS_In64BitMode, // ROR64mCL = 3943 |
| 143677 | CEFBS_In64BitMode, // ROR64mCL_EVEX = 3944 |
| 143678 | CEFBS_In64BitMode, // ROR64mCL_ND = 3945 |
| 143679 | CEFBS_In64BitMode, // ROR64mCL_NF = 3946 |
| 143680 | CEFBS_In64BitMode, // ROR64mCL_NF_ND = 3947 |
| 143681 | CEFBS_In64BitMode, // ROR64mi = 3948 |
| 143682 | CEFBS_In64BitMode, // ROR64mi_EVEX = 3949 |
| 143683 | CEFBS_In64BitMode, // ROR64mi_ND = 3950 |
| 143684 | CEFBS_In64BitMode, // ROR64mi_NF = 3951 |
| 143685 | CEFBS_In64BitMode, // ROR64mi_NF_ND = 3952 |
| 143686 | CEFBS_None, // ROR64r1 = 3953 |
| 143687 | CEFBS_In64BitMode, // ROR64r1_EVEX = 3954 |
| 143688 | CEFBS_In64BitMode, // ROR64r1_ND = 3955 |
| 143689 | CEFBS_In64BitMode, // ROR64r1_NF = 3956 |
| 143690 | CEFBS_In64BitMode, // ROR64r1_NF_ND = 3957 |
| 143691 | CEFBS_None, // ROR64rCL = 3958 |
| 143692 | CEFBS_In64BitMode, // ROR64rCL_EVEX = 3959 |
| 143693 | CEFBS_In64BitMode, // ROR64rCL_ND = 3960 |
| 143694 | CEFBS_In64BitMode, // ROR64rCL_NF = 3961 |
| 143695 | CEFBS_In64BitMode, // ROR64rCL_NF_ND = 3962 |
| 143696 | CEFBS_None, // ROR64ri = 3963 |
| 143697 | CEFBS_In64BitMode, // ROR64ri_EVEX = 3964 |
| 143698 | CEFBS_In64BitMode, // ROR64ri_ND = 3965 |
| 143699 | CEFBS_In64BitMode, // ROR64ri_NF = 3966 |
| 143700 | CEFBS_In64BitMode, // ROR64ri_NF_ND = 3967 |
| 143701 | CEFBS_None, // ROR8m1 = 3968 |
| 143702 | CEFBS_In64BitMode, // ROR8m1_EVEX = 3969 |
| 143703 | CEFBS_In64BitMode, // ROR8m1_ND = 3970 |
| 143704 | CEFBS_In64BitMode, // ROR8m1_NF = 3971 |
| 143705 | CEFBS_In64BitMode, // ROR8m1_NF_ND = 3972 |
| 143706 | CEFBS_None, // ROR8mCL = 3973 |
| 143707 | CEFBS_In64BitMode, // ROR8mCL_EVEX = 3974 |
| 143708 | CEFBS_In64BitMode, // ROR8mCL_ND = 3975 |
| 143709 | CEFBS_In64BitMode, // ROR8mCL_NF = 3976 |
| 143710 | CEFBS_In64BitMode, // ROR8mCL_NF_ND = 3977 |
| 143711 | CEFBS_None, // ROR8mi = 3978 |
| 143712 | CEFBS_In64BitMode, // ROR8mi_EVEX = 3979 |
| 143713 | CEFBS_In64BitMode, // ROR8mi_ND = 3980 |
| 143714 | CEFBS_In64BitMode, // ROR8mi_NF = 3981 |
| 143715 | CEFBS_In64BitMode, // ROR8mi_NF_ND = 3982 |
| 143716 | CEFBS_None, // ROR8r1 = 3983 |
| 143717 | CEFBS_In64BitMode, // ROR8r1_EVEX = 3984 |
| 143718 | CEFBS_In64BitMode, // ROR8r1_ND = 3985 |
| 143719 | CEFBS_In64BitMode, // ROR8r1_NF = 3986 |
| 143720 | CEFBS_In64BitMode, // ROR8r1_NF_ND = 3987 |
| 143721 | CEFBS_None, // ROR8rCL = 3988 |
| 143722 | CEFBS_In64BitMode, // ROR8rCL_EVEX = 3989 |
| 143723 | CEFBS_In64BitMode, // ROR8rCL_ND = 3990 |
| 143724 | CEFBS_In64BitMode, // ROR8rCL_NF = 3991 |
| 143725 | CEFBS_In64BitMode, // ROR8rCL_NF_ND = 3992 |
| 143726 | CEFBS_None, // ROR8ri = 3993 |
| 143727 | CEFBS_In64BitMode, // ROR8ri_EVEX = 3994 |
| 143728 | CEFBS_In64BitMode, // ROR8ri_ND = 3995 |
| 143729 | CEFBS_In64BitMode, // ROR8ri_NF = 3996 |
| 143730 | CEFBS_In64BitMode, // ROR8ri_NF_ND = 3997 |
| 143731 | CEFBS_None, // RORX32mi = 3998 |
| 143732 | CEFBS_In64BitMode, // RORX32mi_EVEX = 3999 |
| 143733 | CEFBS_None, // RORX32ri = 4000 |
| 143734 | CEFBS_In64BitMode, // RORX32ri_EVEX = 4001 |
| 143735 | CEFBS_None, // RORX64mi = 4002 |
| 143736 | CEFBS_In64BitMode, // RORX64mi_EVEX = 4003 |
| 143737 | CEFBS_None, // RORX64ri = 4004 |
| 143738 | CEFBS_In64BitMode, // RORX64ri_EVEX = 4005 |
| 143739 | CEFBS_None, // ROUNDPDmi = 4006 |
| 143740 | CEFBS_None, // ROUNDPDri = 4007 |
| 143741 | CEFBS_None, // ROUNDPSmi = 4008 |
| 143742 | CEFBS_None, // ROUNDPSri = 4009 |
| 143743 | CEFBS_None, // ROUNDSDmi = 4010 |
| 143744 | CEFBS_None, // ROUNDSDmi_Int = 4011 |
| 143745 | CEFBS_None, // ROUNDSDri = 4012 |
| 143746 | CEFBS_None, // ROUNDSDri_Int = 4013 |
| 143747 | CEFBS_None, // ROUNDSSmi = 4014 |
| 143748 | CEFBS_None, // ROUNDSSmi_Int = 4015 |
| 143749 | CEFBS_None, // ROUNDSSri = 4016 |
| 143750 | CEFBS_None, // ROUNDSSri_Int = 4017 |
| 143751 | CEFBS_None, // RSM = 4018 |
| 143752 | CEFBS_None, // RSQRTPSm = 4019 |
| 143753 | CEFBS_None, // RSQRTPSr = 4020 |
| 143754 | CEFBS_None, // RSQRTSSm = 4021 |
| 143755 | CEFBS_None, // RSQRTSSm_Int = 4022 |
| 143756 | CEFBS_None, // RSQRTSSr = 4023 |
| 143757 | CEFBS_None, // RSQRTSSr_Int = 4024 |
| 143758 | CEFBS_None, // RSTORSSP = 4025 |
| 143759 | CEFBS_None, // SAHF = 4026 |
| 143760 | CEFBS_Not64BitMode, // SALC = 4027 |
| 143761 | CEFBS_None, // SAR16m1 = 4028 |
| 143762 | CEFBS_In64BitMode, // SAR16m1_EVEX = 4029 |
| 143763 | CEFBS_In64BitMode, // SAR16m1_ND = 4030 |
| 143764 | CEFBS_In64BitMode, // SAR16m1_NF = 4031 |
| 143765 | CEFBS_In64BitMode, // SAR16m1_NF_ND = 4032 |
| 143766 | CEFBS_None, // SAR16mCL = 4033 |
| 143767 | CEFBS_In64BitMode, // SAR16mCL_EVEX = 4034 |
| 143768 | CEFBS_In64BitMode, // SAR16mCL_ND = 4035 |
| 143769 | CEFBS_In64BitMode, // SAR16mCL_NF = 4036 |
| 143770 | CEFBS_In64BitMode, // SAR16mCL_NF_ND = 4037 |
| 143771 | CEFBS_None, // SAR16mi = 4038 |
| 143772 | CEFBS_In64BitMode, // SAR16mi_EVEX = 4039 |
| 143773 | CEFBS_In64BitMode, // SAR16mi_ND = 4040 |
| 143774 | CEFBS_In64BitMode, // SAR16mi_NF = 4041 |
| 143775 | CEFBS_In64BitMode, // SAR16mi_NF_ND = 4042 |
| 143776 | CEFBS_None, // SAR16r1 = 4043 |
| 143777 | CEFBS_In64BitMode, // SAR16r1_EVEX = 4044 |
| 143778 | CEFBS_In64BitMode, // SAR16r1_ND = 4045 |
| 143779 | CEFBS_In64BitMode, // SAR16r1_NF = 4046 |
| 143780 | CEFBS_In64BitMode, // SAR16r1_NF_ND = 4047 |
| 143781 | CEFBS_None, // SAR16rCL = 4048 |
| 143782 | CEFBS_In64BitMode, // SAR16rCL_EVEX = 4049 |
| 143783 | CEFBS_In64BitMode, // SAR16rCL_ND = 4050 |
| 143784 | CEFBS_In64BitMode, // SAR16rCL_NF = 4051 |
| 143785 | CEFBS_In64BitMode, // SAR16rCL_NF_ND = 4052 |
| 143786 | CEFBS_None, // SAR16ri = 4053 |
| 143787 | CEFBS_In64BitMode, // SAR16ri_EVEX = 4054 |
| 143788 | CEFBS_In64BitMode, // SAR16ri_ND = 4055 |
| 143789 | CEFBS_In64BitMode, // SAR16ri_NF = 4056 |
| 143790 | CEFBS_In64BitMode, // SAR16ri_NF_ND = 4057 |
| 143791 | CEFBS_None, // SAR32m1 = 4058 |
| 143792 | CEFBS_In64BitMode, // SAR32m1_EVEX = 4059 |
| 143793 | CEFBS_In64BitMode, // SAR32m1_ND = 4060 |
| 143794 | CEFBS_In64BitMode, // SAR32m1_NF = 4061 |
| 143795 | CEFBS_In64BitMode, // SAR32m1_NF_ND = 4062 |
| 143796 | CEFBS_None, // SAR32mCL = 4063 |
| 143797 | CEFBS_In64BitMode, // SAR32mCL_EVEX = 4064 |
| 143798 | CEFBS_In64BitMode, // SAR32mCL_ND = 4065 |
| 143799 | CEFBS_In64BitMode, // SAR32mCL_NF = 4066 |
| 143800 | CEFBS_In64BitMode, // SAR32mCL_NF_ND = 4067 |
| 143801 | CEFBS_None, // SAR32mi = 4068 |
| 143802 | CEFBS_In64BitMode, // SAR32mi_EVEX = 4069 |
| 143803 | CEFBS_In64BitMode, // SAR32mi_ND = 4070 |
| 143804 | CEFBS_In64BitMode, // SAR32mi_NF = 4071 |
| 143805 | CEFBS_In64BitMode, // SAR32mi_NF_ND = 4072 |
| 143806 | CEFBS_None, // SAR32r1 = 4073 |
| 143807 | CEFBS_In64BitMode, // SAR32r1_EVEX = 4074 |
| 143808 | CEFBS_In64BitMode, // SAR32r1_ND = 4075 |
| 143809 | CEFBS_In64BitMode, // SAR32r1_NF = 4076 |
| 143810 | CEFBS_In64BitMode, // SAR32r1_NF_ND = 4077 |
| 143811 | CEFBS_None, // SAR32rCL = 4078 |
| 143812 | CEFBS_In64BitMode, // SAR32rCL_EVEX = 4079 |
| 143813 | CEFBS_In64BitMode, // SAR32rCL_ND = 4080 |
| 143814 | CEFBS_In64BitMode, // SAR32rCL_NF = 4081 |
| 143815 | CEFBS_In64BitMode, // SAR32rCL_NF_ND = 4082 |
| 143816 | CEFBS_None, // SAR32ri = 4083 |
| 143817 | CEFBS_In64BitMode, // SAR32ri_EVEX = 4084 |
| 143818 | CEFBS_In64BitMode, // SAR32ri_ND = 4085 |
| 143819 | CEFBS_In64BitMode, // SAR32ri_NF = 4086 |
| 143820 | CEFBS_In64BitMode, // SAR32ri_NF_ND = 4087 |
| 143821 | CEFBS_In64BitMode, // SAR64m1 = 4088 |
| 143822 | CEFBS_In64BitMode, // SAR64m1_EVEX = 4089 |
| 143823 | CEFBS_In64BitMode, // SAR64m1_ND = 4090 |
| 143824 | CEFBS_In64BitMode, // SAR64m1_NF = 4091 |
| 143825 | CEFBS_In64BitMode, // SAR64m1_NF_ND = 4092 |
| 143826 | CEFBS_In64BitMode, // SAR64mCL = 4093 |
| 143827 | CEFBS_In64BitMode, // SAR64mCL_EVEX = 4094 |
| 143828 | CEFBS_In64BitMode, // SAR64mCL_ND = 4095 |
| 143829 | CEFBS_In64BitMode, // SAR64mCL_NF = 4096 |
| 143830 | CEFBS_In64BitMode, // SAR64mCL_NF_ND = 4097 |
| 143831 | CEFBS_In64BitMode, // SAR64mi = 4098 |
| 143832 | CEFBS_In64BitMode, // SAR64mi_EVEX = 4099 |
| 143833 | CEFBS_In64BitMode, // SAR64mi_ND = 4100 |
| 143834 | CEFBS_In64BitMode, // SAR64mi_NF = 4101 |
| 143835 | CEFBS_In64BitMode, // SAR64mi_NF_ND = 4102 |
| 143836 | CEFBS_None, // SAR64r1 = 4103 |
| 143837 | CEFBS_In64BitMode, // SAR64r1_EVEX = 4104 |
| 143838 | CEFBS_In64BitMode, // SAR64r1_ND = 4105 |
| 143839 | CEFBS_In64BitMode, // SAR64r1_NF = 4106 |
| 143840 | CEFBS_In64BitMode, // SAR64r1_NF_ND = 4107 |
| 143841 | CEFBS_None, // SAR64rCL = 4108 |
| 143842 | CEFBS_In64BitMode, // SAR64rCL_EVEX = 4109 |
| 143843 | CEFBS_In64BitMode, // SAR64rCL_ND = 4110 |
| 143844 | CEFBS_In64BitMode, // SAR64rCL_NF = 4111 |
| 143845 | CEFBS_In64BitMode, // SAR64rCL_NF_ND = 4112 |
| 143846 | CEFBS_None, // SAR64ri = 4113 |
| 143847 | CEFBS_In64BitMode, // SAR64ri_EVEX = 4114 |
| 143848 | CEFBS_In64BitMode, // SAR64ri_ND = 4115 |
| 143849 | CEFBS_In64BitMode, // SAR64ri_NF = 4116 |
| 143850 | CEFBS_In64BitMode, // SAR64ri_NF_ND = 4117 |
| 143851 | CEFBS_None, // SAR8m1 = 4118 |
| 143852 | CEFBS_In64BitMode, // SAR8m1_EVEX = 4119 |
| 143853 | CEFBS_In64BitMode, // SAR8m1_ND = 4120 |
| 143854 | CEFBS_In64BitMode, // SAR8m1_NF = 4121 |
| 143855 | CEFBS_In64BitMode, // SAR8m1_NF_ND = 4122 |
| 143856 | CEFBS_None, // SAR8mCL = 4123 |
| 143857 | CEFBS_In64BitMode, // SAR8mCL_EVEX = 4124 |
| 143858 | CEFBS_In64BitMode, // SAR8mCL_ND = 4125 |
| 143859 | CEFBS_In64BitMode, // SAR8mCL_NF = 4126 |
| 143860 | CEFBS_In64BitMode, // SAR8mCL_NF_ND = 4127 |
| 143861 | CEFBS_None, // SAR8mi = 4128 |
| 143862 | CEFBS_In64BitMode, // SAR8mi_EVEX = 4129 |
| 143863 | CEFBS_In64BitMode, // SAR8mi_ND = 4130 |
| 143864 | CEFBS_In64BitMode, // SAR8mi_NF = 4131 |
| 143865 | CEFBS_In64BitMode, // SAR8mi_NF_ND = 4132 |
| 143866 | CEFBS_None, // SAR8r1 = 4133 |
| 143867 | CEFBS_In64BitMode, // SAR8r1_EVEX = 4134 |
| 143868 | CEFBS_In64BitMode, // SAR8r1_ND = 4135 |
| 143869 | CEFBS_In64BitMode, // SAR8r1_NF = 4136 |
| 143870 | CEFBS_In64BitMode, // SAR8r1_NF_ND = 4137 |
| 143871 | CEFBS_None, // SAR8rCL = 4138 |
| 143872 | CEFBS_In64BitMode, // SAR8rCL_EVEX = 4139 |
| 143873 | CEFBS_In64BitMode, // SAR8rCL_ND = 4140 |
| 143874 | CEFBS_In64BitMode, // SAR8rCL_NF = 4141 |
| 143875 | CEFBS_In64BitMode, // SAR8rCL_NF_ND = 4142 |
| 143876 | CEFBS_None, // SAR8ri = 4143 |
| 143877 | CEFBS_In64BitMode, // SAR8ri_EVEX = 4144 |
| 143878 | CEFBS_In64BitMode, // SAR8ri_ND = 4145 |
| 143879 | CEFBS_In64BitMode, // SAR8ri_NF = 4146 |
| 143880 | CEFBS_In64BitMode, // SAR8ri_NF_ND = 4147 |
| 143881 | CEFBS_None, // SARX32rm = 4148 |
| 143882 | CEFBS_In64BitMode, // SARX32rm_EVEX = 4149 |
| 143883 | CEFBS_None, // SARX32rr = 4150 |
| 143884 | CEFBS_In64BitMode, // SARX32rr_EVEX = 4151 |
| 143885 | CEFBS_None, // SARX64rm = 4152 |
| 143886 | CEFBS_In64BitMode, // SARX64rm_EVEX = 4153 |
| 143887 | CEFBS_None, // SARX64rr = 4154 |
| 143888 | CEFBS_In64BitMode, // SARX64rr_EVEX = 4155 |
| 143889 | CEFBS_None, // SAVEPREVSSP = 4156 |
| 143890 | CEFBS_None, // SBB16i16 = 4157 |
| 143891 | CEFBS_None, // SBB16mi = 4158 |
| 143892 | CEFBS_None, // SBB16mi8 = 4159 |
| 143893 | CEFBS_In64BitMode, // SBB16mi8_EVEX = 4160 |
| 143894 | CEFBS_In64BitMode, // SBB16mi8_ND = 4161 |
| 143895 | CEFBS_In64BitMode, // SBB16mi_EVEX = 4162 |
| 143896 | CEFBS_In64BitMode, // SBB16mi_ND = 4163 |
| 143897 | CEFBS_None, // SBB16mr = 4164 |
| 143898 | CEFBS_In64BitMode, // SBB16mr_EVEX = 4165 |
| 143899 | CEFBS_In64BitMode, // SBB16mr_ND = 4166 |
| 143900 | CEFBS_None, // SBB16ri = 4167 |
| 143901 | CEFBS_None, // SBB16ri8 = 4168 |
| 143902 | CEFBS_In64BitMode, // SBB16ri8_EVEX = 4169 |
| 143903 | CEFBS_In64BitMode, // SBB16ri8_ND = 4170 |
| 143904 | CEFBS_In64BitMode, // SBB16ri_EVEX = 4171 |
| 143905 | CEFBS_In64BitMode, // SBB16ri_ND = 4172 |
| 143906 | CEFBS_None, // SBB16rm = 4173 |
| 143907 | CEFBS_In64BitMode, // SBB16rm_EVEX = 4174 |
| 143908 | CEFBS_In64BitMode, // SBB16rm_ND = 4175 |
| 143909 | CEFBS_None, // SBB16rr = 4176 |
| 143910 | CEFBS_In64BitMode, // SBB16rr_EVEX = 4177 |
| 143911 | CEFBS_In64BitMode, // SBB16rr_EVEX_REV = 4178 |
| 143912 | CEFBS_In64BitMode, // SBB16rr_ND = 4179 |
| 143913 | CEFBS_In64BitMode, // SBB16rr_ND_REV = 4180 |
| 143914 | CEFBS_None, // SBB16rr_REV = 4181 |
| 143915 | CEFBS_None, // SBB32i32 = 4182 |
| 143916 | CEFBS_None, // SBB32mi = 4183 |
| 143917 | CEFBS_None, // SBB32mi8 = 4184 |
| 143918 | CEFBS_In64BitMode, // SBB32mi8_EVEX = 4185 |
| 143919 | CEFBS_In64BitMode, // SBB32mi8_ND = 4186 |
| 143920 | CEFBS_In64BitMode, // SBB32mi_EVEX = 4187 |
| 143921 | CEFBS_In64BitMode, // SBB32mi_ND = 4188 |
| 143922 | CEFBS_None, // SBB32mr = 4189 |
| 143923 | CEFBS_In64BitMode, // SBB32mr_EVEX = 4190 |
| 143924 | CEFBS_In64BitMode, // SBB32mr_ND = 4191 |
| 143925 | CEFBS_None, // SBB32ri = 4192 |
| 143926 | CEFBS_None, // SBB32ri8 = 4193 |
| 143927 | CEFBS_In64BitMode, // SBB32ri8_EVEX = 4194 |
| 143928 | CEFBS_In64BitMode, // SBB32ri8_ND = 4195 |
| 143929 | CEFBS_In64BitMode, // SBB32ri_EVEX = 4196 |
| 143930 | CEFBS_In64BitMode, // SBB32ri_ND = 4197 |
| 143931 | CEFBS_None, // SBB32rm = 4198 |
| 143932 | CEFBS_In64BitMode, // SBB32rm_EVEX = 4199 |
| 143933 | CEFBS_In64BitMode, // SBB32rm_ND = 4200 |
| 143934 | CEFBS_None, // SBB32rr = 4201 |
| 143935 | CEFBS_In64BitMode, // SBB32rr_EVEX = 4202 |
| 143936 | CEFBS_In64BitMode, // SBB32rr_EVEX_REV = 4203 |
| 143937 | CEFBS_In64BitMode, // SBB32rr_ND = 4204 |
| 143938 | CEFBS_In64BitMode, // SBB32rr_ND_REV = 4205 |
| 143939 | CEFBS_None, // SBB32rr_REV = 4206 |
| 143940 | CEFBS_None, // SBB64i32 = 4207 |
| 143941 | CEFBS_In64BitMode, // SBB64mi32 = 4208 |
| 143942 | CEFBS_In64BitMode, // SBB64mi32_EVEX = 4209 |
| 143943 | CEFBS_In64BitMode, // SBB64mi32_ND = 4210 |
| 143944 | CEFBS_In64BitMode, // SBB64mi8 = 4211 |
| 143945 | CEFBS_In64BitMode, // SBB64mi8_EVEX = 4212 |
| 143946 | CEFBS_In64BitMode, // SBB64mi8_ND = 4213 |
| 143947 | CEFBS_None, // SBB64mr = 4214 |
| 143948 | CEFBS_In64BitMode, // SBB64mr_EVEX = 4215 |
| 143949 | CEFBS_In64BitMode, // SBB64mr_ND = 4216 |
| 143950 | CEFBS_None, // SBB64ri32 = 4217 |
| 143951 | CEFBS_In64BitMode, // SBB64ri32_EVEX = 4218 |
| 143952 | CEFBS_In64BitMode, // SBB64ri32_ND = 4219 |
| 143953 | CEFBS_None, // SBB64ri8 = 4220 |
| 143954 | CEFBS_In64BitMode, // SBB64ri8_EVEX = 4221 |
| 143955 | CEFBS_In64BitMode, // SBB64ri8_ND = 4222 |
| 143956 | CEFBS_None, // SBB64rm = 4223 |
| 143957 | CEFBS_In64BitMode, // SBB64rm_EVEX = 4224 |
| 143958 | CEFBS_In64BitMode, // SBB64rm_ND = 4225 |
| 143959 | CEFBS_None, // SBB64rr = 4226 |
| 143960 | CEFBS_In64BitMode, // SBB64rr_EVEX = 4227 |
| 143961 | CEFBS_In64BitMode, // SBB64rr_EVEX_REV = 4228 |
| 143962 | CEFBS_In64BitMode, // SBB64rr_ND = 4229 |
| 143963 | CEFBS_In64BitMode, // SBB64rr_ND_REV = 4230 |
| 143964 | CEFBS_None, // SBB64rr_REV = 4231 |
| 143965 | CEFBS_None, // SBB8i8 = 4232 |
| 143966 | CEFBS_None, // SBB8mi = 4233 |
| 143967 | CEFBS_Not64BitMode, // SBB8mi8 = 4234 |
| 143968 | CEFBS_In64BitMode, // SBB8mi_EVEX = 4235 |
| 143969 | CEFBS_In64BitMode, // SBB8mi_ND = 4236 |
| 143970 | CEFBS_None, // SBB8mr = 4237 |
| 143971 | CEFBS_In64BitMode, // SBB8mr_EVEX = 4238 |
| 143972 | CEFBS_In64BitMode, // SBB8mr_ND = 4239 |
| 143973 | CEFBS_None, // SBB8ri = 4240 |
| 143974 | CEFBS_Not64BitMode, // SBB8ri8 = 4241 |
| 143975 | CEFBS_In64BitMode, // SBB8ri_EVEX = 4242 |
| 143976 | CEFBS_In64BitMode, // SBB8ri_ND = 4243 |
| 143977 | CEFBS_None, // SBB8rm = 4244 |
| 143978 | CEFBS_In64BitMode, // SBB8rm_EVEX = 4245 |
| 143979 | CEFBS_In64BitMode, // SBB8rm_ND = 4246 |
| 143980 | CEFBS_None, // SBB8rr = 4247 |
| 143981 | CEFBS_In64BitMode, // SBB8rr_EVEX = 4248 |
| 143982 | CEFBS_In64BitMode, // SBB8rr_EVEX_REV = 4249 |
| 143983 | CEFBS_In64BitMode, // SBB8rr_ND = 4250 |
| 143984 | CEFBS_In64BitMode, // SBB8rr_ND_REV = 4251 |
| 143985 | CEFBS_None, // SBB8rr_REV = 4252 |
| 143986 | CEFBS_None, // SCASB = 4253 |
| 143987 | CEFBS_None, // SCASL = 4254 |
| 143988 | CEFBS_In64BitMode, // SCASQ = 4255 |
| 143989 | CEFBS_None, // SCASW = 4256 |
| 143990 | CEFBS_In64BitMode, // SEAMCALL = 4257 |
| 143991 | CEFBS_In64BitMode, // SEAMOPS = 4258 |
| 143992 | CEFBS_In64BitMode, // SEAMRET = 4259 |
| 143993 | CEFBS_None, // SEG_ALLOCA_32 = 4260 |
| 143994 | CEFBS_In64BitMode, // SEG_ALLOCA_64 = 4261 |
| 143995 | CEFBS_In64BitMode, // SENDUIPI = 4262 |
| 143996 | CEFBS_None, // SERIALIZE = 4263 |
| 143997 | CEFBS_None, // SETCCm = 4264 |
| 143998 | CEFBS_None, // SETCCm_EVEX = 4265 |
| 143999 | CEFBS_None, // SETCCr = 4266 |
| 144000 | CEFBS_None, // SETCCr_EVEX = 4267 |
| 144001 | CEFBS_None, // SETSSBSY = 4268 |
| 144002 | CEFBS_None, // SETZUCCm = 4269 |
| 144003 | CEFBS_None, // SETZUCCr = 4270 |
| 144004 | CEFBS_None, // SFENCE = 4271 |
| 144005 | CEFBS_Not64BitMode, // SGDT16m = 4272 |
| 144006 | CEFBS_Not64BitMode, // SGDT32m = 4273 |
| 144007 | CEFBS_In64BitMode, // SGDT64m = 4274 |
| 144008 | CEFBS_None, // SHA1MSG1rm = 4275 |
| 144009 | CEFBS_None, // SHA1MSG1rr = 4276 |
| 144010 | CEFBS_None, // SHA1MSG2rm = 4277 |
| 144011 | CEFBS_None, // SHA1MSG2rr = 4278 |
| 144012 | CEFBS_None, // SHA1NEXTErm = 4279 |
| 144013 | CEFBS_None, // SHA1NEXTErr = 4280 |
| 144014 | CEFBS_None, // SHA1RNDS4rmi = 4281 |
| 144015 | CEFBS_None, // SHA1RNDS4rri = 4282 |
| 144016 | CEFBS_None, // SHA256MSG1rm = 4283 |
| 144017 | CEFBS_None, // SHA256MSG1rr = 4284 |
| 144018 | CEFBS_None, // SHA256MSG2rm = 4285 |
| 144019 | CEFBS_None, // SHA256MSG2rr = 4286 |
| 144020 | CEFBS_None, // SHA256RNDS2rm = 4287 |
| 144021 | CEFBS_None, // SHA256RNDS2rr = 4288 |
| 144022 | CEFBS_None, // SHL16m1 = 4289 |
| 144023 | CEFBS_In64BitMode, // SHL16m1_EVEX = 4290 |
| 144024 | CEFBS_In64BitMode, // SHL16m1_ND = 4291 |
| 144025 | CEFBS_In64BitMode, // SHL16m1_NF = 4292 |
| 144026 | CEFBS_In64BitMode, // SHL16m1_NF_ND = 4293 |
| 144027 | CEFBS_None, // SHL16mCL = 4294 |
| 144028 | CEFBS_In64BitMode, // SHL16mCL_EVEX = 4295 |
| 144029 | CEFBS_In64BitMode, // SHL16mCL_ND = 4296 |
| 144030 | CEFBS_In64BitMode, // SHL16mCL_NF = 4297 |
| 144031 | CEFBS_In64BitMode, // SHL16mCL_NF_ND = 4298 |
| 144032 | CEFBS_None, // SHL16mi = 4299 |
| 144033 | CEFBS_In64BitMode, // SHL16mi_EVEX = 4300 |
| 144034 | CEFBS_In64BitMode, // SHL16mi_ND = 4301 |
| 144035 | CEFBS_In64BitMode, // SHL16mi_NF = 4302 |
| 144036 | CEFBS_In64BitMode, // SHL16mi_NF_ND = 4303 |
| 144037 | CEFBS_None, // SHL16r1 = 4304 |
| 144038 | CEFBS_In64BitMode, // SHL16r1_EVEX = 4305 |
| 144039 | CEFBS_In64BitMode, // SHL16r1_ND = 4306 |
| 144040 | CEFBS_In64BitMode, // SHL16r1_NF = 4307 |
| 144041 | CEFBS_In64BitMode, // SHL16r1_NF_ND = 4308 |
| 144042 | CEFBS_None, // SHL16rCL = 4309 |
| 144043 | CEFBS_In64BitMode, // SHL16rCL_EVEX = 4310 |
| 144044 | CEFBS_In64BitMode, // SHL16rCL_ND = 4311 |
| 144045 | CEFBS_In64BitMode, // SHL16rCL_NF = 4312 |
| 144046 | CEFBS_In64BitMode, // SHL16rCL_NF_ND = 4313 |
| 144047 | CEFBS_None, // SHL16ri = 4314 |
| 144048 | CEFBS_In64BitMode, // SHL16ri_EVEX = 4315 |
| 144049 | CEFBS_In64BitMode, // SHL16ri_ND = 4316 |
| 144050 | CEFBS_In64BitMode, // SHL16ri_NF = 4317 |
| 144051 | CEFBS_In64BitMode, // SHL16ri_NF_ND = 4318 |
| 144052 | CEFBS_None, // SHL32m1 = 4319 |
| 144053 | CEFBS_In64BitMode, // SHL32m1_EVEX = 4320 |
| 144054 | CEFBS_In64BitMode, // SHL32m1_ND = 4321 |
| 144055 | CEFBS_In64BitMode, // SHL32m1_NF = 4322 |
| 144056 | CEFBS_In64BitMode, // SHL32m1_NF_ND = 4323 |
| 144057 | CEFBS_None, // SHL32mCL = 4324 |
| 144058 | CEFBS_In64BitMode, // SHL32mCL_EVEX = 4325 |
| 144059 | CEFBS_In64BitMode, // SHL32mCL_ND = 4326 |
| 144060 | CEFBS_In64BitMode, // SHL32mCL_NF = 4327 |
| 144061 | CEFBS_In64BitMode, // SHL32mCL_NF_ND = 4328 |
| 144062 | CEFBS_None, // SHL32mi = 4329 |
| 144063 | CEFBS_In64BitMode, // SHL32mi_EVEX = 4330 |
| 144064 | CEFBS_In64BitMode, // SHL32mi_ND = 4331 |
| 144065 | CEFBS_In64BitMode, // SHL32mi_NF = 4332 |
| 144066 | CEFBS_In64BitMode, // SHL32mi_NF_ND = 4333 |
| 144067 | CEFBS_None, // SHL32r1 = 4334 |
| 144068 | CEFBS_In64BitMode, // SHL32r1_EVEX = 4335 |
| 144069 | CEFBS_In64BitMode, // SHL32r1_ND = 4336 |
| 144070 | CEFBS_In64BitMode, // SHL32r1_NF = 4337 |
| 144071 | CEFBS_In64BitMode, // SHL32r1_NF_ND = 4338 |
| 144072 | CEFBS_None, // SHL32rCL = 4339 |
| 144073 | CEFBS_In64BitMode, // SHL32rCL_EVEX = 4340 |
| 144074 | CEFBS_In64BitMode, // SHL32rCL_ND = 4341 |
| 144075 | CEFBS_In64BitMode, // SHL32rCL_NF = 4342 |
| 144076 | CEFBS_In64BitMode, // SHL32rCL_NF_ND = 4343 |
| 144077 | CEFBS_None, // SHL32ri = 4344 |
| 144078 | CEFBS_In64BitMode, // SHL32ri_EVEX = 4345 |
| 144079 | CEFBS_In64BitMode, // SHL32ri_ND = 4346 |
| 144080 | CEFBS_In64BitMode, // SHL32ri_NF = 4347 |
| 144081 | CEFBS_In64BitMode, // SHL32ri_NF_ND = 4348 |
| 144082 | CEFBS_In64BitMode, // SHL64m1 = 4349 |
| 144083 | CEFBS_In64BitMode, // SHL64m1_EVEX = 4350 |
| 144084 | CEFBS_In64BitMode, // SHL64m1_ND = 4351 |
| 144085 | CEFBS_In64BitMode, // SHL64m1_NF = 4352 |
| 144086 | CEFBS_In64BitMode, // SHL64m1_NF_ND = 4353 |
| 144087 | CEFBS_In64BitMode, // SHL64mCL = 4354 |
| 144088 | CEFBS_In64BitMode, // SHL64mCL_EVEX = 4355 |
| 144089 | CEFBS_In64BitMode, // SHL64mCL_ND = 4356 |
| 144090 | CEFBS_In64BitMode, // SHL64mCL_NF = 4357 |
| 144091 | CEFBS_In64BitMode, // SHL64mCL_NF_ND = 4358 |
| 144092 | CEFBS_In64BitMode, // SHL64mi = 4359 |
| 144093 | CEFBS_In64BitMode, // SHL64mi_EVEX = 4360 |
| 144094 | CEFBS_In64BitMode, // SHL64mi_ND = 4361 |
| 144095 | CEFBS_In64BitMode, // SHL64mi_NF = 4362 |
| 144096 | CEFBS_In64BitMode, // SHL64mi_NF_ND = 4363 |
| 144097 | CEFBS_None, // SHL64r1 = 4364 |
| 144098 | CEFBS_In64BitMode, // SHL64r1_EVEX = 4365 |
| 144099 | CEFBS_In64BitMode, // SHL64r1_ND = 4366 |
| 144100 | CEFBS_In64BitMode, // SHL64r1_NF = 4367 |
| 144101 | CEFBS_In64BitMode, // SHL64r1_NF_ND = 4368 |
| 144102 | CEFBS_None, // SHL64rCL = 4369 |
| 144103 | CEFBS_In64BitMode, // SHL64rCL_EVEX = 4370 |
| 144104 | CEFBS_In64BitMode, // SHL64rCL_ND = 4371 |
| 144105 | CEFBS_In64BitMode, // SHL64rCL_NF = 4372 |
| 144106 | CEFBS_In64BitMode, // SHL64rCL_NF_ND = 4373 |
| 144107 | CEFBS_None, // SHL64ri = 4374 |
| 144108 | CEFBS_In64BitMode, // SHL64ri_EVEX = 4375 |
| 144109 | CEFBS_In64BitMode, // SHL64ri_ND = 4376 |
| 144110 | CEFBS_In64BitMode, // SHL64ri_NF = 4377 |
| 144111 | CEFBS_In64BitMode, // SHL64ri_NF_ND = 4378 |
| 144112 | CEFBS_None, // SHL8m1 = 4379 |
| 144113 | CEFBS_In64BitMode, // SHL8m1_EVEX = 4380 |
| 144114 | CEFBS_In64BitMode, // SHL8m1_ND = 4381 |
| 144115 | CEFBS_In64BitMode, // SHL8m1_NF = 4382 |
| 144116 | CEFBS_In64BitMode, // SHL8m1_NF_ND = 4383 |
| 144117 | CEFBS_None, // SHL8mCL = 4384 |
| 144118 | CEFBS_In64BitMode, // SHL8mCL_EVEX = 4385 |
| 144119 | CEFBS_In64BitMode, // SHL8mCL_ND = 4386 |
| 144120 | CEFBS_In64BitMode, // SHL8mCL_NF = 4387 |
| 144121 | CEFBS_In64BitMode, // SHL8mCL_NF_ND = 4388 |
| 144122 | CEFBS_None, // SHL8mi = 4389 |
| 144123 | CEFBS_In64BitMode, // SHL8mi_EVEX = 4390 |
| 144124 | CEFBS_In64BitMode, // SHL8mi_ND = 4391 |
| 144125 | CEFBS_In64BitMode, // SHL8mi_NF = 4392 |
| 144126 | CEFBS_In64BitMode, // SHL8mi_NF_ND = 4393 |
| 144127 | CEFBS_None, // SHL8r1 = 4394 |
| 144128 | CEFBS_In64BitMode, // SHL8r1_EVEX = 4395 |
| 144129 | CEFBS_In64BitMode, // SHL8r1_ND = 4396 |
| 144130 | CEFBS_In64BitMode, // SHL8r1_NF = 4397 |
| 144131 | CEFBS_In64BitMode, // SHL8r1_NF_ND = 4398 |
| 144132 | CEFBS_None, // SHL8rCL = 4399 |
| 144133 | CEFBS_In64BitMode, // SHL8rCL_EVEX = 4400 |
| 144134 | CEFBS_In64BitMode, // SHL8rCL_ND = 4401 |
| 144135 | CEFBS_In64BitMode, // SHL8rCL_NF = 4402 |
| 144136 | CEFBS_In64BitMode, // SHL8rCL_NF_ND = 4403 |
| 144137 | CEFBS_None, // SHL8ri = 4404 |
| 144138 | CEFBS_In64BitMode, // SHL8ri_EVEX = 4405 |
| 144139 | CEFBS_In64BitMode, // SHL8ri_ND = 4406 |
| 144140 | CEFBS_In64BitMode, // SHL8ri_NF = 4407 |
| 144141 | CEFBS_In64BitMode, // SHL8ri_NF_ND = 4408 |
| 144142 | CEFBS_None, // SHLD16mrCL = 4409 |
| 144143 | CEFBS_In64BitMode, // SHLD16mrCL_EVEX = 4410 |
| 144144 | CEFBS_In64BitMode, // SHLD16mrCL_ND = 4411 |
| 144145 | CEFBS_In64BitMode, // SHLD16mrCL_NF = 4412 |
| 144146 | CEFBS_In64BitMode, // SHLD16mrCL_NF_ND = 4413 |
| 144147 | CEFBS_None, // SHLD16mri8 = 4414 |
| 144148 | CEFBS_In64BitMode, // SHLD16mri8_EVEX = 4415 |
| 144149 | CEFBS_In64BitMode, // SHLD16mri8_ND = 4416 |
| 144150 | CEFBS_In64BitMode, // SHLD16mri8_NF = 4417 |
| 144151 | CEFBS_In64BitMode, // SHLD16mri8_NF_ND = 4418 |
| 144152 | CEFBS_None, // SHLD16rrCL = 4419 |
| 144153 | CEFBS_In64BitMode, // SHLD16rrCL_EVEX = 4420 |
| 144154 | CEFBS_In64BitMode, // SHLD16rrCL_ND = 4421 |
| 144155 | CEFBS_In64BitMode, // SHLD16rrCL_NF = 4422 |
| 144156 | CEFBS_In64BitMode, // SHLD16rrCL_NF_ND = 4423 |
| 144157 | CEFBS_None, // SHLD16rri8 = 4424 |
| 144158 | CEFBS_In64BitMode, // SHLD16rri8_EVEX = 4425 |
| 144159 | CEFBS_In64BitMode, // SHLD16rri8_ND = 4426 |
| 144160 | CEFBS_In64BitMode, // SHLD16rri8_NF = 4427 |
| 144161 | CEFBS_In64BitMode, // SHLD16rri8_NF_ND = 4428 |
| 144162 | CEFBS_None, // SHLD32mrCL = 4429 |
| 144163 | CEFBS_In64BitMode, // SHLD32mrCL_EVEX = 4430 |
| 144164 | CEFBS_In64BitMode, // SHLD32mrCL_ND = 4431 |
| 144165 | CEFBS_In64BitMode, // SHLD32mrCL_NF = 4432 |
| 144166 | CEFBS_In64BitMode, // SHLD32mrCL_NF_ND = 4433 |
| 144167 | CEFBS_None, // SHLD32mri8 = 4434 |
| 144168 | CEFBS_In64BitMode, // SHLD32mri8_EVEX = 4435 |
| 144169 | CEFBS_In64BitMode, // SHLD32mri8_ND = 4436 |
| 144170 | CEFBS_In64BitMode, // SHLD32mri8_NF = 4437 |
| 144171 | CEFBS_In64BitMode, // SHLD32mri8_NF_ND = 4438 |
| 144172 | CEFBS_None, // SHLD32rrCL = 4439 |
| 144173 | CEFBS_In64BitMode, // SHLD32rrCL_EVEX = 4440 |
| 144174 | CEFBS_In64BitMode, // SHLD32rrCL_ND = 4441 |
| 144175 | CEFBS_In64BitMode, // SHLD32rrCL_NF = 4442 |
| 144176 | CEFBS_In64BitMode, // SHLD32rrCL_NF_ND = 4443 |
| 144177 | CEFBS_None, // SHLD32rri8 = 4444 |
| 144178 | CEFBS_In64BitMode, // SHLD32rri8_EVEX = 4445 |
| 144179 | CEFBS_In64BitMode, // SHLD32rri8_ND = 4446 |
| 144180 | CEFBS_In64BitMode, // SHLD32rri8_NF = 4447 |
| 144181 | CEFBS_In64BitMode, // SHLD32rri8_NF_ND = 4448 |
| 144182 | CEFBS_None, // SHLD64mrCL = 4449 |
| 144183 | CEFBS_In64BitMode, // SHLD64mrCL_EVEX = 4450 |
| 144184 | CEFBS_In64BitMode, // SHLD64mrCL_ND = 4451 |
| 144185 | CEFBS_In64BitMode, // SHLD64mrCL_NF = 4452 |
| 144186 | CEFBS_In64BitMode, // SHLD64mrCL_NF_ND = 4453 |
| 144187 | CEFBS_None, // SHLD64mri8 = 4454 |
| 144188 | CEFBS_In64BitMode, // SHLD64mri8_EVEX = 4455 |
| 144189 | CEFBS_In64BitMode, // SHLD64mri8_ND = 4456 |
| 144190 | CEFBS_In64BitMode, // SHLD64mri8_NF = 4457 |
| 144191 | CEFBS_In64BitMode, // SHLD64mri8_NF_ND = 4458 |
| 144192 | CEFBS_None, // SHLD64rrCL = 4459 |
| 144193 | CEFBS_In64BitMode, // SHLD64rrCL_EVEX = 4460 |
| 144194 | CEFBS_In64BitMode, // SHLD64rrCL_ND = 4461 |
| 144195 | CEFBS_In64BitMode, // SHLD64rrCL_NF = 4462 |
| 144196 | CEFBS_In64BitMode, // SHLD64rrCL_NF_ND = 4463 |
| 144197 | CEFBS_None, // SHLD64rri8 = 4464 |
| 144198 | CEFBS_In64BitMode, // SHLD64rri8_EVEX = 4465 |
| 144199 | CEFBS_In64BitMode, // SHLD64rri8_ND = 4466 |
| 144200 | CEFBS_In64BitMode, // SHLD64rri8_NF = 4467 |
| 144201 | CEFBS_In64BitMode, // SHLD64rri8_NF_ND = 4468 |
| 144202 | CEFBS_None, // SHLX32rm = 4469 |
| 144203 | CEFBS_In64BitMode, // SHLX32rm_EVEX = 4470 |
| 144204 | CEFBS_None, // SHLX32rr = 4471 |
| 144205 | CEFBS_In64BitMode, // SHLX32rr_EVEX = 4472 |
| 144206 | CEFBS_None, // SHLX64rm = 4473 |
| 144207 | CEFBS_In64BitMode, // SHLX64rm_EVEX = 4474 |
| 144208 | CEFBS_None, // SHLX64rr = 4475 |
| 144209 | CEFBS_In64BitMode, // SHLX64rr_EVEX = 4476 |
| 144210 | CEFBS_None, // SHR16m1 = 4477 |
| 144211 | CEFBS_In64BitMode, // SHR16m1_EVEX = 4478 |
| 144212 | CEFBS_In64BitMode, // SHR16m1_ND = 4479 |
| 144213 | CEFBS_In64BitMode, // SHR16m1_NF = 4480 |
| 144214 | CEFBS_In64BitMode, // SHR16m1_NF_ND = 4481 |
| 144215 | CEFBS_None, // SHR16mCL = 4482 |
| 144216 | CEFBS_In64BitMode, // SHR16mCL_EVEX = 4483 |
| 144217 | CEFBS_In64BitMode, // SHR16mCL_ND = 4484 |
| 144218 | CEFBS_In64BitMode, // SHR16mCL_NF = 4485 |
| 144219 | CEFBS_In64BitMode, // SHR16mCL_NF_ND = 4486 |
| 144220 | CEFBS_None, // SHR16mi = 4487 |
| 144221 | CEFBS_In64BitMode, // SHR16mi_EVEX = 4488 |
| 144222 | CEFBS_In64BitMode, // SHR16mi_ND = 4489 |
| 144223 | CEFBS_In64BitMode, // SHR16mi_NF = 4490 |
| 144224 | CEFBS_In64BitMode, // SHR16mi_NF_ND = 4491 |
| 144225 | CEFBS_None, // SHR16r1 = 4492 |
| 144226 | CEFBS_In64BitMode, // SHR16r1_EVEX = 4493 |
| 144227 | CEFBS_In64BitMode, // SHR16r1_ND = 4494 |
| 144228 | CEFBS_In64BitMode, // SHR16r1_NF = 4495 |
| 144229 | CEFBS_In64BitMode, // SHR16r1_NF_ND = 4496 |
| 144230 | CEFBS_None, // SHR16rCL = 4497 |
| 144231 | CEFBS_In64BitMode, // SHR16rCL_EVEX = 4498 |
| 144232 | CEFBS_In64BitMode, // SHR16rCL_ND = 4499 |
| 144233 | CEFBS_In64BitMode, // SHR16rCL_NF = 4500 |
| 144234 | CEFBS_In64BitMode, // SHR16rCL_NF_ND = 4501 |
| 144235 | CEFBS_None, // SHR16ri = 4502 |
| 144236 | CEFBS_In64BitMode, // SHR16ri_EVEX = 4503 |
| 144237 | CEFBS_In64BitMode, // SHR16ri_ND = 4504 |
| 144238 | CEFBS_In64BitMode, // SHR16ri_NF = 4505 |
| 144239 | CEFBS_In64BitMode, // SHR16ri_NF_ND = 4506 |
| 144240 | CEFBS_None, // SHR32m1 = 4507 |
| 144241 | CEFBS_In64BitMode, // SHR32m1_EVEX = 4508 |
| 144242 | CEFBS_In64BitMode, // SHR32m1_ND = 4509 |
| 144243 | CEFBS_In64BitMode, // SHR32m1_NF = 4510 |
| 144244 | CEFBS_In64BitMode, // SHR32m1_NF_ND = 4511 |
| 144245 | CEFBS_None, // SHR32mCL = 4512 |
| 144246 | CEFBS_In64BitMode, // SHR32mCL_EVEX = 4513 |
| 144247 | CEFBS_In64BitMode, // SHR32mCL_ND = 4514 |
| 144248 | CEFBS_In64BitMode, // SHR32mCL_NF = 4515 |
| 144249 | CEFBS_In64BitMode, // SHR32mCL_NF_ND = 4516 |
| 144250 | CEFBS_None, // SHR32mi = 4517 |
| 144251 | CEFBS_In64BitMode, // SHR32mi_EVEX = 4518 |
| 144252 | CEFBS_In64BitMode, // SHR32mi_ND = 4519 |
| 144253 | CEFBS_In64BitMode, // SHR32mi_NF = 4520 |
| 144254 | CEFBS_In64BitMode, // SHR32mi_NF_ND = 4521 |
| 144255 | CEFBS_None, // SHR32r1 = 4522 |
| 144256 | CEFBS_In64BitMode, // SHR32r1_EVEX = 4523 |
| 144257 | CEFBS_In64BitMode, // SHR32r1_ND = 4524 |
| 144258 | CEFBS_In64BitMode, // SHR32r1_NF = 4525 |
| 144259 | CEFBS_In64BitMode, // SHR32r1_NF_ND = 4526 |
| 144260 | CEFBS_None, // SHR32rCL = 4527 |
| 144261 | CEFBS_In64BitMode, // SHR32rCL_EVEX = 4528 |
| 144262 | CEFBS_In64BitMode, // SHR32rCL_ND = 4529 |
| 144263 | CEFBS_In64BitMode, // SHR32rCL_NF = 4530 |
| 144264 | CEFBS_In64BitMode, // SHR32rCL_NF_ND = 4531 |
| 144265 | CEFBS_None, // SHR32ri = 4532 |
| 144266 | CEFBS_In64BitMode, // SHR32ri_EVEX = 4533 |
| 144267 | CEFBS_In64BitMode, // SHR32ri_ND = 4534 |
| 144268 | CEFBS_In64BitMode, // SHR32ri_NF = 4535 |
| 144269 | CEFBS_In64BitMode, // SHR32ri_NF_ND = 4536 |
| 144270 | CEFBS_In64BitMode, // SHR64m1 = 4537 |
| 144271 | CEFBS_In64BitMode, // SHR64m1_EVEX = 4538 |
| 144272 | CEFBS_In64BitMode, // SHR64m1_ND = 4539 |
| 144273 | CEFBS_In64BitMode, // SHR64m1_NF = 4540 |
| 144274 | CEFBS_In64BitMode, // SHR64m1_NF_ND = 4541 |
| 144275 | CEFBS_In64BitMode, // SHR64mCL = 4542 |
| 144276 | CEFBS_In64BitMode, // SHR64mCL_EVEX = 4543 |
| 144277 | CEFBS_In64BitMode, // SHR64mCL_ND = 4544 |
| 144278 | CEFBS_In64BitMode, // SHR64mCL_NF = 4545 |
| 144279 | CEFBS_In64BitMode, // SHR64mCL_NF_ND = 4546 |
| 144280 | CEFBS_In64BitMode, // SHR64mi = 4547 |
| 144281 | CEFBS_In64BitMode, // SHR64mi_EVEX = 4548 |
| 144282 | CEFBS_In64BitMode, // SHR64mi_ND = 4549 |
| 144283 | CEFBS_In64BitMode, // SHR64mi_NF = 4550 |
| 144284 | CEFBS_In64BitMode, // SHR64mi_NF_ND = 4551 |
| 144285 | CEFBS_None, // SHR64r1 = 4552 |
| 144286 | CEFBS_In64BitMode, // SHR64r1_EVEX = 4553 |
| 144287 | CEFBS_In64BitMode, // SHR64r1_ND = 4554 |
| 144288 | CEFBS_In64BitMode, // SHR64r1_NF = 4555 |
| 144289 | CEFBS_In64BitMode, // SHR64r1_NF_ND = 4556 |
| 144290 | CEFBS_None, // SHR64rCL = 4557 |
| 144291 | CEFBS_In64BitMode, // SHR64rCL_EVEX = 4558 |
| 144292 | CEFBS_In64BitMode, // SHR64rCL_ND = 4559 |
| 144293 | CEFBS_In64BitMode, // SHR64rCL_NF = 4560 |
| 144294 | CEFBS_In64BitMode, // SHR64rCL_NF_ND = 4561 |
| 144295 | CEFBS_None, // SHR64ri = 4562 |
| 144296 | CEFBS_In64BitMode, // SHR64ri_EVEX = 4563 |
| 144297 | CEFBS_In64BitMode, // SHR64ri_ND = 4564 |
| 144298 | CEFBS_In64BitMode, // SHR64ri_NF = 4565 |
| 144299 | CEFBS_In64BitMode, // SHR64ri_NF_ND = 4566 |
| 144300 | CEFBS_None, // SHR8m1 = 4567 |
| 144301 | CEFBS_In64BitMode, // SHR8m1_EVEX = 4568 |
| 144302 | CEFBS_In64BitMode, // SHR8m1_ND = 4569 |
| 144303 | CEFBS_In64BitMode, // SHR8m1_NF = 4570 |
| 144304 | CEFBS_In64BitMode, // SHR8m1_NF_ND = 4571 |
| 144305 | CEFBS_None, // SHR8mCL = 4572 |
| 144306 | CEFBS_In64BitMode, // SHR8mCL_EVEX = 4573 |
| 144307 | CEFBS_In64BitMode, // SHR8mCL_ND = 4574 |
| 144308 | CEFBS_In64BitMode, // SHR8mCL_NF = 4575 |
| 144309 | CEFBS_In64BitMode, // SHR8mCL_NF_ND = 4576 |
| 144310 | CEFBS_None, // SHR8mi = 4577 |
| 144311 | CEFBS_In64BitMode, // SHR8mi_EVEX = 4578 |
| 144312 | CEFBS_In64BitMode, // SHR8mi_ND = 4579 |
| 144313 | CEFBS_In64BitMode, // SHR8mi_NF = 4580 |
| 144314 | CEFBS_In64BitMode, // SHR8mi_NF_ND = 4581 |
| 144315 | CEFBS_None, // SHR8r1 = 4582 |
| 144316 | CEFBS_In64BitMode, // SHR8r1_EVEX = 4583 |
| 144317 | CEFBS_In64BitMode, // SHR8r1_ND = 4584 |
| 144318 | CEFBS_In64BitMode, // SHR8r1_NF = 4585 |
| 144319 | CEFBS_In64BitMode, // SHR8r1_NF_ND = 4586 |
| 144320 | CEFBS_None, // SHR8rCL = 4587 |
| 144321 | CEFBS_In64BitMode, // SHR8rCL_EVEX = 4588 |
| 144322 | CEFBS_In64BitMode, // SHR8rCL_ND = 4589 |
| 144323 | CEFBS_In64BitMode, // SHR8rCL_NF = 4590 |
| 144324 | CEFBS_In64BitMode, // SHR8rCL_NF_ND = 4591 |
| 144325 | CEFBS_None, // SHR8ri = 4592 |
| 144326 | CEFBS_In64BitMode, // SHR8ri_EVEX = 4593 |
| 144327 | CEFBS_In64BitMode, // SHR8ri_ND = 4594 |
| 144328 | CEFBS_In64BitMode, // SHR8ri_NF = 4595 |
| 144329 | CEFBS_In64BitMode, // SHR8ri_NF_ND = 4596 |
| 144330 | CEFBS_None, // SHRD16mrCL = 4597 |
| 144331 | CEFBS_In64BitMode, // SHRD16mrCL_EVEX = 4598 |
| 144332 | CEFBS_In64BitMode, // SHRD16mrCL_ND = 4599 |
| 144333 | CEFBS_In64BitMode, // SHRD16mrCL_NF = 4600 |
| 144334 | CEFBS_In64BitMode, // SHRD16mrCL_NF_ND = 4601 |
| 144335 | CEFBS_None, // SHRD16mri8 = 4602 |
| 144336 | CEFBS_In64BitMode, // SHRD16mri8_EVEX = 4603 |
| 144337 | CEFBS_In64BitMode, // SHRD16mri8_ND = 4604 |
| 144338 | CEFBS_In64BitMode, // SHRD16mri8_NF = 4605 |
| 144339 | CEFBS_In64BitMode, // SHRD16mri8_NF_ND = 4606 |
| 144340 | CEFBS_None, // SHRD16rrCL = 4607 |
| 144341 | CEFBS_In64BitMode, // SHRD16rrCL_EVEX = 4608 |
| 144342 | CEFBS_In64BitMode, // SHRD16rrCL_ND = 4609 |
| 144343 | CEFBS_In64BitMode, // SHRD16rrCL_NF = 4610 |
| 144344 | CEFBS_In64BitMode, // SHRD16rrCL_NF_ND = 4611 |
| 144345 | CEFBS_None, // SHRD16rri8 = 4612 |
| 144346 | CEFBS_In64BitMode, // SHRD16rri8_EVEX = 4613 |
| 144347 | CEFBS_In64BitMode, // SHRD16rri8_ND = 4614 |
| 144348 | CEFBS_In64BitMode, // SHRD16rri8_NF = 4615 |
| 144349 | CEFBS_In64BitMode, // SHRD16rri8_NF_ND = 4616 |
| 144350 | CEFBS_None, // SHRD32mrCL = 4617 |
| 144351 | CEFBS_In64BitMode, // SHRD32mrCL_EVEX = 4618 |
| 144352 | CEFBS_In64BitMode, // SHRD32mrCL_ND = 4619 |
| 144353 | CEFBS_In64BitMode, // SHRD32mrCL_NF = 4620 |
| 144354 | CEFBS_In64BitMode, // SHRD32mrCL_NF_ND = 4621 |
| 144355 | CEFBS_None, // SHRD32mri8 = 4622 |
| 144356 | CEFBS_In64BitMode, // SHRD32mri8_EVEX = 4623 |
| 144357 | CEFBS_In64BitMode, // SHRD32mri8_ND = 4624 |
| 144358 | CEFBS_In64BitMode, // SHRD32mri8_NF = 4625 |
| 144359 | CEFBS_In64BitMode, // SHRD32mri8_NF_ND = 4626 |
| 144360 | CEFBS_None, // SHRD32rrCL = 4627 |
| 144361 | CEFBS_In64BitMode, // SHRD32rrCL_EVEX = 4628 |
| 144362 | CEFBS_In64BitMode, // SHRD32rrCL_ND = 4629 |
| 144363 | CEFBS_In64BitMode, // SHRD32rrCL_NF = 4630 |
| 144364 | CEFBS_In64BitMode, // SHRD32rrCL_NF_ND = 4631 |
| 144365 | CEFBS_None, // SHRD32rri8 = 4632 |
| 144366 | CEFBS_In64BitMode, // SHRD32rri8_EVEX = 4633 |
| 144367 | CEFBS_In64BitMode, // SHRD32rri8_ND = 4634 |
| 144368 | CEFBS_In64BitMode, // SHRD32rri8_NF = 4635 |
| 144369 | CEFBS_In64BitMode, // SHRD32rri8_NF_ND = 4636 |
| 144370 | CEFBS_None, // SHRD64mrCL = 4637 |
| 144371 | CEFBS_In64BitMode, // SHRD64mrCL_EVEX = 4638 |
| 144372 | CEFBS_In64BitMode, // SHRD64mrCL_ND = 4639 |
| 144373 | CEFBS_In64BitMode, // SHRD64mrCL_NF = 4640 |
| 144374 | CEFBS_In64BitMode, // SHRD64mrCL_NF_ND = 4641 |
| 144375 | CEFBS_None, // SHRD64mri8 = 4642 |
| 144376 | CEFBS_In64BitMode, // SHRD64mri8_EVEX = 4643 |
| 144377 | CEFBS_In64BitMode, // SHRD64mri8_ND = 4644 |
| 144378 | CEFBS_In64BitMode, // SHRD64mri8_NF = 4645 |
| 144379 | CEFBS_In64BitMode, // SHRD64mri8_NF_ND = 4646 |
| 144380 | CEFBS_None, // SHRD64rrCL = 4647 |
| 144381 | CEFBS_In64BitMode, // SHRD64rrCL_EVEX = 4648 |
| 144382 | CEFBS_In64BitMode, // SHRD64rrCL_ND = 4649 |
| 144383 | CEFBS_In64BitMode, // SHRD64rrCL_NF = 4650 |
| 144384 | CEFBS_In64BitMode, // SHRD64rrCL_NF_ND = 4651 |
| 144385 | CEFBS_None, // SHRD64rri8 = 4652 |
| 144386 | CEFBS_In64BitMode, // SHRD64rri8_EVEX = 4653 |
| 144387 | CEFBS_In64BitMode, // SHRD64rri8_ND = 4654 |
| 144388 | CEFBS_In64BitMode, // SHRD64rri8_NF = 4655 |
| 144389 | CEFBS_In64BitMode, // SHRD64rri8_NF_ND = 4656 |
| 144390 | CEFBS_None, // SHRX32rm = 4657 |
| 144391 | CEFBS_In64BitMode, // SHRX32rm_EVEX = 4658 |
| 144392 | CEFBS_None, // SHRX32rr = 4659 |
| 144393 | CEFBS_In64BitMode, // SHRX32rr_EVEX = 4660 |
| 144394 | CEFBS_None, // SHRX64rm = 4661 |
| 144395 | CEFBS_In64BitMode, // SHRX64rm_EVEX = 4662 |
| 144396 | CEFBS_None, // SHRX64rr = 4663 |
| 144397 | CEFBS_In64BitMode, // SHRX64rr_EVEX = 4664 |
| 144398 | CEFBS_None, // SHUFPDrmi = 4665 |
| 144399 | CEFBS_None, // SHUFPDrri = 4666 |
| 144400 | CEFBS_None, // SHUFPSrmi = 4667 |
| 144401 | CEFBS_None, // SHUFPSrri = 4668 |
| 144402 | CEFBS_Not64BitMode, // SIDT16m = 4669 |
| 144403 | CEFBS_Not64BitMode, // SIDT32m = 4670 |
| 144404 | CEFBS_In64BitMode, // SIDT64m = 4671 |
| 144405 | CEFBS_None, // SKINIT = 4672 |
| 144406 | CEFBS_None, // SLDT16m = 4673 |
| 144407 | CEFBS_None, // SLDT16r = 4674 |
| 144408 | CEFBS_None, // SLDT32r = 4675 |
| 144409 | CEFBS_In64BitMode, // SLDT64r = 4676 |
| 144410 | CEFBS_None, // SLWPCB = 4677 |
| 144411 | CEFBS_None, // SLWPCB64 = 4678 |
| 144412 | CEFBS_None, // SMSW16m = 4679 |
| 144413 | CEFBS_None, // SMSW16r = 4680 |
| 144414 | CEFBS_None, // SMSW32r = 4681 |
| 144415 | CEFBS_None, // SMSW64r = 4682 |
| 144416 | CEFBS_None, // SQRTPDm = 4683 |
| 144417 | CEFBS_None, // SQRTPDr = 4684 |
| 144418 | CEFBS_None, // SQRTPSm = 4685 |
| 144419 | CEFBS_None, // SQRTPSr = 4686 |
| 144420 | CEFBS_None, // SQRTSDm = 4687 |
| 144421 | CEFBS_None, // SQRTSDm_Int = 4688 |
| 144422 | CEFBS_None, // SQRTSDr = 4689 |
| 144423 | CEFBS_None, // SQRTSDr_Int = 4690 |
| 144424 | CEFBS_None, // SQRTSSm = 4691 |
| 144425 | CEFBS_None, // SQRTSSm_Int = 4692 |
| 144426 | CEFBS_None, // SQRTSSr = 4693 |
| 144427 | CEFBS_None, // SQRTSSr_Int = 4694 |
| 144428 | CEFBS_None, // SQRT_F = 4695 |
| 144429 | CEFBS_None, // SQRT_Fp32 = 4696 |
| 144430 | CEFBS_None, // SQRT_Fp64 = 4697 |
| 144431 | CEFBS_None, // SQRT_Fp80 = 4698 |
| 144432 | CEFBS_None, // SS_PREFIX = 4699 |
| 144433 | CEFBS_None, // STAC = 4700 |
| 144434 | CEFBS_None, // STACKALLOC_W_PROBING = 4701 |
| 144435 | CEFBS_None, // STC = 4702 |
| 144436 | CEFBS_None, // STD = 4703 |
| 144437 | CEFBS_None, // STGI = 4704 |
| 144438 | CEFBS_None, // STI = 4705 |
| 144439 | CEFBS_None, // STMXCSR = 4706 |
| 144440 | CEFBS_None, // STOSB = 4707 |
| 144441 | CEFBS_None, // STOSL = 4708 |
| 144442 | CEFBS_In64BitMode, // STOSQ = 4709 |
| 144443 | CEFBS_None, // STOSW = 4710 |
| 144444 | CEFBS_None, // STR16r = 4711 |
| 144445 | CEFBS_None, // STR32r = 4712 |
| 144446 | CEFBS_None, // STR64r = 4713 |
| 144447 | CEFBS_None, // STRm = 4714 |
| 144448 | CEFBS_In64BitMode, // STTILECFG = 4715 |
| 144449 | CEFBS_In64BitMode, // STTILECFG_EVEX = 4716 |
| 144450 | CEFBS_In64BitMode, // STUI = 4717 |
| 144451 | CEFBS_None, // ST_F32m = 4718 |
| 144452 | CEFBS_None, // ST_F64m = 4719 |
| 144453 | CEFBS_None, // ST_FP32m = 4720 |
| 144454 | CEFBS_None, // ST_FP64m = 4721 |
| 144455 | CEFBS_None, // ST_FP80m = 4722 |
| 144456 | CEFBS_None, // ST_FPrr = 4723 |
| 144457 | CEFBS_None, // ST_Fp32m = 4724 |
| 144458 | CEFBS_None, // ST_Fp64m = 4725 |
| 144459 | CEFBS_None, // ST_Fp64m32 = 4726 |
| 144460 | CEFBS_None, // ST_Fp80m32 = 4727 |
| 144461 | CEFBS_None, // ST_Fp80m64 = 4728 |
| 144462 | CEFBS_None, // ST_FpP32m = 4729 |
| 144463 | CEFBS_None, // ST_FpP64m = 4730 |
| 144464 | CEFBS_None, // ST_FpP64m32 = 4731 |
| 144465 | CEFBS_None, // ST_FpP80m = 4732 |
| 144466 | CEFBS_None, // ST_FpP80m32 = 4733 |
| 144467 | CEFBS_None, // ST_FpP80m64 = 4734 |
| 144468 | CEFBS_None, // ST_Frr = 4735 |
| 144469 | CEFBS_None, // SUB16i16 = 4736 |
| 144470 | CEFBS_None, // SUB16mi = 4737 |
| 144471 | CEFBS_None, // SUB16mi8 = 4738 |
| 144472 | CEFBS_In64BitMode, // SUB16mi8_EVEX = 4739 |
| 144473 | CEFBS_In64BitMode, // SUB16mi8_ND = 4740 |
| 144474 | CEFBS_In64BitMode, // SUB16mi8_NF = 4741 |
| 144475 | CEFBS_In64BitMode, // SUB16mi8_NF_ND = 4742 |
| 144476 | CEFBS_In64BitMode, // SUB16mi_EVEX = 4743 |
| 144477 | CEFBS_In64BitMode, // SUB16mi_ND = 4744 |
| 144478 | CEFBS_In64BitMode, // SUB16mi_NF = 4745 |
| 144479 | CEFBS_In64BitMode, // SUB16mi_NF_ND = 4746 |
| 144480 | CEFBS_None, // SUB16mr = 4747 |
| 144481 | CEFBS_In64BitMode, // SUB16mr_EVEX = 4748 |
| 144482 | CEFBS_In64BitMode, // SUB16mr_ND = 4749 |
| 144483 | CEFBS_In64BitMode, // SUB16mr_NF = 4750 |
| 144484 | CEFBS_In64BitMode, // SUB16mr_NF_ND = 4751 |
| 144485 | CEFBS_None, // SUB16ri = 4752 |
| 144486 | CEFBS_None, // SUB16ri8 = 4753 |
| 144487 | CEFBS_In64BitMode, // SUB16ri8_EVEX = 4754 |
| 144488 | CEFBS_In64BitMode, // SUB16ri8_ND = 4755 |
| 144489 | CEFBS_In64BitMode, // SUB16ri8_NF = 4756 |
| 144490 | CEFBS_In64BitMode, // SUB16ri8_NF_ND = 4757 |
| 144491 | CEFBS_In64BitMode, // SUB16ri_EVEX = 4758 |
| 144492 | CEFBS_In64BitMode, // SUB16ri_ND = 4759 |
| 144493 | CEFBS_In64BitMode, // SUB16ri_NF = 4760 |
| 144494 | CEFBS_In64BitMode, // SUB16ri_NF_ND = 4761 |
| 144495 | CEFBS_None, // SUB16rm = 4762 |
| 144496 | CEFBS_In64BitMode, // SUB16rm_EVEX = 4763 |
| 144497 | CEFBS_In64BitMode, // SUB16rm_ND = 4764 |
| 144498 | CEFBS_In64BitMode, // SUB16rm_NF = 4765 |
| 144499 | CEFBS_In64BitMode, // SUB16rm_NF_ND = 4766 |
| 144500 | CEFBS_None, // SUB16rr = 4767 |
| 144501 | CEFBS_In64BitMode, // SUB16rr_EVEX = 4768 |
| 144502 | CEFBS_In64BitMode, // SUB16rr_EVEX_REV = 4769 |
| 144503 | CEFBS_In64BitMode, // SUB16rr_ND = 4770 |
| 144504 | CEFBS_In64BitMode, // SUB16rr_ND_REV = 4771 |
| 144505 | CEFBS_In64BitMode, // SUB16rr_NF = 4772 |
| 144506 | CEFBS_In64BitMode, // SUB16rr_NF_ND = 4773 |
| 144507 | CEFBS_In64BitMode, // SUB16rr_NF_ND_REV = 4774 |
| 144508 | CEFBS_In64BitMode, // SUB16rr_NF_REV = 4775 |
| 144509 | CEFBS_None, // SUB16rr_REV = 4776 |
| 144510 | CEFBS_None, // SUB32i32 = 4777 |
| 144511 | CEFBS_None, // SUB32mi = 4778 |
| 144512 | CEFBS_None, // SUB32mi8 = 4779 |
| 144513 | CEFBS_In64BitMode, // SUB32mi8_EVEX = 4780 |
| 144514 | CEFBS_In64BitMode, // SUB32mi8_ND = 4781 |
| 144515 | CEFBS_In64BitMode, // SUB32mi8_NF = 4782 |
| 144516 | CEFBS_In64BitMode, // SUB32mi8_NF_ND = 4783 |
| 144517 | CEFBS_In64BitMode, // SUB32mi_EVEX = 4784 |
| 144518 | CEFBS_In64BitMode, // SUB32mi_ND = 4785 |
| 144519 | CEFBS_In64BitMode, // SUB32mi_NF = 4786 |
| 144520 | CEFBS_In64BitMode, // SUB32mi_NF_ND = 4787 |
| 144521 | CEFBS_None, // SUB32mr = 4788 |
| 144522 | CEFBS_In64BitMode, // SUB32mr_EVEX = 4789 |
| 144523 | CEFBS_In64BitMode, // SUB32mr_ND = 4790 |
| 144524 | CEFBS_In64BitMode, // SUB32mr_NF = 4791 |
| 144525 | CEFBS_In64BitMode, // SUB32mr_NF_ND = 4792 |
| 144526 | CEFBS_None, // SUB32ri = 4793 |
| 144527 | CEFBS_None, // SUB32ri8 = 4794 |
| 144528 | CEFBS_In64BitMode, // SUB32ri8_EVEX = 4795 |
| 144529 | CEFBS_In64BitMode, // SUB32ri8_ND = 4796 |
| 144530 | CEFBS_In64BitMode, // SUB32ri8_NF = 4797 |
| 144531 | CEFBS_In64BitMode, // SUB32ri8_NF_ND = 4798 |
| 144532 | CEFBS_In64BitMode, // SUB32ri_EVEX = 4799 |
| 144533 | CEFBS_In64BitMode, // SUB32ri_ND = 4800 |
| 144534 | CEFBS_In64BitMode, // SUB32ri_NF = 4801 |
| 144535 | CEFBS_In64BitMode, // SUB32ri_NF_ND = 4802 |
| 144536 | CEFBS_None, // SUB32rm = 4803 |
| 144537 | CEFBS_In64BitMode, // SUB32rm_EVEX = 4804 |
| 144538 | CEFBS_In64BitMode, // SUB32rm_ND = 4805 |
| 144539 | CEFBS_In64BitMode, // SUB32rm_NF = 4806 |
| 144540 | CEFBS_In64BitMode, // SUB32rm_NF_ND = 4807 |
| 144541 | CEFBS_None, // SUB32rr = 4808 |
| 144542 | CEFBS_In64BitMode, // SUB32rr_EVEX = 4809 |
| 144543 | CEFBS_In64BitMode, // SUB32rr_EVEX_REV = 4810 |
| 144544 | CEFBS_In64BitMode, // SUB32rr_ND = 4811 |
| 144545 | CEFBS_In64BitMode, // SUB32rr_ND_REV = 4812 |
| 144546 | CEFBS_In64BitMode, // SUB32rr_NF = 4813 |
| 144547 | CEFBS_In64BitMode, // SUB32rr_NF_ND = 4814 |
| 144548 | CEFBS_In64BitMode, // SUB32rr_NF_ND_REV = 4815 |
| 144549 | CEFBS_In64BitMode, // SUB32rr_NF_REV = 4816 |
| 144550 | CEFBS_None, // SUB32rr_REV = 4817 |
| 144551 | CEFBS_None, // SUB64i32 = 4818 |
| 144552 | CEFBS_In64BitMode, // SUB64mi32 = 4819 |
| 144553 | CEFBS_In64BitMode, // SUB64mi32_EVEX = 4820 |
| 144554 | CEFBS_In64BitMode, // SUB64mi32_ND = 4821 |
| 144555 | CEFBS_In64BitMode, // SUB64mi32_NF = 4822 |
| 144556 | CEFBS_In64BitMode, // SUB64mi32_NF_ND = 4823 |
| 144557 | CEFBS_In64BitMode, // SUB64mi8 = 4824 |
| 144558 | CEFBS_In64BitMode, // SUB64mi8_EVEX = 4825 |
| 144559 | CEFBS_In64BitMode, // SUB64mi8_ND = 4826 |
| 144560 | CEFBS_In64BitMode, // SUB64mi8_NF = 4827 |
| 144561 | CEFBS_In64BitMode, // SUB64mi8_NF_ND = 4828 |
| 144562 | CEFBS_None, // SUB64mr = 4829 |
| 144563 | CEFBS_In64BitMode, // SUB64mr_EVEX = 4830 |
| 144564 | CEFBS_In64BitMode, // SUB64mr_ND = 4831 |
| 144565 | CEFBS_In64BitMode, // SUB64mr_NF = 4832 |
| 144566 | CEFBS_In64BitMode, // SUB64mr_NF_ND = 4833 |
| 144567 | CEFBS_None, // SUB64ri32 = 4834 |
| 144568 | CEFBS_In64BitMode, // SUB64ri32_EVEX = 4835 |
| 144569 | CEFBS_In64BitMode, // SUB64ri32_ND = 4836 |
| 144570 | CEFBS_In64BitMode, // SUB64ri32_NF = 4837 |
| 144571 | CEFBS_In64BitMode, // SUB64ri32_NF_ND = 4838 |
| 144572 | CEFBS_None, // SUB64ri8 = 4839 |
| 144573 | CEFBS_In64BitMode, // SUB64ri8_EVEX = 4840 |
| 144574 | CEFBS_In64BitMode, // SUB64ri8_ND = 4841 |
| 144575 | CEFBS_In64BitMode, // SUB64ri8_NF = 4842 |
| 144576 | CEFBS_In64BitMode, // SUB64ri8_NF_ND = 4843 |
| 144577 | CEFBS_None, // SUB64rm = 4844 |
| 144578 | CEFBS_In64BitMode, // SUB64rm_EVEX = 4845 |
| 144579 | CEFBS_In64BitMode, // SUB64rm_ND = 4846 |
| 144580 | CEFBS_In64BitMode, // SUB64rm_NF = 4847 |
| 144581 | CEFBS_In64BitMode, // SUB64rm_NF_ND = 4848 |
| 144582 | CEFBS_None, // SUB64rr = 4849 |
| 144583 | CEFBS_In64BitMode, // SUB64rr_EVEX = 4850 |
| 144584 | CEFBS_In64BitMode, // SUB64rr_EVEX_REV = 4851 |
| 144585 | CEFBS_In64BitMode, // SUB64rr_ND = 4852 |
| 144586 | CEFBS_In64BitMode, // SUB64rr_ND_REV = 4853 |
| 144587 | CEFBS_In64BitMode, // SUB64rr_NF = 4854 |
| 144588 | CEFBS_In64BitMode, // SUB64rr_NF_ND = 4855 |
| 144589 | CEFBS_In64BitMode, // SUB64rr_NF_ND_REV = 4856 |
| 144590 | CEFBS_In64BitMode, // SUB64rr_NF_REV = 4857 |
| 144591 | CEFBS_None, // SUB64rr_REV = 4858 |
| 144592 | CEFBS_None, // SUB8i8 = 4859 |
| 144593 | CEFBS_None, // SUB8mi = 4860 |
| 144594 | CEFBS_Not64BitMode, // SUB8mi8 = 4861 |
| 144595 | CEFBS_In64BitMode, // SUB8mi_EVEX = 4862 |
| 144596 | CEFBS_In64BitMode, // SUB8mi_ND = 4863 |
| 144597 | CEFBS_In64BitMode, // SUB8mi_NF = 4864 |
| 144598 | CEFBS_In64BitMode, // SUB8mi_NF_ND = 4865 |
| 144599 | CEFBS_None, // SUB8mr = 4866 |
| 144600 | CEFBS_In64BitMode, // SUB8mr_EVEX = 4867 |
| 144601 | CEFBS_In64BitMode, // SUB8mr_ND = 4868 |
| 144602 | CEFBS_In64BitMode, // SUB8mr_NF = 4869 |
| 144603 | CEFBS_In64BitMode, // SUB8mr_NF_ND = 4870 |
| 144604 | CEFBS_None, // SUB8ri = 4871 |
| 144605 | CEFBS_Not64BitMode, // SUB8ri8 = 4872 |
| 144606 | CEFBS_In64BitMode, // SUB8ri_EVEX = 4873 |
| 144607 | CEFBS_In64BitMode, // SUB8ri_ND = 4874 |
| 144608 | CEFBS_In64BitMode, // SUB8ri_NF = 4875 |
| 144609 | CEFBS_In64BitMode, // SUB8ri_NF_ND = 4876 |
| 144610 | CEFBS_None, // SUB8rm = 4877 |
| 144611 | CEFBS_In64BitMode, // SUB8rm_EVEX = 4878 |
| 144612 | CEFBS_In64BitMode, // SUB8rm_ND = 4879 |
| 144613 | CEFBS_In64BitMode, // SUB8rm_NF = 4880 |
| 144614 | CEFBS_In64BitMode, // SUB8rm_NF_ND = 4881 |
| 144615 | CEFBS_None, // SUB8rr = 4882 |
| 144616 | CEFBS_In64BitMode, // SUB8rr_EVEX = 4883 |
| 144617 | CEFBS_In64BitMode, // SUB8rr_EVEX_REV = 4884 |
| 144618 | CEFBS_In64BitMode, // SUB8rr_ND = 4885 |
| 144619 | CEFBS_In64BitMode, // SUB8rr_ND_REV = 4886 |
| 144620 | CEFBS_In64BitMode, // SUB8rr_NF = 4887 |
| 144621 | CEFBS_In64BitMode, // SUB8rr_NF_ND = 4888 |
| 144622 | CEFBS_In64BitMode, // SUB8rr_NF_ND_REV = 4889 |
| 144623 | CEFBS_In64BitMode, // SUB8rr_NF_REV = 4890 |
| 144624 | CEFBS_None, // SUB8rr_REV = 4891 |
| 144625 | CEFBS_None, // SUBPDrm = 4892 |
| 144626 | CEFBS_None, // SUBPDrr = 4893 |
| 144627 | CEFBS_None, // SUBPSrm = 4894 |
| 144628 | CEFBS_None, // SUBPSrr = 4895 |
| 144629 | CEFBS_None, // SUBR_F32m = 4896 |
| 144630 | CEFBS_None, // SUBR_F64m = 4897 |
| 144631 | CEFBS_None, // SUBR_FI16m = 4898 |
| 144632 | CEFBS_None, // SUBR_FI32m = 4899 |
| 144633 | CEFBS_None, // SUBR_FPrST0 = 4900 |
| 144634 | CEFBS_None, // SUBR_FST0r = 4901 |
| 144635 | CEFBS_None, // SUBR_Fp32m = 4902 |
| 144636 | CEFBS_None, // SUBR_Fp64m = 4903 |
| 144637 | CEFBS_None, // SUBR_Fp64m32 = 4904 |
| 144638 | CEFBS_None, // SUBR_Fp80m32 = 4905 |
| 144639 | CEFBS_None, // SUBR_Fp80m64 = 4906 |
| 144640 | CEFBS_None, // SUBR_FpI16m32 = 4907 |
| 144641 | CEFBS_None, // SUBR_FpI16m64 = 4908 |
| 144642 | CEFBS_None, // SUBR_FpI16m80 = 4909 |
| 144643 | CEFBS_None, // SUBR_FpI32m32 = 4910 |
| 144644 | CEFBS_None, // SUBR_FpI32m64 = 4911 |
| 144645 | CEFBS_None, // SUBR_FpI32m80 = 4912 |
| 144646 | CEFBS_None, // SUBR_FrST0 = 4913 |
| 144647 | CEFBS_None, // SUBSDrm = 4914 |
| 144648 | CEFBS_None, // SUBSDrm_Int = 4915 |
| 144649 | CEFBS_None, // SUBSDrr = 4916 |
| 144650 | CEFBS_None, // SUBSDrr_Int = 4917 |
| 144651 | CEFBS_None, // SUBSSrm = 4918 |
| 144652 | CEFBS_None, // SUBSSrm_Int = 4919 |
| 144653 | CEFBS_None, // SUBSSrr = 4920 |
| 144654 | CEFBS_None, // SUBSSrr_Int = 4921 |
| 144655 | CEFBS_None, // SUB_F32m = 4922 |
| 144656 | CEFBS_None, // SUB_F64m = 4923 |
| 144657 | CEFBS_None, // SUB_FI16m = 4924 |
| 144658 | CEFBS_None, // SUB_FI32m = 4925 |
| 144659 | CEFBS_None, // SUB_FPrST0 = 4926 |
| 144660 | CEFBS_None, // SUB_FST0r = 4927 |
| 144661 | CEFBS_None, // SUB_Fp32 = 4928 |
| 144662 | CEFBS_None, // SUB_Fp32m = 4929 |
| 144663 | CEFBS_None, // SUB_Fp64 = 4930 |
| 144664 | CEFBS_None, // SUB_Fp64m = 4931 |
| 144665 | CEFBS_None, // SUB_Fp64m32 = 4932 |
| 144666 | CEFBS_None, // SUB_Fp80 = 4933 |
| 144667 | CEFBS_None, // SUB_Fp80m32 = 4934 |
| 144668 | CEFBS_None, // SUB_Fp80m64 = 4935 |
| 144669 | CEFBS_None, // SUB_FpI16m32 = 4936 |
| 144670 | CEFBS_None, // SUB_FpI16m64 = 4937 |
| 144671 | CEFBS_None, // SUB_FpI16m80 = 4938 |
| 144672 | CEFBS_None, // SUB_FpI32m32 = 4939 |
| 144673 | CEFBS_None, // SUB_FpI32m64 = 4940 |
| 144674 | CEFBS_None, // SUB_FpI32m80 = 4941 |
| 144675 | CEFBS_None, // SUB_FrST0 = 4942 |
| 144676 | CEFBS_None, // SWAPGS = 4943 |
| 144677 | CEFBS_None, // SYSCALL = 4944 |
| 144678 | CEFBS_None, // SYSENTER = 4945 |
| 144679 | CEFBS_None, // SYSEXIT = 4946 |
| 144680 | CEFBS_In64BitMode, // SYSEXIT64 = 4947 |
| 144681 | CEFBS_None, // SYSRET = 4948 |
| 144682 | CEFBS_In64BitMode, // SYSRET64 = 4949 |
| 144683 | CEFBS_None, // T1MSKC32rm = 4950 |
| 144684 | CEFBS_None, // T1MSKC32rr = 4951 |
| 144685 | CEFBS_None, // T1MSKC64rm = 4952 |
| 144686 | CEFBS_None, // T1MSKC64rr = 4953 |
| 144687 | CEFBS_In64BitMode, // T2RPNTLVWZ0 = 4954 |
| 144688 | CEFBS_In64BitMode, // T2RPNTLVWZ0RS = 4955 |
| 144689 | CEFBS_In64BitMode, // T2RPNTLVWZ0RST1 = 4956 |
| 144690 | CEFBS_In64BitMode, // T2RPNTLVWZ0RST1_EVEX = 4957 |
| 144691 | CEFBS_In64BitMode, // T2RPNTLVWZ0RS_EVEX = 4958 |
| 144692 | CEFBS_In64BitMode, // T2RPNTLVWZ0T1 = 4959 |
| 144693 | CEFBS_In64BitMode, // T2RPNTLVWZ0T1_EVEX = 4960 |
| 144694 | CEFBS_In64BitMode, // T2RPNTLVWZ0_EVEX = 4961 |
| 144695 | CEFBS_In64BitMode, // T2RPNTLVWZ1 = 4962 |
| 144696 | CEFBS_In64BitMode, // T2RPNTLVWZ1RS = 4963 |
| 144697 | CEFBS_In64BitMode, // T2RPNTLVWZ1RST1 = 4964 |
| 144698 | CEFBS_In64BitMode, // T2RPNTLVWZ1RST1_EVEX = 4965 |
| 144699 | CEFBS_In64BitMode, // T2RPNTLVWZ1RS_EVEX = 4966 |
| 144700 | CEFBS_In64BitMode, // T2RPNTLVWZ1T1 = 4967 |
| 144701 | CEFBS_In64BitMode, // T2RPNTLVWZ1T1_EVEX = 4968 |
| 144702 | CEFBS_In64BitMode, // T2RPNTLVWZ1_EVEX = 4969 |
| 144703 | CEFBS_None, // TAILJMPd = 4970 |
| 144704 | CEFBS_None, // TAILJMPd64 = 4971 |
| 144705 | CEFBS_None, // TAILJMPd64_CC = 4972 |
| 144706 | CEFBS_None, // TAILJMPd_CC = 4973 |
| 144707 | CEFBS_None, // TAILJMPm = 4974 |
| 144708 | CEFBS_None, // TAILJMPm64 = 4975 |
| 144709 | CEFBS_None, // TAILJMPm64_REX = 4976 |
| 144710 | CEFBS_None, // TAILJMPr = 4977 |
| 144711 | CEFBS_None, // TAILJMPr64 = 4978 |
| 144712 | CEFBS_None, // TAILJMPr64_REX = 4979 |
| 144713 | CEFBS_In64BitMode, // TCMMIMFP16PS = 4980 |
| 144714 | CEFBS_In64BitMode, // TCMMRLFP16PS = 4981 |
| 144715 | CEFBS_In64BitMode, // TCONJTCMMIMFP16PS = 4982 |
| 144716 | CEFBS_In64BitMode, // TCONJTFP16 = 4983 |
| 144717 | CEFBS_None, // TCRETURNdi = 4984 |
| 144718 | CEFBS_None, // TCRETURNdi64 = 4985 |
| 144719 | CEFBS_None, // TCRETURNdi64cc = 4986 |
| 144720 | CEFBS_None, // TCRETURNdicc = 4987 |
| 144721 | CEFBS_None, // TCRETURNmi = 4988 |
| 144722 | CEFBS_None, // TCRETURNmi64 = 4989 |
| 144723 | CEFBS_None, // TCRETURNri = 4990 |
| 144724 | CEFBS_None, // TCRETURNri64 = 4991 |
| 144725 | CEFBS_None, // TCRETURNri64_ImpCall = 4992 |
| 144726 | CEFBS_In64BitMode, // TCVTROWD2PSrre = 4993 |
| 144727 | CEFBS_In64BitMode, // TCVTROWD2PSrri = 4994 |
| 144728 | CEFBS_In64BitMode, // TCVTROWPS2BF16Hrre = 4995 |
| 144729 | CEFBS_In64BitMode, // TCVTROWPS2BF16Hrri = 4996 |
| 144730 | CEFBS_In64BitMode, // TCVTROWPS2BF16Lrre = 4997 |
| 144731 | CEFBS_In64BitMode, // TCVTROWPS2BF16Lrri = 4998 |
| 144732 | CEFBS_In64BitMode, // TCVTROWPS2PHHrre = 4999 |
| 144733 | CEFBS_In64BitMode, // TCVTROWPS2PHHrri = 5000 |
| 144734 | CEFBS_In64BitMode, // TCVTROWPS2PHLrre = 5001 |
| 144735 | CEFBS_In64BitMode, // TCVTROWPS2PHLrri = 5002 |
| 144736 | CEFBS_None, // TDCALL = 5003 |
| 144737 | CEFBS_In64BitMode, // TDPBF16PS = 5004 |
| 144738 | CEFBS_In64BitMode, // TDPBF8PS = 5005 |
| 144739 | CEFBS_In64BitMode, // TDPBHF8PS = 5006 |
| 144740 | CEFBS_In64BitMode, // TDPBSSD = 5007 |
| 144741 | CEFBS_In64BitMode, // TDPBSUD = 5008 |
| 144742 | CEFBS_In64BitMode, // TDPBUSD = 5009 |
| 144743 | CEFBS_In64BitMode, // TDPBUUD = 5010 |
| 144744 | CEFBS_In64BitMode, // TDPFP16PS = 5011 |
| 144745 | CEFBS_In64BitMode, // TDPHBF8PS = 5012 |
| 144746 | CEFBS_In64BitMode, // TDPHF8PS = 5013 |
| 144747 | CEFBS_None, // TEST16i16 = 5014 |
| 144748 | CEFBS_None, // TEST16mi = 5015 |
| 144749 | CEFBS_None, // TEST16mr = 5016 |
| 144750 | CEFBS_None, // TEST16ri = 5017 |
| 144751 | CEFBS_None, // TEST16rr = 5018 |
| 144752 | CEFBS_None, // TEST32i32 = 5019 |
| 144753 | CEFBS_None, // TEST32mi = 5020 |
| 144754 | CEFBS_None, // TEST32mr = 5021 |
| 144755 | CEFBS_None, // TEST32ri = 5022 |
| 144756 | CEFBS_None, // TEST32rr = 5023 |
| 144757 | CEFBS_None, // TEST64i32 = 5024 |
| 144758 | CEFBS_In64BitMode, // TEST64mi32 = 5025 |
| 144759 | CEFBS_None, // TEST64mr = 5026 |
| 144760 | CEFBS_None, // TEST64ri32 = 5027 |
| 144761 | CEFBS_None, // TEST64rr = 5028 |
| 144762 | CEFBS_None, // TEST8i8 = 5029 |
| 144763 | CEFBS_None, // TEST8mi = 5030 |
| 144764 | CEFBS_None, // TEST8mr = 5031 |
| 144765 | CEFBS_None, // TEST8ri = 5032 |
| 144766 | CEFBS_None, // TEST8rr = 5033 |
| 144767 | CEFBS_In64BitMode, // TESTUI = 5034 |
| 144768 | CEFBS_In64BitMode, // TILELOADD = 5035 |
| 144769 | CEFBS_In64BitMode, // TILELOADDRS = 5036 |
| 144770 | CEFBS_In64BitMode, // TILELOADDRST1 = 5037 |
| 144771 | CEFBS_In64BitMode, // TILELOADDRST1_EVEX = 5038 |
| 144772 | CEFBS_In64BitMode, // TILELOADDRS_EVEX = 5039 |
| 144773 | CEFBS_In64BitMode, // TILELOADDT1 = 5040 |
| 144774 | CEFBS_In64BitMode, // TILELOADDT1_EVEX = 5041 |
| 144775 | CEFBS_In64BitMode, // TILELOADD_EVEX = 5042 |
| 144776 | CEFBS_In64BitMode, // TILEMOVROWrre = 5043 |
| 144777 | CEFBS_In64BitMode, // TILEMOVROWrri = 5044 |
| 144778 | CEFBS_In64BitMode, // TILERELEASE = 5045 |
| 144779 | CEFBS_In64BitMode, // TILESTORED = 5046 |
| 144780 | CEFBS_In64BitMode, // TILESTORED_EVEX = 5047 |
| 144781 | CEFBS_In64BitMode, // TILEZERO = 5048 |
| 144782 | CEFBS_None, // TLBSYNC = 5049 |
| 144783 | CEFBS_Not64BitMode, // TLSCall_32 = 5050 |
| 144784 | CEFBS_In64BitMode, // TLSCall_64 = 5051 |
| 144785 | CEFBS_Not64BitMode, // TLS_addr32 = 5052 |
| 144786 | CEFBS_In64BitMode, // TLS_addr64 = 5053 |
| 144787 | CEFBS_In64BitMode, // TLS_addrX32 = 5054 |
| 144788 | CEFBS_Not64BitMode, // TLS_base_addr32 = 5055 |
| 144789 | CEFBS_In64BitMode, // TLS_base_addr64 = 5056 |
| 144790 | CEFBS_In64BitMode, // TLS_base_addrX32 = 5057 |
| 144791 | CEFBS_None, // TLS_desc32 = 5058 |
| 144792 | CEFBS_None, // TLS_desc64 = 5059 |
| 144793 | CEFBS_In64BitMode, // TMMULTF32PS = 5060 |
| 144794 | CEFBS_None, // TPAUSE = 5061 |
| 144795 | CEFBS_None, // TRAP = 5062 |
| 144796 | CEFBS_None, // TST_F = 5063 |
| 144797 | CEFBS_None, // TST_Fp32 = 5064 |
| 144798 | CEFBS_None, // TST_Fp64 = 5065 |
| 144799 | CEFBS_None, // TST_Fp80 = 5066 |
| 144800 | CEFBS_In64BitMode, // TTCMMIMFP16PS = 5067 |
| 144801 | CEFBS_In64BitMode, // TTCMMRLFP16PS = 5068 |
| 144802 | CEFBS_In64BitMode, // TTDPBF16PS = 5069 |
| 144803 | CEFBS_In64BitMode, // TTDPFP16PS = 5070 |
| 144804 | CEFBS_In64BitMode, // TTMMULTF32PS = 5071 |
| 144805 | CEFBS_In64BitMode, // TTRANSPOSED = 5072 |
| 144806 | CEFBS_None, // TZCNT16rm = 5073 |
| 144807 | CEFBS_None, // TZCNT16rm_EVEX = 5074 |
| 144808 | CEFBS_None, // TZCNT16rm_NF = 5075 |
| 144809 | CEFBS_None, // TZCNT16rr = 5076 |
| 144810 | CEFBS_None, // TZCNT16rr_EVEX = 5077 |
| 144811 | CEFBS_None, // TZCNT16rr_NF = 5078 |
| 144812 | CEFBS_None, // TZCNT32rm = 5079 |
| 144813 | CEFBS_None, // TZCNT32rm_EVEX = 5080 |
| 144814 | CEFBS_None, // TZCNT32rm_NF = 5081 |
| 144815 | CEFBS_None, // TZCNT32rr = 5082 |
| 144816 | CEFBS_None, // TZCNT32rr_EVEX = 5083 |
| 144817 | CEFBS_None, // TZCNT32rr_NF = 5084 |
| 144818 | CEFBS_None, // TZCNT64rm = 5085 |
| 144819 | CEFBS_None, // TZCNT64rm_EVEX = 5086 |
| 144820 | CEFBS_None, // TZCNT64rm_NF = 5087 |
| 144821 | CEFBS_None, // TZCNT64rr = 5088 |
| 144822 | CEFBS_None, // TZCNT64rr_EVEX = 5089 |
| 144823 | CEFBS_None, // TZCNT64rr_NF = 5090 |
| 144824 | CEFBS_None, // TZMSK32rm = 5091 |
| 144825 | CEFBS_None, // TZMSK32rr = 5092 |
| 144826 | CEFBS_None, // TZMSK64rm = 5093 |
| 144827 | CEFBS_None, // TZMSK64rr = 5094 |
| 144828 | CEFBS_None, // UBSAN_UD1 = 5095 |
| 144829 | CEFBS_None, // UCOMISDrm = 5096 |
| 144830 | CEFBS_None, // UCOMISDrm_Int = 5097 |
| 144831 | CEFBS_None, // UCOMISDrr = 5098 |
| 144832 | CEFBS_None, // UCOMISDrr_Int = 5099 |
| 144833 | CEFBS_None, // UCOMISSrm = 5100 |
| 144834 | CEFBS_None, // UCOMISSrm_Int = 5101 |
| 144835 | CEFBS_None, // UCOMISSrr = 5102 |
| 144836 | CEFBS_None, // UCOMISSrr_Int = 5103 |
| 144837 | CEFBS_None, // UCOM_FIPr = 5104 |
| 144838 | CEFBS_None, // UCOM_FIr = 5105 |
| 144839 | CEFBS_None, // UCOM_FPPr = 5106 |
| 144840 | CEFBS_None, // UCOM_FPr = 5107 |
| 144841 | CEFBS_None, // UCOM_FpIr32 = 5108 |
| 144842 | CEFBS_None, // UCOM_FpIr64 = 5109 |
| 144843 | CEFBS_None, // UCOM_FpIr80 = 5110 |
| 144844 | CEFBS_None, // UCOM_Fpr32 = 5111 |
| 144845 | CEFBS_None, // UCOM_Fpr64 = 5112 |
| 144846 | CEFBS_None, // UCOM_Fpr80 = 5113 |
| 144847 | CEFBS_None, // UCOM_Fr = 5114 |
| 144848 | CEFBS_None, // UD1Lm = 5115 |
| 144849 | CEFBS_None, // UD1Lr = 5116 |
| 144850 | CEFBS_None, // UD1Qm = 5117 |
| 144851 | CEFBS_None, // UD1Qr = 5118 |
| 144852 | CEFBS_None, // UD1Wm = 5119 |
| 144853 | CEFBS_None, // UD1Wr = 5120 |
| 144854 | CEFBS_In64BitMode, // UIRET = 5121 |
| 144855 | CEFBS_Not64BitMode, // UMONITOR16 = 5122 |
| 144856 | CEFBS_None, // UMONITOR32 = 5123 |
| 144857 | CEFBS_In64BitMode, // UMONITOR64 = 5124 |
| 144858 | CEFBS_None, // UMWAIT = 5125 |
| 144859 | CEFBS_None, // UNPCKHPDrm = 5126 |
| 144860 | CEFBS_None, // UNPCKHPDrr = 5127 |
| 144861 | CEFBS_None, // UNPCKHPSrm = 5128 |
| 144862 | CEFBS_None, // UNPCKHPSrr = 5129 |
| 144863 | CEFBS_None, // UNPCKLPDrm = 5130 |
| 144864 | CEFBS_None, // UNPCKLPDrr = 5131 |
| 144865 | CEFBS_None, // UNPCKLPSrm = 5132 |
| 144866 | CEFBS_None, // UNPCKLPSrr = 5133 |
| 144867 | CEFBS_None, // URDMSRri = 5134 |
| 144868 | CEFBS_In64BitMode, // URDMSRri_EVEX = 5135 |
| 144869 | CEFBS_None, // URDMSRrr = 5136 |
| 144870 | CEFBS_In64BitMode, // URDMSRrr_EVEX = 5137 |
| 144871 | CEFBS_None, // UWRMSRir = 5138 |
| 144872 | CEFBS_In64BitMode, // UWRMSRir_EVEX = 5139 |
| 144873 | CEFBS_None, // UWRMSRrr = 5140 |
| 144874 | CEFBS_In64BitMode, // UWRMSRrr_EVEX = 5141 |
| 144875 | CEFBS_None, // V4FMADDPSrm = 5142 |
| 144876 | CEFBS_None, // V4FMADDPSrmk = 5143 |
| 144877 | CEFBS_None, // V4FMADDPSrmkz = 5144 |
| 144878 | CEFBS_None, // V4FMADDSSrm = 5145 |
| 144879 | CEFBS_None, // V4FMADDSSrmk = 5146 |
| 144880 | CEFBS_None, // V4FMADDSSrmkz = 5147 |
| 144881 | CEFBS_None, // V4FNMADDPSrm = 5148 |
| 144882 | CEFBS_None, // V4FNMADDPSrmk = 5149 |
| 144883 | CEFBS_None, // V4FNMADDPSrmkz = 5150 |
| 144884 | CEFBS_None, // V4FNMADDSSrm = 5151 |
| 144885 | CEFBS_None, // V4FNMADDSSrmk = 5152 |
| 144886 | CEFBS_None, // V4FNMADDSSrmkz = 5153 |
| 144887 | CEFBS_In64BitMode, // VAARG_64 = 5154 |
| 144888 | CEFBS_In64BitMode, // VAARG_X32 = 5155 |
| 144889 | CEFBS_None, // VADDBF16Z128rm = 5156 |
| 144890 | CEFBS_None, // VADDBF16Z128rmb = 5157 |
| 144891 | CEFBS_None, // VADDBF16Z128rmbk = 5158 |
| 144892 | CEFBS_None, // VADDBF16Z128rmbkz = 5159 |
| 144893 | CEFBS_None, // VADDBF16Z128rmk = 5160 |
| 144894 | CEFBS_None, // VADDBF16Z128rmkz = 5161 |
| 144895 | CEFBS_None, // VADDBF16Z128rr = 5162 |
| 144896 | CEFBS_None, // VADDBF16Z128rrk = 5163 |
| 144897 | CEFBS_None, // VADDBF16Z128rrkz = 5164 |
| 144898 | CEFBS_None, // VADDBF16Z256rm = 5165 |
| 144899 | CEFBS_None, // VADDBF16Z256rmb = 5166 |
| 144900 | CEFBS_None, // VADDBF16Z256rmbk = 5167 |
| 144901 | CEFBS_None, // VADDBF16Z256rmbkz = 5168 |
| 144902 | CEFBS_None, // VADDBF16Z256rmk = 5169 |
| 144903 | CEFBS_None, // VADDBF16Z256rmkz = 5170 |
| 144904 | CEFBS_None, // VADDBF16Z256rr = 5171 |
| 144905 | CEFBS_None, // VADDBF16Z256rrk = 5172 |
| 144906 | CEFBS_None, // VADDBF16Z256rrkz = 5173 |
| 144907 | CEFBS_None, // VADDBF16Zrm = 5174 |
| 144908 | CEFBS_None, // VADDBF16Zrmb = 5175 |
| 144909 | CEFBS_None, // VADDBF16Zrmbk = 5176 |
| 144910 | CEFBS_None, // VADDBF16Zrmbkz = 5177 |
| 144911 | CEFBS_None, // VADDBF16Zrmk = 5178 |
| 144912 | CEFBS_None, // VADDBF16Zrmkz = 5179 |
| 144913 | CEFBS_None, // VADDBF16Zrr = 5180 |
| 144914 | CEFBS_None, // VADDBF16Zrrk = 5181 |
| 144915 | CEFBS_None, // VADDBF16Zrrkz = 5182 |
| 144916 | CEFBS_None, // VADDPDYrm = 5183 |
| 144917 | CEFBS_None, // VADDPDYrr = 5184 |
| 144918 | CEFBS_None, // VADDPDZ128rm = 5185 |
| 144919 | CEFBS_None, // VADDPDZ128rmb = 5186 |
| 144920 | CEFBS_None, // VADDPDZ128rmbk = 5187 |
| 144921 | CEFBS_None, // VADDPDZ128rmbkz = 5188 |
| 144922 | CEFBS_None, // VADDPDZ128rmk = 5189 |
| 144923 | CEFBS_None, // VADDPDZ128rmkz = 5190 |
| 144924 | CEFBS_None, // VADDPDZ128rr = 5191 |
| 144925 | CEFBS_None, // VADDPDZ128rrk = 5192 |
| 144926 | CEFBS_None, // VADDPDZ128rrkz = 5193 |
| 144927 | CEFBS_None, // VADDPDZ256rm = 5194 |
| 144928 | CEFBS_None, // VADDPDZ256rmb = 5195 |
| 144929 | CEFBS_None, // VADDPDZ256rmbk = 5196 |
| 144930 | CEFBS_None, // VADDPDZ256rmbkz = 5197 |
| 144931 | CEFBS_None, // VADDPDZ256rmk = 5198 |
| 144932 | CEFBS_None, // VADDPDZ256rmkz = 5199 |
| 144933 | CEFBS_None, // VADDPDZ256rr = 5200 |
| 144934 | CEFBS_None, // VADDPDZ256rrk = 5201 |
| 144935 | CEFBS_None, // VADDPDZ256rrkz = 5202 |
| 144936 | CEFBS_None, // VADDPDZrm = 5203 |
| 144937 | CEFBS_None, // VADDPDZrmb = 5204 |
| 144938 | CEFBS_None, // VADDPDZrmbk = 5205 |
| 144939 | CEFBS_None, // VADDPDZrmbkz = 5206 |
| 144940 | CEFBS_None, // VADDPDZrmk = 5207 |
| 144941 | CEFBS_None, // VADDPDZrmkz = 5208 |
| 144942 | CEFBS_None, // VADDPDZrr = 5209 |
| 144943 | CEFBS_None, // VADDPDZrrb = 5210 |
| 144944 | CEFBS_None, // VADDPDZrrbk = 5211 |
| 144945 | CEFBS_None, // VADDPDZrrbkz = 5212 |
| 144946 | CEFBS_None, // VADDPDZrrk = 5213 |
| 144947 | CEFBS_None, // VADDPDZrrkz = 5214 |
| 144948 | CEFBS_None, // VADDPDrm = 5215 |
| 144949 | CEFBS_None, // VADDPDrr = 5216 |
| 144950 | CEFBS_None, // VADDPHZ128rm = 5217 |
| 144951 | CEFBS_None, // VADDPHZ128rmb = 5218 |
| 144952 | CEFBS_None, // VADDPHZ128rmbk = 5219 |
| 144953 | CEFBS_None, // VADDPHZ128rmbkz = 5220 |
| 144954 | CEFBS_None, // VADDPHZ128rmk = 5221 |
| 144955 | CEFBS_None, // VADDPHZ128rmkz = 5222 |
| 144956 | CEFBS_None, // VADDPHZ128rr = 5223 |
| 144957 | CEFBS_None, // VADDPHZ128rrk = 5224 |
| 144958 | CEFBS_None, // VADDPHZ128rrkz = 5225 |
| 144959 | CEFBS_None, // VADDPHZ256rm = 5226 |
| 144960 | CEFBS_None, // VADDPHZ256rmb = 5227 |
| 144961 | CEFBS_None, // VADDPHZ256rmbk = 5228 |
| 144962 | CEFBS_None, // VADDPHZ256rmbkz = 5229 |
| 144963 | CEFBS_None, // VADDPHZ256rmk = 5230 |
| 144964 | CEFBS_None, // VADDPHZ256rmkz = 5231 |
| 144965 | CEFBS_None, // VADDPHZ256rr = 5232 |
| 144966 | CEFBS_None, // VADDPHZ256rrk = 5233 |
| 144967 | CEFBS_None, // VADDPHZ256rrkz = 5234 |
| 144968 | CEFBS_None, // VADDPHZrm = 5235 |
| 144969 | CEFBS_None, // VADDPHZrmb = 5236 |
| 144970 | CEFBS_None, // VADDPHZrmbk = 5237 |
| 144971 | CEFBS_None, // VADDPHZrmbkz = 5238 |
| 144972 | CEFBS_None, // VADDPHZrmk = 5239 |
| 144973 | CEFBS_None, // VADDPHZrmkz = 5240 |
| 144974 | CEFBS_None, // VADDPHZrr = 5241 |
| 144975 | CEFBS_None, // VADDPHZrrb = 5242 |
| 144976 | CEFBS_None, // VADDPHZrrbk = 5243 |
| 144977 | CEFBS_None, // VADDPHZrrbkz = 5244 |
| 144978 | CEFBS_None, // VADDPHZrrk = 5245 |
| 144979 | CEFBS_None, // VADDPHZrrkz = 5246 |
| 144980 | CEFBS_None, // VADDPSYrm = 5247 |
| 144981 | CEFBS_None, // VADDPSYrr = 5248 |
| 144982 | CEFBS_None, // VADDPSZ128rm = 5249 |
| 144983 | CEFBS_None, // VADDPSZ128rmb = 5250 |
| 144984 | CEFBS_None, // VADDPSZ128rmbk = 5251 |
| 144985 | CEFBS_None, // VADDPSZ128rmbkz = 5252 |
| 144986 | CEFBS_None, // VADDPSZ128rmk = 5253 |
| 144987 | CEFBS_None, // VADDPSZ128rmkz = 5254 |
| 144988 | CEFBS_None, // VADDPSZ128rr = 5255 |
| 144989 | CEFBS_None, // VADDPSZ128rrk = 5256 |
| 144990 | CEFBS_None, // VADDPSZ128rrkz = 5257 |
| 144991 | CEFBS_None, // VADDPSZ256rm = 5258 |
| 144992 | CEFBS_None, // VADDPSZ256rmb = 5259 |
| 144993 | CEFBS_None, // VADDPSZ256rmbk = 5260 |
| 144994 | CEFBS_None, // VADDPSZ256rmbkz = 5261 |
| 144995 | CEFBS_None, // VADDPSZ256rmk = 5262 |
| 144996 | CEFBS_None, // VADDPSZ256rmkz = 5263 |
| 144997 | CEFBS_None, // VADDPSZ256rr = 5264 |
| 144998 | CEFBS_None, // VADDPSZ256rrk = 5265 |
| 144999 | CEFBS_None, // VADDPSZ256rrkz = 5266 |
| 145000 | CEFBS_None, // VADDPSZrm = 5267 |
| 145001 | CEFBS_None, // VADDPSZrmb = 5268 |
| 145002 | CEFBS_None, // VADDPSZrmbk = 5269 |
| 145003 | CEFBS_None, // VADDPSZrmbkz = 5270 |
| 145004 | CEFBS_None, // VADDPSZrmk = 5271 |
| 145005 | CEFBS_None, // VADDPSZrmkz = 5272 |
| 145006 | CEFBS_None, // VADDPSZrr = 5273 |
| 145007 | CEFBS_None, // VADDPSZrrb = 5274 |
| 145008 | CEFBS_None, // VADDPSZrrbk = 5275 |
| 145009 | CEFBS_None, // VADDPSZrrbkz = 5276 |
| 145010 | CEFBS_None, // VADDPSZrrk = 5277 |
| 145011 | CEFBS_None, // VADDPSZrrkz = 5278 |
| 145012 | CEFBS_None, // VADDPSrm = 5279 |
| 145013 | CEFBS_None, // VADDPSrr = 5280 |
| 145014 | CEFBS_None, // VADDSDZrm = 5281 |
| 145015 | CEFBS_None, // VADDSDZrm_Int = 5282 |
| 145016 | CEFBS_None, // VADDSDZrmk_Int = 5283 |
| 145017 | CEFBS_None, // VADDSDZrmkz_Int = 5284 |
| 145018 | CEFBS_None, // VADDSDZrr = 5285 |
| 145019 | CEFBS_None, // VADDSDZrr_Int = 5286 |
| 145020 | CEFBS_None, // VADDSDZrrb_Int = 5287 |
| 145021 | CEFBS_None, // VADDSDZrrbk_Int = 5288 |
| 145022 | CEFBS_None, // VADDSDZrrbkz_Int = 5289 |
| 145023 | CEFBS_None, // VADDSDZrrk_Int = 5290 |
| 145024 | CEFBS_None, // VADDSDZrrkz_Int = 5291 |
| 145025 | CEFBS_None, // VADDSDrm = 5292 |
| 145026 | CEFBS_None, // VADDSDrm_Int = 5293 |
| 145027 | CEFBS_None, // VADDSDrr = 5294 |
| 145028 | CEFBS_None, // VADDSDrr_Int = 5295 |
| 145029 | CEFBS_None, // VADDSHZrm = 5296 |
| 145030 | CEFBS_None, // VADDSHZrm_Int = 5297 |
| 145031 | CEFBS_None, // VADDSHZrmk_Int = 5298 |
| 145032 | CEFBS_None, // VADDSHZrmkz_Int = 5299 |
| 145033 | CEFBS_None, // VADDSHZrr = 5300 |
| 145034 | CEFBS_None, // VADDSHZrr_Int = 5301 |
| 145035 | CEFBS_None, // VADDSHZrrb_Int = 5302 |
| 145036 | CEFBS_None, // VADDSHZrrbk_Int = 5303 |
| 145037 | CEFBS_None, // VADDSHZrrbkz_Int = 5304 |
| 145038 | CEFBS_None, // VADDSHZrrk_Int = 5305 |
| 145039 | CEFBS_None, // VADDSHZrrkz_Int = 5306 |
| 145040 | CEFBS_None, // VADDSSZrm = 5307 |
| 145041 | CEFBS_None, // VADDSSZrm_Int = 5308 |
| 145042 | CEFBS_None, // VADDSSZrmk_Int = 5309 |
| 145043 | CEFBS_None, // VADDSSZrmkz_Int = 5310 |
| 145044 | CEFBS_None, // VADDSSZrr = 5311 |
| 145045 | CEFBS_None, // VADDSSZrr_Int = 5312 |
| 145046 | CEFBS_None, // VADDSSZrrb_Int = 5313 |
| 145047 | CEFBS_None, // VADDSSZrrbk_Int = 5314 |
| 145048 | CEFBS_None, // VADDSSZrrbkz_Int = 5315 |
| 145049 | CEFBS_None, // VADDSSZrrk_Int = 5316 |
| 145050 | CEFBS_None, // VADDSSZrrkz_Int = 5317 |
| 145051 | CEFBS_None, // VADDSSrm = 5318 |
| 145052 | CEFBS_None, // VADDSSrm_Int = 5319 |
| 145053 | CEFBS_None, // VADDSSrr = 5320 |
| 145054 | CEFBS_None, // VADDSSrr_Int = 5321 |
| 145055 | CEFBS_None, // VADDSUBPDYrm = 5322 |
| 145056 | CEFBS_None, // VADDSUBPDYrr = 5323 |
| 145057 | CEFBS_None, // VADDSUBPDrm = 5324 |
| 145058 | CEFBS_None, // VADDSUBPDrr = 5325 |
| 145059 | CEFBS_None, // VADDSUBPSYrm = 5326 |
| 145060 | CEFBS_None, // VADDSUBPSYrr = 5327 |
| 145061 | CEFBS_None, // VADDSUBPSrm = 5328 |
| 145062 | CEFBS_None, // VADDSUBPSrr = 5329 |
| 145063 | CEFBS_None, // VAESDECLASTYrm = 5330 |
| 145064 | CEFBS_None, // VAESDECLASTYrr = 5331 |
| 145065 | CEFBS_None, // VAESDECLASTZ128rm = 5332 |
| 145066 | CEFBS_None, // VAESDECLASTZ128rr = 5333 |
| 145067 | CEFBS_None, // VAESDECLASTZ256rm = 5334 |
| 145068 | CEFBS_None, // VAESDECLASTZ256rr = 5335 |
| 145069 | CEFBS_None, // VAESDECLASTZrm = 5336 |
| 145070 | CEFBS_None, // VAESDECLASTZrr = 5337 |
| 145071 | CEFBS_None, // VAESDECLASTrm = 5338 |
| 145072 | CEFBS_None, // VAESDECLASTrr = 5339 |
| 145073 | CEFBS_None, // VAESDECYrm = 5340 |
| 145074 | CEFBS_None, // VAESDECYrr = 5341 |
| 145075 | CEFBS_None, // VAESDECZ128rm = 5342 |
| 145076 | CEFBS_None, // VAESDECZ128rr = 5343 |
| 145077 | CEFBS_None, // VAESDECZ256rm = 5344 |
| 145078 | CEFBS_None, // VAESDECZ256rr = 5345 |
| 145079 | CEFBS_None, // VAESDECZrm = 5346 |
| 145080 | CEFBS_None, // VAESDECZrr = 5347 |
| 145081 | CEFBS_None, // VAESDECrm = 5348 |
| 145082 | CEFBS_None, // VAESDECrr = 5349 |
| 145083 | CEFBS_None, // VAESENCLASTYrm = 5350 |
| 145084 | CEFBS_None, // VAESENCLASTYrr = 5351 |
| 145085 | CEFBS_None, // VAESENCLASTZ128rm = 5352 |
| 145086 | CEFBS_None, // VAESENCLASTZ128rr = 5353 |
| 145087 | CEFBS_None, // VAESENCLASTZ256rm = 5354 |
| 145088 | CEFBS_None, // VAESENCLASTZ256rr = 5355 |
| 145089 | CEFBS_None, // VAESENCLASTZrm = 5356 |
| 145090 | CEFBS_None, // VAESENCLASTZrr = 5357 |
| 145091 | CEFBS_None, // VAESENCLASTrm = 5358 |
| 145092 | CEFBS_None, // VAESENCLASTrr = 5359 |
| 145093 | CEFBS_None, // VAESENCYrm = 5360 |
| 145094 | CEFBS_None, // VAESENCYrr = 5361 |
| 145095 | CEFBS_None, // VAESENCZ128rm = 5362 |
| 145096 | CEFBS_None, // VAESENCZ128rr = 5363 |
| 145097 | CEFBS_None, // VAESENCZ256rm = 5364 |
| 145098 | CEFBS_None, // VAESENCZ256rr = 5365 |
| 145099 | CEFBS_None, // VAESENCZrm = 5366 |
| 145100 | CEFBS_None, // VAESENCZrr = 5367 |
| 145101 | CEFBS_None, // VAESENCrm = 5368 |
| 145102 | CEFBS_None, // VAESENCrr = 5369 |
| 145103 | CEFBS_None, // VAESIMCrm = 5370 |
| 145104 | CEFBS_None, // VAESIMCrr = 5371 |
| 145105 | CEFBS_None, // VAESKEYGENASSIST128rm = 5372 |
| 145106 | CEFBS_None, // VAESKEYGENASSIST128rr = 5373 |
| 145107 | CEFBS_None, // VALIGNDZ128rmbi = 5374 |
| 145108 | CEFBS_None, // VALIGNDZ128rmbik = 5375 |
| 145109 | CEFBS_None, // VALIGNDZ128rmbikz = 5376 |
| 145110 | CEFBS_None, // VALIGNDZ128rmi = 5377 |
| 145111 | CEFBS_None, // VALIGNDZ128rmik = 5378 |
| 145112 | CEFBS_None, // VALIGNDZ128rmikz = 5379 |
| 145113 | CEFBS_None, // VALIGNDZ128rri = 5380 |
| 145114 | CEFBS_None, // VALIGNDZ128rrik = 5381 |
| 145115 | CEFBS_None, // VALIGNDZ128rrikz = 5382 |
| 145116 | CEFBS_None, // VALIGNDZ256rmbi = 5383 |
| 145117 | CEFBS_None, // VALIGNDZ256rmbik = 5384 |
| 145118 | CEFBS_None, // VALIGNDZ256rmbikz = 5385 |
| 145119 | CEFBS_None, // VALIGNDZ256rmi = 5386 |
| 145120 | CEFBS_None, // VALIGNDZ256rmik = 5387 |
| 145121 | CEFBS_None, // VALIGNDZ256rmikz = 5388 |
| 145122 | CEFBS_None, // VALIGNDZ256rri = 5389 |
| 145123 | CEFBS_None, // VALIGNDZ256rrik = 5390 |
| 145124 | CEFBS_None, // VALIGNDZ256rrikz = 5391 |
| 145125 | CEFBS_None, // VALIGNDZrmbi = 5392 |
| 145126 | CEFBS_None, // VALIGNDZrmbik = 5393 |
| 145127 | CEFBS_None, // VALIGNDZrmbikz = 5394 |
| 145128 | CEFBS_None, // VALIGNDZrmi = 5395 |
| 145129 | CEFBS_None, // VALIGNDZrmik = 5396 |
| 145130 | CEFBS_None, // VALIGNDZrmikz = 5397 |
| 145131 | CEFBS_None, // VALIGNDZrri = 5398 |
| 145132 | CEFBS_None, // VALIGNDZrrik = 5399 |
| 145133 | CEFBS_None, // VALIGNDZrrikz = 5400 |
| 145134 | CEFBS_None, // VALIGNQZ128rmbi = 5401 |
| 145135 | CEFBS_None, // VALIGNQZ128rmbik = 5402 |
| 145136 | CEFBS_None, // VALIGNQZ128rmbikz = 5403 |
| 145137 | CEFBS_None, // VALIGNQZ128rmi = 5404 |
| 145138 | CEFBS_None, // VALIGNQZ128rmik = 5405 |
| 145139 | CEFBS_None, // VALIGNQZ128rmikz = 5406 |
| 145140 | CEFBS_None, // VALIGNQZ128rri = 5407 |
| 145141 | CEFBS_None, // VALIGNQZ128rrik = 5408 |
| 145142 | CEFBS_None, // VALIGNQZ128rrikz = 5409 |
| 145143 | CEFBS_None, // VALIGNQZ256rmbi = 5410 |
| 145144 | CEFBS_None, // VALIGNQZ256rmbik = 5411 |
| 145145 | CEFBS_None, // VALIGNQZ256rmbikz = 5412 |
| 145146 | CEFBS_None, // VALIGNQZ256rmi = 5413 |
| 145147 | CEFBS_None, // VALIGNQZ256rmik = 5414 |
| 145148 | CEFBS_None, // VALIGNQZ256rmikz = 5415 |
| 145149 | CEFBS_None, // VALIGNQZ256rri = 5416 |
| 145150 | CEFBS_None, // VALIGNQZ256rrik = 5417 |
| 145151 | CEFBS_None, // VALIGNQZ256rrikz = 5418 |
| 145152 | CEFBS_None, // VALIGNQZrmbi = 5419 |
| 145153 | CEFBS_None, // VALIGNQZrmbik = 5420 |
| 145154 | CEFBS_None, // VALIGNQZrmbikz = 5421 |
| 145155 | CEFBS_None, // VALIGNQZrmi = 5422 |
| 145156 | CEFBS_None, // VALIGNQZrmik = 5423 |
| 145157 | CEFBS_None, // VALIGNQZrmikz = 5424 |
| 145158 | CEFBS_None, // VALIGNQZrri = 5425 |
| 145159 | CEFBS_None, // VALIGNQZrrik = 5426 |
| 145160 | CEFBS_None, // VALIGNQZrrikz = 5427 |
| 145161 | CEFBS_None, // VANDNPDYrm = 5428 |
| 145162 | CEFBS_None, // VANDNPDYrr = 5429 |
| 145163 | CEFBS_None, // VANDNPDZ128rm = 5430 |
| 145164 | CEFBS_None, // VANDNPDZ128rmb = 5431 |
| 145165 | CEFBS_None, // VANDNPDZ128rmbk = 5432 |
| 145166 | CEFBS_None, // VANDNPDZ128rmbkz = 5433 |
| 145167 | CEFBS_None, // VANDNPDZ128rmk = 5434 |
| 145168 | CEFBS_None, // VANDNPDZ128rmkz = 5435 |
| 145169 | CEFBS_None, // VANDNPDZ128rr = 5436 |
| 145170 | CEFBS_None, // VANDNPDZ128rrk = 5437 |
| 145171 | CEFBS_None, // VANDNPDZ128rrkz = 5438 |
| 145172 | CEFBS_None, // VANDNPDZ256rm = 5439 |
| 145173 | CEFBS_None, // VANDNPDZ256rmb = 5440 |
| 145174 | CEFBS_None, // VANDNPDZ256rmbk = 5441 |
| 145175 | CEFBS_None, // VANDNPDZ256rmbkz = 5442 |
| 145176 | CEFBS_None, // VANDNPDZ256rmk = 5443 |
| 145177 | CEFBS_None, // VANDNPDZ256rmkz = 5444 |
| 145178 | CEFBS_None, // VANDNPDZ256rr = 5445 |
| 145179 | CEFBS_None, // VANDNPDZ256rrk = 5446 |
| 145180 | CEFBS_None, // VANDNPDZ256rrkz = 5447 |
| 145181 | CEFBS_None, // VANDNPDZrm = 5448 |
| 145182 | CEFBS_None, // VANDNPDZrmb = 5449 |
| 145183 | CEFBS_None, // VANDNPDZrmbk = 5450 |
| 145184 | CEFBS_None, // VANDNPDZrmbkz = 5451 |
| 145185 | CEFBS_None, // VANDNPDZrmk = 5452 |
| 145186 | CEFBS_None, // VANDNPDZrmkz = 5453 |
| 145187 | CEFBS_None, // VANDNPDZrr = 5454 |
| 145188 | CEFBS_None, // VANDNPDZrrk = 5455 |
| 145189 | CEFBS_None, // VANDNPDZrrkz = 5456 |
| 145190 | CEFBS_None, // VANDNPDrm = 5457 |
| 145191 | CEFBS_None, // VANDNPDrr = 5458 |
| 145192 | CEFBS_None, // VANDNPSYrm = 5459 |
| 145193 | CEFBS_None, // VANDNPSYrr = 5460 |
| 145194 | CEFBS_None, // VANDNPSZ128rm = 5461 |
| 145195 | CEFBS_None, // VANDNPSZ128rmb = 5462 |
| 145196 | CEFBS_None, // VANDNPSZ128rmbk = 5463 |
| 145197 | CEFBS_None, // VANDNPSZ128rmbkz = 5464 |
| 145198 | CEFBS_None, // VANDNPSZ128rmk = 5465 |
| 145199 | CEFBS_None, // VANDNPSZ128rmkz = 5466 |
| 145200 | CEFBS_None, // VANDNPSZ128rr = 5467 |
| 145201 | CEFBS_None, // VANDNPSZ128rrk = 5468 |
| 145202 | CEFBS_None, // VANDNPSZ128rrkz = 5469 |
| 145203 | CEFBS_None, // VANDNPSZ256rm = 5470 |
| 145204 | CEFBS_None, // VANDNPSZ256rmb = 5471 |
| 145205 | CEFBS_None, // VANDNPSZ256rmbk = 5472 |
| 145206 | CEFBS_None, // VANDNPSZ256rmbkz = 5473 |
| 145207 | CEFBS_None, // VANDNPSZ256rmk = 5474 |
| 145208 | CEFBS_None, // VANDNPSZ256rmkz = 5475 |
| 145209 | CEFBS_None, // VANDNPSZ256rr = 5476 |
| 145210 | CEFBS_None, // VANDNPSZ256rrk = 5477 |
| 145211 | CEFBS_None, // VANDNPSZ256rrkz = 5478 |
| 145212 | CEFBS_None, // VANDNPSZrm = 5479 |
| 145213 | CEFBS_None, // VANDNPSZrmb = 5480 |
| 145214 | CEFBS_None, // VANDNPSZrmbk = 5481 |
| 145215 | CEFBS_None, // VANDNPSZrmbkz = 5482 |
| 145216 | CEFBS_None, // VANDNPSZrmk = 5483 |
| 145217 | CEFBS_None, // VANDNPSZrmkz = 5484 |
| 145218 | CEFBS_None, // VANDNPSZrr = 5485 |
| 145219 | CEFBS_None, // VANDNPSZrrk = 5486 |
| 145220 | CEFBS_None, // VANDNPSZrrkz = 5487 |
| 145221 | CEFBS_None, // VANDNPSrm = 5488 |
| 145222 | CEFBS_None, // VANDNPSrr = 5489 |
| 145223 | CEFBS_None, // VANDPDYrm = 5490 |
| 145224 | CEFBS_None, // VANDPDYrr = 5491 |
| 145225 | CEFBS_None, // VANDPDZ128rm = 5492 |
| 145226 | CEFBS_None, // VANDPDZ128rmb = 5493 |
| 145227 | CEFBS_None, // VANDPDZ128rmbk = 5494 |
| 145228 | CEFBS_None, // VANDPDZ128rmbkz = 5495 |
| 145229 | CEFBS_None, // VANDPDZ128rmk = 5496 |
| 145230 | CEFBS_None, // VANDPDZ128rmkz = 5497 |
| 145231 | CEFBS_None, // VANDPDZ128rr = 5498 |
| 145232 | CEFBS_None, // VANDPDZ128rrk = 5499 |
| 145233 | CEFBS_None, // VANDPDZ128rrkz = 5500 |
| 145234 | CEFBS_None, // VANDPDZ256rm = 5501 |
| 145235 | CEFBS_None, // VANDPDZ256rmb = 5502 |
| 145236 | CEFBS_None, // VANDPDZ256rmbk = 5503 |
| 145237 | CEFBS_None, // VANDPDZ256rmbkz = 5504 |
| 145238 | CEFBS_None, // VANDPDZ256rmk = 5505 |
| 145239 | CEFBS_None, // VANDPDZ256rmkz = 5506 |
| 145240 | CEFBS_None, // VANDPDZ256rr = 5507 |
| 145241 | CEFBS_None, // VANDPDZ256rrk = 5508 |
| 145242 | CEFBS_None, // VANDPDZ256rrkz = 5509 |
| 145243 | CEFBS_None, // VANDPDZrm = 5510 |
| 145244 | CEFBS_None, // VANDPDZrmb = 5511 |
| 145245 | CEFBS_None, // VANDPDZrmbk = 5512 |
| 145246 | CEFBS_None, // VANDPDZrmbkz = 5513 |
| 145247 | CEFBS_None, // VANDPDZrmk = 5514 |
| 145248 | CEFBS_None, // VANDPDZrmkz = 5515 |
| 145249 | CEFBS_None, // VANDPDZrr = 5516 |
| 145250 | CEFBS_None, // VANDPDZrrk = 5517 |
| 145251 | CEFBS_None, // VANDPDZrrkz = 5518 |
| 145252 | CEFBS_None, // VANDPDrm = 5519 |
| 145253 | CEFBS_None, // VANDPDrr = 5520 |
| 145254 | CEFBS_None, // VANDPSYrm = 5521 |
| 145255 | CEFBS_None, // VANDPSYrr = 5522 |
| 145256 | CEFBS_None, // VANDPSZ128rm = 5523 |
| 145257 | CEFBS_None, // VANDPSZ128rmb = 5524 |
| 145258 | CEFBS_None, // VANDPSZ128rmbk = 5525 |
| 145259 | CEFBS_None, // VANDPSZ128rmbkz = 5526 |
| 145260 | CEFBS_None, // VANDPSZ128rmk = 5527 |
| 145261 | CEFBS_None, // VANDPSZ128rmkz = 5528 |
| 145262 | CEFBS_None, // VANDPSZ128rr = 5529 |
| 145263 | CEFBS_None, // VANDPSZ128rrk = 5530 |
| 145264 | CEFBS_None, // VANDPSZ128rrkz = 5531 |
| 145265 | CEFBS_None, // VANDPSZ256rm = 5532 |
| 145266 | CEFBS_None, // VANDPSZ256rmb = 5533 |
| 145267 | CEFBS_None, // VANDPSZ256rmbk = 5534 |
| 145268 | CEFBS_None, // VANDPSZ256rmbkz = 5535 |
| 145269 | CEFBS_None, // VANDPSZ256rmk = 5536 |
| 145270 | CEFBS_None, // VANDPSZ256rmkz = 5537 |
| 145271 | CEFBS_None, // VANDPSZ256rr = 5538 |
| 145272 | CEFBS_None, // VANDPSZ256rrk = 5539 |
| 145273 | CEFBS_None, // VANDPSZ256rrkz = 5540 |
| 145274 | CEFBS_None, // VANDPSZrm = 5541 |
| 145275 | CEFBS_None, // VANDPSZrmb = 5542 |
| 145276 | CEFBS_None, // VANDPSZrmbk = 5543 |
| 145277 | CEFBS_None, // VANDPSZrmbkz = 5544 |
| 145278 | CEFBS_None, // VANDPSZrmk = 5545 |
| 145279 | CEFBS_None, // VANDPSZrmkz = 5546 |
| 145280 | CEFBS_None, // VANDPSZrr = 5547 |
| 145281 | CEFBS_None, // VANDPSZrrk = 5548 |
| 145282 | CEFBS_None, // VANDPSZrrkz = 5549 |
| 145283 | CEFBS_None, // VANDPSrm = 5550 |
| 145284 | CEFBS_None, // VANDPSrr = 5551 |
| 145285 | CEFBS_None, // VASTART_SAVE_XMM_REGS = 5552 |
| 145286 | CEFBS_None, // VBCSTNEBF162PSYrm = 5553 |
| 145287 | CEFBS_None, // VBCSTNEBF162PSrm = 5554 |
| 145288 | CEFBS_None, // VBCSTNESH2PSYrm = 5555 |
| 145289 | CEFBS_None, // VBCSTNESH2PSrm = 5556 |
| 145290 | CEFBS_None, // VBLENDMPDZ128rm = 5557 |
| 145291 | CEFBS_None, // VBLENDMPDZ128rmb = 5558 |
| 145292 | CEFBS_None, // VBLENDMPDZ128rmbk = 5559 |
| 145293 | CEFBS_None, // VBLENDMPDZ128rmbkz = 5560 |
| 145294 | CEFBS_None, // VBLENDMPDZ128rmk = 5561 |
| 145295 | CEFBS_None, // VBLENDMPDZ128rmkz = 5562 |
| 145296 | CEFBS_None, // VBLENDMPDZ128rr = 5563 |
| 145297 | CEFBS_None, // VBLENDMPDZ128rrk = 5564 |
| 145298 | CEFBS_None, // VBLENDMPDZ128rrkz = 5565 |
| 145299 | CEFBS_None, // VBLENDMPDZ256rm = 5566 |
| 145300 | CEFBS_None, // VBLENDMPDZ256rmb = 5567 |
| 145301 | CEFBS_None, // VBLENDMPDZ256rmbk = 5568 |
| 145302 | CEFBS_None, // VBLENDMPDZ256rmbkz = 5569 |
| 145303 | CEFBS_None, // VBLENDMPDZ256rmk = 5570 |
| 145304 | CEFBS_None, // VBLENDMPDZ256rmkz = 5571 |
| 145305 | CEFBS_None, // VBLENDMPDZ256rr = 5572 |
| 145306 | CEFBS_None, // VBLENDMPDZ256rrk = 5573 |
| 145307 | CEFBS_None, // VBLENDMPDZ256rrkz = 5574 |
| 145308 | CEFBS_None, // VBLENDMPDZrm = 5575 |
| 145309 | CEFBS_None, // VBLENDMPDZrmb = 5576 |
| 145310 | CEFBS_None, // VBLENDMPDZrmbk = 5577 |
| 145311 | CEFBS_None, // VBLENDMPDZrmbkz = 5578 |
| 145312 | CEFBS_None, // VBLENDMPDZrmk = 5579 |
| 145313 | CEFBS_None, // VBLENDMPDZrmkz = 5580 |
| 145314 | CEFBS_None, // VBLENDMPDZrr = 5581 |
| 145315 | CEFBS_None, // VBLENDMPDZrrk = 5582 |
| 145316 | CEFBS_None, // VBLENDMPDZrrkz = 5583 |
| 145317 | CEFBS_None, // VBLENDMPSZ128rm = 5584 |
| 145318 | CEFBS_None, // VBLENDMPSZ128rmb = 5585 |
| 145319 | CEFBS_None, // VBLENDMPSZ128rmbk = 5586 |
| 145320 | CEFBS_None, // VBLENDMPSZ128rmbkz = 5587 |
| 145321 | CEFBS_None, // VBLENDMPSZ128rmk = 5588 |
| 145322 | CEFBS_None, // VBLENDMPSZ128rmkz = 5589 |
| 145323 | CEFBS_None, // VBLENDMPSZ128rr = 5590 |
| 145324 | CEFBS_None, // VBLENDMPSZ128rrk = 5591 |
| 145325 | CEFBS_None, // VBLENDMPSZ128rrkz = 5592 |
| 145326 | CEFBS_None, // VBLENDMPSZ256rm = 5593 |
| 145327 | CEFBS_None, // VBLENDMPSZ256rmb = 5594 |
| 145328 | CEFBS_None, // VBLENDMPSZ256rmbk = 5595 |
| 145329 | CEFBS_None, // VBLENDMPSZ256rmbkz = 5596 |
| 145330 | CEFBS_None, // VBLENDMPSZ256rmk = 5597 |
| 145331 | CEFBS_None, // VBLENDMPSZ256rmkz = 5598 |
| 145332 | CEFBS_None, // VBLENDMPSZ256rr = 5599 |
| 145333 | CEFBS_None, // VBLENDMPSZ256rrk = 5600 |
| 145334 | CEFBS_None, // VBLENDMPSZ256rrkz = 5601 |
| 145335 | CEFBS_None, // VBLENDMPSZrm = 5602 |
| 145336 | CEFBS_None, // VBLENDMPSZrmb = 5603 |
| 145337 | CEFBS_None, // VBLENDMPSZrmbk = 5604 |
| 145338 | CEFBS_None, // VBLENDMPSZrmbkz = 5605 |
| 145339 | CEFBS_None, // VBLENDMPSZrmk = 5606 |
| 145340 | CEFBS_None, // VBLENDMPSZrmkz = 5607 |
| 145341 | CEFBS_None, // VBLENDMPSZrr = 5608 |
| 145342 | CEFBS_None, // VBLENDMPSZrrk = 5609 |
| 145343 | CEFBS_None, // VBLENDMPSZrrkz = 5610 |
| 145344 | CEFBS_None, // VBLENDPDYrmi = 5611 |
| 145345 | CEFBS_None, // VBLENDPDYrri = 5612 |
| 145346 | CEFBS_None, // VBLENDPDrmi = 5613 |
| 145347 | CEFBS_None, // VBLENDPDrri = 5614 |
| 145348 | CEFBS_None, // VBLENDPSYrmi = 5615 |
| 145349 | CEFBS_None, // VBLENDPSYrri = 5616 |
| 145350 | CEFBS_None, // VBLENDPSrmi = 5617 |
| 145351 | CEFBS_None, // VBLENDPSrri = 5618 |
| 145352 | CEFBS_None, // VBLENDVPDYrmr = 5619 |
| 145353 | CEFBS_None, // VBLENDVPDYrrr = 5620 |
| 145354 | CEFBS_None, // VBLENDVPDrmr = 5621 |
| 145355 | CEFBS_None, // VBLENDVPDrrr = 5622 |
| 145356 | CEFBS_None, // VBLENDVPSYrmr = 5623 |
| 145357 | CEFBS_None, // VBLENDVPSYrrr = 5624 |
| 145358 | CEFBS_None, // VBLENDVPSrmr = 5625 |
| 145359 | CEFBS_None, // VBLENDVPSrrr = 5626 |
| 145360 | CEFBS_None, // VBROADCASTF128rm = 5627 |
| 145361 | CEFBS_None, // VBROADCASTF32X2Z256rm = 5628 |
| 145362 | CEFBS_None, // VBROADCASTF32X2Z256rmk = 5629 |
| 145363 | CEFBS_None, // VBROADCASTF32X2Z256rmkz = 5630 |
| 145364 | CEFBS_None, // VBROADCASTF32X2Z256rr = 5631 |
| 145365 | CEFBS_None, // VBROADCASTF32X2Z256rrk = 5632 |
| 145366 | CEFBS_None, // VBROADCASTF32X2Z256rrkz = 5633 |
| 145367 | CEFBS_None, // VBROADCASTF32X2Zrm = 5634 |
| 145368 | CEFBS_None, // VBROADCASTF32X2Zrmk = 5635 |
| 145369 | CEFBS_None, // VBROADCASTF32X2Zrmkz = 5636 |
| 145370 | CEFBS_None, // VBROADCASTF32X2Zrr = 5637 |
| 145371 | CEFBS_None, // VBROADCASTF32X2Zrrk = 5638 |
| 145372 | CEFBS_None, // VBROADCASTF32X2Zrrkz = 5639 |
| 145373 | CEFBS_None, // VBROADCASTF32X4Z256rm = 5640 |
| 145374 | CEFBS_None, // VBROADCASTF32X4Z256rmk = 5641 |
| 145375 | CEFBS_None, // VBROADCASTF32X4Z256rmkz = 5642 |
| 145376 | CEFBS_None, // VBROADCASTF32X4Zrm = 5643 |
| 145377 | CEFBS_None, // VBROADCASTF32X4Zrmk = 5644 |
| 145378 | CEFBS_None, // VBROADCASTF32X4Zrmkz = 5645 |
| 145379 | CEFBS_None, // VBROADCASTF32X8Zrm = 5646 |
| 145380 | CEFBS_None, // VBROADCASTF32X8Zrmk = 5647 |
| 145381 | CEFBS_None, // VBROADCASTF32X8Zrmkz = 5648 |
| 145382 | CEFBS_None, // VBROADCASTF64X2Z256rm = 5649 |
| 145383 | CEFBS_None, // VBROADCASTF64X2Z256rmk = 5650 |
| 145384 | CEFBS_None, // VBROADCASTF64X2Z256rmkz = 5651 |
| 145385 | CEFBS_None, // VBROADCASTF64X2Zrm = 5652 |
| 145386 | CEFBS_None, // VBROADCASTF64X2Zrmk = 5653 |
| 145387 | CEFBS_None, // VBROADCASTF64X2Zrmkz = 5654 |
| 145388 | CEFBS_None, // VBROADCASTF64X4Zrm = 5655 |
| 145389 | CEFBS_None, // VBROADCASTF64X4Zrmk = 5656 |
| 145390 | CEFBS_None, // VBROADCASTF64X4Zrmkz = 5657 |
| 145391 | CEFBS_None, // VBROADCASTI128rm = 5658 |
| 145392 | CEFBS_None, // VBROADCASTI32X2Z128rm = 5659 |
| 145393 | CEFBS_None, // VBROADCASTI32X2Z128rmk = 5660 |
| 145394 | CEFBS_None, // VBROADCASTI32X2Z128rmkz = 5661 |
| 145395 | CEFBS_None, // VBROADCASTI32X2Z128rr = 5662 |
| 145396 | CEFBS_None, // VBROADCASTI32X2Z128rrk = 5663 |
| 145397 | CEFBS_None, // VBROADCASTI32X2Z128rrkz = 5664 |
| 145398 | CEFBS_None, // VBROADCASTI32X2Z256rm = 5665 |
| 145399 | CEFBS_None, // VBROADCASTI32X2Z256rmk = 5666 |
| 145400 | CEFBS_None, // VBROADCASTI32X2Z256rmkz = 5667 |
| 145401 | CEFBS_None, // VBROADCASTI32X2Z256rr = 5668 |
| 145402 | CEFBS_None, // VBROADCASTI32X2Z256rrk = 5669 |
| 145403 | CEFBS_None, // VBROADCASTI32X2Z256rrkz = 5670 |
| 145404 | CEFBS_None, // VBROADCASTI32X2Zrm = 5671 |
| 145405 | CEFBS_None, // VBROADCASTI32X2Zrmk = 5672 |
| 145406 | CEFBS_None, // VBROADCASTI32X2Zrmkz = 5673 |
| 145407 | CEFBS_None, // VBROADCASTI32X2Zrr = 5674 |
| 145408 | CEFBS_None, // VBROADCASTI32X2Zrrk = 5675 |
| 145409 | CEFBS_None, // VBROADCASTI32X2Zrrkz = 5676 |
| 145410 | CEFBS_None, // VBROADCASTI32X4Z256rm = 5677 |
| 145411 | CEFBS_None, // VBROADCASTI32X4Z256rmk = 5678 |
| 145412 | CEFBS_None, // VBROADCASTI32X4Z256rmkz = 5679 |
| 145413 | CEFBS_None, // VBROADCASTI32X4Zrm = 5680 |
| 145414 | CEFBS_None, // VBROADCASTI32X4Zrmk = 5681 |
| 145415 | CEFBS_None, // VBROADCASTI32X4Zrmkz = 5682 |
| 145416 | CEFBS_None, // VBROADCASTI32X8Zrm = 5683 |
| 145417 | CEFBS_None, // VBROADCASTI32X8Zrmk = 5684 |
| 145418 | CEFBS_None, // VBROADCASTI32X8Zrmkz = 5685 |
| 145419 | CEFBS_None, // VBROADCASTI64X2Z256rm = 5686 |
| 145420 | CEFBS_None, // VBROADCASTI64X2Z256rmk = 5687 |
| 145421 | CEFBS_None, // VBROADCASTI64X2Z256rmkz = 5688 |
| 145422 | CEFBS_None, // VBROADCASTI64X2Zrm = 5689 |
| 145423 | CEFBS_None, // VBROADCASTI64X2Zrmk = 5690 |
| 145424 | CEFBS_None, // VBROADCASTI64X2Zrmkz = 5691 |
| 145425 | CEFBS_None, // VBROADCASTI64X4Zrm = 5692 |
| 145426 | CEFBS_None, // VBROADCASTI64X4Zrmk = 5693 |
| 145427 | CEFBS_None, // VBROADCASTI64X4Zrmkz = 5694 |
| 145428 | CEFBS_None, // VBROADCASTSDYrm = 5695 |
| 145429 | CEFBS_None, // VBROADCASTSDYrr = 5696 |
| 145430 | CEFBS_None, // VBROADCASTSDZ256rm = 5697 |
| 145431 | CEFBS_None, // VBROADCASTSDZ256rmk = 5698 |
| 145432 | CEFBS_None, // VBROADCASTSDZ256rmkz = 5699 |
| 145433 | CEFBS_None, // VBROADCASTSDZ256rr = 5700 |
| 145434 | CEFBS_None, // VBROADCASTSDZ256rrk = 5701 |
| 145435 | CEFBS_None, // VBROADCASTSDZ256rrkz = 5702 |
| 145436 | CEFBS_None, // VBROADCASTSDZrm = 5703 |
| 145437 | CEFBS_None, // VBROADCASTSDZrmk = 5704 |
| 145438 | CEFBS_None, // VBROADCASTSDZrmkz = 5705 |
| 145439 | CEFBS_None, // VBROADCASTSDZrr = 5706 |
| 145440 | CEFBS_None, // VBROADCASTSDZrrk = 5707 |
| 145441 | CEFBS_None, // VBROADCASTSDZrrkz = 5708 |
| 145442 | CEFBS_None, // VBROADCASTSSYrm = 5709 |
| 145443 | CEFBS_None, // VBROADCASTSSYrr = 5710 |
| 145444 | CEFBS_None, // VBROADCASTSSZ128rm = 5711 |
| 145445 | CEFBS_None, // VBROADCASTSSZ128rmk = 5712 |
| 145446 | CEFBS_None, // VBROADCASTSSZ128rmkz = 5713 |
| 145447 | CEFBS_None, // VBROADCASTSSZ128rr = 5714 |
| 145448 | CEFBS_None, // VBROADCASTSSZ128rrk = 5715 |
| 145449 | CEFBS_None, // VBROADCASTSSZ128rrkz = 5716 |
| 145450 | CEFBS_None, // VBROADCASTSSZ256rm = 5717 |
| 145451 | CEFBS_None, // VBROADCASTSSZ256rmk = 5718 |
| 145452 | CEFBS_None, // VBROADCASTSSZ256rmkz = 5719 |
| 145453 | CEFBS_None, // VBROADCASTSSZ256rr = 5720 |
| 145454 | CEFBS_None, // VBROADCASTSSZ256rrk = 5721 |
| 145455 | CEFBS_None, // VBROADCASTSSZ256rrkz = 5722 |
| 145456 | CEFBS_None, // VBROADCASTSSZrm = 5723 |
| 145457 | CEFBS_None, // VBROADCASTSSZrmk = 5724 |
| 145458 | CEFBS_None, // VBROADCASTSSZrmkz = 5725 |
| 145459 | CEFBS_None, // VBROADCASTSSZrr = 5726 |
| 145460 | CEFBS_None, // VBROADCASTSSZrrk = 5727 |
| 145461 | CEFBS_None, // VBROADCASTSSZrrkz = 5728 |
| 145462 | CEFBS_None, // VBROADCASTSSrm = 5729 |
| 145463 | CEFBS_None, // VBROADCASTSSrr = 5730 |
| 145464 | CEFBS_None, // VCMPBF16Z128rmbi = 5731 |
| 145465 | CEFBS_None, // VCMPBF16Z128rmbik = 5732 |
| 145466 | CEFBS_None, // VCMPBF16Z128rmi = 5733 |
| 145467 | CEFBS_None, // VCMPBF16Z128rmik = 5734 |
| 145468 | CEFBS_None, // VCMPBF16Z128rri = 5735 |
| 145469 | CEFBS_None, // VCMPBF16Z128rrik = 5736 |
| 145470 | CEFBS_None, // VCMPBF16Z256rmbi = 5737 |
| 145471 | CEFBS_None, // VCMPBF16Z256rmbik = 5738 |
| 145472 | CEFBS_None, // VCMPBF16Z256rmi = 5739 |
| 145473 | CEFBS_None, // VCMPBF16Z256rmik = 5740 |
| 145474 | CEFBS_None, // VCMPBF16Z256rri = 5741 |
| 145475 | CEFBS_None, // VCMPBF16Z256rrik = 5742 |
| 145476 | CEFBS_None, // VCMPBF16Zrmbi = 5743 |
| 145477 | CEFBS_None, // VCMPBF16Zrmbik = 5744 |
| 145478 | CEFBS_None, // VCMPBF16Zrmi = 5745 |
| 145479 | CEFBS_None, // VCMPBF16Zrmik = 5746 |
| 145480 | CEFBS_None, // VCMPBF16Zrri = 5747 |
| 145481 | CEFBS_None, // VCMPBF16Zrrik = 5748 |
| 145482 | CEFBS_None, // VCMPPDYrmi = 5749 |
| 145483 | CEFBS_None, // VCMPPDYrri = 5750 |
| 145484 | CEFBS_None, // VCMPPDZ128rmbi = 5751 |
| 145485 | CEFBS_None, // VCMPPDZ128rmbik = 5752 |
| 145486 | CEFBS_None, // VCMPPDZ128rmi = 5753 |
| 145487 | CEFBS_None, // VCMPPDZ128rmik = 5754 |
| 145488 | CEFBS_None, // VCMPPDZ128rri = 5755 |
| 145489 | CEFBS_None, // VCMPPDZ128rrik = 5756 |
| 145490 | CEFBS_None, // VCMPPDZ256rmbi = 5757 |
| 145491 | CEFBS_None, // VCMPPDZ256rmbik = 5758 |
| 145492 | CEFBS_None, // VCMPPDZ256rmi = 5759 |
| 145493 | CEFBS_None, // VCMPPDZ256rmik = 5760 |
| 145494 | CEFBS_None, // VCMPPDZ256rri = 5761 |
| 145495 | CEFBS_None, // VCMPPDZ256rrik = 5762 |
| 145496 | CEFBS_None, // VCMPPDZrmbi = 5763 |
| 145497 | CEFBS_None, // VCMPPDZrmbik = 5764 |
| 145498 | CEFBS_None, // VCMPPDZrmi = 5765 |
| 145499 | CEFBS_None, // VCMPPDZrmik = 5766 |
| 145500 | CEFBS_None, // VCMPPDZrri = 5767 |
| 145501 | CEFBS_None, // VCMPPDZrrib = 5768 |
| 145502 | CEFBS_None, // VCMPPDZrribk = 5769 |
| 145503 | CEFBS_None, // VCMPPDZrrik = 5770 |
| 145504 | CEFBS_None, // VCMPPDrmi = 5771 |
| 145505 | CEFBS_None, // VCMPPDrri = 5772 |
| 145506 | CEFBS_None, // VCMPPHZ128rmbi = 5773 |
| 145507 | CEFBS_None, // VCMPPHZ128rmbik = 5774 |
| 145508 | CEFBS_None, // VCMPPHZ128rmi = 5775 |
| 145509 | CEFBS_None, // VCMPPHZ128rmik = 5776 |
| 145510 | CEFBS_None, // VCMPPHZ128rri = 5777 |
| 145511 | CEFBS_None, // VCMPPHZ128rrik = 5778 |
| 145512 | CEFBS_None, // VCMPPHZ256rmbi = 5779 |
| 145513 | CEFBS_None, // VCMPPHZ256rmbik = 5780 |
| 145514 | CEFBS_None, // VCMPPHZ256rmi = 5781 |
| 145515 | CEFBS_None, // VCMPPHZ256rmik = 5782 |
| 145516 | CEFBS_None, // VCMPPHZ256rri = 5783 |
| 145517 | CEFBS_None, // VCMPPHZ256rrik = 5784 |
| 145518 | CEFBS_None, // VCMPPHZrmbi = 5785 |
| 145519 | CEFBS_None, // VCMPPHZrmbik = 5786 |
| 145520 | CEFBS_None, // VCMPPHZrmi = 5787 |
| 145521 | CEFBS_None, // VCMPPHZrmik = 5788 |
| 145522 | CEFBS_None, // VCMPPHZrri = 5789 |
| 145523 | CEFBS_None, // VCMPPHZrrib = 5790 |
| 145524 | CEFBS_None, // VCMPPHZrribk = 5791 |
| 145525 | CEFBS_None, // VCMPPHZrrik = 5792 |
| 145526 | CEFBS_None, // VCMPPSYrmi = 5793 |
| 145527 | CEFBS_None, // VCMPPSYrri = 5794 |
| 145528 | CEFBS_None, // VCMPPSZ128rmbi = 5795 |
| 145529 | CEFBS_None, // VCMPPSZ128rmbik = 5796 |
| 145530 | CEFBS_None, // VCMPPSZ128rmi = 5797 |
| 145531 | CEFBS_None, // VCMPPSZ128rmik = 5798 |
| 145532 | CEFBS_None, // VCMPPSZ128rri = 5799 |
| 145533 | CEFBS_None, // VCMPPSZ128rrik = 5800 |
| 145534 | CEFBS_None, // VCMPPSZ256rmbi = 5801 |
| 145535 | CEFBS_None, // VCMPPSZ256rmbik = 5802 |
| 145536 | CEFBS_None, // VCMPPSZ256rmi = 5803 |
| 145537 | CEFBS_None, // VCMPPSZ256rmik = 5804 |
| 145538 | CEFBS_None, // VCMPPSZ256rri = 5805 |
| 145539 | CEFBS_None, // VCMPPSZ256rrik = 5806 |
| 145540 | CEFBS_None, // VCMPPSZrmbi = 5807 |
| 145541 | CEFBS_None, // VCMPPSZrmbik = 5808 |
| 145542 | CEFBS_None, // VCMPPSZrmi = 5809 |
| 145543 | CEFBS_None, // VCMPPSZrmik = 5810 |
| 145544 | CEFBS_None, // VCMPPSZrri = 5811 |
| 145545 | CEFBS_None, // VCMPPSZrrib = 5812 |
| 145546 | CEFBS_None, // VCMPPSZrribk = 5813 |
| 145547 | CEFBS_None, // VCMPPSZrrik = 5814 |
| 145548 | CEFBS_None, // VCMPPSrmi = 5815 |
| 145549 | CEFBS_None, // VCMPPSrri = 5816 |
| 145550 | CEFBS_None, // VCMPSDZrmi = 5817 |
| 145551 | CEFBS_None, // VCMPSDZrmi_Int = 5818 |
| 145552 | CEFBS_None, // VCMPSDZrmik_Int = 5819 |
| 145553 | CEFBS_None, // VCMPSDZrri = 5820 |
| 145554 | CEFBS_None, // VCMPSDZrri_Int = 5821 |
| 145555 | CEFBS_None, // VCMPSDZrrib_Int = 5822 |
| 145556 | CEFBS_None, // VCMPSDZrribk_Int = 5823 |
| 145557 | CEFBS_None, // VCMPSDZrrik_Int = 5824 |
| 145558 | CEFBS_None, // VCMPSDrmi = 5825 |
| 145559 | CEFBS_None, // VCMPSDrmi_Int = 5826 |
| 145560 | CEFBS_None, // VCMPSDrri = 5827 |
| 145561 | CEFBS_None, // VCMPSDrri_Int = 5828 |
| 145562 | CEFBS_None, // VCMPSHZrmi = 5829 |
| 145563 | CEFBS_None, // VCMPSHZrmi_Int = 5830 |
| 145564 | CEFBS_None, // VCMPSHZrmik_Int = 5831 |
| 145565 | CEFBS_None, // VCMPSHZrri = 5832 |
| 145566 | CEFBS_None, // VCMPSHZrri_Int = 5833 |
| 145567 | CEFBS_None, // VCMPSHZrrib_Int = 5834 |
| 145568 | CEFBS_None, // VCMPSHZrribk_Int = 5835 |
| 145569 | CEFBS_None, // VCMPSHZrrik_Int = 5836 |
| 145570 | CEFBS_None, // VCMPSSZrmi = 5837 |
| 145571 | CEFBS_None, // VCMPSSZrmi_Int = 5838 |
| 145572 | CEFBS_None, // VCMPSSZrmik_Int = 5839 |
| 145573 | CEFBS_None, // VCMPSSZrri = 5840 |
| 145574 | CEFBS_None, // VCMPSSZrri_Int = 5841 |
| 145575 | CEFBS_None, // VCMPSSZrrib_Int = 5842 |
| 145576 | CEFBS_None, // VCMPSSZrribk_Int = 5843 |
| 145577 | CEFBS_None, // VCMPSSZrrik_Int = 5844 |
| 145578 | CEFBS_None, // VCMPSSrmi = 5845 |
| 145579 | CEFBS_None, // VCMPSSrmi_Int = 5846 |
| 145580 | CEFBS_None, // VCMPSSrri = 5847 |
| 145581 | CEFBS_None, // VCMPSSrri_Int = 5848 |
| 145582 | CEFBS_None, // VCOMISBF16Zrm = 5849 |
| 145583 | CEFBS_None, // VCOMISBF16Zrm_Int = 5850 |
| 145584 | CEFBS_None, // VCOMISBF16Zrr = 5851 |
| 145585 | CEFBS_None, // VCOMISBF16Zrr_Int = 5852 |
| 145586 | CEFBS_None, // VCOMISDZrm = 5853 |
| 145587 | CEFBS_None, // VCOMISDZrm_Int = 5854 |
| 145588 | CEFBS_None, // VCOMISDZrr = 5855 |
| 145589 | CEFBS_None, // VCOMISDZrr_Int = 5856 |
| 145590 | CEFBS_None, // VCOMISDZrrb = 5857 |
| 145591 | CEFBS_None, // VCOMISDrm = 5858 |
| 145592 | CEFBS_None, // VCOMISDrm_Int = 5859 |
| 145593 | CEFBS_None, // VCOMISDrr = 5860 |
| 145594 | CEFBS_None, // VCOMISDrr_Int = 5861 |
| 145595 | CEFBS_None, // VCOMISHZrm = 5862 |
| 145596 | CEFBS_None, // VCOMISHZrm_Int = 5863 |
| 145597 | CEFBS_None, // VCOMISHZrr = 5864 |
| 145598 | CEFBS_None, // VCOMISHZrr_Int = 5865 |
| 145599 | CEFBS_None, // VCOMISHZrrb = 5866 |
| 145600 | CEFBS_None, // VCOMISSZrm = 5867 |
| 145601 | CEFBS_None, // VCOMISSZrm_Int = 5868 |
| 145602 | CEFBS_None, // VCOMISSZrr = 5869 |
| 145603 | CEFBS_None, // VCOMISSZrr_Int = 5870 |
| 145604 | CEFBS_None, // VCOMISSZrrb = 5871 |
| 145605 | CEFBS_None, // VCOMISSrm = 5872 |
| 145606 | CEFBS_None, // VCOMISSrm_Int = 5873 |
| 145607 | CEFBS_None, // VCOMISSrr = 5874 |
| 145608 | CEFBS_None, // VCOMISSrr_Int = 5875 |
| 145609 | CEFBS_None, // VCOMPRESSPDZ128mr = 5876 |
| 145610 | CEFBS_None, // VCOMPRESSPDZ128mrk = 5877 |
| 145611 | CEFBS_None, // VCOMPRESSPDZ128rr = 5878 |
| 145612 | CEFBS_None, // VCOMPRESSPDZ128rrk = 5879 |
| 145613 | CEFBS_None, // VCOMPRESSPDZ128rrkz = 5880 |
| 145614 | CEFBS_None, // VCOMPRESSPDZ256mr = 5881 |
| 145615 | CEFBS_None, // VCOMPRESSPDZ256mrk = 5882 |
| 145616 | CEFBS_None, // VCOMPRESSPDZ256rr = 5883 |
| 145617 | CEFBS_None, // VCOMPRESSPDZ256rrk = 5884 |
| 145618 | CEFBS_None, // VCOMPRESSPDZ256rrkz = 5885 |
| 145619 | CEFBS_None, // VCOMPRESSPDZmr = 5886 |
| 145620 | CEFBS_None, // VCOMPRESSPDZmrk = 5887 |
| 145621 | CEFBS_None, // VCOMPRESSPDZrr = 5888 |
| 145622 | CEFBS_None, // VCOMPRESSPDZrrk = 5889 |
| 145623 | CEFBS_None, // VCOMPRESSPDZrrkz = 5890 |
| 145624 | CEFBS_None, // VCOMPRESSPSZ128mr = 5891 |
| 145625 | CEFBS_None, // VCOMPRESSPSZ128mrk = 5892 |
| 145626 | CEFBS_None, // VCOMPRESSPSZ128rr = 5893 |
| 145627 | CEFBS_None, // VCOMPRESSPSZ128rrk = 5894 |
| 145628 | CEFBS_None, // VCOMPRESSPSZ128rrkz = 5895 |
| 145629 | CEFBS_None, // VCOMPRESSPSZ256mr = 5896 |
| 145630 | CEFBS_None, // VCOMPRESSPSZ256mrk = 5897 |
| 145631 | CEFBS_None, // VCOMPRESSPSZ256rr = 5898 |
| 145632 | CEFBS_None, // VCOMPRESSPSZ256rrk = 5899 |
| 145633 | CEFBS_None, // VCOMPRESSPSZ256rrkz = 5900 |
| 145634 | CEFBS_None, // VCOMPRESSPSZmr = 5901 |
| 145635 | CEFBS_None, // VCOMPRESSPSZmrk = 5902 |
| 145636 | CEFBS_None, // VCOMPRESSPSZrr = 5903 |
| 145637 | CEFBS_None, // VCOMPRESSPSZrrk = 5904 |
| 145638 | CEFBS_None, // VCOMPRESSPSZrrkz = 5905 |
| 145639 | CEFBS_None, // VCOMXSDZrm_Int = 5906 |
| 145640 | CEFBS_None, // VCOMXSDZrr_Int = 5907 |
| 145641 | CEFBS_None, // VCOMXSDZrrb_Int = 5908 |
| 145642 | CEFBS_None, // VCOMXSHZrm_Int = 5909 |
| 145643 | CEFBS_None, // VCOMXSHZrr_Int = 5910 |
| 145644 | CEFBS_None, // VCOMXSHZrrb_Int = 5911 |
| 145645 | CEFBS_None, // VCOMXSSZrm_Int = 5912 |
| 145646 | CEFBS_None, // VCOMXSSZrr_Int = 5913 |
| 145647 | CEFBS_None, // VCOMXSSZrrb_Int = 5914 |
| 145648 | CEFBS_None, // VCVT2PH2BF8SZ128rm = 5915 |
| 145649 | CEFBS_None, // VCVT2PH2BF8SZ128rmb = 5916 |
| 145650 | CEFBS_None, // VCVT2PH2BF8SZ128rmbk = 5917 |
| 145651 | CEFBS_None, // VCVT2PH2BF8SZ128rmbkz = 5918 |
| 145652 | CEFBS_None, // VCVT2PH2BF8SZ128rmk = 5919 |
| 145653 | CEFBS_None, // VCVT2PH2BF8SZ128rmkz = 5920 |
| 145654 | CEFBS_None, // VCVT2PH2BF8SZ128rr = 5921 |
| 145655 | CEFBS_None, // VCVT2PH2BF8SZ128rrk = 5922 |
| 145656 | CEFBS_None, // VCVT2PH2BF8SZ128rrkz = 5923 |
| 145657 | CEFBS_None, // VCVT2PH2BF8SZ256rm = 5924 |
| 145658 | CEFBS_None, // VCVT2PH2BF8SZ256rmb = 5925 |
| 145659 | CEFBS_None, // VCVT2PH2BF8SZ256rmbk = 5926 |
| 145660 | CEFBS_None, // VCVT2PH2BF8SZ256rmbkz = 5927 |
| 145661 | CEFBS_None, // VCVT2PH2BF8SZ256rmk = 5928 |
| 145662 | CEFBS_None, // VCVT2PH2BF8SZ256rmkz = 5929 |
| 145663 | CEFBS_None, // VCVT2PH2BF8SZ256rr = 5930 |
| 145664 | CEFBS_None, // VCVT2PH2BF8SZ256rrk = 5931 |
| 145665 | CEFBS_None, // VCVT2PH2BF8SZ256rrkz = 5932 |
| 145666 | CEFBS_None, // VCVT2PH2BF8SZrm = 5933 |
| 145667 | CEFBS_None, // VCVT2PH2BF8SZrmb = 5934 |
| 145668 | CEFBS_None, // VCVT2PH2BF8SZrmbk = 5935 |
| 145669 | CEFBS_None, // VCVT2PH2BF8SZrmbkz = 5936 |
| 145670 | CEFBS_None, // VCVT2PH2BF8SZrmk = 5937 |
| 145671 | CEFBS_None, // VCVT2PH2BF8SZrmkz = 5938 |
| 145672 | CEFBS_None, // VCVT2PH2BF8SZrr = 5939 |
| 145673 | CEFBS_None, // VCVT2PH2BF8SZrrk = 5940 |
| 145674 | CEFBS_None, // VCVT2PH2BF8SZrrkz = 5941 |
| 145675 | CEFBS_None, // VCVT2PH2BF8Z128rm = 5942 |
| 145676 | CEFBS_None, // VCVT2PH2BF8Z128rmb = 5943 |
| 145677 | CEFBS_None, // VCVT2PH2BF8Z128rmbk = 5944 |
| 145678 | CEFBS_None, // VCVT2PH2BF8Z128rmbkz = 5945 |
| 145679 | CEFBS_None, // VCVT2PH2BF8Z128rmk = 5946 |
| 145680 | CEFBS_None, // VCVT2PH2BF8Z128rmkz = 5947 |
| 145681 | CEFBS_None, // VCVT2PH2BF8Z128rr = 5948 |
| 145682 | CEFBS_None, // VCVT2PH2BF8Z128rrk = 5949 |
| 145683 | CEFBS_None, // VCVT2PH2BF8Z128rrkz = 5950 |
| 145684 | CEFBS_None, // VCVT2PH2BF8Z256rm = 5951 |
| 145685 | CEFBS_None, // VCVT2PH2BF8Z256rmb = 5952 |
| 145686 | CEFBS_None, // VCVT2PH2BF8Z256rmbk = 5953 |
| 145687 | CEFBS_None, // VCVT2PH2BF8Z256rmbkz = 5954 |
| 145688 | CEFBS_None, // VCVT2PH2BF8Z256rmk = 5955 |
| 145689 | CEFBS_None, // VCVT2PH2BF8Z256rmkz = 5956 |
| 145690 | CEFBS_None, // VCVT2PH2BF8Z256rr = 5957 |
| 145691 | CEFBS_None, // VCVT2PH2BF8Z256rrk = 5958 |
| 145692 | CEFBS_None, // VCVT2PH2BF8Z256rrkz = 5959 |
| 145693 | CEFBS_None, // VCVT2PH2BF8Zrm = 5960 |
| 145694 | CEFBS_None, // VCVT2PH2BF8Zrmb = 5961 |
| 145695 | CEFBS_None, // VCVT2PH2BF8Zrmbk = 5962 |
| 145696 | CEFBS_None, // VCVT2PH2BF8Zrmbkz = 5963 |
| 145697 | CEFBS_None, // VCVT2PH2BF8Zrmk = 5964 |
| 145698 | CEFBS_None, // VCVT2PH2BF8Zrmkz = 5965 |
| 145699 | CEFBS_None, // VCVT2PH2BF8Zrr = 5966 |
| 145700 | CEFBS_None, // VCVT2PH2BF8Zrrk = 5967 |
| 145701 | CEFBS_None, // VCVT2PH2BF8Zrrkz = 5968 |
| 145702 | CEFBS_None, // VCVT2PH2HF8SZ128rm = 5969 |
| 145703 | CEFBS_None, // VCVT2PH2HF8SZ128rmb = 5970 |
| 145704 | CEFBS_None, // VCVT2PH2HF8SZ128rmbk = 5971 |
| 145705 | CEFBS_None, // VCVT2PH2HF8SZ128rmbkz = 5972 |
| 145706 | CEFBS_None, // VCVT2PH2HF8SZ128rmk = 5973 |
| 145707 | CEFBS_None, // VCVT2PH2HF8SZ128rmkz = 5974 |
| 145708 | CEFBS_None, // VCVT2PH2HF8SZ128rr = 5975 |
| 145709 | CEFBS_None, // VCVT2PH2HF8SZ128rrk = 5976 |
| 145710 | CEFBS_None, // VCVT2PH2HF8SZ128rrkz = 5977 |
| 145711 | CEFBS_None, // VCVT2PH2HF8SZ256rm = 5978 |
| 145712 | CEFBS_None, // VCVT2PH2HF8SZ256rmb = 5979 |
| 145713 | CEFBS_None, // VCVT2PH2HF8SZ256rmbk = 5980 |
| 145714 | CEFBS_None, // VCVT2PH2HF8SZ256rmbkz = 5981 |
| 145715 | CEFBS_None, // VCVT2PH2HF8SZ256rmk = 5982 |
| 145716 | CEFBS_None, // VCVT2PH2HF8SZ256rmkz = 5983 |
| 145717 | CEFBS_None, // VCVT2PH2HF8SZ256rr = 5984 |
| 145718 | CEFBS_None, // VCVT2PH2HF8SZ256rrk = 5985 |
| 145719 | CEFBS_None, // VCVT2PH2HF8SZ256rrkz = 5986 |
| 145720 | CEFBS_None, // VCVT2PH2HF8SZrm = 5987 |
| 145721 | CEFBS_None, // VCVT2PH2HF8SZrmb = 5988 |
| 145722 | CEFBS_None, // VCVT2PH2HF8SZrmbk = 5989 |
| 145723 | CEFBS_None, // VCVT2PH2HF8SZrmbkz = 5990 |
| 145724 | CEFBS_None, // VCVT2PH2HF8SZrmk = 5991 |
| 145725 | CEFBS_None, // VCVT2PH2HF8SZrmkz = 5992 |
| 145726 | CEFBS_None, // VCVT2PH2HF8SZrr = 5993 |
| 145727 | CEFBS_None, // VCVT2PH2HF8SZrrk = 5994 |
| 145728 | CEFBS_None, // VCVT2PH2HF8SZrrkz = 5995 |
| 145729 | CEFBS_None, // VCVT2PH2HF8Z128rm = 5996 |
| 145730 | CEFBS_None, // VCVT2PH2HF8Z128rmb = 5997 |
| 145731 | CEFBS_None, // VCVT2PH2HF8Z128rmbk = 5998 |
| 145732 | CEFBS_None, // VCVT2PH2HF8Z128rmbkz = 5999 |
| 145733 | CEFBS_None, // VCVT2PH2HF8Z128rmk = 6000 |
| 145734 | CEFBS_None, // VCVT2PH2HF8Z128rmkz = 6001 |
| 145735 | CEFBS_None, // VCVT2PH2HF8Z128rr = 6002 |
| 145736 | CEFBS_None, // VCVT2PH2HF8Z128rrk = 6003 |
| 145737 | CEFBS_None, // VCVT2PH2HF8Z128rrkz = 6004 |
| 145738 | CEFBS_None, // VCVT2PH2HF8Z256rm = 6005 |
| 145739 | CEFBS_None, // VCVT2PH2HF8Z256rmb = 6006 |
| 145740 | CEFBS_None, // VCVT2PH2HF8Z256rmbk = 6007 |
| 145741 | CEFBS_None, // VCVT2PH2HF8Z256rmbkz = 6008 |
| 145742 | CEFBS_None, // VCVT2PH2HF8Z256rmk = 6009 |
| 145743 | CEFBS_None, // VCVT2PH2HF8Z256rmkz = 6010 |
| 145744 | CEFBS_None, // VCVT2PH2HF8Z256rr = 6011 |
| 145745 | CEFBS_None, // VCVT2PH2HF8Z256rrk = 6012 |
| 145746 | CEFBS_None, // VCVT2PH2HF8Z256rrkz = 6013 |
| 145747 | CEFBS_None, // VCVT2PH2HF8Zrm = 6014 |
| 145748 | CEFBS_None, // VCVT2PH2HF8Zrmb = 6015 |
| 145749 | CEFBS_None, // VCVT2PH2HF8Zrmbk = 6016 |
| 145750 | CEFBS_None, // VCVT2PH2HF8Zrmbkz = 6017 |
| 145751 | CEFBS_None, // VCVT2PH2HF8Zrmk = 6018 |
| 145752 | CEFBS_None, // VCVT2PH2HF8Zrmkz = 6019 |
| 145753 | CEFBS_None, // VCVT2PH2HF8Zrr = 6020 |
| 145754 | CEFBS_None, // VCVT2PH2HF8Zrrk = 6021 |
| 145755 | CEFBS_None, // VCVT2PH2HF8Zrrkz = 6022 |
| 145756 | CEFBS_None, // VCVT2PS2PHXZ128rm = 6023 |
| 145757 | CEFBS_None, // VCVT2PS2PHXZ128rmb = 6024 |
| 145758 | CEFBS_None, // VCVT2PS2PHXZ128rmbk = 6025 |
| 145759 | CEFBS_None, // VCVT2PS2PHXZ128rmbkz = 6026 |
| 145760 | CEFBS_None, // VCVT2PS2PHXZ128rmk = 6027 |
| 145761 | CEFBS_None, // VCVT2PS2PHXZ128rmkz = 6028 |
| 145762 | CEFBS_None, // VCVT2PS2PHXZ128rr = 6029 |
| 145763 | CEFBS_None, // VCVT2PS2PHXZ128rrk = 6030 |
| 145764 | CEFBS_None, // VCVT2PS2PHXZ128rrkz = 6031 |
| 145765 | CEFBS_None, // VCVT2PS2PHXZ256rm = 6032 |
| 145766 | CEFBS_None, // VCVT2PS2PHXZ256rmb = 6033 |
| 145767 | CEFBS_None, // VCVT2PS2PHXZ256rmbk = 6034 |
| 145768 | CEFBS_None, // VCVT2PS2PHXZ256rmbkz = 6035 |
| 145769 | CEFBS_None, // VCVT2PS2PHXZ256rmk = 6036 |
| 145770 | CEFBS_None, // VCVT2PS2PHXZ256rmkz = 6037 |
| 145771 | CEFBS_None, // VCVT2PS2PHXZ256rr = 6038 |
| 145772 | CEFBS_None, // VCVT2PS2PHXZ256rrk = 6039 |
| 145773 | CEFBS_None, // VCVT2PS2PHXZ256rrkz = 6040 |
| 145774 | CEFBS_None, // VCVT2PS2PHXZrm = 6041 |
| 145775 | CEFBS_None, // VCVT2PS2PHXZrmb = 6042 |
| 145776 | CEFBS_None, // VCVT2PS2PHXZrmbk = 6043 |
| 145777 | CEFBS_None, // VCVT2PS2PHXZrmbkz = 6044 |
| 145778 | CEFBS_None, // VCVT2PS2PHXZrmk = 6045 |
| 145779 | CEFBS_None, // VCVT2PS2PHXZrmkz = 6046 |
| 145780 | CEFBS_None, // VCVT2PS2PHXZrr = 6047 |
| 145781 | CEFBS_None, // VCVT2PS2PHXZrrb = 6048 |
| 145782 | CEFBS_None, // VCVT2PS2PHXZrrbk = 6049 |
| 145783 | CEFBS_None, // VCVT2PS2PHXZrrbkz = 6050 |
| 145784 | CEFBS_None, // VCVT2PS2PHXZrrk = 6051 |
| 145785 | CEFBS_None, // VCVT2PS2PHXZrrkz = 6052 |
| 145786 | CEFBS_None, // VCVTBF162IBSZ128rm = 6053 |
| 145787 | CEFBS_None, // VCVTBF162IBSZ128rmb = 6054 |
| 145788 | CEFBS_None, // VCVTBF162IBSZ128rmbk = 6055 |
| 145789 | CEFBS_None, // VCVTBF162IBSZ128rmbkz = 6056 |
| 145790 | CEFBS_None, // VCVTBF162IBSZ128rmk = 6057 |
| 145791 | CEFBS_None, // VCVTBF162IBSZ128rmkz = 6058 |
| 145792 | CEFBS_None, // VCVTBF162IBSZ128rr = 6059 |
| 145793 | CEFBS_None, // VCVTBF162IBSZ128rrk = 6060 |
| 145794 | CEFBS_None, // VCVTBF162IBSZ128rrkz = 6061 |
| 145795 | CEFBS_None, // VCVTBF162IBSZ256rm = 6062 |
| 145796 | CEFBS_None, // VCVTBF162IBSZ256rmb = 6063 |
| 145797 | CEFBS_None, // VCVTBF162IBSZ256rmbk = 6064 |
| 145798 | CEFBS_None, // VCVTBF162IBSZ256rmbkz = 6065 |
| 145799 | CEFBS_None, // VCVTBF162IBSZ256rmk = 6066 |
| 145800 | CEFBS_None, // VCVTBF162IBSZ256rmkz = 6067 |
| 145801 | CEFBS_None, // VCVTBF162IBSZ256rr = 6068 |
| 145802 | CEFBS_None, // VCVTBF162IBSZ256rrk = 6069 |
| 145803 | CEFBS_None, // VCVTBF162IBSZ256rrkz = 6070 |
| 145804 | CEFBS_None, // VCVTBF162IBSZrm = 6071 |
| 145805 | CEFBS_None, // VCVTBF162IBSZrmb = 6072 |
| 145806 | CEFBS_None, // VCVTBF162IBSZrmbk = 6073 |
| 145807 | CEFBS_None, // VCVTBF162IBSZrmbkz = 6074 |
| 145808 | CEFBS_None, // VCVTBF162IBSZrmk = 6075 |
| 145809 | CEFBS_None, // VCVTBF162IBSZrmkz = 6076 |
| 145810 | CEFBS_None, // VCVTBF162IBSZrr = 6077 |
| 145811 | CEFBS_None, // VCVTBF162IBSZrrk = 6078 |
| 145812 | CEFBS_None, // VCVTBF162IBSZrrkz = 6079 |
| 145813 | CEFBS_None, // VCVTBF162IUBSZ128rm = 6080 |
| 145814 | CEFBS_None, // VCVTBF162IUBSZ128rmb = 6081 |
| 145815 | CEFBS_None, // VCVTBF162IUBSZ128rmbk = 6082 |
| 145816 | CEFBS_None, // VCVTBF162IUBSZ128rmbkz = 6083 |
| 145817 | CEFBS_None, // VCVTBF162IUBSZ128rmk = 6084 |
| 145818 | CEFBS_None, // VCVTBF162IUBSZ128rmkz = 6085 |
| 145819 | CEFBS_None, // VCVTBF162IUBSZ128rr = 6086 |
| 145820 | CEFBS_None, // VCVTBF162IUBSZ128rrk = 6087 |
| 145821 | CEFBS_None, // VCVTBF162IUBSZ128rrkz = 6088 |
| 145822 | CEFBS_None, // VCVTBF162IUBSZ256rm = 6089 |
| 145823 | CEFBS_None, // VCVTBF162IUBSZ256rmb = 6090 |
| 145824 | CEFBS_None, // VCVTBF162IUBSZ256rmbk = 6091 |
| 145825 | CEFBS_None, // VCVTBF162IUBSZ256rmbkz = 6092 |
| 145826 | CEFBS_None, // VCVTBF162IUBSZ256rmk = 6093 |
| 145827 | CEFBS_None, // VCVTBF162IUBSZ256rmkz = 6094 |
| 145828 | CEFBS_None, // VCVTBF162IUBSZ256rr = 6095 |
| 145829 | CEFBS_None, // VCVTBF162IUBSZ256rrk = 6096 |
| 145830 | CEFBS_None, // VCVTBF162IUBSZ256rrkz = 6097 |
| 145831 | CEFBS_None, // VCVTBF162IUBSZrm = 6098 |
| 145832 | CEFBS_None, // VCVTBF162IUBSZrmb = 6099 |
| 145833 | CEFBS_None, // VCVTBF162IUBSZrmbk = 6100 |
| 145834 | CEFBS_None, // VCVTBF162IUBSZrmbkz = 6101 |
| 145835 | CEFBS_None, // VCVTBF162IUBSZrmk = 6102 |
| 145836 | CEFBS_None, // VCVTBF162IUBSZrmkz = 6103 |
| 145837 | CEFBS_None, // VCVTBF162IUBSZrr = 6104 |
| 145838 | CEFBS_None, // VCVTBF162IUBSZrrk = 6105 |
| 145839 | CEFBS_None, // VCVTBF162IUBSZrrkz = 6106 |
| 145840 | CEFBS_None, // VCVTBIASPH2BF8SZ128rm = 6107 |
| 145841 | CEFBS_None, // VCVTBIASPH2BF8SZ128rmb = 6108 |
| 145842 | CEFBS_None, // VCVTBIASPH2BF8SZ128rmbk = 6109 |
| 145843 | CEFBS_None, // VCVTBIASPH2BF8SZ128rmbkz = 6110 |
| 145844 | CEFBS_None, // VCVTBIASPH2BF8SZ128rmk = 6111 |
| 145845 | CEFBS_None, // VCVTBIASPH2BF8SZ128rmkz = 6112 |
| 145846 | CEFBS_None, // VCVTBIASPH2BF8SZ128rr = 6113 |
| 145847 | CEFBS_None, // VCVTBIASPH2BF8SZ128rrk = 6114 |
| 145848 | CEFBS_None, // VCVTBIASPH2BF8SZ128rrkz = 6115 |
| 145849 | CEFBS_None, // VCVTBIASPH2BF8SZ256rm = 6116 |
| 145850 | CEFBS_None, // VCVTBIASPH2BF8SZ256rmb = 6117 |
| 145851 | CEFBS_None, // VCVTBIASPH2BF8SZ256rmbk = 6118 |
| 145852 | CEFBS_None, // VCVTBIASPH2BF8SZ256rmbkz = 6119 |
| 145853 | CEFBS_None, // VCVTBIASPH2BF8SZ256rmk = 6120 |
| 145854 | CEFBS_None, // VCVTBIASPH2BF8SZ256rmkz = 6121 |
| 145855 | CEFBS_None, // VCVTBIASPH2BF8SZ256rr = 6122 |
| 145856 | CEFBS_None, // VCVTBIASPH2BF8SZ256rrk = 6123 |
| 145857 | CEFBS_None, // VCVTBIASPH2BF8SZ256rrkz = 6124 |
| 145858 | CEFBS_None, // VCVTBIASPH2BF8SZrm = 6125 |
| 145859 | CEFBS_None, // VCVTBIASPH2BF8SZrmb = 6126 |
| 145860 | CEFBS_None, // VCVTBIASPH2BF8SZrmbk = 6127 |
| 145861 | CEFBS_None, // VCVTBIASPH2BF8SZrmbkz = 6128 |
| 145862 | CEFBS_None, // VCVTBIASPH2BF8SZrmk = 6129 |
| 145863 | CEFBS_None, // VCVTBIASPH2BF8SZrmkz = 6130 |
| 145864 | CEFBS_None, // VCVTBIASPH2BF8SZrr = 6131 |
| 145865 | CEFBS_None, // VCVTBIASPH2BF8SZrrk = 6132 |
| 145866 | CEFBS_None, // VCVTBIASPH2BF8SZrrkz = 6133 |
| 145867 | CEFBS_None, // VCVTBIASPH2BF8Z128rm = 6134 |
| 145868 | CEFBS_None, // VCVTBIASPH2BF8Z128rmb = 6135 |
| 145869 | CEFBS_None, // VCVTBIASPH2BF8Z128rmbk = 6136 |
| 145870 | CEFBS_None, // VCVTBIASPH2BF8Z128rmbkz = 6137 |
| 145871 | CEFBS_None, // VCVTBIASPH2BF8Z128rmk = 6138 |
| 145872 | CEFBS_None, // VCVTBIASPH2BF8Z128rmkz = 6139 |
| 145873 | CEFBS_None, // VCVTBIASPH2BF8Z128rr = 6140 |
| 145874 | CEFBS_None, // VCVTBIASPH2BF8Z128rrk = 6141 |
| 145875 | CEFBS_None, // VCVTBIASPH2BF8Z128rrkz = 6142 |
| 145876 | CEFBS_None, // VCVTBIASPH2BF8Z256rm = 6143 |
| 145877 | CEFBS_None, // VCVTBIASPH2BF8Z256rmb = 6144 |
| 145878 | CEFBS_None, // VCVTBIASPH2BF8Z256rmbk = 6145 |
| 145879 | CEFBS_None, // VCVTBIASPH2BF8Z256rmbkz = 6146 |
| 145880 | CEFBS_None, // VCVTBIASPH2BF8Z256rmk = 6147 |
| 145881 | CEFBS_None, // VCVTBIASPH2BF8Z256rmkz = 6148 |
| 145882 | CEFBS_None, // VCVTBIASPH2BF8Z256rr = 6149 |
| 145883 | CEFBS_None, // VCVTBIASPH2BF8Z256rrk = 6150 |
| 145884 | CEFBS_None, // VCVTBIASPH2BF8Z256rrkz = 6151 |
| 145885 | CEFBS_None, // VCVTBIASPH2BF8Zrm = 6152 |
| 145886 | CEFBS_None, // VCVTBIASPH2BF8Zrmb = 6153 |
| 145887 | CEFBS_None, // VCVTBIASPH2BF8Zrmbk = 6154 |
| 145888 | CEFBS_None, // VCVTBIASPH2BF8Zrmbkz = 6155 |
| 145889 | CEFBS_None, // VCVTBIASPH2BF8Zrmk = 6156 |
| 145890 | CEFBS_None, // VCVTBIASPH2BF8Zrmkz = 6157 |
| 145891 | CEFBS_None, // VCVTBIASPH2BF8Zrr = 6158 |
| 145892 | CEFBS_None, // VCVTBIASPH2BF8Zrrk = 6159 |
| 145893 | CEFBS_None, // VCVTBIASPH2BF8Zrrkz = 6160 |
| 145894 | CEFBS_None, // VCVTBIASPH2HF8SZ128rm = 6161 |
| 145895 | CEFBS_None, // VCVTBIASPH2HF8SZ128rmb = 6162 |
| 145896 | CEFBS_None, // VCVTBIASPH2HF8SZ128rmbk = 6163 |
| 145897 | CEFBS_None, // VCVTBIASPH2HF8SZ128rmbkz = 6164 |
| 145898 | CEFBS_None, // VCVTBIASPH2HF8SZ128rmk = 6165 |
| 145899 | CEFBS_None, // VCVTBIASPH2HF8SZ128rmkz = 6166 |
| 145900 | CEFBS_None, // VCVTBIASPH2HF8SZ128rr = 6167 |
| 145901 | CEFBS_None, // VCVTBIASPH2HF8SZ128rrk = 6168 |
| 145902 | CEFBS_None, // VCVTBIASPH2HF8SZ128rrkz = 6169 |
| 145903 | CEFBS_None, // VCVTBIASPH2HF8SZ256rm = 6170 |
| 145904 | CEFBS_None, // VCVTBIASPH2HF8SZ256rmb = 6171 |
| 145905 | CEFBS_None, // VCVTBIASPH2HF8SZ256rmbk = 6172 |
| 145906 | CEFBS_None, // VCVTBIASPH2HF8SZ256rmbkz = 6173 |
| 145907 | CEFBS_None, // VCVTBIASPH2HF8SZ256rmk = 6174 |
| 145908 | CEFBS_None, // VCVTBIASPH2HF8SZ256rmkz = 6175 |
| 145909 | CEFBS_None, // VCVTBIASPH2HF8SZ256rr = 6176 |
| 145910 | CEFBS_None, // VCVTBIASPH2HF8SZ256rrk = 6177 |
| 145911 | CEFBS_None, // VCVTBIASPH2HF8SZ256rrkz = 6178 |
| 145912 | CEFBS_None, // VCVTBIASPH2HF8SZrm = 6179 |
| 145913 | CEFBS_None, // VCVTBIASPH2HF8SZrmb = 6180 |
| 145914 | CEFBS_None, // VCVTBIASPH2HF8SZrmbk = 6181 |
| 145915 | CEFBS_None, // VCVTBIASPH2HF8SZrmbkz = 6182 |
| 145916 | CEFBS_None, // VCVTBIASPH2HF8SZrmk = 6183 |
| 145917 | CEFBS_None, // VCVTBIASPH2HF8SZrmkz = 6184 |
| 145918 | CEFBS_None, // VCVTBIASPH2HF8SZrr = 6185 |
| 145919 | CEFBS_None, // VCVTBIASPH2HF8SZrrk = 6186 |
| 145920 | CEFBS_None, // VCVTBIASPH2HF8SZrrkz = 6187 |
| 145921 | CEFBS_None, // VCVTBIASPH2HF8Z128rm = 6188 |
| 145922 | CEFBS_None, // VCVTBIASPH2HF8Z128rmb = 6189 |
| 145923 | CEFBS_None, // VCVTBIASPH2HF8Z128rmbk = 6190 |
| 145924 | CEFBS_None, // VCVTBIASPH2HF8Z128rmbkz = 6191 |
| 145925 | CEFBS_None, // VCVTBIASPH2HF8Z128rmk = 6192 |
| 145926 | CEFBS_None, // VCVTBIASPH2HF8Z128rmkz = 6193 |
| 145927 | CEFBS_None, // VCVTBIASPH2HF8Z128rr = 6194 |
| 145928 | CEFBS_None, // VCVTBIASPH2HF8Z128rrk = 6195 |
| 145929 | CEFBS_None, // VCVTBIASPH2HF8Z128rrkz = 6196 |
| 145930 | CEFBS_None, // VCVTBIASPH2HF8Z256rm = 6197 |
| 145931 | CEFBS_None, // VCVTBIASPH2HF8Z256rmb = 6198 |
| 145932 | CEFBS_None, // VCVTBIASPH2HF8Z256rmbk = 6199 |
| 145933 | CEFBS_None, // VCVTBIASPH2HF8Z256rmbkz = 6200 |
| 145934 | CEFBS_None, // VCVTBIASPH2HF8Z256rmk = 6201 |
| 145935 | CEFBS_None, // VCVTBIASPH2HF8Z256rmkz = 6202 |
| 145936 | CEFBS_None, // VCVTBIASPH2HF8Z256rr = 6203 |
| 145937 | CEFBS_None, // VCVTBIASPH2HF8Z256rrk = 6204 |
| 145938 | CEFBS_None, // VCVTBIASPH2HF8Z256rrkz = 6205 |
| 145939 | CEFBS_None, // VCVTBIASPH2HF8Zrm = 6206 |
| 145940 | CEFBS_None, // VCVTBIASPH2HF8Zrmb = 6207 |
| 145941 | CEFBS_None, // VCVTBIASPH2HF8Zrmbk = 6208 |
| 145942 | CEFBS_None, // VCVTBIASPH2HF8Zrmbkz = 6209 |
| 145943 | CEFBS_None, // VCVTBIASPH2HF8Zrmk = 6210 |
| 145944 | CEFBS_None, // VCVTBIASPH2HF8Zrmkz = 6211 |
| 145945 | CEFBS_None, // VCVTBIASPH2HF8Zrr = 6212 |
| 145946 | CEFBS_None, // VCVTBIASPH2HF8Zrrk = 6213 |
| 145947 | CEFBS_None, // VCVTBIASPH2HF8Zrrkz = 6214 |
| 145948 | CEFBS_None, // VCVTDQ2PDYrm = 6215 |
| 145949 | CEFBS_None, // VCVTDQ2PDYrr = 6216 |
| 145950 | CEFBS_None, // VCVTDQ2PDZ128rm = 6217 |
| 145951 | CEFBS_None, // VCVTDQ2PDZ128rmb = 6218 |
| 145952 | CEFBS_None, // VCVTDQ2PDZ128rmbk = 6219 |
| 145953 | CEFBS_None, // VCVTDQ2PDZ128rmbkz = 6220 |
| 145954 | CEFBS_None, // VCVTDQ2PDZ128rmk = 6221 |
| 145955 | CEFBS_None, // VCVTDQ2PDZ128rmkz = 6222 |
| 145956 | CEFBS_None, // VCVTDQ2PDZ128rr = 6223 |
| 145957 | CEFBS_None, // VCVTDQ2PDZ128rrk = 6224 |
| 145958 | CEFBS_None, // VCVTDQ2PDZ128rrkz = 6225 |
| 145959 | CEFBS_None, // VCVTDQ2PDZ256rm = 6226 |
| 145960 | CEFBS_None, // VCVTDQ2PDZ256rmb = 6227 |
| 145961 | CEFBS_None, // VCVTDQ2PDZ256rmbk = 6228 |
| 145962 | CEFBS_None, // VCVTDQ2PDZ256rmbkz = 6229 |
| 145963 | CEFBS_None, // VCVTDQ2PDZ256rmk = 6230 |
| 145964 | CEFBS_None, // VCVTDQ2PDZ256rmkz = 6231 |
| 145965 | CEFBS_None, // VCVTDQ2PDZ256rr = 6232 |
| 145966 | CEFBS_None, // VCVTDQ2PDZ256rrk = 6233 |
| 145967 | CEFBS_None, // VCVTDQ2PDZ256rrkz = 6234 |
| 145968 | CEFBS_None, // VCVTDQ2PDZrm = 6235 |
| 145969 | CEFBS_None, // VCVTDQ2PDZrmb = 6236 |
| 145970 | CEFBS_None, // VCVTDQ2PDZrmbk = 6237 |
| 145971 | CEFBS_None, // VCVTDQ2PDZrmbkz = 6238 |
| 145972 | CEFBS_None, // VCVTDQ2PDZrmk = 6239 |
| 145973 | CEFBS_None, // VCVTDQ2PDZrmkz = 6240 |
| 145974 | CEFBS_None, // VCVTDQ2PDZrr = 6241 |
| 145975 | CEFBS_None, // VCVTDQ2PDZrrk = 6242 |
| 145976 | CEFBS_None, // VCVTDQ2PDZrrkz = 6243 |
| 145977 | CEFBS_None, // VCVTDQ2PDrm = 6244 |
| 145978 | CEFBS_None, // VCVTDQ2PDrr = 6245 |
| 145979 | CEFBS_None, // VCVTDQ2PHZ128rm = 6246 |
| 145980 | CEFBS_None, // VCVTDQ2PHZ128rmb = 6247 |
| 145981 | CEFBS_None, // VCVTDQ2PHZ128rmbk = 6248 |
| 145982 | CEFBS_None, // VCVTDQ2PHZ128rmbkz = 6249 |
| 145983 | CEFBS_None, // VCVTDQ2PHZ128rmk = 6250 |
| 145984 | CEFBS_None, // VCVTDQ2PHZ128rmkz = 6251 |
| 145985 | CEFBS_None, // VCVTDQ2PHZ128rr = 6252 |
| 145986 | CEFBS_None, // VCVTDQ2PHZ128rrk = 6253 |
| 145987 | CEFBS_None, // VCVTDQ2PHZ128rrkz = 6254 |
| 145988 | CEFBS_None, // VCVTDQ2PHZ256rm = 6255 |
| 145989 | CEFBS_None, // VCVTDQ2PHZ256rmb = 6256 |
| 145990 | CEFBS_None, // VCVTDQ2PHZ256rmbk = 6257 |
| 145991 | CEFBS_None, // VCVTDQ2PHZ256rmbkz = 6258 |
| 145992 | CEFBS_None, // VCVTDQ2PHZ256rmk = 6259 |
| 145993 | CEFBS_None, // VCVTDQ2PHZ256rmkz = 6260 |
| 145994 | CEFBS_None, // VCVTDQ2PHZ256rr = 6261 |
| 145995 | CEFBS_None, // VCVTDQ2PHZ256rrk = 6262 |
| 145996 | CEFBS_None, // VCVTDQ2PHZ256rrkz = 6263 |
| 145997 | CEFBS_None, // VCVTDQ2PHZrm = 6264 |
| 145998 | CEFBS_None, // VCVTDQ2PHZrmb = 6265 |
| 145999 | CEFBS_None, // VCVTDQ2PHZrmbk = 6266 |
| 146000 | CEFBS_None, // VCVTDQ2PHZrmbkz = 6267 |
| 146001 | CEFBS_None, // VCVTDQ2PHZrmk = 6268 |
| 146002 | CEFBS_None, // VCVTDQ2PHZrmkz = 6269 |
| 146003 | CEFBS_None, // VCVTDQ2PHZrr = 6270 |
| 146004 | CEFBS_None, // VCVTDQ2PHZrrb = 6271 |
| 146005 | CEFBS_None, // VCVTDQ2PHZrrbk = 6272 |
| 146006 | CEFBS_None, // VCVTDQ2PHZrrbkz = 6273 |
| 146007 | CEFBS_None, // VCVTDQ2PHZrrk = 6274 |
| 146008 | CEFBS_None, // VCVTDQ2PHZrrkz = 6275 |
| 146009 | CEFBS_None, // VCVTDQ2PSYrm = 6276 |
| 146010 | CEFBS_None, // VCVTDQ2PSYrr = 6277 |
| 146011 | CEFBS_None, // VCVTDQ2PSZ128rm = 6278 |
| 146012 | CEFBS_None, // VCVTDQ2PSZ128rmb = 6279 |
| 146013 | CEFBS_None, // VCVTDQ2PSZ128rmbk = 6280 |
| 146014 | CEFBS_None, // VCVTDQ2PSZ128rmbkz = 6281 |
| 146015 | CEFBS_None, // VCVTDQ2PSZ128rmk = 6282 |
| 146016 | CEFBS_None, // VCVTDQ2PSZ128rmkz = 6283 |
| 146017 | CEFBS_None, // VCVTDQ2PSZ128rr = 6284 |
| 146018 | CEFBS_None, // VCVTDQ2PSZ128rrk = 6285 |
| 146019 | CEFBS_None, // VCVTDQ2PSZ128rrkz = 6286 |
| 146020 | CEFBS_None, // VCVTDQ2PSZ256rm = 6287 |
| 146021 | CEFBS_None, // VCVTDQ2PSZ256rmb = 6288 |
| 146022 | CEFBS_None, // VCVTDQ2PSZ256rmbk = 6289 |
| 146023 | CEFBS_None, // VCVTDQ2PSZ256rmbkz = 6290 |
| 146024 | CEFBS_None, // VCVTDQ2PSZ256rmk = 6291 |
| 146025 | CEFBS_None, // VCVTDQ2PSZ256rmkz = 6292 |
| 146026 | CEFBS_None, // VCVTDQ2PSZ256rr = 6293 |
| 146027 | CEFBS_None, // VCVTDQ2PSZ256rrk = 6294 |
| 146028 | CEFBS_None, // VCVTDQ2PSZ256rrkz = 6295 |
| 146029 | CEFBS_None, // VCVTDQ2PSZrm = 6296 |
| 146030 | CEFBS_None, // VCVTDQ2PSZrmb = 6297 |
| 146031 | CEFBS_None, // VCVTDQ2PSZrmbk = 6298 |
| 146032 | CEFBS_None, // VCVTDQ2PSZrmbkz = 6299 |
| 146033 | CEFBS_None, // VCVTDQ2PSZrmk = 6300 |
| 146034 | CEFBS_None, // VCVTDQ2PSZrmkz = 6301 |
| 146035 | CEFBS_None, // VCVTDQ2PSZrr = 6302 |
| 146036 | CEFBS_None, // VCVTDQ2PSZrrb = 6303 |
| 146037 | CEFBS_None, // VCVTDQ2PSZrrbk = 6304 |
| 146038 | CEFBS_None, // VCVTDQ2PSZrrbkz = 6305 |
| 146039 | CEFBS_None, // VCVTDQ2PSZrrk = 6306 |
| 146040 | CEFBS_None, // VCVTDQ2PSZrrkz = 6307 |
| 146041 | CEFBS_None, // VCVTDQ2PSrm = 6308 |
| 146042 | CEFBS_None, // VCVTDQ2PSrr = 6309 |
| 146043 | CEFBS_None, // VCVTHF82PHZ128rm = 6310 |
| 146044 | CEFBS_None, // VCVTHF82PHZ128rmk = 6311 |
| 146045 | CEFBS_None, // VCVTHF82PHZ128rmkz = 6312 |
| 146046 | CEFBS_None, // VCVTHF82PHZ128rr = 6313 |
| 146047 | CEFBS_None, // VCVTHF82PHZ128rrk = 6314 |
| 146048 | CEFBS_None, // VCVTHF82PHZ128rrkz = 6315 |
| 146049 | CEFBS_None, // VCVTHF82PHZ256rm = 6316 |
| 146050 | CEFBS_None, // VCVTHF82PHZ256rmk = 6317 |
| 146051 | CEFBS_None, // VCVTHF82PHZ256rmkz = 6318 |
| 146052 | CEFBS_None, // VCVTHF82PHZ256rr = 6319 |
| 146053 | CEFBS_None, // VCVTHF82PHZ256rrk = 6320 |
| 146054 | CEFBS_None, // VCVTHF82PHZ256rrkz = 6321 |
| 146055 | CEFBS_None, // VCVTHF82PHZrm = 6322 |
| 146056 | CEFBS_None, // VCVTHF82PHZrmk = 6323 |
| 146057 | CEFBS_None, // VCVTHF82PHZrmkz = 6324 |
| 146058 | CEFBS_None, // VCVTHF82PHZrr = 6325 |
| 146059 | CEFBS_None, // VCVTHF82PHZrrk = 6326 |
| 146060 | CEFBS_None, // VCVTHF82PHZrrkz = 6327 |
| 146061 | CEFBS_None, // VCVTNE2PS2BF16Z128rm = 6328 |
| 146062 | CEFBS_None, // VCVTNE2PS2BF16Z128rmb = 6329 |
| 146063 | CEFBS_None, // VCVTNE2PS2BF16Z128rmbk = 6330 |
| 146064 | CEFBS_None, // VCVTNE2PS2BF16Z128rmbkz = 6331 |
| 146065 | CEFBS_None, // VCVTNE2PS2BF16Z128rmk = 6332 |
| 146066 | CEFBS_None, // VCVTNE2PS2BF16Z128rmkz = 6333 |
| 146067 | CEFBS_None, // VCVTNE2PS2BF16Z128rr = 6334 |
| 146068 | CEFBS_None, // VCVTNE2PS2BF16Z128rrk = 6335 |
| 146069 | CEFBS_None, // VCVTNE2PS2BF16Z128rrkz = 6336 |
| 146070 | CEFBS_None, // VCVTNE2PS2BF16Z256rm = 6337 |
| 146071 | CEFBS_None, // VCVTNE2PS2BF16Z256rmb = 6338 |
| 146072 | CEFBS_None, // VCVTNE2PS2BF16Z256rmbk = 6339 |
| 146073 | CEFBS_None, // VCVTNE2PS2BF16Z256rmbkz = 6340 |
| 146074 | CEFBS_None, // VCVTNE2PS2BF16Z256rmk = 6341 |
| 146075 | CEFBS_None, // VCVTNE2PS2BF16Z256rmkz = 6342 |
| 146076 | CEFBS_None, // VCVTNE2PS2BF16Z256rr = 6343 |
| 146077 | CEFBS_None, // VCVTNE2PS2BF16Z256rrk = 6344 |
| 146078 | CEFBS_None, // VCVTNE2PS2BF16Z256rrkz = 6345 |
| 146079 | CEFBS_None, // VCVTNE2PS2BF16Zrm = 6346 |
| 146080 | CEFBS_None, // VCVTNE2PS2BF16Zrmb = 6347 |
| 146081 | CEFBS_None, // VCVTNE2PS2BF16Zrmbk = 6348 |
| 146082 | CEFBS_None, // VCVTNE2PS2BF16Zrmbkz = 6349 |
| 146083 | CEFBS_None, // VCVTNE2PS2BF16Zrmk = 6350 |
| 146084 | CEFBS_None, // VCVTNE2PS2BF16Zrmkz = 6351 |
| 146085 | CEFBS_None, // VCVTNE2PS2BF16Zrr = 6352 |
| 146086 | CEFBS_None, // VCVTNE2PS2BF16Zrrk = 6353 |
| 146087 | CEFBS_None, // VCVTNE2PS2BF16Zrrkz = 6354 |
| 146088 | CEFBS_None, // VCVTNEEBF162PSYrm = 6355 |
| 146089 | CEFBS_None, // VCVTNEEBF162PSrm = 6356 |
| 146090 | CEFBS_None, // VCVTNEEPH2PSYrm = 6357 |
| 146091 | CEFBS_None, // VCVTNEEPH2PSrm = 6358 |
| 146092 | CEFBS_None, // VCVTNEOBF162PSYrm = 6359 |
| 146093 | CEFBS_None, // VCVTNEOBF162PSrm = 6360 |
| 146094 | CEFBS_None, // VCVTNEOPH2PSYrm = 6361 |
| 146095 | CEFBS_None, // VCVTNEOPH2PSrm = 6362 |
| 146096 | CEFBS_None, // VCVTNEPS2BF16Yrm = 6363 |
| 146097 | CEFBS_None, // VCVTNEPS2BF16Yrr = 6364 |
| 146098 | CEFBS_None, // VCVTNEPS2BF16Z128rm = 6365 |
| 146099 | CEFBS_None, // VCVTNEPS2BF16Z128rmb = 6366 |
| 146100 | CEFBS_None, // VCVTNEPS2BF16Z128rmbk = 6367 |
| 146101 | CEFBS_None, // VCVTNEPS2BF16Z128rmbkz = 6368 |
| 146102 | CEFBS_None, // VCVTNEPS2BF16Z128rmk = 6369 |
| 146103 | CEFBS_None, // VCVTNEPS2BF16Z128rmkz = 6370 |
| 146104 | CEFBS_None, // VCVTNEPS2BF16Z128rr = 6371 |
| 146105 | CEFBS_None, // VCVTNEPS2BF16Z128rrk = 6372 |
| 146106 | CEFBS_None, // VCVTNEPS2BF16Z128rrkz = 6373 |
| 146107 | CEFBS_None, // VCVTNEPS2BF16Z256rm = 6374 |
| 146108 | CEFBS_None, // VCVTNEPS2BF16Z256rmb = 6375 |
| 146109 | CEFBS_None, // VCVTNEPS2BF16Z256rmbk = 6376 |
| 146110 | CEFBS_None, // VCVTNEPS2BF16Z256rmbkz = 6377 |
| 146111 | CEFBS_None, // VCVTNEPS2BF16Z256rmk = 6378 |
| 146112 | CEFBS_None, // VCVTNEPS2BF16Z256rmkz = 6379 |
| 146113 | CEFBS_None, // VCVTNEPS2BF16Z256rr = 6380 |
| 146114 | CEFBS_None, // VCVTNEPS2BF16Z256rrk = 6381 |
| 146115 | CEFBS_None, // VCVTNEPS2BF16Z256rrkz = 6382 |
| 146116 | CEFBS_None, // VCVTNEPS2BF16Zrm = 6383 |
| 146117 | CEFBS_None, // VCVTNEPS2BF16Zrmb = 6384 |
| 146118 | CEFBS_None, // VCVTNEPS2BF16Zrmbk = 6385 |
| 146119 | CEFBS_None, // VCVTNEPS2BF16Zrmbkz = 6386 |
| 146120 | CEFBS_None, // VCVTNEPS2BF16Zrmk = 6387 |
| 146121 | CEFBS_None, // VCVTNEPS2BF16Zrmkz = 6388 |
| 146122 | CEFBS_None, // VCVTNEPS2BF16Zrr = 6389 |
| 146123 | CEFBS_None, // VCVTNEPS2BF16Zrrk = 6390 |
| 146124 | CEFBS_None, // VCVTNEPS2BF16Zrrkz = 6391 |
| 146125 | CEFBS_None, // VCVTNEPS2BF16rm = 6392 |
| 146126 | CEFBS_None, // VCVTNEPS2BF16rr = 6393 |
| 146127 | CEFBS_None, // VCVTPD2DQYrm = 6394 |
| 146128 | CEFBS_None, // VCVTPD2DQYrr = 6395 |
| 146129 | CEFBS_None, // VCVTPD2DQZ128rm = 6396 |
| 146130 | CEFBS_None, // VCVTPD2DQZ128rmb = 6397 |
| 146131 | CEFBS_None, // VCVTPD2DQZ128rmbk = 6398 |
| 146132 | CEFBS_None, // VCVTPD2DQZ128rmbkz = 6399 |
| 146133 | CEFBS_None, // VCVTPD2DQZ128rmk = 6400 |
| 146134 | CEFBS_None, // VCVTPD2DQZ128rmkz = 6401 |
| 146135 | CEFBS_None, // VCVTPD2DQZ128rr = 6402 |
| 146136 | CEFBS_None, // VCVTPD2DQZ128rrk = 6403 |
| 146137 | CEFBS_None, // VCVTPD2DQZ128rrkz = 6404 |
| 146138 | CEFBS_None, // VCVTPD2DQZ256rm = 6405 |
| 146139 | CEFBS_None, // VCVTPD2DQZ256rmb = 6406 |
| 146140 | CEFBS_None, // VCVTPD2DQZ256rmbk = 6407 |
| 146141 | CEFBS_None, // VCVTPD2DQZ256rmbkz = 6408 |
| 146142 | CEFBS_None, // VCVTPD2DQZ256rmk = 6409 |
| 146143 | CEFBS_None, // VCVTPD2DQZ256rmkz = 6410 |
| 146144 | CEFBS_None, // VCVTPD2DQZ256rr = 6411 |
| 146145 | CEFBS_None, // VCVTPD2DQZ256rrk = 6412 |
| 146146 | CEFBS_None, // VCVTPD2DQZ256rrkz = 6413 |
| 146147 | CEFBS_None, // VCVTPD2DQZrm = 6414 |
| 146148 | CEFBS_None, // VCVTPD2DQZrmb = 6415 |
| 146149 | CEFBS_None, // VCVTPD2DQZrmbk = 6416 |
| 146150 | CEFBS_None, // VCVTPD2DQZrmbkz = 6417 |
| 146151 | CEFBS_None, // VCVTPD2DQZrmk = 6418 |
| 146152 | CEFBS_None, // VCVTPD2DQZrmkz = 6419 |
| 146153 | CEFBS_None, // VCVTPD2DQZrr = 6420 |
| 146154 | CEFBS_None, // VCVTPD2DQZrrb = 6421 |
| 146155 | CEFBS_None, // VCVTPD2DQZrrbk = 6422 |
| 146156 | CEFBS_None, // VCVTPD2DQZrrbkz = 6423 |
| 146157 | CEFBS_None, // VCVTPD2DQZrrk = 6424 |
| 146158 | CEFBS_None, // VCVTPD2DQZrrkz = 6425 |
| 146159 | CEFBS_None, // VCVTPD2DQrm = 6426 |
| 146160 | CEFBS_None, // VCVTPD2DQrr = 6427 |
| 146161 | CEFBS_None, // VCVTPD2PHZ128rm = 6428 |
| 146162 | CEFBS_None, // VCVTPD2PHZ128rmb = 6429 |
| 146163 | CEFBS_None, // VCVTPD2PHZ128rmbk = 6430 |
| 146164 | CEFBS_None, // VCVTPD2PHZ128rmbkz = 6431 |
| 146165 | CEFBS_None, // VCVTPD2PHZ128rmk = 6432 |
| 146166 | CEFBS_None, // VCVTPD2PHZ128rmkz = 6433 |
| 146167 | CEFBS_None, // VCVTPD2PHZ128rr = 6434 |
| 146168 | CEFBS_None, // VCVTPD2PHZ128rrk = 6435 |
| 146169 | CEFBS_None, // VCVTPD2PHZ128rrkz = 6436 |
| 146170 | CEFBS_None, // VCVTPD2PHZ256rm = 6437 |
| 146171 | CEFBS_None, // VCVTPD2PHZ256rmb = 6438 |
| 146172 | CEFBS_None, // VCVTPD2PHZ256rmbk = 6439 |
| 146173 | CEFBS_None, // VCVTPD2PHZ256rmbkz = 6440 |
| 146174 | CEFBS_None, // VCVTPD2PHZ256rmk = 6441 |
| 146175 | CEFBS_None, // VCVTPD2PHZ256rmkz = 6442 |
| 146176 | CEFBS_None, // VCVTPD2PHZ256rr = 6443 |
| 146177 | CEFBS_None, // VCVTPD2PHZ256rrk = 6444 |
| 146178 | CEFBS_None, // VCVTPD2PHZ256rrkz = 6445 |
| 146179 | CEFBS_None, // VCVTPD2PHZrm = 6446 |
| 146180 | CEFBS_None, // VCVTPD2PHZrmb = 6447 |
| 146181 | CEFBS_None, // VCVTPD2PHZrmbk = 6448 |
| 146182 | CEFBS_None, // VCVTPD2PHZrmbkz = 6449 |
| 146183 | CEFBS_None, // VCVTPD2PHZrmk = 6450 |
| 146184 | CEFBS_None, // VCVTPD2PHZrmkz = 6451 |
| 146185 | CEFBS_None, // VCVTPD2PHZrr = 6452 |
| 146186 | CEFBS_None, // VCVTPD2PHZrrb = 6453 |
| 146187 | CEFBS_None, // VCVTPD2PHZrrbk = 6454 |
| 146188 | CEFBS_None, // VCVTPD2PHZrrbkz = 6455 |
| 146189 | CEFBS_None, // VCVTPD2PHZrrk = 6456 |
| 146190 | CEFBS_None, // VCVTPD2PHZrrkz = 6457 |
| 146191 | CEFBS_None, // VCVTPD2PSYrm = 6458 |
| 146192 | CEFBS_None, // VCVTPD2PSYrr = 6459 |
| 146193 | CEFBS_None, // VCVTPD2PSZ128rm = 6460 |
| 146194 | CEFBS_None, // VCVTPD2PSZ128rmb = 6461 |
| 146195 | CEFBS_None, // VCVTPD2PSZ128rmbk = 6462 |
| 146196 | CEFBS_None, // VCVTPD2PSZ128rmbkz = 6463 |
| 146197 | CEFBS_None, // VCVTPD2PSZ128rmk = 6464 |
| 146198 | CEFBS_None, // VCVTPD2PSZ128rmkz = 6465 |
| 146199 | CEFBS_None, // VCVTPD2PSZ128rr = 6466 |
| 146200 | CEFBS_None, // VCVTPD2PSZ128rrk = 6467 |
| 146201 | CEFBS_None, // VCVTPD2PSZ128rrkz = 6468 |
| 146202 | CEFBS_None, // VCVTPD2PSZ256rm = 6469 |
| 146203 | CEFBS_None, // VCVTPD2PSZ256rmb = 6470 |
| 146204 | CEFBS_None, // VCVTPD2PSZ256rmbk = 6471 |
| 146205 | CEFBS_None, // VCVTPD2PSZ256rmbkz = 6472 |
| 146206 | CEFBS_None, // VCVTPD2PSZ256rmk = 6473 |
| 146207 | CEFBS_None, // VCVTPD2PSZ256rmkz = 6474 |
| 146208 | CEFBS_None, // VCVTPD2PSZ256rr = 6475 |
| 146209 | CEFBS_None, // VCVTPD2PSZ256rrk = 6476 |
| 146210 | CEFBS_None, // VCVTPD2PSZ256rrkz = 6477 |
| 146211 | CEFBS_None, // VCVTPD2PSZrm = 6478 |
| 146212 | CEFBS_None, // VCVTPD2PSZrmb = 6479 |
| 146213 | CEFBS_None, // VCVTPD2PSZrmbk = 6480 |
| 146214 | CEFBS_None, // VCVTPD2PSZrmbkz = 6481 |
| 146215 | CEFBS_None, // VCVTPD2PSZrmk = 6482 |
| 146216 | CEFBS_None, // VCVTPD2PSZrmkz = 6483 |
| 146217 | CEFBS_None, // VCVTPD2PSZrr = 6484 |
| 146218 | CEFBS_None, // VCVTPD2PSZrrb = 6485 |
| 146219 | CEFBS_None, // VCVTPD2PSZrrbk = 6486 |
| 146220 | CEFBS_None, // VCVTPD2PSZrrbkz = 6487 |
| 146221 | CEFBS_None, // VCVTPD2PSZrrk = 6488 |
| 146222 | CEFBS_None, // VCVTPD2PSZrrkz = 6489 |
| 146223 | CEFBS_None, // VCVTPD2PSrm = 6490 |
| 146224 | CEFBS_None, // VCVTPD2PSrr = 6491 |
| 146225 | CEFBS_None, // VCVTPD2QQZ128rm = 6492 |
| 146226 | CEFBS_None, // VCVTPD2QQZ128rmb = 6493 |
| 146227 | CEFBS_None, // VCVTPD2QQZ128rmbk = 6494 |
| 146228 | CEFBS_None, // VCVTPD2QQZ128rmbkz = 6495 |
| 146229 | CEFBS_None, // VCVTPD2QQZ128rmk = 6496 |
| 146230 | CEFBS_None, // VCVTPD2QQZ128rmkz = 6497 |
| 146231 | CEFBS_None, // VCVTPD2QQZ128rr = 6498 |
| 146232 | CEFBS_None, // VCVTPD2QQZ128rrk = 6499 |
| 146233 | CEFBS_None, // VCVTPD2QQZ128rrkz = 6500 |
| 146234 | CEFBS_None, // VCVTPD2QQZ256rm = 6501 |
| 146235 | CEFBS_None, // VCVTPD2QQZ256rmb = 6502 |
| 146236 | CEFBS_None, // VCVTPD2QQZ256rmbk = 6503 |
| 146237 | CEFBS_None, // VCVTPD2QQZ256rmbkz = 6504 |
| 146238 | CEFBS_None, // VCVTPD2QQZ256rmk = 6505 |
| 146239 | CEFBS_None, // VCVTPD2QQZ256rmkz = 6506 |
| 146240 | CEFBS_None, // VCVTPD2QQZ256rr = 6507 |
| 146241 | CEFBS_None, // VCVTPD2QQZ256rrk = 6508 |
| 146242 | CEFBS_None, // VCVTPD2QQZ256rrkz = 6509 |
| 146243 | CEFBS_None, // VCVTPD2QQZrm = 6510 |
| 146244 | CEFBS_None, // VCVTPD2QQZrmb = 6511 |
| 146245 | CEFBS_None, // VCVTPD2QQZrmbk = 6512 |
| 146246 | CEFBS_None, // VCVTPD2QQZrmbkz = 6513 |
| 146247 | CEFBS_None, // VCVTPD2QQZrmk = 6514 |
| 146248 | CEFBS_None, // VCVTPD2QQZrmkz = 6515 |
| 146249 | CEFBS_None, // VCVTPD2QQZrr = 6516 |
| 146250 | CEFBS_None, // VCVTPD2QQZrrb = 6517 |
| 146251 | CEFBS_None, // VCVTPD2QQZrrbk = 6518 |
| 146252 | CEFBS_None, // VCVTPD2QQZrrbkz = 6519 |
| 146253 | CEFBS_None, // VCVTPD2QQZrrk = 6520 |
| 146254 | CEFBS_None, // VCVTPD2QQZrrkz = 6521 |
| 146255 | CEFBS_None, // VCVTPD2UDQZ128rm = 6522 |
| 146256 | CEFBS_None, // VCVTPD2UDQZ128rmb = 6523 |
| 146257 | CEFBS_None, // VCVTPD2UDQZ128rmbk = 6524 |
| 146258 | CEFBS_None, // VCVTPD2UDQZ128rmbkz = 6525 |
| 146259 | CEFBS_None, // VCVTPD2UDQZ128rmk = 6526 |
| 146260 | CEFBS_None, // VCVTPD2UDQZ128rmkz = 6527 |
| 146261 | CEFBS_None, // VCVTPD2UDQZ128rr = 6528 |
| 146262 | CEFBS_None, // VCVTPD2UDQZ128rrk = 6529 |
| 146263 | CEFBS_None, // VCVTPD2UDQZ128rrkz = 6530 |
| 146264 | CEFBS_None, // VCVTPD2UDQZ256rm = 6531 |
| 146265 | CEFBS_None, // VCVTPD2UDQZ256rmb = 6532 |
| 146266 | CEFBS_None, // VCVTPD2UDQZ256rmbk = 6533 |
| 146267 | CEFBS_None, // VCVTPD2UDQZ256rmbkz = 6534 |
| 146268 | CEFBS_None, // VCVTPD2UDQZ256rmk = 6535 |
| 146269 | CEFBS_None, // VCVTPD2UDQZ256rmkz = 6536 |
| 146270 | CEFBS_None, // VCVTPD2UDQZ256rr = 6537 |
| 146271 | CEFBS_None, // VCVTPD2UDQZ256rrk = 6538 |
| 146272 | CEFBS_None, // VCVTPD2UDQZ256rrkz = 6539 |
| 146273 | CEFBS_None, // VCVTPD2UDQZrm = 6540 |
| 146274 | CEFBS_None, // VCVTPD2UDQZrmb = 6541 |
| 146275 | CEFBS_None, // VCVTPD2UDQZrmbk = 6542 |
| 146276 | CEFBS_None, // VCVTPD2UDQZrmbkz = 6543 |
| 146277 | CEFBS_None, // VCVTPD2UDQZrmk = 6544 |
| 146278 | CEFBS_None, // VCVTPD2UDQZrmkz = 6545 |
| 146279 | CEFBS_None, // VCVTPD2UDQZrr = 6546 |
| 146280 | CEFBS_None, // VCVTPD2UDQZrrb = 6547 |
| 146281 | CEFBS_None, // VCVTPD2UDQZrrbk = 6548 |
| 146282 | CEFBS_None, // VCVTPD2UDQZrrbkz = 6549 |
| 146283 | CEFBS_None, // VCVTPD2UDQZrrk = 6550 |
| 146284 | CEFBS_None, // VCVTPD2UDQZrrkz = 6551 |
| 146285 | CEFBS_None, // VCVTPD2UQQZ128rm = 6552 |
| 146286 | CEFBS_None, // VCVTPD2UQQZ128rmb = 6553 |
| 146287 | CEFBS_None, // VCVTPD2UQQZ128rmbk = 6554 |
| 146288 | CEFBS_None, // VCVTPD2UQQZ128rmbkz = 6555 |
| 146289 | CEFBS_None, // VCVTPD2UQQZ128rmk = 6556 |
| 146290 | CEFBS_None, // VCVTPD2UQQZ128rmkz = 6557 |
| 146291 | CEFBS_None, // VCVTPD2UQQZ128rr = 6558 |
| 146292 | CEFBS_None, // VCVTPD2UQQZ128rrk = 6559 |
| 146293 | CEFBS_None, // VCVTPD2UQQZ128rrkz = 6560 |
| 146294 | CEFBS_None, // VCVTPD2UQQZ256rm = 6561 |
| 146295 | CEFBS_None, // VCVTPD2UQQZ256rmb = 6562 |
| 146296 | CEFBS_None, // VCVTPD2UQQZ256rmbk = 6563 |
| 146297 | CEFBS_None, // VCVTPD2UQQZ256rmbkz = 6564 |
| 146298 | CEFBS_None, // VCVTPD2UQQZ256rmk = 6565 |
| 146299 | CEFBS_None, // VCVTPD2UQQZ256rmkz = 6566 |
| 146300 | CEFBS_None, // VCVTPD2UQQZ256rr = 6567 |
| 146301 | CEFBS_None, // VCVTPD2UQQZ256rrk = 6568 |
| 146302 | CEFBS_None, // VCVTPD2UQQZ256rrkz = 6569 |
| 146303 | CEFBS_None, // VCVTPD2UQQZrm = 6570 |
| 146304 | CEFBS_None, // VCVTPD2UQQZrmb = 6571 |
| 146305 | CEFBS_None, // VCVTPD2UQQZrmbk = 6572 |
| 146306 | CEFBS_None, // VCVTPD2UQQZrmbkz = 6573 |
| 146307 | CEFBS_None, // VCVTPD2UQQZrmk = 6574 |
| 146308 | CEFBS_None, // VCVTPD2UQQZrmkz = 6575 |
| 146309 | CEFBS_None, // VCVTPD2UQQZrr = 6576 |
| 146310 | CEFBS_None, // VCVTPD2UQQZrrb = 6577 |
| 146311 | CEFBS_None, // VCVTPD2UQQZrrbk = 6578 |
| 146312 | CEFBS_None, // VCVTPD2UQQZrrbkz = 6579 |
| 146313 | CEFBS_None, // VCVTPD2UQQZrrk = 6580 |
| 146314 | CEFBS_None, // VCVTPD2UQQZrrkz = 6581 |
| 146315 | CEFBS_None, // VCVTPH2BF8SZ128rm = 6582 |
| 146316 | CEFBS_None, // VCVTPH2BF8SZ128rmb = 6583 |
| 146317 | CEFBS_None, // VCVTPH2BF8SZ128rmbk = 6584 |
| 146318 | CEFBS_None, // VCVTPH2BF8SZ128rmbkz = 6585 |
| 146319 | CEFBS_None, // VCVTPH2BF8SZ128rmk = 6586 |
| 146320 | CEFBS_None, // VCVTPH2BF8SZ128rmkz = 6587 |
| 146321 | CEFBS_None, // VCVTPH2BF8SZ128rr = 6588 |
| 146322 | CEFBS_None, // VCVTPH2BF8SZ128rrk = 6589 |
| 146323 | CEFBS_None, // VCVTPH2BF8SZ128rrkz = 6590 |
| 146324 | CEFBS_None, // VCVTPH2BF8SZ256rm = 6591 |
| 146325 | CEFBS_None, // VCVTPH2BF8SZ256rmb = 6592 |
| 146326 | CEFBS_None, // VCVTPH2BF8SZ256rmbk = 6593 |
| 146327 | CEFBS_None, // VCVTPH2BF8SZ256rmbkz = 6594 |
| 146328 | CEFBS_None, // VCVTPH2BF8SZ256rmk = 6595 |
| 146329 | CEFBS_None, // VCVTPH2BF8SZ256rmkz = 6596 |
| 146330 | CEFBS_None, // VCVTPH2BF8SZ256rr = 6597 |
| 146331 | CEFBS_None, // VCVTPH2BF8SZ256rrk = 6598 |
| 146332 | CEFBS_None, // VCVTPH2BF8SZ256rrkz = 6599 |
| 146333 | CEFBS_None, // VCVTPH2BF8SZrm = 6600 |
| 146334 | CEFBS_None, // VCVTPH2BF8SZrmb = 6601 |
| 146335 | CEFBS_None, // VCVTPH2BF8SZrmbk = 6602 |
| 146336 | CEFBS_None, // VCVTPH2BF8SZrmbkz = 6603 |
| 146337 | CEFBS_None, // VCVTPH2BF8SZrmk = 6604 |
| 146338 | CEFBS_None, // VCVTPH2BF8SZrmkz = 6605 |
| 146339 | CEFBS_None, // VCVTPH2BF8SZrr = 6606 |
| 146340 | CEFBS_None, // VCVTPH2BF8SZrrk = 6607 |
| 146341 | CEFBS_None, // VCVTPH2BF8SZrrkz = 6608 |
| 146342 | CEFBS_None, // VCVTPH2BF8Z128rm = 6609 |
| 146343 | CEFBS_None, // VCVTPH2BF8Z128rmb = 6610 |
| 146344 | CEFBS_None, // VCVTPH2BF8Z128rmbk = 6611 |
| 146345 | CEFBS_None, // VCVTPH2BF8Z128rmbkz = 6612 |
| 146346 | CEFBS_None, // VCVTPH2BF8Z128rmk = 6613 |
| 146347 | CEFBS_None, // VCVTPH2BF8Z128rmkz = 6614 |
| 146348 | CEFBS_None, // VCVTPH2BF8Z128rr = 6615 |
| 146349 | CEFBS_None, // VCVTPH2BF8Z128rrk = 6616 |
| 146350 | CEFBS_None, // VCVTPH2BF8Z128rrkz = 6617 |
| 146351 | CEFBS_None, // VCVTPH2BF8Z256rm = 6618 |
| 146352 | CEFBS_None, // VCVTPH2BF8Z256rmb = 6619 |
| 146353 | CEFBS_None, // VCVTPH2BF8Z256rmbk = 6620 |
| 146354 | CEFBS_None, // VCVTPH2BF8Z256rmbkz = 6621 |
| 146355 | CEFBS_None, // VCVTPH2BF8Z256rmk = 6622 |
| 146356 | CEFBS_None, // VCVTPH2BF8Z256rmkz = 6623 |
| 146357 | CEFBS_None, // VCVTPH2BF8Z256rr = 6624 |
| 146358 | CEFBS_None, // VCVTPH2BF8Z256rrk = 6625 |
| 146359 | CEFBS_None, // VCVTPH2BF8Z256rrkz = 6626 |
| 146360 | CEFBS_None, // VCVTPH2BF8Zrm = 6627 |
| 146361 | CEFBS_None, // VCVTPH2BF8Zrmb = 6628 |
| 146362 | CEFBS_None, // VCVTPH2BF8Zrmbk = 6629 |
| 146363 | CEFBS_None, // VCVTPH2BF8Zrmbkz = 6630 |
| 146364 | CEFBS_None, // VCVTPH2BF8Zrmk = 6631 |
| 146365 | CEFBS_None, // VCVTPH2BF8Zrmkz = 6632 |
| 146366 | CEFBS_None, // VCVTPH2BF8Zrr = 6633 |
| 146367 | CEFBS_None, // VCVTPH2BF8Zrrk = 6634 |
| 146368 | CEFBS_None, // VCVTPH2BF8Zrrkz = 6635 |
| 146369 | CEFBS_None, // VCVTPH2DQZ128rm = 6636 |
| 146370 | CEFBS_None, // VCVTPH2DQZ128rmb = 6637 |
| 146371 | CEFBS_None, // VCVTPH2DQZ128rmbk = 6638 |
| 146372 | CEFBS_None, // VCVTPH2DQZ128rmbkz = 6639 |
| 146373 | CEFBS_None, // VCVTPH2DQZ128rmk = 6640 |
| 146374 | CEFBS_None, // VCVTPH2DQZ128rmkz = 6641 |
| 146375 | CEFBS_None, // VCVTPH2DQZ128rr = 6642 |
| 146376 | CEFBS_None, // VCVTPH2DQZ128rrk = 6643 |
| 146377 | CEFBS_None, // VCVTPH2DQZ128rrkz = 6644 |
| 146378 | CEFBS_None, // VCVTPH2DQZ256rm = 6645 |
| 146379 | CEFBS_None, // VCVTPH2DQZ256rmb = 6646 |
| 146380 | CEFBS_None, // VCVTPH2DQZ256rmbk = 6647 |
| 146381 | CEFBS_None, // VCVTPH2DQZ256rmbkz = 6648 |
| 146382 | CEFBS_None, // VCVTPH2DQZ256rmk = 6649 |
| 146383 | CEFBS_None, // VCVTPH2DQZ256rmkz = 6650 |
| 146384 | CEFBS_None, // VCVTPH2DQZ256rr = 6651 |
| 146385 | CEFBS_None, // VCVTPH2DQZ256rrk = 6652 |
| 146386 | CEFBS_None, // VCVTPH2DQZ256rrkz = 6653 |
| 146387 | CEFBS_None, // VCVTPH2DQZrm = 6654 |
| 146388 | CEFBS_None, // VCVTPH2DQZrmb = 6655 |
| 146389 | CEFBS_None, // VCVTPH2DQZrmbk = 6656 |
| 146390 | CEFBS_None, // VCVTPH2DQZrmbkz = 6657 |
| 146391 | CEFBS_None, // VCVTPH2DQZrmk = 6658 |
| 146392 | CEFBS_None, // VCVTPH2DQZrmkz = 6659 |
| 146393 | CEFBS_None, // VCVTPH2DQZrr = 6660 |
| 146394 | CEFBS_None, // VCVTPH2DQZrrb = 6661 |
| 146395 | CEFBS_None, // VCVTPH2DQZrrbk = 6662 |
| 146396 | CEFBS_None, // VCVTPH2DQZrrbkz = 6663 |
| 146397 | CEFBS_None, // VCVTPH2DQZrrk = 6664 |
| 146398 | CEFBS_None, // VCVTPH2DQZrrkz = 6665 |
| 146399 | CEFBS_None, // VCVTPH2HF8SZ128rm = 6666 |
| 146400 | CEFBS_None, // VCVTPH2HF8SZ128rmb = 6667 |
| 146401 | CEFBS_None, // VCVTPH2HF8SZ128rmbk = 6668 |
| 146402 | CEFBS_None, // VCVTPH2HF8SZ128rmbkz = 6669 |
| 146403 | CEFBS_None, // VCVTPH2HF8SZ128rmk = 6670 |
| 146404 | CEFBS_None, // VCVTPH2HF8SZ128rmkz = 6671 |
| 146405 | CEFBS_None, // VCVTPH2HF8SZ128rr = 6672 |
| 146406 | CEFBS_None, // VCVTPH2HF8SZ128rrk = 6673 |
| 146407 | CEFBS_None, // VCVTPH2HF8SZ128rrkz = 6674 |
| 146408 | CEFBS_None, // VCVTPH2HF8SZ256rm = 6675 |
| 146409 | CEFBS_None, // VCVTPH2HF8SZ256rmb = 6676 |
| 146410 | CEFBS_None, // VCVTPH2HF8SZ256rmbk = 6677 |
| 146411 | CEFBS_None, // VCVTPH2HF8SZ256rmbkz = 6678 |
| 146412 | CEFBS_None, // VCVTPH2HF8SZ256rmk = 6679 |
| 146413 | CEFBS_None, // VCVTPH2HF8SZ256rmkz = 6680 |
| 146414 | CEFBS_None, // VCVTPH2HF8SZ256rr = 6681 |
| 146415 | CEFBS_None, // VCVTPH2HF8SZ256rrk = 6682 |
| 146416 | CEFBS_None, // VCVTPH2HF8SZ256rrkz = 6683 |
| 146417 | CEFBS_None, // VCVTPH2HF8SZrm = 6684 |
| 146418 | CEFBS_None, // VCVTPH2HF8SZrmb = 6685 |
| 146419 | CEFBS_None, // VCVTPH2HF8SZrmbk = 6686 |
| 146420 | CEFBS_None, // VCVTPH2HF8SZrmbkz = 6687 |
| 146421 | CEFBS_None, // VCVTPH2HF8SZrmk = 6688 |
| 146422 | CEFBS_None, // VCVTPH2HF8SZrmkz = 6689 |
| 146423 | CEFBS_None, // VCVTPH2HF8SZrr = 6690 |
| 146424 | CEFBS_None, // VCVTPH2HF8SZrrk = 6691 |
| 146425 | CEFBS_None, // VCVTPH2HF8SZrrkz = 6692 |
| 146426 | CEFBS_None, // VCVTPH2HF8Z128rm = 6693 |
| 146427 | CEFBS_None, // VCVTPH2HF8Z128rmb = 6694 |
| 146428 | CEFBS_None, // VCVTPH2HF8Z128rmbk = 6695 |
| 146429 | CEFBS_None, // VCVTPH2HF8Z128rmbkz = 6696 |
| 146430 | CEFBS_None, // VCVTPH2HF8Z128rmk = 6697 |
| 146431 | CEFBS_None, // VCVTPH2HF8Z128rmkz = 6698 |
| 146432 | CEFBS_None, // VCVTPH2HF8Z128rr = 6699 |
| 146433 | CEFBS_None, // VCVTPH2HF8Z128rrk = 6700 |
| 146434 | CEFBS_None, // VCVTPH2HF8Z128rrkz = 6701 |
| 146435 | CEFBS_None, // VCVTPH2HF8Z256rm = 6702 |
| 146436 | CEFBS_None, // VCVTPH2HF8Z256rmb = 6703 |
| 146437 | CEFBS_None, // VCVTPH2HF8Z256rmbk = 6704 |
| 146438 | CEFBS_None, // VCVTPH2HF8Z256rmbkz = 6705 |
| 146439 | CEFBS_None, // VCVTPH2HF8Z256rmk = 6706 |
| 146440 | CEFBS_None, // VCVTPH2HF8Z256rmkz = 6707 |
| 146441 | CEFBS_None, // VCVTPH2HF8Z256rr = 6708 |
| 146442 | CEFBS_None, // VCVTPH2HF8Z256rrk = 6709 |
| 146443 | CEFBS_None, // VCVTPH2HF8Z256rrkz = 6710 |
| 146444 | CEFBS_None, // VCVTPH2HF8Zrm = 6711 |
| 146445 | CEFBS_None, // VCVTPH2HF8Zrmb = 6712 |
| 146446 | CEFBS_None, // VCVTPH2HF8Zrmbk = 6713 |
| 146447 | CEFBS_None, // VCVTPH2HF8Zrmbkz = 6714 |
| 146448 | CEFBS_None, // VCVTPH2HF8Zrmk = 6715 |
| 146449 | CEFBS_None, // VCVTPH2HF8Zrmkz = 6716 |
| 146450 | CEFBS_None, // VCVTPH2HF8Zrr = 6717 |
| 146451 | CEFBS_None, // VCVTPH2HF8Zrrk = 6718 |
| 146452 | CEFBS_None, // VCVTPH2HF8Zrrkz = 6719 |
| 146453 | CEFBS_None, // VCVTPH2IBSZ128rm = 6720 |
| 146454 | CEFBS_None, // VCVTPH2IBSZ128rmb = 6721 |
| 146455 | CEFBS_None, // VCVTPH2IBSZ128rmbk = 6722 |
| 146456 | CEFBS_None, // VCVTPH2IBSZ128rmbkz = 6723 |
| 146457 | CEFBS_None, // VCVTPH2IBSZ128rmk = 6724 |
| 146458 | CEFBS_None, // VCVTPH2IBSZ128rmkz = 6725 |
| 146459 | CEFBS_None, // VCVTPH2IBSZ128rr = 6726 |
| 146460 | CEFBS_None, // VCVTPH2IBSZ128rrk = 6727 |
| 146461 | CEFBS_None, // VCVTPH2IBSZ128rrkz = 6728 |
| 146462 | CEFBS_None, // VCVTPH2IBSZ256rm = 6729 |
| 146463 | CEFBS_None, // VCVTPH2IBSZ256rmb = 6730 |
| 146464 | CEFBS_None, // VCVTPH2IBSZ256rmbk = 6731 |
| 146465 | CEFBS_None, // VCVTPH2IBSZ256rmbkz = 6732 |
| 146466 | CEFBS_None, // VCVTPH2IBSZ256rmk = 6733 |
| 146467 | CEFBS_None, // VCVTPH2IBSZ256rmkz = 6734 |
| 146468 | CEFBS_None, // VCVTPH2IBSZ256rr = 6735 |
| 146469 | CEFBS_None, // VCVTPH2IBSZ256rrk = 6736 |
| 146470 | CEFBS_None, // VCVTPH2IBSZ256rrkz = 6737 |
| 146471 | CEFBS_None, // VCVTPH2IBSZrm = 6738 |
| 146472 | CEFBS_None, // VCVTPH2IBSZrmb = 6739 |
| 146473 | CEFBS_None, // VCVTPH2IBSZrmbk = 6740 |
| 146474 | CEFBS_None, // VCVTPH2IBSZrmbkz = 6741 |
| 146475 | CEFBS_None, // VCVTPH2IBSZrmk = 6742 |
| 146476 | CEFBS_None, // VCVTPH2IBSZrmkz = 6743 |
| 146477 | CEFBS_None, // VCVTPH2IBSZrr = 6744 |
| 146478 | CEFBS_None, // VCVTPH2IBSZrrb = 6745 |
| 146479 | CEFBS_None, // VCVTPH2IBSZrrbk = 6746 |
| 146480 | CEFBS_None, // VCVTPH2IBSZrrbkz = 6747 |
| 146481 | CEFBS_None, // VCVTPH2IBSZrrk = 6748 |
| 146482 | CEFBS_None, // VCVTPH2IBSZrrkz = 6749 |
| 146483 | CEFBS_None, // VCVTPH2IUBSZ128rm = 6750 |
| 146484 | CEFBS_None, // VCVTPH2IUBSZ128rmb = 6751 |
| 146485 | CEFBS_None, // VCVTPH2IUBSZ128rmbk = 6752 |
| 146486 | CEFBS_None, // VCVTPH2IUBSZ128rmbkz = 6753 |
| 146487 | CEFBS_None, // VCVTPH2IUBSZ128rmk = 6754 |
| 146488 | CEFBS_None, // VCVTPH2IUBSZ128rmkz = 6755 |
| 146489 | CEFBS_None, // VCVTPH2IUBSZ128rr = 6756 |
| 146490 | CEFBS_None, // VCVTPH2IUBSZ128rrk = 6757 |
| 146491 | CEFBS_None, // VCVTPH2IUBSZ128rrkz = 6758 |
| 146492 | CEFBS_None, // VCVTPH2IUBSZ256rm = 6759 |
| 146493 | CEFBS_None, // VCVTPH2IUBSZ256rmb = 6760 |
| 146494 | CEFBS_None, // VCVTPH2IUBSZ256rmbk = 6761 |
| 146495 | CEFBS_None, // VCVTPH2IUBSZ256rmbkz = 6762 |
| 146496 | CEFBS_None, // VCVTPH2IUBSZ256rmk = 6763 |
| 146497 | CEFBS_None, // VCVTPH2IUBSZ256rmkz = 6764 |
| 146498 | CEFBS_None, // VCVTPH2IUBSZ256rr = 6765 |
| 146499 | CEFBS_None, // VCVTPH2IUBSZ256rrk = 6766 |
| 146500 | CEFBS_None, // VCVTPH2IUBSZ256rrkz = 6767 |
| 146501 | CEFBS_None, // VCVTPH2IUBSZrm = 6768 |
| 146502 | CEFBS_None, // VCVTPH2IUBSZrmb = 6769 |
| 146503 | CEFBS_None, // VCVTPH2IUBSZrmbk = 6770 |
| 146504 | CEFBS_None, // VCVTPH2IUBSZrmbkz = 6771 |
| 146505 | CEFBS_None, // VCVTPH2IUBSZrmk = 6772 |
| 146506 | CEFBS_None, // VCVTPH2IUBSZrmkz = 6773 |
| 146507 | CEFBS_None, // VCVTPH2IUBSZrr = 6774 |
| 146508 | CEFBS_None, // VCVTPH2IUBSZrrb = 6775 |
| 146509 | CEFBS_None, // VCVTPH2IUBSZrrbk = 6776 |
| 146510 | CEFBS_None, // VCVTPH2IUBSZrrbkz = 6777 |
| 146511 | CEFBS_None, // VCVTPH2IUBSZrrk = 6778 |
| 146512 | CEFBS_None, // VCVTPH2IUBSZrrkz = 6779 |
| 146513 | CEFBS_None, // VCVTPH2PDZ128rm = 6780 |
| 146514 | CEFBS_None, // VCVTPH2PDZ128rmb = 6781 |
| 146515 | CEFBS_None, // VCVTPH2PDZ128rmbk = 6782 |
| 146516 | CEFBS_None, // VCVTPH2PDZ128rmbkz = 6783 |
| 146517 | CEFBS_None, // VCVTPH2PDZ128rmk = 6784 |
| 146518 | CEFBS_None, // VCVTPH2PDZ128rmkz = 6785 |
| 146519 | CEFBS_None, // VCVTPH2PDZ128rr = 6786 |
| 146520 | CEFBS_None, // VCVTPH2PDZ128rrk = 6787 |
| 146521 | CEFBS_None, // VCVTPH2PDZ128rrkz = 6788 |
| 146522 | CEFBS_None, // VCVTPH2PDZ256rm = 6789 |
| 146523 | CEFBS_None, // VCVTPH2PDZ256rmb = 6790 |
| 146524 | CEFBS_None, // VCVTPH2PDZ256rmbk = 6791 |
| 146525 | CEFBS_None, // VCVTPH2PDZ256rmbkz = 6792 |
| 146526 | CEFBS_None, // VCVTPH2PDZ256rmk = 6793 |
| 146527 | CEFBS_None, // VCVTPH2PDZ256rmkz = 6794 |
| 146528 | CEFBS_None, // VCVTPH2PDZ256rr = 6795 |
| 146529 | CEFBS_None, // VCVTPH2PDZ256rrk = 6796 |
| 146530 | CEFBS_None, // VCVTPH2PDZ256rrkz = 6797 |
| 146531 | CEFBS_None, // VCVTPH2PDZrm = 6798 |
| 146532 | CEFBS_None, // VCVTPH2PDZrmb = 6799 |
| 146533 | CEFBS_None, // VCVTPH2PDZrmbk = 6800 |
| 146534 | CEFBS_None, // VCVTPH2PDZrmbkz = 6801 |
| 146535 | CEFBS_None, // VCVTPH2PDZrmk = 6802 |
| 146536 | CEFBS_None, // VCVTPH2PDZrmkz = 6803 |
| 146537 | CEFBS_None, // VCVTPH2PDZrr = 6804 |
| 146538 | CEFBS_None, // VCVTPH2PDZrrb = 6805 |
| 146539 | CEFBS_None, // VCVTPH2PDZrrbk = 6806 |
| 146540 | CEFBS_None, // VCVTPH2PDZrrbkz = 6807 |
| 146541 | CEFBS_None, // VCVTPH2PDZrrk = 6808 |
| 146542 | CEFBS_None, // VCVTPH2PDZrrkz = 6809 |
| 146543 | CEFBS_None, // VCVTPH2PSXZ128rm = 6810 |
| 146544 | CEFBS_None, // VCVTPH2PSXZ128rmb = 6811 |
| 146545 | CEFBS_None, // VCVTPH2PSXZ128rmbk = 6812 |
| 146546 | CEFBS_None, // VCVTPH2PSXZ128rmbkz = 6813 |
| 146547 | CEFBS_None, // VCVTPH2PSXZ128rmk = 6814 |
| 146548 | CEFBS_None, // VCVTPH2PSXZ128rmkz = 6815 |
| 146549 | CEFBS_None, // VCVTPH2PSXZ128rr = 6816 |
| 146550 | CEFBS_None, // VCVTPH2PSXZ128rrk = 6817 |
| 146551 | CEFBS_None, // VCVTPH2PSXZ128rrkz = 6818 |
| 146552 | CEFBS_None, // VCVTPH2PSXZ256rm = 6819 |
| 146553 | CEFBS_None, // VCVTPH2PSXZ256rmb = 6820 |
| 146554 | CEFBS_None, // VCVTPH2PSXZ256rmbk = 6821 |
| 146555 | CEFBS_None, // VCVTPH2PSXZ256rmbkz = 6822 |
| 146556 | CEFBS_None, // VCVTPH2PSXZ256rmk = 6823 |
| 146557 | CEFBS_None, // VCVTPH2PSXZ256rmkz = 6824 |
| 146558 | CEFBS_None, // VCVTPH2PSXZ256rr = 6825 |
| 146559 | CEFBS_None, // VCVTPH2PSXZ256rrk = 6826 |
| 146560 | CEFBS_None, // VCVTPH2PSXZ256rrkz = 6827 |
| 146561 | CEFBS_None, // VCVTPH2PSXZrm = 6828 |
| 146562 | CEFBS_None, // VCVTPH2PSXZrmb = 6829 |
| 146563 | CEFBS_None, // VCVTPH2PSXZrmbk = 6830 |
| 146564 | CEFBS_None, // VCVTPH2PSXZrmbkz = 6831 |
| 146565 | CEFBS_None, // VCVTPH2PSXZrmk = 6832 |
| 146566 | CEFBS_None, // VCVTPH2PSXZrmkz = 6833 |
| 146567 | CEFBS_None, // VCVTPH2PSXZrr = 6834 |
| 146568 | CEFBS_None, // VCVTPH2PSXZrrb = 6835 |
| 146569 | CEFBS_None, // VCVTPH2PSXZrrbk = 6836 |
| 146570 | CEFBS_None, // VCVTPH2PSXZrrbkz = 6837 |
| 146571 | CEFBS_None, // VCVTPH2PSXZrrk = 6838 |
| 146572 | CEFBS_None, // VCVTPH2PSXZrrkz = 6839 |
| 146573 | CEFBS_None, // VCVTPH2PSYrm = 6840 |
| 146574 | CEFBS_None, // VCVTPH2PSYrr = 6841 |
| 146575 | CEFBS_None, // VCVTPH2PSZ128rm = 6842 |
| 146576 | CEFBS_None, // VCVTPH2PSZ128rmk = 6843 |
| 146577 | CEFBS_None, // VCVTPH2PSZ128rmkz = 6844 |
| 146578 | CEFBS_None, // VCVTPH2PSZ128rr = 6845 |
| 146579 | CEFBS_None, // VCVTPH2PSZ128rrk = 6846 |
| 146580 | CEFBS_None, // VCVTPH2PSZ128rrkz = 6847 |
| 146581 | CEFBS_None, // VCVTPH2PSZ256rm = 6848 |
| 146582 | CEFBS_None, // VCVTPH2PSZ256rmk = 6849 |
| 146583 | CEFBS_None, // VCVTPH2PSZ256rmkz = 6850 |
| 146584 | CEFBS_None, // VCVTPH2PSZ256rr = 6851 |
| 146585 | CEFBS_None, // VCVTPH2PSZ256rrk = 6852 |
| 146586 | CEFBS_None, // VCVTPH2PSZ256rrkz = 6853 |
| 146587 | CEFBS_None, // VCVTPH2PSZrm = 6854 |
| 146588 | CEFBS_None, // VCVTPH2PSZrmk = 6855 |
| 146589 | CEFBS_None, // VCVTPH2PSZrmkz = 6856 |
| 146590 | CEFBS_None, // VCVTPH2PSZrr = 6857 |
| 146591 | CEFBS_None, // VCVTPH2PSZrrb = 6858 |
| 146592 | CEFBS_None, // VCVTPH2PSZrrbk = 6859 |
| 146593 | CEFBS_None, // VCVTPH2PSZrrbkz = 6860 |
| 146594 | CEFBS_None, // VCVTPH2PSZrrk = 6861 |
| 146595 | CEFBS_None, // VCVTPH2PSZrrkz = 6862 |
| 146596 | CEFBS_None, // VCVTPH2PSrm = 6863 |
| 146597 | CEFBS_None, // VCVTPH2PSrr = 6864 |
| 146598 | CEFBS_None, // VCVTPH2QQZ128rm = 6865 |
| 146599 | CEFBS_None, // VCVTPH2QQZ128rmb = 6866 |
| 146600 | CEFBS_None, // VCVTPH2QQZ128rmbk = 6867 |
| 146601 | CEFBS_None, // VCVTPH2QQZ128rmbkz = 6868 |
| 146602 | CEFBS_None, // VCVTPH2QQZ128rmk = 6869 |
| 146603 | CEFBS_None, // VCVTPH2QQZ128rmkz = 6870 |
| 146604 | CEFBS_None, // VCVTPH2QQZ128rr = 6871 |
| 146605 | CEFBS_None, // VCVTPH2QQZ128rrk = 6872 |
| 146606 | CEFBS_None, // VCVTPH2QQZ128rrkz = 6873 |
| 146607 | CEFBS_None, // VCVTPH2QQZ256rm = 6874 |
| 146608 | CEFBS_None, // VCVTPH2QQZ256rmb = 6875 |
| 146609 | CEFBS_None, // VCVTPH2QQZ256rmbk = 6876 |
| 146610 | CEFBS_None, // VCVTPH2QQZ256rmbkz = 6877 |
| 146611 | CEFBS_None, // VCVTPH2QQZ256rmk = 6878 |
| 146612 | CEFBS_None, // VCVTPH2QQZ256rmkz = 6879 |
| 146613 | CEFBS_None, // VCVTPH2QQZ256rr = 6880 |
| 146614 | CEFBS_None, // VCVTPH2QQZ256rrk = 6881 |
| 146615 | CEFBS_None, // VCVTPH2QQZ256rrkz = 6882 |
| 146616 | CEFBS_None, // VCVTPH2QQZrm = 6883 |
| 146617 | CEFBS_None, // VCVTPH2QQZrmb = 6884 |
| 146618 | CEFBS_None, // VCVTPH2QQZrmbk = 6885 |
| 146619 | CEFBS_None, // VCVTPH2QQZrmbkz = 6886 |
| 146620 | CEFBS_None, // VCVTPH2QQZrmk = 6887 |
| 146621 | CEFBS_None, // VCVTPH2QQZrmkz = 6888 |
| 146622 | CEFBS_None, // VCVTPH2QQZrr = 6889 |
| 146623 | CEFBS_None, // VCVTPH2QQZrrb = 6890 |
| 146624 | CEFBS_None, // VCVTPH2QQZrrbk = 6891 |
| 146625 | CEFBS_None, // VCVTPH2QQZrrbkz = 6892 |
| 146626 | CEFBS_None, // VCVTPH2QQZrrk = 6893 |
| 146627 | CEFBS_None, // VCVTPH2QQZrrkz = 6894 |
| 146628 | CEFBS_None, // VCVTPH2UDQZ128rm = 6895 |
| 146629 | CEFBS_None, // VCVTPH2UDQZ128rmb = 6896 |
| 146630 | CEFBS_None, // VCVTPH2UDQZ128rmbk = 6897 |
| 146631 | CEFBS_None, // VCVTPH2UDQZ128rmbkz = 6898 |
| 146632 | CEFBS_None, // VCVTPH2UDQZ128rmk = 6899 |
| 146633 | CEFBS_None, // VCVTPH2UDQZ128rmkz = 6900 |
| 146634 | CEFBS_None, // VCVTPH2UDQZ128rr = 6901 |
| 146635 | CEFBS_None, // VCVTPH2UDQZ128rrk = 6902 |
| 146636 | CEFBS_None, // VCVTPH2UDQZ128rrkz = 6903 |
| 146637 | CEFBS_None, // VCVTPH2UDQZ256rm = 6904 |
| 146638 | CEFBS_None, // VCVTPH2UDQZ256rmb = 6905 |
| 146639 | CEFBS_None, // VCVTPH2UDQZ256rmbk = 6906 |
| 146640 | CEFBS_None, // VCVTPH2UDQZ256rmbkz = 6907 |
| 146641 | CEFBS_None, // VCVTPH2UDQZ256rmk = 6908 |
| 146642 | CEFBS_None, // VCVTPH2UDQZ256rmkz = 6909 |
| 146643 | CEFBS_None, // VCVTPH2UDQZ256rr = 6910 |
| 146644 | CEFBS_None, // VCVTPH2UDQZ256rrk = 6911 |
| 146645 | CEFBS_None, // VCVTPH2UDQZ256rrkz = 6912 |
| 146646 | CEFBS_None, // VCVTPH2UDQZrm = 6913 |
| 146647 | CEFBS_None, // VCVTPH2UDQZrmb = 6914 |
| 146648 | CEFBS_None, // VCVTPH2UDQZrmbk = 6915 |
| 146649 | CEFBS_None, // VCVTPH2UDQZrmbkz = 6916 |
| 146650 | CEFBS_None, // VCVTPH2UDQZrmk = 6917 |
| 146651 | CEFBS_None, // VCVTPH2UDQZrmkz = 6918 |
| 146652 | CEFBS_None, // VCVTPH2UDQZrr = 6919 |
| 146653 | CEFBS_None, // VCVTPH2UDQZrrb = 6920 |
| 146654 | CEFBS_None, // VCVTPH2UDQZrrbk = 6921 |
| 146655 | CEFBS_None, // VCVTPH2UDQZrrbkz = 6922 |
| 146656 | CEFBS_None, // VCVTPH2UDQZrrk = 6923 |
| 146657 | CEFBS_None, // VCVTPH2UDQZrrkz = 6924 |
| 146658 | CEFBS_None, // VCVTPH2UQQZ128rm = 6925 |
| 146659 | CEFBS_None, // VCVTPH2UQQZ128rmb = 6926 |
| 146660 | CEFBS_None, // VCVTPH2UQQZ128rmbk = 6927 |
| 146661 | CEFBS_None, // VCVTPH2UQQZ128rmbkz = 6928 |
| 146662 | CEFBS_None, // VCVTPH2UQQZ128rmk = 6929 |
| 146663 | CEFBS_None, // VCVTPH2UQQZ128rmkz = 6930 |
| 146664 | CEFBS_None, // VCVTPH2UQQZ128rr = 6931 |
| 146665 | CEFBS_None, // VCVTPH2UQQZ128rrk = 6932 |
| 146666 | CEFBS_None, // VCVTPH2UQQZ128rrkz = 6933 |
| 146667 | CEFBS_None, // VCVTPH2UQQZ256rm = 6934 |
| 146668 | CEFBS_None, // VCVTPH2UQQZ256rmb = 6935 |
| 146669 | CEFBS_None, // VCVTPH2UQQZ256rmbk = 6936 |
| 146670 | CEFBS_None, // VCVTPH2UQQZ256rmbkz = 6937 |
| 146671 | CEFBS_None, // VCVTPH2UQQZ256rmk = 6938 |
| 146672 | CEFBS_None, // VCVTPH2UQQZ256rmkz = 6939 |
| 146673 | CEFBS_None, // VCVTPH2UQQZ256rr = 6940 |
| 146674 | CEFBS_None, // VCVTPH2UQQZ256rrk = 6941 |
| 146675 | CEFBS_None, // VCVTPH2UQQZ256rrkz = 6942 |
| 146676 | CEFBS_None, // VCVTPH2UQQZrm = 6943 |
| 146677 | CEFBS_None, // VCVTPH2UQQZrmb = 6944 |
| 146678 | CEFBS_None, // VCVTPH2UQQZrmbk = 6945 |
| 146679 | CEFBS_None, // VCVTPH2UQQZrmbkz = 6946 |
| 146680 | CEFBS_None, // VCVTPH2UQQZrmk = 6947 |
| 146681 | CEFBS_None, // VCVTPH2UQQZrmkz = 6948 |
| 146682 | CEFBS_None, // VCVTPH2UQQZrr = 6949 |
| 146683 | CEFBS_None, // VCVTPH2UQQZrrb = 6950 |
| 146684 | CEFBS_None, // VCVTPH2UQQZrrbk = 6951 |
| 146685 | CEFBS_None, // VCVTPH2UQQZrrbkz = 6952 |
| 146686 | CEFBS_None, // VCVTPH2UQQZrrk = 6953 |
| 146687 | CEFBS_None, // VCVTPH2UQQZrrkz = 6954 |
| 146688 | CEFBS_None, // VCVTPH2UWZ128rm = 6955 |
| 146689 | CEFBS_None, // VCVTPH2UWZ128rmb = 6956 |
| 146690 | CEFBS_None, // VCVTPH2UWZ128rmbk = 6957 |
| 146691 | CEFBS_None, // VCVTPH2UWZ128rmbkz = 6958 |
| 146692 | CEFBS_None, // VCVTPH2UWZ128rmk = 6959 |
| 146693 | CEFBS_None, // VCVTPH2UWZ128rmkz = 6960 |
| 146694 | CEFBS_None, // VCVTPH2UWZ128rr = 6961 |
| 146695 | CEFBS_None, // VCVTPH2UWZ128rrk = 6962 |
| 146696 | CEFBS_None, // VCVTPH2UWZ128rrkz = 6963 |
| 146697 | CEFBS_None, // VCVTPH2UWZ256rm = 6964 |
| 146698 | CEFBS_None, // VCVTPH2UWZ256rmb = 6965 |
| 146699 | CEFBS_None, // VCVTPH2UWZ256rmbk = 6966 |
| 146700 | CEFBS_None, // VCVTPH2UWZ256rmbkz = 6967 |
| 146701 | CEFBS_None, // VCVTPH2UWZ256rmk = 6968 |
| 146702 | CEFBS_None, // VCVTPH2UWZ256rmkz = 6969 |
| 146703 | CEFBS_None, // VCVTPH2UWZ256rr = 6970 |
| 146704 | CEFBS_None, // VCVTPH2UWZ256rrk = 6971 |
| 146705 | CEFBS_None, // VCVTPH2UWZ256rrkz = 6972 |
| 146706 | CEFBS_None, // VCVTPH2UWZrm = 6973 |
| 146707 | CEFBS_None, // VCVTPH2UWZrmb = 6974 |
| 146708 | CEFBS_None, // VCVTPH2UWZrmbk = 6975 |
| 146709 | CEFBS_None, // VCVTPH2UWZrmbkz = 6976 |
| 146710 | CEFBS_None, // VCVTPH2UWZrmk = 6977 |
| 146711 | CEFBS_None, // VCVTPH2UWZrmkz = 6978 |
| 146712 | CEFBS_None, // VCVTPH2UWZrr = 6979 |
| 146713 | CEFBS_None, // VCVTPH2UWZrrb = 6980 |
| 146714 | CEFBS_None, // VCVTPH2UWZrrbk = 6981 |
| 146715 | CEFBS_None, // VCVTPH2UWZrrbkz = 6982 |
| 146716 | CEFBS_None, // VCVTPH2UWZrrk = 6983 |
| 146717 | CEFBS_None, // VCVTPH2UWZrrkz = 6984 |
| 146718 | CEFBS_None, // VCVTPH2WZ128rm = 6985 |
| 146719 | CEFBS_None, // VCVTPH2WZ128rmb = 6986 |
| 146720 | CEFBS_None, // VCVTPH2WZ128rmbk = 6987 |
| 146721 | CEFBS_None, // VCVTPH2WZ128rmbkz = 6988 |
| 146722 | CEFBS_None, // VCVTPH2WZ128rmk = 6989 |
| 146723 | CEFBS_None, // VCVTPH2WZ128rmkz = 6990 |
| 146724 | CEFBS_None, // VCVTPH2WZ128rr = 6991 |
| 146725 | CEFBS_None, // VCVTPH2WZ128rrk = 6992 |
| 146726 | CEFBS_None, // VCVTPH2WZ128rrkz = 6993 |
| 146727 | CEFBS_None, // VCVTPH2WZ256rm = 6994 |
| 146728 | CEFBS_None, // VCVTPH2WZ256rmb = 6995 |
| 146729 | CEFBS_None, // VCVTPH2WZ256rmbk = 6996 |
| 146730 | CEFBS_None, // VCVTPH2WZ256rmbkz = 6997 |
| 146731 | CEFBS_None, // VCVTPH2WZ256rmk = 6998 |
| 146732 | CEFBS_None, // VCVTPH2WZ256rmkz = 6999 |
| 146733 | CEFBS_None, // VCVTPH2WZ256rr = 7000 |
| 146734 | CEFBS_None, // VCVTPH2WZ256rrk = 7001 |
| 146735 | CEFBS_None, // VCVTPH2WZ256rrkz = 7002 |
| 146736 | CEFBS_None, // VCVTPH2WZrm = 7003 |
| 146737 | CEFBS_None, // VCVTPH2WZrmb = 7004 |
| 146738 | CEFBS_None, // VCVTPH2WZrmbk = 7005 |
| 146739 | CEFBS_None, // VCVTPH2WZrmbkz = 7006 |
| 146740 | CEFBS_None, // VCVTPH2WZrmk = 7007 |
| 146741 | CEFBS_None, // VCVTPH2WZrmkz = 7008 |
| 146742 | CEFBS_None, // VCVTPH2WZrr = 7009 |
| 146743 | CEFBS_None, // VCVTPH2WZrrb = 7010 |
| 146744 | CEFBS_None, // VCVTPH2WZrrbk = 7011 |
| 146745 | CEFBS_None, // VCVTPH2WZrrbkz = 7012 |
| 146746 | CEFBS_None, // VCVTPH2WZrrk = 7013 |
| 146747 | CEFBS_None, // VCVTPH2WZrrkz = 7014 |
| 146748 | CEFBS_None, // VCVTPS2DQYrm = 7015 |
| 146749 | CEFBS_None, // VCVTPS2DQYrr = 7016 |
| 146750 | CEFBS_None, // VCVTPS2DQZ128rm = 7017 |
| 146751 | CEFBS_None, // VCVTPS2DQZ128rmb = 7018 |
| 146752 | CEFBS_None, // VCVTPS2DQZ128rmbk = 7019 |
| 146753 | CEFBS_None, // VCVTPS2DQZ128rmbkz = 7020 |
| 146754 | CEFBS_None, // VCVTPS2DQZ128rmk = 7021 |
| 146755 | CEFBS_None, // VCVTPS2DQZ128rmkz = 7022 |
| 146756 | CEFBS_None, // VCVTPS2DQZ128rr = 7023 |
| 146757 | CEFBS_None, // VCVTPS2DQZ128rrk = 7024 |
| 146758 | CEFBS_None, // VCVTPS2DQZ128rrkz = 7025 |
| 146759 | CEFBS_None, // VCVTPS2DQZ256rm = 7026 |
| 146760 | CEFBS_None, // VCVTPS2DQZ256rmb = 7027 |
| 146761 | CEFBS_None, // VCVTPS2DQZ256rmbk = 7028 |
| 146762 | CEFBS_None, // VCVTPS2DQZ256rmbkz = 7029 |
| 146763 | CEFBS_None, // VCVTPS2DQZ256rmk = 7030 |
| 146764 | CEFBS_None, // VCVTPS2DQZ256rmkz = 7031 |
| 146765 | CEFBS_None, // VCVTPS2DQZ256rr = 7032 |
| 146766 | CEFBS_None, // VCVTPS2DQZ256rrk = 7033 |
| 146767 | CEFBS_None, // VCVTPS2DQZ256rrkz = 7034 |
| 146768 | CEFBS_None, // VCVTPS2DQZrm = 7035 |
| 146769 | CEFBS_None, // VCVTPS2DQZrmb = 7036 |
| 146770 | CEFBS_None, // VCVTPS2DQZrmbk = 7037 |
| 146771 | CEFBS_None, // VCVTPS2DQZrmbkz = 7038 |
| 146772 | CEFBS_None, // VCVTPS2DQZrmk = 7039 |
| 146773 | CEFBS_None, // VCVTPS2DQZrmkz = 7040 |
| 146774 | CEFBS_None, // VCVTPS2DQZrr = 7041 |
| 146775 | CEFBS_None, // VCVTPS2DQZrrb = 7042 |
| 146776 | CEFBS_None, // VCVTPS2DQZrrbk = 7043 |
| 146777 | CEFBS_None, // VCVTPS2DQZrrbkz = 7044 |
| 146778 | CEFBS_None, // VCVTPS2DQZrrk = 7045 |
| 146779 | CEFBS_None, // VCVTPS2DQZrrkz = 7046 |
| 146780 | CEFBS_None, // VCVTPS2DQrm = 7047 |
| 146781 | CEFBS_None, // VCVTPS2DQrr = 7048 |
| 146782 | CEFBS_None, // VCVTPS2IBSZ128rm = 7049 |
| 146783 | CEFBS_None, // VCVTPS2IBSZ128rmb = 7050 |
| 146784 | CEFBS_None, // VCVTPS2IBSZ128rmbk = 7051 |
| 146785 | CEFBS_None, // VCVTPS2IBSZ128rmbkz = 7052 |
| 146786 | CEFBS_None, // VCVTPS2IBSZ128rmk = 7053 |
| 146787 | CEFBS_None, // VCVTPS2IBSZ128rmkz = 7054 |
| 146788 | CEFBS_None, // VCVTPS2IBSZ128rr = 7055 |
| 146789 | CEFBS_None, // VCVTPS2IBSZ128rrk = 7056 |
| 146790 | CEFBS_None, // VCVTPS2IBSZ128rrkz = 7057 |
| 146791 | CEFBS_None, // VCVTPS2IBSZ256rm = 7058 |
| 146792 | CEFBS_None, // VCVTPS2IBSZ256rmb = 7059 |
| 146793 | CEFBS_None, // VCVTPS2IBSZ256rmbk = 7060 |
| 146794 | CEFBS_None, // VCVTPS2IBSZ256rmbkz = 7061 |
| 146795 | CEFBS_None, // VCVTPS2IBSZ256rmk = 7062 |
| 146796 | CEFBS_None, // VCVTPS2IBSZ256rmkz = 7063 |
| 146797 | CEFBS_None, // VCVTPS2IBSZ256rr = 7064 |
| 146798 | CEFBS_None, // VCVTPS2IBSZ256rrk = 7065 |
| 146799 | CEFBS_None, // VCVTPS2IBSZ256rrkz = 7066 |
| 146800 | CEFBS_None, // VCVTPS2IBSZrm = 7067 |
| 146801 | CEFBS_None, // VCVTPS2IBSZrmb = 7068 |
| 146802 | CEFBS_None, // VCVTPS2IBSZrmbk = 7069 |
| 146803 | CEFBS_None, // VCVTPS2IBSZrmbkz = 7070 |
| 146804 | CEFBS_None, // VCVTPS2IBSZrmk = 7071 |
| 146805 | CEFBS_None, // VCVTPS2IBSZrmkz = 7072 |
| 146806 | CEFBS_None, // VCVTPS2IBSZrr = 7073 |
| 146807 | CEFBS_None, // VCVTPS2IBSZrrb = 7074 |
| 146808 | CEFBS_None, // VCVTPS2IBSZrrbk = 7075 |
| 146809 | CEFBS_None, // VCVTPS2IBSZrrbkz = 7076 |
| 146810 | CEFBS_None, // VCVTPS2IBSZrrk = 7077 |
| 146811 | CEFBS_None, // VCVTPS2IBSZrrkz = 7078 |
| 146812 | CEFBS_None, // VCVTPS2IUBSZ128rm = 7079 |
| 146813 | CEFBS_None, // VCVTPS2IUBSZ128rmb = 7080 |
| 146814 | CEFBS_None, // VCVTPS2IUBSZ128rmbk = 7081 |
| 146815 | CEFBS_None, // VCVTPS2IUBSZ128rmbkz = 7082 |
| 146816 | CEFBS_None, // VCVTPS2IUBSZ128rmk = 7083 |
| 146817 | CEFBS_None, // VCVTPS2IUBSZ128rmkz = 7084 |
| 146818 | CEFBS_None, // VCVTPS2IUBSZ128rr = 7085 |
| 146819 | CEFBS_None, // VCVTPS2IUBSZ128rrk = 7086 |
| 146820 | CEFBS_None, // VCVTPS2IUBSZ128rrkz = 7087 |
| 146821 | CEFBS_None, // VCVTPS2IUBSZ256rm = 7088 |
| 146822 | CEFBS_None, // VCVTPS2IUBSZ256rmb = 7089 |
| 146823 | CEFBS_None, // VCVTPS2IUBSZ256rmbk = 7090 |
| 146824 | CEFBS_None, // VCVTPS2IUBSZ256rmbkz = 7091 |
| 146825 | CEFBS_None, // VCVTPS2IUBSZ256rmk = 7092 |
| 146826 | CEFBS_None, // VCVTPS2IUBSZ256rmkz = 7093 |
| 146827 | CEFBS_None, // VCVTPS2IUBSZ256rr = 7094 |
| 146828 | CEFBS_None, // VCVTPS2IUBSZ256rrk = 7095 |
| 146829 | CEFBS_None, // VCVTPS2IUBSZ256rrkz = 7096 |
| 146830 | CEFBS_None, // VCVTPS2IUBSZrm = 7097 |
| 146831 | CEFBS_None, // VCVTPS2IUBSZrmb = 7098 |
| 146832 | CEFBS_None, // VCVTPS2IUBSZrmbk = 7099 |
| 146833 | CEFBS_None, // VCVTPS2IUBSZrmbkz = 7100 |
| 146834 | CEFBS_None, // VCVTPS2IUBSZrmk = 7101 |
| 146835 | CEFBS_None, // VCVTPS2IUBSZrmkz = 7102 |
| 146836 | CEFBS_None, // VCVTPS2IUBSZrr = 7103 |
| 146837 | CEFBS_None, // VCVTPS2IUBSZrrb = 7104 |
| 146838 | CEFBS_None, // VCVTPS2IUBSZrrbk = 7105 |
| 146839 | CEFBS_None, // VCVTPS2IUBSZrrbkz = 7106 |
| 146840 | CEFBS_None, // VCVTPS2IUBSZrrk = 7107 |
| 146841 | CEFBS_None, // VCVTPS2IUBSZrrkz = 7108 |
| 146842 | CEFBS_None, // VCVTPS2PDYrm = 7109 |
| 146843 | CEFBS_None, // VCVTPS2PDYrr = 7110 |
| 146844 | CEFBS_None, // VCVTPS2PDZ128rm = 7111 |
| 146845 | CEFBS_None, // VCVTPS2PDZ128rmb = 7112 |
| 146846 | CEFBS_None, // VCVTPS2PDZ128rmbk = 7113 |
| 146847 | CEFBS_None, // VCVTPS2PDZ128rmbkz = 7114 |
| 146848 | CEFBS_None, // VCVTPS2PDZ128rmk = 7115 |
| 146849 | CEFBS_None, // VCVTPS2PDZ128rmkz = 7116 |
| 146850 | CEFBS_None, // VCVTPS2PDZ128rr = 7117 |
| 146851 | CEFBS_None, // VCVTPS2PDZ128rrk = 7118 |
| 146852 | CEFBS_None, // VCVTPS2PDZ128rrkz = 7119 |
| 146853 | CEFBS_None, // VCVTPS2PDZ256rm = 7120 |
| 146854 | CEFBS_None, // VCVTPS2PDZ256rmb = 7121 |
| 146855 | CEFBS_None, // VCVTPS2PDZ256rmbk = 7122 |
| 146856 | CEFBS_None, // VCVTPS2PDZ256rmbkz = 7123 |
| 146857 | CEFBS_None, // VCVTPS2PDZ256rmk = 7124 |
| 146858 | CEFBS_None, // VCVTPS2PDZ256rmkz = 7125 |
| 146859 | CEFBS_None, // VCVTPS2PDZ256rr = 7126 |
| 146860 | CEFBS_None, // VCVTPS2PDZ256rrk = 7127 |
| 146861 | CEFBS_None, // VCVTPS2PDZ256rrkz = 7128 |
| 146862 | CEFBS_None, // VCVTPS2PDZrm = 7129 |
| 146863 | CEFBS_None, // VCVTPS2PDZrmb = 7130 |
| 146864 | CEFBS_None, // VCVTPS2PDZrmbk = 7131 |
| 146865 | CEFBS_None, // VCVTPS2PDZrmbkz = 7132 |
| 146866 | CEFBS_None, // VCVTPS2PDZrmk = 7133 |
| 146867 | CEFBS_None, // VCVTPS2PDZrmkz = 7134 |
| 146868 | CEFBS_None, // VCVTPS2PDZrr = 7135 |
| 146869 | CEFBS_None, // VCVTPS2PDZrrb = 7136 |
| 146870 | CEFBS_None, // VCVTPS2PDZrrbk = 7137 |
| 146871 | CEFBS_None, // VCVTPS2PDZrrbkz = 7138 |
| 146872 | CEFBS_None, // VCVTPS2PDZrrk = 7139 |
| 146873 | CEFBS_None, // VCVTPS2PDZrrkz = 7140 |
| 146874 | CEFBS_None, // VCVTPS2PDrm = 7141 |
| 146875 | CEFBS_None, // VCVTPS2PDrr = 7142 |
| 146876 | CEFBS_None, // VCVTPS2PHXZ128rm = 7143 |
| 146877 | CEFBS_None, // VCVTPS2PHXZ128rmb = 7144 |
| 146878 | CEFBS_None, // VCVTPS2PHXZ128rmbk = 7145 |
| 146879 | CEFBS_None, // VCVTPS2PHXZ128rmbkz = 7146 |
| 146880 | CEFBS_None, // VCVTPS2PHXZ128rmk = 7147 |
| 146881 | CEFBS_None, // VCVTPS2PHXZ128rmkz = 7148 |
| 146882 | CEFBS_None, // VCVTPS2PHXZ128rr = 7149 |
| 146883 | CEFBS_None, // VCVTPS2PHXZ128rrk = 7150 |
| 146884 | CEFBS_None, // VCVTPS2PHXZ128rrkz = 7151 |
| 146885 | CEFBS_None, // VCVTPS2PHXZ256rm = 7152 |
| 146886 | CEFBS_None, // VCVTPS2PHXZ256rmb = 7153 |
| 146887 | CEFBS_None, // VCVTPS2PHXZ256rmbk = 7154 |
| 146888 | CEFBS_None, // VCVTPS2PHXZ256rmbkz = 7155 |
| 146889 | CEFBS_None, // VCVTPS2PHXZ256rmk = 7156 |
| 146890 | CEFBS_None, // VCVTPS2PHXZ256rmkz = 7157 |
| 146891 | CEFBS_None, // VCVTPS2PHXZ256rr = 7158 |
| 146892 | CEFBS_None, // VCVTPS2PHXZ256rrk = 7159 |
| 146893 | CEFBS_None, // VCVTPS2PHXZ256rrkz = 7160 |
| 146894 | CEFBS_None, // VCVTPS2PHXZrm = 7161 |
| 146895 | CEFBS_None, // VCVTPS2PHXZrmb = 7162 |
| 146896 | CEFBS_None, // VCVTPS2PHXZrmbk = 7163 |
| 146897 | CEFBS_None, // VCVTPS2PHXZrmbkz = 7164 |
| 146898 | CEFBS_None, // VCVTPS2PHXZrmk = 7165 |
| 146899 | CEFBS_None, // VCVTPS2PHXZrmkz = 7166 |
| 146900 | CEFBS_None, // VCVTPS2PHXZrr = 7167 |
| 146901 | CEFBS_None, // VCVTPS2PHXZrrb = 7168 |
| 146902 | CEFBS_None, // VCVTPS2PHXZrrbk = 7169 |
| 146903 | CEFBS_None, // VCVTPS2PHXZrrbkz = 7170 |
| 146904 | CEFBS_None, // VCVTPS2PHXZrrk = 7171 |
| 146905 | CEFBS_None, // VCVTPS2PHXZrrkz = 7172 |
| 146906 | CEFBS_None, // VCVTPS2PHYmr = 7173 |
| 146907 | CEFBS_None, // VCVTPS2PHYrr = 7174 |
| 146908 | CEFBS_None, // VCVTPS2PHZ128mr = 7175 |
| 146909 | CEFBS_None, // VCVTPS2PHZ128mrk = 7176 |
| 146910 | CEFBS_None, // VCVTPS2PHZ128rr = 7177 |
| 146911 | CEFBS_None, // VCVTPS2PHZ128rrk = 7178 |
| 146912 | CEFBS_None, // VCVTPS2PHZ128rrkz = 7179 |
| 146913 | CEFBS_None, // VCVTPS2PHZ256mr = 7180 |
| 146914 | CEFBS_None, // VCVTPS2PHZ256mrk = 7181 |
| 146915 | CEFBS_None, // VCVTPS2PHZ256rr = 7182 |
| 146916 | CEFBS_None, // VCVTPS2PHZ256rrk = 7183 |
| 146917 | CEFBS_None, // VCVTPS2PHZ256rrkz = 7184 |
| 146918 | CEFBS_None, // VCVTPS2PHZmr = 7185 |
| 146919 | CEFBS_None, // VCVTPS2PHZmrk = 7186 |
| 146920 | CEFBS_None, // VCVTPS2PHZrr = 7187 |
| 146921 | CEFBS_None, // VCVTPS2PHZrrb = 7188 |
| 146922 | CEFBS_None, // VCVTPS2PHZrrbk = 7189 |
| 146923 | CEFBS_None, // VCVTPS2PHZrrbkz = 7190 |
| 146924 | CEFBS_None, // VCVTPS2PHZrrk = 7191 |
| 146925 | CEFBS_None, // VCVTPS2PHZrrkz = 7192 |
| 146926 | CEFBS_None, // VCVTPS2PHmr = 7193 |
| 146927 | CEFBS_None, // VCVTPS2PHrr = 7194 |
| 146928 | CEFBS_None, // VCVTPS2QQZ128rm = 7195 |
| 146929 | CEFBS_None, // VCVTPS2QQZ128rmb = 7196 |
| 146930 | CEFBS_None, // VCVTPS2QQZ128rmbk = 7197 |
| 146931 | CEFBS_None, // VCVTPS2QQZ128rmbkz = 7198 |
| 146932 | CEFBS_None, // VCVTPS2QQZ128rmk = 7199 |
| 146933 | CEFBS_None, // VCVTPS2QQZ128rmkz = 7200 |
| 146934 | CEFBS_None, // VCVTPS2QQZ128rr = 7201 |
| 146935 | CEFBS_None, // VCVTPS2QQZ128rrk = 7202 |
| 146936 | CEFBS_None, // VCVTPS2QQZ128rrkz = 7203 |
| 146937 | CEFBS_None, // VCVTPS2QQZ256rm = 7204 |
| 146938 | CEFBS_None, // VCVTPS2QQZ256rmb = 7205 |
| 146939 | CEFBS_None, // VCVTPS2QQZ256rmbk = 7206 |
| 146940 | CEFBS_None, // VCVTPS2QQZ256rmbkz = 7207 |
| 146941 | CEFBS_None, // VCVTPS2QQZ256rmk = 7208 |
| 146942 | CEFBS_None, // VCVTPS2QQZ256rmkz = 7209 |
| 146943 | CEFBS_None, // VCVTPS2QQZ256rr = 7210 |
| 146944 | CEFBS_None, // VCVTPS2QQZ256rrk = 7211 |
| 146945 | CEFBS_None, // VCVTPS2QQZ256rrkz = 7212 |
| 146946 | CEFBS_None, // VCVTPS2QQZrm = 7213 |
| 146947 | CEFBS_None, // VCVTPS2QQZrmb = 7214 |
| 146948 | CEFBS_None, // VCVTPS2QQZrmbk = 7215 |
| 146949 | CEFBS_None, // VCVTPS2QQZrmbkz = 7216 |
| 146950 | CEFBS_None, // VCVTPS2QQZrmk = 7217 |
| 146951 | CEFBS_None, // VCVTPS2QQZrmkz = 7218 |
| 146952 | CEFBS_None, // VCVTPS2QQZrr = 7219 |
| 146953 | CEFBS_None, // VCVTPS2QQZrrb = 7220 |
| 146954 | CEFBS_None, // VCVTPS2QQZrrbk = 7221 |
| 146955 | CEFBS_None, // VCVTPS2QQZrrbkz = 7222 |
| 146956 | CEFBS_None, // VCVTPS2QQZrrk = 7223 |
| 146957 | CEFBS_None, // VCVTPS2QQZrrkz = 7224 |
| 146958 | CEFBS_None, // VCVTPS2UDQZ128rm = 7225 |
| 146959 | CEFBS_None, // VCVTPS2UDQZ128rmb = 7226 |
| 146960 | CEFBS_None, // VCVTPS2UDQZ128rmbk = 7227 |
| 146961 | CEFBS_None, // VCVTPS2UDQZ128rmbkz = 7228 |
| 146962 | CEFBS_None, // VCVTPS2UDQZ128rmk = 7229 |
| 146963 | CEFBS_None, // VCVTPS2UDQZ128rmkz = 7230 |
| 146964 | CEFBS_None, // VCVTPS2UDQZ128rr = 7231 |
| 146965 | CEFBS_None, // VCVTPS2UDQZ128rrk = 7232 |
| 146966 | CEFBS_None, // VCVTPS2UDQZ128rrkz = 7233 |
| 146967 | CEFBS_None, // VCVTPS2UDQZ256rm = 7234 |
| 146968 | CEFBS_None, // VCVTPS2UDQZ256rmb = 7235 |
| 146969 | CEFBS_None, // VCVTPS2UDQZ256rmbk = 7236 |
| 146970 | CEFBS_None, // VCVTPS2UDQZ256rmbkz = 7237 |
| 146971 | CEFBS_None, // VCVTPS2UDQZ256rmk = 7238 |
| 146972 | CEFBS_None, // VCVTPS2UDQZ256rmkz = 7239 |
| 146973 | CEFBS_None, // VCVTPS2UDQZ256rr = 7240 |
| 146974 | CEFBS_None, // VCVTPS2UDQZ256rrk = 7241 |
| 146975 | CEFBS_None, // VCVTPS2UDQZ256rrkz = 7242 |
| 146976 | CEFBS_None, // VCVTPS2UDQZrm = 7243 |
| 146977 | CEFBS_None, // VCVTPS2UDQZrmb = 7244 |
| 146978 | CEFBS_None, // VCVTPS2UDQZrmbk = 7245 |
| 146979 | CEFBS_None, // VCVTPS2UDQZrmbkz = 7246 |
| 146980 | CEFBS_None, // VCVTPS2UDQZrmk = 7247 |
| 146981 | CEFBS_None, // VCVTPS2UDQZrmkz = 7248 |
| 146982 | CEFBS_None, // VCVTPS2UDQZrr = 7249 |
| 146983 | CEFBS_None, // VCVTPS2UDQZrrb = 7250 |
| 146984 | CEFBS_None, // VCVTPS2UDQZrrbk = 7251 |
| 146985 | CEFBS_None, // VCVTPS2UDQZrrbkz = 7252 |
| 146986 | CEFBS_None, // VCVTPS2UDQZrrk = 7253 |
| 146987 | CEFBS_None, // VCVTPS2UDQZrrkz = 7254 |
| 146988 | CEFBS_None, // VCVTPS2UQQZ128rm = 7255 |
| 146989 | CEFBS_None, // VCVTPS2UQQZ128rmb = 7256 |
| 146990 | CEFBS_None, // VCVTPS2UQQZ128rmbk = 7257 |
| 146991 | CEFBS_None, // VCVTPS2UQQZ128rmbkz = 7258 |
| 146992 | CEFBS_None, // VCVTPS2UQQZ128rmk = 7259 |
| 146993 | CEFBS_None, // VCVTPS2UQQZ128rmkz = 7260 |
| 146994 | CEFBS_None, // VCVTPS2UQQZ128rr = 7261 |
| 146995 | CEFBS_None, // VCVTPS2UQQZ128rrk = 7262 |
| 146996 | CEFBS_None, // VCVTPS2UQQZ128rrkz = 7263 |
| 146997 | CEFBS_None, // VCVTPS2UQQZ256rm = 7264 |
| 146998 | CEFBS_None, // VCVTPS2UQQZ256rmb = 7265 |
| 146999 | CEFBS_None, // VCVTPS2UQQZ256rmbk = 7266 |
| 147000 | CEFBS_None, // VCVTPS2UQQZ256rmbkz = 7267 |
| 147001 | CEFBS_None, // VCVTPS2UQQZ256rmk = 7268 |
| 147002 | CEFBS_None, // VCVTPS2UQQZ256rmkz = 7269 |
| 147003 | CEFBS_None, // VCVTPS2UQQZ256rr = 7270 |
| 147004 | CEFBS_None, // VCVTPS2UQQZ256rrk = 7271 |
| 147005 | CEFBS_None, // VCVTPS2UQQZ256rrkz = 7272 |
| 147006 | CEFBS_None, // VCVTPS2UQQZrm = 7273 |
| 147007 | CEFBS_None, // VCVTPS2UQQZrmb = 7274 |
| 147008 | CEFBS_None, // VCVTPS2UQQZrmbk = 7275 |
| 147009 | CEFBS_None, // VCVTPS2UQQZrmbkz = 7276 |
| 147010 | CEFBS_None, // VCVTPS2UQQZrmk = 7277 |
| 147011 | CEFBS_None, // VCVTPS2UQQZrmkz = 7278 |
| 147012 | CEFBS_None, // VCVTPS2UQQZrr = 7279 |
| 147013 | CEFBS_None, // VCVTPS2UQQZrrb = 7280 |
| 147014 | CEFBS_None, // VCVTPS2UQQZrrbk = 7281 |
| 147015 | CEFBS_None, // VCVTPS2UQQZrrbkz = 7282 |
| 147016 | CEFBS_None, // VCVTPS2UQQZrrk = 7283 |
| 147017 | CEFBS_None, // VCVTPS2UQQZrrkz = 7284 |
| 147018 | CEFBS_None, // VCVTQQ2PDZ128rm = 7285 |
| 147019 | CEFBS_None, // VCVTQQ2PDZ128rmb = 7286 |
| 147020 | CEFBS_None, // VCVTQQ2PDZ128rmbk = 7287 |
| 147021 | CEFBS_None, // VCVTQQ2PDZ128rmbkz = 7288 |
| 147022 | CEFBS_None, // VCVTQQ2PDZ128rmk = 7289 |
| 147023 | CEFBS_None, // VCVTQQ2PDZ128rmkz = 7290 |
| 147024 | CEFBS_None, // VCVTQQ2PDZ128rr = 7291 |
| 147025 | CEFBS_None, // VCVTQQ2PDZ128rrk = 7292 |
| 147026 | CEFBS_None, // VCVTQQ2PDZ128rrkz = 7293 |
| 147027 | CEFBS_None, // VCVTQQ2PDZ256rm = 7294 |
| 147028 | CEFBS_None, // VCVTQQ2PDZ256rmb = 7295 |
| 147029 | CEFBS_None, // VCVTQQ2PDZ256rmbk = 7296 |
| 147030 | CEFBS_None, // VCVTQQ2PDZ256rmbkz = 7297 |
| 147031 | CEFBS_None, // VCVTQQ2PDZ256rmk = 7298 |
| 147032 | CEFBS_None, // VCVTQQ2PDZ256rmkz = 7299 |
| 147033 | CEFBS_None, // VCVTQQ2PDZ256rr = 7300 |
| 147034 | CEFBS_None, // VCVTQQ2PDZ256rrk = 7301 |
| 147035 | CEFBS_None, // VCVTQQ2PDZ256rrkz = 7302 |
| 147036 | CEFBS_None, // VCVTQQ2PDZrm = 7303 |
| 147037 | CEFBS_None, // VCVTQQ2PDZrmb = 7304 |
| 147038 | CEFBS_None, // VCVTQQ2PDZrmbk = 7305 |
| 147039 | CEFBS_None, // VCVTQQ2PDZrmbkz = 7306 |
| 147040 | CEFBS_None, // VCVTQQ2PDZrmk = 7307 |
| 147041 | CEFBS_None, // VCVTQQ2PDZrmkz = 7308 |
| 147042 | CEFBS_None, // VCVTQQ2PDZrr = 7309 |
| 147043 | CEFBS_None, // VCVTQQ2PDZrrb = 7310 |
| 147044 | CEFBS_None, // VCVTQQ2PDZrrbk = 7311 |
| 147045 | CEFBS_None, // VCVTQQ2PDZrrbkz = 7312 |
| 147046 | CEFBS_None, // VCVTQQ2PDZrrk = 7313 |
| 147047 | CEFBS_None, // VCVTQQ2PDZrrkz = 7314 |
| 147048 | CEFBS_None, // VCVTQQ2PHZ128rm = 7315 |
| 147049 | CEFBS_None, // VCVTQQ2PHZ128rmb = 7316 |
| 147050 | CEFBS_None, // VCVTQQ2PHZ128rmbk = 7317 |
| 147051 | CEFBS_None, // VCVTQQ2PHZ128rmbkz = 7318 |
| 147052 | CEFBS_None, // VCVTQQ2PHZ128rmk = 7319 |
| 147053 | CEFBS_None, // VCVTQQ2PHZ128rmkz = 7320 |
| 147054 | CEFBS_None, // VCVTQQ2PHZ128rr = 7321 |
| 147055 | CEFBS_None, // VCVTQQ2PHZ128rrk = 7322 |
| 147056 | CEFBS_None, // VCVTQQ2PHZ128rrkz = 7323 |
| 147057 | CEFBS_None, // VCVTQQ2PHZ256rm = 7324 |
| 147058 | CEFBS_None, // VCVTQQ2PHZ256rmb = 7325 |
| 147059 | CEFBS_None, // VCVTQQ2PHZ256rmbk = 7326 |
| 147060 | CEFBS_None, // VCVTQQ2PHZ256rmbkz = 7327 |
| 147061 | CEFBS_None, // VCVTQQ2PHZ256rmk = 7328 |
| 147062 | CEFBS_None, // VCVTQQ2PHZ256rmkz = 7329 |
| 147063 | CEFBS_None, // VCVTQQ2PHZ256rr = 7330 |
| 147064 | CEFBS_None, // VCVTQQ2PHZ256rrk = 7331 |
| 147065 | CEFBS_None, // VCVTQQ2PHZ256rrkz = 7332 |
| 147066 | CEFBS_None, // VCVTQQ2PHZrm = 7333 |
| 147067 | CEFBS_None, // VCVTQQ2PHZrmb = 7334 |
| 147068 | CEFBS_None, // VCVTQQ2PHZrmbk = 7335 |
| 147069 | CEFBS_None, // VCVTQQ2PHZrmbkz = 7336 |
| 147070 | CEFBS_None, // VCVTQQ2PHZrmk = 7337 |
| 147071 | CEFBS_None, // VCVTQQ2PHZrmkz = 7338 |
| 147072 | CEFBS_None, // VCVTQQ2PHZrr = 7339 |
| 147073 | CEFBS_None, // VCVTQQ2PHZrrb = 7340 |
| 147074 | CEFBS_None, // VCVTQQ2PHZrrbk = 7341 |
| 147075 | CEFBS_None, // VCVTQQ2PHZrrbkz = 7342 |
| 147076 | CEFBS_None, // VCVTQQ2PHZrrk = 7343 |
| 147077 | CEFBS_None, // VCVTQQ2PHZrrkz = 7344 |
| 147078 | CEFBS_None, // VCVTQQ2PSZ128rm = 7345 |
| 147079 | CEFBS_None, // VCVTQQ2PSZ128rmb = 7346 |
| 147080 | CEFBS_None, // VCVTQQ2PSZ128rmbk = 7347 |
| 147081 | CEFBS_None, // VCVTQQ2PSZ128rmbkz = 7348 |
| 147082 | CEFBS_None, // VCVTQQ2PSZ128rmk = 7349 |
| 147083 | CEFBS_None, // VCVTQQ2PSZ128rmkz = 7350 |
| 147084 | CEFBS_None, // VCVTQQ2PSZ128rr = 7351 |
| 147085 | CEFBS_None, // VCVTQQ2PSZ128rrk = 7352 |
| 147086 | CEFBS_None, // VCVTQQ2PSZ128rrkz = 7353 |
| 147087 | CEFBS_None, // VCVTQQ2PSZ256rm = 7354 |
| 147088 | CEFBS_None, // VCVTQQ2PSZ256rmb = 7355 |
| 147089 | CEFBS_None, // VCVTQQ2PSZ256rmbk = 7356 |
| 147090 | CEFBS_None, // VCVTQQ2PSZ256rmbkz = 7357 |
| 147091 | CEFBS_None, // VCVTQQ2PSZ256rmk = 7358 |
| 147092 | CEFBS_None, // VCVTQQ2PSZ256rmkz = 7359 |
| 147093 | CEFBS_None, // VCVTQQ2PSZ256rr = 7360 |
| 147094 | CEFBS_None, // VCVTQQ2PSZ256rrk = 7361 |
| 147095 | CEFBS_None, // VCVTQQ2PSZ256rrkz = 7362 |
| 147096 | CEFBS_None, // VCVTQQ2PSZrm = 7363 |
| 147097 | CEFBS_None, // VCVTQQ2PSZrmb = 7364 |
| 147098 | CEFBS_None, // VCVTQQ2PSZrmbk = 7365 |
| 147099 | CEFBS_None, // VCVTQQ2PSZrmbkz = 7366 |
| 147100 | CEFBS_None, // VCVTQQ2PSZrmk = 7367 |
| 147101 | CEFBS_None, // VCVTQQ2PSZrmkz = 7368 |
| 147102 | CEFBS_None, // VCVTQQ2PSZrr = 7369 |
| 147103 | CEFBS_None, // VCVTQQ2PSZrrb = 7370 |
| 147104 | CEFBS_None, // VCVTQQ2PSZrrbk = 7371 |
| 147105 | CEFBS_None, // VCVTQQ2PSZrrbkz = 7372 |
| 147106 | CEFBS_None, // VCVTQQ2PSZrrk = 7373 |
| 147107 | CEFBS_None, // VCVTQQ2PSZrrkz = 7374 |
| 147108 | CEFBS_None, // VCVTSD2SHZrm = 7375 |
| 147109 | CEFBS_None, // VCVTSD2SHZrm_Int = 7376 |
| 147110 | CEFBS_None, // VCVTSD2SHZrmk_Int = 7377 |
| 147111 | CEFBS_None, // VCVTSD2SHZrmkz_Int = 7378 |
| 147112 | CEFBS_None, // VCVTSD2SHZrr = 7379 |
| 147113 | CEFBS_None, // VCVTSD2SHZrr_Int = 7380 |
| 147114 | CEFBS_None, // VCVTSD2SHZrrb_Int = 7381 |
| 147115 | CEFBS_None, // VCVTSD2SHZrrbk_Int = 7382 |
| 147116 | CEFBS_None, // VCVTSD2SHZrrbkz_Int = 7383 |
| 147117 | CEFBS_None, // VCVTSD2SHZrrk_Int = 7384 |
| 147118 | CEFBS_None, // VCVTSD2SHZrrkz_Int = 7385 |
| 147119 | CEFBS_None, // VCVTSD2SI64Zrm = 7386 |
| 147120 | CEFBS_None, // VCVTSD2SI64Zrm_Int = 7387 |
| 147121 | CEFBS_None, // VCVTSD2SI64Zrr = 7388 |
| 147122 | CEFBS_None, // VCVTSD2SI64Zrr_Int = 7389 |
| 147123 | CEFBS_None, // VCVTSD2SI64Zrrb_Int = 7390 |
| 147124 | CEFBS_None, // VCVTSD2SI64rm = 7391 |
| 147125 | CEFBS_None, // VCVTSD2SI64rm_Int = 7392 |
| 147126 | CEFBS_None, // VCVTSD2SI64rr = 7393 |
| 147127 | CEFBS_None, // VCVTSD2SI64rr_Int = 7394 |
| 147128 | CEFBS_None, // VCVTSD2SIZrm = 7395 |
| 147129 | CEFBS_None, // VCVTSD2SIZrm_Int = 7396 |
| 147130 | CEFBS_None, // VCVTSD2SIZrr = 7397 |
| 147131 | CEFBS_None, // VCVTSD2SIZrr_Int = 7398 |
| 147132 | CEFBS_None, // VCVTSD2SIZrrb_Int = 7399 |
| 147133 | CEFBS_None, // VCVTSD2SIrm = 7400 |
| 147134 | CEFBS_None, // VCVTSD2SIrm_Int = 7401 |
| 147135 | CEFBS_None, // VCVTSD2SIrr = 7402 |
| 147136 | CEFBS_None, // VCVTSD2SIrr_Int = 7403 |
| 147137 | CEFBS_None, // VCVTSD2SSZrm = 7404 |
| 147138 | CEFBS_None, // VCVTSD2SSZrm_Int = 7405 |
| 147139 | CEFBS_None, // VCVTSD2SSZrmk_Int = 7406 |
| 147140 | CEFBS_None, // VCVTSD2SSZrmkz_Int = 7407 |
| 147141 | CEFBS_None, // VCVTSD2SSZrr = 7408 |
| 147142 | CEFBS_None, // VCVTSD2SSZrr_Int = 7409 |
| 147143 | CEFBS_None, // VCVTSD2SSZrrb_Int = 7410 |
| 147144 | CEFBS_None, // VCVTSD2SSZrrbk_Int = 7411 |
| 147145 | CEFBS_None, // VCVTSD2SSZrrbkz_Int = 7412 |
| 147146 | CEFBS_None, // VCVTSD2SSZrrk_Int = 7413 |
| 147147 | CEFBS_None, // VCVTSD2SSZrrkz_Int = 7414 |
| 147148 | CEFBS_None, // VCVTSD2SSrm = 7415 |
| 147149 | CEFBS_None, // VCVTSD2SSrm_Int = 7416 |
| 147150 | CEFBS_None, // VCVTSD2SSrr = 7417 |
| 147151 | CEFBS_None, // VCVTSD2SSrr_Int = 7418 |
| 147152 | CEFBS_None, // VCVTSD2USI64Zrm_Int = 7419 |
| 147153 | CEFBS_None, // VCVTSD2USI64Zrr_Int = 7420 |
| 147154 | CEFBS_None, // VCVTSD2USI64Zrrb_Int = 7421 |
| 147155 | CEFBS_None, // VCVTSD2USIZrm_Int = 7422 |
| 147156 | CEFBS_None, // VCVTSD2USIZrr_Int = 7423 |
| 147157 | CEFBS_None, // VCVTSD2USIZrrb_Int = 7424 |
| 147158 | CEFBS_None, // VCVTSH2SDZrm = 7425 |
| 147159 | CEFBS_None, // VCVTSH2SDZrm_Int = 7426 |
| 147160 | CEFBS_None, // VCVTSH2SDZrmk_Int = 7427 |
| 147161 | CEFBS_None, // VCVTSH2SDZrmkz_Int = 7428 |
| 147162 | CEFBS_None, // VCVTSH2SDZrr = 7429 |
| 147163 | CEFBS_None, // VCVTSH2SDZrr_Int = 7430 |
| 147164 | CEFBS_None, // VCVTSH2SDZrrb_Int = 7431 |
| 147165 | CEFBS_None, // VCVTSH2SDZrrbk_Int = 7432 |
| 147166 | CEFBS_None, // VCVTSH2SDZrrbkz_Int = 7433 |
| 147167 | CEFBS_None, // VCVTSH2SDZrrk_Int = 7434 |
| 147168 | CEFBS_None, // VCVTSH2SDZrrkz_Int = 7435 |
| 147169 | CEFBS_None, // VCVTSH2SI64Zrm_Int = 7436 |
| 147170 | CEFBS_None, // VCVTSH2SI64Zrr_Int = 7437 |
| 147171 | CEFBS_None, // VCVTSH2SI64Zrrb_Int = 7438 |
| 147172 | CEFBS_None, // VCVTSH2SIZrm_Int = 7439 |
| 147173 | CEFBS_None, // VCVTSH2SIZrr_Int = 7440 |
| 147174 | CEFBS_None, // VCVTSH2SIZrrb_Int = 7441 |
| 147175 | CEFBS_None, // VCVTSH2SSZrm = 7442 |
| 147176 | CEFBS_None, // VCVTSH2SSZrm_Int = 7443 |
| 147177 | CEFBS_None, // VCVTSH2SSZrmk_Int = 7444 |
| 147178 | CEFBS_None, // VCVTSH2SSZrmkz_Int = 7445 |
| 147179 | CEFBS_None, // VCVTSH2SSZrr = 7446 |
| 147180 | CEFBS_None, // VCVTSH2SSZrr_Int = 7447 |
| 147181 | CEFBS_None, // VCVTSH2SSZrrb_Int = 7448 |
| 147182 | CEFBS_None, // VCVTSH2SSZrrbk_Int = 7449 |
| 147183 | CEFBS_None, // VCVTSH2SSZrrbkz_Int = 7450 |
| 147184 | CEFBS_None, // VCVTSH2SSZrrk_Int = 7451 |
| 147185 | CEFBS_None, // VCVTSH2SSZrrkz_Int = 7452 |
| 147186 | CEFBS_None, // VCVTSH2USI64Zrm_Int = 7453 |
| 147187 | CEFBS_None, // VCVTSH2USI64Zrr_Int = 7454 |
| 147188 | CEFBS_None, // VCVTSH2USI64Zrrb_Int = 7455 |
| 147189 | CEFBS_None, // VCVTSH2USIZrm_Int = 7456 |
| 147190 | CEFBS_None, // VCVTSH2USIZrr_Int = 7457 |
| 147191 | CEFBS_None, // VCVTSH2USIZrrb_Int = 7458 |
| 147192 | CEFBS_None, // VCVTSI2SDZrm = 7459 |
| 147193 | CEFBS_None, // VCVTSI2SDZrm_Int = 7460 |
| 147194 | CEFBS_None, // VCVTSI2SDZrr = 7461 |
| 147195 | CEFBS_None, // VCVTSI2SDZrr_Int = 7462 |
| 147196 | CEFBS_None, // VCVTSI2SDrm = 7463 |
| 147197 | CEFBS_None, // VCVTSI2SDrm_Int = 7464 |
| 147198 | CEFBS_None, // VCVTSI2SDrr = 7465 |
| 147199 | CEFBS_None, // VCVTSI2SDrr_Int = 7466 |
| 147200 | CEFBS_None, // VCVTSI2SHZrm = 7467 |
| 147201 | CEFBS_None, // VCVTSI2SHZrm_Int = 7468 |
| 147202 | CEFBS_None, // VCVTSI2SHZrr = 7469 |
| 147203 | CEFBS_None, // VCVTSI2SHZrr_Int = 7470 |
| 147204 | CEFBS_None, // VCVTSI2SHZrrb_Int = 7471 |
| 147205 | CEFBS_None, // VCVTSI2SSZrm = 7472 |
| 147206 | CEFBS_None, // VCVTSI2SSZrm_Int = 7473 |
| 147207 | CEFBS_None, // VCVTSI2SSZrr = 7474 |
| 147208 | CEFBS_None, // VCVTSI2SSZrr_Int = 7475 |
| 147209 | CEFBS_None, // VCVTSI2SSZrrb_Int = 7476 |
| 147210 | CEFBS_None, // VCVTSI2SSrm = 7477 |
| 147211 | CEFBS_None, // VCVTSI2SSrm_Int = 7478 |
| 147212 | CEFBS_None, // VCVTSI2SSrr = 7479 |
| 147213 | CEFBS_None, // VCVTSI2SSrr_Int = 7480 |
| 147214 | CEFBS_None, // VCVTSI642SDZrm = 7481 |
| 147215 | CEFBS_None, // VCVTSI642SDZrm_Int = 7482 |
| 147216 | CEFBS_None, // VCVTSI642SDZrr = 7483 |
| 147217 | CEFBS_None, // VCVTSI642SDZrr_Int = 7484 |
| 147218 | CEFBS_None, // VCVTSI642SDZrrb_Int = 7485 |
| 147219 | CEFBS_None, // VCVTSI642SDrm = 7486 |
| 147220 | CEFBS_None, // VCVTSI642SDrm_Int = 7487 |
| 147221 | CEFBS_None, // VCVTSI642SDrr = 7488 |
| 147222 | CEFBS_None, // VCVTSI642SDrr_Int = 7489 |
| 147223 | CEFBS_None, // VCVTSI642SHZrm = 7490 |
| 147224 | CEFBS_None, // VCVTSI642SHZrm_Int = 7491 |
| 147225 | CEFBS_None, // VCVTSI642SHZrr = 7492 |
| 147226 | CEFBS_None, // VCVTSI642SHZrr_Int = 7493 |
| 147227 | CEFBS_None, // VCVTSI642SHZrrb_Int = 7494 |
| 147228 | CEFBS_None, // VCVTSI642SSZrm = 7495 |
| 147229 | CEFBS_None, // VCVTSI642SSZrm_Int = 7496 |
| 147230 | CEFBS_None, // VCVTSI642SSZrr = 7497 |
| 147231 | CEFBS_None, // VCVTSI642SSZrr_Int = 7498 |
| 147232 | CEFBS_None, // VCVTSI642SSZrrb_Int = 7499 |
| 147233 | CEFBS_None, // VCVTSI642SSrm = 7500 |
| 147234 | CEFBS_None, // VCVTSI642SSrm_Int = 7501 |
| 147235 | CEFBS_None, // VCVTSI642SSrr = 7502 |
| 147236 | CEFBS_None, // VCVTSI642SSrr_Int = 7503 |
| 147237 | CEFBS_None, // VCVTSS2SDZrm = 7504 |
| 147238 | CEFBS_None, // VCVTSS2SDZrm_Int = 7505 |
| 147239 | CEFBS_None, // VCVTSS2SDZrmk_Int = 7506 |
| 147240 | CEFBS_None, // VCVTSS2SDZrmkz_Int = 7507 |
| 147241 | CEFBS_None, // VCVTSS2SDZrr = 7508 |
| 147242 | CEFBS_None, // VCVTSS2SDZrr_Int = 7509 |
| 147243 | CEFBS_None, // VCVTSS2SDZrrb_Int = 7510 |
| 147244 | CEFBS_None, // VCVTSS2SDZrrbk_Int = 7511 |
| 147245 | CEFBS_None, // VCVTSS2SDZrrbkz_Int = 7512 |
| 147246 | CEFBS_None, // VCVTSS2SDZrrk_Int = 7513 |
| 147247 | CEFBS_None, // VCVTSS2SDZrrkz_Int = 7514 |
| 147248 | CEFBS_None, // VCVTSS2SDrm = 7515 |
| 147249 | CEFBS_None, // VCVTSS2SDrm_Int = 7516 |
| 147250 | CEFBS_None, // VCVTSS2SDrr = 7517 |
| 147251 | CEFBS_None, // VCVTSS2SDrr_Int = 7518 |
| 147252 | CEFBS_None, // VCVTSS2SHZrm = 7519 |
| 147253 | CEFBS_None, // VCVTSS2SHZrm_Int = 7520 |
| 147254 | CEFBS_None, // VCVTSS2SHZrmk_Int = 7521 |
| 147255 | CEFBS_None, // VCVTSS2SHZrmkz_Int = 7522 |
| 147256 | CEFBS_None, // VCVTSS2SHZrr = 7523 |
| 147257 | CEFBS_None, // VCVTSS2SHZrr_Int = 7524 |
| 147258 | CEFBS_None, // VCVTSS2SHZrrb_Int = 7525 |
| 147259 | CEFBS_None, // VCVTSS2SHZrrbk_Int = 7526 |
| 147260 | CEFBS_None, // VCVTSS2SHZrrbkz_Int = 7527 |
| 147261 | CEFBS_None, // VCVTSS2SHZrrk_Int = 7528 |
| 147262 | CEFBS_None, // VCVTSS2SHZrrkz_Int = 7529 |
| 147263 | CEFBS_None, // VCVTSS2SI64Zrm = 7530 |
| 147264 | CEFBS_None, // VCVTSS2SI64Zrm_Int = 7531 |
| 147265 | CEFBS_None, // VCVTSS2SI64Zrr = 7532 |
| 147266 | CEFBS_None, // VCVTSS2SI64Zrr_Int = 7533 |
| 147267 | CEFBS_None, // VCVTSS2SI64Zrrb_Int = 7534 |
| 147268 | CEFBS_None, // VCVTSS2SI64rm = 7535 |
| 147269 | CEFBS_None, // VCVTSS2SI64rm_Int = 7536 |
| 147270 | CEFBS_None, // VCVTSS2SI64rr = 7537 |
| 147271 | CEFBS_None, // VCVTSS2SI64rr_Int = 7538 |
| 147272 | CEFBS_None, // VCVTSS2SIZrm = 7539 |
| 147273 | CEFBS_None, // VCVTSS2SIZrm_Int = 7540 |
| 147274 | CEFBS_None, // VCVTSS2SIZrr = 7541 |
| 147275 | CEFBS_None, // VCVTSS2SIZrr_Int = 7542 |
| 147276 | CEFBS_None, // VCVTSS2SIZrrb_Int = 7543 |
| 147277 | CEFBS_None, // VCVTSS2SIrm = 7544 |
| 147278 | CEFBS_None, // VCVTSS2SIrm_Int = 7545 |
| 147279 | CEFBS_None, // VCVTSS2SIrr = 7546 |
| 147280 | CEFBS_None, // VCVTSS2SIrr_Int = 7547 |
| 147281 | CEFBS_None, // VCVTSS2USI64Zrm_Int = 7548 |
| 147282 | CEFBS_None, // VCVTSS2USI64Zrr_Int = 7549 |
| 147283 | CEFBS_None, // VCVTSS2USI64Zrrb_Int = 7550 |
| 147284 | CEFBS_None, // VCVTSS2USIZrm_Int = 7551 |
| 147285 | CEFBS_None, // VCVTSS2USIZrr_Int = 7552 |
| 147286 | CEFBS_None, // VCVTSS2USIZrrb_Int = 7553 |
| 147287 | CEFBS_None, // VCVTTBF162IBSZ128rm = 7554 |
| 147288 | CEFBS_None, // VCVTTBF162IBSZ128rmb = 7555 |
| 147289 | CEFBS_None, // VCVTTBF162IBSZ128rmbk = 7556 |
| 147290 | CEFBS_None, // VCVTTBF162IBSZ128rmbkz = 7557 |
| 147291 | CEFBS_None, // VCVTTBF162IBSZ128rmk = 7558 |
| 147292 | CEFBS_None, // VCVTTBF162IBSZ128rmkz = 7559 |
| 147293 | CEFBS_None, // VCVTTBF162IBSZ128rr = 7560 |
| 147294 | CEFBS_None, // VCVTTBF162IBSZ128rrk = 7561 |
| 147295 | CEFBS_None, // VCVTTBF162IBSZ128rrkz = 7562 |
| 147296 | CEFBS_None, // VCVTTBF162IBSZ256rm = 7563 |
| 147297 | CEFBS_None, // VCVTTBF162IBSZ256rmb = 7564 |
| 147298 | CEFBS_None, // VCVTTBF162IBSZ256rmbk = 7565 |
| 147299 | CEFBS_None, // VCVTTBF162IBSZ256rmbkz = 7566 |
| 147300 | CEFBS_None, // VCVTTBF162IBSZ256rmk = 7567 |
| 147301 | CEFBS_None, // VCVTTBF162IBSZ256rmkz = 7568 |
| 147302 | CEFBS_None, // VCVTTBF162IBSZ256rr = 7569 |
| 147303 | CEFBS_None, // VCVTTBF162IBSZ256rrk = 7570 |
| 147304 | CEFBS_None, // VCVTTBF162IBSZ256rrkz = 7571 |
| 147305 | CEFBS_None, // VCVTTBF162IBSZrm = 7572 |
| 147306 | CEFBS_None, // VCVTTBF162IBSZrmb = 7573 |
| 147307 | CEFBS_None, // VCVTTBF162IBSZrmbk = 7574 |
| 147308 | CEFBS_None, // VCVTTBF162IBSZrmbkz = 7575 |
| 147309 | CEFBS_None, // VCVTTBF162IBSZrmk = 7576 |
| 147310 | CEFBS_None, // VCVTTBF162IBSZrmkz = 7577 |
| 147311 | CEFBS_None, // VCVTTBF162IBSZrr = 7578 |
| 147312 | CEFBS_None, // VCVTTBF162IBSZrrk = 7579 |
| 147313 | CEFBS_None, // VCVTTBF162IBSZrrkz = 7580 |
| 147314 | CEFBS_None, // VCVTTBF162IUBSZ128rm = 7581 |
| 147315 | CEFBS_None, // VCVTTBF162IUBSZ128rmb = 7582 |
| 147316 | CEFBS_None, // VCVTTBF162IUBSZ128rmbk = 7583 |
| 147317 | CEFBS_None, // VCVTTBF162IUBSZ128rmbkz = 7584 |
| 147318 | CEFBS_None, // VCVTTBF162IUBSZ128rmk = 7585 |
| 147319 | CEFBS_None, // VCVTTBF162IUBSZ128rmkz = 7586 |
| 147320 | CEFBS_None, // VCVTTBF162IUBSZ128rr = 7587 |
| 147321 | CEFBS_None, // VCVTTBF162IUBSZ128rrk = 7588 |
| 147322 | CEFBS_None, // VCVTTBF162IUBSZ128rrkz = 7589 |
| 147323 | CEFBS_None, // VCVTTBF162IUBSZ256rm = 7590 |
| 147324 | CEFBS_None, // VCVTTBF162IUBSZ256rmb = 7591 |
| 147325 | CEFBS_None, // VCVTTBF162IUBSZ256rmbk = 7592 |
| 147326 | CEFBS_None, // VCVTTBF162IUBSZ256rmbkz = 7593 |
| 147327 | CEFBS_None, // VCVTTBF162IUBSZ256rmk = 7594 |
| 147328 | CEFBS_None, // VCVTTBF162IUBSZ256rmkz = 7595 |
| 147329 | CEFBS_None, // VCVTTBF162IUBSZ256rr = 7596 |
| 147330 | CEFBS_None, // VCVTTBF162IUBSZ256rrk = 7597 |
| 147331 | CEFBS_None, // VCVTTBF162IUBSZ256rrkz = 7598 |
| 147332 | CEFBS_None, // VCVTTBF162IUBSZrm = 7599 |
| 147333 | CEFBS_None, // VCVTTBF162IUBSZrmb = 7600 |
| 147334 | CEFBS_None, // VCVTTBF162IUBSZrmbk = 7601 |
| 147335 | CEFBS_None, // VCVTTBF162IUBSZrmbkz = 7602 |
| 147336 | CEFBS_None, // VCVTTBF162IUBSZrmk = 7603 |
| 147337 | CEFBS_None, // VCVTTBF162IUBSZrmkz = 7604 |
| 147338 | CEFBS_None, // VCVTTBF162IUBSZrr = 7605 |
| 147339 | CEFBS_None, // VCVTTBF162IUBSZrrk = 7606 |
| 147340 | CEFBS_None, // VCVTTBF162IUBSZrrkz = 7607 |
| 147341 | CEFBS_None, // VCVTTPD2DQSZ128rm = 7608 |
| 147342 | CEFBS_None, // VCVTTPD2DQSZ128rmb = 7609 |
| 147343 | CEFBS_None, // VCVTTPD2DQSZ128rmbk = 7610 |
| 147344 | CEFBS_None, // VCVTTPD2DQSZ128rmbkz = 7611 |
| 147345 | CEFBS_None, // VCVTTPD2DQSZ128rmk = 7612 |
| 147346 | CEFBS_None, // VCVTTPD2DQSZ128rmkz = 7613 |
| 147347 | CEFBS_None, // VCVTTPD2DQSZ128rr = 7614 |
| 147348 | CEFBS_None, // VCVTTPD2DQSZ128rrk = 7615 |
| 147349 | CEFBS_None, // VCVTTPD2DQSZ128rrkz = 7616 |
| 147350 | CEFBS_None, // VCVTTPD2DQSZ256rm = 7617 |
| 147351 | CEFBS_None, // VCVTTPD2DQSZ256rmb = 7618 |
| 147352 | CEFBS_None, // VCVTTPD2DQSZ256rmbk = 7619 |
| 147353 | CEFBS_None, // VCVTTPD2DQSZ256rmbkz = 7620 |
| 147354 | CEFBS_None, // VCVTTPD2DQSZ256rmk = 7621 |
| 147355 | CEFBS_None, // VCVTTPD2DQSZ256rmkz = 7622 |
| 147356 | CEFBS_None, // VCVTTPD2DQSZ256rr = 7623 |
| 147357 | CEFBS_None, // VCVTTPD2DQSZ256rrb = 7624 |
| 147358 | CEFBS_None, // VCVTTPD2DQSZ256rrbk = 7625 |
| 147359 | CEFBS_None, // VCVTTPD2DQSZ256rrbkz = 7626 |
| 147360 | CEFBS_None, // VCVTTPD2DQSZ256rrk = 7627 |
| 147361 | CEFBS_None, // VCVTTPD2DQSZ256rrkz = 7628 |
| 147362 | CEFBS_None, // VCVTTPD2DQSZrm = 7629 |
| 147363 | CEFBS_None, // VCVTTPD2DQSZrmb = 7630 |
| 147364 | CEFBS_None, // VCVTTPD2DQSZrmbk = 7631 |
| 147365 | CEFBS_None, // VCVTTPD2DQSZrmbkz = 7632 |
| 147366 | CEFBS_None, // VCVTTPD2DQSZrmk = 7633 |
| 147367 | CEFBS_None, // VCVTTPD2DQSZrmkz = 7634 |
| 147368 | CEFBS_None, // VCVTTPD2DQSZrr = 7635 |
| 147369 | CEFBS_None, // VCVTTPD2DQSZrrb = 7636 |
| 147370 | CEFBS_None, // VCVTTPD2DQSZrrbk = 7637 |
| 147371 | CEFBS_None, // VCVTTPD2DQSZrrbkz = 7638 |
| 147372 | CEFBS_None, // VCVTTPD2DQSZrrk = 7639 |
| 147373 | CEFBS_None, // VCVTTPD2DQSZrrkz = 7640 |
| 147374 | CEFBS_None, // VCVTTPD2DQYrm = 7641 |
| 147375 | CEFBS_None, // VCVTTPD2DQYrr = 7642 |
| 147376 | CEFBS_None, // VCVTTPD2DQZ128rm = 7643 |
| 147377 | CEFBS_None, // VCVTTPD2DQZ128rmb = 7644 |
| 147378 | CEFBS_None, // VCVTTPD2DQZ128rmbk = 7645 |
| 147379 | CEFBS_None, // VCVTTPD2DQZ128rmbkz = 7646 |
| 147380 | CEFBS_None, // VCVTTPD2DQZ128rmk = 7647 |
| 147381 | CEFBS_None, // VCVTTPD2DQZ128rmkz = 7648 |
| 147382 | CEFBS_None, // VCVTTPD2DQZ128rr = 7649 |
| 147383 | CEFBS_None, // VCVTTPD2DQZ128rrk = 7650 |
| 147384 | CEFBS_None, // VCVTTPD2DQZ128rrkz = 7651 |
| 147385 | CEFBS_None, // VCVTTPD2DQZ256rm = 7652 |
| 147386 | CEFBS_None, // VCVTTPD2DQZ256rmb = 7653 |
| 147387 | CEFBS_None, // VCVTTPD2DQZ256rmbk = 7654 |
| 147388 | CEFBS_None, // VCVTTPD2DQZ256rmbkz = 7655 |
| 147389 | CEFBS_None, // VCVTTPD2DQZ256rmk = 7656 |
| 147390 | CEFBS_None, // VCVTTPD2DQZ256rmkz = 7657 |
| 147391 | CEFBS_None, // VCVTTPD2DQZ256rr = 7658 |
| 147392 | CEFBS_None, // VCVTTPD2DQZ256rrk = 7659 |
| 147393 | CEFBS_None, // VCVTTPD2DQZ256rrkz = 7660 |
| 147394 | CEFBS_None, // VCVTTPD2DQZrm = 7661 |
| 147395 | CEFBS_None, // VCVTTPD2DQZrmb = 7662 |
| 147396 | CEFBS_None, // VCVTTPD2DQZrmbk = 7663 |
| 147397 | CEFBS_None, // VCVTTPD2DQZrmbkz = 7664 |
| 147398 | CEFBS_None, // VCVTTPD2DQZrmk = 7665 |
| 147399 | CEFBS_None, // VCVTTPD2DQZrmkz = 7666 |
| 147400 | CEFBS_None, // VCVTTPD2DQZrr = 7667 |
| 147401 | CEFBS_None, // VCVTTPD2DQZrrb = 7668 |
| 147402 | CEFBS_None, // VCVTTPD2DQZrrbk = 7669 |
| 147403 | CEFBS_None, // VCVTTPD2DQZrrbkz = 7670 |
| 147404 | CEFBS_None, // VCVTTPD2DQZrrk = 7671 |
| 147405 | CEFBS_None, // VCVTTPD2DQZrrkz = 7672 |
| 147406 | CEFBS_None, // VCVTTPD2DQrm = 7673 |
| 147407 | CEFBS_None, // VCVTTPD2DQrr = 7674 |
| 147408 | CEFBS_None, // VCVTTPD2QQSZ128rm = 7675 |
| 147409 | CEFBS_None, // VCVTTPD2QQSZ128rmb = 7676 |
| 147410 | CEFBS_None, // VCVTTPD2QQSZ128rmbk = 7677 |
| 147411 | CEFBS_None, // VCVTTPD2QQSZ128rmbkz = 7678 |
| 147412 | CEFBS_None, // VCVTTPD2QQSZ128rmk = 7679 |
| 147413 | CEFBS_None, // VCVTTPD2QQSZ128rmkz = 7680 |
| 147414 | CEFBS_None, // VCVTTPD2QQSZ128rr = 7681 |
| 147415 | CEFBS_None, // VCVTTPD2QQSZ128rrk = 7682 |
| 147416 | CEFBS_None, // VCVTTPD2QQSZ128rrkz = 7683 |
| 147417 | CEFBS_None, // VCVTTPD2QQSZ256rm = 7684 |
| 147418 | CEFBS_None, // VCVTTPD2QQSZ256rmb = 7685 |
| 147419 | CEFBS_None, // VCVTTPD2QQSZ256rmbk = 7686 |
| 147420 | CEFBS_None, // VCVTTPD2QQSZ256rmbkz = 7687 |
| 147421 | CEFBS_None, // VCVTTPD2QQSZ256rmk = 7688 |
| 147422 | CEFBS_None, // VCVTTPD2QQSZ256rmkz = 7689 |
| 147423 | CEFBS_None, // VCVTTPD2QQSZ256rr = 7690 |
| 147424 | CEFBS_None, // VCVTTPD2QQSZ256rrb = 7691 |
| 147425 | CEFBS_None, // VCVTTPD2QQSZ256rrbk = 7692 |
| 147426 | CEFBS_None, // VCVTTPD2QQSZ256rrbkz = 7693 |
| 147427 | CEFBS_None, // VCVTTPD2QQSZ256rrk = 7694 |
| 147428 | CEFBS_None, // VCVTTPD2QQSZ256rrkz = 7695 |
| 147429 | CEFBS_None, // VCVTTPD2QQSZrm = 7696 |
| 147430 | CEFBS_None, // VCVTTPD2QQSZrmb = 7697 |
| 147431 | CEFBS_None, // VCVTTPD2QQSZrmbk = 7698 |
| 147432 | CEFBS_None, // VCVTTPD2QQSZrmbkz = 7699 |
| 147433 | CEFBS_None, // VCVTTPD2QQSZrmk = 7700 |
| 147434 | CEFBS_None, // VCVTTPD2QQSZrmkz = 7701 |
| 147435 | CEFBS_None, // VCVTTPD2QQSZrr = 7702 |
| 147436 | CEFBS_None, // VCVTTPD2QQSZrrb = 7703 |
| 147437 | CEFBS_None, // VCVTTPD2QQSZrrbk = 7704 |
| 147438 | CEFBS_None, // VCVTTPD2QQSZrrbkz = 7705 |
| 147439 | CEFBS_None, // VCVTTPD2QQSZrrk = 7706 |
| 147440 | CEFBS_None, // VCVTTPD2QQSZrrkz = 7707 |
| 147441 | CEFBS_None, // VCVTTPD2QQZ128rm = 7708 |
| 147442 | CEFBS_None, // VCVTTPD2QQZ128rmb = 7709 |
| 147443 | CEFBS_None, // VCVTTPD2QQZ128rmbk = 7710 |
| 147444 | CEFBS_None, // VCVTTPD2QQZ128rmbkz = 7711 |
| 147445 | CEFBS_None, // VCVTTPD2QQZ128rmk = 7712 |
| 147446 | CEFBS_None, // VCVTTPD2QQZ128rmkz = 7713 |
| 147447 | CEFBS_None, // VCVTTPD2QQZ128rr = 7714 |
| 147448 | CEFBS_None, // VCVTTPD2QQZ128rrk = 7715 |
| 147449 | CEFBS_None, // VCVTTPD2QQZ128rrkz = 7716 |
| 147450 | CEFBS_None, // VCVTTPD2QQZ256rm = 7717 |
| 147451 | CEFBS_None, // VCVTTPD2QQZ256rmb = 7718 |
| 147452 | CEFBS_None, // VCVTTPD2QQZ256rmbk = 7719 |
| 147453 | CEFBS_None, // VCVTTPD2QQZ256rmbkz = 7720 |
| 147454 | CEFBS_None, // VCVTTPD2QQZ256rmk = 7721 |
| 147455 | CEFBS_None, // VCVTTPD2QQZ256rmkz = 7722 |
| 147456 | CEFBS_None, // VCVTTPD2QQZ256rr = 7723 |
| 147457 | CEFBS_None, // VCVTTPD2QQZ256rrk = 7724 |
| 147458 | CEFBS_None, // VCVTTPD2QQZ256rrkz = 7725 |
| 147459 | CEFBS_None, // VCVTTPD2QQZrm = 7726 |
| 147460 | CEFBS_None, // VCVTTPD2QQZrmb = 7727 |
| 147461 | CEFBS_None, // VCVTTPD2QQZrmbk = 7728 |
| 147462 | CEFBS_None, // VCVTTPD2QQZrmbkz = 7729 |
| 147463 | CEFBS_None, // VCVTTPD2QQZrmk = 7730 |
| 147464 | CEFBS_None, // VCVTTPD2QQZrmkz = 7731 |
| 147465 | CEFBS_None, // VCVTTPD2QQZrr = 7732 |
| 147466 | CEFBS_None, // VCVTTPD2QQZrrb = 7733 |
| 147467 | CEFBS_None, // VCVTTPD2QQZrrbk = 7734 |
| 147468 | CEFBS_None, // VCVTTPD2QQZrrbkz = 7735 |
| 147469 | CEFBS_None, // VCVTTPD2QQZrrk = 7736 |
| 147470 | CEFBS_None, // VCVTTPD2QQZrrkz = 7737 |
| 147471 | CEFBS_None, // VCVTTPD2UDQSZ128rm = 7738 |
| 147472 | CEFBS_None, // VCVTTPD2UDQSZ128rmb = 7739 |
| 147473 | CEFBS_None, // VCVTTPD2UDQSZ128rmbk = 7740 |
| 147474 | CEFBS_None, // VCVTTPD2UDQSZ128rmbkz = 7741 |
| 147475 | CEFBS_None, // VCVTTPD2UDQSZ128rmk = 7742 |
| 147476 | CEFBS_None, // VCVTTPD2UDQSZ128rmkz = 7743 |
| 147477 | CEFBS_None, // VCVTTPD2UDQSZ128rr = 7744 |
| 147478 | CEFBS_None, // VCVTTPD2UDQSZ128rrk = 7745 |
| 147479 | CEFBS_None, // VCVTTPD2UDQSZ128rrkz = 7746 |
| 147480 | CEFBS_None, // VCVTTPD2UDQSZ256rm = 7747 |
| 147481 | CEFBS_None, // VCVTTPD2UDQSZ256rmb = 7748 |
| 147482 | CEFBS_None, // VCVTTPD2UDQSZ256rmbk = 7749 |
| 147483 | CEFBS_None, // VCVTTPD2UDQSZ256rmbkz = 7750 |
| 147484 | CEFBS_None, // VCVTTPD2UDQSZ256rmk = 7751 |
| 147485 | CEFBS_None, // VCVTTPD2UDQSZ256rmkz = 7752 |
| 147486 | CEFBS_None, // VCVTTPD2UDQSZ256rr = 7753 |
| 147487 | CEFBS_None, // VCVTTPD2UDQSZ256rrb = 7754 |
| 147488 | CEFBS_None, // VCVTTPD2UDQSZ256rrbk = 7755 |
| 147489 | CEFBS_None, // VCVTTPD2UDQSZ256rrbkz = 7756 |
| 147490 | CEFBS_None, // VCVTTPD2UDQSZ256rrk = 7757 |
| 147491 | CEFBS_None, // VCVTTPD2UDQSZ256rrkz = 7758 |
| 147492 | CEFBS_None, // VCVTTPD2UDQSZrm = 7759 |
| 147493 | CEFBS_None, // VCVTTPD2UDQSZrmb = 7760 |
| 147494 | CEFBS_None, // VCVTTPD2UDQSZrmbk = 7761 |
| 147495 | CEFBS_None, // VCVTTPD2UDQSZrmbkz = 7762 |
| 147496 | CEFBS_None, // VCVTTPD2UDQSZrmk = 7763 |
| 147497 | CEFBS_None, // VCVTTPD2UDQSZrmkz = 7764 |
| 147498 | CEFBS_None, // VCVTTPD2UDQSZrr = 7765 |
| 147499 | CEFBS_None, // VCVTTPD2UDQSZrrb = 7766 |
| 147500 | CEFBS_None, // VCVTTPD2UDQSZrrbk = 7767 |
| 147501 | CEFBS_None, // VCVTTPD2UDQSZrrbkz = 7768 |
| 147502 | CEFBS_None, // VCVTTPD2UDQSZrrk = 7769 |
| 147503 | CEFBS_None, // VCVTTPD2UDQSZrrkz = 7770 |
| 147504 | CEFBS_None, // VCVTTPD2UDQZ128rm = 7771 |
| 147505 | CEFBS_None, // VCVTTPD2UDQZ128rmb = 7772 |
| 147506 | CEFBS_None, // VCVTTPD2UDQZ128rmbk = 7773 |
| 147507 | CEFBS_None, // VCVTTPD2UDQZ128rmbkz = 7774 |
| 147508 | CEFBS_None, // VCVTTPD2UDQZ128rmk = 7775 |
| 147509 | CEFBS_None, // VCVTTPD2UDQZ128rmkz = 7776 |
| 147510 | CEFBS_None, // VCVTTPD2UDQZ128rr = 7777 |
| 147511 | CEFBS_None, // VCVTTPD2UDQZ128rrk = 7778 |
| 147512 | CEFBS_None, // VCVTTPD2UDQZ128rrkz = 7779 |
| 147513 | CEFBS_None, // VCVTTPD2UDQZ256rm = 7780 |
| 147514 | CEFBS_None, // VCVTTPD2UDQZ256rmb = 7781 |
| 147515 | CEFBS_None, // VCVTTPD2UDQZ256rmbk = 7782 |
| 147516 | CEFBS_None, // VCVTTPD2UDQZ256rmbkz = 7783 |
| 147517 | CEFBS_None, // VCVTTPD2UDQZ256rmk = 7784 |
| 147518 | CEFBS_None, // VCVTTPD2UDQZ256rmkz = 7785 |
| 147519 | CEFBS_None, // VCVTTPD2UDQZ256rr = 7786 |
| 147520 | CEFBS_None, // VCVTTPD2UDQZ256rrk = 7787 |
| 147521 | CEFBS_None, // VCVTTPD2UDQZ256rrkz = 7788 |
| 147522 | CEFBS_None, // VCVTTPD2UDQZrm = 7789 |
| 147523 | CEFBS_None, // VCVTTPD2UDQZrmb = 7790 |
| 147524 | CEFBS_None, // VCVTTPD2UDQZrmbk = 7791 |
| 147525 | CEFBS_None, // VCVTTPD2UDQZrmbkz = 7792 |
| 147526 | CEFBS_None, // VCVTTPD2UDQZrmk = 7793 |
| 147527 | CEFBS_None, // VCVTTPD2UDQZrmkz = 7794 |
| 147528 | CEFBS_None, // VCVTTPD2UDQZrr = 7795 |
| 147529 | CEFBS_None, // VCVTTPD2UDQZrrb = 7796 |
| 147530 | CEFBS_None, // VCVTTPD2UDQZrrbk = 7797 |
| 147531 | CEFBS_None, // VCVTTPD2UDQZrrbkz = 7798 |
| 147532 | CEFBS_None, // VCVTTPD2UDQZrrk = 7799 |
| 147533 | CEFBS_None, // VCVTTPD2UDQZrrkz = 7800 |
| 147534 | CEFBS_None, // VCVTTPD2UQQSZ128rm = 7801 |
| 147535 | CEFBS_None, // VCVTTPD2UQQSZ128rmb = 7802 |
| 147536 | CEFBS_None, // VCVTTPD2UQQSZ128rmbk = 7803 |
| 147537 | CEFBS_None, // VCVTTPD2UQQSZ128rmbkz = 7804 |
| 147538 | CEFBS_None, // VCVTTPD2UQQSZ128rmk = 7805 |
| 147539 | CEFBS_None, // VCVTTPD2UQQSZ128rmkz = 7806 |
| 147540 | CEFBS_None, // VCVTTPD2UQQSZ128rr = 7807 |
| 147541 | CEFBS_None, // VCVTTPD2UQQSZ128rrk = 7808 |
| 147542 | CEFBS_None, // VCVTTPD2UQQSZ128rrkz = 7809 |
| 147543 | CEFBS_None, // VCVTTPD2UQQSZ256rm = 7810 |
| 147544 | CEFBS_None, // VCVTTPD2UQQSZ256rmb = 7811 |
| 147545 | CEFBS_None, // VCVTTPD2UQQSZ256rmbk = 7812 |
| 147546 | CEFBS_None, // VCVTTPD2UQQSZ256rmbkz = 7813 |
| 147547 | CEFBS_None, // VCVTTPD2UQQSZ256rmk = 7814 |
| 147548 | CEFBS_None, // VCVTTPD2UQQSZ256rmkz = 7815 |
| 147549 | CEFBS_None, // VCVTTPD2UQQSZ256rr = 7816 |
| 147550 | CEFBS_None, // VCVTTPD2UQQSZ256rrb = 7817 |
| 147551 | CEFBS_None, // VCVTTPD2UQQSZ256rrbk = 7818 |
| 147552 | CEFBS_None, // VCVTTPD2UQQSZ256rrbkz = 7819 |
| 147553 | CEFBS_None, // VCVTTPD2UQQSZ256rrk = 7820 |
| 147554 | CEFBS_None, // VCVTTPD2UQQSZ256rrkz = 7821 |
| 147555 | CEFBS_None, // VCVTTPD2UQQSZrm = 7822 |
| 147556 | CEFBS_None, // VCVTTPD2UQQSZrmb = 7823 |
| 147557 | CEFBS_None, // VCVTTPD2UQQSZrmbk = 7824 |
| 147558 | CEFBS_None, // VCVTTPD2UQQSZrmbkz = 7825 |
| 147559 | CEFBS_None, // VCVTTPD2UQQSZrmk = 7826 |
| 147560 | CEFBS_None, // VCVTTPD2UQQSZrmkz = 7827 |
| 147561 | CEFBS_None, // VCVTTPD2UQQSZrr = 7828 |
| 147562 | CEFBS_None, // VCVTTPD2UQQSZrrb = 7829 |
| 147563 | CEFBS_None, // VCVTTPD2UQQSZrrbk = 7830 |
| 147564 | CEFBS_None, // VCVTTPD2UQQSZrrbkz = 7831 |
| 147565 | CEFBS_None, // VCVTTPD2UQQSZrrk = 7832 |
| 147566 | CEFBS_None, // VCVTTPD2UQQSZrrkz = 7833 |
| 147567 | CEFBS_None, // VCVTTPD2UQQZ128rm = 7834 |
| 147568 | CEFBS_None, // VCVTTPD2UQQZ128rmb = 7835 |
| 147569 | CEFBS_None, // VCVTTPD2UQQZ128rmbk = 7836 |
| 147570 | CEFBS_None, // VCVTTPD2UQQZ128rmbkz = 7837 |
| 147571 | CEFBS_None, // VCVTTPD2UQQZ128rmk = 7838 |
| 147572 | CEFBS_None, // VCVTTPD2UQQZ128rmkz = 7839 |
| 147573 | CEFBS_None, // VCVTTPD2UQQZ128rr = 7840 |
| 147574 | CEFBS_None, // VCVTTPD2UQQZ128rrk = 7841 |
| 147575 | CEFBS_None, // VCVTTPD2UQQZ128rrkz = 7842 |
| 147576 | CEFBS_None, // VCVTTPD2UQQZ256rm = 7843 |
| 147577 | CEFBS_None, // VCVTTPD2UQQZ256rmb = 7844 |
| 147578 | CEFBS_None, // VCVTTPD2UQQZ256rmbk = 7845 |
| 147579 | CEFBS_None, // VCVTTPD2UQQZ256rmbkz = 7846 |
| 147580 | CEFBS_None, // VCVTTPD2UQQZ256rmk = 7847 |
| 147581 | CEFBS_None, // VCVTTPD2UQQZ256rmkz = 7848 |
| 147582 | CEFBS_None, // VCVTTPD2UQQZ256rr = 7849 |
| 147583 | CEFBS_None, // VCVTTPD2UQQZ256rrk = 7850 |
| 147584 | CEFBS_None, // VCVTTPD2UQQZ256rrkz = 7851 |
| 147585 | CEFBS_None, // VCVTTPD2UQQZrm = 7852 |
| 147586 | CEFBS_None, // VCVTTPD2UQQZrmb = 7853 |
| 147587 | CEFBS_None, // VCVTTPD2UQQZrmbk = 7854 |
| 147588 | CEFBS_None, // VCVTTPD2UQQZrmbkz = 7855 |
| 147589 | CEFBS_None, // VCVTTPD2UQQZrmk = 7856 |
| 147590 | CEFBS_None, // VCVTTPD2UQQZrmkz = 7857 |
| 147591 | CEFBS_None, // VCVTTPD2UQQZrr = 7858 |
| 147592 | CEFBS_None, // VCVTTPD2UQQZrrb = 7859 |
| 147593 | CEFBS_None, // VCVTTPD2UQQZrrbk = 7860 |
| 147594 | CEFBS_None, // VCVTTPD2UQQZrrbkz = 7861 |
| 147595 | CEFBS_None, // VCVTTPD2UQQZrrk = 7862 |
| 147596 | CEFBS_None, // VCVTTPD2UQQZrrkz = 7863 |
| 147597 | CEFBS_None, // VCVTTPH2DQZ128rm = 7864 |
| 147598 | CEFBS_None, // VCVTTPH2DQZ128rmb = 7865 |
| 147599 | CEFBS_None, // VCVTTPH2DQZ128rmbk = 7866 |
| 147600 | CEFBS_None, // VCVTTPH2DQZ128rmbkz = 7867 |
| 147601 | CEFBS_None, // VCVTTPH2DQZ128rmk = 7868 |
| 147602 | CEFBS_None, // VCVTTPH2DQZ128rmkz = 7869 |
| 147603 | CEFBS_None, // VCVTTPH2DQZ128rr = 7870 |
| 147604 | CEFBS_None, // VCVTTPH2DQZ128rrk = 7871 |
| 147605 | CEFBS_None, // VCVTTPH2DQZ128rrkz = 7872 |
| 147606 | CEFBS_None, // VCVTTPH2DQZ256rm = 7873 |
| 147607 | CEFBS_None, // VCVTTPH2DQZ256rmb = 7874 |
| 147608 | CEFBS_None, // VCVTTPH2DQZ256rmbk = 7875 |
| 147609 | CEFBS_None, // VCVTTPH2DQZ256rmbkz = 7876 |
| 147610 | CEFBS_None, // VCVTTPH2DQZ256rmk = 7877 |
| 147611 | CEFBS_None, // VCVTTPH2DQZ256rmkz = 7878 |
| 147612 | CEFBS_None, // VCVTTPH2DQZ256rr = 7879 |
| 147613 | CEFBS_None, // VCVTTPH2DQZ256rrk = 7880 |
| 147614 | CEFBS_None, // VCVTTPH2DQZ256rrkz = 7881 |
| 147615 | CEFBS_None, // VCVTTPH2DQZrm = 7882 |
| 147616 | CEFBS_None, // VCVTTPH2DQZrmb = 7883 |
| 147617 | CEFBS_None, // VCVTTPH2DQZrmbk = 7884 |
| 147618 | CEFBS_None, // VCVTTPH2DQZrmbkz = 7885 |
| 147619 | CEFBS_None, // VCVTTPH2DQZrmk = 7886 |
| 147620 | CEFBS_None, // VCVTTPH2DQZrmkz = 7887 |
| 147621 | CEFBS_None, // VCVTTPH2DQZrr = 7888 |
| 147622 | CEFBS_None, // VCVTTPH2DQZrrb = 7889 |
| 147623 | CEFBS_None, // VCVTTPH2DQZrrbk = 7890 |
| 147624 | CEFBS_None, // VCVTTPH2DQZrrbkz = 7891 |
| 147625 | CEFBS_None, // VCVTTPH2DQZrrk = 7892 |
| 147626 | CEFBS_None, // VCVTTPH2DQZrrkz = 7893 |
| 147627 | CEFBS_None, // VCVTTPH2IBSZ128rm = 7894 |
| 147628 | CEFBS_None, // VCVTTPH2IBSZ128rmb = 7895 |
| 147629 | CEFBS_None, // VCVTTPH2IBSZ128rmbk = 7896 |
| 147630 | CEFBS_None, // VCVTTPH2IBSZ128rmbkz = 7897 |
| 147631 | CEFBS_None, // VCVTTPH2IBSZ128rmk = 7898 |
| 147632 | CEFBS_None, // VCVTTPH2IBSZ128rmkz = 7899 |
| 147633 | CEFBS_None, // VCVTTPH2IBSZ128rr = 7900 |
| 147634 | CEFBS_None, // VCVTTPH2IBSZ128rrk = 7901 |
| 147635 | CEFBS_None, // VCVTTPH2IBSZ128rrkz = 7902 |
| 147636 | CEFBS_None, // VCVTTPH2IBSZ256rm = 7903 |
| 147637 | CEFBS_None, // VCVTTPH2IBSZ256rmb = 7904 |
| 147638 | CEFBS_None, // VCVTTPH2IBSZ256rmbk = 7905 |
| 147639 | CEFBS_None, // VCVTTPH2IBSZ256rmbkz = 7906 |
| 147640 | CEFBS_None, // VCVTTPH2IBSZ256rmk = 7907 |
| 147641 | CEFBS_None, // VCVTTPH2IBSZ256rmkz = 7908 |
| 147642 | CEFBS_None, // VCVTTPH2IBSZ256rr = 7909 |
| 147643 | CEFBS_None, // VCVTTPH2IBSZ256rrk = 7910 |
| 147644 | CEFBS_None, // VCVTTPH2IBSZ256rrkz = 7911 |
| 147645 | CEFBS_None, // VCVTTPH2IBSZrm = 7912 |
| 147646 | CEFBS_None, // VCVTTPH2IBSZrmb = 7913 |
| 147647 | CEFBS_None, // VCVTTPH2IBSZrmbk = 7914 |
| 147648 | CEFBS_None, // VCVTTPH2IBSZrmbkz = 7915 |
| 147649 | CEFBS_None, // VCVTTPH2IBSZrmk = 7916 |
| 147650 | CEFBS_None, // VCVTTPH2IBSZrmkz = 7917 |
| 147651 | CEFBS_None, // VCVTTPH2IBSZrr = 7918 |
| 147652 | CEFBS_None, // VCVTTPH2IBSZrrb = 7919 |
| 147653 | CEFBS_None, // VCVTTPH2IBSZrrbk = 7920 |
| 147654 | CEFBS_None, // VCVTTPH2IBSZrrbkz = 7921 |
| 147655 | CEFBS_None, // VCVTTPH2IBSZrrk = 7922 |
| 147656 | CEFBS_None, // VCVTTPH2IBSZrrkz = 7923 |
| 147657 | CEFBS_None, // VCVTTPH2IUBSZ128rm = 7924 |
| 147658 | CEFBS_None, // VCVTTPH2IUBSZ128rmb = 7925 |
| 147659 | CEFBS_None, // VCVTTPH2IUBSZ128rmbk = 7926 |
| 147660 | CEFBS_None, // VCVTTPH2IUBSZ128rmbkz = 7927 |
| 147661 | CEFBS_None, // VCVTTPH2IUBSZ128rmk = 7928 |
| 147662 | CEFBS_None, // VCVTTPH2IUBSZ128rmkz = 7929 |
| 147663 | CEFBS_None, // VCVTTPH2IUBSZ128rr = 7930 |
| 147664 | CEFBS_None, // VCVTTPH2IUBSZ128rrk = 7931 |
| 147665 | CEFBS_None, // VCVTTPH2IUBSZ128rrkz = 7932 |
| 147666 | CEFBS_None, // VCVTTPH2IUBSZ256rm = 7933 |
| 147667 | CEFBS_None, // VCVTTPH2IUBSZ256rmb = 7934 |
| 147668 | CEFBS_None, // VCVTTPH2IUBSZ256rmbk = 7935 |
| 147669 | CEFBS_None, // VCVTTPH2IUBSZ256rmbkz = 7936 |
| 147670 | CEFBS_None, // VCVTTPH2IUBSZ256rmk = 7937 |
| 147671 | CEFBS_None, // VCVTTPH2IUBSZ256rmkz = 7938 |
| 147672 | CEFBS_None, // VCVTTPH2IUBSZ256rr = 7939 |
| 147673 | CEFBS_None, // VCVTTPH2IUBSZ256rrk = 7940 |
| 147674 | CEFBS_None, // VCVTTPH2IUBSZ256rrkz = 7941 |
| 147675 | CEFBS_None, // VCVTTPH2IUBSZrm = 7942 |
| 147676 | CEFBS_None, // VCVTTPH2IUBSZrmb = 7943 |
| 147677 | CEFBS_None, // VCVTTPH2IUBSZrmbk = 7944 |
| 147678 | CEFBS_None, // VCVTTPH2IUBSZrmbkz = 7945 |
| 147679 | CEFBS_None, // VCVTTPH2IUBSZrmk = 7946 |
| 147680 | CEFBS_None, // VCVTTPH2IUBSZrmkz = 7947 |
| 147681 | CEFBS_None, // VCVTTPH2IUBSZrr = 7948 |
| 147682 | CEFBS_None, // VCVTTPH2IUBSZrrb = 7949 |
| 147683 | CEFBS_None, // VCVTTPH2IUBSZrrbk = 7950 |
| 147684 | CEFBS_None, // VCVTTPH2IUBSZrrbkz = 7951 |
| 147685 | CEFBS_None, // VCVTTPH2IUBSZrrk = 7952 |
| 147686 | CEFBS_None, // VCVTTPH2IUBSZrrkz = 7953 |
| 147687 | CEFBS_None, // VCVTTPH2QQZ128rm = 7954 |
| 147688 | CEFBS_None, // VCVTTPH2QQZ128rmb = 7955 |
| 147689 | CEFBS_None, // VCVTTPH2QQZ128rmbk = 7956 |
| 147690 | CEFBS_None, // VCVTTPH2QQZ128rmbkz = 7957 |
| 147691 | CEFBS_None, // VCVTTPH2QQZ128rmk = 7958 |
| 147692 | CEFBS_None, // VCVTTPH2QQZ128rmkz = 7959 |
| 147693 | CEFBS_None, // VCVTTPH2QQZ128rr = 7960 |
| 147694 | CEFBS_None, // VCVTTPH2QQZ128rrk = 7961 |
| 147695 | CEFBS_None, // VCVTTPH2QQZ128rrkz = 7962 |
| 147696 | CEFBS_None, // VCVTTPH2QQZ256rm = 7963 |
| 147697 | CEFBS_None, // VCVTTPH2QQZ256rmb = 7964 |
| 147698 | CEFBS_None, // VCVTTPH2QQZ256rmbk = 7965 |
| 147699 | CEFBS_None, // VCVTTPH2QQZ256rmbkz = 7966 |
| 147700 | CEFBS_None, // VCVTTPH2QQZ256rmk = 7967 |
| 147701 | CEFBS_None, // VCVTTPH2QQZ256rmkz = 7968 |
| 147702 | CEFBS_None, // VCVTTPH2QQZ256rr = 7969 |
| 147703 | CEFBS_None, // VCVTTPH2QQZ256rrk = 7970 |
| 147704 | CEFBS_None, // VCVTTPH2QQZ256rrkz = 7971 |
| 147705 | CEFBS_None, // VCVTTPH2QQZrm = 7972 |
| 147706 | CEFBS_None, // VCVTTPH2QQZrmb = 7973 |
| 147707 | CEFBS_None, // VCVTTPH2QQZrmbk = 7974 |
| 147708 | CEFBS_None, // VCVTTPH2QQZrmbkz = 7975 |
| 147709 | CEFBS_None, // VCVTTPH2QQZrmk = 7976 |
| 147710 | CEFBS_None, // VCVTTPH2QQZrmkz = 7977 |
| 147711 | CEFBS_None, // VCVTTPH2QQZrr = 7978 |
| 147712 | CEFBS_None, // VCVTTPH2QQZrrb = 7979 |
| 147713 | CEFBS_None, // VCVTTPH2QQZrrbk = 7980 |
| 147714 | CEFBS_None, // VCVTTPH2QQZrrbkz = 7981 |
| 147715 | CEFBS_None, // VCVTTPH2QQZrrk = 7982 |
| 147716 | CEFBS_None, // VCVTTPH2QQZrrkz = 7983 |
| 147717 | CEFBS_None, // VCVTTPH2UDQZ128rm = 7984 |
| 147718 | CEFBS_None, // VCVTTPH2UDQZ128rmb = 7985 |
| 147719 | CEFBS_None, // VCVTTPH2UDQZ128rmbk = 7986 |
| 147720 | CEFBS_None, // VCVTTPH2UDQZ128rmbkz = 7987 |
| 147721 | CEFBS_None, // VCVTTPH2UDQZ128rmk = 7988 |
| 147722 | CEFBS_None, // VCVTTPH2UDQZ128rmkz = 7989 |
| 147723 | CEFBS_None, // VCVTTPH2UDQZ128rr = 7990 |
| 147724 | CEFBS_None, // VCVTTPH2UDQZ128rrk = 7991 |
| 147725 | CEFBS_None, // VCVTTPH2UDQZ128rrkz = 7992 |
| 147726 | CEFBS_None, // VCVTTPH2UDQZ256rm = 7993 |
| 147727 | CEFBS_None, // VCVTTPH2UDQZ256rmb = 7994 |
| 147728 | CEFBS_None, // VCVTTPH2UDQZ256rmbk = 7995 |
| 147729 | CEFBS_None, // VCVTTPH2UDQZ256rmbkz = 7996 |
| 147730 | CEFBS_None, // VCVTTPH2UDQZ256rmk = 7997 |
| 147731 | CEFBS_None, // VCVTTPH2UDQZ256rmkz = 7998 |
| 147732 | CEFBS_None, // VCVTTPH2UDQZ256rr = 7999 |
| 147733 | CEFBS_None, // VCVTTPH2UDQZ256rrk = 8000 |
| 147734 | CEFBS_None, // VCVTTPH2UDQZ256rrkz = 8001 |
| 147735 | CEFBS_None, // VCVTTPH2UDQZrm = 8002 |
| 147736 | CEFBS_None, // VCVTTPH2UDQZrmb = 8003 |
| 147737 | CEFBS_None, // VCVTTPH2UDQZrmbk = 8004 |
| 147738 | CEFBS_None, // VCVTTPH2UDQZrmbkz = 8005 |
| 147739 | CEFBS_None, // VCVTTPH2UDQZrmk = 8006 |
| 147740 | CEFBS_None, // VCVTTPH2UDQZrmkz = 8007 |
| 147741 | CEFBS_None, // VCVTTPH2UDQZrr = 8008 |
| 147742 | CEFBS_None, // VCVTTPH2UDQZrrb = 8009 |
| 147743 | CEFBS_None, // VCVTTPH2UDQZrrbk = 8010 |
| 147744 | CEFBS_None, // VCVTTPH2UDQZrrbkz = 8011 |
| 147745 | CEFBS_None, // VCVTTPH2UDQZrrk = 8012 |
| 147746 | CEFBS_None, // VCVTTPH2UDQZrrkz = 8013 |
| 147747 | CEFBS_None, // VCVTTPH2UQQZ128rm = 8014 |
| 147748 | CEFBS_None, // VCVTTPH2UQQZ128rmb = 8015 |
| 147749 | CEFBS_None, // VCVTTPH2UQQZ128rmbk = 8016 |
| 147750 | CEFBS_None, // VCVTTPH2UQQZ128rmbkz = 8017 |
| 147751 | CEFBS_None, // VCVTTPH2UQQZ128rmk = 8018 |
| 147752 | CEFBS_None, // VCVTTPH2UQQZ128rmkz = 8019 |
| 147753 | CEFBS_None, // VCVTTPH2UQQZ128rr = 8020 |
| 147754 | CEFBS_None, // VCVTTPH2UQQZ128rrk = 8021 |
| 147755 | CEFBS_None, // VCVTTPH2UQQZ128rrkz = 8022 |
| 147756 | CEFBS_None, // VCVTTPH2UQQZ256rm = 8023 |
| 147757 | CEFBS_None, // VCVTTPH2UQQZ256rmb = 8024 |
| 147758 | CEFBS_None, // VCVTTPH2UQQZ256rmbk = 8025 |
| 147759 | CEFBS_None, // VCVTTPH2UQQZ256rmbkz = 8026 |
| 147760 | CEFBS_None, // VCVTTPH2UQQZ256rmk = 8027 |
| 147761 | CEFBS_None, // VCVTTPH2UQQZ256rmkz = 8028 |
| 147762 | CEFBS_None, // VCVTTPH2UQQZ256rr = 8029 |
| 147763 | CEFBS_None, // VCVTTPH2UQQZ256rrk = 8030 |
| 147764 | CEFBS_None, // VCVTTPH2UQQZ256rrkz = 8031 |
| 147765 | CEFBS_None, // VCVTTPH2UQQZrm = 8032 |
| 147766 | CEFBS_None, // VCVTTPH2UQQZrmb = 8033 |
| 147767 | CEFBS_None, // VCVTTPH2UQQZrmbk = 8034 |
| 147768 | CEFBS_None, // VCVTTPH2UQQZrmbkz = 8035 |
| 147769 | CEFBS_None, // VCVTTPH2UQQZrmk = 8036 |
| 147770 | CEFBS_None, // VCVTTPH2UQQZrmkz = 8037 |
| 147771 | CEFBS_None, // VCVTTPH2UQQZrr = 8038 |
| 147772 | CEFBS_None, // VCVTTPH2UQQZrrb = 8039 |
| 147773 | CEFBS_None, // VCVTTPH2UQQZrrbk = 8040 |
| 147774 | CEFBS_None, // VCVTTPH2UQQZrrbkz = 8041 |
| 147775 | CEFBS_None, // VCVTTPH2UQQZrrk = 8042 |
| 147776 | CEFBS_None, // VCVTTPH2UQQZrrkz = 8043 |
| 147777 | CEFBS_None, // VCVTTPH2UWZ128rm = 8044 |
| 147778 | CEFBS_None, // VCVTTPH2UWZ128rmb = 8045 |
| 147779 | CEFBS_None, // VCVTTPH2UWZ128rmbk = 8046 |
| 147780 | CEFBS_None, // VCVTTPH2UWZ128rmbkz = 8047 |
| 147781 | CEFBS_None, // VCVTTPH2UWZ128rmk = 8048 |
| 147782 | CEFBS_None, // VCVTTPH2UWZ128rmkz = 8049 |
| 147783 | CEFBS_None, // VCVTTPH2UWZ128rr = 8050 |
| 147784 | CEFBS_None, // VCVTTPH2UWZ128rrk = 8051 |
| 147785 | CEFBS_None, // VCVTTPH2UWZ128rrkz = 8052 |
| 147786 | CEFBS_None, // VCVTTPH2UWZ256rm = 8053 |
| 147787 | CEFBS_None, // VCVTTPH2UWZ256rmb = 8054 |
| 147788 | CEFBS_None, // VCVTTPH2UWZ256rmbk = 8055 |
| 147789 | CEFBS_None, // VCVTTPH2UWZ256rmbkz = 8056 |
| 147790 | CEFBS_None, // VCVTTPH2UWZ256rmk = 8057 |
| 147791 | CEFBS_None, // VCVTTPH2UWZ256rmkz = 8058 |
| 147792 | CEFBS_None, // VCVTTPH2UWZ256rr = 8059 |
| 147793 | CEFBS_None, // VCVTTPH2UWZ256rrk = 8060 |
| 147794 | CEFBS_None, // VCVTTPH2UWZ256rrkz = 8061 |
| 147795 | CEFBS_None, // VCVTTPH2UWZrm = 8062 |
| 147796 | CEFBS_None, // VCVTTPH2UWZrmb = 8063 |
| 147797 | CEFBS_None, // VCVTTPH2UWZrmbk = 8064 |
| 147798 | CEFBS_None, // VCVTTPH2UWZrmbkz = 8065 |
| 147799 | CEFBS_None, // VCVTTPH2UWZrmk = 8066 |
| 147800 | CEFBS_None, // VCVTTPH2UWZrmkz = 8067 |
| 147801 | CEFBS_None, // VCVTTPH2UWZrr = 8068 |
| 147802 | CEFBS_None, // VCVTTPH2UWZrrb = 8069 |
| 147803 | CEFBS_None, // VCVTTPH2UWZrrbk = 8070 |
| 147804 | CEFBS_None, // VCVTTPH2UWZrrbkz = 8071 |
| 147805 | CEFBS_None, // VCVTTPH2UWZrrk = 8072 |
| 147806 | CEFBS_None, // VCVTTPH2UWZrrkz = 8073 |
| 147807 | CEFBS_None, // VCVTTPH2WZ128rm = 8074 |
| 147808 | CEFBS_None, // VCVTTPH2WZ128rmb = 8075 |
| 147809 | CEFBS_None, // VCVTTPH2WZ128rmbk = 8076 |
| 147810 | CEFBS_None, // VCVTTPH2WZ128rmbkz = 8077 |
| 147811 | CEFBS_None, // VCVTTPH2WZ128rmk = 8078 |
| 147812 | CEFBS_None, // VCVTTPH2WZ128rmkz = 8079 |
| 147813 | CEFBS_None, // VCVTTPH2WZ128rr = 8080 |
| 147814 | CEFBS_None, // VCVTTPH2WZ128rrk = 8081 |
| 147815 | CEFBS_None, // VCVTTPH2WZ128rrkz = 8082 |
| 147816 | CEFBS_None, // VCVTTPH2WZ256rm = 8083 |
| 147817 | CEFBS_None, // VCVTTPH2WZ256rmb = 8084 |
| 147818 | CEFBS_None, // VCVTTPH2WZ256rmbk = 8085 |
| 147819 | CEFBS_None, // VCVTTPH2WZ256rmbkz = 8086 |
| 147820 | CEFBS_None, // VCVTTPH2WZ256rmk = 8087 |
| 147821 | CEFBS_None, // VCVTTPH2WZ256rmkz = 8088 |
| 147822 | CEFBS_None, // VCVTTPH2WZ256rr = 8089 |
| 147823 | CEFBS_None, // VCVTTPH2WZ256rrk = 8090 |
| 147824 | CEFBS_None, // VCVTTPH2WZ256rrkz = 8091 |
| 147825 | CEFBS_None, // VCVTTPH2WZrm = 8092 |
| 147826 | CEFBS_None, // VCVTTPH2WZrmb = 8093 |
| 147827 | CEFBS_None, // VCVTTPH2WZrmbk = 8094 |
| 147828 | CEFBS_None, // VCVTTPH2WZrmbkz = 8095 |
| 147829 | CEFBS_None, // VCVTTPH2WZrmk = 8096 |
| 147830 | CEFBS_None, // VCVTTPH2WZrmkz = 8097 |
| 147831 | CEFBS_None, // VCVTTPH2WZrr = 8098 |
| 147832 | CEFBS_None, // VCVTTPH2WZrrb = 8099 |
| 147833 | CEFBS_None, // VCVTTPH2WZrrbk = 8100 |
| 147834 | CEFBS_None, // VCVTTPH2WZrrbkz = 8101 |
| 147835 | CEFBS_None, // VCVTTPH2WZrrk = 8102 |
| 147836 | CEFBS_None, // VCVTTPH2WZrrkz = 8103 |
| 147837 | CEFBS_None, // VCVTTPS2DQSZ128rm = 8104 |
| 147838 | CEFBS_None, // VCVTTPS2DQSZ128rmb = 8105 |
| 147839 | CEFBS_None, // VCVTTPS2DQSZ128rmbk = 8106 |
| 147840 | CEFBS_None, // VCVTTPS2DQSZ128rmbkz = 8107 |
| 147841 | CEFBS_None, // VCVTTPS2DQSZ128rmk = 8108 |
| 147842 | CEFBS_None, // VCVTTPS2DQSZ128rmkz = 8109 |
| 147843 | CEFBS_None, // VCVTTPS2DQSZ128rr = 8110 |
| 147844 | CEFBS_None, // VCVTTPS2DQSZ128rrk = 8111 |
| 147845 | CEFBS_None, // VCVTTPS2DQSZ128rrkz = 8112 |
| 147846 | CEFBS_None, // VCVTTPS2DQSZ256rm = 8113 |
| 147847 | CEFBS_None, // VCVTTPS2DQSZ256rmb = 8114 |
| 147848 | CEFBS_None, // VCVTTPS2DQSZ256rmbk = 8115 |
| 147849 | CEFBS_None, // VCVTTPS2DQSZ256rmbkz = 8116 |
| 147850 | CEFBS_None, // VCVTTPS2DQSZ256rmk = 8117 |
| 147851 | CEFBS_None, // VCVTTPS2DQSZ256rmkz = 8118 |
| 147852 | CEFBS_None, // VCVTTPS2DQSZ256rr = 8119 |
| 147853 | CEFBS_None, // VCVTTPS2DQSZ256rrk = 8120 |
| 147854 | CEFBS_None, // VCVTTPS2DQSZ256rrkz = 8121 |
| 147855 | CEFBS_None, // VCVTTPS2DQSZrm = 8122 |
| 147856 | CEFBS_None, // VCVTTPS2DQSZrmb = 8123 |
| 147857 | CEFBS_None, // VCVTTPS2DQSZrmbk = 8124 |
| 147858 | CEFBS_None, // VCVTTPS2DQSZrmbkz = 8125 |
| 147859 | CEFBS_None, // VCVTTPS2DQSZrmk = 8126 |
| 147860 | CEFBS_None, // VCVTTPS2DQSZrmkz = 8127 |
| 147861 | CEFBS_None, // VCVTTPS2DQSZrr = 8128 |
| 147862 | CEFBS_None, // VCVTTPS2DQSZrrb = 8129 |
| 147863 | CEFBS_None, // VCVTTPS2DQSZrrbk = 8130 |
| 147864 | CEFBS_None, // VCVTTPS2DQSZrrbkz = 8131 |
| 147865 | CEFBS_None, // VCVTTPS2DQSZrrk = 8132 |
| 147866 | CEFBS_None, // VCVTTPS2DQSZrrkz = 8133 |
| 147867 | CEFBS_None, // VCVTTPS2DQYrm = 8134 |
| 147868 | CEFBS_None, // VCVTTPS2DQYrr = 8135 |
| 147869 | CEFBS_None, // VCVTTPS2DQZ128rm = 8136 |
| 147870 | CEFBS_None, // VCVTTPS2DQZ128rmb = 8137 |
| 147871 | CEFBS_None, // VCVTTPS2DQZ128rmbk = 8138 |
| 147872 | CEFBS_None, // VCVTTPS2DQZ128rmbkz = 8139 |
| 147873 | CEFBS_None, // VCVTTPS2DQZ128rmk = 8140 |
| 147874 | CEFBS_None, // VCVTTPS2DQZ128rmkz = 8141 |
| 147875 | CEFBS_None, // VCVTTPS2DQZ128rr = 8142 |
| 147876 | CEFBS_None, // VCVTTPS2DQZ128rrk = 8143 |
| 147877 | CEFBS_None, // VCVTTPS2DQZ128rrkz = 8144 |
| 147878 | CEFBS_None, // VCVTTPS2DQZ256rm = 8145 |
| 147879 | CEFBS_None, // VCVTTPS2DQZ256rmb = 8146 |
| 147880 | CEFBS_None, // VCVTTPS2DQZ256rmbk = 8147 |
| 147881 | CEFBS_None, // VCVTTPS2DQZ256rmbkz = 8148 |
| 147882 | CEFBS_None, // VCVTTPS2DQZ256rmk = 8149 |
| 147883 | CEFBS_None, // VCVTTPS2DQZ256rmkz = 8150 |
| 147884 | CEFBS_None, // VCVTTPS2DQZ256rr = 8151 |
| 147885 | CEFBS_None, // VCVTTPS2DQZ256rrk = 8152 |
| 147886 | CEFBS_None, // VCVTTPS2DQZ256rrkz = 8153 |
| 147887 | CEFBS_None, // VCVTTPS2DQZrm = 8154 |
| 147888 | CEFBS_None, // VCVTTPS2DQZrmb = 8155 |
| 147889 | CEFBS_None, // VCVTTPS2DQZrmbk = 8156 |
| 147890 | CEFBS_None, // VCVTTPS2DQZrmbkz = 8157 |
| 147891 | CEFBS_None, // VCVTTPS2DQZrmk = 8158 |
| 147892 | CEFBS_None, // VCVTTPS2DQZrmkz = 8159 |
| 147893 | CEFBS_None, // VCVTTPS2DQZrr = 8160 |
| 147894 | CEFBS_None, // VCVTTPS2DQZrrb = 8161 |
| 147895 | CEFBS_None, // VCVTTPS2DQZrrbk = 8162 |
| 147896 | CEFBS_None, // VCVTTPS2DQZrrbkz = 8163 |
| 147897 | CEFBS_None, // VCVTTPS2DQZrrk = 8164 |
| 147898 | CEFBS_None, // VCVTTPS2DQZrrkz = 8165 |
| 147899 | CEFBS_None, // VCVTTPS2DQrm = 8166 |
| 147900 | CEFBS_None, // VCVTTPS2DQrr = 8167 |
| 147901 | CEFBS_None, // VCVTTPS2IBSZ128rm = 8168 |
| 147902 | CEFBS_None, // VCVTTPS2IBSZ128rmb = 8169 |
| 147903 | CEFBS_None, // VCVTTPS2IBSZ128rmbk = 8170 |
| 147904 | CEFBS_None, // VCVTTPS2IBSZ128rmbkz = 8171 |
| 147905 | CEFBS_None, // VCVTTPS2IBSZ128rmk = 8172 |
| 147906 | CEFBS_None, // VCVTTPS2IBSZ128rmkz = 8173 |
| 147907 | CEFBS_None, // VCVTTPS2IBSZ128rr = 8174 |
| 147908 | CEFBS_None, // VCVTTPS2IBSZ128rrk = 8175 |
| 147909 | CEFBS_None, // VCVTTPS2IBSZ128rrkz = 8176 |
| 147910 | CEFBS_None, // VCVTTPS2IBSZ256rm = 8177 |
| 147911 | CEFBS_None, // VCVTTPS2IBSZ256rmb = 8178 |
| 147912 | CEFBS_None, // VCVTTPS2IBSZ256rmbk = 8179 |
| 147913 | CEFBS_None, // VCVTTPS2IBSZ256rmbkz = 8180 |
| 147914 | CEFBS_None, // VCVTTPS2IBSZ256rmk = 8181 |
| 147915 | CEFBS_None, // VCVTTPS2IBSZ256rmkz = 8182 |
| 147916 | CEFBS_None, // VCVTTPS2IBSZ256rr = 8183 |
| 147917 | CEFBS_None, // VCVTTPS2IBSZ256rrk = 8184 |
| 147918 | CEFBS_None, // VCVTTPS2IBSZ256rrkz = 8185 |
| 147919 | CEFBS_None, // VCVTTPS2IBSZrm = 8186 |
| 147920 | CEFBS_None, // VCVTTPS2IBSZrmb = 8187 |
| 147921 | CEFBS_None, // VCVTTPS2IBSZrmbk = 8188 |
| 147922 | CEFBS_None, // VCVTTPS2IBSZrmbkz = 8189 |
| 147923 | CEFBS_None, // VCVTTPS2IBSZrmk = 8190 |
| 147924 | CEFBS_None, // VCVTTPS2IBSZrmkz = 8191 |
| 147925 | CEFBS_None, // VCVTTPS2IBSZrr = 8192 |
| 147926 | CEFBS_None, // VCVTTPS2IBSZrrb = 8193 |
| 147927 | CEFBS_None, // VCVTTPS2IBSZrrbk = 8194 |
| 147928 | CEFBS_None, // VCVTTPS2IBSZrrbkz = 8195 |
| 147929 | CEFBS_None, // VCVTTPS2IBSZrrk = 8196 |
| 147930 | CEFBS_None, // VCVTTPS2IBSZrrkz = 8197 |
| 147931 | CEFBS_None, // VCVTTPS2IUBSZ128rm = 8198 |
| 147932 | CEFBS_None, // VCVTTPS2IUBSZ128rmb = 8199 |
| 147933 | CEFBS_None, // VCVTTPS2IUBSZ128rmbk = 8200 |
| 147934 | CEFBS_None, // VCVTTPS2IUBSZ128rmbkz = 8201 |
| 147935 | CEFBS_None, // VCVTTPS2IUBSZ128rmk = 8202 |
| 147936 | CEFBS_None, // VCVTTPS2IUBSZ128rmkz = 8203 |
| 147937 | CEFBS_None, // VCVTTPS2IUBSZ128rr = 8204 |
| 147938 | CEFBS_None, // VCVTTPS2IUBSZ128rrk = 8205 |
| 147939 | CEFBS_None, // VCVTTPS2IUBSZ128rrkz = 8206 |
| 147940 | CEFBS_None, // VCVTTPS2IUBSZ256rm = 8207 |
| 147941 | CEFBS_None, // VCVTTPS2IUBSZ256rmb = 8208 |
| 147942 | CEFBS_None, // VCVTTPS2IUBSZ256rmbk = 8209 |
| 147943 | CEFBS_None, // VCVTTPS2IUBSZ256rmbkz = 8210 |
| 147944 | CEFBS_None, // VCVTTPS2IUBSZ256rmk = 8211 |
| 147945 | CEFBS_None, // VCVTTPS2IUBSZ256rmkz = 8212 |
| 147946 | CEFBS_None, // VCVTTPS2IUBSZ256rr = 8213 |
| 147947 | CEFBS_None, // VCVTTPS2IUBSZ256rrk = 8214 |
| 147948 | CEFBS_None, // VCVTTPS2IUBSZ256rrkz = 8215 |
| 147949 | CEFBS_None, // VCVTTPS2IUBSZrm = 8216 |
| 147950 | CEFBS_None, // VCVTTPS2IUBSZrmb = 8217 |
| 147951 | CEFBS_None, // VCVTTPS2IUBSZrmbk = 8218 |
| 147952 | CEFBS_None, // VCVTTPS2IUBSZrmbkz = 8219 |
| 147953 | CEFBS_None, // VCVTTPS2IUBSZrmk = 8220 |
| 147954 | CEFBS_None, // VCVTTPS2IUBSZrmkz = 8221 |
| 147955 | CEFBS_None, // VCVTTPS2IUBSZrr = 8222 |
| 147956 | CEFBS_None, // VCVTTPS2IUBSZrrb = 8223 |
| 147957 | CEFBS_None, // VCVTTPS2IUBSZrrbk = 8224 |
| 147958 | CEFBS_None, // VCVTTPS2IUBSZrrbkz = 8225 |
| 147959 | CEFBS_None, // VCVTTPS2IUBSZrrk = 8226 |
| 147960 | CEFBS_None, // VCVTTPS2IUBSZrrkz = 8227 |
| 147961 | CEFBS_None, // VCVTTPS2QQSZ128rm = 8228 |
| 147962 | CEFBS_None, // VCVTTPS2QQSZ128rmb = 8229 |
| 147963 | CEFBS_None, // VCVTTPS2QQSZ128rmbk = 8230 |
| 147964 | CEFBS_None, // VCVTTPS2QQSZ128rmbkz = 8231 |
| 147965 | CEFBS_None, // VCVTTPS2QQSZ128rmk = 8232 |
| 147966 | CEFBS_None, // VCVTTPS2QQSZ128rmkz = 8233 |
| 147967 | CEFBS_None, // VCVTTPS2QQSZ128rr = 8234 |
| 147968 | CEFBS_None, // VCVTTPS2QQSZ128rrk = 8235 |
| 147969 | CEFBS_None, // VCVTTPS2QQSZ128rrkz = 8236 |
| 147970 | CEFBS_None, // VCVTTPS2QQSZ256rm = 8237 |
| 147971 | CEFBS_None, // VCVTTPS2QQSZ256rmb = 8238 |
| 147972 | CEFBS_None, // VCVTTPS2QQSZ256rmbk = 8239 |
| 147973 | CEFBS_None, // VCVTTPS2QQSZ256rmbkz = 8240 |
| 147974 | CEFBS_None, // VCVTTPS2QQSZ256rmk = 8241 |
| 147975 | CEFBS_None, // VCVTTPS2QQSZ256rmkz = 8242 |
| 147976 | CEFBS_None, // VCVTTPS2QQSZ256rr = 8243 |
| 147977 | CEFBS_None, // VCVTTPS2QQSZ256rrb = 8244 |
| 147978 | CEFBS_None, // VCVTTPS2QQSZ256rrbk = 8245 |
| 147979 | CEFBS_None, // VCVTTPS2QQSZ256rrbkz = 8246 |
| 147980 | CEFBS_None, // VCVTTPS2QQSZ256rrk = 8247 |
| 147981 | CEFBS_None, // VCVTTPS2QQSZ256rrkz = 8248 |
| 147982 | CEFBS_None, // VCVTTPS2QQSZrm = 8249 |
| 147983 | CEFBS_None, // VCVTTPS2QQSZrmb = 8250 |
| 147984 | CEFBS_None, // VCVTTPS2QQSZrmbk = 8251 |
| 147985 | CEFBS_None, // VCVTTPS2QQSZrmbkz = 8252 |
| 147986 | CEFBS_None, // VCVTTPS2QQSZrmk = 8253 |
| 147987 | CEFBS_None, // VCVTTPS2QQSZrmkz = 8254 |
| 147988 | CEFBS_None, // VCVTTPS2QQSZrr = 8255 |
| 147989 | CEFBS_None, // VCVTTPS2QQSZrrb = 8256 |
| 147990 | CEFBS_None, // VCVTTPS2QQSZrrbk = 8257 |
| 147991 | CEFBS_None, // VCVTTPS2QQSZrrbkz = 8258 |
| 147992 | CEFBS_None, // VCVTTPS2QQSZrrk = 8259 |
| 147993 | CEFBS_None, // VCVTTPS2QQSZrrkz = 8260 |
| 147994 | CEFBS_None, // VCVTTPS2QQZ128rm = 8261 |
| 147995 | CEFBS_None, // VCVTTPS2QQZ128rmb = 8262 |
| 147996 | CEFBS_None, // VCVTTPS2QQZ128rmbk = 8263 |
| 147997 | CEFBS_None, // VCVTTPS2QQZ128rmbkz = 8264 |
| 147998 | CEFBS_None, // VCVTTPS2QQZ128rmk = 8265 |
| 147999 | CEFBS_None, // VCVTTPS2QQZ128rmkz = 8266 |
| 148000 | CEFBS_None, // VCVTTPS2QQZ128rr = 8267 |
| 148001 | CEFBS_None, // VCVTTPS2QQZ128rrk = 8268 |
| 148002 | CEFBS_None, // VCVTTPS2QQZ128rrkz = 8269 |
| 148003 | CEFBS_None, // VCVTTPS2QQZ256rm = 8270 |
| 148004 | CEFBS_None, // VCVTTPS2QQZ256rmb = 8271 |
| 148005 | CEFBS_None, // VCVTTPS2QQZ256rmbk = 8272 |
| 148006 | CEFBS_None, // VCVTTPS2QQZ256rmbkz = 8273 |
| 148007 | CEFBS_None, // VCVTTPS2QQZ256rmk = 8274 |
| 148008 | CEFBS_None, // VCVTTPS2QQZ256rmkz = 8275 |
| 148009 | CEFBS_None, // VCVTTPS2QQZ256rr = 8276 |
| 148010 | CEFBS_None, // VCVTTPS2QQZ256rrk = 8277 |
| 148011 | CEFBS_None, // VCVTTPS2QQZ256rrkz = 8278 |
| 148012 | CEFBS_None, // VCVTTPS2QQZrm = 8279 |
| 148013 | CEFBS_None, // VCVTTPS2QQZrmb = 8280 |
| 148014 | CEFBS_None, // VCVTTPS2QQZrmbk = 8281 |
| 148015 | CEFBS_None, // VCVTTPS2QQZrmbkz = 8282 |
| 148016 | CEFBS_None, // VCVTTPS2QQZrmk = 8283 |
| 148017 | CEFBS_None, // VCVTTPS2QQZrmkz = 8284 |
| 148018 | CEFBS_None, // VCVTTPS2QQZrr = 8285 |
| 148019 | CEFBS_None, // VCVTTPS2QQZrrb = 8286 |
| 148020 | CEFBS_None, // VCVTTPS2QQZrrbk = 8287 |
| 148021 | CEFBS_None, // VCVTTPS2QQZrrbkz = 8288 |
| 148022 | CEFBS_None, // VCVTTPS2QQZrrk = 8289 |
| 148023 | CEFBS_None, // VCVTTPS2QQZrrkz = 8290 |
| 148024 | CEFBS_None, // VCVTTPS2UDQSZ128rm = 8291 |
| 148025 | CEFBS_None, // VCVTTPS2UDQSZ128rmb = 8292 |
| 148026 | CEFBS_None, // VCVTTPS2UDQSZ128rmbk = 8293 |
| 148027 | CEFBS_None, // VCVTTPS2UDQSZ128rmbkz = 8294 |
| 148028 | CEFBS_None, // VCVTTPS2UDQSZ128rmk = 8295 |
| 148029 | CEFBS_None, // VCVTTPS2UDQSZ128rmkz = 8296 |
| 148030 | CEFBS_None, // VCVTTPS2UDQSZ128rr = 8297 |
| 148031 | CEFBS_None, // VCVTTPS2UDQSZ128rrk = 8298 |
| 148032 | CEFBS_None, // VCVTTPS2UDQSZ128rrkz = 8299 |
| 148033 | CEFBS_None, // VCVTTPS2UDQSZ256rm = 8300 |
| 148034 | CEFBS_None, // VCVTTPS2UDQSZ256rmb = 8301 |
| 148035 | CEFBS_None, // VCVTTPS2UDQSZ256rmbk = 8302 |
| 148036 | CEFBS_None, // VCVTTPS2UDQSZ256rmbkz = 8303 |
| 148037 | CEFBS_None, // VCVTTPS2UDQSZ256rmk = 8304 |
| 148038 | CEFBS_None, // VCVTTPS2UDQSZ256rmkz = 8305 |
| 148039 | CEFBS_None, // VCVTTPS2UDQSZ256rr = 8306 |
| 148040 | CEFBS_None, // VCVTTPS2UDQSZ256rrk = 8307 |
| 148041 | CEFBS_None, // VCVTTPS2UDQSZ256rrkz = 8308 |
| 148042 | CEFBS_None, // VCVTTPS2UDQSZrm = 8309 |
| 148043 | CEFBS_None, // VCVTTPS2UDQSZrmb = 8310 |
| 148044 | CEFBS_None, // VCVTTPS2UDQSZrmbk = 8311 |
| 148045 | CEFBS_None, // VCVTTPS2UDQSZrmbkz = 8312 |
| 148046 | CEFBS_None, // VCVTTPS2UDQSZrmk = 8313 |
| 148047 | CEFBS_None, // VCVTTPS2UDQSZrmkz = 8314 |
| 148048 | CEFBS_None, // VCVTTPS2UDQSZrr = 8315 |
| 148049 | CEFBS_None, // VCVTTPS2UDQSZrrb = 8316 |
| 148050 | CEFBS_None, // VCVTTPS2UDQSZrrbk = 8317 |
| 148051 | CEFBS_None, // VCVTTPS2UDQSZrrbkz = 8318 |
| 148052 | CEFBS_None, // VCVTTPS2UDQSZrrk = 8319 |
| 148053 | CEFBS_None, // VCVTTPS2UDQSZrrkz = 8320 |
| 148054 | CEFBS_None, // VCVTTPS2UDQZ128rm = 8321 |
| 148055 | CEFBS_None, // VCVTTPS2UDQZ128rmb = 8322 |
| 148056 | CEFBS_None, // VCVTTPS2UDQZ128rmbk = 8323 |
| 148057 | CEFBS_None, // VCVTTPS2UDQZ128rmbkz = 8324 |
| 148058 | CEFBS_None, // VCVTTPS2UDQZ128rmk = 8325 |
| 148059 | CEFBS_None, // VCVTTPS2UDQZ128rmkz = 8326 |
| 148060 | CEFBS_None, // VCVTTPS2UDQZ128rr = 8327 |
| 148061 | CEFBS_None, // VCVTTPS2UDQZ128rrk = 8328 |
| 148062 | CEFBS_None, // VCVTTPS2UDQZ128rrkz = 8329 |
| 148063 | CEFBS_None, // VCVTTPS2UDQZ256rm = 8330 |
| 148064 | CEFBS_None, // VCVTTPS2UDQZ256rmb = 8331 |
| 148065 | CEFBS_None, // VCVTTPS2UDQZ256rmbk = 8332 |
| 148066 | CEFBS_None, // VCVTTPS2UDQZ256rmbkz = 8333 |
| 148067 | CEFBS_None, // VCVTTPS2UDQZ256rmk = 8334 |
| 148068 | CEFBS_None, // VCVTTPS2UDQZ256rmkz = 8335 |
| 148069 | CEFBS_None, // VCVTTPS2UDQZ256rr = 8336 |
| 148070 | CEFBS_None, // VCVTTPS2UDQZ256rrk = 8337 |
| 148071 | CEFBS_None, // VCVTTPS2UDQZ256rrkz = 8338 |
| 148072 | CEFBS_None, // VCVTTPS2UDQZrm = 8339 |
| 148073 | CEFBS_None, // VCVTTPS2UDQZrmb = 8340 |
| 148074 | CEFBS_None, // VCVTTPS2UDQZrmbk = 8341 |
| 148075 | CEFBS_None, // VCVTTPS2UDQZrmbkz = 8342 |
| 148076 | CEFBS_None, // VCVTTPS2UDQZrmk = 8343 |
| 148077 | CEFBS_None, // VCVTTPS2UDQZrmkz = 8344 |
| 148078 | CEFBS_None, // VCVTTPS2UDQZrr = 8345 |
| 148079 | CEFBS_None, // VCVTTPS2UDQZrrb = 8346 |
| 148080 | CEFBS_None, // VCVTTPS2UDQZrrbk = 8347 |
| 148081 | CEFBS_None, // VCVTTPS2UDQZrrbkz = 8348 |
| 148082 | CEFBS_None, // VCVTTPS2UDQZrrk = 8349 |
| 148083 | CEFBS_None, // VCVTTPS2UDQZrrkz = 8350 |
| 148084 | CEFBS_None, // VCVTTPS2UQQSZ128rm = 8351 |
| 148085 | CEFBS_None, // VCVTTPS2UQQSZ128rmb = 8352 |
| 148086 | CEFBS_None, // VCVTTPS2UQQSZ128rmbk = 8353 |
| 148087 | CEFBS_None, // VCVTTPS2UQQSZ128rmbkz = 8354 |
| 148088 | CEFBS_None, // VCVTTPS2UQQSZ128rmk = 8355 |
| 148089 | CEFBS_None, // VCVTTPS2UQQSZ128rmkz = 8356 |
| 148090 | CEFBS_None, // VCVTTPS2UQQSZ128rr = 8357 |
| 148091 | CEFBS_None, // VCVTTPS2UQQSZ128rrk = 8358 |
| 148092 | CEFBS_None, // VCVTTPS2UQQSZ128rrkz = 8359 |
| 148093 | CEFBS_None, // VCVTTPS2UQQSZ256rm = 8360 |
| 148094 | CEFBS_None, // VCVTTPS2UQQSZ256rmb = 8361 |
| 148095 | CEFBS_None, // VCVTTPS2UQQSZ256rmbk = 8362 |
| 148096 | CEFBS_None, // VCVTTPS2UQQSZ256rmbkz = 8363 |
| 148097 | CEFBS_None, // VCVTTPS2UQQSZ256rmk = 8364 |
| 148098 | CEFBS_None, // VCVTTPS2UQQSZ256rmkz = 8365 |
| 148099 | CEFBS_None, // VCVTTPS2UQQSZ256rr = 8366 |
| 148100 | CEFBS_None, // VCVTTPS2UQQSZ256rrb = 8367 |
| 148101 | CEFBS_None, // VCVTTPS2UQQSZ256rrbk = 8368 |
| 148102 | CEFBS_None, // VCVTTPS2UQQSZ256rrbkz = 8369 |
| 148103 | CEFBS_None, // VCVTTPS2UQQSZ256rrk = 8370 |
| 148104 | CEFBS_None, // VCVTTPS2UQQSZ256rrkz = 8371 |
| 148105 | CEFBS_None, // VCVTTPS2UQQSZrm = 8372 |
| 148106 | CEFBS_None, // VCVTTPS2UQQSZrmb = 8373 |
| 148107 | CEFBS_None, // VCVTTPS2UQQSZrmbk = 8374 |
| 148108 | CEFBS_None, // VCVTTPS2UQQSZrmbkz = 8375 |
| 148109 | CEFBS_None, // VCVTTPS2UQQSZrmk = 8376 |
| 148110 | CEFBS_None, // VCVTTPS2UQQSZrmkz = 8377 |
| 148111 | CEFBS_None, // VCVTTPS2UQQSZrr = 8378 |
| 148112 | CEFBS_None, // VCVTTPS2UQQSZrrb = 8379 |
| 148113 | CEFBS_None, // VCVTTPS2UQQSZrrbk = 8380 |
| 148114 | CEFBS_None, // VCVTTPS2UQQSZrrbkz = 8381 |
| 148115 | CEFBS_None, // VCVTTPS2UQQSZrrk = 8382 |
| 148116 | CEFBS_None, // VCVTTPS2UQQSZrrkz = 8383 |
| 148117 | CEFBS_None, // VCVTTPS2UQQZ128rm = 8384 |
| 148118 | CEFBS_None, // VCVTTPS2UQQZ128rmb = 8385 |
| 148119 | CEFBS_None, // VCVTTPS2UQQZ128rmbk = 8386 |
| 148120 | CEFBS_None, // VCVTTPS2UQQZ128rmbkz = 8387 |
| 148121 | CEFBS_None, // VCVTTPS2UQQZ128rmk = 8388 |
| 148122 | CEFBS_None, // VCVTTPS2UQQZ128rmkz = 8389 |
| 148123 | CEFBS_None, // VCVTTPS2UQQZ128rr = 8390 |
| 148124 | CEFBS_None, // VCVTTPS2UQQZ128rrk = 8391 |
| 148125 | CEFBS_None, // VCVTTPS2UQQZ128rrkz = 8392 |
| 148126 | CEFBS_None, // VCVTTPS2UQQZ256rm = 8393 |
| 148127 | CEFBS_None, // VCVTTPS2UQQZ256rmb = 8394 |
| 148128 | CEFBS_None, // VCVTTPS2UQQZ256rmbk = 8395 |
| 148129 | CEFBS_None, // VCVTTPS2UQQZ256rmbkz = 8396 |
| 148130 | CEFBS_None, // VCVTTPS2UQQZ256rmk = 8397 |
| 148131 | CEFBS_None, // VCVTTPS2UQQZ256rmkz = 8398 |
| 148132 | CEFBS_None, // VCVTTPS2UQQZ256rr = 8399 |
| 148133 | CEFBS_None, // VCVTTPS2UQQZ256rrk = 8400 |
| 148134 | CEFBS_None, // VCVTTPS2UQQZ256rrkz = 8401 |
| 148135 | CEFBS_None, // VCVTTPS2UQQZrm = 8402 |
| 148136 | CEFBS_None, // VCVTTPS2UQQZrmb = 8403 |
| 148137 | CEFBS_None, // VCVTTPS2UQQZrmbk = 8404 |
| 148138 | CEFBS_None, // VCVTTPS2UQQZrmbkz = 8405 |
| 148139 | CEFBS_None, // VCVTTPS2UQQZrmk = 8406 |
| 148140 | CEFBS_None, // VCVTTPS2UQQZrmkz = 8407 |
| 148141 | CEFBS_None, // VCVTTPS2UQQZrr = 8408 |
| 148142 | CEFBS_None, // VCVTTPS2UQQZrrb = 8409 |
| 148143 | CEFBS_None, // VCVTTPS2UQQZrrbk = 8410 |
| 148144 | CEFBS_None, // VCVTTPS2UQQZrrbkz = 8411 |
| 148145 | CEFBS_None, // VCVTTPS2UQQZrrk = 8412 |
| 148146 | CEFBS_None, // VCVTTPS2UQQZrrkz = 8413 |
| 148147 | CEFBS_None, // VCVTTSD2SI64Srm = 8414 |
| 148148 | CEFBS_None, // VCVTTSD2SI64Srm_Int = 8415 |
| 148149 | CEFBS_None, // VCVTTSD2SI64Srr = 8416 |
| 148150 | CEFBS_None, // VCVTTSD2SI64Srr_Int = 8417 |
| 148151 | CEFBS_None, // VCVTTSD2SI64Srrb_Int = 8418 |
| 148152 | CEFBS_None, // VCVTTSD2SI64Zrm = 8419 |
| 148153 | CEFBS_None, // VCVTTSD2SI64Zrm_Int = 8420 |
| 148154 | CEFBS_None, // VCVTTSD2SI64Zrr = 8421 |
| 148155 | CEFBS_None, // VCVTTSD2SI64Zrr_Int = 8422 |
| 148156 | CEFBS_None, // VCVTTSD2SI64Zrrb_Int = 8423 |
| 148157 | CEFBS_None, // VCVTTSD2SI64rm = 8424 |
| 148158 | CEFBS_None, // VCVTTSD2SI64rm_Int = 8425 |
| 148159 | CEFBS_None, // VCVTTSD2SI64rr = 8426 |
| 148160 | CEFBS_None, // VCVTTSD2SI64rr_Int = 8427 |
| 148161 | CEFBS_None, // VCVTTSD2SISrm = 8428 |
| 148162 | CEFBS_None, // VCVTTSD2SISrm_Int = 8429 |
| 148163 | CEFBS_None, // VCVTTSD2SISrr = 8430 |
| 148164 | CEFBS_None, // VCVTTSD2SISrr_Int = 8431 |
| 148165 | CEFBS_None, // VCVTTSD2SISrrb_Int = 8432 |
| 148166 | CEFBS_None, // VCVTTSD2SIZrm = 8433 |
| 148167 | CEFBS_None, // VCVTTSD2SIZrm_Int = 8434 |
| 148168 | CEFBS_None, // VCVTTSD2SIZrr = 8435 |
| 148169 | CEFBS_None, // VCVTTSD2SIZrr_Int = 8436 |
| 148170 | CEFBS_None, // VCVTTSD2SIZrrb_Int = 8437 |
| 148171 | CEFBS_None, // VCVTTSD2SIrm = 8438 |
| 148172 | CEFBS_None, // VCVTTSD2SIrm_Int = 8439 |
| 148173 | CEFBS_None, // VCVTTSD2SIrr = 8440 |
| 148174 | CEFBS_None, // VCVTTSD2SIrr_Int = 8441 |
| 148175 | CEFBS_None, // VCVTTSD2USI64Srm = 8442 |
| 148176 | CEFBS_None, // VCVTTSD2USI64Srm_Int = 8443 |
| 148177 | CEFBS_None, // VCVTTSD2USI64Srr = 8444 |
| 148178 | CEFBS_None, // VCVTTSD2USI64Srr_Int = 8445 |
| 148179 | CEFBS_None, // VCVTTSD2USI64Srrb_Int = 8446 |
| 148180 | CEFBS_None, // VCVTTSD2USI64Zrm = 8447 |
| 148181 | CEFBS_None, // VCVTTSD2USI64Zrm_Int = 8448 |
| 148182 | CEFBS_None, // VCVTTSD2USI64Zrr = 8449 |
| 148183 | CEFBS_None, // VCVTTSD2USI64Zrr_Int = 8450 |
| 148184 | CEFBS_None, // VCVTTSD2USI64Zrrb_Int = 8451 |
| 148185 | CEFBS_None, // VCVTTSD2USISrm = 8452 |
| 148186 | CEFBS_None, // VCVTTSD2USISrm_Int = 8453 |
| 148187 | CEFBS_None, // VCVTTSD2USISrr = 8454 |
| 148188 | CEFBS_None, // VCVTTSD2USISrr_Int = 8455 |
| 148189 | CEFBS_None, // VCVTTSD2USISrrb_Int = 8456 |
| 148190 | CEFBS_None, // VCVTTSD2USIZrm = 8457 |
| 148191 | CEFBS_None, // VCVTTSD2USIZrm_Int = 8458 |
| 148192 | CEFBS_None, // VCVTTSD2USIZrr = 8459 |
| 148193 | CEFBS_None, // VCVTTSD2USIZrr_Int = 8460 |
| 148194 | CEFBS_None, // VCVTTSD2USIZrrb_Int = 8461 |
| 148195 | CEFBS_None, // VCVTTSH2SI64Zrm = 8462 |
| 148196 | CEFBS_None, // VCVTTSH2SI64Zrm_Int = 8463 |
| 148197 | CEFBS_None, // VCVTTSH2SI64Zrr = 8464 |
| 148198 | CEFBS_None, // VCVTTSH2SI64Zrr_Int = 8465 |
| 148199 | CEFBS_None, // VCVTTSH2SI64Zrrb_Int = 8466 |
| 148200 | CEFBS_None, // VCVTTSH2SIZrm = 8467 |
| 148201 | CEFBS_None, // VCVTTSH2SIZrm_Int = 8468 |
| 148202 | CEFBS_None, // VCVTTSH2SIZrr = 8469 |
| 148203 | CEFBS_None, // VCVTTSH2SIZrr_Int = 8470 |
| 148204 | CEFBS_None, // VCVTTSH2SIZrrb_Int = 8471 |
| 148205 | CEFBS_None, // VCVTTSH2USI64Zrm = 8472 |
| 148206 | CEFBS_None, // VCVTTSH2USI64Zrm_Int = 8473 |
| 148207 | CEFBS_None, // VCVTTSH2USI64Zrr = 8474 |
| 148208 | CEFBS_None, // VCVTTSH2USI64Zrr_Int = 8475 |
| 148209 | CEFBS_None, // VCVTTSH2USI64Zrrb_Int = 8476 |
| 148210 | CEFBS_None, // VCVTTSH2USIZrm = 8477 |
| 148211 | CEFBS_None, // VCVTTSH2USIZrm_Int = 8478 |
| 148212 | CEFBS_None, // VCVTTSH2USIZrr = 8479 |
| 148213 | CEFBS_None, // VCVTTSH2USIZrr_Int = 8480 |
| 148214 | CEFBS_None, // VCVTTSH2USIZrrb_Int = 8481 |
| 148215 | CEFBS_None, // VCVTTSS2SI64Srm = 8482 |
| 148216 | CEFBS_None, // VCVTTSS2SI64Srm_Int = 8483 |
| 148217 | CEFBS_None, // VCVTTSS2SI64Srr = 8484 |
| 148218 | CEFBS_None, // VCVTTSS2SI64Srr_Int = 8485 |
| 148219 | CEFBS_None, // VCVTTSS2SI64Srrb_Int = 8486 |
| 148220 | CEFBS_None, // VCVTTSS2SI64Zrm = 8487 |
| 148221 | CEFBS_None, // VCVTTSS2SI64Zrm_Int = 8488 |
| 148222 | CEFBS_None, // VCVTTSS2SI64Zrr = 8489 |
| 148223 | CEFBS_None, // VCVTTSS2SI64Zrr_Int = 8490 |
| 148224 | CEFBS_None, // VCVTTSS2SI64Zrrb_Int = 8491 |
| 148225 | CEFBS_None, // VCVTTSS2SI64rm = 8492 |
| 148226 | CEFBS_None, // VCVTTSS2SI64rm_Int = 8493 |
| 148227 | CEFBS_None, // VCVTTSS2SI64rr = 8494 |
| 148228 | CEFBS_None, // VCVTTSS2SI64rr_Int = 8495 |
| 148229 | CEFBS_None, // VCVTTSS2SISrm = 8496 |
| 148230 | CEFBS_None, // VCVTTSS2SISrm_Int = 8497 |
| 148231 | CEFBS_None, // VCVTTSS2SISrr = 8498 |
| 148232 | CEFBS_None, // VCVTTSS2SISrr_Int = 8499 |
| 148233 | CEFBS_None, // VCVTTSS2SISrrb_Int = 8500 |
| 148234 | CEFBS_None, // VCVTTSS2SIZrm = 8501 |
| 148235 | CEFBS_None, // VCVTTSS2SIZrm_Int = 8502 |
| 148236 | CEFBS_None, // VCVTTSS2SIZrr = 8503 |
| 148237 | CEFBS_None, // VCVTTSS2SIZrr_Int = 8504 |
| 148238 | CEFBS_None, // VCVTTSS2SIZrrb_Int = 8505 |
| 148239 | CEFBS_None, // VCVTTSS2SIrm = 8506 |
| 148240 | CEFBS_None, // VCVTTSS2SIrm_Int = 8507 |
| 148241 | CEFBS_None, // VCVTTSS2SIrr = 8508 |
| 148242 | CEFBS_None, // VCVTTSS2SIrr_Int = 8509 |
| 148243 | CEFBS_None, // VCVTTSS2USI64Srm = 8510 |
| 148244 | CEFBS_None, // VCVTTSS2USI64Srm_Int = 8511 |
| 148245 | CEFBS_None, // VCVTTSS2USI64Srr = 8512 |
| 148246 | CEFBS_None, // VCVTTSS2USI64Srr_Int = 8513 |
| 148247 | CEFBS_None, // VCVTTSS2USI64Srrb_Int = 8514 |
| 148248 | CEFBS_None, // VCVTTSS2USI64Zrm = 8515 |
| 148249 | CEFBS_None, // VCVTTSS2USI64Zrm_Int = 8516 |
| 148250 | CEFBS_None, // VCVTTSS2USI64Zrr = 8517 |
| 148251 | CEFBS_None, // VCVTTSS2USI64Zrr_Int = 8518 |
| 148252 | CEFBS_None, // VCVTTSS2USI64Zrrb_Int = 8519 |
| 148253 | CEFBS_None, // VCVTTSS2USISrm = 8520 |
| 148254 | CEFBS_None, // VCVTTSS2USISrm_Int = 8521 |
| 148255 | CEFBS_None, // VCVTTSS2USISrr = 8522 |
| 148256 | CEFBS_None, // VCVTTSS2USISrr_Int = 8523 |
| 148257 | CEFBS_None, // VCVTTSS2USISrrb_Int = 8524 |
| 148258 | CEFBS_None, // VCVTTSS2USIZrm = 8525 |
| 148259 | CEFBS_None, // VCVTTSS2USIZrm_Int = 8526 |
| 148260 | CEFBS_None, // VCVTTSS2USIZrr = 8527 |
| 148261 | CEFBS_None, // VCVTTSS2USIZrr_Int = 8528 |
| 148262 | CEFBS_None, // VCVTTSS2USIZrrb_Int = 8529 |
| 148263 | CEFBS_None, // VCVTUDQ2PDZ128rm = 8530 |
| 148264 | CEFBS_None, // VCVTUDQ2PDZ128rmb = 8531 |
| 148265 | CEFBS_None, // VCVTUDQ2PDZ128rmbk = 8532 |
| 148266 | CEFBS_None, // VCVTUDQ2PDZ128rmbkz = 8533 |
| 148267 | CEFBS_None, // VCVTUDQ2PDZ128rmk = 8534 |
| 148268 | CEFBS_None, // VCVTUDQ2PDZ128rmkz = 8535 |
| 148269 | CEFBS_None, // VCVTUDQ2PDZ128rr = 8536 |
| 148270 | CEFBS_None, // VCVTUDQ2PDZ128rrk = 8537 |
| 148271 | CEFBS_None, // VCVTUDQ2PDZ128rrkz = 8538 |
| 148272 | CEFBS_None, // VCVTUDQ2PDZ256rm = 8539 |
| 148273 | CEFBS_None, // VCVTUDQ2PDZ256rmb = 8540 |
| 148274 | CEFBS_None, // VCVTUDQ2PDZ256rmbk = 8541 |
| 148275 | CEFBS_None, // VCVTUDQ2PDZ256rmbkz = 8542 |
| 148276 | CEFBS_None, // VCVTUDQ2PDZ256rmk = 8543 |
| 148277 | CEFBS_None, // VCVTUDQ2PDZ256rmkz = 8544 |
| 148278 | CEFBS_None, // VCVTUDQ2PDZ256rr = 8545 |
| 148279 | CEFBS_None, // VCVTUDQ2PDZ256rrk = 8546 |
| 148280 | CEFBS_None, // VCVTUDQ2PDZ256rrkz = 8547 |
| 148281 | CEFBS_None, // VCVTUDQ2PDZrm = 8548 |
| 148282 | CEFBS_None, // VCVTUDQ2PDZrmb = 8549 |
| 148283 | CEFBS_None, // VCVTUDQ2PDZrmbk = 8550 |
| 148284 | CEFBS_None, // VCVTUDQ2PDZrmbkz = 8551 |
| 148285 | CEFBS_None, // VCVTUDQ2PDZrmk = 8552 |
| 148286 | CEFBS_None, // VCVTUDQ2PDZrmkz = 8553 |
| 148287 | CEFBS_None, // VCVTUDQ2PDZrr = 8554 |
| 148288 | CEFBS_None, // VCVTUDQ2PDZrrk = 8555 |
| 148289 | CEFBS_None, // VCVTUDQ2PDZrrkz = 8556 |
| 148290 | CEFBS_None, // VCVTUDQ2PHZ128rm = 8557 |
| 148291 | CEFBS_None, // VCVTUDQ2PHZ128rmb = 8558 |
| 148292 | CEFBS_None, // VCVTUDQ2PHZ128rmbk = 8559 |
| 148293 | CEFBS_None, // VCVTUDQ2PHZ128rmbkz = 8560 |
| 148294 | CEFBS_None, // VCVTUDQ2PHZ128rmk = 8561 |
| 148295 | CEFBS_None, // VCVTUDQ2PHZ128rmkz = 8562 |
| 148296 | CEFBS_None, // VCVTUDQ2PHZ128rr = 8563 |
| 148297 | CEFBS_None, // VCVTUDQ2PHZ128rrk = 8564 |
| 148298 | CEFBS_None, // VCVTUDQ2PHZ128rrkz = 8565 |
| 148299 | CEFBS_None, // VCVTUDQ2PHZ256rm = 8566 |
| 148300 | CEFBS_None, // VCVTUDQ2PHZ256rmb = 8567 |
| 148301 | CEFBS_None, // VCVTUDQ2PHZ256rmbk = 8568 |
| 148302 | CEFBS_None, // VCVTUDQ2PHZ256rmbkz = 8569 |
| 148303 | CEFBS_None, // VCVTUDQ2PHZ256rmk = 8570 |
| 148304 | CEFBS_None, // VCVTUDQ2PHZ256rmkz = 8571 |
| 148305 | CEFBS_None, // VCVTUDQ2PHZ256rr = 8572 |
| 148306 | CEFBS_None, // VCVTUDQ2PHZ256rrk = 8573 |
| 148307 | CEFBS_None, // VCVTUDQ2PHZ256rrkz = 8574 |
| 148308 | CEFBS_None, // VCVTUDQ2PHZrm = 8575 |
| 148309 | CEFBS_None, // VCVTUDQ2PHZrmb = 8576 |
| 148310 | CEFBS_None, // VCVTUDQ2PHZrmbk = 8577 |
| 148311 | CEFBS_None, // VCVTUDQ2PHZrmbkz = 8578 |
| 148312 | CEFBS_None, // VCVTUDQ2PHZrmk = 8579 |
| 148313 | CEFBS_None, // VCVTUDQ2PHZrmkz = 8580 |
| 148314 | CEFBS_None, // VCVTUDQ2PHZrr = 8581 |
| 148315 | CEFBS_None, // VCVTUDQ2PHZrrb = 8582 |
| 148316 | CEFBS_None, // VCVTUDQ2PHZrrbk = 8583 |
| 148317 | CEFBS_None, // VCVTUDQ2PHZrrbkz = 8584 |
| 148318 | CEFBS_None, // VCVTUDQ2PHZrrk = 8585 |
| 148319 | CEFBS_None, // VCVTUDQ2PHZrrkz = 8586 |
| 148320 | CEFBS_None, // VCVTUDQ2PSZ128rm = 8587 |
| 148321 | CEFBS_None, // VCVTUDQ2PSZ128rmb = 8588 |
| 148322 | CEFBS_None, // VCVTUDQ2PSZ128rmbk = 8589 |
| 148323 | CEFBS_None, // VCVTUDQ2PSZ128rmbkz = 8590 |
| 148324 | CEFBS_None, // VCVTUDQ2PSZ128rmk = 8591 |
| 148325 | CEFBS_None, // VCVTUDQ2PSZ128rmkz = 8592 |
| 148326 | CEFBS_None, // VCVTUDQ2PSZ128rr = 8593 |
| 148327 | CEFBS_None, // VCVTUDQ2PSZ128rrk = 8594 |
| 148328 | CEFBS_None, // VCVTUDQ2PSZ128rrkz = 8595 |
| 148329 | CEFBS_None, // VCVTUDQ2PSZ256rm = 8596 |
| 148330 | CEFBS_None, // VCVTUDQ2PSZ256rmb = 8597 |
| 148331 | CEFBS_None, // VCVTUDQ2PSZ256rmbk = 8598 |
| 148332 | CEFBS_None, // VCVTUDQ2PSZ256rmbkz = 8599 |
| 148333 | CEFBS_None, // VCVTUDQ2PSZ256rmk = 8600 |
| 148334 | CEFBS_None, // VCVTUDQ2PSZ256rmkz = 8601 |
| 148335 | CEFBS_None, // VCVTUDQ2PSZ256rr = 8602 |
| 148336 | CEFBS_None, // VCVTUDQ2PSZ256rrk = 8603 |
| 148337 | CEFBS_None, // VCVTUDQ2PSZ256rrkz = 8604 |
| 148338 | CEFBS_None, // VCVTUDQ2PSZrm = 8605 |
| 148339 | CEFBS_None, // VCVTUDQ2PSZrmb = 8606 |
| 148340 | CEFBS_None, // VCVTUDQ2PSZrmbk = 8607 |
| 148341 | CEFBS_None, // VCVTUDQ2PSZrmbkz = 8608 |
| 148342 | CEFBS_None, // VCVTUDQ2PSZrmk = 8609 |
| 148343 | CEFBS_None, // VCVTUDQ2PSZrmkz = 8610 |
| 148344 | CEFBS_None, // VCVTUDQ2PSZrr = 8611 |
| 148345 | CEFBS_None, // VCVTUDQ2PSZrrb = 8612 |
| 148346 | CEFBS_None, // VCVTUDQ2PSZrrbk = 8613 |
| 148347 | CEFBS_None, // VCVTUDQ2PSZrrbkz = 8614 |
| 148348 | CEFBS_None, // VCVTUDQ2PSZrrk = 8615 |
| 148349 | CEFBS_None, // VCVTUDQ2PSZrrkz = 8616 |
| 148350 | CEFBS_None, // VCVTUQQ2PDZ128rm = 8617 |
| 148351 | CEFBS_None, // VCVTUQQ2PDZ128rmb = 8618 |
| 148352 | CEFBS_None, // VCVTUQQ2PDZ128rmbk = 8619 |
| 148353 | CEFBS_None, // VCVTUQQ2PDZ128rmbkz = 8620 |
| 148354 | CEFBS_None, // VCVTUQQ2PDZ128rmk = 8621 |
| 148355 | CEFBS_None, // VCVTUQQ2PDZ128rmkz = 8622 |
| 148356 | CEFBS_None, // VCVTUQQ2PDZ128rr = 8623 |
| 148357 | CEFBS_None, // VCVTUQQ2PDZ128rrk = 8624 |
| 148358 | CEFBS_None, // VCVTUQQ2PDZ128rrkz = 8625 |
| 148359 | CEFBS_None, // VCVTUQQ2PDZ256rm = 8626 |
| 148360 | CEFBS_None, // VCVTUQQ2PDZ256rmb = 8627 |
| 148361 | CEFBS_None, // VCVTUQQ2PDZ256rmbk = 8628 |
| 148362 | CEFBS_None, // VCVTUQQ2PDZ256rmbkz = 8629 |
| 148363 | CEFBS_None, // VCVTUQQ2PDZ256rmk = 8630 |
| 148364 | CEFBS_None, // VCVTUQQ2PDZ256rmkz = 8631 |
| 148365 | CEFBS_None, // VCVTUQQ2PDZ256rr = 8632 |
| 148366 | CEFBS_None, // VCVTUQQ2PDZ256rrk = 8633 |
| 148367 | CEFBS_None, // VCVTUQQ2PDZ256rrkz = 8634 |
| 148368 | CEFBS_None, // VCVTUQQ2PDZrm = 8635 |
| 148369 | CEFBS_None, // VCVTUQQ2PDZrmb = 8636 |
| 148370 | CEFBS_None, // VCVTUQQ2PDZrmbk = 8637 |
| 148371 | CEFBS_None, // VCVTUQQ2PDZrmbkz = 8638 |
| 148372 | CEFBS_None, // VCVTUQQ2PDZrmk = 8639 |
| 148373 | CEFBS_None, // VCVTUQQ2PDZrmkz = 8640 |
| 148374 | CEFBS_None, // VCVTUQQ2PDZrr = 8641 |
| 148375 | CEFBS_None, // VCVTUQQ2PDZrrb = 8642 |
| 148376 | CEFBS_None, // VCVTUQQ2PDZrrbk = 8643 |
| 148377 | CEFBS_None, // VCVTUQQ2PDZrrbkz = 8644 |
| 148378 | CEFBS_None, // VCVTUQQ2PDZrrk = 8645 |
| 148379 | CEFBS_None, // VCVTUQQ2PDZrrkz = 8646 |
| 148380 | CEFBS_None, // VCVTUQQ2PHZ128rm = 8647 |
| 148381 | CEFBS_None, // VCVTUQQ2PHZ128rmb = 8648 |
| 148382 | CEFBS_None, // VCVTUQQ2PHZ128rmbk = 8649 |
| 148383 | CEFBS_None, // VCVTUQQ2PHZ128rmbkz = 8650 |
| 148384 | CEFBS_None, // VCVTUQQ2PHZ128rmk = 8651 |
| 148385 | CEFBS_None, // VCVTUQQ2PHZ128rmkz = 8652 |
| 148386 | CEFBS_None, // VCVTUQQ2PHZ128rr = 8653 |
| 148387 | CEFBS_None, // VCVTUQQ2PHZ128rrk = 8654 |
| 148388 | CEFBS_None, // VCVTUQQ2PHZ128rrkz = 8655 |
| 148389 | CEFBS_None, // VCVTUQQ2PHZ256rm = 8656 |
| 148390 | CEFBS_None, // VCVTUQQ2PHZ256rmb = 8657 |
| 148391 | CEFBS_None, // VCVTUQQ2PHZ256rmbk = 8658 |
| 148392 | CEFBS_None, // VCVTUQQ2PHZ256rmbkz = 8659 |
| 148393 | CEFBS_None, // VCVTUQQ2PHZ256rmk = 8660 |
| 148394 | CEFBS_None, // VCVTUQQ2PHZ256rmkz = 8661 |
| 148395 | CEFBS_None, // VCVTUQQ2PHZ256rr = 8662 |
| 148396 | CEFBS_None, // VCVTUQQ2PHZ256rrk = 8663 |
| 148397 | CEFBS_None, // VCVTUQQ2PHZ256rrkz = 8664 |
| 148398 | CEFBS_None, // VCVTUQQ2PHZrm = 8665 |
| 148399 | CEFBS_None, // VCVTUQQ2PHZrmb = 8666 |
| 148400 | CEFBS_None, // VCVTUQQ2PHZrmbk = 8667 |
| 148401 | CEFBS_None, // VCVTUQQ2PHZrmbkz = 8668 |
| 148402 | CEFBS_None, // VCVTUQQ2PHZrmk = 8669 |
| 148403 | CEFBS_None, // VCVTUQQ2PHZrmkz = 8670 |
| 148404 | CEFBS_None, // VCVTUQQ2PHZrr = 8671 |
| 148405 | CEFBS_None, // VCVTUQQ2PHZrrb = 8672 |
| 148406 | CEFBS_None, // VCVTUQQ2PHZrrbk = 8673 |
| 148407 | CEFBS_None, // VCVTUQQ2PHZrrbkz = 8674 |
| 148408 | CEFBS_None, // VCVTUQQ2PHZrrk = 8675 |
| 148409 | CEFBS_None, // VCVTUQQ2PHZrrkz = 8676 |
| 148410 | CEFBS_None, // VCVTUQQ2PSZ128rm = 8677 |
| 148411 | CEFBS_None, // VCVTUQQ2PSZ128rmb = 8678 |
| 148412 | CEFBS_None, // VCVTUQQ2PSZ128rmbk = 8679 |
| 148413 | CEFBS_None, // VCVTUQQ2PSZ128rmbkz = 8680 |
| 148414 | CEFBS_None, // VCVTUQQ2PSZ128rmk = 8681 |
| 148415 | CEFBS_None, // VCVTUQQ2PSZ128rmkz = 8682 |
| 148416 | CEFBS_None, // VCVTUQQ2PSZ128rr = 8683 |
| 148417 | CEFBS_None, // VCVTUQQ2PSZ128rrk = 8684 |
| 148418 | CEFBS_None, // VCVTUQQ2PSZ128rrkz = 8685 |
| 148419 | CEFBS_None, // VCVTUQQ2PSZ256rm = 8686 |
| 148420 | CEFBS_None, // VCVTUQQ2PSZ256rmb = 8687 |
| 148421 | CEFBS_None, // VCVTUQQ2PSZ256rmbk = 8688 |
| 148422 | CEFBS_None, // VCVTUQQ2PSZ256rmbkz = 8689 |
| 148423 | CEFBS_None, // VCVTUQQ2PSZ256rmk = 8690 |
| 148424 | CEFBS_None, // VCVTUQQ2PSZ256rmkz = 8691 |
| 148425 | CEFBS_None, // VCVTUQQ2PSZ256rr = 8692 |
| 148426 | CEFBS_None, // VCVTUQQ2PSZ256rrk = 8693 |
| 148427 | CEFBS_None, // VCVTUQQ2PSZ256rrkz = 8694 |
| 148428 | CEFBS_None, // VCVTUQQ2PSZrm = 8695 |
| 148429 | CEFBS_None, // VCVTUQQ2PSZrmb = 8696 |
| 148430 | CEFBS_None, // VCVTUQQ2PSZrmbk = 8697 |
| 148431 | CEFBS_None, // VCVTUQQ2PSZrmbkz = 8698 |
| 148432 | CEFBS_None, // VCVTUQQ2PSZrmk = 8699 |
| 148433 | CEFBS_None, // VCVTUQQ2PSZrmkz = 8700 |
| 148434 | CEFBS_None, // VCVTUQQ2PSZrr = 8701 |
| 148435 | CEFBS_None, // VCVTUQQ2PSZrrb = 8702 |
| 148436 | CEFBS_None, // VCVTUQQ2PSZrrbk = 8703 |
| 148437 | CEFBS_None, // VCVTUQQ2PSZrrbkz = 8704 |
| 148438 | CEFBS_None, // VCVTUQQ2PSZrrk = 8705 |
| 148439 | CEFBS_None, // VCVTUQQ2PSZrrkz = 8706 |
| 148440 | CEFBS_None, // VCVTUSI2SDZrm = 8707 |
| 148441 | CEFBS_None, // VCVTUSI2SDZrm_Int = 8708 |
| 148442 | CEFBS_None, // VCVTUSI2SDZrr = 8709 |
| 148443 | CEFBS_None, // VCVTUSI2SDZrr_Int = 8710 |
| 148444 | CEFBS_None, // VCVTUSI2SHZrm = 8711 |
| 148445 | CEFBS_None, // VCVTUSI2SHZrm_Int = 8712 |
| 148446 | CEFBS_None, // VCVTUSI2SHZrr = 8713 |
| 148447 | CEFBS_None, // VCVTUSI2SHZrr_Int = 8714 |
| 148448 | CEFBS_None, // VCVTUSI2SHZrrb_Int = 8715 |
| 148449 | CEFBS_None, // VCVTUSI2SSZrm = 8716 |
| 148450 | CEFBS_None, // VCVTUSI2SSZrm_Int = 8717 |
| 148451 | CEFBS_None, // VCVTUSI2SSZrr = 8718 |
| 148452 | CEFBS_None, // VCVTUSI2SSZrr_Int = 8719 |
| 148453 | CEFBS_None, // VCVTUSI2SSZrrb_Int = 8720 |
| 148454 | CEFBS_None, // VCVTUSI642SDZrm = 8721 |
| 148455 | CEFBS_None, // VCVTUSI642SDZrm_Int = 8722 |
| 148456 | CEFBS_None, // VCVTUSI642SDZrr = 8723 |
| 148457 | CEFBS_None, // VCVTUSI642SDZrr_Int = 8724 |
| 148458 | CEFBS_None, // VCVTUSI642SDZrrb_Int = 8725 |
| 148459 | CEFBS_None, // VCVTUSI642SHZrm = 8726 |
| 148460 | CEFBS_None, // VCVTUSI642SHZrm_Int = 8727 |
| 148461 | CEFBS_None, // VCVTUSI642SHZrr = 8728 |
| 148462 | CEFBS_None, // VCVTUSI642SHZrr_Int = 8729 |
| 148463 | CEFBS_None, // VCVTUSI642SHZrrb_Int = 8730 |
| 148464 | CEFBS_None, // VCVTUSI642SSZrm = 8731 |
| 148465 | CEFBS_None, // VCVTUSI642SSZrm_Int = 8732 |
| 148466 | CEFBS_None, // VCVTUSI642SSZrr = 8733 |
| 148467 | CEFBS_None, // VCVTUSI642SSZrr_Int = 8734 |
| 148468 | CEFBS_None, // VCVTUSI642SSZrrb_Int = 8735 |
| 148469 | CEFBS_None, // VCVTUW2PHZ128rm = 8736 |
| 148470 | CEFBS_None, // VCVTUW2PHZ128rmb = 8737 |
| 148471 | CEFBS_None, // VCVTUW2PHZ128rmbk = 8738 |
| 148472 | CEFBS_None, // VCVTUW2PHZ128rmbkz = 8739 |
| 148473 | CEFBS_None, // VCVTUW2PHZ128rmk = 8740 |
| 148474 | CEFBS_None, // VCVTUW2PHZ128rmkz = 8741 |
| 148475 | CEFBS_None, // VCVTUW2PHZ128rr = 8742 |
| 148476 | CEFBS_None, // VCVTUW2PHZ128rrk = 8743 |
| 148477 | CEFBS_None, // VCVTUW2PHZ128rrkz = 8744 |
| 148478 | CEFBS_None, // VCVTUW2PHZ256rm = 8745 |
| 148479 | CEFBS_None, // VCVTUW2PHZ256rmb = 8746 |
| 148480 | CEFBS_None, // VCVTUW2PHZ256rmbk = 8747 |
| 148481 | CEFBS_None, // VCVTUW2PHZ256rmbkz = 8748 |
| 148482 | CEFBS_None, // VCVTUW2PHZ256rmk = 8749 |
| 148483 | CEFBS_None, // VCVTUW2PHZ256rmkz = 8750 |
| 148484 | CEFBS_None, // VCVTUW2PHZ256rr = 8751 |
| 148485 | CEFBS_None, // VCVTUW2PHZ256rrk = 8752 |
| 148486 | CEFBS_None, // VCVTUW2PHZ256rrkz = 8753 |
| 148487 | CEFBS_None, // VCVTUW2PHZrm = 8754 |
| 148488 | CEFBS_None, // VCVTUW2PHZrmb = 8755 |
| 148489 | CEFBS_None, // VCVTUW2PHZrmbk = 8756 |
| 148490 | CEFBS_None, // VCVTUW2PHZrmbkz = 8757 |
| 148491 | CEFBS_None, // VCVTUW2PHZrmk = 8758 |
| 148492 | CEFBS_None, // VCVTUW2PHZrmkz = 8759 |
| 148493 | CEFBS_None, // VCVTUW2PHZrr = 8760 |
| 148494 | CEFBS_None, // VCVTUW2PHZrrb = 8761 |
| 148495 | CEFBS_None, // VCVTUW2PHZrrbk = 8762 |
| 148496 | CEFBS_None, // VCVTUW2PHZrrbkz = 8763 |
| 148497 | CEFBS_None, // VCVTUW2PHZrrk = 8764 |
| 148498 | CEFBS_None, // VCVTUW2PHZrrkz = 8765 |
| 148499 | CEFBS_None, // VCVTW2PHZ128rm = 8766 |
| 148500 | CEFBS_None, // VCVTW2PHZ128rmb = 8767 |
| 148501 | CEFBS_None, // VCVTW2PHZ128rmbk = 8768 |
| 148502 | CEFBS_None, // VCVTW2PHZ128rmbkz = 8769 |
| 148503 | CEFBS_None, // VCVTW2PHZ128rmk = 8770 |
| 148504 | CEFBS_None, // VCVTW2PHZ128rmkz = 8771 |
| 148505 | CEFBS_None, // VCVTW2PHZ128rr = 8772 |
| 148506 | CEFBS_None, // VCVTW2PHZ128rrk = 8773 |
| 148507 | CEFBS_None, // VCVTW2PHZ128rrkz = 8774 |
| 148508 | CEFBS_None, // VCVTW2PHZ256rm = 8775 |
| 148509 | CEFBS_None, // VCVTW2PHZ256rmb = 8776 |
| 148510 | CEFBS_None, // VCVTW2PHZ256rmbk = 8777 |
| 148511 | CEFBS_None, // VCVTW2PHZ256rmbkz = 8778 |
| 148512 | CEFBS_None, // VCVTW2PHZ256rmk = 8779 |
| 148513 | CEFBS_None, // VCVTW2PHZ256rmkz = 8780 |
| 148514 | CEFBS_None, // VCVTW2PHZ256rr = 8781 |
| 148515 | CEFBS_None, // VCVTW2PHZ256rrk = 8782 |
| 148516 | CEFBS_None, // VCVTW2PHZ256rrkz = 8783 |
| 148517 | CEFBS_None, // VCVTW2PHZrm = 8784 |
| 148518 | CEFBS_None, // VCVTW2PHZrmb = 8785 |
| 148519 | CEFBS_None, // VCVTW2PHZrmbk = 8786 |
| 148520 | CEFBS_None, // VCVTW2PHZrmbkz = 8787 |
| 148521 | CEFBS_None, // VCVTW2PHZrmk = 8788 |
| 148522 | CEFBS_None, // VCVTW2PHZrmkz = 8789 |
| 148523 | CEFBS_None, // VCVTW2PHZrr = 8790 |
| 148524 | CEFBS_None, // VCVTW2PHZrrb = 8791 |
| 148525 | CEFBS_None, // VCVTW2PHZrrbk = 8792 |
| 148526 | CEFBS_None, // VCVTW2PHZrrbkz = 8793 |
| 148527 | CEFBS_None, // VCVTW2PHZrrk = 8794 |
| 148528 | CEFBS_None, // VCVTW2PHZrrkz = 8795 |
| 148529 | CEFBS_None, // VDBPSADBWZ128rmi = 8796 |
| 148530 | CEFBS_None, // VDBPSADBWZ128rmik = 8797 |
| 148531 | CEFBS_None, // VDBPSADBWZ128rmikz = 8798 |
| 148532 | CEFBS_None, // VDBPSADBWZ128rri = 8799 |
| 148533 | CEFBS_None, // VDBPSADBWZ128rrik = 8800 |
| 148534 | CEFBS_None, // VDBPSADBWZ128rrikz = 8801 |
| 148535 | CEFBS_None, // VDBPSADBWZ256rmi = 8802 |
| 148536 | CEFBS_None, // VDBPSADBWZ256rmik = 8803 |
| 148537 | CEFBS_None, // VDBPSADBWZ256rmikz = 8804 |
| 148538 | CEFBS_None, // VDBPSADBWZ256rri = 8805 |
| 148539 | CEFBS_None, // VDBPSADBWZ256rrik = 8806 |
| 148540 | CEFBS_None, // VDBPSADBWZ256rrikz = 8807 |
| 148541 | CEFBS_None, // VDBPSADBWZrmi = 8808 |
| 148542 | CEFBS_None, // VDBPSADBWZrmik = 8809 |
| 148543 | CEFBS_None, // VDBPSADBWZrmikz = 8810 |
| 148544 | CEFBS_None, // VDBPSADBWZrri = 8811 |
| 148545 | CEFBS_None, // VDBPSADBWZrrik = 8812 |
| 148546 | CEFBS_None, // VDBPSADBWZrrikz = 8813 |
| 148547 | CEFBS_None, // VDIVBF16Z128rm = 8814 |
| 148548 | CEFBS_None, // VDIVBF16Z128rmb = 8815 |
| 148549 | CEFBS_None, // VDIVBF16Z128rmbk = 8816 |
| 148550 | CEFBS_None, // VDIVBF16Z128rmbkz = 8817 |
| 148551 | CEFBS_None, // VDIVBF16Z128rmk = 8818 |
| 148552 | CEFBS_None, // VDIVBF16Z128rmkz = 8819 |
| 148553 | CEFBS_None, // VDIVBF16Z128rr = 8820 |
| 148554 | CEFBS_None, // VDIVBF16Z128rrk = 8821 |
| 148555 | CEFBS_None, // VDIVBF16Z128rrkz = 8822 |
| 148556 | CEFBS_None, // VDIVBF16Z256rm = 8823 |
| 148557 | CEFBS_None, // VDIVBF16Z256rmb = 8824 |
| 148558 | CEFBS_None, // VDIVBF16Z256rmbk = 8825 |
| 148559 | CEFBS_None, // VDIVBF16Z256rmbkz = 8826 |
| 148560 | CEFBS_None, // VDIVBF16Z256rmk = 8827 |
| 148561 | CEFBS_None, // VDIVBF16Z256rmkz = 8828 |
| 148562 | CEFBS_None, // VDIVBF16Z256rr = 8829 |
| 148563 | CEFBS_None, // VDIVBF16Z256rrk = 8830 |
| 148564 | CEFBS_None, // VDIVBF16Z256rrkz = 8831 |
| 148565 | CEFBS_None, // VDIVBF16Zrm = 8832 |
| 148566 | CEFBS_None, // VDIVBF16Zrmb = 8833 |
| 148567 | CEFBS_None, // VDIVBF16Zrmbk = 8834 |
| 148568 | CEFBS_None, // VDIVBF16Zrmbkz = 8835 |
| 148569 | CEFBS_None, // VDIVBF16Zrmk = 8836 |
| 148570 | CEFBS_None, // VDIVBF16Zrmkz = 8837 |
| 148571 | CEFBS_None, // VDIVBF16Zrr = 8838 |
| 148572 | CEFBS_None, // VDIVBF16Zrrk = 8839 |
| 148573 | CEFBS_None, // VDIVBF16Zrrkz = 8840 |
| 148574 | CEFBS_None, // VDIVPDYrm = 8841 |
| 148575 | CEFBS_None, // VDIVPDYrr = 8842 |
| 148576 | CEFBS_None, // VDIVPDZ128rm = 8843 |
| 148577 | CEFBS_None, // VDIVPDZ128rmb = 8844 |
| 148578 | CEFBS_None, // VDIVPDZ128rmbk = 8845 |
| 148579 | CEFBS_None, // VDIVPDZ128rmbkz = 8846 |
| 148580 | CEFBS_None, // VDIVPDZ128rmk = 8847 |
| 148581 | CEFBS_None, // VDIVPDZ128rmkz = 8848 |
| 148582 | CEFBS_None, // VDIVPDZ128rr = 8849 |
| 148583 | CEFBS_None, // VDIVPDZ128rrk = 8850 |
| 148584 | CEFBS_None, // VDIVPDZ128rrkz = 8851 |
| 148585 | CEFBS_None, // VDIVPDZ256rm = 8852 |
| 148586 | CEFBS_None, // VDIVPDZ256rmb = 8853 |
| 148587 | CEFBS_None, // VDIVPDZ256rmbk = 8854 |
| 148588 | CEFBS_None, // VDIVPDZ256rmbkz = 8855 |
| 148589 | CEFBS_None, // VDIVPDZ256rmk = 8856 |
| 148590 | CEFBS_None, // VDIVPDZ256rmkz = 8857 |
| 148591 | CEFBS_None, // VDIVPDZ256rr = 8858 |
| 148592 | CEFBS_None, // VDIVPDZ256rrk = 8859 |
| 148593 | CEFBS_None, // VDIVPDZ256rrkz = 8860 |
| 148594 | CEFBS_None, // VDIVPDZrm = 8861 |
| 148595 | CEFBS_None, // VDIVPDZrmb = 8862 |
| 148596 | CEFBS_None, // VDIVPDZrmbk = 8863 |
| 148597 | CEFBS_None, // VDIVPDZrmbkz = 8864 |
| 148598 | CEFBS_None, // VDIVPDZrmk = 8865 |
| 148599 | CEFBS_None, // VDIVPDZrmkz = 8866 |
| 148600 | CEFBS_None, // VDIVPDZrr = 8867 |
| 148601 | CEFBS_None, // VDIVPDZrrb = 8868 |
| 148602 | CEFBS_None, // VDIVPDZrrbk = 8869 |
| 148603 | CEFBS_None, // VDIVPDZrrbkz = 8870 |
| 148604 | CEFBS_None, // VDIVPDZrrk = 8871 |
| 148605 | CEFBS_None, // VDIVPDZrrkz = 8872 |
| 148606 | CEFBS_None, // VDIVPDrm = 8873 |
| 148607 | CEFBS_None, // VDIVPDrr = 8874 |
| 148608 | CEFBS_None, // VDIVPHZ128rm = 8875 |
| 148609 | CEFBS_None, // VDIVPHZ128rmb = 8876 |
| 148610 | CEFBS_None, // VDIVPHZ128rmbk = 8877 |
| 148611 | CEFBS_None, // VDIVPHZ128rmbkz = 8878 |
| 148612 | CEFBS_None, // VDIVPHZ128rmk = 8879 |
| 148613 | CEFBS_None, // VDIVPHZ128rmkz = 8880 |
| 148614 | CEFBS_None, // VDIVPHZ128rr = 8881 |
| 148615 | CEFBS_None, // VDIVPHZ128rrk = 8882 |
| 148616 | CEFBS_None, // VDIVPHZ128rrkz = 8883 |
| 148617 | CEFBS_None, // VDIVPHZ256rm = 8884 |
| 148618 | CEFBS_None, // VDIVPHZ256rmb = 8885 |
| 148619 | CEFBS_None, // VDIVPHZ256rmbk = 8886 |
| 148620 | CEFBS_None, // VDIVPHZ256rmbkz = 8887 |
| 148621 | CEFBS_None, // VDIVPHZ256rmk = 8888 |
| 148622 | CEFBS_None, // VDIVPHZ256rmkz = 8889 |
| 148623 | CEFBS_None, // VDIVPHZ256rr = 8890 |
| 148624 | CEFBS_None, // VDIVPHZ256rrk = 8891 |
| 148625 | CEFBS_None, // VDIVPHZ256rrkz = 8892 |
| 148626 | CEFBS_None, // VDIVPHZrm = 8893 |
| 148627 | CEFBS_None, // VDIVPHZrmb = 8894 |
| 148628 | CEFBS_None, // VDIVPHZrmbk = 8895 |
| 148629 | CEFBS_None, // VDIVPHZrmbkz = 8896 |
| 148630 | CEFBS_None, // VDIVPHZrmk = 8897 |
| 148631 | CEFBS_None, // VDIVPHZrmkz = 8898 |
| 148632 | CEFBS_None, // VDIVPHZrr = 8899 |
| 148633 | CEFBS_None, // VDIVPHZrrb = 8900 |
| 148634 | CEFBS_None, // VDIVPHZrrbk = 8901 |
| 148635 | CEFBS_None, // VDIVPHZrrbkz = 8902 |
| 148636 | CEFBS_None, // VDIVPHZrrk = 8903 |
| 148637 | CEFBS_None, // VDIVPHZrrkz = 8904 |
| 148638 | CEFBS_None, // VDIVPSYrm = 8905 |
| 148639 | CEFBS_None, // VDIVPSYrr = 8906 |
| 148640 | CEFBS_None, // VDIVPSZ128rm = 8907 |
| 148641 | CEFBS_None, // VDIVPSZ128rmb = 8908 |
| 148642 | CEFBS_None, // VDIVPSZ128rmbk = 8909 |
| 148643 | CEFBS_None, // VDIVPSZ128rmbkz = 8910 |
| 148644 | CEFBS_None, // VDIVPSZ128rmk = 8911 |
| 148645 | CEFBS_None, // VDIVPSZ128rmkz = 8912 |
| 148646 | CEFBS_None, // VDIVPSZ128rr = 8913 |
| 148647 | CEFBS_None, // VDIVPSZ128rrk = 8914 |
| 148648 | CEFBS_None, // VDIVPSZ128rrkz = 8915 |
| 148649 | CEFBS_None, // VDIVPSZ256rm = 8916 |
| 148650 | CEFBS_None, // VDIVPSZ256rmb = 8917 |
| 148651 | CEFBS_None, // VDIVPSZ256rmbk = 8918 |
| 148652 | CEFBS_None, // VDIVPSZ256rmbkz = 8919 |
| 148653 | CEFBS_None, // VDIVPSZ256rmk = 8920 |
| 148654 | CEFBS_None, // VDIVPSZ256rmkz = 8921 |
| 148655 | CEFBS_None, // VDIVPSZ256rr = 8922 |
| 148656 | CEFBS_None, // VDIVPSZ256rrk = 8923 |
| 148657 | CEFBS_None, // VDIVPSZ256rrkz = 8924 |
| 148658 | CEFBS_None, // VDIVPSZrm = 8925 |
| 148659 | CEFBS_None, // VDIVPSZrmb = 8926 |
| 148660 | CEFBS_None, // VDIVPSZrmbk = 8927 |
| 148661 | CEFBS_None, // VDIVPSZrmbkz = 8928 |
| 148662 | CEFBS_None, // VDIVPSZrmk = 8929 |
| 148663 | CEFBS_None, // VDIVPSZrmkz = 8930 |
| 148664 | CEFBS_None, // VDIVPSZrr = 8931 |
| 148665 | CEFBS_None, // VDIVPSZrrb = 8932 |
| 148666 | CEFBS_None, // VDIVPSZrrbk = 8933 |
| 148667 | CEFBS_None, // VDIVPSZrrbkz = 8934 |
| 148668 | CEFBS_None, // VDIVPSZrrk = 8935 |
| 148669 | CEFBS_None, // VDIVPSZrrkz = 8936 |
| 148670 | CEFBS_None, // VDIVPSrm = 8937 |
| 148671 | CEFBS_None, // VDIVPSrr = 8938 |
| 148672 | CEFBS_None, // VDIVSDZrm = 8939 |
| 148673 | CEFBS_None, // VDIVSDZrm_Int = 8940 |
| 148674 | CEFBS_None, // VDIVSDZrmk_Int = 8941 |
| 148675 | CEFBS_None, // VDIVSDZrmkz_Int = 8942 |
| 148676 | CEFBS_None, // VDIVSDZrr = 8943 |
| 148677 | CEFBS_None, // VDIVSDZrr_Int = 8944 |
| 148678 | CEFBS_None, // VDIVSDZrrb_Int = 8945 |
| 148679 | CEFBS_None, // VDIVSDZrrbk_Int = 8946 |
| 148680 | CEFBS_None, // VDIVSDZrrbkz_Int = 8947 |
| 148681 | CEFBS_None, // VDIVSDZrrk_Int = 8948 |
| 148682 | CEFBS_None, // VDIVSDZrrkz_Int = 8949 |
| 148683 | CEFBS_None, // VDIVSDrm = 8950 |
| 148684 | CEFBS_None, // VDIVSDrm_Int = 8951 |
| 148685 | CEFBS_None, // VDIVSDrr = 8952 |
| 148686 | CEFBS_None, // VDIVSDrr_Int = 8953 |
| 148687 | CEFBS_None, // VDIVSHZrm = 8954 |
| 148688 | CEFBS_None, // VDIVSHZrm_Int = 8955 |
| 148689 | CEFBS_None, // VDIVSHZrmk_Int = 8956 |
| 148690 | CEFBS_None, // VDIVSHZrmkz_Int = 8957 |
| 148691 | CEFBS_None, // VDIVSHZrr = 8958 |
| 148692 | CEFBS_None, // VDIVSHZrr_Int = 8959 |
| 148693 | CEFBS_None, // VDIVSHZrrb_Int = 8960 |
| 148694 | CEFBS_None, // VDIVSHZrrbk_Int = 8961 |
| 148695 | CEFBS_None, // VDIVSHZrrbkz_Int = 8962 |
| 148696 | CEFBS_None, // VDIVSHZrrk_Int = 8963 |
| 148697 | CEFBS_None, // VDIVSHZrrkz_Int = 8964 |
| 148698 | CEFBS_None, // VDIVSSZrm = 8965 |
| 148699 | CEFBS_None, // VDIVSSZrm_Int = 8966 |
| 148700 | CEFBS_None, // VDIVSSZrmk_Int = 8967 |
| 148701 | CEFBS_None, // VDIVSSZrmkz_Int = 8968 |
| 148702 | CEFBS_None, // VDIVSSZrr = 8969 |
| 148703 | CEFBS_None, // VDIVSSZrr_Int = 8970 |
| 148704 | CEFBS_None, // VDIVSSZrrb_Int = 8971 |
| 148705 | CEFBS_None, // VDIVSSZrrbk_Int = 8972 |
| 148706 | CEFBS_None, // VDIVSSZrrbkz_Int = 8973 |
| 148707 | CEFBS_None, // VDIVSSZrrk_Int = 8974 |
| 148708 | CEFBS_None, // VDIVSSZrrkz_Int = 8975 |
| 148709 | CEFBS_None, // VDIVSSrm = 8976 |
| 148710 | CEFBS_None, // VDIVSSrm_Int = 8977 |
| 148711 | CEFBS_None, // VDIVSSrr = 8978 |
| 148712 | CEFBS_None, // VDIVSSrr_Int = 8979 |
| 148713 | CEFBS_None, // VDPBF16PSZ128m = 8980 |
| 148714 | CEFBS_None, // VDPBF16PSZ128mb = 8981 |
| 148715 | CEFBS_None, // VDPBF16PSZ128mbk = 8982 |
| 148716 | CEFBS_None, // VDPBF16PSZ128mbkz = 8983 |
| 148717 | CEFBS_None, // VDPBF16PSZ128mk = 8984 |
| 148718 | CEFBS_None, // VDPBF16PSZ128mkz = 8985 |
| 148719 | CEFBS_None, // VDPBF16PSZ128r = 8986 |
| 148720 | CEFBS_None, // VDPBF16PSZ128rk = 8987 |
| 148721 | CEFBS_None, // VDPBF16PSZ128rkz = 8988 |
| 148722 | CEFBS_None, // VDPBF16PSZ256m = 8989 |
| 148723 | CEFBS_None, // VDPBF16PSZ256mb = 8990 |
| 148724 | CEFBS_None, // VDPBF16PSZ256mbk = 8991 |
| 148725 | CEFBS_None, // VDPBF16PSZ256mbkz = 8992 |
| 148726 | CEFBS_None, // VDPBF16PSZ256mk = 8993 |
| 148727 | CEFBS_None, // VDPBF16PSZ256mkz = 8994 |
| 148728 | CEFBS_None, // VDPBF16PSZ256r = 8995 |
| 148729 | CEFBS_None, // VDPBF16PSZ256rk = 8996 |
| 148730 | CEFBS_None, // VDPBF16PSZ256rkz = 8997 |
| 148731 | CEFBS_None, // VDPBF16PSZm = 8998 |
| 148732 | CEFBS_None, // VDPBF16PSZmb = 8999 |
| 148733 | CEFBS_None, // VDPBF16PSZmbk = 9000 |
| 148734 | CEFBS_None, // VDPBF16PSZmbkz = 9001 |
| 148735 | CEFBS_None, // VDPBF16PSZmk = 9002 |
| 148736 | CEFBS_None, // VDPBF16PSZmkz = 9003 |
| 148737 | CEFBS_None, // VDPBF16PSZr = 9004 |
| 148738 | CEFBS_None, // VDPBF16PSZrk = 9005 |
| 148739 | CEFBS_None, // VDPBF16PSZrkz = 9006 |
| 148740 | CEFBS_None, // VDPPDrmi = 9007 |
| 148741 | CEFBS_None, // VDPPDrri = 9008 |
| 148742 | CEFBS_None, // VDPPHPSZ128m = 9009 |
| 148743 | CEFBS_None, // VDPPHPSZ128mb = 9010 |
| 148744 | CEFBS_None, // VDPPHPSZ128mbk = 9011 |
| 148745 | CEFBS_None, // VDPPHPSZ128mbkz = 9012 |
| 148746 | CEFBS_None, // VDPPHPSZ128mk = 9013 |
| 148747 | CEFBS_None, // VDPPHPSZ128mkz = 9014 |
| 148748 | CEFBS_None, // VDPPHPSZ128r = 9015 |
| 148749 | CEFBS_None, // VDPPHPSZ128rk = 9016 |
| 148750 | CEFBS_None, // VDPPHPSZ128rkz = 9017 |
| 148751 | CEFBS_None, // VDPPHPSZ256m = 9018 |
| 148752 | CEFBS_None, // VDPPHPSZ256mb = 9019 |
| 148753 | CEFBS_None, // VDPPHPSZ256mbk = 9020 |
| 148754 | CEFBS_None, // VDPPHPSZ256mbkz = 9021 |
| 148755 | CEFBS_None, // VDPPHPSZ256mk = 9022 |
| 148756 | CEFBS_None, // VDPPHPSZ256mkz = 9023 |
| 148757 | CEFBS_None, // VDPPHPSZ256r = 9024 |
| 148758 | CEFBS_None, // VDPPHPSZ256rk = 9025 |
| 148759 | CEFBS_None, // VDPPHPSZ256rkz = 9026 |
| 148760 | CEFBS_None, // VDPPHPSZm = 9027 |
| 148761 | CEFBS_None, // VDPPHPSZmb = 9028 |
| 148762 | CEFBS_None, // VDPPHPSZmbk = 9029 |
| 148763 | CEFBS_None, // VDPPHPSZmbkz = 9030 |
| 148764 | CEFBS_None, // VDPPHPSZmk = 9031 |
| 148765 | CEFBS_None, // VDPPHPSZmkz = 9032 |
| 148766 | CEFBS_None, // VDPPHPSZr = 9033 |
| 148767 | CEFBS_None, // VDPPHPSZrk = 9034 |
| 148768 | CEFBS_None, // VDPPHPSZrkz = 9035 |
| 148769 | CEFBS_None, // VDPPSYrmi = 9036 |
| 148770 | CEFBS_None, // VDPPSYrri = 9037 |
| 148771 | CEFBS_None, // VDPPSrmi = 9038 |
| 148772 | CEFBS_None, // VDPPSrri = 9039 |
| 148773 | CEFBS_None, // VERRm = 9040 |
| 148774 | CEFBS_None, // VERRr = 9041 |
| 148775 | CEFBS_None, // VERWm = 9042 |
| 148776 | CEFBS_None, // VERWr = 9043 |
| 148777 | CEFBS_None, // VEXP2PDZm = 9044 |
| 148778 | CEFBS_None, // VEXP2PDZmb = 9045 |
| 148779 | CEFBS_None, // VEXP2PDZmbk = 9046 |
| 148780 | CEFBS_None, // VEXP2PDZmbkz = 9047 |
| 148781 | CEFBS_None, // VEXP2PDZmk = 9048 |
| 148782 | CEFBS_None, // VEXP2PDZmkz = 9049 |
| 148783 | CEFBS_None, // VEXP2PDZr = 9050 |
| 148784 | CEFBS_None, // VEXP2PDZrb = 9051 |
| 148785 | CEFBS_None, // VEXP2PDZrbk = 9052 |
| 148786 | CEFBS_None, // VEXP2PDZrbkz = 9053 |
| 148787 | CEFBS_None, // VEXP2PDZrk = 9054 |
| 148788 | CEFBS_None, // VEXP2PDZrkz = 9055 |
| 148789 | CEFBS_None, // VEXP2PSZm = 9056 |
| 148790 | CEFBS_None, // VEXP2PSZmb = 9057 |
| 148791 | CEFBS_None, // VEXP2PSZmbk = 9058 |
| 148792 | CEFBS_None, // VEXP2PSZmbkz = 9059 |
| 148793 | CEFBS_None, // VEXP2PSZmk = 9060 |
| 148794 | CEFBS_None, // VEXP2PSZmkz = 9061 |
| 148795 | CEFBS_None, // VEXP2PSZr = 9062 |
| 148796 | CEFBS_None, // VEXP2PSZrb = 9063 |
| 148797 | CEFBS_None, // VEXP2PSZrbk = 9064 |
| 148798 | CEFBS_None, // VEXP2PSZrbkz = 9065 |
| 148799 | CEFBS_None, // VEXP2PSZrk = 9066 |
| 148800 | CEFBS_None, // VEXP2PSZrkz = 9067 |
| 148801 | CEFBS_None, // VEXPANDPDZ128rm = 9068 |
| 148802 | CEFBS_None, // VEXPANDPDZ128rmk = 9069 |
| 148803 | CEFBS_None, // VEXPANDPDZ128rmkz = 9070 |
| 148804 | CEFBS_None, // VEXPANDPDZ128rr = 9071 |
| 148805 | CEFBS_None, // VEXPANDPDZ128rrk = 9072 |
| 148806 | CEFBS_None, // VEXPANDPDZ128rrkz = 9073 |
| 148807 | CEFBS_None, // VEXPANDPDZ256rm = 9074 |
| 148808 | CEFBS_None, // VEXPANDPDZ256rmk = 9075 |
| 148809 | CEFBS_None, // VEXPANDPDZ256rmkz = 9076 |
| 148810 | CEFBS_None, // VEXPANDPDZ256rr = 9077 |
| 148811 | CEFBS_None, // VEXPANDPDZ256rrk = 9078 |
| 148812 | CEFBS_None, // VEXPANDPDZ256rrkz = 9079 |
| 148813 | CEFBS_None, // VEXPANDPDZrm = 9080 |
| 148814 | CEFBS_None, // VEXPANDPDZrmk = 9081 |
| 148815 | CEFBS_None, // VEXPANDPDZrmkz = 9082 |
| 148816 | CEFBS_None, // VEXPANDPDZrr = 9083 |
| 148817 | CEFBS_None, // VEXPANDPDZrrk = 9084 |
| 148818 | CEFBS_None, // VEXPANDPDZrrkz = 9085 |
| 148819 | CEFBS_None, // VEXPANDPSZ128rm = 9086 |
| 148820 | CEFBS_None, // VEXPANDPSZ128rmk = 9087 |
| 148821 | CEFBS_None, // VEXPANDPSZ128rmkz = 9088 |
| 148822 | CEFBS_None, // VEXPANDPSZ128rr = 9089 |
| 148823 | CEFBS_None, // VEXPANDPSZ128rrk = 9090 |
| 148824 | CEFBS_None, // VEXPANDPSZ128rrkz = 9091 |
| 148825 | CEFBS_None, // VEXPANDPSZ256rm = 9092 |
| 148826 | CEFBS_None, // VEXPANDPSZ256rmk = 9093 |
| 148827 | CEFBS_None, // VEXPANDPSZ256rmkz = 9094 |
| 148828 | CEFBS_None, // VEXPANDPSZ256rr = 9095 |
| 148829 | CEFBS_None, // VEXPANDPSZ256rrk = 9096 |
| 148830 | CEFBS_None, // VEXPANDPSZ256rrkz = 9097 |
| 148831 | CEFBS_None, // VEXPANDPSZrm = 9098 |
| 148832 | CEFBS_None, // VEXPANDPSZrmk = 9099 |
| 148833 | CEFBS_None, // VEXPANDPSZrmkz = 9100 |
| 148834 | CEFBS_None, // VEXPANDPSZrr = 9101 |
| 148835 | CEFBS_None, // VEXPANDPSZrrk = 9102 |
| 148836 | CEFBS_None, // VEXPANDPSZrrkz = 9103 |
| 148837 | CEFBS_None, // VEXTRACTF128mri = 9104 |
| 148838 | CEFBS_None, // VEXTRACTF128rri = 9105 |
| 148839 | CEFBS_None, // VEXTRACTF32X4Z256mri = 9106 |
| 148840 | CEFBS_None, // VEXTRACTF32X4Z256mrik = 9107 |
| 148841 | CEFBS_None, // VEXTRACTF32X4Z256rri = 9108 |
| 148842 | CEFBS_None, // VEXTRACTF32X4Z256rrik = 9109 |
| 148843 | CEFBS_None, // VEXTRACTF32X4Z256rrikz = 9110 |
| 148844 | CEFBS_None, // VEXTRACTF32X4Zmri = 9111 |
| 148845 | CEFBS_None, // VEXTRACTF32X4Zmrik = 9112 |
| 148846 | CEFBS_None, // VEXTRACTF32X4Zrri = 9113 |
| 148847 | CEFBS_None, // VEXTRACTF32X4Zrrik = 9114 |
| 148848 | CEFBS_None, // VEXTRACTF32X4Zrrikz = 9115 |
| 148849 | CEFBS_None, // VEXTRACTF32X8Zmri = 9116 |
| 148850 | CEFBS_None, // VEXTRACTF32X8Zmrik = 9117 |
| 148851 | CEFBS_None, // VEXTRACTF32X8Zrri = 9118 |
| 148852 | CEFBS_None, // VEXTRACTF32X8Zrrik = 9119 |
| 148853 | CEFBS_None, // VEXTRACTF32X8Zrrikz = 9120 |
| 148854 | CEFBS_None, // VEXTRACTF64X2Z256mri = 9121 |
| 148855 | CEFBS_None, // VEXTRACTF64X2Z256mrik = 9122 |
| 148856 | CEFBS_None, // VEXTRACTF64X2Z256rri = 9123 |
| 148857 | CEFBS_None, // VEXTRACTF64X2Z256rrik = 9124 |
| 148858 | CEFBS_None, // VEXTRACTF64X2Z256rrikz = 9125 |
| 148859 | CEFBS_None, // VEXTRACTF64X2Zmri = 9126 |
| 148860 | CEFBS_None, // VEXTRACTF64X2Zmrik = 9127 |
| 148861 | CEFBS_None, // VEXTRACTF64X2Zrri = 9128 |
| 148862 | CEFBS_None, // VEXTRACTF64X2Zrrik = 9129 |
| 148863 | CEFBS_None, // VEXTRACTF64X2Zrrikz = 9130 |
| 148864 | CEFBS_None, // VEXTRACTF64X4Zmri = 9131 |
| 148865 | CEFBS_None, // VEXTRACTF64X4Zmrik = 9132 |
| 148866 | CEFBS_None, // VEXTRACTF64X4Zrri = 9133 |
| 148867 | CEFBS_None, // VEXTRACTF64X4Zrrik = 9134 |
| 148868 | CEFBS_None, // VEXTRACTF64X4Zrrikz = 9135 |
| 148869 | CEFBS_None, // VEXTRACTI128mri = 9136 |
| 148870 | CEFBS_None, // VEXTRACTI128rri = 9137 |
| 148871 | CEFBS_None, // VEXTRACTI32X4Z256mri = 9138 |
| 148872 | CEFBS_None, // VEXTRACTI32X4Z256mrik = 9139 |
| 148873 | CEFBS_None, // VEXTRACTI32X4Z256rri = 9140 |
| 148874 | CEFBS_None, // VEXTRACTI32X4Z256rrik = 9141 |
| 148875 | CEFBS_None, // VEXTRACTI32X4Z256rrikz = 9142 |
| 148876 | CEFBS_None, // VEXTRACTI32X4Zmri = 9143 |
| 148877 | CEFBS_None, // VEXTRACTI32X4Zmrik = 9144 |
| 148878 | CEFBS_None, // VEXTRACTI32X4Zrri = 9145 |
| 148879 | CEFBS_None, // VEXTRACTI32X4Zrrik = 9146 |
| 148880 | CEFBS_None, // VEXTRACTI32X4Zrrikz = 9147 |
| 148881 | CEFBS_None, // VEXTRACTI32X8Zmri = 9148 |
| 148882 | CEFBS_None, // VEXTRACTI32X8Zmrik = 9149 |
| 148883 | CEFBS_None, // VEXTRACTI32X8Zrri = 9150 |
| 148884 | CEFBS_None, // VEXTRACTI32X8Zrrik = 9151 |
| 148885 | CEFBS_None, // VEXTRACTI32X8Zrrikz = 9152 |
| 148886 | CEFBS_None, // VEXTRACTI64X2Z256mri = 9153 |
| 148887 | CEFBS_None, // VEXTRACTI64X2Z256mrik = 9154 |
| 148888 | CEFBS_None, // VEXTRACTI64X2Z256rri = 9155 |
| 148889 | CEFBS_None, // VEXTRACTI64X2Z256rrik = 9156 |
| 148890 | CEFBS_None, // VEXTRACTI64X2Z256rrikz = 9157 |
| 148891 | CEFBS_None, // VEXTRACTI64X2Zmri = 9158 |
| 148892 | CEFBS_None, // VEXTRACTI64X2Zmrik = 9159 |
| 148893 | CEFBS_None, // VEXTRACTI64X2Zrri = 9160 |
| 148894 | CEFBS_None, // VEXTRACTI64X2Zrrik = 9161 |
| 148895 | CEFBS_None, // VEXTRACTI64X2Zrrikz = 9162 |
| 148896 | CEFBS_None, // VEXTRACTI64X4Zmri = 9163 |
| 148897 | CEFBS_None, // VEXTRACTI64X4Zmrik = 9164 |
| 148898 | CEFBS_None, // VEXTRACTI64X4Zrri = 9165 |
| 148899 | CEFBS_None, // VEXTRACTI64X4Zrrik = 9166 |
| 148900 | CEFBS_None, // VEXTRACTI64X4Zrrikz = 9167 |
| 148901 | CEFBS_None, // VEXTRACTPSZmri = 9168 |
| 148902 | CEFBS_None, // VEXTRACTPSZrri = 9169 |
| 148903 | CEFBS_None, // VEXTRACTPSmri = 9170 |
| 148904 | CEFBS_None, // VEXTRACTPSrri = 9171 |
| 148905 | CEFBS_None, // VFCMADDCPHZ128m = 9172 |
| 148906 | CEFBS_None, // VFCMADDCPHZ128mb = 9173 |
| 148907 | CEFBS_None, // VFCMADDCPHZ128mbk = 9174 |
| 148908 | CEFBS_None, // VFCMADDCPHZ128mbkz = 9175 |
| 148909 | CEFBS_None, // VFCMADDCPHZ128mk = 9176 |
| 148910 | CEFBS_None, // VFCMADDCPHZ128mkz = 9177 |
| 148911 | CEFBS_None, // VFCMADDCPHZ128r = 9178 |
| 148912 | CEFBS_None, // VFCMADDCPHZ128rk = 9179 |
| 148913 | CEFBS_None, // VFCMADDCPHZ128rkz = 9180 |
| 148914 | CEFBS_None, // VFCMADDCPHZ256m = 9181 |
| 148915 | CEFBS_None, // VFCMADDCPHZ256mb = 9182 |
| 148916 | CEFBS_None, // VFCMADDCPHZ256mbk = 9183 |
| 148917 | CEFBS_None, // VFCMADDCPHZ256mbkz = 9184 |
| 148918 | CEFBS_None, // VFCMADDCPHZ256mk = 9185 |
| 148919 | CEFBS_None, // VFCMADDCPHZ256mkz = 9186 |
| 148920 | CEFBS_None, // VFCMADDCPHZ256r = 9187 |
| 148921 | CEFBS_None, // VFCMADDCPHZ256rk = 9188 |
| 148922 | CEFBS_None, // VFCMADDCPHZ256rkz = 9189 |
| 148923 | CEFBS_None, // VFCMADDCPHZm = 9190 |
| 148924 | CEFBS_None, // VFCMADDCPHZmb = 9191 |
| 148925 | CEFBS_None, // VFCMADDCPHZmbk = 9192 |
| 148926 | CEFBS_None, // VFCMADDCPHZmbkz = 9193 |
| 148927 | CEFBS_None, // VFCMADDCPHZmk = 9194 |
| 148928 | CEFBS_None, // VFCMADDCPHZmkz = 9195 |
| 148929 | CEFBS_None, // VFCMADDCPHZr = 9196 |
| 148930 | CEFBS_None, // VFCMADDCPHZrb = 9197 |
| 148931 | CEFBS_None, // VFCMADDCPHZrbk = 9198 |
| 148932 | CEFBS_None, // VFCMADDCPHZrbkz = 9199 |
| 148933 | CEFBS_None, // VFCMADDCPHZrk = 9200 |
| 148934 | CEFBS_None, // VFCMADDCPHZrkz = 9201 |
| 148935 | CEFBS_None, // VFCMADDCSHZm = 9202 |
| 148936 | CEFBS_None, // VFCMADDCSHZmk = 9203 |
| 148937 | CEFBS_None, // VFCMADDCSHZmkz = 9204 |
| 148938 | CEFBS_None, // VFCMADDCSHZr = 9205 |
| 148939 | CEFBS_None, // VFCMADDCSHZrb = 9206 |
| 148940 | CEFBS_None, // VFCMADDCSHZrbk = 9207 |
| 148941 | CEFBS_None, // VFCMADDCSHZrbkz = 9208 |
| 148942 | CEFBS_None, // VFCMADDCSHZrk = 9209 |
| 148943 | CEFBS_None, // VFCMADDCSHZrkz = 9210 |
| 148944 | CEFBS_None, // VFCMULCPHZ128rm = 9211 |
| 148945 | CEFBS_None, // VFCMULCPHZ128rmb = 9212 |
| 148946 | CEFBS_None, // VFCMULCPHZ128rmbk = 9213 |
| 148947 | CEFBS_None, // VFCMULCPHZ128rmbkz = 9214 |
| 148948 | CEFBS_None, // VFCMULCPHZ128rmk = 9215 |
| 148949 | CEFBS_None, // VFCMULCPHZ128rmkz = 9216 |
| 148950 | CEFBS_None, // VFCMULCPHZ128rr = 9217 |
| 148951 | CEFBS_None, // VFCMULCPHZ128rrk = 9218 |
| 148952 | CEFBS_None, // VFCMULCPHZ128rrkz = 9219 |
| 148953 | CEFBS_None, // VFCMULCPHZ256rm = 9220 |
| 148954 | CEFBS_None, // VFCMULCPHZ256rmb = 9221 |
| 148955 | CEFBS_None, // VFCMULCPHZ256rmbk = 9222 |
| 148956 | CEFBS_None, // VFCMULCPHZ256rmbkz = 9223 |
| 148957 | CEFBS_None, // VFCMULCPHZ256rmk = 9224 |
| 148958 | CEFBS_None, // VFCMULCPHZ256rmkz = 9225 |
| 148959 | CEFBS_None, // VFCMULCPHZ256rr = 9226 |
| 148960 | CEFBS_None, // VFCMULCPHZ256rrk = 9227 |
| 148961 | CEFBS_None, // VFCMULCPHZ256rrkz = 9228 |
| 148962 | CEFBS_None, // VFCMULCPHZrm = 9229 |
| 148963 | CEFBS_None, // VFCMULCPHZrmb = 9230 |
| 148964 | CEFBS_None, // VFCMULCPHZrmbk = 9231 |
| 148965 | CEFBS_None, // VFCMULCPHZrmbkz = 9232 |
| 148966 | CEFBS_None, // VFCMULCPHZrmk = 9233 |
| 148967 | CEFBS_None, // VFCMULCPHZrmkz = 9234 |
| 148968 | CEFBS_None, // VFCMULCPHZrr = 9235 |
| 148969 | CEFBS_None, // VFCMULCPHZrrb = 9236 |
| 148970 | CEFBS_None, // VFCMULCPHZrrbk = 9237 |
| 148971 | CEFBS_None, // VFCMULCPHZrrbkz = 9238 |
| 148972 | CEFBS_None, // VFCMULCPHZrrk = 9239 |
| 148973 | CEFBS_None, // VFCMULCPHZrrkz = 9240 |
| 148974 | CEFBS_None, // VFCMULCSHZrm = 9241 |
| 148975 | CEFBS_None, // VFCMULCSHZrmk = 9242 |
| 148976 | CEFBS_None, // VFCMULCSHZrmkz = 9243 |
| 148977 | CEFBS_None, // VFCMULCSHZrr = 9244 |
| 148978 | CEFBS_None, // VFCMULCSHZrrb = 9245 |
| 148979 | CEFBS_None, // VFCMULCSHZrrbk = 9246 |
| 148980 | CEFBS_None, // VFCMULCSHZrrbkz = 9247 |
| 148981 | CEFBS_None, // VFCMULCSHZrrk = 9248 |
| 148982 | CEFBS_None, // VFCMULCSHZrrkz = 9249 |
| 148983 | CEFBS_None, // VFIXUPIMMPDZ128rmbi = 9250 |
| 148984 | CEFBS_None, // VFIXUPIMMPDZ128rmbik = 9251 |
| 148985 | CEFBS_None, // VFIXUPIMMPDZ128rmbikz = 9252 |
| 148986 | CEFBS_None, // VFIXUPIMMPDZ128rmi = 9253 |
| 148987 | CEFBS_None, // VFIXUPIMMPDZ128rmik = 9254 |
| 148988 | CEFBS_None, // VFIXUPIMMPDZ128rmikz = 9255 |
| 148989 | CEFBS_None, // VFIXUPIMMPDZ128rri = 9256 |
| 148990 | CEFBS_None, // VFIXUPIMMPDZ128rrik = 9257 |
| 148991 | CEFBS_None, // VFIXUPIMMPDZ128rrikz = 9258 |
| 148992 | CEFBS_None, // VFIXUPIMMPDZ256rmbi = 9259 |
| 148993 | CEFBS_None, // VFIXUPIMMPDZ256rmbik = 9260 |
| 148994 | CEFBS_None, // VFIXUPIMMPDZ256rmbikz = 9261 |
| 148995 | CEFBS_None, // VFIXUPIMMPDZ256rmi = 9262 |
| 148996 | CEFBS_None, // VFIXUPIMMPDZ256rmik = 9263 |
| 148997 | CEFBS_None, // VFIXUPIMMPDZ256rmikz = 9264 |
| 148998 | CEFBS_None, // VFIXUPIMMPDZ256rri = 9265 |
| 148999 | CEFBS_None, // VFIXUPIMMPDZ256rrik = 9266 |
| 149000 | CEFBS_None, // VFIXUPIMMPDZ256rrikz = 9267 |
| 149001 | CEFBS_None, // VFIXUPIMMPDZrmbi = 9268 |
| 149002 | CEFBS_None, // VFIXUPIMMPDZrmbik = 9269 |
| 149003 | CEFBS_None, // VFIXUPIMMPDZrmbikz = 9270 |
| 149004 | CEFBS_None, // VFIXUPIMMPDZrmi = 9271 |
| 149005 | CEFBS_None, // VFIXUPIMMPDZrmik = 9272 |
| 149006 | CEFBS_None, // VFIXUPIMMPDZrmikz = 9273 |
| 149007 | CEFBS_None, // VFIXUPIMMPDZrri = 9274 |
| 149008 | CEFBS_None, // VFIXUPIMMPDZrrib = 9275 |
| 149009 | CEFBS_None, // VFIXUPIMMPDZrribk = 9276 |
| 149010 | CEFBS_None, // VFIXUPIMMPDZrribkz = 9277 |
| 149011 | CEFBS_None, // VFIXUPIMMPDZrrik = 9278 |
| 149012 | CEFBS_None, // VFIXUPIMMPDZrrikz = 9279 |
| 149013 | CEFBS_None, // VFIXUPIMMPSZ128rmbi = 9280 |
| 149014 | CEFBS_None, // VFIXUPIMMPSZ128rmbik = 9281 |
| 149015 | CEFBS_None, // VFIXUPIMMPSZ128rmbikz = 9282 |
| 149016 | CEFBS_None, // VFIXUPIMMPSZ128rmi = 9283 |
| 149017 | CEFBS_None, // VFIXUPIMMPSZ128rmik = 9284 |
| 149018 | CEFBS_None, // VFIXUPIMMPSZ128rmikz = 9285 |
| 149019 | CEFBS_None, // VFIXUPIMMPSZ128rri = 9286 |
| 149020 | CEFBS_None, // VFIXUPIMMPSZ128rrik = 9287 |
| 149021 | CEFBS_None, // VFIXUPIMMPSZ128rrikz = 9288 |
| 149022 | CEFBS_None, // VFIXUPIMMPSZ256rmbi = 9289 |
| 149023 | CEFBS_None, // VFIXUPIMMPSZ256rmbik = 9290 |
| 149024 | CEFBS_None, // VFIXUPIMMPSZ256rmbikz = 9291 |
| 149025 | CEFBS_None, // VFIXUPIMMPSZ256rmi = 9292 |
| 149026 | CEFBS_None, // VFIXUPIMMPSZ256rmik = 9293 |
| 149027 | CEFBS_None, // VFIXUPIMMPSZ256rmikz = 9294 |
| 149028 | CEFBS_None, // VFIXUPIMMPSZ256rri = 9295 |
| 149029 | CEFBS_None, // VFIXUPIMMPSZ256rrik = 9296 |
| 149030 | CEFBS_None, // VFIXUPIMMPSZ256rrikz = 9297 |
| 149031 | CEFBS_None, // VFIXUPIMMPSZrmbi = 9298 |
| 149032 | CEFBS_None, // VFIXUPIMMPSZrmbik = 9299 |
| 149033 | CEFBS_None, // VFIXUPIMMPSZrmbikz = 9300 |
| 149034 | CEFBS_None, // VFIXUPIMMPSZrmi = 9301 |
| 149035 | CEFBS_None, // VFIXUPIMMPSZrmik = 9302 |
| 149036 | CEFBS_None, // VFIXUPIMMPSZrmikz = 9303 |
| 149037 | CEFBS_None, // VFIXUPIMMPSZrri = 9304 |
| 149038 | CEFBS_None, // VFIXUPIMMPSZrrib = 9305 |
| 149039 | CEFBS_None, // VFIXUPIMMPSZrribk = 9306 |
| 149040 | CEFBS_None, // VFIXUPIMMPSZrribkz = 9307 |
| 149041 | CEFBS_None, // VFIXUPIMMPSZrrik = 9308 |
| 149042 | CEFBS_None, // VFIXUPIMMPSZrrikz = 9309 |
| 149043 | CEFBS_None, // VFIXUPIMMSDZrmi = 9310 |
| 149044 | CEFBS_None, // VFIXUPIMMSDZrmik = 9311 |
| 149045 | CEFBS_None, // VFIXUPIMMSDZrmikz = 9312 |
| 149046 | CEFBS_None, // VFIXUPIMMSDZrri = 9313 |
| 149047 | CEFBS_None, // VFIXUPIMMSDZrrib = 9314 |
| 149048 | CEFBS_None, // VFIXUPIMMSDZrribk = 9315 |
| 149049 | CEFBS_None, // VFIXUPIMMSDZrribkz = 9316 |
| 149050 | CEFBS_None, // VFIXUPIMMSDZrrik = 9317 |
| 149051 | CEFBS_None, // VFIXUPIMMSDZrrikz = 9318 |
| 149052 | CEFBS_None, // VFIXUPIMMSSZrmi = 9319 |
| 149053 | CEFBS_None, // VFIXUPIMMSSZrmik = 9320 |
| 149054 | CEFBS_None, // VFIXUPIMMSSZrmikz = 9321 |
| 149055 | CEFBS_None, // VFIXUPIMMSSZrri = 9322 |
| 149056 | CEFBS_None, // VFIXUPIMMSSZrrib = 9323 |
| 149057 | CEFBS_None, // VFIXUPIMMSSZrribk = 9324 |
| 149058 | CEFBS_None, // VFIXUPIMMSSZrribkz = 9325 |
| 149059 | CEFBS_None, // VFIXUPIMMSSZrrik = 9326 |
| 149060 | CEFBS_None, // VFIXUPIMMSSZrrikz = 9327 |
| 149061 | CEFBS_None, // VFMADD132BF16Z128m = 9328 |
| 149062 | CEFBS_None, // VFMADD132BF16Z128mb = 9329 |
| 149063 | CEFBS_None, // VFMADD132BF16Z128mbk = 9330 |
| 149064 | CEFBS_None, // VFMADD132BF16Z128mbkz = 9331 |
| 149065 | CEFBS_None, // VFMADD132BF16Z128mk = 9332 |
| 149066 | CEFBS_None, // VFMADD132BF16Z128mkz = 9333 |
| 149067 | CEFBS_None, // VFMADD132BF16Z128r = 9334 |
| 149068 | CEFBS_None, // VFMADD132BF16Z128rk = 9335 |
| 149069 | CEFBS_None, // VFMADD132BF16Z128rkz = 9336 |
| 149070 | CEFBS_None, // VFMADD132BF16Z256m = 9337 |
| 149071 | CEFBS_None, // VFMADD132BF16Z256mb = 9338 |
| 149072 | CEFBS_None, // VFMADD132BF16Z256mbk = 9339 |
| 149073 | CEFBS_None, // VFMADD132BF16Z256mbkz = 9340 |
| 149074 | CEFBS_None, // VFMADD132BF16Z256mk = 9341 |
| 149075 | CEFBS_None, // VFMADD132BF16Z256mkz = 9342 |
| 149076 | CEFBS_None, // VFMADD132BF16Z256r = 9343 |
| 149077 | CEFBS_None, // VFMADD132BF16Z256rk = 9344 |
| 149078 | CEFBS_None, // VFMADD132BF16Z256rkz = 9345 |
| 149079 | CEFBS_None, // VFMADD132BF16Zm = 9346 |
| 149080 | CEFBS_None, // VFMADD132BF16Zmb = 9347 |
| 149081 | CEFBS_None, // VFMADD132BF16Zmbk = 9348 |
| 149082 | CEFBS_None, // VFMADD132BF16Zmbkz = 9349 |
| 149083 | CEFBS_None, // VFMADD132BF16Zmk = 9350 |
| 149084 | CEFBS_None, // VFMADD132BF16Zmkz = 9351 |
| 149085 | CEFBS_None, // VFMADD132BF16Zr = 9352 |
| 149086 | CEFBS_None, // VFMADD132BF16Zrk = 9353 |
| 149087 | CEFBS_None, // VFMADD132BF16Zrkz = 9354 |
| 149088 | CEFBS_None, // VFMADD132PDYm = 9355 |
| 149089 | CEFBS_None, // VFMADD132PDYr = 9356 |
| 149090 | CEFBS_None, // VFMADD132PDZ128m = 9357 |
| 149091 | CEFBS_None, // VFMADD132PDZ128mb = 9358 |
| 149092 | CEFBS_None, // VFMADD132PDZ128mbk = 9359 |
| 149093 | CEFBS_None, // VFMADD132PDZ128mbkz = 9360 |
| 149094 | CEFBS_None, // VFMADD132PDZ128mk = 9361 |
| 149095 | CEFBS_None, // VFMADD132PDZ128mkz = 9362 |
| 149096 | CEFBS_None, // VFMADD132PDZ128r = 9363 |
| 149097 | CEFBS_None, // VFMADD132PDZ128rk = 9364 |
| 149098 | CEFBS_None, // VFMADD132PDZ128rkz = 9365 |
| 149099 | CEFBS_None, // VFMADD132PDZ256m = 9366 |
| 149100 | CEFBS_None, // VFMADD132PDZ256mb = 9367 |
| 149101 | CEFBS_None, // VFMADD132PDZ256mbk = 9368 |
| 149102 | CEFBS_None, // VFMADD132PDZ256mbkz = 9369 |
| 149103 | CEFBS_None, // VFMADD132PDZ256mk = 9370 |
| 149104 | CEFBS_None, // VFMADD132PDZ256mkz = 9371 |
| 149105 | CEFBS_None, // VFMADD132PDZ256r = 9372 |
| 149106 | CEFBS_None, // VFMADD132PDZ256rk = 9373 |
| 149107 | CEFBS_None, // VFMADD132PDZ256rkz = 9374 |
| 149108 | CEFBS_None, // VFMADD132PDZm = 9375 |
| 149109 | CEFBS_None, // VFMADD132PDZmb = 9376 |
| 149110 | CEFBS_None, // VFMADD132PDZmbk = 9377 |
| 149111 | CEFBS_None, // VFMADD132PDZmbkz = 9378 |
| 149112 | CEFBS_None, // VFMADD132PDZmk = 9379 |
| 149113 | CEFBS_None, // VFMADD132PDZmkz = 9380 |
| 149114 | CEFBS_None, // VFMADD132PDZr = 9381 |
| 149115 | CEFBS_None, // VFMADD132PDZrb = 9382 |
| 149116 | CEFBS_None, // VFMADD132PDZrbk = 9383 |
| 149117 | CEFBS_None, // VFMADD132PDZrbkz = 9384 |
| 149118 | CEFBS_None, // VFMADD132PDZrk = 9385 |
| 149119 | CEFBS_None, // VFMADD132PDZrkz = 9386 |
| 149120 | CEFBS_None, // VFMADD132PDm = 9387 |
| 149121 | CEFBS_None, // VFMADD132PDr = 9388 |
| 149122 | CEFBS_None, // VFMADD132PHZ128m = 9389 |
| 149123 | CEFBS_None, // VFMADD132PHZ128mb = 9390 |
| 149124 | CEFBS_None, // VFMADD132PHZ128mbk = 9391 |
| 149125 | CEFBS_None, // VFMADD132PHZ128mbkz = 9392 |
| 149126 | CEFBS_None, // VFMADD132PHZ128mk = 9393 |
| 149127 | CEFBS_None, // VFMADD132PHZ128mkz = 9394 |
| 149128 | CEFBS_None, // VFMADD132PHZ128r = 9395 |
| 149129 | CEFBS_None, // VFMADD132PHZ128rk = 9396 |
| 149130 | CEFBS_None, // VFMADD132PHZ128rkz = 9397 |
| 149131 | CEFBS_None, // VFMADD132PHZ256m = 9398 |
| 149132 | CEFBS_None, // VFMADD132PHZ256mb = 9399 |
| 149133 | CEFBS_None, // VFMADD132PHZ256mbk = 9400 |
| 149134 | CEFBS_None, // VFMADD132PHZ256mbkz = 9401 |
| 149135 | CEFBS_None, // VFMADD132PHZ256mk = 9402 |
| 149136 | CEFBS_None, // VFMADD132PHZ256mkz = 9403 |
| 149137 | CEFBS_None, // VFMADD132PHZ256r = 9404 |
| 149138 | CEFBS_None, // VFMADD132PHZ256rk = 9405 |
| 149139 | CEFBS_None, // VFMADD132PHZ256rkz = 9406 |
| 149140 | CEFBS_None, // VFMADD132PHZm = 9407 |
| 149141 | CEFBS_None, // VFMADD132PHZmb = 9408 |
| 149142 | CEFBS_None, // VFMADD132PHZmbk = 9409 |
| 149143 | CEFBS_None, // VFMADD132PHZmbkz = 9410 |
| 149144 | CEFBS_None, // VFMADD132PHZmk = 9411 |
| 149145 | CEFBS_None, // VFMADD132PHZmkz = 9412 |
| 149146 | CEFBS_None, // VFMADD132PHZr = 9413 |
| 149147 | CEFBS_None, // VFMADD132PHZrb = 9414 |
| 149148 | CEFBS_None, // VFMADD132PHZrbk = 9415 |
| 149149 | CEFBS_None, // VFMADD132PHZrbkz = 9416 |
| 149150 | CEFBS_None, // VFMADD132PHZrk = 9417 |
| 149151 | CEFBS_None, // VFMADD132PHZrkz = 9418 |
| 149152 | CEFBS_None, // VFMADD132PSYm = 9419 |
| 149153 | CEFBS_None, // VFMADD132PSYr = 9420 |
| 149154 | CEFBS_None, // VFMADD132PSZ128m = 9421 |
| 149155 | CEFBS_None, // VFMADD132PSZ128mb = 9422 |
| 149156 | CEFBS_None, // VFMADD132PSZ128mbk = 9423 |
| 149157 | CEFBS_None, // VFMADD132PSZ128mbkz = 9424 |
| 149158 | CEFBS_None, // VFMADD132PSZ128mk = 9425 |
| 149159 | CEFBS_None, // VFMADD132PSZ128mkz = 9426 |
| 149160 | CEFBS_None, // VFMADD132PSZ128r = 9427 |
| 149161 | CEFBS_None, // VFMADD132PSZ128rk = 9428 |
| 149162 | CEFBS_None, // VFMADD132PSZ128rkz = 9429 |
| 149163 | CEFBS_None, // VFMADD132PSZ256m = 9430 |
| 149164 | CEFBS_None, // VFMADD132PSZ256mb = 9431 |
| 149165 | CEFBS_None, // VFMADD132PSZ256mbk = 9432 |
| 149166 | CEFBS_None, // VFMADD132PSZ256mbkz = 9433 |
| 149167 | CEFBS_None, // VFMADD132PSZ256mk = 9434 |
| 149168 | CEFBS_None, // VFMADD132PSZ256mkz = 9435 |
| 149169 | CEFBS_None, // VFMADD132PSZ256r = 9436 |
| 149170 | CEFBS_None, // VFMADD132PSZ256rk = 9437 |
| 149171 | CEFBS_None, // VFMADD132PSZ256rkz = 9438 |
| 149172 | CEFBS_None, // VFMADD132PSZm = 9439 |
| 149173 | CEFBS_None, // VFMADD132PSZmb = 9440 |
| 149174 | CEFBS_None, // VFMADD132PSZmbk = 9441 |
| 149175 | CEFBS_None, // VFMADD132PSZmbkz = 9442 |
| 149176 | CEFBS_None, // VFMADD132PSZmk = 9443 |
| 149177 | CEFBS_None, // VFMADD132PSZmkz = 9444 |
| 149178 | CEFBS_None, // VFMADD132PSZr = 9445 |
| 149179 | CEFBS_None, // VFMADD132PSZrb = 9446 |
| 149180 | CEFBS_None, // VFMADD132PSZrbk = 9447 |
| 149181 | CEFBS_None, // VFMADD132PSZrbkz = 9448 |
| 149182 | CEFBS_None, // VFMADD132PSZrk = 9449 |
| 149183 | CEFBS_None, // VFMADD132PSZrkz = 9450 |
| 149184 | CEFBS_None, // VFMADD132PSm = 9451 |
| 149185 | CEFBS_None, // VFMADD132PSr = 9452 |
| 149186 | CEFBS_None, // VFMADD132SDZm = 9453 |
| 149187 | CEFBS_None, // VFMADD132SDZm_Int = 9454 |
| 149188 | CEFBS_None, // VFMADD132SDZmk_Int = 9455 |
| 149189 | CEFBS_None, // VFMADD132SDZmkz_Int = 9456 |
| 149190 | CEFBS_None, // VFMADD132SDZr = 9457 |
| 149191 | CEFBS_None, // VFMADD132SDZr_Int = 9458 |
| 149192 | CEFBS_None, // VFMADD132SDZrb = 9459 |
| 149193 | CEFBS_None, // VFMADD132SDZrb_Int = 9460 |
| 149194 | CEFBS_None, // VFMADD132SDZrbk_Int = 9461 |
| 149195 | CEFBS_None, // VFMADD132SDZrbkz_Int = 9462 |
| 149196 | CEFBS_None, // VFMADD132SDZrk_Int = 9463 |
| 149197 | CEFBS_None, // VFMADD132SDZrkz_Int = 9464 |
| 149198 | CEFBS_None, // VFMADD132SDm = 9465 |
| 149199 | CEFBS_None, // VFMADD132SDm_Int = 9466 |
| 149200 | CEFBS_None, // VFMADD132SDr = 9467 |
| 149201 | CEFBS_None, // VFMADD132SDr_Int = 9468 |
| 149202 | CEFBS_None, // VFMADD132SHZm = 9469 |
| 149203 | CEFBS_None, // VFMADD132SHZm_Int = 9470 |
| 149204 | CEFBS_None, // VFMADD132SHZmk_Int = 9471 |
| 149205 | CEFBS_None, // VFMADD132SHZmkz_Int = 9472 |
| 149206 | CEFBS_None, // VFMADD132SHZr = 9473 |
| 149207 | CEFBS_None, // VFMADD132SHZr_Int = 9474 |
| 149208 | CEFBS_None, // VFMADD132SHZrb = 9475 |
| 149209 | CEFBS_None, // VFMADD132SHZrb_Int = 9476 |
| 149210 | CEFBS_None, // VFMADD132SHZrbk_Int = 9477 |
| 149211 | CEFBS_None, // VFMADD132SHZrbkz_Int = 9478 |
| 149212 | CEFBS_None, // VFMADD132SHZrk_Int = 9479 |
| 149213 | CEFBS_None, // VFMADD132SHZrkz_Int = 9480 |
| 149214 | CEFBS_None, // VFMADD132SSZm = 9481 |
| 149215 | CEFBS_None, // VFMADD132SSZm_Int = 9482 |
| 149216 | CEFBS_None, // VFMADD132SSZmk_Int = 9483 |
| 149217 | CEFBS_None, // VFMADD132SSZmkz_Int = 9484 |
| 149218 | CEFBS_None, // VFMADD132SSZr = 9485 |
| 149219 | CEFBS_None, // VFMADD132SSZr_Int = 9486 |
| 149220 | CEFBS_None, // VFMADD132SSZrb = 9487 |
| 149221 | CEFBS_None, // VFMADD132SSZrb_Int = 9488 |
| 149222 | CEFBS_None, // VFMADD132SSZrbk_Int = 9489 |
| 149223 | CEFBS_None, // VFMADD132SSZrbkz_Int = 9490 |
| 149224 | CEFBS_None, // VFMADD132SSZrk_Int = 9491 |
| 149225 | CEFBS_None, // VFMADD132SSZrkz_Int = 9492 |
| 149226 | CEFBS_None, // VFMADD132SSm = 9493 |
| 149227 | CEFBS_None, // VFMADD132SSm_Int = 9494 |
| 149228 | CEFBS_None, // VFMADD132SSr = 9495 |
| 149229 | CEFBS_None, // VFMADD132SSr_Int = 9496 |
| 149230 | CEFBS_None, // VFMADD213BF16Z128m = 9497 |
| 149231 | CEFBS_None, // VFMADD213BF16Z128mb = 9498 |
| 149232 | CEFBS_None, // VFMADD213BF16Z128mbk = 9499 |
| 149233 | CEFBS_None, // VFMADD213BF16Z128mbkz = 9500 |
| 149234 | CEFBS_None, // VFMADD213BF16Z128mk = 9501 |
| 149235 | CEFBS_None, // VFMADD213BF16Z128mkz = 9502 |
| 149236 | CEFBS_None, // VFMADD213BF16Z128r = 9503 |
| 149237 | CEFBS_None, // VFMADD213BF16Z128rk = 9504 |
| 149238 | CEFBS_None, // VFMADD213BF16Z128rkz = 9505 |
| 149239 | CEFBS_None, // VFMADD213BF16Z256m = 9506 |
| 149240 | CEFBS_None, // VFMADD213BF16Z256mb = 9507 |
| 149241 | CEFBS_None, // VFMADD213BF16Z256mbk = 9508 |
| 149242 | CEFBS_None, // VFMADD213BF16Z256mbkz = 9509 |
| 149243 | CEFBS_None, // VFMADD213BF16Z256mk = 9510 |
| 149244 | CEFBS_None, // VFMADD213BF16Z256mkz = 9511 |
| 149245 | CEFBS_None, // VFMADD213BF16Z256r = 9512 |
| 149246 | CEFBS_None, // VFMADD213BF16Z256rk = 9513 |
| 149247 | CEFBS_None, // VFMADD213BF16Z256rkz = 9514 |
| 149248 | CEFBS_None, // VFMADD213BF16Zm = 9515 |
| 149249 | CEFBS_None, // VFMADD213BF16Zmb = 9516 |
| 149250 | CEFBS_None, // VFMADD213BF16Zmbk = 9517 |
| 149251 | CEFBS_None, // VFMADD213BF16Zmbkz = 9518 |
| 149252 | CEFBS_None, // VFMADD213BF16Zmk = 9519 |
| 149253 | CEFBS_None, // VFMADD213BF16Zmkz = 9520 |
| 149254 | CEFBS_None, // VFMADD213BF16Zr = 9521 |
| 149255 | CEFBS_None, // VFMADD213BF16Zrk = 9522 |
| 149256 | CEFBS_None, // VFMADD213BF16Zrkz = 9523 |
| 149257 | CEFBS_None, // VFMADD213PDYm = 9524 |
| 149258 | CEFBS_None, // VFMADD213PDYr = 9525 |
| 149259 | CEFBS_None, // VFMADD213PDZ128m = 9526 |
| 149260 | CEFBS_None, // VFMADD213PDZ128mb = 9527 |
| 149261 | CEFBS_None, // VFMADD213PDZ128mbk = 9528 |
| 149262 | CEFBS_None, // VFMADD213PDZ128mbkz = 9529 |
| 149263 | CEFBS_None, // VFMADD213PDZ128mk = 9530 |
| 149264 | CEFBS_None, // VFMADD213PDZ128mkz = 9531 |
| 149265 | CEFBS_None, // VFMADD213PDZ128r = 9532 |
| 149266 | CEFBS_None, // VFMADD213PDZ128rk = 9533 |
| 149267 | CEFBS_None, // VFMADD213PDZ128rkz = 9534 |
| 149268 | CEFBS_None, // VFMADD213PDZ256m = 9535 |
| 149269 | CEFBS_None, // VFMADD213PDZ256mb = 9536 |
| 149270 | CEFBS_None, // VFMADD213PDZ256mbk = 9537 |
| 149271 | CEFBS_None, // VFMADD213PDZ256mbkz = 9538 |
| 149272 | CEFBS_None, // VFMADD213PDZ256mk = 9539 |
| 149273 | CEFBS_None, // VFMADD213PDZ256mkz = 9540 |
| 149274 | CEFBS_None, // VFMADD213PDZ256r = 9541 |
| 149275 | CEFBS_None, // VFMADD213PDZ256rk = 9542 |
| 149276 | CEFBS_None, // VFMADD213PDZ256rkz = 9543 |
| 149277 | CEFBS_None, // VFMADD213PDZm = 9544 |
| 149278 | CEFBS_None, // VFMADD213PDZmb = 9545 |
| 149279 | CEFBS_None, // VFMADD213PDZmbk = 9546 |
| 149280 | CEFBS_None, // VFMADD213PDZmbkz = 9547 |
| 149281 | CEFBS_None, // VFMADD213PDZmk = 9548 |
| 149282 | CEFBS_None, // VFMADD213PDZmkz = 9549 |
| 149283 | CEFBS_None, // VFMADD213PDZr = 9550 |
| 149284 | CEFBS_None, // VFMADD213PDZrb = 9551 |
| 149285 | CEFBS_None, // VFMADD213PDZrbk = 9552 |
| 149286 | CEFBS_None, // VFMADD213PDZrbkz = 9553 |
| 149287 | CEFBS_None, // VFMADD213PDZrk = 9554 |
| 149288 | CEFBS_None, // VFMADD213PDZrkz = 9555 |
| 149289 | CEFBS_None, // VFMADD213PDm = 9556 |
| 149290 | CEFBS_None, // VFMADD213PDr = 9557 |
| 149291 | CEFBS_None, // VFMADD213PHZ128m = 9558 |
| 149292 | CEFBS_None, // VFMADD213PHZ128mb = 9559 |
| 149293 | CEFBS_None, // VFMADD213PHZ128mbk = 9560 |
| 149294 | CEFBS_None, // VFMADD213PHZ128mbkz = 9561 |
| 149295 | CEFBS_None, // VFMADD213PHZ128mk = 9562 |
| 149296 | CEFBS_None, // VFMADD213PHZ128mkz = 9563 |
| 149297 | CEFBS_None, // VFMADD213PHZ128r = 9564 |
| 149298 | CEFBS_None, // VFMADD213PHZ128rk = 9565 |
| 149299 | CEFBS_None, // VFMADD213PHZ128rkz = 9566 |
| 149300 | CEFBS_None, // VFMADD213PHZ256m = 9567 |
| 149301 | CEFBS_None, // VFMADD213PHZ256mb = 9568 |
| 149302 | CEFBS_None, // VFMADD213PHZ256mbk = 9569 |
| 149303 | CEFBS_None, // VFMADD213PHZ256mbkz = 9570 |
| 149304 | CEFBS_None, // VFMADD213PHZ256mk = 9571 |
| 149305 | CEFBS_None, // VFMADD213PHZ256mkz = 9572 |
| 149306 | CEFBS_None, // VFMADD213PHZ256r = 9573 |
| 149307 | CEFBS_None, // VFMADD213PHZ256rk = 9574 |
| 149308 | CEFBS_None, // VFMADD213PHZ256rkz = 9575 |
| 149309 | CEFBS_None, // VFMADD213PHZm = 9576 |
| 149310 | CEFBS_None, // VFMADD213PHZmb = 9577 |
| 149311 | CEFBS_None, // VFMADD213PHZmbk = 9578 |
| 149312 | CEFBS_None, // VFMADD213PHZmbkz = 9579 |
| 149313 | CEFBS_None, // VFMADD213PHZmk = 9580 |
| 149314 | CEFBS_None, // VFMADD213PHZmkz = 9581 |
| 149315 | CEFBS_None, // VFMADD213PHZr = 9582 |
| 149316 | CEFBS_None, // VFMADD213PHZrb = 9583 |
| 149317 | CEFBS_None, // VFMADD213PHZrbk = 9584 |
| 149318 | CEFBS_None, // VFMADD213PHZrbkz = 9585 |
| 149319 | CEFBS_None, // VFMADD213PHZrk = 9586 |
| 149320 | CEFBS_None, // VFMADD213PHZrkz = 9587 |
| 149321 | CEFBS_None, // VFMADD213PSYm = 9588 |
| 149322 | CEFBS_None, // VFMADD213PSYr = 9589 |
| 149323 | CEFBS_None, // VFMADD213PSZ128m = 9590 |
| 149324 | CEFBS_None, // VFMADD213PSZ128mb = 9591 |
| 149325 | CEFBS_None, // VFMADD213PSZ128mbk = 9592 |
| 149326 | CEFBS_None, // VFMADD213PSZ128mbkz = 9593 |
| 149327 | CEFBS_None, // VFMADD213PSZ128mk = 9594 |
| 149328 | CEFBS_None, // VFMADD213PSZ128mkz = 9595 |
| 149329 | CEFBS_None, // VFMADD213PSZ128r = 9596 |
| 149330 | CEFBS_None, // VFMADD213PSZ128rk = 9597 |
| 149331 | CEFBS_None, // VFMADD213PSZ128rkz = 9598 |
| 149332 | CEFBS_None, // VFMADD213PSZ256m = 9599 |
| 149333 | CEFBS_None, // VFMADD213PSZ256mb = 9600 |
| 149334 | CEFBS_None, // VFMADD213PSZ256mbk = 9601 |
| 149335 | CEFBS_None, // VFMADD213PSZ256mbkz = 9602 |
| 149336 | CEFBS_None, // VFMADD213PSZ256mk = 9603 |
| 149337 | CEFBS_None, // VFMADD213PSZ256mkz = 9604 |
| 149338 | CEFBS_None, // VFMADD213PSZ256r = 9605 |
| 149339 | CEFBS_None, // VFMADD213PSZ256rk = 9606 |
| 149340 | CEFBS_None, // VFMADD213PSZ256rkz = 9607 |
| 149341 | CEFBS_None, // VFMADD213PSZm = 9608 |
| 149342 | CEFBS_None, // VFMADD213PSZmb = 9609 |
| 149343 | CEFBS_None, // VFMADD213PSZmbk = 9610 |
| 149344 | CEFBS_None, // VFMADD213PSZmbkz = 9611 |
| 149345 | CEFBS_None, // VFMADD213PSZmk = 9612 |
| 149346 | CEFBS_None, // VFMADD213PSZmkz = 9613 |
| 149347 | CEFBS_None, // VFMADD213PSZr = 9614 |
| 149348 | CEFBS_None, // VFMADD213PSZrb = 9615 |
| 149349 | CEFBS_None, // VFMADD213PSZrbk = 9616 |
| 149350 | CEFBS_None, // VFMADD213PSZrbkz = 9617 |
| 149351 | CEFBS_None, // VFMADD213PSZrk = 9618 |
| 149352 | CEFBS_None, // VFMADD213PSZrkz = 9619 |
| 149353 | CEFBS_None, // VFMADD213PSm = 9620 |
| 149354 | CEFBS_None, // VFMADD213PSr = 9621 |
| 149355 | CEFBS_None, // VFMADD213SDZm = 9622 |
| 149356 | CEFBS_None, // VFMADD213SDZm_Int = 9623 |
| 149357 | CEFBS_None, // VFMADD213SDZmk_Int = 9624 |
| 149358 | CEFBS_None, // VFMADD213SDZmkz_Int = 9625 |
| 149359 | CEFBS_None, // VFMADD213SDZr = 9626 |
| 149360 | CEFBS_None, // VFMADD213SDZr_Int = 9627 |
| 149361 | CEFBS_None, // VFMADD213SDZrb = 9628 |
| 149362 | CEFBS_None, // VFMADD213SDZrb_Int = 9629 |
| 149363 | CEFBS_None, // VFMADD213SDZrbk_Int = 9630 |
| 149364 | CEFBS_None, // VFMADD213SDZrbkz_Int = 9631 |
| 149365 | CEFBS_None, // VFMADD213SDZrk_Int = 9632 |
| 149366 | CEFBS_None, // VFMADD213SDZrkz_Int = 9633 |
| 149367 | CEFBS_None, // VFMADD213SDm = 9634 |
| 149368 | CEFBS_None, // VFMADD213SDm_Int = 9635 |
| 149369 | CEFBS_None, // VFMADD213SDr = 9636 |
| 149370 | CEFBS_None, // VFMADD213SDr_Int = 9637 |
| 149371 | CEFBS_None, // VFMADD213SHZm = 9638 |
| 149372 | CEFBS_None, // VFMADD213SHZm_Int = 9639 |
| 149373 | CEFBS_None, // VFMADD213SHZmk_Int = 9640 |
| 149374 | CEFBS_None, // VFMADD213SHZmkz_Int = 9641 |
| 149375 | CEFBS_None, // VFMADD213SHZr = 9642 |
| 149376 | CEFBS_None, // VFMADD213SHZr_Int = 9643 |
| 149377 | CEFBS_None, // VFMADD213SHZrb = 9644 |
| 149378 | CEFBS_None, // VFMADD213SHZrb_Int = 9645 |
| 149379 | CEFBS_None, // VFMADD213SHZrbk_Int = 9646 |
| 149380 | CEFBS_None, // VFMADD213SHZrbkz_Int = 9647 |
| 149381 | CEFBS_None, // VFMADD213SHZrk_Int = 9648 |
| 149382 | CEFBS_None, // VFMADD213SHZrkz_Int = 9649 |
| 149383 | CEFBS_None, // VFMADD213SSZm = 9650 |
| 149384 | CEFBS_None, // VFMADD213SSZm_Int = 9651 |
| 149385 | CEFBS_None, // VFMADD213SSZmk_Int = 9652 |
| 149386 | CEFBS_None, // VFMADD213SSZmkz_Int = 9653 |
| 149387 | CEFBS_None, // VFMADD213SSZr = 9654 |
| 149388 | CEFBS_None, // VFMADD213SSZr_Int = 9655 |
| 149389 | CEFBS_None, // VFMADD213SSZrb = 9656 |
| 149390 | CEFBS_None, // VFMADD213SSZrb_Int = 9657 |
| 149391 | CEFBS_None, // VFMADD213SSZrbk_Int = 9658 |
| 149392 | CEFBS_None, // VFMADD213SSZrbkz_Int = 9659 |
| 149393 | CEFBS_None, // VFMADD213SSZrk_Int = 9660 |
| 149394 | CEFBS_None, // VFMADD213SSZrkz_Int = 9661 |
| 149395 | CEFBS_None, // VFMADD213SSm = 9662 |
| 149396 | CEFBS_None, // VFMADD213SSm_Int = 9663 |
| 149397 | CEFBS_None, // VFMADD213SSr = 9664 |
| 149398 | CEFBS_None, // VFMADD213SSr_Int = 9665 |
| 149399 | CEFBS_None, // VFMADD231BF16Z128m = 9666 |
| 149400 | CEFBS_None, // VFMADD231BF16Z128mb = 9667 |
| 149401 | CEFBS_None, // VFMADD231BF16Z128mbk = 9668 |
| 149402 | CEFBS_None, // VFMADD231BF16Z128mbkz = 9669 |
| 149403 | CEFBS_None, // VFMADD231BF16Z128mk = 9670 |
| 149404 | CEFBS_None, // VFMADD231BF16Z128mkz = 9671 |
| 149405 | CEFBS_None, // VFMADD231BF16Z128r = 9672 |
| 149406 | CEFBS_None, // VFMADD231BF16Z128rk = 9673 |
| 149407 | CEFBS_None, // VFMADD231BF16Z128rkz = 9674 |
| 149408 | CEFBS_None, // VFMADD231BF16Z256m = 9675 |
| 149409 | CEFBS_None, // VFMADD231BF16Z256mb = 9676 |
| 149410 | CEFBS_None, // VFMADD231BF16Z256mbk = 9677 |
| 149411 | CEFBS_None, // VFMADD231BF16Z256mbkz = 9678 |
| 149412 | CEFBS_None, // VFMADD231BF16Z256mk = 9679 |
| 149413 | CEFBS_None, // VFMADD231BF16Z256mkz = 9680 |
| 149414 | CEFBS_None, // VFMADD231BF16Z256r = 9681 |
| 149415 | CEFBS_None, // VFMADD231BF16Z256rk = 9682 |
| 149416 | CEFBS_None, // VFMADD231BF16Z256rkz = 9683 |
| 149417 | CEFBS_None, // VFMADD231BF16Zm = 9684 |
| 149418 | CEFBS_None, // VFMADD231BF16Zmb = 9685 |
| 149419 | CEFBS_None, // VFMADD231BF16Zmbk = 9686 |
| 149420 | CEFBS_None, // VFMADD231BF16Zmbkz = 9687 |
| 149421 | CEFBS_None, // VFMADD231BF16Zmk = 9688 |
| 149422 | CEFBS_None, // VFMADD231BF16Zmkz = 9689 |
| 149423 | CEFBS_None, // VFMADD231BF16Zr = 9690 |
| 149424 | CEFBS_None, // VFMADD231BF16Zrk = 9691 |
| 149425 | CEFBS_None, // VFMADD231BF16Zrkz = 9692 |
| 149426 | CEFBS_None, // VFMADD231PDYm = 9693 |
| 149427 | CEFBS_None, // VFMADD231PDYr = 9694 |
| 149428 | CEFBS_None, // VFMADD231PDZ128m = 9695 |
| 149429 | CEFBS_None, // VFMADD231PDZ128mb = 9696 |
| 149430 | CEFBS_None, // VFMADD231PDZ128mbk = 9697 |
| 149431 | CEFBS_None, // VFMADD231PDZ128mbkz = 9698 |
| 149432 | CEFBS_None, // VFMADD231PDZ128mk = 9699 |
| 149433 | CEFBS_None, // VFMADD231PDZ128mkz = 9700 |
| 149434 | CEFBS_None, // VFMADD231PDZ128r = 9701 |
| 149435 | CEFBS_None, // VFMADD231PDZ128rk = 9702 |
| 149436 | CEFBS_None, // VFMADD231PDZ128rkz = 9703 |
| 149437 | CEFBS_None, // VFMADD231PDZ256m = 9704 |
| 149438 | CEFBS_None, // VFMADD231PDZ256mb = 9705 |
| 149439 | CEFBS_None, // VFMADD231PDZ256mbk = 9706 |
| 149440 | CEFBS_None, // VFMADD231PDZ256mbkz = 9707 |
| 149441 | CEFBS_None, // VFMADD231PDZ256mk = 9708 |
| 149442 | CEFBS_None, // VFMADD231PDZ256mkz = 9709 |
| 149443 | CEFBS_None, // VFMADD231PDZ256r = 9710 |
| 149444 | CEFBS_None, // VFMADD231PDZ256rk = 9711 |
| 149445 | CEFBS_None, // VFMADD231PDZ256rkz = 9712 |
| 149446 | CEFBS_None, // VFMADD231PDZm = 9713 |
| 149447 | CEFBS_None, // VFMADD231PDZmb = 9714 |
| 149448 | CEFBS_None, // VFMADD231PDZmbk = 9715 |
| 149449 | CEFBS_None, // VFMADD231PDZmbkz = 9716 |
| 149450 | CEFBS_None, // VFMADD231PDZmk = 9717 |
| 149451 | CEFBS_None, // VFMADD231PDZmkz = 9718 |
| 149452 | CEFBS_None, // VFMADD231PDZr = 9719 |
| 149453 | CEFBS_None, // VFMADD231PDZrb = 9720 |
| 149454 | CEFBS_None, // VFMADD231PDZrbk = 9721 |
| 149455 | CEFBS_None, // VFMADD231PDZrbkz = 9722 |
| 149456 | CEFBS_None, // VFMADD231PDZrk = 9723 |
| 149457 | CEFBS_None, // VFMADD231PDZrkz = 9724 |
| 149458 | CEFBS_None, // VFMADD231PDm = 9725 |
| 149459 | CEFBS_None, // VFMADD231PDr = 9726 |
| 149460 | CEFBS_None, // VFMADD231PHZ128m = 9727 |
| 149461 | CEFBS_None, // VFMADD231PHZ128mb = 9728 |
| 149462 | CEFBS_None, // VFMADD231PHZ128mbk = 9729 |
| 149463 | CEFBS_None, // VFMADD231PHZ128mbkz = 9730 |
| 149464 | CEFBS_None, // VFMADD231PHZ128mk = 9731 |
| 149465 | CEFBS_None, // VFMADD231PHZ128mkz = 9732 |
| 149466 | CEFBS_None, // VFMADD231PHZ128r = 9733 |
| 149467 | CEFBS_None, // VFMADD231PHZ128rk = 9734 |
| 149468 | CEFBS_None, // VFMADD231PHZ128rkz = 9735 |
| 149469 | CEFBS_None, // VFMADD231PHZ256m = 9736 |
| 149470 | CEFBS_None, // VFMADD231PHZ256mb = 9737 |
| 149471 | CEFBS_None, // VFMADD231PHZ256mbk = 9738 |
| 149472 | CEFBS_None, // VFMADD231PHZ256mbkz = 9739 |
| 149473 | CEFBS_None, // VFMADD231PHZ256mk = 9740 |
| 149474 | CEFBS_None, // VFMADD231PHZ256mkz = 9741 |
| 149475 | CEFBS_None, // VFMADD231PHZ256r = 9742 |
| 149476 | CEFBS_None, // VFMADD231PHZ256rk = 9743 |
| 149477 | CEFBS_None, // VFMADD231PHZ256rkz = 9744 |
| 149478 | CEFBS_None, // VFMADD231PHZm = 9745 |
| 149479 | CEFBS_None, // VFMADD231PHZmb = 9746 |
| 149480 | CEFBS_None, // VFMADD231PHZmbk = 9747 |
| 149481 | CEFBS_None, // VFMADD231PHZmbkz = 9748 |
| 149482 | CEFBS_None, // VFMADD231PHZmk = 9749 |
| 149483 | CEFBS_None, // VFMADD231PHZmkz = 9750 |
| 149484 | CEFBS_None, // VFMADD231PHZr = 9751 |
| 149485 | CEFBS_None, // VFMADD231PHZrb = 9752 |
| 149486 | CEFBS_None, // VFMADD231PHZrbk = 9753 |
| 149487 | CEFBS_None, // VFMADD231PHZrbkz = 9754 |
| 149488 | CEFBS_None, // VFMADD231PHZrk = 9755 |
| 149489 | CEFBS_None, // VFMADD231PHZrkz = 9756 |
| 149490 | CEFBS_None, // VFMADD231PSYm = 9757 |
| 149491 | CEFBS_None, // VFMADD231PSYr = 9758 |
| 149492 | CEFBS_None, // VFMADD231PSZ128m = 9759 |
| 149493 | CEFBS_None, // VFMADD231PSZ128mb = 9760 |
| 149494 | CEFBS_None, // VFMADD231PSZ128mbk = 9761 |
| 149495 | CEFBS_None, // VFMADD231PSZ128mbkz = 9762 |
| 149496 | CEFBS_None, // VFMADD231PSZ128mk = 9763 |
| 149497 | CEFBS_None, // VFMADD231PSZ128mkz = 9764 |
| 149498 | CEFBS_None, // VFMADD231PSZ128r = 9765 |
| 149499 | CEFBS_None, // VFMADD231PSZ128rk = 9766 |
| 149500 | CEFBS_None, // VFMADD231PSZ128rkz = 9767 |
| 149501 | CEFBS_None, // VFMADD231PSZ256m = 9768 |
| 149502 | CEFBS_None, // VFMADD231PSZ256mb = 9769 |
| 149503 | CEFBS_None, // VFMADD231PSZ256mbk = 9770 |
| 149504 | CEFBS_None, // VFMADD231PSZ256mbkz = 9771 |
| 149505 | CEFBS_None, // VFMADD231PSZ256mk = 9772 |
| 149506 | CEFBS_None, // VFMADD231PSZ256mkz = 9773 |
| 149507 | CEFBS_None, // VFMADD231PSZ256r = 9774 |
| 149508 | CEFBS_None, // VFMADD231PSZ256rk = 9775 |
| 149509 | CEFBS_None, // VFMADD231PSZ256rkz = 9776 |
| 149510 | CEFBS_None, // VFMADD231PSZm = 9777 |
| 149511 | CEFBS_None, // VFMADD231PSZmb = 9778 |
| 149512 | CEFBS_None, // VFMADD231PSZmbk = 9779 |
| 149513 | CEFBS_None, // VFMADD231PSZmbkz = 9780 |
| 149514 | CEFBS_None, // VFMADD231PSZmk = 9781 |
| 149515 | CEFBS_None, // VFMADD231PSZmkz = 9782 |
| 149516 | CEFBS_None, // VFMADD231PSZr = 9783 |
| 149517 | CEFBS_None, // VFMADD231PSZrb = 9784 |
| 149518 | CEFBS_None, // VFMADD231PSZrbk = 9785 |
| 149519 | CEFBS_None, // VFMADD231PSZrbkz = 9786 |
| 149520 | CEFBS_None, // VFMADD231PSZrk = 9787 |
| 149521 | CEFBS_None, // VFMADD231PSZrkz = 9788 |
| 149522 | CEFBS_None, // VFMADD231PSm = 9789 |
| 149523 | CEFBS_None, // VFMADD231PSr = 9790 |
| 149524 | CEFBS_None, // VFMADD231SDZm = 9791 |
| 149525 | CEFBS_None, // VFMADD231SDZm_Int = 9792 |
| 149526 | CEFBS_None, // VFMADD231SDZmk_Int = 9793 |
| 149527 | CEFBS_None, // VFMADD231SDZmkz_Int = 9794 |
| 149528 | CEFBS_None, // VFMADD231SDZr = 9795 |
| 149529 | CEFBS_None, // VFMADD231SDZr_Int = 9796 |
| 149530 | CEFBS_None, // VFMADD231SDZrb = 9797 |
| 149531 | CEFBS_None, // VFMADD231SDZrb_Int = 9798 |
| 149532 | CEFBS_None, // VFMADD231SDZrbk_Int = 9799 |
| 149533 | CEFBS_None, // VFMADD231SDZrbkz_Int = 9800 |
| 149534 | CEFBS_None, // VFMADD231SDZrk_Int = 9801 |
| 149535 | CEFBS_None, // VFMADD231SDZrkz_Int = 9802 |
| 149536 | CEFBS_None, // VFMADD231SDm = 9803 |
| 149537 | CEFBS_None, // VFMADD231SDm_Int = 9804 |
| 149538 | CEFBS_None, // VFMADD231SDr = 9805 |
| 149539 | CEFBS_None, // VFMADD231SDr_Int = 9806 |
| 149540 | CEFBS_None, // VFMADD231SHZm = 9807 |
| 149541 | CEFBS_None, // VFMADD231SHZm_Int = 9808 |
| 149542 | CEFBS_None, // VFMADD231SHZmk_Int = 9809 |
| 149543 | CEFBS_None, // VFMADD231SHZmkz_Int = 9810 |
| 149544 | CEFBS_None, // VFMADD231SHZr = 9811 |
| 149545 | CEFBS_None, // VFMADD231SHZr_Int = 9812 |
| 149546 | CEFBS_None, // VFMADD231SHZrb = 9813 |
| 149547 | CEFBS_None, // VFMADD231SHZrb_Int = 9814 |
| 149548 | CEFBS_None, // VFMADD231SHZrbk_Int = 9815 |
| 149549 | CEFBS_None, // VFMADD231SHZrbkz_Int = 9816 |
| 149550 | CEFBS_None, // VFMADD231SHZrk_Int = 9817 |
| 149551 | CEFBS_None, // VFMADD231SHZrkz_Int = 9818 |
| 149552 | CEFBS_None, // VFMADD231SSZm = 9819 |
| 149553 | CEFBS_None, // VFMADD231SSZm_Int = 9820 |
| 149554 | CEFBS_None, // VFMADD231SSZmk_Int = 9821 |
| 149555 | CEFBS_None, // VFMADD231SSZmkz_Int = 9822 |
| 149556 | CEFBS_None, // VFMADD231SSZr = 9823 |
| 149557 | CEFBS_None, // VFMADD231SSZr_Int = 9824 |
| 149558 | CEFBS_None, // VFMADD231SSZrb = 9825 |
| 149559 | CEFBS_None, // VFMADD231SSZrb_Int = 9826 |
| 149560 | CEFBS_None, // VFMADD231SSZrbk_Int = 9827 |
| 149561 | CEFBS_None, // VFMADD231SSZrbkz_Int = 9828 |
| 149562 | CEFBS_None, // VFMADD231SSZrk_Int = 9829 |
| 149563 | CEFBS_None, // VFMADD231SSZrkz_Int = 9830 |
| 149564 | CEFBS_None, // VFMADD231SSm = 9831 |
| 149565 | CEFBS_None, // VFMADD231SSm_Int = 9832 |
| 149566 | CEFBS_None, // VFMADD231SSr = 9833 |
| 149567 | CEFBS_None, // VFMADD231SSr_Int = 9834 |
| 149568 | CEFBS_None, // VFMADDCPHZ128m = 9835 |
| 149569 | CEFBS_None, // VFMADDCPHZ128mb = 9836 |
| 149570 | CEFBS_None, // VFMADDCPHZ128mbk = 9837 |
| 149571 | CEFBS_None, // VFMADDCPHZ128mbkz = 9838 |
| 149572 | CEFBS_None, // VFMADDCPHZ128mk = 9839 |
| 149573 | CEFBS_None, // VFMADDCPHZ128mkz = 9840 |
| 149574 | CEFBS_None, // VFMADDCPHZ128r = 9841 |
| 149575 | CEFBS_None, // VFMADDCPHZ128rk = 9842 |
| 149576 | CEFBS_None, // VFMADDCPHZ128rkz = 9843 |
| 149577 | CEFBS_None, // VFMADDCPHZ256m = 9844 |
| 149578 | CEFBS_None, // VFMADDCPHZ256mb = 9845 |
| 149579 | CEFBS_None, // VFMADDCPHZ256mbk = 9846 |
| 149580 | CEFBS_None, // VFMADDCPHZ256mbkz = 9847 |
| 149581 | CEFBS_None, // VFMADDCPHZ256mk = 9848 |
| 149582 | CEFBS_None, // VFMADDCPHZ256mkz = 9849 |
| 149583 | CEFBS_None, // VFMADDCPHZ256r = 9850 |
| 149584 | CEFBS_None, // VFMADDCPHZ256rk = 9851 |
| 149585 | CEFBS_None, // VFMADDCPHZ256rkz = 9852 |
| 149586 | CEFBS_None, // VFMADDCPHZm = 9853 |
| 149587 | CEFBS_None, // VFMADDCPHZmb = 9854 |
| 149588 | CEFBS_None, // VFMADDCPHZmbk = 9855 |
| 149589 | CEFBS_None, // VFMADDCPHZmbkz = 9856 |
| 149590 | CEFBS_None, // VFMADDCPHZmk = 9857 |
| 149591 | CEFBS_None, // VFMADDCPHZmkz = 9858 |
| 149592 | CEFBS_None, // VFMADDCPHZr = 9859 |
| 149593 | CEFBS_None, // VFMADDCPHZrb = 9860 |
| 149594 | CEFBS_None, // VFMADDCPHZrbk = 9861 |
| 149595 | CEFBS_None, // VFMADDCPHZrbkz = 9862 |
| 149596 | CEFBS_None, // VFMADDCPHZrk = 9863 |
| 149597 | CEFBS_None, // VFMADDCPHZrkz = 9864 |
| 149598 | CEFBS_None, // VFMADDCSHZm = 9865 |
| 149599 | CEFBS_None, // VFMADDCSHZmk = 9866 |
| 149600 | CEFBS_None, // VFMADDCSHZmkz = 9867 |
| 149601 | CEFBS_None, // VFMADDCSHZr = 9868 |
| 149602 | CEFBS_None, // VFMADDCSHZrb = 9869 |
| 149603 | CEFBS_None, // VFMADDCSHZrbk = 9870 |
| 149604 | CEFBS_None, // VFMADDCSHZrbkz = 9871 |
| 149605 | CEFBS_None, // VFMADDCSHZrk = 9872 |
| 149606 | CEFBS_None, // VFMADDCSHZrkz = 9873 |
| 149607 | CEFBS_None, // VFMADDPD4Ymr = 9874 |
| 149608 | CEFBS_None, // VFMADDPD4Yrm = 9875 |
| 149609 | CEFBS_None, // VFMADDPD4Yrr = 9876 |
| 149610 | CEFBS_None, // VFMADDPD4Yrr_REV = 9877 |
| 149611 | CEFBS_None, // VFMADDPD4mr = 9878 |
| 149612 | CEFBS_None, // VFMADDPD4rm = 9879 |
| 149613 | CEFBS_None, // VFMADDPD4rr = 9880 |
| 149614 | CEFBS_None, // VFMADDPD4rr_REV = 9881 |
| 149615 | CEFBS_None, // VFMADDPS4Ymr = 9882 |
| 149616 | CEFBS_None, // VFMADDPS4Yrm = 9883 |
| 149617 | CEFBS_None, // VFMADDPS4Yrr = 9884 |
| 149618 | CEFBS_None, // VFMADDPS4Yrr_REV = 9885 |
| 149619 | CEFBS_None, // VFMADDPS4mr = 9886 |
| 149620 | CEFBS_None, // VFMADDPS4rm = 9887 |
| 149621 | CEFBS_None, // VFMADDPS4rr = 9888 |
| 149622 | CEFBS_None, // VFMADDPS4rr_REV = 9889 |
| 149623 | CEFBS_None, // VFMADDSD4mr = 9890 |
| 149624 | CEFBS_None, // VFMADDSD4mr_Int = 9891 |
| 149625 | CEFBS_None, // VFMADDSD4rm = 9892 |
| 149626 | CEFBS_None, // VFMADDSD4rm_Int = 9893 |
| 149627 | CEFBS_None, // VFMADDSD4rr = 9894 |
| 149628 | CEFBS_None, // VFMADDSD4rr_Int = 9895 |
| 149629 | CEFBS_None, // VFMADDSD4rr_Int_REV = 9896 |
| 149630 | CEFBS_None, // VFMADDSD4rr_REV = 9897 |
| 149631 | CEFBS_None, // VFMADDSS4mr = 9898 |
| 149632 | CEFBS_None, // VFMADDSS4mr_Int = 9899 |
| 149633 | CEFBS_None, // VFMADDSS4rm = 9900 |
| 149634 | CEFBS_None, // VFMADDSS4rm_Int = 9901 |
| 149635 | CEFBS_None, // VFMADDSS4rr = 9902 |
| 149636 | CEFBS_None, // VFMADDSS4rr_Int = 9903 |
| 149637 | CEFBS_None, // VFMADDSS4rr_Int_REV = 9904 |
| 149638 | CEFBS_None, // VFMADDSS4rr_REV = 9905 |
| 149639 | CEFBS_None, // VFMADDSUB132PDYm = 9906 |
| 149640 | CEFBS_None, // VFMADDSUB132PDYr = 9907 |
| 149641 | CEFBS_None, // VFMADDSUB132PDZ128m = 9908 |
| 149642 | CEFBS_None, // VFMADDSUB132PDZ128mb = 9909 |
| 149643 | CEFBS_None, // VFMADDSUB132PDZ128mbk = 9910 |
| 149644 | CEFBS_None, // VFMADDSUB132PDZ128mbkz = 9911 |
| 149645 | CEFBS_None, // VFMADDSUB132PDZ128mk = 9912 |
| 149646 | CEFBS_None, // VFMADDSUB132PDZ128mkz = 9913 |
| 149647 | CEFBS_None, // VFMADDSUB132PDZ128r = 9914 |
| 149648 | CEFBS_None, // VFMADDSUB132PDZ128rk = 9915 |
| 149649 | CEFBS_None, // VFMADDSUB132PDZ128rkz = 9916 |
| 149650 | CEFBS_None, // VFMADDSUB132PDZ256m = 9917 |
| 149651 | CEFBS_None, // VFMADDSUB132PDZ256mb = 9918 |
| 149652 | CEFBS_None, // VFMADDSUB132PDZ256mbk = 9919 |
| 149653 | CEFBS_None, // VFMADDSUB132PDZ256mbkz = 9920 |
| 149654 | CEFBS_None, // VFMADDSUB132PDZ256mk = 9921 |
| 149655 | CEFBS_None, // VFMADDSUB132PDZ256mkz = 9922 |
| 149656 | CEFBS_None, // VFMADDSUB132PDZ256r = 9923 |
| 149657 | CEFBS_None, // VFMADDSUB132PDZ256rk = 9924 |
| 149658 | CEFBS_None, // VFMADDSUB132PDZ256rkz = 9925 |
| 149659 | CEFBS_None, // VFMADDSUB132PDZm = 9926 |
| 149660 | CEFBS_None, // VFMADDSUB132PDZmb = 9927 |
| 149661 | CEFBS_None, // VFMADDSUB132PDZmbk = 9928 |
| 149662 | CEFBS_None, // VFMADDSUB132PDZmbkz = 9929 |
| 149663 | CEFBS_None, // VFMADDSUB132PDZmk = 9930 |
| 149664 | CEFBS_None, // VFMADDSUB132PDZmkz = 9931 |
| 149665 | CEFBS_None, // VFMADDSUB132PDZr = 9932 |
| 149666 | CEFBS_None, // VFMADDSUB132PDZrb = 9933 |
| 149667 | CEFBS_None, // VFMADDSUB132PDZrbk = 9934 |
| 149668 | CEFBS_None, // VFMADDSUB132PDZrbkz = 9935 |
| 149669 | CEFBS_None, // VFMADDSUB132PDZrk = 9936 |
| 149670 | CEFBS_None, // VFMADDSUB132PDZrkz = 9937 |
| 149671 | CEFBS_None, // VFMADDSUB132PDm = 9938 |
| 149672 | CEFBS_None, // VFMADDSUB132PDr = 9939 |
| 149673 | CEFBS_None, // VFMADDSUB132PHZ128m = 9940 |
| 149674 | CEFBS_None, // VFMADDSUB132PHZ128mb = 9941 |
| 149675 | CEFBS_None, // VFMADDSUB132PHZ128mbk = 9942 |
| 149676 | CEFBS_None, // VFMADDSUB132PHZ128mbkz = 9943 |
| 149677 | CEFBS_None, // VFMADDSUB132PHZ128mk = 9944 |
| 149678 | CEFBS_None, // VFMADDSUB132PHZ128mkz = 9945 |
| 149679 | CEFBS_None, // VFMADDSUB132PHZ128r = 9946 |
| 149680 | CEFBS_None, // VFMADDSUB132PHZ128rk = 9947 |
| 149681 | CEFBS_None, // VFMADDSUB132PHZ128rkz = 9948 |
| 149682 | CEFBS_None, // VFMADDSUB132PHZ256m = 9949 |
| 149683 | CEFBS_None, // VFMADDSUB132PHZ256mb = 9950 |
| 149684 | CEFBS_None, // VFMADDSUB132PHZ256mbk = 9951 |
| 149685 | CEFBS_None, // VFMADDSUB132PHZ256mbkz = 9952 |
| 149686 | CEFBS_None, // VFMADDSUB132PHZ256mk = 9953 |
| 149687 | CEFBS_None, // VFMADDSUB132PHZ256mkz = 9954 |
| 149688 | CEFBS_None, // VFMADDSUB132PHZ256r = 9955 |
| 149689 | CEFBS_None, // VFMADDSUB132PHZ256rk = 9956 |
| 149690 | CEFBS_None, // VFMADDSUB132PHZ256rkz = 9957 |
| 149691 | CEFBS_None, // VFMADDSUB132PHZm = 9958 |
| 149692 | CEFBS_None, // VFMADDSUB132PHZmb = 9959 |
| 149693 | CEFBS_None, // VFMADDSUB132PHZmbk = 9960 |
| 149694 | CEFBS_None, // VFMADDSUB132PHZmbkz = 9961 |
| 149695 | CEFBS_None, // VFMADDSUB132PHZmk = 9962 |
| 149696 | CEFBS_None, // VFMADDSUB132PHZmkz = 9963 |
| 149697 | CEFBS_None, // VFMADDSUB132PHZr = 9964 |
| 149698 | CEFBS_None, // VFMADDSUB132PHZrb = 9965 |
| 149699 | CEFBS_None, // VFMADDSUB132PHZrbk = 9966 |
| 149700 | CEFBS_None, // VFMADDSUB132PHZrbkz = 9967 |
| 149701 | CEFBS_None, // VFMADDSUB132PHZrk = 9968 |
| 149702 | CEFBS_None, // VFMADDSUB132PHZrkz = 9969 |
| 149703 | CEFBS_None, // VFMADDSUB132PSYm = 9970 |
| 149704 | CEFBS_None, // VFMADDSUB132PSYr = 9971 |
| 149705 | CEFBS_None, // VFMADDSUB132PSZ128m = 9972 |
| 149706 | CEFBS_None, // VFMADDSUB132PSZ128mb = 9973 |
| 149707 | CEFBS_None, // VFMADDSUB132PSZ128mbk = 9974 |
| 149708 | CEFBS_None, // VFMADDSUB132PSZ128mbkz = 9975 |
| 149709 | CEFBS_None, // VFMADDSUB132PSZ128mk = 9976 |
| 149710 | CEFBS_None, // VFMADDSUB132PSZ128mkz = 9977 |
| 149711 | CEFBS_None, // VFMADDSUB132PSZ128r = 9978 |
| 149712 | CEFBS_None, // VFMADDSUB132PSZ128rk = 9979 |
| 149713 | CEFBS_None, // VFMADDSUB132PSZ128rkz = 9980 |
| 149714 | CEFBS_None, // VFMADDSUB132PSZ256m = 9981 |
| 149715 | CEFBS_None, // VFMADDSUB132PSZ256mb = 9982 |
| 149716 | CEFBS_None, // VFMADDSUB132PSZ256mbk = 9983 |
| 149717 | CEFBS_None, // VFMADDSUB132PSZ256mbkz = 9984 |
| 149718 | CEFBS_None, // VFMADDSUB132PSZ256mk = 9985 |
| 149719 | CEFBS_None, // VFMADDSUB132PSZ256mkz = 9986 |
| 149720 | CEFBS_None, // VFMADDSUB132PSZ256r = 9987 |
| 149721 | CEFBS_None, // VFMADDSUB132PSZ256rk = 9988 |
| 149722 | CEFBS_None, // VFMADDSUB132PSZ256rkz = 9989 |
| 149723 | CEFBS_None, // VFMADDSUB132PSZm = 9990 |
| 149724 | CEFBS_None, // VFMADDSUB132PSZmb = 9991 |
| 149725 | CEFBS_None, // VFMADDSUB132PSZmbk = 9992 |
| 149726 | CEFBS_None, // VFMADDSUB132PSZmbkz = 9993 |
| 149727 | CEFBS_None, // VFMADDSUB132PSZmk = 9994 |
| 149728 | CEFBS_None, // VFMADDSUB132PSZmkz = 9995 |
| 149729 | CEFBS_None, // VFMADDSUB132PSZr = 9996 |
| 149730 | CEFBS_None, // VFMADDSUB132PSZrb = 9997 |
| 149731 | CEFBS_None, // VFMADDSUB132PSZrbk = 9998 |
| 149732 | CEFBS_None, // VFMADDSUB132PSZrbkz = 9999 |
| 149733 | CEFBS_None, // VFMADDSUB132PSZrk = 10000 |
| 149734 | CEFBS_None, // VFMADDSUB132PSZrkz = 10001 |
| 149735 | CEFBS_None, // VFMADDSUB132PSm = 10002 |
| 149736 | CEFBS_None, // VFMADDSUB132PSr = 10003 |
| 149737 | CEFBS_None, // VFMADDSUB213PDYm = 10004 |
| 149738 | CEFBS_None, // VFMADDSUB213PDYr = 10005 |
| 149739 | CEFBS_None, // VFMADDSUB213PDZ128m = 10006 |
| 149740 | CEFBS_None, // VFMADDSUB213PDZ128mb = 10007 |
| 149741 | CEFBS_None, // VFMADDSUB213PDZ128mbk = 10008 |
| 149742 | CEFBS_None, // VFMADDSUB213PDZ128mbkz = 10009 |
| 149743 | CEFBS_None, // VFMADDSUB213PDZ128mk = 10010 |
| 149744 | CEFBS_None, // VFMADDSUB213PDZ128mkz = 10011 |
| 149745 | CEFBS_None, // VFMADDSUB213PDZ128r = 10012 |
| 149746 | CEFBS_None, // VFMADDSUB213PDZ128rk = 10013 |
| 149747 | CEFBS_None, // VFMADDSUB213PDZ128rkz = 10014 |
| 149748 | CEFBS_None, // VFMADDSUB213PDZ256m = 10015 |
| 149749 | CEFBS_None, // VFMADDSUB213PDZ256mb = 10016 |
| 149750 | CEFBS_None, // VFMADDSUB213PDZ256mbk = 10017 |
| 149751 | CEFBS_None, // VFMADDSUB213PDZ256mbkz = 10018 |
| 149752 | CEFBS_None, // VFMADDSUB213PDZ256mk = 10019 |
| 149753 | CEFBS_None, // VFMADDSUB213PDZ256mkz = 10020 |
| 149754 | CEFBS_None, // VFMADDSUB213PDZ256r = 10021 |
| 149755 | CEFBS_None, // VFMADDSUB213PDZ256rk = 10022 |
| 149756 | CEFBS_None, // VFMADDSUB213PDZ256rkz = 10023 |
| 149757 | CEFBS_None, // VFMADDSUB213PDZm = 10024 |
| 149758 | CEFBS_None, // VFMADDSUB213PDZmb = 10025 |
| 149759 | CEFBS_None, // VFMADDSUB213PDZmbk = 10026 |
| 149760 | CEFBS_None, // VFMADDSUB213PDZmbkz = 10027 |
| 149761 | CEFBS_None, // VFMADDSUB213PDZmk = 10028 |
| 149762 | CEFBS_None, // VFMADDSUB213PDZmkz = 10029 |
| 149763 | CEFBS_None, // VFMADDSUB213PDZr = 10030 |
| 149764 | CEFBS_None, // VFMADDSUB213PDZrb = 10031 |
| 149765 | CEFBS_None, // VFMADDSUB213PDZrbk = 10032 |
| 149766 | CEFBS_None, // VFMADDSUB213PDZrbkz = 10033 |
| 149767 | CEFBS_None, // VFMADDSUB213PDZrk = 10034 |
| 149768 | CEFBS_None, // VFMADDSUB213PDZrkz = 10035 |
| 149769 | CEFBS_None, // VFMADDSUB213PDm = 10036 |
| 149770 | CEFBS_None, // VFMADDSUB213PDr = 10037 |
| 149771 | CEFBS_None, // VFMADDSUB213PHZ128m = 10038 |
| 149772 | CEFBS_None, // VFMADDSUB213PHZ128mb = 10039 |
| 149773 | CEFBS_None, // VFMADDSUB213PHZ128mbk = 10040 |
| 149774 | CEFBS_None, // VFMADDSUB213PHZ128mbkz = 10041 |
| 149775 | CEFBS_None, // VFMADDSUB213PHZ128mk = 10042 |
| 149776 | CEFBS_None, // VFMADDSUB213PHZ128mkz = 10043 |
| 149777 | CEFBS_None, // VFMADDSUB213PHZ128r = 10044 |
| 149778 | CEFBS_None, // VFMADDSUB213PHZ128rk = 10045 |
| 149779 | CEFBS_None, // VFMADDSUB213PHZ128rkz = 10046 |
| 149780 | CEFBS_None, // VFMADDSUB213PHZ256m = 10047 |
| 149781 | CEFBS_None, // VFMADDSUB213PHZ256mb = 10048 |
| 149782 | CEFBS_None, // VFMADDSUB213PHZ256mbk = 10049 |
| 149783 | CEFBS_None, // VFMADDSUB213PHZ256mbkz = 10050 |
| 149784 | CEFBS_None, // VFMADDSUB213PHZ256mk = 10051 |
| 149785 | CEFBS_None, // VFMADDSUB213PHZ256mkz = 10052 |
| 149786 | CEFBS_None, // VFMADDSUB213PHZ256r = 10053 |
| 149787 | CEFBS_None, // VFMADDSUB213PHZ256rk = 10054 |
| 149788 | CEFBS_None, // VFMADDSUB213PHZ256rkz = 10055 |
| 149789 | CEFBS_None, // VFMADDSUB213PHZm = 10056 |
| 149790 | CEFBS_None, // VFMADDSUB213PHZmb = 10057 |
| 149791 | CEFBS_None, // VFMADDSUB213PHZmbk = 10058 |
| 149792 | CEFBS_None, // VFMADDSUB213PHZmbkz = 10059 |
| 149793 | CEFBS_None, // VFMADDSUB213PHZmk = 10060 |
| 149794 | CEFBS_None, // VFMADDSUB213PHZmkz = 10061 |
| 149795 | CEFBS_None, // VFMADDSUB213PHZr = 10062 |
| 149796 | CEFBS_None, // VFMADDSUB213PHZrb = 10063 |
| 149797 | CEFBS_None, // VFMADDSUB213PHZrbk = 10064 |
| 149798 | CEFBS_None, // VFMADDSUB213PHZrbkz = 10065 |
| 149799 | CEFBS_None, // VFMADDSUB213PHZrk = 10066 |
| 149800 | CEFBS_None, // VFMADDSUB213PHZrkz = 10067 |
| 149801 | CEFBS_None, // VFMADDSUB213PSYm = 10068 |
| 149802 | CEFBS_None, // VFMADDSUB213PSYr = 10069 |
| 149803 | CEFBS_None, // VFMADDSUB213PSZ128m = 10070 |
| 149804 | CEFBS_None, // VFMADDSUB213PSZ128mb = 10071 |
| 149805 | CEFBS_None, // VFMADDSUB213PSZ128mbk = 10072 |
| 149806 | CEFBS_None, // VFMADDSUB213PSZ128mbkz = 10073 |
| 149807 | CEFBS_None, // VFMADDSUB213PSZ128mk = 10074 |
| 149808 | CEFBS_None, // VFMADDSUB213PSZ128mkz = 10075 |
| 149809 | CEFBS_None, // VFMADDSUB213PSZ128r = 10076 |
| 149810 | CEFBS_None, // VFMADDSUB213PSZ128rk = 10077 |
| 149811 | CEFBS_None, // VFMADDSUB213PSZ128rkz = 10078 |
| 149812 | CEFBS_None, // VFMADDSUB213PSZ256m = 10079 |
| 149813 | CEFBS_None, // VFMADDSUB213PSZ256mb = 10080 |
| 149814 | CEFBS_None, // VFMADDSUB213PSZ256mbk = 10081 |
| 149815 | CEFBS_None, // VFMADDSUB213PSZ256mbkz = 10082 |
| 149816 | CEFBS_None, // VFMADDSUB213PSZ256mk = 10083 |
| 149817 | CEFBS_None, // VFMADDSUB213PSZ256mkz = 10084 |
| 149818 | CEFBS_None, // VFMADDSUB213PSZ256r = 10085 |
| 149819 | CEFBS_None, // VFMADDSUB213PSZ256rk = 10086 |
| 149820 | CEFBS_None, // VFMADDSUB213PSZ256rkz = 10087 |
| 149821 | CEFBS_None, // VFMADDSUB213PSZm = 10088 |
| 149822 | CEFBS_None, // VFMADDSUB213PSZmb = 10089 |
| 149823 | CEFBS_None, // VFMADDSUB213PSZmbk = 10090 |
| 149824 | CEFBS_None, // VFMADDSUB213PSZmbkz = 10091 |
| 149825 | CEFBS_None, // VFMADDSUB213PSZmk = 10092 |
| 149826 | CEFBS_None, // VFMADDSUB213PSZmkz = 10093 |
| 149827 | CEFBS_None, // VFMADDSUB213PSZr = 10094 |
| 149828 | CEFBS_None, // VFMADDSUB213PSZrb = 10095 |
| 149829 | CEFBS_None, // VFMADDSUB213PSZrbk = 10096 |
| 149830 | CEFBS_None, // VFMADDSUB213PSZrbkz = 10097 |
| 149831 | CEFBS_None, // VFMADDSUB213PSZrk = 10098 |
| 149832 | CEFBS_None, // VFMADDSUB213PSZrkz = 10099 |
| 149833 | CEFBS_None, // VFMADDSUB213PSm = 10100 |
| 149834 | CEFBS_None, // VFMADDSUB213PSr = 10101 |
| 149835 | CEFBS_None, // VFMADDSUB231PDYm = 10102 |
| 149836 | CEFBS_None, // VFMADDSUB231PDYr = 10103 |
| 149837 | CEFBS_None, // VFMADDSUB231PDZ128m = 10104 |
| 149838 | CEFBS_None, // VFMADDSUB231PDZ128mb = 10105 |
| 149839 | CEFBS_None, // VFMADDSUB231PDZ128mbk = 10106 |
| 149840 | CEFBS_None, // VFMADDSUB231PDZ128mbkz = 10107 |
| 149841 | CEFBS_None, // VFMADDSUB231PDZ128mk = 10108 |
| 149842 | CEFBS_None, // VFMADDSUB231PDZ128mkz = 10109 |
| 149843 | CEFBS_None, // VFMADDSUB231PDZ128r = 10110 |
| 149844 | CEFBS_None, // VFMADDSUB231PDZ128rk = 10111 |
| 149845 | CEFBS_None, // VFMADDSUB231PDZ128rkz = 10112 |
| 149846 | CEFBS_None, // VFMADDSUB231PDZ256m = 10113 |
| 149847 | CEFBS_None, // VFMADDSUB231PDZ256mb = 10114 |
| 149848 | CEFBS_None, // VFMADDSUB231PDZ256mbk = 10115 |
| 149849 | CEFBS_None, // VFMADDSUB231PDZ256mbkz = 10116 |
| 149850 | CEFBS_None, // VFMADDSUB231PDZ256mk = 10117 |
| 149851 | CEFBS_None, // VFMADDSUB231PDZ256mkz = 10118 |
| 149852 | CEFBS_None, // VFMADDSUB231PDZ256r = 10119 |
| 149853 | CEFBS_None, // VFMADDSUB231PDZ256rk = 10120 |
| 149854 | CEFBS_None, // VFMADDSUB231PDZ256rkz = 10121 |
| 149855 | CEFBS_None, // VFMADDSUB231PDZm = 10122 |
| 149856 | CEFBS_None, // VFMADDSUB231PDZmb = 10123 |
| 149857 | CEFBS_None, // VFMADDSUB231PDZmbk = 10124 |
| 149858 | CEFBS_None, // VFMADDSUB231PDZmbkz = 10125 |
| 149859 | CEFBS_None, // VFMADDSUB231PDZmk = 10126 |
| 149860 | CEFBS_None, // VFMADDSUB231PDZmkz = 10127 |
| 149861 | CEFBS_None, // VFMADDSUB231PDZr = 10128 |
| 149862 | CEFBS_None, // VFMADDSUB231PDZrb = 10129 |
| 149863 | CEFBS_None, // VFMADDSUB231PDZrbk = 10130 |
| 149864 | CEFBS_None, // VFMADDSUB231PDZrbkz = 10131 |
| 149865 | CEFBS_None, // VFMADDSUB231PDZrk = 10132 |
| 149866 | CEFBS_None, // VFMADDSUB231PDZrkz = 10133 |
| 149867 | CEFBS_None, // VFMADDSUB231PDm = 10134 |
| 149868 | CEFBS_None, // VFMADDSUB231PDr = 10135 |
| 149869 | CEFBS_None, // VFMADDSUB231PHZ128m = 10136 |
| 149870 | CEFBS_None, // VFMADDSUB231PHZ128mb = 10137 |
| 149871 | CEFBS_None, // VFMADDSUB231PHZ128mbk = 10138 |
| 149872 | CEFBS_None, // VFMADDSUB231PHZ128mbkz = 10139 |
| 149873 | CEFBS_None, // VFMADDSUB231PHZ128mk = 10140 |
| 149874 | CEFBS_None, // VFMADDSUB231PHZ128mkz = 10141 |
| 149875 | CEFBS_None, // VFMADDSUB231PHZ128r = 10142 |
| 149876 | CEFBS_None, // VFMADDSUB231PHZ128rk = 10143 |
| 149877 | CEFBS_None, // VFMADDSUB231PHZ128rkz = 10144 |
| 149878 | CEFBS_None, // VFMADDSUB231PHZ256m = 10145 |
| 149879 | CEFBS_None, // VFMADDSUB231PHZ256mb = 10146 |
| 149880 | CEFBS_None, // VFMADDSUB231PHZ256mbk = 10147 |
| 149881 | CEFBS_None, // VFMADDSUB231PHZ256mbkz = 10148 |
| 149882 | CEFBS_None, // VFMADDSUB231PHZ256mk = 10149 |
| 149883 | CEFBS_None, // VFMADDSUB231PHZ256mkz = 10150 |
| 149884 | CEFBS_None, // VFMADDSUB231PHZ256r = 10151 |
| 149885 | CEFBS_None, // VFMADDSUB231PHZ256rk = 10152 |
| 149886 | CEFBS_None, // VFMADDSUB231PHZ256rkz = 10153 |
| 149887 | CEFBS_None, // VFMADDSUB231PHZm = 10154 |
| 149888 | CEFBS_None, // VFMADDSUB231PHZmb = 10155 |
| 149889 | CEFBS_None, // VFMADDSUB231PHZmbk = 10156 |
| 149890 | CEFBS_None, // VFMADDSUB231PHZmbkz = 10157 |
| 149891 | CEFBS_None, // VFMADDSUB231PHZmk = 10158 |
| 149892 | CEFBS_None, // VFMADDSUB231PHZmkz = 10159 |
| 149893 | CEFBS_None, // VFMADDSUB231PHZr = 10160 |
| 149894 | CEFBS_None, // VFMADDSUB231PHZrb = 10161 |
| 149895 | CEFBS_None, // VFMADDSUB231PHZrbk = 10162 |
| 149896 | CEFBS_None, // VFMADDSUB231PHZrbkz = 10163 |
| 149897 | CEFBS_None, // VFMADDSUB231PHZrk = 10164 |
| 149898 | CEFBS_None, // VFMADDSUB231PHZrkz = 10165 |
| 149899 | CEFBS_None, // VFMADDSUB231PSYm = 10166 |
| 149900 | CEFBS_None, // VFMADDSUB231PSYr = 10167 |
| 149901 | CEFBS_None, // VFMADDSUB231PSZ128m = 10168 |
| 149902 | CEFBS_None, // VFMADDSUB231PSZ128mb = 10169 |
| 149903 | CEFBS_None, // VFMADDSUB231PSZ128mbk = 10170 |
| 149904 | CEFBS_None, // VFMADDSUB231PSZ128mbkz = 10171 |
| 149905 | CEFBS_None, // VFMADDSUB231PSZ128mk = 10172 |
| 149906 | CEFBS_None, // VFMADDSUB231PSZ128mkz = 10173 |
| 149907 | CEFBS_None, // VFMADDSUB231PSZ128r = 10174 |
| 149908 | CEFBS_None, // VFMADDSUB231PSZ128rk = 10175 |
| 149909 | CEFBS_None, // VFMADDSUB231PSZ128rkz = 10176 |
| 149910 | CEFBS_None, // VFMADDSUB231PSZ256m = 10177 |
| 149911 | CEFBS_None, // VFMADDSUB231PSZ256mb = 10178 |
| 149912 | CEFBS_None, // VFMADDSUB231PSZ256mbk = 10179 |
| 149913 | CEFBS_None, // VFMADDSUB231PSZ256mbkz = 10180 |
| 149914 | CEFBS_None, // VFMADDSUB231PSZ256mk = 10181 |
| 149915 | CEFBS_None, // VFMADDSUB231PSZ256mkz = 10182 |
| 149916 | CEFBS_None, // VFMADDSUB231PSZ256r = 10183 |
| 149917 | CEFBS_None, // VFMADDSUB231PSZ256rk = 10184 |
| 149918 | CEFBS_None, // VFMADDSUB231PSZ256rkz = 10185 |
| 149919 | CEFBS_None, // VFMADDSUB231PSZm = 10186 |
| 149920 | CEFBS_None, // VFMADDSUB231PSZmb = 10187 |
| 149921 | CEFBS_None, // VFMADDSUB231PSZmbk = 10188 |
| 149922 | CEFBS_None, // VFMADDSUB231PSZmbkz = 10189 |
| 149923 | CEFBS_None, // VFMADDSUB231PSZmk = 10190 |
| 149924 | CEFBS_None, // VFMADDSUB231PSZmkz = 10191 |
| 149925 | CEFBS_None, // VFMADDSUB231PSZr = 10192 |
| 149926 | CEFBS_None, // VFMADDSUB231PSZrb = 10193 |
| 149927 | CEFBS_None, // VFMADDSUB231PSZrbk = 10194 |
| 149928 | CEFBS_None, // VFMADDSUB231PSZrbkz = 10195 |
| 149929 | CEFBS_None, // VFMADDSUB231PSZrk = 10196 |
| 149930 | CEFBS_None, // VFMADDSUB231PSZrkz = 10197 |
| 149931 | CEFBS_None, // VFMADDSUB231PSm = 10198 |
| 149932 | CEFBS_None, // VFMADDSUB231PSr = 10199 |
| 149933 | CEFBS_None, // VFMADDSUBPD4Ymr = 10200 |
| 149934 | CEFBS_None, // VFMADDSUBPD4Yrm = 10201 |
| 149935 | CEFBS_None, // VFMADDSUBPD4Yrr = 10202 |
| 149936 | CEFBS_None, // VFMADDSUBPD4Yrr_REV = 10203 |
| 149937 | CEFBS_None, // VFMADDSUBPD4mr = 10204 |
| 149938 | CEFBS_None, // VFMADDSUBPD4rm = 10205 |
| 149939 | CEFBS_None, // VFMADDSUBPD4rr = 10206 |
| 149940 | CEFBS_None, // VFMADDSUBPD4rr_REV = 10207 |
| 149941 | CEFBS_None, // VFMADDSUBPS4Ymr = 10208 |
| 149942 | CEFBS_None, // VFMADDSUBPS4Yrm = 10209 |
| 149943 | CEFBS_None, // VFMADDSUBPS4Yrr = 10210 |
| 149944 | CEFBS_None, // VFMADDSUBPS4Yrr_REV = 10211 |
| 149945 | CEFBS_None, // VFMADDSUBPS4mr = 10212 |
| 149946 | CEFBS_None, // VFMADDSUBPS4rm = 10213 |
| 149947 | CEFBS_None, // VFMADDSUBPS4rr = 10214 |
| 149948 | CEFBS_None, // VFMADDSUBPS4rr_REV = 10215 |
| 149949 | CEFBS_None, // VFMSUB132BF16Z128m = 10216 |
| 149950 | CEFBS_None, // VFMSUB132BF16Z128mb = 10217 |
| 149951 | CEFBS_None, // VFMSUB132BF16Z128mbk = 10218 |
| 149952 | CEFBS_None, // VFMSUB132BF16Z128mbkz = 10219 |
| 149953 | CEFBS_None, // VFMSUB132BF16Z128mk = 10220 |
| 149954 | CEFBS_None, // VFMSUB132BF16Z128mkz = 10221 |
| 149955 | CEFBS_None, // VFMSUB132BF16Z128r = 10222 |
| 149956 | CEFBS_None, // VFMSUB132BF16Z128rk = 10223 |
| 149957 | CEFBS_None, // VFMSUB132BF16Z128rkz = 10224 |
| 149958 | CEFBS_None, // VFMSUB132BF16Z256m = 10225 |
| 149959 | CEFBS_None, // VFMSUB132BF16Z256mb = 10226 |
| 149960 | CEFBS_None, // VFMSUB132BF16Z256mbk = 10227 |
| 149961 | CEFBS_None, // VFMSUB132BF16Z256mbkz = 10228 |
| 149962 | CEFBS_None, // VFMSUB132BF16Z256mk = 10229 |
| 149963 | CEFBS_None, // VFMSUB132BF16Z256mkz = 10230 |
| 149964 | CEFBS_None, // VFMSUB132BF16Z256r = 10231 |
| 149965 | CEFBS_None, // VFMSUB132BF16Z256rk = 10232 |
| 149966 | CEFBS_None, // VFMSUB132BF16Z256rkz = 10233 |
| 149967 | CEFBS_None, // VFMSUB132BF16Zm = 10234 |
| 149968 | CEFBS_None, // VFMSUB132BF16Zmb = 10235 |
| 149969 | CEFBS_None, // VFMSUB132BF16Zmbk = 10236 |
| 149970 | CEFBS_None, // VFMSUB132BF16Zmbkz = 10237 |
| 149971 | CEFBS_None, // VFMSUB132BF16Zmk = 10238 |
| 149972 | CEFBS_None, // VFMSUB132BF16Zmkz = 10239 |
| 149973 | CEFBS_None, // VFMSUB132BF16Zr = 10240 |
| 149974 | CEFBS_None, // VFMSUB132BF16Zrk = 10241 |
| 149975 | CEFBS_None, // VFMSUB132BF16Zrkz = 10242 |
| 149976 | CEFBS_None, // VFMSUB132PDYm = 10243 |
| 149977 | CEFBS_None, // VFMSUB132PDYr = 10244 |
| 149978 | CEFBS_None, // VFMSUB132PDZ128m = 10245 |
| 149979 | CEFBS_None, // VFMSUB132PDZ128mb = 10246 |
| 149980 | CEFBS_None, // VFMSUB132PDZ128mbk = 10247 |
| 149981 | CEFBS_None, // VFMSUB132PDZ128mbkz = 10248 |
| 149982 | CEFBS_None, // VFMSUB132PDZ128mk = 10249 |
| 149983 | CEFBS_None, // VFMSUB132PDZ128mkz = 10250 |
| 149984 | CEFBS_None, // VFMSUB132PDZ128r = 10251 |
| 149985 | CEFBS_None, // VFMSUB132PDZ128rk = 10252 |
| 149986 | CEFBS_None, // VFMSUB132PDZ128rkz = 10253 |
| 149987 | CEFBS_None, // VFMSUB132PDZ256m = 10254 |
| 149988 | CEFBS_None, // VFMSUB132PDZ256mb = 10255 |
| 149989 | CEFBS_None, // VFMSUB132PDZ256mbk = 10256 |
| 149990 | CEFBS_None, // VFMSUB132PDZ256mbkz = 10257 |
| 149991 | CEFBS_None, // VFMSUB132PDZ256mk = 10258 |
| 149992 | CEFBS_None, // VFMSUB132PDZ256mkz = 10259 |
| 149993 | CEFBS_None, // VFMSUB132PDZ256r = 10260 |
| 149994 | CEFBS_None, // VFMSUB132PDZ256rk = 10261 |
| 149995 | CEFBS_None, // VFMSUB132PDZ256rkz = 10262 |
| 149996 | CEFBS_None, // VFMSUB132PDZm = 10263 |
| 149997 | CEFBS_None, // VFMSUB132PDZmb = 10264 |
| 149998 | CEFBS_None, // VFMSUB132PDZmbk = 10265 |
| 149999 | CEFBS_None, // VFMSUB132PDZmbkz = 10266 |
| 150000 | CEFBS_None, // VFMSUB132PDZmk = 10267 |
| 150001 | CEFBS_None, // VFMSUB132PDZmkz = 10268 |
| 150002 | CEFBS_None, // VFMSUB132PDZr = 10269 |
| 150003 | CEFBS_None, // VFMSUB132PDZrb = 10270 |
| 150004 | CEFBS_None, // VFMSUB132PDZrbk = 10271 |
| 150005 | CEFBS_None, // VFMSUB132PDZrbkz = 10272 |
| 150006 | CEFBS_None, // VFMSUB132PDZrk = 10273 |
| 150007 | CEFBS_None, // VFMSUB132PDZrkz = 10274 |
| 150008 | CEFBS_None, // VFMSUB132PDm = 10275 |
| 150009 | CEFBS_None, // VFMSUB132PDr = 10276 |
| 150010 | CEFBS_None, // VFMSUB132PHZ128m = 10277 |
| 150011 | CEFBS_None, // VFMSUB132PHZ128mb = 10278 |
| 150012 | CEFBS_None, // VFMSUB132PHZ128mbk = 10279 |
| 150013 | CEFBS_None, // VFMSUB132PHZ128mbkz = 10280 |
| 150014 | CEFBS_None, // VFMSUB132PHZ128mk = 10281 |
| 150015 | CEFBS_None, // VFMSUB132PHZ128mkz = 10282 |
| 150016 | CEFBS_None, // VFMSUB132PHZ128r = 10283 |
| 150017 | CEFBS_None, // VFMSUB132PHZ128rk = 10284 |
| 150018 | CEFBS_None, // VFMSUB132PHZ128rkz = 10285 |
| 150019 | CEFBS_None, // VFMSUB132PHZ256m = 10286 |
| 150020 | CEFBS_None, // VFMSUB132PHZ256mb = 10287 |
| 150021 | CEFBS_None, // VFMSUB132PHZ256mbk = 10288 |
| 150022 | CEFBS_None, // VFMSUB132PHZ256mbkz = 10289 |
| 150023 | CEFBS_None, // VFMSUB132PHZ256mk = 10290 |
| 150024 | CEFBS_None, // VFMSUB132PHZ256mkz = 10291 |
| 150025 | CEFBS_None, // VFMSUB132PHZ256r = 10292 |
| 150026 | CEFBS_None, // VFMSUB132PHZ256rk = 10293 |
| 150027 | CEFBS_None, // VFMSUB132PHZ256rkz = 10294 |
| 150028 | CEFBS_None, // VFMSUB132PHZm = 10295 |
| 150029 | CEFBS_None, // VFMSUB132PHZmb = 10296 |
| 150030 | CEFBS_None, // VFMSUB132PHZmbk = 10297 |
| 150031 | CEFBS_None, // VFMSUB132PHZmbkz = 10298 |
| 150032 | CEFBS_None, // VFMSUB132PHZmk = 10299 |
| 150033 | CEFBS_None, // VFMSUB132PHZmkz = 10300 |
| 150034 | CEFBS_None, // VFMSUB132PHZr = 10301 |
| 150035 | CEFBS_None, // VFMSUB132PHZrb = 10302 |
| 150036 | CEFBS_None, // VFMSUB132PHZrbk = 10303 |
| 150037 | CEFBS_None, // VFMSUB132PHZrbkz = 10304 |
| 150038 | CEFBS_None, // VFMSUB132PHZrk = 10305 |
| 150039 | CEFBS_None, // VFMSUB132PHZrkz = 10306 |
| 150040 | CEFBS_None, // VFMSUB132PSYm = 10307 |
| 150041 | CEFBS_None, // VFMSUB132PSYr = 10308 |
| 150042 | CEFBS_None, // VFMSUB132PSZ128m = 10309 |
| 150043 | CEFBS_None, // VFMSUB132PSZ128mb = 10310 |
| 150044 | CEFBS_None, // VFMSUB132PSZ128mbk = 10311 |
| 150045 | CEFBS_None, // VFMSUB132PSZ128mbkz = 10312 |
| 150046 | CEFBS_None, // VFMSUB132PSZ128mk = 10313 |
| 150047 | CEFBS_None, // VFMSUB132PSZ128mkz = 10314 |
| 150048 | CEFBS_None, // VFMSUB132PSZ128r = 10315 |
| 150049 | CEFBS_None, // VFMSUB132PSZ128rk = 10316 |
| 150050 | CEFBS_None, // VFMSUB132PSZ128rkz = 10317 |
| 150051 | CEFBS_None, // VFMSUB132PSZ256m = 10318 |
| 150052 | CEFBS_None, // VFMSUB132PSZ256mb = 10319 |
| 150053 | CEFBS_None, // VFMSUB132PSZ256mbk = 10320 |
| 150054 | CEFBS_None, // VFMSUB132PSZ256mbkz = 10321 |
| 150055 | CEFBS_None, // VFMSUB132PSZ256mk = 10322 |
| 150056 | CEFBS_None, // VFMSUB132PSZ256mkz = 10323 |
| 150057 | CEFBS_None, // VFMSUB132PSZ256r = 10324 |
| 150058 | CEFBS_None, // VFMSUB132PSZ256rk = 10325 |
| 150059 | CEFBS_None, // VFMSUB132PSZ256rkz = 10326 |
| 150060 | CEFBS_None, // VFMSUB132PSZm = 10327 |
| 150061 | CEFBS_None, // VFMSUB132PSZmb = 10328 |
| 150062 | CEFBS_None, // VFMSUB132PSZmbk = 10329 |
| 150063 | CEFBS_None, // VFMSUB132PSZmbkz = 10330 |
| 150064 | CEFBS_None, // VFMSUB132PSZmk = 10331 |
| 150065 | CEFBS_None, // VFMSUB132PSZmkz = 10332 |
| 150066 | CEFBS_None, // VFMSUB132PSZr = 10333 |
| 150067 | CEFBS_None, // VFMSUB132PSZrb = 10334 |
| 150068 | CEFBS_None, // VFMSUB132PSZrbk = 10335 |
| 150069 | CEFBS_None, // VFMSUB132PSZrbkz = 10336 |
| 150070 | CEFBS_None, // VFMSUB132PSZrk = 10337 |
| 150071 | CEFBS_None, // VFMSUB132PSZrkz = 10338 |
| 150072 | CEFBS_None, // VFMSUB132PSm = 10339 |
| 150073 | CEFBS_None, // VFMSUB132PSr = 10340 |
| 150074 | CEFBS_None, // VFMSUB132SDZm = 10341 |
| 150075 | CEFBS_None, // VFMSUB132SDZm_Int = 10342 |
| 150076 | CEFBS_None, // VFMSUB132SDZmk_Int = 10343 |
| 150077 | CEFBS_None, // VFMSUB132SDZmkz_Int = 10344 |
| 150078 | CEFBS_None, // VFMSUB132SDZr = 10345 |
| 150079 | CEFBS_None, // VFMSUB132SDZr_Int = 10346 |
| 150080 | CEFBS_None, // VFMSUB132SDZrb = 10347 |
| 150081 | CEFBS_None, // VFMSUB132SDZrb_Int = 10348 |
| 150082 | CEFBS_None, // VFMSUB132SDZrbk_Int = 10349 |
| 150083 | CEFBS_None, // VFMSUB132SDZrbkz_Int = 10350 |
| 150084 | CEFBS_None, // VFMSUB132SDZrk_Int = 10351 |
| 150085 | CEFBS_None, // VFMSUB132SDZrkz_Int = 10352 |
| 150086 | CEFBS_None, // VFMSUB132SDm = 10353 |
| 150087 | CEFBS_None, // VFMSUB132SDm_Int = 10354 |
| 150088 | CEFBS_None, // VFMSUB132SDr = 10355 |
| 150089 | CEFBS_None, // VFMSUB132SDr_Int = 10356 |
| 150090 | CEFBS_None, // VFMSUB132SHZm = 10357 |
| 150091 | CEFBS_None, // VFMSUB132SHZm_Int = 10358 |
| 150092 | CEFBS_None, // VFMSUB132SHZmk_Int = 10359 |
| 150093 | CEFBS_None, // VFMSUB132SHZmkz_Int = 10360 |
| 150094 | CEFBS_None, // VFMSUB132SHZr = 10361 |
| 150095 | CEFBS_None, // VFMSUB132SHZr_Int = 10362 |
| 150096 | CEFBS_None, // VFMSUB132SHZrb = 10363 |
| 150097 | CEFBS_None, // VFMSUB132SHZrb_Int = 10364 |
| 150098 | CEFBS_None, // VFMSUB132SHZrbk_Int = 10365 |
| 150099 | CEFBS_None, // VFMSUB132SHZrbkz_Int = 10366 |
| 150100 | CEFBS_None, // VFMSUB132SHZrk_Int = 10367 |
| 150101 | CEFBS_None, // VFMSUB132SHZrkz_Int = 10368 |
| 150102 | CEFBS_None, // VFMSUB132SSZm = 10369 |
| 150103 | CEFBS_None, // VFMSUB132SSZm_Int = 10370 |
| 150104 | CEFBS_None, // VFMSUB132SSZmk_Int = 10371 |
| 150105 | CEFBS_None, // VFMSUB132SSZmkz_Int = 10372 |
| 150106 | CEFBS_None, // VFMSUB132SSZr = 10373 |
| 150107 | CEFBS_None, // VFMSUB132SSZr_Int = 10374 |
| 150108 | CEFBS_None, // VFMSUB132SSZrb = 10375 |
| 150109 | CEFBS_None, // VFMSUB132SSZrb_Int = 10376 |
| 150110 | CEFBS_None, // VFMSUB132SSZrbk_Int = 10377 |
| 150111 | CEFBS_None, // VFMSUB132SSZrbkz_Int = 10378 |
| 150112 | CEFBS_None, // VFMSUB132SSZrk_Int = 10379 |
| 150113 | CEFBS_None, // VFMSUB132SSZrkz_Int = 10380 |
| 150114 | CEFBS_None, // VFMSUB132SSm = 10381 |
| 150115 | CEFBS_None, // VFMSUB132SSm_Int = 10382 |
| 150116 | CEFBS_None, // VFMSUB132SSr = 10383 |
| 150117 | CEFBS_None, // VFMSUB132SSr_Int = 10384 |
| 150118 | CEFBS_None, // VFMSUB213BF16Z128m = 10385 |
| 150119 | CEFBS_None, // VFMSUB213BF16Z128mb = 10386 |
| 150120 | CEFBS_None, // VFMSUB213BF16Z128mbk = 10387 |
| 150121 | CEFBS_None, // VFMSUB213BF16Z128mbkz = 10388 |
| 150122 | CEFBS_None, // VFMSUB213BF16Z128mk = 10389 |
| 150123 | CEFBS_None, // VFMSUB213BF16Z128mkz = 10390 |
| 150124 | CEFBS_None, // VFMSUB213BF16Z128r = 10391 |
| 150125 | CEFBS_None, // VFMSUB213BF16Z128rk = 10392 |
| 150126 | CEFBS_None, // VFMSUB213BF16Z128rkz = 10393 |
| 150127 | CEFBS_None, // VFMSUB213BF16Z256m = 10394 |
| 150128 | CEFBS_None, // VFMSUB213BF16Z256mb = 10395 |
| 150129 | CEFBS_None, // VFMSUB213BF16Z256mbk = 10396 |
| 150130 | CEFBS_None, // VFMSUB213BF16Z256mbkz = 10397 |
| 150131 | CEFBS_None, // VFMSUB213BF16Z256mk = 10398 |
| 150132 | CEFBS_None, // VFMSUB213BF16Z256mkz = 10399 |
| 150133 | CEFBS_None, // VFMSUB213BF16Z256r = 10400 |
| 150134 | CEFBS_None, // VFMSUB213BF16Z256rk = 10401 |
| 150135 | CEFBS_None, // VFMSUB213BF16Z256rkz = 10402 |
| 150136 | CEFBS_None, // VFMSUB213BF16Zm = 10403 |
| 150137 | CEFBS_None, // VFMSUB213BF16Zmb = 10404 |
| 150138 | CEFBS_None, // VFMSUB213BF16Zmbk = 10405 |
| 150139 | CEFBS_None, // VFMSUB213BF16Zmbkz = 10406 |
| 150140 | CEFBS_None, // VFMSUB213BF16Zmk = 10407 |
| 150141 | CEFBS_None, // VFMSUB213BF16Zmkz = 10408 |
| 150142 | CEFBS_None, // VFMSUB213BF16Zr = 10409 |
| 150143 | CEFBS_None, // VFMSUB213BF16Zrk = 10410 |
| 150144 | CEFBS_None, // VFMSUB213BF16Zrkz = 10411 |
| 150145 | CEFBS_None, // VFMSUB213PDYm = 10412 |
| 150146 | CEFBS_None, // VFMSUB213PDYr = 10413 |
| 150147 | CEFBS_None, // VFMSUB213PDZ128m = 10414 |
| 150148 | CEFBS_None, // VFMSUB213PDZ128mb = 10415 |
| 150149 | CEFBS_None, // VFMSUB213PDZ128mbk = 10416 |
| 150150 | CEFBS_None, // VFMSUB213PDZ128mbkz = 10417 |
| 150151 | CEFBS_None, // VFMSUB213PDZ128mk = 10418 |
| 150152 | CEFBS_None, // VFMSUB213PDZ128mkz = 10419 |
| 150153 | CEFBS_None, // VFMSUB213PDZ128r = 10420 |
| 150154 | CEFBS_None, // VFMSUB213PDZ128rk = 10421 |
| 150155 | CEFBS_None, // VFMSUB213PDZ128rkz = 10422 |
| 150156 | CEFBS_None, // VFMSUB213PDZ256m = 10423 |
| 150157 | CEFBS_None, // VFMSUB213PDZ256mb = 10424 |
| 150158 | CEFBS_None, // VFMSUB213PDZ256mbk = 10425 |
| 150159 | CEFBS_None, // VFMSUB213PDZ256mbkz = 10426 |
| 150160 | CEFBS_None, // VFMSUB213PDZ256mk = 10427 |
| 150161 | CEFBS_None, // VFMSUB213PDZ256mkz = 10428 |
| 150162 | CEFBS_None, // VFMSUB213PDZ256r = 10429 |
| 150163 | CEFBS_None, // VFMSUB213PDZ256rk = 10430 |
| 150164 | CEFBS_None, // VFMSUB213PDZ256rkz = 10431 |
| 150165 | CEFBS_None, // VFMSUB213PDZm = 10432 |
| 150166 | CEFBS_None, // VFMSUB213PDZmb = 10433 |
| 150167 | CEFBS_None, // VFMSUB213PDZmbk = 10434 |
| 150168 | CEFBS_None, // VFMSUB213PDZmbkz = 10435 |
| 150169 | CEFBS_None, // VFMSUB213PDZmk = 10436 |
| 150170 | CEFBS_None, // VFMSUB213PDZmkz = 10437 |
| 150171 | CEFBS_None, // VFMSUB213PDZr = 10438 |
| 150172 | CEFBS_None, // VFMSUB213PDZrb = 10439 |
| 150173 | CEFBS_None, // VFMSUB213PDZrbk = 10440 |
| 150174 | CEFBS_None, // VFMSUB213PDZrbkz = 10441 |
| 150175 | CEFBS_None, // VFMSUB213PDZrk = 10442 |
| 150176 | CEFBS_None, // VFMSUB213PDZrkz = 10443 |
| 150177 | CEFBS_None, // VFMSUB213PDm = 10444 |
| 150178 | CEFBS_None, // VFMSUB213PDr = 10445 |
| 150179 | CEFBS_None, // VFMSUB213PHZ128m = 10446 |
| 150180 | CEFBS_None, // VFMSUB213PHZ128mb = 10447 |
| 150181 | CEFBS_None, // VFMSUB213PHZ128mbk = 10448 |
| 150182 | CEFBS_None, // VFMSUB213PHZ128mbkz = 10449 |
| 150183 | CEFBS_None, // VFMSUB213PHZ128mk = 10450 |
| 150184 | CEFBS_None, // VFMSUB213PHZ128mkz = 10451 |
| 150185 | CEFBS_None, // VFMSUB213PHZ128r = 10452 |
| 150186 | CEFBS_None, // VFMSUB213PHZ128rk = 10453 |
| 150187 | CEFBS_None, // VFMSUB213PHZ128rkz = 10454 |
| 150188 | CEFBS_None, // VFMSUB213PHZ256m = 10455 |
| 150189 | CEFBS_None, // VFMSUB213PHZ256mb = 10456 |
| 150190 | CEFBS_None, // VFMSUB213PHZ256mbk = 10457 |
| 150191 | CEFBS_None, // VFMSUB213PHZ256mbkz = 10458 |
| 150192 | CEFBS_None, // VFMSUB213PHZ256mk = 10459 |
| 150193 | CEFBS_None, // VFMSUB213PHZ256mkz = 10460 |
| 150194 | CEFBS_None, // VFMSUB213PHZ256r = 10461 |
| 150195 | CEFBS_None, // VFMSUB213PHZ256rk = 10462 |
| 150196 | CEFBS_None, // VFMSUB213PHZ256rkz = 10463 |
| 150197 | CEFBS_None, // VFMSUB213PHZm = 10464 |
| 150198 | CEFBS_None, // VFMSUB213PHZmb = 10465 |
| 150199 | CEFBS_None, // VFMSUB213PHZmbk = 10466 |
| 150200 | CEFBS_None, // VFMSUB213PHZmbkz = 10467 |
| 150201 | CEFBS_None, // VFMSUB213PHZmk = 10468 |
| 150202 | CEFBS_None, // VFMSUB213PHZmkz = 10469 |
| 150203 | CEFBS_None, // VFMSUB213PHZr = 10470 |
| 150204 | CEFBS_None, // VFMSUB213PHZrb = 10471 |
| 150205 | CEFBS_None, // VFMSUB213PHZrbk = 10472 |
| 150206 | CEFBS_None, // VFMSUB213PHZrbkz = 10473 |
| 150207 | CEFBS_None, // VFMSUB213PHZrk = 10474 |
| 150208 | CEFBS_None, // VFMSUB213PHZrkz = 10475 |
| 150209 | CEFBS_None, // VFMSUB213PSYm = 10476 |
| 150210 | CEFBS_None, // VFMSUB213PSYr = 10477 |
| 150211 | CEFBS_None, // VFMSUB213PSZ128m = 10478 |
| 150212 | CEFBS_None, // VFMSUB213PSZ128mb = 10479 |
| 150213 | CEFBS_None, // VFMSUB213PSZ128mbk = 10480 |
| 150214 | CEFBS_None, // VFMSUB213PSZ128mbkz = 10481 |
| 150215 | CEFBS_None, // VFMSUB213PSZ128mk = 10482 |
| 150216 | CEFBS_None, // VFMSUB213PSZ128mkz = 10483 |
| 150217 | CEFBS_None, // VFMSUB213PSZ128r = 10484 |
| 150218 | CEFBS_None, // VFMSUB213PSZ128rk = 10485 |
| 150219 | CEFBS_None, // VFMSUB213PSZ128rkz = 10486 |
| 150220 | CEFBS_None, // VFMSUB213PSZ256m = 10487 |
| 150221 | CEFBS_None, // VFMSUB213PSZ256mb = 10488 |
| 150222 | CEFBS_None, // VFMSUB213PSZ256mbk = 10489 |
| 150223 | CEFBS_None, // VFMSUB213PSZ256mbkz = 10490 |
| 150224 | CEFBS_None, // VFMSUB213PSZ256mk = 10491 |
| 150225 | CEFBS_None, // VFMSUB213PSZ256mkz = 10492 |
| 150226 | CEFBS_None, // VFMSUB213PSZ256r = 10493 |
| 150227 | CEFBS_None, // VFMSUB213PSZ256rk = 10494 |
| 150228 | CEFBS_None, // VFMSUB213PSZ256rkz = 10495 |
| 150229 | CEFBS_None, // VFMSUB213PSZm = 10496 |
| 150230 | CEFBS_None, // VFMSUB213PSZmb = 10497 |
| 150231 | CEFBS_None, // VFMSUB213PSZmbk = 10498 |
| 150232 | CEFBS_None, // VFMSUB213PSZmbkz = 10499 |
| 150233 | CEFBS_None, // VFMSUB213PSZmk = 10500 |
| 150234 | CEFBS_None, // VFMSUB213PSZmkz = 10501 |
| 150235 | CEFBS_None, // VFMSUB213PSZr = 10502 |
| 150236 | CEFBS_None, // VFMSUB213PSZrb = 10503 |
| 150237 | CEFBS_None, // VFMSUB213PSZrbk = 10504 |
| 150238 | CEFBS_None, // VFMSUB213PSZrbkz = 10505 |
| 150239 | CEFBS_None, // VFMSUB213PSZrk = 10506 |
| 150240 | CEFBS_None, // VFMSUB213PSZrkz = 10507 |
| 150241 | CEFBS_None, // VFMSUB213PSm = 10508 |
| 150242 | CEFBS_None, // VFMSUB213PSr = 10509 |
| 150243 | CEFBS_None, // VFMSUB213SDZm = 10510 |
| 150244 | CEFBS_None, // VFMSUB213SDZm_Int = 10511 |
| 150245 | CEFBS_None, // VFMSUB213SDZmk_Int = 10512 |
| 150246 | CEFBS_None, // VFMSUB213SDZmkz_Int = 10513 |
| 150247 | CEFBS_None, // VFMSUB213SDZr = 10514 |
| 150248 | CEFBS_None, // VFMSUB213SDZr_Int = 10515 |
| 150249 | CEFBS_None, // VFMSUB213SDZrb = 10516 |
| 150250 | CEFBS_None, // VFMSUB213SDZrb_Int = 10517 |
| 150251 | CEFBS_None, // VFMSUB213SDZrbk_Int = 10518 |
| 150252 | CEFBS_None, // VFMSUB213SDZrbkz_Int = 10519 |
| 150253 | CEFBS_None, // VFMSUB213SDZrk_Int = 10520 |
| 150254 | CEFBS_None, // VFMSUB213SDZrkz_Int = 10521 |
| 150255 | CEFBS_None, // VFMSUB213SDm = 10522 |
| 150256 | CEFBS_None, // VFMSUB213SDm_Int = 10523 |
| 150257 | CEFBS_None, // VFMSUB213SDr = 10524 |
| 150258 | CEFBS_None, // VFMSUB213SDr_Int = 10525 |
| 150259 | CEFBS_None, // VFMSUB213SHZm = 10526 |
| 150260 | CEFBS_None, // VFMSUB213SHZm_Int = 10527 |
| 150261 | CEFBS_None, // VFMSUB213SHZmk_Int = 10528 |
| 150262 | CEFBS_None, // VFMSUB213SHZmkz_Int = 10529 |
| 150263 | CEFBS_None, // VFMSUB213SHZr = 10530 |
| 150264 | CEFBS_None, // VFMSUB213SHZr_Int = 10531 |
| 150265 | CEFBS_None, // VFMSUB213SHZrb = 10532 |
| 150266 | CEFBS_None, // VFMSUB213SHZrb_Int = 10533 |
| 150267 | CEFBS_None, // VFMSUB213SHZrbk_Int = 10534 |
| 150268 | CEFBS_None, // VFMSUB213SHZrbkz_Int = 10535 |
| 150269 | CEFBS_None, // VFMSUB213SHZrk_Int = 10536 |
| 150270 | CEFBS_None, // VFMSUB213SHZrkz_Int = 10537 |
| 150271 | CEFBS_None, // VFMSUB213SSZm = 10538 |
| 150272 | CEFBS_None, // VFMSUB213SSZm_Int = 10539 |
| 150273 | CEFBS_None, // VFMSUB213SSZmk_Int = 10540 |
| 150274 | CEFBS_None, // VFMSUB213SSZmkz_Int = 10541 |
| 150275 | CEFBS_None, // VFMSUB213SSZr = 10542 |
| 150276 | CEFBS_None, // VFMSUB213SSZr_Int = 10543 |
| 150277 | CEFBS_None, // VFMSUB213SSZrb = 10544 |
| 150278 | CEFBS_None, // VFMSUB213SSZrb_Int = 10545 |
| 150279 | CEFBS_None, // VFMSUB213SSZrbk_Int = 10546 |
| 150280 | CEFBS_None, // VFMSUB213SSZrbkz_Int = 10547 |
| 150281 | CEFBS_None, // VFMSUB213SSZrk_Int = 10548 |
| 150282 | CEFBS_None, // VFMSUB213SSZrkz_Int = 10549 |
| 150283 | CEFBS_None, // VFMSUB213SSm = 10550 |
| 150284 | CEFBS_None, // VFMSUB213SSm_Int = 10551 |
| 150285 | CEFBS_None, // VFMSUB213SSr = 10552 |
| 150286 | CEFBS_None, // VFMSUB213SSr_Int = 10553 |
| 150287 | CEFBS_None, // VFMSUB231BF16Z128m = 10554 |
| 150288 | CEFBS_None, // VFMSUB231BF16Z128mb = 10555 |
| 150289 | CEFBS_None, // VFMSUB231BF16Z128mbk = 10556 |
| 150290 | CEFBS_None, // VFMSUB231BF16Z128mbkz = 10557 |
| 150291 | CEFBS_None, // VFMSUB231BF16Z128mk = 10558 |
| 150292 | CEFBS_None, // VFMSUB231BF16Z128mkz = 10559 |
| 150293 | CEFBS_None, // VFMSUB231BF16Z128r = 10560 |
| 150294 | CEFBS_None, // VFMSUB231BF16Z128rk = 10561 |
| 150295 | CEFBS_None, // VFMSUB231BF16Z128rkz = 10562 |
| 150296 | CEFBS_None, // VFMSUB231BF16Z256m = 10563 |
| 150297 | CEFBS_None, // VFMSUB231BF16Z256mb = 10564 |
| 150298 | CEFBS_None, // VFMSUB231BF16Z256mbk = 10565 |
| 150299 | CEFBS_None, // VFMSUB231BF16Z256mbkz = 10566 |
| 150300 | CEFBS_None, // VFMSUB231BF16Z256mk = 10567 |
| 150301 | CEFBS_None, // VFMSUB231BF16Z256mkz = 10568 |
| 150302 | CEFBS_None, // VFMSUB231BF16Z256r = 10569 |
| 150303 | CEFBS_None, // VFMSUB231BF16Z256rk = 10570 |
| 150304 | CEFBS_None, // VFMSUB231BF16Z256rkz = 10571 |
| 150305 | CEFBS_None, // VFMSUB231BF16Zm = 10572 |
| 150306 | CEFBS_None, // VFMSUB231BF16Zmb = 10573 |
| 150307 | CEFBS_None, // VFMSUB231BF16Zmbk = 10574 |
| 150308 | CEFBS_None, // VFMSUB231BF16Zmbkz = 10575 |
| 150309 | CEFBS_None, // VFMSUB231BF16Zmk = 10576 |
| 150310 | CEFBS_None, // VFMSUB231BF16Zmkz = 10577 |
| 150311 | CEFBS_None, // VFMSUB231BF16Zr = 10578 |
| 150312 | CEFBS_None, // VFMSUB231BF16Zrk = 10579 |
| 150313 | CEFBS_None, // VFMSUB231BF16Zrkz = 10580 |
| 150314 | CEFBS_None, // VFMSUB231PDYm = 10581 |
| 150315 | CEFBS_None, // VFMSUB231PDYr = 10582 |
| 150316 | CEFBS_None, // VFMSUB231PDZ128m = 10583 |
| 150317 | CEFBS_None, // VFMSUB231PDZ128mb = 10584 |
| 150318 | CEFBS_None, // VFMSUB231PDZ128mbk = 10585 |
| 150319 | CEFBS_None, // VFMSUB231PDZ128mbkz = 10586 |
| 150320 | CEFBS_None, // VFMSUB231PDZ128mk = 10587 |
| 150321 | CEFBS_None, // VFMSUB231PDZ128mkz = 10588 |
| 150322 | CEFBS_None, // VFMSUB231PDZ128r = 10589 |
| 150323 | CEFBS_None, // VFMSUB231PDZ128rk = 10590 |
| 150324 | CEFBS_None, // VFMSUB231PDZ128rkz = 10591 |
| 150325 | CEFBS_None, // VFMSUB231PDZ256m = 10592 |
| 150326 | CEFBS_None, // VFMSUB231PDZ256mb = 10593 |
| 150327 | CEFBS_None, // VFMSUB231PDZ256mbk = 10594 |
| 150328 | CEFBS_None, // VFMSUB231PDZ256mbkz = 10595 |
| 150329 | CEFBS_None, // VFMSUB231PDZ256mk = 10596 |
| 150330 | CEFBS_None, // VFMSUB231PDZ256mkz = 10597 |
| 150331 | CEFBS_None, // VFMSUB231PDZ256r = 10598 |
| 150332 | CEFBS_None, // VFMSUB231PDZ256rk = 10599 |
| 150333 | CEFBS_None, // VFMSUB231PDZ256rkz = 10600 |
| 150334 | CEFBS_None, // VFMSUB231PDZm = 10601 |
| 150335 | CEFBS_None, // VFMSUB231PDZmb = 10602 |
| 150336 | CEFBS_None, // VFMSUB231PDZmbk = 10603 |
| 150337 | CEFBS_None, // VFMSUB231PDZmbkz = 10604 |
| 150338 | CEFBS_None, // VFMSUB231PDZmk = 10605 |
| 150339 | CEFBS_None, // VFMSUB231PDZmkz = 10606 |
| 150340 | CEFBS_None, // VFMSUB231PDZr = 10607 |
| 150341 | CEFBS_None, // VFMSUB231PDZrb = 10608 |
| 150342 | CEFBS_None, // VFMSUB231PDZrbk = 10609 |
| 150343 | CEFBS_None, // VFMSUB231PDZrbkz = 10610 |
| 150344 | CEFBS_None, // VFMSUB231PDZrk = 10611 |
| 150345 | CEFBS_None, // VFMSUB231PDZrkz = 10612 |
| 150346 | CEFBS_None, // VFMSUB231PDm = 10613 |
| 150347 | CEFBS_None, // VFMSUB231PDr = 10614 |
| 150348 | CEFBS_None, // VFMSUB231PHZ128m = 10615 |
| 150349 | CEFBS_None, // VFMSUB231PHZ128mb = 10616 |
| 150350 | CEFBS_None, // VFMSUB231PHZ128mbk = 10617 |
| 150351 | CEFBS_None, // VFMSUB231PHZ128mbkz = 10618 |
| 150352 | CEFBS_None, // VFMSUB231PHZ128mk = 10619 |
| 150353 | CEFBS_None, // VFMSUB231PHZ128mkz = 10620 |
| 150354 | CEFBS_None, // VFMSUB231PHZ128r = 10621 |
| 150355 | CEFBS_None, // VFMSUB231PHZ128rk = 10622 |
| 150356 | CEFBS_None, // VFMSUB231PHZ128rkz = 10623 |
| 150357 | CEFBS_None, // VFMSUB231PHZ256m = 10624 |
| 150358 | CEFBS_None, // VFMSUB231PHZ256mb = 10625 |
| 150359 | CEFBS_None, // VFMSUB231PHZ256mbk = 10626 |
| 150360 | CEFBS_None, // VFMSUB231PHZ256mbkz = 10627 |
| 150361 | CEFBS_None, // VFMSUB231PHZ256mk = 10628 |
| 150362 | CEFBS_None, // VFMSUB231PHZ256mkz = 10629 |
| 150363 | CEFBS_None, // VFMSUB231PHZ256r = 10630 |
| 150364 | CEFBS_None, // VFMSUB231PHZ256rk = 10631 |
| 150365 | CEFBS_None, // VFMSUB231PHZ256rkz = 10632 |
| 150366 | CEFBS_None, // VFMSUB231PHZm = 10633 |
| 150367 | CEFBS_None, // VFMSUB231PHZmb = 10634 |
| 150368 | CEFBS_None, // VFMSUB231PHZmbk = 10635 |
| 150369 | CEFBS_None, // VFMSUB231PHZmbkz = 10636 |
| 150370 | CEFBS_None, // VFMSUB231PHZmk = 10637 |
| 150371 | CEFBS_None, // VFMSUB231PHZmkz = 10638 |
| 150372 | CEFBS_None, // VFMSUB231PHZr = 10639 |
| 150373 | CEFBS_None, // VFMSUB231PHZrb = 10640 |
| 150374 | CEFBS_None, // VFMSUB231PHZrbk = 10641 |
| 150375 | CEFBS_None, // VFMSUB231PHZrbkz = 10642 |
| 150376 | CEFBS_None, // VFMSUB231PHZrk = 10643 |
| 150377 | CEFBS_None, // VFMSUB231PHZrkz = 10644 |
| 150378 | CEFBS_None, // VFMSUB231PSYm = 10645 |
| 150379 | CEFBS_None, // VFMSUB231PSYr = 10646 |
| 150380 | CEFBS_None, // VFMSUB231PSZ128m = 10647 |
| 150381 | CEFBS_None, // VFMSUB231PSZ128mb = 10648 |
| 150382 | CEFBS_None, // VFMSUB231PSZ128mbk = 10649 |
| 150383 | CEFBS_None, // VFMSUB231PSZ128mbkz = 10650 |
| 150384 | CEFBS_None, // VFMSUB231PSZ128mk = 10651 |
| 150385 | CEFBS_None, // VFMSUB231PSZ128mkz = 10652 |
| 150386 | CEFBS_None, // VFMSUB231PSZ128r = 10653 |
| 150387 | CEFBS_None, // VFMSUB231PSZ128rk = 10654 |
| 150388 | CEFBS_None, // VFMSUB231PSZ128rkz = 10655 |
| 150389 | CEFBS_None, // VFMSUB231PSZ256m = 10656 |
| 150390 | CEFBS_None, // VFMSUB231PSZ256mb = 10657 |
| 150391 | CEFBS_None, // VFMSUB231PSZ256mbk = 10658 |
| 150392 | CEFBS_None, // VFMSUB231PSZ256mbkz = 10659 |
| 150393 | CEFBS_None, // VFMSUB231PSZ256mk = 10660 |
| 150394 | CEFBS_None, // VFMSUB231PSZ256mkz = 10661 |
| 150395 | CEFBS_None, // VFMSUB231PSZ256r = 10662 |
| 150396 | CEFBS_None, // VFMSUB231PSZ256rk = 10663 |
| 150397 | CEFBS_None, // VFMSUB231PSZ256rkz = 10664 |
| 150398 | CEFBS_None, // VFMSUB231PSZm = 10665 |
| 150399 | CEFBS_None, // VFMSUB231PSZmb = 10666 |
| 150400 | CEFBS_None, // VFMSUB231PSZmbk = 10667 |
| 150401 | CEFBS_None, // VFMSUB231PSZmbkz = 10668 |
| 150402 | CEFBS_None, // VFMSUB231PSZmk = 10669 |
| 150403 | CEFBS_None, // VFMSUB231PSZmkz = 10670 |
| 150404 | CEFBS_None, // VFMSUB231PSZr = 10671 |
| 150405 | CEFBS_None, // VFMSUB231PSZrb = 10672 |
| 150406 | CEFBS_None, // VFMSUB231PSZrbk = 10673 |
| 150407 | CEFBS_None, // VFMSUB231PSZrbkz = 10674 |
| 150408 | CEFBS_None, // VFMSUB231PSZrk = 10675 |
| 150409 | CEFBS_None, // VFMSUB231PSZrkz = 10676 |
| 150410 | CEFBS_None, // VFMSUB231PSm = 10677 |
| 150411 | CEFBS_None, // VFMSUB231PSr = 10678 |
| 150412 | CEFBS_None, // VFMSUB231SDZm = 10679 |
| 150413 | CEFBS_None, // VFMSUB231SDZm_Int = 10680 |
| 150414 | CEFBS_None, // VFMSUB231SDZmk_Int = 10681 |
| 150415 | CEFBS_None, // VFMSUB231SDZmkz_Int = 10682 |
| 150416 | CEFBS_None, // VFMSUB231SDZr = 10683 |
| 150417 | CEFBS_None, // VFMSUB231SDZr_Int = 10684 |
| 150418 | CEFBS_None, // VFMSUB231SDZrb = 10685 |
| 150419 | CEFBS_None, // VFMSUB231SDZrb_Int = 10686 |
| 150420 | CEFBS_None, // VFMSUB231SDZrbk_Int = 10687 |
| 150421 | CEFBS_None, // VFMSUB231SDZrbkz_Int = 10688 |
| 150422 | CEFBS_None, // VFMSUB231SDZrk_Int = 10689 |
| 150423 | CEFBS_None, // VFMSUB231SDZrkz_Int = 10690 |
| 150424 | CEFBS_None, // VFMSUB231SDm = 10691 |
| 150425 | CEFBS_None, // VFMSUB231SDm_Int = 10692 |
| 150426 | CEFBS_None, // VFMSUB231SDr = 10693 |
| 150427 | CEFBS_None, // VFMSUB231SDr_Int = 10694 |
| 150428 | CEFBS_None, // VFMSUB231SHZm = 10695 |
| 150429 | CEFBS_None, // VFMSUB231SHZm_Int = 10696 |
| 150430 | CEFBS_None, // VFMSUB231SHZmk_Int = 10697 |
| 150431 | CEFBS_None, // VFMSUB231SHZmkz_Int = 10698 |
| 150432 | CEFBS_None, // VFMSUB231SHZr = 10699 |
| 150433 | CEFBS_None, // VFMSUB231SHZr_Int = 10700 |
| 150434 | CEFBS_None, // VFMSUB231SHZrb = 10701 |
| 150435 | CEFBS_None, // VFMSUB231SHZrb_Int = 10702 |
| 150436 | CEFBS_None, // VFMSUB231SHZrbk_Int = 10703 |
| 150437 | CEFBS_None, // VFMSUB231SHZrbkz_Int = 10704 |
| 150438 | CEFBS_None, // VFMSUB231SHZrk_Int = 10705 |
| 150439 | CEFBS_None, // VFMSUB231SHZrkz_Int = 10706 |
| 150440 | CEFBS_None, // VFMSUB231SSZm = 10707 |
| 150441 | CEFBS_None, // VFMSUB231SSZm_Int = 10708 |
| 150442 | CEFBS_None, // VFMSUB231SSZmk_Int = 10709 |
| 150443 | CEFBS_None, // VFMSUB231SSZmkz_Int = 10710 |
| 150444 | CEFBS_None, // VFMSUB231SSZr = 10711 |
| 150445 | CEFBS_None, // VFMSUB231SSZr_Int = 10712 |
| 150446 | CEFBS_None, // VFMSUB231SSZrb = 10713 |
| 150447 | CEFBS_None, // VFMSUB231SSZrb_Int = 10714 |
| 150448 | CEFBS_None, // VFMSUB231SSZrbk_Int = 10715 |
| 150449 | CEFBS_None, // VFMSUB231SSZrbkz_Int = 10716 |
| 150450 | CEFBS_None, // VFMSUB231SSZrk_Int = 10717 |
| 150451 | CEFBS_None, // VFMSUB231SSZrkz_Int = 10718 |
| 150452 | CEFBS_None, // VFMSUB231SSm = 10719 |
| 150453 | CEFBS_None, // VFMSUB231SSm_Int = 10720 |
| 150454 | CEFBS_None, // VFMSUB231SSr = 10721 |
| 150455 | CEFBS_None, // VFMSUB231SSr_Int = 10722 |
| 150456 | CEFBS_None, // VFMSUBADD132PDYm = 10723 |
| 150457 | CEFBS_None, // VFMSUBADD132PDYr = 10724 |
| 150458 | CEFBS_None, // VFMSUBADD132PDZ128m = 10725 |
| 150459 | CEFBS_None, // VFMSUBADD132PDZ128mb = 10726 |
| 150460 | CEFBS_None, // VFMSUBADD132PDZ128mbk = 10727 |
| 150461 | CEFBS_None, // VFMSUBADD132PDZ128mbkz = 10728 |
| 150462 | CEFBS_None, // VFMSUBADD132PDZ128mk = 10729 |
| 150463 | CEFBS_None, // VFMSUBADD132PDZ128mkz = 10730 |
| 150464 | CEFBS_None, // VFMSUBADD132PDZ128r = 10731 |
| 150465 | CEFBS_None, // VFMSUBADD132PDZ128rk = 10732 |
| 150466 | CEFBS_None, // VFMSUBADD132PDZ128rkz = 10733 |
| 150467 | CEFBS_None, // VFMSUBADD132PDZ256m = 10734 |
| 150468 | CEFBS_None, // VFMSUBADD132PDZ256mb = 10735 |
| 150469 | CEFBS_None, // VFMSUBADD132PDZ256mbk = 10736 |
| 150470 | CEFBS_None, // VFMSUBADD132PDZ256mbkz = 10737 |
| 150471 | CEFBS_None, // VFMSUBADD132PDZ256mk = 10738 |
| 150472 | CEFBS_None, // VFMSUBADD132PDZ256mkz = 10739 |
| 150473 | CEFBS_None, // VFMSUBADD132PDZ256r = 10740 |
| 150474 | CEFBS_None, // VFMSUBADD132PDZ256rk = 10741 |
| 150475 | CEFBS_None, // VFMSUBADD132PDZ256rkz = 10742 |
| 150476 | CEFBS_None, // VFMSUBADD132PDZm = 10743 |
| 150477 | CEFBS_None, // VFMSUBADD132PDZmb = 10744 |
| 150478 | CEFBS_None, // VFMSUBADD132PDZmbk = 10745 |
| 150479 | CEFBS_None, // VFMSUBADD132PDZmbkz = 10746 |
| 150480 | CEFBS_None, // VFMSUBADD132PDZmk = 10747 |
| 150481 | CEFBS_None, // VFMSUBADD132PDZmkz = 10748 |
| 150482 | CEFBS_None, // VFMSUBADD132PDZr = 10749 |
| 150483 | CEFBS_None, // VFMSUBADD132PDZrb = 10750 |
| 150484 | CEFBS_None, // VFMSUBADD132PDZrbk = 10751 |
| 150485 | CEFBS_None, // VFMSUBADD132PDZrbkz = 10752 |
| 150486 | CEFBS_None, // VFMSUBADD132PDZrk = 10753 |
| 150487 | CEFBS_None, // VFMSUBADD132PDZrkz = 10754 |
| 150488 | CEFBS_None, // VFMSUBADD132PDm = 10755 |
| 150489 | CEFBS_None, // VFMSUBADD132PDr = 10756 |
| 150490 | CEFBS_None, // VFMSUBADD132PHZ128m = 10757 |
| 150491 | CEFBS_None, // VFMSUBADD132PHZ128mb = 10758 |
| 150492 | CEFBS_None, // VFMSUBADD132PHZ128mbk = 10759 |
| 150493 | CEFBS_None, // VFMSUBADD132PHZ128mbkz = 10760 |
| 150494 | CEFBS_None, // VFMSUBADD132PHZ128mk = 10761 |
| 150495 | CEFBS_None, // VFMSUBADD132PHZ128mkz = 10762 |
| 150496 | CEFBS_None, // VFMSUBADD132PHZ128r = 10763 |
| 150497 | CEFBS_None, // VFMSUBADD132PHZ128rk = 10764 |
| 150498 | CEFBS_None, // VFMSUBADD132PHZ128rkz = 10765 |
| 150499 | CEFBS_None, // VFMSUBADD132PHZ256m = 10766 |
| 150500 | CEFBS_None, // VFMSUBADD132PHZ256mb = 10767 |
| 150501 | CEFBS_None, // VFMSUBADD132PHZ256mbk = 10768 |
| 150502 | CEFBS_None, // VFMSUBADD132PHZ256mbkz = 10769 |
| 150503 | CEFBS_None, // VFMSUBADD132PHZ256mk = 10770 |
| 150504 | CEFBS_None, // VFMSUBADD132PHZ256mkz = 10771 |
| 150505 | CEFBS_None, // VFMSUBADD132PHZ256r = 10772 |
| 150506 | CEFBS_None, // VFMSUBADD132PHZ256rk = 10773 |
| 150507 | CEFBS_None, // VFMSUBADD132PHZ256rkz = 10774 |
| 150508 | CEFBS_None, // VFMSUBADD132PHZm = 10775 |
| 150509 | CEFBS_None, // VFMSUBADD132PHZmb = 10776 |
| 150510 | CEFBS_None, // VFMSUBADD132PHZmbk = 10777 |
| 150511 | CEFBS_None, // VFMSUBADD132PHZmbkz = 10778 |
| 150512 | CEFBS_None, // VFMSUBADD132PHZmk = 10779 |
| 150513 | CEFBS_None, // VFMSUBADD132PHZmkz = 10780 |
| 150514 | CEFBS_None, // VFMSUBADD132PHZr = 10781 |
| 150515 | CEFBS_None, // VFMSUBADD132PHZrb = 10782 |
| 150516 | CEFBS_None, // VFMSUBADD132PHZrbk = 10783 |
| 150517 | CEFBS_None, // VFMSUBADD132PHZrbkz = 10784 |
| 150518 | CEFBS_None, // VFMSUBADD132PHZrk = 10785 |
| 150519 | CEFBS_None, // VFMSUBADD132PHZrkz = 10786 |
| 150520 | CEFBS_None, // VFMSUBADD132PSYm = 10787 |
| 150521 | CEFBS_None, // VFMSUBADD132PSYr = 10788 |
| 150522 | CEFBS_None, // VFMSUBADD132PSZ128m = 10789 |
| 150523 | CEFBS_None, // VFMSUBADD132PSZ128mb = 10790 |
| 150524 | CEFBS_None, // VFMSUBADD132PSZ128mbk = 10791 |
| 150525 | CEFBS_None, // VFMSUBADD132PSZ128mbkz = 10792 |
| 150526 | CEFBS_None, // VFMSUBADD132PSZ128mk = 10793 |
| 150527 | CEFBS_None, // VFMSUBADD132PSZ128mkz = 10794 |
| 150528 | CEFBS_None, // VFMSUBADD132PSZ128r = 10795 |
| 150529 | CEFBS_None, // VFMSUBADD132PSZ128rk = 10796 |
| 150530 | CEFBS_None, // VFMSUBADD132PSZ128rkz = 10797 |
| 150531 | CEFBS_None, // VFMSUBADD132PSZ256m = 10798 |
| 150532 | CEFBS_None, // VFMSUBADD132PSZ256mb = 10799 |
| 150533 | CEFBS_None, // VFMSUBADD132PSZ256mbk = 10800 |
| 150534 | CEFBS_None, // VFMSUBADD132PSZ256mbkz = 10801 |
| 150535 | CEFBS_None, // VFMSUBADD132PSZ256mk = 10802 |
| 150536 | CEFBS_None, // VFMSUBADD132PSZ256mkz = 10803 |
| 150537 | CEFBS_None, // VFMSUBADD132PSZ256r = 10804 |
| 150538 | CEFBS_None, // VFMSUBADD132PSZ256rk = 10805 |
| 150539 | CEFBS_None, // VFMSUBADD132PSZ256rkz = 10806 |
| 150540 | CEFBS_None, // VFMSUBADD132PSZm = 10807 |
| 150541 | CEFBS_None, // VFMSUBADD132PSZmb = 10808 |
| 150542 | CEFBS_None, // VFMSUBADD132PSZmbk = 10809 |
| 150543 | CEFBS_None, // VFMSUBADD132PSZmbkz = 10810 |
| 150544 | CEFBS_None, // VFMSUBADD132PSZmk = 10811 |
| 150545 | CEFBS_None, // VFMSUBADD132PSZmkz = 10812 |
| 150546 | CEFBS_None, // VFMSUBADD132PSZr = 10813 |
| 150547 | CEFBS_None, // VFMSUBADD132PSZrb = 10814 |
| 150548 | CEFBS_None, // VFMSUBADD132PSZrbk = 10815 |
| 150549 | CEFBS_None, // VFMSUBADD132PSZrbkz = 10816 |
| 150550 | CEFBS_None, // VFMSUBADD132PSZrk = 10817 |
| 150551 | CEFBS_None, // VFMSUBADD132PSZrkz = 10818 |
| 150552 | CEFBS_None, // VFMSUBADD132PSm = 10819 |
| 150553 | CEFBS_None, // VFMSUBADD132PSr = 10820 |
| 150554 | CEFBS_None, // VFMSUBADD213PDYm = 10821 |
| 150555 | CEFBS_None, // VFMSUBADD213PDYr = 10822 |
| 150556 | CEFBS_None, // VFMSUBADD213PDZ128m = 10823 |
| 150557 | CEFBS_None, // VFMSUBADD213PDZ128mb = 10824 |
| 150558 | CEFBS_None, // VFMSUBADD213PDZ128mbk = 10825 |
| 150559 | CEFBS_None, // VFMSUBADD213PDZ128mbkz = 10826 |
| 150560 | CEFBS_None, // VFMSUBADD213PDZ128mk = 10827 |
| 150561 | CEFBS_None, // VFMSUBADD213PDZ128mkz = 10828 |
| 150562 | CEFBS_None, // VFMSUBADD213PDZ128r = 10829 |
| 150563 | CEFBS_None, // VFMSUBADD213PDZ128rk = 10830 |
| 150564 | CEFBS_None, // VFMSUBADD213PDZ128rkz = 10831 |
| 150565 | CEFBS_None, // VFMSUBADD213PDZ256m = 10832 |
| 150566 | CEFBS_None, // VFMSUBADD213PDZ256mb = 10833 |
| 150567 | CEFBS_None, // VFMSUBADD213PDZ256mbk = 10834 |
| 150568 | CEFBS_None, // VFMSUBADD213PDZ256mbkz = 10835 |
| 150569 | CEFBS_None, // VFMSUBADD213PDZ256mk = 10836 |
| 150570 | CEFBS_None, // VFMSUBADD213PDZ256mkz = 10837 |
| 150571 | CEFBS_None, // VFMSUBADD213PDZ256r = 10838 |
| 150572 | CEFBS_None, // VFMSUBADD213PDZ256rk = 10839 |
| 150573 | CEFBS_None, // VFMSUBADD213PDZ256rkz = 10840 |
| 150574 | CEFBS_None, // VFMSUBADD213PDZm = 10841 |
| 150575 | CEFBS_None, // VFMSUBADD213PDZmb = 10842 |
| 150576 | CEFBS_None, // VFMSUBADD213PDZmbk = 10843 |
| 150577 | CEFBS_None, // VFMSUBADD213PDZmbkz = 10844 |
| 150578 | CEFBS_None, // VFMSUBADD213PDZmk = 10845 |
| 150579 | CEFBS_None, // VFMSUBADD213PDZmkz = 10846 |
| 150580 | CEFBS_None, // VFMSUBADD213PDZr = 10847 |
| 150581 | CEFBS_None, // VFMSUBADD213PDZrb = 10848 |
| 150582 | CEFBS_None, // VFMSUBADD213PDZrbk = 10849 |
| 150583 | CEFBS_None, // VFMSUBADD213PDZrbkz = 10850 |
| 150584 | CEFBS_None, // VFMSUBADD213PDZrk = 10851 |
| 150585 | CEFBS_None, // VFMSUBADD213PDZrkz = 10852 |
| 150586 | CEFBS_None, // VFMSUBADD213PDm = 10853 |
| 150587 | CEFBS_None, // VFMSUBADD213PDr = 10854 |
| 150588 | CEFBS_None, // VFMSUBADD213PHZ128m = 10855 |
| 150589 | CEFBS_None, // VFMSUBADD213PHZ128mb = 10856 |
| 150590 | CEFBS_None, // VFMSUBADD213PHZ128mbk = 10857 |
| 150591 | CEFBS_None, // VFMSUBADD213PHZ128mbkz = 10858 |
| 150592 | CEFBS_None, // VFMSUBADD213PHZ128mk = 10859 |
| 150593 | CEFBS_None, // VFMSUBADD213PHZ128mkz = 10860 |
| 150594 | CEFBS_None, // VFMSUBADD213PHZ128r = 10861 |
| 150595 | CEFBS_None, // VFMSUBADD213PHZ128rk = 10862 |
| 150596 | CEFBS_None, // VFMSUBADD213PHZ128rkz = 10863 |
| 150597 | CEFBS_None, // VFMSUBADD213PHZ256m = 10864 |
| 150598 | CEFBS_None, // VFMSUBADD213PHZ256mb = 10865 |
| 150599 | CEFBS_None, // VFMSUBADD213PHZ256mbk = 10866 |
| 150600 | CEFBS_None, // VFMSUBADD213PHZ256mbkz = 10867 |
| 150601 | CEFBS_None, // VFMSUBADD213PHZ256mk = 10868 |
| 150602 | CEFBS_None, // VFMSUBADD213PHZ256mkz = 10869 |
| 150603 | CEFBS_None, // VFMSUBADD213PHZ256r = 10870 |
| 150604 | CEFBS_None, // VFMSUBADD213PHZ256rk = 10871 |
| 150605 | CEFBS_None, // VFMSUBADD213PHZ256rkz = 10872 |
| 150606 | CEFBS_None, // VFMSUBADD213PHZm = 10873 |
| 150607 | CEFBS_None, // VFMSUBADD213PHZmb = 10874 |
| 150608 | CEFBS_None, // VFMSUBADD213PHZmbk = 10875 |
| 150609 | CEFBS_None, // VFMSUBADD213PHZmbkz = 10876 |
| 150610 | CEFBS_None, // VFMSUBADD213PHZmk = 10877 |
| 150611 | CEFBS_None, // VFMSUBADD213PHZmkz = 10878 |
| 150612 | CEFBS_None, // VFMSUBADD213PHZr = 10879 |
| 150613 | CEFBS_None, // VFMSUBADD213PHZrb = 10880 |
| 150614 | CEFBS_None, // VFMSUBADD213PHZrbk = 10881 |
| 150615 | CEFBS_None, // VFMSUBADD213PHZrbkz = 10882 |
| 150616 | CEFBS_None, // VFMSUBADD213PHZrk = 10883 |
| 150617 | CEFBS_None, // VFMSUBADD213PHZrkz = 10884 |
| 150618 | CEFBS_None, // VFMSUBADD213PSYm = 10885 |
| 150619 | CEFBS_None, // VFMSUBADD213PSYr = 10886 |
| 150620 | CEFBS_None, // VFMSUBADD213PSZ128m = 10887 |
| 150621 | CEFBS_None, // VFMSUBADD213PSZ128mb = 10888 |
| 150622 | CEFBS_None, // VFMSUBADD213PSZ128mbk = 10889 |
| 150623 | CEFBS_None, // VFMSUBADD213PSZ128mbkz = 10890 |
| 150624 | CEFBS_None, // VFMSUBADD213PSZ128mk = 10891 |
| 150625 | CEFBS_None, // VFMSUBADD213PSZ128mkz = 10892 |
| 150626 | CEFBS_None, // VFMSUBADD213PSZ128r = 10893 |
| 150627 | CEFBS_None, // VFMSUBADD213PSZ128rk = 10894 |
| 150628 | CEFBS_None, // VFMSUBADD213PSZ128rkz = 10895 |
| 150629 | CEFBS_None, // VFMSUBADD213PSZ256m = 10896 |
| 150630 | CEFBS_None, // VFMSUBADD213PSZ256mb = 10897 |
| 150631 | CEFBS_None, // VFMSUBADD213PSZ256mbk = 10898 |
| 150632 | CEFBS_None, // VFMSUBADD213PSZ256mbkz = 10899 |
| 150633 | CEFBS_None, // VFMSUBADD213PSZ256mk = 10900 |
| 150634 | CEFBS_None, // VFMSUBADD213PSZ256mkz = 10901 |
| 150635 | CEFBS_None, // VFMSUBADD213PSZ256r = 10902 |
| 150636 | CEFBS_None, // VFMSUBADD213PSZ256rk = 10903 |
| 150637 | CEFBS_None, // VFMSUBADD213PSZ256rkz = 10904 |
| 150638 | CEFBS_None, // VFMSUBADD213PSZm = 10905 |
| 150639 | CEFBS_None, // VFMSUBADD213PSZmb = 10906 |
| 150640 | CEFBS_None, // VFMSUBADD213PSZmbk = 10907 |
| 150641 | CEFBS_None, // VFMSUBADD213PSZmbkz = 10908 |
| 150642 | CEFBS_None, // VFMSUBADD213PSZmk = 10909 |
| 150643 | CEFBS_None, // VFMSUBADD213PSZmkz = 10910 |
| 150644 | CEFBS_None, // VFMSUBADD213PSZr = 10911 |
| 150645 | CEFBS_None, // VFMSUBADD213PSZrb = 10912 |
| 150646 | CEFBS_None, // VFMSUBADD213PSZrbk = 10913 |
| 150647 | CEFBS_None, // VFMSUBADD213PSZrbkz = 10914 |
| 150648 | CEFBS_None, // VFMSUBADD213PSZrk = 10915 |
| 150649 | CEFBS_None, // VFMSUBADD213PSZrkz = 10916 |
| 150650 | CEFBS_None, // VFMSUBADD213PSm = 10917 |
| 150651 | CEFBS_None, // VFMSUBADD213PSr = 10918 |
| 150652 | CEFBS_None, // VFMSUBADD231PDYm = 10919 |
| 150653 | CEFBS_None, // VFMSUBADD231PDYr = 10920 |
| 150654 | CEFBS_None, // VFMSUBADD231PDZ128m = 10921 |
| 150655 | CEFBS_None, // VFMSUBADD231PDZ128mb = 10922 |
| 150656 | CEFBS_None, // VFMSUBADD231PDZ128mbk = 10923 |
| 150657 | CEFBS_None, // VFMSUBADD231PDZ128mbkz = 10924 |
| 150658 | CEFBS_None, // VFMSUBADD231PDZ128mk = 10925 |
| 150659 | CEFBS_None, // VFMSUBADD231PDZ128mkz = 10926 |
| 150660 | CEFBS_None, // VFMSUBADD231PDZ128r = 10927 |
| 150661 | CEFBS_None, // VFMSUBADD231PDZ128rk = 10928 |
| 150662 | CEFBS_None, // VFMSUBADD231PDZ128rkz = 10929 |
| 150663 | CEFBS_None, // VFMSUBADD231PDZ256m = 10930 |
| 150664 | CEFBS_None, // VFMSUBADD231PDZ256mb = 10931 |
| 150665 | CEFBS_None, // VFMSUBADD231PDZ256mbk = 10932 |
| 150666 | CEFBS_None, // VFMSUBADD231PDZ256mbkz = 10933 |
| 150667 | CEFBS_None, // VFMSUBADD231PDZ256mk = 10934 |
| 150668 | CEFBS_None, // VFMSUBADD231PDZ256mkz = 10935 |
| 150669 | CEFBS_None, // VFMSUBADD231PDZ256r = 10936 |
| 150670 | CEFBS_None, // VFMSUBADD231PDZ256rk = 10937 |
| 150671 | CEFBS_None, // VFMSUBADD231PDZ256rkz = 10938 |
| 150672 | CEFBS_None, // VFMSUBADD231PDZm = 10939 |
| 150673 | CEFBS_None, // VFMSUBADD231PDZmb = 10940 |
| 150674 | CEFBS_None, // VFMSUBADD231PDZmbk = 10941 |
| 150675 | CEFBS_None, // VFMSUBADD231PDZmbkz = 10942 |
| 150676 | CEFBS_None, // VFMSUBADD231PDZmk = 10943 |
| 150677 | CEFBS_None, // VFMSUBADD231PDZmkz = 10944 |
| 150678 | CEFBS_None, // VFMSUBADD231PDZr = 10945 |
| 150679 | CEFBS_None, // VFMSUBADD231PDZrb = 10946 |
| 150680 | CEFBS_None, // VFMSUBADD231PDZrbk = 10947 |
| 150681 | CEFBS_None, // VFMSUBADD231PDZrbkz = 10948 |
| 150682 | CEFBS_None, // VFMSUBADD231PDZrk = 10949 |
| 150683 | CEFBS_None, // VFMSUBADD231PDZrkz = 10950 |
| 150684 | CEFBS_None, // VFMSUBADD231PDm = 10951 |
| 150685 | CEFBS_None, // VFMSUBADD231PDr = 10952 |
| 150686 | CEFBS_None, // VFMSUBADD231PHZ128m = 10953 |
| 150687 | CEFBS_None, // VFMSUBADD231PHZ128mb = 10954 |
| 150688 | CEFBS_None, // VFMSUBADD231PHZ128mbk = 10955 |
| 150689 | CEFBS_None, // VFMSUBADD231PHZ128mbkz = 10956 |
| 150690 | CEFBS_None, // VFMSUBADD231PHZ128mk = 10957 |
| 150691 | CEFBS_None, // VFMSUBADD231PHZ128mkz = 10958 |
| 150692 | CEFBS_None, // VFMSUBADD231PHZ128r = 10959 |
| 150693 | CEFBS_None, // VFMSUBADD231PHZ128rk = 10960 |
| 150694 | CEFBS_None, // VFMSUBADD231PHZ128rkz = 10961 |
| 150695 | CEFBS_None, // VFMSUBADD231PHZ256m = 10962 |
| 150696 | CEFBS_None, // VFMSUBADD231PHZ256mb = 10963 |
| 150697 | CEFBS_None, // VFMSUBADD231PHZ256mbk = 10964 |
| 150698 | CEFBS_None, // VFMSUBADD231PHZ256mbkz = 10965 |
| 150699 | CEFBS_None, // VFMSUBADD231PHZ256mk = 10966 |
| 150700 | CEFBS_None, // VFMSUBADD231PHZ256mkz = 10967 |
| 150701 | CEFBS_None, // VFMSUBADD231PHZ256r = 10968 |
| 150702 | CEFBS_None, // VFMSUBADD231PHZ256rk = 10969 |
| 150703 | CEFBS_None, // VFMSUBADD231PHZ256rkz = 10970 |
| 150704 | CEFBS_None, // VFMSUBADD231PHZm = 10971 |
| 150705 | CEFBS_None, // VFMSUBADD231PHZmb = 10972 |
| 150706 | CEFBS_None, // VFMSUBADD231PHZmbk = 10973 |
| 150707 | CEFBS_None, // VFMSUBADD231PHZmbkz = 10974 |
| 150708 | CEFBS_None, // VFMSUBADD231PHZmk = 10975 |
| 150709 | CEFBS_None, // VFMSUBADD231PHZmkz = 10976 |
| 150710 | CEFBS_None, // VFMSUBADD231PHZr = 10977 |
| 150711 | CEFBS_None, // VFMSUBADD231PHZrb = 10978 |
| 150712 | CEFBS_None, // VFMSUBADD231PHZrbk = 10979 |
| 150713 | CEFBS_None, // VFMSUBADD231PHZrbkz = 10980 |
| 150714 | CEFBS_None, // VFMSUBADD231PHZrk = 10981 |
| 150715 | CEFBS_None, // VFMSUBADD231PHZrkz = 10982 |
| 150716 | CEFBS_None, // VFMSUBADD231PSYm = 10983 |
| 150717 | CEFBS_None, // VFMSUBADD231PSYr = 10984 |
| 150718 | CEFBS_None, // VFMSUBADD231PSZ128m = 10985 |
| 150719 | CEFBS_None, // VFMSUBADD231PSZ128mb = 10986 |
| 150720 | CEFBS_None, // VFMSUBADD231PSZ128mbk = 10987 |
| 150721 | CEFBS_None, // VFMSUBADD231PSZ128mbkz = 10988 |
| 150722 | CEFBS_None, // VFMSUBADD231PSZ128mk = 10989 |
| 150723 | CEFBS_None, // VFMSUBADD231PSZ128mkz = 10990 |
| 150724 | CEFBS_None, // VFMSUBADD231PSZ128r = 10991 |
| 150725 | CEFBS_None, // VFMSUBADD231PSZ128rk = 10992 |
| 150726 | CEFBS_None, // VFMSUBADD231PSZ128rkz = 10993 |
| 150727 | CEFBS_None, // VFMSUBADD231PSZ256m = 10994 |
| 150728 | CEFBS_None, // VFMSUBADD231PSZ256mb = 10995 |
| 150729 | CEFBS_None, // VFMSUBADD231PSZ256mbk = 10996 |
| 150730 | CEFBS_None, // VFMSUBADD231PSZ256mbkz = 10997 |
| 150731 | CEFBS_None, // VFMSUBADD231PSZ256mk = 10998 |
| 150732 | CEFBS_None, // VFMSUBADD231PSZ256mkz = 10999 |
| 150733 | CEFBS_None, // VFMSUBADD231PSZ256r = 11000 |
| 150734 | CEFBS_None, // VFMSUBADD231PSZ256rk = 11001 |
| 150735 | CEFBS_None, // VFMSUBADD231PSZ256rkz = 11002 |
| 150736 | CEFBS_None, // VFMSUBADD231PSZm = 11003 |
| 150737 | CEFBS_None, // VFMSUBADD231PSZmb = 11004 |
| 150738 | CEFBS_None, // VFMSUBADD231PSZmbk = 11005 |
| 150739 | CEFBS_None, // VFMSUBADD231PSZmbkz = 11006 |
| 150740 | CEFBS_None, // VFMSUBADD231PSZmk = 11007 |
| 150741 | CEFBS_None, // VFMSUBADD231PSZmkz = 11008 |
| 150742 | CEFBS_None, // VFMSUBADD231PSZr = 11009 |
| 150743 | CEFBS_None, // VFMSUBADD231PSZrb = 11010 |
| 150744 | CEFBS_None, // VFMSUBADD231PSZrbk = 11011 |
| 150745 | CEFBS_None, // VFMSUBADD231PSZrbkz = 11012 |
| 150746 | CEFBS_None, // VFMSUBADD231PSZrk = 11013 |
| 150747 | CEFBS_None, // VFMSUBADD231PSZrkz = 11014 |
| 150748 | CEFBS_None, // VFMSUBADD231PSm = 11015 |
| 150749 | CEFBS_None, // VFMSUBADD231PSr = 11016 |
| 150750 | CEFBS_None, // VFMSUBADDPD4Ymr = 11017 |
| 150751 | CEFBS_None, // VFMSUBADDPD4Yrm = 11018 |
| 150752 | CEFBS_None, // VFMSUBADDPD4Yrr = 11019 |
| 150753 | CEFBS_None, // VFMSUBADDPD4Yrr_REV = 11020 |
| 150754 | CEFBS_None, // VFMSUBADDPD4mr = 11021 |
| 150755 | CEFBS_None, // VFMSUBADDPD4rm = 11022 |
| 150756 | CEFBS_None, // VFMSUBADDPD4rr = 11023 |
| 150757 | CEFBS_None, // VFMSUBADDPD4rr_REV = 11024 |
| 150758 | CEFBS_None, // VFMSUBADDPS4Ymr = 11025 |
| 150759 | CEFBS_None, // VFMSUBADDPS4Yrm = 11026 |
| 150760 | CEFBS_None, // VFMSUBADDPS4Yrr = 11027 |
| 150761 | CEFBS_None, // VFMSUBADDPS4Yrr_REV = 11028 |
| 150762 | CEFBS_None, // VFMSUBADDPS4mr = 11029 |
| 150763 | CEFBS_None, // VFMSUBADDPS4rm = 11030 |
| 150764 | CEFBS_None, // VFMSUBADDPS4rr = 11031 |
| 150765 | CEFBS_None, // VFMSUBADDPS4rr_REV = 11032 |
| 150766 | CEFBS_None, // VFMSUBPD4Ymr = 11033 |
| 150767 | CEFBS_None, // VFMSUBPD4Yrm = 11034 |
| 150768 | CEFBS_None, // VFMSUBPD4Yrr = 11035 |
| 150769 | CEFBS_None, // VFMSUBPD4Yrr_REV = 11036 |
| 150770 | CEFBS_None, // VFMSUBPD4mr = 11037 |
| 150771 | CEFBS_None, // VFMSUBPD4rm = 11038 |
| 150772 | CEFBS_None, // VFMSUBPD4rr = 11039 |
| 150773 | CEFBS_None, // VFMSUBPD4rr_REV = 11040 |
| 150774 | CEFBS_None, // VFMSUBPS4Ymr = 11041 |
| 150775 | CEFBS_None, // VFMSUBPS4Yrm = 11042 |
| 150776 | CEFBS_None, // VFMSUBPS4Yrr = 11043 |
| 150777 | CEFBS_None, // VFMSUBPS4Yrr_REV = 11044 |
| 150778 | CEFBS_None, // VFMSUBPS4mr = 11045 |
| 150779 | CEFBS_None, // VFMSUBPS4rm = 11046 |
| 150780 | CEFBS_None, // VFMSUBPS4rr = 11047 |
| 150781 | CEFBS_None, // VFMSUBPS4rr_REV = 11048 |
| 150782 | CEFBS_None, // VFMSUBSD4mr = 11049 |
| 150783 | CEFBS_None, // VFMSUBSD4mr_Int = 11050 |
| 150784 | CEFBS_None, // VFMSUBSD4rm = 11051 |
| 150785 | CEFBS_None, // VFMSUBSD4rm_Int = 11052 |
| 150786 | CEFBS_None, // VFMSUBSD4rr = 11053 |
| 150787 | CEFBS_None, // VFMSUBSD4rr_Int = 11054 |
| 150788 | CEFBS_None, // VFMSUBSD4rr_Int_REV = 11055 |
| 150789 | CEFBS_None, // VFMSUBSD4rr_REV = 11056 |
| 150790 | CEFBS_None, // VFMSUBSS4mr = 11057 |
| 150791 | CEFBS_None, // VFMSUBSS4mr_Int = 11058 |
| 150792 | CEFBS_None, // VFMSUBSS4rm = 11059 |
| 150793 | CEFBS_None, // VFMSUBSS4rm_Int = 11060 |
| 150794 | CEFBS_None, // VFMSUBSS4rr = 11061 |
| 150795 | CEFBS_None, // VFMSUBSS4rr_Int = 11062 |
| 150796 | CEFBS_None, // VFMSUBSS4rr_Int_REV = 11063 |
| 150797 | CEFBS_None, // VFMSUBSS4rr_REV = 11064 |
| 150798 | CEFBS_None, // VFMULCPHZ128rm = 11065 |
| 150799 | CEFBS_None, // VFMULCPHZ128rmb = 11066 |
| 150800 | CEFBS_None, // VFMULCPHZ128rmbk = 11067 |
| 150801 | CEFBS_None, // VFMULCPHZ128rmbkz = 11068 |
| 150802 | CEFBS_None, // VFMULCPHZ128rmk = 11069 |
| 150803 | CEFBS_None, // VFMULCPHZ128rmkz = 11070 |
| 150804 | CEFBS_None, // VFMULCPHZ128rr = 11071 |
| 150805 | CEFBS_None, // VFMULCPHZ128rrk = 11072 |
| 150806 | CEFBS_None, // VFMULCPHZ128rrkz = 11073 |
| 150807 | CEFBS_None, // VFMULCPHZ256rm = 11074 |
| 150808 | CEFBS_None, // VFMULCPHZ256rmb = 11075 |
| 150809 | CEFBS_None, // VFMULCPHZ256rmbk = 11076 |
| 150810 | CEFBS_None, // VFMULCPHZ256rmbkz = 11077 |
| 150811 | CEFBS_None, // VFMULCPHZ256rmk = 11078 |
| 150812 | CEFBS_None, // VFMULCPHZ256rmkz = 11079 |
| 150813 | CEFBS_None, // VFMULCPHZ256rr = 11080 |
| 150814 | CEFBS_None, // VFMULCPHZ256rrk = 11081 |
| 150815 | CEFBS_None, // VFMULCPHZ256rrkz = 11082 |
| 150816 | CEFBS_None, // VFMULCPHZrm = 11083 |
| 150817 | CEFBS_None, // VFMULCPHZrmb = 11084 |
| 150818 | CEFBS_None, // VFMULCPHZrmbk = 11085 |
| 150819 | CEFBS_None, // VFMULCPHZrmbkz = 11086 |
| 150820 | CEFBS_None, // VFMULCPHZrmk = 11087 |
| 150821 | CEFBS_None, // VFMULCPHZrmkz = 11088 |
| 150822 | CEFBS_None, // VFMULCPHZrr = 11089 |
| 150823 | CEFBS_None, // VFMULCPHZrrb = 11090 |
| 150824 | CEFBS_None, // VFMULCPHZrrbk = 11091 |
| 150825 | CEFBS_None, // VFMULCPHZrrbkz = 11092 |
| 150826 | CEFBS_None, // VFMULCPHZrrk = 11093 |
| 150827 | CEFBS_None, // VFMULCPHZrrkz = 11094 |
| 150828 | CEFBS_None, // VFMULCSHZrm = 11095 |
| 150829 | CEFBS_None, // VFMULCSHZrmk = 11096 |
| 150830 | CEFBS_None, // VFMULCSHZrmkz = 11097 |
| 150831 | CEFBS_None, // VFMULCSHZrr = 11098 |
| 150832 | CEFBS_None, // VFMULCSHZrrb = 11099 |
| 150833 | CEFBS_None, // VFMULCSHZrrbk = 11100 |
| 150834 | CEFBS_None, // VFMULCSHZrrbkz = 11101 |
| 150835 | CEFBS_None, // VFMULCSHZrrk = 11102 |
| 150836 | CEFBS_None, // VFMULCSHZrrkz = 11103 |
| 150837 | CEFBS_None, // VFNMADD132BF16Z128m = 11104 |
| 150838 | CEFBS_None, // VFNMADD132BF16Z128mb = 11105 |
| 150839 | CEFBS_None, // VFNMADD132BF16Z128mbk = 11106 |
| 150840 | CEFBS_None, // VFNMADD132BF16Z128mbkz = 11107 |
| 150841 | CEFBS_None, // VFNMADD132BF16Z128mk = 11108 |
| 150842 | CEFBS_None, // VFNMADD132BF16Z128mkz = 11109 |
| 150843 | CEFBS_None, // VFNMADD132BF16Z128r = 11110 |
| 150844 | CEFBS_None, // VFNMADD132BF16Z128rk = 11111 |
| 150845 | CEFBS_None, // VFNMADD132BF16Z128rkz = 11112 |
| 150846 | CEFBS_None, // VFNMADD132BF16Z256m = 11113 |
| 150847 | CEFBS_None, // VFNMADD132BF16Z256mb = 11114 |
| 150848 | CEFBS_None, // VFNMADD132BF16Z256mbk = 11115 |
| 150849 | CEFBS_None, // VFNMADD132BF16Z256mbkz = 11116 |
| 150850 | CEFBS_None, // VFNMADD132BF16Z256mk = 11117 |
| 150851 | CEFBS_None, // VFNMADD132BF16Z256mkz = 11118 |
| 150852 | CEFBS_None, // VFNMADD132BF16Z256r = 11119 |
| 150853 | CEFBS_None, // VFNMADD132BF16Z256rk = 11120 |
| 150854 | CEFBS_None, // VFNMADD132BF16Z256rkz = 11121 |
| 150855 | CEFBS_None, // VFNMADD132BF16Zm = 11122 |
| 150856 | CEFBS_None, // VFNMADD132BF16Zmb = 11123 |
| 150857 | CEFBS_None, // VFNMADD132BF16Zmbk = 11124 |
| 150858 | CEFBS_None, // VFNMADD132BF16Zmbkz = 11125 |
| 150859 | CEFBS_None, // VFNMADD132BF16Zmk = 11126 |
| 150860 | CEFBS_None, // VFNMADD132BF16Zmkz = 11127 |
| 150861 | CEFBS_None, // VFNMADD132BF16Zr = 11128 |
| 150862 | CEFBS_None, // VFNMADD132BF16Zrk = 11129 |
| 150863 | CEFBS_None, // VFNMADD132BF16Zrkz = 11130 |
| 150864 | CEFBS_None, // VFNMADD132PDYm = 11131 |
| 150865 | CEFBS_None, // VFNMADD132PDYr = 11132 |
| 150866 | CEFBS_None, // VFNMADD132PDZ128m = 11133 |
| 150867 | CEFBS_None, // VFNMADD132PDZ128mb = 11134 |
| 150868 | CEFBS_None, // VFNMADD132PDZ128mbk = 11135 |
| 150869 | CEFBS_None, // VFNMADD132PDZ128mbkz = 11136 |
| 150870 | CEFBS_None, // VFNMADD132PDZ128mk = 11137 |
| 150871 | CEFBS_None, // VFNMADD132PDZ128mkz = 11138 |
| 150872 | CEFBS_None, // VFNMADD132PDZ128r = 11139 |
| 150873 | CEFBS_None, // VFNMADD132PDZ128rk = 11140 |
| 150874 | CEFBS_None, // VFNMADD132PDZ128rkz = 11141 |
| 150875 | CEFBS_None, // VFNMADD132PDZ256m = 11142 |
| 150876 | CEFBS_None, // VFNMADD132PDZ256mb = 11143 |
| 150877 | CEFBS_None, // VFNMADD132PDZ256mbk = 11144 |
| 150878 | CEFBS_None, // VFNMADD132PDZ256mbkz = 11145 |
| 150879 | CEFBS_None, // VFNMADD132PDZ256mk = 11146 |
| 150880 | CEFBS_None, // VFNMADD132PDZ256mkz = 11147 |
| 150881 | CEFBS_None, // VFNMADD132PDZ256r = 11148 |
| 150882 | CEFBS_None, // VFNMADD132PDZ256rk = 11149 |
| 150883 | CEFBS_None, // VFNMADD132PDZ256rkz = 11150 |
| 150884 | CEFBS_None, // VFNMADD132PDZm = 11151 |
| 150885 | CEFBS_None, // VFNMADD132PDZmb = 11152 |
| 150886 | CEFBS_None, // VFNMADD132PDZmbk = 11153 |
| 150887 | CEFBS_None, // VFNMADD132PDZmbkz = 11154 |
| 150888 | CEFBS_None, // VFNMADD132PDZmk = 11155 |
| 150889 | CEFBS_None, // VFNMADD132PDZmkz = 11156 |
| 150890 | CEFBS_None, // VFNMADD132PDZr = 11157 |
| 150891 | CEFBS_None, // VFNMADD132PDZrb = 11158 |
| 150892 | CEFBS_None, // VFNMADD132PDZrbk = 11159 |
| 150893 | CEFBS_None, // VFNMADD132PDZrbkz = 11160 |
| 150894 | CEFBS_None, // VFNMADD132PDZrk = 11161 |
| 150895 | CEFBS_None, // VFNMADD132PDZrkz = 11162 |
| 150896 | CEFBS_None, // VFNMADD132PDm = 11163 |
| 150897 | CEFBS_None, // VFNMADD132PDr = 11164 |
| 150898 | CEFBS_None, // VFNMADD132PHZ128m = 11165 |
| 150899 | CEFBS_None, // VFNMADD132PHZ128mb = 11166 |
| 150900 | CEFBS_None, // VFNMADD132PHZ128mbk = 11167 |
| 150901 | CEFBS_None, // VFNMADD132PHZ128mbkz = 11168 |
| 150902 | CEFBS_None, // VFNMADD132PHZ128mk = 11169 |
| 150903 | CEFBS_None, // VFNMADD132PHZ128mkz = 11170 |
| 150904 | CEFBS_None, // VFNMADD132PHZ128r = 11171 |
| 150905 | CEFBS_None, // VFNMADD132PHZ128rk = 11172 |
| 150906 | CEFBS_None, // VFNMADD132PHZ128rkz = 11173 |
| 150907 | CEFBS_None, // VFNMADD132PHZ256m = 11174 |
| 150908 | CEFBS_None, // VFNMADD132PHZ256mb = 11175 |
| 150909 | CEFBS_None, // VFNMADD132PHZ256mbk = 11176 |
| 150910 | CEFBS_None, // VFNMADD132PHZ256mbkz = 11177 |
| 150911 | CEFBS_None, // VFNMADD132PHZ256mk = 11178 |
| 150912 | CEFBS_None, // VFNMADD132PHZ256mkz = 11179 |
| 150913 | CEFBS_None, // VFNMADD132PHZ256r = 11180 |
| 150914 | CEFBS_None, // VFNMADD132PHZ256rk = 11181 |
| 150915 | CEFBS_None, // VFNMADD132PHZ256rkz = 11182 |
| 150916 | CEFBS_None, // VFNMADD132PHZm = 11183 |
| 150917 | CEFBS_None, // VFNMADD132PHZmb = 11184 |
| 150918 | CEFBS_None, // VFNMADD132PHZmbk = 11185 |
| 150919 | CEFBS_None, // VFNMADD132PHZmbkz = 11186 |
| 150920 | CEFBS_None, // VFNMADD132PHZmk = 11187 |
| 150921 | CEFBS_None, // VFNMADD132PHZmkz = 11188 |
| 150922 | CEFBS_None, // VFNMADD132PHZr = 11189 |
| 150923 | CEFBS_None, // VFNMADD132PHZrb = 11190 |
| 150924 | CEFBS_None, // VFNMADD132PHZrbk = 11191 |
| 150925 | CEFBS_None, // VFNMADD132PHZrbkz = 11192 |
| 150926 | CEFBS_None, // VFNMADD132PHZrk = 11193 |
| 150927 | CEFBS_None, // VFNMADD132PHZrkz = 11194 |
| 150928 | CEFBS_None, // VFNMADD132PSYm = 11195 |
| 150929 | CEFBS_None, // VFNMADD132PSYr = 11196 |
| 150930 | CEFBS_None, // VFNMADD132PSZ128m = 11197 |
| 150931 | CEFBS_None, // VFNMADD132PSZ128mb = 11198 |
| 150932 | CEFBS_None, // VFNMADD132PSZ128mbk = 11199 |
| 150933 | CEFBS_None, // VFNMADD132PSZ128mbkz = 11200 |
| 150934 | CEFBS_None, // VFNMADD132PSZ128mk = 11201 |
| 150935 | CEFBS_None, // VFNMADD132PSZ128mkz = 11202 |
| 150936 | CEFBS_None, // VFNMADD132PSZ128r = 11203 |
| 150937 | CEFBS_None, // VFNMADD132PSZ128rk = 11204 |
| 150938 | CEFBS_None, // VFNMADD132PSZ128rkz = 11205 |
| 150939 | CEFBS_None, // VFNMADD132PSZ256m = 11206 |
| 150940 | CEFBS_None, // VFNMADD132PSZ256mb = 11207 |
| 150941 | CEFBS_None, // VFNMADD132PSZ256mbk = 11208 |
| 150942 | CEFBS_None, // VFNMADD132PSZ256mbkz = 11209 |
| 150943 | CEFBS_None, // VFNMADD132PSZ256mk = 11210 |
| 150944 | CEFBS_None, // VFNMADD132PSZ256mkz = 11211 |
| 150945 | CEFBS_None, // VFNMADD132PSZ256r = 11212 |
| 150946 | CEFBS_None, // VFNMADD132PSZ256rk = 11213 |
| 150947 | CEFBS_None, // VFNMADD132PSZ256rkz = 11214 |
| 150948 | CEFBS_None, // VFNMADD132PSZm = 11215 |
| 150949 | CEFBS_None, // VFNMADD132PSZmb = 11216 |
| 150950 | CEFBS_None, // VFNMADD132PSZmbk = 11217 |
| 150951 | CEFBS_None, // VFNMADD132PSZmbkz = 11218 |
| 150952 | CEFBS_None, // VFNMADD132PSZmk = 11219 |
| 150953 | CEFBS_None, // VFNMADD132PSZmkz = 11220 |
| 150954 | CEFBS_None, // VFNMADD132PSZr = 11221 |
| 150955 | CEFBS_None, // VFNMADD132PSZrb = 11222 |
| 150956 | CEFBS_None, // VFNMADD132PSZrbk = 11223 |
| 150957 | CEFBS_None, // VFNMADD132PSZrbkz = 11224 |
| 150958 | CEFBS_None, // VFNMADD132PSZrk = 11225 |
| 150959 | CEFBS_None, // VFNMADD132PSZrkz = 11226 |
| 150960 | CEFBS_None, // VFNMADD132PSm = 11227 |
| 150961 | CEFBS_None, // VFNMADD132PSr = 11228 |
| 150962 | CEFBS_None, // VFNMADD132SDZm = 11229 |
| 150963 | CEFBS_None, // VFNMADD132SDZm_Int = 11230 |
| 150964 | CEFBS_None, // VFNMADD132SDZmk_Int = 11231 |
| 150965 | CEFBS_None, // VFNMADD132SDZmkz_Int = 11232 |
| 150966 | CEFBS_None, // VFNMADD132SDZr = 11233 |
| 150967 | CEFBS_None, // VFNMADD132SDZr_Int = 11234 |
| 150968 | CEFBS_None, // VFNMADD132SDZrb = 11235 |
| 150969 | CEFBS_None, // VFNMADD132SDZrb_Int = 11236 |
| 150970 | CEFBS_None, // VFNMADD132SDZrbk_Int = 11237 |
| 150971 | CEFBS_None, // VFNMADD132SDZrbkz_Int = 11238 |
| 150972 | CEFBS_None, // VFNMADD132SDZrk_Int = 11239 |
| 150973 | CEFBS_None, // VFNMADD132SDZrkz_Int = 11240 |
| 150974 | CEFBS_None, // VFNMADD132SDm = 11241 |
| 150975 | CEFBS_None, // VFNMADD132SDm_Int = 11242 |
| 150976 | CEFBS_None, // VFNMADD132SDr = 11243 |
| 150977 | CEFBS_None, // VFNMADD132SDr_Int = 11244 |
| 150978 | CEFBS_None, // VFNMADD132SHZm = 11245 |
| 150979 | CEFBS_None, // VFNMADD132SHZm_Int = 11246 |
| 150980 | CEFBS_None, // VFNMADD132SHZmk_Int = 11247 |
| 150981 | CEFBS_None, // VFNMADD132SHZmkz_Int = 11248 |
| 150982 | CEFBS_None, // VFNMADD132SHZr = 11249 |
| 150983 | CEFBS_None, // VFNMADD132SHZr_Int = 11250 |
| 150984 | CEFBS_None, // VFNMADD132SHZrb = 11251 |
| 150985 | CEFBS_None, // VFNMADD132SHZrb_Int = 11252 |
| 150986 | CEFBS_None, // VFNMADD132SHZrbk_Int = 11253 |
| 150987 | CEFBS_None, // VFNMADD132SHZrbkz_Int = 11254 |
| 150988 | CEFBS_None, // VFNMADD132SHZrk_Int = 11255 |
| 150989 | CEFBS_None, // VFNMADD132SHZrkz_Int = 11256 |
| 150990 | CEFBS_None, // VFNMADD132SSZm = 11257 |
| 150991 | CEFBS_None, // VFNMADD132SSZm_Int = 11258 |
| 150992 | CEFBS_None, // VFNMADD132SSZmk_Int = 11259 |
| 150993 | CEFBS_None, // VFNMADD132SSZmkz_Int = 11260 |
| 150994 | CEFBS_None, // VFNMADD132SSZr = 11261 |
| 150995 | CEFBS_None, // VFNMADD132SSZr_Int = 11262 |
| 150996 | CEFBS_None, // VFNMADD132SSZrb = 11263 |
| 150997 | CEFBS_None, // VFNMADD132SSZrb_Int = 11264 |
| 150998 | CEFBS_None, // VFNMADD132SSZrbk_Int = 11265 |
| 150999 | CEFBS_None, // VFNMADD132SSZrbkz_Int = 11266 |
| 151000 | CEFBS_None, // VFNMADD132SSZrk_Int = 11267 |
| 151001 | CEFBS_None, // VFNMADD132SSZrkz_Int = 11268 |
| 151002 | CEFBS_None, // VFNMADD132SSm = 11269 |
| 151003 | CEFBS_None, // VFNMADD132SSm_Int = 11270 |
| 151004 | CEFBS_None, // VFNMADD132SSr = 11271 |
| 151005 | CEFBS_None, // VFNMADD132SSr_Int = 11272 |
| 151006 | CEFBS_None, // VFNMADD213BF16Z128m = 11273 |
| 151007 | CEFBS_None, // VFNMADD213BF16Z128mb = 11274 |
| 151008 | CEFBS_None, // VFNMADD213BF16Z128mbk = 11275 |
| 151009 | CEFBS_None, // VFNMADD213BF16Z128mbkz = 11276 |
| 151010 | CEFBS_None, // VFNMADD213BF16Z128mk = 11277 |
| 151011 | CEFBS_None, // VFNMADD213BF16Z128mkz = 11278 |
| 151012 | CEFBS_None, // VFNMADD213BF16Z128r = 11279 |
| 151013 | CEFBS_None, // VFNMADD213BF16Z128rk = 11280 |
| 151014 | CEFBS_None, // VFNMADD213BF16Z128rkz = 11281 |
| 151015 | CEFBS_None, // VFNMADD213BF16Z256m = 11282 |
| 151016 | CEFBS_None, // VFNMADD213BF16Z256mb = 11283 |
| 151017 | CEFBS_None, // VFNMADD213BF16Z256mbk = 11284 |
| 151018 | CEFBS_None, // VFNMADD213BF16Z256mbkz = 11285 |
| 151019 | CEFBS_None, // VFNMADD213BF16Z256mk = 11286 |
| 151020 | CEFBS_None, // VFNMADD213BF16Z256mkz = 11287 |
| 151021 | CEFBS_None, // VFNMADD213BF16Z256r = 11288 |
| 151022 | CEFBS_None, // VFNMADD213BF16Z256rk = 11289 |
| 151023 | CEFBS_None, // VFNMADD213BF16Z256rkz = 11290 |
| 151024 | CEFBS_None, // VFNMADD213BF16Zm = 11291 |
| 151025 | CEFBS_None, // VFNMADD213BF16Zmb = 11292 |
| 151026 | CEFBS_None, // VFNMADD213BF16Zmbk = 11293 |
| 151027 | CEFBS_None, // VFNMADD213BF16Zmbkz = 11294 |
| 151028 | CEFBS_None, // VFNMADD213BF16Zmk = 11295 |
| 151029 | CEFBS_None, // VFNMADD213BF16Zmkz = 11296 |
| 151030 | CEFBS_None, // VFNMADD213BF16Zr = 11297 |
| 151031 | CEFBS_None, // VFNMADD213BF16Zrk = 11298 |
| 151032 | CEFBS_None, // VFNMADD213BF16Zrkz = 11299 |
| 151033 | CEFBS_None, // VFNMADD213PDYm = 11300 |
| 151034 | CEFBS_None, // VFNMADD213PDYr = 11301 |
| 151035 | CEFBS_None, // VFNMADD213PDZ128m = 11302 |
| 151036 | CEFBS_None, // VFNMADD213PDZ128mb = 11303 |
| 151037 | CEFBS_None, // VFNMADD213PDZ128mbk = 11304 |
| 151038 | CEFBS_None, // VFNMADD213PDZ128mbkz = 11305 |
| 151039 | CEFBS_None, // VFNMADD213PDZ128mk = 11306 |
| 151040 | CEFBS_None, // VFNMADD213PDZ128mkz = 11307 |
| 151041 | CEFBS_None, // VFNMADD213PDZ128r = 11308 |
| 151042 | CEFBS_None, // VFNMADD213PDZ128rk = 11309 |
| 151043 | CEFBS_None, // VFNMADD213PDZ128rkz = 11310 |
| 151044 | CEFBS_None, // VFNMADD213PDZ256m = 11311 |
| 151045 | CEFBS_None, // VFNMADD213PDZ256mb = 11312 |
| 151046 | CEFBS_None, // VFNMADD213PDZ256mbk = 11313 |
| 151047 | CEFBS_None, // VFNMADD213PDZ256mbkz = 11314 |
| 151048 | CEFBS_None, // VFNMADD213PDZ256mk = 11315 |
| 151049 | CEFBS_None, // VFNMADD213PDZ256mkz = 11316 |
| 151050 | CEFBS_None, // VFNMADD213PDZ256r = 11317 |
| 151051 | CEFBS_None, // VFNMADD213PDZ256rk = 11318 |
| 151052 | CEFBS_None, // VFNMADD213PDZ256rkz = 11319 |
| 151053 | CEFBS_None, // VFNMADD213PDZm = 11320 |
| 151054 | CEFBS_None, // VFNMADD213PDZmb = 11321 |
| 151055 | CEFBS_None, // VFNMADD213PDZmbk = 11322 |
| 151056 | CEFBS_None, // VFNMADD213PDZmbkz = 11323 |
| 151057 | CEFBS_None, // VFNMADD213PDZmk = 11324 |
| 151058 | CEFBS_None, // VFNMADD213PDZmkz = 11325 |
| 151059 | CEFBS_None, // VFNMADD213PDZr = 11326 |
| 151060 | CEFBS_None, // VFNMADD213PDZrb = 11327 |
| 151061 | CEFBS_None, // VFNMADD213PDZrbk = 11328 |
| 151062 | CEFBS_None, // VFNMADD213PDZrbkz = 11329 |
| 151063 | CEFBS_None, // VFNMADD213PDZrk = 11330 |
| 151064 | CEFBS_None, // VFNMADD213PDZrkz = 11331 |
| 151065 | CEFBS_None, // VFNMADD213PDm = 11332 |
| 151066 | CEFBS_None, // VFNMADD213PDr = 11333 |
| 151067 | CEFBS_None, // VFNMADD213PHZ128m = 11334 |
| 151068 | CEFBS_None, // VFNMADD213PHZ128mb = 11335 |
| 151069 | CEFBS_None, // VFNMADD213PHZ128mbk = 11336 |
| 151070 | CEFBS_None, // VFNMADD213PHZ128mbkz = 11337 |
| 151071 | CEFBS_None, // VFNMADD213PHZ128mk = 11338 |
| 151072 | CEFBS_None, // VFNMADD213PHZ128mkz = 11339 |
| 151073 | CEFBS_None, // VFNMADD213PHZ128r = 11340 |
| 151074 | CEFBS_None, // VFNMADD213PHZ128rk = 11341 |
| 151075 | CEFBS_None, // VFNMADD213PHZ128rkz = 11342 |
| 151076 | CEFBS_None, // VFNMADD213PHZ256m = 11343 |
| 151077 | CEFBS_None, // VFNMADD213PHZ256mb = 11344 |
| 151078 | CEFBS_None, // VFNMADD213PHZ256mbk = 11345 |
| 151079 | CEFBS_None, // VFNMADD213PHZ256mbkz = 11346 |
| 151080 | CEFBS_None, // VFNMADD213PHZ256mk = 11347 |
| 151081 | CEFBS_None, // VFNMADD213PHZ256mkz = 11348 |
| 151082 | CEFBS_None, // VFNMADD213PHZ256r = 11349 |
| 151083 | CEFBS_None, // VFNMADD213PHZ256rk = 11350 |
| 151084 | CEFBS_None, // VFNMADD213PHZ256rkz = 11351 |
| 151085 | CEFBS_None, // VFNMADD213PHZm = 11352 |
| 151086 | CEFBS_None, // VFNMADD213PHZmb = 11353 |
| 151087 | CEFBS_None, // VFNMADD213PHZmbk = 11354 |
| 151088 | CEFBS_None, // VFNMADD213PHZmbkz = 11355 |
| 151089 | CEFBS_None, // VFNMADD213PHZmk = 11356 |
| 151090 | CEFBS_None, // VFNMADD213PHZmkz = 11357 |
| 151091 | CEFBS_None, // VFNMADD213PHZr = 11358 |
| 151092 | CEFBS_None, // VFNMADD213PHZrb = 11359 |
| 151093 | CEFBS_None, // VFNMADD213PHZrbk = 11360 |
| 151094 | CEFBS_None, // VFNMADD213PHZrbkz = 11361 |
| 151095 | CEFBS_None, // VFNMADD213PHZrk = 11362 |
| 151096 | CEFBS_None, // VFNMADD213PHZrkz = 11363 |
| 151097 | CEFBS_None, // VFNMADD213PSYm = 11364 |
| 151098 | CEFBS_None, // VFNMADD213PSYr = 11365 |
| 151099 | CEFBS_None, // VFNMADD213PSZ128m = 11366 |
| 151100 | CEFBS_None, // VFNMADD213PSZ128mb = 11367 |
| 151101 | CEFBS_None, // VFNMADD213PSZ128mbk = 11368 |
| 151102 | CEFBS_None, // VFNMADD213PSZ128mbkz = 11369 |
| 151103 | CEFBS_None, // VFNMADD213PSZ128mk = 11370 |
| 151104 | CEFBS_None, // VFNMADD213PSZ128mkz = 11371 |
| 151105 | CEFBS_None, // VFNMADD213PSZ128r = 11372 |
| 151106 | CEFBS_None, // VFNMADD213PSZ128rk = 11373 |
| 151107 | CEFBS_None, // VFNMADD213PSZ128rkz = 11374 |
| 151108 | CEFBS_None, // VFNMADD213PSZ256m = 11375 |
| 151109 | CEFBS_None, // VFNMADD213PSZ256mb = 11376 |
| 151110 | CEFBS_None, // VFNMADD213PSZ256mbk = 11377 |
| 151111 | CEFBS_None, // VFNMADD213PSZ256mbkz = 11378 |
| 151112 | CEFBS_None, // VFNMADD213PSZ256mk = 11379 |
| 151113 | CEFBS_None, // VFNMADD213PSZ256mkz = 11380 |
| 151114 | CEFBS_None, // VFNMADD213PSZ256r = 11381 |
| 151115 | CEFBS_None, // VFNMADD213PSZ256rk = 11382 |
| 151116 | CEFBS_None, // VFNMADD213PSZ256rkz = 11383 |
| 151117 | CEFBS_None, // VFNMADD213PSZm = 11384 |
| 151118 | CEFBS_None, // VFNMADD213PSZmb = 11385 |
| 151119 | CEFBS_None, // VFNMADD213PSZmbk = 11386 |
| 151120 | CEFBS_None, // VFNMADD213PSZmbkz = 11387 |
| 151121 | CEFBS_None, // VFNMADD213PSZmk = 11388 |
| 151122 | CEFBS_None, // VFNMADD213PSZmkz = 11389 |
| 151123 | CEFBS_None, // VFNMADD213PSZr = 11390 |
| 151124 | CEFBS_None, // VFNMADD213PSZrb = 11391 |
| 151125 | CEFBS_None, // VFNMADD213PSZrbk = 11392 |
| 151126 | CEFBS_None, // VFNMADD213PSZrbkz = 11393 |
| 151127 | CEFBS_None, // VFNMADD213PSZrk = 11394 |
| 151128 | CEFBS_None, // VFNMADD213PSZrkz = 11395 |
| 151129 | CEFBS_None, // VFNMADD213PSm = 11396 |
| 151130 | CEFBS_None, // VFNMADD213PSr = 11397 |
| 151131 | CEFBS_None, // VFNMADD213SDZm = 11398 |
| 151132 | CEFBS_None, // VFNMADD213SDZm_Int = 11399 |
| 151133 | CEFBS_None, // VFNMADD213SDZmk_Int = 11400 |
| 151134 | CEFBS_None, // VFNMADD213SDZmkz_Int = 11401 |
| 151135 | CEFBS_None, // VFNMADD213SDZr = 11402 |
| 151136 | CEFBS_None, // VFNMADD213SDZr_Int = 11403 |
| 151137 | CEFBS_None, // VFNMADD213SDZrb = 11404 |
| 151138 | CEFBS_None, // VFNMADD213SDZrb_Int = 11405 |
| 151139 | CEFBS_None, // VFNMADD213SDZrbk_Int = 11406 |
| 151140 | CEFBS_None, // VFNMADD213SDZrbkz_Int = 11407 |
| 151141 | CEFBS_None, // VFNMADD213SDZrk_Int = 11408 |
| 151142 | CEFBS_None, // VFNMADD213SDZrkz_Int = 11409 |
| 151143 | CEFBS_None, // VFNMADD213SDm = 11410 |
| 151144 | CEFBS_None, // VFNMADD213SDm_Int = 11411 |
| 151145 | CEFBS_None, // VFNMADD213SDr = 11412 |
| 151146 | CEFBS_None, // VFNMADD213SDr_Int = 11413 |
| 151147 | CEFBS_None, // VFNMADD213SHZm = 11414 |
| 151148 | CEFBS_None, // VFNMADD213SHZm_Int = 11415 |
| 151149 | CEFBS_None, // VFNMADD213SHZmk_Int = 11416 |
| 151150 | CEFBS_None, // VFNMADD213SHZmkz_Int = 11417 |
| 151151 | CEFBS_None, // VFNMADD213SHZr = 11418 |
| 151152 | CEFBS_None, // VFNMADD213SHZr_Int = 11419 |
| 151153 | CEFBS_None, // VFNMADD213SHZrb = 11420 |
| 151154 | CEFBS_None, // VFNMADD213SHZrb_Int = 11421 |
| 151155 | CEFBS_None, // VFNMADD213SHZrbk_Int = 11422 |
| 151156 | CEFBS_None, // VFNMADD213SHZrbkz_Int = 11423 |
| 151157 | CEFBS_None, // VFNMADD213SHZrk_Int = 11424 |
| 151158 | CEFBS_None, // VFNMADD213SHZrkz_Int = 11425 |
| 151159 | CEFBS_None, // VFNMADD213SSZm = 11426 |
| 151160 | CEFBS_None, // VFNMADD213SSZm_Int = 11427 |
| 151161 | CEFBS_None, // VFNMADD213SSZmk_Int = 11428 |
| 151162 | CEFBS_None, // VFNMADD213SSZmkz_Int = 11429 |
| 151163 | CEFBS_None, // VFNMADD213SSZr = 11430 |
| 151164 | CEFBS_None, // VFNMADD213SSZr_Int = 11431 |
| 151165 | CEFBS_None, // VFNMADD213SSZrb = 11432 |
| 151166 | CEFBS_None, // VFNMADD213SSZrb_Int = 11433 |
| 151167 | CEFBS_None, // VFNMADD213SSZrbk_Int = 11434 |
| 151168 | CEFBS_None, // VFNMADD213SSZrbkz_Int = 11435 |
| 151169 | CEFBS_None, // VFNMADD213SSZrk_Int = 11436 |
| 151170 | CEFBS_None, // VFNMADD213SSZrkz_Int = 11437 |
| 151171 | CEFBS_None, // VFNMADD213SSm = 11438 |
| 151172 | CEFBS_None, // VFNMADD213SSm_Int = 11439 |
| 151173 | CEFBS_None, // VFNMADD213SSr = 11440 |
| 151174 | CEFBS_None, // VFNMADD213SSr_Int = 11441 |
| 151175 | CEFBS_None, // VFNMADD231BF16Z128m = 11442 |
| 151176 | CEFBS_None, // VFNMADD231BF16Z128mb = 11443 |
| 151177 | CEFBS_None, // VFNMADD231BF16Z128mbk = 11444 |
| 151178 | CEFBS_None, // VFNMADD231BF16Z128mbkz = 11445 |
| 151179 | CEFBS_None, // VFNMADD231BF16Z128mk = 11446 |
| 151180 | CEFBS_None, // VFNMADD231BF16Z128mkz = 11447 |
| 151181 | CEFBS_None, // VFNMADD231BF16Z128r = 11448 |
| 151182 | CEFBS_None, // VFNMADD231BF16Z128rk = 11449 |
| 151183 | CEFBS_None, // VFNMADD231BF16Z128rkz = 11450 |
| 151184 | CEFBS_None, // VFNMADD231BF16Z256m = 11451 |
| 151185 | CEFBS_None, // VFNMADD231BF16Z256mb = 11452 |
| 151186 | CEFBS_None, // VFNMADD231BF16Z256mbk = 11453 |
| 151187 | CEFBS_None, // VFNMADD231BF16Z256mbkz = 11454 |
| 151188 | CEFBS_None, // VFNMADD231BF16Z256mk = 11455 |
| 151189 | CEFBS_None, // VFNMADD231BF16Z256mkz = 11456 |
| 151190 | CEFBS_None, // VFNMADD231BF16Z256r = 11457 |
| 151191 | CEFBS_None, // VFNMADD231BF16Z256rk = 11458 |
| 151192 | CEFBS_None, // VFNMADD231BF16Z256rkz = 11459 |
| 151193 | CEFBS_None, // VFNMADD231BF16Zm = 11460 |
| 151194 | CEFBS_None, // VFNMADD231BF16Zmb = 11461 |
| 151195 | CEFBS_None, // VFNMADD231BF16Zmbk = 11462 |
| 151196 | CEFBS_None, // VFNMADD231BF16Zmbkz = 11463 |
| 151197 | CEFBS_None, // VFNMADD231BF16Zmk = 11464 |
| 151198 | CEFBS_None, // VFNMADD231BF16Zmkz = 11465 |
| 151199 | CEFBS_None, // VFNMADD231BF16Zr = 11466 |
| 151200 | CEFBS_None, // VFNMADD231BF16Zrk = 11467 |
| 151201 | CEFBS_None, // VFNMADD231BF16Zrkz = 11468 |
| 151202 | CEFBS_None, // VFNMADD231PDYm = 11469 |
| 151203 | CEFBS_None, // VFNMADD231PDYr = 11470 |
| 151204 | CEFBS_None, // VFNMADD231PDZ128m = 11471 |
| 151205 | CEFBS_None, // VFNMADD231PDZ128mb = 11472 |
| 151206 | CEFBS_None, // VFNMADD231PDZ128mbk = 11473 |
| 151207 | CEFBS_None, // VFNMADD231PDZ128mbkz = 11474 |
| 151208 | CEFBS_None, // VFNMADD231PDZ128mk = 11475 |
| 151209 | CEFBS_None, // VFNMADD231PDZ128mkz = 11476 |
| 151210 | CEFBS_None, // VFNMADD231PDZ128r = 11477 |
| 151211 | CEFBS_None, // VFNMADD231PDZ128rk = 11478 |
| 151212 | CEFBS_None, // VFNMADD231PDZ128rkz = 11479 |
| 151213 | CEFBS_None, // VFNMADD231PDZ256m = 11480 |
| 151214 | CEFBS_None, // VFNMADD231PDZ256mb = 11481 |
| 151215 | CEFBS_None, // VFNMADD231PDZ256mbk = 11482 |
| 151216 | CEFBS_None, // VFNMADD231PDZ256mbkz = 11483 |
| 151217 | CEFBS_None, // VFNMADD231PDZ256mk = 11484 |
| 151218 | CEFBS_None, // VFNMADD231PDZ256mkz = 11485 |
| 151219 | CEFBS_None, // VFNMADD231PDZ256r = 11486 |
| 151220 | CEFBS_None, // VFNMADD231PDZ256rk = 11487 |
| 151221 | CEFBS_None, // VFNMADD231PDZ256rkz = 11488 |
| 151222 | CEFBS_None, // VFNMADD231PDZm = 11489 |
| 151223 | CEFBS_None, // VFNMADD231PDZmb = 11490 |
| 151224 | CEFBS_None, // VFNMADD231PDZmbk = 11491 |
| 151225 | CEFBS_None, // VFNMADD231PDZmbkz = 11492 |
| 151226 | CEFBS_None, // VFNMADD231PDZmk = 11493 |
| 151227 | CEFBS_None, // VFNMADD231PDZmkz = 11494 |
| 151228 | CEFBS_None, // VFNMADD231PDZr = 11495 |
| 151229 | CEFBS_None, // VFNMADD231PDZrb = 11496 |
| 151230 | CEFBS_None, // VFNMADD231PDZrbk = 11497 |
| 151231 | CEFBS_None, // VFNMADD231PDZrbkz = 11498 |
| 151232 | CEFBS_None, // VFNMADD231PDZrk = 11499 |
| 151233 | CEFBS_None, // VFNMADD231PDZrkz = 11500 |
| 151234 | CEFBS_None, // VFNMADD231PDm = 11501 |
| 151235 | CEFBS_None, // VFNMADD231PDr = 11502 |
| 151236 | CEFBS_None, // VFNMADD231PHZ128m = 11503 |
| 151237 | CEFBS_None, // VFNMADD231PHZ128mb = 11504 |
| 151238 | CEFBS_None, // VFNMADD231PHZ128mbk = 11505 |
| 151239 | CEFBS_None, // VFNMADD231PHZ128mbkz = 11506 |
| 151240 | CEFBS_None, // VFNMADD231PHZ128mk = 11507 |
| 151241 | CEFBS_None, // VFNMADD231PHZ128mkz = 11508 |
| 151242 | CEFBS_None, // VFNMADD231PHZ128r = 11509 |
| 151243 | CEFBS_None, // VFNMADD231PHZ128rk = 11510 |
| 151244 | CEFBS_None, // VFNMADD231PHZ128rkz = 11511 |
| 151245 | CEFBS_None, // VFNMADD231PHZ256m = 11512 |
| 151246 | CEFBS_None, // VFNMADD231PHZ256mb = 11513 |
| 151247 | CEFBS_None, // VFNMADD231PHZ256mbk = 11514 |
| 151248 | CEFBS_None, // VFNMADD231PHZ256mbkz = 11515 |
| 151249 | CEFBS_None, // VFNMADD231PHZ256mk = 11516 |
| 151250 | CEFBS_None, // VFNMADD231PHZ256mkz = 11517 |
| 151251 | CEFBS_None, // VFNMADD231PHZ256r = 11518 |
| 151252 | CEFBS_None, // VFNMADD231PHZ256rk = 11519 |
| 151253 | CEFBS_None, // VFNMADD231PHZ256rkz = 11520 |
| 151254 | CEFBS_None, // VFNMADD231PHZm = 11521 |
| 151255 | CEFBS_None, // VFNMADD231PHZmb = 11522 |
| 151256 | CEFBS_None, // VFNMADD231PHZmbk = 11523 |
| 151257 | CEFBS_None, // VFNMADD231PHZmbkz = 11524 |
| 151258 | CEFBS_None, // VFNMADD231PHZmk = 11525 |
| 151259 | CEFBS_None, // VFNMADD231PHZmkz = 11526 |
| 151260 | CEFBS_None, // VFNMADD231PHZr = 11527 |
| 151261 | CEFBS_None, // VFNMADD231PHZrb = 11528 |
| 151262 | CEFBS_None, // VFNMADD231PHZrbk = 11529 |
| 151263 | CEFBS_None, // VFNMADD231PHZrbkz = 11530 |
| 151264 | CEFBS_None, // VFNMADD231PHZrk = 11531 |
| 151265 | CEFBS_None, // VFNMADD231PHZrkz = 11532 |
| 151266 | CEFBS_None, // VFNMADD231PSYm = 11533 |
| 151267 | CEFBS_None, // VFNMADD231PSYr = 11534 |
| 151268 | CEFBS_None, // VFNMADD231PSZ128m = 11535 |
| 151269 | CEFBS_None, // VFNMADD231PSZ128mb = 11536 |
| 151270 | CEFBS_None, // VFNMADD231PSZ128mbk = 11537 |
| 151271 | CEFBS_None, // VFNMADD231PSZ128mbkz = 11538 |
| 151272 | CEFBS_None, // VFNMADD231PSZ128mk = 11539 |
| 151273 | CEFBS_None, // VFNMADD231PSZ128mkz = 11540 |
| 151274 | CEFBS_None, // VFNMADD231PSZ128r = 11541 |
| 151275 | CEFBS_None, // VFNMADD231PSZ128rk = 11542 |
| 151276 | CEFBS_None, // VFNMADD231PSZ128rkz = 11543 |
| 151277 | CEFBS_None, // VFNMADD231PSZ256m = 11544 |
| 151278 | CEFBS_None, // VFNMADD231PSZ256mb = 11545 |
| 151279 | CEFBS_None, // VFNMADD231PSZ256mbk = 11546 |
| 151280 | CEFBS_None, // VFNMADD231PSZ256mbkz = 11547 |
| 151281 | CEFBS_None, // VFNMADD231PSZ256mk = 11548 |
| 151282 | CEFBS_None, // VFNMADD231PSZ256mkz = 11549 |
| 151283 | CEFBS_None, // VFNMADD231PSZ256r = 11550 |
| 151284 | CEFBS_None, // VFNMADD231PSZ256rk = 11551 |
| 151285 | CEFBS_None, // VFNMADD231PSZ256rkz = 11552 |
| 151286 | CEFBS_None, // VFNMADD231PSZm = 11553 |
| 151287 | CEFBS_None, // VFNMADD231PSZmb = 11554 |
| 151288 | CEFBS_None, // VFNMADD231PSZmbk = 11555 |
| 151289 | CEFBS_None, // VFNMADD231PSZmbkz = 11556 |
| 151290 | CEFBS_None, // VFNMADD231PSZmk = 11557 |
| 151291 | CEFBS_None, // VFNMADD231PSZmkz = 11558 |
| 151292 | CEFBS_None, // VFNMADD231PSZr = 11559 |
| 151293 | CEFBS_None, // VFNMADD231PSZrb = 11560 |
| 151294 | CEFBS_None, // VFNMADD231PSZrbk = 11561 |
| 151295 | CEFBS_None, // VFNMADD231PSZrbkz = 11562 |
| 151296 | CEFBS_None, // VFNMADD231PSZrk = 11563 |
| 151297 | CEFBS_None, // VFNMADD231PSZrkz = 11564 |
| 151298 | CEFBS_None, // VFNMADD231PSm = 11565 |
| 151299 | CEFBS_None, // VFNMADD231PSr = 11566 |
| 151300 | CEFBS_None, // VFNMADD231SDZm = 11567 |
| 151301 | CEFBS_None, // VFNMADD231SDZm_Int = 11568 |
| 151302 | CEFBS_None, // VFNMADD231SDZmk_Int = 11569 |
| 151303 | CEFBS_None, // VFNMADD231SDZmkz_Int = 11570 |
| 151304 | CEFBS_None, // VFNMADD231SDZr = 11571 |
| 151305 | CEFBS_None, // VFNMADD231SDZr_Int = 11572 |
| 151306 | CEFBS_None, // VFNMADD231SDZrb = 11573 |
| 151307 | CEFBS_None, // VFNMADD231SDZrb_Int = 11574 |
| 151308 | CEFBS_None, // VFNMADD231SDZrbk_Int = 11575 |
| 151309 | CEFBS_None, // VFNMADD231SDZrbkz_Int = 11576 |
| 151310 | CEFBS_None, // VFNMADD231SDZrk_Int = 11577 |
| 151311 | CEFBS_None, // VFNMADD231SDZrkz_Int = 11578 |
| 151312 | CEFBS_None, // VFNMADD231SDm = 11579 |
| 151313 | CEFBS_None, // VFNMADD231SDm_Int = 11580 |
| 151314 | CEFBS_None, // VFNMADD231SDr = 11581 |
| 151315 | CEFBS_None, // VFNMADD231SDr_Int = 11582 |
| 151316 | CEFBS_None, // VFNMADD231SHZm = 11583 |
| 151317 | CEFBS_None, // VFNMADD231SHZm_Int = 11584 |
| 151318 | CEFBS_None, // VFNMADD231SHZmk_Int = 11585 |
| 151319 | CEFBS_None, // VFNMADD231SHZmkz_Int = 11586 |
| 151320 | CEFBS_None, // VFNMADD231SHZr = 11587 |
| 151321 | CEFBS_None, // VFNMADD231SHZr_Int = 11588 |
| 151322 | CEFBS_None, // VFNMADD231SHZrb = 11589 |
| 151323 | CEFBS_None, // VFNMADD231SHZrb_Int = 11590 |
| 151324 | CEFBS_None, // VFNMADD231SHZrbk_Int = 11591 |
| 151325 | CEFBS_None, // VFNMADD231SHZrbkz_Int = 11592 |
| 151326 | CEFBS_None, // VFNMADD231SHZrk_Int = 11593 |
| 151327 | CEFBS_None, // VFNMADD231SHZrkz_Int = 11594 |
| 151328 | CEFBS_None, // VFNMADD231SSZm = 11595 |
| 151329 | CEFBS_None, // VFNMADD231SSZm_Int = 11596 |
| 151330 | CEFBS_None, // VFNMADD231SSZmk_Int = 11597 |
| 151331 | CEFBS_None, // VFNMADD231SSZmkz_Int = 11598 |
| 151332 | CEFBS_None, // VFNMADD231SSZr = 11599 |
| 151333 | CEFBS_None, // VFNMADD231SSZr_Int = 11600 |
| 151334 | CEFBS_None, // VFNMADD231SSZrb = 11601 |
| 151335 | CEFBS_None, // VFNMADD231SSZrb_Int = 11602 |
| 151336 | CEFBS_None, // VFNMADD231SSZrbk_Int = 11603 |
| 151337 | CEFBS_None, // VFNMADD231SSZrbkz_Int = 11604 |
| 151338 | CEFBS_None, // VFNMADD231SSZrk_Int = 11605 |
| 151339 | CEFBS_None, // VFNMADD231SSZrkz_Int = 11606 |
| 151340 | CEFBS_None, // VFNMADD231SSm = 11607 |
| 151341 | CEFBS_None, // VFNMADD231SSm_Int = 11608 |
| 151342 | CEFBS_None, // VFNMADD231SSr = 11609 |
| 151343 | CEFBS_None, // VFNMADD231SSr_Int = 11610 |
| 151344 | CEFBS_None, // VFNMADDPD4Ymr = 11611 |
| 151345 | CEFBS_None, // VFNMADDPD4Yrm = 11612 |
| 151346 | CEFBS_None, // VFNMADDPD4Yrr = 11613 |
| 151347 | CEFBS_None, // VFNMADDPD4Yrr_REV = 11614 |
| 151348 | CEFBS_None, // VFNMADDPD4mr = 11615 |
| 151349 | CEFBS_None, // VFNMADDPD4rm = 11616 |
| 151350 | CEFBS_None, // VFNMADDPD4rr = 11617 |
| 151351 | CEFBS_None, // VFNMADDPD4rr_REV = 11618 |
| 151352 | CEFBS_None, // VFNMADDPS4Ymr = 11619 |
| 151353 | CEFBS_None, // VFNMADDPS4Yrm = 11620 |
| 151354 | CEFBS_None, // VFNMADDPS4Yrr = 11621 |
| 151355 | CEFBS_None, // VFNMADDPS4Yrr_REV = 11622 |
| 151356 | CEFBS_None, // VFNMADDPS4mr = 11623 |
| 151357 | CEFBS_None, // VFNMADDPS4rm = 11624 |
| 151358 | CEFBS_None, // VFNMADDPS4rr = 11625 |
| 151359 | CEFBS_None, // VFNMADDPS4rr_REV = 11626 |
| 151360 | CEFBS_None, // VFNMADDSD4mr = 11627 |
| 151361 | CEFBS_None, // VFNMADDSD4mr_Int = 11628 |
| 151362 | CEFBS_None, // VFNMADDSD4rm = 11629 |
| 151363 | CEFBS_None, // VFNMADDSD4rm_Int = 11630 |
| 151364 | CEFBS_None, // VFNMADDSD4rr = 11631 |
| 151365 | CEFBS_None, // VFNMADDSD4rr_Int = 11632 |
| 151366 | CEFBS_None, // VFNMADDSD4rr_Int_REV = 11633 |
| 151367 | CEFBS_None, // VFNMADDSD4rr_REV = 11634 |
| 151368 | CEFBS_None, // VFNMADDSS4mr = 11635 |
| 151369 | CEFBS_None, // VFNMADDSS4mr_Int = 11636 |
| 151370 | CEFBS_None, // VFNMADDSS4rm = 11637 |
| 151371 | CEFBS_None, // VFNMADDSS4rm_Int = 11638 |
| 151372 | CEFBS_None, // VFNMADDSS4rr = 11639 |
| 151373 | CEFBS_None, // VFNMADDSS4rr_Int = 11640 |
| 151374 | CEFBS_None, // VFNMADDSS4rr_Int_REV = 11641 |
| 151375 | CEFBS_None, // VFNMADDSS4rr_REV = 11642 |
| 151376 | CEFBS_None, // VFNMSUB132BF16Z128m = 11643 |
| 151377 | CEFBS_None, // VFNMSUB132BF16Z128mb = 11644 |
| 151378 | CEFBS_None, // VFNMSUB132BF16Z128mbk = 11645 |
| 151379 | CEFBS_None, // VFNMSUB132BF16Z128mbkz = 11646 |
| 151380 | CEFBS_None, // VFNMSUB132BF16Z128mk = 11647 |
| 151381 | CEFBS_None, // VFNMSUB132BF16Z128mkz = 11648 |
| 151382 | CEFBS_None, // VFNMSUB132BF16Z128r = 11649 |
| 151383 | CEFBS_None, // VFNMSUB132BF16Z128rk = 11650 |
| 151384 | CEFBS_None, // VFNMSUB132BF16Z128rkz = 11651 |
| 151385 | CEFBS_None, // VFNMSUB132BF16Z256m = 11652 |
| 151386 | CEFBS_None, // VFNMSUB132BF16Z256mb = 11653 |
| 151387 | CEFBS_None, // VFNMSUB132BF16Z256mbk = 11654 |
| 151388 | CEFBS_None, // VFNMSUB132BF16Z256mbkz = 11655 |
| 151389 | CEFBS_None, // VFNMSUB132BF16Z256mk = 11656 |
| 151390 | CEFBS_None, // VFNMSUB132BF16Z256mkz = 11657 |
| 151391 | CEFBS_None, // VFNMSUB132BF16Z256r = 11658 |
| 151392 | CEFBS_None, // VFNMSUB132BF16Z256rk = 11659 |
| 151393 | CEFBS_None, // VFNMSUB132BF16Z256rkz = 11660 |
| 151394 | CEFBS_None, // VFNMSUB132BF16Zm = 11661 |
| 151395 | CEFBS_None, // VFNMSUB132BF16Zmb = 11662 |
| 151396 | CEFBS_None, // VFNMSUB132BF16Zmbk = 11663 |
| 151397 | CEFBS_None, // VFNMSUB132BF16Zmbkz = 11664 |
| 151398 | CEFBS_None, // VFNMSUB132BF16Zmk = 11665 |
| 151399 | CEFBS_None, // VFNMSUB132BF16Zmkz = 11666 |
| 151400 | CEFBS_None, // VFNMSUB132BF16Zr = 11667 |
| 151401 | CEFBS_None, // VFNMSUB132BF16Zrk = 11668 |
| 151402 | CEFBS_None, // VFNMSUB132BF16Zrkz = 11669 |
| 151403 | CEFBS_None, // VFNMSUB132PDYm = 11670 |
| 151404 | CEFBS_None, // VFNMSUB132PDYr = 11671 |
| 151405 | CEFBS_None, // VFNMSUB132PDZ128m = 11672 |
| 151406 | CEFBS_None, // VFNMSUB132PDZ128mb = 11673 |
| 151407 | CEFBS_None, // VFNMSUB132PDZ128mbk = 11674 |
| 151408 | CEFBS_None, // VFNMSUB132PDZ128mbkz = 11675 |
| 151409 | CEFBS_None, // VFNMSUB132PDZ128mk = 11676 |
| 151410 | CEFBS_None, // VFNMSUB132PDZ128mkz = 11677 |
| 151411 | CEFBS_None, // VFNMSUB132PDZ128r = 11678 |
| 151412 | CEFBS_None, // VFNMSUB132PDZ128rk = 11679 |
| 151413 | CEFBS_None, // VFNMSUB132PDZ128rkz = 11680 |
| 151414 | CEFBS_None, // VFNMSUB132PDZ256m = 11681 |
| 151415 | CEFBS_None, // VFNMSUB132PDZ256mb = 11682 |
| 151416 | CEFBS_None, // VFNMSUB132PDZ256mbk = 11683 |
| 151417 | CEFBS_None, // VFNMSUB132PDZ256mbkz = 11684 |
| 151418 | CEFBS_None, // VFNMSUB132PDZ256mk = 11685 |
| 151419 | CEFBS_None, // VFNMSUB132PDZ256mkz = 11686 |
| 151420 | CEFBS_None, // VFNMSUB132PDZ256r = 11687 |
| 151421 | CEFBS_None, // VFNMSUB132PDZ256rk = 11688 |
| 151422 | CEFBS_None, // VFNMSUB132PDZ256rkz = 11689 |
| 151423 | CEFBS_None, // VFNMSUB132PDZm = 11690 |
| 151424 | CEFBS_None, // VFNMSUB132PDZmb = 11691 |
| 151425 | CEFBS_None, // VFNMSUB132PDZmbk = 11692 |
| 151426 | CEFBS_None, // VFNMSUB132PDZmbkz = 11693 |
| 151427 | CEFBS_None, // VFNMSUB132PDZmk = 11694 |
| 151428 | CEFBS_None, // VFNMSUB132PDZmkz = 11695 |
| 151429 | CEFBS_None, // VFNMSUB132PDZr = 11696 |
| 151430 | CEFBS_None, // VFNMSUB132PDZrb = 11697 |
| 151431 | CEFBS_None, // VFNMSUB132PDZrbk = 11698 |
| 151432 | CEFBS_None, // VFNMSUB132PDZrbkz = 11699 |
| 151433 | CEFBS_None, // VFNMSUB132PDZrk = 11700 |
| 151434 | CEFBS_None, // VFNMSUB132PDZrkz = 11701 |
| 151435 | CEFBS_None, // VFNMSUB132PDm = 11702 |
| 151436 | CEFBS_None, // VFNMSUB132PDr = 11703 |
| 151437 | CEFBS_None, // VFNMSUB132PHZ128m = 11704 |
| 151438 | CEFBS_None, // VFNMSUB132PHZ128mb = 11705 |
| 151439 | CEFBS_None, // VFNMSUB132PHZ128mbk = 11706 |
| 151440 | CEFBS_None, // VFNMSUB132PHZ128mbkz = 11707 |
| 151441 | CEFBS_None, // VFNMSUB132PHZ128mk = 11708 |
| 151442 | CEFBS_None, // VFNMSUB132PHZ128mkz = 11709 |
| 151443 | CEFBS_None, // VFNMSUB132PHZ128r = 11710 |
| 151444 | CEFBS_None, // VFNMSUB132PHZ128rk = 11711 |
| 151445 | CEFBS_None, // VFNMSUB132PHZ128rkz = 11712 |
| 151446 | CEFBS_None, // VFNMSUB132PHZ256m = 11713 |
| 151447 | CEFBS_None, // VFNMSUB132PHZ256mb = 11714 |
| 151448 | CEFBS_None, // VFNMSUB132PHZ256mbk = 11715 |
| 151449 | CEFBS_None, // VFNMSUB132PHZ256mbkz = 11716 |
| 151450 | CEFBS_None, // VFNMSUB132PHZ256mk = 11717 |
| 151451 | CEFBS_None, // VFNMSUB132PHZ256mkz = 11718 |
| 151452 | CEFBS_None, // VFNMSUB132PHZ256r = 11719 |
| 151453 | CEFBS_None, // VFNMSUB132PHZ256rk = 11720 |
| 151454 | CEFBS_None, // VFNMSUB132PHZ256rkz = 11721 |
| 151455 | CEFBS_None, // VFNMSUB132PHZm = 11722 |
| 151456 | CEFBS_None, // VFNMSUB132PHZmb = 11723 |
| 151457 | CEFBS_None, // VFNMSUB132PHZmbk = 11724 |
| 151458 | CEFBS_None, // VFNMSUB132PHZmbkz = 11725 |
| 151459 | CEFBS_None, // VFNMSUB132PHZmk = 11726 |
| 151460 | CEFBS_None, // VFNMSUB132PHZmkz = 11727 |
| 151461 | CEFBS_None, // VFNMSUB132PHZr = 11728 |
| 151462 | CEFBS_None, // VFNMSUB132PHZrb = 11729 |
| 151463 | CEFBS_None, // VFNMSUB132PHZrbk = 11730 |
| 151464 | CEFBS_None, // VFNMSUB132PHZrbkz = 11731 |
| 151465 | CEFBS_None, // VFNMSUB132PHZrk = 11732 |
| 151466 | CEFBS_None, // VFNMSUB132PHZrkz = 11733 |
| 151467 | CEFBS_None, // VFNMSUB132PSYm = 11734 |
| 151468 | CEFBS_None, // VFNMSUB132PSYr = 11735 |
| 151469 | CEFBS_None, // VFNMSUB132PSZ128m = 11736 |
| 151470 | CEFBS_None, // VFNMSUB132PSZ128mb = 11737 |
| 151471 | CEFBS_None, // VFNMSUB132PSZ128mbk = 11738 |
| 151472 | CEFBS_None, // VFNMSUB132PSZ128mbkz = 11739 |
| 151473 | CEFBS_None, // VFNMSUB132PSZ128mk = 11740 |
| 151474 | CEFBS_None, // VFNMSUB132PSZ128mkz = 11741 |
| 151475 | CEFBS_None, // VFNMSUB132PSZ128r = 11742 |
| 151476 | CEFBS_None, // VFNMSUB132PSZ128rk = 11743 |
| 151477 | CEFBS_None, // VFNMSUB132PSZ128rkz = 11744 |
| 151478 | CEFBS_None, // VFNMSUB132PSZ256m = 11745 |
| 151479 | CEFBS_None, // VFNMSUB132PSZ256mb = 11746 |
| 151480 | CEFBS_None, // VFNMSUB132PSZ256mbk = 11747 |
| 151481 | CEFBS_None, // VFNMSUB132PSZ256mbkz = 11748 |
| 151482 | CEFBS_None, // VFNMSUB132PSZ256mk = 11749 |
| 151483 | CEFBS_None, // VFNMSUB132PSZ256mkz = 11750 |
| 151484 | CEFBS_None, // VFNMSUB132PSZ256r = 11751 |
| 151485 | CEFBS_None, // VFNMSUB132PSZ256rk = 11752 |
| 151486 | CEFBS_None, // VFNMSUB132PSZ256rkz = 11753 |
| 151487 | CEFBS_None, // VFNMSUB132PSZm = 11754 |
| 151488 | CEFBS_None, // VFNMSUB132PSZmb = 11755 |
| 151489 | CEFBS_None, // VFNMSUB132PSZmbk = 11756 |
| 151490 | CEFBS_None, // VFNMSUB132PSZmbkz = 11757 |
| 151491 | CEFBS_None, // VFNMSUB132PSZmk = 11758 |
| 151492 | CEFBS_None, // VFNMSUB132PSZmkz = 11759 |
| 151493 | CEFBS_None, // VFNMSUB132PSZr = 11760 |
| 151494 | CEFBS_None, // VFNMSUB132PSZrb = 11761 |
| 151495 | CEFBS_None, // VFNMSUB132PSZrbk = 11762 |
| 151496 | CEFBS_None, // VFNMSUB132PSZrbkz = 11763 |
| 151497 | CEFBS_None, // VFNMSUB132PSZrk = 11764 |
| 151498 | CEFBS_None, // VFNMSUB132PSZrkz = 11765 |
| 151499 | CEFBS_None, // VFNMSUB132PSm = 11766 |
| 151500 | CEFBS_None, // VFNMSUB132PSr = 11767 |
| 151501 | CEFBS_None, // VFNMSUB132SDZm = 11768 |
| 151502 | CEFBS_None, // VFNMSUB132SDZm_Int = 11769 |
| 151503 | CEFBS_None, // VFNMSUB132SDZmk_Int = 11770 |
| 151504 | CEFBS_None, // VFNMSUB132SDZmkz_Int = 11771 |
| 151505 | CEFBS_None, // VFNMSUB132SDZr = 11772 |
| 151506 | CEFBS_None, // VFNMSUB132SDZr_Int = 11773 |
| 151507 | CEFBS_None, // VFNMSUB132SDZrb = 11774 |
| 151508 | CEFBS_None, // VFNMSUB132SDZrb_Int = 11775 |
| 151509 | CEFBS_None, // VFNMSUB132SDZrbk_Int = 11776 |
| 151510 | CEFBS_None, // VFNMSUB132SDZrbkz_Int = 11777 |
| 151511 | CEFBS_None, // VFNMSUB132SDZrk_Int = 11778 |
| 151512 | CEFBS_None, // VFNMSUB132SDZrkz_Int = 11779 |
| 151513 | CEFBS_None, // VFNMSUB132SDm = 11780 |
| 151514 | CEFBS_None, // VFNMSUB132SDm_Int = 11781 |
| 151515 | CEFBS_None, // VFNMSUB132SDr = 11782 |
| 151516 | CEFBS_None, // VFNMSUB132SDr_Int = 11783 |
| 151517 | CEFBS_None, // VFNMSUB132SHZm = 11784 |
| 151518 | CEFBS_None, // VFNMSUB132SHZm_Int = 11785 |
| 151519 | CEFBS_None, // VFNMSUB132SHZmk_Int = 11786 |
| 151520 | CEFBS_None, // VFNMSUB132SHZmkz_Int = 11787 |
| 151521 | CEFBS_None, // VFNMSUB132SHZr = 11788 |
| 151522 | CEFBS_None, // VFNMSUB132SHZr_Int = 11789 |
| 151523 | CEFBS_None, // VFNMSUB132SHZrb = 11790 |
| 151524 | CEFBS_None, // VFNMSUB132SHZrb_Int = 11791 |
| 151525 | CEFBS_None, // VFNMSUB132SHZrbk_Int = 11792 |
| 151526 | CEFBS_None, // VFNMSUB132SHZrbkz_Int = 11793 |
| 151527 | CEFBS_None, // VFNMSUB132SHZrk_Int = 11794 |
| 151528 | CEFBS_None, // VFNMSUB132SHZrkz_Int = 11795 |
| 151529 | CEFBS_None, // VFNMSUB132SSZm = 11796 |
| 151530 | CEFBS_None, // VFNMSUB132SSZm_Int = 11797 |
| 151531 | CEFBS_None, // VFNMSUB132SSZmk_Int = 11798 |
| 151532 | CEFBS_None, // VFNMSUB132SSZmkz_Int = 11799 |
| 151533 | CEFBS_None, // VFNMSUB132SSZr = 11800 |
| 151534 | CEFBS_None, // VFNMSUB132SSZr_Int = 11801 |
| 151535 | CEFBS_None, // VFNMSUB132SSZrb = 11802 |
| 151536 | CEFBS_None, // VFNMSUB132SSZrb_Int = 11803 |
| 151537 | CEFBS_None, // VFNMSUB132SSZrbk_Int = 11804 |
| 151538 | CEFBS_None, // VFNMSUB132SSZrbkz_Int = 11805 |
| 151539 | CEFBS_None, // VFNMSUB132SSZrk_Int = 11806 |
| 151540 | CEFBS_None, // VFNMSUB132SSZrkz_Int = 11807 |
| 151541 | CEFBS_None, // VFNMSUB132SSm = 11808 |
| 151542 | CEFBS_None, // VFNMSUB132SSm_Int = 11809 |
| 151543 | CEFBS_None, // VFNMSUB132SSr = 11810 |
| 151544 | CEFBS_None, // VFNMSUB132SSr_Int = 11811 |
| 151545 | CEFBS_None, // VFNMSUB213BF16Z128m = 11812 |
| 151546 | CEFBS_None, // VFNMSUB213BF16Z128mb = 11813 |
| 151547 | CEFBS_None, // VFNMSUB213BF16Z128mbk = 11814 |
| 151548 | CEFBS_None, // VFNMSUB213BF16Z128mbkz = 11815 |
| 151549 | CEFBS_None, // VFNMSUB213BF16Z128mk = 11816 |
| 151550 | CEFBS_None, // VFNMSUB213BF16Z128mkz = 11817 |
| 151551 | CEFBS_None, // VFNMSUB213BF16Z128r = 11818 |
| 151552 | CEFBS_None, // VFNMSUB213BF16Z128rk = 11819 |
| 151553 | CEFBS_None, // VFNMSUB213BF16Z128rkz = 11820 |
| 151554 | CEFBS_None, // VFNMSUB213BF16Z256m = 11821 |
| 151555 | CEFBS_None, // VFNMSUB213BF16Z256mb = 11822 |
| 151556 | CEFBS_None, // VFNMSUB213BF16Z256mbk = 11823 |
| 151557 | CEFBS_None, // VFNMSUB213BF16Z256mbkz = 11824 |
| 151558 | CEFBS_None, // VFNMSUB213BF16Z256mk = 11825 |
| 151559 | CEFBS_None, // VFNMSUB213BF16Z256mkz = 11826 |
| 151560 | CEFBS_None, // VFNMSUB213BF16Z256r = 11827 |
| 151561 | CEFBS_None, // VFNMSUB213BF16Z256rk = 11828 |
| 151562 | CEFBS_None, // VFNMSUB213BF16Z256rkz = 11829 |
| 151563 | CEFBS_None, // VFNMSUB213BF16Zm = 11830 |
| 151564 | CEFBS_None, // VFNMSUB213BF16Zmb = 11831 |
| 151565 | CEFBS_None, // VFNMSUB213BF16Zmbk = 11832 |
| 151566 | CEFBS_None, // VFNMSUB213BF16Zmbkz = 11833 |
| 151567 | CEFBS_None, // VFNMSUB213BF16Zmk = 11834 |
| 151568 | CEFBS_None, // VFNMSUB213BF16Zmkz = 11835 |
| 151569 | CEFBS_None, // VFNMSUB213BF16Zr = 11836 |
| 151570 | CEFBS_None, // VFNMSUB213BF16Zrk = 11837 |
| 151571 | CEFBS_None, // VFNMSUB213BF16Zrkz = 11838 |
| 151572 | CEFBS_None, // VFNMSUB213PDYm = 11839 |
| 151573 | CEFBS_None, // VFNMSUB213PDYr = 11840 |
| 151574 | CEFBS_None, // VFNMSUB213PDZ128m = 11841 |
| 151575 | CEFBS_None, // VFNMSUB213PDZ128mb = 11842 |
| 151576 | CEFBS_None, // VFNMSUB213PDZ128mbk = 11843 |
| 151577 | CEFBS_None, // VFNMSUB213PDZ128mbkz = 11844 |
| 151578 | CEFBS_None, // VFNMSUB213PDZ128mk = 11845 |
| 151579 | CEFBS_None, // VFNMSUB213PDZ128mkz = 11846 |
| 151580 | CEFBS_None, // VFNMSUB213PDZ128r = 11847 |
| 151581 | CEFBS_None, // VFNMSUB213PDZ128rk = 11848 |
| 151582 | CEFBS_None, // VFNMSUB213PDZ128rkz = 11849 |
| 151583 | CEFBS_None, // VFNMSUB213PDZ256m = 11850 |
| 151584 | CEFBS_None, // VFNMSUB213PDZ256mb = 11851 |
| 151585 | CEFBS_None, // VFNMSUB213PDZ256mbk = 11852 |
| 151586 | CEFBS_None, // VFNMSUB213PDZ256mbkz = 11853 |
| 151587 | CEFBS_None, // VFNMSUB213PDZ256mk = 11854 |
| 151588 | CEFBS_None, // VFNMSUB213PDZ256mkz = 11855 |
| 151589 | CEFBS_None, // VFNMSUB213PDZ256r = 11856 |
| 151590 | CEFBS_None, // VFNMSUB213PDZ256rk = 11857 |
| 151591 | CEFBS_None, // VFNMSUB213PDZ256rkz = 11858 |
| 151592 | CEFBS_None, // VFNMSUB213PDZm = 11859 |
| 151593 | CEFBS_None, // VFNMSUB213PDZmb = 11860 |
| 151594 | CEFBS_None, // VFNMSUB213PDZmbk = 11861 |
| 151595 | CEFBS_None, // VFNMSUB213PDZmbkz = 11862 |
| 151596 | CEFBS_None, // VFNMSUB213PDZmk = 11863 |
| 151597 | CEFBS_None, // VFNMSUB213PDZmkz = 11864 |
| 151598 | CEFBS_None, // VFNMSUB213PDZr = 11865 |
| 151599 | CEFBS_None, // VFNMSUB213PDZrb = 11866 |
| 151600 | CEFBS_None, // VFNMSUB213PDZrbk = 11867 |
| 151601 | CEFBS_None, // VFNMSUB213PDZrbkz = 11868 |
| 151602 | CEFBS_None, // VFNMSUB213PDZrk = 11869 |
| 151603 | CEFBS_None, // VFNMSUB213PDZrkz = 11870 |
| 151604 | CEFBS_None, // VFNMSUB213PDm = 11871 |
| 151605 | CEFBS_None, // VFNMSUB213PDr = 11872 |
| 151606 | CEFBS_None, // VFNMSUB213PHZ128m = 11873 |
| 151607 | CEFBS_None, // VFNMSUB213PHZ128mb = 11874 |
| 151608 | CEFBS_None, // VFNMSUB213PHZ128mbk = 11875 |
| 151609 | CEFBS_None, // VFNMSUB213PHZ128mbkz = 11876 |
| 151610 | CEFBS_None, // VFNMSUB213PHZ128mk = 11877 |
| 151611 | CEFBS_None, // VFNMSUB213PHZ128mkz = 11878 |
| 151612 | CEFBS_None, // VFNMSUB213PHZ128r = 11879 |
| 151613 | CEFBS_None, // VFNMSUB213PHZ128rk = 11880 |
| 151614 | CEFBS_None, // VFNMSUB213PHZ128rkz = 11881 |
| 151615 | CEFBS_None, // VFNMSUB213PHZ256m = 11882 |
| 151616 | CEFBS_None, // VFNMSUB213PHZ256mb = 11883 |
| 151617 | CEFBS_None, // VFNMSUB213PHZ256mbk = 11884 |
| 151618 | CEFBS_None, // VFNMSUB213PHZ256mbkz = 11885 |
| 151619 | CEFBS_None, // VFNMSUB213PHZ256mk = 11886 |
| 151620 | CEFBS_None, // VFNMSUB213PHZ256mkz = 11887 |
| 151621 | CEFBS_None, // VFNMSUB213PHZ256r = 11888 |
| 151622 | CEFBS_None, // VFNMSUB213PHZ256rk = 11889 |
| 151623 | CEFBS_None, // VFNMSUB213PHZ256rkz = 11890 |
| 151624 | CEFBS_None, // VFNMSUB213PHZm = 11891 |
| 151625 | CEFBS_None, // VFNMSUB213PHZmb = 11892 |
| 151626 | CEFBS_None, // VFNMSUB213PHZmbk = 11893 |
| 151627 | CEFBS_None, // VFNMSUB213PHZmbkz = 11894 |
| 151628 | CEFBS_None, // VFNMSUB213PHZmk = 11895 |
| 151629 | CEFBS_None, // VFNMSUB213PHZmkz = 11896 |
| 151630 | CEFBS_None, // VFNMSUB213PHZr = 11897 |
| 151631 | CEFBS_None, // VFNMSUB213PHZrb = 11898 |
| 151632 | CEFBS_None, // VFNMSUB213PHZrbk = 11899 |
| 151633 | CEFBS_None, // VFNMSUB213PHZrbkz = 11900 |
| 151634 | CEFBS_None, // VFNMSUB213PHZrk = 11901 |
| 151635 | CEFBS_None, // VFNMSUB213PHZrkz = 11902 |
| 151636 | CEFBS_None, // VFNMSUB213PSYm = 11903 |
| 151637 | CEFBS_None, // VFNMSUB213PSYr = 11904 |
| 151638 | CEFBS_None, // VFNMSUB213PSZ128m = 11905 |
| 151639 | CEFBS_None, // VFNMSUB213PSZ128mb = 11906 |
| 151640 | CEFBS_None, // VFNMSUB213PSZ128mbk = 11907 |
| 151641 | CEFBS_None, // VFNMSUB213PSZ128mbkz = 11908 |
| 151642 | CEFBS_None, // VFNMSUB213PSZ128mk = 11909 |
| 151643 | CEFBS_None, // VFNMSUB213PSZ128mkz = 11910 |
| 151644 | CEFBS_None, // VFNMSUB213PSZ128r = 11911 |
| 151645 | CEFBS_None, // VFNMSUB213PSZ128rk = 11912 |
| 151646 | CEFBS_None, // VFNMSUB213PSZ128rkz = 11913 |
| 151647 | CEFBS_None, // VFNMSUB213PSZ256m = 11914 |
| 151648 | CEFBS_None, // VFNMSUB213PSZ256mb = 11915 |
| 151649 | CEFBS_None, // VFNMSUB213PSZ256mbk = 11916 |
| 151650 | CEFBS_None, // VFNMSUB213PSZ256mbkz = 11917 |
| 151651 | CEFBS_None, // VFNMSUB213PSZ256mk = 11918 |
| 151652 | CEFBS_None, // VFNMSUB213PSZ256mkz = 11919 |
| 151653 | CEFBS_None, // VFNMSUB213PSZ256r = 11920 |
| 151654 | CEFBS_None, // VFNMSUB213PSZ256rk = 11921 |
| 151655 | CEFBS_None, // VFNMSUB213PSZ256rkz = 11922 |
| 151656 | CEFBS_None, // VFNMSUB213PSZm = 11923 |
| 151657 | CEFBS_None, // VFNMSUB213PSZmb = 11924 |
| 151658 | CEFBS_None, // VFNMSUB213PSZmbk = 11925 |
| 151659 | CEFBS_None, // VFNMSUB213PSZmbkz = 11926 |
| 151660 | CEFBS_None, // VFNMSUB213PSZmk = 11927 |
| 151661 | CEFBS_None, // VFNMSUB213PSZmkz = 11928 |
| 151662 | CEFBS_None, // VFNMSUB213PSZr = 11929 |
| 151663 | CEFBS_None, // VFNMSUB213PSZrb = 11930 |
| 151664 | CEFBS_None, // VFNMSUB213PSZrbk = 11931 |
| 151665 | CEFBS_None, // VFNMSUB213PSZrbkz = 11932 |
| 151666 | CEFBS_None, // VFNMSUB213PSZrk = 11933 |
| 151667 | CEFBS_None, // VFNMSUB213PSZrkz = 11934 |
| 151668 | CEFBS_None, // VFNMSUB213PSm = 11935 |
| 151669 | CEFBS_None, // VFNMSUB213PSr = 11936 |
| 151670 | CEFBS_None, // VFNMSUB213SDZm = 11937 |
| 151671 | CEFBS_None, // VFNMSUB213SDZm_Int = 11938 |
| 151672 | CEFBS_None, // VFNMSUB213SDZmk_Int = 11939 |
| 151673 | CEFBS_None, // VFNMSUB213SDZmkz_Int = 11940 |
| 151674 | CEFBS_None, // VFNMSUB213SDZr = 11941 |
| 151675 | CEFBS_None, // VFNMSUB213SDZr_Int = 11942 |
| 151676 | CEFBS_None, // VFNMSUB213SDZrb = 11943 |
| 151677 | CEFBS_None, // VFNMSUB213SDZrb_Int = 11944 |
| 151678 | CEFBS_None, // VFNMSUB213SDZrbk_Int = 11945 |
| 151679 | CEFBS_None, // VFNMSUB213SDZrbkz_Int = 11946 |
| 151680 | CEFBS_None, // VFNMSUB213SDZrk_Int = 11947 |
| 151681 | CEFBS_None, // VFNMSUB213SDZrkz_Int = 11948 |
| 151682 | CEFBS_None, // VFNMSUB213SDm = 11949 |
| 151683 | CEFBS_None, // VFNMSUB213SDm_Int = 11950 |
| 151684 | CEFBS_None, // VFNMSUB213SDr = 11951 |
| 151685 | CEFBS_None, // VFNMSUB213SDr_Int = 11952 |
| 151686 | CEFBS_None, // VFNMSUB213SHZm = 11953 |
| 151687 | CEFBS_None, // VFNMSUB213SHZm_Int = 11954 |
| 151688 | CEFBS_None, // VFNMSUB213SHZmk_Int = 11955 |
| 151689 | CEFBS_None, // VFNMSUB213SHZmkz_Int = 11956 |
| 151690 | CEFBS_None, // VFNMSUB213SHZr = 11957 |
| 151691 | CEFBS_None, // VFNMSUB213SHZr_Int = 11958 |
| 151692 | CEFBS_None, // VFNMSUB213SHZrb = 11959 |
| 151693 | CEFBS_None, // VFNMSUB213SHZrb_Int = 11960 |
| 151694 | CEFBS_None, // VFNMSUB213SHZrbk_Int = 11961 |
| 151695 | CEFBS_None, // VFNMSUB213SHZrbkz_Int = 11962 |
| 151696 | CEFBS_None, // VFNMSUB213SHZrk_Int = 11963 |
| 151697 | CEFBS_None, // VFNMSUB213SHZrkz_Int = 11964 |
| 151698 | CEFBS_None, // VFNMSUB213SSZm = 11965 |
| 151699 | CEFBS_None, // VFNMSUB213SSZm_Int = 11966 |
| 151700 | CEFBS_None, // VFNMSUB213SSZmk_Int = 11967 |
| 151701 | CEFBS_None, // VFNMSUB213SSZmkz_Int = 11968 |
| 151702 | CEFBS_None, // VFNMSUB213SSZr = 11969 |
| 151703 | CEFBS_None, // VFNMSUB213SSZr_Int = 11970 |
| 151704 | CEFBS_None, // VFNMSUB213SSZrb = 11971 |
| 151705 | CEFBS_None, // VFNMSUB213SSZrb_Int = 11972 |
| 151706 | CEFBS_None, // VFNMSUB213SSZrbk_Int = 11973 |
| 151707 | CEFBS_None, // VFNMSUB213SSZrbkz_Int = 11974 |
| 151708 | CEFBS_None, // VFNMSUB213SSZrk_Int = 11975 |
| 151709 | CEFBS_None, // VFNMSUB213SSZrkz_Int = 11976 |
| 151710 | CEFBS_None, // VFNMSUB213SSm = 11977 |
| 151711 | CEFBS_None, // VFNMSUB213SSm_Int = 11978 |
| 151712 | CEFBS_None, // VFNMSUB213SSr = 11979 |
| 151713 | CEFBS_None, // VFNMSUB213SSr_Int = 11980 |
| 151714 | CEFBS_None, // VFNMSUB231BF16Z128m = 11981 |
| 151715 | CEFBS_None, // VFNMSUB231BF16Z128mb = 11982 |
| 151716 | CEFBS_None, // VFNMSUB231BF16Z128mbk = 11983 |
| 151717 | CEFBS_None, // VFNMSUB231BF16Z128mbkz = 11984 |
| 151718 | CEFBS_None, // VFNMSUB231BF16Z128mk = 11985 |
| 151719 | CEFBS_None, // VFNMSUB231BF16Z128mkz = 11986 |
| 151720 | CEFBS_None, // VFNMSUB231BF16Z128r = 11987 |
| 151721 | CEFBS_None, // VFNMSUB231BF16Z128rk = 11988 |
| 151722 | CEFBS_None, // VFNMSUB231BF16Z128rkz = 11989 |
| 151723 | CEFBS_None, // VFNMSUB231BF16Z256m = 11990 |
| 151724 | CEFBS_None, // VFNMSUB231BF16Z256mb = 11991 |
| 151725 | CEFBS_None, // VFNMSUB231BF16Z256mbk = 11992 |
| 151726 | CEFBS_None, // VFNMSUB231BF16Z256mbkz = 11993 |
| 151727 | CEFBS_None, // VFNMSUB231BF16Z256mk = 11994 |
| 151728 | CEFBS_None, // VFNMSUB231BF16Z256mkz = 11995 |
| 151729 | CEFBS_None, // VFNMSUB231BF16Z256r = 11996 |
| 151730 | CEFBS_None, // VFNMSUB231BF16Z256rk = 11997 |
| 151731 | CEFBS_None, // VFNMSUB231BF16Z256rkz = 11998 |
| 151732 | CEFBS_None, // VFNMSUB231BF16Zm = 11999 |
| 151733 | CEFBS_None, // VFNMSUB231BF16Zmb = 12000 |
| 151734 | CEFBS_None, // VFNMSUB231BF16Zmbk = 12001 |
| 151735 | CEFBS_None, // VFNMSUB231BF16Zmbkz = 12002 |
| 151736 | CEFBS_None, // VFNMSUB231BF16Zmk = 12003 |
| 151737 | CEFBS_None, // VFNMSUB231BF16Zmkz = 12004 |
| 151738 | CEFBS_None, // VFNMSUB231BF16Zr = 12005 |
| 151739 | CEFBS_None, // VFNMSUB231BF16Zrk = 12006 |
| 151740 | CEFBS_None, // VFNMSUB231BF16Zrkz = 12007 |
| 151741 | CEFBS_None, // VFNMSUB231PDYm = 12008 |
| 151742 | CEFBS_None, // VFNMSUB231PDYr = 12009 |
| 151743 | CEFBS_None, // VFNMSUB231PDZ128m = 12010 |
| 151744 | CEFBS_None, // VFNMSUB231PDZ128mb = 12011 |
| 151745 | CEFBS_None, // VFNMSUB231PDZ128mbk = 12012 |
| 151746 | CEFBS_None, // VFNMSUB231PDZ128mbkz = 12013 |
| 151747 | CEFBS_None, // VFNMSUB231PDZ128mk = 12014 |
| 151748 | CEFBS_None, // VFNMSUB231PDZ128mkz = 12015 |
| 151749 | CEFBS_None, // VFNMSUB231PDZ128r = 12016 |
| 151750 | CEFBS_None, // VFNMSUB231PDZ128rk = 12017 |
| 151751 | CEFBS_None, // VFNMSUB231PDZ128rkz = 12018 |
| 151752 | CEFBS_None, // VFNMSUB231PDZ256m = 12019 |
| 151753 | CEFBS_None, // VFNMSUB231PDZ256mb = 12020 |
| 151754 | CEFBS_None, // VFNMSUB231PDZ256mbk = 12021 |
| 151755 | CEFBS_None, // VFNMSUB231PDZ256mbkz = 12022 |
| 151756 | CEFBS_None, // VFNMSUB231PDZ256mk = 12023 |
| 151757 | CEFBS_None, // VFNMSUB231PDZ256mkz = 12024 |
| 151758 | CEFBS_None, // VFNMSUB231PDZ256r = 12025 |
| 151759 | CEFBS_None, // VFNMSUB231PDZ256rk = 12026 |
| 151760 | CEFBS_None, // VFNMSUB231PDZ256rkz = 12027 |
| 151761 | CEFBS_None, // VFNMSUB231PDZm = 12028 |
| 151762 | CEFBS_None, // VFNMSUB231PDZmb = 12029 |
| 151763 | CEFBS_None, // VFNMSUB231PDZmbk = 12030 |
| 151764 | CEFBS_None, // VFNMSUB231PDZmbkz = 12031 |
| 151765 | CEFBS_None, // VFNMSUB231PDZmk = 12032 |
| 151766 | CEFBS_None, // VFNMSUB231PDZmkz = 12033 |
| 151767 | CEFBS_None, // VFNMSUB231PDZr = 12034 |
| 151768 | CEFBS_None, // VFNMSUB231PDZrb = 12035 |
| 151769 | CEFBS_None, // VFNMSUB231PDZrbk = 12036 |
| 151770 | CEFBS_None, // VFNMSUB231PDZrbkz = 12037 |
| 151771 | CEFBS_None, // VFNMSUB231PDZrk = 12038 |
| 151772 | CEFBS_None, // VFNMSUB231PDZrkz = 12039 |
| 151773 | CEFBS_None, // VFNMSUB231PDm = 12040 |
| 151774 | CEFBS_None, // VFNMSUB231PDr = 12041 |
| 151775 | CEFBS_None, // VFNMSUB231PHZ128m = 12042 |
| 151776 | CEFBS_None, // VFNMSUB231PHZ128mb = 12043 |
| 151777 | CEFBS_None, // VFNMSUB231PHZ128mbk = 12044 |
| 151778 | CEFBS_None, // VFNMSUB231PHZ128mbkz = 12045 |
| 151779 | CEFBS_None, // VFNMSUB231PHZ128mk = 12046 |
| 151780 | CEFBS_None, // VFNMSUB231PHZ128mkz = 12047 |
| 151781 | CEFBS_None, // VFNMSUB231PHZ128r = 12048 |
| 151782 | CEFBS_None, // VFNMSUB231PHZ128rk = 12049 |
| 151783 | CEFBS_None, // VFNMSUB231PHZ128rkz = 12050 |
| 151784 | CEFBS_None, // VFNMSUB231PHZ256m = 12051 |
| 151785 | CEFBS_None, // VFNMSUB231PHZ256mb = 12052 |
| 151786 | CEFBS_None, // VFNMSUB231PHZ256mbk = 12053 |
| 151787 | CEFBS_None, // VFNMSUB231PHZ256mbkz = 12054 |
| 151788 | CEFBS_None, // VFNMSUB231PHZ256mk = 12055 |
| 151789 | CEFBS_None, // VFNMSUB231PHZ256mkz = 12056 |
| 151790 | CEFBS_None, // VFNMSUB231PHZ256r = 12057 |
| 151791 | CEFBS_None, // VFNMSUB231PHZ256rk = 12058 |
| 151792 | CEFBS_None, // VFNMSUB231PHZ256rkz = 12059 |
| 151793 | CEFBS_None, // VFNMSUB231PHZm = 12060 |
| 151794 | CEFBS_None, // VFNMSUB231PHZmb = 12061 |
| 151795 | CEFBS_None, // VFNMSUB231PHZmbk = 12062 |
| 151796 | CEFBS_None, // VFNMSUB231PHZmbkz = 12063 |
| 151797 | CEFBS_None, // VFNMSUB231PHZmk = 12064 |
| 151798 | CEFBS_None, // VFNMSUB231PHZmkz = 12065 |
| 151799 | CEFBS_None, // VFNMSUB231PHZr = 12066 |
| 151800 | CEFBS_None, // VFNMSUB231PHZrb = 12067 |
| 151801 | CEFBS_None, // VFNMSUB231PHZrbk = 12068 |
| 151802 | CEFBS_None, // VFNMSUB231PHZrbkz = 12069 |
| 151803 | CEFBS_None, // VFNMSUB231PHZrk = 12070 |
| 151804 | CEFBS_None, // VFNMSUB231PHZrkz = 12071 |
| 151805 | CEFBS_None, // VFNMSUB231PSYm = 12072 |
| 151806 | CEFBS_None, // VFNMSUB231PSYr = 12073 |
| 151807 | CEFBS_None, // VFNMSUB231PSZ128m = 12074 |
| 151808 | CEFBS_None, // VFNMSUB231PSZ128mb = 12075 |
| 151809 | CEFBS_None, // VFNMSUB231PSZ128mbk = 12076 |
| 151810 | CEFBS_None, // VFNMSUB231PSZ128mbkz = 12077 |
| 151811 | CEFBS_None, // VFNMSUB231PSZ128mk = 12078 |
| 151812 | CEFBS_None, // VFNMSUB231PSZ128mkz = 12079 |
| 151813 | CEFBS_None, // VFNMSUB231PSZ128r = 12080 |
| 151814 | CEFBS_None, // VFNMSUB231PSZ128rk = 12081 |
| 151815 | CEFBS_None, // VFNMSUB231PSZ128rkz = 12082 |
| 151816 | CEFBS_None, // VFNMSUB231PSZ256m = 12083 |
| 151817 | CEFBS_None, // VFNMSUB231PSZ256mb = 12084 |
| 151818 | CEFBS_None, // VFNMSUB231PSZ256mbk = 12085 |
| 151819 | CEFBS_None, // VFNMSUB231PSZ256mbkz = 12086 |
| 151820 | CEFBS_None, // VFNMSUB231PSZ256mk = 12087 |
| 151821 | CEFBS_None, // VFNMSUB231PSZ256mkz = 12088 |
| 151822 | CEFBS_None, // VFNMSUB231PSZ256r = 12089 |
| 151823 | CEFBS_None, // VFNMSUB231PSZ256rk = 12090 |
| 151824 | CEFBS_None, // VFNMSUB231PSZ256rkz = 12091 |
| 151825 | CEFBS_None, // VFNMSUB231PSZm = 12092 |
| 151826 | CEFBS_None, // VFNMSUB231PSZmb = 12093 |
| 151827 | CEFBS_None, // VFNMSUB231PSZmbk = 12094 |
| 151828 | CEFBS_None, // VFNMSUB231PSZmbkz = 12095 |
| 151829 | CEFBS_None, // VFNMSUB231PSZmk = 12096 |
| 151830 | CEFBS_None, // VFNMSUB231PSZmkz = 12097 |
| 151831 | CEFBS_None, // VFNMSUB231PSZr = 12098 |
| 151832 | CEFBS_None, // VFNMSUB231PSZrb = 12099 |
| 151833 | CEFBS_None, // VFNMSUB231PSZrbk = 12100 |
| 151834 | CEFBS_None, // VFNMSUB231PSZrbkz = 12101 |
| 151835 | CEFBS_None, // VFNMSUB231PSZrk = 12102 |
| 151836 | CEFBS_None, // VFNMSUB231PSZrkz = 12103 |
| 151837 | CEFBS_None, // VFNMSUB231PSm = 12104 |
| 151838 | CEFBS_None, // VFNMSUB231PSr = 12105 |
| 151839 | CEFBS_None, // VFNMSUB231SDZm = 12106 |
| 151840 | CEFBS_None, // VFNMSUB231SDZm_Int = 12107 |
| 151841 | CEFBS_None, // VFNMSUB231SDZmk_Int = 12108 |
| 151842 | CEFBS_None, // VFNMSUB231SDZmkz_Int = 12109 |
| 151843 | CEFBS_None, // VFNMSUB231SDZr = 12110 |
| 151844 | CEFBS_None, // VFNMSUB231SDZr_Int = 12111 |
| 151845 | CEFBS_None, // VFNMSUB231SDZrb = 12112 |
| 151846 | CEFBS_None, // VFNMSUB231SDZrb_Int = 12113 |
| 151847 | CEFBS_None, // VFNMSUB231SDZrbk_Int = 12114 |
| 151848 | CEFBS_None, // VFNMSUB231SDZrbkz_Int = 12115 |
| 151849 | CEFBS_None, // VFNMSUB231SDZrk_Int = 12116 |
| 151850 | CEFBS_None, // VFNMSUB231SDZrkz_Int = 12117 |
| 151851 | CEFBS_None, // VFNMSUB231SDm = 12118 |
| 151852 | CEFBS_None, // VFNMSUB231SDm_Int = 12119 |
| 151853 | CEFBS_None, // VFNMSUB231SDr = 12120 |
| 151854 | CEFBS_None, // VFNMSUB231SDr_Int = 12121 |
| 151855 | CEFBS_None, // VFNMSUB231SHZm = 12122 |
| 151856 | CEFBS_None, // VFNMSUB231SHZm_Int = 12123 |
| 151857 | CEFBS_None, // VFNMSUB231SHZmk_Int = 12124 |
| 151858 | CEFBS_None, // VFNMSUB231SHZmkz_Int = 12125 |
| 151859 | CEFBS_None, // VFNMSUB231SHZr = 12126 |
| 151860 | CEFBS_None, // VFNMSUB231SHZr_Int = 12127 |
| 151861 | CEFBS_None, // VFNMSUB231SHZrb = 12128 |
| 151862 | CEFBS_None, // VFNMSUB231SHZrb_Int = 12129 |
| 151863 | CEFBS_None, // VFNMSUB231SHZrbk_Int = 12130 |
| 151864 | CEFBS_None, // VFNMSUB231SHZrbkz_Int = 12131 |
| 151865 | CEFBS_None, // VFNMSUB231SHZrk_Int = 12132 |
| 151866 | CEFBS_None, // VFNMSUB231SHZrkz_Int = 12133 |
| 151867 | CEFBS_None, // VFNMSUB231SSZm = 12134 |
| 151868 | CEFBS_None, // VFNMSUB231SSZm_Int = 12135 |
| 151869 | CEFBS_None, // VFNMSUB231SSZmk_Int = 12136 |
| 151870 | CEFBS_None, // VFNMSUB231SSZmkz_Int = 12137 |
| 151871 | CEFBS_None, // VFNMSUB231SSZr = 12138 |
| 151872 | CEFBS_None, // VFNMSUB231SSZr_Int = 12139 |
| 151873 | CEFBS_None, // VFNMSUB231SSZrb = 12140 |
| 151874 | CEFBS_None, // VFNMSUB231SSZrb_Int = 12141 |
| 151875 | CEFBS_None, // VFNMSUB231SSZrbk_Int = 12142 |
| 151876 | CEFBS_None, // VFNMSUB231SSZrbkz_Int = 12143 |
| 151877 | CEFBS_None, // VFNMSUB231SSZrk_Int = 12144 |
| 151878 | CEFBS_None, // VFNMSUB231SSZrkz_Int = 12145 |
| 151879 | CEFBS_None, // VFNMSUB231SSm = 12146 |
| 151880 | CEFBS_None, // VFNMSUB231SSm_Int = 12147 |
| 151881 | CEFBS_None, // VFNMSUB231SSr = 12148 |
| 151882 | CEFBS_None, // VFNMSUB231SSr_Int = 12149 |
| 151883 | CEFBS_None, // VFNMSUBPD4Ymr = 12150 |
| 151884 | CEFBS_None, // VFNMSUBPD4Yrm = 12151 |
| 151885 | CEFBS_None, // VFNMSUBPD4Yrr = 12152 |
| 151886 | CEFBS_None, // VFNMSUBPD4Yrr_REV = 12153 |
| 151887 | CEFBS_None, // VFNMSUBPD4mr = 12154 |
| 151888 | CEFBS_None, // VFNMSUBPD4rm = 12155 |
| 151889 | CEFBS_None, // VFNMSUBPD4rr = 12156 |
| 151890 | CEFBS_None, // VFNMSUBPD4rr_REV = 12157 |
| 151891 | CEFBS_None, // VFNMSUBPS4Ymr = 12158 |
| 151892 | CEFBS_None, // VFNMSUBPS4Yrm = 12159 |
| 151893 | CEFBS_None, // VFNMSUBPS4Yrr = 12160 |
| 151894 | CEFBS_None, // VFNMSUBPS4Yrr_REV = 12161 |
| 151895 | CEFBS_None, // VFNMSUBPS4mr = 12162 |
| 151896 | CEFBS_None, // VFNMSUBPS4rm = 12163 |
| 151897 | CEFBS_None, // VFNMSUBPS4rr = 12164 |
| 151898 | CEFBS_None, // VFNMSUBPS4rr_REV = 12165 |
| 151899 | CEFBS_None, // VFNMSUBSD4mr = 12166 |
| 151900 | CEFBS_None, // VFNMSUBSD4mr_Int = 12167 |
| 151901 | CEFBS_None, // VFNMSUBSD4rm = 12168 |
| 151902 | CEFBS_None, // VFNMSUBSD4rm_Int = 12169 |
| 151903 | CEFBS_None, // VFNMSUBSD4rr = 12170 |
| 151904 | CEFBS_None, // VFNMSUBSD4rr_Int = 12171 |
| 151905 | CEFBS_None, // VFNMSUBSD4rr_Int_REV = 12172 |
| 151906 | CEFBS_None, // VFNMSUBSD4rr_REV = 12173 |
| 151907 | CEFBS_None, // VFNMSUBSS4mr = 12174 |
| 151908 | CEFBS_None, // VFNMSUBSS4mr_Int = 12175 |
| 151909 | CEFBS_None, // VFNMSUBSS4rm = 12176 |
| 151910 | CEFBS_None, // VFNMSUBSS4rm_Int = 12177 |
| 151911 | CEFBS_None, // VFNMSUBSS4rr = 12178 |
| 151912 | CEFBS_None, // VFNMSUBSS4rr_Int = 12179 |
| 151913 | CEFBS_None, // VFNMSUBSS4rr_Int_REV = 12180 |
| 151914 | CEFBS_None, // VFNMSUBSS4rr_REV = 12181 |
| 151915 | CEFBS_None, // VFPCLASSBF16Z128mbi = 12182 |
| 151916 | CEFBS_None, // VFPCLASSBF16Z128mbik = 12183 |
| 151917 | CEFBS_None, // VFPCLASSBF16Z128mi = 12184 |
| 151918 | CEFBS_None, // VFPCLASSBF16Z128mik = 12185 |
| 151919 | CEFBS_None, // VFPCLASSBF16Z128ri = 12186 |
| 151920 | CEFBS_None, // VFPCLASSBF16Z128rik = 12187 |
| 151921 | CEFBS_None, // VFPCLASSBF16Z256mbi = 12188 |
| 151922 | CEFBS_None, // VFPCLASSBF16Z256mbik = 12189 |
| 151923 | CEFBS_None, // VFPCLASSBF16Z256mi = 12190 |
| 151924 | CEFBS_None, // VFPCLASSBF16Z256mik = 12191 |
| 151925 | CEFBS_None, // VFPCLASSBF16Z256ri = 12192 |
| 151926 | CEFBS_None, // VFPCLASSBF16Z256rik = 12193 |
| 151927 | CEFBS_None, // VFPCLASSBF16Zmbi = 12194 |
| 151928 | CEFBS_None, // VFPCLASSBF16Zmbik = 12195 |
| 151929 | CEFBS_None, // VFPCLASSBF16Zmi = 12196 |
| 151930 | CEFBS_None, // VFPCLASSBF16Zmik = 12197 |
| 151931 | CEFBS_None, // VFPCLASSBF16Zri = 12198 |
| 151932 | CEFBS_None, // VFPCLASSBF16Zrik = 12199 |
| 151933 | CEFBS_None, // VFPCLASSPDZ128mbi = 12200 |
| 151934 | CEFBS_None, // VFPCLASSPDZ128mbik = 12201 |
| 151935 | CEFBS_None, // VFPCLASSPDZ128mi = 12202 |
| 151936 | CEFBS_None, // VFPCLASSPDZ128mik = 12203 |
| 151937 | CEFBS_None, // VFPCLASSPDZ128ri = 12204 |
| 151938 | CEFBS_None, // VFPCLASSPDZ128rik = 12205 |
| 151939 | CEFBS_None, // VFPCLASSPDZ256mbi = 12206 |
| 151940 | CEFBS_None, // VFPCLASSPDZ256mbik = 12207 |
| 151941 | CEFBS_None, // VFPCLASSPDZ256mi = 12208 |
| 151942 | CEFBS_None, // VFPCLASSPDZ256mik = 12209 |
| 151943 | CEFBS_None, // VFPCLASSPDZ256ri = 12210 |
| 151944 | CEFBS_None, // VFPCLASSPDZ256rik = 12211 |
| 151945 | CEFBS_None, // VFPCLASSPDZmbi = 12212 |
| 151946 | CEFBS_None, // VFPCLASSPDZmbik = 12213 |
| 151947 | CEFBS_None, // VFPCLASSPDZmi = 12214 |
| 151948 | CEFBS_None, // VFPCLASSPDZmik = 12215 |
| 151949 | CEFBS_None, // VFPCLASSPDZri = 12216 |
| 151950 | CEFBS_None, // VFPCLASSPDZrik = 12217 |
| 151951 | CEFBS_None, // VFPCLASSPHZ128mbi = 12218 |
| 151952 | CEFBS_None, // VFPCLASSPHZ128mbik = 12219 |
| 151953 | CEFBS_None, // VFPCLASSPHZ128mi = 12220 |
| 151954 | CEFBS_None, // VFPCLASSPHZ128mik = 12221 |
| 151955 | CEFBS_None, // VFPCLASSPHZ128ri = 12222 |
| 151956 | CEFBS_None, // VFPCLASSPHZ128rik = 12223 |
| 151957 | CEFBS_None, // VFPCLASSPHZ256mbi = 12224 |
| 151958 | CEFBS_None, // VFPCLASSPHZ256mbik = 12225 |
| 151959 | CEFBS_None, // VFPCLASSPHZ256mi = 12226 |
| 151960 | CEFBS_None, // VFPCLASSPHZ256mik = 12227 |
| 151961 | CEFBS_None, // VFPCLASSPHZ256ri = 12228 |
| 151962 | CEFBS_None, // VFPCLASSPHZ256rik = 12229 |
| 151963 | CEFBS_None, // VFPCLASSPHZmbi = 12230 |
| 151964 | CEFBS_None, // VFPCLASSPHZmbik = 12231 |
| 151965 | CEFBS_None, // VFPCLASSPHZmi = 12232 |
| 151966 | CEFBS_None, // VFPCLASSPHZmik = 12233 |
| 151967 | CEFBS_None, // VFPCLASSPHZri = 12234 |
| 151968 | CEFBS_None, // VFPCLASSPHZrik = 12235 |
| 151969 | CEFBS_None, // VFPCLASSPSZ128mbi = 12236 |
| 151970 | CEFBS_None, // VFPCLASSPSZ128mbik = 12237 |
| 151971 | CEFBS_None, // VFPCLASSPSZ128mi = 12238 |
| 151972 | CEFBS_None, // VFPCLASSPSZ128mik = 12239 |
| 151973 | CEFBS_None, // VFPCLASSPSZ128ri = 12240 |
| 151974 | CEFBS_None, // VFPCLASSPSZ128rik = 12241 |
| 151975 | CEFBS_None, // VFPCLASSPSZ256mbi = 12242 |
| 151976 | CEFBS_None, // VFPCLASSPSZ256mbik = 12243 |
| 151977 | CEFBS_None, // VFPCLASSPSZ256mi = 12244 |
| 151978 | CEFBS_None, // VFPCLASSPSZ256mik = 12245 |
| 151979 | CEFBS_None, // VFPCLASSPSZ256ri = 12246 |
| 151980 | CEFBS_None, // VFPCLASSPSZ256rik = 12247 |
| 151981 | CEFBS_None, // VFPCLASSPSZmbi = 12248 |
| 151982 | CEFBS_None, // VFPCLASSPSZmbik = 12249 |
| 151983 | CEFBS_None, // VFPCLASSPSZmi = 12250 |
| 151984 | CEFBS_None, // VFPCLASSPSZmik = 12251 |
| 151985 | CEFBS_None, // VFPCLASSPSZri = 12252 |
| 151986 | CEFBS_None, // VFPCLASSPSZrik = 12253 |
| 151987 | CEFBS_None, // VFPCLASSSDZmi = 12254 |
| 151988 | CEFBS_None, // VFPCLASSSDZmik = 12255 |
| 151989 | CEFBS_None, // VFPCLASSSDZri = 12256 |
| 151990 | CEFBS_None, // VFPCLASSSDZrik = 12257 |
| 151991 | CEFBS_None, // VFPCLASSSHZmi = 12258 |
| 151992 | CEFBS_None, // VFPCLASSSHZmik = 12259 |
| 151993 | CEFBS_None, // VFPCLASSSHZri = 12260 |
| 151994 | CEFBS_None, // VFPCLASSSHZrik = 12261 |
| 151995 | CEFBS_None, // VFPCLASSSSZmi = 12262 |
| 151996 | CEFBS_None, // VFPCLASSSSZmik = 12263 |
| 151997 | CEFBS_None, // VFPCLASSSSZri = 12264 |
| 151998 | CEFBS_None, // VFPCLASSSSZrik = 12265 |
| 151999 | CEFBS_None, // VFRCZPDYrm = 12266 |
| 152000 | CEFBS_None, // VFRCZPDYrr = 12267 |
| 152001 | CEFBS_None, // VFRCZPDrm = 12268 |
| 152002 | CEFBS_None, // VFRCZPDrr = 12269 |
| 152003 | CEFBS_None, // VFRCZPSYrm = 12270 |
| 152004 | CEFBS_None, // VFRCZPSYrr = 12271 |
| 152005 | CEFBS_None, // VFRCZPSrm = 12272 |
| 152006 | CEFBS_None, // VFRCZPSrr = 12273 |
| 152007 | CEFBS_None, // VFRCZSDrm = 12274 |
| 152008 | CEFBS_None, // VFRCZSDrr = 12275 |
| 152009 | CEFBS_None, // VFRCZSSrm = 12276 |
| 152010 | CEFBS_None, // VFRCZSSrr = 12277 |
| 152011 | CEFBS_None, // VGATHERDPDYrm = 12278 |
| 152012 | CEFBS_None, // VGATHERDPDZ128rm = 12279 |
| 152013 | CEFBS_None, // VGATHERDPDZ256rm = 12280 |
| 152014 | CEFBS_None, // VGATHERDPDZrm = 12281 |
| 152015 | CEFBS_None, // VGATHERDPDrm = 12282 |
| 152016 | CEFBS_None, // VGATHERDPSYrm = 12283 |
| 152017 | CEFBS_None, // VGATHERDPSZ128rm = 12284 |
| 152018 | CEFBS_None, // VGATHERDPSZ256rm = 12285 |
| 152019 | CEFBS_None, // VGATHERDPSZrm = 12286 |
| 152020 | CEFBS_None, // VGATHERDPSrm = 12287 |
| 152021 | CEFBS_None, // VGATHERPF0DPDm = 12288 |
| 152022 | CEFBS_None, // VGATHERPF0DPSm = 12289 |
| 152023 | CEFBS_None, // VGATHERPF0QPDm = 12290 |
| 152024 | CEFBS_None, // VGATHERPF0QPSm = 12291 |
| 152025 | CEFBS_None, // VGATHERPF1DPDm = 12292 |
| 152026 | CEFBS_None, // VGATHERPF1DPSm = 12293 |
| 152027 | CEFBS_None, // VGATHERPF1QPDm = 12294 |
| 152028 | CEFBS_None, // VGATHERPF1QPSm = 12295 |
| 152029 | CEFBS_None, // VGATHERQPDYrm = 12296 |
| 152030 | CEFBS_None, // VGATHERQPDZ128rm = 12297 |
| 152031 | CEFBS_None, // VGATHERQPDZ256rm = 12298 |
| 152032 | CEFBS_None, // VGATHERQPDZrm = 12299 |
| 152033 | CEFBS_None, // VGATHERQPDrm = 12300 |
| 152034 | CEFBS_None, // VGATHERQPSYrm = 12301 |
| 152035 | CEFBS_None, // VGATHERQPSZ128rm = 12302 |
| 152036 | CEFBS_None, // VGATHERQPSZ256rm = 12303 |
| 152037 | CEFBS_None, // VGATHERQPSZrm = 12304 |
| 152038 | CEFBS_None, // VGATHERQPSrm = 12305 |
| 152039 | CEFBS_None, // VGETEXPBF16Z128m = 12306 |
| 152040 | CEFBS_None, // VGETEXPBF16Z128mb = 12307 |
| 152041 | CEFBS_None, // VGETEXPBF16Z128mbk = 12308 |
| 152042 | CEFBS_None, // VGETEXPBF16Z128mbkz = 12309 |
| 152043 | CEFBS_None, // VGETEXPBF16Z128mk = 12310 |
| 152044 | CEFBS_None, // VGETEXPBF16Z128mkz = 12311 |
| 152045 | CEFBS_None, // VGETEXPBF16Z128r = 12312 |
| 152046 | CEFBS_None, // VGETEXPBF16Z128rk = 12313 |
| 152047 | CEFBS_None, // VGETEXPBF16Z128rkz = 12314 |
| 152048 | CEFBS_None, // VGETEXPBF16Z256m = 12315 |
| 152049 | CEFBS_None, // VGETEXPBF16Z256mb = 12316 |
| 152050 | CEFBS_None, // VGETEXPBF16Z256mbk = 12317 |
| 152051 | CEFBS_None, // VGETEXPBF16Z256mbkz = 12318 |
| 152052 | CEFBS_None, // VGETEXPBF16Z256mk = 12319 |
| 152053 | CEFBS_None, // VGETEXPBF16Z256mkz = 12320 |
| 152054 | CEFBS_None, // VGETEXPBF16Z256r = 12321 |
| 152055 | CEFBS_None, // VGETEXPBF16Z256rk = 12322 |
| 152056 | CEFBS_None, // VGETEXPBF16Z256rkz = 12323 |
| 152057 | CEFBS_None, // VGETEXPBF16Zm = 12324 |
| 152058 | CEFBS_None, // VGETEXPBF16Zmb = 12325 |
| 152059 | CEFBS_None, // VGETEXPBF16Zmbk = 12326 |
| 152060 | CEFBS_None, // VGETEXPBF16Zmbkz = 12327 |
| 152061 | CEFBS_None, // VGETEXPBF16Zmk = 12328 |
| 152062 | CEFBS_None, // VGETEXPBF16Zmkz = 12329 |
| 152063 | CEFBS_None, // VGETEXPBF16Zr = 12330 |
| 152064 | CEFBS_None, // VGETEXPBF16Zrk = 12331 |
| 152065 | CEFBS_None, // VGETEXPBF16Zrkz = 12332 |
| 152066 | CEFBS_None, // VGETEXPPDZ128m = 12333 |
| 152067 | CEFBS_None, // VGETEXPPDZ128mb = 12334 |
| 152068 | CEFBS_None, // VGETEXPPDZ128mbk = 12335 |
| 152069 | CEFBS_None, // VGETEXPPDZ128mbkz = 12336 |
| 152070 | CEFBS_None, // VGETEXPPDZ128mk = 12337 |
| 152071 | CEFBS_None, // VGETEXPPDZ128mkz = 12338 |
| 152072 | CEFBS_None, // VGETEXPPDZ128r = 12339 |
| 152073 | CEFBS_None, // VGETEXPPDZ128rk = 12340 |
| 152074 | CEFBS_None, // VGETEXPPDZ128rkz = 12341 |
| 152075 | CEFBS_None, // VGETEXPPDZ256m = 12342 |
| 152076 | CEFBS_None, // VGETEXPPDZ256mb = 12343 |
| 152077 | CEFBS_None, // VGETEXPPDZ256mbk = 12344 |
| 152078 | CEFBS_None, // VGETEXPPDZ256mbkz = 12345 |
| 152079 | CEFBS_None, // VGETEXPPDZ256mk = 12346 |
| 152080 | CEFBS_None, // VGETEXPPDZ256mkz = 12347 |
| 152081 | CEFBS_None, // VGETEXPPDZ256r = 12348 |
| 152082 | CEFBS_None, // VGETEXPPDZ256rk = 12349 |
| 152083 | CEFBS_None, // VGETEXPPDZ256rkz = 12350 |
| 152084 | CEFBS_None, // VGETEXPPDZm = 12351 |
| 152085 | CEFBS_None, // VGETEXPPDZmb = 12352 |
| 152086 | CEFBS_None, // VGETEXPPDZmbk = 12353 |
| 152087 | CEFBS_None, // VGETEXPPDZmbkz = 12354 |
| 152088 | CEFBS_None, // VGETEXPPDZmk = 12355 |
| 152089 | CEFBS_None, // VGETEXPPDZmkz = 12356 |
| 152090 | CEFBS_None, // VGETEXPPDZr = 12357 |
| 152091 | CEFBS_None, // VGETEXPPDZrb = 12358 |
| 152092 | CEFBS_None, // VGETEXPPDZrbk = 12359 |
| 152093 | CEFBS_None, // VGETEXPPDZrbkz = 12360 |
| 152094 | CEFBS_None, // VGETEXPPDZrk = 12361 |
| 152095 | CEFBS_None, // VGETEXPPDZrkz = 12362 |
| 152096 | CEFBS_None, // VGETEXPPHZ128m = 12363 |
| 152097 | CEFBS_None, // VGETEXPPHZ128mb = 12364 |
| 152098 | CEFBS_None, // VGETEXPPHZ128mbk = 12365 |
| 152099 | CEFBS_None, // VGETEXPPHZ128mbkz = 12366 |
| 152100 | CEFBS_None, // VGETEXPPHZ128mk = 12367 |
| 152101 | CEFBS_None, // VGETEXPPHZ128mkz = 12368 |
| 152102 | CEFBS_None, // VGETEXPPHZ128r = 12369 |
| 152103 | CEFBS_None, // VGETEXPPHZ128rk = 12370 |
| 152104 | CEFBS_None, // VGETEXPPHZ128rkz = 12371 |
| 152105 | CEFBS_None, // VGETEXPPHZ256m = 12372 |
| 152106 | CEFBS_None, // VGETEXPPHZ256mb = 12373 |
| 152107 | CEFBS_None, // VGETEXPPHZ256mbk = 12374 |
| 152108 | CEFBS_None, // VGETEXPPHZ256mbkz = 12375 |
| 152109 | CEFBS_None, // VGETEXPPHZ256mk = 12376 |
| 152110 | CEFBS_None, // VGETEXPPHZ256mkz = 12377 |
| 152111 | CEFBS_None, // VGETEXPPHZ256r = 12378 |
| 152112 | CEFBS_None, // VGETEXPPHZ256rk = 12379 |
| 152113 | CEFBS_None, // VGETEXPPHZ256rkz = 12380 |
| 152114 | CEFBS_None, // VGETEXPPHZm = 12381 |
| 152115 | CEFBS_None, // VGETEXPPHZmb = 12382 |
| 152116 | CEFBS_None, // VGETEXPPHZmbk = 12383 |
| 152117 | CEFBS_None, // VGETEXPPHZmbkz = 12384 |
| 152118 | CEFBS_None, // VGETEXPPHZmk = 12385 |
| 152119 | CEFBS_None, // VGETEXPPHZmkz = 12386 |
| 152120 | CEFBS_None, // VGETEXPPHZr = 12387 |
| 152121 | CEFBS_None, // VGETEXPPHZrb = 12388 |
| 152122 | CEFBS_None, // VGETEXPPHZrbk = 12389 |
| 152123 | CEFBS_None, // VGETEXPPHZrbkz = 12390 |
| 152124 | CEFBS_None, // VGETEXPPHZrk = 12391 |
| 152125 | CEFBS_None, // VGETEXPPHZrkz = 12392 |
| 152126 | CEFBS_None, // VGETEXPPSZ128m = 12393 |
| 152127 | CEFBS_None, // VGETEXPPSZ128mb = 12394 |
| 152128 | CEFBS_None, // VGETEXPPSZ128mbk = 12395 |
| 152129 | CEFBS_None, // VGETEXPPSZ128mbkz = 12396 |
| 152130 | CEFBS_None, // VGETEXPPSZ128mk = 12397 |
| 152131 | CEFBS_None, // VGETEXPPSZ128mkz = 12398 |
| 152132 | CEFBS_None, // VGETEXPPSZ128r = 12399 |
| 152133 | CEFBS_None, // VGETEXPPSZ128rk = 12400 |
| 152134 | CEFBS_None, // VGETEXPPSZ128rkz = 12401 |
| 152135 | CEFBS_None, // VGETEXPPSZ256m = 12402 |
| 152136 | CEFBS_None, // VGETEXPPSZ256mb = 12403 |
| 152137 | CEFBS_None, // VGETEXPPSZ256mbk = 12404 |
| 152138 | CEFBS_None, // VGETEXPPSZ256mbkz = 12405 |
| 152139 | CEFBS_None, // VGETEXPPSZ256mk = 12406 |
| 152140 | CEFBS_None, // VGETEXPPSZ256mkz = 12407 |
| 152141 | CEFBS_None, // VGETEXPPSZ256r = 12408 |
| 152142 | CEFBS_None, // VGETEXPPSZ256rk = 12409 |
| 152143 | CEFBS_None, // VGETEXPPSZ256rkz = 12410 |
| 152144 | CEFBS_None, // VGETEXPPSZm = 12411 |
| 152145 | CEFBS_None, // VGETEXPPSZmb = 12412 |
| 152146 | CEFBS_None, // VGETEXPPSZmbk = 12413 |
| 152147 | CEFBS_None, // VGETEXPPSZmbkz = 12414 |
| 152148 | CEFBS_None, // VGETEXPPSZmk = 12415 |
| 152149 | CEFBS_None, // VGETEXPPSZmkz = 12416 |
| 152150 | CEFBS_None, // VGETEXPPSZr = 12417 |
| 152151 | CEFBS_None, // VGETEXPPSZrb = 12418 |
| 152152 | CEFBS_None, // VGETEXPPSZrbk = 12419 |
| 152153 | CEFBS_None, // VGETEXPPSZrbkz = 12420 |
| 152154 | CEFBS_None, // VGETEXPPSZrk = 12421 |
| 152155 | CEFBS_None, // VGETEXPPSZrkz = 12422 |
| 152156 | CEFBS_None, // VGETEXPSDZm = 12423 |
| 152157 | CEFBS_None, // VGETEXPSDZmk = 12424 |
| 152158 | CEFBS_None, // VGETEXPSDZmkz = 12425 |
| 152159 | CEFBS_None, // VGETEXPSDZr = 12426 |
| 152160 | CEFBS_None, // VGETEXPSDZrb = 12427 |
| 152161 | CEFBS_None, // VGETEXPSDZrbk = 12428 |
| 152162 | CEFBS_None, // VGETEXPSDZrbkz = 12429 |
| 152163 | CEFBS_None, // VGETEXPSDZrk = 12430 |
| 152164 | CEFBS_None, // VGETEXPSDZrkz = 12431 |
| 152165 | CEFBS_None, // VGETEXPSHZm = 12432 |
| 152166 | CEFBS_None, // VGETEXPSHZmk = 12433 |
| 152167 | CEFBS_None, // VGETEXPSHZmkz = 12434 |
| 152168 | CEFBS_None, // VGETEXPSHZr = 12435 |
| 152169 | CEFBS_None, // VGETEXPSHZrb = 12436 |
| 152170 | CEFBS_None, // VGETEXPSHZrbk = 12437 |
| 152171 | CEFBS_None, // VGETEXPSHZrbkz = 12438 |
| 152172 | CEFBS_None, // VGETEXPSHZrk = 12439 |
| 152173 | CEFBS_None, // VGETEXPSHZrkz = 12440 |
| 152174 | CEFBS_None, // VGETEXPSSZm = 12441 |
| 152175 | CEFBS_None, // VGETEXPSSZmk = 12442 |
| 152176 | CEFBS_None, // VGETEXPSSZmkz = 12443 |
| 152177 | CEFBS_None, // VGETEXPSSZr = 12444 |
| 152178 | CEFBS_None, // VGETEXPSSZrb = 12445 |
| 152179 | CEFBS_None, // VGETEXPSSZrbk = 12446 |
| 152180 | CEFBS_None, // VGETEXPSSZrbkz = 12447 |
| 152181 | CEFBS_None, // VGETEXPSSZrk = 12448 |
| 152182 | CEFBS_None, // VGETEXPSSZrkz = 12449 |
| 152183 | CEFBS_None, // VGETMANTBF16Z128rmbi = 12450 |
| 152184 | CEFBS_None, // VGETMANTBF16Z128rmbik = 12451 |
| 152185 | CEFBS_None, // VGETMANTBF16Z128rmbikz = 12452 |
| 152186 | CEFBS_None, // VGETMANTBF16Z128rmi = 12453 |
| 152187 | CEFBS_None, // VGETMANTBF16Z128rmik = 12454 |
| 152188 | CEFBS_None, // VGETMANTBF16Z128rmikz = 12455 |
| 152189 | CEFBS_None, // VGETMANTBF16Z128rri = 12456 |
| 152190 | CEFBS_None, // VGETMANTBF16Z128rrik = 12457 |
| 152191 | CEFBS_None, // VGETMANTBF16Z128rrikz = 12458 |
| 152192 | CEFBS_None, // VGETMANTBF16Z256rmbi = 12459 |
| 152193 | CEFBS_None, // VGETMANTBF16Z256rmbik = 12460 |
| 152194 | CEFBS_None, // VGETMANTBF16Z256rmbikz = 12461 |
| 152195 | CEFBS_None, // VGETMANTBF16Z256rmi = 12462 |
| 152196 | CEFBS_None, // VGETMANTBF16Z256rmik = 12463 |
| 152197 | CEFBS_None, // VGETMANTBF16Z256rmikz = 12464 |
| 152198 | CEFBS_None, // VGETMANTBF16Z256rri = 12465 |
| 152199 | CEFBS_None, // VGETMANTBF16Z256rrik = 12466 |
| 152200 | CEFBS_None, // VGETMANTBF16Z256rrikz = 12467 |
| 152201 | CEFBS_None, // VGETMANTBF16Zrmbi = 12468 |
| 152202 | CEFBS_None, // VGETMANTBF16Zrmbik = 12469 |
| 152203 | CEFBS_None, // VGETMANTBF16Zrmbikz = 12470 |
| 152204 | CEFBS_None, // VGETMANTBF16Zrmi = 12471 |
| 152205 | CEFBS_None, // VGETMANTBF16Zrmik = 12472 |
| 152206 | CEFBS_None, // VGETMANTBF16Zrmikz = 12473 |
| 152207 | CEFBS_None, // VGETMANTBF16Zrri = 12474 |
| 152208 | CEFBS_None, // VGETMANTBF16Zrrik = 12475 |
| 152209 | CEFBS_None, // VGETMANTBF16Zrrikz = 12476 |
| 152210 | CEFBS_None, // VGETMANTPDZ128rmbi = 12477 |
| 152211 | CEFBS_None, // VGETMANTPDZ128rmbik = 12478 |
| 152212 | CEFBS_None, // VGETMANTPDZ128rmbikz = 12479 |
| 152213 | CEFBS_None, // VGETMANTPDZ128rmi = 12480 |
| 152214 | CEFBS_None, // VGETMANTPDZ128rmik = 12481 |
| 152215 | CEFBS_None, // VGETMANTPDZ128rmikz = 12482 |
| 152216 | CEFBS_None, // VGETMANTPDZ128rri = 12483 |
| 152217 | CEFBS_None, // VGETMANTPDZ128rrik = 12484 |
| 152218 | CEFBS_None, // VGETMANTPDZ128rrikz = 12485 |
| 152219 | CEFBS_None, // VGETMANTPDZ256rmbi = 12486 |
| 152220 | CEFBS_None, // VGETMANTPDZ256rmbik = 12487 |
| 152221 | CEFBS_None, // VGETMANTPDZ256rmbikz = 12488 |
| 152222 | CEFBS_None, // VGETMANTPDZ256rmi = 12489 |
| 152223 | CEFBS_None, // VGETMANTPDZ256rmik = 12490 |
| 152224 | CEFBS_None, // VGETMANTPDZ256rmikz = 12491 |
| 152225 | CEFBS_None, // VGETMANTPDZ256rri = 12492 |
| 152226 | CEFBS_None, // VGETMANTPDZ256rrik = 12493 |
| 152227 | CEFBS_None, // VGETMANTPDZ256rrikz = 12494 |
| 152228 | CEFBS_None, // VGETMANTPDZrmbi = 12495 |
| 152229 | CEFBS_None, // VGETMANTPDZrmbik = 12496 |
| 152230 | CEFBS_None, // VGETMANTPDZrmbikz = 12497 |
| 152231 | CEFBS_None, // VGETMANTPDZrmi = 12498 |
| 152232 | CEFBS_None, // VGETMANTPDZrmik = 12499 |
| 152233 | CEFBS_None, // VGETMANTPDZrmikz = 12500 |
| 152234 | CEFBS_None, // VGETMANTPDZrri = 12501 |
| 152235 | CEFBS_None, // VGETMANTPDZrrib = 12502 |
| 152236 | CEFBS_None, // VGETMANTPDZrribk = 12503 |
| 152237 | CEFBS_None, // VGETMANTPDZrribkz = 12504 |
| 152238 | CEFBS_None, // VGETMANTPDZrrik = 12505 |
| 152239 | CEFBS_None, // VGETMANTPDZrrikz = 12506 |
| 152240 | CEFBS_None, // VGETMANTPHZ128rmbi = 12507 |
| 152241 | CEFBS_None, // VGETMANTPHZ128rmbik = 12508 |
| 152242 | CEFBS_None, // VGETMANTPHZ128rmbikz = 12509 |
| 152243 | CEFBS_None, // VGETMANTPHZ128rmi = 12510 |
| 152244 | CEFBS_None, // VGETMANTPHZ128rmik = 12511 |
| 152245 | CEFBS_None, // VGETMANTPHZ128rmikz = 12512 |
| 152246 | CEFBS_None, // VGETMANTPHZ128rri = 12513 |
| 152247 | CEFBS_None, // VGETMANTPHZ128rrik = 12514 |
| 152248 | CEFBS_None, // VGETMANTPHZ128rrikz = 12515 |
| 152249 | CEFBS_None, // VGETMANTPHZ256rmbi = 12516 |
| 152250 | CEFBS_None, // VGETMANTPHZ256rmbik = 12517 |
| 152251 | CEFBS_None, // VGETMANTPHZ256rmbikz = 12518 |
| 152252 | CEFBS_None, // VGETMANTPHZ256rmi = 12519 |
| 152253 | CEFBS_None, // VGETMANTPHZ256rmik = 12520 |
| 152254 | CEFBS_None, // VGETMANTPHZ256rmikz = 12521 |
| 152255 | CEFBS_None, // VGETMANTPHZ256rri = 12522 |
| 152256 | CEFBS_None, // VGETMANTPHZ256rrik = 12523 |
| 152257 | CEFBS_None, // VGETMANTPHZ256rrikz = 12524 |
| 152258 | CEFBS_None, // VGETMANTPHZrmbi = 12525 |
| 152259 | CEFBS_None, // VGETMANTPHZrmbik = 12526 |
| 152260 | CEFBS_None, // VGETMANTPHZrmbikz = 12527 |
| 152261 | CEFBS_None, // VGETMANTPHZrmi = 12528 |
| 152262 | CEFBS_None, // VGETMANTPHZrmik = 12529 |
| 152263 | CEFBS_None, // VGETMANTPHZrmikz = 12530 |
| 152264 | CEFBS_None, // VGETMANTPHZrri = 12531 |
| 152265 | CEFBS_None, // VGETMANTPHZrrib = 12532 |
| 152266 | CEFBS_None, // VGETMANTPHZrribk = 12533 |
| 152267 | CEFBS_None, // VGETMANTPHZrribkz = 12534 |
| 152268 | CEFBS_None, // VGETMANTPHZrrik = 12535 |
| 152269 | CEFBS_None, // VGETMANTPHZrrikz = 12536 |
| 152270 | CEFBS_None, // VGETMANTPSZ128rmbi = 12537 |
| 152271 | CEFBS_None, // VGETMANTPSZ128rmbik = 12538 |
| 152272 | CEFBS_None, // VGETMANTPSZ128rmbikz = 12539 |
| 152273 | CEFBS_None, // VGETMANTPSZ128rmi = 12540 |
| 152274 | CEFBS_None, // VGETMANTPSZ128rmik = 12541 |
| 152275 | CEFBS_None, // VGETMANTPSZ128rmikz = 12542 |
| 152276 | CEFBS_None, // VGETMANTPSZ128rri = 12543 |
| 152277 | CEFBS_None, // VGETMANTPSZ128rrik = 12544 |
| 152278 | CEFBS_None, // VGETMANTPSZ128rrikz = 12545 |
| 152279 | CEFBS_None, // VGETMANTPSZ256rmbi = 12546 |
| 152280 | CEFBS_None, // VGETMANTPSZ256rmbik = 12547 |
| 152281 | CEFBS_None, // VGETMANTPSZ256rmbikz = 12548 |
| 152282 | CEFBS_None, // VGETMANTPSZ256rmi = 12549 |
| 152283 | CEFBS_None, // VGETMANTPSZ256rmik = 12550 |
| 152284 | CEFBS_None, // VGETMANTPSZ256rmikz = 12551 |
| 152285 | CEFBS_None, // VGETMANTPSZ256rri = 12552 |
| 152286 | CEFBS_None, // VGETMANTPSZ256rrik = 12553 |
| 152287 | CEFBS_None, // VGETMANTPSZ256rrikz = 12554 |
| 152288 | CEFBS_None, // VGETMANTPSZrmbi = 12555 |
| 152289 | CEFBS_None, // VGETMANTPSZrmbik = 12556 |
| 152290 | CEFBS_None, // VGETMANTPSZrmbikz = 12557 |
| 152291 | CEFBS_None, // VGETMANTPSZrmi = 12558 |
| 152292 | CEFBS_None, // VGETMANTPSZrmik = 12559 |
| 152293 | CEFBS_None, // VGETMANTPSZrmikz = 12560 |
| 152294 | CEFBS_None, // VGETMANTPSZrri = 12561 |
| 152295 | CEFBS_None, // VGETMANTPSZrrib = 12562 |
| 152296 | CEFBS_None, // VGETMANTPSZrribk = 12563 |
| 152297 | CEFBS_None, // VGETMANTPSZrribkz = 12564 |
| 152298 | CEFBS_None, // VGETMANTPSZrrik = 12565 |
| 152299 | CEFBS_None, // VGETMANTPSZrrikz = 12566 |
| 152300 | CEFBS_None, // VGETMANTSDZrmi = 12567 |
| 152301 | CEFBS_None, // VGETMANTSDZrmik = 12568 |
| 152302 | CEFBS_None, // VGETMANTSDZrmikz = 12569 |
| 152303 | CEFBS_None, // VGETMANTSDZrri = 12570 |
| 152304 | CEFBS_None, // VGETMANTSDZrrib = 12571 |
| 152305 | CEFBS_None, // VGETMANTSDZrribk = 12572 |
| 152306 | CEFBS_None, // VGETMANTSDZrribkz = 12573 |
| 152307 | CEFBS_None, // VGETMANTSDZrrik = 12574 |
| 152308 | CEFBS_None, // VGETMANTSDZrrikz = 12575 |
| 152309 | CEFBS_None, // VGETMANTSHZrmi = 12576 |
| 152310 | CEFBS_None, // VGETMANTSHZrmik = 12577 |
| 152311 | CEFBS_None, // VGETMANTSHZrmikz = 12578 |
| 152312 | CEFBS_None, // VGETMANTSHZrri = 12579 |
| 152313 | CEFBS_None, // VGETMANTSHZrrib = 12580 |
| 152314 | CEFBS_None, // VGETMANTSHZrribk = 12581 |
| 152315 | CEFBS_None, // VGETMANTSHZrribkz = 12582 |
| 152316 | CEFBS_None, // VGETMANTSHZrrik = 12583 |
| 152317 | CEFBS_None, // VGETMANTSHZrrikz = 12584 |
| 152318 | CEFBS_None, // VGETMANTSSZrmi = 12585 |
| 152319 | CEFBS_None, // VGETMANTSSZrmik = 12586 |
| 152320 | CEFBS_None, // VGETMANTSSZrmikz = 12587 |
| 152321 | CEFBS_None, // VGETMANTSSZrri = 12588 |
| 152322 | CEFBS_None, // VGETMANTSSZrrib = 12589 |
| 152323 | CEFBS_None, // VGETMANTSSZrribk = 12590 |
| 152324 | CEFBS_None, // VGETMANTSSZrribkz = 12591 |
| 152325 | CEFBS_None, // VGETMANTSSZrrik = 12592 |
| 152326 | CEFBS_None, // VGETMANTSSZrrikz = 12593 |
| 152327 | CEFBS_None, // VGF2P8AFFINEINVQBYrmi = 12594 |
| 152328 | CEFBS_None, // VGF2P8AFFINEINVQBYrri = 12595 |
| 152329 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmbi = 12596 |
| 152330 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmbik = 12597 |
| 152331 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmbikz = 12598 |
| 152332 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmi = 12599 |
| 152333 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmik = 12600 |
| 152334 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmikz = 12601 |
| 152335 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rri = 12602 |
| 152336 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rrik = 12603 |
| 152337 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rrikz = 12604 |
| 152338 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmbi = 12605 |
| 152339 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmbik = 12606 |
| 152340 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmbikz = 12607 |
| 152341 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmi = 12608 |
| 152342 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmik = 12609 |
| 152343 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmikz = 12610 |
| 152344 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rri = 12611 |
| 152345 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rrik = 12612 |
| 152346 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rrikz = 12613 |
| 152347 | CEFBS_None, // VGF2P8AFFINEINVQBZrmbi = 12614 |
| 152348 | CEFBS_None, // VGF2P8AFFINEINVQBZrmbik = 12615 |
| 152349 | CEFBS_None, // VGF2P8AFFINEINVQBZrmbikz = 12616 |
| 152350 | CEFBS_None, // VGF2P8AFFINEINVQBZrmi = 12617 |
| 152351 | CEFBS_None, // VGF2P8AFFINEINVQBZrmik = 12618 |
| 152352 | CEFBS_None, // VGF2P8AFFINEINVQBZrmikz = 12619 |
| 152353 | CEFBS_None, // VGF2P8AFFINEINVQBZrri = 12620 |
| 152354 | CEFBS_None, // VGF2P8AFFINEINVQBZrrik = 12621 |
| 152355 | CEFBS_None, // VGF2P8AFFINEINVQBZrrikz = 12622 |
| 152356 | CEFBS_None, // VGF2P8AFFINEINVQBrmi = 12623 |
| 152357 | CEFBS_None, // VGF2P8AFFINEINVQBrri = 12624 |
| 152358 | CEFBS_None, // VGF2P8AFFINEQBYrmi = 12625 |
| 152359 | CEFBS_None, // VGF2P8AFFINEQBYrri = 12626 |
| 152360 | CEFBS_None, // VGF2P8AFFINEQBZ128rmbi = 12627 |
| 152361 | CEFBS_None, // VGF2P8AFFINEQBZ128rmbik = 12628 |
| 152362 | CEFBS_None, // VGF2P8AFFINEQBZ128rmbikz = 12629 |
| 152363 | CEFBS_None, // VGF2P8AFFINEQBZ128rmi = 12630 |
| 152364 | CEFBS_None, // VGF2P8AFFINEQBZ128rmik = 12631 |
| 152365 | CEFBS_None, // VGF2P8AFFINEQBZ128rmikz = 12632 |
| 152366 | CEFBS_None, // VGF2P8AFFINEQBZ128rri = 12633 |
| 152367 | CEFBS_None, // VGF2P8AFFINEQBZ128rrik = 12634 |
| 152368 | CEFBS_None, // VGF2P8AFFINEQBZ128rrikz = 12635 |
| 152369 | CEFBS_None, // VGF2P8AFFINEQBZ256rmbi = 12636 |
| 152370 | CEFBS_None, // VGF2P8AFFINEQBZ256rmbik = 12637 |
| 152371 | CEFBS_None, // VGF2P8AFFINEQBZ256rmbikz = 12638 |
| 152372 | CEFBS_None, // VGF2P8AFFINEQBZ256rmi = 12639 |
| 152373 | CEFBS_None, // VGF2P8AFFINEQBZ256rmik = 12640 |
| 152374 | CEFBS_None, // VGF2P8AFFINEQBZ256rmikz = 12641 |
| 152375 | CEFBS_None, // VGF2P8AFFINEQBZ256rri = 12642 |
| 152376 | CEFBS_None, // VGF2P8AFFINEQBZ256rrik = 12643 |
| 152377 | CEFBS_None, // VGF2P8AFFINEQBZ256rrikz = 12644 |
| 152378 | CEFBS_None, // VGF2P8AFFINEQBZrmbi = 12645 |
| 152379 | CEFBS_None, // VGF2P8AFFINEQBZrmbik = 12646 |
| 152380 | CEFBS_None, // VGF2P8AFFINEQBZrmbikz = 12647 |
| 152381 | CEFBS_None, // VGF2P8AFFINEQBZrmi = 12648 |
| 152382 | CEFBS_None, // VGF2P8AFFINEQBZrmik = 12649 |
| 152383 | CEFBS_None, // VGF2P8AFFINEQBZrmikz = 12650 |
| 152384 | CEFBS_None, // VGF2P8AFFINEQBZrri = 12651 |
| 152385 | CEFBS_None, // VGF2P8AFFINEQBZrrik = 12652 |
| 152386 | CEFBS_None, // VGF2P8AFFINEQBZrrikz = 12653 |
| 152387 | CEFBS_None, // VGF2P8AFFINEQBrmi = 12654 |
| 152388 | CEFBS_None, // VGF2P8AFFINEQBrri = 12655 |
| 152389 | CEFBS_None, // VGF2P8MULBYrm = 12656 |
| 152390 | CEFBS_None, // VGF2P8MULBYrr = 12657 |
| 152391 | CEFBS_None, // VGF2P8MULBZ128rm = 12658 |
| 152392 | CEFBS_None, // VGF2P8MULBZ128rmk = 12659 |
| 152393 | CEFBS_None, // VGF2P8MULBZ128rmkz = 12660 |
| 152394 | CEFBS_None, // VGF2P8MULBZ128rr = 12661 |
| 152395 | CEFBS_None, // VGF2P8MULBZ128rrk = 12662 |
| 152396 | CEFBS_None, // VGF2P8MULBZ128rrkz = 12663 |
| 152397 | CEFBS_None, // VGF2P8MULBZ256rm = 12664 |
| 152398 | CEFBS_None, // VGF2P8MULBZ256rmk = 12665 |
| 152399 | CEFBS_None, // VGF2P8MULBZ256rmkz = 12666 |
| 152400 | CEFBS_None, // VGF2P8MULBZ256rr = 12667 |
| 152401 | CEFBS_None, // VGF2P8MULBZ256rrk = 12668 |
| 152402 | CEFBS_None, // VGF2P8MULBZ256rrkz = 12669 |
| 152403 | CEFBS_None, // VGF2P8MULBZrm = 12670 |
| 152404 | CEFBS_None, // VGF2P8MULBZrmk = 12671 |
| 152405 | CEFBS_None, // VGF2P8MULBZrmkz = 12672 |
| 152406 | CEFBS_None, // VGF2P8MULBZrr = 12673 |
| 152407 | CEFBS_None, // VGF2P8MULBZrrk = 12674 |
| 152408 | CEFBS_None, // VGF2P8MULBZrrkz = 12675 |
| 152409 | CEFBS_None, // VGF2P8MULBrm = 12676 |
| 152410 | CEFBS_None, // VGF2P8MULBrr = 12677 |
| 152411 | CEFBS_None, // VHADDPDYrm = 12678 |
| 152412 | CEFBS_None, // VHADDPDYrr = 12679 |
| 152413 | CEFBS_None, // VHADDPDrm = 12680 |
| 152414 | CEFBS_None, // VHADDPDrr = 12681 |
| 152415 | CEFBS_None, // VHADDPSYrm = 12682 |
| 152416 | CEFBS_None, // VHADDPSYrr = 12683 |
| 152417 | CEFBS_None, // VHADDPSrm = 12684 |
| 152418 | CEFBS_None, // VHADDPSrr = 12685 |
| 152419 | CEFBS_None, // VHSUBPDYrm = 12686 |
| 152420 | CEFBS_None, // VHSUBPDYrr = 12687 |
| 152421 | CEFBS_None, // VHSUBPDrm = 12688 |
| 152422 | CEFBS_None, // VHSUBPDrr = 12689 |
| 152423 | CEFBS_None, // VHSUBPSYrm = 12690 |
| 152424 | CEFBS_None, // VHSUBPSYrr = 12691 |
| 152425 | CEFBS_None, // VHSUBPSrm = 12692 |
| 152426 | CEFBS_None, // VHSUBPSrr = 12693 |
| 152427 | CEFBS_None, // VINSERTF128rmi = 12694 |
| 152428 | CEFBS_None, // VINSERTF128rri = 12695 |
| 152429 | CEFBS_None, // VINSERTF32X4Z256rmi = 12696 |
| 152430 | CEFBS_None, // VINSERTF32X4Z256rmik = 12697 |
| 152431 | CEFBS_None, // VINSERTF32X4Z256rmikz = 12698 |
| 152432 | CEFBS_None, // VINSERTF32X4Z256rri = 12699 |
| 152433 | CEFBS_None, // VINSERTF32X4Z256rrik = 12700 |
| 152434 | CEFBS_None, // VINSERTF32X4Z256rrikz = 12701 |
| 152435 | CEFBS_None, // VINSERTF32X4Zrmi = 12702 |
| 152436 | CEFBS_None, // VINSERTF32X4Zrmik = 12703 |
| 152437 | CEFBS_None, // VINSERTF32X4Zrmikz = 12704 |
| 152438 | CEFBS_None, // VINSERTF32X4Zrri = 12705 |
| 152439 | CEFBS_None, // VINSERTF32X4Zrrik = 12706 |
| 152440 | CEFBS_None, // VINSERTF32X4Zrrikz = 12707 |
| 152441 | CEFBS_None, // VINSERTF32X8Zrmi = 12708 |
| 152442 | CEFBS_None, // VINSERTF32X8Zrmik = 12709 |
| 152443 | CEFBS_None, // VINSERTF32X8Zrmikz = 12710 |
| 152444 | CEFBS_None, // VINSERTF32X8Zrri = 12711 |
| 152445 | CEFBS_None, // VINSERTF32X8Zrrik = 12712 |
| 152446 | CEFBS_None, // VINSERTF32X8Zrrikz = 12713 |
| 152447 | CEFBS_None, // VINSERTF64X2Z256rmi = 12714 |
| 152448 | CEFBS_None, // VINSERTF64X2Z256rmik = 12715 |
| 152449 | CEFBS_None, // VINSERTF64X2Z256rmikz = 12716 |
| 152450 | CEFBS_None, // VINSERTF64X2Z256rri = 12717 |
| 152451 | CEFBS_None, // VINSERTF64X2Z256rrik = 12718 |
| 152452 | CEFBS_None, // VINSERTF64X2Z256rrikz = 12719 |
| 152453 | CEFBS_None, // VINSERTF64X2Zrmi = 12720 |
| 152454 | CEFBS_None, // VINSERTF64X2Zrmik = 12721 |
| 152455 | CEFBS_None, // VINSERTF64X2Zrmikz = 12722 |
| 152456 | CEFBS_None, // VINSERTF64X2Zrri = 12723 |
| 152457 | CEFBS_None, // VINSERTF64X2Zrrik = 12724 |
| 152458 | CEFBS_None, // VINSERTF64X2Zrrikz = 12725 |
| 152459 | CEFBS_None, // VINSERTF64X4Zrmi = 12726 |
| 152460 | CEFBS_None, // VINSERTF64X4Zrmik = 12727 |
| 152461 | CEFBS_None, // VINSERTF64X4Zrmikz = 12728 |
| 152462 | CEFBS_None, // VINSERTF64X4Zrri = 12729 |
| 152463 | CEFBS_None, // VINSERTF64X4Zrrik = 12730 |
| 152464 | CEFBS_None, // VINSERTF64X4Zrrikz = 12731 |
| 152465 | CEFBS_None, // VINSERTI128rmi = 12732 |
| 152466 | CEFBS_None, // VINSERTI128rri = 12733 |
| 152467 | CEFBS_None, // VINSERTI32X4Z256rmi = 12734 |
| 152468 | CEFBS_None, // VINSERTI32X4Z256rmik = 12735 |
| 152469 | CEFBS_None, // VINSERTI32X4Z256rmikz = 12736 |
| 152470 | CEFBS_None, // VINSERTI32X4Z256rri = 12737 |
| 152471 | CEFBS_None, // VINSERTI32X4Z256rrik = 12738 |
| 152472 | CEFBS_None, // VINSERTI32X4Z256rrikz = 12739 |
| 152473 | CEFBS_None, // VINSERTI32X4Zrmi = 12740 |
| 152474 | CEFBS_None, // VINSERTI32X4Zrmik = 12741 |
| 152475 | CEFBS_None, // VINSERTI32X4Zrmikz = 12742 |
| 152476 | CEFBS_None, // VINSERTI32X4Zrri = 12743 |
| 152477 | CEFBS_None, // VINSERTI32X4Zrrik = 12744 |
| 152478 | CEFBS_None, // VINSERTI32X4Zrrikz = 12745 |
| 152479 | CEFBS_None, // VINSERTI32X8Zrmi = 12746 |
| 152480 | CEFBS_None, // VINSERTI32X8Zrmik = 12747 |
| 152481 | CEFBS_None, // VINSERTI32X8Zrmikz = 12748 |
| 152482 | CEFBS_None, // VINSERTI32X8Zrri = 12749 |
| 152483 | CEFBS_None, // VINSERTI32X8Zrrik = 12750 |
| 152484 | CEFBS_None, // VINSERTI32X8Zrrikz = 12751 |
| 152485 | CEFBS_None, // VINSERTI64X2Z256rmi = 12752 |
| 152486 | CEFBS_None, // VINSERTI64X2Z256rmik = 12753 |
| 152487 | CEFBS_None, // VINSERTI64X2Z256rmikz = 12754 |
| 152488 | CEFBS_None, // VINSERTI64X2Z256rri = 12755 |
| 152489 | CEFBS_None, // VINSERTI64X2Z256rrik = 12756 |
| 152490 | CEFBS_None, // VINSERTI64X2Z256rrikz = 12757 |
| 152491 | CEFBS_None, // VINSERTI64X2Zrmi = 12758 |
| 152492 | CEFBS_None, // VINSERTI64X2Zrmik = 12759 |
| 152493 | CEFBS_None, // VINSERTI64X2Zrmikz = 12760 |
| 152494 | CEFBS_None, // VINSERTI64X2Zrri = 12761 |
| 152495 | CEFBS_None, // VINSERTI64X2Zrrik = 12762 |
| 152496 | CEFBS_None, // VINSERTI64X2Zrrikz = 12763 |
| 152497 | CEFBS_None, // VINSERTI64X4Zrmi = 12764 |
| 152498 | CEFBS_None, // VINSERTI64X4Zrmik = 12765 |
| 152499 | CEFBS_None, // VINSERTI64X4Zrmikz = 12766 |
| 152500 | CEFBS_None, // VINSERTI64X4Zrri = 12767 |
| 152501 | CEFBS_None, // VINSERTI64X4Zrrik = 12768 |
| 152502 | CEFBS_None, // VINSERTI64X4Zrrikz = 12769 |
| 152503 | CEFBS_None, // VINSERTPSZrmi = 12770 |
| 152504 | CEFBS_None, // VINSERTPSZrri = 12771 |
| 152505 | CEFBS_None, // VINSERTPSrmi = 12772 |
| 152506 | CEFBS_None, // VINSERTPSrri = 12773 |
| 152507 | CEFBS_None, // VLDDQUYrm = 12774 |
| 152508 | CEFBS_None, // VLDDQUrm = 12775 |
| 152509 | CEFBS_None, // VLDMXCSR = 12776 |
| 152510 | CEFBS_None, // VMASKMOVDQU = 12777 |
| 152511 | CEFBS_In64BitMode, // VMASKMOVDQU64 = 12778 |
| 152512 | CEFBS_None, // VMASKMOVPDYmr = 12779 |
| 152513 | CEFBS_None, // VMASKMOVPDYrm = 12780 |
| 152514 | CEFBS_None, // VMASKMOVPDmr = 12781 |
| 152515 | CEFBS_None, // VMASKMOVPDrm = 12782 |
| 152516 | CEFBS_None, // VMASKMOVPSYmr = 12783 |
| 152517 | CEFBS_None, // VMASKMOVPSYrm = 12784 |
| 152518 | CEFBS_None, // VMASKMOVPSmr = 12785 |
| 152519 | CEFBS_None, // VMASKMOVPSrm = 12786 |
| 152520 | CEFBS_None, // VMAXBF16Z128rm = 12787 |
| 152521 | CEFBS_None, // VMAXBF16Z128rmb = 12788 |
| 152522 | CEFBS_None, // VMAXBF16Z128rmbk = 12789 |
| 152523 | CEFBS_None, // VMAXBF16Z128rmbkz = 12790 |
| 152524 | CEFBS_None, // VMAXBF16Z128rmk = 12791 |
| 152525 | CEFBS_None, // VMAXBF16Z128rmkz = 12792 |
| 152526 | CEFBS_None, // VMAXBF16Z128rr = 12793 |
| 152527 | CEFBS_None, // VMAXBF16Z128rrk = 12794 |
| 152528 | CEFBS_None, // VMAXBF16Z128rrkz = 12795 |
| 152529 | CEFBS_None, // VMAXBF16Z256rm = 12796 |
| 152530 | CEFBS_None, // VMAXBF16Z256rmb = 12797 |
| 152531 | CEFBS_None, // VMAXBF16Z256rmbk = 12798 |
| 152532 | CEFBS_None, // VMAXBF16Z256rmbkz = 12799 |
| 152533 | CEFBS_None, // VMAXBF16Z256rmk = 12800 |
| 152534 | CEFBS_None, // VMAXBF16Z256rmkz = 12801 |
| 152535 | CEFBS_None, // VMAXBF16Z256rr = 12802 |
| 152536 | CEFBS_None, // VMAXBF16Z256rrk = 12803 |
| 152537 | CEFBS_None, // VMAXBF16Z256rrkz = 12804 |
| 152538 | CEFBS_None, // VMAXBF16Zrm = 12805 |
| 152539 | CEFBS_None, // VMAXBF16Zrmb = 12806 |
| 152540 | CEFBS_None, // VMAXBF16Zrmbk = 12807 |
| 152541 | CEFBS_None, // VMAXBF16Zrmbkz = 12808 |
| 152542 | CEFBS_None, // VMAXBF16Zrmk = 12809 |
| 152543 | CEFBS_None, // VMAXBF16Zrmkz = 12810 |
| 152544 | CEFBS_None, // VMAXBF16Zrr = 12811 |
| 152545 | CEFBS_None, // VMAXBF16Zrrk = 12812 |
| 152546 | CEFBS_None, // VMAXBF16Zrrkz = 12813 |
| 152547 | CEFBS_None, // VMAXCPDYrm = 12814 |
| 152548 | CEFBS_None, // VMAXCPDYrr = 12815 |
| 152549 | CEFBS_None, // VMAXCPDZ128rm = 12816 |
| 152550 | CEFBS_None, // VMAXCPDZ128rmb = 12817 |
| 152551 | CEFBS_None, // VMAXCPDZ128rmbk = 12818 |
| 152552 | CEFBS_None, // VMAXCPDZ128rmbkz = 12819 |
| 152553 | CEFBS_None, // VMAXCPDZ128rmk = 12820 |
| 152554 | CEFBS_None, // VMAXCPDZ128rmkz = 12821 |
| 152555 | CEFBS_None, // VMAXCPDZ128rr = 12822 |
| 152556 | CEFBS_None, // VMAXCPDZ128rrk = 12823 |
| 152557 | CEFBS_None, // VMAXCPDZ128rrkz = 12824 |
| 152558 | CEFBS_None, // VMAXCPDZ256rm = 12825 |
| 152559 | CEFBS_None, // VMAXCPDZ256rmb = 12826 |
| 152560 | CEFBS_None, // VMAXCPDZ256rmbk = 12827 |
| 152561 | CEFBS_None, // VMAXCPDZ256rmbkz = 12828 |
| 152562 | CEFBS_None, // VMAXCPDZ256rmk = 12829 |
| 152563 | CEFBS_None, // VMAXCPDZ256rmkz = 12830 |
| 152564 | CEFBS_None, // VMAXCPDZ256rr = 12831 |
| 152565 | CEFBS_None, // VMAXCPDZ256rrk = 12832 |
| 152566 | CEFBS_None, // VMAXCPDZ256rrkz = 12833 |
| 152567 | CEFBS_None, // VMAXCPDZrm = 12834 |
| 152568 | CEFBS_None, // VMAXCPDZrmb = 12835 |
| 152569 | CEFBS_None, // VMAXCPDZrmbk = 12836 |
| 152570 | CEFBS_None, // VMAXCPDZrmbkz = 12837 |
| 152571 | CEFBS_None, // VMAXCPDZrmk = 12838 |
| 152572 | CEFBS_None, // VMAXCPDZrmkz = 12839 |
| 152573 | CEFBS_None, // VMAXCPDZrr = 12840 |
| 152574 | CEFBS_None, // VMAXCPDZrrk = 12841 |
| 152575 | CEFBS_None, // VMAXCPDZrrkz = 12842 |
| 152576 | CEFBS_None, // VMAXCPDrm = 12843 |
| 152577 | CEFBS_None, // VMAXCPDrr = 12844 |
| 152578 | CEFBS_None, // VMAXCPHZ128rm = 12845 |
| 152579 | CEFBS_None, // VMAXCPHZ128rmb = 12846 |
| 152580 | CEFBS_None, // VMAXCPHZ128rmbk = 12847 |
| 152581 | CEFBS_None, // VMAXCPHZ128rmbkz = 12848 |
| 152582 | CEFBS_None, // VMAXCPHZ128rmk = 12849 |
| 152583 | CEFBS_None, // VMAXCPHZ128rmkz = 12850 |
| 152584 | CEFBS_None, // VMAXCPHZ128rr = 12851 |
| 152585 | CEFBS_None, // VMAXCPHZ128rrk = 12852 |
| 152586 | CEFBS_None, // VMAXCPHZ128rrkz = 12853 |
| 152587 | CEFBS_None, // VMAXCPHZ256rm = 12854 |
| 152588 | CEFBS_None, // VMAXCPHZ256rmb = 12855 |
| 152589 | CEFBS_None, // VMAXCPHZ256rmbk = 12856 |
| 152590 | CEFBS_None, // VMAXCPHZ256rmbkz = 12857 |
| 152591 | CEFBS_None, // VMAXCPHZ256rmk = 12858 |
| 152592 | CEFBS_None, // VMAXCPHZ256rmkz = 12859 |
| 152593 | CEFBS_None, // VMAXCPHZ256rr = 12860 |
| 152594 | CEFBS_None, // VMAXCPHZ256rrk = 12861 |
| 152595 | CEFBS_None, // VMAXCPHZ256rrkz = 12862 |
| 152596 | CEFBS_None, // VMAXCPHZrm = 12863 |
| 152597 | CEFBS_None, // VMAXCPHZrmb = 12864 |
| 152598 | CEFBS_None, // VMAXCPHZrmbk = 12865 |
| 152599 | CEFBS_None, // VMAXCPHZrmbkz = 12866 |
| 152600 | CEFBS_None, // VMAXCPHZrmk = 12867 |
| 152601 | CEFBS_None, // VMAXCPHZrmkz = 12868 |
| 152602 | CEFBS_None, // VMAXCPHZrr = 12869 |
| 152603 | CEFBS_None, // VMAXCPHZrrk = 12870 |
| 152604 | CEFBS_None, // VMAXCPHZrrkz = 12871 |
| 152605 | CEFBS_None, // VMAXCPSYrm = 12872 |
| 152606 | CEFBS_None, // VMAXCPSYrr = 12873 |
| 152607 | CEFBS_None, // VMAXCPSZ128rm = 12874 |
| 152608 | CEFBS_None, // VMAXCPSZ128rmb = 12875 |
| 152609 | CEFBS_None, // VMAXCPSZ128rmbk = 12876 |
| 152610 | CEFBS_None, // VMAXCPSZ128rmbkz = 12877 |
| 152611 | CEFBS_None, // VMAXCPSZ128rmk = 12878 |
| 152612 | CEFBS_None, // VMAXCPSZ128rmkz = 12879 |
| 152613 | CEFBS_None, // VMAXCPSZ128rr = 12880 |
| 152614 | CEFBS_None, // VMAXCPSZ128rrk = 12881 |
| 152615 | CEFBS_None, // VMAXCPSZ128rrkz = 12882 |
| 152616 | CEFBS_None, // VMAXCPSZ256rm = 12883 |
| 152617 | CEFBS_None, // VMAXCPSZ256rmb = 12884 |
| 152618 | CEFBS_None, // VMAXCPSZ256rmbk = 12885 |
| 152619 | CEFBS_None, // VMAXCPSZ256rmbkz = 12886 |
| 152620 | CEFBS_None, // VMAXCPSZ256rmk = 12887 |
| 152621 | CEFBS_None, // VMAXCPSZ256rmkz = 12888 |
| 152622 | CEFBS_None, // VMAXCPSZ256rr = 12889 |
| 152623 | CEFBS_None, // VMAXCPSZ256rrk = 12890 |
| 152624 | CEFBS_None, // VMAXCPSZ256rrkz = 12891 |
| 152625 | CEFBS_None, // VMAXCPSZrm = 12892 |
| 152626 | CEFBS_None, // VMAXCPSZrmb = 12893 |
| 152627 | CEFBS_None, // VMAXCPSZrmbk = 12894 |
| 152628 | CEFBS_None, // VMAXCPSZrmbkz = 12895 |
| 152629 | CEFBS_None, // VMAXCPSZrmk = 12896 |
| 152630 | CEFBS_None, // VMAXCPSZrmkz = 12897 |
| 152631 | CEFBS_None, // VMAXCPSZrr = 12898 |
| 152632 | CEFBS_None, // VMAXCPSZrrk = 12899 |
| 152633 | CEFBS_None, // VMAXCPSZrrkz = 12900 |
| 152634 | CEFBS_None, // VMAXCPSrm = 12901 |
| 152635 | CEFBS_None, // VMAXCPSrr = 12902 |
| 152636 | CEFBS_None, // VMAXCSDZrm = 12903 |
| 152637 | CEFBS_None, // VMAXCSDZrr = 12904 |
| 152638 | CEFBS_None, // VMAXCSDrm = 12905 |
| 152639 | CEFBS_None, // VMAXCSDrr = 12906 |
| 152640 | CEFBS_None, // VMAXCSHZrm = 12907 |
| 152641 | CEFBS_None, // VMAXCSHZrr = 12908 |
| 152642 | CEFBS_None, // VMAXCSSZrm = 12909 |
| 152643 | CEFBS_None, // VMAXCSSZrr = 12910 |
| 152644 | CEFBS_None, // VMAXCSSrm = 12911 |
| 152645 | CEFBS_None, // VMAXCSSrr = 12912 |
| 152646 | CEFBS_None, // VMAXPDYrm = 12913 |
| 152647 | CEFBS_None, // VMAXPDYrr = 12914 |
| 152648 | CEFBS_None, // VMAXPDZ128rm = 12915 |
| 152649 | CEFBS_None, // VMAXPDZ128rmb = 12916 |
| 152650 | CEFBS_None, // VMAXPDZ128rmbk = 12917 |
| 152651 | CEFBS_None, // VMAXPDZ128rmbkz = 12918 |
| 152652 | CEFBS_None, // VMAXPDZ128rmk = 12919 |
| 152653 | CEFBS_None, // VMAXPDZ128rmkz = 12920 |
| 152654 | CEFBS_None, // VMAXPDZ128rr = 12921 |
| 152655 | CEFBS_None, // VMAXPDZ128rrk = 12922 |
| 152656 | CEFBS_None, // VMAXPDZ128rrkz = 12923 |
| 152657 | CEFBS_None, // VMAXPDZ256rm = 12924 |
| 152658 | CEFBS_None, // VMAXPDZ256rmb = 12925 |
| 152659 | CEFBS_None, // VMAXPDZ256rmbk = 12926 |
| 152660 | CEFBS_None, // VMAXPDZ256rmbkz = 12927 |
| 152661 | CEFBS_None, // VMAXPDZ256rmk = 12928 |
| 152662 | CEFBS_None, // VMAXPDZ256rmkz = 12929 |
| 152663 | CEFBS_None, // VMAXPDZ256rr = 12930 |
| 152664 | CEFBS_None, // VMAXPDZ256rrk = 12931 |
| 152665 | CEFBS_None, // VMAXPDZ256rrkz = 12932 |
| 152666 | CEFBS_None, // VMAXPDZrm = 12933 |
| 152667 | CEFBS_None, // VMAXPDZrmb = 12934 |
| 152668 | CEFBS_None, // VMAXPDZrmbk = 12935 |
| 152669 | CEFBS_None, // VMAXPDZrmbkz = 12936 |
| 152670 | CEFBS_None, // VMAXPDZrmk = 12937 |
| 152671 | CEFBS_None, // VMAXPDZrmkz = 12938 |
| 152672 | CEFBS_None, // VMAXPDZrr = 12939 |
| 152673 | CEFBS_None, // VMAXPDZrrb = 12940 |
| 152674 | CEFBS_None, // VMAXPDZrrbk = 12941 |
| 152675 | CEFBS_None, // VMAXPDZrrbkz = 12942 |
| 152676 | CEFBS_None, // VMAXPDZrrk = 12943 |
| 152677 | CEFBS_None, // VMAXPDZrrkz = 12944 |
| 152678 | CEFBS_None, // VMAXPDrm = 12945 |
| 152679 | CEFBS_None, // VMAXPDrr = 12946 |
| 152680 | CEFBS_None, // VMAXPHZ128rm = 12947 |
| 152681 | CEFBS_None, // VMAXPHZ128rmb = 12948 |
| 152682 | CEFBS_None, // VMAXPHZ128rmbk = 12949 |
| 152683 | CEFBS_None, // VMAXPHZ128rmbkz = 12950 |
| 152684 | CEFBS_None, // VMAXPHZ128rmk = 12951 |
| 152685 | CEFBS_None, // VMAXPHZ128rmkz = 12952 |
| 152686 | CEFBS_None, // VMAXPHZ128rr = 12953 |
| 152687 | CEFBS_None, // VMAXPHZ128rrk = 12954 |
| 152688 | CEFBS_None, // VMAXPHZ128rrkz = 12955 |
| 152689 | CEFBS_None, // VMAXPHZ256rm = 12956 |
| 152690 | CEFBS_None, // VMAXPHZ256rmb = 12957 |
| 152691 | CEFBS_None, // VMAXPHZ256rmbk = 12958 |
| 152692 | CEFBS_None, // VMAXPHZ256rmbkz = 12959 |
| 152693 | CEFBS_None, // VMAXPHZ256rmk = 12960 |
| 152694 | CEFBS_None, // VMAXPHZ256rmkz = 12961 |
| 152695 | CEFBS_None, // VMAXPHZ256rr = 12962 |
| 152696 | CEFBS_None, // VMAXPHZ256rrk = 12963 |
| 152697 | CEFBS_None, // VMAXPHZ256rrkz = 12964 |
| 152698 | CEFBS_None, // VMAXPHZrm = 12965 |
| 152699 | CEFBS_None, // VMAXPHZrmb = 12966 |
| 152700 | CEFBS_None, // VMAXPHZrmbk = 12967 |
| 152701 | CEFBS_None, // VMAXPHZrmbkz = 12968 |
| 152702 | CEFBS_None, // VMAXPHZrmk = 12969 |
| 152703 | CEFBS_None, // VMAXPHZrmkz = 12970 |
| 152704 | CEFBS_None, // VMAXPHZrr = 12971 |
| 152705 | CEFBS_None, // VMAXPHZrrb = 12972 |
| 152706 | CEFBS_None, // VMAXPHZrrbk = 12973 |
| 152707 | CEFBS_None, // VMAXPHZrrbkz = 12974 |
| 152708 | CEFBS_None, // VMAXPHZrrk = 12975 |
| 152709 | CEFBS_None, // VMAXPHZrrkz = 12976 |
| 152710 | CEFBS_None, // VMAXPSYrm = 12977 |
| 152711 | CEFBS_None, // VMAXPSYrr = 12978 |
| 152712 | CEFBS_None, // VMAXPSZ128rm = 12979 |
| 152713 | CEFBS_None, // VMAXPSZ128rmb = 12980 |
| 152714 | CEFBS_None, // VMAXPSZ128rmbk = 12981 |
| 152715 | CEFBS_None, // VMAXPSZ128rmbkz = 12982 |
| 152716 | CEFBS_None, // VMAXPSZ128rmk = 12983 |
| 152717 | CEFBS_None, // VMAXPSZ128rmkz = 12984 |
| 152718 | CEFBS_None, // VMAXPSZ128rr = 12985 |
| 152719 | CEFBS_None, // VMAXPSZ128rrk = 12986 |
| 152720 | CEFBS_None, // VMAXPSZ128rrkz = 12987 |
| 152721 | CEFBS_None, // VMAXPSZ256rm = 12988 |
| 152722 | CEFBS_None, // VMAXPSZ256rmb = 12989 |
| 152723 | CEFBS_None, // VMAXPSZ256rmbk = 12990 |
| 152724 | CEFBS_None, // VMAXPSZ256rmbkz = 12991 |
| 152725 | CEFBS_None, // VMAXPSZ256rmk = 12992 |
| 152726 | CEFBS_None, // VMAXPSZ256rmkz = 12993 |
| 152727 | CEFBS_None, // VMAXPSZ256rr = 12994 |
| 152728 | CEFBS_None, // VMAXPSZ256rrk = 12995 |
| 152729 | CEFBS_None, // VMAXPSZ256rrkz = 12996 |
| 152730 | CEFBS_None, // VMAXPSZrm = 12997 |
| 152731 | CEFBS_None, // VMAXPSZrmb = 12998 |
| 152732 | CEFBS_None, // VMAXPSZrmbk = 12999 |
| 152733 | CEFBS_None, // VMAXPSZrmbkz = 13000 |
| 152734 | CEFBS_None, // VMAXPSZrmk = 13001 |
| 152735 | CEFBS_None, // VMAXPSZrmkz = 13002 |
| 152736 | CEFBS_None, // VMAXPSZrr = 13003 |
| 152737 | CEFBS_None, // VMAXPSZrrb = 13004 |
| 152738 | CEFBS_None, // VMAXPSZrrbk = 13005 |
| 152739 | CEFBS_None, // VMAXPSZrrbkz = 13006 |
| 152740 | CEFBS_None, // VMAXPSZrrk = 13007 |
| 152741 | CEFBS_None, // VMAXPSZrrkz = 13008 |
| 152742 | CEFBS_None, // VMAXPSrm = 13009 |
| 152743 | CEFBS_None, // VMAXPSrr = 13010 |
| 152744 | CEFBS_None, // VMAXSDZrm = 13011 |
| 152745 | CEFBS_None, // VMAXSDZrm_Int = 13012 |
| 152746 | CEFBS_None, // VMAXSDZrmk_Int = 13013 |
| 152747 | CEFBS_None, // VMAXSDZrmkz_Int = 13014 |
| 152748 | CEFBS_None, // VMAXSDZrr = 13015 |
| 152749 | CEFBS_None, // VMAXSDZrr_Int = 13016 |
| 152750 | CEFBS_None, // VMAXSDZrrb_Int = 13017 |
| 152751 | CEFBS_None, // VMAXSDZrrbk_Int = 13018 |
| 152752 | CEFBS_None, // VMAXSDZrrbkz_Int = 13019 |
| 152753 | CEFBS_None, // VMAXSDZrrk_Int = 13020 |
| 152754 | CEFBS_None, // VMAXSDZrrkz_Int = 13021 |
| 152755 | CEFBS_None, // VMAXSDrm = 13022 |
| 152756 | CEFBS_None, // VMAXSDrm_Int = 13023 |
| 152757 | CEFBS_None, // VMAXSDrr = 13024 |
| 152758 | CEFBS_None, // VMAXSDrr_Int = 13025 |
| 152759 | CEFBS_None, // VMAXSHZrm = 13026 |
| 152760 | CEFBS_None, // VMAXSHZrm_Int = 13027 |
| 152761 | CEFBS_None, // VMAXSHZrmk_Int = 13028 |
| 152762 | CEFBS_None, // VMAXSHZrmkz_Int = 13029 |
| 152763 | CEFBS_None, // VMAXSHZrr = 13030 |
| 152764 | CEFBS_None, // VMAXSHZrr_Int = 13031 |
| 152765 | CEFBS_None, // VMAXSHZrrb_Int = 13032 |
| 152766 | CEFBS_None, // VMAXSHZrrbk_Int = 13033 |
| 152767 | CEFBS_None, // VMAXSHZrrbkz_Int = 13034 |
| 152768 | CEFBS_None, // VMAXSHZrrk_Int = 13035 |
| 152769 | CEFBS_None, // VMAXSHZrrkz_Int = 13036 |
| 152770 | CEFBS_None, // VMAXSSZrm = 13037 |
| 152771 | CEFBS_None, // VMAXSSZrm_Int = 13038 |
| 152772 | CEFBS_None, // VMAXSSZrmk_Int = 13039 |
| 152773 | CEFBS_None, // VMAXSSZrmkz_Int = 13040 |
| 152774 | CEFBS_None, // VMAXSSZrr = 13041 |
| 152775 | CEFBS_None, // VMAXSSZrr_Int = 13042 |
| 152776 | CEFBS_None, // VMAXSSZrrb_Int = 13043 |
| 152777 | CEFBS_None, // VMAXSSZrrbk_Int = 13044 |
| 152778 | CEFBS_None, // VMAXSSZrrbkz_Int = 13045 |
| 152779 | CEFBS_None, // VMAXSSZrrk_Int = 13046 |
| 152780 | CEFBS_None, // VMAXSSZrrkz_Int = 13047 |
| 152781 | CEFBS_None, // VMAXSSrm = 13048 |
| 152782 | CEFBS_None, // VMAXSSrm_Int = 13049 |
| 152783 | CEFBS_None, // VMAXSSrr = 13050 |
| 152784 | CEFBS_None, // VMAXSSrr_Int = 13051 |
| 152785 | CEFBS_None, // VMCALL = 13052 |
| 152786 | CEFBS_None, // VMCLEARm = 13053 |
| 152787 | CEFBS_None, // VMFUNC = 13054 |
| 152788 | CEFBS_None, // VMINBF16Z128rm = 13055 |
| 152789 | CEFBS_None, // VMINBF16Z128rmb = 13056 |
| 152790 | CEFBS_None, // VMINBF16Z128rmbk = 13057 |
| 152791 | CEFBS_None, // VMINBF16Z128rmbkz = 13058 |
| 152792 | CEFBS_None, // VMINBF16Z128rmk = 13059 |
| 152793 | CEFBS_None, // VMINBF16Z128rmkz = 13060 |
| 152794 | CEFBS_None, // VMINBF16Z128rr = 13061 |
| 152795 | CEFBS_None, // VMINBF16Z128rrk = 13062 |
| 152796 | CEFBS_None, // VMINBF16Z128rrkz = 13063 |
| 152797 | CEFBS_None, // VMINBF16Z256rm = 13064 |
| 152798 | CEFBS_None, // VMINBF16Z256rmb = 13065 |
| 152799 | CEFBS_None, // VMINBF16Z256rmbk = 13066 |
| 152800 | CEFBS_None, // VMINBF16Z256rmbkz = 13067 |
| 152801 | CEFBS_None, // VMINBF16Z256rmk = 13068 |
| 152802 | CEFBS_None, // VMINBF16Z256rmkz = 13069 |
| 152803 | CEFBS_None, // VMINBF16Z256rr = 13070 |
| 152804 | CEFBS_None, // VMINBF16Z256rrk = 13071 |
| 152805 | CEFBS_None, // VMINBF16Z256rrkz = 13072 |
| 152806 | CEFBS_None, // VMINBF16Zrm = 13073 |
| 152807 | CEFBS_None, // VMINBF16Zrmb = 13074 |
| 152808 | CEFBS_None, // VMINBF16Zrmbk = 13075 |
| 152809 | CEFBS_None, // VMINBF16Zrmbkz = 13076 |
| 152810 | CEFBS_None, // VMINBF16Zrmk = 13077 |
| 152811 | CEFBS_None, // VMINBF16Zrmkz = 13078 |
| 152812 | CEFBS_None, // VMINBF16Zrr = 13079 |
| 152813 | CEFBS_None, // VMINBF16Zrrk = 13080 |
| 152814 | CEFBS_None, // VMINBF16Zrrkz = 13081 |
| 152815 | CEFBS_None, // VMINCPDYrm = 13082 |
| 152816 | CEFBS_None, // VMINCPDYrr = 13083 |
| 152817 | CEFBS_None, // VMINCPDZ128rm = 13084 |
| 152818 | CEFBS_None, // VMINCPDZ128rmb = 13085 |
| 152819 | CEFBS_None, // VMINCPDZ128rmbk = 13086 |
| 152820 | CEFBS_None, // VMINCPDZ128rmbkz = 13087 |
| 152821 | CEFBS_None, // VMINCPDZ128rmk = 13088 |
| 152822 | CEFBS_None, // VMINCPDZ128rmkz = 13089 |
| 152823 | CEFBS_None, // VMINCPDZ128rr = 13090 |
| 152824 | CEFBS_None, // VMINCPDZ128rrk = 13091 |
| 152825 | CEFBS_None, // VMINCPDZ128rrkz = 13092 |
| 152826 | CEFBS_None, // VMINCPDZ256rm = 13093 |
| 152827 | CEFBS_None, // VMINCPDZ256rmb = 13094 |
| 152828 | CEFBS_None, // VMINCPDZ256rmbk = 13095 |
| 152829 | CEFBS_None, // VMINCPDZ256rmbkz = 13096 |
| 152830 | CEFBS_None, // VMINCPDZ256rmk = 13097 |
| 152831 | CEFBS_None, // VMINCPDZ256rmkz = 13098 |
| 152832 | CEFBS_None, // VMINCPDZ256rr = 13099 |
| 152833 | CEFBS_None, // VMINCPDZ256rrk = 13100 |
| 152834 | CEFBS_None, // VMINCPDZ256rrkz = 13101 |
| 152835 | CEFBS_None, // VMINCPDZrm = 13102 |
| 152836 | CEFBS_None, // VMINCPDZrmb = 13103 |
| 152837 | CEFBS_None, // VMINCPDZrmbk = 13104 |
| 152838 | CEFBS_None, // VMINCPDZrmbkz = 13105 |
| 152839 | CEFBS_None, // VMINCPDZrmk = 13106 |
| 152840 | CEFBS_None, // VMINCPDZrmkz = 13107 |
| 152841 | CEFBS_None, // VMINCPDZrr = 13108 |
| 152842 | CEFBS_None, // VMINCPDZrrk = 13109 |
| 152843 | CEFBS_None, // VMINCPDZrrkz = 13110 |
| 152844 | CEFBS_None, // VMINCPDrm = 13111 |
| 152845 | CEFBS_None, // VMINCPDrr = 13112 |
| 152846 | CEFBS_None, // VMINCPHZ128rm = 13113 |
| 152847 | CEFBS_None, // VMINCPHZ128rmb = 13114 |
| 152848 | CEFBS_None, // VMINCPHZ128rmbk = 13115 |
| 152849 | CEFBS_None, // VMINCPHZ128rmbkz = 13116 |
| 152850 | CEFBS_None, // VMINCPHZ128rmk = 13117 |
| 152851 | CEFBS_None, // VMINCPHZ128rmkz = 13118 |
| 152852 | CEFBS_None, // VMINCPHZ128rr = 13119 |
| 152853 | CEFBS_None, // VMINCPHZ128rrk = 13120 |
| 152854 | CEFBS_None, // VMINCPHZ128rrkz = 13121 |
| 152855 | CEFBS_None, // VMINCPHZ256rm = 13122 |
| 152856 | CEFBS_None, // VMINCPHZ256rmb = 13123 |
| 152857 | CEFBS_None, // VMINCPHZ256rmbk = 13124 |
| 152858 | CEFBS_None, // VMINCPHZ256rmbkz = 13125 |
| 152859 | CEFBS_None, // VMINCPHZ256rmk = 13126 |
| 152860 | CEFBS_None, // VMINCPHZ256rmkz = 13127 |
| 152861 | CEFBS_None, // VMINCPHZ256rr = 13128 |
| 152862 | CEFBS_None, // VMINCPHZ256rrk = 13129 |
| 152863 | CEFBS_None, // VMINCPHZ256rrkz = 13130 |
| 152864 | CEFBS_None, // VMINCPHZrm = 13131 |
| 152865 | CEFBS_None, // VMINCPHZrmb = 13132 |
| 152866 | CEFBS_None, // VMINCPHZrmbk = 13133 |
| 152867 | CEFBS_None, // VMINCPHZrmbkz = 13134 |
| 152868 | CEFBS_None, // VMINCPHZrmk = 13135 |
| 152869 | CEFBS_None, // VMINCPHZrmkz = 13136 |
| 152870 | CEFBS_None, // VMINCPHZrr = 13137 |
| 152871 | CEFBS_None, // VMINCPHZrrk = 13138 |
| 152872 | CEFBS_None, // VMINCPHZrrkz = 13139 |
| 152873 | CEFBS_None, // VMINCPSYrm = 13140 |
| 152874 | CEFBS_None, // VMINCPSYrr = 13141 |
| 152875 | CEFBS_None, // VMINCPSZ128rm = 13142 |
| 152876 | CEFBS_None, // VMINCPSZ128rmb = 13143 |
| 152877 | CEFBS_None, // VMINCPSZ128rmbk = 13144 |
| 152878 | CEFBS_None, // VMINCPSZ128rmbkz = 13145 |
| 152879 | CEFBS_None, // VMINCPSZ128rmk = 13146 |
| 152880 | CEFBS_None, // VMINCPSZ128rmkz = 13147 |
| 152881 | CEFBS_None, // VMINCPSZ128rr = 13148 |
| 152882 | CEFBS_None, // VMINCPSZ128rrk = 13149 |
| 152883 | CEFBS_None, // VMINCPSZ128rrkz = 13150 |
| 152884 | CEFBS_None, // VMINCPSZ256rm = 13151 |
| 152885 | CEFBS_None, // VMINCPSZ256rmb = 13152 |
| 152886 | CEFBS_None, // VMINCPSZ256rmbk = 13153 |
| 152887 | CEFBS_None, // VMINCPSZ256rmbkz = 13154 |
| 152888 | CEFBS_None, // VMINCPSZ256rmk = 13155 |
| 152889 | CEFBS_None, // VMINCPSZ256rmkz = 13156 |
| 152890 | CEFBS_None, // VMINCPSZ256rr = 13157 |
| 152891 | CEFBS_None, // VMINCPSZ256rrk = 13158 |
| 152892 | CEFBS_None, // VMINCPSZ256rrkz = 13159 |
| 152893 | CEFBS_None, // VMINCPSZrm = 13160 |
| 152894 | CEFBS_None, // VMINCPSZrmb = 13161 |
| 152895 | CEFBS_None, // VMINCPSZrmbk = 13162 |
| 152896 | CEFBS_None, // VMINCPSZrmbkz = 13163 |
| 152897 | CEFBS_None, // VMINCPSZrmk = 13164 |
| 152898 | CEFBS_None, // VMINCPSZrmkz = 13165 |
| 152899 | CEFBS_None, // VMINCPSZrr = 13166 |
| 152900 | CEFBS_None, // VMINCPSZrrk = 13167 |
| 152901 | CEFBS_None, // VMINCPSZrrkz = 13168 |
| 152902 | CEFBS_None, // VMINCPSrm = 13169 |
| 152903 | CEFBS_None, // VMINCPSrr = 13170 |
| 152904 | CEFBS_None, // VMINCSDZrm = 13171 |
| 152905 | CEFBS_None, // VMINCSDZrr = 13172 |
| 152906 | CEFBS_None, // VMINCSDrm = 13173 |
| 152907 | CEFBS_None, // VMINCSDrr = 13174 |
| 152908 | CEFBS_None, // VMINCSHZrm = 13175 |
| 152909 | CEFBS_None, // VMINCSHZrr = 13176 |
| 152910 | CEFBS_None, // VMINCSSZrm = 13177 |
| 152911 | CEFBS_None, // VMINCSSZrr = 13178 |
| 152912 | CEFBS_None, // VMINCSSrm = 13179 |
| 152913 | CEFBS_None, // VMINCSSrr = 13180 |
| 152914 | CEFBS_None, // VMINMAXBF16Z128rmbi = 13181 |
| 152915 | CEFBS_None, // VMINMAXBF16Z128rmbik = 13182 |
| 152916 | CEFBS_None, // VMINMAXBF16Z128rmbikz = 13183 |
| 152917 | CEFBS_None, // VMINMAXBF16Z128rmi = 13184 |
| 152918 | CEFBS_None, // VMINMAXBF16Z128rmik = 13185 |
| 152919 | CEFBS_None, // VMINMAXBF16Z128rmikz = 13186 |
| 152920 | CEFBS_None, // VMINMAXBF16Z128rri = 13187 |
| 152921 | CEFBS_None, // VMINMAXBF16Z128rrik = 13188 |
| 152922 | CEFBS_None, // VMINMAXBF16Z128rrikz = 13189 |
| 152923 | CEFBS_None, // VMINMAXBF16Z256rmbi = 13190 |
| 152924 | CEFBS_None, // VMINMAXBF16Z256rmbik = 13191 |
| 152925 | CEFBS_None, // VMINMAXBF16Z256rmbikz = 13192 |
| 152926 | CEFBS_None, // VMINMAXBF16Z256rmi = 13193 |
| 152927 | CEFBS_None, // VMINMAXBF16Z256rmik = 13194 |
| 152928 | CEFBS_None, // VMINMAXBF16Z256rmikz = 13195 |
| 152929 | CEFBS_None, // VMINMAXBF16Z256rri = 13196 |
| 152930 | CEFBS_None, // VMINMAXBF16Z256rrik = 13197 |
| 152931 | CEFBS_None, // VMINMAXBF16Z256rrikz = 13198 |
| 152932 | CEFBS_None, // VMINMAXBF16Zrmbi = 13199 |
| 152933 | CEFBS_None, // VMINMAXBF16Zrmbik = 13200 |
| 152934 | CEFBS_None, // VMINMAXBF16Zrmbikz = 13201 |
| 152935 | CEFBS_None, // VMINMAXBF16Zrmi = 13202 |
| 152936 | CEFBS_None, // VMINMAXBF16Zrmik = 13203 |
| 152937 | CEFBS_None, // VMINMAXBF16Zrmikz = 13204 |
| 152938 | CEFBS_None, // VMINMAXBF16Zrri = 13205 |
| 152939 | CEFBS_None, // VMINMAXBF16Zrrik = 13206 |
| 152940 | CEFBS_None, // VMINMAXBF16Zrrikz = 13207 |
| 152941 | CEFBS_None, // VMINMAXPDZ128rmbi = 13208 |
| 152942 | CEFBS_None, // VMINMAXPDZ128rmbik = 13209 |
| 152943 | CEFBS_None, // VMINMAXPDZ128rmbikz = 13210 |
| 152944 | CEFBS_None, // VMINMAXPDZ128rmi = 13211 |
| 152945 | CEFBS_None, // VMINMAXPDZ128rmik = 13212 |
| 152946 | CEFBS_None, // VMINMAXPDZ128rmikz = 13213 |
| 152947 | CEFBS_None, // VMINMAXPDZ128rri = 13214 |
| 152948 | CEFBS_None, // VMINMAXPDZ128rrik = 13215 |
| 152949 | CEFBS_None, // VMINMAXPDZ128rrikz = 13216 |
| 152950 | CEFBS_None, // VMINMAXPDZ256rmbi = 13217 |
| 152951 | CEFBS_None, // VMINMAXPDZ256rmbik = 13218 |
| 152952 | CEFBS_None, // VMINMAXPDZ256rmbikz = 13219 |
| 152953 | CEFBS_None, // VMINMAXPDZ256rmi = 13220 |
| 152954 | CEFBS_None, // VMINMAXPDZ256rmik = 13221 |
| 152955 | CEFBS_None, // VMINMAXPDZ256rmikz = 13222 |
| 152956 | CEFBS_None, // VMINMAXPDZ256rri = 13223 |
| 152957 | CEFBS_None, // VMINMAXPDZ256rrik = 13224 |
| 152958 | CEFBS_None, // VMINMAXPDZ256rrikz = 13225 |
| 152959 | CEFBS_None, // VMINMAXPDZrmbi = 13226 |
| 152960 | CEFBS_None, // VMINMAXPDZrmbik = 13227 |
| 152961 | CEFBS_None, // VMINMAXPDZrmbikz = 13228 |
| 152962 | CEFBS_None, // VMINMAXPDZrmi = 13229 |
| 152963 | CEFBS_None, // VMINMAXPDZrmik = 13230 |
| 152964 | CEFBS_None, // VMINMAXPDZrmikz = 13231 |
| 152965 | CEFBS_None, // VMINMAXPDZrri = 13232 |
| 152966 | CEFBS_None, // VMINMAXPDZrrib = 13233 |
| 152967 | CEFBS_None, // VMINMAXPDZrribk = 13234 |
| 152968 | CEFBS_None, // VMINMAXPDZrribkz = 13235 |
| 152969 | CEFBS_None, // VMINMAXPDZrrik = 13236 |
| 152970 | CEFBS_None, // VMINMAXPDZrrikz = 13237 |
| 152971 | CEFBS_None, // VMINMAXPHZ128rmbi = 13238 |
| 152972 | CEFBS_None, // VMINMAXPHZ128rmbik = 13239 |
| 152973 | CEFBS_None, // VMINMAXPHZ128rmbikz = 13240 |
| 152974 | CEFBS_None, // VMINMAXPHZ128rmi = 13241 |
| 152975 | CEFBS_None, // VMINMAXPHZ128rmik = 13242 |
| 152976 | CEFBS_None, // VMINMAXPHZ128rmikz = 13243 |
| 152977 | CEFBS_None, // VMINMAXPHZ128rri = 13244 |
| 152978 | CEFBS_None, // VMINMAXPHZ128rrik = 13245 |
| 152979 | CEFBS_None, // VMINMAXPHZ128rrikz = 13246 |
| 152980 | CEFBS_None, // VMINMAXPHZ256rmbi = 13247 |
| 152981 | CEFBS_None, // VMINMAXPHZ256rmbik = 13248 |
| 152982 | CEFBS_None, // VMINMAXPHZ256rmbikz = 13249 |
| 152983 | CEFBS_None, // VMINMAXPHZ256rmi = 13250 |
| 152984 | CEFBS_None, // VMINMAXPHZ256rmik = 13251 |
| 152985 | CEFBS_None, // VMINMAXPHZ256rmikz = 13252 |
| 152986 | CEFBS_None, // VMINMAXPHZ256rri = 13253 |
| 152987 | CEFBS_None, // VMINMAXPHZ256rrik = 13254 |
| 152988 | CEFBS_None, // VMINMAXPHZ256rrikz = 13255 |
| 152989 | CEFBS_None, // VMINMAXPHZrmbi = 13256 |
| 152990 | CEFBS_None, // VMINMAXPHZrmbik = 13257 |
| 152991 | CEFBS_None, // VMINMAXPHZrmbikz = 13258 |
| 152992 | CEFBS_None, // VMINMAXPHZrmi = 13259 |
| 152993 | CEFBS_None, // VMINMAXPHZrmik = 13260 |
| 152994 | CEFBS_None, // VMINMAXPHZrmikz = 13261 |
| 152995 | CEFBS_None, // VMINMAXPHZrri = 13262 |
| 152996 | CEFBS_None, // VMINMAXPHZrrib = 13263 |
| 152997 | CEFBS_None, // VMINMAXPHZrribk = 13264 |
| 152998 | CEFBS_None, // VMINMAXPHZrribkz = 13265 |
| 152999 | CEFBS_None, // VMINMAXPHZrrik = 13266 |
| 153000 | CEFBS_None, // VMINMAXPHZrrikz = 13267 |
| 153001 | CEFBS_None, // VMINMAXPSZ128rmbi = 13268 |
| 153002 | CEFBS_None, // VMINMAXPSZ128rmbik = 13269 |
| 153003 | CEFBS_None, // VMINMAXPSZ128rmbikz = 13270 |
| 153004 | CEFBS_None, // VMINMAXPSZ128rmi = 13271 |
| 153005 | CEFBS_None, // VMINMAXPSZ128rmik = 13272 |
| 153006 | CEFBS_None, // VMINMAXPSZ128rmikz = 13273 |
| 153007 | CEFBS_None, // VMINMAXPSZ128rri = 13274 |
| 153008 | CEFBS_None, // VMINMAXPSZ128rrik = 13275 |
| 153009 | CEFBS_None, // VMINMAXPSZ128rrikz = 13276 |
| 153010 | CEFBS_None, // VMINMAXPSZ256rmbi = 13277 |
| 153011 | CEFBS_None, // VMINMAXPSZ256rmbik = 13278 |
| 153012 | CEFBS_None, // VMINMAXPSZ256rmbikz = 13279 |
| 153013 | CEFBS_None, // VMINMAXPSZ256rmi = 13280 |
| 153014 | CEFBS_None, // VMINMAXPSZ256rmik = 13281 |
| 153015 | CEFBS_None, // VMINMAXPSZ256rmikz = 13282 |
| 153016 | CEFBS_None, // VMINMAXPSZ256rri = 13283 |
| 153017 | CEFBS_None, // VMINMAXPSZ256rrik = 13284 |
| 153018 | CEFBS_None, // VMINMAXPSZ256rrikz = 13285 |
| 153019 | CEFBS_None, // VMINMAXPSZrmbi = 13286 |
| 153020 | CEFBS_None, // VMINMAXPSZrmbik = 13287 |
| 153021 | CEFBS_None, // VMINMAXPSZrmbikz = 13288 |
| 153022 | CEFBS_None, // VMINMAXPSZrmi = 13289 |
| 153023 | CEFBS_None, // VMINMAXPSZrmik = 13290 |
| 153024 | CEFBS_None, // VMINMAXPSZrmikz = 13291 |
| 153025 | CEFBS_None, // VMINMAXPSZrri = 13292 |
| 153026 | CEFBS_None, // VMINMAXPSZrrib = 13293 |
| 153027 | CEFBS_None, // VMINMAXPSZrribk = 13294 |
| 153028 | CEFBS_None, // VMINMAXPSZrribkz = 13295 |
| 153029 | CEFBS_None, // VMINMAXPSZrrik = 13296 |
| 153030 | CEFBS_None, // VMINMAXPSZrrikz = 13297 |
| 153031 | CEFBS_None, // VMINMAXSDrmi = 13298 |
| 153032 | CEFBS_None, // VMINMAXSDrmi_Int = 13299 |
| 153033 | CEFBS_None, // VMINMAXSDrmik_Int = 13300 |
| 153034 | CEFBS_None, // VMINMAXSDrmikz_Int = 13301 |
| 153035 | CEFBS_None, // VMINMAXSDrri = 13302 |
| 153036 | CEFBS_None, // VMINMAXSDrri_Int = 13303 |
| 153037 | CEFBS_None, // VMINMAXSDrrib_Int = 13304 |
| 153038 | CEFBS_None, // VMINMAXSDrribk_Int = 13305 |
| 153039 | CEFBS_None, // VMINMAXSDrribkz_Int = 13306 |
| 153040 | CEFBS_None, // VMINMAXSDrrik_Int = 13307 |
| 153041 | CEFBS_None, // VMINMAXSDrrikz_Int = 13308 |
| 153042 | CEFBS_None, // VMINMAXSHrmi = 13309 |
| 153043 | CEFBS_None, // VMINMAXSHrmi_Int = 13310 |
| 153044 | CEFBS_None, // VMINMAXSHrmik_Int = 13311 |
| 153045 | CEFBS_None, // VMINMAXSHrmikz_Int = 13312 |
| 153046 | CEFBS_None, // VMINMAXSHrri = 13313 |
| 153047 | CEFBS_None, // VMINMAXSHrri_Int = 13314 |
| 153048 | CEFBS_None, // VMINMAXSHrrib_Int = 13315 |
| 153049 | CEFBS_None, // VMINMAXSHrribk_Int = 13316 |
| 153050 | CEFBS_None, // VMINMAXSHrribkz_Int = 13317 |
| 153051 | CEFBS_None, // VMINMAXSHrrik_Int = 13318 |
| 153052 | CEFBS_None, // VMINMAXSHrrikz_Int = 13319 |
| 153053 | CEFBS_None, // VMINMAXSSrmi = 13320 |
| 153054 | CEFBS_None, // VMINMAXSSrmi_Int = 13321 |
| 153055 | CEFBS_None, // VMINMAXSSrmik_Int = 13322 |
| 153056 | CEFBS_None, // VMINMAXSSrmikz_Int = 13323 |
| 153057 | CEFBS_None, // VMINMAXSSrri = 13324 |
| 153058 | CEFBS_None, // VMINMAXSSrri_Int = 13325 |
| 153059 | CEFBS_None, // VMINMAXSSrrib_Int = 13326 |
| 153060 | CEFBS_None, // VMINMAXSSrribk_Int = 13327 |
| 153061 | CEFBS_None, // VMINMAXSSrribkz_Int = 13328 |
| 153062 | CEFBS_None, // VMINMAXSSrrik_Int = 13329 |
| 153063 | CEFBS_None, // VMINMAXSSrrikz_Int = 13330 |
| 153064 | CEFBS_None, // VMINPDYrm = 13331 |
| 153065 | CEFBS_None, // VMINPDYrr = 13332 |
| 153066 | CEFBS_None, // VMINPDZ128rm = 13333 |
| 153067 | CEFBS_None, // VMINPDZ128rmb = 13334 |
| 153068 | CEFBS_None, // VMINPDZ128rmbk = 13335 |
| 153069 | CEFBS_None, // VMINPDZ128rmbkz = 13336 |
| 153070 | CEFBS_None, // VMINPDZ128rmk = 13337 |
| 153071 | CEFBS_None, // VMINPDZ128rmkz = 13338 |
| 153072 | CEFBS_None, // VMINPDZ128rr = 13339 |
| 153073 | CEFBS_None, // VMINPDZ128rrk = 13340 |
| 153074 | CEFBS_None, // VMINPDZ128rrkz = 13341 |
| 153075 | CEFBS_None, // VMINPDZ256rm = 13342 |
| 153076 | CEFBS_None, // VMINPDZ256rmb = 13343 |
| 153077 | CEFBS_None, // VMINPDZ256rmbk = 13344 |
| 153078 | CEFBS_None, // VMINPDZ256rmbkz = 13345 |
| 153079 | CEFBS_None, // VMINPDZ256rmk = 13346 |
| 153080 | CEFBS_None, // VMINPDZ256rmkz = 13347 |
| 153081 | CEFBS_None, // VMINPDZ256rr = 13348 |
| 153082 | CEFBS_None, // VMINPDZ256rrk = 13349 |
| 153083 | CEFBS_None, // VMINPDZ256rrkz = 13350 |
| 153084 | CEFBS_None, // VMINPDZrm = 13351 |
| 153085 | CEFBS_None, // VMINPDZrmb = 13352 |
| 153086 | CEFBS_None, // VMINPDZrmbk = 13353 |
| 153087 | CEFBS_None, // VMINPDZrmbkz = 13354 |
| 153088 | CEFBS_None, // VMINPDZrmk = 13355 |
| 153089 | CEFBS_None, // VMINPDZrmkz = 13356 |
| 153090 | CEFBS_None, // VMINPDZrr = 13357 |
| 153091 | CEFBS_None, // VMINPDZrrb = 13358 |
| 153092 | CEFBS_None, // VMINPDZrrbk = 13359 |
| 153093 | CEFBS_None, // VMINPDZrrbkz = 13360 |
| 153094 | CEFBS_None, // VMINPDZrrk = 13361 |
| 153095 | CEFBS_None, // VMINPDZrrkz = 13362 |
| 153096 | CEFBS_None, // VMINPDrm = 13363 |
| 153097 | CEFBS_None, // VMINPDrr = 13364 |
| 153098 | CEFBS_None, // VMINPHZ128rm = 13365 |
| 153099 | CEFBS_None, // VMINPHZ128rmb = 13366 |
| 153100 | CEFBS_None, // VMINPHZ128rmbk = 13367 |
| 153101 | CEFBS_None, // VMINPHZ128rmbkz = 13368 |
| 153102 | CEFBS_None, // VMINPHZ128rmk = 13369 |
| 153103 | CEFBS_None, // VMINPHZ128rmkz = 13370 |
| 153104 | CEFBS_None, // VMINPHZ128rr = 13371 |
| 153105 | CEFBS_None, // VMINPHZ128rrk = 13372 |
| 153106 | CEFBS_None, // VMINPHZ128rrkz = 13373 |
| 153107 | CEFBS_None, // VMINPHZ256rm = 13374 |
| 153108 | CEFBS_None, // VMINPHZ256rmb = 13375 |
| 153109 | CEFBS_None, // VMINPHZ256rmbk = 13376 |
| 153110 | CEFBS_None, // VMINPHZ256rmbkz = 13377 |
| 153111 | CEFBS_None, // VMINPHZ256rmk = 13378 |
| 153112 | CEFBS_None, // VMINPHZ256rmkz = 13379 |
| 153113 | CEFBS_None, // VMINPHZ256rr = 13380 |
| 153114 | CEFBS_None, // VMINPHZ256rrk = 13381 |
| 153115 | CEFBS_None, // VMINPHZ256rrkz = 13382 |
| 153116 | CEFBS_None, // VMINPHZrm = 13383 |
| 153117 | CEFBS_None, // VMINPHZrmb = 13384 |
| 153118 | CEFBS_None, // VMINPHZrmbk = 13385 |
| 153119 | CEFBS_None, // VMINPHZrmbkz = 13386 |
| 153120 | CEFBS_None, // VMINPHZrmk = 13387 |
| 153121 | CEFBS_None, // VMINPHZrmkz = 13388 |
| 153122 | CEFBS_None, // VMINPHZrr = 13389 |
| 153123 | CEFBS_None, // VMINPHZrrb = 13390 |
| 153124 | CEFBS_None, // VMINPHZrrbk = 13391 |
| 153125 | CEFBS_None, // VMINPHZrrbkz = 13392 |
| 153126 | CEFBS_None, // VMINPHZrrk = 13393 |
| 153127 | CEFBS_None, // VMINPHZrrkz = 13394 |
| 153128 | CEFBS_None, // VMINPSYrm = 13395 |
| 153129 | CEFBS_None, // VMINPSYrr = 13396 |
| 153130 | CEFBS_None, // VMINPSZ128rm = 13397 |
| 153131 | CEFBS_None, // VMINPSZ128rmb = 13398 |
| 153132 | CEFBS_None, // VMINPSZ128rmbk = 13399 |
| 153133 | CEFBS_None, // VMINPSZ128rmbkz = 13400 |
| 153134 | CEFBS_None, // VMINPSZ128rmk = 13401 |
| 153135 | CEFBS_None, // VMINPSZ128rmkz = 13402 |
| 153136 | CEFBS_None, // VMINPSZ128rr = 13403 |
| 153137 | CEFBS_None, // VMINPSZ128rrk = 13404 |
| 153138 | CEFBS_None, // VMINPSZ128rrkz = 13405 |
| 153139 | CEFBS_None, // VMINPSZ256rm = 13406 |
| 153140 | CEFBS_None, // VMINPSZ256rmb = 13407 |
| 153141 | CEFBS_None, // VMINPSZ256rmbk = 13408 |
| 153142 | CEFBS_None, // VMINPSZ256rmbkz = 13409 |
| 153143 | CEFBS_None, // VMINPSZ256rmk = 13410 |
| 153144 | CEFBS_None, // VMINPSZ256rmkz = 13411 |
| 153145 | CEFBS_None, // VMINPSZ256rr = 13412 |
| 153146 | CEFBS_None, // VMINPSZ256rrk = 13413 |
| 153147 | CEFBS_None, // VMINPSZ256rrkz = 13414 |
| 153148 | CEFBS_None, // VMINPSZrm = 13415 |
| 153149 | CEFBS_None, // VMINPSZrmb = 13416 |
| 153150 | CEFBS_None, // VMINPSZrmbk = 13417 |
| 153151 | CEFBS_None, // VMINPSZrmbkz = 13418 |
| 153152 | CEFBS_None, // VMINPSZrmk = 13419 |
| 153153 | CEFBS_None, // VMINPSZrmkz = 13420 |
| 153154 | CEFBS_None, // VMINPSZrr = 13421 |
| 153155 | CEFBS_None, // VMINPSZrrb = 13422 |
| 153156 | CEFBS_None, // VMINPSZrrbk = 13423 |
| 153157 | CEFBS_None, // VMINPSZrrbkz = 13424 |
| 153158 | CEFBS_None, // VMINPSZrrk = 13425 |
| 153159 | CEFBS_None, // VMINPSZrrkz = 13426 |
| 153160 | CEFBS_None, // VMINPSrm = 13427 |
| 153161 | CEFBS_None, // VMINPSrr = 13428 |
| 153162 | CEFBS_None, // VMINSDZrm = 13429 |
| 153163 | CEFBS_None, // VMINSDZrm_Int = 13430 |
| 153164 | CEFBS_None, // VMINSDZrmk_Int = 13431 |
| 153165 | CEFBS_None, // VMINSDZrmkz_Int = 13432 |
| 153166 | CEFBS_None, // VMINSDZrr = 13433 |
| 153167 | CEFBS_None, // VMINSDZrr_Int = 13434 |
| 153168 | CEFBS_None, // VMINSDZrrb_Int = 13435 |
| 153169 | CEFBS_None, // VMINSDZrrbk_Int = 13436 |
| 153170 | CEFBS_None, // VMINSDZrrbkz_Int = 13437 |
| 153171 | CEFBS_None, // VMINSDZrrk_Int = 13438 |
| 153172 | CEFBS_None, // VMINSDZrrkz_Int = 13439 |
| 153173 | CEFBS_None, // VMINSDrm = 13440 |
| 153174 | CEFBS_None, // VMINSDrm_Int = 13441 |
| 153175 | CEFBS_None, // VMINSDrr = 13442 |
| 153176 | CEFBS_None, // VMINSDrr_Int = 13443 |
| 153177 | CEFBS_None, // VMINSHZrm = 13444 |
| 153178 | CEFBS_None, // VMINSHZrm_Int = 13445 |
| 153179 | CEFBS_None, // VMINSHZrmk_Int = 13446 |
| 153180 | CEFBS_None, // VMINSHZrmkz_Int = 13447 |
| 153181 | CEFBS_None, // VMINSHZrr = 13448 |
| 153182 | CEFBS_None, // VMINSHZrr_Int = 13449 |
| 153183 | CEFBS_None, // VMINSHZrrb_Int = 13450 |
| 153184 | CEFBS_None, // VMINSHZrrbk_Int = 13451 |
| 153185 | CEFBS_None, // VMINSHZrrbkz_Int = 13452 |
| 153186 | CEFBS_None, // VMINSHZrrk_Int = 13453 |
| 153187 | CEFBS_None, // VMINSHZrrkz_Int = 13454 |
| 153188 | CEFBS_None, // VMINSSZrm = 13455 |
| 153189 | CEFBS_None, // VMINSSZrm_Int = 13456 |
| 153190 | CEFBS_None, // VMINSSZrmk_Int = 13457 |
| 153191 | CEFBS_None, // VMINSSZrmkz_Int = 13458 |
| 153192 | CEFBS_None, // VMINSSZrr = 13459 |
| 153193 | CEFBS_None, // VMINSSZrr_Int = 13460 |
| 153194 | CEFBS_None, // VMINSSZrrb_Int = 13461 |
| 153195 | CEFBS_None, // VMINSSZrrbk_Int = 13462 |
| 153196 | CEFBS_None, // VMINSSZrrbkz_Int = 13463 |
| 153197 | CEFBS_None, // VMINSSZrrk_Int = 13464 |
| 153198 | CEFBS_None, // VMINSSZrrkz_Int = 13465 |
| 153199 | CEFBS_None, // VMINSSrm = 13466 |
| 153200 | CEFBS_None, // VMINSSrm_Int = 13467 |
| 153201 | CEFBS_None, // VMINSSrr = 13468 |
| 153202 | CEFBS_None, // VMINSSrr_Int = 13469 |
| 153203 | CEFBS_None, // VMLAUNCH = 13470 |
| 153204 | CEFBS_Not64BitMode, // VMLOAD32 = 13471 |
| 153205 | CEFBS_In64BitMode, // VMLOAD64 = 13472 |
| 153206 | CEFBS_None, // VMMCALL = 13473 |
| 153207 | CEFBS_None, // VMOV64toPQIZrm = 13474 |
| 153208 | CEFBS_None, // VMOV64toPQIZrr = 13475 |
| 153209 | CEFBS_None, // VMOV64toPQIrm = 13476 |
| 153210 | CEFBS_None, // VMOV64toPQIrr = 13477 |
| 153211 | CEFBS_None, // VMOV64toSDZrr = 13478 |
| 153212 | CEFBS_None, // VMOV64toSDrr = 13479 |
| 153213 | CEFBS_None, // VMOVAPDYmr = 13480 |
| 153214 | CEFBS_None, // VMOVAPDYrm = 13481 |
| 153215 | CEFBS_None, // VMOVAPDYrr = 13482 |
| 153216 | CEFBS_None, // VMOVAPDYrr_REV = 13483 |
| 153217 | CEFBS_None, // VMOVAPDZ128mr = 13484 |
| 153218 | CEFBS_None, // VMOVAPDZ128mrk = 13485 |
| 153219 | CEFBS_None, // VMOVAPDZ128rm = 13486 |
| 153220 | CEFBS_None, // VMOVAPDZ128rmk = 13487 |
| 153221 | CEFBS_None, // VMOVAPDZ128rmkz = 13488 |
| 153222 | CEFBS_None, // VMOVAPDZ128rr = 13489 |
| 153223 | CEFBS_None, // VMOVAPDZ128rr_REV = 13490 |
| 153224 | CEFBS_None, // VMOVAPDZ128rrk = 13491 |
| 153225 | CEFBS_None, // VMOVAPDZ128rrk_REV = 13492 |
| 153226 | CEFBS_None, // VMOVAPDZ128rrkz = 13493 |
| 153227 | CEFBS_None, // VMOVAPDZ128rrkz_REV = 13494 |
| 153228 | CEFBS_None, // VMOVAPDZ256mr = 13495 |
| 153229 | CEFBS_None, // VMOVAPDZ256mrk = 13496 |
| 153230 | CEFBS_None, // VMOVAPDZ256rm = 13497 |
| 153231 | CEFBS_None, // VMOVAPDZ256rmk = 13498 |
| 153232 | CEFBS_None, // VMOVAPDZ256rmkz = 13499 |
| 153233 | CEFBS_None, // VMOVAPDZ256rr = 13500 |
| 153234 | CEFBS_None, // VMOVAPDZ256rr_REV = 13501 |
| 153235 | CEFBS_None, // VMOVAPDZ256rrk = 13502 |
| 153236 | CEFBS_None, // VMOVAPDZ256rrk_REV = 13503 |
| 153237 | CEFBS_None, // VMOVAPDZ256rrkz = 13504 |
| 153238 | CEFBS_None, // VMOVAPDZ256rrkz_REV = 13505 |
| 153239 | CEFBS_None, // VMOVAPDZmr = 13506 |
| 153240 | CEFBS_None, // VMOVAPDZmrk = 13507 |
| 153241 | CEFBS_None, // VMOVAPDZrm = 13508 |
| 153242 | CEFBS_None, // VMOVAPDZrmk = 13509 |
| 153243 | CEFBS_None, // VMOVAPDZrmkz = 13510 |
| 153244 | CEFBS_None, // VMOVAPDZrr = 13511 |
| 153245 | CEFBS_None, // VMOVAPDZrr_REV = 13512 |
| 153246 | CEFBS_None, // VMOVAPDZrrk = 13513 |
| 153247 | CEFBS_None, // VMOVAPDZrrk_REV = 13514 |
| 153248 | CEFBS_None, // VMOVAPDZrrkz = 13515 |
| 153249 | CEFBS_None, // VMOVAPDZrrkz_REV = 13516 |
| 153250 | CEFBS_None, // VMOVAPDmr = 13517 |
| 153251 | CEFBS_None, // VMOVAPDrm = 13518 |
| 153252 | CEFBS_None, // VMOVAPDrr = 13519 |
| 153253 | CEFBS_None, // VMOVAPDrr_REV = 13520 |
| 153254 | CEFBS_None, // VMOVAPSYmr = 13521 |
| 153255 | CEFBS_None, // VMOVAPSYrm = 13522 |
| 153256 | CEFBS_None, // VMOVAPSYrr = 13523 |
| 153257 | CEFBS_None, // VMOVAPSYrr_REV = 13524 |
| 153258 | CEFBS_None, // VMOVAPSZ128mr = 13525 |
| 153259 | CEFBS_None, // VMOVAPSZ128mrk = 13526 |
| 153260 | CEFBS_None, // VMOVAPSZ128rm = 13527 |
| 153261 | CEFBS_None, // VMOVAPSZ128rmk = 13528 |
| 153262 | CEFBS_None, // VMOVAPSZ128rmkz = 13529 |
| 153263 | CEFBS_None, // VMOVAPSZ128rr = 13530 |
| 153264 | CEFBS_None, // VMOVAPSZ128rr_REV = 13531 |
| 153265 | CEFBS_None, // VMOVAPSZ128rrk = 13532 |
| 153266 | CEFBS_None, // VMOVAPSZ128rrk_REV = 13533 |
| 153267 | CEFBS_None, // VMOVAPSZ128rrkz = 13534 |
| 153268 | CEFBS_None, // VMOVAPSZ128rrkz_REV = 13535 |
| 153269 | CEFBS_None, // VMOVAPSZ256mr = 13536 |
| 153270 | CEFBS_None, // VMOVAPSZ256mrk = 13537 |
| 153271 | CEFBS_None, // VMOVAPSZ256rm = 13538 |
| 153272 | CEFBS_None, // VMOVAPSZ256rmk = 13539 |
| 153273 | CEFBS_None, // VMOVAPSZ256rmkz = 13540 |
| 153274 | CEFBS_None, // VMOVAPSZ256rr = 13541 |
| 153275 | CEFBS_None, // VMOVAPSZ256rr_REV = 13542 |
| 153276 | CEFBS_None, // VMOVAPSZ256rrk = 13543 |
| 153277 | CEFBS_None, // VMOVAPSZ256rrk_REV = 13544 |
| 153278 | CEFBS_None, // VMOVAPSZ256rrkz = 13545 |
| 153279 | CEFBS_None, // VMOVAPSZ256rrkz_REV = 13546 |
| 153280 | CEFBS_None, // VMOVAPSZmr = 13547 |
| 153281 | CEFBS_None, // VMOVAPSZmrk = 13548 |
| 153282 | CEFBS_None, // VMOVAPSZrm = 13549 |
| 153283 | CEFBS_None, // VMOVAPSZrmk = 13550 |
| 153284 | CEFBS_None, // VMOVAPSZrmkz = 13551 |
| 153285 | CEFBS_None, // VMOVAPSZrr = 13552 |
| 153286 | CEFBS_None, // VMOVAPSZrr_REV = 13553 |
| 153287 | CEFBS_None, // VMOVAPSZrrk = 13554 |
| 153288 | CEFBS_None, // VMOVAPSZrrk_REV = 13555 |
| 153289 | CEFBS_None, // VMOVAPSZrrkz = 13556 |
| 153290 | CEFBS_None, // VMOVAPSZrrkz_REV = 13557 |
| 153291 | CEFBS_None, // VMOVAPSmr = 13558 |
| 153292 | CEFBS_None, // VMOVAPSrm = 13559 |
| 153293 | CEFBS_None, // VMOVAPSrr = 13560 |
| 153294 | CEFBS_None, // VMOVAPSrr_REV = 13561 |
| 153295 | CEFBS_None, // VMOVDDUPYrm = 13562 |
| 153296 | CEFBS_None, // VMOVDDUPYrr = 13563 |
| 153297 | CEFBS_None, // VMOVDDUPZ128rm = 13564 |
| 153298 | CEFBS_None, // VMOVDDUPZ128rmk = 13565 |
| 153299 | CEFBS_None, // VMOVDDUPZ128rmkz = 13566 |
| 153300 | CEFBS_None, // VMOVDDUPZ128rr = 13567 |
| 153301 | CEFBS_None, // VMOVDDUPZ128rrk = 13568 |
| 153302 | CEFBS_None, // VMOVDDUPZ128rrkz = 13569 |
| 153303 | CEFBS_None, // VMOVDDUPZ256rm = 13570 |
| 153304 | CEFBS_None, // VMOVDDUPZ256rmk = 13571 |
| 153305 | CEFBS_None, // VMOVDDUPZ256rmkz = 13572 |
| 153306 | CEFBS_None, // VMOVDDUPZ256rr = 13573 |
| 153307 | CEFBS_None, // VMOVDDUPZ256rrk = 13574 |
| 153308 | CEFBS_None, // VMOVDDUPZ256rrkz = 13575 |
| 153309 | CEFBS_None, // VMOVDDUPZrm = 13576 |
| 153310 | CEFBS_None, // VMOVDDUPZrmk = 13577 |
| 153311 | CEFBS_None, // VMOVDDUPZrmkz = 13578 |
| 153312 | CEFBS_None, // VMOVDDUPZrr = 13579 |
| 153313 | CEFBS_None, // VMOVDDUPZrrk = 13580 |
| 153314 | CEFBS_None, // VMOVDDUPZrrkz = 13581 |
| 153315 | CEFBS_None, // VMOVDDUPrm = 13582 |
| 153316 | CEFBS_None, // VMOVDDUPrr = 13583 |
| 153317 | CEFBS_None, // VMOVDI2PDIZrm = 13584 |
| 153318 | CEFBS_None, // VMOVDI2PDIZrr = 13585 |
| 153319 | CEFBS_None, // VMOVDI2PDIrm = 13586 |
| 153320 | CEFBS_None, // VMOVDI2PDIrr = 13587 |
| 153321 | CEFBS_None, // VMOVDI2SSZrr = 13588 |
| 153322 | CEFBS_None, // VMOVDI2SSrr = 13589 |
| 153323 | CEFBS_None, // VMOVDQA32Z128mr = 13590 |
| 153324 | CEFBS_None, // VMOVDQA32Z128mrk = 13591 |
| 153325 | CEFBS_None, // VMOVDQA32Z128rm = 13592 |
| 153326 | CEFBS_None, // VMOVDQA32Z128rmk = 13593 |
| 153327 | CEFBS_None, // VMOVDQA32Z128rmkz = 13594 |
| 153328 | CEFBS_None, // VMOVDQA32Z128rr = 13595 |
| 153329 | CEFBS_None, // VMOVDQA32Z128rr_REV = 13596 |
| 153330 | CEFBS_None, // VMOVDQA32Z128rrk = 13597 |
| 153331 | CEFBS_None, // VMOVDQA32Z128rrk_REV = 13598 |
| 153332 | CEFBS_None, // VMOVDQA32Z128rrkz = 13599 |
| 153333 | CEFBS_None, // VMOVDQA32Z128rrkz_REV = 13600 |
| 153334 | CEFBS_None, // VMOVDQA32Z256mr = 13601 |
| 153335 | CEFBS_None, // VMOVDQA32Z256mrk = 13602 |
| 153336 | CEFBS_None, // VMOVDQA32Z256rm = 13603 |
| 153337 | CEFBS_None, // VMOVDQA32Z256rmk = 13604 |
| 153338 | CEFBS_None, // VMOVDQA32Z256rmkz = 13605 |
| 153339 | CEFBS_None, // VMOVDQA32Z256rr = 13606 |
| 153340 | CEFBS_None, // VMOVDQA32Z256rr_REV = 13607 |
| 153341 | CEFBS_None, // VMOVDQA32Z256rrk = 13608 |
| 153342 | CEFBS_None, // VMOVDQA32Z256rrk_REV = 13609 |
| 153343 | CEFBS_None, // VMOVDQA32Z256rrkz = 13610 |
| 153344 | CEFBS_None, // VMOVDQA32Z256rrkz_REV = 13611 |
| 153345 | CEFBS_None, // VMOVDQA32Zmr = 13612 |
| 153346 | CEFBS_None, // VMOVDQA32Zmrk = 13613 |
| 153347 | CEFBS_None, // VMOVDQA32Zrm = 13614 |
| 153348 | CEFBS_None, // VMOVDQA32Zrmk = 13615 |
| 153349 | CEFBS_None, // VMOVDQA32Zrmkz = 13616 |
| 153350 | CEFBS_None, // VMOVDQA32Zrr = 13617 |
| 153351 | CEFBS_None, // VMOVDQA32Zrr_REV = 13618 |
| 153352 | CEFBS_None, // VMOVDQA32Zrrk = 13619 |
| 153353 | CEFBS_None, // VMOVDQA32Zrrk_REV = 13620 |
| 153354 | CEFBS_None, // VMOVDQA32Zrrkz = 13621 |
| 153355 | CEFBS_None, // VMOVDQA32Zrrkz_REV = 13622 |
| 153356 | CEFBS_None, // VMOVDQA64Z128mr = 13623 |
| 153357 | CEFBS_None, // VMOVDQA64Z128mrk = 13624 |
| 153358 | CEFBS_None, // VMOVDQA64Z128rm = 13625 |
| 153359 | CEFBS_None, // VMOVDQA64Z128rmk = 13626 |
| 153360 | CEFBS_None, // VMOVDQA64Z128rmkz = 13627 |
| 153361 | CEFBS_None, // VMOVDQA64Z128rr = 13628 |
| 153362 | CEFBS_None, // VMOVDQA64Z128rr_REV = 13629 |
| 153363 | CEFBS_None, // VMOVDQA64Z128rrk = 13630 |
| 153364 | CEFBS_None, // VMOVDQA64Z128rrk_REV = 13631 |
| 153365 | CEFBS_None, // VMOVDQA64Z128rrkz = 13632 |
| 153366 | CEFBS_None, // VMOVDQA64Z128rrkz_REV = 13633 |
| 153367 | CEFBS_None, // VMOVDQA64Z256mr = 13634 |
| 153368 | CEFBS_None, // VMOVDQA64Z256mrk = 13635 |
| 153369 | CEFBS_None, // VMOVDQA64Z256rm = 13636 |
| 153370 | CEFBS_None, // VMOVDQA64Z256rmk = 13637 |
| 153371 | CEFBS_None, // VMOVDQA64Z256rmkz = 13638 |
| 153372 | CEFBS_None, // VMOVDQA64Z256rr = 13639 |
| 153373 | CEFBS_None, // VMOVDQA64Z256rr_REV = 13640 |
| 153374 | CEFBS_None, // VMOVDQA64Z256rrk = 13641 |
| 153375 | CEFBS_None, // VMOVDQA64Z256rrk_REV = 13642 |
| 153376 | CEFBS_None, // VMOVDQA64Z256rrkz = 13643 |
| 153377 | CEFBS_None, // VMOVDQA64Z256rrkz_REV = 13644 |
| 153378 | CEFBS_None, // VMOVDQA64Zmr = 13645 |
| 153379 | CEFBS_None, // VMOVDQA64Zmrk = 13646 |
| 153380 | CEFBS_None, // VMOVDQA64Zrm = 13647 |
| 153381 | CEFBS_None, // VMOVDQA64Zrmk = 13648 |
| 153382 | CEFBS_None, // VMOVDQA64Zrmkz = 13649 |
| 153383 | CEFBS_None, // VMOVDQA64Zrr = 13650 |
| 153384 | CEFBS_None, // VMOVDQA64Zrr_REV = 13651 |
| 153385 | CEFBS_None, // VMOVDQA64Zrrk = 13652 |
| 153386 | CEFBS_None, // VMOVDQA64Zrrk_REV = 13653 |
| 153387 | CEFBS_None, // VMOVDQA64Zrrkz = 13654 |
| 153388 | CEFBS_None, // VMOVDQA64Zrrkz_REV = 13655 |
| 153389 | CEFBS_None, // VMOVDQAYmr = 13656 |
| 153390 | CEFBS_None, // VMOVDQAYrm = 13657 |
| 153391 | CEFBS_None, // VMOVDQAYrr = 13658 |
| 153392 | CEFBS_None, // VMOVDQAYrr_REV = 13659 |
| 153393 | CEFBS_None, // VMOVDQAmr = 13660 |
| 153394 | CEFBS_None, // VMOVDQArm = 13661 |
| 153395 | CEFBS_None, // VMOVDQArr = 13662 |
| 153396 | CEFBS_None, // VMOVDQArr_REV = 13663 |
| 153397 | CEFBS_None, // VMOVDQU16Z128mr = 13664 |
| 153398 | CEFBS_None, // VMOVDQU16Z128mrk = 13665 |
| 153399 | CEFBS_None, // VMOVDQU16Z128rm = 13666 |
| 153400 | CEFBS_None, // VMOVDQU16Z128rmk = 13667 |
| 153401 | CEFBS_None, // VMOVDQU16Z128rmkz = 13668 |
| 153402 | CEFBS_None, // VMOVDQU16Z128rr = 13669 |
| 153403 | CEFBS_None, // VMOVDQU16Z128rr_REV = 13670 |
| 153404 | CEFBS_None, // VMOVDQU16Z128rrk = 13671 |
| 153405 | CEFBS_None, // VMOVDQU16Z128rrk_REV = 13672 |
| 153406 | CEFBS_None, // VMOVDQU16Z128rrkz = 13673 |
| 153407 | CEFBS_None, // VMOVDQU16Z128rrkz_REV = 13674 |
| 153408 | CEFBS_None, // VMOVDQU16Z256mr = 13675 |
| 153409 | CEFBS_None, // VMOVDQU16Z256mrk = 13676 |
| 153410 | CEFBS_None, // VMOVDQU16Z256rm = 13677 |
| 153411 | CEFBS_None, // VMOVDQU16Z256rmk = 13678 |
| 153412 | CEFBS_None, // VMOVDQU16Z256rmkz = 13679 |
| 153413 | CEFBS_None, // VMOVDQU16Z256rr = 13680 |
| 153414 | CEFBS_None, // VMOVDQU16Z256rr_REV = 13681 |
| 153415 | CEFBS_None, // VMOVDQU16Z256rrk = 13682 |
| 153416 | CEFBS_None, // VMOVDQU16Z256rrk_REV = 13683 |
| 153417 | CEFBS_None, // VMOVDQU16Z256rrkz = 13684 |
| 153418 | CEFBS_None, // VMOVDQU16Z256rrkz_REV = 13685 |
| 153419 | CEFBS_None, // VMOVDQU16Zmr = 13686 |
| 153420 | CEFBS_None, // VMOVDQU16Zmrk = 13687 |
| 153421 | CEFBS_None, // VMOVDQU16Zrm = 13688 |
| 153422 | CEFBS_None, // VMOVDQU16Zrmk = 13689 |
| 153423 | CEFBS_None, // VMOVDQU16Zrmkz = 13690 |
| 153424 | CEFBS_None, // VMOVDQU16Zrr = 13691 |
| 153425 | CEFBS_None, // VMOVDQU16Zrr_REV = 13692 |
| 153426 | CEFBS_None, // VMOVDQU16Zrrk = 13693 |
| 153427 | CEFBS_None, // VMOVDQU16Zrrk_REV = 13694 |
| 153428 | CEFBS_None, // VMOVDQU16Zrrkz = 13695 |
| 153429 | CEFBS_None, // VMOVDQU16Zrrkz_REV = 13696 |
| 153430 | CEFBS_None, // VMOVDQU32Z128mr = 13697 |
| 153431 | CEFBS_None, // VMOVDQU32Z128mrk = 13698 |
| 153432 | CEFBS_None, // VMOVDQU32Z128rm = 13699 |
| 153433 | CEFBS_None, // VMOVDQU32Z128rmk = 13700 |
| 153434 | CEFBS_None, // VMOVDQU32Z128rmkz = 13701 |
| 153435 | CEFBS_None, // VMOVDQU32Z128rr = 13702 |
| 153436 | CEFBS_None, // VMOVDQU32Z128rr_REV = 13703 |
| 153437 | CEFBS_None, // VMOVDQU32Z128rrk = 13704 |
| 153438 | CEFBS_None, // VMOVDQU32Z128rrk_REV = 13705 |
| 153439 | CEFBS_None, // VMOVDQU32Z128rrkz = 13706 |
| 153440 | CEFBS_None, // VMOVDQU32Z128rrkz_REV = 13707 |
| 153441 | CEFBS_None, // VMOVDQU32Z256mr = 13708 |
| 153442 | CEFBS_None, // VMOVDQU32Z256mrk = 13709 |
| 153443 | CEFBS_None, // VMOVDQU32Z256rm = 13710 |
| 153444 | CEFBS_None, // VMOVDQU32Z256rmk = 13711 |
| 153445 | CEFBS_None, // VMOVDQU32Z256rmkz = 13712 |
| 153446 | CEFBS_None, // VMOVDQU32Z256rr = 13713 |
| 153447 | CEFBS_None, // VMOVDQU32Z256rr_REV = 13714 |
| 153448 | CEFBS_None, // VMOVDQU32Z256rrk = 13715 |
| 153449 | CEFBS_None, // VMOVDQU32Z256rrk_REV = 13716 |
| 153450 | CEFBS_None, // VMOVDQU32Z256rrkz = 13717 |
| 153451 | CEFBS_None, // VMOVDQU32Z256rrkz_REV = 13718 |
| 153452 | CEFBS_None, // VMOVDQU32Zmr = 13719 |
| 153453 | CEFBS_None, // VMOVDQU32Zmrk = 13720 |
| 153454 | CEFBS_None, // VMOVDQU32Zrm = 13721 |
| 153455 | CEFBS_None, // VMOVDQU32Zrmk = 13722 |
| 153456 | CEFBS_None, // VMOVDQU32Zrmkz = 13723 |
| 153457 | CEFBS_None, // VMOVDQU32Zrr = 13724 |
| 153458 | CEFBS_None, // VMOVDQU32Zrr_REV = 13725 |
| 153459 | CEFBS_None, // VMOVDQU32Zrrk = 13726 |
| 153460 | CEFBS_None, // VMOVDQU32Zrrk_REV = 13727 |
| 153461 | CEFBS_None, // VMOVDQU32Zrrkz = 13728 |
| 153462 | CEFBS_None, // VMOVDQU32Zrrkz_REV = 13729 |
| 153463 | CEFBS_None, // VMOVDQU64Z128mr = 13730 |
| 153464 | CEFBS_None, // VMOVDQU64Z128mrk = 13731 |
| 153465 | CEFBS_None, // VMOVDQU64Z128rm = 13732 |
| 153466 | CEFBS_None, // VMOVDQU64Z128rmk = 13733 |
| 153467 | CEFBS_None, // VMOVDQU64Z128rmkz = 13734 |
| 153468 | CEFBS_None, // VMOVDQU64Z128rr = 13735 |
| 153469 | CEFBS_None, // VMOVDQU64Z128rr_REV = 13736 |
| 153470 | CEFBS_None, // VMOVDQU64Z128rrk = 13737 |
| 153471 | CEFBS_None, // VMOVDQU64Z128rrk_REV = 13738 |
| 153472 | CEFBS_None, // VMOVDQU64Z128rrkz = 13739 |
| 153473 | CEFBS_None, // VMOVDQU64Z128rrkz_REV = 13740 |
| 153474 | CEFBS_None, // VMOVDQU64Z256mr = 13741 |
| 153475 | CEFBS_None, // VMOVDQU64Z256mrk = 13742 |
| 153476 | CEFBS_None, // VMOVDQU64Z256rm = 13743 |
| 153477 | CEFBS_None, // VMOVDQU64Z256rmk = 13744 |
| 153478 | CEFBS_None, // VMOVDQU64Z256rmkz = 13745 |
| 153479 | CEFBS_None, // VMOVDQU64Z256rr = 13746 |
| 153480 | CEFBS_None, // VMOVDQU64Z256rr_REV = 13747 |
| 153481 | CEFBS_None, // VMOVDQU64Z256rrk = 13748 |
| 153482 | CEFBS_None, // VMOVDQU64Z256rrk_REV = 13749 |
| 153483 | CEFBS_None, // VMOVDQU64Z256rrkz = 13750 |
| 153484 | CEFBS_None, // VMOVDQU64Z256rrkz_REV = 13751 |
| 153485 | CEFBS_None, // VMOVDQU64Zmr = 13752 |
| 153486 | CEFBS_None, // VMOVDQU64Zmrk = 13753 |
| 153487 | CEFBS_None, // VMOVDQU64Zrm = 13754 |
| 153488 | CEFBS_None, // VMOVDQU64Zrmk = 13755 |
| 153489 | CEFBS_None, // VMOVDQU64Zrmkz = 13756 |
| 153490 | CEFBS_None, // VMOVDQU64Zrr = 13757 |
| 153491 | CEFBS_None, // VMOVDQU64Zrr_REV = 13758 |
| 153492 | CEFBS_None, // VMOVDQU64Zrrk = 13759 |
| 153493 | CEFBS_None, // VMOVDQU64Zrrk_REV = 13760 |
| 153494 | CEFBS_None, // VMOVDQU64Zrrkz = 13761 |
| 153495 | CEFBS_None, // VMOVDQU64Zrrkz_REV = 13762 |
| 153496 | CEFBS_None, // VMOVDQU8Z128mr = 13763 |
| 153497 | CEFBS_None, // VMOVDQU8Z128mrk = 13764 |
| 153498 | CEFBS_None, // VMOVDQU8Z128rm = 13765 |
| 153499 | CEFBS_None, // VMOVDQU8Z128rmk = 13766 |
| 153500 | CEFBS_None, // VMOVDQU8Z128rmkz = 13767 |
| 153501 | CEFBS_None, // VMOVDQU8Z128rr = 13768 |
| 153502 | CEFBS_None, // VMOVDQU8Z128rr_REV = 13769 |
| 153503 | CEFBS_None, // VMOVDQU8Z128rrk = 13770 |
| 153504 | CEFBS_None, // VMOVDQU8Z128rrk_REV = 13771 |
| 153505 | CEFBS_None, // VMOVDQU8Z128rrkz = 13772 |
| 153506 | CEFBS_None, // VMOVDQU8Z128rrkz_REV = 13773 |
| 153507 | CEFBS_None, // VMOVDQU8Z256mr = 13774 |
| 153508 | CEFBS_None, // VMOVDQU8Z256mrk = 13775 |
| 153509 | CEFBS_None, // VMOVDQU8Z256rm = 13776 |
| 153510 | CEFBS_None, // VMOVDQU8Z256rmk = 13777 |
| 153511 | CEFBS_None, // VMOVDQU8Z256rmkz = 13778 |
| 153512 | CEFBS_None, // VMOVDQU8Z256rr = 13779 |
| 153513 | CEFBS_None, // VMOVDQU8Z256rr_REV = 13780 |
| 153514 | CEFBS_None, // VMOVDQU8Z256rrk = 13781 |
| 153515 | CEFBS_None, // VMOVDQU8Z256rrk_REV = 13782 |
| 153516 | CEFBS_None, // VMOVDQU8Z256rrkz = 13783 |
| 153517 | CEFBS_None, // VMOVDQU8Z256rrkz_REV = 13784 |
| 153518 | CEFBS_None, // VMOVDQU8Zmr = 13785 |
| 153519 | CEFBS_None, // VMOVDQU8Zmrk = 13786 |
| 153520 | CEFBS_None, // VMOVDQU8Zrm = 13787 |
| 153521 | CEFBS_None, // VMOVDQU8Zrmk = 13788 |
| 153522 | CEFBS_None, // VMOVDQU8Zrmkz = 13789 |
| 153523 | CEFBS_None, // VMOVDQU8Zrr = 13790 |
| 153524 | CEFBS_None, // VMOVDQU8Zrr_REV = 13791 |
| 153525 | CEFBS_None, // VMOVDQU8Zrrk = 13792 |
| 153526 | CEFBS_None, // VMOVDQU8Zrrk_REV = 13793 |
| 153527 | CEFBS_None, // VMOVDQU8Zrrkz = 13794 |
| 153528 | CEFBS_None, // VMOVDQU8Zrrkz_REV = 13795 |
| 153529 | CEFBS_None, // VMOVDQUYmr = 13796 |
| 153530 | CEFBS_None, // VMOVDQUYrm = 13797 |
| 153531 | CEFBS_None, // VMOVDQUYrr = 13798 |
| 153532 | CEFBS_None, // VMOVDQUYrr_REV = 13799 |
| 153533 | CEFBS_None, // VMOVDQUmr = 13800 |
| 153534 | CEFBS_None, // VMOVDQUrm = 13801 |
| 153535 | CEFBS_None, // VMOVDQUrr = 13802 |
| 153536 | CEFBS_None, // VMOVDQUrr_REV = 13803 |
| 153537 | CEFBS_None, // VMOVHLPSZrr = 13804 |
| 153538 | CEFBS_None, // VMOVHLPSrr = 13805 |
| 153539 | CEFBS_None, // VMOVHPDZ128mr = 13806 |
| 153540 | CEFBS_None, // VMOVHPDZ128rm = 13807 |
| 153541 | CEFBS_None, // VMOVHPDmr = 13808 |
| 153542 | CEFBS_None, // VMOVHPDrm = 13809 |
| 153543 | CEFBS_None, // VMOVHPSZ128mr = 13810 |
| 153544 | CEFBS_None, // VMOVHPSZ128rm = 13811 |
| 153545 | CEFBS_None, // VMOVHPSmr = 13812 |
| 153546 | CEFBS_None, // VMOVHPSrm = 13813 |
| 153547 | CEFBS_None, // VMOVLHPSZrr = 13814 |
| 153548 | CEFBS_None, // VMOVLHPSrr = 13815 |
| 153549 | CEFBS_None, // VMOVLPDZ128mr = 13816 |
| 153550 | CEFBS_None, // VMOVLPDZ128rm = 13817 |
| 153551 | CEFBS_None, // VMOVLPDmr = 13818 |
| 153552 | CEFBS_None, // VMOVLPDrm = 13819 |
| 153553 | CEFBS_None, // VMOVLPSZ128mr = 13820 |
| 153554 | CEFBS_None, // VMOVLPSZ128rm = 13821 |
| 153555 | CEFBS_None, // VMOVLPSmr = 13822 |
| 153556 | CEFBS_None, // VMOVLPSrm = 13823 |
| 153557 | CEFBS_None, // VMOVMSKPDYrr = 13824 |
| 153558 | CEFBS_None, // VMOVMSKPDrr = 13825 |
| 153559 | CEFBS_None, // VMOVMSKPSYrr = 13826 |
| 153560 | CEFBS_None, // VMOVMSKPSrr = 13827 |
| 153561 | CEFBS_None, // VMOVNTDQAYrm = 13828 |
| 153562 | CEFBS_None, // VMOVNTDQAZ128rm = 13829 |
| 153563 | CEFBS_None, // VMOVNTDQAZ256rm = 13830 |
| 153564 | CEFBS_None, // VMOVNTDQAZrm = 13831 |
| 153565 | CEFBS_None, // VMOVNTDQArm = 13832 |
| 153566 | CEFBS_None, // VMOVNTDQYmr = 13833 |
| 153567 | CEFBS_None, // VMOVNTDQZ128mr = 13834 |
| 153568 | CEFBS_None, // VMOVNTDQZ256mr = 13835 |
| 153569 | CEFBS_None, // VMOVNTDQZmr = 13836 |
| 153570 | CEFBS_None, // VMOVNTDQmr = 13837 |
| 153571 | CEFBS_None, // VMOVNTPDYmr = 13838 |
| 153572 | CEFBS_None, // VMOVNTPDZ128mr = 13839 |
| 153573 | CEFBS_None, // VMOVNTPDZ256mr = 13840 |
| 153574 | CEFBS_None, // VMOVNTPDZmr = 13841 |
| 153575 | CEFBS_None, // VMOVNTPDmr = 13842 |
| 153576 | CEFBS_None, // VMOVNTPSYmr = 13843 |
| 153577 | CEFBS_None, // VMOVNTPSZ128mr = 13844 |
| 153578 | CEFBS_None, // VMOVNTPSZ256mr = 13845 |
| 153579 | CEFBS_None, // VMOVNTPSZmr = 13846 |
| 153580 | CEFBS_None, // VMOVNTPSmr = 13847 |
| 153581 | CEFBS_None, // VMOVPDI2DIZmr = 13848 |
| 153582 | CEFBS_None, // VMOVPDI2DIZrr = 13849 |
| 153583 | CEFBS_None, // VMOVPDI2DImr = 13850 |
| 153584 | CEFBS_None, // VMOVPDI2DIrr = 13851 |
| 153585 | CEFBS_None, // VMOVPQI2QIZmr = 13852 |
| 153586 | CEFBS_None, // VMOVPQI2QIZrr = 13853 |
| 153587 | CEFBS_None, // VMOVPQI2QImr = 13854 |
| 153588 | CEFBS_None, // VMOVPQI2QIrr = 13855 |
| 153589 | CEFBS_In64BitMode, // VMOVPQIto64Zmr = 13856 |
| 153590 | CEFBS_None, // VMOVPQIto64Zrr = 13857 |
| 153591 | CEFBS_None, // VMOVPQIto64mr = 13858 |
| 153592 | CEFBS_None, // VMOVPQIto64rr = 13859 |
| 153593 | CEFBS_None, // VMOVQI2PQIZrm = 13860 |
| 153594 | CEFBS_None, // VMOVQI2PQIrm = 13861 |
| 153595 | CEFBS_In64BitMode, // VMOVRSBZ128m = 13862 |
| 153596 | CEFBS_In64BitMode, // VMOVRSBZ128mk = 13863 |
| 153597 | CEFBS_In64BitMode, // VMOVRSBZ128mkz = 13864 |
| 153598 | CEFBS_In64BitMode, // VMOVRSBZ256m = 13865 |
| 153599 | CEFBS_In64BitMode, // VMOVRSBZ256mk = 13866 |
| 153600 | CEFBS_In64BitMode, // VMOVRSBZ256mkz = 13867 |
| 153601 | CEFBS_In64BitMode, // VMOVRSBZm = 13868 |
| 153602 | CEFBS_In64BitMode, // VMOVRSBZmk = 13869 |
| 153603 | CEFBS_In64BitMode, // VMOVRSBZmkz = 13870 |
| 153604 | CEFBS_In64BitMode, // VMOVRSDZ128m = 13871 |
| 153605 | CEFBS_In64BitMode, // VMOVRSDZ128mk = 13872 |
| 153606 | CEFBS_In64BitMode, // VMOVRSDZ128mkz = 13873 |
| 153607 | CEFBS_In64BitMode, // VMOVRSDZ256m = 13874 |
| 153608 | CEFBS_In64BitMode, // VMOVRSDZ256mk = 13875 |
| 153609 | CEFBS_In64BitMode, // VMOVRSDZ256mkz = 13876 |
| 153610 | CEFBS_In64BitMode, // VMOVRSDZm = 13877 |
| 153611 | CEFBS_In64BitMode, // VMOVRSDZmk = 13878 |
| 153612 | CEFBS_In64BitMode, // VMOVRSDZmkz = 13879 |
| 153613 | CEFBS_In64BitMode, // VMOVRSQZ128m = 13880 |
| 153614 | CEFBS_In64BitMode, // VMOVRSQZ128mk = 13881 |
| 153615 | CEFBS_In64BitMode, // VMOVRSQZ128mkz = 13882 |
| 153616 | CEFBS_In64BitMode, // VMOVRSQZ256m = 13883 |
| 153617 | CEFBS_In64BitMode, // VMOVRSQZ256mk = 13884 |
| 153618 | CEFBS_In64BitMode, // VMOVRSQZ256mkz = 13885 |
| 153619 | CEFBS_In64BitMode, // VMOVRSQZm = 13886 |
| 153620 | CEFBS_In64BitMode, // VMOVRSQZmk = 13887 |
| 153621 | CEFBS_In64BitMode, // VMOVRSQZmkz = 13888 |
| 153622 | CEFBS_In64BitMode, // VMOVRSWZ128m = 13889 |
| 153623 | CEFBS_In64BitMode, // VMOVRSWZ128mk = 13890 |
| 153624 | CEFBS_In64BitMode, // VMOVRSWZ128mkz = 13891 |
| 153625 | CEFBS_In64BitMode, // VMOVRSWZ256m = 13892 |
| 153626 | CEFBS_In64BitMode, // VMOVRSWZ256mk = 13893 |
| 153627 | CEFBS_In64BitMode, // VMOVRSWZ256mkz = 13894 |
| 153628 | CEFBS_In64BitMode, // VMOVRSWZm = 13895 |
| 153629 | CEFBS_In64BitMode, // VMOVRSWZmk = 13896 |
| 153630 | CEFBS_In64BitMode, // VMOVRSWZmkz = 13897 |
| 153631 | CEFBS_None, // VMOVSDZmr = 13898 |
| 153632 | CEFBS_None, // VMOVSDZmrk = 13899 |
| 153633 | CEFBS_None, // VMOVSDZrm = 13900 |
| 153634 | CEFBS_None, // VMOVSDZrm_alt = 13901 |
| 153635 | CEFBS_None, // VMOVSDZrmk = 13902 |
| 153636 | CEFBS_None, // VMOVSDZrmkz = 13903 |
| 153637 | CEFBS_None, // VMOVSDZrr = 13904 |
| 153638 | CEFBS_None, // VMOVSDZrr_REV = 13905 |
| 153639 | CEFBS_None, // VMOVSDZrrk = 13906 |
| 153640 | CEFBS_None, // VMOVSDZrrk_REV = 13907 |
| 153641 | CEFBS_None, // VMOVSDZrrkz = 13908 |
| 153642 | CEFBS_None, // VMOVSDZrrkz_REV = 13909 |
| 153643 | CEFBS_None, // VMOVSDmr = 13910 |
| 153644 | CEFBS_None, // VMOVSDrm = 13911 |
| 153645 | CEFBS_None, // VMOVSDrm_alt = 13912 |
| 153646 | CEFBS_None, // VMOVSDrr = 13913 |
| 153647 | CEFBS_None, // VMOVSDrr_REV = 13914 |
| 153648 | CEFBS_None, // VMOVSDto64Zrr = 13915 |
| 153649 | CEFBS_None, // VMOVSDto64rr = 13916 |
| 153650 | CEFBS_None, // VMOVSH2Wrr = 13917 |
| 153651 | CEFBS_None, // VMOVSHDUPYrm = 13918 |
| 153652 | CEFBS_None, // VMOVSHDUPYrr = 13919 |
| 153653 | CEFBS_None, // VMOVSHDUPZ128rm = 13920 |
| 153654 | CEFBS_None, // VMOVSHDUPZ128rmk = 13921 |
| 153655 | CEFBS_None, // VMOVSHDUPZ128rmkz = 13922 |
| 153656 | CEFBS_None, // VMOVSHDUPZ128rr = 13923 |
| 153657 | CEFBS_None, // VMOVSHDUPZ128rrk = 13924 |
| 153658 | CEFBS_None, // VMOVSHDUPZ128rrkz = 13925 |
| 153659 | CEFBS_None, // VMOVSHDUPZ256rm = 13926 |
| 153660 | CEFBS_None, // VMOVSHDUPZ256rmk = 13927 |
| 153661 | CEFBS_None, // VMOVSHDUPZ256rmkz = 13928 |
| 153662 | CEFBS_None, // VMOVSHDUPZ256rr = 13929 |
| 153663 | CEFBS_None, // VMOVSHDUPZ256rrk = 13930 |
| 153664 | CEFBS_None, // VMOVSHDUPZ256rrkz = 13931 |
| 153665 | CEFBS_None, // VMOVSHDUPZrm = 13932 |
| 153666 | CEFBS_None, // VMOVSHDUPZrmk = 13933 |
| 153667 | CEFBS_None, // VMOVSHDUPZrmkz = 13934 |
| 153668 | CEFBS_None, // VMOVSHDUPZrr = 13935 |
| 153669 | CEFBS_None, // VMOVSHDUPZrrk = 13936 |
| 153670 | CEFBS_None, // VMOVSHDUPZrrkz = 13937 |
| 153671 | CEFBS_None, // VMOVSHDUPrm = 13938 |
| 153672 | CEFBS_None, // VMOVSHDUPrr = 13939 |
| 153673 | CEFBS_None, // VMOVSHZmr = 13940 |
| 153674 | CEFBS_None, // VMOVSHZmrk = 13941 |
| 153675 | CEFBS_None, // VMOVSHZrm = 13942 |
| 153676 | CEFBS_None, // VMOVSHZrm_alt = 13943 |
| 153677 | CEFBS_None, // VMOVSHZrmk = 13944 |
| 153678 | CEFBS_None, // VMOVSHZrmkz = 13945 |
| 153679 | CEFBS_None, // VMOVSHZrr = 13946 |
| 153680 | CEFBS_None, // VMOVSHZrr_REV = 13947 |
| 153681 | CEFBS_None, // VMOVSHZrrk = 13948 |
| 153682 | CEFBS_None, // VMOVSHZrrk_REV = 13949 |
| 153683 | CEFBS_None, // VMOVSHZrrkz = 13950 |
| 153684 | CEFBS_None, // VMOVSHZrrkz_REV = 13951 |
| 153685 | CEFBS_None, // VMOVSHtoW64rr = 13952 |
| 153686 | CEFBS_None, // VMOVSLDUPYrm = 13953 |
| 153687 | CEFBS_None, // VMOVSLDUPYrr = 13954 |
| 153688 | CEFBS_None, // VMOVSLDUPZ128rm = 13955 |
| 153689 | CEFBS_None, // VMOVSLDUPZ128rmk = 13956 |
| 153690 | CEFBS_None, // VMOVSLDUPZ128rmkz = 13957 |
| 153691 | CEFBS_None, // VMOVSLDUPZ128rr = 13958 |
| 153692 | CEFBS_None, // VMOVSLDUPZ128rrk = 13959 |
| 153693 | CEFBS_None, // VMOVSLDUPZ128rrkz = 13960 |
| 153694 | CEFBS_None, // VMOVSLDUPZ256rm = 13961 |
| 153695 | CEFBS_None, // VMOVSLDUPZ256rmk = 13962 |
| 153696 | CEFBS_None, // VMOVSLDUPZ256rmkz = 13963 |
| 153697 | CEFBS_None, // VMOVSLDUPZ256rr = 13964 |
| 153698 | CEFBS_None, // VMOVSLDUPZ256rrk = 13965 |
| 153699 | CEFBS_None, // VMOVSLDUPZ256rrkz = 13966 |
| 153700 | CEFBS_None, // VMOVSLDUPZrm = 13967 |
| 153701 | CEFBS_None, // VMOVSLDUPZrmk = 13968 |
| 153702 | CEFBS_None, // VMOVSLDUPZrmkz = 13969 |
| 153703 | CEFBS_None, // VMOVSLDUPZrr = 13970 |
| 153704 | CEFBS_None, // VMOVSLDUPZrrk = 13971 |
| 153705 | CEFBS_None, // VMOVSLDUPZrrkz = 13972 |
| 153706 | CEFBS_None, // VMOVSLDUPrm = 13973 |
| 153707 | CEFBS_None, // VMOVSLDUPrr = 13974 |
| 153708 | CEFBS_None, // VMOVSS2DIZrr = 13975 |
| 153709 | CEFBS_None, // VMOVSS2DIrr = 13976 |
| 153710 | CEFBS_None, // VMOVSSZmr = 13977 |
| 153711 | CEFBS_None, // VMOVSSZmrk = 13978 |
| 153712 | CEFBS_None, // VMOVSSZrm = 13979 |
| 153713 | CEFBS_None, // VMOVSSZrm_alt = 13980 |
| 153714 | CEFBS_None, // VMOVSSZrmk = 13981 |
| 153715 | CEFBS_None, // VMOVSSZrmkz = 13982 |
| 153716 | CEFBS_None, // VMOVSSZrr = 13983 |
| 153717 | CEFBS_None, // VMOVSSZrr_REV = 13984 |
| 153718 | CEFBS_None, // VMOVSSZrrk = 13985 |
| 153719 | CEFBS_None, // VMOVSSZrrk_REV = 13986 |
| 153720 | CEFBS_None, // VMOVSSZrrkz = 13987 |
| 153721 | CEFBS_None, // VMOVSSZrrkz_REV = 13988 |
| 153722 | CEFBS_None, // VMOVSSmr = 13989 |
| 153723 | CEFBS_None, // VMOVSSrm = 13990 |
| 153724 | CEFBS_None, // VMOVSSrm_alt = 13991 |
| 153725 | CEFBS_None, // VMOVSSrr = 13992 |
| 153726 | CEFBS_None, // VMOVSSrr_REV = 13993 |
| 153727 | CEFBS_None, // VMOVUPDYmr = 13994 |
| 153728 | CEFBS_None, // VMOVUPDYrm = 13995 |
| 153729 | CEFBS_None, // VMOVUPDYrr = 13996 |
| 153730 | CEFBS_None, // VMOVUPDYrr_REV = 13997 |
| 153731 | CEFBS_None, // VMOVUPDZ128mr = 13998 |
| 153732 | CEFBS_None, // VMOVUPDZ128mrk = 13999 |
| 153733 | CEFBS_None, // VMOVUPDZ128rm = 14000 |
| 153734 | CEFBS_None, // VMOVUPDZ128rmk = 14001 |
| 153735 | CEFBS_None, // VMOVUPDZ128rmkz = 14002 |
| 153736 | CEFBS_None, // VMOVUPDZ128rr = 14003 |
| 153737 | CEFBS_None, // VMOVUPDZ128rr_REV = 14004 |
| 153738 | CEFBS_None, // VMOVUPDZ128rrk = 14005 |
| 153739 | CEFBS_None, // VMOVUPDZ128rrk_REV = 14006 |
| 153740 | CEFBS_None, // VMOVUPDZ128rrkz = 14007 |
| 153741 | CEFBS_None, // VMOVUPDZ128rrkz_REV = 14008 |
| 153742 | CEFBS_None, // VMOVUPDZ256mr = 14009 |
| 153743 | CEFBS_None, // VMOVUPDZ256mrk = 14010 |
| 153744 | CEFBS_None, // VMOVUPDZ256rm = 14011 |
| 153745 | CEFBS_None, // VMOVUPDZ256rmk = 14012 |
| 153746 | CEFBS_None, // VMOVUPDZ256rmkz = 14013 |
| 153747 | CEFBS_None, // VMOVUPDZ256rr = 14014 |
| 153748 | CEFBS_None, // VMOVUPDZ256rr_REV = 14015 |
| 153749 | CEFBS_None, // VMOVUPDZ256rrk = 14016 |
| 153750 | CEFBS_None, // VMOVUPDZ256rrk_REV = 14017 |
| 153751 | CEFBS_None, // VMOVUPDZ256rrkz = 14018 |
| 153752 | CEFBS_None, // VMOVUPDZ256rrkz_REV = 14019 |
| 153753 | CEFBS_None, // VMOVUPDZmr = 14020 |
| 153754 | CEFBS_None, // VMOVUPDZmrk = 14021 |
| 153755 | CEFBS_None, // VMOVUPDZrm = 14022 |
| 153756 | CEFBS_None, // VMOVUPDZrmk = 14023 |
| 153757 | CEFBS_None, // VMOVUPDZrmkz = 14024 |
| 153758 | CEFBS_None, // VMOVUPDZrr = 14025 |
| 153759 | CEFBS_None, // VMOVUPDZrr_REV = 14026 |
| 153760 | CEFBS_None, // VMOVUPDZrrk = 14027 |
| 153761 | CEFBS_None, // VMOVUPDZrrk_REV = 14028 |
| 153762 | CEFBS_None, // VMOVUPDZrrkz = 14029 |
| 153763 | CEFBS_None, // VMOVUPDZrrkz_REV = 14030 |
| 153764 | CEFBS_None, // VMOVUPDmr = 14031 |
| 153765 | CEFBS_None, // VMOVUPDrm = 14032 |
| 153766 | CEFBS_None, // VMOVUPDrr = 14033 |
| 153767 | CEFBS_None, // VMOVUPDrr_REV = 14034 |
| 153768 | CEFBS_None, // VMOVUPSYmr = 14035 |
| 153769 | CEFBS_None, // VMOVUPSYrm = 14036 |
| 153770 | CEFBS_None, // VMOVUPSYrr = 14037 |
| 153771 | CEFBS_None, // VMOVUPSYrr_REV = 14038 |
| 153772 | CEFBS_None, // VMOVUPSZ128mr = 14039 |
| 153773 | CEFBS_None, // VMOVUPSZ128mrk = 14040 |
| 153774 | CEFBS_None, // VMOVUPSZ128rm = 14041 |
| 153775 | CEFBS_None, // VMOVUPSZ128rmk = 14042 |
| 153776 | CEFBS_None, // VMOVUPSZ128rmkz = 14043 |
| 153777 | CEFBS_None, // VMOVUPSZ128rr = 14044 |
| 153778 | CEFBS_None, // VMOVUPSZ128rr_REV = 14045 |
| 153779 | CEFBS_None, // VMOVUPSZ128rrk = 14046 |
| 153780 | CEFBS_None, // VMOVUPSZ128rrk_REV = 14047 |
| 153781 | CEFBS_None, // VMOVUPSZ128rrkz = 14048 |
| 153782 | CEFBS_None, // VMOVUPSZ128rrkz_REV = 14049 |
| 153783 | CEFBS_None, // VMOVUPSZ256mr = 14050 |
| 153784 | CEFBS_None, // VMOVUPSZ256mrk = 14051 |
| 153785 | CEFBS_None, // VMOVUPSZ256rm = 14052 |
| 153786 | CEFBS_None, // VMOVUPSZ256rmk = 14053 |
| 153787 | CEFBS_None, // VMOVUPSZ256rmkz = 14054 |
| 153788 | CEFBS_None, // VMOVUPSZ256rr = 14055 |
| 153789 | CEFBS_None, // VMOVUPSZ256rr_REV = 14056 |
| 153790 | CEFBS_None, // VMOVUPSZ256rrk = 14057 |
| 153791 | CEFBS_None, // VMOVUPSZ256rrk_REV = 14058 |
| 153792 | CEFBS_None, // VMOVUPSZ256rrkz = 14059 |
| 153793 | CEFBS_None, // VMOVUPSZ256rrkz_REV = 14060 |
| 153794 | CEFBS_None, // VMOVUPSZmr = 14061 |
| 153795 | CEFBS_None, // VMOVUPSZmrk = 14062 |
| 153796 | CEFBS_None, // VMOVUPSZrm = 14063 |
| 153797 | CEFBS_None, // VMOVUPSZrmk = 14064 |
| 153798 | CEFBS_None, // VMOVUPSZrmkz = 14065 |
| 153799 | CEFBS_None, // VMOVUPSZrr = 14066 |
| 153800 | CEFBS_None, // VMOVUPSZrr_REV = 14067 |
| 153801 | CEFBS_None, // VMOVUPSZrrk = 14068 |
| 153802 | CEFBS_None, // VMOVUPSZrrk_REV = 14069 |
| 153803 | CEFBS_None, // VMOVUPSZrrkz = 14070 |
| 153804 | CEFBS_None, // VMOVUPSZrrkz_REV = 14071 |
| 153805 | CEFBS_None, // VMOVUPSmr = 14072 |
| 153806 | CEFBS_None, // VMOVUPSrm = 14073 |
| 153807 | CEFBS_None, // VMOVUPSrr = 14074 |
| 153808 | CEFBS_None, // VMOVUPSrr_REV = 14075 |
| 153809 | CEFBS_None, // VMOVW2SHrr = 14076 |
| 153810 | CEFBS_None, // VMOVW64toSHrr = 14077 |
| 153811 | CEFBS_None, // VMOVWmr = 14078 |
| 153812 | CEFBS_None, // VMOVWrm = 14079 |
| 153813 | CEFBS_None, // VMOVZPDILo2PDIZmr = 14080 |
| 153814 | CEFBS_None, // VMOVZPDILo2PDIZrm = 14081 |
| 153815 | CEFBS_None, // VMOVZPDILo2PDIZrr = 14082 |
| 153816 | CEFBS_None, // VMOVZPDILo2PDIZrr2 = 14083 |
| 153817 | CEFBS_None, // VMOVZPQILo2PQIZrr = 14084 |
| 153818 | CEFBS_None, // VMOVZPQILo2PQIrr = 14085 |
| 153819 | CEFBS_None, // VMOVZPWILo2PWIZmr = 14086 |
| 153820 | CEFBS_None, // VMOVZPWILo2PWIZrm = 14087 |
| 153821 | CEFBS_None, // VMOVZPWILo2PWIZrr = 14088 |
| 153822 | CEFBS_None, // VMOVZPWILo2PWIZrr2 = 14089 |
| 153823 | CEFBS_None, // VMPSADBWYrmi = 14090 |
| 153824 | CEFBS_None, // VMPSADBWYrri = 14091 |
| 153825 | CEFBS_None, // VMPSADBWZ128rmi = 14092 |
| 153826 | CEFBS_None, // VMPSADBWZ128rmik = 14093 |
| 153827 | CEFBS_None, // VMPSADBWZ128rmikz = 14094 |
| 153828 | CEFBS_None, // VMPSADBWZ128rri = 14095 |
| 153829 | CEFBS_None, // VMPSADBWZ128rrik = 14096 |
| 153830 | CEFBS_None, // VMPSADBWZ128rrikz = 14097 |
| 153831 | CEFBS_None, // VMPSADBWZ256rmi = 14098 |
| 153832 | CEFBS_None, // VMPSADBWZ256rmik = 14099 |
| 153833 | CEFBS_None, // VMPSADBWZ256rmikz = 14100 |
| 153834 | CEFBS_None, // VMPSADBWZ256rri = 14101 |
| 153835 | CEFBS_None, // VMPSADBWZ256rrik = 14102 |
| 153836 | CEFBS_None, // VMPSADBWZ256rrikz = 14103 |
| 153837 | CEFBS_None, // VMPSADBWZrmi = 14104 |
| 153838 | CEFBS_None, // VMPSADBWZrmik = 14105 |
| 153839 | CEFBS_None, // VMPSADBWZrmikz = 14106 |
| 153840 | CEFBS_None, // VMPSADBWZrri = 14107 |
| 153841 | CEFBS_None, // VMPSADBWZrrik = 14108 |
| 153842 | CEFBS_None, // VMPSADBWZrrikz = 14109 |
| 153843 | CEFBS_None, // VMPSADBWrmi = 14110 |
| 153844 | CEFBS_None, // VMPSADBWrri = 14111 |
| 153845 | CEFBS_None, // VMPTRLDm = 14112 |
| 153846 | CEFBS_None, // VMPTRSTm = 14113 |
| 153847 | CEFBS_Not64BitMode, // VMREAD32mr = 14114 |
| 153848 | CEFBS_Not64BitMode, // VMREAD32rr = 14115 |
| 153849 | CEFBS_In64BitMode, // VMREAD64mr = 14116 |
| 153850 | CEFBS_In64BitMode, // VMREAD64rr = 14117 |
| 153851 | CEFBS_None, // VMRESUME = 14118 |
| 153852 | CEFBS_Not64BitMode, // VMRUN32 = 14119 |
| 153853 | CEFBS_In64BitMode, // VMRUN64 = 14120 |
| 153854 | CEFBS_Not64BitMode, // VMSAVE32 = 14121 |
| 153855 | CEFBS_In64BitMode, // VMSAVE64 = 14122 |
| 153856 | CEFBS_None, // VMULBF16Z128rm = 14123 |
| 153857 | CEFBS_None, // VMULBF16Z128rmb = 14124 |
| 153858 | CEFBS_None, // VMULBF16Z128rmbk = 14125 |
| 153859 | CEFBS_None, // VMULBF16Z128rmbkz = 14126 |
| 153860 | CEFBS_None, // VMULBF16Z128rmk = 14127 |
| 153861 | CEFBS_None, // VMULBF16Z128rmkz = 14128 |
| 153862 | CEFBS_None, // VMULBF16Z128rr = 14129 |
| 153863 | CEFBS_None, // VMULBF16Z128rrk = 14130 |
| 153864 | CEFBS_None, // VMULBF16Z128rrkz = 14131 |
| 153865 | CEFBS_None, // VMULBF16Z256rm = 14132 |
| 153866 | CEFBS_None, // VMULBF16Z256rmb = 14133 |
| 153867 | CEFBS_None, // VMULBF16Z256rmbk = 14134 |
| 153868 | CEFBS_None, // VMULBF16Z256rmbkz = 14135 |
| 153869 | CEFBS_None, // VMULBF16Z256rmk = 14136 |
| 153870 | CEFBS_None, // VMULBF16Z256rmkz = 14137 |
| 153871 | CEFBS_None, // VMULBF16Z256rr = 14138 |
| 153872 | CEFBS_None, // VMULBF16Z256rrk = 14139 |
| 153873 | CEFBS_None, // VMULBF16Z256rrkz = 14140 |
| 153874 | CEFBS_None, // VMULBF16Zrm = 14141 |
| 153875 | CEFBS_None, // VMULBF16Zrmb = 14142 |
| 153876 | CEFBS_None, // VMULBF16Zrmbk = 14143 |
| 153877 | CEFBS_None, // VMULBF16Zrmbkz = 14144 |
| 153878 | CEFBS_None, // VMULBF16Zrmk = 14145 |
| 153879 | CEFBS_None, // VMULBF16Zrmkz = 14146 |
| 153880 | CEFBS_None, // VMULBF16Zrr = 14147 |
| 153881 | CEFBS_None, // VMULBF16Zrrk = 14148 |
| 153882 | CEFBS_None, // VMULBF16Zrrkz = 14149 |
| 153883 | CEFBS_None, // VMULPDYrm = 14150 |
| 153884 | CEFBS_None, // VMULPDYrr = 14151 |
| 153885 | CEFBS_None, // VMULPDZ128rm = 14152 |
| 153886 | CEFBS_None, // VMULPDZ128rmb = 14153 |
| 153887 | CEFBS_None, // VMULPDZ128rmbk = 14154 |
| 153888 | CEFBS_None, // VMULPDZ128rmbkz = 14155 |
| 153889 | CEFBS_None, // VMULPDZ128rmk = 14156 |
| 153890 | CEFBS_None, // VMULPDZ128rmkz = 14157 |
| 153891 | CEFBS_None, // VMULPDZ128rr = 14158 |
| 153892 | CEFBS_None, // VMULPDZ128rrk = 14159 |
| 153893 | CEFBS_None, // VMULPDZ128rrkz = 14160 |
| 153894 | CEFBS_None, // VMULPDZ256rm = 14161 |
| 153895 | CEFBS_None, // VMULPDZ256rmb = 14162 |
| 153896 | CEFBS_None, // VMULPDZ256rmbk = 14163 |
| 153897 | CEFBS_None, // VMULPDZ256rmbkz = 14164 |
| 153898 | CEFBS_None, // VMULPDZ256rmk = 14165 |
| 153899 | CEFBS_None, // VMULPDZ256rmkz = 14166 |
| 153900 | CEFBS_None, // VMULPDZ256rr = 14167 |
| 153901 | CEFBS_None, // VMULPDZ256rrk = 14168 |
| 153902 | CEFBS_None, // VMULPDZ256rrkz = 14169 |
| 153903 | CEFBS_None, // VMULPDZrm = 14170 |
| 153904 | CEFBS_None, // VMULPDZrmb = 14171 |
| 153905 | CEFBS_None, // VMULPDZrmbk = 14172 |
| 153906 | CEFBS_None, // VMULPDZrmbkz = 14173 |
| 153907 | CEFBS_None, // VMULPDZrmk = 14174 |
| 153908 | CEFBS_None, // VMULPDZrmkz = 14175 |
| 153909 | CEFBS_None, // VMULPDZrr = 14176 |
| 153910 | CEFBS_None, // VMULPDZrrb = 14177 |
| 153911 | CEFBS_None, // VMULPDZrrbk = 14178 |
| 153912 | CEFBS_None, // VMULPDZrrbkz = 14179 |
| 153913 | CEFBS_None, // VMULPDZrrk = 14180 |
| 153914 | CEFBS_None, // VMULPDZrrkz = 14181 |
| 153915 | CEFBS_None, // VMULPDrm = 14182 |
| 153916 | CEFBS_None, // VMULPDrr = 14183 |
| 153917 | CEFBS_None, // VMULPHZ128rm = 14184 |
| 153918 | CEFBS_None, // VMULPHZ128rmb = 14185 |
| 153919 | CEFBS_None, // VMULPHZ128rmbk = 14186 |
| 153920 | CEFBS_None, // VMULPHZ128rmbkz = 14187 |
| 153921 | CEFBS_None, // VMULPHZ128rmk = 14188 |
| 153922 | CEFBS_None, // VMULPHZ128rmkz = 14189 |
| 153923 | CEFBS_None, // VMULPHZ128rr = 14190 |
| 153924 | CEFBS_None, // VMULPHZ128rrk = 14191 |
| 153925 | CEFBS_None, // VMULPHZ128rrkz = 14192 |
| 153926 | CEFBS_None, // VMULPHZ256rm = 14193 |
| 153927 | CEFBS_None, // VMULPHZ256rmb = 14194 |
| 153928 | CEFBS_None, // VMULPHZ256rmbk = 14195 |
| 153929 | CEFBS_None, // VMULPHZ256rmbkz = 14196 |
| 153930 | CEFBS_None, // VMULPHZ256rmk = 14197 |
| 153931 | CEFBS_None, // VMULPHZ256rmkz = 14198 |
| 153932 | CEFBS_None, // VMULPHZ256rr = 14199 |
| 153933 | CEFBS_None, // VMULPHZ256rrk = 14200 |
| 153934 | CEFBS_None, // VMULPHZ256rrkz = 14201 |
| 153935 | CEFBS_None, // VMULPHZrm = 14202 |
| 153936 | CEFBS_None, // VMULPHZrmb = 14203 |
| 153937 | CEFBS_None, // VMULPHZrmbk = 14204 |
| 153938 | CEFBS_None, // VMULPHZrmbkz = 14205 |
| 153939 | CEFBS_None, // VMULPHZrmk = 14206 |
| 153940 | CEFBS_None, // VMULPHZrmkz = 14207 |
| 153941 | CEFBS_None, // VMULPHZrr = 14208 |
| 153942 | CEFBS_None, // VMULPHZrrb = 14209 |
| 153943 | CEFBS_None, // VMULPHZrrbk = 14210 |
| 153944 | CEFBS_None, // VMULPHZrrbkz = 14211 |
| 153945 | CEFBS_None, // VMULPHZrrk = 14212 |
| 153946 | CEFBS_None, // VMULPHZrrkz = 14213 |
| 153947 | CEFBS_None, // VMULPSYrm = 14214 |
| 153948 | CEFBS_None, // VMULPSYrr = 14215 |
| 153949 | CEFBS_None, // VMULPSZ128rm = 14216 |
| 153950 | CEFBS_None, // VMULPSZ128rmb = 14217 |
| 153951 | CEFBS_None, // VMULPSZ128rmbk = 14218 |
| 153952 | CEFBS_None, // VMULPSZ128rmbkz = 14219 |
| 153953 | CEFBS_None, // VMULPSZ128rmk = 14220 |
| 153954 | CEFBS_None, // VMULPSZ128rmkz = 14221 |
| 153955 | CEFBS_None, // VMULPSZ128rr = 14222 |
| 153956 | CEFBS_None, // VMULPSZ128rrk = 14223 |
| 153957 | CEFBS_None, // VMULPSZ128rrkz = 14224 |
| 153958 | CEFBS_None, // VMULPSZ256rm = 14225 |
| 153959 | CEFBS_None, // VMULPSZ256rmb = 14226 |
| 153960 | CEFBS_None, // VMULPSZ256rmbk = 14227 |
| 153961 | CEFBS_None, // VMULPSZ256rmbkz = 14228 |
| 153962 | CEFBS_None, // VMULPSZ256rmk = 14229 |
| 153963 | CEFBS_None, // VMULPSZ256rmkz = 14230 |
| 153964 | CEFBS_None, // VMULPSZ256rr = 14231 |
| 153965 | CEFBS_None, // VMULPSZ256rrk = 14232 |
| 153966 | CEFBS_None, // VMULPSZ256rrkz = 14233 |
| 153967 | CEFBS_None, // VMULPSZrm = 14234 |
| 153968 | CEFBS_None, // VMULPSZrmb = 14235 |
| 153969 | CEFBS_None, // VMULPSZrmbk = 14236 |
| 153970 | CEFBS_None, // VMULPSZrmbkz = 14237 |
| 153971 | CEFBS_None, // VMULPSZrmk = 14238 |
| 153972 | CEFBS_None, // VMULPSZrmkz = 14239 |
| 153973 | CEFBS_None, // VMULPSZrr = 14240 |
| 153974 | CEFBS_None, // VMULPSZrrb = 14241 |
| 153975 | CEFBS_None, // VMULPSZrrbk = 14242 |
| 153976 | CEFBS_None, // VMULPSZrrbkz = 14243 |
| 153977 | CEFBS_None, // VMULPSZrrk = 14244 |
| 153978 | CEFBS_None, // VMULPSZrrkz = 14245 |
| 153979 | CEFBS_None, // VMULPSrm = 14246 |
| 153980 | CEFBS_None, // VMULPSrr = 14247 |
| 153981 | CEFBS_None, // VMULSDZrm = 14248 |
| 153982 | CEFBS_None, // VMULSDZrm_Int = 14249 |
| 153983 | CEFBS_None, // VMULSDZrmk_Int = 14250 |
| 153984 | CEFBS_None, // VMULSDZrmkz_Int = 14251 |
| 153985 | CEFBS_None, // VMULSDZrr = 14252 |
| 153986 | CEFBS_None, // VMULSDZrr_Int = 14253 |
| 153987 | CEFBS_None, // VMULSDZrrb_Int = 14254 |
| 153988 | CEFBS_None, // VMULSDZrrbk_Int = 14255 |
| 153989 | CEFBS_None, // VMULSDZrrbkz_Int = 14256 |
| 153990 | CEFBS_None, // VMULSDZrrk_Int = 14257 |
| 153991 | CEFBS_None, // VMULSDZrrkz_Int = 14258 |
| 153992 | CEFBS_None, // VMULSDrm = 14259 |
| 153993 | CEFBS_None, // VMULSDrm_Int = 14260 |
| 153994 | CEFBS_None, // VMULSDrr = 14261 |
| 153995 | CEFBS_None, // VMULSDrr_Int = 14262 |
| 153996 | CEFBS_None, // VMULSHZrm = 14263 |
| 153997 | CEFBS_None, // VMULSHZrm_Int = 14264 |
| 153998 | CEFBS_None, // VMULSHZrmk_Int = 14265 |
| 153999 | CEFBS_None, // VMULSHZrmkz_Int = 14266 |
| 154000 | CEFBS_None, // VMULSHZrr = 14267 |
| 154001 | CEFBS_None, // VMULSHZrr_Int = 14268 |
| 154002 | CEFBS_None, // VMULSHZrrb_Int = 14269 |
| 154003 | CEFBS_None, // VMULSHZrrbk_Int = 14270 |
| 154004 | CEFBS_None, // VMULSHZrrbkz_Int = 14271 |
| 154005 | CEFBS_None, // VMULSHZrrk_Int = 14272 |
| 154006 | CEFBS_None, // VMULSHZrrkz_Int = 14273 |
| 154007 | CEFBS_None, // VMULSSZrm = 14274 |
| 154008 | CEFBS_None, // VMULSSZrm_Int = 14275 |
| 154009 | CEFBS_None, // VMULSSZrmk_Int = 14276 |
| 154010 | CEFBS_None, // VMULSSZrmkz_Int = 14277 |
| 154011 | CEFBS_None, // VMULSSZrr = 14278 |
| 154012 | CEFBS_None, // VMULSSZrr_Int = 14279 |
| 154013 | CEFBS_None, // VMULSSZrrb_Int = 14280 |
| 154014 | CEFBS_None, // VMULSSZrrbk_Int = 14281 |
| 154015 | CEFBS_None, // VMULSSZrrbkz_Int = 14282 |
| 154016 | CEFBS_None, // VMULSSZrrk_Int = 14283 |
| 154017 | CEFBS_None, // VMULSSZrrkz_Int = 14284 |
| 154018 | CEFBS_None, // VMULSSrm = 14285 |
| 154019 | CEFBS_None, // VMULSSrm_Int = 14286 |
| 154020 | CEFBS_None, // VMULSSrr = 14287 |
| 154021 | CEFBS_None, // VMULSSrr_Int = 14288 |
| 154022 | CEFBS_Not64BitMode, // VMWRITE32rm = 14289 |
| 154023 | CEFBS_Not64BitMode, // VMWRITE32rr = 14290 |
| 154024 | CEFBS_In64BitMode, // VMWRITE64rm = 14291 |
| 154025 | CEFBS_In64BitMode, // VMWRITE64rr = 14292 |
| 154026 | CEFBS_None, // VMXOFF = 14293 |
| 154027 | CEFBS_None, // VMXON = 14294 |
| 154028 | CEFBS_None, // VORPDYrm = 14295 |
| 154029 | CEFBS_None, // VORPDYrr = 14296 |
| 154030 | CEFBS_None, // VORPDZ128rm = 14297 |
| 154031 | CEFBS_None, // VORPDZ128rmb = 14298 |
| 154032 | CEFBS_None, // VORPDZ128rmbk = 14299 |
| 154033 | CEFBS_None, // VORPDZ128rmbkz = 14300 |
| 154034 | CEFBS_None, // VORPDZ128rmk = 14301 |
| 154035 | CEFBS_None, // VORPDZ128rmkz = 14302 |
| 154036 | CEFBS_None, // VORPDZ128rr = 14303 |
| 154037 | CEFBS_None, // VORPDZ128rrk = 14304 |
| 154038 | CEFBS_None, // VORPDZ128rrkz = 14305 |
| 154039 | CEFBS_None, // VORPDZ256rm = 14306 |
| 154040 | CEFBS_None, // VORPDZ256rmb = 14307 |
| 154041 | CEFBS_None, // VORPDZ256rmbk = 14308 |
| 154042 | CEFBS_None, // VORPDZ256rmbkz = 14309 |
| 154043 | CEFBS_None, // VORPDZ256rmk = 14310 |
| 154044 | CEFBS_None, // VORPDZ256rmkz = 14311 |
| 154045 | CEFBS_None, // VORPDZ256rr = 14312 |
| 154046 | CEFBS_None, // VORPDZ256rrk = 14313 |
| 154047 | CEFBS_None, // VORPDZ256rrkz = 14314 |
| 154048 | CEFBS_None, // VORPDZrm = 14315 |
| 154049 | CEFBS_None, // VORPDZrmb = 14316 |
| 154050 | CEFBS_None, // VORPDZrmbk = 14317 |
| 154051 | CEFBS_None, // VORPDZrmbkz = 14318 |
| 154052 | CEFBS_None, // VORPDZrmk = 14319 |
| 154053 | CEFBS_None, // VORPDZrmkz = 14320 |
| 154054 | CEFBS_None, // VORPDZrr = 14321 |
| 154055 | CEFBS_None, // VORPDZrrk = 14322 |
| 154056 | CEFBS_None, // VORPDZrrkz = 14323 |
| 154057 | CEFBS_None, // VORPDrm = 14324 |
| 154058 | CEFBS_None, // VORPDrr = 14325 |
| 154059 | CEFBS_None, // VORPSYrm = 14326 |
| 154060 | CEFBS_None, // VORPSYrr = 14327 |
| 154061 | CEFBS_None, // VORPSZ128rm = 14328 |
| 154062 | CEFBS_None, // VORPSZ128rmb = 14329 |
| 154063 | CEFBS_None, // VORPSZ128rmbk = 14330 |
| 154064 | CEFBS_None, // VORPSZ128rmbkz = 14331 |
| 154065 | CEFBS_None, // VORPSZ128rmk = 14332 |
| 154066 | CEFBS_None, // VORPSZ128rmkz = 14333 |
| 154067 | CEFBS_None, // VORPSZ128rr = 14334 |
| 154068 | CEFBS_None, // VORPSZ128rrk = 14335 |
| 154069 | CEFBS_None, // VORPSZ128rrkz = 14336 |
| 154070 | CEFBS_None, // VORPSZ256rm = 14337 |
| 154071 | CEFBS_None, // VORPSZ256rmb = 14338 |
| 154072 | CEFBS_None, // VORPSZ256rmbk = 14339 |
| 154073 | CEFBS_None, // VORPSZ256rmbkz = 14340 |
| 154074 | CEFBS_None, // VORPSZ256rmk = 14341 |
| 154075 | CEFBS_None, // VORPSZ256rmkz = 14342 |
| 154076 | CEFBS_None, // VORPSZ256rr = 14343 |
| 154077 | CEFBS_None, // VORPSZ256rrk = 14344 |
| 154078 | CEFBS_None, // VORPSZ256rrkz = 14345 |
| 154079 | CEFBS_None, // VORPSZrm = 14346 |
| 154080 | CEFBS_None, // VORPSZrmb = 14347 |
| 154081 | CEFBS_None, // VORPSZrmbk = 14348 |
| 154082 | CEFBS_None, // VORPSZrmbkz = 14349 |
| 154083 | CEFBS_None, // VORPSZrmk = 14350 |
| 154084 | CEFBS_None, // VORPSZrmkz = 14351 |
| 154085 | CEFBS_None, // VORPSZrr = 14352 |
| 154086 | CEFBS_None, // VORPSZrrk = 14353 |
| 154087 | CEFBS_None, // VORPSZrrkz = 14354 |
| 154088 | CEFBS_None, // VORPSrm = 14355 |
| 154089 | CEFBS_None, // VORPSrr = 14356 |
| 154090 | CEFBS_None, // VP2INTERSECTDZ128rm = 14357 |
| 154091 | CEFBS_None, // VP2INTERSECTDZ128rmb = 14358 |
| 154092 | CEFBS_None, // VP2INTERSECTDZ128rr = 14359 |
| 154093 | CEFBS_None, // VP2INTERSECTDZ256rm = 14360 |
| 154094 | CEFBS_None, // VP2INTERSECTDZ256rmb = 14361 |
| 154095 | CEFBS_None, // VP2INTERSECTDZ256rr = 14362 |
| 154096 | CEFBS_None, // VP2INTERSECTDZrm = 14363 |
| 154097 | CEFBS_None, // VP2INTERSECTDZrmb = 14364 |
| 154098 | CEFBS_None, // VP2INTERSECTDZrr = 14365 |
| 154099 | CEFBS_None, // VP2INTERSECTQZ128rm = 14366 |
| 154100 | CEFBS_None, // VP2INTERSECTQZ128rmb = 14367 |
| 154101 | CEFBS_None, // VP2INTERSECTQZ128rr = 14368 |
| 154102 | CEFBS_None, // VP2INTERSECTQZ256rm = 14369 |
| 154103 | CEFBS_None, // VP2INTERSECTQZ256rmb = 14370 |
| 154104 | CEFBS_None, // VP2INTERSECTQZ256rr = 14371 |
| 154105 | CEFBS_None, // VP2INTERSECTQZrm = 14372 |
| 154106 | CEFBS_None, // VP2INTERSECTQZrmb = 14373 |
| 154107 | CEFBS_None, // VP2INTERSECTQZrr = 14374 |
| 154108 | CEFBS_None, // VP4DPWSSDSrm = 14375 |
| 154109 | CEFBS_None, // VP4DPWSSDSrmk = 14376 |
| 154110 | CEFBS_None, // VP4DPWSSDSrmkz = 14377 |
| 154111 | CEFBS_None, // VP4DPWSSDrm = 14378 |
| 154112 | CEFBS_None, // VP4DPWSSDrmk = 14379 |
| 154113 | CEFBS_None, // VP4DPWSSDrmkz = 14380 |
| 154114 | CEFBS_None, // VPABSBYrm = 14381 |
| 154115 | CEFBS_None, // VPABSBYrr = 14382 |
| 154116 | CEFBS_None, // VPABSBZ128rm = 14383 |
| 154117 | CEFBS_None, // VPABSBZ128rmk = 14384 |
| 154118 | CEFBS_None, // VPABSBZ128rmkz = 14385 |
| 154119 | CEFBS_None, // VPABSBZ128rr = 14386 |
| 154120 | CEFBS_None, // VPABSBZ128rrk = 14387 |
| 154121 | CEFBS_None, // VPABSBZ128rrkz = 14388 |
| 154122 | CEFBS_None, // VPABSBZ256rm = 14389 |
| 154123 | CEFBS_None, // VPABSBZ256rmk = 14390 |
| 154124 | CEFBS_None, // VPABSBZ256rmkz = 14391 |
| 154125 | CEFBS_None, // VPABSBZ256rr = 14392 |
| 154126 | CEFBS_None, // VPABSBZ256rrk = 14393 |
| 154127 | CEFBS_None, // VPABSBZ256rrkz = 14394 |
| 154128 | CEFBS_None, // VPABSBZrm = 14395 |
| 154129 | CEFBS_None, // VPABSBZrmk = 14396 |
| 154130 | CEFBS_None, // VPABSBZrmkz = 14397 |
| 154131 | CEFBS_None, // VPABSBZrr = 14398 |
| 154132 | CEFBS_None, // VPABSBZrrk = 14399 |
| 154133 | CEFBS_None, // VPABSBZrrkz = 14400 |
| 154134 | CEFBS_None, // VPABSBrm = 14401 |
| 154135 | CEFBS_None, // VPABSBrr = 14402 |
| 154136 | CEFBS_None, // VPABSDYrm = 14403 |
| 154137 | CEFBS_None, // VPABSDYrr = 14404 |
| 154138 | CEFBS_None, // VPABSDZ128rm = 14405 |
| 154139 | CEFBS_None, // VPABSDZ128rmb = 14406 |
| 154140 | CEFBS_None, // VPABSDZ128rmbk = 14407 |
| 154141 | CEFBS_None, // VPABSDZ128rmbkz = 14408 |
| 154142 | CEFBS_None, // VPABSDZ128rmk = 14409 |
| 154143 | CEFBS_None, // VPABSDZ128rmkz = 14410 |
| 154144 | CEFBS_None, // VPABSDZ128rr = 14411 |
| 154145 | CEFBS_None, // VPABSDZ128rrk = 14412 |
| 154146 | CEFBS_None, // VPABSDZ128rrkz = 14413 |
| 154147 | CEFBS_None, // VPABSDZ256rm = 14414 |
| 154148 | CEFBS_None, // VPABSDZ256rmb = 14415 |
| 154149 | CEFBS_None, // VPABSDZ256rmbk = 14416 |
| 154150 | CEFBS_None, // VPABSDZ256rmbkz = 14417 |
| 154151 | CEFBS_None, // VPABSDZ256rmk = 14418 |
| 154152 | CEFBS_None, // VPABSDZ256rmkz = 14419 |
| 154153 | CEFBS_None, // VPABSDZ256rr = 14420 |
| 154154 | CEFBS_None, // VPABSDZ256rrk = 14421 |
| 154155 | CEFBS_None, // VPABSDZ256rrkz = 14422 |
| 154156 | CEFBS_None, // VPABSDZrm = 14423 |
| 154157 | CEFBS_None, // VPABSDZrmb = 14424 |
| 154158 | CEFBS_None, // VPABSDZrmbk = 14425 |
| 154159 | CEFBS_None, // VPABSDZrmbkz = 14426 |
| 154160 | CEFBS_None, // VPABSDZrmk = 14427 |
| 154161 | CEFBS_None, // VPABSDZrmkz = 14428 |
| 154162 | CEFBS_None, // VPABSDZrr = 14429 |
| 154163 | CEFBS_None, // VPABSDZrrk = 14430 |
| 154164 | CEFBS_None, // VPABSDZrrkz = 14431 |
| 154165 | CEFBS_None, // VPABSDrm = 14432 |
| 154166 | CEFBS_None, // VPABSDrr = 14433 |
| 154167 | CEFBS_None, // VPABSQZ128rm = 14434 |
| 154168 | CEFBS_None, // VPABSQZ128rmb = 14435 |
| 154169 | CEFBS_None, // VPABSQZ128rmbk = 14436 |
| 154170 | CEFBS_None, // VPABSQZ128rmbkz = 14437 |
| 154171 | CEFBS_None, // VPABSQZ128rmk = 14438 |
| 154172 | CEFBS_None, // VPABSQZ128rmkz = 14439 |
| 154173 | CEFBS_None, // VPABSQZ128rr = 14440 |
| 154174 | CEFBS_None, // VPABSQZ128rrk = 14441 |
| 154175 | CEFBS_None, // VPABSQZ128rrkz = 14442 |
| 154176 | CEFBS_None, // VPABSQZ256rm = 14443 |
| 154177 | CEFBS_None, // VPABSQZ256rmb = 14444 |
| 154178 | CEFBS_None, // VPABSQZ256rmbk = 14445 |
| 154179 | CEFBS_None, // VPABSQZ256rmbkz = 14446 |
| 154180 | CEFBS_None, // VPABSQZ256rmk = 14447 |
| 154181 | CEFBS_None, // VPABSQZ256rmkz = 14448 |
| 154182 | CEFBS_None, // VPABSQZ256rr = 14449 |
| 154183 | CEFBS_None, // VPABSQZ256rrk = 14450 |
| 154184 | CEFBS_None, // VPABSQZ256rrkz = 14451 |
| 154185 | CEFBS_None, // VPABSQZrm = 14452 |
| 154186 | CEFBS_None, // VPABSQZrmb = 14453 |
| 154187 | CEFBS_None, // VPABSQZrmbk = 14454 |
| 154188 | CEFBS_None, // VPABSQZrmbkz = 14455 |
| 154189 | CEFBS_None, // VPABSQZrmk = 14456 |
| 154190 | CEFBS_None, // VPABSQZrmkz = 14457 |
| 154191 | CEFBS_None, // VPABSQZrr = 14458 |
| 154192 | CEFBS_None, // VPABSQZrrk = 14459 |
| 154193 | CEFBS_None, // VPABSQZrrkz = 14460 |
| 154194 | CEFBS_None, // VPABSWYrm = 14461 |
| 154195 | CEFBS_None, // VPABSWYrr = 14462 |
| 154196 | CEFBS_None, // VPABSWZ128rm = 14463 |
| 154197 | CEFBS_None, // VPABSWZ128rmk = 14464 |
| 154198 | CEFBS_None, // VPABSWZ128rmkz = 14465 |
| 154199 | CEFBS_None, // VPABSWZ128rr = 14466 |
| 154200 | CEFBS_None, // VPABSWZ128rrk = 14467 |
| 154201 | CEFBS_None, // VPABSWZ128rrkz = 14468 |
| 154202 | CEFBS_None, // VPABSWZ256rm = 14469 |
| 154203 | CEFBS_None, // VPABSWZ256rmk = 14470 |
| 154204 | CEFBS_None, // VPABSWZ256rmkz = 14471 |
| 154205 | CEFBS_None, // VPABSWZ256rr = 14472 |
| 154206 | CEFBS_None, // VPABSWZ256rrk = 14473 |
| 154207 | CEFBS_None, // VPABSWZ256rrkz = 14474 |
| 154208 | CEFBS_None, // VPABSWZrm = 14475 |
| 154209 | CEFBS_None, // VPABSWZrmk = 14476 |
| 154210 | CEFBS_None, // VPABSWZrmkz = 14477 |
| 154211 | CEFBS_None, // VPABSWZrr = 14478 |
| 154212 | CEFBS_None, // VPABSWZrrk = 14479 |
| 154213 | CEFBS_None, // VPABSWZrrkz = 14480 |
| 154214 | CEFBS_None, // VPABSWrm = 14481 |
| 154215 | CEFBS_None, // VPABSWrr = 14482 |
| 154216 | CEFBS_None, // VPACKSSDWYrm = 14483 |
| 154217 | CEFBS_None, // VPACKSSDWYrr = 14484 |
| 154218 | CEFBS_None, // VPACKSSDWZ128rm = 14485 |
| 154219 | CEFBS_None, // VPACKSSDWZ128rmb = 14486 |
| 154220 | CEFBS_None, // VPACKSSDWZ128rmbk = 14487 |
| 154221 | CEFBS_None, // VPACKSSDWZ128rmbkz = 14488 |
| 154222 | CEFBS_None, // VPACKSSDWZ128rmk = 14489 |
| 154223 | CEFBS_None, // VPACKSSDWZ128rmkz = 14490 |
| 154224 | CEFBS_None, // VPACKSSDWZ128rr = 14491 |
| 154225 | CEFBS_None, // VPACKSSDWZ128rrk = 14492 |
| 154226 | CEFBS_None, // VPACKSSDWZ128rrkz = 14493 |
| 154227 | CEFBS_None, // VPACKSSDWZ256rm = 14494 |
| 154228 | CEFBS_None, // VPACKSSDWZ256rmb = 14495 |
| 154229 | CEFBS_None, // VPACKSSDWZ256rmbk = 14496 |
| 154230 | CEFBS_None, // VPACKSSDWZ256rmbkz = 14497 |
| 154231 | CEFBS_None, // VPACKSSDWZ256rmk = 14498 |
| 154232 | CEFBS_None, // VPACKSSDWZ256rmkz = 14499 |
| 154233 | CEFBS_None, // VPACKSSDWZ256rr = 14500 |
| 154234 | CEFBS_None, // VPACKSSDWZ256rrk = 14501 |
| 154235 | CEFBS_None, // VPACKSSDWZ256rrkz = 14502 |
| 154236 | CEFBS_None, // VPACKSSDWZrm = 14503 |
| 154237 | CEFBS_None, // VPACKSSDWZrmb = 14504 |
| 154238 | CEFBS_None, // VPACKSSDWZrmbk = 14505 |
| 154239 | CEFBS_None, // VPACKSSDWZrmbkz = 14506 |
| 154240 | CEFBS_None, // VPACKSSDWZrmk = 14507 |
| 154241 | CEFBS_None, // VPACKSSDWZrmkz = 14508 |
| 154242 | CEFBS_None, // VPACKSSDWZrr = 14509 |
| 154243 | CEFBS_None, // VPACKSSDWZrrk = 14510 |
| 154244 | CEFBS_None, // VPACKSSDWZrrkz = 14511 |
| 154245 | CEFBS_None, // VPACKSSDWrm = 14512 |
| 154246 | CEFBS_None, // VPACKSSDWrr = 14513 |
| 154247 | CEFBS_None, // VPACKSSWBYrm = 14514 |
| 154248 | CEFBS_None, // VPACKSSWBYrr = 14515 |
| 154249 | CEFBS_None, // VPACKSSWBZ128rm = 14516 |
| 154250 | CEFBS_None, // VPACKSSWBZ128rmk = 14517 |
| 154251 | CEFBS_None, // VPACKSSWBZ128rmkz = 14518 |
| 154252 | CEFBS_None, // VPACKSSWBZ128rr = 14519 |
| 154253 | CEFBS_None, // VPACKSSWBZ128rrk = 14520 |
| 154254 | CEFBS_None, // VPACKSSWBZ128rrkz = 14521 |
| 154255 | CEFBS_None, // VPACKSSWBZ256rm = 14522 |
| 154256 | CEFBS_None, // VPACKSSWBZ256rmk = 14523 |
| 154257 | CEFBS_None, // VPACKSSWBZ256rmkz = 14524 |
| 154258 | CEFBS_None, // VPACKSSWBZ256rr = 14525 |
| 154259 | CEFBS_None, // VPACKSSWBZ256rrk = 14526 |
| 154260 | CEFBS_None, // VPACKSSWBZ256rrkz = 14527 |
| 154261 | CEFBS_None, // VPACKSSWBZrm = 14528 |
| 154262 | CEFBS_None, // VPACKSSWBZrmk = 14529 |
| 154263 | CEFBS_None, // VPACKSSWBZrmkz = 14530 |
| 154264 | CEFBS_None, // VPACKSSWBZrr = 14531 |
| 154265 | CEFBS_None, // VPACKSSWBZrrk = 14532 |
| 154266 | CEFBS_None, // VPACKSSWBZrrkz = 14533 |
| 154267 | CEFBS_None, // VPACKSSWBrm = 14534 |
| 154268 | CEFBS_None, // VPACKSSWBrr = 14535 |
| 154269 | CEFBS_None, // VPACKUSDWYrm = 14536 |
| 154270 | CEFBS_None, // VPACKUSDWYrr = 14537 |
| 154271 | CEFBS_None, // VPACKUSDWZ128rm = 14538 |
| 154272 | CEFBS_None, // VPACKUSDWZ128rmb = 14539 |
| 154273 | CEFBS_None, // VPACKUSDWZ128rmbk = 14540 |
| 154274 | CEFBS_None, // VPACKUSDWZ128rmbkz = 14541 |
| 154275 | CEFBS_None, // VPACKUSDWZ128rmk = 14542 |
| 154276 | CEFBS_None, // VPACKUSDWZ128rmkz = 14543 |
| 154277 | CEFBS_None, // VPACKUSDWZ128rr = 14544 |
| 154278 | CEFBS_None, // VPACKUSDWZ128rrk = 14545 |
| 154279 | CEFBS_None, // VPACKUSDWZ128rrkz = 14546 |
| 154280 | CEFBS_None, // VPACKUSDWZ256rm = 14547 |
| 154281 | CEFBS_None, // VPACKUSDWZ256rmb = 14548 |
| 154282 | CEFBS_None, // VPACKUSDWZ256rmbk = 14549 |
| 154283 | CEFBS_None, // VPACKUSDWZ256rmbkz = 14550 |
| 154284 | CEFBS_None, // VPACKUSDWZ256rmk = 14551 |
| 154285 | CEFBS_None, // VPACKUSDWZ256rmkz = 14552 |
| 154286 | CEFBS_None, // VPACKUSDWZ256rr = 14553 |
| 154287 | CEFBS_None, // VPACKUSDWZ256rrk = 14554 |
| 154288 | CEFBS_None, // VPACKUSDWZ256rrkz = 14555 |
| 154289 | CEFBS_None, // VPACKUSDWZrm = 14556 |
| 154290 | CEFBS_None, // VPACKUSDWZrmb = 14557 |
| 154291 | CEFBS_None, // VPACKUSDWZrmbk = 14558 |
| 154292 | CEFBS_None, // VPACKUSDWZrmbkz = 14559 |
| 154293 | CEFBS_None, // VPACKUSDWZrmk = 14560 |
| 154294 | CEFBS_None, // VPACKUSDWZrmkz = 14561 |
| 154295 | CEFBS_None, // VPACKUSDWZrr = 14562 |
| 154296 | CEFBS_None, // VPACKUSDWZrrk = 14563 |
| 154297 | CEFBS_None, // VPACKUSDWZrrkz = 14564 |
| 154298 | CEFBS_None, // VPACKUSDWrm = 14565 |
| 154299 | CEFBS_None, // VPACKUSDWrr = 14566 |
| 154300 | CEFBS_None, // VPACKUSWBYrm = 14567 |
| 154301 | CEFBS_None, // VPACKUSWBYrr = 14568 |
| 154302 | CEFBS_None, // VPACKUSWBZ128rm = 14569 |
| 154303 | CEFBS_None, // VPACKUSWBZ128rmk = 14570 |
| 154304 | CEFBS_None, // VPACKUSWBZ128rmkz = 14571 |
| 154305 | CEFBS_None, // VPACKUSWBZ128rr = 14572 |
| 154306 | CEFBS_None, // VPACKUSWBZ128rrk = 14573 |
| 154307 | CEFBS_None, // VPACKUSWBZ128rrkz = 14574 |
| 154308 | CEFBS_None, // VPACKUSWBZ256rm = 14575 |
| 154309 | CEFBS_None, // VPACKUSWBZ256rmk = 14576 |
| 154310 | CEFBS_None, // VPACKUSWBZ256rmkz = 14577 |
| 154311 | CEFBS_None, // VPACKUSWBZ256rr = 14578 |
| 154312 | CEFBS_None, // VPACKUSWBZ256rrk = 14579 |
| 154313 | CEFBS_None, // VPACKUSWBZ256rrkz = 14580 |
| 154314 | CEFBS_None, // VPACKUSWBZrm = 14581 |
| 154315 | CEFBS_None, // VPACKUSWBZrmk = 14582 |
| 154316 | CEFBS_None, // VPACKUSWBZrmkz = 14583 |
| 154317 | CEFBS_None, // VPACKUSWBZrr = 14584 |
| 154318 | CEFBS_None, // VPACKUSWBZrrk = 14585 |
| 154319 | CEFBS_None, // VPACKUSWBZrrkz = 14586 |
| 154320 | CEFBS_None, // VPACKUSWBrm = 14587 |
| 154321 | CEFBS_None, // VPACKUSWBrr = 14588 |
| 154322 | CEFBS_None, // VPADDBYrm = 14589 |
| 154323 | CEFBS_None, // VPADDBYrr = 14590 |
| 154324 | CEFBS_None, // VPADDBZ128rm = 14591 |
| 154325 | CEFBS_None, // VPADDBZ128rmk = 14592 |
| 154326 | CEFBS_None, // VPADDBZ128rmkz = 14593 |
| 154327 | CEFBS_None, // VPADDBZ128rr = 14594 |
| 154328 | CEFBS_None, // VPADDBZ128rrk = 14595 |
| 154329 | CEFBS_None, // VPADDBZ128rrkz = 14596 |
| 154330 | CEFBS_None, // VPADDBZ256rm = 14597 |
| 154331 | CEFBS_None, // VPADDBZ256rmk = 14598 |
| 154332 | CEFBS_None, // VPADDBZ256rmkz = 14599 |
| 154333 | CEFBS_None, // VPADDBZ256rr = 14600 |
| 154334 | CEFBS_None, // VPADDBZ256rrk = 14601 |
| 154335 | CEFBS_None, // VPADDBZ256rrkz = 14602 |
| 154336 | CEFBS_None, // VPADDBZrm = 14603 |
| 154337 | CEFBS_None, // VPADDBZrmk = 14604 |
| 154338 | CEFBS_None, // VPADDBZrmkz = 14605 |
| 154339 | CEFBS_None, // VPADDBZrr = 14606 |
| 154340 | CEFBS_None, // VPADDBZrrk = 14607 |
| 154341 | CEFBS_None, // VPADDBZrrkz = 14608 |
| 154342 | CEFBS_None, // VPADDBrm = 14609 |
| 154343 | CEFBS_None, // VPADDBrr = 14610 |
| 154344 | CEFBS_None, // VPADDDYrm = 14611 |
| 154345 | CEFBS_None, // VPADDDYrr = 14612 |
| 154346 | CEFBS_None, // VPADDDZ128rm = 14613 |
| 154347 | CEFBS_None, // VPADDDZ128rmb = 14614 |
| 154348 | CEFBS_None, // VPADDDZ128rmbk = 14615 |
| 154349 | CEFBS_None, // VPADDDZ128rmbkz = 14616 |
| 154350 | CEFBS_None, // VPADDDZ128rmk = 14617 |
| 154351 | CEFBS_None, // VPADDDZ128rmkz = 14618 |
| 154352 | CEFBS_None, // VPADDDZ128rr = 14619 |
| 154353 | CEFBS_None, // VPADDDZ128rrk = 14620 |
| 154354 | CEFBS_None, // VPADDDZ128rrkz = 14621 |
| 154355 | CEFBS_None, // VPADDDZ256rm = 14622 |
| 154356 | CEFBS_None, // VPADDDZ256rmb = 14623 |
| 154357 | CEFBS_None, // VPADDDZ256rmbk = 14624 |
| 154358 | CEFBS_None, // VPADDDZ256rmbkz = 14625 |
| 154359 | CEFBS_None, // VPADDDZ256rmk = 14626 |
| 154360 | CEFBS_None, // VPADDDZ256rmkz = 14627 |
| 154361 | CEFBS_None, // VPADDDZ256rr = 14628 |
| 154362 | CEFBS_None, // VPADDDZ256rrk = 14629 |
| 154363 | CEFBS_None, // VPADDDZ256rrkz = 14630 |
| 154364 | CEFBS_None, // VPADDDZrm = 14631 |
| 154365 | CEFBS_None, // VPADDDZrmb = 14632 |
| 154366 | CEFBS_None, // VPADDDZrmbk = 14633 |
| 154367 | CEFBS_None, // VPADDDZrmbkz = 14634 |
| 154368 | CEFBS_None, // VPADDDZrmk = 14635 |
| 154369 | CEFBS_None, // VPADDDZrmkz = 14636 |
| 154370 | CEFBS_None, // VPADDDZrr = 14637 |
| 154371 | CEFBS_None, // VPADDDZrrk = 14638 |
| 154372 | CEFBS_None, // VPADDDZrrkz = 14639 |
| 154373 | CEFBS_None, // VPADDDrm = 14640 |
| 154374 | CEFBS_None, // VPADDDrr = 14641 |
| 154375 | CEFBS_None, // VPADDQYrm = 14642 |
| 154376 | CEFBS_None, // VPADDQYrr = 14643 |
| 154377 | CEFBS_None, // VPADDQZ128rm = 14644 |
| 154378 | CEFBS_None, // VPADDQZ128rmb = 14645 |
| 154379 | CEFBS_None, // VPADDQZ128rmbk = 14646 |
| 154380 | CEFBS_None, // VPADDQZ128rmbkz = 14647 |
| 154381 | CEFBS_None, // VPADDQZ128rmk = 14648 |
| 154382 | CEFBS_None, // VPADDQZ128rmkz = 14649 |
| 154383 | CEFBS_None, // VPADDQZ128rr = 14650 |
| 154384 | CEFBS_None, // VPADDQZ128rrk = 14651 |
| 154385 | CEFBS_None, // VPADDQZ128rrkz = 14652 |
| 154386 | CEFBS_None, // VPADDQZ256rm = 14653 |
| 154387 | CEFBS_None, // VPADDQZ256rmb = 14654 |
| 154388 | CEFBS_None, // VPADDQZ256rmbk = 14655 |
| 154389 | CEFBS_None, // VPADDQZ256rmbkz = 14656 |
| 154390 | CEFBS_None, // VPADDQZ256rmk = 14657 |
| 154391 | CEFBS_None, // VPADDQZ256rmkz = 14658 |
| 154392 | CEFBS_None, // VPADDQZ256rr = 14659 |
| 154393 | CEFBS_None, // VPADDQZ256rrk = 14660 |
| 154394 | CEFBS_None, // VPADDQZ256rrkz = 14661 |
| 154395 | CEFBS_None, // VPADDQZrm = 14662 |
| 154396 | CEFBS_None, // VPADDQZrmb = 14663 |
| 154397 | CEFBS_None, // VPADDQZrmbk = 14664 |
| 154398 | CEFBS_None, // VPADDQZrmbkz = 14665 |
| 154399 | CEFBS_None, // VPADDQZrmk = 14666 |
| 154400 | CEFBS_None, // VPADDQZrmkz = 14667 |
| 154401 | CEFBS_None, // VPADDQZrr = 14668 |
| 154402 | CEFBS_None, // VPADDQZrrk = 14669 |
| 154403 | CEFBS_None, // VPADDQZrrkz = 14670 |
| 154404 | CEFBS_None, // VPADDQrm = 14671 |
| 154405 | CEFBS_None, // VPADDQrr = 14672 |
| 154406 | CEFBS_None, // VPADDSBYrm = 14673 |
| 154407 | CEFBS_None, // VPADDSBYrr = 14674 |
| 154408 | CEFBS_None, // VPADDSBZ128rm = 14675 |
| 154409 | CEFBS_None, // VPADDSBZ128rmk = 14676 |
| 154410 | CEFBS_None, // VPADDSBZ128rmkz = 14677 |
| 154411 | CEFBS_None, // VPADDSBZ128rr = 14678 |
| 154412 | CEFBS_None, // VPADDSBZ128rrk = 14679 |
| 154413 | CEFBS_None, // VPADDSBZ128rrkz = 14680 |
| 154414 | CEFBS_None, // VPADDSBZ256rm = 14681 |
| 154415 | CEFBS_None, // VPADDSBZ256rmk = 14682 |
| 154416 | CEFBS_None, // VPADDSBZ256rmkz = 14683 |
| 154417 | CEFBS_None, // VPADDSBZ256rr = 14684 |
| 154418 | CEFBS_None, // VPADDSBZ256rrk = 14685 |
| 154419 | CEFBS_None, // VPADDSBZ256rrkz = 14686 |
| 154420 | CEFBS_None, // VPADDSBZrm = 14687 |
| 154421 | CEFBS_None, // VPADDSBZrmk = 14688 |
| 154422 | CEFBS_None, // VPADDSBZrmkz = 14689 |
| 154423 | CEFBS_None, // VPADDSBZrr = 14690 |
| 154424 | CEFBS_None, // VPADDSBZrrk = 14691 |
| 154425 | CEFBS_None, // VPADDSBZrrkz = 14692 |
| 154426 | CEFBS_None, // VPADDSBrm = 14693 |
| 154427 | CEFBS_None, // VPADDSBrr = 14694 |
| 154428 | CEFBS_None, // VPADDSWYrm = 14695 |
| 154429 | CEFBS_None, // VPADDSWYrr = 14696 |
| 154430 | CEFBS_None, // VPADDSWZ128rm = 14697 |
| 154431 | CEFBS_None, // VPADDSWZ128rmk = 14698 |
| 154432 | CEFBS_None, // VPADDSWZ128rmkz = 14699 |
| 154433 | CEFBS_None, // VPADDSWZ128rr = 14700 |
| 154434 | CEFBS_None, // VPADDSWZ128rrk = 14701 |
| 154435 | CEFBS_None, // VPADDSWZ128rrkz = 14702 |
| 154436 | CEFBS_None, // VPADDSWZ256rm = 14703 |
| 154437 | CEFBS_None, // VPADDSWZ256rmk = 14704 |
| 154438 | CEFBS_None, // VPADDSWZ256rmkz = 14705 |
| 154439 | CEFBS_None, // VPADDSWZ256rr = 14706 |
| 154440 | CEFBS_None, // VPADDSWZ256rrk = 14707 |
| 154441 | CEFBS_None, // VPADDSWZ256rrkz = 14708 |
| 154442 | CEFBS_None, // VPADDSWZrm = 14709 |
| 154443 | CEFBS_None, // VPADDSWZrmk = 14710 |
| 154444 | CEFBS_None, // VPADDSWZrmkz = 14711 |
| 154445 | CEFBS_None, // VPADDSWZrr = 14712 |
| 154446 | CEFBS_None, // VPADDSWZrrk = 14713 |
| 154447 | CEFBS_None, // VPADDSWZrrkz = 14714 |
| 154448 | CEFBS_None, // VPADDSWrm = 14715 |
| 154449 | CEFBS_None, // VPADDSWrr = 14716 |
| 154450 | CEFBS_None, // VPADDUSBYrm = 14717 |
| 154451 | CEFBS_None, // VPADDUSBYrr = 14718 |
| 154452 | CEFBS_None, // VPADDUSBZ128rm = 14719 |
| 154453 | CEFBS_None, // VPADDUSBZ128rmk = 14720 |
| 154454 | CEFBS_None, // VPADDUSBZ128rmkz = 14721 |
| 154455 | CEFBS_None, // VPADDUSBZ128rr = 14722 |
| 154456 | CEFBS_None, // VPADDUSBZ128rrk = 14723 |
| 154457 | CEFBS_None, // VPADDUSBZ128rrkz = 14724 |
| 154458 | CEFBS_None, // VPADDUSBZ256rm = 14725 |
| 154459 | CEFBS_None, // VPADDUSBZ256rmk = 14726 |
| 154460 | CEFBS_None, // VPADDUSBZ256rmkz = 14727 |
| 154461 | CEFBS_None, // VPADDUSBZ256rr = 14728 |
| 154462 | CEFBS_None, // VPADDUSBZ256rrk = 14729 |
| 154463 | CEFBS_None, // VPADDUSBZ256rrkz = 14730 |
| 154464 | CEFBS_None, // VPADDUSBZrm = 14731 |
| 154465 | CEFBS_None, // VPADDUSBZrmk = 14732 |
| 154466 | CEFBS_None, // VPADDUSBZrmkz = 14733 |
| 154467 | CEFBS_None, // VPADDUSBZrr = 14734 |
| 154468 | CEFBS_None, // VPADDUSBZrrk = 14735 |
| 154469 | CEFBS_None, // VPADDUSBZrrkz = 14736 |
| 154470 | CEFBS_None, // VPADDUSBrm = 14737 |
| 154471 | CEFBS_None, // VPADDUSBrr = 14738 |
| 154472 | CEFBS_None, // VPADDUSWYrm = 14739 |
| 154473 | CEFBS_None, // VPADDUSWYrr = 14740 |
| 154474 | CEFBS_None, // VPADDUSWZ128rm = 14741 |
| 154475 | CEFBS_None, // VPADDUSWZ128rmk = 14742 |
| 154476 | CEFBS_None, // VPADDUSWZ128rmkz = 14743 |
| 154477 | CEFBS_None, // VPADDUSWZ128rr = 14744 |
| 154478 | CEFBS_None, // VPADDUSWZ128rrk = 14745 |
| 154479 | CEFBS_None, // VPADDUSWZ128rrkz = 14746 |
| 154480 | CEFBS_None, // VPADDUSWZ256rm = 14747 |
| 154481 | CEFBS_None, // VPADDUSWZ256rmk = 14748 |
| 154482 | CEFBS_None, // VPADDUSWZ256rmkz = 14749 |
| 154483 | CEFBS_None, // VPADDUSWZ256rr = 14750 |
| 154484 | CEFBS_None, // VPADDUSWZ256rrk = 14751 |
| 154485 | CEFBS_None, // VPADDUSWZ256rrkz = 14752 |
| 154486 | CEFBS_None, // VPADDUSWZrm = 14753 |
| 154487 | CEFBS_None, // VPADDUSWZrmk = 14754 |
| 154488 | CEFBS_None, // VPADDUSWZrmkz = 14755 |
| 154489 | CEFBS_None, // VPADDUSWZrr = 14756 |
| 154490 | CEFBS_None, // VPADDUSWZrrk = 14757 |
| 154491 | CEFBS_None, // VPADDUSWZrrkz = 14758 |
| 154492 | CEFBS_None, // VPADDUSWrm = 14759 |
| 154493 | CEFBS_None, // VPADDUSWrr = 14760 |
| 154494 | CEFBS_None, // VPADDWYrm = 14761 |
| 154495 | CEFBS_None, // VPADDWYrr = 14762 |
| 154496 | CEFBS_None, // VPADDWZ128rm = 14763 |
| 154497 | CEFBS_None, // VPADDWZ128rmk = 14764 |
| 154498 | CEFBS_None, // VPADDWZ128rmkz = 14765 |
| 154499 | CEFBS_None, // VPADDWZ128rr = 14766 |
| 154500 | CEFBS_None, // VPADDWZ128rrk = 14767 |
| 154501 | CEFBS_None, // VPADDWZ128rrkz = 14768 |
| 154502 | CEFBS_None, // VPADDWZ256rm = 14769 |
| 154503 | CEFBS_None, // VPADDWZ256rmk = 14770 |
| 154504 | CEFBS_None, // VPADDWZ256rmkz = 14771 |
| 154505 | CEFBS_None, // VPADDWZ256rr = 14772 |
| 154506 | CEFBS_None, // VPADDWZ256rrk = 14773 |
| 154507 | CEFBS_None, // VPADDWZ256rrkz = 14774 |
| 154508 | CEFBS_None, // VPADDWZrm = 14775 |
| 154509 | CEFBS_None, // VPADDWZrmk = 14776 |
| 154510 | CEFBS_None, // VPADDWZrmkz = 14777 |
| 154511 | CEFBS_None, // VPADDWZrr = 14778 |
| 154512 | CEFBS_None, // VPADDWZrrk = 14779 |
| 154513 | CEFBS_None, // VPADDWZrrkz = 14780 |
| 154514 | CEFBS_None, // VPADDWrm = 14781 |
| 154515 | CEFBS_None, // VPADDWrr = 14782 |
| 154516 | CEFBS_None, // VPALIGNRYrmi = 14783 |
| 154517 | CEFBS_None, // VPALIGNRYrri = 14784 |
| 154518 | CEFBS_None, // VPALIGNRZ128rmi = 14785 |
| 154519 | CEFBS_None, // VPALIGNRZ128rmik = 14786 |
| 154520 | CEFBS_None, // VPALIGNRZ128rmikz = 14787 |
| 154521 | CEFBS_None, // VPALIGNRZ128rri = 14788 |
| 154522 | CEFBS_None, // VPALIGNRZ128rrik = 14789 |
| 154523 | CEFBS_None, // VPALIGNRZ128rrikz = 14790 |
| 154524 | CEFBS_None, // VPALIGNRZ256rmi = 14791 |
| 154525 | CEFBS_None, // VPALIGNRZ256rmik = 14792 |
| 154526 | CEFBS_None, // VPALIGNRZ256rmikz = 14793 |
| 154527 | CEFBS_None, // VPALIGNRZ256rri = 14794 |
| 154528 | CEFBS_None, // VPALIGNRZ256rrik = 14795 |
| 154529 | CEFBS_None, // VPALIGNRZ256rrikz = 14796 |
| 154530 | CEFBS_None, // VPALIGNRZrmi = 14797 |
| 154531 | CEFBS_None, // VPALIGNRZrmik = 14798 |
| 154532 | CEFBS_None, // VPALIGNRZrmikz = 14799 |
| 154533 | CEFBS_None, // VPALIGNRZrri = 14800 |
| 154534 | CEFBS_None, // VPALIGNRZrrik = 14801 |
| 154535 | CEFBS_None, // VPALIGNRZrrikz = 14802 |
| 154536 | CEFBS_None, // VPALIGNRrmi = 14803 |
| 154537 | CEFBS_None, // VPALIGNRrri = 14804 |
| 154538 | CEFBS_None, // VPANDDZ128rm = 14805 |
| 154539 | CEFBS_None, // VPANDDZ128rmb = 14806 |
| 154540 | CEFBS_None, // VPANDDZ128rmbk = 14807 |
| 154541 | CEFBS_None, // VPANDDZ128rmbkz = 14808 |
| 154542 | CEFBS_None, // VPANDDZ128rmk = 14809 |
| 154543 | CEFBS_None, // VPANDDZ128rmkz = 14810 |
| 154544 | CEFBS_None, // VPANDDZ128rr = 14811 |
| 154545 | CEFBS_None, // VPANDDZ128rrk = 14812 |
| 154546 | CEFBS_None, // VPANDDZ128rrkz = 14813 |
| 154547 | CEFBS_None, // VPANDDZ256rm = 14814 |
| 154548 | CEFBS_None, // VPANDDZ256rmb = 14815 |
| 154549 | CEFBS_None, // VPANDDZ256rmbk = 14816 |
| 154550 | CEFBS_None, // VPANDDZ256rmbkz = 14817 |
| 154551 | CEFBS_None, // VPANDDZ256rmk = 14818 |
| 154552 | CEFBS_None, // VPANDDZ256rmkz = 14819 |
| 154553 | CEFBS_None, // VPANDDZ256rr = 14820 |
| 154554 | CEFBS_None, // VPANDDZ256rrk = 14821 |
| 154555 | CEFBS_None, // VPANDDZ256rrkz = 14822 |
| 154556 | CEFBS_None, // VPANDDZrm = 14823 |
| 154557 | CEFBS_None, // VPANDDZrmb = 14824 |
| 154558 | CEFBS_None, // VPANDDZrmbk = 14825 |
| 154559 | CEFBS_None, // VPANDDZrmbkz = 14826 |
| 154560 | CEFBS_None, // VPANDDZrmk = 14827 |
| 154561 | CEFBS_None, // VPANDDZrmkz = 14828 |
| 154562 | CEFBS_None, // VPANDDZrr = 14829 |
| 154563 | CEFBS_None, // VPANDDZrrk = 14830 |
| 154564 | CEFBS_None, // VPANDDZrrkz = 14831 |
| 154565 | CEFBS_None, // VPANDNDZ128rm = 14832 |
| 154566 | CEFBS_None, // VPANDNDZ128rmb = 14833 |
| 154567 | CEFBS_None, // VPANDNDZ128rmbk = 14834 |
| 154568 | CEFBS_None, // VPANDNDZ128rmbkz = 14835 |
| 154569 | CEFBS_None, // VPANDNDZ128rmk = 14836 |
| 154570 | CEFBS_None, // VPANDNDZ128rmkz = 14837 |
| 154571 | CEFBS_None, // VPANDNDZ128rr = 14838 |
| 154572 | CEFBS_None, // VPANDNDZ128rrk = 14839 |
| 154573 | CEFBS_None, // VPANDNDZ128rrkz = 14840 |
| 154574 | CEFBS_None, // VPANDNDZ256rm = 14841 |
| 154575 | CEFBS_None, // VPANDNDZ256rmb = 14842 |
| 154576 | CEFBS_None, // VPANDNDZ256rmbk = 14843 |
| 154577 | CEFBS_None, // VPANDNDZ256rmbkz = 14844 |
| 154578 | CEFBS_None, // VPANDNDZ256rmk = 14845 |
| 154579 | CEFBS_None, // VPANDNDZ256rmkz = 14846 |
| 154580 | CEFBS_None, // VPANDNDZ256rr = 14847 |
| 154581 | CEFBS_None, // VPANDNDZ256rrk = 14848 |
| 154582 | CEFBS_None, // VPANDNDZ256rrkz = 14849 |
| 154583 | CEFBS_None, // VPANDNDZrm = 14850 |
| 154584 | CEFBS_None, // VPANDNDZrmb = 14851 |
| 154585 | CEFBS_None, // VPANDNDZrmbk = 14852 |
| 154586 | CEFBS_None, // VPANDNDZrmbkz = 14853 |
| 154587 | CEFBS_None, // VPANDNDZrmk = 14854 |
| 154588 | CEFBS_None, // VPANDNDZrmkz = 14855 |
| 154589 | CEFBS_None, // VPANDNDZrr = 14856 |
| 154590 | CEFBS_None, // VPANDNDZrrk = 14857 |
| 154591 | CEFBS_None, // VPANDNDZrrkz = 14858 |
| 154592 | CEFBS_None, // VPANDNQZ128rm = 14859 |
| 154593 | CEFBS_None, // VPANDNQZ128rmb = 14860 |
| 154594 | CEFBS_None, // VPANDNQZ128rmbk = 14861 |
| 154595 | CEFBS_None, // VPANDNQZ128rmbkz = 14862 |
| 154596 | CEFBS_None, // VPANDNQZ128rmk = 14863 |
| 154597 | CEFBS_None, // VPANDNQZ128rmkz = 14864 |
| 154598 | CEFBS_None, // VPANDNQZ128rr = 14865 |
| 154599 | CEFBS_None, // VPANDNQZ128rrk = 14866 |
| 154600 | CEFBS_None, // VPANDNQZ128rrkz = 14867 |
| 154601 | CEFBS_None, // VPANDNQZ256rm = 14868 |
| 154602 | CEFBS_None, // VPANDNQZ256rmb = 14869 |
| 154603 | CEFBS_None, // VPANDNQZ256rmbk = 14870 |
| 154604 | CEFBS_None, // VPANDNQZ256rmbkz = 14871 |
| 154605 | CEFBS_None, // VPANDNQZ256rmk = 14872 |
| 154606 | CEFBS_None, // VPANDNQZ256rmkz = 14873 |
| 154607 | CEFBS_None, // VPANDNQZ256rr = 14874 |
| 154608 | CEFBS_None, // VPANDNQZ256rrk = 14875 |
| 154609 | CEFBS_None, // VPANDNQZ256rrkz = 14876 |
| 154610 | CEFBS_None, // VPANDNQZrm = 14877 |
| 154611 | CEFBS_None, // VPANDNQZrmb = 14878 |
| 154612 | CEFBS_None, // VPANDNQZrmbk = 14879 |
| 154613 | CEFBS_None, // VPANDNQZrmbkz = 14880 |
| 154614 | CEFBS_None, // VPANDNQZrmk = 14881 |
| 154615 | CEFBS_None, // VPANDNQZrmkz = 14882 |
| 154616 | CEFBS_None, // VPANDNQZrr = 14883 |
| 154617 | CEFBS_None, // VPANDNQZrrk = 14884 |
| 154618 | CEFBS_None, // VPANDNQZrrkz = 14885 |
| 154619 | CEFBS_None, // VPANDNYrm = 14886 |
| 154620 | CEFBS_None, // VPANDNYrr = 14887 |
| 154621 | CEFBS_None, // VPANDNrm = 14888 |
| 154622 | CEFBS_None, // VPANDNrr = 14889 |
| 154623 | CEFBS_None, // VPANDQZ128rm = 14890 |
| 154624 | CEFBS_None, // VPANDQZ128rmb = 14891 |
| 154625 | CEFBS_None, // VPANDQZ128rmbk = 14892 |
| 154626 | CEFBS_None, // VPANDQZ128rmbkz = 14893 |
| 154627 | CEFBS_None, // VPANDQZ128rmk = 14894 |
| 154628 | CEFBS_None, // VPANDQZ128rmkz = 14895 |
| 154629 | CEFBS_None, // VPANDQZ128rr = 14896 |
| 154630 | CEFBS_None, // VPANDQZ128rrk = 14897 |
| 154631 | CEFBS_None, // VPANDQZ128rrkz = 14898 |
| 154632 | CEFBS_None, // VPANDQZ256rm = 14899 |
| 154633 | CEFBS_None, // VPANDQZ256rmb = 14900 |
| 154634 | CEFBS_None, // VPANDQZ256rmbk = 14901 |
| 154635 | CEFBS_None, // VPANDQZ256rmbkz = 14902 |
| 154636 | CEFBS_None, // VPANDQZ256rmk = 14903 |
| 154637 | CEFBS_None, // VPANDQZ256rmkz = 14904 |
| 154638 | CEFBS_None, // VPANDQZ256rr = 14905 |
| 154639 | CEFBS_None, // VPANDQZ256rrk = 14906 |
| 154640 | CEFBS_None, // VPANDQZ256rrkz = 14907 |
| 154641 | CEFBS_None, // VPANDQZrm = 14908 |
| 154642 | CEFBS_None, // VPANDQZrmb = 14909 |
| 154643 | CEFBS_None, // VPANDQZrmbk = 14910 |
| 154644 | CEFBS_None, // VPANDQZrmbkz = 14911 |
| 154645 | CEFBS_None, // VPANDQZrmk = 14912 |
| 154646 | CEFBS_None, // VPANDQZrmkz = 14913 |
| 154647 | CEFBS_None, // VPANDQZrr = 14914 |
| 154648 | CEFBS_None, // VPANDQZrrk = 14915 |
| 154649 | CEFBS_None, // VPANDQZrrkz = 14916 |
| 154650 | CEFBS_None, // VPANDYrm = 14917 |
| 154651 | CEFBS_None, // VPANDYrr = 14918 |
| 154652 | CEFBS_None, // VPANDrm = 14919 |
| 154653 | CEFBS_None, // VPANDrr = 14920 |
| 154654 | CEFBS_None, // VPAVGBYrm = 14921 |
| 154655 | CEFBS_None, // VPAVGBYrr = 14922 |
| 154656 | CEFBS_None, // VPAVGBZ128rm = 14923 |
| 154657 | CEFBS_None, // VPAVGBZ128rmk = 14924 |
| 154658 | CEFBS_None, // VPAVGBZ128rmkz = 14925 |
| 154659 | CEFBS_None, // VPAVGBZ128rr = 14926 |
| 154660 | CEFBS_None, // VPAVGBZ128rrk = 14927 |
| 154661 | CEFBS_None, // VPAVGBZ128rrkz = 14928 |
| 154662 | CEFBS_None, // VPAVGBZ256rm = 14929 |
| 154663 | CEFBS_None, // VPAVGBZ256rmk = 14930 |
| 154664 | CEFBS_None, // VPAVGBZ256rmkz = 14931 |
| 154665 | CEFBS_None, // VPAVGBZ256rr = 14932 |
| 154666 | CEFBS_None, // VPAVGBZ256rrk = 14933 |
| 154667 | CEFBS_None, // VPAVGBZ256rrkz = 14934 |
| 154668 | CEFBS_None, // VPAVGBZrm = 14935 |
| 154669 | CEFBS_None, // VPAVGBZrmk = 14936 |
| 154670 | CEFBS_None, // VPAVGBZrmkz = 14937 |
| 154671 | CEFBS_None, // VPAVGBZrr = 14938 |
| 154672 | CEFBS_None, // VPAVGBZrrk = 14939 |
| 154673 | CEFBS_None, // VPAVGBZrrkz = 14940 |
| 154674 | CEFBS_None, // VPAVGBrm = 14941 |
| 154675 | CEFBS_None, // VPAVGBrr = 14942 |
| 154676 | CEFBS_None, // VPAVGWYrm = 14943 |
| 154677 | CEFBS_None, // VPAVGWYrr = 14944 |
| 154678 | CEFBS_None, // VPAVGWZ128rm = 14945 |
| 154679 | CEFBS_None, // VPAVGWZ128rmk = 14946 |
| 154680 | CEFBS_None, // VPAVGWZ128rmkz = 14947 |
| 154681 | CEFBS_None, // VPAVGWZ128rr = 14948 |
| 154682 | CEFBS_None, // VPAVGWZ128rrk = 14949 |
| 154683 | CEFBS_None, // VPAVGWZ128rrkz = 14950 |
| 154684 | CEFBS_None, // VPAVGWZ256rm = 14951 |
| 154685 | CEFBS_None, // VPAVGWZ256rmk = 14952 |
| 154686 | CEFBS_None, // VPAVGWZ256rmkz = 14953 |
| 154687 | CEFBS_None, // VPAVGWZ256rr = 14954 |
| 154688 | CEFBS_None, // VPAVGWZ256rrk = 14955 |
| 154689 | CEFBS_None, // VPAVGWZ256rrkz = 14956 |
| 154690 | CEFBS_None, // VPAVGWZrm = 14957 |
| 154691 | CEFBS_None, // VPAVGWZrmk = 14958 |
| 154692 | CEFBS_None, // VPAVGWZrmkz = 14959 |
| 154693 | CEFBS_None, // VPAVGWZrr = 14960 |
| 154694 | CEFBS_None, // VPAVGWZrrk = 14961 |
| 154695 | CEFBS_None, // VPAVGWZrrkz = 14962 |
| 154696 | CEFBS_None, // VPAVGWrm = 14963 |
| 154697 | CEFBS_None, // VPAVGWrr = 14964 |
| 154698 | CEFBS_None, // VPBLENDDYrmi = 14965 |
| 154699 | CEFBS_None, // VPBLENDDYrri = 14966 |
| 154700 | CEFBS_None, // VPBLENDDrmi = 14967 |
| 154701 | CEFBS_None, // VPBLENDDrri = 14968 |
| 154702 | CEFBS_None, // VPBLENDMBZ128rm = 14969 |
| 154703 | CEFBS_None, // VPBLENDMBZ128rmk = 14970 |
| 154704 | CEFBS_None, // VPBLENDMBZ128rmkz = 14971 |
| 154705 | CEFBS_None, // VPBLENDMBZ128rr = 14972 |
| 154706 | CEFBS_None, // VPBLENDMBZ128rrk = 14973 |
| 154707 | CEFBS_None, // VPBLENDMBZ128rrkz = 14974 |
| 154708 | CEFBS_None, // VPBLENDMBZ256rm = 14975 |
| 154709 | CEFBS_None, // VPBLENDMBZ256rmk = 14976 |
| 154710 | CEFBS_None, // VPBLENDMBZ256rmkz = 14977 |
| 154711 | CEFBS_None, // VPBLENDMBZ256rr = 14978 |
| 154712 | CEFBS_None, // VPBLENDMBZ256rrk = 14979 |
| 154713 | CEFBS_None, // VPBLENDMBZ256rrkz = 14980 |
| 154714 | CEFBS_None, // VPBLENDMBZrm = 14981 |
| 154715 | CEFBS_None, // VPBLENDMBZrmk = 14982 |
| 154716 | CEFBS_None, // VPBLENDMBZrmkz = 14983 |
| 154717 | CEFBS_None, // VPBLENDMBZrr = 14984 |
| 154718 | CEFBS_None, // VPBLENDMBZrrk = 14985 |
| 154719 | CEFBS_None, // VPBLENDMBZrrkz = 14986 |
| 154720 | CEFBS_None, // VPBLENDMDZ128rm = 14987 |
| 154721 | CEFBS_None, // VPBLENDMDZ128rmb = 14988 |
| 154722 | CEFBS_None, // VPBLENDMDZ128rmbk = 14989 |
| 154723 | CEFBS_None, // VPBLENDMDZ128rmbkz = 14990 |
| 154724 | CEFBS_None, // VPBLENDMDZ128rmk = 14991 |
| 154725 | CEFBS_None, // VPBLENDMDZ128rmkz = 14992 |
| 154726 | CEFBS_None, // VPBLENDMDZ128rr = 14993 |
| 154727 | CEFBS_None, // VPBLENDMDZ128rrk = 14994 |
| 154728 | CEFBS_None, // VPBLENDMDZ128rrkz = 14995 |
| 154729 | CEFBS_None, // VPBLENDMDZ256rm = 14996 |
| 154730 | CEFBS_None, // VPBLENDMDZ256rmb = 14997 |
| 154731 | CEFBS_None, // VPBLENDMDZ256rmbk = 14998 |
| 154732 | CEFBS_None, // VPBLENDMDZ256rmbkz = 14999 |
| 154733 | CEFBS_None, // VPBLENDMDZ256rmk = 15000 |
| 154734 | CEFBS_None, // VPBLENDMDZ256rmkz = 15001 |
| 154735 | CEFBS_None, // VPBLENDMDZ256rr = 15002 |
| 154736 | CEFBS_None, // VPBLENDMDZ256rrk = 15003 |
| 154737 | CEFBS_None, // VPBLENDMDZ256rrkz = 15004 |
| 154738 | CEFBS_None, // VPBLENDMDZrm = 15005 |
| 154739 | CEFBS_None, // VPBLENDMDZrmb = 15006 |
| 154740 | CEFBS_None, // VPBLENDMDZrmbk = 15007 |
| 154741 | CEFBS_None, // VPBLENDMDZrmbkz = 15008 |
| 154742 | CEFBS_None, // VPBLENDMDZrmk = 15009 |
| 154743 | CEFBS_None, // VPBLENDMDZrmkz = 15010 |
| 154744 | CEFBS_None, // VPBLENDMDZrr = 15011 |
| 154745 | CEFBS_None, // VPBLENDMDZrrk = 15012 |
| 154746 | CEFBS_None, // VPBLENDMDZrrkz = 15013 |
| 154747 | CEFBS_None, // VPBLENDMQZ128rm = 15014 |
| 154748 | CEFBS_None, // VPBLENDMQZ128rmb = 15015 |
| 154749 | CEFBS_None, // VPBLENDMQZ128rmbk = 15016 |
| 154750 | CEFBS_None, // VPBLENDMQZ128rmbkz = 15017 |
| 154751 | CEFBS_None, // VPBLENDMQZ128rmk = 15018 |
| 154752 | CEFBS_None, // VPBLENDMQZ128rmkz = 15019 |
| 154753 | CEFBS_None, // VPBLENDMQZ128rr = 15020 |
| 154754 | CEFBS_None, // VPBLENDMQZ128rrk = 15021 |
| 154755 | CEFBS_None, // VPBLENDMQZ128rrkz = 15022 |
| 154756 | CEFBS_None, // VPBLENDMQZ256rm = 15023 |
| 154757 | CEFBS_None, // VPBLENDMQZ256rmb = 15024 |
| 154758 | CEFBS_None, // VPBLENDMQZ256rmbk = 15025 |
| 154759 | CEFBS_None, // VPBLENDMQZ256rmbkz = 15026 |
| 154760 | CEFBS_None, // VPBLENDMQZ256rmk = 15027 |
| 154761 | CEFBS_None, // VPBLENDMQZ256rmkz = 15028 |
| 154762 | CEFBS_None, // VPBLENDMQZ256rr = 15029 |
| 154763 | CEFBS_None, // VPBLENDMQZ256rrk = 15030 |
| 154764 | CEFBS_None, // VPBLENDMQZ256rrkz = 15031 |
| 154765 | CEFBS_None, // VPBLENDMQZrm = 15032 |
| 154766 | CEFBS_None, // VPBLENDMQZrmb = 15033 |
| 154767 | CEFBS_None, // VPBLENDMQZrmbk = 15034 |
| 154768 | CEFBS_None, // VPBLENDMQZrmbkz = 15035 |
| 154769 | CEFBS_None, // VPBLENDMQZrmk = 15036 |
| 154770 | CEFBS_None, // VPBLENDMQZrmkz = 15037 |
| 154771 | CEFBS_None, // VPBLENDMQZrr = 15038 |
| 154772 | CEFBS_None, // VPBLENDMQZrrk = 15039 |
| 154773 | CEFBS_None, // VPBLENDMQZrrkz = 15040 |
| 154774 | CEFBS_None, // VPBLENDMWZ128rm = 15041 |
| 154775 | CEFBS_None, // VPBLENDMWZ128rmk = 15042 |
| 154776 | CEFBS_None, // VPBLENDMWZ128rmkz = 15043 |
| 154777 | CEFBS_None, // VPBLENDMWZ128rr = 15044 |
| 154778 | CEFBS_None, // VPBLENDMWZ128rrk = 15045 |
| 154779 | CEFBS_None, // VPBLENDMWZ128rrkz = 15046 |
| 154780 | CEFBS_None, // VPBLENDMWZ256rm = 15047 |
| 154781 | CEFBS_None, // VPBLENDMWZ256rmk = 15048 |
| 154782 | CEFBS_None, // VPBLENDMWZ256rmkz = 15049 |
| 154783 | CEFBS_None, // VPBLENDMWZ256rr = 15050 |
| 154784 | CEFBS_None, // VPBLENDMWZ256rrk = 15051 |
| 154785 | CEFBS_None, // VPBLENDMWZ256rrkz = 15052 |
| 154786 | CEFBS_None, // VPBLENDMWZrm = 15053 |
| 154787 | CEFBS_None, // VPBLENDMWZrmk = 15054 |
| 154788 | CEFBS_None, // VPBLENDMWZrmkz = 15055 |
| 154789 | CEFBS_None, // VPBLENDMWZrr = 15056 |
| 154790 | CEFBS_None, // VPBLENDMWZrrk = 15057 |
| 154791 | CEFBS_None, // VPBLENDMWZrrkz = 15058 |
| 154792 | CEFBS_None, // VPBLENDVBYrmr = 15059 |
| 154793 | CEFBS_None, // VPBLENDVBYrrr = 15060 |
| 154794 | CEFBS_None, // VPBLENDVBrmr = 15061 |
| 154795 | CEFBS_None, // VPBLENDVBrrr = 15062 |
| 154796 | CEFBS_None, // VPBLENDWYrmi = 15063 |
| 154797 | CEFBS_None, // VPBLENDWYrri = 15064 |
| 154798 | CEFBS_None, // VPBLENDWrmi = 15065 |
| 154799 | CEFBS_None, // VPBLENDWrri = 15066 |
| 154800 | CEFBS_None, // VPBROADCASTBYrm = 15067 |
| 154801 | CEFBS_None, // VPBROADCASTBYrr = 15068 |
| 154802 | CEFBS_None, // VPBROADCASTBZ128rm = 15069 |
| 154803 | CEFBS_None, // VPBROADCASTBZ128rmk = 15070 |
| 154804 | CEFBS_None, // VPBROADCASTBZ128rmkz = 15071 |
| 154805 | CEFBS_None, // VPBROADCASTBZ128rr = 15072 |
| 154806 | CEFBS_None, // VPBROADCASTBZ128rrk = 15073 |
| 154807 | CEFBS_None, // VPBROADCASTBZ128rrkz = 15074 |
| 154808 | CEFBS_None, // VPBROADCASTBZ256rm = 15075 |
| 154809 | CEFBS_None, // VPBROADCASTBZ256rmk = 15076 |
| 154810 | CEFBS_None, // VPBROADCASTBZ256rmkz = 15077 |
| 154811 | CEFBS_None, // VPBROADCASTBZ256rr = 15078 |
| 154812 | CEFBS_None, // VPBROADCASTBZ256rrk = 15079 |
| 154813 | CEFBS_None, // VPBROADCASTBZ256rrkz = 15080 |
| 154814 | CEFBS_None, // VPBROADCASTBZrm = 15081 |
| 154815 | CEFBS_None, // VPBROADCASTBZrmk = 15082 |
| 154816 | CEFBS_None, // VPBROADCASTBZrmkz = 15083 |
| 154817 | CEFBS_None, // VPBROADCASTBZrr = 15084 |
| 154818 | CEFBS_None, // VPBROADCASTBZrrk = 15085 |
| 154819 | CEFBS_None, // VPBROADCASTBZrrkz = 15086 |
| 154820 | CEFBS_None, // VPBROADCASTBrZ128rr = 15087 |
| 154821 | CEFBS_None, // VPBROADCASTBrZ128rrk = 15088 |
| 154822 | CEFBS_None, // VPBROADCASTBrZ128rrkz = 15089 |
| 154823 | CEFBS_None, // VPBROADCASTBrZ256rr = 15090 |
| 154824 | CEFBS_None, // VPBROADCASTBrZ256rrk = 15091 |
| 154825 | CEFBS_None, // VPBROADCASTBrZ256rrkz = 15092 |
| 154826 | CEFBS_None, // VPBROADCASTBrZrr = 15093 |
| 154827 | CEFBS_None, // VPBROADCASTBrZrrk = 15094 |
| 154828 | CEFBS_None, // VPBROADCASTBrZrrkz = 15095 |
| 154829 | CEFBS_None, // VPBROADCASTBrm = 15096 |
| 154830 | CEFBS_None, // VPBROADCASTBrr = 15097 |
| 154831 | CEFBS_None, // VPBROADCASTDYrm = 15098 |
| 154832 | CEFBS_None, // VPBROADCASTDYrr = 15099 |
| 154833 | CEFBS_None, // VPBROADCASTDZ128rm = 15100 |
| 154834 | CEFBS_None, // VPBROADCASTDZ128rmk = 15101 |
| 154835 | CEFBS_None, // VPBROADCASTDZ128rmkz = 15102 |
| 154836 | CEFBS_None, // VPBROADCASTDZ128rr = 15103 |
| 154837 | CEFBS_None, // VPBROADCASTDZ128rrk = 15104 |
| 154838 | CEFBS_None, // VPBROADCASTDZ128rrkz = 15105 |
| 154839 | CEFBS_None, // VPBROADCASTDZ256rm = 15106 |
| 154840 | CEFBS_None, // VPBROADCASTDZ256rmk = 15107 |
| 154841 | CEFBS_None, // VPBROADCASTDZ256rmkz = 15108 |
| 154842 | CEFBS_None, // VPBROADCASTDZ256rr = 15109 |
| 154843 | CEFBS_None, // VPBROADCASTDZ256rrk = 15110 |
| 154844 | CEFBS_None, // VPBROADCASTDZ256rrkz = 15111 |
| 154845 | CEFBS_None, // VPBROADCASTDZrm = 15112 |
| 154846 | CEFBS_None, // VPBROADCASTDZrmk = 15113 |
| 154847 | CEFBS_None, // VPBROADCASTDZrmkz = 15114 |
| 154848 | CEFBS_None, // VPBROADCASTDZrr = 15115 |
| 154849 | CEFBS_None, // VPBROADCASTDZrrk = 15116 |
| 154850 | CEFBS_None, // VPBROADCASTDZrrkz = 15117 |
| 154851 | CEFBS_None, // VPBROADCASTDrZ128rr = 15118 |
| 154852 | CEFBS_None, // VPBROADCASTDrZ128rrk = 15119 |
| 154853 | CEFBS_None, // VPBROADCASTDrZ128rrkz = 15120 |
| 154854 | CEFBS_None, // VPBROADCASTDrZ256rr = 15121 |
| 154855 | CEFBS_None, // VPBROADCASTDrZ256rrk = 15122 |
| 154856 | CEFBS_None, // VPBROADCASTDrZ256rrkz = 15123 |
| 154857 | CEFBS_None, // VPBROADCASTDrZrr = 15124 |
| 154858 | CEFBS_None, // VPBROADCASTDrZrrk = 15125 |
| 154859 | CEFBS_None, // VPBROADCASTDrZrrkz = 15126 |
| 154860 | CEFBS_None, // VPBROADCASTDrm = 15127 |
| 154861 | CEFBS_None, // VPBROADCASTDrr = 15128 |
| 154862 | CEFBS_None, // VPBROADCASTMB2QZ128rr = 15129 |
| 154863 | CEFBS_None, // VPBROADCASTMB2QZ256rr = 15130 |
| 154864 | CEFBS_None, // VPBROADCASTMB2QZrr = 15131 |
| 154865 | CEFBS_None, // VPBROADCASTMW2DZ128rr = 15132 |
| 154866 | CEFBS_None, // VPBROADCASTMW2DZ256rr = 15133 |
| 154867 | CEFBS_None, // VPBROADCASTMW2DZrr = 15134 |
| 154868 | CEFBS_None, // VPBROADCASTQYrm = 15135 |
| 154869 | CEFBS_None, // VPBROADCASTQYrr = 15136 |
| 154870 | CEFBS_None, // VPBROADCASTQZ128rm = 15137 |
| 154871 | CEFBS_None, // VPBROADCASTQZ128rmk = 15138 |
| 154872 | CEFBS_None, // VPBROADCASTQZ128rmkz = 15139 |
| 154873 | CEFBS_None, // VPBROADCASTQZ128rr = 15140 |
| 154874 | CEFBS_None, // VPBROADCASTQZ128rrk = 15141 |
| 154875 | CEFBS_None, // VPBROADCASTQZ128rrkz = 15142 |
| 154876 | CEFBS_None, // VPBROADCASTQZ256rm = 15143 |
| 154877 | CEFBS_None, // VPBROADCASTQZ256rmk = 15144 |
| 154878 | CEFBS_None, // VPBROADCASTQZ256rmkz = 15145 |
| 154879 | CEFBS_None, // VPBROADCASTQZ256rr = 15146 |
| 154880 | CEFBS_None, // VPBROADCASTQZ256rrk = 15147 |
| 154881 | CEFBS_None, // VPBROADCASTQZ256rrkz = 15148 |
| 154882 | CEFBS_None, // VPBROADCASTQZrm = 15149 |
| 154883 | CEFBS_None, // VPBROADCASTQZrmk = 15150 |
| 154884 | CEFBS_None, // VPBROADCASTQZrmkz = 15151 |
| 154885 | CEFBS_None, // VPBROADCASTQZrr = 15152 |
| 154886 | CEFBS_None, // VPBROADCASTQZrrk = 15153 |
| 154887 | CEFBS_None, // VPBROADCASTQZrrkz = 15154 |
| 154888 | CEFBS_None, // VPBROADCASTQrZ128rr = 15155 |
| 154889 | CEFBS_None, // VPBROADCASTQrZ128rrk = 15156 |
| 154890 | CEFBS_None, // VPBROADCASTQrZ128rrkz = 15157 |
| 154891 | CEFBS_None, // VPBROADCASTQrZ256rr = 15158 |
| 154892 | CEFBS_None, // VPBROADCASTQrZ256rrk = 15159 |
| 154893 | CEFBS_None, // VPBROADCASTQrZ256rrkz = 15160 |
| 154894 | CEFBS_None, // VPBROADCASTQrZrr = 15161 |
| 154895 | CEFBS_None, // VPBROADCASTQrZrrk = 15162 |
| 154896 | CEFBS_None, // VPBROADCASTQrZrrkz = 15163 |
| 154897 | CEFBS_None, // VPBROADCASTQrm = 15164 |
| 154898 | CEFBS_None, // VPBROADCASTQrr = 15165 |
| 154899 | CEFBS_None, // VPBROADCASTWYrm = 15166 |
| 154900 | CEFBS_None, // VPBROADCASTWYrr = 15167 |
| 154901 | CEFBS_None, // VPBROADCASTWZ128rm = 15168 |
| 154902 | CEFBS_None, // VPBROADCASTWZ128rmk = 15169 |
| 154903 | CEFBS_None, // VPBROADCASTWZ128rmkz = 15170 |
| 154904 | CEFBS_None, // VPBROADCASTWZ128rr = 15171 |
| 154905 | CEFBS_None, // VPBROADCASTWZ128rrk = 15172 |
| 154906 | CEFBS_None, // VPBROADCASTWZ128rrkz = 15173 |
| 154907 | CEFBS_None, // VPBROADCASTWZ256rm = 15174 |
| 154908 | CEFBS_None, // VPBROADCASTWZ256rmk = 15175 |
| 154909 | CEFBS_None, // VPBROADCASTWZ256rmkz = 15176 |
| 154910 | CEFBS_None, // VPBROADCASTWZ256rr = 15177 |
| 154911 | CEFBS_None, // VPBROADCASTWZ256rrk = 15178 |
| 154912 | CEFBS_None, // VPBROADCASTWZ256rrkz = 15179 |
| 154913 | CEFBS_None, // VPBROADCASTWZrm = 15180 |
| 154914 | CEFBS_None, // VPBROADCASTWZrmk = 15181 |
| 154915 | CEFBS_None, // VPBROADCASTWZrmkz = 15182 |
| 154916 | CEFBS_None, // VPBROADCASTWZrr = 15183 |
| 154917 | CEFBS_None, // VPBROADCASTWZrrk = 15184 |
| 154918 | CEFBS_None, // VPBROADCASTWZrrkz = 15185 |
| 154919 | CEFBS_None, // VPBROADCASTWrZ128rr = 15186 |
| 154920 | CEFBS_None, // VPBROADCASTWrZ128rrk = 15187 |
| 154921 | CEFBS_None, // VPBROADCASTWrZ128rrkz = 15188 |
| 154922 | CEFBS_None, // VPBROADCASTWrZ256rr = 15189 |
| 154923 | CEFBS_None, // VPBROADCASTWrZ256rrk = 15190 |
| 154924 | CEFBS_None, // VPBROADCASTWrZ256rrkz = 15191 |
| 154925 | CEFBS_None, // VPBROADCASTWrZrr = 15192 |
| 154926 | CEFBS_None, // VPBROADCASTWrZrrk = 15193 |
| 154927 | CEFBS_None, // VPBROADCASTWrZrrkz = 15194 |
| 154928 | CEFBS_None, // VPBROADCASTWrm = 15195 |
| 154929 | CEFBS_None, // VPBROADCASTWrr = 15196 |
| 154930 | CEFBS_None, // VPCLMULQDQYrmi = 15197 |
| 154931 | CEFBS_None, // VPCLMULQDQYrri = 15198 |
| 154932 | CEFBS_None, // VPCLMULQDQZ128rmi = 15199 |
| 154933 | CEFBS_None, // VPCLMULQDQZ128rri = 15200 |
| 154934 | CEFBS_None, // VPCLMULQDQZ256rmi = 15201 |
| 154935 | CEFBS_None, // VPCLMULQDQZ256rri = 15202 |
| 154936 | CEFBS_None, // VPCLMULQDQZrmi = 15203 |
| 154937 | CEFBS_None, // VPCLMULQDQZrri = 15204 |
| 154938 | CEFBS_None, // VPCLMULQDQrmi = 15205 |
| 154939 | CEFBS_None, // VPCLMULQDQrri = 15206 |
| 154940 | CEFBS_None, // VPCMOVYrmr = 15207 |
| 154941 | CEFBS_None, // VPCMOVYrrm = 15208 |
| 154942 | CEFBS_None, // VPCMOVYrrr = 15209 |
| 154943 | CEFBS_None, // VPCMOVYrrr_REV = 15210 |
| 154944 | CEFBS_None, // VPCMOVrmr = 15211 |
| 154945 | CEFBS_None, // VPCMOVrrm = 15212 |
| 154946 | CEFBS_None, // VPCMOVrrr = 15213 |
| 154947 | CEFBS_None, // VPCMOVrrr_REV = 15214 |
| 154948 | CEFBS_None, // VPCMPBZ128rmi = 15215 |
| 154949 | CEFBS_None, // VPCMPBZ128rmik = 15216 |
| 154950 | CEFBS_None, // VPCMPBZ128rri = 15217 |
| 154951 | CEFBS_None, // VPCMPBZ128rrik = 15218 |
| 154952 | CEFBS_None, // VPCMPBZ256rmi = 15219 |
| 154953 | CEFBS_None, // VPCMPBZ256rmik = 15220 |
| 154954 | CEFBS_None, // VPCMPBZ256rri = 15221 |
| 154955 | CEFBS_None, // VPCMPBZ256rrik = 15222 |
| 154956 | CEFBS_None, // VPCMPBZrmi = 15223 |
| 154957 | CEFBS_None, // VPCMPBZrmik = 15224 |
| 154958 | CEFBS_None, // VPCMPBZrri = 15225 |
| 154959 | CEFBS_None, // VPCMPBZrrik = 15226 |
| 154960 | CEFBS_None, // VPCMPDZ128rmbi = 15227 |
| 154961 | CEFBS_None, // VPCMPDZ128rmbik = 15228 |
| 154962 | CEFBS_None, // VPCMPDZ128rmi = 15229 |
| 154963 | CEFBS_None, // VPCMPDZ128rmik = 15230 |
| 154964 | CEFBS_None, // VPCMPDZ128rri = 15231 |
| 154965 | CEFBS_None, // VPCMPDZ128rrik = 15232 |
| 154966 | CEFBS_None, // VPCMPDZ256rmbi = 15233 |
| 154967 | CEFBS_None, // VPCMPDZ256rmbik = 15234 |
| 154968 | CEFBS_None, // VPCMPDZ256rmi = 15235 |
| 154969 | CEFBS_None, // VPCMPDZ256rmik = 15236 |
| 154970 | CEFBS_None, // VPCMPDZ256rri = 15237 |
| 154971 | CEFBS_None, // VPCMPDZ256rrik = 15238 |
| 154972 | CEFBS_None, // VPCMPDZrmbi = 15239 |
| 154973 | CEFBS_None, // VPCMPDZrmbik = 15240 |
| 154974 | CEFBS_None, // VPCMPDZrmi = 15241 |
| 154975 | CEFBS_None, // VPCMPDZrmik = 15242 |
| 154976 | CEFBS_None, // VPCMPDZrri = 15243 |
| 154977 | CEFBS_None, // VPCMPDZrrik = 15244 |
| 154978 | CEFBS_None, // VPCMPEQBYrm = 15245 |
| 154979 | CEFBS_None, // VPCMPEQBYrr = 15246 |
| 154980 | CEFBS_None, // VPCMPEQBZ128rm = 15247 |
| 154981 | CEFBS_None, // VPCMPEQBZ128rmk = 15248 |
| 154982 | CEFBS_None, // VPCMPEQBZ128rr = 15249 |
| 154983 | CEFBS_None, // VPCMPEQBZ128rrk = 15250 |
| 154984 | CEFBS_None, // VPCMPEQBZ256rm = 15251 |
| 154985 | CEFBS_None, // VPCMPEQBZ256rmk = 15252 |
| 154986 | CEFBS_None, // VPCMPEQBZ256rr = 15253 |
| 154987 | CEFBS_None, // VPCMPEQBZ256rrk = 15254 |
| 154988 | CEFBS_None, // VPCMPEQBZrm = 15255 |
| 154989 | CEFBS_None, // VPCMPEQBZrmk = 15256 |
| 154990 | CEFBS_None, // VPCMPEQBZrr = 15257 |
| 154991 | CEFBS_None, // VPCMPEQBZrrk = 15258 |
| 154992 | CEFBS_None, // VPCMPEQBrm = 15259 |
| 154993 | CEFBS_None, // VPCMPEQBrr = 15260 |
| 154994 | CEFBS_None, // VPCMPEQDYrm = 15261 |
| 154995 | CEFBS_None, // VPCMPEQDYrr = 15262 |
| 154996 | CEFBS_None, // VPCMPEQDZ128rm = 15263 |
| 154997 | CEFBS_None, // VPCMPEQDZ128rmb = 15264 |
| 154998 | CEFBS_None, // VPCMPEQDZ128rmbk = 15265 |
| 154999 | CEFBS_None, // VPCMPEQDZ128rmk = 15266 |
| 155000 | CEFBS_None, // VPCMPEQDZ128rr = 15267 |
| 155001 | CEFBS_None, // VPCMPEQDZ128rrk = 15268 |
| 155002 | CEFBS_None, // VPCMPEQDZ256rm = 15269 |
| 155003 | CEFBS_None, // VPCMPEQDZ256rmb = 15270 |
| 155004 | CEFBS_None, // VPCMPEQDZ256rmbk = 15271 |
| 155005 | CEFBS_None, // VPCMPEQDZ256rmk = 15272 |
| 155006 | CEFBS_None, // VPCMPEQDZ256rr = 15273 |
| 155007 | CEFBS_None, // VPCMPEQDZ256rrk = 15274 |
| 155008 | CEFBS_None, // VPCMPEQDZrm = 15275 |
| 155009 | CEFBS_None, // VPCMPEQDZrmb = 15276 |
| 155010 | CEFBS_None, // VPCMPEQDZrmbk = 15277 |
| 155011 | CEFBS_None, // VPCMPEQDZrmk = 15278 |
| 155012 | CEFBS_None, // VPCMPEQDZrr = 15279 |
| 155013 | CEFBS_None, // VPCMPEQDZrrk = 15280 |
| 155014 | CEFBS_None, // VPCMPEQDrm = 15281 |
| 155015 | CEFBS_None, // VPCMPEQDrr = 15282 |
| 155016 | CEFBS_None, // VPCMPEQQYrm = 15283 |
| 155017 | CEFBS_None, // VPCMPEQQYrr = 15284 |
| 155018 | CEFBS_None, // VPCMPEQQZ128rm = 15285 |
| 155019 | CEFBS_None, // VPCMPEQQZ128rmb = 15286 |
| 155020 | CEFBS_None, // VPCMPEQQZ128rmbk = 15287 |
| 155021 | CEFBS_None, // VPCMPEQQZ128rmk = 15288 |
| 155022 | CEFBS_None, // VPCMPEQQZ128rr = 15289 |
| 155023 | CEFBS_None, // VPCMPEQQZ128rrk = 15290 |
| 155024 | CEFBS_None, // VPCMPEQQZ256rm = 15291 |
| 155025 | CEFBS_None, // VPCMPEQQZ256rmb = 15292 |
| 155026 | CEFBS_None, // VPCMPEQQZ256rmbk = 15293 |
| 155027 | CEFBS_None, // VPCMPEQQZ256rmk = 15294 |
| 155028 | CEFBS_None, // VPCMPEQQZ256rr = 15295 |
| 155029 | CEFBS_None, // VPCMPEQQZ256rrk = 15296 |
| 155030 | CEFBS_None, // VPCMPEQQZrm = 15297 |
| 155031 | CEFBS_None, // VPCMPEQQZrmb = 15298 |
| 155032 | CEFBS_None, // VPCMPEQQZrmbk = 15299 |
| 155033 | CEFBS_None, // VPCMPEQQZrmk = 15300 |
| 155034 | CEFBS_None, // VPCMPEQQZrr = 15301 |
| 155035 | CEFBS_None, // VPCMPEQQZrrk = 15302 |
| 155036 | CEFBS_None, // VPCMPEQQrm = 15303 |
| 155037 | CEFBS_None, // VPCMPEQQrr = 15304 |
| 155038 | CEFBS_None, // VPCMPEQWYrm = 15305 |
| 155039 | CEFBS_None, // VPCMPEQWYrr = 15306 |
| 155040 | CEFBS_None, // VPCMPEQWZ128rm = 15307 |
| 155041 | CEFBS_None, // VPCMPEQWZ128rmk = 15308 |
| 155042 | CEFBS_None, // VPCMPEQWZ128rr = 15309 |
| 155043 | CEFBS_None, // VPCMPEQWZ128rrk = 15310 |
| 155044 | CEFBS_None, // VPCMPEQWZ256rm = 15311 |
| 155045 | CEFBS_None, // VPCMPEQWZ256rmk = 15312 |
| 155046 | CEFBS_None, // VPCMPEQWZ256rr = 15313 |
| 155047 | CEFBS_None, // VPCMPEQWZ256rrk = 15314 |
| 155048 | CEFBS_None, // VPCMPEQWZrm = 15315 |
| 155049 | CEFBS_None, // VPCMPEQWZrmk = 15316 |
| 155050 | CEFBS_None, // VPCMPEQWZrr = 15317 |
| 155051 | CEFBS_None, // VPCMPEQWZrrk = 15318 |
| 155052 | CEFBS_None, // VPCMPEQWrm = 15319 |
| 155053 | CEFBS_None, // VPCMPEQWrr = 15320 |
| 155054 | CEFBS_None, // VPCMPESTRIrmi = 15321 |
| 155055 | CEFBS_None, // VPCMPESTRIrri = 15322 |
| 155056 | CEFBS_None, // VPCMPESTRMrmi = 15323 |
| 155057 | CEFBS_None, // VPCMPESTRMrri = 15324 |
| 155058 | CEFBS_None, // VPCMPGTBYrm = 15325 |
| 155059 | CEFBS_None, // VPCMPGTBYrr = 15326 |
| 155060 | CEFBS_None, // VPCMPGTBZ128rm = 15327 |
| 155061 | CEFBS_None, // VPCMPGTBZ128rmk = 15328 |
| 155062 | CEFBS_None, // VPCMPGTBZ128rr = 15329 |
| 155063 | CEFBS_None, // VPCMPGTBZ128rrk = 15330 |
| 155064 | CEFBS_None, // VPCMPGTBZ256rm = 15331 |
| 155065 | CEFBS_None, // VPCMPGTBZ256rmk = 15332 |
| 155066 | CEFBS_None, // VPCMPGTBZ256rr = 15333 |
| 155067 | CEFBS_None, // VPCMPGTBZ256rrk = 15334 |
| 155068 | CEFBS_None, // VPCMPGTBZrm = 15335 |
| 155069 | CEFBS_None, // VPCMPGTBZrmk = 15336 |
| 155070 | CEFBS_None, // VPCMPGTBZrr = 15337 |
| 155071 | CEFBS_None, // VPCMPGTBZrrk = 15338 |
| 155072 | CEFBS_None, // VPCMPGTBrm = 15339 |
| 155073 | CEFBS_None, // VPCMPGTBrr = 15340 |
| 155074 | CEFBS_None, // VPCMPGTDYrm = 15341 |
| 155075 | CEFBS_None, // VPCMPGTDYrr = 15342 |
| 155076 | CEFBS_None, // VPCMPGTDZ128rm = 15343 |
| 155077 | CEFBS_None, // VPCMPGTDZ128rmb = 15344 |
| 155078 | CEFBS_None, // VPCMPGTDZ128rmbk = 15345 |
| 155079 | CEFBS_None, // VPCMPGTDZ128rmk = 15346 |
| 155080 | CEFBS_None, // VPCMPGTDZ128rr = 15347 |
| 155081 | CEFBS_None, // VPCMPGTDZ128rrk = 15348 |
| 155082 | CEFBS_None, // VPCMPGTDZ256rm = 15349 |
| 155083 | CEFBS_None, // VPCMPGTDZ256rmb = 15350 |
| 155084 | CEFBS_None, // VPCMPGTDZ256rmbk = 15351 |
| 155085 | CEFBS_None, // VPCMPGTDZ256rmk = 15352 |
| 155086 | CEFBS_None, // VPCMPGTDZ256rr = 15353 |
| 155087 | CEFBS_None, // VPCMPGTDZ256rrk = 15354 |
| 155088 | CEFBS_None, // VPCMPGTDZrm = 15355 |
| 155089 | CEFBS_None, // VPCMPGTDZrmb = 15356 |
| 155090 | CEFBS_None, // VPCMPGTDZrmbk = 15357 |
| 155091 | CEFBS_None, // VPCMPGTDZrmk = 15358 |
| 155092 | CEFBS_None, // VPCMPGTDZrr = 15359 |
| 155093 | CEFBS_None, // VPCMPGTDZrrk = 15360 |
| 155094 | CEFBS_None, // VPCMPGTDrm = 15361 |
| 155095 | CEFBS_None, // VPCMPGTDrr = 15362 |
| 155096 | CEFBS_None, // VPCMPGTQYrm = 15363 |
| 155097 | CEFBS_None, // VPCMPGTQYrr = 15364 |
| 155098 | CEFBS_None, // VPCMPGTQZ128rm = 15365 |
| 155099 | CEFBS_None, // VPCMPGTQZ128rmb = 15366 |
| 155100 | CEFBS_None, // VPCMPGTQZ128rmbk = 15367 |
| 155101 | CEFBS_None, // VPCMPGTQZ128rmk = 15368 |
| 155102 | CEFBS_None, // VPCMPGTQZ128rr = 15369 |
| 155103 | CEFBS_None, // VPCMPGTQZ128rrk = 15370 |
| 155104 | CEFBS_None, // VPCMPGTQZ256rm = 15371 |
| 155105 | CEFBS_None, // VPCMPGTQZ256rmb = 15372 |
| 155106 | CEFBS_None, // VPCMPGTQZ256rmbk = 15373 |
| 155107 | CEFBS_None, // VPCMPGTQZ256rmk = 15374 |
| 155108 | CEFBS_None, // VPCMPGTQZ256rr = 15375 |
| 155109 | CEFBS_None, // VPCMPGTQZ256rrk = 15376 |
| 155110 | CEFBS_None, // VPCMPGTQZrm = 15377 |
| 155111 | CEFBS_None, // VPCMPGTQZrmb = 15378 |
| 155112 | CEFBS_None, // VPCMPGTQZrmbk = 15379 |
| 155113 | CEFBS_None, // VPCMPGTQZrmk = 15380 |
| 155114 | CEFBS_None, // VPCMPGTQZrr = 15381 |
| 155115 | CEFBS_None, // VPCMPGTQZrrk = 15382 |
| 155116 | CEFBS_None, // VPCMPGTQrm = 15383 |
| 155117 | CEFBS_None, // VPCMPGTQrr = 15384 |
| 155118 | CEFBS_None, // VPCMPGTWYrm = 15385 |
| 155119 | CEFBS_None, // VPCMPGTWYrr = 15386 |
| 155120 | CEFBS_None, // VPCMPGTWZ128rm = 15387 |
| 155121 | CEFBS_None, // VPCMPGTWZ128rmk = 15388 |
| 155122 | CEFBS_None, // VPCMPGTWZ128rr = 15389 |
| 155123 | CEFBS_None, // VPCMPGTWZ128rrk = 15390 |
| 155124 | CEFBS_None, // VPCMPGTWZ256rm = 15391 |
| 155125 | CEFBS_None, // VPCMPGTWZ256rmk = 15392 |
| 155126 | CEFBS_None, // VPCMPGTWZ256rr = 15393 |
| 155127 | CEFBS_None, // VPCMPGTWZ256rrk = 15394 |
| 155128 | CEFBS_None, // VPCMPGTWZrm = 15395 |
| 155129 | CEFBS_None, // VPCMPGTWZrmk = 15396 |
| 155130 | CEFBS_None, // VPCMPGTWZrr = 15397 |
| 155131 | CEFBS_None, // VPCMPGTWZrrk = 15398 |
| 155132 | CEFBS_None, // VPCMPGTWrm = 15399 |
| 155133 | CEFBS_None, // VPCMPGTWrr = 15400 |
| 155134 | CEFBS_None, // VPCMPISTRIrmi = 15401 |
| 155135 | CEFBS_None, // VPCMPISTRIrri = 15402 |
| 155136 | CEFBS_None, // VPCMPISTRMrmi = 15403 |
| 155137 | CEFBS_None, // VPCMPISTRMrri = 15404 |
| 155138 | CEFBS_None, // VPCMPQZ128rmbi = 15405 |
| 155139 | CEFBS_None, // VPCMPQZ128rmbik = 15406 |
| 155140 | CEFBS_None, // VPCMPQZ128rmi = 15407 |
| 155141 | CEFBS_None, // VPCMPQZ128rmik = 15408 |
| 155142 | CEFBS_None, // VPCMPQZ128rri = 15409 |
| 155143 | CEFBS_None, // VPCMPQZ128rrik = 15410 |
| 155144 | CEFBS_None, // VPCMPQZ256rmbi = 15411 |
| 155145 | CEFBS_None, // VPCMPQZ256rmbik = 15412 |
| 155146 | CEFBS_None, // VPCMPQZ256rmi = 15413 |
| 155147 | CEFBS_None, // VPCMPQZ256rmik = 15414 |
| 155148 | CEFBS_None, // VPCMPQZ256rri = 15415 |
| 155149 | CEFBS_None, // VPCMPQZ256rrik = 15416 |
| 155150 | CEFBS_None, // VPCMPQZrmbi = 15417 |
| 155151 | CEFBS_None, // VPCMPQZrmbik = 15418 |
| 155152 | CEFBS_None, // VPCMPQZrmi = 15419 |
| 155153 | CEFBS_None, // VPCMPQZrmik = 15420 |
| 155154 | CEFBS_None, // VPCMPQZrri = 15421 |
| 155155 | CEFBS_None, // VPCMPQZrrik = 15422 |
| 155156 | CEFBS_None, // VPCMPUBZ128rmi = 15423 |
| 155157 | CEFBS_None, // VPCMPUBZ128rmik = 15424 |
| 155158 | CEFBS_None, // VPCMPUBZ128rri = 15425 |
| 155159 | CEFBS_None, // VPCMPUBZ128rrik = 15426 |
| 155160 | CEFBS_None, // VPCMPUBZ256rmi = 15427 |
| 155161 | CEFBS_None, // VPCMPUBZ256rmik = 15428 |
| 155162 | CEFBS_None, // VPCMPUBZ256rri = 15429 |
| 155163 | CEFBS_None, // VPCMPUBZ256rrik = 15430 |
| 155164 | CEFBS_None, // VPCMPUBZrmi = 15431 |
| 155165 | CEFBS_None, // VPCMPUBZrmik = 15432 |
| 155166 | CEFBS_None, // VPCMPUBZrri = 15433 |
| 155167 | CEFBS_None, // VPCMPUBZrrik = 15434 |
| 155168 | CEFBS_None, // VPCMPUDZ128rmbi = 15435 |
| 155169 | CEFBS_None, // VPCMPUDZ128rmbik = 15436 |
| 155170 | CEFBS_None, // VPCMPUDZ128rmi = 15437 |
| 155171 | CEFBS_None, // VPCMPUDZ128rmik = 15438 |
| 155172 | CEFBS_None, // VPCMPUDZ128rri = 15439 |
| 155173 | CEFBS_None, // VPCMPUDZ128rrik = 15440 |
| 155174 | CEFBS_None, // VPCMPUDZ256rmbi = 15441 |
| 155175 | CEFBS_None, // VPCMPUDZ256rmbik = 15442 |
| 155176 | CEFBS_None, // VPCMPUDZ256rmi = 15443 |
| 155177 | CEFBS_None, // VPCMPUDZ256rmik = 15444 |
| 155178 | CEFBS_None, // VPCMPUDZ256rri = 15445 |
| 155179 | CEFBS_None, // VPCMPUDZ256rrik = 15446 |
| 155180 | CEFBS_None, // VPCMPUDZrmbi = 15447 |
| 155181 | CEFBS_None, // VPCMPUDZrmbik = 15448 |
| 155182 | CEFBS_None, // VPCMPUDZrmi = 15449 |
| 155183 | CEFBS_None, // VPCMPUDZrmik = 15450 |
| 155184 | CEFBS_None, // VPCMPUDZrri = 15451 |
| 155185 | CEFBS_None, // VPCMPUDZrrik = 15452 |
| 155186 | CEFBS_None, // VPCMPUQZ128rmbi = 15453 |
| 155187 | CEFBS_None, // VPCMPUQZ128rmbik = 15454 |
| 155188 | CEFBS_None, // VPCMPUQZ128rmi = 15455 |
| 155189 | CEFBS_None, // VPCMPUQZ128rmik = 15456 |
| 155190 | CEFBS_None, // VPCMPUQZ128rri = 15457 |
| 155191 | CEFBS_None, // VPCMPUQZ128rrik = 15458 |
| 155192 | CEFBS_None, // VPCMPUQZ256rmbi = 15459 |
| 155193 | CEFBS_None, // VPCMPUQZ256rmbik = 15460 |
| 155194 | CEFBS_None, // VPCMPUQZ256rmi = 15461 |
| 155195 | CEFBS_None, // VPCMPUQZ256rmik = 15462 |
| 155196 | CEFBS_None, // VPCMPUQZ256rri = 15463 |
| 155197 | CEFBS_None, // VPCMPUQZ256rrik = 15464 |
| 155198 | CEFBS_None, // VPCMPUQZrmbi = 15465 |
| 155199 | CEFBS_None, // VPCMPUQZrmbik = 15466 |
| 155200 | CEFBS_None, // VPCMPUQZrmi = 15467 |
| 155201 | CEFBS_None, // VPCMPUQZrmik = 15468 |
| 155202 | CEFBS_None, // VPCMPUQZrri = 15469 |
| 155203 | CEFBS_None, // VPCMPUQZrrik = 15470 |
| 155204 | CEFBS_None, // VPCMPUWZ128rmi = 15471 |
| 155205 | CEFBS_None, // VPCMPUWZ128rmik = 15472 |
| 155206 | CEFBS_None, // VPCMPUWZ128rri = 15473 |
| 155207 | CEFBS_None, // VPCMPUWZ128rrik = 15474 |
| 155208 | CEFBS_None, // VPCMPUWZ256rmi = 15475 |
| 155209 | CEFBS_None, // VPCMPUWZ256rmik = 15476 |
| 155210 | CEFBS_None, // VPCMPUWZ256rri = 15477 |
| 155211 | CEFBS_None, // VPCMPUWZ256rrik = 15478 |
| 155212 | CEFBS_None, // VPCMPUWZrmi = 15479 |
| 155213 | CEFBS_None, // VPCMPUWZrmik = 15480 |
| 155214 | CEFBS_None, // VPCMPUWZrri = 15481 |
| 155215 | CEFBS_None, // VPCMPUWZrrik = 15482 |
| 155216 | CEFBS_None, // VPCMPWZ128rmi = 15483 |
| 155217 | CEFBS_None, // VPCMPWZ128rmik = 15484 |
| 155218 | CEFBS_None, // VPCMPWZ128rri = 15485 |
| 155219 | CEFBS_None, // VPCMPWZ128rrik = 15486 |
| 155220 | CEFBS_None, // VPCMPWZ256rmi = 15487 |
| 155221 | CEFBS_None, // VPCMPWZ256rmik = 15488 |
| 155222 | CEFBS_None, // VPCMPWZ256rri = 15489 |
| 155223 | CEFBS_None, // VPCMPWZ256rrik = 15490 |
| 155224 | CEFBS_None, // VPCMPWZrmi = 15491 |
| 155225 | CEFBS_None, // VPCMPWZrmik = 15492 |
| 155226 | CEFBS_None, // VPCMPWZrri = 15493 |
| 155227 | CEFBS_None, // VPCMPWZrrik = 15494 |
| 155228 | CEFBS_None, // VPCOMBmi = 15495 |
| 155229 | CEFBS_None, // VPCOMBri = 15496 |
| 155230 | CEFBS_None, // VPCOMDmi = 15497 |
| 155231 | CEFBS_None, // VPCOMDri = 15498 |
| 155232 | CEFBS_None, // VPCOMPRESSBZ128mr = 15499 |
| 155233 | CEFBS_None, // VPCOMPRESSBZ128mrk = 15500 |
| 155234 | CEFBS_None, // VPCOMPRESSBZ128rr = 15501 |
| 155235 | CEFBS_None, // VPCOMPRESSBZ128rrk = 15502 |
| 155236 | CEFBS_None, // VPCOMPRESSBZ128rrkz = 15503 |
| 155237 | CEFBS_None, // VPCOMPRESSBZ256mr = 15504 |
| 155238 | CEFBS_None, // VPCOMPRESSBZ256mrk = 15505 |
| 155239 | CEFBS_None, // VPCOMPRESSBZ256rr = 15506 |
| 155240 | CEFBS_None, // VPCOMPRESSBZ256rrk = 15507 |
| 155241 | CEFBS_None, // VPCOMPRESSBZ256rrkz = 15508 |
| 155242 | CEFBS_None, // VPCOMPRESSBZmr = 15509 |
| 155243 | CEFBS_None, // VPCOMPRESSBZmrk = 15510 |
| 155244 | CEFBS_None, // VPCOMPRESSBZrr = 15511 |
| 155245 | CEFBS_None, // VPCOMPRESSBZrrk = 15512 |
| 155246 | CEFBS_None, // VPCOMPRESSBZrrkz = 15513 |
| 155247 | CEFBS_None, // VPCOMPRESSDZ128mr = 15514 |
| 155248 | CEFBS_None, // VPCOMPRESSDZ128mrk = 15515 |
| 155249 | CEFBS_None, // VPCOMPRESSDZ128rr = 15516 |
| 155250 | CEFBS_None, // VPCOMPRESSDZ128rrk = 15517 |
| 155251 | CEFBS_None, // VPCOMPRESSDZ128rrkz = 15518 |
| 155252 | CEFBS_None, // VPCOMPRESSDZ256mr = 15519 |
| 155253 | CEFBS_None, // VPCOMPRESSDZ256mrk = 15520 |
| 155254 | CEFBS_None, // VPCOMPRESSDZ256rr = 15521 |
| 155255 | CEFBS_None, // VPCOMPRESSDZ256rrk = 15522 |
| 155256 | CEFBS_None, // VPCOMPRESSDZ256rrkz = 15523 |
| 155257 | CEFBS_None, // VPCOMPRESSDZmr = 15524 |
| 155258 | CEFBS_None, // VPCOMPRESSDZmrk = 15525 |
| 155259 | CEFBS_None, // VPCOMPRESSDZrr = 15526 |
| 155260 | CEFBS_None, // VPCOMPRESSDZrrk = 15527 |
| 155261 | CEFBS_None, // VPCOMPRESSDZrrkz = 15528 |
| 155262 | CEFBS_None, // VPCOMPRESSQZ128mr = 15529 |
| 155263 | CEFBS_None, // VPCOMPRESSQZ128mrk = 15530 |
| 155264 | CEFBS_None, // VPCOMPRESSQZ128rr = 15531 |
| 155265 | CEFBS_None, // VPCOMPRESSQZ128rrk = 15532 |
| 155266 | CEFBS_None, // VPCOMPRESSQZ128rrkz = 15533 |
| 155267 | CEFBS_None, // VPCOMPRESSQZ256mr = 15534 |
| 155268 | CEFBS_None, // VPCOMPRESSQZ256mrk = 15535 |
| 155269 | CEFBS_None, // VPCOMPRESSQZ256rr = 15536 |
| 155270 | CEFBS_None, // VPCOMPRESSQZ256rrk = 15537 |
| 155271 | CEFBS_None, // VPCOMPRESSQZ256rrkz = 15538 |
| 155272 | CEFBS_None, // VPCOMPRESSQZmr = 15539 |
| 155273 | CEFBS_None, // VPCOMPRESSQZmrk = 15540 |
| 155274 | CEFBS_None, // VPCOMPRESSQZrr = 15541 |
| 155275 | CEFBS_None, // VPCOMPRESSQZrrk = 15542 |
| 155276 | CEFBS_None, // VPCOMPRESSQZrrkz = 15543 |
| 155277 | CEFBS_None, // VPCOMPRESSWZ128mr = 15544 |
| 155278 | CEFBS_None, // VPCOMPRESSWZ128mrk = 15545 |
| 155279 | CEFBS_None, // VPCOMPRESSWZ128rr = 15546 |
| 155280 | CEFBS_None, // VPCOMPRESSWZ128rrk = 15547 |
| 155281 | CEFBS_None, // VPCOMPRESSWZ128rrkz = 15548 |
| 155282 | CEFBS_None, // VPCOMPRESSWZ256mr = 15549 |
| 155283 | CEFBS_None, // VPCOMPRESSWZ256mrk = 15550 |
| 155284 | CEFBS_None, // VPCOMPRESSWZ256rr = 15551 |
| 155285 | CEFBS_None, // VPCOMPRESSWZ256rrk = 15552 |
| 155286 | CEFBS_None, // VPCOMPRESSWZ256rrkz = 15553 |
| 155287 | CEFBS_None, // VPCOMPRESSWZmr = 15554 |
| 155288 | CEFBS_None, // VPCOMPRESSWZmrk = 15555 |
| 155289 | CEFBS_None, // VPCOMPRESSWZrr = 15556 |
| 155290 | CEFBS_None, // VPCOMPRESSWZrrk = 15557 |
| 155291 | CEFBS_None, // VPCOMPRESSWZrrkz = 15558 |
| 155292 | CEFBS_None, // VPCOMQmi = 15559 |
| 155293 | CEFBS_None, // VPCOMQri = 15560 |
| 155294 | CEFBS_None, // VPCOMUBmi = 15561 |
| 155295 | CEFBS_None, // VPCOMUBri = 15562 |
| 155296 | CEFBS_None, // VPCOMUDmi = 15563 |
| 155297 | CEFBS_None, // VPCOMUDri = 15564 |
| 155298 | CEFBS_None, // VPCOMUQmi = 15565 |
| 155299 | CEFBS_None, // VPCOMUQri = 15566 |
| 155300 | CEFBS_None, // VPCOMUWmi = 15567 |
| 155301 | CEFBS_None, // VPCOMUWri = 15568 |
| 155302 | CEFBS_None, // VPCOMWmi = 15569 |
| 155303 | CEFBS_None, // VPCOMWri = 15570 |
| 155304 | CEFBS_None, // VPCONFLICTDZ128rm = 15571 |
| 155305 | CEFBS_None, // VPCONFLICTDZ128rmb = 15572 |
| 155306 | CEFBS_None, // VPCONFLICTDZ128rmbk = 15573 |
| 155307 | CEFBS_None, // VPCONFLICTDZ128rmbkz = 15574 |
| 155308 | CEFBS_None, // VPCONFLICTDZ128rmk = 15575 |
| 155309 | CEFBS_None, // VPCONFLICTDZ128rmkz = 15576 |
| 155310 | CEFBS_None, // VPCONFLICTDZ128rr = 15577 |
| 155311 | CEFBS_None, // VPCONFLICTDZ128rrk = 15578 |
| 155312 | CEFBS_None, // VPCONFLICTDZ128rrkz = 15579 |
| 155313 | CEFBS_None, // VPCONFLICTDZ256rm = 15580 |
| 155314 | CEFBS_None, // VPCONFLICTDZ256rmb = 15581 |
| 155315 | CEFBS_None, // VPCONFLICTDZ256rmbk = 15582 |
| 155316 | CEFBS_None, // VPCONFLICTDZ256rmbkz = 15583 |
| 155317 | CEFBS_None, // VPCONFLICTDZ256rmk = 15584 |
| 155318 | CEFBS_None, // VPCONFLICTDZ256rmkz = 15585 |
| 155319 | CEFBS_None, // VPCONFLICTDZ256rr = 15586 |
| 155320 | CEFBS_None, // VPCONFLICTDZ256rrk = 15587 |
| 155321 | CEFBS_None, // VPCONFLICTDZ256rrkz = 15588 |
| 155322 | CEFBS_None, // VPCONFLICTDZrm = 15589 |
| 155323 | CEFBS_None, // VPCONFLICTDZrmb = 15590 |
| 155324 | CEFBS_None, // VPCONFLICTDZrmbk = 15591 |
| 155325 | CEFBS_None, // VPCONFLICTDZrmbkz = 15592 |
| 155326 | CEFBS_None, // VPCONFLICTDZrmk = 15593 |
| 155327 | CEFBS_None, // VPCONFLICTDZrmkz = 15594 |
| 155328 | CEFBS_None, // VPCONFLICTDZrr = 15595 |
| 155329 | CEFBS_None, // VPCONFLICTDZrrk = 15596 |
| 155330 | CEFBS_None, // VPCONFLICTDZrrkz = 15597 |
| 155331 | CEFBS_None, // VPCONFLICTQZ128rm = 15598 |
| 155332 | CEFBS_None, // VPCONFLICTQZ128rmb = 15599 |
| 155333 | CEFBS_None, // VPCONFLICTQZ128rmbk = 15600 |
| 155334 | CEFBS_None, // VPCONFLICTQZ128rmbkz = 15601 |
| 155335 | CEFBS_None, // VPCONFLICTQZ128rmk = 15602 |
| 155336 | CEFBS_None, // VPCONFLICTQZ128rmkz = 15603 |
| 155337 | CEFBS_None, // VPCONFLICTQZ128rr = 15604 |
| 155338 | CEFBS_None, // VPCONFLICTQZ128rrk = 15605 |
| 155339 | CEFBS_None, // VPCONFLICTQZ128rrkz = 15606 |
| 155340 | CEFBS_None, // VPCONFLICTQZ256rm = 15607 |
| 155341 | CEFBS_None, // VPCONFLICTQZ256rmb = 15608 |
| 155342 | CEFBS_None, // VPCONFLICTQZ256rmbk = 15609 |
| 155343 | CEFBS_None, // VPCONFLICTQZ256rmbkz = 15610 |
| 155344 | CEFBS_None, // VPCONFLICTQZ256rmk = 15611 |
| 155345 | CEFBS_None, // VPCONFLICTQZ256rmkz = 15612 |
| 155346 | CEFBS_None, // VPCONFLICTQZ256rr = 15613 |
| 155347 | CEFBS_None, // VPCONFLICTQZ256rrk = 15614 |
| 155348 | CEFBS_None, // VPCONFLICTQZ256rrkz = 15615 |
| 155349 | CEFBS_None, // VPCONFLICTQZrm = 15616 |
| 155350 | CEFBS_None, // VPCONFLICTQZrmb = 15617 |
| 155351 | CEFBS_None, // VPCONFLICTQZrmbk = 15618 |
| 155352 | CEFBS_None, // VPCONFLICTQZrmbkz = 15619 |
| 155353 | CEFBS_None, // VPCONFLICTQZrmk = 15620 |
| 155354 | CEFBS_None, // VPCONFLICTQZrmkz = 15621 |
| 155355 | CEFBS_None, // VPCONFLICTQZrr = 15622 |
| 155356 | CEFBS_None, // VPCONFLICTQZrrk = 15623 |
| 155357 | CEFBS_None, // VPCONFLICTQZrrkz = 15624 |
| 155358 | CEFBS_None, // VPDPBSSDSYrm = 15625 |
| 155359 | CEFBS_None, // VPDPBSSDSYrr = 15626 |
| 155360 | CEFBS_None, // VPDPBSSDSZ128m = 15627 |
| 155361 | CEFBS_None, // VPDPBSSDSZ128mb = 15628 |
| 155362 | CEFBS_None, // VPDPBSSDSZ128mbk = 15629 |
| 155363 | CEFBS_None, // VPDPBSSDSZ128mbkz = 15630 |
| 155364 | CEFBS_None, // VPDPBSSDSZ128mk = 15631 |
| 155365 | CEFBS_None, // VPDPBSSDSZ128mkz = 15632 |
| 155366 | CEFBS_None, // VPDPBSSDSZ128r = 15633 |
| 155367 | CEFBS_None, // VPDPBSSDSZ128rk = 15634 |
| 155368 | CEFBS_None, // VPDPBSSDSZ128rkz = 15635 |
| 155369 | CEFBS_None, // VPDPBSSDSZ256m = 15636 |
| 155370 | CEFBS_None, // VPDPBSSDSZ256mb = 15637 |
| 155371 | CEFBS_None, // VPDPBSSDSZ256mbk = 15638 |
| 155372 | CEFBS_None, // VPDPBSSDSZ256mbkz = 15639 |
| 155373 | CEFBS_None, // VPDPBSSDSZ256mk = 15640 |
| 155374 | CEFBS_None, // VPDPBSSDSZ256mkz = 15641 |
| 155375 | CEFBS_None, // VPDPBSSDSZ256r = 15642 |
| 155376 | CEFBS_None, // VPDPBSSDSZ256rk = 15643 |
| 155377 | CEFBS_None, // VPDPBSSDSZ256rkz = 15644 |
| 155378 | CEFBS_None, // VPDPBSSDSZm = 15645 |
| 155379 | CEFBS_None, // VPDPBSSDSZmb = 15646 |
| 155380 | CEFBS_None, // VPDPBSSDSZmbk = 15647 |
| 155381 | CEFBS_None, // VPDPBSSDSZmbkz = 15648 |
| 155382 | CEFBS_None, // VPDPBSSDSZmk = 15649 |
| 155383 | CEFBS_None, // VPDPBSSDSZmkz = 15650 |
| 155384 | CEFBS_None, // VPDPBSSDSZr = 15651 |
| 155385 | CEFBS_None, // VPDPBSSDSZrk = 15652 |
| 155386 | CEFBS_None, // VPDPBSSDSZrkz = 15653 |
| 155387 | CEFBS_None, // VPDPBSSDSrm = 15654 |
| 155388 | CEFBS_None, // VPDPBSSDSrr = 15655 |
| 155389 | CEFBS_None, // VPDPBSSDYrm = 15656 |
| 155390 | CEFBS_None, // VPDPBSSDYrr = 15657 |
| 155391 | CEFBS_None, // VPDPBSSDZ128m = 15658 |
| 155392 | CEFBS_None, // VPDPBSSDZ128mb = 15659 |
| 155393 | CEFBS_None, // VPDPBSSDZ128mbk = 15660 |
| 155394 | CEFBS_None, // VPDPBSSDZ128mbkz = 15661 |
| 155395 | CEFBS_None, // VPDPBSSDZ128mk = 15662 |
| 155396 | CEFBS_None, // VPDPBSSDZ128mkz = 15663 |
| 155397 | CEFBS_None, // VPDPBSSDZ128r = 15664 |
| 155398 | CEFBS_None, // VPDPBSSDZ128rk = 15665 |
| 155399 | CEFBS_None, // VPDPBSSDZ128rkz = 15666 |
| 155400 | CEFBS_None, // VPDPBSSDZ256m = 15667 |
| 155401 | CEFBS_None, // VPDPBSSDZ256mb = 15668 |
| 155402 | CEFBS_None, // VPDPBSSDZ256mbk = 15669 |
| 155403 | CEFBS_None, // VPDPBSSDZ256mbkz = 15670 |
| 155404 | CEFBS_None, // VPDPBSSDZ256mk = 15671 |
| 155405 | CEFBS_None, // VPDPBSSDZ256mkz = 15672 |
| 155406 | CEFBS_None, // VPDPBSSDZ256r = 15673 |
| 155407 | CEFBS_None, // VPDPBSSDZ256rk = 15674 |
| 155408 | CEFBS_None, // VPDPBSSDZ256rkz = 15675 |
| 155409 | CEFBS_None, // VPDPBSSDZm = 15676 |
| 155410 | CEFBS_None, // VPDPBSSDZmb = 15677 |
| 155411 | CEFBS_None, // VPDPBSSDZmbk = 15678 |
| 155412 | CEFBS_None, // VPDPBSSDZmbkz = 15679 |
| 155413 | CEFBS_None, // VPDPBSSDZmk = 15680 |
| 155414 | CEFBS_None, // VPDPBSSDZmkz = 15681 |
| 155415 | CEFBS_None, // VPDPBSSDZr = 15682 |
| 155416 | CEFBS_None, // VPDPBSSDZrk = 15683 |
| 155417 | CEFBS_None, // VPDPBSSDZrkz = 15684 |
| 155418 | CEFBS_None, // VPDPBSSDrm = 15685 |
| 155419 | CEFBS_None, // VPDPBSSDrr = 15686 |
| 155420 | CEFBS_None, // VPDPBSUDSYrm = 15687 |
| 155421 | CEFBS_None, // VPDPBSUDSYrr = 15688 |
| 155422 | CEFBS_None, // VPDPBSUDSZ128m = 15689 |
| 155423 | CEFBS_None, // VPDPBSUDSZ128mb = 15690 |
| 155424 | CEFBS_None, // VPDPBSUDSZ128mbk = 15691 |
| 155425 | CEFBS_None, // VPDPBSUDSZ128mbkz = 15692 |
| 155426 | CEFBS_None, // VPDPBSUDSZ128mk = 15693 |
| 155427 | CEFBS_None, // VPDPBSUDSZ128mkz = 15694 |
| 155428 | CEFBS_None, // VPDPBSUDSZ128r = 15695 |
| 155429 | CEFBS_None, // VPDPBSUDSZ128rk = 15696 |
| 155430 | CEFBS_None, // VPDPBSUDSZ128rkz = 15697 |
| 155431 | CEFBS_None, // VPDPBSUDSZ256m = 15698 |
| 155432 | CEFBS_None, // VPDPBSUDSZ256mb = 15699 |
| 155433 | CEFBS_None, // VPDPBSUDSZ256mbk = 15700 |
| 155434 | CEFBS_None, // VPDPBSUDSZ256mbkz = 15701 |
| 155435 | CEFBS_None, // VPDPBSUDSZ256mk = 15702 |
| 155436 | CEFBS_None, // VPDPBSUDSZ256mkz = 15703 |
| 155437 | CEFBS_None, // VPDPBSUDSZ256r = 15704 |
| 155438 | CEFBS_None, // VPDPBSUDSZ256rk = 15705 |
| 155439 | CEFBS_None, // VPDPBSUDSZ256rkz = 15706 |
| 155440 | CEFBS_None, // VPDPBSUDSZm = 15707 |
| 155441 | CEFBS_None, // VPDPBSUDSZmb = 15708 |
| 155442 | CEFBS_None, // VPDPBSUDSZmbk = 15709 |
| 155443 | CEFBS_None, // VPDPBSUDSZmbkz = 15710 |
| 155444 | CEFBS_None, // VPDPBSUDSZmk = 15711 |
| 155445 | CEFBS_None, // VPDPBSUDSZmkz = 15712 |
| 155446 | CEFBS_None, // VPDPBSUDSZr = 15713 |
| 155447 | CEFBS_None, // VPDPBSUDSZrk = 15714 |
| 155448 | CEFBS_None, // VPDPBSUDSZrkz = 15715 |
| 155449 | CEFBS_None, // VPDPBSUDSrm = 15716 |
| 155450 | CEFBS_None, // VPDPBSUDSrr = 15717 |
| 155451 | CEFBS_None, // VPDPBSUDYrm = 15718 |
| 155452 | CEFBS_None, // VPDPBSUDYrr = 15719 |
| 155453 | CEFBS_None, // VPDPBSUDZ128m = 15720 |
| 155454 | CEFBS_None, // VPDPBSUDZ128mb = 15721 |
| 155455 | CEFBS_None, // VPDPBSUDZ128mbk = 15722 |
| 155456 | CEFBS_None, // VPDPBSUDZ128mbkz = 15723 |
| 155457 | CEFBS_None, // VPDPBSUDZ128mk = 15724 |
| 155458 | CEFBS_None, // VPDPBSUDZ128mkz = 15725 |
| 155459 | CEFBS_None, // VPDPBSUDZ128r = 15726 |
| 155460 | CEFBS_None, // VPDPBSUDZ128rk = 15727 |
| 155461 | CEFBS_None, // VPDPBSUDZ128rkz = 15728 |
| 155462 | CEFBS_None, // VPDPBSUDZ256m = 15729 |
| 155463 | CEFBS_None, // VPDPBSUDZ256mb = 15730 |
| 155464 | CEFBS_None, // VPDPBSUDZ256mbk = 15731 |
| 155465 | CEFBS_None, // VPDPBSUDZ256mbkz = 15732 |
| 155466 | CEFBS_None, // VPDPBSUDZ256mk = 15733 |
| 155467 | CEFBS_None, // VPDPBSUDZ256mkz = 15734 |
| 155468 | CEFBS_None, // VPDPBSUDZ256r = 15735 |
| 155469 | CEFBS_None, // VPDPBSUDZ256rk = 15736 |
| 155470 | CEFBS_None, // VPDPBSUDZ256rkz = 15737 |
| 155471 | CEFBS_None, // VPDPBSUDZm = 15738 |
| 155472 | CEFBS_None, // VPDPBSUDZmb = 15739 |
| 155473 | CEFBS_None, // VPDPBSUDZmbk = 15740 |
| 155474 | CEFBS_None, // VPDPBSUDZmbkz = 15741 |
| 155475 | CEFBS_None, // VPDPBSUDZmk = 15742 |
| 155476 | CEFBS_None, // VPDPBSUDZmkz = 15743 |
| 155477 | CEFBS_None, // VPDPBSUDZr = 15744 |
| 155478 | CEFBS_None, // VPDPBSUDZrk = 15745 |
| 155479 | CEFBS_None, // VPDPBSUDZrkz = 15746 |
| 155480 | CEFBS_None, // VPDPBSUDrm = 15747 |
| 155481 | CEFBS_None, // VPDPBSUDrr = 15748 |
| 155482 | CEFBS_None, // VPDPBUSDSYrm = 15749 |
| 155483 | CEFBS_None, // VPDPBUSDSYrr = 15750 |
| 155484 | CEFBS_None, // VPDPBUSDSZ128m = 15751 |
| 155485 | CEFBS_None, // VPDPBUSDSZ128mb = 15752 |
| 155486 | CEFBS_None, // VPDPBUSDSZ128mbk = 15753 |
| 155487 | CEFBS_None, // VPDPBUSDSZ128mbkz = 15754 |
| 155488 | CEFBS_None, // VPDPBUSDSZ128mk = 15755 |
| 155489 | CEFBS_None, // VPDPBUSDSZ128mkz = 15756 |
| 155490 | CEFBS_None, // VPDPBUSDSZ128r = 15757 |
| 155491 | CEFBS_None, // VPDPBUSDSZ128rk = 15758 |
| 155492 | CEFBS_None, // VPDPBUSDSZ128rkz = 15759 |
| 155493 | CEFBS_None, // VPDPBUSDSZ256m = 15760 |
| 155494 | CEFBS_None, // VPDPBUSDSZ256mb = 15761 |
| 155495 | CEFBS_None, // VPDPBUSDSZ256mbk = 15762 |
| 155496 | CEFBS_None, // VPDPBUSDSZ256mbkz = 15763 |
| 155497 | CEFBS_None, // VPDPBUSDSZ256mk = 15764 |
| 155498 | CEFBS_None, // VPDPBUSDSZ256mkz = 15765 |
| 155499 | CEFBS_None, // VPDPBUSDSZ256r = 15766 |
| 155500 | CEFBS_None, // VPDPBUSDSZ256rk = 15767 |
| 155501 | CEFBS_None, // VPDPBUSDSZ256rkz = 15768 |
| 155502 | CEFBS_None, // VPDPBUSDSZm = 15769 |
| 155503 | CEFBS_None, // VPDPBUSDSZmb = 15770 |
| 155504 | CEFBS_None, // VPDPBUSDSZmbk = 15771 |
| 155505 | CEFBS_None, // VPDPBUSDSZmbkz = 15772 |
| 155506 | CEFBS_None, // VPDPBUSDSZmk = 15773 |
| 155507 | CEFBS_None, // VPDPBUSDSZmkz = 15774 |
| 155508 | CEFBS_None, // VPDPBUSDSZr = 15775 |
| 155509 | CEFBS_None, // VPDPBUSDSZrk = 15776 |
| 155510 | CEFBS_None, // VPDPBUSDSZrkz = 15777 |
| 155511 | CEFBS_None, // VPDPBUSDSrm = 15778 |
| 155512 | CEFBS_None, // VPDPBUSDSrr = 15779 |
| 155513 | CEFBS_None, // VPDPBUSDYrm = 15780 |
| 155514 | CEFBS_None, // VPDPBUSDYrr = 15781 |
| 155515 | CEFBS_None, // VPDPBUSDZ128m = 15782 |
| 155516 | CEFBS_None, // VPDPBUSDZ128mb = 15783 |
| 155517 | CEFBS_None, // VPDPBUSDZ128mbk = 15784 |
| 155518 | CEFBS_None, // VPDPBUSDZ128mbkz = 15785 |
| 155519 | CEFBS_None, // VPDPBUSDZ128mk = 15786 |
| 155520 | CEFBS_None, // VPDPBUSDZ128mkz = 15787 |
| 155521 | CEFBS_None, // VPDPBUSDZ128r = 15788 |
| 155522 | CEFBS_None, // VPDPBUSDZ128rk = 15789 |
| 155523 | CEFBS_None, // VPDPBUSDZ128rkz = 15790 |
| 155524 | CEFBS_None, // VPDPBUSDZ256m = 15791 |
| 155525 | CEFBS_None, // VPDPBUSDZ256mb = 15792 |
| 155526 | CEFBS_None, // VPDPBUSDZ256mbk = 15793 |
| 155527 | CEFBS_None, // VPDPBUSDZ256mbkz = 15794 |
| 155528 | CEFBS_None, // VPDPBUSDZ256mk = 15795 |
| 155529 | CEFBS_None, // VPDPBUSDZ256mkz = 15796 |
| 155530 | CEFBS_None, // VPDPBUSDZ256r = 15797 |
| 155531 | CEFBS_None, // VPDPBUSDZ256rk = 15798 |
| 155532 | CEFBS_None, // VPDPBUSDZ256rkz = 15799 |
| 155533 | CEFBS_None, // VPDPBUSDZm = 15800 |
| 155534 | CEFBS_None, // VPDPBUSDZmb = 15801 |
| 155535 | CEFBS_None, // VPDPBUSDZmbk = 15802 |
| 155536 | CEFBS_None, // VPDPBUSDZmbkz = 15803 |
| 155537 | CEFBS_None, // VPDPBUSDZmk = 15804 |
| 155538 | CEFBS_None, // VPDPBUSDZmkz = 15805 |
| 155539 | CEFBS_None, // VPDPBUSDZr = 15806 |
| 155540 | CEFBS_None, // VPDPBUSDZrk = 15807 |
| 155541 | CEFBS_None, // VPDPBUSDZrkz = 15808 |
| 155542 | CEFBS_None, // VPDPBUSDrm = 15809 |
| 155543 | CEFBS_None, // VPDPBUSDrr = 15810 |
| 155544 | CEFBS_None, // VPDPBUUDSYrm = 15811 |
| 155545 | CEFBS_None, // VPDPBUUDSYrr = 15812 |
| 155546 | CEFBS_None, // VPDPBUUDSZ128m = 15813 |
| 155547 | CEFBS_None, // VPDPBUUDSZ128mb = 15814 |
| 155548 | CEFBS_None, // VPDPBUUDSZ128mbk = 15815 |
| 155549 | CEFBS_None, // VPDPBUUDSZ128mbkz = 15816 |
| 155550 | CEFBS_None, // VPDPBUUDSZ128mk = 15817 |
| 155551 | CEFBS_None, // VPDPBUUDSZ128mkz = 15818 |
| 155552 | CEFBS_None, // VPDPBUUDSZ128r = 15819 |
| 155553 | CEFBS_None, // VPDPBUUDSZ128rk = 15820 |
| 155554 | CEFBS_None, // VPDPBUUDSZ128rkz = 15821 |
| 155555 | CEFBS_None, // VPDPBUUDSZ256m = 15822 |
| 155556 | CEFBS_None, // VPDPBUUDSZ256mb = 15823 |
| 155557 | CEFBS_None, // VPDPBUUDSZ256mbk = 15824 |
| 155558 | CEFBS_None, // VPDPBUUDSZ256mbkz = 15825 |
| 155559 | CEFBS_None, // VPDPBUUDSZ256mk = 15826 |
| 155560 | CEFBS_None, // VPDPBUUDSZ256mkz = 15827 |
| 155561 | CEFBS_None, // VPDPBUUDSZ256r = 15828 |
| 155562 | CEFBS_None, // VPDPBUUDSZ256rk = 15829 |
| 155563 | CEFBS_None, // VPDPBUUDSZ256rkz = 15830 |
| 155564 | CEFBS_None, // VPDPBUUDSZm = 15831 |
| 155565 | CEFBS_None, // VPDPBUUDSZmb = 15832 |
| 155566 | CEFBS_None, // VPDPBUUDSZmbk = 15833 |
| 155567 | CEFBS_None, // VPDPBUUDSZmbkz = 15834 |
| 155568 | CEFBS_None, // VPDPBUUDSZmk = 15835 |
| 155569 | CEFBS_None, // VPDPBUUDSZmkz = 15836 |
| 155570 | CEFBS_None, // VPDPBUUDSZr = 15837 |
| 155571 | CEFBS_None, // VPDPBUUDSZrk = 15838 |
| 155572 | CEFBS_None, // VPDPBUUDSZrkz = 15839 |
| 155573 | CEFBS_None, // VPDPBUUDSrm = 15840 |
| 155574 | CEFBS_None, // VPDPBUUDSrr = 15841 |
| 155575 | CEFBS_None, // VPDPBUUDYrm = 15842 |
| 155576 | CEFBS_None, // VPDPBUUDYrr = 15843 |
| 155577 | CEFBS_None, // VPDPBUUDZ128m = 15844 |
| 155578 | CEFBS_None, // VPDPBUUDZ128mb = 15845 |
| 155579 | CEFBS_None, // VPDPBUUDZ128mbk = 15846 |
| 155580 | CEFBS_None, // VPDPBUUDZ128mbkz = 15847 |
| 155581 | CEFBS_None, // VPDPBUUDZ128mk = 15848 |
| 155582 | CEFBS_None, // VPDPBUUDZ128mkz = 15849 |
| 155583 | CEFBS_None, // VPDPBUUDZ128r = 15850 |
| 155584 | CEFBS_None, // VPDPBUUDZ128rk = 15851 |
| 155585 | CEFBS_None, // VPDPBUUDZ128rkz = 15852 |
| 155586 | CEFBS_None, // VPDPBUUDZ256m = 15853 |
| 155587 | CEFBS_None, // VPDPBUUDZ256mb = 15854 |
| 155588 | CEFBS_None, // VPDPBUUDZ256mbk = 15855 |
| 155589 | CEFBS_None, // VPDPBUUDZ256mbkz = 15856 |
| 155590 | CEFBS_None, // VPDPBUUDZ256mk = 15857 |
| 155591 | CEFBS_None, // VPDPBUUDZ256mkz = 15858 |
| 155592 | CEFBS_None, // VPDPBUUDZ256r = 15859 |
| 155593 | CEFBS_None, // VPDPBUUDZ256rk = 15860 |
| 155594 | CEFBS_None, // VPDPBUUDZ256rkz = 15861 |
| 155595 | CEFBS_None, // VPDPBUUDZm = 15862 |
| 155596 | CEFBS_None, // VPDPBUUDZmb = 15863 |
| 155597 | CEFBS_None, // VPDPBUUDZmbk = 15864 |
| 155598 | CEFBS_None, // VPDPBUUDZmbkz = 15865 |
| 155599 | CEFBS_None, // VPDPBUUDZmk = 15866 |
| 155600 | CEFBS_None, // VPDPBUUDZmkz = 15867 |
| 155601 | CEFBS_None, // VPDPBUUDZr = 15868 |
| 155602 | CEFBS_None, // VPDPBUUDZrk = 15869 |
| 155603 | CEFBS_None, // VPDPBUUDZrkz = 15870 |
| 155604 | CEFBS_None, // VPDPBUUDrm = 15871 |
| 155605 | CEFBS_None, // VPDPBUUDrr = 15872 |
| 155606 | CEFBS_None, // VPDPWSSDSYrm = 15873 |
| 155607 | CEFBS_None, // VPDPWSSDSYrr = 15874 |
| 155608 | CEFBS_None, // VPDPWSSDSZ128m = 15875 |
| 155609 | CEFBS_None, // VPDPWSSDSZ128mb = 15876 |
| 155610 | CEFBS_None, // VPDPWSSDSZ128mbk = 15877 |
| 155611 | CEFBS_None, // VPDPWSSDSZ128mbkz = 15878 |
| 155612 | CEFBS_None, // VPDPWSSDSZ128mk = 15879 |
| 155613 | CEFBS_None, // VPDPWSSDSZ128mkz = 15880 |
| 155614 | CEFBS_None, // VPDPWSSDSZ128r = 15881 |
| 155615 | CEFBS_None, // VPDPWSSDSZ128rk = 15882 |
| 155616 | CEFBS_None, // VPDPWSSDSZ128rkz = 15883 |
| 155617 | CEFBS_None, // VPDPWSSDSZ256m = 15884 |
| 155618 | CEFBS_None, // VPDPWSSDSZ256mb = 15885 |
| 155619 | CEFBS_None, // VPDPWSSDSZ256mbk = 15886 |
| 155620 | CEFBS_None, // VPDPWSSDSZ256mbkz = 15887 |
| 155621 | CEFBS_None, // VPDPWSSDSZ256mk = 15888 |
| 155622 | CEFBS_None, // VPDPWSSDSZ256mkz = 15889 |
| 155623 | CEFBS_None, // VPDPWSSDSZ256r = 15890 |
| 155624 | CEFBS_None, // VPDPWSSDSZ256rk = 15891 |
| 155625 | CEFBS_None, // VPDPWSSDSZ256rkz = 15892 |
| 155626 | CEFBS_None, // VPDPWSSDSZm = 15893 |
| 155627 | CEFBS_None, // VPDPWSSDSZmb = 15894 |
| 155628 | CEFBS_None, // VPDPWSSDSZmbk = 15895 |
| 155629 | CEFBS_None, // VPDPWSSDSZmbkz = 15896 |
| 155630 | CEFBS_None, // VPDPWSSDSZmk = 15897 |
| 155631 | CEFBS_None, // VPDPWSSDSZmkz = 15898 |
| 155632 | CEFBS_None, // VPDPWSSDSZr = 15899 |
| 155633 | CEFBS_None, // VPDPWSSDSZrk = 15900 |
| 155634 | CEFBS_None, // VPDPWSSDSZrkz = 15901 |
| 155635 | CEFBS_None, // VPDPWSSDSrm = 15902 |
| 155636 | CEFBS_None, // VPDPWSSDSrr = 15903 |
| 155637 | CEFBS_None, // VPDPWSSDYrm = 15904 |
| 155638 | CEFBS_None, // VPDPWSSDYrr = 15905 |
| 155639 | CEFBS_None, // VPDPWSSDZ128m = 15906 |
| 155640 | CEFBS_None, // VPDPWSSDZ128mb = 15907 |
| 155641 | CEFBS_None, // VPDPWSSDZ128mbk = 15908 |
| 155642 | CEFBS_None, // VPDPWSSDZ128mbkz = 15909 |
| 155643 | CEFBS_None, // VPDPWSSDZ128mk = 15910 |
| 155644 | CEFBS_None, // VPDPWSSDZ128mkz = 15911 |
| 155645 | CEFBS_None, // VPDPWSSDZ128r = 15912 |
| 155646 | CEFBS_None, // VPDPWSSDZ128rk = 15913 |
| 155647 | CEFBS_None, // VPDPWSSDZ128rkz = 15914 |
| 155648 | CEFBS_None, // VPDPWSSDZ256m = 15915 |
| 155649 | CEFBS_None, // VPDPWSSDZ256mb = 15916 |
| 155650 | CEFBS_None, // VPDPWSSDZ256mbk = 15917 |
| 155651 | CEFBS_None, // VPDPWSSDZ256mbkz = 15918 |
| 155652 | CEFBS_None, // VPDPWSSDZ256mk = 15919 |
| 155653 | CEFBS_None, // VPDPWSSDZ256mkz = 15920 |
| 155654 | CEFBS_None, // VPDPWSSDZ256r = 15921 |
| 155655 | CEFBS_None, // VPDPWSSDZ256rk = 15922 |
| 155656 | CEFBS_None, // VPDPWSSDZ256rkz = 15923 |
| 155657 | CEFBS_None, // VPDPWSSDZm = 15924 |
| 155658 | CEFBS_None, // VPDPWSSDZmb = 15925 |
| 155659 | CEFBS_None, // VPDPWSSDZmbk = 15926 |
| 155660 | CEFBS_None, // VPDPWSSDZmbkz = 15927 |
| 155661 | CEFBS_None, // VPDPWSSDZmk = 15928 |
| 155662 | CEFBS_None, // VPDPWSSDZmkz = 15929 |
| 155663 | CEFBS_None, // VPDPWSSDZr = 15930 |
| 155664 | CEFBS_None, // VPDPWSSDZrk = 15931 |
| 155665 | CEFBS_None, // VPDPWSSDZrkz = 15932 |
| 155666 | CEFBS_None, // VPDPWSSDrm = 15933 |
| 155667 | CEFBS_None, // VPDPWSSDrr = 15934 |
| 155668 | CEFBS_None, // VPDPWSUDSYrm = 15935 |
| 155669 | CEFBS_None, // VPDPWSUDSYrr = 15936 |
| 155670 | CEFBS_None, // VPDPWSUDSZ128m = 15937 |
| 155671 | CEFBS_None, // VPDPWSUDSZ128mb = 15938 |
| 155672 | CEFBS_None, // VPDPWSUDSZ128mbk = 15939 |
| 155673 | CEFBS_None, // VPDPWSUDSZ128mbkz = 15940 |
| 155674 | CEFBS_None, // VPDPWSUDSZ128mk = 15941 |
| 155675 | CEFBS_None, // VPDPWSUDSZ128mkz = 15942 |
| 155676 | CEFBS_None, // VPDPWSUDSZ128r = 15943 |
| 155677 | CEFBS_None, // VPDPWSUDSZ128rk = 15944 |
| 155678 | CEFBS_None, // VPDPWSUDSZ128rkz = 15945 |
| 155679 | CEFBS_None, // VPDPWSUDSZ256m = 15946 |
| 155680 | CEFBS_None, // VPDPWSUDSZ256mb = 15947 |
| 155681 | CEFBS_None, // VPDPWSUDSZ256mbk = 15948 |
| 155682 | CEFBS_None, // VPDPWSUDSZ256mbkz = 15949 |
| 155683 | CEFBS_None, // VPDPWSUDSZ256mk = 15950 |
| 155684 | CEFBS_None, // VPDPWSUDSZ256mkz = 15951 |
| 155685 | CEFBS_None, // VPDPWSUDSZ256r = 15952 |
| 155686 | CEFBS_None, // VPDPWSUDSZ256rk = 15953 |
| 155687 | CEFBS_None, // VPDPWSUDSZ256rkz = 15954 |
| 155688 | CEFBS_None, // VPDPWSUDSZm = 15955 |
| 155689 | CEFBS_None, // VPDPWSUDSZmb = 15956 |
| 155690 | CEFBS_None, // VPDPWSUDSZmbk = 15957 |
| 155691 | CEFBS_None, // VPDPWSUDSZmbkz = 15958 |
| 155692 | CEFBS_None, // VPDPWSUDSZmk = 15959 |
| 155693 | CEFBS_None, // VPDPWSUDSZmkz = 15960 |
| 155694 | CEFBS_None, // VPDPWSUDSZr = 15961 |
| 155695 | CEFBS_None, // VPDPWSUDSZrk = 15962 |
| 155696 | CEFBS_None, // VPDPWSUDSZrkz = 15963 |
| 155697 | CEFBS_None, // VPDPWSUDSrm = 15964 |
| 155698 | CEFBS_None, // VPDPWSUDSrr = 15965 |
| 155699 | CEFBS_None, // VPDPWSUDYrm = 15966 |
| 155700 | CEFBS_None, // VPDPWSUDYrr = 15967 |
| 155701 | CEFBS_None, // VPDPWSUDZ128m = 15968 |
| 155702 | CEFBS_None, // VPDPWSUDZ128mb = 15969 |
| 155703 | CEFBS_None, // VPDPWSUDZ128mbk = 15970 |
| 155704 | CEFBS_None, // VPDPWSUDZ128mbkz = 15971 |
| 155705 | CEFBS_None, // VPDPWSUDZ128mk = 15972 |
| 155706 | CEFBS_None, // VPDPWSUDZ128mkz = 15973 |
| 155707 | CEFBS_None, // VPDPWSUDZ128r = 15974 |
| 155708 | CEFBS_None, // VPDPWSUDZ128rk = 15975 |
| 155709 | CEFBS_None, // VPDPWSUDZ128rkz = 15976 |
| 155710 | CEFBS_None, // VPDPWSUDZ256m = 15977 |
| 155711 | CEFBS_None, // VPDPWSUDZ256mb = 15978 |
| 155712 | CEFBS_None, // VPDPWSUDZ256mbk = 15979 |
| 155713 | CEFBS_None, // VPDPWSUDZ256mbkz = 15980 |
| 155714 | CEFBS_None, // VPDPWSUDZ256mk = 15981 |
| 155715 | CEFBS_None, // VPDPWSUDZ256mkz = 15982 |
| 155716 | CEFBS_None, // VPDPWSUDZ256r = 15983 |
| 155717 | CEFBS_None, // VPDPWSUDZ256rk = 15984 |
| 155718 | CEFBS_None, // VPDPWSUDZ256rkz = 15985 |
| 155719 | CEFBS_None, // VPDPWSUDZm = 15986 |
| 155720 | CEFBS_None, // VPDPWSUDZmb = 15987 |
| 155721 | CEFBS_None, // VPDPWSUDZmbk = 15988 |
| 155722 | CEFBS_None, // VPDPWSUDZmbkz = 15989 |
| 155723 | CEFBS_None, // VPDPWSUDZmk = 15990 |
| 155724 | CEFBS_None, // VPDPWSUDZmkz = 15991 |
| 155725 | CEFBS_None, // VPDPWSUDZr = 15992 |
| 155726 | CEFBS_None, // VPDPWSUDZrk = 15993 |
| 155727 | CEFBS_None, // VPDPWSUDZrkz = 15994 |
| 155728 | CEFBS_None, // VPDPWSUDrm = 15995 |
| 155729 | CEFBS_None, // VPDPWSUDrr = 15996 |
| 155730 | CEFBS_None, // VPDPWUSDSYrm = 15997 |
| 155731 | CEFBS_None, // VPDPWUSDSYrr = 15998 |
| 155732 | CEFBS_None, // VPDPWUSDSZ128m = 15999 |
| 155733 | CEFBS_None, // VPDPWUSDSZ128mb = 16000 |
| 155734 | CEFBS_None, // VPDPWUSDSZ128mbk = 16001 |
| 155735 | CEFBS_None, // VPDPWUSDSZ128mbkz = 16002 |
| 155736 | CEFBS_None, // VPDPWUSDSZ128mk = 16003 |
| 155737 | CEFBS_None, // VPDPWUSDSZ128mkz = 16004 |
| 155738 | CEFBS_None, // VPDPWUSDSZ128r = 16005 |
| 155739 | CEFBS_None, // VPDPWUSDSZ128rk = 16006 |
| 155740 | CEFBS_None, // VPDPWUSDSZ128rkz = 16007 |
| 155741 | CEFBS_None, // VPDPWUSDSZ256m = 16008 |
| 155742 | CEFBS_None, // VPDPWUSDSZ256mb = 16009 |
| 155743 | CEFBS_None, // VPDPWUSDSZ256mbk = 16010 |
| 155744 | CEFBS_None, // VPDPWUSDSZ256mbkz = 16011 |
| 155745 | CEFBS_None, // VPDPWUSDSZ256mk = 16012 |
| 155746 | CEFBS_None, // VPDPWUSDSZ256mkz = 16013 |
| 155747 | CEFBS_None, // VPDPWUSDSZ256r = 16014 |
| 155748 | CEFBS_None, // VPDPWUSDSZ256rk = 16015 |
| 155749 | CEFBS_None, // VPDPWUSDSZ256rkz = 16016 |
| 155750 | CEFBS_None, // VPDPWUSDSZm = 16017 |
| 155751 | CEFBS_None, // VPDPWUSDSZmb = 16018 |
| 155752 | CEFBS_None, // VPDPWUSDSZmbk = 16019 |
| 155753 | CEFBS_None, // VPDPWUSDSZmbkz = 16020 |
| 155754 | CEFBS_None, // VPDPWUSDSZmk = 16021 |
| 155755 | CEFBS_None, // VPDPWUSDSZmkz = 16022 |
| 155756 | CEFBS_None, // VPDPWUSDSZr = 16023 |
| 155757 | CEFBS_None, // VPDPWUSDSZrk = 16024 |
| 155758 | CEFBS_None, // VPDPWUSDSZrkz = 16025 |
| 155759 | CEFBS_None, // VPDPWUSDSrm = 16026 |
| 155760 | CEFBS_None, // VPDPWUSDSrr = 16027 |
| 155761 | CEFBS_None, // VPDPWUSDYrm = 16028 |
| 155762 | CEFBS_None, // VPDPWUSDYrr = 16029 |
| 155763 | CEFBS_None, // VPDPWUSDZ128m = 16030 |
| 155764 | CEFBS_None, // VPDPWUSDZ128mb = 16031 |
| 155765 | CEFBS_None, // VPDPWUSDZ128mbk = 16032 |
| 155766 | CEFBS_None, // VPDPWUSDZ128mbkz = 16033 |
| 155767 | CEFBS_None, // VPDPWUSDZ128mk = 16034 |
| 155768 | CEFBS_None, // VPDPWUSDZ128mkz = 16035 |
| 155769 | CEFBS_None, // VPDPWUSDZ128r = 16036 |
| 155770 | CEFBS_None, // VPDPWUSDZ128rk = 16037 |
| 155771 | CEFBS_None, // VPDPWUSDZ128rkz = 16038 |
| 155772 | CEFBS_None, // VPDPWUSDZ256m = 16039 |
| 155773 | CEFBS_None, // VPDPWUSDZ256mb = 16040 |
| 155774 | CEFBS_None, // VPDPWUSDZ256mbk = 16041 |
| 155775 | CEFBS_None, // VPDPWUSDZ256mbkz = 16042 |
| 155776 | CEFBS_None, // VPDPWUSDZ256mk = 16043 |
| 155777 | CEFBS_None, // VPDPWUSDZ256mkz = 16044 |
| 155778 | CEFBS_None, // VPDPWUSDZ256r = 16045 |
| 155779 | CEFBS_None, // VPDPWUSDZ256rk = 16046 |
| 155780 | CEFBS_None, // VPDPWUSDZ256rkz = 16047 |
| 155781 | CEFBS_None, // VPDPWUSDZm = 16048 |
| 155782 | CEFBS_None, // VPDPWUSDZmb = 16049 |
| 155783 | CEFBS_None, // VPDPWUSDZmbk = 16050 |
| 155784 | CEFBS_None, // VPDPWUSDZmbkz = 16051 |
| 155785 | CEFBS_None, // VPDPWUSDZmk = 16052 |
| 155786 | CEFBS_None, // VPDPWUSDZmkz = 16053 |
| 155787 | CEFBS_None, // VPDPWUSDZr = 16054 |
| 155788 | CEFBS_None, // VPDPWUSDZrk = 16055 |
| 155789 | CEFBS_None, // VPDPWUSDZrkz = 16056 |
| 155790 | CEFBS_None, // VPDPWUSDrm = 16057 |
| 155791 | CEFBS_None, // VPDPWUSDrr = 16058 |
| 155792 | CEFBS_None, // VPDPWUUDSYrm = 16059 |
| 155793 | CEFBS_None, // VPDPWUUDSYrr = 16060 |
| 155794 | CEFBS_None, // VPDPWUUDSZ128m = 16061 |
| 155795 | CEFBS_None, // VPDPWUUDSZ128mb = 16062 |
| 155796 | CEFBS_None, // VPDPWUUDSZ128mbk = 16063 |
| 155797 | CEFBS_None, // VPDPWUUDSZ128mbkz = 16064 |
| 155798 | CEFBS_None, // VPDPWUUDSZ128mk = 16065 |
| 155799 | CEFBS_None, // VPDPWUUDSZ128mkz = 16066 |
| 155800 | CEFBS_None, // VPDPWUUDSZ128r = 16067 |
| 155801 | CEFBS_None, // VPDPWUUDSZ128rk = 16068 |
| 155802 | CEFBS_None, // VPDPWUUDSZ128rkz = 16069 |
| 155803 | CEFBS_None, // VPDPWUUDSZ256m = 16070 |
| 155804 | CEFBS_None, // VPDPWUUDSZ256mb = 16071 |
| 155805 | CEFBS_None, // VPDPWUUDSZ256mbk = 16072 |
| 155806 | CEFBS_None, // VPDPWUUDSZ256mbkz = 16073 |
| 155807 | CEFBS_None, // VPDPWUUDSZ256mk = 16074 |
| 155808 | CEFBS_None, // VPDPWUUDSZ256mkz = 16075 |
| 155809 | CEFBS_None, // VPDPWUUDSZ256r = 16076 |
| 155810 | CEFBS_None, // VPDPWUUDSZ256rk = 16077 |
| 155811 | CEFBS_None, // VPDPWUUDSZ256rkz = 16078 |
| 155812 | CEFBS_None, // VPDPWUUDSZm = 16079 |
| 155813 | CEFBS_None, // VPDPWUUDSZmb = 16080 |
| 155814 | CEFBS_None, // VPDPWUUDSZmbk = 16081 |
| 155815 | CEFBS_None, // VPDPWUUDSZmbkz = 16082 |
| 155816 | CEFBS_None, // VPDPWUUDSZmk = 16083 |
| 155817 | CEFBS_None, // VPDPWUUDSZmkz = 16084 |
| 155818 | CEFBS_None, // VPDPWUUDSZr = 16085 |
| 155819 | CEFBS_None, // VPDPWUUDSZrk = 16086 |
| 155820 | CEFBS_None, // VPDPWUUDSZrkz = 16087 |
| 155821 | CEFBS_None, // VPDPWUUDSrm = 16088 |
| 155822 | CEFBS_None, // VPDPWUUDSrr = 16089 |
| 155823 | CEFBS_None, // VPDPWUUDYrm = 16090 |
| 155824 | CEFBS_None, // VPDPWUUDYrr = 16091 |
| 155825 | CEFBS_None, // VPDPWUUDZ128m = 16092 |
| 155826 | CEFBS_None, // VPDPWUUDZ128mb = 16093 |
| 155827 | CEFBS_None, // VPDPWUUDZ128mbk = 16094 |
| 155828 | CEFBS_None, // VPDPWUUDZ128mbkz = 16095 |
| 155829 | CEFBS_None, // VPDPWUUDZ128mk = 16096 |
| 155830 | CEFBS_None, // VPDPWUUDZ128mkz = 16097 |
| 155831 | CEFBS_None, // VPDPWUUDZ128r = 16098 |
| 155832 | CEFBS_None, // VPDPWUUDZ128rk = 16099 |
| 155833 | CEFBS_None, // VPDPWUUDZ128rkz = 16100 |
| 155834 | CEFBS_None, // VPDPWUUDZ256m = 16101 |
| 155835 | CEFBS_None, // VPDPWUUDZ256mb = 16102 |
| 155836 | CEFBS_None, // VPDPWUUDZ256mbk = 16103 |
| 155837 | CEFBS_None, // VPDPWUUDZ256mbkz = 16104 |
| 155838 | CEFBS_None, // VPDPWUUDZ256mk = 16105 |
| 155839 | CEFBS_None, // VPDPWUUDZ256mkz = 16106 |
| 155840 | CEFBS_None, // VPDPWUUDZ256r = 16107 |
| 155841 | CEFBS_None, // VPDPWUUDZ256rk = 16108 |
| 155842 | CEFBS_None, // VPDPWUUDZ256rkz = 16109 |
| 155843 | CEFBS_None, // VPDPWUUDZm = 16110 |
| 155844 | CEFBS_None, // VPDPWUUDZmb = 16111 |
| 155845 | CEFBS_None, // VPDPWUUDZmbk = 16112 |
| 155846 | CEFBS_None, // VPDPWUUDZmbkz = 16113 |
| 155847 | CEFBS_None, // VPDPWUUDZmk = 16114 |
| 155848 | CEFBS_None, // VPDPWUUDZmkz = 16115 |
| 155849 | CEFBS_None, // VPDPWUUDZr = 16116 |
| 155850 | CEFBS_None, // VPDPWUUDZrk = 16117 |
| 155851 | CEFBS_None, // VPDPWUUDZrkz = 16118 |
| 155852 | CEFBS_None, // VPDPWUUDrm = 16119 |
| 155853 | CEFBS_None, // VPDPWUUDrr = 16120 |
| 155854 | CEFBS_None, // VPERM2F128rmi = 16121 |
| 155855 | CEFBS_None, // VPERM2F128rri = 16122 |
| 155856 | CEFBS_None, // VPERM2I128rmi = 16123 |
| 155857 | CEFBS_None, // VPERM2I128rri = 16124 |
| 155858 | CEFBS_None, // VPERMBZ128rm = 16125 |
| 155859 | CEFBS_None, // VPERMBZ128rmk = 16126 |
| 155860 | CEFBS_None, // VPERMBZ128rmkz = 16127 |
| 155861 | CEFBS_None, // VPERMBZ128rr = 16128 |
| 155862 | CEFBS_None, // VPERMBZ128rrk = 16129 |
| 155863 | CEFBS_None, // VPERMBZ128rrkz = 16130 |
| 155864 | CEFBS_None, // VPERMBZ256rm = 16131 |
| 155865 | CEFBS_None, // VPERMBZ256rmk = 16132 |
| 155866 | CEFBS_None, // VPERMBZ256rmkz = 16133 |
| 155867 | CEFBS_None, // VPERMBZ256rr = 16134 |
| 155868 | CEFBS_None, // VPERMBZ256rrk = 16135 |
| 155869 | CEFBS_None, // VPERMBZ256rrkz = 16136 |
| 155870 | CEFBS_None, // VPERMBZrm = 16137 |
| 155871 | CEFBS_None, // VPERMBZrmk = 16138 |
| 155872 | CEFBS_None, // VPERMBZrmkz = 16139 |
| 155873 | CEFBS_None, // VPERMBZrr = 16140 |
| 155874 | CEFBS_None, // VPERMBZrrk = 16141 |
| 155875 | CEFBS_None, // VPERMBZrrkz = 16142 |
| 155876 | CEFBS_None, // VPERMDYrm = 16143 |
| 155877 | CEFBS_None, // VPERMDYrr = 16144 |
| 155878 | CEFBS_None, // VPERMDZ256rm = 16145 |
| 155879 | CEFBS_None, // VPERMDZ256rmb = 16146 |
| 155880 | CEFBS_None, // VPERMDZ256rmbk = 16147 |
| 155881 | CEFBS_None, // VPERMDZ256rmbkz = 16148 |
| 155882 | CEFBS_None, // VPERMDZ256rmk = 16149 |
| 155883 | CEFBS_None, // VPERMDZ256rmkz = 16150 |
| 155884 | CEFBS_None, // VPERMDZ256rr = 16151 |
| 155885 | CEFBS_None, // VPERMDZ256rrk = 16152 |
| 155886 | CEFBS_None, // VPERMDZ256rrkz = 16153 |
| 155887 | CEFBS_None, // VPERMDZrm = 16154 |
| 155888 | CEFBS_None, // VPERMDZrmb = 16155 |
| 155889 | CEFBS_None, // VPERMDZrmbk = 16156 |
| 155890 | CEFBS_None, // VPERMDZrmbkz = 16157 |
| 155891 | CEFBS_None, // VPERMDZrmk = 16158 |
| 155892 | CEFBS_None, // VPERMDZrmkz = 16159 |
| 155893 | CEFBS_None, // VPERMDZrr = 16160 |
| 155894 | CEFBS_None, // VPERMDZrrk = 16161 |
| 155895 | CEFBS_None, // VPERMDZrrkz = 16162 |
| 155896 | CEFBS_None, // VPERMI2BZ128rm = 16163 |
| 155897 | CEFBS_None, // VPERMI2BZ128rmk = 16164 |
| 155898 | CEFBS_None, // VPERMI2BZ128rmkz = 16165 |
| 155899 | CEFBS_None, // VPERMI2BZ128rr = 16166 |
| 155900 | CEFBS_None, // VPERMI2BZ128rrk = 16167 |
| 155901 | CEFBS_None, // VPERMI2BZ128rrkz = 16168 |
| 155902 | CEFBS_None, // VPERMI2BZ256rm = 16169 |
| 155903 | CEFBS_None, // VPERMI2BZ256rmk = 16170 |
| 155904 | CEFBS_None, // VPERMI2BZ256rmkz = 16171 |
| 155905 | CEFBS_None, // VPERMI2BZ256rr = 16172 |
| 155906 | CEFBS_None, // VPERMI2BZ256rrk = 16173 |
| 155907 | CEFBS_None, // VPERMI2BZ256rrkz = 16174 |
| 155908 | CEFBS_None, // VPERMI2BZrm = 16175 |
| 155909 | CEFBS_None, // VPERMI2BZrmk = 16176 |
| 155910 | CEFBS_None, // VPERMI2BZrmkz = 16177 |
| 155911 | CEFBS_None, // VPERMI2BZrr = 16178 |
| 155912 | CEFBS_None, // VPERMI2BZrrk = 16179 |
| 155913 | CEFBS_None, // VPERMI2BZrrkz = 16180 |
| 155914 | CEFBS_None, // VPERMI2DZ128rm = 16181 |
| 155915 | CEFBS_None, // VPERMI2DZ128rmb = 16182 |
| 155916 | CEFBS_None, // VPERMI2DZ128rmbk = 16183 |
| 155917 | CEFBS_None, // VPERMI2DZ128rmbkz = 16184 |
| 155918 | CEFBS_None, // VPERMI2DZ128rmk = 16185 |
| 155919 | CEFBS_None, // VPERMI2DZ128rmkz = 16186 |
| 155920 | CEFBS_None, // VPERMI2DZ128rr = 16187 |
| 155921 | CEFBS_None, // VPERMI2DZ128rrk = 16188 |
| 155922 | CEFBS_None, // VPERMI2DZ128rrkz = 16189 |
| 155923 | CEFBS_None, // VPERMI2DZ256rm = 16190 |
| 155924 | CEFBS_None, // VPERMI2DZ256rmb = 16191 |
| 155925 | CEFBS_None, // VPERMI2DZ256rmbk = 16192 |
| 155926 | CEFBS_None, // VPERMI2DZ256rmbkz = 16193 |
| 155927 | CEFBS_None, // VPERMI2DZ256rmk = 16194 |
| 155928 | CEFBS_None, // VPERMI2DZ256rmkz = 16195 |
| 155929 | CEFBS_None, // VPERMI2DZ256rr = 16196 |
| 155930 | CEFBS_None, // VPERMI2DZ256rrk = 16197 |
| 155931 | CEFBS_None, // VPERMI2DZ256rrkz = 16198 |
| 155932 | CEFBS_None, // VPERMI2DZrm = 16199 |
| 155933 | CEFBS_None, // VPERMI2DZrmb = 16200 |
| 155934 | CEFBS_None, // VPERMI2DZrmbk = 16201 |
| 155935 | CEFBS_None, // VPERMI2DZrmbkz = 16202 |
| 155936 | CEFBS_None, // VPERMI2DZrmk = 16203 |
| 155937 | CEFBS_None, // VPERMI2DZrmkz = 16204 |
| 155938 | CEFBS_None, // VPERMI2DZrr = 16205 |
| 155939 | CEFBS_None, // VPERMI2DZrrk = 16206 |
| 155940 | CEFBS_None, // VPERMI2DZrrkz = 16207 |
| 155941 | CEFBS_None, // VPERMI2PDZ128rm = 16208 |
| 155942 | CEFBS_None, // VPERMI2PDZ128rmb = 16209 |
| 155943 | CEFBS_None, // VPERMI2PDZ128rmbk = 16210 |
| 155944 | CEFBS_None, // VPERMI2PDZ128rmbkz = 16211 |
| 155945 | CEFBS_None, // VPERMI2PDZ128rmk = 16212 |
| 155946 | CEFBS_None, // VPERMI2PDZ128rmkz = 16213 |
| 155947 | CEFBS_None, // VPERMI2PDZ128rr = 16214 |
| 155948 | CEFBS_None, // VPERMI2PDZ128rrk = 16215 |
| 155949 | CEFBS_None, // VPERMI2PDZ128rrkz = 16216 |
| 155950 | CEFBS_None, // VPERMI2PDZ256rm = 16217 |
| 155951 | CEFBS_None, // VPERMI2PDZ256rmb = 16218 |
| 155952 | CEFBS_None, // VPERMI2PDZ256rmbk = 16219 |
| 155953 | CEFBS_None, // VPERMI2PDZ256rmbkz = 16220 |
| 155954 | CEFBS_None, // VPERMI2PDZ256rmk = 16221 |
| 155955 | CEFBS_None, // VPERMI2PDZ256rmkz = 16222 |
| 155956 | CEFBS_None, // VPERMI2PDZ256rr = 16223 |
| 155957 | CEFBS_None, // VPERMI2PDZ256rrk = 16224 |
| 155958 | CEFBS_None, // VPERMI2PDZ256rrkz = 16225 |
| 155959 | CEFBS_None, // VPERMI2PDZrm = 16226 |
| 155960 | CEFBS_None, // VPERMI2PDZrmb = 16227 |
| 155961 | CEFBS_None, // VPERMI2PDZrmbk = 16228 |
| 155962 | CEFBS_None, // VPERMI2PDZrmbkz = 16229 |
| 155963 | CEFBS_None, // VPERMI2PDZrmk = 16230 |
| 155964 | CEFBS_None, // VPERMI2PDZrmkz = 16231 |
| 155965 | CEFBS_None, // VPERMI2PDZrr = 16232 |
| 155966 | CEFBS_None, // VPERMI2PDZrrk = 16233 |
| 155967 | CEFBS_None, // VPERMI2PDZrrkz = 16234 |
| 155968 | CEFBS_None, // VPERMI2PSZ128rm = 16235 |
| 155969 | CEFBS_None, // VPERMI2PSZ128rmb = 16236 |
| 155970 | CEFBS_None, // VPERMI2PSZ128rmbk = 16237 |
| 155971 | CEFBS_None, // VPERMI2PSZ128rmbkz = 16238 |
| 155972 | CEFBS_None, // VPERMI2PSZ128rmk = 16239 |
| 155973 | CEFBS_None, // VPERMI2PSZ128rmkz = 16240 |
| 155974 | CEFBS_None, // VPERMI2PSZ128rr = 16241 |
| 155975 | CEFBS_None, // VPERMI2PSZ128rrk = 16242 |
| 155976 | CEFBS_None, // VPERMI2PSZ128rrkz = 16243 |
| 155977 | CEFBS_None, // VPERMI2PSZ256rm = 16244 |
| 155978 | CEFBS_None, // VPERMI2PSZ256rmb = 16245 |
| 155979 | CEFBS_None, // VPERMI2PSZ256rmbk = 16246 |
| 155980 | CEFBS_None, // VPERMI2PSZ256rmbkz = 16247 |
| 155981 | CEFBS_None, // VPERMI2PSZ256rmk = 16248 |
| 155982 | CEFBS_None, // VPERMI2PSZ256rmkz = 16249 |
| 155983 | CEFBS_None, // VPERMI2PSZ256rr = 16250 |
| 155984 | CEFBS_None, // VPERMI2PSZ256rrk = 16251 |
| 155985 | CEFBS_None, // VPERMI2PSZ256rrkz = 16252 |
| 155986 | CEFBS_None, // VPERMI2PSZrm = 16253 |
| 155987 | CEFBS_None, // VPERMI2PSZrmb = 16254 |
| 155988 | CEFBS_None, // VPERMI2PSZrmbk = 16255 |
| 155989 | CEFBS_None, // VPERMI2PSZrmbkz = 16256 |
| 155990 | CEFBS_None, // VPERMI2PSZrmk = 16257 |
| 155991 | CEFBS_None, // VPERMI2PSZrmkz = 16258 |
| 155992 | CEFBS_None, // VPERMI2PSZrr = 16259 |
| 155993 | CEFBS_None, // VPERMI2PSZrrk = 16260 |
| 155994 | CEFBS_None, // VPERMI2PSZrrkz = 16261 |
| 155995 | CEFBS_None, // VPERMI2QZ128rm = 16262 |
| 155996 | CEFBS_None, // VPERMI2QZ128rmb = 16263 |
| 155997 | CEFBS_None, // VPERMI2QZ128rmbk = 16264 |
| 155998 | CEFBS_None, // VPERMI2QZ128rmbkz = 16265 |
| 155999 | CEFBS_None, // VPERMI2QZ128rmk = 16266 |
| 156000 | CEFBS_None, // VPERMI2QZ128rmkz = 16267 |
| 156001 | CEFBS_None, // VPERMI2QZ128rr = 16268 |
| 156002 | CEFBS_None, // VPERMI2QZ128rrk = 16269 |
| 156003 | CEFBS_None, // VPERMI2QZ128rrkz = 16270 |
| 156004 | CEFBS_None, // VPERMI2QZ256rm = 16271 |
| 156005 | CEFBS_None, // VPERMI2QZ256rmb = 16272 |
| 156006 | CEFBS_None, // VPERMI2QZ256rmbk = 16273 |
| 156007 | CEFBS_None, // VPERMI2QZ256rmbkz = 16274 |
| 156008 | CEFBS_None, // VPERMI2QZ256rmk = 16275 |
| 156009 | CEFBS_None, // VPERMI2QZ256rmkz = 16276 |
| 156010 | CEFBS_None, // VPERMI2QZ256rr = 16277 |
| 156011 | CEFBS_None, // VPERMI2QZ256rrk = 16278 |
| 156012 | CEFBS_None, // VPERMI2QZ256rrkz = 16279 |
| 156013 | CEFBS_None, // VPERMI2QZrm = 16280 |
| 156014 | CEFBS_None, // VPERMI2QZrmb = 16281 |
| 156015 | CEFBS_None, // VPERMI2QZrmbk = 16282 |
| 156016 | CEFBS_None, // VPERMI2QZrmbkz = 16283 |
| 156017 | CEFBS_None, // VPERMI2QZrmk = 16284 |
| 156018 | CEFBS_None, // VPERMI2QZrmkz = 16285 |
| 156019 | CEFBS_None, // VPERMI2QZrr = 16286 |
| 156020 | CEFBS_None, // VPERMI2QZrrk = 16287 |
| 156021 | CEFBS_None, // VPERMI2QZrrkz = 16288 |
| 156022 | CEFBS_None, // VPERMI2WZ128rm = 16289 |
| 156023 | CEFBS_None, // VPERMI2WZ128rmk = 16290 |
| 156024 | CEFBS_None, // VPERMI2WZ128rmkz = 16291 |
| 156025 | CEFBS_None, // VPERMI2WZ128rr = 16292 |
| 156026 | CEFBS_None, // VPERMI2WZ128rrk = 16293 |
| 156027 | CEFBS_None, // VPERMI2WZ128rrkz = 16294 |
| 156028 | CEFBS_None, // VPERMI2WZ256rm = 16295 |
| 156029 | CEFBS_None, // VPERMI2WZ256rmk = 16296 |
| 156030 | CEFBS_None, // VPERMI2WZ256rmkz = 16297 |
| 156031 | CEFBS_None, // VPERMI2WZ256rr = 16298 |
| 156032 | CEFBS_None, // VPERMI2WZ256rrk = 16299 |
| 156033 | CEFBS_None, // VPERMI2WZ256rrkz = 16300 |
| 156034 | CEFBS_None, // VPERMI2WZrm = 16301 |
| 156035 | CEFBS_None, // VPERMI2WZrmk = 16302 |
| 156036 | CEFBS_None, // VPERMI2WZrmkz = 16303 |
| 156037 | CEFBS_None, // VPERMI2WZrr = 16304 |
| 156038 | CEFBS_None, // VPERMI2WZrrk = 16305 |
| 156039 | CEFBS_None, // VPERMI2WZrrkz = 16306 |
| 156040 | CEFBS_None, // VPERMIL2PDYmr = 16307 |
| 156041 | CEFBS_None, // VPERMIL2PDYrm = 16308 |
| 156042 | CEFBS_None, // VPERMIL2PDYrr = 16309 |
| 156043 | CEFBS_None, // VPERMIL2PDYrr_REV = 16310 |
| 156044 | CEFBS_None, // VPERMIL2PDmr = 16311 |
| 156045 | CEFBS_None, // VPERMIL2PDrm = 16312 |
| 156046 | CEFBS_None, // VPERMIL2PDrr = 16313 |
| 156047 | CEFBS_None, // VPERMIL2PDrr_REV = 16314 |
| 156048 | CEFBS_None, // VPERMIL2PSYmr = 16315 |
| 156049 | CEFBS_None, // VPERMIL2PSYrm = 16316 |
| 156050 | CEFBS_None, // VPERMIL2PSYrr = 16317 |
| 156051 | CEFBS_None, // VPERMIL2PSYrr_REV = 16318 |
| 156052 | CEFBS_None, // VPERMIL2PSmr = 16319 |
| 156053 | CEFBS_None, // VPERMIL2PSrm = 16320 |
| 156054 | CEFBS_None, // VPERMIL2PSrr = 16321 |
| 156055 | CEFBS_None, // VPERMIL2PSrr_REV = 16322 |
| 156056 | CEFBS_None, // VPERMILPDYmi = 16323 |
| 156057 | CEFBS_None, // VPERMILPDYri = 16324 |
| 156058 | CEFBS_None, // VPERMILPDYrm = 16325 |
| 156059 | CEFBS_None, // VPERMILPDYrr = 16326 |
| 156060 | CEFBS_None, // VPERMILPDZ128mbi = 16327 |
| 156061 | CEFBS_None, // VPERMILPDZ128mbik = 16328 |
| 156062 | CEFBS_None, // VPERMILPDZ128mbikz = 16329 |
| 156063 | CEFBS_None, // VPERMILPDZ128mi = 16330 |
| 156064 | CEFBS_None, // VPERMILPDZ128mik = 16331 |
| 156065 | CEFBS_None, // VPERMILPDZ128mikz = 16332 |
| 156066 | CEFBS_None, // VPERMILPDZ128ri = 16333 |
| 156067 | CEFBS_None, // VPERMILPDZ128rik = 16334 |
| 156068 | CEFBS_None, // VPERMILPDZ128rikz = 16335 |
| 156069 | CEFBS_None, // VPERMILPDZ128rm = 16336 |
| 156070 | CEFBS_None, // VPERMILPDZ128rmb = 16337 |
| 156071 | CEFBS_None, // VPERMILPDZ128rmbk = 16338 |
| 156072 | CEFBS_None, // VPERMILPDZ128rmbkz = 16339 |
| 156073 | CEFBS_None, // VPERMILPDZ128rmk = 16340 |
| 156074 | CEFBS_None, // VPERMILPDZ128rmkz = 16341 |
| 156075 | CEFBS_None, // VPERMILPDZ128rr = 16342 |
| 156076 | CEFBS_None, // VPERMILPDZ128rrk = 16343 |
| 156077 | CEFBS_None, // VPERMILPDZ128rrkz = 16344 |
| 156078 | CEFBS_None, // VPERMILPDZ256mbi = 16345 |
| 156079 | CEFBS_None, // VPERMILPDZ256mbik = 16346 |
| 156080 | CEFBS_None, // VPERMILPDZ256mbikz = 16347 |
| 156081 | CEFBS_None, // VPERMILPDZ256mi = 16348 |
| 156082 | CEFBS_None, // VPERMILPDZ256mik = 16349 |
| 156083 | CEFBS_None, // VPERMILPDZ256mikz = 16350 |
| 156084 | CEFBS_None, // VPERMILPDZ256ri = 16351 |
| 156085 | CEFBS_None, // VPERMILPDZ256rik = 16352 |
| 156086 | CEFBS_None, // VPERMILPDZ256rikz = 16353 |
| 156087 | CEFBS_None, // VPERMILPDZ256rm = 16354 |
| 156088 | CEFBS_None, // VPERMILPDZ256rmb = 16355 |
| 156089 | CEFBS_None, // VPERMILPDZ256rmbk = 16356 |
| 156090 | CEFBS_None, // VPERMILPDZ256rmbkz = 16357 |
| 156091 | CEFBS_None, // VPERMILPDZ256rmk = 16358 |
| 156092 | CEFBS_None, // VPERMILPDZ256rmkz = 16359 |
| 156093 | CEFBS_None, // VPERMILPDZ256rr = 16360 |
| 156094 | CEFBS_None, // VPERMILPDZ256rrk = 16361 |
| 156095 | CEFBS_None, // VPERMILPDZ256rrkz = 16362 |
| 156096 | CEFBS_None, // VPERMILPDZmbi = 16363 |
| 156097 | CEFBS_None, // VPERMILPDZmbik = 16364 |
| 156098 | CEFBS_None, // VPERMILPDZmbikz = 16365 |
| 156099 | CEFBS_None, // VPERMILPDZmi = 16366 |
| 156100 | CEFBS_None, // VPERMILPDZmik = 16367 |
| 156101 | CEFBS_None, // VPERMILPDZmikz = 16368 |
| 156102 | CEFBS_None, // VPERMILPDZri = 16369 |
| 156103 | CEFBS_None, // VPERMILPDZrik = 16370 |
| 156104 | CEFBS_None, // VPERMILPDZrikz = 16371 |
| 156105 | CEFBS_None, // VPERMILPDZrm = 16372 |
| 156106 | CEFBS_None, // VPERMILPDZrmb = 16373 |
| 156107 | CEFBS_None, // VPERMILPDZrmbk = 16374 |
| 156108 | CEFBS_None, // VPERMILPDZrmbkz = 16375 |
| 156109 | CEFBS_None, // VPERMILPDZrmk = 16376 |
| 156110 | CEFBS_None, // VPERMILPDZrmkz = 16377 |
| 156111 | CEFBS_None, // VPERMILPDZrr = 16378 |
| 156112 | CEFBS_None, // VPERMILPDZrrk = 16379 |
| 156113 | CEFBS_None, // VPERMILPDZrrkz = 16380 |
| 156114 | CEFBS_None, // VPERMILPDmi = 16381 |
| 156115 | CEFBS_None, // VPERMILPDri = 16382 |
| 156116 | CEFBS_None, // VPERMILPDrm = 16383 |
| 156117 | CEFBS_None, // VPERMILPDrr = 16384 |
| 156118 | CEFBS_None, // VPERMILPSYmi = 16385 |
| 156119 | CEFBS_None, // VPERMILPSYri = 16386 |
| 156120 | CEFBS_None, // VPERMILPSYrm = 16387 |
| 156121 | CEFBS_None, // VPERMILPSYrr = 16388 |
| 156122 | CEFBS_None, // VPERMILPSZ128mbi = 16389 |
| 156123 | CEFBS_None, // VPERMILPSZ128mbik = 16390 |
| 156124 | CEFBS_None, // VPERMILPSZ128mbikz = 16391 |
| 156125 | CEFBS_None, // VPERMILPSZ128mi = 16392 |
| 156126 | CEFBS_None, // VPERMILPSZ128mik = 16393 |
| 156127 | CEFBS_None, // VPERMILPSZ128mikz = 16394 |
| 156128 | CEFBS_None, // VPERMILPSZ128ri = 16395 |
| 156129 | CEFBS_None, // VPERMILPSZ128rik = 16396 |
| 156130 | CEFBS_None, // VPERMILPSZ128rikz = 16397 |
| 156131 | CEFBS_None, // VPERMILPSZ128rm = 16398 |
| 156132 | CEFBS_None, // VPERMILPSZ128rmb = 16399 |
| 156133 | CEFBS_None, // VPERMILPSZ128rmbk = 16400 |
| 156134 | CEFBS_None, // VPERMILPSZ128rmbkz = 16401 |
| 156135 | CEFBS_None, // VPERMILPSZ128rmk = 16402 |
| 156136 | CEFBS_None, // VPERMILPSZ128rmkz = 16403 |
| 156137 | CEFBS_None, // VPERMILPSZ128rr = 16404 |
| 156138 | CEFBS_None, // VPERMILPSZ128rrk = 16405 |
| 156139 | CEFBS_None, // VPERMILPSZ128rrkz = 16406 |
| 156140 | CEFBS_None, // VPERMILPSZ256mbi = 16407 |
| 156141 | CEFBS_None, // VPERMILPSZ256mbik = 16408 |
| 156142 | CEFBS_None, // VPERMILPSZ256mbikz = 16409 |
| 156143 | CEFBS_None, // VPERMILPSZ256mi = 16410 |
| 156144 | CEFBS_None, // VPERMILPSZ256mik = 16411 |
| 156145 | CEFBS_None, // VPERMILPSZ256mikz = 16412 |
| 156146 | CEFBS_None, // VPERMILPSZ256ri = 16413 |
| 156147 | CEFBS_None, // VPERMILPSZ256rik = 16414 |
| 156148 | CEFBS_None, // VPERMILPSZ256rikz = 16415 |
| 156149 | CEFBS_None, // VPERMILPSZ256rm = 16416 |
| 156150 | CEFBS_None, // VPERMILPSZ256rmb = 16417 |
| 156151 | CEFBS_None, // VPERMILPSZ256rmbk = 16418 |
| 156152 | CEFBS_None, // VPERMILPSZ256rmbkz = 16419 |
| 156153 | CEFBS_None, // VPERMILPSZ256rmk = 16420 |
| 156154 | CEFBS_None, // VPERMILPSZ256rmkz = 16421 |
| 156155 | CEFBS_None, // VPERMILPSZ256rr = 16422 |
| 156156 | CEFBS_None, // VPERMILPSZ256rrk = 16423 |
| 156157 | CEFBS_None, // VPERMILPSZ256rrkz = 16424 |
| 156158 | CEFBS_None, // VPERMILPSZmbi = 16425 |
| 156159 | CEFBS_None, // VPERMILPSZmbik = 16426 |
| 156160 | CEFBS_None, // VPERMILPSZmbikz = 16427 |
| 156161 | CEFBS_None, // VPERMILPSZmi = 16428 |
| 156162 | CEFBS_None, // VPERMILPSZmik = 16429 |
| 156163 | CEFBS_None, // VPERMILPSZmikz = 16430 |
| 156164 | CEFBS_None, // VPERMILPSZri = 16431 |
| 156165 | CEFBS_None, // VPERMILPSZrik = 16432 |
| 156166 | CEFBS_None, // VPERMILPSZrikz = 16433 |
| 156167 | CEFBS_None, // VPERMILPSZrm = 16434 |
| 156168 | CEFBS_None, // VPERMILPSZrmb = 16435 |
| 156169 | CEFBS_None, // VPERMILPSZrmbk = 16436 |
| 156170 | CEFBS_None, // VPERMILPSZrmbkz = 16437 |
| 156171 | CEFBS_None, // VPERMILPSZrmk = 16438 |
| 156172 | CEFBS_None, // VPERMILPSZrmkz = 16439 |
| 156173 | CEFBS_None, // VPERMILPSZrr = 16440 |
| 156174 | CEFBS_None, // VPERMILPSZrrk = 16441 |
| 156175 | CEFBS_None, // VPERMILPSZrrkz = 16442 |
| 156176 | CEFBS_None, // VPERMILPSmi = 16443 |
| 156177 | CEFBS_None, // VPERMILPSri = 16444 |
| 156178 | CEFBS_None, // VPERMILPSrm = 16445 |
| 156179 | CEFBS_None, // VPERMILPSrr = 16446 |
| 156180 | CEFBS_None, // VPERMPDYmi = 16447 |
| 156181 | CEFBS_None, // VPERMPDYri = 16448 |
| 156182 | CEFBS_None, // VPERMPDZ256mbi = 16449 |
| 156183 | CEFBS_None, // VPERMPDZ256mbik = 16450 |
| 156184 | CEFBS_None, // VPERMPDZ256mbikz = 16451 |
| 156185 | CEFBS_None, // VPERMPDZ256mi = 16452 |
| 156186 | CEFBS_None, // VPERMPDZ256mik = 16453 |
| 156187 | CEFBS_None, // VPERMPDZ256mikz = 16454 |
| 156188 | CEFBS_None, // VPERMPDZ256ri = 16455 |
| 156189 | CEFBS_None, // VPERMPDZ256rik = 16456 |
| 156190 | CEFBS_None, // VPERMPDZ256rikz = 16457 |
| 156191 | CEFBS_None, // VPERMPDZ256rm = 16458 |
| 156192 | CEFBS_None, // VPERMPDZ256rmb = 16459 |
| 156193 | CEFBS_None, // VPERMPDZ256rmbk = 16460 |
| 156194 | CEFBS_None, // VPERMPDZ256rmbkz = 16461 |
| 156195 | CEFBS_None, // VPERMPDZ256rmk = 16462 |
| 156196 | CEFBS_None, // VPERMPDZ256rmkz = 16463 |
| 156197 | CEFBS_None, // VPERMPDZ256rr = 16464 |
| 156198 | CEFBS_None, // VPERMPDZ256rrk = 16465 |
| 156199 | CEFBS_None, // VPERMPDZ256rrkz = 16466 |
| 156200 | CEFBS_None, // VPERMPDZmbi = 16467 |
| 156201 | CEFBS_None, // VPERMPDZmbik = 16468 |
| 156202 | CEFBS_None, // VPERMPDZmbikz = 16469 |
| 156203 | CEFBS_None, // VPERMPDZmi = 16470 |
| 156204 | CEFBS_None, // VPERMPDZmik = 16471 |
| 156205 | CEFBS_None, // VPERMPDZmikz = 16472 |
| 156206 | CEFBS_None, // VPERMPDZri = 16473 |
| 156207 | CEFBS_None, // VPERMPDZrik = 16474 |
| 156208 | CEFBS_None, // VPERMPDZrikz = 16475 |
| 156209 | CEFBS_None, // VPERMPDZrm = 16476 |
| 156210 | CEFBS_None, // VPERMPDZrmb = 16477 |
| 156211 | CEFBS_None, // VPERMPDZrmbk = 16478 |
| 156212 | CEFBS_None, // VPERMPDZrmbkz = 16479 |
| 156213 | CEFBS_None, // VPERMPDZrmk = 16480 |
| 156214 | CEFBS_None, // VPERMPDZrmkz = 16481 |
| 156215 | CEFBS_None, // VPERMPDZrr = 16482 |
| 156216 | CEFBS_None, // VPERMPDZrrk = 16483 |
| 156217 | CEFBS_None, // VPERMPDZrrkz = 16484 |
| 156218 | CEFBS_None, // VPERMPSYrm = 16485 |
| 156219 | CEFBS_None, // VPERMPSYrr = 16486 |
| 156220 | CEFBS_None, // VPERMPSZ256rm = 16487 |
| 156221 | CEFBS_None, // VPERMPSZ256rmb = 16488 |
| 156222 | CEFBS_None, // VPERMPSZ256rmbk = 16489 |
| 156223 | CEFBS_None, // VPERMPSZ256rmbkz = 16490 |
| 156224 | CEFBS_None, // VPERMPSZ256rmk = 16491 |
| 156225 | CEFBS_None, // VPERMPSZ256rmkz = 16492 |
| 156226 | CEFBS_None, // VPERMPSZ256rr = 16493 |
| 156227 | CEFBS_None, // VPERMPSZ256rrk = 16494 |
| 156228 | CEFBS_None, // VPERMPSZ256rrkz = 16495 |
| 156229 | CEFBS_None, // VPERMPSZrm = 16496 |
| 156230 | CEFBS_None, // VPERMPSZrmb = 16497 |
| 156231 | CEFBS_None, // VPERMPSZrmbk = 16498 |
| 156232 | CEFBS_None, // VPERMPSZrmbkz = 16499 |
| 156233 | CEFBS_None, // VPERMPSZrmk = 16500 |
| 156234 | CEFBS_None, // VPERMPSZrmkz = 16501 |
| 156235 | CEFBS_None, // VPERMPSZrr = 16502 |
| 156236 | CEFBS_None, // VPERMPSZrrk = 16503 |
| 156237 | CEFBS_None, // VPERMPSZrrkz = 16504 |
| 156238 | CEFBS_None, // VPERMQYmi = 16505 |
| 156239 | CEFBS_None, // VPERMQYri = 16506 |
| 156240 | CEFBS_None, // VPERMQZ256mbi = 16507 |
| 156241 | CEFBS_None, // VPERMQZ256mbik = 16508 |
| 156242 | CEFBS_None, // VPERMQZ256mbikz = 16509 |
| 156243 | CEFBS_None, // VPERMQZ256mi = 16510 |
| 156244 | CEFBS_None, // VPERMQZ256mik = 16511 |
| 156245 | CEFBS_None, // VPERMQZ256mikz = 16512 |
| 156246 | CEFBS_None, // VPERMQZ256ri = 16513 |
| 156247 | CEFBS_None, // VPERMQZ256rik = 16514 |
| 156248 | CEFBS_None, // VPERMQZ256rikz = 16515 |
| 156249 | CEFBS_None, // VPERMQZ256rm = 16516 |
| 156250 | CEFBS_None, // VPERMQZ256rmb = 16517 |
| 156251 | CEFBS_None, // VPERMQZ256rmbk = 16518 |
| 156252 | CEFBS_None, // VPERMQZ256rmbkz = 16519 |
| 156253 | CEFBS_None, // VPERMQZ256rmk = 16520 |
| 156254 | CEFBS_None, // VPERMQZ256rmkz = 16521 |
| 156255 | CEFBS_None, // VPERMQZ256rr = 16522 |
| 156256 | CEFBS_None, // VPERMQZ256rrk = 16523 |
| 156257 | CEFBS_None, // VPERMQZ256rrkz = 16524 |
| 156258 | CEFBS_None, // VPERMQZmbi = 16525 |
| 156259 | CEFBS_None, // VPERMQZmbik = 16526 |
| 156260 | CEFBS_None, // VPERMQZmbikz = 16527 |
| 156261 | CEFBS_None, // VPERMQZmi = 16528 |
| 156262 | CEFBS_None, // VPERMQZmik = 16529 |
| 156263 | CEFBS_None, // VPERMQZmikz = 16530 |
| 156264 | CEFBS_None, // VPERMQZri = 16531 |
| 156265 | CEFBS_None, // VPERMQZrik = 16532 |
| 156266 | CEFBS_None, // VPERMQZrikz = 16533 |
| 156267 | CEFBS_None, // VPERMQZrm = 16534 |
| 156268 | CEFBS_None, // VPERMQZrmb = 16535 |
| 156269 | CEFBS_None, // VPERMQZrmbk = 16536 |
| 156270 | CEFBS_None, // VPERMQZrmbkz = 16537 |
| 156271 | CEFBS_None, // VPERMQZrmk = 16538 |
| 156272 | CEFBS_None, // VPERMQZrmkz = 16539 |
| 156273 | CEFBS_None, // VPERMQZrr = 16540 |
| 156274 | CEFBS_None, // VPERMQZrrk = 16541 |
| 156275 | CEFBS_None, // VPERMQZrrkz = 16542 |
| 156276 | CEFBS_None, // VPERMT2BZ128rm = 16543 |
| 156277 | CEFBS_None, // VPERMT2BZ128rmk = 16544 |
| 156278 | CEFBS_None, // VPERMT2BZ128rmkz = 16545 |
| 156279 | CEFBS_None, // VPERMT2BZ128rr = 16546 |
| 156280 | CEFBS_None, // VPERMT2BZ128rrk = 16547 |
| 156281 | CEFBS_None, // VPERMT2BZ128rrkz = 16548 |
| 156282 | CEFBS_None, // VPERMT2BZ256rm = 16549 |
| 156283 | CEFBS_None, // VPERMT2BZ256rmk = 16550 |
| 156284 | CEFBS_None, // VPERMT2BZ256rmkz = 16551 |
| 156285 | CEFBS_None, // VPERMT2BZ256rr = 16552 |
| 156286 | CEFBS_None, // VPERMT2BZ256rrk = 16553 |
| 156287 | CEFBS_None, // VPERMT2BZ256rrkz = 16554 |
| 156288 | CEFBS_None, // VPERMT2BZrm = 16555 |
| 156289 | CEFBS_None, // VPERMT2BZrmk = 16556 |
| 156290 | CEFBS_None, // VPERMT2BZrmkz = 16557 |
| 156291 | CEFBS_None, // VPERMT2BZrr = 16558 |
| 156292 | CEFBS_None, // VPERMT2BZrrk = 16559 |
| 156293 | CEFBS_None, // VPERMT2BZrrkz = 16560 |
| 156294 | CEFBS_None, // VPERMT2DZ128rm = 16561 |
| 156295 | CEFBS_None, // VPERMT2DZ128rmb = 16562 |
| 156296 | CEFBS_None, // VPERMT2DZ128rmbk = 16563 |
| 156297 | CEFBS_None, // VPERMT2DZ128rmbkz = 16564 |
| 156298 | CEFBS_None, // VPERMT2DZ128rmk = 16565 |
| 156299 | CEFBS_None, // VPERMT2DZ128rmkz = 16566 |
| 156300 | CEFBS_None, // VPERMT2DZ128rr = 16567 |
| 156301 | CEFBS_None, // VPERMT2DZ128rrk = 16568 |
| 156302 | CEFBS_None, // VPERMT2DZ128rrkz = 16569 |
| 156303 | CEFBS_None, // VPERMT2DZ256rm = 16570 |
| 156304 | CEFBS_None, // VPERMT2DZ256rmb = 16571 |
| 156305 | CEFBS_None, // VPERMT2DZ256rmbk = 16572 |
| 156306 | CEFBS_None, // VPERMT2DZ256rmbkz = 16573 |
| 156307 | CEFBS_None, // VPERMT2DZ256rmk = 16574 |
| 156308 | CEFBS_None, // VPERMT2DZ256rmkz = 16575 |
| 156309 | CEFBS_None, // VPERMT2DZ256rr = 16576 |
| 156310 | CEFBS_None, // VPERMT2DZ256rrk = 16577 |
| 156311 | CEFBS_None, // VPERMT2DZ256rrkz = 16578 |
| 156312 | CEFBS_None, // VPERMT2DZrm = 16579 |
| 156313 | CEFBS_None, // VPERMT2DZrmb = 16580 |
| 156314 | CEFBS_None, // VPERMT2DZrmbk = 16581 |
| 156315 | CEFBS_None, // VPERMT2DZrmbkz = 16582 |
| 156316 | CEFBS_None, // VPERMT2DZrmk = 16583 |
| 156317 | CEFBS_None, // VPERMT2DZrmkz = 16584 |
| 156318 | CEFBS_None, // VPERMT2DZrr = 16585 |
| 156319 | CEFBS_None, // VPERMT2DZrrk = 16586 |
| 156320 | CEFBS_None, // VPERMT2DZrrkz = 16587 |
| 156321 | CEFBS_None, // VPERMT2PDZ128rm = 16588 |
| 156322 | CEFBS_None, // VPERMT2PDZ128rmb = 16589 |
| 156323 | CEFBS_None, // VPERMT2PDZ128rmbk = 16590 |
| 156324 | CEFBS_None, // VPERMT2PDZ128rmbkz = 16591 |
| 156325 | CEFBS_None, // VPERMT2PDZ128rmk = 16592 |
| 156326 | CEFBS_None, // VPERMT2PDZ128rmkz = 16593 |
| 156327 | CEFBS_None, // VPERMT2PDZ128rr = 16594 |
| 156328 | CEFBS_None, // VPERMT2PDZ128rrk = 16595 |
| 156329 | CEFBS_None, // VPERMT2PDZ128rrkz = 16596 |
| 156330 | CEFBS_None, // VPERMT2PDZ256rm = 16597 |
| 156331 | CEFBS_None, // VPERMT2PDZ256rmb = 16598 |
| 156332 | CEFBS_None, // VPERMT2PDZ256rmbk = 16599 |
| 156333 | CEFBS_None, // VPERMT2PDZ256rmbkz = 16600 |
| 156334 | CEFBS_None, // VPERMT2PDZ256rmk = 16601 |
| 156335 | CEFBS_None, // VPERMT2PDZ256rmkz = 16602 |
| 156336 | CEFBS_None, // VPERMT2PDZ256rr = 16603 |
| 156337 | CEFBS_None, // VPERMT2PDZ256rrk = 16604 |
| 156338 | CEFBS_None, // VPERMT2PDZ256rrkz = 16605 |
| 156339 | CEFBS_None, // VPERMT2PDZrm = 16606 |
| 156340 | CEFBS_None, // VPERMT2PDZrmb = 16607 |
| 156341 | CEFBS_None, // VPERMT2PDZrmbk = 16608 |
| 156342 | CEFBS_None, // VPERMT2PDZrmbkz = 16609 |
| 156343 | CEFBS_None, // VPERMT2PDZrmk = 16610 |
| 156344 | CEFBS_None, // VPERMT2PDZrmkz = 16611 |
| 156345 | CEFBS_None, // VPERMT2PDZrr = 16612 |
| 156346 | CEFBS_None, // VPERMT2PDZrrk = 16613 |
| 156347 | CEFBS_None, // VPERMT2PDZrrkz = 16614 |
| 156348 | CEFBS_None, // VPERMT2PSZ128rm = 16615 |
| 156349 | CEFBS_None, // VPERMT2PSZ128rmb = 16616 |
| 156350 | CEFBS_None, // VPERMT2PSZ128rmbk = 16617 |
| 156351 | CEFBS_None, // VPERMT2PSZ128rmbkz = 16618 |
| 156352 | CEFBS_None, // VPERMT2PSZ128rmk = 16619 |
| 156353 | CEFBS_None, // VPERMT2PSZ128rmkz = 16620 |
| 156354 | CEFBS_None, // VPERMT2PSZ128rr = 16621 |
| 156355 | CEFBS_None, // VPERMT2PSZ128rrk = 16622 |
| 156356 | CEFBS_None, // VPERMT2PSZ128rrkz = 16623 |
| 156357 | CEFBS_None, // VPERMT2PSZ256rm = 16624 |
| 156358 | CEFBS_None, // VPERMT2PSZ256rmb = 16625 |
| 156359 | CEFBS_None, // VPERMT2PSZ256rmbk = 16626 |
| 156360 | CEFBS_None, // VPERMT2PSZ256rmbkz = 16627 |
| 156361 | CEFBS_None, // VPERMT2PSZ256rmk = 16628 |
| 156362 | CEFBS_None, // VPERMT2PSZ256rmkz = 16629 |
| 156363 | CEFBS_None, // VPERMT2PSZ256rr = 16630 |
| 156364 | CEFBS_None, // VPERMT2PSZ256rrk = 16631 |
| 156365 | CEFBS_None, // VPERMT2PSZ256rrkz = 16632 |
| 156366 | CEFBS_None, // VPERMT2PSZrm = 16633 |
| 156367 | CEFBS_None, // VPERMT2PSZrmb = 16634 |
| 156368 | CEFBS_None, // VPERMT2PSZrmbk = 16635 |
| 156369 | CEFBS_None, // VPERMT2PSZrmbkz = 16636 |
| 156370 | CEFBS_None, // VPERMT2PSZrmk = 16637 |
| 156371 | CEFBS_None, // VPERMT2PSZrmkz = 16638 |
| 156372 | CEFBS_None, // VPERMT2PSZrr = 16639 |
| 156373 | CEFBS_None, // VPERMT2PSZrrk = 16640 |
| 156374 | CEFBS_None, // VPERMT2PSZrrkz = 16641 |
| 156375 | CEFBS_None, // VPERMT2QZ128rm = 16642 |
| 156376 | CEFBS_None, // VPERMT2QZ128rmb = 16643 |
| 156377 | CEFBS_None, // VPERMT2QZ128rmbk = 16644 |
| 156378 | CEFBS_None, // VPERMT2QZ128rmbkz = 16645 |
| 156379 | CEFBS_None, // VPERMT2QZ128rmk = 16646 |
| 156380 | CEFBS_None, // VPERMT2QZ128rmkz = 16647 |
| 156381 | CEFBS_None, // VPERMT2QZ128rr = 16648 |
| 156382 | CEFBS_None, // VPERMT2QZ128rrk = 16649 |
| 156383 | CEFBS_None, // VPERMT2QZ128rrkz = 16650 |
| 156384 | CEFBS_None, // VPERMT2QZ256rm = 16651 |
| 156385 | CEFBS_None, // VPERMT2QZ256rmb = 16652 |
| 156386 | CEFBS_None, // VPERMT2QZ256rmbk = 16653 |
| 156387 | CEFBS_None, // VPERMT2QZ256rmbkz = 16654 |
| 156388 | CEFBS_None, // VPERMT2QZ256rmk = 16655 |
| 156389 | CEFBS_None, // VPERMT2QZ256rmkz = 16656 |
| 156390 | CEFBS_None, // VPERMT2QZ256rr = 16657 |
| 156391 | CEFBS_None, // VPERMT2QZ256rrk = 16658 |
| 156392 | CEFBS_None, // VPERMT2QZ256rrkz = 16659 |
| 156393 | CEFBS_None, // VPERMT2QZrm = 16660 |
| 156394 | CEFBS_None, // VPERMT2QZrmb = 16661 |
| 156395 | CEFBS_None, // VPERMT2QZrmbk = 16662 |
| 156396 | CEFBS_None, // VPERMT2QZrmbkz = 16663 |
| 156397 | CEFBS_None, // VPERMT2QZrmk = 16664 |
| 156398 | CEFBS_None, // VPERMT2QZrmkz = 16665 |
| 156399 | CEFBS_None, // VPERMT2QZrr = 16666 |
| 156400 | CEFBS_None, // VPERMT2QZrrk = 16667 |
| 156401 | CEFBS_None, // VPERMT2QZrrkz = 16668 |
| 156402 | CEFBS_None, // VPERMT2WZ128rm = 16669 |
| 156403 | CEFBS_None, // VPERMT2WZ128rmk = 16670 |
| 156404 | CEFBS_None, // VPERMT2WZ128rmkz = 16671 |
| 156405 | CEFBS_None, // VPERMT2WZ128rr = 16672 |
| 156406 | CEFBS_None, // VPERMT2WZ128rrk = 16673 |
| 156407 | CEFBS_None, // VPERMT2WZ128rrkz = 16674 |
| 156408 | CEFBS_None, // VPERMT2WZ256rm = 16675 |
| 156409 | CEFBS_None, // VPERMT2WZ256rmk = 16676 |
| 156410 | CEFBS_None, // VPERMT2WZ256rmkz = 16677 |
| 156411 | CEFBS_None, // VPERMT2WZ256rr = 16678 |
| 156412 | CEFBS_None, // VPERMT2WZ256rrk = 16679 |
| 156413 | CEFBS_None, // VPERMT2WZ256rrkz = 16680 |
| 156414 | CEFBS_None, // VPERMT2WZrm = 16681 |
| 156415 | CEFBS_None, // VPERMT2WZrmk = 16682 |
| 156416 | CEFBS_None, // VPERMT2WZrmkz = 16683 |
| 156417 | CEFBS_None, // VPERMT2WZrr = 16684 |
| 156418 | CEFBS_None, // VPERMT2WZrrk = 16685 |
| 156419 | CEFBS_None, // VPERMT2WZrrkz = 16686 |
| 156420 | CEFBS_None, // VPERMWZ128rm = 16687 |
| 156421 | CEFBS_None, // VPERMWZ128rmk = 16688 |
| 156422 | CEFBS_None, // VPERMWZ128rmkz = 16689 |
| 156423 | CEFBS_None, // VPERMWZ128rr = 16690 |
| 156424 | CEFBS_None, // VPERMWZ128rrk = 16691 |
| 156425 | CEFBS_None, // VPERMWZ128rrkz = 16692 |
| 156426 | CEFBS_None, // VPERMWZ256rm = 16693 |
| 156427 | CEFBS_None, // VPERMWZ256rmk = 16694 |
| 156428 | CEFBS_None, // VPERMWZ256rmkz = 16695 |
| 156429 | CEFBS_None, // VPERMWZ256rr = 16696 |
| 156430 | CEFBS_None, // VPERMWZ256rrk = 16697 |
| 156431 | CEFBS_None, // VPERMWZ256rrkz = 16698 |
| 156432 | CEFBS_None, // VPERMWZrm = 16699 |
| 156433 | CEFBS_None, // VPERMWZrmk = 16700 |
| 156434 | CEFBS_None, // VPERMWZrmkz = 16701 |
| 156435 | CEFBS_None, // VPERMWZrr = 16702 |
| 156436 | CEFBS_None, // VPERMWZrrk = 16703 |
| 156437 | CEFBS_None, // VPERMWZrrkz = 16704 |
| 156438 | CEFBS_None, // VPEXPANDBZ128rm = 16705 |
| 156439 | CEFBS_None, // VPEXPANDBZ128rmk = 16706 |
| 156440 | CEFBS_None, // VPEXPANDBZ128rmkz = 16707 |
| 156441 | CEFBS_None, // VPEXPANDBZ128rr = 16708 |
| 156442 | CEFBS_None, // VPEXPANDBZ128rrk = 16709 |
| 156443 | CEFBS_None, // VPEXPANDBZ128rrkz = 16710 |
| 156444 | CEFBS_None, // VPEXPANDBZ256rm = 16711 |
| 156445 | CEFBS_None, // VPEXPANDBZ256rmk = 16712 |
| 156446 | CEFBS_None, // VPEXPANDBZ256rmkz = 16713 |
| 156447 | CEFBS_None, // VPEXPANDBZ256rr = 16714 |
| 156448 | CEFBS_None, // VPEXPANDBZ256rrk = 16715 |
| 156449 | CEFBS_None, // VPEXPANDBZ256rrkz = 16716 |
| 156450 | CEFBS_None, // VPEXPANDBZrm = 16717 |
| 156451 | CEFBS_None, // VPEXPANDBZrmk = 16718 |
| 156452 | CEFBS_None, // VPEXPANDBZrmkz = 16719 |
| 156453 | CEFBS_None, // VPEXPANDBZrr = 16720 |
| 156454 | CEFBS_None, // VPEXPANDBZrrk = 16721 |
| 156455 | CEFBS_None, // VPEXPANDBZrrkz = 16722 |
| 156456 | CEFBS_None, // VPEXPANDDZ128rm = 16723 |
| 156457 | CEFBS_None, // VPEXPANDDZ128rmk = 16724 |
| 156458 | CEFBS_None, // VPEXPANDDZ128rmkz = 16725 |
| 156459 | CEFBS_None, // VPEXPANDDZ128rr = 16726 |
| 156460 | CEFBS_None, // VPEXPANDDZ128rrk = 16727 |
| 156461 | CEFBS_None, // VPEXPANDDZ128rrkz = 16728 |
| 156462 | CEFBS_None, // VPEXPANDDZ256rm = 16729 |
| 156463 | CEFBS_None, // VPEXPANDDZ256rmk = 16730 |
| 156464 | CEFBS_None, // VPEXPANDDZ256rmkz = 16731 |
| 156465 | CEFBS_None, // VPEXPANDDZ256rr = 16732 |
| 156466 | CEFBS_None, // VPEXPANDDZ256rrk = 16733 |
| 156467 | CEFBS_None, // VPEXPANDDZ256rrkz = 16734 |
| 156468 | CEFBS_None, // VPEXPANDDZrm = 16735 |
| 156469 | CEFBS_None, // VPEXPANDDZrmk = 16736 |
| 156470 | CEFBS_None, // VPEXPANDDZrmkz = 16737 |
| 156471 | CEFBS_None, // VPEXPANDDZrr = 16738 |
| 156472 | CEFBS_None, // VPEXPANDDZrrk = 16739 |
| 156473 | CEFBS_None, // VPEXPANDDZrrkz = 16740 |
| 156474 | CEFBS_None, // VPEXPANDQZ128rm = 16741 |
| 156475 | CEFBS_None, // VPEXPANDQZ128rmk = 16742 |
| 156476 | CEFBS_None, // VPEXPANDQZ128rmkz = 16743 |
| 156477 | CEFBS_None, // VPEXPANDQZ128rr = 16744 |
| 156478 | CEFBS_None, // VPEXPANDQZ128rrk = 16745 |
| 156479 | CEFBS_None, // VPEXPANDQZ128rrkz = 16746 |
| 156480 | CEFBS_None, // VPEXPANDQZ256rm = 16747 |
| 156481 | CEFBS_None, // VPEXPANDQZ256rmk = 16748 |
| 156482 | CEFBS_None, // VPEXPANDQZ256rmkz = 16749 |
| 156483 | CEFBS_None, // VPEXPANDQZ256rr = 16750 |
| 156484 | CEFBS_None, // VPEXPANDQZ256rrk = 16751 |
| 156485 | CEFBS_None, // VPEXPANDQZ256rrkz = 16752 |
| 156486 | CEFBS_None, // VPEXPANDQZrm = 16753 |
| 156487 | CEFBS_None, // VPEXPANDQZrmk = 16754 |
| 156488 | CEFBS_None, // VPEXPANDQZrmkz = 16755 |
| 156489 | CEFBS_None, // VPEXPANDQZrr = 16756 |
| 156490 | CEFBS_None, // VPEXPANDQZrrk = 16757 |
| 156491 | CEFBS_None, // VPEXPANDQZrrkz = 16758 |
| 156492 | CEFBS_None, // VPEXPANDWZ128rm = 16759 |
| 156493 | CEFBS_None, // VPEXPANDWZ128rmk = 16760 |
| 156494 | CEFBS_None, // VPEXPANDWZ128rmkz = 16761 |
| 156495 | CEFBS_None, // VPEXPANDWZ128rr = 16762 |
| 156496 | CEFBS_None, // VPEXPANDWZ128rrk = 16763 |
| 156497 | CEFBS_None, // VPEXPANDWZ128rrkz = 16764 |
| 156498 | CEFBS_None, // VPEXPANDWZ256rm = 16765 |
| 156499 | CEFBS_None, // VPEXPANDWZ256rmk = 16766 |
| 156500 | CEFBS_None, // VPEXPANDWZ256rmkz = 16767 |
| 156501 | CEFBS_None, // VPEXPANDWZ256rr = 16768 |
| 156502 | CEFBS_None, // VPEXPANDWZ256rrk = 16769 |
| 156503 | CEFBS_None, // VPEXPANDWZ256rrkz = 16770 |
| 156504 | CEFBS_None, // VPEXPANDWZrm = 16771 |
| 156505 | CEFBS_None, // VPEXPANDWZrmk = 16772 |
| 156506 | CEFBS_None, // VPEXPANDWZrmkz = 16773 |
| 156507 | CEFBS_None, // VPEXPANDWZrr = 16774 |
| 156508 | CEFBS_None, // VPEXPANDWZrrk = 16775 |
| 156509 | CEFBS_None, // VPEXPANDWZrrkz = 16776 |
| 156510 | CEFBS_None, // VPEXTRBZmri = 16777 |
| 156511 | CEFBS_None, // VPEXTRBZrri = 16778 |
| 156512 | CEFBS_None, // VPEXTRBmri = 16779 |
| 156513 | CEFBS_None, // VPEXTRBrri = 16780 |
| 156514 | CEFBS_None, // VPEXTRDZmri = 16781 |
| 156515 | CEFBS_None, // VPEXTRDZrri = 16782 |
| 156516 | CEFBS_None, // VPEXTRDmri = 16783 |
| 156517 | CEFBS_None, // VPEXTRDrri = 16784 |
| 156518 | CEFBS_None, // VPEXTRQZmri = 16785 |
| 156519 | CEFBS_None, // VPEXTRQZrri = 16786 |
| 156520 | CEFBS_None, // VPEXTRQmri = 16787 |
| 156521 | CEFBS_None, // VPEXTRQrri = 16788 |
| 156522 | CEFBS_None, // VPEXTRWZmri = 16789 |
| 156523 | CEFBS_None, // VPEXTRWZrri = 16790 |
| 156524 | CEFBS_None, // VPEXTRWZrri_REV = 16791 |
| 156525 | CEFBS_None, // VPEXTRWmri = 16792 |
| 156526 | CEFBS_None, // VPEXTRWrri = 16793 |
| 156527 | CEFBS_None, // VPEXTRWrri_REV = 16794 |
| 156528 | CEFBS_None, // VPGATHERDDYrm = 16795 |
| 156529 | CEFBS_None, // VPGATHERDDZ128rm = 16796 |
| 156530 | CEFBS_None, // VPGATHERDDZ256rm = 16797 |
| 156531 | CEFBS_None, // VPGATHERDDZrm = 16798 |
| 156532 | CEFBS_None, // VPGATHERDDrm = 16799 |
| 156533 | CEFBS_None, // VPGATHERDQYrm = 16800 |
| 156534 | CEFBS_None, // VPGATHERDQZ128rm = 16801 |
| 156535 | CEFBS_None, // VPGATHERDQZ256rm = 16802 |
| 156536 | CEFBS_None, // VPGATHERDQZrm = 16803 |
| 156537 | CEFBS_None, // VPGATHERDQrm = 16804 |
| 156538 | CEFBS_None, // VPGATHERQDYrm = 16805 |
| 156539 | CEFBS_None, // VPGATHERQDZ128rm = 16806 |
| 156540 | CEFBS_None, // VPGATHERQDZ256rm = 16807 |
| 156541 | CEFBS_None, // VPGATHERQDZrm = 16808 |
| 156542 | CEFBS_None, // VPGATHERQDrm = 16809 |
| 156543 | CEFBS_None, // VPGATHERQQYrm = 16810 |
| 156544 | CEFBS_None, // VPGATHERQQZ128rm = 16811 |
| 156545 | CEFBS_None, // VPGATHERQQZ256rm = 16812 |
| 156546 | CEFBS_None, // VPGATHERQQZrm = 16813 |
| 156547 | CEFBS_None, // VPGATHERQQrm = 16814 |
| 156548 | CEFBS_None, // VPHADDBDrm = 16815 |
| 156549 | CEFBS_None, // VPHADDBDrr = 16816 |
| 156550 | CEFBS_None, // VPHADDBQrm = 16817 |
| 156551 | CEFBS_None, // VPHADDBQrr = 16818 |
| 156552 | CEFBS_None, // VPHADDBWrm = 16819 |
| 156553 | CEFBS_None, // VPHADDBWrr = 16820 |
| 156554 | CEFBS_None, // VPHADDDQrm = 16821 |
| 156555 | CEFBS_None, // VPHADDDQrr = 16822 |
| 156556 | CEFBS_None, // VPHADDDYrm = 16823 |
| 156557 | CEFBS_None, // VPHADDDYrr = 16824 |
| 156558 | CEFBS_None, // VPHADDDrm = 16825 |
| 156559 | CEFBS_None, // VPHADDDrr = 16826 |
| 156560 | CEFBS_None, // VPHADDSWYrm = 16827 |
| 156561 | CEFBS_None, // VPHADDSWYrr = 16828 |
| 156562 | CEFBS_None, // VPHADDSWrm = 16829 |
| 156563 | CEFBS_None, // VPHADDSWrr = 16830 |
| 156564 | CEFBS_None, // VPHADDUBDrm = 16831 |
| 156565 | CEFBS_None, // VPHADDUBDrr = 16832 |
| 156566 | CEFBS_None, // VPHADDUBQrm = 16833 |
| 156567 | CEFBS_None, // VPHADDUBQrr = 16834 |
| 156568 | CEFBS_None, // VPHADDUBWrm = 16835 |
| 156569 | CEFBS_None, // VPHADDUBWrr = 16836 |
| 156570 | CEFBS_None, // VPHADDUDQrm = 16837 |
| 156571 | CEFBS_None, // VPHADDUDQrr = 16838 |
| 156572 | CEFBS_None, // VPHADDUWDrm = 16839 |
| 156573 | CEFBS_None, // VPHADDUWDrr = 16840 |
| 156574 | CEFBS_None, // VPHADDUWQrm = 16841 |
| 156575 | CEFBS_None, // VPHADDUWQrr = 16842 |
| 156576 | CEFBS_None, // VPHADDWDrm = 16843 |
| 156577 | CEFBS_None, // VPHADDWDrr = 16844 |
| 156578 | CEFBS_None, // VPHADDWQrm = 16845 |
| 156579 | CEFBS_None, // VPHADDWQrr = 16846 |
| 156580 | CEFBS_None, // VPHADDWYrm = 16847 |
| 156581 | CEFBS_None, // VPHADDWYrr = 16848 |
| 156582 | CEFBS_None, // VPHADDWrm = 16849 |
| 156583 | CEFBS_None, // VPHADDWrr = 16850 |
| 156584 | CEFBS_None, // VPHMINPOSUWrm = 16851 |
| 156585 | CEFBS_None, // VPHMINPOSUWrr = 16852 |
| 156586 | CEFBS_None, // VPHSUBBWrm = 16853 |
| 156587 | CEFBS_None, // VPHSUBBWrr = 16854 |
| 156588 | CEFBS_None, // VPHSUBDQrm = 16855 |
| 156589 | CEFBS_None, // VPHSUBDQrr = 16856 |
| 156590 | CEFBS_None, // VPHSUBDYrm = 16857 |
| 156591 | CEFBS_None, // VPHSUBDYrr = 16858 |
| 156592 | CEFBS_None, // VPHSUBDrm = 16859 |
| 156593 | CEFBS_None, // VPHSUBDrr = 16860 |
| 156594 | CEFBS_None, // VPHSUBSWYrm = 16861 |
| 156595 | CEFBS_None, // VPHSUBSWYrr = 16862 |
| 156596 | CEFBS_None, // VPHSUBSWrm = 16863 |
| 156597 | CEFBS_None, // VPHSUBSWrr = 16864 |
| 156598 | CEFBS_None, // VPHSUBWDrm = 16865 |
| 156599 | CEFBS_None, // VPHSUBWDrr = 16866 |
| 156600 | CEFBS_None, // VPHSUBWYrm = 16867 |
| 156601 | CEFBS_None, // VPHSUBWYrr = 16868 |
| 156602 | CEFBS_None, // VPHSUBWrm = 16869 |
| 156603 | CEFBS_None, // VPHSUBWrr = 16870 |
| 156604 | CEFBS_None, // VPINSRBZrmi = 16871 |
| 156605 | CEFBS_None, // VPINSRBZrri = 16872 |
| 156606 | CEFBS_None, // VPINSRBrmi = 16873 |
| 156607 | CEFBS_None, // VPINSRBrri = 16874 |
| 156608 | CEFBS_None, // VPINSRDZrmi = 16875 |
| 156609 | CEFBS_None, // VPINSRDZrri = 16876 |
| 156610 | CEFBS_None, // VPINSRDrmi = 16877 |
| 156611 | CEFBS_None, // VPINSRDrri = 16878 |
| 156612 | CEFBS_None, // VPINSRQZrmi = 16879 |
| 156613 | CEFBS_None, // VPINSRQZrri = 16880 |
| 156614 | CEFBS_None, // VPINSRQrmi = 16881 |
| 156615 | CEFBS_None, // VPINSRQrri = 16882 |
| 156616 | CEFBS_None, // VPINSRWZrmi = 16883 |
| 156617 | CEFBS_None, // VPINSRWZrri = 16884 |
| 156618 | CEFBS_None, // VPINSRWrmi = 16885 |
| 156619 | CEFBS_None, // VPINSRWrri = 16886 |
| 156620 | CEFBS_None, // VPLZCNTDZ128rm = 16887 |
| 156621 | CEFBS_None, // VPLZCNTDZ128rmb = 16888 |
| 156622 | CEFBS_None, // VPLZCNTDZ128rmbk = 16889 |
| 156623 | CEFBS_None, // VPLZCNTDZ128rmbkz = 16890 |
| 156624 | CEFBS_None, // VPLZCNTDZ128rmk = 16891 |
| 156625 | CEFBS_None, // VPLZCNTDZ128rmkz = 16892 |
| 156626 | CEFBS_None, // VPLZCNTDZ128rr = 16893 |
| 156627 | CEFBS_None, // VPLZCNTDZ128rrk = 16894 |
| 156628 | CEFBS_None, // VPLZCNTDZ128rrkz = 16895 |
| 156629 | CEFBS_None, // VPLZCNTDZ256rm = 16896 |
| 156630 | CEFBS_None, // VPLZCNTDZ256rmb = 16897 |
| 156631 | CEFBS_None, // VPLZCNTDZ256rmbk = 16898 |
| 156632 | CEFBS_None, // VPLZCNTDZ256rmbkz = 16899 |
| 156633 | CEFBS_None, // VPLZCNTDZ256rmk = 16900 |
| 156634 | CEFBS_None, // VPLZCNTDZ256rmkz = 16901 |
| 156635 | CEFBS_None, // VPLZCNTDZ256rr = 16902 |
| 156636 | CEFBS_None, // VPLZCNTDZ256rrk = 16903 |
| 156637 | CEFBS_None, // VPLZCNTDZ256rrkz = 16904 |
| 156638 | CEFBS_None, // VPLZCNTDZrm = 16905 |
| 156639 | CEFBS_None, // VPLZCNTDZrmb = 16906 |
| 156640 | CEFBS_None, // VPLZCNTDZrmbk = 16907 |
| 156641 | CEFBS_None, // VPLZCNTDZrmbkz = 16908 |
| 156642 | CEFBS_None, // VPLZCNTDZrmk = 16909 |
| 156643 | CEFBS_None, // VPLZCNTDZrmkz = 16910 |
| 156644 | CEFBS_None, // VPLZCNTDZrr = 16911 |
| 156645 | CEFBS_None, // VPLZCNTDZrrk = 16912 |
| 156646 | CEFBS_None, // VPLZCNTDZrrkz = 16913 |
| 156647 | CEFBS_None, // VPLZCNTQZ128rm = 16914 |
| 156648 | CEFBS_None, // VPLZCNTQZ128rmb = 16915 |
| 156649 | CEFBS_None, // VPLZCNTQZ128rmbk = 16916 |
| 156650 | CEFBS_None, // VPLZCNTQZ128rmbkz = 16917 |
| 156651 | CEFBS_None, // VPLZCNTQZ128rmk = 16918 |
| 156652 | CEFBS_None, // VPLZCNTQZ128rmkz = 16919 |
| 156653 | CEFBS_None, // VPLZCNTQZ128rr = 16920 |
| 156654 | CEFBS_None, // VPLZCNTQZ128rrk = 16921 |
| 156655 | CEFBS_None, // VPLZCNTQZ128rrkz = 16922 |
| 156656 | CEFBS_None, // VPLZCNTQZ256rm = 16923 |
| 156657 | CEFBS_None, // VPLZCNTQZ256rmb = 16924 |
| 156658 | CEFBS_None, // VPLZCNTQZ256rmbk = 16925 |
| 156659 | CEFBS_None, // VPLZCNTQZ256rmbkz = 16926 |
| 156660 | CEFBS_None, // VPLZCNTQZ256rmk = 16927 |
| 156661 | CEFBS_None, // VPLZCNTQZ256rmkz = 16928 |
| 156662 | CEFBS_None, // VPLZCNTQZ256rr = 16929 |
| 156663 | CEFBS_None, // VPLZCNTQZ256rrk = 16930 |
| 156664 | CEFBS_None, // VPLZCNTQZ256rrkz = 16931 |
| 156665 | CEFBS_None, // VPLZCNTQZrm = 16932 |
| 156666 | CEFBS_None, // VPLZCNTQZrmb = 16933 |
| 156667 | CEFBS_None, // VPLZCNTQZrmbk = 16934 |
| 156668 | CEFBS_None, // VPLZCNTQZrmbkz = 16935 |
| 156669 | CEFBS_None, // VPLZCNTQZrmk = 16936 |
| 156670 | CEFBS_None, // VPLZCNTQZrmkz = 16937 |
| 156671 | CEFBS_None, // VPLZCNTQZrr = 16938 |
| 156672 | CEFBS_None, // VPLZCNTQZrrk = 16939 |
| 156673 | CEFBS_None, // VPLZCNTQZrrkz = 16940 |
| 156674 | CEFBS_None, // VPMACSDDrm = 16941 |
| 156675 | CEFBS_None, // VPMACSDDrr = 16942 |
| 156676 | CEFBS_None, // VPMACSDQHrm = 16943 |
| 156677 | CEFBS_None, // VPMACSDQHrr = 16944 |
| 156678 | CEFBS_None, // VPMACSDQLrm = 16945 |
| 156679 | CEFBS_None, // VPMACSDQLrr = 16946 |
| 156680 | CEFBS_None, // VPMACSSDDrm = 16947 |
| 156681 | CEFBS_None, // VPMACSSDDrr = 16948 |
| 156682 | CEFBS_None, // VPMACSSDQHrm = 16949 |
| 156683 | CEFBS_None, // VPMACSSDQHrr = 16950 |
| 156684 | CEFBS_None, // VPMACSSDQLrm = 16951 |
| 156685 | CEFBS_None, // VPMACSSDQLrr = 16952 |
| 156686 | CEFBS_None, // VPMACSSWDrm = 16953 |
| 156687 | CEFBS_None, // VPMACSSWDrr = 16954 |
| 156688 | CEFBS_None, // VPMACSSWWrm = 16955 |
| 156689 | CEFBS_None, // VPMACSSWWrr = 16956 |
| 156690 | CEFBS_None, // VPMACSWDrm = 16957 |
| 156691 | CEFBS_None, // VPMACSWDrr = 16958 |
| 156692 | CEFBS_None, // VPMACSWWrm = 16959 |
| 156693 | CEFBS_None, // VPMACSWWrr = 16960 |
| 156694 | CEFBS_None, // VPMADCSSWDrm = 16961 |
| 156695 | CEFBS_None, // VPMADCSSWDrr = 16962 |
| 156696 | CEFBS_None, // VPMADCSWDrm = 16963 |
| 156697 | CEFBS_None, // VPMADCSWDrr = 16964 |
| 156698 | CEFBS_None, // VPMADD52HUQYrm = 16965 |
| 156699 | CEFBS_None, // VPMADD52HUQYrr = 16966 |
| 156700 | CEFBS_None, // VPMADD52HUQZ128m = 16967 |
| 156701 | CEFBS_None, // VPMADD52HUQZ128mb = 16968 |
| 156702 | CEFBS_None, // VPMADD52HUQZ128mbk = 16969 |
| 156703 | CEFBS_None, // VPMADD52HUQZ128mbkz = 16970 |
| 156704 | CEFBS_None, // VPMADD52HUQZ128mk = 16971 |
| 156705 | CEFBS_None, // VPMADD52HUQZ128mkz = 16972 |
| 156706 | CEFBS_None, // VPMADD52HUQZ128r = 16973 |
| 156707 | CEFBS_None, // VPMADD52HUQZ128rk = 16974 |
| 156708 | CEFBS_None, // VPMADD52HUQZ128rkz = 16975 |
| 156709 | CEFBS_None, // VPMADD52HUQZ256m = 16976 |
| 156710 | CEFBS_None, // VPMADD52HUQZ256mb = 16977 |
| 156711 | CEFBS_None, // VPMADD52HUQZ256mbk = 16978 |
| 156712 | CEFBS_None, // VPMADD52HUQZ256mbkz = 16979 |
| 156713 | CEFBS_None, // VPMADD52HUQZ256mk = 16980 |
| 156714 | CEFBS_None, // VPMADD52HUQZ256mkz = 16981 |
| 156715 | CEFBS_None, // VPMADD52HUQZ256r = 16982 |
| 156716 | CEFBS_None, // VPMADD52HUQZ256rk = 16983 |
| 156717 | CEFBS_None, // VPMADD52HUQZ256rkz = 16984 |
| 156718 | CEFBS_None, // VPMADD52HUQZm = 16985 |
| 156719 | CEFBS_None, // VPMADD52HUQZmb = 16986 |
| 156720 | CEFBS_None, // VPMADD52HUQZmbk = 16987 |
| 156721 | CEFBS_None, // VPMADD52HUQZmbkz = 16988 |
| 156722 | CEFBS_None, // VPMADD52HUQZmk = 16989 |
| 156723 | CEFBS_None, // VPMADD52HUQZmkz = 16990 |
| 156724 | CEFBS_None, // VPMADD52HUQZr = 16991 |
| 156725 | CEFBS_None, // VPMADD52HUQZrk = 16992 |
| 156726 | CEFBS_None, // VPMADD52HUQZrkz = 16993 |
| 156727 | CEFBS_None, // VPMADD52HUQrm = 16994 |
| 156728 | CEFBS_None, // VPMADD52HUQrr = 16995 |
| 156729 | CEFBS_None, // VPMADD52LUQYrm = 16996 |
| 156730 | CEFBS_None, // VPMADD52LUQYrr = 16997 |
| 156731 | CEFBS_None, // VPMADD52LUQZ128m = 16998 |
| 156732 | CEFBS_None, // VPMADD52LUQZ128mb = 16999 |
| 156733 | CEFBS_None, // VPMADD52LUQZ128mbk = 17000 |
| 156734 | CEFBS_None, // VPMADD52LUQZ128mbkz = 17001 |
| 156735 | CEFBS_None, // VPMADD52LUQZ128mk = 17002 |
| 156736 | CEFBS_None, // VPMADD52LUQZ128mkz = 17003 |
| 156737 | CEFBS_None, // VPMADD52LUQZ128r = 17004 |
| 156738 | CEFBS_None, // VPMADD52LUQZ128rk = 17005 |
| 156739 | CEFBS_None, // VPMADD52LUQZ128rkz = 17006 |
| 156740 | CEFBS_None, // VPMADD52LUQZ256m = 17007 |
| 156741 | CEFBS_None, // VPMADD52LUQZ256mb = 17008 |
| 156742 | CEFBS_None, // VPMADD52LUQZ256mbk = 17009 |
| 156743 | CEFBS_None, // VPMADD52LUQZ256mbkz = 17010 |
| 156744 | CEFBS_None, // VPMADD52LUQZ256mk = 17011 |
| 156745 | CEFBS_None, // VPMADD52LUQZ256mkz = 17012 |
| 156746 | CEFBS_None, // VPMADD52LUQZ256r = 17013 |
| 156747 | CEFBS_None, // VPMADD52LUQZ256rk = 17014 |
| 156748 | CEFBS_None, // VPMADD52LUQZ256rkz = 17015 |
| 156749 | CEFBS_None, // VPMADD52LUQZm = 17016 |
| 156750 | CEFBS_None, // VPMADD52LUQZmb = 17017 |
| 156751 | CEFBS_None, // VPMADD52LUQZmbk = 17018 |
| 156752 | CEFBS_None, // VPMADD52LUQZmbkz = 17019 |
| 156753 | CEFBS_None, // VPMADD52LUQZmk = 17020 |
| 156754 | CEFBS_None, // VPMADD52LUQZmkz = 17021 |
| 156755 | CEFBS_None, // VPMADD52LUQZr = 17022 |
| 156756 | CEFBS_None, // VPMADD52LUQZrk = 17023 |
| 156757 | CEFBS_None, // VPMADD52LUQZrkz = 17024 |
| 156758 | CEFBS_None, // VPMADD52LUQrm = 17025 |
| 156759 | CEFBS_None, // VPMADD52LUQrr = 17026 |
| 156760 | CEFBS_None, // VPMADDUBSWYrm = 17027 |
| 156761 | CEFBS_None, // VPMADDUBSWYrr = 17028 |
| 156762 | CEFBS_None, // VPMADDUBSWZ128rm = 17029 |
| 156763 | CEFBS_None, // VPMADDUBSWZ128rmk = 17030 |
| 156764 | CEFBS_None, // VPMADDUBSWZ128rmkz = 17031 |
| 156765 | CEFBS_None, // VPMADDUBSWZ128rr = 17032 |
| 156766 | CEFBS_None, // VPMADDUBSWZ128rrk = 17033 |
| 156767 | CEFBS_None, // VPMADDUBSWZ128rrkz = 17034 |
| 156768 | CEFBS_None, // VPMADDUBSWZ256rm = 17035 |
| 156769 | CEFBS_None, // VPMADDUBSWZ256rmk = 17036 |
| 156770 | CEFBS_None, // VPMADDUBSWZ256rmkz = 17037 |
| 156771 | CEFBS_None, // VPMADDUBSWZ256rr = 17038 |
| 156772 | CEFBS_None, // VPMADDUBSWZ256rrk = 17039 |
| 156773 | CEFBS_None, // VPMADDUBSWZ256rrkz = 17040 |
| 156774 | CEFBS_None, // VPMADDUBSWZrm = 17041 |
| 156775 | CEFBS_None, // VPMADDUBSWZrmk = 17042 |
| 156776 | CEFBS_None, // VPMADDUBSWZrmkz = 17043 |
| 156777 | CEFBS_None, // VPMADDUBSWZrr = 17044 |
| 156778 | CEFBS_None, // VPMADDUBSWZrrk = 17045 |
| 156779 | CEFBS_None, // VPMADDUBSWZrrkz = 17046 |
| 156780 | CEFBS_None, // VPMADDUBSWrm = 17047 |
| 156781 | CEFBS_None, // VPMADDUBSWrr = 17048 |
| 156782 | CEFBS_None, // VPMADDWDYrm = 17049 |
| 156783 | CEFBS_None, // VPMADDWDYrr = 17050 |
| 156784 | CEFBS_None, // VPMADDWDZ128rm = 17051 |
| 156785 | CEFBS_None, // VPMADDWDZ128rmk = 17052 |
| 156786 | CEFBS_None, // VPMADDWDZ128rmkz = 17053 |
| 156787 | CEFBS_None, // VPMADDWDZ128rr = 17054 |
| 156788 | CEFBS_None, // VPMADDWDZ128rrk = 17055 |
| 156789 | CEFBS_None, // VPMADDWDZ128rrkz = 17056 |
| 156790 | CEFBS_None, // VPMADDWDZ256rm = 17057 |
| 156791 | CEFBS_None, // VPMADDWDZ256rmk = 17058 |
| 156792 | CEFBS_None, // VPMADDWDZ256rmkz = 17059 |
| 156793 | CEFBS_None, // VPMADDWDZ256rr = 17060 |
| 156794 | CEFBS_None, // VPMADDWDZ256rrk = 17061 |
| 156795 | CEFBS_None, // VPMADDWDZ256rrkz = 17062 |
| 156796 | CEFBS_None, // VPMADDWDZrm = 17063 |
| 156797 | CEFBS_None, // VPMADDWDZrmk = 17064 |
| 156798 | CEFBS_None, // VPMADDWDZrmkz = 17065 |
| 156799 | CEFBS_None, // VPMADDWDZrr = 17066 |
| 156800 | CEFBS_None, // VPMADDWDZrrk = 17067 |
| 156801 | CEFBS_None, // VPMADDWDZrrkz = 17068 |
| 156802 | CEFBS_None, // VPMADDWDrm = 17069 |
| 156803 | CEFBS_None, // VPMADDWDrr = 17070 |
| 156804 | CEFBS_None, // VPMASKMOVDYmr = 17071 |
| 156805 | CEFBS_None, // VPMASKMOVDYrm = 17072 |
| 156806 | CEFBS_None, // VPMASKMOVDmr = 17073 |
| 156807 | CEFBS_None, // VPMASKMOVDrm = 17074 |
| 156808 | CEFBS_None, // VPMASKMOVQYmr = 17075 |
| 156809 | CEFBS_None, // VPMASKMOVQYrm = 17076 |
| 156810 | CEFBS_None, // VPMASKMOVQmr = 17077 |
| 156811 | CEFBS_None, // VPMASKMOVQrm = 17078 |
| 156812 | CEFBS_None, // VPMAXSBYrm = 17079 |
| 156813 | CEFBS_None, // VPMAXSBYrr = 17080 |
| 156814 | CEFBS_None, // VPMAXSBZ128rm = 17081 |
| 156815 | CEFBS_None, // VPMAXSBZ128rmk = 17082 |
| 156816 | CEFBS_None, // VPMAXSBZ128rmkz = 17083 |
| 156817 | CEFBS_None, // VPMAXSBZ128rr = 17084 |
| 156818 | CEFBS_None, // VPMAXSBZ128rrk = 17085 |
| 156819 | CEFBS_None, // VPMAXSBZ128rrkz = 17086 |
| 156820 | CEFBS_None, // VPMAXSBZ256rm = 17087 |
| 156821 | CEFBS_None, // VPMAXSBZ256rmk = 17088 |
| 156822 | CEFBS_None, // VPMAXSBZ256rmkz = 17089 |
| 156823 | CEFBS_None, // VPMAXSBZ256rr = 17090 |
| 156824 | CEFBS_None, // VPMAXSBZ256rrk = 17091 |
| 156825 | CEFBS_None, // VPMAXSBZ256rrkz = 17092 |
| 156826 | CEFBS_None, // VPMAXSBZrm = 17093 |
| 156827 | CEFBS_None, // VPMAXSBZrmk = 17094 |
| 156828 | CEFBS_None, // VPMAXSBZrmkz = 17095 |
| 156829 | CEFBS_None, // VPMAXSBZrr = 17096 |
| 156830 | CEFBS_None, // VPMAXSBZrrk = 17097 |
| 156831 | CEFBS_None, // VPMAXSBZrrkz = 17098 |
| 156832 | CEFBS_None, // VPMAXSBrm = 17099 |
| 156833 | CEFBS_None, // VPMAXSBrr = 17100 |
| 156834 | CEFBS_None, // VPMAXSDYrm = 17101 |
| 156835 | CEFBS_None, // VPMAXSDYrr = 17102 |
| 156836 | CEFBS_None, // VPMAXSDZ128rm = 17103 |
| 156837 | CEFBS_None, // VPMAXSDZ128rmb = 17104 |
| 156838 | CEFBS_None, // VPMAXSDZ128rmbk = 17105 |
| 156839 | CEFBS_None, // VPMAXSDZ128rmbkz = 17106 |
| 156840 | CEFBS_None, // VPMAXSDZ128rmk = 17107 |
| 156841 | CEFBS_None, // VPMAXSDZ128rmkz = 17108 |
| 156842 | CEFBS_None, // VPMAXSDZ128rr = 17109 |
| 156843 | CEFBS_None, // VPMAXSDZ128rrk = 17110 |
| 156844 | CEFBS_None, // VPMAXSDZ128rrkz = 17111 |
| 156845 | CEFBS_None, // VPMAXSDZ256rm = 17112 |
| 156846 | CEFBS_None, // VPMAXSDZ256rmb = 17113 |
| 156847 | CEFBS_None, // VPMAXSDZ256rmbk = 17114 |
| 156848 | CEFBS_None, // VPMAXSDZ256rmbkz = 17115 |
| 156849 | CEFBS_None, // VPMAXSDZ256rmk = 17116 |
| 156850 | CEFBS_None, // VPMAXSDZ256rmkz = 17117 |
| 156851 | CEFBS_None, // VPMAXSDZ256rr = 17118 |
| 156852 | CEFBS_None, // VPMAXSDZ256rrk = 17119 |
| 156853 | CEFBS_None, // VPMAXSDZ256rrkz = 17120 |
| 156854 | CEFBS_None, // VPMAXSDZrm = 17121 |
| 156855 | CEFBS_None, // VPMAXSDZrmb = 17122 |
| 156856 | CEFBS_None, // VPMAXSDZrmbk = 17123 |
| 156857 | CEFBS_None, // VPMAXSDZrmbkz = 17124 |
| 156858 | CEFBS_None, // VPMAXSDZrmk = 17125 |
| 156859 | CEFBS_None, // VPMAXSDZrmkz = 17126 |
| 156860 | CEFBS_None, // VPMAXSDZrr = 17127 |
| 156861 | CEFBS_None, // VPMAXSDZrrk = 17128 |
| 156862 | CEFBS_None, // VPMAXSDZrrkz = 17129 |
| 156863 | CEFBS_None, // VPMAXSDrm = 17130 |
| 156864 | CEFBS_None, // VPMAXSDrr = 17131 |
| 156865 | CEFBS_None, // VPMAXSQZ128rm = 17132 |
| 156866 | CEFBS_None, // VPMAXSQZ128rmb = 17133 |
| 156867 | CEFBS_None, // VPMAXSQZ128rmbk = 17134 |
| 156868 | CEFBS_None, // VPMAXSQZ128rmbkz = 17135 |
| 156869 | CEFBS_None, // VPMAXSQZ128rmk = 17136 |
| 156870 | CEFBS_None, // VPMAXSQZ128rmkz = 17137 |
| 156871 | CEFBS_None, // VPMAXSQZ128rr = 17138 |
| 156872 | CEFBS_None, // VPMAXSQZ128rrk = 17139 |
| 156873 | CEFBS_None, // VPMAXSQZ128rrkz = 17140 |
| 156874 | CEFBS_None, // VPMAXSQZ256rm = 17141 |
| 156875 | CEFBS_None, // VPMAXSQZ256rmb = 17142 |
| 156876 | CEFBS_None, // VPMAXSQZ256rmbk = 17143 |
| 156877 | CEFBS_None, // VPMAXSQZ256rmbkz = 17144 |
| 156878 | CEFBS_None, // VPMAXSQZ256rmk = 17145 |
| 156879 | CEFBS_None, // VPMAXSQZ256rmkz = 17146 |
| 156880 | CEFBS_None, // VPMAXSQZ256rr = 17147 |
| 156881 | CEFBS_None, // VPMAXSQZ256rrk = 17148 |
| 156882 | CEFBS_None, // VPMAXSQZ256rrkz = 17149 |
| 156883 | CEFBS_None, // VPMAXSQZrm = 17150 |
| 156884 | CEFBS_None, // VPMAXSQZrmb = 17151 |
| 156885 | CEFBS_None, // VPMAXSQZrmbk = 17152 |
| 156886 | CEFBS_None, // VPMAXSQZrmbkz = 17153 |
| 156887 | CEFBS_None, // VPMAXSQZrmk = 17154 |
| 156888 | CEFBS_None, // VPMAXSQZrmkz = 17155 |
| 156889 | CEFBS_None, // VPMAXSQZrr = 17156 |
| 156890 | CEFBS_None, // VPMAXSQZrrk = 17157 |
| 156891 | CEFBS_None, // VPMAXSQZrrkz = 17158 |
| 156892 | CEFBS_None, // VPMAXSWYrm = 17159 |
| 156893 | CEFBS_None, // VPMAXSWYrr = 17160 |
| 156894 | CEFBS_None, // VPMAXSWZ128rm = 17161 |
| 156895 | CEFBS_None, // VPMAXSWZ128rmk = 17162 |
| 156896 | CEFBS_None, // VPMAXSWZ128rmkz = 17163 |
| 156897 | CEFBS_None, // VPMAXSWZ128rr = 17164 |
| 156898 | CEFBS_None, // VPMAXSWZ128rrk = 17165 |
| 156899 | CEFBS_None, // VPMAXSWZ128rrkz = 17166 |
| 156900 | CEFBS_None, // VPMAXSWZ256rm = 17167 |
| 156901 | CEFBS_None, // VPMAXSWZ256rmk = 17168 |
| 156902 | CEFBS_None, // VPMAXSWZ256rmkz = 17169 |
| 156903 | CEFBS_None, // VPMAXSWZ256rr = 17170 |
| 156904 | CEFBS_None, // VPMAXSWZ256rrk = 17171 |
| 156905 | CEFBS_None, // VPMAXSWZ256rrkz = 17172 |
| 156906 | CEFBS_None, // VPMAXSWZrm = 17173 |
| 156907 | CEFBS_None, // VPMAXSWZrmk = 17174 |
| 156908 | CEFBS_None, // VPMAXSWZrmkz = 17175 |
| 156909 | CEFBS_None, // VPMAXSWZrr = 17176 |
| 156910 | CEFBS_None, // VPMAXSWZrrk = 17177 |
| 156911 | CEFBS_None, // VPMAXSWZrrkz = 17178 |
| 156912 | CEFBS_None, // VPMAXSWrm = 17179 |
| 156913 | CEFBS_None, // VPMAXSWrr = 17180 |
| 156914 | CEFBS_None, // VPMAXUBYrm = 17181 |
| 156915 | CEFBS_None, // VPMAXUBYrr = 17182 |
| 156916 | CEFBS_None, // VPMAXUBZ128rm = 17183 |
| 156917 | CEFBS_None, // VPMAXUBZ128rmk = 17184 |
| 156918 | CEFBS_None, // VPMAXUBZ128rmkz = 17185 |
| 156919 | CEFBS_None, // VPMAXUBZ128rr = 17186 |
| 156920 | CEFBS_None, // VPMAXUBZ128rrk = 17187 |
| 156921 | CEFBS_None, // VPMAXUBZ128rrkz = 17188 |
| 156922 | CEFBS_None, // VPMAXUBZ256rm = 17189 |
| 156923 | CEFBS_None, // VPMAXUBZ256rmk = 17190 |
| 156924 | CEFBS_None, // VPMAXUBZ256rmkz = 17191 |
| 156925 | CEFBS_None, // VPMAXUBZ256rr = 17192 |
| 156926 | CEFBS_None, // VPMAXUBZ256rrk = 17193 |
| 156927 | CEFBS_None, // VPMAXUBZ256rrkz = 17194 |
| 156928 | CEFBS_None, // VPMAXUBZrm = 17195 |
| 156929 | CEFBS_None, // VPMAXUBZrmk = 17196 |
| 156930 | CEFBS_None, // VPMAXUBZrmkz = 17197 |
| 156931 | CEFBS_None, // VPMAXUBZrr = 17198 |
| 156932 | CEFBS_None, // VPMAXUBZrrk = 17199 |
| 156933 | CEFBS_None, // VPMAXUBZrrkz = 17200 |
| 156934 | CEFBS_None, // VPMAXUBrm = 17201 |
| 156935 | CEFBS_None, // VPMAXUBrr = 17202 |
| 156936 | CEFBS_None, // VPMAXUDYrm = 17203 |
| 156937 | CEFBS_None, // VPMAXUDYrr = 17204 |
| 156938 | CEFBS_None, // VPMAXUDZ128rm = 17205 |
| 156939 | CEFBS_None, // VPMAXUDZ128rmb = 17206 |
| 156940 | CEFBS_None, // VPMAXUDZ128rmbk = 17207 |
| 156941 | CEFBS_None, // VPMAXUDZ128rmbkz = 17208 |
| 156942 | CEFBS_None, // VPMAXUDZ128rmk = 17209 |
| 156943 | CEFBS_None, // VPMAXUDZ128rmkz = 17210 |
| 156944 | CEFBS_None, // VPMAXUDZ128rr = 17211 |
| 156945 | CEFBS_None, // VPMAXUDZ128rrk = 17212 |
| 156946 | CEFBS_None, // VPMAXUDZ128rrkz = 17213 |
| 156947 | CEFBS_None, // VPMAXUDZ256rm = 17214 |
| 156948 | CEFBS_None, // VPMAXUDZ256rmb = 17215 |
| 156949 | CEFBS_None, // VPMAXUDZ256rmbk = 17216 |
| 156950 | CEFBS_None, // VPMAXUDZ256rmbkz = 17217 |
| 156951 | CEFBS_None, // VPMAXUDZ256rmk = 17218 |
| 156952 | CEFBS_None, // VPMAXUDZ256rmkz = 17219 |
| 156953 | CEFBS_None, // VPMAXUDZ256rr = 17220 |
| 156954 | CEFBS_None, // VPMAXUDZ256rrk = 17221 |
| 156955 | CEFBS_None, // VPMAXUDZ256rrkz = 17222 |
| 156956 | CEFBS_None, // VPMAXUDZrm = 17223 |
| 156957 | CEFBS_None, // VPMAXUDZrmb = 17224 |
| 156958 | CEFBS_None, // VPMAXUDZrmbk = 17225 |
| 156959 | CEFBS_None, // VPMAXUDZrmbkz = 17226 |
| 156960 | CEFBS_None, // VPMAXUDZrmk = 17227 |
| 156961 | CEFBS_None, // VPMAXUDZrmkz = 17228 |
| 156962 | CEFBS_None, // VPMAXUDZrr = 17229 |
| 156963 | CEFBS_None, // VPMAXUDZrrk = 17230 |
| 156964 | CEFBS_None, // VPMAXUDZrrkz = 17231 |
| 156965 | CEFBS_None, // VPMAXUDrm = 17232 |
| 156966 | CEFBS_None, // VPMAXUDrr = 17233 |
| 156967 | CEFBS_None, // VPMAXUQZ128rm = 17234 |
| 156968 | CEFBS_None, // VPMAXUQZ128rmb = 17235 |
| 156969 | CEFBS_None, // VPMAXUQZ128rmbk = 17236 |
| 156970 | CEFBS_None, // VPMAXUQZ128rmbkz = 17237 |
| 156971 | CEFBS_None, // VPMAXUQZ128rmk = 17238 |
| 156972 | CEFBS_None, // VPMAXUQZ128rmkz = 17239 |
| 156973 | CEFBS_None, // VPMAXUQZ128rr = 17240 |
| 156974 | CEFBS_None, // VPMAXUQZ128rrk = 17241 |
| 156975 | CEFBS_None, // VPMAXUQZ128rrkz = 17242 |
| 156976 | CEFBS_None, // VPMAXUQZ256rm = 17243 |
| 156977 | CEFBS_None, // VPMAXUQZ256rmb = 17244 |
| 156978 | CEFBS_None, // VPMAXUQZ256rmbk = 17245 |
| 156979 | CEFBS_None, // VPMAXUQZ256rmbkz = 17246 |
| 156980 | CEFBS_None, // VPMAXUQZ256rmk = 17247 |
| 156981 | CEFBS_None, // VPMAXUQZ256rmkz = 17248 |
| 156982 | CEFBS_None, // VPMAXUQZ256rr = 17249 |
| 156983 | CEFBS_None, // VPMAXUQZ256rrk = 17250 |
| 156984 | CEFBS_None, // VPMAXUQZ256rrkz = 17251 |
| 156985 | CEFBS_None, // VPMAXUQZrm = 17252 |
| 156986 | CEFBS_None, // VPMAXUQZrmb = 17253 |
| 156987 | CEFBS_None, // VPMAXUQZrmbk = 17254 |
| 156988 | CEFBS_None, // VPMAXUQZrmbkz = 17255 |
| 156989 | CEFBS_None, // VPMAXUQZrmk = 17256 |
| 156990 | CEFBS_None, // VPMAXUQZrmkz = 17257 |
| 156991 | CEFBS_None, // VPMAXUQZrr = 17258 |
| 156992 | CEFBS_None, // VPMAXUQZrrk = 17259 |
| 156993 | CEFBS_None, // VPMAXUQZrrkz = 17260 |
| 156994 | CEFBS_None, // VPMAXUWYrm = 17261 |
| 156995 | CEFBS_None, // VPMAXUWYrr = 17262 |
| 156996 | CEFBS_None, // VPMAXUWZ128rm = 17263 |
| 156997 | CEFBS_None, // VPMAXUWZ128rmk = 17264 |
| 156998 | CEFBS_None, // VPMAXUWZ128rmkz = 17265 |
| 156999 | CEFBS_None, // VPMAXUWZ128rr = 17266 |
| 157000 | CEFBS_None, // VPMAXUWZ128rrk = 17267 |
| 157001 | CEFBS_None, // VPMAXUWZ128rrkz = 17268 |
| 157002 | CEFBS_None, // VPMAXUWZ256rm = 17269 |
| 157003 | CEFBS_None, // VPMAXUWZ256rmk = 17270 |
| 157004 | CEFBS_None, // VPMAXUWZ256rmkz = 17271 |
| 157005 | CEFBS_None, // VPMAXUWZ256rr = 17272 |
| 157006 | CEFBS_None, // VPMAXUWZ256rrk = 17273 |
| 157007 | CEFBS_None, // VPMAXUWZ256rrkz = 17274 |
| 157008 | CEFBS_None, // VPMAXUWZrm = 17275 |
| 157009 | CEFBS_None, // VPMAXUWZrmk = 17276 |
| 157010 | CEFBS_None, // VPMAXUWZrmkz = 17277 |
| 157011 | CEFBS_None, // VPMAXUWZrr = 17278 |
| 157012 | CEFBS_None, // VPMAXUWZrrk = 17279 |
| 157013 | CEFBS_None, // VPMAXUWZrrkz = 17280 |
| 157014 | CEFBS_None, // VPMAXUWrm = 17281 |
| 157015 | CEFBS_None, // VPMAXUWrr = 17282 |
| 157016 | CEFBS_None, // VPMINSBYrm = 17283 |
| 157017 | CEFBS_None, // VPMINSBYrr = 17284 |
| 157018 | CEFBS_None, // VPMINSBZ128rm = 17285 |
| 157019 | CEFBS_None, // VPMINSBZ128rmk = 17286 |
| 157020 | CEFBS_None, // VPMINSBZ128rmkz = 17287 |
| 157021 | CEFBS_None, // VPMINSBZ128rr = 17288 |
| 157022 | CEFBS_None, // VPMINSBZ128rrk = 17289 |
| 157023 | CEFBS_None, // VPMINSBZ128rrkz = 17290 |
| 157024 | CEFBS_None, // VPMINSBZ256rm = 17291 |
| 157025 | CEFBS_None, // VPMINSBZ256rmk = 17292 |
| 157026 | CEFBS_None, // VPMINSBZ256rmkz = 17293 |
| 157027 | CEFBS_None, // VPMINSBZ256rr = 17294 |
| 157028 | CEFBS_None, // VPMINSBZ256rrk = 17295 |
| 157029 | CEFBS_None, // VPMINSBZ256rrkz = 17296 |
| 157030 | CEFBS_None, // VPMINSBZrm = 17297 |
| 157031 | CEFBS_None, // VPMINSBZrmk = 17298 |
| 157032 | CEFBS_None, // VPMINSBZrmkz = 17299 |
| 157033 | CEFBS_None, // VPMINSBZrr = 17300 |
| 157034 | CEFBS_None, // VPMINSBZrrk = 17301 |
| 157035 | CEFBS_None, // VPMINSBZrrkz = 17302 |
| 157036 | CEFBS_None, // VPMINSBrm = 17303 |
| 157037 | CEFBS_None, // VPMINSBrr = 17304 |
| 157038 | CEFBS_None, // VPMINSDYrm = 17305 |
| 157039 | CEFBS_None, // VPMINSDYrr = 17306 |
| 157040 | CEFBS_None, // VPMINSDZ128rm = 17307 |
| 157041 | CEFBS_None, // VPMINSDZ128rmb = 17308 |
| 157042 | CEFBS_None, // VPMINSDZ128rmbk = 17309 |
| 157043 | CEFBS_None, // VPMINSDZ128rmbkz = 17310 |
| 157044 | CEFBS_None, // VPMINSDZ128rmk = 17311 |
| 157045 | CEFBS_None, // VPMINSDZ128rmkz = 17312 |
| 157046 | CEFBS_None, // VPMINSDZ128rr = 17313 |
| 157047 | CEFBS_None, // VPMINSDZ128rrk = 17314 |
| 157048 | CEFBS_None, // VPMINSDZ128rrkz = 17315 |
| 157049 | CEFBS_None, // VPMINSDZ256rm = 17316 |
| 157050 | CEFBS_None, // VPMINSDZ256rmb = 17317 |
| 157051 | CEFBS_None, // VPMINSDZ256rmbk = 17318 |
| 157052 | CEFBS_None, // VPMINSDZ256rmbkz = 17319 |
| 157053 | CEFBS_None, // VPMINSDZ256rmk = 17320 |
| 157054 | CEFBS_None, // VPMINSDZ256rmkz = 17321 |
| 157055 | CEFBS_None, // VPMINSDZ256rr = 17322 |
| 157056 | CEFBS_None, // VPMINSDZ256rrk = 17323 |
| 157057 | CEFBS_None, // VPMINSDZ256rrkz = 17324 |
| 157058 | CEFBS_None, // VPMINSDZrm = 17325 |
| 157059 | CEFBS_None, // VPMINSDZrmb = 17326 |
| 157060 | CEFBS_None, // VPMINSDZrmbk = 17327 |
| 157061 | CEFBS_None, // VPMINSDZrmbkz = 17328 |
| 157062 | CEFBS_None, // VPMINSDZrmk = 17329 |
| 157063 | CEFBS_None, // VPMINSDZrmkz = 17330 |
| 157064 | CEFBS_None, // VPMINSDZrr = 17331 |
| 157065 | CEFBS_None, // VPMINSDZrrk = 17332 |
| 157066 | CEFBS_None, // VPMINSDZrrkz = 17333 |
| 157067 | CEFBS_None, // VPMINSDrm = 17334 |
| 157068 | CEFBS_None, // VPMINSDrr = 17335 |
| 157069 | CEFBS_None, // VPMINSQZ128rm = 17336 |
| 157070 | CEFBS_None, // VPMINSQZ128rmb = 17337 |
| 157071 | CEFBS_None, // VPMINSQZ128rmbk = 17338 |
| 157072 | CEFBS_None, // VPMINSQZ128rmbkz = 17339 |
| 157073 | CEFBS_None, // VPMINSQZ128rmk = 17340 |
| 157074 | CEFBS_None, // VPMINSQZ128rmkz = 17341 |
| 157075 | CEFBS_None, // VPMINSQZ128rr = 17342 |
| 157076 | CEFBS_None, // VPMINSQZ128rrk = 17343 |
| 157077 | CEFBS_None, // VPMINSQZ128rrkz = 17344 |
| 157078 | CEFBS_None, // VPMINSQZ256rm = 17345 |
| 157079 | CEFBS_None, // VPMINSQZ256rmb = 17346 |
| 157080 | CEFBS_None, // VPMINSQZ256rmbk = 17347 |
| 157081 | CEFBS_None, // VPMINSQZ256rmbkz = 17348 |
| 157082 | CEFBS_None, // VPMINSQZ256rmk = 17349 |
| 157083 | CEFBS_None, // VPMINSQZ256rmkz = 17350 |
| 157084 | CEFBS_None, // VPMINSQZ256rr = 17351 |
| 157085 | CEFBS_None, // VPMINSQZ256rrk = 17352 |
| 157086 | CEFBS_None, // VPMINSQZ256rrkz = 17353 |
| 157087 | CEFBS_None, // VPMINSQZrm = 17354 |
| 157088 | CEFBS_None, // VPMINSQZrmb = 17355 |
| 157089 | CEFBS_None, // VPMINSQZrmbk = 17356 |
| 157090 | CEFBS_None, // VPMINSQZrmbkz = 17357 |
| 157091 | CEFBS_None, // VPMINSQZrmk = 17358 |
| 157092 | CEFBS_None, // VPMINSQZrmkz = 17359 |
| 157093 | CEFBS_None, // VPMINSQZrr = 17360 |
| 157094 | CEFBS_None, // VPMINSQZrrk = 17361 |
| 157095 | CEFBS_None, // VPMINSQZrrkz = 17362 |
| 157096 | CEFBS_None, // VPMINSWYrm = 17363 |
| 157097 | CEFBS_None, // VPMINSWYrr = 17364 |
| 157098 | CEFBS_None, // VPMINSWZ128rm = 17365 |
| 157099 | CEFBS_None, // VPMINSWZ128rmk = 17366 |
| 157100 | CEFBS_None, // VPMINSWZ128rmkz = 17367 |
| 157101 | CEFBS_None, // VPMINSWZ128rr = 17368 |
| 157102 | CEFBS_None, // VPMINSWZ128rrk = 17369 |
| 157103 | CEFBS_None, // VPMINSWZ128rrkz = 17370 |
| 157104 | CEFBS_None, // VPMINSWZ256rm = 17371 |
| 157105 | CEFBS_None, // VPMINSWZ256rmk = 17372 |
| 157106 | CEFBS_None, // VPMINSWZ256rmkz = 17373 |
| 157107 | CEFBS_None, // VPMINSWZ256rr = 17374 |
| 157108 | CEFBS_None, // VPMINSWZ256rrk = 17375 |
| 157109 | CEFBS_None, // VPMINSWZ256rrkz = 17376 |
| 157110 | CEFBS_None, // VPMINSWZrm = 17377 |
| 157111 | CEFBS_None, // VPMINSWZrmk = 17378 |
| 157112 | CEFBS_None, // VPMINSWZrmkz = 17379 |
| 157113 | CEFBS_None, // VPMINSWZrr = 17380 |
| 157114 | CEFBS_None, // VPMINSWZrrk = 17381 |
| 157115 | CEFBS_None, // VPMINSWZrrkz = 17382 |
| 157116 | CEFBS_None, // VPMINSWrm = 17383 |
| 157117 | CEFBS_None, // VPMINSWrr = 17384 |
| 157118 | CEFBS_None, // VPMINUBYrm = 17385 |
| 157119 | CEFBS_None, // VPMINUBYrr = 17386 |
| 157120 | CEFBS_None, // VPMINUBZ128rm = 17387 |
| 157121 | CEFBS_None, // VPMINUBZ128rmk = 17388 |
| 157122 | CEFBS_None, // VPMINUBZ128rmkz = 17389 |
| 157123 | CEFBS_None, // VPMINUBZ128rr = 17390 |
| 157124 | CEFBS_None, // VPMINUBZ128rrk = 17391 |
| 157125 | CEFBS_None, // VPMINUBZ128rrkz = 17392 |
| 157126 | CEFBS_None, // VPMINUBZ256rm = 17393 |
| 157127 | CEFBS_None, // VPMINUBZ256rmk = 17394 |
| 157128 | CEFBS_None, // VPMINUBZ256rmkz = 17395 |
| 157129 | CEFBS_None, // VPMINUBZ256rr = 17396 |
| 157130 | CEFBS_None, // VPMINUBZ256rrk = 17397 |
| 157131 | CEFBS_None, // VPMINUBZ256rrkz = 17398 |
| 157132 | CEFBS_None, // VPMINUBZrm = 17399 |
| 157133 | CEFBS_None, // VPMINUBZrmk = 17400 |
| 157134 | CEFBS_None, // VPMINUBZrmkz = 17401 |
| 157135 | CEFBS_None, // VPMINUBZrr = 17402 |
| 157136 | CEFBS_None, // VPMINUBZrrk = 17403 |
| 157137 | CEFBS_None, // VPMINUBZrrkz = 17404 |
| 157138 | CEFBS_None, // VPMINUBrm = 17405 |
| 157139 | CEFBS_None, // VPMINUBrr = 17406 |
| 157140 | CEFBS_None, // VPMINUDYrm = 17407 |
| 157141 | CEFBS_None, // VPMINUDYrr = 17408 |
| 157142 | CEFBS_None, // VPMINUDZ128rm = 17409 |
| 157143 | CEFBS_None, // VPMINUDZ128rmb = 17410 |
| 157144 | CEFBS_None, // VPMINUDZ128rmbk = 17411 |
| 157145 | CEFBS_None, // VPMINUDZ128rmbkz = 17412 |
| 157146 | CEFBS_None, // VPMINUDZ128rmk = 17413 |
| 157147 | CEFBS_None, // VPMINUDZ128rmkz = 17414 |
| 157148 | CEFBS_None, // VPMINUDZ128rr = 17415 |
| 157149 | CEFBS_None, // VPMINUDZ128rrk = 17416 |
| 157150 | CEFBS_None, // VPMINUDZ128rrkz = 17417 |
| 157151 | CEFBS_None, // VPMINUDZ256rm = 17418 |
| 157152 | CEFBS_None, // VPMINUDZ256rmb = 17419 |
| 157153 | CEFBS_None, // VPMINUDZ256rmbk = 17420 |
| 157154 | CEFBS_None, // VPMINUDZ256rmbkz = 17421 |
| 157155 | CEFBS_None, // VPMINUDZ256rmk = 17422 |
| 157156 | CEFBS_None, // VPMINUDZ256rmkz = 17423 |
| 157157 | CEFBS_None, // VPMINUDZ256rr = 17424 |
| 157158 | CEFBS_None, // VPMINUDZ256rrk = 17425 |
| 157159 | CEFBS_None, // VPMINUDZ256rrkz = 17426 |
| 157160 | CEFBS_None, // VPMINUDZrm = 17427 |
| 157161 | CEFBS_None, // VPMINUDZrmb = 17428 |
| 157162 | CEFBS_None, // VPMINUDZrmbk = 17429 |
| 157163 | CEFBS_None, // VPMINUDZrmbkz = 17430 |
| 157164 | CEFBS_None, // VPMINUDZrmk = 17431 |
| 157165 | CEFBS_None, // VPMINUDZrmkz = 17432 |
| 157166 | CEFBS_None, // VPMINUDZrr = 17433 |
| 157167 | CEFBS_None, // VPMINUDZrrk = 17434 |
| 157168 | CEFBS_None, // VPMINUDZrrkz = 17435 |
| 157169 | CEFBS_None, // VPMINUDrm = 17436 |
| 157170 | CEFBS_None, // VPMINUDrr = 17437 |
| 157171 | CEFBS_None, // VPMINUQZ128rm = 17438 |
| 157172 | CEFBS_None, // VPMINUQZ128rmb = 17439 |
| 157173 | CEFBS_None, // VPMINUQZ128rmbk = 17440 |
| 157174 | CEFBS_None, // VPMINUQZ128rmbkz = 17441 |
| 157175 | CEFBS_None, // VPMINUQZ128rmk = 17442 |
| 157176 | CEFBS_None, // VPMINUQZ128rmkz = 17443 |
| 157177 | CEFBS_None, // VPMINUQZ128rr = 17444 |
| 157178 | CEFBS_None, // VPMINUQZ128rrk = 17445 |
| 157179 | CEFBS_None, // VPMINUQZ128rrkz = 17446 |
| 157180 | CEFBS_None, // VPMINUQZ256rm = 17447 |
| 157181 | CEFBS_None, // VPMINUQZ256rmb = 17448 |
| 157182 | CEFBS_None, // VPMINUQZ256rmbk = 17449 |
| 157183 | CEFBS_None, // VPMINUQZ256rmbkz = 17450 |
| 157184 | CEFBS_None, // VPMINUQZ256rmk = 17451 |
| 157185 | CEFBS_None, // VPMINUQZ256rmkz = 17452 |
| 157186 | CEFBS_None, // VPMINUQZ256rr = 17453 |
| 157187 | CEFBS_None, // VPMINUQZ256rrk = 17454 |
| 157188 | CEFBS_None, // VPMINUQZ256rrkz = 17455 |
| 157189 | CEFBS_None, // VPMINUQZrm = 17456 |
| 157190 | CEFBS_None, // VPMINUQZrmb = 17457 |
| 157191 | CEFBS_None, // VPMINUQZrmbk = 17458 |
| 157192 | CEFBS_None, // VPMINUQZrmbkz = 17459 |
| 157193 | CEFBS_None, // VPMINUQZrmk = 17460 |
| 157194 | CEFBS_None, // VPMINUQZrmkz = 17461 |
| 157195 | CEFBS_None, // VPMINUQZrr = 17462 |
| 157196 | CEFBS_None, // VPMINUQZrrk = 17463 |
| 157197 | CEFBS_None, // VPMINUQZrrkz = 17464 |
| 157198 | CEFBS_None, // VPMINUWYrm = 17465 |
| 157199 | CEFBS_None, // VPMINUWYrr = 17466 |
| 157200 | CEFBS_None, // VPMINUWZ128rm = 17467 |
| 157201 | CEFBS_None, // VPMINUWZ128rmk = 17468 |
| 157202 | CEFBS_None, // VPMINUWZ128rmkz = 17469 |
| 157203 | CEFBS_None, // VPMINUWZ128rr = 17470 |
| 157204 | CEFBS_None, // VPMINUWZ128rrk = 17471 |
| 157205 | CEFBS_None, // VPMINUWZ128rrkz = 17472 |
| 157206 | CEFBS_None, // VPMINUWZ256rm = 17473 |
| 157207 | CEFBS_None, // VPMINUWZ256rmk = 17474 |
| 157208 | CEFBS_None, // VPMINUWZ256rmkz = 17475 |
| 157209 | CEFBS_None, // VPMINUWZ256rr = 17476 |
| 157210 | CEFBS_None, // VPMINUWZ256rrk = 17477 |
| 157211 | CEFBS_None, // VPMINUWZ256rrkz = 17478 |
| 157212 | CEFBS_None, // VPMINUWZrm = 17479 |
| 157213 | CEFBS_None, // VPMINUWZrmk = 17480 |
| 157214 | CEFBS_None, // VPMINUWZrmkz = 17481 |
| 157215 | CEFBS_None, // VPMINUWZrr = 17482 |
| 157216 | CEFBS_None, // VPMINUWZrrk = 17483 |
| 157217 | CEFBS_None, // VPMINUWZrrkz = 17484 |
| 157218 | CEFBS_None, // VPMINUWrm = 17485 |
| 157219 | CEFBS_None, // VPMINUWrr = 17486 |
| 157220 | CEFBS_None, // VPMOVB2MZ128kr = 17487 |
| 157221 | CEFBS_None, // VPMOVB2MZ256kr = 17488 |
| 157222 | CEFBS_None, // VPMOVB2MZkr = 17489 |
| 157223 | CEFBS_None, // VPMOVD2MZ128kr = 17490 |
| 157224 | CEFBS_None, // VPMOVD2MZ256kr = 17491 |
| 157225 | CEFBS_None, // VPMOVD2MZkr = 17492 |
| 157226 | CEFBS_None, // VPMOVDBZ128mr = 17493 |
| 157227 | CEFBS_None, // VPMOVDBZ128mrk = 17494 |
| 157228 | CEFBS_None, // VPMOVDBZ128rr = 17495 |
| 157229 | CEFBS_None, // VPMOVDBZ128rrk = 17496 |
| 157230 | CEFBS_None, // VPMOVDBZ128rrkz = 17497 |
| 157231 | CEFBS_None, // VPMOVDBZ256mr = 17498 |
| 157232 | CEFBS_None, // VPMOVDBZ256mrk = 17499 |
| 157233 | CEFBS_None, // VPMOVDBZ256rr = 17500 |
| 157234 | CEFBS_None, // VPMOVDBZ256rrk = 17501 |
| 157235 | CEFBS_None, // VPMOVDBZ256rrkz = 17502 |
| 157236 | CEFBS_None, // VPMOVDBZmr = 17503 |
| 157237 | CEFBS_None, // VPMOVDBZmrk = 17504 |
| 157238 | CEFBS_None, // VPMOVDBZrr = 17505 |
| 157239 | CEFBS_None, // VPMOVDBZrrk = 17506 |
| 157240 | CEFBS_None, // VPMOVDBZrrkz = 17507 |
| 157241 | CEFBS_None, // VPMOVDWZ128mr = 17508 |
| 157242 | CEFBS_None, // VPMOVDWZ128mrk = 17509 |
| 157243 | CEFBS_None, // VPMOVDWZ128rr = 17510 |
| 157244 | CEFBS_None, // VPMOVDWZ128rrk = 17511 |
| 157245 | CEFBS_None, // VPMOVDWZ128rrkz = 17512 |
| 157246 | CEFBS_None, // VPMOVDWZ256mr = 17513 |
| 157247 | CEFBS_None, // VPMOVDWZ256mrk = 17514 |
| 157248 | CEFBS_None, // VPMOVDWZ256rr = 17515 |
| 157249 | CEFBS_None, // VPMOVDWZ256rrk = 17516 |
| 157250 | CEFBS_None, // VPMOVDWZ256rrkz = 17517 |
| 157251 | CEFBS_None, // VPMOVDWZmr = 17518 |
| 157252 | CEFBS_None, // VPMOVDWZmrk = 17519 |
| 157253 | CEFBS_None, // VPMOVDWZrr = 17520 |
| 157254 | CEFBS_None, // VPMOVDWZrrk = 17521 |
| 157255 | CEFBS_None, // VPMOVDWZrrkz = 17522 |
| 157256 | CEFBS_None, // VPMOVM2BZ128rk = 17523 |
| 157257 | CEFBS_None, // VPMOVM2BZ256rk = 17524 |
| 157258 | CEFBS_None, // VPMOVM2BZrk = 17525 |
| 157259 | CEFBS_None, // VPMOVM2DZ128rk = 17526 |
| 157260 | CEFBS_None, // VPMOVM2DZ256rk = 17527 |
| 157261 | CEFBS_None, // VPMOVM2DZrk = 17528 |
| 157262 | CEFBS_None, // VPMOVM2QZ128rk = 17529 |
| 157263 | CEFBS_None, // VPMOVM2QZ256rk = 17530 |
| 157264 | CEFBS_None, // VPMOVM2QZrk = 17531 |
| 157265 | CEFBS_None, // VPMOVM2WZ128rk = 17532 |
| 157266 | CEFBS_None, // VPMOVM2WZ256rk = 17533 |
| 157267 | CEFBS_None, // VPMOVM2WZrk = 17534 |
| 157268 | CEFBS_None, // VPMOVMSKBYrr = 17535 |
| 157269 | CEFBS_None, // VPMOVMSKBrr = 17536 |
| 157270 | CEFBS_None, // VPMOVQ2MZ128kr = 17537 |
| 157271 | CEFBS_None, // VPMOVQ2MZ256kr = 17538 |
| 157272 | CEFBS_None, // VPMOVQ2MZkr = 17539 |
| 157273 | CEFBS_None, // VPMOVQBZ128mr = 17540 |
| 157274 | CEFBS_None, // VPMOVQBZ128mrk = 17541 |
| 157275 | CEFBS_None, // VPMOVQBZ128rr = 17542 |
| 157276 | CEFBS_None, // VPMOVQBZ128rrk = 17543 |
| 157277 | CEFBS_None, // VPMOVQBZ128rrkz = 17544 |
| 157278 | CEFBS_None, // VPMOVQBZ256mr = 17545 |
| 157279 | CEFBS_None, // VPMOVQBZ256mrk = 17546 |
| 157280 | CEFBS_None, // VPMOVQBZ256rr = 17547 |
| 157281 | CEFBS_None, // VPMOVQBZ256rrk = 17548 |
| 157282 | CEFBS_None, // VPMOVQBZ256rrkz = 17549 |
| 157283 | CEFBS_None, // VPMOVQBZmr = 17550 |
| 157284 | CEFBS_None, // VPMOVQBZmrk = 17551 |
| 157285 | CEFBS_None, // VPMOVQBZrr = 17552 |
| 157286 | CEFBS_None, // VPMOVQBZrrk = 17553 |
| 157287 | CEFBS_None, // VPMOVQBZrrkz = 17554 |
| 157288 | CEFBS_None, // VPMOVQDZ128mr = 17555 |
| 157289 | CEFBS_None, // VPMOVQDZ128mrk = 17556 |
| 157290 | CEFBS_None, // VPMOVQDZ128rr = 17557 |
| 157291 | CEFBS_None, // VPMOVQDZ128rrk = 17558 |
| 157292 | CEFBS_None, // VPMOVQDZ128rrkz = 17559 |
| 157293 | CEFBS_None, // VPMOVQDZ256mr = 17560 |
| 157294 | CEFBS_None, // VPMOVQDZ256mrk = 17561 |
| 157295 | CEFBS_None, // VPMOVQDZ256rr = 17562 |
| 157296 | CEFBS_None, // VPMOVQDZ256rrk = 17563 |
| 157297 | CEFBS_None, // VPMOVQDZ256rrkz = 17564 |
| 157298 | CEFBS_None, // VPMOVQDZmr = 17565 |
| 157299 | CEFBS_None, // VPMOVQDZmrk = 17566 |
| 157300 | CEFBS_None, // VPMOVQDZrr = 17567 |
| 157301 | CEFBS_None, // VPMOVQDZrrk = 17568 |
| 157302 | CEFBS_None, // VPMOVQDZrrkz = 17569 |
| 157303 | CEFBS_None, // VPMOVQWZ128mr = 17570 |
| 157304 | CEFBS_None, // VPMOVQWZ128mrk = 17571 |
| 157305 | CEFBS_None, // VPMOVQWZ128rr = 17572 |
| 157306 | CEFBS_None, // VPMOVQWZ128rrk = 17573 |
| 157307 | CEFBS_None, // VPMOVQWZ128rrkz = 17574 |
| 157308 | CEFBS_None, // VPMOVQWZ256mr = 17575 |
| 157309 | CEFBS_None, // VPMOVQWZ256mrk = 17576 |
| 157310 | CEFBS_None, // VPMOVQWZ256rr = 17577 |
| 157311 | CEFBS_None, // VPMOVQWZ256rrk = 17578 |
| 157312 | CEFBS_None, // VPMOVQWZ256rrkz = 17579 |
| 157313 | CEFBS_None, // VPMOVQWZmr = 17580 |
| 157314 | CEFBS_None, // VPMOVQWZmrk = 17581 |
| 157315 | CEFBS_None, // VPMOVQWZrr = 17582 |
| 157316 | CEFBS_None, // VPMOVQWZrrk = 17583 |
| 157317 | CEFBS_None, // VPMOVQWZrrkz = 17584 |
| 157318 | CEFBS_None, // VPMOVSDBZ128mr = 17585 |
| 157319 | CEFBS_None, // VPMOVSDBZ128mrk = 17586 |
| 157320 | CEFBS_None, // VPMOVSDBZ128rr = 17587 |
| 157321 | CEFBS_None, // VPMOVSDBZ128rrk = 17588 |
| 157322 | CEFBS_None, // VPMOVSDBZ128rrkz = 17589 |
| 157323 | CEFBS_None, // VPMOVSDBZ256mr = 17590 |
| 157324 | CEFBS_None, // VPMOVSDBZ256mrk = 17591 |
| 157325 | CEFBS_None, // VPMOVSDBZ256rr = 17592 |
| 157326 | CEFBS_None, // VPMOVSDBZ256rrk = 17593 |
| 157327 | CEFBS_None, // VPMOVSDBZ256rrkz = 17594 |
| 157328 | CEFBS_None, // VPMOVSDBZmr = 17595 |
| 157329 | CEFBS_None, // VPMOVSDBZmrk = 17596 |
| 157330 | CEFBS_None, // VPMOVSDBZrr = 17597 |
| 157331 | CEFBS_None, // VPMOVSDBZrrk = 17598 |
| 157332 | CEFBS_None, // VPMOVSDBZrrkz = 17599 |
| 157333 | CEFBS_None, // VPMOVSDWZ128mr = 17600 |
| 157334 | CEFBS_None, // VPMOVSDWZ128mrk = 17601 |
| 157335 | CEFBS_None, // VPMOVSDWZ128rr = 17602 |
| 157336 | CEFBS_None, // VPMOVSDWZ128rrk = 17603 |
| 157337 | CEFBS_None, // VPMOVSDWZ128rrkz = 17604 |
| 157338 | CEFBS_None, // VPMOVSDWZ256mr = 17605 |
| 157339 | CEFBS_None, // VPMOVSDWZ256mrk = 17606 |
| 157340 | CEFBS_None, // VPMOVSDWZ256rr = 17607 |
| 157341 | CEFBS_None, // VPMOVSDWZ256rrk = 17608 |
| 157342 | CEFBS_None, // VPMOVSDWZ256rrkz = 17609 |
| 157343 | CEFBS_None, // VPMOVSDWZmr = 17610 |
| 157344 | CEFBS_None, // VPMOVSDWZmrk = 17611 |
| 157345 | CEFBS_None, // VPMOVSDWZrr = 17612 |
| 157346 | CEFBS_None, // VPMOVSDWZrrk = 17613 |
| 157347 | CEFBS_None, // VPMOVSDWZrrkz = 17614 |
| 157348 | CEFBS_None, // VPMOVSQBZ128mr = 17615 |
| 157349 | CEFBS_None, // VPMOVSQBZ128mrk = 17616 |
| 157350 | CEFBS_None, // VPMOVSQBZ128rr = 17617 |
| 157351 | CEFBS_None, // VPMOVSQBZ128rrk = 17618 |
| 157352 | CEFBS_None, // VPMOVSQBZ128rrkz = 17619 |
| 157353 | CEFBS_None, // VPMOVSQBZ256mr = 17620 |
| 157354 | CEFBS_None, // VPMOVSQBZ256mrk = 17621 |
| 157355 | CEFBS_None, // VPMOVSQBZ256rr = 17622 |
| 157356 | CEFBS_None, // VPMOVSQBZ256rrk = 17623 |
| 157357 | CEFBS_None, // VPMOVSQBZ256rrkz = 17624 |
| 157358 | CEFBS_None, // VPMOVSQBZmr = 17625 |
| 157359 | CEFBS_None, // VPMOVSQBZmrk = 17626 |
| 157360 | CEFBS_None, // VPMOVSQBZrr = 17627 |
| 157361 | CEFBS_None, // VPMOVSQBZrrk = 17628 |
| 157362 | CEFBS_None, // VPMOVSQBZrrkz = 17629 |
| 157363 | CEFBS_None, // VPMOVSQDZ128mr = 17630 |
| 157364 | CEFBS_None, // VPMOVSQDZ128mrk = 17631 |
| 157365 | CEFBS_None, // VPMOVSQDZ128rr = 17632 |
| 157366 | CEFBS_None, // VPMOVSQDZ128rrk = 17633 |
| 157367 | CEFBS_None, // VPMOVSQDZ128rrkz = 17634 |
| 157368 | CEFBS_None, // VPMOVSQDZ256mr = 17635 |
| 157369 | CEFBS_None, // VPMOVSQDZ256mrk = 17636 |
| 157370 | CEFBS_None, // VPMOVSQDZ256rr = 17637 |
| 157371 | CEFBS_None, // VPMOVSQDZ256rrk = 17638 |
| 157372 | CEFBS_None, // VPMOVSQDZ256rrkz = 17639 |
| 157373 | CEFBS_None, // VPMOVSQDZmr = 17640 |
| 157374 | CEFBS_None, // VPMOVSQDZmrk = 17641 |
| 157375 | CEFBS_None, // VPMOVSQDZrr = 17642 |
| 157376 | CEFBS_None, // VPMOVSQDZrrk = 17643 |
| 157377 | CEFBS_None, // VPMOVSQDZrrkz = 17644 |
| 157378 | CEFBS_None, // VPMOVSQWZ128mr = 17645 |
| 157379 | CEFBS_None, // VPMOVSQWZ128mrk = 17646 |
| 157380 | CEFBS_None, // VPMOVSQWZ128rr = 17647 |
| 157381 | CEFBS_None, // VPMOVSQWZ128rrk = 17648 |
| 157382 | CEFBS_None, // VPMOVSQWZ128rrkz = 17649 |
| 157383 | CEFBS_None, // VPMOVSQWZ256mr = 17650 |
| 157384 | CEFBS_None, // VPMOVSQWZ256mrk = 17651 |
| 157385 | CEFBS_None, // VPMOVSQWZ256rr = 17652 |
| 157386 | CEFBS_None, // VPMOVSQWZ256rrk = 17653 |
| 157387 | CEFBS_None, // VPMOVSQWZ256rrkz = 17654 |
| 157388 | CEFBS_None, // VPMOVSQWZmr = 17655 |
| 157389 | CEFBS_None, // VPMOVSQWZmrk = 17656 |
| 157390 | CEFBS_None, // VPMOVSQWZrr = 17657 |
| 157391 | CEFBS_None, // VPMOVSQWZrrk = 17658 |
| 157392 | CEFBS_None, // VPMOVSQWZrrkz = 17659 |
| 157393 | CEFBS_None, // VPMOVSWBZ128mr = 17660 |
| 157394 | CEFBS_None, // VPMOVSWBZ128mrk = 17661 |
| 157395 | CEFBS_None, // VPMOVSWBZ128rr = 17662 |
| 157396 | CEFBS_None, // VPMOVSWBZ128rrk = 17663 |
| 157397 | CEFBS_None, // VPMOVSWBZ128rrkz = 17664 |
| 157398 | CEFBS_None, // VPMOVSWBZ256mr = 17665 |
| 157399 | CEFBS_None, // VPMOVSWBZ256mrk = 17666 |
| 157400 | CEFBS_None, // VPMOVSWBZ256rr = 17667 |
| 157401 | CEFBS_None, // VPMOVSWBZ256rrk = 17668 |
| 157402 | CEFBS_None, // VPMOVSWBZ256rrkz = 17669 |
| 157403 | CEFBS_None, // VPMOVSWBZmr = 17670 |
| 157404 | CEFBS_None, // VPMOVSWBZmrk = 17671 |
| 157405 | CEFBS_None, // VPMOVSWBZrr = 17672 |
| 157406 | CEFBS_None, // VPMOVSWBZrrk = 17673 |
| 157407 | CEFBS_None, // VPMOVSWBZrrkz = 17674 |
| 157408 | CEFBS_None, // VPMOVSXBDYrm = 17675 |
| 157409 | CEFBS_None, // VPMOVSXBDYrr = 17676 |
| 157410 | CEFBS_None, // VPMOVSXBDZ128rm = 17677 |
| 157411 | CEFBS_None, // VPMOVSXBDZ128rmk = 17678 |
| 157412 | CEFBS_None, // VPMOVSXBDZ128rmkz = 17679 |
| 157413 | CEFBS_None, // VPMOVSXBDZ128rr = 17680 |
| 157414 | CEFBS_None, // VPMOVSXBDZ128rrk = 17681 |
| 157415 | CEFBS_None, // VPMOVSXBDZ128rrkz = 17682 |
| 157416 | CEFBS_None, // VPMOVSXBDZ256rm = 17683 |
| 157417 | CEFBS_None, // VPMOVSXBDZ256rmk = 17684 |
| 157418 | CEFBS_None, // VPMOVSXBDZ256rmkz = 17685 |
| 157419 | CEFBS_None, // VPMOVSXBDZ256rr = 17686 |
| 157420 | CEFBS_None, // VPMOVSXBDZ256rrk = 17687 |
| 157421 | CEFBS_None, // VPMOVSXBDZ256rrkz = 17688 |
| 157422 | CEFBS_None, // VPMOVSXBDZrm = 17689 |
| 157423 | CEFBS_None, // VPMOVSXBDZrmk = 17690 |
| 157424 | CEFBS_None, // VPMOVSXBDZrmkz = 17691 |
| 157425 | CEFBS_None, // VPMOVSXBDZrr = 17692 |
| 157426 | CEFBS_None, // VPMOVSXBDZrrk = 17693 |
| 157427 | CEFBS_None, // VPMOVSXBDZrrkz = 17694 |
| 157428 | CEFBS_None, // VPMOVSXBDrm = 17695 |
| 157429 | CEFBS_None, // VPMOVSXBDrr = 17696 |
| 157430 | CEFBS_None, // VPMOVSXBQYrm = 17697 |
| 157431 | CEFBS_None, // VPMOVSXBQYrr = 17698 |
| 157432 | CEFBS_None, // VPMOVSXBQZ128rm = 17699 |
| 157433 | CEFBS_None, // VPMOVSXBQZ128rmk = 17700 |
| 157434 | CEFBS_None, // VPMOVSXBQZ128rmkz = 17701 |
| 157435 | CEFBS_None, // VPMOVSXBQZ128rr = 17702 |
| 157436 | CEFBS_None, // VPMOVSXBQZ128rrk = 17703 |
| 157437 | CEFBS_None, // VPMOVSXBQZ128rrkz = 17704 |
| 157438 | CEFBS_None, // VPMOVSXBQZ256rm = 17705 |
| 157439 | CEFBS_None, // VPMOVSXBQZ256rmk = 17706 |
| 157440 | CEFBS_None, // VPMOVSXBQZ256rmkz = 17707 |
| 157441 | CEFBS_None, // VPMOVSXBQZ256rr = 17708 |
| 157442 | CEFBS_None, // VPMOVSXBQZ256rrk = 17709 |
| 157443 | CEFBS_None, // VPMOVSXBQZ256rrkz = 17710 |
| 157444 | CEFBS_None, // VPMOVSXBQZrm = 17711 |
| 157445 | CEFBS_None, // VPMOVSXBQZrmk = 17712 |
| 157446 | CEFBS_None, // VPMOVSXBQZrmkz = 17713 |
| 157447 | CEFBS_None, // VPMOVSXBQZrr = 17714 |
| 157448 | CEFBS_None, // VPMOVSXBQZrrk = 17715 |
| 157449 | CEFBS_None, // VPMOVSXBQZrrkz = 17716 |
| 157450 | CEFBS_None, // VPMOVSXBQrm = 17717 |
| 157451 | CEFBS_None, // VPMOVSXBQrr = 17718 |
| 157452 | CEFBS_None, // VPMOVSXBWYrm = 17719 |
| 157453 | CEFBS_None, // VPMOVSXBWYrr = 17720 |
| 157454 | CEFBS_None, // VPMOVSXBWZ128rm = 17721 |
| 157455 | CEFBS_None, // VPMOVSXBWZ128rmk = 17722 |
| 157456 | CEFBS_None, // VPMOVSXBWZ128rmkz = 17723 |
| 157457 | CEFBS_None, // VPMOVSXBWZ128rr = 17724 |
| 157458 | CEFBS_None, // VPMOVSXBWZ128rrk = 17725 |
| 157459 | CEFBS_None, // VPMOVSXBWZ128rrkz = 17726 |
| 157460 | CEFBS_None, // VPMOVSXBWZ256rm = 17727 |
| 157461 | CEFBS_None, // VPMOVSXBWZ256rmk = 17728 |
| 157462 | CEFBS_None, // VPMOVSXBWZ256rmkz = 17729 |
| 157463 | CEFBS_None, // VPMOVSXBWZ256rr = 17730 |
| 157464 | CEFBS_None, // VPMOVSXBWZ256rrk = 17731 |
| 157465 | CEFBS_None, // VPMOVSXBWZ256rrkz = 17732 |
| 157466 | CEFBS_None, // VPMOVSXBWZrm = 17733 |
| 157467 | CEFBS_None, // VPMOVSXBWZrmk = 17734 |
| 157468 | CEFBS_None, // VPMOVSXBWZrmkz = 17735 |
| 157469 | CEFBS_None, // VPMOVSXBWZrr = 17736 |
| 157470 | CEFBS_None, // VPMOVSXBWZrrk = 17737 |
| 157471 | CEFBS_None, // VPMOVSXBWZrrkz = 17738 |
| 157472 | CEFBS_None, // VPMOVSXBWrm = 17739 |
| 157473 | CEFBS_None, // VPMOVSXBWrr = 17740 |
| 157474 | CEFBS_None, // VPMOVSXDQYrm = 17741 |
| 157475 | CEFBS_None, // VPMOVSXDQYrr = 17742 |
| 157476 | CEFBS_None, // VPMOVSXDQZ128rm = 17743 |
| 157477 | CEFBS_None, // VPMOVSXDQZ128rmk = 17744 |
| 157478 | CEFBS_None, // VPMOVSXDQZ128rmkz = 17745 |
| 157479 | CEFBS_None, // VPMOVSXDQZ128rr = 17746 |
| 157480 | CEFBS_None, // VPMOVSXDQZ128rrk = 17747 |
| 157481 | CEFBS_None, // VPMOVSXDQZ128rrkz = 17748 |
| 157482 | CEFBS_None, // VPMOVSXDQZ256rm = 17749 |
| 157483 | CEFBS_None, // VPMOVSXDQZ256rmk = 17750 |
| 157484 | CEFBS_None, // VPMOVSXDQZ256rmkz = 17751 |
| 157485 | CEFBS_None, // VPMOVSXDQZ256rr = 17752 |
| 157486 | CEFBS_None, // VPMOVSXDQZ256rrk = 17753 |
| 157487 | CEFBS_None, // VPMOVSXDQZ256rrkz = 17754 |
| 157488 | CEFBS_None, // VPMOVSXDQZrm = 17755 |
| 157489 | CEFBS_None, // VPMOVSXDQZrmk = 17756 |
| 157490 | CEFBS_None, // VPMOVSXDQZrmkz = 17757 |
| 157491 | CEFBS_None, // VPMOVSXDQZrr = 17758 |
| 157492 | CEFBS_None, // VPMOVSXDQZrrk = 17759 |
| 157493 | CEFBS_None, // VPMOVSXDQZrrkz = 17760 |
| 157494 | CEFBS_None, // VPMOVSXDQrm = 17761 |
| 157495 | CEFBS_None, // VPMOVSXDQrr = 17762 |
| 157496 | CEFBS_None, // VPMOVSXWDYrm = 17763 |
| 157497 | CEFBS_None, // VPMOVSXWDYrr = 17764 |
| 157498 | CEFBS_None, // VPMOVSXWDZ128rm = 17765 |
| 157499 | CEFBS_None, // VPMOVSXWDZ128rmk = 17766 |
| 157500 | CEFBS_None, // VPMOVSXWDZ128rmkz = 17767 |
| 157501 | CEFBS_None, // VPMOVSXWDZ128rr = 17768 |
| 157502 | CEFBS_None, // VPMOVSXWDZ128rrk = 17769 |
| 157503 | CEFBS_None, // VPMOVSXWDZ128rrkz = 17770 |
| 157504 | CEFBS_None, // VPMOVSXWDZ256rm = 17771 |
| 157505 | CEFBS_None, // VPMOVSXWDZ256rmk = 17772 |
| 157506 | CEFBS_None, // VPMOVSXWDZ256rmkz = 17773 |
| 157507 | CEFBS_None, // VPMOVSXWDZ256rr = 17774 |
| 157508 | CEFBS_None, // VPMOVSXWDZ256rrk = 17775 |
| 157509 | CEFBS_None, // VPMOVSXWDZ256rrkz = 17776 |
| 157510 | CEFBS_None, // VPMOVSXWDZrm = 17777 |
| 157511 | CEFBS_None, // VPMOVSXWDZrmk = 17778 |
| 157512 | CEFBS_None, // VPMOVSXWDZrmkz = 17779 |
| 157513 | CEFBS_None, // VPMOVSXWDZrr = 17780 |
| 157514 | CEFBS_None, // VPMOVSXWDZrrk = 17781 |
| 157515 | CEFBS_None, // VPMOVSXWDZrrkz = 17782 |
| 157516 | CEFBS_None, // VPMOVSXWDrm = 17783 |
| 157517 | CEFBS_None, // VPMOVSXWDrr = 17784 |
| 157518 | CEFBS_None, // VPMOVSXWQYrm = 17785 |
| 157519 | CEFBS_None, // VPMOVSXWQYrr = 17786 |
| 157520 | CEFBS_None, // VPMOVSXWQZ128rm = 17787 |
| 157521 | CEFBS_None, // VPMOVSXWQZ128rmk = 17788 |
| 157522 | CEFBS_None, // VPMOVSXWQZ128rmkz = 17789 |
| 157523 | CEFBS_None, // VPMOVSXWQZ128rr = 17790 |
| 157524 | CEFBS_None, // VPMOVSXWQZ128rrk = 17791 |
| 157525 | CEFBS_None, // VPMOVSXWQZ128rrkz = 17792 |
| 157526 | CEFBS_None, // VPMOVSXWQZ256rm = 17793 |
| 157527 | CEFBS_None, // VPMOVSXWQZ256rmk = 17794 |
| 157528 | CEFBS_None, // VPMOVSXWQZ256rmkz = 17795 |
| 157529 | CEFBS_None, // VPMOVSXWQZ256rr = 17796 |
| 157530 | CEFBS_None, // VPMOVSXWQZ256rrk = 17797 |
| 157531 | CEFBS_None, // VPMOVSXWQZ256rrkz = 17798 |
| 157532 | CEFBS_None, // VPMOVSXWQZrm = 17799 |
| 157533 | CEFBS_None, // VPMOVSXWQZrmk = 17800 |
| 157534 | CEFBS_None, // VPMOVSXWQZrmkz = 17801 |
| 157535 | CEFBS_None, // VPMOVSXWQZrr = 17802 |
| 157536 | CEFBS_None, // VPMOVSXWQZrrk = 17803 |
| 157537 | CEFBS_None, // VPMOVSXWQZrrkz = 17804 |
| 157538 | CEFBS_None, // VPMOVSXWQrm = 17805 |
| 157539 | CEFBS_None, // VPMOVSXWQrr = 17806 |
| 157540 | CEFBS_None, // VPMOVUSDBZ128mr = 17807 |
| 157541 | CEFBS_None, // VPMOVUSDBZ128mrk = 17808 |
| 157542 | CEFBS_None, // VPMOVUSDBZ128rr = 17809 |
| 157543 | CEFBS_None, // VPMOVUSDBZ128rrk = 17810 |
| 157544 | CEFBS_None, // VPMOVUSDBZ128rrkz = 17811 |
| 157545 | CEFBS_None, // VPMOVUSDBZ256mr = 17812 |
| 157546 | CEFBS_None, // VPMOVUSDBZ256mrk = 17813 |
| 157547 | CEFBS_None, // VPMOVUSDBZ256rr = 17814 |
| 157548 | CEFBS_None, // VPMOVUSDBZ256rrk = 17815 |
| 157549 | CEFBS_None, // VPMOVUSDBZ256rrkz = 17816 |
| 157550 | CEFBS_None, // VPMOVUSDBZmr = 17817 |
| 157551 | CEFBS_None, // VPMOVUSDBZmrk = 17818 |
| 157552 | CEFBS_None, // VPMOVUSDBZrr = 17819 |
| 157553 | CEFBS_None, // VPMOVUSDBZrrk = 17820 |
| 157554 | CEFBS_None, // VPMOVUSDBZrrkz = 17821 |
| 157555 | CEFBS_None, // VPMOVUSDWZ128mr = 17822 |
| 157556 | CEFBS_None, // VPMOVUSDWZ128mrk = 17823 |
| 157557 | CEFBS_None, // VPMOVUSDWZ128rr = 17824 |
| 157558 | CEFBS_None, // VPMOVUSDWZ128rrk = 17825 |
| 157559 | CEFBS_None, // VPMOVUSDWZ128rrkz = 17826 |
| 157560 | CEFBS_None, // VPMOVUSDWZ256mr = 17827 |
| 157561 | CEFBS_None, // VPMOVUSDWZ256mrk = 17828 |
| 157562 | CEFBS_None, // VPMOVUSDWZ256rr = 17829 |
| 157563 | CEFBS_None, // VPMOVUSDWZ256rrk = 17830 |
| 157564 | CEFBS_None, // VPMOVUSDWZ256rrkz = 17831 |
| 157565 | CEFBS_None, // VPMOVUSDWZmr = 17832 |
| 157566 | CEFBS_None, // VPMOVUSDWZmrk = 17833 |
| 157567 | CEFBS_None, // VPMOVUSDWZrr = 17834 |
| 157568 | CEFBS_None, // VPMOVUSDWZrrk = 17835 |
| 157569 | CEFBS_None, // VPMOVUSDWZrrkz = 17836 |
| 157570 | CEFBS_None, // VPMOVUSQBZ128mr = 17837 |
| 157571 | CEFBS_None, // VPMOVUSQBZ128mrk = 17838 |
| 157572 | CEFBS_None, // VPMOVUSQBZ128rr = 17839 |
| 157573 | CEFBS_None, // VPMOVUSQBZ128rrk = 17840 |
| 157574 | CEFBS_None, // VPMOVUSQBZ128rrkz = 17841 |
| 157575 | CEFBS_None, // VPMOVUSQBZ256mr = 17842 |
| 157576 | CEFBS_None, // VPMOVUSQBZ256mrk = 17843 |
| 157577 | CEFBS_None, // VPMOVUSQBZ256rr = 17844 |
| 157578 | CEFBS_None, // VPMOVUSQBZ256rrk = 17845 |
| 157579 | CEFBS_None, // VPMOVUSQBZ256rrkz = 17846 |
| 157580 | CEFBS_None, // VPMOVUSQBZmr = 17847 |
| 157581 | CEFBS_None, // VPMOVUSQBZmrk = 17848 |
| 157582 | CEFBS_None, // VPMOVUSQBZrr = 17849 |
| 157583 | CEFBS_None, // VPMOVUSQBZrrk = 17850 |
| 157584 | CEFBS_None, // VPMOVUSQBZrrkz = 17851 |
| 157585 | CEFBS_None, // VPMOVUSQDZ128mr = 17852 |
| 157586 | CEFBS_None, // VPMOVUSQDZ128mrk = 17853 |
| 157587 | CEFBS_None, // VPMOVUSQDZ128rr = 17854 |
| 157588 | CEFBS_None, // VPMOVUSQDZ128rrk = 17855 |
| 157589 | CEFBS_None, // VPMOVUSQDZ128rrkz = 17856 |
| 157590 | CEFBS_None, // VPMOVUSQDZ256mr = 17857 |
| 157591 | CEFBS_None, // VPMOVUSQDZ256mrk = 17858 |
| 157592 | CEFBS_None, // VPMOVUSQDZ256rr = 17859 |
| 157593 | CEFBS_None, // VPMOVUSQDZ256rrk = 17860 |
| 157594 | CEFBS_None, // VPMOVUSQDZ256rrkz = 17861 |
| 157595 | CEFBS_None, // VPMOVUSQDZmr = 17862 |
| 157596 | CEFBS_None, // VPMOVUSQDZmrk = 17863 |
| 157597 | CEFBS_None, // VPMOVUSQDZrr = 17864 |
| 157598 | CEFBS_None, // VPMOVUSQDZrrk = 17865 |
| 157599 | CEFBS_None, // VPMOVUSQDZrrkz = 17866 |
| 157600 | CEFBS_None, // VPMOVUSQWZ128mr = 17867 |
| 157601 | CEFBS_None, // VPMOVUSQWZ128mrk = 17868 |
| 157602 | CEFBS_None, // VPMOVUSQWZ128rr = 17869 |
| 157603 | CEFBS_None, // VPMOVUSQWZ128rrk = 17870 |
| 157604 | CEFBS_None, // VPMOVUSQWZ128rrkz = 17871 |
| 157605 | CEFBS_None, // VPMOVUSQWZ256mr = 17872 |
| 157606 | CEFBS_None, // VPMOVUSQWZ256mrk = 17873 |
| 157607 | CEFBS_None, // VPMOVUSQWZ256rr = 17874 |
| 157608 | CEFBS_None, // VPMOVUSQWZ256rrk = 17875 |
| 157609 | CEFBS_None, // VPMOVUSQWZ256rrkz = 17876 |
| 157610 | CEFBS_None, // VPMOVUSQWZmr = 17877 |
| 157611 | CEFBS_None, // VPMOVUSQWZmrk = 17878 |
| 157612 | CEFBS_None, // VPMOVUSQWZrr = 17879 |
| 157613 | CEFBS_None, // VPMOVUSQWZrrk = 17880 |
| 157614 | CEFBS_None, // VPMOVUSQWZrrkz = 17881 |
| 157615 | CEFBS_None, // VPMOVUSWBZ128mr = 17882 |
| 157616 | CEFBS_None, // VPMOVUSWBZ128mrk = 17883 |
| 157617 | CEFBS_None, // VPMOVUSWBZ128rr = 17884 |
| 157618 | CEFBS_None, // VPMOVUSWBZ128rrk = 17885 |
| 157619 | CEFBS_None, // VPMOVUSWBZ128rrkz = 17886 |
| 157620 | CEFBS_None, // VPMOVUSWBZ256mr = 17887 |
| 157621 | CEFBS_None, // VPMOVUSWBZ256mrk = 17888 |
| 157622 | CEFBS_None, // VPMOVUSWBZ256rr = 17889 |
| 157623 | CEFBS_None, // VPMOVUSWBZ256rrk = 17890 |
| 157624 | CEFBS_None, // VPMOVUSWBZ256rrkz = 17891 |
| 157625 | CEFBS_None, // VPMOVUSWBZmr = 17892 |
| 157626 | CEFBS_None, // VPMOVUSWBZmrk = 17893 |
| 157627 | CEFBS_None, // VPMOVUSWBZrr = 17894 |
| 157628 | CEFBS_None, // VPMOVUSWBZrrk = 17895 |
| 157629 | CEFBS_None, // VPMOVUSWBZrrkz = 17896 |
| 157630 | CEFBS_None, // VPMOVW2MZ128kr = 17897 |
| 157631 | CEFBS_None, // VPMOVW2MZ256kr = 17898 |
| 157632 | CEFBS_None, // VPMOVW2MZkr = 17899 |
| 157633 | CEFBS_None, // VPMOVWBZ128mr = 17900 |
| 157634 | CEFBS_None, // VPMOVWBZ128mrk = 17901 |
| 157635 | CEFBS_None, // VPMOVWBZ128rr = 17902 |
| 157636 | CEFBS_None, // VPMOVWBZ128rrk = 17903 |
| 157637 | CEFBS_None, // VPMOVWBZ128rrkz = 17904 |
| 157638 | CEFBS_None, // VPMOVWBZ256mr = 17905 |
| 157639 | CEFBS_None, // VPMOVWBZ256mrk = 17906 |
| 157640 | CEFBS_None, // VPMOVWBZ256rr = 17907 |
| 157641 | CEFBS_None, // VPMOVWBZ256rrk = 17908 |
| 157642 | CEFBS_None, // VPMOVWBZ256rrkz = 17909 |
| 157643 | CEFBS_None, // VPMOVWBZmr = 17910 |
| 157644 | CEFBS_None, // VPMOVWBZmrk = 17911 |
| 157645 | CEFBS_None, // VPMOVWBZrr = 17912 |
| 157646 | CEFBS_None, // VPMOVWBZrrk = 17913 |
| 157647 | CEFBS_None, // VPMOVWBZrrkz = 17914 |
| 157648 | CEFBS_None, // VPMOVZXBDYrm = 17915 |
| 157649 | CEFBS_None, // VPMOVZXBDYrr = 17916 |
| 157650 | CEFBS_None, // VPMOVZXBDZ128rm = 17917 |
| 157651 | CEFBS_None, // VPMOVZXBDZ128rmk = 17918 |
| 157652 | CEFBS_None, // VPMOVZXBDZ128rmkz = 17919 |
| 157653 | CEFBS_None, // VPMOVZXBDZ128rr = 17920 |
| 157654 | CEFBS_None, // VPMOVZXBDZ128rrk = 17921 |
| 157655 | CEFBS_None, // VPMOVZXBDZ128rrkz = 17922 |
| 157656 | CEFBS_None, // VPMOVZXBDZ256rm = 17923 |
| 157657 | CEFBS_None, // VPMOVZXBDZ256rmk = 17924 |
| 157658 | CEFBS_None, // VPMOVZXBDZ256rmkz = 17925 |
| 157659 | CEFBS_None, // VPMOVZXBDZ256rr = 17926 |
| 157660 | CEFBS_None, // VPMOVZXBDZ256rrk = 17927 |
| 157661 | CEFBS_None, // VPMOVZXBDZ256rrkz = 17928 |
| 157662 | CEFBS_None, // VPMOVZXBDZrm = 17929 |
| 157663 | CEFBS_None, // VPMOVZXBDZrmk = 17930 |
| 157664 | CEFBS_None, // VPMOVZXBDZrmkz = 17931 |
| 157665 | CEFBS_None, // VPMOVZXBDZrr = 17932 |
| 157666 | CEFBS_None, // VPMOVZXBDZrrk = 17933 |
| 157667 | CEFBS_None, // VPMOVZXBDZrrkz = 17934 |
| 157668 | CEFBS_None, // VPMOVZXBDrm = 17935 |
| 157669 | CEFBS_None, // VPMOVZXBDrr = 17936 |
| 157670 | CEFBS_None, // VPMOVZXBQYrm = 17937 |
| 157671 | CEFBS_None, // VPMOVZXBQYrr = 17938 |
| 157672 | CEFBS_None, // VPMOVZXBQZ128rm = 17939 |
| 157673 | CEFBS_None, // VPMOVZXBQZ128rmk = 17940 |
| 157674 | CEFBS_None, // VPMOVZXBQZ128rmkz = 17941 |
| 157675 | CEFBS_None, // VPMOVZXBQZ128rr = 17942 |
| 157676 | CEFBS_None, // VPMOVZXBQZ128rrk = 17943 |
| 157677 | CEFBS_None, // VPMOVZXBQZ128rrkz = 17944 |
| 157678 | CEFBS_None, // VPMOVZXBQZ256rm = 17945 |
| 157679 | CEFBS_None, // VPMOVZXBQZ256rmk = 17946 |
| 157680 | CEFBS_None, // VPMOVZXBQZ256rmkz = 17947 |
| 157681 | CEFBS_None, // VPMOVZXBQZ256rr = 17948 |
| 157682 | CEFBS_None, // VPMOVZXBQZ256rrk = 17949 |
| 157683 | CEFBS_None, // VPMOVZXBQZ256rrkz = 17950 |
| 157684 | CEFBS_None, // VPMOVZXBQZrm = 17951 |
| 157685 | CEFBS_None, // VPMOVZXBQZrmk = 17952 |
| 157686 | CEFBS_None, // VPMOVZXBQZrmkz = 17953 |
| 157687 | CEFBS_None, // VPMOVZXBQZrr = 17954 |
| 157688 | CEFBS_None, // VPMOVZXBQZrrk = 17955 |
| 157689 | CEFBS_None, // VPMOVZXBQZrrkz = 17956 |
| 157690 | CEFBS_None, // VPMOVZXBQrm = 17957 |
| 157691 | CEFBS_None, // VPMOVZXBQrr = 17958 |
| 157692 | CEFBS_None, // VPMOVZXBWYrm = 17959 |
| 157693 | CEFBS_None, // VPMOVZXBWYrr = 17960 |
| 157694 | CEFBS_None, // VPMOVZXBWZ128rm = 17961 |
| 157695 | CEFBS_None, // VPMOVZXBWZ128rmk = 17962 |
| 157696 | CEFBS_None, // VPMOVZXBWZ128rmkz = 17963 |
| 157697 | CEFBS_None, // VPMOVZXBWZ128rr = 17964 |
| 157698 | CEFBS_None, // VPMOVZXBWZ128rrk = 17965 |
| 157699 | CEFBS_None, // VPMOVZXBWZ128rrkz = 17966 |
| 157700 | CEFBS_None, // VPMOVZXBWZ256rm = 17967 |
| 157701 | CEFBS_None, // VPMOVZXBWZ256rmk = 17968 |
| 157702 | CEFBS_None, // VPMOVZXBWZ256rmkz = 17969 |
| 157703 | CEFBS_None, // VPMOVZXBWZ256rr = 17970 |
| 157704 | CEFBS_None, // VPMOVZXBWZ256rrk = 17971 |
| 157705 | CEFBS_None, // VPMOVZXBWZ256rrkz = 17972 |
| 157706 | CEFBS_None, // VPMOVZXBWZrm = 17973 |
| 157707 | CEFBS_None, // VPMOVZXBWZrmk = 17974 |
| 157708 | CEFBS_None, // VPMOVZXBWZrmkz = 17975 |
| 157709 | CEFBS_None, // VPMOVZXBWZrr = 17976 |
| 157710 | CEFBS_None, // VPMOVZXBWZrrk = 17977 |
| 157711 | CEFBS_None, // VPMOVZXBWZrrkz = 17978 |
| 157712 | CEFBS_None, // VPMOVZXBWrm = 17979 |
| 157713 | CEFBS_None, // VPMOVZXBWrr = 17980 |
| 157714 | CEFBS_None, // VPMOVZXDQYrm = 17981 |
| 157715 | CEFBS_None, // VPMOVZXDQYrr = 17982 |
| 157716 | CEFBS_None, // VPMOVZXDQZ128rm = 17983 |
| 157717 | CEFBS_None, // VPMOVZXDQZ128rmk = 17984 |
| 157718 | CEFBS_None, // VPMOVZXDQZ128rmkz = 17985 |
| 157719 | CEFBS_None, // VPMOVZXDQZ128rr = 17986 |
| 157720 | CEFBS_None, // VPMOVZXDQZ128rrk = 17987 |
| 157721 | CEFBS_None, // VPMOVZXDQZ128rrkz = 17988 |
| 157722 | CEFBS_None, // VPMOVZXDQZ256rm = 17989 |
| 157723 | CEFBS_None, // VPMOVZXDQZ256rmk = 17990 |
| 157724 | CEFBS_None, // VPMOVZXDQZ256rmkz = 17991 |
| 157725 | CEFBS_None, // VPMOVZXDQZ256rr = 17992 |
| 157726 | CEFBS_None, // VPMOVZXDQZ256rrk = 17993 |
| 157727 | CEFBS_None, // VPMOVZXDQZ256rrkz = 17994 |
| 157728 | CEFBS_None, // VPMOVZXDQZrm = 17995 |
| 157729 | CEFBS_None, // VPMOVZXDQZrmk = 17996 |
| 157730 | CEFBS_None, // VPMOVZXDQZrmkz = 17997 |
| 157731 | CEFBS_None, // VPMOVZXDQZrr = 17998 |
| 157732 | CEFBS_None, // VPMOVZXDQZrrk = 17999 |
| 157733 | CEFBS_None, // VPMOVZXDQZrrkz = 18000 |
| 157734 | CEFBS_None, // VPMOVZXDQrm = 18001 |
| 157735 | CEFBS_None, // VPMOVZXDQrr = 18002 |
| 157736 | CEFBS_None, // VPMOVZXWDYrm = 18003 |
| 157737 | CEFBS_None, // VPMOVZXWDYrr = 18004 |
| 157738 | CEFBS_None, // VPMOVZXWDZ128rm = 18005 |
| 157739 | CEFBS_None, // VPMOVZXWDZ128rmk = 18006 |
| 157740 | CEFBS_None, // VPMOVZXWDZ128rmkz = 18007 |
| 157741 | CEFBS_None, // VPMOVZXWDZ128rr = 18008 |
| 157742 | CEFBS_None, // VPMOVZXWDZ128rrk = 18009 |
| 157743 | CEFBS_None, // VPMOVZXWDZ128rrkz = 18010 |
| 157744 | CEFBS_None, // VPMOVZXWDZ256rm = 18011 |
| 157745 | CEFBS_None, // VPMOVZXWDZ256rmk = 18012 |
| 157746 | CEFBS_None, // VPMOVZXWDZ256rmkz = 18013 |
| 157747 | CEFBS_None, // VPMOVZXWDZ256rr = 18014 |
| 157748 | CEFBS_None, // VPMOVZXWDZ256rrk = 18015 |
| 157749 | CEFBS_None, // VPMOVZXWDZ256rrkz = 18016 |
| 157750 | CEFBS_None, // VPMOVZXWDZrm = 18017 |
| 157751 | CEFBS_None, // VPMOVZXWDZrmk = 18018 |
| 157752 | CEFBS_None, // VPMOVZXWDZrmkz = 18019 |
| 157753 | CEFBS_None, // VPMOVZXWDZrr = 18020 |
| 157754 | CEFBS_None, // VPMOVZXWDZrrk = 18021 |
| 157755 | CEFBS_None, // VPMOVZXWDZrrkz = 18022 |
| 157756 | CEFBS_None, // VPMOVZXWDrm = 18023 |
| 157757 | CEFBS_None, // VPMOVZXWDrr = 18024 |
| 157758 | CEFBS_None, // VPMOVZXWQYrm = 18025 |
| 157759 | CEFBS_None, // VPMOVZXWQYrr = 18026 |
| 157760 | CEFBS_None, // VPMOVZXWQZ128rm = 18027 |
| 157761 | CEFBS_None, // VPMOVZXWQZ128rmk = 18028 |
| 157762 | CEFBS_None, // VPMOVZXWQZ128rmkz = 18029 |
| 157763 | CEFBS_None, // VPMOVZXWQZ128rr = 18030 |
| 157764 | CEFBS_None, // VPMOVZXWQZ128rrk = 18031 |
| 157765 | CEFBS_None, // VPMOVZXWQZ128rrkz = 18032 |
| 157766 | CEFBS_None, // VPMOVZXWQZ256rm = 18033 |
| 157767 | CEFBS_None, // VPMOVZXWQZ256rmk = 18034 |
| 157768 | CEFBS_None, // VPMOVZXWQZ256rmkz = 18035 |
| 157769 | CEFBS_None, // VPMOVZXWQZ256rr = 18036 |
| 157770 | CEFBS_None, // VPMOVZXWQZ256rrk = 18037 |
| 157771 | CEFBS_None, // VPMOVZXWQZ256rrkz = 18038 |
| 157772 | CEFBS_None, // VPMOVZXWQZrm = 18039 |
| 157773 | CEFBS_None, // VPMOVZXWQZrmk = 18040 |
| 157774 | CEFBS_None, // VPMOVZXWQZrmkz = 18041 |
| 157775 | CEFBS_None, // VPMOVZXWQZrr = 18042 |
| 157776 | CEFBS_None, // VPMOVZXWQZrrk = 18043 |
| 157777 | CEFBS_None, // VPMOVZXWQZrrkz = 18044 |
| 157778 | CEFBS_None, // VPMOVZXWQrm = 18045 |
| 157779 | CEFBS_None, // VPMOVZXWQrr = 18046 |
| 157780 | CEFBS_None, // VPMULDQYrm = 18047 |
| 157781 | CEFBS_None, // VPMULDQYrr = 18048 |
| 157782 | CEFBS_None, // VPMULDQZ128rm = 18049 |
| 157783 | CEFBS_None, // VPMULDQZ128rmb = 18050 |
| 157784 | CEFBS_None, // VPMULDQZ128rmbk = 18051 |
| 157785 | CEFBS_None, // VPMULDQZ128rmbkz = 18052 |
| 157786 | CEFBS_None, // VPMULDQZ128rmk = 18053 |
| 157787 | CEFBS_None, // VPMULDQZ128rmkz = 18054 |
| 157788 | CEFBS_None, // VPMULDQZ128rr = 18055 |
| 157789 | CEFBS_None, // VPMULDQZ128rrk = 18056 |
| 157790 | CEFBS_None, // VPMULDQZ128rrkz = 18057 |
| 157791 | CEFBS_None, // VPMULDQZ256rm = 18058 |
| 157792 | CEFBS_None, // VPMULDQZ256rmb = 18059 |
| 157793 | CEFBS_None, // VPMULDQZ256rmbk = 18060 |
| 157794 | CEFBS_None, // VPMULDQZ256rmbkz = 18061 |
| 157795 | CEFBS_None, // VPMULDQZ256rmk = 18062 |
| 157796 | CEFBS_None, // VPMULDQZ256rmkz = 18063 |
| 157797 | CEFBS_None, // VPMULDQZ256rr = 18064 |
| 157798 | CEFBS_None, // VPMULDQZ256rrk = 18065 |
| 157799 | CEFBS_None, // VPMULDQZ256rrkz = 18066 |
| 157800 | CEFBS_None, // VPMULDQZrm = 18067 |
| 157801 | CEFBS_None, // VPMULDQZrmb = 18068 |
| 157802 | CEFBS_None, // VPMULDQZrmbk = 18069 |
| 157803 | CEFBS_None, // VPMULDQZrmbkz = 18070 |
| 157804 | CEFBS_None, // VPMULDQZrmk = 18071 |
| 157805 | CEFBS_None, // VPMULDQZrmkz = 18072 |
| 157806 | CEFBS_None, // VPMULDQZrr = 18073 |
| 157807 | CEFBS_None, // VPMULDQZrrk = 18074 |
| 157808 | CEFBS_None, // VPMULDQZrrkz = 18075 |
| 157809 | CEFBS_None, // VPMULDQrm = 18076 |
| 157810 | CEFBS_None, // VPMULDQrr = 18077 |
| 157811 | CEFBS_None, // VPMULHRSWYrm = 18078 |
| 157812 | CEFBS_None, // VPMULHRSWYrr = 18079 |
| 157813 | CEFBS_None, // VPMULHRSWZ128rm = 18080 |
| 157814 | CEFBS_None, // VPMULHRSWZ128rmk = 18081 |
| 157815 | CEFBS_None, // VPMULHRSWZ128rmkz = 18082 |
| 157816 | CEFBS_None, // VPMULHRSWZ128rr = 18083 |
| 157817 | CEFBS_None, // VPMULHRSWZ128rrk = 18084 |
| 157818 | CEFBS_None, // VPMULHRSWZ128rrkz = 18085 |
| 157819 | CEFBS_None, // VPMULHRSWZ256rm = 18086 |
| 157820 | CEFBS_None, // VPMULHRSWZ256rmk = 18087 |
| 157821 | CEFBS_None, // VPMULHRSWZ256rmkz = 18088 |
| 157822 | CEFBS_None, // VPMULHRSWZ256rr = 18089 |
| 157823 | CEFBS_None, // VPMULHRSWZ256rrk = 18090 |
| 157824 | CEFBS_None, // VPMULHRSWZ256rrkz = 18091 |
| 157825 | CEFBS_None, // VPMULHRSWZrm = 18092 |
| 157826 | CEFBS_None, // VPMULHRSWZrmk = 18093 |
| 157827 | CEFBS_None, // VPMULHRSWZrmkz = 18094 |
| 157828 | CEFBS_None, // VPMULHRSWZrr = 18095 |
| 157829 | CEFBS_None, // VPMULHRSWZrrk = 18096 |
| 157830 | CEFBS_None, // VPMULHRSWZrrkz = 18097 |
| 157831 | CEFBS_None, // VPMULHRSWrm = 18098 |
| 157832 | CEFBS_None, // VPMULHRSWrr = 18099 |
| 157833 | CEFBS_None, // VPMULHUWYrm = 18100 |
| 157834 | CEFBS_None, // VPMULHUWYrr = 18101 |
| 157835 | CEFBS_None, // VPMULHUWZ128rm = 18102 |
| 157836 | CEFBS_None, // VPMULHUWZ128rmk = 18103 |
| 157837 | CEFBS_None, // VPMULHUWZ128rmkz = 18104 |
| 157838 | CEFBS_None, // VPMULHUWZ128rr = 18105 |
| 157839 | CEFBS_None, // VPMULHUWZ128rrk = 18106 |
| 157840 | CEFBS_None, // VPMULHUWZ128rrkz = 18107 |
| 157841 | CEFBS_None, // VPMULHUWZ256rm = 18108 |
| 157842 | CEFBS_None, // VPMULHUWZ256rmk = 18109 |
| 157843 | CEFBS_None, // VPMULHUWZ256rmkz = 18110 |
| 157844 | CEFBS_None, // VPMULHUWZ256rr = 18111 |
| 157845 | CEFBS_None, // VPMULHUWZ256rrk = 18112 |
| 157846 | CEFBS_None, // VPMULHUWZ256rrkz = 18113 |
| 157847 | CEFBS_None, // VPMULHUWZrm = 18114 |
| 157848 | CEFBS_None, // VPMULHUWZrmk = 18115 |
| 157849 | CEFBS_None, // VPMULHUWZrmkz = 18116 |
| 157850 | CEFBS_None, // VPMULHUWZrr = 18117 |
| 157851 | CEFBS_None, // VPMULHUWZrrk = 18118 |
| 157852 | CEFBS_None, // VPMULHUWZrrkz = 18119 |
| 157853 | CEFBS_None, // VPMULHUWrm = 18120 |
| 157854 | CEFBS_None, // VPMULHUWrr = 18121 |
| 157855 | CEFBS_None, // VPMULHWYrm = 18122 |
| 157856 | CEFBS_None, // VPMULHWYrr = 18123 |
| 157857 | CEFBS_None, // VPMULHWZ128rm = 18124 |
| 157858 | CEFBS_None, // VPMULHWZ128rmk = 18125 |
| 157859 | CEFBS_None, // VPMULHWZ128rmkz = 18126 |
| 157860 | CEFBS_None, // VPMULHWZ128rr = 18127 |
| 157861 | CEFBS_None, // VPMULHWZ128rrk = 18128 |
| 157862 | CEFBS_None, // VPMULHWZ128rrkz = 18129 |
| 157863 | CEFBS_None, // VPMULHWZ256rm = 18130 |
| 157864 | CEFBS_None, // VPMULHWZ256rmk = 18131 |
| 157865 | CEFBS_None, // VPMULHWZ256rmkz = 18132 |
| 157866 | CEFBS_None, // VPMULHWZ256rr = 18133 |
| 157867 | CEFBS_None, // VPMULHWZ256rrk = 18134 |
| 157868 | CEFBS_None, // VPMULHWZ256rrkz = 18135 |
| 157869 | CEFBS_None, // VPMULHWZrm = 18136 |
| 157870 | CEFBS_None, // VPMULHWZrmk = 18137 |
| 157871 | CEFBS_None, // VPMULHWZrmkz = 18138 |
| 157872 | CEFBS_None, // VPMULHWZrr = 18139 |
| 157873 | CEFBS_None, // VPMULHWZrrk = 18140 |
| 157874 | CEFBS_None, // VPMULHWZrrkz = 18141 |
| 157875 | CEFBS_None, // VPMULHWrm = 18142 |
| 157876 | CEFBS_None, // VPMULHWrr = 18143 |
| 157877 | CEFBS_None, // VPMULLDYrm = 18144 |
| 157878 | CEFBS_None, // VPMULLDYrr = 18145 |
| 157879 | CEFBS_None, // VPMULLDZ128rm = 18146 |
| 157880 | CEFBS_None, // VPMULLDZ128rmb = 18147 |
| 157881 | CEFBS_None, // VPMULLDZ128rmbk = 18148 |
| 157882 | CEFBS_None, // VPMULLDZ128rmbkz = 18149 |
| 157883 | CEFBS_None, // VPMULLDZ128rmk = 18150 |
| 157884 | CEFBS_None, // VPMULLDZ128rmkz = 18151 |
| 157885 | CEFBS_None, // VPMULLDZ128rr = 18152 |
| 157886 | CEFBS_None, // VPMULLDZ128rrk = 18153 |
| 157887 | CEFBS_None, // VPMULLDZ128rrkz = 18154 |
| 157888 | CEFBS_None, // VPMULLDZ256rm = 18155 |
| 157889 | CEFBS_None, // VPMULLDZ256rmb = 18156 |
| 157890 | CEFBS_None, // VPMULLDZ256rmbk = 18157 |
| 157891 | CEFBS_None, // VPMULLDZ256rmbkz = 18158 |
| 157892 | CEFBS_None, // VPMULLDZ256rmk = 18159 |
| 157893 | CEFBS_None, // VPMULLDZ256rmkz = 18160 |
| 157894 | CEFBS_None, // VPMULLDZ256rr = 18161 |
| 157895 | CEFBS_None, // VPMULLDZ256rrk = 18162 |
| 157896 | CEFBS_None, // VPMULLDZ256rrkz = 18163 |
| 157897 | CEFBS_None, // VPMULLDZrm = 18164 |
| 157898 | CEFBS_None, // VPMULLDZrmb = 18165 |
| 157899 | CEFBS_None, // VPMULLDZrmbk = 18166 |
| 157900 | CEFBS_None, // VPMULLDZrmbkz = 18167 |
| 157901 | CEFBS_None, // VPMULLDZrmk = 18168 |
| 157902 | CEFBS_None, // VPMULLDZrmkz = 18169 |
| 157903 | CEFBS_None, // VPMULLDZrr = 18170 |
| 157904 | CEFBS_None, // VPMULLDZrrk = 18171 |
| 157905 | CEFBS_None, // VPMULLDZrrkz = 18172 |
| 157906 | CEFBS_None, // VPMULLDrm = 18173 |
| 157907 | CEFBS_None, // VPMULLDrr = 18174 |
| 157908 | CEFBS_None, // VPMULLQZ128rm = 18175 |
| 157909 | CEFBS_None, // VPMULLQZ128rmb = 18176 |
| 157910 | CEFBS_None, // VPMULLQZ128rmbk = 18177 |
| 157911 | CEFBS_None, // VPMULLQZ128rmbkz = 18178 |
| 157912 | CEFBS_None, // VPMULLQZ128rmk = 18179 |
| 157913 | CEFBS_None, // VPMULLQZ128rmkz = 18180 |
| 157914 | CEFBS_None, // VPMULLQZ128rr = 18181 |
| 157915 | CEFBS_None, // VPMULLQZ128rrk = 18182 |
| 157916 | CEFBS_None, // VPMULLQZ128rrkz = 18183 |
| 157917 | CEFBS_None, // VPMULLQZ256rm = 18184 |
| 157918 | CEFBS_None, // VPMULLQZ256rmb = 18185 |
| 157919 | CEFBS_None, // VPMULLQZ256rmbk = 18186 |
| 157920 | CEFBS_None, // VPMULLQZ256rmbkz = 18187 |
| 157921 | CEFBS_None, // VPMULLQZ256rmk = 18188 |
| 157922 | CEFBS_None, // VPMULLQZ256rmkz = 18189 |
| 157923 | CEFBS_None, // VPMULLQZ256rr = 18190 |
| 157924 | CEFBS_None, // VPMULLQZ256rrk = 18191 |
| 157925 | CEFBS_None, // VPMULLQZ256rrkz = 18192 |
| 157926 | CEFBS_None, // VPMULLQZrm = 18193 |
| 157927 | CEFBS_None, // VPMULLQZrmb = 18194 |
| 157928 | CEFBS_None, // VPMULLQZrmbk = 18195 |
| 157929 | CEFBS_None, // VPMULLQZrmbkz = 18196 |
| 157930 | CEFBS_None, // VPMULLQZrmk = 18197 |
| 157931 | CEFBS_None, // VPMULLQZrmkz = 18198 |
| 157932 | CEFBS_None, // VPMULLQZrr = 18199 |
| 157933 | CEFBS_None, // VPMULLQZrrk = 18200 |
| 157934 | CEFBS_None, // VPMULLQZrrkz = 18201 |
| 157935 | CEFBS_None, // VPMULLWYrm = 18202 |
| 157936 | CEFBS_None, // VPMULLWYrr = 18203 |
| 157937 | CEFBS_None, // VPMULLWZ128rm = 18204 |
| 157938 | CEFBS_None, // VPMULLWZ128rmk = 18205 |
| 157939 | CEFBS_None, // VPMULLWZ128rmkz = 18206 |
| 157940 | CEFBS_None, // VPMULLWZ128rr = 18207 |
| 157941 | CEFBS_None, // VPMULLWZ128rrk = 18208 |
| 157942 | CEFBS_None, // VPMULLWZ128rrkz = 18209 |
| 157943 | CEFBS_None, // VPMULLWZ256rm = 18210 |
| 157944 | CEFBS_None, // VPMULLWZ256rmk = 18211 |
| 157945 | CEFBS_None, // VPMULLWZ256rmkz = 18212 |
| 157946 | CEFBS_None, // VPMULLWZ256rr = 18213 |
| 157947 | CEFBS_None, // VPMULLWZ256rrk = 18214 |
| 157948 | CEFBS_None, // VPMULLWZ256rrkz = 18215 |
| 157949 | CEFBS_None, // VPMULLWZrm = 18216 |
| 157950 | CEFBS_None, // VPMULLWZrmk = 18217 |
| 157951 | CEFBS_None, // VPMULLWZrmkz = 18218 |
| 157952 | CEFBS_None, // VPMULLWZrr = 18219 |
| 157953 | CEFBS_None, // VPMULLWZrrk = 18220 |
| 157954 | CEFBS_None, // VPMULLWZrrkz = 18221 |
| 157955 | CEFBS_None, // VPMULLWrm = 18222 |
| 157956 | CEFBS_None, // VPMULLWrr = 18223 |
| 157957 | CEFBS_None, // VPMULTISHIFTQBZ128rm = 18224 |
| 157958 | CEFBS_None, // VPMULTISHIFTQBZ128rmb = 18225 |
| 157959 | CEFBS_None, // VPMULTISHIFTQBZ128rmbk = 18226 |
| 157960 | CEFBS_None, // VPMULTISHIFTQBZ128rmbkz = 18227 |
| 157961 | CEFBS_None, // VPMULTISHIFTQBZ128rmk = 18228 |
| 157962 | CEFBS_None, // VPMULTISHIFTQBZ128rmkz = 18229 |
| 157963 | CEFBS_None, // VPMULTISHIFTQBZ128rr = 18230 |
| 157964 | CEFBS_None, // VPMULTISHIFTQBZ128rrk = 18231 |
| 157965 | CEFBS_None, // VPMULTISHIFTQBZ128rrkz = 18232 |
| 157966 | CEFBS_None, // VPMULTISHIFTQBZ256rm = 18233 |
| 157967 | CEFBS_None, // VPMULTISHIFTQBZ256rmb = 18234 |
| 157968 | CEFBS_None, // VPMULTISHIFTQBZ256rmbk = 18235 |
| 157969 | CEFBS_None, // VPMULTISHIFTQBZ256rmbkz = 18236 |
| 157970 | CEFBS_None, // VPMULTISHIFTQBZ256rmk = 18237 |
| 157971 | CEFBS_None, // VPMULTISHIFTQBZ256rmkz = 18238 |
| 157972 | CEFBS_None, // VPMULTISHIFTQBZ256rr = 18239 |
| 157973 | CEFBS_None, // VPMULTISHIFTQBZ256rrk = 18240 |
| 157974 | CEFBS_None, // VPMULTISHIFTQBZ256rrkz = 18241 |
| 157975 | CEFBS_None, // VPMULTISHIFTQBZrm = 18242 |
| 157976 | CEFBS_None, // VPMULTISHIFTQBZrmb = 18243 |
| 157977 | CEFBS_None, // VPMULTISHIFTQBZrmbk = 18244 |
| 157978 | CEFBS_None, // VPMULTISHIFTQBZrmbkz = 18245 |
| 157979 | CEFBS_None, // VPMULTISHIFTQBZrmk = 18246 |
| 157980 | CEFBS_None, // VPMULTISHIFTQBZrmkz = 18247 |
| 157981 | CEFBS_None, // VPMULTISHIFTQBZrr = 18248 |
| 157982 | CEFBS_None, // VPMULTISHIFTQBZrrk = 18249 |
| 157983 | CEFBS_None, // VPMULTISHIFTQBZrrkz = 18250 |
| 157984 | CEFBS_None, // VPMULUDQYrm = 18251 |
| 157985 | CEFBS_None, // VPMULUDQYrr = 18252 |
| 157986 | CEFBS_None, // VPMULUDQZ128rm = 18253 |
| 157987 | CEFBS_None, // VPMULUDQZ128rmb = 18254 |
| 157988 | CEFBS_None, // VPMULUDQZ128rmbk = 18255 |
| 157989 | CEFBS_None, // VPMULUDQZ128rmbkz = 18256 |
| 157990 | CEFBS_None, // VPMULUDQZ128rmk = 18257 |
| 157991 | CEFBS_None, // VPMULUDQZ128rmkz = 18258 |
| 157992 | CEFBS_None, // VPMULUDQZ128rr = 18259 |
| 157993 | CEFBS_None, // VPMULUDQZ128rrk = 18260 |
| 157994 | CEFBS_None, // VPMULUDQZ128rrkz = 18261 |
| 157995 | CEFBS_None, // VPMULUDQZ256rm = 18262 |
| 157996 | CEFBS_None, // VPMULUDQZ256rmb = 18263 |
| 157997 | CEFBS_None, // VPMULUDQZ256rmbk = 18264 |
| 157998 | CEFBS_None, // VPMULUDQZ256rmbkz = 18265 |
| 157999 | CEFBS_None, // VPMULUDQZ256rmk = 18266 |
| 158000 | CEFBS_None, // VPMULUDQZ256rmkz = 18267 |
| 158001 | CEFBS_None, // VPMULUDQZ256rr = 18268 |
| 158002 | CEFBS_None, // VPMULUDQZ256rrk = 18269 |
| 158003 | CEFBS_None, // VPMULUDQZ256rrkz = 18270 |
| 158004 | CEFBS_None, // VPMULUDQZrm = 18271 |
| 158005 | CEFBS_None, // VPMULUDQZrmb = 18272 |
| 158006 | CEFBS_None, // VPMULUDQZrmbk = 18273 |
| 158007 | CEFBS_None, // VPMULUDQZrmbkz = 18274 |
| 158008 | CEFBS_None, // VPMULUDQZrmk = 18275 |
| 158009 | CEFBS_None, // VPMULUDQZrmkz = 18276 |
| 158010 | CEFBS_None, // VPMULUDQZrr = 18277 |
| 158011 | CEFBS_None, // VPMULUDQZrrk = 18278 |
| 158012 | CEFBS_None, // VPMULUDQZrrkz = 18279 |
| 158013 | CEFBS_None, // VPMULUDQrm = 18280 |
| 158014 | CEFBS_None, // VPMULUDQrr = 18281 |
| 158015 | CEFBS_None, // VPOPCNTBZ128rm = 18282 |
| 158016 | CEFBS_None, // VPOPCNTBZ128rmk = 18283 |
| 158017 | CEFBS_None, // VPOPCNTBZ128rmkz = 18284 |
| 158018 | CEFBS_None, // VPOPCNTBZ128rr = 18285 |
| 158019 | CEFBS_None, // VPOPCNTBZ128rrk = 18286 |
| 158020 | CEFBS_None, // VPOPCNTBZ128rrkz = 18287 |
| 158021 | CEFBS_None, // VPOPCNTBZ256rm = 18288 |
| 158022 | CEFBS_None, // VPOPCNTBZ256rmk = 18289 |
| 158023 | CEFBS_None, // VPOPCNTBZ256rmkz = 18290 |
| 158024 | CEFBS_None, // VPOPCNTBZ256rr = 18291 |
| 158025 | CEFBS_None, // VPOPCNTBZ256rrk = 18292 |
| 158026 | CEFBS_None, // VPOPCNTBZ256rrkz = 18293 |
| 158027 | CEFBS_None, // VPOPCNTBZrm = 18294 |
| 158028 | CEFBS_None, // VPOPCNTBZrmk = 18295 |
| 158029 | CEFBS_None, // VPOPCNTBZrmkz = 18296 |
| 158030 | CEFBS_None, // VPOPCNTBZrr = 18297 |
| 158031 | CEFBS_None, // VPOPCNTBZrrk = 18298 |
| 158032 | CEFBS_None, // VPOPCNTBZrrkz = 18299 |
| 158033 | CEFBS_None, // VPOPCNTDZ128rm = 18300 |
| 158034 | CEFBS_None, // VPOPCNTDZ128rmb = 18301 |
| 158035 | CEFBS_None, // VPOPCNTDZ128rmbk = 18302 |
| 158036 | CEFBS_None, // VPOPCNTDZ128rmbkz = 18303 |
| 158037 | CEFBS_None, // VPOPCNTDZ128rmk = 18304 |
| 158038 | CEFBS_None, // VPOPCNTDZ128rmkz = 18305 |
| 158039 | CEFBS_None, // VPOPCNTDZ128rr = 18306 |
| 158040 | CEFBS_None, // VPOPCNTDZ128rrk = 18307 |
| 158041 | CEFBS_None, // VPOPCNTDZ128rrkz = 18308 |
| 158042 | CEFBS_None, // VPOPCNTDZ256rm = 18309 |
| 158043 | CEFBS_None, // VPOPCNTDZ256rmb = 18310 |
| 158044 | CEFBS_None, // VPOPCNTDZ256rmbk = 18311 |
| 158045 | CEFBS_None, // VPOPCNTDZ256rmbkz = 18312 |
| 158046 | CEFBS_None, // VPOPCNTDZ256rmk = 18313 |
| 158047 | CEFBS_None, // VPOPCNTDZ256rmkz = 18314 |
| 158048 | CEFBS_None, // VPOPCNTDZ256rr = 18315 |
| 158049 | CEFBS_None, // VPOPCNTDZ256rrk = 18316 |
| 158050 | CEFBS_None, // VPOPCNTDZ256rrkz = 18317 |
| 158051 | CEFBS_None, // VPOPCNTDZrm = 18318 |
| 158052 | CEFBS_None, // VPOPCNTDZrmb = 18319 |
| 158053 | CEFBS_None, // VPOPCNTDZrmbk = 18320 |
| 158054 | CEFBS_None, // VPOPCNTDZrmbkz = 18321 |
| 158055 | CEFBS_None, // VPOPCNTDZrmk = 18322 |
| 158056 | CEFBS_None, // VPOPCNTDZrmkz = 18323 |
| 158057 | CEFBS_None, // VPOPCNTDZrr = 18324 |
| 158058 | CEFBS_None, // VPOPCNTDZrrk = 18325 |
| 158059 | CEFBS_None, // VPOPCNTDZrrkz = 18326 |
| 158060 | CEFBS_None, // VPOPCNTQZ128rm = 18327 |
| 158061 | CEFBS_None, // VPOPCNTQZ128rmb = 18328 |
| 158062 | CEFBS_None, // VPOPCNTQZ128rmbk = 18329 |
| 158063 | CEFBS_None, // VPOPCNTQZ128rmbkz = 18330 |
| 158064 | CEFBS_None, // VPOPCNTQZ128rmk = 18331 |
| 158065 | CEFBS_None, // VPOPCNTQZ128rmkz = 18332 |
| 158066 | CEFBS_None, // VPOPCNTQZ128rr = 18333 |
| 158067 | CEFBS_None, // VPOPCNTQZ128rrk = 18334 |
| 158068 | CEFBS_None, // VPOPCNTQZ128rrkz = 18335 |
| 158069 | CEFBS_None, // VPOPCNTQZ256rm = 18336 |
| 158070 | CEFBS_None, // VPOPCNTQZ256rmb = 18337 |
| 158071 | CEFBS_None, // VPOPCNTQZ256rmbk = 18338 |
| 158072 | CEFBS_None, // VPOPCNTQZ256rmbkz = 18339 |
| 158073 | CEFBS_None, // VPOPCNTQZ256rmk = 18340 |
| 158074 | CEFBS_None, // VPOPCNTQZ256rmkz = 18341 |
| 158075 | CEFBS_None, // VPOPCNTQZ256rr = 18342 |
| 158076 | CEFBS_None, // VPOPCNTQZ256rrk = 18343 |
| 158077 | CEFBS_None, // VPOPCNTQZ256rrkz = 18344 |
| 158078 | CEFBS_None, // VPOPCNTQZrm = 18345 |
| 158079 | CEFBS_None, // VPOPCNTQZrmb = 18346 |
| 158080 | CEFBS_None, // VPOPCNTQZrmbk = 18347 |
| 158081 | CEFBS_None, // VPOPCNTQZrmbkz = 18348 |
| 158082 | CEFBS_None, // VPOPCNTQZrmk = 18349 |
| 158083 | CEFBS_None, // VPOPCNTQZrmkz = 18350 |
| 158084 | CEFBS_None, // VPOPCNTQZrr = 18351 |
| 158085 | CEFBS_None, // VPOPCNTQZrrk = 18352 |
| 158086 | CEFBS_None, // VPOPCNTQZrrkz = 18353 |
| 158087 | CEFBS_None, // VPOPCNTWZ128rm = 18354 |
| 158088 | CEFBS_None, // VPOPCNTWZ128rmk = 18355 |
| 158089 | CEFBS_None, // VPOPCNTWZ128rmkz = 18356 |
| 158090 | CEFBS_None, // VPOPCNTWZ128rr = 18357 |
| 158091 | CEFBS_None, // VPOPCNTWZ128rrk = 18358 |
| 158092 | CEFBS_None, // VPOPCNTWZ128rrkz = 18359 |
| 158093 | CEFBS_None, // VPOPCNTWZ256rm = 18360 |
| 158094 | CEFBS_None, // VPOPCNTWZ256rmk = 18361 |
| 158095 | CEFBS_None, // VPOPCNTWZ256rmkz = 18362 |
| 158096 | CEFBS_None, // VPOPCNTWZ256rr = 18363 |
| 158097 | CEFBS_None, // VPOPCNTWZ256rrk = 18364 |
| 158098 | CEFBS_None, // VPOPCNTWZ256rrkz = 18365 |
| 158099 | CEFBS_None, // VPOPCNTWZrm = 18366 |
| 158100 | CEFBS_None, // VPOPCNTWZrmk = 18367 |
| 158101 | CEFBS_None, // VPOPCNTWZrmkz = 18368 |
| 158102 | CEFBS_None, // VPOPCNTWZrr = 18369 |
| 158103 | CEFBS_None, // VPOPCNTWZrrk = 18370 |
| 158104 | CEFBS_None, // VPOPCNTWZrrkz = 18371 |
| 158105 | CEFBS_None, // VPORDZ128rm = 18372 |
| 158106 | CEFBS_None, // VPORDZ128rmb = 18373 |
| 158107 | CEFBS_None, // VPORDZ128rmbk = 18374 |
| 158108 | CEFBS_None, // VPORDZ128rmbkz = 18375 |
| 158109 | CEFBS_None, // VPORDZ128rmk = 18376 |
| 158110 | CEFBS_None, // VPORDZ128rmkz = 18377 |
| 158111 | CEFBS_None, // VPORDZ128rr = 18378 |
| 158112 | CEFBS_None, // VPORDZ128rrk = 18379 |
| 158113 | CEFBS_None, // VPORDZ128rrkz = 18380 |
| 158114 | CEFBS_None, // VPORDZ256rm = 18381 |
| 158115 | CEFBS_None, // VPORDZ256rmb = 18382 |
| 158116 | CEFBS_None, // VPORDZ256rmbk = 18383 |
| 158117 | CEFBS_None, // VPORDZ256rmbkz = 18384 |
| 158118 | CEFBS_None, // VPORDZ256rmk = 18385 |
| 158119 | CEFBS_None, // VPORDZ256rmkz = 18386 |
| 158120 | CEFBS_None, // VPORDZ256rr = 18387 |
| 158121 | CEFBS_None, // VPORDZ256rrk = 18388 |
| 158122 | CEFBS_None, // VPORDZ256rrkz = 18389 |
| 158123 | CEFBS_None, // VPORDZrm = 18390 |
| 158124 | CEFBS_None, // VPORDZrmb = 18391 |
| 158125 | CEFBS_None, // VPORDZrmbk = 18392 |
| 158126 | CEFBS_None, // VPORDZrmbkz = 18393 |
| 158127 | CEFBS_None, // VPORDZrmk = 18394 |
| 158128 | CEFBS_None, // VPORDZrmkz = 18395 |
| 158129 | CEFBS_None, // VPORDZrr = 18396 |
| 158130 | CEFBS_None, // VPORDZrrk = 18397 |
| 158131 | CEFBS_None, // VPORDZrrkz = 18398 |
| 158132 | CEFBS_None, // VPORQZ128rm = 18399 |
| 158133 | CEFBS_None, // VPORQZ128rmb = 18400 |
| 158134 | CEFBS_None, // VPORQZ128rmbk = 18401 |
| 158135 | CEFBS_None, // VPORQZ128rmbkz = 18402 |
| 158136 | CEFBS_None, // VPORQZ128rmk = 18403 |
| 158137 | CEFBS_None, // VPORQZ128rmkz = 18404 |
| 158138 | CEFBS_None, // VPORQZ128rr = 18405 |
| 158139 | CEFBS_None, // VPORQZ128rrk = 18406 |
| 158140 | CEFBS_None, // VPORQZ128rrkz = 18407 |
| 158141 | CEFBS_None, // VPORQZ256rm = 18408 |
| 158142 | CEFBS_None, // VPORQZ256rmb = 18409 |
| 158143 | CEFBS_None, // VPORQZ256rmbk = 18410 |
| 158144 | CEFBS_None, // VPORQZ256rmbkz = 18411 |
| 158145 | CEFBS_None, // VPORQZ256rmk = 18412 |
| 158146 | CEFBS_None, // VPORQZ256rmkz = 18413 |
| 158147 | CEFBS_None, // VPORQZ256rr = 18414 |
| 158148 | CEFBS_None, // VPORQZ256rrk = 18415 |
| 158149 | CEFBS_None, // VPORQZ256rrkz = 18416 |
| 158150 | CEFBS_None, // VPORQZrm = 18417 |
| 158151 | CEFBS_None, // VPORQZrmb = 18418 |
| 158152 | CEFBS_None, // VPORQZrmbk = 18419 |
| 158153 | CEFBS_None, // VPORQZrmbkz = 18420 |
| 158154 | CEFBS_None, // VPORQZrmk = 18421 |
| 158155 | CEFBS_None, // VPORQZrmkz = 18422 |
| 158156 | CEFBS_None, // VPORQZrr = 18423 |
| 158157 | CEFBS_None, // VPORQZrrk = 18424 |
| 158158 | CEFBS_None, // VPORQZrrkz = 18425 |
| 158159 | CEFBS_None, // VPORYrm = 18426 |
| 158160 | CEFBS_None, // VPORYrr = 18427 |
| 158161 | CEFBS_None, // VPORrm = 18428 |
| 158162 | CEFBS_None, // VPORrr = 18429 |
| 158163 | CEFBS_None, // VPPERMrmr = 18430 |
| 158164 | CEFBS_None, // VPPERMrrm = 18431 |
| 158165 | CEFBS_None, // VPPERMrrr = 18432 |
| 158166 | CEFBS_None, // VPPERMrrr_REV = 18433 |
| 158167 | CEFBS_None, // VPROLDZ128mbi = 18434 |
| 158168 | CEFBS_None, // VPROLDZ128mbik = 18435 |
| 158169 | CEFBS_None, // VPROLDZ128mbikz = 18436 |
| 158170 | CEFBS_None, // VPROLDZ128mi = 18437 |
| 158171 | CEFBS_None, // VPROLDZ128mik = 18438 |
| 158172 | CEFBS_None, // VPROLDZ128mikz = 18439 |
| 158173 | CEFBS_None, // VPROLDZ128ri = 18440 |
| 158174 | CEFBS_None, // VPROLDZ128rik = 18441 |
| 158175 | CEFBS_None, // VPROLDZ128rikz = 18442 |
| 158176 | CEFBS_None, // VPROLDZ256mbi = 18443 |
| 158177 | CEFBS_None, // VPROLDZ256mbik = 18444 |
| 158178 | CEFBS_None, // VPROLDZ256mbikz = 18445 |
| 158179 | CEFBS_None, // VPROLDZ256mi = 18446 |
| 158180 | CEFBS_None, // VPROLDZ256mik = 18447 |
| 158181 | CEFBS_None, // VPROLDZ256mikz = 18448 |
| 158182 | CEFBS_None, // VPROLDZ256ri = 18449 |
| 158183 | CEFBS_None, // VPROLDZ256rik = 18450 |
| 158184 | CEFBS_None, // VPROLDZ256rikz = 18451 |
| 158185 | CEFBS_None, // VPROLDZmbi = 18452 |
| 158186 | CEFBS_None, // VPROLDZmbik = 18453 |
| 158187 | CEFBS_None, // VPROLDZmbikz = 18454 |
| 158188 | CEFBS_None, // VPROLDZmi = 18455 |
| 158189 | CEFBS_None, // VPROLDZmik = 18456 |
| 158190 | CEFBS_None, // VPROLDZmikz = 18457 |
| 158191 | CEFBS_None, // VPROLDZri = 18458 |
| 158192 | CEFBS_None, // VPROLDZrik = 18459 |
| 158193 | CEFBS_None, // VPROLDZrikz = 18460 |
| 158194 | CEFBS_None, // VPROLQZ128mbi = 18461 |
| 158195 | CEFBS_None, // VPROLQZ128mbik = 18462 |
| 158196 | CEFBS_None, // VPROLQZ128mbikz = 18463 |
| 158197 | CEFBS_None, // VPROLQZ128mi = 18464 |
| 158198 | CEFBS_None, // VPROLQZ128mik = 18465 |
| 158199 | CEFBS_None, // VPROLQZ128mikz = 18466 |
| 158200 | CEFBS_None, // VPROLQZ128ri = 18467 |
| 158201 | CEFBS_None, // VPROLQZ128rik = 18468 |
| 158202 | CEFBS_None, // VPROLQZ128rikz = 18469 |
| 158203 | CEFBS_None, // VPROLQZ256mbi = 18470 |
| 158204 | CEFBS_None, // VPROLQZ256mbik = 18471 |
| 158205 | CEFBS_None, // VPROLQZ256mbikz = 18472 |
| 158206 | CEFBS_None, // VPROLQZ256mi = 18473 |
| 158207 | CEFBS_None, // VPROLQZ256mik = 18474 |
| 158208 | CEFBS_None, // VPROLQZ256mikz = 18475 |
| 158209 | CEFBS_None, // VPROLQZ256ri = 18476 |
| 158210 | CEFBS_None, // VPROLQZ256rik = 18477 |
| 158211 | CEFBS_None, // VPROLQZ256rikz = 18478 |
| 158212 | CEFBS_None, // VPROLQZmbi = 18479 |
| 158213 | CEFBS_None, // VPROLQZmbik = 18480 |
| 158214 | CEFBS_None, // VPROLQZmbikz = 18481 |
| 158215 | CEFBS_None, // VPROLQZmi = 18482 |
| 158216 | CEFBS_None, // VPROLQZmik = 18483 |
| 158217 | CEFBS_None, // VPROLQZmikz = 18484 |
| 158218 | CEFBS_None, // VPROLQZri = 18485 |
| 158219 | CEFBS_None, // VPROLQZrik = 18486 |
| 158220 | CEFBS_None, // VPROLQZrikz = 18487 |
| 158221 | CEFBS_None, // VPROLVDZ128rm = 18488 |
| 158222 | CEFBS_None, // VPROLVDZ128rmb = 18489 |
| 158223 | CEFBS_None, // VPROLVDZ128rmbk = 18490 |
| 158224 | CEFBS_None, // VPROLVDZ128rmbkz = 18491 |
| 158225 | CEFBS_None, // VPROLVDZ128rmk = 18492 |
| 158226 | CEFBS_None, // VPROLVDZ128rmkz = 18493 |
| 158227 | CEFBS_None, // VPROLVDZ128rr = 18494 |
| 158228 | CEFBS_None, // VPROLVDZ128rrk = 18495 |
| 158229 | CEFBS_None, // VPROLVDZ128rrkz = 18496 |
| 158230 | CEFBS_None, // VPROLVDZ256rm = 18497 |
| 158231 | CEFBS_None, // VPROLVDZ256rmb = 18498 |
| 158232 | CEFBS_None, // VPROLVDZ256rmbk = 18499 |
| 158233 | CEFBS_None, // VPROLVDZ256rmbkz = 18500 |
| 158234 | CEFBS_None, // VPROLVDZ256rmk = 18501 |
| 158235 | CEFBS_None, // VPROLVDZ256rmkz = 18502 |
| 158236 | CEFBS_None, // VPROLVDZ256rr = 18503 |
| 158237 | CEFBS_None, // VPROLVDZ256rrk = 18504 |
| 158238 | CEFBS_None, // VPROLVDZ256rrkz = 18505 |
| 158239 | CEFBS_None, // VPROLVDZrm = 18506 |
| 158240 | CEFBS_None, // VPROLVDZrmb = 18507 |
| 158241 | CEFBS_None, // VPROLVDZrmbk = 18508 |
| 158242 | CEFBS_None, // VPROLVDZrmbkz = 18509 |
| 158243 | CEFBS_None, // VPROLVDZrmk = 18510 |
| 158244 | CEFBS_None, // VPROLVDZrmkz = 18511 |
| 158245 | CEFBS_None, // VPROLVDZrr = 18512 |
| 158246 | CEFBS_None, // VPROLVDZrrk = 18513 |
| 158247 | CEFBS_None, // VPROLVDZrrkz = 18514 |
| 158248 | CEFBS_None, // VPROLVQZ128rm = 18515 |
| 158249 | CEFBS_None, // VPROLVQZ128rmb = 18516 |
| 158250 | CEFBS_None, // VPROLVQZ128rmbk = 18517 |
| 158251 | CEFBS_None, // VPROLVQZ128rmbkz = 18518 |
| 158252 | CEFBS_None, // VPROLVQZ128rmk = 18519 |
| 158253 | CEFBS_None, // VPROLVQZ128rmkz = 18520 |
| 158254 | CEFBS_None, // VPROLVQZ128rr = 18521 |
| 158255 | CEFBS_None, // VPROLVQZ128rrk = 18522 |
| 158256 | CEFBS_None, // VPROLVQZ128rrkz = 18523 |
| 158257 | CEFBS_None, // VPROLVQZ256rm = 18524 |
| 158258 | CEFBS_None, // VPROLVQZ256rmb = 18525 |
| 158259 | CEFBS_None, // VPROLVQZ256rmbk = 18526 |
| 158260 | CEFBS_None, // VPROLVQZ256rmbkz = 18527 |
| 158261 | CEFBS_None, // VPROLVQZ256rmk = 18528 |
| 158262 | CEFBS_None, // VPROLVQZ256rmkz = 18529 |
| 158263 | CEFBS_None, // VPROLVQZ256rr = 18530 |
| 158264 | CEFBS_None, // VPROLVQZ256rrk = 18531 |
| 158265 | CEFBS_None, // VPROLVQZ256rrkz = 18532 |
| 158266 | CEFBS_None, // VPROLVQZrm = 18533 |
| 158267 | CEFBS_None, // VPROLVQZrmb = 18534 |
| 158268 | CEFBS_None, // VPROLVQZrmbk = 18535 |
| 158269 | CEFBS_None, // VPROLVQZrmbkz = 18536 |
| 158270 | CEFBS_None, // VPROLVQZrmk = 18537 |
| 158271 | CEFBS_None, // VPROLVQZrmkz = 18538 |
| 158272 | CEFBS_None, // VPROLVQZrr = 18539 |
| 158273 | CEFBS_None, // VPROLVQZrrk = 18540 |
| 158274 | CEFBS_None, // VPROLVQZrrkz = 18541 |
| 158275 | CEFBS_None, // VPRORDZ128mbi = 18542 |
| 158276 | CEFBS_None, // VPRORDZ128mbik = 18543 |
| 158277 | CEFBS_None, // VPRORDZ128mbikz = 18544 |
| 158278 | CEFBS_None, // VPRORDZ128mi = 18545 |
| 158279 | CEFBS_None, // VPRORDZ128mik = 18546 |
| 158280 | CEFBS_None, // VPRORDZ128mikz = 18547 |
| 158281 | CEFBS_None, // VPRORDZ128ri = 18548 |
| 158282 | CEFBS_None, // VPRORDZ128rik = 18549 |
| 158283 | CEFBS_None, // VPRORDZ128rikz = 18550 |
| 158284 | CEFBS_None, // VPRORDZ256mbi = 18551 |
| 158285 | CEFBS_None, // VPRORDZ256mbik = 18552 |
| 158286 | CEFBS_None, // VPRORDZ256mbikz = 18553 |
| 158287 | CEFBS_None, // VPRORDZ256mi = 18554 |
| 158288 | CEFBS_None, // VPRORDZ256mik = 18555 |
| 158289 | CEFBS_None, // VPRORDZ256mikz = 18556 |
| 158290 | CEFBS_None, // VPRORDZ256ri = 18557 |
| 158291 | CEFBS_None, // VPRORDZ256rik = 18558 |
| 158292 | CEFBS_None, // VPRORDZ256rikz = 18559 |
| 158293 | CEFBS_None, // VPRORDZmbi = 18560 |
| 158294 | CEFBS_None, // VPRORDZmbik = 18561 |
| 158295 | CEFBS_None, // VPRORDZmbikz = 18562 |
| 158296 | CEFBS_None, // VPRORDZmi = 18563 |
| 158297 | CEFBS_None, // VPRORDZmik = 18564 |
| 158298 | CEFBS_None, // VPRORDZmikz = 18565 |
| 158299 | CEFBS_None, // VPRORDZri = 18566 |
| 158300 | CEFBS_None, // VPRORDZrik = 18567 |
| 158301 | CEFBS_None, // VPRORDZrikz = 18568 |
| 158302 | CEFBS_None, // VPRORQZ128mbi = 18569 |
| 158303 | CEFBS_None, // VPRORQZ128mbik = 18570 |
| 158304 | CEFBS_None, // VPRORQZ128mbikz = 18571 |
| 158305 | CEFBS_None, // VPRORQZ128mi = 18572 |
| 158306 | CEFBS_None, // VPRORQZ128mik = 18573 |
| 158307 | CEFBS_None, // VPRORQZ128mikz = 18574 |
| 158308 | CEFBS_None, // VPRORQZ128ri = 18575 |
| 158309 | CEFBS_None, // VPRORQZ128rik = 18576 |
| 158310 | CEFBS_None, // VPRORQZ128rikz = 18577 |
| 158311 | CEFBS_None, // VPRORQZ256mbi = 18578 |
| 158312 | CEFBS_None, // VPRORQZ256mbik = 18579 |
| 158313 | CEFBS_None, // VPRORQZ256mbikz = 18580 |
| 158314 | CEFBS_None, // VPRORQZ256mi = 18581 |
| 158315 | CEFBS_None, // VPRORQZ256mik = 18582 |
| 158316 | CEFBS_None, // VPRORQZ256mikz = 18583 |
| 158317 | CEFBS_None, // VPRORQZ256ri = 18584 |
| 158318 | CEFBS_None, // VPRORQZ256rik = 18585 |
| 158319 | CEFBS_None, // VPRORQZ256rikz = 18586 |
| 158320 | CEFBS_None, // VPRORQZmbi = 18587 |
| 158321 | CEFBS_None, // VPRORQZmbik = 18588 |
| 158322 | CEFBS_None, // VPRORQZmbikz = 18589 |
| 158323 | CEFBS_None, // VPRORQZmi = 18590 |
| 158324 | CEFBS_None, // VPRORQZmik = 18591 |
| 158325 | CEFBS_None, // VPRORQZmikz = 18592 |
| 158326 | CEFBS_None, // VPRORQZri = 18593 |
| 158327 | CEFBS_None, // VPRORQZrik = 18594 |
| 158328 | CEFBS_None, // VPRORQZrikz = 18595 |
| 158329 | CEFBS_None, // VPRORVDZ128rm = 18596 |
| 158330 | CEFBS_None, // VPRORVDZ128rmb = 18597 |
| 158331 | CEFBS_None, // VPRORVDZ128rmbk = 18598 |
| 158332 | CEFBS_None, // VPRORVDZ128rmbkz = 18599 |
| 158333 | CEFBS_None, // VPRORVDZ128rmk = 18600 |
| 158334 | CEFBS_None, // VPRORVDZ128rmkz = 18601 |
| 158335 | CEFBS_None, // VPRORVDZ128rr = 18602 |
| 158336 | CEFBS_None, // VPRORVDZ128rrk = 18603 |
| 158337 | CEFBS_None, // VPRORVDZ128rrkz = 18604 |
| 158338 | CEFBS_None, // VPRORVDZ256rm = 18605 |
| 158339 | CEFBS_None, // VPRORVDZ256rmb = 18606 |
| 158340 | CEFBS_None, // VPRORVDZ256rmbk = 18607 |
| 158341 | CEFBS_None, // VPRORVDZ256rmbkz = 18608 |
| 158342 | CEFBS_None, // VPRORVDZ256rmk = 18609 |
| 158343 | CEFBS_None, // VPRORVDZ256rmkz = 18610 |
| 158344 | CEFBS_None, // VPRORVDZ256rr = 18611 |
| 158345 | CEFBS_None, // VPRORVDZ256rrk = 18612 |
| 158346 | CEFBS_None, // VPRORVDZ256rrkz = 18613 |
| 158347 | CEFBS_None, // VPRORVDZrm = 18614 |
| 158348 | CEFBS_None, // VPRORVDZrmb = 18615 |
| 158349 | CEFBS_None, // VPRORVDZrmbk = 18616 |
| 158350 | CEFBS_None, // VPRORVDZrmbkz = 18617 |
| 158351 | CEFBS_None, // VPRORVDZrmk = 18618 |
| 158352 | CEFBS_None, // VPRORVDZrmkz = 18619 |
| 158353 | CEFBS_None, // VPRORVDZrr = 18620 |
| 158354 | CEFBS_None, // VPRORVDZrrk = 18621 |
| 158355 | CEFBS_None, // VPRORVDZrrkz = 18622 |
| 158356 | CEFBS_None, // VPRORVQZ128rm = 18623 |
| 158357 | CEFBS_None, // VPRORVQZ128rmb = 18624 |
| 158358 | CEFBS_None, // VPRORVQZ128rmbk = 18625 |
| 158359 | CEFBS_None, // VPRORVQZ128rmbkz = 18626 |
| 158360 | CEFBS_None, // VPRORVQZ128rmk = 18627 |
| 158361 | CEFBS_None, // VPRORVQZ128rmkz = 18628 |
| 158362 | CEFBS_None, // VPRORVQZ128rr = 18629 |
| 158363 | CEFBS_None, // VPRORVQZ128rrk = 18630 |
| 158364 | CEFBS_None, // VPRORVQZ128rrkz = 18631 |
| 158365 | CEFBS_None, // VPRORVQZ256rm = 18632 |
| 158366 | CEFBS_None, // VPRORVQZ256rmb = 18633 |
| 158367 | CEFBS_None, // VPRORVQZ256rmbk = 18634 |
| 158368 | CEFBS_None, // VPRORVQZ256rmbkz = 18635 |
| 158369 | CEFBS_None, // VPRORVQZ256rmk = 18636 |
| 158370 | CEFBS_None, // VPRORVQZ256rmkz = 18637 |
| 158371 | CEFBS_None, // VPRORVQZ256rr = 18638 |
| 158372 | CEFBS_None, // VPRORVQZ256rrk = 18639 |
| 158373 | CEFBS_None, // VPRORVQZ256rrkz = 18640 |
| 158374 | CEFBS_None, // VPRORVQZrm = 18641 |
| 158375 | CEFBS_None, // VPRORVQZrmb = 18642 |
| 158376 | CEFBS_None, // VPRORVQZrmbk = 18643 |
| 158377 | CEFBS_None, // VPRORVQZrmbkz = 18644 |
| 158378 | CEFBS_None, // VPRORVQZrmk = 18645 |
| 158379 | CEFBS_None, // VPRORVQZrmkz = 18646 |
| 158380 | CEFBS_None, // VPRORVQZrr = 18647 |
| 158381 | CEFBS_None, // VPRORVQZrrk = 18648 |
| 158382 | CEFBS_None, // VPRORVQZrrkz = 18649 |
| 158383 | CEFBS_None, // VPROTBmi = 18650 |
| 158384 | CEFBS_None, // VPROTBmr = 18651 |
| 158385 | CEFBS_None, // VPROTBri = 18652 |
| 158386 | CEFBS_None, // VPROTBrm = 18653 |
| 158387 | CEFBS_None, // VPROTBrr = 18654 |
| 158388 | CEFBS_None, // VPROTBrr_REV = 18655 |
| 158389 | CEFBS_None, // VPROTDmi = 18656 |
| 158390 | CEFBS_None, // VPROTDmr = 18657 |
| 158391 | CEFBS_None, // VPROTDri = 18658 |
| 158392 | CEFBS_None, // VPROTDrm = 18659 |
| 158393 | CEFBS_None, // VPROTDrr = 18660 |
| 158394 | CEFBS_None, // VPROTDrr_REV = 18661 |
| 158395 | CEFBS_None, // VPROTQmi = 18662 |
| 158396 | CEFBS_None, // VPROTQmr = 18663 |
| 158397 | CEFBS_None, // VPROTQri = 18664 |
| 158398 | CEFBS_None, // VPROTQrm = 18665 |
| 158399 | CEFBS_None, // VPROTQrr = 18666 |
| 158400 | CEFBS_None, // VPROTQrr_REV = 18667 |
| 158401 | CEFBS_None, // VPROTWmi = 18668 |
| 158402 | CEFBS_None, // VPROTWmr = 18669 |
| 158403 | CEFBS_None, // VPROTWri = 18670 |
| 158404 | CEFBS_None, // VPROTWrm = 18671 |
| 158405 | CEFBS_None, // VPROTWrr = 18672 |
| 158406 | CEFBS_None, // VPROTWrr_REV = 18673 |
| 158407 | CEFBS_None, // VPSADBWYrm = 18674 |
| 158408 | CEFBS_None, // VPSADBWYrr = 18675 |
| 158409 | CEFBS_None, // VPSADBWZ128rm = 18676 |
| 158410 | CEFBS_None, // VPSADBWZ128rr = 18677 |
| 158411 | CEFBS_None, // VPSADBWZ256rm = 18678 |
| 158412 | CEFBS_None, // VPSADBWZ256rr = 18679 |
| 158413 | CEFBS_None, // VPSADBWZrm = 18680 |
| 158414 | CEFBS_None, // VPSADBWZrr = 18681 |
| 158415 | CEFBS_None, // VPSADBWrm = 18682 |
| 158416 | CEFBS_None, // VPSADBWrr = 18683 |
| 158417 | CEFBS_None, // VPSCATTERDDZ128mr = 18684 |
| 158418 | CEFBS_None, // VPSCATTERDDZ256mr = 18685 |
| 158419 | CEFBS_None, // VPSCATTERDDZmr = 18686 |
| 158420 | CEFBS_None, // VPSCATTERDQZ128mr = 18687 |
| 158421 | CEFBS_None, // VPSCATTERDQZ256mr = 18688 |
| 158422 | CEFBS_None, // VPSCATTERDQZmr = 18689 |
| 158423 | CEFBS_None, // VPSCATTERQDZ128mr = 18690 |
| 158424 | CEFBS_None, // VPSCATTERQDZ256mr = 18691 |
| 158425 | CEFBS_None, // VPSCATTERQDZmr = 18692 |
| 158426 | CEFBS_None, // VPSCATTERQQZ128mr = 18693 |
| 158427 | CEFBS_None, // VPSCATTERQQZ256mr = 18694 |
| 158428 | CEFBS_None, // VPSCATTERQQZmr = 18695 |
| 158429 | CEFBS_None, // VPSHABmr = 18696 |
| 158430 | CEFBS_None, // VPSHABrm = 18697 |
| 158431 | CEFBS_None, // VPSHABrr = 18698 |
| 158432 | CEFBS_None, // VPSHABrr_REV = 18699 |
| 158433 | CEFBS_None, // VPSHADmr = 18700 |
| 158434 | CEFBS_None, // VPSHADrm = 18701 |
| 158435 | CEFBS_None, // VPSHADrr = 18702 |
| 158436 | CEFBS_None, // VPSHADrr_REV = 18703 |
| 158437 | CEFBS_None, // VPSHAQmr = 18704 |
| 158438 | CEFBS_None, // VPSHAQrm = 18705 |
| 158439 | CEFBS_None, // VPSHAQrr = 18706 |
| 158440 | CEFBS_None, // VPSHAQrr_REV = 18707 |
| 158441 | CEFBS_None, // VPSHAWmr = 18708 |
| 158442 | CEFBS_None, // VPSHAWrm = 18709 |
| 158443 | CEFBS_None, // VPSHAWrr = 18710 |
| 158444 | CEFBS_None, // VPSHAWrr_REV = 18711 |
| 158445 | CEFBS_None, // VPSHLBmr = 18712 |
| 158446 | CEFBS_None, // VPSHLBrm = 18713 |
| 158447 | CEFBS_None, // VPSHLBrr = 18714 |
| 158448 | CEFBS_None, // VPSHLBrr_REV = 18715 |
| 158449 | CEFBS_None, // VPSHLDDZ128rmbi = 18716 |
| 158450 | CEFBS_None, // VPSHLDDZ128rmbik = 18717 |
| 158451 | CEFBS_None, // VPSHLDDZ128rmbikz = 18718 |
| 158452 | CEFBS_None, // VPSHLDDZ128rmi = 18719 |
| 158453 | CEFBS_None, // VPSHLDDZ128rmik = 18720 |
| 158454 | CEFBS_None, // VPSHLDDZ128rmikz = 18721 |
| 158455 | CEFBS_None, // VPSHLDDZ128rri = 18722 |
| 158456 | CEFBS_None, // VPSHLDDZ128rrik = 18723 |
| 158457 | CEFBS_None, // VPSHLDDZ128rrikz = 18724 |
| 158458 | CEFBS_None, // VPSHLDDZ256rmbi = 18725 |
| 158459 | CEFBS_None, // VPSHLDDZ256rmbik = 18726 |
| 158460 | CEFBS_None, // VPSHLDDZ256rmbikz = 18727 |
| 158461 | CEFBS_None, // VPSHLDDZ256rmi = 18728 |
| 158462 | CEFBS_None, // VPSHLDDZ256rmik = 18729 |
| 158463 | CEFBS_None, // VPSHLDDZ256rmikz = 18730 |
| 158464 | CEFBS_None, // VPSHLDDZ256rri = 18731 |
| 158465 | CEFBS_None, // VPSHLDDZ256rrik = 18732 |
| 158466 | CEFBS_None, // VPSHLDDZ256rrikz = 18733 |
| 158467 | CEFBS_None, // VPSHLDDZrmbi = 18734 |
| 158468 | CEFBS_None, // VPSHLDDZrmbik = 18735 |
| 158469 | CEFBS_None, // VPSHLDDZrmbikz = 18736 |
| 158470 | CEFBS_None, // VPSHLDDZrmi = 18737 |
| 158471 | CEFBS_None, // VPSHLDDZrmik = 18738 |
| 158472 | CEFBS_None, // VPSHLDDZrmikz = 18739 |
| 158473 | CEFBS_None, // VPSHLDDZrri = 18740 |
| 158474 | CEFBS_None, // VPSHLDDZrrik = 18741 |
| 158475 | CEFBS_None, // VPSHLDDZrrikz = 18742 |
| 158476 | CEFBS_None, // VPSHLDQZ128rmbi = 18743 |
| 158477 | CEFBS_None, // VPSHLDQZ128rmbik = 18744 |
| 158478 | CEFBS_None, // VPSHLDQZ128rmbikz = 18745 |
| 158479 | CEFBS_None, // VPSHLDQZ128rmi = 18746 |
| 158480 | CEFBS_None, // VPSHLDQZ128rmik = 18747 |
| 158481 | CEFBS_None, // VPSHLDQZ128rmikz = 18748 |
| 158482 | CEFBS_None, // VPSHLDQZ128rri = 18749 |
| 158483 | CEFBS_None, // VPSHLDQZ128rrik = 18750 |
| 158484 | CEFBS_None, // VPSHLDQZ128rrikz = 18751 |
| 158485 | CEFBS_None, // VPSHLDQZ256rmbi = 18752 |
| 158486 | CEFBS_None, // VPSHLDQZ256rmbik = 18753 |
| 158487 | CEFBS_None, // VPSHLDQZ256rmbikz = 18754 |
| 158488 | CEFBS_None, // VPSHLDQZ256rmi = 18755 |
| 158489 | CEFBS_None, // VPSHLDQZ256rmik = 18756 |
| 158490 | CEFBS_None, // VPSHLDQZ256rmikz = 18757 |
| 158491 | CEFBS_None, // VPSHLDQZ256rri = 18758 |
| 158492 | CEFBS_None, // VPSHLDQZ256rrik = 18759 |
| 158493 | CEFBS_None, // VPSHLDQZ256rrikz = 18760 |
| 158494 | CEFBS_None, // VPSHLDQZrmbi = 18761 |
| 158495 | CEFBS_None, // VPSHLDQZrmbik = 18762 |
| 158496 | CEFBS_None, // VPSHLDQZrmbikz = 18763 |
| 158497 | CEFBS_None, // VPSHLDQZrmi = 18764 |
| 158498 | CEFBS_None, // VPSHLDQZrmik = 18765 |
| 158499 | CEFBS_None, // VPSHLDQZrmikz = 18766 |
| 158500 | CEFBS_None, // VPSHLDQZrri = 18767 |
| 158501 | CEFBS_None, // VPSHLDQZrrik = 18768 |
| 158502 | CEFBS_None, // VPSHLDQZrrikz = 18769 |
| 158503 | CEFBS_None, // VPSHLDVDZ128m = 18770 |
| 158504 | CEFBS_None, // VPSHLDVDZ128mb = 18771 |
| 158505 | CEFBS_None, // VPSHLDVDZ128mbk = 18772 |
| 158506 | CEFBS_None, // VPSHLDVDZ128mbkz = 18773 |
| 158507 | CEFBS_None, // VPSHLDVDZ128mk = 18774 |
| 158508 | CEFBS_None, // VPSHLDVDZ128mkz = 18775 |
| 158509 | CEFBS_None, // VPSHLDVDZ128r = 18776 |
| 158510 | CEFBS_None, // VPSHLDVDZ128rk = 18777 |
| 158511 | CEFBS_None, // VPSHLDVDZ128rkz = 18778 |
| 158512 | CEFBS_None, // VPSHLDVDZ256m = 18779 |
| 158513 | CEFBS_None, // VPSHLDVDZ256mb = 18780 |
| 158514 | CEFBS_None, // VPSHLDVDZ256mbk = 18781 |
| 158515 | CEFBS_None, // VPSHLDVDZ256mbkz = 18782 |
| 158516 | CEFBS_None, // VPSHLDVDZ256mk = 18783 |
| 158517 | CEFBS_None, // VPSHLDVDZ256mkz = 18784 |
| 158518 | CEFBS_None, // VPSHLDVDZ256r = 18785 |
| 158519 | CEFBS_None, // VPSHLDVDZ256rk = 18786 |
| 158520 | CEFBS_None, // VPSHLDVDZ256rkz = 18787 |
| 158521 | CEFBS_None, // VPSHLDVDZm = 18788 |
| 158522 | CEFBS_None, // VPSHLDVDZmb = 18789 |
| 158523 | CEFBS_None, // VPSHLDVDZmbk = 18790 |
| 158524 | CEFBS_None, // VPSHLDVDZmbkz = 18791 |
| 158525 | CEFBS_None, // VPSHLDVDZmk = 18792 |
| 158526 | CEFBS_None, // VPSHLDVDZmkz = 18793 |
| 158527 | CEFBS_None, // VPSHLDVDZr = 18794 |
| 158528 | CEFBS_None, // VPSHLDVDZrk = 18795 |
| 158529 | CEFBS_None, // VPSHLDVDZrkz = 18796 |
| 158530 | CEFBS_None, // VPSHLDVQZ128m = 18797 |
| 158531 | CEFBS_None, // VPSHLDVQZ128mb = 18798 |
| 158532 | CEFBS_None, // VPSHLDVQZ128mbk = 18799 |
| 158533 | CEFBS_None, // VPSHLDVQZ128mbkz = 18800 |
| 158534 | CEFBS_None, // VPSHLDVQZ128mk = 18801 |
| 158535 | CEFBS_None, // VPSHLDVQZ128mkz = 18802 |
| 158536 | CEFBS_None, // VPSHLDVQZ128r = 18803 |
| 158537 | CEFBS_None, // VPSHLDVQZ128rk = 18804 |
| 158538 | CEFBS_None, // VPSHLDVQZ128rkz = 18805 |
| 158539 | CEFBS_None, // VPSHLDVQZ256m = 18806 |
| 158540 | CEFBS_None, // VPSHLDVQZ256mb = 18807 |
| 158541 | CEFBS_None, // VPSHLDVQZ256mbk = 18808 |
| 158542 | CEFBS_None, // VPSHLDVQZ256mbkz = 18809 |
| 158543 | CEFBS_None, // VPSHLDVQZ256mk = 18810 |
| 158544 | CEFBS_None, // VPSHLDVQZ256mkz = 18811 |
| 158545 | CEFBS_None, // VPSHLDVQZ256r = 18812 |
| 158546 | CEFBS_None, // VPSHLDVQZ256rk = 18813 |
| 158547 | CEFBS_None, // VPSHLDVQZ256rkz = 18814 |
| 158548 | CEFBS_None, // VPSHLDVQZm = 18815 |
| 158549 | CEFBS_None, // VPSHLDVQZmb = 18816 |
| 158550 | CEFBS_None, // VPSHLDVQZmbk = 18817 |
| 158551 | CEFBS_None, // VPSHLDVQZmbkz = 18818 |
| 158552 | CEFBS_None, // VPSHLDVQZmk = 18819 |
| 158553 | CEFBS_None, // VPSHLDVQZmkz = 18820 |
| 158554 | CEFBS_None, // VPSHLDVQZr = 18821 |
| 158555 | CEFBS_None, // VPSHLDVQZrk = 18822 |
| 158556 | CEFBS_None, // VPSHLDVQZrkz = 18823 |
| 158557 | CEFBS_None, // VPSHLDVWZ128m = 18824 |
| 158558 | CEFBS_None, // VPSHLDVWZ128mk = 18825 |
| 158559 | CEFBS_None, // VPSHLDVWZ128mkz = 18826 |
| 158560 | CEFBS_None, // VPSHLDVWZ128r = 18827 |
| 158561 | CEFBS_None, // VPSHLDVWZ128rk = 18828 |
| 158562 | CEFBS_None, // VPSHLDVWZ128rkz = 18829 |
| 158563 | CEFBS_None, // VPSHLDVWZ256m = 18830 |
| 158564 | CEFBS_None, // VPSHLDVWZ256mk = 18831 |
| 158565 | CEFBS_None, // VPSHLDVWZ256mkz = 18832 |
| 158566 | CEFBS_None, // VPSHLDVWZ256r = 18833 |
| 158567 | CEFBS_None, // VPSHLDVWZ256rk = 18834 |
| 158568 | CEFBS_None, // VPSHLDVWZ256rkz = 18835 |
| 158569 | CEFBS_None, // VPSHLDVWZm = 18836 |
| 158570 | CEFBS_None, // VPSHLDVWZmk = 18837 |
| 158571 | CEFBS_None, // VPSHLDVWZmkz = 18838 |
| 158572 | CEFBS_None, // VPSHLDVWZr = 18839 |
| 158573 | CEFBS_None, // VPSHLDVWZrk = 18840 |
| 158574 | CEFBS_None, // VPSHLDVWZrkz = 18841 |
| 158575 | CEFBS_None, // VPSHLDWZ128rmi = 18842 |
| 158576 | CEFBS_None, // VPSHLDWZ128rmik = 18843 |
| 158577 | CEFBS_None, // VPSHLDWZ128rmikz = 18844 |
| 158578 | CEFBS_None, // VPSHLDWZ128rri = 18845 |
| 158579 | CEFBS_None, // VPSHLDWZ128rrik = 18846 |
| 158580 | CEFBS_None, // VPSHLDWZ128rrikz = 18847 |
| 158581 | CEFBS_None, // VPSHLDWZ256rmi = 18848 |
| 158582 | CEFBS_None, // VPSHLDWZ256rmik = 18849 |
| 158583 | CEFBS_None, // VPSHLDWZ256rmikz = 18850 |
| 158584 | CEFBS_None, // VPSHLDWZ256rri = 18851 |
| 158585 | CEFBS_None, // VPSHLDWZ256rrik = 18852 |
| 158586 | CEFBS_None, // VPSHLDWZ256rrikz = 18853 |
| 158587 | CEFBS_None, // VPSHLDWZrmi = 18854 |
| 158588 | CEFBS_None, // VPSHLDWZrmik = 18855 |
| 158589 | CEFBS_None, // VPSHLDWZrmikz = 18856 |
| 158590 | CEFBS_None, // VPSHLDWZrri = 18857 |
| 158591 | CEFBS_None, // VPSHLDWZrrik = 18858 |
| 158592 | CEFBS_None, // VPSHLDWZrrikz = 18859 |
| 158593 | CEFBS_None, // VPSHLDmr = 18860 |
| 158594 | CEFBS_None, // VPSHLDrm = 18861 |
| 158595 | CEFBS_None, // VPSHLDrr = 18862 |
| 158596 | CEFBS_None, // VPSHLDrr_REV = 18863 |
| 158597 | CEFBS_None, // VPSHLQmr = 18864 |
| 158598 | CEFBS_None, // VPSHLQrm = 18865 |
| 158599 | CEFBS_None, // VPSHLQrr = 18866 |
| 158600 | CEFBS_None, // VPSHLQrr_REV = 18867 |
| 158601 | CEFBS_None, // VPSHLWmr = 18868 |
| 158602 | CEFBS_None, // VPSHLWrm = 18869 |
| 158603 | CEFBS_None, // VPSHLWrr = 18870 |
| 158604 | CEFBS_None, // VPSHLWrr_REV = 18871 |
| 158605 | CEFBS_None, // VPSHRDDZ128rmbi = 18872 |
| 158606 | CEFBS_None, // VPSHRDDZ128rmbik = 18873 |
| 158607 | CEFBS_None, // VPSHRDDZ128rmbikz = 18874 |
| 158608 | CEFBS_None, // VPSHRDDZ128rmi = 18875 |
| 158609 | CEFBS_None, // VPSHRDDZ128rmik = 18876 |
| 158610 | CEFBS_None, // VPSHRDDZ128rmikz = 18877 |
| 158611 | CEFBS_None, // VPSHRDDZ128rri = 18878 |
| 158612 | CEFBS_None, // VPSHRDDZ128rrik = 18879 |
| 158613 | CEFBS_None, // VPSHRDDZ128rrikz = 18880 |
| 158614 | CEFBS_None, // VPSHRDDZ256rmbi = 18881 |
| 158615 | CEFBS_None, // VPSHRDDZ256rmbik = 18882 |
| 158616 | CEFBS_None, // VPSHRDDZ256rmbikz = 18883 |
| 158617 | CEFBS_None, // VPSHRDDZ256rmi = 18884 |
| 158618 | CEFBS_None, // VPSHRDDZ256rmik = 18885 |
| 158619 | CEFBS_None, // VPSHRDDZ256rmikz = 18886 |
| 158620 | CEFBS_None, // VPSHRDDZ256rri = 18887 |
| 158621 | CEFBS_None, // VPSHRDDZ256rrik = 18888 |
| 158622 | CEFBS_None, // VPSHRDDZ256rrikz = 18889 |
| 158623 | CEFBS_None, // VPSHRDDZrmbi = 18890 |
| 158624 | CEFBS_None, // VPSHRDDZrmbik = 18891 |
| 158625 | CEFBS_None, // VPSHRDDZrmbikz = 18892 |
| 158626 | CEFBS_None, // VPSHRDDZrmi = 18893 |
| 158627 | CEFBS_None, // VPSHRDDZrmik = 18894 |
| 158628 | CEFBS_None, // VPSHRDDZrmikz = 18895 |
| 158629 | CEFBS_None, // VPSHRDDZrri = 18896 |
| 158630 | CEFBS_None, // VPSHRDDZrrik = 18897 |
| 158631 | CEFBS_None, // VPSHRDDZrrikz = 18898 |
| 158632 | CEFBS_None, // VPSHRDQZ128rmbi = 18899 |
| 158633 | CEFBS_None, // VPSHRDQZ128rmbik = 18900 |
| 158634 | CEFBS_None, // VPSHRDQZ128rmbikz = 18901 |
| 158635 | CEFBS_None, // VPSHRDQZ128rmi = 18902 |
| 158636 | CEFBS_None, // VPSHRDQZ128rmik = 18903 |
| 158637 | CEFBS_None, // VPSHRDQZ128rmikz = 18904 |
| 158638 | CEFBS_None, // VPSHRDQZ128rri = 18905 |
| 158639 | CEFBS_None, // VPSHRDQZ128rrik = 18906 |
| 158640 | CEFBS_None, // VPSHRDQZ128rrikz = 18907 |
| 158641 | CEFBS_None, // VPSHRDQZ256rmbi = 18908 |
| 158642 | CEFBS_None, // VPSHRDQZ256rmbik = 18909 |
| 158643 | CEFBS_None, // VPSHRDQZ256rmbikz = 18910 |
| 158644 | CEFBS_None, // VPSHRDQZ256rmi = 18911 |
| 158645 | CEFBS_None, // VPSHRDQZ256rmik = 18912 |
| 158646 | CEFBS_None, // VPSHRDQZ256rmikz = 18913 |
| 158647 | CEFBS_None, // VPSHRDQZ256rri = 18914 |
| 158648 | CEFBS_None, // VPSHRDQZ256rrik = 18915 |
| 158649 | CEFBS_None, // VPSHRDQZ256rrikz = 18916 |
| 158650 | CEFBS_None, // VPSHRDQZrmbi = 18917 |
| 158651 | CEFBS_None, // VPSHRDQZrmbik = 18918 |
| 158652 | CEFBS_None, // VPSHRDQZrmbikz = 18919 |
| 158653 | CEFBS_None, // VPSHRDQZrmi = 18920 |
| 158654 | CEFBS_None, // VPSHRDQZrmik = 18921 |
| 158655 | CEFBS_None, // VPSHRDQZrmikz = 18922 |
| 158656 | CEFBS_None, // VPSHRDQZrri = 18923 |
| 158657 | CEFBS_None, // VPSHRDQZrrik = 18924 |
| 158658 | CEFBS_None, // VPSHRDQZrrikz = 18925 |
| 158659 | CEFBS_None, // VPSHRDVDZ128m = 18926 |
| 158660 | CEFBS_None, // VPSHRDVDZ128mb = 18927 |
| 158661 | CEFBS_None, // VPSHRDVDZ128mbk = 18928 |
| 158662 | CEFBS_None, // VPSHRDVDZ128mbkz = 18929 |
| 158663 | CEFBS_None, // VPSHRDVDZ128mk = 18930 |
| 158664 | CEFBS_None, // VPSHRDVDZ128mkz = 18931 |
| 158665 | CEFBS_None, // VPSHRDVDZ128r = 18932 |
| 158666 | CEFBS_None, // VPSHRDVDZ128rk = 18933 |
| 158667 | CEFBS_None, // VPSHRDVDZ128rkz = 18934 |
| 158668 | CEFBS_None, // VPSHRDVDZ256m = 18935 |
| 158669 | CEFBS_None, // VPSHRDVDZ256mb = 18936 |
| 158670 | CEFBS_None, // VPSHRDVDZ256mbk = 18937 |
| 158671 | CEFBS_None, // VPSHRDVDZ256mbkz = 18938 |
| 158672 | CEFBS_None, // VPSHRDVDZ256mk = 18939 |
| 158673 | CEFBS_None, // VPSHRDVDZ256mkz = 18940 |
| 158674 | CEFBS_None, // VPSHRDVDZ256r = 18941 |
| 158675 | CEFBS_None, // VPSHRDVDZ256rk = 18942 |
| 158676 | CEFBS_None, // VPSHRDVDZ256rkz = 18943 |
| 158677 | CEFBS_None, // VPSHRDVDZm = 18944 |
| 158678 | CEFBS_None, // VPSHRDVDZmb = 18945 |
| 158679 | CEFBS_None, // VPSHRDVDZmbk = 18946 |
| 158680 | CEFBS_None, // VPSHRDVDZmbkz = 18947 |
| 158681 | CEFBS_None, // VPSHRDVDZmk = 18948 |
| 158682 | CEFBS_None, // VPSHRDVDZmkz = 18949 |
| 158683 | CEFBS_None, // VPSHRDVDZr = 18950 |
| 158684 | CEFBS_None, // VPSHRDVDZrk = 18951 |
| 158685 | CEFBS_None, // VPSHRDVDZrkz = 18952 |
| 158686 | CEFBS_None, // VPSHRDVQZ128m = 18953 |
| 158687 | CEFBS_None, // VPSHRDVQZ128mb = 18954 |
| 158688 | CEFBS_None, // VPSHRDVQZ128mbk = 18955 |
| 158689 | CEFBS_None, // VPSHRDVQZ128mbkz = 18956 |
| 158690 | CEFBS_None, // VPSHRDVQZ128mk = 18957 |
| 158691 | CEFBS_None, // VPSHRDVQZ128mkz = 18958 |
| 158692 | CEFBS_None, // VPSHRDVQZ128r = 18959 |
| 158693 | CEFBS_None, // VPSHRDVQZ128rk = 18960 |
| 158694 | CEFBS_None, // VPSHRDVQZ128rkz = 18961 |
| 158695 | CEFBS_None, // VPSHRDVQZ256m = 18962 |
| 158696 | CEFBS_None, // VPSHRDVQZ256mb = 18963 |
| 158697 | CEFBS_None, // VPSHRDVQZ256mbk = 18964 |
| 158698 | CEFBS_None, // VPSHRDVQZ256mbkz = 18965 |
| 158699 | CEFBS_None, // VPSHRDVQZ256mk = 18966 |
| 158700 | CEFBS_None, // VPSHRDVQZ256mkz = 18967 |
| 158701 | CEFBS_None, // VPSHRDVQZ256r = 18968 |
| 158702 | CEFBS_None, // VPSHRDVQZ256rk = 18969 |
| 158703 | CEFBS_None, // VPSHRDVQZ256rkz = 18970 |
| 158704 | CEFBS_None, // VPSHRDVQZm = 18971 |
| 158705 | CEFBS_None, // VPSHRDVQZmb = 18972 |
| 158706 | CEFBS_None, // VPSHRDVQZmbk = 18973 |
| 158707 | CEFBS_None, // VPSHRDVQZmbkz = 18974 |
| 158708 | CEFBS_None, // VPSHRDVQZmk = 18975 |
| 158709 | CEFBS_None, // VPSHRDVQZmkz = 18976 |
| 158710 | CEFBS_None, // VPSHRDVQZr = 18977 |
| 158711 | CEFBS_None, // VPSHRDVQZrk = 18978 |
| 158712 | CEFBS_None, // VPSHRDVQZrkz = 18979 |
| 158713 | CEFBS_None, // VPSHRDVWZ128m = 18980 |
| 158714 | CEFBS_None, // VPSHRDVWZ128mk = 18981 |
| 158715 | CEFBS_None, // VPSHRDVWZ128mkz = 18982 |
| 158716 | CEFBS_None, // VPSHRDVWZ128r = 18983 |
| 158717 | CEFBS_None, // VPSHRDVWZ128rk = 18984 |
| 158718 | CEFBS_None, // VPSHRDVWZ128rkz = 18985 |
| 158719 | CEFBS_None, // VPSHRDVWZ256m = 18986 |
| 158720 | CEFBS_None, // VPSHRDVWZ256mk = 18987 |
| 158721 | CEFBS_None, // VPSHRDVWZ256mkz = 18988 |
| 158722 | CEFBS_None, // VPSHRDVWZ256r = 18989 |
| 158723 | CEFBS_None, // VPSHRDVWZ256rk = 18990 |
| 158724 | CEFBS_None, // VPSHRDVWZ256rkz = 18991 |
| 158725 | CEFBS_None, // VPSHRDVWZm = 18992 |
| 158726 | CEFBS_None, // VPSHRDVWZmk = 18993 |
| 158727 | CEFBS_None, // VPSHRDVWZmkz = 18994 |
| 158728 | CEFBS_None, // VPSHRDVWZr = 18995 |
| 158729 | CEFBS_None, // VPSHRDVWZrk = 18996 |
| 158730 | CEFBS_None, // VPSHRDVWZrkz = 18997 |
| 158731 | CEFBS_None, // VPSHRDWZ128rmi = 18998 |
| 158732 | CEFBS_None, // VPSHRDWZ128rmik = 18999 |
| 158733 | CEFBS_None, // VPSHRDWZ128rmikz = 19000 |
| 158734 | CEFBS_None, // VPSHRDWZ128rri = 19001 |
| 158735 | CEFBS_None, // VPSHRDWZ128rrik = 19002 |
| 158736 | CEFBS_None, // VPSHRDWZ128rrikz = 19003 |
| 158737 | CEFBS_None, // VPSHRDWZ256rmi = 19004 |
| 158738 | CEFBS_None, // VPSHRDWZ256rmik = 19005 |
| 158739 | CEFBS_None, // VPSHRDWZ256rmikz = 19006 |
| 158740 | CEFBS_None, // VPSHRDWZ256rri = 19007 |
| 158741 | CEFBS_None, // VPSHRDWZ256rrik = 19008 |
| 158742 | CEFBS_None, // VPSHRDWZ256rrikz = 19009 |
| 158743 | CEFBS_None, // VPSHRDWZrmi = 19010 |
| 158744 | CEFBS_None, // VPSHRDWZrmik = 19011 |
| 158745 | CEFBS_None, // VPSHRDWZrmikz = 19012 |
| 158746 | CEFBS_None, // VPSHRDWZrri = 19013 |
| 158747 | CEFBS_None, // VPSHRDWZrrik = 19014 |
| 158748 | CEFBS_None, // VPSHRDWZrrikz = 19015 |
| 158749 | CEFBS_None, // VPSHUFBITQMBZ128rm = 19016 |
| 158750 | CEFBS_None, // VPSHUFBITQMBZ128rmk = 19017 |
| 158751 | CEFBS_None, // VPSHUFBITQMBZ128rr = 19018 |
| 158752 | CEFBS_None, // VPSHUFBITQMBZ128rrk = 19019 |
| 158753 | CEFBS_None, // VPSHUFBITQMBZ256rm = 19020 |
| 158754 | CEFBS_None, // VPSHUFBITQMBZ256rmk = 19021 |
| 158755 | CEFBS_None, // VPSHUFBITQMBZ256rr = 19022 |
| 158756 | CEFBS_None, // VPSHUFBITQMBZ256rrk = 19023 |
| 158757 | CEFBS_None, // VPSHUFBITQMBZrm = 19024 |
| 158758 | CEFBS_None, // VPSHUFBITQMBZrmk = 19025 |
| 158759 | CEFBS_None, // VPSHUFBITQMBZrr = 19026 |
| 158760 | CEFBS_None, // VPSHUFBITQMBZrrk = 19027 |
| 158761 | CEFBS_None, // VPSHUFBYrm = 19028 |
| 158762 | CEFBS_None, // VPSHUFBYrr = 19029 |
| 158763 | CEFBS_None, // VPSHUFBZ128rm = 19030 |
| 158764 | CEFBS_None, // VPSHUFBZ128rmk = 19031 |
| 158765 | CEFBS_None, // VPSHUFBZ128rmkz = 19032 |
| 158766 | CEFBS_None, // VPSHUFBZ128rr = 19033 |
| 158767 | CEFBS_None, // VPSHUFBZ128rrk = 19034 |
| 158768 | CEFBS_None, // VPSHUFBZ128rrkz = 19035 |
| 158769 | CEFBS_None, // VPSHUFBZ256rm = 19036 |
| 158770 | CEFBS_None, // VPSHUFBZ256rmk = 19037 |
| 158771 | CEFBS_None, // VPSHUFBZ256rmkz = 19038 |
| 158772 | CEFBS_None, // VPSHUFBZ256rr = 19039 |
| 158773 | CEFBS_None, // VPSHUFBZ256rrk = 19040 |
| 158774 | CEFBS_None, // VPSHUFBZ256rrkz = 19041 |
| 158775 | CEFBS_None, // VPSHUFBZrm = 19042 |
| 158776 | CEFBS_None, // VPSHUFBZrmk = 19043 |
| 158777 | CEFBS_None, // VPSHUFBZrmkz = 19044 |
| 158778 | CEFBS_None, // VPSHUFBZrr = 19045 |
| 158779 | CEFBS_None, // VPSHUFBZrrk = 19046 |
| 158780 | CEFBS_None, // VPSHUFBZrrkz = 19047 |
| 158781 | CEFBS_None, // VPSHUFBrm = 19048 |
| 158782 | CEFBS_None, // VPSHUFBrr = 19049 |
| 158783 | CEFBS_None, // VPSHUFDYmi = 19050 |
| 158784 | CEFBS_None, // VPSHUFDYri = 19051 |
| 158785 | CEFBS_None, // VPSHUFDZ128mbi = 19052 |
| 158786 | CEFBS_None, // VPSHUFDZ128mbik = 19053 |
| 158787 | CEFBS_None, // VPSHUFDZ128mbikz = 19054 |
| 158788 | CEFBS_None, // VPSHUFDZ128mi = 19055 |
| 158789 | CEFBS_None, // VPSHUFDZ128mik = 19056 |
| 158790 | CEFBS_None, // VPSHUFDZ128mikz = 19057 |
| 158791 | CEFBS_None, // VPSHUFDZ128ri = 19058 |
| 158792 | CEFBS_None, // VPSHUFDZ128rik = 19059 |
| 158793 | CEFBS_None, // VPSHUFDZ128rikz = 19060 |
| 158794 | CEFBS_None, // VPSHUFDZ256mbi = 19061 |
| 158795 | CEFBS_None, // VPSHUFDZ256mbik = 19062 |
| 158796 | CEFBS_None, // VPSHUFDZ256mbikz = 19063 |
| 158797 | CEFBS_None, // VPSHUFDZ256mi = 19064 |
| 158798 | CEFBS_None, // VPSHUFDZ256mik = 19065 |
| 158799 | CEFBS_None, // VPSHUFDZ256mikz = 19066 |
| 158800 | CEFBS_None, // VPSHUFDZ256ri = 19067 |
| 158801 | CEFBS_None, // VPSHUFDZ256rik = 19068 |
| 158802 | CEFBS_None, // VPSHUFDZ256rikz = 19069 |
| 158803 | CEFBS_None, // VPSHUFDZmbi = 19070 |
| 158804 | CEFBS_None, // VPSHUFDZmbik = 19071 |
| 158805 | CEFBS_None, // VPSHUFDZmbikz = 19072 |
| 158806 | CEFBS_None, // VPSHUFDZmi = 19073 |
| 158807 | CEFBS_None, // VPSHUFDZmik = 19074 |
| 158808 | CEFBS_None, // VPSHUFDZmikz = 19075 |
| 158809 | CEFBS_None, // VPSHUFDZri = 19076 |
| 158810 | CEFBS_None, // VPSHUFDZrik = 19077 |
| 158811 | CEFBS_None, // VPSHUFDZrikz = 19078 |
| 158812 | CEFBS_None, // VPSHUFDmi = 19079 |
| 158813 | CEFBS_None, // VPSHUFDri = 19080 |
| 158814 | CEFBS_None, // VPSHUFHWYmi = 19081 |
| 158815 | CEFBS_None, // VPSHUFHWYri = 19082 |
| 158816 | CEFBS_None, // VPSHUFHWZ128mi = 19083 |
| 158817 | CEFBS_None, // VPSHUFHWZ128mik = 19084 |
| 158818 | CEFBS_None, // VPSHUFHWZ128mikz = 19085 |
| 158819 | CEFBS_None, // VPSHUFHWZ128ri = 19086 |
| 158820 | CEFBS_None, // VPSHUFHWZ128rik = 19087 |
| 158821 | CEFBS_None, // VPSHUFHWZ128rikz = 19088 |
| 158822 | CEFBS_None, // VPSHUFHWZ256mi = 19089 |
| 158823 | CEFBS_None, // VPSHUFHWZ256mik = 19090 |
| 158824 | CEFBS_None, // VPSHUFHWZ256mikz = 19091 |
| 158825 | CEFBS_None, // VPSHUFHWZ256ri = 19092 |
| 158826 | CEFBS_None, // VPSHUFHWZ256rik = 19093 |
| 158827 | CEFBS_None, // VPSHUFHWZ256rikz = 19094 |
| 158828 | CEFBS_None, // VPSHUFHWZmi = 19095 |
| 158829 | CEFBS_None, // VPSHUFHWZmik = 19096 |
| 158830 | CEFBS_None, // VPSHUFHWZmikz = 19097 |
| 158831 | CEFBS_None, // VPSHUFHWZri = 19098 |
| 158832 | CEFBS_None, // VPSHUFHWZrik = 19099 |
| 158833 | CEFBS_None, // VPSHUFHWZrikz = 19100 |
| 158834 | CEFBS_None, // VPSHUFHWmi = 19101 |
| 158835 | CEFBS_None, // VPSHUFHWri = 19102 |
| 158836 | CEFBS_None, // VPSHUFLWYmi = 19103 |
| 158837 | CEFBS_None, // VPSHUFLWYri = 19104 |
| 158838 | CEFBS_None, // VPSHUFLWZ128mi = 19105 |
| 158839 | CEFBS_None, // VPSHUFLWZ128mik = 19106 |
| 158840 | CEFBS_None, // VPSHUFLWZ128mikz = 19107 |
| 158841 | CEFBS_None, // VPSHUFLWZ128ri = 19108 |
| 158842 | CEFBS_None, // VPSHUFLWZ128rik = 19109 |
| 158843 | CEFBS_None, // VPSHUFLWZ128rikz = 19110 |
| 158844 | CEFBS_None, // VPSHUFLWZ256mi = 19111 |
| 158845 | CEFBS_None, // VPSHUFLWZ256mik = 19112 |
| 158846 | CEFBS_None, // VPSHUFLWZ256mikz = 19113 |
| 158847 | CEFBS_None, // VPSHUFLWZ256ri = 19114 |
| 158848 | CEFBS_None, // VPSHUFLWZ256rik = 19115 |
| 158849 | CEFBS_None, // VPSHUFLWZ256rikz = 19116 |
| 158850 | CEFBS_None, // VPSHUFLWZmi = 19117 |
| 158851 | CEFBS_None, // VPSHUFLWZmik = 19118 |
| 158852 | CEFBS_None, // VPSHUFLWZmikz = 19119 |
| 158853 | CEFBS_None, // VPSHUFLWZri = 19120 |
| 158854 | CEFBS_None, // VPSHUFLWZrik = 19121 |
| 158855 | CEFBS_None, // VPSHUFLWZrikz = 19122 |
| 158856 | CEFBS_None, // VPSHUFLWmi = 19123 |
| 158857 | CEFBS_None, // VPSHUFLWri = 19124 |
| 158858 | CEFBS_None, // VPSIGNBYrm = 19125 |
| 158859 | CEFBS_None, // VPSIGNBYrr = 19126 |
| 158860 | CEFBS_None, // VPSIGNBrm = 19127 |
| 158861 | CEFBS_None, // VPSIGNBrr = 19128 |
| 158862 | CEFBS_None, // VPSIGNDYrm = 19129 |
| 158863 | CEFBS_None, // VPSIGNDYrr = 19130 |
| 158864 | CEFBS_None, // VPSIGNDrm = 19131 |
| 158865 | CEFBS_None, // VPSIGNDrr = 19132 |
| 158866 | CEFBS_None, // VPSIGNWYrm = 19133 |
| 158867 | CEFBS_None, // VPSIGNWYrr = 19134 |
| 158868 | CEFBS_None, // VPSIGNWrm = 19135 |
| 158869 | CEFBS_None, // VPSIGNWrr = 19136 |
| 158870 | CEFBS_None, // VPSLLDQYri = 19137 |
| 158871 | CEFBS_None, // VPSLLDQZ128mi = 19138 |
| 158872 | CEFBS_None, // VPSLLDQZ128ri = 19139 |
| 158873 | CEFBS_None, // VPSLLDQZ256mi = 19140 |
| 158874 | CEFBS_None, // VPSLLDQZ256ri = 19141 |
| 158875 | CEFBS_None, // VPSLLDQZmi = 19142 |
| 158876 | CEFBS_None, // VPSLLDQZri = 19143 |
| 158877 | CEFBS_None, // VPSLLDQri = 19144 |
| 158878 | CEFBS_None, // VPSLLDYri = 19145 |
| 158879 | CEFBS_None, // VPSLLDYrm = 19146 |
| 158880 | CEFBS_None, // VPSLLDYrr = 19147 |
| 158881 | CEFBS_None, // VPSLLDZ128mbi = 19148 |
| 158882 | CEFBS_None, // VPSLLDZ128mbik = 19149 |
| 158883 | CEFBS_None, // VPSLLDZ128mbikz = 19150 |
| 158884 | CEFBS_None, // VPSLLDZ128mi = 19151 |
| 158885 | CEFBS_None, // VPSLLDZ128mik = 19152 |
| 158886 | CEFBS_None, // VPSLLDZ128mikz = 19153 |
| 158887 | CEFBS_None, // VPSLLDZ128ri = 19154 |
| 158888 | CEFBS_None, // VPSLLDZ128rik = 19155 |
| 158889 | CEFBS_None, // VPSLLDZ128rikz = 19156 |
| 158890 | CEFBS_None, // VPSLLDZ128rm = 19157 |
| 158891 | CEFBS_None, // VPSLLDZ128rmk = 19158 |
| 158892 | CEFBS_None, // VPSLLDZ128rmkz = 19159 |
| 158893 | CEFBS_None, // VPSLLDZ128rr = 19160 |
| 158894 | CEFBS_None, // VPSLLDZ128rrk = 19161 |
| 158895 | CEFBS_None, // VPSLLDZ128rrkz = 19162 |
| 158896 | CEFBS_None, // VPSLLDZ256mbi = 19163 |
| 158897 | CEFBS_None, // VPSLLDZ256mbik = 19164 |
| 158898 | CEFBS_None, // VPSLLDZ256mbikz = 19165 |
| 158899 | CEFBS_None, // VPSLLDZ256mi = 19166 |
| 158900 | CEFBS_None, // VPSLLDZ256mik = 19167 |
| 158901 | CEFBS_None, // VPSLLDZ256mikz = 19168 |
| 158902 | CEFBS_None, // VPSLLDZ256ri = 19169 |
| 158903 | CEFBS_None, // VPSLLDZ256rik = 19170 |
| 158904 | CEFBS_None, // VPSLLDZ256rikz = 19171 |
| 158905 | CEFBS_None, // VPSLLDZ256rm = 19172 |
| 158906 | CEFBS_None, // VPSLLDZ256rmk = 19173 |
| 158907 | CEFBS_None, // VPSLLDZ256rmkz = 19174 |
| 158908 | CEFBS_None, // VPSLLDZ256rr = 19175 |
| 158909 | CEFBS_None, // VPSLLDZ256rrk = 19176 |
| 158910 | CEFBS_None, // VPSLLDZ256rrkz = 19177 |
| 158911 | CEFBS_None, // VPSLLDZmbi = 19178 |
| 158912 | CEFBS_None, // VPSLLDZmbik = 19179 |
| 158913 | CEFBS_None, // VPSLLDZmbikz = 19180 |
| 158914 | CEFBS_None, // VPSLLDZmi = 19181 |
| 158915 | CEFBS_None, // VPSLLDZmik = 19182 |
| 158916 | CEFBS_None, // VPSLLDZmikz = 19183 |
| 158917 | CEFBS_None, // VPSLLDZri = 19184 |
| 158918 | CEFBS_None, // VPSLLDZrik = 19185 |
| 158919 | CEFBS_None, // VPSLLDZrikz = 19186 |
| 158920 | CEFBS_None, // VPSLLDZrm = 19187 |
| 158921 | CEFBS_None, // VPSLLDZrmk = 19188 |
| 158922 | CEFBS_None, // VPSLLDZrmkz = 19189 |
| 158923 | CEFBS_None, // VPSLLDZrr = 19190 |
| 158924 | CEFBS_None, // VPSLLDZrrk = 19191 |
| 158925 | CEFBS_None, // VPSLLDZrrkz = 19192 |
| 158926 | CEFBS_None, // VPSLLDri = 19193 |
| 158927 | CEFBS_None, // VPSLLDrm = 19194 |
| 158928 | CEFBS_None, // VPSLLDrr = 19195 |
| 158929 | CEFBS_None, // VPSLLQYri = 19196 |
| 158930 | CEFBS_None, // VPSLLQYrm = 19197 |
| 158931 | CEFBS_None, // VPSLLQYrr = 19198 |
| 158932 | CEFBS_None, // VPSLLQZ128mbi = 19199 |
| 158933 | CEFBS_None, // VPSLLQZ128mbik = 19200 |
| 158934 | CEFBS_None, // VPSLLQZ128mbikz = 19201 |
| 158935 | CEFBS_None, // VPSLLQZ128mi = 19202 |
| 158936 | CEFBS_None, // VPSLLQZ128mik = 19203 |
| 158937 | CEFBS_None, // VPSLLQZ128mikz = 19204 |
| 158938 | CEFBS_None, // VPSLLQZ128ri = 19205 |
| 158939 | CEFBS_None, // VPSLLQZ128rik = 19206 |
| 158940 | CEFBS_None, // VPSLLQZ128rikz = 19207 |
| 158941 | CEFBS_None, // VPSLLQZ128rm = 19208 |
| 158942 | CEFBS_None, // VPSLLQZ128rmk = 19209 |
| 158943 | CEFBS_None, // VPSLLQZ128rmkz = 19210 |
| 158944 | CEFBS_None, // VPSLLQZ128rr = 19211 |
| 158945 | CEFBS_None, // VPSLLQZ128rrk = 19212 |
| 158946 | CEFBS_None, // VPSLLQZ128rrkz = 19213 |
| 158947 | CEFBS_None, // VPSLLQZ256mbi = 19214 |
| 158948 | CEFBS_None, // VPSLLQZ256mbik = 19215 |
| 158949 | CEFBS_None, // VPSLLQZ256mbikz = 19216 |
| 158950 | CEFBS_None, // VPSLLQZ256mi = 19217 |
| 158951 | CEFBS_None, // VPSLLQZ256mik = 19218 |
| 158952 | CEFBS_None, // VPSLLQZ256mikz = 19219 |
| 158953 | CEFBS_None, // VPSLLQZ256ri = 19220 |
| 158954 | CEFBS_None, // VPSLLQZ256rik = 19221 |
| 158955 | CEFBS_None, // VPSLLQZ256rikz = 19222 |
| 158956 | CEFBS_None, // VPSLLQZ256rm = 19223 |
| 158957 | CEFBS_None, // VPSLLQZ256rmk = 19224 |
| 158958 | CEFBS_None, // VPSLLQZ256rmkz = 19225 |
| 158959 | CEFBS_None, // VPSLLQZ256rr = 19226 |
| 158960 | CEFBS_None, // VPSLLQZ256rrk = 19227 |
| 158961 | CEFBS_None, // VPSLLQZ256rrkz = 19228 |
| 158962 | CEFBS_None, // VPSLLQZmbi = 19229 |
| 158963 | CEFBS_None, // VPSLLQZmbik = 19230 |
| 158964 | CEFBS_None, // VPSLLQZmbikz = 19231 |
| 158965 | CEFBS_None, // VPSLLQZmi = 19232 |
| 158966 | CEFBS_None, // VPSLLQZmik = 19233 |
| 158967 | CEFBS_None, // VPSLLQZmikz = 19234 |
| 158968 | CEFBS_None, // VPSLLQZri = 19235 |
| 158969 | CEFBS_None, // VPSLLQZrik = 19236 |
| 158970 | CEFBS_None, // VPSLLQZrikz = 19237 |
| 158971 | CEFBS_None, // VPSLLQZrm = 19238 |
| 158972 | CEFBS_None, // VPSLLQZrmk = 19239 |
| 158973 | CEFBS_None, // VPSLLQZrmkz = 19240 |
| 158974 | CEFBS_None, // VPSLLQZrr = 19241 |
| 158975 | CEFBS_None, // VPSLLQZrrk = 19242 |
| 158976 | CEFBS_None, // VPSLLQZrrkz = 19243 |
| 158977 | CEFBS_None, // VPSLLQri = 19244 |
| 158978 | CEFBS_None, // VPSLLQrm = 19245 |
| 158979 | CEFBS_None, // VPSLLQrr = 19246 |
| 158980 | CEFBS_None, // VPSLLVDYrm = 19247 |
| 158981 | CEFBS_None, // VPSLLVDYrr = 19248 |
| 158982 | CEFBS_None, // VPSLLVDZ128rm = 19249 |
| 158983 | CEFBS_None, // VPSLLVDZ128rmb = 19250 |
| 158984 | CEFBS_None, // VPSLLVDZ128rmbk = 19251 |
| 158985 | CEFBS_None, // VPSLLVDZ128rmbkz = 19252 |
| 158986 | CEFBS_None, // VPSLLVDZ128rmk = 19253 |
| 158987 | CEFBS_None, // VPSLLVDZ128rmkz = 19254 |
| 158988 | CEFBS_None, // VPSLLVDZ128rr = 19255 |
| 158989 | CEFBS_None, // VPSLLVDZ128rrk = 19256 |
| 158990 | CEFBS_None, // VPSLLVDZ128rrkz = 19257 |
| 158991 | CEFBS_None, // VPSLLVDZ256rm = 19258 |
| 158992 | CEFBS_None, // VPSLLVDZ256rmb = 19259 |
| 158993 | CEFBS_None, // VPSLLVDZ256rmbk = 19260 |
| 158994 | CEFBS_None, // VPSLLVDZ256rmbkz = 19261 |
| 158995 | CEFBS_None, // VPSLLVDZ256rmk = 19262 |
| 158996 | CEFBS_None, // VPSLLVDZ256rmkz = 19263 |
| 158997 | CEFBS_None, // VPSLLVDZ256rr = 19264 |
| 158998 | CEFBS_None, // VPSLLVDZ256rrk = 19265 |
| 158999 | CEFBS_None, // VPSLLVDZ256rrkz = 19266 |
| 159000 | CEFBS_None, // VPSLLVDZrm = 19267 |
| 159001 | CEFBS_None, // VPSLLVDZrmb = 19268 |
| 159002 | CEFBS_None, // VPSLLVDZrmbk = 19269 |
| 159003 | CEFBS_None, // VPSLLVDZrmbkz = 19270 |
| 159004 | CEFBS_None, // VPSLLVDZrmk = 19271 |
| 159005 | CEFBS_None, // VPSLLVDZrmkz = 19272 |
| 159006 | CEFBS_None, // VPSLLVDZrr = 19273 |
| 159007 | CEFBS_None, // VPSLLVDZrrk = 19274 |
| 159008 | CEFBS_None, // VPSLLVDZrrkz = 19275 |
| 159009 | CEFBS_None, // VPSLLVDrm = 19276 |
| 159010 | CEFBS_None, // VPSLLVDrr = 19277 |
| 159011 | CEFBS_None, // VPSLLVQYrm = 19278 |
| 159012 | CEFBS_None, // VPSLLVQYrr = 19279 |
| 159013 | CEFBS_None, // VPSLLVQZ128rm = 19280 |
| 159014 | CEFBS_None, // VPSLLVQZ128rmb = 19281 |
| 159015 | CEFBS_None, // VPSLLVQZ128rmbk = 19282 |
| 159016 | CEFBS_None, // VPSLLVQZ128rmbkz = 19283 |
| 159017 | CEFBS_None, // VPSLLVQZ128rmk = 19284 |
| 159018 | CEFBS_None, // VPSLLVQZ128rmkz = 19285 |
| 159019 | CEFBS_None, // VPSLLVQZ128rr = 19286 |
| 159020 | CEFBS_None, // VPSLLVQZ128rrk = 19287 |
| 159021 | CEFBS_None, // VPSLLVQZ128rrkz = 19288 |
| 159022 | CEFBS_None, // VPSLLVQZ256rm = 19289 |
| 159023 | CEFBS_None, // VPSLLVQZ256rmb = 19290 |
| 159024 | CEFBS_None, // VPSLLVQZ256rmbk = 19291 |
| 159025 | CEFBS_None, // VPSLLVQZ256rmbkz = 19292 |
| 159026 | CEFBS_None, // VPSLLVQZ256rmk = 19293 |
| 159027 | CEFBS_None, // VPSLLVQZ256rmkz = 19294 |
| 159028 | CEFBS_None, // VPSLLVQZ256rr = 19295 |
| 159029 | CEFBS_None, // VPSLLVQZ256rrk = 19296 |
| 159030 | CEFBS_None, // VPSLLVQZ256rrkz = 19297 |
| 159031 | CEFBS_None, // VPSLLVQZrm = 19298 |
| 159032 | CEFBS_None, // VPSLLVQZrmb = 19299 |
| 159033 | CEFBS_None, // VPSLLVQZrmbk = 19300 |
| 159034 | CEFBS_None, // VPSLLVQZrmbkz = 19301 |
| 159035 | CEFBS_None, // VPSLLVQZrmk = 19302 |
| 159036 | CEFBS_None, // VPSLLVQZrmkz = 19303 |
| 159037 | CEFBS_None, // VPSLLVQZrr = 19304 |
| 159038 | CEFBS_None, // VPSLLVQZrrk = 19305 |
| 159039 | CEFBS_None, // VPSLLVQZrrkz = 19306 |
| 159040 | CEFBS_None, // VPSLLVQrm = 19307 |
| 159041 | CEFBS_None, // VPSLLVQrr = 19308 |
| 159042 | CEFBS_None, // VPSLLVWZ128rm = 19309 |
| 159043 | CEFBS_None, // VPSLLVWZ128rmk = 19310 |
| 159044 | CEFBS_None, // VPSLLVWZ128rmkz = 19311 |
| 159045 | CEFBS_None, // VPSLLVWZ128rr = 19312 |
| 159046 | CEFBS_None, // VPSLLVWZ128rrk = 19313 |
| 159047 | CEFBS_None, // VPSLLVWZ128rrkz = 19314 |
| 159048 | CEFBS_None, // VPSLLVWZ256rm = 19315 |
| 159049 | CEFBS_None, // VPSLLVWZ256rmk = 19316 |
| 159050 | CEFBS_None, // VPSLLVWZ256rmkz = 19317 |
| 159051 | CEFBS_None, // VPSLLVWZ256rr = 19318 |
| 159052 | CEFBS_None, // VPSLLVWZ256rrk = 19319 |
| 159053 | CEFBS_None, // VPSLLVWZ256rrkz = 19320 |
| 159054 | CEFBS_None, // VPSLLVWZrm = 19321 |
| 159055 | CEFBS_None, // VPSLLVWZrmk = 19322 |
| 159056 | CEFBS_None, // VPSLLVWZrmkz = 19323 |
| 159057 | CEFBS_None, // VPSLLVWZrr = 19324 |
| 159058 | CEFBS_None, // VPSLLVWZrrk = 19325 |
| 159059 | CEFBS_None, // VPSLLVWZrrkz = 19326 |
| 159060 | CEFBS_None, // VPSLLWYri = 19327 |
| 159061 | CEFBS_None, // VPSLLWYrm = 19328 |
| 159062 | CEFBS_None, // VPSLLWYrr = 19329 |
| 159063 | CEFBS_None, // VPSLLWZ128mi = 19330 |
| 159064 | CEFBS_None, // VPSLLWZ128mik = 19331 |
| 159065 | CEFBS_None, // VPSLLWZ128mikz = 19332 |
| 159066 | CEFBS_None, // VPSLLWZ128ri = 19333 |
| 159067 | CEFBS_None, // VPSLLWZ128rik = 19334 |
| 159068 | CEFBS_None, // VPSLLWZ128rikz = 19335 |
| 159069 | CEFBS_None, // VPSLLWZ128rm = 19336 |
| 159070 | CEFBS_None, // VPSLLWZ128rmk = 19337 |
| 159071 | CEFBS_None, // VPSLLWZ128rmkz = 19338 |
| 159072 | CEFBS_None, // VPSLLWZ128rr = 19339 |
| 159073 | CEFBS_None, // VPSLLWZ128rrk = 19340 |
| 159074 | CEFBS_None, // VPSLLWZ128rrkz = 19341 |
| 159075 | CEFBS_None, // VPSLLWZ256mi = 19342 |
| 159076 | CEFBS_None, // VPSLLWZ256mik = 19343 |
| 159077 | CEFBS_None, // VPSLLWZ256mikz = 19344 |
| 159078 | CEFBS_None, // VPSLLWZ256ri = 19345 |
| 159079 | CEFBS_None, // VPSLLWZ256rik = 19346 |
| 159080 | CEFBS_None, // VPSLLWZ256rikz = 19347 |
| 159081 | CEFBS_None, // VPSLLWZ256rm = 19348 |
| 159082 | CEFBS_None, // VPSLLWZ256rmk = 19349 |
| 159083 | CEFBS_None, // VPSLLWZ256rmkz = 19350 |
| 159084 | CEFBS_None, // VPSLLWZ256rr = 19351 |
| 159085 | CEFBS_None, // VPSLLWZ256rrk = 19352 |
| 159086 | CEFBS_None, // VPSLLWZ256rrkz = 19353 |
| 159087 | CEFBS_None, // VPSLLWZmi = 19354 |
| 159088 | CEFBS_None, // VPSLLWZmik = 19355 |
| 159089 | CEFBS_None, // VPSLLWZmikz = 19356 |
| 159090 | CEFBS_None, // VPSLLWZri = 19357 |
| 159091 | CEFBS_None, // VPSLLWZrik = 19358 |
| 159092 | CEFBS_None, // VPSLLWZrikz = 19359 |
| 159093 | CEFBS_None, // VPSLLWZrm = 19360 |
| 159094 | CEFBS_None, // VPSLLWZrmk = 19361 |
| 159095 | CEFBS_None, // VPSLLWZrmkz = 19362 |
| 159096 | CEFBS_None, // VPSLLWZrr = 19363 |
| 159097 | CEFBS_None, // VPSLLWZrrk = 19364 |
| 159098 | CEFBS_None, // VPSLLWZrrkz = 19365 |
| 159099 | CEFBS_None, // VPSLLWri = 19366 |
| 159100 | CEFBS_None, // VPSLLWrm = 19367 |
| 159101 | CEFBS_None, // VPSLLWrr = 19368 |
| 159102 | CEFBS_None, // VPSRADYri = 19369 |
| 159103 | CEFBS_None, // VPSRADYrm = 19370 |
| 159104 | CEFBS_None, // VPSRADYrr = 19371 |
| 159105 | CEFBS_None, // VPSRADZ128mbi = 19372 |
| 159106 | CEFBS_None, // VPSRADZ128mbik = 19373 |
| 159107 | CEFBS_None, // VPSRADZ128mbikz = 19374 |
| 159108 | CEFBS_None, // VPSRADZ128mi = 19375 |
| 159109 | CEFBS_None, // VPSRADZ128mik = 19376 |
| 159110 | CEFBS_None, // VPSRADZ128mikz = 19377 |
| 159111 | CEFBS_None, // VPSRADZ128ri = 19378 |
| 159112 | CEFBS_None, // VPSRADZ128rik = 19379 |
| 159113 | CEFBS_None, // VPSRADZ128rikz = 19380 |
| 159114 | CEFBS_None, // VPSRADZ128rm = 19381 |
| 159115 | CEFBS_None, // VPSRADZ128rmk = 19382 |
| 159116 | CEFBS_None, // VPSRADZ128rmkz = 19383 |
| 159117 | CEFBS_None, // VPSRADZ128rr = 19384 |
| 159118 | CEFBS_None, // VPSRADZ128rrk = 19385 |
| 159119 | CEFBS_None, // VPSRADZ128rrkz = 19386 |
| 159120 | CEFBS_None, // VPSRADZ256mbi = 19387 |
| 159121 | CEFBS_None, // VPSRADZ256mbik = 19388 |
| 159122 | CEFBS_None, // VPSRADZ256mbikz = 19389 |
| 159123 | CEFBS_None, // VPSRADZ256mi = 19390 |
| 159124 | CEFBS_None, // VPSRADZ256mik = 19391 |
| 159125 | CEFBS_None, // VPSRADZ256mikz = 19392 |
| 159126 | CEFBS_None, // VPSRADZ256ri = 19393 |
| 159127 | CEFBS_None, // VPSRADZ256rik = 19394 |
| 159128 | CEFBS_None, // VPSRADZ256rikz = 19395 |
| 159129 | CEFBS_None, // VPSRADZ256rm = 19396 |
| 159130 | CEFBS_None, // VPSRADZ256rmk = 19397 |
| 159131 | CEFBS_None, // VPSRADZ256rmkz = 19398 |
| 159132 | CEFBS_None, // VPSRADZ256rr = 19399 |
| 159133 | CEFBS_None, // VPSRADZ256rrk = 19400 |
| 159134 | CEFBS_None, // VPSRADZ256rrkz = 19401 |
| 159135 | CEFBS_None, // VPSRADZmbi = 19402 |
| 159136 | CEFBS_None, // VPSRADZmbik = 19403 |
| 159137 | CEFBS_None, // VPSRADZmbikz = 19404 |
| 159138 | CEFBS_None, // VPSRADZmi = 19405 |
| 159139 | CEFBS_None, // VPSRADZmik = 19406 |
| 159140 | CEFBS_None, // VPSRADZmikz = 19407 |
| 159141 | CEFBS_None, // VPSRADZri = 19408 |
| 159142 | CEFBS_None, // VPSRADZrik = 19409 |
| 159143 | CEFBS_None, // VPSRADZrikz = 19410 |
| 159144 | CEFBS_None, // VPSRADZrm = 19411 |
| 159145 | CEFBS_None, // VPSRADZrmk = 19412 |
| 159146 | CEFBS_None, // VPSRADZrmkz = 19413 |
| 159147 | CEFBS_None, // VPSRADZrr = 19414 |
| 159148 | CEFBS_None, // VPSRADZrrk = 19415 |
| 159149 | CEFBS_None, // VPSRADZrrkz = 19416 |
| 159150 | CEFBS_None, // VPSRADri = 19417 |
| 159151 | CEFBS_None, // VPSRADrm = 19418 |
| 159152 | CEFBS_None, // VPSRADrr = 19419 |
| 159153 | CEFBS_None, // VPSRAQZ128mbi = 19420 |
| 159154 | CEFBS_None, // VPSRAQZ128mbik = 19421 |
| 159155 | CEFBS_None, // VPSRAQZ128mbikz = 19422 |
| 159156 | CEFBS_None, // VPSRAQZ128mi = 19423 |
| 159157 | CEFBS_None, // VPSRAQZ128mik = 19424 |
| 159158 | CEFBS_None, // VPSRAQZ128mikz = 19425 |
| 159159 | CEFBS_None, // VPSRAQZ128ri = 19426 |
| 159160 | CEFBS_None, // VPSRAQZ128rik = 19427 |
| 159161 | CEFBS_None, // VPSRAQZ128rikz = 19428 |
| 159162 | CEFBS_None, // VPSRAQZ128rm = 19429 |
| 159163 | CEFBS_None, // VPSRAQZ128rmk = 19430 |
| 159164 | CEFBS_None, // VPSRAQZ128rmkz = 19431 |
| 159165 | CEFBS_None, // VPSRAQZ128rr = 19432 |
| 159166 | CEFBS_None, // VPSRAQZ128rrk = 19433 |
| 159167 | CEFBS_None, // VPSRAQZ128rrkz = 19434 |
| 159168 | CEFBS_None, // VPSRAQZ256mbi = 19435 |
| 159169 | CEFBS_None, // VPSRAQZ256mbik = 19436 |
| 159170 | CEFBS_None, // VPSRAQZ256mbikz = 19437 |
| 159171 | CEFBS_None, // VPSRAQZ256mi = 19438 |
| 159172 | CEFBS_None, // VPSRAQZ256mik = 19439 |
| 159173 | CEFBS_None, // VPSRAQZ256mikz = 19440 |
| 159174 | CEFBS_None, // VPSRAQZ256ri = 19441 |
| 159175 | CEFBS_None, // VPSRAQZ256rik = 19442 |
| 159176 | CEFBS_None, // VPSRAQZ256rikz = 19443 |
| 159177 | CEFBS_None, // VPSRAQZ256rm = 19444 |
| 159178 | CEFBS_None, // VPSRAQZ256rmk = 19445 |
| 159179 | CEFBS_None, // VPSRAQZ256rmkz = 19446 |
| 159180 | CEFBS_None, // VPSRAQZ256rr = 19447 |
| 159181 | CEFBS_None, // VPSRAQZ256rrk = 19448 |
| 159182 | CEFBS_None, // VPSRAQZ256rrkz = 19449 |
| 159183 | CEFBS_None, // VPSRAQZmbi = 19450 |
| 159184 | CEFBS_None, // VPSRAQZmbik = 19451 |
| 159185 | CEFBS_None, // VPSRAQZmbikz = 19452 |
| 159186 | CEFBS_None, // VPSRAQZmi = 19453 |
| 159187 | CEFBS_None, // VPSRAQZmik = 19454 |
| 159188 | CEFBS_None, // VPSRAQZmikz = 19455 |
| 159189 | CEFBS_None, // VPSRAQZri = 19456 |
| 159190 | CEFBS_None, // VPSRAQZrik = 19457 |
| 159191 | CEFBS_None, // VPSRAQZrikz = 19458 |
| 159192 | CEFBS_None, // VPSRAQZrm = 19459 |
| 159193 | CEFBS_None, // VPSRAQZrmk = 19460 |
| 159194 | CEFBS_None, // VPSRAQZrmkz = 19461 |
| 159195 | CEFBS_None, // VPSRAQZrr = 19462 |
| 159196 | CEFBS_None, // VPSRAQZrrk = 19463 |
| 159197 | CEFBS_None, // VPSRAQZrrkz = 19464 |
| 159198 | CEFBS_None, // VPSRAVDYrm = 19465 |
| 159199 | CEFBS_None, // VPSRAVDYrr = 19466 |
| 159200 | CEFBS_None, // VPSRAVDZ128rm = 19467 |
| 159201 | CEFBS_None, // VPSRAVDZ128rmb = 19468 |
| 159202 | CEFBS_None, // VPSRAVDZ128rmbk = 19469 |
| 159203 | CEFBS_None, // VPSRAVDZ128rmbkz = 19470 |
| 159204 | CEFBS_None, // VPSRAVDZ128rmk = 19471 |
| 159205 | CEFBS_None, // VPSRAVDZ128rmkz = 19472 |
| 159206 | CEFBS_None, // VPSRAVDZ128rr = 19473 |
| 159207 | CEFBS_None, // VPSRAVDZ128rrk = 19474 |
| 159208 | CEFBS_None, // VPSRAVDZ128rrkz = 19475 |
| 159209 | CEFBS_None, // VPSRAVDZ256rm = 19476 |
| 159210 | CEFBS_None, // VPSRAVDZ256rmb = 19477 |
| 159211 | CEFBS_None, // VPSRAVDZ256rmbk = 19478 |
| 159212 | CEFBS_None, // VPSRAVDZ256rmbkz = 19479 |
| 159213 | CEFBS_None, // VPSRAVDZ256rmk = 19480 |
| 159214 | CEFBS_None, // VPSRAVDZ256rmkz = 19481 |
| 159215 | CEFBS_None, // VPSRAVDZ256rr = 19482 |
| 159216 | CEFBS_None, // VPSRAVDZ256rrk = 19483 |
| 159217 | CEFBS_None, // VPSRAVDZ256rrkz = 19484 |
| 159218 | CEFBS_None, // VPSRAVDZrm = 19485 |
| 159219 | CEFBS_None, // VPSRAVDZrmb = 19486 |
| 159220 | CEFBS_None, // VPSRAVDZrmbk = 19487 |
| 159221 | CEFBS_None, // VPSRAVDZrmbkz = 19488 |
| 159222 | CEFBS_None, // VPSRAVDZrmk = 19489 |
| 159223 | CEFBS_None, // VPSRAVDZrmkz = 19490 |
| 159224 | CEFBS_None, // VPSRAVDZrr = 19491 |
| 159225 | CEFBS_None, // VPSRAVDZrrk = 19492 |
| 159226 | CEFBS_None, // VPSRAVDZrrkz = 19493 |
| 159227 | CEFBS_None, // VPSRAVDrm = 19494 |
| 159228 | CEFBS_None, // VPSRAVDrr = 19495 |
| 159229 | CEFBS_None, // VPSRAVQZ128rm = 19496 |
| 159230 | CEFBS_None, // VPSRAVQZ128rmb = 19497 |
| 159231 | CEFBS_None, // VPSRAVQZ128rmbk = 19498 |
| 159232 | CEFBS_None, // VPSRAVQZ128rmbkz = 19499 |
| 159233 | CEFBS_None, // VPSRAVQZ128rmk = 19500 |
| 159234 | CEFBS_None, // VPSRAVQZ128rmkz = 19501 |
| 159235 | CEFBS_None, // VPSRAVQZ128rr = 19502 |
| 159236 | CEFBS_None, // VPSRAVQZ128rrk = 19503 |
| 159237 | CEFBS_None, // VPSRAVQZ128rrkz = 19504 |
| 159238 | CEFBS_None, // VPSRAVQZ256rm = 19505 |
| 159239 | CEFBS_None, // VPSRAVQZ256rmb = 19506 |
| 159240 | CEFBS_None, // VPSRAVQZ256rmbk = 19507 |
| 159241 | CEFBS_None, // VPSRAVQZ256rmbkz = 19508 |
| 159242 | CEFBS_None, // VPSRAVQZ256rmk = 19509 |
| 159243 | CEFBS_None, // VPSRAVQZ256rmkz = 19510 |
| 159244 | CEFBS_None, // VPSRAVQZ256rr = 19511 |
| 159245 | CEFBS_None, // VPSRAVQZ256rrk = 19512 |
| 159246 | CEFBS_None, // VPSRAVQZ256rrkz = 19513 |
| 159247 | CEFBS_None, // VPSRAVQZrm = 19514 |
| 159248 | CEFBS_None, // VPSRAVQZrmb = 19515 |
| 159249 | CEFBS_None, // VPSRAVQZrmbk = 19516 |
| 159250 | CEFBS_None, // VPSRAVQZrmbkz = 19517 |
| 159251 | CEFBS_None, // VPSRAVQZrmk = 19518 |
| 159252 | CEFBS_None, // VPSRAVQZrmkz = 19519 |
| 159253 | CEFBS_None, // VPSRAVQZrr = 19520 |
| 159254 | CEFBS_None, // VPSRAVQZrrk = 19521 |
| 159255 | CEFBS_None, // VPSRAVQZrrkz = 19522 |
| 159256 | CEFBS_None, // VPSRAVWZ128rm = 19523 |
| 159257 | CEFBS_None, // VPSRAVWZ128rmk = 19524 |
| 159258 | CEFBS_None, // VPSRAVWZ128rmkz = 19525 |
| 159259 | CEFBS_None, // VPSRAVWZ128rr = 19526 |
| 159260 | CEFBS_None, // VPSRAVWZ128rrk = 19527 |
| 159261 | CEFBS_None, // VPSRAVWZ128rrkz = 19528 |
| 159262 | CEFBS_None, // VPSRAVWZ256rm = 19529 |
| 159263 | CEFBS_None, // VPSRAVWZ256rmk = 19530 |
| 159264 | CEFBS_None, // VPSRAVWZ256rmkz = 19531 |
| 159265 | CEFBS_None, // VPSRAVWZ256rr = 19532 |
| 159266 | CEFBS_None, // VPSRAVWZ256rrk = 19533 |
| 159267 | CEFBS_None, // VPSRAVWZ256rrkz = 19534 |
| 159268 | CEFBS_None, // VPSRAVWZrm = 19535 |
| 159269 | CEFBS_None, // VPSRAVWZrmk = 19536 |
| 159270 | CEFBS_None, // VPSRAVWZrmkz = 19537 |
| 159271 | CEFBS_None, // VPSRAVWZrr = 19538 |
| 159272 | CEFBS_None, // VPSRAVWZrrk = 19539 |
| 159273 | CEFBS_None, // VPSRAVWZrrkz = 19540 |
| 159274 | CEFBS_None, // VPSRAWYri = 19541 |
| 159275 | CEFBS_None, // VPSRAWYrm = 19542 |
| 159276 | CEFBS_None, // VPSRAWYrr = 19543 |
| 159277 | CEFBS_None, // VPSRAWZ128mi = 19544 |
| 159278 | CEFBS_None, // VPSRAWZ128mik = 19545 |
| 159279 | CEFBS_None, // VPSRAWZ128mikz = 19546 |
| 159280 | CEFBS_None, // VPSRAWZ128ri = 19547 |
| 159281 | CEFBS_None, // VPSRAWZ128rik = 19548 |
| 159282 | CEFBS_None, // VPSRAWZ128rikz = 19549 |
| 159283 | CEFBS_None, // VPSRAWZ128rm = 19550 |
| 159284 | CEFBS_None, // VPSRAWZ128rmk = 19551 |
| 159285 | CEFBS_None, // VPSRAWZ128rmkz = 19552 |
| 159286 | CEFBS_None, // VPSRAWZ128rr = 19553 |
| 159287 | CEFBS_None, // VPSRAWZ128rrk = 19554 |
| 159288 | CEFBS_None, // VPSRAWZ128rrkz = 19555 |
| 159289 | CEFBS_None, // VPSRAWZ256mi = 19556 |
| 159290 | CEFBS_None, // VPSRAWZ256mik = 19557 |
| 159291 | CEFBS_None, // VPSRAWZ256mikz = 19558 |
| 159292 | CEFBS_None, // VPSRAWZ256ri = 19559 |
| 159293 | CEFBS_None, // VPSRAWZ256rik = 19560 |
| 159294 | CEFBS_None, // VPSRAWZ256rikz = 19561 |
| 159295 | CEFBS_None, // VPSRAWZ256rm = 19562 |
| 159296 | CEFBS_None, // VPSRAWZ256rmk = 19563 |
| 159297 | CEFBS_None, // VPSRAWZ256rmkz = 19564 |
| 159298 | CEFBS_None, // VPSRAWZ256rr = 19565 |
| 159299 | CEFBS_None, // VPSRAWZ256rrk = 19566 |
| 159300 | CEFBS_None, // VPSRAWZ256rrkz = 19567 |
| 159301 | CEFBS_None, // VPSRAWZmi = 19568 |
| 159302 | CEFBS_None, // VPSRAWZmik = 19569 |
| 159303 | CEFBS_None, // VPSRAWZmikz = 19570 |
| 159304 | CEFBS_None, // VPSRAWZri = 19571 |
| 159305 | CEFBS_None, // VPSRAWZrik = 19572 |
| 159306 | CEFBS_None, // VPSRAWZrikz = 19573 |
| 159307 | CEFBS_None, // VPSRAWZrm = 19574 |
| 159308 | CEFBS_None, // VPSRAWZrmk = 19575 |
| 159309 | CEFBS_None, // VPSRAWZrmkz = 19576 |
| 159310 | CEFBS_None, // VPSRAWZrr = 19577 |
| 159311 | CEFBS_None, // VPSRAWZrrk = 19578 |
| 159312 | CEFBS_None, // VPSRAWZrrkz = 19579 |
| 159313 | CEFBS_None, // VPSRAWri = 19580 |
| 159314 | CEFBS_None, // VPSRAWrm = 19581 |
| 159315 | CEFBS_None, // VPSRAWrr = 19582 |
| 159316 | CEFBS_None, // VPSRLDQYri = 19583 |
| 159317 | CEFBS_None, // VPSRLDQZ128mi = 19584 |
| 159318 | CEFBS_None, // VPSRLDQZ128ri = 19585 |
| 159319 | CEFBS_None, // VPSRLDQZ256mi = 19586 |
| 159320 | CEFBS_None, // VPSRLDQZ256ri = 19587 |
| 159321 | CEFBS_None, // VPSRLDQZmi = 19588 |
| 159322 | CEFBS_None, // VPSRLDQZri = 19589 |
| 159323 | CEFBS_None, // VPSRLDQri = 19590 |
| 159324 | CEFBS_None, // VPSRLDYri = 19591 |
| 159325 | CEFBS_None, // VPSRLDYrm = 19592 |
| 159326 | CEFBS_None, // VPSRLDYrr = 19593 |
| 159327 | CEFBS_None, // VPSRLDZ128mbi = 19594 |
| 159328 | CEFBS_None, // VPSRLDZ128mbik = 19595 |
| 159329 | CEFBS_None, // VPSRLDZ128mbikz = 19596 |
| 159330 | CEFBS_None, // VPSRLDZ128mi = 19597 |
| 159331 | CEFBS_None, // VPSRLDZ128mik = 19598 |
| 159332 | CEFBS_None, // VPSRLDZ128mikz = 19599 |
| 159333 | CEFBS_None, // VPSRLDZ128ri = 19600 |
| 159334 | CEFBS_None, // VPSRLDZ128rik = 19601 |
| 159335 | CEFBS_None, // VPSRLDZ128rikz = 19602 |
| 159336 | CEFBS_None, // VPSRLDZ128rm = 19603 |
| 159337 | CEFBS_None, // VPSRLDZ128rmk = 19604 |
| 159338 | CEFBS_None, // VPSRLDZ128rmkz = 19605 |
| 159339 | CEFBS_None, // VPSRLDZ128rr = 19606 |
| 159340 | CEFBS_None, // VPSRLDZ128rrk = 19607 |
| 159341 | CEFBS_None, // VPSRLDZ128rrkz = 19608 |
| 159342 | CEFBS_None, // VPSRLDZ256mbi = 19609 |
| 159343 | CEFBS_None, // VPSRLDZ256mbik = 19610 |
| 159344 | CEFBS_None, // VPSRLDZ256mbikz = 19611 |
| 159345 | CEFBS_None, // VPSRLDZ256mi = 19612 |
| 159346 | CEFBS_None, // VPSRLDZ256mik = 19613 |
| 159347 | CEFBS_None, // VPSRLDZ256mikz = 19614 |
| 159348 | CEFBS_None, // VPSRLDZ256ri = 19615 |
| 159349 | CEFBS_None, // VPSRLDZ256rik = 19616 |
| 159350 | CEFBS_None, // VPSRLDZ256rikz = 19617 |
| 159351 | CEFBS_None, // VPSRLDZ256rm = 19618 |
| 159352 | CEFBS_None, // VPSRLDZ256rmk = 19619 |
| 159353 | CEFBS_None, // VPSRLDZ256rmkz = 19620 |
| 159354 | CEFBS_None, // VPSRLDZ256rr = 19621 |
| 159355 | CEFBS_None, // VPSRLDZ256rrk = 19622 |
| 159356 | CEFBS_None, // VPSRLDZ256rrkz = 19623 |
| 159357 | CEFBS_None, // VPSRLDZmbi = 19624 |
| 159358 | CEFBS_None, // VPSRLDZmbik = 19625 |
| 159359 | CEFBS_None, // VPSRLDZmbikz = 19626 |
| 159360 | CEFBS_None, // VPSRLDZmi = 19627 |
| 159361 | CEFBS_None, // VPSRLDZmik = 19628 |
| 159362 | CEFBS_None, // VPSRLDZmikz = 19629 |
| 159363 | CEFBS_None, // VPSRLDZri = 19630 |
| 159364 | CEFBS_None, // VPSRLDZrik = 19631 |
| 159365 | CEFBS_None, // VPSRLDZrikz = 19632 |
| 159366 | CEFBS_None, // VPSRLDZrm = 19633 |
| 159367 | CEFBS_None, // VPSRLDZrmk = 19634 |
| 159368 | CEFBS_None, // VPSRLDZrmkz = 19635 |
| 159369 | CEFBS_None, // VPSRLDZrr = 19636 |
| 159370 | CEFBS_None, // VPSRLDZrrk = 19637 |
| 159371 | CEFBS_None, // VPSRLDZrrkz = 19638 |
| 159372 | CEFBS_None, // VPSRLDri = 19639 |
| 159373 | CEFBS_None, // VPSRLDrm = 19640 |
| 159374 | CEFBS_None, // VPSRLDrr = 19641 |
| 159375 | CEFBS_None, // VPSRLQYri = 19642 |
| 159376 | CEFBS_None, // VPSRLQYrm = 19643 |
| 159377 | CEFBS_None, // VPSRLQYrr = 19644 |
| 159378 | CEFBS_None, // VPSRLQZ128mbi = 19645 |
| 159379 | CEFBS_None, // VPSRLQZ128mbik = 19646 |
| 159380 | CEFBS_None, // VPSRLQZ128mbikz = 19647 |
| 159381 | CEFBS_None, // VPSRLQZ128mi = 19648 |
| 159382 | CEFBS_None, // VPSRLQZ128mik = 19649 |
| 159383 | CEFBS_None, // VPSRLQZ128mikz = 19650 |
| 159384 | CEFBS_None, // VPSRLQZ128ri = 19651 |
| 159385 | CEFBS_None, // VPSRLQZ128rik = 19652 |
| 159386 | CEFBS_None, // VPSRLQZ128rikz = 19653 |
| 159387 | CEFBS_None, // VPSRLQZ128rm = 19654 |
| 159388 | CEFBS_None, // VPSRLQZ128rmk = 19655 |
| 159389 | CEFBS_None, // VPSRLQZ128rmkz = 19656 |
| 159390 | CEFBS_None, // VPSRLQZ128rr = 19657 |
| 159391 | CEFBS_None, // VPSRLQZ128rrk = 19658 |
| 159392 | CEFBS_None, // VPSRLQZ128rrkz = 19659 |
| 159393 | CEFBS_None, // VPSRLQZ256mbi = 19660 |
| 159394 | CEFBS_None, // VPSRLQZ256mbik = 19661 |
| 159395 | CEFBS_None, // VPSRLQZ256mbikz = 19662 |
| 159396 | CEFBS_None, // VPSRLQZ256mi = 19663 |
| 159397 | CEFBS_None, // VPSRLQZ256mik = 19664 |
| 159398 | CEFBS_None, // VPSRLQZ256mikz = 19665 |
| 159399 | CEFBS_None, // VPSRLQZ256ri = 19666 |
| 159400 | CEFBS_None, // VPSRLQZ256rik = 19667 |
| 159401 | CEFBS_None, // VPSRLQZ256rikz = 19668 |
| 159402 | CEFBS_None, // VPSRLQZ256rm = 19669 |
| 159403 | CEFBS_None, // VPSRLQZ256rmk = 19670 |
| 159404 | CEFBS_None, // VPSRLQZ256rmkz = 19671 |
| 159405 | CEFBS_None, // VPSRLQZ256rr = 19672 |
| 159406 | CEFBS_None, // VPSRLQZ256rrk = 19673 |
| 159407 | CEFBS_None, // VPSRLQZ256rrkz = 19674 |
| 159408 | CEFBS_None, // VPSRLQZmbi = 19675 |
| 159409 | CEFBS_None, // VPSRLQZmbik = 19676 |
| 159410 | CEFBS_None, // VPSRLQZmbikz = 19677 |
| 159411 | CEFBS_None, // VPSRLQZmi = 19678 |
| 159412 | CEFBS_None, // VPSRLQZmik = 19679 |
| 159413 | CEFBS_None, // VPSRLQZmikz = 19680 |
| 159414 | CEFBS_None, // VPSRLQZri = 19681 |
| 159415 | CEFBS_None, // VPSRLQZrik = 19682 |
| 159416 | CEFBS_None, // VPSRLQZrikz = 19683 |
| 159417 | CEFBS_None, // VPSRLQZrm = 19684 |
| 159418 | CEFBS_None, // VPSRLQZrmk = 19685 |
| 159419 | CEFBS_None, // VPSRLQZrmkz = 19686 |
| 159420 | CEFBS_None, // VPSRLQZrr = 19687 |
| 159421 | CEFBS_None, // VPSRLQZrrk = 19688 |
| 159422 | CEFBS_None, // VPSRLQZrrkz = 19689 |
| 159423 | CEFBS_None, // VPSRLQri = 19690 |
| 159424 | CEFBS_None, // VPSRLQrm = 19691 |
| 159425 | CEFBS_None, // VPSRLQrr = 19692 |
| 159426 | CEFBS_None, // VPSRLVDYrm = 19693 |
| 159427 | CEFBS_None, // VPSRLVDYrr = 19694 |
| 159428 | CEFBS_None, // VPSRLVDZ128rm = 19695 |
| 159429 | CEFBS_None, // VPSRLVDZ128rmb = 19696 |
| 159430 | CEFBS_None, // VPSRLVDZ128rmbk = 19697 |
| 159431 | CEFBS_None, // VPSRLVDZ128rmbkz = 19698 |
| 159432 | CEFBS_None, // VPSRLVDZ128rmk = 19699 |
| 159433 | CEFBS_None, // VPSRLVDZ128rmkz = 19700 |
| 159434 | CEFBS_None, // VPSRLVDZ128rr = 19701 |
| 159435 | CEFBS_None, // VPSRLVDZ128rrk = 19702 |
| 159436 | CEFBS_None, // VPSRLVDZ128rrkz = 19703 |
| 159437 | CEFBS_None, // VPSRLVDZ256rm = 19704 |
| 159438 | CEFBS_None, // VPSRLVDZ256rmb = 19705 |
| 159439 | CEFBS_None, // VPSRLVDZ256rmbk = 19706 |
| 159440 | CEFBS_None, // VPSRLVDZ256rmbkz = 19707 |
| 159441 | CEFBS_None, // VPSRLVDZ256rmk = 19708 |
| 159442 | CEFBS_None, // VPSRLVDZ256rmkz = 19709 |
| 159443 | CEFBS_None, // VPSRLVDZ256rr = 19710 |
| 159444 | CEFBS_None, // VPSRLVDZ256rrk = 19711 |
| 159445 | CEFBS_None, // VPSRLVDZ256rrkz = 19712 |
| 159446 | CEFBS_None, // VPSRLVDZrm = 19713 |
| 159447 | CEFBS_None, // VPSRLVDZrmb = 19714 |
| 159448 | CEFBS_None, // VPSRLVDZrmbk = 19715 |
| 159449 | CEFBS_None, // VPSRLVDZrmbkz = 19716 |
| 159450 | CEFBS_None, // VPSRLVDZrmk = 19717 |
| 159451 | CEFBS_None, // VPSRLVDZrmkz = 19718 |
| 159452 | CEFBS_None, // VPSRLVDZrr = 19719 |
| 159453 | CEFBS_None, // VPSRLVDZrrk = 19720 |
| 159454 | CEFBS_None, // VPSRLVDZrrkz = 19721 |
| 159455 | CEFBS_None, // VPSRLVDrm = 19722 |
| 159456 | CEFBS_None, // VPSRLVDrr = 19723 |
| 159457 | CEFBS_None, // VPSRLVQYrm = 19724 |
| 159458 | CEFBS_None, // VPSRLVQYrr = 19725 |
| 159459 | CEFBS_None, // VPSRLVQZ128rm = 19726 |
| 159460 | CEFBS_None, // VPSRLVQZ128rmb = 19727 |
| 159461 | CEFBS_None, // VPSRLVQZ128rmbk = 19728 |
| 159462 | CEFBS_None, // VPSRLVQZ128rmbkz = 19729 |
| 159463 | CEFBS_None, // VPSRLVQZ128rmk = 19730 |
| 159464 | CEFBS_None, // VPSRLVQZ128rmkz = 19731 |
| 159465 | CEFBS_None, // VPSRLVQZ128rr = 19732 |
| 159466 | CEFBS_None, // VPSRLVQZ128rrk = 19733 |
| 159467 | CEFBS_None, // VPSRLVQZ128rrkz = 19734 |
| 159468 | CEFBS_None, // VPSRLVQZ256rm = 19735 |
| 159469 | CEFBS_None, // VPSRLVQZ256rmb = 19736 |
| 159470 | CEFBS_None, // VPSRLVQZ256rmbk = 19737 |
| 159471 | CEFBS_None, // VPSRLVQZ256rmbkz = 19738 |
| 159472 | CEFBS_None, // VPSRLVQZ256rmk = 19739 |
| 159473 | CEFBS_None, // VPSRLVQZ256rmkz = 19740 |
| 159474 | CEFBS_None, // VPSRLVQZ256rr = 19741 |
| 159475 | CEFBS_None, // VPSRLVQZ256rrk = 19742 |
| 159476 | CEFBS_None, // VPSRLVQZ256rrkz = 19743 |
| 159477 | CEFBS_None, // VPSRLVQZrm = 19744 |
| 159478 | CEFBS_None, // VPSRLVQZrmb = 19745 |
| 159479 | CEFBS_None, // VPSRLVQZrmbk = 19746 |
| 159480 | CEFBS_None, // VPSRLVQZrmbkz = 19747 |
| 159481 | CEFBS_None, // VPSRLVQZrmk = 19748 |
| 159482 | CEFBS_None, // VPSRLVQZrmkz = 19749 |
| 159483 | CEFBS_None, // VPSRLVQZrr = 19750 |
| 159484 | CEFBS_None, // VPSRLVQZrrk = 19751 |
| 159485 | CEFBS_None, // VPSRLVQZrrkz = 19752 |
| 159486 | CEFBS_None, // VPSRLVQrm = 19753 |
| 159487 | CEFBS_None, // VPSRLVQrr = 19754 |
| 159488 | CEFBS_None, // VPSRLVWZ128rm = 19755 |
| 159489 | CEFBS_None, // VPSRLVWZ128rmk = 19756 |
| 159490 | CEFBS_None, // VPSRLVWZ128rmkz = 19757 |
| 159491 | CEFBS_None, // VPSRLVWZ128rr = 19758 |
| 159492 | CEFBS_None, // VPSRLVWZ128rrk = 19759 |
| 159493 | CEFBS_None, // VPSRLVWZ128rrkz = 19760 |
| 159494 | CEFBS_None, // VPSRLVWZ256rm = 19761 |
| 159495 | CEFBS_None, // VPSRLVWZ256rmk = 19762 |
| 159496 | CEFBS_None, // VPSRLVWZ256rmkz = 19763 |
| 159497 | CEFBS_None, // VPSRLVWZ256rr = 19764 |
| 159498 | CEFBS_None, // VPSRLVWZ256rrk = 19765 |
| 159499 | CEFBS_None, // VPSRLVWZ256rrkz = 19766 |
| 159500 | CEFBS_None, // VPSRLVWZrm = 19767 |
| 159501 | CEFBS_None, // VPSRLVWZrmk = 19768 |
| 159502 | CEFBS_None, // VPSRLVWZrmkz = 19769 |
| 159503 | CEFBS_None, // VPSRLVWZrr = 19770 |
| 159504 | CEFBS_None, // VPSRLVWZrrk = 19771 |
| 159505 | CEFBS_None, // VPSRLVWZrrkz = 19772 |
| 159506 | CEFBS_None, // VPSRLWYri = 19773 |
| 159507 | CEFBS_None, // VPSRLWYrm = 19774 |
| 159508 | CEFBS_None, // VPSRLWYrr = 19775 |
| 159509 | CEFBS_None, // VPSRLWZ128mi = 19776 |
| 159510 | CEFBS_None, // VPSRLWZ128mik = 19777 |
| 159511 | CEFBS_None, // VPSRLWZ128mikz = 19778 |
| 159512 | CEFBS_None, // VPSRLWZ128ri = 19779 |
| 159513 | CEFBS_None, // VPSRLWZ128rik = 19780 |
| 159514 | CEFBS_None, // VPSRLWZ128rikz = 19781 |
| 159515 | CEFBS_None, // VPSRLWZ128rm = 19782 |
| 159516 | CEFBS_None, // VPSRLWZ128rmk = 19783 |
| 159517 | CEFBS_None, // VPSRLWZ128rmkz = 19784 |
| 159518 | CEFBS_None, // VPSRLWZ128rr = 19785 |
| 159519 | CEFBS_None, // VPSRLWZ128rrk = 19786 |
| 159520 | CEFBS_None, // VPSRLWZ128rrkz = 19787 |
| 159521 | CEFBS_None, // VPSRLWZ256mi = 19788 |
| 159522 | CEFBS_None, // VPSRLWZ256mik = 19789 |
| 159523 | CEFBS_None, // VPSRLWZ256mikz = 19790 |
| 159524 | CEFBS_None, // VPSRLWZ256ri = 19791 |
| 159525 | CEFBS_None, // VPSRLWZ256rik = 19792 |
| 159526 | CEFBS_None, // VPSRLWZ256rikz = 19793 |
| 159527 | CEFBS_None, // VPSRLWZ256rm = 19794 |
| 159528 | CEFBS_None, // VPSRLWZ256rmk = 19795 |
| 159529 | CEFBS_None, // VPSRLWZ256rmkz = 19796 |
| 159530 | CEFBS_None, // VPSRLWZ256rr = 19797 |
| 159531 | CEFBS_None, // VPSRLWZ256rrk = 19798 |
| 159532 | CEFBS_None, // VPSRLWZ256rrkz = 19799 |
| 159533 | CEFBS_None, // VPSRLWZmi = 19800 |
| 159534 | CEFBS_None, // VPSRLWZmik = 19801 |
| 159535 | CEFBS_None, // VPSRLWZmikz = 19802 |
| 159536 | CEFBS_None, // VPSRLWZri = 19803 |
| 159537 | CEFBS_None, // VPSRLWZrik = 19804 |
| 159538 | CEFBS_None, // VPSRLWZrikz = 19805 |
| 159539 | CEFBS_None, // VPSRLWZrm = 19806 |
| 159540 | CEFBS_None, // VPSRLWZrmk = 19807 |
| 159541 | CEFBS_None, // VPSRLWZrmkz = 19808 |
| 159542 | CEFBS_None, // VPSRLWZrr = 19809 |
| 159543 | CEFBS_None, // VPSRLWZrrk = 19810 |
| 159544 | CEFBS_None, // VPSRLWZrrkz = 19811 |
| 159545 | CEFBS_None, // VPSRLWri = 19812 |
| 159546 | CEFBS_None, // VPSRLWrm = 19813 |
| 159547 | CEFBS_None, // VPSRLWrr = 19814 |
| 159548 | CEFBS_None, // VPSUBBYrm = 19815 |
| 159549 | CEFBS_None, // VPSUBBYrr = 19816 |
| 159550 | CEFBS_None, // VPSUBBZ128rm = 19817 |
| 159551 | CEFBS_None, // VPSUBBZ128rmk = 19818 |
| 159552 | CEFBS_None, // VPSUBBZ128rmkz = 19819 |
| 159553 | CEFBS_None, // VPSUBBZ128rr = 19820 |
| 159554 | CEFBS_None, // VPSUBBZ128rrk = 19821 |
| 159555 | CEFBS_None, // VPSUBBZ128rrkz = 19822 |
| 159556 | CEFBS_None, // VPSUBBZ256rm = 19823 |
| 159557 | CEFBS_None, // VPSUBBZ256rmk = 19824 |
| 159558 | CEFBS_None, // VPSUBBZ256rmkz = 19825 |
| 159559 | CEFBS_None, // VPSUBBZ256rr = 19826 |
| 159560 | CEFBS_None, // VPSUBBZ256rrk = 19827 |
| 159561 | CEFBS_None, // VPSUBBZ256rrkz = 19828 |
| 159562 | CEFBS_None, // VPSUBBZrm = 19829 |
| 159563 | CEFBS_None, // VPSUBBZrmk = 19830 |
| 159564 | CEFBS_None, // VPSUBBZrmkz = 19831 |
| 159565 | CEFBS_None, // VPSUBBZrr = 19832 |
| 159566 | CEFBS_None, // VPSUBBZrrk = 19833 |
| 159567 | CEFBS_None, // VPSUBBZrrkz = 19834 |
| 159568 | CEFBS_None, // VPSUBBrm = 19835 |
| 159569 | CEFBS_None, // VPSUBBrr = 19836 |
| 159570 | CEFBS_None, // VPSUBDYrm = 19837 |
| 159571 | CEFBS_None, // VPSUBDYrr = 19838 |
| 159572 | CEFBS_None, // VPSUBDZ128rm = 19839 |
| 159573 | CEFBS_None, // VPSUBDZ128rmb = 19840 |
| 159574 | CEFBS_None, // VPSUBDZ128rmbk = 19841 |
| 159575 | CEFBS_None, // VPSUBDZ128rmbkz = 19842 |
| 159576 | CEFBS_None, // VPSUBDZ128rmk = 19843 |
| 159577 | CEFBS_None, // VPSUBDZ128rmkz = 19844 |
| 159578 | CEFBS_None, // VPSUBDZ128rr = 19845 |
| 159579 | CEFBS_None, // VPSUBDZ128rrk = 19846 |
| 159580 | CEFBS_None, // VPSUBDZ128rrkz = 19847 |
| 159581 | CEFBS_None, // VPSUBDZ256rm = 19848 |
| 159582 | CEFBS_None, // VPSUBDZ256rmb = 19849 |
| 159583 | CEFBS_None, // VPSUBDZ256rmbk = 19850 |
| 159584 | CEFBS_None, // VPSUBDZ256rmbkz = 19851 |
| 159585 | CEFBS_None, // VPSUBDZ256rmk = 19852 |
| 159586 | CEFBS_None, // VPSUBDZ256rmkz = 19853 |
| 159587 | CEFBS_None, // VPSUBDZ256rr = 19854 |
| 159588 | CEFBS_None, // VPSUBDZ256rrk = 19855 |
| 159589 | CEFBS_None, // VPSUBDZ256rrkz = 19856 |
| 159590 | CEFBS_None, // VPSUBDZrm = 19857 |
| 159591 | CEFBS_None, // VPSUBDZrmb = 19858 |
| 159592 | CEFBS_None, // VPSUBDZrmbk = 19859 |
| 159593 | CEFBS_None, // VPSUBDZrmbkz = 19860 |
| 159594 | CEFBS_None, // VPSUBDZrmk = 19861 |
| 159595 | CEFBS_None, // VPSUBDZrmkz = 19862 |
| 159596 | CEFBS_None, // VPSUBDZrr = 19863 |
| 159597 | CEFBS_None, // VPSUBDZrrk = 19864 |
| 159598 | CEFBS_None, // VPSUBDZrrkz = 19865 |
| 159599 | CEFBS_None, // VPSUBDrm = 19866 |
| 159600 | CEFBS_None, // VPSUBDrr = 19867 |
| 159601 | CEFBS_None, // VPSUBQYrm = 19868 |
| 159602 | CEFBS_None, // VPSUBQYrr = 19869 |
| 159603 | CEFBS_None, // VPSUBQZ128rm = 19870 |
| 159604 | CEFBS_None, // VPSUBQZ128rmb = 19871 |
| 159605 | CEFBS_None, // VPSUBQZ128rmbk = 19872 |
| 159606 | CEFBS_None, // VPSUBQZ128rmbkz = 19873 |
| 159607 | CEFBS_None, // VPSUBQZ128rmk = 19874 |
| 159608 | CEFBS_None, // VPSUBQZ128rmkz = 19875 |
| 159609 | CEFBS_None, // VPSUBQZ128rr = 19876 |
| 159610 | CEFBS_None, // VPSUBQZ128rrk = 19877 |
| 159611 | CEFBS_None, // VPSUBQZ128rrkz = 19878 |
| 159612 | CEFBS_None, // VPSUBQZ256rm = 19879 |
| 159613 | CEFBS_None, // VPSUBQZ256rmb = 19880 |
| 159614 | CEFBS_None, // VPSUBQZ256rmbk = 19881 |
| 159615 | CEFBS_None, // VPSUBQZ256rmbkz = 19882 |
| 159616 | CEFBS_None, // VPSUBQZ256rmk = 19883 |
| 159617 | CEFBS_None, // VPSUBQZ256rmkz = 19884 |
| 159618 | CEFBS_None, // VPSUBQZ256rr = 19885 |
| 159619 | CEFBS_None, // VPSUBQZ256rrk = 19886 |
| 159620 | CEFBS_None, // VPSUBQZ256rrkz = 19887 |
| 159621 | CEFBS_None, // VPSUBQZrm = 19888 |
| 159622 | CEFBS_None, // VPSUBQZrmb = 19889 |
| 159623 | CEFBS_None, // VPSUBQZrmbk = 19890 |
| 159624 | CEFBS_None, // VPSUBQZrmbkz = 19891 |
| 159625 | CEFBS_None, // VPSUBQZrmk = 19892 |
| 159626 | CEFBS_None, // VPSUBQZrmkz = 19893 |
| 159627 | CEFBS_None, // VPSUBQZrr = 19894 |
| 159628 | CEFBS_None, // VPSUBQZrrk = 19895 |
| 159629 | CEFBS_None, // VPSUBQZrrkz = 19896 |
| 159630 | CEFBS_None, // VPSUBQrm = 19897 |
| 159631 | CEFBS_None, // VPSUBQrr = 19898 |
| 159632 | CEFBS_None, // VPSUBSBYrm = 19899 |
| 159633 | CEFBS_None, // VPSUBSBYrr = 19900 |
| 159634 | CEFBS_None, // VPSUBSBZ128rm = 19901 |
| 159635 | CEFBS_None, // VPSUBSBZ128rmk = 19902 |
| 159636 | CEFBS_None, // VPSUBSBZ128rmkz = 19903 |
| 159637 | CEFBS_None, // VPSUBSBZ128rr = 19904 |
| 159638 | CEFBS_None, // VPSUBSBZ128rrk = 19905 |
| 159639 | CEFBS_None, // VPSUBSBZ128rrkz = 19906 |
| 159640 | CEFBS_None, // VPSUBSBZ256rm = 19907 |
| 159641 | CEFBS_None, // VPSUBSBZ256rmk = 19908 |
| 159642 | CEFBS_None, // VPSUBSBZ256rmkz = 19909 |
| 159643 | CEFBS_None, // VPSUBSBZ256rr = 19910 |
| 159644 | CEFBS_None, // VPSUBSBZ256rrk = 19911 |
| 159645 | CEFBS_None, // VPSUBSBZ256rrkz = 19912 |
| 159646 | CEFBS_None, // VPSUBSBZrm = 19913 |
| 159647 | CEFBS_None, // VPSUBSBZrmk = 19914 |
| 159648 | CEFBS_None, // VPSUBSBZrmkz = 19915 |
| 159649 | CEFBS_None, // VPSUBSBZrr = 19916 |
| 159650 | CEFBS_None, // VPSUBSBZrrk = 19917 |
| 159651 | CEFBS_None, // VPSUBSBZrrkz = 19918 |
| 159652 | CEFBS_None, // VPSUBSBrm = 19919 |
| 159653 | CEFBS_None, // VPSUBSBrr = 19920 |
| 159654 | CEFBS_None, // VPSUBSWYrm = 19921 |
| 159655 | CEFBS_None, // VPSUBSWYrr = 19922 |
| 159656 | CEFBS_None, // VPSUBSWZ128rm = 19923 |
| 159657 | CEFBS_None, // VPSUBSWZ128rmk = 19924 |
| 159658 | CEFBS_None, // VPSUBSWZ128rmkz = 19925 |
| 159659 | CEFBS_None, // VPSUBSWZ128rr = 19926 |
| 159660 | CEFBS_None, // VPSUBSWZ128rrk = 19927 |
| 159661 | CEFBS_None, // VPSUBSWZ128rrkz = 19928 |
| 159662 | CEFBS_None, // VPSUBSWZ256rm = 19929 |
| 159663 | CEFBS_None, // VPSUBSWZ256rmk = 19930 |
| 159664 | CEFBS_None, // VPSUBSWZ256rmkz = 19931 |
| 159665 | CEFBS_None, // VPSUBSWZ256rr = 19932 |
| 159666 | CEFBS_None, // VPSUBSWZ256rrk = 19933 |
| 159667 | CEFBS_None, // VPSUBSWZ256rrkz = 19934 |
| 159668 | CEFBS_None, // VPSUBSWZrm = 19935 |
| 159669 | CEFBS_None, // VPSUBSWZrmk = 19936 |
| 159670 | CEFBS_None, // VPSUBSWZrmkz = 19937 |
| 159671 | CEFBS_None, // VPSUBSWZrr = 19938 |
| 159672 | CEFBS_None, // VPSUBSWZrrk = 19939 |
| 159673 | CEFBS_None, // VPSUBSWZrrkz = 19940 |
| 159674 | CEFBS_None, // VPSUBSWrm = 19941 |
| 159675 | CEFBS_None, // VPSUBSWrr = 19942 |
| 159676 | CEFBS_None, // VPSUBUSBYrm = 19943 |
| 159677 | CEFBS_None, // VPSUBUSBYrr = 19944 |
| 159678 | CEFBS_None, // VPSUBUSBZ128rm = 19945 |
| 159679 | CEFBS_None, // VPSUBUSBZ128rmk = 19946 |
| 159680 | CEFBS_None, // VPSUBUSBZ128rmkz = 19947 |
| 159681 | CEFBS_None, // VPSUBUSBZ128rr = 19948 |
| 159682 | CEFBS_None, // VPSUBUSBZ128rrk = 19949 |
| 159683 | CEFBS_None, // VPSUBUSBZ128rrkz = 19950 |
| 159684 | CEFBS_None, // VPSUBUSBZ256rm = 19951 |
| 159685 | CEFBS_None, // VPSUBUSBZ256rmk = 19952 |
| 159686 | CEFBS_None, // VPSUBUSBZ256rmkz = 19953 |
| 159687 | CEFBS_None, // VPSUBUSBZ256rr = 19954 |
| 159688 | CEFBS_None, // VPSUBUSBZ256rrk = 19955 |
| 159689 | CEFBS_None, // VPSUBUSBZ256rrkz = 19956 |
| 159690 | CEFBS_None, // VPSUBUSBZrm = 19957 |
| 159691 | CEFBS_None, // VPSUBUSBZrmk = 19958 |
| 159692 | CEFBS_None, // VPSUBUSBZrmkz = 19959 |
| 159693 | CEFBS_None, // VPSUBUSBZrr = 19960 |
| 159694 | CEFBS_None, // VPSUBUSBZrrk = 19961 |
| 159695 | CEFBS_None, // VPSUBUSBZrrkz = 19962 |
| 159696 | CEFBS_None, // VPSUBUSBrm = 19963 |
| 159697 | CEFBS_None, // VPSUBUSBrr = 19964 |
| 159698 | CEFBS_None, // VPSUBUSWYrm = 19965 |
| 159699 | CEFBS_None, // VPSUBUSWYrr = 19966 |
| 159700 | CEFBS_None, // VPSUBUSWZ128rm = 19967 |
| 159701 | CEFBS_None, // VPSUBUSWZ128rmk = 19968 |
| 159702 | CEFBS_None, // VPSUBUSWZ128rmkz = 19969 |
| 159703 | CEFBS_None, // VPSUBUSWZ128rr = 19970 |
| 159704 | CEFBS_None, // VPSUBUSWZ128rrk = 19971 |
| 159705 | CEFBS_None, // VPSUBUSWZ128rrkz = 19972 |
| 159706 | CEFBS_None, // VPSUBUSWZ256rm = 19973 |
| 159707 | CEFBS_None, // VPSUBUSWZ256rmk = 19974 |
| 159708 | CEFBS_None, // VPSUBUSWZ256rmkz = 19975 |
| 159709 | CEFBS_None, // VPSUBUSWZ256rr = 19976 |
| 159710 | CEFBS_None, // VPSUBUSWZ256rrk = 19977 |
| 159711 | CEFBS_None, // VPSUBUSWZ256rrkz = 19978 |
| 159712 | CEFBS_None, // VPSUBUSWZrm = 19979 |
| 159713 | CEFBS_None, // VPSUBUSWZrmk = 19980 |
| 159714 | CEFBS_None, // VPSUBUSWZrmkz = 19981 |
| 159715 | CEFBS_None, // VPSUBUSWZrr = 19982 |
| 159716 | CEFBS_None, // VPSUBUSWZrrk = 19983 |
| 159717 | CEFBS_None, // VPSUBUSWZrrkz = 19984 |
| 159718 | CEFBS_None, // VPSUBUSWrm = 19985 |
| 159719 | CEFBS_None, // VPSUBUSWrr = 19986 |
| 159720 | CEFBS_None, // VPSUBWYrm = 19987 |
| 159721 | CEFBS_None, // VPSUBWYrr = 19988 |
| 159722 | CEFBS_None, // VPSUBWZ128rm = 19989 |
| 159723 | CEFBS_None, // VPSUBWZ128rmk = 19990 |
| 159724 | CEFBS_None, // VPSUBWZ128rmkz = 19991 |
| 159725 | CEFBS_None, // VPSUBWZ128rr = 19992 |
| 159726 | CEFBS_None, // VPSUBWZ128rrk = 19993 |
| 159727 | CEFBS_None, // VPSUBWZ128rrkz = 19994 |
| 159728 | CEFBS_None, // VPSUBWZ256rm = 19995 |
| 159729 | CEFBS_None, // VPSUBWZ256rmk = 19996 |
| 159730 | CEFBS_None, // VPSUBWZ256rmkz = 19997 |
| 159731 | CEFBS_None, // VPSUBWZ256rr = 19998 |
| 159732 | CEFBS_None, // VPSUBWZ256rrk = 19999 |
| 159733 | CEFBS_None, // VPSUBWZ256rrkz = 20000 |
| 159734 | CEFBS_None, // VPSUBWZrm = 20001 |
| 159735 | CEFBS_None, // VPSUBWZrmk = 20002 |
| 159736 | CEFBS_None, // VPSUBWZrmkz = 20003 |
| 159737 | CEFBS_None, // VPSUBWZrr = 20004 |
| 159738 | CEFBS_None, // VPSUBWZrrk = 20005 |
| 159739 | CEFBS_None, // VPSUBWZrrkz = 20006 |
| 159740 | CEFBS_None, // VPSUBWrm = 20007 |
| 159741 | CEFBS_None, // VPSUBWrr = 20008 |
| 159742 | CEFBS_None, // VPTERNLOGDZ128rmbi = 20009 |
| 159743 | CEFBS_None, // VPTERNLOGDZ128rmbik = 20010 |
| 159744 | CEFBS_None, // VPTERNLOGDZ128rmbikz = 20011 |
| 159745 | CEFBS_None, // VPTERNLOGDZ128rmi = 20012 |
| 159746 | CEFBS_None, // VPTERNLOGDZ128rmik = 20013 |
| 159747 | CEFBS_None, // VPTERNLOGDZ128rmikz = 20014 |
| 159748 | CEFBS_None, // VPTERNLOGDZ128rri = 20015 |
| 159749 | CEFBS_None, // VPTERNLOGDZ128rrik = 20016 |
| 159750 | CEFBS_None, // VPTERNLOGDZ128rrikz = 20017 |
| 159751 | CEFBS_None, // VPTERNLOGDZ256rmbi = 20018 |
| 159752 | CEFBS_None, // VPTERNLOGDZ256rmbik = 20019 |
| 159753 | CEFBS_None, // VPTERNLOGDZ256rmbikz = 20020 |
| 159754 | CEFBS_None, // VPTERNLOGDZ256rmi = 20021 |
| 159755 | CEFBS_None, // VPTERNLOGDZ256rmik = 20022 |
| 159756 | CEFBS_None, // VPTERNLOGDZ256rmikz = 20023 |
| 159757 | CEFBS_None, // VPTERNLOGDZ256rri = 20024 |
| 159758 | CEFBS_None, // VPTERNLOGDZ256rrik = 20025 |
| 159759 | CEFBS_None, // VPTERNLOGDZ256rrikz = 20026 |
| 159760 | CEFBS_None, // VPTERNLOGDZrmbi = 20027 |
| 159761 | CEFBS_None, // VPTERNLOGDZrmbik = 20028 |
| 159762 | CEFBS_None, // VPTERNLOGDZrmbikz = 20029 |
| 159763 | CEFBS_None, // VPTERNLOGDZrmi = 20030 |
| 159764 | CEFBS_None, // VPTERNLOGDZrmik = 20031 |
| 159765 | CEFBS_None, // VPTERNLOGDZrmikz = 20032 |
| 159766 | CEFBS_None, // VPTERNLOGDZrri = 20033 |
| 159767 | CEFBS_None, // VPTERNLOGDZrrik = 20034 |
| 159768 | CEFBS_None, // VPTERNLOGDZrrikz = 20035 |
| 159769 | CEFBS_None, // VPTERNLOGQZ128rmbi = 20036 |
| 159770 | CEFBS_None, // VPTERNLOGQZ128rmbik = 20037 |
| 159771 | CEFBS_None, // VPTERNLOGQZ128rmbikz = 20038 |
| 159772 | CEFBS_None, // VPTERNLOGQZ128rmi = 20039 |
| 159773 | CEFBS_None, // VPTERNLOGQZ128rmik = 20040 |
| 159774 | CEFBS_None, // VPTERNLOGQZ128rmikz = 20041 |
| 159775 | CEFBS_None, // VPTERNLOGQZ128rri = 20042 |
| 159776 | CEFBS_None, // VPTERNLOGQZ128rrik = 20043 |
| 159777 | CEFBS_None, // VPTERNLOGQZ128rrikz = 20044 |
| 159778 | CEFBS_None, // VPTERNLOGQZ256rmbi = 20045 |
| 159779 | CEFBS_None, // VPTERNLOGQZ256rmbik = 20046 |
| 159780 | CEFBS_None, // VPTERNLOGQZ256rmbikz = 20047 |
| 159781 | CEFBS_None, // VPTERNLOGQZ256rmi = 20048 |
| 159782 | CEFBS_None, // VPTERNLOGQZ256rmik = 20049 |
| 159783 | CEFBS_None, // VPTERNLOGQZ256rmikz = 20050 |
| 159784 | CEFBS_None, // VPTERNLOGQZ256rri = 20051 |
| 159785 | CEFBS_None, // VPTERNLOGQZ256rrik = 20052 |
| 159786 | CEFBS_None, // VPTERNLOGQZ256rrikz = 20053 |
| 159787 | CEFBS_None, // VPTERNLOGQZrmbi = 20054 |
| 159788 | CEFBS_None, // VPTERNLOGQZrmbik = 20055 |
| 159789 | CEFBS_None, // VPTERNLOGQZrmbikz = 20056 |
| 159790 | CEFBS_None, // VPTERNLOGQZrmi = 20057 |
| 159791 | CEFBS_None, // VPTERNLOGQZrmik = 20058 |
| 159792 | CEFBS_None, // VPTERNLOGQZrmikz = 20059 |
| 159793 | CEFBS_None, // VPTERNLOGQZrri = 20060 |
| 159794 | CEFBS_None, // VPTERNLOGQZrrik = 20061 |
| 159795 | CEFBS_None, // VPTERNLOGQZrrikz = 20062 |
| 159796 | CEFBS_None, // VPTESTMBZ128rm = 20063 |
| 159797 | CEFBS_None, // VPTESTMBZ128rmk = 20064 |
| 159798 | CEFBS_None, // VPTESTMBZ128rr = 20065 |
| 159799 | CEFBS_None, // VPTESTMBZ128rrk = 20066 |
| 159800 | CEFBS_None, // VPTESTMBZ256rm = 20067 |
| 159801 | CEFBS_None, // VPTESTMBZ256rmk = 20068 |
| 159802 | CEFBS_None, // VPTESTMBZ256rr = 20069 |
| 159803 | CEFBS_None, // VPTESTMBZ256rrk = 20070 |
| 159804 | CEFBS_None, // VPTESTMBZrm = 20071 |
| 159805 | CEFBS_None, // VPTESTMBZrmk = 20072 |
| 159806 | CEFBS_None, // VPTESTMBZrr = 20073 |
| 159807 | CEFBS_None, // VPTESTMBZrrk = 20074 |
| 159808 | CEFBS_None, // VPTESTMDZ128rm = 20075 |
| 159809 | CEFBS_None, // VPTESTMDZ128rmb = 20076 |
| 159810 | CEFBS_None, // VPTESTMDZ128rmbk = 20077 |
| 159811 | CEFBS_None, // VPTESTMDZ128rmk = 20078 |
| 159812 | CEFBS_None, // VPTESTMDZ128rr = 20079 |
| 159813 | CEFBS_None, // VPTESTMDZ128rrk = 20080 |
| 159814 | CEFBS_None, // VPTESTMDZ256rm = 20081 |
| 159815 | CEFBS_None, // VPTESTMDZ256rmb = 20082 |
| 159816 | CEFBS_None, // VPTESTMDZ256rmbk = 20083 |
| 159817 | CEFBS_None, // VPTESTMDZ256rmk = 20084 |
| 159818 | CEFBS_None, // VPTESTMDZ256rr = 20085 |
| 159819 | CEFBS_None, // VPTESTMDZ256rrk = 20086 |
| 159820 | CEFBS_None, // VPTESTMDZrm = 20087 |
| 159821 | CEFBS_None, // VPTESTMDZrmb = 20088 |
| 159822 | CEFBS_None, // VPTESTMDZrmbk = 20089 |
| 159823 | CEFBS_None, // VPTESTMDZrmk = 20090 |
| 159824 | CEFBS_None, // VPTESTMDZrr = 20091 |
| 159825 | CEFBS_None, // VPTESTMDZrrk = 20092 |
| 159826 | CEFBS_None, // VPTESTMQZ128rm = 20093 |
| 159827 | CEFBS_None, // VPTESTMQZ128rmb = 20094 |
| 159828 | CEFBS_None, // VPTESTMQZ128rmbk = 20095 |
| 159829 | CEFBS_None, // VPTESTMQZ128rmk = 20096 |
| 159830 | CEFBS_None, // VPTESTMQZ128rr = 20097 |
| 159831 | CEFBS_None, // VPTESTMQZ128rrk = 20098 |
| 159832 | CEFBS_None, // VPTESTMQZ256rm = 20099 |
| 159833 | CEFBS_None, // VPTESTMQZ256rmb = 20100 |
| 159834 | CEFBS_None, // VPTESTMQZ256rmbk = 20101 |
| 159835 | CEFBS_None, // VPTESTMQZ256rmk = 20102 |
| 159836 | CEFBS_None, // VPTESTMQZ256rr = 20103 |
| 159837 | CEFBS_None, // VPTESTMQZ256rrk = 20104 |
| 159838 | CEFBS_None, // VPTESTMQZrm = 20105 |
| 159839 | CEFBS_None, // VPTESTMQZrmb = 20106 |
| 159840 | CEFBS_None, // VPTESTMQZrmbk = 20107 |
| 159841 | CEFBS_None, // VPTESTMQZrmk = 20108 |
| 159842 | CEFBS_None, // VPTESTMQZrr = 20109 |
| 159843 | CEFBS_None, // VPTESTMQZrrk = 20110 |
| 159844 | CEFBS_None, // VPTESTMWZ128rm = 20111 |
| 159845 | CEFBS_None, // VPTESTMWZ128rmk = 20112 |
| 159846 | CEFBS_None, // VPTESTMWZ128rr = 20113 |
| 159847 | CEFBS_None, // VPTESTMWZ128rrk = 20114 |
| 159848 | CEFBS_None, // VPTESTMWZ256rm = 20115 |
| 159849 | CEFBS_None, // VPTESTMWZ256rmk = 20116 |
| 159850 | CEFBS_None, // VPTESTMWZ256rr = 20117 |
| 159851 | CEFBS_None, // VPTESTMWZ256rrk = 20118 |
| 159852 | CEFBS_None, // VPTESTMWZrm = 20119 |
| 159853 | CEFBS_None, // VPTESTMWZrmk = 20120 |
| 159854 | CEFBS_None, // VPTESTMWZrr = 20121 |
| 159855 | CEFBS_None, // VPTESTMWZrrk = 20122 |
| 159856 | CEFBS_None, // VPTESTNMBZ128rm = 20123 |
| 159857 | CEFBS_None, // VPTESTNMBZ128rmk = 20124 |
| 159858 | CEFBS_None, // VPTESTNMBZ128rr = 20125 |
| 159859 | CEFBS_None, // VPTESTNMBZ128rrk = 20126 |
| 159860 | CEFBS_None, // VPTESTNMBZ256rm = 20127 |
| 159861 | CEFBS_None, // VPTESTNMBZ256rmk = 20128 |
| 159862 | CEFBS_None, // VPTESTNMBZ256rr = 20129 |
| 159863 | CEFBS_None, // VPTESTNMBZ256rrk = 20130 |
| 159864 | CEFBS_None, // VPTESTNMBZrm = 20131 |
| 159865 | CEFBS_None, // VPTESTNMBZrmk = 20132 |
| 159866 | CEFBS_None, // VPTESTNMBZrr = 20133 |
| 159867 | CEFBS_None, // VPTESTNMBZrrk = 20134 |
| 159868 | CEFBS_None, // VPTESTNMDZ128rm = 20135 |
| 159869 | CEFBS_None, // VPTESTNMDZ128rmb = 20136 |
| 159870 | CEFBS_None, // VPTESTNMDZ128rmbk = 20137 |
| 159871 | CEFBS_None, // VPTESTNMDZ128rmk = 20138 |
| 159872 | CEFBS_None, // VPTESTNMDZ128rr = 20139 |
| 159873 | CEFBS_None, // VPTESTNMDZ128rrk = 20140 |
| 159874 | CEFBS_None, // VPTESTNMDZ256rm = 20141 |
| 159875 | CEFBS_None, // VPTESTNMDZ256rmb = 20142 |
| 159876 | CEFBS_None, // VPTESTNMDZ256rmbk = 20143 |
| 159877 | CEFBS_None, // VPTESTNMDZ256rmk = 20144 |
| 159878 | CEFBS_None, // VPTESTNMDZ256rr = 20145 |
| 159879 | CEFBS_None, // VPTESTNMDZ256rrk = 20146 |
| 159880 | CEFBS_None, // VPTESTNMDZrm = 20147 |
| 159881 | CEFBS_None, // VPTESTNMDZrmb = 20148 |
| 159882 | CEFBS_None, // VPTESTNMDZrmbk = 20149 |
| 159883 | CEFBS_None, // VPTESTNMDZrmk = 20150 |
| 159884 | CEFBS_None, // VPTESTNMDZrr = 20151 |
| 159885 | CEFBS_None, // VPTESTNMDZrrk = 20152 |
| 159886 | CEFBS_None, // VPTESTNMQZ128rm = 20153 |
| 159887 | CEFBS_None, // VPTESTNMQZ128rmb = 20154 |
| 159888 | CEFBS_None, // VPTESTNMQZ128rmbk = 20155 |
| 159889 | CEFBS_None, // VPTESTNMQZ128rmk = 20156 |
| 159890 | CEFBS_None, // VPTESTNMQZ128rr = 20157 |
| 159891 | CEFBS_None, // VPTESTNMQZ128rrk = 20158 |
| 159892 | CEFBS_None, // VPTESTNMQZ256rm = 20159 |
| 159893 | CEFBS_None, // VPTESTNMQZ256rmb = 20160 |
| 159894 | CEFBS_None, // VPTESTNMQZ256rmbk = 20161 |
| 159895 | CEFBS_None, // VPTESTNMQZ256rmk = 20162 |
| 159896 | CEFBS_None, // VPTESTNMQZ256rr = 20163 |
| 159897 | CEFBS_None, // VPTESTNMQZ256rrk = 20164 |
| 159898 | CEFBS_None, // VPTESTNMQZrm = 20165 |
| 159899 | CEFBS_None, // VPTESTNMQZrmb = 20166 |
| 159900 | CEFBS_None, // VPTESTNMQZrmbk = 20167 |
| 159901 | CEFBS_None, // VPTESTNMQZrmk = 20168 |
| 159902 | CEFBS_None, // VPTESTNMQZrr = 20169 |
| 159903 | CEFBS_None, // VPTESTNMQZrrk = 20170 |
| 159904 | CEFBS_None, // VPTESTNMWZ128rm = 20171 |
| 159905 | CEFBS_None, // VPTESTNMWZ128rmk = 20172 |
| 159906 | CEFBS_None, // VPTESTNMWZ128rr = 20173 |
| 159907 | CEFBS_None, // VPTESTNMWZ128rrk = 20174 |
| 159908 | CEFBS_None, // VPTESTNMWZ256rm = 20175 |
| 159909 | CEFBS_None, // VPTESTNMWZ256rmk = 20176 |
| 159910 | CEFBS_None, // VPTESTNMWZ256rr = 20177 |
| 159911 | CEFBS_None, // VPTESTNMWZ256rrk = 20178 |
| 159912 | CEFBS_None, // VPTESTNMWZrm = 20179 |
| 159913 | CEFBS_None, // VPTESTNMWZrmk = 20180 |
| 159914 | CEFBS_None, // VPTESTNMWZrr = 20181 |
| 159915 | CEFBS_None, // VPTESTNMWZrrk = 20182 |
| 159916 | CEFBS_None, // VPTESTYrm = 20183 |
| 159917 | CEFBS_None, // VPTESTYrr = 20184 |
| 159918 | CEFBS_None, // VPTESTrm = 20185 |
| 159919 | CEFBS_None, // VPTESTrr = 20186 |
| 159920 | CEFBS_None, // VPUNPCKHBWYrm = 20187 |
| 159921 | CEFBS_None, // VPUNPCKHBWYrr = 20188 |
| 159922 | CEFBS_None, // VPUNPCKHBWZ128rm = 20189 |
| 159923 | CEFBS_None, // VPUNPCKHBWZ128rmk = 20190 |
| 159924 | CEFBS_None, // VPUNPCKHBWZ128rmkz = 20191 |
| 159925 | CEFBS_None, // VPUNPCKHBWZ128rr = 20192 |
| 159926 | CEFBS_None, // VPUNPCKHBWZ128rrk = 20193 |
| 159927 | CEFBS_None, // VPUNPCKHBWZ128rrkz = 20194 |
| 159928 | CEFBS_None, // VPUNPCKHBWZ256rm = 20195 |
| 159929 | CEFBS_None, // VPUNPCKHBWZ256rmk = 20196 |
| 159930 | CEFBS_None, // VPUNPCKHBWZ256rmkz = 20197 |
| 159931 | CEFBS_None, // VPUNPCKHBWZ256rr = 20198 |
| 159932 | CEFBS_None, // VPUNPCKHBWZ256rrk = 20199 |
| 159933 | CEFBS_None, // VPUNPCKHBWZ256rrkz = 20200 |
| 159934 | CEFBS_None, // VPUNPCKHBWZrm = 20201 |
| 159935 | CEFBS_None, // VPUNPCKHBWZrmk = 20202 |
| 159936 | CEFBS_None, // VPUNPCKHBWZrmkz = 20203 |
| 159937 | CEFBS_None, // VPUNPCKHBWZrr = 20204 |
| 159938 | CEFBS_None, // VPUNPCKHBWZrrk = 20205 |
| 159939 | CEFBS_None, // VPUNPCKHBWZrrkz = 20206 |
| 159940 | CEFBS_None, // VPUNPCKHBWrm = 20207 |
| 159941 | CEFBS_None, // VPUNPCKHBWrr = 20208 |
| 159942 | CEFBS_None, // VPUNPCKHDQYrm = 20209 |
| 159943 | CEFBS_None, // VPUNPCKHDQYrr = 20210 |
| 159944 | CEFBS_None, // VPUNPCKHDQZ128rm = 20211 |
| 159945 | CEFBS_None, // VPUNPCKHDQZ128rmb = 20212 |
| 159946 | CEFBS_None, // VPUNPCKHDQZ128rmbk = 20213 |
| 159947 | CEFBS_None, // VPUNPCKHDQZ128rmbkz = 20214 |
| 159948 | CEFBS_None, // VPUNPCKHDQZ128rmk = 20215 |
| 159949 | CEFBS_None, // VPUNPCKHDQZ128rmkz = 20216 |
| 159950 | CEFBS_None, // VPUNPCKHDQZ128rr = 20217 |
| 159951 | CEFBS_None, // VPUNPCKHDQZ128rrk = 20218 |
| 159952 | CEFBS_None, // VPUNPCKHDQZ128rrkz = 20219 |
| 159953 | CEFBS_None, // VPUNPCKHDQZ256rm = 20220 |
| 159954 | CEFBS_None, // VPUNPCKHDQZ256rmb = 20221 |
| 159955 | CEFBS_None, // VPUNPCKHDQZ256rmbk = 20222 |
| 159956 | CEFBS_None, // VPUNPCKHDQZ256rmbkz = 20223 |
| 159957 | CEFBS_None, // VPUNPCKHDQZ256rmk = 20224 |
| 159958 | CEFBS_None, // VPUNPCKHDQZ256rmkz = 20225 |
| 159959 | CEFBS_None, // VPUNPCKHDQZ256rr = 20226 |
| 159960 | CEFBS_None, // VPUNPCKHDQZ256rrk = 20227 |
| 159961 | CEFBS_None, // VPUNPCKHDQZ256rrkz = 20228 |
| 159962 | CEFBS_None, // VPUNPCKHDQZrm = 20229 |
| 159963 | CEFBS_None, // VPUNPCKHDQZrmb = 20230 |
| 159964 | CEFBS_None, // VPUNPCKHDQZrmbk = 20231 |
| 159965 | CEFBS_None, // VPUNPCKHDQZrmbkz = 20232 |
| 159966 | CEFBS_None, // VPUNPCKHDQZrmk = 20233 |
| 159967 | CEFBS_None, // VPUNPCKHDQZrmkz = 20234 |
| 159968 | CEFBS_None, // VPUNPCKHDQZrr = 20235 |
| 159969 | CEFBS_None, // VPUNPCKHDQZrrk = 20236 |
| 159970 | CEFBS_None, // VPUNPCKHDQZrrkz = 20237 |
| 159971 | CEFBS_None, // VPUNPCKHDQrm = 20238 |
| 159972 | CEFBS_None, // VPUNPCKHDQrr = 20239 |
| 159973 | CEFBS_None, // VPUNPCKHQDQYrm = 20240 |
| 159974 | CEFBS_None, // VPUNPCKHQDQYrr = 20241 |
| 159975 | CEFBS_None, // VPUNPCKHQDQZ128rm = 20242 |
| 159976 | CEFBS_None, // VPUNPCKHQDQZ128rmb = 20243 |
| 159977 | CEFBS_None, // VPUNPCKHQDQZ128rmbk = 20244 |
| 159978 | CEFBS_None, // VPUNPCKHQDQZ128rmbkz = 20245 |
| 159979 | CEFBS_None, // VPUNPCKHQDQZ128rmk = 20246 |
| 159980 | CEFBS_None, // VPUNPCKHQDQZ128rmkz = 20247 |
| 159981 | CEFBS_None, // VPUNPCKHQDQZ128rr = 20248 |
| 159982 | CEFBS_None, // VPUNPCKHQDQZ128rrk = 20249 |
| 159983 | CEFBS_None, // VPUNPCKHQDQZ128rrkz = 20250 |
| 159984 | CEFBS_None, // VPUNPCKHQDQZ256rm = 20251 |
| 159985 | CEFBS_None, // VPUNPCKHQDQZ256rmb = 20252 |
| 159986 | CEFBS_None, // VPUNPCKHQDQZ256rmbk = 20253 |
| 159987 | CEFBS_None, // VPUNPCKHQDQZ256rmbkz = 20254 |
| 159988 | CEFBS_None, // VPUNPCKHQDQZ256rmk = 20255 |
| 159989 | CEFBS_None, // VPUNPCKHQDQZ256rmkz = 20256 |
| 159990 | CEFBS_None, // VPUNPCKHQDQZ256rr = 20257 |
| 159991 | CEFBS_None, // VPUNPCKHQDQZ256rrk = 20258 |
| 159992 | CEFBS_None, // VPUNPCKHQDQZ256rrkz = 20259 |
| 159993 | CEFBS_None, // VPUNPCKHQDQZrm = 20260 |
| 159994 | CEFBS_None, // VPUNPCKHQDQZrmb = 20261 |
| 159995 | CEFBS_None, // VPUNPCKHQDQZrmbk = 20262 |
| 159996 | CEFBS_None, // VPUNPCKHQDQZrmbkz = 20263 |
| 159997 | CEFBS_None, // VPUNPCKHQDQZrmk = 20264 |
| 159998 | CEFBS_None, // VPUNPCKHQDQZrmkz = 20265 |
| 159999 | CEFBS_None, // VPUNPCKHQDQZrr = 20266 |
| 160000 | CEFBS_None, // VPUNPCKHQDQZrrk = 20267 |
| 160001 | CEFBS_None, // VPUNPCKHQDQZrrkz = 20268 |
| 160002 | CEFBS_None, // VPUNPCKHQDQrm = 20269 |
| 160003 | CEFBS_None, // VPUNPCKHQDQrr = 20270 |
| 160004 | CEFBS_None, // VPUNPCKHWDYrm = 20271 |
| 160005 | CEFBS_None, // VPUNPCKHWDYrr = 20272 |
| 160006 | CEFBS_None, // VPUNPCKHWDZ128rm = 20273 |
| 160007 | CEFBS_None, // VPUNPCKHWDZ128rmk = 20274 |
| 160008 | CEFBS_None, // VPUNPCKHWDZ128rmkz = 20275 |
| 160009 | CEFBS_None, // VPUNPCKHWDZ128rr = 20276 |
| 160010 | CEFBS_None, // VPUNPCKHWDZ128rrk = 20277 |
| 160011 | CEFBS_None, // VPUNPCKHWDZ128rrkz = 20278 |
| 160012 | CEFBS_None, // VPUNPCKHWDZ256rm = 20279 |
| 160013 | CEFBS_None, // VPUNPCKHWDZ256rmk = 20280 |
| 160014 | CEFBS_None, // VPUNPCKHWDZ256rmkz = 20281 |
| 160015 | CEFBS_None, // VPUNPCKHWDZ256rr = 20282 |
| 160016 | CEFBS_None, // VPUNPCKHWDZ256rrk = 20283 |
| 160017 | CEFBS_None, // VPUNPCKHWDZ256rrkz = 20284 |
| 160018 | CEFBS_None, // VPUNPCKHWDZrm = 20285 |
| 160019 | CEFBS_None, // VPUNPCKHWDZrmk = 20286 |
| 160020 | CEFBS_None, // VPUNPCKHWDZrmkz = 20287 |
| 160021 | CEFBS_None, // VPUNPCKHWDZrr = 20288 |
| 160022 | CEFBS_None, // VPUNPCKHWDZrrk = 20289 |
| 160023 | CEFBS_None, // VPUNPCKHWDZrrkz = 20290 |
| 160024 | CEFBS_None, // VPUNPCKHWDrm = 20291 |
| 160025 | CEFBS_None, // VPUNPCKHWDrr = 20292 |
| 160026 | CEFBS_None, // VPUNPCKLBWYrm = 20293 |
| 160027 | CEFBS_None, // VPUNPCKLBWYrr = 20294 |
| 160028 | CEFBS_None, // VPUNPCKLBWZ128rm = 20295 |
| 160029 | CEFBS_None, // VPUNPCKLBWZ128rmk = 20296 |
| 160030 | CEFBS_None, // VPUNPCKLBWZ128rmkz = 20297 |
| 160031 | CEFBS_None, // VPUNPCKLBWZ128rr = 20298 |
| 160032 | CEFBS_None, // VPUNPCKLBWZ128rrk = 20299 |
| 160033 | CEFBS_None, // VPUNPCKLBWZ128rrkz = 20300 |
| 160034 | CEFBS_None, // VPUNPCKLBWZ256rm = 20301 |
| 160035 | CEFBS_None, // VPUNPCKLBWZ256rmk = 20302 |
| 160036 | CEFBS_None, // VPUNPCKLBWZ256rmkz = 20303 |
| 160037 | CEFBS_None, // VPUNPCKLBWZ256rr = 20304 |
| 160038 | CEFBS_None, // VPUNPCKLBWZ256rrk = 20305 |
| 160039 | CEFBS_None, // VPUNPCKLBWZ256rrkz = 20306 |
| 160040 | CEFBS_None, // VPUNPCKLBWZrm = 20307 |
| 160041 | CEFBS_None, // VPUNPCKLBWZrmk = 20308 |
| 160042 | CEFBS_None, // VPUNPCKLBWZrmkz = 20309 |
| 160043 | CEFBS_None, // VPUNPCKLBWZrr = 20310 |
| 160044 | CEFBS_None, // VPUNPCKLBWZrrk = 20311 |
| 160045 | CEFBS_None, // VPUNPCKLBWZrrkz = 20312 |
| 160046 | CEFBS_None, // VPUNPCKLBWrm = 20313 |
| 160047 | CEFBS_None, // VPUNPCKLBWrr = 20314 |
| 160048 | CEFBS_None, // VPUNPCKLDQYrm = 20315 |
| 160049 | CEFBS_None, // VPUNPCKLDQYrr = 20316 |
| 160050 | CEFBS_None, // VPUNPCKLDQZ128rm = 20317 |
| 160051 | CEFBS_None, // VPUNPCKLDQZ128rmb = 20318 |
| 160052 | CEFBS_None, // VPUNPCKLDQZ128rmbk = 20319 |
| 160053 | CEFBS_None, // VPUNPCKLDQZ128rmbkz = 20320 |
| 160054 | CEFBS_None, // VPUNPCKLDQZ128rmk = 20321 |
| 160055 | CEFBS_None, // VPUNPCKLDQZ128rmkz = 20322 |
| 160056 | CEFBS_None, // VPUNPCKLDQZ128rr = 20323 |
| 160057 | CEFBS_None, // VPUNPCKLDQZ128rrk = 20324 |
| 160058 | CEFBS_None, // VPUNPCKLDQZ128rrkz = 20325 |
| 160059 | CEFBS_None, // VPUNPCKLDQZ256rm = 20326 |
| 160060 | CEFBS_None, // VPUNPCKLDQZ256rmb = 20327 |
| 160061 | CEFBS_None, // VPUNPCKLDQZ256rmbk = 20328 |
| 160062 | CEFBS_None, // VPUNPCKLDQZ256rmbkz = 20329 |
| 160063 | CEFBS_None, // VPUNPCKLDQZ256rmk = 20330 |
| 160064 | CEFBS_None, // VPUNPCKLDQZ256rmkz = 20331 |
| 160065 | CEFBS_None, // VPUNPCKLDQZ256rr = 20332 |
| 160066 | CEFBS_None, // VPUNPCKLDQZ256rrk = 20333 |
| 160067 | CEFBS_None, // VPUNPCKLDQZ256rrkz = 20334 |
| 160068 | CEFBS_None, // VPUNPCKLDQZrm = 20335 |
| 160069 | CEFBS_None, // VPUNPCKLDQZrmb = 20336 |
| 160070 | CEFBS_None, // VPUNPCKLDQZrmbk = 20337 |
| 160071 | CEFBS_None, // VPUNPCKLDQZrmbkz = 20338 |
| 160072 | CEFBS_None, // VPUNPCKLDQZrmk = 20339 |
| 160073 | CEFBS_None, // VPUNPCKLDQZrmkz = 20340 |
| 160074 | CEFBS_None, // VPUNPCKLDQZrr = 20341 |
| 160075 | CEFBS_None, // VPUNPCKLDQZrrk = 20342 |
| 160076 | CEFBS_None, // VPUNPCKLDQZrrkz = 20343 |
| 160077 | CEFBS_None, // VPUNPCKLDQrm = 20344 |
| 160078 | CEFBS_None, // VPUNPCKLDQrr = 20345 |
| 160079 | CEFBS_None, // VPUNPCKLQDQYrm = 20346 |
| 160080 | CEFBS_None, // VPUNPCKLQDQYrr = 20347 |
| 160081 | CEFBS_None, // VPUNPCKLQDQZ128rm = 20348 |
| 160082 | CEFBS_None, // VPUNPCKLQDQZ128rmb = 20349 |
| 160083 | CEFBS_None, // VPUNPCKLQDQZ128rmbk = 20350 |
| 160084 | CEFBS_None, // VPUNPCKLQDQZ128rmbkz = 20351 |
| 160085 | CEFBS_None, // VPUNPCKLQDQZ128rmk = 20352 |
| 160086 | CEFBS_None, // VPUNPCKLQDQZ128rmkz = 20353 |
| 160087 | CEFBS_None, // VPUNPCKLQDQZ128rr = 20354 |
| 160088 | CEFBS_None, // VPUNPCKLQDQZ128rrk = 20355 |
| 160089 | CEFBS_None, // VPUNPCKLQDQZ128rrkz = 20356 |
| 160090 | CEFBS_None, // VPUNPCKLQDQZ256rm = 20357 |
| 160091 | CEFBS_None, // VPUNPCKLQDQZ256rmb = 20358 |
| 160092 | CEFBS_None, // VPUNPCKLQDQZ256rmbk = 20359 |
| 160093 | CEFBS_None, // VPUNPCKLQDQZ256rmbkz = 20360 |
| 160094 | CEFBS_None, // VPUNPCKLQDQZ256rmk = 20361 |
| 160095 | CEFBS_None, // VPUNPCKLQDQZ256rmkz = 20362 |
| 160096 | CEFBS_None, // VPUNPCKLQDQZ256rr = 20363 |
| 160097 | CEFBS_None, // VPUNPCKLQDQZ256rrk = 20364 |
| 160098 | CEFBS_None, // VPUNPCKLQDQZ256rrkz = 20365 |
| 160099 | CEFBS_None, // VPUNPCKLQDQZrm = 20366 |
| 160100 | CEFBS_None, // VPUNPCKLQDQZrmb = 20367 |
| 160101 | CEFBS_None, // VPUNPCKLQDQZrmbk = 20368 |
| 160102 | CEFBS_None, // VPUNPCKLQDQZrmbkz = 20369 |
| 160103 | CEFBS_None, // VPUNPCKLQDQZrmk = 20370 |
| 160104 | CEFBS_None, // VPUNPCKLQDQZrmkz = 20371 |
| 160105 | CEFBS_None, // VPUNPCKLQDQZrr = 20372 |
| 160106 | CEFBS_None, // VPUNPCKLQDQZrrk = 20373 |
| 160107 | CEFBS_None, // VPUNPCKLQDQZrrkz = 20374 |
| 160108 | CEFBS_None, // VPUNPCKLQDQrm = 20375 |
| 160109 | CEFBS_None, // VPUNPCKLQDQrr = 20376 |
| 160110 | CEFBS_None, // VPUNPCKLWDYrm = 20377 |
| 160111 | CEFBS_None, // VPUNPCKLWDYrr = 20378 |
| 160112 | CEFBS_None, // VPUNPCKLWDZ128rm = 20379 |
| 160113 | CEFBS_None, // VPUNPCKLWDZ128rmk = 20380 |
| 160114 | CEFBS_None, // VPUNPCKLWDZ128rmkz = 20381 |
| 160115 | CEFBS_None, // VPUNPCKLWDZ128rr = 20382 |
| 160116 | CEFBS_None, // VPUNPCKLWDZ128rrk = 20383 |
| 160117 | CEFBS_None, // VPUNPCKLWDZ128rrkz = 20384 |
| 160118 | CEFBS_None, // VPUNPCKLWDZ256rm = 20385 |
| 160119 | CEFBS_None, // VPUNPCKLWDZ256rmk = 20386 |
| 160120 | CEFBS_None, // VPUNPCKLWDZ256rmkz = 20387 |
| 160121 | CEFBS_None, // VPUNPCKLWDZ256rr = 20388 |
| 160122 | CEFBS_None, // VPUNPCKLWDZ256rrk = 20389 |
| 160123 | CEFBS_None, // VPUNPCKLWDZ256rrkz = 20390 |
| 160124 | CEFBS_None, // VPUNPCKLWDZrm = 20391 |
| 160125 | CEFBS_None, // VPUNPCKLWDZrmk = 20392 |
| 160126 | CEFBS_None, // VPUNPCKLWDZrmkz = 20393 |
| 160127 | CEFBS_None, // VPUNPCKLWDZrr = 20394 |
| 160128 | CEFBS_None, // VPUNPCKLWDZrrk = 20395 |
| 160129 | CEFBS_None, // VPUNPCKLWDZrrkz = 20396 |
| 160130 | CEFBS_None, // VPUNPCKLWDrm = 20397 |
| 160131 | CEFBS_None, // VPUNPCKLWDrr = 20398 |
| 160132 | CEFBS_None, // VPXORDZ128rm = 20399 |
| 160133 | CEFBS_None, // VPXORDZ128rmb = 20400 |
| 160134 | CEFBS_None, // VPXORDZ128rmbk = 20401 |
| 160135 | CEFBS_None, // VPXORDZ128rmbkz = 20402 |
| 160136 | CEFBS_None, // VPXORDZ128rmk = 20403 |
| 160137 | CEFBS_None, // VPXORDZ128rmkz = 20404 |
| 160138 | CEFBS_None, // VPXORDZ128rr = 20405 |
| 160139 | CEFBS_None, // VPXORDZ128rrk = 20406 |
| 160140 | CEFBS_None, // VPXORDZ128rrkz = 20407 |
| 160141 | CEFBS_None, // VPXORDZ256rm = 20408 |
| 160142 | CEFBS_None, // VPXORDZ256rmb = 20409 |
| 160143 | CEFBS_None, // VPXORDZ256rmbk = 20410 |
| 160144 | CEFBS_None, // VPXORDZ256rmbkz = 20411 |
| 160145 | CEFBS_None, // VPXORDZ256rmk = 20412 |
| 160146 | CEFBS_None, // VPXORDZ256rmkz = 20413 |
| 160147 | CEFBS_None, // VPXORDZ256rr = 20414 |
| 160148 | CEFBS_None, // VPXORDZ256rrk = 20415 |
| 160149 | CEFBS_None, // VPXORDZ256rrkz = 20416 |
| 160150 | CEFBS_None, // VPXORDZrm = 20417 |
| 160151 | CEFBS_None, // VPXORDZrmb = 20418 |
| 160152 | CEFBS_None, // VPXORDZrmbk = 20419 |
| 160153 | CEFBS_None, // VPXORDZrmbkz = 20420 |
| 160154 | CEFBS_None, // VPXORDZrmk = 20421 |
| 160155 | CEFBS_None, // VPXORDZrmkz = 20422 |
| 160156 | CEFBS_None, // VPXORDZrr = 20423 |
| 160157 | CEFBS_None, // VPXORDZrrk = 20424 |
| 160158 | CEFBS_None, // VPXORDZrrkz = 20425 |
| 160159 | CEFBS_None, // VPXORQZ128rm = 20426 |
| 160160 | CEFBS_None, // VPXORQZ128rmb = 20427 |
| 160161 | CEFBS_None, // VPXORQZ128rmbk = 20428 |
| 160162 | CEFBS_None, // VPXORQZ128rmbkz = 20429 |
| 160163 | CEFBS_None, // VPXORQZ128rmk = 20430 |
| 160164 | CEFBS_None, // VPXORQZ128rmkz = 20431 |
| 160165 | CEFBS_None, // VPXORQZ128rr = 20432 |
| 160166 | CEFBS_None, // VPXORQZ128rrk = 20433 |
| 160167 | CEFBS_None, // VPXORQZ128rrkz = 20434 |
| 160168 | CEFBS_None, // VPXORQZ256rm = 20435 |
| 160169 | CEFBS_None, // VPXORQZ256rmb = 20436 |
| 160170 | CEFBS_None, // VPXORQZ256rmbk = 20437 |
| 160171 | CEFBS_None, // VPXORQZ256rmbkz = 20438 |
| 160172 | CEFBS_None, // VPXORQZ256rmk = 20439 |
| 160173 | CEFBS_None, // VPXORQZ256rmkz = 20440 |
| 160174 | CEFBS_None, // VPXORQZ256rr = 20441 |
| 160175 | CEFBS_None, // VPXORQZ256rrk = 20442 |
| 160176 | CEFBS_None, // VPXORQZ256rrkz = 20443 |
| 160177 | CEFBS_None, // VPXORQZrm = 20444 |
| 160178 | CEFBS_None, // VPXORQZrmb = 20445 |
| 160179 | CEFBS_None, // VPXORQZrmbk = 20446 |
| 160180 | CEFBS_None, // VPXORQZrmbkz = 20447 |
| 160181 | CEFBS_None, // VPXORQZrmk = 20448 |
| 160182 | CEFBS_None, // VPXORQZrmkz = 20449 |
| 160183 | CEFBS_None, // VPXORQZrr = 20450 |
| 160184 | CEFBS_None, // VPXORQZrrk = 20451 |
| 160185 | CEFBS_None, // VPXORQZrrkz = 20452 |
| 160186 | CEFBS_None, // VPXORYrm = 20453 |
| 160187 | CEFBS_None, // VPXORYrr = 20454 |
| 160188 | CEFBS_None, // VPXORrm = 20455 |
| 160189 | CEFBS_None, // VPXORrr = 20456 |
| 160190 | CEFBS_None, // VRANGEPDZ128rmbi = 20457 |
| 160191 | CEFBS_None, // VRANGEPDZ128rmbik = 20458 |
| 160192 | CEFBS_None, // VRANGEPDZ128rmbikz = 20459 |
| 160193 | CEFBS_None, // VRANGEPDZ128rmi = 20460 |
| 160194 | CEFBS_None, // VRANGEPDZ128rmik = 20461 |
| 160195 | CEFBS_None, // VRANGEPDZ128rmikz = 20462 |
| 160196 | CEFBS_None, // VRANGEPDZ128rri = 20463 |
| 160197 | CEFBS_None, // VRANGEPDZ128rrik = 20464 |
| 160198 | CEFBS_None, // VRANGEPDZ128rrikz = 20465 |
| 160199 | CEFBS_None, // VRANGEPDZ256rmbi = 20466 |
| 160200 | CEFBS_None, // VRANGEPDZ256rmbik = 20467 |
| 160201 | CEFBS_None, // VRANGEPDZ256rmbikz = 20468 |
| 160202 | CEFBS_None, // VRANGEPDZ256rmi = 20469 |
| 160203 | CEFBS_None, // VRANGEPDZ256rmik = 20470 |
| 160204 | CEFBS_None, // VRANGEPDZ256rmikz = 20471 |
| 160205 | CEFBS_None, // VRANGEPDZ256rri = 20472 |
| 160206 | CEFBS_None, // VRANGEPDZ256rrik = 20473 |
| 160207 | CEFBS_None, // VRANGEPDZ256rrikz = 20474 |
| 160208 | CEFBS_None, // VRANGEPDZrmbi = 20475 |
| 160209 | CEFBS_None, // VRANGEPDZrmbik = 20476 |
| 160210 | CEFBS_None, // VRANGEPDZrmbikz = 20477 |
| 160211 | CEFBS_None, // VRANGEPDZrmi = 20478 |
| 160212 | CEFBS_None, // VRANGEPDZrmik = 20479 |
| 160213 | CEFBS_None, // VRANGEPDZrmikz = 20480 |
| 160214 | CEFBS_None, // VRANGEPDZrri = 20481 |
| 160215 | CEFBS_None, // VRANGEPDZrrib = 20482 |
| 160216 | CEFBS_None, // VRANGEPDZrribk = 20483 |
| 160217 | CEFBS_None, // VRANGEPDZrribkz = 20484 |
| 160218 | CEFBS_None, // VRANGEPDZrrik = 20485 |
| 160219 | CEFBS_None, // VRANGEPDZrrikz = 20486 |
| 160220 | CEFBS_None, // VRANGEPSZ128rmbi = 20487 |
| 160221 | CEFBS_None, // VRANGEPSZ128rmbik = 20488 |
| 160222 | CEFBS_None, // VRANGEPSZ128rmbikz = 20489 |
| 160223 | CEFBS_None, // VRANGEPSZ128rmi = 20490 |
| 160224 | CEFBS_None, // VRANGEPSZ128rmik = 20491 |
| 160225 | CEFBS_None, // VRANGEPSZ128rmikz = 20492 |
| 160226 | CEFBS_None, // VRANGEPSZ128rri = 20493 |
| 160227 | CEFBS_None, // VRANGEPSZ128rrik = 20494 |
| 160228 | CEFBS_None, // VRANGEPSZ128rrikz = 20495 |
| 160229 | CEFBS_None, // VRANGEPSZ256rmbi = 20496 |
| 160230 | CEFBS_None, // VRANGEPSZ256rmbik = 20497 |
| 160231 | CEFBS_None, // VRANGEPSZ256rmbikz = 20498 |
| 160232 | CEFBS_None, // VRANGEPSZ256rmi = 20499 |
| 160233 | CEFBS_None, // VRANGEPSZ256rmik = 20500 |
| 160234 | CEFBS_None, // VRANGEPSZ256rmikz = 20501 |
| 160235 | CEFBS_None, // VRANGEPSZ256rri = 20502 |
| 160236 | CEFBS_None, // VRANGEPSZ256rrik = 20503 |
| 160237 | CEFBS_None, // VRANGEPSZ256rrikz = 20504 |
| 160238 | CEFBS_None, // VRANGEPSZrmbi = 20505 |
| 160239 | CEFBS_None, // VRANGEPSZrmbik = 20506 |
| 160240 | CEFBS_None, // VRANGEPSZrmbikz = 20507 |
| 160241 | CEFBS_None, // VRANGEPSZrmi = 20508 |
| 160242 | CEFBS_None, // VRANGEPSZrmik = 20509 |
| 160243 | CEFBS_None, // VRANGEPSZrmikz = 20510 |
| 160244 | CEFBS_None, // VRANGEPSZrri = 20511 |
| 160245 | CEFBS_None, // VRANGEPSZrrib = 20512 |
| 160246 | CEFBS_None, // VRANGEPSZrribk = 20513 |
| 160247 | CEFBS_None, // VRANGEPSZrribkz = 20514 |
| 160248 | CEFBS_None, // VRANGEPSZrrik = 20515 |
| 160249 | CEFBS_None, // VRANGEPSZrrikz = 20516 |
| 160250 | CEFBS_None, // VRANGESDZrmi = 20517 |
| 160251 | CEFBS_None, // VRANGESDZrmik = 20518 |
| 160252 | CEFBS_None, // VRANGESDZrmikz = 20519 |
| 160253 | CEFBS_None, // VRANGESDZrri = 20520 |
| 160254 | CEFBS_None, // VRANGESDZrrib = 20521 |
| 160255 | CEFBS_None, // VRANGESDZrribk = 20522 |
| 160256 | CEFBS_None, // VRANGESDZrribkz = 20523 |
| 160257 | CEFBS_None, // VRANGESDZrrik = 20524 |
| 160258 | CEFBS_None, // VRANGESDZrrikz = 20525 |
| 160259 | CEFBS_None, // VRANGESSZrmi = 20526 |
| 160260 | CEFBS_None, // VRANGESSZrmik = 20527 |
| 160261 | CEFBS_None, // VRANGESSZrmikz = 20528 |
| 160262 | CEFBS_None, // VRANGESSZrri = 20529 |
| 160263 | CEFBS_None, // VRANGESSZrrib = 20530 |
| 160264 | CEFBS_None, // VRANGESSZrribk = 20531 |
| 160265 | CEFBS_None, // VRANGESSZrribkz = 20532 |
| 160266 | CEFBS_None, // VRANGESSZrrik = 20533 |
| 160267 | CEFBS_None, // VRANGESSZrrikz = 20534 |
| 160268 | CEFBS_None, // VRCP14PDZ128m = 20535 |
| 160269 | CEFBS_None, // VRCP14PDZ128mb = 20536 |
| 160270 | CEFBS_None, // VRCP14PDZ128mbk = 20537 |
| 160271 | CEFBS_None, // VRCP14PDZ128mbkz = 20538 |
| 160272 | CEFBS_None, // VRCP14PDZ128mk = 20539 |
| 160273 | CEFBS_None, // VRCP14PDZ128mkz = 20540 |
| 160274 | CEFBS_None, // VRCP14PDZ128r = 20541 |
| 160275 | CEFBS_None, // VRCP14PDZ128rk = 20542 |
| 160276 | CEFBS_None, // VRCP14PDZ128rkz = 20543 |
| 160277 | CEFBS_None, // VRCP14PDZ256m = 20544 |
| 160278 | CEFBS_None, // VRCP14PDZ256mb = 20545 |
| 160279 | CEFBS_None, // VRCP14PDZ256mbk = 20546 |
| 160280 | CEFBS_None, // VRCP14PDZ256mbkz = 20547 |
| 160281 | CEFBS_None, // VRCP14PDZ256mk = 20548 |
| 160282 | CEFBS_None, // VRCP14PDZ256mkz = 20549 |
| 160283 | CEFBS_None, // VRCP14PDZ256r = 20550 |
| 160284 | CEFBS_None, // VRCP14PDZ256rk = 20551 |
| 160285 | CEFBS_None, // VRCP14PDZ256rkz = 20552 |
| 160286 | CEFBS_None, // VRCP14PDZm = 20553 |
| 160287 | CEFBS_None, // VRCP14PDZmb = 20554 |
| 160288 | CEFBS_None, // VRCP14PDZmbk = 20555 |
| 160289 | CEFBS_None, // VRCP14PDZmbkz = 20556 |
| 160290 | CEFBS_None, // VRCP14PDZmk = 20557 |
| 160291 | CEFBS_None, // VRCP14PDZmkz = 20558 |
| 160292 | CEFBS_None, // VRCP14PDZr = 20559 |
| 160293 | CEFBS_None, // VRCP14PDZrk = 20560 |
| 160294 | CEFBS_None, // VRCP14PDZrkz = 20561 |
| 160295 | CEFBS_None, // VRCP14PSZ128m = 20562 |
| 160296 | CEFBS_None, // VRCP14PSZ128mb = 20563 |
| 160297 | CEFBS_None, // VRCP14PSZ128mbk = 20564 |
| 160298 | CEFBS_None, // VRCP14PSZ128mbkz = 20565 |
| 160299 | CEFBS_None, // VRCP14PSZ128mk = 20566 |
| 160300 | CEFBS_None, // VRCP14PSZ128mkz = 20567 |
| 160301 | CEFBS_None, // VRCP14PSZ128r = 20568 |
| 160302 | CEFBS_None, // VRCP14PSZ128rk = 20569 |
| 160303 | CEFBS_None, // VRCP14PSZ128rkz = 20570 |
| 160304 | CEFBS_None, // VRCP14PSZ256m = 20571 |
| 160305 | CEFBS_None, // VRCP14PSZ256mb = 20572 |
| 160306 | CEFBS_None, // VRCP14PSZ256mbk = 20573 |
| 160307 | CEFBS_None, // VRCP14PSZ256mbkz = 20574 |
| 160308 | CEFBS_None, // VRCP14PSZ256mk = 20575 |
| 160309 | CEFBS_None, // VRCP14PSZ256mkz = 20576 |
| 160310 | CEFBS_None, // VRCP14PSZ256r = 20577 |
| 160311 | CEFBS_None, // VRCP14PSZ256rk = 20578 |
| 160312 | CEFBS_None, // VRCP14PSZ256rkz = 20579 |
| 160313 | CEFBS_None, // VRCP14PSZm = 20580 |
| 160314 | CEFBS_None, // VRCP14PSZmb = 20581 |
| 160315 | CEFBS_None, // VRCP14PSZmbk = 20582 |
| 160316 | CEFBS_None, // VRCP14PSZmbkz = 20583 |
| 160317 | CEFBS_None, // VRCP14PSZmk = 20584 |
| 160318 | CEFBS_None, // VRCP14PSZmkz = 20585 |
| 160319 | CEFBS_None, // VRCP14PSZr = 20586 |
| 160320 | CEFBS_None, // VRCP14PSZrk = 20587 |
| 160321 | CEFBS_None, // VRCP14PSZrkz = 20588 |
| 160322 | CEFBS_None, // VRCP14SDZrm = 20589 |
| 160323 | CEFBS_None, // VRCP14SDZrmk = 20590 |
| 160324 | CEFBS_None, // VRCP14SDZrmkz = 20591 |
| 160325 | CEFBS_None, // VRCP14SDZrr = 20592 |
| 160326 | CEFBS_None, // VRCP14SDZrrk = 20593 |
| 160327 | CEFBS_None, // VRCP14SDZrrkz = 20594 |
| 160328 | CEFBS_None, // VRCP14SSZrm = 20595 |
| 160329 | CEFBS_None, // VRCP14SSZrmk = 20596 |
| 160330 | CEFBS_None, // VRCP14SSZrmkz = 20597 |
| 160331 | CEFBS_None, // VRCP14SSZrr = 20598 |
| 160332 | CEFBS_None, // VRCP14SSZrrk = 20599 |
| 160333 | CEFBS_None, // VRCP14SSZrrkz = 20600 |
| 160334 | CEFBS_None, // VRCP28PDZm = 20601 |
| 160335 | CEFBS_None, // VRCP28PDZmb = 20602 |
| 160336 | CEFBS_None, // VRCP28PDZmbk = 20603 |
| 160337 | CEFBS_None, // VRCP28PDZmbkz = 20604 |
| 160338 | CEFBS_None, // VRCP28PDZmk = 20605 |
| 160339 | CEFBS_None, // VRCP28PDZmkz = 20606 |
| 160340 | CEFBS_None, // VRCP28PDZr = 20607 |
| 160341 | CEFBS_None, // VRCP28PDZrb = 20608 |
| 160342 | CEFBS_None, // VRCP28PDZrbk = 20609 |
| 160343 | CEFBS_None, // VRCP28PDZrbkz = 20610 |
| 160344 | CEFBS_None, // VRCP28PDZrk = 20611 |
| 160345 | CEFBS_None, // VRCP28PDZrkz = 20612 |
| 160346 | CEFBS_None, // VRCP28PSZm = 20613 |
| 160347 | CEFBS_None, // VRCP28PSZmb = 20614 |
| 160348 | CEFBS_None, // VRCP28PSZmbk = 20615 |
| 160349 | CEFBS_None, // VRCP28PSZmbkz = 20616 |
| 160350 | CEFBS_None, // VRCP28PSZmk = 20617 |
| 160351 | CEFBS_None, // VRCP28PSZmkz = 20618 |
| 160352 | CEFBS_None, // VRCP28PSZr = 20619 |
| 160353 | CEFBS_None, // VRCP28PSZrb = 20620 |
| 160354 | CEFBS_None, // VRCP28PSZrbk = 20621 |
| 160355 | CEFBS_None, // VRCP28PSZrbkz = 20622 |
| 160356 | CEFBS_None, // VRCP28PSZrk = 20623 |
| 160357 | CEFBS_None, // VRCP28PSZrkz = 20624 |
| 160358 | CEFBS_None, // VRCP28SDZm = 20625 |
| 160359 | CEFBS_None, // VRCP28SDZmk = 20626 |
| 160360 | CEFBS_None, // VRCP28SDZmkz = 20627 |
| 160361 | CEFBS_None, // VRCP28SDZr = 20628 |
| 160362 | CEFBS_None, // VRCP28SDZrb = 20629 |
| 160363 | CEFBS_None, // VRCP28SDZrbk = 20630 |
| 160364 | CEFBS_None, // VRCP28SDZrbkz = 20631 |
| 160365 | CEFBS_None, // VRCP28SDZrk = 20632 |
| 160366 | CEFBS_None, // VRCP28SDZrkz = 20633 |
| 160367 | CEFBS_None, // VRCP28SSZm = 20634 |
| 160368 | CEFBS_None, // VRCP28SSZmk = 20635 |
| 160369 | CEFBS_None, // VRCP28SSZmkz = 20636 |
| 160370 | CEFBS_None, // VRCP28SSZr = 20637 |
| 160371 | CEFBS_None, // VRCP28SSZrb = 20638 |
| 160372 | CEFBS_None, // VRCP28SSZrbk = 20639 |
| 160373 | CEFBS_None, // VRCP28SSZrbkz = 20640 |
| 160374 | CEFBS_None, // VRCP28SSZrk = 20641 |
| 160375 | CEFBS_None, // VRCP28SSZrkz = 20642 |
| 160376 | CEFBS_None, // VRCPBF16Z128m = 20643 |
| 160377 | CEFBS_None, // VRCPBF16Z128mb = 20644 |
| 160378 | CEFBS_None, // VRCPBF16Z128mbk = 20645 |
| 160379 | CEFBS_None, // VRCPBF16Z128mbkz = 20646 |
| 160380 | CEFBS_None, // VRCPBF16Z128mk = 20647 |
| 160381 | CEFBS_None, // VRCPBF16Z128mkz = 20648 |
| 160382 | CEFBS_None, // VRCPBF16Z128r = 20649 |
| 160383 | CEFBS_None, // VRCPBF16Z128rk = 20650 |
| 160384 | CEFBS_None, // VRCPBF16Z128rkz = 20651 |
| 160385 | CEFBS_None, // VRCPBF16Z256m = 20652 |
| 160386 | CEFBS_None, // VRCPBF16Z256mb = 20653 |
| 160387 | CEFBS_None, // VRCPBF16Z256mbk = 20654 |
| 160388 | CEFBS_None, // VRCPBF16Z256mbkz = 20655 |
| 160389 | CEFBS_None, // VRCPBF16Z256mk = 20656 |
| 160390 | CEFBS_None, // VRCPBF16Z256mkz = 20657 |
| 160391 | CEFBS_None, // VRCPBF16Z256r = 20658 |
| 160392 | CEFBS_None, // VRCPBF16Z256rk = 20659 |
| 160393 | CEFBS_None, // VRCPBF16Z256rkz = 20660 |
| 160394 | CEFBS_None, // VRCPBF16Zm = 20661 |
| 160395 | CEFBS_None, // VRCPBF16Zmb = 20662 |
| 160396 | CEFBS_None, // VRCPBF16Zmbk = 20663 |
| 160397 | CEFBS_None, // VRCPBF16Zmbkz = 20664 |
| 160398 | CEFBS_None, // VRCPBF16Zmk = 20665 |
| 160399 | CEFBS_None, // VRCPBF16Zmkz = 20666 |
| 160400 | CEFBS_None, // VRCPBF16Zr = 20667 |
| 160401 | CEFBS_None, // VRCPBF16Zrk = 20668 |
| 160402 | CEFBS_None, // VRCPBF16Zrkz = 20669 |
| 160403 | CEFBS_None, // VRCPPHZ128m = 20670 |
| 160404 | CEFBS_None, // VRCPPHZ128mb = 20671 |
| 160405 | CEFBS_None, // VRCPPHZ128mbk = 20672 |
| 160406 | CEFBS_None, // VRCPPHZ128mbkz = 20673 |
| 160407 | CEFBS_None, // VRCPPHZ128mk = 20674 |
| 160408 | CEFBS_None, // VRCPPHZ128mkz = 20675 |
| 160409 | CEFBS_None, // VRCPPHZ128r = 20676 |
| 160410 | CEFBS_None, // VRCPPHZ128rk = 20677 |
| 160411 | CEFBS_None, // VRCPPHZ128rkz = 20678 |
| 160412 | CEFBS_None, // VRCPPHZ256m = 20679 |
| 160413 | CEFBS_None, // VRCPPHZ256mb = 20680 |
| 160414 | CEFBS_None, // VRCPPHZ256mbk = 20681 |
| 160415 | CEFBS_None, // VRCPPHZ256mbkz = 20682 |
| 160416 | CEFBS_None, // VRCPPHZ256mk = 20683 |
| 160417 | CEFBS_None, // VRCPPHZ256mkz = 20684 |
| 160418 | CEFBS_None, // VRCPPHZ256r = 20685 |
| 160419 | CEFBS_None, // VRCPPHZ256rk = 20686 |
| 160420 | CEFBS_None, // VRCPPHZ256rkz = 20687 |
| 160421 | CEFBS_None, // VRCPPHZm = 20688 |
| 160422 | CEFBS_None, // VRCPPHZmb = 20689 |
| 160423 | CEFBS_None, // VRCPPHZmbk = 20690 |
| 160424 | CEFBS_None, // VRCPPHZmbkz = 20691 |
| 160425 | CEFBS_None, // VRCPPHZmk = 20692 |
| 160426 | CEFBS_None, // VRCPPHZmkz = 20693 |
| 160427 | CEFBS_None, // VRCPPHZr = 20694 |
| 160428 | CEFBS_None, // VRCPPHZrk = 20695 |
| 160429 | CEFBS_None, // VRCPPHZrkz = 20696 |
| 160430 | CEFBS_None, // VRCPPSYm = 20697 |
| 160431 | CEFBS_None, // VRCPPSYr = 20698 |
| 160432 | CEFBS_None, // VRCPPSm = 20699 |
| 160433 | CEFBS_None, // VRCPPSr = 20700 |
| 160434 | CEFBS_None, // VRCPSHZrm = 20701 |
| 160435 | CEFBS_None, // VRCPSHZrmk = 20702 |
| 160436 | CEFBS_None, // VRCPSHZrmkz = 20703 |
| 160437 | CEFBS_None, // VRCPSHZrr = 20704 |
| 160438 | CEFBS_None, // VRCPSHZrrk = 20705 |
| 160439 | CEFBS_None, // VRCPSHZrrkz = 20706 |
| 160440 | CEFBS_None, // VRCPSSm = 20707 |
| 160441 | CEFBS_None, // VRCPSSm_Int = 20708 |
| 160442 | CEFBS_None, // VRCPSSr = 20709 |
| 160443 | CEFBS_None, // VRCPSSr_Int = 20710 |
| 160444 | CEFBS_None, // VREDUCEBF16Z128rmbi = 20711 |
| 160445 | CEFBS_None, // VREDUCEBF16Z128rmbik = 20712 |
| 160446 | CEFBS_None, // VREDUCEBF16Z128rmbikz = 20713 |
| 160447 | CEFBS_None, // VREDUCEBF16Z128rmi = 20714 |
| 160448 | CEFBS_None, // VREDUCEBF16Z128rmik = 20715 |
| 160449 | CEFBS_None, // VREDUCEBF16Z128rmikz = 20716 |
| 160450 | CEFBS_None, // VREDUCEBF16Z128rri = 20717 |
| 160451 | CEFBS_None, // VREDUCEBF16Z128rrik = 20718 |
| 160452 | CEFBS_None, // VREDUCEBF16Z128rrikz = 20719 |
| 160453 | CEFBS_None, // VREDUCEBF16Z256rmbi = 20720 |
| 160454 | CEFBS_None, // VREDUCEBF16Z256rmbik = 20721 |
| 160455 | CEFBS_None, // VREDUCEBF16Z256rmbikz = 20722 |
| 160456 | CEFBS_None, // VREDUCEBF16Z256rmi = 20723 |
| 160457 | CEFBS_None, // VREDUCEBF16Z256rmik = 20724 |
| 160458 | CEFBS_None, // VREDUCEBF16Z256rmikz = 20725 |
| 160459 | CEFBS_None, // VREDUCEBF16Z256rri = 20726 |
| 160460 | CEFBS_None, // VREDUCEBF16Z256rrik = 20727 |
| 160461 | CEFBS_None, // VREDUCEBF16Z256rrikz = 20728 |
| 160462 | CEFBS_None, // VREDUCEBF16Zrmbi = 20729 |
| 160463 | CEFBS_None, // VREDUCEBF16Zrmbik = 20730 |
| 160464 | CEFBS_None, // VREDUCEBF16Zrmbikz = 20731 |
| 160465 | CEFBS_None, // VREDUCEBF16Zrmi = 20732 |
| 160466 | CEFBS_None, // VREDUCEBF16Zrmik = 20733 |
| 160467 | CEFBS_None, // VREDUCEBF16Zrmikz = 20734 |
| 160468 | CEFBS_None, // VREDUCEBF16Zrri = 20735 |
| 160469 | CEFBS_None, // VREDUCEBF16Zrrik = 20736 |
| 160470 | CEFBS_None, // VREDUCEBF16Zrrikz = 20737 |
| 160471 | CEFBS_None, // VREDUCEPDZ128rmbi = 20738 |
| 160472 | CEFBS_None, // VREDUCEPDZ128rmbik = 20739 |
| 160473 | CEFBS_None, // VREDUCEPDZ128rmbikz = 20740 |
| 160474 | CEFBS_None, // VREDUCEPDZ128rmi = 20741 |
| 160475 | CEFBS_None, // VREDUCEPDZ128rmik = 20742 |
| 160476 | CEFBS_None, // VREDUCEPDZ128rmikz = 20743 |
| 160477 | CEFBS_None, // VREDUCEPDZ128rri = 20744 |
| 160478 | CEFBS_None, // VREDUCEPDZ128rrik = 20745 |
| 160479 | CEFBS_None, // VREDUCEPDZ128rrikz = 20746 |
| 160480 | CEFBS_None, // VREDUCEPDZ256rmbi = 20747 |
| 160481 | CEFBS_None, // VREDUCEPDZ256rmbik = 20748 |
| 160482 | CEFBS_None, // VREDUCEPDZ256rmbikz = 20749 |
| 160483 | CEFBS_None, // VREDUCEPDZ256rmi = 20750 |
| 160484 | CEFBS_None, // VREDUCEPDZ256rmik = 20751 |
| 160485 | CEFBS_None, // VREDUCEPDZ256rmikz = 20752 |
| 160486 | CEFBS_None, // VREDUCEPDZ256rri = 20753 |
| 160487 | CEFBS_None, // VREDUCEPDZ256rrik = 20754 |
| 160488 | CEFBS_None, // VREDUCEPDZ256rrikz = 20755 |
| 160489 | CEFBS_None, // VREDUCEPDZrmbi = 20756 |
| 160490 | CEFBS_None, // VREDUCEPDZrmbik = 20757 |
| 160491 | CEFBS_None, // VREDUCEPDZrmbikz = 20758 |
| 160492 | CEFBS_None, // VREDUCEPDZrmi = 20759 |
| 160493 | CEFBS_None, // VREDUCEPDZrmik = 20760 |
| 160494 | CEFBS_None, // VREDUCEPDZrmikz = 20761 |
| 160495 | CEFBS_None, // VREDUCEPDZrri = 20762 |
| 160496 | CEFBS_None, // VREDUCEPDZrrib = 20763 |
| 160497 | CEFBS_None, // VREDUCEPDZrribk = 20764 |
| 160498 | CEFBS_None, // VREDUCEPDZrribkz = 20765 |
| 160499 | CEFBS_None, // VREDUCEPDZrrik = 20766 |
| 160500 | CEFBS_None, // VREDUCEPDZrrikz = 20767 |
| 160501 | CEFBS_None, // VREDUCEPHZ128rmbi = 20768 |
| 160502 | CEFBS_None, // VREDUCEPHZ128rmbik = 20769 |
| 160503 | CEFBS_None, // VREDUCEPHZ128rmbikz = 20770 |
| 160504 | CEFBS_None, // VREDUCEPHZ128rmi = 20771 |
| 160505 | CEFBS_None, // VREDUCEPHZ128rmik = 20772 |
| 160506 | CEFBS_None, // VREDUCEPHZ128rmikz = 20773 |
| 160507 | CEFBS_None, // VREDUCEPHZ128rri = 20774 |
| 160508 | CEFBS_None, // VREDUCEPHZ128rrik = 20775 |
| 160509 | CEFBS_None, // VREDUCEPHZ128rrikz = 20776 |
| 160510 | CEFBS_None, // VREDUCEPHZ256rmbi = 20777 |
| 160511 | CEFBS_None, // VREDUCEPHZ256rmbik = 20778 |
| 160512 | CEFBS_None, // VREDUCEPHZ256rmbikz = 20779 |
| 160513 | CEFBS_None, // VREDUCEPHZ256rmi = 20780 |
| 160514 | CEFBS_None, // VREDUCEPHZ256rmik = 20781 |
| 160515 | CEFBS_None, // VREDUCEPHZ256rmikz = 20782 |
| 160516 | CEFBS_None, // VREDUCEPHZ256rri = 20783 |
| 160517 | CEFBS_None, // VREDUCEPHZ256rrik = 20784 |
| 160518 | CEFBS_None, // VREDUCEPHZ256rrikz = 20785 |
| 160519 | CEFBS_None, // VREDUCEPHZrmbi = 20786 |
| 160520 | CEFBS_None, // VREDUCEPHZrmbik = 20787 |
| 160521 | CEFBS_None, // VREDUCEPHZrmbikz = 20788 |
| 160522 | CEFBS_None, // VREDUCEPHZrmi = 20789 |
| 160523 | CEFBS_None, // VREDUCEPHZrmik = 20790 |
| 160524 | CEFBS_None, // VREDUCEPHZrmikz = 20791 |
| 160525 | CEFBS_None, // VREDUCEPHZrri = 20792 |
| 160526 | CEFBS_None, // VREDUCEPHZrrib = 20793 |
| 160527 | CEFBS_None, // VREDUCEPHZrribk = 20794 |
| 160528 | CEFBS_None, // VREDUCEPHZrribkz = 20795 |
| 160529 | CEFBS_None, // VREDUCEPHZrrik = 20796 |
| 160530 | CEFBS_None, // VREDUCEPHZrrikz = 20797 |
| 160531 | CEFBS_None, // VREDUCEPSZ128rmbi = 20798 |
| 160532 | CEFBS_None, // VREDUCEPSZ128rmbik = 20799 |
| 160533 | CEFBS_None, // VREDUCEPSZ128rmbikz = 20800 |
| 160534 | CEFBS_None, // VREDUCEPSZ128rmi = 20801 |
| 160535 | CEFBS_None, // VREDUCEPSZ128rmik = 20802 |
| 160536 | CEFBS_None, // VREDUCEPSZ128rmikz = 20803 |
| 160537 | CEFBS_None, // VREDUCEPSZ128rri = 20804 |
| 160538 | CEFBS_None, // VREDUCEPSZ128rrik = 20805 |
| 160539 | CEFBS_None, // VREDUCEPSZ128rrikz = 20806 |
| 160540 | CEFBS_None, // VREDUCEPSZ256rmbi = 20807 |
| 160541 | CEFBS_None, // VREDUCEPSZ256rmbik = 20808 |
| 160542 | CEFBS_None, // VREDUCEPSZ256rmbikz = 20809 |
| 160543 | CEFBS_None, // VREDUCEPSZ256rmi = 20810 |
| 160544 | CEFBS_None, // VREDUCEPSZ256rmik = 20811 |
| 160545 | CEFBS_None, // VREDUCEPSZ256rmikz = 20812 |
| 160546 | CEFBS_None, // VREDUCEPSZ256rri = 20813 |
| 160547 | CEFBS_None, // VREDUCEPSZ256rrik = 20814 |
| 160548 | CEFBS_None, // VREDUCEPSZ256rrikz = 20815 |
| 160549 | CEFBS_None, // VREDUCEPSZrmbi = 20816 |
| 160550 | CEFBS_None, // VREDUCEPSZrmbik = 20817 |
| 160551 | CEFBS_None, // VREDUCEPSZrmbikz = 20818 |
| 160552 | CEFBS_None, // VREDUCEPSZrmi = 20819 |
| 160553 | CEFBS_None, // VREDUCEPSZrmik = 20820 |
| 160554 | CEFBS_None, // VREDUCEPSZrmikz = 20821 |
| 160555 | CEFBS_None, // VREDUCEPSZrri = 20822 |
| 160556 | CEFBS_None, // VREDUCEPSZrrib = 20823 |
| 160557 | CEFBS_None, // VREDUCEPSZrribk = 20824 |
| 160558 | CEFBS_None, // VREDUCEPSZrribkz = 20825 |
| 160559 | CEFBS_None, // VREDUCEPSZrrik = 20826 |
| 160560 | CEFBS_None, // VREDUCEPSZrrikz = 20827 |
| 160561 | CEFBS_None, // VREDUCESDZrmi = 20828 |
| 160562 | CEFBS_None, // VREDUCESDZrmik = 20829 |
| 160563 | CEFBS_None, // VREDUCESDZrmikz = 20830 |
| 160564 | CEFBS_None, // VREDUCESDZrri = 20831 |
| 160565 | CEFBS_None, // VREDUCESDZrrib = 20832 |
| 160566 | CEFBS_None, // VREDUCESDZrribk = 20833 |
| 160567 | CEFBS_None, // VREDUCESDZrribkz = 20834 |
| 160568 | CEFBS_None, // VREDUCESDZrrik = 20835 |
| 160569 | CEFBS_None, // VREDUCESDZrrikz = 20836 |
| 160570 | CEFBS_None, // VREDUCESHZrmi = 20837 |
| 160571 | CEFBS_None, // VREDUCESHZrmik = 20838 |
| 160572 | CEFBS_None, // VREDUCESHZrmikz = 20839 |
| 160573 | CEFBS_None, // VREDUCESHZrri = 20840 |
| 160574 | CEFBS_None, // VREDUCESHZrrib = 20841 |
| 160575 | CEFBS_None, // VREDUCESHZrribk = 20842 |
| 160576 | CEFBS_None, // VREDUCESHZrribkz = 20843 |
| 160577 | CEFBS_None, // VREDUCESHZrrik = 20844 |
| 160578 | CEFBS_None, // VREDUCESHZrrikz = 20845 |
| 160579 | CEFBS_None, // VREDUCESSZrmi = 20846 |
| 160580 | CEFBS_None, // VREDUCESSZrmik = 20847 |
| 160581 | CEFBS_None, // VREDUCESSZrmikz = 20848 |
| 160582 | CEFBS_None, // VREDUCESSZrri = 20849 |
| 160583 | CEFBS_None, // VREDUCESSZrrib = 20850 |
| 160584 | CEFBS_None, // VREDUCESSZrribk = 20851 |
| 160585 | CEFBS_None, // VREDUCESSZrribkz = 20852 |
| 160586 | CEFBS_None, // VREDUCESSZrrik = 20853 |
| 160587 | CEFBS_None, // VREDUCESSZrrikz = 20854 |
| 160588 | CEFBS_None, // VRNDSCALEBF16Z128rmbi = 20855 |
| 160589 | CEFBS_None, // VRNDSCALEBF16Z128rmbik = 20856 |
| 160590 | CEFBS_None, // VRNDSCALEBF16Z128rmbikz = 20857 |
| 160591 | CEFBS_None, // VRNDSCALEBF16Z128rmi = 20858 |
| 160592 | CEFBS_None, // VRNDSCALEBF16Z128rmik = 20859 |
| 160593 | CEFBS_None, // VRNDSCALEBF16Z128rmikz = 20860 |
| 160594 | CEFBS_None, // VRNDSCALEBF16Z128rri = 20861 |
| 160595 | CEFBS_None, // VRNDSCALEBF16Z128rrik = 20862 |
| 160596 | CEFBS_None, // VRNDSCALEBF16Z128rrikz = 20863 |
| 160597 | CEFBS_None, // VRNDSCALEBF16Z256rmbi = 20864 |
| 160598 | CEFBS_None, // VRNDSCALEBF16Z256rmbik = 20865 |
| 160599 | CEFBS_None, // VRNDSCALEBF16Z256rmbikz = 20866 |
| 160600 | CEFBS_None, // VRNDSCALEBF16Z256rmi = 20867 |
| 160601 | CEFBS_None, // VRNDSCALEBF16Z256rmik = 20868 |
| 160602 | CEFBS_None, // VRNDSCALEBF16Z256rmikz = 20869 |
| 160603 | CEFBS_None, // VRNDSCALEBF16Z256rri = 20870 |
| 160604 | CEFBS_None, // VRNDSCALEBF16Z256rrik = 20871 |
| 160605 | CEFBS_None, // VRNDSCALEBF16Z256rrikz = 20872 |
| 160606 | CEFBS_None, // VRNDSCALEBF16Zrmbi = 20873 |
| 160607 | CEFBS_None, // VRNDSCALEBF16Zrmbik = 20874 |
| 160608 | CEFBS_None, // VRNDSCALEBF16Zrmbikz = 20875 |
| 160609 | CEFBS_None, // VRNDSCALEBF16Zrmi = 20876 |
| 160610 | CEFBS_None, // VRNDSCALEBF16Zrmik = 20877 |
| 160611 | CEFBS_None, // VRNDSCALEBF16Zrmikz = 20878 |
| 160612 | CEFBS_None, // VRNDSCALEBF16Zrri = 20879 |
| 160613 | CEFBS_None, // VRNDSCALEBF16Zrrik = 20880 |
| 160614 | CEFBS_None, // VRNDSCALEBF16Zrrikz = 20881 |
| 160615 | CEFBS_None, // VRNDSCALEPDZ128rmbi = 20882 |
| 160616 | CEFBS_None, // VRNDSCALEPDZ128rmbik = 20883 |
| 160617 | CEFBS_None, // VRNDSCALEPDZ128rmbikz = 20884 |
| 160618 | CEFBS_None, // VRNDSCALEPDZ128rmi = 20885 |
| 160619 | CEFBS_None, // VRNDSCALEPDZ128rmik = 20886 |
| 160620 | CEFBS_None, // VRNDSCALEPDZ128rmikz = 20887 |
| 160621 | CEFBS_None, // VRNDSCALEPDZ128rri = 20888 |
| 160622 | CEFBS_None, // VRNDSCALEPDZ128rrik = 20889 |
| 160623 | CEFBS_None, // VRNDSCALEPDZ128rrikz = 20890 |
| 160624 | CEFBS_None, // VRNDSCALEPDZ256rmbi = 20891 |
| 160625 | CEFBS_None, // VRNDSCALEPDZ256rmbik = 20892 |
| 160626 | CEFBS_None, // VRNDSCALEPDZ256rmbikz = 20893 |
| 160627 | CEFBS_None, // VRNDSCALEPDZ256rmi = 20894 |
| 160628 | CEFBS_None, // VRNDSCALEPDZ256rmik = 20895 |
| 160629 | CEFBS_None, // VRNDSCALEPDZ256rmikz = 20896 |
| 160630 | CEFBS_None, // VRNDSCALEPDZ256rri = 20897 |
| 160631 | CEFBS_None, // VRNDSCALEPDZ256rrik = 20898 |
| 160632 | CEFBS_None, // VRNDSCALEPDZ256rrikz = 20899 |
| 160633 | CEFBS_None, // VRNDSCALEPDZrmbi = 20900 |
| 160634 | CEFBS_None, // VRNDSCALEPDZrmbik = 20901 |
| 160635 | CEFBS_None, // VRNDSCALEPDZrmbikz = 20902 |
| 160636 | CEFBS_None, // VRNDSCALEPDZrmi = 20903 |
| 160637 | CEFBS_None, // VRNDSCALEPDZrmik = 20904 |
| 160638 | CEFBS_None, // VRNDSCALEPDZrmikz = 20905 |
| 160639 | CEFBS_None, // VRNDSCALEPDZrri = 20906 |
| 160640 | CEFBS_None, // VRNDSCALEPDZrrib = 20907 |
| 160641 | CEFBS_None, // VRNDSCALEPDZrribk = 20908 |
| 160642 | CEFBS_None, // VRNDSCALEPDZrribkz = 20909 |
| 160643 | CEFBS_None, // VRNDSCALEPDZrrik = 20910 |
| 160644 | CEFBS_None, // VRNDSCALEPDZrrikz = 20911 |
| 160645 | CEFBS_None, // VRNDSCALEPHZ128rmbi = 20912 |
| 160646 | CEFBS_None, // VRNDSCALEPHZ128rmbik = 20913 |
| 160647 | CEFBS_None, // VRNDSCALEPHZ128rmbikz = 20914 |
| 160648 | CEFBS_None, // VRNDSCALEPHZ128rmi = 20915 |
| 160649 | CEFBS_None, // VRNDSCALEPHZ128rmik = 20916 |
| 160650 | CEFBS_None, // VRNDSCALEPHZ128rmikz = 20917 |
| 160651 | CEFBS_None, // VRNDSCALEPHZ128rri = 20918 |
| 160652 | CEFBS_None, // VRNDSCALEPHZ128rrik = 20919 |
| 160653 | CEFBS_None, // VRNDSCALEPHZ128rrikz = 20920 |
| 160654 | CEFBS_None, // VRNDSCALEPHZ256rmbi = 20921 |
| 160655 | CEFBS_None, // VRNDSCALEPHZ256rmbik = 20922 |
| 160656 | CEFBS_None, // VRNDSCALEPHZ256rmbikz = 20923 |
| 160657 | CEFBS_None, // VRNDSCALEPHZ256rmi = 20924 |
| 160658 | CEFBS_None, // VRNDSCALEPHZ256rmik = 20925 |
| 160659 | CEFBS_None, // VRNDSCALEPHZ256rmikz = 20926 |
| 160660 | CEFBS_None, // VRNDSCALEPHZ256rri = 20927 |
| 160661 | CEFBS_None, // VRNDSCALEPHZ256rrik = 20928 |
| 160662 | CEFBS_None, // VRNDSCALEPHZ256rrikz = 20929 |
| 160663 | CEFBS_None, // VRNDSCALEPHZrmbi = 20930 |
| 160664 | CEFBS_None, // VRNDSCALEPHZrmbik = 20931 |
| 160665 | CEFBS_None, // VRNDSCALEPHZrmbikz = 20932 |
| 160666 | CEFBS_None, // VRNDSCALEPHZrmi = 20933 |
| 160667 | CEFBS_None, // VRNDSCALEPHZrmik = 20934 |
| 160668 | CEFBS_None, // VRNDSCALEPHZrmikz = 20935 |
| 160669 | CEFBS_None, // VRNDSCALEPHZrri = 20936 |
| 160670 | CEFBS_None, // VRNDSCALEPHZrrib = 20937 |
| 160671 | CEFBS_None, // VRNDSCALEPHZrribk = 20938 |
| 160672 | CEFBS_None, // VRNDSCALEPHZrribkz = 20939 |
| 160673 | CEFBS_None, // VRNDSCALEPHZrrik = 20940 |
| 160674 | CEFBS_None, // VRNDSCALEPHZrrikz = 20941 |
| 160675 | CEFBS_None, // VRNDSCALEPSZ128rmbi = 20942 |
| 160676 | CEFBS_None, // VRNDSCALEPSZ128rmbik = 20943 |
| 160677 | CEFBS_None, // VRNDSCALEPSZ128rmbikz = 20944 |
| 160678 | CEFBS_None, // VRNDSCALEPSZ128rmi = 20945 |
| 160679 | CEFBS_None, // VRNDSCALEPSZ128rmik = 20946 |
| 160680 | CEFBS_None, // VRNDSCALEPSZ128rmikz = 20947 |
| 160681 | CEFBS_None, // VRNDSCALEPSZ128rri = 20948 |
| 160682 | CEFBS_None, // VRNDSCALEPSZ128rrik = 20949 |
| 160683 | CEFBS_None, // VRNDSCALEPSZ128rrikz = 20950 |
| 160684 | CEFBS_None, // VRNDSCALEPSZ256rmbi = 20951 |
| 160685 | CEFBS_None, // VRNDSCALEPSZ256rmbik = 20952 |
| 160686 | CEFBS_None, // VRNDSCALEPSZ256rmbikz = 20953 |
| 160687 | CEFBS_None, // VRNDSCALEPSZ256rmi = 20954 |
| 160688 | CEFBS_None, // VRNDSCALEPSZ256rmik = 20955 |
| 160689 | CEFBS_None, // VRNDSCALEPSZ256rmikz = 20956 |
| 160690 | CEFBS_None, // VRNDSCALEPSZ256rri = 20957 |
| 160691 | CEFBS_None, // VRNDSCALEPSZ256rrik = 20958 |
| 160692 | CEFBS_None, // VRNDSCALEPSZ256rrikz = 20959 |
| 160693 | CEFBS_None, // VRNDSCALEPSZrmbi = 20960 |
| 160694 | CEFBS_None, // VRNDSCALEPSZrmbik = 20961 |
| 160695 | CEFBS_None, // VRNDSCALEPSZrmbikz = 20962 |
| 160696 | CEFBS_None, // VRNDSCALEPSZrmi = 20963 |
| 160697 | CEFBS_None, // VRNDSCALEPSZrmik = 20964 |
| 160698 | CEFBS_None, // VRNDSCALEPSZrmikz = 20965 |
| 160699 | CEFBS_None, // VRNDSCALEPSZrri = 20966 |
| 160700 | CEFBS_None, // VRNDSCALEPSZrrib = 20967 |
| 160701 | CEFBS_None, // VRNDSCALEPSZrribk = 20968 |
| 160702 | CEFBS_None, // VRNDSCALEPSZrribkz = 20969 |
| 160703 | CEFBS_None, // VRNDSCALEPSZrrik = 20970 |
| 160704 | CEFBS_None, // VRNDSCALEPSZrrikz = 20971 |
| 160705 | CEFBS_None, // VRNDSCALESDZrmi = 20972 |
| 160706 | CEFBS_None, // VRNDSCALESDZrmi_Int = 20973 |
| 160707 | CEFBS_None, // VRNDSCALESDZrmik_Int = 20974 |
| 160708 | CEFBS_None, // VRNDSCALESDZrmikz_Int = 20975 |
| 160709 | CEFBS_None, // VRNDSCALESDZrri = 20976 |
| 160710 | CEFBS_None, // VRNDSCALESDZrri_Int = 20977 |
| 160711 | CEFBS_None, // VRNDSCALESDZrrib_Int = 20978 |
| 160712 | CEFBS_None, // VRNDSCALESDZrribk_Int = 20979 |
| 160713 | CEFBS_None, // VRNDSCALESDZrribkz_Int = 20980 |
| 160714 | CEFBS_None, // VRNDSCALESDZrrik_Int = 20981 |
| 160715 | CEFBS_None, // VRNDSCALESDZrrikz_Int = 20982 |
| 160716 | CEFBS_None, // VRNDSCALESHZrmi = 20983 |
| 160717 | CEFBS_None, // VRNDSCALESHZrmi_Int = 20984 |
| 160718 | CEFBS_None, // VRNDSCALESHZrmik_Int = 20985 |
| 160719 | CEFBS_None, // VRNDSCALESHZrmikz_Int = 20986 |
| 160720 | CEFBS_None, // VRNDSCALESHZrri = 20987 |
| 160721 | CEFBS_None, // VRNDSCALESHZrri_Int = 20988 |
| 160722 | CEFBS_None, // VRNDSCALESHZrrib_Int = 20989 |
| 160723 | CEFBS_None, // VRNDSCALESHZrribk_Int = 20990 |
| 160724 | CEFBS_None, // VRNDSCALESHZrribkz_Int = 20991 |
| 160725 | CEFBS_None, // VRNDSCALESHZrrik_Int = 20992 |
| 160726 | CEFBS_None, // VRNDSCALESHZrrikz_Int = 20993 |
| 160727 | CEFBS_None, // VRNDSCALESSZrmi = 20994 |
| 160728 | CEFBS_None, // VRNDSCALESSZrmi_Int = 20995 |
| 160729 | CEFBS_None, // VRNDSCALESSZrmik_Int = 20996 |
| 160730 | CEFBS_None, // VRNDSCALESSZrmikz_Int = 20997 |
| 160731 | CEFBS_None, // VRNDSCALESSZrri = 20998 |
| 160732 | CEFBS_None, // VRNDSCALESSZrri_Int = 20999 |
| 160733 | CEFBS_None, // VRNDSCALESSZrrib_Int = 21000 |
| 160734 | CEFBS_None, // VRNDSCALESSZrribk_Int = 21001 |
| 160735 | CEFBS_None, // VRNDSCALESSZrribkz_Int = 21002 |
| 160736 | CEFBS_None, // VRNDSCALESSZrrik_Int = 21003 |
| 160737 | CEFBS_None, // VRNDSCALESSZrrikz_Int = 21004 |
| 160738 | CEFBS_None, // VROUNDPDYmi = 21005 |
| 160739 | CEFBS_None, // VROUNDPDYri = 21006 |
| 160740 | CEFBS_None, // VROUNDPDmi = 21007 |
| 160741 | CEFBS_None, // VROUNDPDri = 21008 |
| 160742 | CEFBS_None, // VROUNDPSYmi = 21009 |
| 160743 | CEFBS_None, // VROUNDPSYri = 21010 |
| 160744 | CEFBS_None, // VROUNDPSmi = 21011 |
| 160745 | CEFBS_None, // VROUNDPSri = 21012 |
| 160746 | CEFBS_None, // VROUNDSDmi = 21013 |
| 160747 | CEFBS_None, // VROUNDSDmi_Int = 21014 |
| 160748 | CEFBS_None, // VROUNDSDri = 21015 |
| 160749 | CEFBS_None, // VROUNDSDri_Int = 21016 |
| 160750 | CEFBS_None, // VROUNDSSmi = 21017 |
| 160751 | CEFBS_None, // VROUNDSSmi_Int = 21018 |
| 160752 | CEFBS_None, // VROUNDSSri = 21019 |
| 160753 | CEFBS_None, // VROUNDSSri_Int = 21020 |
| 160754 | CEFBS_None, // VRSQRT14PDZ128m = 21021 |
| 160755 | CEFBS_None, // VRSQRT14PDZ128mb = 21022 |
| 160756 | CEFBS_None, // VRSQRT14PDZ128mbk = 21023 |
| 160757 | CEFBS_None, // VRSQRT14PDZ128mbkz = 21024 |
| 160758 | CEFBS_None, // VRSQRT14PDZ128mk = 21025 |
| 160759 | CEFBS_None, // VRSQRT14PDZ128mkz = 21026 |
| 160760 | CEFBS_None, // VRSQRT14PDZ128r = 21027 |
| 160761 | CEFBS_None, // VRSQRT14PDZ128rk = 21028 |
| 160762 | CEFBS_None, // VRSQRT14PDZ128rkz = 21029 |
| 160763 | CEFBS_None, // VRSQRT14PDZ256m = 21030 |
| 160764 | CEFBS_None, // VRSQRT14PDZ256mb = 21031 |
| 160765 | CEFBS_None, // VRSQRT14PDZ256mbk = 21032 |
| 160766 | CEFBS_None, // VRSQRT14PDZ256mbkz = 21033 |
| 160767 | CEFBS_None, // VRSQRT14PDZ256mk = 21034 |
| 160768 | CEFBS_None, // VRSQRT14PDZ256mkz = 21035 |
| 160769 | CEFBS_None, // VRSQRT14PDZ256r = 21036 |
| 160770 | CEFBS_None, // VRSQRT14PDZ256rk = 21037 |
| 160771 | CEFBS_None, // VRSQRT14PDZ256rkz = 21038 |
| 160772 | CEFBS_None, // VRSQRT14PDZm = 21039 |
| 160773 | CEFBS_None, // VRSQRT14PDZmb = 21040 |
| 160774 | CEFBS_None, // VRSQRT14PDZmbk = 21041 |
| 160775 | CEFBS_None, // VRSQRT14PDZmbkz = 21042 |
| 160776 | CEFBS_None, // VRSQRT14PDZmk = 21043 |
| 160777 | CEFBS_None, // VRSQRT14PDZmkz = 21044 |
| 160778 | CEFBS_None, // VRSQRT14PDZr = 21045 |
| 160779 | CEFBS_None, // VRSQRT14PDZrk = 21046 |
| 160780 | CEFBS_None, // VRSQRT14PDZrkz = 21047 |
| 160781 | CEFBS_None, // VRSQRT14PSZ128m = 21048 |
| 160782 | CEFBS_None, // VRSQRT14PSZ128mb = 21049 |
| 160783 | CEFBS_None, // VRSQRT14PSZ128mbk = 21050 |
| 160784 | CEFBS_None, // VRSQRT14PSZ128mbkz = 21051 |
| 160785 | CEFBS_None, // VRSQRT14PSZ128mk = 21052 |
| 160786 | CEFBS_None, // VRSQRT14PSZ128mkz = 21053 |
| 160787 | CEFBS_None, // VRSQRT14PSZ128r = 21054 |
| 160788 | CEFBS_None, // VRSQRT14PSZ128rk = 21055 |
| 160789 | CEFBS_None, // VRSQRT14PSZ128rkz = 21056 |
| 160790 | CEFBS_None, // VRSQRT14PSZ256m = 21057 |
| 160791 | CEFBS_None, // VRSQRT14PSZ256mb = 21058 |
| 160792 | CEFBS_None, // VRSQRT14PSZ256mbk = 21059 |
| 160793 | CEFBS_None, // VRSQRT14PSZ256mbkz = 21060 |
| 160794 | CEFBS_None, // VRSQRT14PSZ256mk = 21061 |
| 160795 | CEFBS_None, // VRSQRT14PSZ256mkz = 21062 |
| 160796 | CEFBS_None, // VRSQRT14PSZ256r = 21063 |
| 160797 | CEFBS_None, // VRSQRT14PSZ256rk = 21064 |
| 160798 | CEFBS_None, // VRSQRT14PSZ256rkz = 21065 |
| 160799 | CEFBS_None, // VRSQRT14PSZm = 21066 |
| 160800 | CEFBS_None, // VRSQRT14PSZmb = 21067 |
| 160801 | CEFBS_None, // VRSQRT14PSZmbk = 21068 |
| 160802 | CEFBS_None, // VRSQRT14PSZmbkz = 21069 |
| 160803 | CEFBS_None, // VRSQRT14PSZmk = 21070 |
| 160804 | CEFBS_None, // VRSQRT14PSZmkz = 21071 |
| 160805 | CEFBS_None, // VRSQRT14PSZr = 21072 |
| 160806 | CEFBS_None, // VRSQRT14PSZrk = 21073 |
| 160807 | CEFBS_None, // VRSQRT14PSZrkz = 21074 |
| 160808 | CEFBS_None, // VRSQRT14SDZrm = 21075 |
| 160809 | CEFBS_None, // VRSQRT14SDZrmk = 21076 |
| 160810 | CEFBS_None, // VRSQRT14SDZrmkz = 21077 |
| 160811 | CEFBS_None, // VRSQRT14SDZrr = 21078 |
| 160812 | CEFBS_None, // VRSQRT14SDZrrk = 21079 |
| 160813 | CEFBS_None, // VRSQRT14SDZrrkz = 21080 |
| 160814 | CEFBS_None, // VRSQRT14SSZrm = 21081 |
| 160815 | CEFBS_None, // VRSQRT14SSZrmk = 21082 |
| 160816 | CEFBS_None, // VRSQRT14SSZrmkz = 21083 |
| 160817 | CEFBS_None, // VRSQRT14SSZrr = 21084 |
| 160818 | CEFBS_None, // VRSQRT14SSZrrk = 21085 |
| 160819 | CEFBS_None, // VRSQRT14SSZrrkz = 21086 |
| 160820 | CEFBS_None, // VRSQRT28PDZm = 21087 |
| 160821 | CEFBS_None, // VRSQRT28PDZmb = 21088 |
| 160822 | CEFBS_None, // VRSQRT28PDZmbk = 21089 |
| 160823 | CEFBS_None, // VRSQRT28PDZmbkz = 21090 |
| 160824 | CEFBS_None, // VRSQRT28PDZmk = 21091 |
| 160825 | CEFBS_None, // VRSQRT28PDZmkz = 21092 |
| 160826 | CEFBS_None, // VRSQRT28PDZr = 21093 |
| 160827 | CEFBS_None, // VRSQRT28PDZrb = 21094 |
| 160828 | CEFBS_None, // VRSQRT28PDZrbk = 21095 |
| 160829 | CEFBS_None, // VRSQRT28PDZrbkz = 21096 |
| 160830 | CEFBS_None, // VRSQRT28PDZrk = 21097 |
| 160831 | CEFBS_None, // VRSQRT28PDZrkz = 21098 |
| 160832 | CEFBS_None, // VRSQRT28PSZm = 21099 |
| 160833 | CEFBS_None, // VRSQRT28PSZmb = 21100 |
| 160834 | CEFBS_None, // VRSQRT28PSZmbk = 21101 |
| 160835 | CEFBS_None, // VRSQRT28PSZmbkz = 21102 |
| 160836 | CEFBS_None, // VRSQRT28PSZmk = 21103 |
| 160837 | CEFBS_None, // VRSQRT28PSZmkz = 21104 |
| 160838 | CEFBS_None, // VRSQRT28PSZr = 21105 |
| 160839 | CEFBS_None, // VRSQRT28PSZrb = 21106 |
| 160840 | CEFBS_None, // VRSQRT28PSZrbk = 21107 |
| 160841 | CEFBS_None, // VRSQRT28PSZrbkz = 21108 |
| 160842 | CEFBS_None, // VRSQRT28PSZrk = 21109 |
| 160843 | CEFBS_None, // VRSQRT28PSZrkz = 21110 |
| 160844 | CEFBS_None, // VRSQRT28SDZm = 21111 |
| 160845 | CEFBS_None, // VRSQRT28SDZmk = 21112 |
| 160846 | CEFBS_None, // VRSQRT28SDZmkz = 21113 |
| 160847 | CEFBS_None, // VRSQRT28SDZr = 21114 |
| 160848 | CEFBS_None, // VRSQRT28SDZrb = 21115 |
| 160849 | CEFBS_None, // VRSQRT28SDZrbk = 21116 |
| 160850 | CEFBS_None, // VRSQRT28SDZrbkz = 21117 |
| 160851 | CEFBS_None, // VRSQRT28SDZrk = 21118 |
| 160852 | CEFBS_None, // VRSQRT28SDZrkz = 21119 |
| 160853 | CEFBS_None, // VRSQRT28SSZm = 21120 |
| 160854 | CEFBS_None, // VRSQRT28SSZmk = 21121 |
| 160855 | CEFBS_None, // VRSQRT28SSZmkz = 21122 |
| 160856 | CEFBS_None, // VRSQRT28SSZr = 21123 |
| 160857 | CEFBS_None, // VRSQRT28SSZrb = 21124 |
| 160858 | CEFBS_None, // VRSQRT28SSZrbk = 21125 |
| 160859 | CEFBS_None, // VRSQRT28SSZrbkz = 21126 |
| 160860 | CEFBS_None, // VRSQRT28SSZrk = 21127 |
| 160861 | CEFBS_None, // VRSQRT28SSZrkz = 21128 |
| 160862 | CEFBS_None, // VRSQRTBF16Z128m = 21129 |
| 160863 | CEFBS_None, // VRSQRTBF16Z128mb = 21130 |
| 160864 | CEFBS_None, // VRSQRTBF16Z128mbk = 21131 |
| 160865 | CEFBS_None, // VRSQRTBF16Z128mbkz = 21132 |
| 160866 | CEFBS_None, // VRSQRTBF16Z128mk = 21133 |
| 160867 | CEFBS_None, // VRSQRTBF16Z128mkz = 21134 |
| 160868 | CEFBS_None, // VRSQRTBF16Z128r = 21135 |
| 160869 | CEFBS_None, // VRSQRTBF16Z128rk = 21136 |
| 160870 | CEFBS_None, // VRSQRTBF16Z128rkz = 21137 |
| 160871 | CEFBS_None, // VRSQRTBF16Z256m = 21138 |
| 160872 | CEFBS_None, // VRSQRTBF16Z256mb = 21139 |
| 160873 | CEFBS_None, // VRSQRTBF16Z256mbk = 21140 |
| 160874 | CEFBS_None, // VRSQRTBF16Z256mbkz = 21141 |
| 160875 | CEFBS_None, // VRSQRTBF16Z256mk = 21142 |
| 160876 | CEFBS_None, // VRSQRTBF16Z256mkz = 21143 |
| 160877 | CEFBS_None, // VRSQRTBF16Z256r = 21144 |
| 160878 | CEFBS_None, // VRSQRTBF16Z256rk = 21145 |
| 160879 | CEFBS_None, // VRSQRTBF16Z256rkz = 21146 |
| 160880 | CEFBS_None, // VRSQRTBF16Zm = 21147 |
| 160881 | CEFBS_None, // VRSQRTBF16Zmb = 21148 |
| 160882 | CEFBS_None, // VRSQRTBF16Zmbk = 21149 |
| 160883 | CEFBS_None, // VRSQRTBF16Zmbkz = 21150 |
| 160884 | CEFBS_None, // VRSQRTBF16Zmk = 21151 |
| 160885 | CEFBS_None, // VRSQRTBF16Zmkz = 21152 |
| 160886 | CEFBS_None, // VRSQRTBF16Zr = 21153 |
| 160887 | CEFBS_None, // VRSQRTBF16Zrk = 21154 |
| 160888 | CEFBS_None, // VRSQRTBF16Zrkz = 21155 |
| 160889 | CEFBS_None, // VRSQRTPHZ128m = 21156 |
| 160890 | CEFBS_None, // VRSQRTPHZ128mb = 21157 |
| 160891 | CEFBS_None, // VRSQRTPHZ128mbk = 21158 |
| 160892 | CEFBS_None, // VRSQRTPHZ128mbkz = 21159 |
| 160893 | CEFBS_None, // VRSQRTPHZ128mk = 21160 |
| 160894 | CEFBS_None, // VRSQRTPHZ128mkz = 21161 |
| 160895 | CEFBS_None, // VRSQRTPHZ128r = 21162 |
| 160896 | CEFBS_None, // VRSQRTPHZ128rk = 21163 |
| 160897 | CEFBS_None, // VRSQRTPHZ128rkz = 21164 |
| 160898 | CEFBS_None, // VRSQRTPHZ256m = 21165 |
| 160899 | CEFBS_None, // VRSQRTPHZ256mb = 21166 |
| 160900 | CEFBS_None, // VRSQRTPHZ256mbk = 21167 |
| 160901 | CEFBS_None, // VRSQRTPHZ256mbkz = 21168 |
| 160902 | CEFBS_None, // VRSQRTPHZ256mk = 21169 |
| 160903 | CEFBS_None, // VRSQRTPHZ256mkz = 21170 |
| 160904 | CEFBS_None, // VRSQRTPHZ256r = 21171 |
| 160905 | CEFBS_None, // VRSQRTPHZ256rk = 21172 |
| 160906 | CEFBS_None, // VRSQRTPHZ256rkz = 21173 |
| 160907 | CEFBS_None, // VRSQRTPHZm = 21174 |
| 160908 | CEFBS_None, // VRSQRTPHZmb = 21175 |
| 160909 | CEFBS_None, // VRSQRTPHZmbk = 21176 |
| 160910 | CEFBS_None, // VRSQRTPHZmbkz = 21177 |
| 160911 | CEFBS_None, // VRSQRTPHZmk = 21178 |
| 160912 | CEFBS_None, // VRSQRTPHZmkz = 21179 |
| 160913 | CEFBS_None, // VRSQRTPHZr = 21180 |
| 160914 | CEFBS_None, // VRSQRTPHZrk = 21181 |
| 160915 | CEFBS_None, // VRSQRTPHZrkz = 21182 |
| 160916 | CEFBS_None, // VRSQRTPSYm = 21183 |
| 160917 | CEFBS_None, // VRSQRTPSYr = 21184 |
| 160918 | CEFBS_None, // VRSQRTPSm = 21185 |
| 160919 | CEFBS_None, // VRSQRTPSr = 21186 |
| 160920 | CEFBS_None, // VRSQRTSHZrm = 21187 |
| 160921 | CEFBS_None, // VRSQRTSHZrmk = 21188 |
| 160922 | CEFBS_None, // VRSQRTSHZrmkz = 21189 |
| 160923 | CEFBS_None, // VRSQRTSHZrr = 21190 |
| 160924 | CEFBS_None, // VRSQRTSHZrrk = 21191 |
| 160925 | CEFBS_None, // VRSQRTSHZrrkz = 21192 |
| 160926 | CEFBS_None, // VRSQRTSSm = 21193 |
| 160927 | CEFBS_None, // VRSQRTSSm_Int = 21194 |
| 160928 | CEFBS_None, // VRSQRTSSr = 21195 |
| 160929 | CEFBS_None, // VRSQRTSSr_Int = 21196 |
| 160930 | CEFBS_None, // VSCALEFBF16Z128rm = 21197 |
| 160931 | CEFBS_None, // VSCALEFBF16Z128rmb = 21198 |
| 160932 | CEFBS_None, // VSCALEFBF16Z128rmbk = 21199 |
| 160933 | CEFBS_None, // VSCALEFBF16Z128rmbkz = 21200 |
| 160934 | CEFBS_None, // VSCALEFBF16Z128rmk = 21201 |
| 160935 | CEFBS_None, // VSCALEFBF16Z128rmkz = 21202 |
| 160936 | CEFBS_None, // VSCALEFBF16Z128rr = 21203 |
| 160937 | CEFBS_None, // VSCALEFBF16Z128rrk = 21204 |
| 160938 | CEFBS_None, // VSCALEFBF16Z128rrkz = 21205 |
| 160939 | CEFBS_None, // VSCALEFBF16Z256rm = 21206 |
| 160940 | CEFBS_None, // VSCALEFBF16Z256rmb = 21207 |
| 160941 | CEFBS_None, // VSCALEFBF16Z256rmbk = 21208 |
| 160942 | CEFBS_None, // VSCALEFBF16Z256rmbkz = 21209 |
| 160943 | CEFBS_None, // VSCALEFBF16Z256rmk = 21210 |
| 160944 | CEFBS_None, // VSCALEFBF16Z256rmkz = 21211 |
| 160945 | CEFBS_None, // VSCALEFBF16Z256rr = 21212 |
| 160946 | CEFBS_None, // VSCALEFBF16Z256rrk = 21213 |
| 160947 | CEFBS_None, // VSCALEFBF16Z256rrkz = 21214 |
| 160948 | CEFBS_None, // VSCALEFBF16Zrm = 21215 |
| 160949 | CEFBS_None, // VSCALEFBF16Zrmb = 21216 |
| 160950 | CEFBS_None, // VSCALEFBF16Zrmbk = 21217 |
| 160951 | CEFBS_None, // VSCALEFBF16Zrmbkz = 21218 |
| 160952 | CEFBS_None, // VSCALEFBF16Zrmk = 21219 |
| 160953 | CEFBS_None, // VSCALEFBF16Zrmkz = 21220 |
| 160954 | CEFBS_None, // VSCALEFBF16Zrr = 21221 |
| 160955 | CEFBS_None, // VSCALEFBF16Zrrk = 21222 |
| 160956 | CEFBS_None, // VSCALEFBF16Zrrkz = 21223 |
| 160957 | CEFBS_None, // VSCALEFPDZ128rm = 21224 |
| 160958 | CEFBS_None, // VSCALEFPDZ128rmb = 21225 |
| 160959 | CEFBS_None, // VSCALEFPDZ128rmbk = 21226 |
| 160960 | CEFBS_None, // VSCALEFPDZ128rmbkz = 21227 |
| 160961 | CEFBS_None, // VSCALEFPDZ128rmk = 21228 |
| 160962 | CEFBS_None, // VSCALEFPDZ128rmkz = 21229 |
| 160963 | CEFBS_None, // VSCALEFPDZ128rr = 21230 |
| 160964 | CEFBS_None, // VSCALEFPDZ128rrk = 21231 |
| 160965 | CEFBS_None, // VSCALEFPDZ128rrkz = 21232 |
| 160966 | CEFBS_None, // VSCALEFPDZ256rm = 21233 |
| 160967 | CEFBS_None, // VSCALEFPDZ256rmb = 21234 |
| 160968 | CEFBS_None, // VSCALEFPDZ256rmbk = 21235 |
| 160969 | CEFBS_None, // VSCALEFPDZ256rmbkz = 21236 |
| 160970 | CEFBS_None, // VSCALEFPDZ256rmk = 21237 |
| 160971 | CEFBS_None, // VSCALEFPDZ256rmkz = 21238 |
| 160972 | CEFBS_None, // VSCALEFPDZ256rr = 21239 |
| 160973 | CEFBS_None, // VSCALEFPDZ256rrk = 21240 |
| 160974 | CEFBS_None, // VSCALEFPDZ256rrkz = 21241 |
| 160975 | CEFBS_None, // VSCALEFPDZrm = 21242 |
| 160976 | CEFBS_None, // VSCALEFPDZrmb = 21243 |
| 160977 | CEFBS_None, // VSCALEFPDZrmbk = 21244 |
| 160978 | CEFBS_None, // VSCALEFPDZrmbkz = 21245 |
| 160979 | CEFBS_None, // VSCALEFPDZrmk = 21246 |
| 160980 | CEFBS_None, // VSCALEFPDZrmkz = 21247 |
| 160981 | CEFBS_None, // VSCALEFPDZrr = 21248 |
| 160982 | CEFBS_None, // VSCALEFPDZrrb = 21249 |
| 160983 | CEFBS_None, // VSCALEFPDZrrbk = 21250 |
| 160984 | CEFBS_None, // VSCALEFPDZrrbkz = 21251 |
| 160985 | CEFBS_None, // VSCALEFPDZrrk = 21252 |
| 160986 | CEFBS_None, // VSCALEFPDZrrkz = 21253 |
| 160987 | CEFBS_None, // VSCALEFPHZ128rm = 21254 |
| 160988 | CEFBS_None, // VSCALEFPHZ128rmb = 21255 |
| 160989 | CEFBS_None, // VSCALEFPHZ128rmbk = 21256 |
| 160990 | CEFBS_None, // VSCALEFPHZ128rmbkz = 21257 |
| 160991 | CEFBS_None, // VSCALEFPHZ128rmk = 21258 |
| 160992 | CEFBS_None, // VSCALEFPHZ128rmkz = 21259 |
| 160993 | CEFBS_None, // VSCALEFPHZ128rr = 21260 |
| 160994 | CEFBS_None, // VSCALEFPHZ128rrk = 21261 |
| 160995 | CEFBS_None, // VSCALEFPHZ128rrkz = 21262 |
| 160996 | CEFBS_None, // VSCALEFPHZ256rm = 21263 |
| 160997 | CEFBS_None, // VSCALEFPHZ256rmb = 21264 |
| 160998 | CEFBS_None, // VSCALEFPHZ256rmbk = 21265 |
| 160999 | CEFBS_None, // VSCALEFPHZ256rmbkz = 21266 |
| 161000 | CEFBS_None, // VSCALEFPHZ256rmk = 21267 |
| 161001 | CEFBS_None, // VSCALEFPHZ256rmkz = 21268 |
| 161002 | CEFBS_None, // VSCALEFPHZ256rr = 21269 |
| 161003 | CEFBS_None, // VSCALEFPHZ256rrk = 21270 |
| 161004 | CEFBS_None, // VSCALEFPHZ256rrkz = 21271 |
| 161005 | CEFBS_None, // VSCALEFPHZrm = 21272 |
| 161006 | CEFBS_None, // VSCALEFPHZrmb = 21273 |
| 161007 | CEFBS_None, // VSCALEFPHZrmbk = 21274 |
| 161008 | CEFBS_None, // VSCALEFPHZrmbkz = 21275 |
| 161009 | CEFBS_None, // VSCALEFPHZrmk = 21276 |
| 161010 | CEFBS_None, // VSCALEFPHZrmkz = 21277 |
| 161011 | CEFBS_None, // VSCALEFPHZrr = 21278 |
| 161012 | CEFBS_None, // VSCALEFPHZrrb = 21279 |
| 161013 | CEFBS_None, // VSCALEFPHZrrbk = 21280 |
| 161014 | CEFBS_None, // VSCALEFPHZrrbkz = 21281 |
| 161015 | CEFBS_None, // VSCALEFPHZrrk = 21282 |
| 161016 | CEFBS_None, // VSCALEFPHZrrkz = 21283 |
| 161017 | CEFBS_None, // VSCALEFPSZ128rm = 21284 |
| 161018 | CEFBS_None, // VSCALEFPSZ128rmb = 21285 |
| 161019 | CEFBS_None, // VSCALEFPSZ128rmbk = 21286 |
| 161020 | CEFBS_None, // VSCALEFPSZ128rmbkz = 21287 |
| 161021 | CEFBS_None, // VSCALEFPSZ128rmk = 21288 |
| 161022 | CEFBS_None, // VSCALEFPSZ128rmkz = 21289 |
| 161023 | CEFBS_None, // VSCALEFPSZ128rr = 21290 |
| 161024 | CEFBS_None, // VSCALEFPSZ128rrk = 21291 |
| 161025 | CEFBS_None, // VSCALEFPSZ128rrkz = 21292 |
| 161026 | CEFBS_None, // VSCALEFPSZ256rm = 21293 |
| 161027 | CEFBS_None, // VSCALEFPSZ256rmb = 21294 |
| 161028 | CEFBS_None, // VSCALEFPSZ256rmbk = 21295 |
| 161029 | CEFBS_None, // VSCALEFPSZ256rmbkz = 21296 |
| 161030 | CEFBS_None, // VSCALEFPSZ256rmk = 21297 |
| 161031 | CEFBS_None, // VSCALEFPSZ256rmkz = 21298 |
| 161032 | CEFBS_None, // VSCALEFPSZ256rr = 21299 |
| 161033 | CEFBS_None, // VSCALEFPSZ256rrk = 21300 |
| 161034 | CEFBS_None, // VSCALEFPSZ256rrkz = 21301 |
| 161035 | CEFBS_None, // VSCALEFPSZrm = 21302 |
| 161036 | CEFBS_None, // VSCALEFPSZrmb = 21303 |
| 161037 | CEFBS_None, // VSCALEFPSZrmbk = 21304 |
| 161038 | CEFBS_None, // VSCALEFPSZrmbkz = 21305 |
| 161039 | CEFBS_None, // VSCALEFPSZrmk = 21306 |
| 161040 | CEFBS_None, // VSCALEFPSZrmkz = 21307 |
| 161041 | CEFBS_None, // VSCALEFPSZrr = 21308 |
| 161042 | CEFBS_None, // VSCALEFPSZrrb = 21309 |
| 161043 | CEFBS_None, // VSCALEFPSZrrbk = 21310 |
| 161044 | CEFBS_None, // VSCALEFPSZrrbkz = 21311 |
| 161045 | CEFBS_None, // VSCALEFPSZrrk = 21312 |
| 161046 | CEFBS_None, // VSCALEFPSZrrkz = 21313 |
| 161047 | CEFBS_None, // VSCALEFSDZrm = 21314 |
| 161048 | CEFBS_None, // VSCALEFSDZrmk = 21315 |
| 161049 | CEFBS_None, // VSCALEFSDZrmkz = 21316 |
| 161050 | CEFBS_None, // VSCALEFSDZrr = 21317 |
| 161051 | CEFBS_None, // VSCALEFSDZrrb_Int = 21318 |
| 161052 | CEFBS_None, // VSCALEFSDZrrbk_Int = 21319 |
| 161053 | CEFBS_None, // VSCALEFSDZrrbkz_Int = 21320 |
| 161054 | CEFBS_None, // VSCALEFSDZrrk = 21321 |
| 161055 | CEFBS_None, // VSCALEFSDZrrkz = 21322 |
| 161056 | CEFBS_None, // VSCALEFSHZrm = 21323 |
| 161057 | CEFBS_None, // VSCALEFSHZrmk = 21324 |
| 161058 | CEFBS_None, // VSCALEFSHZrmkz = 21325 |
| 161059 | CEFBS_None, // VSCALEFSHZrr = 21326 |
| 161060 | CEFBS_None, // VSCALEFSHZrrb_Int = 21327 |
| 161061 | CEFBS_None, // VSCALEFSHZrrbk_Int = 21328 |
| 161062 | CEFBS_None, // VSCALEFSHZrrbkz_Int = 21329 |
| 161063 | CEFBS_None, // VSCALEFSHZrrk = 21330 |
| 161064 | CEFBS_None, // VSCALEFSHZrrkz = 21331 |
| 161065 | CEFBS_None, // VSCALEFSSZrm = 21332 |
| 161066 | CEFBS_None, // VSCALEFSSZrmk = 21333 |
| 161067 | CEFBS_None, // VSCALEFSSZrmkz = 21334 |
| 161068 | CEFBS_None, // VSCALEFSSZrr = 21335 |
| 161069 | CEFBS_None, // VSCALEFSSZrrb_Int = 21336 |
| 161070 | CEFBS_None, // VSCALEFSSZrrbk_Int = 21337 |
| 161071 | CEFBS_None, // VSCALEFSSZrrbkz_Int = 21338 |
| 161072 | CEFBS_None, // VSCALEFSSZrrk = 21339 |
| 161073 | CEFBS_None, // VSCALEFSSZrrkz = 21340 |
| 161074 | CEFBS_None, // VSCATTERDPDZ128mr = 21341 |
| 161075 | CEFBS_None, // VSCATTERDPDZ256mr = 21342 |
| 161076 | CEFBS_None, // VSCATTERDPDZmr = 21343 |
| 161077 | CEFBS_None, // VSCATTERDPSZ128mr = 21344 |
| 161078 | CEFBS_None, // VSCATTERDPSZ256mr = 21345 |
| 161079 | CEFBS_None, // VSCATTERDPSZmr = 21346 |
| 161080 | CEFBS_None, // VSCATTERPF0DPDm = 21347 |
| 161081 | CEFBS_None, // VSCATTERPF0DPSm = 21348 |
| 161082 | CEFBS_None, // VSCATTERPF0QPDm = 21349 |
| 161083 | CEFBS_None, // VSCATTERPF0QPSm = 21350 |
| 161084 | CEFBS_None, // VSCATTERPF1DPDm = 21351 |
| 161085 | CEFBS_None, // VSCATTERPF1DPSm = 21352 |
| 161086 | CEFBS_None, // VSCATTERPF1QPDm = 21353 |
| 161087 | CEFBS_None, // VSCATTERPF1QPSm = 21354 |
| 161088 | CEFBS_None, // VSCATTERQPDZ128mr = 21355 |
| 161089 | CEFBS_None, // VSCATTERQPDZ256mr = 21356 |
| 161090 | CEFBS_None, // VSCATTERQPDZmr = 21357 |
| 161091 | CEFBS_None, // VSCATTERQPSZ128mr = 21358 |
| 161092 | CEFBS_None, // VSCATTERQPSZ256mr = 21359 |
| 161093 | CEFBS_None, // VSCATTERQPSZmr = 21360 |
| 161094 | CEFBS_None, // VSHA512MSG1rr = 21361 |
| 161095 | CEFBS_None, // VSHA512MSG2rr = 21362 |
| 161096 | CEFBS_None, // VSHA512RNDS2rr = 21363 |
| 161097 | CEFBS_None, // VSHUFF32X4Z256rmbi = 21364 |
| 161098 | CEFBS_None, // VSHUFF32X4Z256rmbik = 21365 |
| 161099 | CEFBS_None, // VSHUFF32X4Z256rmbikz = 21366 |
| 161100 | CEFBS_None, // VSHUFF32X4Z256rmi = 21367 |
| 161101 | CEFBS_None, // VSHUFF32X4Z256rmik = 21368 |
| 161102 | CEFBS_None, // VSHUFF32X4Z256rmikz = 21369 |
| 161103 | CEFBS_None, // VSHUFF32X4Z256rri = 21370 |
| 161104 | CEFBS_None, // VSHUFF32X4Z256rrik = 21371 |
| 161105 | CEFBS_None, // VSHUFF32X4Z256rrikz = 21372 |
| 161106 | CEFBS_None, // VSHUFF32X4Zrmbi = 21373 |
| 161107 | CEFBS_None, // VSHUFF32X4Zrmbik = 21374 |
| 161108 | CEFBS_None, // VSHUFF32X4Zrmbikz = 21375 |
| 161109 | CEFBS_None, // VSHUFF32X4Zrmi = 21376 |
| 161110 | CEFBS_None, // VSHUFF32X4Zrmik = 21377 |
| 161111 | CEFBS_None, // VSHUFF32X4Zrmikz = 21378 |
| 161112 | CEFBS_None, // VSHUFF32X4Zrri = 21379 |
| 161113 | CEFBS_None, // VSHUFF32X4Zrrik = 21380 |
| 161114 | CEFBS_None, // VSHUFF32X4Zrrikz = 21381 |
| 161115 | CEFBS_None, // VSHUFF64X2Z256rmbi = 21382 |
| 161116 | CEFBS_None, // VSHUFF64X2Z256rmbik = 21383 |
| 161117 | CEFBS_None, // VSHUFF64X2Z256rmbikz = 21384 |
| 161118 | CEFBS_None, // VSHUFF64X2Z256rmi = 21385 |
| 161119 | CEFBS_None, // VSHUFF64X2Z256rmik = 21386 |
| 161120 | CEFBS_None, // VSHUFF64X2Z256rmikz = 21387 |
| 161121 | CEFBS_None, // VSHUFF64X2Z256rri = 21388 |
| 161122 | CEFBS_None, // VSHUFF64X2Z256rrik = 21389 |
| 161123 | CEFBS_None, // VSHUFF64X2Z256rrikz = 21390 |
| 161124 | CEFBS_None, // VSHUFF64X2Zrmbi = 21391 |
| 161125 | CEFBS_None, // VSHUFF64X2Zrmbik = 21392 |
| 161126 | CEFBS_None, // VSHUFF64X2Zrmbikz = 21393 |
| 161127 | CEFBS_None, // VSHUFF64X2Zrmi = 21394 |
| 161128 | CEFBS_None, // VSHUFF64X2Zrmik = 21395 |
| 161129 | CEFBS_None, // VSHUFF64X2Zrmikz = 21396 |
| 161130 | CEFBS_None, // VSHUFF64X2Zrri = 21397 |
| 161131 | CEFBS_None, // VSHUFF64X2Zrrik = 21398 |
| 161132 | CEFBS_None, // VSHUFF64X2Zrrikz = 21399 |
| 161133 | CEFBS_None, // VSHUFI32X4Z256rmbi = 21400 |
| 161134 | CEFBS_None, // VSHUFI32X4Z256rmbik = 21401 |
| 161135 | CEFBS_None, // VSHUFI32X4Z256rmbikz = 21402 |
| 161136 | CEFBS_None, // VSHUFI32X4Z256rmi = 21403 |
| 161137 | CEFBS_None, // VSHUFI32X4Z256rmik = 21404 |
| 161138 | CEFBS_None, // VSHUFI32X4Z256rmikz = 21405 |
| 161139 | CEFBS_None, // VSHUFI32X4Z256rri = 21406 |
| 161140 | CEFBS_None, // VSHUFI32X4Z256rrik = 21407 |
| 161141 | CEFBS_None, // VSHUFI32X4Z256rrikz = 21408 |
| 161142 | CEFBS_None, // VSHUFI32X4Zrmbi = 21409 |
| 161143 | CEFBS_None, // VSHUFI32X4Zrmbik = 21410 |
| 161144 | CEFBS_None, // VSHUFI32X4Zrmbikz = 21411 |
| 161145 | CEFBS_None, // VSHUFI32X4Zrmi = 21412 |
| 161146 | CEFBS_None, // VSHUFI32X4Zrmik = 21413 |
| 161147 | CEFBS_None, // VSHUFI32X4Zrmikz = 21414 |
| 161148 | CEFBS_None, // VSHUFI32X4Zrri = 21415 |
| 161149 | CEFBS_None, // VSHUFI32X4Zrrik = 21416 |
| 161150 | CEFBS_None, // VSHUFI32X4Zrrikz = 21417 |
| 161151 | CEFBS_None, // VSHUFI64X2Z256rmbi = 21418 |
| 161152 | CEFBS_None, // VSHUFI64X2Z256rmbik = 21419 |
| 161153 | CEFBS_None, // VSHUFI64X2Z256rmbikz = 21420 |
| 161154 | CEFBS_None, // VSHUFI64X2Z256rmi = 21421 |
| 161155 | CEFBS_None, // VSHUFI64X2Z256rmik = 21422 |
| 161156 | CEFBS_None, // VSHUFI64X2Z256rmikz = 21423 |
| 161157 | CEFBS_None, // VSHUFI64X2Z256rri = 21424 |
| 161158 | CEFBS_None, // VSHUFI64X2Z256rrik = 21425 |
| 161159 | CEFBS_None, // VSHUFI64X2Z256rrikz = 21426 |
| 161160 | CEFBS_None, // VSHUFI64X2Zrmbi = 21427 |
| 161161 | CEFBS_None, // VSHUFI64X2Zrmbik = 21428 |
| 161162 | CEFBS_None, // VSHUFI64X2Zrmbikz = 21429 |
| 161163 | CEFBS_None, // VSHUFI64X2Zrmi = 21430 |
| 161164 | CEFBS_None, // VSHUFI64X2Zrmik = 21431 |
| 161165 | CEFBS_None, // VSHUFI64X2Zrmikz = 21432 |
| 161166 | CEFBS_None, // VSHUFI64X2Zrri = 21433 |
| 161167 | CEFBS_None, // VSHUFI64X2Zrrik = 21434 |
| 161168 | CEFBS_None, // VSHUFI64X2Zrrikz = 21435 |
| 161169 | CEFBS_None, // VSHUFPDYrmi = 21436 |
| 161170 | CEFBS_None, // VSHUFPDYrri = 21437 |
| 161171 | CEFBS_None, // VSHUFPDZ128rmbi = 21438 |
| 161172 | CEFBS_None, // VSHUFPDZ128rmbik = 21439 |
| 161173 | CEFBS_None, // VSHUFPDZ128rmbikz = 21440 |
| 161174 | CEFBS_None, // VSHUFPDZ128rmi = 21441 |
| 161175 | CEFBS_None, // VSHUFPDZ128rmik = 21442 |
| 161176 | CEFBS_None, // VSHUFPDZ128rmikz = 21443 |
| 161177 | CEFBS_None, // VSHUFPDZ128rri = 21444 |
| 161178 | CEFBS_None, // VSHUFPDZ128rrik = 21445 |
| 161179 | CEFBS_None, // VSHUFPDZ128rrikz = 21446 |
| 161180 | CEFBS_None, // VSHUFPDZ256rmbi = 21447 |
| 161181 | CEFBS_None, // VSHUFPDZ256rmbik = 21448 |
| 161182 | CEFBS_None, // VSHUFPDZ256rmbikz = 21449 |
| 161183 | CEFBS_None, // VSHUFPDZ256rmi = 21450 |
| 161184 | CEFBS_None, // VSHUFPDZ256rmik = 21451 |
| 161185 | CEFBS_None, // VSHUFPDZ256rmikz = 21452 |
| 161186 | CEFBS_None, // VSHUFPDZ256rri = 21453 |
| 161187 | CEFBS_None, // VSHUFPDZ256rrik = 21454 |
| 161188 | CEFBS_None, // VSHUFPDZ256rrikz = 21455 |
| 161189 | CEFBS_None, // VSHUFPDZrmbi = 21456 |
| 161190 | CEFBS_None, // VSHUFPDZrmbik = 21457 |
| 161191 | CEFBS_None, // VSHUFPDZrmbikz = 21458 |
| 161192 | CEFBS_None, // VSHUFPDZrmi = 21459 |
| 161193 | CEFBS_None, // VSHUFPDZrmik = 21460 |
| 161194 | CEFBS_None, // VSHUFPDZrmikz = 21461 |
| 161195 | CEFBS_None, // VSHUFPDZrri = 21462 |
| 161196 | CEFBS_None, // VSHUFPDZrrik = 21463 |
| 161197 | CEFBS_None, // VSHUFPDZrrikz = 21464 |
| 161198 | CEFBS_None, // VSHUFPDrmi = 21465 |
| 161199 | CEFBS_None, // VSHUFPDrri = 21466 |
| 161200 | CEFBS_None, // VSHUFPSYrmi = 21467 |
| 161201 | CEFBS_None, // VSHUFPSYrri = 21468 |
| 161202 | CEFBS_None, // VSHUFPSZ128rmbi = 21469 |
| 161203 | CEFBS_None, // VSHUFPSZ128rmbik = 21470 |
| 161204 | CEFBS_None, // VSHUFPSZ128rmbikz = 21471 |
| 161205 | CEFBS_None, // VSHUFPSZ128rmi = 21472 |
| 161206 | CEFBS_None, // VSHUFPSZ128rmik = 21473 |
| 161207 | CEFBS_None, // VSHUFPSZ128rmikz = 21474 |
| 161208 | CEFBS_None, // VSHUFPSZ128rri = 21475 |
| 161209 | CEFBS_None, // VSHUFPSZ128rrik = 21476 |
| 161210 | CEFBS_None, // VSHUFPSZ128rrikz = 21477 |
| 161211 | CEFBS_None, // VSHUFPSZ256rmbi = 21478 |
| 161212 | CEFBS_None, // VSHUFPSZ256rmbik = 21479 |
| 161213 | CEFBS_None, // VSHUFPSZ256rmbikz = 21480 |
| 161214 | CEFBS_None, // VSHUFPSZ256rmi = 21481 |
| 161215 | CEFBS_None, // VSHUFPSZ256rmik = 21482 |
| 161216 | CEFBS_None, // VSHUFPSZ256rmikz = 21483 |
| 161217 | CEFBS_None, // VSHUFPSZ256rri = 21484 |
| 161218 | CEFBS_None, // VSHUFPSZ256rrik = 21485 |
| 161219 | CEFBS_None, // VSHUFPSZ256rrikz = 21486 |
| 161220 | CEFBS_None, // VSHUFPSZrmbi = 21487 |
| 161221 | CEFBS_None, // VSHUFPSZrmbik = 21488 |
| 161222 | CEFBS_None, // VSHUFPSZrmbikz = 21489 |
| 161223 | CEFBS_None, // VSHUFPSZrmi = 21490 |
| 161224 | CEFBS_None, // VSHUFPSZrmik = 21491 |
| 161225 | CEFBS_None, // VSHUFPSZrmikz = 21492 |
| 161226 | CEFBS_None, // VSHUFPSZrri = 21493 |
| 161227 | CEFBS_None, // VSHUFPSZrrik = 21494 |
| 161228 | CEFBS_None, // VSHUFPSZrrikz = 21495 |
| 161229 | CEFBS_None, // VSHUFPSrmi = 21496 |
| 161230 | CEFBS_None, // VSHUFPSrri = 21497 |
| 161231 | CEFBS_None, // VSM3MSG1rm = 21498 |
| 161232 | CEFBS_None, // VSM3MSG1rr = 21499 |
| 161233 | CEFBS_None, // VSM3MSG2rm = 21500 |
| 161234 | CEFBS_None, // VSM3MSG2rr = 21501 |
| 161235 | CEFBS_None, // VSM3RNDS2rmi = 21502 |
| 161236 | CEFBS_None, // VSM3RNDS2rri = 21503 |
| 161237 | CEFBS_None, // VSM4KEY4Yrm = 21504 |
| 161238 | CEFBS_None, // VSM4KEY4Yrr = 21505 |
| 161239 | CEFBS_None, // VSM4KEY4Z128rm = 21506 |
| 161240 | CEFBS_None, // VSM4KEY4Z128rr = 21507 |
| 161241 | CEFBS_None, // VSM4KEY4Z256rm = 21508 |
| 161242 | CEFBS_None, // VSM4KEY4Z256rr = 21509 |
| 161243 | CEFBS_None, // VSM4KEY4Zrm = 21510 |
| 161244 | CEFBS_None, // VSM4KEY4Zrr = 21511 |
| 161245 | CEFBS_None, // VSM4KEY4rm = 21512 |
| 161246 | CEFBS_None, // VSM4KEY4rr = 21513 |
| 161247 | CEFBS_None, // VSM4RNDS4Yrm = 21514 |
| 161248 | CEFBS_None, // VSM4RNDS4Yrr = 21515 |
| 161249 | CEFBS_None, // VSM4RNDS4Z128rm = 21516 |
| 161250 | CEFBS_None, // VSM4RNDS4Z128rr = 21517 |
| 161251 | CEFBS_None, // VSM4RNDS4Z256rm = 21518 |
| 161252 | CEFBS_None, // VSM4RNDS4Z256rr = 21519 |
| 161253 | CEFBS_None, // VSM4RNDS4Zrm = 21520 |
| 161254 | CEFBS_None, // VSM4RNDS4Zrr = 21521 |
| 161255 | CEFBS_None, // VSM4RNDS4rm = 21522 |
| 161256 | CEFBS_None, // VSM4RNDS4rr = 21523 |
| 161257 | CEFBS_None, // VSQRTBF16Z128m = 21524 |
| 161258 | CEFBS_None, // VSQRTBF16Z128mb = 21525 |
| 161259 | CEFBS_None, // VSQRTBF16Z128mbk = 21526 |
| 161260 | CEFBS_None, // VSQRTBF16Z128mbkz = 21527 |
| 161261 | CEFBS_None, // VSQRTBF16Z128mk = 21528 |
| 161262 | CEFBS_None, // VSQRTBF16Z128mkz = 21529 |
| 161263 | CEFBS_None, // VSQRTBF16Z128r = 21530 |
| 161264 | CEFBS_None, // VSQRTBF16Z128rk = 21531 |
| 161265 | CEFBS_None, // VSQRTBF16Z128rkz = 21532 |
| 161266 | CEFBS_None, // VSQRTBF16Z256m = 21533 |
| 161267 | CEFBS_None, // VSQRTBF16Z256mb = 21534 |
| 161268 | CEFBS_None, // VSQRTBF16Z256mbk = 21535 |
| 161269 | CEFBS_None, // VSQRTBF16Z256mbkz = 21536 |
| 161270 | CEFBS_None, // VSQRTBF16Z256mk = 21537 |
| 161271 | CEFBS_None, // VSQRTBF16Z256mkz = 21538 |
| 161272 | CEFBS_None, // VSQRTBF16Z256r = 21539 |
| 161273 | CEFBS_None, // VSQRTBF16Z256rk = 21540 |
| 161274 | CEFBS_None, // VSQRTBF16Z256rkz = 21541 |
| 161275 | CEFBS_None, // VSQRTBF16Zm = 21542 |
| 161276 | CEFBS_None, // VSQRTBF16Zmb = 21543 |
| 161277 | CEFBS_None, // VSQRTBF16Zmbk = 21544 |
| 161278 | CEFBS_None, // VSQRTBF16Zmbkz = 21545 |
| 161279 | CEFBS_None, // VSQRTBF16Zmk = 21546 |
| 161280 | CEFBS_None, // VSQRTBF16Zmkz = 21547 |
| 161281 | CEFBS_None, // VSQRTBF16Zr = 21548 |
| 161282 | CEFBS_None, // VSQRTBF16Zrk = 21549 |
| 161283 | CEFBS_None, // VSQRTBF16Zrkz = 21550 |
| 161284 | CEFBS_None, // VSQRTPDYm = 21551 |
| 161285 | CEFBS_None, // VSQRTPDYr = 21552 |
| 161286 | CEFBS_None, // VSQRTPDZ128m = 21553 |
| 161287 | CEFBS_None, // VSQRTPDZ128mb = 21554 |
| 161288 | CEFBS_None, // VSQRTPDZ128mbk = 21555 |
| 161289 | CEFBS_None, // VSQRTPDZ128mbkz = 21556 |
| 161290 | CEFBS_None, // VSQRTPDZ128mk = 21557 |
| 161291 | CEFBS_None, // VSQRTPDZ128mkz = 21558 |
| 161292 | CEFBS_None, // VSQRTPDZ128r = 21559 |
| 161293 | CEFBS_None, // VSQRTPDZ128rk = 21560 |
| 161294 | CEFBS_None, // VSQRTPDZ128rkz = 21561 |
| 161295 | CEFBS_None, // VSQRTPDZ256m = 21562 |
| 161296 | CEFBS_None, // VSQRTPDZ256mb = 21563 |
| 161297 | CEFBS_None, // VSQRTPDZ256mbk = 21564 |
| 161298 | CEFBS_None, // VSQRTPDZ256mbkz = 21565 |
| 161299 | CEFBS_None, // VSQRTPDZ256mk = 21566 |
| 161300 | CEFBS_None, // VSQRTPDZ256mkz = 21567 |
| 161301 | CEFBS_None, // VSQRTPDZ256r = 21568 |
| 161302 | CEFBS_None, // VSQRTPDZ256rk = 21569 |
| 161303 | CEFBS_None, // VSQRTPDZ256rkz = 21570 |
| 161304 | CEFBS_None, // VSQRTPDZm = 21571 |
| 161305 | CEFBS_None, // VSQRTPDZmb = 21572 |
| 161306 | CEFBS_None, // VSQRTPDZmbk = 21573 |
| 161307 | CEFBS_None, // VSQRTPDZmbkz = 21574 |
| 161308 | CEFBS_None, // VSQRTPDZmk = 21575 |
| 161309 | CEFBS_None, // VSQRTPDZmkz = 21576 |
| 161310 | CEFBS_None, // VSQRTPDZr = 21577 |
| 161311 | CEFBS_None, // VSQRTPDZrb = 21578 |
| 161312 | CEFBS_None, // VSQRTPDZrbk = 21579 |
| 161313 | CEFBS_None, // VSQRTPDZrbkz = 21580 |
| 161314 | CEFBS_None, // VSQRTPDZrk = 21581 |
| 161315 | CEFBS_None, // VSQRTPDZrkz = 21582 |
| 161316 | CEFBS_None, // VSQRTPDm = 21583 |
| 161317 | CEFBS_None, // VSQRTPDr = 21584 |
| 161318 | CEFBS_None, // VSQRTPHZ128m = 21585 |
| 161319 | CEFBS_None, // VSQRTPHZ128mb = 21586 |
| 161320 | CEFBS_None, // VSQRTPHZ128mbk = 21587 |
| 161321 | CEFBS_None, // VSQRTPHZ128mbkz = 21588 |
| 161322 | CEFBS_None, // VSQRTPHZ128mk = 21589 |
| 161323 | CEFBS_None, // VSQRTPHZ128mkz = 21590 |
| 161324 | CEFBS_None, // VSQRTPHZ128r = 21591 |
| 161325 | CEFBS_None, // VSQRTPHZ128rk = 21592 |
| 161326 | CEFBS_None, // VSQRTPHZ128rkz = 21593 |
| 161327 | CEFBS_None, // VSQRTPHZ256m = 21594 |
| 161328 | CEFBS_None, // VSQRTPHZ256mb = 21595 |
| 161329 | CEFBS_None, // VSQRTPHZ256mbk = 21596 |
| 161330 | CEFBS_None, // VSQRTPHZ256mbkz = 21597 |
| 161331 | CEFBS_None, // VSQRTPHZ256mk = 21598 |
| 161332 | CEFBS_None, // VSQRTPHZ256mkz = 21599 |
| 161333 | CEFBS_None, // VSQRTPHZ256r = 21600 |
| 161334 | CEFBS_None, // VSQRTPHZ256rk = 21601 |
| 161335 | CEFBS_None, // VSQRTPHZ256rkz = 21602 |
| 161336 | CEFBS_None, // VSQRTPHZm = 21603 |
| 161337 | CEFBS_None, // VSQRTPHZmb = 21604 |
| 161338 | CEFBS_None, // VSQRTPHZmbk = 21605 |
| 161339 | CEFBS_None, // VSQRTPHZmbkz = 21606 |
| 161340 | CEFBS_None, // VSQRTPHZmk = 21607 |
| 161341 | CEFBS_None, // VSQRTPHZmkz = 21608 |
| 161342 | CEFBS_None, // VSQRTPHZr = 21609 |
| 161343 | CEFBS_None, // VSQRTPHZrb = 21610 |
| 161344 | CEFBS_None, // VSQRTPHZrbk = 21611 |
| 161345 | CEFBS_None, // VSQRTPHZrbkz = 21612 |
| 161346 | CEFBS_None, // VSQRTPHZrk = 21613 |
| 161347 | CEFBS_None, // VSQRTPHZrkz = 21614 |
| 161348 | CEFBS_None, // VSQRTPSYm = 21615 |
| 161349 | CEFBS_None, // VSQRTPSYr = 21616 |
| 161350 | CEFBS_None, // VSQRTPSZ128m = 21617 |
| 161351 | CEFBS_None, // VSQRTPSZ128mb = 21618 |
| 161352 | CEFBS_None, // VSQRTPSZ128mbk = 21619 |
| 161353 | CEFBS_None, // VSQRTPSZ128mbkz = 21620 |
| 161354 | CEFBS_None, // VSQRTPSZ128mk = 21621 |
| 161355 | CEFBS_None, // VSQRTPSZ128mkz = 21622 |
| 161356 | CEFBS_None, // VSQRTPSZ128r = 21623 |
| 161357 | CEFBS_None, // VSQRTPSZ128rk = 21624 |
| 161358 | CEFBS_None, // VSQRTPSZ128rkz = 21625 |
| 161359 | CEFBS_None, // VSQRTPSZ256m = 21626 |
| 161360 | CEFBS_None, // VSQRTPSZ256mb = 21627 |
| 161361 | CEFBS_None, // VSQRTPSZ256mbk = 21628 |
| 161362 | CEFBS_None, // VSQRTPSZ256mbkz = 21629 |
| 161363 | CEFBS_None, // VSQRTPSZ256mk = 21630 |
| 161364 | CEFBS_None, // VSQRTPSZ256mkz = 21631 |
| 161365 | CEFBS_None, // VSQRTPSZ256r = 21632 |
| 161366 | CEFBS_None, // VSQRTPSZ256rk = 21633 |
| 161367 | CEFBS_None, // VSQRTPSZ256rkz = 21634 |
| 161368 | CEFBS_None, // VSQRTPSZm = 21635 |
| 161369 | CEFBS_None, // VSQRTPSZmb = 21636 |
| 161370 | CEFBS_None, // VSQRTPSZmbk = 21637 |
| 161371 | CEFBS_None, // VSQRTPSZmbkz = 21638 |
| 161372 | CEFBS_None, // VSQRTPSZmk = 21639 |
| 161373 | CEFBS_None, // VSQRTPSZmkz = 21640 |
| 161374 | CEFBS_None, // VSQRTPSZr = 21641 |
| 161375 | CEFBS_None, // VSQRTPSZrb = 21642 |
| 161376 | CEFBS_None, // VSQRTPSZrbk = 21643 |
| 161377 | CEFBS_None, // VSQRTPSZrbkz = 21644 |
| 161378 | CEFBS_None, // VSQRTPSZrk = 21645 |
| 161379 | CEFBS_None, // VSQRTPSZrkz = 21646 |
| 161380 | CEFBS_None, // VSQRTPSm = 21647 |
| 161381 | CEFBS_None, // VSQRTPSr = 21648 |
| 161382 | CEFBS_None, // VSQRTSDZm = 21649 |
| 161383 | CEFBS_None, // VSQRTSDZm_Int = 21650 |
| 161384 | CEFBS_None, // VSQRTSDZmk_Int = 21651 |
| 161385 | CEFBS_None, // VSQRTSDZmkz_Int = 21652 |
| 161386 | CEFBS_None, // VSQRTSDZr = 21653 |
| 161387 | CEFBS_None, // VSQRTSDZr_Int = 21654 |
| 161388 | CEFBS_None, // VSQRTSDZrb_Int = 21655 |
| 161389 | CEFBS_None, // VSQRTSDZrbk_Int = 21656 |
| 161390 | CEFBS_None, // VSQRTSDZrbkz_Int = 21657 |
| 161391 | CEFBS_None, // VSQRTSDZrk_Int = 21658 |
| 161392 | CEFBS_None, // VSQRTSDZrkz_Int = 21659 |
| 161393 | CEFBS_None, // VSQRTSDm = 21660 |
| 161394 | CEFBS_None, // VSQRTSDm_Int = 21661 |
| 161395 | CEFBS_None, // VSQRTSDr = 21662 |
| 161396 | CEFBS_None, // VSQRTSDr_Int = 21663 |
| 161397 | CEFBS_None, // VSQRTSHZm = 21664 |
| 161398 | CEFBS_None, // VSQRTSHZm_Int = 21665 |
| 161399 | CEFBS_None, // VSQRTSHZmk_Int = 21666 |
| 161400 | CEFBS_None, // VSQRTSHZmkz_Int = 21667 |
| 161401 | CEFBS_None, // VSQRTSHZr = 21668 |
| 161402 | CEFBS_None, // VSQRTSHZr_Int = 21669 |
| 161403 | CEFBS_None, // VSQRTSHZrb_Int = 21670 |
| 161404 | CEFBS_None, // VSQRTSHZrbk_Int = 21671 |
| 161405 | CEFBS_None, // VSQRTSHZrbkz_Int = 21672 |
| 161406 | CEFBS_None, // VSQRTSHZrk_Int = 21673 |
| 161407 | CEFBS_None, // VSQRTSHZrkz_Int = 21674 |
| 161408 | CEFBS_None, // VSQRTSSZm = 21675 |
| 161409 | CEFBS_None, // VSQRTSSZm_Int = 21676 |
| 161410 | CEFBS_None, // VSQRTSSZmk_Int = 21677 |
| 161411 | CEFBS_None, // VSQRTSSZmkz_Int = 21678 |
| 161412 | CEFBS_None, // VSQRTSSZr = 21679 |
| 161413 | CEFBS_None, // VSQRTSSZr_Int = 21680 |
| 161414 | CEFBS_None, // VSQRTSSZrb_Int = 21681 |
| 161415 | CEFBS_None, // VSQRTSSZrbk_Int = 21682 |
| 161416 | CEFBS_None, // VSQRTSSZrbkz_Int = 21683 |
| 161417 | CEFBS_None, // VSQRTSSZrk_Int = 21684 |
| 161418 | CEFBS_None, // VSQRTSSZrkz_Int = 21685 |
| 161419 | CEFBS_None, // VSQRTSSm = 21686 |
| 161420 | CEFBS_None, // VSQRTSSm_Int = 21687 |
| 161421 | CEFBS_None, // VSQRTSSr = 21688 |
| 161422 | CEFBS_None, // VSQRTSSr_Int = 21689 |
| 161423 | CEFBS_None, // VSTMXCSR = 21690 |
| 161424 | CEFBS_None, // VSUBBF16Z128rm = 21691 |
| 161425 | CEFBS_None, // VSUBBF16Z128rmb = 21692 |
| 161426 | CEFBS_None, // VSUBBF16Z128rmbk = 21693 |
| 161427 | CEFBS_None, // VSUBBF16Z128rmbkz = 21694 |
| 161428 | CEFBS_None, // VSUBBF16Z128rmk = 21695 |
| 161429 | CEFBS_None, // VSUBBF16Z128rmkz = 21696 |
| 161430 | CEFBS_None, // VSUBBF16Z128rr = 21697 |
| 161431 | CEFBS_None, // VSUBBF16Z128rrk = 21698 |
| 161432 | CEFBS_None, // VSUBBF16Z128rrkz = 21699 |
| 161433 | CEFBS_None, // VSUBBF16Z256rm = 21700 |
| 161434 | CEFBS_None, // VSUBBF16Z256rmb = 21701 |
| 161435 | CEFBS_None, // VSUBBF16Z256rmbk = 21702 |
| 161436 | CEFBS_None, // VSUBBF16Z256rmbkz = 21703 |
| 161437 | CEFBS_None, // VSUBBF16Z256rmk = 21704 |
| 161438 | CEFBS_None, // VSUBBF16Z256rmkz = 21705 |
| 161439 | CEFBS_None, // VSUBBF16Z256rr = 21706 |
| 161440 | CEFBS_None, // VSUBBF16Z256rrk = 21707 |
| 161441 | CEFBS_None, // VSUBBF16Z256rrkz = 21708 |
| 161442 | CEFBS_None, // VSUBBF16Zrm = 21709 |
| 161443 | CEFBS_None, // VSUBBF16Zrmb = 21710 |
| 161444 | CEFBS_None, // VSUBBF16Zrmbk = 21711 |
| 161445 | CEFBS_None, // VSUBBF16Zrmbkz = 21712 |
| 161446 | CEFBS_None, // VSUBBF16Zrmk = 21713 |
| 161447 | CEFBS_None, // VSUBBF16Zrmkz = 21714 |
| 161448 | CEFBS_None, // VSUBBF16Zrr = 21715 |
| 161449 | CEFBS_None, // VSUBBF16Zrrk = 21716 |
| 161450 | CEFBS_None, // VSUBBF16Zrrkz = 21717 |
| 161451 | CEFBS_None, // VSUBPDYrm = 21718 |
| 161452 | CEFBS_None, // VSUBPDYrr = 21719 |
| 161453 | CEFBS_None, // VSUBPDZ128rm = 21720 |
| 161454 | CEFBS_None, // VSUBPDZ128rmb = 21721 |
| 161455 | CEFBS_None, // VSUBPDZ128rmbk = 21722 |
| 161456 | CEFBS_None, // VSUBPDZ128rmbkz = 21723 |
| 161457 | CEFBS_None, // VSUBPDZ128rmk = 21724 |
| 161458 | CEFBS_None, // VSUBPDZ128rmkz = 21725 |
| 161459 | CEFBS_None, // VSUBPDZ128rr = 21726 |
| 161460 | CEFBS_None, // VSUBPDZ128rrk = 21727 |
| 161461 | CEFBS_None, // VSUBPDZ128rrkz = 21728 |
| 161462 | CEFBS_None, // VSUBPDZ256rm = 21729 |
| 161463 | CEFBS_None, // VSUBPDZ256rmb = 21730 |
| 161464 | CEFBS_None, // VSUBPDZ256rmbk = 21731 |
| 161465 | CEFBS_None, // VSUBPDZ256rmbkz = 21732 |
| 161466 | CEFBS_None, // VSUBPDZ256rmk = 21733 |
| 161467 | CEFBS_None, // VSUBPDZ256rmkz = 21734 |
| 161468 | CEFBS_None, // VSUBPDZ256rr = 21735 |
| 161469 | CEFBS_None, // VSUBPDZ256rrk = 21736 |
| 161470 | CEFBS_None, // VSUBPDZ256rrkz = 21737 |
| 161471 | CEFBS_None, // VSUBPDZrm = 21738 |
| 161472 | CEFBS_None, // VSUBPDZrmb = 21739 |
| 161473 | CEFBS_None, // VSUBPDZrmbk = 21740 |
| 161474 | CEFBS_None, // VSUBPDZrmbkz = 21741 |
| 161475 | CEFBS_None, // VSUBPDZrmk = 21742 |
| 161476 | CEFBS_None, // VSUBPDZrmkz = 21743 |
| 161477 | CEFBS_None, // VSUBPDZrr = 21744 |
| 161478 | CEFBS_None, // VSUBPDZrrb = 21745 |
| 161479 | CEFBS_None, // VSUBPDZrrbk = 21746 |
| 161480 | CEFBS_None, // VSUBPDZrrbkz = 21747 |
| 161481 | CEFBS_None, // VSUBPDZrrk = 21748 |
| 161482 | CEFBS_None, // VSUBPDZrrkz = 21749 |
| 161483 | CEFBS_None, // VSUBPDrm = 21750 |
| 161484 | CEFBS_None, // VSUBPDrr = 21751 |
| 161485 | CEFBS_None, // VSUBPHZ128rm = 21752 |
| 161486 | CEFBS_None, // VSUBPHZ128rmb = 21753 |
| 161487 | CEFBS_None, // VSUBPHZ128rmbk = 21754 |
| 161488 | CEFBS_None, // VSUBPHZ128rmbkz = 21755 |
| 161489 | CEFBS_None, // VSUBPHZ128rmk = 21756 |
| 161490 | CEFBS_None, // VSUBPHZ128rmkz = 21757 |
| 161491 | CEFBS_None, // VSUBPHZ128rr = 21758 |
| 161492 | CEFBS_None, // VSUBPHZ128rrk = 21759 |
| 161493 | CEFBS_None, // VSUBPHZ128rrkz = 21760 |
| 161494 | CEFBS_None, // VSUBPHZ256rm = 21761 |
| 161495 | CEFBS_None, // VSUBPHZ256rmb = 21762 |
| 161496 | CEFBS_None, // VSUBPHZ256rmbk = 21763 |
| 161497 | CEFBS_None, // VSUBPHZ256rmbkz = 21764 |
| 161498 | CEFBS_None, // VSUBPHZ256rmk = 21765 |
| 161499 | CEFBS_None, // VSUBPHZ256rmkz = 21766 |
| 161500 | CEFBS_None, // VSUBPHZ256rr = 21767 |
| 161501 | CEFBS_None, // VSUBPHZ256rrk = 21768 |
| 161502 | CEFBS_None, // VSUBPHZ256rrkz = 21769 |
| 161503 | CEFBS_None, // VSUBPHZrm = 21770 |
| 161504 | CEFBS_None, // VSUBPHZrmb = 21771 |
| 161505 | CEFBS_None, // VSUBPHZrmbk = 21772 |
| 161506 | CEFBS_None, // VSUBPHZrmbkz = 21773 |
| 161507 | CEFBS_None, // VSUBPHZrmk = 21774 |
| 161508 | CEFBS_None, // VSUBPHZrmkz = 21775 |
| 161509 | CEFBS_None, // VSUBPHZrr = 21776 |
| 161510 | CEFBS_None, // VSUBPHZrrb = 21777 |
| 161511 | CEFBS_None, // VSUBPHZrrbk = 21778 |
| 161512 | CEFBS_None, // VSUBPHZrrbkz = 21779 |
| 161513 | CEFBS_None, // VSUBPHZrrk = 21780 |
| 161514 | CEFBS_None, // VSUBPHZrrkz = 21781 |
| 161515 | CEFBS_None, // VSUBPSYrm = 21782 |
| 161516 | CEFBS_None, // VSUBPSYrr = 21783 |
| 161517 | CEFBS_None, // VSUBPSZ128rm = 21784 |
| 161518 | CEFBS_None, // VSUBPSZ128rmb = 21785 |
| 161519 | CEFBS_None, // VSUBPSZ128rmbk = 21786 |
| 161520 | CEFBS_None, // VSUBPSZ128rmbkz = 21787 |
| 161521 | CEFBS_None, // VSUBPSZ128rmk = 21788 |
| 161522 | CEFBS_None, // VSUBPSZ128rmkz = 21789 |
| 161523 | CEFBS_None, // VSUBPSZ128rr = 21790 |
| 161524 | CEFBS_None, // VSUBPSZ128rrk = 21791 |
| 161525 | CEFBS_None, // VSUBPSZ128rrkz = 21792 |
| 161526 | CEFBS_None, // VSUBPSZ256rm = 21793 |
| 161527 | CEFBS_None, // VSUBPSZ256rmb = 21794 |
| 161528 | CEFBS_None, // VSUBPSZ256rmbk = 21795 |
| 161529 | CEFBS_None, // VSUBPSZ256rmbkz = 21796 |
| 161530 | CEFBS_None, // VSUBPSZ256rmk = 21797 |
| 161531 | CEFBS_None, // VSUBPSZ256rmkz = 21798 |
| 161532 | CEFBS_None, // VSUBPSZ256rr = 21799 |
| 161533 | CEFBS_None, // VSUBPSZ256rrk = 21800 |
| 161534 | CEFBS_None, // VSUBPSZ256rrkz = 21801 |
| 161535 | CEFBS_None, // VSUBPSZrm = 21802 |
| 161536 | CEFBS_None, // VSUBPSZrmb = 21803 |
| 161537 | CEFBS_None, // VSUBPSZrmbk = 21804 |
| 161538 | CEFBS_None, // VSUBPSZrmbkz = 21805 |
| 161539 | CEFBS_None, // VSUBPSZrmk = 21806 |
| 161540 | CEFBS_None, // VSUBPSZrmkz = 21807 |
| 161541 | CEFBS_None, // VSUBPSZrr = 21808 |
| 161542 | CEFBS_None, // VSUBPSZrrb = 21809 |
| 161543 | CEFBS_None, // VSUBPSZrrbk = 21810 |
| 161544 | CEFBS_None, // VSUBPSZrrbkz = 21811 |
| 161545 | CEFBS_None, // VSUBPSZrrk = 21812 |
| 161546 | CEFBS_None, // VSUBPSZrrkz = 21813 |
| 161547 | CEFBS_None, // VSUBPSrm = 21814 |
| 161548 | CEFBS_None, // VSUBPSrr = 21815 |
| 161549 | CEFBS_None, // VSUBSDZrm = 21816 |
| 161550 | CEFBS_None, // VSUBSDZrm_Int = 21817 |
| 161551 | CEFBS_None, // VSUBSDZrmk_Int = 21818 |
| 161552 | CEFBS_None, // VSUBSDZrmkz_Int = 21819 |
| 161553 | CEFBS_None, // VSUBSDZrr = 21820 |
| 161554 | CEFBS_None, // VSUBSDZrr_Int = 21821 |
| 161555 | CEFBS_None, // VSUBSDZrrb_Int = 21822 |
| 161556 | CEFBS_None, // VSUBSDZrrbk_Int = 21823 |
| 161557 | CEFBS_None, // VSUBSDZrrbkz_Int = 21824 |
| 161558 | CEFBS_None, // VSUBSDZrrk_Int = 21825 |
| 161559 | CEFBS_None, // VSUBSDZrrkz_Int = 21826 |
| 161560 | CEFBS_None, // VSUBSDrm = 21827 |
| 161561 | CEFBS_None, // VSUBSDrm_Int = 21828 |
| 161562 | CEFBS_None, // VSUBSDrr = 21829 |
| 161563 | CEFBS_None, // VSUBSDrr_Int = 21830 |
| 161564 | CEFBS_None, // VSUBSHZrm = 21831 |
| 161565 | CEFBS_None, // VSUBSHZrm_Int = 21832 |
| 161566 | CEFBS_None, // VSUBSHZrmk_Int = 21833 |
| 161567 | CEFBS_None, // VSUBSHZrmkz_Int = 21834 |
| 161568 | CEFBS_None, // VSUBSHZrr = 21835 |
| 161569 | CEFBS_None, // VSUBSHZrr_Int = 21836 |
| 161570 | CEFBS_None, // VSUBSHZrrb_Int = 21837 |
| 161571 | CEFBS_None, // VSUBSHZrrbk_Int = 21838 |
| 161572 | CEFBS_None, // VSUBSHZrrbkz_Int = 21839 |
| 161573 | CEFBS_None, // VSUBSHZrrk_Int = 21840 |
| 161574 | CEFBS_None, // VSUBSHZrrkz_Int = 21841 |
| 161575 | CEFBS_None, // VSUBSSZrm = 21842 |
| 161576 | CEFBS_None, // VSUBSSZrm_Int = 21843 |
| 161577 | CEFBS_None, // VSUBSSZrmk_Int = 21844 |
| 161578 | CEFBS_None, // VSUBSSZrmkz_Int = 21845 |
| 161579 | CEFBS_None, // VSUBSSZrr = 21846 |
| 161580 | CEFBS_None, // VSUBSSZrr_Int = 21847 |
| 161581 | CEFBS_None, // VSUBSSZrrb_Int = 21848 |
| 161582 | CEFBS_None, // VSUBSSZrrbk_Int = 21849 |
| 161583 | CEFBS_None, // VSUBSSZrrbkz_Int = 21850 |
| 161584 | CEFBS_None, // VSUBSSZrrk_Int = 21851 |
| 161585 | CEFBS_None, // VSUBSSZrrkz_Int = 21852 |
| 161586 | CEFBS_None, // VSUBSSrm = 21853 |
| 161587 | CEFBS_None, // VSUBSSrm_Int = 21854 |
| 161588 | CEFBS_None, // VSUBSSrr = 21855 |
| 161589 | CEFBS_None, // VSUBSSrr_Int = 21856 |
| 161590 | CEFBS_None, // VTESTPDYrm = 21857 |
| 161591 | CEFBS_None, // VTESTPDYrr = 21858 |
| 161592 | CEFBS_None, // VTESTPDrm = 21859 |
| 161593 | CEFBS_None, // VTESTPDrr = 21860 |
| 161594 | CEFBS_None, // VTESTPSYrm = 21861 |
| 161595 | CEFBS_None, // VTESTPSYrr = 21862 |
| 161596 | CEFBS_None, // VTESTPSrm = 21863 |
| 161597 | CEFBS_None, // VTESTPSrr = 21864 |
| 161598 | CEFBS_None, // VUCOMISDZrm = 21865 |
| 161599 | CEFBS_None, // VUCOMISDZrm_Int = 21866 |
| 161600 | CEFBS_None, // VUCOMISDZrr = 21867 |
| 161601 | CEFBS_None, // VUCOMISDZrr_Int = 21868 |
| 161602 | CEFBS_None, // VUCOMISDZrrb = 21869 |
| 161603 | CEFBS_None, // VUCOMISDrm = 21870 |
| 161604 | CEFBS_None, // VUCOMISDrm_Int = 21871 |
| 161605 | CEFBS_None, // VUCOMISDrr = 21872 |
| 161606 | CEFBS_None, // VUCOMISDrr_Int = 21873 |
| 161607 | CEFBS_None, // VUCOMISHZrm = 21874 |
| 161608 | CEFBS_None, // VUCOMISHZrm_Int = 21875 |
| 161609 | CEFBS_None, // VUCOMISHZrr = 21876 |
| 161610 | CEFBS_None, // VUCOMISHZrr_Int = 21877 |
| 161611 | CEFBS_None, // VUCOMISHZrrb = 21878 |
| 161612 | CEFBS_None, // VUCOMISSZrm = 21879 |
| 161613 | CEFBS_None, // VUCOMISSZrm_Int = 21880 |
| 161614 | CEFBS_None, // VUCOMISSZrr = 21881 |
| 161615 | CEFBS_None, // VUCOMISSZrr_Int = 21882 |
| 161616 | CEFBS_None, // VUCOMISSZrrb = 21883 |
| 161617 | CEFBS_None, // VUCOMISSrm = 21884 |
| 161618 | CEFBS_None, // VUCOMISSrm_Int = 21885 |
| 161619 | CEFBS_None, // VUCOMISSrr = 21886 |
| 161620 | CEFBS_None, // VUCOMISSrr_Int = 21887 |
| 161621 | CEFBS_None, // VUCOMXSDZrm = 21888 |
| 161622 | CEFBS_None, // VUCOMXSDZrm_Int = 21889 |
| 161623 | CEFBS_None, // VUCOMXSDZrr = 21890 |
| 161624 | CEFBS_None, // VUCOMXSDZrr_Int = 21891 |
| 161625 | CEFBS_None, // VUCOMXSDZrrb_Int = 21892 |
| 161626 | CEFBS_None, // VUCOMXSHZrm = 21893 |
| 161627 | CEFBS_None, // VUCOMXSHZrm_Int = 21894 |
| 161628 | CEFBS_None, // VUCOMXSHZrr = 21895 |
| 161629 | CEFBS_None, // VUCOMXSHZrr_Int = 21896 |
| 161630 | CEFBS_None, // VUCOMXSHZrrb_Int = 21897 |
| 161631 | CEFBS_None, // VUCOMXSSZrm = 21898 |
| 161632 | CEFBS_None, // VUCOMXSSZrm_Int = 21899 |
| 161633 | CEFBS_None, // VUCOMXSSZrr = 21900 |
| 161634 | CEFBS_None, // VUCOMXSSZrr_Int = 21901 |
| 161635 | CEFBS_None, // VUCOMXSSZrrb_Int = 21902 |
| 161636 | CEFBS_None, // VUNPCKHPDYrm = 21903 |
| 161637 | CEFBS_None, // VUNPCKHPDYrr = 21904 |
| 161638 | CEFBS_None, // VUNPCKHPDZ128rm = 21905 |
| 161639 | CEFBS_None, // VUNPCKHPDZ128rmb = 21906 |
| 161640 | CEFBS_None, // VUNPCKHPDZ128rmbk = 21907 |
| 161641 | CEFBS_None, // VUNPCKHPDZ128rmbkz = 21908 |
| 161642 | CEFBS_None, // VUNPCKHPDZ128rmk = 21909 |
| 161643 | CEFBS_None, // VUNPCKHPDZ128rmkz = 21910 |
| 161644 | CEFBS_None, // VUNPCKHPDZ128rr = 21911 |
| 161645 | CEFBS_None, // VUNPCKHPDZ128rrk = 21912 |
| 161646 | CEFBS_None, // VUNPCKHPDZ128rrkz = 21913 |
| 161647 | CEFBS_None, // VUNPCKHPDZ256rm = 21914 |
| 161648 | CEFBS_None, // VUNPCKHPDZ256rmb = 21915 |
| 161649 | CEFBS_None, // VUNPCKHPDZ256rmbk = 21916 |
| 161650 | CEFBS_None, // VUNPCKHPDZ256rmbkz = 21917 |
| 161651 | CEFBS_None, // VUNPCKHPDZ256rmk = 21918 |
| 161652 | CEFBS_None, // VUNPCKHPDZ256rmkz = 21919 |
| 161653 | CEFBS_None, // VUNPCKHPDZ256rr = 21920 |
| 161654 | CEFBS_None, // VUNPCKHPDZ256rrk = 21921 |
| 161655 | CEFBS_None, // VUNPCKHPDZ256rrkz = 21922 |
| 161656 | CEFBS_None, // VUNPCKHPDZrm = 21923 |
| 161657 | CEFBS_None, // VUNPCKHPDZrmb = 21924 |
| 161658 | CEFBS_None, // VUNPCKHPDZrmbk = 21925 |
| 161659 | CEFBS_None, // VUNPCKHPDZrmbkz = 21926 |
| 161660 | CEFBS_None, // VUNPCKHPDZrmk = 21927 |
| 161661 | CEFBS_None, // VUNPCKHPDZrmkz = 21928 |
| 161662 | CEFBS_None, // VUNPCKHPDZrr = 21929 |
| 161663 | CEFBS_None, // VUNPCKHPDZrrk = 21930 |
| 161664 | CEFBS_None, // VUNPCKHPDZrrkz = 21931 |
| 161665 | CEFBS_None, // VUNPCKHPDrm = 21932 |
| 161666 | CEFBS_None, // VUNPCKHPDrr = 21933 |
| 161667 | CEFBS_None, // VUNPCKHPSYrm = 21934 |
| 161668 | CEFBS_None, // VUNPCKHPSYrr = 21935 |
| 161669 | CEFBS_None, // VUNPCKHPSZ128rm = 21936 |
| 161670 | CEFBS_None, // VUNPCKHPSZ128rmb = 21937 |
| 161671 | CEFBS_None, // VUNPCKHPSZ128rmbk = 21938 |
| 161672 | CEFBS_None, // VUNPCKHPSZ128rmbkz = 21939 |
| 161673 | CEFBS_None, // VUNPCKHPSZ128rmk = 21940 |
| 161674 | CEFBS_None, // VUNPCKHPSZ128rmkz = 21941 |
| 161675 | CEFBS_None, // VUNPCKHPSZ128rr = 21942 |
| 161676 | CEFBS_None, // VUNPCKHPSZ128rrk = 21943 |
| 161677 | CEFBS_None, // VUNPCKHPSZ128rrkz = 21944 |
| 161678 | CEFBS_None, // VUNPCKHPSZ256rm = 21945 |
| 161679 | CEFBS_None, // VUNPCKHPSZ256rmb = 21946 |
| 161680 | CEFBS_None, // VUNPCKHPSZ256rmbk = 21947 |
| 161681 | CEFBS_None, // VUNPCKHPSZ256rmbkz = 21948 |
| 161682 | CEFBS_None, // VUNPCKHPSZ256rmk = 21949 |
| 161683 | CEFBS_None, // VUNPCKHPSZ256rmkz = 21950 |
| 161684 | CEFBS_None, // VUNPCKHPSZ256rr = 21951 |
| 161685 | CEFBS_None, // VUNPCKHPSZ256rrk = 21952 |
| 161686 | CEFBS_None, // VUNPCKHPSZ256rrkz = 21953 |
| 161687 | CEFBS_None, // VUNPCKHPSZrm = 21954 |
| 161688 | CEFBS_None, // VUNPCKHPSZrmb = 21955 |
| 161689 | CEFBS_None, // VUNPCKHPSZrmbk = 21956 |
| 161690 | CEFBS_None, // VUNPCKHPSZrmbkz = 21957 |
| 161691 | CEFBS_None, // VUNPCKHPSZrmk = 21958 |
| 161692 | CEFBS_None, // VUNPCKHPSZrmkz = 21959 |
| 161693 | CEFBS_None, // VUNPCKHPSZrr = 21960 |
| 161694 | CEFBS_None, // VUNPCKHPSZrrk = 21961 |
| 161695 | CEFBS_None, // VUNPCKHPSZrrkz = 21962 |
| 161696 | CEFBS_None, // VUNPCKHPSrm = 21963 |
| 161697 | CEFBS_None, // VUNPCKHPSrr = 21964 |
| 161698 | CEFBS_None, // VUNPCKLPDYrm = 21965 |
| 161699 | CEFBS_None, // VUNPCKLPDYrr = 21966 |
| 161700 | CEFBS_None, // VUNPCKLPDZ128rm = 21967 |
| 161701 | CEFBS_None, // VUNPCKLPDZ128rmb = 21968 |
| 161702 | CEFBS_None, // VUNPCKLPDZ128rmbk = 21969 |
| 161703 | CEFBS_None, // VUNPCKLPDZ128rmbkz = 21970 |
| 161704 | CEFBS_None, // VUNPCKLPDZ128rmk = 21971 |
| 161705 | CEFBS_None, // VUNPCKLPDZ128rmkz = 21972 |
| 161706 | CEFBS_None, // VUNPCKLPDZ128rr = 21973 |
| 161707 | CEFBS_None, // VUNPCKLPDZ128rrk = 21974 |
| 161708 | CEFBS_None, // VUNPCKLPDZ128rrkz = 21975 |
| 161709 | CEFBS_None, // VUNPCKLPDZ256rm = 21976 |
| 161710 | CEFBS_None, // VUNPCKLPDZ256rmb = 21977 |
| 161711 | CEFBS_None, // VUNPCKLPDZ256rmbk = 21978 |
| 161712 | CEFBS_None, // VUNPCKLPDZ256rmbkz = 21979 |
| 161713 | CEFBS_None, // VUNPCKLPDZ256rmk = 21980 |
| 161714 | CEFBS_None, // VUNPCKLPDZ256rmkz = 21981 |
| 161715 | CEFBS_None, // VUNPCKLPDZ256rr = 21982 |
| 161716 | CEFBS_None, // VUNPCKLPDZ256rrk = 21983 |
| 161717 | CEFBS_None, // VUNPCKLPDZ256rrkz = 21984 |
| 161718 | CEFBS_None, // VUNPCKLPDZrm = 21985 |
| 161719 | CEFBS_None, // VUNPCKLPDZrmb = 21986 |
| 161720 | CEFBS_None, // VUNPCKLPDZrmbk = 21987 |
| 161721 | CEFBS_None, // VUNPCKLPDZrmbkz = 21988 |
| 161722 | CEFBS_None, // VUNPCKLPDZrmk = 21989 |
| 161723 | CEFBS_None, // VUNPCKLPDZrmkz = 21990 |
| 161724 | CEFBS_None, // VUNPCKLPDZrr = 21991 |
| 161725 | CEFBS_None, // VUNPCKLPDZrrk = 21992 |
| 161726 | CEFBS_None, // VUNPCKLPDZrrkz = 21993 |
| 161727 | CEFBS_None, // VUNPCKLPDrm = 21994 |
| 161728 | CEFBS_None, // VUNPCKLPDrr = 21995 |
| 161729 | CEFBS_None, // VUNPCKLPSYrm = 21996 |
| 161730 | CEFBS_None, // VUNPCKLPSYrr = 21997 |
| 161731 | CEFBS_None, // VUNPCKLPSZ128rm = 21998 |
| 161732 | CEFBS_None, // VUNPCKLPSZ128rmb = 21999 |
| 161733 | CEFBS_None, // VUNPCKLPSZ128rmbk = 22000 |
| 161734 | CEFBS_None, // VUNPCKLPSZ128rmbkz = 22001 |
| 161735 | CEFBS_None, // VUNPCKLPSZ128rmk = 22002 |
| 161736 | CEFBS_None, // VUNPCKLPSZ128rmkz = 22003 |
| 161737 | CEFBS_None, // VUNPCKLPSZ128rr = 22004 |
| 161738 | CEFBS_None, // VUNPCKLPSZ128rrk = 22005 |
| 161739 | CEFBS_None, // VUNPCKLPSZ128rrkz = 22006 |
| 161740 | CEFBS_None, // VUNPCKLPSZ256rm = 22007 |
| 161741 | CEFBS_None, // VUNPCKLPSZ256rmb = 22008 |
| 161742 | CEFBS_None, // VUNPCKLPSZ256rmbk = 22009 |
| 161743 | CEFBS_None, // VUNPCKLPSZ256rmbkz = 22010 |
| 161744 | CEFBS_None, // VUNPCKLPSZ256rmk = 22011 |
| 161745 | CEFBS_None, // VUNPCKLPSZ256rmkz = 22012 |
| 161746 | CEFBS_None, // VUNPCKLPSZ256rr = 22013 |
| 161747 | CEFBS_None, // VUNPCKLPSZ256rrk = 22014 |
| 161748 | CEFBS_None, // VUNPCKLPSZ256rrkz = 22015 |
| 161749 | CEFBS_None, // VUNPCKLPSZrm = 22016 |
| 161750 | CEFBS_None, // VUNPCKLPSZrmb = 22017 |
| 161751 | CEFBS_None, // VUNPCKLPSZrmbk = 22018 |
| 161752 | CEFBS_None, // VUNPCKLPSZrmbkz = 22019 |
| 161753 | CEFBS_None, // VUNPCKLPSZrmk = 22020 |
| 161754 | CEFBS_None, // VUNPCKLPSZrmkz = 22021 |
| 161755 | CEFBS_None, // VUNPCKLPSZrr = 22022 |
| 161756 | CEFBS_None, // VUNPCKLPSZrrk = 22023 |
| 161757 | CEFBS_None, // VUNPCKLPSZrrkz = 22024 |
| 161758 | CEFBS_None, // VUNPCKLPSrm = 22025 |
| 161759 | CEFBS_None, // VUNPCKLPSrr = 22026 |
| 161760 | CEFBS_None, // VXORPDYrm = 22027 |
| 161761 | CEFBS_None, // VXORPDYrr = 22028 |
| 161762 | CEFBS_None, // VXORPDZ128rm = 22029 |
| 161763 | CEFBS_None, // VXORPDZ128rmb = 22030 |
| 161764 | CEFBS_None, // VXORPDZ128rmbk = 22031 |
| 161765 | CEFBS_None, // VXORPDZ128rmbkz = 22032 |
| 161766 | CEFBS_None, // VXORPDZ128rmk = 22033 |
| 161767 | CEFBS_None, // VXORPDZ128rmkz = 22034 |
| 161768 | CEFBS_None, // VXORPDZ128rr = 22035 |
| 161769 | CEFBS_None, // VXORPDZ128rrk = 22036 |
| 161770 | CEFBS_None, // VXORPDZ128rrkz = 22037 |
| 161771 | CEFBS_None, // VXORPDZ256rm = 22038 |
| 161772 | CEFBS_None, // VXORPDZ256rmb = 22039 |
| 161773 | CEFBS_None, // VXORPDZ256rmbk = 22040 |
| 161774 | CEFBS_None, // VXORPDZ256rmbkz = 22041 |
| 161775 | CEFBS_None, // VXORPDZ256rmk = 22042 |
| 161776 | CEFBS_None, // VXORPDZ256rmkz = 22043 |
| 161777 | CEFBS_None, // VXORPDZ256rr = 22044 |
| 161778 | CEFBS_None, // VXORPDZ256rrk = 22045 |
| 161779 | CEFBS_None, // VXORPDZ256rrkz = 22046 |
| 161780 | CEFBS_None, // VXORPDZrm = 22047 |
| 161781 | CEFBS_None, // VXORPDZrmb = 22048 |
| 161782 | CEFBS_None, // VXORPDZrmbk = 22049 |
| 161783 | CEFBS_None, // VXORPDZrmbkz = 22050 |
| 161784 | CEFBS_None, // VXORPDZrmk = 22051 |
| 161785 | CEFBS_None, // VXORPDZrmkz = 22052 |
| 161786 | CEFBS_None, // VXORPDZrr = 22053 |
| 161787 | CEFBS_None, // VXORPDZrrk = 22054 |
| 161788 | CEFBS_None, // VXORPDZrrkz = 22055 |
| 161789 | CEFBS_None, // VXORPDrm = 22056 |
| 161790 | CEFBS_None, // VXORPDrr = 22057 |
| 161791 | CEFBS_None, // VXORPSYrm = 22058 |
| 161792 | CEFBS_None, // VXORPSYrr = 22059 |
| 161793 | CEFBS_None, // VXORPSZ128rm = 22060 |
| 161794 | CEFBS_None, // VXORPSZ128rmb = 22061 |
| 161795 | CEFBS_None, // VXORPSZ128rmbk = 22062 |
| 161796 | CEFBS_None, // VXORPSZ128rmbkz = 22063 |
| 161797 | CEFBS_None, // VXORPSZ128rmk = 22064 |
| 161798 | CEFBS_None, // VXORPSZ128rmkz = 22065 |
| 161799 | CEFBS_None, // VXORPSZ128rr = 22066 |
| 161800 | CEFBS_None, // VXORPSZ128rrk = 22067 |
| 161801 | CEFBS_None, // VXORPSZ128rrkz = 22068 |
| 161802 | CEFBS_None, // VXORPSZ256rm = 22069 |
| 161803 | CEFBS_None, // VXORPSZ256rmb = 22070 |
| 161804 | CEFBS_None, // VXORPSZ256rmbk = 22071 |
| 161805 | CEFBS_None, // VXORPSZ256rmbkz = 22072 |
| 161806 | CEFBS_None, // VXORPSZ256rmk = 22073 |
| 161807 | CEFBS_None, // VXORPSZ256rmkz = 22074 |
| 161808 | CEFBS_None, // VXORPSZ256rr = 22075 |
| 161809 | CEFBS_None, // VXORPSZ256rrk = 22076 |
| 161810 | CEFBS_None, // VXORPSZ256rrkz = 22077 |
| 161811 | CEFBS_None, // VXORPSZrm = 22078 |
| 161812 | CEFBS_None, // VXORPSZrmb = 22079 |
| 161813 | CEFBS_None, // VXORPSZrmbk = 22080 |
| 161814 | CEFBS_None, // VXORPSZrmbkz = 22081 |
| 161815 | CEFBS_None, // VXORPSZrmk = 22082 |
| 161816 | CEFBS_None, // VXORPSZrmkz = 22083 |
| 161817 | CEFBS_None, // VXORPSZrr = 22084 |
| 161818 | CEFBS_None, // VXORPSZrrk = 22085 |
| 161819 | CEFBS_None, // VXORPSZrrkz = 22086 |
| 161820 | CEFBS_None, // VXORPSrm = 22087 |
| 161821 | CEFBS_None, // VXORPSrr = 22088 |
| 161822 | CEFBS_None, // VZEROALL = 22089 |
| 161823 | CEFBS_None, // VZEROUPPER = 22090 |
| 161824 | CEFBS_None, // WAIT = 22091 |
| 161825 | CEFBS_None, // WBINVD = 22092 |
| 161826 | CEFBS_None, // WBNOINVD = 22093 |
| 161827 | CEFBS_In64BitMode, // WRFSBASE = 22094 |
| 161828 | CEFBS_In64BitMode, // WRFSBASE64 = 22095 |
| 161829 | CEFBS_In64BitMode, // WRGSBASE = 22096 |
| 161830 | CEFBS_In64BitMode, // WRGSBASE64 = 22097 |
| 161831 | CEFBS_None, // WRMSR = 22098 |
| 161832 | CEFBS_In64BitMode, // WRMSRLIST = 22099 |
| 161833 | CEFBS_None, // WRMSRNS = 22100 |
| 161834 | CEFBS_None, // WRMSRNSir = 22101 |
| 161835 | CEFBS_In64BitMode, // WRMSRNSir_EVEX = 22102 |
| 161836 | CEFBS_None, // WRPKRUr = 22103 |
| 161837 | CEFBS_None, // WRSSD = 22104 |
| 161838 | CEFBS_In64BitMode, // WRSSD_EVEX = 22105 |
| 161839 | CEFBS_None, // WRSSQ = 22106 |
| 161840 | CEFBS_In64BitMode, // WRSSQ_EVEX = 22107 |
| 161841 | CEFBS_None, // WRUSSD = 22108 |
| 161842 | CEFBS_In64BitMode, // WRUSSD_EVEX = 22109 |
| 161843 | CEFBS_None, // WRUSSQ = 22110 |
| 161844 | CEFBS_In64BitMode, // WRUSSQ_EVEX = 22111 |
| 161845 | CEFBS_None, // XABORT = 22112 |
| 161846 | CEFBS_None, // XACQUIRE_PREFIX = 22113 |
| 161847 | CEFBS_None, // XADD16rm = 22114 |
| 161848 | CEFBS_None, // XADD16rr = 22115 |
| 161849 | CEFBS_None, // XADD32rm = 22116 |
| 161850 | CEFBS_None, // XADD32rr = 22117 |
| 161851 | CEFBS_None, // XADD64rm = 22118 |
| 161852 | CEFBS_None, // XADD64rr = 22119 |
| 161853 | CEFBS_None, // XADD8rm = 22120 |
| 161854 | CEFBS_None, // XADD8rr = 22121 |
| 161855 | CEFBS_None, // XAM_F = 22122 |
| 161856 | CEFBS_None, // XAM_Fp32 = 22123 |
| 161857 | CEFBS_None, // XAM_Fp64 = 22124 |
| 161858 | CEFBS_None, // XAM_Fp80 = 22125 |
| 161859 | CEFBS_None, // XBEGIN = 22126 |
| 161860 | CEFBS_None, // XBEGIN_2 = 22127 |
| 161861 | CEFBS_None, // XBEGIN_4 = 22128 |
| 161862 | CEFBS_None, // XCHG16ar = 22129 |
| 161863 | CEFBS_None, // XCHG16rm = 22130 |
| 161864 | CEFBS_None, // XCHG16rr = 22131 |
| 161865 | CEFBS_None, // XCHG32ar = 22132 |
| 161866 | CEFBS_None, // XCHG32rm = 22133 |
| 161867 | CEFBS_None, // XCHG32rr = 22134 |
| 161868 | CEFBS_None, // XCHG64ar = 22135 |
| 161869 | CEFBS_None, // XCHG64rm = 22136 |
| 161870 | CEFBS_None, // XCHG64rr = 22137 |
| 161871 | CEFBS_None, // XCHG8rm = 22138 |
| 161872 | CEFBS_None, // XCHG8rr = 22139 |
| 161873 | CEFBS_None, // XCH_F = 22140 |
| 161874 | CEFBS_None, // XCRYPTCBC = 22141 |
| 161875 | CEFBS_None, // XCRYPTCFB = 22142 |
| 161876 | CEFBS_None, // XCRYPTCTR = 22143 |
| 161877 | CEFBS_None, // XCRYPTECB = 22144 |
| 161878 | CEFBS_None, // XCRYPTOFB = 22145 |
| 161879 | CEFBS_None, // XEND = 22146 |
| 161880 | CEFBS_None, // XGETBV = 22147 |
| 161881 | CEFBS_None, // XLAT = 22148 |
| 161882 | CEFBS_None, // XOR16i16 = 22149 |
| 161883 | CEFBS_None, // XOR16mi = 22150 |
| 161884 | CEFBS_None, // XOR16mi8 = 22151 |
| 161885 | CEFBS_In64BitMode, // XOR16mi8_EVEX = 22152 |
| 161886 | CEFBS_In64BitMode, // XOR16mi8_ND = 22153 |
| 161887 | CEFBS_In64BitMode, // XOR16mi8_NF = 22154 |
| 161888 | CEFBS_In64BitMode, // XOR16mi8_NF_ND = 22155 |
| 161889 | CEFBS_In64BitMode, // XOR16mi_EVEX = 22156 |
| 161890 | CEFBS_In64BitMode, // XOR16mi_ND = 22157 |
| 161891 | CEFBS_In64BitMode, // XOR16mi_NF = 22158 |
| 161892 | CEFBS_In64BitMode, // XOR16mi_NF_ND = 22159 |
| 161893 | CEFBS_None, // XOR16mr = 22160 |
| 161894 | CEFBS_In64BitMode, // XOR16mr_EVEX = 22161 |
| 161895 | CEFBS_In64BitMode, // XOR16mr_ND = 22162 |
| 161896 | CEFBS_In64BitMode, // XOR16mr_NF = 22163 |
| 161897 | CEFBS_In64BitMode, // XOR16mr_NF_ND = 22164 |
| 161898 | CEFBS_None, // XOR16ri = 22165 |
| 161899 | CEFBS_None, // XOR16ri8 = 22166 |
| 161900 | CEFBS_In64BitMode, // XOR16ri8_EVEX = 22167 |
| 161901 | CEFBS_In64BitMode, // XOR16ri8_ND = 22168 |
| 161902 | CEFBS_In64BitMode, // XOR16ri8_NF = 22169 |
| 161903 | CEFBS_In64BitMode, // XOR16ri8_NF_ND = 22170 |
| 161904 | CEFBS_In64BitMode, // XOR16ri_EVEX = 22171 |
| 161905 | CEFBS_In64BitMode, // XOR16ri_ND = 22172 |
| 161906 | CEFBS_In64BitMode, // XOR16ri_NF = 22173 |
| 161907 | CEFBS_In64BitMode, // XOR16ri_NF_ND = 22174 |
| 161908 | CEFBS_None, // XOR16rm = 22175 |
| 161909 | CEFBS_In64BitMode, // XOR16rm_EVEX = 22176 |
| 161910 | CEFBS_In64BitMode, // XOR16rm_ND = 22177 |
| 161911 | CEFBS_In64BitMode, // XOR16rm_NF = 22178 |
| 161912 | CEFBS_In64BitMode, // XOR16rm_NF_ND = 22179 |
| 161913 | CEFBS_None, // XOR16rr = 22180 |
| 161914 | CEFBS_In64BitMode, // XOR16rr_EVEX = 22181 |
| 161915 | CEFBS_In64BitMode, // XOR16rr_EVEX_REV = 22182 |
| 161916 | CEFBS_In64BitMode, // XOR16rr_ND = 22183 |
| 161917 | CEFBS_In64BitMode, // XOR16rr_ND_REV = 22184 |
| 161918 | CEFBS_In64BitMode, // XOR16rr_NF = 22185 |
| 161919 | CEFBS_In64BitMode, // XOR16rr_NF_ND = 22186 |
| 161920 | CEFBS_In64BitMode, // XOR16rr_NF_ND_REV = 22187 |
| 161921 | CEFBS_In64BitMode, // XOR16rr_NF_REV = 22188 |
| 161922 | CEFBS_None, // XOR16rr_REV = 22189 |
| 161923 | CEFBS_None, // XOR32i32 = 22190 |
| 161924 | CEFBS_None, // XOR32mi = 22191 |
| 161925 | CEFBS_None, // XOR32mi8 = 22192 |
| 161926 | CEFBS_In64BitMode, // XOR32mi8_EVEX = 22193 |
| 161927 | CEFBS_In64BitMode, // XOR32mi8_ND = 22194 |
| 161928 | CEFBS_In64BitMode, // XOR32mi8_NF = 22195 |
| 161929 | CEFBS_In64BitMode, // XOR32mi8_NF_ND = 22196 |
| 161930 | CEFBS_In64BitMode, // XOR32mi_EVEX = 22197 |
| 161931 | CEFBS_In64BitMode, // XOR32mi_ND = 22198 |
| 161932 | CEFBS_In64BitMode, // XOR32mi_NF = 22199 |
| 161933 | CEFBS_In64BitMode, // XOR32mi_NF_ND = 22200 |
| 161934 | CEFBS_None, // XOR32mr = 22201 |
| 161935 | CEFBS_In64BitMode, // XOR32mr_EVEX = 22202 |
| 161936 | CEFBS_In64BitMode, // XOR32mr_ND = 22203 |
| 161937 | CEFBS_In64BitMode, // XOR32mr_NF = 22204 |
| 161938 | CEFBS_In64BitMode, // XOR32mr_NF_ND = 22205 |
| 161939 | CEFBS_None, // XOR32ri = 22206 |
| 161940 | CEFBS_None, // XOR32ri8 = 22207 |
| 161941 | CEFBS_In64BitMode, // XOR32ri8_EVEX = 22208 |
| 161942 | CEFBS_In64BitMode, // XOR32ri8_ND = 22209 |
| 161943 | CEFBS_In64BitMode, // XOR32ri8_NF = 22210 |
| 161944 | CEFBS_In64BitMode, // XOR32ri8_NF_ND = 22211 |
| 161945 | CEFBS_In64BitMode, // XOR32ri_EVEX = 22212 |
| 161946 | CEFBS_In64BitMode, // XOR32ri_ND = 22213 |
| 161947 | CEFBS_In64BitMode, // XOR32ri_NF = 22214 |
| 161948 | CEFBS_In64BitMode, // XOR32ri_NF_ND = 22215 |
| 161949 | CEFBS_None, // XOR32rm = 22216 |
| 161950 | CEFBS_In64BitMode, // XOR32rm_EVEX = 22217 |
| 161951 | CEFBS_In64BitMode, // XOR32rm_ND = 22218 |
| 161952 | CEFBS_In64BitMode, // XOR32rm_NF = 22219 |
| 161953 | CEFBS_In64BitMode, // XOR32rm_NF_ND = 22220 |
| 161954 | CEFBS_None, // XOR32rr = 22221 |
| 161955 | CEFBS_In64BitMode, // XOR32rr_EVEX = 22222 |
| 161956 | CEFBS_In64BitMode, // XOR32rr_EVEX_REV = 22223 |
| 161957 | CEFBS_In64BitMode, // XOR32rr_ND = 22224 |
| 161958 | CEFBS_In64BitMode, // XOR32rr_ND_REV = 22225 |
| 161959 | CEFBS_In64BitMode, // XOR32rr_NF = 22226 |
| 161960 | CEFBS_In64BitMode, // XOR32rr_NF_ND = 22227 |
| 161961 | CEFBS_In64BitMode, // XOR32rr_NF_ND_REV = 22228 |
| 161962 | CEFBS_In64BitMode, // XOR32rr_NF_REV = 22229 |
| 161963 | CEFBS_None, // XOR32rr_REV = 22230 |
| 161964 | CEFBS_None, // XOR64i32 = 22231 |
| 161965 | CEFBS_In64BitMode, // XOR64mi32 = 22232 |
| 161966 | CEFBS_In64BitMode, // XOR64mi32_EVEX = 22233 |
| 161967 | CEFBS_In64BitMode, // XOR64mi32_ND = 22234 |
| 161968 | CEFBS_In64BitMode, // XOR64mi32_NF = 22235 |
| 161969 | CEFBS_In64BitMode, // XOR64mi32_NF_ND = 22236 |
| 161970 | CEFBS_In64BitMode, // XOR64mi8 = 22237 |
| 161971 | CEFBS_In64BitMode, // XOR64mi8_EVEX = 22238 |
| 161972 | CEFBS_In64BitMode, // XOR64mi8_ND = 22239 |
| 161973 | CEFBS_In64BitMode, // XOR64mi8_NF = 22240 |
| 161974 | CEFBS_In64BitMode, // XOR64mi8_NF_ND = 22241 |
| 161975 | CEFBS_None, // XOR64mr = 22242 |
| 161976 | CEFBS_In64BitMode, // XOR64mr_EVEX = 22243 |
| 161977 | CEFBS_In64BitMode, // XOR64mr_ND = 22244 |
| 161978 | CEFBS_In64BitMode, // XOR64mr_NF = 22245 |
| 161979 | CEFBS_In64BitMode, // XOR64mr_NF_ND = 22246 |
| 161980 | CEFBS_None, // XOR64ri32 = 22247 |
| 161981 | CEFBS_In64BitMode, // XOR64ri32_EVEX = 22248 |
| 161982 | CEFBS_In64BitMode, // XOR64ri32_ND = 22249 |
| 161983 | CEFBS_In64BitMode, // XOR64ri32_NF = 22250 |
| 161984 | CEFBS_In64BitMode, // XOR64ri32_NF_ND = 22251 |
| 161985 | CEFBS_None, // XOR64ri8 = 22252 |
| 161986 | CEFBS_In64BitMode, // XOR64ri8_EVEX = 22253 |
| 161987 | CEFBS_In64BitMode, // XOR64ri8_ND = 22254 |
| 161988 | CEFBS_In64BitMode, // XOR64ri8_NF = 22255 |
| 161989 | CEFBS_In64BitMode, // XOR64ri8_NF_ND = 22256 |
| 161990 | CEFBS_None, // XOR64rm = 22257 |
| 161991 | CEFBS_In64BitMode, // XOR64rm_EVEX = 22258 |
| 161992 | CEFBS_In64BitMode, // XOR64rm_ND = 22259 |
| 161993 | CEFBS_In64BitMode, // XOR64rm_NF = 22260 |
| 161994 | CEFBS_In64BitMode, // XOR64rm_NF_ND = 22261 |
| 161995 | CEFBS_None, // XOR64rr = 22262 |
| 161996 | CEFBS_In64BitMode, // XOR64rr_EVEX = 22263 |
| 161997 | CEFBS_In64BitMode, // XOR64rr_EVEX_REV = 22264 |
| 161998 | CEFBS_In64BitMode, // XOR64rr_ND = 22265 |
| 161999 | CEFBS_In64BitMode, // XOR64rr_ND_REV = 22266 |
| 162000 | CEFBS_In64BitMode, // XOR64rr_NF = 22267 |
| 162001 | CEFBS_In64BitMode, // XOR64rr_NF_ND = 22268 |
| 162002 | CEFBS_In64BitMode, // XOR64rr_NF_ND_REV = 22269 |
| 162003 | CEFBS_In64BitMode, // XOR64rr_NF_REV = 22270 |
| 162004 | CEFBS_None, // XOR64rr_REV = 22271 |
| 162005 | CEFBS_None, // XOR8i8 = 22272 |
| 162006 | CEFBS_None, // XOR8mi = 22273 |
| 162007 | CEFBS_Not64BitMode, // XOR8mi8 = 22274 |
| 162008 | CEFBS_In64BitMode, // XOR8mi_EVEX = 22275 |
| 162009 | CEFBS_In64BitMode, // XOR8mi_ND = 22276 |
| 162010 | CEFBS_In64BitMode, // XOR8mi_NF = 22277 |
| 162011 | CEFBS_In64BitMode, // XOR8mi_NF_ND = 22278 |
| 162012 | CEFBS_None, // XOR8mr = 22279 |
| 162013 | CEFBS_In64BitMode, // XOR8mr_EVEX = 22280 |
| 162014 | CEFBS_In64BitMode, // XOR8mr_ND = 22281 |
| 162015 | CEFBS_In64BitMode, // XOR8mr_NF = 22282 |
| 162016 | CEFBS_In64BitMode, // XOR8mr_NF_ND = 22283 |
| 162017 | CEFBS_None, // XOR8ri = 22284 |
| 162018 | CEFBS_Not64BitMode, // XOR8ri8 = 22285 |
| 162019 | CEFBS_In64BitMode, // XOR8ri_EVEX = 22286 |
| 162020 | CEFBS_In64BitMode, // XOR8ri_ND = 22287 |
| 162021 | CEFBS_In64BitMode, // XOR8ri_NF = 22288 |
| 162022 | CEFBS_In64BitMode, // XOR8ri_NF_ND = 22289 |
| 162023 | CEFBS_None, // XOR8rm = 22290 |
| 162024 | CEFBS_In64BitMode, // XOR8rm_EVEX = 22291 |
| 162025 | CEFBS_In64BitMode, // XOR8rm_ND = 22292 |
| 162026 | CEFBS_In64BitMode, // XOR8rm_NF = 22293 |
| 162027 | CEFBS_In64BitMode, // XOR8rm_NF_ND = 22294 |
| 162028 | CEFBS_None, // XOR8rr = 22295 |
| 162029 | CEFBS_In64BitMode, // XOR8rr_EVEX = 22296 |
| 162030 | CEFBS_In64BitMode, // XOR8rr_EVEX_REV = 22297 |
| 162031 | CEFBS_In64BitMode, // XOR8rr_ND = 22298 |
| 162032 | CEFBS_In64BitMode, // XOR8rr_ND_REV = 22299 |
| 162033 | CEFBS_In64BitMode, // XOR8rr_NF = 22300 |
| 162034 | CEFBS_In64BitMode, // XOR8rr_NF_ND = 22301 |
| 162035 | CEFBS_In64BitMode, // XOR8rr_NF_ND_REV = 22302 |
| 162036 | CEFBS_In64BitMode, // XOR8rr_NF_REV = 22303 |
| 162037 | CEFBS_None, // XOR8rr_NOREX = 22304 |
| 162038 | CEFBS_None, // XOR8rr_REV = 22305 |
| 162039 | CEFBS_None, // XORPDrm = 22306 |
| 162040 | CEFBS_None, // XORPDrr = 22307 |
| 162041 | CEFBS_None, // XORPSrm = 22308 |
| 162042 | CEFBS_None, // XORPSrr = 22309 |
| 162043 | CEFBS_None, // XRELEASE_PREFIX = 22310 |
| 162044 | CEFBS_None, // XRESLDTRK = 22311 |
| 162045 | CEFBS_None, // XRSTOR = 22312 |
| 162046 | CEFBS_In64BitMode, // XRSTOR64 = 22313 |
| 162047 | CEFBS_None, // XRSTORS = 22314 |
| 162048 | CEFBS_In64BitMode, // XRSTORS64 = 22315 |
| 162049 | CEFBS_None, // XSAVE = 22316 |
| 162050 | CEFBS_In64BitMode, // XSAVE64 = 22317 |
| 162051 | CEFBS_None, // XSAVEC = 22318 |
| 162052 | CEFBS_In64BitMode, // XSAVEC64 = 22319 |
| 162053 | CEFBS_None, // XSAVEOPT = 22320 |
| 162054 | CEFBS_In64BitMode, // XSAVEOPT64 = 22321 |
| 162055 | CEFBS_None, // XSAVES = 22322 |
| 162056 | CEFBS_In64BitMode, // XSAVES64 = 22323 |
| 162057 | CEFBS_None, // XSETBV = 22324 |
| 162058 | CEFBS_None, // XSHA1 = 22325 |
| 162059 | CEFBS_None, // XSHA256 = 22326 |
| 162060 | CEFBS_None, // XSTORE = 22327 |
| 162061 | CEFBS_None, // XSUSLDTRK = 22328 |
| 162062 | CEFBS_None, // XTEST = 22329 |
| 162063 | }; |
| 162064 | |
| 162065 | assert(Opcode < 22330); |
| 162066 | return FeatureBitsets[RequiredFeaturesRefs[Opcode]]; |
| 162067 | } |
| 162068 | |
| 162069 | } // end namespace llvm::X86_MC |
| 162070 | #endif // GET_COMPUTE_FEATURES |
| 162071 | |
| 162072 | #ifdef GET_AVAILABLE_OPCODE_CHECKER |
| 162073 | #undef GET_AVAILABLE_OPCODE_CHECKER |
| 162074 | namespace llvm::X86_MC { |
| 162075 | bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) { |
| 162076 | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
| 162077 | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
| 162078 | FeatureBitset MissingFeatures = |
| 162079 | (AvailableFeatures & RequiredFeatures) ^ |
| 162080 | RequiredFeatures; |
| 162081 | return !MissingFeatures.any(); |
| 162082 | } |
| 162083 | } // end namespace llvm::X86_MC |
| 162084 | #endif // GET_AVAILABLE_OPCODE_CHECKER |
| 162085 | |
| 162086 | #ifdef ENABLE_INSTR_PREDICATE_VERIFIER |
| 162087 | #undef ENABLE_INSTR_PREDICATE_VERIFIER |
| 162088 | #include <sstream> |
| 162089 | |
| 162090 | namespace llvm::X86_MC { |
| 162091 | #ifndef NDEBUG |
| 162092 | static const char *SubtargetFeatureNames[] = { |
| 162093 | "Feature_In16BitMode", |
| 162094 | "Feature_In32BitMode", |
| 162095 | "Feature_In64BitMode", |
| 162096 | "Feature_Not16BitMode", |
| 162097 | "Feature_Not64BitMode", |
| 162098 | nullptr |
| 162099 | }; |
| 162100 | |
| 162101 | #endif // NDEBUG |
| 162102 | |
| 162103 | void verifyInstructionPredicates( |
| 162104 | unsigned Opcode, const FeatureBitset &Features) { |
| 162105 | #ifndef NDEBUG |
| 162106 | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
| 162107 | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
| 162108 | FeatureBitset MissingFeatures = |
| 162109 | (AvailableFeatures & RequiredFeatures) ^ |
| 162110 | RequiredFeatures; |
| 162111 | if (MissingFeatures.any()) { |
| 162112 | std::ostringstream Msg; |
| 162113 | Msg << "Attempting to emit "<< &X86InstrNameData[X86InstrNameIndices[Opcode]] |
| 162114 | << " instruction but the "; |
| 162115 | for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i) |
| 162116 | if (MissingFeatures.test(i)) |
| 162117 | Msg << SubtargetFeatureNames[i] << " "; |
| 162118 | Msg << "predicate(s) are not met"; |
| 162119 | report_fatal_error(Msg.str().c_str()); |
| 162120 | } |
| 162121 | #endif // NDEBUG |
| 162122 | } |
| 162123 | } // end namespace llvm::X86_MC |
| 162124 | #endif // ENABLE_INSTR_PREDICATE_VERIFIER |
| 162125 | |
| 162126 |
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