1//===--- CSKY.cpp - Implement CSKY target feature support -----------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements CSKY TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#include "CSKY.h"
14
15using namespace clang;
16using namespace clang::targets;
17
18bool CSKYTargetInfo::isValidCPUName(StringRef Name) const {
19 return llvm::CSKY::parseCPUArch(CPU: Name) != llvm::CSKY::ArchKind::INVALID;
20}
21
22bool CSKYTargetInfo::setCPU(const std::string &Name) {
23 llvm::CSKY::ArchKind archKind = llvm::CSKY::parseCPUArch(CPU: Name);
24 bool isValid = (archKind != llvm::CSKY::ArchKind::INVALID);
25
26 if (isValid) {
27 CPU = Name;
28 Arch = archKind;
29 }
30
31 return isValid;
32}
33
34void CSKYTargetInfo::getTargetDefines(const LangOptions &Opts,
35 MacroBuilder &Builder) const {
36 Builder.defineMacro(Name: "__csky__", Value: "2");
37 Builder.defineMacro(Name: "__CSKY__", Value: "2");
38 Builder.defineMacro(Name: "__ckcore__", Value: "2");
39 Builder.defineMacro(Name: "__CKCORE__", Value: "2");
40
41 Builder.defineMacro(Name: "__CSKYABI__", Value: ABI == "abiv2" ? "2" : "1");
42 Builder.defineMacro(Name: "__cskyabi__", Value: ABI == "abiv2" ? "2" : "1");
43
44 StringRef ArchName = "ck810";
45 StringRef CPUName = "ck810";
46
47 if (Arch != llvm::CSKY::ArchKind::INVALID) {
48 ArchName = llvm::CSKY::getArchName(AK: Arch);
49 CPUName = CPU;
50 }
51
52 Builder.defineMacro(Name: "__" + ArchName.upper() + "__");
53 Builder.defineMacro(Name: "__" + ArchName.lower() + "__");
54 if (ArchName != CPUName) {
55 Builder.defineMacro(Name: "__" + CPUName.upper() + "__");
56 Builder.defineMacro(Name: "__" + CPUName.lower() + "__");
57 }
58
59 // TODO: Add support for BE if BE was supported later
60 StringRef endian = "__cskyLE__";
61
62 Builder.defineMacro(Name: endian);
63 Builder.defineMacro(Name: endian.upper());
64 Builder.defineMacro(Name: endian.lower());
65
66 if (DSPV2) {
67 StringRef dspv2 = "__CSKY_DSPV2__";
68 Builder.defineMacro(Name: dspv2);
69 Builder.defineMacro(Name: dspv2.lower());
70 }
71
72 if (VDSPV2) {
73 StringRef vdspv2 = "__CSKY_VDSPV2__";
74 Builder.defineMacro(Name: vdspv2);
75 Builder.defineMacro(Name: vdspv2.lower());
76
77 if (HardFloat) {
78 StringRef vdspv2_f = "__CSKY_VDSPV2_F__";
79 Builder.defineMacro(Name: vdspv2_f);
80 Builder.defineMacro(Name: vdspv2_f.lower());
81 }
82 }
83 if (VDSPV1) {
84 StringRef vdspv1_64 = "__CSKY_VDSP64__";
85 StringRef vdspv1_128 = "__CSKY_VDSP128__";
86
87 Builder.defineMacro(Name: vdspv1_64);
88 Builder.defineMacro(Name: vdspv1_64.lower());
89 Builder.defineMacro(Name: vdspv1_128);
90 Builder.defineMacro(Name: vdspv1_128.lower());
91 }
92 if (is3E3R1) {
93 StringRef is3e3r1 = "__CSKY_3E3R1__";
94 Builder.defineMacro(Name: is3e3r1);
95 Builder.defineMacro(Name: is3e3r1.lower());
96 }
97}
98
99bool CSKYTargetInfo::hasFeature(StringRef Feature) const {
100 return llvm::StringSwitch<bool>(Feature)
101 .Case(S: "hard-float", Value: HardFloat)
102 .Case(S: "hard-float-abi", Value: HardFloatABI)
103 .Case(S: "fpuv2_sf", Value: FPUV2_SF)
104 .Case(S: "fpuv2_df", Value: FPUV2_DF)
105 .Case(S: "fpuv3_sf", Value: FPUV3_SF)
106 .Case(S: "fpuv3_df", Value: FPUV3_DF)
107 .Case(S: "vdspv2", Value: VDSPV2)
108 .Case(S: "dspv2", Value: DSPV2)
109 .Case(S: "vdspv1", Value: VDSPV1)
110 .Case(S: "3e3r1", Value: is3E3R1)
111 .Default(Value: false);
112}
113
114bool CSKYTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
115 DiagnosticsEngine &Diags) {
116 for (const auto &Feature : Features) {
117 if (Feature == "+hard-float")
118 HardFloat = true;
119 if (Feature == "+hard-float-abi")
120 HardFloatABI = true;
121 if (Feature == "+fpuv2_sf")
122 FPUV2_SF = true;
123 if (Feature == "+fpuv2_df")
124 FPUV2_DF = true;
125 if (Feature == "+fpuv3_sf")
126 FPUV3_SF = true;
127 if (Feature == "+fpuv3_df")
128 FPUV3_DF = true;
129 if (Feature == "+vdspv2")
130 VDSPV2 = true;
131 if (Feature == "+dspv2")
132 DSPV2 = true;
133 if (Feature == "+vdspv1")
134 VDSPV1 = true;
135 if (Feature == "+3e3r1")
136 is3E3R1 = true;
137 }
138
139 return true;
140}
141
142ArrayRef<const char *> CSKYTargetInfo::getGCCRegNames() const {
143 static const char *const GCCRegNames[] = {
144 // Integer registers
145 "r0",
146 "r1",
147 "r2",
148 "r3",
149 "r4",
150 "r5",
151 "r6",
152 "r7",
153 "r8",
154 "r9",
155 "r10",
156 "r11",
157 "r12",
158 "r13",
159 "r14",
160 "r15",
161 "r16",
162 "r17",
163 "r18",
164 "r19",
165 "r20",
166 "r21",
167 "r22",
168 "r23",
169 "r24",
170 "r25",
171 "r26",
172 "r27",
173 "r28",
174 "r29",
175 "r30",
176 "r31",
177
178 // Floating point registers
179 "fr0",
180 "fr1",
181 "fr2",
182 "fr3",
183 "fr4",
184 "fr5",
185 "fr6",
186 "fr7",
187 "fr8",
188 "fr9",
189 "fr10",
190 "fr11",
191 "fr12",
192 "fr13",
193 "fr14",
194 "fr15",
195 "fr16",
196 "fr17",
197 "fr18",
198 "fr19",
199 "fr20",
200 "fr21",
201 "fr22",
202 "fr23",
203 "fr24",
204 "fr25",
205 "fr26",
206 "fr27",
207 "fr28",
208 "fr29",
209 "fr30",
210 "fr31",
211
212 };
213 return llvm::ArrayRef(GCCRegNames);
214}
215
216ArrayRef<TargetInfo::GCCRegAlias> CSKYTargetInfo::getGCCRegAliases() const {
217 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
218 {.Aliases: {"a0"}, .Register: "r0"},
219 {.Aliases: {"a1"}, .Register: "r1"},
220 {.Aliases: {"a2"}, .Register: "r2"},
221 {.Aliases: {"a3"}, .Register: "r3"},
222 {.Aliases: {"l0"}, .Register: "r4"},
223 {.Aliases: {"l1"}, .Register: "r5"},
224 {.Aliases: {"l2"}, .Register: "r6"},
225 {.Aliases: {"l3"}, .Register: "r7"},
226 {.Aliases: {"l4"}, .Register: "r8"},
227 {.Aliases: {"l5"}, .Register: "r9"},
228 {.Aliases: {"l6"}, .Register: "r10"},
229 {.Aliases: {"l7"}, .Register: "r11"},
230 {.Aliases: {"t0"}, .Register: "r12"},
231 {.Aliases: {"t1"}, .Register: "r13"},
232 {.Aliases: {"sp"}, .Register: "r14"},
233 {.Aliases: {"lr"}, .Register: "r15"},
234 {.Aliases: {"l8"}, .Register: "r16"},
235 {.Aliases: {"l9"}, .Register: "r17"},
236 {.Aliases: {"t2"}, .Register: "r18"},
237 {.Aliases: {"t3"}, .Register: "r19"},
238 {.Aliases: {"t4"}, .Register: "r20"},
239 {.Aliases: {"t5"}, .Register: "r21"},
240 {.Aliases: {"t6"}, .Register: "r22"},
241 {.Aliases: {"t7", "fp"}, .Register: "r23"},
242 {.Aliases: {"t8", "top"}, .Register: "r24"},
243 {.Aliases: {"t9", "bsp"}, .Register: "r25"},
244 {.Aliases: {"r26"}, .Register: "r26"},
245 {.Aliases: {"r27"}, .Register: "r27"},
246 {.Aliases: {"gb", "rgb", "rdb"}, .Register: "r28"},
247 {.Aliases: {"tb", "rtb"}, .Register: "r29"},
248 {.Aliases: {"svbr"}, .Register: "r30"},
249 {.Aliases: {"tls"}, .Register: "r31"},
250
251 {.Aliases: {"vr0"}, .Register: "fr0"},
252 {.Aliases: {"vr1"}, .Register: "fr1"},
253 {.Aliases: {"vr2"}, .Register: "fr2"},
254 {.Aliases: {"vr3"}, .Register: "fr3"},
255 {.Aliases: {"vr4"}, .Register: "fr4"},
256 {.Aliases: {"vr5"}, .Register: "fr5"},
257 {.Aliases: {"vr6"}, .Register: "fr6"},
258 {.Aliases: {"vr7"}, .Register: "fr7"},
259 {.Aliases: {"vr8"}, .Register: "fr8"},
260 {.Aliases: {"vr9"}, .Register: "fr9"},
261 {.Aliases: {"vr10"}, .Register: "fr10"},
262 {.Aliases: {"vr11"}, .Register: "fr11"},
263 {.Aliases: {"vr12"}, .Register: "fr12"},
264 {.Aliases: {"vr13"}, .Register: "fr13"},
265 {.Aliases: {"vr14"}, .Register: "fr14"},
266 {.Aliases: {"vr15"}, .Register: "fr15"},
267 {.Aliases: {"vr16"}, .Register: "fr16"},
268 {.Aliases: {"vr17"}, .Register: "fr17"},
269 {.Aliases: {"vr18"}, .Register: "fr18"},
270 {.Aliases: {"vr19"}, .Register: "fr19"},
271 {.Aliases: {"vr20"}, .Register: "fr20"},
272 {.Aliases: {"vr21"}, .Register: "fr21"},
273 {.Aliases: {"vr22"}, .Register: "fr22"},
274 {.Aliases: {"vr23"}, .Register: "fr23"},
275 {.Aliases: {"vr24"}, .Register: "fr24"},
276 {.Aliases: {"vr25"}, .Register: "fr25"},
277 {.Aliases: {"vr26"}, .Register: "fr26"},
278 {.Aliases: {"vr27"}, .Register: "fr27"},
279 {.Aliases: {"vr28"}, .Register: "fr28"},
280 {.Aliases: {"vr29"}, .Register: "fr29"},
281 {.Aliases: {"vr30"}, .Register: "fr30"},
282 {.Aliases: {"vr31"}, .Register: "fr31"},
283
284 };
285 return llvm::ArrayRef(GCCRegAliases);
286}
287
288bool CSKYTargetInfo::validateAsmConstraint(
289 const char *&Name, TargetInfo::ConstraintInfo &Info) const {
290 switch (*Name) {
291 default:
292 return false;
293 case 'a':
294 case 'b':
295 case 'c':
296 case 'y':
297 case 'l':
298 case 'h':
299 case 'w':
300 case 'v': // A floating-point and vector register.
301 case 'z':
302 Info.setAllowsRegister();
303 return true;
304 }
305}
306
307unsigned CSKYTargetInfo::getMinGlobalAlign(uint64_t Size,
308 bool HasNonWeakDef) const {
309 if (Size >= 32)
310 return 32;
311 return 0;
312}
313