| 1 | //===- RegisterCoalescer.h - Register Coalescing Interface ------*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This file contains the abstract interface for register coalescers, |
| 10 | // allowing them to interact with and query register allocators. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef LLVM_LIB_CODEGEN_REGISTERCOALESCER_H |
| 15 | #define LLVM_LIB_CODEGEN_REGISTERCOALESCER_H |
| 16 | |
| 17 | #include "llvm/CodeGen/MachinePassManager.h" |
| 18 | #include "llvm/CodeGen/Register.h" |
| 19 | |
| 20 | namespace llvm { |
| 21 | |
| 22 | class MachineInstr; |
| 23 | class TargetRegisterClass; |
| 24 | class TargetRegisterInfo; |
| 25 | |
| 26 | /// A helper class for register coalescers. When deciding if |
| 27 | /// two registers can be coalesced, CoalescerPair can determine if a copy |
| 28 | /// instruction would become an identity copy after coalescing. |
| 29 | class CoalescerPair { |
| 30 | const TargetRegisterInfo &TRI; |
| 31 | |
| 32 | /// The register that will be left after coalescing. It can be a |
| 33 | /// virtual or physical register. |
| 34 | Register DstReg; |
| 35 | |
| 36 | /// The virtual register that will be coalesced into dstReg. |
| 37 | Register SrcReg; |
| 38 | |
| 39 | /// The sub-register index of the old DstReg in the new coalesced register. |
| 40 | unsigned DstIdx = 0; |
| 41 | |
| 42 | /// The sub-register index of the old SrcReg in the new coalesced register. |
| 43 | unsigned SrcIdx = 0; |
| 44 | |
| 45 | /// True when the original copy was a partial subregister copy. |
| 46 | bool Partial = false; |
| 47 | |
| 48 | /// True when both regs are virtual and newRC is constrained. |
| 49 | bool CrossClass = false; |
| 50 | |
| 51 | /// True when DstReg and SrcReg are reversed from the original |
| 52 | /// copy instruction. |
| 53 | bool Flipped = false; |
| 54 | |
| 55 | /// The register class of the coalesced register, or NULL if DstReg |
| 56 | /// is a physreg. This register class may be a super-register of both |
| 57 | /// SrcReg and DstReg. |
| 58 | const TargetRegisterClass *NewRC = nullptr; |
| 59 | |
| 60 | public: |
| 61 | CoalescerPair(const TargetRegisterInfo &tri) : TRI(tri) {} |
| 62 | |
| 63 | /// Create a CoalescerPair representing a virtreg-to-physreg copy. |
| 64 | /// No need to call setRegisters(). |
| 65 | CoalescerPair(Register VirtReg, MCRegister PhysReg, |
| 66 | const TargetRegisterInfo &tri) |
| 67 | : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg) {} |
| 68 | |
| 69 | /// Set registers to match the copy instruction MI. Return |
| 70 | /// false if MI is not a coalescable copy instruction. |
| 71 | bool setRegisters(const MachineInstr *); |
| 72 | |
| 73 | /// Swap SrcReg and DstReg. Return false if swapping is impossible |
| 74 | /// because DstReg is a physical register, or SubIdx is set. |
| 75 | bool flip(); |
| 76 | |
| 77 | /// Return true if MI is a copy instruction that will become |
| 78 | /// an identity copy after coalescing. |
| 79 | bool isCoalescable(const MachineInstr *) const; |
| 80 | |
| 81 | /// Return true if DstReg is a physical register. |
| 82 | bool isPhys() const { return !NewRC; } |
| 83 | |
| 84 | /// Return true if the original copy instruction did not copy |
| 85 | /// the full register, but was a subreg operation. |
| 86 | bool isPartial() const { return Partial; } |
| 87 | |
| 88 | /// Return true if DstReg is virtual and NewRC is a smaller |
| 89 | /// register class than DstReg's. |
| 90 | bool isCrossClass() const { return CrossClass; } |
| 91 | |
| 92 | /// Return true when getSrcReg is the register being defined by |
| 93 | /// the original copy instruction. |
| 94 | bool isFlipped() const { return Flipped; } |
| 95 | |
| 96 | /// Return the register (virtual or physical) that will remain |
| 97 | /// after coalescing. |
| 98 | Register getDstReg() const { return DstReg; } |
| 99 | |
| 100 | /// Return the virtual register that will be coalesced away. |
| 101 | Register getSrcReg() const { return SrcReg; } |
| 102 | |
| 103 | /// Return the subregister index that DstReg will be coalesced into, or 0. |
| 104 | unsigned getDstIdx() const { return DstIdx; } |
| 105 | |
| 106 | /// Return the subregister index that SrcReg will be coalesced into, or 0. |
| 107 | unsigned getSrcIdx() const { return SrcIdx; } |
| 108 | |
| 109 | /// Return the register class of the coalesced register. |
| 110 | const TargetRegisterClass *getNewRC() const { return NewRC; } |
| 111 | }; |
| 112 | |
| 113 | } // end namespace llvm |
| 114 | |
| 115 | #endif // LLVM_LIB_CODEGEN_REGISTERCOALESCER_H |
| 116 | |