1//===--------------------- SIFrameLowering.h --------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
10#define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
11
12#include "AMDGPUFrameLowering.h"
13#include "SIRegisterInfo.h"
14
15namespace llvm {
16
17class SIFrameLowering final : public AMDGPUFrameLowering {
18public:
19 SIFrameLowering(StackDirection D, Align StackAl, int LAO,
20 Align TransAl = Align(1))
21 : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
22 ~SIFrameLowering() override = default;
23
24 void emitEntryFunctionPrologue(MachineFunction &MF,
25 MachineBasicBlock &MBB) const;
26 void emitPrologue(MachineFunction &MF,
27 MachineBasicBlock &MBB) const override;
28 void emitEpilogue(MachineFunction &MF,
29 MachineBasicBlock &MBB) const override;
30 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
31 Register &FrameReg) const override;
32
33 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
34 RegScavenger *RS = nullptr) const override;
35 void determineCalleeSavesSGPR(MachineFunction &MF, BitVector &SavedRegs,
36 RegScavenger *RS = nullptr) const;
37 void determinePrologEpilogSGPRSaves(MachineFunction &MF, BitVector &SavedRegs,
38 bool NeedExecCopyReservedReg) const;
39 void emitCSRSpillStores(MachineFunction &MF, MachineBasicBlock &MBB,
40 MachineBasicBlock::iterator MBBI, DebugLoc &DL,
41 LiveRegUnits &LiveUnits, Register FrameReg,
42 Register FramePtrRegScratchCopy) const;
43 void emitCSRSpillRestores(MachineFunction &MF, MachineBasicBlock &MBB,
44 MachineBasicBlock::iterator MBBI, DebugLoc &DL,
45 LiveRegUnits &LiveUnits, Register FrameReg,
46 Register FramePtrRegScratchCopy) const;
47 bool
48 assignCalleeSavedSpillSlots(MachineFunction &MF,
49 const TargetRegisterInfo *TRI,
50 std::vector<CalleeSavedInfo> &CSI) const override;
51
52 bool assignCalleeSavedSpillSlots(MachineFunction &MF,
53 const TargetRegisterInfo *TRI,
54 std::vector<CalleeSavedInfo> &CSI,
55 unsigned &MinCSFrameIndex,
56 unsigned &MaxCSFrameIndex) const override;
57
58 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
59 MachineBasicBlock::iterator MI,
60 ArrayRef<CalleeSavedInfo> CSI,
61 const TargetRegisterInfo *TRI) const override;
62
63 bool
64 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
65 MachineBasicBlock::iterator MI,
66 MutableArrayRef<CalleeSavedInfo> CSI,
67 const TargetRegisterInfo *TRI) const override;
68
69 bool allocateScavengingFrameIndexesNearIncomingSP(
70 const MachineFunction &MF) const override;
71
72 bool isSupportedStackID(TargetStackID::Value ID) const override;
73
74 void processFunctionBeforeFrameFinalized(
75 MachineFunction &MF,
76 RegScavenger *RS = nullptr) const override;
77
78 void processFunctionBeforeFrameIndicesReplaced(
79 MachineFunction &MF, RegScavenger *RS = nullptr) const override;
80
81 MachineBasicBlock::iterator
82 eliminateCallFramePseudoInstr(MachineFunction &MF,
83 MachineBasicBlock &MBB,
84 MachineBasicBlock::iterator MI) const override;
85
86protected:
87 bool hasFPImpl(const MachineFunction &MF) const override;
88
89private:
90 void emitEntryFunctionFlatScratchInit(MachineFunction &MF,
91 MachineBasicBlock &MBB,
92 MachineBasicBlock::iterator I,
93 const DebugLoc &DL,
94 Register ScratchWaveOffsetReg) const;
95
96 Register getEntryFunctionReservedScratchRsrcReg(MachineFunction &MF) const;
97
98 void emitEntryFunctionScratchRsrcRegSetup(
99 MachineFunction &MF, MachineBasicBlock &MBB,
100 MachineBasicBlock::iterator I, const DebugLoc &DL,
101 Register PreloadedPrivateBufferReg, Register ScratchRsrcReg,
102 Register ScratchWaveOffsetReg) const;
103
104public:
105 bool requiresStackPointerReference(const MachineFunction &MF) const;
106
107 // Returns true if the function may need to reserve space on the stack for the
108 // CWSR trap handler.
109 bool mayReserveScratchForCWSR(const MachineFunction &MF) const;
110};
111
112} // end namespace llvm
113
114#endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
115