1//===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the Thumb-1 implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
14#define LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
15
16#include "ARMBaseInstrInfo.h"
17#include "ThumbRegisterInfo.h"
18
19namespace llvm {
20 class ARMSubtarget;
21
22class Thumb1InstrInfo : public ARMBaseInstrInfo {
23 ThumbRegisterInfo RI;
24public:
25 explicit Thumb1InstrInfo(const ARMSubtarget &STI);
26
27 /// Return the noop instruction to use for a noop.
28 MCInst getNop() const override;
29
30 // Return the non-pre/post incrementing version of 'Opc'. Return 0
31 // if there is not such an opcode.
32 unsigned getUnindexedOpcode(unsigned Opc) const override;
33
34 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
35 /// such, whenever a client has an instance of instruction info, it should
36 /// always be able to get register info as well (through this method).
37 ///
38 const ThumbRegisterInfo &getRegisterInfo() const override { return RI; }
39
40 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
41 const DebugLoc &DL, Register DestReg, Register SrcReg,
42 bool KillSrc, bool RenamableDest = false,
43 bool RenamableSrc = false) const override;
44 void storeRegToStackSlot(
45 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg,
46 bool isKill, int FrameIndex, const TargetRegisterClass *RC,
47 const TargetRegisterInfo *TRI, Register VReg,
48 MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
49
50 void loadRegFromStackSlot(
51 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
52 Register DestReg, int FrameIndex, const TargetRegisterClass *RC,
53 const TargetRegisterInfo *TRI, Register VReg,
54 MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
55
56 bool canCopyGluedNodeDuringSchedule(SDNode *N) const override;
57private:
58 void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
59};
60}
61
62#endif
63