1//===-- ARMBaseInfo.cpp - ARM Base encoding information------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file provides basic encoding and assembly information for ARM.
10//
11//===----------------------------------------------------------------------===//
12#include "ARMBaseInfo.h"
13
14using namespace llvm;
15namespace llvm {
16ARM::PredBlockMask expandPredBlockMask(ARM::PredBlockMask BlockMask,
17 ARMVCC::VPTCodes Kind) {
18 using PredBlockMask = ARM::PredBlockMask;
19 assert(Kind != ARMVCC::None && "Cannot expand a mask with None!");
20 assert(llvm::countr_zero((unsigned)BlockMask) != 0 && "Mask is already full");
21
22 auto ChooseMask = [&](PredBlockMask AddedThen, PredBlockMask AddedElse) {
23 return Kind == ARMVCC::Then ? AddedThen : AddedElse;
24 };
25
26 switch (BlockMask) {
27 case PredBlockMask::T:
28 return ChooseMask(PredBlockMask::TT, PredBlockMask::TE);
29 case PredBlockMask::TT:
30 return ChooseMask(PredBlockMask::TTT, PredBlockMask::TTE);
31 case PredBlockMask::TE:
32 return ChooseMask(PredBlockMask::TET, PredBlockMask::TEE);
33 case PredBlockMask::TTT:
34 return ChooseMask(PredBlockMask::TTTT, PredBlockMask::TTTE);
35 case PredBlockMask::TTE:
36 return ChooseMask(PredBlockMask::TTET, PredBlockMask::TTEE);
37 case PredBlockMask::TET:
38 return ChooseMask(PredBlockMask::TETT, PredBlockMask::TETE);
39 case PredBlockMask::TEE:
40 return ChooseMask(PredBlockMask::TEET, PredBlockMask::TEEE);
41 default:
42 llvm_unreachable("Unknown Mask");
43 }
44}
45
46namespace ARMSysReg {
47
48// lookup system register using 12-bit SYSm value.
49// Note: the search is uniqued using M1 mask
50const MClassSysReg *lookupMClassSysRegBy12bitSYSmValue(unsigned SYSm) {
51 return lookupMClassSysRegByM1Encoding12(M1Encoding12: SYSm);
52}
53
54// returns APSR with _<bits> qualifier.
55// Note: ARMv7-M deprecates using MSR APSR without a _<bits> qualifier
56const MClassSysReg *lookupMClassSysRegAPSRNonDeprecated(unsigned SYSm) {
57 return lookupMClassSysRegByM2M3Encoding8(M2M3Encoding8: (1<<9)|(SYSm & 0xFF));
58}
59
60// lookup system registers using 8-bit SYSm value
61const MClassSysReg *lookupMClassSysRegBy8bitSYSmValue(unsigned SYSm) {
62 return ARMSysReg::lookupMClassSysRegByM2M3Encoding8(M2M3Encoding8: (1<<8)|(SYSm & 0xFF));
63}
64
65#define GET_MClassSysRegsList_IMPL
66#include "ARMGenSystemRegister.inc"
67
68} // end namespace ARMSysReg
69
70namespace ARMBankedReg {
71#define GET_BankedRegsList_IMPL
72#include "ARMGenSystemRegister.inc"
73} // end namespce ARMSysReg
74} // end namespace llvm
75