1//=- HexagonMachineFunctionInfo.h - Hexagon machine function info -*- C++ -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H
10#define LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H
11
12#include "llvm/CodeGen/MachineFunction.h"
13#include <map>
14
15namespace llvm {
16
17namespace Hexagon {
18
19 const unsigned int StartPacket = 0x1;
20 const unsigned int EndPacket = 0x2;
21
22} // end namespace Hexagon
23
24/// Hexagon target-specific information for each MachineFunction.
25class HexagonMachineFunctionInfo : public MachineFunctionInfo {
26 // SRetReturnReg - Some subtargets require that sret lowering includes
27 // returning the value of the returned struct in a register. This field
28 // holds the virtual register into which the sret argument is passed.
29 unsigned SRetReturnReg = 0;
30 Register StackAlignBaseReg = 0; // Aligned-stack base register
31 int VarArgsFrameIndex;
32 int RegSavedAreaStartFrameIndex;
33 int FirstNamedArgFrameIndex;
34 int LastNamedArgFrameIndex;
35 bool HasClobberLR = false;
36 bool HasEHReturn = false;
37 std::map<const MachineInstr*, unsigned> PacketInfo;
38 virtual void anchor();
39
40public:
41 HexagonMachineFunctionInfo() = default;
42
43 HexagonMachineFunctionInfo(const Function &F,
44 const TargetSubtargetInfo *STI) {}
45
46 MachineFunctionInfo *
47 clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF,
48 const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
49 const override;
50
51 unsigned getSRetReturnReg() const { return SRetReturnReg; }
52 void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; }
53
54 void setVarArgsFrameIndex(int v) { VarArgsFrameIndex = v; }
55 int getVarArgsFrameIndex() { return VarArgsFrameIndex; }
56
57 void setRegSavedAreaStartFrameIndex(int v) { RegSavedAreaStartFrameIndex = v;}
58 int getRegSavedAreaStartFrameIndex() { return RegSavedAreaStartFrameIndex; }
59
60 void setFirstNamedArgFrameIndex(int v) { FirstNamedArgFrameIndex = v; }
61 int getFirstNamedArgFrameIndex() { return FirstNamedArgFrameIndex; }
62
63 void setLastNamedArgFrameIndex(int v) { LastNamedArgFrameIndex = v; }
64 int getLastNamedArgFrameIndex() { return LastNamedArgFrameIndex; }
65
66 void setStartPacket(MachineInstr* MI) {
67 PacketInfo[MI] |= Hexagon::StartPacket;
68 }
69 void setEndPacket(MachineInstr* MI) {
70 PacketInfo[MI] |= Hexagon::EndPacket;
71 }
72 bool isStartPacket(const MachineInstr* MI) const {
73 auto It = PacketInfo.find(x: MI);
74 return It != PacketInfo.end() && (It->second & Hexagon::StartPacket);
75 }
76 bool isEndPacket(const MachineInstr* MI) const {
77 auto It = PacketInfo.find(x: MI);
78 return It != PacketInfo.end() && (It->second & Hexagon::EndPacket);
79 }
80 void setHasClobberLR(bool v) { HasClobberLR = v; }
81 bool hasClobberLR() const { return HasClobberLR; }
82
83 bool hasEHReturn() const { return HasEHReturn; };
84 void setHasEHReturn(bool H = true) { HasEHReturn = H; };
85
86 void setStackAlignBaseReg(Register R) { StackAlignBaseReg = R; }
87 Register getStackAlignBaseReg() const { return StackAlignBaseReg; }
88};
89
90} // end namespace llvm
91
92#endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H
93