1//===- HexagonMCCodeEmitter.h - Hexagon Target Descriptions -----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// Definition for classes that emit Hexagon machine code from MCInsts
11///
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCODEEMITTER_H
15#define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCODEEMITTER_H
16
17#include "MCTargetDesc/HexagonFixupKinds.h"
18#include "MCTargetDesc/HexagonMCExpr.h"
19#include "llvm/MC/MCCodeEmitter.h"
20#include "llvm/MC/MCExpr.h"
21#include "llvm/TargetParser/SubtargetFeature.h"
22#include <cstddef>
23#include <cstdint>
24#include <memory>
25
26namespace llvm {
27
28class MCContext;
29class MCInst;
30class MCInstrInfo;
31class MCOperand;
32class MCSubtargetInfo;
33class raw_ostream;
34
35class HexagonMCCodeEmitter : public MCCodeEmitter {
36 MCContext &MCT;
37 MCInstrInfo const &MCII;
38
39 // A mutable state of the emitter when encoding bundles and duplexes.
40 struct EmitterState {
41 unsigned Addend = 0;
42 bool Extended = false;
43 bool SubInst1 = false;
44 const MCInst *Bundle = nullptr;
45 size_t Index = 0;
46 };
47 mutable EmitterState State;
48
49public:
50 HexagonMCCodeEmitter(MCInstrInfo const &MII, MCContext &MCT)
51 : MCT(MCT), MCII(MII) {}
52
53 void encodeInstruction(MCInst const &MI, SmallVectorImpl<char> &CB,
54 SmallVectorImpl<MCFixup> &Fixups,
55 MCSubtargetInfo const &STI) const override;
56
57 void encodeSingleInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
58 SmallVectorImpl<MCFixup> &Fixups,
59 const MCSubtargetInfo &STI,
60 uint32_t Parse) const;
61
62 // TableGen'erated function for getting the
63 // binary encoding for an instruction.
64 uint64_t getBinaryCodeForInstr(MCInst const &MI,
65 SmallVectorImpl<MCFixup> &Fixups,
66 MCSubtargetInfo const &STI) const;
67
68 /// Return binary encoding of operand.
69 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
70 SmallVectorImpl<MCFixup> &Fixups,
71 MCSubtargetInfo const &STI) const;
72
73private:
74 // helper routine for getMachineOpValue()
75 unsigned getExprOpValue(const MCInst &MI, const MCOperand &MO,
76 const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups,
77 const MCSubtargetInfo &STI) const;
78
79 Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI,
80 const MCOperand &MO,
81 HexagonMCExpr::VariantKind Kind) const;
82
83 // Return parse bits for instruction `MCI' inside bundle `MCB'
84 uint32_t parseBits(size_t Last, MCInst const &MCB, MCInst const &MCI) const;
85};
86
87} // end namespace llvm
88
89#endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCODEEMITTER_H
90