| 1 | //===-- LoongArchTargetTransformInfo.cpp - LoongArch specific TTI ---------===// |
|---|---|
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | /// \file |
| 9 | /// This file implements a TargetTransformInfo analysis pass specific to the |
| 10 | /// LoongArch target machine. It uses the target's detailed information to |
| 11 | /// provide more precise answers to certain TTI queries, while letting the |
| 12 | /// target independent and default TTI implementations handle the rest. |
| 13 | /// |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | #include "LoongArchTargetTransformInfo.h" |
| 17 | |
| 18 | using namespace llvm; |
| 19 | |
| 20 | #define DEBUG_TYPE "loongarchtti" |
| 21 | |
| 22 | TypeSize LoongArchTTIImpl::getRegisterBitWidth( |
| 23 | TargetTransformInfo::RegisterKind K) const { |
| 24 | TypeSize DefSize = TargetTransformInfoImplBase::getRegisterBitWidth(K); |
| 25 | switch (K) { |
| 26 | case TargetTransformInfo::RGK_Scalar: |
| 27 | return TypeSize::getFixed(ExactSize: ST->is64Bit() ? 64 : 32); |
| 28 | case TargetTransformInfo::RGK_FixedWidthVector: |
| 29 | if (ST->hasExtLASX()) |
| 30 | return TypeSize::getFixed(ExactSize: 256); |
| 31 | if (ST->hasExtLSX()) |
| 32 | return TypeSize::getFixed(ExactSize: 128); |
| 33 | [[fallthrough]]; |
| 34 | case TargetTransformInfo::RGK_ScalableVector: |
| 35 | return DefSize; |
| 36 | } |
| 37 | |
| 38 | llvm_unreachable("Unsupported register kind"); |
| 39 | } |
| 40 | |
| 41 | unsigned LoongArchTTIImpl::getNumberOfRegisters(unsigned ClassID) const { |
| 42 | switch (ClassID) { |
| 43 | case LoongArchRegisterClass::GPRRC: |
| 44 | // 30 = 32 GPRs - r0 (zero register) - r21 (non-allocatable) |
| 45 | return 30; |
| 46 | case LoongArchRegisterClass::FPRRC: |
| 47 | return ST->hasBasicF() ? 32 : 0; |
| 48 | case LoongArchRegisterClass::VRRC: |
| 49 | return ST->hasExtLSX() ? 32 : 0; |
| 50 | } |
| 51 | llvm_unreachable("unknown register class"); |
| 52 | } |
| 53 | |
| 54 | unsigned LoongArchTTIImpl::getRegisterClassForType(bool Vector, |
| 55 | Type *Ty) const { |
| 56 | if (Vector) |
| 57 | return LoongArchRegisterClass::VRRC; |
| 58 | if (!Ty) |
| 59 | return LoongArchRegisterClass::GPRRC; |
| 60 | |
| 61 | Type *ScalarTy = Ty->getScalarType(); |
| 62 | if ((ScalarTy->isFloatTy() && ST->hasBasicF()) || |
| 63 | (ScalarTy->isDoubleTy() && ST->hasBasicD())) { |
| 64 | return LoongArchRegisterClass::FPRRC; |
| 65 | } |
| 66 | |
| 67 | return LoongArchRegisterClass::GPRRC; |
| 68 | } |
| 69 | |
| 70 | unsigned LoongArchTTIImpl::getMaxInterleaveFactor(ElementCount VF) const { |
| 71 | return ST->getMaxInterleaveFactor(); |
| 72 | } |
| 73 | |
| 74 | const char *LoongArchTTIImpl::getRegisterClassName(unsigned ClassID) const { |
| 75 | switch (ClassID) { |
| 76 | case LoongArchRegisterClass::GPRRC: |
| 77 | return "LoongArch::GPRRC"; |
| 78 | case LoongArchRegisterClass::FPRRC: |
| 79 | return "LoongArch::FPRRC"; |
| 80 | case LoongArchRegisterClass::VRRC: |
| 81 | return "LoongArch::VRRC"; |
| 82 | } |
| 83 | llvm_unreachable("unknown register class"); |
| 84 | } |
| 85 | |
| 86 | TargetTransformInfo::PopcntSupportKind |
| 87 | LoongArchTTIImpl::getPopcntSupport(unsigned TyWidth) const { |
| 88 | assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2"); |
| 89 | return ST->hasExtLSX() ? TTI::PSK_FastHardware : TTI::PSK_Software; |
| 90 | } |
| 91 | |
| 92 | unsigned LoongArchTTIImpl::getCacheLineSize() const { return 64; } |
| 93 | |
| 94 | unsigned LoongArchTTIImpl::getPrefetchDistance() const { return 200; } |
| 95 | |
| 96 | bool LoongArchTTIImpl::enableWritePrefetching() const { return true; } |
| 97 | |
| 98 | // TODO: Implement more hooks to provide TTI machinery for LoongArch. |
| 99 |