| 1 | //===- LoongArchInstPrinter.cpp - Convert LoongArch MCInst to asm syntax --===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This class prints an LoongArch MCInst to a .s file. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #include "LoongArchInstPrinter.h" |
| 14 | #include "LoongArchMCTargetDesc.h" |
| 15 | #include "llvm/MC/MCAsmInfo.h" |
| 16 | #include "llvm/MC/MCInst.h" |
| 17 | #include "llvm/MC/MCSubtargetInfo.h" |
| 18 | #include "llvm/MC/MCSymbol.h" |
| 19 | #include "llvm/Support/CommandLine.h" |
| 20 | using namespace llvm; |
| 21 | |
| 22 | #define DEBUG_TYPE "loongarch-asm-printer" |
| 23 | |
| 24 | // Include the auto-generated portion of the assembly writer. |
| 25 | #define PRINT_ALIAS_INSTR |
| 26 | #include "LoongArchGenAsmWriter.inc" |
| 27 | |
| 28 | static cl::opt<bool> |
| 29 | NoAliases("loongarch-no-aliases" , |
| 30 | cl::desc("Disable the emission of assembler pseudo instructions" ), |
| 31 | cl::init(Val: false), cl::Hidden); |
| 32 | |
| 33 | static cl::opt<bool> |
| 34 | NumericReg("loongarch-numeric-reg" , |
| 35 | cl::desc("Print numeric register names rather than the ABI " |
| 36 | "names (such as $r0 instead of $zero)" ), |
| 37 | cl::init(Val: false), cl::Hidden); |
| 38 | |
| 39 | // The command-line flag above is used by llvm-mc and llc. It can be used by |
| 40 | // `llvm-objdump`, but we override the value here to handle options passed to |
| 41 | // `llvm-objdump` with `-M` (which matches GNU objdump). There did not seem to |
| 42 | // be an easier way to allow these options in all these tools, without doing it |
| 43 | // this way. |
| 44 | bool LoongArchInstPrinter::applyTargetSpecificCLOption(StringRef Opt) { |
| 45 | if (Opt == "no-aliases" ) { |
| 46 | PrintAliases = false; |
| 47 | return true; |
| 48 | } |
| 49 | |
| 50 | if (Opt == "numeric" ) { |
| 51 | NumericReg = true; |
| 52 | return true; |
| 53 | } |
| 54 | |
| 55 | return false; |
| 56 | } |
| 57 | |
| 58 | void LoongArchInstPrinter::printInst(const MCInst *MI, uint64_t Address, |
| 59 | StringRef Annot, |
| 60 | const MCSubtargetInfo &STI, |
| 61 | raw_ostream &O) { |
| 62 | if (!PrintAliases || NoAliases || !printAliasInstr(MI, Address, STI, OS&: O)) |
| 63 | printInstruction(MI, Address, STI, O); |
| 64 | printAnnotation(OS&: O, Annot); |
| 65 | } |
| 66 | |
| 67 | void LoongArchInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) { |
| 68 | O << '$' << getRegisterName(Reg); |
| 69 | } |
| 70 | |
| 71 | void LoongArchInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, |
| 72 | const MCSubtargetInfo &STI, |
| 73 | raw_ostream &O) { |
| 74 | const MCOperand &MO = MI->getOperand(i: OpNo); |
| 75 | |
| 76 | if (MO.isReg()) { |
| 77 | printRegName(O, Reg: MO.getReg()); |
| 78 | return; |
| 79 | } |
| 80 | |
| 81 | if (MO.isImm()) { |
| 82 | O << MO.getImm(); |
| 83 | return; |
| 84 | } |
| 85 | |
| 86 | assert(MO.isExpr() && "Unknown operand kind in printOperand" ); |
| 87 | MAI.printExpr(O, *MO.getExpr()); |
| 88 | } |
| 89 | |
| 90 | void LoongArchInstPrinter::printAtomicMemOp(const MCInst *MI, unsigned OpNo, |
| 91 | const MCSubtargetInfo &STI, |
| 92 | raw_ostream &O) { |
| 93 | const MCOperand &MO = MI->getOperand(i: OpNo); |
| 94 | assert(MO.isReg() && "printAtomicMemOp can only print register operands" ); |
| 95 | printRegName(O, Reg: MO.getReg()); |
| 96 | } |
| 97 | |
| 98 | const char *LoongArchInstPrinter::getRegisterName(MCRegister Reg) { |
| 99 | // Default print reg alias name |
| 100 | return getRegisterName(Reg, AltIdx: NumericReg ? LoongArch::NoRegAltName |
| 101 | : LoongArch::RegAliasName); |
| 102 | } |
| 103 | |