| 1 | //=== MipsInstPrinter.h - Convert Mips MCInst to assembly syntax -*- C++ -*-==// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This class prints a Mips MCInst to a .s file. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSINSTPRINTER_H |
| 14 | #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSINSTPRINTER_H |
| 15 | #include "llvm/MC/MCInstPrinter.h" |
| 16 | |
| 17 | namespace llvm { |
| 18 | // These enumeration declarations were originally in MipsInstrInfo.h but |
| 19 | // had to be moved here to avoid circular dependencies between |
| 20 | // LLVMMipsCodeGen and LLVMMipsAsmPrinter. |
| 21 | namespace Mips { |
| 22 | // Mips Branch Codes |
| 23 | enum FPBranchCode { |
| 24 | BRANCH_F, |
| 25 | BRANCH_T, |
| 26 | BRANCH_FL, |
| 27 | BRANCH_TL, |
| 28 | BRANCH_INVALID |
| 29 | }; |
| 30 | |
| 31 | // Mips Condition Codes |
| 32 | enum CondCode { |
| 33 | // To be used with float branch True |
| 34 | FCOND_F, |
| 35 | FCOND_UN, |
| 36 | FCOND_OEQ, |
| 37 | FCOND_UEQ, |
| 38 | FCOND_OLT, |
| 39 | FCOND_ULT, |
| 40 | FCOND_OLE, |
| 41 | FCOND_ULE, |
| 42 | FCOND_SF, |
| 43 | FCOND_NGLE, |
| 44 | FCOND_SEQ, |
| 45 | FCOND_NGL, |
| 46 | FCOND_LT, |
| 47 | FCOND_NGE, |
| 48 | FCOND_LE, |
| 49 | FCOND_NGT, |
| 50 | |
| 51 | // To be used with float branch False |
| 52 | // This conditions have the same mnemonic as the |
| 53 | // above ones, but are used with a branch False; |
| 54 | FCOND_T, |
| 55 | FCOND_OR, |
| 56 | FCOND_UNE, |
| 57 | FCOND_ONE, |
| 58 | FCOND_UGE, |
| 59 | FCOND_OGE, |
| 60 | FCOND_UGT, |
| 61 | FCOND_OGT, |
| 62 | FCOND_ST, |
| 63 | FCOND_GLE, |
| 64 | FCOND_SNE, |
| 65 | FCOND_GL, |
| 66 | FCOND_NLT, |
| 67 | FCOND_GE, |
| 68 | FCOND_NLE, |
| 69 | FCOND_GT |
| 70 | }; |
| 71 | |
| 72 | const char *MipsFCCToString(Mips::CondCode CC); |
| 73 | } // end namespace Mips |
| 74 | |
| 75 | class MipsInstPrinter : public MCInstPrinter { |
| 76 | public: |
| 77 | MipsInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, |
| 78 | const MCRegisterInfo &MRI) |
| 79 | : MCInstPrinter(MAI, MII, MRI) {} |
| 80 | |
| 81 | // Autogenerated by tblgen. |
| 82 | std::pair<const char *, uint64_t> |
| 83 | getMnemonic(const MCInst &MI) const override; |
| 84 | void printInstruction(const MCInst *MI, uint64_t Address, |
| 85 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 86 | static const char *getRegisterName(MCRegister Reg); |
| 87 | |
| 88 | void printRegName(raw_ostream &OS, MCRegister Reg) override; |
| 89 | void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, |
| 90 | const MCSubtargetInfo &STI, raw_ostream &O) override; |
| 91 | |
| 92 | bool printAliasInstr(const MCInst *MI, uint64_t Address, |
| 93 | const MCSubtargetInfo &STI, raw_ostream &OS); |
| 94 | void printCustomAliasOperand(const MCInst *MI, uint64_t Address, |
| 95 | unsigned OpIdx, unsigned PrintMethodIdx, |
| 96 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 97 | |
| 98 | private: |
| 99 | void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, |
| 100 | raw_ostream &O); |
| 101 | void printJumpOperand(const MCInst *MI, unsigned OpNo, |
| 102 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 103 | void printBranchOperand(const MCInst *MI, uint64_t Address, unsigned OpNo, |
| 104 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 105 | template <unsigned Bits, unsigned Offset = 0> |
| 106 | void printUImm(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, |
| 107 | raw_ostream &O); |
| 108 | void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, |
| 109 | raw_ostream &O); |
| 110 | void printMemOperandEA(const MCInst *MI, int opNum, |
| 111 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 112 | void printFCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, |
| 113 | raw_ostream &O); |
| 114 | void printSHFMask(const MCInst *MI, int opNum, raw_ostream &O); |
| 115 | |
| 116 | bool printAlias(const char *Str, const MCInst &MI, uint64_t Address, |
| 117 | unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &OS, |
| 118 | bool IsBranch = false); |
| 119 | bool printAlias(const char *Str, const MCInst &MI, uint64_t Address, |
| 120 | unsigned OpNo0, unsigned OpNo1, const MCSubtargetInfo &STI, |
| 121 | raw_ostream &OS, bool IsBranch = false); |
| 122 | bool printAlias(const MCInst &MI, uint64_t Address, |
| 123 | const MCSubtargetInfo &STI, raw_ostream &OS); |
| 124 | void printSaveRestore(const MCInst *MI, const MCSubtargetInfo &STI, |
| 125 | raw_ostream &O); |
| 126 | void printRegisterList(const MCInst *MI, int opNum, |
| 127 | const MCSubtargetInfo &STI, raw_ostream &O); |
| 128 | }; |
| 129 | } // end namespace llvm |
| 130 | |
| 131 | #endif |
| 132 | |