1//===- MipsMulMulBugPass.cpp - Mips VR4300 mulmul bugfix pass -------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Early revisions of the VR4300 have a hardware bug where two consecutive
10// multiplications can produce an incorrect result in the second multiply.
11//
12// This pass scans for mul instructions in each basic block and inserts
13// a nop whenever the following conditions are met:
14//
15// - The current instruction is a single or double-precision floating-point
16// mul instruction.
17// - The next instruction is either a mul instruction (any kind)
18// or a branch instruction.
19//===----------------------------------------------------------------------===//
20
21#include "Mips.h"
22#include "MipsInstrInfo.h"
23#include "MipsSubtarget.h"
24#include "llvm/CodeGen/MachineBasicBlock.h"
25#include "llvm/CodeGen/MachineFunction.h"
26#include "llvm/CodeGen/MachineFunctionPass.h"
27#include "llvm/Support/Debug.h"
28#include "llvm/Target/TargetMachine.h"
29
30#define DEBUG_TYPE "mips-vr4300-mulmul-fix"
31
32using namespace llvm;
33
34namespace {
35
36class MipsMulMulBugFix : public MachineFunctionPass {
37public:
38 MipsMulMulBugFix() : MachineFunctionPass(ID) {}
39
40 StringRef getPassName() const override { return "Mips VR4300 mulmul bugfix"; }
41
42 MachineFunctionProperties getRequiredProperties() const override {
43 return MachineFunctionProperties().setNoVRegs();
44 }
45
46 bool runOnMachineFunction(MachineFunction &MF) override;
47
48 static char ID;
49
50private:
51 bool fixMulMulBB(MachineBasicBlock &MBB, const MipsInstrInfo &MipsII);
52};
53
54} // namespace
55
56INITIALIZE_PASS(MipsMulMulBugFix, "mips-vr4300-mulmul-fix",
57 "Mips VR4300 mulmul bugfix", false, false)
58
59char MipsMulMulBugFix::ID = 0;
60
61bool MipsMulMulBugFix::runOnMachineFunction(MachineFunction &MF) {
62 const MipsInstrInfo &MipsII =
63 *static_cast<const MipsInstrInfo *>(MF.getSubtarget().getInstrInfo());
64
65 bool Modified = false;
66
67 for (auto &MBB : MF)
68 Modified |= fixMulMulBB(MBB, MipsII);
69
70 return Modified;
71}
72
73static bool isFirstMul(const MachineInstr &MI) {
74 switch (MI.getOpcode()) {
75 case Mips::FMUL_S:
76 case Mips::FMUL_D:
77 case Mips::FMUL_D32:
78 case Mips::FMUL_D64:
79 return true;
80 default:
81 return false;
82 }
83}
84
85static bool isSecondMulOrBranch(const MachineInstr &MI) {
86 if (MI.isBranch() || MI.isIndirectBranch() || MI.isCall())
87 return true;
88
89 switch (MI.getOpcode()) {
90 case Mips::MUL:
91 case Mips::FMUL_S:
92 case Mips::FMUL_D:
93 case Mips::FMUL_D32:
94 case Mips::FMUL_D64:
95 case Mips::MULT:
96 case Mips::MULTu:
97 case Mips::DMULT:
98 case Mips::DMULTu:
99 return true;
100 default:
101 return false;
102 }
103}
104
105bool MipsMulMulBugFix::fixMulMulBB(MachineBasicBlock &MBB,
106 const MipsInstrInfo &MipsII) {
107 bool Modified = false;
108
109 MachineBasicBlock::instr_iterator NextMII;
110
111 // Iterate through the instructions in the basic block
112 for (MachineBasicBlock::instr_iterator MII = MBB.instr_begin(),
113 E = MBB.instr_end();
114 MII != E; MII = NextMII) {
115
116 NextMII = next_nodbg(It: MII, End: E);
117
118 // Trigger when the current instruction is a mul and the next instruction
119 // is either a mul or a branch in case the branch target start with a mul
120 if (NextMII != E && isFirstMul(MI: *MII) && isSecondMulOrBranch(MI: *NextMII)) {
121 LLVM_DEBUG(dbgs() << "Found mulmul!\n");
122
123 const MCInstrDesc &NewMCID = MipsII.get(Opcode: Mips::NOP);
124 BuildMI(BB&: MBB, I: NextMII, MIMD: DebugLoc(), MCID: NewMCID);
125 Modified = true;
126 }
127 }
128
129 return Modified;
130}
131
132FunctionPass *llvm::createMipsMulMulBugPass() { return new MipsMulMulBugFix(); }
133