1//===----------------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "RISCVSelectionDAGInfo.h"
10
11#define GET_SDNODE_DESC
12#include "RISCVGenSDNodeInfo.inc"
13
14using namespace llvm;
15
16RISCVSelectionDAGInfo::RISCVSelectionDAGInfo()
17 : SelectionDAGGenTargetInfo(RISCVGenSDNodeInfo) {}
18
19RISCVSelectionDAGInfo::~RISCVSelectionDAGInfo() = default;
20
21void RISCVSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
22 const SDNode *N) const {
23#ifndef NDEBUG
24 switch (N->getOpcode()) {
25 default:
26 return SelectionDAGGenTargetInfo::verifyTargetNode(DAG, N);
27 case RISCVISD::VQDOT_VL:
28 case RISCVISD::VQDOTU_VL:
29 case RISCVISD::VQDOTSU_VL: {
30 assert(N->getNumValues() == 1 && "Expected one result!");
31 assert(N->getNumOperands() == 5 && "Expected five operands!");
32 EVT VT = N->getValueType(0);
33 assert(VT.isScalableVector() && VT.getVectorElementType() == MVT::i32 &&
34 "Expected result to be an i32 scalable vector");
35 assert(N->getOperand(0).getValueType() == VT &&
36 N->getOperand(1).getValueType() == VT &&
37 N->getOperand(2).getValueType() == VT &&
38 "Expected result and first 3 operands to have the same type!");
39 EVT MaskVT = N->getOperand(3).getValueType();
40 assert(MaskVT.isScalableVector() &&
41 MaskVT.getVectorElementType() == MVT::i1 &&
42 MaskVT.getVectorElementCount() == VT.getVectorElementCount() &&
43 "Expected mask VT to be an i1 scalable vector with same number of "
44 "elements as the result");
45 assert((N->getOperand(4).getValueType() == MVT::i32 ||
46 N->getOperand(4).getValueType() == MVT::i64) &&
47 "Expect VL operand to be i32 or i64");
48 break;
49 }
50 }
51#endif
52}
53