1//===-- X86FixupKinds.h - X86 Specific Fixup Entries ------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_X86_MCTARGETDESC_X86FIXUPKINDS_H
10#define LLVM_LIB_TARGET_X86_MCTARGETDESC_X86FIXUPKINDS_H
11
12#include "llvm/MC/MCFixup.h"
13
14namespace llvm {
15namespace X86 {
16enum Fixups {
17 reloc_riprel_4byte = FirstTargetFixupKind, // 32-bit rip-relative
18 reloc_riprel_4byte_movq_load, // 32-bit rip-relative in movq
19 reloc_riprel_4byte_movq_load_rex2, // 32-bit rip-relative in movq
20 // with rex2 prefix
21 reloc_riprel_4byte_relax, // 32-bit rip-relative in relaxable
22 // instruction
23 reloc_riprel_4byte_relax_rex, // 32-bit rip-relative in relaxable
24 // instruction with rex prefix
25 reloc_riprel_4byte_relax_rex2, // 32-bit rip-relative in relaxable
26 // instruction with rex2 prefix
27 reloc_riprel_4byte_relax_evex, // 32-bit rip-relative in relaxable
28 // instruction of APX NDD/NF with
29 // EVEX prefix
30 reloc_signed_4byte, // 32-bit signed. Unlike FK_Data_4
31 // this will be sign extended at
32 // runtime.
33 reloc_signed_4byte_relax, // like reloc_signed_4byte, but
34 // in a relaxable instruction.
35 reloc_global_offset_table, // 32-bit, relative to the start
36 // of the instruction. Used only
37 // for _GLOBAL_OFFSET_TABLE_.
38 reloc_branch_4byte_pcrel, // 32-bit PC relative branch.
39 // Marker
40 LastTargetFixupKind,
41 NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
42};
43}
44}
45
46#endif
47