| 1 | //= X86IntelInstPrinter.h - Convert X86 MCInst to assembly syntax -*- C++ -*-=// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This class prints an X86 MCInst to Intel style .s file syntax. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #ifndef LLVM_LIB_TARGET_X86_MCTARGETDESC_X86INTELINSTPRINTER_H |
| 14 | #define LLVM_LIB_TARGET_X86_MCTARGETDESC_X86INTELINSTPRINTER_H |
| 15 | |
| 16 | #include "X86InstPrinterCommon.h" |
| 17 | #include "llvm/Support/raw_ostream.h" |
| 18 | |
| 19 | namespace llvm { |
| 20 | |
| 21 | class X86IntelInstPrinter final : public X86InstPrinterCommon { |
| 22 | public: |
| 23 | X86IntelInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, |
| 24 | const MCRegisterInfo &MRI) |
| 25 | : X86InstPrinterCommon(MAI, MII, MRI) {} |
| 26 | |
| 27 | void printRegName(raw_ostream &OS, MCRegister Reg) override; |
| 28 | void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, |
| 29 | const MCSubtargetInfo &STI, raw_ostream &OS) override; |
| 30 | bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS); |
| 31 | |
| 32 | // Autogenerated by tblgen, returns true if we successfully printed an |
| 33 | // alias. |
| 34 | bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS); |
| 35 | void printCustomAliasOperand(const MCInst *MI, uint64_t Address, |
| 36 | unsigned OpIdx, unsigned PrintMethodIdx, |
| 37 | raw_ostream &O); |
| 38 | |
| 39 | // Autogenerated by tblgen. |
| 40 | std::pair<const char *, uint64_t> |
| 41 | getMnemonic(const MCInst &MI) const override; |
| 42 | void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O); |
| 43 | static const char *getRegisterName(MCRegister Reg); |
| 44 | |
| 45 | void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) override; |
| 46 | void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O); |
| 47 | void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O); |
| 48 | void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O); |
| 49 | void printDstIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O); |
| 50 | void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &O); |
| 51 | void printSTiRegOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS); |
| 52 | |
| 53 | void printbytemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 54 | O << "byte ptr " ; |
| 55 | printMemReference(MI, Op: OpNo, O); |
| 56 | } |
| 57 | void printwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 58 | O << "word ptr " ; |
| 59 | printMemReference(MI, Op: OpNo, O); |
| 60 | } |
| 61 | void printdwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 62 | O << "dword ptr " ; |
| 63 | printMemReference(MI, Op: OpNo, O); |
| 64 | } |
| 65 | void printqwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 66 | O << "qword ptr " ; |
| 67 | printMemReference(MI, Op: OpNo, O); |
| 68 | } |
| 69 | void printxmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 70 | O << "xmmword ptr " ; |
| 71 | printMemReference(MI, Op: OpNo, O); |
| 72 | } |
| 73 | void printymmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 74 | O << "ymmword ptr " ; |
| 75 | printMemReference(MI, Op: OpNo, O); |
| 76 | } |
| 77 | void printzmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 78 | O << "zmmword ptr " ; |
| 79 | printMemReference(MI, Op: OpNo, O); |
| 80 | } |
| 81 | void printtbytemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 82 | O << "tbyte ptr " ; |
| 83 | printMemReference(MI, Op: OpNo, O); |
| 84 | } |
| 85 | |
| 86 | |
| 87 | void printSrcIdx8(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 88 | O << "byte ptr " ; |
| 89 | printSrcIdx(MI, OpNo, O); |
| 90 | } |
| 91 | void printSrcIdx16(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 92 | O << "word ptr " ; |
| 93 | printSrcIdx(MI, OpNo, O); |
| 94 | } |
| 95 | void printSrcIdx32(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 96 | O << "dword ptr " ; |
| 97 | printSrcIdx(MI, OpNo, O); |
| 98 | } |
| 99 | void printSrcIdx64(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 100 | O << "qword ptr " ; |
| 101 | printSrcIdx(MI, OpNo, O); |
| 102 | } |
| 103 | void printDstIdx8(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 104 | O << "byte ptr " ; |
| 105 | printDstIdx(MI, OpNo, O); |
| 106 | } |
| 107 | void printDstIdx16(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 108 | O << "word ptr " ; |
| 109 | printDstIdx(MI, OpNo, O); |
| 110 | } |
| 111 | void printDstIdx32(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 112 | O << "dword ptr " ; |
| 113 | printDstIdx(MI, OpNo, O); |
| 114 | } |
| 115 | void printDstIdx64(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 116 | O << "qword ptr " ; |
| 117 | printDstIdx(MI, OpNo, O); |
| 118 | } |
| 119 | void printMemOffs8(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 120 | O << "byte ptr " ; |
| 121 | printMemOffset(MI, OpNo, O); |
| 122 | } |
| 123 | void printMemOffs16(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 124 | O << "word ptr " ; |
| 125 | printMemOffset(MI, OpNo, O); |
| 126 | } |
| 127 | void printMemOffs32(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 128 | O << "dword ptr " ; |
| 129 | printMemOffset(MI, OpNo, O); |
| 130 | } |
| 131 | void printMemOffs64(const MCInst *MI, unsigned OpNo, raw_ostream &O) { |
| 132 | O << "qword ptr " ; |
| 133 | printMemOffset(MI, OpNo, O); |
| 134 | } |
| 135 | }; |
| 136 | |
| 137 | } // end namespace llvm |
| 138 | |
| 139 | #endif // LLVM_LIB_TARGET_X86_MCTARGETDESC_X86INTELINSTPRINTER_H |
| 140 | |