| 1 | //===-- X86ShuffleDecode.h - X86 shuffle decode logic -----------*-C++-*---===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // Define several functions to decode x86 specific shuffle semantics into a |
| 10 | // generic vector mask. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef LLVM_LIB_TARGET_X86_UTILS_X86SHUFFLEDECODE_H |
| 15 | #define LLVM_LIB_TARGET_X86_UTILS_X86SHUFFLEDECODE_H |
| 16 | |
| 17 | #include <cstdint> |
| 18 | |
| 19 | //===----------------------------------------------------------------------===// |
| 20 | // Vector Mask Decoding |
| 21 | //===----------------------------------------------------------------------===// |
| 22 | |
| 23 | namespace llvm { |
| 24 | class APInt; |
| 25 | template <typename T> class ArrayRef; |
| 26 | template <typename T> class SmallVectorImpl; |
| 27 | |
| 28 | enum { SM_SentinelUndef = -1, SM_SentinelZero = -2 }; |
| 29 | |
| 30 | /// Decode a 128-bit INSERTPS instruction as a v4f32 shuffle mask. |
| 31 | void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask, |
| 32 | bool SrcIsMem); |
| 33 | |
| 34 | // Insert the bottom Len elements from a second source into a vector starting at |
| 35 | // element Idx. |
| 36 | void DecodeInsertElementMask(unsigned NumElts, unsigned Idx, unsigned Len, |
| 37 | SmallVectorImpl<int> &ShuffleMask); |
| 38 | |
| 39 | /// Decode a MOVHLPS instruction as a v2f64/v4f32 shuffle mask. |
| 40 | /// i.e. <3,1> or <6,7,2,3> |
| 41 | void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask); |
| 42 | |
| 43 | /// Decode a MOVLHPS instruction as a v2f64/v4f32 shuffle mask. |
| 44 | /// i.e. <0,2> or <0,1,4,5> |
| 45 | void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask); |
| 46 | |
| 47 | void DecodeMOVSLDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask); |
| 48 | |
| 49 | void DecodeMOVSHDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask); |
| 50 | |
| 51 | void DecodeMOVDDUPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask); |
| 52 | |
| 53 | void DecodePSLLDQMask(unsigned NumElts, unsigned Imm, |
| 54 | SmallVectorImpl<int> &ShuffleMask); |
| 55 | |
| 56 | void DecodePSRLDQMask(unsigned NumElts, unsigned Imm, |
| 57 | SmallVectorImpl<int> &ShuffleMask); |
| 58 | |
| 59 | void DecodePALIGNRMask(unsigned NumElts, unsigned Imm, |
| 60 | SmallVectorImpl<int> &ShuffleMask); |
| 61 | |
| 62 | void DecodeVALIGNMask(unsigned NumElts, unsigned Imm, |
| 63 | SmallVectorImpl<int> &ShuffleMask); |
| 64 | |
| 65 | /// Decodes the shuffle masks for pshufd/pshufw/vpermilpd/vpermilps. |
| 66 | void DecodePSHUFMask(unsigned NumElts, unsigned ScalarBits, unsigned Imm, |
| 67 | SmallVectorImpl<int> &ShuffleMask); |
| 68 | |
| 69 | /// Decodes the shuffle masks for pshufhw. |
| 70 | void DecodePSHUFHWMask(unsigned NumElts, unsigned Imm, |
| 71 | SmallVectorImpl<int> &ShuffleMask); |
| 72 | |
| 73 | /// Decodes the shuffle masks for pshuflw. |
| 74 | void DecodePSHUFLWMask(unsigned NumElts, unsigned Imm, |
| 75 | SmallVectorImpl<int> &ShuffleMask); |
| 76 | |
| 77 | /// Decodes a PSWAPD 3DNow! instruction. |
| 78 | void DecodePSWAPMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask); |
| 79 | |
| 80 | /// Decodes the shuffle masks for shufp*. |
| 81 | void DecodeSHUFPMask(unsigned NumElts, unsigned ScalarBits, unsigned Imm, |
| 82 | SmallVectorImpl<int> &ShuffleMask); |
| 83 | |
| 84 | /// Decodes the shuffle masks for unpckhps/unpckhpd and punpckh*. |
| 85 | void DecodeUNPCKHMask(unsigned NumElts, unsigned ScalarBits, |
| 86 | SmallVectorImpl<int> &ShuffleMask); |
| 87 | |
| 88 | /// Decodes the shuffle masks for unpcklps/unpcklpd and punpckl*. |
| 89 | void DecodeUNPCKLMask(unsigned NumElts, unsigned ScalarBits, |
| 90 | SmallVectorImpl<int> &ShuffleMask); |
| 91 | |
| 92 | /// Decodes a broadcast of the first element of a vector. |
| 93 | void DecodeVectorBroadcast(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask); |
| 94 | |
| 95 | /// Decodes a broadcast of a subvector to a larger vector type. |
| 96 | void DecodeSubVectorBroadcast(unsigned DstNumElts, unsigned SrcNumElts, |
| 97 | SmallVectorImpl<int> &ShuffleMask); |
| 98 | |
| 99 | /// Decode a PSHUFB mask from a raw array of constants such as from |
| 100 | /// BUILD_VECTOR. |
| 101 | void DecodePSHUFBMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts, |
| 102 | SmallVectorImpl<int> &ShuffleMask); |
| 103 | |
| 104 | /// Decode a BLEND immediate mask into a shuffle mask. |
| 105 | void DecodeBLENDMask(unsigned NumElts, unsigned Imm, |
| 106 | SmallVectorImpl<int> &ShuffleMask); |
| 107 | |
| 108 | void DecodeVPERM2X128Mask(unsigned NumElts, unsigned Imm, |
| 109 | SmallVectorImpl<int> &ShuffleMask); |
| 110 | |
| 111 | /// Decode a shuffle packed values at 128-bit granularity |
| 112 | /// (SHUFF32x4/SHUFF64x2/SHUFI32x4/SHUFI64x2) |
| 113 | /// immediate mask into a shuffle mask. |
| 114 | void decodeVSHUF64x2FamilyMask(unsigned NumElts, unsigned ScalarSize, |
| 115 | unsigned Imm, SmallVectorImpl<int> &ShuffleMask); |
| 116 | |
| 117 | /// Decodes the shuffle masks for VPERMQ/VPERMPD. |
| 118 | void DecodeVPERMMask(unsigned NumElts, unsigned Imm, |
| 119 | SmallVectorImpl<int> &ShuffleMask); |
| 120 | |
| 121 | /// Decode a VPPERM mask from a raw array of constants such as from |
| 122 | /// BUILD_VECTOR. |
| 123 | /// This can only basic masks (permutes + zeros), not any of the other |
| 124 | /// operations that VPPERM can perform. |
| 125 | void DecodeVPPERMMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts, |
| 126 | SmallVectorImpl<int> &ShuffleMask); |
| 127 | |
| 128 | /// Decode a zero extension instruction as a shuffle mask. |
| 129 | void DecodeZeroExtendMask(unsigned SrcScalarBits, unsigned DstScalarBits, |
| 130 | unsigned NumDstElts, bool IsAnyExtend, |
| 131 | SmallVectorImpl<int> &ShuffleMask); |
| 132 | |
| 133 | /// Decode a move lower and zero upper instruction as a shuffle mask. |
| 134 | void DecodeZeroMoveLowMask(unsigned NumElts, SmallVectorImpl<int> &ShuffleMask); |
| 135 | |
| 136 | /// Decode a scalar float move instruction as a shuffle mask. |
| 137 | void DecodeScalarMoveMask(unsigned NumElts, bool IsLoad, |
| 138 | SmallVectorImpl<int> &ShuffleMask); |
| 139 | |
| 140 | /// Decode a SSE4A EXTRQ instruction as a shuffle mask. |
| 141 | void DecodeEXTRQIMask(unsigned NumElts, unsigned EltSize, int Len, int Idx, |
| 142 | SmallVectorImpl<int> &ShuffleMask); |
| 143 | |
| 144 | /// Decode a SSE4A INSERTQ instruction as a shuffle mask. |
| 145 | void DecodeINSERTQIMask(unsigned NumElts, unsigned EltSize, int Len, int Idx, |
| 146 | SmallVectorImpl<int> &ShuffleMask); |
| 147 | |
| 148 | /// Decode a VPERMILPD/VPERMILPS variable mask from a raw array of constants. |
| 149 | void DecodeVPERMILPMask(unsigned NumElts, unsigned ScalarBits, |
| 150 | ArrayRef<uint64_t> RawMask, const APInt &UndefElts, |
| 151 | SmallVectorImpl<int> &ShuffleMask); |
| 152 | |
| 153 | /// Decode a VPERMIL2PD/VPERMIL2PS variable mask from a raw array of constants. |
| 154 | void DecodeVPERMIL2PMask(unsigned NumElts, unsigned ScalarBits, unsigned M2Z, |
| 155 | ArrayRef<uint64_t> RawMask, const APInt &UndefElts, |
| 156 | SmallVectorImpl<int> &ShuffleMask); |
| 157 | |
| 158 | /// Decode a VPERM W/D/Q/PS/PD mask from a raw array of constants. |
| 159 | void DecodeVPERMVMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts, |
| 160 | SmallVectorImpl<int> &ShuffleMask); |
| 161 | |
| 162 | /// Decode a VPERMT2 W/D/Q/PS/PD mask from a raw array of constants. |
| 163 | void DecodeVPERMV3Mask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts, |
| 164 | SmallVectorImpl<int> &ShuffleMask); |
| 165 | } // llvm namespace |
| 166 | |
| 167 | #endif |
| 168 | |